diff -Nru mesa-12.0.6/bin/get-typod-pick-list.sh mesa-17.0.7/bin/get-typod-pick-list.sh --- mesa-12.0.6/bin/get-typod-pick-list.sh 2017-06-26 12:58:28.000000000 +0000 +++ mesa-17.0.7/bin/get-typod-pick-list.sh 1970-01-01 00:00:00.000000000 +0000 @@ -1,39 +0,0 @@ -#!/bin/sh - -# Script for generating a list of candidates which have typos in the nomination line -# -# Usage examples: -# -# $ bin/get-typod-pick-list.sh -# $ bin/get-typod-pick-list.sh > picklist -# $ bin/get-typod-pick-list.sh | tee picklist - -# NB: -# This script intentionally _never_ checks for specific version tag -# Should we consider folding it with the original get-pick-list.sh - -# Grep for commits with "cherry picked from commit" in the commit message. -git log --reverse --grep="cherry picked from commit" origin/master..HEAD |\ - grep "cherry picked from commit" |\ - sed -e 's/^[[:space:]]*(cherry picked from commit[[:space:]]*//' -e 's/)//' > already_picked - -# Grep for commits that were marked as a candidate for the stable tree. -git log --reverse --pretty=%H -i --grep='^CC:.*mesa-dev' HEAD..origin/master |\ -while read sha -do - # Check to see whether the patch is on the ignore list. - if [ -f bin/.cherry-ignore ] ; then - if grep -q ^$sha bin/.cherry-ignore ; then - continue - fi - fi - - # Check to see if it has already been picked over. - if grep -q ^$sha already_picked ; then - continue - fi - - git log -n1 --pretty=oneline $sha | cat -done - -rm -f already_picked diff -Nru mesa-12.0.6/common.py mesa-17.0.7/common.py --- mesa-12.0.6/common.py 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/common.py 2017-06-01 10:37:10.000000000 +0000 @@ -59,7 +59,7 @@ # find default_llvm value -if 'LLVM' in os.environ: +if 'LLVM' in os.environ or 'LLVM_CONFIG' in os.environ: default_llvm = 'yes' else: default_llvm = 'no' @@ -86,7 +86,7 @@ from SCons.Options.EnumOption import EnumOption opts.Add(EnumOption('build', 'build type', 'debug', allowed_values=('debug', 'checked', 'profile', - 'release'))) + 'release', 'opt'))) opts.Add(BoolOption('verbose', 'verbose output', 'no')) opts.Add(EnumOption('machine', 'use machine-specific assembly code', default_machine, @@ -110,5 +110,6 @@ opts.Add(BoolOption('texture_float', 'enable floating-point textures and renderbuffers', 'no')) + opts.Add(BoolOption('swr', 'Build OpenSWR', 'no')) if host_platform == 'windows': opts.Add('MSVC_VERSION', 'Microsoft Visual C/C++ version') diff -Nru mesa-12.0.6/configure mesa-17.0.7/configure --- mesa-12.0.6/configure 2017-01-24 01:41:43.000000000 +0000 +++ mesa-17.0.7/configure 2017-06-01 10:37:18.000000000 +0000 @@ -1,6 +1,6 @@ #! /bin/sh # Guess values for system-dependent variables and create Makefiles. -# Generated by GNU Autoconf 2.69 for Mesa 12.0.6. +# Generated by GNU Autoconf 2.69 for Mesa 17.0.7. # # Report bugs to . # @@ -591,8 +591,8 @@ # Identity of this package. PACKAGE_NAME='Mesa' PACKAGE_TARNAME='mesa' -PACKAGE_VERSION='12.0.6' -PACKAGE_STRING='Mesa 12.0.6' +PACKAGE_VERSION='17.0.7' +PACKAGE_STRING='Mesa 17.0.7' PACKAGE_BUGREPORT='https://bugs.freedesktop.org/enter_bug.cgi?product=Mesa' PACKAGE_URL='' @@ -638,13 +638,14 @@ LIBOBJS VALGRIND_LIBS VALGRIND_CFLAGS -TIMESTAMP_CMD XA_VERSION XA_TINY XA_MINOR XA_MAJOR XVMC_MINOR XVMC_MAJOR +HAVE_VULKAN_COMMON_FALSE +HAVE_VULKAN_COMMON_TRUE VA_MINOR VA_MAJOR VDPAU_MINOR @@ -669,8 +670,8 @@ HAVE_LIBDRM_TRUE USE_VC4_SIMULATOR_FALSE USE_VC4_SIMULATOR_TRUE -HAVE_MESA_LLVM_FALSE -HAVE_MESA_LLVM_TRUE +HAVE_GALLIUM_LLVM_FALSE +HAVE_GALLIUM_LLVM_TRUE HAVE_GALLIUM_COMPUTE_FALSE HAVE_GALLIUM_COMPUTE_TRUE NEED_RADEON_LLVM_FALSE @@ -681,8 +682,12 @@ NEED_RADEON_DRM_WINSYS_TRUE HAVE_INTEL_DRIVERS_FALSE HAVE_INTEL_DRIVERS_TRUE +HAVE_AMD_DRIVERS_FALSE +HAVE_AMD_DRIVERS_TRUE HAVE_INTEL_VULKAN_FALSE HAVE_INTEL_VULKAN_TRUE +HAVE_RADEON_VULKAN_FALSE +HAVE_RADEON_VULKAN_TRUE HAVE_SWRAST_DRI_FALSE HAVE_SWRAST_DRI_TRUE HAVE_RADEON_DRI_FALSE @@ -710,6 +715,10 @@ HAVE_GALLIUM_LLVMPIPE_TRUE HAVE_GALLIUM_SOFTPIPE_FALSE HAVE_GALLIUM_SOFTPIPE_TRUE +HAVE_GALLIUM_IMX_FALSE +HAVE_GALLIUM_IMX_TRUE +HAVE_GALLIUM_ETNAVIV_FALSE +HAVE_GALLIUM_ETNAVIV_TRUE HAVE_GALLIUM_FREEDRENO_FALSE HAVE_GALLIUM_FREEDRENO_TRUE HAVE_GALLIUM_NOUVEAU_FALSE @@ -730,15 +739,17 @@ HAVE_GALLIUM_SVGA_TRUE SIMPENROSE_LIBS SIMPENROSE_CFLAGS +VC4_LIBS +VC4_CFLAGS SWR_AVX2_CXXFLAGS SWR_AVX_CXXFLAGS SWR_CXX11_CXXFLAGS +ETNAVIV_LIBS +ETNAVIV_CFLAGS FREEDRENO_LIBS FREEDRENO_CFLAGS NOUVEAU_LIBS NOUVEAU_CFLAGS -AMDGPU_LIBS -AMDGPU_CFLAGS D3D_DRIVER_INSTALL_DIR VA_LIB_INSTALL_DIR OMX_LIB_INSTALL_DIR @@ -746,11 +757,8 @@ HAVE_GALLIUM_TESTS_FALSE HAVE_GALLIUM_TESTS_TRUE XVMC_LIB_INSTALL_DIR -LLVM_CONFIG EGL_CFLAGS EGL_NATIVE_PLATFORM -HAVE_EGL_DRIVER_DRI2_FALSE -HAVE_EGL_DRIVER_DRI2_TRUE HAVE_EGL_PLATFORM_ANDROID_FALSE HAVE_EGL_PLATFORM_ANDROID_TRUE HAVE_EGL_PLATFORM_SURFACELESS_FALSE @@ -761,6 +769,8 @@ HAVE_PLATFORM_WAYLAND_TRUE HAVE_PLATFORM_X11_FALSE HAVE_PLATFORM_X11_TRUE +ANDROID_LIBS +ANDROID_CFLAGS XCB_DRI2_LIBS XCB_DRI2_CFLAGS WAYLAND_LIBS @@ -768,29 +778,17 @@ WAYLAND_SCANNER WAYLAND_SCANNER_LIBS WAYLAND_SCANNER_CFLAGS -EGL_CLIENT_APIS -VG_LIB_DEPS -CLANG_RESOURCE_DIR -LLVM_VERSION -LLVM_INCLUDEDIR -LLVM_LDFLAGS -LLVM_LIBS -LLVM_LIBDIR -LLVM_CXXFLAGS -LLVM_CPPFLAGS -LLVM_CFLAGS -LLVM_BINDIR HAVE_GALLIUM_FALSE HAVE_GALLIUM_TRUE +CLANG_RESOURCE_DIR OPENCL_LIBNAME HAVE_CLOVER_ICD_FALSE HAVE_CLOVER_ICD_TRUE HAVE_CLOVER_FALSE HAVE_CLOVER_TRUE +CLOVER_STD_OVERRIDE LIBCLC_LIBEXECDIR LIBCLC_INCLUDEDIR -LIBELF_LIBS -LIBELF_CFLAGS HAVE_ST_NINE_FALSE HAVE_ST_NINE_TRUE HAVE_ST_VA_FALSE @@ -831,6 +829,8 @@ NEED_LIBMESA_TRUE NEED_MEGADRIVER_FALSE NEED_MEGADRIVER_TRUE +AMDGPU_LIBS +AMDGPU_CFLAGS VULKAN_ICD_INSTALL_DIR RADEON_LIBS RADEON_CFLAGS @@ -869,23 +869,16 @@ DRI3PROTO_CFLAGS DRI2PROTO_LIBS DRI2PROTO_CFLAGS -GLPROTO_LIBS -GLPROTO_CFLAGS XLIBGL_LIBS XLIBGL_CFLAGS -LIBUDEV_LIBS -LIBUDEV_CFLAGS -ENABLE_SHADER_CACHE_FALSE -ENABLE_SHADER_CACHE_TRUE -SHA1_CFLAGS -SHA1_LIBS -OPENSSL_LIBS -OPENSSL_CFLAGS -LIBSHA1_LIBS -LIBSHA1_CFLAGS -MESA_LLVM +GLPROTO_LIBS +GLPROTO_CFLAGS HAVE_SHARED_GLAPI_FALSE HAVE_SHARED_GLAPI_TRUE +HAVE_WINDOWSDRI_FALSE +HAVE_WINDOWSDRI_TRUE +HAVE_LMSENSORS_FALSE +HAVE_LMSENSORS_TRUE HAVE_APPLEDRI_FALSE HAVE_APPLEDRI_TRUE HAVE_DRI3_FALSE @@ -918,6 +911,24 @@ HAVE_OPENGL_ES1_TRUE HAVE_OPENGL_FALSE HAVE_OPENGL_TRUE +LIBSENSORS_LIBS +HAVE_LIBSENSORS_FALSE +HAVE_LIBSENSORS_TRUE +HAVE_GALLIUM_EXTRA_HUD_FALSE +HAVE_GALLIUM_EXTRA_HUD_TRUE +LLVM_VERSION +LLVM_INCLUDEDIR +LLVM_LDFLAGS +LLVM_LIBS +LLVM_LIBDIR +LLVM_CXXFLAGS +LLVM_CPPFLAGS +LLVM_CFLAGS +LLVM_BINDIR +MESA_LLVM +LLVM_CONFIG +LIBELF_LIBS +LIBELF_CFLAGS SELINUX_LIBS SELINUX_CFLAGS PTHREADSTUBS_LIBS @@ -945,6 +956,8 @@ BUILD_SHARED_FALSE BUILD_SHARED_TRUE PWR8_CFLAGS +GCC_ATOMIC_BUILTINS_SUPPORTED_FALSE +GCC_ATOMIC_BUILTINS_SUPPORTED_TRUE SSE41_CFLAGS SSE41_SUPPORTED_FALSE SSE41_SUPPORTED_TRUE @@ -970,6 +983,7 @@ LEX YFLAGS YACC +XXD RM CXXCPP LT_SYS_LIBRARY_PATH @@ -1128,10 +1142,14 @@ enable_texture_float enable_asm enable_selinux +enable_llvm_shared_libs +with_llvm_prefix enable_opengl enable_gles1 enable_gles2 enable_dri +enable_gallium_extra_hud +enable_lmsensors enable_dri3 enable_glx enable_osmesa @@ -1149,23 +1167,18 @@ enable_gallium_tests with_gallium_drivers enable_shared_glapi -with_sha1 -enable_shader_cache -enable_sysfs enable_driglx_direct enable_glx_tls enable_glx_read_only_text with_dri_driverdir with_dri_searchpath with_dri_drivers +enable_gallium_llvm with_vulkan_drivers with_vulkan_icddir with_osmesa_bits with_clang_libdir with_egl_platforms -enable_gallium_llvm -enable_llvm_shared_libs -with_llvm_prefix with_xvmc_libdir with_vdpau_libdir with_omx_libdir @@ -1198,20 +1211,16 @@ PTHREADSTUBS_LIBS SELINUX_CFLAGS SELINUX_LIBS +LIBELF_CFLAGS +LIBELF_LIBS GLVND_CFLAGS GLVND_LIBS LIBDRM_CFLAGS LIBDRM_LIBS -LIBSHA1_CFLAGS -LIBSHA1_LIBS -OPENSSL_CFLAGS -OPENSSL_LIBS -LIBUDEV_CFLAGS -LIBUDEV_LIBS -XLIBGL_CFLAGS -XLIBGL_LIBS GLPROTO_CFLAGS GLPROTO_LIBS +XLIBGL_CFLAGS +XLIBGL_LIBS DRI2PROTO_CFLAGS DRI2PROTO_LIBS DRI3PROTO_CFLAGS @@ -1232,6 +1241,8 @@ NVVIEUX_LIBS RADEON_CFLAGS RADEON_LIBS +AMDGPU_CFLAGS +AMDGPU_LIBS VL_CFLAGS VL_LIBS XVMC_CFLAGS @@ -1242,20 +1253,22 @@ OMX_LIBS VA_CFLAGS VA_LIBS -LIBELF_CFLAGS -LIBELF_LIBS WAYLAND_SCANNER_CFLAGS WAYLAND_SCANNER_LIBS WAYLAND_CFLAGS WAYLAND_LIBS XCB_DRI2_CFLAGS XCB_DRI2_LIBS -AMDGPU_CFLAGS -AMDGPU_LIBS +ANDROID_CFLAGS +ANDROID_LIBS NOUVEAU_CFLAGS NOUVEAU_LIBS FREEDRENO_CFLAGS FREEDRENO_LIBS +ETNAVIV_CFLAGS +ETNAVIV_LIBS +VC4_CFLAGS +VC4_LIBS SIMPENROSE_CFLAGS SIMPENROSE_LIBS VALGRIND_CFLAGS @@ -1800,7 +1813,7 @@ # Omit some internal or obsolete options to make the list less imposing. # This message is too long to be a string in the A/UX 3.1 sh. cat <<_ACEOF -\`configure' configures Mesa 12.0.6 to adapt to many kinds of systems. +\`configure' configures Mesa 17.0.7 to adapt to many kinds of systems. Usage: $0 [OPTION]... [VAR=VALUE]... @@ -1871,7 +1884,7 @@ if test -n "$ac_init_help"; then case $ac_init_help in - short | recursive ) echo "Configuration of Mesa 12.0.6:";; + short | recursive ) echo "Configuration of Mesa 17.0.7:";; esac cat <<\_ACEOF @@ -1903,6 +1916,8 @@ --disable-asm disable assembly usage [default=enabled on supported plaforms] --enable-selinux Build SELinux-aware Mesa [default=disabled] + --enable-llvm-shared-libs + link with LLVM shared libraries [default=enabled] --disable-opengl disable support for standard OpenGL API [default=enabled] --disable-gles1 disable support for OpenGL ES 1.x API @@ -1910,6 +1925,10 @@ --disable-gles2 disable support for OpenGL ES 2.x API [default=enabled] --enable-dri enable DRI modules [default=enabled] + --enable-gallium-extra-hud + enable HUD block/NIC I/O HUD stats support + [default=disabled] + --enable-lmsensors enable HUD lmsensor support [default=disabled] --enable-dri3 enable DRI3 [default=auto] --enable-glx[=dri|xlib|gallium-xlib] enable the GLX library and choose an implementation @@ -1920,7 +1939,7 @@ --disable-egl disable EGL library [default=enabled] --enable-xa enable build of the XA X Acceleration API [default=disabled] - --enable-gbm enable gbm library [default=auto] + --enable-gbm enable gbm library [default=yes except cygwin] --enable-nine enable build of the nine Direct3D9 API [default=no] --enable-xvmc enable xvmc library [default=auto] --enable-vdpau enable vdpau library [default=auto] @@ -1931,18 +1950,14 @@ implementation [default=disabled] --enable-gallium-tests Enable optional Gallium tests) [default=disabled] --enable-shared-glapi Enable shared glapi for OpenGL [default=enabled] - --disable-shader-cache Disable binary shader cache - --enable-sysfs enable /sys PCI identification [default=disabled] --disable-driglx-direct disable direct rendering in GLX and EGL for DRI [default=auto] - --enable-glx-tls enable TLS support in GLX [default=disabled] + --enable-glx-tls enable TLS support in GLX [default=enabled] --enable-glx-read-only-text Disable writable .text section on x86 (decreases performance) [default=disabled] --enable-gallium-llvm build gallium LLVM support [default=enabled on x86/x86_64] - --enable-llvm-shared-libs - link with LLVM shared libraries [default=enabled] --enable-valgrind Build mesa with valgrind support (default: auto) Optional Packages: @@ -1960,12 +1975,12 @@ specify GL library name [default=GL] --with-osmesa-lib-name[=NAME] specify OSMesa library name [default=OSMesa] + --with-llvm-prefix Prefix for LLVM installations in non-standard + locations --with-gallium-drivers[=DIRS...] comma delimited Gallium drivers list, e.g. - "i915,ilo,nouveau,r300,r600,radeonsi,freedreno,svga,swrast,vc4,virgl" + "i915,ilo,nouveau,r300,r600,radeonsi,freedreno,svga,swrast,vc4,virgl,etnaviv,imx" [default=r300,r600,svga,swrast] - --with-sha1=libc|libmd|libnettle|libgcrypt|libcrypto|libsha1|CommonCrypto|CryptoAPI - choose SHA1 implementation --with-dri-driverdir=DIR directory for the DRI drivers [${libdir}/dri] --with-dri-searchpath=DIRS... @@ -1975,8 +1990,8 @@ comma delimited classic DRI drivers list, e.g. "swrast,i965,radeon" [default=auto] --with-vulkan-drivers[=DIRS...] - comma delimited Vulkan drivers list, e.g. "intel" - [default=no] + comma delimited Vulkan drivers list, e.g. + "intel,radeon" [default=no] --with-vulkan-icddir=DIR directory for the Vulkan driver icd files [${datarootdir}/vulkan/icd.d] @@ -1987,8 +2002,6 @@ --with-egl-platforms[=DIRS...] comma delimited native platforms libEGL supports, e.g. "x11,drm" [default=auto] - --with-llvm-prefix Prefix for LLVM installations in non-standard - locations --with-xvmc-libdir=DIR directory for the XVMC libraries [default=${libdir}] --with-vdpau-libdir=DIR directory for the VDPAU libraries [default=${libdir}/vdpau] @@ -2031,31 +2044,22 @@ C compiler flags for SELINUX, overriding pkg-config SELINUX_LIBS linker flags for SELINUX, overriding pkg-config + LIBELF_CFLAGS + C compiler flags for LIBELF, overriding pkg-config + LIBELF_LIBS linker flags for LIBELF, overriding pkg-config GLVND_CFLAGS C compiler flags for GLVND, overriding pkg-config GLVND_LIBS linker flags for GLVND, overriding pkg-config LIBDRM_CFLAGS C compiler flags for LIBDRM, overriding pkg-config LIBDRM_LIBS linker flags for LIBDRM, overriding pkg-config - LIBSHA1_CFLAGS - C compiler flags for LIBSHA1, overriding pkg-config - LIBSHA1_LIBS - linker flags for LIBSHA1, overriding pkg-config - OPENSSL_CFLAGS - C compiler flags for OPENSSL, overriding pkg-config - OPENSSL_LIBS - linker flags for OPENSSL, overriding pkg-config - LIBUDEV_CFLAGS - C compiler flags for LIBUDEV, overriding pkg-config - LIBUDEV_LIBS - linker flags for LIBUDEV, overriding pkg-config - XLIBGL_CFLAGS - C compiler flags for XLIBGL, overriding pkg-config - XLIBGL_LIBS linker flags for XLIBGL, overriding pkg-config GLPROTO_CFLAGS C compiler flags for GLPROTO, overriding pkg-config GLPROTO_LIBS linker flags for GLPROTO, overriding pkg-config + XLIBGL_CFLAGS + C compiler flags for XLIBGL, overriding pkg-config + XLIBGL_LIBS linker flags for XLIBGL, overriding pkg-config DRI2PROTO_CFLAGS C compiler flags for DRI2PROTO, overriding pkg-config DRI2PROTO_LIBS @@ -2092,6 +2096,9 @@ RADEON_CFLAGS C compiler flags for RADEON, overriding pkg-config RADEON_LIBS linker flags for RADEON, overriding pkg-config + AMDGPU_CFLAGS + C compiler flags for AMDGPU, overriding pkg-config + AMDGPU_LIBS linker flags for AMDGPU, overriding pkg-config VL_CFLAGS C compiler flags for VL, overriding pkg-config VL_LIBS linker flags for VL, overriding pkg-config XVMC_CFLAGS C compiler flags for XVMC, overriding pkg-config @@ -2103,9 +2110,6 @@ OMX_LIBS linker flags for OMX, overriding pkg-config VA_CFLAGS C compiler flags for VA, overriding pkg-config VA_LIBS linker flags for VA, overriding pkg-config - LIBELF_CFLAGS - C compiler flags for LIBELF, overriding pkg-config - LIBELF_LIBS linker flags for LIBELF, overriding pkg-config WAYLAND_SCANNER_CFLAGS C compiler flags for WAYLAND_SCANNER, overriding pkg-config WAYLAND_SCANNER_LIBS @@ -2118,9 +2122,10 @@ C compiler flags for XCB_DRI2, overriding pkg-config XCB_DRI2_LIBS linker flags for XCB_DRI2, overriding pkg-config - AMDGPU_CFLAGS - C compiler flags for AMDGPU, overriding pkg-config - AMDGPU_LIBS linker flags for AMDGPU, overriding pkg-config + ANDROID_CFLAGS + C compiler flags for ANDROID, overriding pkg-config + ANDROID_LIBS + linker flags for ANDROID, overriding pkg-config NOUVEAU_CFLAGS C compiler flags for NOUVEAU, overriding pkg-config NOUVEAU_LIBS @@ -2129,6 +2134,12 @@ C compiler flags for FREEDRENO, overriding pkg-config FREEDRENO_LIBS linker flags for FREEDRENO, overriding pkg-config + ETNAVIV_CFLAGS + C compiler flags for ETNAVIV, overriding pkg-config + ETNAVIV_LIBS + linker flags for ETNAVIV, overriding pkg-config + VC4_CFLAGS C compiler flags for VC4, overriding pkg-config + VC4_LIBS linker flags for VC4, overriding pkg-config SIMPENROSE_CFLAGS C compiler flags for SIMPENROSE, overriding pkg-config SIMPENROSE_LIBS @@ -2206,7 +2217,7 @@ test -n "$ac_init_help" && exit $ac_status if $ac_init_version; then cat <<\_ACEOF -Mesa configure 12.0.6 +Mesa configure 17.0.7 generated by GNU Autoconf 2.69 Copyright (C) 2012 Free Software Foundation, Inc. @@ -2925,7 +2936,7 @@ This file contains any messages produced by compilers while running configure, to aid debugging if configure makes a mistake. -It was created by Mesa $as_me 12.0.6, which was +It was created by Mesa $as_me 17.0.7, which was generated by GNU Autoconf 2.69. Invocation command line was $ $0 $@ @@ -3900,7 +3911,7 @@ # Define the identity of the package. PACKAGE='mesa' - VERSION='12.0.6' + VERSION='17.0.7' cat >>confdefs.h <<_ACEOF @@ -5382,22 +5393,31 @@ LIBDRM_INTEL_REQUIRED=2.4.61 LIBDRM_NVVIEUX_REQUIRED=2.4.66 LIBDRM_NOUVEAU_REQUIRED=2.4.66 -LIBDRM_FREEDRENO_REQUIRED=2.4.67 +LIBDRM_FREEDRENO_REQUIRED=2.4.74 +LIBDRM_VC4_REQUIRED=2.4.69 +LIBDRM_ETNAVIV_REQUIRED=2.4.74 DRI2PROTO_REQUIRED=2.6 DRI3PROTO_REQUIRED=1.0 PRESENTPROTO_REQUIRED=1.0 -LIBUDEV_REQUIRED=151 GLPROTO_REQUIRED=1.4.14 LIBOMXIL_BELLAGIO_REQUIRED=0.0 LIBVA_REQUIRED=0.38.0 VDPAU_REQUIRED=1.1 -WAYLAND_REQUIRED=1.2.0 +WAYLAND_REQUIRED=1.11 XCB_REQUIRED=1.9.3 XCBDRI2_REQUIRED=1.8 XCBGLX_REQUIRED=1.8.1 XSHMFENCE_REQUIRED=1.1 XVMC_REQUIRED=1.0.6 -PYTHON_MAKO_REQUIRED=0.3.4 +PYTHON_MAKO_REQUIRED=0.8.0 +LIBSENSORS_REQUIRED=4.0.0 + +LLVM_REQUIRED_GALLIUM=3.3.0 +LLVM_REQUIRED_OPENCL=3.6.0 +LLVM_REQUIRED_R600=3.6.0 +LLVM_REQUIRED_RADEONSI=3.6.0 +LLVM_REQUIRED_RADV=3.9.0 +LLVM_REQUIRED_SWR=3.6.0 ac_ext=c ac_cpp='$CPP $CPPFLAGS' @@ -18334,6 +18354,43 @@ fi +# Extract the first word of "xxd", so it can be a program name with args. +set dummy xxd; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_XXD+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$XXD"; then + ac_cv_prog_XXD="$XXD" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_XXD="xxd" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +XXD=$ac_cv_prog_XXD +if test -n "$XXD"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $XXD" >&5 +$as_echo "$XXD" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + for ac_prog in 'bison -y' byacc do @@ -19850,6 +19907,57 @@ + + + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for __attribute__((alias))" >&5 +$as_echo_n "checking for __attribute__((alias))... " >&6; } +if ${ax_cv_have_func_attribute_alias+:} false; then : + $as_echo_n "(cached) " >&6 +else + + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ + + + int foo( void ) { return 0; } + int bar( void ) __attribute__((alias("foo"))); + +int +main () +{ + + ; + return 0; +} + +_ACEOF +if ac_fn_c_try_link "$LINENO"; then : + if test -s conftest.err; then : + ax_cv_have_func_attribute_alias=no +else + ax_cv_have_func_attribute_alias=yes +fi +else + ax_cv_have_func_attribute_alias=no +fi +rm -f core conftest.err conftest.$ac_objext \ + conftest$ac_exeext conftest.$ac_ext + +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ax_cv_have_func_attribute_alias" >&5 +$as_echo "$ax_cv_have_func_attribute_alias" >&6; } + + if test yes = $ax_cv_have_func_attribute_alias; then : + +cat >>confdefs.h <<_ACEOF +#define HAVE_FUNC_ATTRIBUTE_ALIAS 1 +_ACEOF + +fi + + + + if test "x$GEN_ASM_OFFSETS" = xyes; then GEN_ASM_OFFSETS_TRUE= GEN_ASM_OFFSETS_FALSE='#' @@ -19994,15 +20102,12 @@ *-android) android=yes ;; -linux*|*-gnu*|gnu*) +linux*|*-gnu*|gnu*|cygwin*) DEFINES="$DEFINES -D_GNU_SOURCE" ;; solaris*) DEFINES="$DEFINES -DSVR4" ;; -cygwin*) - DEFINES="$DEFINES -D_XOPEN_SOURCE=700" - ;; esac if test "x$android" = xyes; then @@ -20084,16 +20189,9 @@ # Restore CFLAGS; VISIBILITY_CFLAGS are added to it where needed. CFLAGS=$save_CFLAGS - # Work around aliasing bugs - developers should comment this out - CFLAGS="$CFLAGS -fno-strict-aliasing" - # We don't want floating-point math functions to set errno or trap CFLAGS="$CFLAGS -fno-math-errno -fno-trapping-math" - # gcc's builtin memcmp is slower than glibc's - # http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43052 - CFLAGS="$CFLAGS -fno-builtin-memcmp" - # Flags to help ensure that certain portions of the code -- and only those # portions -- can be built with MSVC: # - src/util, src/gallium/auxiliary, rc/gallium/drivers/llvmpipe, and @@ -20177,12 +20275,8 @@ # Restore CXXFLAGS; VISIBILITY_CXXFLAGS are added to it where needed. CXXFLAGS=$save_CXXFLAGS - # Work around aliasing bugs - developers should comment this out - CXXFLAGS="$CXXFLAGS -fno-strict-aliasing" - - # gcc's builtin memcmp is slower than glibc's - # http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43052 - CXXFLAGS="$CXXFLAGS -fno-builtin-memcmp" + # We don't want floating-point math functions to set errno or trap + CXXFLAGS="$CXXFLAGS -fno-math-errno -fno-trapping-math" fi @@ -20236,6 +20330,30 @@ SSE41_CFLAGS=$SSE41_CFLAGS +cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ + +int main() { + int n; + return __atomic_load_n(&n, __ATOMIC_ACQUIRE); +} +_ACEOF +if ac_fn_c_try_compile "$LINENO"; then : + GCC_ATOMIC_BUILTINS_SUPPORTED=1 +fi +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +if test "x$GCC_ATOMIC_BUILTINS_SUPPORTED" = x1; then + DEFINES="$DEFINES -DUSE_GCC_ATOMIC_BUILTINS" +fi + if test x$GCC_ATOMIC_BUILTINS_SUPPORTED = x1; then + GCC_ATOMIC_BUILTINS_SUPPORTED_TRUE= + GCC_ATOMIC_BUILTINS_SUPPORTED_FALSE='#' +else + GCC_ATOMIC_BUILTINS_SUPPORTED_TRUE='#' + GCC_ATOMIC_BUILTINS_SUPPORTED_FALSE= +fi + + { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether byte ordering is bigendian" >&5 $as_echo_n "checking whether byte ordering is bigendian... " >&6; } if ${ac_cv_c_bigendian+:} false; then : @@ -20520,14 +20638,10 @@ case "x$enable_static$enable_shared" in xyesyes) - { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: Cannot build static and shared libraries, disabling shared" >&5 -$as_echo "$as_me: WARNING: Cannot build static and shared libraries, disabling shared" >&2;} - enable_shared=no + as_fn_error $? "Cannot enable both static and shared. Building using --enable-shared is strongly recommended" "$LINENO" 5 ;; xnono) - { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: Cannot disable both static and shared libraries, enabling shared" >&5 -$as_echo "$as_me: WARNING: Cannot disable both static and shared libraries, enabling shared" >&2;} - enable_shared=yes + as_fn_error $? "Cannot disable both static and shared. Building using --enable-shared is strongly recommended" "$LINENO" 5 ;; esac @@ -21511,8 +21625,20 @@ if test "x$ax_pthread_ok" = xno; then as_fn_error $? "Building mesa on this platform requires pthreads" "$LINENO" 5 fi -test -z "$PTHREAD_LIBS" && PTHREAD_LIBS="-lpthread" +if test "x$android" = xno; then + test -z "$PTHREAD_LIBS" && PTHREAD_LIBS="-lpthread" +fi +case "$host_os" in +cygwin* ) + pthread_stubs_possible="no" + ;; +* ) + pthread_stubs_possible="yes" + ;; +esac + +if test "x$pthread_stubs_possible" = xyes; then pkg_failed=no { $as_echo "$as_me:${as_lineno-$LINENO}: checking for PTHREADSTUBS" >&5 @@ -21606,6 +21732,7 @@ fi +fi # Check whether --enable-selinux was given. if test "${enable_selinux+set}" = set; then : @@ -21801,983 +21928,924 @@ -# Check whether --enable-opengl was given. -if test "${enable_opengl+set}" = set; then : - enableval=$enable_opengl; enable_opengl="$enableval" -else - enable_opengl=yes -fi - -# Check whether --enable-gles1 was given. -if test "${enable_gles1+set}" = set; then : - enableval=$enable_gles1; enable_gles1="$enableval" +# Check whether --enable-llvm-shared-libs was given. +if test "${enable_llvm_shared_libs+set}" = set; then : + enableval=$enable_llvm_shared_libs; enable_llvm_shared_libs="$enableval" else - enable_gles1=yes + enable_llvm_shared_libs=yes fi -# Check whether --enable-gles2 was given. -if test "${enable_gles2+set}" = set; then : - enableval=$enable_gles2; enable_gles2="$enableval" -else - enable_gles2=yes -fi -# Check whether --enable-dri was given. -if test "${enable_dri+set}" = set; then : - enableval=$enable_dri; enable_dri="$enableval" +# Check whether --with-llvm-prefix was given. +if test "${with_llvm_prefix+set}" = set; then : + withval=$with_llvm_prefix; llvm_prefix="$withval" else - enable_dri=yes + llvm_prefix='' fi -case "$host_os" in -linux*) - dri3_default=yes - ;; -*) - dri3_default=no - ;; -esac -if test "x$enable_dri" = xno; then - dri3_default=no -fi +pkg_failed=no +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for LIBELF" >&5 +$as_echo_n "checking for LIBELF... " >&6; } -# Check whether --enable-dri3 was given. -if test "${enable_dri3+set}" = set; then : - enableval=$enable_dri3; enable_dri3="$enableval" +if test -n "$LIBELF_CFLAGS"; then + pkg_cv_LIBELF_CFLAGS="$LIBELF_CFLAGS" + elif test -n "$PKG_CONFIG"; then + if test -n "$PKG_CONFIG" && \ + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libelf\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libelf") 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + pkg_cv_LIBELF_CFLAGS=`$PKG_CONFIG --cflags "libelf" 2>/dev/null` + test "x$?" != "x0" && pkg_failed=yes else - enable_dri3="$dri3_default" + pkg_failed=yes fi - -# Check whether --enable-glx was given. -if test "${enable_glx+set}" = set; then : - enableval=$enable_glx; enable_glx="$enableval" + else + pkg_failed=untried +fi +if test -n "$LIBELF_LIBS"; then + pkg_cv_LIBELF_LIBS="$LIBELF_LIBS" + elif test -n "$PKG_CONFIG"; then + if test -n "$PKG_CONFIG" && \ + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libelf\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libelf") 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + pkg_cv_LIBELF_LIBS=`$PKG_CONFIG --libs "libelf" 2>/dev/null` + test "x$?" != "x0" && pkg_failed=yes else - enable_glx=yes + pkg_failed=yes fi - -# Check whether --enable-osmesa was given. -if test "${enable_osmesa+set}" = set; then : - enableval=$enable_osmesa; enable_osmesa="$enableval" -else - enable_osmesa=no + else + pkg_failed=untried fi -# Check whether --enable-gallium-osmesa was given. -if test "${enable_gallium_osmesa+set}" = set; then : - enableval=$enable_gallium_osmesa; enable_gallium_osmesa="$enableval" -else - enable_gallium_osmesa=no -fi -# Check whether --enable-egl was given. -if test "${enable_egl+set}" = set; then : - enableval=$enable_egl; enable_egl="$enableval" -else - enable_egl=yes -fi +if test $pkg_failed = yes; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } -# Check whether --enable-xa was given. -if test "${enable_xa+set}" = set; then : - enableval=$enable_xa; enable_xa="$enableval" +if $PKG_CONFIG --atleast-pkgconfig-version 0.20; then + _pkg_short_errors_supported=yes else - enable_xa=no + _pkg_short_errors_supported=no fi + if test $_pkg_short_errors_supported = yes; then + LIBELF_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "libelf" 2>&1` + else + LIBELF_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "libelf" 2>&1` + fi + # Put the nasty error message in config.log where it belongs + echo "$LIBELF_PKG_ERRORS" >&5 -# Check whether --enable-gbm was given. -if test "${enable_gbm+set}" = set; then : - enableval=$enable_gbm; enable_gbm="$enableval" + have_libelf=no +elif test $pkg_failed = untried; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } + have_libelf=no else - enable_gbm=auto + LIBELF_CFLAGS=$pkg_cv_LIBELF_CFLAGS + LIBELF_LIBS=$pkg_cv_LIBELF_LIBS + { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 +$as_echo "yes" >&6; } + have_libelf=yes fi - -# Check whether --enable-nine was given. -if test "${enable_nine+set}" = set; then : - enableval=$enable_nine; enable_nine="$enableval" +if test "x$have_libelf" = xno; then + LIBELF_LIBS='' + LIBELF_CFLAGS='' + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for elf_memory in -lelf" >&5 +$as_echo_n "checking for elf_memory in -lelf... " >&6; } +if ${ac_cv_lib_elf_elf_memory+:} false; then : + $as_echo_n "(cached) " >&6 else - enable_nine=no -fi - + ac_check_lib_save_LIBS=$LIBS +LIBS="-lelf $LIBS" +cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ -# Check whether --enable-xvmc was given. -if test "${enable_xvmc+set}" = set; then : - enableval=$enable_xvmc; enable_xvmc="$enableval" +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char elf_memory (); +int +main () +{ +return elf_memory (); + ; + return 0; +} +_ACEOF +if ac_fn_c_try_link "$LINENO"; then : + ac_cv_lib_elf_elf_memory=yes else - enable_xvmc=auto + ac_cv_lib_elf_elf_memory=no fi - -# Check whether --enable-vdpau was given. -if test "${enable_vdpau+set}" = set; then : - enableval=$enable_vdpau; enable_vdpau="$enableval" -else - enable_vdpau=auto +rm -f core conftest.err conftest.$ac_objext \ + conftest$ac_exeext conftest.$ac_ext +LIBS=$ac_check_lib_save_LIBS fi - -# Check whether --enable-omx was given. -if test "${enable_omx+set}" = set; then : - enableval=$enable_omx; enable_omx="$enableval" +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_elf_elf_memory" >&5 +$as_echo "$ac_cv_lib_elf_elf_memory" >&6; } +if test "x$ac_cv_lib_elf_elf_memory" = xyes; then : + have_libelf=yes;LIBELF_LIBS=-lelf else - enable_omx=no + have_libelf=no fi -# Check whether --enable-va was given. -if test "${enable_va+set}" = set; then : - enableval=$enable_va; enable_va="$enableval" -else - enable_va=auto -fi -# Check whether --enable-opencl was given. -if test "${enable_opencl+set}" = set; then : - enableval=$enable_opencl; enable_opencl="$enableval" -else - enable_opencl=no -fi -# Check whether --enable-opencl_icd was given. -if test "${enable_opencl_icd+set}" = set; then : - enableval=$enable_opencl_icd; enable_opencl_icd="$enableval" -else - enable_opencl_icd=no fi +if test -z "$LLVM_CONFIG"; then + if test -n "$llvm_prefix"; then + if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}llvm-config", so it can be a program name with args. +set dummy ${ac_tool_prefix}llvm-config; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_path_LLVM_CONFIG+:} false; then : + $as_echo_n "(cached) " >&6 +else + case $LLVM_CONFIG in + [\\/]* | ?:[\\/]*) + ac_cv_path_LLVM_CONFIG="$LLVM_CONFIG" # Let the user override the test with a path. + ;; + *) + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in "$llvm_prefix/bin" +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_path_LLVM_CONFIG="$as_dir/$ac_word$ac_exec_ext" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS -# Check whether --enable-gallium-tests was given. -if test "${enable_gallium_tests+set}" = set; then : - enableval=$enable_gallium_tests; enable_gallium_tests="$enableval" + ;; +esac +fi +LLVM_CONFIG=$ac_cv_path_LLVM_CONFIG +if test -n "$LLVM_CONFIG"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $LLVM_CONFIG" >&5 +$as_echo "$LLVM_CONFIG" >&6; } else - enable_gallium_tests=no + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } fi -# Option for Gallium drivers - -# Keep this in sync with the --with-gallium-drivers help string default value -GALLIUM_DRIVERS_DEFAULT="r300,r600,svga,swrast" - - -# Check whether --with-gallium-drivers was given. -if test "${with_gallium_drivers+set}" = set; then : - withval=$with_gallium_drivers; with_gallium_drivers="$withval" -else - with_gallium_drivers="$GALLIUM_DRIVERS_DEFAULT" fi +if test -z "$ac_cv_path_LLVM_CONFIG"; then + ac_pt_LLVM_CONFIG=$LLVM_CONFIG + # Extract the first word of "llvm-config", so it can be a program name with args. +set dummy llvm-config; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_path_ac_pt_LLVM_CONFIG+:} false; then : + $as_echo_n "(cached) " >&6 +else + case $ac_pt_LLVM_CONFIG in + [\\/]* | ?:[\\/]*) + ac_cv_path_ac_pt_LLVM_CONFIG="$ac_pt_LLVM_CONFIG" # Let the user override the test with a path. + ;; + *) + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in "$llvm_prefix/bin" +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_path_ac_pt_LLVM_CONFIG="$as_dir/$ac_word$ac_exec_ext" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS - -# Doing '--without-gallium-drivers' will set this variable to 'no'. Clear it -# here so that the script doesn't choke on an unknown driver name later. -case "$with_gallium_drivers" in - yes) with_gallium_drivers="$GALLIUM_DRIVERS_DEFAULT" ;; - no) with_gallium_drivers='' ;; + ;; esac - -if test "x$enable_opengl" = xno -a \ - "x$enable_gles1" = xno -a \ - "x$enable_gles2" = xno -a \ - "x$enable_nine" = xno -a \ - "x$enable_xa" = xno -a \ - "x$enable_xvmc" = xno -a \ - "x$enable_vdpau" = xno -a \ - "x$enable_omx" = xno -a \ - "x$enable_va" = xno -a \ - "x$enable_opencl" = xno; then - as_fn_error $? "at least one API should be enabled" "$LINENO" 5 fi - -# Building OpenGL ES1 and/or ES2 without OpenGL is not supported on mesa 9.0.x -if test "x$enable_opengl" = xno -a \ - "x$enable_gles1" = xyes; then - as_fn_error $? "Building OpenGL ES1 without OpenGL is not supported" "$LINENO" 5 +ac_pt_LLVM_CONFIG=$ac_cv_path_ac_pt_LLVM_CONFIG +if test -n "$ac_pt_LLVM_CONFIG"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_pt_LLVM_CONFIG" >&5 +$as_echo "$ac_pt_LLVM_CONFIG" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } fi -if test "x$enable_opengl" = xno -a \ - "x$enable_gles2" = xyes; then - as_fn_error $? "Building OpenGL ES2 without OpenGL is not supported" "$LINENO" 5 + if test "x$ac_pt_LLVM_CONFIG" = x; then + LLVM_CONFIG="no" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 +$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} +ac_tool_warned=yes ;; +esac + LLVM_CONFIG=$ac_pt_LLVM_CONFIG + fi +else + LLVM_CONFIG="$ac_cv_path_LLVM_CONFIG" fi - if test "x$enable_opengl" = xyes; then - HAVE_OPENGL_TRUE= - HAVE_OPENGL_FALSE='#' -else - HAVE_OPENGL_TRUE='#' - HAVE_OPENGL_FALSE= -fi - - if test "x$enable_gles1" = xyes; then - HAVE_OPENGL_ES1_TRUE= - HAVE_OPENGL_ES1_FALSE='#' + else + if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}llvm-config", so it can be a program name with args. +set dummy ${ac_tool_prefix}llvm-config; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_path_LLVM_CONFIG+:} false; then : + $as_echo_n "(cached) " >&6 else - HAVE_OPENGL_ES1_TRUE='#' - HAVE_OPENGL_ES1_FALSE= -fi + case $LLVM_CONFIG in + [\\/]* | ?:[\\/]*) + ac_cv_path_LLVM_CONFIG="$LLVM_CONFIG" # Let the user override the test with a path. + ;; + *) + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_path_LLVM_CONFIG="$as_dir/$ac_word$ac_exec_ext" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS - if test "x$enable_gles2" = xyes; then - HAVE_OPENGL_ES2_TRUE= - HAVE_OPENGL_ES2_FALSE='#' -else - HAVE_OPENGL_ES2_TRUE='#' - HAVE_OPENGL_ES2_FALSE= + ;; +esac fi - - if test "x$enable_opengl" = xyes -o \ - "x$enable_gles1" = xyes -o \ - "x$enable_gles2" = xyes; then - NEED_OPENGL_COMMON_TRUE= - NEED_OPENGL_COMMON_FALSE='#' +LLVM_CONFIG=$ac_cv_path_LLVM_CONFIG +if test -n "$LLVM_CONFIG"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $LLVM_CONFIG" >&5 +$as_echo "$LLVM_CONFIG" >&6; } else - NEED_OPENGL_COMMON_TRUE='#' - NEED_OPENGL_COMMON_FALSE= + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } fi -# Validate GLX options -if test "x$enable_glx" = xyes; then - if test "x$enable_dri" = xyes; then - enable_glx=dri - elif test -n "$with_gallium_drivers"; then - enable_glx=gallium-xlib - else - enable_glx=xlib - fi fi -case "x$enable_glx" in -xdri | xxlib | xgallium-xlib) - # GLX requires OpenGL - if test "x$enable_opengl" = xno; then - as_fn_error $? "GLX cannot be built without OpenGL" "$LINENO" 5 - fi +if test -z "$ac_cv_path_LLVM_CONFIG"; then + ac_pt_LLVM_CONFIG=$LLVM_CONFIG + # Extract the first word of "llvm-config", so it can be a program name with args. +set dummy llvm-config; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_path_ac_pt_LLVM_CONFIG+:} false; then : + $as_echo_n "(cached) " >&6 +else + case $ac_pt_LLVM_CONFIG in + [\\/]* | ?:[\\/]*) + ac_cv_path_ac_pt_LLVM_CONFIG="$ac_pt_LLVM_CONFIG" # Let the user override the test with a path. + ;; + *) + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_path_ac_pt_LLVM_CONFIG="$as_dir/$ac_word$ac_exec_ext" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS - # Check individual dependencies - case "x$enable_glx" in - xdri) - if test "x$enable_dri" = xno; then - as_fn_error $? "DRI-based GLX requires DRI to be enabled" "$LINENO" 5 - fi - ;; - xxlib) - if test "x$enable_dri" = xyes; then - as_fn_error $? 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"LLVM component '$new_llvm_component' not enabled in your LLVM build. Required by $driver_name." "$LINENO" 5 + fi +} - if test "x$enable_libglvnd" = xyes; then - USE_LIBGLVND_GLX_TRUE= - USE_LIBGLVND_GLX_FALSE='#' -else - USE_LIBGLVND_GLX_TRUE='#' - USE_LIBGLVND_GLX_FALSE= -fi +llvm_add_default_components() { + driver_name=$1 -if test "x$enable_libglvnd" = xyes ; then - case "x$enable_glx" in - xno) - as_fn_error $? "cannot build libglvnd without GLX" "$LINENO" 5 - ;; - xxlib | xgallium-xlib ) - as_fn_error $? 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"Package requirements (libglvnd >= 0.1.0) were not met: -$GLVND_PKG_ERRORS + CFLAGS="$save_CFLAGS" -Consider adjusting the PKG_CONFIG_PATH environment variable if you -installed software in a non-standard prefix. + # Only needed for LLVM < 3.6.0 + if test -z "$LLVM_VERSION_PATCH"; then + LLVM_VERSION_PATCH=0 + fi -Alternatively, you may set the environment variables GLVND_CFLAGS -and GLVND_LIBS to avoid the need to call pkg-config. -See the pkg-config man page for more details." "$LINENO" 5 -elif test $pkg_failed = untried; then - { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 -$as_echo "no" >&6; } - { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 -$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} -as_fn_error $? "The pkg-config script could not be found or is too old. Make sure it -is in your PATH or set the PKG_CONFIG environment variable to the full -path to pkg-config. + if test "$LLVM_VERSION_MINOR" -lt 10; then + LLVM_VERSION_INT="${LLVM_VERSION_MAJOR}0${LLVM_VERSION_MINOR}" + else + LLVM_VERSION_INT="${LLVM_VERSION_MAJOR}${LLVM_VERSION_MINOR}" + fi -Alternatively, you may set the environment variables GLVND_CFLAGS -and GLVND_LIBS to avoid the need to call pkg-config. -See the pkg-config man page for more details. + FOUND_LLVM=yes + else + FOUND_LLVM=no + LLVM_VERSION_INT=0 + fi +} -To get pkg-config, see . -See \`config.log' for more details" "$LINENO" 5; } -else - GLVND_CFLAGS=$pkg_cv_GLVND_CFLAGS - GLVND_LIBS=$pkg_cv_GLVND_LIBS - { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -$as_echo "yes" >&6; } +require_llvm() { + if test "x$enable_gallium_llvm" != "xyes"; then + as_fn_error $? "--enable-gallium-llvm is required when building $1" "$LINENO" 5 + fi +} -fi - DEFINES="${DEFINES} -DUSE_LIBGLVND_GLX=1" - DEFAULT_GL_LIB_NAME=GLX_mesa -fi +llvm_require_version() { + require_llvm $2 -# Check for libdrm + llvm_target_version_major=`echo $1 | cut -d. -f1 | egrep -o '^[0-9]+'` + llvm_target_version_minor=`echo $1 | cut -d. -f2 | egrep -o '^[0-9]+'` + llvm_target_version_patch=`echo $1 | cut -d. -f3 | egrep -o '^[0-9]+'` + + if test "$LLVM_VERSION_MAJOR" -gt "$llvm_target_version_major"; then + # major > required major + # --> OK + return + fi + + if test "$LLVM_VERSION_MAJOR" -eq "$llvm_target_version_major"; then + if test "$LLVM_VERSION_MINOR" -gt "$llvm_target_version_minor"; then + # major = required major and + # minor > required minor + # --> OK + return + else + if test "$LLVM_VERSION_MINOR" -eq "$llvm_target_version_minor"; then + if test "$LLVM_VERSION_PATCH" -ge "$llvm_target_version_patch"; then + # major = required major and + # minor = required minor and + # patch >= required patch + # --> OK + return + fi + fi + fi + fi -pkg_failed=no -{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for LIBDRM" >&5 -$as_echo_n "checking for LIBDRM... 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"Illegal value for --with-sha1: $with_sha1" "$LINENO" 5 + dri3_default=no + ;; esac -ac_fn_c_check_func "$LINENO" "SHA1Init" "ac_cv_func_SHA1Init" -if test "x$ac_cv_func_SHA1Init" = xyes; then : - HAVE_SHA1_IN_LIBC=yes +if test "x$enable_dri" = xno; then + dri3_default=no fi -if test "x$with_sha1" = x && test "x$HAVE_SHA1_IN_LIBC" = xyes; then - with_sha1=libc -fi -if test "x$with_sha1" = xlibc && test "x$HAVE_SHA1_IN_LIBC" != xyes; then - as_fn_error $? "sha1 in libc requested but not found" "$LINENO" 5 +# Check whether --enable-dri3 was given. +if test "${enable_dri3+set}" = set; then : + enableval=$enable_dri3; enable_dri3="$enableval" +else + enable_dri3="$dri3_default" fi -if test "x$with_sha1" = xlibc; then -$as_echo "#define HAVE_SHA1_IN_LIBC 1" >>confdefs.h - - SHA1_LIBS="" +# Check whether --enable-glx was given. +if test "${enable_glx+set}" = set; then : + enableval=$enable_glx; enable_glx="$enableval" +else + enable_glx=yes fi -ac_fn_c_check_func "$LINENO" "CC_SHA1_Init" "ac_cv_func_CC_SHA1_Init" -if test "x$ac_cv_func_CC_SHA1_Init" = xyes; then : - HAVE_SHA1_IN_COMMONCRYPTO=yes + +# Check whether --enable-osmesa was given. +if test "${enable_osmesa+set}" = set; then : + enableval=$enable_osmesa; enable_osmesa="$enableval" +else + enable_osmesa=no fi -if test "x$with_sha1" = x && test "x$HAVE_SHA1_IN_COMMONCRYPTO" = xyes; then - with_sha1=CommonCrypto +# Check whether --enable-gallium-osmesa was given. +if test "${enable_gallium_osmesa+set}" = set; then : + enableval=$enable_gallium_osmesa; enable_gallium_osmesa="$enableval" +else + enable_gallium_osmesa=no fi -if test "x$with_sha1" = xCommonCrypto && test "x$HAVE_SHA1_IN_COMMONCRYPTO" != xyes; then - as_fn_error $? "CommonCrypto requested but not found" "$LINENO" 5 + +# Check whether --enable-egl was given. +if test "${enable_egl+set}" = set; then : + enableval=$enable_egl; enable_egl="$enableval" +else + enable_egl=yes fi -if test "x$with_sha1" = xCommonCrypto; then -$as_echo "#define HAVE_SHA1_IN_COMMONCRYPTO 1" >>confdefs.h - SHA1_LIBS="" -fi -ac_fn_c_check_header_compile "$LINENO" "wincrypt.h" "ac_cv_header_wincrypt_h" "#include -" -if test "x$ac_cv_header_wincrypt_h" = xyes; then : - HAVE_SHA1_IN_CRYPTOAPI=yes +# Check whether --enable-xa was given. +if test "${enable_xa+set}" = set; then : + enableval=$enable_xa; enable_xa="$enableval" +else + enable_xa=no fi - -if test "x$with_sha1" = x && test "x$HAVE_SHA1_IN_CRYPTOAPI" = xyes; then - with_sha1=CryptoAPI +# Check whether --enable-gbm was given. +if test "${enable_gbm+set}" = set; then : + enableval=$enable_gbm; enable_gbm="$enableval" +else + case "$host_os" in + cygwin*) + enable_gbm=no + ;; + *) + enable_gbm=yes + ;; + esac fi -if test "x$with_sha1" = xCryptoAPI && test "x$HAVE_SHA1_IN_CRYPTOAPI" != xyes; then - as_fn_error $? "CryptoAPI requested but not found" "$LINENO" 5 + +# Check whether --enable-nine was given. +if test "${enable_nine+set}" = set; then : + enableval=$enable_nine; enable_nine="$enableval" +else + enable_nine=no fi -if test "x$with_sha1" = xCryptoAPI; then -$as_echo "#define HAVE_SHA1_IN_CRYPTOAPI 1" >>confdefs.h - SHA1_LIBS="" -fi -{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for SHA1Init in -lmd" >&5 -$as_echo_n "checking for SHA1Init in -lmd... " >&6; } -if ${ac_cv_lib_md_SHA1Init+:} false; then : - $as_echo_n "(cached) " >&6 +# Check whether --enable-xvmc was given. +if test "${enable_xvmc+set}" = set; then : + enableval=$enable_xvmc; enable_xvmc="$enableval" else - ac_check_lib_save_LIBS=$LIBS -LIBS="-lmd $LIBS" -cat confdefs.h - <<_ACEOF >conftest.$ac_ext -/* end confdefs.h. */ + enable_xvmc=auto +fi -/* Override any GCC internal prototype to avoid an error. - Use char because int might match the return type of a GCC - builtin and then its argument prototype would still apply. */ -#ifdef __cplusplus -extern "C" -#endif -char SHA1Init (); -int -main () -{ -return SHA1Init (); - ; - return 0; -} -_ACEOF -if ac_fn_c_try_link "$LINENO"; then : - ac_cv_lib_md_SHA1Init=yes +# Check whether --enable-vdpau was given. +if test "${enable_vdpau+set}" = set; then : + enableval=$enable_vdpau; enable_vdpau="$enableval" else - ac_cv_lib_md_SHA1Init=no -fi -rm -f core conftest.err conftest.$ac_objext \ - conftest$ac_exeext conftest.$ac_ext -LIBS=$ac_check_lib_save_LIBS -fi -{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_md_SHA1Init" >&5 -$as_echo "$ac_cv_lib_md_SHA1Init" >&6; } -if test "x$ac_cv_lib_md_SHA1Init" = xyes; then : - HAVE_LIBMD=yes + enable_vdpau=auto fi -if test "x$with_sha1" = x && test "x$HAVE_LIBMD" = xyes; then - with_sha1=libmd -fi -if test "x$with_sha1" = xlibmd && test "x$HAVE_LIBMD" != xyes; then - as_fn_error $? "libmd requested but not found" "$LINENO" 5 +# Check whether --enable-omx was given. +if test "${enable_omx+set}" = set; then : + enableval=$enable_omx; enable_omx="$enableval" +else + enable_omx=no fi -if test "x$with_sha1" = xlibmd; then - -$as_echo "#define HAVE_SHA1_IN_LIBMD 1" >>confdefs.h - SHA1_LIBS=-lmd +# Check whether --enable-va was given. +if test "${enable_va+set}" = set; then : + enableval=$enable_va; enable_va="$enableval" +else + enable_va=auto fi -pkg_failed=no -{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for LIBSHA1" >&5 -$as_echo_n "checking for LIBSHA1... " >&6; } - -if test -n "$LIBSHA1_CFLAGS"; then - pkg_cv_LIBSHA1_CFLAGS="$LIBSHA1_CFLAGS" - elif test -n "$PKG_CONFIG"; then - if test -n "$PKG_CONFIG" && \ - { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libsha1\""; } >&5 - ($PKG_CONFIG --exists --print-errors "libsha1") 2>&5 - ac_status=$? - $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 - test $ac_status = 0; }; then - pkg_cv_LIBSHA1_CFLAGS=`$PKG_CONFIG --cflags "libsha1" 2>/dev/null` - test "x$?" != "x0" && pkg_failed=yes +# Check whether --enable-opencl was given. +if test "${enable_opencl+set}" = set; then : + enableval=$enable_opencl; enable_opencl="$enableval" else - pkg_failed=yes -fi - else - pkg_failed=untried + enable_opencl=no fi -if test -n "$LIBSHA1_LIBS"; then - pkg_cv_LIBSHA1_LIBS="$LIBSHA1_LIBS" - elif test -n "$PKG_CONFIG"; then - if test -n "$PKG_CONFIG" && \ - { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libsha1\""; } >&5 - ($PKG_CONFIG --exists --print-errors "libsha1") 2>&5 - ac_status=$? - $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 - test $ac_status = 0; }; then - pkg_cv_LIBSHA1_LIBS=`$PKG_CONFIG --libs "libsha1" 2>/dev/null` - test "x$?" != "x0" && pkg_failed=yes + +# Check whether --enable-opencl_icd was given. +if test "${enable_opencl_icd+set}" = set; then : + enableval=$enable_opencl_icd; enable_opencl_icd="$enableval" else - pkg_failed=yes + enable_opencl_icd=no fi - else - pkg_failed=untried + + +# Check whether --enable-gallium-tests was given. +if test "${enable_gallium_tests+set}" = set; then : + enableval=$enable_gallium_tests; enable_gallium_tests="$enableval" +else + enable_gallium_tests=no fi +# Option for Gallium drivers -if test $pkg_failed = yes; then - { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 -$as_echo "no" >&6; } +# Keep this in sync with the --with-gallium-drivers help string default value +GALLIUM_DRIVERS_DEFAULT="r300,r600,svga,swrast" -if $PKG_CONFIG --atleast-pkgconfig-version 0.20; then - _pkg_short_errors_supported=yes -else - _pkg_short_errors_supported=no -fi - if test $_pkg_short_errors_supported = yes; then - LIBSHA1_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "libsha1" 2>&1` - else - LIBSHA1_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "libsha1" 2>&1` - fi - # Put the nasty error message in config.log where it belongs - echo "$LIBSHA1_PKG_ERRORS" >&5 - HAVE_LIBSHA1=no -elif test $pkg_failed = untried; then - { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 -$as_echo "no" >&6; } - HAVE_LIBSHA1=no +# Check whether --with-gallium-drivers was given. +if test "${with_gallium_drivers+set}" = set; then : + withval=$with_gallium_drivers; with_gallium_drivers="$withval" else - LIBSHA1_CFLAGS=$pkg_cv_LIBSHA1_CFLAGS - LIBSHA1_LIBS=$pkg_cv_LIBSHA1_LIBS - { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -$as_echo "yes" >&6; } - HAVE_LIBSHA1=yes -fi -if test "x$with_sha1" = x && test "x$HAVE_LIBSHA1" = xyes; then - with_sha1=libsha1 + with_gallium_drivers="$GALLIUM_DRIVERS_DEFAULT" fi -if test "x$with_sha1" = xlibsha1 && test "x$HAVE_LIBSHA1" != xyes; then - as_fn_error $? "libsha1 requested but not found" "$LINENO" 5 + + +# Doing '--without-gallium-drivers' will set this variable to 'no'. Clear it +# here so that the script doesn't choke on an unknown driver name later. +case "$with_gallium_drivers" in + yes) with_gallium_drivers="$GALLIUM_DRIVERS_DEFAULT" ;; + no) with_gallium_drivers='' ;; +esac + +if test "x$enable_opengl" = xno -a \ + "x$enable_gles1" = xno -a \ + "x$enable_gles2" = xno -a \ + "x$enable_nine" = xno -a \ + "x$enable_xa" = xno -a \ + "x$enable_xvmc" = xno -a \ + "x$enable_vdpau" = xno -a \ + "x$enable_omx" = xno -a \ + "x$enable_va" = xno -a \ + "x$enable_opencl" = xno; then + as_fn_error $? "at least one API should be enabled" "$LINENO" 5 fi -if test "x$with_sha1" = xlibsha1; then -$as_echo "#define HAVE_SHA1_IN_LIBSHA1 1" >>confdefs.h +# Building OpenGL ES1 and/or ES2 without OpenGL is not supported on mesa 9.0.x +if test "x$enable_opengl" = xno -a \ + "x$enable_gles1" = xyes; then + as_fn_error $? "Building OpenGL ES1 without OpenGL is not supported" "$LINENO" 5 +fi - SHA1_LIBS=-lsha1 +if test "x$enable_opengl" = xno -a \ + "x$enable_gles2" = xyes; then + as_fn_error $? "Building OpenGL ES2 without OpenGL is not supported" "$LINENO" 5 fi -{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for nettle_sha1_init in -lnettle" >&5 -$as_echo_n "checking for nettle_sha1_init in -lnettle... " >&6; } -if ${ac_cv_lib_nettle_nettle_sha1_init+:} false; then : - $as_echo_n "(cached) " >&6 -else - ac_check_lib_save_LIBS=$LIBS -LIBS="-lnettle $LIBS" -cat confdefs.h - <<_ACEOF >conftest.$ac_ext -/* end confdefs.h. */ -/* Override any GCC internal prototype to avoid an error. - Use char because int might match the return type of a GCC - builtin and then its argument prototype would still apply. */ -#ifdef __cplusplus -extern "C" -#endif -char nettle_sha1_init (); -int -main () -{ -return nettle_sha1_init (); - ; - return 0; -} -_ACEOF -if ac_fn_c_try_link "$LINENO"; then : - ac_cv_lib_nettle_nettle_sha1_init=yes + if test "x$enable_opengl" = xyes; then + HAVE_OPENGL_TRUE= + HAVE_OPENGL_FALSE='#' else - ac_cv_lib_nettle_nettle_sha1_init=no -fi -rm -f core conftest.err conftest.$ac_objext \ - conftest$ac_exeext conftest.$ac_ext -LIBS=$ac_check_lib_save_LIBS + HAVE_OPENGL_TRUE='#' + HAVE_OPENGL_FALSE= fi -{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_nettle_nettle_sha1_init" >&5 -$as_echo "$ac_cv_lib_nettle_nettle_sha1_init" >&6; } -if test "x$ac_cv_lib_nettle_nettle_sha1_init" = xyes; then : - HAVE_LIBNETTLE=yes + + if test "x$enable_gles1" = xyes; then + HAVE_OPENGL_ES1_TRUE= + HAVE_OPENGL_ES1_FALSE='#' +else + HAVE_OPENGL_ES1_TRUE='#' + HAVE_OPENGL_ES1_FALSE= fi -if test "x$with_sha1" = x && test "x$HAVE_LIBNETTLE" = xyes; then - with_sha1=libnettle + if test "x$enable_gles2" = xyes; then + HAVE_OPENGL_ES2_TRUE= + HAVE_OPENGL_ES2_FALSE='#' +else + HAVE_OPENGL_ES2_TRUE='#' + HAVE_OPENGL_ES2_FALSE= fi -if test "x$with_sha1" = xlibnettle && test "x$HAVE_LIBNETTLE" != xyes; then - as_fn_error $? "libnettle requested but not found" "$LINENO" 5 + + if test "x$enable_opengl" = xyes -o \ + "x$enable_gles1" = xyes -o \ + "x$enable_gles2" = xyes; then + NEED_OPENGL_COMMON_TRUE= + NEED_OPENGL_COMMON_FALSE='#' +else + NEED_OPENGL_COMMON_TRUE='#' + NEED_OPENGL_COMMON_FALSE= fi -if test "x$with_sha1" = xlibnettle; then -$as_echo "#define HAVE_SHA1_IN_LIBNETTLE 1" >>confdefs.h - SHA1_LIBS=-lnettle +# Validate GLX options +if test "x$enable_glx" = xyes; then + if test "x$enable_dri" = xyes; then + enable_glx=dri + elif test -n "$with_gallium_drivers"; then + enable_glx=gallium-xlib + else + enable_glx=xlib + fi fi -{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for gcry_md_open in -lgcrypt" >&5 -$as_echo_n "checking for gcry_md_open in -lgcrypt... " >&6; } -if ${ac_cv_lib_gcrypt_gcry_md_open+:} false; then : - $as_echo_n "(cached) " >&6 -else - ac_check_lib_save_LIBS=$LIBS -LIBS="-lgcrypt $LIBS" -cat confdefs.h - <<_ACEOF >conftest.$ac_ext -/* end confdefs.h. */ +case "x$enable_glx" in +xdri | xxlib | xgallium-xlib) + # GLX requires OpenGL + if test "x$enable_opengl" = xno; then + as_fn_error $? "GLX cannot be built without OpenGL" "$LINENO" 5 + fi -/* Override any GCC internal prototype to avoid an error. - Use char because int might match the return type of a GCC - builtin and then its argument prototype would still apply. */ -#ifdef __cplusplus -extern "C" -#endif -char gcry_md_open (); -int -main () -{ -return gcry_md_open (); - ; - return 0; -} -_ACEOF -if ac_fn_c_try_link "$LINENO"; then : - ac_cv_lib_gcrypt_gcry_md_open=yes + # Check individual dependencies + case "x$enable_glx" in + xdri) + if test "x$enable_dri" = xno; then + as_fn_error $? "DRI-based GLX requires DRI to be enabled" "$LINENO" 5 + fi + ;; + xxlib) + if test "x$enable_dri" = xyes; then + as_fn_error $? "Xlib-based GLX cannot be built with DRI enabled" "$LINENO" 5 + fi + ;; + xgallium-xlib ) + if test "x$enable_dri" = xyes; then + as_fn_error $? "Xlib-based (Gallium) GLX cannot be built with DRI enabled" "$LINENO" 5 + fi + if test -z "$with_gallium_drivers"; then + as_fn_error $? "Xlib-based (Gallium) GLX cannot be built without Gallium enabled" "$LINENO" 5 + fi + ;; + esac + ;; +xno) + ;; +*) + as_fn_error $? "Illegal value for --enable-glx: $enable_glx" "$LINENO" 5 + ;; +esac + + if test "x$enable_glx" != xno; then + HAVE_GLX_TRUE= + HAVE_GLX_FALSE='#' else - ac_cv_lib_gcrypt_gcry_md_open=no -fi -rm -f core conftest.err conftest.$ac_objext \ - conftest$ac_exeext conftest.$ac_ext -LIBS=$ac_check_lib_save_LIBS + HAVE_GLX_TRUE='#' + HAVE_GLX_FALSE= fi -{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_gcrypt_gcry_md_open" >&5 -$as_echo "$ac_cv_lib_gcrypt_gcry_md_open" >&6; } -if test "x$ac_cv_lib_gcrypt_gcry_md_open" = xyes; then : - HAVE_LIBGCRYPT=yes + + if test "x$enable_glx" = xdri; then + HAVE_DRI_GLX_TRUE= + HAVE_DRI_GLX_FALSE='#' +else + HAVE_DRI_GLX_TRUE='#' + HAVE_DRI_GLX_FALSE= fi -if test "x$with_sha1" = x && test "x$HAVE_LIBGCRYPT" = xyes; then - with_sha1=libgcrypt + if test "x$enable_glx" = xxlib; then + HAVE_XLIB_GLX_TRUE= + HAVE_XLIB_GLX_FALSE='#' +else + HAVE_XLIB_GLX_TRUE='#' + HAVE_XLIB_GLX_FALSE= fi -if test "x$with_sha1" = xlibgcrypt && test "x$HAVE_LIBGCRYPT" != xyes; then - as_fn_error $? "libgcrypt requested but not found" "$LINENO" 5 + + if test "x$enable_glx" = xgallium-xlib; then + HAVE_GALLIUM_XLIB_GLX_TRUE= + HAVE_GALLIUM_XLIB_GLX_FALSE='#' +else + HAVE_GALLIUM_XLIB_GLX_TRUE='#' + HAVE_GALLIUM_XLIB_GLX_FALSE= fi -if test "x$with_sha1" = xlibgcrypt; then -$as_echo "#define HAVE_SHA1_IN_LIBGCRYPT 1" >>confdefs.h - SHA1_LIBS=-lgcrypt -fi -# We don't need all of the OpenSSL libraries, just libcrypto -{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for SHA1_Init in -lcrypto" >&5 -$as_echo_n "checking for SHA1_Init in -lcrypto... " >&6; } -if ${ac_cv_lib_crypto_SHA1_Init+:} false; then : - $as_echo_n "(cached) " >&6 +# Check whether --enable-libglvnd was given. +if test "${enable_libglvnd+set}" = set; then : + enableval=$enable_libglvnd; enable_libglvnd="$enableval" else - ac_check_lib_save_LIBS=$LIBS -LIBS="-lcrypto $LIBS" -cat confdefs.h - <<_ACEOF >conftest.$ac_ext -/* end confdefs.h. */ + enable_libglvnd=no +fi -/* Override any GCC internal prototype to avoid an error. - Use char because int might match the return type of a GCC - builtin and then its argument prototype would still apply. */ -#ifdef __cplusplus -extern "C" -#endif -char SHA1_Init (); -int -main () -{ -return SHA1_Init (); - ; - return 0; -} -_ACEOF -if ac_fn_c_try_link "$LINENO"; then : - ac_cv_lib_crypto_SHA1_Init=yes + if test "x$enable_libglvnd" = xyes; then + USE_LIBGLVND_GLX_TRUE= + USE_LIBGLVND_GLX_FALSE='#' else - ac_cv_lib_crypto_SHA1_Init=no -fi -rm -f core conftest.err conftest.$ac_objext \ - conftest$ac_exeext conftest.$ac_ext -LIBS=$ac_check_lib_save_LIBS -fi -{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_crypto_SHA1_Init" >&5 -$as_echo "$ac_cv_lib_crypto_SHA1_Init" >&6; } -if test "x$ac_cv_lib_crypto_SHA1_Init" = xyes; then : - HAVE_LIBCRYPTO=yes + USE_LIBGLVND_GLX_TRUE='#' + USE_LIBGLVND_GLX_FALSE= fi +if test "x$enable_libglvnd" = xyes ; then + case "x$enable_glx" in + xno) + as_fn_error $? "cannot build libglvnd without GLX" "$LINENO" 5 + ;; + xxlib | xgallium-xlib ) + as_fn_error $? "cannot build libgvnd when Xlib-GLX or Gallium-Xlib-GLX is enabled" "$LINENO" 5 + ;; + xdri) + ;; + esac + pkg_failed=no -{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for OPENSSL" >&5 -$as_echo_n "checking for OPENSSL... " >&6; } +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for GLVND" >&5 +$as_echo_n "checking for GLVND... " >&6; } -if test -n "$OPENSSL_CFLAGS"; then - pkg_cv_OPENSSL_CFLAGS="$OPENSSL_CFLAGS" +if test -n "$GLVND_CFLAGS"; then + pkg_cv_GLVND_CFLAGS="$GLVND_CFLAGS" elif test -n "$PKG_CONFIG"; then if test -n "$PKG_CONFIG" && \ - { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"openssl\""; } >&5 - ($PKG_CONFIG --exists --print-errors "openssl") 2>&5 + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libglvnd >= 0.1.0\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libglvnd >= 0.1.0") 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then - pkg_cv_OPENSSL_CFLAGS=`$PKG_CONFIG --cflags "openssl" 2>/dev/null` + pkg_cv_GLVND_CFLAGS=`$PKG_CONFIG --cflags "libglvnd >= 0.1.0" 2>/dev/null` test "x$?" != "x0" && pkg_failed=yes else pkg_failed=yes @@ -22785,16 +22853,16 @@ else pkg_failed=untried fi -if test -n "$OPENSSL_LIBS"; then - pkg_cv_OPENSSL_LIBS="$OPENSSL_LIBS" +if test -n "$GLVND_LIBS"; then + pkg_cv_GLVND_LIBS="$GLVND_LIBS" elif test -n "$PKG_CONFIG"; then if test -n "$PKG_CONFIG" && \ - { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"openssl\""; } >&5 - ($PKG_CONFIG --exists --print-errors "openssl") 2>&5 + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libglvnd >= 0.1.0\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libglvnd >= 0.1.0") 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then - pkg_cv_OPENSSL_LIBS=`$PKG_CONFIG --libs "openssl" 2>/dev/null` + pkg_cv_GLVND_LIBS=`$PKG_CONFIG --libs "libglvnd >= 0.1.0" 2>/dev/null` test "x$?" != "x0" && pkg_failed=yes else pkg_failed=yes @@ -22815,102 +22883,65 @@ _pkg_short_errors_supported=no fi if test $_pkg_short_errors_supported = yes; then - OPENSSL_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "openssl" 2>&1` + GLVND_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "libglvnd >= 0.1.0" 2>&1` else - OPENSSL_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "openssl" 2>&1` + GLVND_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "libglvnd >= 0.1.0" 2>&1` fi # Put the nasty error message in config.log where it belongs - echo "$OPENSSL_PKG_ERRORS" >&5 + echo "$GLVND_PKG_ERRORS" >&5 + + as_fn_error $? "Package requirements (libglvnd >= 0.1.0) were not met: + +$GLVND_PKG_ERRORS + +Consider adjusting the PKG_CONFIG_PATH environment variable if you +installed software in a non-standard prefix. - HAVE_OPENSSL_PKC=no +Alternatively, you may set the environment variables GLVND_CFLAGS +and GLVND_LIBS to avoid the need to call pkg-config. +See the pkg-config man page for more details." "$LINENO" 5 elif test $pkg_failed = untried; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } - HAVE_OPENSSL_PKC=no -else - OPENSSL_CFLAGS=$pkg_cv_OPENSSL_CFLAGS - OPENSSL_LIBS=$pkg_cv_OPENSSL_LIBS - { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -$as_echo "yes" >&6; } - HAVE_OPENSSL_PKC=yes -fi -if test "x$HAVE_LIBCRYPTO" = xyes || test "x$HAVE_OPENSSL_PKC" = xyes; then - if test "x$with_sha1" = x; then - with_sha1=libcrypto - fi -else - if test "x$with_sha1" = xlibcrypto; then - as_fn_error $? "OpenSSL libcrypto requested but not found" "$LINENO" 5 - fi -fi -if test "x$with_sha1" = xlibcrypto; then - if test "x$HAVE_LIBCRYPTO" = xyes; then - SHA1_LIBS=-lcrypto - else - SHA1_LIBS="$OPENSSL_LIBS" - SHA1_CFLAGS="$OPENSSL_CFLAGS" - fi -fi -{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for SHA1 implementation" >&5 -$as_echo_n "checking for SHA1 implementation... " >&6; } -{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_sha1" >&5 -$as_echo "$with_sha1" >&6; } - - + { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 +$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} +as_fn_error $? "The pkg-config script could not be found or is too old. Make sure it +is in your PATH or set the PKG_CONFIG environment variable to the full +path to pkg-config. -# Enable a define for SHA1 -if test "x$with_sha1" != "x"; then - DEFINES="$DEFINES -DHAVE_SHA1" -fi +Alternatively, you may set the environment variables GLVND_CFLAGS +and GLVND_LIBS to avoid the need to call pkg-config. +See the pkg-config man page for more details. -# Allow user to configure out the shader-cache feature -# Check whether --enable-shader-cache was given. -if test "${enable_shader_cache+set}" = set; then : - enableval=$enable_shader_cache; enable_shader_cache="$enableval" +To get pkg-config, see . +See \`config.log' for more details" "$LINENO" 5; } else - if test "x$with_sha1" != "x"; then - enable_shader_cache=yes - else - enable_shader_cache=no - fi -fi + GLVND_CFLAGS=$pkg_cv_GLVND_CFLAGS + GLVND_LIBS=$pkg_cv_GLVND_LIBS + { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 +$as_echo "yes" >&6; } -if test "x$with_sha1" = "x"; then - if test "x$enable_shader_cache" = "xyes"; then - as_fn_error $? "Cannot enable shader cache (no SHA-1 implementation found)" "$LINENO" 5 - fi fi - if test x$enable_shader_cache = xyes; then - ENABLE_SHADER_CACHE_TRUE= - ENABLE_SHADER_CACHE_FALSE='#' -else - ENABLE_SHADER_CACHE_TRUE='#' - ENABLE_SHADER_CACHE_FALSE= + DEFINES="${DEFINES} -DUSE_LIBGLVND_GLX=1" + DEFAULT_GL_LIB_NAME=GLX_mesa fi - -case "$host_os" in -linux*) - need_pci_id=yes ;; -*) - need_pci_id=no ;; -esac - +# Check for libdrm pkg_failed=no -{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for LIBUDEV" >&5 -$as_echo_n "checking for LIBUDEV... " >&6; } +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for LIBDRM" >&5 +$as_echo_n "checking for LIBDRM... " >&6; } -if test -n "$LIBUDEV_CFLAGS"; then - pkg_cv_LIBUDEV_CFLAGS="$LIBUDEV_CFLAGS" +if test -n "$LIBDRM_CFLAGS"; then + pkg_cv_LIBDRM_CFLAGS="$LIBDRM_CFLAGS" elif test -n "$PKG_CONFIG"; then if test -n "$PKG_CONFIG" && \ - { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libudev >= \$LIBUDEV_REQUIRED\""; } >&5 - ($PKG_CONFIG --exists --print-errors "libudev >= $LIBUDEV_REQUIRED") 2>&5 + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libdrm >= \$LIBDRM_REQUIRED\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libdrm >= $LIBDRM_REQUIRED") 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then - pkg_cv_LIBUDEV_CFLAGS=`$PKG_CONFIG --cflags "libudev >= $LIBUDEV_REQUIRED" 2>/dev/null` + pkg_cv_LIBDRM_CFLAGS=`$PKG_CONFIG --cflags "libdrm >= $LIBDRM_REQUIRED" 2>/dev/null` test "x$?" != "x0" && pkg_failed=yes else pkg_failed=yes @@ -22918,16 +22949,16 @@ else pkg_failed=untried fi -if test -n "$LIBUDEV_LIBS"; then - pkg_cv_LIBUDEV_LIBS="$LIBUDEV_LIBS" +if test -n "$LIBDRM_LIBS"; then + pkg_cv_LIBDRM_LIBS="$LIBDRM_LIBS" elif test -n "$PKG_CONFIG"; then if test -n "$PKG_CONFIG" && \ - { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libudev >= \$LIBUDEV_REQUIRED\""; } >&5 - ($PKG_CONFIG --exists --print-errors "libudev >= $LIBUDEV_REQUIRED") 2>&5 + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libdrm >= \$LIBDRM_REQUIRED\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libdrm >= $LIBDRM_REQUIRED") 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then - pkg_cv_LIBUDEV_LIBS=`$PKG_CONFIG --libs "libudev >= $LIBUDEV_REQUIRED" 2>/dev/null` + pkg_cv_LIBDRM_LIBS=`$PKG_CONFIG --libs "libdrm >= $LIBDRM_REQUIRED" 2>/dev/null` test "x$?" != "x0" && pkg_failed=yes else pkg_failed=yes @@ -22948,40 +22979,185 @@ _pkg_short_errors_supported=no fi if test $_pkg_short_errors_supported = yes; then - LIBUDEV_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "libudev >= $LIBUDEV_REQUIRED" 2>&1` + LIBDRM_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "libdrm >= $LIBDRM_REQUIRED" 2>&1` else - LIBUDEV_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "libudev >= $LIBUDEV_REQUIRED" 2>&1` + LIBDRM_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "libdrm >= $LIBDRM_REQUIRED" 2>&1` fi # Put the nasty error message in config.log where it belongs - echo "$LIBUDEV_PKG_ERRORS" >&5 + echo "$LIBDRM_PKG_ERRORS" >&5 - have_libudev=no + have_libdrm=no elif test $pkg_failed = untried; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } - have_libudev=no + have_libdrm=no else - LIBUDEV_CFLAGS=$pkg_cv_LIBUDEV_CFLAGS - LIBUDEV_LIBS=$pkg_cv_LIBUDEV_LIBS + LIBDRM_CFLAGS=$pkg_cv_LIBDRM_CFLAGS + LIBDRM_LIBS=$pkg_cv_LIBDRM_LIBS { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 $as_echo "yes" >&6; } - have_libudev=yes + have_libdrm=yes +fi +if test "x$have_libdrm" = xyes; then + DEFINES="$DEFINES -DHAVE_LIBDRM" +fi + +require_libdrm() { + if test "x$have_libdrm" != xyes; then + as_fn_error $? "$1 requires libdrm >= $LIBDRM_REQUIRED" "$LINENO" 5 + fi +} + + +# Select which platform-dependent DRI code gets built +case "$host_os" in +darwin*) + dri_platform='apple' ;; +cygwin*) + dri_platform='windows' ;; +gnu*) + dri_platform='none' ;; +*) + dri_platform='drm' ;; +esac + +if test "x$enable_dri" = xyes -a "x$dri_platform" = xdrm -a "x$have_libdrm" = xyes; then + have_drisw_kms='yes' +fi + + if test "x$enable_dri" = xyes ; then + HAVE_DRICOMMON_TRUE= + HAVE_DRICOMMON_FALSE='#' +else + HAVE_DRICOMMON_TRUE='#' + HAVE_DRICOMMON_FALSE= +fi + + if test "x$enable_dri" = xyes ; then + HAVE_DRISW_TRUE= + HAVE_DRISW_FALSE='#' +else + HAVE_DRISW_TRUE='#' + HAVE_DRISW_FALSE= fi -# Check whether --enable-sysfs was given. -if test "${enable_sysfs+set}" = set; then : - enableval=$enable_sysfs; have_sysfs="$enableval" + if test "x$have_drisw_kms" = xyes ; then + HAVE_DRISW_KMS_TRUE= + HAVE_DRISW_KMS_FALSE='#' else - have_sysfs=no + HAVE_DRISW_KMS_TRUE='#' + HAVE_DRISW_KMS_FALSE= +fi + if test "x$enable_dri" = xyes -a "x$dri_platform" = xdrm -a "x$have_libdrm" = xyes ; then + HAVE_DRI2_TRUE= + HAVE_DRI2_FALSE='#' +else + HAVE_DRI2_TRUE='#' + HAVE_DRI2_FALSE= fi + if test "x$enable_dri3" = xyes -a "x$dri_platform" = xdrm -a "x$have_libdrm" = xyes ; then + HAVE_DRI3_TRUE= + HAVE_DRI3_FALSE='#' +else + HAVE_DRI3_TRUE='#' + HAVE_DRI3_FALSE= +fi -if test "x$enable_dri" = xyes; then - if test "$enable_static" = yes; then - as_fn_error $? "Cannot use static libraries for DRI drivers" "$LINENO" 5 + if test "x$enable_dri" = xyes -a "x$dri_platform" = xapple ; then + HAVE_APPLEDRI_TRUE= + HAVE_APPLEDRI_FALSE='#' +else + HAVE_APPLEDRI_TRUE='#' + HAVE_APPLEDRI_FALSE= +fi + + if test "x$enable_lmsensors" = xyes ; then + HAVE_LMSENSORS_TRUE= + HAVE_LMSENSORS_FALSE='#' +else + HAVE_LMSENSORS_TRUE='#' + HAVE_LMSENSORS_FALSE= +fi + + if test "x$enable_gallium_extra_hud" = xyes ; then + HAVE_GALLIUM_EXTRA_HUD_TRUE= + HAVE_GALLIUM_EXTRA_HUD_FALSE='#' +else + HAVE_GALLIUM_EXTRA_HUD_TRUE='#' + HAVE_GALLIUM_EXTRA_HUD_FALSE= +fi + + if test "x$enable_dri" = xyes -a "x$dri_platform" = xwindows ; then + HAVE_WINDOWSDRI_TRUE= + HAVE_WINDOWSDRI_FALSE='#' +else + HAVE_WINDOWSDRI_TRUE='#' + HAVE_WINDOWSDRI_FALSE= +fi + + +# Check whether --enable-shared-glapi was given. +if test "${enable_shared_glapi+set}" = set; then : + enableval=$enable_shared_glapi; enable_shared_glapi="$enableval" +else + enable_shared_glapi=yes +fi + + +case "x$enable_opengl$enable_gles1$enable_gles2" in +x*yes*yes*) + if test "x$enable_shared_glapi" = xno; then + as_fn_error $? "shared GLAPI required when building two or more of + the following APIs - opengl, gles1 gles2" "$LINENO" 5 + fi + ;; +esac + + if test "x$enable_shared_glapi" = xyes; then + HAVE_SHARED_GLAPI_TRUE= + HAVE_SHARED_GLAPI_FALSE='#' +else + HAVE_SHARED_GLAPI_TRUE='#' + HAVE_SHARED_GLAPI_FALSE= +fi + + +# Build the pipe-drivers as separate libraries/modules. +# Do not touch this unless you know what you are doing. +# XXX: Expose via configure option ? +enable_shared_pipe_drivers=no + + +if test "x$enable_gallium_osmesa" = xyes; then + if ! echo "$with_gallium_drivers" | grep -q 'swrast'; then + as_fn_error $? "gallium_osmesa requires the gallium swrast driver" "$LINENO" 5 + fi + if test "x$enable_osmesa" = xyes; then + as_fn_error $? "Cannot enable both classic and Gallium OSMesa implementations" "$LINENO" 5 + fi +fi + +require_dri_shared_libs_and_glapi() { + if test "x$enable_static" = xyes; then + as_fn_error $? "$1 cannot be build as static library" "$LINENO" 5 fi + if test "x$enable_dri" != xyes; then + # There is only a single backend which won't be build/used otherwise. + # XXX: Revisit this as the egl/haiku is a thing. + as_fn_error $? "$1 requires --enable-dri" "$LINENO" 5 + fi + + if test "x$enable_shared_glapi" != xyes; then + as_fn_error $? "$1 requires --enable-shared-glapi" "$LINENO" 5 + fi +} + +if test "x$enable_dri" = xyes; then + require_dri_shared_libs_and_glapi "DRI" + # not a hard requirement as swrast does not depend on it if test "x$have_libdrm" = xyes; then DRI_PC_REQ_PRIV="libdrm >= $LIBDRM_REQUIRED" @@ -22996,25 +23172,22 @@ fi -case "x$enable_glx" in -xxlib | xgallium-xlib) - # Xlib-based GLX - dri_modules="x11 xext xcb" +if test "x$enable_glx" != xno; then pkg_failed=no -{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for XLIBGL" >&5 -$as_echo_n "checking for XLIBGL... " >&6; } +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for GLPROTO" >&5 +$as_echo_n "checking for GLPROTO... " >&6; } -if test -n "$XLIBGL_CFLAGS"; then - pkg_cv_XLIBGL_CFLAGS="$XLIBGL_CFLAGS" +if test -n "$GLPROTO_CFLAGS"; then + pkg_cv_GLPROTO_CFLAGS="$GLPROTO_CFLAGS" elif test -n "$PKG_CONFIG"; then if test -n "$PKG_CONFIG" && \ - { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"\$dri_modules\""; } >&5 - ($PKG_CONFIG --exists --print-errors "$dri_modules") 2>&5 + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"glproto >= \$GLPROTO_REQUIRED\""; } >&5 + ($PKG_CONFIG --exists --print-errors "glproto >= $GLPROTO_REQUIRED") 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then - pkg_cv_XLIBGL_CFLAGS=`$PKG_CONFIG --cflags "$dri_modules" 2>/dev/null` + pkg_cv_GLPROTO_CFLAGS=`$PKG_CONFIG --cflags "glproto >= $GLPROTO_REQUIRED" 2>/dev/null` test "x$?" != "x0" && pkg_failed=yes else pkg_failed=yes @@ -23022,16 +23195,16 @@ else pkg_failed=untried fi -if test -n "$XLIBGL_LIBS"; then - pkg_cv_XLIBGL_LIBS="$XLIBGL_LIBS" +if test -n "$GLPROTO_LIBS"; then + pkg_cv_GLPROTO_LIBS="$GLPROTO_LIBS" elif test -n "$PKG_CONFIG"; then if test -n "$PKG_CONFIG" && \ - { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"\$dri_modules\""; } >&5 - ($PKG_CONFIG --exists --print-errors "$dri_modules") 2>&5 + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"glproto >= \$GLPROTO_REQUIRED\""; } >&5 + ($PKG_CONFIG --exists --print-errors "glproto >= $GLPROTO_REQUIRED") 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then - pkg_cv_XLIBGL_LIBS=`$PKG_CONFIG --libs "$dri_modules" 2>/dev/null` + pkg_cv_GLPROTO_LIBS=`$PKG_CONFIG --libs "glproto >= $GLPROTO_REQUIRED" 2>/dev/null` test "x$?" != "x0" && pkg_failed=yes else pkg_failed=yes @@ -23052,22 +23225,22 @@ _pkg_short_errors_supported=no fi if test $_pkg_short_errors_supported = yes; then - XLIBGL_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "$dri_modules" 2>&1` + GLPROTO_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "glproto >= $GLPROTO_REQUIRED" 2>&1` else - XLIBGL_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "$dri_modules" 2>&1` + GLPROTO_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "glproto >= $GLPROTO_REQUIRED" 2>&1` fi # Put the nasty error message in config.log where it belongs - echo "$XLIBGL_PKG_ERRORS" >&5 + echo "$GLPROTO_PKG_ERRORS" >&5 - as_fn_error $? "Package requirements ($dri_modules) were not met: + as_fn_error $? "Package requirements (glproto >= $GLPROTO_REQUIRED) were not met: -$XLIBGL_PKG_ERRORS +$GLPROTO_PKG_ERRORS Consider adjusting the PKG_CONFIG_PATH environment variable if you installed software in a non-standard prefix. -Alternatively, you may set the environment variables XLIBGL_CFLAGS -and XLIBGL_LIBS to avoid the need to call pkg-config. +Alternatively, you may set the environment variables GLPROTO_CFLAGS +and GLPROTO_LIBS to avoid the need to call pkg-config. See the pkg-config man page for more details." "$LINENO" 5 elif test $pkg_failed = untried; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 @@ -23078,42 +23251,39 @@ is in your PATH or set the PKG_CONFIG environment variable to the full path to pkg-config. -Alternatively, you may set the environment variables XLIBGL_CFLAGS -and XLIBGL_LIBS to avoid the need to call pkg-config. +Alternatively, you may set the environment variables GLPROTO_CFLAGS +and GLPROTO_LIBS to avoid the need to call pkg-config. See the pkg-config man page for more details. To get pkg-config, see . See \`config.log' for more details" "$LINENO" 5; } else - XLIBGL_CFLAGS=$pkg_cv_XLIBGL_CFLAGS - XLIBGL_LIBS=$pkg_cv_XLIBGL_LIBS + GLPROTO_CFLAGS=$pkg_cv_GLPROTO_CFLAGS + GLPROTO_LIBS=$pkg_cv_GLPROTO_LIBS { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 $as_echo "yes" >&6; } fi - GL_PC_REQ_PRIV="$GL_PC_REQ_PRIV $dri_modules" - X11_INCLUDES="$X11_INCLUDES $XLIBGL_CFLAGS" - GL_LIB_DEPS="$XLIBGL_LIBS" - GL_LIB_DEPS="$GL_LIB_DEPS $SELINUX_LIBS -lm $PTHREAD_LIBS $DLOPEN_LIBS" - GL_PC_LIB_PRIV="$GL_PC_LIB_PRIV $SELINUX_LIBS -lm $PTHREAD_LIBS" - ;; -xdri) - # DRI-based GLX +fi +case "x$enable_glx" in +xxlib | xgallium-xlib) + # Xlib-based GLX + dri_modules="x11 xext xcb" pkg_failed=no -{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for GLPROTO" >&5 -$as_echo_n "checking for GLPROTO... " >&6; } +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for XLIBGL" >&5 +$as_echo_n "checking for XLIBGL... " >&6; } -if test -n "$GLPROTO_CFLAGS"; then - pkg_cv_GLPROTO_CFLAGS="$GLPROTO_CFLAGS" +if test -n "$XLIBGL_CFLAGS"; then + pkg_cv_XLIBGL_CFLAGS="$XLIBGL_CFLAGS" elif test -n "$PKG_CONFIG"; then if test -n "$PKG_CONFIG" && \ - { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"glproto >= \$GLPROTO_REQUIRED\""; } >&5 - ($PKG_CONFIG --exists --print-errors "glproto >= $GLPROTO_REQUIRED") 2>&5 + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"\$dri_modules\""; } >&5 + ($PKG_CONFIG --exists --print-errors "$dri_modules") 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then - pkg_cv_GLPROTO_CFLAGS=`$PKG_CONFIG --cflags "glproto >= $GLPROTO_REQUIRED" 2>/dev/null` + pkg_cv_XLIBGL_CFLAGS=`$PKG_CONFIG --cflags "$dri_modules" 2>/dev/null` test "x$?" != "x0" && pkg_failed=yes else pkg_failed=yes @@ -23121,16 +23291,16 @@ else pkg_failed=untried fi -if test -n "$GLPROTO_LIBS"; then - pkg_cv_GLPROTO_LIBS="$GLPROTO_LIBS" +if test -n "$XLIBGL_LIBS"; then + pkg_cv_XLIBGL_LIBS="$XLIBGL_LIBS" elif test -n "$PKG_CONFIG"; then if test -n "$PKG_CONFIG" && \ - { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"glproto >= \$GLPROTO_REQUIRED\""; } >&5 - ($PKG_CONFIG --exists --print-errors "glproto >= $GLPROTO_REQUIRED") 2>&5 + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"\$dri_modules\""; } >&5 + ($PKG_CONFIG --exists --print-errors "$dri_modules") 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then - pkg_cv_GLPROTO_LIBS=`$PKG_CONFIG --libs "glproto >= $GLPROTO_REQUIRED" 2>/dev/null` + pkg_cv_XLIBGL_LIBS=`$PKG_CONFIG --libs "$dri_modules" 2>/dev/null` test "x$?" != "x0" && pkg_failed=yes else pkg_failed=yes @@ -23151,22 +23321,22 @@ _pkg_short_errors_supported=no fi if test $_pkg_short_errors_supported = yes; then - GLPROTO_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "glproto >= $GLPROTO_REQUIRED" 2>&1` + XLIBGL_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "$dri_modules" 2>&1` else - GLPROTO_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "glproto >= $GLPROTO_REQUIRED" 2>&1` + XLIBGL_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "$dri_modules" 2>&1` fi # Put the nasty error message in config.log where it belongs - echo "$GLPROTO_PKG_ERRORS" >&5 + echo "$XLIBGL_PKG_ERRORS" >&5 - as_fn_error $? "Package requirements (glproto >= $GLPROTO_REQUIRED) were not met: + as_fn_error $? "Package requirements ($dri_modules) were not met: -$GLPROTO_PKG_ERRORS +$XLIBGL_PKG_ERRORS Consider adjusting the PKG_CONFIG_PATH environment variable if you installed software in a non-standard prefix. -Alternatively, you may set the environment variables GLPROTO_CFLAGS -and GLPROTO_LIBS to avoid the need to call pkg-config. +Alternatively, you may set the environment variables XLIBGL_CFLAGS +and XLIBGL_LIBS to avoid the need to call pkg-config. See the pkg-config man page for more details." "$LINENO" 5 elif test $pkg_failed = untried; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 @@ -23177,19 +23347,27 @@ is in your PATH or set the PKG_CONFIG environment variable to the full path to pkg-config. -Alternatively, you may set the environment variables GLPROTO_CFLAGS -and GLPROTO_LIBS to avoid the need to call pkg-config. +Alternatively, you may set the environment variables XLIBGL_CFLAGS +and XLIBGL_LIBS to avoid the need to call pkg-config. See the pkg-config man page for more details. To get pkg-config, see . See \`config.log' for more details" "$LINENO" 5; } else - GLPROTO_CFLAGS=$pkg_cv_GLPROTO_CFLAGS - GLPROTO_LIBS=$pkg_cv_GLPROTO_LIBS + XLIBGL_CFLAGS=$pkg_cv_XLIBGL_CFLAGS + XLIBGL_LIBS=$pkg_cv_XLIBGL_LIBS { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 $as_echo "yes" >&6; } fi + GL_PC_REQ_PRIV="$GL_PC_REQ_PRIV $dri_modules" + X11_INCLUDES="$X11_INCLUDES $XLIBGL_CFLAGS" + GL_LIB_DEPS="$XLIBGL_LIBS" + GL_LIB_DEPS="$GL_LIB_DEPS $SELINUX_LIBS -lm $PTHREAD_LIBS $DLOPEN_LIBS" + GL_PC_LIB_PRIV="$GL_PC_LIB_PRIV $SELINUX_LIBS -lm $PTHREAD_LIBS" + ;; +xdri) + # DRI-based GLX # find the DRI deps for libGL dri_modules="x11 xext xdamage xfixes x11-xcb xcb xcb-glx >= $XCBGLX_REQUIRED" @@ -23197,9 +23375,7 @@ if test x"$driglx_direct" = xyes; then if test x"$dri_platform" = xdrm ; then DEFINES="$DEFINES -DGLX_USE_DRM" - if test "x$have_libdrm" != xyes; then - as_fn_error $? "Direct rendering requires libdrm >= $LIBDRM_REQUIRED" "$LINENO" 5 - fi + require_libdrm "Direct rendering" pkg_failed=no @@ -23590,6 +23766,9 @@ if test x"$dri_platform" = xapple ; then DEFINES="$DEFINES -DGLX_USE_APPLEGL" fi + if test x"$dri_platform" = xwindows ; then + DEFINES="$DEFINES -DGLX_USE_WINDOWSGL" + fi fi # add xf86vidmode if available @@ -23769,17 +23948,6 @@ ;; esac -have_pci_id=no -if test "$have_libudev" = yes; then - DEFINES="$DEFINES -DHAVE_LIBUDEV" - have_pci_id=yes -fi - -if test "$have_sysfs" = yes; then - DEFINES="$DEFINES -DHAVE_SYSFS" - have_pci_id=yes -fi - # This is outside the case (above) so that it is invoked even for non-GLX # builds. if test "x$HAVE_XF86VIDMODE" = xyes; then @@ -23826,14 +23994,14 @@ if test "${enable_glx_tls+set}" = set; then : enableval=$enable_glx_tls; GLX_USE_TLS="$enableval" else - GLX_USE_TLS=no + GLX_USE_TLS=yes fi GLX_TLS=${GLX_USE_TLS} -if test "x$GLX_USE_TLS" = xyes -a "x$ax_pthread_ok" = xyes; then : - DEFINES="${DEFINES} -DGLX_USE_TLS" +if test "x$GLX_USE_TLS" = xyes; then + DEFINES="$DEFINES -DGLX_USE_TLS" fi # Check whether --enable-glx-read-only-text was given. @@ -23889,15 +24057,10 @@ # Platform specific settings and drivers to build case "$host_os" in linux*) - DEFINES="$DEFINES -DHAVE_ALIAS" if test "x$enable_dri3" = xyes; then DEFINES="$DEFINES -DHAVE_DRI3" fi - if test "x$have_pci_id" != xyes; then - as_fn_error $? "libudev-dev or sysfs required for building DRI" "$LINENO" 5 - fi - case "$host_cpu" in powerpc* | sparc*) # Build only the drivers for cards that exist on PowerPC/sparc @@ -23907,19 +24070,13 @@ ;; esac ;; - *freebsd* | dragonfly* | *netbsd* | openbsd*) - DEFINES="$DEFINES -DHAVE_ALIAS" - ;; - gnu*) - DEFINES="$DEFINES -DHAVE_ALIAS" - ;; cygwin*) if test "x$with_dri_drivers" = "xyes"; then with_dri_drivers="swrast" fi ;; darwin*) - DEFINES="$DEFINES -DGLX_ALIAS_UNSUPPORTED -DBUILDING_MESA" + DEFINES="$DEFINES -DBUILDING_MESA" if test "x$with_dri_drivers" = "xyes"; then with_dri_drivers="swrast" fi @@ -24515,16 +24672,185 @@ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for RADEON" >&5 $as_echo_n "checking for RADEON... " >&6; } -if test -n "$RADEON_CFLAGS"; then - pkg_cv_RADEON_CFLAGS="$RADEON_CFLAGS" +if test -n "$RADEON_CFLAGS"; then + pkg_cv_RADEON_CFLAGS="$RADEON_CFLAGS" + elif test -n "$PKG_CONFIG"; then + if test -n "$PKG_CONFIG" && \ + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libdrm_radeon >= \$LIBDRM_RADEON_REQUIRED\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libdrm_radeon >= $LIBDRM_RADEON_REQUIRED") 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + pkg_cv_RADEON_CFLAGS=`$PKG_CONFIG --cflags "libdrm_radeon >= $LIBDRM_RADEON_REQUIRED" 2>/dev/null` + test "x$?" != "x0" && pkg_failed=yes +else + pkg_failed=yes +fi + else + pkg_failed=untried +fi +if test -n "$RADEON_LIBS"; then + pkg_cv_RADEON_LIBS="$RADEON_LIBS" + elif test -n "$PKG_CONFIG"; then + if test -n "$PKG_CONFIG" && \ + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libdrm_radeon >= \$LIBDRM_RADEON_REQUIRED\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libdrm_radeon >= $LIBDRM_RADEON_REQUIRED") 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + pkg_cv_RADEON_LIBS=`$PKG_CONFIG --libs "libdrm_radeon >= $LIBDRM_RADEON_REQUIRED" 2>/dev/null` + test "x$?" != "x0" && pkg_failed=yes +else + pkg_failed=yes +fi + else + pkg_failed=untried +fi + + + +if test $pkg_failed = yes; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } + +if $PKG_CONFIG --atleast-pkgconfig-version 0.20; then + _pkg_short_errors_supported=yes +else + _pkg_short_errors_supported=no +fi + if test $_pkg_short_errors_supported = yes; then + RADEON_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "libdrm_radeon >= $LIBDRM_RADEON_REQUIRED" 2>&1` + else + RADEON_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "libdrm_radeon >= $LIBDRM_RADEON_REQUIRED" 2>&1` + fi + # Put the nasty error message in config.log where it belongs + echo "$RADEON_PKG_ERRORS" >&5 + + as_fn_error $? "Package requirements (libdrm_radeon >= $LIBDRM_RADEON_REQUIRED) were not met: + +$RADEON_PKG_ERRORS + +Consider adjusting the PKG_CONFIG_PATH environment variable if you +installed software in a non-standard prefix. + +Alternatively, you may set the environment variables RADEON_CFLAGS +and RADEON_LIBS to avoid the need to call pkg-config. +See the pkg-config man page for more details." "$LINENO" 5 +elif test $pkg_failed = untried; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } + { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 +$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} +as_fn_error $? "The pkg-config script could not be found or is too old. Make sure it +is in your PATH or set the PKG_CONFIG environment variable to the full +path to pkg-config. + +Alternatively, you may set the environment variables RADEON_CFLAGS +and RADEON_LIBS to avoid the need to call pkg-config. +See the pkg-config man page for more details. + +To get pkg-config, see . +See \`config.log' for more details" "$LINENO" 5; } +else + RADEON_CFLAGS=$pkg_cv_RADEON_CFLAGS + RADEON_LIBS=$pkg_cv_RADEON_LIBS + { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 +$as_echo "yes" >&6; } + +fi + ;; + xswrast) + HAVE_SWRAST_DRI=yes; + ;; + *) + as_fn_error $? "classic DRI driver '$driver' does not exist" "$LINENO" 5 + ;; + esac + done + DRI_DIRS=`echo $DRI_DIRS|tr " " "\n"|sort -u|tr "\n" " "` +fi + + +# Check whether --enable-gallium-llvm was given. +if test "${enable_gallium_llvm+set}" = set; then : + enableval=$enable_gallium_llvm; enable_gallium_llvm="$enableval" +else + enable_gallium_llvm=auto +fi + + +if test "x$enable_gallium_llvm" = xauto; then + if test "x$FOUND_LLVM" = xyes; then + case "$host_cpu" in + i*86|x86_64|amd64) enable_gallium_llvm=yes;; + *) enable_gallium_llvm=no;; + esac + else + enable_gallium_llvm=no + fi +fi + +if test "x$enable_gallium_llvm" = xyes -a "x$FOUND_LLVM" = xno; then + as_fn_error $? "--enable-gallium-llvm selected but llvm-config is not found" "$LINENO" 5 +fi + +# +# Vulkan driver configuration +# + + +# Check whether --with-vulkan-drivers was given. +if test "${with_vulkan_drivers+set}" = set; then : + withval=$with_vulkan_drivers; with_vulkan_drivers="$withval" +else + with_vulkan_drivers="no" +fi + + +# Doing '--without-vulkan-drivers' will set this variable to 'no'. Clear it +# here so that the script doesn't choke on an unknown driver name later. +case "x$with_vulkan_drivers" in + xyes) with_vulkan_drivers="$VULKAN_DRIVERS_DEFAULT" ;; + xno) with_vulkan_drivers='' ;; +esac + + +# Check whether --with-vulkan-icddir was given. +if test "${with_vulkan_icddir+set}" = set; then : + withval=$with_vulkan_icddir; VULKAN_ICD_INSTALL_DIR="$withval" +else + VULKAN_ICD_INSTALL_DIR='${datarootdir}/vulkan/icd.d' +fi + + + +if test -n "$with_vulkan_drivers"; then + VULKAN_DRIVERS=`IFS=', '; echo $with_vulkan_drivers` + for driver in $VULKAN_DRIVERS; do + case "x$driver" in + xintel) + if test "x$HAVE_I965_DRI" != xyes; then + as_fn_error $? "Intel Vulkan driver requires the i965 dri driver" "$LINENO" 5 + fi + HAVE_INTEL_VULKAN=yes; + + ;; + xradeon) + +pkg_failed=no +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for AMDGPU" >&5 +$as_echo_n "checking for AMDGPU... " >&6; } + +if test -n "$AMDGPU_CFLAGS"; then + pkg_cv_AMDGPU_CFLAGS="$AMDGPU_CFLAGS" elif test -n "$PKG_CONFIG"; then if test -n "$PKG_CONFIG" && \ - { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libdrm_radeon >= \$LIBDRM_RADEON_REQUIRED\""; } >&5 - ($PKG_CONFIG --exists --print-errors "libdrm_radeon >= $LIBDRM_RADEON_REQUIRED") 2>&5 + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libdrm_amdgpu >= \$LIBDRM_AMDGPU_REQUIRED\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libdrm_amdgpu >= $LIBDRM_AMDGPU_REQUIRED") 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then - pkg_cv_RADEON_CFLAGS=`$PKG_CONFIG --cflags "libdrm_radeon >= $LIBDRM_RADEON_REQUIRED" 2>/dev/null` + pkg_cv_AMDGPU_CFLAGS=`$PKG_CONFIG --cflags "libdrm_amdgpu >= $LIBDRM_AMDGPU_REQUIRED" 2>/dev/null` test "x$?" != "x0" && pkg_failed=yes else pkg_failed=yes @@ -24532,16 +24858,16 @@ else pkg_failed=untried fi -if test -n "$RADEON_LIBS"; then - pkg_cv_RADEON_LIBS="$RADEON_LIBS" +if test -n "$AMDGPU_LIBS"; then + pkg_cv_AMDGPU_LIBS="$AMDGPU_LIBS" elif test -n "$PKG_CONFIG"; then if test -n "$PKG_CONFIG" && \ - { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libdrm_radeon >= \$LIBDRM_RADEON_REQUIRED\""; } >&5 - ($PKG_CONFIG --exists --print-errors "libdrm_radeon >= $LIBDRM_RADEON_REQUIRED") 2>&5 + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libdrm_amdgpu >= \$LIBDRM_AMDGPU_REQUIRED\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libdrm_amdgpu >= $LIBDRM_AMDGPU_REQUIRED") 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then - pkg_cv_RADEON_LIBS=`$PKG_CONFIG --libs "libdrm_radeon >= $LIBDRM_RADEON_REQUIRED" 2>/dev/null` + pkg_cv_AMDGPU_LIBS=`$PKG_CONFIG --libs "libdrm_amdgpu >= $LIBDRM_AMDGPU_REQUIRED" 2>/dev/null` test "x$?" != "x0" && pkg_failed=yes else pkg_failed=yes @@ -24562,22 +24888,22 @@ _pkg_short_errors_supported=no fi if test $_pkg_short_errors_supported = yes; then - RADEON_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "libdrm_radeon >= $LIBDRM_RADEON_REQUIRED" 2>&1` + AMDGPU_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "libdrm_amdgpu >= $LIBDRM_AMDGPU_REQUIRED" 2>&1` else - RADEON_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "libdrm_radeon >= $LIBDRM_RADEON_REQUIRED" 2>&1` + AMDGPU_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "libdrm_amdgpu >= $LIBDRM_AMDGPU_REQUIRED" 2>&1` fi # Put the nasty error message in config.log where it belongs - echo "$RADEON_PKG_ERRORS" >&5 + echo "$AMDGPU_PKG_ERRORS" >&5 - as_fn_error $? "Package requirements (libdrm_radeon >= $LIBDRM_RADEON_REQUIRED) were not met: + as_fn_error $? "Package requirements (libdrm_amdgpu >= $LIBDRM_AMDGPU_REQUIRED) were not met: -$RADEON_PKG_ERRORS +$AMDGPU_PKG_ERRORS Consider adjusting the PKG_CONFIG_PATH environment variable if you installed software in a non-standard prefix. -Alternatively, you may set the environment variables RADEON_CFLAGS -and RADEON_LIBS to avoid the need to call pkg-config. +Alternatively, you may set the environment variables AMDGPU_CFLAGS +and AMDGPU_LIBS to avoid the need to call pkg-config. See the pkg-config man page for more details." "$LINENO" 5 elif test $pkg_failed = untried; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 @@ -24588,75 +24914,21 @@ is in your PATH or set the PKG_CONFIG environment variable to the full path to pkg-config. -Alternatively, you may set the environment variables RADEON_CFLAGS -and RADEON_LIBS to avoid the need to call pkg-config. +Alternatively, you may set the environment variables AMDGPU_CFLAGS +and AMDGPU_LIBS to avoid the need to call pkg-config. See the pkg-config man page for more details. To get pkg-config, see . See \`config.log' for more details" "$LINENO" 5; } else - RADEON_CFLAGS=$pkg_cv_RADEON_CFLAGS - RADEON_LIBS=$pkg_cv_RADEON_LIBS + AMDGPU_CFLAGS=$pkg_cv_AMDGPU_CFLAGS + AMDGPU_LIBS=$pkg_cv_AMDGPU_LIBS { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 $as_echo "yes" >&6; } fi - ;; - xswrast) - HAVE_SWRAST_DRI=yes; - ;; - *) - as_fn_error $? "classic DRI driver '$driver' does not exist" "$LINENO" 5 - ;; - esac - done - DRI_DIRS=`echo $DRI_DIRS|tr " " "\n"|sort -u|tr "\n" " "` -fi - - -# -# Vulkan driver configuration -# - - -# Check whether --with-vulkan-drivers was given. -if test "${with_vulkan_drivers+set}" = set; then : - withval=$with_vulkan_drivers; with_vulkan_drivers="$withval" -else - with_vulkan_drivers="no" -fi - - -# Doing '--without-vulkan-drivers' will set this variable to 'no'. Clear it -# here so that the script doesn't choke on an unknown driver name later. -case "x$with_vulkan_drivers" in - xyes) with_vulkan_drivers="$VULKAN_DRIVERS_DEFAULT" ;; - xno) with_vulkan_drivers='' ;; -esac - - -# Check whether --with-vulkan-icddir was given. -if test "${with_vulkan_icddir+set}" = set; then : - withval=$with_vulkan_icddir; VULKAN_ICD_INSTALL_DIR="$withval" -else - VULKAN_ICD_INSTALL_DIR='${datarootdir}/vulkan/icd.d' -fi - - - -if test -n "$with_vulkan_drivers"; then - VULKAN_DRIVERS=`IFS=', '; echo $with_vulkan_drivers` - for driver in $VULKAN_DRIVERS; do - case "x$driver" in - xintel) - if test "x$HAVE_I965_DRI" != xyes; then - as_fn_error $? "Intel Vulkan driver requires the i965 dri driver" "$LINENO" 5 - fi - if test "x$with_sha1" == "x"; then - as_fn_error $? "Intel Vulkan driver requires SHA1" "$LINENO" 5 - fi - HAVE_INTEL_VULKAN=yes; - + radeon_llvm_check $LLVM_REQUIRED_RADV "radv" + HAVE_RADEON_VULKAN=yes; ;; *) as_fn_error $? "Vulkan driver '$driver' does not exist" "$LINENO" 5 @@ -24667,6 +24939,7 @@ fi +DEFINES="$DEFINES -DENABLE_SHADER_CACHE" if test -n "$DRI_DIRS"; then NEED_MEGADRIVER_TRUE= NEED_MEGADRIVER_FALSE='#' @@ -24729,31 +25002,8 @@ -if test "x$enable_gbm" = xauto; then - case "$with_egl_platforms" in - *drm*) - enable_gbm=yes ;; - *) - enable_gbm=no ;; - esac -fi if test "x$enable_gbm" = xyes; then - if test "x$need_pci_id$have_pci_id" = xyesno; then - as_fn_error $? "gbm requires udev >= $LIBUDEV_REQUIRED or sysfs" "$LINENO" 5 - fi - - if test "x$enable_dri" = xyes; then - if test "x$enable_shared_glapi" = xno; then - as_fn_error $? "gbm_dri requires --enable-shared-glapi" "$LINENO" 5 - fi - else - # Strictly speaking libgbm does not require --enable-dri, although - # both of its backends do. Thus one can build libgbm without any - # backends if --disable-dri is set. - # To avoid unnecessary complexity of checking if at least one backend - # is available when building, just mandate --enable-dri. - as_fn_error $? "gbm requires --enable-dri" "$LINENO" 5 - fi + require_dri_shared_libs_and_glapi "gbm" fi if test "x$enable_gbm" = xyes; then HAVE_GBM_TRUE= @@ -24763,16 +25013,12 @@ HAVE_GBM_FALSE= fi -if test "x$need_pci_id$have_libudev" = xyesyes; then - GBM_PC_REQ_PRIV="libudev >= $LIBUDEV_REQUIRED" -else - GBM_PC_REQ_PRIV="" -fi +# FINISHME: GBM has a number of dependencies which we should add below +GBM_PC_REQ_PRIV="" GBM_PC_LIB_PRIV="$DLOPEN_LIBS" -EGL_CLIENT_APIS="" if test "x$enable_egl" = xyes; then EGL_LIB_DEPS="$DLOPEN_LIBS $SELINUX_LIBS $PTHREAD_LIBS" @@ -24783,25 +25029,7 @@ fi - if test "$enable_static" != yes; then - if test "x$enable_dri" = xyes; then - HAVE_EGL_DRIVER_DRI2=1 - if test "x$enable_shared_glapi" = xno; then - as_fn_error $? "egl_dri2 requires --enable-shared-glapi" "$LINENO" 5 - fi - if test "x$enable_dri3" = xyes; then - HAVE_EGL_DRIVER_DRI3=1 - if test "x$enable_shared_glapi" = xno; then - as_fn_error $? "egl_dri3 requires --enable-shared-glapi" "$LINENO" 5 - fi - fi - else - # Avoid building an "empty" libEGL. Drop/update this - # when other backends (haiku?) come along. - as_fn_error $? "egl requires --enable-dri" "$LINENO" 5 - fi - - fi + require_dri_shared_libs_and_glapi "egl" fi if test "x$enable_egl" = xyes; then HAVE_EGL_TRUE= @@ -24920,14 +25148,14 @@ elif test -n "$PKG_CONFIG"; then if test -n "$PKG_CONFIG" && \ { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"xcb-dri3 xcb-present xcb-sync xshmfence >= \$XSHMFENCE_REQUIRED - x11-xcb xcb xcb-dri2 >= \$XCBDRI2_REQUIRED\""; } >&5 + xcb-xfixes x11-xcb xcb xcb-dri2 >= \$XCBDRI2_REQUIRED\""; } >&5 ($PKG_CONFIG --exists --print-errors "xcb-dri3 xcb-present xcb-sync xshmfence >= $XSHMFENCE_REQUIRED - x11-xcb xcb xcb-dri2 >= $XCBDRI2_REQUIRED") 2>&5 + xcb-xfixes x11-xcb xcb xcb-dri2 >= $XCBDRI2_REQUIRED") 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then pkg_cv_VL_CFLAGS=`$PKG_CONFIG --cflags "xcb-dri3 xcb-present xcb-sync xshmfence >= $XSHMFENCE_REQUIRED - x11-xcb xcb xcb-dri2 >= $XCBDRI2_REQUIRED" 2>/dev/null` + xcb-xfixes x11-xcb xcb xcb-dri2 >= $XCBDRI2_REQUIRED" 2>/dev/null` test "x$?" != "x0" && pkg_failed=yes else pkg_failed=yes @@ -24940,14 +25168,14 @@ elif test -n "$PKG_CONFIG"; then if test -n "$PKG_CONFIG" && \ { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"xcb-dri3 xcb-present xcb-sync xshmfence >= \$XSHMFENCE_REQUIRED - x11-xcb xcb xcb-dri2 >= \$XCBDRI2_REQUIRED\""; } >&5 + xcb-xfixes x11-xcb xcb xcb-dri2 >= \$XCBDRI2_REQUIRED\""; } >&5 ($PKG_CONFIG --exists --print-errors "xcb-dri3 xcb-present xcb-sync xshmfence >= $XSHMFENCE_REQUIRED - x11-xcb xcb xcb-dri2 >= $XCBDRI2_REQUIRED") 2>&5 + xcb-xfixes x11-xcb xcb xcb-dri2 >= $XCBDRI2_REQUIRED") 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then pkg_cv_VL_LIBS=`$PKG_CONFIG --libs "xcb-dri3 xcb-present xcb-sync xshmfence >= $XSHMFENCE_REQUIRED - x11-xcb xcb xcb-dri2 >= $XCBDRI2_REQUIRED" 2>/dev/null` + xcb-xfixes x11-xcb xcb xcb-dri2 >= $XCBDRI2_REQUIRED" 2>/dev/null` test "x$?" != "x0" && pkg_failed=yes else pkg_failed=yes @@ -24969,16 +25197,16 @@ fi if test $_pkg_short_errors_supported = yes; then VL_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "xcb-dri3 xcb-present xcb-sync xshmfence >= $XSHMFENCE_REQUIRED - x11-xcb xcb xcb-dri2 >= $XCBDRI2_REQUIRED" 2>&1` + xcb-xfixes x11-xcb xcb xcb-dri2 >= $XCBDRI2_REQUIRED" 2>&1` else VL_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "xcb-dri3 xcb-present xcb-sync xshmfence >= $XSHMFENCE_REQUIRED - x11-xcb xcb xcb-dri2 >= $XCBDRI2_REQUIRED" 2>&1` + xcb-xfixes x11-xcb xcb xcb-dri2 >= $XCBDRI2_REQUIRED" 2>&1` fi # Put the nasty error message in config.log where it belongs echo "$VL_PKG_ERRORS" >&5 as_fn_error $? "Package requirements (xcb-dri3 xcb-present xcb-sync xshmfence >= $XSHMFENCE_REQUIRED - x11-xcb xcb xcb-dri2 >= $XCBDRI2_REQUIRED) were not met: + xcb-xfixes x11-xcb xcb xcb-dri2 >= $XCBDRI2_REQUIRED) were not met: $VL_PKG_ERRORS @@ -25575,126 +25803,6 @@ have_libclc=no fi -pkg_failed=no -{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for LIBELF" >&5 -$as_echo_n "checking for LIBELF... " >&6; } - -if test -n "$LIBELF_CFLAGS"; then - pkg_cv_LIBELF_CFLAGS="$LIBELF_CFLAGS" - elif test -n "$PKG_CONFIG"; then - if test -n "$PKG_CONFIG" && \ - { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libelf\""; } >&5 - ($PKG_CONFIG --exists --print-errors "libelf") 2>&5 - ac_status=$? - $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 - test $ac_status = 0; }; then - pkg_cv_LIBELF_CFLAGS=`$PKG_CONFIG --cflags "libelf" 2>/dev/null` - test "x$?" != "x0" && pkg_failed=yes -else - pkg_failed=yes -fi - else - pkg_failed=untried -fi -if test -n "$LIBELF_LIBS"; then - pkg_cv_LIBELF_LIBS="$LIBELF_LIBS" - elif test -n "$PKG_CONFIG"; then - if test -n "$PKG_CONFIG" && \ - { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libelf\""; } >&5 - ($PKG_CONFIG --exists --print-errors "libelf") 2>&5 - ac_status=$? - $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 - test $ac_status = 0; }; then - pkg_cv_LIBELF_LIBS=`$PKG_CONFIG --libs "libelf" 2>/dev/null` - test "x$?" != "x0" && pkg_failed=yes -else - pkg_failed=yes -fi - else - pkg_failed=untried -fi - - - -if test $pkg_failed = yes; then - { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 -$as_echo "no" >&6; } - -if $PKG_CONFIG --atleast-pkgconfig-version 0.20; then - _pkg_short_errors_supported=yes -else - _pkg_short_errors_supported=no -fi - if test $_pkg_short_errors_supported = yes; then - LIBELF_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "libelf" 2>&1` - else - LIBELF_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "libelf" 2>&1` - fi - # Put the nasty error message in config.log where it belongs - echo "$LIBELF_PKG_ERRORS" >&5 - - have_libelf=no -elif test $pkg_failed = untried; then - { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 -$as_echo "no" >&6; } - have_libelf=no -else - LIBELF_CFLAGS=$pkg_cv_LIBELF_CFLAGS - LIBELF_LIBS=$pkg_cv_LIBELF_LIBS - { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -$as_echo "yes" >&6; } - have_libelf=yes -fi - -if test "x$have_libelf" = xno; then - LIBELF_LIBS='' - LIBELF_CFLAGS='' - { $as_echo "$as_me:${as_lineno-$LINENO}: checking for elf_memory in -lelf" >&5 -$as_echo_n "checking for elf_memory in -lelf... " >&6; } -if ${ac_cv_lib_elf_elf_memory+:} false; then : - $as_echo_n "(cached) " >&6 -else - ac_check_lib_save_LIBS=$LIBS -LIBS="-lelf $LIBS" -cat confdefs.h - <<_ACEOF >conftest.$ac_ext -/* end confdefs.h. */ - -/* Override any GCC internal prototype to avoid an error. - Use char because int might match the return type of a GCC - builtin and then its argument prototype would still apply. */ -#ifdef __cplusplus -extern "C" -#endif -char elf_memory (); -int -main () -{ -return elf_memory (); - ; - return 0; -} -_ACEOF -if ac_fn_c_try_link "$LINENO"; then : - ac_cv_lib_elf_elf_memory=yes -else - ac_cv_lib_elf_elf_memory=no -fi -rm -f core conftest.err conftest.$ac_objext \ - conftest$ac_exeext conftest.$ac_ext -LIBS=$ac_check_lib_save_LIBS -fi -{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_elf_elf_memory" >&5 -$as_echo "$ac_cv_lib_elf_elf_memory" >&6; } -if test "x$ac_cv_lib_elf_elf_memory" = xyes; then : - have_libelf=yes;LIBELF_LIBS=-lelf -else - have_libelf=no -fi - - - -fi - if test "x$enable_opencl" = xyes; then if test -z "$with_gallium_drivers"; then as_fn_error $? "cannot enable OpenCL without Gallium" "$LINENO" 5 @@ -25727,6 +25835,47 @@ if test "x$have_libelf" != xyes; then as_fn_error $? "Clover requires libelf" "$LINENO" 5 fi + + if test "x${ac_cv_cxx_compiler_gnu}" = xyes; then + altivec_enabled=no + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ + + #if !defined(__VEC__) || !defined(__ALTIVEC__) + #error "AltiVec not enabled" + #endif + +_ACEOF +if ac_fn_c_try_compile "$LINENO"; then : + altivec_enabled=yes +fi +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + + if test "$altivec_enabled" = yes; then + CLOVER_STD_OVERRIDE="-std=gnu++11" + fi + + fi + + llvm_require_version $LLVM_REQUIRED_OPENCL "opencl" + + llvm_add_default_components "opencl" + llvm_add_component "all-targets" "opencl" + llvm_add_component "linker" "opencl" + llvm_add_component "instrumentation" "opencl" + llvm_add_component "ipo" "opencl" + llvm_add_component "irreader" "opencl" + llvm_add_component "option" "opencl" + llvm_add_component "objcarcopts" "opencl" + llvm_add_component "profiledata" "opencl" + + if test -z "$CLANG_LIBDIR"; then + CLANG_LIBDIR=${LLVM_LIBDIR} + fi + CLANG_RESOURCE_DIR=$CLANG_LIBDIR/clang/${LLVM_VERSION} + if test ! -f "$CLANG_RESOURCE_DIR/include/stddef.h"; then : + as_fn_error $? "Could not find clang internal header stddef.h in $CLANG_RESOURCE_DIR Use --with-clang-libdir to specify the correct path to the clang libraries." "$LINENO" 5 +fi fi if test "x$enable_opencl" = xyes; then HAVE_CLOVER_TRUE= @@ -25746,6 +25895,7 @@ + if test -n "$with_gallium_drivers"; then HAVE_GALLIUM_TRUE= HAVE_GALLIUM_FALSE='#' @@ -25756,34 +25906,18 @@ - - - - - - - - - - -case "x$enable_opengl$enable_gles1$enable_gles2" in -x*yes*) - EGL_CLIENT_APIS="$EGL_CLIENT_APIS "'$(GL_LIB)' - ;; -esac - - - - - # Check whether --with-egl-platforms was given. if test "${with_egl_platforms+set}" = set; then : withval=$with_egl_platforms; with_egl_platforms="$withval" else if test "x$enable_egl" = xyes; then - with_egl_platforms="x11" + if test "x$enable_gbm" = xyes; then + with_egl_platforms="x11,drm" + else + with_egl_platforms="x11" + fi else - with_egl_platforms="" + with_egl_platforms="" fi fi @@ -25911,8 +26045,6 @@ for plat in $egl_platforms; do case "$plat" in wayland) - test "x$have_libdrm" != xyes && - as_fn_error $? "EGL platform wayland requires libdrm >= $LIBDRM_REQUIRED" "$LINENO" 5 pkg_failed=no @@ -26074,473 +26206,209 @@ as_fn_error $? "Package requirements (x11-xcb xcb xcb-dri2 >= $XCBDRI2_REQUIRED xcb-xfixes) were not met: $XCB_DRI2_PKG_ERRORS - -Consider adjusting the PKG_CONFIG_PATH environment variable if you -installed software in a non-standard prefix. - -Alternatively, you may set the environment variables XCB_DRI2_CFLAGS -and XCB_DRI2_LIBS to avoid the need to call pkg-config. -See the pkg-config man page for more details." "$LINENO" 5 -elif test $pkg_failed = untried; then - { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 -$as_echo "no" >&6; } - { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 -$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} -as_fn_error $? "The pkg-config script could not be found or is too old. Make sure it -is in your PATH or set the PKG_CONFIG environment variable to the full -path to pkg-config. - -Alternatively, you may set the environment variables XCB_DRI2_CFLAGS -and XCB_DRI2_LIBS to avoid the need to call pkg-config. -See the pkg-config man page for more details. - -To get pkg-config, see . -See \`config.log' for more details" "$LINENO" 5; } -else - XCB_DRI2_CFLAGS=$pkg_cv_XCB_DRI2_CFLAGS - XCB_DRI2_LIBS=$pkg_cv_XCB_DRI2_LIBS - { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 -$as_echo "yes" >&6; } - -fi - ;; - - drm) - test "x$enable_gbm" = "xno" && - as_fn_error $? "EGL platform drm needs gbm" "$LINENO" 5 - test "x$have_libdrm" != xyes && - as_fn_error $? "EGL platform drm requires libdrm >= $LIBDRM_REQUIRED" "$LINENO" 5 - ;; - - surfaceless) - test "x$have_libdrm" != xyes && - as_fn_error $? "EGL platform surfaceless requires libdrm >= $LIBDRM_REQUIRED" "$LINENO" 5 - ;; - - android) - ;; - - *) - as_fn_error $? "EGL platform '$plat' does not exist" "$LINENO" 5 - ;; - esac - - case "$plat$need_pci_id$have_pci_id" in - waylandyesno|drmyesno) - as_fn_error $? "cannot build $plat platform without udev >= $LIBUDEV_REQUIRED or sysfs" "$LINENO" 5 ;; - esac -done - -# libEGL wants to default to the first platform specified in -# ./configure. parse that here. -if test "x$egl_platforms" != "x"; then - FIRST_PLATFORM_CAPS=`echo $egl_platforms | sed 's| .*||' | tr '[a-z]' '[A-Z]'` - EGL_NATIVE_PLATFORM="_EGL_PLATFORM_$FIRST_PLATFORM_CAPS" -else - EGL_NATIVE_PLATFORM="_EGL_INVALID_PLATFORM" -fi - - if echo "$egl_platforms" | grep -q 'x11'; then - HAVE_PLATFORM_X11_TRUE= - HAVE_PLATFORM_X11_FALSE='#' -else - HAVE_PLATFORM_X11_TRUE='#' - HAVE_PLATFORM_X11_FALSE= -fi - - if echo "$egl_platforms" | grep -q 'wayland'; then - HAVE_PLATFORM_WAYLAND_TRUE= - HAVE_PLATFORM_WAYLAND_FALSE='#' -else - HAVE_PLATFORM_WAYLAND_TRUE='#' - HAVE_PLATFORM_WAYLAND_FALSE= -fi - - if echo "$egl_platforms" | grep -q 'drm'; then - HAVE_EGL_PLATFORM_DRM_TRUE= - HAVE_EGL_PLATFORM_DRM_FALSE='#' -else - HAVE_EGL_PLATFORM_DRM_TRUE='#' - HAVE_EGL_PLATFORM_DRM_FALSE= -fi - - if echo "$egl_platforms" | grep -q 'surfaceless'; then - HAVE_EGL_PLATFORM_SURFACELESS_TRUE= - HAVE_EGL_PLATFORM_SURFACELESS_FALSE='#' -else - HAVE_EGL_PLATFORM_SURFACELESS_TRUE='#' - HAVE_EGL_PLATFORM_SURFACELESS_FALSE= -fi - - if echo "$egl_platforms" | grep -q 'android'; then - HAVE_EGL_PLATFORM_ANDROID_TRUE= - HAVE_EGL_PLATFORM_ANDROID_FALSE='#' -else - HAVE_EGL_PLATFORM_ANDROID_TRUE='#' - HAVE_EGL_PLATFORM_ANDROID_FALSE= -fi - - - if test "x$HAVE_EGL_DRIVER_DRI2" != "x"; then - HAVE_EGL_DRIVER_DRI2_TRUE= - HAVE_EGL_DRIVER_DRI2_FALSE='#' -else - HAVE_EGL_DRIVER_DRI2_TRUE='#' - HAVE_EGL_DRIVER_DRI2_FALSE= -fi - - - - - -# If we don't have the X11 platform, set this define so we don't try to include -# the X11 headers. -if ! echo "$egl_platforms" | grep -q 'x11'; then - DEFINES="$DEFINES -DMESA_EGL_NO_X11_HEADERS" - GL_PC_CFLAGS="$GL_PC_CFLAGS -DMESA_EGL_NO_X11_HEADERS" -fi - -# Check whether --enable-gallium-llvm was given. -if test "${enable_gallium_llvm+set}" = set; then : - enableval=$enable_gallium_llvm; enable_gallium_llvm="$enableval" -else - enable_gallium_llvm=auto -fi - - -# Check whether --enable-llvm-shared-libs was given. -if test "${enable_llvm_shared_libs+set}" = set; then : - enableval=$enable_llvm_shared_libs; enable_llvm_shared_libs="$enableval" -else - enable_llvm_shared_libs=yes -fi - - - -# Check whether --with-llvm-prefix was given. -if test "${with_llvm_prefix+set}" = set; then : - withval=$with_llvm_prefix; llvm_prefix="$withval" -else - llvm_prefix='' -fi - - - -# Call this inside ` ` to get the return value. -# $1 is the llvm-config command with arguments. -strip_unwanted_llvm_flags() { - # Use \> (marks the end of the word) - echo `$1` | sed \ - -e 's/-march=\S*//g' \ - -e 's/-mtune=\S*//g' \ - -e 's/-mcpu=\S*//g' \ - -e 's/-DNDEBUG\>//g' \ - -e 's/-D_GNU_SOURCE\>//g' \ - -e 's/-pedantic\>//g' \ - -e 's/-Wcovered-switch-default\>//g' \ - -e 's/-O.\>//g' \ - -e 's/-g\>//g' \ - -e 's/-Wall\>//g' \ - -e 's/-Wcast-qual\>//g' \ - -e 's/-Woverloaded-virtual\>//g' \ - -e 's/-fcolor-diagnostics\>//g' \ - -e 's/-fdata-sections\>//g' \ - -e 's/-ffunction-sections\>//g' \ - -e 's/-fno-exceptions\>//g' \ - -e 's/-fomit-frame-pointer\>//g' \ - -e 's/-fvisibility-inlines-hidden\>//g' \ - -e 's/-fPIC\>//g' \ - -e 's/-fstack-protector-strong\>//g' -} - -llvm_check_version_for() { - if test "${LLVM_VERSION_INT}${LLVM_VERSION_PATCH}" -lt "${1}0${2}${3}"; then - as_fn_error $? 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"$LINENO" 5 +elif test $pkg_failed = untried; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } -fi + { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 +$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} +as_fn_error $? "The pkg-config script could not be found or is too old. Make sure it +is in your PATH or set the PKG_CONFIG environment variable to the full +path to pkg-config. - if test "x$ac_pt_LLVM_CONFIG" = x; then - LLVM_CONFIG="no" - else - case $cross_compiling:$ac_tool_warned in -yes:) -{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 -$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} -ac_tool_warned=yes ;; -esac - LLVM_CONFIG=$ac_pt_LLVM_CONFIG - fi +Alternatively, you may set the environment variables XCB_DRI2_CFLAGS +and XCB_DRI2_LIBS to avoid the need to call pkg-config. +See the pkg-config man page for more details. + +To get pkg-config, see . +See \`config.log' for more details" "$LINENO" 5; } else - LLVM_CONFIG="$ac_cv_path_LLVM_CONFIG" + XCB_DRI2_CFLAGS=$pkg_cv_XCB_DRI2_CFLAGS + XCB_DRI2_LIBS=$pkg_cv_XCB_DRI2_LIBS + { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 +$as_echo "yes" >&6; } + fi + ;; - else - if test -n "$ac_tool_prefix"; then - # Extract the first word of "${ac_tool_prefix}llvm-config", so it can be a program name with args. -set dummy ${ac_tool_prefix}llvm-config; ac_word=$2 -{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 -$as_echo_n "checking for $ac_word... " >&6; } -if ${ac_cv_path_LLVM_CONFIG+:} false; then : - $as_echo_n "(cached) " >&6 -else - case $LLVM_CONFIG in - [\\/]* | ?:[\\/]*) - ac_cv_path_LLVM_CONFIG="$LLVM_CONFIG" # Let the user override the test with a path. - ;; - *) - as_save_IFS=$IFS; IFS=$PATH_SEPARATOR -for as_dir in $PATH -do - IFS=$as_save_IFS - test -z "$as_dir" && as_dir=. - for ac_exec_ext in '' $ac_executable_extensions; do - if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then - ac_cv_path_LLVM_CONFIG="$as_dir/$ac_word$ac_exec_ext" - $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 - break 2 - fi -done - done -IFS=$as_save_IFS + drm) + test "x$enable_gbm" = "xno" && + as_fn_error $? "EGL platform drm needs gbm" "$LINENO" 5 + ;; - ;; -esac + surfaceless) + ;; + + android) + +pkg_failed=no +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for ANDROID" >&5 +$as_echo_n "checking for ANDROID... " >&6; } + +if test -n "$ANDROID_CFLAGS"; then + pkg_cv_ANDROID_CFLAGS="$ANDROID_CFLAGS" + elif test -n "$PKG_CONFIG"; then + if test -n "$PKG_CONFIG" && \ + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"cutils hardware sync\""; } >&5 + ($PKG_CONFIG --exists --print-errors "cutils hardware sync") 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + pkg_cv_ANDROID_CFLAGS=`$PKG_CONFIG --cflags "cutils hardware sync" 2>/dev/null` + test "x$?" != "x0" && pkg_failed=yes +else + pkg_failed=yes fi -LLVM_CONFIG=$ac_cv_path_LLVM_CONFIG -if test -n "$LLVM_CONFIG"; then - { $as_echo "$as_me:${as_lineno-$LINENO}: result: $LLVM_CONFIG" >&5 -$as_echo "$LLVM_CONFIG" >&6; } + else + pkg_failed=untried +fi +if test -n "$ANDROID_LIBS"; then + pkg_cv_ANDROID_LIBS="$ANDROID_LIBS" + elif test -n "$PKG_CONFIG"; then + if test -n "$PKG_CONFIG" && \ + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"cutils hardware sync\""; } >&5 + ($PKG_CONFIG --exists --print-errors "cutils hardware sync") 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + pkg_cv_ANDROID_LIBS=`$PKG_CONFIG --libs "cutils hardware sync" 2>/dev/null` + test "x$?" != "x0" && pkg_failed=yes else - { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 -$as_echo "no" >&6; } + pkg_failed=yes +fi + else + pkg_failed=untried fi -fi -if test -z "$ac_cv_path_LLVM_CONFIG"; then - ac_pt_LLVM_CONFIG=$LLVM_CONFIG - # Extract the first word of "llvm-config", so it can be a program name with args. -set dummy llvm-config; ac_word=$2 -{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 -$as_echo_n "checking for $ac_word... " >&6; } -if ${ac_cv_path_ac_pt_LLVM_CONFIG+:} false; then : - $as_echo_n "(cached) " >&6 -else - case $ac_pt_LLVM_CONFIG in - [\\/]* | ?:[\\/]*) - ac_cv_path_ac_pt_LLVM_CONFIG="$ac_pt_LLVM_CONFIG" # Let the user override the test with a path. - ;; - *) - as_save_IFS=$IFS; IFS=$PATH_SEPARATOR -for as_dir in $PATH -do - IFS=$as_save_IFS - test -z "$as_dir" && as_dir=. - for ac_exec_ext in '' $ac_executable_extensions; do - if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then - ac_cv_path_ac_pt_LLVM_CONFIG="$as_dir/$ac_word$ac_exec_ext" - $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 - break 2 - fi -done - done -IFS=$as_save_IFS - ;; -esac -fi -ac_pt_LLVM_CONFIG=$ac_cv_path_ac_pt_LLVM_CONFIG -if test -n "$ac_pt_LLVM_CONFIG"; then - { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_pt_LLVM_CONFIG" >&5 -$as_echo "$ac_pt_LLVM_CONFIG" >&6; } -else - { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +if test $pkg_failed = yes; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } -fi - if test "x$ac_pt_LLVM_CONFIG" = x; then - LLVM_CONFIG="no" - else - case $cross_compiling:$ac_tool_warned in -yes:) -{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 -$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} -ac_tool_warned=yes ;; -esac - LLVM_CONFIG=$ac_pt_LLVM_CONFIG - fi +if $PKG_CONFIG --atleast-pkgconfig-version 0.20; then + _pkg_short_errors_supported=yes else - LLVM_CONFIG="$ac_cv_path_LLVM_CONFIG" + _pkg_short_errors_supported=no fi + if test $_pkg_short_errors_supported = yes; then + ANDROID_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "cutils hardware sync" 2>&1` + else + ANDROID_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "cutils hardware sync" 2>&1` + fi + # Put the nasty error message in config.log where it belongs + echo "$ANDROID_PKG_ERRORS" >&5 - fi + as_fn_error $? "Package requirements (cutils hardware sync) were not met: - if test "x$LLVM_CONFIG" != xno; then - LLVM_VERSION=`$LLVM_CONFIG --version | egrep -o '^[0-9.]+'` - LLVM_LDFLAGS=`$LLVM_CONFIG --ldflags` - LLVM_BINDIR=`$LLVM_CONFIG --bindir` - LLVM_CPPFLAGS=`strip_unwanted_llvm_flags "$LLVM_CONFIG --cppflags"` - LLVM_CFLAGS=$LLVM_CPPFLAGS # CPPFLAGS seem to be sufficient - LLVM_CXXFLAGS=`strip_unwanted_llvm_flags "$LLVM_CONFIG --cxxflags"` - LLVM_INCLUDEDIR=`$LLVM_CONFIG --includedir` - LLVM_LIBDIR=`$LLVM_CONFIG --libdir` +$ANDROID_PKG_ERRORS - if ac_fn_c_compute_int "$LINENO" "LLVM_VERSION_MAJOR" "LLVM_VERSION_MAJOR" "#include \"${LLVM_INCLUDEDIR}/llvm/Config/llvm-config.h\""; then : +Consider adjusting the PKG_CONFIG_PATH environment variable if you +installed software in a non-standard prefix. + +Alternatively, you may set the environment variables ANDROID_CFLAGS +and ANDROID_LIBS to avoid the need to call pkg-config. +See the pkg-config man page for more details." "$LINENO" 5 +elif test $pkg_failed = untried; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } + { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 +$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} +as_fn_error $? "The pkg-config script could not be found or is too old. Make sure it +is in your PATH or set the PKG_CONFIG environment variable to the full +path to pkg-config. + +Alternatively, you may set the environment variables ANDROID_CFLAGS +and ANDROID_LIBS to avoid the need to call pkg-config. +See the pkg-config man page for more details. + +To get pkg-config, see . +See \`config.log' for more details" "$LINENO" 5; } +else + ANDROID_CFLAGS=$pkg_cv_ANDROID_CFLAGS + ANDROID_LIBS=$pkg_cv_ANDROID_LIBS + { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 +$as_echo "yes" >&6; } fi + ;; - if ac_fn_c_compute_int "$LINENO" "LLVM_VERSION_MINOR" "LLVM_VERSION_MINOR" "#include \"${LLVM_INCLUDEDIR}/llvm/Config/llvm-config.h\""; then : + *) + as_fn_error $? "EGL platform '$plat' does not exist" "$LINENO" 5 + ;; + esac + + case "$plat" in + wayland|drm|surfaceless) + require_libdrm "Platform $plat" + ;; + esac +done +# libEGL wants to default to the first platform specified in +# ./configure. parse that here. +if test "x$egl_platforms" != "x"; then + FIRST_PLATFORM_CAPS=`echo $egl_platforms | sed 's| .*||' | tr '[a-z]' '[A-Z]'` + EGL_NATIVE_PLATFORM="_EGL_PLATFORM_$FIRST_PLATFORM_CAPS" +else + EGL_NATIVE_PLATFORM="_EGL_INVALID_PLATFORM" fi + if echo "$egl_platforms" | grep -q 'x11'; then + HAVE_PLATFORM_X11_TRUE= + HAVE_PLATFORM_X11_FALSE='#' +else + HAVE_PLATFORM_X11_TRUE='#' + HAVE_PLATFORM_X11_FALSE= +fi - LLVM_VERSION_PATCH=`echo $LLVM_VERSION | cut -d. -f3 | egrep -o '^[0-9]+'` - if test -z "$LLVM_VERSION_PATCH"; then - LLVM_VERSION_PATCH=0 - fi + if echo "$egl_platforms" | grep -q 'wayland'; then + HAVE_PLATFORM_WAYLAND_TRUE= + HAVE_PLATFORM_WAYLAND_FALSE='#' +else + HAVE_PLATFORM_WAYLAND_TRUE='#' + HAVE_PLATFORM_WAYLAND_FALSE= +fi - if test -n "${LLVM_VERSION_MAJOR}"; then - LLVM_VERSION_INT="${LLVM_VERSION_MAJOR}0${LLVM_VERSION_MINOR}" - else - LLVM_VERSION_INT=`echo $LLVM_VERSION | sed -e 's/\([0-9]\)\.\([0-9]\)/\10\2/g'` - fi + if echo "$egl_platforms" | grep -q 'drm'; then + HAVE_EGL_PLATFORM_DRM_TRUE= + HAVE_EGL_PLATFORM_DRM_FALSE='#' +else + HAVE_EGL_PLATFORM_DRM_TRUE='#' + HAVE_EGL_PLATFORM_DRM_FALSE= +fi - LLVM_REQUIRED_VERSION_MAJOR="3" - LLVM_REQUIRED_VERSION_MINOR="3" - if test "$LLVM_VERSION_INT" -lt "${LLVM_REQUIRED_VERSION_MAJOR}0${LLVM_REQUIRED_VERSION_MINOR}"; then - as_fn_error $? "LLVM $LLVM_REQUIRED_VERSION_MAJOR.$LLVM_REQUIRED_VERSION_MINOR or newer is required" "$LINENO" 5 - fi + if echo "$egl_platforms" | grep -q 'surfaceless'; then + HAVE_EGL_PLATFORM_SURFACELESS_TRUE= + HAVE_EGL_PLATFORM_SURFACELESS_FALSE='#' +else + HAVE_EGL_PLATFORM_SURFACELESS_TRUE='#' + HAVE_EGL_PLATFORM_SURFACELESS_FALSE= +fi - LLVM_COMPONENTS="engine bitwriter mcjit mcdisassembler" + if echo "$egl_platforms" | grep -q 'android'; then + HAVE_EGL_PLATFORM_ANDROID_TRUE= + HAVE_EGL_PLATFORM_ANDROID_FALSE='#' +else + HAVE_EGL_PLATFORM_ANDROID_TRUE='#' + HAVE_EGL_PLATFORM_ANDROID_FALSE= +fi - if $LLVM_CONFIG --components | grep -q inteljitevents ; then - LLVM_COMPONENTS="${LLVM_COMPONENTS} inteljitevents" - fi - if test "x$enable_opencl" = xyes; then - llvm_check_version_for "3" "5" "0" "opencl" - LLVM_COMPONENTS="${LLVM_COMPONENTS} all-targets ipo linker instrumentation" - LLVM_COMPONENTS="${LLVM_COMPONENTS} irreader option objcarcopts profiledata" - fi - DEFINES="${DEFINES} -DHAVE_LLVM=0x0$LLVM_VERSION_INT -DMESA_LLVM_VERSION_PATCH=$LLVM_VERSION_PATCH" - MESA_LLVM=1 - if test "x$enable_opencl" = xyes; then - if test -z "$CLANG_LIBDIR"; then - CLANG_LIBDIR=${LLVM_LIBDIR} - fi - CLANG_RESOURCE_DIR=$CLANG_LIBDIR/clang/${LLVM_VERSION} - if test ! -f "$CLANG_RESOURCE_DIR/include/stddef.h"; then : - as_fn_error $? "Could not find clang internal header stddef.h in $CLANG_RESOURCE_DIR Use --with-clang-libdir to specify the correct path to the clang libraries." "$LINENO" 5 -fi - fi - else - MESA_LLVM=0 - LLVM_VERSION_INT=0 - fi -else - MESA_LLVM=0 - LLVM_VERSION_INT=0 - if test "x$enable_opencl" = xyes; then - as_fn_error $? "cannot enable OpenCL without LLVM" "$LINENO" 5 - fi +# If we don't have the X11 platform, set this define so we don't try to include +# the X11 headers. +if ! echo "$egl_platforms" | grep -q 'x11'; then + DEFINES="$DEFINES -DMESA_EGL_NO_X11_HEADERS" + GL_PC_CFLAGS="$GL_PC_CFLAGS -DMESA_EGL_NO_X11_HEADERS" fi @@ -26604,72 +26472,32 @@ -gallium_require_drm() { - if test "x$have_libdrm" != xyes; then - as_fn_error $? "$1 requires libdrm >= $LIBDRM_REQUIRED" "$LINENO" 5 - fi -} - -gallium_require_llvm() { - if test "x$MESA_LLVM" = x0; then - case "$host" in *gnux32) return;; esac - case "$host_cpu" in - i*86|x86_64|amd64) as_fn_error $? "LLVM is required to build $1 on x86 and x86_64" "$LINENO" 5;; - esac - fi -} - -gallium_require_drm_loader() { - if test "x$need_pci_id$have_pci_id" = xyesno; then - as_fn_error $? "Gallium drm loader requires libudev >= $LIBUDEV_REQUIRED or sysfs" "$LINENO" 5 - fi +r300_require_llvm() { + case "$host" in *gnux32) return;; esac + case "$host_cpu" in + i*86|x86_64|amd64) require_llvm $1 + ;; + esac } -require_egl_drm() { - if test "x$enable_opengl" = xno; then - return 0 - fi - +require_basic_egl() { case "$with_egl_platforms" in - *drm*) + *drm*|*surfaceless*) ;; - *) - as_fn_error $? "--with-egl-platforms=drm is required to build the $1 driver." "$LINENO" 5 + *) + as_fn_error $? "$1 requires one of these: + 1) --with-egl-platforms=drm (X, Wayland, offscreen rendering based on DRM) + 2) --with-egl-platforms=surfaceless (offscreen only) + Recommended options: drm,x11" "$LINENO" 5 ;; esac - if test "x$enable_gbm" != xyes; then - as_fn_error $? "--enable-gbm is required to build the $1 driver." "$LINENO" 5 - fi -} - -radeon_llvm_check() { - if test ${LLVM_VERSION_INT} -lt 307; then - amdgpu_llvm_target_name='r600' - else - amdgpu_llvm_target_name='amdgpu' - fi - if test "x$enable_gallium_llvm" != "xyes"; then - as_fn_error $? "--enable-gallium-llvm is required when building $1" "$LINENO" 5 - fi - llvm_check_version_for "3" "6" "0" $1 - if test true && $LLVM_CONFIG --targets-built | grep -iqvw $amdgpu_llvm_target_name ; then - as_fn_error $? "LLVM $amdgpu_llvm_target_name not enabled in your LLVM build." "$LINENO" 5 - fi - LLVM_COMPONENTS="${LLVM_COMPONENTS} $amdgpu_llvm_target_name bitreader ipo" - NEED_RADEON_LLVM=yes - if test "x$have_libelf" != xyes; then - as_fn_error $? "$1 requires libelf when using llvm" "$LINENO" 5 - fi } -swr_llvm_check() { - gallium_require_llvm $1 - if test ${LLVM_VERSION_INT} -lt 306; then - as_fn_error $? "LLVM version 3.6 or later required when building $1" "$LINENO" 5 - fi +radeon_gallium_llvm_check() { if test "x$enable_gallium_llvm" != "xyes"; then - as_fn_error $? "--enable-gallium-llvm is required when building $1" "$LINENO" 5 + as_fn_error $? "--enable-gallium-llvm is required when building $2" "$LINENO" 5 fi + radeon_llvm_check $* } swr_require_cxx_feature_flags() { @@ -26740,8 +26568,7 @@ case "x$driver" in xsvga) HAVE_GALLIUM_SVGA=yes - gallium_require_drm "svga" - gallium_require_drm_loader + require_libdrm "svga" ;; xi915) HAVE_GALLIUM_I915=yes @@ -26836,8 +26663,7 @@ $as_echo "yes" >&6; } fi - gallium_require_drm "Gallium i915" - gallium_require_drm_loader + require_libdrm "Gallium i915" ;; xilo) HAVE_GALLIUM_ILO=yes @@ -26932,8 +26758,7 @@ $as_echo "yes" >&6; } fi - gallium_require_drm "Gallium i965/ilo" - gallium_require_drm_loader + require_libdrm "Gallium i965/ilo" ;; xr300) HAVE_GALLIUM_R300=yes @@ -27028,9 +26853,8 @@ $as_echo "yes" >&6; } fi - gallium_require_drm "Gallium R300" - gallium_require_drm_loader - gallium_require_llvm "Gallium R300" + require_libdrm "r300" + r300_require_llvm "r300" ;; xr600) HAVE_GALLIUM_R600=yes @@ -27125,11 +26949,12 @@ $as_echo "yes" >&6; } fi - gallium_require_drm "Gallium R600" - gallium_require_drm_loader + require_libdrm "r600" if test "x$enable_opencl" = xyes; then - radeon_llvm_check "r600g" - LLVM_COMPONENTS="${LLVM_COMPONENTS} bitreader asmparser" + radeon_gallium_llvm_check $LLVM_REQUIRED_R600 "r600" + + llvm_add_component "asmparser" "r600" + llvm_add_component "bitreader" "r600" fi ;; xradeonsi) @@ -27316,10 +27141,11 @@ $as_echo "yes" >&6; } fi - gallium_require_drm "radeonsi" - gallium_require_drm_loader - radeon_llvm_check "radeonsi" - require_egl_drm "radeonsi" + require_libdrm "radeonsi" + radeon_gallium_llvm_check $LLVM_REQUIRED_RADEONSI "radeonsi" + if test "x$enable_egl" = xyes; then + require_basic_egl "radeonsi" + fi ;; xnouveau) HAVE_GALLIUM_NOUVEAU=yes @@ -27414,8 +27240,7 @@ $as_echo "yes" >&6; } fi - gallium_require_drm "nouveau" - gallium_require_drm_loader + require_libdrm "nouveau" ;; xfreedreno) HAVE_GALLIUM_FREEDRENO=yes @@ -27510,17 +27335,114 @@ $as_echo "yes" >&6; } fi - gallium_require_drm "freedreno" - gallium_require_drm_loader + require_libdrm "freedreno" + ;; + xetnaviv) + HAVE_GALLIUM_ETNAVIV=yes + +pkg_failed=no +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for ETNAVIV" >&5 +$as_echo_n "checking for ETNAVIV... " >&6; } + +if test -n "$ETNAVIV_CFLAGS"; then + pkg_cv_ETNAVIV_CFLAGS="$ETNAVIV_CFLAGS" + elif test -n "$PKG_CONFIG"; then + if test -n "$PKG_CONFIG" && \ + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libdrm_etnaviv >= \$LIBDRM_ETNAVIV_REQUIRED\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libdrm_etnaviv >= $LIBDRM_ETNAVIV_REQUIRED") 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + pkg_cv_ETNAVIV_CFLAGS=`$PKG_CONFIG --cflags "libdrm_etnaviv >= $LIBDRM_ETNAVIV_REQUIRED" 2>/dev/null` + test "x$?" != "x0" && pkg_failed=yes +else + pkg_failed=yes +fi + else + pkg_failed=untried +fi +if test -n "$ETNAVIV_LIBS"; then + pkg_cv_ETNAVIV_LIBS="$ETNAVIV_LIBS" + elif test -n "$PKG_CONFIG"; then + if test -n "$PKG_CONFIG" && \ + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libdrm_etnaviv >= \$LIBDRM_ETNAVIV_REQUIRED\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libdrm_etnaviv >= $LIBDRM_ETNAVIV_REQUIRED") 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + pkg_cv_ETNAVIV_LIBS=`$PKG_CONFIG --libs "libdrm_etnaviv >= $LIBDRM_ETNAVIV_REQUIRED" 2>/dev/null` + test "x$?" != "x0" && pkg_failed=yes +else + pkg_failed=yes +fi + else + pkg_failed=untried +fi + + + +if test $pkg_failed = yes; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } + +if $PKG_CONFIG --atleast-pkgconfig-version 0.20; then + _pkg_short_errors_supported=yes +else + _pkg_short_errors_supported=no +fi + if test $_pkg_short_errors_supported = yes; then + ETNAVIV_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "libdrm_etnaviv >= $LIBDRM_ETNAVIV_REQUIRED" 2>&1` + else + ETNAVIV_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "libdrm_etnaviv >= $LIBDRM_ETNAVIV_REQUIRED" 2>&1` + fi + # Put the nasty error message in config.log where it belongs + echo "$ETNAVIV_PKG_ERRORS" >&5 + + as_fn_error $? "Package requirements (libdrm_etnaviv >= $LIBDRM_ETNAVIV_REQUIRED) were not met: + +$ETNAVIV_PKG_ERRORS + +Consider adjusting the PKG_CONFIG_PATH environment variable if you +installed software in a non-standard prefix. + +Alternatively, you may set the environment variables ETNAVIV_CFLAGS +and ETNAVIV_LIBS to avoid the need to call pkg-config. +See the pkg-config man page for more details." "$LINENO" 5 +elif test $pkg_failed = untried; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } + { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 +$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} +as_fn_error $? "The pkg-config script could not be found or is too old. Make sure it +is in your PATH or set the PKG_CONFIG environment variable to the full +path to pkg-config. + +Alternatively, you may set the environment variables ETNAVIV_CFLAGS +and ETNAVIV_LIBS to avoid the need to call pkg-config. +See the pkg-config man page for more details. + +To get pkg-config, see . +See \`config.log' for more details" "$LINENO" 5; } +else + ETNAVIV_CFLAGS=$pkg_cv_ETNAVIV_CFLAGS + ETNAVIV_LIBS=$pkg_cv_ETNAVIV_LIBS + { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 +$as_echo "yes" >&6; } + +fi + require_libdrm "etnaviv" + ;; + ximx) + HAVE_GALLIUM_IMX=yes ;; xswrast) HAVE_GALLIUM_SOFTPIPE=yes - if test "x$MESA_LLVM" = x1; then + if test "x$enable_gallium_llvm" = xyes; then HAVE_GALLIUM_LLVMPIPE=yes fi ;; xswr) - swr_llvm_check "swr" + llvm_require_version $LLVM_REQUIRED_SWR "swr" swr_require_cxx_feature_flags "C++11" "__cplusplus >= 201103L" \ ",-std=c++11" \ @@ -27541,8 +27463,98 @@ ;; xvc4) HAVE_GALLIUM_VC4=yes - gallium_require_drm "vc4" - gallium_require_drm_loader + +pkg_failed=no +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for VC4" >&5 +$as_echo_n "checking for VC4... " >&6; } + +if test -n "$VC4_CFLAGS"; then + pkg_cv_VC4_CFLAGS="$VC4_CFLAGS" + elif test -n "$PKG_CONFIG"; then + if test -n "$PKG_CONFIG" && \ + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libdrm_vc4 >= \$LIBDRM_VC4_REQUIRED\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libdrm_vc4 >= $LIBDRM_VC4_REQUIRED") 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + pkg_cv_VC4_CFLAGS=`$PKG_CONFIG --cflags "libdrm_vc4 >= $LIBDRM_VC4_REQUIRED" 2>/dev/null` + test "x$?" != "x0" && pkg_failed=yes +else + pkg_failed=yes +fi + else + pkg_failed=untried +fi +if test -n "$VC4_LIBS"; then + pkg_cv_VC4_LIBS="$VC4_LIBS" + elif test -n "$PKG_CONFIG"; then + if test -n "$PKG_CONFIG" && \ + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libdrm_vc4 >= \$LIBDRM_VC4_REQUIRED\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libdrm_vc4 >= $LIBDRM_VC4_REQUIRED") 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + pkg_cv_VC4_LIBS=`$PKG_CONFIG --libs "libdrm_vc4 >= $LIBDRM_VC4_REQUIRED" 2>/dev/null` + test "x$?" != "x0" && pkg_failed=yes +else + pkg_failed=yes +fi + else + pkg_failed=untried +fi + + + +if test $pkg_failed = yes; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } + +if $PKG_CONFIG --atleast-pkgconfig-version 0.20; then + _pkg_short_errors_supported=yes +else + _pkg_short_errors_supported=no +fi + if test $_pkg_short_errors_supported = yes; then + VC4_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "libdrm_vc4 >= $LIBDRM_VC4_REQUIRED" 2>&1` + else + VC4_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "libdrm_vc4 >= $LIBDRM_VC4_REQUIRED" 2>&1` + fi + # Put the nasty error message in config.log where it belongs + echo "$VC4_PKG_ERRORS" >&5 + + as_fn_error $? "Package requirements (libdrm_vc4 >= $LIBDRM_VC4_REQUIRED) were not met: + +$VC4_PKG_ERRORS + +Consider adjusting the PKG_CONFIG_PATH environment variable if you +installed software in a non-standard prefix. + +Alternatively, you may set the environment variables VC4_CFLAGS +and VC4_LIBS to avoid the need to call pkg-config. +See the pkg-config man page for more details." "$LINENO" 5 +elif test $pkg_failed = untried; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } + { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 +$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} +as_fn_error $? "The pkg-config script could not be found or is too old. Make sure it +is in your PATH or set the PKG_CONFIG environment variable to the full +path to pkg-config. + +Alternatively, you may set the environment variables VC4_CFLAGS +and VC4_LIBS to avoid the need to call pkg-config. +See the pkg-config man page for more details. + +To get pkg-config, see . +See \`config.log' for more details" "$LINENO" 5; } +else + VC4_CFLAGS=$pkg_cv_VC4_CFLAGS + VC4_LIBS=$pkg_cv_VC4_LIBS + { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 +$as_echo "yes" >&6; } + +fi + require_libdrm "vc4" pkg_failed=no @@ -27619,9 +27631,10 @@ ;; xvirgl) HAVE_GALLIUM_VIRGL=yes - gallium_require_drm "virgl" - gallium_require_drm_loader - require_egl_drm "virgl" + require_libdrm "virgl" + if test "x$enable_egl" = xyes; then + require_basic_egl "virgl" + fi ;; *) as_fn_error $? "Unknown Gallium driver: $driver" "$LINENO" 5 @@ -27630,8 +27643,23 @@ done fi +if test "x$enable_gallium_llvm" == "xyes" -a "$with_gallium_drivers"; then + llvm_require_version $LLVM_REQUIRED_GALLIUM "gallium" + llvm_add_default_components "gallium" +fi + + +if test "x$HAVE_GALLIUM_ETNAVIV" != xyes -a "x$HAVE_GALLIUM_IMX" == xyes ; then + as_fn_error $? "Building with imx requires etnaviv" "$LINENO" 5 +fi + +if test "x$enable_gallium_llvm" = xyes; then + DEFINES="${DEFINES} -DHAVE_LLVM=0x0$LLVM_VERSION_INT -DMESA_LLVM_VERSION_PATCH=$LLVM_VERSION_PATCH" + + LLVM_LDFLAGS=`$LLVM_CONFIG --ldflags` + LLVM_CFLAGS=$LLVM_CPPFLAGS # CPPFLAGS seem to be sufficient + LLVM_CXXFLAGS=`strip_unwanted_llvm_flags "$LLVM_CONFIG --cxxflags"` -if test "x$MESA_LLVM" != x0; then if ! $LLVM_CONFIG --libs ${LLVM_COMPONENTS} >/dev/null; then as_fn_error $? "Calling ${LLVM_CONFIG} failed" "$LINENO" 5 @@ -27663,7 +27691,7 @@ else { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: Building mesa with statically linked LLVM may cause compilation issues" >&5 $as_echo "$as_me: WARNING: Building mesa with statically linked LLVM may cause compilation issues" >&2;} - if test $LLVM_VERSION_MAJOR -eq 3 -a $LLVM_VERSION_MINOR -ge 5; then + if test $LLVM_VERSION_MAJOR -ge 4 -o $LLVM_VERSION_MAJOR -eq 3 -a $LLVM_VERSION_MINOR -ge 5; then LLVM_LIBS="$LLVM_LIBS `$LLVM_CONFIG --system-libs`" fi fi @@ -27742,6 +27770,22 @@ HAVE_GALLIUM_FREEDRENO_FALSE= fi + if test "x$HAVE_GALLIUM_ETNAVIV" = xyes; then + HAVE_GALLIUM_ETNAVIV_TRUE= + HAVE_GALLIUM_ETNAVIV_FALSE='#' +else + HAVE_GALLIUM_ETNAVIV_TRUE='#' + HAVE_GALLIUM_ETNAVIV_FALSE= +fi + + if test "x$HAVE_GALLIUM_IMX" = xyes; then + HAVE_GALLIUM_IMX_TRUE= + HAVE_GALLIUM_IMX_FALSE='#' +else + HAVE_GALLIUM_IMX_TRUE='#' + HAVE_GALLIUM_IMX_FALSE= +fi + if test "x$HAVE_GALLIUM_SOFTPIPE" = xyes; then HAVE_GALLIUM_SOFTPIPE_TRUE= HAVE_GALLIUM_SOFTPIPE_FALSE='#' @@ -27860,6 +27904,14 @@ fi + if test "x$HAVE_RADEON_VULKAN" = xyes; then + HAVE_RADEON_VULKAN_TRUE= + HAVE_RADEON_VULKAN_FALSE='#' +else + HAVE_RADEON_VULKAN_TRUE='#' + HAVE_RADEON_VULKAN_FALSE= +fi + if test "x$HAVE_INTEL_VULKAN" = xyes; then HAVE_INTEL_VULKAN_TRUE= HAVE_INTEL_VULKAN_FALSE='#' @@ -27869,6 +27921,17 @@ fi + if test "x$HAVE_GALLIUM_R600" = xyes -o \ + "x$HAVE_GALLIUM_RADEONSI" = xyes -o \ + "x$HAVE_RADEON_VULKAN" = xyes; then + HAVE_AMD_DRIVERS_TRUE= + HAVE_AMD_DRIVERS_FALSE='#' +else + HAVE_AMD_DRIVERS_TRUE='#' + HAVE_AMD_DRIVERS_FALSE= +fi + + if test "x$HAVE_INTEL_VULKAN" = xyes -o \ "x$HAVE_I965_DRI" = xyes; then HAVE_INTEL_DRIVERS_TRUE= @@ -27913,12 +27976,12 @@ HAVE_GALLIUM_COMPUTE_FALSE= fi - if test x$MESA_LLVM = x1; then - HAVE_MESA_LLVM_TRUE= - HAVE_MESA_LLVM_FALSE='#' + if test "x$enable_gallium_llvm" = xyes; then + HAVE_GALLIUM_LLVM_TRUE= + HAVE_GALLIUM_LLVM_FALSE='#' else - HAVE_MESA_LLVM_TRUE='#' - HAVE_MESA_LLVM_FALSE= + HAVE_GALLIUM_LLVM_TRUE='#' + HAVE_GALLIUM_LLVM_FALSE= fi if test x$USE_VC4_SIMULATOR = xyes; then @@ -28013,6 +28076,15 @@ VA_MINOR=$VA_MINOR + if test "x$VULKAN_DRIVERS" != "x"; then + HAVE_VULKAN_COMMON_TRUE= + HAVE_VULKAN_COMMON_FALSE='#' +else + HAVE_VULKAN_COMMON_TRUE='#' + HAVE_VULKAN_COMMON_FALSE= +fi + + XVMC_MAJOR=1 XVMC_MINOR=0 @@ -28032,9 +28104,6 @@ XA_VERSION="$XA_MAJOR.$XA_MINOR.$XA_TINY" -TIMESTAMP_CMD='`test $(SOURCE_DATE_EPOCH) && echo $(SOURCE_DATE_EPOCH) || date +%s`' - - # Check whether --enable-valgrind was given. if test "${enable_valgrind+set}" = set; then : enableval=$enable_valgrind; VALGRIND=$enableval @@ -28144,7 +28213,7 @@ CFLAGS="$CFLAGS $USER_CFLAGS" CXXFLAGS="$CXXFLAGS $USER_CXXFLAGS" -ac_config_files="$ac_config_files Makefile src/Makefile src/compiler/Makefile src/egl/Makefile src/egl/main/egl.pc src/egl/wayland/wayland-drm/Makefile src/egl/wayland/wayland-egl/Makefile src/egl/wayland/wayland-egl/wayland-egl.pc src/gallium/Makefile src/gallium/auxiliary/Makefile src/gallium/auxiliary/pipe-loader/Makefile src/gallium/drivers/freedreno/Makefile src/gallium/drivers/ddebug/Makefile src/gallium/drivers/i915/Makefile src/gallium/drivers/ilo/Makefile src/gallium/drivers/llvmpipe/Makefile src/gallium/drivers/noop/Makefile src/gallium/drivers/nouveau/Makefile src/gallium/drivers/r300/Makefile src/gallium/drivers/r600/Makefile src/gallium/drivers/radeon/Makefile src/gallium/drivers/radeonsi/Makefile src/gallium/drivers/rbug/Makefile src/gallium/drivers/softpipe/Makefile src/gallium/drivers/svga/Makefile src/gallium/drivers/swr/Makefile src/gallium/drivers/trace/Makefile src/gallium/drivers/vc4/Makefile src/gallium/drivers/virgl/Makefile src/gallium/state_trackers/clover/Makefile src/gallium/state_trackers/dri/Makefile src/gallium/state_trackers/glx/xlib/Makefile src/gallium/state_trackers/nine/Makefile src/gallium/state_trackers/omx/Makefile src/gallium/state_trackers/osmesa/Makefile src/gallium/state_trackers/va/Makefile src/gallium/state_trackers/vdpau/Makefile src/gallium/state_trackers/xa/Makefile src/gallium/state_trackers/xvmc/Makefile src/gallium/targets/d3dadapter9/Makefile src/gallium/targets/d3dadapter9/d3d.pc src/gallium/targets/dri/Makefile src/gallium/targets/libgl-xlib/Makefile src/gallium/targets/omx/Makefile src/gallium/targets/opencl/Makefile src/gallium/targets/opencl/mesa.icd src/gallium/targets/osmesa/Makefile src/gallium/targets/osmesa/osmesa.pc src/gallium/targets/pipe-loader/Makefile src/gallium/targets/va/Makefile src/gallium/targets/vdpau/Makefile src/gallium/targets/xa/Makefile src/gallium/targets/xa/xatracker.pc src/gallium/targets/xvmc/Makefile src/gallium/tests/trivial/Makefile src/gallium/tests/unit/Makefile src/gallium/winsys/freedreno/drm/Makefile src/gallium/winsys/i915/drm/Makefile src/gallium/winsys/intel/drm/Makefile src/gallium/winsys/nouveau/drm/Makefile src/gallium/winsys/radeon/drm/Makefile src/gallium/winsys/amdgpu/drm/Makefile src/gallium/winsys/svga/drm/Makefile src/gallium/winsys/sw/dri/Makefile src/gallium/winsys/sw/kms-dri/Makefile src/gallium/winsys/sw/null/Makefile src/gallium/winsys/sw/wrapper/Makefile src/gallium/winsys/sw/xlib/Makefile src/gallium/winsys/vc4/drm/Makefile src/gallium/winsys/virgl/drm/Makefile src/gallium/winsys/virgl/vtest/Makefile src/gbm/Makefile src/gbm/main/gbm.pc src/glx/Makefile src/glx/apple/Makefile src/glx/tests/Makefile src/gtest/Makefile src/intel/Makefile src/intel/genxml/Makefile src/intel/isl/Makefile src/intel/vulkan/Makefile src/loader/Makefile src/mapi/Makefile src/mapi/es1api/glesv1_cm.pc src/mapi/es2api/glesv2.pc src/mapi/glapi/gen/Makefile src/mesa/Makefile src/mesa/gl.pc src/mesa/drivers/dri/dri.pc src/mesa/drivers/dri/common/Makefile src/mesa/drivers/dri/common/xmlpool/Makefile src/mesa/drivers/dri/i915/Makefile src/mesa/drivers/dri/i965/Makefile src/mesa/drivers/dri/Makefile src/mesa/drivers/dri/nouveau/Makefile src/mesa/drivers/dri/r200/Makefile src/mesa/drivers/dri/radeon/Makefile src/mesa/drivers/dri/swrast/Makefile src/mesa/drivers/osmesa/Makefile src/mesa/drivers/osmesa/osmesa.pc src/mesa/drivers/x11/Makefile src/mesa/main/tests/Makefile src/util/Makefile src/util/tests/hash_table/Makefile" +ac_config_files="$ac_config_files Makefile src/Makefile src/amd/Makefile src/amd/vulkan/Makefile src/compiler/Makefile src/egl/Makefile src/egl/main/egl.pc src/egl/wayland/wayland-drm/Makefile src/egl/wayland/wayland-egl/Makefile src/egl/wayland/wayland-egl/wayland-egl.pc src/gallium/Makefile src/gallium/auxiliary/Makefile src/gallium/auxiliary/pipe-loader/Makefile src/gallium/drivers/freedreno/Makefile src/gallium/drivers/ddebug/Makefile src/gallium/drivers/i915/Makefile src/gallium/drivers/ilo/Makefile src/gallium/drivers/llvmpipe/Makefile src/gallium/drivers/noop/Makefile src/gallium/drivers/nouveau/Makefile src/gallium/drivers/r300/Makefile src/gallium/drivers/r600/Makefile src/gallium/drivers/radeon/Makefile src/gallium/drivers/radeonsi/Makefile src/gallium/drivers/rbug/Makefile src/gallium/drivers/softpipe/Makefile src/gallium/drivers/svga/Makefile src/gallium/drivers/swr/Makefile src/gallium/drivers/trace/Makefile src/gallium/drivers/etnaviv/Makefile src/gallium/drivers/imx/Makefile src/gallium/drivers/vc4/Makefile src/gallium/drivers/virgl/Makefile src/gallium/state_trackers/clover/Makefile src/gallium/state_trackers/dri/Makefile src/gallium/state_trackers/glx/xlib/Makefile src/gallium/state_trackers/nine/Makefile src/gallium/state_trackers/omx/Makefile src/gallium/state_trackers/osmesa/Makefile src/gallium/state_trackers/va/Makefile src/gallium/state_trackers/vdpau/Makefile src/gallium/state_trackers/xa/Makefile src/gallium/state_trackers/xvmc/Makefile src/gallium/targets/d3dadapter9/Makefile src/gallium/targets/d3dadapter9/d3d.pc src/gallium/targets/dri/Makefile src/gallium/targets/libgl-xlib/Makefile src/gallium/targets/omx/Makefile src/gallium/targets/opencl/Makefile src/gallium/targets/opencl/mesa.icd src/gallium/targets/osmesa/Makefile src/gallium/targets/osmesa/osmesa.pc src/gallium/targets/pipe-loader/Makefile src/gallium/targets/va/Makefile src/gallium/targets/vdpau/Makefile src/gallium/targets/xa/Makefile src/gallium/targets/xa/xatracker.pc src/gallium/targets/xvmc/Makefile src/gallium/tests/trivial/Makefile src/gallium/tests/unit/Makefile src/gallium/winsys/etnaviv/drm/Makefile src/gallium/winsys/imx/drm/Makefile src/gallium/winsys/freedreno/drm/Makefile src/gallium/winsys/i915/drm/Makefile src/gallium/winsys/intel/drm/Makefile src/gallium/winsys/nouveau/drm/Makefile src/gallium/winsys/radeon/drm/Makefile src/gallium/winsys/amdgpu/drm/Makefile src/gallium/winsys/svga/drm/Makefile src/gallium/winsys/sw/dri/Makefile src/gallium/winsys/sw/kms-dri/Makefile src/gallium/winsys/sw/null/Makefile src/gallium/winsys/sw/wrapper/Makefile src/gallium/winsys/sw/xlib/Makefile src/gallium/winsys/vc4/drm/Makefile src/gallium/winsys/virgl/drm/Makefile src/gallium/winsys/virgl/vtest/Makefile src/gbm/Makefile src/gbm/main/gbm.pc src/glx/Makefile src/glx/apple/Makefile src/glx/tests/Makefile src/glx/windows/Makefile src/glx/windows/windowsdriproto.pc src/gtest/Makefile src/intel/Makefile src/intel/tools/Makefile src/intel/vulkan/Makefile src/loader/Makefile src/mapi/Makefile src/mapi/es1api/glesv1_cm.pc src/mapi/es2api/glesv2.pc src/mapi/glapi/gen/Makefile src/mesa/Makefile src/mesa/gl.pc src/mesa/drivers/dri/dri.pc src/mesa/drivers/dri/common/Makefile src/mesa/drivers/dri/common/xmlpool/Makefile src/mesa/drivers/dri/i915/Makefile src/mesa/drivers/dri/i965/Makefile src/mesa/drivers/dri/Makefile src/mesa/drivers/dri/nouveau/Makefile src/mesa/drivers/dri/r200/Makefile src/mesa/drivers/dri/radeon/Makefile src/mesa/drivers/dri/swrast/Makefile src/mesa/drivers/osmesa/Makefile src/mesa/drivers/osmesa/osmesa.pc src/mesa/drivers/x11/Makefile src/mesa/main/tests/Makefile src/util/Makefile src/util/tests/hash_table/Makefile src/vulkan/wsi/Makefile" cat >confcache <<\_ACEOF @@ -28340,6 +28409,10 @@ as_fn_error $? "conditional \"SSE41_SUPPORTED\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 fi +if test -z "${GCC_ATOMIC_BUILTINS_SUPPORTED_TRUE}" && test -z "${GCC_ATOMIC_BUILTINS_SUPPORTED_FALSE}"; then + as_fn_error $? "conditional \"GCC_ATOMIC_BUILTINS_SUPPORTED\" was never defined. +Usually this means the macro was only invoked conditionally." "$LINENO" 5 +fi if test -z "${BUILD_SHARED_TRUE}" && test -z "${BUILD_SHARED_FALSE}"; then as_fn_error $? "conditional \"BUILD_SHARED\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 @@ -28360,6 +28433,14 @@ as_fn_error $? "conditional \"USE_LIBGLVND_GLX\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 fi +if test -z "${HAVE_GALLIUM_EXTRA_HUD_TRUE}" && test -z "${HAVE_GALLIUM_EXTRA_HUD_FALSE}"; then + as_fn_error $? "conditional \"HAVE_GALLIUM_EXTRA_HUD\" was never defined. +Usually this means the macro was only invoked conditionally." "$LINENO" 5 +fi +if test -z "${HAVE_LIBSENSORS_TRUE}" && test -z "${HAVE_LIBSENSORS_FALSE}"; then + as_fn_error $? "conditional \"HAVE_LIBSENSORS\" was never defined. +Usually this means the macro was only invoked conditionally." "$LINENO" 5 +fi if test -z "${HAVE_OPENGL_TRUE}" && test -z "${HAVE_OPENGL_FALSE}"; then as_fn_error $? "conditional \"HAVE_OPENGL\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 @@ -28420,12 +28501,20 @@ as_fn_error $? "conditional \"HAVE_APPLEDRI\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 fi -if test -z "${HAVE_SHARED_GLAPI_TRUE}" && test -z "${HAVE_SHARED_GLAPI_FALSE}"; then - as_fn_error $? "conditional \"HAVE_SHARED_GLAPI\" was never defined. +if test -z "${HAVE_LMSENSORS_TRUE}" && test -z "${HAVE_LMSENSORS_FALSE}"; then + as_fn_error $? "conditional \"HAVE_LMSENSORS\" was never defined. +Usually this means the macro was only invoked conditionally." "$LINENO" 5 +fi +if test -z "${HAVE_GALLIUM_EXTRA_HUD_TRUE}" && test -z "${HAVE_GALLIUM_EXTRA_HUD_FALSE}"; then + as_fn_error $? "conditional \"HAVE_GALLIUM_EXTRA_HUD\" was never defined. +Usually this means the macro was only invoked conditionally." "$LINENO" 5 +fi +if test -z "${HAVE_WINDOWSDRI_TRUE}" && test -z "${HAVE_WINDOWSDRI_FALSE}"; then + as_fn_error $? "conditional \"HAVE_WINDOWSDRI\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 fi -if test -z "${ENABLE_SHADER_CACHE_TRUE}" && test -z "${ENABLE_SHADER_CACHE_FALSE}"; then - as_fn_error $? "conditional \"ENABLE_SHADER_CACHE\" was never defined. +if test -z "${HAVE_SHARED_GLAPI_TRUE}" && test -z "${HAVE_SHARED_GLAPI_FALSE}"; then + as_fn_error $? "conditional \"HAVE_SHARED_GLAPI\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 fi if test -z "${HAVE_XF86VIDMODE_TRUE}" && test -z "${HAVE_XF86VIDMODE_FALSE}"; then @@ -28512,10 +28601,6 @@ as_fn_error $? "conditional \"HAVE_EGL_PLATFORM_ANDROID\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 fi -if test -z "${HAVE_EGL_DRIVER_DRI2_TRUE}" && test -z "${HAVE_EGL_DRIVER_DRI2_FALSE}"; then - as_fn_error $? "conditional \"HAVE_EGL_DRIVER_DRI2\" was never defined. -Usually this means the macro was only invoked conditionally." "$LINENO" 5 -fi if test -z "${HAVE_GALLIUM_TESTS_TRUE}" && test -z "${HAVE_GALLIUM_TESTS_FALSE}"; then as_fn_error $? "conditional \"HAVE_GALLIUM_TESTS\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 @@ -28556,6 +28641,14 @@ as_fn_error $? "conditional \"HAVE_GALLIUM_FREEDRENO\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 fi +if test -z "${HAVE_GALLIUM_ETNAVIV_TRUE}" && test -z "${HAVE_GALLIUM_ETNAVIV_FALSE}"; then + as_fn_error $? "conditional \"HAVE_GALLIUM_ETNAVIV\" was never defined. +Usually this means the macro was only invoked conditionally." "$LINENO" 5 +fi +if test -z "${HAVE_GALLIUM_IMX_TRUE}" && test -z "${HAVE_GALLIUM_IMX_FALSE}"; then + as_fn_error $? "conditional \"HAVE_GALLIUM_IMX\" was never defined. +Usually this means the macro was only invoked conditionally." "$LINENO" 5 +fi if test -z "${HAVE_GALLIUM_SOFTPIPE_TRUE}" && test -z "${HAVE_GALLIUM_SOFTPIPE_FALSE}"; then as_fn_error $? "conditional \"HAVE_GALLIUM_SOFTPIPE\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 @@ -28608,10 +28701,18 @@ as_fn_error $? "conditional \"HAVE_SWRAST_DRI\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 fi +if test -z "${HAVE_RADEON_VULKAN_TRUE}" && test -z "${HAVE_RADEON_VULKAN_FALSE}"; then + as_fn_error $? "conditional \"HAVE_RADEON_VULKAN\" was never defined. +Usually this means the macro was only invoked conditionally." "$LINENO" 5 +fi if test -z "${HAVE_INTEL_VULKAN_TRUE}" && test -z "${HAVE_INTEL_VULKAN_FALSE}"; then as_fn_error $? "conditional \"HAVE_INTEL_VULKAN\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 fi +if test -z "${HAVE_AMD_DRIVERS_TRUE}" && test -z "${HAVE_AMD_DRIVERS_FALSE}"; then + as_fn_error $? "conditional \"HAVE_AMD_DRIVERS\" was never defined. +Usually this means the macro was only invoked conditionally." "$LINENO" 5 +fi if test -z "${HAVE_INTEL_DRIVERS_TRUE}" && test -z "${HAVE_INTEL_DRIVERS_FALSE}"; then as_fn_error $? "conditional \"HAVE_INTEL_DRIVERS\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 @@ -28632,8 +28733,8 @@ as_fn_error $? "conditional \"HAVE_GALLIUM_COMPUTE\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 fi -if test -z "${HAVE_MESA_LLVM_TRUE}" && test -z "${HAVE_MESA_LLVM_FALSE}"; then - as_fn_error $? "conditional \"HAVE_MESA_LLVM\" was never defined. +if test -z "${HAVE_GALLIUM_LLVM_TRUE}" && test -z "${HAVE_GALLIUM_LLVM_FALSE}"; then + as_fn_error $? "conditional \"HAVE_GALLIUM_LLVM\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 fi if test -z "${USE_VC4_SIMULATOR_TRUE}" && test -z "${USE_VC4_SIMULATOR_FALSE}"; then @@ -28668,6 +28769,10 @@ as_fn_error $? "conditional \"HAVE_SPARC_ASM\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 fi +if test -z "${HAVE_VULKAN_COMMON_TRUE}" && test -z "${HAVE_VULKAN_COMMON_FALSE}"; then + as_fn_error $? "conditional \"HAVE_VULKAN_COMMON\" was never defined. +Usually this means the macro was only invoked conditionally." "$LINENO" 5 +fi : "${CONFIG_STATUS=./config.status}" ac_write_fail=0 @@ -29065,7 +29170,7 @@ # report actual input values of CONFIG_FILES etc. instead of their # values after options handling. ac_log=" -This file was extended by Mesa $as_me 12.0.6, which was +This file was extended by Mesa $as_me 17.0.7, which was generated by GNU Autoconf 2.69. Invocation command line was CONFIG_FILES = $CONFIG_FILES @@ -29122,7 +29227,7 @@ cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 ac_cs_config="`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`" ac_cs_version="\\ -Mesa config.status 12.0.6 +Mesa config.status 17.0.7 configured by $0, generated by GNU Autoconf 2.69, with options \\"\$ac_cs_config\\" @@ -29625,6 +29730,8 @@ "libtool") CONFIG_COMMANDS="$CONFIG_COMMANDS libtool" ;; "Makefile") CONFIG_FILES="$CONFIG_FILES Makefile" ;; "src/Makefile") CONFIG_FILES="$CONFIG_FILES src/Makefile" ;; + "src/amd/Makefile") CONFIG_FILES="$CONFIG_FILES src/amd/Makefile" ;; + "src/amd/vulkan/Makefile") CONFIG_FILES="$CONFIG_FILES src/amd/vulkan/Makefile" ;; "src/compiler/Makefile") CONFIG_FILES="$CONFIG_FILES src/compiler/Makefile" ;; "src/egl/Makefile") CONFIG_FILES="$CONFIG_FILES src/egl/Makefile" ;; "src/egl/main/egl.pc") CONFIG_FILES="$CONFIG_FILES src/egl/main/egl.pc" ;; @@ -29650,6 +29757,8 @@ "src/gallium/drivers/svga/Makefile") CONFIG_FILES="$CONFIG_FILES src/gallium/drivers/svga/Makefile" ;; "src/gallium/drivers/swr/Makefile") CONFIG_FILES="$CONFIG_FILES src/gallium/drivers/swr/Makefile" ;; "src/gallium/drivers/trace/Makefile") CONFIG_FILES="$CONFIG_FILES src/gallium/drivers/trace/Makefile" ;; + "src/gallium/drivers/etnaviv/Makefile") CONFIG_FILES="$CONFIG_FILES src/gallium/drivers/etnaviv/Makefile" ;; + "src/gallium/drivers/imx/Makefile") CONFIG_FILES="$CONFIG_FILES src/gallium/drivers/imx/Makefile" ;; "src/gallium/drivers/vc4/Makefile") CONFIG_FILES="$CONFIG_FILES src/gallium/drivers/vc4/Makefile" ;; "src/gallium/drivers/virgl/Makefile") CONFIG_FILES="$CONFIG_FILES src/gallium/drivers/virgl/Makefile" ;; "src/gallium/state_trackers/clover/Makefile") CONFIG_FILES="$CONFIG_FILES src/gallium/state_trackers/clover/Makefile" ;; @@ -29679,6 +29788,8 @@ "src/gallium/targets/xvmc/Makefile") CONFIG_FILES="$CONFIG_FILES src/gallium/targets/xvmc/Makefile" ;; "src/gallium/tests/trivial/Makefile") CONFIG_FILES="$CONFIG_FILES src/gallium/tests/trivial/Makefile" ;; "src/gallium/tests/unit/Makefile") CONFIG_FILES="$CONFIG_FILES src/gallium/tests/unit/Makefile" ;; + "src/gallium/winsys/etnaviv/drm/Makefile") CONFIG_FILES="$CONFIG_FILES src/gallium/winsys/etnaviv/drm/Makefile" ;; + "src/gallium/winsys/imx/drm/Makefile") CONFIG_FILES="$CONFIG_FILES src/gallium/winsys/imx/drm/Makefile" ;; "src/gallium/winsys/freedreno/drm/Makefile") CONFIG_FILES="$CONFIG_FILES src/gallium/winsys/freedreno/drm/Makefile" ;; "src/gallium/winsys/i915/drm/Makefile") CONFIG_FILES="$CONFIG_FILES src/gallium/winsys/i915/drm/Makefile" ;; "src/gallium/winsys/intel/drm/Makefile") CONFIG_FILES="$CONFIG_FILES src/gallium/winsys/intel/drm/Makefile" ;; @@ -29699,10 +29810,11 @@ "src/glx/Makefile") CONFIG_FILES="$CONFIG_FILES src/glx/Makefile" ;; "src/glx/apple/Makefile") CONFIG_FILES="$CONFIG_FILES src/glx/apple/Makefile" ;; "src/glx/tests/Makefile") CONFIG_FILES="$CONFIG_FILES src/glx/tests/Makefile" ;; + "src/glx/windows/Makefile") CONFIG_FILES="$CONFIG_FILES src/glx/windows/Makefile" ;; + "src/glx/windows/windowsdriproto.pc") CONFIG_FILES="$CONFIG_FILES src/glx/windows/windowsdriproto.pc" ;; "src/gtest/Makefile") CONFIG_FILES="$CONFIG_FILES src/gtest/Makefile" ;; "src/intel/Makefile") CONFIG_FILES="$CONFIG_FILES src/intel/Makefile" ;; - "src/intel/genxml/Makefile") CONFIG_FILES="$CONFIG_FILES src/intel/genxml/Makefile" ;; - "src/intel/isl/Makefile") CONFIG_FILES="$CONFIG_FILES src/intel/isl/Makefile" ;; + "src/intel/tools/Makefile") CONFIG_FILES="$CONFIG_FILES src/intel/tools/Makefile" ;; "src/intel/vulkan/Makefile") CONFIG_FILES="$CONFIG_FILES src/intel/vulkan/Makefile" ;; "src/loader/Makefile") CONFIG_FILES="$CONFIG_FILES src/loader/Makefile" ;; "src/mapi/Makefile") CONFIG_FILES="$CONFIG_FILES src/mapi/Makefile" ;; @@ -29727,6 +29839,7 @@ "src/mesa/main/tests/Makefile") CONFIG_FILES="$CONFIG_FILES src/mesa/main/tests/Makefile" ;; "src/util/Makefile") CONFIG_FILES="$CONFIG_FILES src/util/Makefile" ;; "src/util/tests/hash_table/Makefile") CONFIG_FILES="$CONFIG_FILES src/util/tests/hash_table/Makefile" ;; + "src/vulkan/wsi/Makefile") CONFIG_FILES="$CONFIG_FILES src/vulkan/wsi/Makefile" ;; *) as_fn_error $? "invalid argument: \`$ac_config_target'" "$LINENO" 5;; esac @@ -31001,9 +31114,6 @@ # Fix up dependencies in *.Plo files, where we changed the extension of a # source file $SED -i -e 's/brw_blorp.cpp/brw_blorp.c/' src/mesa/drivers/dri/i965/.deps/brw_blorp.Plo -$SED -i -e 's/gen6_blorp.cpp/gen6_blorp.c/' src/mesa/drivers/dri/i965/.deps/gen6_blorp.Plo -$SED -i -e 's/gen7_blorp.cpp/gen7_blorp.c/' src/mesa/drivers/dri/i965/.deps/gen7_blorp.Plo -$SED -i -e 's/gen8_blorp.cpp/gen8_blorp.c/' src/mesa/drivers/dri/i965/.deps/gen8_blorp.Plo echo "" @@ -31060,15 +31170,20 @@ echo " EGL platforms: $egl_platforms" egl_drivers="" - if test "x$HAVE_EGL_DRIVER_DRI2" != "x"; then + if test "x$enable_dri" != "xno"; then egl_drivers="$egl_drivers builtin:egl_dri2" fi - if test "x$HAVE_EGL_DRIVER_DRI3" != "x"; then + if test "x$enable_dri3" != "xno"; then egl_drivers="$egl_drivers builtin:egl_dri3" fi echo " EGL drivers: $egl_drivers" fi +if test "x$enable_gbm" = xyes; then + echo " GBM: yes" +else + echo " GBM: no" +fi # Vulkan echo "" @@ -31080,7 +31195,7 @@ fi echo "" -if test "x$MESA_LLVM" = x1; then +if test "x$enable_gallium_llvm" = xyes; then echo " llvm: yes" echo " llvm-config: $LLVM_CONFIG" echo " llvm-version: $LLVM_VERSION" @@ -31097,9 +31212,16 @@ fi echo "" -echo " Shader cache: $enable_shader_cache" -if test "x$enable_shader_cache" = "xyes"; then - echo " With SHA1 from: $with_sha1" +if test "x$enable_gallium_extra_hud" != xyes; then + echo " HUD extra stats: no" +else + echo " HUD extra stats: yes" +fi + +if test "x$enable_lmsensors" != xyes; then + echo " HUD lmsensors: no" +else + echo " HUD lmsensors: yes" fi echo "" @@ -31118,7 +31240,7 @@ echo " CXXFLAGS: $cxxflags" echo " Macros: $defines" echo "" -if test "x$MESA_LLVM" = x1; then +if test "x$enable_gallium_llvm" = xyes; then echo " LLVM_CFLAGS: $LLVM_CFLAGS" echo " LLVM_CXXFLAGS: $LLVM_CXXFLAGS" echo " LLVM_CPPFLAGS: $LLVM_CPPFLAGS" diff -Nru mesa-12.0.6/configure.ac mesa-17.0.7/configure.ac --- mesa-12.0.6/configure.ac 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/configure.ac 2017-06-01 10:37:10.000000000 +0000 @@ -9,7 +9,6 @@ dnl Copyright © 2011-2012 Benjamin Franzke dnl Copyright © 2008-2014 David Airlie dnl Copyright © 2009-2013 Brian Paul -dnl Copyright © 2003-2007 Keith Packard, Daniel Stone dnl dnl Permission is hereby granted, free of charge, to any person obtaining a dnl copy of this software and associated documentation files (the "Software"), @@ -74,22 +73,32 @@ LIBDRM_INTEL_REQUIRED=2.4.61 LIBDRM_NVVIEUX_REQUIRED=2.4.66 LIBDRM_NOUVEAU_REQUIRED=2.4.66 -LIBDRM_FREEDRENO_REQUIRED=2.4.67 +LIBDRM_FREEDRENO_REQUIRED=2.4.74 +LIBDRM_VC4_REQUIRED=2.4.69 +LIBDRM_ETNAVIV_REQUIRED=2.4.74 DRI2PROTO_REQUIRED=2.6 DRI3PROTO_REQUIRED=1.0 PRESENTPROTO_REQUIRED=1.0 -LIBUDEV_REQUIRED=151 GLPROTO_REQUIRED=1.4.14 LIBOMXIL_BELLAGIO_REQUIRED=0.0 LIBVA_REQUIRED=0.38.0 VDPAU_REQUIRED=1.1 -WAYLAND_REQUIRED=1.2.0 +WAYLAND_REQUIRED=1.11 XCB_REQUIRED=1.9.3 XCBDRI2_REQUIRED=1.8 XCBGLX_REQUIRED=1.8.1 XSHMFENCE_REQUIRED=1.1 XVMC_REQUIRED=1.0.6 -PYTHON_MAKO_REQUIRED=0.3.4 +PYTHON_MAKO_REQUIRED=0.8.0 +LIBSENSORS_REQUIRED=4.0.0 + +dnl LLVM versions +LLVM_REQUIRED_GALLIUM=3.3.0 +LLVM_REQUIRED_OPENCL=3.6.0 +LLVM_REQUIRED_R600=3.6.0 +LLVM_REQUIRED_RADEONSI=3.6.0 +LLVM_REQUIRED_RADV=3.9.0 +LLVM_REQUIRED_SWR=3.6.0 dnl Check for progs AC_PROG_CPP @@ -108,6 +117,7 @@ LT_INIT([disable-static]) AC_CHECK_PROG(RM, rm, [rm -f]) +AC_CHECK_PROG(XXD, xxd, [xxd]) AX_PROG_BISON([], AS_IF([test ! -f "$srcdir/src/compiler/glsl/glcpp/glcpp-parse.c"], @@ -228,6 +238,7 @@ AX_GCC_FUNC_ATTRIBUTE([visibility]) AX_GCC_FUNC_ATTRIBUTE([warn_unused_result]) AX_GCC_FUNC_ATTRIBUTE([weak]) +AX_GCC_FUNC_ATTRIBUTE([alias]) AM_CONDITIONAL([GEN_ASM_OFFSETS], test "x$GEN_ASM_OFFSETS" = xyes) @@ -255,15 +266,12 @@ *-android) android=yes ;; -linux*|*-gnu*|gnu*) +linux*|*-gnu*|gnu*|cygwin*) DEFINES="$DEFINES -D_GNU_SOURCE" ;; solaris*) DEFINES="$DEFINES -DSVR4" ;; -cygwin*) - DEFINES="$DEFINES -D_XOPEN_SOURCE=700" - ;; esac AM_CONDITIONAL(HAVE_ANDROID, test "x$android" = xyes) @@ -302,16 +310,9 @@ # Restore CFLAGS; VISIBILITY_CFLAGS are added to it where needed. CFLAGS=$save_CFLAGS - # Work around aliasing bugs - developers should comment this out - CFLAGS="$CFLAGS -fno-strict-aliasing" - # We don't want floating-point math functions to set errno or trap CFLAGS="$CFLAGS -fno-math-errno -fno-trapping-math" - # gcc's builtin memcmp is slower than glibc's - # http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43052 - CFLAGS="$CFLAGS -fno-builtin-memcmp" - # Flags to help ensure that certain portions of the code -- and only those # portions -- can be built with MSVC: # - src/util, src/gallium/auxiliary, rc/gallium/drivers/llvmpipe, and @@ -348,12 +349,8 @@ # Restore CXXFLAGS; VISIBILITY_CXXFLAGS are added to it where needed. CXXFLAGS=$save_CXXFLAGS - # Work around aliasing bugs - developers should comment this out - CXXFLAGS="$CXXFLAGS -fno-strict-aliasing" - - # gcc's builtin memcmp is slower than glibc's - # http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43052 - CXXFLAGS="$CXXFLAGS -fno-builtin-memcmp" + # We don't want floating-point math functions to set errno or trap + CXXFLAGS="$CXXFLAGS -fno-math-errno -fno-trapping-math" fi AC_SUBST([MSVC2013_COMPAT_CFLAGS]) @@ -399,6 +396,17 @@ AM_CONDITIONAL([SSE41_SUPPORTED], [test x$SSE41_SUPPORTED = x1]) AC_SUBST([SSE41_CFLAGS], $SSE41_CFLAGS) +dnl Check for new-style atomic builtins +AC_COMPILE_IFELSE([AC_LANG_SOURCE([[ +int main() { + int n; + return __atomic_load_n(&n, __ATOMIC_ACQUIRE); +}]])], GCC_ATOMIC_BUILTINS_SUPPORTED=1) +if test "x$GCC_ATOMIC_BUILTINS_SUPPORTED" = x1; then + DEFINES="$DEFINES -DUSE_GCC_ATOMIC_BUILTINS" +fi +AM_CONDITIONAL([GCC_ATOMIC_BUILTINS_SUPPORTED], [test x$GCC_ATOMIC_BUILTINS_SUPPORTED = x1]) + dnl Check for Endianness AC_C_BIGENDIAN( little_endian=no, @@ -459,12 +467,10 @@ dnl was explicitly requested. case "x$enable_static$enable_shared" in xyesyes) - AC_MSG_WARN([Cannot build static and shared libraries, disabling shared]) - enable_shared=no + AC_MSG_ERROR([Cannot enable both static and shared. Building using --enable-shared is strongly recommended]) ;; xnono) - AC_MSG_WARN([Cannot disable both static and shared libraries, enabling shared]) - enable_shared=yes + AC_MSG_ERROR([Cannot disable both static and shared. Building using --enable-shared is strongly recommended]) ;; esac @@ -824,12 +830,27 @@ fi dnl AX_PTHREADS leaves PTHREAD_LIBS empty for gcc and sets PTHREAD_CFLAGS dnl to -pthread, which causes problems if we need -lpthread to appear in -dnl pkgconfig files. -test -z "$PTHREAD_LIBS" && PTHREAD_LIBS="-lpthread" +dnl pkgconfig files. Since Android doesn't have a pthread lib, this check +dnl is not valid for that platform. +if test "x$android" = xno; then + test -z "$PTHREAD_LIBS" && PTHREAD_LIBS="-lpthread" +fi + +dnl pthread-stubs is mandatory on targets where it exists +case "$host_os" in +cygwin* ) + pthread_stubs_possible="no" + ;; +* ) + pthread_stubs_possible="yes" + ;; +esac -PKG_CHECK_MODULES(PTHREADSTUBS, pthread-stubs) -AC_SUBST(PTHREADSTUBS_CFLAGS) -AC_SUBST(PTHREADSTUBS_LIBS) +if test "x$pthread_stubs_possible" = xyes; then + PKG_CHECK_MODULES(PTHREADSTUBS, pthread-stubs) + AC_SUBST(PTHREADSTUBS_CFLAGS) + AC_SUBST(PTHREADSTUBS_LIBS) +fi dnl SELinux awareness. AC_ARG_ENABLE([selinux], @@ -849,6 +870,207 @@ AC_SUBST([SELINUX_CFLAGS]) AC_SUBST([SELINUX_LIBS]) +dnl +dnl LLVM +dnl +AC_ARG_ENABLE([llvm-shared-libs], + [AS_HELP_STRING([--enable-llvm-shared-libs], + [link with LLVM shared libraries @<:@default=enabled@:>@])], + [enable_llvm_shared_libs="$enableval"], + [enable_llvm_shared_libs=yes]) + +AC_ARG_WITH([llvm-prefix], + [AS_HELP_STRING([--with-llvm-prefix], + [Prefix for LLVM installations in non-standard locations])], + [llvm_prefix="$withval"], + [llvm_prefix='']) + +PKG_CHECK_MODULES([LIBELF], [libelf], [have_libelf=yes], [have_libelf=no]) +if test "x$have_libelf" = xno; then + LIBELF_LIBS='' + LIBELF_CFLAGS='' + AC_CHECK_LIB([elf], [elf_memory], [have_libelf=yes;LIBELF_LIBS=-lelf], [have_libelf=no]) + AC_SUBST([LIBELF_LIBS]) + AC_SUBST([LIBELF_CFLAGS]) +fi + +if test -z "$LLVM_CONFIG"; then + if test -n "$llvm_prefix"; then + AC_PATH_TOOL([LLVM_CONFIG], [llvm-config], [no], ["$llvm_prefix/bin"]) + else + AC_PATH_TOOL([LLVM_CONFIG], [llvm-config], [no]) + fi +fi + +llvm_add_component() { + new_llvm_component=$1 + driver_name=$2 + + if $LLVM_CONFIG --components | grep -iqw $new_llvm_component ; then + LLVM_COMPONENTS="${LLVM_COMPONENTS} ${new_llvm_component}" + else + AC_MSG_ERROR([LLVM component '$new_llvm_component' not enabled in your LLVM build. Required by $driver_name.]) + fi +} + +llvm_add_default_components() { + driver_name=$1 + + # Required default components + llvm_add_component "bitwriter" $driver_name + llvm_add_component "engine" $driver_name + llvm_add_component "mcdisassembler" $driver_name + llvm_add_component "mcjit" $driver_name + + # Optional default components + if $LLVM_CONFIG --components | grep -iqw inteljitevents ; then + LLVM_COMPONENTS="$LLVM_COMPONENTS inteljitevents" + fi +} + +llvm_add_target() { + new_llvm_target=$1 + driver_name=$2 + + if $LLVM_CONFIG --targets-built | grep -iqw $new_llvm_target ; then + llvm_add_component $new_llvm_target $driver_name + else + AC_MSG_ERROR([LLVM target '$new_llvm_target' not enabled in your LLVM build. Required by $driver_name.]) + fi +} + +# Call this inside ` ` to get the return value. +# $1 is the llvm-config command with arguments. +strip_unwanted_llvm_flags() { + # Use \> (marks the end of the word) + echo " `$1`" | sed \ + -e 's/\s\+-m\S*//g' \ + -e 's/\s\+-DNDEBUG\>//g' \ + -e 's/\s\+-D_GNU_SOURCE\>//g' \ + -e 's/\s\+-pedantic\>//g' \ + -e 's/\s\+-W\S*//g' \ + -e 's/\s\+-O\S*//g' \ + -e 's/\s\+-g\S*//g' \ + -e 's/-fno-rtti\>/-Fno-rtti/g' \ + -e 's/\s\+-f\S*//g' \ + -e 's/-Fno-rtti\>/-fno-rtti/g' \ + -e 's/^ //' +} + +llvm_set_environment_variables() { + if test "x$LLVM_CONFIG" != xno; then + LLVM_VERSION=`$LLVM_CONFIG --version | egrep -o '^[[0-9.]]+'` + LLVM_BINDIR=`$LLVM_CONFIG --bindir` + LLVM_CPPFLAGS=`strip_unwanted_llvm_flags "$LLVM_CONFIG --cppflags"` + LLVM_INCLUDEDIR=`$LLVM_CONFIG --includedir` + LLVM_LIBDIR=`$LLVM_CONFIG --libdir` + + # We need to respect LLVM_CPPFLAGS when compiling LLVM headers. + save_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS $LLVM_CPPFLAGS" + + AC_COMPUTE_INT([LLVM_VERSION_MAJOR], [LLVM_VERSION_MAJOR], + [#include "${LLVM_INCLUDEDIR}/llvm/Config/llvm-config.h"]) + AC_COMPUTE_INT([LLVM_VERSION_MINOR], [LLVM_VERSION_MINOR], + [#include "${LLVM_INCLUDEDIR}/llvm/Config/llvm-config.h"]) + AC_COMPUTE_INT([LLVM_VERSION_PATCH], [LLVM_VERSION_PATCH], + [#include "${LLVM_INCLUDEDIR}/llvm/Config/llvm-config.h"]) + + CFLAGS="$save_CFLAGS" + + # Only needed for LLVM < 3.6.0 + if test -z "$LLVM_VERSION_PATCH"; then + LLVM_VERSION_PATCH=0 + fi + + if test "$LLVM_VERSION_MINOR" -lt 10; then + LLVM_VERSION_INT="${LLVM_VERSION_MAJOR}0${LLVM_VERSION_MINOR}" + else + LLVM_VERSION_INT="${LLVM_VERSION_MAJOR}${LLVM_VERSION_MINOR}" + fi + + FOUND_LLVM=yes + else + FOUND_LLVM=no + LLVM_VERSION_INT=0 + fi +} + +require_llvm() { + if test "x$enable_gallium_llvm" != "xyes"; then + AC_MSG_ERROR([--enable-gallium-llvm is required when building $1]) + fi +} + +llvm_require_version() { + require_llvm $2 + + llvm_target_version_major=`echo $1 | cut -d. -f1 | egrep -o '^[[0-9]]+'` + llvm_target_version_minor=`echo $1 | cut -d. -f2 | egrep -o '^[[0-9]]+'` + llvm_target_version_patch=`echo $1 | cut -d. -f3 | egrep -o '^[[0-9]]+'` + + if test "$LLVM_VERSION_MAJOR" -gt "$llvm_target_version_major"; then + # major > required major + # --> OK + return + fi + + if test "$LLVM_VERSION_MAJOR" -eq "$llvm_target_version_major"; then + if test "$LLVM_VERSION_MINOR" -gt "$llvm_target_version_minor"; then + # major = required major and + # minor > required minor + # --> OK + return + else + if test "$LLVM_VERSION_MINOR" -eq "$llvm_target_version_minor"; then + if test "$LLVM_VERSION_PATCH" -ge "$llvm_target_version_patch"; then + # major = required major and + # minor = required minor and + # patch >= required patch + # --> OK + return + fi + fi + fi + fi + + AC_MSG_ERROR([LLVM $1 or newer is required for $2]) +} + +radeon_llvm_check() { + if test ${LLVM_VERSION_INT} -lt 307; then + amdgpu_llvm_target_name='r600' + else + amdgpu_llvm_target_name='amdgpu' + fi + + llvm_require_version $* + + llvm_add_target $amdgpu_llvm_target_name $2 + + llvm_add_default_components $2 + llvm_add_component "bitreader" $2 + llvm_add_component "ipo" $2 + + NEED_RADEON_LLVM=yes + if test "x$have_libelf" != xyes; then + AC_MSG_ERROR([$1 requires libelf when using llvm]) + fi +} + +llvm_set_environment_variables + +AC_SUBST([MESA_LLVM]) +AC_SUBST([LLVM_BINDIR]) +AC_SUBST([LLVM_CFLAGS]) +AC_SUBST([LLVM_CPPFLAGS]) +AC_SUBST([LLVM_CXXFLAGS]) +AC_SUBST([LLVM_LIBDIR]) +AC_SUBST([LLVM_LIBS]) +AC_SUBST([LLVM_LDFLAGS]) +AC_SUBST([LLVM_INCLUDEDIR]) +AC_SUBST([LLVM_VERSION]) + dnl Options for APIs AC_ARG_ENABLE([opengl], [AS_HELP_STRING([--disable-opengl], @@ -872,6 +1094,32 @@ [enable_dri="$enableval"], [enable_dri=yes]) +AC_ARG_ENABLE([gallium-extra-hud], + [AS_HELP_STRING([--enable-gallium-extra-hud], + [enable HUD block/NIC I/O HUD stats support @<:@default=disabled@:>@])], + [enable_gallium_extra_hud="$enableval"], + [enable_gallium_extra_hud=no]) +AM_CONDITIONAL(HAVE_GALLIUM_EXTRA_HUD, test "x$enable_gallium_extra_hud" = xyes) +if test "x$enable_gallium_extra_hud" = xyes ; then + DEFINES="${DEFINES} -DHAVE_GALLIUM_EXTRA_HUD=1" +fi + +#TODO: no pkgconfig .pc available for libsensors. +#PKG_CHECK_MODULES([LIBSENSORS], [libsensors >= $LIBSENSORS_REQUIRED], [enable_lmsensors=yes], [enable_lmsensors=no]) +AC_ARG_ENABLE([lmsensors], + [AS_HELP_STRING([--enable-lmsensors], + [enable HUD lmsensor support @<:@default=disabled@:>@])], + [enable_lmsensors="$enableval"], + [enable_lmsensors=no]) +AM_CONDITIONAL(HAVE_LIBSENSORS, test "x$enable_lmsensors" = xyes) +if test "x$enable_lmsensors" = xyes ; then + DEFINES="${DEFINES} -DHAVE_LIBSENSORS=1" + LIBSENSORS_LIBS="-lsensors" +else + LIBSENSORS_LIBS="" +fi +AC_SUBST(LIBSENSORS_LIBS) + case "$host_os" in linux*) dri3_default=yes @@ -918,9 +1166,16 @@ [enable_xa=no]) AC_ARG_ENABLE([gbm], [AS_HELP_STRING([--enable-gbm], - [enable gbm library @<:@default=auto@:>@])], + [enable gbm library @<:@default=yes except cygwin@:>@])], [enable_gbm="$enableval"], - [enable_gbm=auto]) + [case "$host_os" in + cygwin*) + enable_gbm=no + ;; + *) + enable_gbm=yes + ;; + esac]) AC_ARG_ENABLE([nine], [AS_HELP_STRING([--enable-nine], [enable build of the nine Direct3D9 API @<:@default=no@:>@])], @@ -973,7 +1228,7 @@ AC_ARG_WITH([gallium-drivers], [AS_HELP_STRING([--with-gallium-drivers@<:@=DIRS...@:>@], [comma delimited Gallium drivers list, e.g. - "i915,ilo,nouveau,r300,r600,radeonsi,freedreno,svga,swrast,vc4,virgl" + "i915,ilo,nouveau,r300,r600,radeonsi,freedreno,svga,swrast,vc4,virgl,etnaviv,imx" @<:@default=r300,r600,svga,swrast@:>@])], [with_gallium_drivers="$withval"], [with_gallium_drivers="$GALLIUM_DRIVERS_DEFAULT"]) @@ -1103,11 +1358,20 @@ DEFINES="$DEFINES -DHAVE_LIBDRM" fi +require_libdrm() { + if test "x$have_libdrm" != xyes; then + AC_MSG_ERROR([$1 requires libdrm >= $LIBDRM_REQUIRED]) + fi +} + + # Select which platform-dependent DRI code gets built case "$host_os" in darwin*) dri_platform='apple' ;; -gnu*|cygwin*) +cygwin*) + dri_platform='windows' ;; +gnu*) dri_platform='none' ;; *) dri_platform='drm' ;; @@ -1123,6 +1387,9 @@ AM_CONDITIONAL(HAVE_DRI2, test "x$enable_dri" = xyes -a "x$dri_platform" = xdrm -a "x$have_libdrm" = xyes ) AM_CONDITIONAL(HAVE_DRI3, test "x$enable_dri3" = xyes -a "x$dri_platform" = xdrm -a "x$have_libdrm" = xyes ) AM_CONDITIONAL(HAVE_APPLEDRI, test "x$enable_dri" = xyes -a "x$dri_platform" = xapple ) +AM_CONDITIONAL(HAVE_LMSENSORS, test "x$enable_lmsensors" = xyes ) +AM_CONDITIONAL(HAVE_GALLIUM_EXTRA_HUD, test "x$enable_gallium_extra_hud" = xyes ) +AM_CONDITIONAL(HAVE_WINDOWSDRI, test "x$enable_dri" = xyes -a "x$dri_platform" = xwindows ) AC_ARG_ENABLE([shared-glapi], [AS_HELP_STRING([--enable-shared-glapi], @@ -1159,172 +1426,24 @@ fi fi -AC_SUBST([MESA_LLVM]) - -# SHA1 hashing -AC_ARG_WITH([sha1], - [AS_HELP_STRING([--with-sha1=libc|libmd|libnettle|libgcrypt|libcrypto|libsha1|CommonCrypto|CryptoAPI], - [choose SHA1 implementation])]) -case "x$with_sha1" in -x | xlibc | xlibmd | xlibnettle | xlibgcrypt | xlibcrypto | xlibsha1 | xCommonCrypto | xCryptoAPI) - ;; -*) - AC_MSG_ERROR([Illegal value for --with-sha1: $with_sha1]) -esac - -AC_CHECK_FUNC([SHA1Init], [HAVE_SHA1_IN_LIBC=yes]) -if test "x$with_sha1" = x && test "x$HAVE_SHA1_IN_LIBC" = xyes; then - with_sha1=libc -fi -if test "x$with_sha1" = xlibc && test "x$HAVE_SHA1_IN_LIBC" != xyes; then - AC_MSG_ERROR([sha1 in libc requested but not found]) -fi -if test "x$with_sha1" = xlibc; then - AC_DEFINE([HAVE_SHA1_IN_LIBC], [1], - [Use libc SHA1 functions]) - SHA1_LIBS="" -fi -AC_CHECK_FUNC([CC_SHA1_Init], [HAVE_SHA1_IN_COMMONCRYPTO=yes]) -if test "x$with_sha1" = x && test "x$HAVE_SHA1_IN_COMMONCRYPTO" = xyes; then - with_sha1=CommonCrypto -fi -if test "x$with_sha1" = xCommonCrypto && test "x$HAVE_SHA1_IN_COMMONCRYPTO" != xyes; then - AC_MSG_ERROR([CommonCrypto requested but not found]) -fi -if test "x$with_sha1" = xCommonCrypto; then - AC_DEFINE([HAVE_SHA1_IN_COMMONCRYPTO], [1], - [Use CommonCrypto SHA1 functions]) - SHA1_LIBS="" -fi -dnl stdcall functions cannot be tested with AC_CHECK_LIB -AC_CHECK_HEADER([wincrypt.h], [HAVE_SHA1_IN_CRYPTOAPI=yes], [], [#include ]) -if test "x$with_sha1" = x && test "x$HAVE_SHA1_IN_CRYPTOAPI" = xyes; then - with_sha1=CryptoAPI -fi -if test "x$with_sha1" = xCryptoAPI && test "x$HAVE_SHA1_IN_CRYPTOAPI" != xyes; then - AC_MSG_ERROR([CryptoAPI requested but not found]) -fi -if test "x$with_sha1" = xCryptoAPI; then - AC_DEFINE([HAVE_SHA1_IN_CRYPTOAPI], [1], - [Use CryptoAPI SHA1 functions]) - SHA1_LIBS="" -fi -AC_CHECK_LIB([md], [SHA1Init], [HAVE_LIBMD=yes]) -if test "x$with_sha1" = x && test "x$HAVE_LIBMD" = xyes; then - with_sha1=libmd -fi -if test "x$with_sha1" = xlibmd && test "x$HAVE_LIBMD" != xyes; then - AC_MSG_ERROR([libmd requested but not found]) -fi -if test "x$with_sha1" = xlibmd; then - AC_DEFINE([HAVE_SHA1_IN_LIBMD], [1], - [Use libmd SHA1 functions]) - SHA1_LIBS=-lmd -fi -PKG_CHECK_MODULES([LIBSHA1], [libsha1], [HAVE_LIBSHA1=yes], [HAVE_LIBSHA1=no]) -if test "x$with_sha1" = x && test "x$HAVE_LIBSHA1" = xyes; then - with_sha1=libsha1 -fi -if test "x$with_sha1" = xlibsha1 && test "x$HAVE_LIBSHA1" != xyes; then - AC_MSG_ERROR([libsha1 requested but not found]) -fi -if test "x$with_sha1" = xlibsha1; then - AC_DEFINE([HAVE_SHA1_IN_LIBSHA1], [1], - [Use libsha1 for SHA1]) - SHA1_LIBS=-lsha1 -fi -AC_CHECK_LIB([nettle], [nettle_sha1_init], [HAVE_LIBNETTLE=yes]) -if test "x$with_sha1" = x && test "x$HAVE_LIBNETTLE" = xyes; then - with_sha1=libnettle -fi -if test "x$with_sha1" = xlibnettle && test "x$HAVE_LIBNETTLE" != xyes; then - AC_MSG_ERROR([libnettle requested but not found]) -fi -if test "x$with_sha1" = xlibnettle; then - AC_DEFINE([HAVE_SHA1_IN_LIBNETTLE], [1], - [Use libnettle SHA1 functions]) - SHA1_LIBS=-lnettle -fi -AC_CHECK_LIB([gcrypt], [gcry_md_open], [HAVE_LIBGCRYPT=yes]) -if test "x$with_sha1" = x && test "x$HAVE_LIBGCRYPT" = xyes; then - with_sha1=libgcrypt -fi -if test "x$with_sha1" = xlibgcrypt && test "x$HAVE_LIBGCRYPT" != xyes; then - AC_MSG_ERROR([libgcrypt requested but not found]) -fi -if test "x$with_sha1" = xlibgcrypt; then - AC_DEFINE([HAVE_SHA1_IN_LIBGCRYPT], [1], - [Use libgcrypt SHA1 functions]) - SHA1_LIBS=-lgcrypt -fi -# We don't need all of the OpenSSL libraries, just libcrypto -AC_CHECK_LIB([crypto], [SHA1_Init], [HAVE_LIBCRYPTO=yes]) -PKG_CHECK_MODULES([OPENSSL], [openssl], [HAVE_OPENSSL_PKC=yes], - [HAVE_OPENSSL_PKC=no]) -if test "x$HAVE_LIBCRYPTO" = xyes || test "x$HAVE_OPENSSL_PKC" = xyes; then - if test "x$with_sha1" = x; then - with_sha1=libcrypto - fi -else - if test "x$with_sha1" = xlibcrypto; then - AC_MSG_ERROR([OpenSSL libcrypto requested but not found]) - fi -fi -if test "x$with_sha1" = xlibcrypto; then - if test "x$HAVE_LIBCRYPTO" = xyes; then - SHA1_LIBS=-lcrypto - else - SHA1_LIBS="$OPENSSL_LIBS" - SHA1_CFLAGS="$OPENSSL_CFLAGS" - fi -fi -AC_MSG_CHECKING([for SHA1 implementation]) -AC_MSG_RESULT([$with_sha1]) -AC_SUBST(SHA1_LIBS) -AC_SUBST(SHA1_CFLAGS) - -# Enable a define for SHA1 -if test "x$with_sha1" != "x"; then - DEFINES="$DEFINES -DHAVE_SHA1" -fi - -# Allow user to configure out the shader-cache feature -AC_ARG_ENABLE([shader-cache], - AS_HELP_STRING([--disable-shader-cache], [Disable binary shader cache]), - [enable_shader_cache="$enableval"], - [if test "x$with_sha1" != "x"; then - enable_shader_cache=yes - else - enable_shader_cache=no - fi]) -if test "x$with_sha1" = "x"; then - if test "x$enable_shader_cache" = "xyes"; then - AC_MSG_ERROR([Cannot enable shader cache (no SHA-1 implementation found)]) +require_dri_shared_libs_and_glapi() { + if test "x$enable_static" = xyes; then + AC_MSG_ERROR([$1 cannot be build as static library]) fi -fi -AM_CONDITIONAL([ENABLE_SHADER_CACHE], [test x$enable_shader_cache = xyes]) -case "$host_os" in -linux*) - need_pci_id=yes ;; -*) - need_pci_id=no ;; -esac - -PKG_CHECK_MODULES([LIBUDEV], [libudev >= $LIBUDEV_REQUIRED], - have_libudev=yes, have_libudev=no) + if test "x$enable_dri" != xyes; then + # There is only a single backend which won't be build/used otherwise. + # XXX: Revisit this as the egl/haiku is a thing. + AC_MSG_ERROR([$1 requires --enable-dri]) + fi -AC_ARG_ENABLE([sysfs], - [AS_HELP_STRING([--enable-sysfs], - [enable /sys PCI identification @<:@default=disabled@:>@])], - [have_sysfs="$enableval"], - [have_sysfs=no] -) + if test "x$enable_shared_glapi" != xyes; then + AC_MSG_ERROR([$1 requires --enable-shared-glapi]) + fi +} if test "x$enable_dri" = xyes; then - if test "$enable_static" = yes; then - AC_MSG_ERROR([Cannot use static libraries for DRI drivers]) - fi + require_dri_shared_libs_and_glapi "DRI" # not a hard requirement as swrast does not depend on it if test "x$have_libdrm" = xyes; then @@ -1342,6 +1461,9 @@ dnl dnl libGL configuration per driver dnl +if test "x$enable_glx" != xno; then + PKG_CHECK_MODULES([GLPROTO], [glproto >= $GLPROTO_REQUIRED]) +fi case "x$enable_glx" in xxlib | xgallium-xlib) # Xlib-based GLX @@ -1355,7 +1477,6 @@ ;; xdri) # DRI-based GLX - PKG_CHECK_MODULES([GLPROTO], [glproto >= $GLPROTO_REQUIRED]) # find the DRI deps for libGL dri_modules="x11 xext xdamage xfixes x11-xcb xcb xcb-glx >= $XCBGLX_REQUIRED" @@ -1363,9 +1484,7 @@ if test x"$driglx_direct" = xyes; then if test x"$dri_platform" = xdrm ; then DEFINES="$DEFINES -DGLX_USE_DRM" - if test "x$have_libdrm" != xyes; then - AC_MSG_ERROR([Direct rendering requires libdrm >= $LIBDRM_REQUIRED]) - fi + require_libdrm "Direct rendering" PKG_CHECK_MODULES([DRI2PROTO], [dri2proto >= $DRI2PROTO_REQUIRED]) GL_PC_REQ_PRIV="$GL_PC_REQ_PRIV libdrm >= $LIBDRM_REQUIRED" @@ -1387,6 +1506,9 @@ if test x"$dri_platform" = xapple ; then DEFINES="$DEFINES -DGLX_USE_APPLEGL" fi + if test x"$dri_platform" = xwindows ; then + DEFINES="$DEFINES -DGLX_USE_WINDOWSGL" + fi fi # add xf86vidmode if available @@ -1406,17 +1528,6 @@ ;; esac -have_pci_id=no -if test "$have_libudev" = yes; then - DEFINES="$DEFINES -DHAVE_LIBUDEV" - have_pci_id=yes -fi - -if test "$have_sysfs" = yes; then - DEFINES="$DEFINES -DHAVE_SYSFS" - have_pci_id=yes -fi - # This is outside the case (above) so that it is invoked even for non-GLX # builds. AM_CONDITIONAL(HAVE_XF86VIDMODE, test "x$HAVE_XF86VIDMODE" = xyes) @@ -1460,13 +1571,14 @@ AC_ARG_ENABLE([glx-tls], [AS_HELP_STRING([--enable-glx-tls], - [enable TLS support in GLX @<:@default=disabled@:>@])], + [enable TLS support in GLX @<:@default=enabled@:>@])], [GLX_USE_TLS="$enableval"], - [GLX_USE_TLS=no]) + [GLX_USE_TLS=yes]) AC_SUBST(GLX_TLS, ${GLX_USE_TLS}) -AS_IF([test "x$GLX_USE_TLS" = xyes -a "x$ax_pthread_ok" = xyes], - [DEFINES="${DEFINES} -DGLX_USE_TLS"]) +if test "x$GLX_USE_TLS" = xyes; then + DEFINES="$DEFINES -DGLX_USE_TLS" +fi dnl Read-only text section on x86 hardened platforms AC_ARG_ENABLE([glx-read-only-text], @@ -1520,15 +1632,10 @@ # Platform specific settings and drivers to build case "$host_os" in linux*) - DEFINES="$DEFINES -DHAVE_ALIAS" if test "x$enable_dri3" = xyes; then DEFINES="$DEFINES -DHAVE_DRI3" fi - if test "x$have_pci_id" != xyes; then - AC_MSG_ERROR([libudev-dev or sysfs required for building DRI]) - fi - case "$host_cpu" in powerpc* | sparc*) # Build only the drivers for cards that exist on PowerPC/sparc @@ -1538,19 +1645,13 @@ ;; esac ;; - *freebsd* | dragonfly* | *netbsd* | openbsd*) - DEFINES="$DEFINES -DHAVE_ALIAS" - ;; - gnu*) - DEFINES="$DEFINES -DHAVE_ALIAS" - ;; cygwin*) if test "x$with_dri_drivers" = "xyes"; then with_dri_drivers="swrast" fi ;; darwin*) - DEFINES="$DEFINES -DGLX_ALIAS_UNSUPPORTED -DBUILDING_MESA" + DEFINES="$DEFINES -DBUILDING_MESA" if test "x$with_dri_drivers" = "xyes"; then with_dri_drivers="swrast" fi @@ -1620,6 +1721,34 @@ fi +dnl +dnl Gallium LLVM +dnl +dnl With follow-up commits we'll rework --enable-gallium-llvm to --enable-llvm +dnl Since that is too invasive to stable, do the more conservative thing for now +dnl and consider it as a global LLVM toggle. +dnl +AC_ARG_ENABLE([gallium-llvm], + [AS_HELP_STRING([--enable-gallium-llvm], + [build gallium LLVM support @<:@default=enabled on x86/x86_64@:>@])], + [enable_gallium_llvm="$enableval"], + [enable_gallium_llvm=auto]) + +if test "x$enable_gallium_llvm" = xauto; then + if test "x$FOUND_LLVM" = xyes; then + case "$host_cpu" in + i*86|x86_64|amd64) enable_gallium_llvm=yes;; + *) enable_gallium_llvm=no;; + esac + else + enable_gallium_llvm=no + fi +fi + +if test "x$enable_gallium_llvm" = xyes -a "x$FOUND_LLVM" = xno; then + AC_MSG_ERROR([--enable-gallium-llvm selected but llvm-config is not found]) +fi + # # Vulkan driver configuration # @@ -1627,7 +1756,7 @@ AC_ARG_WITH([vulkan-drivers], [AS_HELP_STRING([--with-vulkan-drivers@<:@=DIRS...@:>@], [comma delimited Vulkan drivers list, e.g. - "intel" + "intel,radeon" @<:@default=no@:>@])], [with_vulkan_drivers="$withval"], [with_vulkan_drivers="no"]) @@ -1654,12 +1783,14 @@ if test "x$HAVE_I965_DRI" != xyes; then AC_MSG_ERROR([Intel Vulkan driver requires the i965 dri driver]) fi - if test "x$with_sha1" == "x"; then - AC_MSG_ERROR([Intel Vulkan driver requires SHA1]) - fi HAVE_INTEL_VULKAN=yes; ;; + xradeon) + PKG_CHECK_MODULES([AMDGPU], [libdrm_amdgpu >= $LIBDRM_AMDGPU_REQUIRED]) + radeon_llvm_check $LLVM_REQUIRED_RADV "radv" + HAVE_RADEON_VULKAN=yes; + ;; *) AC_MSG_ERROR([Vulkan driver '$driver' does not exist]) ;; @@ -1669,6 +1800,7 @@ fi +DEFINES="$DEFINES -DENABLE_SHADER_CACHE" AM_CONDITIONAL(NEED_MEGADRIVER, test -n "$DRI_DIRS") AM_CONDITIONAL(NEED_LIBMESA, test "x$enable_glx" = xxlib -o \ "x$enable_osmesa" = xyes -o \ @@ -1720,38 +1852,12 @@ dnl dnl gbm configuration dnl -if test "x$enable_gbm" = xauto; then - case "$with_egl_platforms" in - *drm*) - enable_gbm=yes ;; - *) - enable_gbm=no ;; - esac -fi if test "x$enable_gbm" = xyes; then - if test "x$need_pci_id$have_pci_id" = xyesno; then - AC_MSG_ERROR([gbm requires udev >= $LIBUDEV_REQUIRED or sysfs]) - fi - - if test "x$enable_dri" = xyes; then - if test "x$enable_shared_glapi" = xno; then - AC_MSG_ERROR([gbm_dri requires --enable-shared-glapi]) - fi - else - # Strictly speaking libgbm does not require --enable-dri, although - # both of its backends do. Thus one can build libgbm without any - # backends if --disable-dri is set. - # To avoid unnecessary complexity of checking if at least one backend - # is available when building, just mandate --enable-dri. - AC_MSG_ERROR([gbm requires --enable-dri]) - fi + require_dri_shared_libs_and_glapi "gbm" fi AM_CONDITIONAL(HAVE_GBM, test "x$enable_gbm" = xyes) -if test "x$need_pci_id$have_libudev" = xyesyes; then - GBM_PC_REQ_PRIV="libudev >= $LIBUDEV_REQUIRED" -else - GBM_PC_REQ_PRIV="" -fi +# FINISHME: GBM has a number of dependencies which we should add below +GBM_PC_REQ_PRIV="" GBM_PC_LIB_PRIV="$DLOPEN_LIBS" AC_SUBST([GBM_PC_REQ_PRIV]) AC_SUBST([GBM_PC_LIB_PRIV]) @@ -1759,32 +1865,13 @@ dnl dnl EGL configuration dnl -EGL_CLIENT_APIS="" if test "x$enable_egl" = xyes; then EGL_LIB_DEPS="$DLOPEN_LIBS $SELINUX_LIBS $PTHREAD_LIBS" AC_CHECK_FUNC(mincore, [DEFINES="$DEFINES -DHAVE_MINCORE"]) - if test "$enable_static" != yes; then - if test "x$enable_dri" = xyes; then - HAVE_EGL_DRIVER_DRI2=1 - if test "x$enable_shared_glapi" = xno; then - AC_MSG_ERROR([egl_dri2 requires --enable-shared-glapi]) - fi - if test "x$enable_dri3" = xyes; then - HAVE_EGL_DRIVER_DRI3=1 - if test "x$enable_shared_glapi" = xno; then - AC_MSG_ERROR([egl_dri3 requires --enable-shared-glapi]) - fi - fi - else - # Avoid building an "empty" libEGL. Drop/update this - # when other backends (haiku?) come along. - AC_MSG_ERROR([egl requires --enable-dri]) - fi - - fi + require_dri_shared_libs_and_glapi "egl" fi AM_CONDITIONAL(HAVE_EGL, test "x$enable_egl" = xyes) AC_SUBST([EGL_LIB_DEPS]) @@ -1843,7 +1930,7 @@ "x$enable_va" = xyes; then if test x"$enable_dri3" = xyes; then PKG_CHECK_MODULES([VL], [xcb-dri3 xcb-present xcb-sync xshmfence >= $XSHMFENCE_REQUIRED - x11-xcb xcb xcb-dri2 >= $XCBDRI2_REQUIRED]) + xcb-xfixes x11-xcb xcb xcb-dri2 >= $XCBDRI2_REQUIRED]) else PKG_CHECK_MODULES([VL], [x11-xcb xcb xcb-dri2 >= $XCBDRI2_REQUIRED]) fi @@ -1909,15 +1996,6 @@ [CLANG_LIBDIR='']) PKG_CHECK_EXISTS([libclc], [have_libclc=yes], [have_libclc=no]) -PKG_CHECK_MODULES([LIBELF], [libelf], [have_libelf=yes], [have_libelf=no]) - -if test "x$have_libelf" = xno; then - LIBELF_LIBS='' - LIBELF_CFLAGS='' - AC_CHECK_LIB([elf], [elf_memory], [have_libelf=yes;LIBELF_LIBS=-lelf], [have_libelf=no]) - AC_SUBST([LIBELF_LIBS]) - AC_SUBST([LIBELF_CFLAGS]) -fi if test "x$enable_opencl" = xyes; then if test -z "$with_gallium_drivers"; then @@ -1951,36 +2029,51 @@ if test "x$have_libelf" != xyes; then AC_MSG_ERROR([Clover requires libelf]) fi + + if test "x${ac_cv_cxx_compiler_gnu}" = xyes; then + altivec_enabled=no + AC_COMPILE_IFELSE([AC_LANG_SOURCE([ + #if !defined(__VEC__) || !defined(__ALTIVEC__) + #error "AltiVec not enabled" + #endif + ])], altivec_enabled=yes) + + if test "$altivec_enabled" = yes; then + CLOVER_STD_OVERRIDE="-std=gnu++11" + fi + AC_SUBST([CLOVER_STD_OVERRIDE]) + fi + + llvm_require_version $LLVM_REQUIRED_OPENCL "opencl" + + llvm_add_default_components "opencl" + llvm_add_component "all-targets" "opencl" + llvm_add_component "linker" "opencl" + llvm_add_component "instrumentation" "opencl" + llvm_add_component "ipo" "opencl" + llvm_add_component "irreader" "opencl" + llvm_add_component "option" "opencl" + llvm_add_component "objcarcopts" "opencl" + llvm_add_component "profiledata" "opencl" + + dnl Check for Clang internal headers + if test -z "$CLANG_LIBDIR"; then + CLANG_LIBDIR=${LLVM_LIBDIR} + fi + CLANG_RESOURCE_DIR=$CLANG_LIBDIR/clang/${LLVM_VERSION} + AS_IF([test ! -f "$CLANG_RESOURCE_DIR/include/stddef.h"], + [AC_MSG_ERROR([Could not find clang internal header stddef.h in $CLANG_RESOURCE_DIR Use --with-clang-libdir to specify the correct path to the clang libraries.])]) fi AM_CONDITIONAL(HAVE_CLOVER, test "x$enable_opencl" = xyes) AM_CONDITIONAL(HAVE_CLOVER_ICD, test "x$enable_opencl_icd" = xyes) AC_SUBST([OPENCL_LIBNAME]) +AC_SUBST([CLANG_RESOURCE_DIR]) dnl dnl Gallium configuration dnl AM_CONDITIONAL(HAVE_GALLIUM, test -n "$with_gallium_drivers") -AC_SUBST([LLVM_BINDIR]) -AC_SUBST([LLVM_CFLAGS]) -AC_SUBST([LLVM_CPPFLAGS]) -AC_SUBST([LLVM_CXXFLAGS]) -AC_SUBST([LLVM_LIBDIR]) -AC_SUBST([LLVM_LIBS]) -AC_SUBST([LLVM_LDFLAGS]) -AC_SUBST([LLVM_INCLUDEDIR]) -AC_SUBST([LLVM_VERSION]) -AC_SUBST([CLANG_RESOURCE_DIR]) - -case "x$enable_opengl$enable_gles1$enable_gles2" in -x*yes*) - EGL_CLIENT_APIS="$EGL_CLIENT_APIS "'$(GL_LIB)' - ;; -esac - -AC_SUBST([VG_LIB_DEPS]) -AC_SUBST([EGL_CLIENT_APIS]) - dnl dnl EGL Platforms configuration dnl @@ -1990,9 +2083,13 @@ "x11,drm" @<:@default=auto@:>@])], [with_egl_platforms="$withval"], [if test "x$enable_egl" = xyes; then - with_egl_platforms="x11" + if test "x$enable_gbm" = xyes; then + with_egl_platforms="x11,drm" + else + with_egl_platforms="x11" + fi else - with_egl_platforms="" + with_egl_platforms="" fi]) if test "x$with_egl_platforms" != "x" -a "x$enable_egl" != xyes; then @@ -2011,8 +2108,6 @@ for plat in $egl_platforms; do case "$plat" in wayland) - test "x$have_libdrm" != xyes && - AC_MSG_ERROR([EGL platform wayland requires libdrm >= $LIBDRM_REQUIRED]) PKG_CHECK_MODULES([WAYLAND], [wayland-client >= $WAYLAND_REQUIRED wayland-server >= $WAYLAND_REQUIRED]) @@ -2028,16 +2123,13 @@ drm) test "x$enable_gbm" = "xno" && AC_MSG_ERROR([EGL platform drm needs gbm]) - test "x$have_libdrm" != xyes && - AC_MSG_ERROR([EGL platform drm requires libdrm >= $LIBDRM_REQUIRED]) ;; surfaceless) - test "x$have_libdrm" != xyes && - AC_MSG_ERROR([EGL platform surfaceless requires libdrm >= $LIBDRM_REQUIRED]) ;; android) + PKG_CHECK_MODULES([ANDROID], [cutils hardware sync]) ;; *) @@ -2045,10 +2137,11 @@ ;; esac - case "$plat$need_pci_id$have_pci_id" in - waylandyesno|drmyesno) - AC_MSG_ERROR([cannot build $plat platform without udev >= $LIBUDEV_REQUIRED or sysfs]) ;; - esac + case "$plat" in + wayland|drm|surfaceless) + require_libdrm "Platform $plat" + ;; + esac done # libEGL wants to default to the first platform specified in @@ -2066,8 +2159,6 @@ AM_CONDITIONAL(HAVE_EGL_PLATFORM_SURFACELESS, echo "$egl_platforms" | grep -q 'surfaceless') AM_CONDITIONAL(HAVE_EGL_PLATFORM_ANDROID, echo "$egl_platforms" | grep -q 'android') -AM_CONDITIONAL(HAVE_EGL_DRIVER_DRI2, test "x$HAVE_EGL_DRIVER_DRI2" != "x") - AC_SUBST([EGL_NATIVE_PLATFORM]) AC_SUBST([EGL_CFLAGS]) @@ -2078,147 +2169,6 @@ GL_PC_CFLAGS="$GL_PC_CFLAGS -DMESA_EGL_NO_X11_HEADERS" fi -dnl -dnl Gallium LLVM -dnl -AC_ARG_ENABLE([gallium-llvm], - [AS_HELP_STRING([--enable-gallium-llvm], - [build gallium LLVM support @<:@default=enabled on x86/x86_64@:>@])], - [enable_gallium_llvm="$enableval"], - [enable_gallium_llvm=auto]) - -AC_ARG_ENABLE([llvm-shared-libs], - [AS_HELP_STRING([--enable-llvm-shared-libs], - [link with LLVM shared libraries @<:@default=enabled@:>@])], - [enable_llvm_shared_libs="$enableval"], - [enable_llvm_shared_libs=yes]) - -AC_ARG_WITH([llvm-prefix], - [AS_HELP_STRING([--with-llvm-prefix], - [Prefix for LLVM installations in non-standard locations])], - [llvm_prefix="$withval"], - [llvm_prefix='']) - - -# Call this inside ` ` to get the return value. -# $1 is the llvm-config command with arguments. -strip_unwanted_llvm_flags() { - # Use \> (marks the end of the word) - echo `$1` | sed \ - -e 's/-march=\S*//g' \ - -e 's/-mtune=\S*//g' \ - -e 's/-mcpu=\S*//g' \ - -e 's/-DNDEBUG\>//g' \ - -e 's/-D_GNU_SOURCE\>//g' \ - -e 's/-pedantic\>//g' \ - -e 's/-Wcovered-switch-default\>//g' \ - -e 's/-O.\>//g' \ - -e 's/-g\>//g' \ - -e 's/-Wall\>//g' \ - -e 's/-Wcast-qual\>//g' \ - -e 's/-Woverloaded-virtual\>//g' \ - -e 's/-fcolor-diagnostics\>//g' \ - -e 's/-fdata-sections\>//g' \ - -e 's/-ffunction-sections\>//g' \ - -e 's/-fno-exceptions\>//g' \ - -e 's/-fomit-frame-pointer\>//g' \ - -e 's/-fvisibility-inlines-hidden\>//g' \ - -e 's/-fPIC\>//g' \ - -e 's/-fstack-protector-strong\>//g' -} - -llvm_check_version_for() { - if test "${LLVM_VERSION_INT}${LLVM_VERSION_PATCH}" -lt "${1}0${2}${3}"; then - AC_MSG_ERROR([LLVM $1.$2.$3 or newer is required for $4]) - fi -} - - - -if test -z "$with_gallium_drivers"; then - enable_gallium_llvm=no -fi -if test "x$enable_gallium_llvm" = xauto; then - case "$host_cpu" in - i*86|x86_64|amd64) enable_gallium_llvm=yes;; - esac -fi -if test "x$enable_gallium_llvm" = xyes; then - if test -n "$llvm_prefix"; then - AC_PATH_TOOL([LLVM_CONFIG], [llvm-config], [no], ["$llvm_prefix/bin"]) - else - AC_PATH_TOOL([LLVM_CONFIG], [llvm-config], [no]) - fi - - if test "x$LLVM_CONFIG" != xno; then - LLVM_VERSION=`$LLVM_CONFIG --version | egrep -o '^[[0-9.]]+'` - LLVM_LDFLAGS=`$LLVM_CONFIG --ldflags` - LLVM_BINDIR=`$LLVM_CONFIG --bindir` - LLVM_CPPFLAGS=`strip_unwanted_llvm_flags "$LLVM_CONFIG --cppflags"` - LLVM_CFLAGS=$LLVM_CPPFLAGS # CPPFLAGS seem to be sufficient - LLVM_CXXFLAGS=`strip_unwanted_llvm_flags "$LLVM_CONFIG --cxxflags"` - LLVM_INCLUDEDIR=`$LLVM_CONFIG --includedir` - LLVM_LIBDIR=`$LLVM_CONFIG --libdir` - - AC_COMPUTE_INT([LLVM_VERSION_MAJOR], [LLVM_VERSION_MAJOR], - [#include "${LLVM_INCLUDEDIR}/llvm/Config/llvm-config.h"]) - AC_COMPUTE_INT([LLVM_VERSION_MINOR], [LLVM_VERSION_MINOR], - [#include "${LLVM_INCLUDEDIR}/llvm/Config/llvm-config.h"]) - - LLVM_VERSION_PATCH=`echo $LLVM_VERSION | cut -d. -f3 | egrep -o '^[[0-9]]+'` - if test -z "$LLVM_VERSION_PATCH"; then - LLVM_VERSION_PATCH=0 - fi - - if test -n "${LLVM_VERSION_MAJOR}"; then - LLVM_VERSION_INT="${LLVM_VERSION_MAJOR}0${LLVM_VERSION_MINOR}" - else - LLVM_VERSION_INT=`echo $LLVM_VERSION | sed -e 's/\([[0-9]]\)\.\([[0-9]]\)/\10\2/g'` - fi - - LLVM_REQUIRED_VERSION_MAJOR="3" - LLVM_REQUIRED_VERSION_MINOR="3" - if test "$LLVM_VERSION_INT" -lt "${LLVM_REQUIRED_VERSION_MAJOR}0${LLVM_REQUIRED_VERSION_MINOR}"; then - AC_MSG_ERROR([LLVM $LLVM_REQUIRED_VERSION_MAJOR.$LLVM_REQUIRED_VERSION_MINOR or newer is required]) - fi - - LLVM_COMPONENTS="engine bitwriter mcjit mcdisassembler" - - if $LLVM_CONFIG --components | grep -q inteljitevents ; then - LLVM_COMPONENTS="${LLVM_COMPONENTS} inteljitevents" - fi - - if test "x$enable_opencl" = xyes; then - llvm_check_version_for "3" "5" "0" "opencl" - - LLVM_COMPONENTS="${LLVM_COMPONENTS} all-targets ipo linker instrumentation" - LLVM_COMPONENTS="${LLVM_COMPONENTS} irreader option objcarcopts profiledata" - fi - DEFINES="${DEFINES} -DHAVE_LLVM=0x0$LLVM_VERSION_INT -DMESA_LLVM_VERSION_PATCH=$LLVM_VERSION_PATCH" - MESA_LLVM=1 - - dnl Check for Clang internal headers - if test "x$enable_opencl" = xyes; then - if test -z "$CLANG_LIBDIR"; then - CLANG_LIBDIR=${LLVM_LIBDIR} - fi - CLANG_RESOURCE_DIR=$CLANG_LIBDIR/clang/${LLVM_VERSION} - AS_IF([test ! -f "$CLANG_RESOURCE_DIR/include/stddef.h"], - [AC_MSG_ERROR([Could not find clang internal header stddef.h in $CLANG_RESOURCE_DIR Use --with-clang-libdir to specify the correct path to the clang libraries.])]) - fi - else - MESA_LLVM=0 - LLVM_VERSION_INT=0 - fi -else - MESA_LLVM=0 - LLVM_VERSION_INT=0 - - if test "x$enable_opencl" = xyes; then - AC_MSG_ERROR([cannot enable OpenCL without LLVM]) - fi -fi - dnl Directory for XVMC libs AC_ARG_WITH([xvmc-libdir], [AS_HELP_STRING([--with-xvmc-libdir=DIR], @@ -2266,75 +2216,40 @@ AC_SUBST([D3D_DRIVER_INSTALL_DIR]) dnl -dnl Gallium helper functions +dnl r300 doesn't strictly require LLVM, but for performance reasons we +dnl highly recommend LLVM usage. So require it at least on x86 and x86_64 +dnl architectures. dnl -gallium_require_drm() { - if test "x$have_libdrm" != xyes; then - AC_MSG_ERROR([$1 requires libdrm >= $LIBDRM_REQUIRED]) - fi -} - -gallium_require_llvm() { - if test "x$MESA_LLVM" = x0; then - case "$host" in *gnux32) return;; esac - case "$host_cpu" in - i*86|x86_64|amd64) AC_MSG_ERROR([LLVM is required to build $1 on x86 and x86_64]);; - esac - fi -} - -gallium_require_drm_loader() { - if test "x$need_pci_id$have_pci_id" = xyesno; then - AC_MSG_ERROR([Gallium drm loader requires libudev >= $LIBUDEV_REQUIRED or sysfs]) - fi +r300_require_llvm() { + case "$host" in *gnux32) return;; esac + case "$host_cpu" in + i*86|x86_64|amd64) require_llvm $1 + ;; + esac } -dnl This is for Glamor. Skip this if OpenGL is disabled. -require_egl_drm() { - if test "x$enable_opengl" = xno; then - return 0 - fi - +dnl +dnl DRM is needed by X, Wayland, and offscreen rendering. +dnl Surfaceless is an alternative for the last one. +dnl +require_basic_egl() { case "$with_egl_platforms" in - *drm*) + *drm*|*surfaceless*) ;; - *) - AC_MSG_ERROR([--with-egl-platforms=drm is required to build the $1 driver.]) + *) + AC_MSG_ERROR([$1 requires one of these: + 1) --with-egl-platforms=drm (X, Wayland, offscreen rendering based on DRM) + 2) --with-egl-platforms=surfaceless (offscreen only) + Recommended options: drm,x11]) ;; esac - if test "x$enable_gbm" != xyes; then - AC_MSG_ERROR([--enable-gbm is required to build the $1 driver.]) - fi -} - -radeon_llvm_check() { - if test ${LLVM_VERSION_INT} -lt 307; then - amdgpu_llvm_target_name='r600' - else - amdgpu_llvm_target_name='amdgpu' - fi - if test "x$enable_gallium_llvm" != "xyes"; then - AC_MSG_ERROR([--enable-gallium-llvm is required when building $1]) - fi - llvm_check_version_for "3" "6" "0" $1 - if test true && $LLVM_CONFIG --targets-built | grep -iqvw $amdgpu_llvm_target_name ; then - AC_MSG_ERROR([LLVM $amdgpu_llvm_target_name not enabled in your LLVM build.]) - fi - LLVM_COMPONENTS="${LLVM_COMPONENTS} $amdgpu_llvm_target_name bitreader ipo" - NEED_RADEON_LLVM=yes - if test "x$have_libelf" != xyes; then - AC_MSG_ERROR([$1 requires libelf when using llvm]) - fi } -swr_llvm_check() { - gallium_require_llvm $1 - if test ${LLVM_VERSION_INT} -lt 306; then - AC_MSG_ERROR([LLVM version 3.6 or later required when building $1]) - fi +radeon_gallium_llvm_check() { if test "x$enable_gallium_llvm" != "xyes"; then - AC_MSG_ERROR([--enable-gallium-llvm is required when building $1]) + AC_MSG_ERROR([--enable-gallium-llvm is required when building $2]) fi + radeon_llvm_check $* } swr_require_cxx_feature_flags() { @@ -2383,67 +2298,71 @@ case "x$driver" in xsvga) HAVE_GALLIUM_SVGA=yes - gallium_require_drm "svga" - gallium_require_drm_loader + require_libdrm "svga" ;; xi915) HAVE_GALLIUM_I915=yes PKG_CHECK_MODULES([INTEL], [libdrm_intel >= $LIBDRM_INTEL_REQUIRED]) - gallium_require_drm "Gallium i915" - gallium_require_drm_loader + require_libdrm "Gallium i915" ;; xilo) HAVE_GALLIUM_ILO=yes PKG_CHECK_MODULES([INTEL], [libdrm_intel >= $LIBDRM_INTEL_REQUIRED]) - gallium_require_drm "Gallium i965/ilo" - gallium_require_drm_loader + require_libdrm "Gallium i965/ilo" ;; xr300) HAVE_GALLIUM_R300=yes PKG_CHECK_MODULES([RADEON], [libdrm_radeon >= $LIBDRM_RADEON_REQUIRED]) - gallium_require_drm "Gallium R300" - gallium_require_drm_loader - gallium_require_llvm "Gallium R300" + require_libdrm "r300" + r300_require_llvm "r300" ;; xr600) HAVE_GALLIUM_R600=yes PKG_CHECK_MODULES([RADEON], [libdrm_radeon >= $LIBDRM_RADEON_REQUIRED]) - gallium_require_drm "Gallium R600" - gallium_require_drm_loader + require_libdrm "r600" if test "x$enable_opencl" = xyes; then - radeon_llvm_check "r600g" - LLVM_COMPONENTS="${LLVM_COMPONENTS} bitreader asmparser" + radeon_gallium_llvm_check $LLVM_REQUIRED_R600 "r600" + + llvm_add_component "asmparser" "r600" + llvm_add_component "bitreader" "r600" fi ;; xradeonsi) HAVE_GALLIUM_RADEONSI=yes PKG_CHECK_MODULES([RADEON], [libdrm_radeon >= $LIBDRM_RADEON_REQUIRED]) PKG_CHECK_MODULES([AMDGPU], [libdrm_amdgpu >= $LIBDRM_AMDGPU_REQUIRED]) - gallium_require_drm "radeonsi" - gallium_require_drm_loader - radeon_llvm_check "radeonsi" - require_egl_drm "radeonsi" + require_libdrm "radeonsi" + radeon_gallium_llvm_check $LLVM_REQUIRED_RADEONSI "radeonsi" + if test "x$enable_egl" = xyes; then + require_basic_egl "radeonsi" + fi ;; xnouveau) HAVE_GALLIUM_NOUVEAU=yes PKG_CHECK_MODULES([NOUVEAU], [libdrm_nouveau >= $LIBDRM_NOUVEAU_REQUIRED]) - gallium_require_drm "nouveau" - gallium_require_drm_loader + require_libdrm "nouveau" ;; xfreedreno) HAVE_GALLIUM_FREEDRENO=yes PKG_CHECK_MODULES([FREEDRENO], [libdrm_freedreno >= $LIBDRM_FREEDRENO_REQUIRED]) - gallium_require_drm "freedreno" - gallium_require_drm_loader + require_libdrm "freedreno" + ;; + xetnaviv) + HAVE_GALLIUM_ETNAVIV=yes + PKG_CHECK_MODULES([ETNAVIV], [libdrm_etnaviv >= $LIBDRM_ETNAVIV_REQUIRED]) + require_libdrm "etnaviv" + ;; + ximx) + HAVE_GALLIUM_IMX=yes ;; xswrast) HAVE_GALLIUM_SOFTPIPE=yes - if test "x$MESA_LLVM" = x1; then + if test "x$enable_gallium_llvm" = xyes; then HAVE_GALLIUM_LLVMPIPE=yes fi ;; xswr) - swr_llvm_check "swr" + llvm_require_version $LLVM_REQUIRED_SWR "swr" swr_require_cxx_feature_flags "C++11" "__cplusplus >= 201103L" \ ",-std=c++11" \ @@ -2464,8 +2383,8 @@ ;; xvc4) HAVE_GALLIUM_VC4=yes - gallium_require_drm "vc4" - gallium_require_drm_loader + PKG_CHECK_MODULES([VC4], [libdrm_vc4 >= $LIBDRM_VC4_REQUIRED]) + require_libdrm "vc4" PKG_CHECK_MODULES([SIMPENROSE], [simpenrose], [USE_VC4_SIMULATOR=yes; @@ -2474,9 +2393,10 @@ ;; xvirgl) HAVE_GALLIUM_VIRGL=yes - gallium_require_drm "virgl" - gallium_require_drm_loader - require_egl_drm "virgl" + require_libdrm "virgl" + if test "x$enable_egl" = xyes; then + require_basic_egl "virgl" + fi ;; *) AC_MSG_ERROR([Unknown Gallium driver: $driver]) @@ -2485,14 +2405,33 @@ done fi -dnl Set LLVM_LIBS - This is done after the driver configuration so -dnl that drivers can add additional components to LLVM_COMPONENTS. -dnl Previously, gallium drivers were updating LLVM_LIBS directly -dnl by calling llvm-config --libs ${DRIVER_LLVM_COMPONENTS}, but -dnl this was causing the same libraries to be appear multiple times -dnl in LLVM_LIBS. +if test "x$enable_gallium_llvm" == "xyes" -a "$with_gallium_drivers"; then + llvm_require_version $LLVM_REQUIRED_GALLIUM "gallium" + llvm_add_default_components "gallium" +fi + +dnl We need to validate some needed dependencies for renderonly drivers. + +if test "x$HAVE_GALLIUM_ETNAVIV" != xyes -a "x$HAVE_GALLIUM_IMX" == xyes ; then + AC_ERROR([Building with imx requires etnaviv]) +fi + +dnl +dnl Set defines and buildtime variables only when using LLVM. +dnl +if test "x$enable_gallium_llvm" = xyes; then + DEFINES="${DEFINES} -DHAVE_LLVM=0x0$LLVM_VERSION_INT -DMESA_LLVM_VERSION_PATCH=$LLVM_VERSION_PATCH" -if test "x$MESA_LLVM" != x0; then + LLVM_LDFLAGS=`$LLVM_CONFIG --ldflags` + LLVM_CFLAGS=$LLVM_CPPFLAGS # CPPFLAGS seem to be sufficient + LLVM_CXXFLAGS=`strip_unwanted_llvm_flags "$LLVM_CONFIG --cxxflags"` + + dnl Set LLVM_LIBS - This is done after the driver configuration so + dnl that drivers can add additional components to LLVM_COMPONENTS. + dnl Previously, gallium drivers were updating LLVM_LIBS directly + dnl by calling llvm-config --libs ${DRIVER_LLVM_COMPONENTS}, but + dnl this was causing the same libraries to be appear multiple times + dnl in LLVM_LIBS. if ! $LLVM_CONFIG --libs ${LLVM_COMPONENTS} >/dev/null; then AC_MSG_ERROR([Calling ${LLVM_CONFIG} failed]) @@ -2533,7 +2472,7 @@ AC_MSG_WARN([Building mesa with statically linked LLVM may cause compilation issues]) dnl We need to link to llvm system libs when using static libs dnl However, only llvm 3.5+ provides --system-libs - if test $LLVM_VERSION_MAJOR -eq 3 -a $LLVM_VERSION_MINOR -ge 5; then + if test $LLVM_VERSION_MAJOR -ge 4 -o $LLVM_VERSION_MAJOR -eq 3 -a $LLVM_VERSION_MINOR -ge 5; then LLVM_LIBS="$LLVM_LIBS `$LLVM_CONFIG --system-libs`" fi fi @@ -2549,6 +2488,8 @@ "x$HAVE_GALLIUM_RADEONSI" = xyes) AM_CONDITIONAL(HAVE_GALLIUM_NOUVEAU, test "x$HAVE_GALLIUM_NOUVEAU" = xyes) AM_CONDITIONAL(HAVE_GALLIUM_FREEDRENO, test "x$HAVE_GALLIUM_FREEDRENO" = xyes) +AM_CONDITIONAL(HAVE_GALLIUM_ETNAVIV, test "x$HAVE_GALLIUM_ETNAVIV" = xyes) +AM_CONDITIONAL(HAVE_GALLIUM_IMX, test "x$HAVE_GALLIUM_IMX" = xyes) AM_CONDITIONAL(HAVE_GALLIUM_SOFTPIPE, test "x$HAVE_GALLIUM_SOFTPIPE" = xyes) AM_CONDITIONAL(HAVE_GALLIUM_LLVMPIPE, test "x$HAVE_GALLIUM_LLVMPIPE" = xyes) AM_CONDITIONAL(HAVE_GALLIUM_SWR, test "x$HAVE_GALLIUM_SWR" = xyes) @@ -2576,8 +2517,13 @@ AM_CONDITIONAL(HAVE_RADEON_DRI, test x$HAVE_RADEON_DRI = xyes) AM_CONDITIONAL(HAVE_SWRAST_DRI, test x$HAVE_SWRAST_DRI = xyes) +AM_CONDITIONAL(HAVE_RADEON_VULKAN, test "x$HAVE_RADEON_VULKAN" = xyes) AM_CONDITIONAL(HAVE_INTEL_VULKAN, test "x$HAVE_INTEL_VULKAN" = xyes) +AM_CONDITIONAL(HAVE_AMD_DRIVERS, test "x$HAVE_GALLIUM_R600" = xyes -o \ + "x$HAVE_GALLIUM_RADEONSI" = xyes -o \ + "x$HAVE_RADEON_VULKAN" = xyes) + AM_CONDITIONAL(HAVE_INTEL_DRIVERS, test "x$HAVE_INTEL_VULKAN" = xyes -o \ "x$HAVE_I965_DRI" = xyes) @@ -2587,7 +2533,7 @@ AM_CONDITIONAL(NEED_WINSYS_XLIB, test "x$enable_glx" = xgallium-xlib) AM_CONDITIONAL(NEED_RADEON_LLVM, test x$NEED_RADEON_LLVM = xyes) AM_CONDITIONAL(HAVE_GALLIUM_COMPUTE, test x$enable_opencl = xyes) -AM_CONDITIONAL(HAVE_MESA_LLVM, test x$MESA_LLVM = x1) +AM_CONDITIONAL(HAVE_GALLIUM_LLVM, test "x$enable_gallium_llvm" = xyes) AM_CONDITIONAL(USE_VC4_SIMULATOR, test x$USE_VC4_SIMULATOR = xyes) if test "x$USE_VC4_SIMULATOR" = xyes -a "x$HAVE_GALLIUM_ILO" = xyes; then AC_MSG_ERROR([VC4 simulator on x86 replaces i965 driver build, so ilo must be disabled.]) @@ -2616,6 +2562,8 @@ AC_SUBST([VA_MAJOR], $VA_MAJOR) AC_SUBST([VA_MINOR], $VA_MINOR) +AM_CONDITIONAL(HAVE_VULKAN_COMMON, test "x$VULKAN_DRIVERS" != "x") + AC_SUBST([XVMC_MAJOR], 1) AC_SUBST([XVMC_MINOR], 0) @@ -2629,8 +2577,6 @@ AC_SUBST([XA_TINY], $XA_TINY) AC_SUBST([XA_VERSION], "$XA_MAJOR.$XA_MINOR.$XA_TINY") -AC_SUBST([TIMESTAMP_CMD], '`test $(SOURCE_DATE_EPOCH) && echo $(SOURCE_DATE_EPOCH) || date +%s`') - AC_ARG_ENABLE(valgrind, [AS_HELP_STRING([--enable-valgrind], [Build mesa with valgrind support (default: auto)])], @@ -2669,6 +2615,8 @@ dnl Substitute the config AC_CONFIG_FILES([Makefile src/Makefile + src/amd/Makefile + src/amd/vulkan/Makefile src/compiler/Makefile src/egl/Makefile src/egl/main/egl.pc @@ -2694,6 +2642,8 @@ src/gallium/drivers/svga/Makefile src/gallium/drivers/swr/Makefile src/gallium/drivers/trace/Makefile + src/gallium/drivers/etnaviv/Makefile + src/gallium/drivers/imx/Makefile src/gallium/drivers/vc4/Makefile src/gallium/drivers/virgl/Makefile src/gallium/state_trackers/clover/Makefile @@ -2723,6 +2673,8 @@ src/gallium/targets/xvmc/Makefile src/gallium/tests/trivial/Makefile src/gallium/tests/unit/Makefile + src/gallium/winsys/etnaviv/drm/Makefile + src/gallium/winsys/imx/drm/Makefile src/gallium/winsys/freedreno/drm/Makefile src/gallium/winsys/i915/drm/Makefile src/gallium/winsys/intel/drm/Makefile @@ -2743,10 +2695,11 @@ src/glx/Makefile src/glx/apple/Makefile src/glx/tests/Makefile + src/glx/windows/Makefile + src/glx/windows/windowsdriproto.pc src/gtest/Makefile src/intel/Makefile - src/intel/genxml/Makefile - src/intel/isl/Makefile + src/intel/tools/Makefile src/intel/vulkan/Makefile src/loader/Makefile src/mapi/Makefile @@ -2770,16 +2723,14 @@ src/mesa/drivers/x11/Makefile src/mesa/main/tests/Makefile src/util/Makefile - src/util/tests/hash_table/Makefile]) + src/util/tests/hash_table/Makefile + src/vulkan/wsi/Makefile]) AC_OUTPUT # Fix up dependencies in *.Plo files, where we changed the extension of a # source file $SED -i -e 's/brw_blorp.cpp/brw_blorp.c/' src/mesa/drivers/dri/i965/.deps/brw_blorp.Plo -$SED -i -e 's/gen6_blorp.cpp/gen6_blorp.c/' src/mesa/drivers/dri/i965/.deps/gen6_blorp.Plo -$SED -i -e 's/gen7_blorp.cpp/gen7_blorp.c/' src/mesa/drivers/dri/i965/.deps/gen7_blorp.Plo -$SED -i -e 's/gen8_blorp.cpp/gen8_blorp.c/' src/mesa/drivers/dri/i965/.deps/gen8_blorp.Plo dnl @@ -2842,15 +2793,20 @@ echo " EGL platforms: $egl_platforms" egl_drivers="" - if test "x$HAVE_EGL_DRIVER_DRI2" != "x"; then + if test "x$enable_dri" != "xno"; then egl_drivers="$egl_drivers builtin:egl_dri2" fi - if test "x$HAVE_EGL_DRIVER_DRI3" != "x"; then + if test "x$enable_dri3" != "xno"; then egl_drivers="$egl_drivers builtin:egl_dri3" fi echo " EGL drivers: $egl_drivers" fi +if test "x$enable_gbm" = xyes; then + echo " GBM: yes" +else + echo " GBM: no" +fi # Vulkan echo "" @@ -2862,7 +2818,7 @@ fi echo "" -if test "x$MESA_LLVM" = x1; then +if test "x$enable_gallium_llvm" = xyes; then echo " llvm: yes" echo " llvm-config: $LLVM_CONFIG" echo " llvm-version: $LLVM_VERSION" @@ -2878,11 +2834,17 @@ echo " Gallium: no" fi -dnl Shader cache echo "" -echo " Shader cache: $enable_shader_cache" -if test "x$enable_shader_cache" = "xyes"; then - echo " With SHA1 from: $with_sha1" +if test "x$enable_gallium_extra_hud" != xyes; then + echo " HUD extra stats: no" +else + echo " HUD extra stats: yes" +fi + +if test "x$enable_lmsensors" != xyes; then + echo " HUD lmsensors: no" +else + echo " HUD lmsensors: yes" fi dnl Libraries @@ -2903,7 +2865,7 @@ echo " CXXFLAGS: $cxxflags" echo " Macros: $defines" echo "" -if test "x$MESA_LLVM" = x1; then +if test "x$enable_gallium_llvm" = xyes; then echo " LLVM_CFLAGS: $LLVM_CFLAGS" echo " LLVM_CXXFLAGS: $LLVM_CXXFLAGS" echo " LLVM_CPPFLAGS: $LLVM_CPPFLAGS" diff -Nru mesa-12.0.6/debian/changelog mesa-17.0.7/debian/changelog --- mesa-12.0.6/debian/changelog 2017-06-26 12:58:28.000000000 +0000 +++ mesa-17.0.7/debian/changelog 2017-06-26 12:58:29.000000000 +0000 @@ -1,9 +1,331 @@ -mesa (12.0.6-0ubuntu0.16.04.1) xenial; urgency=medium +mesa (17.0.7-0ubuntu0.16.04.1) xenial; urgency=medium - * New bugfix release. (LP: #1652564, #1652486) - * Backport to xenial. (LP: #1643789) + * Backport to xenial. (LP: #1687981) + - rules: Force -O2 to fix ppc64el FTBFS - -- Timo Aaltonen Fri, 20 Jan 2017 00:22:11 +0200 + -- Timo Aaltonen Mon, 26 Jun 2017 15:29:20 +0300 + +mesa (17.0.7-0ubuntu0.17.04.1) zesty; urgency=medium + + * New upstream bugfix release. + * d/p/vulkan-mir.patch: Refreshed. + + -- Timo Aaltonen Thu, 08 Jun 2017 10:54:05 +0300 + +mesa (17.0.5-0ubuntu1) artful; urgency=medium + + * New upstream bugfix release. (LP: #1686344) + + -- Timo Aaltonen Thu, 04 May 2017 20:07:36 +0300 + +mesa (17.0.4-1ubuntu1) artful; urgency=medium + + * Merge from Debian. + + -- Timo Aaltonen Wed, 26 Apr 2017 11:01:18 +0300 + +mesa (17.0.4-1) experimental; urgency=medium + + * New upstrem release. + + -- Timo Aaltonen Wed, 19 Apr 2017 16:14:20 +0300 + +mesa (17.0.3-1ubuntu1) zesty; urgency=medium + + * Merge from Debian. + + -- Timo Aaltonen Mon, 03 Apr 2017 19:03:10 +0300 + +mesa (17.0.3-1) experimental; urgency=medium + + * New upstream release. + * Update d/upstream/signing-key.asc with key from Andres Gomez. + + -- Andreas Boll Mon, 03 Apr 2017 11:35:58 +0200 + +mesa (17.0.2-1ubuntu2) zesty; urgency=medium + + [ Cemil Azizoglu ] + * egl-platform-rs.patch: Add support for Mir's new render surface based + EGL driver + * khr_platform_mir.patch: Add EGL_KHR_platform_mir + * vulkan-mir.patch: Add Vulkan WSI driver for Mir + + -- Timo Aaltonen Tue, 28 Mar 2017 19:22:29 +0300 + +mesa (17.0.2-1ubuntu1) zesty; urgency=medium + + * Merge from Debian experimental. + + -- Timo Aaltonen Tue, 21 Mar 2017 13:36:51 +0200 + +mesa (17.0.2-1) experimental; urgency=medium + + [ Timo Aaltonen ] + * New upstream release. + + [ Andreas Boll ] + * Require LLVM on sparc64: + - Enables radeonsi, llvmpipe and radv drivers. + - Enables OpenCL support. + + -- Andreas Boll Tue, 21 Mar 2017 11:35:09 +0100 + +mesa (17.0.1-1ubuntu1) zesty; urgency=medium + + * Merge from Debian. + - enable llvmpipe on ppc64el (LP: #1489483) + + -- Timo Aaltonen Fri, 10 Mar 2017 14:25:48 +0200 + +mesa (17.0.1-1) experimental; urgency=medium + + [ Timo Aaltonen ] + * New upstream release. + + [ Andreas Boll ] + * Declare Multi-Arch: same for mesa-vulkan-drivers (Closes: #853897). + * Cherry-pick 7d1195c (clover: Work around build failure with + AltiVec.) from upstream master branch. + * Enable OpenCL on ppc64el (Closes: #810913). + * Require LLVM on more architectures (armel mips mips64el mipsel + powerpc ppc64): + - Enables radeonsi, llvmpipe and radv drivers. + - Enables OpenCL support. + + -- Andreas Boll Mon, 06 Mar 2017 15:15:00 +0100 + +mesa (17.0.0-1ubuntu1) zesty; urgency=medium + + [ Timo Aaltonen ] + * Merge from Debian. + * Drop patches for 16k wide textures on i965, upstream. + + [ Cemil Azizoglu ] + * Updated egl-platform-mir.patch. + - remove device_name field (removed from the generic struct in the + upstream and made wayland specific). + - Change MirSurfaceParameters into MirWindowParameters. + + -- Timo Aaltonen Mon, 13 Feb 2017 16:19:39 +0200 + +mesa (17.0.0-1) experimental; urgency=medium + + * New upstream release. + * control, rules: Bump clang/llvm to 4.0, and libclc to match. + + -- Timo Aaltonen Mon, 13 Feb 2017 15:46:47 +0200 + +mesa (17.0.0~rc3-1) experimental; urgency=medium + + [ Timo Aaltonen ] + * Drop libgles1. + + [ Andreas Boll ] + * New upstream release candidate. + * Drop transitional package libegl1-mesa-drivers. + * Remove Breaks/Replaces from pre-jessie. + * Explicitly disable LLVM on some arches. Should fix FTBFS on x32. + * Drop configure.ac-Require-LLVM-for-r300-only-on-x86-and-x.patch, + upstream. + * Cherry-pick 045f38a (vulkan: Don't install vk_platform.h or + vulkan.h). + * Update list of unwanted vulkan headers. + * Drop unused git-cleanup.sh script. Replaced with usage of --extend- + diff-ignore some time ago. + * Enable building etnaviv and imx on armhf (Closes: #852614). + - Bump libdrm-dev build-dep to 2.4.74-2~. + + -- Andreas Boll Mon, 06 Feb 2017 19:05:30 +0100 + +mesa (17.0.0~rc2-1) experimental; urgency=medium + + * New upstream release candidate. + * Add configure.ac-Require-LLVM-for-r300-only-on-x86-and-x.patch: + Should fix FTBFS on some arches. + * rules: Explicitly enable/disable gbm. Should fix FTBFS on hurd. + * Revert to debhelper compat 9 (Workaround for #851130). + + -- Andreas Boll Wed, 25 Jan 2017 16:45:53 +0100 + +mesa (17.0.0~rc1-1) experimental; urgency=medium + + * New upstream release candidate. + * Bump libdrm-dev build-dep to 2.4.74 per configure.ac. + * Bump libwayland-dev build-dep to 1.11.0 per configure.ac. + * Remove libgcrypt20-dev build-dep per configure.ac. + * Update watch url. + * Drop vl-zscan-fix-Fix-trivial-sign-compare-warnings.diff and r600- + sb-Fix-loop-optimization-related-hangs-on-eg.diff, upstream. + * Drop workaround-binutils-mips-844357.diff, binutils regression has + been fixed. + * Rename EGL_DISPLAYS to EGL_PLATFORMS. + * Update extend-diff-ignore. + + -- Andreas Boll Thu, 19 Jan 2017 18:39:06 +0100 + +mesa (13.0.5-1) unstable; urgency=medium + + * New upstream release. + * Switch mesa3d.org URLs to https. + * Update extend-diff-ignore. + + -- Andreas Boll Tue, 21 Feb 2017 13:13:50 +0100 + +mesa (13.0.4-1ubuntu1) zesty; urgency=medium + + * Merge from debian. + * radeonsi-always-leave-poly-offset-in-a-valid-state.diff: + Dropped, upstream. + + -- Timo Aaltonen Mon, 06 Feb 2017 09:47:24 +0200 + +mesa (13.0.4-1) unstable; urgency=medium + + * New upstream release. + * Drop vl-zscan-fix-Fix-trivial-sign-compare-warnings.diff and r600- + sb-Fix-loop-optimization-related-hangs-on-eg.diff, upstream. + * Drop workaround-binutils-mips-844357.diff, binutils regression has + been fixed (Closes: #852030). + * Revert to debhelper compat 9 (Workaround for #851130). + * Update extend-diff-ignore. + + -- Andreas Boll Wed, 01 Feb 2017 15:36:10 +0100 + +mesa (13.0.3-1ubuntu3) zesty; urgency=medium + + * control: Add dh-autoreconf back to build-deps, for backports. + * radeonsi-always-leave-poly-offset-in-a-valid-state.diff: + Fix fdo#99451. + + -- Timo Aaltonen Thu, 19 Jan 2017 18:59:24 +0200 + +mesa (13.0.3-1ubuntu2) zesty; urgency=medium + + * rules: Drop forcing -O2 to fix ppc64el ftbfs, gcc got fixed already. + (LP: #1605796) + * control: Fix dependencies for ubuntuBSD. (LP: #1565080) + * compat,rules: Don't bump compat to 10, breaks applying patches + before autoreconf which we need for the Mir EGL platform. + + -- Timo Aaltonen Thu, 12 Jan 2017 09:49:20 +0200 + +mesa (13.0.3-1ubuntu1) zesty; urgency=medium + + * Merge from Debian. + * intel: Add patches to support 16k textures. (LP: #1655556) + + -- Timo Aaltonen Wed, 11 Jan 2017 09:45:19 +0200 + +mesa (13.0.3-1) unstable; urgency=medium + + [ Timo Aaltonen ] + * New upstream release. + + [ Andreas Boll ] + * Add vl-zscan-fix-Fix-trivial-sign-compare-warnings.diff: Fixes mpeg2 + decoding on radeon GPUs without native mpeg2 support (Closes: + #846297). Thanks to Jörg-Volker Peetz for reporting and tracking + down this regression! + * Add r600-sb-Fix-loop-optimization-related-hangs-on-eg.diff: Fixes + GPU hangs on r600g (Evergreen and Northern Islands GPUs) in many + games. + + -- Timo Aaltonen Tue, 10 Jan 2017 17:38:23 +0200 + +mesa (13.0.2-3) unstable; urgency=medium + + * Fix typo to correctly disable asm on x32. Should fix FTBFS on x32. + * Add debian/source/format file. + + -- Andreas Boll Thu, 15 Dec 2016 16:42:25 +0100 + +mesa (13.0.2-2) unstable; urgency=medium + + * Bump llvm/libclang build-deps to >= 1:3.9.1. + - Enables support for OpenCL on AMD Polaris GPUs (Closes: #848173). + * Cherry-pick 6dc96de (cso: don't release sampler states that are + bound) from upstream master branch. Fixes random GPU hangs on + radeonsi (AMD Southern Islands and newer) in many games. + * Bump debhelper compat to 10. + * Stop passing --disable-silent-rules to configure, debhelper does + that for a while. + * Drop no longer needed dpkg-dev versioned build-dependency. + * Drop redundant cross-build detection, debhelper does this for us + already. + * Disable assembly usage on x32. Related to Bug #758094. + + -- Andreas Boll Thu, 15 Dec 2016 15:16:56 +0100 + +mesa (13.0.2-1ubuntu1) zesty; urgency=medium + + * Merge from Debian. + + -- Timo Aaltonen Tue, 29 Nov 2016 18:15:09 +0200 + +mesa (13.0.2-1) unstable; urgency=medium + + * New upstream release. + * workaround-binutils-mips-844357.diff: Add workaround for broken + binutils on mips*. Fixes invalid symbol table of libGL.so.1. See + also Bug #844357. + + -- Andreas Boll Tue, 29 Nov 2016 16:29:00 +0100 + +mesa (13.0.1-2) unstable; urgency=medium + + * Cherry-pick commit 1809f17 (mesa: Drop PATH_MAX usage.) from + upstream 13.0 branch. Should fix FTBFS on hurd (Closes: #843588). + * Enable extra HUD support for showing I/O stats of block/NIC devices. + * Enable HUD lmsensors support. + + -- Andreas Boll Mon, 28 Nov 2016 13:32:31 +0100 + +mesa (13.0.1-1ubuntu1) zesty; urgency=medium + + * Merge from Debian experimental. + * dri3-fix-totem-with-libva.diff: Dropped, upstream. + * egl-platform-mir.patch: Refreshed. + + -- Timo Aaltonen Wed, 23 Nov 2016 16:36:34 +0200 + +mesa (13.0.1-1) experimental; urgency=medium + + * New upstream release. + + -- Andreas Boll Mon, 14 Nov 2016 16:23:42 +0100 + +mesa (13.0.0-1) experimental; urgency=medium + + * New upstream release. + * Make mesa-vulkan-drivers.install more generic. Should fix FTBFS on + some arches. + * rules: Remove superfluous linux check. + * rules: Remove vulkan_intel.h only where it get installed in tmp. + Should fix FTBFS on some more arches. + * source/local-options: Update extend-diff-ignore. + + -- Andreas Boll Wed, 02 Nov 2016 11:49:13 +0100 + +mesa (13.0.0~rc2-1) experimental; urgency=medium + + * New upstream release candidate. + * control, rules: Use llvm/clang 3.9 (Closes: #836913). + * control: Bump libclc dependencies. + * Bump libdrm-dev build-dep to 2.4.69 per configure.ac. + * Remove libudev-dev and libudev1 dependencies per configure.ac. + * Enable OpenCL on kfreebsd-* since we don't need udev anymore. + * Enable radv vulkan driver. + * control: Remove superfluous linux- prefix. + * not-installed: wglext.h got dropped from the tarball. + * mesa-common-dev: Remove mesa_glinterop.h, upstream doesn't install + it anymore. + * Update libgles2-mesa.symbols. + * Update libgl1-mesa-glx.symbols. + * source/local-options: Update extend-diff-ignore. + * Update mesa-vulkan-drivers.lintian-overrides. + + -- Andreas Boll Tue, 25 Oct 2016 10:59:08 +0200 mesa (12.0.4-2ubuntu1) zesty; urgency=medium diff -Nru mesa-12.0.6/debian/control mesa-17.0.7/debian/control --- mesa-12.0.6/debian/control 2017-06-26 12:58:28.000000000 +0000 +++ mesa-17.0.7/debian/control 2017-06-26 12:58:29.000000000 +0000 @@ -10,19 +10,18 @@ dh-autoreconf, quilt (>= 0.40), pkg-config, - libdrm-dev (>= 2.4.67) [!hurd-any], + libdrm-dev (>= 2.4.74-2~) [!hurd-any], libx11-dev, x11proto-gl-dev (>= 1.4.14), libxxf86vm-dev, libexpat1-dev, - dpkg-dev (>= 1.16.1), - libgcrypt20-dev [linux-amd64 linux-i386 linux-x32], + libsensors4-dev [!hurd-any], libxfixes-dev, libxdamage-dev, libxext-dev, libva-dev (>= 1.6.0) [linux-any kfreebsd-any], libvdpau-dev (>= 1.1.1) [linux-any kfreebsd-any], - libvulkan-dev [linux-amd64 linux-i386 linux-x32], + libvulkan-dev [amd64 arm64 armel armhf i386 mips mips64el mipsel powerpc ppc64 ppc64el sparc64 x32], autoconf, automake, libtool, @@ -39,21 +38,20 @@ libxcb-randr0-dev, libxcb-sync-dev, libxshmfence-dev (>= 1.1), + libmirclient-dev (>= 0.26.2) [linux-any], + mir-client-platform-mesa-dev [linux-any], python, python-mako, - libudev-dev [linux-any], flex, bison, - llvm-3.8-dev (>= 1:3.8) [amd64 i386 kfreebsd-amd64 kfreebsd-i386 arm64 armhf ppc64el], - libelf-dev [amd64 i386 kfreebsd-amd64 kfreebsd-i386 arm64 armhf ppc64el], - libwayland-dev (>= 1.2.0) [linux-any], - libclang-3.8-dev (>= 1:3.8) [amd64 i386 arm64 armhf], - libclc-dev (>= 0.2.0+git20150813) [amd64 i386 arm64 armhf], - mir-client-platform-mesa-dev, - libmirclient-dev, + llvm-4.0-dev (>= 1:4.0~) [amd64 arm64 armel armhf i386 kfreebsd-amd64 kfreebsd-i386 mips mips64el mipsel powerpc ppc64 sparc64 ppc64el], + libelf-dev [amd64 arm64 armel armhf i386 kfreebsd-amd64 kfreebsd-i386 mips mips64el mipsel powerpc ppc64 sparc64 ppc64el], + libwayland-dev (>= 1.11.0) [linux-any], + libclang-4.0-dev (>= 1:4.0~) [amd64 arm64 armel armhf i386 kfreebsd-amd64 kfreebsd-i386 mips mips64el mipsel powerpc ppc64 sparc64 ppc64el], + libclc-dev (>= 0.2.0+git20170213) [amd64 arm64 armel armhf i386 kfreebsd-amd64 kfreebsd-i386 mips mips64el mipsel powerpc ppc64 sparc64 ppc64el], Vcs-Git: https://anonscm.debian.org/git/pkg-xorg/lib/mesa.git Vcs-Browser: https://anonscm.debian.org/cgit/pkg-xorg/lib/mesa.git -Homepage: http://mesa3d.org/ +Homepage: https://mesa3d.org/ Package: libxatracker2 Section: libs @@ -91,7 +89,6 @@ Depends: ${shlibs:Depends}, ${misc:Depends}, - libudev1 [linux-any], Pre-Depends: ${misc:Pre-Depends} Multi-Arch: same Description: generic buffer management API -- runtime @@ -105,7 +102,6 @@ Architecture: linux-any kfreebsd-any Depends: libgbm1 (= ${binary:Version}), - libudev-dev [linux-any], ${misc:Depends}, Multi-Arch: same Description: generic buffer management API -- development files @@ -124,7 +120,6 @@ ${shlibs:Depends}, ${misc:Depends}, libgbm1 (= ${binary:Version}) [!hurd-any], - libudev1 [linux-any], libgl1-mesa-dri (= ${binary:Version}), Provides: libegl1-x11 Conflicts: libegl1-x11 @@ -145,7 +140,7 @@ Depends: libegl1-mesa (= ${binary:Version}), libwayland-egl1-mesa (= ${binary:Version}) [linux-any], - libdrm-dev (>= 2.4.52) [!hurd-any], + libdrm-dev (>= 2.4.74) [!hurd-any], x11proto-dri2-dev (>= 2.6), x11proto-gl-dev (>= 1.4.14), libx11-dev, @@ -160,9 +155,9 @@ libxcb-sync-dev, libxshmfence-dev, libx11-xcb-dev, - libmirclient-dev [!arm64 !powerpc !ppc64 !ppc64el], - libwayland-dev (>= 1.2.0) [linux-any], + libwayland-dev (>= 1.11.0) [linux-any], ${misc:Depends}, + libmirclient-dev (>= 0.26.2) [!arm64 !powerpc !ppc64 !ppc64el !kfreebsd-any !hurd-any], Multi-Arch: same Description: free implementation of the EGL API -- development files This package contains the development environment required for compiling @@ -173,15 +168,6 @@ This package provides the development environment for compiling programs against the EGL library. -Package: libegl1-mesa-drivers -Section: libs -Architecture: linux-any kfreebsd-any -Depends: - ${misc:Depends}, -Multi-Arch: same -Description: transitional dummy package - This is a transitional dummy package, it can be safely removed. - Package: libwayland-egl1-mesa Section: libs Architecture: linux-any @@ -191,52 +177,12 @@ libegl1-mesa (= ${binary:Version}) Provides: libwayland-egl1 Conflicts: libwayland-egl1 -Replaces: libwayland-egl1, libegl1-mesa-drivers (<< 10.1.0-2) -Breaks: libegl1-mesa-drivers (<< 10.1.0-2) +Replaces: libwayland-egl1 Pre-Depends: ${misc:Pre-Depends} Multi-Arch: same Description: implementation of the Wayland EGL platform -- runtime This package contains the mesa implementation of the Wayland EGL platform -Package: libgles1-mesa -Section: libs -Architecture: any -Depends: - libglapi-mesa (= ${binary:Version}), - ${shlibs:Depends}, - ${misc:Depends}, -Provides: libgles1 -Conflicts: libgles1 -Replaces: libgles1 -Pre-Depends: ${misc:Pre-Depends} -Multi-Arch: same -Description: free implementation of the OpenGL|ES 1.x API -- runtime - OpenGL|ES is a cross-platform API for full-function 2D and 3D graphics on - embedded systems - including consoles, phones, appliances and vehicles. - It contains a subset of OpenGL plus a number of extensions for the - special needs of embedded systems. - . - OpenGL|ES 1.x provides an API for fixed-function hardware. - -Package: libgles1-mesa-dev -Section: libdevel -Architecture: any -Depends: - libgles1-mesa (= ${binary:Version}), - libegl1-mesa-dev, - ${misc:Depends}, -Multi-Arch: same -Description: free implementation of the OpenGL|ES 1.x API -- development files - OpenGL|ES is a cross-platform API for full-function 2D and 3D graphics on - embedded systems - including consoles, phones, appliances and vehicles. - It contains a subset of OpenGL plus a number of extensions for the - special needs of embedded systems. - . - OpenGL|ES 1.x provides an API for fixed-function hardware. - . - This package provides a development environment for building programs using - the OpenGL|ES 1.x APIs. - Package: libgles2-mesa Section: libs Architecture: any @@ -298,13 +244,11 @@ ${shlibs:Depends}, ${misc:Depends}, libglapi-mesa (= ${binary:Version}), - libudev1 [linux-any], - libgl1-mesa-dri (>= 7.2) + libgl1-mesa-dri Conflicts: libgl1 Replaces: libgl1 Provides: libgl1 Breaks: - glx-diversions (<< 0.4), libopengl-perl (<< 0.6704+dfsg-2), Pre-Depends: ${misc:Pre-Depends} Multi-Arch: same @@ -325,15 +269,12 @@ Package: libgl1-mesa-dri Section: libs -Priority: optional Architecture: any Pre-Depends: ${misc:Pre-Depends} Depends: ${shlibs:Depends}, ${misc:Depends} Recommends: libtxc-dxtn-s2tc | libtxc-dxtn-s2tc0 | libtxc-dxtn0 -Breaks: - xserver-xorg-core (<< 2:1.14.3-5), Multi-Arch: same Description: free implementation of the OpenGL API -- DRI modules This version of Mesa provides GLX and DRI capabilities: it is capable of @@ -352,7 +293,7 @@ Depends: mesa-common-dev (= ${binary:Version}), libgl1-mesa-glx (= ${binary:Version}), - libdrm-dev (>= 2.4.65) [!hurd-any], + libdrm-dev (>= 2.4.74) [!hurd-any], libx11-dev, libx11-xcb-dev, libxcb-dri3-dev, @@ -474,30 +415,27 @@ Package: mesa-vulkan-drivers Section: libs -Architecture: linux-amd64 linux-i386 linux-x32 +Architecture: amd64 arm64 armel armhf i386 mips mips64el mipsel powerpc ppc64 ppc64el sparc64 x32 Pre-Depends: ${misc:Pre-Depends} Depends: libvulkan1, ${shlibs:Depends}, ${misc:Depends} +Multi-Arch: same Description: Mesa Vulkan graphics drivers Vulkan is a low-overhead 3D graphics and compute API. This package includes Vulkan drivers provided by the Mesa project. Package: mesa-opencl-icd Section: libs -Architecture: amd64 i386 arm64 armhf +Architecture: amd64 arm64 armel armhf i386 kfreebsd-amd64 kfreebsd-i386 mips mips64el mipsel powerpc ppc64 sparc64 ppc64el Pre-Depends: ${misc:Pre-Depends} Depends: - libclc-r600 (>= 0.2.0+git20150813), - libclc-amdgcn, + libclc-r600 (>= 0.2.0+git20170213), + libclc-amdgcn (>= 0.2.0+git20170213), ocl-icd-libopencl1 | libopencl1, ${shlibs:Depends}, ${misc:Depends}, -Replaces: - libgl1-mesa-dri (<< 10.3.0-1), -Breaks: - libgl1-mesa-dri (<< 10.3.0-1), Provides: opencl-icd Multi-Arch: same Description: free implementation of the OpenCL API -- ICD runtime diff -Nru mesa-12.0.6/debian/copyright mesa-17.0.7/debian/copyright --- mesa-12.0.6/debian/copyright 2017-06-26 12:58:28.000000000 +0000 +++ mesa-17.0.7/debian/copyright 2017-06-26 12:58:29.000000000 +0000 @@ -4,11 +4,11 @@ again debianized by Thierry Reding on Sat, 14 Oct 2006 02:01:12 +0200. -It was downloaded from http://www.mesa3d.org/download.html +It was downloaded from https://www.mesa3d.org/download.html For more information see: - http://www.mesa3d.org/ + https://www.mesa3d.org/ ------------------------------------------------------------------------------- The Mesa distribution consists of several components. Different copyrights and diff -Nru mesa-12.0.6/debian/git-cleanup.sh mesa-17.0.7/debian/git-cleanup.sh --- mesa-12.0.6/debian/git-cleanup.sh 2017-06-26 12:58:28.000000000 +0000 +++ mesa-17.0.7/debian/git-cleanup.sh 1970-01-01 00:00:00.000000000 +0000 @@ -1,75 +0,0 @@ -#!/bin/sh -# © 2011 Cyril Brulebois -set -e - -### First phase, files known to make dpkg-source unhappy. - -# List broken symlinks: -symlinks=$(find -type l) - -# Symlinks vs. directories: -dirs_vs_symlinks='' - -# Modified binaries: -binaries=' -src/gallium/state_trackers/d3d1x/progs/bin/d3d10tri.exe -src/gallium/state_trackers/d3d1x/progs/bin/d3d11gears.exe -src/gallium/state_trackers/d3d1x/progs/bin/d3d11spikysphere.exe -src/gallium/state_trackers/d3d1x/progs/bin/d3d11tex.exe -src/gallium/state_trackers/d3d1x/progs/bin/d3d11tri.exe -src/gallium/state_trackers/python/tests/regress/fragment-shader/frag-abs.png -docs/gears.png -' - -case $1 in - "") clean=0; echo "I: No parameter given, listing only (-f to remove).";; - "-f") clean=1; echo "I: Removing files.";; - *) clean=0; echo "I: Unknown parameter given, listing only (-f to remove).";; -esac - -# Readibility: -echo - -for x in $symlinks $dirs_vs_symlinks $binaries; do - # Do not fail if the file went away already, only warn: - if [ -e $x -o -L $x ]; then - if [ $clean = 1 ]; then - git rm $x - else - echo "I: Would remove $x" - fi - else - echo "W: Unable to remove non-existing: $x" - fi -done - -### Second phase, kill all files in git not in the tarball -version=$(dpkg-parsechangelog|awk '/Version: / {print $2}'|sed 's/-.*$//') -tarball="../mesa_$version.orig.tar.gz" -if [ ! -f $tarball ]; then - echo "E: Missing tarball ($tarball), you could use: uscan --download-current --rename" - exit 1 -fi - -# Be lazy for now, temporary files would be better: -one=1 -two=2 - -# Strip one directory, Mesa-$version/ is the top-level: -tar tfz $tarball | sed 's,[^/]*/,,' | sort > $two -# List all files known to git, except those under debian/: -git ls-files | grep -v ^debian/ | sort > $one - -for x in $(diff -u $one $two|tail -n +3|grep ^-|sed 's/^-//'); do - if [ -e $x -o -L $x ]; then - if [ $clean = 1 ]; then - git rm $x - else - echo "I: Would remove $x" - fi - else - echo "W: Unable to remove non-existing: $x (maybe gone during 1st phase)" - fi -done - -rm $one $two diff -Nru mesa-12.0.6/debian/libgl1-mesa-glx.symbols mesa-17.0.7/debian/libgl1-mesa-glx.symbols --- mesa-12.0.6/debian/libgl1-mesa-glx.symbols 2017-06-26 12:58:28.000000000 +0000 +++ mesa-17.0.7/debian/libgl1-mesa-glx.symbols 2017-06-26 12:58:29.000000000 +0000 @@ -49,17 +49,22 @@ glBindVertexBuffer@Base 0 glBindVertexBuffers@Base 0 glBitmap@Base 0 + glBlendBarrier@Base 13.0.0~ glBlendColor@Base 0 glBlendColorEXT@Base 0 glBlendEquation@Base 0 glBlendEquationEXT@Base 0 glBlendEquationSeparate@Base 0 + glBlendEquationSeparatei@Base 13.0.0~ glBlendEquationSeparateiARB@Base 0 + glBlendEquationi@Base 13.0.0~ glBlendEquationiARB@Base 0 glBlendFunc@Base 0 glBlendFuncSeparate@Base 0 glBlendFuncSeparateEXT@Base 0 + glBlendFuncSeparatei@Base 13.0.0~ glBlendFuncSeparateiARB@Base 0 + glBlendFunci@Base 13.0.0~ glBlendFunciARB@Base 0 glBlitFramebuffer@Base 0 glBufferData@Base 0 @@ -388,6 +393,7 @@ glGetFramebufferAttachmentParameteriv@Base 0 glGetFramebufferAttachmentParameterivEXT@Base 0 glGetFramebufferParameteriv@Base 12.0.1 + glGetGraphicsResetStatus@Base 13.0.0~ glGetGraphicsResetStatusARB@Base 0 glGetHandleARB@Base 0 glGetHistogram@Base 0 @@ -514,8 +520,11 @@ glGetnSeparableFilterARB@Base 0 glGetnTexImageARB@Base 0 glGetnUniformdvARB@Base 0 + glGetnUniformfv@Base 13.0.0~ glGetnUniformfvARB@Base 0 + glGetnUniformiv@Base 13.0.0~ glGetnUniformivARB@Base 0 + glGetnUniformuiv@Base 13.0.0~ glGetnUniformuivARB@Base 0 glHint@Base 0 glHistogram@Base 0 @@ -723,6 +732,7 @@ glOrthof@Base 0 glOrthox@Base 0 glPassThrough@Base 0 + glPatchParameteri@Base 13.0.0~ glPauseTransformFeedback@Base 0 glPixelMapfv@Base 0 glPixelMapuiv@Base 0 @@ -754,6 +764,7 @@ glPopDebugGroup@Base 0 glPopMatrix@Base 0 glPopName@Base 0 + glPrimitiveBoundingBox@Base 13.0.0~ glPrimitiveRestartIndex@Base 0 glPrimitiveRestartIndexNV@Base 0 glPrimitiveRestartNV@Base 0 @@ -836,6 +847,7 @@ glRasterPos4sv@Base 0 glReadBuffer@Base 0 glReadPixels@Base 0 + glReadnPixels@Base 13.0.0~ glReadnPixelsARB@Base 0 glRectd@Base 0 glRectdv@Base 0 diff -Nru mesa-12.0.6/debian/libgles1-mesa.lintian-overrides mesa-17.0.7/debian/libgles1-mesa.lintian-overrides --- mesa-12.0.6/debian/libgles1-mesa.lintian-overrides 2017-06-26 12:58:28.000000000 +0000 +++ mesa-17.0.7/debian/libgles1-mesa.lintian-overrides 1970-01-01 00:00:00.000000000 +0000 @@ -1 +0,0 @@ -package-name-doesnt-match-sonames libGLESv1-CM1 diff -Nru mesa-12.0.6/debian/libgles1-mesa.symbols mesa-17.0.7/debian/libgles1-mesa.symbols --- mesa-12.0.6/debian/libgles1-mesa.symbols 2017-06-26 12:58:28.000000000 +0000 +++ mesa-17.0.7/debian/libgles1-mesa.symbols 1970-01-01 00:00:00.000000000 +0000 @@ -1,148 +0,0 @@ -libGLESv1_CM.so.1 libgles1-mesa #MINVER# | libgles1 - glActiveTexture@Base 7.8.1 - glAlphaFunc@Base 7.8.1 - glAlphaFuncx@Base 7.8.1 - glBindBuffer@Base 7.8.1 - glBindTexture@Base 7.8.1 - glBlendFunc@Base 7.8.1 - glBufferData@Base 7.8.1 - glBufferSubData@Base 7.8.1 - glClear@Base 7.8.1 - glClearColor@Base 7.8.1 - glClearColorx@Base 7.8.1 - glClearDepthf@Base 7.8.1 - glClearDepthx@Base 7.8.1 - glClearStencil@Base 7.8.1 - glClientActiveTexture@Base 7.8.1 - glClipPlanef@Base 7.8.1 - glClipPlanex@Base 7.8.1 - glColor4f@Base 7.8.1 - glColor4ub@Base 7.8.1 - glColor4x@Base 7.8.1 - glColorMask@Base 7.8.1 - glColorPointer@Base 7.8.1 - glCompressedTexImage2D@Base 7.8.1 - glCompressedTexSubImage2D@Base 7.8.1 - glCopyTexImage2D@Base 7.8.1 - glCopyTexSubImage2D@Base 7.8.1 - glCullFace@Base 7.8.1 - glDeleteBuffers@Base 7.8.1 - glDeleteTextures@Base 7.8.1 - glDepthFunc@Base 7.8.1 - glDepthMask@Base 7.8.1 - glDepthRangef@Base 7.8.1 - glDepthRangex@Base 7.8.1 - glDisable@Base 7.8.1 - glDisableClientState@Base 7.8.1 - glDrawArrays@Base 7.8.1 - glDrawElements@Base 7.8.1 - glEnable@Base 7.8.1 - glEnableClientState@Base 7.8.1 - glFinish@Base 7.8.1 - glFlush@Base 7.8.1 - glFogf@Base 7.8.1 - glFogfv@Base 7.8.1 - glFogx@Base 7.8.1 - glFogxv@Base 7.8.1 - glFrontFace@Base 7.8.1 - glFrustumf@Base 7.8.1 - glFrustumx@Base 7.8.1 - glGenBuffers@Base 7.8.1 - glGenTextures@Base 7.8.1 - glGetBooleanv@Base 7.8.1 - glGetBufferParameteriv@Base 7.8.1 - glGetClipPlanef@Base 7.8.1 - glGetClipPlanex@Base 7.8.1 - glGetError@Base 7.8.1 - glGetFixedv@Base 7.8.1 - glGetFloatv@Base 7.8.1 - glGetIntegerv@Base 7.8.1 - glGetLightfv@Base 7.8.1 - glGetLightxv@Base 7.8.1 - glGetMaterialfv@Base 7.8.1 - glGetMaterialxv@Base 7.8.1 - glGetPointerv@Base 7.8.1 - glGetString@Base 7.8.1 - glGetTexEnvfv@Base 7.8.1 - glGetTexEnviv@Base 7.8.1 - glGetTexEnvxv@Base 7.8.1 - glGetTexParameterfv@Base 7.8.1 - glGetTexParameteriv@Base 7.8.1 - glGetTexParameterxv@Base 7.8.1 - glHint@Base 7.8.1 - glIsBuffer@Base 7.8.1 - glIsEnabled@Base 7.8.1 - glIsTexture@Base 7.8.1 - glLightModelf@Base 7.8.1 - glLightModelfv@Base 7.8.1 - glLightModelx@Base 7.8.1 - glLightModelxv@Base 7.8.1 - glLightf@Base 7.8.1 - glLightfv@Base 7.8.1 - glLightx@Base 7.8.1 - glLightxv@Base 7.8.1 - glLineWidth@Base 7.8.1 - glLineWidthx@Base 7.8.1 - glLoadIdentity@Base 7.8.1 - glLoadMatrixf@Base 7.8.1 - glLoadMatrixx@Base 7.8.1 - glLogicOp@Base 7.8.1 - glMaterialf@Base 7.8.1 - glMaterialfv@Base 7.8.1 - glMaterialx@Base 7.8.1 - glMaterialxv@Base 7.8.1 - glMatrixMode@Base 7.8.1 - glMultMatrixf@Base 7.8.1 - glMultMatrixx@Base 7.8.1 - glMultiDrawArraysEXT@Base 7.8.1 - glMultiDrawElementsEXT@Base 7.8.1 - glMultiTexCoord4f@Base 7.8.1 - glMultiTexCoord4x@Base 7.8.1 - glNormal3f@Base 7.8.1 - glNormal3x@Base 7.8.1 - glNormalPointer@Base 7.8.1 - glOrthof@Base 7.8.1 - glOrthox@Base 7.8.1 - glPixelStorei@Base 7.8.1 - glPointParameterf@Base 7.8.1 - glPointParameterfv@Base 7.8.1 - glPointParameterx@Base 7.8.1 - glPointParameterxv@Base 7.8.1 - glPointSize@Base 7.8.1 - glPointSizePointerOES@Base 7.8.1 - glPointSizex@Base 7.8.1 - glPolygonOffset@Base 7.8.1 - glPolygonOffsetx@Base 7.8.1 - glPopMatrix@Base 7.8.1 - glPushMatrix@Base 7.8.1 - glReadPixels@Base 7.8.1 - glRotatef@Base 7.8.1 - glRotatex@Base 7.8.1 - glSampleCoverage@Base 7.8.1 - glSampleCoveragex@Base 7.8.1 - glScalef@Base 7.8.1 - glScalex@Base 7.8.1 - glScissor@Base 7.8.1 - glShadeModel@Base 7.8.1 - glStencilFunc@Base 7.8.1 - glStencilMask@Base 7.8.1 - glStencilOp@Base 7.8.1 - glTexCoordPointer@Base 7.8.1 - glTexEnvf@Base 7.8.1 - glTexEnvfv@Base 7.8.1 - glTexEnvi@Base 7.8.1 - glTexEnviv@Base 7.8.1 - glTexEnvx@Base 7.8.1 - glTexEnvxv@Base 7.8.1 - glTexImage2D@Base 7.8.1 - glTexParameterf@Base 7.8.1 - glTexParameterfv@Base 7.8.1 - glTexParameteri@Base 7.8.1 - glTexParameteriv@Base 7.8.1 - glTexParameterx@Base 7.8.1 - glTexParameterxv@Base 7.8.1 - glTexSubImage2D@Base 7.8.1 - glTranslatef@Base 7.8.1 - glTranslatex@Base 7.8.1 - glVertexPointer@Base 7.8.1 - glViewport@Base 7.8.1 diff -Nru mesa-12.0.6/debian/libgles2-mesa.symbols mesa-17.0.7/debian/libgles2-mesa.symbols --- mesa-12.0.6/debian/libgles2-mesa.symbols 2017-06-26 12:58:28.000000000 +0000 +++ mesa-17.0.7/debian/libgles2-mesa.symbols 2017-06-26 12:58:29.000000000 +0000 @@ -18,11 +18,16 @@ glBindTransformFeedback@Base 9.1~ glBindVertexArray@Base 9.1~ glBindVertexBuffer@Base 10.7.0~ + glBlendBarrier@Base 13.0.0~ glBlendColor@Base 7.8.1 glBlendEquation@Base 7.8.1 glBlendEquationSeparate@Base 7.8.1 + glBlendEquationSeparatei@Base 13.0.0~ + glBlendEquationi@Base 13.0.0~ glBlendFunc@Base 7.8.1 glBlendFuncSeparate@Base 7.8.1 + glBlendFuncSeparatei@Base 13.0.0~ + glBlendFunci@Base 13.0.0~ glBlitFramebuffer@Base 9.1~ glBufferData@Base 7.8.1 glBufferSubData@Base 7.8.1 @@ -130,6 +135,7 @@ glGetFragDataLocation@Base 9.1~ glGetFramebufferAttachmentParameteriv@Base 7.8.1 glGetFramebufferParameteriv@Base 12.0.1 + glGetGraphicsResetStatus@Base 13.0.0~ glGetInteger64i_v@Base 9.1~ glGetInteger64v@Base 9.1~ glGetIntegeri_v@Base 9.1~ @@ -138,6 +144,7 @@ glGetMultisamplefv@Base 10.7.0~ glGetObjectLabel@Base 12.0.0~ glGetObjectPtrLabel@Base 12.0.0~ + glGetPointerv@Base 13.0.0~ glGetProgramBinary@Base 9.1~ glGetProgramInfoLog@Base 7.8.1 glGetProgramInterfaceiv@Base 12.0.1 @@ -182,6 +189,9 @@ glGetVertexAttribPointerv@Base 7.8.1 glGetVertexAttribfv@Base 7.8.1 glGetVertexAttribiv@Base 7.8.1 + glGetnUniformfv@Base 13.0.0~ + glGetnUniformiv@Base 13.0.0~ + glGetnUniformuiv@Base 13.0.0~ glHint@Base 7.8.1 glInvalidateFramebuffer@Base 9.1~ glInvalidateSubFramebuffer@Base 9.1~ @@ -209,10 +219,12 @@ glMultiDrawElementsEXT@Base 7.8.1 glObjectLabel@Base 12.0.0~ glObjectPtrLabel@Base 12.0.0~ + glPatchParameteri@Base 13.0.0~ glPauseTransformFeedback@Base 9.1~ glPixelStorei@Base 7.8.1 glPolygonOffset@Base 7.8.1 glPopDebugGroup@Base 12.0.0~ + glPrimitiveBoundingBox@Base 13.0.0~ glProgramBinary@Base 9.1~ glProgramParameteri@Base 9.1~ glProgramUniform1f@Base 12.0.1 @@ -251,6 +263,7 @@ glPushDebugGroup@Base 12.0.0~ glReadBuffer@Base 9.1~ glReadPixels@Base 7.8.1 + glReadnPixels@Base 13.0.0~ glReleaseShaderCompiler@Base 7.8.1 glRenderbufferStorage@Base 7.8.1 glRenderbufferStorageMultisample@Base 9.1~ diff -Nru mesa-12.0.6/debian/mesa-vulkan-drivers.install mesa-17.0.7/debian/mesa-vulkan-drivers.install --- mesa-12.0.6/debian/mesa-vulkan-drivers.install 2017-06-26 12:58:28.000000000 +0000 +++ mesa-17.0.7/debian/mesa-vulkan-drivers.install 2017-06-26 12:58:29.000000000 +0000 @@ -1,2 +1,2 @@ usr/share/vulkan/icd.d/*.json -usr/lib/*/libvulkan_intel.so +usr/lib/*/libvulkan_*.so diff -Nru mesa-12.0.6/debian/mesa-vulkan-drivers.lintian-overrides mesa-17.0.7/debian/mesa-vulkan-drivers.lintian-overrides --- mesa-12.0.6/debian/mesa-vulkan-drivers.lintian-overrides 2017-06-26 12:58:28.000000000 +0000 +++ mesa-17.0.7/debian/mesa-vulkan-drivers.lintian-overrides 2017-06-26 12:58:29.000000000 +0000 @@ -1,2 +1,3 @@ -package-name-doesnt-match-sonames libvulkan-intel +package-name-doesnt-match-sonames libvulkan-intel libvulkan-radeon shlib-without-versioned-soname usr/lib/*/libvulkan_intel.so libvulkan_intel.so +shlib-without-versioned-soname usr/lib/*/libvulkan_radeon.so libvulkan_radeon.so diff -Nru mesa-12.0.6/debian/patches/egl-platform-mir.patch mesa-17.0.7/debian/patches/egl-platform-mir.patch --- mesa-12.0.6/debian/patches/egl-platform-mir.patch 2017-06-26 12:58:28.000000000 +0000 +++ mesa-17.0.7/debian/patches/egl-platform-mir.patch 2017-06-26 12:58:29.000000000 +0000 @@ -1,8 +1,8 @@ --- a/configure.ac +++ b/configure.ac -@@ -2037,7 +2037,9 @@ for plat in $egl_platforms; do - +@@ -2099,7 +2099,9 @@ for plat in $egl_platforms; do android) + PKG_CHECK_MODULES([ANDROID], [cutils hardware sync]) ;; - + mir) @@ -11,14 +11,14 @@ *) AC_MSG_ERROR([EGL platform '$plat' does not exist]) ;; -@@ -2063,6 +2065,7 @@ AM_CONDITIONAL(HAVE_PLATFORM_WAYLAND, ec +@@ -2126,6 +2128,7 @@ AM_CONDITIONAL(HAVE_PLATFORM_WAYLAND, ec AM_CONDITIONAL(HAVE_EGL_PLATFORM_DRM, echo "$egl_platforms" | grep -q 'drm') AM_CONDITIONAL(HAVE_EGL_PLATFORM_SURFACELESS, echo "$egl_platforms" | grep -q 'surfaceless') AM_CONDITIONAL(HAVE_EGL_PLATFORM_ANDROID, echo "$egl_platforms" | grep -q 'android') +AM_CONDITIONAL(HAVE_EGL_PLATFORM_MIR, echo "$egl_platforms" | grep -q 'mir') - AM_CONDITIONAL(HAVE_EGL_DRIVER_DRI2, test "x$HAVE_EGL_DRIVER_DRI2" != "x") - + AC_SUBST([EGL_NATIVE_PLATFORM]) + AC_SUBST([EGL_CFLAGS]) --- a/include/EGL/eglplatform.h +++ b/include/EGL/eglplatform.h @@ -105,6 +105,13 @@ typedef struct ANativeWindow* @@ -37,7 +37,7 @@ #if defined(MESA_EGL_NO_X11_HEADERS) --- a/include/GL/internal/dri_interface.h +++ b/include/GL/internal/dri_interface.h -@@ -921,10 +921,12 @@ struct __DRIbufferRec { +@@ -963,10 +963,12 @@ struct __DRIbufferRec { unsigned int pitch; unsigned int cpp; unsigned int flags; @@ -51,11 +51,9 @@ struct __DRIdri2LoaderExtensionRec { __DRIextension base; -Index: mesa-12.0.2/src/egl/drivers/dri2/egl_dri2.c -=================================================================== ---- mesa-12.0.2.orig/src/egl/drivers/dri2/egl_dri2.c 2016-09-16 12:11:30.975350268 +1000 -+++ mesa-12.0.2/src/egl/drivers/dri2/egl_dri2.c 2016-09-16 13:57:41.750324740 +1000 -@@ -813,6 +813,11 @@ +--- a/src/egl/drivers/dri2/egl_dri2.c ++++ b/src/egl/drivers/dri2/egl_dri2.c +@@ -834,6 +834,11 @@ dri2_initialize(_EGLDriver *drv, _EGLDis ret = dri2_initialize_wayland(drv, disp); break; #endif @@ -67,7 +65,7 @@ #ifdef HAVE_ANDROID_PLATFORM case _EGL_PLATFORM_ANDROID: ret = dri2_initialize_android(drv, disp); -@@ -876,6 +881,13 @@ +@@ -906,6 +911,13 @@ dri2_display_release(_EGLDisplay *disp) } break; #endif @@ -81,7 +79,7 @@ #ifdef HAVE_WAYLAND_PLATFORM case _EGL_PLATFORM_WAYLAND: if (dri2_dpy->wl_drm) -@@ -862,7 +875,8 @@ dri2_terminate(_EGLDriver *drv, _EGLDisp +@@ -928,7 +940,8 @@ dri2_display_release(_EGLDisplay *disp) * the ones from the gbm device. As such the gbm itself is responsible * for the cleanup. */ @@ -104,18 +102,18 @@ #include "eglconfig.h" #include "eglcontext.h" #include "egldisplay.h" -@@ -217,6 +221,10 @@ struct dri2_egl_display +@@ -226,6 +230,10 @@ struct dri2_egl_display - int is_render_node; - int is_different_gpu; + int is_render_node; + int is_different_gpu; + +#ifdef HAVE_MIR_PLATFORM -+ MirMesaEGLNativeDisplay *mir_disp; ++ MirMesaEGLNativeDisplay *mir_disp; +#endif }; struct dri2_egl_context -@@ -263,7 +271,7 @@ struct dri2_egl_surface +@@ -272,7 +280,7 @@ struct dri2_egl_surface struct gbm_dri_surface *gbm_surf; #endif @@ -124,7 +122,7 @@ __DRIbuffer *dri_buffers[__DRI_BUFFER_COUNT]; struct { #ifdef HAVE_WAYLAND_PLATFORM -@@ -275,9 +283,13 @@ struct dri2_egl_surface +@@ -284,9 +292,13 @@ struct dri2_egl_surface void *data; int data_size; #endif @@ -139,9 +137,9 @@ int locked; int age; } color_buffers[4], *back, *current; -@@ -291,6 +303,10 @@ struct dri2_egl_surface - /* EGL-owned buffers */ - __DRIbuffer *local_buffers[__DRI_BUFFER_COUNT]; +@@ -306,6 +318,10 @@ struct dri2_egl_surface + __DRIimage *front; + unsigned int visual; #endif + +#ifdef HAVE_MIR_PLATFORM @@ -149,18 +147,20 @@ +#endif }; - -@@ -387,4 +403,7 @@ const __DRIconfig * - dri2_get_dri_config(struct dri2_egl_config *conf, EGLint surface_type, - EGLenum colorspace); + struct dri2_egl_config +@@ -394,6 +410,9 @@ dri2_initialize_android(_EGLDriver *drv, + EGLBoolean + dri2_initialize_surfaceless(_EGLDriver *drv, _EGLDisplay *disp); +EGLBoolean +dri2_initialize_mir(_EGLDriver *drv, _EGLDisplay *disp); + - #endif /* EGL_DRI2_INCLUDED */ + void + dri2_flush_drawable_for_swapbuffers(_EGLDisplay *disp, _EGLSurface *draw); + --- /dev/null +++ b/src/egl/drivers/dri2/platform_mir.c -@@ -0,0 +1,637 @@ +@@ -0,0 +1,636 @@ +/* + * Copyright © 2012 Canonical, Inc + * @@ -487,7 +487,7 @@ + struct dri2_egl_config *dri2_conf = dri2_egl_config(conf); + struct dri2_egl_surface *dri2_surf; + const __DRIconfig *config; -+ MirSurfaceParameters surf_params; ++ MirWindowParameters win_params; + + (void) drv; + @@ -501,11 +501,11 @@ + goto cleanup_surf; + + dri2_surf->mir_surf = window; -+ if (!dri2_surf->mir_surf->surface_get_parameters(dri2_surf->mir_surf, &surf_params)) ++ if (!dri2_surf->mir_surf->surface_get_parameters(dri2_surf->mir_surf, &win_params)) + goto cleanup_surf; + -+ dri2_surf->base.Width = surf_params.width; -+ dri2_surf->base.Height = surf_params.height; ++ dri2_surf->base.Width = win_params.width; ++ dri2_surf->base.Height = win_params.height; + + dri2_surf->dri_buffers[__DRI_BUFFER_FRONT_LEFT] = + calloc(sizeof(*dri2_surf->dri_buffers[0]), 1); @@ -739,7 +739,6 @@ + dri2_dpy->mir_disp = disp->PlatformDisplay; + dri2_dpy->mir_disp->display_get_platform(dri2_dpy->mir_disp, &platform); + dri2_dpy->fd = platform.fd[0]; -+ dri2_dpy->device_name = loader_get_device_name_for_fd(dri2_dpy->fd); + + /* + * At the moment, a pointer to gbm_device is the first and only @@ -800,7 +799,7 @@ +} --- a/src/egl/main/egldisplay.c +++ b/src/egl/main/egldisplay.c -@@ -56,7 +56,10 @@ +@@ -58,7 +58,10 @@ #ifdef HAVE_DRM_PLATFORM #include #endif @@ -812,7 +811,7 @@ /** * Map --with-egl-platforms names to platform types. -@@ -71,6 +74,7 @@ static const struct { +@@ -73,6 +76,7 @@ static const struct { { _EGL_PLATFORM_ANDROID, "android" }, { _EGL_PLATFORM_HAIKU, "haiku" }, { _EGL_PLATFORM_SURFACELESS, "surfaceless" }, @@ -820,7 +819,7 @@ }; -@@ -130,6 +134,47 @@ _eglPointerIsDereferencable(void *p) +@@ -132,6 +136,47 @@ _eglPointerIsDereferencable(void *p) #endif } @@ -868,7 +867,7 @@ /** * Try detecting native platform with the help of native display characteristcs. -@@ -140,6 +185,11 @@ _eglNativePlatformDetectNativeDisplay(vo +@@ -142,6 +187,11 @@ _eglNativePlatformDetectNativeDisplay(vo if (nativeDisplay == EGL_DEFAULT_DISPLAY) return _EGL_INVALID_PLATFORM; @@ -880,15 +879,15 @@ if (_eglPointerIsDereferencable(nativeDisplay)) { void *first_pointer = *(void **) nativeDisplay; -@@ -178,7 +228,7 @@ _eglNativePlatformDetectNativeDisplay(vo +@@ -180,7 +230,7 @@ _eglNativePlatformDetectNativeDisplay(vo _EGLPlatformType _eglGetNativePlatform(void *nativeDisplay) { -- static _EGLPlatformType native_platform = _EGL_INVALID_PLATFORM; -+ _EGLPlatformType native_platform = _EGL_INVALID_PLATFORM; - char *detection_method = NULL; +- static _EGLPlatformType native_platform; ++ _EGLPlatformType native_platform; + char *detection_method; - if (native_platform == _EGL_INVALID_PLATFORM) { + native_platform = _eglGetNativePlatformFromEnv(); --- a/src/egl/main/egldisplay.h +++ b/src/egl/main/egldisplay.h @@ -50,6 +50,7 @@ enum _egl_platform_type { @@ -901,7 +900,7 @@ _EGL_INVALID_PLATFORM = -1 --- a/src/gallium/state_trackers/dri/dri2.c +++ b/src/gallium/state_trackers/dri/dri2.c -@@ -582,13 +582,21 @@ dri2_allocate_textures(struct dri_contex +@@ -604,13 +604,21 @@ dri2_allocate_textures(struct dri_contex templ.height0 = dri_drawable->h; templ.format = format; templ.bind = bind; @@ -938,7 +937,7 @@ .getBuffers = dri_get_buffers, .flushFrontBuffer = dri_flush_front_buffer, -@@ -642,6 +642,43 @@ gbm_dri_to_gbm_format(uint32_t dri_forma +@@ -646,6 +646,49 @@ gbm_dri_to_gbm_format(uint32_t dri_forma return ret; } @@ -948,8 +947,14 @@ + uint32_t dri_format = 0; + + switch (gbm_format) { ++ case GBM_FORMAT_R8: ++ dri_format = __DRI_IMAGE_FORMAT_R8; ++ break; ++ case GBM_FORMAT_GR88: ++ dri_format = __DRI_IMAGE_FORMAT_GR88; ++ break; + case GBM_FORMAT_RGB565: -+ dri_format =__DRI_IMAGE_FORMAT_RGB565; ++ dri_format = __DRI_IMAGE_FORMAT_RGB565; + break; + case GBM_FORMAT_XRGB8888: + case GBM_BO_FORMAT_XRGB8888: @@ -982,13 +987,19 @@ static struct gbm_bo * gbm_dri_bo_import(struct gbm_device *gbm, uint32_t type, void *buffer, uint32_t usage) -@@ -866,34 +903,7 @@ gbm_dri_bo_create(struct gbm_device *gbm +@@ -870,40 +913,7 @@ gbm_dri_bo_create(struct gbm_device *gbm bo->base.base.height = height; bo->base.base.format = format; - switch (format) { +- case GBM_FORMAT_R8: +- dri_format = __DRI_IMAGE_FORMAT_R8; +- break; +- case GBM_FORMAT_GR88: +- dri_format = __DRI_IMAGE_FORMAT_GR88; +- break; - case GBM_FORMAT_RGB565: -- dri_format =__DRI_IMAGE_FORMAT_RGB565; +- dri_format = __DRI_IMAGE_FORMAT_RGB565; - break; - case GBM_FORMAT_XRGB8888: - case GBM_BO_FORMAT_XRGB8888: @@ -1020,7 +1031,7 @@ dri_use |= __DRI_IMAGE_USE_SCANOUT; --- a/src/egl/Makefile.am +++ b/src/egl/Makefile.am -@@ -89,6 +89,12 @@ AM_CFLAGS += -DHAVE_ANDROID_PLATFORM +@@ -91,6 +91,12 @@ libEGL_la_LIBADD += $(ANDROID_LIBS) dri2_backend_FILES += drivers/dri2/platform_android.c endif @@ -1030,6 +1041,6 @@ +dri2_backend_FILES += drivers/dri2/platform_mir.c +endif + - if HAVE_EGL_DRIVER_DRI2 AM_CFLAGS += \ -I$(top_srcdir)/src/loader \ + -I$(top_srcdir)/src/egl/drivers/dri2 \ diff -Nru mesa-12.0.6/debian/patches/egl-platform-rs.patch mesa-17.0.7/debian/patches/egl-platform-rs.patch --- mesa-12.0.6/debian/patches/egl-platform-rs.patch 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/debian/patches/egl-platform-rs.patch 2017-06-26 12:58:29.000000000 +0000 @@ -0,0 +1,1185 @@ +--- a/configure.ac ++++ b/configure.ac +@@ -91,6 +91,7 @@ XSHMFENCE_REQUIRED=1.1 + XVMC_REQUIRED=1.0.6 + PYTHON_MAKO_REQUIRED=0.8.0 + LIBSENSORS_REQUIRED=4.0.0 ++MIR_REQUIRED=0.26.2 + + dnl LLVM versions + LLVM_REQUIRED_GALLIUM=3.3.0 +@@ -2131,9 +2132,15 @@ for plat in $egl_platforms; do + android) + PKG_CHECK_MODULES([ANDROID], [cutils hardware sync]) + ;; +- mir) +- PKG_CHECK_MODULES([MIR], [mirclient mir-client-platform-mesa]) +- ;; ++ ++ mir) ++ PKG_CHECK_MODULES([MIR], [mirclient mir-client-platform-mesa]) ++ ;; ++ ++ rs) ++ PKG_CHECK_MODULES([RS], [mirclient >= $MIR_REQUIRED]) ++ ;; ++ + *) + AC_MSG_ERROR([EGL platform '$plat' does not exist]) + ;; +@@ -2161,6 +2168,7 @@ AM_CONDITIONAL(HAVE_EGL_PLATFORM_DRM, ec + AM_CONDITIONAL(HAVE_EGL_PLATFORM_SURFACELESS, echo "$egl_platforms" | grep -q 'surfaceless') + AM_CONDITIONAL(HAVE_EGL_PLATFORM_ANDROID, echo "$egl_platforms" | grep -q 'android') + AM_CONDITIONAL(HAVE_EGL_PLATFORM_MIR, echo "$egl_platforms" | grep -q 'mir') ++AM_CONDITIONAL(HAVE_EGL_PLATFORM_RS, echo "$egl_platforms" | grep -q 'rs') + + AC_SUBST([EGL_NATIVE_PLATFORM]) + AC_SUBST([EGL_CFLAGS]) +--- a/include/EGL/eglplatform.h ++++ b/include/EGL/eglplatform.h +@@ -112,6 +112,13 @@ typedef MirEGLNativeDisplayType EGLNativ + typedef void *EGLNativePixmapType; + typedef MirEGLNativeWindowType EGLNativeWindowType; + ++#elif defined(RS_EGL_PLATFORM) ++ ++#include ++typedef MirEGLNativeDisplayType EGLNativeDisplayType; ++typedef void *EGLNativePixmapType; ++typedef MirEGLNativeWindowType EGLNativeWindowType; ++ + #elif defined(__unix__) || defined(__APPLE__) + + #if defined(MESA_EGL_NO_X11_HEADERS) +--- a/src/egl/Makefile.am ++++ b/src/egl/Makefile.am +@@ -97,6 +97,13 @@ AM_CFLAGS += $(MIR_CFLAGS) + dri2_backend_FILES += drivers/dri2/platform_mir.c + endif + ++if HAVE_EGL_PLATFORM_RS ++AM_CFLAGS += -DHAVE_RS_PLATFORM ++AM_CFLAGS += $(RS_CFLAGS) ++libEGL_la_LIBADD += $(RS_LIBS) ++dri2_backend_FILES += drivers/dri2/platform_rs.c ++endif ++ + AM_CFLAGS += \ + -I$(top_srcdir)/src/loader \ + -I$(top_srcdir)/src/egl/drivers/dri2 \ +--- a/src/egl/drivers/dri2/egl_dri2.c ++++ b/src/egl/drivers/dri2/egl_dri2.c +@@ -844,6 +844,11 @@ dri2_initialize(_EGLDriver *drv, _EGLDis + ret = dri2_initialize_android(drv, disp); + break; + #endif ++#ifdef HAVE_RS_PLATFORM ++ case _EGL_PLATFORM_RS: ++ ret = dri2_initialize_rs(drv, disp); ++ break; ++#endif + default: + _eglLog(_EGL_WARNING, "No EGL platform enabled."); + return EGL_FALSE; +@@ -911,6 +916,13 @@ dri2_display_release(_EGLDisplay *disp) + } + break; + #endif ++#ifdef HAVE_RS_PLATFORM ++ case _EGL_PLATFORM_RS: ++ if (dri2_dpy->own_device) { ++ gbm_device_destroy(&dri2_dpy->gbm_dri->base.base); ++ } ++ break; ++#endif + #ifdef HAVE_MIR_PLATFORM + case _EGL_PLATFORM_MIR: + if (dri2_dpy->own_device) { +@@ -941,7 +953,8 @@ dri2_display_release(_EGLDisplay *disp) + * for the cleanup. + */ + if (disp->Platform != _EGL_PLATFORM_DRM && +- disp->Platform != _EGL_PLATFORM_MIR) { ++ disp->Platform != _EGL_PLATFORM_MIR && ++ disp->Platform != _EGL_PLATFORM_RS) { + for (i = 0; dri2_dpy->driver_configs[i]; i++) + free((__DRIconfig *) dri2_dpy->driver_configs[i]); + free(dri2_dpy->driver_configs); +--- a/src/egl/drivers/dri2/egl_dri2.h ++++ b/src/egl/drivers/dri2/egl_dri2.h +@@ -74,6 +74,10 @@ + #include + #endif + ++#ifdef HAVE_RS_PLATFORM ++#include ++#endif ++ + #include "eglconfig.h" + #include "eglcontext.h" + #include "egldisplay.h" +@@ -234,6 +238,11 @@ struct dri2_egl_display + #ifdef HAVE_MIR_PLATFORM + MirMesaEGLNativeDisplay *mir_disp; + #endif ++#ifdef HAVE_RS_PLATFORM ++ MirConnection* mir_conn; ++ pthread_mutex_t lock; ++ pthread_cond_t cv; ++#endif + }; + + struct dri2_egl_context +@@ -292,10 +301,10 @@ struct dri2_egl_surface + void *data; + int data_size; + #endif +-#if HAVE_DRM_PLATFORM || defined(HAVE_MIR_PLATFORM) ++#if HAVE_DRM_PLATFORM || defined(HAVE_MIR_PLATFORM) || defined(HAVE_RS_PLATFORM) + struct gbm_bo *bo; + #endif +-#ifdef HAVE_MIR_PLATFORM ++#if defined(HAVE_MIR_PLATFORM) || defined(HAVE_RS_PLATFORM) + int fd; + int buffer_age; + #endif +@@ -314,6 +323,10 @@ struct dri2_egl_surface + __DRIbuffer *local_buffers[__DRI_BUFFER_COUNT]; + #endif + ++#ifdef HAVE_RS_PLATFORM ++ void* sc; ++#endif ++ + #if defined(HAVE_SURFACELESS_PLATFORM) + __DRIimage *front; + unsigned int visual; +@@ -413,6 +426,9 @@ dri2_initialize_surfaceless(_EGLDriver * + EGLBoolean + dri2_initialize_mir(_EGLDriver *drv, _EGLDisplay *disp); + ++EGLBoolean ++dri2_initialize_rs(_EGLDriver *drv, _EGLDisplay *disp); ++ + void + dri2_flush_drawable_for_swapbuffers(_EGLDisplay *disp, _EGLSurface *draw); + +@@ -443,5 +459,4 @@ dri2_set_WL_bind_wayland_display(_EGLDri + } + #endif + } +- + #endif /* EGL_DRI2_INCLUDED */ +--- /dev/null ++++ b/src/egl/drivers/dri2/platform_rs.c +@@ -0,0 +1,962 @@ ++/* ++ * Copyright © 2016 Canonical, Inc ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the "Software"), ++ * to deal in the Software without restriction, including without limitation ++ * the rights to use, copy, modify, merge, publish, distribute, sublicense, ++ * and/or sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice (including the next ++ * paragraph) shall be included in all copies or substantial portions of the ++ * Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, ++ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER ++ * DEALINGS IN THE SOFTWARE. ++ * ++ * Authors: ++ * Cemil Azizoglu ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#include "egl_dri2.h" ++#include "egl_dri2_fallbacks.h" ++#include "loader.h" ++ ++#define MAX_BUFFERS (4) ++#define NUM_DEFAULT_BUFFERS (3) /* Can be at most MAX_BUFFERS */ ++ ++enum buffer_state ++{ ++ buffer_state_none = 0, ++ buffer_state_available, ++ buffer_state_acquired, ++ buffer_state_submitted, ++}; ++ ++typedef struct SwapChain ++{ ++ MirRenderSurface* surface; ++ MirPresentationChain* chain; ++ MirPixelFormat format; ++ uint32_t gbm_format; ++ unsigned int buffer_count; ++ MirBuffer* buffers[MAX_BUFFERS]; ++ enum buffer_state state[MAX_BUFFERS]; ++ uint32_t next_buffer_to_use; ++ pthread_mutex_t lock; ++ pthread_cond_t cv; ++ struct MirExtensionGbmBufferV2 const* gbm_buffer_ext; ++} SwapChain; ++ ++static uint32_t ++mir_format_to_gbm_format(MirPixelFormat format) ++{ ++ uint32_t gbm_pf; ++ ++ switch (format) ++ { ++ case mir_pixel_format_argb_8888: ++ gbm_pf = GBM_FORMAT_ARGB8888; ++ break; ++ case mir_pixel_format_xrgb_8888: ++ gbm_pf = GBM_FORMAT_XRGB8888; ++ break; ++ case mir_pixel_format_abgr_8888: ++ gbm_pf = GBM_FORMAT_ABGR8888; ++ break; ++ case mir_pixel_format_xbgr_8888: ++ gbm_pf = GBM_FORMAT_XBGR8888; ++ break; ++ case mir_pixel_format_rgb_565: ++ gbm_pf = GBM_FORMAT_RGB565; ++ break; ++ default: ++ gbm_pf = UINT32_MAX; ++ break; ++ } ++ ++ return gbm_pf; ++} ++ ++static int ++get_format_bpp(MirPixelFormat format) ++{ ++ int bpp; ++ ++ switch (format) { ++ case mir_pixel_format_argb_8888: ++ case mir_pixel_format_xrgb_8888: ++ case mir_pixel_format_abgr_8888: ++ case mir_pixel_format_xbgr_8888: ++ bpp = 4; ++ break; ++ case mir_pixel_format_rgb_565: ++ bpp = 2; ++ break; ++ default: ++ bpp = 0; ++ break; ++ } ++ ++ return bpp; ++} ++ ++static struct gbm_bo * ++create_gbm_bo_from_buffer(struct gbm_device* gbm_dev, int fd, int width, int height, uint32_t stride, uint32_t format) ++{ ++ struct gbm_import_fd_data data; ++ ++ _eglLog(_EGL_INFO, "importing fd=%d", fd); ++ data.fd = fd; ++ data.width = width; ++ data.height = height; ++ data.format = format; ++ data.stride = stride; ++ ++ return gbm_bo_import(gbm_dev, GBM_BO_IMPORT_FD, &data, GBM_BO_USE_SCANOUT | GBM_BO_USE_RENDERING); ++} ++ ++static void ++clear_cached_buffers(struct dri2_egl_surface *dri2_surf) ++{ ++ size_t i; ++ for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) { ++ if (dri2_surf->color_buffers[i].bo != NULL) ++ gbm_bo_destroy(dri2_surf->color_buffers[i].bo); ++ dri2_surf->color_buffers[i].bo = NULL; ++ dri2_surf->color_buffers[i].fd = -1; ++ dri2_surf->color_buffers[i].age = 0; ++ } ++} ++ ++static ssize_t ++find_cached_buffer_with_fd(struct dri2_egl_surface *dri2_surf, int fd) ++{ ++ ssize_t i; ++ ++ for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) { ++ if (dri2_surf->color_buffers[i].fd == fd) ++ return i; ++ } ++ ++ return -1; ++} ++ ++static void ++cache_buffer(struct dri2_egl_surface *dri2_surf, size_t slot, ++ int fd, int width, int height, uint32_t stride) ++{ ++ SwapChain* sc = (SwapChain *)dri2_surf->sc; ++ struct dri2_egl_display *dri2_dpy = ++ dri2_egl_display(dri2_surf->base.Resource.Display); ++ ++ if (dri2_surf->color_buffers[slot].bo != NULL) ++ gbm_bo_destroy(dri2_surf->color_buffers[slot].bo); ++ ++ dri2_surf->color_buffers[slot].bo = create_gbm_bo_from_buffer( ++ &dri2_dpy->gbm_dri->base.base, ++ fd, width, height, stride, ++ sc->gbm_format); ++ ++ _eglLog(_EGL_INFO, " imported bo : %p format = %d (GBM_FORMAT_ARGB8888=%d)", ++ (void*)dri2_surf->color_buffers[slot].bo, gbm_bo_get_format(dri2_surf->color_buffers[slot].bo), GBM_FORMAT_ARGB8888); ++ ++ dri2_surf->color_buffers[slot].fd = fd; ++} ++ ++static size_t ++find_best_cache_slot(struct dri2_egl_surface *dri2_surf) ++{ ++ size_t i; ++ size_t start_slot = 0; ++ ++ /* ++ * If we have a back buffer, start searching after it to ensure ++ * we don't reuse the slot too soon. ++ */ ++ if (dri2_surf->back != NULL) { ++ start_slot = dri2_surf->back - dri2_surf->color_buffers; ++ start_slot = (start_slot + 1) % ARRAY_SIZE(dri2_surf->color_buffers); ++ } ++ ++ /* Try to find an empty slot */ ++ for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) { ++ size_t slot = (start_slot + i) % ARRAY_SIZE(dri2_surf->color_buffers); ++ if (dri2_surf->color_buffers[slot].bo == NULL) ++ return slot; ++ } ++ ++ /* If we don't have an empty slot, use the start slot */ ++ return start_slot; ++} ++ ++static void ++update_cached_buffer_ages(struct dri2_egl_surface *dri2_surf, size_t used_slot) ++{ ++ /* ++ * If 3 (Mir surfaces are triple buffered at most) other buffers have been ++ * used since a buffer was used, we probably won't need this buffer again. ++ */ ++ static const int destruction_age = 3; ++ size_t i; ++ ++ for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) { ++ if (dri2_surf->color_buffers[i].bo != NULL) { ++ if (i == used_slot) { ++ dri2_surf->color_buffers[i].age = 0; ++ } ++ else { ++ ++dri2_surf->color_buffers[i].age; ++ if (dri2_surf->color_buffers[i].age == destruction_age) { ++ gbm_bo_destroy(dri2_surf->color_buffers[i].bo); ++ dri2_surf->color_buffers[i].bo = NULL; ++ dri2_surf->color_buffers[i].fd = -1; ++ } ++ } ++ } ++ } ++} ++ ++static int ++dri2_rs_authenticate(_EGLDisplay *disp, uint32_t id) ++{ ++ return 0; ++} ++ ++static void ++buffer_submit_callback(MirBuffer* buffer, void* context) ++{ ++ SwapChain* sc = (SwapChain*) context; ++ ++// _eglLog(_EGL_DEBUG, "Buffer %p returned from server", (void*) buffer); ++ for (uint32_t i = 0; i < sc->buffer_count; i++) ++ if (sc->buffers[i] == buffer) ++ { ++ pthread_mutex_lock(&sc->lock); ++ assert(sc->state[i] == buffer_state_submitted); ++ sc->state[i] = buffer_state_available; ++ pthread_mutex_unlock(&sc->lock); ++ pthread_cond_broadcast(&sc->cv); ++ } ++} ++ ++static EGLBoolean ++mir_submit_buffer(struct dri2_egl_surface *dri2_surf) ++{ ++ SwapChain* sc = (SwapChain *)dri2_surf->sc; ++ ++ for (uint32_t i = 0; i < sc->buffer_count; i++) ++ { ++ if (sc->state[i] == buffer_state_acquired) ++ { ++ int buffer_fd = sc->gbm_buffer_ext->fd(sc->buffers[i]); ++ if (buffer_fd == dri2_surf->dri_buffers[__DRI_BUFFER_BACK_LEFT]->fd) ++ { ++// _eglLog(_EGL_DEBUG, "..submitting buffer %p", sc->buffers[i]); ++ sc->state[i] = buffer_state_submitted; ++ mir_presentation_chain_submit_buffer(sc->chain, ++ sc->buffers[i], ++ buffer_submit_callback, ++ sc); ++ break; ++ } ++ } ++ } ++ ++ return EGL_TRUE; ++} ++ ++static EGLBoolean ++mir_acquire_buffer(struct dri2_egl_display *dri2_dpy, struct dri2_egl_surface *dri2_surf) ++{ ++ SwapChain* sc = (SwapChain *)dri2_surf->sc; ++ MirBuffer* buffer = NULL; ++ unsigned int buffer_width, buffer_height; ++ bool found = false; ++ ssize_t buf_slot = -1; ++ ++ if (!sc) ++ return EGL_TRUE; ++ ++ uint32_t wrap = (sc->next_buffer_to_use-1)%(sc->buffer_count); ++ do ++ { ++ uint32_t const next_buffer = sc->next_buffer_to_use; ++ if (sc->state[next_buffer] == buffer_state_available) ++ { ++ int rs_width, rs_height; ++ ++ found = true; ++ sc->state[next_buffer] = buffer_state_acquired; ++ buffer = sc->buffers[next_buffer]; ++ buffer_width = mir_buffer_get_width(buffer); ++ buffer_height = mir_buffer_get_height(buffer); ++ ++ // _eglLog(_EGL_DEBUG, "..acquired buffer %p with fd = %d", sc->buffers[sc->next_buffer_to_use], mbp->fd[0]); ++ mir_render_surface_get_size(sc->surface, &rs_width, &rs_height); ++ if ((rs_width != buffer_width) || (rs_height != buffer_height)) ++ { ++ // release the old buffer ++ mir_buffer_release(buffer); ++ // .. replace it with a new buffer ++ sc->buffers[next_buffer] = ++ sc->gbm_buffer_ext->allocate_buffer_gbm_sync( ++ dri2_dpy->mir_conn, ++ rs_width, rs_height, ++ sc->gbm_format, ++ GBM_BO_USE_SCANOUT | GBM_BO_USE_RENDERING); ++ ++ buffer = sc->buffers[next_buffer]; ++ buffer_width = rs_width; ++ buffer_height = rs_height; ++ } ++ } ++ else ++ { ++ if (next_buffer == wrap) ++ { ++ pthread_mutex_lock(&sc->lock); ++ pthread_cond_wait(&sc->cv, &sc->lock); ++ pthread_mutex_unlock(&sc->lock); ++ } ++ } ++ ++ sc->next_buffer_to_use = (next_buffer+1)%(sc->buffer_count); ++ } ++ while(!found); ++ ++ if (buffer_width && buffer_height) { ++ dri2_surf->base.Width = buffer_width; ++ dri2_surf->base.Height = buffer_height; ++ } ++ ++ int buffer_fd = sc->gbm_buffer_ext->fd(buffer); ++ assert(buffer_fd > 0); ++ unsigned int buffer_age = sc->gbm_buffer_ext->age(buffer); ++ uint32_t buffer_stride = sc->gbm_buffer_ext->stride(buffer); ++ buf_slot = find_cached_buffer_with_fd(dri2_surf, buffer_fd); ++ ++ if (buf_slot != -1) { ++ /* ++ * If we get a new buffer with an fd of a previously cached buffer, ++ * replace the old buffer in the cache... ++ */ ++ if (buffer_age == 0) ++ cache_buffer(dri2_surf, buf_slot, buffer_fd, buffer_width, buffer_height, buffer_stride); ++ /* ... otherwise just reuse the existing cached buffer */ ++ } ++ else { ++ /* We got a new buffer with an fd that's not in the cache, so add it */ ++ buf_slot = find_best_cache_slot(dri2_surf); ++ cache_buffer(dri2_surf, buf_slot, buffer_fd, buffer_width, buffer_height, buffer_stride); ++ } ++ ++ update_cached_buffer_ages(dri2_surf, buf_slot); ++ ++ dri2_surf->back = &dri2_surf->color_buffers[buf_slot]; ++ dri2_surf->back->buffer_age = buffer_age; ++ dri2_surf->dri_buffers[__DRI_BUFFER_BACK_LEFT]->name = 0; ++ dri2_surf->dri_buffers[__DRI_BUFFER_BACK_LEFT]->fd = buffer_fd; ++ dri2_surf->dri_buffers[__DRI_BUFFER_BACK_LEFT]->pitch = buffer_stride; ++ ++ return EGL_TRUE; ++} ++ ++static _EGLSurface * ++dri2_rs_create_window_surface(_EGLDriver *drv, _EGLDisplay *disp, ++ _EGLConfig *conf, EGLNativeWindowType window, ++ const EGLint *attrib_list) ++{ ++ struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); ++ struct dri2_egl_config *dri2_conf = dri2_egl_config(conf); ++ struct dri2_egl_surface *dri2_surf; ++ const __DRIconfig *config; ++ MirRenderSurface* surface = window; ++ SwapChain *sc = calloc(1, sizeof(SwapChain)); ++ int width = 0, height = 0; ++ uint32_t num_buffers = 0; ++ ++ if (!mir_render_surface_is_valid(surface)) ++ { ++ _eglError(EGL_BAD_NATIVE_WINDOW, "dri2_rs_create_window_surface: surface is bad"); ++ return NULL; ++ } ++ ++ sc->surface = surface; ++ sc->format = dri2_conf->base.NativeVisualID; ++ _eglLog(_EGL_INFO, "Mir pixel format requested : %d", sc->format); ++ sc->gbm_format = mir_format_to_gbm_format(sc->format); ++ ++ if (sc->gbm_format == UINT32_MAX) ++ { ++ _eglError(EGL_BAD_NATIVE_WINDOW, "dri2_rs_create_window_surface: bad format"); ++ return NULL; ++ } ++ ++ mir_render_surface_get_size(surface, &width, &height); ++ _eglLog(_EGL_INFO, "render surface of size : %dx%d", width, height); ++ ++ sc->chain = mir_render_surface_get_presentation_chain(surface); ++ if (!mir_presentation_chain_is_valid(sc->chain)) ++ { ++ _eglError(EGL_BAD_NATIVE_WINDOW, "dri2_rs_create_window_surface: pc is bad"); ++ return NULL; ++ } ++ ++ pthread_mutex_init(&sc->lock, NULL); ++ pthread_cond_init(&sc->cv, NULL); ++ ++ char* str_num = getenv("MIR_EGL_CLIENT_BUFFERS"); ++ if (str_num) ++ num_buffers = atoi(str_num); ++ if ((num_buffers < 2) || (num_buffers > MAX_BUFFERS)) ++ num_buffers = NUM_DEFAULT_BUFFERS; ++ ++ _eglLog(_EGL_INFO, "Allocating %d buffers", num_buffers); ++ sc->gbm_buffer_ext = mir_extension_gbm_buffer_v2(dri2_dpy->mir_conn); ++ assert(sc->gbm_buffer_ext); ++ assert(sc->gbm_buffer_ext->allocate_buffer_gbm_sync); ++ assert(sc->gbm_buffer_ext->fd); ++ assert(sc->gbm_buffer_ext->stride); ++ assert(sc->gbm_buffer_ext->age); ++ ++ for (unsigned int i = 0; i < num_buffers; i++) ++ { ++ sc->buffers[i] = ++ sc->gbm_buffer_ext->allocate_buffer_gbm_sync(dri2_dpy->mir_conn, ++ width, height, ++ sc->gbm_format, ++ GBM_BO_USE_SCANOUT | GBM_BO_USE_RENDERING); ++ assert(sc->state[i] == buffer_state_none); ++ sc->state[i] = buffer_state_available; ++ sc->buffer_count++; ++ } ++ ++ _eglLog(_EGL_INFO, "Presentation chain : %p", sc->chain); ++ _eglLog(_EGL_INFO, "\tcontains %d buffers", sc->buffer_count); ++ for (uint32_t i=0; ibuffer_count; i++) { ++ _eglLog(_EGL_INFO, "Buffer #%d %dx%d: %p", ++ i, ++ mir_buffer_get_width(sc->buffers[i]), ++ mir_buffer_get_height(sc->buffers[i]), ++ sc->buffers[i]); ++ } ++ ++ dri2_surf = calloc(1, sizeof *dri2_surf); ++ if (!dri2_surf) { ++ _eglError(EGL_BAD_ALLOC, "dri2_rs_create_window_surface"); ++ return NULL; ++ } ++ ++ if (!_eglInitSurface(&dri2_surf->base, disp, EGL_WINDOW_BIT, conf, attrib_list)) ++ goto cleanup_surf; ++ ++ dri2_surf->sc = sc; ++ ++ dri2_surf->base.Width = width; ++ dri2_surf->base.Height = height; ++ ++ dri2_surf->dri_buffers[__DRI_BUFFER_FRONT_LEFT] = ++ calloc(sizeof(*dri2_surf->dri_buffers[0]), 1); ++ dri2_surf->dri_buffers[__DRI_BUFFER_BACK_LEFT] = ++ calloc(sizeof(*dri2_surf->dri_buffers[0]), 1); ++ ++ dri2_surf->dri_buffers[__DRI_BUFFER_BACK_LEFT]->attachment = ++ __DRI_BUFFER_BACK_LEFT; ++ ++ dri2_surf->dri_buffers[__DRI_BUFFER_BACK_LEFT]->cpp = get_format_bpp(sc->format); ++ ++ clear_cached_buffers(dri2_surf); ++ ++ if(!mir_acquire_buffer(dri2_dpy, dri2_surf)) ++ goto cleanup_surf; ++ ++ config = dri2_get_dri_config(dri2_conf, EGL_WINDOW_BIT, ++ dri2_surf->base.GLColorspace); ++ ++ if (dri2_dpy->gbm_dri) { ++ struct gbm_dri_surface *surf = malloc(sizeof *surf); ++ ++ dri2_surf->gbm_surf = surf; ++ surf->base.gbm = &dri2_dpy->gbm_dri->base.base; ++ surf->base.width = dri2_surf->base.Width; ++ surf->base.height = dri2_surf->base.Height; ++ surf->base.format = sc->gbm_format; ++ surf->base.flags = GBM_BO_USE_SCANOUT | GBM_BO_USE_RENDERING; ++ surf->dri_private = dri2_surf; ++ ++ dri2_surf->dri_drawable = ++ (*dri2_dpy->dri2->createNewDrawable) (dri2_dpy->dri_screen, ++ config, ++ dri2_surf->gbm_surf); ++ } ++ else { ++ dri2_surf->dri_drawable = ++ (*dri2_dpy->dri2->createNewDrawable) (dri2_dpy->dri_screen, ++ config, ++ dri2_surf); ++ } ++ ++ if (dri2_surf->dri_drawable == NULL) { ++ _eglError(EGL_BAD_ALLOC, "dri2->createNewDrawable"); ++ } ++ ++ return &dri2_surf->base; ++ ++cleanup_surf: ++ free(dri2_surf); ++ return NULL; ++} ++ ++static _EGLSurface * ++dri2_rs_create_pixmap_surface(_EGLDriver *drv, _EGLDisplay *disp, ++ _EGLConfig *conf, void *native_window, ++ const EGLint *attrib_list) ++{ ++ _eglError(EGL_BAD_PARAMETER, "EGL pixmap surfaces are unsupported on Mir (RS)"); ++ return NULL; ++} ++ ++static EGLBoolean ++dri2_rs_destroy_surface(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *surf) ++{ ++ struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); ++ struct dri2_egl_surface *dri2_surf = dri2_egl_surface(surf); ++ int i; ++ ++ (void) drv; ++ ++ if (!_eglPutSurface(surf)) ++ return EGL_TRUE; ++ ++ clear_cached_buffers(dri2_surf); ++ ++ (*dri2_dpy->core->destroyDrawable)(dri2_surf->dri_drawable); ++ ++ for (i = 0; i < __DRI_BUFFER_COUNT; ++i) { ++ if (dri2_surf->dri_buffers[i]) { ++ if ((i == __DRI_BUFFER_FRONT_LEFT) || ++ (i == __DRI_BUFFER_BACK_LEFT)) { ++ free(dri2_surf->dri_buffers[i]); ++ } ++ else { ++ dri2_dpy->dri2->releaseBuffer(dri2_dpy->dri_screen, ++ dri2_surf->dri_buffers[i]); ++ } ++ } ++ } ++ ++ free(dri2_surf->gbm_surf); ++ ++ SwapChain *sc = (SwapChain *)dri2_surf->sc; ++ dri2_surf->sc = NULL; ++ ++ bool wait_for_buffers; ++ do ++ { ++ sleep(0); ++ wait_for_buffers = false; ++ ++ for (uint32_t i = 0; i < sc->buffer_count; i++) ++ { ++ if (sc->state[i] > buffer_state_available) ++ wait_for_buffers = true; ++ } ++ } while(wait_for_buffers); ++ ++ for (uint32_t i = 0; i < sc->buffer_count; i++) { ++ if(sc->buffers[i]) ++ { ++ mir_buffer_release(sc->buffers[i]); ++ sc->buffers[i] = NULL; ++ } ++ } ++ ++ pthread_mutex_destroy(&sc->lock); ++ pthread_cond_destroy(&sc->cv); ++ ++ free(sc); ++ free(surf); ++ ++ return EGL_TRUE; ++} ++ ++static _EGLImage * ++dri2_rs_create_image_khr(_EGLDriver *drv, _EGLDisplay *disp, ++ _EGLContext *ctx, EGLenum target, ++ EGLClientBuffer buffer, const EGLint *attr_list) ++{ ++ (void) drv; ++ ++ switch (target) { ++ case EGL_NATIVE_PIXMAP_KHR: ++ _eglError(EGL_BAD_PARAMETER, "Mir has no native pixmaps"); ++ return NULL; ++ default: ++ return dri2_create_image_khr(drv, disp, ctx, target, buffer, attr_list); ++ } ++} ++ ++static EGLBoolean ++dri2_rs_swap_interval(_EGLDriver *drv, _EGLDisplay *disp, ++ _EGLSurface *surf, EGLint interval) ++{ ++ struct dri2_egl_surface *dri2_surf = dri2_egl_surface(surf); ++ SwapChain* sc = (SwapChain *)dri2_surf->sc; ++ MirPresentationChain* chain = sc->chain; ++ MirPresentMode mode; ++ ++ switch (interval) { ++ case 0: ++ mode = mir_present_mode_mailbox; ++ break; ++ case 1: ++ mode = mir_present_mode_fifo; ++ break; ++ default: ++ _eglError(EGL_BAD_PARAMETER, "Mir only supports swap interval 0 and 1"); ++ return EGL_FALSE; ++ } ++ ++ mir_presentation_chain_set_mode(chain, mode); ++ return EGL_TRUE; ++} ++ ++static EGLBoolean ++dri2_rs_swap_buffers(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *draw) ++{ ++ struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); ++ struct dri2_egl_surface *dri2_surf = dri2_egl_surface(draw); ++ int rc; ++ ++ (*dri2_dpy->flush->flush)(dri2_surf->dri_drawable); ++ ++ rc = mir_submit_buffer(dri2_surf); ++ ++ if (rc) ++ rc = mir_acquire_buffer(dri2_dpy, dri2_surf); ++ ++ (*dri2_dpy->flush->invalidate)(dri2_surf->dri_drawable); ++ ++ return rc; ++} ++ ++static EGLint ++dri2_rs_query_buffer_age(_EGLDriver *drv, _EGLDisplay *dpy, ++ _EGLSurface *surf) ++{ ++ struct dri2_egl_surface *dri2_surf = dri2_egl_surface(surf); ++ if (dri2_surf->back) ++ { ++ return dri2_surf->back->buffer_age; ++ } ++ return 0; ++} ++ ++static __DRIbuffer* ++dri2_rs_get_buffers_with_format(__DRIdrawable *driDrawable, ++ int *width, ++ int *height, ++ unsigned int *attachments, ++ int count, ++ int *out_count, ++ void *data) ++{ ++ struct dri2_egl_surface *dri2_surf = data; ++ struct dri2_egl_display *dri2_dpy = ++ dri2_egl_display(dri2_surf->base.Resource.Display); ++ int i; ++ ++ dri2_surf->buffer_count = 0; ++ for (i = 0; i < 2*count; i+=2) { ++ assert(attachments[i] < __DRI_BUFFER_COUNT); ++ assert(dri2_surf->buffer_count < 5); ++ ++ if (dri2_surf->dri_buffers[attachments[i]] == NULL) { ++ /* Our frame callback must keep these buffers valid */ ++ assert(attachments[i] != __DRI_BUFFER_FRONT_LEFT); ++ assert(attachments[i] != __DRI_BUFFER_BACK_LEFT); ++ ++ dri2_surf->dri_buffers[attachments[i]] = ++ dri2_dpy->dri2->allocateBuffer(dri2_dpy->dri_screen, ++ attachments[i], attachments[i+1], ++ dri2_surf->base.Width, dri2_surf->base.Height); ++ ++ if (!dri2_surf->dri_buffers[attachments[i]]) ++ continue; ++ } ++ ++ memcpy(&dri2_surf->buffers[dri2_surf->buffer_count], ++ dri2_surf->dri_buffers[attachments[i]], ++ sizeof(__DRIbuffer)); ++ ++ dri2_surf->buffer_count++; ++ } ++ ++ assert(dri2_surf->base.Type == EGL_PIXMAP_BIT || ++ dri2_surf->dri_buffers[__DRI_BUFFER_BACK_LEFT]); ++ ++ *out_count = dri2_surf->buffer_count; ++ if (dri2_surf->buffer_count == 0) ++ return NULL; ++ ++ *width = dri2_surf->base.Width; ++ *height = dri2_surf->base.Height; ++ ++ return dri2_surf->buffers; ++} ++ ++static __DRIbuffer* ++dri2_rs_get_buffers(__DRIdrawable *driDrawable, ++ int *width, ++ int *height, ++ unsigned int *attachments, ++ int count, ++ int *out_count, ++ void *data) ++{ ++ unsigned int *attachments_with_format; ++ __DRIbuffer *buffer; ++ const unsigned int format = 32; ++ int i; ++ ++ attachments_with_format = calloc(count * 2, sizeof(unsigned int)); ++ if (!attachments_with_format) { ++ *out_count = 0; ++ return NULL; ++ } ++ ++ for (i = 0; i < count; ++i) { ++ attachments_with_format[2*i] = attachments[i]; ++ attachments_with_format[2*i + 1] = format; ++ } ++ ++ buffer = ++ dri2_rs_get_buffers_with_format(driDrawable, ++ width, height, ++ attachments_with_format, count, ++ out_count, data); ++ ++ free(attachments_with_format); ++ ++ return buffer; ++} ++ ++static void ++dri2_rs_flush_front_buffer(__DRIdrawable *driDrawable, void *data) ++{ ++ (void) driDrawable; ++ ++ /* FIXME: Does EGL support front buffer rendering at all? */ ++ ++#if 0 ++ struct dri2_egl_surface *dri2_surf = data; ++ ++ dri2WaitGL(dri2_surf); ++#else ++ (void) data; ++#endif ++} ++ ++static int ++dri2_rs_image_get_buffers(__DRIdrawable *driDrawable, ++ unsigned int format, ++ uint32_t *stamp, ++ void *loaderPrivate, ++ uint32_t buffer_mask, ++ struct __DRIimageList *buffers) ++{ ++ struct dri2_egl_surface *dri2_surf = loaderPrivate; ++ ++ if (buffer_mask & __DRI_IMAGE_BUFFER_BACK) { ++ if (!dri2_surf->back) ++ return 0; ++ ++ buffers->back = ((struct gbm_dri_bo *)dri2_surf->back->bo)->image; ++ buffers->image_mask = __DRI_IMAGE_BUFFER_BACK; ++ ++ return 1; ++ } ++ ++ return 0; ++} ++ ++static struct dri2_egl_display_vtbl dri2_rs_display_vtbl = { ++ .authenticate = dri2_rs_authenticate, ++ .create_window_surface = dri2_rs_create_window_surface, ++ .create_pixmap_surface = dri2_rs_create_pixmap_surface, ++ .create_pbuffer_surface = dri2_fallback_create_pbuffer_surface, ++ .destroy_surface = dri2_rs_destroy_surface, ++ .create_image = dri2_rs_create_image_khr, ++ .swap_interval = dri2_rs_swap_interval, ++ .swap_buffers = dri2_rs_swap_buffers, ++ .swap_buffers_with_damage = dri2_fallback_swap_buffers_with_damage, ++ .swap_buffers_region = dri2_fallback_swap_buffers_region, ++ .post_sub_buffer = dri2_fallback_post_sub_buffer, ++ .copy_buffers = dri2_fallback_copy_buffers, ++ .query_buffer_age = dri2_rs_query_buffer_age, ++ .create_wayland_buffer_from_image = dri2_fallback_create_wayland_buffer_from_image, ++ .get_sync_values = dri2_fallback_get_sync_values, ++ .get_dri_drawable = dri2_surface_get_dri_drawable, ++}; ++ ++static void set_auth_fd(int auth_fd, void* context) ++{ ++ struct dri2_egl_display *dri2_dpy = context; ++ int dup_fd = dup(auth_fd); ++ _eglLog(_EGL_INFO, "Initial fd=%d with dup=%d", auth_fd, dup_fd); ++ ++ pthread_mutex_lock(&dri2_dpy->lock); ++ dri2_dpy->fd = dup_fd; ++ pthread_mutex_unlock(&dri2_dpy->lock); ++ pthread_cond_broadcast(&dri2_dpy->cv); ++} ++ ++static EGLBoolean ++mir_add_configs_for_visuals(_EGLDriver *drv, _EGLDisplay *dpy) ++{ ++ struct dri2_egl_display *dri2_dpy = dri2_egl_display(dpy); ++ static const struct { ++ int format; ++ unsigned int rgba_masks[4]; ++ } visuals[] = { ++ { mir_pixel_format_rgb_565, { 0xf800, 0x7e0, 0x1f, 0x0 } }, ++ { mir_pixel_format_argb_8888, { 0xff0000, 0xff00, 0xff, 0xff000000 } }, ++ { mir_pixel_format_abgr_8888, { 0xff, 0xff00, 0xff0000, 0xff000000 } }, ++ { mir_pixel_format_xbgr_8888, { 0xff, 0xff00, 0xff0000, 0x0 } }, ++ { mir_pixel_format_xrgb_8888, { 0xff0000, 0xff00, 0xff, 0x0 } }, ++ }; ++ EGLint config_attrs[] = { ++ EGL_NATIVE_VISUAL_ID, 0, ++ EGL_NATIVE_VISUAL_TYPE, 0, ++ EGL_NONE ++ }; ++ unsigned int format_count[ARRAY_SIZE(visuals)] = { 0 }; ++ int count, i, j; ++ ++ count = 0; ++ for (i = 0; dri2_dpy->driver_configs[i]; i++) { ++ const EGLint surface_type = EGL_WINDOW_BIT | EGL_PBUFFER_BIT; ++ struct dri2_egl_config *dri2_conf; ++ ++ for (j = 0; j < ARRAY_SIZE(visuals); j++) { ++ config_attrs[1] = visuals[j].format; ++ config_attrs[3] = visuals[j].format; ++ ++ dri2_conf = dri2_add_config(dpy, dri2_dpy->driver_configs[i], ++ count + 1, surface_type, config_attrs, visuals[j].rgba_masks); ++ if (dri2_conf) { ++ _eglLog(_EGL_INFO, "Added config for %d", visuals[j].format); ++ count++; ++ format_count[j]++; ++ } ++ } ++ } ++ ++ for (i = 0; i < ARRAY_SIZE(format_count); i++) { ++ if (!format_count[i]) { ++ _eglLog(_EGL_DEBUG, "No DRI config supports mir format %d", ++ visuals[i].format); ++ } ++ } ++ ++ return (count != 0); ++} ++ ++EGLBoolean ++dri2_initialize_rs(_EGLDriver *drv, _EGLDisplay *disp) ++{ ++ struct dri2_egl_display *dri2_dpy; ++ struct gbm_device *gbm = NULL; ++ ++ loader_set_logger(_eglLog); ++ ++ dri2_dpy = calloc(1, sizeof *dri2_dpy); ++ if (!dri2_dpy) ++ return _eglError(EGL_BAD_ALLOC, "eglInitialize"); ++ ++ disp->DriverData = (void *) dri2_dpy; ++ dri2_dpy->mir_conn = disp->PlatformDisplay; ++ ++ pthread_mutex_init(&dri2_dpy->lock, NULL); ++ pthread_cond_init(&dri2_dpy->cv, NULL); ++ ++ MirExtensionMesaDRMAuthV1 const* ext = ++ mir_extension_mesa_drm_auth_v1(dri2_dpy->mir_conn); ++ if (!ext) ++ goto cleanup_dpy; ++ ext->drm_auth_fd(dri2_dpy->mir_conn, set_auth_fd, dri2_dpy); ++ ++ pthread_mutex_lock(&dri2_dpy->lock); ++ while (!dri2_dpy->fd) ++ pthread_cond_wait(&dri2_dpy->cv, &dri2_dpy->lock); ++ pthread_mutex_unlock(&dri2_dpy->lock); ++ ++ pthread_mutex_destroy(&dri2_dpy->lock); ++ pthread_cond_destroy(&dri2_dpy->cv); ++ ++ dri2_dpy->own_device = 1; ++ gbm = gbm_create_device(dri2_dpy->fd); ++ if (gbm == NULL) ++ goto cleanup_dpy; ++ ++ if (gbm) { ++ struct gbm_dri_device *gbm_dri = gbm_dri_device(gbm); ++ ++ dri2_dpy->gbm_dri = gbm_dri; ++ dri2_dpy->driver_name = strdup(gbm_dri->base.driver_name); ++ dri2_dpy->dri_screen = gbm_dri->screen; ++ dri2_dpy->core = gbm_dri->core; ++ dri2_dpy->dri2 = gbm_dri->dri2; ++ dri2_dpy->image = gbm_dri->image; ++ dri2_dpy->flush = gbm_dri->flush; ++ dri2_dpy->driver_configs = gbm_dri->driver_configs; ++ ++ gbm_dri->lookup_image = dri2_lookup_egl_image; ++ gbm_dri->lookup_user_data = disp; ++ ++ gbm_dri->get_buffers = dri2_rs_get_buffers; ++ gbm_dri->flush_front_buffer = dri2_rs_flush_front_buffer; ++ gbm_dri->get_buffers_with_format = dri2_rs_get_buffers_with_format; ++ gbm_dri->image_get_buffers = dri2_rs_image_get_buffers; ++ ++ dri2_setup_screen(disp); ++ } ++ ++ if (!mir_add_configs_for_visuals(drv, disp)) { ++ _eglLog(_EGL_FATAL, "DRI2: failed to add configs"); ++ goto cleanup_dpy; ++ } ++ ++ disp->Extensions.EXT_buffer_age = EGL_TRUE; ++/* ++ disp->Extensions.EXT_swap_buffers_with_damage = EGL_FALSE; ++ disp->Extensions.KHR_image_pixmap = EGL_FALSE; ++*/ ++ dri2_dpy->vtbl = &dri2_rs_display_vtbl; ++ ++ return EGL_TRUE; ++ ++cleanup_dpy: ++ free(dri2_dpy); ++ disp->DriverData = NULL; ++ ++ return EGL_FALSE; ++} +--- a/src/egl/main/egldisplay.c ++++ b/src/egl/main/egldisplay.c +@@ -62,6 +62,9 @@ + #include + #include + #endif ++#ifdef HAVE_RS_PLATFORM ++#include ++#endif + + /** + * Map --with-egl-platforms names to platform types. +@@ -76,7 +79,8 @@ static const struct { + { _EGL_PLATFORM_ANDROID, "android" }, + { _EGL_PLATFORM_HAIKU, "haiku" }, + { _EGL_PLATFORM_SURFACELESS, "surfaceless" }, +- { _EGL_PLATFORM_MIR, "mir" } ++ { _EGL_PLATFORM_MIR, "mir" }, ++ { _EGL_PLATFORM_RS, "rs" } + }; + + +@@ -187,9 +191,14 @@ _eglNativePlatformDetectNativeDisplay(vo + if (nativeDisplay == EGL_DEFAULT_DISPLAY) + return _EGL_INVALID_PLATFORM; + ++#ifdef HAVE_RS_PLATFORM ++ if (mir_connection_is_valid(nativeDisplay)) ++ return _EGL_PLATFORM_RS; ++#endif ++ + #ifdef HAVE_MIR_PLATFORM + if (_mir_display_is_valid(nativeDisplay)) +- return _EGL_PLATFORM_MIR; ++ return _EGL_PLATFORM_MIR; + #endif + + if (_eglPointerIsDereferencable(nativeDisplay)) { +--- a/src/egl/main/egldisplay.h ++++ b/src/egl/main/egldisplay.h +@@ -51,6 +51,7 @@ enum _egl_platform_type { + _EGL_PLATFORM_HAIKU, + _EGL_PLATFORM_SURFACELESS, + _EGL_PLATFORM_MIR, ++ _EGL_PLATFORM_RS, + + _EGL_NUM_PLATFORMS, + _EGL_INVALID_PLATFORM = -1 diff -Nru mesa-12.0.6/debian/patches/khr_platform_mir.patch mesa-17.0.7/debian/patches/khr_platform_mir.patch --- mesa-12.0.6/debian/patches/khr_platform_mir.patch 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/debian/patches/khr_platform_mir.patch 2017-06-26 12:58:29.000000000 +0000 @@ -0,0 +1,82 @@ +--- a/src/egl/main/eglapi.c ++++ b/src/egl/main/eglapi.c +@@ -398,6 +398,11 @@ _eglGetPlatformDisplayCommon(EGLenum pla + dpy = _eglGetSurfacelessDisplay(native_display, attrib_list); + break; + #endif ++#ifdef HAVE_RS_PLATFORM ++ case EGL_PLATFORM_MIR_KHR: ++ dpy = _eglGetMirDisplay(native_display, attrib_list); ++ break; ++#endif + default: + RETURN_EGL_ERROR(NULL, EGL_BAD_PARAMETER, NULL); + } +--- a/src/egl/main/egldisplay.c ++++ b/src/egl/main/egldisplay.c +@@ -620,3 +620,22 @@ _eglGetSurfacelessDisplay(void *native_d + return _eglFindDisplay(_EGL_PLATFORM_SURFACELESS, native_display); + } + #endif /* HAVE_SURFACELESS_PLATFORM */ ++ ++#ifdef HAVE_RS_PLATFORM ++_EGLDisplay* ++_eglGetMirDisplay(MirConnection *mir_connection, ++ const EGLint *attrib_list) ++{ ++ if (!mir_connection_is_valid(mir_connection)) { ++ _eglError(EGL_BAD_PARAMETER, "eglGetPlatformDisplay"); ++ } ++ ++ /* EGL_KHR_platform_mir recognizes no attributes. */ ++ if (attrib_list != NULL && attrib_list[0] != EGL_NONE) { ++ _eglError(EGL_BAD_ATTRIBUTE, "eglGetPlatformDisplay"); ++ return NULL; ++ } ++ ++ return _eglFindDisplay(_EGL_PLATFORM_RS, mir_connection); ++} ++#endif /* HAVE_RS_PLATFORM */ +--- a/src/egl/main/egldisplay.h ++++ b/src/egl/main/egldisplay.h +@@ -284,6 +284,14 @@ _eglGetSurfacelessDisplay(void *native_d + const EGLint *attrib_list); + #endif + ++#ifdef HAVE_RS_PLATFORM ++typedef struct MirConnection MirConnection; ++ ++_EGLDisplay* ++_eglGetMirDisplay(MirConnection *mir_connection, ++ const EGLint *attrib_list); ++#endif ++ + #ifdef __cplusplus + } + #endif +--- a/src/egl/main/eglglobals.c ++++ b/src/egl/main/eglglobals.c +@@ -65,6 +65,9 @@ struct _egl_global _eglGlobal = + #ifdef HAVE_SURFACELESS_PLATFORM + " EGL_MESA_platform_surfaceless" + #endif ++#ifdef HAVE_RS_PLATFORM ++ " EGL_KHR_platform_mir" ++#endif + " EGL_KHR_client_get_all_proc_addresses" + " EGL_KHR_debug", + +--- a/include/EGL/eglext.h ++++ b/include/EGL/eglext.h +@@ -290,6 +290,11 @@ EGLAPI EGLBoolean EGLAPIENTRY eglSetDama + #define EGL_PLATFORM_X11_SCREEN_KHR 0x31D6 + #endif /* EGL_KHR_platform_x11 */ + ++#ifndef EGL_KHR_platform_mir ++#define EGL_KHR_platform_mir 1 ++#define EGL_PLATFORM_MIR_KHR 0x31D9 ++#endif /* EGL_KHR_platform_mir */ ++ + #ifndef EGL_KHR_reusable_sync + #define EGL_KHR_reusable_sync 1 + #ifdef KHRONOS_SUPPORT_INT64 diff -Nru mesa-12.0.6/debian/patches/series mesa-17.0.7/debian/patches/series --- mesa-12.0.6/debian/patches/series 2017-06-26 12:58:28.000000000 +0000 +++ mesa-17.0.7/debian/patches/series 2017-06-26 12:58:29.000000000 +0000 @@ -1,9 +1,9 @@ 07_gallium-fix-build-failure-on-powerpcspe.diff - - - # Ubuntu patches. egl-platform-mir.patch i915-dont-default-to-2.1.patch +egl-platform-rs.patch +vulkan-mir.patch +khr_platform_mir.patch diff -Nru mesa-12.0.6/debian/patches/vulkan-mir.patch mesa-17.0.7/debian/patches/vulkan-mir.patch --- mesa-12.0.6/debian/patches/vulkan-mir.patch 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/debian/patches/vulkan-mir.patch 2017-06-26 12:58:29.000000000 +0000 @@ -0,0 +1,1065 @@ +--- a/configure.ac ++++ b/configure.ac +@@ -2164,6 +2164,7 @@ fi + + AM_CONDITIONAL(HAVE_PLATFORM_X11, echo "$egl_platforms" | grep -q 'x11') + AM_CONDITIONAL(HAVE_PLATFORM_WAYLAND, echo "$egl_platforms" | grep -q 'wayland') ++AM_CONDITIONAL(HAVE_PLATFORM_RS, echo "$egl_platforms" | grep -q 'rs') + AM_CONDITIONAL(HAVE_EGL_PLATFORM_DRM, echo "$egl_platforms" | grep -q 'drm') + AM_CONDITIONAL(HAVE_EGL_PLATFORM_SURFACELESS, echo "$egl_platforms" | grep -q 'surfaceless') + AM_CONDITIONAL(HAVE_EGL_PLATFORM_ANDROID, echo "$egl_platforms" | grep -q 'android') +--- a/src/intel/vulkan/Makefile.am ++++ b/src/intel/vulkan/Makefile.am +@@ -133,6 +133,17 @@ VULKAN_LIB_DEPS += \ + $(WAYLAND_LIBS) + endif + ++if HAVE_PLATFORM_RS ++AM_CPPFLAGS += \ ++ $(RS_CFLAGS) \ ++ -DVK_USE_PLATFORM_MIR_KHR ++ ++VULKAN_SOURCES += $(VULKAN_WSI_MIR_FILES) ++ ++VULKAN_LIB_DEPS += \ ++ $(RS_LIBS) ++endif ++ + noinst_LTLIBRARIES += libvulkan_common.la + libvulkan_common_la_SOURCES = $(VULKAN_SOURCES) + +--- a/src/intel/vulkan/Makefile.sources ++++ b/src/intel/vulkan/Makefile.sources +@@ -51,6 +51,9 @@ VULKAN_WSI_WAYLAND_FILES := \ + VULKAN_WSI_X11_FILES := \ + anv_wsi_x11.c + ++VULKAN_WSI_MIR_FILES := \ ++ anv_wsi_mir.c ++ + VULKAN_GEM_FILES := \ + anv_gem.c + +--- a/src/intel/vulkan/anv_device.c ++++ b/src/intel/vulkan/anv_device.c +@@ -253,6 +253,12 @@ static const VkExtensionProperties globa + .specVersion = 5, + }, + #endif ++#ifdef VK_USE_PLATFORM_MIR_KHR ++ { ++ .extensionName = VK_KHR_MIR_SURFACE_EXTENSION_NAME, ++ .specVersion = 4, ++ }, ++#endif + }; + + static const VkExtensionProperties device_extensions[] = { +@@ -293,6 +299,69 @@ static const VkAllocationCallbacks defau + .pfnFree = default_free_func, + }; + ++static VkResult ++anv_bo_import_prime_fd(struct anv_bo *bo, struct anv_device *device, uint64_t size, int fd) ++{ ++ bo->gem_handle = anv_gem_fd_to_handle(device, fd); ++ if (!bo->gem_handle) ++ return vk_error(VK_ERROR_OUT_OF_DEVICE_MEMORY); ++ ++ bo->map = NULL; ++ bo->index = 0; ++ bo->offset = 0; ++ bo->size = size; ++ bo->is_winsys_bo = false; ++ ++ return VK_SUCCESS; ++} ++ ++VkResult anv_ImportAllocatedMemory( ++ VkDevice _device, ++ int fd, ++ const VkMemoryAllocateInfo* pAllocateInfo, ++ const VkAllocationCallbacks* pAllocator, ++ VkDeviceMemory* pMem) ++{ ++ ANV_FROM_HANDLE(anv_device, device, _device); ++ struct anv_device_memory *mem; ++ VkResult result; ++ ++ assert(pAllocateInfo->sType == VK_STRUCTURE_TYPE_MEMORY_ALLOCATE_INFO); ++ ++ if (pAllocateInfo->allocationSize == 0) { ++ /* Apparently, this is allowed */ ++ *pMem = VK_NULL_HANDLE; ++ return VK_SUCCESS; ++ } ++ ++ /* We support exactly one memory heap. */ ++ assert(pAllocateInfo->memoryTypeIndex == 0 || ++ (!device->info.has_llc && pAllocateInfo->memoryTypeIndex < 2)); ++ ++ mem = vk_alloc2(&device->alloc, pAllocator, sizeof(*mem), 8, ++ VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); ++ if (mem == NULL) ++ return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); ++ ++ /* The kernel is going to give us whole pages anyway */ ++ uint64_t alloc_size = align_u64(pAllocateInfo->allocationSize, 4096); ++ ++ result = anv_bo_import_prime_fd(&mem->bo, device, alloc_size, fd); ++ if (result != VK_SUCCESS) ++ goto fail; ++ ++ mem->type_index = pAllocateInfo->memoryTypeIndex; ++ ++ *pMem = anv_device_memory_to_handle(mem); ++ ++ return VK_SUCCESS; ++ ++fail: ++ vk_free2(&device->alloc, pAllocator, mem); ++ ++ return result; ++} ++ + VkResult anv_CreateInstance( + const VkInstanceCreateInfo* pCreateInfo, + const VkAllocationCallbacks* pAllocator, +--- a/src/intel/vulkan/anv_private.h ++++ b/src/intel/vulkan/anv_private.h +@@ -72,6 +72,13 @@ struct gen_l3_config; + extern "C" { + #endif + ++VkResult anv_ImportAllocatedMemory( ++ VkDevice _device, ++ int fd, ++ const VkMemoryAllocateInfo* pAllocateInfo, ++ const VkAllocationCallbacks* pAllocator, ++ VkDeviceMemory* pMem); ++ + /* Allowing different clear colors requires us to perform a depth resolve at + * the end of certain render passes. This is because while slow clears store + * the clear color in the HiZ buffer, fast clears (without a resolve) don't. +--- a/src/intel/vulkan/anv_wsi.c ++++ b/src/intel/vulkan/anv_wsi.c +@@ -54,12 +54,28 @@ anv_init_wsi(struct anv_physical_device + } + #endif + ++#ifdef VK_USE_PLATFORM_MIR_KHR ++ result = wsi_mir_init_wsi(&physical_device->wsi_device, &physical_device->instance->alloc); ++ if (result != VK_SUCCESS) { ++#ifdef VK_USE_PLATFORM_WAYLAND_KHR ++ wsi_wl_finish_wsi(&physical_device->wsi_device, &physical_device->instance->alloc); ++#endif ++#ifdef VK_USE_PLATFORM_XCB_KHR ++ wsi_x11_finish_wsi(&physical_device->wsi_device, &physical_device->instance->alloc); ++#endif ++ return result; ++ } ++#endif ++ + return VK_SUCCESS; + } + + void + anv_finish_wsi(struct anv_physical_device *physical_device) + { ++#ifdef VK_USE_PLATFORM_MIR_KHR ++ wsi_mir_finish_wsi(&physical_device->wsi_device, &physical_device->instance->alloc); ++#endif + #ifdef VK_USE_PLATFORM_WAYLAND_KHR + wsi_wl_finish_wsi(&physical_device->wsi_device, &physical_device->instance->alloc); + #endif +@@ -142,6 +158,7 @@ static VkResult + x11_anv_wsi_image_create(VkDevice device_h, + const VkSwapchainCreateInfoKHR *pCreateInfo, + const VkAllocationCallbacks* pAllocator, ++ bool import_fd, + VkImage *image_p, + VkDeviceMemory *memory_p, + uint32_t *size, +@@ -186,6 +203,18 @@ x11_anv_wsi_image_create(VkDevice device + + VkDeviceMemory memory_h; + struct anv_device_memory *memory; ++ if (import_fd) { ++ result = anv_ImportAllocatedMemory(anv_device_to_handle(device), ++ *fd_p, ++ &(VkMemoryAllocateInfo) { ++ .sType = VK_STRUCTURE_TYPE_MEMORY_ALLOCATE_INFO, ++ .allocationSize = image->size, ++ .memoryTypeIndex = 0, ++ }, ++ pAllocator, ++ &memory_h); ++ } ++ else { + result = anv_AllocateMemory(anv_device_to_handle(device), + &(VkMemoryAllocateInfo) { + .sType = VK_STRUCTURE_TYPE_MEMORY_ALLOCATE_INFO, +@@ -194,13 +223,21 @@ x11_anv_wsi_image_create(VkDevice device + }, + NULL /* XXX: pAllocator */, + &memory_h); ++ } + if (result != VK_SUCCESS) + goto fail_create_image; + + memory = anv_device_memory_from_handle(memory_h); +- memory->bo.is_winsys_bo = true; + +- anv_BindImageMemory(device_h, image_h, memory_h, 0); ++ if (import_fd) { ++ // Do we need to do more of what anv_BindImageMemory() does here? ++ image->bo = &memory->bo; ++ image->offset = 0; ++ } ++ else { ++ memory->bo.is_winsys_bo = true; ++ anv_BindImageMemory(device_h, image_h, memory_h, 0); ++ } + + struct anv_surface *surface = &image->color_surface; + assert(surface->isl.tiling == ISL_TILING_X); +@@ -215,13 +252,18 @@ x11_anv_wsi_image_create(VkDevice device + goto fail_alloc_memory; + } + +- int fd = anv_gem_handle_to_fd(device, memory->bo.gem_handle); +- if (fd == -1) { +- /* FINISHME: Choose a better error. */ +- result = vk_errorf(VK_ERROR_OUT_OF_DEVICE_MEMORY, +- "handle_to_fd failed: %m"); +- goto fail_alloc_memory; ++ int fd; ++ if (!import_fd) { ++ fd = anv_gem_handle_to_fd(device, memory->bo.gem_handle); ++ if (fd == -1) { ++ /* FINISHME: Choose a better error. */ ++ result = vk_errorf(VK_ERROR_OUT_OF_DEVICE_MEMORY, ++ "handle_to_fd failed: %m"); ++ goto fail_alloc_memory; ++ } + } ++ else ++ fd = *fd_p; + + *image_p = image_h; + *memory_p = memory_h; +@@ -240,12 +282,14 @@ fail_create_image: + static void + x11_anv_wsi_image_free(VkDevice device, + const VkAllocationCallbacks* pAllocator, ++ bool imported_fd, + VkImage image_h, + VkDeviceMemory memory_h) + { + anv_DestroyImage(device, image_h, pAllocator); + +- anv_FreeMemory(device, memory_h, pAllocator); ++ if (!imported_fd) ++ anv_FreeMemory(device, memory_h, pAllocator); + } + + static const struct wsi_image_fns anv_wsi_image_fns = { +--- /dev/null ++++ b/src/intel/vulkan/anv_wsi_mir.c +@@ -0,0 +1,53 @@ ++/* ++ * Copyright © 2017 Canonical Ltd. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the "Software"), ++ * to deal in the Software without restriction, including without limitation ++ * the rights to use, copy, modify, merge, publish, distribute, sublicense, ++ * and/or sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice (including the next ++ * paragraph) shall be included in all copies or substantial portions of the ++ * Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ++ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER ++ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS ++ * IN THE SOFTWARE. ++ */ ++ ++#include "wsi_common_mir.h" ++#include "anv_private.h" ++ ++VkBool32 anv_GetPhysicalDeviceMirPresentationSupportKHR( ++ VkPhysicalDevice physicalDevice, ++ uint32_t queueFamilyIndex, ++ MirConnection* connection) ++{ ++ ANV_FROM_HANDLE(anv_physical_device, physical_device, physicalDevice); ++ ++ return wsi_get_mir_presentation_support(&physical_device->wsi_device, connection); ++} ++ ++VkResult anv_CreateMirSurfaceKHR( ++ VkInstance _instance, ++ const VkMirSurfaceCreateInfoKHR* pCreateInfo, ++ const VkAllocationCallbacks* pAllocator, ++ VkSurfaceKHR* pSurface) ++{ ++ ANV_FROM_HANDLE(anv_instance, instance, _instance); ++ const VkAllocationCallbacks *alloc; ++ assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_MIR_SURFACE_CREATE_INFO_KHR); ++ ++ if (pAllocator) ++ alloc = pAllocator; ++ else ++ alloc = &instance->alloc; ++ ++ return wsi_create_mir_surface(alloc, pCreateInfo, pSurface); ++} +--- a/src/vulkan/wsi/Makefile.am ++++ b/src/vulkan/wsi/Makefile.am +@@ -46,4 +46,16 @@ VULKAN_LIB_DEPS += \ + $(WAYLAND_LIBS) + endif + ++if HAVE_PLATFORM_RS ++AM_CPPFLAGS += \ ++ -I$(top_srcdir)/src/gbm/main \ ++ $(RS_CFLAGS) \ ++ -DVK_USE_PLATFORM_MIR_KHR ++ ++VULKAN_WSI_SOURCES += $(VULKAN_WSI_MIR_FILES) ++ ++VULKAN_LIB_DEPS += \ ++ $(RS_LIBS) ++endif ++ + libvulkan_wsi_la_SOURCES = $(VULKAN_WSI_SOURCES) +--- a/src/vulkan/wsi/Makefile.sources ++++ b/src/vulkan/wsi/Makefile.sources +@@ -9,4 +9,8 @@ VULKAN_WSI_WAYLAND_FILES := \ + + VULKAN_WSI_X11_FILES := \ + wsi_common_x11.c \ +- wsi_common_x11.h +\ No newline at end of file ++ wsi_common_x11.h ++ ++VULKAN_WSI_MIR_FILES := \ ++ wsi_common_mir.c \ ++ wsi_common_mir.h +--- a/src/vulkan/wsi/wsi_common.h ++++ b/src/vulkan/wsi/wsi_common.h +@@ -35,6 +35,7 @@ struct wsi_image_fns { + VkResult (*create_wsi_image)(VkDevice device_h, + const VkSwapchainCreateInfoKHR *pCreateInfo, + const VkAllocationCallbacks *pAllocator, ++ bool import_fd, + VkImage *image_p, + VkDeviceMemory *memory_p, + uint32_t *size_p, +@@ -43,6 +44,7 @@ struct wsi_image_fns { + int *fd_p); + void (*free_wsi_image)(VkDevice device, + const VkAllocationCallbacks *pAllocator, ++ bool imported_fd, + VkImage image_h, + VkDeviceMemory memory_h); + }; +@@ -147,6 +149,9 @@ VkResult wsi_wl_init_wsi(struct wsi_devi + const struct wsi_callbacks *cbs); + void wsi_wl_finish_wsi(struct wsi_device *wsi_device, + const VkAllocationCallbacks *alloc); +- ++VkResult wsi_mir_init_wsi(struct wsi_device *wsi_device, ++ const VkAllocationCallbacks *alloc); ++void wsi_mir_finish_wsi(struct wsi_device *wsi_device, ++ const VkAllocationCallbacks *alloc); + + #endif +--- /dev/null ++++ b/src/vulkan/wsi/wsi_common_mir.c +@@ -0,0 +1,583 @@ ++/* ++ * Copyright © 2017 Canonical Ltd. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the "Software"), ++ * to deal in the Software without restriction, including without limitation ++ * the rights to use, copy, modify, merge, publish, distribute, sublicense, ++ * and/or sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice (including the next ++ * paragraph) shall be included in all copies or substantial portions of the ++ * Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ++ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER ++ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS ++ * IN THE SOFTWARE. ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "wsi_common_mir.h" ++ ++#define TRACE printf("%s()\n", __func__); ++ ++#define typed_memcpy(dest, src, count) ({ \ ++ STATIC_ASSERT(sizeof(*src) == sizeof(*dest)); \ ++ memcpy((dest), (src), (count) * sizeof(*(src))); \ ++}) ++ ++struct wsi_mir { ++ struct wsi_interface base; ++ ++// pthread_mutex_t mutex; ++ /* Hash table of MirConnection* -> wsi_mir_connection mappings */ ++// struct hash_table *connections; ++}; ++ ++static const VkSurfaceFormatKHR formats[] = { ++ { .format = VK_FORMAT_B8G8R8A8_UNORM, }, ++}; ++ ++static const VkPresentModeKHR present_modes[] = { ++ VK_PRESENT_MODE_FIFO_KHR, ++}; ++ ++struct wsi_mir_image { ++ VkImage image; ++ VkDeviceMemory memory; ++ MirBuffer* buffer; ++ bool busy; ++ pthread_mutex_t lock; ++ pthread_cond_t cv; ++}; ++ ++struct wsi_mir_swapchain { ++ struct wsi_swapchain base; ++ ++ MirConnection *connection; ++ MirRenderSurface *surface; ++ MirPresentationChain *presentation_chain; ++ ++ struct MirExtensionGbmBufferV1 const* gbm_buffer_ext; ++ ++ VkExtent2D extent; ++ VkFormat vk_format; ++ ++ VkPresentModeKHR present_mode; ++ bool fifo_ready; ++ pthread_mutex_t lock; ++ pthread_cond_t cv; ++ ++ uint32_t image_count; ++ uint32_t next_image_to_use; ++ struct wsi_mir_image images[0]; ++}; ++ ++static VkResult ++wsi_mir_surface_get_support(VkIcdSurfaceBase *surface, ++ struct wsi_device *wsi_device, ++ const VkAllocationCallbacks *alloc, ++ uint32_t queueFamilyIndex, ++ VkBool32* pSupported) ++{ ++ TRACE ++ ++ *pSupported = true; ++ ++ return VK_SUCCESS; ++} ++ ++static VkResult ++wsi_mir_surface_get_capabilities(VkIcdSurfaceBase *surface, ++ VkSurfaceCapabilitiesKHR *pSurfaceCapabilities) ++{ ++ TRACE ++ ++ pSurfaceCapabilities->minImageCount = 2; ++ pSurfaceCapabilities->maxImageCount = 0; // 0 to force to maximum supported ++ pSurfaceCapabilities->currentExtent = (VkExtent2D) { -1, -1 }; ++ pSurfaceCapabilities->minImageExtent = (VkExtent2D) { 1, 1 }; ++ pSurfaceCapabilities->maxImageExtent = (VkExtent2D) { INT16_MAX, INT16_MAX }; ++ pSurfaceCapabilities->supportedTransforms = VK_SURFACE_TRANSFORM_IDENTITY_BIT_KHR; ++ pSurfaceCapabilities->currentTransform = VK_SURFACE_TRANSFORM_IDENTITY_BIT_KHR; ++ pSurfaceCapabilities->maxImageArrayLayers = 1; ++ ++ pSurfaceCapabilities->supportedCompositeAlpha = ++ VK_COMPOSITE_ALPHA_OPAQUE_BIT_KHR /*| ++ VK_COMPOSITE_ALPHA_PRE_MULTIPLIED_BIT_KHR*/; ++ ++ pSurfaceCapabilities->supportedUsageFlags = ++/* VK_IMAGE_USAGE_TRANSFER_SRC_BIT | ++ VK_IMAGE_USAGE_SAMPLED_BIT |*/ ++ VK_IMAGE_USAGE_TRANSFER_DST_BIT | ++ VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT; ++ ++ return VK_SUCCESS; ++} ++ ++static VkResult ++wsi_mir_surface_get_formats(VkIcdSurfaceBase *surface, ++ struct wsi_device *wsi_device, ++ uint32_t* pSurfaceFormatCount, ++ VkSurfaceFormatKHR* pSurfaceFormats) ++{ ++ TRACE ++ ++ if (pSurfaceFormats == NULL) { ++ *pSurfaceFormatCount = ARRAY_SIZE(formats); ++ return VK_SUCCESS; ++ } ++ ++ *pSurfaceFormatCount = MIN2(*pSurfaceFormatCount, ARRAY_SIZE(formats)); ++ typed_memcpy(pSurfaceFormats, formats, *pSurfaceFormatCount); ++ ++ return *pSurfaceFormatCount < ARRAY_SIZE(formats) ? ++ VK_INCOMPLETE : VK_SUCCESS; ++} ++ ++static VkResult ++wsi_mir_surface_get_present_modes(VkIcdSurfaceBase *surface, ++ uint32_t* pPresentModeCount, ++ VkPresentModeKHR* pPresentModes) ++{ ++ TRACE ++ ++ if (pPresentModes == NULL) { ++ *pPresentModeCount = ARRAY_SIZE(present_modes); ++ return VK_SUCCESS; ++ } ++ ++ *pPresentModeCount = MIN2(*pPresentModeCount, ARRAY_SIZE(present_modes)); ++ typed_memcpy(pPresentModes, present_modes, *pPresentModeCount); ++ ++ return *pPresentModeCount < ARRAY_SIZE(present_modes) ? ++ VK_INCOMPLETE : VK_SUCCESS; ++} ++ ++static VkResult ++wsi_mir_swapchain_destroy(struct wsi_swapchain *swapchain, ++ const VkAllocationCallbacks *pAllocator) ++{ ++ TRACE ++ struct wsi_mir_swapchain *chain = (struct wsi_mir_swapchain *)swapchain; ++ ++ for (uint32_t i = 0; i < chain->image_count; i++) { ++ if (chain->images[i].buffer) ++ { ++ chain->base.image_fns->free_wsi_image(chain->base.device, ++ pAllocator, true, ++ chain->images[i].image, ++ chain->images[i].memory); ++ mir_buffer_release(chain->images[i].buffer); ++ } ++ } ++ ++ pthread_mutex_destroy(&chain->lock); ++ pthread_cond_destroy(&chain->cv); ++ ++ vk_free(pAllocator, chain); ++ ++ return VK_SUCCESS; ++} ++ ++static VkResult ++wsi_mir_swapchain_get_images(struct wsi_swapchain *swapchain, ++ uint32_t *pCount, VkImage *pSwapchainImages) ++{ ++ TRACE ++ ++ struct wsi_mir_swapchain *chain = (struct wsi_mir_swapchain *)swapchain; ++ uint32_t ret_count; ++ VkResult result; ++ ++ if (pSwapchainImages == NULL) { ++ *pCount = chain->image_count; ++ return VK_SUCCESS; ++ } ++ ++ result = VK_SUCCESS; ++ ret_count = chain->image_count; ++ if (chain->image_count > *pCount) { ++ ret_count = *pCount; ++ result = VK_INCOMPLETE; ++ } ++ ++ for (uint32_t i = 0; i < ret_count; i++) ++ pSwapchainImages[i] = chain->images[i].image; ++ ++ return result; ++} ++ ++static VkResult ++wsi_mir_swapchain_acquire_next_image(struct wsi_swapchain *swap_chain, ++ uint64_t timeout, ++ VkSemaphore semaphore, ++ uint32_t *image_index) ++{ ++// TRACE ++ assert(semaphore == VK_NULL_HANDLE); ++ assert(timeout == UINT64_MAX); ++/* ++ printf("\tsemaphore is %snull\n", ++ (semaphore != VK_NULL_HANDLE) ? "non-" : ""); ++ ++ switch (timeout) ++ { ++ case 0: ++ printf("\tWill not block\n"); ++ break; ++ case UINT64_MAX: ++ printf("\tWill block indefinitely\n"); ++ break; ++ default: ++ printf("\tWill block %lu nsecs\n", timeout); ++ break; ++ } ++*/ ++ ++ struct wsi_mir_swapchain *chain = (struct wsi_mir_swapchain *)swap_chain; ++ uint32_t wrap = (chain->next_image_to_use-1)%(chain->image_count); ++ bool found = false; ++ ++ do { ++ uint32_t const next_image = chain->next_image_to_use; ++ if (!chain->images[next_image].busy) { ++ found = true; ++ chain->images[next_image].busy = true; ++ *image_index = next_image; ++ } ++ else if (next_image == wrap) { ++ pthread_mutex_lock(&chain->lock); ++ pthread_cond_wait(&chain->cv, &chain->lock); ++ pthread_mutex_unlock(&chain->lock); ++ } ++ ++ chain->next_image_to_use = (next_image+1)%(chain->image_count); ++ } ++ while(!found); ++ ++ return VK_SUCCESS; ++} ++ ++static void ++buffer_submit_callback(MirBuffer* buffer, void* context) ++{ ++// TRACE ++ struct wsi_mir_swapchain* chain = (struct wsi_mir_swapchain*) context; ++ ++ for (uint32_t i = 0; i < chain->image_count; i++) ++ if (chain->images[i].buffer == buffer) { ++ pthread_mutex_lock(&chain->lock); ++ chain->images[i].busy = false; ++ pthread_mutex_unlock(&chain->lock); ++ pthread_cond_broadcast(&chain->cv); ++ return; ++ } ++} ++ ++static VkResult ++wsi_mir_swapchain_queue_present(struct wsi_swapchain *swap_chain, ++ uint32_t image_index) ++{ ++// TRACE ++ struct wsi_mir_swapchain *chain = (struct wsi_mir_swapchain *)swap_chain; ++ assert(chain->present_mode == VK_PRESENT_MODE_FIFO_KHR); ++ ++ mir_presentation_chain_submit_buffer(chain->presentation_chain, ++ chain->images[image_index].buffer, ++ buffer_submit_callback, ++ chain); ++ ++/* printf("\tBuffer %d queued to server\n", image_index);*/ ++ return VK_SUCCESS; ++} ++ ++ ++static void ++buffer_create_callback(MirBuffer* buffer, void* context) ++{ ++ struct wsi_mir_image* image = (struct wsi_mir_image*)context; ++ ++ printf("alloc'ed buffer\n"); ++ pthread_mutex_lock(&image->lock); ++ image->buffer = buffer; ++ pthread_cond_broadcast(&image->cv); ++ pthread_mutex_unlock(&image->lock); ++} ++ ++static VkResult ++wsi_mir_image_init(struct wsi_mir_swapchain *chain, ++ struct wsi_mir_image *mir_image, ++ const VkSwapchainCreateInfoKHR *pCreateInfo, ++ const VkAllocationCallbacks* pAllocator) ++{ ++ TRACE ++ ++ VkResult result; ++ ++ pthread_cond_init(&mir_image->cv, NULL); ++ pthread_mutex_init(&mir_image->lock, NULL); ++ ++ printf("to alloc buffer\n"); ++ chain->gbm_buffer_ext->allocate_buffer_gbm( ++ chain->connection, ++ chain->extent.width, ++ chain->extent.height, ++ GBM_FORMAT_ARGB8888, // TODO: map the actual vk format ++ GBM_BO_USE_SCANOUT | GBM_BO_USE_RENDERING, ++ buffer_create_callback, ++ mir_image); ++ ++ pthread_mutex_lock(&mir_image->lock); ++ while(!mir_image->buffer) ++ pthread_cond_wait(&mir_image->cv, &mir_image->lock); ++ pthread_mutex_unlock(&mir_image->lock); ++ ++ MirBufferPackage* mbp = mir_buffer_get_buffer_package(mir_image->buffer); ++/* DUMP_MirBufferPackage(mbp); ++*/ ++ uint32_t size; ++ uint32_t row_pitch; ++ uint32_t offset; ++ VkDevice vk_device = chain->base.device; ++ ++ printf("to wrap buffer\n"); ++ result = chain->base.image_fns->create_wsi_image(vk_device, ++ pCreateInfo, ++ pAllocator, ++ true, ++ &mir_image->image, ++ &mir_image->memory, ++ &size, ++ &offset, ++ &row_pitch, ++ &mbp->fd[0]); ++ ++ printf("wrapped buffer\n"); ++ return result; ++} ++ ++static VkResult ++wsi_mir_surface_create_swapchain(VkIcdSurfaceBase *surface, ++ VkDevice device, ++ struct wsi_device *wsi_device, ++ const VkSwapchainCreateInfoKHR* pCreateInfo, ++ const VkAllocationCallbacks* pAllocator, ++ const struct wsi_image_fns *image_fns, ++ struct wsi_swapchain **swapchain) ++{ ++ TRACE ++ ++ VkIcdSurfaceMir *mir_surface = (VkIcdSurfaceMir *)surface; ++ struct wsi_mir_swapchain *chain; ++ VkResult result; ++ ++ assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SWAPCHAIN_CREATE_INFO_KHR); ++ ++ int num_images = pCreateInfo->minImageCount; ++ ++ size_t size = sizeof(*chain) + num_images * sizeof(chain->images[0]); ++ chain = vk_alloc(pAllocator, size, 8, ++ VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); ++ if (chain == NULL) ++ return VK_ERROR_OUT_OF_HOST_MEMORY; ++ ++ chain->base.device = device; ++ chain->base.destroy = wsi_mir_swapchain_destroy; ++ chain->base.get_images = wsi_mir_swapchain_get_images; ++ chain->base.acquire_next_image = wsi_mir_swapchain_acquire_next_image; ++ chain->base.queue_present = wsi_mir_swapchain_queue_present; ++ chain->base.image_fns = image_fns; ++ chain->base.present_mode = pCreateInfo->presentMode; ++ chain->connection = mir_surface->connection; ++ chain->surface = mir_surface->mirSurface; ++ chain->extent = pCreateInfo->imageExtent; ++ chain->vk_format = pCreateInfo->imageFormat; ++ ++ chain->fifo_ready = true; ++ ++ chain->image_count = num_images; ++ chain->next_image_to_use = 0; ++ ++ /* Mark a bunch of stuff as NULL. This way we can just call ++ * destroy_swapchain for cleanup. ++ */ ++ for (uint32_t i = 0; i < chain->image_count; i++) ++ chain->images[i].buffer = NULL; ++ ++ int ret = pthread_mutex_init(&chain->lock, NULL); ++ if (ret != 0) { ++ if (ret == ENOMEM) { ++ result = VK_ERROR_OUT_OF_HOST_MEMORY; ++ } else { ++ /* FINISHME: Choose a better error. */ ++ result = VK_ERROR_OUT_OF_HOST_MEMORY; ++ } ++ ++ goto fail; ++ } ++ ++ ret = pthread_cond_init(&chain->cv, NULL); ++ if (ret != 0) { ++ if (ret == ENOMEM) { ++ result = VK_ERROR_OUT_OF_HOST_MEMORY; ++ } else { ++ /* FINISHME: Choose a better error. */ ++ result = VK_ERROR_OUT_OF_HOST_MEMORY; ++ } ++ ++ goto fail_cv; ++ } ++ ++ if (!mir_render_surface_is_valid(chain->surface)) ++ { ++ result = VK_ERROR_INITIALIZATION_FAILED; ++ goto fail_lock; ++ } ++ ++ chain->presentation_chain = mir_render_surface_get_presentation_chain(chain->surface); ++ if (!mir_presentation_chain_is_valid(chain->presentation_chain)) ++ { ++ result = VK_ERROR_INITIALIZATION_FAILED; ++ goto fail_lock; ++ } ++ ++ chain->gbm_buffer_ext = mir_extension_gbm_buffer_v1(chain->connection); ++ assert(chain->gbm_buffer_ext); ++ assert(chain->gbm_buffer_ext->allocate_buffer_gbm); ++ ++ for (uint32_t i = 0; i < chain->image_count; i++) { ++ result = wsi_mir_image_init(chain, &chain->images[i], ++ pCreateInfo, pAllocator); ++ if (result != VK_SUCCESS) ++ goto fail_lock; ++ chain->images[i].busy = false; ++ } ++ ++ *swapchain = &chain->base; ++ ++ return VK_SUCCESS; ++ ++fail_lock: ++ pthread_mutex_destroy(&chain->lock); ++fail_cv: ++ pthread_cond_destroy(&chain->cv); ++fail: ++ wsi_mir_swapchain_destroy(&chain->base, pAllocator); ++ ++ return result; ++} ++ ++VkBool32 ++wsi_get_mir_presentation_support(struct wsi_device *wsi_device, ++ MirConnection *connection) ++{ ++ TRACE ++ ++ return mir_connection_is_valid(connection); ++} ++ ++VkResult ++wsi_create_mir_surface(const VkAllocationCallbacks *pAllocator, ++ const VkMirSurfaceCreateInfoKHR *pCreateInfo, ++ VkSurfaceKHR *pSurface) ++{ ++ TRACE ++ ++ VkIcdSurfaceMir *surface; ++ ++ surface = vk_alloc(pAllocator, sizeof *surface, 8, ++ VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); ++ if (surface == NULL) ++ return VK_ERROR_OUT_OF_HOST_MEMORY; ++ ++ surface->base.platform = VK_ICD_WSI_PLATFORM_MIR; ++ surface->connection = pCreateInfo->connection; ++ surface->mirSurface = pCreateInfo->mirSurface; ++ ++ *pSurface = VkIcdSurfaceBase_to_handle(&surface->base); ++ return VK_SUCCESS; ++} ++ ++VkResult ++wsi_mir_init_wsi(struct wsi_device *wsi_device, ++ const VkAllocationCallbacks *alloc) ++{ ++ TRACE ++ ++ struct wsi_mir *wsi; ++ VkResult result; ++ ++ wsi = vk_alloc(alloc, sizeof(*wsi), 8, ++ VK_SYSTEM_ALLOCATION_SCOPE_INSTANCE); ++ if (!wsi) { ++ result = VK_ERROR_OUT_OF_HOST_MEMORY; ++ goto fail; ++ } ++ ++#if 0 ++ int ret = pthread_mutex_init(&wsi->mutex, NULL); ++ if (ret != 0) { ++ if (ret == ENOMEM) { ++ result = VK_ERROR_OUT_OF_HOST_MEMORY; ++ } else { ++ /* FINISHME: Choose a better error. */ ++ result = VK_ERROR_OUT_OF_HOST_MEMORY; ++ } ++ ++ goto fail_alloc; ++ } ++ ++ wsi->connections = _mesa_hash_table_create(NULL, _mesa_hash_pointer, ++ _mesa_key_pointer_equal); ++ if (!wsi->connections) { ++ result = VK_ERROR_OUT_OF_HOST_MEMORY; ++ goto fail_mutex; ++ } ++#endif ++ wsi->base.get_support = wsi_mir_surface_get_support; ++ wsi->base.get_capabilities = wsi_mir_surface_get_capabilities; ++ wsi->base.get_formats = wsi_mir_surface_get_formats; ++ wsi->base.get_present_modes = wsi_mir_surface_get_present_modes; ++ wsi->base.create_swapchain = wsi_mir_surface_create_swapchain; ++ ++ wsi_device->wsi[VK_ICD_WSI_PLATFORM_MIR] = &wsi->base; ++ ++ return VK_SUCCESS; ++ ++#if 0 ++fail_mutex: ++ pthread_mutex_destroy(&wsi->mutex); ++fail_alloc: ++ vk_free(alloc, wsi); ++#endif ++fail: ++ wsi_device->wsi[VK_ICD_WSI_PLATFORM_MIR] = NULL; ++ ++ return result; ++} ++ ++void ++wsi_mir_finish_wsi(struct wsi_device *wsi_device, ++ const VkAllocationCallbacks *alloc) ++{ ++ TRACE ++ struct wsi_mir *wsi = ++ (struct wsi_mir*)wsi_device->wsi[VK_ICD_WSI_PLATFORM_MIR]; ++ ++ if (wsi) { ++ vk_free(alloc, wsi); ++ } ++ wsi_device->wsi[VK_ICD_WSI_PLATFORM_MIR] = NULL; ++} +--- /dev/null ++++ b/src/vulkan/wsi/wsi_common_mir.h +@@ -0,0 +1,37 @@ ++/* ++ * Copyright © 2017 Canonical Ltd. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the "Software"), ++ * to deal in the Software without restriction, including without limitation ++ * the rights to use, copy, modify, merge, publish, distribute, sublicense, ++ * and/or sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice (including the next ++ * paragraph) shall be included in all copies or substantial portions of the ++ * Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ++ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER ++ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS ++ * IN THE SOFTWARE. ++ */ ++#ifndef WSI_COMMON_MIR_H ++#define WSI_COMMON_MIR_H ++ ++#include "wsi_common.h" ++ ++VkBool32 wsi_get_mir_presentation_support( ++ struct wsi_device *wsi_device, ++ MirConnection *connection); ++ ++VkResult wsi_create_mir_surface( ++ const VkAllocationCallbacks *pAllocator, ++ const VkMirSurfaceCreateInfoKHR *pCreateInfo, ++ VkSurfaceKHR *pSurface); ++ ++#endif +--- a/src/vulkan/wsi/wsi_common_wayland.c ++++ b/src/vulkan/wsi/wsi_common_wayland.c +@@ -660,6 +660,7 @@ wsi_wl_image_init(struct wsi_wl_swapchai + result = chain->base.image_fns->create_wsi_image(vk_device, + pCreateInfo, + pAllocator, ++ false, + &image->image, + &image->memory, + &size, +@@ -687,7 +688,7 @@ wsi_wl_image_init(struct wsi_wl_swapchai + return VK_SUCCESS; + + fail_image: +- chain->base.image_fns->free_wsi_image(vk_device, pAllocator, ++ chain->base.image_fns->free_wsi_image(vk_device, pAllocator, false, + image->image, image->memory); + + return result; +@@ -702,7 +703,7 @@ wsi_wl_swapchain_destroy(struct wsi_swap + for (uint32_t i = 0; i < chain->image_count; i++) { + if (chain->images[i].buffer) { + wl_buffer_destroy(chain->images[i].buffer); +- chain->base.image_fns->free_wsi_image(chain->base.device, pAllocator, ++ chain->base.image_fns->free_wsi_image(chain->base.device, pAllocator, false, + chain->images[i].image, + chain->images[i].memory); + } +--- a/src/vulkan/wsi/wsi_common_x11.c ++++ b/src/vulkan/wsi/wsi_common_x11.c +@@ -853,6 +853,7 @@ x11_image_init(VkDevice device_h, struct + result = chain->base.image_fns->create_wsi_image(device_h, + pCreateInfo, + pAllocator, ++ false, + &image->image, + &image->memory, + &size, +@@ -902,7 +903,7 @@ fail_pixmap: + cookie = xcb_free_pixmap(chain->conn, image->pixmap); + xcb_discard_reply(chain->conn, cookie.sequence); + +- chain->base.image_fns->free_wsi_image(device_h, pAllocator, ++ chain->base.image_fns->free_wsi_image(device_h, pAllocator, false, + image->image, image->memory); + + return result; +@@ -922,7 +923,7 @@ x11_image_finish(struct x11_swapchain *c + cookie = xcb_free_pixmap(chain->conn, image->pixmap); + xcb_discard_reply(chain->conn, cookie.sequence); + +- chain->base.image_fns->free_wsi_image(chain->base.device, pAllocator, ++ chain->base.image_fns->free_wsi_image(chain->base.device, pAllocator, false, + image->image, image->memory); + } + diff -Nru mesa-12.0.6/debian/rules mesa-17.0.7/debian/rules --- mesa-12.0.6/debian/rules 2017-06-26 12:58:28.000000000 +0000 +++ mesa-17.0.7/debian/rules 2017-06-26 12:58:29.000000000 +0000 @@ -8,22 +8,21 @@ DEB_HOST_MULTIARCH ?= $(shell dpkg-architecture -qDEB_HOST_MULTIARCH) DEB_HOST_ARCH ?= $(shell dpkg-architecture -qDEB_HOST_ARCH) DEB_HOST_ARCH_OS ?= $(shell dpkg-architecture -qDEB_HOST_ARCH_OS) -DEB_HOST_GNU_TYPE ?= $(shell dpkg-architecture -qDEB_HOST_GNU_TYPE) -DEB_BUILD_GNU_TYPE ?= $(shell dpkg-architecture -qDEB_BUILD_GNU_TYPE) DEB_HOST_ARCH_CPU ?= $(shell dpkg-architecture -qDEB_HOST_ARCH_CPU) -ifeq ($(DEB_BUILD_GNU_TYPE), $(DEB_HOST_GNU_TYPE)) - confflags += --build=$(DEB_HOST_GNU_TYPE) -else - confflags += --build=$(DEB_BUILD_GNU_TYPE) --host=$(DEB_HOST_GNU_TYPE) -endif -ifeq (,$(filter $(DEB_HOST_ARCH), armhf)) +ifeq (,$(filter $(DEB_HOST_ARCH), armhf ppc64el)) buildflags = \ - $(shell DEB_CFLAGS_MAINT_APPEND="-Wall -O2" DEB_CXXFLAGS_MAINT_APPEND="-Wall -O2" dpkg-buildflags --export=configure) + $(shell DEB_CFLAGS_MAINT_APPEND=-Wall DEB_CXXFLAGS_MAINT_APPEND=-Wall dpkg-buildflags --export=configure) else -# Workaround for a variant of LP: #725126 -buildflags = \ + ifeq (,$(filter $(DEB_HOST_ARCH), armhf)) + # Force -O2 on ppc64el + buildflags = \ + $(shell DEB_CFLAGS_MAINT_APPEND="-Wall -O2" DEB_CXXFLAGS_MAINT_APPEND="-Wall -O2" dpkg-buildflags --export=configure) + else + # Workaround for a variant of LP: #725126 + buildflags = \ $(shell DEB_CFLAGS_MAINT_APPEND="-Wall -fno-optimize-sibling-calls" DEB_CXXFLAGS_MAINT_APPEND="-Wall -fno-optimize-sibling-calls" dpkg-buildflags --export=configure) + endif endif # keep a list of files we don't install (yet), but since it's a bit @@ -33,13 +32,14 @@ DRI_DRIVERS = GALLIUM_DRIVERS = VULKAN_DRIVERS = -EGL_DISPLAYS = x11 +EGL_PLATFORMS = x11 confflags_DRI3 = --disable-dri3 # hurd doesn't do direct rendering ifeq ($(DEB_HOST_ARCH_OS), hurd) confflags_DIRECT_RENDERING = --disable-driglx-direct + confflags_GBM = --disable-gbm DRI_DRIVERS = swrast else ifeq ($(DEB_HOST_ARCH_OS), linux) @@ -57,14 +57,19 @@ GALLIUM_DRIVERS += vc4 endif + # etnaviv kernel support is currently only available on armhf + ifneq (,$(filter $(DEB_HOST_ARCH), armhf)) + GALLIUM_DRIVERS += etnaviv imx + endif + # svga needs xa state tracker confflags_GALLIUM += --enable-xa # Non-Linux ports also lack *_CLOEXEC and epoll, so wayland isn't ready yet: - EGL_DISPLAYS += wayland + EGL_PLATFORMS += wayland # Likewise, Mir makes no attempt to be portable to random kernels. - EGL_DISPLAYS += mir - + EGL_PLATFORMS += mir + EGL_PLATFORMS += rs ifeq (,$(filter $(DEB_HOST_ARCH), s390 s390x)) DRI_DRIVERS += nouveau endif @@ -73,7 +78,7 @@ endif endif - EGL_DISPLAYS += drm + EGL_PLATFORMS += drm # Build intel drivers on archs where libdrm-intel is installed ifneq (,$(filter $(DEB_HOST_ARCH),amd64 i386 kfreebsd-amd64 kfreebsd-i386 x32)) @@ -84,30 +89,42 @@ DRI_DRIVERS += r200 radeon GALLIUM_DRIVERS += r600 r300 endif - ifneq (,$(filter $(DEB_HOST_ARCH),amd64 i386 arm64 armhf)) - # opencl needs gallium-pipe-loader which needs udev, - # so no opencl on kfreebsd. - # opencl needs LLVM and Clang, so only build it on the subset - # of arches where we have LLVM enabled. - confflags_GALLIUM += --enable-opencl --enable-opencl-icd - endif - # LLVM is required for r300g, radeonsi and llvmpipe: - ifneq (,$(filter $(DEB_HOST_ARCH),amd64 i386 kfreebsd-amd64 kfreebsd-i386 arm64 armhf ppc64el)) + # LLVM is required for building r300g, radeonsi and llvmpipe drivers. + # It's also required for building OpenCL support. + ifneq (,$(filter $(DEB_HOST_ARCH), amd64 arm64 armel armhf i386 kfreebsd-amd64 kfreebsd-i386 mips mips64el mipsel powerpc ppc64 sparc64 ppc64el)) GALLIUM_DRIVERS += radeonsi confflags_GALLIUM += --enable-gallium-llvm - confflags_GALLIUM += ac_cv_path_LLVM_CONFIG=llvm-config-3.8 + confflags_GALLIUM += --enable-opencl --enable-opencl-icd + confflags_GALLIUM += ac_cv_path_LLVM_CONFIG=llvm-config-4.0 GALLIUM_DRIVERS += swrast else DRI_DRIVERS += swrast + confflags_GALLIUM += --disable-gallium-llvm + endif + + # radv needs LLVM and the Vulkan loader, so only build on the subset of + # arches where we have LLVM enabled and where the Vulkan loader is built. + ifneq (,$(filter $(DEB_HOST_ARCH), amd64 arm64 armel armhf i386 mips mips64el mipsel powerpc ppc64 sparc64 ppc64el)) + VULKAN_DRIVERS += radeon endif + confflags_DIRECT_RENDERING = --enable-driglx-direct + confflags_GBM = --enable-gbm confflags_GALLIUM += --enable-vdpau confflags_GALLIUM += --enable-va + confflags_GALLIUM += --enable-gallium-extra-hud + confflags_GALLIUM += --enable-lmsensors +endif + +# Disable assembly usage on x32 otherwise Mesa defaults to x86_64 assembly +# which doesn't work on x32 (see #758094) +ifneq (,$(filter $(DEB_HOST_ARCH), x32)) + confflags += --disable-asm endif -confflags_EGL = --with-egl-platforms="$(EGL_DISPLAYS)" -confflags_GLES = --enable-gles1 --enable-gles2 +confflags_EGL = --with-egl-platforms="$(EGL_PLATFORMS)" +confflags_GLES = --disable-gles1 --enable-gles2 confflags_GALLIUM += --with-gallium-drivers="$(GALLIUM_DRIVERS)" confflags += \ @@ -123,6 +140,7 @@ --disable-xvmc \ --disable-omx \ $(confflags_DIRECT_RENDERING) \ + $(confflags_GBM) \ $(confflags_DRI3) \ $(confflags_EGL) \ $(confflags_GALLIUM) \ @@ -145,7 +163,6 @@ override_dh_auto_configure: dh_auto_configure -- \ - --disable-silent-rules \ $(confflags) override_dh_auto_install: @@ -180,11 +197,9 @@ # Remove vulkan headers only where they get installed in tmp # We ship those headers via src:vulkan / libvulkan-dev - ifeq ($(DEB_HOST_ARCH_OS), linux) - ifneq (,$(filter $(DEB_HOST_ARCH),amd64 i386 x32)) - set -e; for file in vk_platform.h vulkan.h vulkan_intel.h; do rm debian/tmp/usr/include/vulkan/$$file; done + ifneq (,$(filter $(DEB_HOST_ARCH),amd64 i386 x32)) + rm debian/tmp/usr/include/vulkan/vulkan_intel.h rmdir debian/tmp/usr/include/vulkan - endif endif ifneq ($(DEB_HOST_ARCH_OS), hurd) diff -Nru mesa-12.0.6/debian/source/format mesa-17.0.7/debian/source/format --- mesa-12.0.6/debian/source/format 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/debian/source/format 2017-06-26 12:58:29.000000000 +0000 @@ -0,0 +1 @@ +1.0 diff -Nru mesa-12.0.6/debian/upstream/signing-key.asc mesa-17.0.7/debian/upstream/signing-key.asc --- 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+3crrhNsrjEUh0mLqvs0fXq+i0GiMVV8/7cIg06aYeck9A0cMIUnVyYiPfXzietAM +6sP2UoDZlXAXTh3l7iN0UC79S+Bik30G5DGsk2O4nAT/EDJ0TWm8s3N+A8tf669Z +Wy4npfR6+9y3tGAAlYzU8e+tZCrRfXKJgDTAcc+sC0qUS5McIFZ243QVvWYVDRhb +e5ePOAsDhuaZdadKkBX4AsVScpsCQcQD/3J0CquPxVtgsFglmJfHc9olvgCI5HSc +Lpl6pQn9/5udtz5VBNShROmvKCz60PE6chLLNdWOdWrx+RaSu09g/5Nc6Wl+gmFe +Na39ywARAQABiQIfBBgBCAAJBQJXP2+2AhsMAAoJENlhxZanIDRWSmQP/17dBjiQ +kLy0haS5NQJrzDFCMlqbDrM9IGjuzy8oS4IVgowCERYjA0yKQ8WAxV+yUVelvSqg +hWBZwWX6yHWRgqw8RQT5/8j1D96IvM1k+fPbC5fBja3cptPB+fuW7YIWZIPvhDRn +tfFMnhEKvIjmwd7DUJn4mU9DNzSQSPadpSUsFkgX2IVi5MUvd93DIUeU2IcrpAd3 +VDDGY3gUW9EOIUpgMSeAIoojnsdZS8TeHbEznviZmOFHAQ3HUrxQUIjYbkdEUKLT +z5RPejFKSkdxVtXAvqExOMtrnT9PkX2Dw5nP2O3escfPvZaNoDIKTlUwiublA80k +QyaCEbBkKOqU/YzvbqoSBhapo8yp3CU93pWWIF9YPHofprD/krml5UES2eVhqYEJ +7tVbwZNaszXX2j9I3uaZe1tlc/sT5lZ/sJ0kIVJ84VikTmz4LEqYHwRFV+62p3Be +CG33g/9wCeN9QkxWHWeUSAtT/r7tjW+mQdLON41w4Q7zwtYhSmxjGyo2PP0vpR79 +oYQ8CDPreyTxWFJuOsqu8NbGhlj/B3TEzl3+0XQQlAfejerN9olT+KlOjssKzrvF +OLtkGL9E+0n7qvCcp0yjw5d3DdCrCnhHtsGCJyMpRJVkNdpRyAEk17Sbt8g36TSV +yc3LzJA+b6/cPamySsetyO6jSkApaLbAOl99 +=FK/k +-----END PGP PUBLIC KEY BLOCK----- diff -Nru mesa-12.0.6/debian/watch mesa-17.0.7/debian/watch --- mesa-12.0.6/debian/watch 2017-06-26 12:58:28.000000000 +0000 +++ mesa-17.0.7/debian/watch 2017-06-26 12:58:29.000000000 +0000 @@ -1,4 +1,4 @@ #git=git://anongit.freedesktop.org/mesa/mesa version=3 opts="uversionmangle=s/-rc/~rc/,dversionmangle=s/\+repack//,pgpsigurlmangle=s/$/.sig/,pasv" \ -https://mesa.freedesktop.org/archive/([\d\.]*)/ mesa-(.*)\.tar\.gz +https://mesa.freedesktop.org/archive/mesa-(.*)\.tar\.gz diff -Nru mesa-12.0.6/docs/autoconf.html mesa-17.0.7/docs/autoconf.html --- mesa-12.0.6/docs/autoconf.html 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/docs/autoconf.html 2017-06-01 10:37:10.000000000 +0000 @@ -55,7 +55,7 @@

-This will produce libGL.so and several other libraries depending on the +This will produce libGL.so and/or several other libraries depending on the options you have chosen. Later, if you want to rebuild for a different configuration run make realclean before rebuilding.

@@ -133,9 +133,11 @@

--enable-debug
-

This option will enable compiler -options and macros to aid in debugging the Mesa libraries.

-
+

This option will set the compiler debug/optimisation levels (if the user +hasn't already set them via the CFLAGS/CXXFLAGS) and macros to aid in +debugging the Mesa libraries.

+ +

Note that enabling this option can lead to noticable loss of performance.

--disable-asm

There are assembly routines @@ -174,27 +176,22 @@

-

2. Driver Options

+

2. GL Driver Options

There are several different driver modes that Mesa can use. These are described in more detail in the basic installation instructions. The Mesa driver is controlled through the -configure options --enable-xlib-glx, --enable-osmesa, -and --enable-dri. +configure options --enable-glx and --enable-osmesa

Xlib

It uses Xlib as a software renderer to do all rendering. It corresponds -to the option --enable-xlib-glx. The libX11 and libXext -libraries, as well as the X11 development headers, will be need to -support the Xlib driver. +to the option --enable-glx=xlib or --enable-glx=gallium-xlib.

DRI

This mode uses the DRI hardware drivers for -accelerated OpenGL rendering. Enable the DRI drivers with the option ---enable-dri. See the basic -installation instructions for details on prerequisites for the DRI -drivers. +accelerated OpenGL rendering. To enable use --enable-glx=dri +--enable-dri.

@@ -252,10 +249,8 @@

3. Library Options

-The configure script provides more fine grained control over the GL -libraries that will be built. More details on the specific GL libraries -can be found in the basic installation -instructions. +The configure script provides more fine grained control over the libraries +that will be built. diff -Nru mesa-12.0.6/docs/codingstyle.html mesa-17.0.7/docs/codingstyle.html --- mesa-12.0.6/docs/codingstyle.html 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/docs/codingstyle.html 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,142 @@ + + + + + Coding Style + + + + +

+

The Mesa 3D Graphics Library

+
+ + +
+ +

Coding Style

+ +

+Mesa is over 20 years old and the coding style has evolved over time. +Some old parts use a style that's a bit out of date. + +Different sections of mesa can use different coding style as set in the local +EditorConfig (.editorconfig) and/or Emacs (.dir-locals.el) file. + +Alternatively the following is applicable. + +If the guidelines below don't cover something, try following the format of +existing, neighboring code. +

+ +

+Basic formatting guidelines +

+ +
    +
  • 3-space indentation, no tabs. +
  • Limit lines to 78 or fewer characters. The idea is to prevent line +wrapping in 80-column editors and terminals. There are exceptions, such +as if you're defining a large, static table of information. +
  • Opening braces go on the same line as the if/for/while statement. +For example: +
    +   if (condition) {
    +      foo;
    +   } else {
    +      bar;
    +   }
    +
    + +
  • Put a space before/after operators. For example, a = b + c; +and not a=b+c; + +
  • This GNU indent command generally does the right thing for formatting: +
    +   indent -br -i3 -npcs --no-tabs infile.c -o outfile.c
    +
    + +
  • Use comments wherever you think it would be helpful for other developers. +Several specific cases and style examples follow. Note that we roughly +follow Doxygen conventions. +
    +
    +Single-line comments: +
    +   /* null-out pointer to prevent dangling reference below */
    +   bufferObj = NULL;
    +
    +Or, +
    +   bufferObj = NULL;  /* prevent dangling reference below */
    +
    +Multi-line comment: +
    +   /* If this is a new buffer object id, or one which was generated but
    +    * never used before, allocate a buffer object now.
    +    */
    +
    +We try to quote the OpenGL specification where prudent: +
    +   /* Page 38 of the PDF of the OpenGL ES 3.0 spec says:
    +    *
    +    *     "An INVALID_OPERATION error is generated for any of the following
    +    *     conditions:
    +    *
    +    *     *  is zero."
    +    *
    +    * Additionally, page 94 of the PDF of the OpenGL 4.5 core spec
    +    * (30.10.2014) also says this, so it's no longer allowed for desktop GL,
    +    * either.
    +    */
    +
    +Function comment example: +
    +   /**
    +    * Create and initialize a new buffer object.  Called via the
    +    * ctx->Driver.CreateObject() driver callback function.
    +    * \param  name  integer name of the object
    +    * \param  type  one of GL_FOO, GL_BAR, etc.
    +    * \return  pointer to new object or NULL if error
    +    */
    +   struct gl_object *
    +   _mesa_create_object(GLuint name, GLenum type)
    +   {
    +      /* function body */
    +   }
    +
    + +
  • Put the function return type and qualifiers on one line and the function +name and parameters on the next, as seen above. This makes it easy to use +grep ^function_name dir/* to find function definitions. Also, +the opening brace goes on the next line by itself (see above.) + +
  • Function names follow various conventions depending on the type of function: +
    +   glFooBar()       - a public GL entry point (in glapi_dispatch.c)
    +   _mesa_FooBar()   - the internal immediate mode function
    +   save_FooBar()    - retained mode (display list) function in dlist.c
    +   foo_bar()        - a static (private) function
    +   _mesa_foo_bar()  - an internal non-static Mesa function
    +
    + +
  • Constants, macros and enumerant names are ALL_UPPERCASE, with _ between +words. +
  • Mesa usually uses camel case for local variables (Ex: "localVarname") +while gallium typically uses underscores (Ex: "local_var_name"). +
  • Global variables are almost never used because Mesa should be thread-safe. + +
  • Booleans. Places that are not directly visible to the GL API +should prefer the use of bool, true, and +false over GLboolean, GL_TRUE, and +GL_FALSE. In C code, this may mean that +#include <stdbool.h> needs to be added. The +try_emit_* methods in src/mesa/program/ir_to_mesa.cpp and +src/mesa/state_tracker/st_glsl_to_tgsi.cpp can serve as examples. + +
+

+ +
+ + diff -Nru mesa-12.0.6/docs/contents.html mesa-17.0.7/docs/contents.html --- mesa-12.0.6/docs/contents.html 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/docs/contents.html 2017-06-01 10:37:10.000000000 +0000 @@ -66,7 +66,7 @@
  • Debugging Tips
  • Performance Tips
  • Mesa Extensions -
  • Function Name Mangling +
  • GL Function Name Mangling
  • Gallium llvmpipe driver
  • VMware SVGA3D guest driver
  • Gallium post-processing @@ -81,6 +81,8 @@
  • Utilities
  • Help Wanted
  • Development Notes +
  • Coding Style +
  • Submitting patches
  • Source Documentation
  • GL Dispatch diff -Nru mesa-12.0.6/docs/developers.html mesa-17.0.7/docs/developers.html --- mesa-12.0.6/docs/developers.html 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/docs/developers.html 2017-06-01 10:37:10.000000000 +0000 @@ -38,7 +38,7 @@

    Other companies including -Intel +Intel and RedHat also actively contribute to the project. Intel has recently contributed the new GLSL compiler in Mesa 7.9.

    diff -Nru mesa-12.0.6/docs/devinfo.html mesa-17.0.7/docs/devinfo.html --- mesa-12.0.6/docs/devinfo.html 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/docs/devinfo.html 2017-06-01 10:37:10.000000000 +0000 @@ -18,646 +18,9 @@ - -

    Coding Style

    - -

    -Mesa is over 20 years old and the coding style has evolved over time. -Some old parts use a style that's a bit out of date. -If the guidelines below don't cover something, try following the format of -existing, neighboring code. -

    - -

    -Basic formatting guidelines -

    - -
      -
    • 3-space indentation, no tabs. -
    • Limit lines to 78 or fewer characters. The idea is to prevent line -wrapping in 80-column editors and terminals. There are exceptions, such -as if you're defining a large, static table of information. -
    • Opening braces go on the same line as the if/for/while statement. -For example: -
      -   if (condition) {
      -      foo;
      -   } else {
      -      bar;
      -   }
      -
      - -
    • Put a space before/after operators. For example, a = b + c; -and not a=b+c; - -
    • This GNU indent command generally does the right thing for formatting: -
      -   indent -br -i3 -npcs --no-tabs infile.c -o outfile.c
      -
      - -
    • Use comments wherever you think it would be helpful for other developers. -Several specific cases and style examples follow. Note that we roughly -follow Doxygen conventions. -
      -
      -Single-line comments: -
      -   /* null-out pointer to prevent dangling reference below */
      -   bufferObj = NULL;
      -
      -Or, -
      -   bufferObj = NULL;  /* prevent dangling reference below */
      -
      -Multi-line comment: -
      -   /* If this is a new buffer object id, or one which was generated but
      -    * never used before, allocate a buffer object now.
      -    */
      -
      -We try to quote the OpenGL specification where prudent: -
      -   /* Page 38 of the PDF of the OpenGL ES 3.0 spec says:
      -    *
      -    *     "An INVALID_OPERATION error is generated for any of the following
      -    *     conditions:
      -    *
      -    *     *  is zero."
      -    *
      -    * Additionally, page 94 of the PDF of the OpenGL 4.5 core spec
      -    * (30.10.2014) also says this, so it's no longer allowed for desktop GL,
      -    * either.
      -    */
      -
      -Function comment example: -
      -   /**
      -    * Create and initialize a new buffer object.  Called via the
      -    * ctx->Driver.CreateObject() driver callback function.
      -    * \param  name  integer name of the object
      -    * \param  type  one of GL_FOO, GL_BAR, etc.
      -    * \return  pointer to new object or NULL if error
      -    */
      -   struct gl_object *
      -   _mesa_create_object(GLuint name, GLenum type)
      -   {
      -      /* function body */
      -   }
      -
      - -
    • Put the function return type and qualifiers on one line and the function -name and parameters on the next, as seen above. This makes it easy to use -grep ^function_name dir/* to find function definitions. Also, -the opening brace goes on the next line by itself (see above.) - -
    • Function names follow various conventions depending on the type of function: -
      -   glFooBar()       - a public GL entry point (in glapi_dispatch.c)
      -   _mesa_FooBar()   - the internal immediate mode function
      -   save_FooBar()    - retained mode (display list) function in dlist.c
      -   foo_bar()        - a static (private) function
      -   _mesa_foo_bar()  - an internal non-static Mesa function
      -
      - -
    • Constants, macros and enumerant names are ALL_UPPERCASE, with _ between -words. -
    • Mesa usually uses camel case for local variables (Ex: "localVarname") -while gallium typically uses underscores (Ex: "local_var_name"). -
    • Global variables are almost never used because Mesa should be thread-safe. - -
    • Booleans. Places that are not directly visible to the GL API -should prefer the use of bool, true, and -false over GLboolean, GL_TRUE, and -GL_FALSE. In C code, this may mean that -#include <stdbool.h> needs to be added. The -try_emit_* methods in src/mesa/program/ir_to_mesa.cpp and -src/mesa/state_tracker/st_glsl_to_tgsi.cpp can serve as examples. - -
    - - -

    Submitting patches

    - -

    -The basic guidelines for submitting patches are: -

    - -
      -
    • Patches should be sufficiently tested before submitting. -
    • Code patches should follow Mesa coding conventions. -
    • Whenever possible, patches should only effect individual Mesa/Gallium -components. -
    • Patches should never introduce build breaks and should be bisectable (see -git bisect.) -
    • Patches should be properly formatted (see below). -
    • Patches should be submitted to mesa-dev for review using -git send-email. -
    • Patches should not mix code changes with code formatting changes (except, -perhaps, in very trivial cases.) -
    - -

    Patch formatting

    - -

    -The basic rules for patch formatting are: -

    - -
      -
    • Lines should be limited to 75 characters or less so that git logs -displayed in 80-column terminals avoid line wrapping. Note that git -log uses 4 spaces of indentation (4 + 75 < 80). -
    • The first line should be a short, concise summary of the change prefixed -with a module name. Examples: -
      -    mesa: Add support for querying GL_VERTEX_ATTRIB_ARRAY_LONG
      -
      -    gallium: add PIPE_CAP_DEVICE_RESET_STATUS_QUERY
      -
      -    i965: Fix missing type in local variable declaration.
      -
      -
    • Subsequent patch comments should describe the change in more detail, -if needed. For example: -
      -    i965: Remove end-of-thread SEND alignment code.
      -    
      -    This was present in Eric's initial implementation of the compaction code
      -    for Sandybridge (commit 077d01b6). There is no documentation saying this
      -    is necessary, and removing it causes no regressions in piglit on any
      -    platform.
      -
      -
    • A "Signed-off-by:" line is not required, but not discouraged either. -
    • If a patch address a bugzilla issue, that should be noted in the -patch comment. For example: -
      -   Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89689
      -
      -
    • If there have been several revisions to a patch during the review -process, they should be noted such as in this example: -
      -    st/mesa: add ARB_texture_stencil8 support (v4)
      -    
      -    if we support stencil texturing, enable texture_stencil8
      -    there is no requirement to support native S8 for this,
      -    the texture can be converted to x24s8 fine.
      -    
      -    v2: fold fixes from Marek in:
      -       a) put S8 last in the list
      -       b) fix renderable to always test for d/s renderable
      -        fixup the texture case to use a stencil only format
      -        for picking the format for the texture view.
      -    v3: hit fallback for getteximage
      -    v4: put s8 back in front, it shouldn't get picked now (Ilia)
      -
      -
    • If someone tested your patch, document it with a line like this: -
      -    Tested-by: Joe Hacker <jhacker@foo.com>
      -
      -
    • If the patch was reviewed (usually the case) or acked by someone, -that should be documented with: -
      -    Reviewed-by: Joe Hacker <jhacker@foo.com>
      -    Acked-by: Joe Hacker <jhacker@foo.com>
      -
      -
    - - - -

    Testing Patches

    - -

    -It should go without saying that patches must be tested. In general, -do whatever testing is prudent. -

    - -

    -You should always run the Mesa test suite before submitting patches. -The test suite can be run using the 'make check' command. All tests -must pass before patches will be accepted, this may mean you have -to update the tests themselves. -

    - -

    -Whenever possible and applicable, test the patch with -Piglit to -check for regressions. -

    - - -

    Mailing Patches

    - -

    -Patches should be sent to the Mesa mailing list for review. -When submitting a patch make sure to use git send-email rather than attaching -patches to emails. Sending patches as attachments prevents people from being -able to provide in-line review comments. -

    - -

    -When submitting follow-up patches you can use --in-reply-to to make v2, v3, -etc patches show up as replies to the originals. This usually works well -when you're sending out updates to individual patches (as opposed to -re-sending the whole series). Using --in-reply-to makes -it harder for reviewers to accidentally review old patches. -

    - -

    -When submitting follow-up patches you should also login to -patchwork and change the -state of your old patches to Superseded. -

    - -

    Reviewing Patches

    - -

    -When you've reviewed a patch on the mailing list, please be unambiguous -about your review. That is, state either -

    -    Reviewed-by: Joe Hacker <jhacker@foo.com>
    -
    -or -
    -    Acked-by: Joe Hacker <jhacker@foo.com>
    -
    -Rather than saying just "LGTM" or "Seems OK". -

    - -

    -If small changes are suggested, it's OK to say something like: -

    -   With the above fixes, Reviewed-by: Joe Hacker <jhacker@foo.com>
    -
    -which tells the patch author that the patch can be committed, as long -as the issues are resolved first. -

    - - -

    Marking a commit as a candidate for a stable branch

    - -

    -If you want a commit to be applied to a stable branch, -you should add an appropriate note to the commit message. -

    - -

    -Here are some examples of such a note: -

    -
      -
    • CC: <mesa-stable@lists.freedesktop.org>
    • -
    • CC: "9.2 10.0" <mesa-stable@lists.freedesktop.org>
    • -
    • CC: "10.0" <mesa-stable@lists.freedesktop.org>
    • -
    - -Simply adding the CC to the mesa-stable list address is adequate to nominate -the commit for the most-recently-created stable branch. It is only necessary -to specify a specific branch name, (such as "9.2 10.0" or "10.0" in the -examples above), if you want to nominate the commit for an older stable -branch. And, as in these examples, you can nominate the commit for the older -branch in addition to the more recent branch, or nominate the commit -exclusively for the older branch. - -This "CC" syntax for patch nomination will cause patches to automatically be -copied to the mesa-stable@ mailing list when you use "git send-email" to send -patches to the mesa-dev@ mailing list. Also, if you realize that a commit -should be nominated for the stable branch after it has already been committed, -you can send a note directly to the mesa-stable@lists.freedesktop.org where -the Mesa stable-branch maintainers will receive it. Be sure to mention the -commit ID of the commit of interest (as it appears in the mesa master branch). - -The latest set of patches that have been nominated, accepted, or rejected for -the upcoming stable release can always be seen on the -Mesa Stable Queue -page. - -

    Criteria for accepting patches to the stable branch

    - -Mesa has a designated release manager for each stable branch, and the release -manager is the only developer that should be pushing changes to these -branches. Everyone else should simply nominate patches using the mechanism -described above. - -The stable-release manager will work with the list of nominated patches, and -for each patch that meets the crtieria below will cherry-pick the patch with: -git cherry-pick -x <commit>. The -x option is -important so that the picked patch references the comit ID of the original -patch. - -The stable-release manager may at times need to force-push changes to the -stable branches, for example, to drop a previously-picked patch that was later -identified as causing a regression). These force-pushes may cause changes to -be lost from the stable branch if developers push things directly. Consider -yourself warned. - -The stable-release manager is also given broad discretion in rejecting patches -that have been nominated for the stable branch. The most basic rule is that -the stable branch is for bug fixes only, (no new features, no -regressions). Here is a non-exhaustive list of some reasons that a patch may -be rejected: - -
      -
    • Patch introduces a regression. Any reported build breakage or other - regression caused by a particular patch, (game no longer work, piglit test - changes from PASS to FAIL), is justification for rejecting a patch.
    • - -
    • Patch is too large, (say, larger than 100 lines)
    • - -
    • Patch is not a fix. For example, a commit that moves code around with no - functional change should be rejected.
    • - -
    • Patch fix is not clearly described. For example, a commit message - of only a single line, no description of the bug, no mention of bugzilla, - etc.
    • - -
    • Patch has not obviously been reviewed, For example, the commit message - has no Reviewed-by, Signed-off-by, nor Tested-by tags from anyone but the - author.
    • - -
    • Patch has not already been merged to the master branch. As a rule, bug - fixes should never be applied first to a stable branch. Patches should land - first on the master branch and then be cherry-picked to a stable - branch. (This is to avoid future releases causing regressions if the patch - is not also applied to master.) The only things that might look like - exceptions would be backports of patches from master that happen to look - significantly different.
    • - -
    • Patch depends on too many other patches. Ideally, all stable-branch - patches should be self-contained. It sometimes occurs that a single, logical - bug-fix occurs as two separate patches on master, (such as an original - patch, then a subsequent fix-up to that patch). In such a case, these two - patches should be squashed into a single, self-contained patch for the - stable branch. (Of course, if the squashing makes the patch too large, then - that could be a reason to reject the patch.)
    • - -
    • Patch includes new feature development, not bug fixes. New OpenGL - features, extensions, etc. should be applied to Mesa master and included in - the next major release. Stable releases are intended only for bug fixes. - - Note: As an exception to this rule, the stable-release manager may accept - hardware-enabling "features". For example, backports of new code to support - a newly-developed hardware product can be accepted if they can be reasonably - determined to not have effects on other hardware.
    • - -
    • Patch is a performance optimization. As a rule, performance patches are - not candidates for the stable branch. The only exception might be a case - where an application's performance was recently severely impacted so as to - become unusable. The fix for this performance regression could then be - considered for a stable branch. The optimization must also be - non-controversial and the patches still need to meet the other criteria of - being simple and self-contained
    • - -
    • Patch introduces a new failure mode (such as an assert). While the new - assert might technically be correct, for example to make Mesa more - conformant, this is not the kind of "bug fix" we want in a stable - release. The potential problem here is that an OpenGL program that was - previously working, (even if technically non-compliant with the - specification), could stop working after this patch. So that would be a - regression that is unaacceptable for the stable branch.
    • -
    - - -

    Making a New Mesa Release

    - -

    -These are the instructions for making a new Mesa release. -

    - -

    Get latest source files

    -

    -Use git to get the latest Mesa files from the git repository, from whatever -branch is relevant. This document uses the convention X.Y.Z for the release -being created, which should be created from a branch named X.Y. -

    - -

    Perform basic testing

    -

    -The release manager should, at the very least, test the code by compiling it, -installing it, and running the latest piglit to ensure that no piglit tests -have regressed since the previous release. -

    - -

    -The release manager should do this testing with at least one hardware driver, -(say, whatever is contained in the local development machine), as well as on -both Gallium and non-Gallium software drivers. The software testing can be -performed by running piglit with the following environment-variable set: -

    - -
    -LIBGL_ALWAYS_SOFTWARE=1
    -
    - -And Gallium vs. non-Gallium software drivers can be obtained by using the -following configure flags on separate builds: - -
    ---with-dri-drivers=swrast
    ---with-gallium-drivers=swrast
    -
    - -

    -Note: If both options are given in one build, both swrast_dri.so drivers will -be compiled, but only one will be installed. The following command can be used -to ensure the correct driver is being tested: -

    - -
    -LIBGL_ALWAYS_SOFTWARE=1 glxinfo | grep "renderer string"
    -
    - -If any regressions are found in this testing with piglit, stop here, and do -not perform a release until regressions are fixed. - -

    Update version in file VERSION

    - -

    -Increment the version contained in the file VERSION at Mesa's top-level, then -commit this change. -

    - -

    Create release notes for the new release

    - -

    -Create a new file docs/relnotes/X.Y.Z.html, (follow the style of the previous -release notes). Note that the sha256sums section of the release notes should -be empty at this point. -

    - -

    -Two scripts are available to help generate portions of the release notes: - -

    -	./bin/bugzilla_mesa.sh
    -	./bin/shortlog_mesa.sh
    -
    - -

    -The first script identifies commits that reference bugzilla bugs and obtains -the descriptions of those bugs from bugzilla. The second script generates a -log of all commits. In both cases, HTML-formatted lists are printed to stdout -to be included in the release notes. -

    - -

    -Commit these changes -

    - -

    Make the release archives, signatures, and the release tag

    -

    -From inside the Mesa directory: -

    -	./autogen.sh
    -	make -j1 tarballs
    -
    - -

    -After the tarballs are created, the sha256 checksums for the files will -be computed and printed. These will be used in a step below. -

    - -

    -It's important at this point to also verify that the constructed tar file -actually builds: -

    - -
    -	tar xjf MesaLib-X.Y.Z.tar.bz2
    -	cd Mesa-X.Y.Z
    -	./configure --enable-gallium-llvm
    -	make -j6
    -	make install
    -
    - -

    -Some touch testing should also be performed at this point, (run glxgears or -more involved OpenGL programs against the installed Mesa). -

    - -

    -Create detached GPG signatures for each of the archive files created above: -

    - -
    -	gpg --sign --detach MesaLib-X.Y.Z.tar.gz
    -	gpg --sign --detach MesaLib-X.Y.Z.tar.bz2
    -	gpg --sign --detach MesaLib-X.Y.Z.zip
    -
    - -

    -Tag the commit used for the build: -

    - -
    -	git tag -s mesa-X.Y.X -m "Mesa X.Y.Z release"
    -
    - -

    -Note: It would be nice to investigate and fix the issue that causes the -tarballs target to fail with multiple build process, such as with "-j4". It -would also be nice to incorporate all of the above commands into a single -makefile target. And instead of a custom "tarballs" target, we should -incorporate things into the standard "make dist" and "make distcheck" targets. -

    - -

    Add the sha256sums to the release notes

    - -

    -Edit docs/relnotes/X.Y.Z.html to add the sha256sums printed as part of "make -tarballs" in the previous step. Commit this change. -

    - -

    Push all commits and the tag created above

    - -

    -This is the first step that cannot easily be undone. The release is going -forward from this point: -

    - -
    -	git push origin X.Y --tags
    -
    - -

    Install the release files and signatures on the distribution server

    - -

    -The following commands can be used to copy the release archive files and -signatures to the freedesktop.org server: -

    - -
    -	scp MesaLib-X.Y.Z* people.freedesktop.org:
    -	ssh people.freedesktop.org
    -	cd /srv/ftp.freedesktop.org/pub/mesa
    -	mkdir X.Y.Z
    -	cd X.Y.Z
    -	mv ~/MesaLib-X.Y.Z* .
    -
    - -

    Back on mesa master, add the new release notes into the tree

    - -

    -Something like the following steps will do the trick: -

    - -
    -	cp docs/relnotes/X.Y.Z.html /tmp
    -        git checkout master
    -        cp /tmp/X.Y.Z.html docs/relnotes
    -        git add docs/relnotes/X.Y.Z.html
    -
    - -

    -Also, edit docs/relnotes.html to add a link to the new release notes, and edit -docs/index.html to add a news entry. Then commit and push: -

    - -
    -	git commit -a -m "docs: Import X.Y.Z release notes, add news item."
    -        git push origin
    -
    - -

    Update the mesa3d.org website

    - -

    -NOTE: The recent release managers have not been performing this step -themselves, but leaving this to Brian Paul, (who has access to the -sourceforge.net hosting for mesa3d.org). Brian is more than willing to grant -the permission necessary to future release managers to do this step on their -own. -

    - -

    -Update the web site by copying the docs/ directory's files to -/home/users/b/br/brianp/mesa-www/htdocs/ with: -
    - -sftp USERNAME,mesa3d@web.sourceforge.net - -

    - - -

    Announce the release

    -

    -Make an announcement on the mailing lists: - -mesa-dev@lists.freedesktop.org, -and -mesa-announce@lists.freedesktop.org - -Follow the template of previously-sent release announcements. The following -command can be used to generate the log of changes to be included in the -release announcement: - -

    -	git shortlog mesa-X.Y.Z-1..mesa-X.Y.Z
    -
    -

    - -

    Adding Extensions

    @@ -684,9 +47,11 @@

  • Add a new entry to the gl_extensions struct in mtypes.h + if the extension requires driver capabilities not already exposed by + another extension.
  • - Update the extensions.c file. + Add a new entry to the src/mesa/main/extensions_table.h file.
  • From this point, the best way to proceed is to find another extension, @@ -698,11 +63,17 @@ and attrib.c will most likely require new code.
  • + To determine if the new extension is active in the current context, + use the auto-generated _mesa_has_##name_str() function defined in + src/mesa/main/extensions.h. +
  • +
  • The dispatch tests check_table.cpp and dispatch_sanity.cpp should be updated with details about the new extensions functions. These tests are run using 'make check'
  • +

    diff -Nru mesa-12.0.6/docs/envvars.html mesa-17.0.7/docs/envvars.html --- mesa-12.0.6/docs/envvars.html 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/docs/envvars.html 2017-06-01 10:37:10.000000000 +0000 @@ -50,8 +50,19 @@ if the application generates a GL_INVALID_ENUM error, a corresponding error message indicating where the error occurred, and possibly why, will be printed to stderr.
    - If the value of MESA_DEBUG is 'FP' floating point arithmetic errors will - generate exceptions. + + For release builds, MESA_DEBUG defaults to off (no debug output). + + MESA_DEBUG accepts the following comma-separated list of named + flags, which adds extra behaviour to just set MESA_DEBUG=1: +
      +
    • silent - turn off debug messages. Only useful for debug builds.
    • +
    • flush - flush after each drawing command
    • +
    • incomplete_tex - extra debug messages when a texture is incomplete
    • +
    • incomplete_fbo - extra debug messages when a fbo is incomplete
    • +
    • context - create a debug context (see GLX_CONTEXT_DEBUG_BIT_ARB) and + print error and performance messages to stderr (or MESA_LOG_FILE).
    • +
  • MESA_LOG_FILE - specifies a file name for logging all errors, warnings, etc., rather than stderr
  • MESA_TEX_PROG - if set, implement conventional texture env modes with @@ -144,11 +155,10 @@
  • bat - emit batch information
  • pix - emit messages about pixel operations
  • buf - emit messages about buffer objects
  • -
  • reg - emit messages about regions
  • fbo - emit messages about framebuffers
  • fs - dump shader assembly for fragment shaders
  • gs - dump shader assembly for geometry shaders
  • -
  • sync - emit messages about synchronization
  • +
  • sync - after sending each batch, emit a message and wait for that batch to finish rendering
  • prim - emit messages about drawing primitives
  • vert - emit messages about vertex assembly
  • dri - emit messages about the DRI interface
  • @@ -163,11 +173,22 @@
  • blorp - emit messages about the blorp operations (blits & clears)
  • nodualobj - suppress generation of dual-object geometry shader code
  • optimizer - dump shader assembly to files at each optimization pass and iteration that make progress
  • +
  • ann - annotate IR in assembly dumps
  • +
  • no8 - don't generate SIMD8 fragment shader
  • vec4 - force vec4 mode in vertex shader
  • spill_fs - force spilling of all registers in the scalar backend (useful to debug spilling code)
  • spill_vec4 - force spilling of all registers in the vec4 backend (useful to debug spilling code)
  • +
  • cs - dump shader assembly for compute shaders
  • +
  • hex - print instruction hex dump with the disassembly
  • +
  • nocompact - disable instruction compaction
  • +
  • tcs - dump shader assembly for tessellation control shaders
  • +
  • tes - dump shader assembly for tessellation evaluation shaders
  • +
  • l3 - emit messages about the new L3 state during transitions
  • +
  • do32 - generate compute shader SIMD32 programs even if workgroup size doesn't exceed the SIMD16 limit
  • norbc - disable single sampled render buffer compression
  • +
  • INTEL_PRECISE_TRIG - if set to 1, true or yes, then the driver prefers + accuracy over performance in trig functions.
  • @@ -198,8 +219,12 @@
  • GALLIUM_HUD_TOGGLE_SIGNAL - toggle visibility via user specified signal. Especially useful to toggle hud at specific points of application and disable for unencumbered viewing the rest of the time. For example, set - GALLIUM_HUD_VISIBLE to false and GALLIUM_HUD_SIGNAL_TOGGLE to 10 (SIGUSR1). + GALLIUM_HUD_VISIBLE to false and GALLIUM_HUD_TOGGLE_SIGNAL to 10 (SIGUSR1). Use kill -10 to toggle the hud as desired. +
  • GALLIUM_HUD_DUMP_DIR - specifies a directory for writing the displayed + hud values into files. +
  • GALLIUM_DRIVER - useful in combination with LIBGL_ALWAYS_SOFTWARE=1 for + choosing one of the software renderers "softpipe", "llvmpipe" or "swr".
  • GALLIUM_LOG_FILE - specifies a file for logging all errors, warnings, etc. rather than stderr.
  • GALLIUM_PRINT_OPTIONS - if non-zero, print all the Gallium environment @@ -216,6 +241,21 @@ See src/mesa/state_tracker/st_debug.c for other options. +

    Clover state tracker environment variables

    + +
      +
    • CLOVER_EXTRA_BUILD_OPTIONS - allows specifying additional compiler and linker + options. Specified options are appended after the options set by the OpenCL + program in clBuildProgram. +
    • CLOVER_EXTRA_COMPILE_OPTIONS - allows specifying additional compiler + options. Specified options are appended after the options set by the OpenCL + program in clCompileProgram. +
    • CLOVER_EXTRA_LINK_OPTIONS - allows specifying additional linker + options. Specified options are appended after the options set by the OpenCL + program in clLinkProgram. +
    + +

    Softpipe driver environment variables

    • SOFTPIPE_DUMP_FS - if set, the softpipe driver will print fragment shaders diff -Nru mesa-12.0.6/docs/faq.html mesa-17.0.7/docs/faq.html --- mesa-12.0.6/docs/faq.html 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/docs/faq.html 2017-06-01 10:37:10.000000000 +0000 @@ -57,7 +57,7 @@
      • See the DRI website for more information.
      • -
      • See intellinuxgraphics.org +
      • See 01.org for more information about Intel drivers.
      • See nouveau.freedesktop.org for more information about Nouveau drivers.
      • diff -Nru mesa-12.0.6/docs/features.txt mesa-17.0.7/docs/features.txt --- mesa-12.0.6/docs/features.txt 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/docs/features.txt 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,337 @@ +# Status of OpenGL extensions in Mesa + +Here's how to read this file: + +all DONE: , ... + All the extensions are done for the given list of drivers. + +DONE + The extension is done for Mesa and no implementation is necessary on the + driver-side. + +DONE () + The extension is done for Mesa and all the drivers in the "all DONE" list. + +DONE (, ...) + The extension is done for Mesa, all the drivers in the "all DONE" list, and + all the drivers in the brackets. + +in progress + The extension is started but not finished yet. + +not started + The extension isn't started yet. + +# OpenGL Core and Compatibility context support + +OpenGL 3.1 and later versions are only supported with the Core profile. +There are no plans to support GL_ARB_compatibility. The last supported OpenGL +version with all deprecated features is 3.0. Some of the later GL features +are exposed in the 3.0 context as extensions. + + +Feature Status +------------------------------------------------------- ------------------------ + +GL 3.0, GLSL 1.30 --- all DONE: freedreno, i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr + + glBindFragDataLocation, glGetFragDataLocation DONE + GL_NV_conditional_render (Conditional rendering) DONE () + GL_ARB_map_buffer_range (Map buffer subranges) DONE () + GL_ARB_color_buffer_float (Clamping controls) DONE () + GL_ARB_texture_float (Float textures, renderbuffers) DONE () + GL_EXT_packed_float DONE () + GL_EXT_texture_shared_exponent DONE () + GL_ARB_depth_buffer_float (Float depth buffers) DONE () + GL_ARB_framebuffer_object (Framebuffer objects) DONE () + GL_ARB_half_float_pixel DONE (all drivers) + GL_ARB_half_float_vertex DONE () + GL_EXT_texture_integer DONE () + GL_EXT_texture_array DONE () + GL_EXT_draw_buffers2 (Per-buffer blend and masks) DONE () + GL_EXT_texture_compression_rgtc DONE () + GL_ARB_texture_rg DONE () + GL_EXT_transform_feedback (Transform feedback) DONE () + GL_ARB_vertex_array_object (Vertex array objects) DONE () + GL_EXT_framebuffer_sRGB (sRGB framebuffer format) DONE () + glClearBuffer commands DONE + glGetStringi command DONE + glTexParameterI, glGetTexParameterI commands DONE + glVertexAttribI commands DONE + Depth format cube textures DONE () + GLX_ARB_create_context (GLX 1.4 is required) DONE + Multisample anti-aliasing DONE (freedreno (*), llvmpipe (*), softpipe (*), swr (*)) + +(*) freedreno, llvmpipe, softpipe, and swr have fake Multisample anti-aliasing support + + +GL 3.1, GLSL 1.40 --- all DONE: freedreno, i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr + + Forward compatible context support/deprecations DONE () + GL_ARB_draw_instanced (Instanced drawing) DONE () + GL_ARB_copy_buffer (Buffer copying) DONE () + GL_NV_primitive_restart (Primitive restart) DONE () + 16 vertex texture image units DONE () + GL_ARB_texture_buffer_object (Texture buffer objs) DONE (for OpenGL 3.1 contexts) + GL_ARB_texture_rectangle (Rectangular textures) DONE () + GL_ARB_uniform_buffer_object (Uniform buffer objs) DONE () + GL_EXT_texture_snorm (Signed normalized textures) DONE () + + +GL 3.2, GLSL 1.50 --- all DONE: i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe + + Core/compatibility profiles DONE + Geometry shaders DONE () + GL_ARB_vertex_array_bgra (BGRA vertex order) DONE (freedreno, swr) + GL_ARB_draw_elements_base_vertex (Base vertex offset) DONE (freedreno, swr) + GL_ARB_fragment_coord_conventions (Frag shader coord) DONE (freedreno, swr) + GL_ARB_provoking_vertex (Provoking vertex) DONE (freedreno, swr) + GL_ARB_seamless_cube_map (Seamless cubemaps) DONE (freedreno, swr) + GL_ARB_texture_multisample (Multisample textures) DONE (swr) + GL_ARB_depth_clamp (Frag depth clamp) DONE (freedreno, swr) + GL_ARB_sync (Fence objects) DONE (freedreno, swr) + GLX_ARB_create_context_profile DONE + + +GL 3.3, GLSL 3.30 --- all DONE: i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe + + GL_ARB_blend_func_extended DONE (freedreno/a3xx, swr) + GL_ARB_explicit_attrib_location DONE (all drivers that support GLSL) + GL_ARB_occlusion_query2 DONE (freedreno, swr) + GL_ARB_sampler_objects DONE (all drivers) + GL_ARB_shader_bit_encoding DONE (freedreno, swr) + GL_ARB_texture_rgb10_a2ui DONE (freedreno, swr) + GL_ARB_texture_swizzle DONE (freedreno, swr) + GL_ARB_timer_query DONE (swr) + GL_ARB_instanced_arrays DONE (freedreno, swr) + GL_ARB_vertex_type_2_10_10_10_rev DONE (freedreno, swr) + + +GL 4.0, GLSL 4.00 --- all DONE: i965/hsw+, nvc0, r600, radeonsi + + GL_ARB_draw_buffers_blend DONE (freedreno, i965/gen6+, nv50, llvmpipe, softpipe, swr) + GL_ARB_draw_indirect DONE (i965/gen7+, llvmpipe, softpipe, swr) + GL_ARB_gpu_shader5 DONE (i965/gen7+) + - 'precise' qualifier DONE + - Dynamically uniform sampler array indices DONE (softpipe) + - Dynamically uniform UBO array indices DONE () + - Implicit signed -> unsigned conversions DONE + - Fused multiply-add DONE () + - Packing/bitfield/conversion functions DONE (softpipe) + - Enhanced textureGather DONE (softpipe) + - Geometry shader instancing DONE (llvmpipe, softpipe) + - Geometry shader multiple streams DONE () + - Enhanced per-sample shading DONE () + - Interpolation functions DONE () + - New overload resolution rules DONE + GL_ARB_gpu_shader_fp64 DONE (i965/hsw+, llvmpipe, softpipe) + GL_ARB_sample_shading DONE (i965/gen6+, nv50) + GL_ARB_shader_subroutine DONE (i965/gen6+, nv50, llvmpipe, softpipe, swr) + GL_ARB_tessellation_shader DONE (i965/gen7+) + GL_ARB_texture_buffer_object_rgb32 DONE (i965/gen6+, llvmpipe, softpipe, swr) + GL_ARB_texture_cube_map_array DONE (i965/gen6+, nv50, llvmpipe, softpipe) + GL_ARB_texture_gather DONE (i965/gen6+, nv50, llvmpipe, softpipe, swr) + GL_ARB_texture_query_lod DONE (i965, nv50, softpipe) + GL_ARB_transform_feedback2 DONE (i965/gen7+, nv50, llvmpipe, softpipe, swr) + GL_ARB_transform_feedback3 DONE (i965/gen7+, llvmpipe, softpipe, swr) + + +GL 4.1, GLSL 4.10 --- all DONE: i965/hsw+, nvc0, r600, radeonsi + + GL_ARB_ES2_compatibility DONE (i965, nv50, llvmpipe, softpipe, swr) + GL_ARB_get_program_binary DONE (0 binary formats) + GL_ARB_separate_shader_objects DONE (all drivers) + GL_ARB_shader_precision DONE (i965/hsw+, all drivers that support GLSL 4.10) + GL_ARB_vertex_attrib_64bit DONE (i965/hsw+, llvmpipe, softpipe) + GL_ARB_viewport_array DONE (i965, nv50, llvmpipe, softpipe) + + +GL 4.2, GLSL 4.20 -- all DONE: i965/hsw+, nvc0, radeonsi + + GL_ARB_texture_compression_bptc DONE (i965, r600) + GL_ARB_compressed_texture_pixel_storage DONE (all drivers) + GL_ARB_shader_atomic_counters DONE (i965, softpipe) + GL_ARB_texture_storage DONE (all drivers) + GL_ARB_transform_feedback_instanced DONE (i965, nv50, r600, llvmpipe, softpipe, swr) + GL_ARB_base_instance DONE (i965, nv50, r600, llvmpipe, softpipe, swr) + GL_ARB_shader_image_load_store DONE (i965, softpipe) + GL_ARB_conservative_depth DONE (all drivers that support GLSL 1.30) + GL_ARB_shading_language_420pack DONE (all drivers that support GLSL 1.30) + GL_ARB_shading_language_packing DONE (all drivers) + GL_ARB_internalformat_query DONE (i965, nv50, r600, llvmpipe, softpipe, swr) + GL_ARB_map_buffer_alignment DONE (all drivers) + + +GL 4.3, GLSL 4.30 -- all DONE: i965/gen8+, nvc0, radeonsi + + GL_ARB_arrays_of_arrays DONE (all drivers that support GLSL 1.30) + GL_ARB_ES3_compatibility DONE (all drivers that support GLSL 3.30) + GL_ARB_clear_buffer_object DONE (all drivers) + GL_ARB_compute_shader DONE (i965, softpipe) + GL_ARB_copy_image DONE (i965, nv50, r600, softpipe, llvmpipe) + GL_KHR_debug DONE (all drivers) + GL_ARB_explicit_uniform_location DONE (all drivers that support GLSL) + GL_ARB_fragment_layer_viewport DONE (i965, nv50, r600, llvmpipe, softpipe) + GL_ARB_framebuffer_no_attachments DONE (i965, r600, softpipe) + GL_ARB_internalformat_query2 DONE (all drivers) + GL_ARB_invalidate_subdata DONE (all drivers) + GL_ARB_multi_draw_indirect DONE (i965, r600, llvmpipe, softpipe, swr) + GL_ARB_program_interface_query DONE (all drivers) + GL_ARB_robust_buffer_access_behavior DONE (i965) + GL_ARB_shader_image_size DONE (i965, softpipe) + GL_ARB_shader_storage_buffer_object DONE (i965, softpipe) + GL_ARB_stencil_texturing DONE (i965/hsw+, nv50, r600, llvmpipe, softpipe, swr) + GL_ARB_texture_buffer_range DONE (nv50, i965, r600, llvmpipe) + GL_ARB_texture_query_levels DONE (all drivers that support GLSL 1.30) + GL_ARB_texture_storage_multisample DONE (all drivers that support GL_ARB_texture_multisample) + GL_ARB_texture_view DONE (i965, nv50, r600, llvmpipe, softpipe, swr) + GL_ARB_vertex_attrib_binding DONE (all drivers) + + +GL 4.4, GLSL 4.40 -- all DONE: i965/gen8+, nvc0, radeonsi + + GL_MAX_VERTEX_ATTRIB_STRIDE DONE (all drivers) + GL_ARB_buffer_storage DONE (i965, nv50, r600) + GL_ARB_clear_texture DONE (i965, nv50, r600) + GL_ARB_enhanced_layouts DONE (i965, nv50, llvmpipe, softpipe) + - compile-time constant expressions DONE + - explicit byte offsets for blocks DONE + - forced alignment within blocks DONE + - specified vec4-slot component numbers DONE (i965, nv50, llvmpipe, softpipe) + - specified transform/feedback layout DONE + - input/output block locations DONE + GL_ARB_multi_bind DONE (all drivers) + GL_ARB_query_buffer_object DONE (i965/hsw+) + GL_ARB_texture_mirror_clamp_to_edge DONE (i965, nv50, r600, llvmpipe, softpipe, swr) + GL_ARB_texture_stencil8 DONE (i965/hsw+, nv50, r600, llvmpipe, softpipe, swr) + GL_ARB_vertex_type_10f_11f_11f_rev DONE (i965, nv50, r600, llvmpipe, softpipe, swr) + +GL 4.5, GLSL 4.50 -- all DONE: nvc0, radeonsi + + GL_ARB_ES3_1_compatibility DONE (i965/hsw+) + GL_ARB_clip_control DONE (i965, nv50, r600, llvmpipe, softpipe, swr) + GL_ARB_conditional_render_inverted DONE (i965, nv50, r600, llvmpipe, softpipe, swr) + GL_ARB_cull_distance DONE (i965, nv50, llvmpipe, softpipe, swr) + GL_ARB_derivative_control DONE (i965, nv50, r600) + GL_ARB_direct_state_access DONE (all drivers) + GL_ARB_get_texture_sub_image DONE (all drivers) + GL_ARB_shader_texture_image_samples DONE (i965, nv50, r600) + GL_ARB_texture_barrier DONE (i965, nv50, r600) + GL_KHR_context_flush_control DONE (all - but needs GLX/EGL extension to be useful) + GL_KHR_robustness DONE (i965) + GL_EXT_shader_integer_mix DONE (all drivers that support GLSL) + +These are the extensions cherry-picked to make GLES 3.1 +GLES3.1, GLSL ES 3.1 -- all DONE: i965/hsw+, nvc0, radeonsi + + GL_ARB_arrays_of_arrays DONE (all drivers that support GLSL 1.30) + GL_ARB_compute_shader DONE (i965/gen7+, softpipe) + GL_ARB_draw_indirect DONE (i965/gen7+, r600, llvmpipe, softpipe, swr) + GL_ARB_explicit_uniform_location DONE (all drivers that support GLSL) + GL_ARB_framebuffer_no_attachments DONE (i965/gen7+, r600, softpipe) + GL_ARB_program_interface_query DONE (all drivers) + GL_ARB_shader_atomic_counters DONE (i965/gen7+, softpipe) + GL_ARB_shader_image_load_store DONE (i965/gen7+, softpipe) + GL_ARB_shader_image_size DONE (i965/gen7+, softpipe) + GL_ARB_shader_storage_buffer_object DONE (i965/gen7+, softpipe) + GL_ARB_shading_language_packing DONE (all drivers) + GL_ARB_separate_shader_objects DONE (all drivers) + GL_ARB_stencil_texturing DONE (nv50, r600, llvmpipe, softpipe, swr) + GL_ARB_texture_multisample (Multisample textures) DONE (i965/gen7+, nv50, r600, llvmpipe, softpipe) + GL_ARB_texture_storage_multisample DONE (all drivers that support GL_ARB_texture_multisample) + GL_ARB_vertex_attrib_binding DONE (all drivers) + GS5 Enhanced textureGather DONE (i965/gen7+, r600) + GS5 Packing/bitfield/conversion functions DONE (i965/gen6+, r600) + GL_EXT_shader_integer_mix DONE (all drivers that support GLSL) + + Additional functionality not covered above: + glMemoryBarrierByRegion DONE + glGetTexLevelParameter[fi]v - needs updates DONE + glGetBooleani_v - restrict to GLES enums + gl_HelperInvocation support DONE (i965, r600) + +GLES3.2, GLSL ES 3.2 -- all DONE: i965/gen9+ + + GL_EXT_color_buffer_float DONE (all drivers) + GL_KHR_blend_equation_advanced DONE (i965, nvc0) + GL_KHR_debug DONE (all drivers) + GL_KHR_robustness DONE (i965, nvc0, radeonsi) + GL_KHR_texture_compression_astc_ldr DONE (i965/gen9+) + GL_OES_copy_image DONE (all drivers) + GL_OES_draw_buffers_indexed DONE (all drivers that support GL_ARB_draw_buffers_blend) + GL_OES_draw_elements_base_vertex DONE (all drivers) + GL_OES_geometry_shader DONE (i965/hsw+, nvc0, radeonsi) + GL_OES_gpu_shader5 DONE (all drivers that support GL_ARB_gpu_shader5) + GL_OES_primitive_bounding_box DONE (i965/gen7+, nvc0, radeonsi) + GL_OES_sample_shading DONE (i965, nvc0, r600, radeonsi) + GL_OES_sample_variables DONE (i965, nvc0, r600, radeonsi) + GL_OES_shader_image_atomic DONE (all drivers that support GL_ARB_shader_image_load_store) + GL_OES_shader_io_blocks DONE (All drivers that support GLES 3.1) + GL_OES_shader_multisample_interpolation DONE (i965, nvc0, r600, radeonsi) + GL_OES_tessellation_shader DONE (all drivers that support GL_ARB_tessellation_shader) + GL_OES_texture_border_clamp DONE (all drivers) + GL_OES_texture_buffer DONE (i965, nvc0, radeonsi) + GL_OES_texture_cube_map_array DONE (i965/hsw+, nvc0, radeonsi) + GL_OES_texture_stencil8 DONE (all drivers that support GL_ARB_texture_stencil8) + GL_OES_texture_storage_multisample_2d_array DONE (all drivers that support GL_ARB_texture_multisample) + +Khronos, ARB, and OES extensions that are not part of any OpenGL or OpenGL ES version: + + GL_ARB_bindless_texture started (airlied) + GL_ARB_cl_event not started + GL_ARB_compute_variable_group_size DONE (nvc0, radeonsi) + GL_ARB_ES3_2_compatibility DONE (i965/gen8+) + GL_ARB_fragment_shader_interlock not started + GL_ARB_gl_spirv not started + GL_ARB_gpu_shader_int64 started (airlied for core and Gallium, idr for i965) + GL_ARB_indirect_parameters DONE (nvc0, radeonsi) + GL_ARB_parallel_shader_compile not started, but Chia-I Wu did some related work in 2014 + GL_ARB_pipeline_statistics_query DONE (i965, nvc0, radeonsi, softpipe, swr) + GL_ARB_post_depth_coverage DONE (i965) + GL_ARB_robustness_isolation not started + GL_ARB_sample_locations not started + GL_ARB_seamless_cubemap_per_texture DONE (i965, nvc0, radeonsi, r600, softpipe, swr) + GL_ARB_shader_atomic_counter_ops DONE (nvc0, radeonsi, softpipe) + GL_ARB_shader_ballot not started + GL_ARB_shader_clock DONE (i965/gen7+) + GL_ARB_shader_draw_parameters DONE (i965, nvc0, radeonsi) + GL_ARB_shader_group_vote DONE (nvc0) + GL_ARB_shader_stencil_export DONE (i965/gen9+, radeonsi, softpipe, llvmpipe, swr) + GL_ARB_shader_viewport_layer_array DONE (i965/gen6+) + GL_ARB_sparse_buffer not started + GL_ARB_sparse_texture not started + GL_ARB_sparse_texture2 not started + GL_ARB_sparse_texture_clamp not started + GL_ARB_texture_filter_minmax not started + GL_ARB_transform_feedback_overflow_query not started + GL_KHR_blend_equation_advanced_coherent DONE (i965/gen9+) + GL_KHR_no_error not started + GL_KHR_texture_compression_astc_hdr DONE (core only) + GL_KHR_texture_compression_astc_sliced_3d not started + GL_OES_depth_texture_cube_map DONE (all drivers that support GLSL 1.30+) + GL_OES_EGL_image DONE (all drivers) + GL_OES_EGL_image_external_essl3 not started + GL_OES_required_internalformat not started - GLES2 extension based on OpenGL ES 3.0 feature + GL_OES_surfaceless_context DONE (all drivers) + GL_OES_texture_compression_astc DONE (core only) + GL_OES_texture_float DONE (i965, r300, r600, radeonsi, nv30, nv50, nvc0, softpipe, llvmpipe) + GL_OES_texture_float_linear DONE (i965, r300, r600, radeonsi, nv30, nv50, nvc0, softpipe, llvmpipe) + GL_OES_texture_half_float DONE (i965, r300, r600, radeonsi, nv30, nv50, nvc0, softpipe, llvmpipe) + GL_OES_texture_half_float_linear DONE (i965, r300, r600, radeonsi, nv30, nv50, nvc0, softpipe, llvmpipe) + GL_OES_texture_view not started - based on GL_ARB_texture_view + GL_OES_viewport_array DONE (i965, nvc0, radeonsi) + GLX_ARB_context_flush_control not started + GLX_ARB_robustness_application_isolation not started + GLX_ARB_robustness_share_group_isolation not started + +The following extensions are not part of any OpenGL or OpenGL ES version, and +we DO NOT WANT implementations of these extensions for Mesa. + + GL_ARB_geometry_shader4 Superseded by GL 3.2 geometry shaders + GL_ARB_matrix_palette Superseded by GL_ARB_vertex_program + GL_ARB_shading_language_include Not interesting + GL_ARB_shadow_ambient Superseded by GL_ARB_fragment_program + GL_ARB_vertex_blend Superseded by GL_ARB_vertex_program + +More info about these features and the work involved can be found at +http://dri.freedesktop.org/wiki/MissingFunctionality diff -Nru mesa-12.0.6/docs/GL3.txt mesa-17.0.7/docs/GL3.txt --- mesa-12.0.6/docs/GL3.txt 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/docs/GL3.txt 1970-01-01 00:00:00.000000000 +0000 @@ -1,277 +0,0 @@ -# Status of OpenGL extensions in Mesa - -Here's how to read this file: - -all DONE: , ... - All the extensions are done for the given list of drivers. - -DONE - The extension is done for Mesa and no implementation is necessary on the - driver-side. - -DONE () - The extension is done for Mesa and all the drivers in the "all DONE" list. - -DONE (, ...) - The extension is done for Mesa, all the drivers in the "all DONE" list, and - all the drivers in the brackets. - -in progress - The extension is started but not finished yet. - -not started - The extension isn't started yet. - -# OpenGL Core and Compatibility context support - -OpenGL 3.1 and later versions are only supported with the Core profile. -There are no plans to support GL_ARB_compatibility. The last supported OpenGL -version with all deprecated features is 3.0. Some of the later GL features -are exposed in the 3.0 context as extensions. - - -Feature Status -------------------------------------------------------- ------------------------ - -GL 3.0, GLSL 1.30 --- all DONE: i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr - - glBindFragDataLocation, glGetFragDataLocation DONE - GL_NV_conditional_render (Conditional rendering) DONE () - GL_ARB_map_buffer_range (Map buffer subranges) DONE () - GL_ARB_color_buffer_float (Clamping controls) DONE () - GL_ARB_texture_float (Float textures, renderbuffers) DONE () - GL_EXT_packed_float DONE () - GL_EXT_texture_shared_exponent DONE () - GL_ARB_depth_buffer_float (Float depth buffers) DONE () - GL_ARB_framebuffer_object (Framebuffer objects) DONE () - GL_ARB_half_float_pixel DONE (all drivers) - GL_ARB_half_float_vertex DONE () - GL_EXT_texture_integer DONE () - GL_EXT_texture_array DONE () - GL_EXT_draw_buffers2 (Per-buffer blend and masks) DONE () - GL_EXT_texture_compression_rgtc DONE () - GL_ARB_texture_rg DONE () - GL_EXT_transform_feedback (Transform feedback) DONE () - GL_ARB_vertex_array_object (Vertex array objects) DONE () - GL_EXT_framebuffer_sRGB (sRGB framebuffer format) DONE () - glClearBuffer commands DONE - glGetStringi command DONE - glTexParameterI, glGetTexParameterI commands DONE - glVertexAttribI commands DONE - Depth format cube textures DONE () - GLX_ARB_create_context (GLX 1.4 is required) DONE - Multisample anti-aliasing DONE (llvmpipe (*), softpipe (*), swr (*)) - -(*) llvmpipe, softpipe, and swr have fake Multisample anti-aliasing support - - -GL 3.1, GLSL 1.40 --- all DONE: i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr - - Forward compatible context support/deprecations DONE () - GL_ARB_draw_instanced (Instanced drawing) DONE () - GL_ARB_copy_buffer (Buffer copying) DONE () - GL_NV_primitive_restart (Primitive restart) DONE () - 16 vertex texture image units DONE () - GL_ARB_texture_buffer_object (Texture buffer objs) DONE (for OpenGL 3.1 contexts) - GL_ARB_texture_rectangle (Rectangular textures) DONE () - GL_ARB_uniform_buffer_object (Uniform buffer objs) DONE () - GL_EXT_texture_snorm (Signed normalized textures) DONE () - - -GL 3.2, GLSL 1.50 --- all DONE: i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe - - Core/compatibility profiles DONE - Geometry shaders DONE () - GL_ARB_vertex_array_bgra (BGRA vertex order) DONE (swr) - GL_ARB_draw_elements_base_vertex (Base vertex offset) DONE (swr) - GL_ARB_fragment_coord_conventions (Frag shader coord) DONE (swr) - GL_ARB_provoking_vertex (Provoking vertex) DONE (swr) - GL_ARB_seamless_cube_map (Seamless cubemaps) DONE (swr) - GL_ARB_texture_multisample (Multisample textures) DONE (swr) - GL_ARB_depth_clamp (Frag depth clamp) DONE (swr) - GL_ARB_sync (Fence objects) DONE (swr) - GLX_ARB_create_context_profile DONE - - -GL 3.3, GLSL 3.30 --- all DONE: i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe - - GL_ARB_blend_func_extended DONE (swr) - GL_ARB_explicit_attrib_location DONE (all drivers that support GLSL) - GL_ARB_occlusion_query2 DONE (swr) - GL_ARB_sampler_objects DONE (all drivers) - GL_ARB_shader_bit_encoding DONE (swr) - GL_ARB_texture_rgb10_a2ui DONE (swr) - GL_ARB_texture_swizzle DONE (swr) - GL_ARB_timer_query DONE (swr) - GL_ARB_instanced_arrays DONE (swr) - GL_ARB_vertex_type_2_10_10_10_rev DONE (swr) - - -GL 4.0, GLSL 4.00 --- all DONE: nvc0, r600, radeonsi - - GL_ARB_draw_buffers_blend DONE (i965, nv50, llvmpipe, softpipe, swr) - GL_ARB_draw_indirect DONE (i965, llvmpipe, softpipe, swr) - GL_ARB_gpu_shader5 DONE (i965) - - 'precise' qualifier DONE - - Dynamically uniform sampler array indices DONE (softpipe) - - Dynamically uniform UBO array indices DONE () - - Implicit signed -> unsigned conversions DONE - - Fused multiply-add DONE () - - Packing/bitfield/conversion functions DONE (softpipe) - - Enhanced textureGather DONE (softpipe) - - Geometry shader instancing DONE (llvmpipe, softpipe) - - Geometry shader multiple streams DONE () - - Enhanced per-sample shading DONE () - - Interpolation functions DONE () - - New overload resolution rules DONE - GL_ARB_gpu_shader_fp64 DONE (i965/gen8+, llvmpipe, softpipe) - GL_ARB_sample_shading DONE (i965, nv50) - GL_ARB_shader_subroutine DONE (i965, nv50, llvmpipe, softpipe, swr) - GL_ARB_tessellation_shader DONE (i965) - GL_ARB_texture_buffer_object_rgb32 DONE (i965, llvmpipe, softpipe, swr) - GL_ARB_texture_cube_map_array DONE (i965, nv50, llvmpipe, softpipe) - GL_ARB_texture_gather DONE (i965, nv50, llvmpipe, softpipe, swr) - GL_ARB_texture_query_lod DONE (i965, nv50, softpipe) - GL_ARB_transform_feedback2 DONE (i965, nv50, llvmpipe, softpipe, swr) - GL_ARB_transform_feedback3 DONE (i965, nv50, llvmpipe, softpipe, swr) - - -GL 4.1, GLSL 4.10 --- all DONE: nvc0, r600, radeonsi - - GL_ARB_ES2_compatibility DONE (i965, nv50, llvmpipe, softpipe, swr) - GL_ARB_get_program_binary DONE (0 binary formats) - GL_ARB_separate_shader_objects DONE (all drivers) - GL_ARB_shader_precision DONE (all drivers that support GLSL 4.10) - GL_ARB_vertex_attrib_64bit DONE (i965/gen8+, llvmpipe, softpipe) - GL_ARB_viewport_array DONE (i965, nv50, llvmpipe, softpipe) - - -GL 4.2, GLSL 4.20 -- all DONE: radeonsi - - GL_ARB_texture_compression_bptc DONE (i965, nvc0, r600, radeonsi) - GL_ARB_compressed_texture_pixel_storage DONE (all drivers) - GL_ARB_shader_atomic_counters DONE (i965, nvc0, radeonsi, softpipe) - GL_ARB_texture_storage DONE (all drivers) - GL_ARB_transform_feedback_instanced DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr) - GL_ARB_base_instance DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr) - GL_ARB_shader_image_load_store DONE (i965, nvc0, radeonsi, softpipe) - GL_ARB_conservative_depth DONE (all drivers that support GLSL 1.30) - GL_ARB_shading_language_420pack DONE (all drivers that support GLSL 1.30) - GL_ARB_shading_language_packing DONE (all drivers) - GL_ARB_internalformat_query DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr) - GL_ARB_map_buffer_alignment DONE (all drivers) - - -GL 4.3, GLSL 4.30: - - GL_ARB_arrays_of_arrays DONE (all drivers that support GLSL 1.30) - GL_ARB_ES3_compatibility DONE (all drivers that support GLSL 3.30) - GL_ARB_clear_buffer_object DONE (all drivers) - GL_ARB_compute_shader DONE (i965, nvc0, radeonsi, softpipe) - GL_ARB_copy_image DONE (i965, nv50, nvc0, r600, radeonsi) - GL_KHR_debug DONE (all drivers) - GL_ARB_explicit_uniform_location DONE (all drivers that support GLSL) - GL_ARB_fragment_layer_viewport DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe) - GL_ARB_framebuffer_no_attachments DONE (i965, nvc0, r600, radeonsi, softpipe) - GL_ARB_internalformat_query2 DONE (all drivers) - GL_ARB_invalidate_subdata DONE (all drivers) - GL_ARB_multi_draw_indirect DONE (i965, nvc0, r600, radeonsi, llvmpipe, softpipe, swr) - GL_ARB_program_interface_query DONE (all drivers) - GL_ARB_robust_buffer_access_behavior DONE (i965, nvc0, radeonsi) - GL_ARB_shader_image_size DONE (i965, nvc0, radeonsi, softpipe) - GL_ARB_shader_storage_buffer_object DONE (i965, nvc0, radeonsi, softpipe) - GL_ARB_stencil_texturing DONE (i965/gen8+, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr) - GL_ARB_texture_buffer_range DONE (nv50, nvc0, i965, r600, radeonsi, llvmpipe) - GL_ARB_texture_query_levels DONE (all drivers that support GLSL 1.30) - GL_ARB_texture_storage_multisample DONE (all drivers that support GL_ARB_texture_multisample) - GL_ARB_texture_view DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr) - GL_ARB_vertex_attrib_binding DONE (all drivers) - - -GL 4.4, GLSL 4.40: - - GL_MAX_VERTEX_ATTRIB_STRIDE DONE (all drivers) - GL_ARB_buffer_storage DONE (i965, nv50, nvc0, r600, radeonsi) - GL_ARB_clear_texture DONE (i965, nv50, nvc0) - GL_ARB_enhanced_layouts in progress (Timothy) - - compile-time constant expressions DONE - - explicit byte offsets for blocks DONE - - forced alignment within blocks DONE - - specified vec4-slot component numbers in progress - - specified transform/feedback layout DONE - - input/output block locations DONE - GL_ARB_multi_bind DONE (all drivers) - GL_ARB_query_buffer_object DONE (i965/hsw+, nvc0) - GL_ARB_texture_mirror_clamp_to_edge DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr) - GL_ARB_texture_stencil8 DONE (i965/gen8+, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr) - GL_ARB_vertex_type_10f_11f_11f_rev DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr) - -GL 4.5, GLSL 4.50: - - GL_ARB_ES3_1_compatibility DONE (nvc0, radeonsi) - GL_ARB_clip_control DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr) - GL_ARB_conditional_render_inverted DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr) - GL_ARB_cull_distance DONE (i965, nv50, nvc0, llvmpipe, softpipe) - GL_ARB_derivative_control DONE (i965, nv50, nvc0, r600, radeonsi) - GL_ARB_direct_state_access DONE (all drivers) - GL_ARB_get_texture_sub_image DONE (all drivers) - GL_ARB_shader_texture_image_samples DONE (i965, nv50, nvc0, r600, radeonsi) - GL_ARB_texture_barrier DONE (i965, nv50, nvc0, r600, radeonsi) - GL_KHR_context_flush_control DONE (all - but needs GLX/EGL extension to be useful) - GL_KHR_robustness DONE (i965) - GL_EXT_shader_integer_mix DONE (all drivers that support GLSL) - -These are the extensions cherry-picked to make GLES 3.1 -GLES3.1, GLSL ES 3.1 - GL_ARB_arrays_of_arrays DONE (all drivers that support GLSL 1.30) - GL_ARB_compute_shader DONE (i965, nvc0, radeonsi, softpipe) - GL_ARB_draw_indirect DONE (i965, nvc0, r600, radeonsi, llvmpipe, softpipe, swr) - GL_ARB_explicit_uniform_location DONE (all drivers that support GLSL) - GL_ARB_framebuffer_no_attachments DONE (i965, nvc0, r600, radeonsi, softpipe) - GL_ARB_program_interface_query DONE (all drivers) - GL_ARB_shader_atomic_counters DONE (i965, nvc0, radeonsi, softpipe) - GL_ARB_shader_image_load_store DONE (i965, nvc0, radeonsi, softpipe) - GL_ARB_shader_image_size DONE (i965, nvc0, radeonsi, softpipe) - GL_ARB_shader_storage_buffer_object DONE (i965, nvc0, radeonsi, softpipe) - GL_ARB_shading_language_packing DONE (all drivers) - GL_ARB_separate_shader_objects DONE (all drivers) - GL_ARB_stencil_texturing DONE (i965/gen8+, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe, swr) - GL_ARB_texture_multisample (Multisample textures) DONE (i965, nv50, nvc0, r600, radeonsi, llvmpipe, softpipe) - GL_ARB_texture_storage_multisample DONE (all drivers that support GL_ARB_texture_multisample) - GL_ARB_vertex_attrib_binding DONE (all drivers) - GS5 Enhanced textureGather DONE (i965, nvc0, r600, radeonsi) - GS5 Packing/bitfield/conversion functions DONE (i965, nvc0, r600, radeonsi) - GL_EXT_shader_integer_mix DONE (all drivers that support GLSL) - - Additional functionality not covered above: - glMemoryBarrierByRegion DONE - glGetTexLevelParameter[fi]v - needs updates DONE - glGetBooleani_v - restrict to GLES enums - gl_HelperInvocation support DONE (i965, nvc0, r600, radeonsi) - -GLES3.2, GLSL ES 3.2 - GL_EXT_color_buffer_float DONE (all drivers) - GL_KHR_blend_equation_advanced not started - GL_KHR_debug DONE (all drivers) - GL_KHR_robustness DONE (i965) - GL_KHR_texture_compression_astc_ldr DONE (i965/gen9+) - GL_OES_copy_image DONE (i965) - GL_OES_draw_buffers_indexed DONE (all drivers that support GL_ARB_draw_buffers_blend) - GL_OES_draw_elements_base_vertex DONE (all drivers) - GL_OES_geometry_shader started (idr) - GL_OES_gpu_shader5 DONE (all drivers that support GL_ARB_gpu_shader5) - GL_OES_primitive_bounding_box not started - GL_OES_sample_shading DONE (i965, nvc0, r600, radeonsi) - GL_OES_sample_variables DONE (i965, nvc0, r600, radeonsi) - GL_OES_shader_image_atomic DONE (all drivers that support GL_ARB_shader_image_load_store) - GL_OES_shader_io_blocks DONE (i965/gen8+, nvc0, radeonsi) - GL_OES_shader_multisample_interpolation DONE (i965, nvc0, r600, radeonsi) - GL_OES_tessellation_shader started (Ken) - GL_OES_texture_border_clamp DONE (all drivers) - GL_OES_texture_buffer DONE (i965, nvc0, radeonsi) - GL_OES_texture_cube_map_array not started (based on GL_ARB_texture_cube_map_array, which is done for all drivers) - GL_OES_texture_stencil8 DONE (all drivers that support GL_ARB_texture_stencil8) - GL_OES_texture_storage_multisample_2d_array DONE (all drivers that support GL_ARB_texture_multisample) - -More info about these features and the work involved can be found at -http://dri.freedesktop.org/wiki/MissingFunctionality diff -Nru mesa-12.0.6/docs/helpwanted.html mesa-17.0.7/docs/helpwanted.html --- mesa-12.0.6/docs/helpwanted.html 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/docs/helpwanted.html 2017-06-01 10:37:10.000000000 +0000 @@ -56,8 +56,8 @@ Common To-Do lists:

        diff -Nru mesa-12.0.6/docs/index.html mesa-17.0.7/docs/index.html --- mesa-12.0.6/docs/index.html 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/docs/index.html 2017-06-01 10:37:10.000000000 +0000 @@ -16,6 +16,72 @@

        News

        +

        January 5, 2017

        +

        +Mesa 13.0.3 is released. +This is a bug-fix release. +

        + +

        December 5, 2016

        +

        +Mesa 12.0.5 is released. +This is a bug-fix release. +
        +NOTE: It is anticipated that 12.0.5 will be the final release in the 12.0 +series. Users of 12.0 are encouraged to migrate to the 13.0 series in order +to obtain future fixes. +

        + +

        November 28, 2016

        +

        +Mesa 13.0.2 is released. +This is a bug-fix release. +

        + +

        November 14, 2016

        +

        +Mesa 13.0.1 is released. +This is a bug-fix release. +

        + +

        November 10, 2016

        +

        +Mesa 12.0.4 is released. +This is a bug-fix release. +

        + +

        November 1, 2016

        +

        +Mesa 13.0.0 is released. This is a +new development release. See the release notes for more information +about the release. +

        + +

        September 15, 2016

        +

        +Mesa 12.0.3 is released. +This is a bug-fix release. +

        + +

        September 2, 2016

        +

        +Mesa 12.0.2 is released. +This is a bug-fix release. +

        + +

        July 8, 2016

        +

        +Mesa 12.0.1 is released. +This is a bug-fix release, resolving build issues in the r600 and +radeonsi drivers. +

        + +

        +Mesa 12.0.0 is released. This is a +new development release. See the release notes for more information +about the release. +

        +

        May 9, 2016

        Mesa 11.1.4 and diff -Nru mesa-12.0.6/docs/install.html mesa-17.0.7/docs/install.html --- mesa-12.0.6/docs/install.html 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/docs/install.html 2017-06-01 10:37:10.000000000 +0000 @@ -24,7 +24,7 @@

    • Building with autoconf (Linux/Unix/X11)
    • Building with SCons (Windows/Linux) -
    • Building for other systems +
    • Building with AOSP (Android)
    • Library Information
    • Building OpenGL programs with pkg-config @@ -33,62 +33,85 @@

      1. Prerequisites for building

      1.1 General

      + +

      +Build system. +

      + +
        +
      • Autoconf is required when building on *nix platforms. +
      • SCons is required for building on +Windows and optional for Linux (it's an alternative to autoconf/automake.) +
      • +
      • Android Build system when building as native Android component. Autoconf +is used when when building ARC. +
      • +
      + + +

      +The following compilers are known to work, if you know of others or you're +willing to maintain support for other compiler get in touch. +

      + +
        +
      • GCC 4.2.0 or later (some parts of Mesa may require later versions) +
      • clang - exact minimum requirement is currently unknown. +
      • Microsoft Visual Studio 2013 Update 4 or later is required, for building on Windows. +
      + + +

      +Third party/extra tools. +
      +Note: These should not be required, when building from a release tarball. If +you think you've spotted a bug let developers know by filing a +bug report. +

      + +
      • Python - Python is required. Version 2.6.4 or later should work.
      • -
      • Python Mako module - Python Mako module is required. Version 0.3.4 or later should work.
      • -
        -
      • SCons is required for building on -Windows and optional for Linux (it's an alternative to autoconf/automake.) -
      • -
        -
      • lex / yacc - for building the GLSL compiler. -
        -
        -On Linux systems, flex and bison are used. -Versions 2.5.35 and 2.4.1, respectively, (or later) should work. -
        -
        +
      • lex / yacc - for building the Mesa IR and GLSL compiler. +
        +On Linux systems, flex and bison versions 2.5.35 and 2.4.1, respectively, +(or later) should work. On Windows with MinGW, install flex and bison with:
        mingw-get install msys-flex msys-bison
        For MSVC on Windows, install Win flex-bison. -
      • -
        -
      • For building on Windows, Microsoft Visual Studio 2013 or later is required. -
      • +
      +

      Note: Some versions can be buggy (eg. flex 2.6.2) so do try others if things fail.

      -

      1.2 For DRI and hardware acceleration

      +

      1.2 Requirements

      -The following are required for DRI-based hardware acceleration with Mesa: +The requirements depends on the features selected at configure stage. +Check/install the respective -devel package as prompted by the configure error +message.

      -
        -
      • -dri2proto version 2.6 or later -
      • libDRM latest version -
      • Xorg server version 1.5 or later -
      • Linux 2.6.28 or later -

      -If you're using a fedora distro the following command should install all -the needed dependencies: +Here are some common ways to retrieve most/all of the dependencies based on +the packaging tool used by your distro.

      +
      -  sudo yum install flex bison imake libtool xorg-x11-proto-devel libdrm-devel \
      -  gcc-c++ xorg-x11-server-devel libXi-devel libXmu-devel libXdamage-devel git \
      -  expat-devel llvm-devel python-mako
      +  zypper source-install --build-deps-only Mesa # openSUSE/SLED/SLES
      +  yum-builddep mesa # yum Fedora, OpenSuse(?)
      +  dnf builddep mesa # dnf Fedora
      +  apt-get build-dep mesa # Debian and derivatives
      +  ... # others
       
      -

      2. Building with autoconf (Linux/Unix/X11)

      @@ -139,22 +162,30 @@

    Put them all in the same directory to test them. + +Additional information is available in README.WIN32. +

    -

    4. Building for other systems

    +

    4. Building with AOSP (Android)

    -Documentation for other environments (some may be very out of date): +Currently one can build Mesa for Android as part of the AOSP project, yet +your experience might vary.

    - +

    +In order to achieve that one should update their local manifest to point to the +upstream repo, set the approapriate BOARD_GPU_DRIVERS and build the +libGLES_mesa library. +

    +

    +FINISHME: Improve on the instructions add references to Rob H repos/Jenkins, +Android-x86 and/or other resources. +

    5. Library Information

    diff -Nru mesa-12.0.6/docs/intro.html mesa-17.0.7/docs/intro.html --- mesa-12.0.6/docs/intro.html 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/docs/intro.html 2017-06-01 10:37:10.000000000 +0000 @@ -173,6 +173,27 @@

    +

    Version 12.x features

    +

    +Version 12.x of Mesa implements the OpenGL 4.3 API, but not all drivers +support OpenGL 4.3. +

    + + +

    Version 11.x features

    +

    +Version 11.x of Mesa implements the OpenGL 4.1 API, but not all drivers +support OpenGL 4.1. +

    + + +

    Version 10.x features

    +

    +Version 10.x of Mesa implements the OpenGL 3.3 API, but not all drivers +support OpenGL 3.3. +

    + +

    Version 9.x features

    Version 9.x of Mesa implements the OpenGL 3.1 API. @@ -182,6 +203,10 @@ features added since the Mesa 8.0 release are GL_ARB_texture_buffer_object and GL_ARB_uniform_buffer_object.

    +

    +Version 9.0 of Mesa also included the first release of the Clover state +tracker for OpenCL. +

    Version 8.x features

    diff -Nru mesa-12.0.6/docs/mangling.html mesa-17.0.7/docs/mangling.html --- mesa-12.0.6/docs/mangling.html 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/docs/mangling.html 2017-06-01 10:37:10.000000000 +0000 @@ -2,7 +2,7 @@ - Function Name Mangling + GL Function Name Mangling @@ -14,7 +14,7 @@
    -

    Function Name Mangling

    +

    GL Function Name Mangling

    If you want to use both Mesa and another OpenGL library in the same @@ -25,12 +25,11 @@

    -To do this, recompile Mesa with the compiler flag -DUSE_MGL_NAMESPACE. -Add the flag to CFLAGS in the configuration file which you want to use. -For example: +This option is supported only with the autoconf build. To use it add +--enable-mangling to your configure line.

    -CFLAGS += -DUSE_MGL_NAMESPACE
    +./configure --enable-mangling ...
     
    diff -Nru mesa-12.0.6/docs/releasing.html mesa-17.0.7/docs/releasing.html --- mesa-12.0.6/docs/releasing.html 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/docs/releasing.html 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,509 @@ + + + + + Releasing process + + + + +
    +

    The Mesa 3D Graphics Library

    +
    + + +
    + +

    Releasing process

    + + + +

    Overview

    + +

    +This document uses the convention X.Y.Z for the release number with X.Y being +the stable branch name. +
    +Mesa provides feature and bugfix releases. Former use zero as patch version (Z), +while the latter have a non-zero one. +

    + +

    +For example: +

    +
    +	Mesa 10.1.0 - 10.1 branch, feature
    +	Mesa 10.1.4 - 10.1 branch, bugfix
    +	Mesa 12.0.0 - 12.0 branch, feature
    +	Mesa 12.0.2 - 12.0 branch, bugfix
    +
    + +

    Release schedule

    + +

    +Releases should happen on Fridays. Delays can occur although those should be keep +to a minimum. +

    + +

    Feature releases

    +
      +
    • Available approximatelly every three months. +
    • Initial timeplan available 2-4 weeks before the planned branchpoint (rc1) +on the mesa-announce@ mailing list. +
    • A pre-release announcement should be available +approximatelly 24 hours before the final (non-rc) release. +
    + +

    Stable releases

    +
      +
    • Normally available once every two weeks. +
    • Only the latest branch has releases. See note below. +
    • A pre-release announcement should be available +approximatelly 48 hours before the actual release. +
    + +

    +Note: There is one or two releases overlap when changing branches. For example: +
    +The final release from the 12.0 series Mesa 12.0.5 will be out around the same +time (or shortly after) 13.0.1 is out. +

    + +

    Cherry-picking and testing

    + +

    +Commits nominated for the active branch are picked as based on the +criteria as +described in the same section. + +

    +Maintainer is responsible for testing in various possible permutations of +the autoconf and scons build. +

    + +

    Cherry-picking and build/check testing

    + +

    Done continuously up-to the pre-release announcement.

    + +

    +As an exception, patches can be applied up-to the last ~1h before the actual +release. This is made only with explicit permission/request, +and the patch must be very well contained. Thus it cannot +affect more than one driver/subsystem. +

    +

    +Currently Ilia Mirkin and AMD devs have requested "permanent" exception. +

    + + +
      +
    • make distcheck, scons and scons check must pass +
    • Testing with different version of system components - LLVM and others is also +performed where possible. +
    +

    +Achieved by combination of local ad-hoc scripts and AppVeyor plus Travis-CI, +the latter as part of their Github integration. +

    + +

    Regression/functionality testing

    + +

    +Less often (once or twice), shortly before the pre-release announcement. +Ensure that testing is redone if Intel devs have requested an exception, as per above. +

    +
      +
    • no regressions should be observed for Piglit/dEQP/CTS/Vulkan on Intel platforms +
    • no regressions should be observed for Piglit using the swrast, softpipe +and llvmpipe drivers +
    +

    +Currently testing is performed courtesy of the Intel OTC team and their Jenkins CI setup. Check with the Intel team over IRC how to get things setup. +

    + + +

    Making a branchpoint

    + +

    +A branchpoint is made such that new development can continue in parallel to +stabilisation and bugfixing. +

    + +

    +Note: Before doing a branch ensure that basic build and make check +testing is done and there are little to-no issues. +
    +Ideally all of those should be tackled already. +

    + +

    +Check if the version number is going to remain as, alternatively + git mv docs/relnotes/{current,new}.html as appropriate. +

    + +

    +To setup the branchpoint: +

    +
    +	git checkout master # make sure we're in master first
    +	git tag -s X.Y-branchpoint -m "Mesa X.Y branchpoint"
    +	git checkout -b X.Y
    +	git push origin X.Y-branchpoint X.Y
    +
    + +

    +Now go to +Bugzilla and add the new Mesa version X.Y. +

    +

    +Check for rare that there are no distribution breaking changes and revert them +if needed. Extremely rare - we had only one case so far (see +commit 2ced8eb136528914e1bf4e000dea06a9d53c7e04). +

    +

    +Proceed to release -rc1. +

    + +

    Pre-release announcement

    + +

    +It comes shortly after outstanding patches in the respective branch are pushed. +Developers can check, in brief, what's the status of their patches. They, +alongside very early testers, are strongly encouraged to test the branch and +report any regressions. +
    +It is followed by a brief period (normally 24 or 48 hours) before the actual +release is made. +

    + +

    Terminology used

    +
    • Nominated
    +

    +Patch that is nominated but yet to to merged in the patch queue/branch. +

    + +
    • Queued
    +

    +Patch is in the queue/branch and will feature in the next release. +Barring reported regressions or objections from developers. +

    + +
    • Rejected
    +

    +Patch does not fit the +criteria and +is followed by a brief information. +
    +The release maintainer is human so if you believe you've spotted a mistake do +let them know. +

    + +

    Format/template

    +
    +Subject: [ANNOUNCE] Mesa X.Y.Z release candidate
    +To: mesa-announce@...
    +Cc: mesa-dev@...
    +
    +Hello list,
    +
    +The candidate for the Mesa X.Y.Z is now available. Currently we have:
    + - NUMBER queued
    + - NUMBER nominated (outstanding)
    + - and NUMBER rejected patches
    +
    +BRIEF SUMMARY OF CHANGES
    +
    +Take a look at section "Mesa stable queue" for more information.
    +
    +
    +Testing reports/general approval
    +--------------------------------
    +Any testing reports (or general approval of the state of the branch) will be
    +greatly appreciated.
    +
    +The plan is to have X.Y.Z this DAY (DATE), around or shortly after TIME.
    +
    +If you have any questions or suggestions - be that about the current patch
    +queue or otherwise, please go ahead.
    +
    +
    +Trivial merge conflicts
    +-----------------------
    +List of commits where manual intervention was required.
    +Keep the authors in the CC list.
    +
    +commit SHA
    +Author: AUTHOR
    +
    +    COMMIT SUMMARY
    +
    +    CHERRY PICKED FROM
    +
    +
    +For example:
    +
    +commit 990f395e007c3204639daa34efc3049f350ee819
    +Author: Emil Velikov <emil.velikov@collabora.com>
    +
    +    anv: automake: cleanup the generated json file during make clean
    +
    +    (cherry picked from commit 8df581520a823564be0ab5af7dbb7d501b1c9670)
    +
    +
    +Cheers,
    +Emil
    +
    +
    +Mesa stable queue
    +-----------------
    +
    +Nominated (NUMBER)
    +==================
    +
    +AUTHOR (NUMBER):
    +      SHA     COMMIT SUMMARY
    +
    +For example:
    +
    +Dave Airlie (1):
    +      2de85eb radv: fix texturesamples to handle single sample case
    +
    +
    +Queued (NUMBER)
    +===============
    +
    +AUTHOR (NUMBER):
    +      COMMIT SUMMARY
    +
    +
    +Rejected (NUMBER)
    +=================
    +
    +Rejected (11)
    +=============
    +
    +AUTHOR (NUMBER):
    +      SHA     COMMIT SUMMARY
    +
    +Reason: ...
    +
    + +

    Making a new release

    + +

    +These are the instructions for making a new Mesa release. +

    + +

    Get latest source files

    +

    +Ensure the latest code is available - both in your local master and the +relevant branch. +

    + +

    Perform basic testing

    +

    +Most of the testing should already be done during the +cherry-pick and +pre-announce stages. + +So we do a quick 'touch test' +

      +
    • make distcheck (you can omit this if you're not using --dist below) +
    • scons (from release tarball) +
    • the produced binaries work +
    + +

    +Here is one solution that I've been using. +

    + +
    +	git clean -fXd; git clean -nxd
    +	read # quick cross check any outstanding files
    +	export __version=`cat VERSION`
    +	export __mesa_root=../
    +	export __build_root=./foo
    +	chmod 755 -fR $__build_root; rm -rf $__build_root
    +	mkdir -p $__build_root && cd $__build_root
    +
    +	$__mesa_root/autogen.sh --enable-llvm-shared-libs && make -j2 distcheck
    +
    +	# Build check the tarballs (scons)
    +	tar -xaf mesa-$__version.tar.xz && cd mesa-$__version && scons && cd ..
    +
    +	# Test the automake binaries
    +	rm -rf cd mesa-$__version
    +	tar -xaf mesa-$__version.tar.xz && cd mesa-$__version
    +	./configure \
    +		--with-dri-drivers=i965,swrast \
    +		--with-gallium-drivers=swrast \
    +		--with-vulkan-drivers=intel \
    +		--enable-llvm-shared-libs \
    +		--enable-gallium-llvm \
    +		--enable-glx-tls \
    +		--enable-gbm \
    +		--enable-egl \
    +		--with-egl-platforms=x11,drm,wayland
    +	make -j2 && DESTDIR=`pwd`/test make -j6 install
    +	export LD_LIBRARY_PATH=`pwd`/test/usr/local/lib/
    +	export LIBGL_DRIVERS_PATH=`pwd`/test/usr/local/lib/dri/
    +	export LIBGL_DEBUG=verbose
    +	glxinfo | egrep -o "Mesa.*"
    +	glxgears
    +	es2_info | egrep "GL_VERSION|GL_RENDERER"
    +	es2gears_x11
    +	export LIBGL_ALWAYS_SOFTWARE=1
    +	glxinfo | egrep -o "Mesa.*|Gallium.*"
    +	glxgears
    +	es2_info | egrep "GL_VERSION|GL_RENDERER"
    +	es2gears_x11
    +	export LIBGL_ALWAYS_SOFTWARE=1
    +	export GALLIUM_DRIVER=softpipe
    +	glxinfo | egrep -o "Mesa.*|Gallium.*"
    +	glxgears
    +	es2_info | egrep "GL_VERSION|GL_RENDERER"
    +	es2gears_x11
    +	# Smoke test DOTA2
    +	unset LD_LIBRARY_PATH
    +	unset LIBGL_DRIVERS_PATH
    +	unset LIBGL_DEBUG
    +	unset LIBGL_ALWAYS_SOFTWARE
    +	export VK_ICD_FILENAMES=`pwd`/src/intel/vulkan/dev_icd.json
    +	steam steam://rungameid/570  -vconsole -vulkan
    +
    + +

    Update version in file VERSION

    + +

    +Increment the version contained in the file VERSION at Mesa's top-level, then +commit this change. +

    + +

    Create release notes for the new release

    + +

    +Create a new file docs/relnotes/X.Y.Z.html, (follow the style of the previous +release notes). Note that the sha256sums section of the release notes should +be empty (TBD) at this point. +

    + +

    +Two scripts are available to help generate portions of the release notes: + +

    +	./bin/bugzilla_mesa.sh
    +	./bin/shortlog_mesa.sh
    +
    + +

    +The first script identifies commits that reference bugzilla bugs and obtains +the descriptions of those bugs from bugzilla. The second script generates a +log of all commits. In both cases, HTML-formatted lists are printed to stdout +to be included in the release notes. +

    + +

    +Commit these changes and push the branch. +

    +
    +	git push origin HEAD
    +
    + + +

    Use the release.sh script from xorg util-macros

    + +

    +Ensure that the mesa git tree is clean via git clean -fXd and +start the release process. +

    +
    +	../relative/path/to/release.sh . # append --dist if you've already done distcheck above
    +
    + +

    +Pay close attention to the prompts as you might be required to enter your GPG +and SSH passphrase(s) to sign and upload the files, respectively. +

    + +

    Add the sha256sums to the release notes

    + +

    +Edit docs/relnotes/X.Y.Z.html to add the sha256sums as availabe in the mesa-X.Y.Z.announce template. Commit this change. +

    + +

    Back on mesa master, add the new release notes into the tree

    + +

    +Something like the following steps will do the trick: +

    + +
    +	git cherry-pick -x X.Y~1
    +	git cherry-pick -x X.Y
    +
    + +

    +Also, edit docs/relnotes.html to add a link to the new release notes, and edit +docs/index.html to add a news entry. Then commit and push: +

    + +
    +	git commit -as -m "docs: add news item and link release notes for X.Y.Z"
    +	git push origin master X.Y
    +
    + + +

    Announce the release

    +

    +Use the generated template during the releasing process. +

    + + +

    Update the mesa3d.org website

    + +

    +NOTE: The recent release managers have not been performing this step +themselves, but leaving this to Brian Paul, (who has access to the +sourceforge.net hosting for mesa3d.org). Brian is more than willing to grant +the permission necessary to future release managers to do this step on their +own. +

    + +

    +Update the web site by copying the docs/ directory's files to +/home/users/b/br/brianp/mesa-www/htdocs/ with: +
    + +sftp USERNAME,mesa3d@web.sourceforge.net + +

    + + +

    Update Bugzilla

    + +

    +Parse through the bugreports as listed in the docs/relnotes/X.Y.Z.html +document. +
    +If there's outstanding action, close the bug referencing the commit ID which +addresses the bug and mention the Mesa version that has the fix. +

    + +

    +Note: the above is not applicable to all the reports, so use common sense. +

    + + +
    + + diff -Nru mesa-12.0.6/docs/relnotes/12.0.1.html mesa-17.0.7/docs/relnotes/12.0.1.html --- mesa-12.0.6/docs/relnotes/12.0.1.html 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/docs/relnotes/12.0.1.html 2017-06-01 10:37:10.000000000 +0000 @@ -16,8 +16,6 @@

    Mesa 12.0.1 Release Notes / July 8, 2016

    -

    Mesa 12.0.1 Release Notes / July 8, 2016

    -

    Mesa 12.0.1 is a bug fix release which fixes bugs found since the 12.0.1 release.

    diff -Nru mesa-12.0.6/docs/relnotes/12.0.6.html mesa-17.0.7/docs/relnotes/12.0.6.html --- mesa-12.0.6/docs/relnotes/12.0.6.html 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/docs/relnotes/12.0.6.html 1970-01-01 00:00:00.000000000 +0000 @@ -1,147 +0,0 @@ - - - - - Mesa Release Notes - - - - -
    -

    The Mesa 3D Graphics Library

    -
    - - -
    - -

    Mesa 12.0.6 Release Notes / January 23, 2016

    - -

    -Mesa 12.0.6 is a bug fix release which fixes bugs found since the 12.0.5 release. -

    -

    -Mesa 12.0.6 implements the OpenGL 4.3 API, but the version reported by -glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) / -glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used. -Some drivers don't support all the features required in OpenGL 4.3. OpenGL -4.3 is only available if requested at context creation -because compatibility contexts are not supported. -

    - - -

    SHA256 checksums

    -
    -TBD
    -
    - - -

    New features

    -

    None

    - - -

    Bug fixes

    - -

    This list is likely incomplete.

    - -
      - -
    • Bug 92234 - [BDW] GPU hang in Shogun2
    • - -
    • Bug 95130 - Derivatives of gl_Color wrong when helper pixels used
    • - -
    • Bug 98329 - [dEQP, EGL, SKL, BDW, BSW] dEQP-EGL.functional.image.render_multiple_contexts.gles2_renderbuffer_depth16_depth_buffer
    • - -
    • Bug 99030 - [HSW, regression] transform feedback fails on Linux 4.8
    • - -
    • Bug 99354 - [G71] "Assertion `bkref' failed" reproducible with glmark2
    • - -
    - -

    Changes

    - -

    Chad Versace (3):

    -
      -
    • i965/mt: Disable aux surfaces after making miptree shareable
    • -
    • i965/mt: Disable HiZ when sharing depth buffer externally (v2)
    • -
    • anv: Handle vkGetPhysicalDeviceQueueFamilyProperties with count == 0
    • -
    - -

    Emil Velikov (5):

    -
      -
    • docs: add sha256 checksums for 12.0.5
    • -
    • get-typod-pick-list.sh: add new script
    • -
    • automake: use shared llvm libs for make distcheck
    • -
    • egl/wayland: use the destroy_window_callback for swrast
    • -
    • Update version to 12.0.6
    • -
    - -

    Fredrik Höglund (1):

    -
      -
    • dri3: Fix MakeCurrent without a default framebuffer
    • -
    - -

    Ilia Mirkin (1):

    -
      -
    • nouveau: take extra push space into account for pushbuf_space calls
    • -
    - -

    Jason Ekstrand (19):

    -
      -
    • spirv/nir: Fix some texture opcode asserts
    • -
    • spirv/nir: Add support for shadow samplers that return vec4
    • -
    • spirv/nir: Properly handle gather components
    • -
    • anv/pipeline: Set binding_table.gather_texture_start
    • -
    • nir: Add a helper for determining the type of a texture source
    • -
    • nir/lower_tex: Add some helpers for working with tex sources
    • -
    • nir/lower_tex: Add support for lowering coordinate offsets
    • -
    • i965/nir: Enable NIR lowering of txf and rect offsets
    • -
    • i965: Get rid of the do_lower_unnormalized_offsets pass
    • -
    • spirv/nir: Don't increment coord_components for array lod queries
    • -
    • anv/image: Assert that the image format is actually supported
    • -
    • spirv/nir: Move opcode selection higher up in handle_texture
    • -
    • spirv/nir: Refactor type handling in handle_texture
    • -
    • nir/spirv: Refactor coordinate handling in handle_texture
    • -
    • spirv/nir: Handle texture projectors
    • -
    • spirv/nir: Add support for ImageQuerySamples
    • -
    • anv/device: Return the right error for failed maps
    • -
    • anv/device: Implicitly unmap memory objects in FreeMemory
    • -
    • anv/descriptor_set: Write the state offset in the surface state free list.
    • -
    - -

    Kenneth Graunke (2):

    -
      -
    • spirv: Move cursor before calling vtn_ssa_value() in phi 2nd pass.
    • -
    • i965: Properly flush in hsw_pause_transform_feedback().
    • -
    - -

    Marek Olšák (6):

    -
      -
    • cso: don't release sampler states that are bound
    • -
    • radeonsi: always restore sampler states when unbinding sampler views
    • -
    • radeonsi: fix incorrect FMASK checking in bind_sampler_states
    • -
    • radeonsi: disable CE on SI + AMDGPU
    • -
    • radeonsi: disable the constant engine (CE) on Carrizo and Stoney
    • -
    • gallium/radeon: fix the draw-calls HUD query
    • -
    - -

    Matt Turner (3):

    -
      -
    • i965/fs: Rename opt_copy_propagate -> opt_copy_propagation.
    • -
    • i965/fs: Add unit tests for copy propagation pass.
    • -
    • i965/fs: Reject copy propagation into SEL if not min/max.
    • -
    - -

    Michel Dänzer (1):

    -
      -
    • cso: Don't restore nr_samplers in cso_restore_fragment_samplers
    • -
    - -

    Nicolai Hähnle (1):

    -
      -
    • radeonsi: enable WQM in PS prolog when needed
    • -
    - - -
    - - diff -Nru mesa-12.0.6/docs/relnotes/13.0.0.html mesa-17.0.7/docs/relnotes/13.0.0.html --- mesa-12.0.6/docs/relnotes/13.0.0.html 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/docs/relnotes/13.0.0.html 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,311 @@ + + + + + Mesa Release Notes + + + + +
    +

    The Mesa 3D Graphics Library

    +
    + + +
    + +

    Mesa 13.0.0 Release Notes / November 1, 2016

    + +

    +Mesa 13.0.0 is a new development release. +People who are concerned with stability and reliability should stick +with a previous release or wait for Mesa 13.0.1. +

    +

    +Mesa 13.0.0 implements the OpenGL 4.4 API, but the version reported by +glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) / +glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used. +Some drivers don't support all the features required in OpenGL 4.4. OpenGL +4.4 is only available if requested at context creation +because compatibility contexts are not supported. +

    + + +

    SHA256 checksums

    +
    +4a54d7cdc1a94a8dae05a75ccff48356406d51b0d6a64cbdc641c266e3e008eb  mesa-13.0.0.tar.gz
    +94edb4ebff82066a68be79d9c2627f15995e1fe10f67ab3fc63deb842027d727  mesa-13.0.0.tar.xz
    +
    + + +

    New features

    + +

    +Note: some of the new features are only available with certain drivers. +

    + +
      +
    • OpenGL ES 3.1 on i965/hsw
    • +
    • OpenGL ES 3.2 on i965/gen9+ (Skylake and later)
    • +
    • GL_ARB_ES3_1_compatibility on i965
    • +
    • GL_ARB_ES3_2_compatibility on i965/gen8+
    • +
    • GL_ARB_clear_texture on r600, radeonsi
    • +
    • GL_ARB_compute_variable_group_size on nvc0, radeonsi
    • +
    • GL_ARB_cull_distance on radeonsi
    • +
    • GL_ARB_enhanced_layouts on i965, nv50, nvc0, radeonsi, llvmpipe, softpipe
    • +
    • GL_ARB_indirect_parameters on radeonsi
    • +
    • GL_ARB_query_buffer_object on radeonsi
    • +
    • GL_ARB_shader_draw_parameters on radeonsi
    • +
    • GL_ARB_shader_group_vote on nvc0
    • +
    • GL_ARB_shader_viewport_layer_array on i965/gen6+
    • +
    • GL_ARB_stencil_texturing on i965/hsw
    • +
    • GL_ARB_texture_stencil8 on i965/hsw
    • +
    • GL_EXT_window_rectangles on nv50, nvc0
    • +
    • GL_KHR_blend_equation_advanced on i965
    • +
    • GL_KHR_robustness on nvc0, radeonsi
    • +
    • GL_KHR_texture_compression_astc_sliced_3d on i965
    • +
    • GL_OES_copy_image on nv50, nvc0, r600, radeonsi, softpipe, llvmpipe
    • +
    • GL_OES_geometry_shader on i965/gen8+, nvc0, radeonsi
    • +
    • GL_OES_primitive_bounding_box on i965/gen7+, nvc0, radeonsi
    • +
    • GL_OES_texture_cube_map_array on i965/gen8+, nvc0, radeonsi
    • +
    • GL_OES_tessellation_shader on i965/gen7+, nvc0, radeonsi
    • +
    • GL_OES_viewport_array on nvc0, radeonsi
    • +
    • GL_ANDROID_extension_pack_es31a on i965/gen9+
    • +
    + +

    Bug fixes

    + +
      + +
    • Bug 61907 - Indirect rendering of multi-texture vertex arrays broken
    • + +
    • Bug 69622 - eglTerminate then eglMakeCurrent crahes
    • + +
    • Bug 71759 - Intel driver fails with "intel_do_flush_locked failed: No such file or directory" if buffer imported with EGL_NATIVE_PIXMAP_KHR
    • + +
    • Bug 83036 - [ILK]Piglit spec_ARB_copy_image_arb_copy_image-formats fails
    • + +
    • Bug 89599 - symbol 'x86_64_entry_start' is already defined when building with LLVM/clang
    • + +
    • Bug 90513 - Odd gray and red flicker in The Talos Principle on GK104
    • + +
    • Bug 91342 - Very dark textures on some objects in indoors environments in Postal 2
    • + +
    • Bug 92306 - GL Excess demo renders incorrectly on nv43
    • + +
    • Bug 94148 - Framebuffer considered invalid when a draw call is done before glCheckFramebufferStatus
    • + +
    • Bug 94354 - R9285 Unigine Valley perf regression since radeonsi: use re-Z
    • + +
    • Bug 94561 - [llvmpipe] PIPE_CAP_VIDEO_MEMORY reports negative value on 32 bits (with 16GB ram)
    • + +
    • Bug 94627 - Game Risen on wine black grass
    • + +
    • Bug 94681 - dEQP-GLES31.functional.ssbo.layout.random.all_shared_buffer.23 takes 25 minutes to compile
    • + +
    • Bug 95000 - deqp: assert in dEQP-GLES3.functional.vertex_arrays.single_attribute.strides.fixed.user_ptr_stride17_components2_quads1
    • + +
    • Bug 95130 - Derivatives of gl_Color wrong when helper pixels used
    • + +
    • Bug 95246 - Segfault in glBindFramebuffer()
    • + +
    • Bug 95419 - [HSW][regression][bisect] RPG Maker game gives "invalid floating point operation" at startup
    • + +
    • Bug 95462 - [BXT,BSW] arb_gpu_shader_fp64 causes gpu hang
    • + +
    • Bug 95529 - [regression, bisected] Image corruption in Chrome
    • + +
    • Bug 96235 - st_nir.h:34: error: redefinition of typedef ‘nir_shader’
    • + +
    • Bug 96274 - [NVC0] Failure when compiling compute shader: Assertion `bb->getFirst()->serial <= bb->getExit()->serial' failed
    • + +
    • Bug 96285 - Mesa build broken
    • + +
    • Bug 96299 - [vulkan] 64 regressions due to mesa d5f2f32
    • + +
    • Bug 96343 - oom since st/mesa: implement PBO downloads for ReadPixels
    • + +
    • Bug 96346 - [SNB,CTS] es2-cts.gtf.gl.atan regression
    • + +
    • Bug 96349 - [CTS,SKL,BSW,BDW,KBL,BXT] es31-cts.arrays_of_arrays.interactionuniformbuffers3
    • + +
    • Bug 96351 - [CTS,SKL,KBL,BXT] es2-cts.gtf.gl2extensiontests.egl_image.egl_image
    • + +
    • Bug 96358 - SSO: wrong interface validation between GS and VS (regresion due to latest gles 3.1)
    • + +
    • Bug 96425 - [bisected] occasional dark render in The Talos Principle
    • + +
    • Bug 96484 - [vulkan] deqp-vk.glsl.builtin.precision.sin / cos regression
    • + +
    • Bug 96504 - [vulkancts] compute tests crash
    • + +
    • Bug 96516 - [bisected: 482526] "clover: Update OpenCL version string to match OpenGL": clover's build fails because of missing git_sha1.h
    • + +
    • Bug 96528 - Location qualifier segfaults during shader compilation
    • + +
    • Bug 96541 - Tonga Unreal elemental bad rendering since radeonsi: Decompress DCC textures in a render feedback loop
    • + +
    • Bug 96565 - Clive Barker's Jericho displays strange,vivid colors when motion blur enabled
    • + +
    • Bug 96607 - [bisected] texture misrender / flicker in The Talos Principle on SKL
    • + +
    • Bug 96617 - gl_SecondaryFragDataEXT doesn't work for extended blend func
    • + +
    • Bug 96629 - dEQP-GLES2.functional.texture.completeness.cube.not_positive_level_0: Assertion `width >= 1' failed.
    • + +
    • Bug 96639 - st/mesa: transfer_map with too-high level with dEQP-GLES2.functional.texture.completeness.cube.extra_level
    • + +
    • Bug 96674 - [SNB, ILK] spec.ext_image_dma_buf_import.ext_image_dma_buf_import-sample_nv1
    • + +
    • Bug 96729 - Wrong shader compilation error message
    • + +
    • Bug 96762 - [radeonsi,apitrace] Firewatch: nothing rendered in scrollable (text) areas
    • + +
    • Bug 96765 - BindFragDataLocationIndexed on array fragment shader output.
    • + +
    • Bug 96770 - include/GL/mesa_glinterop.h:62: error: redefinition of typedef ‘GLXContext’
    • + +
    • Bug 96782 - [regression bisected] R600 fp64 and glsl-4.00 piglit failures
    • + +
    • Bug 96791 - Cannot use image from swapchains for sampling
    • + +
    • Bug 96825 - anv_device.c:31:27: fatal error: anv_timestamp.h: No such file or directory
    • + +
    • Bug 96835 - "gallium: Force blend color to 16-byte alignment" crash with "-march=native -O3" causes some 32bit games to crash
    • + +
    • Bug 96850 - Crucible tests fail for 32bit mesa
    • + +
    • Bug 96878 - [Bisected: cc2d0e6][HSW] "GPU HANG" msg after autologin to gnome-session
    • + +
    • Bug 96908 - [radeonsi] MSAA causes graphical artifacts
    • + +
    • Bug 96911 - webgl2 conformance2/textures/misc/tex-mipmap-levels.html crashes 12.1 Intel driver
    • + +
    • Bug 96949 - [regression] Piglit numSamples assertion failures with 9a23a177b90
    • + +
    • Bug 96950 - Another regression from bc4e0c486: vbo: Use a bitmask to track the active arrays in vbo_exec*.
    • + +
    • Bug 96971 - invariant qualifier is not valid for shader inputs
    • + +
    • Bug 97019 - [clover] build failure in llvm/codegen/native.cpp:129:52
    • + +
    • Bug 97032 - [BDW,SKL] piglit.spec.arb_gpu_shader5.arb_gpu_shader5-interpolateatcentroid-flat
    • + +
    • Bug 97033 - [BDW,SKL] piglit.spec.arb_gpu_shader_fp64.varying-packing.simple regressions
    • + +
    • Bug 97039 - The Talos Principle and Serious Sam 3 GPU faults
    • + +
    • Bug 97083 - [IVB,BYT] GPU hang on deqp-gles31.functional.separate.shader.random
    • + +
    • Bug 97140 - dd_draw.c:949:11: error: implicit declaration of function 'fmemopen' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
    • + +
    • Bug 97207 - [IVY BRIDGE] Fragment shader discard writing to depth
    • + +
    • Bug 97214 - X not running with error "Failed to make EGL context current"
    • + +
    • Bug 97225 - [i965 on HD4600 Haswell] xcom switch to ingame cinematics cause segmentation fault
    • + +
    • Bug 97231 - GL_DEPTH_CLAMP doesn't clamp to the far plane
    • + +
    • Bug 97233 - vkQuake VkSpecializationMapEntry related bug
    • + +
    • Bug 97260 - R9 290 low performance in Linux 4.7
    • + +
    • Bug 97267 - [BDW] GL45-CTS.texture_cube_map_array.sampling asserts inside brw_fs.cpp
    • + +
    • Bug 97278 - [vulkancts,HSW] all vulkancts tests assert on HSW
    • + +
    • Bug 97285 - Darkness in Dota 2 after Patch "Make Gallium's BlitFramebuffer follow the GL 4.4 sRGB rules"
    • + +
    • Bug 97286 - `make check` fails uniform-initializer-test
    • + +
    • Bug 97305 - Gallium: TBOs and images set the offset in elements, not bytes
    • + +
    • Bug 97307 - glsl/glcpp/tests/glcpp-test regression
    • + +
    • Bug 97309 - piglit.spec.glsl-1_30.compiler.switch-statement.switch-case-duplicated.vert regression
    • + +
    • Bug 97322 - GenerateMipmap creates wrong mipmap for sRGB texture
    • + +
    • Bug 97331 - glDrawElementsBaseVertex doesn't work in display list on i915
    • + +
    • Bug 97351 - DrawElementsBaseVertex with VBO ignores base vertex on Intel GMA 9xx in some cases
    • + +
    • Bug 97413 - BioShock Infinite crashes on startup with Mesa Git version, R7 370
    • + +
    • Bug 97426 - glScissor gives vertically inverted result
    • + +
    • Bug 97448 - [HSW] deqp-vk.api_.copy_and_blit.image_to_image_stencil regression
    • + +
    • Bug 97476 - Shader binaries should not be stored in the PipelineCache
    • + +
    • Bug 97477 - i915g: gl_FragCoord is always (0.0, max_y)
    • + +
    • Bug 97513 - clover reports wrong device pointer size
    • + +
    • Bug 97549 - [SNB, BXT] up to 40% perf drop from "loader/dri3: Overhaul dri3_update_num_back" commit
    • + +
    • Bug 97587 - make check nir/tests/control_flow_tests regression
    • + +
    • Bug 97761 - es2-cts.gtf.gl2extensiontests.egl_image_external.testsimpleunassociated crashes
    • + +
    • Bug 97773 - New Mesa master now results in warnings in glrender (and subsurfaces and simple-egl), black screen
    • + +
    • Bug 97779 - [regression, bisected][BDW, GPU hang] stuck on render ring, always reproducible
    • + +
    • Bug 97790 - Vulkan cts regressions due to 24be63066
    • + +
    • Bug 97804 - Later precision statement isn't overriding earlier one
    • + +
    • Bug 97808 - "tgsi/scan: don't set interp flags for inputs only used by INTERP instructions" causes glitches in wine with gallium nine
    • + +
    • Bug 97887 - llvm segfault in janusvr -render vive
    • + +
    • Bug 97894 - Crash in u_transfer_unmap_vtbl when unmapping a buffer mapped in different context
    • + +
    • Bug 97952 - /usr/include/string.h:518:12: error: exception specification in declaration does not match previous declaration
    • + +
    • Bug 97969 - [radeonsi, bisected: fb827c0] Video decoding shows green artifacts
    • + +
    • Bug 97976 - VCE regression BO to small for addr since winsys/amdgpu: enable buffer allocation from slabs
    • + +
    • Bug 98005 - VCE dual instance encoding inconsistent since st/va: enable dual instances encode by sync surface
    • + +
    • Bug 98025 - [radeonsi] incorrect primitive restart index used
    • + +
    • Bug 98128 - nir/tests/control_flow_tests.cpp:79:73: error: ‘nir_loop_first_cf_node’ was not declared in this scope
    • + +
    • Bug 98131 - Compiler should reject lowp/mediump qualifiers on atomic_uints
    • + +
    • Bug 98133 - GetSynciv should raise an error if bufSize < 0
    • + +
    • Bug 98134 - dEQP-GLES31.functional.debug.negative_coverage.get_error.buffer.draw_buffers wants a different GL error code
    • + +
    • Bug 98135 - dEQP-GLES31.functional.debug.negative_coverage.get_error.shader.transform_feedback_varyings wants a different GL error code
    • + +
    • Bug 98167 - [vulkan, radv] missing libgcrypt and openssl devel results in linker error in libvulkan_common
    • + +
    • Bug 98172 - Concurrent call to glClientWaitSync results in segfault in one of the waiters.
    • + +
    • Bug 98244 - dEQP: textureOffset(sampler2DArrayShadow, ...) should not exist.
    • + +
    • Bug 98264 - Build broken for i965 due to multiple deifnitions of intelFenceExtension
    • + +
    • Bug 98307 - "st/glsl_to_tgsi: explicitly track all input and output declaration" broke flightgear colors on rs780
    • + +
    • Bug 98326 - [dEQP, EGL] pbuffer depth/stencil tests fail
    • + +
    • Bug 98415 - Vulkan Driver JSON file contains incorrect field
    • + +
    • Bug 98431 - UnrealEngine v4 demos startup fails to blorp blit assert
    • + +
    + + +

    Changes

    + +Mesa no longer depends on libudev. + +
    + + diff -Nru mesa-12.0.6/docs/relnotes/13.0.1.html mesa-17.0.7/docs/relnotes/13.0.1.html --- mesa-12.0.6/docs/relnotes/13.0.1.html 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/docs/relnotes/13.0.1.html 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,188 @@ + + + + + Mesa Release Notes + + + + +
    +

    The Mesa 3D Graphics Library

    +
    + + +
    + +

    Mesa 13.0.1 Release Notes / November 14, 2016

    + +

    +Mesa 13.0.1 is a bug fix release which fixes bugs found since the 13.0.0 release. +

    +

    +Mesa 13.0.1 implements the OpenGL 4.4 API, but the version reported by +glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) / +glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used. +Some drivers don't support all the features required in OpenGL 4.4. OpenGL +4.4 is only available if requested at context creation +because compatibility contexts are not supported. +

    + + +

    SHA256 checksums

    +
    +7cbb91dead05cde279ee95f86e8321c8e1c8fc9deb88f12e0f587672a10d88c5  mesa-13.0.1.tar.gz
    +71962fb2bf77d33b0ad4a565b490dbbeaf4619099c6d9722f04a73187957a731  mesa-13.0.1.tar.xz
    +
    + + +

    New features

    +

    None

    + + +

    Bug fixes

    + +
      + +
    • Bug 97715 - [ILK,G45,G965] piglit.spec.arb_separate_shader_objects.misc api error checks
    • + +
    • Bug 98012 - [IVB] Segfault when running Dolphin twice with Vulkan
    • + +
    • Bug 98512 - radeon r600 vdpau: Invalid command stream: texture bo too small
    • + +
    + + +

    Changes

    + +

    Adam Jackson (2):

    +
      +
    • glx/glvnd: Don't modify the dummy slot in the dispatch table
    • +
    • glx/glvnd: Fix dispatch function names and indices
    • +
    + +

    Andreas Boll (1):

    +
      +
    • glx/windows: Add wgl.h to the sources list
    • +
    + +

    Anuj Phogat (1):

    +
      +
    • i965: Fix GPU hang related to multiple render targets and alpha testing
    • +
    + +

    Chih-Wei Huang (1):

    +
      +
    • android: avoid using libdrm with host modules
    • +
    + +

    Darren Salt (1):

    +
      +
    • radv/pipeline: Don't dereference NULL dynamic state pointers
    • +
    + +

    Dave Airlie (8):

    +
      +
    • radv: expose xlib platform extension
    • +
    • radv: fix dual source blending
    • +
    • Revert "st/vdpau: use linear layout for output surfaces"
    • +
    • radv: emit correct last export when Z/stencil export is enabled
    • +
    • ac/nir: add support for discard_if intrinsic (v2)
    • +
    • nir: add conditional discard optimisation (v4)
    • +
    • radv: enable conditional discard optimisation on radv.
    • +
    • radv: fix GetFenceStatus for signaled fences
    • +
    + +

    Emil Velikov (6):

    +
      +
    • docs: add sha256 checksums for 13.0.0
    • +
    • amd/addrlib: limit fastcall/regparm to GCC i386
    • +
    • anv: use correct .specVersion for extensions
    • +
    • radv: use correct .specVersion for extensions
    • +
    • radv: Suffix the radeon_icd file with the host CPU
    • +
    • Update version to 13.0.1
    • +
    + +

    Eric Anholt (1):

    +
      +
    • vc4: Use Newton-Raphson on the 1/W write to fix glmark2 terrain.
    • +
    + +

    Francisco Jerez (1):

    +
      +
    • nir: Flip gl_SamplePosition in nir_lower_wpos_ytransform().
    • +
    + +

    Fredrik Höglund (1):

    +
      +
    • radv: add support for anisotropic filtering on VI+
    • +
    + +

    Jason Ekstrand (21):

    +
      +
    • anv/device: Return DEVICE_LOST if execbuf2 fails
    • +
    • vulkan/wsi/x11: Better handle wsi_x11_connection_create failure
    • +
    • vulkan/wsi/x11: Clean up connections in finish_wsi
    • +
    • anv: Better handle return codes from anv_physical_device_init
    • +
    • intel/blorp: Use wm_prog_data instead of hand-rolling our own
    • +
    • intel/blorp: Pass a brw_stage_prog_data to upload_shader
    • +
    • anv/pipeline: Put actual pointers in anv_shader_bin
    • +
    • anv/pipeline: Properly cache prog_data::param
    • +
    • intel/blorp: Emit all the binding tables
    • +
    • anv/device: Add an execbuf wrapper
    • +
    • anv: Add a cmd_buffer_execbuf helper
    • +
    • anv: Don't presume to know what address is in a surface relocation
    • +
    • anv: Add a new bo_pool_init helper
    • +
    • anv/allocator: Simplify anv_scratch_pool
    • +
    • anv: Initialize anv_bo::offset to -1
    • +
    • anv/batch_chain: Improve write_reloc
    • +
    • anv: Add an anv_execbuf helper struct
    • +
    • anv/batch: Move last_ss_pool_bo_offset to the command buffer
    • +
    • anv: Move relocation handling from EndCommandBuffer to QueueSubmit
    • +
    • anv/cmd_buffer: Take a command buffer instead of a batch in two helpers
    • +
    • anv/cmd_buffer: Enable a CS stall workaround for Sky Lake gt4
    • +
    + +

    Kenneth Graunke (2):

    +
      +
    • glsl: Update deref types when resizing implicitly sized arrays.
    • +
    • mesa: Fix pixel shader scratch space allocation on Gen9+ platforms.
    • +
    + +

    Kristian Høgsberg (1):

    +
      +
    • anv: Do relocations in userspace before execbuf ioctl
    • +
    + +

    Marek Olšák (4):

    +
      +
    • egl: use util/macros.h
    • +
    • egl: make interop ABI visible again
    • +
    • glx: make interop ABI visible again
    • +
    • radeonsi: fix an assertion failure in si_decompress_sampler_color_textures
    • +
    + +

    Nicolai Hähnle (4):

    +
      +
    • radeonsi: fix BFE/BFI lowering for GLSL semantics
    • +
    • glsl: fix lowering of UBO references of named blocks
    • +
    • st/glsl_to_tgsi: fix dvec[34] loads from SSBO
    • +
    • st/mesa: fix the layer of VDPAU surface samplers
    • +
    + +

    Steven Toth (3):

    +
      +
    • gallium/hud: fix a problem where objects are free'd while in use.
    • +
    • gallium/hud: close a previously opened handle
    • +
    • gallium/hud: protect against and initialization race
    • +
    + +

    Timothy Arceri (1):

    +
      +
    • mesa/glsl: delete previously linked shaders earlier when linking
    • +
    + + +
    + + diff -Nru mesa-12.0.6/docs/relnotes/13.0.2.html mesa-17.0.7/docs/relnotes/13.0.2.html --- mesa-12.0.6/docs/relnotes/13.0.2.html 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/docs/relnotes/13.0.2.html 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,189 @@ + + + + + Mesa Release Notes + + + + +
    +

    The Mesa 3D Graphics Library

    +
    + + +
    + +

    Mesa 13.0.2 Release Notes / November 28, 2016

    + +

    +Mesa 13.0.2 is a bug fix release which fixes bugs found since the 13.0.1 release. +

    +

    +Mesa 13.0.2 implements the OpenGL 4.4 API, but the version reported by +glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) / +glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used. +Some drivers don't support all the features required in OpenGL 4.4. OpenGL +4.4 is only available if requested at context creation +because compatibility contexts are not supported. +

    + + +

    SHA256 checksums

    +
    +6014233a5db6032ab8de4881384871bbe029de684502707794ce7b3e6beec308  mesa-13.0.2.tar.gz
    +a6ed622645f4ed61da418bf65adde5bcc4bb79023c36ba7d6b45b389da4416d5  mesa-13.0.2.tar.xz
    +
    + + +

    New features

    +

    None

    + + +

    Bug fixes

    + +
      + +
    • Bug 97321 - Query INFO_LOG_LENGTH for empty info log should return 0
    • + +
    • Bug 97420 - "#version 0" crashes glsl_compiler
    • + +
    • Bug 98632 - Fix build on Hurd without PATH_MAX
    • + +
    + + +

    Changes

    + +

    Ben Widawsky (3):

    +
      +
    • i965: Add some APL and KBL SKU strings
    • +
    • i965: Reorder PCI ID list to match release order
    • +
    • i965/glk: Add basic Geminilake support
    • +
    + +

    Dave Airlie (14):

    +
      +
    • radv: fix texturesamples to handle single sample case
    • +
    • wsi: fix VK_INCOMPLETE for vkGetSwapchainImagesKHR
    • +
    • radv: don't crash on null swapchain destroy.
    • +
    • ac/nir/llvm: fix channel in texture gather lowering code.
    • +
    • radv: make sure to flush input attachments correctly.
    • +
    • radv: fix image view creation for depth and stencil only
    • +
    • radv: spir-v allows texture size query with and without lod.
    • +
    • vulkan/wsi/x11: handle timeouts properly in next image acquire (v1.1)
    • +
    • vulkan/wsi: store present mode in swapchain base class
    • +
    • vulkan/wsi/x11: add support for IMMEDIATE present mode
    • +
    • radv: fix texel fetch offset with 2d arrays.
    • +
    • radv/si: fix optimal micro tile selection
    • +
    • radv/ac/llvm: shadow samplers only return one value.
    • +
    • radv: fix 3D clears with baseMiplevel
    • +
    + +

    Eduardo Lima Mitev (2):

    +
      +
    • vulkan/wsi/x11: Fix behavior of vkGetPhysicalDeviceSurfaceFormatsKHR
    • +
    • vulkan/wsi/x11: Fix behavior of vkGetPhysicalDeviceSurfacePresentModesKHR
    • +
    + +

    Emil Velikov (5):

    +
      +
    • docs: add sha256 checksums for 13.0.1
    • +
    • cherry-ignore: add reverted LLVM_LIBDIR patch
    • +
    • anv: fix enumeration of properties
    • +
    • radv: honour the number of properties available
    • +
    • Update version to 13.0.2
    • +
    + +

    Eric Anholt (3):

    +
      +
    • vc4: Don't abort when a shader compile fails.
    • +
    • vc4: Clamp the shadow comparison value.
    • +
    • vc4: Fix register class handling of DDX/DDY arguments.
    • +
    + +

    Gwan-gyeong Mun (2):

    +
      +
    • util/disk_cache: close a previously opened handle in disk_cache_put (v2)
    • +
    • anv: Fix unintentional integer overflow in anv_CreateDmaBufImageINTEL
    • +
    + +

    Iago Toral Quiroga (1):

    +
      +
    • anv/format: handle unsupported formats properly
    • +
    + +

    Ian Romanick (2):

    +
      +
    • glcpp: Handle '#version 0' and other invalid values
    • +
    • glsl: Parse 0 as a preprocessor INTCONSTANT
    • +
    + +

    Jason Ekstrand (15):

    +
      +
    • anv/gen8: Stall when needed in Cmd(Set|Reset)Event
    • +
    • anv/wsi: Set the fence to signaled in AcquireNextImageKHR
    • +
    • anv: Rework fences
    • +
    • vulkan/wsi/wayland: Include pthread.h
    • +
    • vulkan/wsi/wayland: Clean up some error handling paths
    • +
    • vulkan/wsi: Report the correct min/maxImageCount
    • +
    • i965/gs: Allow primitive id to be a system value
    • +
    • anv: Handle null in all destructors
    • +
    • anv/fence: Handle ANV_FENCE_CREATE_SIGNALED_BIT
    • +
    • nir/spirv: Fix handling of gl_PrimitiveId
    • +
    • anv/blorp: Ignore clears for attachments first used as resolve destinations
    • +
    • anv: Implement a depth stall restriction on gen7
    • +
    • anv/cmd_buffer: Handle running out of binding tables in compute shaders
    • +
    • anv/cmd_buffer: Emit a CS stall before setting a CS pipeline
    • +
    • vulkan/wsi/x11: Implement FIFO mode.
    • +
    + +

    Jordan Justen (2):

    +
      +
    • isl: Fix height calculation in isl_msaa_interleaved_scale_px_to_sa
    • +
    • i965/hsw: Set integer mode in sampling state for stencil texturing
    • +
    + +

    Kenneth Graunke (4):

    +
      +
    • intel: Set min_ds_entries on Broxton.
    • +
    • i965: Fix compute shader crash.
    • +
    • mesa: Drop PATH_MAX usage.
    • +
    • i965: Fix GS push inputs with enhanced layouts.
    • +
    + +

    Kevin Strasser (1):

    +
      +
    • vulkan/wsi: Add a thread-safe queue implementation
    • +
    + +

    Lionel Landwerlin (1):

    +
      +
    • anv: fix multi level clears with VK_REMAINING_MIP_LEVELS
    • +
    + +

    Lucas Stach (1):

    +
      +
    • gbm: request correct version of the DRI2_FENCE extension
    • +
    + +

    Nicolai Hähnle (2):

    +
      +
    • radeonsi: store group_size_variable in struct si_compute
    • +
    • glsl/lower_output_reads: fix geometry shader output handling with conditional emit
    • +
    + +

    Steinar H. Gunderson (1):

    +
      +
    • Fix races during _mesa_HashWalk().
    • +
    + +

    Tapani Pälli (1):

    +
      +
    • mesa: fix empty program log length
    • +
    + + +
    + + diff -Nru mesa-12.0.6/docs/relnotes/13.0.3.html mesa-17.0.7/docs/relnotes/13.0.3.html --- mesa-12.0.6/docs/relnotes/13.0.3.html 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/docs/relnotes/13.0.3.html 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,177 @@ + + + + + Mesa Release Notes + + + + +
    +

    The Mesa 3D Graphics Library

    +
    + + +
    + +

    Mesa 13.0.3 Release Notes / January 5, 2017

    + +

    +Mesa 13.0.3 is a bug fix release which fixes bugs found since the 13.0.2 release. +

    +

    +Mesa 13.0.3 implements the OpenGL 4.4 API, but the version reported by +glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) / +glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used. +Some drivers don't support all the features required in OpenGL 4.4. OpenGL +4.4 is only available if requested at context creation +because compatibility contexts are not supported. +

    + + +

    SHA256 checksums

    +
    +55b07d056f9b855ba9d7c8b2ddc7d3b220a61c6ab1bdc73cbfc2f607721094c2  mesa-13.0.3.tar.gz
    +d9aa8be5c176d00d0cd503cb2f64a5a403ea471ec819c022581414860d7ba40e  mesa-13.0.3.tar.xz
    +
    + + +

    New features

    +

    None

    + + +

    Bug fixes

    + +
      + +
    • Bug 77662 - Fail to render to different faces of depth-stencil cube map
    • + +
    • Bug 92234 - [BDW] GPU hang in Shogun2
    • + +
    • Bug 98329 - [dEQP, EGL, SKL, BDW, BSW] dEQP-EGL.functional.image.render_multiple_contexts.gles2_renderbuffer_depth16_depth_buffer
    • + +
    • Bug 99038 - [dEQP, EGL, SKL, BDW, BSW] dEQP-EGL.functional.negative_api.create_pixmap_surface crashes
    • + +
    + + +

    Changes

    + +

    Chad Versace (2):

    +
      +
    • i965/mt: Disable aux surfaces after making miptree shareable
    • +
    • egl: Fix crashes in eglCreate*Surface()
    • +
    + +

    Dave Airlie (4):

    +
      +
    • anv: set maxFragmentDualSrcAttachments to 1
    • +
    • radv: set maxFragmentDualSrcAttachments to 1
    • +
    • radv: fix another regression since shadow fixes.
    • +
    • radv: add missing license file to radv_meta_bufimage.
    • +
    + +

    Emil Velikov (5):

    +
      +
    • docs: add sha256 checksums for 13.0.2
    • +
    • anv: don't double-close the same fd
    • +
    • anv: don't leak memory if anv_init_wsi() fails
    • +
    • radv: don't leak the fd if radv_physical_device_init() succeeds
    • +
    • Update version to 13.0.3
    • +
    + +

    Eric Anholt (1):

    +
      +
    • vc4: In a loop break/continue, jump if everyone has taken the path.
    • +
    + +

    Gwan-gyeong Mun (3):

    +
      +
    • anv: Add missing error-checking to anv_block_pool_init (v2)
    • +
    • anv: Update the teardown in reverse order of the anv_CreateDevice
    • +
    • vulkan/wsi: Fix resource leak in success path of wsi_queue_init()
    • +
    + +

    Haixia Shi (1):

    +
      +
    • compiler/glsl: fix precision problem of tanh
    • +
    + +

    Ilia Mirkin (1):

    +
      +
    • mesa: only verify that enabled arrays have backing buffers
    • +
    + +

    Jason Ekstrand (8):

    +
      +
    • anv/cmd_buffer: Re-emit MEDIA_CURBE_LOAD when CS push constants are dirty
    • +
    • anv/image: Rename hiz_surface to aux_surface
    • +
    • anv/cmd_buffer: Remove the 1-D case from the HiZ QPitch calculation
    • +
    • genxml/gen9: Change the default of MI_SEMAPHORE_WAIT::RegisterPoleMode
    • +
    • anv/device: Return the right error for failed maps
    • +
    • anv/device: Implicitly unmap memory objects in FreeMemory
    • +
    • anv/descriptor_set: Write the state offset in the surface state free list.
    • +
    • spirv: Use a simpler and more correct implementaiton of tanh()
    • +
    + +

    Kenneth Graunke (1):

    +
      +
    • i965: Allocate at least some URB space even when max_vertices = 0.
    • +
    + +

    Marek Olšák (17):

    +
      +
    • radeonsi: always set all blend registers
    • +
    • radeonsi: set CB_BLEND1_CONTROL.ENABLE for dual source blending
    • +
    • radeonsi: disable RB+ blend optimizations for dual source blending
    • +
    • radeonsi: consolidate max-work-group-size computation
    • +
    • radeonsi: apply a multi-wave workgroup SPI bug workaround to affected CIK chips
    • +
    • radeonsi: apply a TC L1 write corruption workaround for SI
    • +
    • radeonsi: apply a tessellation bug workaround for SI
    • +
    • radeonsi: add a tess+GS hang workaround for VI dGPUs
    • +
    • radeonsi: apply the double EVENT_WRITE_EOP workaround to VI as well
    • +
    • cso: don't release sampler states that are bound
    • +
    • radeonsi: always restore sampler states when unbinding sampler views
    • +
    • radeonsi: fix incorrect FMASK checking in bind_sampler_states
    • +
    • radeonsi: allow specifying simm16 of emit_waitcnt at call sites
    • +
    • radeonsi: wait for outstanding memory instructions in TCS barriers
    • +
    • tgsi: fix the src type of TGSI_OPCODE_MEMBAR
    • +
    • radeonsi: wait for outstanding LDS instructions in memory barriers if needed
    • +
    • radeonsi: disable the constant engine (CE) on Carrizo and Stoney
    • +
    + +

    Matt Turner (3):

    +
      +
    • i965/fs: Rename opt_copy_propagate -> opt_copy_propagation.
    • +
    • i965/fs: Add unit tests for copy propagation pass.
    • +
    • i965/fs: Reject copy propagation into SEL if not min/max.
    • +
    + +

    Nanley Chery (1):

    +
      +
    • mesa/fbobject: Update CubeMapFace when reusing textures
    • +
    + +

    Nicolai Hähnle (4):

    +
      +
    • radeonsi: fix isolines tess factor writes to control ring
    • +
    • radeonsi: update all GSVS ring descriptors for new buffer allocations
    • +
    • radeonsi: do not kill GS with memory writes
    • +
    • radeonsi: fix an off-by-one error in the bounds check for max_vertices
    • +
    + +

    Rhys Kidd (1):

    +
      +
    • glsl: Add pthread libs to cache_test
    • +
    + +

    Timothy Arceri (2):

    +
      +
    • mesa: fix active subroutine uniforms properly
    • +
    • Revert "nir: Turn imov/fmov of undef into undef."
    • +
    + + +
    + + diff -Nru mesa-12.0.6/docs/relnotes/17.0.0.html mesa-17.0.7/docs/relnotes/17.0.0.html --- mesa-12.0.6/docs/relnotes/17.0.0.html 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/docs/relnotes/17.0.0.html 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,285 @@ + + + + + Mesa Release Notes + + + + +
    +

    The Mesa 3D Graphics Library

    +
    + + +
    + +

    Mesa 17.0.0 Release Notes / February 13, 2017

    + +

    +Mesa 17.0.0 is a new development release. +People who are concerned with stability and reliability should stick +with a previous release or wait for Mesa 17.0.1. +

    +

    +Mesa 17.0.0 implements the OpenGL 4.5 API, but the version reported by +glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) / +glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used. +Some drivers don't support all the features required in OpenGL 4.5. OpenGL +4.5 is only available if requested at context creation +because compatibility contexts are not supported. +

    + + +

    SHA256 checksums

    +
    +696578f0b83796470511a88a95fff15a2a25fa201a9e487716f2ca20c177c3ab  mesa-17.0.0.tar.gz
    +39db3d59700159add7f977307d12a7dfe016363e760ad82280ac4168ea668481  mesa-17.0.0.tar.xz
    +
    + + +

    New features

    + +

    +Note: some of the new features are only available with certain drivers. +

    + +
      +
    • GL_ARB_post_depth_coverage on i965/gen9+
    • +
    • GL_KHR_blend_equation_advanced on nvc0
    • +
    • GL_INTEL_conservative_rasterization on i965/gen9+
    • +
    • GL_NV_image_formats on any driver supporting GL_ARB_shader_image_load_store (i965, nvc0, radeonsi, softpipe)
    • +
    • GL_ARB_gpu_shader_fp64 in i965/haswell
    • +
    • GL_ARB_vertex_attrib_64bit in i965/haswell
    • +
    • GL_ARB_shader_precision in i965/haswell
    • +
    • Intel Haswell now supports OpenGL 4.2
    • +
    • GL_OES_geometry_shader on i965/haswell
    • +
    • GL_OES_texture_cube_map_array on i965/haswell
    • +
    • GL_OES_viewport_array on i965/haswell
    • +
    • Vulkan Float64 capability support on Intel's ANV driver
    • +
    + +

    Bug fixes

    + +
      + +
    • Bug 70623 - libglx.so: undefined symbol: _glapi_tls_Context
    • + +
    • Bug 72902 - [IVB/HSW/BDW] DOTA2 segfaults unless Mesa is configured with (non-default) --enable-glx-tls
    • + +
    • Bug 73778 - _glapi_tls_Dispatch undefined
    • + +
    • Bug 77662 - Fail to render to different faces of depth-stencil cube map
    • + +
    • Bug 89043 - undefined symbol: _glapi_tls_Dispatch
    • + +
    • Bug 91281 - Tonga VCE 2160p encode fails with BO to small for addr
    • + +
    • Bug 92234 - [BDW] GPU hang in Shogun2
    • + +
    • Bug 92634 - gallium's vl_mpeg12_decoder does not work with st/va
    • + +
    • Bug 92760 - Add FP64 support to the i965 shader backends
    • + +
    • Bug 92925 - Incorrect GEN for ASTC in Surface Format Table
    • + +
    • Bug 93551 - Divinity: Original Sin Enhanced Edition(Native) crash on start
    • + +
    • Bug 94512 - X segfaults with glx-tls enabled in a x32 environment
    • + +
    • Bug 94900 - HD6950 GPU lockup loop with various steam games (octodad[always], saints row 4[always], dead island[always], grid autosport[sometimes])
    • + +
    • Bug 94904 - [vulkan, BSW] dEQP-VK.api.object_management.multithreaded_per_thread_device intermittent crash
    • + +
    • Bug 95460 - Please add more drivers (freedreno, virgl) to features.txt status document
    • + +
    • Bug 96959 - nop.sat generated by pow workaround?
    • + +
    • Bug 97102 - [dri][swr] stack overflow / infinite loop with GALLIUM_DRIVER=swr
    • + +
    • Bug 97232 - Line rendering broken in Dolphin when using gl_ClipDistance
    • + +
    • Bug 97287 - GL45-CTS.vertex_attrib_binding.basic-inputL-case1 fails
    • + +
    • Bug 97321 - Query INFO_LOG_LENGTH for empty info log should return 0
    • + +
    • Bug 97420 - "#version 0" crashes glsl_compiler
    • + +
    • Bug 97422 - trying to call a number as a function results into a crash
    • + +
    • Bug 97447 - GL 3.0 compatibility context exposes GL_ARB_compute_shader
    • + +
    • Bug 97473 - Memory corruption when uploading DXT5 cubemap faces
    • + +
    • Bug 97715 - [ILK,G45,G965] piglit.spec.arb_separate_shader_objects.misc api error checks
    • + +
    • Bug 97779 - [regression, bisected][BDW, GPU hang] stuck on render ring, always reproducible
    • + +
    • Bug 97804 - Later precision statement isn't overriding earlier one
    • + +
    • Bug 97952 - /usr/include/string.h:518:12: error: exception specification in declaration does not match previous declaration
    • + +
    • Bug 97967 - glsl/tests/cache-test regression
    • + +
    • Bug 98005 - VCE dual instance encoding inconsistent since st/va: enable dual instances encode by sync surface
    • + +
    • Bug 98012 - [IVB] Segfault when running Dolphin twice with Vulkan
    • + +
    • Bug 98134 - dEQP-GLES31.functional.debug.negative_coverage.get_error.buffer.draw_buffers wants a different GL error code
    • + +
    • Bug 98172 - Concurrent call to glClientWaitSync results in segfault in one of the waiters.
    • + +
    • Bug 98238 - witcher 2: objects are black when changing lod
    • + +
    • Bug 98243 - dEQP mismatched UBO precision qualifiers
    • + +
    • Bug 98245 - GLES3.1 link negative dEQP "expected linking to fail, but passed."
    • + +
    • Bug 98250 - dEQP-GLES31.functional.debug.negative_coverage.get_error.texture.texparameterIiv/texparameterIuiv failure
    • + +
    • Bug 98263 - [radv] The Talos Principle fails to launch with "Fatal error: Cannot set display mode."
    • + +
    • Bug 98297 - Can't configure a desktop with 3x4k monitors in one row
    • + +
    • Bug 98299 - Compute shaders generate stupid divides
    • + +
    • Bug 98307 - "st/glsl_to_tgsi: explicitly track all input and output declaration" broke flightgear colors on rs780
    • + +
    • Bug 98326 - [dEQP, EGL] pbuffer depth/stencil tests fail
    • + +
    • Bug 98327 - [dEQP, EGL] dEQP-EGL.functional.resize not supported
    • + +
    • Bug 98328 - [dEQP, EGL] luminance tests fail
    • + +
    • Bug 98329 - [dEQP, EGL, SKL, BDW, BSW] dEQP-EGL.functional.image.render_multiple_contexts.gles2_renderbuffer_depth16_depth_buffer
    • + +
    • Bug 98330 - [dEQP, EGL] dEQP-EGL.functional.buffer_age.no_preserve fails
    • + +
    • Bug 98339 - dEQP-EGL: Got EGL_BAD_MATCH: eglCreateSyncKHR()
    • + +
    • Bug 98343 - dEQP-EGL: GL_INVALID_ENUM at teglCreateContextExtTests
    • + +
    • Bug 98415 - Vulkan Driver JSON file contains incorrect field
    • + +
    • Bug 98421 - src/loader/loader.c:111:40: error: unknown type name ‘drmDevicePtr’
    • + +
    • Bug 98431 - UnrealEngine v4 demos startup fails to blorp blit assert
    • + +
    • Bug 98480 - Support R8 image texture in ES 3.1
    • + +
    • Bug 98512 - radeon r600 vdpau: Invalid command stream: texture bo too small
    • + +
    • Bug 98518 - [r600g, bisected] regression: NI/Turks MSAA texture corruption with FreeCAD and Wine games
    • + +
    • Bug 98526 - glsl/tests/general-ir-test regression
    • + +
    • Bug 98595 - glsl: ralloc assertion "info->canary == CANARY" failed
    • + +
    • Bug 98599 - xterm menus corrupt since tgsi/scan: handle indirect image indexing correctly
    • + +
    • Bug 98632 - Fix build on Hurd without PATH_MAX
    • + +
    • Bug 98681 - ir_builder_print_visitor.cpp:401:67: error: expected ')' before 'PRIx64'
    • + +
    • Bug 98694 - "(5=2)?1:1" as array size decleration crashes glsl_compiler
    • + +
    • Bug 98740 - bitcode.cpp:102:8: error: ‘Error’ is not a member of ‘llvm’
    • + +
    • Bug 98767 - [swrast] ralloc.c:84: get_header: Assertion `info->canary == CANARY' failed.
    • + +
    • Bug 98774 - glsl/tests/warnings-test regression
    • + +
    • Bug 98815 - [SKL/BDW GT2] large perf regression in TessMark
    • + +
    • Bug 98840 - nir clone test fails
    • + +
    • Bug 98893 - [SKL] piglit.spec.arb_shader_image_load_store.semantics intermittent
    • + +
    • Bug 98914 - mesa-vdpau-drivers: breaks vdpau for mpeg2video
    • + +
    • Bug 98917 - [BDW SKL BSW KBL] Tessellation CTS tests regression
    • + +
    • Bug 98975 - Wasteland 2 Directors Cut: Hangs. GPU fault
    • + +
    • Bug 99010 - --disable-gallium-llvm no longer recognized
    • + +
    • Bug 99013 - [regression, bisected] radeonsi: commit 4c8c13b3 "Use amdgcn intrinsics for fs interpolation" makes system unusable
    • + +
    • Bug 99030 - [HSW, regression] transform feedback fails on Linux 4.8
    • + +
    • Bug 99038 - [dEQP, EGL, SKL, BDW, BSW] dEQP-EGL.functional.negative_api.create_pixmap_surface crashes
    • + +
    • Bug 99072 - [byt,ivb,snb] ES3-CTS.gtf.GL3Tests.shadow regression
    • + +
    • Bug 99085 - [EGL] dEQP-EGL.functional.sharing.gles2.multithread intermittent
    • + +
    • Bug 99097 - [vulkancts] dEQP-VK.image.store regression
    • + +
    • Bug 99100 - [SKL,BDW,BSW,KBL] dEQP-VK.glsl.return.return_in_dynamic_loop_dynamic_vertex regression
    • + +
    • Bug 99119 - swr_fence_work.cpp(42): error: argument of type "std::nullptr_t" is incompatible with parameter of type "unsigned long"
    • + +
    • Bug 99144 - Incorrect rendering using glDrawArraysInstancedBaseInstance and first != 0 on Skylake
    • + +
    • Bug 99154 - Link time error when using multiple builtin functions
    • + +
    • Bug 99158 - vdpau segfaults and gpu locks with kodi on R9285
    • + +
    • Bug 99185 - dEQP-EGL.functional.image.modify.tex_rgb5_a1_tex_subimage_rgba8
    • + +
    • Bug 99188 - dEQP-EGL.functional.create_context_ext.robust_gl_30.rgb565_no_depth_no_stencil
    • + +
    • Bug 99210 - ES3-CTS.functional.texture.mipmap.cube.generate.rgba5551_*
    • + +
    • Bug 99214 - Crash in library libswrAVX.so when assigning vertex buffer object pointers with elements of type GL_DOUBLE
    • + +
    • Bug 99219 - The Stanley Parable GPU hang when starting a new game
    • + +
    • Bug 99229 - [G33] thousands of tests crash
    • + +
    • Bug 99231 - [HSW][i965] Crash in upload_3dstate_streamout()
    • + +
    • Bug 99287 - piglit.spec.glsl-1_10.execution.vs-nested-return-sibling-loop regression
    • + +
    • Bug 99303 - [REGRESSION][BISECTED] DMs are crashing on start with "radeon"
    • + +
    • Bug 99314 - [g33] glsl regressions
    • + +
    • Bug 99339 - Blender line rendering broken after removing XY clipping of lines
    • + +
    • Bug 99354 - [G71] "Assertion `bkref' failed" reproducible with glmark2
    • + +
    • Bug 99389 - Mesa build broken: sid_tables.h
    • + +
    • Bug 99391 - [ILK,G45,G965] piglit regressions
    • + +
    • Bug 99401 - [g33] regression: piglit.spec.!opengl 1_0.gl-1_0-beginend-coverage
    • + +
    • Bug 99419 - Crash(Segmentation fault) si_shader_select in Master Of Orion
    • + +
    • Bug 99450 - [amdgpu] Payday 2 visual glitches on some models
    • + +
    • Bug 99451 - polygon offset use after free
    • + +
    • Bug 99456 - Firefox crashing when opening about:support with WebGL2 enabled
    • + +
    • Bug 99631 - segfault with OSVRTrackerView and openscenegraph git master
    • + +
    • Bug 99633 - rasterizer/core/clip.h:279:49: error: ‘const struct API_STATE’ has no member named ‘linkageCount’
    • + +
    • Bug 99637 - VLC video has corrupted colors when using VDPAU output on Radeon SI
    • + +
    + +

    Changes

    + +
      +
    • Building RADV requires --enable-gallium-llvm
    • +
    • The vulkan headers vk_platform.h and vulkan.h are no longer installed
    • +
    • The configure options --with-sha1 and --disable-shader-cache are +removed alongside their respective library requirements
    • +
    + +
    + + diff -Nru mesa-12.0.6/docs/relnotes/17.0.1.html mesa-17.0.7/docs/relnotes/17.0.1.html --- mesa-12.0.6/docs/relnotes/17.0.1.html 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/docs/relnotes/17.0.1.html 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,221 @@ + + + + + Mesa Release Notes + + + + +
    +

    The Mesa 3D Graphics Library

    +
    + + +
    + +

    Mesa 17.0.1 Release Notes / March 4, 2017

    + +

    +Mesa 17.0.1 is a bug fix release which fixes bugs found since the 17.0.0 release. +

    +

    +Mesa 17.0.1 implements the OpenGL 4.5 API, but the version reported by +glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) / +glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used. +Some drivers don't support all the features required in OpenGL 4.5. OpenGL +4.5 is only available if requested at context creation +because compatibility contexts are not supported. +

    + + +

    SHA256 checksums

    +
    +e819bd3e515dac26faf9836d8f27a4ddf05323b9b23afb6c06536d4ac82e2743  mesa-17.0.1.tar.gz
    +96fd70ef5f31d276a17e424e7e1bb79447ccbbe822b56844213ef932e7ad1b0c  mesa-17.0.1.tar.xz
    +
    + + +

    New features

    +

    None

    + + +

    Bug fixes

    + +
      + +
    • Bug 98869 - Electronic Super Joy graphic artefacts (regression,bisected)
    • + +
    • Bug 99532 - Compute shader doesn't give right result under some circumstances
    • + +
    • Bug 99677 - heap-use-after-free in glsl
    • + +
    • Bug 99692 - [radv] Mostly broken on Hawaii PRO/CIK ASICs
    • + +
    • Bug 99850 - Tessellation bug on Carrizo
    • + +
    + + +

    Changes

    + +

    Bas Nieuwenhuizen (4):

    +
      +
    • radv: Never try to create more than max_sets descriptor sets.
    • +
    • radv: Reset emitted compute pipeline when calling secondary cmd buffer.
    • +
    • radv: Only use PKT3_OCCLUSION_QUERY when it doesn't hang.
    • +
    • radv: Use correct size for availability flag.
    • +
    + +

    Ben Crocker (3):

    +
      +
    • gallivm: Reenable PPC VSX (v3)
    • +
    • gallivm: Improve debug output (V2)
    • +
    • gallivm: Override getHostCPUName() "generic" w/ "pwr8" (v4)
    • +
    + +

    Brendan King (1):

    +
      +
    • egl/dri3: implement query surface hook
    • +
    + +

    Christian Gmeiner (2):

    +
      +
    • etnaviv: move pctx initialisation to avoid a null dereference
    • +
    • etnaviv: remove number of pixel pipes validation
    • +
    + +

    Connor Abbott (1):

    +
      +
    • anv: fix Get*MemoryRequirements for !LLC
    • +
    + +

    Daniel Stone (1):

    +
      +
    • egl/wayland: Don't use DRM format codes for SHM
    • +
    + +

    Dave Airlie (6):

    +
      +
    • tgsi: fix memory leak in tgsi sanity check
    • +
    • radv: change base aligmment for allocated memory.
    • +
    • radv: fix cik macroModeIndex.
    • +
    • radv: adopt some init config workarounds from radeonsi.
    • +
    • radv: fix depth format in blit2d.
    • +
    • radv: fix txs for sampler buffers
    • +
    + +

    Emil Velikov (8):

    +
      +
    • docs: add sha256 checksums for 17.0.0
    • +
    • bin/get-extra-pick-list: use git merge-base to get the branchpoint
    • +
    • bin/get-extra-pick-list: rework to use already_picked list
    • +
    • bin/get-typod-pick-list.sh: limit `git grep ...' to only as needed
    • +
    • bin/get-pick-list.sh: limit `git grep ...' only as needed
    • +
    • bin/get-pick-list.sh: remove ancient way of nominating patches
    • +
    • bin/get-fixes-pick-list.sh: add new script
    • +
    • Update version to 17.0.1
    • +
    + +

    Eric Anholt (1):

    +
      +
    • vc4: Avoid emitting small immediates for UBO indirect load address guards.
    • +
    + +

    Grazvydas Ignotas (3):

    +
      +
    • r300g: only allow byteswapped formats on big endian
    • +
    • gallium/u_queue: fix a crash with atexit handlers
    • +
    • gallium/u_queue: set num_threads correctly if not all threads start
    • +
    + +

    Hans de Goede (1):

    +
      +
    • glx/glvnd: Fix GLXdispatchIndex sorting
    • +
    + +

    Ilia Mirkin (4):

    +
      +
    • gm107/ir: fix address offset bitfield for ATOMS
    • +
    • nvc0: set the render condition in the compute object
    • +
    • st/mesa: don't pass compare mode for stencil-sampled textures
    • +
    • nvc0: disable linked tsc mode in compute launch descriptor
    • +
    + +

    Jason Ekstrand (10):

    +
      +
    • i965/sampler_state: Clamp min/max LOD to 14 on gen7+
    • +
    • i965/sampler_state: Pass texObj into update_sampler_state
    • +
    • i965/sampler_state: Set the "Base Mip Level" field on Sandy Bridge
    • +
    • intel/blorp: Swizzle clear colors on the CPU
    • +
    • i965/fs: Fix the inline nir_op_pack_double optimization
    • +
    • anv: Add an invalidate_range helper
    • +
    • anv/query: clflush the bo map on non-LLC platforms
    • +
    • genxml: Make MI_STORE_DATA_IMM more consistent
    • +
    • anv/query: Perform CmdResetQueryPool on the GPU
    • +
    • intel/blorp: Explicitly flush all allocated state
    • +
    + +

    Jose Maria Casanova Crespo (1):

    +
      +
    • glsl: non-last member unsized array on SSBO must fail compilation on GLSL ES 3.1
    • +
    + +

    Kenneth Graunke (1):

    +
      +
    • mesa: Do (TCS && !TES) draw time validation in ES as well.
    • +
    + +

    Leo Liu (1):

    +
      +
    • configure.ac: check require_basic_egl only if egl enabled
    • +
    + +

    Lionel Landwerlin (2):

    +
      +
    • anv: wsi: report presentation error per image request
    • +
    • i965/fs: fix uninitialized memory access
    • +
    + +

    Marek Olšák (6):

    +
      +
    • radeonsi: fix UNSIGNED_BYTE index buffer fallback with non-zero start (v2)
    • +
    • gallium/util: remove unused u_index_modify helpers
    • +
    • gallium/u_index_modify: don't add PIPE_TRANSFER_UNSYNCHRONIZED unconditionally
    • +
    • gallium/u_queue: fix random crashes when the app calls exit()
    • +
    • radeonsi: fix broken tessellation on Carrizo and Stoney
    • +
    • amd/common: fix ASICREV_IS_POLARIS11_M for Polaris12
    • +
    + +

    Mauro Rossi (2):

    +
      +
    • android: radeonsi: fix sid_table.h generated header include path
    • +
    • android: glsl: build shader cache sources
    • +
    + +

    Michel Dänzer (1):

    +
      +
    • configure.ac: Drop LLVM compiler flags more radically
    • +
    + +

    Nicolai Hähnle (3):

    +
      +
    • winsys/amdgpu: reduce max_alloc_size based on GTT limits
    • +
    • radeonsi: handle MultiDrawIndirect in si_get_draw_start_count
    • +
    • radeonsi: fix UINT/SINT clamping for 10-bit formats on <= CIK
    • +
    + +

    Samuel Iglesias Gonsálvez (1):

    +
      +
    • glsl: fix heap-use-after-free in ast_declarator_list::hir()
    • +
    + +

    Tapani Pälli (1):

    +
      +
    • android: fix droid_create_image_from_prime_fd_yuv for YV12
    • +
    + + +
    + + diff -Nru mesa-12.0.6/docs/relnotes/17.0.2.html mesa-17.0.7/docs/relnotes/17.0.2.html --- mesa-12.0.6/docs/relnotes/17.0.2.html 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/docs/relnotes/17.0.2.html 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,185 @@ + + + + + Mesa Release Notes + + + + +
    +

    The Mesa 3D Graphics Library

    +
    + + +
    + +

    Mesa 17.0.2 Release Notes / March 20, 2017

    + +

    +Mesa 17.0.2 is a bug fix release which fixes bugs found since the 17.0.1 release. +

    +

    +Mesa 17.0.2 implements the OpenGL 4.5 API, but the version reported by +glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) / +glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used. +Some drivers don't support all the features required in OpenGL 4.5. OpenGL +4.5 is only available if requested at context creation +because compatibility contexts are not supported. +

    + + +

    SHA256 checksums

    +
    +2e0f41e7974ba7a36ca32bbeaf8ebcd65c8fd4d2dc9872f04d4becbd5e7a8cb5  mesa-17.0.2.tar.gz
    +f8f191f909e01e65de38d5bdea5fb057f21649a3aed20948be02348e77a689d4  mesa-17.0.2.tar.xz
    +
    + + +

    New features

    +

    None

    + + +

    Bug fixes

    + +
      + +
    • Bug 68504 - 9.2-rc1 workaround for clover build failure on ppc/altivec: cannot convert 'bool' to '__vector(4) __bool int' in return
    • + +
    • Bug 97988 - [radeonsi] playing back videos with VDPAU exhibits deinterlacing/anti-aliasing issues not visible with VA-API
    • + +
    • Bug 99484 - Crusader Kings 2 - Loading bars, siege bars, morale bars, etc. do not render correctly
    • + +
    • Bug 99715 - Don't print: "Note: Buggy applications may crash, if they do please report to vendor"
    • + +
    • Bug 100049 - "ralloc: Make sure ralloc() allocations match malloc()'s alignment." causes seg fault in 32bit build
    • + +
    + + +

    Changes

    + +

    Alex Smith (3):

    +
      +
    • radv: Emit pending flushes before executing a secondary command buffer
    • +
    • radv: Flush before copying with PKT3_WRITE_DATA in CmdUpdateBuffer
    • +
    • radv/ac: Fix shared memory offset calculation
    • +
    + +

    Bas Nieuwenhuizen (3):

    +
      +
    • radv: Disable HTILE for textures with multiple layers/levels.
    • +
    • radv: Emit cache flushes before CP DMA.
    • +
    • Revert "radv: Emit cache flushes before CP DMA."
    • +
    + +

    Dave Airlie (3):

    +
      +
    • radv: drop Z24 support.
    • +
    • radv: disable mip point pre clamping.
    • +
    • radv: setup llvm target data layout
    • +
    + +

    Emil Velikov (4):

    +
      +
    • docs: add sha256 checksums for 17.0.1
    • +
    • cherry-ignore: add the swizzle blorp_clear fix
    • +
    • i965: move brw_define.h ifndef guard to the top
    • +
    • Update version to 17.0.2
    • +
    + +

    Fredrik Höglund (2):

    +
      +
    • radv: fix the dynamic buffer index in vkCmdBindDescriptorSets
    • +
    • radv/ac: fix multiple descriptor sets with dynamic buffers
    • +
    + +

    Gregory Hainaut (1):

    +
      +
    • glapi: fix typo in count_scale
    • +
    + +

    Ilia Mirkin (2):

    +
      +
    • nvc0: take extra pushbuf space into account for pushbuf_space calls
    • +
    • nvc0: increase alignment to 256 for texture buffers on fermi
    • +
    + +

    Jacob Lifshay (1):

    +
      +
    • vulkan/wsi: Improve the DRI3 error message
    • +
    + +

    James Legg (1):

    +
      +
    • radv: Fix using more than 4 bound descriptor sets
    • +
    + +

    Jason Ekstrand (7):

    +
      +
    • anv/blorp/clear_subpass: Only set surface clear color for fast clears
    • +
    • anv: Accurately advertise dynamic descriptor limits
    • +
    • anv: Stall before fast-clear operations
    • +
    • anv: Properly handle destroying NULL devices and instances
    • +
    • anv/blorp: Turn off AUX after doing a CCS_D resolve
    • +
    • anv/blorp: Only set a clear color for resolves if fast-cleared
    • +
    • nir/intrinsics: Make load_barycentric_input take a 2-component coor
    • +
    + +

    Jonas Pfeil (1):

    +
      +
    • ralloc: Make sure ralloc() allocations match malloc()'s alignment.
    • +
    + +

    Kenneth Graunke (1):

    +
      +
    • egl: Ensure ResetNotificationStrategy matches for shared contexts.
    • +
    + +

    Marek Olšák (3):

    +
      +
    • st/mesa: reset sample_mask, min_sample, and render_condition for PBO ops
    • +
    • st/mesa: set blend state for PBO readbacks
    • +
    • radeonsi: mark all bound shader buffer ranges as initialized
    • +
    + +

    Matt Turner (1):

    +
      +
    • clover: Work around build failure with AltiVec.
    • +
    + +

    Nanley Chery (2):

    +
      +
    • anv/pass: Avoid accessing attachment array out of bounds
    • +
    • anv/image: Remove extra dependency on HiZ-specific variable
    • +
    + +

    Nicolai Hähnle (2):

    +
      +
    • st/glsl_to_tgsi: avoid iterating past the head of the instruction list
    • +
    • st/mesa: inform the driver of framebuffer changes before compute dispatches
    • +
    + +

    Robert Foss (1):

    +
      +
    • mesa: Avoid read of uninitialized variable
    • +
    + +

    Samuel Iglesias Gonsálvez (5):

    +
      +
    • i965/fs: mark last DF uniform array element as 64 bit live one
    • +
    • i965/fs: detect different bit size accesses to uniforms to push them in proper locations
    • +
    • i965/fs: fix indirect load DF uniforms on BSW/BXT
    • +
    • i965/fs: fix source type when emitting MOV_INDIRECT to read ICP handles
    • +
    • i965/fs: emit MOV_INDIRECT with the source with the right register type
    • +
    + +

    Samuel Pitoiset (1):

    +
      +
    • radeonsi: disable sinking common instructions down to the end block
    • +
    + + +
    + + diff -Nru mesa-12.0.6/docs/relnotes/17.0.3.html mesa-17.0.7/docs/relnotes/17.0.3.html --- mesa-12.0.6/docs/relnotes/17.0.3.html 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/docs/relnotes/17.0.3.html 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,189 @@ + + + + + Mesa Release Notes + + + + +
    +

    The Mesa 3D Graphics Library

    +
    + + +
    + +

    Mesa 17.0.3 Release Notes / April 1, 2017

    + +

    +Mesa 17.0.3 is a bug fix release which fixes bugs found since the 17.0.2 release. +

    +

    +Mesa 17.0.3 implements the OpenGL 4.5 API, but the version reported by +glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) / +glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used. +Some drivers don't support all the features required in OpenGL 4.5. OpenGL +4.5 is only available if requested at context creation +because compatibility contexts are not supported. +

    + + +

    SHA256 checksums

    +
    +8253edf1bdd7b14ab63d5982349143a5c9ac3767f39a63257cc9d7e7d92f60f1  mesa-17.0.3.tar.gz
    +ca646f5075a002d60ef9123c8a4331cede155c01712ef945a65c59a5e69fe7ed  mesa-17.0.3.tar.xz
    +
    + + +

    New features

    +

    None

    + + +

    Bug fixes

    + +
      + +
    • Bug 96743 - [BYT, HSW, SKL, BXT, KBL] GPU hangs with GfxBench 4.0 CarChase
    • + +
    • Bug 99246 - [d3dadapter+radeonsi & bisect] EVE-Online : hang on wormhole sight
    • + +
    • Bug 100061 - LODQ instruction generated with invalid dst mask
    • + +
    • Bug 100182 - Flickering in The Talos Principle on Sky Lake GT4.
    • + +
    • Bug 100201 - Windows scons build with MSVC toolchain and LLVM 4.0 fails
    • + +
    + + +

    Changes

    + +

    Alex Deucher (1):

    +
      +
    • radeonsi: add new polaris12 pci id
    • +
    + +

    Andres Gomez (5):

    +
      +
    • glsl: on UBO/SSBOs link error reset the number of active blocks to 0
    • +
    • cherry-ignore: add the Invalidate L2 for TRANSFER_WRITE barriers fix
    • +
    • cherry-ignore: add the Flush after unmap in gbm/dri fix
    • +
    • cherry-ignore: corrected typo in the Flush after unmap in gbm/dri fix
    • +
    • Update version to 17.0.3
    • +
    + +

    Axel Davy (2):

    +
      +
    • st/nine: Resolve deadlock in surface/volume dtors when using csmt
    • +
    • st/nine: Use atomics for available_texture_mem
    • +
    + +

    Bas Nieuwenhuizen (1):

    +
      +
    • radv: flush DB cache before and after HTILE decompress.
    • +
    + +

    Dave Airlie (1):

    +
      +
    • radv: fix primitive reset index emission
    • +
    + +

    Emil Velikov (1):

    +
      +
    • docs: add sha256 checksums for 17.0.2
    • +
    + +

    Ilia Mirkin (1):

    +
      +
    • st/mesa: set result writemask based on ir type
    • +
    + +

    Jan Vesely (1):

    +
      +
    • clover: use pipe_resource references
    • +
    + +

    Jason Ekstrand (9):

    +
      +
    • anv/query: Invalidate the correct range
    • +
    • anv/GetQueryPoolResults: Actually implement the spec
    • +
    • anv/image: Return early when unbinding an image
    • +
    • anv/query: Fix the location of timestamp availability
    • +
    • anv: Make anv_get_layerCount a macro
    • +
    • anv/blorp: Use anv_get_layerCount everywhere
    • +
    • anv/cmd_buffer: Apply flush operations prior to executing secondaries
    • +
    • anv/cmd_buffer: Fix bad indentation
    • +
    • anv: Flush caches prior to PIPELINE_SELECT on all gens
    • +
    + +

    José Fonseca (1):

    +
      +
    • c11/threads: Include thr/xtimec.h for xtime definition when building with MSVC.
    • +
    + +

    Juan A. Suarez Romero (1):

    +
      +
    • tests/cache_test: allow crossing mount points
    • +
    + +

    Karol Herbst (1):

    +
      +
    • nvc0/ir: treat FMA like MAD for operand propagation
    • +
    + +

    Kenneth Graunke (1):

    +
      +
    • i965: Fall back to GL 4.2/4.3 on Haswell if the kernel isn't new enough.
    • +
    + +

    Marek Olšák (1):

    +
      +
    • radeonsi: don't hang on shader compile failure
    • +
    + +

    Matt Turner (1):

    +
      +
    • i965/fs: Don't emit SEL instructions for type-converting MOVs.
    • +
    + +

    Nanley Chery (1):

    +
      +
    • intel: Correct the BDW surface state size
    • +
    + +

    Nicolai Hähnle (1):

    +
      +
    • mesa/main: fix MultiDrawElements[BaseVertex] validation of primcount
    • +
    + +

    Rob Clark (1):

    +
      +
    • freedreno: fix memory leak
    • +
    + +

    Tim Rowley (1):

    +
      +
    • swr: [rasterizer jitter] fix llvm >= 5.0 build break
    • +
    + +

    Timothy Arceri (2):

    +
      +
    • glsl: fix lower jumps for returns when loop is inside an if
    • +
    • mesa: update lower_jumps tests after bug fix
    • +
    + +

    Topi Pohjolainen (1):

    +
      +
    • i965/gen8+: Do full stall when switching pipeline
    • +
    + +

    Xu Randy (2):

    +
      +
    • anv/blorp: Fix a crash in CmdClearColorImage
    • +
    • anv/genX: Solve the vkCreateGraphicsPipelines crash
    • +
    + +
    + + diff -Nru mesa-12.0.6/docs/relnotes/17.0.4.html mesa-17.0.7/docs/relnotes/17.0.4.html --- mesa-12.0.6/docs/relnotes/17.0.4.html 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/docs/relnotes/17.0.4.html 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,149 @@ + + + + + Mesa Release Notes + + + + +
    +

    The Mesa 3D Graphics Library

    +
    + + +
    + +

    Mesa 17.0.4 Release Notes / April 17, 2017

    + +

    +Mesa 17.0.4 is a bug fix release which fixes bugs found since the 17.0.3 release. +

    +

    +Mesa 17.0.4 implements the OpenGL 4.5 API, but the version reported by +glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) / +glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used. +Some drivers don't support all the features required in OpenGL 4.5. OpenGL +4.5 is only available if requested at context creation +because compatibility contexts are not supported. +

    + + +

    SHA256 checksums

    +
    +c4c34ba05d48f76b45bc05bc4b6e9242077f403d63c4f0c355c7b07786de233e  mesa-17.0.4.tar.gz
    +1269dc8545a193932a0779b2db5bce9be4a5f6813b98c38b93b372be8362a346  mesa-17.0.4.tar.xz
    +
    + + +

    New features

    +

    None

    + + +

    Bug fixes

    + +
      + +
    • Bug 99515 - SIGSEGV MAPERR on Android nougat-x86 with mesa 17.0.0rc
    • + +
    • Bug 100391 - SachaWillems deferredmultisampling asserts
    • + +
    • Bug 100452 - push_constants host memory leak when resetting command buffer
    • + +
    • Bug 100582 - [GEN8+] piglit.spec.arb_stencil_texturing.glblitframebuffer corrupts state.gl_texture* assertions
    • + +
    + + +

    Changes

    + +

    Alex Deucher (1):

    +
      +
    • radeonsi: add new polaris10 pci id
    • +
    + +

    Alex Smith (1):

    +
      +
    • radv: Invalidate L2 for TRANSFER_WRITE barriers
    • +
    + +

    Andres Gomez (1):

    +
      +
    • docs: add sha256 checksums for 17.0.3
    • +
    + +

    Craig Stout (1):

    +
      +
    • anv/cmd_buffer: fix host memory leak
    • +
    + +

    Emil Velikov (3):

    +
      +
    • Revert "cherry-ignore: add the Flush after unmap in gbm/dri fix"
    • +
    • Revert "freedreno: fix memory leak"
    • +
    • Update version to 17.0.4
    • +
    + +

    Fabio Estevam (1):

    +
      +
    • loader: Move non-error message to debug level
    • +
    + +

    Ilia Mirkin (4):

    +
      +
    • nvc0/ir: fix LSB/BFE/BFI implementations
    • +
    • nvc0/ir: fix overwriting of offset register with interpolateAtOffset
    • +
    • nvc0: increase texture buffer object alignment to 256 for pre-GM107
    • +
    • nouveau: when mapping a persistent buffer, synchronize on former xfers
    • +
    + +

    Jason Ekstrand (5):

    +
      +
    • i965/fs: Always provide a default LOD of 0 for TXS and TXL
    • +
    • anv/pipeline: Properly handle unset gl_Layer and gl_ViewportIndex
    • +
    • anv/blorp: Align vertex buffers to 64B
    • +
    • i965/blorp: Align vertex buffers to 64B
    • +
    • i965/blorp: Bump the batch space estimate
    • +
    + +

    Jerome Duval (2):

    +
      +
    • haiku: build fixes around debug defines
    • +
    • haiku/winsys: fix dt prototype args
    • +
    + +

    Julien Isorce (4):

    +
      +
    • winsys/radeon: check null in radeon_cs_create_fence
    • +
    • winsys/radeon: check null return from radeon_cs_create_fence in cs_flush
    • +
    • radeon: initialize hole variable before calling container_of
    • +
    • radeon_drm_bo: explicitly check return value of drmCommandWriteRead
    • +
    + +

    Kenneth Graunke (4):

    +
      +
    • i965: Document the sad story of the kernel command parser.
    • +
    • i965: Set screen->cmd_parser_version to 0 if we can't write registers.
    • +
    • i965: Skip register write detection when possible.
    • +
    • i965: Set kernel features before computing max GL version.
    • +
    + +

    Marek Olšák (1):

    +
      +
    • targets: export radeon winsys_create functions to silence LLVM warning
    • +
    + +

    Michal Srb (1):

    +
      +
    • st: Add cubeMapFace parameter to st_finalize_texture.
    • +
    + +

    Thomas Hellstrom (1):

    +
      +
    • gbm/dri: Flush after unmap
    • +
    + + +
    + + diff -Nru mesa-12.0.6/docs/relnotes/17.0.5.html mesa-17.0.7/docs/relnotes/17.0.5.html --- mesa-12.0.6/docs/relnotes/17.0.5.html 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/docs/relnotes/17.0.5.html 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,144 @@ + + + + + Mesa Release Notes + + + + +
    +

    The Mesa 3D Graphics Library

    +
    + + +
    + +

    Mesa 17.0.5 Release Notes / April 28, 2017

    + +

    +Mesa 17.0.5 is a bug fix release which fixes bugs found since the 17.0.4 release. +

    +

    +Mesa 17.0.5 implements the OpenGL 4.5 API, but the version reported by +glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) / +glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used. +Some drivers don't support all the features required in OpenGL 4.5. OpenGL +4.5 is only available if requested at context creation +because compatibility contexts are not supported. +

    + + +

    SHA256 checksums

    +
    +7510eee0d0077860b250d30d73305048c2df4ba09ea8fc04e4f3eec7beece301  mesa-17.0.5.tar.gz
    +668efa445d2f57a26e5c096b1965a685733a3b57d9c736f9d6460263847f9bfe  mesa-17.0.5.tar.xz
    +
    + + +

    New features

    +

    None

    + + +

    Bug fixes

    + +
      + +
    • Bug 97524 - Samplers referring to the same texture unit with different types should raise GL_INVALID_OPERATION
    • + +
    + + +

    Changes

    + +

    Andres Gomez (16):

    +
      +
    • cherry-ignore: Add the pci_id into the shader cache UUID
    • +
    • cherry-ignore: fix crash if ctx torn down with no rendering
    • +
    • cherry-ignore: Fix typos.
    • +
    • cherry-ignore: Revert "etnaviv: Cannot render to rb-swapped formats"
    • +
    • cherry-ignore: Revert "i965/fs: Don't emit SEL instructions for type-converting MOVs."
    • +
    • cherry-ignore: fix typo in a2b10g10r10 fast clear calculation
    • +
    • cherry-ignore: remove unused anv_dispatch_table dtable
    • +
    • cherry-ignore: remove unused radv_dispatch_table dtable
    • +
    • cherry-ignore: make radv_resolve_entrypoint static
    • +
    • cherry-ignore: vulkan: add support for libmesa_vulkan_util
    • +
    • cherry-ignore: r600: fix libmesa_amd_common dependency
    • +
    • cherry-ignore: remove dead brw_new_shader() declaration
    • +
    • cherry-ignore: remove i965_symbols_test reference from .gitignore
    • +
    • cherry-ignore: automake: ensure that the destination directory is created
    • +
    • cherry-ignore: provide required gem stubs for the tests
    • +
    • Update version to 17.0.5
    • +
    + +

    Boyan Ding (2):

    +
      +
    • nvc0/ir: Properly handle a "split form" of predicate destination
    • +
    • nir: Destination component count of shader_clock intrinsic is 2
    • +
    + +

    Emil Velikov (5):

    +
      +
    • docs: add sha256 checksums for 17.0.4
    • +
    • winsys/sw/dri: don't use GNU void pointer arithmetic
    • +
    • st/clover: add space between < and ::
    • +
    • configure.ac: check require_basic_egl only if egl enabled
    • +
    • st/mesa: automake: honour the vdpau header install location
    • +
    + +

    Francisco Jerez (2):

    +
      +
    • intel/fs: Use regs_written() in spilling cost heuristic for improved accuracy.
    • +
    • intel/fs: Take into account amount of data read in spilling cost heuristic.
    • +
    + +

    Grazvydas Ignotas (1):

    +
      +
    • radv: report timestampPeriod correctly
    • +
    + +

    Jason Ekstrand (5):

    +
      +
    • anv/blorp: Flush the texture cache in UpdateBuffer
    • +
    • anv/cmd_buffer: Flush the VF cache at the top of all primaries
    • +
    • anv/cmd_buffer: Always set up a null surface state
    • +
    • anv/cmd_buffer: Use the null surface state for ATTACHMENT_UNUSED
    • +
    • anv/blorp: Properly handle VK_ATTACHMENT_UNUSED
    • +
    + +

    Kenneth Graunke (1):

    +
      +
    • i965/vec4: Avoid reswizzling MACH instructions in opt_register_coalesce().
    • +
    + +

    Marek Olšák (1):

    +
      +
    • st/mesa: invalidate the readpix cache in st_indirect_draw_vbo
    • +
    + +

    Nanley Chery (1):

    +
      +
    • anv/cmd_buffer: Disable CCS on BDW input attachments
    • +
    + +

    Nicolai Hähnle (4):

    +
      +
    • mesa: fix remaining xfb prims check for GLES with multiple instances
    • +
    • mesa: extract need_xfb_remaining_prims_check
    • +
    • mesa: move glMultiDrawArrays to vbo and fix error handling
    • +
    • vbo: fix gl_DrawID handling in glMultiDrawArrays
    • +
    + +

    Rob Clark (1):

    +
      +
    • util/queue: don't hang at exit
    • +
    + +

    Timothy Arceri (1):

    +
      +
    • mesa: validate sampler type across the whole program
    • +
    + +
    + + diff -Nru mesa-12.0.6/docs/relnotes/17.0.6.html mesa-17.0.7/docs/relnotes/17.0.6.html --- mesa-12.0.6/docs/relnotes/17.0.6.html 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/docs/relnotes/17.0.6.html 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,186 @@ + + + + + Mesa Release Notes + + + + +
    +

    The Mesa 3D Graphics Library

    +
    + + +
    + +

    Mesa 17.0.6 Release Notes / May 12, 2017

    + +

    +Mesa 17.0.6 is a bug fix release which fixes bugs found since the 17.0.5 release. +

    +

    +Mesa 17.0.6 implements the OpenGL 4.5 API, but the version reported by +glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) / +glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used. +Some drivers don't support all the features required in OpenGL 4.5. OpenGL +4.5 is only available if requested at context creation +because compatibility contexts are not supported. +

    + + +

    SHA256 checksums

    +
    +f1b2497d553e9a584f0caa3a2d9d310e27ead15fb0af170da69f6e70fb5031cd  mesa-17.0.6.tar.gz
    +89ecf3bcd0f18dcca5aaa42bf36bb52a2df33be89889f94aaaad91f7a504a69d  mesa-17.0.6.tar.xz
    +
    + + +

    New features

    +

    None

    + + +

    Bug fixes

    + +
      + +
    • Bug 98428 - Undefined non-weak-symbol in dri-drivers
    • + +
    • Bug 100854 - YUV to RGB Color Space Conversion result is not precise
    • + +
    + + +

    Changes

    + +

    Adam Jackson (1):

    +
      +
    • egl/platform/drm: Don't take display ownership until gbm is initialized
    • +
    + +

    Andres Gomez (7):

    +
      +
    • docs: add sha256 checksums for 17.0.5
    • +
    • travis: replace Trusty-based LLVM toolchain apt-get with apt addon
    • +
    • travis: add the possibility of using the txc-dxtn library
    • +
    • cherry-ignore: 17.1 nominations only
    • +
    • cherry-ignore: fix regression in descriptor set freeing.
    • +
    • cherry-ignore: rejected commits
    • +
    • Update version to 17.0.6
    • +
    + +

    Ben Boeckel (1):

    +
      +
    • scons: update for LLVM 4.0
    • +
    + +

    Brian Paul (1):

    +
      +
    • st/mesa: move duplicated st_ws_framebuffer() function into header file
    • +
    + +

    Chad Versace (3):

    +
      +
    • egl: Emit error when EGLSurface is lost
    • +
    • egl/android: Cancel any outstanding ANativeBuffer in surface destructor
    • +
    • egl/android: Mark surface as lost when dequeueBuffer fails
    • +
    + +

    Christian Gmeiner (1):

    +
      +
    • etnaviv: add L8A8_UNORM texture format
    • +
    + +

    Dave Airlie (2):

    +
      +
    • radv/wsi: report presentation error per image request
    • +
    • radv: enable POLARIS12 support.
    • +
    + +

    Emil Velikov (21):

    +
      +
    • travis: correct libdrm required regex to also track libdrm itself
    • +
    • travis: add nearly all gallium drivers to the list
    • +
    • travis: use both cores for make/make check
    • +
    • travis: bring the scons build on par with AppVeyor
    • +
    • travis: explicitly LD_LIBRARY_PATH the local libraries
    • +
    • travis: enable apt cache
    • +
    • travis: automatically manage ccache caching
    • +
    • travis: remove unused -dev packages
    • +
    • travis: rework "if test" blocks in the script section
    • +
    • travis: split out matrix from env
    • +
    • travis: add separate "scons" and "scons llvm" targets
    • +
    • travis: add "scons swr" to the build matrix
    • +
    • travis: add "make swr" to the build matrix
    • +
    • travis: split the make target to three separate ones
    • +
    • travis: model scons check target like the make one
    • +
    • travis: add Gallium state-tracker targets
    • +
    • travis: enable wayland support
    • +
    • travis: bump MAKEFLAGS to -j4
    • +
    • gallium/dri: always link against shared glapi
    • +
    • mesa/dri: always link against shared glapi
    • +
    • glx: glX_proto_send.py: use correct compile guard GLX_INDIRECT_RENDERING
    • +
    + +

    Eric Anholt (1):

    +
      +
    • nir: Pick just the channels we want for bitmap and drawpixels lowering.
    • +
    + +

    Ilia Mirkin (1):

    +
      +
    • gallium/targets: fix bool setting on BE architectures
    • +
    + +

    Jason Ekstrand (1):

    +
      +
    • anv/cmd_buffer: Use the device allocator for QueueSubmit
    • +
    + +

    Johnson Lin (1):

    +
      +
    • nir/lower_tex: Fix minor error in YUV color conversion matrix
    • +
    + +

    Marek Olšák (2):

    +
      +
    • radeonsi: adjust ESGS ring buffer size computation on VI
    • +
    • radeonsi: apply the tess+GS hang workaround to Polaris12 as well
    • +
    + +

    Nicolai Hähnle (1):

    +
      +
    • radeonsi: fix gl_PrimitiveID in tessellation with instanced draws on SI
    • +
    + +

    Philipp Zabel (3):

    +
      +
    • renderonly: close transfer prime_fd
    • +
    • renderonly: drop resources on destroy
    • +
    • renderonly: use drmIoctl
    • +
    + +

    Rhys Kidd (3):

    +
      +
    • travis: Support LLVM 3.8+ on Trusty-based Travis-CI via apt-get not apt addon
    • +
    • travis: Add radv vulkan driver to continuous integration
    • +
    • travis: Add radeonsi to continuous integration
    • +
    + +

    Rob Clark (1):

    +
      +
    • freedreno/a3xx: fix hang w/ large render targets and small gmem
    • +
    + +

    Samuel Iglesias Gonsálvez (5):

    +
      +
    • i965/vec4: fix vertical stride to avoid breaking region parameter rule
    • +
    • i965/vec4: fix register width for DF VGRF and UNIFORM
    • +
    • i965/vec4: don't modify regioning parameters to the sources of DF align1 instructions
    • +
    • anv: anv_gem_mmap() returns MAP_FAILED as mapping error
    • +
    • anv: vkBindImageMemory() should return VK_ERROR_OUT_OF_{HOST,DEVICE}_MEMORY on failure
    • +
    + +
    + + diff -Nru mesa-12.0.6/docs/relnotes/17.0.7.html mesa-17.0.7/docs/relnotes/17.0.7.html --- mesa-12.0.6/docs/relnotes/17.0.7.html 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/docs/relnotes/17.0.7.html 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,144 @@ + + + + + Mesa Release Notes + + + + +
    +

    The Mesa 3D Graphics Library

    +
    + + +
    + +

    Mesa 17.0.7 Release Notes / June 1, 2017

    + +

    +Mesa 17.0.7 is a bug fix release which fixes bugs found since the 17.0.6 release. +

    +

    +Mesa 17.0.7 implements the OpenGL 4.5 API, but the version reported by +glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) / +glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used. +Some drivers don't support all the features required in OpenGL 4.5. OpenGL +4.5 is only available if requested at context creation +because compatibility contexts are not supported. +

    + + +

    SHA256 checksums

    +
    +TBD
    +
    + + +

    New features

    +

    None

    + + +

    Bug fixes

    + +
      + +
    • Bug 98833 - [REGRESSION, bisected] Wayland revert commit breaks non-Vsync fullscreen frame updates
    • + +
    • Bug 100741 - Chromium - Memory leak
    • + +
    • Bug 100925 - [HSW/BSW/BDW/SKL] Google Earth is not resolving all the details in the map correctly
    • + +
    + + +

    Changes

    + +

    Andres Gomez (1):

    +
      +
    • docs: add sha256 checksums for 17.0.6
    • +
    + +

    Bartosz Tomczyk (1):

    +
      +
    • mesa: Avoid leaking surface in st_renderbuffer_delete
    • +
    + +

    Chad Versace (1):

    +
      +
    • egl: Partially revert 23c86c74, fix eglMakeCurrent
    • +
    + +

    Daniel Stone (7):

    +
      +
    • vulkan: Fix Wayland uninitialised registry
    • +
    • vulkan/wsi/wayland: Remove roundtrip when creating image
    • +
    • vulkan/wsi/wayland: Use per-display event queue
    • +
    • vulkan/wsi/wayland: Use proxy wrappers for swapchain
    • +
    • egl/wayland: Don't open-code roundtrip
    • +
    • egl/wayland: Use per-surface event queues
    • +
    • egl/wayland: Ensure we get a back buffer
    • +
    + +

    Emil Velikov (5):

    +
      +
    • st/va: fix misplaced closing bracket
    • +
    • anv: automake: list shared libraries after the static ones
    • +
    • radv: automake: list shared libraries after the static ones
    • +
    • egl/wayland: select the format based on the interface used
    • +
    • Update version to 17.0.7
    • +
    + +

    Eric Anholt (2):

    +
      +
    • renderonly: Initialize fields of struct winsys_handle.
    • +
    • vc4: Don't allocate new BOs to avoid synchronization when they're shared.
    • +
    + +

    Hans de Goede (1):

    +
      +
    • glxglvnddispatch: Add missing dispatch for GetDriverConfig
    • +
    + +

    Ilia Mirkin (1):

    +
      +
    • nvc0/ir: SHLADD's middle source must be an immediate
    • +
    + +

    Jason Ekstrand (2):

    +
      +
    • i965/blorp: Do and end-of-pipe sync on both sides of fast-clear ops
    • +
    • i965: Round copy size to the nearest block in intel_miptree_copy
    • +
    + +

    Lucas Stach (1):

    +
      +
    • etnaviv: stop oversizing buffer resources
    • +
    + +

    Nanley Chery (2):

    +
      +
    • anv/formats: Update the three-channel BC1 mappings
    • +
    • i965/formats: Update the three-channel DXT1 mappings
    • +
    + +

    Pohjolainen, Topi (1):

    +
      +
    • intel/isl/gen7: Use stencil vertical alignment of 8 instead of 4
    • +
    + +

    Samuel Iglesias Gonsálvez (3):

    +
      +
    • i965/vec4/gs: restore the uniform values which was overwritten by failed vec4_gs_visitor execution
    • +
    • i965/vec4: fix swizzle and writemask when loading an uniform with constant offset
    • +
    • i965/vec4: load dvec3/4 uniforms first in the push constant buffer
    • +
    + +

    Tom Stellard (1):

    +
      +
    • gallivm: Make sure module has the correct data layout when pass manager runs
    • +
    + +
    + + diff -Nru mesa-12.0.6/docs/relnotes.html mesa-17.0.7/docs/relnotes.html --- mesa-12.0.6/docs/relnotes.html 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/docs/relnotes.html 2017-06-01 10:37:10.000000000 +0000 @@ -21,6 +21,16 @@

      +
    • 13.0.3 release notes +
    • 12.0.5 release notes +
    • 13.0.2 release notes +
    • 13.0.1 release notes +
    • 12.0.4 release notes +
    • 13.0.0 release notes +
    • 12.0.3 release notes +
    • 12.0.2 release notes +
    • 12.0.1 release notes +
    • 12.0.0 release notes
    • 11.2.2 release notes
    • 11.1.4 release notes
    • 11.2.1 release notes diff -Nru mesa-12.0.6/docs/repository.html mesa-17.0.7/docs/repository.html --- mesa-12.0.6/docs/repository.html 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/docs/repository.html 2017-06-01 10:37:10.000000000 +0000 @@ -75,7 +75,8 @@
    • Subscribe to the mesa-dev mailing list. -
    • Start contributing to the project by posting patches / review requests to +
    • Start contributing to the project by +submitting patches to the mesa-dev list. Specifically,
      • Use git send-mail to post your patches to mesa-dev. diff -Nru mesa-12.0.6/docs/shading.html mesa-17.0.7/docs/shading.html --- mesa-12.0.6/docs/shading.html 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/docs/shading.html 2017-06-01 10:37:10.000000000 +0000 @@ -172,7 +172,7 @@

      -After building Mesa, the compiler can be found at src/glsl/glsl_compiler +After building Mesa, the compiler can be found at src/compiler/glsl/glsl_compiler

      @@ -180,7 +180,7 @@ emit GL_ARB_vertex_program-style instructions:

      -    src/glsl/glsl_compiler --dump-ast myshader.vert
      +    src/compiler/glsl/glsl_compiler --version XXX --dump-ast myshader.vert
       
      Options include @@ -188,7 +188,11 @@
    • --dump-ast - dump GPU code
    • --dump-hir - dump high-level IR code
    • --dump-lir - dump low-level IR code -
    • --link - ??? +
    • --dump-builder - dump GLSL IR code +
    • --link - link shaders +
    • --just-log - display only shader / linker info if exist, +without any header or separator +
    • --version - [Mandatory] define the GLSL version to use
    @@ -196,7 +200,7 @@

    The source code for Mesa's shading language compiler is in the -src/glsl/ directory. +src/compiler/glsl/ directory.

    diff -Nru mesa-12.0.6/docs/sourcetree.html mesa-17.0.7/docs/sourcetree.html --- mesa-12.0.6/docs/sourcetree.html 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/docs/sourcetree.html 2017-06-01 10:37:10.000000000 +0000 @@ -27,14 +27,18 @@

  • include - Public OpenGL header files
  • src
      +
    • compiler - Common utility sources for different compilers. +
        +
      • glsl - the GLSL IR and compiler +
      • nir - the NIR IR and compiler +
      • spriv - the SPIR-V compiler +
    • egl - EGL library sources
        -
      • docs - EGL documentation
      • drivers - EGL drivers
      • main - main EGL library implementation. This is where all the EGL API functions are implemented, like eglCreateContext().
      -
    • glsl - the GLSL compiler
    • mapi - Mesa APIs
    • glapi - OpenGL API dispatch layer. This is where all the GL entrypoints like glClear, glBegin, etc. are generated, as well as @@ -94,7 +98,8 @@
      • i915 - Driver for Intel i915/i945.
      • llvmpipe - Software driver using LLVM for runtime code generation. -
      • nv* - Drivers for NVIDIA GPUs. +
      • nouveau - Driver for NVIDIA GPUs. +
      • radeon - Shared module for the r600 and radeonsi drivers.
      • radeonsi - Driver for AMD Southern Island.
      • r300 - Driver for ATI R300 - R500.
      • r600 - Driver for ATI/AMD R600 - Northern Island. @@ -128,16 +133,19 @@ to another.
      • util - assorted utilities for arithmetic, hashing, surface creation, memory management, 2D blitting, simple rendering, etc. +
      • XXX more
    • state_trackers -
      • clover - OpenCL state tracker
      • dri - Meta state tracker for DRI drivers
      • glx - Meta state tracker for GLX -
      • vdpau - VDPAU state tracker -
      • wgl - -
      • xorg - Meta state tracker for Xorg video drivers +
      • wgl - Windows WGL state tracker +
      • xa - XA state tracker
      • xvmc - XvMC state tracker +
      • vdpau - VDPAU state tracker +
      • va - VA-API state tracker +
      • omx - OpenMAX state tracker
    • winsys -
        @@ -148,11 +156,11 @@
      -
    • glx - The GLX library code for building libGL. This is used for - direct rendering drivers. It will dynamically load one of the - xxx_dri.so drivers. +
    • glx - The GLX library code for building libGL using DRI drivers.
    -
  • lib - where the GL libraries are placed +
  • lib - hardlinks to most binaries as produced by make. + These (shortcuts) are used for development purposes in conjunction with + LD_LIBRARY_PATH and/or LIBGL_DRIVERS_PATH. diff -Nru mesa-12.0.6/docs/specs/EGL_MESA_platform_surfaceless.txt mesa-17.0.7/docs/specs/EGL_MESA_platform_surfaceless.txt --- mesa-12.0.6/docs/specs/EGL_MESA_platform_surfaceless.txt 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/docs/specs/EGL_MESA_platform_surfaceless.txt 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,120 @@ +Name + + MESA_platform_surfaceless + +Name Strings + + EGL_MESA_platform_surfaceless + +Contributors + + Chad Versace + Haixia Shi + Stéphane Marchesin + Zach Reizner + Gurchetan Singh + +Contacts + + Chad Versace + +Status + + DRAFT + +Version + + Version 2, 2016-10-13 + +Number + + EGL Extension #TODO + +Extension Type + + EGL client extension + +Dependencies + + Requires EGL 1.5 or later; or EGL 1.4 with EGL_EXT_platform_base. + + This extension is written against the EGL 1.5 Specification (draft + 20140122). + + This extension interacts with EGL_EXT_platform_base as follows. If the + implementation supports EGL_EXT_platform_base, then text regarding + eglGetPlatformDisplay applies also to eglGetPlatformDisplayEXT; + eglCreatePlatformWindowSurface to eglCreatePlatformWindowSurfaceEXT; and + eglCreatePlatformPixmapSurface to eglCreatePlatformPixmapSurfaceEXT. + +Overview + + This extension defines a new EGL platform, the "surfaceless" platform. This + platfom's defining property is that it has no native surfaces, and hence + neither eglCreatePlatformWindowSurface nor eglCreatePlatformPixmapSurface + can be used. The platform is independent of any native window system. + + The platform's intended use case is for enabling OpenGL and OpenGL ES + applications on systems where no window system exists. However, the + platform's permitted usage is not restricted to this case. Since the + platform is independent of any native window system, it may also be used on + systems where a window system is present. + +New Types + + None + +New Procedures and Functions + + None + +New Tokens + + Accepted as the argument of eglGetPlatformDisplay: + + EGL_PLATFORM_SURFACELESS_MESA 0x31DD + +Additions to the EGL Specification + + None. + +New Behavior + + To determine if the EGL implementation supports this extension, clients + should query the EGL_EXTENSIONS string of EGL_NO_DISPLAY. + + To obtain an EGLDisplay on the surfaceless platform, call + eglGetPlatformDisplay with set to EGL_PLATFORM_SURFACELESS_MESA. + The parameter must be EGL_DEFAULT_DISPLAY. + + eglCreatePlatformWindowSurface fails when called with a that + belongs to the surfaceless platform. It returns EGL_NO_SURFACE and + generates EGL_BAD_NATIVE_WINDOW. The justification for this unconditional + failure is that the surfaceless platform has no native windows, and + therefore the parameter is always invalid. + + Likewise, eglCreatePlatformPixmapSurface also fails when called with a + that belongs to the surfaceless platform. It returns + EGL_NO_SURFACE and generates EGL_BAD_NATIVE_PIXMAP. + + The surfaceless platform imposes no platform-specific restrictions on the + creation of pbuffers, as eglCreatePbufferSurface has no native surface + parameter. Specifically, if the EGLDisplay advertises an EGLConfig whose + EGL_SURFACE_TYPE attribute contains EGL_PBUFFER_BIT, then the EGLDisplay + permits the creation of pbuffers with that config. + +Issues + + None. + +Revision History + + Version 2, 2016-10-13 (Chad Versace) + - Assign enum values + - Define interfactions with EGL 1.4 and EGL_EXT_platform_base. + - Add Gurchetan as contributor, as he implemented the pbuffer support. + + Version 1, 2016-09-23 (Chad Versace) + - Initial version + - Posted for review at + https://lists.freedesktop.org/archives/mesa-dev/2016-September/129549.html diff -Nru mesa-12.0.6/docs/specs/enums.txt mesa-17.0.7/docs/specs/enums.txt --- mesa-12.0.6/docs/specs/enums.txt 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/docs/specs/enums.txt 2017-06-01 10:37:10.000000000 +0000 @@ -1,10 +1,18 @@ +The definitive source for enum values and reserved ranges are the XML files in +the Khronos registry: -See the OpenGL ARB enum registry at http://www.opengl.org/registry/api/enum.spec + https://cvs.khronos.org/svn/repos/ogl/trunk/doc/registry/public/api/egl.xml + https://cvs.khronos.org/svn/repos/ogl/trunk/doc/registry/public/api/gl.xml + https://cvs.khronos.org/svn/repos/ogl/trunk/doc/registry/public/api/glx.xml + https://cvs.khronos.org/svn/repos/ogl/trunk/doc/registry/public/api/wgl.xml -Blocks allocated to Mesa: +GL blocks allocated to Mesa: 0x8750-0x875F 0x8BB0-0x8BBF +EGL blocks allocated to Mesa: + 0x31D0-0x31DF + 0x3290-0x329F GL_MESA_packed_depth_stencil GL_DEPTH_STENCIL_MESA 0x8750 @@ -13,7 +21,7 @@ GL_UNSIGNED_SHORT_15_1_MESA 0x8753 GL_UNSIGNED_SHORT_1_15_REV_MESA 0x8754 -GL_MESA_trace.spec: +GL_MESA_trace: GL_TRACE_ALL_BITS_MESA 0xFFFF GL_TRACE_OPERATIONS_BIT_MESA 0x0001 GL_TRACE_PRIMITIVES_BIT_MESA 0x0002 @@ -24,12 +32,12 @@ GL_TRACE_MASK_MESA 0x8755 GL_TRACE_NAME_MESA 0x8756 -MESA_ycbcr_texture.spec: +GL_MESA_ycbcr_texture: GL_YCBCR_MESA 0x8757 GL_UNSIGNED_SHORT_8_8_MESA 0x85BA /* same as Apple's */ GL_UNSIGNED_SHORT_8_8_REV_MESA 0x85BB /* same as Apple's */ -GL_MESA_pack_invert.spec +GL_MESA_pack_invert: GL_PACK_INVERT_MESA 0x8758 GL_MESA_shader_debug.spec: (obsolete) @@ -37,7 +45,7 @@ GL_DEBUG_PRINT_MESA 0x875A GL_DEBUG_ASSERT_MESA 0x875B -GL_MESA_program_debug.spec: (obsolete) +GL_MESA_program_debug: (obsolete) GL_FRAGMENT_PROGRAM_CALLBACK_MESA 0x???? GL_VERTEX_PROGRAM_CALLBACK_MESA 0x???? GL_FRAGMENT_PROGRAM_POSITION_MESA 0x???? @@ -55,3 +63,24 @@ GL_TEXTURE_1D_STACK_BINDING_MESAX 0x875D GL_TEXTURE_2D_STACK_BINDING_MESAX 0x875E +EGL_MESA_drm_image + EGL_DRM_BUFFER_FORMAT_MESA 0x31D0 + EGL_DRM_BUFFER_USE_MESA 0x31D1 + EGL_DRM_BUFFER_FORMAT_ARGB32_MESA 0x31D2 + EGL_DRM_BUFFER_MESA 0x31D3 + EGL_DRM_BUFFER_STRIDE_MESA 0x31D4 + +EGL_MESA_platform_gbm + EGL_PLATFORM_GBM_MESA 0x31D7 + +EGL_MESA_platform_surfaceless + EGL_PLATFORM_SURFACELESS_MESA 0x31DD + +EGL_WL_bind_wayland_display + EGL_TEXTURE_FORMAT 0x3080 + EGL_WAYLAND_BUFFER_WL 0x31D5 + EGL_WAYLAND_PLANE_WL 0x31D6 + EGL_TEXTURE_Y_U_V_WL 0x31D7 + EGL_TEXTURE_Y_UV_WL 0x31D8 + EGL_TEXTURE_Y_XUXV_WL 0x31D9 + EGL_WAYLAND_Y_INVERTED_WL 0x31DB diff -Nru mesa-12.0.6/docs/specs/MESA_configless_context.spec mesa-17.0.7/docs/specs/MESA_configless_context.spec --- mesa-12.0.6/docs/specs/MESA_configless_context.spec 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/docs/specs/MESA_configless_context.spec 2017-06-01 10:37:10.000000000 +0000 @@ -12,11 +12,12 @@ Status - Proposal + Superseded by the functionally identical EGL_KHR_no_config_context + extension. Version - Version 1, February 28, 2014 + Version 2, September 9, 2016 Number @@ -121,5 +122,8 @@ Revision History + Version 2, September 9, 2016 + Defer to EGL_KHR_no_config_context (Adam Jackson) + Version 1, February 28, 2014 Initial draft (Neil Roberts) diff -Nru mesa-12.0.6/docs/specs/MESA_shader_integer_functions.txt mesa-17.0.7/docs/specs/MESA_shader_integer_functions.txt --- mesa-12.0.6/docs/specs/MESA_shader_integer_functions.txt 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/docs/specs/MESA_shader_integer_functions.txt 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,520 @@ +Name + + MESA_shader_integer_functions + +Name Strings + + GL_MESA_shader_integer_functions + +Contact + + Ian Romanick + +Contributors + + All the contributors of GL_ARB_gpu_shader5 + +Status + + Supported by all GLSL 1.30 capable drivers in Mesa 12.1 and later + +Version + + Version 2, July 7, 2016 + +Number + + TBD + +Dependencies + + This extension is written against the OpenGL 3.2 (Compatibility Profile) + Specification. + + This extension is written against Version 1.50 (Revision 09) of the OpenGL + Shading Language Specification. + + GLSL 1.30 is required. + + This extension interacts with ARB_gpu_shader5. + + This extension interacts with ARB_gpu_shader_fp64. + + This extension interacts with NV_gpu_shader5. + +Overview + + GL_ARB_gpu_shader5 extends GLSL in a number of useful ways. Much of this + added functionality requires significant hardware support. There are many + aspects, however, that can be easily implmented on any GPU with "real" + integer support (as opposed to simulating integers using floating point + calculations). + + This extension provides a set of new features to the OpenGL Shading + Language to support capabilities of these GPUs, extending the capabilities + of version 1.30 of the OpenGL Shading Language. Shaders + using the new functionality provided by this extension should enable this + functionality via the construct + + #extension GL_MESA_shader_integer_functions : require (or enable) + + This extension provides a variety of new features for all shader types, + including: + + * support for implicitly converting signed integer types to unsigned + types, as well as more general implicit conversion and function + overloading infrastructure to support new data types introduced by + other extensions; + + * new built-in functions supporting: + + * splitting a floating-point number into a significand and exponent + (frexp), or building a floating-point number from a significand and + exponent (ldexp); + + * integer bitfield manipulation, including functions to find the + position of the most or least significant set bit, count the number + of one bits, and bitfield insertion, extraction, and reversal; + + * extended integer precision math, including add with carry, subtract + with borrow, and extenended multiplication; + + The resulting extension is a strict subset of GL_ARB_gpu_shader5. + +IP Status + + No known IP claims. + +New Procedures and Functions + + None + +New Tokens + + None + +Additions to Chapter 2 of the OpenGL 3.2 (Compatibility Profile) Specification +(OpenGL Operation) + + None. + +Additions to Chapter 3 of the OpenGL 3.2 (Compatibility Profile) Specification +(Rasterization) + + None. + +Additions to Chapter 4 of the OpenGL 3.2 (Compatibility Profile) Specification +(Per-Fragment Operations and the Frame Buffer) + + None. + +Additions to Chapter 5 of the OpenGL 3.2 (Compatibility Profile) Specification +(Special Functions) + + None. + +Additions to Chapter 6 of the OpenGL 3.2 (Compatibility Profile) Specification +(State and State Requests) + + None. + +Additions to Appendix A of the OpenGL 3.2 (Compatibility Profile) +Specification (Invariance) + + None. + +Additions to the AGL/GLX/WGL Specifications + + None. + +Modifications to The OpenGL Shading Language Specification, Version 1.50 +(Revision 09) + + Including the following line in a shader can be used to control the + language features described in this extension: + + #extension GL_MESA_shader_integer_functions : + + where is as specified in section 3.3. + + New preprocessor #defines are added to the OpenGL Shading Language: + + #define GL_MESA_shader_integer_functions 1 + + + Modify Section 4.1.10, Implicit Conversions, p. 27 + + (modify table of implicit conversions) + + Can be implicitly + Type of expression converted to + --------------------- ----------------- + int uint, float + ivec2 uvec2, vec2 + ivec3 uvec3, vec3 + ivec4 uvec4, vec4 + + uint float + uvec2 vec2 + uvec3 vec3 + uvec4 vec4 + + (modify second paragraph of the section) No implicit conversions are + provided to convert from unsigned to signed integer types or from + floating-point to integer types. There are no implicit array or structure + conversions. + + (insert before the final paragraph of the section) When performing + implicit conversion for binary operators, there may be multiple data types + to which the two operands can be converted. For example, when adding an + int value to a uint value, both values can be implicitly converted to uint + and float. In such cases, a floating-point type is chosen if either + operand has a floating-point type. Otherwise, an unsigned integer type is + chosen if either operand has an unsigned integer type. Otherwise, a + signed integer type is chosen. + + + Modify Section 5.9, Expressions, p. 57 + + (modify bulleted list as follows, adding support for implicit conversion + between signed and unsigned types) + + Expressions in the shading language are built from the following: + + * Constants of type bool, int, int64_t, uint, uint64_t, float, all vector + types, and all matrix types. + + ... + + * The operator modulus (%) operates on signed or unsigned integer scalars + or vectors. If the fundamental types of the operands do not match, the + conversions from Section 4.1.10 "Implicit Conversions" are applied to + produce matching types. ... + + + Modify Section 6.1, Function Definitions, p. 63 + + (modify description of overloading, beginning at the top of p. 64) + + Function names can be overloaded. The same function name can be used for + multiple functions, as long as the parameter types differ. If a function + name is declared twice with the same parameter types, then the return + types and all qualifiers must also match, and it is the same function + being declared. For example, + + vec4 f(in vec4 x, out vec4 y); // (A) + vec4 f(in vec4 x, out uvec4 y); // (B) okay, different argument type + vec4 f(in ivec4 x, out uvec4 y); // (C) okay, different argument type + + int f(in vec4 x, out ivec4 y); // error, only return type differs + vec4 f(in vec4 x, in vec4 y); // error, only qualifier differs + vec4 f(const in vec4 x, out vec4 y); // error, only qualifier differs + + When function calls are resolved, an exact type match for all the + arguments is sought. If an exact match is found, all other functions are + ignored, and the exact match is used. If no exact match is found, then + the implicit conversions in Section 4.1.10 (Implicit Conversions) will be + applied to find a match. Mismatched types on input parameters (in or + inout or default) must have a conversion from the calling argument type + to the formal parameter type. Mismatched types on output parameters (out + or inout) must have a conversion from the formal parameter type to the + calling argument type. + + If implicit conversions can be used to find more than one matching + function, a single best-matching function is sought. To determine a best + match, the conversions between calling argument and formal parameter + types are compared for each function argument and pair of matching + functions. After these comparisons are performed, each pair of matching + functions are compared. A function definition A is considered a better + match than function definition B if: + + * for at least one function argument, the conversion for that argument + in A is better than the corresponding conversion in B; and + + * there is no function argument for which the conversion in B is better + than the corresponding conversion in A. + + If a single function definition is considered a better match than every + other matching function definition, it will be used. Otherwise, a + semantic error occurs and the shader will fail to compile. + + To determine whether the conversion for a single argument in one match is + better than that for another match, the following rules are applied, in + order: + + 1. An exact match is better than a match involving any implicit + conversion. + + 2. A match involving an implicit conversion from float to double is + better than a match involving any other implicit conversion. + + 3. A match involving an implicit conversion from either int or uint to + float is better than a match involving an implicit conversion from + either int or uint to double. + + If none of the rules above apply to a particular pair of conversions, + neither conversion is considered better than the other. + + For the function prototypes (A), (B), and (C) above, the following + examples show how the rules apply to different sets of calling argument + types: + + f(vec4, vec4); // exact match of vec4 f(in vec4 x, out vec4 y) + f(vec4, uvec4); // exact match of vec4 f(in vec4 x, out ivec4 y) + f(vec4, ivec4); // matched to vec4 f(in vec4 x, out vec4 y) + // (C) not relevant, can't convert vec4 to + // ivec4. (A) better than (B) for 2nd + // argument (rule 2), same on first argument. + f(ivec4, vec4); // NOT matched. All three match by implicit + // conversion. (C) is better than (A) and (B) + // on the first argument. (A) is better than + // (B) and (C). + + + Modify Section 8.3, Common Functions, p. 84 + + (add support for single-precision frexp and ldexp functions) + + Syntax: + + genType frexp(genType x, out genIType exp); + genType ldexp(genType x, in genIType exp); + + The function frexp() splits each single-precision floating-point number in + into a binary significand, a floating-point number in the range [0.5, + 1.0), and an integral exponent of two, such that: + + x = significand * 2 ^ exponent + + The significand is returned by the function; the exponent is returned in + the parameter . For a floating-point value of zero, the significant + and exponent are both zero. For a floating-point value that is an + infinity or is not a number, the results of frexp() are undefined. + + If the input is a vector, this operation is performed in a + component-wise manner; the value returned by the function and the value + written to are vectors with the same number of components as . + + The function ldexp() builds a single-precision floating-point number from + each significand component in and the corresponding integral exponent + of two in , returning: + + significand * 2 ^ exponent + + If this product is too large to be represented as a single-precision + floating-point value, the result is considered undefined. + + If the input is a vector, this operation is performed in a + component-wise manner; the value passed in and returned by the + function are vectors with the same number of components as . + + + (add support for new integer built-in functions) + + Syntax: + + genIType bitfieldExtract(genIType value, int offset, int bits); + genUType bitfieldExtract(genUType value, int offset, int bits); + + genIType bitfieldInsert(genIType base, genIType insert, int offset, + int bits); + genUType bitfieldInsert(genUType base, genUType insert, int offset, + int bits); + + genIType bitfieldReverse(genIType value); + genUType bitfieldReverse(genUType value); + + genIType bitCount(genIType value); + genIType bitCount(genUType value); + + genIType findLSB(genIType value); + genIType findLSB(genUType value); + + genIType findMSB(genIType value); + genIType findMSB(genUType value); + + The function bitfieldExtract() extracts bits through + +-1 from each component in , returning them in the + least significant bits of corresponding component of the result. For + unsigned data types, the most significant bits of the result will be set + to zero. For signed data types, the most significant bits will be set to + the value of bit +-1. If is zero, the result will be + zero. The result will be undefined if or is negative, or + if the sum of and is greater than the number of bits used + to store the operand. Note that for vector versions of bitfieldExtract(), + a single pair of and values is shared for all components. + + The function bitfieldInsert() inserts the least significant bits of + each component of into the corresponding component of . + The result will have bits numbered through +-1 + taken from bits 0 through -1 of , and all other bits taken + directly from the corresponding bits of . If is zero, the + result will simply be . The result will be undefined if or + is negative, or if the sum of and is greater than + the number of bits used to store the operand. Note that for vector + versions of bitfieldInsert(), a single pair of and values + is shared for all components. + + The function bitfieldReverse() reverses the bits of . The bit + numbered of the result will be taken from bit (-1)- of + , where is the total number of bits used to represent + . + + The function bitCount() returns the number of one bits in the binary + representation of . + + The function findLSB() returns the bit number of the least significant one + bit in the binary representation of . If is zero, -1 will + be returned. + + The function findMSB() returns the bit number of the most significant bit + in the binary representation of . For positive integers, the + result will be the bit number of the most significant one bit. For + negative integers, the result will be the bit number of the most + significant zero bit. For a of zero or negative one, -1 will be + returned. + + + (support for unsigned integer add/subtract with carry-out) + + Syntax: + + genUType uaddCarry(genUType x, genUType y, out genUType carry); + genUType usubBorrow(genUType x, genUType y, out genUType borrow); + + The function uaddCarry() adds 32-bit unsigned integers or vectors and + , returning the sum modulo 2^32. The value is set to zero if + the sum was less than 2^32, or one otherwise. + + The function usubBorrow() subtracts the 32-bit unsigned integer or vector + from , returning the difference if non-negative or 2^32 plus the + difference, otherwise. The value is set to zero if x >= y, or + one otherwise. + + + (support for signed and unsigned multiplies, with 32-bit inputs and a + 64-bit result spanning two 32-bit outputs) + + Syntax: + + void umulExtended(genUType x, genUType y, out genUType msb, + out genUType lsb); + void imulExtended(genIType x, genIType y, out genIType msb, + out genIType lsb); + + The functions umulExtended() and imulExtended() multiply 32-bit unsigned + or signed integers or vectors and , producing a 64-bit result. The + 32 least significant bits are returned in ; the 32 most significant + bits are returned in . + + +GLX Protocol + + None. + +Dependencies on ARB_gpu_shader_fp64 + + This extension, ARB_gpu_shader_fp64, and NV_gpu_shader5 all modify the set + of implicit conversions supported in the OpenGL Shading Language. If more + than one of these extensions is supported, an expression of one type may + be converted to another type if that conversion is allowed by any of these + specifications. + + If ARB_gpu_shader_fp64 or a similar extension introducing new data types + is not supported, the function overloading rule in the GLSL specification + preferring promotion an input parameters to smaller type to a larger type + is never applicable, as all data types are of the same size. That rule + and the example referring to "double" should be removed. + + +Dependencies on NV_gpu_shader5 + + This extension, ARB_gpu_shader_fp64, and NV_gpu_shader5 all modify the set + of implicit conversions supported in the OpenGL Shading Language. If more + than one of these extensions is supported, an expression of one type may + be converted to another type if that conversion is allowed by any of these + specifications. + + If NV_gpu_shader5 is supported, integer data types are supported with four + different precisions (8-, 16, 32-, and 64-bit) and floating-point data + types are supported with three different precisions (16-, 32-, and + 64-bit). The extension adds the following rule for output parameters, + which is similar to the one present in this extension for input + parameters: + + 5. If the formal parameters in both matches are output parameters, a + conversion from a type with a larger number of bits per component is + better than a conversion from a type with a smaller number of bits + per component. For example, a conversion from an "int16_t" formal + parameter type to "int" is better than one from an "int8_t" formal + parameter type to "int". + + Such a rule is not provided in this extension because there is no + combination of types in this extension and ARB_gpu_shader_fp64 where this + rule has any effect. + + +Errors + + None + + +New State + + None + +New Implementation Dependent State + + None + +Issues + + (1) What should this extension be called? + + UNRESOLVED. This extension borrows from GL_ARB_gpu_shader5, so creating + some sort of a play on that name would be viable. However, nothing in + this extension should require SM5 hardware, so such a name would be a + little misleading and weird. + + Since the primary purpose is to add integer related functions from + GL_ARB_gpu_shader5, call this extension GL_MESA_shader_integer_functions + for now. + + (2) Why is some of the formatting in this extension weird? + + RESOLVED: This extension is formatted to minimize the differences (as + reported by 'diff --side-by-side -W180') with the GL_ARB_gpu_shader5 + specification. + + (3) Should ldexp and frexp be included? + + RESOLVED: Yes. Few GPUs have native instructions to implement these + functions. These are generally implemented using existing GLSL built-in + functions and the other functions provided by this extension. + + (4) Should umulExtended and imulExtended be included? + + RESOLVED: Yes. These functions should be implementable on any GPU that + can support the rest of this extension, but the implementation may be + complex. The implementation on a GPU that only supports 32bit x 32bit = + 32bit multiplication would be quite expensive. However, many GPUs + (including OpenGL 4.0 GPUs that already support this function) have a + 32bit x 16bit = 48bit multiplier. The implementation there is only + trivially more expensive than regular 32bit multiplication. + + (5) Should the pack and unpack functions be included? + + RESOLVED: No. These functions are already available via + GL_ARB_shading_language_packing. + + (6) Should the "BitsTo" functions be included? + + RESOLVED: No. These functions are already available via + GL_ARB_shader_bit_encoding. + +Revision History + + Rev. Date Author Changes + ---- ----------- -------- ----------------------------------------- + 2 7-Jul-2016 idr Fix typo in #extension line + 1 20-Jun-2016 idr Initial version based on GL_ARB_gpu_shader5. diff -Nru mesa-12.0.6/docs/specs/OLD/EGL_MESA_screen_surface.txt mesa-17.0.7/docs/specs/OLD/EGL_MESA_screen_surface.txt --- mesa-12.0.6/docs/specs/OLD/EGL_MESA_screen_surface.txt 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/docs/specs/OLD/EGL_MESA_screen_surface.txt 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,564 @@ +Name + + MESA_screen_surface + +Name Strings + + EGL_MESA_screen_surface + +Contact + + Brian Paul + + To discuss, join the dri-egl@lists.freedesktop.org list. + +Status + + Obsolete. + +Version + + 11 (27 January 2006) + +Number + + TBD + +Dependencies + + EGL 1.0 or later. + +Overview + + EGL 1.1 supports three types of drawing surfaces: + * Window surfaces + * Pixmap surfaces + * Pbuffer surfaces + This extension defines a fourth type of drawing surface: + * Screen surface + + A screen surface is a surface for which the (front) color buffer can + be directly displayed (i.e. scanned out) on a monitor (such as a flat + panel or CRT). In particular the color buffer memory will be allocated + at a location in VRAM (and in a suitable format) which can be displayed + by the graphics hardware. + + Note that the width and height of the screen surface need not exactly + match the monitor's current resolution. For example, while the monitor + may be configured to to show 1024x768 pixels, the associated screen + surface may be larger, such as 1200x1000. The "screen origin" attribute + will specify which region of the screen surface which is visible on the + monitor. The screen surface can be scrolled by changing this origin. + + This extension also defines functions for controlling the monitor's + display mode (width, height, refresh rate, etc), and specifing which + screen surface is to be displayed on a monitor. + + The new EGLModeMESA type and related functions are very similar to the + EGLConfig type and related functions. The user may get a list of + supported modes for a screen and specify the mode to be used when + displaying a screen surface. + + +Issues + + 1. Should EGL_INTERLACE be a supported mode attribute? + + Arguments against: + + No, this should be provided by another extension which would + also provide the mechanisms needed to play back interlaced video + material correctly on hardware that supports it. + This extension should prefer non-interlaced modes. [M. Danzer] + + Arguments for: + + An interlaced display can be of use without considering video + material. Being able to query whether a screen is operating in + interlaced mode can be used by applications to control their + drawing. For example: avoid drawing 1-pixel-wide horizontal lines + if screen is interlaced. [B. Paul] + + Resolution: Defer for future extension? + + + 2. Should EGL_REFRESH_RATE be a supported mode attribute? + + Arguments for: + + Yes, it's been shown that applications and/or users need to select + modes by this. [M. Danzer] + + Many examples have been given in which it's desirable to let the + user choose from a variety of refresh rates without having to + restart/reconfigure. [B. Paul] + + Arguments against: + + TBD. + + Resolution: Yes. + + + 3. Exactly how should the list of modes returned by eglChooseConfigMESA + be sorted? + + Current method is described in the text below. Subject to change. + + Alternately, leave the sorting order undefined so that each + implementation can return the modes in order of "most desirable" + to "least desirable" which may depend on the display technology + (CRT vs LCD, etc) or other factors. + + + 4. How should screen blanking be supported? Note that a screen can be + disabled or turned off by calling eglShowSurface(dpy, scrn, + EGL_NO_SURFACE, EGL_NO_MODE_MESA). But what about power-save mode? + + I would defer this to other extensions that depend on this one. + I can imagine people wanting different semantics not just in + relation to the power management API being exposed (DPMS or whatever) + but also relating to what events can trigger EGL_CONTEXT_LOST. Also + I'm not sure whether power management commands are properly operations + on the Display or on a screen surface. [A. Jackson] + + + 5. Should the EGL_PHYSICAL_SIZE_EGL query be kept? The size information + isn't always reliable (consider video projectors) but can still be + used to determine the pixel aspect ratio. + + Resolution: Omit. The EGL 1.2 specification includes queries for + the display resolution and pixel aspect ratio. + + + 6. Should detailed mode timing information be exposed by this API? + + Probably not. Instead, offer that information in a layered extension. + + + 7. How should the notion of a screen's "native" mode be expressed? + For example, LCD panels have a native resolution and refresh rate + that looks best but other sub-optimal resolutions may be supported. + + The mode attribute EGL_OPTIMAL_MESA will be set for modes which + best match the screen. [M. Danzer] + + + 8. Should eglQueryModeStringMESA() be included? This function returns + a human-readable string which corresponds to an EGLMode. + + Arguments for: + + A mode name such as "HDTV-720P" might mean more to users than + "1280x720@60Hz" if the later were generated via code. + + Arguments against: + + There's no standard syntax for the strings. May cause more + trouble than it's worth. + + Postpone for future extension. [A. Jackson] + + Latest discussion leaning toward omitting this function. + + + 9. Should we use "Get" or "Query" for functions which return state? + The EGL 1.x specification doesn't seem to be totally consistent + in this regard, but "Query" is used more often. + + Use "Get" for mode-related queries (as for EGLConfigs) but "Query" + for everything else. + + + 10. What should be the default size for screen surfaces? + + For Pbuffer surfaces the default width and height are zero. + We'll do the same for screen surfaces. Since there's no function + to resize surfaces it's useless to have a 0x0 screen, but this isn't + a situation that'll normally be encountered. + + + 11. Should there be a function for resizing a screen surface? + + Suppose one wants to change the screen's size in the EGL application. + Also suppose there's a hardware restriction such that only one screen + surface can exist at a time (either for lack of memory or because of + memory layout restrictions). + + The basic idea is that the currently displayed screen surface must + be deallocated before a new one can be created. Perhaps a resize + function would work better? + + + 12. How should sub-pixel LCD color information be made available? + What about the display's gamma value? + + Perhaps expose as additional read-only mode attributes. + + Perhaps postpone for a layered extension. + + + 13. What happens if the user attempts to delete a screen surface that + is currently being shown? + + Spec currently says that's illegal and that an error (TBD) will be + generated. + + + 14. What if the physical screen size can't be determined? Should + a query of EGL_PHYSICAL_SIZE_MESA return [0,0]? + + Obsolete: EGL_PHYSICAL_SIZE_MESA not used. + + + 15. Suppose the device's number of RAMDACs is different from the + number of output ports. For example, a graphics card with + two RAMDACs but three ports (VGA, DVI, TV). + + Address this in a follow-on extension. [Matthias Hopf] + + + 16. How should we deal with on-the-fly device changes? For example, + the monitor being unplugged and replaced by another with different + characteristics? + + A HAL event could be received via DBUS in the application [J. Smirl, + A. Jackson]. + + Should there be an EGL mechanism for detecting this? Maybe an + EGL_SCREEN_LOST error (similar to EGL_CONTEXT_LOST) can be recorded + when there's a screen change. At least then the application can + poll to detect this situation. + + Maybe leave that to a future extension. + + See also the EGL_SCREEN_COUNT_MESA query. + + + 17. What if pixel-accurate panning is not supported (see + eglScreenPositionMESA)? [M. Danzer] + + Is this a common problem? Can we ignore it for now? + + + 18. Should eglShowSurfaceMESA be renamed to eglShowScreenSurfaceMESA? + + Probably. + + + +New Procedures and Functions + + EGLBoolean eglChooseModeMESA(EGLDisplay dpy, EGLScreenMESA screen, + const EGLint *attrib_list, + EGLModeMESA *modes, EGLint modes_size, + EGLint *num_modes) + + EGLBoolean eglGetModesMESA(EGLDisplay dpy, EGLScreenMESA screen, + EGLModeMESA *modes, EGLint modes_size, + EGLint *num_modes) + + EGLBoolean eglGetModeAttribMESA(EGLDisplay dpy, EGLModeMESA mode, + EGLint attrib, EGLint *value) + + + EGLBoolean eglGetScreensMESA(EGLDisplay dpy, EGLScreenMESA *screens, + EGLint screens_size, EGLint *num_screens) + + EGLSurface eglCreateScreenSurfaceMESA(EGLDisplay dpy, EGLConfig config, + const EGLint *attrib_list) + + EGLBoolean eglShowSurfaceMESA(EGLDisplay dpy, EGLScreenMESA screen, + EGLSurface surface, EGLModeMESA mode) + + EGLBoolean eglScreenPositionMESA(EGLDisplay dpy, EGLScreenMESA screen, + EGLint x, EGLint y) + + + EGLBoolean eglQueryScreenMESA(EGLDisplay dpy, EGLScreenMESA screen, + EGLint attrib, EGLint *value); + + EGLBoolean eglQueryScreenSurfaceMESA(EGLDisplay dpy, EGLScreenMESA screen, + EGLSurface *surface) + + EGLBoolean eglQueryScreenModeMESA(EGLDisplay dpy, EGLScreenMESA screen, + EGLModeMESA *mode) + + const char *eglQueryModeStringMESA(EGLDisplay dpy, EGLMode mode); + + +New Types + + EGLModeMESA + EGLScreenMESA + +New Tokens + + New error codes: + + EGL_BAD_SCREEN_MESA + EGL_BAD_MODE_MESA + + Screen-related tokens: + + EGL_SCREEN_COUNT_MESA + EGL_SCREEN_POSITION_MESA + EGL_SCREEN_BIT_MESA + EGL_SCREEN_POSITION_GRANULARITY_MESA + + Mode-related tokens: + + EGL_MODE_ID_MESA + EGL_REFRESH_RATE_MESA + EGL_INTERLACED_MESA + EGL_OPTIMAL_MESA + EGL_NO_MODE_MESA + + +Additions to Chapter X of the EGL 1.1 Specification + + [XXX this all has to be rewritten to fit into the EGL specification + and match the conventions of an EGL extension. For now, just list + all the functions with brief descriptions.] + + + EGLBoolean eglChooseModeMESA(EGLDisplay dpy, const EGLScreenMESA screen, + EGLint *attrib_list, EGLModeMESA *modes, + EGLint modes_size, EGLint *num_modes) + + Like eglChooseConfig, returns a list of EGLModes which match the given + attribute list. This does not set the screen's current display mode. + The attribute list is a list of token/value pairs terminated with + EGL_NONE. Supported attributes include: + + Name Description + --------------------- --------------------------------------------- + EGL_WIDTH Mode width (resolution) + EGL_HEIGHT Mode height (resolution) + EGL_REFRESH_RATE_MESA The mode's refresh rate, multiplied by 1000 + EGL_INTERLACED_MESA 1 indicates an interlaced mode, 0 otherwise + EGL_OPTIMAL_MESA Set if the most is especially optimal for the + screen (ex. for particular LCD resolutions) + + Any other token will generate the error EGL_BAD_ATTRIBUTE. + + The list of modes returned by eglChooseModeMESA will be sorted + according to the following criteria. See the discussion of table 3.3 + in the EGL specification for more information. + + Selection Sort Sort + Attribute Default Criteria Order Priority + -------------------- -------------- ----------- ------ -------- + EGL_OPTIMAL_MESA EGL_DONT_CARE Exact 1,0 1 + EGL_INTERLACED_MESA EGL_DONT_CARE Exact 0,1 2 + EGL_REFRESH_RATE EGL_DONT_CARE AtLeast Larger 3 + EGL_WIDTH EGL_DONT_CARE AtLeast Larger 4 + EGL_HEIGHT EGL_DONT_CARE AtLeast Larger 5 + EGL_MODE_ID_MESA EGL_DONT_CARE Exact Smaller 6 + + + EGLBoolean eglGetModesMESA(EGLDisplay dpy, EGLScreenMESA screen, + EGLModeMESA *modes, EGLint modes_size, + EGLint *num_modes) + + Like eglGetConfigs, returns a list of all modes supported by the + given screen. The returned modes will be sorted in the same manner + as for eglChooseModeMESA(). + + + + EGLBoolean eglGetModeAttribMESA(EGLDisplay dpy, EGLModeMESA mode, + EGLint attrib, EGLint *value) + + Used to query mode attributes. The following attributes are supported: + + Name Return value description + --------------------- ---------------------------------------------- + EGL_OPTIMAL_MESA 1 indicates an optimal mode, 0 otherwise + EGL_INTERLACED_MESA 1 indicates an interlaced mode, 0 otherwise + EGL_REFRESH_RATE_MESA The mode's refresh rate, multiplied by 1000 + EGL_WIDTH Mode width (resolution) + EGL_HEIGHT Mode height (resolution) + EGL_MODE_ID_MESA A unique small integer identifier for the mode + + Any other token will generate the error EGL_BAD_ATTRIBUTE. + + + + EGLBoolean eglGetScreensMESA(EGLDisplay dpy, EGLScreenMESA *screens, + EGLint screens_size, EGLint *num_screens) + + This function returns an array of all available screen handles. + is the maximum number of screens to return in the + array. will return the number of screen handles + placed in the array, even if is NULL. + + The number of screens and the availability of each may change over + time (hot-plugging). Screen handles will not be reused. When a + screen handle becomes invalid, function calls which reference an + invalid handle will generate EGL_BAD_SCREEN_MESA. + + The first screen handle returned will be considered to be the primary + one. + + + + EGLSurface eglCreateScreenSurfaceMESA(EGLDisplay dpy, EGLConfig config, + const EGLint *attrib_list) + + Create a surface that can be displayed on a screen. is + an array of token/value pairs terminated with EGL_NONE. Valid tokens + include: + + Name Description + ---------------- -------------------------------- + EGL_WIDTH desired surface width in pixels + EGL_HEIGHT desired surface height in pixels + + Any other token will generate the error EGL_BAD_ATTRIBUTE. + The default width and height are zero. + + + + EGLBoolean eglShowSurfaceMESA(EGLDisplay dpy, EGLScreenMESA screen, + EGLSurface surface, EGLModeMESA mode) + + This function causes a screen to show the given surface (or more + precisely, the surface's front color buffer) with the given mode. + + If the surface is in any way incompatible with the mode, the error + EGL_BAD_MATCH will be generated, EGL_FALSE will be returned, and the + previous screen state will remain in effect. This might occur when + the bandwidth of the video-out subsystem is exceeded, or if the mode + specifies a width or height that's greater than the width or height + of the surface. + + To disable a screen, the values EGL_NO_SURFACE and EGL_NO_MODE_MESA + be passed as the and parameters. + + The values of EGL_SCREEN_POSITION_MESA are clamped to the new valid + range computed from the screen size and surface size. If the new + surface is EGL_NO_SURFACE, EGL_SCREEN_POSITION_MESA is set to [0, 0]. + + + Attempting to delete a screen surface which is currently being + displayed will result in the error EGL_BAD_ACCESS being generated. + + + + EGLBoolean eglScreenPositionMESA(EGLDisplay dpy, EGLScreenMESA screen, + EGLint x, EGLint y) + + Specifies the origin of the screen's view into the surface, if the + surface is larger than the screen. Valid values for x and y are + [0, surfaceWidth - screenWidth] and [0, surfaceHeight - screenHeight], + respectively. + + The x and y values are also constrained to be integer multiples of the + EGL_SCREEN_POSITION_GRANULARITY_MESA values. + + + + + EGLBoolean eglQueryScreenMESA(EGLDisplay dpy, EGLScreenMESA screen, + EGLint attrib, EGLint *value); + + Used to query screen attributes. may be one of the following: + + Name Return value description + ------------------------ --------------------------------------------- + EGL_SCREEN_POSITION_MESA x, y position of the screen's origin with + respect to the surface. If no surface is + attached to the screen, [0, 0] is returned. + EGL_SCREEN_POSITION_GRANULARITY_MESA + Returns the granularity, in pixels, for + which the screen position is constrained. + + Any other token will generate the error EGL_BAD_ATTRIBUTE. + + + + + EGLBoolean eglQueryScreenSurfaceMESA(EGLDisplay dpy, EGLScreenMESA screen, + EGLSurface *surface) + + Returns the surface currently displayed on the given screen. + may be EGL_NO_SURFACE if the screen isn't currently showing any surface. + + + + + EGLBoolean eglQueryScreenModeMESA(EGLDisplay dpy, EGLScreenMESA screen, + EGLModeMESA *mode) + + Returns the given screen's current display mode. The mode may be + EGL_NO_MODE_MESA if the screen is currently disabled. + + + + const char *eglQueryModeStringMESA(EGLDisplay dpy, EGLModeMESA mode); + + Returns a human-readable string for the given mode. The string is a + zero-terminated C string which the user should not attempt to free. + There is no standard syntax for mode strings. Applications should + not directly rely on mode strings. + + + +Version History + + 1. 15 March 2005 - BrianP + Initial version + + 2. 16 March 2005 - BrianP + Removed EGL_DEPTH_MESA + Added EGL_PHYSICAL_WIDTH_MESA, EGL_PHYSICAL_HEIGHT_MESA queries + Added EGL_OPTIMAL_MESA for width/height/refresh rate selection + Added possible eglQueryModeStringMESA() function + More details of the new functions explained. + + 3. 18 March 2005 - BrianP + Added screen_number to eglChooseModeMESA(). + Fix off by one mistake in value range for ORIGIN attributes + Added Issues section + + 4. 21 March 2005 - BrianP + Removed eglScreenAttribsMESA(). + Added eglScreenPositionMESA() to set screen origin. + Replaced EGL_SCREEN_X/Y_OFFSET_MESA with EGL_SCREEN_POSITION_MESA. + Replaced EGL_PHYSICAL_WIDTH/HEIGHT_MESA with EGL_PHYSICAL_SIZE_MESA. + Use EGL_OPTIMAL_MESA as a new mode attribute. (Michel Danzer) + Added a few more issues. + + 5. 6 April 2005 - BrianP + More language for eglGetModeStringMESA(). + Added issues 10, 11, 12, 13, 14. + Updated issue 3 discussion about mode sorting. + + 6. 22 April 2005 - BrianP + Fixed "LDC" typo. + Added issues 15, 16. + Changed dependency on EGL 1.1 to EGL 1.0 + s/EGL_NUM_SCREENS_MESA/EGL_SCREEN_COUNT_MESA/ + Added eglQueryDisplayMESA() to New Functions section. + Clarified language for the EGL_SCREEN_COUNT_MESA query. + + 7. 29 April 2005 - BrianP + Added EGLScreenMESA type and eglGetScreensMESA() function. [J. Smirl]. + Replaced EGLint screen_number parameters with EGLScreenMESA screen. + Added issue 17 (pixel-accurate panning) + + 8. 2 May 2005 - BrianP + Removed eglQueryDisplayMESA. + Fixed a few more EGLint -> EGLScreenMESA changes. + + 9. 20 May 2005 - BrianP + Fixed a few typos. + Updated some open issues text. + + 10. 10 August 2005 - BrianP + Added EGL_SCREEN_POSITION_GRANULARITY_MESA. + + 11. 27 January 2006 - BrianP + EGL_PHYSICAL_SIZE_MESA removed since EGL 1.2 has a similar feature. + diff -Nru mesa-12.0.6/docs/specs/WL_bind_wayland_display.spec mesa-17.0.7/docs/specs/WL_bind_wayland_display.spec --- mesa-12.0.6/docs/specs/WL_bind_wayland_display.spec 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/docs/specs/WL_bind_wayland_display.spec 2017-06-01 10:37:10.000000000 +0000 @@ -75,6 +75,7 @@ EGL_TEXTURE_Y_U_V_WL 0x31D7 EGL_TEXTURE_Y_UV_WL 0x31D8 EGL_TEXTURE_Y_XUXV_WL 0x31D9 + EGL_TEXTURE_EXTERNAL_WL 0x31DA Accepted in the parameter of eglQueryWaylandBufferWL: @@ -148,6 +149,10 @@ Two planes, samples Y from the first plane to r in the shader, U and V from the second plane to g and a. + EGL_TEXTURE_EXTERNAL_WL + Treated as a single plane texture, but sampled with + samplerExternalOES according to OES_EGL_image_external + After querying the wl_buffer layout, create EGLImages for the planes by calling eglCreateImageKHR with wl_buffer as EGLClientBuffer, EGL_WAYLAND_BUFFER_WL as the target, NULL diff -Nru mesa-12.0.6/docs/submittingpatches.html mesa-17.0.7/docs/submittingpatches.html --- mesa-12.0.6/docs/submittingpatches.html 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/docs/submittingpatches.html 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,378 @@ + + + + + Submitting patches + + + + +
    +

    The Mesa 3D Graphics Library

    +
    + + +
    + +

    Submitting patches

    + + + + +

    Basic guidelines

    + +
      +
    • Patches should not mix code changes with code formatting changes (except, +perhaps, in very trivial cases.) +
    • Code patches should follow Mesa +coding conventions. +
    • Whenever possible, patches should only effect individual Mesa/Gallium +components. +
    • Patches should never introduce build breaks and should be bisectable (see +git bisect.) +
    • Patches should be properly formatted. +
    • Patches should be sufficiently tested before submitting. +
    • Patches should be submitted to mesa-dev +for review using git send-email. + +
    + +

    Patch formatting

    + +
      +
    • Lines should be limited to 75 characters or less so that git logs +displayed in 80-column terminals avoid line wrapping. Note that git +log uses 4 spaces of indentation (4 + 75 < 80). +
    • The first line should be a short, concise summary of the change prefixed +with a module name. Examples: +
      +    mesa: Add support for querying GL_VERTEX_ATTRIB_ARRAY_LONG
      +
      +    gallium: add PIPE_CAP_DEVICE_RESET_STATUS_QUERY
      +
      +    i965: Fix missing type in local variable declaration.
      +
      +
    • Subsequent patch comments should describe the change in more detail, +if needed. For example: +
      +    i965: Remove end-of-thread SEND alignment code.
      +    
      +    This was present in Eric's initial implementation of the compaction code
      +    for Sandybridge (commit 077d01b6). There is no documentation saying this
      +    is necessary, and removing it causes no regressions in piglit on any
      +    platform.
      +
      +
    • A "Signed-off-by:" line is not required, but not discouraged either. +
    • If a patch address a bugzilla issue, that should be noted in the +patch comment. For example: +
      +   Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89689
      +
      +
    • If there have been several revisions to a patch during the review +process, they should be noted such as in this example: +
      +    st/mesa: add ARB_texture_stencil8 support (v4)
      +    
      +    if we support stencil texturing, enable texture_stencil8
      +    there is no requirement to support native S8 for this,
      +    the texture can be converted to x24s8 fine.
      +    
      +    v2: fold fixes from Marek in:
      +       a) put S8 last in the list
      +       b) fix renderable to always test for d/s renderable
      +        fixup the texture case to use a stencil only format
      +        for picking the format for the texture view.
      +    v3: hit fallback for getteximage
      +    v4: put s8 back in front, it shouldn't get picked now (Ilia)
      +
      +
    • If someone tested your patch, document it with a line like this: +
      +    Tested-by: Joe Hacker <jhacker@foo.com>
      +
      +
    • If the patch was reviewed (usually the case) or acked by someone, +that should be documented with: +
      +    Reviewed-by: Joe Hacker <jhacker@foo.com>
      +    Acked-by: Joe Hacker <jhacker@foo.com>
      +
      +
    • If sending later revision of a patch, add all the tags - ack, r-b, +Cc: mesa-stable and/or other. This provides reviewers with quick feedback if the +patch has already been reviewed. +
    • In order for your patch to reach the prospective reviewer easier/faster, +use the script scripts/get_reviewer.pl to get a list of individuals and include +them in the CC list. +
      +Please use common sense and do not blindly add everyone. +
      +
      +    $ scripts/get_reviewer.pl --help # to get the the help screen
      +    $ scripts/get_reviewer.pl -f src/egl/drivers/dri2/platform_android.c
      +    Rob Herring  (reviewer:ANDROID EGL SUPPORT,added_lines:188/700=27%,removed_lines:58/283=20%)
      +    Tomasz Figa  (reviewer:ANDROID EGL SUPPORT,authored:12/41=29%,added_lines:308/700=44%,removed_lines:115/283=41%)
      +    Emil Velikov  (authored:13/41=32%,removed_lines:76/283=27%)
      +
      +
    + + + +

    Testing Patches

    + +

    +It should go without saying that patches must be tested. In general, +do whatever testing is prudent. +

    + +

    +You should always run the Mesa test suite before submitting patches. +The test suite can be run using the 'make check' command. All tests +must pass before patches will be accepted, this may mean you have +to update the tests themselves. +

    + +

    +Whenever possible and applicable, test the patch with +Piglit and/or +dEQP +to check for regressions. +

    + + +

    Mailing Patches

    + +

    +Patches should be sent to the mesa-dev mailing list for review: + +mesa-dev@lists.freedesktop.org. +When submitting a patch make sure to use +git send-email +rather than attaching patches to emails. Sending patches as +attachments prevents people from being able to provide in-line review +comments. +

    + +

    +When submitting follow-up patches you can use --in-reply-to to make v2, v3, +etc patches show up as replies to the originals. This usually works well +when you're sending out updates to individual patches (as opposed to +re-sending the whole series). Using --in-reply-to makes +it harder for reviewers to accidentally review old patches. +

    + +

    +When submitting follow-up patches you should also login to +patchwork and change the +state of your old patches to Superseded. +

    + +

    Reviewing Patches

    + +

    +When you've reviewed a patch on the mailing list, please be unambiguous +about your review. That is, state either +

    +
    +    Reviewed-by: Joe Hacker <jhacker@foo.com>
    +
    +or +
    +    Acked-by: Joe Hacker <jhacker@foo.com>
    +
    +

    +Rather than saying just "LGTM" or "Seems OK". +

    + +

    +If small changes are suggested, it's OK to say something like: +

    +
    +   With the above fixes, Reviewed-by: Joe Hacker <jhacker@foo.com>
    +
    +

    +which tells the patch author that the patch can be committed, as long +as the issues are resolved first. +

    + + +

    Nominating a commit for a stable branch

    + +

    +There are three ways to nominate patch for inclusion of the stable branch and +release. +

    +
      +
    • By adding the Cc: mesa-stable@ tag as described below. +
    • Sending the commit ID (as seen in master branch) to the mesa-stable@ mailing list. +
    • Forwarding the patch from the mesa-dev@ mailing list. +
    • +
    +

    +Note: resending patch identical to one on mesa-dev@ or one that differs only +by the extra mesa-stable@ tag is not recommended. +

    + + +

    The stable tag

    + +

    +If you want a commit to be applied to a stable branch, +you should add an appropriate note to the commit message. +

    + +

    +Here are some examples of such a note: +

    +
      +
    • CC: <mesa-stable@lists.freedesktop.org>
    • +
    • CC: "9.2 10.0" <mesa-stable@lists.freedesktop.org>
    • +
    • CC: "10.0" <mesa-stable@lists.freedesktop.org>
    • +
    + +Simply adding the CC to the mesa-stable list address is adequate to nominate +the commit for the most-recently-created stable branch. It is only necessary +to specify a specific branch name, (such as "9.2 10.0" or "10.0" in the +examples above), if you want to nominate the commit for an older stable +branch. And, as in these examples, you can nominate the commit for the older +branch in addition to the more recent branch, or nominate the commit +exclusively for the older branch. + +This "CC" syntax for patch nomination will cause patches to automatically be +copied to the mesa-stable@ mailing list when you use "git send-email" to send +patches to the mesa-dev@ mailing list. If you prefer using --suppress-cc that +won't have any effect negative effect on the patch nomination. + +

    +Note: by removing the tag [as the commit is pushed] the patch is +explicitly rejected from inclusion in the stable branch(es). +
    +Thus, drop the line only if you want to cancel the nomination. +

    + +

    Criteria for accepting patches to the stable branch

    + +Mesa has a designated release manager for each stable branch, and the release +manager is the only developer that should be pushing changes to these +branches. Everyone else should simply nominate patches using the mechanism +described above. + +The stable-release manager will work with the list of nominated patches, and +for each patch that meets the criteria below will cherry-pick the patch with: +git cherry-pick -x <commit>. The -x option is +important so that the picked patch references the commit ID of the original +patch. + +The stable-release manager may at times need to force-push changes to the +stable branches, for example, to drop a previously-picked patch that was later +identified as causing a regression). These force-pushes may cause changes to +be lost from the stable branch if developers push things directly. Consider +yourself warned. + +The stable-release manager is also given broad discretion in rejecting patches +that have been nominated for the stable branch. The most basic rule is that +the stable branch is for bug fixes only, (no new features, no +regressions). Here is a non-exhaustive list of some reasons that a patch may +be rejected: + +
      +
    • Patch introduces a regression. Any reported build breakage or other + regression caused by a particular patch, (game no longer work, piglit test + changes from PASS to FAIL), is justification for rejecting a patch.
    • + +
    • Patch is too large, (say, larger than 100 lines)
    • + +
    • Patch is not a fix. For example, a commit that moves code around with no + functional change should be rejected.
    • + +
    • Patch fix is not clearly described. For example, a commit message + of only a single line, no description of the bug, no mention of bugzilla, + etc.
    • + +
    • Patch has not obviously been reviewed, For example, the commit message + has no Reviewed-by, Signed-off-by, nor Tested-by tags from anyone but the + author.
    • + +
    • Patch has not already been merged to the master branch. As a rule, bug + fixes should never be applied first to a stable branch. Patches should land + first on the master branch and then be cherry-picked to a stable + branch. (This is to avoid future releases causing regressions if the patch + is not also applied to master.) The only things that might look like + exceptions would be backports of patches from master that happen to look + significantly different.
    • + +
    • Patch depends on too many other patches. Ideally, all stable-branch + patches should be self-contained. It sometimes occurs that a single, logical + bug-fix occurs as two separate patches on master, (such as an original + patch, then a subsequent fix-up to that patch). In such a case, these two + patches should be squashed into a single, self-contained patch for the + stable branch. (Of course, if the squashing makes the patch too large, then + that could be a reason to reject the patch.)
    • + +
    • Patch includes new feature development, not bug fixes. New OpenGL + features, extensions, etc. should be applied to Mesa master and included in + the next major release. Stable releases are intended only for bug fixes. + + Note: As an exception to this rule, the stable-release manager may accept + hardware-enabling "features". For example, backports of new code to support + a newly-developed hardware product can be accepted if they can be reasonably + determined to not have effects on other hardware.
    • + +
    • Patch is a performance optimization. As a rule, performance patches are + not candidates for the stable branch. The only exception might be a case + where an application's performance was recently severely impacted so as to + become unusable. The fix for this performance regression could then be + considered for a stable branch. The optimization must also be + non-controversial and the patches still need to meet the other criteria of + being simple and self-contained
    • + +
    • Patch introduces a new failure mode (such as an assert). While the new + assert might technically be correct, for example to make Mesa more + conformant, this is not the kind of "bug fix" we want in a stable + release. The potential problem here is that an OpenGL program that was + previously working, (even if technically non-compliant with the + specification), could stop working after this patch. So that would be a + regression that is unacceptable for the stable branch.
    • +
    + +

    Git tips

    + +
      +
    • git rebase -i ... is your friend. Don't be afraid to use it. +
    • Apply a fixup to commit FOO. +
      +    git add ...
      +    git commit --fixup=FOO
      +    git rebase -i --autosquash ...
      +
      +
    • Test for build breakage between patches e.g last 8 commits. +
      +    git rebase -i --exec="make -j4" HEAD~8
      +
      +
    • Sets the default mailing address for your repo. +
      +    git config --local sendemail.to mesa-dev@lists.freedesktop.org
      +
      +
    • Add version to subject line of patch series in this case for the last 8 +commits before sending. +
      +    git send-email --subject-prefix="PATCH v4" HEAD~8
      +    git send-email -v4 @~8 # shorter version, inherited from git format-patch
      +
      +
    • Configure git to use the get_reviewer.pl script interactively. Thus you +can avoid adding the world to the CC list. +
      +    git config sendemail.cccmd "./scripts/get_reviewer.pl -i"
      +
      +
    + + +
    + + diff -Nru mesa-12.0.6/docs/xlibdriver.html mesa-17.0.7/docs/xlibdriver.html --- mesa-12.0.6/docs/xlibdriver.html 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/docs/xlibdriver.html 2017-06-01 10:37:10.000000000 +0000 @@ -199,7 +199,7 @@

    Extensions

    -The following MESA-specific extensions are implemented in the Xlib driver. +The following Mesa-specific extensions are implemented in the Xlib driver.

    GLX_MESA_pixmap_colormap

    diff -Nru mesa-12.0.6/include/c11/.editorconfig mesa-17.0.7/include/c11/.editorconfig --- mesa-12.0.6/include/c11/.editorconfig 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/include/c11/.editorconfig 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,3 @@ +[*.h] +indent_style = space +indent_size = 4 diff -Nru mesa-12.0.6/include/c11/threads.h mesa-17.0.7/include/c11/threads.h --- mesa-12.0.6/include/c11/threads.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/include/c11/threads.h 2017-06-01 10:37:10.000000000 +0000 @@ -30,6 +30,9 @@ #define EMULATED_THREADS_H_INCLUDED_ #include +#ifdef _MSC_VER +#include // for xtime +#endif #ifndef TIME_UTC #define TIME_UTC 1 @@ -41,11 +44,13 @@ typedef void (*tss_dtor_t)(void*); typedef int (*thrd_start_t)(void*); +#ifndef _MSC_VER struct xtime { time_t sec; long nsec; }; typedef struct xtime xtime; +#endif /*-------------------- enumeration constants --------------------*/ diff -Nru mesa-12.0.6/include/c11/threads_posix.h mesa-17.0.7/include/c11/threads_posix.h --- mesa-12.0.6/include/c11/threads_posix.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/include/c11/threads_posix.h 2017-06-01 10:37:10.000000000 +0000 @@ -184,7 +184,7 @@ * Thus the linker will be happy and things don't clash when building * with -O1 or greater. */ -#ifdef HAVE_FUNC_ATTRIBUTE_WEAK +#if defined(HAVE_FUNC_ATTRIBUTE_WEAK) && !defined(__CYGWIN__) __attribute__((weak)) int pthread_mutexattr_init(pthread_mutexattr_t *attr); diff -Nru mesa-12.0.6/include/c99_compat.h mesa-17.0.7/include/c99_compat.h --- mesa-12.0.6/include/c99_compat.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/include/c99_compat.h 2017-06-01 10:37:10.000000000 +0000 @@ -163,6 +163,7 @@ # define HAVE_FUNC_ATTRIBUTE_UNUSED 1 # define HAVE_FUNC_ATTRIBUTE_FORMAT 1 # define HAVE_FUNC_ATTRIBUTE_PACKED 1 +# define HAVE_FUNC_ATTRIBUTE_ALIAS 1 # if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 3) /* https://gcc.gnu.org/onlinedocs/gcc-4.3.6/gcc/Other-Builtins.html */ diff -Nru mesa-12.0.6/include/D3D9/.editorconfig mesa-17.0.7/include/D3D9/.editorconfig --- mesa-12.0.6/include/D3D9/.editorconfig 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/include/D3D9/.editorconfig 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,2 @@ +[*.h] +indent_style = tab diff -Nru mesa-12.0.6/include/d3dadapter/present.h mesa-17.0.7/include/d3dadapter/present.h --- mesa-12.0.6/include/d3dadapter/present.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/include/d3dadapter/present.h 2017-06-01 10:37:10.000000000 +0000 @@ -35,6 +35,22 @@ typedef struct ID3DAdapter9 ID3DAdapter9; typedef struct D3DWindowBuffer D3DWindowBuffer; +/* Available since version 1.3 */ +typedef struct _D3DPRESENT_PARAMETERS2_ { + /* Whether D3DSWAPEFFECT_DISCARD is allowed to release the + * D3DWindowBuffers in any order, and eventually with a delay. + * FALSE (Default): buffers should be released as soon as possible. + * TRUE: it is allowed to release some buffers with a delay, and in + * a random order. */ + BOOL AllowDISCARDDelayedRelease; + /* User preference for D3DSWAPEFFECT_DISCARD with D3DPRESENT_INTERVAL_IMMEDIATE. + * FALSE (Default): User prefers presentation to occur as soon as possible, + * with potential tearings. + * TRUE: User prefers presentation to be tear free. Requires + * AllowDISCARDDelayedRelease to have any effect. */ + BOOL TearFreeDISCARD; +} D3DPRESENT_PARAMETERS2, *PD3DPRESENT_PARAMETERS2, *LPD3DPRESENT_PARAMETERS2; + /* Presentation backend for drivers to display their brilliant work */ typedef struct ID3DPresentVtbl { @@ -54,7 +70,10 @@ HRESULT (WINAPI *DestroyD3DWindowBuffer)(ID3DPresent *This, D3DWindowBuffer *buffer); /* After presenting a buffer to the window system, the buffer * may be used as is (no copy of the content) by the window system. - * You must not use a non-released buffer, else the user may see undefined content. */ + * You must not use a non-released buffer, else the user may see undefined content. + * Note: This function waits as well that the buffer content was displayed (this + * can be after the release of the buffer if the window system decided to make + * an internal copy and release early. */ HRESULT (WINAPI *WaitBufferReleased)(ID3DPresent *This, D3DWindowBuffer *buffer); HRESULT (WINAPI *FrontBufferCopy)(ID3DPresent *This, D3DWindowBuffer *buffer); /* It is possible to do partial copy, but impossible to do resizing, which must @@ -75,6 +94,11 @@ BOOL (WINAPI *ResolutionMismatch)(ID3DPresent *This); HANDLE (WINAPI *CreateThread)(ID3DPresent *This, void *pThreadfunc, void *pParam); BOOL (WINAPI *WaitForThread)(ID3DPresent *This, HANDLE thread); + /* Available since version 1.3 */ + HRESULT (WINAPI *SetPresentParameters2)(ID3DPresent *This, D3DPRESENT_PARAMETERS2 *pParameters); + BOOL (WINAPI *IsBufferReleased)(ID3DPresent *This, D3DWindowBuffer *buffer); + /* Wait a buffer gets released. */ + HRESULT (WINAPI *WaitBufferReleaseEvent)(ID3DPresent *This); } ID3DPresentVtbl; struct ID3DPresent @@ -106,6 +130,9 @@ #define ID3DPresent_ResolutionMismatch(p) (p)->lpVtbl->ResolutionMismatch(p) #define ID3DPresent_CreateThread(p,a,b) (p)->lpVtbl->CreateThread(p,a,b) #define ID3DPresent_WaitForThread(p,a) (p)->lpVtbl->WaitForThread(p,a) +#define ID3DPresent_SetPresentParameters2(p,a) (p)->lpVtbl->SetPresentParameters2(p,a) +#define ID3DPresent_IsBufferReleased(p,a) (p)->lpVtbl->IsBufferReleased(p,a) +#define ID3DPresent_WaitBufferReleaseEvent(p) (p)->lpVtbl->WaitBufferReleaseEvent(p) typedef struct ID3DPresentGroupVtbl { diff -Nru mesa-12.0.6/include/EGL/eglext.h mesa-17.0.7/include/EGL/eglext.h --- mesa-12.0.6/include/EGL/eglext.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/include/EGL/eglext.h 2017-06-01 10:37:10.000000000 +0000 @@ -6,7 +6,7 @@ #endif /* -** Copyright (c) 2013-2014 The Khronos Group Inc. +** Copyright (c) 2013-2016 The Khronos Group Inc. ** ** Permission is hereby granted, free of charge, to any person obtaining a ** copy of this software and/or associated documentation files (the @@ -38,7 +38,7 @@ #include -#define EGL_EGLEXT_VERSION 20150508 +#define EGL_EGLEXT_VERSION 20160809 /* Generated C header for: * API: egl @@ -99,6 +99,33 @@ #define EGL_CONTEXT_OPENGL_NO_ERROR_KHR 0x31B3 #endif /* EGL_KHR_create_context_no_error */ +#ifndef EGL_KHR_debug +#define EGL_KHR_debug 1 +typedef void *EGLLabelKHR; +typedef void *EGLObjectKHR; +typedef void (EGLAPIENTRY *EGLDEBUGPROCKHR)(EGLenum error,const char *command,EGLint messageType,EGLLabelKHR threadLabel,EGLLabelKHR objectLabel,const char* message); +#define EGL_OBJECT_THREAD_KHR 0x33B0 +#define EGL_OBJECT_DISPLAY_KHR 0x33B1 +#define EGL_OBJECT_CONTEXT_KHR 0x33B2 +#define EGL_OBJECT_SURFACE_KHR 0x33B3 +#define EGL_OBJECT_IMAGE_KHR 0x33B4 +#define EGL_OBJECT_SYNC_KHR 0x33B5 +#define EGL_OBJECT_STREAM_KHR 0x33B6 +#define EGL_DEBUG_MSG_CRITICAL_KHR 0x33B9 +#define EGL_DEBUG_MSG_ERROR_KHR 0x33BA +#define EGL_DEBUG_MSG_WARN_KHR 0x33BB +#define EGL_DEBUG_MSG_INFO_KHR 0x33BC +#define EGL_DEBUG_CALLBACK_KHR 0x33B8 +typedef EGLint (EGLAPIENTRYP PFNEGLDEBUGMESSAGECONTROLKHRPROC) (EGLDEBUGPROCKHR callback, const EGLAttrib *attrib_list); +typedef EGLBoolean (EGLAPIENTRYP PFNEGLQUERYDEBUGKHRPROC) (EGLint attribute, EGLAttrib *value); +typedef EGLint (EGLAPIENTRYP PFNEGLLABELOBJECTKHRPROC) (EGLDisplay display, EGLenum objectType, EGLObjectKHR object, EGLLabelKHR label); +#ifdef EGL_EGLEXT_PROTOTYPES +EGLAPI EGLint EGLAPIENTRY eglDebugMessageControlKHR (EGLDEBUGPROCKHR callback, const EGLAttrib *attrib_list); +EGLAPI EGLBoolean EGLAPIENTRY eglQueryDebugKHR (EGLint attribute, EGLAttrib *value); +EGLAPI EGLint EGLAPIENTRY eglLabelObjectKHR (EGLDisplay display, EGLenum objectType, EGLObjectKHR object, EGLLabelKHR label); +#endif +#endif /* EGL_KHR_debug */ + #ifndef EGL_KHR_fence_sync #define EGL_KHR_fence_sync 1 typedef khronos_utime_nanoseconds_t EGLTimeKHR; @@ -223,6 +250,16 @@ #endif #endif /* EGL_KHR_lock_surface3 */ +#ifndef EGL_KHR_mutable_render_buffer +#define EGL_KHR_mutable_render_buffer 1 +#define EGL_MUTABLE_RENDER_BUFFER_BIT_KHR 0x1000 +#endif /* EGL_KHR_mutable_render_buffer */ + +#ifndef EGL_KHR_no_config_context +#define EGL_KHR_no_config_context 1 +#define EGL_NO_CONFIG_KHR ((EGLConfig)0) +#endif /* EGL_KHR_no_config_context */ + #ifndef EGL_KHR_partial_update #define EGL_KHR_partial_update 1 #define EGL_BUFFER_AGE_KHR 0x313D @@ -402,11 +439,28 @@ #endif #endif /* EGL_ANDROID_blob_cache */ +#ifndef EGL_ANDROID_create_native_client_buffer +#define EGL_ANDROID_create_native_client_buffer 1 +#define EGL_NATIVE_BUFFER_USAGE_ANDROID 0x3143 +#define EGL_NATIVE_BUFFER_USAGE_PROTECTED_BIT_ANDROID 0x00000001 +#define EGL_NATIVE_BUFFER_USAGE_RENDERBUFFER_BIT_ANDROID 0x00000002 +#define EGL_NATIVE_BUFFER_USAGE_TEXTURE_BIT_ANDROID 0x00000004 +typedef EGLClientBuffer (EGLAPIENTRYP PFNEGLCREATENATIVECLIENTBUFFERANDROIDPROC) (const EGLint *attrib_list); +#ifdef EGL_EGLEXT_PROTOTYPES +EGLAPI EGLClientBuffer EGLAPIENTRY eglCreateNativeClientBufferANDROID (const EGLint *attrib_list); +#endif +#endif /* EGL_ANDROID_create_native_client_buffer */ + #ifndef EGL_ANDROID_framebuffer_target #define EGL_ANDROID_framebuffer_target 1 #define EGL_FRAMEBUFFER_TARGET_ANDROID 0x3147 #endif /* EGL_ANDROID_framebuffer_target */ +#ifndef EGL_ANDROID_front_buffer_auto_refresh +#define EGL_ANDROID_front_buffer_auto_refresh 1 +#define EGL_FRONT_BUFFER_AUTO_REFRESH_ANDROID 0x314C +#endif /* EGL_ANDROID_front_buffer_auto_refresh */ + #ifndef EGL_ANDROID_image_native_buffer #define EGL_ANDROID_image_native_buffer 1 #define EGL_NATIVE_BUFFER_ANDROID 0x3140 @@ -424,6 +478,15 @@ #endif #endif /* EGL_ANDROID_native_fence_sync */ +#ifndef EGL_ANDROID_presentation_time +#define EGL_ANDROID_presentation_time 1 +typedef khronos_stime_nanoseconds_t EGLnsecsANDROID; +typedef EGLBoolean (EGLAPIENTRYP PFNEGLPRESENTATIONTIMEANDROIDPROC) (EGLDisplay dpy, EGLSurface surface, EGLnsecsANDROID time); +#ifdef EGL_EGLEXT_PROTOTYPES +EGLAPI EGLBoolean EGLAPIENTRY eglPresentationTimeANDROID (EGLDisplay dpy, EGLSurface surface, EGLnsecsANDROID time); +#endif +#endif /* EGL_ANDROID_presentation_time */ + #ifndef EGL_ANDROID_recordable #define EGL_ANDROID_recordable 1 #define EGL_RECORDABLE_ANDROID 0x3142 @@ -616,9 +679,13 @@ #define EGL_PLATFORM_X11_SCREEN_EXT 0x31D6 #endif /* EGL_EXT_platform_x11 */ +#ifndef EGL_EXT_protected_content +#define EGL_EXT_protected_content 1 +#define EGL_PROTECTED_CONTENT_EXT 0x32C0 +#endif /* EGL_EXT_protected_content */ + #ifndef EGL_EXT_protected_surface #define EGL_EXT_protected_surface 1 -#define EGL_PROTECTED_CONTENT_EXT 0x32C0 #endif /* EGL_EXT_protected_surface */ #ifndef EGL_EXT_stream_consumer_egloutput @@ -697,6 +764,12 @@ #define EGL_CONTEXT_PRIORITY_LOW_IMG 0x3103 #endif /* EGL_IMG_context_priority */ +#ifndef EGL_IMG_image_plane_attribs +#define EGL_IMG_image_plane_attribs 1 +#define EGL_NATIVE_BUFFER_MULTIPLANE_SEPARATE_IMG 0x3105 +#define EGL_NATIVE_BUFFER_PLANE_OFFSET_IMG 0x3106 +#endif /* EGL_IMG_image_plane_attribs */ + #ifndef EGL_MESA_drm_image #define EGL_MESA_drm_image 1 #define EGL_DRM_BUFFER_FORMAT_MESA 0x31D0 @@ -812,6 +885,48 @@ #endif #endif /* EGL_NV_post_sub_buffer */ +#ifndef EGL_NV_robustness_video_memory_purge +#define EGL_NV_robustness_video_memory_purge 1 +#define EGL_GENERATE_RESET_ON_VIDEO_MEMORY_PURGE_NV 0x334C +#endif /* EGL_NV_robustness_video_memory_purge */ + +#ifndef EGL_NV_stream_consumer_gltexture_yuv +#define EGL_NV_stream_consumer_gltexture_yuv 1 +#define EGL_YUV_PLANE0_TEXTURE_UNIT_NV 0x332C +#define EGL_YUV_PLANE1_TEXTURE_UNIT_NV 0x332D +#define EGL_YUV_PLANE2_TEXTURE_UNIT_NV 0x332E +typedef EGLBoolean (EGLAPIENTRYP PFNEGLSTREAMCONSUMERGLTEXTUREEXTERNALATTRIBSNVPROC) (EGLDisplay dpy, EGLStreamKHR stream, EGLAttrib *attrib_list); +#ifdef EGL_EGLEXT_PROTOTYPES +EGLAPI EGLBoolean EGLAPIENTRY eglStreamConsumerGLTextureExternalAttribsNV (EGLDisplay dpy, EGLStreamKHR stream, EGLAttrib *attrib_list); +#endif +#endif /* EGL_NV_stream_consumer_gltexture_yuv */ + +#ifndef EGL_NV_stream_metadata +#define EGL_NV_stream_metadata 1 +#define EGL_MAX_STREAM_METADATA_BLOCKS_NV 0x3250 +#define EGL_MAX_STREAM_METADATA_BLOCK_SIZE_NV 0x3251 +#define EGL_MAX_STREAM_METADATA_TOTAL_SIZE_NV 0x3252 +#define EGL_PRODUCER_METADATA_NV 0x3253 +#define EGL_CONSUMER_METADATA_NV 0x3254 +#define EGL_PENDING_METADATA_NV 0x3328 +#define EGL_METADATA0_SIZE_NV 0x3255 +#define EGL_METADATA1_SIZE_NV 0x3256 +#define EGL_METADATA2_SIZE_NV 0x3257 +#define EGL_METADATA3_SIZE_NV 0x3258 +#define EGL_METADATA0_TYPE_NV 0x3259 +#define EGL_METADATA1_TYPE_NV 0x325A +#define EGL_METADATA2_TYPE_NV 0x325B +#define EGL_METADATA3_TYPE_NV 0x325C +typedef EGLBoolean (EGLAPIENTRYP PFNEGLQUERYDISPLAYATTRIBNVPROC) (EGLDisplay dpy, EGLint attribute, EGLAttrib *value); +typedef EGLBoolean (EGLAPIENTRYP PFNEGLSETSTREAMMETADATANVPROC) (EGLDisplay dpy, EGLStreamKHR stream, EGLint n, EGLint offset, EGLint size, const void *data); +typedef EGLBoolean (EGLAPIENTRYP PFNEGLQUERYSTREAMMETADATANVPROC) (EGLDisplay dpy, EGLStreamKHR stream, EGLenum name, EGLint n, EGLint offset, EGLint size, void *data); +#ifdef EGL_EGLEXT_PROTOTYPES +EGLAPI EGLBoolean EGLAPIENTRY eglQueryDisplayAttribNV (EGLDisplay dpy, EGLint attribute, EGLAttrib *value); +EGLAPI EGLBoolean EGLAPIENTRY eglSetStreamMetadataNV (EGLDisplay dpy, EGLStreamKHR stream, EGLint n, EGLint offset, EGLint size, const void *data); +EGLAPI EGLBoolean EGLAPIENTRY eglQueryStreamMetadataNV (EGLDisplay dpy, EGLStreamKHR stream, EGLenum name, EGLint n, EGLint offset, EGLint size, void *data); +#endif +#endif /* EGL_NV_stream_metadata */ + #ifndef EGL_NV_stream_sync #define EGL_NV_stream_sync 1 #define EGL_SYNC_NEW_FRAME_NV 0x321F diff -Nru mesa-12.0.6/include/EGL/eglmesaext.h mesa-17.0.7/include/EGL/eglmesaext.h --- mesa-12.0.6/include/EGL/eglmesaext.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/include/EGL/eglmesaext.h 2017-06-01 10:37:10.000000000 +0000 @@ -52,6 +52,7 @@ #define EGL_TEXTURE_Y_U_V_WL 0x31D7 #define EGL_TEXTURE_Y_UV_WL 0x31D8 #define EGL_TEXTURE_Y_XUXV_WL 0x31D9 +#define EGL_TEXTURE_EXTERNAL_WL 0x31DA struct wl_display; struct wl_resource; @@ -84,6 +85,11 @@ #define EGL_NO_CONFIG_MESA ((EGLConfig)0) #endif +#ifndef EGL_MESA_platform_surfaceless +#define EGL_MESA_platform_surfaceless 1 +#define EGL_PLATFORM_SURFACELESS_MESA 0x31DD +#endif /* EGL_MESA_platform_surfaceless */ + #ifdef __cplusplus } #endif diff -Nru mesa-12.0.6/include/GL/glext.h mesa-17.0.7/include/GL/glext.h --- mesa-12.0.6/include/GL/glext.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/include/GL/glext.h 2017-06-01 10:37:10.000000000 +0000 @@ -33,7 +33,7 @@ ** used to make the header, and the header can be found at ** http://www.opengl.org/registry/ ** -** Khronos $Revision: 32957 $ on $Date: 2016-06-09 17:03:08 -0400 (Thu, 09 Jun 2016) $ +** Khronos $Revision: 33061 $ on $Date: 2016-07-14 20:14:13 -0400 (Thu, 14 Jul 2016) $ */ #if defined(_WIN32) && !defined(APIENTRY) && !defined(__CYGWIN__) && !defined(__SCITECH_SNAP__) @@ -53,7 +53,7 @@ #define GLAPI extern #endif -#define GL_GLEXT_VERSION 20160609 +#define GL_GLEXT_VERSION 20160714 /* Generated C header for: * API: gl @@ -8836,6 +8836,11 @@ #define GL_INTERLACE_READ_INGR 0x8568 #endif /* GL_INGR_interlace_read */ +#ifndef GL_INTEL_conservative_rasterization +#define GL_INTEL_conservative_rasterization 1 +#define GL_CONSERVATIVE_RASTERIZATION_INTEL 0x83FE +#endif /* GL_INTEL_conservative_rasterization */ + #ifndef GL_INTEL_fragment_shader_ordering #define GL_INTEL_fragment_shader_ordering 1 #endif /* GL_INTEL_fragment_shader_ordering */ diff -Nru mesa-12.0.6/include/GL/glxext.h mesa-17.0.7/include/GL/glxext.h --- mesa-12.0.6/include/GL/glxext.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/include/GL/glxext.h 2017-06-01 10:37:10.000000000 +0000 @@ -6,7 +6,7 @@ #endif /* -** Copyright (c) 2013-2014 The Khronos Group Inc. +** Copyright (c) 2013-2016 The Khronos Group Inc. ** ** Permission is hereby granted, free of charge, to any person obtaining a ** copy of this software and/or associated documentation files (the @@ -33,10 +33,10 @@ ** used to make the header, and the header can be found at ** http://www.opengl.org/registry/ ** -** Khronos $Revision: 27684 $ on $Date: 2014-08-11 01:21:35 -0700 (Mon, 11 Aug 2014) $ +** Khronos $Revision: 32889 $ on $Date: 2016-05-31 07:09:51 -0400 (Tue, 31 May 2016) $ */ -#define GLX_GLXEXT_VERSION 20140810 +#define GLX_GLXEXT_VERSION 20160531 /* Generated C header for: * API: glx @@ -250,6 +250,26 @@ #define GLX_GPU_NUM_SIMD_AMD 0x21A6 #define GLX_GPU_NUM_RB_AMD 0x21A7 #define GLX_GPU_NUM_SPI_AMD 0x21A8 +typedef unsigned int ( *PFNGLXGETGPUIDSAMDPROC) (unsigned int maxCount, unsigned int *ids); +typedef int ( *PFNGLXGETGPUINFOAMDPROC) (unsigned int id, int property, GLenum dataType, unsigned int size, void *data); +typedef unsigned int ( *PFNGLXGETCONTEXTGPUIDAMDPROC) (GLXContext ctx); +typedef GLXContext ( *PFNGLXCREATEASSOCIATEDCONTEXTAMDPROC) (unsigned int id, GLXContext share_list); +typedef GLXContext ( *PFNGLXCREATEASSOCIATEDCONTEXTATTRIBSAMDPROC) (unsigned int id, GLXContext share_context, const int *attribList); +typedef Bool ( *PFNGLXDELETEASSOCIATEDCONTEXTAMDPROC) (GLXContext ctx); +typedef Bool ( *PFNGLXMAKEASSOCIATEDCONTEXTCURRENTAMDPROC) (GLXContext ctx); +typedef GLXContext ( *PFNGLXGETCURRENTASSOCIATEDCONTEXTAMDPROC) (void); +typedef void ( *PFNGLXBLITCONTEXTFRAMEBUFFERAMDPROC) (GLXContext dstCtx, GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter); +#ifdef GLX_GLXEXT_PROTOTYPES +unsigned int glXGetGPUIDsAMD (unsigned int maxCount, unsigned int *ids); +int glXGetGPUInfoAMD (unsigned int id, int property, GLenum dataType, unsigned int size, void *data); +unsigned int glXGetContextGPUIDAMD (GLXContext ctx); +GLXContext glXCreateAssociatedContextAMD (unsigned int id, GLXContext share_list); +GLXContext glXCreateAssociatedContextAttribsAMD (unsigned int id, GLXContext share_context, const int *attribList); +Bool glXDeleteAssociatedContextAMD (GLXContext ctx); +Bool glXMakeAssociatedContextCurrentAMD (GLXContext ctx); +GLXContext glXGetCurrentAssociatedContextAMD (void); +void glXBlitContextFramebufferAMD (GLXContext dstCtx, GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter); +#endif #endif /* GLX_AMD_gpu_association */ #ifndef GLX_EXT_buffer_age @@ -297,6 +317,11 @@ #endif #endif /* GLX_EXT_import_context */ +#ifndef GLX_EXT_libglvnd +#define GLX_EXT_libglvnd 1 +#define GLX_VENDOR_NAMES_EXT 0x20F6 +#endif /* GLX_EXT_libglvnd */ + #ifndef GLX_EXT_stereo_tree #define GLX_EXT_stereo_tree 1 typedef struct { @@ -523,6 +548,11 @@ #endif #endif /* GLX_NV_present_video */ +#ifndef GLX_NV_robustness_video_memory_purge +#define GLX_NV_robustness_video_memory_purge 1 +#define GLX_GENERATE_RESET_ON_VIDEO_MEMORY_PURGE_NV 0x20F7 +#endif /* GLX_NV_robustness_video_memory_purge */ + #ifndef GLX_NV_swap_group #define GLX_NV_swap_group 1 typedef Bool ( *PFNGLXJOINSWAPGROUPNVPROC) (Display *dpy, GLXDrawable drawable, GLuint group); diff -Nru mesa-12.0.6/include/GL/internal/dri_interface.h mesa-17.0.7/include/GL/internal/dri_interface.h --- mesa-12.0.6/include/GL/internal/dri_interface.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/include/GL/internal/dri_interface.h 2017-06-01 10:37:10.000000000 +0000 @@ -340,12 +340,19 @@ */ #define __DRI2_FENCE "DRI2_Fence" -#define __DRI2_FENCE_VERSION 1 +#define __DRI2_FENCE_VERSION 2 #define __DRI2_FENCE_TIMEOUT_INFINITE 0xffffffffffffffffllu #define __DRI2_FENCE_FLAG_FLUSH_COMMANDS (1 << 0) +/** + * \name Capabilities that might be returned by __DRI2fenceExtensionRec::get_capabilities + */ +/*@{*/ +#define __DRI_FENCE_CAP_NATIVE_FD 1 +/*@}*/ + struct __DRI2fenceExtensionRec { __DRIextension base; @@ -390,6 +397,41 @@ * sense with this function (right now there are none) */ void (*server_wait_sync)(__DRIcontext *ctx, void *fence, unsigned flags); + + /** + * Query for general capabilities of the driver that concern fences. + * Returns a bitmask of __DRI_FENCE_CAP_x + * + * \since 2 + */ + unsigned (*get_capabilities)(__DRIscreen *screen); + + /** + * Create an fd (file descriptor) associated fence. If the fence fd + * is -1, this behaves similarly to create_fence() except that when + * rendering is flushed the driver creates a fence fd. Otherwise, + * the driver wraps an existing fence fd. + * + * This is used to implement the EGL_ANDROID_native_fence_sync extension. + * + * \since 2 + * + * \param ctx the context associated with the fence + * \param fd the fence fd or -1 + */ + void *(*create_fence_fd)(__DRIcontext *ctx, int fd); + + /** + * For fences created with create_fence_fd(), after rendering is flushed, + * this retrieves the native fence fd. Caller takes ownership of the + * fd and will close() it when it is no longer needed. + * + * \since 2 + * + * \param screen the screen associated with the fence + * \param fence the fence + */ + int (*get_fence_fd)(__DRIscreen *screen, void *fence); }; @@ -1094,7 +1136,7 @@ * extensions. */ #define __DRI_IMAGE "DRI_IMAGE" -#define __DRI_IMAGE_VERSION 12 +#define __DRI_IMAGE_VERSION 13 /** * These formats correspond to the similarly named MESA_FORMAT_* @@ -1121,6 +1163,7 @@ #define __DRI_IMAGE_FORMAT_XRGB2101010 0x1009 #define __DRI_IMAGE_FORMAT_ARGB2101010 0x100a #define __DRI_IMAGE_FORMAT_SARGB8 0x100b +#define __DRI_IMAGE_FORMAT_ARGB1555 0x100c #define __DRI_IMAGE_USE_SHARE 0x0001 #define __DRI_IMAGE_USE_SCANOUT 0x0002 @@ -1148,6 +1191,7 @@ #define __DRI_IMAGE_FOURCC_R8 0x20203852 #define __DRI_IMAGE_FOURCC_GR88 0x38385247 +#define __DRI_IMAGE_FOURCC_ARGB1555 0x35315241 #define __DRI_IMAGE_FOURCC_RGB565 0x36314752 #define __DRI_IMAGE_FOURCC_ARGB8888 0x34325241 #define __DRI_IMAGE_FOURCC_XRGB8888 0x34325258 @@ -1208,6 +1252,8 @@ #define __DRI_IMAGE_ATTRIB_FOURCC 0x2008 /* available in versions 11 */ #define __DRI_IMAGE_ATTRIB_NUM_PLANES 0x2009 /* available in versions 11 */ +#define __DRI_IMAGE_ATTRIB_OFFSET 0x200A /* available in versions 13 */ + enum __DRIYUVColorSpace { __DRI_YUV_COLOR_SPACE_UNDEFINED = 0, __DRI_YUV_COLOR_SPACE_ITU_REC601 = 0x327F, diff -Nru mesa-12.0.6/include/GL/mesa_glinterop.h mesa-17.0.7/include/GL/mesa_glinterop.h --- mesa-12.0.6/include/GL/mesa_glinterop.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/include/GL/mesa_glinterop.h 2017-06-01 10:37:10.000000000 +0000 @@ -97,7 +97,7 @@ /* The callee will overwrite it if it supports a lower version. * * The caller should check the value and access up-to the version supported - * by the the callee. + * by the callee. */ /* NOTE: Do not use the MESA_GLINTEROP_DEVICE_INFO_VERSION macro */ uint32_t version; @@ -125,7 +125,7 @@ /* The callee will overwrite it if it supports a lower version. * * The caller should check the value and access up-to the version supported - * by the the callee. + * by the callee. */ /* NOTE: Do not use the MESA_GLINTEROP_EXPORT_IN_VERSION macro */ uint32_t version; @@ -190,7 +190,7 @@ /* The callee will overwrite it if it supports a lower version. * * The caller should check the value and access up-to the version supported - * by the the callee. + * by the callee. */ /* NOTE: Do not use the MESA_GLINTEROP_EXPORT_OUT_VERSION macro */ uint32_t version; diff -Nru mesa-12.0.6/include/GL/wglext.h mesa-17.0.7/include/GL/wglext.h --- mesa-12.0.6/include/GL/wglext.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/include/GL/wglext.h 2017-06-01 10:37:10.000000000 +0000 @@ -6,7 +6,7 @@ #endif /* -** Copyright (c) 2013-2014 The Khronos Group Inc. +** Copyright (c) 2013-2016 The Khronos Group Inc. ** ** Permission is hereby granted, free of charge, to any person obtaining a ** copy of this software and/or associated documentation files (the @@ -33,7 +33,7 @@ ** used to make the header, and the header can be found at ** http://www.opengl.org/registry/ ** -** Khronos $Revision: 27684 $ on $Date: 2014-08-11 01:21:35 -0700 (Mon, 11 Aug 2014) $ +** Khronos $Revision: 32686 $ on $Date: 2016-04-19 21:08:44 -0400 (Tue, 19 Apr 2016) $ */ #if defined(_WIN32) && !defined(APIENTRY) && !defined(__CYGWIN__) && !defined(__SCITECH_SNAP__) @@ -41,7 +41,7 @@ #include #endif -#define WGL_WGLEXT_VERSION 20140810 +#define WGL_WGLEXT_VERSION 20160419 /* Generated C header for: * API: wgl diff -Nru mesa-12.0.6/include/GLES2/gl2ext.h mesa-17.0.7/include/GLES2/gl2ext.h --- mesa-12.0.6/include/GLES2/gl2ext.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/include/GLES2/gl2ext.h 2017-06-01 10:37:10.000000000 +0000 @@ -6,7 +6,7 @@ #endif /* -** Copyright (c) 2013-2015 The Khronos Group Inc. +** Copyright (c) 2013-2016 The Khronos Group Inc. ** ** Permission is hereby granted, free of charge, to any person obtaining a ** copy of this software and/or associated documentation files (the @@ -33,14 +33,14 @@ ** used to make the header, and the header can be found at ** http://www.opengl.org/registry/ ** -** Khronos $Revision: 32120 $ on $Date: 2015-10-15 04:27:13 -0700 (Thu, 15 Oct 2015) $ +** Khronos $Revision: 33080 $ on $Date: 2016-08-05 04:09:22 -0700 (Fri, 05 Aug 2016) $ */ #ifndef GL_APIENTRYP #define GL_APIENTRYP GL_APIENTRY* #endif -/* Generated on date 20151015 */ +/* Generated on date 20160805 */ /* Generated C header for: * API: gles2 @@ -52,6 +52,10 @@ * Extensions removed: _nomatch_^ */ +#ifndef GL_ARB_sparse_texture2 +#define GL_ARB_sparse_texture2 1 +#endif /* GL_ARB_sparse_texture2 */ + #ifndef GL_KHR_blend_equation_advanced #define GL_KHR_blend_equation_advanced 1 #define GL_MULTIPLY_KHR 0x9294 @@ -752,6 +756,34 @@ #define GL_INT_10_10_10_2_OES 0x8DF7 #endif /* GL_OES_vertex_type_10_10_10_2 */ +#ifndef GL_OES_viewport_array +#define GL_OES_viewport_array 1 +#define GL_MAX_VIEWPORTS_OES 0x825B +#define GL_VIEWPORT_SUBPIXEL_BITS_OES 0x825C +#define GL_VIEWPORT_BOUNDS_RANGE_OES 0x825D +#define GL_VIEWPORT_INDEX_PROVOKING_VERTEX_OES 0x825F +typedef void (GL_APIENTRYP PFNGLVIEWPORTARRAYVOESPROC) (GLuint first, GLsizei count, const GLfloat *v); +typedef void (GL_APIENTRYP PFNGLVIEWPORTINDEXEDFOESPROC) (GLuint index, GLfloat x, GLfloat y, GLfloat w, GLfloat h); +typedef void (GL_APIENTRYP PFNGLVIEWPORTINDEXEDFVOESPROC) (GLuint index, const GLfloat *v); +typedef void (GL_APIENTRYP PFNGLSCISSORARRAYVOESPROC) (GLuint first, GLsizei count, const GLint *v); +typedef void (GL_APIENTRYP PFNGLSCISSORINDEXEDOESPROC) (GLuint index, GLint left, GLint bottom, GLsizei width, GLsizei height); +typedef void (GL_APIENTRYP PFNGLSCISSORINDEXEDVOESPROC) (GLuint index, const GLint *v); +typedef void (GL_APIENTRYP PFNGLDEPTHRANGEARRAYFVOESPROC) (GLuint first, GLsizei count, const GLfloat *v); +typedef void (GL_APIENTRYP PFNGLDEPTHRANGEINDEXEDFOESPROC) (GLuint index, GLfloat n, GLfloat f); +typedef void (GL_APIENTRYP PFNGLGETFLOATI_VOESPROC) (GLenum target, GLuint index, GLfloat *data); +#ifdef GL_GLEXT_PROTOTYPES +GL_APICALL void GL_APIENTRY glViewportArrayvOES (GLuint first, GLsizei count, const GLfloat *v); +GL_APICALL void GL_APIENTRY glViewportIndexedfOES (GLuint index, GLfloat x, GLfloat y, GLfloat w, GLfloat h); +GL_APICALL void GL_APIENTRY glViewportIndexedfvOES (GLuint index, const GLfloat *v); +GL_APICALL void GL_APIENTRY glScissorArrayvOES (GLuint first, GLsizei count, const GLint *v); +GL_APICALL void GL_APIENTRY glScissorIndexedOES (GLuint index, GLint left, GLint bottom, GLsizei width, GLsizei height); +GL_APICALL void GL_APIENTRY glScissorIndexedvOES (GLuint index, const GLint *v); +GL_APICALL void GL_APIENTRY glDepthRangeArrayfvOES (GLuint first, GLsizei count, const GLfloat *v); +GL_APICALL void GL_APIENTRY glDepthRangeIndexedfOES (GLuint index, GLfloat n, GLfloat f); +GL_APICALL void GL_APIENTRY glGetFloati_vOES (GLenum target, GLuint index, GLfloat *data); +#endif +#endif /* GL_OES_viewport_array */ + #ifndef GL_AMD_compressed_3DC_texture #define GL_AMD_compressed_3DC_texture 1 #define GL_3DC_X_AMD 0x87F9 @@ -1086,6 +1118,21 @@ #endif #endif /* GL_EXT_buffer_storage */ +#ifndef GL_EXT_clip_cull_distance +#define GL_EXT_clip_cull_distance 1 +#define GL_MAX_CLIP_DISTANCES_EXT 0x0D32 +#define GL_MAX_CULL_DISTANCES_EXT 0x82F9 +#define GL_MAX_COMBINED_CLIP_AND_CULL_DISTANCES_EXT 0x82FA +#define GL_CLIP_DISTANCE0_EXT 0x3000 +#define GL_CLIP_DISTANCE1_EXT 0x3001 +#define GL_CLIP_DISTANCE2_EXT 0x3002 +#define GL_CLIP_DISTANCE3_EXT 0x3003 +#define GL_CLIP_DISTANCE4_EXT 0x3004 +#define GL_CLIP_DISTANCE5_EXT 0x3005 +#define GL_CLIP_DISTANCE6_EXT 0x3006 +#define GL_CLIP_DISTANCE7_EXT 0x3007 +#endif /* GL_EXT_clip_cull_distance */ + #ifndef GL_EXT_color_buffer_float #define GL_EXT_color_buffer_float 1 #endif /* GL_EXT_color_buffer_float */ @@ -1412,6 +1459,15 @@ #define GL_ANY_SAMPLES_PASSED_CONSERVATIVE_EXT 0x8D6A #endif /* GL_EXT_occlusion_query_boolean */ +#ifndef GL_EXT_polygon_offset_clamp +#define GL_EXT_polygon_offset_clamp 1 +#define GL_POLYGON_OFFSET_CLAMP_EXT 0x8E1B +typedef void (GL_APIENTRYP PFNGLPOLYGONOFFSETCLAMPEXTPROC) (GLfloat factor, GLfloat units, GLfloat clamp); +#ifdef GL_GLEXT_PROTOTYPES +GL_APICALL void GL_APIENTRY glPolygonOffsetClampEXT (GLfloat factor, GLfloat units, GLfloat clamp); +#endif +#endif /* GL_EXT_polygon_offset_clamp */ + #ifndef GL_EXT_post_depth_coverage #define GL_EXT_post_depth_coverage 1 #endif /* GL_EXT_post_depth_coverage */ @@ -1425,6 +1481,12 @@ #endif #endif /* GL_EXT_primitive_bounding_box */ +#ifndef GL_EXT_protected_textures +#define GL_EXT_protected_textures 1 +#define GL_CONTEXT_FLAG_PROTECTED_CONTENT_BIT_EXT 0x00000010 +#define GL_TEXTURE_PROTECTED_EXT 0x8BFA +#endif /* GL_EXT_protected_textures */ + #ifndef GL_EXT_pvrtc_sRGB #define GL_EXT_pvrtc_sRGB 1 #define GL_COMPRESSED_SRGB_PVRTC_2BPPV1_EXT 0x8A54 @@ -1604,6 +1666,10 @@ #define GL_FRAGMENT_SHADER_DISCARDS_SAMPLES_EXT 0x8A52 #endif /* GL_EXT_shader_framebuffer_fetch */ +#ifndef GL_EXT_shader_group_vote +#define GL_EXT_shader_group_vote 1 +#endif /* GL_EXT_shader_group_vote */ + #ifndef GL_EXT_shader_implicit_conversions #define GL_EXT_shader_implicit_conversions 1 #endif /* GL_EXT_shader_implicit_conversions */ @@ -1616,6 +1682,10 @@ #define GL_EXT_shader_io_blocks 1 #endif /* GL_EXT_shader_io_blocks */ +#ifndef GL_EXT_shader_non_constant_global_initializers +#define GL_EXT_shader_non_constant_global_initializers 1 +#endif /* GL_EXT_shader_non_constant_global_initializers */ + #ifndef GL_EXT_shader_pixel_local_storage #define GL_EXT_shader_pixel_local_storage 1 #define GL_MAX_SHADER_PIXEL_LOCAL_STORAGE_FAST_SIZE_EXT 0x8F63 @@ -1623,6 +1693,21 @@ #define GL_SHADER_PIXEL_LOCAL_STORAGE_EXT 0x8F64 #endif /* GL_EXT_shader_pixel_local_storage */ +#ifndef GL_EXT_shader_pixel_local_storage2 +#define GL_EXT_shader_pixel_local_storage2 1 +#define GL_MAX_SHADER_COMBINED_LOCAL_STORAGE_FAST_SIZE_EXT 0x9650 +#define GL_MAX_SHADER_COMBINED_LOCAL_STORAGE_SIZE_EXT 0x9651 +#define GL_FRAMEBUFFER_INCOMPLETE_INSUFFICIENT_SHADER_COMBINED_LOCAL_STORAGE_EXT 0x9652 +typedef void (GL_APIENTRYP PFNGLFRAMEBUFFERPIXELLOCALSTORAGESIZEEXTPROC) (GLuint target, GLsizei size); +typedef GLsizei (GL_APIENTRYP PFNGLGETFRAMEBUFFERPIXELLOCALSTORAGESIZEEXTPROC) (GLuint target); +typedef void (GL_APIENTRYP PFNGLCLEARPIXELLOCALSTORAGEUIEXTPROC) (GLsizei offset, GLsizei n, const GLuint *values); +#ifdef GL_GLEXT_PROTOTYPES +GL_APICALL void GL_APIENTRY glFramebufferPixelLocalStorageSizeEXT (GLuint target, GLsizei size); +GL_APICALL GLsizei GL_APIENTRY glGetFramebufferPixelLocalStorageSizeEXT (GLuint target); +GL_APICALL void GL_APIENTRY glClearPixelLocalStorageuiEXT (GLsizei offset, GLsizei n, const GLuint *values); +#endif +#endif /* GL_EXT_shader_pixel_local_storage2 */ + #ifndef GL_EXT_shader_texture_lod #define GL_EXT_shader_texture_lod 1 #endif /* GL_EXT_shader_texture_lod */ @@ -1888,11 +1973,39 @@ #define GL_UNPACK_SKIP_PIXELS_EXT 0x0CF4 #endif /* GL_EXT_unpack_subimage */ +#ifndef GL_EXT_window_rectangles +#define GL_EXT_window_rectangles 1 +#define GL_INCLUSIVE_EXT 0x8F10 +#define GL_EXCLUSIVE_EXT 0x8F11 +#define GL_WINDOW_RECTANGLE_EXT 0x8F12 +#define GL_WINDOW_RECTANGLE_MODE_EXT 0x8F13 +#define GL_MAX_WINDOW_RECTANGLES_EXT 0x8F14 +#define GL_NUM_WINDOW_RECTANGLES_EXT 0x8F15 +typedef void (GL_APIENTRYP PFNGLWINDOWRECTANGLESEXTPROC) (GLenum mode, GLsizei count, const GLint *box); +#ifdef GL_GLEXT_PROTOTYPES +GL_APICALL void GL_APIENTRY glWindowRectanglesEXT (GLenum mode, GLsizei count, const GLint *box); +#endif +#endif /* GL_EXT_window_rectangles */ + #ifndef GL_FJ_shader_binary_GCCSO #define GL_FJ_shader_binary_GCCSO 1 #define GL_GCCSO_SHADER_BINARY_FJ 0x9260 #endif /* GL_FJ_shader_binary_GCCSO */ +#ifndef GL_IMG_framebuffer_downsample +#define GL_IMG_framebuffer_downsample 1 +#define GL_FRAMEBUFFER_INCOMPLETE_MULTISAMPLE_AND_DOWNSAMPLE_IMG 0x913C +#define GL_NUM_DOWNSAMPLE_SCALES_IMG 0x913D +#define GL_DOWNSAMPLE_SCALES_IMG 0x913E +#define GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_SCALE_IMG 0x913F +typedef void (GL_APIENTRYP PFNGLFRAMEBUFFERTEXTURE2DDOWNSAMPLEIMGPROC) (GLenum target, GLenum attachment, GLenum textarget, GLuint texture, GLint level, GLint xscale, GLint yscale); +typedef void (GL_APIENTRYP PFNGLFRAMEBUFFERTEXTURELAYERDOWNSAMPLEIMGPROC) (GLenum target, GLenum attachment, GLuint texture, GLint level, GLint layer, GLint xscale, GLint yscale); +#ifdef GL_GLEXT_PROTOTYPES +GL_APICALL void GL_APIENTRY glFramebufferTexture2DDownsampleIMG (GLenum target, GLenum attachment, GLenum textarget, GLuint texture, GLint level, GLint xscale, GLint yscale); +GL_APICALL void GL_APIENTRY glFramebufferTextureLayerDownsampleIMG (GLenum target, GLenum attachment, GLuint texture, GLint level, GLint layer, GLint xscale, GLint yscale); +#endif +#endif /* GL_IMG_framebuffer_downsample */ + #ifndef GL_IMG_multisampled_render_to_texture #define GL_IMG_multisampled_render_to_texture 1 #define GL_RENDERBUFFER_SAMPLES_IMG 0x9133 @@ -1944,6 +2057,11 @@ #define GL_CUBIC_MIPMAP_LINEAR_IMG 0x913B #endif /* GL_IMG_texture_filter_cubic */ +#ifndef GL_INTEL_conservative_rasterization +#define GL_INTEL_conservative_rasterization 1 +#define GL_CONSERVATIVE_RASTERIZATION_INTEL 0x83FE +#endif /* GL_INTEL_conservative_rasterization */ + #ifndef GL_INTEL_framebuffer_CMAA #define GL_INTEL_framebuffer_CMAA 1 typedef void (GL_APIENTRYP PFNGLAPPLYFRAMEBUFFERATTACHMENTCMAAINTELPROC) (void); @@ -2120,6 +2238,17 @@ #endif #endif /* GL_NV_conservative_raster */ +#ifndef GL_NV_conservative_raster_pre_snap_triangles +#define GL_NV_conservative_raster_pre_snap_triangles 1 +#define GL_CONSERVATIVE_RASTER_MODE_NV 0x954D +#define GL_CONSERVATIVE_RASTER_MODE_POST_SNAP_NV 0x954E +#define GL_CONSERVATIVE_RASTER_MODE_PRE_SNAP_TRIANGLES_NV 0x954F +typedef void (GL_APIENTRYP PFNGLCONSERVATIVERASTERPARAMETERINVPROC) (GLenum pname, GLint param); +#ifdef GL_GLEXT_PROTOTYPES +GL_APICALL void GL_APIENTRY glConservativeRasterParameteriNV (GLenum pname, GLint param); +#endif +#endif /* GL_NV_conservative_raster_pre_snap_triangles */ + #ifndef GL_NV_copy_buffer #define GL_NV_copy_buffer 1 #define GL_COPY_READ_BUFFER_NV 0x8F36 @@ -2307,6 +2436,109 @@ #define GL_NV_geometry_shader_passthrough 1 #endif /* GL_NV_geometry_shader_passthrough */ +#ifndef GL_NV_gpu_shader5 +#define GL_NV_gpu_shader5 1 +typedef khronos_int64_t GLint64EXT; +typedef khronos_uint64_t GLuint64EXT; +#define GL_INT64_NV 0x140E +#define GL_UNSIGNED_INT64_NV 0x140F +#define GL_INT8_NV 0x8FE0 +#define GL_INT8_VEC2_NV 0x8FE1 +#define GL_INT8_VEC3_NV 0x8FE2 +#define GL_INT8_VEC4_NV 0x8FE3 +#define GL_INT16_NV 0x8FE4 +#define GL_INT16_VEC2_NV 0x8FE5 +#define GL_INT16_VEC3_NV 0x8FE6 +#define GL_INT16_VEC4_NV 0x8FE7 +#define GL_INT64_VEC2_NV 0x8FE9 +#define GL_INT64_VEC3_NV 0x8FEA +#define GL_INT64_VEC4_NV 0x8FEB +#define GL_UNSIGNED_INT8_NV 0x8FEC +#define GL_UNSIGNED_INT8_VEC2_NV 0x8FED +#define GL_UNSIGNED_INT8_VEC3_NV 0x8FEE +#define GL_UNSIGNED_INT8_VEC4_NV 0x8FEF +#define GL_UNSIGNED_INT16_NV 0x8FF0 +#define GL_UNSIGNED_INT16_VEC2_NV 0x8FF1 +#define GL_UNSIGNED_INT16_VEC3_NV 0x8FF2 +#define GL_UNSIGNED_INT16_VEC4_NV 0x8FF3 +#define GL_UNSIGNED_INT64_VEC2_NV 0x8FF5 +#define GL_UNSIGNED_INT64_VEC3_NV 0x8FF6 +#define GL_UNSIGNED_INT64_VEC4_NV 0x8FF7 +#define GL_FLOAT16_NV 0x8FF8 +#define GL_FLOAT16_VEC2_NV 0x8FF9 +#define GL_FLOAT16_VEC3_NV 0x8FFA +#define GL_FLOAT16_VEC4_NV 0x8FFB +#define GL_PATCHES 0x000E +typedef void (GL_APIENTRYP PFNGLUNIFORM1I64NVPROC) (GLint location, GLint64EXT x); +typedef void (GL_APIENTRYP PFNGLUNIFORM2I64NVPROC) (GLint location, GLint64EXT x, GLint64EXT y); +typedef void (GL_APIENTRYP PFNGLUNIFORM3I64NVPROC) (GLint location, GLint64EXT x, GLint64EXT y, GLint64EXT z); +typedef void (GL_APIENTRYP PFNGLUNIFORM4I64NVPROC) (GLint location, GLint64EXT x, GLint64EXT y, GLint64EXT z, GLint64EXT w); +typedef void (GL_APIENTRYP PFNGLUNIFORM1I64VNVPROC) (GLint location, GLsizei count, const GLint64EXT *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM2I64VNVPROC) (GLint location, GLsizei count, const GLint64EXT *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM3I64VNVPROC) (GLint location, GLsizei count, const GLint64EXT *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM4I64VNVPROC) (GLint location, GLsizei count, const GLint64EXT *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM1UI64NVPROC) (GLint location, GLuint64EXT x); +typedef void (GL_APIENTRYP PFNGLUNIFORM2UI64NVPROC) (GLint location, GLuint64EXT x, GLuint64EXT y); +typedef void (GL_APIENTRYP PFNGLUNIFORM3UI64NVPROC) (GLint location, GLuint64EXT x, GLuint64EXT y, GLuint64EXT z); +typedef void (GL_APIENTRYP PFNGLUNIFORM4UI64NVPROC) (GLint location, GLuint64EXT x, GLuint64EXT y, GLuint64EXT z, GLuint64EXT w); +typedef void (GL_APIENTRYP PFNGLUNIFORM1UI64VNVPROC) (GLint location, GLsizei count, const GLuint64EXT *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM2UI64VNVPROC) (GLint location, GLsizei count, const GLuint64EXT *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM3UI64VNVPROC) (GLint location, GLsizei count, const GLuint64EXT *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM4UI64VNVPROC) (GLint location, GLsizei count, const GLuint64EXT *value); +typedef void (GL_APIENTRYP PFNGLGETUNIFORMI64VNVPROC) (GLuint program, GLint location, GLint64EXT *params); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM1I64NVPROC) (GLuint program, GLint location, GLint64EXT x); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM2I64NVPROC) (GLuint program, GLint location, GLint64EXT x, GLint64EXT y); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM3I64NVPROC) (GLuint program, GLint location, GLint64EXT x, GLint64EXT y, GLint64EXT z); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM4I64NVPROC) (GLuint program, GLint location, GLint64EXT x, GLint64EXT y, GLint64EXT z, GLint64EXT w); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM1I64VNVPROC) (GLuint program, GLint location, GLsizei count, const GLint64EXT *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM2I64VNVPROC) (GLuint program, GLint location, GLsizei count, const GLint64EXT *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM3I64VNVPROC) (GLuint program, GLint location, GLsizei count, const GLint64EXT *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM4I64VNVPROC) (GLuint program, GLint location, GLsizei count, const GLint64EXT *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM1UI64NVPROC) (GLuint program, GLint location, GLuint64EXT x); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM2UI64NVPROC) (GLuint program, GLint location, GLuint64EXT x, GLuint64EXT y); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM3UI64NVPROC) (GLuint program, GLint location, GLuint64EXT x, GLuint64EXT y, GLuint64EXT z); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM4UI64NVPROC) (GLuint program, GLint location, GLuint64EXT x, GLuint64EXT y, GLuint64EXT z, GLuint64EXT w); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM1UI64VNVPROC) (GLuint program, GLint location, GLsizei count, const GLuint64EXT *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM2UI64VNVPROC) (GLuint program, GLint location, GLsizei count, const GLuint64EXT *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM3UI64VNVPROC) (GLuint program, GLint location, GLsizei count, const GLuint64EXT *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM4UI64VNVPROC) (GLuint program, GLint location, GLsizei count, const GLuint64EXT *value); +#ifdef GL_GLEXT_PROTOTYPES +GL_APICALL void GL_APIENTRY glUniform1i64NV (GLint location, GLint64EXT x); +GL_APICALL void GL_APIENTRY glUniform2i64NV (GLint location, GLint64EXT x, GLint64EXT y); +GL_APICALL void GL_APIENTRY glUniform3i64NV (GLint location, GLint64EXT x, GLint64EXT y, GLint64EXT z); +GL_APICALL void GL_APIENTRY glUniform4i64NV (GLint location, GLint64EXT x, GLint64EXT y, GLint64EXT z, GLint64EXT w); +GL_APICALL void GL_APIENTRY glUniform1i64vNV (GLint location, GLsizei count, const GLint64EXT *value); +GL_APICALL void GL_APIENTRY glUniform2i64vNV (GLint location, GLsizei count, const GLint64EXT *value); +GL_APICALL void GL_APIENTRY glUniform3i64vNV (GLint location, GLsizei count, const GLint64EXT *value); +GL_APICALL void GL_APIENTRY glUniform4i64vNV (GLint location, GLsizei count, const GLint64EXT *value); +GL_APICALL void GL_APIENTRY glUniform1ui64NV (GLint location, GLuint64EXT x); +GL_APICALL void GL_APIENTRY glUniform2ui64NV (GLint location, GLuint64EXT x, GLuint64EXT y); +GL_APICALL void GL_APIENTRY glUniform3ui64NV (GLint location, GLuint64EXT x, GLuint64EXT y, GLuint64EXT z); +GL_APICALL void GL_APIENTRY glUniform4ui64NV (GLint location, GLuint64EXT x, GLuint64EXT y, GLuint64EXT z, GLuint64EXT w); +GL_APICALL void GL_APIENTRY glUniform1ui64vNV (GLint location, GLsizei count, const GLuint64EXT *value); +GL_APICALL void GL_APIENTRY glUniform2ui64vNV (GLint location, GLsizei count, const GLuint64EXT *value); +GL_APICALL void GL_APIENTRY glUniform3ui64vNV (GLint location, GLsizei count, const GLuint64EXT *value); +GL_APICALL void GL_APIENTRY glUniform4ui64vNV (GLint location, GLsizei count, const GLuint64EXT *value); +GL_APICALL void GL_APIENTRY glGetUniformi64vNV (GLuint program, GLint location, GLint64EXT *params); +GL_APICALL void GL_APIENTRY glProgramUniform1i64NV (GLuint program, GLint location, GLint64EXT x); +GL_APICALL void GL_APIENTRY glProgramUniform2i64NV (GLuint program, GLint location, GLint64EXT x, GLint64EXT y); +GL_APICALL void GL_APIENTRY glProgramUniform3i64NV (GLuint program, GLint location, GLint64EXT x, GLint64EXT y, GLint64EXT z); +GL_APICALL void GL_APIENTRY glProgramUniform4i64NV (GLuint program, GLint location, GLint64EXT x, GLint64EXT y, GLint64EXT z, GLint64EXT w); +GL_APICALL void GL_APIENTRY glProgramUniform1i64vNV (GLuint program, GLint location, GLsizei count, const GLint64EXT *value); +GL_APICALL void GL_APIENTRY glProgramUniform2i64vNV (GLuint program, GLint location, GLsizei count, const GLint64EXT *value); +GL_APICALL void GL_APIENTRY glProgramUniform3i64vNV (GLuint program, GLint location, GLsizei count, const GLint64EXT *value); +GL_APICALL void GL_APIENTRY glProgramUniform4i64vNV (GLuint program, GLint location, GLsizei count, const GLint64EXT *value); +GL_APICALL void GL_APIENTRY glProgramUniform1ui64NV (GLuint program, GLint location, GLuint64EXT x); +GL_APICALL void GL_APIENTRY glProgramUniform2ui64NV (GLuint program, GLint location, GLuint64EXT x, GLuint64EXT y); +GL_APICALL void GL_APIENTRY glProgramUniform3ui64NV (GLuint program, GLint location, GLuint64EXT x, GLuint64EXT y, GLuint64EXT z); +GL_APICALL void GL_APIENTRY glProgramUniform4ui64NV (GLuint program, GLint location, GLuint64EXT x, GLuint64EXT y, GLuint64EXT z, GLuint64EXT w); +GL_APICALL void GL_APIENTRY glProgramUniform1ui64vNV (GLuint program, GLint location, GLsizei count, const GLuint64EXT *value); +GL_APICALL void GL_APIENTRY glProgramUniform2ui64vNV (GLuint program, GLint location, GLsizei count, const GLuint64EXT *value); +GL_APICALL void GL_APIENTRY glProgramUniform3ui64vNV (GLuint program, GLint location, GLsizei count, const GLuint64EXT *value); +GL_APICALL void GL_APIENTRY glProgramUniform4ui64vNV (GLuint program, GLint location, GLsizei count, const GLuint64EXT *value); +#endif +#endif /* GL_NV_gpu_shader5 */ + #ifndef GL_NV_image_formats #define GL_NV_image_formats 1 #endif /* GL_NV_image_formats */ @@ -2713,6 +2945,10 @@ #define GL_NV_sample_mask_override_coverage 1 #endif /* GL_NV_sample_mask_override_coverage */ +#ifndef GL_NV_shader_atomic_fp16_vector +#define GL_NV_shader_atomic_fp16_vector 1 +#endif /* GL_NV_shader_atomic_fp16_vector */ + #ifndef GL_NV_shader_noperspective_interpolation #define GL_NV_shader_noperspective_interpolation 1 #endif /* GL_NV_shader_noperspective_interpolation */ @@ -2779,6 +3015,26 @@ #define GL_NV_viewport_array2 1 #endif /* GL_NV_viewport_array2 */ +#ifndef GL_NV_viewport_swizzle +#define GL_NV_viewport_swizzle 1 +#define GL_VIEWPORT_SWIZZLE_POSITIVE_X_NV 0x9350 +#define GL_VIEWPORT_SWIZZLE_NEGATIVE_X_NV 0x9351 +#define GL_VIEWPORT_SWIZZLE_POSITIVE_Y_NV 0x9352 +#define GL_VIEWPORT_SWIZZLE_NEGATIVE_Y_NV 0x9353 +#define GL_VIEWPORT_SWIZZLE_POSITIVE_Z_NV 0x9354 +#define GL_VIEWPORT_SWIZZLE_NEGATIVE_Z_NV 0x9355 +#define GL_VIEWPORT_SWIZZLE_POSITIVE_W_NV 0x9356 +#define GL_VIEWPORT_SWIZZLE_NEGATIVE_W_NV 0x9357 +#define GL_VIEWPORT_SWIZZLE_X_NV 0x9358 +#define GL_VIEWPORT_SWIZZLE_Y_NV 0x9359 +#define GL_VIEWPORT_SWIZZLE_Z_NV 0x935A +#define GL_VIEWPORT_SWIZZLE_W_NV 0x935B +typedef void (GL_APIENTRYP PFNGLVIEWPORTSWIZZLENVPROC) (GLuint index, GLenum swizzlex, GLenum swizzley, GLenum swizzlez, GLenum swizzlew); +#ifdef GL_GLEXT_PROTOTYPES +GL_APICALL void GL_APIENTRY glViewportSwizzleNV (GLuint index, GLenum swizzlex, GLenum swizzley, GLenum swizzlez, GLenum swizzlew); +#endif +#endif /* GL_NV_viewport_swizzle */ + #ifndef GL_OVR_multiview #define GL_OVR_multiview 1 #define GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_NUM_VIEWS_OVR 0x9630 diff -Nru mesa-12.0.6/include/GLES2/gl2.h mesa-17.0.7/include/GLES2/gl2.h --- mesa-12.0.6/include/GLES2/gl2.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/include/GLES2/gl2.h 2017-06-01 10:37:10.000000000 +0000 @@ -6,7 +6,7 @@ #endif /* -** Copyright (c) 2013 The Khronos Group Inc. +** Copyright (c) 2013-2016 The Khronos Group Inc. ** ** Permission is hereby granted, free of charge, to any person obtaining a ** copy of this software and/or associated documentation files (the @@ -33,12 +33,16 @@ ** used to make the header, and the header can be found at ** http://www.opengl.org/registry/ ** -** Khronos $Revision: 24614 $ on $Date: 2013-12-30 04:44:46 -0800 (Mon, 30 Dec 2013) $ +** Khronos $Revision: 32749 $ on $Date: 2016-04-28 09:03:03 -0700 (Thu, 28 Apr 2016) $ */ #include -/* Generated on date 20131230 */ +#ifndef GL_APIENTRYP +#define GL_APIENTRYP GL_APIENTRY* +#endif + +/* Generated on date 20160428 */ /* Generated C header for: * API: gles2 @@ -374,6 +378,148 @@ #define GL_RENDERBUFFER_BINDING 0x8CA7 #define GL_MAX_RENDERBUFFER_SIZE 0x84E8 #define GL_INVALID_FRAMEBUFFER_OPERATION 0x0506 +typedef void (GL_APIENTRYP PFNGLACTIVETEXTUREPROC) (GLenum texture); +typedef void (GL_APIENTRYP PFNGLATTACHSHADERPROC) (GLuint program, GLuint shader); +typedef void (GL_APIENTRYP PFNGLBINDATTRIBLOCATIONPROC) (GLuint program, GLuint index, const GLchar *name); +typedef void (GL_APIENTRYP PFNGLBINDBUFFERPROC) (GLenum target, GLuint buffer); +typedef void (GL_APIENTRYP PFNGLBINDFRAMEBUFFERPROC) (GLenum target, GLuint framebuffer); +typedef void (GL_APIENTRYP PFNGLBINDRENDERBUFFERPROC) (GLenum target, GLuint renderbuffer); +typedef void (GL_APIENTRYP PFNGLBINDTEXTUREPROC) (GLenum target, GLuint texture); +typedef void (GL_APIENTRYP PFNGLBLENDCOLORPROC) (GLfloat red, GLfloat green, GLfloat blue, GLfloat alpha); +typedef void (GL_APIENTRYP PFNGLBLENDEQUATIONPROC) (GLenum mode); +typedef void (GL_APIENTRYP PFNGLBLENDEQUATIONSEPARATEPROC) (GLenum modeRGB, GLenum modeAlpha); +typedef void (GL_APIENTRYP PFNGLBLENDFUNCPROC) (GLenum sfactor, GLenum dfactor); +typedef void (GL_APIENTRYP PFNGLBLENDFUNCSEPARATEPROC) (GLenum sfactorRGB, GLenum dfactorRGB, GLenum sfactorAlpha, GLenum dfactorAlpha); +typedef void (GL_APIENTRYP PFNGLBUFFERDATAPROC) (GLenum target, GLsizeiptr size, const void *data, GLenum usage); +typedef void (GL_APIENTRYP PFNGLBUFFERSUBDATAPROC) (GLenum target, GLintptr offset, GLsizeiptr size, const void *data); +typedef GLenum (GL_APIENTRYP PFNGLCHECKFRAMEBUFFERSTATUSPROC) (GLenum target); +typedef void (GL_APIENTRYP PFNGLCLEARPROC) (GLbitfield mask); +typedef void (GL_APIENTRYP PFNGLCLEARCOLORPROC) (GLfloat red, GLfloat green, GLfloat blue, GLfloat alpha); +typedef void (GL_APIENTRYP PFNGLCLEARDEPTHFPROC) (GLfloat d); +typedef void (GL_APIENTRYP PFNGLCLEARSTENCILPROC) (GLint s); +typedef void (GL_APIENTRYP PFNGLCOLORMASKPROC) (GLboolean red, GLboolean green, GLboolean blue, GLboolean alpha); +typedef void (GL_APIENTRYP PFNGLCOMPILESHADERPROC) (GLuint shader); +typedef void (GL_APIENTRYP PFNGLCOMPRESSEDTEXIMAGE2DPROC) (GLenum target, GLint level, GLenum internalformat, GLsizei width, GLsizei height, GLint border, GLsizei imageSize, const void *data); +typedef void (GL_APIENTRYP PFNGLCOMPRESSEDTEXSUBIMAGE2DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const void *data); +typedef void (GL_APIENTRYP PFNGLCOPYTEXIMAGE2DPROC) (GLenum target, GLint level, GLenum internalformat, GLint x, GLint y, GLsizei width, GLsizei height, GLint border); +typedef void (GL_APIENTRYP PFNGLCOPYTEXSUBIMAGE2DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height); +typedef GLuint (GL_APIENTRYP PFNGLCREATEPROGRAMPROC) (void); +typedef GLuint (GL_APIENTRYP PFNGLCREATESHADERPROC) (GLenum type); +typedef void (GL_APIENTRYP PFNGLCULLFACEPROC) (GLenum mode); +typedef void (GL_APIENTRYP PFNGLDELETEBUFFERSPROC) (GLsizei n, const GLuint *buffers); +typedef void (GL_APIENTRYP PFNGLDELETEFRAMEBUFFERSPROC) (GLsizei n, const GLuint *framebuffers); +typedef void (GL_APIENTRYP PFNGLDELETEPROGRAMPROC) (GLuint program); +typedef void (GL_APIENTRYP PFNGLDELETERENDERBUFFERSPROC) (GLsizei n, const GLuint *renderbuffers); +typedef void (GL_APIENTRYP PFNGLDELETESHADERPROC) (GLuint shader); +typedef void (GL_APIENTRYP PFNGLDELETETEXTURESPROC) (GLsizei n, const GLuint *textures); +typedef void (GL_APIENTRYP PFNGLDEPTHFUNCPROC) (GLenum func); +typedef void (GL_APIENTRYP PFNGLDEPTHMASKPROC) (GLboolean flag); +typedef void (GL_APIENTRYP PFNGLDEPTHRANGEFPROC) (GLfloat n, GLfloat f); +typedef void (GL_APIENTRYP PFNGLDETACHSHADERPROC) (GLuint program, GLuint shader); +typedef void (GL_APIENTRYP PFNGLDISABLEPROC) (GLenum cap); +typedef void (GL_APIENTRYP PFNGLDISABLEVERTEXATTRIBARRAYPROC) (GLuint index); +typedef void (GL_APIENTRYP PFNGLDRAWARRAYSPROC) (GLenum mode, GLint first, GLsizei count); +typedef void (GL_APIENTRYP PFNGLDRAWELEMENTSPROC) (GLenum mode, GLsizei count, GLenum type, const void *indices); +typedef void (GL_APIENTRYP PFNGLENABLEPROC) (GLenum cap); +typedef void (GL_APIENTRYP PFNGLENABLEVERTEXATTRIBARRAYPROC) (GLuint index); +typedef void (GL_APIENTRYP PFNGLFINISHPROC) (void); +typedef void (GL_APIENTRYP PFNGLFLUSHPROC) (void); +typedef void (GL_APIENTRYP PFNGLFRAMEBUFFERRENDERBUFFERPROC) (GLenum target, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer); +typedef void (GL_APIENTRYP PFNGLFRAMEBUFFERTEXTURE2DPROC) (GLenum target, GLenum attachment, GLenum textarget, GLuint texture, GLint level); +typedef void (GL_APIENTRYP PFNGLFRONTFACEPROC) (GLenum mode); +typedef void (GL_APIENTRYP PFNGLGENBUFFERSPROC) (GLsizei n, GLuint *buffers); +typedef void (GL_APIENTRYP PFNGLGENERATEMIPMAPPROC) (GLenum target); +typedef void (GL_APIENTRYP PFNGLGENFRAMEBUFFERSPROC) (GLsizei n, GLuint *framebuffers); +typedef void (GL_APIENTRYP PFNGLGENRENDERBUFFERSPROC) (GLsizei n, GLuint *renderbuffers); +typedef void (GL_APIENTRYP PFNGLGENTEXTURESPROC) (GLsizei n, GLuint *textures); +typedef void (GL_APIENTRYP PFNGLGETACTIVEATTRIBPROC) (GLuint program, GLuint index, GLsizei bufSize, GLsizei *length, GLint *size, GLenum *type, GLchar *name); +typedef void (GL_APIENTRYP PFNGLGETACTIVEUNIFORMPROC) (GLuint program, GLuint index, GLsizei bufSize, GLsizei *length, GLint *size, GLenum *type, GLchar *name); +typedef void (GL_APIENTRYP PFNGLGETATTACHEDSHADERSPROC) (GLuint program, GLsizei maxCount, GLsizei *count, GLuint *shaders); +typedef GLint (GL_APIENTRYP PFNGLGETATTRIBLOCATIONPROC) (GLuint program, const GLchar *name); +typedef void (GL_APIENTRYP PFNGLGETBOOLEANVPROC) (GLenum pname, GLboolean *data); +typedef void (GL_APIENTRYP PFNGLGETBUFFERPARAMETERIVPROC) (GLenum target, GLenum pname, GLint *params); +typedef GLenum (GL_APIENTRYP PFNGLGETERRORPROC) (void); +typedef void (GL_APIENTRYP PFNGLGETFLOATVPROC) (GLenum pname, GLfloat *data); +typedef void (GL_APIENTRYP PFNGLGETFRAMEBUFFERATTACHMENTPARAMETERIVPROC) (GLenum target, GLenum attachment, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETINTEGERVPROC) (GLenum pname, GLint *data); +typedef void (GL_APIENTRYP PFNGLGETPROGRAMIVPROC) (GLuint program, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETPROGRAMINFOLOGPROC) (GLuint program, GLsizei bufSize, GLsizei *length, GLchar *infoLog); +typedef void (GL_APIENTRYP PFNGLGETRENDERBUFFERPARAMETERIVPROC) (GLenum target, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETSHADERIVPROC) (GLuint shader, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETSHADERINFOLOGPROC) (GLuint shader, GLsizei bufSize, GLsizei *length, GLchar *infoLog); +typedef void (GL_APIENTRYP PFNGLGETSHADERPRECISIONFORMATPROC) (GLenum shadertype, GLenum precisiontype, GLint *range, GLint *precision); +typedef void (GL_APIENTRYP PFNGLGETSHADERSOURCEPROC) (GLuint shader, GLsizei bufSize, GLsizei *length, GLchar *source); +typedef const GLubyte *(GL_APIENTRYP PFNGLGETSTRINGPROC) (GLenum name); +typedef void (GL_APIENTRYP PFNGLGETTEXPARAMETERFVPROC) (GLenum target, GLenum pname, GLfloat *params); +typedef void (GL_APIENTRYP PFNGLGETTEXPARAMETERIVPROC) (GLenum target, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETUNIFORMFVPROC) (GLuint program, GLint location, GLfloat *params); +typedef void (GL_APIENTRYP PFNGLGETUNIFORMIVPROC) (GLuint program, GLint location, GLint *params); +typedef GLint (GL_APIENTRYP PFNGLGETUNIFORMLOCATIONPROC) (GLuint program, const GLchar *name); +typedef void (GL_APIENTRYP PFNGLGETVERTEXATTRIBFVPROC) (GLuint index, GLenum pname, GLfloat *params); +typedef void (GL_APIENTRYP PFNGLGETVERTEXATTRIBIVPROC) (GLuint index, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETVERTEXATTRIBPOINTERVPROC) (GLuint index, GLenum pname, void **pointer); +typedef void (GL_APIENTRYP PFNGLHINTPROC) (GLenum target, GLenum mode); +typedef GLboolean (GL_APIENTRYP PFNGLISBUFFERPROC) (GLuint buffer); +typedef GLboolean (GL_APIENTRYP PFNGLISENABLEDPROC) (GLenum cap); +typedef GLboolean (GL_APIENTRYP PFNGLISFRAMEBUFFERPROC) (GLuint framebuffer); +typedef GLboolean (GL_APIENTRYP PFNGLISPROGRAMPROC) (GLuint program); +typedef GLboolean (GL_APIENTRYP PFNGLISRENDERBUFFERPROC) (GLuint renderbuffer); +typedef GLboolean (GL_APIENTRYP PFNGLISSHADERPROC) (GLuint shader); +typedef GLboolean (GL_APIENTRYP PFNGLISTEXTUREPROC) (GLuint texture); +typedef void (GL_APIENTRYP PFNGLLINEWIDTHPROC) (GLfloat width); +typedef void (GL_APIENTRYP PFNGLLINKPROGRAMPROC) (GLuint program); +typedef void (GL_APIENTRYP PFNGLPIXELSTOREIPROC) (GLenum pname, GLint param); +typedef void (GL_APIENTRYP PFNGLPOLYGONOFFSETPROC) (GLfloat factor, GLfloat units); +typedef void (GL_APIENTRYP PFNGLREADPIXELSPROC) (GLint x, GLint y, GLsizei width, GLsizei height, GLenum format, GLenum type, void *pixels); +typedef void (GL_APIENTRYP PFNGLRELEASESHADERCOMPILERPROC) (void); +typedef void (GL_APIENTRYP PFNGLRENDERBUFFERSTORAGEPROC) (GLenum target, GLenum internalformat, GLsizei width, GLsizei height); +typedef void (GL_APIENTRYP PFNGLSAMPLECOVERAGEPROC) (GLfloat value, GLboolean invert); +typedef void (GL_APIENTRYP PFNGLSCISSORPROC) (GLint x, GLint y, GLsizei width, GLsizei height); +typedef void (GL_APIENTRYP PFNGLSHADERBINARYPROC) (GLsizei count, const GLuint *shaders, GLenum binaryformat, const void *binary, GLsizei length); +typedef void (GL_APIENTRYP PFNGLSHADERSOURCEPROC) (GLuint shader, GLsizei count, const GLchar *const*string, const GLint *length); +typedef void (GL_APIENTRYP PFNGLSTENCILFUNCPROC) (GLenum func, GLint ref, GLuint mask); +typedef void (GL_APIENTRYP PFNGLSTENCILFUNCSEPARATEPROC) (GLenum face, GLenum func, GLint ref, GLuint mask); +typedef void (GL_APIENTRYP PFNGLSTENCILMASKPROC) (GLuint mask); +typedef void (GL_APIENTRYP PFNGLSTENCILMASKSEPARATEPROC) (GLenum face, GLuint mask); +typedef void (GL_APIENTRYP PFNGLSTENCILOPPROC) (GLenum fail, GLenum zfail, GLenum zpass); +typedef void (GL_APIENTRYP PFNGLSTENCILOPSEPARATEPROC) (GLenum face, GLenum sfail, GLenum dpfail, GLenum dppass); +typedef void (GL_APIENTRYP PFNGLTEXIMAGE2DPROC) (GLenum target, GLint level, GLint internalformat, GLsizei width, GLsizei height, GLint border, GLenum format, GLenum type, const void *pixels); +typedef void (GL_APIENTRYP PFNGLTEXPARAMETERFPROC) (GLenum target, GLenum pname, GLfloat param); +typedef void (GL_APIENTRYP PFNGLTEXPARAMETERFVPROC) (GLenum target, GLenum pname, const GLfloat *params); +typedef void (GL_APIENTRYP PFNGLTEXPARAMETERIPROC) (GLenum target, GLenum pname, GLint param); +typedef void (GL_APIENTRYP PFNGLTEXPARAMETERIVPROC) (GLenum target, GLenum pname, const GLint *params); +typedef void (GL_APIENTRYP PFNGLTEXSUBIMAGE2DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const void *pixels); +typedef void (GL_APIENTRYP PFNGLUNIFORM1FPROC) (GLint location, GLfloat v0); +typedef void (GL_APIENTRYP PFNGLUNIFORM1FVPROC) (GLint location, GLsizei count, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM1IPROC) (GLint location, GLint v0); +typedef void (GL_APIENTRYP PFNGLUNIFORM1IVPROC) (GLint location, GLsizei count, const GLint *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM2FPROC) (GLint location, GLfloat v0, GLfloat v1); +typedef void (GL_APIENTRYP PFNGLUNIFORM2FVPROC) (GLint location, GLsizei count, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM2IPROC) (GLint location, GLint v0, GLint v1); +typedef void (GL_APIENTRYP PFNGLUNIFORM2IVPROC) (GLint location, GLsizei count, const GLint *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM3FPROC) (GLint location, GLfloat v0, GLfloat v1, GLfloat v2); +typedef void (GL_APIENTRYP PFNGLUNIFORM3FVPROC) (GLint location, GLsizei count, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM3IPROC) (GLint location, GLint v0, GLint v1, GLint v2); +typedef void (GL_APIENTRYP PFNGLUNIFORM3IVPROC) (GLint location, GLsizei count, const GLint *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM4FPROC) (GLint location, GLfloat v0, GLfloat v1, GLfloat v2, GLfloat v3); +typedef void (GL_APIENTRYP PFNGLUNIFORM4FVPROC) (GLint location, GLsizei count, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM4IPROC) (GLint location, GLint v0, GLint v1, GLint v2, GLint v3); +typedef void (GL_APIENTRYP PFNGLUNIFORM4IVPROC) (GLint location, GLsizei count, const GLint *value); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX2FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX3FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX4FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUSEPROGRAMPROC) (GLuint program); +typedef void (GL_APIENTRYP PFNGLVALIDATEPROGRAMPROC) (GLuint program); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB1FPROC) (GLuint index, GLfloat x); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB1FVPROC) (GLuint index, const GLfloat *v); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB2FPROC) (GLuint index, GLfloat x, GLfloat y); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB2FVPROC) (GLuint index, const GLfloat *v); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB3FPROC) (GLuint index, GLfloat x, GLfloat y, GLfloat z); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB3FVPROC) (GLuint index, const GLfloat *v); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB4FPROC) (GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB4FVPROC) (GLuint index, const GLfloat *v); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBPOINTERPROC) (GLuint index, GLint size, GLenum type, GLboolean normalized, GLsizei stride, const void *pointer); +typedef void (GL_APIENTRYP PFNGLVIEWPORTPROC) (GLint x, GLint y, GLsizei width, GLsizei height); GL_APICALL void GL_APIENTRY glActiveTexture (GLenum texture); GL_APICALL void GL_APIENTRY glAttachShader (GLuint program, GLuint shader); GL_APICALL void GL_APIENTRY glBindAttribLocation (GLuint program, GLuint index, const GLchar *name); diff -Nru mesa-12.0.6/include/GLES2/gl2platform.h mesa-17.0.7/include/GLES2/gl2platform.h --- mesa-12.0.6/include/GLES2/gl2platform.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/include/GLES2/gl2platform.h 2017-06-01 10:37:10.000000000 +0000 @@ -1,7 +1,7 @@ #ifndef __gl2platform_h_ #define __gl2platform_h_ -/* $Revision: 10602 $ on $Date:: 2010-03-04 22:35:34 -0800 #$ */ +/* $Revision: 23328 $ on $Date:: 2013-10-02 02:28:28 -0700 #$ */ /* * This document is licensed under the SGI Free Software B License Version diff -Nru mesa-12.0.6/include/GLES3/gl31.h mesa-17.0.7/include/GLES3/gl31.h --- mesa-12.0.6/include/GLES3/gl31.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/include/GLES3/gl31.h 2017-06-01 10:37:10.000000000 +0000 @@ -6,7 +6,7 @@ #endif /* -** Copyright (c) 2013-2014 The Khronos Group Inc. +** Copyright (c) 2013-2016 The Khronos Group Inc. ** ** Permission is hereby granted, free of charge, to any person obtaining a ** copy of this software and/or associated documentation files (the @@ -38,12 +38,16 @@ #include -/* Generated on date 20140317 */ +#ifndef GL_APIENTRYP +#define GL_APIENTRYP GL_APIENTRY* +#endif + +/* Generated on date 20160428 */ /* Generated C header for: * API: gles2 * Profile: common - * Versions considered: 2.[0-9]|3.[01] + * Versions considered: 2\.[0-9]|3\.[01] * Versions emitted: .* * Default extensions included: None * Additional extensions included: _nomatch_^ @@ -374,6 +378,148 @@ #define GL_RENDERBUFFER_BINDING 0x8CA7 #define GL_MAX_RENDERBUFFER_SIZE 0x84E8 #define GL_INVALID_FRAMEBUFFER_OPERATION 0x0506 +typedef void (GL_APIENTRYP PFNGLACTIVETEXTUREPROC) (GLenum texture); +typedef void (GL_APIENTRYP PFNGLATTACHSHADERPROC) (GLuint program, GLuint shader); +typedef void (GL_APIENTRYP PFNGLBINDATTRIBLOCATIONPROC) (GLuint program, GLuint index, const GLchar *name); +typedef void (GL_APIENTRYP PFNGLBINDBUFFERPROC) (GLenum target, GLuint buffer); +typedef void (GL_APIENTRYP PFNGLBINDFRAMEBUFFERPROC) (GLenum target, GLuint framebuffer); +typedef void (GL_APIENTRYP PFNGLBINDRENDERBUFFERPROC) (GLenum target, GLuint renderbuffer); +typedef void (GL_APIENTRYP PFNGLBINDTEXTUREPROC) (GLenum target, GLuint texture); +typedef void (GL_APIENTRYP PFNGLBLENDCOLORPROC) (GLfloat red, GLfloat green, GLfloat blue, GLfloat alpha); +typedef void (GL_APIENTRYP PFNGLBLENDEQUATIONPROC) (GLenum mode); +typedef void (GL_APIENTRYP PFNGLBLENDEQUATIONSEPARATEPROC) (GLenum modeRGB, GLenum modeAlpha); +typedef void (GL_APIENTRYP PFNGLBLENDFUNCPROC) (GLenum sfactor, GLenum dfactor); +typedef void (GL_APIENTRYP PFNGLBLENDFUNCSEPARATEPROC) (GLenum sfactorRGB, GLenum dfactorRGB, GLenum sfactorAlpha, GLenum dfactorAlpha); +typedef void (GL_APIENTRYP PFNGLBUFFERDATAPROC) (GLenum target, GLsizeiptr size, const void *data, GLenum usage); +typedef void (GL_APIENTRYP PFNGLBUFFERSUBDATAPROC) (GLenum target, GLintptr offset, GLsizeiptr size, const void *data); +typedef GLenum (GL_APIENTRYP PFNGLCHECKFRAMEBUFFERSTATUSPROC) (GLenum target); +typedef void (GL_APIENTRYP PFNGLCLEARPROC) (GLbitfield mask); +typedef void (GL_APIENTRYP PFNGLCLEARCOLORPROC) (GLfloat red, GLfloat green, GLfloat blue, GLfloat alpha); +typedef void (GL_APIENTRYP PFNGLCLEARDEPTHFPROC) (GLfloat d); +typedef void (GL_APIENTRYP PFNGLCLEARSTENCILPROC) (GLint s); +typedef void (GL_APIENTRYP PFNGLCOLORMASKPROC) (GLboolean red, GLboolean green, GLboolean blue, GLboolean alpha); +typedef void (GL_APIENTRYP PFNGLCOMPILESHADERPROC) (GLuint shader); +typedef void (GL_APIENTRYP PFNGLCOMPRESSEDTEXIMAGE2DPROC) (GLenum target, GLint level, GLenum internalformat, GLsizei width, GLsizei height, GLint border, GLsizei imageSize, const void *data); +typedef void (GL_APIENTRYP PFNGLCOMPRESSEDTEXSUBIMAGE2DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const void *data); +typedef void (GL_APIENTRYP PFNGLCOPYTEXIMAGE2DPROC) (GLenum target, GLint level, GLenum internalformat, GLint x, GLint y, GLsizei width, GLsizei height, GLint border); +typedef void (GL_APIENTRYP PFNGLCOPYTEXSUBIMAGE2DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height); +typedef GLuint (GL_APIENTRYP PFNGLCREATEPROGRAMPROC) (void); +typedef GLuint (GL_APIENTRYP PFNGLCREATESHADERPROC) (GLenum type); +typedef void (GL_APIENTRYP PFNGLCULLFACEPROC) (GLenum mode); +typedef void (GL_APIENTRYP PFNGLDELETEBUFFERSPROC) (GLsizei n, const GLuint *buffers); +typedef void (GL_APIENTRYP PFNGLDELETEFRAMEBUFFERSPROC) (GLsizei n, const GLuint *framebuffers); +typedef void (GL_APIENTRYP PFNGLDELETEPROGRAMPROC) (GLuint program); +typedef void (GL_APIENTRYP PFNGLDELETERENDERBUFFERSPROC) (GLsizei n, const GLuint *renderbuffers); +typedef void (GL_APIENTRYP PFNGLDELETESHADERPROC) (GLuint shader); +typedef void (GL_APIENTRYP PFNGLDELETETEXTURESPROC) (GLsizei n, const GLuint *textures); +typedef void (GL_APIENTRYP PFNGLDEPTHFUNCPROC) (GLenum func); +typedef void (GL_APIENTRYP PFNGLDEPTHMASKPROC) (GLboolean flag); +typedef void (GL_APIENTRYP PFNGLDEPTHRANGEFPROC) (GLfloat n, GLfloat f); +typedef void (GL_APIENTRYP PFNGLDETACHSHADERPROC) (GLuint program, GLuint shader); +typedef void (GL_APIENTRYP PFNGLDISABLEPROC) (GLenum cap); +typedef void (GL_APIENTRYP PFNGLDISABLEVERTEXATTRIBARRAYPROC) (GLuint index); +typedef void (GL_APIENTRYP PFNGLDRAWARRAYSPROC) (GLenum mode, GLint first, GLsizei count); +typedef void (GL_APIENTRYP PFNGLDRAWELEMENTSPROC) (GLenum mode, GLsizei count, GLenum type, const void *indices); +typedef void (GL_APIENTRYP PFNGLENABLEPROC) (GLenum cap); +typedef void (GL_APIENTRYP PFNGLENABLEVERTEXATTRIBARRAYPROC) (GLuint index); +typedef void (GL_APIENTRYP PFNGLFINISHPROC) (void); +typedef void (GL_APIENTRYP PFNGLFLUSHPROC) (void); +typedef void (GL_APIENTRYP PFNGLFRAMEBUFFERRENDERBUFFERPROC) (GLenum target, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer); +typedef void (GL_APIENTRYP PFNGLFRAMEBUFFERTEXTURE2DPROC) (GLenum target, GLenum attachment, GLenum textarget, GLuint texture, GLint level); +typedef void (GL_APIENTRYP PFNGLFRONTFACEPROC) (GLenum mode); +typedef void (GL_APIENTRYP PFNGLGENBUFFERSPROC) (GLsizei n, GLuint *buffers); +typedef void (GL_APIENTRYP PFNGLGENERATEMIPMAPPROC) (GLenum target); +typedef void (GL_APIENTRYP PFNGLGENFRAMEBUFFERSPROC) (GLsizei n, GLuint *framebuffers); +typedef void (GL_APIENTRYP PFNGLGENRENDERBUFFERSPROC) (GLsizei n, GLuint *renderbuffers); +typedef void (GL_APIENTRYP PFNGLGENTEXTURESPROC) (GLsizei n, GLuint *textures); +typedef void (GL_APIENTRYP PFNGLGETACTIVEATTRIBPROC) (GLuint program, GLuint index, GLsizei bufSize, GLsizei *length, GLint *size, GLenum *type, GLchar *name); +typedef void (GL_APIENTRYP PFNGLGETACTIVEUNIFORMPROC) (GLuint program, GLuint index, GLsizei bufSize, GLsizei *length, GLint *size, GLenum *type, GLchar *name); +typedef void (GL_APIENTRYP PFNGLGETATTACHEDSHADERSPROC) (GLuint program, GLsizei maxCount, GLsizei *count, GLuint *shaders); +typedef GLint (GL_APIENTRYP PFNGLGETATTRIBLOCATIONPROC) (GLuint program, const GLchar *name); +typedef void (GL_APIENTRYP PFNGLGETBOOLEANVPROC) (GLenum pname, GLboolean *data); +typedef void (GL_APIENTRYP PFNGLGETBUFFERPARAMETERIVPROC) (GLenum target, GLenum pname, GLint *params); +typedef GLenum (GL_APIENTRYP PFNGLGETERRORPROC) (void); +typedef void (GL_APIENTRYP PFNGLGETFLOATVPROC) (GLenum pname, GLfloat *data); +typedef void (GL_APIENTRYP PFNGLGETFRAMEBUFFERATTACHMENTPARAMETERIVPROC) (GLenum target, GLenum attachment, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETINTEGERVPROC) (GLenum pname, GLint *data); +typedef void (GL_APIENTRYP PFNGLGETPROGRAMIVPROC) (GLuint program, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETPROGRAMINFOLOGPROC) (GLuint program, GLsizei bufSize, GLsizei *length, GLchar *infoLog); +typedef void (GL_APIENTRYP PFNGLGETRENDERBUFFERPARAMETERIVPROC) (GLenum target, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETSHADERIVPROC) (GLuint shader, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETSHADERINFOLOGPROC) (GLuint shader, GLsizei bufSize, GLsizei *length, GLchar *infoLog); +typedef void (GL_APIENTRYP PFNGLGETSHADERPRECISIONFORMATPROC) (GLenum shadertype, GLenum precisiontype, GLint *range, GLint *precision); +typedef void (GL_APIENTRYP PFNGLGETSHADERSOURCEPROC) (GLuint shader, GLsizei bufSize, GLsizei *length, GLchar *source); +typedef const GLubyte *(GL_APIENTRYP PFNGLGETSTRINGPROC) (GLenum name); +typedef void (GL_APIENTRYP PFNGLGETTEXPARAMETERFVPROC) (GLenum target, GLenum pname, GLfloat *params); +typedef void (GL_APIENTRYP PFNGLGETTEXPARAMETERIVPROC) (GLenum target, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETUNIFORMFVPROC) (GLuint program, GLint location, GLfloat *params); +typedef void (GL_APIENTRYP PFNGLGETUNIFORMIVPROC) (GLuint program, GLint location, GLint *params); +typedef GLint (GL_APIENTRYP PFNGLGETUNIFORMLOCATIONPROC) (GLuint program, const GLchar *name); +typedef void (GL_APIENTRYP PFNGLGETVERTEXATTRIBFVPROC) (GLuint index, GLenum pname, GLfloat *params); +typedef void (GL_APIENTRYP PFNGLGETVERTEXATTRIBIVPROC) (GLuint index, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETVERTEXATTRIBPOINTERVPROC) (GLuint index, GLenum pname, void **pointer); +typedef void (GL_APIENTRYP PFNGLHINTPROC) (GLenum target, GLenum mode); +typedef GLboolean (GL_APIENTRYP PFNGLISBUFFERPROC) (GLuint buffer); +typedef GLboolean (GL_APIENTRYP PFNGLISENABLEDPROC) (GLenum cap); +typedef GLboolean (GL_APIENTRYP PFNGLISFRAMEBUFFERPROC) (GLuint framebuffer); +typedef GLboolean (GL_APIENTRYP PFNGLISPROGRAMPROC) (GLuint program); +typedef GLboolean (GL_APIENTRYP PFNGLISRENDERBUFFERPROC) (GLuint renderbuffer); +typedef GLboolean (GL_APIENTRYP PFNGLISSHADERPROC) (GLuint shader); +typedef GLboolean (GL_APIENTRYP PFNGLISTEXTUREPROC) (GLuint texture); +typedef void (GL_APIENTRYP PFNGLLINEWIDTHPROC) (GLfloat width); +typedef void (GL_APIENTRYP PFNGLLINKPROGRAMPROC) (GLuint program); +typedef void (GL_APIENTRYP PFNGLPIXELSTOREIPROC) (GLenum pname, GLint param); +typedef void (GL_APIENTRYP PFNGLPOLYGONOFFSETPROC) (GLfloat factor, GLfloat units); +typedef void (GL_APIENTRYP PFNGLREADPIXELSPROC) (GLint x, GLint y, GLsizei width, GLsizei height, GLenum format, GLenum type, void *pixels); +typedef void (GL_APIENTRYP PFNGLRELEASESHADERCOMPILERPROC) (void); +typedef void (GL_APIENTRYP PFNGLRENDERBUFFERSTORAGEPROC) (GLenum target, GLenum internalformat, GLsizei width, GLsizei height); +typedef void (GL_APIENTRYP PFNGLSAMPLECOVERAGEPROC) (GLfloat value, GLboolean invert); +typedef void (GL_APIENTRYP PFNGLSCISSORPROC) (GLint x, GLint y, GLsizei width, GLsizei height); +typedef void (GL_APIENTRYP PFNGLSHADERBINARYPROC) (GLsizei count, const GLuint *shaders, GLenum binaryformat, const void *binary, GLsizei length); +typedef void (GL_APIENTRYP PFNGLSHADERSOURCEPROC) (GLuint shader, GLsizei count, const GLchar *const*string, const GLint *length); +typedef void (GL_APIENTRYP PFNGLSTENCILFUNCPROC) (GLenum func, GLint ref, GLuint mask); +typedef void (GL_APIENTRYP PFNGLSTENCILFUNCSEPARATEPROC) (GLenum face, GLenum func, GLint ref, GLuint mask); +typedef void (GL_APIENTRYP PFNGLSTENCILMASKPROC) (GLuint mask); +typedef void (GL_APIENTRYP PFNGLSTENCILMASKSEPARATEPROC) (GLenum face, GLuint mask); +typedef void (GL_APIENTRYP PFNGLSTENCILOPPROC) (GLenum fail, GLenum zfail, GLenum zpass); +typedef void (GL_APIENTRYP PFNGLSTENCILOPSEPARATEPROC) (GLenum face, GLenum sfail, GLenum dpfail, GLenum dppass); +typedef void (GL_APIENTRYP PFNGLTEXIMAGE2DPROC) (GLenum target, GLint level, GLint internalformat, GLsizei width, GLsizei height, GLint border, GLenum format, GLenum type, const void *pixels); +typedef void (GL_APIENTRYP PFNGLTEXPARAMETERFPROC) (GLenum target, GLenum pname, GLfloat param); +typedef void (GL_APIENTRYP PFNGLTEXPARAMETERFVPROC) (GLenum target, GLenum pname, const GLfloat *params); +typedef void (GL_APIENTRYP PFNGLTEXPARAMETERIPROC) (GLenum target, GLenum pname, GLint param); +typedef void (GL_APIENTRYP PFNGLTEXPARAMETERIVPROC) (GLenum target, GLenum pname, const GLint *params); +typedef void (GL_APIENTRYP PFNGLTEXSUBIMAGE2DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const void *pixels); +typedef void (GL_APIENTRYP PFNGLUNIFORM1FPROC) (GLint location, GLfloat v0); +typedef void (GL_APIENTRYP PFNGLUNIFORM1FVPROC) (GLint location, GLsizei count, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM1IPROC) (GLint location, GLint v0); +typedef void (GL_APIENTRYP PFNGLUNIFORM1IVPROC) (GLint location, GLsizei count, const GLint *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM2FPROC) (GLint location, GLfloat v0, GLfloat v1); +typedef void (GL_APIENTRYP PFNGLUNIFORM2FVPROC) (GLint location, GLsizei count, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM2IPROC) (GLint location, GLint v0, GLint v1); +typedef void (GL_APIENTRYP PFNGLUNIFORM2IVPROC) (GLint location, GLsizei count, const GLint *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM3FPROC) (GLint location, GLfloat v0, GLfloat v1, GLfloat v2); +typedef void (GL_APIENTRYP PFNGLUNIFORM3FVPROC) (GLint location, GLsizei count, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM3IPROC) (GLint location, GLint v0, GLint v1, GLint v2); +typedef void (GL_APIENTRYP PFNGLUNIFORM3IVPROC) (GLint location, GLsizei count, const GLint *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM4FPROC) (GLint location, GLfloat v0, GLfloat v1, GLfloat v2, GLfloat v3); +typedef void (GL_APIENTRYP PFNGLUNIFORM4FVPROC) (GLint location, GLsizei count, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM4IPROC) (GLint location, GLint v0, GLint v1, GLint v2, GLint v3); +typedef void (GL_APIENTRYP PFNGLUNIFORM4IVPROC) (GLint location, GLsizei count, const GLint *value); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX2FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX3FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX4FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUSEPROGRAMPROC) (GLuint program); +typedef void (GL_APIENTRYP PFNGLVALIDATEPROGRAMPROC) (GLuint program); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB1FPROC) (GLuint index, GLfloat x); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB1FVPROC) (GLuint index, const GLfloat *v); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB2FPROC) (GLuint index, GLfloat x, GLfloat y); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB2FVPROC) (GLuint index, const GLfloat *v); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB3FPROC) (GLuint index, GLfloat x, GLfloat y, GLfloat z); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB3FVPROC) (GLuint index, const GLfloat *v); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB4FPROC) (GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB4FVPROC) (GLuint index, const GLfloat *v); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBPOINTERPROC) (GLuint index, GLint size, GLenum type, GLboolean normalized, GLsizei stride, const void *pointer); +typedef void (GL_APIENTRYP PFNGLVIEWPORTPROC) (GLint x, GLint y, GLsizei width, GLsizei height); GL_APICALL void GL_APIENTRY glActiveTexture (GLenum texture); GL_APICALL void GL_APIENTRY glAttachShader (GLuint program, GLuint shader); GL_APICALL void GL_APIENTRY glBindAttribLocation (GLuint program, GLuint index, const GLchar *name); @@ -705,6 +851,22 @@ #define GL_COLOR_ATTACHMENT13 0x8CED #define GL_COLOR_ATTACHMENT14 0x8CEE #define GL_COLOR_ATTACHMENT15 0x8CEF +#define GL_COLOR_ATTACHMENT16 0x8CF0 +#define GL_COLOR_ATTACHMENT17 0x8CF1 +#define GL_COLOR_ATTACHMENT18 0x8CF2 +#define GL_COLOR_ATTACHMENT19 0x8CF3 +#define GL_COLOR_ATTACHMENT20 0x8CF4 +#define GL_COLOR_ATTACHMENT21 0x8CF5 +#define GL_COLOR_ATTACHMENT22 0x8CF6 +#define GL_COLOR_ATTACHMENT23 0x8CF7 +#define GL_COLOR_ATTACHMENT24 0x8CF8 +#define GL_COLOR_ATTACHMENT25 0x8CF9 +#define GL_COLOR_ATTACHMENT26 0x8CFA +#define GL_COLOR_ATTACHMENT27 0x8CFB +#define GL_COLOR_ATTACHMENT28 0x8CFC +#define GL_COLOR_ATTACHMENT29 0x8CFD +#define GL_COLOR_ATTACHMENT30 0x8CFE +#define GL_COLOR_ATTACHMENT31 0x8CFF #define GL_FRAMEBUFFER_INCOMPLETE_MULTISAMPLE 0x8D56 #define GL_MAX_SAMPLES 0x8D57 #define GL_HALF_FLOAT 0x140B @@ -826,7 +988,111 @@ #define GL_MAX_ELEMENT_INDEX 0x8D6B #define GL_NUM_SAMPLE_COUNTS 0x9380 #define GL_TEXTURE_IMMUTABLE_LEVELS 0x82DF -GL_APICALL void GL_APIENTRY glReadBuffer (GLenum mode); +typedef void (GL_APIENTRYP PFNGLREADBUFFERPROC) (GLenum src); +typedef void (GL_APIENTRYP PFNGLDRAWRANGEELEMENTSPROC) (GLenum mode, GLuint start, GLuint end, GLsizei count, GLenum type, const void *indices); +typedef void (GL_APIENTRYP PFNGLTEXIMAGE3DPROC) (GLenum target, GLint level, GLint internalformat, GLsizei width, GLsizei height, GLsizei depth, GLint border, GLenum format, GLenum type, const void *pixels); +typedef void (GL_APIENTRYP PFNGLTEXSUBIMAGE3DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const void *pixels); +typedef void (GL_APIENTRYP PFNGLCOPYTEXSUBIMAGE3DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height); +typedef void (GL_APIENTRYP PFNGLCOMPRESSEDTEXIMAGE3DPROC) (GLenum target, GLint level, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLint border, GLsizei imageSize, const void *data); +typedef void (GL_APIENTRYP PFNGLCOMPRESSEDTEXSUBIMAGE3DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const void *data); +typedef void (GL_APIENTRYP PFNGLGENQUERIESPROC) (GLsizei n, GLuint *ids); +typedef void (GL_APIENTRYP PFNGLDELETEQUERIESPROC) (GLsizei n, const GLuint *ids); +typedef GLboolean (GL_APIENTRYP PFNGLISQUERYPROC) (GLuint id); +typedef void (GL_APIENTRYP PFNGLBEGINQUERYPROC) (GLenum target, GLuint id); +typedef void (GL_APIENTRYP PFNGLENDQUERYPROC) (GLenum target); +typedef void (GL_APIENTRYP PFNGLGETQUERYIVPROC) (GLenum target, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETQUERYOBJECTUIVPROC) (GLuint id, GLenum pname, GLuint *params); +typedef GLboolean (GL_APIENTRYP PFNGLUNMAPBUFFERPROC) (GLenum target); +typedef void (GL_APIENTRYP PFNGLGETBUFFERPOINTERVPROC) (GLenum target, GLenum pname, void **params); +typedef void (GL_APIENTRYP PFNGLDRAWBUFFERSPROC) (GLsizei n, const GLenum *bufs); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX2X3FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX3X2FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX2X4FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX4X2FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX3X4FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX4X3FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLBLITFRAMEBUFFERPROC) (GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter); +typedef void (GL_APIENTRYP PFNGLRENDERBUFFERSTORAGEMULTISAMPLEPROC) (GLenum target, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height); +typedef void (GL_APIENTRYP PFNGLFRAMEBUFFERTEXTURELAYERPROC) (GLenum target, GLenum attachment, GLuint texture, GLint level, GLint layer); +typedef void *(GL_APIENTRYP PFNGLMAPBUFFERRANGEPROC) (GLenum target, GLintptr offset, GLsizeiptr length, GLbitfield access); +typedef void (GL_APIENTRYP PFNGLFLUSHMAPPEDBUFFERRANGEPROC) (GLenum target, GLintptr offset, GLsizeiptr length); +typedef void (GL_APIENTRYP PFNGLBINDVERTEXARRAYPROC) (GLuint array); +typedef void (GL_APIENTRYP PFNGLDELETEVERTEXARRAYSPROC) (GLsizei n, const GLuint *arrays); +typedef void (GL_APIENTRYP PFNGLGENVERTEXARRAYSPROC) (GLsizei n, GLuint *arrays); +typedef GLboolean (GL_APIENTRYP PFNGLISVERTEXARRAYPROC) (GLuint array); +typedef void (GL_APIENTRYP PFNGLGETINTEGERI_VPROC) (GLenum target, GLuint index, GLint *data); +typedef void (GL_APIENTRYP PFNGLBEGINTRANSFORMFEEDBACKPROC) (GLenum primitiveMode); +typedef void (GL_APIENTRYP PFNGLENDTRANSFORMFEEDBACKPROC) (void); +typedef void (GL_APIENTRYP PFNGLBINDBUFFERRANGEPROC) (GLenum target, GLuint index, GLuint buffer, GLintptr offset, GLsizeiptr size); +typedef void (GL_APIENTRYP PFNGLBINDBUFFERBASEPROC) (GLenum target, GLuint index, GLuint buffer); +typedef void (GL_APIENTRYP PFNGLTRANSFORMFEEDBACKVARYINGSPROC) (GLuint program, GLsizei count, const GLchar *const*varyings, GLenum bufferMode); +typedef void (GL_APIENTRYP PFNGLGETTRANSFORMFEEDBACKVARYINGPROC) (GLuint program, GLuint index, GLsizei bufSize, GLsizei *length, GLsizei *size, GLenum *type, GLchar *name); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBIPOINTERPROC) (GLuint index, GLint size, GLenum type, GLsizei stride, const void *pointer); +typedef void (GL_APIENTRYP PFNGLGETVERTEXATTRIBIIVPROC) (GLuint index, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETVERTEXATTRIBIUIVPROC) (GLuint index, GLenum pname, GLuint *params); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBI4IPROC) (GLuint index, GLint x, GLint y, GLint z, GLint w); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBI4UIPROC) (GLuint index, GLuint x, GLuint y, GLuint z, GLuint w); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBI4IVPROC) (GLuint index, const GLint *v); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBI4UIVPROC) (GLuint index, const GLuint *v); +typedef void (GL_APIENTRYP PFNGLGETUNIFORMUIVPROC) (GLuint program, GLint location, GLuint *params); +typedef GLint (GL_APIENTRYP PFNGLGETFRAGDATALOCATIONPROC) (GLuint program, const GLchar *name); +typedef void (GL_APIENTRYP PFNGLUNIFORM1UIPROC) (GLint location, GLuint v0); +typedef void (GL_APIENTRYP PFNGLUNIFORM2UIPROC) (GLint location, GLuint v0, GLuint v1); +typedef void (GL_APIENTRYP PFNGLUNIFORM3UIPROC) (GLint location, GLuint v0, GLuint v1, GLuint v2); +typedef void (GL_APIENTRYP PFNGLUNIFORM4UIPROC) (GLint location, GLuint v0, GLuint v1, GLuint v2, GLuint v3); +typedef void (GL_APIENTRYP PFNGLUNIFORM1UIVPROC) (GLint location, GLsizei count, const GLuint *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM2UIVPROC) (GLint location, GLsizei count, const GLuint *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM3UIVPROC) (GLint location, GLsizei count, const GLuint *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM4UIVPROC) (GLint location, GLsizei count, const GLuint *value); +typedef void (GL_APIENTRYP PFNGLCLEARBUFFERIVPROC) (GLenum buffer, GLint drawbuffer, const GLint *value); +typedef void (GL_APIENTRYP PFNGLCLEARBUFFERUIVPROC) (GLenum buffer, GLint drawbuffer, const GLuint *value); +typedef void (GL_APIENTRYP PFNGLCLEARBUFFERFVPROC) (GLenum buffer, GLint drawbuffer, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLCLEARBUFFERFIPROC) (GLenum buffer, GLint drawbuffer, GLfloat depth, GLint stencil); +typedef const GLubyte *(GL_APIENTRYP PFNGLGETSTRINGIPROC) (GLenum name, GLuint index); +typedef void (GL_APIENTRYP PFNGLCOPYBUFFERSUBDATAPROC) (GLenum readTarget, GLenum writeTarget, GLintptr readOffset, GLintptr writeOffset, GLsizeiptr size); +typedef void (GL_APIENTRYP PFNGLGETUNIFORMINDICESPROC) (GLuint program, GLsizei uniformCount, const GLchar *const*uniformNames, GLuint *uniformIndices); +typedef void (GL_APIENTRYP PFNGLGETACTIVEUNIFORMSIVPROC) (GLuint program, GLsizei uniformCount, const GLuint *uniformIndices, GLenum pname, GLint *params); +typedef GLuint (GL_APIENTRYP PFNGLGETUNIFORMBLOCKINDEXPROC) (GLuint program, const GLchar *uniformBlockName); +typedef void (GL_APIENTRYP PFNGLGETACTIVEUNIFORMBLOCKIVPROC) (GLuint program, GLuint uniformBlockIndex, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETACTIVEUNIFORMBLOCKNAMEPROC) (GLuint program, GLuint uniformBlockIndex, GLsizei bufSize, GLsizei *length, GLchar *uniformBlockName); +typedef void (GL_APIENTRYP PFNGLUNIFORMBLOCKBINDINGPROC) (GLuint program, GLuint uniformBlockIndex, GLuint uniformBlockBinding); +typedef void (GL_APIENTRYP PFNGLDRAWARRAYSINSTANCEDPROC) (GLenum mode, GLint first, GLsizei count, GLsizei instancecount); +typedef void (GL_APIENTRYP PFNGLDRAWELEMENTSINSTANCEDPROC) (GLenum mode, GLsizei count, GLenum type, const void *indices, GLsizei instancecount); +typedef GLsync (GL_APIENTRYP PFNGLFENCESYNCPROC) (GLenum condition, GLbitfield flags); +typedef GLboolean (GL_APIENTRYP PFNGLISSYNCPROC) (GLsync sync); +typedef void (GL_APIENTRYP PFNGLDELETESYNCPROC) (GLsync sync); +typedef GLenum (GL_APIENTRYP PFNGLCLIENTWAITSYNCPROC) (GLsync sync, GLbitfield flags, GLuint64 timeout); +typedef void (GL_APIENTRYP PFNGLWAITSYNCPROC) (GLsync sync, GLbitfield flags, GLuint64 timeout); +typedef void (GL_APIENTRYP PFNGLGETINTEGER64VPROC) (GLenum pname, GLint64 *data); +typedef void (GL_APIENTRYP PFNGLGETSYNCIVPROC) (GLsync sync, GLenum pname, GLsizei bufSize, GLsizei *length, GLint *values); +typedef void (GL_APIENTRYP PFNGLGETINTEGER64I_VPROC) (GLenum target, GLuint index, GLint64 *data); +typedef void (GL_APIENTRYP PFNGLGETBUFFERPARAMETERI64VPROC) (GLenum target, GLenum pname, GLint64 *params); +typedef void (GL_APIENTRYP PFNGLGENSAMPLERSPROC) (GLsizei count, GLuint *samplers); +typedef void (GL_APIENTRYP PFNGLDELETESAMPLERSPROC) (GLsizei count, const GLuint *samplers); +typedef GLboolean (GL_APIENTRYP PFNGLISSAMPLERPROC) (GLuint sampler); +typedef void (GL_APIENTRYP PFNGLBINDSAMPLERPROC) (GLuint unit, GLuint sampler); +typedef void (GL_APIENTRYP PFNGLSAMPLERPARAMETERIPROC) (GLuint sampler, GLenum pname, GLint param); +typedef void (GL_APIENTRYP PFNGLSAMPLERPARAMETERIVPROC) (GLuint sampler, GLenum pname, const GLint *param); +typedef void (GL_APIENTRYP PFNGLSAMPLERPARAMETERFPROC) (GLuint sampler, GLenum pname, GLfloat param); +typedef void (GL_APIENTRYP PFNGLSAMPLERPARAMETERFVPROC) (GLuint sampler, GLenum pname, const GLfloat *param); +typedef void (GL_APIENTRYP PFNGLGETSAMPLERPARAMETERIVPROC) (GLuint sampler, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETSAMPLERPARAMETERFVPROC) (GLuint sampler, GLenum pname, GLfloat *params); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBDIVISORPROC) (GLuint index, GLuint divisor); +typedef void (GL_APIENTRYP PFNGLBINDTRANSFORMFEEDBACKPROC) (GLenum target, GLuint id); +typedef void (GL_APIENTRYP PFNGLDELETETRANSFORMFEEDBACKSPROC) (GLsizei n, const GLuint *ids); +typedef void (GL_APIENTRYP PFNGLGENTRANSFORMFEEDBACKSPROC) (GLsizei n, GLuint *ids); +typedef GLboolean (GL_APIENTRYP PFNGLISTRANSFORMFEEDBACKPROC) (GLuint id); +typedef void (GL_APIENTRYP PFNGLPAUSETRANSFORMFEEDBACKPROC) (void); +typedef void (GL_APIENTRYP PFNGLRESUMETRANSFORMFEEDBACKPROC) (void); +typedef void (GL_APIENTRYP PFNGLGETPROGRAMBINARYPROC) (GLuint program, GLsizei bufSize, GLsizei *length, GLenum *binaryFormat, void *binary); +typedef void (GL_APIENTRYP PFNGLPROGRAMBINARYPROC) (GLuint program, GLenum binaryFormat, const void *binary, GLsizei length); +typedef void (GL_APIENTRYP PFNGLPROGRAMPARAMETERIPROC) (GLuint program, GLenum pname, GLint value); +typedef void (GL_APIENTRYP PFNGLINVALIDATEFRAMEBUFFERPROC) (GLenum target, GLsizei numAttachments, const GLenum *attachments); +typedef void (GL_APIENTRYP PFNGLINVALIDATESUBFRAMEBUFFERPROC) (GLenum target, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height); +typedef void (GL_APIENTRYP PFNGLTEXSTORAGE2DPROC) (GLenum target, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height); +typedef void (GL_APIENTRYP PFNGLTEXSTORAGE3DPROC) (GLenum target, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth); +typedef void (GL_APIENTRYP PFNGLGETINTERNALFORMATIVPROC) (GLenum target, GLenum internalformat, GLenum pname, GLsizei bufSize, GLint *params); +GL_APICALL void GL_APIENTRY glReadBuffer (GLenum src); GL_APICALL void GL_APIENTRY glDrawRangeElements (GLenum mode, GLuint start, GLuint end, GLsizei count, GLenum type, const void *indices); GL_APICALL void GL_APIENTRY glTexImage3D (GLenum target, GLint level, GLint internalformat, GLsizei width, GLsizei height, GLsizei depth, GLint border, GLenum format, GLenum type, const void *pixels); GL_APICALL void GL_APIENTRY glTexSubImage3D (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const void *pixels); @@ -1107,6 +1373,74 @@ #define GL_MAX_VERTEX_ATTRIB_RELATIVE_OFFSET 0x82D9 #define GL_MAX_VERTEX_ATTRIB_BINDINGS 0x82DA #define GL_MAX_VERTEX_ATTRIB_STRIDE 0x82E5 +typedef void (GL_APIENTRYP PFNGLDISPATCHCOMPUTEPROC) (GLuint num_groups_x, GLuint num_groups_y, GLuint num_groups_z); +typedef void (GL_APIENTRYP PFNGLDISPATCHCOMPUTEINDIRECTPROC) (GLintptr indirect); +typedef void (GL_APIENTRYP PFNGLDRAWARRAYSINDIRECTPROC) (GLenum mode, const void *indirect); +typedef void (GL_APIENTRYP PFNGLDRAWELEMENTSINDIRECTPROC) (GLenum mode, GLenum type, const void *indirect); +typedef void (GL_APIENTRYP PFNGLFRAMEBUFFERPARAMETERIPROC) (GLenum target, GLenum pname, GLint param); +typedef void (GL_APIENTRYP PFNGLGETFRAMEBUFFERPARAMETERIVPROC) (GLenum target, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETPROGRAMINTERFACEIVPROC) (GLuint program, GLenum programInterface, GLenum pname, GLint *params); +typedef GLuint (GL_APIENTRYP PFNGLGETPROGRAMRESOURCEINDEXPROC) (GLuint program, GLenum programInterface, const GLchar *name); +typedef void (GL_APIENTRYP PFNGLGETPROGRAMRESOURCENAMEPROC) (GLuint program, GLenum programInterface, GLuint index, GLsizei bufSize, GLsizei *length, GLchar *name); +typedef void (GL_APIENTRYP PFNGLGETPROGRAMRESOURCEIVPROC) (GLuint program, GLenum programInterface, GLuint index, GLsizei propCount, const GLenum *props, GLsizei bufSize, GLsizei *length, GLint *params); +typedef GLint (GL_APIENTRYP PFNGLGETPROGRAMRESOURCELOCATIONPROC) (GLuint program, GLenum programInterface, const GLchar *name); +typedef void (GL_APIENTRYP PFNGLUSEPROGRAMSTAGESPROC) (GLuint pipeline, GLbitfield stages, GLuint program); +typedef void (GL_APIENTRYP PFNGLACTIVESHADERPROGRAMPROC) (GLuint pipeline, GLuint program); +typedef GLuint (GL_APIENTRYP PFNGLCREATESHADERPROGRAMVPROC) (GLenum type, GLsizei count, const GLchar *const*strings); +typedef void (GL_APIENTRYP PFNGLBINDPROGRAMPIPELINEPROC) (GLuint pipeline); +typedef void (GL_APIENTRYP PFNGLDELETEPROGRAMPIPELINESPROC) (GLsizei n, const GLuint *pipelines); +typedef void (GL_APIENTRYP PFNGLGENPROGRAMPIPELINESPROC) (GLsizei n, GLuint *pipelines); +typedef GLboolean (GL_APIENTRYP PFNGLISPROGRAMPIPELINEPROC) (GLuint pipeline); +typedef void (GL_APIENTRYP PFNGLGETPROGRAMPIPELINEIVPROC) (GLuint pipeline, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM1IPROC) (GLuint program, GLint location, GLint v0); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM2IPROC) (GLuint program, GLint location, GLint v0, GLint v1); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM3IPROC) (GLuint program, GLint location, GLint v0, GLint v1, GLint v2); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM4IPROC) (GLuint program, GLint location, GLint v0, GLint v1, GLint v2, GLint v3); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM1UIPROC) (GLuint program, GLint location, GLuint v0); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM2UIPROC) (GLuint program, GLint location, GLuint v0, GLuint v1); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM3UIPROC) (GLuint program, GLint location, GLuint v0, GLuint v1, GLuint v2); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM4UIPROC) (GLuint program, GLint location, GLuint v0, GLuint v1, GLuint v2, GLuint v3); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM1FPROC) (GLuint program, GLint location, GLfloat v0); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM2FPROC) (GLuint program, GLint location, GLfloat v0, GLfloat v1); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM3FPROC) (GLuint program, GLint location, GLfloat v0, GLfloat v1, GLfloat v2); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM4FPROC) (GLuint program, GLint location, GLfloat v0, GLfloat v1, GLfloat v2, GLfloat v3); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM1IVPROC) (GLuint program, GLint location, GLsizei count, const GLint *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM2IVPROC) (GLuint program, GLint location, GLsizei count, const GLint *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM3IVPROC) (GLuint program, GLint location, GLsizei count, const GLint *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM4IVPROC) (GLuint program, GLint location, GLsizei count, const GLint *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM1UIVPROC) (GLuint program, GLint location, GLsizei count, const GLuint *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM2UIVPROC) (GLuint program, GLint location, GLsizei count, const GLuint *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM3UIVPROC) (GLuint program, GLint location, GLsizei count, const GLuint *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM4UIVPROC) (GLuint program, GLint location, GLsizei count, const GLuint *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM1FVPROC) (GLuint program, GLint location, GLsizei count, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM2FVPROC) (GLuint program, GLint location, GLsizei count, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM3FVPROC) (GLuint program, GLint location, GLsizei count, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM4FVPROC) (GLuint program, GLint location, GLsizei count, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORMMATRIX2FVPROC) (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORMMATRIX3FVPROC) (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORMMATRIX4FVPROC) (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORMMATRIX2X3FVPROC) (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORMMATRIX3X2FVPROC) (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORMMATRIX2X4FVPROC) (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORMMATRIX4X2FVPROC) (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORMMATRIX3X4FVPROC) (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORMMATRIX4X3FVPROC) (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLVALIDATEPROGRAMPIPELINEPROC) (GLuint pipeline); +typedef void (GL_APIENTRYP PFNGLGETPROGRAMPIPELINEINFOLOGPROC) (GLuint pipeline, GLsizei bufSize, GLsizei *length, GLchar *infoLog); +typedef void (GL_APIENTRYP PFNGLBINDIMAGETEXTUREPROC) (GLuint unit, GLuint texture, GLint level, GLboolean layered, GLint layer, GLenum access, GLenum format); +typedef void (GL_APIENTRYP PFNGLGETBOOLEANI_VPROC) (GLenum target, GLuint index, GLboolean *data); +typedef void (GL_APIENTRYP PFNGLMEMORYBARRIERPROC) (GLbitfield barriers); +typedef void (GL_APIENTRYP PFNGLMEMORYBARRIERBYREGIONPROC) (GLbitfield barriers); +typedef void (GL_APIENTRYP PFNGLTEXSTORAGE2DMULTISAMPLEPROC) (GLenum target, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations); +typedef void (GL_APIENTRYP PFNGLGETMULTISAMPLEFVPROC) (GLenum pname, GLuint index, GLfloat *val); +typedef void (GL_APIENTRYP PFNGLSAMPLEMASKIPROC) (GLuint maskNumber, GLbitfield mask); +typedef void (GL_APIENTRYP PFNGLGETTEXLEVELPARAMETERIVPROC) (GLenum target, GLint level, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETTEXLEVELPARAMETERFVPROC) (GLenum target, GLint level, GLenum pname, GLfloat *params); +typedef void (GL_APIENTRYP PFNGLBINDVERTEXBUFFERPROC) (GLuint bindingindex, GLuint buffer, GLintptr offset, GLsizei stride); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBFORMATPROC) (GLuint attribindex, GLint size, GLenum type, GLboolean normalized, GLuint relativeoffset); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBIFORMATPROC) (GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBBINDINGPROC) (GLuint attribindex, GLuint bindingindex); +typedef void (GL_APIENTRYP PFNGLVERTEXBINDINGDIVISORPROC) (GLuint bindingindex, GLuint divisor); GL_APICALL void GL_APIENTRY glDispatchCompute (GLuint num_groups_x, GLuint num_groups_y, GLuint num_groups_z); GL_APICALL void GL_APIENTRY glDispatchComputeIndirect (GLintptr indirect); GL_APICALL void GL_APIENTRY glDrawArraysIndirect (GLenum mode, const void *indirect); diff -Nru mesa-12.0.6/include/GLES3/gl32.h mesa-17.0.7/include/GLES3/gl32.h --- mesa-12.0.6/include/GLES3/gl32.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/include/GLES3/gl32.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,1817 @@ +#ifndef __gl32_h_ +#define __gl32_h_ 1 + +#ifdef __cplusplus +extern "C" { +#endif + +/* +** Copyright (c) 2013-2016 The Khronos Group Inc. +** +** Permission is hereby granted, free of charge, to any person obtaining a +** copy of this software and/or associated documentation files (the +** "Materials"), to deal in the Materials without restriction, including +** without limitation the rights to use, copy, modify, merge, publish, +** distribute, sublicense, and/or sell copies of the Materials, and to +** permit persons to whom the Materials are furnished to do so, subject to +** the following conditions: +** +** The above copyright notice and this permission notice shall be included +** in all copies or substantial portions of the Materials. +** +** THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +** MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY +** CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, +** TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE +** MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. +*/ +/* +** This header is generated from the Khronos OpenGL / OpenGL ES XML +** API Registry. The current version of the Registry, generator scripts +** used to make the header, and the header can be found at +** http://www.opengl.org/registry/ +** +** Khronos $Revision$ on $Date$ +*/ + +#include + +#ifndef GL_APIENTRYP +#define GL_APIENTRYP GL_APIENTRY* +#endif + +/* Generated on date 20160428 */ + +/* Generated C header for: + * API: gles2 + * Profile: common + * Versions considered: 2\.[0-9]|3\.[012] + * Versions emitted: .* + * Default extensions included: None + * Additional extensions included: _nomatch_^ + * Extensions removed: _nomatch_^ + */ + +#ifndef GL_ES_VERSION_2_0 +#define GL_ES_VERSION_2_0 1 +#include +typedef khronos_int8_t GLbyte; +typedef khronos_float_t GLclampf; +typedef khronos_int32_t GLfixed; +typedef short GLshort; +typedef unsigned short GLushort; +typedef void GLvoid; +typedef struct __GLsync *GLsync; +typedef khronos_int64_t GLint64; +typedef khronos_uint64_t GLuint64; +typedef unsigned int GLenum; +typedef unsigned int GLuint; +typedef char GLchar; +typedef khronos_float_t GLfloat; +typedef khronos_ssize_t GLsizeiptr; +typedef khronos_intptr_t GLintptr; +typedef unsigned int GLbitfield; +typedef int GLint; +typedef unsigned char GLboolean; +typedef int GLsizei; +typedef khronos_uint8_t GLubyte; +#define GL_DEPTH_BUFFER_BIT 0x00000100 +#define GL_STENCIL_BUFFER_BIT 0x00000400 +#define GL_COLOR_BUFFER_BIT 0x00004000 +#define GL_FALSE 0 +#define GL_TRUE 1 +#define GL_POINTS 0x0000 +#define GL_LINES 0x0001 +#define GL_LINE_LOOP 0x0002 +#define GL_LINE_STRIP 0x0003 +#define GL_TRIANGLES 0x0004 +#define GL_TRIANGLE_STRIP 0x0005 +#define GL_TRIANGLE_FAN 0x0006 +#define GL_ZERO 0 +#define GL_ONE 1 +#define GL_SRC_COLOR 0x0300 +#define GL_ONE_MINUS_SRC_COLOR 0x0301 +#define GL_SRC_ALPHA 0x0302 +#define GL_ONE_MINUS_SRC_ALPHA 0x0303 +#define GL_DST_ALPHA 0x0304 +#define GL_ONE_MINUS_DST_ALPHA 0x0305 +#define GL_DST_COLOR 0x0306 +#define GL_ONE_MINUS_DST_COLOR 0x0307 +#define GL_SRC_ALPHA_SATURATE 0x0308 +#define GL_FUNC_ADD 0x8006 +#define GL_BLEND_EQUATION 0x8009 +#define GL_BLEND_EQUATION_RGB 0x8009 +#define GL_BLEND_EQUATION_ALPHA 0x883D +#define GL_FUNC_SUBTRACT 0x800A +#define GL_FUNC_REVERSE_SUBTRACT 0x800B +#define GL_BLEND_DST_RGB 0x80C8 +#define GL_BLEND_SRC_RGB 0x80C9 +#define GL_BLEND_DST_ALPHA 0x80CA +#define GL_BLEND_SRC_ALPHA 0x80CB +#define GL_CONSTANT_COLOR 0x8001 +#define GL_ONE_MINUS_CONSTANT_COLOR 0x8002 +#define GL_CONSTANT_ALPHA 0x8003 +#define GL_ONE_MINUS_CONSTANT_ALPHA 0x8004 +#define GL_BLEND_COLOR 0x8005 +#define GL_ARRAY_BUFFER 0x8892 +#define GL_ELEMENT_ARRAY_BUFFER 0x8893 +#define GL_ARRAY_BUFFER_BINDING 0x8894 +#define GL_ELEMENT_ARRAY_BUFFER_BINDING 0x8895 +#define GL_STREAM_DRAW 0x88E0 +#define GL_STATIC_DRAW 0x88E4 +#define GL_DYNAMIC_DRAW 0x88E8 +#define GL_BUFFER_SIZE 0x8764 +#define GL_BUFFER_USAGE 0x8765 +#define GL_CURRENT_VERTEX_ATTRIB 0x8626 +#define GL_FRONT 0x0404 +#define GL_BACK 0x0405 +#define GL_FRONT_AND_BACK 0x0408 +#define GL_TEXTURE_2D 0x0DE1 +#define GL_CULL_FACE 0x0B44 +#define GL_BLEND 0x0BE2 +#define GL_DITHER 0x0BD0 +#define GL_STENCIL_TEST 0x0B90 +#define GL_DEPTH_TEST 0x0B71 +#define GL_SCISSOR_TEST 0x0C11 +#define GL_POLYGON_OFFSET_FILL 0x8037 +#define GL_SAMPLE_ALPHA_TO_COVERAGE 0x809E +#define GL_SAMPLE_COVERAGE 0x80A0 +#define GL_NO_ERROR 0 +#define GL_INVALID_ENUM 0x0500 +#define GL_INVALID_VALUE 0x0501 +#define GL_INVALID_OPERATION 0x0502 +#define GL_OUT_OF_MEMORY 0x0505 +#define GL_CW 0x0900 +#define GL_CCW 0x0901 +#define GL_LINE_WIDTH 0x0B21 +#define GL_ALIASED_POINT_SIZE_RANGE 0x846D +#define GL_ALIASED_LINE_WIDTH_RANGE 0x846E +#define GL_CULL_FACE_MODE 0x0B45 +#define GL_FRONT_FACE 0x0B46 +#define GL_DEPTH_RANGE 0x0B70 +#define GL_DEPTH_WRITEMASK 0x0B72 +#define GL_DEPTH_CLEAR_VALUE 0x0B73 +#define GL_DEPTH_FUNC 0x0B74 +#define GL_STENCIL_CLEAR_VALUE 0x0B91 +#define GL_STENCIL_FUNC 0x0B92 +#define GL_STENCIL_FAIL 0x0B94 +#define GL_STENCIL_PASS_DEPTH_FAIL 0x0B95 +#define GL_STENCIL_PASS_DEPTH_PASS 0x0B96 +#define GL_STENCIL_REF 0x0B97 +#define GL_STENCIL_VALUE_MASK 0x0B93 +#define GL_STENCIL_WRITEMASK 0x0B98 +#define GL_STENCIL_BACK_FUNC 0x8800 +#define GL_STENCIL_BACK_FAIL 0x8801 +#define GL_STENCIL_BACK_PASS_DEPTH_FAIL 0x8802 +#define GL_STENCIL_BACK_PASS_DEPTH_PASS 0x8803 +#define GL_STENCIL_BACK_REF 0x8CA3 +#define GL_STENCIL_BACK_VALUE_MASK 0x8CA4 +#define GL_STENCIL_BACK_WRITEMASK 0x8CA5 +#define GL_VIEWPORT 0x0BA2 +#define GL_SCISSOR_BOX 0x0C10 +#define GL_COLOR_CLEAR_VALUE 0x0C22 +#define GL_COLOR_WRITEMASK 0x0C23 +#define GL_UNPACK_ALIGNMENT 0x0CF5 +#define GL_PACK_ALIGNMENT 0x0D05 +#define GL_MAX_TEXTURE_SIZE 0x0D33 +#define GL_MAX_VIEWPORT_DIMS 0x0D3A +#define GL_SUBPIXEL_BITS 0x0D50 +#define GL_RED_BITS 0x0D52 +#define GL_GREEN_BITS 0x0D53 +#define GL_BLUE_BITS 0x0D54 +#define GL_ALPHA_BITS 0x0D55 +#define GL_DEPTH_BITS 0x0D56 +#define GL_STENCIL_BITS 0x0D57 +#define GL_POLYGON_OFFSET_UNITS 0x2A00 +#define GL_POLYGON_OFFSET_FACTOR 0x8038 +#define GL_TEXTURE_BINDING_2D 0x8069 +#define GL_SAMPLE_BUFFERS 0x80A8 +#define GL_SAMPLES 0x80A9 +#define GL_SAMPLE_COVERAGE_VALUE 0x80AA +#define GL_SAMPLE_COVERAGE_INVERT 0x80AB +#define GL_NUM_COMPRESSED_TEXTURE_FORMATS 0x86A2 +#define GL_COMPRESSED_TEXTURE_FORMATS 0x86A3 +#define GL_DONT_CARE 0x1100 +#define GL_FASTEST 0x1101 +#define GL_NICEST 0x1102 +#define GL_GENERATE_MIPMAP_HINT 0x8192 +#define GL_BYTE 0x1400 +#define GL_UNSIGNED_BYTE 0x1401 +#define GL_SHORT 0x1402 +#define GL_UNSIGNED_SHORT 0x1403 +#define GL_INT 0x1404 +#define GL_UNSIGNED_INT 0x1405 +#define GL_FLOAT 0x1406 +#define GL_FIXED 0x140C +#define GL_DEPTH_COMPONENT 0x1902 +#define GL_ALPHA 0x1906 +#define GL_RGB 0x1907 +#define GL_RGBA 0x1908 +#define GL_LUMINANCE 0x1909 +#define GL_LUMINANCE_ALPHA 0x190A +#define GL_UNSIGNED_SHORT_4_4_4_4 0x8033 +#define GL_UNSIGNED_SHORT_5_5_5_1 0x8034 +#define GL_UNSIGNED_SHORT_5_6_5 0x8363 +#define GL_FRAGMENT_SHADER 0x8B30 +#define GL_VERTEX_SHADER 0x8B31 +#define GL_MAX_VERTEX_ATTRIBS 0x8869 +#define GL_MAX_VERTEX_UNIFORM_VECTORS 0x8DFB +#define GL_MAX_VARYING_VECTORS 0x8DFC +#define GL_MAX_COMBINED_TEXTURE_IMAGE_UNITS 0x8B4D +#define GL_MAX_VERTEX_TEXTURE_IMAGE_UNITS 0x8B4C +#define GL_MAX_TEXTURE_IMAGE_UNITS 0x8872 +#define GL_MAX_FRAGMENT_UNIFORM_VECTORS 0x8DFD +#define GL_SHADER_TYPE 0x8B4F +#define GL_DELETE_STATUS 0x8B80 +#define GL_LINK_STATUS 0x8B82 +#define GL_VALIDATE_STATUS 0x8B83 +#define GL_ATTACHED_SHADERS 0x8B85 +#define GL_ACTIVE_UNIFORMS 0x8B86 +#define GL_ACTIVE_UNIFORM_MAX_LENGTH 0x8B87 +#define GL_ACTIVE_ATTRIBUTES 0x8B89 +#define GL_ACTIVE_ATTRIBUTE_MAX_LENGTH 0x8B8A +#define GL_SHADING_LANGUAGE_VERSION 0x8B8C +#define GL_CURRENT_PROGRAM 0x8B8D +#define GL_NEVER 0x0200 +#define GL_LESS 0x0201 +#define GL_EQUAL 0x0202 +#define GL_LEQUAL 0x0203 +#define GL_GREATER 0x0204 +#define GL_NOTEQUAL 0x0205 +#define GL_GEQUAL 0x0206 +#define GL_ALWAYS 0x0207 +#define GL_KEEP 0x1E00 +#define GL_REPLACE 0x1E01 +#define GL_INCR 0x1E02 +#define GL_DECR 0x1E03 +#define GL_INVERT 0x150A +#define GL_INCR_WRAP 0x8507 +#define GL_DECR_WRAP 0x8508 +#define GL_VENDOR 0x1F00 +#define GL_RENDERER 0x1F01 +#define GL_VERSION 0x1F02 +#define GL_EXTENSIONS 0x1F03 +#define GL_NEAREST 0x2600 +#define GL_LINEAR 0x2601 +#define GL_NEAREST_MIPMAP_NEAREST 0x2700 +#define GL_LINEAR_MIPMAP_NEAREST 0x2701 +#define GL_NEAREST_MIPMAP_LINEAR 0x2702 +#define GL_LINEAR_MIPMAP_LINEAR 0x2703 +#define GL_TEXTURE_MAG_FILTER 0x2800 +#define GL_TEXTURE_MIN_FILTER 0x2801 +#define GL_TEXTURE_WRAP_S 0x2802 +#define GL_TEXTURE_WRAP_T 0x2803 +#define GL_TEXTURE 0x1702 +#define GL_TEXTURE_CUBE_MAP 0x8513 +#define GL_TEXTURE_BINDING_CUBE_MAP 0x8514 +#define GL_TEXTURE_CUBE_MAP_POSITIVE_X 0x8515 +#define GL_TEXTURE_CUBE_MAP_NEGATIVE_X 0x8516 +#define GL_TEXTURE_CUBE_MAP_POSITIVE_Y 0x8517 +#define GL_TEXTURE_CUBE_MAP_NEGATIVE_Y 0x8518 +#define GL_TEXTURE_CUBE_MAP_POSITIVE_Z 0x8519 +#define GL_TEXTURE_CUBE_MAP_NEGATIVE_Z 0x851A +#define GL_MAX_CUBE_MAP_TEXTURE_SIZE 0x851C +#define GL_TEXTURE0 0x84C0 +#define GL_TEXTURE1 0x84C1 +#define GL_TEXTURE2 0x84C2 +#define GL_TEXTURE3 0x84C3 +#define GL_TEXTURE4 0x84C4 +#define GL_TEXTURE5 0x84C5 +#define GL_TEXTURE6 0x84C6 +#define GL_TEXTURE7 0x84C7 +#define GL_TEXTURE8 0x84C8 +#define GL_TEXTURE9 0x84C9 +#define GL_TEXTURE10 0x84CA +#define GL_TEXTURE11 0x84CB +#define GL_TEXTURE12 0x84CC +#define GL_TEXTURE13 0x84CD +#define GL_TEXTURE14 0x84CE +#define GL_TEXTURE15 0x84CF +#define GL_TEXTURE16 0x84D0 +#define GL_TEXTURE17 0x84D1 +#define GL_TEXTURE18 0x84D2 +#define GL_TEXTURE19 0x84D3 +#define GL_TEXTURE20 0x84D4 +#define GL_TEXTURE21 0x84D5 +#define GL_TEXTURE22 0x84D6 +#define GL_TEXTURE23 0x84D7 +#define GL_TEXTURE24 0x84D8 +#define GL_TEXTURE25 0x84D9 +#define GL_TEXTURE26 0x84DA +#define GL_TEXTURE27 0x84DB +#define GL_TEXTURE28 0x84DC +#define GL_TEXTURE29 0x84DD +#define GL_TEXTURE30 0x84DE +#define GL_TEXTURE31 0x84DF +#define GL_ACTIVE_TEXTURE 0x84E0 +#define GL_REPEAT 0x2901 +#define GL_CLAMP_TO_EDGE 0x812F +#define GL_MIRRORED_REPEAT 0x8370 +#define GL_FLOAT_VEC2 0x8B50 +#define GL_FLOAT_VEC3 0x8B51 +#define GL_FLOAT_VEC4 0x8B52 +#define GL_INT_VEC2 0x8B53 +#define GL_INT_VEC3 0x8B54 +#define GL_INT_VEC4 0x8B55 +#define GL_BOOL 0x8B56 +#define GL_BOOL_VEC2 0x8B57 +#define GL_BOOL_VEC3 0x8B58 +#define GL_BOOL_VEC4 0x8B59 +#define GL_FLOAT_MAT2 0x8B5A +#define GL_FLOAT_MAT3 0x8B5B +#define GL_FLOAT_MAT4 0x8B5C +#define GL_SAMPLER_2D 0x8B5E +#define GL_SAMPLER_CUBE 0x8B60 +#define GL_VERTEX_ATTRIB_ARRAY_ENABLED 0x8622 +#define GL_VERTEX_ATTRIB_ARRAY_SIZE 0x8623 +#define GL_VERTEX_ATTRIB_ARRAY_STRIDE 0x8624 +#define GL_VERTEX_ATTRIB_ARRAY_TYPE 0x8625 +#define GL_VERTEX_ATTRIB_ARRAY_NORMALIZED 0x886A +#define GL_VERTEX_ATTRIB_ARRAY_POINTER 0x8645 +#define GL_VERTEX_ATTRIB_ARRAY_BUFFER_BINDING 0x889F +#define GL_IMPLEMENTATION_COLOR_READ_TYPE 0x8B9A +#define GL_IMPLEMENTATION_COLOR_READ_FORMAT 0x8B9B +#define GL_COMPILE_STATUS 0x8B81 +#define GL_INFO_LOG_LENGTH 0x8B84 +#define GL_SHADER_SOURCE_LENGTH 0x8B88 +#define GL_SHADER_COMPILER 0x8DFA +#define GL_SHADER_BINARY_FORMATS 0x8DF8 +#define GL_NUM_SHADER_BINARY_FORMATS 0x8DF9 +#define GL_LOW_FLOAT 0x8DF0 +#define GL_MEDIUM_FLOAT 0x8DF1 +#define GL_HIGH_FLOAT 0x8DF2 +#define GL_LOW_INT 0x8DF3 +#define GL_MEDIUM_INT 0x8DF4 +#define GL_HIGH_INT 0x8DF5 +#define GL_FRAMEBUFFER 0x8D40 +#define GL_RENDERBUFFER 0x8D41 +#define GL_RGBA4 0x8056 +#define GL_RGB5_A1 0x8057 +#define GL_RGB565 0x8D62 +#define GL_DEPTH_COMPONENT16 0x81A5 +#define GL_STENCIL_INDEX8 0x8D48 +#define GL_RENDERBUFFER_WIDTH 0x8D42 +#define GL_RENDERBUFFER_HEIGHT 0x8D43 +#define GL_RENDERBUFFER_INTERNAL_FORMAT 0x8D44 +#define GL_RENDERBUFFER_RED_SIZE 0x8D50 +#define GL_RENDERBUFFER_GREEN_SIZE 0x8D51 +#define GL_RENDERBUFFER_BLUE_SIZE 0x8D52 +#define GL_RENDERBUFFER_ALPHA_SIZE 0x8D53 +#define GL_RENDERBUFFER_DEPTH_SIZE 0x8D54 +#define GL_RENDERBUFFER_STENCIL_SIZE 0x8D55 +#define GL_FRAMEBUFFER_ATTACHMENT_OBJECT_TYPE 0x8CD0 +#define GL_FRAMEBUFFER_ATTACHMENT_OBJECT_NAME 0x8CD1 +#define GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_LEVEL 0x8CD2 +#define GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_CUBE_MAP_FACE 0x8CD3 +#define GL_COLOR_ATTACHMENT0 0x8CE0 +#define GL_DEPTH_ATTACHMENT 0x8D00 +#define GL_STENCIL_ATTACHMENT 0x8D20 +#define GL_NONE 0 +#define GL_FRAMEBUFFER_COMPLETE 0x8CD5 +#define GL_FRAMEBUFFER_INCOMPLETE_ATTACHMENT 0x8CD6 +#define GL_FRAMEBUFFER_INCOMPLETE_MISSING_ATTACHMENT 0x8CD7 +#define GL_FRAMEBUFFER_INCOMPLETE_DIMENSIONS 0x8CD9 +#define GL_FRAMEBUFFER_UNSUPPORTED 0x8CDD +#define GL_FRAMEBUFFER_BINDING 0x8CA6 +#define GL_RENDERBUFFER_BINDING 0x8CA7 +#define GL_MAX_RENDERBUFFER_SIZE 0x84E8 +#define GL_INVALID_FRAMEBUFFER_OPERATION 0x0506 +typedef void (GL_APIENTRYP PFNGLACTIVETEXTUREPROC) (GLenum texture); +typedef void (GL_APIENTRYP PFNGLATTACHSHADERPROC) (GLuint program, GLuint shader); +typedef void (GL_APIENTRYP PFNGLBINDATTRIBLOCATIONPROC) (GLuint program, GLuint index, const GLchar *name); +typedef void (GL_APIENTRYP PFNGLBINDBUFFERPROC) (GLenum target, GLuint buffer); +typedef void (GL_APIENTRYP PFNGLBINDFRAMEBUFFERPROC) (GLenum target, GLuint framebuffer); +typedef void (GL_APIENTRYP PFNGLBINDRENDERBUFFERPROC) (GLenum target, GLuint renderbuffer); +typedef void (GL_APIENTRYP PFNGLBINDTEXTUREPROC) (GLenum target, GLuint texture); +typedef void (GL_APIENTRYP PFNGLBLENDCOLORPROC) (GLfloat red, GLfloat green, GLfloat blue, GLfloat alpha); +typedef void (GL_APIENTRYP PFNGLBLENDEQUATIONPROC) (GLenum mode); +typedef void (GL_APIENTRYP PFNGLBLENDEQUATIONSEPARATEPROC) (GLenum modeRGB, GLenum modeAlpha); +typedef void (GL_APIENTRYP PFNGLBLENDFUNCPROC) (GLenum sfactor, GLenum dfactor); +typedef void (GL_APIENTRYP PFNGLBLENDFUNCSEPARATEPROC) (GLenum sfactorRGB, GLenum dfactorRGB, GLenum sfactorAlpha, GLenum dfactorAlpha); +typedef void (GL_APIENTRYP PFNGLBUFFERDATAPROC) (GLenum target, GLsizeiptr size, const void *data, GLenum usage); +typedef void (GL_APIENTRYP PFNGLBUFFERSUBDATAPROC) (GLenum target, GLintptr offset, GLsizeiptr size, const void *data); +typedef GLenum (GL_APIENTRYP PFNGLCHECKFRAMEBUFFERSTATUSPROC) (GLenum target); +typedef void (GL_APIENTRYP PFNGLCLEARPROC) (GLbitfield mask); +typedef void (GL_APIENTRYP PFNGLCLEARCOLORPROC) (GLfloat red, GLfloat green, GLfloat blue, GLfloat alpha); +typedef void (GL_APIENTRYP PFNGLCLEARDEPTHFPROC) (GLfloat d); +typedef void (GL_APIENTRYP PFNGLCLEARSTENCILPROC) (GLint s); +typedef void (GL_APIENTRYP PFNGLCOLORMASKPROC) (GLboolean red, GLboolean green, GLboolean blue, GLboolean alpha); +typedef void (GL_APIENTRYP PFNGLCOMPILESHADERPROC) (GLuint shader); +typedef void (GL_APIENTRYP PFNGLCOMPRESSEDTEXIMAGE2DPROC) (GLenum target, GLint level, GLenum internalformat, GLsizei width, GLsizei height, GLint border, GLsizei imageSize, const void *data); +typedef void (GL_APIENTRYP PFNGLCOMPRESSEDTEXSUBIMAGE2DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const void *data); +typedef void (GL_APIENTRYP PFNGLCOPYTEXIMAGE2DPROC) (GLenum target, GLint level, GLenum internalformat, GLint x, GLint y, GLsizei width, GLsizei height, GLint border); +typedef void (GL_APIENTRYP PFNGLCOPYTEXSUBIMAGE2DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height); +typedef GLuint (GL_APIENTRYP PFNGLCREATEPROGRAMPROC) (void); +typedef GLuint (GL_APIENTRYP PFNGLCREATESHADERPROC) (GLenum type); +typedef void (GL_APIENTRYP PFNGLCULLFACEPROC) (GLenum mode); +typedef void (GL_APIENTRYP PFNGLDELETEBUFFERSPROC) (GLsizei n, const GLuint *buffers); +typedef void (GL_APIENTRYP PFNGLDELETEFRAMEBUFFERSPROC) (GLsizei n, const GLuint *framebuffers); +typedef void (GL_APIENTRYP PFNGLDELETEPROGRAMPROC) (GLuint program); +typedef void (GL_APIENTRYP PFNGLDELETERENDERBUFFERSPROC) (GLsizei n, const GLuint *renderbuffers); +typedef void (GL_APIENTRYP PFNGLDELETESHADERPROC) (GLuint shader); +typedef void (GL_APIENTRYP PFNGLDELETETEXTURESPROC) (GLsizei n, const GLuint *textures); +typedef void (GL_APIENTRYP PFNGLDEPTHFUNCPROC) (GLenum func); +typedef void (GL_APIENTRYP PFNGLDEPTHMASKPROC) (GLboolean flag); +typedef void (GL_APIENTRYP PFNGLDEPTHRANGEFPROC) (GLfloat n, GLfloat f); +typedef void (GL_APIENTRYP PFNGLDETACHSHADERPROC) (GLuint program, GLuint shader); +typedef void (GL_APIENTRYP PFNGLDISABLEPROC) (GLenum cap); +typedef void (GL_APIENTRYP PFNGLDISABLEVERTEXATTRIBARRAYPROC) (GLuint index); +typedef void (GL_APIENTRYP PFNGLDRAWARRAYSPROC) (GLenum mode, GLint first, GLsizei count); +typedef void (GL_APIENTRYP PFNGLDRAWELEMENTSPROC) (GLenum mode, GLsizei count, GLenum type, const void *indices); +typedef void (GL_APIENTRYP PFNGLENABLEPROC) (GLenum cap); +typedef void (GL_APIENTRYP PFNGLENABLEVERTEXATTRIBARRAYPROC) (GLuint index); +typedef void (GL_APIENTRYP PFNGLFINISHPROC) (void); +typedef void (GL_APIENTRYP PFNGLFLUSHPROC) (void); +typedef void (GL_APIENTRYP PFNGLFRAMEBUFFERRENDERBUFFERPROC) (GLenum target, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer); +typedef void (GL_APIENTRYP PFNGLFRAMEBUFFERTEXTURE2DPROC) (GLenum target, GLenum attachment, GLenum textarget, GLuint texture, GLint level); +typedef void (GL_APIENTRYP PFNGLFRONTFACEPROC) (GLenum mode); +typedef void (GL_APIENTRYP PFNGLGENBUFFERSPROC) (GLsizei n, GLuint *buffers); +typedef void (GL_APIENTRYP PFNGLGENERATEMIPMAPPROC) (GLenum target); +typedef void (GL_APIENTRYP PFNGLGENFRAMEBUFFERSPROC) (GLsizei n, GLuint *framebuffers); +typedef void (GL_APIENTRYP PFNGLGENRENDERBUFFERSPROC) (GLsizei n, GLuint *renderbuffers); +typedef void (GL_APIENTRYP PFNGLGENTEXTURESPROC) (GLsizei n, GLuint *textures); +typedef void (GL_APIENTRYP PFNGLGETACTIVEATTRIBPROC) (GLuint program, GLuint index, GLsizei bufSize, GLsizei *length, GLint *size, GLenum *type, GLchar *name); +typedef void (GL_APIENTRYP PFNGLGETACTIVEUNIFORMPROC) (GLuint program, GLuint index, GLsizei bufSize, GLsizei *length, GLint *size, GLenum *type, GLchar *name); +typedef void (GL_APIENTRYP PFNGLGETATTACHEDSHADERSPROC) (GLuint program, GLsizei maxCount, GLsizei *count, GLuint *shaders); +typedef GLint (GL_APIENTRYP PFNGLGETATTRIBLOCATIONPROC) (GLuint program, const GLchar *name); +typedef void (GL_APIENTRYP PFNGLGETBOOLEANVPROC) (GLenum pname, GLboolean *data); +typedef void (GL_APIENTRYP PFNGLGETBUFFERPARAMETERIVPROC) (GLenum target, GLenum pname, GLint *params); +typedef GLenum (GL_APIENTRYP PFNGLGETERRORPROC) (void); +typedef void (GL_APIENTRYP PFNGLGETFLOATVPROC) (GLenum pname, GLfloat *data); +typedef void (GL_APIENTRYP PFNGLGETFRAMEBUFFERATTACHMENTPARAMETERIVPROC) (GLenum target, GLenum attachment, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETINTEGERVPROC) (GLenum pname, GLint *data); +typedef void (GL_APIENTRYP PFNGLGETPROGRAMIVPROC) (GLuint program, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETPROGRAMINFOLOGPROC) (GLuint program, GLsizei bufSize, GLsizei *length, GLchar *infoLog); +typedef void (GL_APIENTRYP PFNGLGETRENDERBUFFERPARAMETERIVPROC) (GLenum target, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETSHADERIVPROC) (GLuint shader, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETSHADERINFOLOGPROC) (GLuint shader, GLsizei bufSize, GLsizei *length, GLchar *infoLog); +typedef void (GL_APIENTRYP PFNGLGETSHADERPRECISIONFORMATPROC) (GLenum shadertype, GLenum precisiontype, GLint *range, GLint *precision); +typedef void (GL_APIENTRYP PFNGLGETSHADERSOURCEPROC) (GLuint shader, GLsizei bufSize, GLsizei *length, GLchar *source); +typedef const GLubyte *(GL_APIENTRYP PFNGLGETSTRINGPROC) (GLenum name); +typedef void (GL_APIENTRYP PFNGLGETTEXPARAMETERFVPROC) (GLenum target, GLenum pname, GLfloat *params); +typedef void (GL_APIENTRYP PFNGLGETTEXPARAMETERIVPROC) (GLenum target, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETUNIFORMFVPROC) (GLuint program, GLint location, GLfloat *params); +typedef void (GL_APIENTRYP PFNGLGETUNIFORMIVPROC) (GLuint program, GLint location, GLint *params); +typedef GLint (GL_APIENTRYP PFNGLGETUNIFORMLOCATIONPROC) (GLuint program, const GLchar *name); +typedef void (GL_APIENTRYP PFNGLGETVERTEXATTRIBFVPROC) (GLuint index, GLenum pname, GLfloat *params); +typedef void (GL_APIENTRYP PFNGLGETVERTEXATTRIBIVPROC) (GLuint index, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETVERTEXATTRIBPOINTERVPROC) (GLuint index, GLenum pname, void **pointer); +typedef void (GL_APIENTRYP PFNGLHINTPROC) (GLenum target, GLenum mode); +typedef GLboolean (GL_APIENTRYP PFNGLISBUFFERPROC) (GLuint buffer); +typedef GLboolean (GL_APIENTRYP PFNGLISENABLEDPROC) (GLenum cap); +typedef GLboolean (GL_APIENTRYP PFNGLISFRAMEBUFFERPROC) (GLuint framebuffer); +typedef GLboolean (GL_APIENTRYP PFNGLISPROGRAMPROC) (GLuint program); +typedef GLboolean (GL_APIENTRYP PFNGLISRENDERBUFFERPROC) (GLuint renderbuffer); +typedef GLboolean (GL_APIENTRYP PFNGLISSHADERPROC) (GLuint shader); +typedef GLboolean (GL_APIENTRYP PFNGLISTEXTUREPROC) (GLuint texture); +typedef void (GL_APIENTRYP PFNGLLINEWIDTHPROC) (GLfloat width); +typedef void (GL_APIENTRYP PFNGLLINKPROGRAMPROC) (GLuint program); +typedef void (GL_APIENTRYP PFNGLPIXELSTOREIPROC) (GLenum pname, GLint param); +typedef void (GL_APIENTRYP PFNGLPOLYGONOFFSETPROC) (GLfloat factor, GLfloat units); +typedef void (GL_APIENTRYP PFNGLREADPIXELSPROC) (GLint x, GLint y, GLsizei width, GLsizei height, GLenum format, GLenum type, void *pixels); +typedef void (GL_APIENTRYP PFNGLRELEASESHADERCOMPILERPROC) (void); +typedef void (GL_APIENTRYP PFNGLRENDERBUFFERSTORAGEPROC) (GLenum target, GLenum internalformat, GLsizei width, GLsizei height); +typedef void (GL_APIENTRYP PFNGLSAMPLECOVERAGEPROC) (GLfloat value, GLboolean invert); +typedef void (GL_APIENTRYP PFNGLSCISSORPROC) (GLint x, GLint y, GLsizei width, GLsizei height); +typedef void (GL_APIENTRYP PFNGLSHADERBINARYPROC) (GLsizei count, const GLuint *shaders, GLenum binaryformat, const void *binary, GLsizei length); +typedef void (GL_APIENTRYP PFNGLSHADERSOURCEPROC) (GLuint shader, GLsizei count, const GLchar *const*string, const GLint *length); +typedef void (GL_APIENTRYP PFNGLSTENCILFUNCPROC) (GLenum func, GLint ref, GLuint mask); +typedef void (GL_APIENTRYP PFNGLSTENCILFUNCSEPARATEPROC) (GLenum face, GLenum func, GLint ref, GLuint mask); +typedef void (GL_APIENTRYP PFNGLSTENCILMASKPROC) (GLuint mask); +typedef void (GL_APIENTRYP PFNGLSTENCILMASKSEPARATEPROC) (GLenum face, GLuint mask); +typedef void (GL_APIENTRYP PFNGLSTENCILOPPROC) (GLenum fail, GLenum zfail, GLenum zpass); +typedef void (GL_APIENTRYP PFNGLSTENCILOPSEPARATEPROC) (GLenum face, GLenum sfail, GLenum dpfail, GLenum dppass); +typedef void (GL_APIENTRYP PFNGLTEXIMAGE2DPROC) (GLenum target, GLint level, GLint internalformat, GLsizei width, GLsizei height, GLint border, GLenum format, GLenum type, const void *pixels); +typedef void (GL_APIENTRYP PFNGLTEXPARAMETERFPROC) (GLenum target, GLenum pname, GLfloat param); +typedef void (GL_APIENTRYP PFNGLTEXPARAMETERFVPROC) (GLenum target, GLenum pname, const GLfloat *params); +typedef void (GL_APIENTRYP PFNGLTEXPARAMETERIPROC) (GLenum target, GLenum pname, GLint param); +typedef void (GL_APIENTRYP PFNGLTEXPARAMETERIVPROC) (GLenum target, GLenum pname, const GLint *params); +typedef void (GL_APIENTRYP PFNGLTEXSUBIMAGE2DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const void *pixels); +typedef void (GL_APIENTRYP PFNGLUNIFORM1FPROC) (GLint location, GLfloat v0); +typedef void (GL_APIENTRYP PFNGLUNIFORM1FVPROC) (GLint location, GLsizei count, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM1IPROC) (GLint location, GLint v0); +typedef void (GL_APIENTRYP PFNGLUNIFORM1IVPROC) (GLint location, GLsizei count, const GLint *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM2FPROC) (GLint location, GLfloat v0, GLfloat v1); +typedef void (GL_APIENTRYP PFNGLUNIFORM2FVPROC) (GLint location, GLsizei count, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM2IPROC) (GLint location, GLint v0, GLint v1); +typedef void (GL_APIENTRYP PFNGLUNIFORM2IVPROC) (GLint location, GLsizei count, const GLint *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM3FPROC) (GLint location, GLfloat v0, GLfloat v1, GLfloat v2); +typedef void (GL_APIENTRYP PFNGLUNIFORM3FVPROC) (GLint location, GLsizei count, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM3IPROC) (GLint location, GLint v0, GLint v1, GLint v2); +typedef void (GL_APIENTRYP PFNGLUNIFORM3IVPROC) (GLint location, GLsizei count, const GLint *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM4FPROC) (GLint location, GLfloat v0, GLfloat v1, GLfloat v2, GLfloat v3); +typedef void (GL_APIENTRYP PFNGLUNIFORM4FVPROC) (GLint location, GLsizei count, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM4IPROC) (GLint location, GLint v0, GLint v1, GLint v2, GLint v3); +typedef void (GL_APIENTRYP PFNGLUNIFORM4IVPROC) (GLint location, GLsizei count, const GLint *value); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX2FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX3FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX4FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUSEPROGRAMPROC) (GLuint program); +typedef void (GL_APIENTRYP PFNGLVALIDATEPROGRAMPROC) (GLuint program); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB1FPROC) (GLuint index, GLfloat x); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB1FVPROC) (GLuint index, const GLfloat *v); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB2FPROC) (GLuint index, GLfloat x, GLfloat y); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB2FVPROC) (GLuint index, const GLfloat *v); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB3FPROC) (GLuint index, GLfloat x, GLfloat y, GLfloat z); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB3FVPROC) (GLuint index, const GLfloat *v); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB4FPROC) (GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB4FVPROC) (GLuint index, const GLfloat *v); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBPOINTERPROC) (GLuint index, GLint size, GLenum type, GLboolean normalized, GLsizei stride, const void *pointer); +typedef void (GL_APIENTRYP PFNGLVIEWPORTPROC) (GLint x, GLint y, GLsizei width, GLsizei height); +GL_APICALL void GL_APIENTRY glActiveTexture (GLenum texture); +GL_APICALL void GL_APIENTRY glAttachShader (GLuint program, GLuint shader); +GL_APICALL void GL_APIENTRY glBindAttribLocation (GLuint program, GLuint index, const GLchar *name); +GL_APICALL void GL_APIENTRY glBindBuffer (GLenum target, GLuint buffer); +GL_APICALL void GL_APIENTRY glBindFramebuffer (GLenum target, GLuint framebuffer); +GL_APICALL void GL_APIENTRY glBindRenderbuffer (GLenum target, GLuint renderbuffer); +GL_APICALL void GL_APIENTRY glBindTexture (GLenum target, GLuint texture); +GL_APICALL void GL_APIENTRY glBlendColor (GLfloat red, GLfloat green, GLfloat blue, GLfloat alpha); +GL_APICALL void GL_APIENTRY glBlendEquation (GLenum mode); +GL_APICALL void GL_APIENTRY glBlendEquationSeparate (GLenum modeRGB, GLenum modeAlpha); +GL_APICALL void GL_APIENTRY glBlendFunc (GLenum sfactor, GLenum dfactor); +GL_APICALL void GL_APIENTRY glBlendFuncSeparate (GLenum sfactorRGB, GLenum dfactorRGB, GLenum sfactorAlpha, GLenum dfactorAlpha); +GL_APICALL void GL_APIENTRY glBufferData (GLenum target, GLsizeiptr size, const void *data, GLenum usage); +GL_APICALL void GL_APIENTRY glBufferSubData (GLenum target, GLintptr offset, GLsizeiptr size, const void *data); +GL_APICALL GLenum GL_APIENTRY glCheckFramebufferStatus (GLenum target); +GL_APICALL void GL_APIENTRY glClear (GLbitfield mask); +GL_APICALL void GL_APIENTRY glClearColor (GLfloat red, GLfloat green, GLfloat blue, GLfloat alpha); +GL_APICALL void GL_APIENTRY glClearDepthf (GLfloat d); +GL_APICALL void GL_APIENTRY glClearStencil (GLint s); +GL_APICALL void GL_APIENTRY glColorMask (GLboolean red, GLboolean green, GLboolean blue, GLboolean alpha); +GL_APICALL void GL_APIENTRY glCompileShader (GLuint shader); +GL_APICALL void GL_APIENTRY glCompressedTexImage2D (GLenum target, GLint level, GLenum internalformat, GLsizei width, GLsizei height, GLint border, GLsizei imageSize, const void *data); +GL_APICALL void GL_APIENTRY glCompressedTexSubImage2D (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const void *data); +GL_APICALL void GL_APIENTRY glCopyTexImage2D (GLenum target, GLint level, GLenum internalformat, GLint x, GLint y, GLsizei width, GLsizei height, GLint border); +GL_APICALL void GL_APIENTRY glCopyTexSubImage2D (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height); +GL_APICALL GLuint GL_APIENTRY glCreateProgram (void); +GL_APICALL GLuint GL_APIENTRY glCreateShader (GLenum type); +GL_APICALL void GL_APIENTRY glCullFace (GLenum mode); +GL_APICALL void GL_APIENTRY glDeleteBuffers (GLsizei n, const GLuint *buffers); +GL_APICALL void GL_APIENTRY glDeleteFramebuffers (GLsizei n, const GLuint *framebuffers); +GL_APICALL void GL_APIENTRY glDeleteProgram (GLuint program); +GL_APICALL void GL_APIENTRY glDeleteRenderbuffers (GLsizei n, const GLuint *renderbuffers); +GL_APICALL void GL_APIENTRY glDeleteShader (GLuint shader); +GL_APICALL void GL_APIENTRY glDeleteTextures (GLsizei n, const GLuint *textures); +GL_APICALL void GL_APIENTRY glDepthFunc (GLenum func); +GL_APICALL void GL_APIENTRY glDepthMask (GLboolean flag); +GL_APICALL void GL_APIENTRY glDepthRangef (GLfloat n, GLfloat f); +GL_APICALL void GL_APIENTRY glDetachShader (GLuint program, GLuint shader); +GL_APICALL void GL_APIENTRY glDisable (GLenum cap); +GL_APICALL void GL_APIENTRY glDisableVertexAttribArray (GLuint index); +GL_APICALL void GL_APIENTRY glDrawArrays (GLenum mode, GLint first, GLsizei count); +GL_APICALL void GL_APIENTRY glDrawElements (GLenum mode, GLsizei count, GLenum type, const void *indices); +GL_APICALL void GL_APIENTRY glEnable (GLenum cap); +GL_APICALL void GL_APIENTRY glEnableVertexAttribArray (GLuint index); +GL_APICALL void GL_APIENTRY glFinish (void); +GL_APICALL void GL_APIENTRY glFlush (void); +GL_APICALL void GL_APIENTRY glFramebufferRenderbuffer (GLenum target, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer); +GL_APICALL void GL_APIENTRY glFramebufferTexture2D (GLenum target, GLenum attachment, GLenum textarget, GLuint texture, GLint level); +GL_APICALL void GL_APIENTRY glFrontFace (GLenum mode); +GL_APICALL void GL_APIENTRY glGenBuffers (GLsizei n, GLuint *buffers); +GL_APICALL void GL_APIENTRY glGenerateMipmap (GLenum target); +GL_APICALL void GL_APIENTRY glGenFramebuffers (GLsizei n, GLuint *framebuffers); +GL_APICALL void GL_APIENTRY glGenRenderbuffers (GLsizei n, GLuint *renderbuffers); +GL_APICALL void GL_APIENTRY glGenTextures (GLsizei n, GLuint *textures); +GL_APICALL void GL_APIENTRY glGetActiveAttrib (GLuint program, GLuint index, GLsizei bufSize, GLsizei *length, GLint *size, GLenum *type, GLchar *name); +GL_APICALL void GL_APIENTRY glGetActiveUniform (GLuint program, GLuint index, GLsizei bufSize, GLsizei *length, GLint *size, GLenum *type, GLchar *name); +GL_APICALL void GL_APIENTRY glGetAttachedShaders (GLuint program, GLsizei maxCount, GLsizei *count, GLuint *shaders); +GL_APICALL GLint GL_APIENTRY glGetAttribLocation (GLuint program, const GLchar *name); +GL_APICALL void GL_APIENTRY glGetBooleanv (GLenum pname, GLboolean *data); +GL_APICALL void GL_APIENTRY glGetBufferParameteriv (GLenum target, GLenum pname, GLint *params); +GL_APICALL GLenum GL_APIENTRY glGetError (void); +GL_APICALL void GL_APIENTRY glGetFloatv (GLenum pname, GLfloat *data); +GL_APICALL void GL_APIENTRY glGetFramebufferAttachmentParameteriv (GLenum target, GLenum attachment, GLenum pname, GLint *params); +GL_APICALL void GL_APIENTRY glGetIntegerv (GLenum pname, GLint *data); +GL_APICALL void GL_APIENTRY glGetProgramiv (GLuint program, GLenum pname, GLint *params); +GL_APICALL void GL_APIENTRY glGetProgramInfoLog (GLuint program, GLsizei bufSize, GLsizei *length, GLchar *infoLog); +GL_APICALL void GL_APIENTRY glGetRenderbufferParameteriv (GLenum target, GLenum pname, GLint *params); +GL_APICALL void GL_APIENTRY glGetShaderiv (GLuint shader, GLenum pname, GLint *params); +GL_APICALL void GL_APIENTRY glGetShaderInfoLog (GLuint shader, GLsizei bufSize, GLsizei *length, GLchar *infoLog); +GL_APICALL void GL_APIENTRY glGetShaderPrecisionFormat (GLenum shadertype, GLenum precisiontype, GLint *range, GLint *precision); +GL_APICALL void GL_APIENTRY glGetShaderSource (GLuint shader, GLsizei bufSize, GLsizei *length, GLchar *source); +GL_APICALL const GLubyte *GL_APIENTRY glGetString (GLenum name); +GL_APICALL void GL_APIENTRY glGetTexParameterfv (GLenum target, GLenum pname, GLfloat *params); +GL_APICALL void GL_APIENTRY glGetTexParameteriv (GLenum target, GLenum pname, GLint *params); +GL_APICALL void GL_APIENTRY glGetUniformfv (GLuint program, GLint location, GLfloat *params); +GL_APICALL void GL_APIENTRY glGetUniformiv (GLuint program, GLint location, GLint *params); +GL_APICALL GLint GL_APIENTRY glGetUniformLocation (GLuint program, const GLchar *name); +GL_APICALL void GL_APIENTRY glGetVertexAttribfv (GLuint index, GLenum pname, GLfloat *params); +GL_APICALL void GL_APIENTRY glGetVertexAttribiv (GLuint index, GLenum pname, GLint *params); +GL_APICALL void GL_APIENTRY glGetVertexAttribPointerv (GLuint index, GLenum pname, void **pointer); +GL_APICALL void GL_APIENTRY glHint (GLenum target, GLenum mode); +GL_APICALL GLboolean GL_APIENTRY glIsBuffer (GLuint buffer); +GL_APICALL GLboolean GL_APIENTRY glIsEnabled (GLenum cap); +GL_APICALL GLboolean GL_APIENTRY glIsFramebuffer (GLuint framebuffer); +GL_APICALL GLboolean GL_APIENTRY glIsProgram (GLuint program); +GL_APICALL GLboolean GL_APIENTRY glIsRenderbuffer (GLuint renderbuffer); +GL_APICALL GLboolean GL_APIENTRY glIsShader (GLuint shader); +GL_APICALL GLboolean GL_APIENTRY glIsTexture (GLuint texture); +GL_APICALL void GL_APIENTRY glLineWidth (GLfloat width); +GL_APICALL void GL_APIENTRY glLinkProgram (GLuint program); +GL_APICALL void GL_APIENTRY glPixelStorei (GLenum pname, GLint param); +GL_APICALL void GL_APIENTRY glPolygonOffset (GLfloat factor, GLfloat units); +GL_APICALL void GL_APIENTRY glReadPixels (GLint x, GLint y, GLsizei width, GLsizei height, GLenum format, GLenum type, void *pixels); +GL_APICALL void GL_APIENTRY glReleaseShaderCompiler (void); +GL_APICALL void GL_APIENTRY glRenderbufferStorage (GLenum target, GLenum internalformat, GLsizei width, GLsizei height); +GL_APICALL void GL_APIENTRY glSampleCoverage (GLfloat value, GLboolean invert); +GL_APICALL void GL_APIENTRY glScissor (GLint x, GLint y, GLsizei width, GLsizei height); +GL_APICALL void GL_APIENTRY glShaderBinary (GLsizei count, const GLuint *shaders, GLenum binaryformat, const void *binary, GLsizei length); +GL_APICALL void GL_APIENTRY glShaderSource (GLuint shader, GLsizei count, const GLchar *const*string, const GLint *length); +GL_APICALL void GL_APIENTRY glStencilFunc (GLenum func, GLint ref, GLuint mask); +GL_APICALL void GL_APIENTRY glStencilFuncSeparate (GLenum face, GLenum func, GLint ref, GLuint mask); +GL_APICALL void GL_APIENTRY glStencilMask (GLuint mask); +GL_APICALL void GL_APIENTRY glStencilMaskSeparate (GLenum face, GLuint mask); +GL_APICALL void GL_APIENTRY glStencilOp (GLenum fail, GLenum zfail, GLenum zpass); +GL_APICALL void GL_APIENTRY glStencilOpSeparate (GLenum face, GLenum sfail, GLenum dpfail, GLenum dppass); +GL_APICALL void GL_APIENTRY glTexImage2D (GLenum target, GLint level, GLint internalformat, GLsizei width, GLsizei height, GLint border, GLenum format, GLenum type, const void *pixels); +GL_APICALL void GL_APIENTRY glTexParameterf (GLenum target, GLenum pname, GLfloat param); +GL_APICALL void GL_APIENTRY glTexParameterfv (GLenum target, GLenum pname, const GLfloat *params); +GL_APICALL void GL_APIENTRY glTexParameteri (GLenum target, GLenum pname, GLint param); +GL_APICALL void GL_APIENTRY glTexParameteriv (GLenum target, GLenum pname, const GLint *params); +GL_APICALL void GL_APIENTRY glTexSubImage2D (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const void *pixels); +GL_APICALL void GL_APIENTRY glUniform1f (GLint location, GLfloat v0); +GL_APICALL void GL_APIENTRY glUniform1fv (GLint location, GLsizei count, const GLfloat *value); +GL_APICALL void GL_APIENTRY glUniform1i (GLint location, GLint v0); +GL_APICALL void GL_APIENTRY glUniform1iv (GLint location, GLsizei count, const GLint *value); +GL_APICALL void GL_APIENTRY glUniform2f (GLint location, GLfloat v0, GLfloat v1); +GL_APICALL void GL_APIENTRY glUniform2fv (GLint location, GLsizei count, const GLfloat *value); +GL_APICALL void GL_APIENTRY glUniform2i (GLint location, GLint v0, GLint v1); +GL_APICALL void GL_APIENTRY glUniform2iv (GLint location, GLsizei count, const GLint *value); +GL_APICALL void GL_APIENTRY glUniform3f (GLint location, GLfloat v0, GLfloat v1, GLfloat v2); +GL_APICALL void GL_APIENTRY glUniform3fv (GLint location, GLsizei count, const GLfloat *value); +GL_APICALL void GL_APIENTRY glUniform3i (GLint location, GLint v0, GLint v1, GLint v2); +GL_APICALL void GL_APIENTRY glUniform3iv (GLint location, GLsizei count, const GLint *value); +GL_APICALL void GL_APIENTRY glUniform4f (GLint location, GLfloat v0, GLfloat v1, GLfloat v2, GLfloat v3); +GL_APICALL void GL_APIENTRY glUniform4fv (GLint location, GLsizei count, const GLfloat *value); +GL_APICALL void GL_APIENTRY glUniform4i (GLint location, GLint v0, GLint v1, GLint v2, GLint v3); +GL_APICALL void GL_APIENTRY glUniform4iv (GLint location, GLsizei count, const GLint *value); +GL_APICALL void GL_APIENTRY glUniformMatrix2fv (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +GL_APICALL void GL_APIENTRY glUniformMatrix3fv (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +GL_APICALL void GL_APIENTRY glUniformMatrix4fv (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +GL_APICALL void GL_APIENTRY glUseProgram (GLuint program); +GL_APICALL void GL_APIENTRY glValidateProgram (GLuint program); +GL_APICALL void GL_APIENTRY glVertexAttrib1f (GLuint index, GLfloat x); +GL_APICALL void GL_APIENTRY glVertexAttrib1fv (GLuint index, const GLfloat *v); +GL_APICALL void GL_APIENTRY glVertexAttrib2f (GLuint index, GLfloat x, GLfloat y); +GL_APICALL void GL_APIENTRY glVertexAttrib2fv (GLuint index, const GLfloat *v); +GL_APICALL void GL_APIENTRY glVertexAttrib3f (GLuint index, GLfloat x, GLfloat y, GLfloat z); +GL_APICALL void GL_APIENTRY glVertexAttrib3fv (GLuint index, const GLfloat *v); +GL_APICALL void GL_APIENTRY glVertexAttrib4f (GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w); +GL_APICALL void GL_APIENTRY glVertexAttrib4fv (GLuint index, const GLfloat *v); +GL_APICALL void GL_APIENTRY glVertexAttribPointer (GLuint index, GLint size, GLenum type, GLboolean normalized, GLsizei stride, const void *pointer); +GL_APICALL void GL_APIENTRY glViewport (GLint x, GLint y, GLsizei width, GLsizei height); +#endif /* GL_ES_VERSION_2_0 */ + +#ifndef GL_ES_VERSION_3_0 +#define GL_ES_VERSION_3_0 1 +typedef unsigned short GLhalf; +#define GL_READ_BUFFER 0x0C02 +#define GL_UNPACK_ROW_LENGTH 0x0CF2 +#define GL_UNPACK_SKIP_ROWS 0x0CF3 +#define GL_UNPACK_SKIP_PIXELS 0x0CF4 +#define GL_PACK_ROW_LENGTH 0x0D02 +#define GL_PACK_SKIP_ROWS 0x0D03 +#define GL_PACK_SKIP_PIXELS 0x0D04 +#define GL_COLOR 0x1800 +#define GL_DEPTH 0x1801 +#define GL_STENCIL 0x1802 +#define GL_RED 0x1903 +#define GL_RGB8 0x8051 +#define GL_RGBA8 0x8058 +#define GL_RGB10_A2 0x8059 +#define GL_TEXTURE_BINDING_3D 0x806A +#define GL_UNPACK_SKIP_IMAGES 0x806D +#define GL_UNPACK_IMAGE_HEIGHT 0x806E +#define GL_TEXTURE_3D 0x806F +#define GL_TEXTURE_WRAP_R 0x8072 +#define GL_MAX_3D_TEXTURE_SIZE 0x8073 +#define GL_UNSIGNED_INT_2_10_10_10_REV 0x8368 +#define GL_MAX_ELEMENTS_VERTICES 0x80E8 +#define GL_MAX_ELEMENTS_INDICES 0x80E9 +#define GL_TEXTURE_MIN_LOD 0x813A +#define GL_TEXTURE_MAX_LOD 0x813B +#define GL_TEXTURE_BASE_LEVEL 0x813C +#define GL_TEXTURE_MAX_LEVEL 0x813D +#define GL_MIN 0x8007 +#define GL_MAX 0x8008 +#define GL_DEPTH_COMPONENT24 0x81A6 +#define GL_MAX_TEXTURE_LOD_BIAS 0x84FD +#define GL_TEXTURE_COMPARE_MODE 0x884C +#define GL_TEXTURE_COMPARE_FUNC 0x884D +#define GL_CURRENT_QUERY 0x8865 +#define GL_QUERY_RESULT 0x8866 +#define GL_QUERY_RESULT_AVAILABLE 0x8867 +#define GL_BUFFER_MAPPED 0x88BC +#define GL_BUFFER_MAP_POINTER 0x88BD +#define GL_STREAM_READ 0x88E1 +#define GL_STREAM_COPY 0x88E2 +#define GL_STATIC_READ 0x88E5 +#define GL_STATIC_COPY 0x88E6 +#define GL_DYNAMIC_READ 0x88E9 +#define GL_DYNAMIC_COPY 0x88EA +#define GL_MAX_DRAW_BUFFERS 0x8824 +#define GL_DRAW_BUFFER0 0x8825 +#define GL_DRAW_BUFFER1 0x8826 +#define GL_DRAW_BUFFER2 0x8827 +#define GL_DRAW_BUFFER3 0x8828 +#define GL_DRAW_BUFFER4 0x8829 +#define GL_DRAW_BUFFER5 0x882A +#define GL_DRAW_BUFFER6 0x882B +#define GL_DRAW_BUFFER7 0x882C +#define GL_DRAW_BUFFER8 0x882D +#define GL_DRAW_BUFFER9 0x882E +#define GL_DRAW_BUFFER10 0x882F +#define GL_DRAW_BUFFER11 0x8830 +#define GL_DRAW_BUFFER12 0x8831 +#define GL_DRAW_BUFFER13 0x8832 +#define GL_DRAW_BUFFER14 0x8833 +#define GL_DRAW_BUFFER15 0x8834 +#define GL_MAX_FRAGMENT_UNIFORM_COMPONENTS 0x8B49 +#define GL_MAX_VERTEX_UNIFORM_COMPONENTS 0x8B4A +#define GL_SAMPLER_3D 0x8B5F +#define GL_SAMPLER_2D_SHADOW 0x8B62 +#define GL_FRAGMENT_SHADER_DERIVATIVE_HINT 0x8B8B +#define GL_PIXEL_PACK_BUFFER 0x88EB +#define GL_PIXEL_UNPACK_BUFFER 0x88EC +#define GL_PIXEL_PACK_BUFFER_BINDING 0x88ED +#define GL_PIXEL_UNPACK_BUFFER_BINDING 0x88EF +#define GL_FLOAT_MAT2x3 0x8B65 +#define GL_FLOAT_MAT2x4 0x8B66 +#define GL_FLOAT_MAT3x2 0x8B67 +#define GL_FLOAT_MAT3x4 0x8B68 +#define GL_FLOAT_MAT4x2 0x8B69 +#define GL_FLOAT_MAT4x3 0x8B6A +#define GL_SRGB 0x8C40 +#define GL_SRGB8 0x8C41 +#define GL_SRGB8_ALPHA8 0x8C43 +#define GL_COMPARE_REF_TO_TEXTURE 0x884E +#define GL_MAJOR_VERSION 0x821B +#define GL_MINOR_VERSION 0x821C +#define GL_NUM_EXTENSIONS 0x821D +#define GL_RGBA32F 0x8814 +#define GL_RGB32F 0x8815 +#define GL_RGBA16F 0x881A +#define GL_RGB16F 0x881B +#define GL_VERTEX_ATTRIB_ARRAY_INTEGER 0x88FD +#define GL_MAX_ARRAY_TEXTURE_LAYERS 0x88FF +#define GL_MIN_PROGRAM_TEXEL_OFFSET 0x8904 +#define GL_MAX_PROGRAM_TEXEL_OFFSET 0x8905 +#define GL_MAX_VARYING_COMPONENTS 0x8B4B +#define GL_TEXTURE_2D_ARRAY 0x8C1A +#define GL_TEXTURE_BINDING_2D_ARRAY 0x8C1D +#define GL_R11F_G11F_B10F 0x8C3A +#define GL_UNSIGNED_INT_10F_11F_11F_REV 0x8C3B +#define GL_RGB9_E5 0x8C3D +#define GL_UNSIGNED_INT_5_9_9_9_REV 0x8C3E +#define GL_TRANSFORM_FEEDBACK_VARYING_MAX_LENGTH 0x8C76 +#define GL_TRANSFORM_FEEDBACK_BUFFER_MODE 0x8C7F +#define GL_MAX_TRANSFORM_FEEDBACK_SEPARATE_COMPONENTS 0x8C80 +#define GL_TRANSFORM_FEEDBACK_VARYINGS 0x8C83 +#define GL_TRANSFORM_FEEDBACK_BUFFER_START 0x8C84 +#define GL_TRANSFORM_FEEDBACK_BUFFER_SIZE 0x8C85 +#define GL_TRANSFORM_FEEDBACK_PRIMITIVES_WRITTEN 0x8C88 +#define GL_RASTERIZER_DISCARD 0x8C89 +#define GL_MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS 0x8C8A +#define GL_MAX_TRANSFORM_FEEDBACK_SEPARATE_ATTRIBS 0x8C8B +#define GL_INTERLEAVED_ATTRIBS 0x8C8C +#define GL_SEPARATE_ATTRIBS 0x8C8D +#define GL_TRANSFORM_FEEDBACK_BUFFER 0x8C8E +#define GL_TRANSFORM_FEEDBACK_BUFFER_BINDING 0x8C8F +#define GL_RGBA32UI 0x8D70 +#define GL_RGB32UI 0x8D71 +#define GL_RGBA16UI 0x8D76 +#define GL_RGB16UI 0x8D77 +#define GL_RGBA8UI 0x8D7C +#define GL_RGB8UI 0x8D7D +#define GL_RGBA32I 0x8D82 +#define GL_RGB32I 0x8D83 +#define GL_RGBA16I 0x8D88 +#define GL_RGB16I 0x8D89 +#define GL_RGBA8I 0x8D8E +#define GL_RGB8I 0x8D8F +#define GL_RED_INTEGER 0x8D94 +#define GL_RGB_INTEGER 0x8D98 +#define GL_RGBA_INTEGER 0x8D99 +#define GL_SAMPLER_2D_ARRAY 0x8DC1 +#define GL_SAMPLER_2D_ARRAY_SHADOW 0x8DC4 +#define GL_SAMPLER_CUBE_SHADOW 0x8DC5 +#define GL_UNSIGNED_INT_VEC2 0x8DC6 +#define GL_UNSIGNED_INT_VEC3 0x8DC7 +#define GL_UNSIGNED_INT_VEC4 0x8DC8 +#define GL_INT_SAMPLER_2D 0x8DCA +#define GL_INT_SAMPLER_3D 0x8DCB +#define GL_INT_SAMPLER_CUBE 0x8DCC +#define GL_INT_SAMPLER_2D_ARRAY 0x8DCF +#define GL_UNSIGNED_INT_SAMPLER_2D 0x8DD2 +#define GL_UNSIGNED_INT_SAMPLER_3D 0x8DD3 +#define GL_UNSIGNED_INT_SAMPLER_CUBE 0x8DD4 +#define GL_UNSIGNED_INT_SAMPLER_2D_ARRAY 0x8DD7 +#define GL_BUFFER_ACCESS_FLAGS 0x911F +#define GL_BUFFER_MAP_LENGTH 0x9120 +#define GL_BUFFER_MAP_OFFSET 0x9121 +#define GL_DEPTH_COMPONENT32F 0x8CAC +#define GL_DEPTH32F_STENCIL8 0x8CAD +#define GL_FLOAT_32_UNSIGNED_INT_24_8_REV 0x8DAD +#define GL_FRAMEBUFFER_ATTACHMENT_COLOR_ENCODING 0x8210 +#define GL_FRAMEBUFFER_ATTACHMENT_COMPONENT_TYPE 0x8211 +#define GL_FRAMEBUFFER_ATTACHMENT_RED_SIZE 0x8212 +#define GL_FRAMEBUFFER_ATTACHMENT_GREEN_SIZE 0x8213 +#define GL_FRAMEBUFFER_ATTACHMENT_BLUE_SIZE 0x8214 +#define GL_FRAMEBUFFER_ATTACHMENT_ALPHA_SIZE 0x8215 +#define GL_FRAMEBUFFER_ATTACHMENT_DEPTH_SIZE 0x8216 +#define GL_FRAMEBUFFER_ATTACHMENT_STENCIL_SIZE 0x8217 +#define GL_FRAMEBUFFER_DEFAULT 0x8218 +#define GL_FRAMEBUFFER_UNDEFINED 0x8219 +#define GL_DEPTH_STENCIL_ATTACHMENT 0x821A +#define GL_DEPTH_STENCIL 0x84F9 +#define GL_UNSIGNED_INT_24_8 0x84FA +#define GL_DEPTH24_STENCIL8 0x88F0 +#define GL_UNSIGNED_NORMALIZED 0x8C17 +#define GL_DRAW_FRAMEBUFFER_BINDING 0x8CA6 +#define GL_READ_FRAMEBUFFER 0x8CA8 +#define GL_DRAW_FRAMEBUFFER 0x8CA9 +#define GL_READ_FRAMEBUFFER_BINDING 0x8CAA +#define GL_RENDERBUFFER_SAMPLES 0x8CAB +#define GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_LAYER 0x8CD4 +#define GL_MAX_COLOR_ATTACHMENTS 0x8CDF +#define GL_COLOR_ATTACHMENT1 0x8CE1 +#define GL_COLOR_ATTACHMENT2 0x8CE2 +#define GL_COLOR_ATTACHMENT3 0x8CE3 +#define GL_COLOR_ATTACHMENT4 0x8CE4 +#define GL_COLOR_ATTACHMENT5 0x8CE5 +#define GL_COLOR_ATTACHMENT6 0x8CE6 +#define GL_COLOR_ATTACHMENT7 0x8CE7 +#define GL_COLOR_ATTACHMENT8 0x8CE8 +#define GL_COLOR_ATTACHMENT9 0x8CE9 +#define GL_COLOR_ATTACHMENT10 0x8CEA +#define GL_COLOR_ATTACHMENT11 0x8CEB +#define GL_COLOR_ATTACHMENT12 0x8CEC +#define GL_COLOR_ATTACHMENT13 0x8CED +#define GL_COLOR_ATTACHMENT14 0x8CEE +#define GL_COLOR_ATTACHMENT15 0x8CEF +#define GL_COLOR_ATTACHMENT16 0x8CF0 +#define GL_COLOR_ATTACHMENT17 0x8CF1 +#define GL_COLOR_ATTACHMENT18 0x8CF2 +#define GL_COLOR_ATTACHMENT19 0x8CF3 +#define GL_COLOR_ATTACHMENT20 0x8CF4 +#define GL_COLOR_ATTACHMENT21 0x8CF5 +#define GL_COLOR_ATTACHMENT22 0x8CF6 +#define GL_COLOR_ATTACHMENT23 0x8CF7 +#define GL_COLOR_ATTACHMENT24 0x8CF8 +#define GL_COLOR_ATTACHMENT25 0x8CF9 +#define GL_COLOR_ATTACHMENT26 0x8CFA +#define GL_COLOR_ATTACHMENT27 0x8CFB +#define GL_COLOR_ATTACHMENT28 0x8CFC +#define GL_COLOR_ATTACHMENT29 0x8CFD +#define GL_COLOR_ATTACHMENT30 0x8CFE +#define GL_COLOR_ATTACHMENT31 0x8CFF +#define GL_FRAMEBUFFER_INCOMPLETE_MULTISAMPLE 0x8D56 +#define GL_MAX_SAMPLES 0x8D57 +#define GL_HALF_FLOAT 0x140B +#define GL_MAP_READ_BIT 0x0001 +#define GL_MAP_WRITE_BIT 0x0002 +#define GL_MAP_INVALIDATE_RANGE_BIT 0x0004 +#define GL_MAP_INVALIDATE_BUFFER_BIT 0x0008 +#define GL_MAP_FLUSH_EXPLICIT_BIT 0x0010 +#define GL_MAP_UNSYNCHRONIZED_BIT 0x0020 +#define GL_RG 0x8227 +#define GL_RG_INTEGER 0x8228 +#define GL_R8 0x8229 +#define GL_RG8 0x822B +#define GL_R16F 0x822D +#define GL_R32F 0x822E +#define GL_RG16F 0x822F +#define GL_RG32F 0x8230 +#define GL_R8I 0x8231 +#define GL_R8UI 0x8232 +#define GL_R16I 0x8233 +#define GL_R16UI 0x8234 +#define GL_R32I 0x8235 +#define GL_R32UI 0x8236 +#define GL_RG8I 0x8237 +#define GL_RG8UI 0x8238 +#define GL_RG16I 0x8239 +#define GL_RG16UI 0x823A +#define GL_RG32I 0x823B +#define GL_RG32UI 0x823C +#define GL_VERTEX_ARRAY_BINDING 0x85B5 +#define GL_R8_SNORM 0x8F94 +#define GL_RG8_SNORM 0x8F95 +#define GL_RGB8_SNORM 0x8F96 +#define GL_RGBA8_SNORM 0x8F97 +#define GL_SIGNED_NORMALIZED 0x8F9C +#define GL_PRIMITIVE_RESTART_FIXED_INDEX 0x8D69 +#define GL_COPY_READ_BUFFER 0x8F36 +#define GL_COPY_WRITE_BUFFER 0x8F37 +#define GL_COPY_READ_BUFFER_BINDING 0x8F36 +#define GL_COPY_WRITE_BUFFER_BINDING 0x8F37 +#define GL_UNIFORM_BUFFER 0x8A11 +#define GL_UNIFORM_BUFFER_BINDING 0x8A28 +#define GL_UNIFORM_BUFFER_START 0x8A29 +#define GL_UNIFORM_BUFFER_SIZE 0x8A2A +#define GL_MAX_VERTEX_UNIFORM_BLOCKS 0x8A2B +#define GL_MAX_FRAGMENT_UNIFORM_BLOCKS 0x8A2D +#define GL_MAX_COMBINED_UNIFORM_BLOCKS 0x8A2E +#define GL_MAX_UNIFORM_BUFFER_BINDINGS 0x8A2F +#define GL_MAX_UNIFORM_BLOCK_SIZE 0x8A30 +#define GL_MAX_COMBINED_VERTEX_UNIFORM_COMPONENTS 0x8A31 +#define GL_MAX_COMBINED_FRAGMENT_UNIFORM_COMPONENTS 0x8A33 +#define GL_UNIFORM_BUFFER_OFFSET_ALIGNMENT 0x8A34 +#define GL_ACTIVE_UNIFORM_BLOCK_MAX_NAME_LENGTH 0x8A35 +#define GL_ACTIVE_UNIFORM_BLOCKS 0x8A36 +#define GL_UNIFORM_TYPE 0x8A37 +#define GL_UNIFORM_SIZE 0x8A38 +#define GL_UNIFORM_NAME_LENGTH 0x8A39 +#define GL_UNIFORM_BLOCK_INDEX 0x8A3A +#define GL_UNIFORM_OFFSET 0x8A3B +#define GL_UNIFORM_ARRAY_STRIDE 0x8A3C +#define GL_UNIFORM_MATRIX_STRIDE 0x8A3D +#define GL_UNIFORM_IS_ROW_MAJOR 0x8A3E +#define GL_UNIFORM_BLOCK_BINDING 0x8A3F +#define GL_UNIFORM_BLOCK_DATA_SIZE 0x8A40 +#define GL_UNIFORM_BLOCK_NAME_LENGTH 0x8A41 +#define GL_UNIFORM_BLOCK_ACTIVE_UNIFORMS 0x8A42 +#define GL_UNIFORM_BLOCK_ACTIVE_UNIFORM_INDICES 0x8A43 +#define GL_UNIFORM_BLOCK_REFERENCED_BY_VERTEX_SHADER 0x8A44 +#define GL_UNIFORM_BLOCK_REFERENCED_BY_FRAGMENT_SHADER 0x8A46 +#define GL_INVALID_INDEX 0xFFFFFFFFu +#define GL_MAX_VERTEX_OUTPUT_COMPONENTS 0x9122 +#define GL_MAX_FRAGMENT_INPUT_COMPONENTS 0x9125 +#define GL_MAX_SERVER_WAIT_TIMEOUT 0x9111 +#define GL_OBJECT_TYPE 0x9112 +#define GL_SYNC_CONDITION 0x9113 +#define GL_SYNC_STATUS 0x9114 +#define GL_SYNC_FLAGS 0x9115 +#define GL_SYNC_FENCE 0x9116 +#define GL_SYNC_GPU_COMMANDS_COMPLETE 0x9117 +#define GL_UNSIGNALED 0x9118 +#define GL_SIGNALED 0x9119 +#define GL_ALREADY_SIGNALED 0x911A +#define GL_TIMEOUT_EXPIRED 0x911B +#define GL_CONDITION_SATISFIED 0x911C +#define GL_WAIT_FAILED 0x911D +#define GL_SYNC_FLUSH_COMMANDS_BIT 0x00000001 +#define GL_TIMEOUT_IGNORED 0xFFFFFFFFFFFFFFFFull +#define GL_VERTEX_ATTRIB_ARRAY_DIVISOR 0x88FE +#define GL_ANY_SAMPLES_PASSED 0x8C2F +#define GL_ANY_SAMPLES_PASSED_CONSERVATIVE 0x8D6A +#define GL_SAMPLER_BINDING 0x8919 +#define GL_RGB10_A2UI 0x906F +#define GL_TEXTURE_SWIZZLE_R 0x8E42 +#define GL_TEXTURE_SWIZZLE_G 0x8E43 +#define GL_TEXTURE_SWIZZLE_B 0x8E44 +#define GL_TEXTURE_SWIZZLE_A 0x8E45 +#define GL_GREEN 0x1904 +#define GL_BLUE 0x1905 +#define GL_INT_2_10_10_10_REV 0x8D9F +#define GL_TRANSFORM_FEEDBACK 0x8E22 +#define GL_TRANSFORM_FEEDBACK_PAUSED 0x8E23 +#define GL_TRANSFORM_FEEDBACK_ACTIVE 0x8E24 +#define GL_TRANSFORM_FEEDBACK_BINDING 0x8E25 +#define GL_PROGRAM_BINARY_RETRIEVABLE_HINT 0x8257 +#define GL_PROGRAM_BINARY_LENGTH 0x8741 +#define GL_NUM_PROGRAM_BINARY_FORMATS 0x87FE +#define GL_PROGRAM_BINARY_FORMATS 0x87FF +#define GL_COMPRESSED_R11_EAC 0x9270 +#define GL_COMPRESSED_SIGNED_R11_EAC 0x9271 +#define GL_COMPRESSED_RG11_EAC 0x9272 +#define GL_COMPRESSED_SIGNED_RG11_EAC 0x9273 +#define GL_COMPRESSED_RGB8_ETC2 0x9274 +#define GL_COMPRESSED_SRGB8_ETC2 0x9275 +#define GL_COMPRESSED_RGB8_PUNCHTHROUGH_ALPHA1_ETC2 0x9276 +#define GL_COMPRESSED_SRGB8_PUNCHTHROUGH_ALPHA1_ETC2 0x9277 +#define GL_COMPRESSED_RGBA8_ETC2_EAC 0x9278 +#define GL_COMPRESSED_SRGB8_ALPHA8_ETC2_EAC 0x9279 +#define GL_TEXTURE_IMMUTABLE_FORMAT 0x912F +#define GL_MAX_ELEMENT_INDEX 0x8D6B +#define GL_NUM_SAMPLE_COUNTS 0x9380 +#define GL_TEXTURE_IMMUTABLE_LEVELS 0x82DF +typedef void (GL_APIENTRYP PFNGLREADBUFFERPROC) (GLenum src); +typedef void (GL_APIENTRYP PFNGLDRAWRANGEELEMENTSPROC) (GLenum mode, GLuint start, GLuint end, GLsizei count, GLenum type, const void *indices); +typedef void (GL_APIENTRYP PFNGLTEXIMAGE3DPROC) (GLenum target, GLint level, GLint internalformat, GLsizei width, GLsizei height, GLsizei depth, GLint border, GLenum format, GLenum type, const void *pixels); +typedef void (GL_APIENTRYP PFNGLTEXSUBIMAGE3DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const void *pixels); +typedef void (GL_APIENTRYP PFNGLCOPYTEXSUBIMAGE3DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height); +typedef void (GL_APIENTRYP PFNGLCOMPRESSEDTEXIMAGE3DPROC) (GLenum target, GLint level, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLint border, GLsizei imageSize, const void *data); +typedef void (GL_APIENTRYP PFNGLCOMPRESSEDTEXSUBIMAGE3DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const void *data); +typedef void (GL_APIENTRYP PFNGLGENQUERIESPROC) (GLsizei n, GLuint *ids); +typedef void (GL_APIENTRYP PFNGLDELETEQUERIESPROC) (GLsizei n, const GLuint *ids); +typedef GLboolean (GL_APIENTRYP PFNGLISQUERYPROC) (GLuint id); +typedef void (GL_APIENTRYP PFNGLBEGINQUERYPROC) (GLenum target, GLuint id); +typedef void (GL_APIENTRYP PFNGLENDQUERYPROC) (GLenum target); +typedef void (GL_APIENTRYP PFNGLGETQUERYIVPROC) (GLenum target, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETQUERYOBJECTUIVPROC) (GLuint id, GLenum pname, GLuint *params); +typedef GLboolean (GL_APIENTRYP PFNGLUNMAPBUFFERPROC) (GLenum target); +typedef void (GL_APIENTRYP PFNGLGETBUFFERPOINTERVPROC) (GLenum target, GLenum pname, void **params); +typedef void (GL_APIENTRYP PFNGLDRAWBUFFERSPROC) (GLsizei n, const GLenum *bufs); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX2X3FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX3X2FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX2X4FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX4X2FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX3X4FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX4X3FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLBLITFRAMEBUFFERPROC) (GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter); +typedef void (GL_APIENTRYP PFNGLRENDERBUFFERSTORAGEMULTISAMPLEPROC) (GLenum target, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height); +typedef void (GL_APIENTRYP PFNGLFRAMEBUFFERTEXTURELAYERPROC) (GLenum target, GLenum attachment, GLuint texture, GLint level, GLint layer); +typedef void *(GL_APIENTRYP PFNGLMAPBUFFERRANGEPROC) (GLenum target, GLintptr offset, GLsizeiptr length, GLbitfield access); +typedef void (GL_APIENTRYP PFNGLFLUSHMAPPEDBUFFERRANGEPROC) (GLenum target, GLintptr offset, GLsizeiptr length); +typedef void (GL_APIENTRYP PFNGLBINDVERTEXARRAYPROC) (GLuint array); +typedef void (GL_APIENTRYP PFNGLDELETEVERTEXARRAYSPROC) (GLsizei n, const GLuint *arrays); +typedef void (GL_APIENTRYP PFNGLGENVERTEXARRAYSPROC) (GLsizei n, GLuint *arrays); +typedef GLboolean (GL_APIENTRYP PFNGLISVERTEXARRAYPROC) (GLuint array); +typedef void (GL_APIENTRYP PFNGLGETINTEGERI_VPROC) (GLenum target, GLuint index, GLint *data); +typedef void (GL_APIENTRYP PFNGLBEGINTRANSFORMFEEDBACKPROC) (GLenum primitiveMode); +typedef void (GL_APIENTRYP PFNGLENDTRANSFORMFEEDBACKPROC) (void); +typedef void (GL_APIENTRYP PFNGLBINDBUFFERRANGEPROC) (GLenum target, GLuint index, GLuint buffer, GLintptr offset, GLsizeiptr size); +typedef void (GL_APIENTRYP PFNGLBINDBUFFERBASEPROC) (GLenum target, GLuint index, GLuint buffer); +typedef void (GL_APIENTRYP PFNGLTRANSFORMFEEDBACKVARYINGSPROC) (GLuint program, GLsizei count, const GLchar *const*varyings, GLenum bufferMode); +typedef void (GL_APIENTRYP PFNGLGETTRANSFORMFEEDBACKVARYINGPROC) (GLuint program, GLuint index, GLsizei bufSize, GLsizei *length, GLsizei *size, GLenum *type, GLchar *name); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBIPOINTERPROC) (GLuint index, GLint size, GLenum type, GLsizei stride, const void *pointer); +typedef void (GL_APIENTRYP PFNGLGETVERTEXATTRIBIIVPROC) (GLuint index, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETVERTEXATTRIBIUIVPROC) (GLuint index, GLenum pname, GLuint *params); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBI4IPROC) (GLuint index, GLint x, GLint y, GLint z, GLint w); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBI4UIPROC) (GLuint index, GLuint x, GLuint y, GLuint z, GLuint w); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBI4IVPROC) (GLuint index, const GLint *v); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBI4UIVPROC) (GLuint index, const GLuint *v); +typedef void (GL_APIENTRYP PFNGLGETUNIFORMUIVPROC) (GLuint program, GLint location, GLuint *params); +typedef GLint (GL_APIENTRYP PFNGLGETFRAGDATALOCATIONPROC) (GLuint program, const GLchar *name); +typedef void (GL_APIENTRYP PFNGLUNIFORM1UIPROC) (GLint location, GLuint v0); +typedef void (GL_APIENTRYP PFNGLUNIFORM2UIPROC) (GLint location, GLuint v0, GLuint v1); +typedef void (GL_APIENTRYP PFNGLUNIFORM3UIPROC) (GLint location, GLuint v0, GLuint v1, GLuint v2); +typedef void (GL_APIENTRYP PFNGLUNIFORM4UIPROC) (GLint location, GLuint v0, GLuint v1, GLuint v2, GLuint v3); +typedef void (GL_APIENTRYP PFNGLUNIFORM1UIVPROC) (GLint location, GLsizei count, const GLuint *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM2UIVPROC) (GLint location, GLsizei count, const GLuint *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM3UIVPROC) (GLint location, GLsizei count, const GLuint *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM4UIVPROC) (GLint location, GLsizei count, const GLuint *value); +typedef void (GL_APIENTRYP PFNGLCLEARBUFFERIVPROC) (GLenum buffer, GLint drawbuffer, const GLint *value); +typedef void (GL_APIENTRYP PFNGLCLEARBUFFERUIVPROC) (GLenum buffer, GLint drawbuffer, const GLuint *value); +typedef void (GL_APIENTRYP PFNGLCLEARBUFFERFVPROC) (GLenum buffer, GLint drawbuffer, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLCLEARBUFFERFIPROC) (GLenum buffer, GLint drawbuffer, GLfloat depth, GLint stencil); +typedef const GLubyte *(GL_APIENTRYP PFNGLGETSTRINGIPROC) (GLenum name, GLuint index); +typedef void (GL_APIENTRYP PFNGLCOPYBUFFERSUBDATAPROC) (GLenum readTarget, GLenum writeTarget, GLintptr readOffset, GLintptr writeOffset, GLsizeiptr size); +typedef void (GL_APIENTRYP PFNGLGETUNIFORMINDICESPROC) (GLuint program, GLsizei uniformCount, const GLchar *const*uniformNames, GLuint *uniformIndices); +typedef void (GL_APIENTRYP PFNGLGETACTIVEUNIFORMSIVPROC) (GLuint program, GLsizei uniformCount, const GLuint *uniformIndices, GLenum pname, GLint *params); +typedef GLuint (GL_APIENTRYP PFNGLGETUNIFORMBLOCKINDEXPROC) (GLuint program, const GLchar *uniformBlockName); +typedef void (GL_APIENTRYP PFNGLGETACTIVEUNIFORMBLOCKIVPROC) (GLuint program, GLuint uniformBlockIndex, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETACTIVEUNIFORMBLOCKNAMEPROC) (GLuint program, GLuint uniformBlockIndex, GLsizei bufSize, GLsizei *length, GLchar *uniformBlockName); +typedef void (GL_APIENTRYP PFNGLUNIFORMBLOCKBINDINGPROC) (GLuint program, GLuint uniformBlockIndex, GLuint uniformBlockBinding); +typedef void (GL_APIENTRYP PFNGLDRAWARRAYSINSTANCEDPROC) (GLenum mode, GLint first, GLsizei count, GLsizei instancecount); +typedef void (GL_APIENTRYP PFNGLDRAWELEMENTSINSTANCEDPROC) (GLenum mode, GLsizei count, GLenum type, const void *indices, GLsizei instancecount); +typedef GLsync (GL_APIENTRYP PFNGLFENCESYNCPROC) (GLenum condition, GLbitfield flags); +typedef GLboolean (GL_APIENTRYP PFNGLISSYNCPROC) (GLsync sync); +typedef void (GL_APIENTRYP PFNGLDELETESYNCPROC) (GLsync sync); +typedef GLenum (GL_APIENTRYP PFNGLCLIENTWAITSYNCPROC) (GLsync sync, GLbitfield flags, GLuint64 timeout); +typedef void (GL_APIENTRYP PFNGLWAITSYNCPROC) (GLsync sync, GLbitfield flags, GLuint64 timeout); +typedef void (GL_APIENTRYP PFNGLGETINTEGER64VPROC) (GLenum pname, GLint64 *data); +typedef void (GL_APIENTRYP PFNGLGETSYNCIVPROC) (GLsync sync, GLenum pname, GLsizei bufSize, GLsizei *length, GLint *values); +typedef void (GL_APIENTRYP PFNGLGETINTEGER64I_VPROC) (GLenum target, GLuint index, GLint64 *data); +typedef void (GL_APIENTRYP PFNGLGETBUFFERPARAMETERI64VPROC) (GLenum target, GLenum pname, GLint64 *params); +typedef void (GL_APIENTRYP PFNGLGENSAMPLERSPROC) (GLsizei count, GLuint *samplers); +typedef void (GL_APIENTRYP PFNGLDELETESAMPLERSPROC) (GLsizei count, const GLuint *samplers); +typedef GLboolean (GL_APIENTRYP PFNGLISSAMPLERPROC) (GLuint sampler); +typedef void (GL_APIENTRYP PFNGLBINDSAMPLERPROC) (GLuint unit, GLuint sampler); +typedef void (GL_APIENTRYP PFNGLSAMPLERPARAMETERIPROC) (GLuint sampler, GLenum pname, GLint param); +typedef void (GL_APIENTRYP PFNGLSAMPLERPARAMETERIVPROC) (GLuint sampler, GLenum pname, const GLint *param); +typedef void (GL_APIENTRYP PFNGLSAMPLERPARAMETERFPROC) (GLuint sampler, GLenum pname, GLfloat param); +typedef void (GL_APIENTRYP PFNGLSAMPLERPARAMETERFVPROC) (GLuint sampler, GLenum pname, const GLfloat *param); +typedef void (GL_APIENTRYP PFNGLGETSAMPLERPARAMETERIVPROC) (GLuint sampler, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETSAMPLERPARAMETERFVPROC) (GLuint sampler, GLenum pname, GLfloat *params); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBDIVISORPROC) (GLuint index, GLuint divisor); +typedef void (GL_APIENTRYP PFNGLBINDTRANSFORMFEEDBACKPROC) (GLenum target, GLuint id); +typedef void (GL_APIENTRYP PFNGLDELETETRANSFORMFEEDBACKSPROC) (GLsizei n, const GLuint *ids); +typedef void (GL_APIENTRYP PFNGLGENTRANSFORMFEEDBACKSPROC) (GLsizei n, GLuint *ids); +typedef GLboolean (GL_APIENTRYP PFNGLISTRANSFORMFEEDBACKPROC) (GLuint id); +typedef void (GL_APIENTRYP PFNGLPAUSETRANSFORMFEEDBACKPROC) (void); +typedef void (GL_APIENTRYP PFNGLRESUMETRANSFORMFEEDBACKPROC) (void); +typedef void (GL_APIENTRYP PFNGLGETPROGRAMBINARYPROC) (GLuint program, GLsizei bufSize, GLsizei *length, GLenum *binaryFormat, void *binary); +typedef void (GL_APIENTRYP PFNGLPROGRAMBINARYPROC) (GLuint program, GLenum binaryFormat, const void *binary, GLsizei length); +typedef void (GL_APIENTRYP PFNGLPROGRAMPARAMETERIPROC) (GLuint program, GLenum pname, GLint value); +typedef void (GL_APIENTRYP PFNGLINVALIDATEFRAMEBUFFERPROC) (GLenum target, GLsizei numAttachments, const GLenum *attachments); +typedef void (GL_APIENTRYP PFNGLINVALIDATESUBFRAMEBUFFERPROC) (GLenum target, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height); +typedef void (GL_APIENTRYP PFNGLTEXSTORAGE2DPROC) (GLenum target, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height); +typedef void (GL_APIENTRYP PFNGLTEXSTORAGE3DPROC) (GLenum target, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth); +typedef void (GL_APIENTRYP PFNGLGETINTERNALFORMATIVPROC) (GLenum target, GLenum internalformat, GLenum pname, GLsizei bufSize, GLint *params); +GL_APICALL void GL_APIENTRY glReadBuffer (GLenum src); +GL_APICALL void GL_APIENTRY glDrawRangeElements (GLenum mode, GLuint start, GLuint end, GLsizei count, GLenum type, const void *indices); +GL_APICALL void GL_APIENTRY glTexImage3D (GLenum target, GLint level, GLint internalformat, GLsizei width, GLsizei height, GLsizei depth, GLint border, GLenum format, GLenum type, const void *pixels); +GL_APICALL void GL_APIENTRY glTexSubImage3D (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const void *pixels); +GL_APICALL void GL_APIENTRY glCopyTexSubImage3D (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height); +GL_APICALL void GL_APIENTRY glCompressedTexImage3D (GLenum target, GLint level, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLint border, GLsizei imageSize, const void *data); +GL_APICALL void GL_APIENTRY glCompressedTexSubImage3D (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const void *data); +GL_APICALL void GL_APIENTRY glGenQueries (GLsizei n, GLuint *ids); +GL_APICALL void GL_APIENTRY glDeleteQueries (GLsizei n, const GLuint *ids); +GL_APICALL GLboolean GL_APIENTRY glIsQuery (GLuint id); +GL_APICALL void GL_APIENTRY glBeginQuery (GLenum target, GLuint id); +GL_APICALL void GL_APIENTRY glEndQuery (GLenum target); +GL_APICALL void GL_APIENTRY glGetQueryiv (GLenum target, GLenum pname, GLint *params); +GL_APICALL void GL_APIENTRY glGetQueryObjectuiv (GLuint id, GLenum pname, GLuint *params); +GL_APICALL GLboolean GL_APIENTRY glUnmapBuffer (GLenum target); +GL_APICALL void GL_APIENTRY glGetBufferPointerv (GLenum target, GLenum pname, void **params); +GL_APICALL void GL_APIENTRY glDrawBuffers (GLsizei n, const GLenum *bufs); +GL_APICALL void GL_APIENTRY glUniformMatrix2x3fv (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +GL_APICALL void GL_APIENTRY glUniformMatrix3x2fv (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +GL_APICALL void GL_APIENTRY glUniformMatrix2x4fv (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +GL_APICALL void GL_APIENTRY glUniformMatrix4x2fv (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +GL_APICALL void GL_APIENTRY glUniformMatrix3x4fv (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +GL_APICALL void GL_APIENTRY glUniformMatrix4x3fv (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +GL_APICALL void GL_APIENTRY glBlitFramebuffer (GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter); +GL_APICALL void GL_APIENTRY glRenderbufferStorageMultisample (GLenum target, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height); +GL_APICALL void GL_APIENTRY glFramebufferTextureLayer (GLenum target, GLenum attachment, GLuint texture, GLint level, GLint layer); +GL_APICALL void *GL_APIENTRY glMapBufferRange (GLenum target, GLintptr offset, GLsizeiptr length, GLbitfield access); +GL_APICALL void GL_APIENTRY glFlushMappedBufferRange (GLenum target, GLintptr offset, GLsizeiptr length); +GL_APICALL void GL_APIENTRY glBindVertexArray (GLuint array); +GL_APICALL void GL_APIENTRY glDeleteVertexArrays (GLsizei n, const GLuint *arrays); +GL_APICALL void GL_APIENTRY glGenVertexArrays (GLsizei n, GLuint *arrays); +GL_APICALL GLboolean GL_APIENTRY glIsVertexArray (GLuint array); +GL_APICALL void GL_APIENTRY glGetIntegeri_v (GLenum target, GLuint index, GLint *data); +GL_APICALL void GL_APIENTRY glBeginTransformFeedback (GLenum primitiveMode); +GL_APICALL void GL_APIENTRY glEndTransformFeedback (void); +GL_APICALL void GL_APIENTRY glBindBufferRange (GLenum target, GLuint index, GLuint buffer, GLintptr offset, GLsizeiptr size); +GL_APICALL void GL_APIENTRY glBindBufferBase (GLenum target, GLuint index, GLuint buffer); +GL_APICALL void GL_APIENTRY glTransformFeedbackVaryings (GLuint program, GLsizei count, const GLchar *const*varyings, GLenum bufferMode); +GL_APICALL void GL_APIENTRY glGetTransformFeedbackVarying (GLuint program, GLuint index, GLsizei bufSize, GLsizei *length, GLsizei *size, GLenum *type, GLchar *name); +GL_APICALL void GL_APIENTRY glVertexAttribIPointer (GLuint index, GLint size, GLenum type, GLsizei stride, const void *pointer); +GL_APICALL void GL_APIENTRY glGetVertexAttribIiv (GLuint index, GLenum pname, GLint *params); +GL_APICALL void GL_APIENTRY glGetVertexAttribIuiv (GLuint index, GLenum pname, GLuint *params); +GL_APICALL void GL_APIENTRY glVertexAttribI4i (GLuint index, GLint x, GLint y, GLint z, GLint w); +GL_APICALL void GL_APIENTRY glVertexAttribI4ui (GLuint index, GLuint x, GLuint y, GLuint z, GLuint w); +GL_APICALL void GL_APIENTRY glVertexAttribI4iv (GLuint index, const GLint *v); +GL_APICALL void GL_APIENTRY glVertexAttribI4uiv (GLuint index, const GLuint *v); +GL_APICALL void GL_APIENTRY glGetUniformuiv (GLuint program, GLint location, GLuint *params); +GL_APICALL GLint GL_APIENTRY glGetFragDataLocation (GLuint program, const GLchar *name); +GL_APICALL void GL_APIENTRY glUniform1ui (GLint location, GLuint v0); +GL_APICALL void GL_APIENTRY glUniform2ui (GLint location, GLuint v0, GLuint v1); +GL_APICALL void GL_APIENTRY glUniform3ui (GLint location, GLuint v0, GLuint v1, GLuint v2); +GL_APICALL void GL_APIENTRY glUniform4ui (GLint location, GLuint v0, GLuint v1, GLuint v2, GLuint v3); +GL_APICALL void GL_APIENTRY glUniform1uiv (GLint location, GLsizei count, const GLuint *value); +GL_APICALL void GL_APIENTRY glUniform2uiv (GLint location, GLsizei count, const GLuint *value); +GL_APICALL void GL_APIENTRY glUniform3uiv (GLint location, GLsizei count, const GLuint *value); +GL_APICALL void GL_APIENTRY glUniform4uiv (GLint location, GLsizei count, const GLuint *value); +GL_APICALL void GL_APIENTRY glClearBufferiv (GLenum buffer, GLint drawbuffer, const GLint *value); +GL_APICALL void GL_APIENTRY glClearBufferuiv (GLenum buffer, GLint drawbuffer, const GLuint *value); +GL_APICALL void GL_APIENTRY glClearBufferfv (GLenum buffer, GLint drawbuffer, const GLfloat *value); +GL_APICALL void GL_APIENTRY glClearBufferfi (GLenum buffer, GLint drawbuffer, GLfloat depth, GLint stencil); +GL_APICALL const GLubyte *GL_APIENTRY glGetStringi (GLenum name, GLuint index); +GL_APICALL void GL_APIENTRY glCopyBufferSubData (GLenum readTarget, GLenum writeTarget, GLintptr readOffset, GLintptr writeOffset, GLsizeiptr size); +GL_APICALL void GL_APIENTRY glGetUniformIndices (GLuint program, GLsizei uniformCount, const GLchar *const*uniformNames, GLuint *uniformIndices); +GL_APICALL void GL_APIENTRY glGetActiveUniformsiv (GLuint program, GLsizei uniformCount, const GLuint *uniformIndices, GLenum pname, GLint *params); +GL_APICALL GLuint GL_APIENTRY glGetUniformBlockIndex (GLuint program, const GLchar *uniformBlockName); +GL_APICALL void GL_APIENTRY glGetActiveUniformBlockiv (GLuint program, GLuint uniformBlockIndex, GLenum pname, GLint *params); +GL_APICALL void GL_APIENTRY glGetActiveUniformBlockName (GLuint program, GLuint uniformBlockIndex, GLsizei bufSize, GLsizei *length, GLchar *uniformBlockName); +GL_APICALL void GL_APIENTRY glUniformBlockBinding (GLuint program, GLuint uniformBlockIndex, GLuint uniformBlockBinding); +GL_APICALL void GL_APIENTRY glDrawArraysInstanced (GLenum mode, GLint first, GLsizei count, GLsizei instancecount); +GL_APICALL void GL_APIENTRY glDrawElementsInstanced (GLenum mode, GLsizei count, GLenum type, const void *indices, GLsizei instancecount); +GL_APICALL GLsync GL_APIENTRY glFenceSync (GLenum condition, GLbitfield flags); +GL_APICALL GLboolean GL_APIENTRY glIsSync (GLsync sync); +GL_APICALL void GL_APIENTRY glDeleteSync (GLsync sync); +GL_APICALL GLenum GL_APIENTRY glClientWaitSync (GLsync sync, GLbitfield flags, GLuint64 timeout); +GL_APICALL void GL_APIENTRY glWaitSync (GLsync sync, GLbitfield flags, GLuint64 timeout); +GL_APICALL void GL_APIENTRY glGetInteger64v (GLenum pname, GLint64 *data); +GL_APICALL void GL_APIENTRY glGetSynciv (GLsync sync, GLenum pname, GLsizei bufSize, GLsizei *length, GLint *values); +GL_APICALL void GL_APIENTRY glGetInteger64i_v (GLenum target, GLuint index, GLint64 *data); +GL_APICALL void GL_APIENTRY glGetBufferParameteri64v (GLenum target, GLenum pname, GLint64 *params); +GL_APICALL void GL_APIENTRY glGenSamplers (GLsizei count, GLuint *samplers); +GL_APICALL void GL_APIENTRY glDeleteSamplers (GLsizei count, const GLuint *samplers); +GL_APICALL GLboolean GL_APIENTRY glIsSampler (GLuint sampler); +GL_APICALL void GL_APIENTRY glBindSampler (GLuint unit, GLuint sampler); +GL_APICALL void GL_APIENTRY glSamplerParameteri (GLuint sampler, GLenum pname, GLint param); +GL_APICALL void GL_APIENTRY glSamplerParameteriv (GLuint sampler, GLenum pname, const GLint *param); +GL_APICALL void GL_APIENTRY glSamplerParameterf (GLuint sampler, GLenum pname, GLfloat param); +GL_APICALL void GL_APIENTRY glSamplerParameterfv (GLuint sampler, GLenum pname, const GLfloat *param); +GL_APICALL void GL_APIENTRY glGetSamplerParameteriv (GLuint sampler, GLenum pname, GLint *params); +GL_APICALL void GL_APIENTRY glGetSamplerParameterfv (GLuint sampler, GLenum pname, GLfloat *params); +GL_APICALL void GL_APIENTRY glVertexAttribDivisor (GLuint index, GLuint divisor); +GL_APICALL void GL_APIENTRY glBindTransformFeedback (GLenum target, GLuint id); +GL_APICALL void GL_APIENTRY glDeleteTransformFeedbacks (GLsizei n, const GLuint *ids); +GL_APICALL void GL_APIENTRY glGenTransformFeedbacks (GLsizei n, GLuint *ids); +GL_APICALL GLboolean GL_APIENTRY glIsTransformFeedback (GLuint id); +GL_APICALL void GL_APIENTRY glPauseTransformFeedback (void); +GL_APICALL void GL_APIENTRY glResumeTransformFeedback (void); +GL_APICALL void GL_APIENTRY glGetProgramBinary (GLuint program, GLsizei bufSize, GLsizei *length, GLenum *binaryFormat, void *binary); +GL_APICALL void GL_APIENTRY glProgramBinary (GLuint program, GLenum binaryFormat, const void *binary, GLsizei length); +GL_APICALL void GL_APIENTRY glProgramParameteri (GLuint program, GLenum pname, GLint value); +GL_APICALL void GL_APIENTRY glInvalidateFramebuffer (GLenum target, GLsizei numAttachments, const GLenum *attachments); +GL_APICALL void GL_APIENTRY glInvalidateSubFramebuffer (GLenum target, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height); +GL_APICALL void GL_APIENTRY glTexStorage2D (GLenum target, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height); +GL_APICALL void GL_APIENTRY glTexStorage3D (GLenum target, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth); +GL_APICALL void GL_APIENTRY glGetInternalformativ (GLenum target, GLenum internalformat, GLenum pname, GLsizei bufSize, GLint *params); +#endif /* GL_ES_VERSION_3_0 */ + +#ifndef GL_ES_VERSION_3_1 +#define GL_ES_VERSION_3_1 1 +#define GL_COMPUTE_SHADER 0x91B9 +#define GL_MAX_COMPUTE_UNIFORM_BLOCKS 0x91BB +#define GL_MAX_COMPUTE_TEXTURE_IMAGE_UNITS 0x91BC +#define GL_MAX_COMPUTE_IMAGE_UNIFORMS 0x91BD +#define GL_MAX_COMPUTE_SHARED_MEMORY_SIZE 0x8262 +#define GL_MAX_COMPUTE_UNIFORM_COMPONENTS 0x8263 +#define GL_MAX_COMPUTE_ATOMIC_COUNTER_BUFFERS 0x8264 +#define GL_MAX_COMPUTE_ATOMIC_COUNTERS 0x8265 +#define GL_MAX_COMBINED_COMPUTE_UNIFORM_COMPONENTS 0x8266 +#define GL_MAX_COMPUTE_WORK_GROUP_INVOCATIONS 0x90EB +#define GL_MAX_COMPUTE_WORK_GROUP_COUNT 0x91BE +#define GL_MAX_COMPUTE_WORK_GROUP_SIZE 0x91BF +#define GL_COMPUTE_WORK_GROUP_SIZE 0x8267 +#define GL_DISPATCH_INDIRECT_BUFFER 0x90EE +#define GL_DISPATCH_INDIRECT_BUFFER_BINDING 0x90EF +#define GL_COMPUTE_SHADER_BIT 0x00000020 +#define GL_DRAW_INDIRECT_BUFFER 0x8F3F +#define GL_DRAW_INDIRECT_BUFFER_BINDING 0x8F43 +#define GL_MAX_UNIFORM_LOCATIONS 0x826E +#define GL_FRAMEBUFFER_DEFAULT_WIDTH 0x9310 +#define GL_FRAMEBUFFER_DEFAULT_HEIGHT 0x9311 +#define GL_FRAMEBUFFER_DEFAULT_SAMPLES 0x9313 +#define GL_FRAMEBUFFER_DEFAULT_FIXED_SAMPLE_LOCATIONS 0x9314 +#define GL_MAX_FRAMEBUFFER_WIDTH 0x9315 +#define GL_MAX_FRAMEBUFFER_HEIGHT 0x9316 +#define GL_MAX_FRAMEBUFFER_SAMPLES 0x9318 +#define GL_UNIFORM 0x92E1 +#define GL_UNIFORM_BLOCK 0x92E2 +#define GL_PROGRAM_INPUT 0x92E3 +#define GL_PROGRAM_OUTPUT 0x92E4 +#define GL_BUFFER_VARIABLE 0x92E5 +#define GL_SHADER_STORAGE_BLOCK 0x92E6 +#define GL_ATOMIC_COUNTER_BUFFER 0x92C0 +#define GL_TRANSFORM_FEEDBACK_VARYING 0x92F4 +#define GL_ACTIVE_RESOURCES 0x92F5 +#define GL_MAX_NAME_LENGTH 0x92F6 +#define GL_MAX_NUM_ACTIVE_VARIABLES 0x92F7 +#define GL_NAME_LENGTH 0x92F9 +#define GL_TYPE 0x92FA +#define GL_ARRAY_SIZE 0x92FB +#define GL_OFFSET 0x92FC +#define GL_BLOCK_INDEX 0x92FD +#define GL_ARRAY_STRIDE 0x92FE +#define GL_MATRIX_STRIDE 0x92FF +#define GL_IS_ROW_MAJOR 0x9300 +#define GL_ATOMIC_COUNTER_BUFFER_INDEX 0x9301 +#define GL_BUFFER_BINDING 0x9302 +#define GL_BUFFER_DATA_SIZE 0x9303 +#define GL_NUM_ACTIVE_VARIABLES 0x9304 +#define GL_ACTIVE_VARIABLES 0x9305 +#define GL_REFERENCED_BY_VERTEX_SHADER 0x9306 +#define GL_REFERENCED_BY_FRAGMENT_SHADER 0x930A +#define GL_REFERENCED_BY_COMPUTE_SHADER 0x930B +#define GL_TOP_LEVEL_ARRAY_SIZE 0x930C +#define GL_TOP_LEVEL_ARRAY_STRIDE 0x930D +#define GL_LOCATION 0x930E +#define GL_VERTEX_SHADER_BIT 0x00000001 +#define GL_FRAGMENT_SHADER_BIT 0x00000002 +#define GL_ALL_SHADER_BITS 0xFFFFFFFF +#define GL_PROGRAM_SEPARABLE 0x8258 +#define GL_ACTIVE_PROGRAM 0x8259 +#define GL_PROGRAM_PIPELINE_BINDING 0x825A +#define GL_ATOMIC_COUNTER_BUFFER_BINDING 0x92C1 +#define GL_ATOMIC_COUNTER_BUFFER_START 0x92C2 +#define GL_ATOMIC_COUNTER_BUFFER_SIZE 0x92C3 +#define GL_MAX_VERTEX_ATOMIC_COUNTER_BUFFERS 0x92CC +#define GL_MAX_FRAGMENT_ATOMIC_COUNTER_BUFFERS 0x92D0 +#define GL_MAX_COMBINED_ATOMIC_COUNTER_BUFFERS 0x92D1 +#define GL_MAX_VERTEX_ATOMIC_COUNTERS 0x92D2 +#define GL_MAX_FRAGMENT_ATOMIC_COUNTERS 0x92D6 +#define GL_MAX_COMBINED_ATOMIC_COUNTERS 0x92D7 +#define GL_MAX_ATOMIC_COUNTER_BUFFER_SIZE 0x92D8 +#define GL_MAX_ATOMIC_COUNTER_BUFFER_BINDINGS 0x92DC +#define GL_ACTIVE_ATOMIC_COUNTER_BUFFERS 0x92D9 +#define GL_UNSIGNED_INT_ATOMIC_COUNTER 0x92DB +#define GL_MAX_IMAGE_UNITS 0x8F38 +#define GL_MAX_VERTEX_IMAGE_UNIFORMS 0x90CA +#define GL_MAX_FRAGMENT_IMAGE_UNIFORMS 0x90CE +#define GL_MAX_COMBINED_IMAGE_UNIFORMS 0x90CF +#define GL_IMAGE_BINDING_NAME 0x8F3A +#define GL_IMAGE_BINDING_LEVEL 0x8F3B +#define GL_IMAGE_BINDING_LAYERED 0x8F3C +#define GL_IMAGE_BINDING_LAYER 0x8F3D +#define GL_IMAGE_BINDING_ACCESS 0x8F3E +#define GL_IMAGE_BINDING_FORMAT 0x906E +#define GL_VERTEX_ATTRIB_ARRAY_BARRIER_BIT 0x00000001 +#define GL_ELEMENT_ARRAY_BARRIER_BIT 0x00000002 +#define GL_UNIFORM_BARRIER_BIT 0x00000004 +#define GL_TEXTURE_FETCH_BARRIER_BIT 0x00000008 +#define GL_SHADER_IMAGE_ACCESS_BARRIER_BIT 0x00000020 +#define GL_COMMAND_BARRIER_BIT 0x00000040 +#define GL_PIXEL_BUFFER_BARRIER_BIT 0x00000080 +#define GL_TEXTURE_UPDATE_BARRIER_BIT 0x00000100 +#define GL_BUFFER_UPDATE_BARRIER_BIT 0x00000200 +#define GL_FRAMEBUFFER_BARRIER_BIT 0x00000400 +#define GL_TRANSFORM_FEEDBACK_BARRIER_BIT 0x00000800 +#define GL_ATOMIC_COUNTER_BARRIER_BIT 0x00001000 +#define GL_ALL_BARRIER_BITS 0xFFFFFFFF +#define GL_IMAGE_2D 0x904D +#define GL_IMAGE_3D 0x904E +#define GL_IMAGE_CUBE 0x9050 +#define GL_IMAGE_2D_ARRAY 0x9053 +#define GL_INT_IMAGE_2D 0x9058 +#define GL_INT_IMAGE_3D 0x9059 +#define GL_INT_IMAGE_CUBE 0x905B +#define GL_INT_IMAGE_2D_ARRAY 0x905E +#define GL_UNSIGNED_INT_IMAGE_2D 0x9063 +#define GL_UNSIGNED_INT_IMAGE_3D 0x9064 +#define GL_UNSIGNED_INT_IMAGE_CUBE 0x9066 +#define GL_UNSIGNED_INT_IMAGE_2D_ARRAY 0x9069 +#define GL_IMAGE_FORMAT_COMPATIBILITY_TYPE 0x90C7 +#define GL_IMAGE_FORMAT_COMPATIBILITY_BY_SIZE 0x90C8 +#define GL_IMAGE_FORMAT_COMPATIBILITY_BY_CLASS 0x90C9 +#define GL_READ_ONLY 0x88B8 +#define GL_WRITE_ONLY 0x88B9 +#define GL_READ_WRITE 0x88BA +#define GL_SHADER_STORAGE_BUFFER 0x90D2 +#define GL_SHADER_STORAGE_BUFFER_BINDING 0x90D3 +#define GL_SHADER_STORAGE_BUFFER_START 0x90D4 +#define GL_SHADER_STORAGE_BUFFER_SIZE 0x90D5 +#define GL_MAX_VERTEX_SHADER_STORAGE_BLOCKS 0x90D6 +#define GL_MAX_FRAGMENT_SHADER_STORAGE_BLOCKS 0x90DA +#define GL_MAX_COMPUTE_SHADER_STORAGE_BLOCKS 0x90DB +#define GL_MAX_COMBINED_SHADER_STORAGE_BLOCKS 0x90DC +#define GL_MAX_SHADER_STORAGE_BUFFER_BINDINGS 0x90DD +#define GL_MAX_SHADER_STORAGE_BLOCK_SIZE 0x90DE +#define GL_SHADER_STORAGE_BUFFER_OFFSET_ALIGNMENT 0x90DF +#define GL_SHADER_STORAGE_BARRIER_BIT 0x00002000 +#define GL_MAX_COMBINED_SHADER_OUTPUT_RESOURCES 0x8F39 +#define GL_DEPTH_STENCIL_TEXTURE_MODE 0x90EA +#define GL_STENCIL_INDEX 0x1901 +#define GL_MIN_PROGRAM_TEXTURE_GATHER_OFFSET 0x8E5E +#define GL_MAX_PROGRAM_TEXTURE_GATHER_OFFSET 0x8E5F +#define GL_SAMPLE_POSITION 0x8E50 +#define GL_SAMPLE_MASK 0x8E51 +#define GL_SAMPLE_MASK_VALUE 0x8E52 +#define GL_TEXTURE_2D_MULTISAMPLE 0x9100 +#define GL_MAX_SAMPLE_MASK_WORDS 0x8E59 +#define GL_MAX_COLOR_TEXTURE_SAMPLES 0x910E +#define GL_MAX_DEPTH_TEXTURE_SAMPLES 0x910F +#define GL_MAX_INTEGER_SAMPLES 0x9110 +#define GL_TEXTURE_BINDING_2D_MULTISAMPLE 0x9104 +#define GL_TEXTURE_SAMPLES 0x9106 +#define GL_TEXTURE_FIXED_SAMPLE_LOCATIONS 0x9107 +#define GL_TEXTURE_WIDTH 0x1000 +#define GL_TEXTURE_HEIGHT 0x1001 +#define GL_TEXTURE_DEPTH 0x8071 +#define GL_TEXTURE_INTERNAL_FORMAT 0x1003 +#define GL_TEXTURE_RED_SIZE 0x805C +#define GL_TEXTURE_GREEN_SIZE 0x805D +#define GL_TEXTURE_BLUE_SIZE 0x805E +#define GL_TEXTURE_ALPHA_SIZE 0x805F +#define GL_TEXTURE_DEPTH_SIZE 0x884A +#define GL_TEXTURE_STENCIL_SIZE 0x88F1 +#define GL_TEXTURE_SHARED_SIZE 0x8C3F +#define GL_TEXTURE_RED_TYPE 0x8C10 +#define GL_TEXTURE_GREEN_TYPE 0x8C11 +#define GL_TEXTURE_BLUE_TYPE 0x8C12 +#define GL_TEXTURE_ALPHA_TYPE 0x8C13 +#define GL_TEXTURE_DEPTH_TYPE 0x8C16 +#define GL_TEXTURE_COMPRESSED 0x86A1 +#define GL_SAMPLER_2D_MULTISAMPLE 0x9108 +#define GL_INT_SAMPLER_2D_MULTISAMPLE 0x9109 +#define GL_UNSIGNED_INT_SAMPLER_2D_MULTISAMPLE 0x910A +#define GL_VERTEX_ATTRIB_BINDING 0x82D4 +#define GL_VERTEX_ATTRIB_RELATIVE_OFFSET 0x82D5 +#define GL_VERTEX_BINDING_DIVISOR 0x82D6 +#define GL_VERTEX_BINDING_OFFSET 0x82D7 +#define GL_VERTEX_BINDING_STRIDE 0x82D8 +#define GL_VERTEX_BINDING_BUFFER 0x8F4F +#define GL_MAX_VERTEX_ATTRIB_RELATIVE_OFFSET 0x82D9 +#define GL_MAX_VERTEX_ATTRIB_BINDINGS 0x82DA +#define GL_MAX_VERTEX_ATTRIB_STRIDE 0x82E5 +typedef void (GL_APIENTRYP PFNGLDISPATCHCOMPUTEPROC) (GLuint num_groups_x, GLuint num_groups_y, GLuint num_groups_z); +typedef void (GL_APIENTRYP PFNGLDISPATCHCOMPUTEINDIRECTPROC) (GLintptr indirect); +typedef void (GL_APIENTRYP PFNGLDRAWARRAYSINDIRECTPROC) (GLenum mode, const void *indirect); +typedef void (GL_APIENTRYP PFNGLDRAWELEMENTSINDIRECTPROC) (GLenum mode, GLenum type, const void *indirect); +typedef void (GL_APIENTRYP PFNGLFRAMEBUFFERPARAMETERIPROC) (GLenum target, GLenum pname, GLint param); +typedef void (GL_APIENTRYP PFNGLGETFRAMEBUFFERPARAMETERIVPROC) (GLenum target, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETPROGRAMINTERFACEIVPROC) (GLuint program, GLenum programInterface, GLenum pname, GLint *params); +typedef GLuint (GL_APIENTRYP PFNGLGETPROGRAMRESOURCEINDEXPROC) (GLuint program, GLenum programInterface, const GLchar *name); +typedef void (GL_APIENTRYP PFNGLGETPROGRAMRESOURCENAMEPROC) (GLuint program, GLenum programInterface, GLuint index, GLsizei bufSize, GLsizei *length, GLchar *name); +typedef void (GL_APIENTRYP PFNGLGETPROGRAMRESOURCEIVPROC) (GLuint program, GLenum programInterface, GLuint index, GLsizei propCount, const GLenum *props, GLsizei bufSize, GLsizei *length, GLint *params); +typedef GLint (GL_APIENTRYP PFNGLGETPROGRAMRESOURCELOCATIONPROC) (GLuint program, GLenum programInterface, const GLchar *name); +typedef void (GL_APIENTRYP PFNGLUSEPROGRAMSTAGESPROC) (GLuint pipeline, GLbitfield stages, GLuint program); +typedef void (GL_APIENTRYP PFNGLACTIVESHADERPROGRAMPROC) (GLuint pipeline, GLuint program); +typedef GLuint (GL_APIENTRYP PFNGLCREATESHADERPROGRAMVPROC) (GLenum type, GLsizei count, const GLchar *const*strings); +typedef void (GL_APIENTRYP PFNGLBINDPROGRAMPIPELINEPROC) (GLuint pipeline); +typedef void (GL_APIENTRYP PFNGLDELETEPROGRAMPIPELINESPROC) (GLsizei n, const GLuint *pipelines); +typedef void (GL_APIENTRYP PFNGLGENPROGRAMPIPELINESPROC) (GLsizei n, GLuint *pipelines); +typedef GLboolean (GL_APIENTRYP PFNGLISPROGRAMPIPELINEPROC) (GLuint pipeline); +typedef void (GL_APIENTRYP PFNGLGETPROGRAMPIPELINEIVPROC) (GLuint pipeline, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM1IPROC) (GLuint program, GLint location, GLint v0); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM2IPROC) (GLuint program, GLint location, GLint v0, GLint v1); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM3IPROC) (GLuint program, GLint location, GLint v0, GLint v1, GLint v2); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM4IPROC) (GLuint program, GLint location, GLint v0, GLint v1, GLint v2, GLint v3); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM1UIPROC) (GLuint program, GLint location, GLuint v0); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM2UIPROC) (GLuint program, GLint location, GLuint v0, GLuint v1); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM3UIPROC) (GLuint program, GLint location, GLuint v0, GLuint v1, GLuint v2); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM4UIPROC) (GLuint program, GLint location, GLuint v0, GLuint v1, GLuint v2, GLuint v3); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM1FPROC) (GLuint program, GLint location, GLfloat v0); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM2FPROC) (GLuint program, GLint location, GLfloat v0, GLfloat v1); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM3FPROC) (GLuint program, GLint location, GLfloat v0, GLfloat v1, GLfloat v2); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM4FPROC) (GLuint program, GLint location, GLfloat v0, GLfloat v1, GLfloat v2, GLfloat v3); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM1IVPROC) (GLuint program, GLint location, GLsizei count, const GLint *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM2IVPROC) (GLuint program, GLint location, GLsizei count, const GLint *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM3IVPROC) (GLuint program, GLint location, GLsizei count, const GLint *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM4IVPROC) (GLuint program, GLint location, GLsizei count, const GLint *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM1UIVPROC) (GLuint program, GLint location, GLsizei count, const GLuint *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM2UIVPROC) (GLuint program, GLint location, GLsizei count, const GLuint *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM3UIVPROC) (GLuint program, GLint location, GLsizei count, const GLuint *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM4UIVPROC) (GLuint program, GLint location, GLsizei count, const GLuint *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM1FVPROC) (GLuint program, GLint location, GLsizei count, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM2FVPROC) (GLuint program, GLint location, GLsizei count, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM3FVPROC) (GLuint program, GLint location, GLsizei count, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORM4FVPROC) (GLuint program, GLint location, GLsizei count, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORMMATRIX2FVPROC) (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORMMATRIX3FVPROC) (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORMMATRIX4FVPROC) (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORMMATRIX2X3FVPROC) (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORMMATRIX3X2FVPROC) (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORMMATRIX2X4FVPROC) (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORMMATRIX4X2FVPROC) (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORMMATRIX3X4FVPROC) (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLPROGRAMUNIFORMMATRIX4X3FVPROC) (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLVALIDATEPROGRAMPIPELINEPROC) (GLuint pipeline); +typedef void (GL_APIENTRYP PFNGLGETPROGRAMPIPELINEINFOLOGPROC) (GLuint pipeline, GLsizei bufSize, GLsizei *length, GLchar *infoLog); +typedef void (GL_APIENTRYP PFNGLBINDIMAGETEXTUREPROC) (GLuint unit, GLuint texture, GLint level, GLboolean layered, GLint layer, GLenum access, GLenum format); +typedef void (GL_APIENTRYP PFNGLGETBOOLEANI_VPROC) (GLenum target, GLuint index, GLboolean *data); +typedef void (GL_APIENTRYP PFNGLMEMORYBARRIERPROC) (GLbitfield barriers); +typedef void (GL_APIENTRYP PFNGLMEMORYBARRIERBYREGIONPROC) (GLbitfield barriers); +typedef void (GL_APIENTRYP PFNGLTEXSTORAGE2DMULTISAMPLEPROC) (GLenum target, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations); +typedef void (GL_APIENTRYP PFNGLGETMULTISAMPLEFVPROC) (GLenum pname, GLuint index, GLfloat *val); +typedef void (GL_APIENTRYP PFNGLSAMPLEMASKIPROC) (GLuint maskNumber, GLbitfield mask); +typedef void (GL_APIENTRYP PFNGLGETTEXLEVELPARAMETERIVPROC) (GLenum target, GLint level, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETTEXLEVELPARAMETERFVPROC) (GLenum target, GLint level, GLenum pname, GLfloat *params); +typedef void (GL_APIENTRYP PFNGLBINDVERTEXBUFFERPROC) (GLuint bindingindex, GLuint buffer, GLintptr offset, GLsizei stride); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBFORMATPROC) (GLuint attribindex, GLint size, GLenum type, GLboolean normalized, GLuint relativeoffset); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBIFORMATPROC) (GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBBINDINGPROC) (GLuint attribindex, GLuint bindingindex); +typedef void (GL_APIENTRYP PFNGLVERTEXBINDINGDIVISORPROC) (GLuint bindingindex, GLuint divisor); +GL_APICALL void GL_APIENTRY glDispatchCompute (GLuint num_groups_x, GLuint num_groups_y, GLuint num_groups_z); +GL_APICALL void GL_APIENTRY glDispatchComputeIndirect (GLintptr indirect); +GL_APICALL void GL_APIENTRY glDrawArraysIndirect (GLenum mode, const void *indirect); +GL_APICALL void GL_APIENTRY glDrawElementsIndirect (GLenum mode, GLenum type, const void *indirect); +GL_APICALL void GL_APIENTRY glFramebufferParameteri (GLenum target, GLenum pname, GLint param); +GL_APICALL void GL_APIENTRY glGetFramebufferParameteriv (GLenum target, GLenum pname, GLint *params); +GL_APICALL void GL_APIENTRY glGetProgramInterfaceiv (GLuint program, GLenum programInterface, GLenum pname, GLint *params); +GL_APICALL GLuint GL_APIENTRY glGetProgramResourceIndex (GLuint program, GLenum programInterface, const GLchar *name); +GL_APICALL void GL_APIENTRY glGetProgramResourceName (GLuint program, GLenum programInterface, GLuint index, GLsizei bufSize, GLsizei *length, GLchar *name); +GL_APICALL void GL_APIENTRY glGetProgramResourceiv (GLuint program, GLenum programInterface, GLuint index, GLsizei propCount, const GLenum *props, GLsizei bufSize, GLsizei *length, GLint *params); +GL_APICALL GLint GL_APIENTRY glGetProgramResourceLocation (GLuint program, GLenum programInterface, const GLchar *name); +GL_APICALL void GL_APIENTRY glUseProgramStages (GLuint pipeline, GLbitfield stages, GLuint program); +GL_APICALL void GL_APIENTRY glActiveShaderProgram (GLuint pipeline, GLuint program); +GL_APICALL GLuint GL_APIENTRY glCreateShaderProgramv (GLenum type, GLsizei count, const GLchar *const*strings); +GL_APICALL void GL_APIENTRY glBindProgramPipeline (GLuint pipeline); +GL_APICALL void GL_APIENTRY glDeleteProgramPipelines (GLsizei n, const GLuint *pipelines); +GL_APICALL void GL_APIENTRY glGenProgramPipelines (GLsizei n, GLuint *pipelines); +GL_APICALL GLboolean GL_APIENTRY glIsProgramPipeline (GLuint pipeline); +GL_APICALL void GL_APIENTRY glGetProgramPipelineiv (GLuint pipeline, GLenum pname, GLint *params); +GL_APICALL void GL_APIENTRY glProgramUniform1i (GLuint program, GLint location, GLint v0); +GL_APICALL void GL_APIENTRY glProgramUniform2i (GLuint program, GLint location, GLint v0, GLint v1); +GL_APICALL void GL_APIENTRY glProgramUniform3i (GLuint program, GLint location, GLint v0, GLint v1, GLint v2); +GL_APICALL void GL_APIENTRY glProgramUniform4i (GLuint program, GLint location, GLint v0, GLint v1, GLint v2, GLint v3); +GL_APICALL void GL_APIENTRY glProgramUniform1ui (GLuint program, GLint location, GLuint v0); +GL_APICALL void GL_APIENTRY glProgramUniform2ui (GLuint program, GLint location, GLuint v0, GLuint v1); +GL_APICALL void GL_APIENTRY glProgramUniform3ui (GLuint program, GLint location, GLuint v0, GLuint v1, GLuint v2); +GL_APICALL void GL_APIENTRY glProgramUniform4ui (GLuint program, GLint location, GLuint v0, GLuint v1, GLuint v2, GLuint v3); +GL_APICALL void GL_APIENTRY glProgramUniform1f (GLuint program, GLint location, GLfloat v0); +GL_APICALL void GL_APIENTRY glProgramUniform2f (GLuint program, GLint location, GLfloat v0, GLfloat v1); +GL_APICALL void GL_APIENTRY glProgramUniform3f (GLuint program, GLint location, GLfloat v0, GLfloat v1, GLfloat v2); +GL_APICALL void GL_APIENTRY glProgramUniform4f (GLuint program, GLint location, GLfloat v0, GLfloat v1, GLfloat v2, GLfloat v3); +GL_APICALL void GL_APIENTRY glProgramUniform1iv (GLuint program, GLint location, GLsizei count, const GLint *value); +GL_APICALL void GL_APIENTRY glProgramUniform2iv (GLuint program, GLint location, GLsizei count, const GLint *value); +GL_APICALL void GL_APIENTRY glProgramUniform3iv (GLuint program, GLint location, GLsizei count, const GLint *value); +GL_APICALL void GL_APIENTRY glProgramUniform4iv (GLuint program, GLint location, GLsizei count, const GLint *value); +GL_APICALL void GL_APIENTRY glProgramUniform1uiv (GLuint program, GLint location, GLsizei count, const GLuint *value); +GL_APICALL void GL_APIENTRY glProgramUniform2uiv (GLuint program, GLint location, GLsizei count, const GLuint *value); +GL_APICALL void GL_APIENTRY glProgramUniform3uiv (GLuint program, GLint location, GLsizei count, const GLuint *value); +GL_APICALL void GL_APIENTRY glProgramUniform4uiv (GLuint program, GLint location, GLsizei count, const GLuint *value); +GL_APICALL void GL_APIENTRY glProgramUniform1fv (GLuint program, GLint location, GLsizei count, const GLfloat *value); +GL_APICALL void GL_APIENTRY glProgramUniform2fv (GLuint program, GLint location, GLsizei count, const GLfloat *value); +GL_APICALL void GL_APIENTRY glProgramUniform3fv (GLuint program, GLint location, GLsizei count, const GLfloat *value); +GL_APICALL void GL_APIENTRY glProgramUniform4fv (GLuint program, GLint location, GLsizei count, const GLfloat *value); +GL_APICALL void GL_APIENTRY glProgramUniformMatrix2fv (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +GL_APICALL void GL_APIENTRY glProgramUniformMatrix3fv (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +GL_APICALL void GL_APIENTRY glProgramUniformMatrix4fv (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +GL_APICALL void GL_APIENTRY glProgramUniformMatrix2x3fv (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +GL_APICALL void GL_APIENTRY glProgramUniformMatrix3x2fv (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +GL_APICALL void GL_APIENTRY glProgramUniformMatrix2x4fv (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +GL_APICALL void GL_APIENTRY glProgramUniformMatrix4x2fv (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +GL_APICALL void GL_APIENTRY glProgramUniformMatrix3x4fv (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +GL_APICALL void GL_APIENTRY glProgramUniformMatrix4x3fv (GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +GL_APICALL void GL_APIENTRY glValidateProgramPipeline (GLuint pipeline); +GL_APICALL void GL_APIENTRY glGetProgramPipelineInfoLog (GLuint pipeline, GLsizei bufSize, GLsizei *length, GLchar *infoLog); +GL_APICALL void GL_APIENTRY glBindImageTexture (GLuint unit, GLuint texture, GLint level, GLboolean layered, GLint layer, GLenum access, GLenum format); +GL_APICALL void GL_APIENTRY glGetBooleani_v (GLenum target, GLuint index, GLboolean *data); +GL_APICALL void GL_APIENTRY glMemoryBarrier (GLbitfield barriers); +GL_APICALL void GL_APIENTRY glMemoryBarrierByRegion (GLbitfield barriers); +GL_APICALL void GL_APIENTRY glTexStorage2DMultisample (GLenum target, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations); +GL_APICALL void GL_APIENTRY glGetMultisamplefv (GLenum pname, GLuint index, GLfloat *val); +GL_APICALL void GL_APIENTRY glSampleMaski (GLuint maskNumber, GLbitfield mask); +GL_APICALL void GL_APIENTRY glGetTexLevelParameteriv (GLenum target, GLint level, GLenum pname, GLint *params); +GL_APICALL void GL_APIENTRY glGetTexLevelParameterfv (GLenum target, GLint level, GLenum pname, GLfloat *params); +GL_APICALL void GL_APIENTRY glBindVertexBuffer (GLuint bindingindex, GLuint buffer, GLintptr offset, GLsizei stride); +GL_APICALL void GL_APIENTRY glVertexAttribFormat (GLuint attribindex, GLint size, GLenum type, GLboolean normalized, GLuint relativeoffset); +GL_APICALL void GL_APIENTRY glVertexAttribIFormat (GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset); +GL_APICALL void GL_APIENTRY glVertexAttribBinding (GLuint attribindex, GLuint bindingindex); +GL_APICALL void GL_APIENTRY glVertexBindingDivisor (GLuint bindingindex, GLuint divisor); +#endif /* GL_ES_VERSION_3_1 */ + +#ifndef GL_ES_VERSION_3_2 +#define GL_ES_VERSION_3_2 1 +typedef void (GL_APIENTRY *GLDEBUGPROC)(GLenum source,GLenum type,GLuint id,GLenum severity,GLsizei length,const GLchar *message,const void *userParam); +#define GL_MULTISAMPLE_LINE_WIDTH_RANGE 0x9381 +#define GL_MULTISAMPLE_LINE_WIDTH_GRANULARITY 0x9382 +#define GL_MULTIPLY 0x9294 +#define GL_SCREEN 0x9295 +#define GL_OVERLAY 0x9296 +#define GL_DARKEN 0x9297 +#define GL_LIGHTEN 0x9298 +#define GL_COLORDODGE 0x9299 +#define GL_COLORBURN 0x929A +#define GL_HARDLIGHT 0x929B +#define GL_SOFTLIGHT 0x929C +#define GL_DIFFERENCE 0x929E +#define GL_EXCLUSION 0x92A0 +#define GL_HSL_HUE 0x92AD +#define GL_HSL_SATURATION 0x92AE +#define GL_HSL_COLOR 0x92AF +#define GL_HSL_LUMINOSITY 0x92B0 +#define GL_DEBUG_OUTPUT_SYNCHRONOUS 0x8242 +#define GL_DEBUG_NEXT_LOGGED_MESSAGE_LENGTH 0x8243 +#define GL_DEBUG_CALLBACK_FUNCTION 0x8244 +#define GL_DEBUG_CALLBACK_USER_PARAM 0x8245 +#define GL_DEBUG_SOURCE_API 0x8246 +#define GL_DEBUG_SOURCE_WINDOW_SYSTEM 0x8247 +#define GL_DEBUG_SOURCE_SHADER_COMPILER 0x8248 +#define GL_DEBUG_SOURCE_THIRD_PARTY 0x8249 +#define GL_DEBUG_SOURCE_APPLICATION 0x824A +#define GL_DEBUG_SOURCE_OTHER 0x824B +#define GL_DEBUG_TYPE_ERROR 0x824C +#define GL_DEBUG_TYPE_DEPRECATED_BEHAVIOR 0x824D +#define GL_DEBUG_TYPE_UNDEFINED_BEHAVIOR 0x824E +#define GL_DEBUG_TYPE_PORTABILITY 0x824F +#define GL_DEBUG_TYPE_PERFORMANCE 0x8250 +#define GL_DEBUG_TYPE_OTHER 0x8251 +#define GL_DEBUG_TYPE_MARKER 0x8268 +#define GL_DEBUG_TYPE_PUSH_GROUP 0x8269 +#define GL_DEBUG_TYPE_POP_GROUP 0x826A +#define GL_DEBUG_SEVERITY_NOTIFICATION 0x826B +#define GL_MAX_DEBUG_GROUP_STACK_DEPTH 0x826C +#define GL_DEBUG_GROUP_STACK_DEPTH 0x826D +#define GL_BUFFER 0x82E0 +#define GL_SHADER 0x82E1 +#define GL_PROGRAM 0x82E2 +#define GL_VERTEX_ARRAY 0x8074 +#define GL_QUERY 0x82E3 +#define GL_PROGRAM_PIPELINE 0x82E4 +#define GL_SAMPLER 0x82E6 +#define GL_MAX_LABEL_LENGTH 0x82E8 +#define GL_MAX_DEBUG_MESSAGE_LENGTH 0x9143 +#define GL_MAX_DEBUG_LOGGED_MESSAGES 0x9144 +#define GL_DEBUG_LOGGED_MESSAGES 0x9145 +#define GL_DEBUG_SEVERITY_HIGH 0x9146 +#define GL_DEBUG_SEVERITY_MEDIUM 0x9147 +#define GL_DEBUG_SEVERITY_LOW 0x9148 +#define GL_DEBUG_OUTPUT 0x92E0 +#define GL_CONTEXT_FLAG_DEBUG_BIT 0x00000002 +#define GL_STACK_OVERFLOW 0x0503 +#define GL_STACK_UNDERFLOW 0x0504 +#define GL_GEOMETRY_SHADER 0x8DD9 +#define GL_GEOMETRY_SHADER_BIT 0x00000004 +#define GL_GEOMETRY_VERTICES_OUT 0x8916 +#define GL_GEOMETRY_INPUT_TYPE 0x8917 +#define GL_GEOMETRY_OUTPUT_TYPE 0x8918 +#define GL_GEOMETRY_SHADER_INVOCATIONS 0x887F +#define GL_LAYER_PROVOKING_VERTEX 0x825E +#define GL_LINES_ADJACENCY 0x000A +#define GL_LINE_STRIP_ADJACENCY 0x000B +#define GL_TRIANGLES_ADJACENCY 0x000C +#define GL_TRIANGLE_STRIP_ADJACENCY 0x000D +#define GL_MAX_GEOMETRY_UNIFORM_COMPONENTS 0x8DDF +#define GL_MAX_GEOMETRY_UNIFORM_BLOCKS 0x8A2C +#define GL_MAX_COMBINED_GEOMETRY_UNIFORM_COMPONENTS 0x8A32 +#define GL_MAX_GEOMETRY_INPUT_COMPONENTS 0x9123 +#define GL_MAX_GEOMETRY_OUTPUT_COMPONENTS 0x9124 +#define GL_MAX_GEOMETRY_OUTPUT_VERTICES 0x8DE0 +#define GL_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS 0x8DE1 +#define GL_MAX_GEOMETRY_SHADER_INVOCATIONS 0x8E5A +#define GL_MAX_GEOMETRY_TEXTURE_IMAGE_UNITS 0x8C29 +#define GL_MAX_GEOMETRY_ATOMIC_COUNTER_BUFFERS 0x92CF +#define GL_MAX_GEOMETRY_ATOMIC_COUNTERS 0x92D5 +#define GL_MAX_GEOMETRY_IMAGE_UNIFORMS 0x90CD +#define GL_MAX_GEOMETRY_SHADER_STORAGE_BLOCKS 0x90D7 +#define GL_FIRST_VERTEX_CONVENTION 0x8E4D +#define GL_LAST_VERTEX_CONVENTION 0x8E4E +#define GL_UNDEFINED_VERTEX 0x8260 +#define GL_PRIMITIVES_GENERATED 0x8C87 +#define GL_FRAMEBUFFER_DEFAULT_LAYERS 0x9312 +#define GL_MAX_FRAMEBUFFER_LAYERS 0x9317 +#define GL_FRAMEBUFFER_INCOMPLETE_LAYER_TARGETS 0x8DA8 +#define GL_FRAMEBUFFER_ATTACHMENT_LAYERED 0x8DA7 +#define GL_REFERENCED_BY_GEOMETRY_SHADER 0x9309 +#define GL_PRIMITIVE_BOUNDING_BOX 0x92BE +#define GL_CONTEXT_FLAG_ROBUST_ACCESS_BIT 0x00000004 +#define GL_CONTEXT_FLAGS 0x821E +#define GL_LOSE_CONTEXT_ON_RESET 0x8252 +#define GL_GUILTY_CONTEXT_RESET 0x8253 +#define GL_INNOCENT_CONTEXT_RESET 0x8254 +#define GL_UNKNOWN_CONTEXT_RESET 0x8255 +#define GL_RESET_NOTIFICATION_STRATEGY 0x8256 +#define GL_NO_RESET_NOTIFICATION 0x8261 +#define GL_CONTEXT_LOST 0x0507 +#define GL_SAMPLE_SHADING 0x8C36 +#define GL_MIN_SAMPLE_SHADING_VALUE 0x8C37 +#define GL_MIN_FRAGMENT_INTERPOLATION_OFFSET 0x8E5B +#define GL_MAX_FRAGMENT_INTERPOLATION_OFFSET 0x8E5C +#define GL_FRAGMENT_INTERPOLATION_OFFSET_BITS 0x8E5D +#define GL_PATCHES 0x000E +#define GL_PATCH_VERTICES 0x8E72 +#define GL_TESS_CONTROL_OUTPUT_VERTICES 0x8E75 +#define GL_TESS_GEN_MODE 0x8E76 +#define GL_TESS_GEN_SPACING 0x8E77 +#define GL_TESS_GEN_VERTEX_ORDER 0x8E78 +#define GL_TESS_GEN_POINT_MODE 0x8E79 +#define GL_ISOLINES 0x8E7A +#define GL_QUADS 0x0007 +#define GL_FRACTIONAL_ODD 0x8E7B +#define GL_FRACTIONAL_EVEN 0x8E7C +#define GL_MAX_PATCH_VERTICES 0x8E7D +#define GL_MAX_TESS_GEN_LEVEL 0x8E7E +#define GL_MAX_TESS_CONTROL_UNIFORM_COMPONENTS 0x8E7F +#define GL_MAX_TESS_EVALUATION_UNIFORM_COMPONENTS 0x8E80 +#define GL_MAX_TESS_CONTROL_TEXTURE_IMAGE_UNITS 0x8E81 +#define GL_MAX_TESS_EVALUATION_TEXTURE_IMAGE_UNITS 0x8E82 +#define GL_MAX_TESS_CONTROL_OUTPUT_COMPONENTS 0x8E83 +#define GL_MAX_TESS_PATCH_COMPONENTS 0x8E84 +#define GL_MAX_TESS_CONTROL_TOTAL_OUTPUT_COMPONENTS 0x8E85 +#define GL_MAX_TESS_EVALUATION_OUTPUT_COMPONENTS 0x8E86 +#define GL_MAX_TESS_CONTROL_UNIFORM_BLOCKS 0x8E89 +#define GL_MAX_TESS_EVALUATION_UNIFORM_BLOCKS 0x8E8A +#define GL_MAX_TESS_CONTROL_INPUT_COMPONENTS 0x886C +#define GL_MAX_TESS_EVALUATION_INPUT_COMPONENTS 0x886D +#define GL_MAX_COMBINED_TESS_CONTROL_UNIFORM_COMPONENTS 0x8E1E +#define GL_MAX_COMBINED_TESS_EVALUATION_UNIFORM_COMPONENTS 0x8E1F +#define GL_MAX_TESS_CONTROL_ATOMIC_COUNTER_BUFFERS 0x92CD +#define GL_MAX_TESS_EVALUATION_ATOMIC_COUNTER_BUFFERS 0x92CE +#define GL_MAX_TESS_CONTROL_ATOMIC_COUNTERS 0x92D3 +#define GL_MAX_TESS_EVALUATION_ATOMIC_COUNTERS 0x92D4 +#define GL_MAX_TESS_CONTROL_IMAGE_UNIFORMS 0x90CB +#define GL_MAX_TESS_EVALUATION_IMAGE_UNIFORMS 0x90CC +#define GL_MAX_TESS_CONTROL_SHADER_STORAGE_BLOCKS 0x90D8 +#define GL_MAX_TESS_EVALUATION_SHADER_STORAGE_BLOCKS 0x90D9 +#define GL_PRIMITIVE_RESTART_FOR_PATCHES_SUPPORTED 0x8221 +#define GL_IS_PER_PATCH 0x92E7 +#define GL_REFERENCED_BY_TESS_CONTROL_SHADER 0x9307 +#define GL_REFERENCED_BY_TESS_EVALUATION_SHADER 0x9308 +#define GL_TESS_CONTROL_SHADER 0x8E88 +#define GL_TESS_EVALUATION_SHADER 0x8E87 +#define GL_TESS_CONTROL_SHADER_BIT 0x00000008 +#define GL_TESS_EVALUATION_SHADER_BIT 0x00000010 +#define GL_TEXTURE_BORDER_COLOR 0x1004 +#define GL_CLAMP_TO_BORDER 0x812D +#define GL_TEXTURE_BUFFER 0x8C2A +#define GL_TEXTURE_BUFFER_BINDING 0x8C2A +#define GL_MAX_TEXTURE_BUFFER_SIZE 0x8C2B +#define GL_TEXTURE_BINDING_BUFFER 0x8C2C +#define GL_TEXTURE_BUFFER_DATA_STORE_BINDING 0x8C2D +#define GL_TEXTURE_BUFFER_OFFSET_ALIGNMENT 0x919F +#define GL_SAMPLER_BUFFER 0x8DC2 +#define GL_INT_SAMPLER_BUFFER 0x8DD0 +#define GL_UNSIGNED_INT_SAMPLER_BUFFER 0x8DD8 +#define GL_IMAGE_BUFFER 0x9051 +#define GL_INT_IMAGE_BUFFER 0x905C +#define GL_UNSIGNED_INT_IMAGE_BUFFER 0x9067 +#define GL_TEXTURE_BUFFER_OFFSET 0x919D +#define GL_TEXTURE_BUFFER_SIZE 0x919E +#define GL_COMPRESSED_RGBA_ASTC_4x4 0x93B0 +#define GL_COMPRESSED_RGBA_ASTC_5x4 0x93B1 +#define GL_COMPRESSED_RGBA_ASTC_5x5 0x93B2 +#define GL_COMPRESSED_RGBA_ASTC_6x5 0x93B3 +#define GL_COMPRESSED_RGBA_ASTC_6x6 0x93B4 +#define GL_COMPRESSED_RGBA_ASTC_8x5 0x93B5 +#define GL_COMPRESSED_RGBA_ASTC_8x6 0x93B6 +#define GL_COMPRESSED_RGBA_ASTC_8x8 0x93B7 +#define GL_COMPRESSED_RGBA_ASTC_10x5 0x93B8 +#define GL_COMPRESSED_RGBA_ASTC_10x6 0x93B9 +#define GL_COMPRESSED_RGBA_ASTC_10x8 0x93BA +#define GL_COMPRESSED_RGBA_ASTC_10x10 0x93BB +#define GL_COMPRESSED_RGBA_ASTC_12x10 0x93BC +#define GL_COMPRESSED_RGBA_ASTC_12x12 0x93BD +#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4 0x93D0 +#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4 0x93D1 +#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5 0x93D2 +#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5 0x93D3 +#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6 0x93D4 +#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5 0x93D5 +#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6 0x93D6 +#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8 0x93D7 +#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5 0x93D8 +#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6 0x93D9 +#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8 0x93DA +#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10 0x93DB +#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10 0x93DC +#define GL_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12 0x93DD +#define GL_TEXTURE_CUBE_MAP_ARRAY 0x9009 +#define GL_TEXTURE_BINDING_CUBE_MAP_ARRAY 0x900A +#define GL_SAMPLER_CUBE_MAP_ARRAY 0x900C +#define GL_SAMPLER_CUBE_MAP_ARRAY_SHADOW 0x900D +#define GL_INT_SAMPLER_CUBE_MAP_ARRAY 0x900E +#define GL_UNSIGNED_INT_SAMPLER_CUBE_MAP_ARRAY 0x900F +#define GL_IMAGE_CUBE_MAP_ARRAY 0x9054 +#define GL_INT_IMAGE_CUBE_MAP_ARRAY 0x905F +#define GL_UNSIGNED_INT_IMAGE_CUBE_MAP_ARRAY 0x906A +#define GL_TEXTURE_2D_MULTISAMPLE_ARRAY 0x9102 +#define GL_TEXTURE_BINDING_2D_MULTISAMPLE_ARRAY 0x9105 +#define GL_SAMPLER_2D_MULTISAMPLE_ARRAY 0x910B +#define GL_INT_SAMPLER_2D_MULTISAMPLE_ARRAY 0x910C +#define GL_UNSIGNED_INT_SAMPLER_2D_MULTISAMPLE_ARRAY 0x910D +typedef void (GL_APIENTRYP PFNGLBLENDBARRIERPROC) (void); +typedef void (GL_APIENTRYP PFNGLCOPYIMAGESUBDATAPROC) (GLuint srcName, GLenum srcTarget, GLint srcLevel, GLint srcX, GLint srcY, GLint srcZ, GLuint dstName, GLenum dstTarget, GLint dstLevel, GLint dstX, GLint dstY, GLint dstZ, GLsizei srcWidth, GLsizei srcHeight, GLsizei srcDepth); +typedef void (GL_APIENTRYP PFNGLDEBUGMESSAGECONTROLPROC) (GLenum source, GLenum type, GLenum severity, GLsizei count, const GLuint *ids, GLboolean enabled); +typedef void (GL_APIENTRYP PFNGLDEBUGMESSAGEINSERTPROC) (GLenum source, GLenum type, GLuint id, GLenum severity, GLsizei length, const GLchar *buf); +typedef void (GL_APIENTRYP PFNGLDEBUGMESSAGECALLBACKPROC) (GLDEBUGPROC callback, const void *userParam); +typedef GLuint (GL_APIENTRYP PFNGLGETDEBUGMESSAGELOGPROC) (GLuint count, GLsizei bufSize, GLenum *sources, GLenum *types, GLuint *ids, GLenum *severities, GLsizei *lengths, GLchar *messageLog); +typedef void (GL_APIENTRYP PFNGLPUSHDEBUGGROUPPROC) (GLenum source, GLuint id, GLsizei length, const GLchar *message); +typedef void (GL_APIENTRYP PFNGLPOPDEBUGGROUPPROC) (void); +typedef void (GL_APIENTRYP PFNGLOBJECTLABELPROC) (GLenum identifier, GLuint name, GLsizei length, const GLchar *label); +typedef void (GL_APIENTRYP PFNGLGETOBJECTLABELPROC) (GLenum identifier, GLuint name, GLsizei bufSize, GLsizei *length, GLchar *label); +typedef void (GL_APIENTRYP PFNGLOBJECTPTRLABELPROC) (const void *ptr, GLsizei length, const GLchar *label); +typedef void (GL_APIENTRYP PFNGLGETOBJECTPTRLABELPROC) (const void *ptr, GLsizei bufSize, GLsizei *length, GLchar *label); +typedef void (GL_APIENTRYP PFNGLGETPOINTERVPROC) (GLenum pname, void **params); +typedef void (GL_APIENTRYP PFNGLENABLEIPROC) (GLenum target, GLuint index); +typedef void (GL_APIENTRYP PFNGLDISABLEIPROC) (GLenum target, GLuint index); +typedef void (GL_APIENTRYP PFNGLBLENDEQUATIONIPROC) (GLuint buf, GLenum mode); +typedef void (GL_APIENTRYP PFNGLBLENDEQUATIONSEPARATEIPROC) (GLuint buf, GLenum modeRGB, GLenum modeAlpha); +typedef void (GL_APIENTRYP PFNGLBLENDFUNCIPROC) (GLuint buf, GLenum src, GLenum dst); +typedef void (GL_APIENTRYP PFNGLBLENDFUNCSEPARATEIPROC) (GLuint buf, GLenum srcRGB, GLenum dstRGB, GLenum srcAlpha, GLenum dstAlpha); +typedef void (GL_APIENTRYP PFNGLCOLORMASKIPROC) (GLuint index, GLboolean r, GLboolean g, GLboolean b, GLboolean a); +typedef GLboolean (GL_APIENTRYP PFNGLISENABLEDIPROC) (GLenum target, GLuint index); +typedef void (GL_APIENTRYP PFNGLDRAWELEMENTSBASEVERTEXPROC) (GLenum mode, GLsizei count, GLenum type, const void *indices, GLint basevertex); +typedef void (GL_APIENTRYP PFNGLDRAWRANGEELEMENTSBASEVERTEXPROC) (GLenum mode, GLuint start, GLuint end, GLsizei count, GLenum type, const void *indices, GLint basevertex); +typedef void (GL_APIENTRYP PFNGLDRAWELEMENTSINSTANCEDBASEVERTEXPROC) (GLenum mode, GLsizei count, GLenum type, const void *indices, GLsizei instancecount, GLint basevertex); +typedef void (GL_APIENTRYP PFNGLFRAMEBUFFERTEXTUREPROC) (GLenum target, GLenum attachment, GLuint texture, GLint level); +typedef void (GL_APIENTRYP PFNGLPRIMITIVEBOUNDINGBOXPROC) (GLfloat minX, GLfloat minY, GLfloat minZ, GLfloat minW, GLfloat maxX, GLfloat maxY, GLfloat maxZ, GLfloat maxW); +typedef GLenum (GL_APIENTRYP PFNGLGETGRAPHICSRESETSTATUSPROC) (void); +typedef void (GL_APIENTRYP PFNGLREADNPIXELSPROC) (GLint x, GLint y, GLsizei width, GLsizei height, GLenum format, GLenum type, GLsizei bufSize, void *data); +typedef void (GL_APIENTRYP PFNGLGETNUNIFORMFVPROC) (GLuint program, GLint location, GLsizei bufSize, GLfloat *params); +typedef void (GL_APIENTRYP PFNGLGETNUNIFORMIVPROC) (GLuint program, GLint location, GLsizei bufSize, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETNUNIFORMUIVPROC) (GLuint program, GLint location, GLsizei bufSize, GLuint *params); +typedef void (GL_APIENTRYP PFNGLMINSAMPLESHADINGPROC) (GLfloat value); +typedef void (GL_APIENTRYP PFNGLPATCHPARAMETERIPROC) (GLenum pname, GLint value); +typedef void (GL_APIENTRYP PFNGLTEXPARAMETERIIVPROC) (GLenum target, GLenum pname, const GLint *params); +typedef void (GL_APIENTRYP PFNGLTEXPARAMETERIUIVPROC) (GLenum target, GLenum pname, const GLuint *params); +typedef void (GL_APIENTRYP PFNGLGETTEXPARAMETERIIVPROC) (GLenum target, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETTEXPARAMETERIUIVPROC) (GLenum target, GLenum pname, GLuint *params); +typedef void (GL_APIENTRYP PFNGLSAMPLERPARAMETERIIVPROC) (GLuint sampler, GLenum pname, const GLint *param); +typedef void (GL_APIENTRYP PFNGLSAMPLERPARAMETERIUIVPROC) (GLuint sampler, GLenum pname, const GLuint *param); +typedef void (GL_APIENTRYP PFNGLGETSAMPLERPARAMETERIIVPROC) (GLuint sampler, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETSAMPLERPARAMETERIUIVPROC) (GLuint sampler, GLenum pname, GLuint *params); +typedef void (GL_APIENTRYP PFNGLTEXBUFFERPROC) (GLenum target, GLenum internalformat, GLuint buffer); +typedef void (GL_APIENTRYP PFNGLTEXBUFFERRANGEPROC) (GLenum target, GLenum internalformat, GLuint buffer, GLintptr offset, GLsizeiptr size); +typedef void (GL_APIENTRYP PFNGLTEXSTORAGE3DMULTISAMPLEPROC) (GLenum target, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedsamplelocations); +GL_APICALL void GL_APIENTRY glBlendBarrier (void); +GL_APICALL void GL_APIENTRY glCopyImageSubData (GLuint srcName, GLenum srcTarget, GLint srcLevel, GLint srcX, GLint srcY, GLint srcZ, GLuint dstName, GLenum dstTarget, GLint dstLevel, GLint dstX, GLint dstY, GLint dstZ, GLsizei srcWidth, GLsizei srcHeight, GLsizei srcDepth); +GL_APICALL void GL_APIENTRY glDebugMessageControl (GLenum source, GLenum type, GLenum severity, GLsizei count, const GLuint *ids, GLboolean enabled); +GL_APICALL void GL_APIENTRY glDebugMessageInsert (GLenum source, GLenum type, GLuint id, GLenum severity, GLsizei length, const GLchar *buf); +GL_APICALL void GL_APIENTRY glDebugMessageCallback (GLDEBUGPROC callback, const void *userParam); +GL_APICALL GLuint GL_APIENTRY glGetDebugMessageLog (GLuint count, GLsizei bufSize, GLenum *sources, GLenum *types, GLuint *ids, GLenum *severities, GLsizei *lengths, GLchar *messageLog); +GL_APICALL void GL_APIENTRY glPushDebugGroup (GLenum source, GLuint id, GLsizei length, const GLchar *message); +GL_APICALL void GL_APIENTRY glPopDebugGroup (void); +GL_APICALL void GL_APIENTRY glObjectLabel (GLenum identifier, GLuint name, GLsizei length, const GLchar *label); +GL_APICALL void GL_APIENTRY glGetObjectLabel (GLenum identifier, GLuint name, GLsizei bufSize, GLsizei *length, GLchar *label); +GL_APICALL void GL_APIENTRY glObjectPtrLabel (const void *ptr, GLsizei length, const GLchar *label); +GL_APICALL void GL_APIENTRY glGetObjectPtrLabel (const void *ptr, GLsizei bufSize, GLsizei *length, GLchar *label); +GL_APICALL void GL_APIENTRY glGetPointerv (GLenum pname, void **params); +GL_APICALL void GL_APIENTRY glEnablei (GLenum target, GLuint index); +GL_APICALL void GL_APIENTRY glDisablei (GLenum target, GLuint index); +GL_APICALL void GL_APIENTRY glBlendEquationi (GLuint buf, GLenum mode); +GL_APICALL void GL_APIENTRY glBlendEquationSeparatei (GLuint buf, GLenum modeRGB, GLenum modeAlpha); +GL_APICALL void GL_APIENTRY glBlendFunci (GLuint buf, GLenum src, GLenum dst); +GL_APICALL void GL_APIENTRY glBlendFuncSeparatei (GLuint buf, GLenum srcRGB, GLenum dstRGB, GLenum srcAlpha, GLenum dstAlpha); +GL_APICALL void GL_APIENTRY glColorMaski (GLuint index, GLboolean r, GLboolean g, GLboolean b, GLboolean a); +GL_APICALL GLboolean GL_APIENTRY glIsEnabledi (GLenum target, GLuint index); +GL_APICALL void GL_APIENTRY glDrawElementsBaseVertex (GLenum mode, GLsizei count, GLenum type, const void *indices, GLint basevertex); +GL_APICALL void GL_APIENTRY glDrawRangeElementsBaseVertex (GLenum mode, GLuint start, GLuint end, GLsizei count, GLenum type, const void *indices, GLint basevertex); +GL_APICALL void GL_APIENTRY glDrawElementsInstancedBaseVertex (GLenum mode, GLsizei count, GLenum type, const void *indices, GLsizei instancecount, GLint basevertex); +GL_APICALL void GL_APIENTRY glFramebufferTexture (GLenum target, GLenum attachment, GLuint texture, GLint level); +GL_APICALL void GL_APIENTRY glPrimitiveBoundingBox (GLfloat minX, GLfloat minY, GLfloat minZ, GLfloat minW, GLfloat maxX, GLfloat maxY, GLfloat maxZ, GLfloat maxW); +GL_APICALL GLenum GL_APIENTRY glGetGraphicsResetStatus (void); +GL_APICALL void GL_APIENTRY glReadnPixels (GLint x, GLint y, GLsizei width, GLsizei height, GLenum format, GLenum type, GLsizei bufSize, void *data); +GL_APICALL void GL_APIENTRY glGetnUniformfv (GLuint program, GLint location, GLsizei bufSize, GLfloat *params); +GL_APICALL void GL_APIENTRY glGetnUniformiv (GLuint program, GLint location, GLsizei bufSize, GLint *params); +GL_APICALL void GL_APIENTRY glGetnUniformuiv (GLuint program, GLint location, GLsizei bufSize, GLuint *params); +GL_APICALL void GL_APIENTRY glMinSampleShading (GLfloat value); +GL_APICALL void GL_APIENTRY glPatchParameteri (GLenum pname, GLint value); +GL_APICALL void GL_APIENTRY glTexParameterIiv (GLenum target, GLenum pname, const GLint *params); +GL_APICALL void GL_APIENTRY glTexParameterIuiv (GLenum target, GLenum pname, const GLuint *params); +GL_APICALL void GL_APIENTRY glGetTexParameterIiv (GLenum target, GLenum pname, GLint *params); +GL_APICALL void GL_APIENTRY glGetTexParameterIuiv (GLenum target, GLenum pname, GLuint *params); +GL_APICALL void GL_APIENTRY glSamplerParameterIiv (GLuint sampler, GLenum pname, const GLint *param); +GL_APICALL void GL_APIENTRY glSamplerParameterIuiv (GLuint sampler, GLenum pname, const GLuint *param); +GL_APICALL void GL_APIENTRY glGetSamplerParameterIiv (GLuint sampler, GLenum pname, GLint *params); +GL_APICALL void GL_APIENTRY glGetSamplerParameterIuiv (GLuint sampler, GLenum pname, GLuint *params); +GL_APICALL void GL_APIENTRY glTexBuffer (GLenum target, GLenum internalformat, GLuint buffer); +GL_APICALL void GL_APIENTRY glTexBufferRange (GLenum target, GLenum internalformat, GLuint buffer, GLintptr offset, GLsizeiptr size); +GL_APICALL void GL_APIENTRY glTexStorage3DMultisample (GLenum target, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedsamplelocations); +#endif /* GL_ES_VERSION_3_2 */ + +#ifdef __cplusplus +} +#endif + +#endif diff -Nru mesa-12.0.6/include/GLES3/gl3.h mesa-17.0.7/include/GLES3/gl3.h --- mesa-12.0.6/include/GLES3/gl3.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/include/GLES3/gl3.h 2017-06-01 10:37:10.000000000 +0000 @@ -6,7 +6,7 @@ #endif /* -** Copyright (c) 2013 The Khronos Group Inc. +** Copyright (c) 2013-2016 The Khronos Group Inc. ** ** Permission is hereby granted, free of charge, to any person obtaining a ** copy of this software and/or associated documentation files (the @@ -33,17 +33,21 @@ ** used to make the header, and the header can be found at ** http://www.opengl.org/registry/ ** -** Khronos $Revision: 24614 $ on $Date: 2013-12-30 04:44:46 -0800 (Mon, 30 Dec 2013) $ +** Khronos $Revision: 32749 $ on $Date: 2016-04-28 09:03:03 -0700 (Thu, 28 Apr 2016) $ */ #include -/* Generated on date 20131230 */ +#ifndef GL_APIENTRYP +#define GL_APIENTRYP GL_APIENTRY* +#endif + +/* Generated on date 20160428 */ /* Generated C header for: * API: gles2 * Profile: common - * Versions considered: [23]\.[0-9] + * Versions considered: 2\.[0-9]|3\.0 * Versions emitted: .* * Default extensions included: None * Additional extensions included: _nomatch_^ @@ -374,6 +378,148 @@ #define GL_RENDERBUFFER_BINDING 0x8CA7 #define GL_MAX_RENDERBUFFER_SIZE 0x84E8 #define GL_INVALID_FRAMEBUFFER_OPERATION 0x0506 +typedef void (GL_APIENTRYP PFNGLACTIVETEXTUREPROC) (GLenum texture); +typedef void (GL_APIENTRYP PFNGLATTACHSHADERPROC) (GLuint program, GLuint shader); +typedef void (GL_APIENTRYP PFNGLBINDATTRIBLOCATIONPROC) (GLuint program, GLuint index, const GLchar *name); +typedef void (GL_APIENTRYP PFNGLBINDBUFFERPROC) (GLenum target, GLuint buffer); +typedef void (GL_APIENTRYP PFNGLBINDFRAMEBUFFERPROC) (GLenum target, GLuint framebuffer); +typedef void (GL_APIENTRYP PFNGLBINDRENDERBUFFERPROC) (GLenum target, GLuint renderbuffer); +typedef void (GL_APIENTRYP PFNGLBINDTEXTUREPROC) (GLenum target, GLuint texture); +typedef void (GL_APIENTRYP PFNGLBLENDCOLORPROC) (GLfloat red, GLfloat green, GLfloat blue, GLfloat alpha); +typedef void (GL_APIENTRYP PFNGLBLENDEQUATIONPROC) (GLenum mode); +typedef void (GL_APIENTRYP PFNGLBLENDEQUATIONSEPARATEPROC) (GLenum modeRGB, GLenum modeAlpha); +typedef void (GL_APIENTRYP PFNGLBLENDFUNCPROC) (GLenum sfactor, GLenum dfactor); +typedef void (GL_APIENTRYP PFNGLBLENDFUNCSEPARATEPROC) (GLenum sfactorRGB, GLenum dfactorRGB, GLenum sfactorAlpha, GLenum dfactorAlpha); +typedef void (GL_APIENTRYP PFNGLBUFFERDATAPROC) (GLenum target, GLsizeiptr size, const void *data, GLenum usage); +typedef void (GL_APIENTRYP PFNGLBUFFERSUBDATAPROC) (GLenum target, GLintptr offset, GLsizeiptr size, const void *data); +typedef GLenum (GL_APIENTRYP PFNGLCHECKFRAMEBUFFERSTATUSPROC) (GLenum target); +typedef void (GL_APIENTRYP PFNGLCLEARPROC) (GLbitfield mask); +typedef void (GL_APIENTRYP PFNGLCLEARCOLORPROC) (GLfloat red, GLfloat green, GLfloat blue, GLfloat alpha); +typedef void (GL_APIENTRYP PFNGLCLEARDEPTHFPROC) (GLfloat d); +typedef void (GL_APIENTRYP PFNGLCLEARSTENCILPROC) (GLint s); +typedef void (GL_APIENTRYP PFNGLCOLORMASKPROC) (GLboolean red, GLboolean green, GLboolean blue, GLboolean alpha); +typedef void (GL_APIENTRYP PFNGLCOMPILESHADERPROC) (GLuint shader); +typedef void (GL_APIENTRYP PFNGLCOMPRESSEDTEXIMAGE2DPROC) (GLenum target, GLint level, GLenum internalformat, GLsizei width, GLsizei height, GLint border, GLsizei imageSize, const void *data); +typedef void (GL_APIENTRYP PFNGLCOMPRESSEDTEXSUBIMAGE2DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const void *data); +typedef void (GL_APIENTRYP PFNGLCOPYTEXIMAGE2DPROC) (GLenum target, GLint level, GLenum internalformat, GLint x, GLint y, GLsizei width, GLsizei height, GLint border); +typedef void (GL_APIENTRYP PFNGLCOPYTEXSUBIMAGE2DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height); +typedef GLuint (GL_APIENTRYP PFNGLCREATEPROGRAMPROC) (void); +typedef GLuint (GL_APIENTRYP PFNGLCREATESHADERPROC) (GLenum type); +typedef void (GL_APIENTRYP PFNGLCULLFACEPROC) (GLenum mode); +typedef void (GL_APIENTRYP PFNGLDELETEBUFFERSPROC) (GLsizei n, const GLuint *buffers); +typedef void (GL_APIENTRYP PFNGLDELETEFRAMEBUFFERSPROC) (GLsizei n, const GLuint *framebuffers); +typedef void (GL_APIENTRYP PFNGLDELETEPROGRAMPROC) (GLuint program); +typedef void (GL_APIENTRYP PFNGLDELETERENDERBUFFERSPROC) (GLsizei n, const GLuint *renderbuffers); +typedef void (GL_APIENTRYP PFNGLDELETESHADERPROC) (GLuint shader); +typedef void (GL_APIENTRYP PFNGLDELETETEXTURESPROC) (GLsizei n, const GLuint *textures); +typedef void (GL_APIENTRYP PFNGLDEPTHFUNCPROC) (GLenum func); +typedef void (GL_APIENTRYP PFNGLDEPTHMASKPROC) (GLboolean flag); +typedef void (GL_APIENTRYP PFNGLDEPTHRANGEFPROC) (GLfloat n, GLfloat f); +typedef void (GL_APIENTRYP PFNGLDETACHSHADERPROC) (GLuint program, GLuint shader); +typedef void (GL_APIENTRYP PFNGLDISABLEPROC) (GLenum cap); +typedef void (GL_APIENTRYP PFNGLDISABLEVERTEXATTRIBARRAYPROC) (GLuint index); +typedef void (GL_APIENTRYP PFNGLDRAWARRAYSPROC) (GLenum mode, GLint first, GLsizei count); +typedef void (GL_APIENTRYP PFNGLDRAWELEMENTSPROC) (GLenum mode, GLsizei count, GLenum type, const void *indices); +typedef void (GL_APIENTRYP PFNGLENABLEPROC) (GLenum cap); +typedef void (GL_APIENTRYP PFNGLENABLEVERTEXATTRIBARRAYPROC) (GLuint index); +typedef void (GL_APIENTRYP PFNGLFINISHPROC) (void); +typedef void (GL_APIENTRYP PFNGLFLUSHPROC) (void); +typedef void (GL_APIENTRYP PFNGLFRAMEBUFFERRENDERBUFFERPROC) (GLenum target, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer); +typedef void (GL_APIENTRYP PFNGLFRAMEBUFFERTEXTURE2DPROC) (GLenum target, GLenum attachment, GLenum textarget, GLuint texture, GLint level); +typedef void (GL_APIENTRYP PFNGLFRONTFACEPROC) (GLenum mode); +typedef void (GL_APIENTRYP PFNGLGENBUFFERSPROC) (GLsizei n, GLuint *buffers); +typedef void (GL_APIENTRYP PFNGLGENERATEMIPMAPPROC) (GLenum target); +typedef void (GL_APIENTRYP PFNGLGENFRAMEBUFFERSPROC) (GLsizei n, GLuint *framebuffers); +typedef void (GL_APIENTRYP PFNGLGENRENDERBUFFERSPROC) (GLsizei n, GLuint *renderbuffers); +typedef void (GL_APIENTRYP PFNGLGENTEXTURESPROC) (GLsizei n, GLuint *textures); +typedef void (GL_APIENTRYP PFNGLGETACTIVEATTRIBPROC) (GLuint program, GLuint index, GLsizei bufSize, GLsizei *length, GLint *size, GLenum *type, GLchar *name); +typedef void (GL_APIENTRYP PFNGLGETACTIVEUNIFORMPROC) (GLuint program, GLuint index, GLsizei bufSize, GLsizei *length, GLint *size, GLenum *type, GLchar *name); +typedef void (GL_APIENTRYP PFNGLGETATTACHEDSHADERSPROC) (GLuint program, GLsizei maxCount, GLsizei *count, GLuint *shaders); +typedef GLint (GL_APIENTRYP PFNGLGETATTRIBLOCATIONPROC) (GLuint program, const GLchar *name); +typedef void (GL_APIENTRYP PFNGLGETBOOLEANVPROC) (GLenum pname, GLboolean *data); +typedef void (GL_APIENTRYP PFNGLGETBUFFERPARAMETERIVPROC) (GLenum target, GLenum pname, GLint *params); +typedef GLenum (GL_APIENTRYP PFNGLGETERRORPROC) (void); +typedef void (GL_APIENTRYP PFNGLGETFLOATVPROC) (GLenum pname, GLfloat *data); +typedef void (GL_APIENTRYP PFNGLGETFRAMEBUFFERATTACHMENTPARAMETERIVPROC) (GLenum target, GLenum attachment, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETINTEGERVPROC) (GLenum pname, GLint *data); +typedef void (GL_APIENTRYP PFNGLGETPROGRAMIVPROC) (GLuint program, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETPROGRAMINFOLOGPROC) (GLuint program, GLsizei bufSize, GLsizei *length, GLchar *infoLog); +typedef void (GL_APIENTRYP PFNGLGETRENDERBUFFERPARAMETERIVPROC) (GLenum target, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETSHADERIVPROC) (GLuint shader, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETSHADERINFOLOGPROC) (GLuint shader, GLsizei bufSize, GLsizei *length, GLchar *infoLog); +typedef void (GL_APIENTRYP PFNGLGETSHADERPRECISIONFORMATPROC) (GLenum shadertype, GLenum precisiontype, GLint *range, GLint *precision); +typedef void (GL_APIENTRYP PFNGLGETSHADERSOURCEPROC) (GLuint shader, GLsizei bufSize, GLsizei *length, GLchar *source); +typedef const GLubyte *(GL_APIENTRYP PFNGLGETSTRINGPROC) (GLenum name); +typedef void (GL_APIENTRYP PFNGLGETTEXPARAMETERFVPROC) (GLenum target, GLenum pname, GLfloat *params); +typedef void (GL_APIENTRYP PFNGLGETTEXPARAMETERIVPROC) (GLenum target, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETUNIFORMFVPROC) (GLuint program, GLint location, GLfloat *params); +typedef void (GL_APIENTRYP PFNGLGETUNIFORMIVPROC) (GLuint program, GLint location, GLint *params); +typedef GLint (GL_APIENTRYP PFNGLGETUNIFORMLOCATIONPROC) (GLuint program, const GLchar *name); +typedef void (GL_APIENTRYP PFNGLGETVERTEXATTRIBFVPROC) (GLuint index, GLenum pname, GLfloat *params); +typedef void (GL_APIENTRYP PFNGLGETVERTEXATTRIBIVPROC) (GLuint index, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETVERTEXATTRIBPOINTERVPROC) (GLuint index, GLenum pname, void **pointer); +typedef void (GL_APIENTRYP PFNGLHINTPROC) (GLenum target, GLenum mode); +typedef GLboolean (GL_APIENTRYP PFNGLISBUFFERPROC) (GLuint buffer); +typedef GLboolean (GL_APIENTRYP PFNGLISENABLEDPROC) (GLenum cap); +typedef GLboolean (GL_APIENTRYP PFNGLISFRAMEBUFFERPROC) (GLuint framebuffer); +typedef GLboolean (GL_APIENTRYP PFNGLISPROGRAMPROC) (GLuint program); +typedef GLboolean (GL_APIENTRYP PFNGLISRENDERBUFFERPROC) (GLuint renderbuffer); +typedef GLboolean (GL_APIENTRYP PFNGLISSHADERPROC) (GLuint shader); +typedef GLboolean (GL_APIENTRYP PFNGLISTEXTUREPROC) (GLuint texture); +typedef void (GL_APIENTRYP PFNGLLINEWIDTHPROC) (GLfloat width); +typedef void (GL_APIENTRYP PFNGLLINKPROGRAMPROC) (GLuint program); +typedef void (GL_APIENTRYP PFNGLPIXELSTOREIPROC) (GLenum pname, GLint param); +typedef void (GL_APIENTRYP PFNGLPOLYGONOFFSETPROC) (GLfloat factor, GLfloat units); +typedef void (GL_APIENTRYP PFNGLREADPIXELSPROC) (GLint x, GLint y, GLsizei width, GLsizei height, GLenum format, GLenum type, void *pixels); +typedef void (GL_APIENTRYP PFNGLRELEASESHADERCOMPILERPROC) (void); +typedef void (GL_APIENTRYP PFNGLRENDERBUFFERSTORAGEPROC) (GLenum target, GLenum internalformat, GLsizei width, GLsizei height); +typedef void (GL_APIENTRYP PFNGLSAMPLECOVERAGEPROC) (GLfloat value, GLboolean invert); +typedef void (GL_APIENTRYP PFNGLSCISSORPROC) (GLint x, GLint y, GLsizei width, GLsizei height); +typedef void (GL_APIENTRYP PFNGLSHADERBINARYPROC) (GLsizei count, const GLuint *shaders, GLenum binaryformat, const void *binary, GLsizei length); +typedef void (GL_APIENTRYP PFNGLSHADERSOURCEPROC) (GLuint shader, GLsizei count, const GLchar *const*string, const GLint *length); +typedef void (GL_APIENTRYP PFNGLSTENCILFUNCPROC) (GLenum func, GLint ref, GLuint mask); +typedef void (GL_APIENTRYP PFNGLSTENCILFUNCSEPARATEPROC) (GLenum face, GLenum func, GLint ref, GLuint mask); +typedef void (GL_APIENTRYP PFNGLSTENCILMASKPROC) (GLuint mask); +typedef void (GL_APIENTRYP PFNGLSTENCILMASKSEPARATEPROC) (GLenum face, GLuint mask); +typedef void (GL_APIENTRYP PFNGLSTENCILOPPROC) (GLenum fail, GLenum zfail, GLenum zpass); +typedef void (GL_APIENTRYP PFNGLSTENCILOPSEPARATEPROC) (GLenum face, GLenum sfail, GLenum dpfail, GLenum dppass); +typedef void (GL_APIENTRYP PFNGLTEXIMAGE2DPROC) (GLenum target, GLint level, GLint internalformat, GLsizei width, GLsizei height, GLint border, GLenum format, GLenum type, const void *pixels); +typedef void (GL_APIENTRYP PFNGLTEXPARAMETERFPROC) (GLenum target, GLenum pname, GLfloat param); +typedef void (GL_APIENTRYP PFNGLTEXPARAMETERFVPROC) (GLenum target, GLenum pname, const GLfloat *params); +typedef void (GL_APIENTRYP PFNGLTEXPARAMETERIPROC) (GLenum target, GLenum pname, GLint param); +typedef void (GL_APIENTRYP PFNGLTEXPARAMETERIVPROC) (GLenum target, GLenum pname, const GLint *params); +typedef void (GL_APIENTRYP PFNGLTEXSUBIMAGE2DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const void *pixels); +typedef void (GL_APIENTRYP PFNGLUNIFORM1FPROC) (GLint location, GLfloat v0); +typedef void (GL_APIENTRYP PFNGLUNIFORM1FVPROC) (GLint location, GLsizei count, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM1IPROC) (GLint location, GLint v0); +typedef void (GL_APIENTRYP PFNGLUNIFORM1IVPROC) (GLint location, GLsizei count, const GLint *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM2FPROC) (GLint location, GLfloat v0, GLfloat v1); +typedef void (GL_APIENTRYP PFNGLUNIFORM2FVPROC) (GLint location, GLsizei count, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM2IPROC) (GLint location, GLint v0, GLint v1); +typedef void (GL_APIENTRYP PFNGLUNIFORM2IVPROC) (GLint location, GLsizei count, const GLint *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM3FPROC) (GLint location, GLfloat v0, GLfloat v1, GLfloat v2); +typedef void (GL_APIENTRYP PFNGLUNIFORM3FVPROC) (GLint location, GLsizei count, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM3IPROC) (GLint location, GLint v0, GLint v1, GLint v2); +typedef void (GL_APIENTRYP PFNGLUNIFORM3IVPROC) (GLint location, GLsizei count, const GLint *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM4FPROC) (GLint location, GLfloat v0, GLfloat v1, GLfloat v2, GLfloat v3); +typedef void (GL_APIENTRYP PFNGLUNIFORM4FVPROC) (GLint location, GLsizei count, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM4IPROC) (GLint location, GLint v0, GLint v1, GLint v2, GLint v3); +typedef void (GL_APIENTRYP PFNGLUNIFORM4IVPROC) (GLint location, GLsizei count, const GLint *value); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX2FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX3FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX4FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUSEPROGRAMPROC) (GLuint program); +typedef void (GL_APIENTRYP PFNGLVALIDATEPROGRAMPROC) (GLuint program); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB1FPROC) (GLuint index, GLfloat x); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB1FVPROC) (GLuint index, const GLfloat *v); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB2FPROC) (GLuint index, GLfloat x, GLfloat y); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB2FVPROC) (GLuint index, const GLfloat *v); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB3FPROC) (GLuint index, GLfloat x, GLfloat y, GLfloat z); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB3FVPROC) (GLuint index, const GLfloat *v); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB4FPROC) (GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIB4FVPROC) (GLuint index, const GLfloat *v); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBPOINTERPROC) (GLuint index, GLint size, GLenum type, GLboolean normalized, GLsizei stride, const void *pointer); +typedef void (GL_APIENTRYP PFNGLVIEWPORTPROC) (GLint x, GLint y, GLsizei width, GLsizei height); GL_APICALL void GL_APIENTRY glActiveTexture (GLenum texture); GL_APICALL void GL_APIENTRY glAttachShader (GLuint program, GLuint shader); GL_APICALL void GL_APIENTRY glBindAttribLocation (GLuint program, GLuint index, const GLchar *name); @@ -705,6 +851,22 @@ #define GL_COLOR_ATTACHMENT13 0x8CED #define GL_COLOR_ATTACHMENT14 0x8CEE #define GL_COLOR_ATTACHMENT15 0x8CEF +#define GL_COLOR_ATTACHMENT16 0x8CF0 +#define GL_COLOR_ATTACHMENT17 0x8CF1 +#define GL_COLOR_ATTACHMENT18 0x8CF2 +#define GL_COLOR_ATTACHMENT19 0x8CF3 +#define GL_COLOR_ATTACHMENT20 0x8CF4 +#define GL_COLOR_ATTACHMENT21 0x8CF5 +#define GL_COLOR_ATTACHMENT22 0x8CF6 +#define GL_COLOR_ATTACHMENT23 0x8CF7 +#define GL_COLOR_ATTACHMENT24 0x8CF8 +#define GL_COLOR_ATTACHMENT25 0x8CF9 +#define GL_COLOR_ATTACHMENT26 0x8CFA +#define GL_COLOR_ATTACHMENT27 0x8CFB +#define GL_COLOR_ATTACHMENT28 0x8CFC +#define GL_COLOR_ATTACHMENT29 0x8CFD +#define GL_COLOR_ATTACHMENT30 0x8CFE +#define GL_COLOR_ATTACHMENT31 0x8CFF #define GL_FRAMEBUFFER_INCOMPLETE_MULTISAMPLE 0x8D56 #define GL_MAX_SAMPLES 0x8D57 #define GL_HALF_FLOAT 0x140B @@ -826,7 +988,111 @@ #define GL_MAX_ELEMENT_INDEX 0x8D6B #define GL_NUM_SAMPLE_COUNTS 0x9380 #define GL_TEXTURE_IMMUTABLE_LEVELS 0x82DF -GL_APICALL void GL_APIENTRY glReadBuffer (GLenum mode); +typedef void (GL_APIENTRYP PFNGLREADBUFFERPROC) (GLenum src); +typedef void (GL_APIENTRYP PFNGLDRAWRANGEELEMENTSPROC) (GLenum mode, GLuint start, GLuint end, GLsizei count, GLenum type, const void *indices); +typedef void (GL_APIENTRYP PFNGLTEXIMAGE3DPROC) (GLenum target, GLint level, GLint internalformat, GLsizei width, GLsizei height, GLsizei depth, GLint border, GLenum format, GLenum type, const void *pixels); +typedef void (GL_APIENTRYP PFNGLTEXSUBIMAGE3DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const void *pixels); +typedef void (GL_APIENTRYP PFNGLCOPYTEXSUBIMAGE3DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height); +typedef void (GL_APIENTRYP PFNGLCOMPRESSEDTEXIMAGE3DPROC) (GLenum target, GLint level, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLint border, GLsizei imageSize, const void *data); +typedef void (GL_APIENTRYP PFNGLCOMPRESSEDTEXSUBIMAGE3DPROC) (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const void *data); +typedef void (GL_APIENTRYP PFNGLGENQUERIESPROC) (GLsizei n, GLuint *ids); +typedef void (GL_APIENTRYP PFNGLDELETEQUERIESPROC) (GLsizei n, const GLuint *ids); +typedef GLboolean (GL_APIENTRYP PFNGLISQUERYPROC) (GLuint id); +typedef void (GL_APIENTRYP PFNGLBEGINQUERYPROC) (GLenum target, GLuint id); +typedef void (GL_APIENTRYP PFNGLENDQUERYPROC) (GLenum target); +typedef void (GL_APIENTRYP PFNGLGETQUERYIVPROC) (GLenum target, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETQUERYOBJECTUIVPROC) (GLuint id, GLenum pname, GLuint *params); +typedef GLboolean (GL_APIENTRYP PFNGLUNMAPBUFFERPROC) (GLenum target); +typedef void (GL_APIENTRYP PFNGLGETBUFFERPOINTERVPROC) (GLenum target, GLenum pname, void **params); +typedef void (GL_APIENTRYP PFNGLDRAWBUFFERSPROC) (GLsizei n, const GLenum *bufs); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX2X3FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX3X2FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX2X4FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX4X2FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX3X4FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLUNIFORMMATRIX4X3FVPROC) (GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLBLITFRAMEBUFFERPROC) (GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter); +typedef void (GL_APIENTRYP PFNGLRENDERBUFFERSTORAGEMULTISAMPLEPROC) (GLenum target, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height); +typedef void (GL_APIENTRYP PFNGLFRAMEBUFFERTEXTURELAYERPROC) (GLenum target, GLenum attachment, GLuint texture, GLint level, GLint layer); +typedef void *(GL_APIENTRYP PFNGLMAPBUFFERRANGEPROC) (GLenum target, GLintptr offset, GLsizeiptr length, GLbitfield access); +typedef void (GL_APIENTRYP PFNGLFLUSHMAPPEDBUFFERRANGEPROC) (GLenum target, GLintptr offset, GLsizeiptr length); +typedef void (GL_APIENTRYP PFNGLBINDVERTEXARRAYPROC) (GLuint array); +typedef void (GL_APIENTRYP PFNGLDELETEVERTEXARRAYSPROC) (GLsizei n, const GLuint *arrays); +typedef void (GL_APIENTRYP PFNGLGENVERTEXARRAYSPROC) (GLsizei n, GLuint *arrays); +typedef GLboolean (GL_APIENTRYP PFNGLISVERTEXARRAYPROC) (GLuint array); +typedef void (GL_APIENTRYP PFNGLGETINTEGERI_VPROC) (GLenum target, GLuint index, GLint *data); +typedef void (GL_APIENTRYP PFNGLBEGINTRANSFORMFEEDBACKPROC) (GLenum primitiveMode); +typedef void (GL_APIENTRYP PFNGLENDTRANSFORMFEEDBACKPROC) (void); +typedef void (GL_APIENTRYP PFNGLBINDBUFFERRANGEPROC) (GLenum target, GLuint index, GLuint buffer, GLintptr offset, GLsizeiptr size); +typedef void (GL_APIENTRYP PFNGLBINDBUFFERBASEPROC) (GLenum target, GLuint index, GLuint buffer); +typedef void (GL_APIENTRYP PFNGLTRANSFORMFEEDBACKVARYINGSPROC) (GLuint program, GLsizei count, const GLchar *const*varyings, GLenum bufferMode); +typedef void (GL_APIENTRYP PFNGLGETTRANSFORMFEEDBACKVARYINGPROC) (GLuint program, GLuint index, GLsizei bufSize, GLsizei *length, GLsizei *size, GLenum *type, GLchar *name); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBIPOINTERPROC) (GLuint index, GLint size, GLenum type, GLsizei stride, const void *pointer); +typedef void (GL_APIENTRYP PFNGLGETVERTEXATTRIBIIVPROC) (GLuint index, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETVERTEXATTRIBIUIVPROC) (GLuint index, GLenum pname, GLuint *params); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBI4IPROC) (GLuint index, GLint x, GLint y, GLint z, GLint w); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBI4UIPROC) (GLuint index, GLuint x, GLuint y, GLuint z, GLuint w); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBI4IVPROC) (GLuint index, const GLint *v); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBI4UIVPROC) (GLuint index, const GLuint *v); +typedef void (GL_APIENTRYP PFNGLGETUNIFORMUIVPROC) (GLuint program, GLint location, GLuint *params); +typedef GLint (GL_APIENTRYP PFNGLGETFRAGDATALOCATIONPROC) (GLuint program, const GLchar *name); +typedef void (GL_APIENTRYP PFNGLUNIFORM1UIPROC) (GLint location, GLuint v0); +typedef void (GL_APIENTRYP PFNGLUNIFORM2UIPROC) (GLint location, GLuint v0, GLuint v1); +typedef void (GL_APIENTRYP PFNGLUNIFORM3UIPROC) (GLint location, GLuint v0, GLuint v1, GLuint v2); +typedef void (GL_APIENTRYP PFNGLUNIFORM4UIPROC) (GLint location, GLuint v0, GLuint v1, GLuint v2, GLuint v3); +typedef void (GL_APIENTRYP PFNGLUNIFORM1UIVPROC) (GLint location, GLsizei count, const GLuint *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM2UIVPROC) (GLint location, GLsizei count, const GLuint *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM3UIVPROC) (GLint location, GLsizei count, const GLuint *value); +typedef void (GL_APIENTRYP PFNGLUNIFORM4UIVPROC) (GLint location, GLsizei count, const GLuint *value); +typedef void (GL_APIENTRYP PFNGLCLEARBUFFERIVPROC) (GLenum buffer, GLint drawbuffer, const GLint *value); +typedef void (GL_APIENTRYP PFNGLCLEARBUFFERUIVPROC) (GLenum buffer, GLint drawbuffer, const GLuint *value); +typedef void (GL_APIENTRYP PFNGLCLEARBUFFERFVPROC) (GLenum buffer, GLint drawbuffer, const GLfloat *value); +typedef void (GL_APIENTRYP PFNGLCLEARBUFFERFIPROC) (GLenum buffer, GLint drawbuffer, GLfloat depth, GLint stencil); +typedef const GLubyte *(GL_APIENTRYP PFNGLGETSTRINGIPROC) (GLenum name, GLuint index); +typedef void (GL_APIENTRYP PFNGLCOPYBUFFERSUBDATAPROC) (GLenum readTarget, GLenum writeTarget, GLintptr readOffset, GLintptr writeOffset, GLsizeiptr size); +typedef void (GL_APIENTRYP PFNGLGETUNIFORMINDICESPROC) (GLuint program, GLsizei uniformCount, const GLchar *const*uniformNames, GLuint *uniformIndices); +typedef void (GL_APIENTRYP PFNGLGETACTIVEUNIFORMSIVPROC) (GLuint program, GLsizei uniformCount, const GLuint *uniformIndices, GLenum pname, GLint *params); +typedef GLuint (GL_APIENTRYP PFNGLGETUNIFORMBLOCKINDEXPROC) (GLuint program, const GLchar *uniformBlockName); +typedef void (GL_APIENTRYP PFNGLGETACTIVEUNIFORMBLOCKIVPROC) (GLuint program, GLuint uniformBlockIndex, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETACTIVEUNIFORMBLOCKNAMEPROC) (GLuint program, GLuint uniformBlockIndex, GLsizei bufSize, GLsizei *length, GLchar *uniformBlockName); +typedef void (GL_APIENTRYP PFNGLUNIFORMBLOCKBINDINGPROC) (GLuint program, GLuint uniformBlockIndex, GLuint uniformBlockBinding); +typedef void (GL_APIENTRYP PFNGLDRAWARRAYSINSTANCEDPROC) (GLenum mode, GLint first, GLsizei count, GLsizei instancecount); +typedef void (GL_APIENTRYP PFNGLDRAWELEMENTSINSTANCEDPROC) (GLenum mode, GLsizei count, GLenum type, const void *indices, GLsizei instancecount); +typedef GLsync (GL_APIENTRYP PFNGLFENCESYNCPROC) (GLenum condition, GLbitfield flags); +typedef GLboolean (GL_APIENTRYP PFNGLISSYNCPROC) (GLsync sync); +typedef void (GL_APIENTRYP PFNGLDELETESYNCPROC) (GLsync sync); +typedef GLenum (GL_APIENTRYP PFNGLCLIENTWAITSYNCPROC) (GLsync sync, GLbitfield flags, GLuint64 timeout); +typedef void (GL_APIENTRYP PFNGLWAITSYNCPROC) (GLsync sync, GLbitfield flags, GLuint64 timeout); +typedef void (GL_APIENTRYP PFNGLGETINTEGER64VPROC) (GLenum pname, GLint64 *data); +typedef void (GL_APIENTRYP PFNGLGETSYNCIVPROC) (GLsync sync, GLenum pname, GLsizei bufSize, GLsizei *length, GLint *values); +typedef void (GL_APIENTRYP PFNGLGETINTEGER64I_VPROC) (GLenum target, GLuint index, GLint64 *data); +typedef void (GL_APIENTRYP PFNGLGETBUFFERPARAMETERI64VPROC) (GLenum target, GLenum pname, GLint64 *params); +typedef void (GL_APIENTRYP PFNGLGENSAMPLERSPROC) (GLsizei count, GLuint *samplers); +typedef void (GL_APIENTRYP PFNGLDELETESAMPLERSPROC) (GLsizei count, const GLuint *samplers); +typedef GLboolean (GL_APIENTRYP PFNGLISSAMPLERPROC) (GLuint sampler); +typedef void (GL_APIENTRYP PFNGLBINDSAMPLERPROC) (GLuint unit, GLuint sampler); +typedef void (GL_APIENTRYP PFNGLSAMPLERPARAMETERIPROC) (GLuint sampler, GLenum pname, GLint param); +typedef void (GL_APIENTRYP PFNGLSAMPLERPARAMETERIVPROC) (GLuint sampler, GLenum pname, const GLint *param); +typedef void (GL_APIENTRYP PFNGLSAMPLERPARAMETERFPROC) (GLuint sampler, GLenum pname, GLfloat param); +typedef void (GL_APIENTRYP PFNGLSAMPLERPARAMETERFVPROC) (GLuint sampler, GLenum pname, const GLfloat *param); +typedef void (GL_APIENTRYP PFNGLGETSAMPLERPARAMETERIVPROC) (GLuint sampler, GLenum pname, GLint *params); +typedef void (GL_APIENTRYP PFNGLGETSAMPLERPARAMETERFVPROC) (GLuint sampler, GLenum pname, GLfloat *params); +typedef void (GL_APIENTRYP PFNGLVERTEXATTRIBDIVISORPROC) (GLuint index, GLuint divisor); +typedef void (GL_APIENTRYP PFNGLBINDTRANSFORMFEEDBACKPROC) (GLenum target, GLuint id); +typedef void (GL_APIENTRYP PFNGLDELETETRANSFORMFEEDBACKSPROC) (GLsizei n, const GLuint *ids); +typedef void (GL_APIENTRYP PFNGLGENTRANSFORMFEEDBACKSPROC) (GLsizei n, GLuint *ids); +typedef GLboolean (GL_APIENTRYP PFNGLISTRANSFORMFEEDBACKPROC) (GLuint id); +typedef void (GL_APIENTRYP PFNGLPAUSETRANSFORMFEEDBACKPROC) (void); +typedef void (GL_APIENTRYP PFNGLRESUMETRANSFORMFEEDBACKPROC) (void); +typedef void (GL_APIENTRYP PFNGLGETPROGRAMBINARYPROC) (GLuint program, GLsizei bufSize, GLsizei *length, GLenum *binaryFormat, void *binary); +typedef void (GL_APIENTRYP PFNGLPROGRAMBINARYPROC) (GLuint program, GLenum binaryFormat, const void *binary, GLsizei length); +typedef void (GL_APIENTRYP PFNGLPROGRAMPARAMETERIPROC) (GLuint program, GLenum pname, GLint value); +typedef void (GL_APIENTRYP PFNGLINVALIDATEFRAMEBUFFERPROC) (GLenum target, GLsizei numAttachments, const GLenum *attachments); +typedef void (GL_APIENTRYP PFNGLINVALIDATESUBFRAMEBUFFERPROC) (GLenum target, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height); +typedef void (GL_APIENTRYP PFNGLTEXSTORAGE2DPROC) (GLenum target, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height); +typedef void (GL_APIENTRYP PFNGLTEXSTORAGE3DPROC) (GLenum target, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth); +typedef void (GL_APIENTRYP PFNGLGETINTERNALFORMATIVPROC) (GLenum target, GLenum internalformat, GLenum pname, GLsizei bufSize, GLint *params); +GL_APICALL void GL_APIENTRY glReadBuffer (GLenum src); GL_APICALL void GL_APIENTRY glDrawRangeElements (GLenum mode, GLuint start, GLuint end, GLsizei count, GLenum type, const void *indices); GL_APICALL void GL_APIENTRY glTexImage3D (GLenum target, GLint level, GLint internalformat, GLsizei width, GLsizei height, GLsizei depth, GLint border, GLenum format, GLenum type, const void *pixels); GL_APICALL void GL_APIENTRY glTexSubImage3D (GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const void *pixels); diff -Nru mesa-12.0.6/include/pci_ids/i965_pci_ids.h mesa-17.0.7/include/pci_ids/i965_pci_ids.h --- mesa-12.0.6/include/pci_ids/i965_pci_ids.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/include/pci_ids/i965_pci_ids.h 2017-06-01 10:37:10.000000000 +0000 @@ -109,6 +109,10 @@ CHIPSET(0x162B, bdw_gt3, "Intel(R) Iris 6100 (Broadwell GT3)") CHIPSET(0x162D, bdw_gt3, "Intel(R) Broadwell GT3") CHIPSET(0x162E, bdw_gt3, "Intel(R) Broadwell GT3") +CHIPSET(0x22B0, chv, "Intel(R) HD Graphics (Cherrytrail)") +CHIPSET(0x22B1, chv, "Intel(R) HD Graphics XXX (Braswell)") /* Overridden in brw_get_renderer_string */ +CHIPSET(0x22B2, chv, "Intel(R) HD Graphics (Cherryview)") +CHIPSET(0x22B3, chv, "Intel(R) HD Graphics (Cherryview)") CHIPSET(0x1902, skl_gt1, "Intel(R) HD Graphics 510 (Skylake GT1)") CHIPSET(0x1906, skl_gt1, "Intel(R) HD Graphics 510 (Skylake GT1)") CHIPSET(0x190A, skl_gt1, "Intel(R) Skylake GT1") @@ -134,34 +138,30 @@ CHIPSET(0x193A, skl_gt4, "Intel(R) Iris Pro Graphics P580 (Skylake GT4e)") CHIPSET(0x193B, skl_gt4, "Intel(R) Iris Pro Graphics 580 (Skylake GT4e)") CHIPSET(0x193D, skl_gt4, "Intel(R) Iris Pro Graphics P580 (Skylake GT4e)") +CHIPSET(0x0A84, bxt, "Intel(R) HD Graphics (Broxton)") +CHIPSET(0x1A84, bxt, "Intel(R) HD Graphics (Broxton)") +CHIPSET(0x1A85, bxt_2x6, "Intel(R) HD Graphics (Broxton 2x6)") +CHIPSET(0x5A84, bxt, "Intel(R) HD Graphics 505 (Broxton)") +CHIPSET(0x5A85, bxt_2x6, "Intel(R) HD Graphics 500 (Broxton 2x6)") CHIPSET(0x5902, kbl_gt1, "Intel(R) Kabylake GT1") CHIPSET(0x5906, kbl_gt1, "Intel(R) Kabylake GT1") CHIPSET(0x590A, kbl_gt1, "Intel(R) Kabylake GT1") +CHIPSET(0x5908, kbl_gt1, "Intel(R) Kabylake GT1") CHIPSET(0x590B, kbl_gt1, "Intel(R) Kabylake GT1") CHIPSET(0x590E, kbl_gt1, "Intel(R) Kabylake GT1") CHIPSET(0x5913, kbl_gt1_5, "Intel(R) Kabylake GT1.5") CHIPSET(0x5915, kbl_gt1_5, "Intel(R) Kabylake GT1.5") CHIPSET(0x5917, kbl_gt1_5, "Intel(R) Kabylake GT1.5") CHIPSET(0x5912, kbl_gt2, "Intel(R) Kabylake GT2") -CHIPSET(0x5916, kbl_gt2, "Intel(R) Kabylake GT2") +CHIPSET(0x5916, kbl_gt2, "Intel(R) HD Graphics 620 (Kabylake GT2)") CHIPSET(0x591A, kbl_gt2, "Intel(R) Kabylake GT2") CHIPSET(0x591B, kbl_gt2, "Intel(R) Kabylake GT2") CHIPSET(0x591D, kbl_gt2, "Intel(R) Kabylake GT2") -CHIPSET(0x591E, kbl_gt2, "Intel(R) Kabylake GT2") +CHIPSET(0x591E, kbl_gt2, "Intel(R) HD Graphics 615 (Kabylake GT2)") CHIPSET(0x5921, kbl_gt2, "Intel(R) Kabylake GT2F") +CHIPSET(0x5923, kbl_gt3, "Intel(R) Kabylake GT3") CHIPSET(0x5926, kbl_gt3, "Intel(R) Kabylake GT3") -CHIPSET(0x592A, kbl_gt3, "Intel(R) Kabylake GT3") -CHIPSET(0x592B, kbl_gt3, "Intel(R) Kabylake GT3") -CHIPSET(0x5932, kbl_gt4, "Intel(R) Kabylake GT4") -CHIPSET(0x593A, kbl_gt4, "Intel(R) Kabylake GT4") +CHIPSET(0x5927, kbl_gt3, "Intel(R) Kabylake GT3") CHIPSET(0x593B, kbl_gt4, "Intel(R) Kabylake GT4") -CHIPSET(0x593D, kbl_gt4, "Intel(R) Kabylake GT4") -CHIPSET(0x22B0, chv, "Intel(R) HD Graphics (Cherrytrail)") -CHIPSET(0x22B1, chv, "Intel(R) HD Graphics XXX (Braswell)") /* Overridden in brw_get_renderer_string */ -CHIPSET(0x22B2, chv, "Intel(R) HD Graphics (Cherryview)") -CHIPSET(0x22B3, chv, "Intel(R) HD Graphics (Cherryview)") -CHIPSET(0x0A84, bxt, "Intel(R) HD Graphics (Broxton)") -CHIPSET(0x1A84, bxt, "Intel(R) HD Graphics (Broxton)") -CHIPSET(0x1A85, bxt_2x6, "Intel(R) HD Graphics (Broxton 2x6)") -CHIPSET(0x5A84, bxt, "Intel(R) HD Graphics (Broxton)") -CHIPSET(0x5A85, bxt_2x6, "Intel(R) HD Graphics (Broxton 2x6)") +CHIPSET(0x3184, glk, "Intel(R) HD Graphics (Geminilake)") +CHIPSET(0x3185, glk_2x6, "Intel(R) HD Graphics (Geminilake 2x6)") diff -Nru mesa-12.0.6/include/pci_ids/radeonsi_pci_ids.h mesa-17.0.7/include/pci_ids/radeonsi_pci_ids.h --- mesa-12.0.6/include/pci_ids/radeonsi_pci_ids.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/include/pci_ids/radeonsi_pci_ids.h 2017-06-01 10:37:10.000000000 +0000 @@ -202,6 +202,15 @@ CHIPSET(0x67CA, POLARIS10_, POLARIS10) CHIPSET(0x67CC, POLARIS10_, POLARIS10) CHIPSET(0x67CF, POLARIS10_, POLARIS10) +CHIPSET(0x67D0, POLARIS10_, POLARIS10) CHIPSET(0x67DF, POLARIS10_, POLARIS10) CHIPSET(0x98E4, STONEY_, STONEY) + +CHIPSET(0x6980, POLARIS12_, POLARIS12) +CHIPSET(0x6981, POLARIS12_, POLARIS12) +CHIPSET(0x6985, POLARIS12_, POLARIS12) +CHIPSET(0x6986, POLARIS12_, POLARIS12) +CHIPSET(0x6987, POLARIS12_, POLARIS12) +CHIPSET(0x6995, POLARIS12_, POLARIS12) +CHIPSET(0x699F, POLARIS12_, POLARIS12) diff -Nru mesa-12.0.6/include/vulkan/vk_icd.h mesa-17.0.7/include/vulkan/vk_icd.h --- mesa-12.0.6/include/vulkan/vk_icd.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/include/vulkan/vk_icd.h 2017-06-01 10:37:10.000000000 +0000 @@ -1,28 +1,56 @@ +// +// File: vk_icd.h +// +/* + * Copyright (c) 2015-2016 The Khronos Group Inc. + * Copyright (c) 2015-2016 Valve Corporation + * Copyright (c) 2015-2016 LunarG, Inc. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + #ifndef VKICD_H #define VKICD_H -#include "vk_platform.h" +#include "vulkan.h" /* + * Loader-ICD version negotiation API + */ +#define CURRENT_LOADER_ICD_INTERFACE_VERSION 3 +#define MIN_SUPPORTED_LOADER_ICD_INTERFACE_VERSION 0 +typedef VkResult (VKAPI_PTR *PFN_vkNegotiateLoaderICDInterfaceVersion)(uint32_t *pVersion); +/* * The ICD must reserve space for a pointer for the loader's dispatch * table, at the start of . * The ICD must initialize this variable using the SET_LOADER_MAGIC_VALUE macro. */ -#define ICD_LOADER_MAGIC 0x01CDC0DE +#define ICD_LOADER_MAGIC 0x01CDC0DE -typedef union _VK_LOADER_DATA { - uintptr_t loaderMagic; - void *loaderData; +typedef union { + uintptr_t loaderMagic; + void *loaderData; } VK_LOADER_DATA; -static inline void set_loader_magic_value(void* pNewObject) { - VK_LOADER_DATA *loader_info = (VK_LOADER_DATA *) pNewObject; +static inline void set_loader_magic_value(void *pNewObject) { + VK_LOADER_DATA *loader_info = (VK_LOADER_DATA *)pNewObject; loader_info->loaderMagic = ICD_LOADER_MAGIC; } -static inline bool valid_loader_magic_value(void* pNewObject) { - const VK_LOADER_DATA *loader_info = (VK_LOADER_DATA *) pNewObject; +static inline bool valid_loader_magic_value(void *pNewObject) { + const VK_LOADER_DATA *loader_info = (VK_LOADER_DATA *)pNewObject; return (loader_info->loaderMagic & 0xffffffff) == ICD_LOADER_MAGIC; } @@ -30,56 +58,74 @@ * Windows and Linux ICDs will treat VkSurfaceKHR as a pointer to a struct that * contains the platform-specific connection and surface information. */ -typedef enum _VkIcdWsiPlatform { +typedef enum { VK_ICD_WSI_PLATFORM_MIR, VK_ICD_WSI_PLATFORM_WAYLAND, VK_ICD_WSI_PLATFORM_WIN32, VK_ICD_WSI_PLATFORM_XCB, VK_ICD_WSI_PLATFORM_XLIB, + VK_ICD_WSI_PLATFORM_DISPLAY } VkIcdWsiPlatform; -typedef struct _VkIcdSurfaceBase { - VkIcdWsiPlatform platform; +typedef struct { + VkIcdWsiPlatform platform; } VkIcdSurfaceBase; #ifdef VK_USE_PLATFORM_MIR_KHR -typedef struct _VkIcdSurfaceMir { - VkIcdSurfaceBase base; - MirConnection* connection; - MirSurface* mirSurface; +typedef struct { + VkIcdSurfaceBase base; + MirConnection *connection; + MirSurface *mirSurface; } VkIcdSurfaceMir; #endif // VK_USE_PLATFORM_MIR_KHR #ifdef VK_USE_PLATFORM_WAYLAND_KHR -typedef struct _VkIcdSurfaceWayland { - VkIcdSurfaceBase base; - struct wl_display* display; - struct wl_surface* surface; +typedef struct { + VkIcdSurfaceBase base; + struct wl_display *display; + struct wl_surface *surface; } VkIcdSurfaceWayland; #endif // VK_USE_PLATFORM_WAYLAND_KHR #ifdef VK_USE_PLATFORM_WIN32_KHR -typedef struct _VkIcdSurfaceWin32 { - VkIcdSurfaceBase base; - HINSTANCE hinstance; - HWND hwnd; +typedef struct { + VkIcdSurfaceBase base; + HINSTANCE hinstance; + HWND hwnd; } VkIcdSurfaceWin32; #endif // VK_USE_PLATFORM_WIN32_KHR #ifdef VK_USE_PLATFORM_XCB_KHR -typedef struct _VkIcdSurfaceXcb { - VkIcdSurfaceBase base; - xcb_connection_t* connection; - xcb_window_t window; +typedef struct { + VkIcdSurfaceBase base; + xcb_connection_t *connection; + xcb_window_t window; } VkIcdSurfaceXcb; #endif // VK_USE_PLATFORM_XCB_KHR #ifdef VK_USE_PLATFORM_XLIB_KHR -typedef struct _VkIcdSurfaceXlib { - VkIcdSurfaceBase base; - Display* dpy; - Window window; +typedef struct { + VkIcdSurfaceBase base; + Display *dpy; + Window window; } VkIcdSurfaceXlib; #endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_ANDROID_KHR +typedef struct { + ANativeWindow* window; +} VkIcdSurfaceAndroid; +#endif //VK_USE_PLATFORM_ANDROID_KHR + +typedef struct { + VkIcdSurfaceBase base; + VkDisplayModeKHR displayMode; + uint32_t planeIndex; + uint32_t planeStackIndex; + VkSurfaceTransformFlagBitsKHR transform; + float globalAlpha; + VkDisplayPlaneAlphaFlagBitsKHR alphaMode; + VkExtent2D imageExtent; +} VkIcdSurfaceDisplay; + #endif // VKICD_H diff -Nru mesa-12.0.6/include/vulkan/vk_platform.h mesa-17.0.7/include/vulkan/vk_platform.h --- mesa-12.0.6/include/vulkan/vk_platform.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/include/vulkan/vk_platform.h 2017-06-01 10:37:10.000000000 +0000 @@ -2,26 +2,19 @@ // File: vk_platform.h // /* -** Copyright (c) 2014-2015 The Khronos Group Inc. +** Copyright (c) 2014-2017 The Khronos Group Inc. ** -** Permission is hereby granted, free of charge, to any person obtaining a -** copy of this software and/or associated documentation files (the -** "Materials"), to deal in the Materials without restriction, including -** without limitation the rights to use, copy, modify, merge, publish, -** distribute, sublicense, and/or sell copies of the Materials, and to -** permit persons to whom the Materials are furnished to do so, subject to -** the following conditions: +** Licensed under the Apache License, Version 2.0 (the "License"); +** you may not use this file except in compliance with the License. +** You may obtain a copy of the License at ** -** The above copyright notice and this permission notice shall be included -** in all copies or substantial portions of the Materials. +** http://www.apache.org/licenses/LICENSE-2.0 ** -** THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF -** MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. -** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY -** CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, -** TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE -** MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. +** Unless required by applicable law or agreed to in writing, software +** distributed under the License is distributed on an "AS IS" BASIS, +** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +** See the License for the specific language governing permissions and +** limitations under the License. */ @@ -58,13 +51,13 @@ #define VKAPI_ATTR #define VKAPI_CALL __stdcall #define VKAPI_PTR VKAPI_CALL -#elif defined(__ANDROID__) && defined(__ARM_EABI__) && !defined(__ARM_ARCH_7A__) - // Android does not support Vulkan in native code using the "armeabi" ABI. - #error "Vulkan requires the 'armeabi-v7a' or 'armeabi-v7a-hard' ABI on 32-bit ARM CPUs" -#elif defined(__ANDROID__) && defined(__ARM_ARCH_7A__) - // On Android/ARMv7a, Vulkan functions use the armeabi-v7a-hard calling - // convention, even if the application's native code is compiled with the - // armeabi-v7a calling convention. +#elif defined(__ANDROID__) && defined(__ARM_ARCH) && __ARM_ARCH < 7 + #error "Vulkan isn't supported for the 'armeabi' NDK ABI" +#elif defined(__ANDROID__) && defined(__ARM_ARCH) && __ARM_ARCH >= 7 && defined(__ARM_32BIT_STATE) + // On Android 32-bit ARM targets, Vulkan functions use the "hardfloat" + // calling convention, i.e. float parameters are passed in registers. This + // is true even if the rest of the application passes floats on the stack, + // as it does by default when compiling for the armeabi-v7a NDK ABI. #define VKAPI_ATTR __attribute__((pcs("aapcs-vfp"))) #define VKAPI_CALL #define VKAPI_PTR VKAPI_ATTR diff -Nru mesa-12.0.6/include/vulkan/vulkan.h mesa-17.0.7/include/vulkan/vulkan.h --- mesa-12.0.6/include/vulkan/vulkan.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/include/vulkan/vulkan.h 2017-06-01 10:37:10.000000000 +0000 @@ -8,24 +8,17 @@ /* ** Copyright (c) 2015-2016 The Khronos Group Inc. ** -** Permission is hereby granted, free of charge, to any person obtaining a -** copy of this software and/or associated documentation files (the -** "Materials"), to deal in the Materials without restriction, including -** without limitation the rights to use, copy, modify, merge, publish, -** distribute, sublicense, and/or sell copies of the Materials, and to -** permit persons to whom the Materials are furnished to do so, subject to -** the following conditions: +** Licensed under the Apache License, Version 2.0 (the "License"); +** you may not use this file except in compliance with the License. +** You may obtain a copy of the License at ** -** The above copyright notice and this permission notice shall be included -** in all copies or substantial portions of the Materials. +** http://www.apache.org/licenses/LICENSE-2.0 ** -** THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF -** MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. -** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY -** CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, -** TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE -** MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. +** Unless required by applicable law or agreed to in writing, software +** distributed under the License is distributed on an "AS IS" BASIS, +** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +** See the License for the specific language governing permissions and +** limitations under the License. */ /* @@ -50,7 +43,7 @@ #define VK_VERSION_MINOR(version) (((uint32_t)(version) >> 12) & 0x3ff) #define VK_VERSION_PATCH(version) ((uint32_t)(version) & 0xfff) // Version of this file -#define VK_HEADER_VERSION 6 +#define VK_HEADER_VERSION 38 #define VK_NULL_HANDLE 0 @@ -60,11 +53,13 @@ #define VK_DEFINE_HANDLE(object) typedef struct object##_T* object; -#if defined(__LP64__) || defined(_WIN64) || defined(__x86_64__) || defined(_M_X64) || defined(__ia64) || defined (_M_IA64) || defined(__aarch64__) || defined(__powerpc64__) +#if !defined(VK_DEFINE_NON_DISPATCHABLE_HANDLE) +#if defined(__LP64__) || defined(_WIN64) || (defined(__x86_64__) && !defined(__ILP32__) ) || defined(_M_X64) || defined(__ia64) || defined (_M_IA64) || defined(__aarch64__) || defined(__powerpc64__) #define VK_DEFINE_NON_DISPATCHABLE_HANDLE(object) typedef struct object##_T *object; #else #define VK_DEFINE_NON_DISPATCHABLE_HANDLE(object) typedef uint64_t object; #endif +#endif @@ -142,6 +137,7 @@ VK_ERROR_INCOMPATIBLE_DRIVER = -9, VK_ERROR_TOO_MANY_OBJECTS = -10, VK_ERROR_FORMAT_NOT_SUPPORTED = -11, + VK_ERROR_FRAGMENTED_POOL = -12, VK_ERROR_SURFACE_LOST_KHR = -1000000000, VK_ERROR_NATIVE_WINDOW_IN_USE_KHR = -1000000001, VK_SUBOPTIMAL_KHR = 1000001003, @@ -149,9 +145,9 @@ VK_ERROR_INCOMPATIBLE_DISPLAY_KHR = -1000003001, VK_ERROR_VALIDATION_FAILED_EXT = -1000011001, VK_ERROR_INVALID_SHADER_NV = -1000012000, - VK_RESULT_BEGIN_RANGE = VK_ERROR_FORMAT_NOT_SUPPORTED, + VK_RESULT_BEGIN_RANGE = VK_ERROR_FRAGMENTED_POOL, VK_RESULT_END_RANGE = VK_INCOMPLETE, - VK_RESULT_RANGE_SIZE = (VK_INCOMPLETE - VK_ERROR_FORMAT_NOT_SUPPORTED + 1), + VK_RESULT_RANGE_SIZE = (VK_INCOMPLETE - VK_ERROR_FRAGMENTED_POOL + 1), VK_RESULT_MAX_ENUM = 0x7FFFFFFF } VkResult; @@ -217,6 +213,25 @@ VK_STRUCTURE_TYPE_ANDROID_SURFACE_CREATE_INFO_KHR = 1000008000, VK_STRUCTURE_TYPE_WIN32_SURFACE_CREATE_INFO_KHR = 1000009000, VK_STRUCTURE_TYPE_DEBUG_REPORT_CALLBACK_CREATE_INFO_EXT = 1000011000, + VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_RASTERIZATION_ORDER_AMD = 1000018000, + VK_STRUCTURE_TYPE_DEBUG_MARKER_OBJECT_NAME_INFO_EXT = 1000022000, + VK_STRUCTURE_TYPE_DEBUG_MARKER_OBJECT_TAG_INFO_EXT = 1000022001, + VK_STRUCTURE_TYPE_DEBUG_MARKER_MARKER_INFO_EXT = 1000022002, + VK_STRUCTURE_TYPE_DEDICATED_ALLOCATION_IMAGE_CREATE_INFO_NV = 1000026000, + VK_STRUCTURE_TYPE_DEDICATED_ALLOCATION_BUFFER_CREATE_INFO_NV = 1000026001, + VK_STRUCTURE_TYPE_DEDICATED_ALLOCATION_MEMORY_ALLOCATE_INFO_NV = 1000026002, + VK_STRUCTURE_TYPE_EXTERNAL_MEMORY_IMAGE_CREATE_INFO_NV = 1000056000, + VK_STRUCTURE_TYPE_EXPORT_MEMORY_ALLOCATE_INFO_NV = 1000056001, + VK_STRUCTURE_TYPE_IMPORT_MEMORY_WIN32_HANDLE_INFO_NV = 1000057000, + VK_STRUCTURE_TYPE_EXPORT_MEMORY_WIN32_HANDLE_INFO_NV = 1000057001, + VK_STRUCTURE_TYPE_WIN32_KEYED_MUTEX_ACQUIRE_RELEASE_INFO_NV = 1000058000, + VK_STRUCTURE_TYPE_VALIDATION_FLAGS_EXT = 1000061000, + VK_STRUCTURE_TYPE_OBJECT_TABLE_CREATE_INFO_NVX = 1000086000, + VK_STRUCTURE_TYPE_INDIRECT_COMMANDS_LAYOUT_CREATE_INFO_NVX = 1000086001, + VK_STRUCTURE_TYPE_CMD_PROCESS_COMMANDS_INFO_NVX = 1000086002, + VK_STRUCTURE_TYPE_CMD_RESERVE_SPACE_FOR_COMMANDS_INFO_NVX = 1000086003, + VK_STRUCTURE_TYPE_DEVICE_GENERATED_COMMANDS_LIMITS_NVX = 1000086004, + VK_STRUCTURE_TYPE_DEVICE_GENERATED_COMMANDS_FEATURES_NVX = 1000086005, VK_STRUCTURE_TYPE_BEGIN_RANGE = VK_STRUCTURE_TYPE_APPLICATION_INFO, VK_STRUCTURE_TYPE_END_RANGE = VK_STRUCTURE_TYPE_LOADER_DEVICE_CREATE_INFO, VK_STRUCTURE_TYPE_RANGE_SIZE = (VK_STRUCTURE_TYPE_LOADER_DEVICE_CREATE_INFO - VK_STRUCTURE_TYPE_APPLICATION_INFO + 1), @@ -429,6 +444,14 @@ VK_FORMAT_ASTC_12x10_SRGB_BLOCK = 182, VK_FORMAT_ASTC_12x12_UNORM_BLOCK = 183, VK_FORMAT_ASTC_12x12_SRGB_BLOCK = 184, + VK_FORMAT_PVRTC1_2BPP_UNORM_BLOCK_IMG = 1000054000, + VK_FORMAT_PVRTC1_4BPP_UNORM_BLOCK_IMG = 1000054001, + VK_FORMAT_PVRTC2_2BPP_UNORM_BLOCK_IMG = 1000054002, + VK_FORMAT_PVRTC2_4BPP_UNORM_BLOCK_IMG = 1000054003, + VK_FORMAT_PVRTC1_2BPP_SRGB_BLOCK_IMG = 1000054004, + VK_FORMAT_PVRTC1_4BPP_SRGB_BLOCK_IMG = 1000054005, + VK_FORMAT_PVRTC2_2BPP_SRGB_BLOCK_IMG = 1000054006, + VK_FORMAT_PVRTC2_4BPP_SRGB_BLOCK_IMG = 1000054007, VK_FORMAT_BEGIN_RANGE = VK_FORMAT_UNDEFINED, VK_FORMAT_END_RANGE = VK_FORMAT_ASTC_12x12_SRGB_BLOCK, VK_FORMAT_RANGE_SIZE = (VK_FORMAT_ASTC_12x12_SRGB_BLOCK - VK_FORMAT_UNDEFINED + 1), @@ -817,6 +840,7 @@ VK_FORMAT_FEATURE_BLIT_DST_BIT = 0x00000800, VK_FORMAT_FEATURE_SAMPLED_IMAGE_FILTER_LINEAR_BIT = 0x00001000, VK_FORMAT_FEATURE_SAMPLED_IMAGE_FILTER_CUBIC_BIT_IMG = 0x00002000, + VK_FORMAT_FEATURE_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkFormatFeatureFlagBits; typedef VkFlags VkFormatFeatureFlags; @@ -829,6 +853,7 @@ VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT = 0x00000020, VK_IMAGE_USAGE_TRANSIENT_ATTACHMENT_BIT = 0x00000040, VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT = 0x00000080, + VK_IMAGE_USAGE_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkImageUsageFlagBits; typedef VkFlags VkImageUsageFlags; @@ -838,6 +863,7 @@ VK_IMAGE_CREATE_SPARSE_ALIASED_BIT = 0x00000004, VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT = 0x00000008, VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT = 0x00000010, + VK_IMAGE_CREATE_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkImageCreateFlagBits; typedef VkFlags VkImageCreateFlags; @@ -849,6 +875,7 @@ VK_SAMPLE_COUNT_16_BIT = 0x00000010, VK_SAMPLE_COUNT_32_BIT = 0x00000020, VK_SAMPLE_COUNT_64_BIT = 0x00000040, + VK_SAMPLE_COUNT_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkSampleCountFlagBits; typedef VkFlags VkSampleCountFlags; @@ -857,6 +884,7 @@ VK_QUEUE_COMPUTE_BIT = 0x00000002, VK_QUEUE_TRANSFER_BIT = 0x00000004, VK_QUEUE_SPARSE_BINDING_BIT = 0x00000008, + VK_QUEUE_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkQueueFlagBits; typedef VkFlags VkQueueFlags; @@ -866,11 +894,13 @@ VK_MEMORY_PROPERTY_HOST_COHERENT_BIT = 0x00000004, VK_MEMORY_PROPERTY_HOST_CACHED_BIT = 0x00000008, VK_MEMORY_PROPERTY_LAZILY_ALLOCATED_BIT = 0x00000010, + VK_MEMORY_PROPERTY_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkMemoryPropertyFlagBits; typedef VkFlags VkMemoryPropertyFlags; typedef enum VkMemoryHeapFlagBits { VK_MEMORY_HEAP_DEVICE_LOCAL_BIT = 0x00000001, + VK_MEMORY_HEAP_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkMemoryHeapFlagBits; typedef VkFlags VkMemoryHeapFlags; typedef VkFlags VkDeviceCreateFlags; @@ -894,6 +924,8 @@ VK_PIPELINE_STAGE_HOST_BIT = 0x00004000, VK_PIPELINE_STAGE_ALL_GRAPHICS_BIT = 0x00008000, VK_PIPELINE_STAGE_ALL_COMMANDS_BIT = 0x00010000, + VK_PIPELINE_STAGE_COMMAND_PROCESS_BIT_NVX = 0x00020000, + VK_PIPELINE_STAGE_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkPipelineStageFlagBits; typedef VkFlags VkPipelineStageFlags; typedef VkFlags VkMemoryMapFlags; @@ -903,6 +935,7 @@ VK_IMAGE_ASPECT_DEPTH_BIT = 0x00000002, VK_IMAGE_ASPECT_STENCIL_BIT = 0x00000004, VK_IMAGE_ASPECT_METADATA_BIT = 0x00000008, + VK_IMAGE_ASPECT_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkImageAspectFlagBits; typedef VkFlags VkImageAspectFlags; @@ -910,16 +943,19 @@ VK_SPARSE_IMAGE_FORMAT_SINGLE_MIPTAIL_BIT = 0x00000001, VK_SPARSE_IMAGE_FORMAT_ALIGNED_MIP_SIZE_BIT = 0x00000002, VK_SPARSE_IMAGE_FORMAT_NONSTANDARD_BLOCK_SIZE_BIT = 0x00000004, + VK_SPARSE_IMAGE_FORMAT_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkSparseImageFormatFlagBits; typedef VkFlags VkSparseImageFormatFlags; typedef enum VkSparseMemoryBindFlagBits { VK_SPARSE_MEMORY_BIND_METADATA_BIT = 0x00000001, + VK_SPARSE_MEMORY_BIND_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkSparseMemoryBindFlagBits; typedef VkFlags VkSparseMemoryBindFlags; typedef enum VkFenceCreateFlagBits { VK_FENCE_CREATE_SIGNALED_BIT = 0x00000001, + VK_FENCE_CREATE_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkFenceCreateFlagBits; typedef VkFlags VkFenceCreateFlags; typedef VkFlags VkSemaphoreCreateFlags; @@ -938,6 +974,7 @@ VK_QUERY_PIPELINE_STATISTIC_TESSELLATION_CONTROL_SHADER_PATCHES_BIT = 0x00000100, VK_QUERY_PIPELINE_STATISTIC_TESSELLATION_EVALUATION_SHADER_INVOCATIONS_BIT = 0x00000200, VK_QUERY_PIPELINE_STATISTIC_COMPUTE_SHADER_INVOCATIONS_BIT = 0x00000400, + VK_QUERY_PIPELINE_STATISTIC_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkQueryPipelineStatisticFlagBits; typedef VkFlags VkQueryPipelineStatisticFlags; @@ -946,6 +983,7 @@ VK_QUERY_RESULT_WAIT_BIT = 0x00000002, VK_QUERY_RESULT_WITH_AVAILABILITY_BIT = 0x00000004, VK_QUERY_RESULT_PARTIAL_BIT = 0x00000008, + VK_QUERY_RESULT_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkQueryResultFlagBits; typedef VkFlags VkQueryResultFlags; @@ -953,6 +991,7 @@ VK_BUFFER_CREATE_SPARSE_BINDING_BIT = 0x00000001, VK_BUFFER_CREATE_SPARSE_RESIDENCY_BIT = 0x00000002, VK_BUFFER_CREATE_SPARSE_ALIASED_BIT = 0x00000004, + VK_BUFFER_CREATE_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkBufferCreateFlagBits; typedef VkFlags VkBufferCreateFlags; @@ -966,6 +1005,7 @@ VK_BUFFER_USAGE_INDEX_BUFFER_BIT = 0x00000040, VK_BUFFER_USAGE_VERTEX_BUFFER_BIT = 0x00000080, VK_BUFFER_USAGE_INDIRECT_BUFFER_BIT = 0x00000100, + VK_BUFFER_USAGE_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkBufferUsageFlagBits; typedef VkFlags VkBufferUsageFlags; typedef VkFlags VkBufferViewCreateFlags; @@ -977,6 +1017,7 @@ VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT = 0x00000001, VK_PIPELINE_CREATE_ALLOW_DERIVATIVES_BIT = 0x00000002, VK_PIPELINE_CREATE_DERIVATIVE_BIT = 0x00000004, + VK_PIPELINE_CREATE_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkPipelineCreateFlagBits; typedef VkFlags VkPipelineCreateFlags; typedef VkFlags VkPipelineShaderStageCreateFlags; @@ -990,6 +1031,7 @@ VK_SHADER_STAGE_COMPUTE_BIT = 0x00000020, VK_SHADER_STAGE_ALL_GRAPHICS = 0x0000001F, VK_SHADER_STAGE_ALL = 0x7FFFFFFF, + VK_SHADER_STAGE_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkShaderStageFlagBits; typedef VkFlags VkPipelineVertexInputStateCreateFlags; typedef VkFlags VkPipelineInputAssemblyStateCreateFlags; @@ -1002,6 +1044,7 @@ VK_CULL_MODE_FRONT_BIT = 0x00000001, VK_CULL_MODE_BACK_BIT = 0x00000002, VK_CULL_MODE_FRONT_AND_BACK = 0x00000003, + VK_CULL_MODE_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkCullModeFlagBits; typedef VkFlags VkCullModeFlags; typedef VkFlags VkPipelineMultisampleStateCreateFlags; @@ -1013,6 +1056,7 @@ VK_COLOR_COMPONENT_G_BIT = 0x00000002, VK_COLOR_COMPONENT_B_BIT = 0x00000004, VK_COLOR_COMPONENT_A_BIT = 0x00000008, + VK_COLOR_COMPONENT_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkColorComponentFlagBits; typedef VkFlags VkColorComponentFlags; typedef VkFlags VkPipelineDynamicStateCreateFlags; @@ -1023,6 +1067,7 @@ typedef enum VkDescriptorPoolCreateFlagBits { VK_DESCRIPTOR_POOL_CREATE_FREE_DESCRIPTOR_SET_BIT = 0x00000001, + VK_DESCRIPTOR_POOL_CREATE_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkDescriptorPoolCreateFlagBits; typedef VkFlags VkDescriptorPoolCreateFlags; typedef VkFlags VkDescriptorPoolResetFlags; @@ -1031,6 +1076,7 @@ typedef enum VkAttachmentDescriptionFlagBits { VK_ATTACHMENT_DESCRIPTION_MAY_ALIAS_BIT = 0x00000001, + VK_ATTACHMENT_DESCRIPTION_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkAttachmentDescriptionFlagBits; typedef VkFlags VkAttachmentDescriptionFlags; typedef VkFlags VkSubpassDescriptionFlags; @@ -1053,22 +1099,28 @@ VK_ACCESS_HOST_WRITE_BIT = 0x00004000, VK_ACCESS_MEMORY_READ_BIT = 0x00008000, VK_ACCESS_MEMORY_WRITE_BIT = 0x00010000, + VK_ACCESS_COMMAND_PROCESS_READ_BIT_NVX = 0x00020000, + VK_ACCESS_COMMAND_PROCESS_WRITE_BIT_NVX = 0x00040000, + VK_ACCESS_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkAccessFlagBits; typedef VkFlags VkAccessFlags; typedef enum VkDependencyFlagBits { VK_DEPENDENCY_BY_REGION_BIT = 0x00000001, + VK_DEPENDENCY_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkDependencyFlagBits; typedef VkFlags VkDependencyFlags; typedef enum VkCommandPoolCreateFlagBits { VK_COMMAND_POOL_CREATE_TRANSIENT_BIT = 0x00000001, VK_COMMAND_POOL_CREATE_RESET_COMMAND_BUFFER_BIT = 0x00000002, + VK_COMMAND_POOL_CREATE_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkCommandPoolCreateFlagBits; typedef VkFlags VkCommandPoolCreateFlags; typedef enum VkCommandPoolResetFlagBits { VK_COMMAND_POOL_RESET_RELEASE_RESOURCES_BIT = 0x00000001, + VK_COMMAND_POOL_RESET_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkCommandPoolResetFlagBits; typedef VkFlags VkCommandPoolResetFlags; @@ -1076,16 +1128,19 @@ VK_COMMAND_BUFFER_USAGE_ONE_TIME_SUBMIT_BIT = 0x00000001, VK_COMMAND_BUFFER_USAGE_RENDER_PASS_CONTINUE_BIT = 0x00000002, VK_COMMAND_BUFFER_USAGE_SIMULTANEOUS_USE_BIT = 0x00000004, + VK_COMMAND_BUFFER_USAGE_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkCommandBufferUsageFlagBits; typedef VkFlags VkCommandBufferUsageFlags; typedef enum VkQueryControlFlagBits { VK_QUERY_CONTROL_PRECISE_BIT = 0x00000001, + VK_QUERY_CONTROL_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkQueryControlFlagBits; typedef VkFlags VkQueryControlFlags; typedef enum VkCommandBufferResetFlagBits { VK_COMMAND_BUFFER_RESET_RELEASE_RESOURCES_BIT = 0x00000001, + VK_COMMAND_BUFFER_RESET_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkCommandBufferResetFlagBits; typedef VkFlags VkCommandBufferResetFlags; @@ -1093,6 +1148,7 @@ VK_STENCIL_FACE_FRONT_BIT = 0x00000001, VK_STENCIL_FACE_BACK_BIT = 0x00000002, VK_STENCIL_FRONT_AND_BACK = 0x00000003, + VK_STENCIL_FACE_FLAG_BITS_MAX_ENUM = 0x7FFFFFFF } VkStencilFaceFlagBits; typedef VkFlags VkStencilFaceFlags; @@ -2320,7 +2376,7 @@ typedef void (VKAPI_PTR *PFN_vkCmdBlitImage)(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageBlit* pRegions, VkFilter filter); typedef void (VKAPI_PTR *PFN_vkCmdCopyBufferToImage)(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkBufferImageCopy* pRegions); typedef void (VKAPI_PTR *PFN_vkCmdCopyImageToBuffer)(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferImageCopy* pRegions); -typedef void (VKAPI_PTR *PFN_vkCmdUpdateBuffer)(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const uint32_t* pData); +typedef void (VKAPI_PTR *PFN_vkCmdUpdateBuffer)(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const void* pData); typedef void (VKAPI_PTR *PFN_vkCmdFillBuffer)(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize size, uint32_t data); typedef void (VKAPI_PTR *PFN_vkCmdClearColorImage)(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearColorValue* pColor, uint32_t rangeCount, const VkImageSubresourceRange* pRanges); typedef void (VKAPI_PTR *PFN_vkCmdClearDepthStencilImage)(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearDepthStencilValue* pDepthStencil, uint32_t rangeCount, const VkImageSubresourceRange* pRanges); @@ -3005,7 +3061,7 @@ VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, - const uint32_t* pData); + const void* pData); VKAPI_ATTR void VKAPI_CALL vkCmdFillBuffer( VkCommandBuffer commandBuffer, @@ -3145,14 +3201,15 @@ #define VK_KHR_SURFACE_SPEC_VERSION 25 #define VK_KHR_SURFACE_EXTENSION_NAME "VK_KHR_surface" +#define VK_COLORSPACE_SRGB_NONLINEAR_KHR VK_COLOR_SPACE_SRGB_NONLINEAR_KHR typedef enum VkColorSpaceKHR { - VK_COLORSPACE_SRGB_NONLINEAR_KHR = 0, - VK_COLORSPACE_BEGIN_RANGE = VK_COLORSPACE_SRGB_NONLINEAR_KHR, - VK_COLORSPACE_END_RANGE = VK_COLORSPACE_SRGB_NONLINEAR_KHR, - VK_COLORSPACE_RANGE_SIZE = (VK_COLORSPACE_SRGB_NONLINEAR_KHR - VK_COLORSPACE_SRGB_NONLINEAR_KHR + 1), - VK_COLORSPACE_MAX_ENUM = 0x7FFFFFFF + VK_COLOR_SPACE_SRGB_NONLINEAR_KHR = 0, + VK_COLOR_SPACE_BEGIN_RANGE_KHR = VK_COLOR_SPACE_SRGB_NONLINEAR_KHR, + VK_COLOR_SPACE_END_RANGE_KHR = VK_COLOR_SPACE_SRGB_NONLINEAR_KHR, + VK_COLOR_SPACE_RANGE_SIZE_KHR = (VK_COLOR_SPACE_SRGB_NONLINEAR_KHR - VK_COLOR_SPACE_SRGB_NONLINEAR_KHR + 1), + VK_COLOR_SPACE_MAX_ENUM_KHR = 0x7FFFFFFF } VkColorSpaceKHR; typedef enum VkPresentModeKHR { @@ -3160,10 +3217,10 @@ VK_PRESENT_MODE_MAILBOX_KHR = 1, VK_PRESENT_MODE_FIFO_KHR = 2, VK_PRESENT_MODE_FIFO_RELAXED_KHR = 3, - VK_PRESENT_MODE_BEGIN_RANGE = VK_PRESENT_MODE_IMMEDIATE_KHR, - VK_PRESENT_MODE_END_RANGE = VK_PRESENT_MODE_FIFO_RELAXED_KHR, - VK_PRESENT_MODE_RANGE_SIZE = (VK_PRESENT_MODE_FIFO_RELAXED_KHR - VK_PRESENT_MODE_IMMEDIATE_KHR + 1), - VK_PRESENT_MODE_MAX_ENUM = 0x7FFFFFFF + VK_PRESENT_MODE_BEGIN_RANGE_KHR = VK_PRESENT_MODE_IMMEDIATE_KHR, + VK_PRESENT_MODE_END_RANGE_KHR = VK_PRESENT_MODE_FIFO_RELAXED_KHR, + VK_PRESENT_MODE_RANGE_SIZE_KHR = (VK_PRESENT_MODE_FIFO_RELAXED_KHR - VK_PRESENT_MODE_IMMEDIATE_KHR + 1), + VK_PRESENT_MODE_MAX_ENUM_KHR = 0x7FFFFFFF } VkPresentModeKHR; @@ -3177,6 +3234,7 @@ VK_SURFACE_TRANSFORM_HORIZONTAL_MIRROR_ROTATE_180_BIT_KHR = 0x00000040, VK_SURFACE_TRANSFORM_HORIZONTAL_MIRROR_ROTATE_270_BIT_KHR = 0x00000080, VK_SURFACE_TRANSFORM_INHERIT_BIT_KHR = 0x00000100, + VK_SURFACE_TRANSFORM_FLAG_BITS_MAX_ENUM_KHR = 0x7FFFFFFF } VkSurfaceTransformFlagBitsKHR; typedef VkFlags VkSurfaceTransformFlagsKHR; @@ -3185,6 +3243,7 @@ VK_COMPOSITE_ALPHA_PRE_MULTIPLIED_BIT_KHR = 0x00000002, VK_COMPOSITE_ALPHA_POST_MULTIPLIED_BIT_KHR = 0x00000004, VK_COMPOSITE_ALPHA_INHERIT_BIT_KHR = 0x00000008, + VK_COMPOSITE_ALPHA_FLAG_BITS_MAX_ENUM_KHR = 0x7FFFFFFF } VkCompositeAlphaFlagBitsKHR; typedef VkFlags VkCompositeAlphaFlagsKHR; @@ -3246,7 +3305,7 @@ #define VK_KHR_swapchain 1 VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkSwapchainKHR) -#define VK_KHR_SWAPCHAIN_SPEC_VERSION 67 +#define VK_KHR_SWAPCHAIN_SPEC_VERSION 68 #define VK_KHR_SWAPCHAIN_EXTENSION_NAME "VK_KHR_swapchain" typedef VkFlags VkSwapchainCreateFlagsKHR; @@ -3334,6 +3393,7 @@ VK_DISPLAY_PLANE_ALPHA_GLOBAL_BIT_KHR = 0x00000002, VK_DISPLAY_PLANE_ALPHA_PER_PIXEL_BIT_KHR = 0x00000004, VK_DISPLAY_PLANE_ALPHA_PER_PIXEL_PREMULTIPLIED_BIT_KHR = 0x00000008, + VK_DISPLAY_PLANE_ALPHA_FLAG_BITS_MAX_ENUM_KHR = 0x7FFFFFFF } VkDisplayPlaneAlphaFlagBitsKHR; typedef VkFlags VkDisplayPlaneAlphaFlagsKHR; typedef VkFlags VkDisplayModeCreateFlagsKHR; @@ -3401,7 +3461,7 @@ typedef VkResult (VKAPI_PTR *PFN_vkGetPhysicalDeviceDisplayPlanePropertiesKHR)(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPlanePropertiesKHR* pProperties); typedef VkResult (VKAPI_PTR *PFN_vkGetDisplayPlaneSupportedDisplaysKHR)(VkPhysicalDevice physicalDevice, uint32_t planeIndex, uint32_t* pDisplayCount, VkDisplayKHR* pDisplays); typedef VkResult (VKAPI_PTR *PFN_vkGetDisplayModePropertiesKHR)(VkPhysicalDevice physicalDevice, VkDisplayKHR display, uint32_t* pPropertyCount, VkDisplayModePropertiesKHR* pProperties); -typedef VkResult (VKAPI_PTR *PFN_vkCreateDisplayModeKHR)(VkPhysicalDevice physicalDevice, VkDisplayKHR display, const VkDisplayModeCreateInfoKHR*pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDisplayModeKHR* pMode); +typedef VkResult (VKAPI_PTR *PFN_vkCreateDisplayModeKHR)(VkPhysicalDevice physicalDevice, VkDisplayKHR display, const VkDisplayModeCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDisplayModeKHR* pMode); typedef VkResult (VKAPI_PTR *PFN_vkGetDisplayPlaneCapabilitiesKHR)(VkPhysicalDevice physicalDevice, VkDisplayModeKHR mode, uint32_t planeIndex, VkDisplayPlaneCapabilitiesKHR* pCapabilities); typedef VkResult (VKAPI_PTR *PFN_vkCreateDisplayPlaneSurfaceKHR)(VkInstance instance, const VkDisplaySurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); @@ -3684,7 +3744,7 @@ #define VK_EXT_debug_report 1 VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkDebugReportCallbackEXT) -#define VK_EXT_DEBUG_REPORT_SPEC_VERSION 2 +#define VK_EXT_DEBUG_REPORT_SPEC_VERSION 4 #define VK_EXT_DEBUG_REPORT_EXTENSION_NAME "VK_EXT_debug_report" #define VK_STRUCTURE_TYPE_DEBUG_REPORT_CREATE_INFO_EXT VK_STRUCTURE_TYPE_DEBUG_REPORT_CALLBACK_CREATE_INFO_EXT @@ -3719,11 +3779,23 @@ VK_DEBUG_REPORT_OBJECT_TYPE_SURFACE_KHR_EXT = 26, VK_DEBUG_REPORT_OBJECT_TYPE_SWAPCHAIN_KHR_EXT = 27, VK_DEBUG_REPORT_OBJECT_TYPE_DEBUG_REPORT_EXT = 28, + VK_DEBUG_REPORT_OBJECT_TYPE_DISPLAY_KHR_EXT = 29, + VK_DEBUG_REPORT_OBJECT_TYPE_DISPLAY_MODE_KHR_EXT = 30, + VK_DEBUG_REPORT_OBJECT_TYPE_OBJECT_TABLE_NVX_EXT = 31, + VK_DEBUG_REPORT_OBJECT_TYPE_INDIRECT_COMMANDS_LAYOUT_NVX_EXT = 32, + VK_DEBUG_REPORT_OBJECT_TYPE_BEGIN_RANGE_EXT = VK_DEBUG_REPORT_OBJECT_TYPE_UNKNOWN_EXT, + VK_DEBUG_REPORT_OBJECT_TYPE_END_RANGE_EXT = VK_DEBUG_REPORT_OBJECT_TYPE_INDIRECT_COMMANDS_LAYOUT_NVX_EXT, + VK_DEBUG_REPORT_OBJECT_TYPE_RANGE_SIZE_EXT = (VK_DEBUG_REPORT_OBJECT_TYPE_INDIRECT_COMMANDS_LAYOUT_NVX_EXT - VK_DEBUG_REPORT_OBJECT_TYPE_UNKNOWN_EXT + 1), + VK_DEBUG_REPORT_OBJECT_TYPE_MAX_ENUM_EXT = 0x7FFFFFFF } VkDebugReportObjectTypeEXT; typedef enum VkDebugReportErrorEXT { VK_DEBUG_REPORT_ERROR_NONE_EXT = 0, VK_DEBUG_REPORT_ERROR_CALLBACK_REF_EXT = 1, + VK_DEBUG_REPORT_ERROR_BEGIN_RANGE_EXT = VK_DEBUG_REPORT_ERROR_NONE_EXT, + VK_DEBUG_REPORT_ERROR_END_RANGE_EXT = VK_DEBUG_REPORT_ERROR_CALLBACK_REF_EXT, + VK_DEBUG_REPORT_ERROR_RANGE_SIZE_EXT = (VK_DEBUG_REPORT_ERROR_CALLBACK_REF_EXT - VK_DEBUG_REPORT_ERROR_NONE_EXT + 1), + VK_DEBUG_REPORT_ERROR_MAX_ENUM_EXT = 0x7FFFFFFF } VkDebugReportErrorEXT; @@ -3733,6 +3805,7 @@ VK_DEBUG_REPORT_PERFORMANCE_WARNING_BIT_EXT = 0x00000004, VK_DEBUG_REPORT_ERROR_BIT_EXT = 0x00000008, VK_DEBUG_REPORT_DEBUG_BIT_EXT = 0x00000010, + VK_DEBUG_REPORT_FLAG_BITS_MAX_ENUM_EXT = 0x7FFFFFFF } VkDebugReportFlagBitsEXT; typedef VkFlags VkDebugReportFlagsEXT; @@ -3793,6 +3866,533 @@ #define VK_IMG_FILTER_CUBIC_EXTENSION_NAME "VK_IMG_filter_cubic" +#define VK_AMD_rasterization_order 1 +#define VK_AMD_RASTERIZATION_ORDER_SPEC_VERSION 1 +#define VK_AMD_RASTERIZATION_ORDER_EXTENSION_NAME "VK_AMD_rasterization_order" + + +typedef enum VkRasterizationOrderAMD { + VK_RASTERIZATION_ORDER_STRICT_AMD = 0, + VK_RASTERIZATION_ORDER_RELAXED_AMD = 1, + VK_RASTERIZATION_ORDER_BEGIN_RANGE_AMD = VK_RASTERIZATION_ORDER_STRICT_AMD, + VK_RASTERIZATION_ORDER_END_RANGE_AMD = VK_RASTERIZATION_ORDER_RELAXED_AMD, + VK_RASTERIZATION_ORDER_RANGE_SIZE_AMD = (VK_RASTERIZATION_ORDER_RELAXED_AMD - VK_RASTERIZATION_ORDER_STRICT_AMD + 1), + VK_RASTERIZATION_ORDER_MAX_ENUM_AMD = 0x7FFFFFFF +} VkRasterizationOrderAMD; + +typedef struct VkPipelineRasterizationStateRasterizationOrderAMD { + VkStructureType sType; + const void* pNext; + VkRasterizationOrderAMD rasterizationOrder; +} VkPipelineRasterizationStateRasterizationOrderAMD; + + + +#define VK_AMD_shader_trinary_minmax 1 +#define VK_AMD_SHADER_TRINARY_MINMAX_SPEC_VERSION 1 +#define VK_AMD_SHADER_TRINARY_MINMAX_EXTENSION_NAME "VK_AMD_shader_trinary_minmax" + + +#define VK_AMD_shader_explicit_vertex_parameter 1 +#define VK_AMD_SHADER_EXPLICIT_VERTEX_PARAMETER_SPEC_VERSION 1 +#define VK_AMD_SHADER_EXPLICIT_VERTEX_PARAMETER_EXTENSION_NAME "VK_AMD_shader_explicit_vertex_parameter" + + +#define VK_EXT_debug_marker 1 +#define VK_EXT_DEBUG_MARKER_SPEC_VERSION 3 +#define VK_EXT_DEBUG_MARKER_EXTENSION_NAME "VK_EXT_debug_marker" + +typedef struct VkDebugMarkerObjectNameInfoEXT { + VkStructureType sType; + const void* pNext; + VkDebugReportObjectTypeEXT objectType; + uint64_t object; + const char* pObjectName; +} VkDebugMarkerObjectNameInfoEXT; + +typedef struct VkDebugMarkerObjectTagInfoEXT { + VkStructureType sType; + const void* pNext; + VkDebugReportObjectTypeEXT objectType; + uint64_t object; + uint64_t tagName; + size_t tagSize; + const void* pTag; +} VkDebugMarkerObjectTagInfoEXT; + +typedef struct VkDebugMarkerMarkerInfoEXT { + VkStructureType sType; + const void* pNext; + const char* pMarkerName; + float color[4]; +} VkDebugMarkerMarkerInfoEXT; + + +typedef VkResult (VKAPI_PTR *PFN_vkDebugMarkerSetObjectTagEXT)(VkDevice device, VkDebugMarkerObjectTagInfoEXT* pTagInfo); +typedef VkResult (VKAPI_PTR *PFN_vkDebugMarkerSetObjectNameEXT)(VkDevice device, VkDebugMarkerObjectNameInfoEXT* pNameInfo); +typedef void (VKAPI_PTR *PFN_vkCmdDebugMarkerBeginEXT)(VkCommandBuffer commandBuffer, VkDebugMarkerMarkerInfoEXT* pMarkerInfo); +typedef void (VKAPI_PTR *PFN_vkCmdDebugMarkerEndEXT)(VkCommandBuffer commandBuffer); +typedef void (VKAPI_PTR *PFN_vkCmdDebugMarkerInsertEXT)(VkCommandBuffer commandBuffer, VkDebugMarkerMarkerInfoEXT* pMarkerInfo); + +#ifndef VK_NO_PROTOTYPES +VKAPI_ATTR VkResult VKAPI_CALL vkDebugMarkerSetObjectTagEXT( + VkDevice device, + VkDebugMarkerObjectTagInfoEXT* pTagInfo); + +VKAPI_ATTR VkResult VKAPI_CALL vkDebugMarkerSetObjectNameEXT( + VkDevice device, + VkDebugMarkerObjectNameInfoEXT* pNameInfo); + +VKAPI_ATTR void VKAPI_CALL vkCmdDebugMarkerBeginEXT( + VkCommandBuffer commandBuffer, + VkDebugMarkerMarkerInfoEXT* pMarkerInfo); + +VKAPI_ATTR void VKAPI_CALL vkCmdDebugMarkerEndEXT( + VkCommandBuffer commandBuffer); + +VKAPI_ATTR void VKAPI_CALL vkCmdDebugMarkerInsertEXT( + VkCommandBuffer commandBuffer, + VkDebugMarkerMarkerInfoEXT* pMarkerInfo); +#endif + +#define VK_AMD_gcn_shader 1 +#define VK_AMD_GCN_SHADER_SPEC_VERSION 1 +#define VK_AMD_GCN_SHADER_EXTENSION_NAME "VK_AMD_gcn_shader" + + +#define VK_NV_dedicated_allocation 1 +#define VK_NV_DEDICATED_ALLOCATION_SPEC_VERSION 1 +#define VK_NV_DEDICATED_ALLOCATION_EXTENSION_NAME "VK_NV_dedicated_allocation" + +typedef struct VkDedicatedAllocationImageCreateInfoNV { + VkStructureType sType; + const void* pNext; + VkBool32 dedicatedAllocation; +} VkDedicatedAllocationImageCreateInfoNV; + +typedef struct VkDedicatedAllocationBufferCreateInfoNV { + VkStructureType sType; + const void* pNext; + VkBool32 dedicatedAllocation; +} VkDedicatedAllocationBufferCreateInfoNV; + +typedef struct VkDedicatedAllocationMemoryAllocateInfoNV { + VkStructureType sType; + const void* pNext; + VkImage image; + VkBuffer buffer; +} VkDedicatedAllocationMemoryAllocateInfoNV; + + + +#define VK_AMD_draw_indirect_count 1 +#define VK_AMD_DRAW_INDIRECT_COUNT_SPEC_VERSION 1 +#define VK_AMD_DRAW_INDIRECT_COUNT_EXTENSION_NAME "VK_AMD_draw_indirect_count" + +typedef void (VKAPI_PTR *PFN_vkCmdDrawIndirectCountAMD)(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkBuffer countBuffer, VkDeviceSize countBufferOffset, uint32_t maxDrawCount, uint32_t stride); +typedef void (VKAPI_PTR *PFN_vkCmdDrawIndexedIndirectCountAMD)(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkBuffer countBuffer, VkDeviceSize countBufferOffset, uint32_t maxDrawCount, uint32_t stride); + +#ifndef VK_NO_PROTOTYPES +VKAPI_ATTR void VKAPI_CALL vkCmdDrawIndirectCountAMD( + VkCommandBuffer commandBuffer, + VkBuffer buffer, + VkDeviceSize offset, + VkBuffer countBuffer, + VkDeviceSize countBufferOffset, + uint32_t maxDrawCount, + uint32_t stride); + +VKAPI_ATTR void VKAPI_CALL vkCmdDrawIndexedIndirectCountAMD( + VkCommandBuffer commandBuffer, + VkBuffer buffer, + VkDeviceSize offset, + VkBuffer countBuffer, + VkDeviceSize countBufferOffset, + uint32_t maxDrawCount, + uint32_t stride); +#endif + +#define VK_AMD_negative_viewport_height 1 +#define VK_AMD_NEGATIVE_VIEWPORT_HEIGHT_SPEC_VERSION 1 +#define VK_AMD_NEGATIVE_VIEWPORT_HEIGHT_EXTENSION_NAME "VK_AMD_negative_viewport_height" + + +#define VK_AMD_gpu_shader_half_float 1 +#define VK_AMD_GPU_SHADER_HALF_FLOAT_SPEC_VERSION 1 +#define VK_AMD_GPU_SHADER_HALF_FLOAT_EXTENSION_NAME "VK_AMD_gpu_shader_half_float" + + +#define VK_AMD_shader_ballot 1 +#define VK_AMD_SHADER_BALLOT_SPEC_VERSION 1 +#define VK_AMD_SHADER_BALLOT_EXTENSION_NAME "VK_AMD_shader_ballot" + + +#define VK_IMG_format_pvrtc 1 +#define VK_IMG_FORMAT_PVRTC_SPEC_VERSION 1 +#define VK_IMG_FORMAT_PVRTC_EXTENSION_NAME "VK_IMG_format_pvrtc" + + +#define VK_NV_external_memory_capabilities 1 +#define VK_NV_EXTERNAL_MEMORY_CAPABILITIES_SPEC_VERSION 1 +#define VK_NV_EXTERNAL_MEMORY_CAPABILITIES_EXTENSION_NAME "VK_NV_external_memory_capabilities" + + +typedef enum VkExternalMemoryHandleTypeFlagBitsNV { + VK_EXTERNAL_MEMORY_HANDLE_TYPE_OPAQUE_WIN32_BIT_NV = 0x00000001, + VK_EXTERNAL_MEMORY_HANDLE_TYPE_OPAQUE_WIN32_KMT_BIT_NV = 0x00000002, + VK_EXTERNAL_MEMORY_HANDLE_TYPE_D3D11_IMAGE_BIT_NV = 0x00000004, + VK_EXTERNAL_MEMORY_HANDLE_TYPE_D3D11_IMAGE_KMT_BIT_NV = 0x00000008, + VK_EXTERNAL_MEMORY_HANDLE_TYPE_FLAG_BITS_MAX_ENUM_NV = 0x7FFFFFFF +} VkExternalMemoryHandleTypeFlagBitsNV; +typedef VkFlags VkExternalMemoryHandleTypeFlagsNV; + +typedef enum VkExternalMemoryFeatureFlagBitsNV { + VK_EXTERNAL_MEMORY_FEATURE_DEDICATED_ONLY_BIT_NV = 0x00000001, + VK_EXTERNAL_MEMORY_FEATURE_EXPORTABLE_BIT_NV = 0x00000002, + VK_EXTERNAL_MEMORY_FEATURE_IMPORTABLE_BIT_NV = 0x00000004, + VK_EXTERNAL_MEMORY_FEATURE_FLAG_BITS_MAX_ENUM_NV = 0x7FFFFFFF +} VkExternalMemoryFeatureFlagBitsNV; +typedef VkFlags VkExternalMemoryFeatureFlagsNV; + +typedef struct VkExternalImageFormatPropertiesNV { + VkImageFormatProperties imageFormatProperties; + VkExternalMemoryFeatureFlagsNV externalMemoryFeatures; + VkExternalMemoryHandleTypeFlagsNV exportFromImportedHandleTypes; + VkExternalMemoryHandleTypeFlagsNV compatibleHandleTypes; +} VkExternalImageFormatPropertiesNV; + + +typedef VkResult (VKAPI_PTR *PFN_vkGetPhysicalDeviceExternalImageFormatPropertiesNV)(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkExternalMemoryHandleTypeFlagsNV externalHandleType, VkExternalImageFormatPropertiesNV* pExternalImageFormatProperties); + +#ifndef VK_NO_PROTOTYPES +VKAPI_ATTR VkResult VKAPI_CALL vkGetPhysicalDeviceExternalImageFormatPropertiesNV( + VkPhysicalDevice physicalDevice, + VkFormat format, + VkImageType type, + VkImageTiling tiling, + VkImageUsageFlags usage, + VkImageCreateFlags flags, + VkExternalMemoryHandleTypeFlagsNV externalHandleType, + VkExternalImageFormatPropertiesNV* pExternalImageFormatProperties); +#endif + +#define VK_NV_external_memory 1 +#define VK_NV_EXTERNAL_MEMORY_SPEC_VERSION 1 +#define VK_NV_EXTERNAL_MEMORY_EXTENSION_NAME "VK_NV_external_memory" + +typedef struct VkExternalMemoryImageCreateInfoNV { + VkStructureType sType; + const void* pNext; + VkExternalMemoryHandleTypeFlagsNV handleTypes; +} VkExternalMemoryImageCreateInfoNV; + +typedef struct VkExportMemoryAllocateInfoNV { + VkStructureType sType; + const void* pNext; + VkExternalMemoryHandleTypeFlagsNV handleTypes; +} VkExportMemoryAllocateInfoNV; + + + +#ifdef VK_USE_PLATFORM_WIN32_KHR +#define VK_NV_external_memory_win32 1 +#define VK_NV_EXTERNAL_MEMORY_WIN32_SPEC_VERSION 1 +#define VK_NV_EXTERNAL_MEMORY_WIN32_EXTENSION_NAME "VK_NV_external_memory_win32" + +typedef struct VkImportMemoryWin32HandleInfoNV { + VkStructureType sType; + const void* pNext; + VkExternalMemoryHandleTypeFlagsNV handleType; + HANDLE handle; +} VkImportMemoryWin32HandleInfoNV; + +typedef struct VkExportMemoryWin32HandleInfoNV { + VkStructureType sType; + const void* pNext; + const SECURITY_ATTRIBUTES* pAttributes; + DWORD dwAccess; +} VkExportMemoryWin32HandleInfoNV; + + +typedef VkResult (VKAPI_PTR *PFN_vkGetMemoryWin32HandleNV)(VkDevice device, VkDeviceMemory memory, VkExternalMemoryHandleTypeFlagsNV handleType, HANDLE* pHandle); + +#ifndef VK_NO_PROTOTYPES +VKAPI_ATTR VkResult VKAPI_CALL vkGetMemoryWin32HandleNV( + VkDevice device, + VkDeviceMemory memory, + VkExternalMemoryHandleTypeFlagsNV handleType, + HANDLE* pHandle); +#endif +#endif /* VK_USE_PLATFORM_WIN32_KHR */ + +#ifdef VK_USE_PLATFORM_WIN32_KHR +#define VK_NV_win32_keyed_mutex 1 +#define VK_NV_WIN32_KEYED_MUTEX_SPEC_VERSION 1 +#define VK_NV_WIN32_KEYED_MUTEX_EXTENSION_NAME "VK_NV_win32_keyed_mutex" + +typedef struct VkWin32KeyedMutexAcquireReleaseInfoNV { + VkStructureType sType; + const void* pNext; + uint32_t acquireCount; + const VkDeviceMemory* pAcquireSyncs; + const uint64_t* pAcquireKeys; + const uint32_t* pAcquireTimeoutMilliseconds; + uint32_t releaseCount; + const VkDeviceMemory* pReleaseSyncs; + const uint64_t* pReleaseKeys; +} VkWin32KeyedMutexAcquireReleaseInfoNV; + + +#endif /* VK_USE_PLATFORM_WIN32_KHR */ + +#define VK_EXT_validation_flags 1 +#define VK_EXT_VALIDATION_FLAGS_SPEC_VERSION 1 +#define VK_EXT_VALIDATION_FLAGS_EXTENSION_NAME "VK_EXT_validation_flags" + + +typedef enum VkValidationCheckEXT { + VK_VALIDATION_CHECK_ALL_EXT = 0, + VK_VALIDATION_CHECK_BEGIN_RANGE_EXT = VK_VALIDATION_CHECK_ALL_EXT, + VK_VALIDATION_CHECK_END_RANGE_EXT = VK_VALIDATION_CHECK_ALL_EXT, + VK_VALIDATION_CHECK_RANGE_SIZE_EXT = (VK_VALIDATION_CHECK_ALL_EXT - VK_VALIDATION_CHECK_ALL_EXT + 1), + VK_VALIDATION_CHECK_MAX_ENUM_EXT = 0x7FFFFFFF +} VkValidationCheckEXT; + +typedef struct VkValidationFlagsEXT { + VkStructureType sType; + const void* pNext; + uint32_t disabledValidationCheckCount; + VkValidationCheckEXT* pDisabledValidationChecks; +} VkValidationFlagsEXT; + + + +#define VK_NVX_device_generated_commands 1 +VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkObjectTableNVX) +VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkIndirectCommandsLayoutNVX) + +#define VK_NVX_DEVICE_GENERATED_COMMANDS_SPEC_VERSION 1 +#define VK_NVX_DEVICE_GENERATED_COMMANDS_EXTENSION_NAME "VK_NVX_device_generated_commands" + + +typedef enum VkIndirectCommandsTokenTypeNVX { + VK_INDIRECT_COMMANDS_TOKEN_PIPELINE_NVX = 0, + VK_INDIRECT_COMMANDS_TOKEN_DESCRIPTOR_SET_NVX = 1, + VK_INDIRECT_COMMANDS_TOKEN_INDEX_BUFFER_NVX = 2, + VK_INDIRECT_COMMANDS_TOKEN_VERTEX_BUFFER_NVX = 3, + VK_INDIRECT_COMMANDS_TOKEN_PUSH_CONSTANT_NVX = 4, + VK_INDIRECT_COMMANDS_TOKEN_DRAW_INDEXED_NVX = 5, + VK_INDIRECT_COMMANDS_TOKEN_DRAW_NVX = 6, + VK_INDIRECT_COMMANDS_TOKEN_DISPATCH_NVX = 7, + VK_INDIRECT_COMMANDS_TOKEN_TYPE_BEGIN_RANGE_NVX = VK_INDIRECT_COMMANDS_TOKEN_PIPELINE_NVX, + VK_INDIRECT_COMMANDS_TOKEN_TYPE_END_RANGE_NVX = VK_INDIRECT_COMMANDS_TOKEN_DISPATCH_NVX, + VK_INDIRECT_COMMANDS_TOKEN_TYPE_RANGE_SIZE_NVX = (VK_INDIRECT_COMMANDS_TOKEN_DISPATCH_NVX - VK_INDIRECT_COMMANDS_TOKEN_PIPELINE_NVX + 1), + VK_INDIRECT_COMMANDS_TOKEN_TYPE_MAX_ENUM_NVX = 0x7FFFFFFF +} VkIndirectCommandsTokenTypeNVX; + +typedef enum VkObjectEntryTypeNVX { + VK_OBJECT_ENTRY_DESCRIPTOR_SET_NVX = 0, + VK_OBJECT_ENTRY_PIPELINE_NVX = 1, + VK_OBJECT_ENTRY_INDEX_BUFFER_NVX = 2, + VK_OBJECT_ENTRY_VERTEX_BUFFER_NVX = 3, + VK_OBJECT_ENTRY_PUSH_CONSTANT_NVX = 4, + VK_OBJECT_ENTRY_TYPE_BEGIN_RANGE_NVX = VK_OBJECT_ENTRY_DESCRIPTOR_SET_NVX, + VK_OBJECT_ENTRY_TYPE_END_RANGE_NVX = VK_OBJECT_ENTRY_PUSH_CONSTANT_NVX, + VK_OBJECT_ENTRY_TYPE_RANGE_SIZE_NVX = (VK_OBJECT_ENTRY_PUSH_CONSTANT_NVX - VK_OBJECT_ENTRY_DESCRIPTOR_SET_NVX + 1), + VK_OBJECT_ENTRY_TYPE_MAX_ENUM_NVX = 0x7FFFFFFF +} VkObjectEntryTypeNVX; + + +typedef enum VkIndirectCommandsLayoutUsageFlagBitsNVX { + VK_INDIRECT_COMMANDS_LAYOUT_USAGE_UNORDERED_SEQUENCES_BIT_NVX = 0x00000001, + VK_INDIRECT_COMMANDS_LAYOUT_USAGE_SPARSE_SEQUENCES_BIT_NVX = 0x00000002, + VK_INDIRECT_COMMANDS_LAYOUT_USAGE_EMPTY_EXECUTIONS_BIT_NVX = 0x00000004, + VK_INDIRECT_COMMANDS_LAYOUT_USAGE_INDEXED_SEQUENCES_BIT_NVX = 0x00000008, + VK_INDIRECT_COMMANDS_LAYOUT_USAGE_FLAG_BITS_MAX_ENUM_NVX = 0x7FFFFFFF +} VkIndirectCommandsLayoutUsageFlagBitsNVX; +typedef VkFlags VkIndirectCommandsLayoutUsageFlagsNVX; + +typedef enum VkObjectEntryUsageFlagBitsNVX { + VK_OBJECT_ENTRY_USAGE_GRAPHICS_BIT_NVX = 0x00000001, + VK_OBJECT_ENTRY_USAGE_COMPUTE_BIT_NVX = 0x00000002, + VK_OBJECT_ENTRY_USAGE_FLAG_BITS_MAX_ENUM_NVX = 0x7FFFFFFF +} VkObjectEntryUsageFlagBitsNVX; +typedef VkFlags VkObjectEntryUsageFlagsNVX; + +typedef struct VkDeviceGeneratedCommandsFeaturesNVX { + VkStructureType sType; + const void* pNext; + VkBool32 computeBindingPointSupport; +} VkDeviceGeneratedCommandsFeaturesNVX; + +typedef struct VkDeviceGeneratedCommandsLimitsNVX { + VkStructureType sType; + const void* pNext; + uint32_t maxIndirectCommandsLayoutTokenCount; + uint32_t maxObjectEntryCounts; + uint32_t minSequenceCountBufferOffsetAlignment; + uint32_t minSequenceIndexBufferOffsetAlignment; + uint32_t minCommandsTokenBufferOffsetAlignment; +} VkDeviceGeneratedCommandsLimitsNVX; + +typedef struct VkIndirectCommandsTokenNVX { + VkIndirectCommandsTokenTypeNVX tokenType; + VkBuffer buffer; + VkDeviceSize offset; +} VkIndirectCommandsTokenNVX; + +typedef struct VkIndirectCommandsLayoutTokenNVX { + VkIndirectCommandsTokenTypeNVX tokenType; + uint32_t bindingUnit; + uint32_t dynamicCount; + uint32_t divisor; +} VkIndirectCommandsLayoutTokenNVX; + +typedef struct VkIndirectCommandsLayoutCreateInfoNVX { + VkStructureType sType; + const void* pNext; + VkPipelineBindPoint pipelineBindPoint; + VkIndirectCommandsLayoutUsageFlagsNVX flags; + uint32_t tokenCount; + const VkIndirectCommandsLayoutTokenNVX* pTokens; +} VkIndirectCommandsLayoutCreateInfoNVX; + +typedef struct VkCmdProcessCommandsInfoNVX { + VkStructureType sType; + const void* pNext; + VkObjectTableNVX objectTable; + VkIndirectCommandsLayoutNVX indirectCommandsLayout; + uint32_t indirectCommandsTokenCount; + const VkIndirectCommandsTokenNVX* pIndirectCommandsTokens; + uint32_t maxSequencesCount; + VkCommandBuffer targetCommandBuffer; + VkBuffer sequencesCountBuffer; + VkDeviceSize sequencesCountOffset; + VkBuffer sequencesIndexBuffer; + VkDeviceSize sequencesIndexOffset; +} VkCmdProcessCommandsInfoNVX; + +typedef struct VkCmdReserveSpaceForCommandsInfoNVX { + VkStructureType sType; + const void* pNext; + VkObjectTableNVX objectTable; + VkIndirectCommandsLayoutNVX indirectCommandsLayout; + uint32_t maxSequencesCount; +} VkCmdReserveSpaceForCommandsInfoNVX; + +typedef struct VkObjectTableCreateInfoNVX { + VkStructureType sType; + const void* pNext; + uint32_t objectCount; + const VkObjectEntryTypeNVX* pObjectEntryTypes; + const uint32_t* pObjectEntryCounts; + const VkObjectEntryUsageFlagsNVX* pObjectEntryUsageFlags; + uint32_t maxUniformBuffersPerDescriptor; + uint32_t maxStorageBuffersPerDescriptor; + uint32_t maxStorageImagesPerDescriptor; + uint32_t maxSampledImagesPerDescriptor; + uint32_t maxPipelineLayouts; +} VkObjectTableCreateInfoNVX; + +typedef struct VkObjectTableEntryNVX { + VkObjectEntryTypeNVX type; + VkObjectEntryUsageFlagsNVX flags; +} VkObjectTableEntryNVX; + +typedef struct VkObjectTablePipelineEntryNVX { + VkObjectEntryTypeNVX type; + VkObjectEntryUsageFlagsNVX flags; + VkPipeline pipeline; +} VkObjectTablePipelineEntryNVX; + +typedef struct VkObjectTableDescriptorSetEntryNVX { + VkObjectEntryTypeNVX type; + VkObjectEntryUsageFlagsNVX flags; + VkPipelineLayout pipelineLayout; + VkDescriptorSet descriptorSet; +} VkObjectTableDescriptorSetEntryNVX; + +typedef struct VkObjectTableVertexBufferEntryNVX { + VkObjectEntryTypeNVX type; + VkObjectEntryUsageFlagsNVX flags; + VkBuffer buffer; +} VkObjectTableVertexBufferEntryNVX; + +typedef struct VkObjectTableIndexBufferEntryNVX { + VkObjectEntryTypeNVX type; + VkObjectEntryUsageFlagsNVX flags; + VkBuffer buffer; +} VkObjectTableIndexBufferEntryNVX; + +typedef struct VkObjectTablePushConstantEntryNVX { + VkObjectEntryTypeNVX type; + VkObjectEntryUsageFlagsNVX flags; + VkPipelineLayout pipelineLayout; + VkShaderStageFlags stageFlags; +} VkObjectTablePushConstantEntryNVX; + + +typedef void (VKAPI_PTR *PFN_vkCmdProcessCommandsNVX)(VkCommandBuffer commandBuffer, const VkCmdProcessCommandsInfoNVX* pProcessCommandsInfo); +typedef void (VKAPI_PTR *PFN_vkCmdReserveSpaceForCommandsNVX)(VkCommandBuffer commandBuffer, const VkCmdReserveSpaceForCommandsInfoNVX* pReserveSpaceInfo); +typedef VkResult (VKAPI_PTR *PFN_vkCreateIndirectCommandsLayoutNVX)(VkDevice device, const VkIndirectCommandsLayoutCreateInfoNVX* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkIndirectCommandsLayoutNVX* pIndirectCommandsLayout); +typedef void (VKAPI_PTR *PFN_vkDestroyIndirectCommandsLayoutNVX)(VkDevice device, VkIndirectCommandsLayoutNVX indirectCommandsLayout, const VkAllocationCallbacks* pAllocator); +typedef VkResult (VKAPI_PTR *PFN_vkCreateObjectTableNVX)(VkDevice device, const VkObjectTableCreateInfoNVX* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkObjectTableNVX* pObjectTable); +typedef void (VKAPI_PTR *PFN_vkDestroyObjectTableNVX)(VkDevice device, VkObjectTableNVX objectTable, const VkAllocationCallbacks* pAllocator); +typedef VkResult (VKAPI_PTR *PFN_vkRegisterObjectsNVX)(VkDevice device, VkObjectTableNVX objectTable, uint32_t objectCount, const VkObjectTableEntryNVX* const* ppObjectTableEntries, const uint32_t* pObjectIndices); +typedef VkResult (VKAPI_PTR *PFN_vkUnregisterObjectsNVX)(VkDevice device, VkObjectTableNVX objectTable, uint32_t objectCount, const VkObjectEntryTypeNVX* pObjectEntryTypes, const uint32_t* pObjectIndices); +typedef void (VKAPI_PTR *PFN_vkGetPhysicalDeviceGeneratedCommandsPropertiesNVX)(VkPhysicalDevice physicalDevice, VkDeviceGeneratedCommandsFeaturesNVX* pFeatures, VkDeviceGeneratedCommandsLimitsNVX* pLimits); + +#ifndef VK_NO_PROTOTYPES +VKAPI_ATTR void VKAPI_CALL vkCmdProcessCommandsNVX( + VkCommandBuffer commandBuffer, + const VkCmdProcessCommandsInfoNVX* pProcessCommandsInfo); + +VKAPI_ATTR void VKAPI_CALL vkCmdReserveSpaceForCommandsNVX( + VkCommandBuffer commandBuffer, + const VkCmdReserveSpaceForCommandsInfoNVX* pReserveSpaceInfo); + +VKAPI_ATTR VkResult VKAPI_CALL vkCreateIndirectCommandsLayoutNVX( + VkDevice device, + const VkIndirectCommandsLayoutCreateInfoNVX* pCreateInfo, + const VkAllocationCallbacks* pAllocator, + VkIndirectCommandsLayoutNVX* pIndirectCommandsLayout); + +VKAPI_ATTR void VKAPI_CALL vkDestroyIndirectCommandsLayoutNVX( + VkDevice device, + VkIndirectCommandsLayoutNVX indirectCommandsLayout, + const VkAllocationCallbacks* pAllocator); + +VKAPI_ATTR VkResult VKAPI_CALL vkCreateObjectTableNVX( + VkDevice device, + const VkObjectTableCreateInfoNVX* pCreateInfo, + const VkAllocationCallbacks* pAllocator, + VkObjectTableNVX* pObjectTable); + +VKAPI_ATTR void VKAPI_CALL vkDestroyObjectTableNVX( + VkDevice device, + VkObjectTableNVX objectTable, + const VkAllocationCallbacks* pAllocator); + +VKAPI_ATTR VkResult VKAPI_CALL vkRegisterObjectsNVX( + VkDevice device, + VkObjectTableNVX objectTable, + uint32_t objectCount, + const VkObjectTableEntryNVX* const* ppObjectTableEntries, + const uint32_t* pObjectIndices); + +VKAPI_ATTR VkResult VKAPI_CALL vkUnregisterObjectsNVX( + VkDevice device, + VkObjectTableNVX objectTable, + uint32_t objectCount, + const VkObjectEntryTypeNVX* pObjectEntryTypes, + const uint32_t* pObjectIndices); + +VKAPI_ATTR void VKAPI_CALL vkGetPhysicalDeviceGeneratedCommandsPropertiesNVX( + VkPhysicalDevice physicalDevice, + VkDeviceGeneratedCommandsFeaturesNVX* pFeatures, + VkDeviceGeneratedCommandsLimitsNVX* pLimits); +#endif + #ifdef __cplusplus } #endif diff -Nru mesa-12.0.6/Makefile.am mesa-17.0.7/Makefile.am --- mesa-12.0.6/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -43,8 +43,8 @@ --enable-llvm-shared-libs \ --with-egl-platforms=x11,wayland,drm,surfaceless \ --with-dri-drivers=i915,i965,nouveau,radeon,r200,swrast \ - --with-gallium-drivers=i915,ilo,nouveau,r300,r600,radeonsi,freedreno,svga,swrast,vc4,virgl,swr \ - --with-vulkan-drivers=intel + --with-gallium-drivers=i915,ilo,nouveau,r300,r600,radeonsi,freedreno,svga,swrast,vc4,virgl,swr,etnaviv,imx \ + --with-vulkan-drivers=intel,radeon ACLOCAL_AMFLAGS = -I m4 diff -Nru mesa-12.0.6/Makefile.in mesa-17.0.7/Makefile.in --- mesa-12.0.6/Makefile.in 2017-01-24 01:41:44.000000000 +0000 +++ mesa-17.0.7/Makefile.in 2017-06-01 10:37:19.000000000 +0000 @@ -246,6 +246,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -260,6 +262,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -289,10 +292,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -342,11 +346,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -386,8 +387,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -424,8 +423,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -434,7 +431,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -442,13 +438,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -477,6 +474,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -562,8 +560,8 @@ --enable-llvm-shared-libs \ --with-egl-platforms=x11,wayland,drm,surfaceless \ --with-dri-drivers=i915,i965,nouveau,radeon,r200,swrast \ - --with-gallium-drivers=i915,ilo,nouveau,r300,r600,radeonsi,freedreno,svga,swrast,vc4,virgl,swr \ - --with-vulkan-drivers=intel + --with-gallium-drivers=i915,ilo,nouveau,r300,r600,radeonsi,freedreno,svga,swrast,vc4,virgl,swr,etnaviv,imx \ + --with-vulkan-drivers=intel,radeon ACLOCAL_AMFLAGS = -I m4 EXTRA_DIST = \ diff -Nru mesa-12.0.6/scons/custom.py mesa-17.0.7/scons/custom.py --- mesa-12.0.6/scons/custom.py 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/scons/custom.py 2017-06-01 10:37:10.000000000 +0000 @@ -103,8 +103,14 @@ # http://www.scons.org/doc/0.98.5/HTML/scons-user/c2781.html#AEN2789 # https://docs.python.org/2/library/modulefinder.html contents = node.get_contents() - source_dir = node.get_dir() - finder = modulefinder.ModuleFinder() + + # Tell ModuleFinder to search dependencies in the script dir, and the glapi + # dirs + source_dir = node.get_dir().abspath + GLAPI = env.Dir('#src/mapi/glapi/gen').abspath + path = [source_dir, GLAPI] + sys.path + + finder = modulefinder.ModuleFinder(path=path) finder.run_script(node.abspath) results = [] for name, mod in finder.modules.iteritems(): @@ -275,7 +281,7 @@ # cause duplicate actions. f = f[len(cur_srcdir + '/'):] # do not include any headers - if f.endswith('.h'): + if f.endswith(tuple(['.h','.hpp'])): continue srcs.append(f) diff -Nru mesa-12.0.6/scons/gallium.py mesa-17.0.7/scons/gallium.py --- mesa-12.0.6/scons/gallium.py 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/scons/gallium.py 2017-06-01 10:37:10.000000000 +0000 @@ -256,7 +256,7 @@ if env['build'] == 'profile': env['debug'] = False env['profile'] = True - if env['build'] == 'release': + if env['build'] in ('release', 'opt'): env['debug'] = False env['profile'] = False @@ -301,6 +301,8 @@ cppdefines += ['NDEBUG'] if env['build'] == 'profile': cppdefines += ['PROFILE'] + if env['build'] in ('opt', 'profile'): + cppdefines += ['VMX86_STATS'] if env['platform'] in ('posix', 'linux', 'freebsd', 'darwin'): cppdefines += [ '_POSIX_SOURCE', @@ -321,10 +323,6 @@ 'GLX_DIRECT_RENDERING', 'GLX_INDIRECT_RENDERING', ] - if env['platform'] in ('linux', 'freebsd'): - cppdefines += ['HAVE_ALIAS'] - else: - cppdefines += ['GLX_ALIAS_UNSUPPORTED'] if env['platform'] in ('linux', 'darwin'): cppdefines += ['HAVE_XLOCALE_H'] @@ -450,7 +448,7 @@ ccflags += [ '/O2', # optimize for speed ] - if env['build'] == 'release': + if env['build'] in ('release', 'opt'): if not env['clang']: ccflags += [ '/GL', # enable whole program optimization @@ -561,7 +559,7 @@ shlinkflags += ['-Wl,--enable-stdcall-fixup'] #shlinkflags += ['-Wl,--kill-at'] if msvc: - if env['build'] == 'release' and not env['clang']: + if env['build'] in ('release', 'opt') and not env['clang']: # enable Link-time Code Generation linkflags += ['/LTCG'] env.Append(ARFLAGS = ['/LTCG']) @@ -649,8 +647,7 @@ env.PkgCheckModules('X11', ['x11', 'xext', 'xdamage', 'xfixes', 'glproto >= 1.4.13']) env.PkgCheckModules('XCB', ['x11-xcb', 'xcb-glx >= 1.8.1', 'xcb-dri2 >= 1.8']) env.PkgCheckModules('XF86VIDMODE', ['xxf86vm']) - env.PkgCheckModules('DRM', ['libdrm >= 2.4.38']) - env.PkgCheckModules('UDEV', ['libudev >= 151']) + env.PkgCheckModules('DRM', ['libdrm >= 2.4.66']) if env['x11']: env.Append(CPPPATH = env['X11_CPPPATH']) diff -Nru mesa-12.0.6/scons/llvm.py mesa-17.0.7/scons/llvm.py --- mesa-12.0.6/scons/llvm.py 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/scons/llvm.py 2017-06-01 10:37:10.000000000 +0000 @@ -105,8 +105,43 @@ 'HAVE_STDINT_H', ]) env.Prepend(LIBPATH = [os.path.join(llvm_dir, 'lib')]) - # LIBS should match the output of `llvm-config --libs engine mcjit bitwriter x86asmprinter` - if llvm_version >= distutils.version.LooseVersion('3.7'): + # LIBS should match the output of `llvm-config --libs engine mcjit bitwriter x86asmprinter irreader` + if llvm_version >= distutils.version.LooseVersion('4.0'): + env.Prepend(LIBS = [ + 'LLVMX86Disassembler', 'LLVMX86AsmParser', + 'LLVMX86CodeGen', 'LLVMSelectionDAG', 'LLVMAsmPrinter', + 'LLVMDebugInfoCodeView', 'LLVMCodeGen', + 'LLVMScalarOpts', 'LLVMInstCombine', + 'LLVMTransformUtils', + 'LLVMBitWriter', 'LLVMX86Desc', + 'LLVMMCDisassembler', 'LLVMX86Info', + 'LLVMX86AsmPrinter', 'LLVMX86Utils', + 'LLVMMCJIT', 'LLVMExecutionEngine', 'LLVMTarget', + 'LLVMAnalysis', 'LLVMProfileData', + 'LLVMRuntimeDyld', 'LLVMObject', 'LLVMMCParser', + 'LLVMBitReader', 'LLVMMC', 'LLVMCore', + 'LLVMSupport', + 'LLVMIRReader', 'LLVMAsmParser', + 'LLVMDemangle', 'LLVMGlobalISel', 'LLVMDebugInfoMSF', + ]) + elif llvm_version >= distutils.version.LooseVersion('3.9'): + env.Prepend(LIBS = [ + 'LLVMX86Disassembler', 'LLVMX86AsmParser', + 'LLVMX86CodeGen', 'LLVMSelectionDAG', 'LLVMAsmPrinter', + 'LLVMDebugInfoCodeView', 'LLVMCodeGen', + 'LLVMScalarOpts', 'LLVMInstCombine', + 'LLVMInstrumentation', 'LLVMTransformUtils', + 'LLVMBitWriter', 'LLVMX86Desc', + 'LLVMMCDisassembler', 'LLVMX86Info', + 'LLVMX86AsmPrinter', 'LLVMX86Utils', + 'LLVMMCJIT', 'LLVMExecutionEngine', 'LLVMTarget', + 'LLVMAnalysis', 'LLVMProfileData', + 'LLVMRuntimeDyld', 'LLVMObject', 'LLVMMCParser', + 'LLVMBitReader', 'LLVMMC', 'LLVMCore', + 'LLVMSupport', + 'LLVMIRReader', 'LLVMASMParser' + ]) + elif llvm_version >= distutils.version.LooseVersion('3.7'): env.Prepend(LIBS = [ 'LLVMBitWriter', 'LLVMX86Disassembler', 'LLVMX86AsmParser', 'LLVMX86CodeGen', 'LLVMSelectionDAG', 'LLVMAsmPrinter', @@ -177,11 +212,12 @@ # that. env.Append(LINKFLAGS = ['/nodefaultlib:LIBCMT']) else: - if not env.Detect('llvm-config'): - print 'scons: llvm-config script not found' + llvm_config = os.environ.get('LLVM_CONFIG', 'llvm-config') + if not env.Detect(llvm_config): + print 'scons: %s script not found' % llvm_config return - llvm_version = env.backtick('llvm-config --version').rstrip() + llvm_version = env.backtick('%s --version' % llvm_config).rstrip() llvm_version = distutils.version.LooseVersion(llvm_version) if llvm_version < distutils.version.LooseVersion(required_llvm_version): @@ -191,7 +227,7 @@ try: # Treat --cppflags specially to prevent NDEBUG from disabling # assertion failures in debug builds. - cppflags = env.ParseFlags('!llvm-config --cppflags') + cppflags = env.ParseFlags('!%s --cppflags' % llvm_config) try: cppflags['CPPDEFINES'].remove('NDEBUG') except ValueError: @@ -199,16 +235,16 @@ env.MergeFlags(cppflags) # Match llvm --fno-rtti flag - cxxflags = env.backtick('llvm-config --cxxflags').split() + cxxflags = env.backtick('%s --cxxflags' % llvm_config).split() if '-fno-rtti' in cxxflags: env.Append(CXXFLAGS = ['-fno-rtti']) - components = ['engine', 'mcjit', 'bitwriter', 'x86asmprinter', 'mcdisassembler'] + components = ['engine', 'mcjit', 'bitwriter', 'x86asmprinter', 'mcdisassembler', 'irreader'] - env.ParseConfig('llvm-config --libs ' + ' '.join(components)) - env.ParseConfig('llvm-config --ldflags') + env.ParseConfig('%s --libs ' % llvm_config + ' '.join(components)) + env.ParseConfig('%s --ldflags' % llvm_config) if llvm_version >= distutils.version.LooseVersion('3.5'): - env.ParseConfig('llvm-config --system-libs') + env.ParseConfig('%s --system-libs' % llvm_config) env.Append(CXXFLAGS = ['-std=c++11']) except OSError: print 'scons: llvm-config version %s failed' % llvm_version diff -Nru mesa-12.0.6/src/amd/addrlib/addrinterface.cpp mesa-17.0.7/src/amd/addrlib/addrinterface.cpp --- mesa-12.0.6/src/amd/addrlib/addrinterface.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/addrlib/addrinterface.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,1008 @@ +/* + * Copyright © 2014 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +*************************************************************************************************** +* @file addrinterface.cpp +* @brief Contains the addrlib interface functions +*************************************************************************************************** +*/ +#include "addrinterface.h" +#include "addrlib.h" + +#include "addrcommon.h" + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// Create/Destroy/Config functions +/////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +*************************************************************************************************** +* AddrCreate +* +* @brief +* Create address lib object +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrCreate( + const ADDR_CREATE_INPUT* pAddrCreateIn, ///< [in] infomation for creating address lib object + ADDR_CREATE_OUTPUT* pAddrCreateOut) ///< [out] address lib handle +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + returnCode = AddrLib::Create(pAddrCreateIn, pAddrCreateOut); + + return returnCode; +} + + + +/** +*************************************************************************************************** +* AddrDestroy +* +* @brief +* Destroy address lib object +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrDestroy( + ADDR_HANDLE hLib) ///< [in] address lib handle +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (hLib) + { + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + pLib->Destroy(); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + + + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// Surface functions +/////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +*************************************************************************************************** +* AddrComputeSurfaceInfo +* +* @brief +* Calculate surface width/height/depth/alignments and suitable tiling mode +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceInfo( + ADDR_HANDLE hLib, ///< [in] address lib handle + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] surface information + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) ///< [out] surface parameters and alignments +{ + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeSurfaceInfo(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + + + +/** +*************************************************************************************************** +* AddrComputeSurfaceAddrFromCoord +* +* @brief +* Compute surface address according to coordinates +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceAddrFromCoord( + ADDR_HANDLE hLib, ///< [in] address lib handle + const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ///< [in] surface info and coordinates + ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] surface address +{ + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeSurfaceAddrFromCoord(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrComputeSurfaceCoordFromAddr +* +* @brief +* Compute coordinates according to surface address +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceCoordFromAddr( + ADDR_HANDLE hLib, ///< [in] address lib handle + const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, ///< [in] surface info and address + ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) ///< [out] coordinates +{ + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeSurfaceCoordFromAddr(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + + + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// HTile functions +/////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +*************************************************************************************************** +* AddrComputeHtileInfo +* +* @brief +* Compute Htile pitch, height, base alignment and size in bytes +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeHtileInfo( + ADDR_HANDLE hLib, ///< [in] address lib handle + const ADDR_COMPUTE_HTILE_INFO_INPUT* pIn, ///< [in] Htile information + ADDR_COMPUTE_HTILE_INFO_OUTPUT* pOut) ///< [out] Htile pitch, height and size in bytes +{ + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeHtileInfo(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrComputeHtileAddrFromCoord +* +* @brief +* Compute Htile address according to coordinates (of depth buffer) +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeHtileAddrFromCoord( + ADDR_HANDLE hLib, ///< [in] address lib handle + const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, ///< [in] Htile info and coordinates + ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] Htile address +{ + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeHtileAddrFromCoord(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrComputeHtileCoordFromAddr +* +* @brief +* Compute coordinates within depth buffer (1st pixel of a micro tile) according to +* Htile address +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeHtileCoordFromAddr( + ADDR_HANDLE hLib, ///< [in] address lib handle + const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, ///< [in] Htile info and address + ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut) ///< [out] Htile coordinates +{ + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeHtileCoordFromAddr(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + + + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// C-mask functions +/////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +*************************************************************************************************** +* AddrComputeCmaskInfo +* +* @brief +* Compute Cmask pitch, height, base alignment and size in bytes from color buffer +* info +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskInfo( + ADDR_HANDLE hLib, ///< [in] address lib handle + const ADDR_COMPUTE_CMASK_INFO_INPUT* pIn, ///< [in] Cmask pitch and height + ADDR_COMPUTE_CMASK_INFO_OUTPUT* pOut) ///< [out] Cmask pitch, height and size in bytes +{ + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeCmaskInfo(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrComputeCmaskAddrFromCoord +* +* @brief +* Compute Cmask address according to coordinates (of MSAA color buffer) +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskAddrFromCoord( + ADDR_HANDLE hLib, ///< [in] address lib handle + const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] Cmask info and coordinates + ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] Cmask address +{ + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeCmaskAddrFromCoord(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrComputeCmaskCoordFromAddr +* +* @brief +* Compute coordinates within color buffer (1st pixel of a micro tile) according to +* Cmask address +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskCoordFromAddr( + ADDR_HANDLE hLib, ///< [in] address lib handle + const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn, ///< [in] Cmask info and address + ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut) ///< [out] Cmask coordinates +{ + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeCmaskCoordFromAddr(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + + + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// F-mask functions +/////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +*************************************************************************************************** +* AddrComputeFmaskInfo +* +* @brief +* Compute Fmask pitch/height/depth/alignments and size in bytes +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskInfo( + ADDR_HANDLE hLib, ///< [in] address lib handle + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, ///< [in] Fmask information + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut) ///< [out] Fmask pitch and height +{ + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeFmaskInfo(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrComputeFmaskAddrFromCoord +* +* @brief +* Compute Fmask address according to coordinates (x,y,slice,sample,plane) +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskAddrFromCoord( + ADDR_HANDLE hLib, ///< [in] address lib handle + const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] Fmask info and coordinates + ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] Fmask address +{ + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeFmaskAddrFromCoord(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrComputeFmaskCoordFromAddr +* +* @brief +* Compute coordinates (x,y,slice,sample,plane) according to Fmask address +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskCoordFromAddr( + ADDR_HANDLE hLib, ///< [in] address lib handle + const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, ///< [in] Fmask info and address + ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) ///< [out] Fmask coordinates +{ + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ComputeFmaskCoordFromAddr(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + + + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// DCC key functions +/////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +*************************************************************************************************** +* AddrComputeDccInfo +* +* @brief +* Compute DCC key size, base alignment based on color surface size, tile info or tile index +* +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeDccInfo( + ADDR_HANDLE hLib, ///< [in] handle of addrlib + const ADDR_COMPUTE_DCCINFO_INPUT* pIn, ///< [in] input + ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) ///< [out] output +{ + ADDR_E_RETURNCODE returnCode; + + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + + if (pLib != NULL) + { + returnCode = pLib->ComputeDccInfo(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + + + +/////////////////////////////////////////////////////////////////////////////// +// Below functions are element related or helper functions +/////////////////////////////////////////////////////////////////////////////// + +/** +*************************************************************************************************** +* AddrGetVersion +* +* @brief +* Get AddrLib version number. Client may check this return value against ADDRLIB_VERSION +* defined in addrinterface.h to see if there is a mismatch. +*************************************************************************************************** +*/ +UINT_32 ADDR_API AddrGetVersion(ADDR_HANDLE hLib) +{ + UINT_32 version = 0; + + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + + ADDR_ASSERT(pLib != NULL); + + if (pLib) + { + version = pLib->GetVersion(); + } + + return version; +} + +/** +*************************************************************************************************** +* AddrUseTileIndex +* +* @brief +* Return TRUE if tileIndex is enabled in this address library +*************************************************************************************************** +*/ +BOOL_32 ADDR_API AddrUseTileIndex(ADDR_HANDLE hLib) +{ + BOOL_32 useTileIndex = FALSE; + + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + + ADDR_ASSERT(pLib != NULL); + + if (pLib) + { + useTileIndex = pLib->UseTileIndex(0); + } + + return useTileIndex; +} + +/** +*************************************************************************************************** +* AddrUseCombinedSwizzle +* +* @brief +* Return TRUE if combined swizzle is enabled in this address library +*************************************************************************************************** +*/ +BOOL_32 ADDR_API AddrUseCombinedSwizzle(ADDR_HANDLE hLib) +{ + BOOL_32 useCombinedSwizzle = FALSE; + + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + + ADDR_ASSERT(pLib != NULL); + + if (pLib) + { + useCombinedSwizzle = pLib->UseCombinedSwizzle(); + } + + return useCombinedSwizzle; +} + +/** +*************************************************************************************************** +* AddrExtractBankPipeSwizzle +* +* @brief +* Extract Bank and Pipe swizzle from base256b +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrExtractBankPipeSwizzle( + ADDR_HANDLE hLib, ///< [in] addrlib handle + const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, ///< [in] input structure + ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) ///< [out] output structure +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + + if (pLib != NULL) + { + returnCode = pLib->ExtractBankPipeSwizzle(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrCombineBankPipeSwizzle +* +* @brief +* Combine Bank and Pipe swizzle +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrCombineBankPipeSwizzle( + ADDR_HANDLE hLib, + const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT* pIn, + ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT* pOut) +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + + if (pLib != NULL) + { + returnCode = pLib->CombineBankPipeSwizzle(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrComputeSliceSwizzle +* +* @brief +* Compute a swizzle for slice from a base swizzle +* @return +* ADDR_OK if no error +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeSliceSwizzle( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, + ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + + if (pLib != NULL) + { + returnCode = pLib->ComputeSliceTileSwizzle(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrComputeBaseSwizzle +* +* @brief +* Return a Combined Bank and Pipe swizzle base on surface based on surface type/index +* @return +* ADDR_OK if no error +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeBaseSwizzle( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, + ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + + if (pLib != NULL) + { + returnCode = pLib->ComputeBaseSwizzle(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +*************************************************************************************************** +* ElemFlt32ToDepthPixel +* +* @brief +* Convert a FLT_32 value to a depth/stencil pixel value +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +* +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API ElemFlt32ToDepthPixel( + ADDR_HANDLE hLib, ///< [in] addrlib handle + const ELEM_FLT32TODEPTHPIXEL_INPUT* pIn, ///< [in] per-component value + ELEM_FLT32TODEPTHPIXEL_OUTPUT* pOut) ///< [out] final pixel value +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + + if (pLib != NULL) + { + pLib->Flt32ToDepthPixel(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +*************************************************************************************************** +* ElemFlt32ToColorPixel +* +* @brief +* Convert a FLT_32 value to a red/green/blue/alpha pixel value +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +* +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API ElemFlt32ToColorPixel( + ADDR_HANDLE hLib, ///< [in] addrlib handle + const ELEM_FLT32TOCOLORPIXEL_INPUT* pIn, ///< [in] format, surface number and swap value + ELEM_FLT32TOCOLORPIXEL_OUTPUT* pOut) ///< [out] final pixel value +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + + if (pLib != NULL) + { + pLib->Flt32ToColorPixel(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +*************************************************************************************************** +* ElemGetExportNorm +* +* @brief +* Helper function to check one format can be EXPORT_NUM, +* which is a register CB_COLOR_INFO.SURFACE_FORMAT. +* FP16 can be reported as EXPORT_NORM for rv770 in r600 +* family +* +*************************************************************************************************** +*/ +BOOL_32 ADDR_API ElemGetExportNorm( + ADDR_HANDLE hLib, ///< [in] addrlib handle + const ELEM_GETEXPORTNORM_INPUT* pIn) ///< [in] input structure +{ + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + BOOL_32 enabled = FALSE; + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + enabled = pLib->GetExportNorm(pIn); + } + else + { + returnCode = ADDR_ERROR; + } + + ADDR_ASSERT(returnCode == ADDR_OK); + + return enabled; +} + +/** +*************************************************************************************************** +* AddrConvertTileInfoToHW +* +* @brief +* Convert tile info from real value to hardware register value +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrConvertTileInfoToHW( + ADDR_HANDLE hLib, ///< [in] address lib handle + const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, ///< [in] tile info with real value + ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) ///< [out] tile info with HW register value +{ + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ConvertTileInfoToHW(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrConvertTileIndex +* +* @brief +* Convert tile index to tile mode/type/info +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex( + ADDR_HANDLE hLib, ///< [in] address lib handle + const ADDR_CONVERT_TILEINDEX_INPUT* pIn, ///< [in] input - tile index + ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) ///< [out] tile mode/type/info +{ + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ConvertTileIndex(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrConvertTileIndex1 +* +* @brief +* Convert tile index to tile mode/type/info +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex1( + ADDR_HANDLE hLib, ///< [in] address lib handle + const ADDR_CONVERT_TILEINDEX1_INPUT* pIn, ///< [in] input - tile index + ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) ///< [out] tile mode/type/info +{ + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->ConvertTileIndex1(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrGetTileIndex +* +* @brief +* Get tile index from tile mode/type/info +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +* +* @note +* Only meaningful for SI (and above) +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrGetTileIndex( + ADDR_HANDLE hLib, + const ADDR_GET_TILEINDEX_INPUT* pIn, + ADDR_GET_TILEINDEX_OUTPUT* pOut) +{ + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->GetTileIndex(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrComputePrtInfo +* +* @brief +* Interface function for ComputePrtInfo +* +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputePrtInfo( + ADDR_HANDLE hLib, + const ADDR_PRT_INFO_INPUT* pIn, + ADDR_PRT_INFO_OUTPUT* pOut) +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + AddrLib* pLib = AddrLib::GetAddrLib(hLib); + + if (pLib != NULL) + { + returnCode = pLib->ComputePrtInfo(pIn, pOut); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + diff -Nru mesa-12.0.6/src/amd/addrlib/addrinterface.h mesa-17.0.7/src/amd/addrlib/addrinterface.h --- mesa-12.0.6/src/amd/addrlib/addrinterface.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/addrlib/addrinterface.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,2166 @@ +/* + * Copyright © 2014 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +*************************************************************************************************** +* @file addrinterface.h +* @brief Contains the addrlib interfaces declaration and parameter defines +*************************************************************************************************** +*/ +#ifndef __ADDR_INTERFACE_H__ +#define __ADDR_INTERFACE_H__ + +#include "addrtypes.h" + +#if defined(__cplusplus) +extern "C" +{ +#endif + +#define ADDRLIB_VERSION_MAJOR 5 +#define ADDRLIB_VERSION_MINOR 25 +#define ADDRLIB_VERSION ((ADDRLIB_VERSION_MAJOR << 16) | ADDRLIB_VERSION_MINOR) + +/// Virtually all interface functions need ADDR_HANDLE as first parameter +typedef VOID* ADDR_HANDLE; + +/// Client handle used in callbacks +typedef VOID* ADDR_CLIENT_HANDLE; + +/** +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* // Callback functions +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* typedef VOID* (ADDR_API* ADDR_ALLOCSYSMEM)( +* const ADDR_ALLOCSYSMEM_INPUT* pInput); +* typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_FREESYSMEM)( +* VOID* pVirtAddr); +* typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_DEBUGPRINT)( +* const ADDR_DEBUGPRINT_INPUT* pInput); +* +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* // Create/Destroy/Config functions +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* AddrCreate() +* AddrDestroy() +* +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* // Surface functions +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* AddrComputeSurfaceInfo() +* AddrComputeSurfaceAddrFromCoord() +* AddrComputeSurfaceCoordFromAddr() +* +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* // HTile functions +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* AddrComputeHtileInfo() +* AddrComputeHtileAddrFromCoord() +* AddrComputeHtileCoordFromAddr() +* +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* // C-mask functions +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* AddrComputeCmaskInfo() +* AddrComputeCmaskAddrFromCoord() +* AddrComputeCmaskCoordFromAddr() +* +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* // F-mask functions +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* AddrComputeFmaskInfo() +* AddrComputeFmaskAddrFromCoord() +* AddrComputeFmaskCoordFromAddr() +* +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* // Element/Utility functions +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* ElemFlt32ToDepthPixel() +* ElemFlt32ToColorPixel() +* AddrExtractBankPipeSwizzle() +* AddrCombineBankPipeSwizzle() +* AddrComputeSliceSwizzle() +* AddrConvertTileInfoToHW() +* AddrConvertTileIndex() +* AddrConvertTileIndex1() +* AddrGetTileIndex() +* AddrComputeBaseSwizzle() +* AddrUseTileIndex() +* AddrUseCombinedSwizzle() +* +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* // Dump functions +* ///////////////////////////////////////////////////////////////////////////////////////////////// +* AddrDumpSurfaceInfo() +* AddrDumpFmaskInfo() +* AddrDumpCmaskInfo() +* AddrDumpHtileInfo() +* +**/ + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// Callback functions +/////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +*************************************************************************************************** +* @brief Alloc system memory flags. +* @note These flags are reserved for future use and if flags are added will minimize the impact +* of the client. +*************************************************************************************************** +*/ +typedef union _ADDR_ALLOCSYSMEM_FLAGS +{ + struct + { + UINT_32 reserved : 32; ///< Reserved for future use. + } fields; + UINT_32 value; + +} ADDR_ALLOCSYSMEM_FLAGS; + +/** +*************************************************************************************************** +* @brief Alloc system memory input structure +*************************************************************************************************** +*/ +typedef struct _ADDR_ALLOCSYSMEM_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + ADDR_ALLOCSYSMEM_FLAGS flags; ///< System memory flags. + UINT_32 sizeInBytes; ///< System memory allocation size in bytes. + ADDR_CLIENT_HANDLE hClient; ///< Client handle +} ADDR_ALLOCSYSMEM_INPUT; + +/** +*************************************************************************************************** +* ADDR_ALLOCSYSMEM +* @brief +* Allocate system memory callback function. Returns valid pointer on success. +*************************************************************************************************** +*/ +typedef VOID* (ADDR_API* ADDR_ALLOCSYSMEM)( + const ADDR_ALLOCSYSMEM_INPUT* pInput); + +/** +*************************************************************************************************** +* @brief Free system memory input structure +*************************************************************************************************** +*/ +typedef struct _ADDR_FREESYSMEM_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + VOID* pVirtAddr; ///< Virtual address + ADDR_CLIENT_HANDLE hClient; ///< Client handle +} ADDR_FREESYSMEM_INPUT; + +/** +*************************************************************************************************** +* ADDR_FREESYSMEM +* @brief +* Free system memory callback function. +* Returns ADDR_OK on success. +*************************************************************************************************** +*/ +typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_FREESYSMEM)( + const ADDR_FREESYSMEM_INPUT* pInput); + +/** +*************************************************************************************************** +* @brief Print debug message input structure +*************************************************************************************************** +*/ +typedef struct _ADDR_DEBUGPRINT_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + CHAR* pDebugString; ///< Debug print string + va_list ap; ///< Variable argument list + ADDR_CLIENT_HANDLE hClient; ///< Client handle +} ADDR_DEBUGPRINT_INPUT; + +/** +*************************************************************************************************** +* ADDR_DEBUGPRINT +* @brief +* Print debug message callback function. +* Returns ADDR_OK on success. +*************************************************************************************************** +*/ +typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_DEBUGPRINT)( + const ADDR_DEBUGPRINT_INPUT* pInput); + +/** +*************************************************************************************************** +* ADDR_CALLBACKS +* +* @brief +* Address Library needs client to provide system memory alloc/free routines. +*************************************************************************************************** +*/ +typedef struct _ADDR_CALLBACKS +{ + ADDR_ALLOCSYSMEM allocSysMem; ///< Routine to allocate system memory + ADDR_FREESYSMEM freeSysMem; ///< Routine to free system memory + ADDR_DEBUGPRINT debugPrint; ///< Routine to print debug message +} ADDR_CALLBACKS; + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// Create/Destroy functions +/////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +*************************************************************************************************** +* ADDR_CREATE_FLAGS +* +* @brief +* This structure is used to pass some setup in creation of AddrLib +* @note +*************************************************************************************************** +*/ +typedef union _ADDR_CREATE_FLAGS +{ + struct + { + UINT_32 noCubeMipSlicesPad : 1; ///< Turn cubemap faces padding off + UINT_32 fillSizeFields : 1; ///< If clients fill size fields in all input and + /// output structure + UINT_32 useTileIndex : 1; ///< Make tileIndex field in input valid + UINT_32 useCombinedSwizzle : 1; ///< Use combined tile swizzle + UINT_32 checkLast2DLevel : 1; ///< Check the last 2D mip sub level + UINT_32 useHtileSliceAlign : 1; ///< Do htile single slice alignment + UINT_32 degradeBaseLevel : 1; ///< Degrade to 1D modes automatically for base level + UINT_32 allowLargeThickTile : 1; ///< Allow 64*thickness*bytesPerPixel > rowSize + UINT_32 reserved : 24; ///< Reserved bits for future use + }; + + UINT_32 value; +} ADDR_CREATE_FLAGS; + +/** +*************************************************************************************************** +* ADDR_REGISTER_VALUE +* +* @brief +* Data from registers to setup AddrLib global data, used in AddrCreate +*************************************************************************************************** +*/ +typedef struct _ADDR_REGISTER_VALUE +{ + UINT_32 gbAddrConfig; ///< For R8xx, use GB_ADDR_CONFIG register value. + /// For R6xx/R7xx, use GB_TILING_CONFIG. + /// But they can be treated as the same. + /// if this value is 0, use chip to set default value + UINT_32 backendDisables; ///< 1 bit per backend, starting with LSB. 1=disabled,0=enabled. + /// Register value of CC_RB_BACKEND_DISABLE.BACKEND_DISABLE + + /// R800 registers----------------------------------------------- + UINT_32 noOfBanks; ///< Number of h/w ram banks - For r800: MC_ARB_RAMCFG.NOOFBANK + /// No enums for this value in h/w header files + /// 0: 4 + /// 1: 8 + /// 2: 16 + UINT_32 noOfRanks; /// MC_ARB_RAMCFG.NOOFRANK + /// 0: 1 + /// 1: 2 + /// SI (R1000) registers----------------------------------------- + const UINT_32* pTileConfig; ///< Global tile setting tables + UINT_32 noOfEntries; ///< Number of entries in pTileConfig + + ///< CI registers------------------------------------------------- + const UINT_32* pMacroTileConfig; ///< Global macro tile mode table + UINT_32 noOfMacroEntries; ///< Number of entries in pMacroTileConfig + +} ADDR_REGISTER_VALUE; + +/** +*************************************************************************************************** +* ADDR_CREATE_INPUT +* +* @brief +* Parameters use to create an AddrLib Object. Caller must provide all fields. +* +*************************************************************************************************** +*/ +typedef struct _ADDR_CREATE_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 chipEngine; ///< Chip Engine + UINT_32 chipFamily; ///< Chip Family + UINT_32 chipRevision; ///< Chip Revision + ADDR_CALLBACKS callbacks; ///< Callbacks for sysmem alloc/free/print + ADDR_CREATE_FLAGS createFlags; ///< Flags to setup AddrLib + ADDR_REGISTER_VALUE regValue; ///< Data from registers to setup AddrLib global data + ADDR_CLIENT_HANDLE hClient; ///< Client handle + UINT_32 minPitchAlignPixels; ///< Minimum pitch alignment in pixels +} ADDR_CREATE_INPUT; + +/** +*************************************************************************************************** +* ADDR_CREATEINFO_OUTPUT +* +* @brief +* Return AddrLib handle to client driver +* +*************************************************************************************************** +*/ +typedef struct _ADDR_CREATE_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + ADDR_HANDLE hLib; ///< Address lib handle +} ADDR_CREATE_OUTPUT; + +/** +*************************************************************************************************** +* AddrCreate +* +* @brief +* Create AddrLib object, must be called before any interface calls +* +* @return +* ADDR_OK if successful +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrCreate( + const ADDR_CREATE_INPUT* pAddrCreateIn, + ADDR_CREATE_OUTPUT* pAddrCreateOut); + + + +/** +*************************************************************************************************** +* AddrDestroy +* +* @brief +* Destroy AddrLib object, must be called to free internally allocated resources. +* +* @return +* ADDR_OK if successful +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrDestroy( + ADDR_HANDLE hLib); + + + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// Surface functions +/////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +*************************************************************************************************** +* @brief +* Bank/tiling parameters. On function input, these can be set as desired or +* left 0 for AddrLib to calculate/default. On function output, these are the actual +* parameters used. +* @note +* Valid bankWidth/bankHeight value: +* 1,2,4,8. They are factors instead of pixels or bytes. +* +* The bank number remains constant across each row of the +* macro tile as each pipe is selected, so the number of +* tiles in the x direction with the same bank number will +* be bank_width * num_pipes. +*************************************************************************************************** +*/ +typedef struct _ADDR_TILEINFO +{ + /// Any of these parameters can be set to 0 to use the HW default. + UINT_32 banks; ///< Number of banks, numerical value + UINT_32 bankWidth; ///< Number of tiles in the X direction in the same bank + UINT_32 bankHeight; ///< Number of tiles in the Y direction in the same bank + UINT_32 macroAspectRatio; ///< Macro tile aspect ratio. 1-1:1, 2-4:1, 4-16:1, 8-64:1 + UINT_32 tileSplitBytes; ///< Tile split size, in bytes + AddrPipeCfg pipeConfig; ///< Pipe Config = HW enum + 1 +} ADDR_TILEINFO; + +// Create a define to avoid client change. The removal of R800 is because we plan to implement SI +// within 800 HWL - An AddrPipeCfg is added in above data structure +typedef ADDR_TILEINFO ADDR_R800_TILEINFO; + +/** +*************************************************************************************************** +* @brief +* Information needed by quad buffer stereo support +*************************************************************************************************** +*/ +typedef struct _ADDR_QBSTEREOINFO +{ + UINT_32 eyeHeight; ///< Height (in pixel rows) to right eye + UINT_32 rightOffset; ///< Offset (in bytes) to right eye + UINT_32 rightSwizzle; ///< TileSwizzle for right eyes +} ADDR_QBSTEREOINFO; + +/** +*************************************************************************************************** +* ADDR_SURFACE_FLAGS +* +* @brief +* Surface flags +*************************************************************************************************** +*/ +typedef union _ADDR_SURFACE_FLAGS +{ + struct + { + UINT_32 color : 1; ///< Flag indicates this is a color buffer + UINT_32 depth : 1; ///< Flag indicates this is a depth/stencil buffer + UINT_32 stencil : 1; ///< Flag indicates this is a stencil buffer + UINT_32 texture : 1; ///< Flag indicates this is a texture + UINT_32 cube : 1; ///< Flag indicates this is a cubemap + + UINT_32 volume : 1; ///< Flag indicates this is a volume texture + UINT_32 fmask : 1; ///< Flag indicates this is an fmask + UINT_32 cubeAsArray : 1; ///< Flag indicates if treat cubemap as arrays + UINT_32 compressZ : 1; ///< Flag indicates z buffer is compressed + UINT_32 overlay : 1; ///< Flag indicates this is an overlay surface + UINT_32 noStencil : 1; ///< Flag indicates this depth has no separate stencil + UINT_32 display : 1; ///< Flag indicates this should match display controller req. + UINT_32 opt4Space : 1; ///< Flag indicates this surface should be optimized for space + /// i.e. save some memory but may lose performance + UINT_32 prt : 1; ///< Flag for partially resident texture + UINT_32 qbStereo : 1; ///< Quad buffer stereo surface + UINT_32 pow2Pad : 1; ///< SI: Pad to pow2, must set for mipmap (include level0) + UINT_32 interleaved : 1; ///< Special flag for interleaved YUV surface padding + UINT_32 degrade4Space : 1; ///< Degrade base level's tile mode to save memory + UINT_32 tcCompatible : 1; ///< Flag indicates surface needs to be shader readable + UINT_32 dispTileType : 1; ///< NI: force display Tiling for 128 bit shared resoruce + UINT_32 dccCompatible : 1; ///< VI: whether to support dcc fast clear + UINT_32 czDispCompatible: 1; ///< SI+: CZ family (Carrizo) has a HW bug needs special alignment. + ///< This flag indicates we need to follow the alignment with + ///< CZ families or other ASICs under PX configuration + CZ. + UINT_32 reserved :10; ///< Reserved bits + }; + + UINT_32 value; +} ADDR_SURFACE_FLAGS; + +/** +*************************************************************************************************** +* ADDR_COMPUTE_SURFACE_INFO_INPUT +* +* @brief +* Input structure for AddrComputeSurfaceInfo +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_SURFACE_INFO_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + AddrTileMode tileMode; ///< Tile mode + AddrFormat format; ///< If format is set to valid one, bpp/width/height + /// might be overwritten + UINT_32 bpp; ///< Bits per pixel + UINT_32 numSamples; ///< Number of samples + UINT_32 width; ///< Width, in pixels + UINT_32 height; ///< Height, in pixels + UINT_32 numSlices; ///< Number surface slice/depth, + /// Note: + /// For cubemap, driver clients usually set numSlices + /// to 1 in per-face calc. + /// For 7xx and above, we need pad faces as slices. + /// In this case, clients should set numSlices to 6 and + /// this is also can be turned off by createFlags when + /// calling AddrCreate + UINT_32 slice; ///< Slice index + UINT_32 mipLevel; ///< Current mipmap level. + /// Padding/tiling have different rules for level0 and + /// sublevels + ADDR_SURFACE_FLAGS flags; ///< Surface type flags + UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as + /// number of samples for normal AA; Set it to the + /// number of fragments for EQAA + /// r800 and later HWL parameters + // Needed by 2D tiling, for linear and 1D tiling, just keep them 0's + ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Set to 0 to default/calculate + AddrTileType tileType; ///< Micro tiling type, not needed when tileIndex != -1 + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + UINT_32 basePitch; ///< Base level pitch in pixels, 0 means ignored, is a + /// must for mip levels from SI+. + /// Don't use pitch in blocks for compressed formats! +} ADDR_COMPUTE_SURFACE_INFO_INPUT; + +/** +*************************************************************************************************** +* ADDR_COMPUTE_SURFACE_INFO_OUTPUT +* +* @brief +* Output structure for AddrComputeSurfInfo +* @note + Element: AddrLib unit for computing. e.g. BCn: 4x4 blocks; R32B32B32: 32bit with 3x pitch + Pixel: Original pixel +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_SURFACE_INFO_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 pitch; ///< Pitch in elements (in blocks for compressed formats) + UINT_32 height; ///< Height in elements (in blocks for compressed formats) + UINT_32 depth; ///< Number of slice/depth + UINT_64 surfSize; ///< Surface size in bytes + AddrTileMode tileMode; ///< Actual tile mode. May differ from that in input + UINT_32 baseAlign; ///< Base address alignment + UINT_32 pitchAlign; ///< Pitch alignment, in elements + UINT_32 heightAlign; ///< Height alignment, in elements + UINT_32 depthAlign; ///< Depth alignment, aligned to thickness, for 3d texture + UINT_32 bpp; ///< Bits per elements (e.g. blocks for BCn, 1/3 for 96bit) + UINT_32 pixelPitch; ///< Pitch in original pixels + UINT_32 pixelHeight; ///< Height in original pixels + UINT_32 pixelBits; ///< Original bits per pixel, passed from input + UINT_64 sliceSize; ///< Size of slice specified by input's slice + /// The result is controlled by surface flags & createFlags + /// By default this value equals to surfSize for volume + UINT_32 pitchTileMax; ///< PITCH_TILE_MAX value for h/w register + UINT_32 heightTileMax; ///< HEIGHT_TILE_MAX value for h/w register + UINT_32 sliceTileMax; ///< SLICE_TILE_MAX value for h/w register + + UINT_32 numSamples; ///< Pass the effective numSamples processed in this call + + /// r800 and later HWL parameters + ADDR_TILEINFO* pTileInfo; ///< Tile parameters used. Filled in if 0 on input + AddrTileType tileType; ///< Micro tiling type, only valid when tileIndex != -1 + INT_32 tileIndex; ///< Tile index, MAY be "downgraded" + + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + /// Special information to work around SI mipmap swizzle bug UBTS #317508 + BOOL_32 last2DLevel; ///< TRUE if this is the last 2D(3D) tiled + ///< Only meaningful when create flag checkLast2DLevel is set + /// Stereo info + ADDR_QBSTEREOINFO* pStereoInfo;///< Stereo information, needed when .qbStereo flag is TRUE +} ADDR_COMPUTE_SURFACE_INFO_OUTPUT; + +/** +*************************************************************************************************** +* AddrComputeSurfaceInfo +* +* @brief +* Compute surface width/height/depth/alignments and suitable tiling mode +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceInfo( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut); + + + +/** +*************************************************************************************************** +* ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT +* +* @brief +* Input structure for AddrComputeSurfaceAddrFromCoord +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 x; ///< X coordinate + UINT_32 y; ///< Y coordinate + UINT_32 slice; ///< Slice index + UINT_32 sample; ///< Sample index, use fragment index for EQAA + + UINT_32 bpp; ///< Bits per pixel + UINT_32 pitch; ///< Surface pitch, in pixels + UINT_32 height; ///< Surface height, in pixels + UINT_32 numSlices; ///< Surface depth + UINT_32 numSamples; ///< Number of samples + + AddrTileMode tileMode; ///< Tile mode + BOOL_32 isDepth; ///< TRUE if the surface uses depth sample ordering within + /// micro tile. Textures can also choose depth sample order + UINT_32 tileBase; ///< Base offset (in bits) inside micro tile which handles + /// the case that components are stored separately + UINT_32 compBits; ///< The component bits actually needed(for planar surface) + + UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as + /// number of samples for normal AA; Set it to the + /// number of fragments for EQAA + /// r800 and later HWL parameters + // Used for 1D tiling above + AddrTileType tileType; ///< See defintion of AddrTileType + struct + { + UINT_32 ignoreSE : 1; ///< TRUE if shader engines are ignored. This is texture + /// only flag. Only non-RT texture can set this to TRUE + UINT_32 reserved :31; ///< Reserved for future use. + }; + // 2D tiling needs following structure + ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + union + { + struct + { + UINT_32 bankSwizzle; ///< Bank swizzle + UINT_32 pipeSwizzle; ///< Pipe swizzle + }; + UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE + }; + +#if ADDR_AM_BUILD // These two fields are not valid in SW blt since no HTILE access + UINT_32 addr5Swizzle; ///< ADDR5_SWIZZLE_MASK of DB_DEPTH_INFO + BOOL_32 is32ByteTile; ///< Caller must have access to HTILE buffer and know if + /// this tile is compressed to 32B +#endif +} ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT; + +/** +*************************************************************************************************** +* ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT +* +* @brief +* Output structure for AddrComputeSurfaceAddrFromCoord +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_64 addr; ///< Byte address + UINT_32 bitPosition; ///< Bit position within surfaceAddr, 0-7. + /// For surface bpp < 8, e.g. FMT_1. + UINT_32 prtBlockIndex; ///< Index of a PRT tile (64K block) +} ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT; + +/** +*************************************************************************************************** +* AddrComputeSurfaceAddrFromCoord +* +* @brief +* Compute surface address from a given coordinate. +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceAddrFromCoord( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut); + + + +/** +*************************************************************************************************** +* ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT +* +* @brief +* Input structure for AddrComputeSurfaceCoordFromAddr +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_64 addr; ///< Address in bytes + UINT_32 bitPosition; ///< Bit position in addr. 0-7. for surface bpp < 8, + /// e.g. FMT_1; + UINT_32 bpp; ///< Bits per pixel + UINT_32 pitch; ///< Pitch, in pixels + UINT_32 height; ///< Height in pixels + UINT_32 numSlices; ///< Surface depth + UINT_32 numSamples; ///< Number of samples + + AddrTileMode tileMode; ///< Tile mode + BOOL_32 isDepth; ///< Surface uses depth sample ordering within micro tile. + /// Note: Textures can choose depth sample order as well. + UINT_32 tileBase; ///< Base offset (in bits) inside micro tile which handles + /// the case that components are stored separately + UINT_32 compBits; ///< The component bits actually needed(for planar surface) + + UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as + /// number of samples for normal AA; Set it to the + /// number of fragments for EQAA + /// r800 and later HWL parameters + // Used for 1D tiling above + AddrTileType tileType; ///< See defintion of AddrTileType + struct + { + UINT_32 ignoreSE : 1; ///< TRUE if shader engines are ignored. This is texture + /// only flag. Only non-RT texture can set this to TRUE + UINT_32 reserved :31; ///< Reserved for future use. + }; + // 2D tiling needs following structure + ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + union + { + struct + { + UINT_32 bankSwizzle; ///< Bank swizzle + UINT_32 pipeSwizzle; ///< Pipe swizzle + }; + UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE + }; +} ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT; + +/** +*************************************************************************************************** +* ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT +* +* @brief +* Output structure for AddrComputeSurfaceCoordFromAddr +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 x; ///< X coordinate + UINT_32 y; ///< Y coordinate + UINT_32 slice; ///< Index of slices + UINT_32 sample; ///< Index of samples, means fragment index for EQAA +} ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT; + +/** +*************************************************************************************************** +* AddrComputeSurfaceCoordFromAddr +* +* @brief +* Compute coordinate from a given surface address +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceCoordFromAddr( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut); + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// HTile functions +/////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +*************************************************************************************************** +* ADDR_HTILE_FLAGS +* +* @brief +* HTILE flags +*************************************************************************************************** +*/ +typedef union _ADDR_HTILE_FLAGS +{ + struct + { + UINT_32 tcCompatible : 1; ///< Flag indicates surface needs to be shader readable + UINT_32 reserved :31; ///< Reserved bits + }; + + UINT_32 value; +} ADDR_HTILE_FLAGS; + +/** +*************************************************************************************************** +* ADDR_COMPUTE_HTILE_INFO_INPUT +* +* @brief +* Input structure of AddrComputeHtileInfo +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_HTILE_INFO_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + ADDR_HTILE_FLAGS flags; ///< HTILE flags + UINT_32 pitch; ///< Surface pitch, in pixels + UINT_32 height; ///< Surface height, in pixels + UINT_32 numSlices; ///< Number of slices + BOOL_32 isLinear; ///< Linear or tiled HTILE layout + AddrHtileBlockSize blockWidth; ///< 4 or 8. EG above only support 8 + AddrHtileBlockSize blockHeight; ///< 4 or 8. EG above only support 8 + ADDR_TILEINFO* pTileInfo; ///< Tile info + + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + ///< README: When tileIndex is not -1, this must be valid +} ADDR_COMPUTE_HTILE_INFO_INPUT; + +/** +*************************************************************************************************** +* ADDR_COMPUTE_HTILE_INFO_OUTPUT +* +* @brief +* Output structure of AddrComputeHtileInfo +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_HTILE_INFO_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 pitch; ///< Pitch in pixels of depth buffer represented in this + /// HTile buffer. This might be larger than original depth + /// buffer pitch when called with an unaligned pitch. + UINT_32 height; ///< Height in pixels, as above + UINT_64 htileBytes; ///< Size of HTILE buffer, in bytes + UINT_32 baseAlign; ///< Base alignment + UINT_32 bpp; ///< Bits per pixel for HTILE is how many bits for an 8x8 block! + UINT_32 macroWidth; ///< Macro width in pixels, actually squared cache shape + UINT_32 macroHeight; ///< Macro height in pixels + UINT_64 sliceSize; ///< Slice size, in bytes. +} ADDR_COMPUTE_HTILE_INFO_OUTPUT; + +/** +*************************************************************************************************** +* AddrComputeHtileInfo +* +* @brief +* Compute Htile pitch, height, base alignment and size in bytes +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeHtileInfo( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_HTILE_INFO_INPUT* pIn, + ADDR_COMPUTE_HTILE_INFO_OUTPUT* pOut); + + + +/** +*************************************************************************************************** +* ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT +* +* @brief +* Input structure for AddrComputeHtileAddrFromCoord +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 pitch; ///< Pitch, in pixels + UINT_32 height; ///< Height in pixels + UINT_32 x; ///< X coordinate + UINT_32 y; ///< Y coordinate + UINT_32 slice; ///< Index of slice + UINT_32 numSlices; ///< Number of slices + BOOL_32 isLinear; ///< Linear or tiled HTILE layout + AddrHtileBlockSize blockWidth; ///< 4 or 8. 1 means 8, 0 means 4. EG above only support 8 + AddrHtileBlockSize blockHeight; ///< 4 or 8. 1 means 8, 0 means 4. EG above only support 8 + ADDR_TILEINFO* pTileInfo; ///< Tile info + + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + ///< README: When tileIndex is not -1, this must be valid +} ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT; + +/** +*************************************************************************************************** +* ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT +* +* @brief +* Output structure for AddrComputeHtileAddrFromCoord +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_64 addr; ///< Address in bytes + UINT_32 bitPosition; ///< Bit position, 0 or 4. CMASK and HTILE shares some lib method. + /// So we keep bitPosition for HTILE as well +} ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT; + +/** +*************************************************************************************************** +* AddrComputeHtileAddrFromCoord +* +* @brief +* Compute Htile address according to coordinates (of depth buffer) +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeHtileAddrFromCoord( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut); + + + +/** +*************************************************************************************************** +* ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT +* +* @brief +* Input structure for AddrComputeHtileCoordFromAddr +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_64 addr; ///< Address + UINT_32 bitPosition; ///< Bit position 0 or 4. CMASK and HTILE share some methods + /// so we keep bitPosition for HTILE as well + UINT_32 pitch; ///< Pitch, in pixels + UINT_32 height; ///< Height, in pixels + UINT_32 numSlices; ///< Number of slices + BOOL_32 isLinear; ///< Linear or tiled HTILE layout + AddrHtileBlockSize blockWidth; ///< 4 or 8. 1 means 8, 0 means 4. R8xx/R9xx only support 8 + AddrHtileBlockSize blockHeight; ///< 4 or 8. 1 means 8, 0 means 4. R8xx/R9xx only support 8 + ADDR_TILEINFO* pTileInfo; ///< Tile info + + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + ///< README: When tileIndex is not -1, this must be valid +} ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT; + +/** +*************************************************************************************************** +* ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT +* +* @brief +* Output structure for AddrComputeHtileCoordFromAddr +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 x; ///< X coordinate + UINT_32 y; ///< Y coordinate + UINT_32 slice; ///< Slice index +} ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT; + +/** +*************************************************************************************************** +* AddrComputeHtileCoordFromAddr +* +* @brief +* Compute coordinates within depth buffer (1st pixel of a micro tile) according to +* Htile address +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeHtileCoordFromAddr( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut); + + + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// C-mask functions +/////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +*************************************************************************************************** +* ADDR_CMASK_FLAGS +* +* @brief +* CMASK flags +*************************************************************************************************** +*/ +typedef union _ADDR_CMASK_FLAGS +{ + struct + { + UINT_32 tcCompatible : 1; ///< Flag indicates surface needs to be shader readable + UINT_32 reserved :31; ///< Reserved bits + }; + + UINT_32 value; +} ADDR_CMASK_FLAGS; + +/** +*************************************************************************************************** +* ADDR_COMPUTE_CMASK_INFO_INPUT +* +* @brief +* Input structure of AddrComputeCmaskInfo +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_CMASKINFO_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + ADDR_CMASK_FLAGS flags; ///< CMASK flags + UINT_32 pitch; ///< Pitch, in pixels, of color buffer + UINT_32 height; ///< Height, in pixels, of color buffer + UINT_32 numSlices; ///< Number of slices, of color buffer + BOOL_32 isLinear; ///< Linear or tiled layout, Only SI can be linear + ADDR_TILEINFO* pTileInfo; ///< Tile info + + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + ///< README: When tileIndex is not -1, this must be valid +} ADDR_COMPUTE_CMASK_INFO_INPUT; + +/** +*************************************************************************************************** +* ADDR_COMPUTE_CMASK_INFO_OUTPUT +* +* @brief +* Output structure of AddrComputeCmaskInfo +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_CMASK_INFO_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 pitch; ///< Pitch in pixels of color buffer which + /// this Cmask matches. The size might be larger than + /// original color buffer pitch when called with + /// an unaligned pitch. + UINT_32 height; ///< Height in pixels, as above + UINT_64 cmaskBytes; ///< Size in bytes of CMask buffer + UINT_32 baseAlign; ///< Base alignment + UINT_32 blockMax; ///< Cmask block size. Need this to set CB_COLORn_MASK register + UINT_32 macroWidth; ///< Macro width in pixels, actually squared cache shape + UINT_32 macroHeight; ///< Macro height in pixels + UINT_64 sliceSize; ///< Slice size, in bytes. +} ADDR_COMPUTE_CMASK_INFO_OUTPUT; + +/** +*************************************************************************************************** +* AddrComputeCmaskInfo +* +* @brief +* Compute Cmask pitch, height, base alignment and size in bytes from color buffer +* info +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskInfo( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_CMASK_INFO_INPUT* pIn, + ADDR_COMPUTE_CMASK_INFO_OUTPUT* pOut); + + + +/** +*************************************************************************************************** +* ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT +* +* @brief +* Input structure for AddrComputeCmaskAddrFromCoord +* +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + UINT_32 x; ///< X coordinate + UINT_32 y; ///< Y coordinate + UINT_64 fmaskAddr; ///< Fmask addr for tc compatible Cmask + UINT_32 slice; ///< Slice index + UINT_32 pitch; ///< Pitch in pixels, of color buffer + UINT_32 height; ///< Height in pixels, of color buffer + UINT_32 numSlices; ///< Number of slices + UINT_32 bpp; + BOOL_32 isLinear; ///< Linear or tiled layout, Only SI can be linear + ADDR_CMASK_FLAGS flags; ///< CMASK flags + ADDR_TILEINFO* pTileInfo; ///< Tile info + + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + ///< while the global useTileIndex is set to 1 + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + ///< README: When tileIndex is not -1, this must be valid +} ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT; + +/** +*************************************************************************************************** +* ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT +* +* @brief +* Output structure for AddrComputeCmaskAddrFromCoord +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_64 addr; ///< CMASK address in bytes + UINT_32 bitPosition; ///< Bit position within addr, 0-7. CMASK is 4 bpp, + /// so the address may be located in bit 0 (0) or 4 (4) +} ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT; + +/** +*************************************************************************************************** +* AddrComputeCmaskAddrFromCoord +* +* @brief +* Compute Cmask address according to coordinates (of MSAA color buffer) +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskAddrFromCoord( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut); + + + +/** +*************************************************************************************************** +* ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT +* +* @brief +* Input structure for AddrComputeCmaskCoordFromAddr +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_64 addr; ///< CMASK address in bytes + UINT_32 bitPosition; ///< Bit position within addr, 0-7. CMASK is 4 bpp, + /// so the address may be located in bit 0 (0) or 4 (4) + UINT_32 pitch; ///< Pitch, in pixels + UINT_32 height; ///< Height in pixels + UINT_32 numSlices; ///< Number of slices + BOOL_32 isLinear; ///< Linear or tiled layout, Only SI can be linear + ADDR_TILEINFO* pTileInfo; ///< Tile info + + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + ///< README: When tileIndex is not -1, this must be valid +} ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT; + +/** +*************************************************************************************************** +* ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT +* +* @brief +* Output structure for AddrComputeCmaskCoordFromAddr +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 x; ///< X coordinate + UINT_32 y; ///< Y coordinate + UINT_32 slice; ///< Slice index +} ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT; + +/** +*************************************************************************************************** +* AddrComputeCmaskCoordFromAddr +* +* @brief +* Compute coordinates within color buffer (1st pixel of a micro tile) according to +* Cmask address +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskCoordFromAddr( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut); + + + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// F-mask functions +/////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +*************************************************************************************************** +* ADDR_COMPUTE_FMASK_INFO_INPUT +* +* @brief +* Input structure for AddrComputeFmaskInfo +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_FMASK_INFO_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + AddrTileMode tileMode; ///< Tile mode + UINT_32 pitch; ///< Surface pitch, in pixels + UINT_32 height; ///< Surface height, in pixels + UINT_32 numSlices; ///< Number of slice/depth + UINT_32 numSamples; ///< Number of samples + UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as + /// number of samples for normal AA; Set it to the + /// number of fragments for EQAA + /// r800 and later HWL parameters + struct + { + UINT_32 resolved: 1; ///< TRUE if the surface is for resolved fmask, only used + /// by H/W clients. S/W should always set it to FALSE. + UINT_32 reserved: 31; ///< Reserved for future use. + }; + ADDR_TILEINFO* pTileInfo; ///< 2D tiling parameters. Clients must give valid data + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 +} ADDR_COMPUTE_FMASK_INFO_INPUT; + +/** +*************************************************************************************************** +* ADDR_COMPUTE_FMASK_INFO_OUTPUT +* +* @brief +* Output structure for AddrComputeFmaskInfo +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_FMASK_INFO_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 pitch; ///< Pitch of fmask in pixels + UINT_32 height; ///< Height of fmask in pixels + UINT_32 numSlices; ///< Slices of fmask + UINT_64 fmaskBytes; ///< Size of fmask in bytes + UINT_32 baseAlign; ///< Base address alignment + UINT_32 pitchAlign; ///< Pitch alignment + UINT_32 heightAlign; ///< Height alignment + UINT_32 bpp; ///< Bits per pixel of FMASK is: number of bit planes + UINT_32 numSamples; ///< Number of samples, used for dump, export this since input + /// may be changed in 9xx and above + /// r800 and later HWL parameters + ADDR_TILEINFO* pTileInfo; ///< Tile parameters used. Fmask can have different + /// bank_height from color buffer + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + UINT_64 sliceSize; ///< Size of slice in bytes +} ADDR_COMPUTE_FMASK_INFO_OUTPUT; + +/** +*************************************************************************************************** +* AddrComputeFmaskInfo +* +* @brief +* Compute Fmask pitch/height/depth/alignments and size in bytes +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskInfo( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut); + + + +/** +*************************************************************************************************** +* ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT +* +* @brief +* Input structure for AddrComputeFmaskAddrFromCoord +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 x; ///< X coordinate + UINT_32 y; ///< Y coordinate + UINT_32 slice; ///< Slice index + UINT_32 plane; ///< Plane number + UINT_32 sample; ///< Sample index (fragment index for EQAA) + + UINT_32 pitch; ///< Surface pitch, in pixels + UINT_32 height; ///< Surface height, in pixels + UINT_32 numSamples; ///< Number of samples + UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as + /// number of samples for normal AA; Set it to the + /// number of fragments for EQAA + + AddrTileMode tileMode; ///< Tile mode + union + { + struct + { + UINT_32 bankSwizzle; ///< Bank swizzle + UINT_32 pipeSwizzle; ///< Pipe swizzle + }; + UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE + }; + + /// r800 and later HWL parameters + struct + { + UINT_32 resolved: 1; ///< TRUE if this is a resolved fmask, used by H/W clients + UINT_32 ignoreSE: 1; ///< TRUE if shader engines are ignored. + UINT_32 reserved: 30; ///< Reserved for future use. + }; + ADDR_TILEINFO* pTileInfo; ///< 2D tiling parameters. Client must provide all data + +} ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT; + +/** +*************************************************************************************************** +* ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT +* +* @brief +* Output structure for AddrComputeFmaskAddrFromCoord +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_64 addr; ///< Fmask address + UINT_32 bitPosition; ///< Bit position within fmaskAddr, 0-7. +} ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT; + +/** +*************************************************************************************************** +* AddrComputeFmaskAddrFromCoord +* +* @brief +* Compute Fmask address according to coordinates (x,y,slice,sample,plane) +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskAddrFromCoord( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut); + + + +/** +*************************************************************************************************** +* ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT +* +* @brief +* Input structure for AddrComputeFmaskCoordFromAddr +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_64 addr; ///< Address + UINT_32 bitPosition; ///< Bit position within addr, 0-7. + + UINT_32 pitch; ///< Pitch, in pixels + UINT_32 height; ///< Height in pixels + UINT_32 numSamples; ///< Number of samples + UINT_32 numFrags; ///< Number of fragments + AddrTileMode tileMode; ///< Tile mode + union + { + struct + { + UINT_32 bankSwizzle; ///< Bank swizzle + UINT_32 pipeSwizzle; ///< Pipe swizzle + }; + UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE + }; + + /// r800 and later HWL parameters + struct + { + UINT_32 resolved: 1; ///< TRUE if this is a resolved fmask, used by HW components + UINT_32 ignoreSE: 1; ///< TRUE if shader engines are ignored. + UINT_32 reserved: 30; ///< Reserved for future use. + }; + ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data + +} ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT; + +/** +*************************************************************************************************** +* ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT +* +* @brief +* Output structure for AddrComputeFmaskCoordFromAddr +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 x; ///< X coordinate + UINT_32 y; ///< Y coordinate + UINT_32 slice; ///< Slice index + UINT_32 plane; ///< Plane number + UINT_32 sample; ///< Sample index (fragment index for EQAA) +} ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT; + +/** +*************************************************************************************************** +* AddrComputeFmaskCoordFromAddr +* +* @brief +* Compute FMASK coordinate from an given address +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskCoordFromAddr( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut); + + + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// Element/utility functions +/////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +*************************************************************************************************** +* AddrGetVersion +* +* @brief +* Get AddrLib version number +*************************************************************************************************** +*/ +UINT_32 ADDR_API AddrGetVersion(ADDR_HANDLE hLib); + +/** +*************************************************************************************************** +* AddrUseTileIndex +* +* @brief +* Return TRUE if tileIndex is enabled in this address library +*************************************************************************************************** +*/ +BOOL_32 ADDR_API AddrUseTileIndex(ADDR_HANDLE hLib); + +/** +*************************************************************************************************** +* AddrUseCombinedSwizzle +* +* @brief +* Return TRUE if combined swizzle is enabled in this address library +*************************************************************************************************** +*/ +BOOL_32 ADDR_API AddrUseCombinedSwizzle(ADDR_HANDLE hLib); + +/** +*************************************************************************************************** +* ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT +* +* @brief +* Input structure of AddrExtractBankPipeSwizzle +*************************************************************************************************** +*/ +typedef struct _ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 base256b; ///< Base256b value + + /// r800 and later HWL parameters + ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data + + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + ///< README: When tileIndex is not -1, this must be valid +} ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT; + +/** +*************************************************************************************************** +* ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT +* +* @brief +* Output structure of AddrExtractBankPipeSwizzle +*************************************************************************************************** +*/ +typedef struct _ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 bankSwizzle; ///< Bank swizzle + UINT_32 pipeSwizzle; ///< Pipe swizzle +} ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT; + +/** +*************************************************************************************************** +* AddrExtractBankPipeSwizzle +* +* @brief +* Extract Bank and Pipe swizzle from base256b +* @return +* ADDR_OK if no error +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrExtractBankPipeSwizzle( + ADDR_HANDLE hLib, + const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, + ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut); + + +/** +*************************************************************************************************** +* ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT +* +* @brief +* Input structure of AddrCombineBankPipeSwizzle +*************************************************************************************************** +*/ +typedef struct _ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 bankSwizzle; ///< Bank swizzle + UINT_32 pipeSwizzle; ///< Pipe swizzle + UINT_64 baseAddr; ///< Base address (leave it zero for driver clients) + + /// r800 and later HWL parameters + ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data + + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + ///< README: When tileIndex is not -1, this must be valid +} ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT; + +/** +*************************************************************************************************** +* ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT +* +* @brief +* Output structure of AddrCombineBankPipeSwizzle +*************************************************************************************************** +*/ +typedef struct _ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 tileSwizzle; ///< Combined swizzle +} ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT; + +/** +*************************************************************************************************** +* AddrCombineBankPipeSwizzle +* +* @brief +* Combine Bank and Pipe swizzle +* @return +* ADDR_OK if no error +* @note +* baseAddr here is full MCAddress instead of base256b +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrCombineBankPipeSwizzle( + ADDR_HANDLE hLib, + const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT* pIn, + ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT* pOut); + + + +/** +*************************************************************************************************** +* ADDR_COMPUTE_SLICESWIZZLE_INPUT +* +* @brief +* Input structure of AddrComputeSliceSwizzle +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_SLICESWIZZLE_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + AddrTileMode tileMode; ///< Tile Mode + UINT_32 baseSwizzle; ///< Base tile swizzle + UINT_32 slice; ///< Slice index + UINT_64 baseAddr; ///< Base address, driver should leave it 0 in most cases + + /// r800 and later HWL parameters + ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Actually banks needed here! + + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + ///< README: When tileIndex is not -1, this must be valid +} ADDR_COMPUTE_SLICESWIZZLE_INPUT; + + + +/** +*************************************************************************************************** +* ADDR_COMPUTE_SLICESWIZZLE_OUTPUT +* +* @brief +* Output structure of AddrComputeSliceSwizzle +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_SLICESWIZZLE_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 tileSwizzle; ///< Recalculated tileSwizzle value +} ADDR_COMPUTE_SLICESWIZZLE_OUTPUT; + +/** +*************************************************************************************************** +* AddrComputeSliceSwizzle +* +* @brief +* Extract Bank and Pipe swizzle from base256b +* @return +* ADDR_OK if no error +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeSliceSwizzle( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, + ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut); + + +/** +*************************************************************************************************** +* AddrSwizzleGenOption +* +* @brief +* Which swizzle generating options: legacy or linear +*************************************************************************************************** +*/ +typedef enum _AddrSwizzleGenOption +{ + ADDR_SWIZZLE_GEN_DEFAULT = 0, ///< As is in client driver implemention for swizzle + ADDR_SWIZZLE_GEN_LINEAR = 1, ///< Using a linear increment of swizzle +} AddrSwizzleGenOption; + +/** +*************************************************************************************************** +* AddrSwizzleOption +* +* @brief +* Controls how swizzle is generated +*************************************************************************************************** +*/ +typedef union _ADDR_SWIZZLE_OPTION +{ + struct + { + UINT_32 genOption : 1; ///< The way swizzle is generated, see AddrSwizzleGenOption + UINT_32 reduceBankBit : 1; ///< TRUE if we need reduce swizzle bits + UINT_32 reserved :30; ///< Reserved bits + }; + + UINT_32 value; + +} ADDR_SWIZZLE_OPTION; + +/** +*************************************************************************************************** +* ADDR_COMPUTE_BASE_SWIZZLE_INPUT +* +* @brief +* Input structure of AddrComputeBaseSwizzle +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_BASE_SWIZZLE_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + ADDR_SWIZZLE_OPTION option; ///< Swizzle option + UINT_32 surfIndex; ///< Index of this surface type + AddrTileMode tileMode; ///< Tile Mode + + /// r800 and later HWL parameters + ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Actually banks needed here! + + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + ///< README: When tileIndex is not -1, this must be valid +} ADDR_COMPUTE_BASE_SWIZZLE_INPUT; + +/** +*************************************************************************************************** +* ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT +* +* @brief +* Output structure of AddrComputeBaseSwizzle +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 tileSwizzle; ///< Combined swizzle +} ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT; + +/** +*************************************************************************************************** +* AddrComputeBaseSwizzle +* +* @brief +* Return a Combined Bank and Pipe swizzle base on surface based on surface type/index +* @return +* ADDR_OK if no error +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeBaseSwizzle( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, + ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut); + + + +/** +*************************************************************************************************** +* ELEM_GETEXPORTNORM_INPUT +* +* @brief +* Input structure for ElemGetExportNorm +* +*************************************************************************************************** +*/ +typedef struct _ELEM_GETEXPORTNORM_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + AddrColorFormat format; ///< Color buffer format; Client should use ColorFormat + AddrSurfaceNumber num; ///< Surface number type; Client should use NumberType + AddrSurfaceSwap swap; ///< Surface swap byte swap; Client should use SurfaceSwap + UINT_32 numSamples; ///< Number of samples +} ELEM_GETEXPORTNORM_INPUT; + +/** +*************************************************************************************************** +* ElemGetExportNorm +* +* @brief +* Helper function to check one format can be EXPORT_NUM, which is a register +* CB_COLOR_INFO.SURFACE_FORMAT. FP16 can be reported as EXPORT_NORM for rv770 in r600 +* family +* @note +* The implementation is only for r600. +* 00 - EXPORT_FULL: PS exports are 4 pixels with 4 components with 32-bits-per-component. (two +* clocks per export) +* 01 - EXPORT_NORM: PS exports are 4 pixels with 4 components with 16-bits-per-component. (one +* clock per export) +* +*************************************************************************************************** +*/ +BOOL_32 ADDR_API ElemGetExportNorm( + ADDR_HANDLE hLib, + const ELEM_GETEXPORTNORM_INPUT* pIn); + + + +/** +*************************************************************************************************** +* ELEM_FLT32TODEPTHPIXEL_INPUT +* +* @brief +* Input structure for addrFlt32ToDepthPixel +* +*************************************************************************************************** +*/ +typedef struct _ELEM_FLT32TODEPTHPIXEL_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + AddrDepthFormat format; ///< Depth buffer format + ADDR_FLT_32 comps[2]; ///< Component values (Z/stencil) +} ELEM_FLT32TODEPTHPIXEL_INPUT; + +/** +*************************************************************************************************** +* ELEM_FLT32TODEPTHPIXEL_INPUT +* +* @brief +* Output structure for ElemFlt32ToDepthPixel +* +*************************************************************************************************** +*/ +typedef struct _ELEM_FLT32TODEPTHPIXEL_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_8* pPixel; ///< Real depth value. Same data type as depth buffer. + /// Client must provide enough storage for this type. + UINT_32 depthBase; ///< Tile base in bits for depth bits + UINT_32 stencilBase; ///< Tile base in bits for stencil bits + UINT_32 depthBits; ///< Bits for depth + UINT_32 stencilBits; ///< Bits for stencil +} ELEM_FLT32TODEPTHPIXEL_OUTPUT; + +/** +*************************************************************************************************** +* ElemFlt32ToDepthPixel +* +* @brief +* Convert a FLT_32 value to a depth/stencil pixel value +* +* @return +* Return code +* +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API ElemFlt32ToDepthPixel( + ADDR_HANDLE hLib, + const ELEM_FLT32TODEPTHPIXEL_INPUT* pIn, + ELEM_FLT32TODEPTHPIXEL_OUTPUT* pOut); + + + +/** +*************************************************************************************************** +* ELEM_FLT32TOCOLORPIXEL_INPUT +* +* @brief +* Input structure for addrFlt32ToColorPixel +* +*************************************************************************************************** +*/ +typedef struct _ELEM_FLT32TOCOLORPIXEL_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + AddrColorFormat format; ///< Color buffer format + AddrSurfaceNumber surfNum; ///< Surface number + AddrSurfaceSwap surfSwap; ///< Surface swap + ADDR_FLT_32 comps[4]; ///< Component values (r/g/b/a) +} ELEM_FLT32TOCOLORPIXEL_INPUT; + +/** +*************************************************************************************************** +* ELEM_FLT32TOCOLORPIXEL_INPUT +* +* @brief +* Output structure for ElemFlt32ToColorPixel +* +*************************************************************************************************** +*/ +typedef struct _ELEM_FLT32TOCOLORPIXEL_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_8* pPixel; ///< Real color value. Same data type as color buffer. + /// Client must provide enough storage for this type. +} ELEM_FLT32TOCOLORPIXEL_OUTPUT; + +/** +*************************************************************************************************** +* ElemFlt32ToColorPixel +* +* @brief +* Convert a FLT_32 value to a red/green/blue/alpha pixel value +* +* @return +* Return code +* +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API ElemFlt32ToColorPixel( + ADDR_HANDLE hLib, + const ELEM_FLT32TOCOLORPIXEL_INPUT* pIn, + ELEM_FLT32TOCOLORPIXEL_OUTPUT* pOut); + + +/** +*************************************************************************************************** +* ADDR_CONVERT_TILEINFOTOHW_INPUT +* +* @brief +* Input structure for AddrConvertTileInfoToHW +* @note +* When reverse is TRUE, indices are igonred +*************************************************************************************************** +*/ +typedef struct _ADDR_CONVERT_TILEINFOTOHW_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + BOOL_32 reverse; ///< Convert control flag. + /// FALSE: convert from real value to HW value; + /// TRUE: convert from HW value to real value. + + /// r800 and later HWL parameters + ADDR_TILEINFO* pTileInfo; ///< Tile parameters with real value + + INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it + /// while the global useTileIndex is set to 1 + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + ///< README: When tileIndex is not -1, this must be valid +} ADDR_CONVERT_TILEINFOTOHW_INPUT; + +/** +*************************************************************************************************** +* ADDR_CONVERT_TILEINFOTOHW_OUTPUT +* +* @brief +* Output structure for AddrConvertTileInfoToHW +*************************************************************************************************** +*/ +typedef struct _ADDR_CONVERT_TILEINFOTOHW_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + /// r800 and later HWL parameters + ADDR_TILEINFO* pTileInfo; ///< Tile parameters with hardware register value + +} ADDR_CONVERT_TILEINFOTOHW_OUTPUT; + +/** +*************************************************************************************************** +* AddrConvertTileInfoToHW +* +* @brief +* Convert tile info from real value to hardware register value +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrConvertTileInfoToHW( + ADDR_HANDLE hLib, + const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, + ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut); + + + +/** +*************************************************************************************************** +* ADDR_CONVERT_TILEINDEX_INPUT +* +* @brief +* Input structure for AddrConvertTileIndex +*************************************************************************************************** +*/ +typedef struct _ADDR_CONVERT_TILEINDEX_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + INT_32 tileIndex; ///< Tile index + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + BOOL_32 tileInfoHw; ///< Set to TRUE if client wants HW enum, otherwise actual +} ADDR_CONVERT_TILEINDEX_INPUT; + +/** +*************************************************************************************************** +* ADDR_CONVERT_TILEINDEX_OUTPUT +* +* @brief +* Output structure for AddrConvertTileIndex +*************************************************************************************************** +*/ +typedef struct _ADDR_CONVERT_TILEINDEX_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + AddrTileMode tileMode; ///< Tile mode + AddrTileType tileType; ///< Tile type + ADDR_TILEINFO* pTileInfo; ///< Tile info + +} ADDR_CONVERT_TILEINDEX_OUTPUT; + +/** +*************************************************************************************************** +* AddrConvertTileIndex +* +* @brief +* Convert tile index to tile mode/type/info +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex( + ADDR_HANDLE hLib, + const ADDR_CONVERT_TILEINDEX_INPUT* pIn, + ADDR_CONVERT_TILEINDEX_OUTPUT* pOut); + + + +/** +*************************************************************************************************** +* ADDR_CONVERT_TILEINDEX1_INPUT +* +* @brief +* Input structure for AddrConvertTileIndex1 (without macro mode index) +*************************************************************************************************** +*/ +typedef struct _ADDR_CONVERT_TILEINDEX1_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + INT_32 tileIndex; ///< Tile index + UINT_32 bpp; ///< Bits per pixel + UINT_32 numSamples; ///< Number of samples + BOOL_32 tileInfoHw; ///< Set to TRUE if client wants HW enum, otherwise actual +} ADDR_CONVERT_TILEINDEX1_INPUT; + +/** +*************************************************************************************************** +* AddrConvertTileIndex1 +* +* @brief +* Convert tile index to tile mode/type/info +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex1( + ADDR_HANDLE hLib, + const ADDR_CONVERT_TILEINDEX1_INPUT* pIn, + ADDR_CONVERT_TILEINDEX_OUTPUT* pOut); + + + +/** +*************************************************************************************************** +* ADDR_GET_TILEINDEX_INPUT +* +* @brief +* Input structure for AddrGetTileIndex +*************************************************************************************************** +*/ +typedef struct _ADDR_GET_TILEINDEX_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + AddrTileMode tileMode; ///< Tile mode + AddrTileType tileType; ///< Tile-type: disp/non-disp/... + ADDR_TILEINFO* pTileInfo; ///< Pointer to tile-info structure, can be NULL for linear/1D +} ADDR_GET_TILEINDEX_INPUT; + +/** +*************************************************************************************************** +* ADDR_GET_TILEINDEX_OUTPUT +* +* @brief +* Output structure for AddrGetTileIndex +*************************************************************************************************** +*/ +typedef struct _ADDR_GET_TILEINDEX_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + INT_32 index; ///< index in table +} ADDR_GET_TILEINDEX_OUTPUT; + +/** +*************************************************************************************************** +* AddrGetTileIndex +* +* @brief +* Get the tiling mode index in table +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrGetTileIndex( + ADDR_HANDLE hLib, + const ADDR_GET_TILEINDEX_INPUT* pIn, + ADDR_GET_TILEINDEX_OUTPUT* pOut); + + + + +/** +*************************************************************************************************** +* ADDR_PRT_INFO_INPUT +* +* @brief +* Input structure for AddrComputePrtInfo +*************************************************************************************************** +*/ +typedef struct _ADDR_PRT_INFO_INPUT +{ + AddrFormat format; ///< Surface format + UINT_32 baseMipWidth; ///< Base mipmap width + UINT_32 baseMipHeight; ///< Base mipmap height + UINT_32 baseMipDepth; ///< Base mipmap depth + UINT_32 numFrags; ///< Number of fragments, +} ADDR_PRT_INFO_INPUT; + +/** +*************************************************************************************************** +* ADDR_PRT_INFO_OUTPUT +* +* @brief +* Input structure for AddrComputePrtInfo +*************************************************************************************************** +*/ +typedef struct _ADDR_PRT_INFO_OUTPUT +{ + UINT_32 prtTileWidth; + UINT_32 prtTileHeight; +} ADDR_PRT_INFO_OUTPUT; + +/** +*************************************************************************************************** +* AddrComputePrtInfo +* +* @brief +* Compute prt surface related information +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputePrtInfo( + ADDR_HANDLE hLib, + const ADDR_PRT_INFO_INPUT* pIn, + ADDR_PRT_INFO_OUTPUT* pOut); + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// DCC key functions +/////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +*************************************************************************************************** +* _ADDR_COMPUTE_DCCINFO_INPUT +* +* @brief +* Input structure of AddrComputeDccInfo +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_DCCINFO_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + UINT_32 bpp; ///< BitPP of color surface + UINT_32 numSamples; ///< Sample number of color surface + UINT_64 colorSurfSize; ///< Size of color surface to which dcc key is bound + AddrTileMode tileMode; ///< Tile mode of color surface + ADDR_TILEINFO tileInfo; ///< Tile info of color surface + UINT_32 tileSwizzle; ///< Tile swizzle + INT_32 tileIndex; ///< Tile index of color surface, + ///< MUST be -1 if you don't want to use it + ///< while the global useTileIndex is set to 1 + INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) + ///< README: When tileIndex is not -1, this must be valid +} ADDR_COMPUTE_DCCINFO_INPUT; + +/** +*************************************************************************************************** +* ADDR_COMPUTE_DCCINFO_OUTPUT +* +* @brief +* Output structure of AddrComputeDccInfo +*************************************************************************************************** +*/ +typedef struct _ADDR_COMPUTE_DCCINFO_OUTPUT +{ + UINT_32 size; ///< Size of this structure in bytes + UINT_64 dccRamBaseAlign; ///< Base alignment of dcc key + UINT_64 dccRamSize; ///< Size of dcc key + UINT_64 dccFastClearSize; ///< Size of dcc key portion that can be fast cleared + BOOL_32 subLvlCompressible; ///< whether sub resource is compressiable +} ADDR_COMPUTE_DCCINFO_OUTPUT; + +/** +*************************************************************************************************** +* AddrComputeDccInfo +* +* @brief +* Compute DCC key size, base alignment +* info +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API AddrComputeDccInfo( + ADDR_HANDLE hLib, + const ADDR_COMPUTE_DCCINFO_INPUT* pIn, + ADDR_COMPUTE_DCCINFO_OUTPUT* pOut); + +#if defined(__cplusplus) +} +#endif + +#endif // __ADDR_INTERFACE_H__ + + diff -Nru mesa-12.0.6/src/amd/addrlib/addrtypes.h mesa-17.0.7/src/amd/addrlib/addrtypes.h --- mesa-12.0.6/src/amd/addrlib/addrtypes.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/addrlib/addrtypes.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,594 @@ +/* + * Copyright © 2014 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +*************************************************************************************************** +* @file addrtypes.h +* @brief Contains the helper function and constants +*************************************************************************************************** +*/ +#ifndef __ADDR_TYPES_H__ +#define __ADDR_TYPES_H__ + +#if defined(__APPLE__) || defined(TCORE_BUILD) +// External definitions header maintained by Mac driver team (and TCORE team) +// Helps address compilation issues & reduces code covered by NDA +#include "addrExtDef.h" + +#else + +// Windows and/or Linux +#if !defined(VOID) +typedef void VOID; +#endif + +#if !defined(FLOAT) +typedef float FLOAT; +#endif + +#if !defined(CHAR) +typedef char CHAR; +#endif + +#if !defined(INT) +typedef int INT; +#endif + +#include // va_list...etc need this header + +#endif // defined (__APPLE__) + +/** +*************************************************************************************************** +* Calling conventions +*************************************************************************************************** +*/ +#ifndef ADDR_CDECL + #if defined(__GNUC__) + #define ADDR_CDECL __attribute__((cdecl)) + #else + #define ADDR_CDECL __cdecl + #endif +#endif + +#ifndef ADDR_STDCALL + #if defined(__GNUC__) + #if defined(__AMD64__) + #define ADDR_STDCALL + #else + #define ADDR_STDCALL __attribute__((stdcall)) + #endif + #else + #define ADDR_STDCALL __stdcall + #endif +#endif + +#ifndef ADDR_FASTCALL + #if defined(__GNUC__) + #if defined(__i386__) + #define ADDR_FASTCALL __attribute__((regparm(0))) + #else + #define ADDR_FASTCALL + #endif + #else + #define ADDR_FASTCALL __fastcall + #endif +#endif + +#ifndef GC_CDECL + #define GC_CDECL ADDR_CDECL +#endif + +#ifndef GC_STDCALL + #define GC_STDCALL ADDR_STDCALL +#endif + +#ifndef GC_FASTCALL + #define GC_FASTCALL ADDR_FASTCALL +#endif + + +#if defined(__GNUC__) + #define ADDR_INLINE static inline // inline needs to be static to link +#else + // win32, win64, other platforms + #define ADDR_INLINE __inline +#endif // #if defined(__GNUC__) + +#define ADDR_API ADDR_FASTCALL //default call convention is fast call + +/** +*************************************************************************************************** +* Global defines used by other modules +*************************************************************************************************** +*/ +#if !defined(TILEINDEX_INVALID) +#define TILEINDEX_INVALID -1 +#endif + +#if !defined(TILEINDEX_LINEAR_GENERAL) +#define TILEINDEX_LINEAR_GENERAL -2 +#endif + +#if !defined(TILEINDEX_LINEAR_ALIGNED) +#define TILEINDEX_LINEAR_ALIGNED 8 +#endif + +/** +*************************************************************************************************** +* Return codes +*************************************************************************************************** +*/ +typedef enum _ADDR_E_RETURNCODE +{ + // General Return + ADDR_OK = 0, + ADDR_ERROR = 1, + + // Specific Errors + ADDR_OUTOFMEMORY, + ADDR_INVALIDPARAMS, + ADDR_NOTSUPPORTED, + ADDR_NOTIMPLEMENTED, + ADDR_PARAMSIZEMISMATCH, + ADDR_INVALIDGBREGVALUES, + +} ADDR_E_RETURNCODE; + +/** +*************************************************************************************************** +* @brief +* Neutral enums that define tile modes for all H/W +* @note +* R600/R800 tiling mode can be cast to hw enums directly but never cast into HW enum from +* ADDR_TM_2D_TILED_XTHICK +* +*************************************************************************************************** +*/ +typedef enum _AddrTileMode +{ + ADDR_TM_LINEAR_GENERAL = 0, ///< Least restrictions, pitch: multiple of 8 if not buffer + ADDR_TM_LINEAR_ALIGNED = 1, ///< Requests pitch or slice to be multiple of 64 pixels + ADDR_TM_1D_TILED_THIN1 = 2, ///< Linear array of 8x8 tiles + ADDR_TM_1D_TILED_THICK = 3, ///< Linear array of 8x8x4 tiles + ADDR_TM_2D_TILED_THIN1 = 4, ///< A set of macro tiles consist of 8x8 tiles + ADDR_TM_2D_TILED_THIN2 = 5, ///< 600 HWL only, macro tile ratio is 1:4 + ADDR_TM_2D_TILED_THIN4 = 6, ///< 600 HWL only, macro tile ratio is 1:16 + ADDR_TM_2D_TILED_THICK = 7, ///< A set of macro tiles consist of 8x8x4 tiles + ADDR_TM_2B_TILED_THIN1 = 8, ///< 600 HWL only, with bank swap + ADDR_TM_2B_TILED_THIN2 = 9, ///< 600 HWL only, with bank swap and ratio is 1:4 + ADDR_TM_2B_TILED_THIN4 = 10, ///< 600 HWL only, with bank swap and ratio is 1:16 + ADDR_TM_2B_TILED_THICK = 11, ///< 600 HWL only, with bank swap, consists of 8x8x4 tiles + ADDR_TM_3D_TILED_THIN1 = 12, ///< Macro tiling w/ pipe rotation between slices + ADDR_TM_3D_TILED_THICK = 13, ///< Macro tiling w/ pipe rotation bwtween slices, thick + ADDR_TM_3B_TILED_THIN1 = 14, ///< 600 HWL only, with bank swap + ADDR_TM_3B_TILED_THICK = 15, ///< 600 HWL only, with bank swap, thick + ADDR_TM_2D_TILED_XTHICK = 16, ///< Tile is 8x8x8, valid from NI + ADDR_TM_3D_TILED_XTHICK = 17, ///< Tile is 8x8x8, valid from NI + ADDR_TM_POWER_SAVE = 18, ///< Power save mode, only used by KMD on NI + ADDR_TM_PRT_TILED_THIN1 = 19, ///< No bank/pipe rotation or hashing beyond macrotile size + ADDR_TM_PRT_2D_TILED_THIN1 = 20, ///< Same as 2D_TILED_THIN1, PRT only + ADDR_TM_PRT_3D_TILED_THIN1 = 21, ///< Same as 3D_TILED_THIN1, PRT only + ADDR_TM_PRT_TILED_THICK = 22, ///< No bank/pipe rotation or hashing beyond macrotile size + ADDR_TM_PRT_2D_TILED_THICK = 23, ///< Same as 2D_TILED_THICK, PRT only + ADDR_TM_PRT_3D_TILED_THICK = 24, ///< Same as 3D_TILED_THICK, PRT only + ADDR_TM_COUNT = 25, ///< Must be the value of the last tile mode +} AddrTileMode; + +/** +*************************************************************************************************** +* AddrFormat +* +* @brief +* Neutral enum for SurfaceFormat +* +*************************************************************************************************** +*/ +typedef enum _AddrFormat { + ADDR_FMT_INVALID = 0x00000000, + ADDR_FMT_8 = 0x00000001, + ADDR_FMT_4_4 = 0x00000002, + ADDR_FMT_3_3_2 = 0x00000003, + ADDR_FMT_RESERVED_4 = 0x00000004, + ADDR_FMT_16 = 0x00000005, + ADDR_FMT_16_FLOAT = 0x00000006, + ADDR_FMT_8_8 = 0x00000007, + ADDR_FMT_5_6_5 = 0x00000008, + ADDR_FMT_6_5_5 = 0x00000009, + ADDR_FMT_1_5_5_5 = 0x0000000a, + ADDR_FMT_4_4_4_4 = 0x0000000b, + ADDR_FMT_5_5_5_1 = 0x0000000c, + ADDR_FMT_32 = 0x0000000d, + ADDR_FMT_32_FLOAT = 0x0000000e, + ADDR_FMT_16_16 = 0x0000000f, + ADDR_FMT_16_16_FLOAT = 0x00000010, + ADDR_FMT_8_24 = 0x00000011, + ADDR_FMT_8_24_FLOAT = 0x00000012, + ADDR_FMT_24_8 = 0x00000013, + ADDR_FMT_24_8_FLOAT = 0x00000014, + ADDR_FMT_10_11_11 = 0x00000015, + ADDR_FMT_10_11_11_FLOAT = 0x00000016, + ADDR_FMT_11_11_10 = 0x00000017, + ADDR_FMT_11_11_10_FLOAT = 0x00000018, + ADDR_FMT_2_10_10_10 = 0x00000019, + ADDR_FMT_8_8_8_8 = 0x0000001a, + ADDR_FMT_10_10_10_2 = 0x0000001b, + ADDR_FMT_X24_8_32_FLOAT = 0x0000001c, + ADDR_FMT_32_32 = 0x0000001d, + ADDR_FMT_32_32_FLOAT = 0x0000001e, + ADDR_FMT_16_16_16_16 = 0x0000001f, + ADDR_FMT_16_16_16_16_FLOAT = 0x00000020, + ADDR_FMT_RESERVED_33 = 0x00000021, + ADDR_FMT_32_32_32_32 = 0x00000022, + ADDR_FMT_32_32_32_32_FLOAT = 0x00000023, + ADDR_FMT_RESERVED_36 = 0x00000024, + ADDR_FMT_1 = 0x00000025, + ADDR_FMT_1_REVERSED = 0x00000026, + ADDR_FMT_GB_GR = 0x00000027, + ADDR_FMT_BG_RG = 0x00000028, + ADDR_FMT_32_AS_8 = 0x00000029, + ADDR_FMT_32_AS_8_8 = 0x0000002a, + ADDR_FMT_5_9_9_9_SHAREDEXP = 0x0000002b, + ADDR_FMT_8_8_8 = 0x0000002c, + ADDR_FMT_16_16_16 = 0x0000002d, + ADDR_FMT_16_16_16_FLOAT = 0x0000002e, + ADDR_FMT_32_32_32 = 0x0000002f, + ADDR_FMT_32_32_32_FLOAT = 0x00000030, + ADDR_FMT_BC1 = 0x00000031, + ADDR_FMT_BC2 = 0x00000032, + ADDR_FMT_BC3 = 0x00000033, + ADDR_FMT_BC4 = 0x00000034, + ADDR_FMT_BC5 = 0x00000035, + ADDR_FMT_BC6 = 0x00000036, + ADDR_FMT_BC7 = 0x00000037, + ADDR_FMT_32_AS_32_32_32_32 = 0x00000038, + ADDR_FMT_APC3 = 0x00000039, + ADDR_FMT_APC4 = 0x0000003a, + ADDR_FMT_APC5 = 0x0000003b, + ADDR_FMT_APC6 = 0x0000003c, + ADDR_FMT_APC7 = 0x0000003d, + ADDR_FMT_CTX1 = 0x0000003e, + ADDR_FMT_RESERVED_63 = 0x0000003f, +} AddrFormat; + +/** +*************************************************************************************************** +* AddrDepthFormat +* +* @brief +* Neutral enum for addrFlt32ToDepthPixel +* +*************************************************************************************************** +*/ +typedef enum _AddrDepthFormat +{ + ADDR_DEPTH_INVALID = 0x00000000, + ADDR_DEPTH_16 = 0x00000001, + ADDR_DEPTH_X8_24 = 0x00000002, + ADDR_DEPTH_8_24 = 0x00000003, + ADDR_DEPTH_X8_24_FLOAT = 0x00000004, + ADDR_DEPTH_8_24_FLOAT = 0x00000005, + ADDR_DEPTH_32_FLOAT = 0x00000006, + ADDR_DEPTH_X24_8_32_FLOAT = 0x00000007, + +} AddrDepthFormat; + +/** +*************************************************************************************************** +* AddrColorFormat +* +* @brief +* Neutral enum for ColorFormat +* +*************************************************************************************************** +*/ +typedef enum _AddrColorFormat +{ + ADDR_COLOR_INVALID = 0x00000000, + ADDR_COLOR_8 = 0x00000001, + ADDR_COLOR_4_4 = 0x00000002, + ADDR_COLOR_3_3_2 = 0x00000003, + ADDR_COLOR_RESERVED_4 = 0x00000004, + ADDR_COLOR_16 = 0x00000005, + ADDR_COLOR_16_FLOAT = 0x00000006, + ADDR_COLOR_8_8 = 0x00000007, + ADDR_COLOR_5_6_5 = 0x00000008, + ADDR_COLOR_6_5_5 = 0x00000009, + ADDR_COLOR_1_5_5_5 = 0x0000000a, + ADDR_COLOR_4_4_4_4 = 0x0000000b, + ADDR_COLOR_5_5_5_1 = 0x0000000c, + ADDR_COLOR_32 = 0x0000000d, + ADDR_COLOR_32_FLOAT = 0x0000000e, + ADDR_COLOR_16_16 = 0x0000000f, + ADDR_COLOR_16_16_FLOAT = 0x00000010, + ADDR_COLOR_8_24 = 0x00000011, + ADDR_COLOR_8_24_FLOAT = 0x00000012, + ADDR_COLOR_24_8 = 0x00000013, + ADDR_COLOR_24_8_FLOAT = 0x00000014, + ADDR_COLOR_10_11_11 = 0x00000015, + ADDR_COLOR_10_11_11_FLOAT = 0x00000016, + ADDR_COLOR_11_11_10 = 0x00000017, + ADDR_COLOR_11_11_10_FLOAT = 0x00000018, + ADDR_COLOR_2_10_10_10 = 0x00000019, + ADDR_COLOR_8_8_8_8 = 0x0000001a, + ADDR_COLOR_10_10_10_2 = 0x0000001b, + ADDR_COLOR_X24_8_32_FLOAT = 0x0000001c, + ADDR_COLOR_32_32 = 0x0000001d, + ADDR_COLOR_32_32_FLOAT = 0x0000001e, + ADDR_COLOR_16_16_16_16 = 0x0000001f, + ADDR_COLOR_16_16_16_16_FLOAT = 0x00000020, + ADDR_COLOR_RESERVED_33 = 0x00000021, + ADDR_COLOR_32_32_32_32 = 0x00000022, + ADDR_COLOR_32_32_32_32_FLOAT = 0x00000023, +} AddrColorFormat; + +/** +*************************************************************************************************** +* AddrSurfaceNumber +* +* @brief +* Neutral enum for SurfaceNumber +* +*************************************************************************************************** +*/ +typedef enum _AddrSurfaceNumber { + ADDR_NUMBER_UNORM = 0x00000000, + ADDR_NUMBER_SNORM = 0x00000001, + ADDR_NUMBER_USCALED = 0x00000002, + ADDR_NUMBER_SSCALED = 0x00000003, + ADDR_NUMBER_UINT = 0x00000004, + ADDR_NUMBER_SINT = 0x00000005, + ADDR_NUMBER_SRGB = 0x00000006, + ADDR_NUMBER_FLOAT = 0x00000007, +} AddrSurfaceNumber; + +/** +*************************************************************************************************** +* AddrSurfaceSwap +* +* @brief +* Neutral enum for SurfaceSwap +* +*************************************************************************************************** +*/ +typedef enum _AddrSurfaceSwap { + ADDR_SWAP_STD = 0x00000000, + ADDR_SWAP_ALT = 0x00000001, + ADDR_SWAP_STD_REV = 0x00000002, + ADDR_SWAP_ALT_REV = 0x00000003, +} AddrSurfaceSwap; + +/** +*************************************************************************************************** +* AddrHtileBlockSize +* +* @brief +* Size of HTILE blocks, valid values are 4 or 8 for now +*************************************************************************************************** +*/ +typedef enum _AddrHtileBlockSize +{ + ADDR_HTILE_BLOCKSIZE_4 = 4, + ADDR_HTILE_BLOCKSIZE_8 = 8, +} AddrHtileBlockSize; + + +/** +*************************************************************************************************** +* AddrPipeCfg +* +* @brief +* The pipe configuration field specifies both the number of pipes and +* how pipes are interleaved on the surface. +* The expression of number of pipes, the shader engine tile size, and packer tile size +* is encoded in a PIPE_CONFIG register field. +* In general the number of pipes usually matches the number of memory channels of the +* hardware configuration. +* For hw configurations w/ non-pow2 memory number of memory channels, it usually matches +* the number of ROP units(? TODO: which registers??) +* The enum value = hw enum + 1 which is to reserve 0 for requesting default. +*************************************************************************************************** +*/ +typedef enum _AddrPipeCfg +{ + ADDR_PIPECFG_INVALID = 0, + ADDR_PIPECFG_P2 = 1, /// 2 pipes, + ADDR_PIPECFG_P4_8x16 = 5, /// 4 pipes, + ADDR_PIPECFG_P4_16x16 = 6, + ADDR_PIPECFG_P4_16x32 = 7, + ADDR_PIPECFG_P4_32x32 = 8, + ADDR_PIPECFG_P8_16x16_8x16 = 9, /// 8 pipes + ADDR_PIPECFG_P8_16x32_8x16 = 10, + ADDR_PIPECFG_P8_32x32_8x16 = 11, + ADDR_PIPECFG_P8_16x32_16x16 = 12, + ADDR_PIPECFG_P8_32x32_16x16 = 13, + ADDR_PIPECFG_P8_32x32_16x32 = 14, + ADDR_PIPECFG_P8_32x64_32x32 = 15, + ADDR_PIPECFG_P16_32x32_8x16 = 17, /// 16 pipes + ADDR_PIPECFG_P16_32x32_16x16 = 18, + ADDR_PIPECFG_MAX = 19, +} AddrPipeCfg; + +/** +*************************************************************************************************** +* AddrTileType +* +* @brief +* Neutral enums that specifies micro tile type (MICRO_TILE_MODE) +*************************************************************************************************** +*/ +typedef enum _AddrTileType +{ + ADDR_DISPLAYABLE = 0, ///< Displayable tiling + ADDR_NON_DISPLAYABLE = 1, ///< Non-displayable tiling, a.k.a thin micro tiling + ADDR_DEPTH_SAMPLE_ORDER = 2, ///< Same as non-displayable plus depth-sample-order + ADDR_ROTATED = 3, ///< Rotated displayable tiling + ADDR_THICK = 4, ///< Thick micro-tiling, only valid for THICK and XTHICK +} AddrTileType; + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// +// Type definitions: short system-independent names for address library types +// +/////////////////////////////////////////////////////////////////////////////////////////////////// + +#if !defined(__APPLE__) + +#ifndef BOOL_32 // no bool type in C +/// @brief Boolean type, since none is defined in C +/// @ingroup type +#define BOOL_32 int +#endif + +#ifndef INT_32 +#define INT_32 int +#endif + +#ifndef UINT_32 +#define UINT_32 unsigned int +#endif + +#ifndef INT_16 +#define INT_16 short +#endif + +#ifndef UINT_16 +#define UINT_16 unsigned short +#endif + +#ifndef INT_8 +#define INT_8 char +#endif + +#ifndef UINT_8 +#define UINT_8 unsigned char +#endif + +#ifndef NULL +#define NULL 0 +#endif + +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef FALSE +#define FALSE 0 +#endif + +// +// 64-bit integer types depend on the compiler +// +#if defined( __GNUC__ ) || defined( __WATCOMC__ ) +#define INT_64 long long +#define UINT_64 unsigned long long + +#elif defined( _WIN32 ) +#define INT_64 __int64 +#define UINT_64 unsigned __int64 + +#else +#error Unsupported compiler and/or operating system for 64-bit integers + +/// @brief 64-bit signed integer type (compiler dependent) +/// @ingroup type +/// +/// The addrlib defines a 64-bit signed integer type for either +/// Gnu/Watcom compilers (which use the first syntax) or for +/// the Windows VCC compiler (which uses the second syntax). +#define INT_64 long long OR __int64 + +/// @brief 64-bit unsigned integer type (compiler dependent) +/// @ingroup type +/// +/// The addrlib defines a 64-bit unsigned integer type for either +/// Gnu/Watcom compilers (which use the first syntax) or for +/// the Windows VCC compiler (which uses the second syntax). +/// +#define UINT_64 unsigned long long OR unsigned __int64 +#endif + +#endif // #if !defined(__APPLE__) + +// ADDR64X is used to print addresses in hex form on both Windows and Linux +// +#if defined( __GNUC__ ) || defined( __WATCOMC__ ) +#define ADDR64X "llx" +#define ADDR64D "lld" + +#elif defined( _WIN32 ) +#define ADDR64X "I64x" +#define ADDR64D "I64d" + +#else +#error Unsupported compiler and/or operating system for 64-bit integers + +/// @brief Addrlib device address 64-bit printf tag (compiler dependent) +/// @ingroup type +/// +/// This allows printf to display an ADDR_64 for either the Windows VCC compiler +/// (which used this value) or the Gnu/Watcom compilers (which use "llx". +/// An example of use is printf("addr 0x%"ADDR64X"\n", address); +/// +#define ADDR64X "llx" OR "I64x" +#define ADDR64D "lld" OR "I64d" +#endif + + +/// @brief Union for storing a 32-bit float or 32-bit integer +/// @ingroup type +/// +/// This union provides a simple way to convert between a 32-bit float +/// and a 32-bit integer. It also prevents the compiler from producing +/// code that alters NaN values when assiging or coying floats. +/// Therefore, all address library routines that pass or return 32-bit +/// floating point data do so by passing or returning a FLT_32. +/// +typedef union { + INT_32 i; + UINT_32 u; + float f; +} ADDR_FLT_32; + + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// +// Macros for controlling linking and building on multiple systems +// +/////////////////////////////////////////////////////////////////////////////////////////////////// +#if defined(_MSC_VER) +#if defined(va_copy) +#undef va_copy //redefine va_copy to support VC2013 +#endif +#endif + +#if !defined(va_copy) +#define va_copy(dst, src) \ + ((void) memcpy(&(dst), &(src), sizeof(va_list))) +#endif + +#endif // __ADDR_TYPES_H__ + diff -Nru mesa-12.0.6/src/amd/addrlib/core/addrcommon.h mesa-17.0.7/src/amd/addrlib/core/addrcommon.h --- mesa-12.0.6/src/amd/addrlib/core/addrcommon.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/addrlib/core/addrcommon.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,558 @@ +/* + * Copyright © 2014 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +*************************************************************************************************** +* @file addrcommon.h +* @brief Contains the helper function and constants +*************************************************************************************************** +*/ + +#ifndef __ADDR_COMMON_H__ +#define __ADDR_COMMON_H__ + +#include "addrinterface.h" + + +// ADDR_LNX_KERNEL_BUILD is for internal build +// Moved from addrinterface.h so __KERNEL__ is not needed any more +#if ADDR_LNX_KERNEL_BUILD // || (defined(__GNUC__) && defined(__KERNEL__)) + #include "lnx_common_defs.h" // ported from cmmqs +#elif !defined(__APPLE__) + #include + #include +#endif + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// Common constants +/////////////////////////////////////////////////////////////////////////////////////////////////// +static const UINT_32 MicroTileWidth = 8; ///< Micro tile width, for 1D and 2D tiling +static const UINT_32 MicroTileHeight = 8; ///< Micro tile height, for 1D and 2D tiling +static const UINT_32 ThickTileThickness = 4; ///< Micro tile thickness, for THICK modes +static const UINT_32 XThickTileThickness = 8; ///< Extra thick tiling thickness +static const UINT_32 PowerSaveTileBytes = 64; ///< Nuber of bytes per tile for power save 64 +static const UINT_32 CmaskCacheBits = 1024; ///< Number of bits for CMASK cache +static const UINT_32 CmaskElemBits = 4; ///< Number of bits for CMASK element +static const UINT_32 HtileCacheBits = 16384; ///< Number of bits for HTILE cache 512*32 + +static const UINT_32 MicroTilePixels = MicroTileWidth * MicroTileHeight; + +static const INT_32 TileIndexInvalid = TILEINDEX_INVALID; +static const INT_32 TileIndexLinearGeneral = TILEINDEX_LINEAR_GENERAL; +static const INT_32 TileIndexNoMacroIndex = -3; + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// Common macros +/////////////////////////////////////////////////////////////////////////////////////////////////// +#define BITS_PER_BYTE 8 +#define BITS_TO_BYTES(x) ( ((x) + (BITS_PER_BYTE-1)) / BITS_PER_BYTE ) +#define BYTES_TO_BITS(x) ( (x) * BITS_PER_BYTE ) + +/// Helper macros to select a single bit from an int (undefined later in section) +#define _BIT(v,b) (((v) >> (b) ) & 1) + +/** +*************************************************************************************************** +* @brief Enums to identify AddrLib type +*************************************************************************************************** +*/ +enum AddrLibClass +{ + BASE_ADDRLIB = 0x0, + R600_ADDRLIB = 0x6, + R800_ADDRLIB = 0x8, + SI_ADDRLIB = 0xa, + CI_ADDRLIB = 0xb, +}; + +/** +*************************************************************************************************** +* AddrChipFamily +* +* @brief +* Neutral enums that specifies chip family. +* +*************************************************************************************************** +*/ +enum AddrChipFamily +{ + ADDR_CHIP_FAMILY_IVLD, ///< Invalid family + ADDR_CHIP_FAMILY_R6XX, + ADDR_CHIP_FAMILY_R7XX, + ADDR_CHIP_FAMILY_R8XX, + ADDR_CHIP_FAMILY_NI, + ADDR_CHIP_FAMILY_SI, + ADDR_CHIP_FAMILY_CI, + ADDR_CHIP_FAMILY_VI, +}; + +/** +*************************************************************************************************** +* ADDR_CONFIG_FLAGS +* +* @brief +* This structure is used to set addr configuration flags. +*************************************************************************************************** +*/ +union ADDR_CONFIG_FLAGS +{ + struct + { + /// Clients do not need to set these flags except forceLinearAligned. + /// There flags are set up by AddrLib inside thru AddrInitGlobalParamsFromRegister + UINT_32 optimalBankSwap : 1; ///< New bank tiling for RV770 only + UINT_32 noCubeMipSlicesPad : 1; ///< Disables faces padding for cubemap mipmaps + UINT_32 fillSizeFields : 1; ///< If clients fill size fields in all input and + /// output structure + UINT_32 ignoreTileInfo : 1; ///< Don't use tile info structure + UINT_32 useTileIndex : 1; ///< Make tileIndex field in input valid + UINT_32 useCombinedSwizzle : 1; ///< Use combined swizzle + UINT_32 checkLast2DLevel : 1; ///< Check the last 2D mip sub level + UINT_32 useHtileSliceAlign : 1; ///< Do htile single slice alignment + UINT_32 degradeBaseLevel : 1; ///< Degrade to 1D modes automatically for base level + UINT_32 allowLargeThickTile : 1; ///< Allow 64*thickness*bytesPerPixel > rowSize + UINT_32 reserved : 22; ///< Reserved bits for future use + }; + + UINT_32 value; +}; + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// Platform specific debug break defines +/////////////////////////////////////////////////////////////////////////////////////////////////// +#if DEBUG + #if defined(__GNUC__) + #define ADDR_DBG_BREAK() + #elif defined(__APPLE__) + #define ADDR_DBG_BREAK() { IOPanic("");} + #else + #define ADDR_DBG_BREAK() { __debugbreak(); } + #endif +#else + #define ADDR_DBG_BREAK() +#endif +/////////////////////////////////////////////////////////////////////////////////////////////////// + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// Debug assertions used in AddrLib +/////////////////////////////////////////////////////////////////////////////////////////////////// +#if DEBUG +#define ADDR_ASSERT(__e) if ( !((__e) ? TRUE : FALSE)) { ADDR_DBG_BREAK(); } +#define ADDR_ASSERT_ALWAYS() ADDR_DBG_BREAK() +#define ADDR_UNHANDLED_CASE() ADDR_ASSERT(!"Unhandled case") +#define ADDR_NOT_IMPLEMENTED() ADDR_ASSERT(!"Not implemented"); +#else //DEBUG +#define ADDR_ASSERT(__e) +#define ADDR_ASSERT_ALWAYS() +#define ADDR_UNHANDLED_CASE() +#define ADDR_NOT_IMPLEMENTED() +#endif //DEBUG +/////////////////////////////////////////////////////////////////////////////////////////////////// + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// Debug print macro from legacy address library +/////////////////////////////////////////////////////////////////////////////////////////////////// +#if DEBUG + +#define ADDR_PRNT(a) AddrObject::DebugPrint a + +/// @brief Macro for reporting informational messages +/// @ingroup util +/// +/// This macro optionally prints an informational message to stdout. +/// The first parameter is a condition -- if it is true, nothing is done. +/// The second pararmeter MUST be a parenthesis-enclosed list of arguments, +/// starting with a string. This is passed to printf() or an equivalent +/// in order to format the informational message. For example, +/// ADDR_INFO(0, ("test %d",3) ); prints out "test 3". +/// +#define ADDR_INFO(cond, a) \ +{ if (!(cond)) { ADDR_PRNT(a); } } + + +/// @brief Macro for reporting error warning messages +/// @ingroup util +/// +/// This macro optionally prints an error warning message to stdout, +/// followed by the file name and line number where the macro was called. +/// The first parameter is a condition -- if it is true, nothing is done. +/// The second pararmeter MUST be a parenthesis-enclosed list of arguments, +/// starting with a string. This is passed to printf() or an equivalent +/// in order to format the informational message. For example, +/// ADDR_WARN(0, ("test %d",3) ); prints out "test 3" followed by +/// a second line with the file name and line number. +/// +#define ADDR_WARN(cond, a) \ +{ if (!(cond)) \ + { ADDR_PRNT(a); \ + ADDR_PRNT((" WARNING in file %s, line %d\n", __FILE__, __LINE__)); \ +} } + + +/// @brief Macro for reporting fatal error conditions +/// @ingroup util +/// +/// This macro optionally stops execution of the current routine +/// after printing an error warning message to stdout, +/// followed by the file name and line number where the macro was called. +/// The first parameter is a condition -- if it is true, nothing is done. +/// The second pararmeter MUST be a parenthesis-enclosed list of arguments, +/// starting with a string. This is passed to printf() or an equivalent +/// in order to format the informational message. For example, +/// ADDR_EXIT(0, ("test %d",3) ); prints out "test 3" followed by +/// a second line with the file name and line number, then stops execution. +/// +#define ADDR_EXIT(cond, a) \ +{ if (!(cond)) \ + { ADDR_PRNT(a); ADDR_DBG_BREAK();\ +} } + +#else // DEBUG + +#define ADDRDPF 1 ? (void)0 : (void) + +#define ADDR_PRNT(a) + +#define ADDR_DBG_BREAK() + +#define ADDR_INFO(cond, a) + +#define ADDR_WARN(cond, a) + +#define ADDR_EXIT(cond, a) + +#endif // DEBUG +/////////////////////////////////////////////////////////////////////////////////////////////////// + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// Misc helper functions +//////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +*************************************************************************************************** +* AddrXorReduce +* +* @brief +* Xor the right-side numberOfBits bits of x. +*************************************************************************************************** +*/ +static inline UINT_32 XorReduce( + UINT_32 x, + UINT_32 numberOfBits) +{ + UINT_32 i; + UINT_32 result = x & 1; + + for (i=1; i>i) & 1); + } + + return result; +} + +/** +*************************************************************************************************** +* IsPow2 +* +* @brief +* Check if the size (UINT_32) is pow 2 +*************************************************************************************************** +*/ +static inline UINT_32 IsPow2( + UINT_32 dim) ///< [in] dimension of miplevel +{ + ADDR_ASSERT(dim > 0); + return !(dim & (dim - 1)); +} + +/** +*************************************************************************************************** +* IsPow2 +* +* @brief +* Check if the size (UINT_64) is pow 2 +*************************************************************************************************** +*/ +static inline UINT_64 IsPow2( + UINT_64 dim) ///< [in] dimension of miplevel +{ + ADDR_ASSERT(dim > 0); + return !(dim & (dim - 1)); +} + +/** +*************************************************************************************************** +* ByteAlign +* +* @brief +* Align UINT_32 "x" to "align" alignment, "align" should be power of 2 +*************************************************************************************************** +*/ +static inline UINT_32 PowTwoAlign( + UINT_32 x, + UINT_32 align) +{ + // + // Assert that x is a power of two. + // + ADDR_ASSERT(IsPow2(align)); + return (x + (align - 1)) & (~(align - 1)); +} + +/** +*************************************************************************************************** +* ByteAlign +* +* @brief +* Align UINT_64 "x" to "align" alignment, "align" should be power of 2 +*************************************************************************************************** +*/ +static inline UINT_64 PowTwoAlign( + UINT_64 x, + UINT_64 align) +{ + // + // Assert that x is a power of two. + // + ADDR_ASSERT(IsPow2(align)); + return (x + (align - 1)) & (~(align - 1)); +} + +/** +*************************************************************************************************** +* Min +* +* @brief +* Get the min value between two unsigned values +*************************************************************************************************** +*/ +static inline UINT_32 Min( + UINT_32 value1, + UINT_32 value2) +{ + return ((value1 < (value2)) ? (value1) : value2); +} + +/** +*************************************************************************************************** +* Min +* +* @brief +* Get the min value between two signed values +*************************************************************************************************** +*/ +static inline INT_32 Min( + INT_32 value1, + INT_32 value2) +{ + return ((value1 < (value2)) ? (value1) : value2); +} + +/** +*************************************************************************************************** +* Max +* +* @brief +* Get the max value between two unsigned values +*************************************************************************************************** +*/ +static inline UINT_32 Max( + UINT_32 value1, + UINT_32 value2) +{ + return ((value1 > (value2)) ? (value1) : value2); +} + +/** +*************************************************************************************************** +* Max +* +* @brief +* Get the max value between two signed values +*************************************************************************************************** +*/ +static inline INT_32 Max( + INT_32 value1, + INT_32 value2) +{ + return ((value1 > (value2)) ? (value1) : value2); +} + +/** +*************************************************************************************************** +* NextPow2 +* +* @brief +* Compute the mipmap's next level dim size +*************************************************************************************************** +*/ +static inline UINT_32 NextPow2( + UINT_32 dim) ///< [in] dimension of miplevel +{ + UINT_32 newDim; + + newDim = 1; + + if (dim > 0x7fffffff) + { + ADDR_ASSERT_ALWAYS(); + newDim = 0x80000000; + } + else + { + while (newDim < dim) + { + newDim <<= 1; + } + } + + return newDim; +} + +/** +*************************************************************************************************** +* Log2 +* +* @brief +* Compute log of base 2 +*************************************************************************************************** +*/ +static inline UINT_32 Log2( + UINT_32 x) ///< [in] the value should calculate log based 2 +{ + UINT_32 y; + + // + // Assert that x is a power of two. + // + ADDR_ASSERT(IsPow2(x)); + + y = 0; + while (x > 1) + { + x >>= 1; + y++; + } + + return y; +} + +/** +*************************************************************************************************** +* QLog2 +* +* @brief +* Compute log of base 2 quickly (<= 16) +*************************************************************************************************** +*/ +static inline UINT_32 QLog2( + UINT_32 x) ///< [in] the value should calculate log based 2 +{ + ADDR_ASSERT(x <= 16); + + UINT_32 y = 0; + + switch (x) + { + case 1: + y = 0; + break; + case 2: + y = 1; + break; + case 4: + y = 2; + break; + case 8: + y = 3; + break; + case 16: + y = 4; + break; + default: + ADDR_ASSERT_ALWAYS(); + } + + return y; +} + +/** +*************************************************************************************************** +* SafeAssign +* +* @brief +* NULL pointer safe assignment +*************************************************************************************************** +*/ +static inline VOID SafeAssign( + UINT_32* pLVal, ///< [in] Pointer to left val + UINT_32 rVal) ///< [in] Right value +{ + if (pLVal) + { + *pLVal = rVal; + } +} + +/** +*************************************************************************************************** +* SafeAssign +* +* @brief +* NULL pointer safe assignment for 64bit values +*************************************************************************************************** +*/ +static inline VOID SafeAssign( + UINT_64* pLVal, ///< [in] Pointer to left val + UINT_64 rVal) ///< [in] Right value +{ + if (pLVal) + { + *pLVal = rVal; + } +} + +/** +*************************************************************************************************** +* SafeAssign +* +* @brief +* NULL pointer safe assignment for AddrTileMode +*************************************************************************************************** +*/ +static inline VOID SafeAssign( + AddrTileMode* pLVal, ///< [in] Pointer to left val + AddrTileMode rVal) ///< [in] Right value +{ + if (pLVal) + { + *pLVal = rVal; + } +} + +#endif // __ADDR_COMMON_H__ + diff -Nru mesa-12.0.6/src/amd/addrlib/core/addrelemlib.cpp mesa-17.0.7/src/amd/addrlib/core/addrelemlib.cpp --- mesa-12.0.6/src/amd/addrlib/core/addrelemlib.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/addrlib/core/addrelemlib.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,1674 @@ +/* + * Copyright © 2014 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +*************************************************************************************************** +* @file addrelemlib.cpp +* @brief Contains the class implementation for element/pixel related functions +*************************************************************************************************** +*/ + +#include "addrelemlib.h" +#include "addrlib.h" + + +/** +*************************************************************************************************** +* AddrElemLib::AddrElemLib +* +* @brief +* constructor +* +* @return +* N/A +*************************************************************************************************** +*/ +AddrElemLib::AddrElemLib( + AddrLib* const pAddrLib) : ///< [in] Parent addrlib instance pointer + AddrObject(pAddrLib->GetClient()), + m_pAddrLib(pAddrLib) +{ + switch (m_pAddrLib->GetAddrChipFamily()) + { + case ADDR_CHIP_FAMILY_R6XX: + m_depthPlanarType = ADDR_DEPTH_PLANAR_R600; + m_fp16ExportNorm = 0; + break; + case ADDR_CHIP_FAMILY_R7XX: + m_depthPlanarType = ADDR_DEPTH_PLANAR_R600; + m_fp16ExportNorm = 1; + break; + case ADDR_CHIP_FAMILY_R8XX: + case ADDR_CHIP_FAMILY_NI: // Same as 8xx + m_depthPlanarType = ADDR_DEPTH_PLANAR_R800; + m_fp16ExportNorm = 1; + break; + default: + m_fp16ExportNorm = 1; + m_depthPlanarType = ADDR_DEPTH_PLANAR_R800; + } + + m_configFlags.value = 0; +} + +/** +*************************************************************************************************** +* AddrElemLib::~AddrElemLib +* +* @brief +* destructor +* +* @return +* N/A +*************************************************************************************************** +*/ +AddrElemLib::~AddrElemLib() +{ +} + +/** +*************************************************************************************************** +* AddrElemLib::Create +* +* @brief +* Creates and initializes AddrLib object. +* +* @return +* Returns point to ADDR_CREATEINFO if successful. +*************************************************************************************************** +*/ +AddrElemLib* AddrElemLib::Create( + const AddrLib* const pAddrLib) ///< [in] Pointer of parent AddrLib instance +{ + AddrElemLib* pElemLib = NULL; + + if (pAddrLib) + { + pElemLib = new(pAddrLib->GetClient()) AddrElemLib(const_cast(pAddrLib)); + } + + return pElemLib; +} + +/************************************************************************************************** +* AddrElemLib::Flt32sToInt32s +* +* @brief +* Convert a ADDR_FLT_32 value to Int32 value +* +* @return +* N/A +*************************************************************************************************** +*/ +VOID AddrElemLib::Flt32sToInt32s( + ADDR_FLT_32 value, ///< [in] ADDR_FLT_32 value + UINT_32 bits, ///< [in] nubmer of bits in value + AddrNumberType numberType, ///< [in] the type of number + UINT_32* pResult) ///< [out] Int32 value +{ + UINT_8 round = 128; //ADDR_ROUND_BY_HALF + UINT_32 uscale; + UINT_32 sign; + + //convert each component to an INT_32 + switch ( numberType ) + { + case ADDR_NO_NUMBER: //fall through + case ADDR_ZERO: //fall through + case ADDR_ONE: //fall through + case ADDR_EPSILON: //fall through + return; // these are zero-bit components, so don't set result + + case ADDR_UINT_BITS: // unsigned integer bit field, clamped to range + uscale = (1< uscale)) + { + *pResult = uscale; + } + else + { + *pResult = value.i; + } + return; + } + + // The algorithm used in the DB and TX differs at one value for 24-bit unorms + case ADDR_UNORM_R6XXDB: // unsigned repeating fraction + if ((bits==24) && (value.i == 0x33000000)) + { + *pResult = 1; + return; + } // Else treat like ADDR_UNORM_R6XX + + case ADDR_UNORM_R6XX: // unsigned repeating fraction + if (value.f <= 0) + { + *pResult = 0; // first clamp to [0..1] + } + else + { + if (value.f >= 1) + { + *pResult = (1<(f + (round/256.0f)); + } + #endif + else + { + ADDR_FLT_32 scaled; + ADDR_FLT_32 shifted; + UINT_64 truncated, rounded; + UINT_32 altShift; + UINT_32 mask = (1 << bits) - 1; + UINT_32 half = 1 << (bits - 1); + UINT_32 mant24 = (value.i & 0x7FFFFF) + 0x800000; + UINT_64 temp = mant24 - (mant24>>bits) - + static_cast((mant24 & mask) > half); + UINT_32 exp8 = value.i >> 23; + UINT_32 shift = 126 - exp8 + 24 - bits; + UINT_64 final; + + if (shift >= 32) // This is zero, even with maximum dither add + { + final = 0; + } + else + { + final = ((temp<<8) + (static_cast(round)<> (shift+8); + } + //ADDR_EXIT( *pResult == final, + // ("Float %x converted to %d-bit Unorm %x != bitwise %x", + // value.u, bits, (UINT_32)*pResult, (UINT_32)final) ); + if (final > mask) + { + final = mask; + } + + scaled.f = value.f * ((1<>23)&0xFF); + truncated = (altShift > 60) ? 0 : truncated >> altShift; + rounded = static_cast((round + truncated) >> 8); + //if (rounded > ((1<(rounded); //(INT_32)final; + } + } + } + + return; + + case ADDR_S8FLOAT32: // 32-bit IEEE float, passes through NaN values + *pResult = value.i; + return; + + // @@ FIX ROUNDING in this code, fix the denorm case + case ADDR_U4FLOATC: // Unsigned float, 4-bit exponent. bias 15, clamped [0..1] + sign = (value.i >> 31) & 1; + if ((value.i&0x7F800000) == 0x7F800000) // If NaN or INF: + { + if ((value.i&0x007FFFFF) != 0) // then if NaN + { + *pResult = 0; // return 0 + } + else + { + *pResult = (sign)?0:0xF00000; // else +INF->+1, -INF->0 + } + return; + } + if (value.f <= 0) + { + *pResult = 0; + } + else + { + if (value.f>=1) + { + *pResult = 0xF << (bits-4); + } + else + { + if ((value.i>>23) > 112 ) + { + // 24-bit float: normalized + // value.i += 1 << (22-bits+4); + // round the IEEE mantissa to mantissa size + // @@ NOTE: add code to support rounding + value.u &= 0x7FFFFFF; // mask off high 4 exponent bits + *pResult = value.i >> (23-bits+4);// shift off unused mantissa bits + } + else + { + // 24-bit float: denormalized + value.f = value.f / (1<<28) / (1<<28); + value.f = value.f / (1<<28) / (1<<28); // convert to IEEE denorm + // value.i += 1 << (22-bits+4); + // round the IEEE mantissa to mantissa size + // @@ NOTE: add code to support rounding + *pResult = value.i >> (23-bits+4); // shift off unused mantissa bits + } + } + } + + return; + + default: // invalid number mode + //ADDR_EXIT(0, ("Invalid AddrNumber %d", numberType) ); + break; + + } +} + +/** +*************************************************************************************************** +* AddrElemLib::Int32sToPixel +* +* @brief +* Pack 32-bit integer values into an uncompressed pixel, +* in the proper order +* +* @return +* N/A +* +* @note +* This entry point packes four 32-bit integer values into +* an uncompressed pixel. The pixel values are specifies in +* standard order, e.g. depth/stencil. This routine asserts +* if called on compressed pixel. +*************************************************************************************************** +*/ +VOID AddrElemLib::Int32sToPixel( + UINT_32 numComps, ///< [in] number of components + UINT_32* pComps, ///< [in] compnents + UINT_32* pCompBits, ///< [in] total bits in each component + UINT_32* pCompStart, ///< [in] the first bit position of each component + ADDR_COMPONENT_FLAGS properties, ///< [in] properties about byteAligned, exportNorm + UINT_32 resultBits, ///< [in] result bits: total bpp after decompression + UINT_8* pPixel) ///< [out] a depth/stencil pixel value +{ + UINT_32 i; + UINT_32 j; + UINT_32 start; + UINT_32 size; + UINT_32 byte; + UINT_32 value = 0; + UINT_32 compMask; + UINT_32 elemMask=0; + UINT_32 elementXor = 0; // address xor when reading bytes from elements + + + // @@ NOTE: assert if called on a compressed format! + + if (properties.byteAligned) // Components are all byte-sized + { + for (i = 0; i < numComps; i++) // Then for each component + { + // Copy the bytes of the component into the element + start = pCompStart[i] / 8; + size = pCompBits[i] / 8; + for (j = 0; j < size; j++) + { + pPixel[(j+start)^elementXor] = static_cast(pComps[i] >> (8*j)); + } + } + } + else // Element is 32-bits or less, components are bit fields + { + // First, extract each component in turn and combine it into a 32-bit value + for (i = 0; i < numComps; i++) + { + compMask = (1 << pCompBits[i]) - 1; + elemMask |= compMask << pCompStart[i]; + value |= (pComps[i] & compMask) << pCompStart[i]; + } + + // Mext, copy the masked value into the element + size = (resultBits + 7) / 8; + for (i = 0; i < size; i++) + { + byte = pPixel[i^elementXor] & ~(elemMask >> (8*i)); + pPixel[i^elementXor] = static_cast(byte | ((elemMask & value) >> (8*i))); + } + } +} + +/** +*************************************************************************************************** +* Flt32ToDepthPixel +* +* @brief +* Convert a FLT_32 value to a depth/stencil pixel value +* +* @return +* N/A +*************************************************************************************************** +*/ +VOID AddrElemLib::Flt32ToDepthPixel( + AddrDepthFormat format, ///< [in] Depth format + const ADDR_FLT_32 comps[2], ///< [in] two components of depth + UINT_8* pPixel ///< [out] depth pixel value + ) const +{ + UINT_32 i; + UINT_32 values[2]; + ADDR_COMPONENT_FLAGS properties; // byteAligned, exportNorm + UINT_32 resultBits = 0; // result bits: total bits per pixel after decompression + + ADDR_PIXEL_FORMATINFO fmt; + + // get type for each component + PixGetDepthCompInfo(format, &fmt); + + //initialize properties + properties.byteAligned = TRUE; + properties.exportNorm = TRUE; + properties.floatComp = FALSE; + + //set properties and result bits + for (i = 0; i < 2; i++) + { + if ((fmt.compBit[i] & 7) || (fmt.compStart[i] & 7)) + { + properties.byteAligned = FALSE; + } + + if (resultBits < fmt.compStart[i] + fmt.compBit[i]) + { + resultBits = fmt.compStart[i] + fmt.compBit[i]; + } + + // Clear ADDR_EXPORT_NORM if can't be represented as 11-bit or smaller [-1..+1] format + if (fmt.compBit[i] > 11 || fmt.numType[i] >= ADDR_USCALED) + { + properties.exportNorm = FALSE; + } + + // Mark if there are any floating point components + if ((fmt.numType[i] == ADDR_U4FLOATC) || (fmt.numType[i] >= ADDR_S8FLOAT) ) + { + properties.floatComp = TRUE; + } + } + + // Convert the two input floats to integer values + for (i = 0; i < 2; i++) + { + Flt32sToInt32s(comps[i], fmt.compBit[i], fmt.numType[i], &values[i]); + } + + // Then pack the two integer components, in the proper order + Int32sToPixel(2, values, fmt.compBit, fmt.compStart, properties, resultBits, pPixel ); + +} + +/** +*************************************************************************************************** +* Flt32ToColorPixel +* +* @brief +* Convert a FLT_32 value to a red/green/blue/alpha pixel value +* +* @return +* N/A +*************************************************************************************************** +*/ +VOID AddrElemLib::Flt32ToColorPixel( + AddrColorFormat format, ///< [in] Color format + AddrSurfaceNumber surfNum, ///< [in] Surface number + AddrSurfaceSwap surfSwap, ///< [in] Surface swap + const ADDR_FLT_32 comps[4], ///< [in] four components of color + UINT_8* pPixel ///< [out] a red/green/blue/alpha pixel value + ) const +{ + ADDR_PIXEL_FORMATINFO pixelInfo; + + UINT_32 i; + UINT_32 values[4]; + ADDR_COMPONENT_FLAGS properties; // byteAligned, exportNorm + UINT_32 resultBits = 0; // result bits: total bits per pixel after decompression + + memset(&pixelInfo, 0, sizeof(ADDR_PIXEL_FORMATINFO)); + + PixGetColorCompInfo(format, surfNum, surfSwap, &pixelInfo); + + //initialize properties + properties.byteAligned = TRUE; + properties.exportNorm = TRUE; + properties.floatComp = FALSE; + + //set properties and result bits + for (i = 0; i < 4; i++) + { + if ( (pixelInfo.compBit[i] & 7) || (pixelInfo.compStart[i] & 7) ) + { + properties.byteAligned = FALSE; + } + + if (resultBits < pixelInfo.compStart[i] + pixelInfo.compBit[i]) + { + resultBits = pixelInfo.compStart[i] + pixelInfo.compBit[i]; + } + + if (m_fp16ExportNorm) + { + // Clear ADDR_EXPORT_NORM if can't be represented as 11-bit or smaller [-1..+1] format + // or if it's not FP and <=16 bits + if (((pixelInfo.compBit[i] > 11) || (pixelInfo.numType[i] >= ADDR_USCALED)) + && (pixelInfo.numType[i] !=ADDR_U4FLOATC)) + { + properties.exportNorm = FALSE; + } + } + else + { + // Clear ADDR_EXPORT_NORM if can't be represented as 11-bit or smaller [-1..+1] format + if (pixelInfo.compBit[i] > 11 || pixelInfo.numType[i] >= ADDR_USCALED) + { + properties.exportNorm = FALSE; + } + } + + // Mark if there are any floating point components + if ( (pixelInfo.numType[i] == ADDR_U4FLOATC) || + (pixelInfo.numType[i] >= ADDR_S8FLOAT) ) + { + properties.floatComp = TRUE; + } + } + + // Convert the four input floats to integer values + for (i = 0; i < 4; i++) + { + Flt32sToInt32s(comps[i], pixelInfo.compBit[i], pixelInfo.numType[i], &values[i]); + } + + // Then pack the four integer components, in the proper order + Int32sToPixel(4, values, &pixelInfo.compBit[0], &pixelInfo.compStart[0], + properties, resultBits, pPixel); +} + +/** +*************************************************************************************************** +* AddrElemLib::GetCompType +* +* @brief +* Fill per component info +* +* @return +* N/A +* +*************************************************************************************************** +*/ +VOID AddrElemLib::GetCompType( + AddrColorFormat format, ///< [in] surface format + AddrSurfaceNumber numType, ///< [in] number type + ADDR_PIXEL_FORMATINFO* pInfo) ///< [in][out] per component info out +{ + BOOL_32 handled = FALSE; + + // Floating point formats override the number format + switch (format) + { + case ADDR_COLOR_16_FLOAT: // fall through for all pure floating point format + case ADDR_COLOR_16_16_FLOAT: + case ADDR_COLOR_16_16_16_16_FLOAT: + case ADDR_COLOR_32_FLOAT: + case ADDR_COLOR_32_32_FLOAT: + case ADDR_COLOR_32_32_32_32_FLOAT: + case ADDR_COLOR_10_11_11_FLOAT: + case ADDR_COLOR_11_11_10_FLOAT: + numType = ADDR_NUMBER_FLOAT; + break; + // Special handling for the depth formats + case ADDR_COLOR_8_24: // fall through for these 2 similar format + case ADDR_COLOR_24_8: + for (UINT_32 c = 0; c < 4; c++) + { + if (pInfo->compBit[c] == 8) + { + pInfo->numType[c] = ADDR_UINT_BITS; + } + else if (pInfo->compBit[c] == 24) + { + pInfo->numType[c] = ADDR_UNORM_R6XX; + } + else + { + pInfo->numType[c] = ADDR_NO_NUMBER; + } + } + handled = TRUE; + break; + case ADDR_COLOR_8_24_FLOAT: // fall through for these 3 similar format + case ADDR_COLOR_24_8_FLOAT: + case ADDR_COLOR_X24_8_32_FLOAT: + for (UINT_32 c = 0; c < 4; c++) + { + if (pInfo->compBit[c] == 8) + { + pInfo->numType[c] = ADDR_UINT_BITS; + } + else if (pInfo->compBit[c] == 24) + { + pInfo->numType[c] = ADDR_U4FLOATC; + } + else if (pInfo->compBit[c] == 32) + { + pInfo->numType[c] = ADDR_S8FLOAT32; + } + else + { + pInfo->numType[c] = ADDR_NO_NUMBER; + } + } + handled = TRUE; + break; + default: + break; + } + + if (!handled) + { + for (UINT_32 c = 0; c < 4; c++) + { + // Assign a number type for each component + AddrSurfaceNumber cnum; + + // First handle default component values + if (pInfo->compBit[c] == 0) + { + if (c < 3) + { + pInfo->numType[c] = ADDR_ZERO; // Default is zero for RGB + } + else if (numType == ADDR_NUMBER_UINT || numType == ADDR_NUMBER_SINT) + { + pInfo->numType[c] = ADDR_EPSILON; // Alpha INT_32 bits default is 0x01 + } + else + { + pInfo->numType[c] = ADDR_ONE; // Alpha normal default is float 1.0 + } + continue; + } + // Now handle small components + else if (pInfo->compBit[c] == 1) + { + if (numType == ADDR_NUMBER_UINT || numType == ADDR_NUMBER_SINT) + { + cnum = ADDR_NUMBER_UINT; + } + else + { + cnum = ADDR_NUMBER_UNORM; + } + } + else + { + cnum = numType; + } + + // If no default, set the number type fom num, compbits, and architecture + switch (cnum) + { + case ADDR_NUMBER_SRGB: + pInfo->numType[c] = (c < 3) ? ADDR_GAMMA8_R6XX : ADDR_UNORM_R6XX; + break; + case ADDR_NUMBER_UNORM: + pInfo->numType[c] = ADDR_UNORM_R6XX; + break; + case ADDR_NUMBER_SNORM: + pInfo->numType[c] = ADDR_SNORM_R6XX; + break; + case ADDR_NUMBER_USCALED: + pInfo->numType[c] = ADDR_USCALED; // @@ Do we need separate Pele routine? + break; + case ADDR_NUMBER_SSCALED: + pInfo->numType[c] = ADDR_SSCALED; // @@ Do we need separate Pele routine? + break; + case ADDR_NUMBER_FLOAT: + if (pInfo->compBit[c] == 32) + { + pInfo->numType[c] = ADDR_S8FLOAT32; + } + else if (pInfo->compBit[c] == 16) + { + pInfo->numType[c] = ADDR_S5FLOAT; + } + else if (pInfo->compBit[c] >= 10) + { + pInfo->numType[c] = ADDR_U5FLOAT; + } + else + { + ADDR_ASSERT_ALWAYS(); + } + break; + case ADDR_NUMBER_SINT: + pInfo->numType[c] = ADDR_SINT_BITS; + break; + case ADDR_NUMBER_UINT: + pInfo->numType[c] = ADDR_UINT_BITS; + break; + + default: + ADDR_ASSERT(!"Invalid number type"); + pInfo->numType[c] = ADDR_NO_NUMBER; + break; + } + } + } +} + +/** +*************************************************************************************************** +* AddrElemLib::GetCompSwap +* +* @brief +* Get components swapped for color surface +* +* @return +* N/A +* +*************************************************************************************************** +*/ +VOID AddrElemLib::GetCompSwap( + AddrSurfaceSwap swap, ///< [in] swap mode + ADDR_PIXEL_FORMATINFO* pInfo) ///< [in/out] output per component info +{ + switch (pInfo->comps) + { + case 4: + switch (swap) + { + case ADDR_SWAP_ALT: + SwapComps( 0, 2, pInfo ); + break; // BGRA + case ADDR_SWAP_STD_REV: + SwapComps( 0, 3, pInfo ); + SwapComps( 1, 2, pInfo ); + break; // ABGR + case ADDR_SWAP_ALT_REV: + SwapComps( 0, 3, pInfo ); + SwapComps( 0, 2, pInfo ); + SwapComps( 0, 1, pInfo ); + break; // ARGB + default: + break; + } + break; + case 3: + switch (swap) + { + case ADDR_SWAP_ALT_REV: + SwapComps( 0, 3, pInfo ); + SwapComps( 0, 2, pInfo ); + break; // AGR + case ADDR_SWAP_STD_REV: + SwapComps( 0, 2, pInfo ); + break; // BGR + case ADDR_SWAP_ALT: + SwapComps( 2, 3, pInfo ); + break; // RGA + default: + break; // RGB + } + break; + case 2: + switch (swap) + { + case ADDR_SWAP_ALT_REV: + SwapComps( 0, 1, pInfo ); + SwapComps( 1, 3, pInfo ); + break; // AR + case ADDR_SWAP_STD_REV: + SwapComps( 0, 1, pInfo ); + break; // GR + case ADDR_SWAP_ALT: + SwapComps( 1, 3, pInfo ); + break; // RA + default: + break; // RG + } + break; + case 1: + switch (swap) + { + case ADDR_SWAP_ALT_REV: + SwapComps( 0, 3, pInfo ); + break; // A + case ADDR_SWAP_STD_REV: + SwapComps( 0, 2, pInfo ); + break; // B + case ADDR_SWAP_ALT: + SwapComps( 0, 1, pInfo ); + break; // G + default: + break; // R + } + break; + } +} + +/** +*************************************************************************************************** +* AddrElemLib::GetCompSwap +* +* @brief +* Get components swapped for color surface +* +* @return +* N/A +* +*************************************************************************************************** +*/ +VOID AddrElemLib::SwapComps( + UINT_32 c0, ///< [in] component index 0 + UINT_32 c1, ///< [in] component index 1 + ADDR_PIXEL_FORMATINFO* pInfo) ///< [in/out] output per component info +{ + UINT_32 start; + UINT_32 bits; + + start = pInfo->compStart[c0]; + pInfo->compStart[c0] = pInfo->compStart[c1]; + pInfo->compStart[c1] = start; + + bits = pInfo->compBit[c0]; + pInfo->compBit[c0] = pInfo->compBit[c1]; + pInfo->compBit[c1] = bits; +} + +/** +*************************************************************************************************** +* AddrElemLib::PixGetColorCompInfo +* +* @brief +* Get per component info for color surface +* +* @return +* N/A +* +*************************************************************************************************** +*/ +VOID AddrElemLib::PixGetColorCompInfo( + AddrColorFormat format, ///< [in] surface format, read from register + AddrSurfaceNumber number, ///< [in] pixel number type + AddrSurfaceSwap swap, ///< [in] component swap mode + ADDR_PIXEL_FORMATINFO* pInfo ///< [out] output per component info + ) const +{ + // 1. Get componet bits + switch (format) + { + case ADDR_COLOR_8: + GetCompBits(8, 0, 0, 0, pInfo); + break; + case ADDR_COLOR_1_5_5_5: + GetCompBits(5, 5, 5, 1, pInfo); + break; + case ADDR_COLOR_5_6_5: + GetCompBits(8, 6, 5, 0, pInfo); + break; + case ADDR_COLOR_6_5_5: + GetCompBits(5, 5, 6, 0, pInfo); + break; + case ADDR_COLOR_8_8: + GetCompBits(8, 8, 0, 0, pInfo); + break; + case ADDR_COLOR_4_4_4_4: + GetCompBits(4, 4, 4, 4, pInfo); + break; + case ADDR_COLOR_16: + GetCompBits(16, 0, 0, 0, pInfo); + break; + case ADDR_COLOR_8_8_8_8: + GetCompBits(8, 8, 8, 8, pInfo); + break; + case ADDR_COLOR_2_10_10_10: + GetCompBits(10, 10, 10, 2, pInfo); + break; + case ADDR_COLOR_10_11_11: + GetCompBits(11, 11, 10, 0, pInfo); + break; + case ADDR_COLOR_11_11_10: + GetCompBits(10, 11, 11, 0, pInfo); + break; + case ADDR_COLOR_16_16: + GetCompBits(16, 16, 0, 0, pInfo); + break; + case ADDR_COLOR_16_16_16_16: + GetCompBits(16, 16, 16, 16, pInfo); + break; + case ADDR_COLOR_16_FLOAT: + GetCompBits(16, 0, 0, 0, pInfo); + break; + case ADDR_COLOR_16_16_FLOAT: + GetCompBits(16, 16, 0, 0, pInfo); + break; + case ADDR_COLOR_32_FLOAT: + GetCompBits(32, 0, 0, 0, pInfo); + break; + case ADDR_COLOR_32_32_FLOAT: + GetCompBits(32, 32, 0, 0, pInfo); + break; + case ADDR_COLOR_16_16_16_16_FLOAT: + GetCompBits(16, 16, 16, 16, pInfo); + break; + case ADDR_COLOR_32_32_32_32_FLOAT: + GetCompBits(32, 32, 32, 32, pInfo); + break; + + case ADDR_COLOR_32: + GetCompBits(32, 0, 0, 0, pInfo); + break; + case ADDR_COLOR_32_32: + GetCompBits(32, 32, 0, 0, pInfo); + break; + case ADDR_COLOR_32_32_32_32: + GetCompBits(32, 32, 32, 32, pInfo); + break; + case ADDR_COLOR_10_10_10_2: + GetCompBits(2, 10, 10, 10, pInfo); + break; + case ADDR_COLOR_10_11_11_FLOAT: + GetCompBits(11, 11, 10, 0, pInfo); + break; + case ADDR_COLOR_11_11_10_FLOAT: + GetCompBits(10, 11, 11, 0, pInfo); + break; + case ADDR_COLOR_5_5_5_1: + GetCompBits(1, 5, 5, 5, pInfo); + break; + case ADDR_COLOR_3_3_2: + GetCompBits(2, 3, 3, 0, pInfo); + break; + case ADDR_COLOR_4_4: + GetCompBits(4, 4, 0, 0, pInfo); + break; + case ADDR_COLOR_8_24: + case ADDR_COLOR_8_24_FLOAT: // same bit count, fall through + GetCompBits(24, 8, 0, 0, pInfo); + break; + case ADDR_COLOR_24_8: + case ADDR_COLOR_24_8_FLOAT: // same bit count, fall through + GetCompBits(8, 24, 0, 0, pInfo); + break; + case ADDR_COLOR_X24_8_32_FLOAT: + GetCompBits(32, 8, 0, 0, pInfo); + break; + + case ADDR_COLOR_INVALID: + GetCompBits(0, 0, 0, 0, pInfo); + break; + default: + ADDR_ASSERT(0); + GetCompBits(0, 0, 0, 0, pInfo); + break; + } + + // 2. Get component number type + + GetCompType(format, number, pInfo); + + // 3. Swap components if needed + + GetCompSwap(swap, pInfo); +} + +/** +*************************************************************************************************** +* AddrElemLib::PixGetDepthCompInfo +* +* @brief +* Get per component info for depth surface +* +* @return +* N/A +* +*************************************************************************************************** +*/ +VOID AddrElemLib::PixGetDepthCompInfo( + AddrDepthFormat format, ///< [in] surface format, read from register + ADDR_PIXEL_FORMATINFO* pInfo ///< [out] output per component bits and type + ) const +{ + if (m_depthPlanarType == ADDR_DEPTH_PLANAR_R800) + { + if (format == ADDR_DEPTH_8_24_FLOAT) + { + format = ADDR_DEPTH_X24_8_32_FLOAT; // Use this format to represent R800's D24FS8 + } + + if (format == ADDR_DEPTH_X8_24_FLOAT) + { + format = ADDR_DEPTH_32_FLOAT; + } + } + + switch (format) + { + case ADDR_DEPTH_16: + GetCompBits(16, 0, 0, 0, pInfo); + break; + case ADDR_DEPTH_8_24: + case ADDR_DEPTH_8_24_FLOAT: // similar format, fall through + GetCompBits(24, 8, 0, 0, pInfo); + break; + case ADDR_DEPTH_X8_24: + case ADDR_DEPTH_X8_24_FLOAT: // similar format, fall through + GetCompBits(24, 0, 0, 0, pInfo); + break; + case ADDR_DEPTH_32_FLOAT: + GetCompBits(32, 0, 0, 0, pInfo); + break; + case ADDR_DEPTH_X24_8_32_FLOAT: + GetCompBits(32, 8, 0, 0, pInfo); + break; + case ADDR_DEPTH_INVALID: + GetCompBits(0, 0, 0, 0, pInfo); + break; + default: + ADDR_ASSERT(0); + GetCompBits(0, 0, 0, 0, pInfo); + break; + } + + switch (format) + { + case ADDR_DEPTH_16: + pInfo->numType [0] = ADDR_UNORM_R6XX; + pInfo->numType [1] = ADDR_ZERO; + break; + case ADDR_DEPTH_8_24: + pInfo->numType [0] = ADDR_UNORM_R6XXDB; + pInfo->numType [1] = ADDR_UINT_BITS; + break; + case ADDR_DEPTH_8_24_FLOAT: + pInfo->numType [0] = ADDR_U4FLOATC; + pInfo->numType [1] = ADDR_UINT_BITS; + break; + case ADDR_DEPTH_X8_24: + pInfo->numType [0] = ADDR_UNORM_R6XXDB; + pInfo->numType [1] = ADDR_ZERO; + break; + case ADDR_DEPTH_X8_24_FLOAT: + pInfo->numType [0] = ADDR_U4FLOATC; + pInfo->numType [1] = ADDR_ZERO; + break; + case ADDR_DEPTH_32_FLOAT: + pInfo->numType [0] = ADDR_S8FLOAT32; + pInfo->numType [1] = ADDR_ZERO; + break; + case ADDR_DEPTH_X24_8_32_FLOAT: + pInfo->numType [0] = ADDR_S8FLOAT32; + pInfo->numType [1] = ADDR_UINT_BITS; + break; + default: + pInfo->numType [0] = ADDR_NO_NUMBER; + pInfo->numType [1] = ADDR_NO_NUMBER; + break; + } + + pInfo->numType [2] = ADDR_NO_NUMBER; + pInfo->numType [3] = ADDR_NO_NUMBER; +} + +/** +*************************************************************************************************** +* AddrElemLib::PixGetExportNorm +* +* @brief +* Check if fp16 export norm can be enabled. +* +* @return +* TRUE if this can be enabled. +* +*************************************************************************************************** +*/ +BOOL_32 AddrElemLib::PixGetExportNorm( + AddrColorFormat colorFmt, ///< [in] surface format, read from register + AddrSurfaceNumber numberFmt, ///< [in] pixel number type + AddrSurfaceSwap swap ///< [in] components swap type + ) const +{ + BOOL_32 enabled = TRUE; + + ADDR_PIXEL_FORMATINFO formatInfo; + + PixGetColorCompInfo(colorFmt, numberFmt, swap, &formatInfo); + + for (UINT_32 c = 0; c < 4; c++) + { + if (m_fp16ExportNorm) + { + if (((formatInfo.compBit[c] > 11) || (formatInfo.numType[c] > ADDR_USCALED)) && + (formatInfo.numType[c] != ADDR_U4FLOATC) && + (formatInfo.numType[c] != ADDR_S5FLOAT) && + (formatInfo.numType[c] != ADDR_S5FLOATM) && + (formatInfo.numType[c] != ADDR_U5FLOAT) && + (formatInfo.numType[c] != ADDR_U3FLOATM)) + { + enabled = FALSE; + break; + } + } + else + { + if ((formatInfo.compBit[c] > 11) || (formatInfo.numType[c] > ADDR_USCALED)) + { + enabled = FALSE; + break; + } + } + } + + return enabled; +} + +/** +*************************************************************************************************** +* AddrElemLib::AdjustSurfaceInfo +* +* @brief +* Adjust bpp/base pitch/width/height according to elemMode and expandX/Y +* +* @return +* N/A +*************************************************************************************************** +*/ +VOID AddrElemLib::AdjustSurfaceInfo( + AddrElemMode elemMode, ///< [in] element mode + UINT_32 expandX, ///< [in] decompression expansion factor in X + UINT_32 expandY, ///< [in] decompression expansion factor in Y + UINT_32* pBpp, ///< [in/out] bpp + UINT_32* pBasePitch, ///< [in/out] base pitch + UINT_32* pWidth, ///< [in/out] width + UINT_32* pHeight) ///< [in/out] height +{ + UINT_32 packedBits; + UINT_32 basePitch; + UINT_32 width; + UINT_32 height; + UINT_32 bpp; + BOOL_32 bBCnFormat = FALSE; + + ADDR_ASSERT(pBpp != NULL); + ADDR_ASSERT(pWidth != NULL && pHeight != NULL && pBasePitch != NULL); + + if (pBpp) + { + bpp = *pBpp; + + switch (elemMode) + { + case ADDR_EXPANDED: + packedBits = bpp / expandX / expandY; + break; + case ADDR_PACKED_STD: // Different bit order + case ADDR_PACKED_REV: + packedBits = bpp * expandX * expandY; + break; + case ADDR_PACKED_GBGR: + case ADDR_PACKED_BGRG: + packedBits = bpp; // 32-bit packed ==> 2 32-bit result + break; + case ADDR_PACKED_BC1: // Fall through + case ADDR_PACKED_BC4: + packedBits = 64; + bBCnFormat = TRUE; + break; + case ADDR_PACKED_BC2: // Fall through + case ADDR_PACKED_BC3: // Fall through + case ADDR_PACKED_BC5: // Fall through + bBCnFormat = TRUE; + packedBits = 128; + break; + case ADDR_ROUND_BY_HALF: // Fall through + case ADDR_ROUND_TRUNCATE: // Fall through + case ADDR_ROUND_DITHER: // Fall through + case ADDR_UNCOMPRESSED: + packedBits = bpp; + break; + default: + packedBits = bpp; + ADDR_ASSERT_ALWAYS(); + break; + } + + *pBpp = packedBits; + } + + if (pWidth && pHeight && pBasePitch) + { + basePitch = *pBasePitch; + width = *pWidth; + height = *pHeight; + + if ((expandX > 1) || (expandY > 1)) + { + if (elemMode == ADDR_EXPANDED) + { + basePitch *= expandX; + width *= expandX; + height *= expandY; + } + else + { + // Evergreen family workaround + if (bBCnFormat && (m_pAddrLib->GetAddrChipFamily() == ADDR_CHIP_FAMILY_R8XX)) + { + // For BCn we now pad it to POW2 at the beginning so it is safe to + // divide by 4 directly + basePitch = basePitch / expandX; + width = width / expandX; + height = height / expandY; +#if DEBUG + width = (width == 0) ? 1 : width; + height = (height == 0) ? 1 : height; + + if ((*pWidth > PowTwoAlign(width, 8) * expandX) || + (*pHeight > PowTwoAlign(height, 8) * expandY)) // 8 is 1D tiling alignment + { + // if this assertion is hit we may have issues if app samples + // rightmost/bottommost pixels + ADDR_ASSERT_ALWAYS(); + } +#endif + } + else // Not BCn format we still keep old way (FMT_1? No real test yet) + { + basePitch = (basePitch + expandX - 1) / expandX; + width = (width + expandX - 1) / expandX; + height = (height + expandY - 1) / expandY; + } + } + + *pBasePitch = basePitch; // 0 is legal value for base pitch. + *pWidth = (width == 0) ? 1 : width; + *pHeight = (height == 0) ? 1 : height; + } //if (pWidth && pHeight && pBasePitch) + } +} + +/** +*************************************************************************************************** +* AddrElemLib::RestoreSurfaceInfo +* +* @brief +* Reverse operation of AdjustSurfaceInfo +* +* @return +* N/A +*************************************************************************************************** +*/ +VOID AddrElemLib::RestoreSurfaceInfo( + AddrElemMode elemMode, ///< [in] element mode + UINT_32 expandX, ///< [in] decompression expansion factor in X + UINT_32 expandY, ///< [out] decompression expansion factor in Y + UINT_32* pBpp, ///< [in/out] bpp + UINT_32* pWidth, ///< [in/out] width + UINT_32* pHeight) ///< [in/out] height +{ + UINT_32 originalBits; + UINT_32 width; + UINT_32 height; + UINT_32 bpp; + + ADDR_ASSERT(pBpp != NULL); + ADDR_ASSERT(pWidth != NULL && pHeight != NULL); + + if (pBpp) + { + bpp = *pBpp; + + switch (elemMode) + { + case ADDR_EXPANDED: + originalBits = bpp * expandX * expandY; + break; + case ADDR_PACKED_STD: // Different bit order + case ADDR_PACKED_REV: + originalBits = bpp / expandX / expandY; + break; + case ADDR_PACKED_GBGR: + case ADDR_PACKED_BGRG: + originalBits = bpp; // 32-bit packed ==> 2 32-bit result + break; + case ADDR_PACKED_BC1: // Fall through + case ADDR_PACKED_BC4: + originalBits = 64; + break; + case ADDR_PACKED_BC2: // Fall through + case ADDR_PACKED_BC3: // Fall through + case ADDR_PACKED_BC5: + originalBits = 128; + break; + case ADDR_ROUND_BY_HALF: // Fall through + case ADDR_ROUND_TRUNCATE: // Fall through + case ADDR_ROUND_DITHER: // Fall through + case ADDR_UNCOMPRESSED: + originalBits = bpp; + break; + default: + originalBits = bpp; + ADDR_ASSERT_ALWAYS(); + break; + } + + *pBpp = originalBits; + } + + if (pWidth && pHeight) + { + width = *pWidth; + height = *pHeight; + + if ((expandX > 1) || (expandY > 1)) + { + if (elemMode == ADDR_EXPANDED) + { + width /= expandX; + height /= expandY; + } + else + { + width *= expandX; + height *= expandY; + } + } + + *pWidth = (width == 0) ? 1 : width; + *pHeight = (height == 0) ? 1 : height; + } +} + +/** +*************************************************************************************************** +* AddrElemLib::GetBitsPerPixel +* +* @brief +* Compute the total bits per element according to a format +* code. For compressed formats, this is not the same as +* the number of bits per decompressed element. +* +* @return +* Bits per pixel +*************************************************************************************************** +*/ +UINT_32 AddrElemLib::GetBitsPerPixel( + AddrFormat format, ///< [in] surface format code + AddrElemMode* pElemMode, ///< [out] element mode + UINT_32* pExpandX, ///< [out] decompression expansion factor in X + UINT_32* pExpandY, ///< [out] decompression expansion factor in Y + UINT_32* pUnusedBits) ///< [out] bits unused +{ + UINT_32 bpp; + UINT_32 expandX = 1; + UINT_32 expandY = 1; + UINT_32 bitUnused = 0; + AddrElemMode elemMode = ADDR_UNCOMPRESSED; // default value + + switch (format) + { + case ADDR_FMT_8: + bpp = 8; + break; + case ADDR_FMT_1_5_5_5: + case ADDR_FMT_5_6_5: + case ADDR_FMT_6_5_5: + case ADDR_FMT_8_8: + case ADDR_FMT_4_4_4_4: + case ADDR_FMT_16: + case ADDR_FMT_16_FLOAT: + bpp = 16; + break; + case ADDR_FMT_GB_GR: // treat as FMT_8_8 + elemMode = ADDR_PACKED_GBGR; + bpp = 16; + break; + case ADDR_FMT_BG_RG: // treat as FMT_8_8 + elemMode = ADDR_PACKED_BGRG; + bpp = 16; + break; + case ADDR_FMT_8_8_8_8: + case ADDR_FMT_2_10_10_10: + case ADDR_FMT_10_11_11: + case ADDR_FMT_11_11_10: + case ADDR_FMT_16_16: + case ADDR_FMT_16_16_FLOAT: + case ADDR_FMT_32: + case ADDR_FMT_32_FLOAT: + case ADDR_FMT_24_8: + case ADDR_FMT_24_8_FLOAT: + bpp = 32; + break; + case ADDR_FMT_16_16_16_16: + case ADDR_FMT_16_16_16_16_FLOAT: + case ADDR_FMT_32_32: + case ADDR_FMT_32_32_FLOAT: + case ADDR_FMT_CTX1: + bpp = 64; + break; + case ADDR_FMT_32_32_32_32: + case ADDR_FMT_32_32_32_32_FLOAT: + bpp = 128; + break; + case ADDR_FMT_INVALID: + bpp = 0; + break; + case ADDR_FMT_1_REVERSED: + elemMode = ADDR_PACKED_REV; + expandX = 8; + bpp = 1; + break; + case ADDR_FMT_1: + elemMode = ADDR_PACKED_STD; + expandX = 8; + bpp = 1; + break; + case ADDR_FMT_4_4: + case ADDR_FMT_3_3_2: + bpp = 8; + break; + case ADDR_FMT_5_5_5_1: + bpp = 16; + break; + case ADDR_FMT_32_AS_8: + case ADDR_FMT_32_AS_8_8: + case ADDR_FMT_8_24: + case ADDR_FMT_8_24_FLOAT: + case ADDR_FMT_10_10_10_2: + case ADDR_FMT_10_11_11_FLOAT: + case ADDR_FMT_11_11_10_FLOAT: + case ADDR_FMT_5_9_9_9_SHAREDEXP: + bpp = 32; + break; + case ADDR_FMT_X24_8_32_FLOAT: + bpp = 64; + bitUnused = 24; + break; + case ADDR_FMT_8_8_8: + elemMode = ADDR_EXPANDED; + bpp = 24;//@@ 8; // read 3 elements per pixel + expandX = 3; + break; + case ADDR_FMT_16_16_16: + case ADDR_FMT_16_16_16_FLOAT: + elemMode = ADDR_EXPANDED; + bpp = 48;//@@ 16; // read 3 elements per pixel + expandX = 3; + break; + case ADDR_FMT_32_32_32_FLOAT: + case ADDR_FMT_32_32_32: + elemMode = ADDR_EXPANDED; + expandX = 3; + bpp = 96;//@@ 32; // read 3 elements per pixel + break; + case ADDR_FMT_BC1: + elemMode = ADDR_PACKED_BC1; + expandX = 4; + expandY = 4; + bpp = 64; + break; + case ADDR_FMT_BC4: + elemMode = ADDR_PACKED_BC4; + expandX = 4; + expandY = 4; + bpp = 64; + break; + case ADDR_FMT_BC2: + elemMode = ADDR_PACKED_BC2; + expandX = 4; + expandY = 4; + bpp = 128; + break; + case ADDR_FMT_BC3: + elemMode = ADDR_PACKED_BC3; + expandX = 4; + expandY = 4; + bpp = 128; + break; + case ADDR_FMT_BC5: + case ADDR_FMT_BC6: // reuse ADDR_PACKED_BC5 + case ADDR_FMT_BC7: // reuse ADDR_PACKED_BC5 + elemMode = ADDR_PACKED_BC5; + expandX = 4; + expandY = 4; + bpp = 128; + break; + default: + bpp = 0; + ADDR_ASSERT_ALWAYS(); + break; + // @@ or should this be an error? + } + + SafeAssign(pExpandX, expandX); + SafeAssign(pExpandY, expandY); + SafeAssign(pUnusedBits, bitUnused); + SafeAssign(reinterpret_cast(pElemMode), elemMode); + + return bpp; +} + +/** +*************************************************************************************************** +* AddrElemLib::GetCompBits +* +* @brief +* Set each component's bit size and bit start. And set element mode and number type +* +* @return +* N/A +*************************************************************************************************** +*/ +VOID AddrElemLib::GetCompBits( + UINT_32 c0, ///< [in] bits of component 0 + UINT_32 c1, ///< [in] bits of component 1 + UINT_32 c2, ///< [in] bits of component 2 + UINT_32 c3, ///< [in] bits of component 3 + ADDR_PIXEL_FORMATINFO* pInfo, ///< [out] per component info out + AddrElemMode elemMode) ///< [in] element mode +{ + pInfo->comps = 0; + + pInfo->compBit[0] = c0; + pInfo->compBit[1] = c1; + pInfo->compBit[2] = c2; + pInfo->compBit[3] = c3; + + pInfo->compStart[0] = 0; + pInfo->compStart[1] = c0; + pInfo->compStart[2] = c0+c1; + pInfo->compStart[3] = c0+c1+c2; + + pInfo->elemMode = elemMode; + // still needed since component swap may depend on number of components + for (INT i=0; i<4; i++) + { + if (pInfo->compBit[i] == 0) + { + pInfo->compStart[i] = 0; // all null components start at bit 0 + pInfo->numType[i] = ADDR_NO_NUMBER; // and have no number type + } + else + { + pInfo->comps++; + } + } +} + +/** +*************************************************************************************************** +* AddrElemLib::GetCompBits +* +* @brief +* Set the clear color (or clear depth/stencil) for a surface +* +* @note +* If clearColor is zero, a default clear value is used in place of comps[4]. +* If float32 is set, full precision is used, else the mantissa is reduced to 12-bits +* +* @return +* N/A +*************************************************************************************************** +*/ +VOID AddrElemLib::SetClearComps( + ADDR_FLT_32 comps[4], ///< [in/out] components + BOOL_32 clearColor, ///< [in] TRUE if clear color is set (CLEAR_COLOR) + BOOL_32 float32) ///< [in] TRUE if float32 component (BLEND_FLOAT32) +{ + INT_32 i; + + // Use default clearvalues if clearColor is disabled + if (clearColor == FALSE) + { + for (i=0; i<3; i++) + { + comps[i].f = 0.0; + } + comps[3].f = 1.0; + } + + // Otherwise use the (modified) clear value + else + { + for (i=0; i<4; i++) + { // If full precision, use clear value unchanged + if (float32) + { + // Do nothing + //comps[i] = comps[i]; + } + // Else if it is a NaN, use the standard NaN value + else if ((comps[i].u & 0x7FFFFFFF) > 0x7F800000) + { + comps[i].u = 0xFFC00000; + } + // Else reduce the mantissa precision + else + { + comps[i].u = comps[i].u & 0xFFFFF000; + } + } + } +} + +/** +*************************************************************************************************** +* AddrElemLib::IsBlockCompressed +* +* @brief +* TRUE if this is block compressed format +* +* @note +* +* @return +* BOOL_32 +*************************************************************************************************** +*/ +BOOL_32 AddrElemLib::IsBlockCompressed( + AddrFormat format) ///< [in] Format +{ + return format >= ADDR_FMT_BC1 && format <= ADDR_FMT_BC7; +} + + +/** +*************************************************************************************************** +* AddrElemLib::IsCompressed +* +* @brief +* TRUE if this is block compressed format or 1 bit format +* +* @note +* +* @return +* BOOL_32 +*************************************************************************************************** +*/ +BOOL_32 AddrElemLib::IsCompressed( + AddrFormat format) ///< [in] Format +{ + return IsBlockCompressed(format) || format == ADDR_FMT_BC1 || format == ADDR_FMT_BC7; +} + +/** +*************************************************************************************************** +* AddrElemLib::IsExpand3x +* +* @brief +* TRUE if this is 3x expand format +* +* @note +* +* @return +* BOOL_32 +*************************************************************************************************** +*/ +BOOL_32 AddrElemLib::IsExpand3x( + AddrFormat format) ///< [in] Format +{ + BOOL_32 is3x = FALSE; + + switch (format) + { + case ADDR_FMT_8_8_8: + case ADDR_FMT_16_16_16: + case ADDR_FMT_16_16_16_FLOAT: + case ADDR_FMT_32_32_32: + case ADDR_FMT_32_32_32_FLOAT: + is3x = TRUE; + break; + default: + break; + } + + return is3x; +} + + diff -Nru mesa-12.0.6/src/amd/addrlib/core/addrelemlib.h mesa-17.0.7/src/amd/addrlib/core/addrelemlib.h --- mesa-12.0.6/src/amd/addrlib/core/addrelemlib.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/addrlib/core/addrelemlib.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,270 @@ +/* + * Copyright © 2014 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +*************************************************************************************************** +* @file addrelemlib.h +* @brief Contains the class for element/pixel related functions +*************************************************************************************************** +*/ + +#ifndef __ELEM_LIB_H__ +#define __ELEM_LIB_H__ + +#include "addrinterface.h" +#include "addrobject.h" +#include "addrcommon.h" + +class AddrLib; + +// The masks for property bits within the Properties INT_32 +union ADDR_COMPONENT_FLAGS +{ + struct + { + UINT_32 byteAligned : 1; ///< all components are byte aligned + UINT_32 exportNorm : 1; ///< components support R6xx NORM compression + UINT_32 floatComp : 1; ///< there is at least one floating point component + }; + + UINT_32 value; +}; + +// Copy from legacy lib's AddrNumberType +enum AddrNumberType +{ + // The following number types have the range [-1..1] + ADDR_NO_NUMBER, // This component doesn't exist and has no default value + ADDR_EPSILON, // Force component value to integer 0x00000001 + ADDR_ZERO, // Force component value to integer 0x00000000 + ADDR_ONE, // Force component value to floating point 1.0 + // Above values don't have any bits per component (keep ADDR_ONE the last of these) + + ADDR_UNORM, // Unsigned normalized (repeating fraction) full precision + ADDR_SNORM, // Signed normalized (repeating fraction) full precision + ADDR_GAMMA, // Gamma-corrected, full precision + + ADDR_UNORM_R5XXRB, // Unsigned normalized (repeating fraction) for r5xx RB + ADDR_SNORM_R5XXRB, // Signed normalized (repeating fraction) for r5xx RB + ADDR_GAMMA_R5XXRB, // Gamma-corrected for r5xx RB (note: unnormalized value) + ADDR_UNORM_R5XXBC, // Unsigned normalized (repeating fraction) for r5xx BC + ADDR_SNORM_R5XXBC, // Signed normalized (repeating fraction) for r5xx BC + ADDR_GAMMA_R5XXBC, // Gamma-corrected for r5xx BC (note: unnormalized value) + + ADDR_UNORM_R6XX, // Unsigned normalized (repeating fraction) for R6xx + ADDR_UNORM_R6XXDB, // Unorms for 24-bit depth: one value differs from ADDR_UNORM_R6XX + ADDR_SNORM_R6XX, // Signed normalized (repeating fraction) for R6xx + ADDR_GAMMA8_R6XX, // Gamma-corrected for r6xx + ADDR_GAMMA8_R7XX_TP, // Gamma-corrected for r7xx TP 12bit unorm 8.4. + + ADDR_U4FLOATC, // Unsigned float: 4-bit exponent, bias=15, no NaN, clamp [0..1] + ADDR_GAMMA_4SEG, // Gamma-corrected, four segment approximation + ADDR_U0FIXED, // Unsigned 0.N-bit fixed point + + // The following number types have large ranges (LEAVE ADDR_USCALED first or fix Finish routine) + ADDR_USCALED, // Unsigned integer converted to/from floating point + ADDR_SSCALED, // Signed integer converted to/from floating point + ADDR_USCALED_R5XXRB, // Unsigned integer to/from floating point for r5xx RB + ADDR_SSCALED_R5XXRB, // Signed integer to/from floating point for r5xx RB + ADDR_UINT_BITS, // Keep in unsigned integer form, clamped to specified range + ADDR_SINT_BITS, // Keep in signed integer form, clamped to specified range + ADDR_UINTBITS, // @@ remove Keep in unsigned integer form, use modulus to reduce bits + ADDR_SINTBITS, // @@ remove Keep in signed integer form, use modulus to reduce bits + + // The following number types and ADDR_U4FLOATC have exponents + // (LEAVE ADDR_S8FLOAT first or fix Finish routine) + ADDR_S8FLOAT, // Signed floating point with 8-bit exponent, bias=127 + ADDR_S8FLOAT32, // 32-bit IEEE float, passes through NaN values + ADDR_S5FLOAT, // Signed floating point with 5-bit exponent, bias=15 + ADDR_S5FLOATM, // Signed floating point with 5-bit exponent, bias=15, no NaN/Inf + ADDR_U5FLOAT, // Signed floating point with 5-bit exponent, bias=15 + ADDR_U3FLOATM, // Unsigned floating point with 3-bit exponent, bias=3 + + ADDR_S5FIXED, // Signed 5.N-bit fixed point, with rounding + + ADDR_END_NUMBER // Used for range comparisons +}; + +// Copy from legacy lib's AddrElement +enum AddrElemMode +{ + // These formats allow both packing an unpacking + ADDR_ROUND_BY_HALF, // add 1/2 and truncate when packing this element + ADDR_ROUND_TRUNCATE, // truncate toward 0 for sign/mag, else toward neg + ADDR_ROUND_DITHER, // Pack by dithering -- requires (x,y) position + + // These formats only allow unpacking, no packing + ADDR_UNCOMPRESSED, // Elements are not compressed: one data element per pixel/texel + ADDR_EXPANDED, // Elements are split up and stored in multiple data elements + ADDR_PACKED_STD, // Elements are compressed into ExpandX by ExpandY data elements + ADDR_PACKED_REV, // Like ADDR_PACKED, but X order of pixels is reverved + ADDR_PACKED_GBGR, // Elements are compressed 4:2:2 in G1B_G0R order (high to low) + ADDR_PACKED_BGRG, // Elements are compressed 4:2:2 in BG1_RG0 order (high to low) + ADDR_PACKED_BC1, // Each data element is uncompressed to a 4x4 pixel/texel array + ADDR_PACKED_BC2, // Each data element is uncompressed to a 4x4 pixel/texel array + ADDR_PACKED_BC3, // Each data element is uncompressed to a 4x4 pixel/texel array + ADDR_PACKED_BC4, // Each data element is uncompressed to a 4x4 pixel/texel array + ADDR_PACKED_BC5, // Each data element is uncompressed to a 4x4 pixel/texel array + + // These formats provide various kinds of compression + ADDR_ZPLANE_R5XX, // Compressed Zplane using r5xx architecture format + ADDR_ZPLANE_R6XX, // Compressed Zplane using r6xx architecture format + //@@ Fill in the compression modes + + ADDR_END_ELEMENT // Used for range comparisons +}; + +enum AddrDepthPlanarType +{ + ADDR_DEPTH_PLANAR_NONE = 0, // No plane z/stencl + ADDR_DEPTH_PLANAR_R600 = 1, // R600 z and stencil planes are store within a tile + ADDR_DEPTH_PLANAR_R800 = 2, // R800 has separate z and stencil planes +}; + +/** +*************************************************************************************************** +* ADDR_PIXEL_FORMATINFO +* +* @brief +* Per component info +* +*************************************************************************************************** +*/ +struct ADDR_PIXEL_FORMATINFO +{ + UINT_32 compBit[4]; + AddrNumberType numType[4]; + UINT_32 compStart[4]; + AddrElemMode elemMode; + UINT_32 comps; ///< Number of components +}; + +/** +*************************************************************************************************** +* @brief This class contains asic indepentent element related attributes and operations +*************************************************************************************************** +*/ +class AddrElemLib : public AddrObject +{ +protected: + AddrElemLib(AddrLib* const pAddrLib); + +public: + + /// Makes this class virtual + virtual ~AddrElemLib(); + + static AddrElemLib *Create( + const AddrLib* const pAddrLib); + + /// The implementation is only for R6xx/R7xx, so make it virtual in case we need for R8xx + BOOL_32 PixGetExportNorm( + AddrColorFormat colorFmt, + AddrSurfaceNumber numberFmt, AddrSurfaceSwap swap) const; + + /// Below method are asic independent, so make them just static. + /// Remove static if we need different operation in hwl. + + VOID Flt32ToDepthPixel( + AddrDepthFormat format, const ADDR_FLT_32 comps[2], UINT_8 *pPixel) const; + + VOID Flt32ToColorPixel( + AddrColorFormat format, AddrSurfaceNumber surfNum, AddrSurfaceSwap surfSwap, + const ADDR_FLT_32 comps[4], UINT_8 *pPixel) const; + + static VOID Flt32sToInt32s( + ADDR_FLT_32 value, UINT_32 bits, AddrNumberType numberType, UINT_32* pResult); + + static VOID Int32sToPixel( + UINT_32 numComps, UINT_32* pComps, UINT_32* pCompBits, UINT_32* pCompStart, + ADDR_COMPONENT_FLAGS properties, UINT_32 resultBits, UINT_8* pPixel); + + VOID PixGetColorCompInfo( + AddrColorFormat format, AddrSurfaceNumber number, AddrSurfaceSwap swap, + ADDR_PIXEL_FORMATINFO* pInfo) const; + + VOID PixGetDepthCompInfo( + AddrDepthFormat format, ADDR_PIXEL_FORMATINFO* pInfo) const; + + UINT_32 GetBitsPerPixel( + AddrFormat format, AddrElemMode* pElemMode, + UINT_32* pExpandX = NULL, UINT_32* pExpandY = NULL, UINT_32* pBitsUnused = NULL); + + static VOID SetClearComps( + ADDR_FLT_32 comps[4], BOOL_32 clearColor, BOOL_32 float32); + + VOID AdjustSurfaceInfo( + AddrElemMode elemMode, UINT_32 expandX, UINT_32 expandY, + UINT_32* pBpp, UINT_32* pBasePitch, UINT_32* pWidth, UINT_32* pHeight); + + VOID RestoreSurfaceInfo( + AddrElemMode elemMode, UINT_32 expandX, UINT_32 expandY, + UINT_32* pBpp, UINT_32* pWidth, UINT_32* pHeight); + + /// Checks if depth and stencil are planar inside a tile + BOOL_32 IsDepthStencilTilePlanar() + { + return (m_depthPlanarType == ADDR_DEPTH_PLANAR_R600) ? TRUE : FALSE; + } + + /// Sets m_configFlags, copied from AddrLib + VOID SetConfigFlags(ADDR_CONFIG_FLAGS flags) + { + m_configFlags = flags; + } + + static BOOL_32 IsCompressed(AddrFormat format); + static BOOL_32 IsBlockCompressed(AddrFormat format); + static BOOL_32 IsExpand3x(AddrFormat format); + +protected: + + static VOID GetCompBits( + UINT_32 c0, UINT_32 c1, UINT_32 c2, UINT_32 c3, + ADDR_PIXEL_FORMATINFO* pInfo, + AddrElemMode elemMode = ADDR_ROUND_BY_HALF); + + static VOID GetCompType( + AddrColorFormat format, AddrSurfaceNumber numType, + ADDR_PIXEL_FORMATINFO* pInfo); + + static VOID GetCompSwap( + AddrSurfaceSwap swap, ADDR_PIXEL_FORMATINFO* pInfo); + + static VOID SwapComps( + UINT_32 c0, UINT_32 c1, ADDR_PIXEL_FORMATINFO* pInfo); + +private: + + UINT_32 m_fp16ExportNorm; ///< If allow FP16 to be reported as EXPORT_NORM + AddrDepthPlanarType m_depthPlanarType; + + ADDR_CONFIG_FLAGS m_configFlags; ///< Copy of AddrLib's configFlags + AddrLib* const m_pAddrLib; ///< Pointer to parent addrlib instance +}; + +#endif + diff -Nru mesa-12.0.6/src/amd/addrlib/core/addrlib.cpp mesa-17.0.7/src/amd/addrlib/core/addrlib.cpp --- mesa-12.0.6/src/amd/addrlib/core/addrlib.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/addrlib/core/addrlib.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,4023 @@ +/* + * Copyright © 2014 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +*************************************************************************************************** +* @file addrlib.cpp +* @brief Contains the implementation for the AddrLib base class.. +*************************************************************************************************** +*/ + +#include "addrinterface.h" +#include "addrlib.h" +#include "addrcommon.h" + +#if defined(__APPLE__) + +UINT_32 div64_32(UINT_64 n, UINT_32 base) +{ + UINT_64 rem = n; + UINT_64 b = base; + UINT_64 res, d = 1; + UINT_32 high = rem >> 32; + + res = 0; + if (high >= base) + { + high /= base; + res = (UINT_64) high << 32; + rem -= (UINT_64) (high*base) << 32; + } + + while ((INT_64)b > 0 && b < rem) + { + b = b+b; + d = d+d; + } + + do + { + if (rem >= b) + { + rem -= b; + res += d; + } + b >>= 1; + d >>= 1; + } while (d); + + n = res; + return rem; +} + +extern "C" +UINT_32 __umoddi3(UINT_64 n, UINT_32 base) +{ + return div64_32(n, base); +} + +#endif // __APPLE__ + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// Static Const Member +/////////////////////////////////////////////////////////////////////////////////////////////////// + +const AddrTileModeFlags AddrLib::m_modeFlags[ADDR_TM_COUNT] = +{// T L 1 2 3 P Pr B + {1, 1, 0, 0, 0, 0, 0, 0}, // ADDR_TM_LINEAR_GENERAL + {1, 1, 0, 0, 0, 0, 0, 0}, // ADDR_TM_LINEAR_ALIGNED + {1, 0, 1, 0, 0, 0, 0, 0}, // ADDR_TM_1D_TILED_THIN1 + {4, 0, 1, 0, 0, 0, 0, 0}, // ADDR_TM_1D_TILED_THICK + {1, 0, 0, 1, 0, 0, 0, 0}, // ADDR_TM_2D_TILED_THIN1 + {1, 0, 0, 1, 0, 0, 0, 0}, // ADDR_TM_2D_TILED_THIN2 + {1, 0, 0, 1, 0, 0, 0, 0}, // ADDR_TM_2D_TILED_THIN4 + {4, 0, 0, 1, 0, 0, 0, 0}, // ADDR_TM_2D_TILED_THICK + {1, 0, 0, 1, 0, 0, 0, 1}, // ADDR_TM_2B_TILED_THIN1 + {1, 0, 0, 1, 0, 0, 0, 1}, // ADDR_TM_2B_TILED_THIN2 + {1, 0, 0, 1, 0, 0, 0, 1}, // ADDR_TM_2B_TILED_THIN4 + {4, 0, 0, 1, 0, 0, 0, 1}, // ADDR_TM_2B_TILED_THICK + {1, 0, 0, 1, 1, 0, 0, 0}, // ADDR_TM_3D_TILED_THIN1 + {4, 0, 0, 1, 1, 0, 0, 0}, // ADDR_TM_3D_TILED_THICK + {1, 0, 0, 1, 1, 0, 0, 1}, // ADDR_TM_3B_TILED_THIN1 + {4, 0, 0, 1, 1, 0, 0, 1}, // ADDR_TM_3B_TILED_THICK + {8, 0, 0, 1, 0, 0, 0, 0}, // ADDR_TM_2D_TILED_XTHICK + {8, 0, 0, 1, 1, 0, 0, 0}, // ADDR_TM_3D_TILED_XTHICK + {1, 0, 0, 0, 0, 0, 0, 0}, // ADDR_TM_POWER_SAVE + {1, 0, 0, 1, 0, 1, 1, 0}, // ADDR_TM_PRT_TILED_THIN1 + {1, 0, 0, 1, 0, 1, 0, 0}, // ADDR_TM_PRT_2D_TILED_THIN1 + {1, 0, 0, 1, 1, 1, 0, 0}, // ADDR_TM_PRT_3D_TILED_THIN1 + {4, 0, 0, 1, 0, 1, 1, 0}, // ADDR_TM_PRT_TILED_THICK + {4, 0, 0, 1, 0, 1, 0, 0}, // ADDR_TM_PRT_2D_TILED_THICK + {4, 0, 0, 1, 1, 1, 0, 0}, // ADDR_TM_PRT_3D_TILED_THICK +}; + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// Constructor/Destructor +/////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +*************************************************************************************************** +* AddrLib::AddrLib +* +* @brief +* Constructor for the AddrLib class +* +*************************************************************************************************** +*/ +AddrLib::AddrLib() : + m_class(BASE_ADDRLIB), + m_chipFamily(ADDR_CHIP_FAMILY_IVLD), + m_chipRevision(0), + m_version(ADDRLIB_VERSION), + m_pipes(0), + m_banks(0), + m_pipeInterleaveBytes(0), + m_rowSize(0), + m_minPitchAlignPixels(1), + m_maxSamples(8), + m_pElemLib(NULL) +{ + m_configFlags.value = 0; +} + +/** +*************************************************************************************************** +* AddrLib::AddrLib +* +* @brief +* Constructor for the AddrLib class with hClient as parameter +* +*************************************************************************************************** +*/ +AddrLib::AddrLib(const AddrClient* pClient) : + AddrObject(pClient), + m_class(BASE_ADDRLIB), + m_chipFamily(ADDR_CHIP_FAMILY_IVLD), + m_chipRevision(0), + m_version(ADDRLIB_VERSION), + m_pipes(0), + m_banks(0), + m_pipeInterleaveBytes(0), + m_rowSize(0), + m_minPitchAlignPixels(1), + m_maxSamples(8), + m_pElemLib(NULL) +{ + m_configFlags.value = 0; +} + +/** +*************************************************************************************************** +* AddrLib::~AddrLib +* +* @brief +* Destructor for the AddrLib class +* +*************************************************************************************************** +*/ +AddrLib::~AddrLib() +{ + if (m_pElemLib) + { + delete m_pElemLib; + } +} + + + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// Initialization/Helper +/////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +*************************************************************************************************** +* AddrLib::Create +* +* @brief +* Creates and initializes AddrLib object. +* +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::Create( + const ADDR_CREATE_INPUT* pCreateIn, ///< [in] pointer to ADDR_CREATE_INPUT + ADDR_CREATE_OUTPUT* pCreateOut) ///< [out] pointer to ADDR_CREATE_OUTPUT +{ + AddrLib* pLib = NULL; + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pCreateIn->createFlags.fillSizeFields == TRUE) + { + if ((pCreateIn->size != sizeof(ADDR_CREATE_INPUT)) || + (pCreateOut->size != sizeof(ADDR_CREATE_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if ((returnCode == ADDR_OK) && + (pCreateIn->callbacks.allocSysMem != NULL) && + (pCreateIn->callbacks.freeSysMem != NULL)) + { + AddrClient client = { + pCreateIn->hClient, + pCreateIn->callbacks + }; + + switch (pCreateIn->chipEngine) + { + case CIASICIDGFXENGINE_SOUTHERNISLAND: + switch (pCreateIn->chipFamily) + { + case FAMILY_SI: + pLib = AddrSIHwlInit(&client); + break; + case FAMILY_VI: + case FAMILY_CZ: // VI based fusion(carrizo) + case FAMILY_CI: + case FAMILY_KV: // CI based fusion + pLib = AddrCIHwlInit(&client); + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + } + + if ((pLib != NULL)) + { + BOOL_32 initValid; + + // Pass createFlags to configFlags first since these flags may be overwritten + pLib->m_configFlags.noCubeMipSlicesPad = pCreateIn->createFlags.noCubeMipSlicesPad; + pLib->m_configFlags.fillSizeFields = pCreateIn->createFlags.fillSizeFields; + pLib->m_configFlags.useTileIndex = pCreateIn->createFlags.useTileIndex; + pLib->m_configFlags.useCombinedSwizzle = pCreateIn->createFlags.useCombinedSwizzle; + pLib->m_configFlags.checkLast2DLevel = pCreateIn->createFlags.checkLast2DLevel; + pLib->m_configFlags.useHtileSliceAlign = pCreateIn->createFlags.useHtileSliceAlign; + pLib->m_configFlags.degradeBaseLevel = pCreateIn->createFlags.degradeBaseLevel; + pLib->m_configFlags.allowLargeThickTile = pCreateIn->createFlags.allowLargeThickTile; + + pLib->SetAddrChipFamily(pCreateIn->chipFamily, pCreateIn->chipRevision); + + pLib->SetMinPitchAlignPixels(pCreateIn->minPitchAlignPixels); + + // Global parameters initialized and remaining configFlags bits are set as well + initValid = pLib->HwlInitGlobalParams(pCreateIn); + + if (initValid) + { + pLib->m_pElemLib = AddrElemLib::Create(pLib); + } + else + { + pLib->m_pElemLib = NULL; // Don't go on allocating element lib + returnCode = ADDR_INVALIDGBREGVALUES; + } + + if (pLib->m_pElemLib == NULL) + { + delete pLib; + pLib = NULL; + ADDR_ASSERT_ALWAYS(); + } + else + { + pLib->m_pElemLib->SetConfigFlags(pLib->m_configFlags); + } + } + + pCreateOut->hLib = pLib; + + if ((pLib == NULL) && + (returnCode == ADDR_OK)) + { + // Unknown failures, we return the general error code + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrLib::SetAddrChipFamily +* +* @brief +* Convert familyID defined in atiid.h to AddrChipFamily and set m_chipFamily/m_chipRevision +* @return +* N/A +*************************************************************************************************** +*/ +VOID AddrLib::SetAddrChipFamily( + UINT_32 uChipFamily, ///< [in] chip family defined in atiih.h + UINT_32 uChipRevision) ///< [in] chip revision defined in "asic_family"_id.h +{ + AddrChipFamily family = ADDR_CHIP_FAMILY_IVLD; + + family = HwlConvertChipFamily(uChipFamily, uChipRevision); + + ADDR_ASSERT(family != ADDR_CHIP_FAMILY_IVLD); + + m_chipFamily = family; + m_chipRevision = uChipRevision; +} + +/** +*************************************************************************************************** +* AddrLib::SetMinPitchAlignPixels +* +* @brief +* Set m_minPitchAlignPixels with input param +* +* @return +* N/A +*************************************************************************************************** +*/ +VOID AddrLib::SetMinPitchAlignPixels( + UINT_32 minPitchAlignPixels) ///< [in] minmum pitch alignment in pixels +{ + m_minPitchAlignPixels = (minPitchAlignPixels == 0)? 1 : minPitchAlignPixels; +} + +/** +*************************************************************************************************** +* AddrLib::GetAddrLib +* +* @brief +* Get AddrLib pointer +* +* @return +* An AddrLib class pointer +*************************************************************************************************** +*/ +AddrLib * AddrLib::GetAddrLib( + ADDR_HANDLE hLib) ///< [in] handle of ADDR_HANDLE +{ + return static_cast(hLib); +} + + + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// Surface Methods +/////////////////////////////////////////////////////////////////////////////////////////////////// + + +/** +*************************************************************************************************** +* AddrLib::ComputeSurfaceInfo +* +* @brief +* Interface function stub of AddrComputeSurfaceInfo. +* +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::ComputeSurfaceInfo( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_SURFACE_INFO_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_SURFACE_INFO_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + // We suggest client do sanity check but a check here is also good + if (pIn->bpp > 128) + { + returnCode = ADDR_INVALIDPARAMS; + } + + // Thick modes don't support multisample + if (ComputeSurfaceThickness(pIn->tileMode) > 1 && pIn->numSamples > 1) + { + returnCode = ADDR_INVALIDPARAMS; + } + + if (returnCode == ADDR_OK) + { + // Get a local copy of input structure and only reference pIn for unadjusted values + ADDR_COMPUTE_SURFACE_INFO_INPUT localIn = *pIn; + ADDR_TILEINFO tileInfoNull = {0}; + + if (UseTileInfo()) + { + // If the original input has a valid ADDR_TILEINFO pointer then copy its contents. + // Otherwise the default 0's in tileInfoNull are used. + if (pIn->pTileInfo) + { + tileInfoNull = *pIn->pTileInfo; + } + localIn.pTileInfo = &tileInfoNull; + } + + localIn.numSamples = pIn->numSamples == 0 ? 1 : pIn->numSamples; + + // Do mipmap check first + // If format is BCn, pre-pad dimension to power-of-two according to HWL + ComputeMipLevel(&localIn); + + if (m_configFlags.checkLast2DLevel) + { + // Save this level's original height in pixels + pOut->height = pIn->height; + } + + UINT_32 expandX = 1; + UINT_32 expandY = 1; + AddrElemMode elemMode; + + // Save outputs that may not go through HWL + pOut->pixelBits = localIn.bpp; + pOut->numSamples = localIn.numSamples; + pOut->last2DLevel = FALSE; + +#if !ALT_TEST + if (localIn.numSamples > 1) + { + ADDR_ASSERT(localIn.mipLevel == 0); + } +#endif + + if (localIn.format != ADDR_FMT_INVALID) // Set format to INVALID will skip this conversion + { + // Get compression/expansion factors and element mode + // (which indicates compression/expansion + localIn.bpp = GetElemLib()->GetBitsPerPixel(localIn.format, + &elemMode, + &expandX, + &expandY); + + // Special flag for 96 bit surface. 96 (or 48 if we support) bit surface's width is + // pre-multiplied by 3 and bpp is divided by 3. So pitch alignment for linear- + // aligned does not meet 64-pixel in real. We keep special handling in hwl since hw + // restrictions are different. + // Also Mip 1+ needs an element pitch of 32 bits so we do not need this workaround + // but we use this flag to skip RestoreSurfaceInfo below + + if ((elemMode == ADDR_EXPANDED) && + (expandX > 1)) + { + ADDR_ASSERT(localIn.tileMode == ADDR_TM_LINEAR_ALIGNED || localIn.height == 1); + } + + GetElemLib()->AdjustSurfaceInfo(elemMode, + expandX, + expandY, + &localIn.bpp, + &localIn.basePitch, + &localIn.width, + &localIn.height); + + // Overwrite these parameters if we have a valid format + } + else if (localIn.bpp != 0) + { + localIn.width = (localIn.width != 0) ? localIn.width : 1; + localIn.height = (localIn.height != 0) ? localIn.height : 1; + } + else // Rule out some invalid parameters + { + ADDR_ASSERT_ALWAYS(); + + returnCode = ADDR_INVALIDPARAMS; + } + + // Check mipmap after surface expansion + if (returnCode == ADDR_OK) + { + returnCode = PostComputeMipLevel(&localIn, pOut); + } + + if (returnCode == ADDR_OK) + { + if (UseTileIndex(localIn.tileIndex)) + { + // Make sure pTileInfo is not NULL + ADDR_ASSERT(localIn.pTileInfo); + + UINT_32 numSamples = GetNumFragments(localIn.numSamples, localIn.numFrags); + + INT_32 macroModeIndex = TileIndexNoMacroIndex; + + if (localIn.tileIndex != TileIndexLinearGeneral) + { + // Try finding a macroModeIndex + macroModeIndex = HwlComputeMacroModeIndex(localIn.tileIndex, + localIn.flags, + localIn.bpp, + numSamples, + localIn.pTileInfo, + &localIn.tileMode, + &localIn.tileType); + } + + // If macroModeIndex is not needed, then call HwlSetupTileCfg to get tile info + if (macroModeIndex == TileIndexNoMacroIndex) + { + returnCode = HwlSetupTileCfg(localIn.tileIndex, macroModeIndex, + localIn.pTileInfo, + &localIn.tileMode, &localIn.tileType); + } + // If macroModeIndex is invalid, then assert this is not macro tiled + else if (macroModeIndex == TileIndexInvalid) + { + ADDR_ASSERT(!IsMacroTiled(localIn.tileMode)); + } + } + } + + if (returnCode == ADDR_OK) + { + AddrTileMode tileMode = localIn.tileMode; + AddrTileType tileType = localIn.tileType; + + // HWL layer may override tile mode if necessary + if (HwlOverrideTileMode(&localIn, &tileMode, &tileType)) + { + localIn.tileMode = tileMode; + localIn.tileType = tileType; + } + // Degrade base level if applicable + if (DegradeBaseLevel(&localIn, &tileMode)) + { + localIn.tileMode = tileMode; + } + } + + // Call main function to compute surface info + if (returnCode == ADDR_OK) + { + returnCode = HwlComputeSurfaceInfo(&localIn, pOut); + } + + if (returnCode == ADDR_OK) + { + // Since bpp might be changed we just pass it through + pOut->bpp = localIn.bpp; + + // Also original width/height/bpp + pOut->pixelPitch = pOut->pitch; + pOut->pixelHeight = pOut->height; + +#if DEBUG + if (localIn.flags.display) + { + ADDR_ASSERT((pOut->pitchAlign % 32) == 0); + } +#endif //DEBUG + + if (localIn.format != ADDR_FMT_INVALID) + { + // + // 96 bits surface of level 1+ requires element pitch of 32 bits instead + // In hwl function we skip multiplication of 3 then we should skip division of 3 + // We keep pitch that represents 32 bit element instead of 96 bits since we + // will get an odd number if divided by 3. + // + if (!((expandX == 3) && (localIn.mipLevel > 0))) + { + + GetElemLib()->RestoreSurfaceInfo(elemMode, + expandX, + expandY, + &localIn.bpp, + &pOut->pixelPitch, + &pOut->pixelHeight); + } + } + + if (localIn.flags.qbStereo) + { + if (pOut->pStereoInfo) + { + ComputeQbStereoInfo(pOut); + } + } + + if (localIn.flags.volume) // For volume sliceSize equals to all z-slices + { + pOut->sliceSize = pOut->surfSize; + } + else // For array: sliceSize is likely to have slice-padding (the last one) + { + pOut->sliceSize = pOut->surfSize / pOut->depth; + + // array or cubemap + if (pIn->numSlices > 1) + { + // If this is the last slice then add the padding size to this slice + if (pIn->slice == (pIn->numSlices - 1)) + { + pOut->sliceSize += pOut->sliceSize * (pOut->depth - pIn->numSlices); + } + else if (m_configFlags.checkLast2DLevel) + { + // Reset last2DLevel flag if this is not the last array slice + pOut->last2DLevel = FALSE; + } + } + } + + pOut->pitchTileMax = pOut->pitch / 8 - 1; + pOut->heightTileMax = pOut->height / 8 - 1; + pOut->sliceTileMax = pOut->pitch * pOut->height / 64 - 1; + } + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrLib::ComputeSurfaceInfo +* +* @brief +* Interface function stub of AddrComputeSurfaceInfo. +* +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::ComputeSurfaceAddrFromCoord( + const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + // Use temp tile info for calcalation + input.pTileInfo = &tileInfoNull; + + const ADDR_SURFACE_FLAGS flags = {{0}}; + UINT_32 numSamples = GetNumFragments(pIn->numSamples, pIn->numFrags); + + // Try finding a macroModeIndex + INT_32 macroModeIndex = HwlComputeMacroModeIndex(input.tileIndex, + flags, + input.bpp, + numSamples, + input.pTileInfo, + &input.tileMode, + &input.tileType); + + // If macroModeIndex is not needed, then call HwlSetupTileCfg to get tile info + if (macroModeIndex == TileIndexNoMacroIndex) + { + returnCode = HwlSetupTileCfg(input.tileIndex, macroModeIndex, + input.pTileInfo, &input.tileMode, &input.tileType); + } + // If macroModeIndex is invalid, then assert this is not macro tiled + else if (macroModeIndex == TileIndexInvalid) + { + ADDR_ASSERT(!IsMacroTiled(input.tileMode)); + } + + // Change the input structure + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + returnCode = HwlComputeSurfaceAddrFromCoord(pIn, pOut); + + if (returnCode == ADDR_OK) + { + pOut->prtBlockIndex = static_cast(pOut->addr / (64 * 1024)); + } + } + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrLib::ComputeSurfaceCoordFromAddr +* +* @brief +* Interface function stub of ComputeSurfaceCoordFromAddr. +* +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::ComputeSurfaceCoordFromAddr( + const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + // Use temp tile info for calcalation + input.pTileInfo = &tileInfoNull; + + const ADDR_SURFACE_FLAGS flags = {{0}}; + UINT_32 numSamples = GetNumFragments(pIn->numSamples, pIn->numFrags); + + // Try finding a macroModeIndex + INT_32 macroModeIndex = HwlComputeMacroModeIndex(input.tileIndex, + flags, + input.bpp, + numSamples, + input.pTileInfo, + &input.tileMode, + &input.tileType); + + // If macroModeIndex is not needed, then call HwlSetupTileCfg to get tile info + if (macroModeIndex == TileIndexNoMacroIndex) + { + returnCode = HwlSetupTileCfg(input.tileIndex, macroModeIndex, + input.pTileInfo, &input.tileMode, &input.tileType); + } + // If macroModeIndex is invalid, then assert this is not macro tiled + else if (macroModeIndex == TileIndexInvalid) + { + ADDR_ASSERT(!IsMacroTiled(input.tileMode)); + } + + // Change the input structure + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + returnCode = HwlComputeSurfaceCoordFromAddr(pIn, pOut); + } + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrLib::ComputeSliceTileSwizzle +* +* @brief +* Interface function stub of ComputeSliceTileSwizzle. +* +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::ComputeSliceTileSwizzle( + const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_SLICESWIZZLE_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_SLICESWIZZLE_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_COMPUTE_SLICESWIZZLE_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + // Use temp tile info for calcalation + input.pTileInfo = &tileInfoNull; + + returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, + input.pTileInfo, &input.tileMode); + // Change the input structure + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + returnCode = HwlComputeSliceTileSwizzle(pIn, pOut); + } + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrLib::ExtractBankPipeSwizzle +* +* @brief +* Interface function stub of AddrExtractBankPipeSwizzle. +* +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::ExtractBankPipeSwizzle( + const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, ///< [in] input structure + ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT)) || + (pOut->size != sizeof(ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + // Use temp tile info for calcalation + input.pTileInfo = &tileInfoNull; + + returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo); + // Change the input structure + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + returnCode = HwlExtractBankPipeSwizzle(pIn, pOut); + } + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrLib::CombineBankPipeSwizzle +* +* @brief +* Interface function stub of AddrCombineBankPipeSwizzle. +* +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::CombineBankPipeSwizzle( + const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT* pIn, ///< [in] input structure + ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_FMASK_INFO_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_FMASK_INFO_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + // Use temp tile info for calcalation + input.pTileInfo = &tileInfoNull; + + returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo); + // Change the input structure + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + returnCode = HwlCombineBankPipeSwizzle(pIn->bankSwizzle, + pIn->pipeSwizzle, + pIn->pTileInfo, + pIn->baseAddr, + &pOut->tileSwizzle); + } + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrLib::ComputeBaseSwizzle +* +* @brief +* Interface function stub of AddrCompueBaseSwizzle. +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::ComputeBaseSwizzle( + const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, + ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_BASE_SWIZZLE_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_COMPUTE_BASE_SWIZZLE_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + // Use temp tile info for calcalation + input.pTileInfo = &tileInfoNull; + + returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo); + // Change the input structure + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + if (IsMacroTiled(pIn->tileMode)) + { + returnCode = HwlComputeBaseSwizzle(pIn, pOut); + } + else + { + pOut->tileSwizzle = 0; + } + } + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrLib::ComputeFmaskInfo +* +* @brief +* Interface function stub of ComputeFmaskInfo. +* +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::ComputeFmaskInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut ///< [out] output structure + ) +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_FMASK_INFO_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_FMASK_INFO_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + // No thick MSAA + if (ComputeSurfaceThickness(pIn->tileMode) > 1) + { + returnCode = ADDR_INVALIDPARAMS; + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_COMPUTE_FMASK_INFO_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + + if (pOut->pTileInfo) + { + // Use temp tile info for calcalation + input.pTileInfo = pOut->pTileInfo; + } + else + { + input.pTileInfo = &tileInfoNull; + } + + ADDR_SURFACE_FLAGS flags = {{0}}; + flags.fmask = 1; + + // Try finding a macroModeIndex + INT_32 macroModeIndex = HwlComputeMacroModeIndex(pIn->tileIndex, + flags, + HwlComputeFmaskBits(pIn, NULL), + pIn->numSamples, + input.pTileInfo, + &input.tileMode); + + // If macroModeIndex is not needed, then call HwlSetupTileCfg to get tile info + if (macroModeIndex == TileIndexNoMacroIndex) + { + returnCode = HwlSetupTileCfg(input.tileIndex, macroModeIndex, + input.pTileInfo, &input.tileMode); + } + + ADDR_ASSERT(macroModeIndex != TileIndexInvalid); + + // Change the input structure + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + if (pIn->numSamples > 1) + { + returnCode = HwlComputeFmaskInfo(pIn, pOut); + } + else + { + memset(pOut, 0, sizeof(ADDR_COMPUTE_FMASK_INFO_OUTPUT)); + + returnCode = ADDR_INVALIDPARAMS; + } + } + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrLib::ComputeFmaskAddrFromCoord +* +* @brief +* Interface function stub of ComputeFmaskAddrFromCoord. +* +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::ComputeFmaskAddrFromCoord( + const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_ASSERT(pIn->numSamples > 1); + + if (pIn->numSamples > 1) + { + returnCode = HwlComputeFmaskAddrFromCoord(pIn, pOut); + } + else + { + returnCode = ADDR_INVALIDPARAMS; + } + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrLib::ComputeFmaskCoordFromAddr +* +* @brief +* Interface function stub of ComputeFmaskAddrFromCoord. +* +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::ComputeFmaskCoordFromAddr( + const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_ASSERT(pIn->numSamples > 1); + + if (pIn->numSamples > 1) + { + returnCode = HwlComputeFmaskCoordFromAddr(pIn, pOut); + } + else + { + returnCode = ADDR_INVALIDPARAMS; + } + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrLib::ConvertTileInfoToHW +* +* @brief +* Convert tile info from real value to HW register value in HW layer +* +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::ConvertTileInfoToHW( + const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, ///< [in] input structure + ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_CONVERT_TILEINFOTOHW_INPUT)) || + (pOut->size != sizeof(ADDR_CONVERT_TILEINFOTOHW_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_CONVERT_TILEINFOTOHW_INPUT input; + // if pIn->reverse is TRUE, indices are ignored + if (pIn->reverse == FALSE && UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + input.pTileInfo = &tileInfoNull; + + returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo); + + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + returnCode = HwlConvertTileInfoToHW(pIn, pOut); + } + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrLib::ConvertTileIndex +* +* @brief +* Convert tile index to tile mode/type/info +* +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::ConvertTileIndex( + const ADDR_CONVERT_TILEINDEX_INPUT* pIn, ///< [in] input structure + ADDR_CONVERT_TILEINDEX_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_CONVERT_TILEINDEX_INPUT)) || + (pOut->size != sizeof(ADDR_CONVERT_TILEINDEX_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + + returnCode = HwlSetupTileCfg(pIn->tileIndex, pIn->macroModeIndex, + pOut->pTileInfo, &pOut->tileMode, &pOut->tileType); + + if (returnCode == ADDR_OK && pIn->tileInfoHw) + { + ADDR_CONVERT_TILEINFOTOHW_INPUT hwInput = {0}; + ADDR_CONVERT_TILEINFOTOHW_OUTPUT hwOutput = {0}; + + hwInput.pTileInfo = pOut->pTileInfo; + hwInput.tileIndex = -1; + hwOutput.pTileInfo = pOut->pTileInfo; + + returnCode = HwlConvertTileInfoToHW(&hwInput, &hwOutput); + } + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrLib::ConvertTileIndex1 +* +* @brief +* Convert tile index to tile mode/type/info +* +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::ConvertTileIndex1( + const ADDR_CONVERT_TILEINDEX1_INPUT* pIn, ///< [in] input structure + ADDR_CONVERT_TILEINDEX_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_CONVERT_TILEINDEX1_INPUT)) || + (pOut->size != sizeof(ADDR_CONVERT_TILEINDEX_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_SURFACE_FLAGS flags = {{0}}; + + HwlComputeMacroModeIndex(pIn->tileIndex, flags, pIn->bpp, pIn->numSamples, + pOut->pTileInfo, &pOut->tileMode, &pOut->tileType); + + if (pIn->tileInfoHw) + { + ADDR_CONVERT_TILEINFOTOHW_INPUT hwInput = {0}; + ADDR_CONVERT_TILEINFOTOHW_OUTPUT hwOutput = {0}; + + hwInput.pTileInfo = pOut->pTileInfo; + hwInput.tileIndex = -1; + hwOutput.pTileInfo = pOut->pTileInfo; + + returnCode = HwlConvertTileInfoToHW(&hwInput, &hwOutput); + } + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrLib::GetTileIndex +* +* @brief +* Get tile index from tile mode/type/info +* +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::GetTileIndex( + const ADDR_GET_TILEINDEX_INPUT* pIn, ///< [in] input structure + ADDR_GET_TILEINDEX_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_GET_TILEINDEX_INPUT)) || + (pOut->size != sizeof(ADDR_GET_TILEINDEX_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + returnCode = HwlGetTileIndex(pIn, pOut); + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrLib::ComputeSurfaceThickness +* +* @brief +* Compute surface thickness +* +* @return +* Surface thickness +*************************************************************************************************** +*/ +UINT_32 AddrLib::ComputeSurfaceThickness( + AddrTileMode tileMode) ///< [in] tile mode +{ + return m_modeFlags[tileMode].thickness; +} + + + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// CMASK/HTILE +/////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +*************************************************************************************************** +* AddrLib::ComputeHtileInfo +* +* @brief +* Interface function stub of AddrComputeHtilenfo +* +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::ComputeHtileInfo( + const ADDR_COMPUTE_HTILE_INFO_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_HTILE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + BOOL_32 isWidth8 = (pIn->blockWidth == 8) ? TRUE : FALSE; + BOOL_32 isHeight8 = (pIn->blockHeight == 8) ? TRUE : FALSE; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_HTILE_INFO_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_HTILE_INFO_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_COMPUTE_HTILE_INFO_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + // Use temp tile info for calcalation + input.pTileInfo = &tileInfoNull; + + returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo); + + // Change the input structure + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + pOut->bpp = ComputeHtileInfo(pIn->flags, + pIn->pitch, + pIn->height, + pIn->numSlices, + pIn->isLinear, + isWidth8, + isHeight8, + pIn->pTileInfo, + &pOut->pitch, + &pOut->height, + &pOut->htileBytes, + &pOut->macroWidth, + &pOut->macroHeight, + &pOut->sliceSize, + &pOut->baseAlign); + } + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrLib::ComputeCmaskInfo +* +* @brief +* Interface function stub of AddrComputeCmaskInfo +* +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::ComputeCmaskInfo( + const ADDR_COMPUTE_CMASK_INFO_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_CMASK_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_CMASK_INFO_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_CMASK_INFO_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_COMPUTE_CMASK_INFO_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + // Use temp tile info for calcalation + input.pTileInfo = &tileInfoNull; + + returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo); + + // Change the input structure + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + returnCode = ComputeCmaskInfo(pIn->flags, + pIn->pitch, + pIn->height, + pIn->numSlices, + pIn->isLinear, + pIn->pTileInfo, + &pOut->pitch, + &pOut->height, + &pOut->cmaskBytes, + &pOut->macroWidth, + &pOut->macroHeight, + &pOut->sliceSize, + &pOut->baseAlign, + &pOut->blockMax); + } + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrLib::ComputeDccInfo +* +* @brief +* Interface function to compute DCC key info +* +* @return +* return code of HwlComputeDccInfo +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::ComputeDccInfo( + const ADDR_COMPUTE_DCCINFO_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_DCCINFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE ret = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_DCCINFO_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_DCCINFO_OUTPUT))) + { + ret = ADDR_PARAMSIZEMISMATCH; + } + } + + if (ret == ADDR_OK) + { + ADDR_COMPUTE_DCCINFO_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + + ret = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, + &input.tileInfo, &input.tileMode); + + pIn = &input; + } + + if (ADDR_OK == ret) + { + ret = HwlComputeDccInfo(pIn, pOut); + } + } + + return ret; +} + +/** +*************************************************************************************************** +* AddrLib::ComputeHtileAddrFromCoord +* +* @brief +* Interface function stub of AddrComputeHtileAddrFromCoord +* +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::ComputeHtileAddrFromCoord( + const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + BOOL_32 isWidth8 = (pIn->blockWidth == 8) ? TRUE : FALSE; + BOOL_32 isHeight8 = (pIn->blockHeight == 8) ? TRUE : FALSE; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + // Use temp tile info for calcalation + input.pTileInfo = &tileInfoNull; + + returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo); + + // Change the input structure + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + pOut->addr = HwlComputeXmaskAddrFromCoord(pIn->pitch, + pIn->height, + pIn->x, + pIn->y, + pIn->slice, + pIn->numSlices, + 1, + pIn->isLinear, + isWidth8, + isHeight8, + pIn->pTileInfo, + &pOut->bitPosition); + } + } + + return returnCode; + +} + +/** +*************************************************************************************************** +* AddrLib::ComputeHtileCoordFromAddr +* +* @brief +* Interface function stub of AddrComputeHtileCoordFromAddr +* +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::ComputeHtileCoordFromAddr( + const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + BOOL_32 isWidth8 = (pIn->blockWidth == 8) ? TRUE : FALSE; + BOOL_32 isHeight8 = (pIn->blockHeight == 8) ? TRUE : FALSE; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + // Use temp tile info for calcalation + input.pTileInfo = &tileInfoNull; + + returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo); + + // Change the input structure + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + HwlComputeXmaskCoordFromAddr(pIn->addr, + pIn->bitPosition, + pIn->pitch, + pIn->height, + pIn->numSlices, + 1, + pIn->isLinear, + isWidth8, + isHeight8, + pIn->pTileInfo, + &pOut->x, + &pOut->y, + &pOut->slice); + } + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrLib::ComputeCmaskAddrFromCoord +* +* @brief +* Interface function stub of AddrComputeCmaskAddrFromCoord +* +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::ComputeCmaskAddrFromCoord( + const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + // Use temp tile info for calcalation + input.pTileInfo = &tileInfoNull; + + returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo); + + // Change the input structure + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + if (pIn->flags.tcCompatible == TRUE) + { + returnCode = HwlComputeCmaskAddrFromCoord(pIn, pOut); + } + else + { + pOut->addr = HwlComputeXmaskAddrFromCoord(pIn->pitch, + pIn->height, + pIn->x, + pIn->y, + pIn->slice, + pIn->numSlices, + 2, + pIn->isLinear, + FALSE, //this is cmask, isWidth8 is not needed + FALSE, //this is cmask, isHeight8 is not needed + pIn->pTileInfo, + &pOut->bitPosition); + } + + } + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrLib::ComputeCmaskCoordFromAddr +* +* @brief +* Interface function stub of AddrComputeCmaskCoordFromAddr +* +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::ComputeCmaskCoordFromAddr( + const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT)) || + (pOut->size != sizeof(ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + ADDR_TILEINFO tileInfoNull; + ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT input; + + if (UseTileIndex(pIn->tileIndex)) + { + input = *pIn; + // Use temp tile info for calcalation + input.pTileInfo = &tileInfoNull; + + returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo); + + // Change the input structure + pIn = &input; + } + + if (returnCode == ADDR_OK) + { + HwlComputeXmaskCoordFromAddr(pIn->addr, + pIn->bitPosition, + pIn->pitch, + pIn->height, + pIn->numSlices, + 2, + pIn->isLinear, + FALSE, + FALSE, + pIn->pTileInfo, + &pOut->x, + &pOut->y, + &pOut->slice); + } + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrLib::ComputeTileDataWidthAndHeight +* +* @brief +* Compute the squared cache shape for per-tile data (CMASK and HTILE) +* +* @return +* N/A +* +* @note +* MacroWidth and macroHeight are measured in pixels +*************************************************************************************************** +*/ +VOID AddrLib::ComputeTileDataWidthAndHeight( + UINT_32 bpp, ///< [in] bits per pixel + UINT_32 cacheBits, ///< [in] bits of cache + ADDR_TILEINFO* pTileInfo, ///< [in] Tile info + UINT_32* pMacroWidth, ///< [out] macro tile width + UINT_32* pMacroHeight ///< [out] macro tile height + ) const +{ + UINT_32 height = 1; + UINT_32 width = cacheBits / bpp; + UINT_32 pipes = HwlGetPipes(pTileInfo); + + // Double height until the macro-tile is close to square + // Height can only be doubled if width is even + + while ((width > height * 2 * pipes) && !(width & 1)) + { + width /= 2; + height *= 2; + } + + *pMacroWidth = 8 * width; + *pMacroHeight = 8 * height * pipes; + + // Note: The above iterative comptuation is equivalent to the following + // + //int log2_height = ((log2(cacheBits)-log2(bpp)-log2(pipes))/2); + //int macroHeight = pow2( 3+log2(pipes)+log2_height ); +} + +/** +*************************************************************************************************** +* AddrLib::HwlComputeTileDataWidthAndHeightLinear +* +* @brief +* Compute the squared cache shape for per-tile data (CMASK and HTILE) for linear layout +* +* @return +* N/A +* +* @note +* MacroWidth and macroHeight are measured in pixels +*************************************************************************************************** +*/ +VOID AddrLib::HwlComputeTileDataWidthAndHeightLinear( + UINT_32* pMacroWidth, ///< [out] macro tile width + UINT_32* pMacroHeight, ///< [out] macro tile height + UINT_32 bpp, ///< [in] bits per pixel + ADDR_TILEINFO* pTileInfo ///< [in] tile info + ) const +{ + ADDR_ASSERT(bpp != 4); // Cmask does not support linear layout prior to SI + *pMacroWidth = 8 * 512 / bpp; // Align width to 512-bit memory accesses + *pMacroHeight = 8 * m_pipes; // Align height to number of pipes +} + +/** +*************************************************************************************************** +* AddrLib::ComputeHtileInfo +* +* @brief +* Compute htile pitch,width, bytes per 2D slice +* +* @return +* Htile bpp i.e. How many bits for an 8x8 tile +* Also returns by output parameters: +* *Htile pitch, height, total size in bytes, macro-tile dimensions and slice size* +*************************************************************************************************** +*/ +UINT_32 AddrLib::ComputeHtileInfo( + ADDR_HTILE_FLAGS flags, ///< [in] htile flags + UINT_32 pitchIn, ///< [in] pitch input + UINT_32 heightIn, ///< [in] height input + UINT_32 numSlices, ///< [in] number of slices + BOOL_32 isLinear, ///< [in] if it is linear mode + BOOL_32 isWidth8, ///< [in] if htile block width is 8 + BOOL_32 isHeight8, ///< [in] if htile block height is 8 + ADDR_TILEINFO* pTileInfo, ///< [in] Tile info + UINT_32* pPitchOut, ///< [out] pitch output + UINT_32* pHeightOut, ///< [out] height output + UINT_64* pHtileBytes, ///< [out] bytes per 2D slice + UINT_32* pMacroWidth, ///< [out] macro-tile width in pixels + UINT_32* pMacroHeight, ///< [out] macro-tile width in pixels + UINT_64* pSliceSize, ///< [out] slice size in bytes + UINT_32* pBaseAlign ///< [out] base alignment + ) const +{ + + UINT_32 macroWidth; + UINT_32 macroHeight; + UINT_32 baseAlign; + UINT_64 surfBytes; + UINT_64 sliceBytes; + + numSlices = Max(1u, numSlices); + + const UINT_32 bpp = HwlComputeHtileBpp(isWidth8, isHeight8); + const UINT_32 cacheBits = HtileCacheBits; + + if (isLinear) + { + HwlComputeTileDataWidthAndHeightLinear(¯oWidth, + ¯oHeight, + bpp, + pTileInfo); + } + else + { + ComputeTileDataWidthAndHeight(bpp, + cacheBits, + pTileInfo, + ¯oWidth, + ¯oHeight); + } + + *pPitchOut = PowTwoAlign(pitchIn, macroWidth); + *pHeightOut = PowTwoAlign(heightIn, macroHeight); + + baseAlign = HwlComputeHtileBaseAlign(flags.tcCompatible, isLinear, pTileInfo); + + surfBytes = HwlComputeHtileBytes(*pPitchOut, + *pHeightOut, + bpp, + isLinear, + numSlices, + &sliceBytes, + baseAlign); + + *pHtileBytes = surfBytes; + + // + // Use SafeAssign since they are optional + // + SafeAssign(pMacroWidth, macroWidth); + + SafeAssign(pMacroHeight, macroHeight); + + SafeAssign(pSliceSize, sliceBytes); + + SafeAssign(pBaseAlign, baseAlign); + + return bpp; +} + +/** +*************************************************************************************************** +* AddrLib::ComputeCmaskBaseAlign +* +* @brief +* Compute cmask base alignment +* +* @return +* Cmask base alignment +*************************************************************************************************** +*/ +UINT_32 AddrLib::ComputeCmaskBaseAlign( + ADDR_CMASK_FLAGS flags, ///< [in] Cmask flags + ADDR_TILEINFO* pTileInfo ///< [in] Tile info + ) const +{ + UINT_32 baseAlign = m_pipeInterleaveBytes * HwlGetPipes(pTileInfo); + + if (flags.tcCompatible) + { + ADDR_ASSERT(pTileInfo != NULL); + if (pTileInfo) + { + baseAlign *= pTileInfo->banks; + } + } + + return baseAlign; +} + +/** +*************************************************************************************************** +* AddrLib::ComputeCmaskBytes +* +* @brief +* Compute cmask size in bytes +* +* @return +* Cmask size in bytes +*************************************************************************************************** +*/ +UINT_64 AddrLib::ComputeCmaskBytes( + UINT_32 pitch, ///< [in] pitch + UINT_32 height, ///< [in] height + UINT_32 numSlices ///< [in] number of slices + ) const +{ + return BITS_TO_BYTES(static_cast(pitch) * height * numSlices * CmaskElemBits) / + MicroTilePixels; +} + +/** +*************************************************************************************************** +* AddrLib::ComputeCmaskInfo +* +* @brief +* Compute cmask pitch,width, bytes per 2D slice +* +* @return +* BlockMax. Also by output parameters: Cmask pitch,height, total size in bytes, +* macro-tile dimensions +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::ComputeCmaskInfo( + ADDR_CMASK_FLAGS flags, ///< [in] cmask flags + UINT_32 pitchIn, ///< [in] pitch input + UINT_32 heightIn, ///< [in] height input + UINT_32 numSlices, ///< [in] number of slices + BOOL_32 isLinear, ///< [in] is linear mode + ADDR_TILEINFO* pTileInfo, ///< [in] Tile info + UINT_32* pPitchOut, ///< [out] pitch output + UINT_32* pHeightOut, ///< [out] height output + UINT_64* pCmaskBytes, ///< [out] bytes per 2D slice + UINT_32* pMacroWidth, ///< [out] macro-tile width in pixels + UINT_32* pMacroHeight, ///< [out] macro-tile width in pixels + UINT_64* pSliceSize, ///< [out] slice size in bytes + UINT_32* pBaseAlign, ///< [out] base alignment + UINT_32* pBlockMax ///< [out] block max == slice / 128 / 128 - 1 + ) const +{ + UINT_32 macroWidth; + UINT_32 macroHeight; + UINT_32 baseAlign; + UINT_64 surfBytes; + UINT_64 sliceBytes; + + numSlices = Max(1u, numSlices); + + const UINT_32 bpp = CmaskElemBits; + const UINT_32 cacheBits = CmaskCacheBits; + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (isLinear) + { + HwlComputeTileDataWidthAndHeightLinear(¯oWidth, + ¯oHeight, + bpp, + pTileInfo); + } + else + { + ComputeTileDataWidthAndHeight(bpp, + cacheBits, + pTileInfo, + ¯oWidth, + ¯oHeight); + } + + *pPitchOut = (pitchIn + macroWidth - 1) & ~(macroWidth - 1); + *pHeightOut = (heightIn + macroHeight - 1) & ~(macroHeight - 1); + + + sliceBytes = ComputeCmaskBytes(*pPitchOut, + *pHeightOut, + 1); + + baseAlign = ComputeCmaskBaseAlign(flags, pTileInfo); + + while (sliceBytes % baseAlign) + { + *pHeightOut += macroHeight; + + sliceBytes = ComputeCmaskBytes(*pPitchOut, + *pHeightOut, + 1); + } + + surfBytes = sliceBytes * numSlices; + + *pCmaskBytes = surfBytes; + + // + // Use SafeAssign since they are optional + // + SafeAssign(pMacroWidth, macroWidth); + + SafeAssign(pMacroHeight, macroHeight); + + SafeAssign(pBaseAlign, baseAlign); + + SafeAssign(pSliceSize, sliceBytes); + + UINT_32 slice = (*pPitchOut) * (*pHeightOut); + UINT_32 blockMax = slice / 128 / 128 - 1; + +#if DEBUG + if (slice % (64*256) != 0) + { + ADDR_ASSERT_ALWAYS(); + } +#endif //DEBUG + + UINT_32 maxBlockMax = HwlGetMaxCmaskBlockMax(); + + if (blockMax > maxBlockMax) + { + blockMax = maxBlockMax; + returnCode = ADDR_INVALIDPARAMS; + } + + SafeAssign(pBlockMax, blockMax); + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrLib::ComputeXmaskCoordYFromPipe +* +* @brief +* Compute the Y coord from pipe number for cmask/htile +* +* @return +* Y coordinate +* +*************************************************************************************************** +*/ +UINT_32 AddrLib::ComputeXmaskCoordYFromPipe( + UINT_32 pipe, ///< [in] pipe number + UINT_32 x ///< [in] x coordinate + ) const +{ + UINT_32 pipeBit0; + UINT_32 pipeBit1; + UINT_32 xBit0; + UINT_32 xBit1; + UINT_32 yBit0; + UINT_32 yBit1; + + UINT_32 y = 0; + + UINT_32 numPipes = m_pipes; // SI has its implementation + // + // Convert pipe + x to y coordinate. + // + switch (numPipes) + { + case 1: + // + // 1 pipe + // + // p0 = 0 + // + y = 0; + break; + case 2: + // + // 2 pipes + // + // p0 = x0 ^ y0 + // + // y0 = p0 ^ x0 + // + pipeBit0 = pipe & 0x1; + + xBit0 = x & 0x1; + + yBit0 = pipeBit0 ^ xBit0; + + y = yBit0; + break; + case 4: + // + // 4 pipes + // + // p0 = x1 ^ y0 + // p1 = x0 ^ y1 + // + // y0 = p0 ^ x1 + // y1 = p1 ^ x0 + // + pipeBit0 = pipe & 0x1; + pipeBit1 = (pipe & 0x2) >> 1; + + xBit0 = x & 0x1; + xBit1 = (x & 0x2) >> 1; + + yBit0 = pipeBit0 ^ xBit1; + yBit1 = pipeBit1 ^ xBit0; + + y = (yBit0 | + (yBit1 << 1)); + break; + case 8: + // + // 8 pipes + // + // r600 and r800 have different method + // + y = HwlComputeXmaskCoordYFrom8Pipe(pipe, x); + break; + default: + break; + } + return y; +} + +/** +*************************************************************************************************** +* AddrLib::HwlComputeXmaskCoordFromAddr +* +* @brief +* Compute the coord from an address of a cmask/htile +* +* @return +* N/A +* +* @note +* This method is reused by htile, so rename to Xmask +*************************************************************************************************** +*/ +VOID AddrLib::HwlComputeXmaskCoordFromAddr( + UINT_64 addr, ///< [in] address + UINT_32 bitPosition, ///< [in] bitPosition in a byte + UINT_32 pitch, ///< [in] pitch + UINT_32 height, ///< [in] height + UINT_32 numSlices, ///< [in] number of slices + UINT_32 factor, ///< [in] factor that indicates cmask or htile + BOOL_32 isLinear, ///< [in] linear or tiled HTILE layout + BOOL_32 isWidth8, ///< [in] TRUE if width is 8, FALSE means 4. It's register value + BOOL_32 isHeight8, ///< [in] TRUE if width is 8, FALSE means 4. It's register value + ADDR_TILEINFO* pTileInfo, ///< [in] Tile info + UINT_32* pX, ///< [out] x coord + UINT_32* pY, ///< [out] y coord + UINT_32* pSlice ///< [out] slice index + ) const +{ + UINT_32 pipe; + UINT_32 numPipes; + UINT_32 numPipeBits; + UINT_32 macroTilePitch; + UINT_32 macroTileHeight; + + UINT_64 bitAddr; + + UINT_32 microTileCoordY; + + UINT_32 elemBits; + + UINT_32 pitchAligned = pitch; + UINT_32 heightAligned = height; + UINT_64 totalBytes; + + UINT_64 elemOffset; + + UINT_64 macroIndex; + UINT_32 microIndex; + + UINT_64 macroNumber; + UINT_32 microNumber; + + UINT_32 macroX; + UINT_32 macroY; + UINT_32 macroZ; + + UINT_32 microX; + UINT_32 microY; + + UINT_32 tilesPerMacro; + UINT_32 macrosPerPitch; + UINT_32 macrosPerSlice; + + // + // Extract pipe. + // + numPipes = HwlGetPipes(pTileInfo); + pipe = ComputePipeFromAddr(addr, numPipes); + + // + // Compute the number of group and pipe bits. + // + numPipeBits = Log2(numPipes); + + UINT_32 groupBits = 8 * m_pipeInterleaveBytes; + UINT_32 pipes = numPipes; + + + // + // Compute the micro tile size, in bits. And macro tile pitch and height. + // + if (factor == 2) //CMASK + { + ADDR_CMASK_FLAGS flags = {{0}}; + + elemBits = CmaskElemBits; + + ComputeCmaskInfo(flags, + pitch, + height, + numSlices, + isLinear, + pTileInfo, + &pitchAligned, + &heightAligned, + &totalBytes, + ¯oTilePitch, + ¯oTileHeight); + } + else //HTILE + { + ADDR_HTILE_FLAGS flags = {{0}}; + + if (factor != 1) + { + factor = 1; + } + + elemBits = HwlComputeHtileBpp(isWidth8, isHeight8); + + ComputeHtileInfo(flags, + pitch, + height, + numSlices, + isLinear, + isWidth8, + isHeight8, + pTileInfo, + &pitchAligned, + &heightAligned, + &totalBytes, + ¯oTilePitch, + ¯oTileHeight); + } + + // Should use aligned dims + // + pitch = pitchAligned; + height = heightAligned; + + + // + // Convert byte address to bit address. + // + bitAddr = BYTES_TO_BITS(addr) + bitPosition; + + + // + // Remove pipe bits from address. + // + + bitAddr = (bitAddr % groupBits) + ((bitAddr/groupBits/pipes)*groupBits); + + + elemOffset = bitAddr / elemBits; + + tilesPerMacro = (macroTilePitch/factor) * macroTileHeight / MicroTilePixels >> numPipeBits; + + macrosPerPitch = pitch / (macroTilePitch/factor); + macrosPerSlice = macrosPerPitch * height / macroTileHeight; + + macroIndex = elemOffset / factor / tilesPerMacro; + microIndex = static_cast(elemOffset % (tilesPerMacro * factor)); + + macroNumber = macroIndex * factor + microIndex % factor; + microNumber = microIndex / factor; + + macroX = static_cast((macroNumber % macrosPerPitch)); + macroY = static_cast((macroNumber % macrosPerSlice) / macrosPerPitch); + macroZ = static_cast((macroNumber / macrosPerSlice)); + + + microX = microNumber % (macroTilePitch / factor / MicroTileWidth); + microY = (microNumber / (macroTilePitch / factor / MicroTileHeight)); + + *pX = macroX * (macroTilePitch/factor) + microX * MicroTileWidth; + *pY = macroY * macroTileHeight + (microY * MicroTileHeight << numPipeBits); + *pSlice = macroZ; + + microTileCoordY = ComputeXmaskCoordYFromPipe(pipe, + *pX/MicroTileWidth); + + + // + // Assemble final coordinates. + // + *pY += microTileCoordY * MicroTileHeight; + +} + +/** +*************************************************************************************************** +* AddrLib::HwlComputeXmaskAddrFromCoord +* +* @brief +* Compute the address from an address of cmask (prior to si) +* +* @return +* Address in bytes +* +*************************************************************************************************** +*/ +UINT_64 AddrLib::HwlComputeXmaskAddrFromCoord( + UINT_32 pitch, ///< [in] pitch + UINT_32 height, ///< [in] height + UINT_32 x, ///< [in] x coord + UINT_32 y, ///< [in] y coord + UINT_32 slice, ///< [in] slice/depth index + UINT_32 numSlices, ///< [in] number of slices + UINT_32 factor, ///< [in] factor that indicates cmask(2) or htile(1) + BOOL_32 isLinear, ///< [in] linear or tiled HTILE layout + BOOL_32 isWidth8, ///< [in] TRUE if width is 8, FALSE means 4. It's register value + BOOL_32 isHeight8, ///< [in] TRUE if width is 8, FALSE means 4. It's register value + ADDR_TILEINFO* pTileInfo, ///< [in] Tile info + UINT_32* pBitPosition ///< [out] bit position inside a byte + ) const +{ + UINT_64 addr; + UINT_32 numGroupBits; + UINT_32 numPipeBits; + UINT_32 newPitch = 0; + UINT_32 newHeight = 0; + UINT_64 sliceBytes = 0; + UINT_64 totalBytes = 0; + UINT_64 sliceOffset; + UINT_32 pipe; + UINT_32 macroTileWidth; + UINT_32 macroTileHeight; + UINT_32 macroTilesPerRow; + UINT_32 macroTileBytes; + UINT_32 macroTileIndexX; + UINT_32 macroTileIndexY; + UINT_64 macroTileOffset; + UINT_32 pixelBytesPerRow; + UINT_32 pixelOffsetX; + UINT_32 pixelOffsetY; + UINT_32 pixelOffset; + UINT_64 totalOffset; + UINT_64 offsetLo; + UINT_64 offsetHi; + UINT_64 groupMask; + + + UINT_32 elemBits = 0; + + UINT_32 numPipes = m_pipes; // This function is accessed prior to si only + + if (factor == 2) //CMASK + { + elemBits = CmaskElemBits; + + // For asics before SI, cmask is always tiled + isLinear = FALSE; + } + else //HTILE + { + if (factor != 1) // Fix compile warning + { + factor = 1; + } + + elemBits = HwlComputeHtileBpp(isWidth8, isHeight8); + } + + // + // Compute the number of group bits and pipe bits. + // + numGroupBits = Log2(m_pipeInterleaveBytes); + numPipeBits = Log2(numPipes); + + // + // Compute macro tile dimensions. + // + if (factor == 2) // CMASK + { + ADDR_CMASK_FLAGS flags = {{0}}; + + ComputeCmaskInfo(flags, + pitch, + height, + numSlices, + isLinear, + pTileInfo, + &newPitch, + &newHeight, + &totalBytes, + ¯oTileWidth, + ¯oTileHeight); + + sliceBytes = totalBytes / numSlices; + } + else // HTILE + { + ADDR_HTILE_FLAGS flags = {{0}}; + + ComputeHtileInfo(flags, + pitch, + height, + numSlices, + isLinear, + isWidth8, + isHeight8, + pTileInfo, + &newPitch, + &newHeight, + &totalBytes, + ¯oTileWidth, + ¯oTileHeight, + &sliceBytes); + } + + sliceOffset = slice * sliceBytes; + + // + // Get the pipe. Note that neither slice rotation nor pipe swizzling apply for CMASK. + // + pipe = ComputePipeFromCoord(x, + y, + 0, + ADDR_TM_2D_TILED_THIN1, + 0, + FALSE, + pTileInfo); + + // + // Compute the number of macro tiles per row. + // + macroTilesPerRow = newPitch / macroTileWidth; + + // + // Compute the number of bytes per macro tile. + // + macroTileBytes = BITS_TO_BYTES((macroTileWidth * macroTileHeight * elemBits) / MicroTilePixels); + + // + // Compute the offset to the macro tile containing the specified coordinate. + // + macroTileIndexX = x / macroTileWidth; + macroTileIndexY = y / macroTileHeight; + macroTileOffset = ((macroTileIndexY * macroTilesPerRow) + macroTileIndexX) * macroTileBytes; + + // + // Compute the pixel offset within the macro tile. + // + pixelBytesPerRow = BITS_TO_BYTES(macroTileWidth * elemBits) / MicroTileWidth; + + // + // The nibbles are interleaved (see below), so the part of the offset relative to the x + // coordinate repeats halfway across the row. (Not for HTILE) + // + if (factor == 2) + { + pixelOffsetX = (x % (macroTileWidth / 2)) / MicroTileWidth; + } + else + { + pixelOffsetX = (x % (macroTileWidth)) / MicroTileWidth * BITS_TO_BYTES(elemBits); + } + + // + // Compute the y offset within the macro tile. + // + pixelOffsetY = (((y % macroTileHeight) / MicroTileHeight) / numPipes) * pixelBytesPerRow; + + pixelOffset = pixelOffsetX + pixelOffsetY; + + // + // Combine the slice offset and macro tile offset with the pixel offset, accounting for the + // pipe bits in the middle of the address. + // + totalOffset = ((sliceOffset + macroTileOffset) >> numPipeBits) + pixelOffset; + + // + // Split the offset to put some bits below the pipe bits and some above. + // + groupMask = (1 << numGroupBits) - 1; + offsetLo = totalOffset & groupMask; + offsetHi = (totalOffset & ~groupMask) << numPipeBits; + + // + // Assemble the address from its components. + // + addr = offsetLo; + addr |= offsetHi; + // This is to remove warning with /analyze option + UINT_32 pipeBits = pipe << numGroupBits; + addr |= pipeBits; + + // + // Compute the bit position. The lower nibble is used when the x coordinate within the macro + // tile is less than half of the macro tile width, and the upper nibble is used when the x + // coordinate within the macro tile is greater than or equal to half the macro tile width. + // + *pBitPosition = ((x % macroTileWidth) < (macroTileWidth / factor)) ? 0 : 4; + + return addr; +} + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// Surface Addressing Shared +/////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +*************************************************************************************************** +* AddrLib::ComputeSurfaceAddrFromCoordLinear +* +* @brief +* Compute address from coord for linear surface +* +* @return +* Address in bytes +* +*************************************************************************************************** +*/ +UINT_64 AddrLib::ComputeSurfaceAddrFromCoordLinear( + UINT_32 x, ///< [in] x coord + UINT_32 y, ///< [in] y coord + UINT_32 slice, ///< [in] slice/depth index + UINT_32 sample, ///< [in] sample index + UINT_32 bpp, ///< [in] bits per pixel + UINT_32 pitch, ///< [in] pitch + UINT_32 height, ///< [in] height + UINT_32 numSlices, ///< [in] number of slices + UINT_32* pBitPosition ///< [out] bit position inside a byte + ) const +{ + const UINT_64 sliceSize = static_cast(pitch) * height; + + UINT_64 sliceOffset = (slice + sample * numSlices)* sliceSize; + UINT_64 rowOffset = static_cast(y) * pitch; + UINT_64 pixOffset = x; + + UINT_64 addr = (sliceOffset + rowOffset + pixOffset) * bpp; + + *pBitPosition = static_cast(addr % 8); + addr /= 8; + + return addr; +} + +/** +*************************************************************************************************** +* AddrLib::ComputeSurfaceCoordFromAddrLinear +* +* @brief +* Compute the coord from an address of a linear surface +* +* @return +* N/A +*************************************************************************************************** +*/ +VOID AddrLib::ComputeSurfaceCoordFromAddrLinear( + UINT_64 addr, ///< [in] address + UINT_32 bitPosition, ///< [in] bitPosition in a byte + UINT_32 bpp, ///< [in] bits per pixel + UINT_32 pitch, ///< [in] pitch + UINT_32 height, ///< [in] height + UINT_32 numSlices, ///< [in] number of slices + UINT_32* pX, ///< [out] x coord + UINT_32* pY, ///< [out] y coord + UINT_32* pSlice, ///< [out] slice/depth index + UINT_32* pSample ///< [out] sample index + ) const +{ + const UINT_64 sliceSize = static_cast(pitch) * height; + const UINT_64 linearOffset = (BYTES_TO_BITS(addr) + bitPosition) / bpp; + + *pX = static_cast((linearOffset % sliceSize) % pitch); + *pY = static_cast((linearOffset % sliceSize) / pitch % height); + *pSlice = static_cast((linearOffset / sliceSize) % numSlices); + *pSample = static_cast((linearOffset / sliceSize) / numSlices); +} + +/** +*************************************************************************************************** +* AddrLib::ComputeSurfaceCoordFromAddrMicroTiled +* +* @brief +* Compute the coord from an address of a micro tiled surface +* +* @return +* N/A +*************************************************************************************************** +*/ +VOID AddrLib::ComputeSurfaceCoordFromAddrMicroTiled( + UINT_64 addr, ///< [in] address + UINT_32 bitPosition, ///< [in] bitPosition in a byte + UINT_32 bpp, ///< [in] bits per pixel + UINT_32 pitch, ///< [in] pitch + UINT_32 height, ///< [in] height + UINT_32 numSamples, ///< [in] number of samples + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 tileBase, ///< [in] base offset within a tile + UINT_32 compBits, ///< [in] component bits actually needed(for planar surface) + UINT_32* pX, ///< [out] x coord + UINT_32* pY, ///< [out] y coord + UINT_32* pSlice, ///< [out] slice/depth index + UINT_32* pSample, ///< [out] sample index, + AddrTileType microTileType, ///< [in] micro tiling order + BOOL_32 isDepthSampleOrder ///< [in] TRUE if in depth sample order + ) const +{ + UINT_64 bitAddr; + UINT_32 microTileThickness; + UINT_32 microTileBits; + UINT_64 sliceBits; + UINT_64 rowBits; + UINT_32 sliceIndex; + UINT_32 microTileCoordX; + UINT_32 microTileCoordY; + UINT_32 pixelOffset; + UINT_32 pixelCoordX = 0; + UINT_32 pixelCoordY = 0; + UINT_32 pixelCoordZ = 0; + UINT_32 pixelCoordS = 0; + + // + // Convert byte address to bit address. + // + bitAddr = BYTES_TO_BITS(addr) + bitPosition; + + // + // Compute the micro tile size, in bits. + // + switch (tileMode) + { + case ADDR_TM_1D_TILED_THICK: + microTileThickness = ThickTileThickness; + break; + default: + microTileThickness = 1; + break; + } + + microTileBits = MicroTilePixels * microTileThickness * bpp * numSamples; + + // + // Compute number of bits per slice and number of bits per row of micro tiles. + // + sliceBits = static_cast(pitch) * height * microTileThickness * bpp * numSamples; + + rowBits = (pitch / MicroTileWidth) * microTileBits; + + // + // Extract the slice index. + // + sliceIndex = static_cast(bitAddr / sliceBits); + bitAddr -= sliceIndex * sliceBits; + + // + // Extract the y coordinate of the micro tile. + // + microTileCoordY = static_cast(bitAddr / rowBits) * MicroTileHeight; + bitAddr -= (microTileCoordY / MicroTileHeight) * rowBits; + + // + // Extract the x coordinate of the micro tile. + // + microTileCoordX = static_cast(bitAddr / microTileBits) * MicroTileWidth; + + // + // Compute the pixel offset within the micro tile. + // + pixelOffset = static_cast(bitAddr % microTileBits); + + // + // Extract pixel coordinates from the offset. + // + HwlComputePixelCoordFromOffset(pixelOffset, + bpp, + numSamples, + tileMode, + tileBase, + compBits, + &pixelCoordX, + &pixelCoordY, + &pixelCoordZ, + &pixelCoordS, + microTileType, + isDepthSampleOrder); + + // + // Assemble final coordinates. + // + *pX = microTileCoordX + pixelCoordX; + *pY = microTileCoordY + pixelCoordY; + *pSlice = (sliceIndex * microTileThickness) + pixelCoordZ; + *pSample = pixelCoordS; + + if (microTileThickness > 1) + { + *pSample = 0; + } +} + +/** +*************************************************************************************************** +* AddrLib::ComputePipeFromAddr +* +* @brief +* Compute the pipe number from an address +* +* @return +* Pipe number +* +*************************************************************************************************** +*/ +UINT_32 AddrLib::ComputePipeFromAddr( + UINT_64 addr, ///< [in] address + UINT_32 numPipes ///< [in] number of banks + ) const +{ + UINT_32 pipe; + + UINT_32 groupBytes = m_pipeInterleaveBytes; //just different terms + + // R600 + // The LSBs of the address are arranged as follows: + // bank | pipe | group + // + // To get the pipe number, shift off the group bits and mask the pipe bits. + // + + // R800 + // The LSBs of the address are arranged as follows: + // bank | bankInterleave | pipe | pipeInterleave + // + // To get the pipe number, shift off the pipe interleave bits and mask the pipe bits. + // + + pipe = static_cast(addr >> Log2(groupBytes)) & (numPipes - 1); + + return pipe; +} + +/** +*************************************************************************************************** +* AddrLib::ComputePixelIndexWithinMicroTile +* +* @brief +* Compute the pixel index inside a micro tile of surface +* +* @return +* Pixel index +* +*************************************************************************************************** +*/ +UINT_32 AddrLib::ComputePixelIndexWithinMicroTile( + UINT_32 x, ///< [in] x coord + UINT_32 y, ///< [in] y coord + UINT_32 z, ///< [in] slice/depth index + UINT_32 bpp, ///< [in] bits per pixel + AddrTileMode tileMode, ///< [in] tile mode + AddrTileType microTileType ///< [in] pixel order in display/non-display mode + ) const +{ + UINT_32 pixelBit0 = 0; + UINT_32 pixelBit1 = 0; + UINT_32 pixelBit2 = 0; + UINT_32 pixelBit3 = 0; + UINT_32 pixelBit4 = 0; + UINT_32 pixelBit5 = 0; + UINT_32 pixelBit6 = 0; + UINT_32 pixelBit7 = 0; + UINT_32 pixelBit8 = 0; + UINT_32 pixelNumber; + + UINT_32 x0 = _BIT(x, 0); + UINT_32 x1 = _BIT(x, 1); + UINT_32 x2 = _BIT(x, 2); + UINT_32 y0 = _BIT(y, 0); + UINT_32 y1 = _BIT(y, 1); + UINT_32 y2 = _BIT(y, 2); + UINT_32 z0 = _BIT(z, 0); + UINT_32 z1 = _BIT(z, 1); + UINT_32 z2 = _BIT(z, 2); + + UINT_32 thickness = ComputeSurfaceThickness(tileMode); + + // Compute the pixel number within the micro tile. + + if (microTileType != ADDR_THICK) + { + if (microTileType == ADDR_DISPLAYABLE) + { + switch (bpp) + { + case 8: + pixelBit0 = x0; + pixelBit1 = x1; + pixelBit2 = x2; + pixelBit3 = y1; + pixelBit4 = y0; + pixelBit5 = y2; + break; + case 16: + pixelBit0 = x0; + pixelBit1 = x1; + pixelBit2 = x2; + pixelBit3 = y0; + pixelBit4 = y1; + pixelBit5 = y2; + break; + case 32: + pixelBit0 = x0; + pixelBit1 = x1; + pixelBit2 = y0; + pixelBit3 = x2; + pixelBit4 = y1; + pixelBit5 = y2; + break; + case 64: + pixelBit0 = x0; + pixelBit1 = y0; + pixelBit2 = x1; + pixelBit3 = x2; + pixelBit4 = y1; + pixelBit5 = y2; + break; + case 128: + pixelBit0 = y0; + pixelBit1 = x0; + pixelBit2 = x1; + pixelBit3 = x2; + pixelBit4 = y1; + pixelBit5 = y2; + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + } + else if (microTileType == ADDR_NON_DISPLAYABLE || microTileType == ADDR_DEPTH_SAMPLE_ORDER) + { + pixelBit0 = x0; + pixelBit1 = y0; + pixelBit2 = x1; + pixelBit3 = y1; + pixelBit4 = x2; + pixelBit5 = y2; + } + else if (microTileType == ADDR_ROTATED) + { + ADDR_ASSERT(thickness == 1); + + switch (bpp) + { + case 8: + pixelBit0 = y0; + pixelBit1 = y1; + pixelBit2 = y2; + pixelBit3 = x1; + pixelBit4 = x0; + pixelBit5 = x2; + break; + case 16: + pixelBit0 = y0; + pixelBit1 = y1; + pixelBit2 = y2; + pixelBit3 = x0; + pixelBit4 = x1; + pixelBit5 = x2; + break; + case 32: + pixelBit0 = y0; + pixelBit1 = y1; + pixelBit2 = x0; + pixelBit3 = y2; + pixelBit4 = x1; + pixelBit5 = x2; + break; + case 64: + pixelBit0 = y0; + pixelBit1 = x0; + pixelBit2 = y1; + pixelBit3 = x1; + pixelBit4 = x2; + pixelBit5 = y2; + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + } + + if (thickness > 1) + { + pixelBit6 = z0; + pixelBit7 = z1; + } + } + else // ADDR_THICK + { + ADDR_ASSERT(thickness > 1); + + switch (bpp) + { + case 8: + case 16: + pixelBit0 = x0; + pixelBit1 = y0; + pixelBit2 = x1; + pixelBit3 = y1; + pixelBit4 = z0; + pixelBit5 = z1; + break; + case 32: + pixelBit0 = x0; + pixelBit1 = y0; + pixelBit2 = x1; + pixelBit3 = z0; + pixelBit4 = y1; + pixelBit5 = z1; + break; + case 64: + case 128: + pixelBit0 = y0; + pixelBit1 = x0; + pixelBit2 = z0; + pixelBit3 = x1; + pixelBit4 = y1; + pixelBit5 = z1; + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + + pixelBit6 = x2; + pixelBit7 = y2; + } + + if (thickness == 8) + { + pixelBit8 = z2; + } + + pixelNumber = ((pixelBit0 ) | + (pixelBit1 << 1) | + (pixelBit2 << 2) | + (pixelBit3 << 3) | + (pixelBit4 << 4) | + (pixelBit5 << 5) | + (pixelBit6 << 6) | + (pixelBit7 << 7) | + (pixelBit8 << 8)); + + return pixelNumber; +} + +/** +*************************************************************************************************** +* AddrLib::AdjustPitchAlignment +* +* @brief +* Adjusts pitch alignment for flipping surface +* +* @return +* N/A +* +*************************************************************************************************** +*/ +VOID AddrLib::AdjustPitchAlignment( + ADDR_SURFACE_FLAGS flags, ///< [in] Surface flags + UINT_32* pPitchAlign ///< [out] Pointer to pitch alignment + ) const +{ + // Display engine hardwires lower 5 bit of GRPH_PITCH to ZERO which means 32 pixel alignment + // Maybe it will be fixed in future but let's make it general for now. + if (flags.display || flags.overlay) + { + *pPitchAlign = PowTwoAlign(*pPitchAlign, 32); + + if(flags.display) + { + *pPitchAlign = Max(m_minPitchAlignPixels, *pPitchAlign); + } + } +} + +/** +*************************************************************************************************** +* AddrLib::PadDimensions +* +* @brief +* Helper function to pad dimensions +* +* @return +* N/A +* +*************************************************************************************************** +*/ +VOID AddrLib::PadDimensions( + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 bpp, ///< [in] bits per pixel + ADDR_SURFACE_FLAGS flags, ///< [in] surface flags + UINT_32 numSamples, ///< [in] number of samples + ADDR_TILEINFO* pTileInfo, ///< [in/out] bank structure. + UINT_32 padDims, ///< [in] Dimensions to pad valid value 1,2,3 + UINT_32 mipLevel, ///< [in] MipLevel + UINT_32* pPitch, ///< [in/out] pitch in pixels + UINT_32 pitchAlign, ///< [in] pitch alignment + UINT_32* pHeight, ///< [in/out] height in pixels + UINT_32 heightAlign, ///< [in] height alignment + UINT_32* pSlices, ///< [in/out] number of slices + UINT_32 sliceAlign ///< [in] number of slice alignment + ) const +{ + UINT_32 thickness = ComputeSurfaceThickness(tileMode); + + ADDR_ASSERT(padDims <= 3); + + // + // Override padding for mip levels + // + if (mipLevel > 0) + { + if (flags.cube) + { + // for cubemap, we only pad when client call with 6 faces as an identity + if (*pSlices > 1) + { + padDims = 3; // we should pad cubemap sub levels when we treat it as 3d texture + } + else + { + padDims = 2; + } + } + } + + // Any possibilities that padDims is 0? + if (padDims == 0) + { + padDims = 3; + } + + if (IsPow2(pitchAlign)) + { + *pPitch = PowTwoAlign((*pPitch), pitchAlign); + } + else // add this code to pass unit test, r600 linear mode is not align bpp to pow2 for linear + { + *pPitch += pitchAlign - 1; + *pPitch /= pitchAlign; + *pPitch *= pitchAlign; + } + + if (padDims > 1) + { + *pHeight = PowTwoAlign((*pHeight), heightAlign); + } + + if (padDims > 2 || thickness > 1) + { + // for cubemap single face, we do not pad slices. + // if we pad it, the slice number should be set to 6 and current mip level > 1 + if (flags.cube && (!m_configFlags.noCubeMipSlicesPad || flags.cubeAsArray)) + { + *pSlices = NextPow2(*pSlices); + } + + // normal 3D texture or arrays or cubemap has a thick mode? (Just pass unit test) + if (thickness > 1) + { + *pSlices = PowTwoAlign((*pSlices), sliceAlign); + } + + } + + HwlPadDimensions(tileMode, + bpp, + flags, + numSamples, + pTileInfo, + padDims, + mipLevel, + pPitch, + pitchAlign, + pHeight, + heightAlign, + pSlices, + sliceAlign); +} + + +/** +*************************************************************************************************** +* AddrLib::HwlPreHandleBaseLvl3xPitch +* +* @brief +* Pre-handler of 3x pitch (96 bit) adjustment +* +* @return +* Expected pitch +*************************************************************************************************** +*/ +UINT_32 AddrLib::HwlPreHandleBaseLvl3xPitch( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input + UINT_32 expPitch ///< [in] pitch + ) const +{ + ADDR_ASSERT(pIn->width == expPitch); + // + // If pitch is pre-multiplied by 3, we retrieve original one here to get correct miplevel size + // + if (AddrElemLib::IsExpand3x(pIn->format) && + pIn->mipLevel == 0 && + pIn->tileMode == ADDR_TM_LINEAR_ALIGNED) + { + expPitch /= 3; + expPitch = NextPow2(expPitch); + } + + return expPitch; +} + +/** +*************************************************************************************************** +* AddrLib::HwlPostHandleBaseLvl3xPitch +* +* @brief +* Post-handler of 3x pitch adjustment +* +* @return +* Expected pitch +*************************************************************************************************** +*/ +UINT_32 AddrLib::HwlPostHandleBaseLvl3xPitch( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input + UINT_32 expPitch ///< [in] pitch + ) const +{ + // + // 96 bits surface of sub levels require element pitch of 32 bits instead + // So we just return pitch in 32 bit pixels without timing 3 + // + if (AddrElemLib::IsExpand3x(pIn->format) && + pIn->mipLevel == 0 && + pIn->tileMode == ADDR_TM_LINEAR_ALIGNED) + { + expPitch *= 3; + } + + return expPitch; +} + + +/** +*************************************************************************************************** +* AddrLib::IsMacroTiled +* +* @brief +* Check if the tile mode is macro tiled +* +* @return +* TRUE if it is macro tiled (2D/2B/3D/3B) +*************************************************************************************************** +*/ +BOOL_32 AddrLib::IsMacroTiled( + AddrTileMode tileMode) ///< [in] tile mode +{ + return m_modeFlags[tileMode].isMacro; +} + +/** +*************************************************************************************************** +* AddrLib::IsMacro3dTiled +* +* @brief +* Check if the tile mode is 3D macro tiled +* +* @return +* TRUE if it is 3D macro tiled +*************************************************************************************************** +*/ +BOOL_32 AddrLib::IsMacro3dTiled( + AddrTileMode tileMode) ///< [in] tile mode +{ + return m_modeFlags[tileMode].isMacro3d; +} + +/** +*************************************************************************************************** +* AddrLib::IsMicroTiled +* +* @brief +* Check if the tile mode is micro tiled +* +* @return +* TRUE if micro tiled +*************************************************************************************************** +*/ +BOOL_32 AddrLib::IsMicroTiled( + AddrTileMode tileMode) ///< [in] tile mode +{ + return m_modeFlags[tileMode].isMicro; +} + +/** +*************************************************************************************************** +* AddrLib::IsLinear +* +* @brief +* Check if the tile mode is linear +* +* @return +* TRUE if linear +*************************************************************************************************** +*/ +BOOL_32 AddrLib::IsLinear( + AddrTileMode tileMode) ///< [in] tile mode +{ + return m_modeFlags[tileMode].isLinear; +} + +/** +*************************************************************************************************** +* AddrLib::IsPrtNoRotationTileMode +* +* @brief +* Return TRUE if it is prt tile without rotation +* @note +* This function just used by CI +*************************************************************************************************** +*/ +BOOL_32 AddrLib::IsPrtNoRotationTileMode( + AddrTileMode tileMode) +{ + return m_modeFlags[tileMode].isPrtNoRotation; +} + +/** +*************************************************************************************************** +* AddrLib::IsPrtTileMode +* +* @brief +* Return TRUE if it is prt tile +* @note +* This function just used by CI +*************************************************************************************************** +*/ +BOOL_32 AddrLib::IsPrtTileMode( + AddrTileMode tileMode) +{ + return m_modeFlags[tileMode].isPrt; +} + +/** +*************************************************************************************************** +* AddrLib::Bits2Number +* +* @brief +* Cat a array of binary bit to a number +* +* @return +* The number combined with the array of bits +*************************************************************************************************** +*/ +UINT_32 AddrLib::Bits2Number( + UINT_32 bitNum, ///< [in] how many bits + ...) ///< [in] varaible bits value starting from MSB +{ + UINT_32 number = 0; + UINT_32 i; + va_list bits_ptr; + + va_start(bits_ptr, bitNum); + + for(i = 0; i < bitNum; i++) + { + number |= va_arg(bits_ptr, UINT_32); + number <<= 1; + } + + number>>=1; + + va_end(bits_ptr); + + return number; +} + +/** +*************************************************************************************************** +* AddrLib::ComputeMipLevel +* +* @brief +* Compute mipmap level width/height/slices +* @return +* N/A +*************************************************************************************************** +*/ +VOID AddrLib::ComputeMipLevel( + ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn ///< [in/out] Input structure + ) const +{ + if (AddrElemLib::IsBlockCompressed(pIn->format)) + { + if (pIn->mipLevel == 0) + { + // DXTn's level 0 must be multiple of 4 + // But there are exceptions: + // 1. Internal surface creation in hostblt/vsblt/etc... + // 2. Runtime doesn't reject ATI1/ATI2 whose width/height are not multiple of 4 + pIn->width = PowTwoAlign(pIn->width, 4); + pIn->height = PowTwoAlign(pIn->height, 4); + } + } + + HwlComputeMipLevel(pIn); +} + +/** +*************************************************************************************************** +* AddrLib::DegradeBaseLevel +* +* @brief +* Check if base level's tile mode can be degraded +* @return +* TRUE if degraded, also returns degraded tile mode (unchanged if not degraded) +*************************************************************************************************** +*/ +BOOL_32 AddrLib::DegradeBaseLevel( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] Input structure for surface info + AddrTileMode* pTileMode ///< [out] Degraded tile mode + ) const +{ + BOOL_32 degraded = FALSE; + AddrTileMode tileMode = pIn->tileMode; + UINT_32 thickness = ComputeSurfaceThickness(tileMode); + + if (m_configFlags.degradeBaseLevel) // This is a global setting + { + if (pIn->flags.degrade4Space && // Degradation per surface + pIn->mipLevel == 0 && + pIn->numSamples == 1 && + IsMacroTiled(tileMode)) + { + if (HwlDegradeBaseLevel(pIn)) + { + *pTileMode = thickness == 1 ? ADDR_TM_1D_TILED_THIN1 : ADDR_TM_1D_TILED_THICK; + degraded = TRUE; + } + else if (thickness > 1) + { + // As in the following HwlComputeSurfaceInfo, thick modes may be degraded to + // thinner modes, we should re-evaluate whether the corresponding thinner modes + // need to be degraded. If so, we choose 1D thick mode instead. + tileMode = DegradeLargeThickTile(pIn->tileMode, pIn->bpp); + if (tileMode != pIn->tileMode) + { + ADDR_COMPUTE_SURFACE_INFO_INPUT input = *pIn; + input.tileMode = tileMode; + if (HwlDegradeBaseLevel(&input)) + { + *pTileMode = ADDR_TM_1D_TILED_THICK; + degraded = TRUE; + } + } + } + } + } + + return degraded; +} + +/** +*************************************************************************************************** +* AddrLib::DegradeLargeThickTile +* +* @brief +* Check if the thickness needs to be reduced if a tile is too large +* @return +* The degraded tile mode (unchanged if not degraded) +*************************************************************************************************** +*/ +AddrTileMode AddrLib::DegradeLargeThickTile( + AddrTileMode tileMode, + UINT_32 bpp) const +{ + // Override tilemode + // When tile_width (8) * tile_height (8) * thickness * element_bytes is > row_size, + // it is better to just use THIN mode in this case + UINT_32 thickness = ComputeSurfaceThickness(tileMode); + + if (thickness > 1 && m_configFlags.allowLargeThickTile == 0) + { + UINT_32 tileSize = MicroTilePixels * thickness * (bpp >> 3); + + if (tileSize > m_rowSize) + { + switch (tileMode) + { + case ADDR_TM_2D_TILED_XTHICK: + if ((tileSize >> 1) <= m_rowSize) + { + tileMode = ADDR_TM_2D_TILED_THICK; + break; + } + // else fall through + case ADDR_TM_2D_TILED_THICK: + tileMode = ADDR_TM_2D_TILED_THIN1; + break; + + case ADDR_TM_3D_TILED_XTHICK: + if ((tileSize >> 1) <= m_rowSize) + { + tileMode = ADDR_TM_3D_TILED_THICK; + break; + } + // else fall through + case ADDR_TM_3D_TILED_THICK: + tileMode = ADDR_TM_3D_TILED_THIN1; + break; + + case ADDR_TM_PRT_TILED_THICK: + tileMode = ADDR_TM_PRT_TILED_THIN1; + break; + + case ADDR_TM_PRT_2D_TILED_THICK: + tileMode = ADDR_TM_PRT_2D_TILED_THIN1; + break; + + case ADDR_TM_PRT_3D_TILED_THICK: + tileMode = ADDR_TM_PRT_3D_TILED_THIN1; + break; + + default: + break; + } + } + } + + return tileMode; +} + +/** +*************************************************************************************************** +* AddrLib::PostComputeMipLevel +* @brief +* Compute MipLevel info (including level 0) after surface adjustment +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::PostComputeMipLevel( + ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in/out] Input structure + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] Output structure + ) const +{ + // Mipmap including level 0 must be pow2 padded since either SI hw expects so or it is + // required by CFX for Hw Compatibility between NI and SI. Otherwise it is only needed for + // mipLevel > 0. Any h/w has different requirement should implement its own virtual function + + if (pIn->flags.pow2Pad) + { + pIn->width = NextPow2(pIn->width); + pIn->height = NextPow2(pIn->height); + pIn->numSlices = NextPow2(pIn->numSlices); + } + else if (pIn->mipLevel > 0) + { + pIn->width = NextPow2(pIn->width); + pIn->height = NextPow2(pIn->height); + + if (!pIn->flags.cube) + { + pIn->numSlices = NextPow2(pIn->numSlices); + } + + // for cubemap, we keep its value at first + } + + return ADDR_OK; +} + +/** +*************************************************************************************************** +* AddrLib::HwlSetupTileCfg +* +* @brief +* Map tile index to tile setting. +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::HwlSetupTileCfg( + INT_32 index, ///< [in] Tile index + INT_32 macroModeIndex, ///< [in] Index in macro tile mode table(CI) + ADDR_TILEINFO* pInfo, ///< [out] Tile Info + AddrTileMode* pMode, ///< [out] Tile mode + AddrTileType* pType ///< [out] Tile type + ) const +{ + return ADDR_NOTSUPPORTED; +} + +/** +*************************************************************************************************** +* AddrLib::HwlGetPipes +* +* @brief +* Get number pipes +* @return +* num pipes +*************************************************************************************************** +*/ +UINT_32 AddrLib::HwlGetPipes( + const ADDR_TILEINFO* pTileInfo ///< [in] Tile info + ) const +{ + //pTileInfo can be NULL when asic is 6xx and 8xx. + return m_pipes; +} + +/** +*************************************************************************************************** +* AddrLib::ComputeQbStereoInfo +* +* @brief +* Get quad buffer stereo information +* @return +* TRUE if no error +*************************************************************************************************** +*/ +BOOL_32 AddrLib::ComputeQbStereoInfo( + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [in/out] updated pOut+pStereoInfo + ) const +{ + BOOL_32 success = FALSE; + + if (pOut->pStereoInfo) + { + ADDR_ASSERT(pOut->bpp >= 8); + ADDR_ASSERT((pOut->surfSize % pOut->baseAlign) == 0); + + // Save original height + pOut->pStereoInfo->eyeHeight = pOut->height; + + // Right offset + pOut->pStereoInfo->rightOffset = static_cast(pOut->surfSize); + + pOut->pStereoInfo->rightSwizzle = HwlComputeQbStereoRightSwizzle(pOut); + // Double height + pOut->height <<= 1; + pOut->pixelHeight <<= 1; + + // Double size + pOut->surfSize <<= 1; + + // Right start address meets the base align since it is guaranteed by AddrLib + + // 1D surface on SI may break this rule, but we can force it to meet by checking .qbStereo. + success = TRUE; + } + + return success; +} + +/////////////////////////////////////////////////////////////////////////////////////////////////// +// Element lib +/////////////////////////////////////////////////////////////////////////////////////////////////// + + +/** +*************************************************************************************************** +* AddrLib::Flt32ToColorPixel +* +* @brief +* Convert a FLT_32 value to a depth/stencil pixel value +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::Flt32ToDepthPixel( + const ELEM_FLT32TODEPTHPIXEL_INPUT* pIn, + ELEM_FLT32TODEPTHPIXEL_OUTPUT* pOut) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ELEM_FLT32TODEPTHPIXEL_INPUT)) || + (pOut->size != sizeof(ELEM_FLT32TODEPTHPIXEL_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + GetElemLib()->Flt32ToDepthPixel(pIn->format, + pIn->comps, + pOut->pPixel); + UINT_32 depthBase = 0; + UINT_32 stencilBase = 0; + UINT_32 depthBits = 0; + UINT_32 stencilBits = 0; + + switch (pIn->format) + { + case ADDR_DEPTH_16: + depthBits = 16; + break; + case ADDR_DEPTH_X8_24: + case ADDR_DEPTH_8_24: + case ADDR_DEPTH_X8_24_FLOAT: + case ADDR_DEPTH_8_24_FLOAT: + depthBase = 8; + depthBits = 24; + stencilBits = 8; + break; + case ADDR_DEPTH_32_FLOAT: + depthBits = 32; + break; + case ADDR_DEPTH_X24_8_32_FLOAT: + depthBase = 8; + depthBits = 32; + stencilBits = 8; + break; + default: + break; + } + + // Overwrite base since R800 has no "tileBase" + if (GetElemLib()->IsDepthStencilTilePlanar() == FALSE) + { + depthBase = 0; + stencilBase = 0; + } + + depthBase *= 64; + stencilBase *= 64; + + pOut->stencilBase = stencilBase; + pOut->depthBase = depthBase; + pOut->depthBits = depthBits; + pOut->stencilBits = stencilBits; + } + + return returnCode; +} + +/** +*************************************************************************************************** +* AddrLib::Flt32ToColorPixel +* +* @brief +* Convert a FLT_32 value to a red/green/blue/alpha pixel value +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::Flt32ToColorPixel( + const ELEM_FLT32TOCOLORPIXEL_INPUT* pIn, + ELEM_FLT32TOCOLORPIXEL_OUTPUT* pOut) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if ((pIn->size != sizeof(ELEM_FLT32TOCOLORPIXEL_INPUT)) || + (pOut->size != sizeof(ELEM_FLT32TOCOLORPIXEL_OUTPUT))) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + GetElemLib()->Flt32ToColorPixel(pIn->format, + pIn->surfNum, + pIn->surfSwap, + pIn->comps, + pOut->pPixel); + } + + return returnCode; +} + + +/** +*************************************************************************************************** +* AddrLib::GetExportNorm +* +* @brief +* Check one format can be EXPORT_NUM +* @return +* TRUE if EXPORT_NORM can be used +*************************************************************************************************** +*/ +BOOL_32 AddrLib::GetExportNorm( + const ELEM_GETEXPORTNORM_INPUT* pIn) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + BOOL_32 enabled = FALSE; + + if (GetFillSizeFieldsFlags() == TRUE) + { + if (pIn->size != sizeof(ELEM_GETEXPORTNORM_INPUT)) + { + returnCode = ADDR_PARAMSIZEMISMATCH; + } + } + + if (returnCode == ADDR_OK) + { + enabled = GetElemLib()->PixGetExportNorm(pIn->format, + pIn->num, + pIn->swap); + } + + return enabled; +} + +/** +*************************************************************************************************** +* AddrLib::ComputePrtInfo +* +* @brief +* Compute prt surface related info +* +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE AddrLib::ComputePrtInfo( + const ADDR_PRT_INFO_INPUT* pIn, + ADDR_PRT_INFO_OUTPUT* pOut) const +{ + ADDR_ASSERT(pOut != NULL); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + UINT_32 expandX = 1; + UINT_32 expandY = 1; + AddrElemMode elemMode; + + UINT_32 bpp = GetElemLib()->GetBitsPerPixel(pIn->format, + &elemMode, + &expandX, + &expandY); + + if (bpp <8 || bpp == 24 || bpp == 48 || bpp == 96 ) + { + returnCode = ADDR_INVALIDPARAMS; + } + + UINT_32 numFrags = pIn->numFrags; + ADDR_ASSERT(numFrags <= 8); + + UINT_32 tileWidth = 0; + UINT_32 tileHeight = 0; + if (returnCode == ADDR_OK) + { + // 3D texture without depth or 2d texture + if (pIn->baseMipDepth > 1 || pIn->baseMipHeight > 1) + { + if (bpp == 8) + { + tileWidth = 256; + tileHeight = 256; + } + else if (bpp == 16) + { + tileWidth = 256; + tileHeight = 128; + } + else if (bpp == 32) + { + tileWidth = 128; + tileHeight = 128; + } + else if (bpp == 64) + { + // assume it is BC1/4 + tileWidth = 512; + tileHeight = 256; + + if (elemMode == ADDR_UNCOMPRESSED) + { + tileWidth = 128; + tileHeight = 64; + } + } + else if (bpp == 128) + { + // assume it is BC2/3/5/6H/7 + tileWidth = 256; + tileHeight = 256; + + if (elemMode == ADDR_UNCOMPRESSED) + { + tileWidth = 64; + tileHeight = 64; + } + } + + if (numFrags == 2) + { + tileWidth = tileWidth / 2; + } + else if (numFrags == 4) + { + tileWidth = tileWidth / 2; + tileHeight = tileHeight / 2; + } + else if (numFrags == 8) + { + tileWidth = tileWidth / 4; + tileHeight = tileHeight / 2; + } + } + else // 1d + { + tileHeight = 1; + if (bpp == 8) + { + tileWidth = 65536; + } + else if (bpp == 16) + { + tileWidth = 32768; + } + else if (bpp == 32) + { + tileWidth = 16384; + } + else if (bpp == 64) + { + tileWidth = 8192; + } + else if (bpp == 128) + { + tileWidth = 4096; + } + } + } + + pOut->prtTileWidth = tileWidth; + pOut->prtTileHeight = tileHeight; + + return returnCode; +} diff -Nru mesa-12.0.6/src/amd/addrlib/core/addrlib.h mesa-17.0.7/src/amd/addrlib/core/addrlib.h --- mesa-12.0.6/src/amd/addrlib/core/addrlib.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/addrlib/core/addrlib.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,695 @@ +/* + * Copyright © 2014 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +*************************************************************************************************** +* @file addrlib.h +* @brief Contains the AddrLib base class definition. +*************************************************************************************************** +*/ + +#ifndef __ADDR_LIB_H__ +#define __ADDR_LIB_H__ + + +#include "addrinterface.h" +#include "addrobject.h" +#include "addrelemlib.h" + +#if BRAHMA_BUILD +#include "amdgpu_id.h" +#else +#include "atiid.h" +#endif + +#ifndef CIASICIDGFXENGINE_R600 +#define CIASICIDGFXENGINE_R600 0x00000006 +#endif + +#ifndef CIASICIDGFXENGINE_R800 +#define CIASICIDGFXENGINE_R800 0x00000008 +#endif + +#ifndef CIASICIDGFXENGINE_SOUTHERNISLAND +#define CIASICIDGFXENGINE_SOUTHERNISLAND 0x0000000A +#endif + +#ifndef CIASICIDGFXENGINE_SEAISLAND +#define CIASICIDGFXENGINE_SEAISLAND 0x0000000B +#endif +/** +*************************************************************************************************** +* @brief Neutral enums that define pipeinterleave +*************************************************************************************************** +*/ +enum AddrPipeInterleave +{ + ADDR_PIPEINTERLEAVE_256B = 256, + ADDR_PIPEINTERLEAVE_512B = 512, +}; + +/** +*************************************************************************************************** +* @brief Neutral enums that define DRAM row size +*************************************************************************************************** +*/ +enum AddrRowSize +{ + ADDR_ROWSIZE_1KB = 1024, + ADDR_ROWSIZE_2KB = 2048, + ADDR_ROWSIZE_4KB = 4096, + ADDR_ROWSIZE_8KB = 8192, +}; + +/** +*************************************************************************************************** +* @brief Neutral enums that define bank interleave +*************************************************************************************************** +*/ +enum AddrBankInterleave +{ + ADDR_BANKINTERLEAVE_1 = 1, + ADDR_BANKINTERLEAVE_2 = 2, + ADDR_BANKINTERLEAVE_4 = 4, + ADDR_BANKINTERLEAVE_8 = 8, +}; + +/** +*************************************************************************************************** +* @brief Neutral enums that define MGPU chip tile size +*************************************************************************************************** +*/ +enum AddrChipTileSize +{ + ADDR_CHIPTILESIZE_16 = 16, + ADDR_CHIPTILESIZE_32 = 32, + ADDR_CHIPTILESIZE_64 = 64, + ADDR_CHIPTILESIZE_128 = 128, +}; + +/** +*************************************************************************************************** +* @brief Neutral enums that define shader engine tile size +*************************************************************************************************** +*/ +enum AddrEngTileSize +{ + ADDR_SE_TILESIZE_16 = 16, + ADDR_SE_TILESIZE_32 = 32, +}; + +/** +*************************************************************************************************** +* @brief Neutral enums that define bank swap size +*************************************************************************************************** +*/ +enum AddrBankSwapSize +{ + ADDR_BANKSWAP_128B = 128, + ADDR_BANKSWAP_256B = 256, + ADDR_BANKSWAP_512B = 512, + ADDR_BANKSWAP_1KB = 1024, +}; + +/** +*************************************************************************************************** +* @brief Neutral enums that define bank swap size +*************************************************************************************************** +*/ +enum AddrSampleSplitSize +{ + ADDR_SAMPLESPLIT_1KB = 1024, + ADDR_SAMPLESPLIT_2KB = 2048, + ADDR_SAMPLESPLIT_4KB = 4096, + ADDR_SAMPLESPLIT_8KB = 8192, +}; + +/** +*************************************************************************************************** +* @brief Flags for AddrTileMode +*************************************************************************************************** +*/ +struct AddrTileModeFlags +{ + UINT_32 thickness : 4; + UINT_32 isLinear : 1; + UINT_32 isMicro : 1; + UINT_32 isMacro : 1; + UINT_32 isMacro3d : 1; + UINT_32 isPrt : 1; + UINT_32 isPrtNoRotation : 1; + UINT_32 isBankSwapped : 1; +}; + +/** +*************************************************************************************************** +* @brief This class contains asic independent address lib functionalities +*************************************************************************************************** +*/ +class AddrLib : public AddrObject +{ +public: + virtual ~AddrLib(); + + static ADDR_E_RETURNCODE Create( + const ADDR_CREATE_INPUT* pCreateInfo, ADDR_CREATE_OUTPUT* pCreateOut); + + /// Pair of Create + VOID Destroy() + { + delete this; + } + + static AddrLib* GetAddrLib( + ADDR_HANDLE hLib); + + /// Returns AddrLib version (from compiled binary instead include file) + UINT_32 GetVersion() + { + return m_version; + } + + /// Returns asic chip family name defined by AddrLib + AddrChipFamily GetAddrChipFamily() + { + return m_chipFamily; + } + + /// Returns tileIndex support + BOOL_32 UseTileIndex(INT_32 index) const + { + return m_configFlags.useTileIndex && (index != TileIndexInvalid); + } + + /// Returns combined swizzle support + BOOL_32 UseCombinedSwizzle() const + { + return m_configFlags.useCombinedSwizzle; + } + + // + // Interface stubs + // + ADDR_E_RETURNCODE ComputeSurfaceInfo( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoord( + const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeSurfaceCoordFromAddr( + const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeSliceTileSwizzle( + const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, + ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ExtractBankPipeSwizzle( + const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, + ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE CombineBankPipeSwizzle( + const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT* pIn, + ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeBaseSwizzle( + const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, + ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeFmaskInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut); + + ADDR_E_RETURNCODE ComputeFmaskAddrFromCoord( + const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeFmaskCoordFromAddr( + const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ConvertTileInfoToHW( + const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, + ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ConvertTileIndex( + const ADDR_CONVERT_TILEINDEX_INPUT* pIn, + ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ConvertTileIndex1( + const ADDR_CONVERT_TILEINDEX1_INPUT* pIn, + ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE GetTileIndex( + const ADDR_GET_TILEINDEX_INPUT* pIn, + ADDR_GET_TILEINDEX_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeHtileInfo( + const ADDR_COMPUTE_HTILE_INFO_INPUT* pIn, + ADDR_COMPUTE_HTILE_INFO_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeCmaskInfo( + const ADDR_COMPUTE_CMASK_INFO_INPUT* pIn, + ADDR_COMPUTE_CMASK_INFO_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeDccInfo( + const ADDR_COMPUTE_DCCINFO_INPUT* pIn, + ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeHtileAddrFromCoord( + const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeCmaskAddrFromCoord( + const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeHtileCoordFromAddr( + const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputeCmaskCoordFromAddr( + const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE ComputePrtInfo( + const ADDR_PRT_INFO_INPUT* pIn, + ADDR_PRT_INFO_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE Flt32ToDepthPixel( + const ELEM_FLT32TODEPTHPIXEL_INPUT* pIn, + ELEM_FLT32TODEPTHPIXEL_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE Flt32ToColorPixel( + const ELEM_FLT32TOCOLORPIXEL_INPUT* pIn, + ELEM_FLT32TOCOLORPIXEL_OUTPUT* pOut) const; + + BOOL_32 GetExportNorm( + const ELEM_GETEXPORTNORM_INPUT* pIn) const; + +protected: + AddrLib(); // Constructor is protected + AddrLib(const AddrClient* pClient); + + /// Pure Virtual function for Hwl computing surface info + virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0; + + /// Pure Virtual function for Hwl computing surface address from coord + virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoord( + const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const = 0; + + /// Pure Virtual function for Hwl computing surface coord from address + virtual ADDR_E_RETURNCODE HwlComputeSurfaceCoordFromAddr( + const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const = 0; + + /// Pure Virtual function for Hwl computing surface tile swizzle + virtual ADDR_E_RETURNCODE HwlComputeSliceTileSwizzle( + const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, + ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) const = 0; + + /// Pure Virtual function for Hwl extracting bank/pipe swizzle from base256b + virtual ADDR_E_RETURNCODE HwlExtractBankPipeSwizzle( + const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, + ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) const = 0; + + /// Pure Virtual function for Hwl combining bank/pipe swizzle + virtual ADDR_E_RETURNCODE HwlCombineBankPipeSwizzle( + UINT_32 bankSwizzle, UINT_32 pipeSwizzle, ADDR_TILEINFO* pTileInfo, + UINT_64 baseAddr, UINT_32* pTileSwizzle) const = 0; + + /// Pure Virtual function for Hwl computing base swizzle + virtual ADDR_E_RETURNCODE HwlComputeBaseSwizzle( + const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, + ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const = 0; + + /// Pure Virtual function for Hwl computing HTILE base align + virtual UINT_32 HwlComputeHtileBaseAlign( + BOOL_32 isTcCompatible, BOOL_32 isLinear, ADDR_TILEINFO* pTileInfo) const = 0; + + /// Pure Virtual function for Hwl computing HTILE bpp + virtual UINT_32 HwlComputeHtileBpp( + BOOL_32 isWidth8, BOOL_32 isHeight8) const = 0; + + /// Pure Virtual function for Hwl computing HTILE bytes + virtual UINT_64 HwlComputeHtileBytes( + UINT_32 pitch, UINT_32 height, UINT_32 bpp, + BOOL_32 isLinear, UINT_32 numSlices, UINT_64* pSliceBytes, UINT_32 baseAlign) const = 0; + + /// Pure Virtual function for Hwl computing FMASK info + virtual ADDR_E_RETURNCODE HwlComputeFmaskInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut) = 0; + + /// Pure Virtual function for Hwl FMASK address from coord + virtual ADDR_E_RETURNCODE HwlComputeFmaskAddrFromCoord( + const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const = 0; + + /// Pure Virtual function for Hwl FMASK coord from address + virtual ADDR_E_RETURNCODE HwlComputeFmaskCoordFromAddr( + const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const = 0; + + /// Pure Virtual function for Hwl convert tile info from real value to HW value + virtual ADDR_E_RETURNCODE HwlConvertTileInfoToHW( + const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, + ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const = 0; + + /// Pure Virtual function for Hwl compute mipmap info + virtual BOOL_32 HwlComputeMipLevel( + ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const = 0; + + /// Pure Virtual function for Hwl compute max cmask blockMax value + virtual BOOL_32 HwlGetMaxCmaskBlockMax() const = 0; + + /// Pure Virtual function for Hwl compute fmask bits + virtual UINT_32 HwlComputeFmaskBits( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, + UINT_32* pNumSamples) const = 0; + + /// Virtual function to get index (not pure then no need to implement this in all hwls + virtual ADDR_E_RETURNCODE HwlGetTileIndex( + const ADDR_GET_TILEINDEX_INPUT* pIn, + ADDR_GET_TILEINDEX_OUTPUT* pOut) const + { + return ADDR_NOTSUPPORTED; + } + + /// Virtual function for Hwl to compute Dcc info + virtual ADDR_E_RETURNCODE HwlComputeDccInfo( + const ADDR_COMPUTE_DCCINFO_INPUT* pIn, + ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const + { + return ADDR_NOTSUPPORTED; + } + + /// Virtual function to get cmask address for tc compatible cmask + virtual ADDR_E_RETURNCODE HwlComputeCmaskAddrFromCoord( + const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const + { + return ADDR_NOTSUPPORTED; + } + // Compute attributes + + // HTILE + UINT_32 ComputeHtileInfo( + ADDR_HTILE_FLAGS flags, + UINT_32 pitchIn, UINT_32 heightIn, UINT_32 numSlices, + BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8, + ADDR_TILEINFO* pTileInfo, + UINT_32* pPitchOut, UINT_32* pHeightOut, UINT_64* pHtileBytes, + UINT_32* pMacroWidth = NULL, UINT_32* pMacroHeight = NULL, + UINT_64* pSliceSize = NULL, UINT_32* pBaseAlign = NULL) const; + + // CMASK + ADDR_E_RETURNCODE ComputeCmaskInfo( + ADDR_CMASK_FLAGS flags, + UINT_32 pitchIn, UINT_32 heightIn, UINT_32 numSlices, BOOL_32 isLinear, + ADDR_TILEINFO* pTileInfo, UINT_32* pPitchOut, UINT_32* pHeightOut, UINT_64* pCmaskBytes, + UINT_32* pMacroWidth, UINT_32* pMacroHeight, UINT_64* pSliceSize = NULL, + UINT_32* pBaseAlign = NULL, UINT_32* pBlockMax = NULL) const; + + virtual VOID HwlComputeTileDataWidthAndHeightLinear( + UINT_32* pMacroWidth, UINT_32* pMacroHeight, + UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const; + + // CMASK & HTILE addressing + virtual UINT_64 HwlComputeXmaskAddrFromCoord( + UINT_32 pitch, UINT_32 height, UINT_32 x, UINT_32 y, UINT_32 slice, + UINT_32 numSlices, UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, + BOOL_32 isHeight8, ADDR_TILEINFO* pTileInfo, + UINT_32* bitPosition) const; + + virtual VOID HwlComputeXmaskCoordFromAddr( + UINT_64 addr, UINT_32 bitPosition, UINT_32 pitch, UINT_32 height, UINT_32 numSlices, + UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8, + ADDR_TILEINFO* pTileInfo, UINT_32* pX, UINT_32* pY, UINT_32* pSlice) const; + + // Surface mipmap + VOID ComputeMipLevel( + ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const; + + /// Pure Virtual function for Hwl checking degrade for base level + virtual BOOL_32 HwlDegradeBaseLevel( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const = 0; + + virtual BOOL_32 HwlOverrideTileMode( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + AddrTileMode* pTileMode, + AddrTileType* pTileType) const + { + // not supported in hwl layer, FALSE for not-overrided + return FALSE; + } + + AddrTileMode DegradeLargeThickTile(AddrTileMode tileMode, UINT_32 bpp) const; + + VOID PadDimensions( + AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, + UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 padDims, UINT_32 mipLevel, + UINT_32* pPitch, UINT_32 pitchAlign, UINT_32* pHeight, UINT_32 heightAlign, + UINT_32* pSlices, UINT_32 sliceAlign) const; + + virtual VOID HwlPadDimensions( + AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, + UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 padDims, UINT_32 mipLevel, + UINT_32* pPitch, UINT_32 pitchAlign, UINT_32* pHeight, UINT_32 heightAlign, + UINT_32* pSlices, UINT_32 sliceAlign) const + { + } + + // + // Addressing shared for linear/1D tiling + // + UINT_64 ComputeSurfaceAddrFromCoordLinear( + UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample, + UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSlices, + UINT_32* pBitPosition) const; + + VOID ComputeSurfaceCoordFromAddrLinear( + UINT_64 addr, UINT_32 bitPosition, UINT_32 bpp, + UINT_32 pitch, UINT_32 height, UINT_32 numSlices, + UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample) const; + + VOID ComputeSurfaceCoordFromAddrMicroTiled( + UINT_64 addr, UINT_32 bitPosition, + UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, + AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits, + UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample, + AddrTileType microTileType, BOOL_32 isDepthSampleOrder) const; + + UINT_32 ComputePixelIndexWithinMicroTile( + UINT_32 x, UINT_32 y, UINT_32 z, + UINT_32 bpp, AddrTileMode tileMode, AddrTileType microTileType) const; + + /// Pure Virtual function for Hwl computing coord from offset inside micro tile + virtual VOID HwlComputePixelCoordFromOffset( + UINT_32 offset, UINT_32 bpp, UINT_32 numSamples, + AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits, + UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample, + AddrTileType microTileType, BOOL_32 isDepthSampleOrder) const = 0; + + // + // Addressing shared by all + // + virtual UINT_32 HwlGetPipes( + const ADDR_TILEINFO* pTileInfo) const; + + UINT_32 ComputePipeFromAddr( + UINT_64 addr, UINT_32 numPipes) const; + + /// Pure Virtual function for Hwl computing pipe from coord + virtual UINT_32 ComputePipeFromCoord( + UINT_32 x, UINT_32 y, UINT_32 slice, AddrTileMode tileMode, + UINT_32 pipeSwizzle, BOOL_32 flags, ADDR_TILEINFO* pTileInfo) const = 0; + + /// Pure Virtual function for Hwl computing coord Y for 8 pipe cmask/htile + virtual UINT_32 HwlComputeXmaskCoordYFrom8Pipe( + UINT_32 pipe, UINT_32 x) const = 0; + + // + // Initialization + // + /// Pure Virtual function for Hwl computing internal global parameters from h/w registers + virtual BOOL_32 HwlInitGlobalParams( + const ADDR_CREATE_INPUT* pCreateIn) = 0; + + /// Pure Virtual function for Hwl converting chip family + virtual AddrChipFamily HwlConvertChipFamily(UINT_32 uChipFamily, UINT_32 uChipRevision) = 0; + + // + // Misc helper + // + static const AddrTileModeFlags m_modeFlags[ADDR_TM_COUNT]; + + static UINT_32 ComputeSurfaceThickness( + AddrTileMode tileMode); + + // Checking tile mode + static BOOL_32 IsMacroTiled(AddrTileMode tileMode); + static BOOL_32 IsMacro3dTiled(AddrTileMode tileMode); + static BOOL_32 IsLinear(AddrTileMode tileMode); + static BOOL_32 IsMicroTiled(AddrTileMode tileMode); + static BOOL_32 IsPrtTileMode(AddrTileMode tileMode); + static BOOL_32 IsPrtNoRotationTileMode(AddrTileMode tileMode); + + static UINT_32 Bits2Number(UINT_32 bitNum,...); + + static UINT_32 GetNumFragments(UINT_32 numSamples, UINT_32 numFrags) + { + return numFrags != 0 ? numFrags : Max(1u, numSamples); + } + + /// Returns pointer of AddrElemLib + AddrElemLib* GetElemLib() const + { + return m_pElemLib; + } + + /// Return TRUE if tile info is needed + BOOL_32 UseTileInfo() const + { + return !m_configFlags.ignoreTileInfo; + } + + /// Returns fillSizeFields flag + UINT_32 GetFillSizeFieldsFlags() const + { + return m_configFlags.fillSizeFields; + } + + /// Adjusts pitch alignment for flipping surface + VOID AdjustPitchAlignment( + ADDR_SURFACE_FLAGS flags, UINT_32* pPitchAlign) const; + + /// Overwrite tile config according to tile index + virtual ADDR_E_RETURNCODE HwlSetupTileCfg( + INT_32 index, INT_32 macroModeIndex, + ADDR_TILEINFO* pInfo, AddrTileMode* mode = NULL, AddrTileType* type = NULL) const; + + /// Overwrite macro tile config according to tile index + virtual INT_32 HwlComputeMacroModeIndex( + INT_32 index, ADDR_SURFACE_FLAGS flags, UINT_32 bpp, UINT_32 numSamples, + ADDR_TILEINFO* pTileInfo, AddrTileMode *pTileMode = NULL, AddrTileType *pTileType = NULL + ) const + { + return TileIndexNoMacroIndex; + } + + /// Pre-handler of 3x pitch (96 bit) adjustment + virtual UINT_32 HwlPreHandleBaseLvl3xPitch( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const; + /// Post-handler of 3x pitch adjustment + virtual UINT_32 HwlPostHandleBaseLvl3xPitch( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const; + /// Check miplevel after surface adjustment + ADDR_E_RETURNCODE PostComputeMipLevel( + ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + /// Quad buffer stereo support, has its implementation in ind. layer + virtual BOOL_32 ComputeQbStereoInfo( + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + /// Pure virutual function to compute stereo bank swizzle for right eye + virtual UINT_32 HwlComputeQbStereoRightSwizzle( + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0; + +private: + // Disallow the copy constructor + AddrLib(const AddrLib& a); + + // Disallow the assignment operator + AddrLib& operator=(const AddrLib& a); + + VOID SetAddrChipFamily(UINT_32 uChipFamily, UINT_32 uChipRevision); + + UINT_32 ComputeCmaskBaseAlign( + ADDR_CMASK_FLAGS flags, ADDR_TILEINFO* pTileInfo) const; + + UINT_64 ComputeCmaskBytes( + UINT_32 pitch, UINT_32 height, UINT_32 numSlices) const; + + // + // CMASK/HTILE shared methods + // + VOID ComputeTileDataWidthAndHeight( + UINT_32 bpp, UINT_32 cacheBits, ADDR_TILEINFO* pTileInfo, + UINT_32* pMacroWidth, UINT_32* pMacroHeight) const; + + UINT_32 ComputeXmaskCoordYFromPipe( + UINT_32 pipe, UINT_32 x) const; + + VOID SetMinPitchAlignPixels(UINT_32 minPitchAlignPixels); + + BOOL_32 DegradeBaseLevel( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, AddrTileMode* pTileMode) const; + +protected: + AddrLibClass m_class; ///< Store class type (HWL type) + + AddrChipFamily m_chipFamily; ///< Chip family translated from the one in atiid.h + + UINT_32 m_chipRevision; ///< Revision id from xxx_id.h + + UINT_32 m_version; ///< Current version + + // + // Global parameters + // + ADDR_CONFIG_FLAGS m_configFlags; ///< Global configuration flags. Note this is setup by + /// AddrLib instead of Client except forceLinearAligned + + UINT_32 m_pipes; ///< Number of pipes + UINT_32 m_banks; ///< Number of banks + /// For r800 this is MC_ARB_RAMCFG.NOOFBANK + /// Keep it here to do default parameter calculation + + UINT_32 m_pipeInterleaveBytes; + ///< Specifies the size of contiguous address space + /// within each tiling pipe when making linear + /// accesses. (Formerly Group Size) + + UINT_32 m_rowSize; ///< DRAM row size, in bytes + + UINT_32 m_minPitchAlignPixels; ///< Minimum pitch alignment in pixels + UINT_32 m_maxSamples; ///< Max numSamples +private: + AddrElemLib* m_pElemLib; ///< Element Lib pointer +}; + +AddrLib* AddrSIHwlInit (const AddrClient* pClient); +AddrLib* AddrCIHwlInit (const AddrClient* pClient); + +#endif + diff -Nru mesa-12.0.6/src/amd/addrlib/core/addrobject.cpp mesa-17.0.7/src/amd/addrlib/core/addrobject.cpp --- mesa-12.0.6/src/amd/addrlib/core/addrobject.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/addrlib/core/addrobject.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,246 @@ +/* + * Copyright © 2014 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +*************************************************************************************************** +* @file addrobject.cpp +* @brief Contains the AddrObject base class implementation. +*************************************************************************************************** +*/ + +#include "addrinterface.h" +#include "addrobject.h" + +/** +*************************************************************************************************** +* AddrObject::AddrObject +* +* @brief +* Constructor for the AddrObject class. +*************************************************************************************************** +*/ +AddrObject::AddrObject() +{ + m_client.handle = NULL; + m_client.callbacks.allocSysMem = NULL; + m_client.callbacks.freeSysMem = NULL; + m_client.callbacks.debugPrint = NULL; +} + +/** +*************************************************************************************************** +* AddrObject::AddrObject +* +* @brief +* Constructor for the AddrObject class. +*************************************************************************************************** +*/ +AddrObject::AddrObject(const AddrClient* pClient) +{ + m_client = *pClient; +} + +/** +*************************************************************************************************** +* AddrObject::~AddrObject +* +* @brief +* Destructor for the AddrObject class. +*************************************************************************************************** +*/ +AddrObject::~AddrObject() +{ +} + +/** +*************************************************************************************************** +* AddrObject::ClientAlloc +* +* @brief +* Calls instanced allocSysMem inside AddrClient +*************************************************************************************************** +*/ +VOID* AddrObject::ClientAlloc( + size_t objSize, ///< [in] Size to allocate + const AddrClient* pClient) ///< [in] Client pointer +{ + VOID* pObjMem = NULL; + + if (pClient->callbacks.allocSysMem != NULL) + { + ADDR_ALLOCSYSMEM_INPUT allocInput = {0}; + + allocInput.size = sizeof(ADDR_ALLOCSYSMEM_INPUT); + allocInput.flags.value = 0; + allocInput.sizeInBytes = static_cast(objSize); + allocInput.hClient = pClient->handle; + + pObjMem = pClient->callbacks.allocSysMem(&allocInput); + } + + return pObjMem; +} + +/** +*************************************************************************************************** +* AddrObject::AddrMalloc +* +* @brief +* A wrapper of ClientAlloc +*************************************************************************************************** +*/ +VOID* AddrObject::AddrMalloc( + size_t objSize) const ///< [in] Size to allocate +{ + return ClientAlloc(objSize, &m_client); +} + +/** +*************************************************************************************************** +* AddrObject::ClientFree +* +* @brief +* Calls freeSysMem inside AddrClient +*************************************************************************************************** +*/ +VOID AddrObject::ClientFree( + VOID* pObjMem, ///< [in] User virtual address to free. + const AddrClient* pClient) ///< [in] Client pointer +{ + if (pClient->callbacks.freeSysMem != NULL) + { + if (pObjMem != NULL) + { + ADDR_FREESYSMEM_INPUT freeInput = {0}; + + freeInput.size = sizeof(ADDR_FREESYSMEM_INPUT); + freeInput.hClient = pClient->handle; + freeInput.pVirtAddr = pObjMem; + + pClient->callbacks.freeSysMem(&freeInput); + } + } +} + +/** +*************************************************************************************************** +* AddrObject::AddrFree +* +* @brief +* A wrapper of ClientFree +*************************************************************************************************** +*/ +VOID AddrObject::AddrFree( + VOID* pObjMem) const ///< [in] User virtual address to free. +{ + ClientFree(pObjMem, &m_client); +} + +/** +*************************************************************************************************** +* AddrObject::operator new +* +* @brief +* Allocates memory needed for AddrObject object. (with ADDR_CLIENT_HANDLE) +* +* @return +* Returns NULL if unsuccessful. +*************************************************************************************************** +*/ +VOID* AddrObject::operator new( + size_t objSize, ///< [in] Size to allocate + const AddrClient* pClient) ///< [in] Client pointer +{ + return ClientAlloc(objSize, pClient); +} + + +/** +*************************************************************************************************** +* AddrObject::operator delete +* +* @brief +* Frees AddrObject object memory. +*************************************************************************************************** +*/ +VOID AddrObject::operator delete( + VOID* pObjMem, ///< [in] User virtual address to free. + const AddrClient* pClient) ///< [in] Client handle +{ + ClientFree(pObjMem, pClient); +} + +/** +*************************************************************************************************** +* AddrObject::operator delete +* +* @brief +* Frees AddrObject object memory. +*************************************************************************************************** +*/ +VOID AddrObject::operator delete( + VOID* pObjMem) ///< [in] User virtual address to free. +{ + AddrObject* pObj = static_cast(pObjMem); + ClientFree(pObjMem, &pObj->m_client); +} + +/** +*************************************************************************************************** +* AddrObject::DebugPrint +* +* @brief +* Print debug message +* +* @return +* N/A +*************************************************************************************************** +*/ +VOID AddrObject::DebugPrint( + const CHAR* pDebugString, ///< [in] Debug string + ...) const +{ +#if DEBUG + if (m_client.callbacks.debugPrint != NULL) + { + va_list ap; + + va_start(ap, pDebugString); + + ADDR_DEBUGPRINT_INPUT debugPrintInput = {0}; + + debugPrintInput.size = sizeof(ADDR_DEBUGPRINT_INPUT); + debugPrintInput.pDebugString = const_cast(pDebugString); + debugPrintInput.hClient = m_client.handle; + va_copy(debugPrintInput.ap, ap); + + m_client.callbacks.debugPrint(&debugPrintInput); + + va_end(ap); + } +#endif +} + diff -Nru mesa-12.0.6/src/amd/addrlib/core/addrobject.h mesa-17.0.7/src/amd/addrlib/core/addrobject.h --- mesa-12.0.6/src/amd/addrlib/core/addrobject.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/addrlib/core/addrobject.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,89 @@ +/* + * Copyright © 2014 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +*************************************************************************************************** +* @file addrobject.h +* @brief Contains the AddrObject base class definition. +*************************************************************************************************** +*/ + +#ifndef __ADDR_OBJECT_H__ +#define __ADDR_OBJECT_H__ + +#include "addrtypes.h" +#include "addrcommon.h" + +/** +*************************************************************************************************** +* @brief This structure contains client specific data +*************************************************************************************************** +*/ +struct AddrClient +{ + ADDR_CLIENT_HANDLE handle; + ADDR_CALLBACKS callbacks; +}; +/** +*************************************************************************************************** +* @brief This class is the base class for all ADDR class objects. +*************************************************************************************************** +*/ +class AddrObject +{ +public: + AddrObject(); + AddrObject(const AddrClient* pClient); + virtual ~AddrObject(); + + VOID* operator new(size_t size, const AddrClient* pClient); + VOID operator delete(VOID* pObj, const AddrClient* pClient); + VOID operator delete(VOID* pObj); + VOID* AddrMalloc(size_t size) const; + VOID AddrFree(VOID* pObj) const; + + VOID DebugPrint( + const CHAR* pDebugString, + ...) const; + + const AddrClient* GetClient() const {return &m_client;} + +protected: + AddrClient m_client; + +private: + static VOID* ClientAlloc(size_t size, const AddrClient* pClient); + static VOID ClientFree(VOID* pObj, const AddrClient* pClient); + + // disallow the copy constructor + AddrObject(const AddrObject& a); + + // disallow the assignment operator + AddrObject& operator=(const AddrObject& a); +}; + +#endif + diff -Nru mesa-12.0.6/src/amd/addrlib/inc/chip/r800/si_gb_reg.h mesa-17.0.7/src/amd/addrlib/inc/chip/r800/si_gb_reg.h --- mesa-12.0.6/src/amd/addrlib/inc/chip/r800/si_gb_reg.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/addrlib/inc/chip/r800/si_gb_reg.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,155 @@ +#if !defined (__SI_GB_REG_H__) +#define __SI_GB_REG_H__ + +/* + * Copyright © 2014 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +// +// Make sure the necessary endian defines are there. +// +#if defined(LITTLEENDIAN_CPU) +#elif defined(BIGENDIAN_CPU) +#else +#error "BIGENDIAN_CPU or LITTLEENDIAN_CPU must be defined" +#endif + +/* + * GB_ADDR_CONFIG struct + */ + +#if defined(LITTLEENDIAN_CPU) + + typedef struct _GB_ADDR_CONFIG_T { + unsigned int num_pipes : 3; + unsigned int : 1; + unsigned int pipe_interleave_size : 3; + unsigned int : 1; + unsigned int bank_interleave_size : 3; + unsigned int : 1; + unsigned int num_shader_engines : 2; + unsigned int : 2; + unsigned int shader_engine_tile_size : 3; + unsigned int : 1; + unsigned int num_gpus : 3; + unsigned int : 1; + unsigned int multi_gpu_tile_size : 2; + unsigned int : 2; + unsigned int row_size : 2; + unsigned int num_lower_pipes : 1; + unsigned int : 1; + } GB_ADDR_CONFIG_T; + +#elif defined(BIGENDIAN_CPU) + + typedef struct _GB_ADDR_CONFIG_T { + unsigned int : 1; + unsigned int num_lower_pipes : 1; + unsigned int row_size : 2; + unsigned int : 2; + unsigned int multi_gpu_tile_size : 2; + unsigned int : 1; + unsigned int num_gpus : 3; + unsigned int : 1; + unsigned int shader_engine_tile_size : 3; + unsigned int : 2; + unsigned int num_shader_engines : 2; + unsigned int : 1; + unsigned int bank_interleave_size : 3; + unsigned int : 1; + unsigned int pipe_interleave_size : 3; + unsigned int : 1; + unsigned int num_pipes : 3; + } GB_ADDR_CONFIG_T; + +#endif + +typedef union { + unsigned int val : 32; + GB_ADDR_CONFIG_T f; +} GB_ADDR_CONFIG; + +#if defined(LITTLEENDIAN_CPU) + + typedef struct _GB_TILE_MODE_T { + unsigned int micro_tile_mode : 2; + unsigned int array_mode : 4; + unsigned int pipe_config : 5; + unsigned int tile_split : 3; + unsigned int bank_width : 2; + unsigned int bank_height : 2; + unsigned int macro_tile_aspect : 2; + unsigned int num_banks : 2; + unsigned int micro_tile_mode_new : 3; + unsigned int sample_split : 2; + unsigned int : 5; + } GB_TILE_MODE_T; + + typedef struct _GB_MACROTILE_MODE_T { + unsigned int bank_width : 2; + unsigned int bank_height : 2; + unsigned int macro_tile_aspect : 2; + unsigned int num_banks : 2; + unsigned int : 24; + } GB_MACROTILE_MODE_T; + +#elif defined(BIGENDIAN_CPU) + + typedef struct _GB_TILE_MODE_T { + unsigned int : 5; + unsigned int sample_split : 2; + unsigned int micro_tile_mode_new : 3; + unsigned int num_banks : 2; + unsigned int macro_tile_aspect : 2; + unsigned int bank_height : 2; + unsigned int bank_width : 2; + unsigned int tile_split : 3; + unsigned int pipe_config : 5; + unsigned int array_mode : 4; + unsigned int micro_tile_mode : 2; + } GB_TILE_MODE_T; + + typedef struct _GB_MACROTILE_MODE_T { + unsigned int : 24; + unsigned int num_banks : 2; + unsigned int macro_tile_aspect : 2; + unsigned int bank_height : 2; + unsigned int bank_width : 2; + } GB_MACROTILE_MODE_T; + +#endif + +typedef union { + unsigned int val : 32; + GB_TILE_MODE_T f; +} GB_TILE_MODE; + +typedef union { + unsigned int val : 32; + GB_MACROTILE_MODE_T f; +} GB_MACROTILE_MODE; + +#endif + diff -Nru mesa-12.0.6/src/amd/addrlib/inc/lnx_common_defs.h mesa-17.0.7/src/amd/addrlib/inc/lnx_common_defs.h --- mesa-12.0.6/src/amd/addrlib/inc/lnx_common_defs.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/addrlib/inc/lnx_common_defs.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,129 @@ +/* + * Copyright © 2014 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ +#ifndef _lnx_common_defs_h_ +#define _lnx_common_defs_h_ + +#if DBG +#include // We do not have any choice: need variable + // number of parameters support for debug + // build. +#endif // #if DBG + +// +// -------------- External functions from Linux kernel driver ---------------- +// +// Note: The definitions/declararions below must match the original ones. + +#ifdef __cplusplus +extern "C" { +#endif + +typedef unsigned long __ke_size_t; // as it is defined in firegl_public.h +typedef int __kernel_ptrdiff_t; // as it is defined in posix_types.h + + +#if !defined(ATI_API_CALL) +#define ATI_API_CALL __attribute__((regparm(0))) +#endif + +extern void * ATI_API_CALL __ke_memset(void* s, int c, __ke_size_t count); +extern void * ATI_API_CALL __ke_memcpy(void* d, const void* s, __ke_size_t count); +extern ATI_API_CALL __ke_size_t __ke_strlen(const char *s); +extern char* ATI_API_CALL __ke_strcpy(char* d, const char* s); +extern char* ATI_API_CALL __ke_strncpy(char* d, const char* s, __ke_size_t count); +extern void __ke_printk(const char* fmt, ...); + +extern int ATI_API_CALL __ke_snprintf(char* buf, __ke_size_t size, const char* fmt, ...); +extern int ATI_API_CALL KCL_CopyFromUserSpace(void* to, const void* from, __ke_size_t size); +extern int ATI_API_CALL KCL_CopyToUserSpace(void* to, const void* from, __ke_size_t size); +#define __ke_copy_from_user KCL_CopyFromUserSpace +#define __ke_copy_to_user KCL_CopyToUserSpace +extern int ATI_API_CALL __ke_verify_area(int type, const void * addr, unsigned long size); + +extern unsigned long ATI_API_CALL KAS_GetTickCounter(void); +extern unsigned long ATI_API_CALL KAS_GetTicksPerSecond(void); + + +#if DBG +extern int ATI_API_CALL __ke_vsnprintf(char *buf, __ke_size_t size, const char *fmt, va_list ap); +#define vsnprintf(_dst, _size, _fmt, varg) __ke_snprintf(_dst, _size, _fmt, varg) +#endif // #if DBG + + +// Note: This function is not defined in firegl_public.h. +void firegl_hardwareHangRecovery(void); + +#ifdef __cplusplus +} +#endif + +// +// -------------------------- C/C++ standard typedefs ---------------------------- +// +#ifdef __SIZE_TYPE__ +typedef __SIZE_TYPE__ size_t; +#else // #ifdef __SIZE_TYPE__ +typedef unsigned int size_t; +#endif // #ifdef __SIZE_TYPE__ + +#ifdef __PTRDIFF_TYPE__ +typedef __PTRDIFF_TYPE__ ptrdiff_t; +#else // #ifdef __PTRDIFF_TYPE__ +typedef int ptrdiff_t; +#endif // #ifdef __PTRDIFF_TYPE__ + +#ifndef NULL +#ifdef __cplusplus +#define NULL __null +#else +#define NULL ((void *)0) +#endif +#endif + + +// +// ------------------------- C/C++ standard macros --------------------------- +// + +#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER) // as it is defined in stddef.h +#define CHAR_BIT 8 // as it is defined in limits.h + +// +// --------------------------------- C RTL ----------------------------------- +// + +#define memset(_p, _v, _n) __ke_memset(_p, _v, _n) +#define memcpy(_d, _s, _n) __ke_memcpy(_d, _s, _n) +#define strlen(_s) __ke_strlen(_s) +#define strcpy(_d, _s) __ke_strcpy(_d, _s) +#define strncpy(_d, _s, _n) __ke_strncpy(_d, _s, _n) +// Note: C99 supports macros with variable number of arguments. GCC also supports this C99 feature as +// C++ extension. +#define snprintf(_dst, _size, _fmt, arg...) __ke_snprintf(_dst, _size, _fmt, ##arg) + + +#endif // #ifdef _lnx_common_defs_h_ + diff -Nru mesa-12.0.6/src/amd/addrlib/r800/chip/si_ci_vi_merged_enum.h mesa-17.0.7/src/amd/addrlib/r800/chip/si_ci_vi_merged_enum.h --- mesa-12.0.6/src/amd/addrlib/r800/chip/si_ci_vi_merged_enum.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/addrlib/r800/chip/si_ci_vi_merged_enum.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,40 @@ +/* + * Copyright © 2014 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ +#if !defined (SI_CI_VI_MERGED_ENUM_HEADER) +#define SI_CI_VI_MERGED_ENUM_HEADER + +typedef enum PipeInterleaveSize { +ADDR_CONFIG_PIPE_INTERLEAVE_256B = 0x00000000, +ADDR_CONFIG_PIPE_INTERLEAVE_512B = 0x00000001, +} PipeInterleaveSize; + +typedef enum RowSize { +ADDR_CONFIG_1KB_ROW = 0x00000000, +ADDR_CONFIG_2KB_ROW = 0x00000001, +ADDR_CONFIG_4KB_ROW = 0x00000002, +} RowSize; + +#endif diff -Nru mesa-12.0.6/src/amd/addrlib/r800/ciaddrlib.cpp mesa-17.0.7/src/amd/addrlib/r800/ciaddrlib.cpp --- mesa-12.0.6/src/amd/addrlib/r800/ciaddrlib.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/addrlib/r800/ciaddrlib.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,1832 @@ +/* + * Copyright © 2014 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +*************************************************************************************************** +* @file ciaddrlib.cpp +* @brief Contains the implementation for the CIAddrLib class. +*************************************************************************************************** +*/ + +#include "ciaddrlib.h" + +#include "si_gb_reg.h" + +#include "si_ci_vi_merged_enum.h" + +#if BRAHMA_BUILD +#include "amdgpu_id.h" +#else +#include "ci_id.h" +#include "kv_id.h" +#include "vi_id.h" +#endif + +/////////////////////////////////////////////////////////////////////////////////////////////////// +/////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +*************************************************************************************************** +* AddrMask +* +* @brief +* Gets a mask of "width" +* @return +* Bit mask +*************************************************************************************************** +*/ +static UINT_64 AddrMask( + UINT_32 width) ///< Width of bits +{ + UINT_64 ret; + + if (width >= sizeof(UINT_64)*8) + { + ret = ~((UINT_64) 0); + } + else + { + return (((UINT_64) 1) << width) - 1; + } + return ret; +} + +/** +*************************************************************************************************** +* AddrGetBits +* +* @brief +* Gets bits within a range of [msb, lsb] +* @return +* Bits of this range +*************************************************************************************************** +*/ +static UINT_64 AddrGetBits( + UINT_64 bits, ///< Source bits + UINT_32 msb, ///< Most signicant bit + UINT_32 lsb) ///< Least signicant bit +{ + UINT_64 ret = 0; + + if (msb >= lsb) + { + ret = (bits >> lsb) & (AddrMask(1 + msb - lsb)); + } + return ret; +} + +/** +*************************************************************************************************** +* AddrRemoveBits +* +* @brief +* Removes bits within the range of [msb, lsb] +* @return +* Modified bits +*************************************************************************************************** +*/ +static UINT_64 AddrRemoveBits( + UINT_64 bits, ///< Source bits + UINT_32 msb, ///< Most signicant bit + UINT_32 lsb) ///< Least signicant bit +{ + UINT_64 ret = bits; + + if (msb >= lsb) + { + ret = AddrGetBits(bits, lsb - 1, 0) // low bits + | (AddrGetBits(bits, 8 * sizeof(bits) - 1, msb + 1) << lsb); //high bits + } + return ret; +} + +/** +*************************************************************************************************** +* AddrInsertBits +* +* @brief +* Inserts new bits into the range of [msb, lsb] +* @return +* Modified bits +*************************************************************************************************** +*/ +static UINT_64 AddrInsertBits( + UINT_64 bits, ///< Source bits + UINT_64 newBits, ///< New bits to be inserted + UINT_32 msb, ///< Most signicant bit + UINT_32 lsb) ///< Least signicant bit +{ + UINT_64 ret = bits; + + if (msb >= lsb) + { + ret = AddrGetBits(bits, lsb - 1, 0) // old low bitss + | (AddrGetBits(newBits, msb - lsb, 0) << lsb) //new bits + | (AddrGetBits(bits, 8 * sizeof(bits) - 1, lsb) << (msb + 1)); //old high bits + } + return ret; +} + + +/** +*************************************************************************************************** +* AddrCIHwlInit +* +* @brief +* Creates an CIAddrLib object. +* +* @return +* Returns an CIAddrLib object pointer. +*************************************************************************************************** +*/ +AddrLib* AddrCIHwlInit(const AddrClient* pClient) +{ + return CIAddrLib::CreateObj(pClient); +} + +/** +*************************************************************************************************** +* CIAddrLib::CIAddrLib +* +* @brief +* Constructor +* +*************************************************************************************************** +*/ +CIAddrLib::CIAddrLib(const AddrClient* pClient) : + SIAddrLib(pClient), + m_noOfMacroEntries(0), + m_allowNonDispThickModes(FALSE) +{ + m_class = CI_ADDRLIB; + memset(&m_settings, 0, sizeof(m_settings)); +} + +/** +*************************************************************************************************** +* CIAddrLib::~CIAddrLib +* +* @brief +* Destructor +*************************************************************************************************** +*/ +CIAddrLib::~CIAddrLib() +{ +} + +/** +*************************************************************************************************** +* CIAddrLib::HwlComputeDccInfo +* +* @brief +* Compute DCC key size, base alignment +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE CIAddrLib::HwlComputeDccInfo( + const ADDR_COMPUTE_DCCINFO_INPUT* pIn, + ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (m_settings.isVolcanicIslands && IsMacroTiled(pIn->tileMode)) + { + UINT_64 dccFastClearSize = pIn->colorSurfSize >> 8; + + ADDR_ASSERT(0 == (pIn->colorSurfSize & 0xff)); + + if (pIn->numSamples > 1) + { + UINT_32 tileSizePerSample = BITS_TO_BYTES(pIn->bpp * MicroTileWidth * MicroTileHeight); + UINT_32 samplesPerSplit = pIn->tileInfo.tileSplitBytes / tileSizePerSample; + + if (samplesPerSplit < pIn->numSamples) + { + UINT_32 numSplits = pIn->numSamples / samplesPerSplit; + UINT_32 fastClearBaseAlign = HwlGetPipes(&pIn->tileInfo) * m_pipeInterleaveBytes; + + ADDR_ASSERT(IsPow2(fastClearBaseAlign)); + + dccFastClearSize /= numSplits; + + if (0 != (dccFastClearSize & (fastClearBaseAlign - 1))) + { + // Disable dcc fast clear + // if key size of fisrt sample split is not pipe*interleave aligned + dccFastClearSize = 0; + } + } + } + + pOut->dccRamSize = pIn->colorSurfSize >> 8; + pOut->dccRamBaseAlign = pIn->tileInfo.banks * + HwlGetPipes(&pIn->tileInfo) * + m_pipeInterleaveBytes; + pOut->dccFastClearSize = dccFastClearSize; + + ADDR_ASSERT(IsPow2(pOut->dccRamBaseAlign)); + + if (0 == (pOut->dccRamSize & (pOut->dccRamBaseAlign - 1))) + { + pOut->subLvlCompressible = TRUE; + } + else + { + UINT_64 dccRamSizeAlign = HwlGetPipes(&pIn->tileInfo) * m_pipeInterleaveBytes; + + if (pOut->dccRamSize == pOut->dccFastClearSize) + { + pOut->dccFastClearSize = PowTwoAlign(pOut->dccRamSize, dccRamSizeAlign); + } + pOut->dccRamSize = PowTwoAlign(pOut->dccRamSize, dccRamSizeAlign); + pOut->subLvlCompressible = FALSE; + } + } + else + { + returnCode = ADDR_NOTSUPPORTED; + } + + return returnCode; +} + +/** +*************************************************************************************************** +* CIAddrLib::HwlComputeCmaskAddrFromCoord +* +* @brief +* Compute tc compatible Cmask address from fmask ram address +* +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE CIAddrLib::HwlComputeCmaskAddrFromCoord( + const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] fmask addr/bpp/tile input + ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut ///< [out] cmask address + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_NOTSUPPORTED; + + if ((m_settings.isVolcanicIslands == TRUE) && + (pIn->flags.tcCompatible == TRUE)) + { + UINT_32 numOfPipes = HwlGetPipes(pIn->pTileInfo); + UINT_32 numOfBanks = pIn->pTileInfo->banks; + UINT_64 fmaskAddress = pIn->fmaskAddr; + UINT_32 elemBits = pIn->bpp; + UINT_32 blockByte = 64 * elemBits / 8; + UINT_64 metaNibbleAddress = HwlComputeMetadataNibbleAddress(fmaskAddress, + 0, + 0, + 4, + elemBits, + blockByte, + m_pipeInterleaveBytes, + numOfPipes, + numOfBanks, + 1); + pOut->addr = (metaNibbleAddress >> 1); + pOut->bitPosition = (metaNibbleAddress % 2) ? 4 : 0; + returnCode = ADDR_OK; + } + + return returnCode; +} +/** +*************************************************************************************************** +* CIAddrLib::HwlConvertChipFamily +* +* @brief +* Convert familyID defined in atiid.h to AddrChipFamily and set m_chipFamily/m_chipRevision +* @return +* AddrChipFamily +*************************************************************************************************** +*/ +AddrChipFamily CIAddrLib::HwlConvertChipFamily( + UINT_32 uChipFamily, ///< [in] chip family defined in atiih.h + UINT_32 uChipRevision) ///< [in] chip revision defined in "asic_family"_id.h +{ + AddrChipFamily family = ADDR_CHIP_FAMILY_CI; + + switch (uChipFamily) + { + case FAMILY_CI: + m_settings.isSeaIsland = 1; + m_settings.isBonaire = ASICREV_IS_BONAIRE_M(uChipRevision); + m_settings.isHawaii = ASICREV_IS_HAWAII_P(uChipRevision); + break; + case FAMILY_KV: + m_settings.isKaveri = 1; + m_settings.isSpectre = ASICREV_IS_SPECTRE(uChipRevision); + m_settings.isSpooky = ASICREV_IS_SPOOKY(uChipRevision); + m_settings.isKalindi = ASICREV_IS_KALINDI(uChipRevision); + break; + case FAMILY_VI: + m_settings.isVolcanicIslands = 1; + m_settings.isIceland = ASICREV_IS_ICELAND_M(uChipRevision); + m_settings.isTonga = ASICREV_IS_TONGA_P(uChipRevision); + m_settings.isFiji = ASICREV_IS_FIJI_P(uChipRevision); + m_settings.isPolaris10 = ASICREV_IS_POLARIS10_P(uChipRevision); + m_settings.isPolaris11 = ASICREV_IS_POLARIS11_M(uChipRevision); + m_settings.isPolaris12 = ASICREV_IS_POLARIS12_V(uChipRevision); + break; + case FAMILY_CZ: + m_settings.isCarrizo = 1; + m_settings.isVolcanicIslands = 1; + break; + default: + ADDR_ASSERT(!"This should be a unexpected Fusion"); + break; + } + + return family; +} + +/** +*************************************************************************************************** +* CIAddrLib::HwlInitGlobalParams +* +* @brief +* Initializes global parameters +* +* @return +* TRUE if all settings are valid +* +*************************************************************************************************** +*/ +BOOL_32 CIAddrLib::HwlInitGlobalParams( + const ADDR_CREATE_INPUT* pCreateIn) ///< [in] create input +{ + BOOL_32 valid = TRUE; + + const ADDR_REGISTER_VALUE* pRegValue = &pCreateIn->regValue; + + valid = DecodeGbRegs(pRegValue); + + // The following assignments for m_pipes is only for fail-safe, InitTileSettingTable should + // read the correct pipes from tile mode table + if (m_settings.isHawaii) + { + // Hawaii has 16-pipe, see GFXIP_Config_Summary.xls + m_pipes = 16; + } + else if (m_settings.isBonaire || m_settings.isSpectre) + { + m_pipes = 4; + } + else // Treat other KV asics to be 2-pipe + { + m_pipes = 2; + } + + // @todo: VI + // Move this to VI code path once created + if (m_settings.isTonga || m_settings.isPolaris10) + { + m_pipes = 8; + } + else if (m_settings.isIceland) + { + m_pipes = 2; + } + else if (m_settings.isFiji) + { + m_pipes = 16; + } + else if (m_settings.isPolaris11 || m_settings.isPolaris12) + { + m_pipes = 4; + } + + if (valid) + { + valid = InitTileSettingTable(pRegValue->pTileConfig, pRegValue->noOfEntries); + } + if (valid) + { + valid = InitMacroTileCfgTable(pRegValue->pMacroTileConfig, pRegValue->noOfMacroEntries); + } + + return valid; +} + +/** +*************************************************************************************************** +* CIAddrLib::HwlPostCheckTileIndex +* +* @brief +* Map a tile setting to index if curIndex is invalid, otherwise check if curIndex matches +* tile mode/type/info and change the index if needed +* @return +* Tile index. +*************************************************************************************************** +*/ +INT_32 CIAddrLib::HwlPostCheckTileIndex( + const ADDR_TILEINFO* pInfo, ///< [in] Tile Info + AddrTileMode mode, ///< [in] Tile mode + AddrTileType type, ///< [in] Tile type + INT curIndex ///< [in] Current index assigned in HwlSetupTileInfo + ) const +{ + INT_32 index = curIndex; + + if (mode == ADDR_TM_LINEAR_GENERAL) + { + index = TileIndexLinearGeneral; + } + else + { + BOOL_32 macroTiled = IsMacroTiled(mode); + + // We need to find a new index if either of them is true + // 1. curIndex is invalid + // 2. tile mode is changed + // 3. tile info does not match for macro tiled + if ((index == TileIndexInvalid) || + (mode != m_tileTable[index].mode) || + (macroTiled && pInfo->pipeConfig != m_tileTable[index].info.pipeConfig)) + { + for (index = 0; index < static_cast(m_noOfEntries); index++) + { + if (macroTiled) + { + // macro tile modes need all to match + if ((pInfo->pipeConfig == m_tileTable[index].info.pipeConfig) && + (mode == m_tileTable[index].mode) && + (type == m_tileTable[index].type)) + { + // tileSplitBytes stored in m_tileTable is only valid for depth entries + if (type == ADDR_DEPTH_SAMPLE_ORDER) + { + if (pInfo->tileSplitBytes == m_tileTable[index].info.tileSplitBytes) + { + break; + } + } + else // other entries are determined by other 3 fields + { + break; + } + } + } + else if (mode == ADDR_TM_LINEAR_ALIGNED) + { + // linear mode only needs tile mode to match + if (mode == m_tileTable[index].mode) + { + break; + } + } + else + { + // micro tile modes only need tile mode and tile type to match + if (mode == m_tileTable[index].mode && + type == m_tileTable[index].type) + { + break; + } + } + } + } + } + + ADDR_ASSERT(index < static_cast(m_noOfEntries)); + + if (index >= static_cast(m_noOfEntries)) + { + index = TileIndexInvalid; + } + + return index; +} + +/** +*************************************************************************************************** +* CIAddrLib::HwlSetupTileCfg +* +* @brief +* Map tile index to tile setting. +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE CIAddrLib::HwlSetupTileCfg( + INT_32 index, ///< [in] Tile index + INT_32 macroModeIndex, ///< [in] Index in macro tile mode table(CI) + ADDR_TILEINFO* pInfo, ///< [out] Tile Info + AddrTileMode* pMode, ///< [out] Tile mode + AddrTileType* pType ///< [out] Tile type + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + // Global flag to control usage of tileIndex + if (UseTileIndex(index)) + { + if (static_cast(index) >= m_noOfEntries) + { + returnCode = ADDR_INVALIDPARAMS; + } + else + { + const ADDR_TILECONFIG* pCfgTable = GetTileSetting(index); + + if (pInfo != NULL) + { + if (IsMacroTiled(pCfgTable->mode)) + { + ADDR_ASSERT(((macroModeIndex != TileIndexInvalid) + && (macroModeIndex != TileIndexNoMacroIndex))); + // Here we used tile_bytes to replace of tile_split + // According info as below: + // "tile_split_c = MIN(ROW_SIZE, tile_split) + // "tile_bytes = MIN(tile_split_c, num_samples * tile_bytes_1x) + // when using tile_bytes replacing of tile_split, the result of + // alignment and others(such as slicesPerTile) are unaffected - + // since if tile_split_c is larger, split won't happen, otherwise + // (num_samples * tile_bytes_1x is larger), a correct tile_split is + // returned. + *pInfo = m_macroTileTable[macroModeIndex]; + + if (pCfgTable->type == ADDR_DEPTH_SAMPLE_ORDER) + { + pInfo->tileSplitBytes = pCfgTable->info.tileSplitBytes; + } + pInfo->pipeConfig = pCfgTable->info.pipeConfig; + } + else // 1D and linear modes, we return default value stored in table + { + *pInfo = pCfgTable->info; + } + } + + if (pMode != NULL) + { + *pMode = pCfgTable->mode; + } + + if (pType != NULL) + { + *pType = pCfgTable->type; + } + } + } + + return returnCode; +} + +/** +*************************************************************************************************** +* CIAddrLib::HwlComputeSurfaceInfo +* +* @brief +* Entry of ci's ComputeSurfaceInfo +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE CIAddrLib::HwlComputeSurfaceInfo( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + // If tileIndex is invalid, force macroModeIndex to be invalid, too + if (pIn->tileIndex == TileIndexInvalid) + { + pOut->macroModeIndex = TileIndexInvalid; + } + + ADDR_E_RETURNCODE retCode = SIAddrLib::HwlComputeSurfaceInfo(pIn,pOut); + + if (pOut->macroModeIndex == TileIndexNoMacroIndex) + { + pOut->macroModeIndex = TileIndexInvalid; + } + + return retCode; +} + +/** +*************************************************************************************************** +* CIAddrLib::HwlFmaskSurfaceInfo +* @brief +* Entry of r800's ComputeFmaskInfo +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE CIAddrLib::HwlComputeFmaskInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut ///< [out] output structure + ) +{ + ADDR_E_RETURNCODE retCode = ADDR_OK; + + ADDR_TILEINFO tileInfo = {0}; + ADDR_COMPUTE_FMASK_INFO_INPUT fmaskIn; + fmaskIn = *pIn; + + AddrTileMode tileMode = pIn->tileMode; + + // Use internal tile info if pOut does not have a valid pTileInfo + if (pOut->pTileInfo == NULL) + { + pOut->pTileInfo = &tileInfo; + } + + ADDR_ASSERT(tileMode == ADDR_TM_2D_TILED_THIN1 || + tileMode == ADDR_TM_3D_TILED_THIN1 || + tileMode == ADDR_TM_PRT_TILED_THIN1 || + tileMode == ADDR_TM_PRT_2D_TILED_THIN1 || + tileMode == ADDR_TM_PRT_3D_TILED_THIN1); + + ADDR_ASSERT(m_tileTable[14].mode == ADDR_TM_2D_TILED_THIN1); + ADDR_ASSERT(m_tileTable[15].mode == ADDR_TM_3D_TILED_THIN1); + + // The only valid tile modes for fmask are 2D_THIN1 and 3D_THIN1 plus non-displayable + INT_32 tileIndex = tileMode == ADDR_TM_2D_TILED_THIN1 ? 14 : 15; + ADDR_SURFACE_FLAGS flags = {{0}}; + flags.fmask = 1; + + INT_32 macroModeIndex = TileIndexInvalid; + + UINT_32 numSamples = pIn->numSamples; + UINT_32 numFrags = pIn->numFrags == 0 ? numSamples : pIn->numFrags; + + UINT_32 bpp = QLog2(numFrags); + + // EQAA needs one more bit + if (numSamples > numFrags) + { + bpp++; + } + + if (bpp == 3) + { + bpp = 4; + } + + bpp = Max(8u, bpp * numSamples); + + macroModeIndex = HwlComputeMacroModeIndex(tileIndex, flags, bpp, numSamples, pOut->pTileInfo); + + fmaskIn.tileIndex = tileIndex; + fmaskIn.pTileInfo = pOut->pTileInfo; + pOut->macroModeIndex = macroModeIndex; + pOut->tileIndex = tileIndex; + + retCode = DispatchComputeFmaskInfo(&fmaskIn, pOut); + + if (retCode == ADDR_OK) + { + pOut->tileIndex = + HwlPostCheckTileIndex(pOut->pTileInfo, pIn->tileMode, ADDR_NON_DISPLAYABLE, + pOut->tileIndex); + } + + // Resets pTileInfo to NULL if the internal tile info is used + if (pOut->pTileInfo == &tileInfo) + { + pOut->pTileInfo = NULL; + } + + return retCode; +} + +/** +*************************************************************************************************** +* CIAddrLib::HwlFmaskPreThunkSurfInfo +* +* @brief +* Some preparation before thunking a ComputeSurfaceInfo call for Fmask +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +VOID CIAddrLib::HwlFmaskPreThunkSurfInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pFmaskIn, ///< [in] Input of fmask info + const ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut, ///< [in] Output of fmask info + ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfIn, ///< [out] Input of thunked surface info + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut ///< [out] Output of thunked surface info + ) const +{ + pSurfIn->tileIndex = pFmaskIn->tileIndex; + pSurfOut->macroModeIndex = pFmaskOut->macroModeIndex; +} + +/** +*************************************************************************************************** +* CIAddrLib::HwlFmaskPostThunkSurfInfo +* +* @brief +* Copy hwl extra field after calling thunked ComputeSurfaceInfo +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +VOID CIAddrLib::HwlFmaskPostThunkSurfInfo( + const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut, ///< [in] Output of surface info + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut ///< [out] Output of fmask info + ) const +{ + pFmaskOut->tileIndex = pSurfOut->tileIndex; + pFmaskOut->macroModeIndex = pSurfOut->macroModeIndex; +} + +/** +*************************************************************************************************** +* CIAddrLib::HwlDegradeThickTileMode +* +* @brief +* Degrades valid tile mode for thick modes if needed +* +* @return +* Suitable tile mode +*************************************************************************************************** +*/ +AddrTileMode CIAddrLib::HwlDegradeThickTileMode( + AddrTileMode baseTileMode, ///< [in] base tile mode + UINT_32 numSlices, ///< [in] current number of slices + UINT_32* pBytesPerTile ///< [in/out] pointer to bytes per slice + ) const +{ + return baseTileMode; +} + +/** +*************************************************************************************************** +* CIAddrLib::HwlOverrideTileMode +* +* @brief +* Override THICK to THIN, for specific formats on CI +* +* @return +* Suitable tile mode +* +*************************************************************************************************** +*/ +BOOL_32 CIAddrLib::HwlOverrideTileMode( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + AddrTileMode* pTileMode, ///< [in/out] pointer to the tile mode + AddrTileType* pTileType ///< [in/out] pointer to the tile type + ) const +{ + BOOL_32 bOverrided = FALSE; + AddrTileMode tileMode = *pTileMode; + + // currently, all CI/VI family do not + // support ADDR_TM_PRT_2D_TILED_THICK,ADDR_TM_PRT_3D_TILED_THICK and + // ADDR_TM_PRT_2D_TILED_THIN1, ADDR_TM_PRT_3D_TILED_THIN1 + switch (tileMode) + { + case ADDR_TM_PRT_2D_TILED_THICK: + case ADDR_TM_PRT_3D_TILED_THICK: + tileMode = ADDR_TM_PRT_TILED_THICK; + break; + case ADDR_TM_PRT_2D_TILED_THIN1: + case ADDR_TM_PRT_3D_TILED_THIN1: + tileMode = ADDR_TM_PRT_TILED_THIN1; + break; + default: + break; + } + + // UBTS#404321, we do not need such overriding, as THICK+THICK entries removed from the tile-mode table + if (!m_settings.isBonaire) + { + UINT_32 thickness = ComputeSurfaceThickness(tileMode); + + // tile_thickness = (array_mode == XTHICK) ? 8 : ((array_mode == THICK) ? 4 : 1) + if (thickness > 1) + { + switch (pIn->format) + { + // see //gfxip/gcB/devel/cds/src/verif/tc/models/csim/tcp.cpp + // tcpError("Thick micro tiling is not supported for format... + case ADDR_FMT_X24_8_32_FLOAT: + case ADDR_FMT_32_AS_8: + case ADDR_FMT_32_AS_8_8: + case ADDR_FMT_32_AS_32_32_32_32: + + // packed formats + case ADDR_FMT_GB_GR: + case ADDR_FMT_BG_RG: + case ADDR_FMT_1_REVERSED: + case ADDR_FMT_1: + case ADDR_FMT_BC1: + case ADDR_FMT_BC2: + case ADDR_FMT_BC3: + case ADDR_FMT_BC4: + case ADDR_FMT_BC5: + case ADDR_FMT_BC6: + case ADDR_FMT_BC7: + switch (tileMode) + { + case ADDR_TM_1D_TILED_THICK: + tileMode = ADDR_TM_1D_TILED_THIN1; + break; + + case ADDR_TM_2D_TILED_XTHICK: + case ADDR_TM_2D_TILED_THICK: + tileMode = ADDR_TM_2D_TILED_THIN1; + break; + + case ADDR_TM_3D_TILED_XTHICK: + case ADDR_TM_3D_TILED_THICK: + tileMode = ADDR_TM_3D_TILED_THIN1; + break; + + case ADDR_TM_PRT_TILED_THICK: + tileMode = ADDR_TM_PRT_TILED_THIN1; + break; + + case ADDR_TM_PRT_2D_TILED_THICK: + tileMode = ADDR_TM_PRT_2D_TILED_THIN1; + break; + + case ADDR_TM_PRT_3D_TILED_THICK: + tileMode = ADDR_TM_PRT_3D_TILED_THIN1; + break; + + default: + break; + + } + + // Switch tile type from thick to thin + if (tileMode != *pTileMode) + { + // see tileIndex: 13-18 + *pTileType = ADDR_NON_DISPLAYABLE; + } + + break; + default: + break; + } + } + } + + if (tileMode != *pTileMode) + { + *pTileMode = tileMode; + bOverrided = TRUE; + } + + return bOverrided; +} + +/** +*************************************************************************************************** +* CiAddrLib::GetPrtSwitchP4Threshold +* +* @brief +* Return the threshold of switching to P4_* instead of P16_* for PRT resources +*************************************************************************************************** +*/ +UINT_32 CIAddrLib::GetPrtSwitchP4Threshold() const +{ + UINT_32 threshold; + + switch (m_pipes) + { + case 8: + threshold = 32; + break; + case 16: + if (m_settings.isFiji) + { + threshold = 16; + } + else if (m_settings.isHawaii) + { + threshold = 8; + } + else + { + ///@todo add for possible new ASICs. + ADDR_ASSERT_ALWAYS(); + threshold = 16; + } + break; + default: + ///@todo add for possible new ASICs. + ADDR_ASSERT_ALWAYS(); + threshold = 32; + break; + } + + return threshold; +} + +/** +*************************************************************************************************** +* CIAddrLib::HwlSetupTileInfo +* +* @brief +* Setup default value of tile info for SI +*************************************************************************************************** +*/ +VOID CIAddrLib::HwlSetupTileInfo( + AddrTileMode tileMode, ///< [in] Tile mode + ADDR_SURFACE_FLAGS flags, ///< [in] Surface type flags + UINT_32 bpp, ///< [in] Bits per pixel + UINT_32 pitch, ///< [in] Pitch in pixels + UINT_32 height, ///< [in] Height in pixels + UINT_32 numSamples, ///< [in] Number of samples + ADDR_TILEINFO* pTileInfoIn, ///< [in] Tile info input: NULL for default + ADDR_TILEINFO* pTileInfoOut, ///< [out] Tile info output + AddrTileType inTileType, ///< [in] Tile type + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] Output + ) const +{ + UINT_32 thickness = ComputeSurfaceThickness(tileMode); + ADDR_TILEINFO* pTileInfo = pTileInfoOut; + INT index = TileIndexInvalid; + INT macroModeIndex = TileIndexInvalid; + + // Fail-safe code + if (!IsLinear(tileMode)) + { + // Thick tile modes must use thick micro tile mode but Bonaire does not support due to + // old derived netlists (UBTS 404321) + if (thickness > 1) + { + if (m_settings.isBonaire) + { + inTileType = ADDR_NON_DISPLAYABLE; + } + else if ((m_allowNonDispThickModes == FALSE) || (inTileType != ADDR_NON_DISPLAYABLE)) + { + inTileType = ADDR_THICK; + } + } + // 128 bpp tiling must be non-displayable. + // Fmask reuse color buffer's entry but bank-height field can be from another entry + // To simplify the logic, fmask entry should be picked from non-displayable ones + else if (bpp == 128 || flags.fmask) + { + inTileType = ADDR_NON_DISPLAYABLE; + } + // These two modes only have non-disp entries though they can be other micro tile modes + else if (tileMode == ADDR_TM_3D_TILED_THIN1 || tileMode == ADDR_TM_PRT_3D_TILED_THIN1) + { + inTileType = ADDR_NON_DISPLAYABLE; + } + + if (flags.depth || flags.stencil) + { + inTileType = ADDR_DEPTH_SAMPLE_ORDER; + } + } + + if (IsTileInfoAllZero(pTileInfo)) + { + // See table entries 0-4 + if (flags.depth || flags.stencil) + { + if (flags.depth && flags.tcCompatible) + { + // tileSize = bpp * numSamples * 8 * 8 / 8 + UINT_32 tileSize = bpp * numSamples * 8; + + // Texure readable depth surface should not be split + switch (tileSize) + { + case 128: + index = 1; + break; + case 256: + index = 2; + break; + case 512: + index = 3; + break; + default: + index = 4; + break; + } + } + else + { + // Depth and stencil need to use the same index, thus the pre-defined tile_split + // can meet the requirement to choose the same macro mode index + // uncompressed depth/stencil are not supported for now + switch (numSamples) + { + case 1: + index = 0; + break; + case 2: + case 4: + index = 1; + break; + case 8: + index = 2; + break; + default: + break; + } + } + } + + // See table entries 5-6 + if (inTileType == ADDR_DEPTH_SAMPLE_ORDER) + { + switch (tileMode) + { + case ADDR_TM_1D_TILED_THIN1: + index = 5; + break; + case ADDR_TM_PRT_TILED_THIN1: + index = 6; + break; + default: + break; + } + } + + // See table entries 8-12 + if (inTileType == ADDR_DISPLAYABLE) + { + switch (tileMode) + { + case ADDR_TM_1D_TILED_THIN1: + index = 9; + break; + case ADDR_TM_2D_TILED_THIN1: + index = 10; + break; + case ADDR_TM_PRT_TILED_THIN1: + index = 11; + break; + default: + break; + } + } + + // See table entries 13-18 + if (inTileType == ADDR_NON_DISPLAYABLE) + { + switch (tileMode) + { + case ADDR_TM_1D_TILED_THIN1: + index = 13; + break; + case ADDR_TM_2D_TILED_THIN1: + index = 14; + break; + case ADDR_TM_3D_TILED_THIN1: + index = 15; + break; + case ADDR_TM_PRT_TILED_THIN1: + index = 16; + break; + default: + break; + } + } + + // See table entries 19-26 + if (thickness > 1) + { + switch (tileMode) + { + case ADDR_TM_1D_TILED_THICK: + //special check for bonaire, for the compatablity between old KMD and new UMD for bonaire + index = ((inTileType == ADDR_THICK) || m_settings.isBonaire) ? 19 : 18; + break; + case ADDR_TM_2D_TILED_THICK: + // special check for bonaire, for the compatablity between old KMD and new UMD for bonaire + index = ((inTileType == ADDR_THICK) || m_settings.isBonaire) ? 20 : 24; + break; + case ADDR_TM_3D_TILED_THICK: + index = 21; + break; + case ADDR_TM_PRT_TILED_THICK: + index = 22; + break; + case ADDR_TM_2D_TILED_XTHICK: + index = 25; + break; + case ADDR_TM_3D_TILED_XTHICK: + index = 26; + break; + default: + break; + } + } + + // See table entries 27-30 + if (inTileType == ADDR_ROTATED) + { + switch (tileMode) + { + case ADDR_TM_1D_TILED_THIN1: + index = 27; + break; + case ADDR_TM_2D_TILED_THIN1: + index = 28; + break; + case ADDR_TM_PRT_TILED_THIN1: + index = 29; + break; + case ADDR_TM_PRT_2D_TILED_THIN1: + index = 30; + break; + default: + break; + } + } + + if (m_pipes >= 8) + { + ADDR_ASSERT((index + 1) < static_cast(m_noOfEntries)); + // Only do this when tile mode table is updated. + if (((tileMode == ADDR_TM_PRT_TILED_THIN1) || (tileMode == ADDR_TM_PRT_TILED_THICK)) && + (m_tileTable[index+1].mode == tileMode)) + { + UINT_32 bytesXSamples = bpp * numSamples / 8; + UINT_32 bytesXThickness = bpp * thickness / 8; + UINT_32 switchP4Threshold = GetPrtSwitchP4Threshold(); + + if ((bytesXSamples > switchP4Threshold) || (bytesXThickness > switchP4Threshold)) + { + // Pick next 4 pipe entry + index += 1; + } + } + } + } + else + { + // A pre-filled tile info is ready + index = pOut->tileIndex; + macroModeIndex = pOut->macroModeIndex; + + // pass tile type back for post tile index compute + pOut->tileType = inTileType; + } + + // We only need to set up tile info if there is a valid index but macroModeIndex is invalid + if (index != TileIndexInvalid && macroModeIndex == TileIndexInvalid) + { + macroModeIndex = HwlComputeMacroModeIndex(index, flags, bpp, numSamples, pTileInfo); + + /// Copy to pOut->tileType/tileIndex/macroModeIndex + pOut->tileIndex = index; + pOut->tileType = m_tileTable[index].type; // Or inTileType, the samea + pOut->macroModeIndex = macroModeIndex; + } + else if (tileMode == ADDR_TM_LINEAR_GENERAL) + { + pOut->tileIndex = TileIndexLinearGeneral; + + // Copy linear-aligned entry?? + *pTileInfo = m_tileTable[8].info; + } + else if (tileMode == ADDR_TM_LINEAR_ALIGNED) + { + pOut->tileIndex = 8; + *pTileInfo = m_tileTable[8].info; + } +} + +/** +*************************************************************************************************** +* CIAddrLib::ReadGbTileMode +* +* @brief +* Convert GB_TILE_MODE HW value to ADDR_TILE_CONFIG. +* @return +* NA. +*************************************************************************************************** +*/ +VOID CIAddrLib::ReadGbTileMode( + UINT_32 regValue, ///< [in] GB_TILE_MODE register + ADDR_TILECONFIG* pCfg ///< [out] output structure + ) const +{ + GB_TILE_MODE gbTileMode; + gbTileMode.val = regValue; + + pCfg->type = static_cast(gbTileMode.f.micro_tile_mode_new); + pCfg->info.pipeConfig = static_cast(gbTileMode.f.pipe_config + 1); + + if (pCfg->type == ADDR_DEPTH_SAMPLE_ORDER) + { + pCfg->info.tileSplitBytes = 64 << gbTileMode.f.tile_split; + } + else + { + pCfg->info.tileSplitBytes = 1 << gbTileMode.f.sample_split; + } + + UINT_32 regArrayMode = gbTileMode.f.array_mode; + + pCfg->mode = static_cast(regArrayMode); + + switch (regArrayMode) + { + case 5: + pCfg->mode = ADDR_TM_PRT_TILED_THIN1; + break; + case 6: + pCfg->mode = ADDR_TM_PRT_2D_TILED_THIN1; + break; + case 8: + pCfg->mode = ADDR_TM_2D_TILED_XTHICK; + break; + case 9: + pCfg->mode = ADDR_TM_PRT_TILED_THICK; + break; + case 0xa: + pCfg->mode = ADDR_TM_PRT_2D_TILED_THICK; + break; + case 0xb: + pCfg->mode = ADDR_TM_PRT_3D_TILED_THIN1; + break; + case 0xe: + pCfg->mode = ADDR_TM_3D_TILED_XTHICK; + break; + case 0xf: + pCfg->mode = ADDR_TM_PRT_3D_TILED_THICK; + break; + default: + break; + } + + // Fail-safe code for these always convert tile info, as the non-macro modes + // return the entry of tile mode table directly without looking up macro mode table + if (!IsMacroTiled(pCfg->mode)) + { + pCfg->info.banks = 2; + pCfg->info.bankWidth = 1; + pCfg->info.bankHeight = 1; + pCfg->info.macroAspectRatio = 1; + pCfg->info.tileSplitBytes = 64; + } +} + +/** +*************************************************************************************************** +* CIAddrLib::InitTileSettingTable +* +* @brief +* Initialize the ADDR_TILE_CONFIG table. +* @return +* TRUE if tile table is correctly initialized +*************************************************************************************************** +*/ +BOOL_32 CIAddrLib::InitTileSettingTable( + const UINT_32* pCfg, ///< [in] Pointer to table of tile configs + UINT_32 noOfEntries ///< [in] Numbe of entries in the table above + ) +{ + BOOL_32 initOk = TRUE; + + ADDR_ASSERT(noOfEntries <= TileTableSize); + + memset(m_tileTable, 0, sizeof(m_tileTable)); + + if (noOfEntries != 0) + { + m_noOfEntries = noOfEntries; + } + else + { + m_noOfEntries = TileTableSize; + } + + if (pCfg) // From Client + { + for (UINT_32 i = 0; i < m_noOfEntries; i++) + { + ReadGbTileMode(*(pCfg + i), &m_tileTable[i]); + } + } + else + { + ADDR_ASSERT_ALWAYS(); + initOk = FALSE; + } + + if (initOk) + { + ADDR_ASSERT(m_tileTable[TILEINDEX_LINEAR_ALIGNED].mode == ADDR_TM_LINEAR_ALIGNED); + + if (m_settings.isBonaire == FALSE) + { + // Check if entry 18 is "thick+thin" combination + if ((m_tileTable[18].mode == ADDR_TM_1D_TILED_THICK) && + (m_tileTable[18].type == ADDR_NON_DISPLAYABLE)) + { + m_allowNonDispThickModes = TRUE; + ADDR_ASSERT(m_tileTable[24].mode == ADDR_TM_2D_TILED_THICK); + } + } + else + { + m_allowNonDispThickModes = TRUE; + } + + // Assume the first entry is always programmed with full pipes + m_pipes = HwlGetPipes(&m_tileTable[0].info); + } + + return initOk; +} + +/** +*************************************************************************************************** +* CIAddrLib::ReadGbMacroTileCfg +* +* @brief +* Convert GB_MACRO_TILE_CFG HW value to ADDR_TILE_CONFIG. +* @return +* NA. +*************************************************************************************************** +*/ +VOID CIAddrLib::ReadGbMacroTileCfg( + UINT_32 regValue, ///< [in] GB_MACRO_TILE_MODE register + ADDR_TILEINFO* pCfg ///< [out] output structure + ) const +{ + GB_MACROTILE_MODE gbTileMode; + gbTileMode.val = regValue; + + pCfg->bankHeight = 1 << gbTileMode.f.bank_height; + pCfg->bankWidth = 1 << gbTileMode.f.bank_width; + pCfg->banks = 1 << (gbTileMode.f.num_banks + 1); + pCfg->macroAspectRatio = 1 << gbTileMode.f.macro_tile_aspect; +} + +/** +*************************************************************************************************** +* CIAddrLib::InitMacroTileCfgTable +* +* @brief +* Initialize the ADDR_MACRO_TILE_CONFIG table. +* @return +* TRUE if macro tile table is correctly initialized +*************************************************************************************************** +*/ +BOOL_32 CIAddrLib::InitMacroTileCfgTable( + const UINT_32* pCfg, ///< [in] Pointer to table of tile configs + UINT_32 noOfMacroEntries ///< [in] Numbe of entries in the table above + ) +{ + BOOL_32 initOk = TRUE; + + ADDR_ASSERT(noOfMacroEntries <= MacroTileTableSize); + + memset(m_macroTileTable, 0, sizeof(m_macroTileTable)); + + if (noOfMacroEntries != 0) + { + m_noOfMacroEntries = noOfMacroEntries; + } + else + { + m_noOfMacroEntries = MacroTileTableSize; + } + + if (pCfg) // From Client + { + for (UINT_32 i = 0; i < m_noOfMacroEntries; i++) + { + ReadGbMacroTileCfg(*(pCfg + i), &m_macroTileTable[i]); + + m_macroTileTable[i].tileSplitBytes = 64 << (i % 8); + } + } + else + { + ADDR_ASSERT_ALWAYS(); + initOk = FALSE; + } + return initOk; +} + +/** +*************************************************************************************************** +* CIAddrLib::HwlComputeMacroModeIndex +* +* @brief +* Computes macro tile mode index +* @return +* TRUE if macro tile table is correctly initialized +*************************************************************************************************** +*/ +INT_32 CIAddrLib::HwlComputeMacroModeIndex( + INT_32 tileIndex, ///< [in] Tile mode index + ADDR_SURFACE_FLAGS flags, ///< [in] Surface flags + UINT_32 bpp, ///< [in] Bit per pixel + UINT_32 numSamples, ///< [in] Number of samples + ADDR_TILEINFO* pTileInfo, ///< [out] Pointer to ADDR_TILEINFO + AddrTileMode* pTileMode, ///< [out] Pointer to AddrTileMode + AddrTileType* pTileType ///< [out] Pointer to AddrTileType + ) const +{ + INT_32 macroModeIndex = TileIndexInvalid; + + if (flags.tcCompatible && flags.stencil) + { + // Don't compute macroModeIndex for tc compatible stencil surface + macroModeIndex = TileIndexNoMacroIndex; + } + else + { + AddrTileMode tileMode = m_tileTable[tileIndex].mode; + AddrTileType tileType = m_tileTable[tileIndex].type; + UINT_32 thickness = ComputeSurfaceThickness(tileMode); + + if (!IsMacroTiled(tileMode)) + { + *pTileInfo = m_tileTable[tileIndex].info; + macroModeIndex = TileIndexNoMacroIndex; + } + else + { + UINT_32 tileBytes1x = BITS_TO_BYTES(bpp * MicroTilePixels * thickness); + UINT_32 tileSplit; + + if (m_tileTable[tileIndex].type == ADDR_DEPTH_SAMPLE_ORDER) + { + // Depth entries store real tileSplitBytes + tileSplit = m_tileTable[tileIndex].info.tileSplitBytes; + } + else + { + // Non-depth entries store a split factor + UINT_32 sampleSplit = m_tileTable[tileIndex].info.tileSplitBytes; + UINT_32 colorTileSplit = Max(256u, sampleSplit * tileBytes1x); + + tileSplit = colorTileSplit; + } + + UINT_32 tileSplitC = Min(m_rowSize, tileSplit); + UINT_32 tileBytes; + + if (flags.fmask) + { + tileBytes = Min(tileSplitC, tileBytes1x); + } + else + { + tileBytes = Min(tileSplitC, numSamples * tileBytes1x); + } + + if (tileBytes < 64) + { + tileBytes = 64; + } + + macroModeIndex = Log2(tileBytes / 64); + + if (flags.prt || IsPrtTileMode(tileMode)) + { + // Unknown - assume it is 1/2 of table size + const UINT_32 PrtMacroModeOffset = MacroTileTableSize / 2; + + macroModeIndex += PrtMacroModeOffset; + *pTileInfo = m_macroTileTable[macroModeIndex]; + } + else + { + *pTileInfo = m_macroTileTable[macroModeIndex]; + } + + pTileInfo->pipeConfig = m_tileTable[tileIndex].info.pipeConfig; + + if (m_tileTable[tileIndex].type != ADDR_DEPTH_SAMPLE_ORDER) + { + pTileInfo->tileSplitBytes = tileSplitC; + } + else + { + pTileInfo->tileSplitBytes = m_tileTable[tileIndex].info.tileSplitBytes; + } + } + + if (NULL != pTileMode) + { + *pTileMode = tileMode; + } + + if (NULL != pTileType) + { + *pTileType = tileType; + } + } + + return macroModeIndex; +} + +/** +*************************************************************************************************** +* CIAddrLib::HwlComputeTileDataWidthAndHeightLinear +* +* @brief +* Compute the squared cache shape for per-tile data (CMASK and HTILE) for linear layout +* +* @return +* N/A +* +* @note +* MacroWidth and macroHeight are measured in pixels +*************************************************************************************************** +*/ +VOID CIAddrLib::HwlComputeTileDataWidthAndHeightLinear( + UINT_32* pMacroWidth, ///< [out] macro tile width + UINT_32* pMacroHeight, ///< [out] macro tile height + UINT_32 bpp, ///< [in] bits per pixel + ADDR_TILEINFO* pTileInfo ///< [in] tile info + ) const +{ + ADDR_ASSERT(pTileInfo != NULL); + + UINT_32 numTiles; + + switch (pTileInfo->pipeConfig) + { + case ADDR_PIPECFG_P16_32x32_8x16: + case ADDR_PIPECFG_P16_32x32_16x16: + case ADDR_PIPECFG_P8_32x64_32x32: + case ADDR_PIPECFG_P8_32x32_16x32: + case ADDR_PIPECFG_P8_32x32_16x16: + case ADDR_PIPECFG_P8_32x32_8x16: + case ADDR_PIPECFG_P4_32x32: + numTiles = 8; + break; + default: + numTiles = 4; + break; + } + + *pMacroWidth = numTiles * MicroTileWidth; + *pMacroHeight = numTiles * MicroTileHeight; +} + +/** +*************************************************************************************************** +* CIAddrLib::HwlStereoCheckRightOffsetPadding +* +* @brief +* check if the height needs extra padding for stereo right eye offset, to avoid swizzling +* +* @return +* TRUE is the extra padding is needed +* +* @note +* Kalindi (Kabini) is the only one that needs this padding as there is a uncertain +* possible HW issue where the right eye displays incorrectly with some type of swizzles, if +* the right eye offset is not 64KB aligned - EPR#366461 +* Other Kaveri APUs also need the padding according to DXX team's report otherwise +* corruption observed. - EPR#374788 +*************************************************************************************************** +*/ +BOOL_32 CIAddrLib::HwlStereoCheckRightOffsetPadding() const +{ + BOOL_32 bNeedPadding = FALSE; + + if (m_settings.isKaveri) + { + bNeedPadding = TRUE; + } + + return bNeedPadding; +} + +/** +*************************************************************************************************** +* CIAddrLib::HwlComputeMetadataNibbleAddress +* +* @brief +* calculate meta data address based on input information +* +* ¶meter +* uncompressedDataByteAddress - address of a pixel in color surface +* dataBaseByteAddress - base address of color surface +* metadataBaseByteAddress - base address of meta ram +* metadataBitSize - meta key size, 8 for DCC, 4 for cmask +* elementBitSize - element size of color surface +* blockByteSize - compression block size, 256 for DCC +* pipeInterleaveBytes - pipe interleave size +* numOfPipes - number of pipes +* numOfBanks - number of banks +* numOfSamplesPerSplit - number of samples per tile split +* @return +* meta data nibble address (nibble address is used to support DCC compatible cmask) +* +*************************************************************************************************** +*/ +UINT_64 CIAddrLib::HwlComputeMetadataNibbleAddress( + UINT_64 uncompressedDataByteAddress, + UINT_64 dataBaseByteAddress, + UINT_64 metadataBaseByteAddress, + UINT_32 metadataBitSize, + UINT_32 elementBitSize, + UINT_32 blockByteSize, + UINT_32 pipeInterleaveBytes, + UINT_32 numOfPipes, + UINT_32 numOfBanks, + UINT_32 numOfSamplesPerSplit) const +{ + ///-------------------------------------------------------------------------------------------- + /// Get pipe interleave, bank and pipe bits + ///-------------------------------------------------------------------------------------------- + UINT_32 pipeInterleaveBits = Log2(pipeInterleaveBytes); + UINT_32 pipeBits = Log2(numOfPipes); + UINT_32 bankBits = Log2(numOfBanks); + + ///-------------------------------------------------------------------------------------------- + /// Clear pipe and bank swizzles + ///-------------------------------------------------------------------------------------------- + UINT_32 dataMacrotileBits = pipeInterleaveBits + pipeBits + bankBits; + UINT_32 metadataMacrotileBits = pipeInterleaveBits + pipeBits + bankBits; + + UINT_64 dataMacrotileClearMask = ~((1L << dataMacrotileBits) - 1); + UINT_64 metadataMacrotileClearMask = ~((1L << metadataMacrotileBits) - 1); + + UINT_64 dataBaseByteAddressNoSwizzle = dataBaseByteAddress & dataMacrotileClearMask; + UINT_64 metadataBaseByteAddressNoSwizzle = metadataBaseByteAddress & metadataMacrotileClearMask; + + ///-------------------------------------------------------------------------------------------- + /// Modify metadata base before adding in so that when final address is divided by data ratio, + /// the base address returns to where it should be + ///-------------------------------------------------------------------------------------------- + ADDR_ASSERT((0 != metadataBitSize)); + UINT_64 metadataBaseShifted = metadataBaseByteAddressNoSwizzle * blockByteSize * 8 / + metadataBitSize; + UINT_64 offset = uncompressedDataByteAddress - + dataBaseByteAddressNoSwizzle + + metadataBaseShifted; + + ///-------------------------------------------------------------------------------------------- + /// Save bank data bits + ///-------------------------------------------------------------------------------------------- + UINT_32 lsb = pipeBits + pipeInterleaveBits; + UINT_32 msb = bankBits - 1 + lsb; + + UINT_64 bankDataBits = AddrGetBits(offset, msb, lsb); + + ///-------------------------------------------------------------------------------------------- + /// Save pipe data bits + ///-------------------------------------------------------------------------------------------- + lsb = pipeInterleaveBits; + msb = pipeBits - 1 + lsb; + + UINT_64 pipeDataBits = AddrGetBits(offset, msb, lsb); + + ///-------------------------------------------------------------------------------------------- + /// Remove pipe and bank bits + ///-------------------------------------------------------------------------------------------- + lsb = pipeInterleaveBits; + msb = dataMacrotileBits - 1; + + UINT_64 offsetWithoutPipeBankBits = AddrRemoveBits(offset, msb, lsb); + + ADDR_ASSERT((0 != blockByteSize)); + UINT_64 blockInBankpipe = offsetWithoutPipeBankBits / blockByteSize; + + UINT_32 tileSize = 8 * 8 * elementBitSize/8 * numOfSamplesPerSplit; + UINT_32 blocksInTile = tileSize / blockByteSize; + + if (0 == blocksInTile) + { + lsb = 0; + } + else + { + lsb = Log2(blocksInTile); + } + msb = bankBits - 1 + lsb; + + UINT_64 blockInBankpipeWithBankBits = AddrInsertBits(blockInBankpipe, bankDataBits, msb, lsb); + + /// NOTE *2 because we are converting to Nibble address in this step + UINT_64 metaAddressInPipe = blockInBankpipeWithBankBits * 2 * metadataBitSize / 8; + + + ///-------------------------------------------------------------------------------------------- + /// Reinsert pipe bits back into the final address + ///-------------------------------------------------------------------------------------------- + lsb = pipeInterleaveBits + 1; ///<+1 due to Nibble address now gives interleave bits extra lsb. + msb = pipeBits - 1 + lsb; + UINT_64 metadataAddress = AddrInsertBits(metaAddressInPipe, pipeDataBits, msb, lsb); + + return metadataAddress; +} + +/** +*************************************************************************************************** +* CIAddrLib::HwlPadDimensions +* +* @brief +* Helper function to pad dimensions +* +* @return +* N/A +* +*************************************************************************************************** +*/ +VOID CIAddrLib::HwlPadDimensions( + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 bpp, ///< [in] bits per pixel + ADDR_SURFACE_FLAGS flags, ///< [in] surface flags + UINT_32 numSamples, ///< [in] number of samples + ADDR_TILEINFO* pTileInfo, ///< [in/out] bank structure. + UINT_32 padDims, ///< [in] Dimensions to pad valid value 1,2,3 + UINT_32 mipLevel, ///< [in] MipLevel + UINT_32* pPitch, ///< [in/out] pitch in pixels + UINT_32 pitchAlign, ///< [in] pitch alignment + UINT_32* pHeight, ///< [in/out] height in pixels + UINT_32 heightAlign, ///< [in] height alignment + UINT_32* pSlices, ///< [in/out] number of slices + UINT_32 sliceAlign ///< [in] number of slice alignment + ) const +{ + if (m_settings.isVolcanicIslands && + flags.dccCompatible && + (numSamples > 1) && + (mipLevel == 0) && + IsMacroTiled(tileMode)) + { + UINT_32 tileSizePerSample = BITS_TO_BYTES(bpp * MicroTileWidth * MicroTileHeight); + UINT_32 samplesPerSplit = pTileInfo->tileSplitBytes / tileSizePerSample; + + if (samplesPerSplit < numSamples) + { + UINT_32 dccFastClearByteAlign = HwlGetPipes(pTileInfo) * m_pipeInterleaveBytes * 256; + UINT_32 bytesPerSplit = BITS_TO_BYTES((*pPitch) * (*pHeight) * bpp * samplesPerSplit); + + ADDR_ASSERT(IsPow2(dccFastClearByteAlign)); + + if (0 != (bytesPerSplit & (dccFastClearByteAlign - 1))) + { + UINT_32 dccFastClearPixelAlign = dccFastClearByteAlign / + BITS_TO_BYTES(bpp) / + samplesPerSplit; + UINT_32 macroTilePixelAlign = pitchAlign * heightAlign; + + if ((dccFastClearPixelAlign >= macroTilePixelAlign) && + ((dccFastClearPixelAlign % macroTilePixelAlign) == 0)) + { + UINT_32 dccFastClearPitchAlignInMacroTile = + dccFastClearPixelAlign / macroTilePixelAlign; + UINT_32 heightInMacroTile = *pHeight / heightAlign; + UINT_32 dccFastClearPitchAlignInPixels; + + while ((heightInMacroTile > 1) && + ((heightInMacroTile % 2) == 0) && + (dccFastClearPitchAlignInMacroTile > 1) && + ((dccFastClearPitchAlignInMacroTile % 2) == 0)) + { + heightInMacroTile >>= 1; + dccFastClearPitchAlignInMacroTile >>= 1; + } + + dccFastClearPitchAlignInPixels = pitchAlign * dccFastClearPitchAlignInMacroTile; + + if (IsPow2(dccFastClearPitchAlignInPixels)) + { + *pPitch = PowTwoAlign((*pPitch), dccFastClearPitchAlignInPixels); + } + else + { + *pPitch += (dccFastClearPitchAlignInPixels - 1); + *pPitch /= dccFastClearPitchAlignInPixels; + *pPitch *= dccFastClearPitchAlignInPixels; + } + } + } + } + } +} + diff -Nru mesa-12.0.6/src/amd/addrlib/r800/ciaddrlib.h mesa-17.0.7/src/amd/addrlib/r800/ciaddrlib.h --- mesa-12.0.6/src/amd/addrlib/r800/ciaddrlib.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/addrlib/r800/ciaddrlib.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,203 @@ +/* + * Copyright © 2014 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +*************************************************************************************************** +* @file ciaddrlib.h +* @brief Contains the CIAddrLib class definition. +*************************************************************************************************** +*/ + +#ifndef __CI_ADDR_LIB_H__ +#define __CI_ADDR_LIB_H__ + +#include "addrlib.h" +#include "siaddrlib.h" + +/** +*************************************************************************************************** +* @brief CI specific settings structure. +*************************************************************************************************** +*/ +struct CIChipSettings +{ + struct + { + UINT_32 isSeaIsland : 1; + UINT_32 isBonaire : 1; + UINT_32 isKaveri : 1; + UINT_32 isSpectre : 1; + UINT_32 isSpooky : 1; + UINT_32 isKalindi : 1; + // Hawaii is GFXIP 7.2, similar with CI (Bonaire) + UINT_32 isHawaii : 1; + + // VI + UINT_32 isVolcanicIslands : 1; + UINT_32 isIceland : 1; + UINT_32 isTonga : 1; + UINT_32 isFiji : 1; + UINT_32 isPolaris10 : 1; + UINT_32 isPolaris11 : 1; + UINT_32 isPolaris12 : 1; + // VI fusion (Carrizo) + UINT_32 isCarrizo : 1; + }; +}; + +/** +*************************************************************************************************** +* @brief This class is the CI specific address library +* function set. +*************************************************************************************************** +*/ +class CIAddrLib : public SIAddrLib +{ +public: + /// Creates CIAddrLib object + static AddrLib* CreateObj(const AddrClient* pClient) + { + return new(pClient) CIAddrLib(pClient); + } + +private: + CIAddrLib(const AddrClient* pClient); + virtual ~CIAddrLib(); + +protected: + + // Hwl interface - defined in AddrLib + virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeFmaskInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut); + + virtual AddrChipFamily HwlConvertChipFamily( + UINT_32 uChipFamily, UINT_32 uChipRevision); + + virtual BOOL_32 HwlInitGlobalParams( + const ADDR_CREATE_INPUT* pCreateIn); + + virtual ADDR_E_RETURNCODE HwlSetupTileCfg( + INT_32 index, INT_32 macroModeIndex, ADDR_TILEINFO* pInfo, + AddrTileMode* pMode = 0, AddrTileType* pType = 0) const; + + virtual VOID HwlComputeTileDataWidthAndHeightLinear( + UINT_32* pMacroWidth, UINT_32* pMacroHeight, + UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const; + + virtual INT_32 HwlComputeMacroModeIndex( + INT_32 tileIndex, ADDR_SURFACE_FLAGS flags, UINT_32 bpp, UINT_32 numSamples, + ADDR_TILEINFO* pTileInfo, AddrTileMode* pTileMode = NULL, AddrTileType* pTileType = NULL + ) const; + + // Sub-hwl interface - defined in EgBasedAddrLib + virtual VOID HwlSetupTileInfo( + AddrTileMode tileMode, ADDR_SURFACE_FLAGS flags, + UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, + ADDR_TILEINFO* inputTileInfo, ADDR_TILEINFO* outputTileInfo, + AddrTileType inTileType, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + virtual INT_32 HwlPostCheckTileIndex( + const ADDR_TILEINFO* pInfo, AddrTileMode mode, AddrTileType type, + INT curIndex = TileIndexInvalid) const; + + virtual VOID HwlFmaskPreThunkSurfInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pFmaskIn, + const ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut, + ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut) const; + + virtual VOID HwlFmaskPostThunkSurfInfo( + const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut, + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut) const; + + virtual AddrTileMode HwlDegradeThickTileMode( + AddrTileMode baseTileMode, UINT_32 numSlices, UINT_32* pBytesPerTile) const; + + virtual BOOL_32 HwlOverrideTileMode( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + AddrTileMode* pTileMode, + AddrTileType* pTileType) const; + + virtual BOOL_32 HwlStereoCheckRightOffsetPadding() const; + + virtual ADDR_E_RETURNCODE HwlComputeDccInfo( + const ADDR_COMPUTE_DCCINFO_INPUT* pIn, + ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeCmaskAddrFromCoord( + const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const; + +protected: + virtual VOID HwlPadDimensions( + AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, + UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 padDims, UINT_32 mipLevel, + UINT_32* pPitch, UINT_32 pitchAlign, UINT_32* pHeight, UINT_32 heightAlign, + UINT_32* pSlices, UINT_32 sliceAlign) const; + +private: + VOID ReadGbTileMode( + UINT_32 regValue, ADDR_TILECONFIG* pCfg) const; + + VOID ReadGbMacroTileCfg( + UINT_32 regValue, ADDR_TILEINFO* pCfg) const; + + UINT_32 GetPrtSwitchP4Threshold() const; + + BOOL_32 InitTileSettingTable( + const UINT_32 *pSetting, UINT_32 noOfEntries); + + BOOL_32 InitMacroTileCfgTable( + const UINT_32 *pSetting, UINT_32 noOfEntries); + + UINT_64 HwlComputeMetadataNibbleAddress( + UINT_64 uncompressedDataByteAddress, + UINT_64 dataBaseByteAddress, + UINT_64 metadataBaseByteAddress, + UINT_32 metadataBitSize, + UINT_32 elementBitSize, + UINT_32 blockByteSize, + UINT_32 pipeInterleaveBytes, + UINT_32 numOfPipes, + UINT_32 numOfBanks, + UINT_32 numOfSamplesPerSplit) const; + + static const UINT_32 MacroTileTableSize = 16; + ADDR_TILEINFO m_macroTileTable[MacroTileTableSize]; + UINT_32 m_noOfMacroEntries; + BOOL_32 m_allowNonDispThickModes; + + CIChipSettings m_settings; +}; + +#endif + + diff -Nru mesa-12.0.6/src/amd/addrlib/r800/egbaddrlib.cpp mesa-17.0.7/src/amd/addrlib/r800/egbaddrlib.cpp --- mesa-12.0.6/src/amd/addrlib/r800/egbaddrlib.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/addrlib/r800/egbaddrlib.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,4577 @@ +/* + * Copyright © 2014 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +*************************************************************************************************** +* @file egbaddrlib.cpp +* @brief Contains the EgBasedAddrLib class implementation +*************************************************************************************************** +*/ + +#include "egbaddrlib.h" + +/** +*************************************************************************************************** +* EgBasedAddrLib::EgBasedAddrLib +* +* @brief +* Constructor +* +* @note +* +*************************************************************************************************** +*/ +EgBasedAddrLib::EgBasedAddrLib(const AddrClient* pClient) : + AddrLib(pClient), + m_ranks(0), + m_logicalBanks(0), + m_bankInterleave(1) +{ +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::~EgBasedAddrLib +* +* @brief +* Destructor +*************************************************************************************************** +*/ +EgBasedAddrLib::~EgBasedAddrLib() +{ +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::DispatchComputeSurfaceInfo +* +* @brief +* Compute surface sizes include padded pitch,height,slices,total size in bytes, +* meanwhile output suitable tile mode and base alignment might be changed in this +* call as well. Results are returned through output parameters. +* +* @return +* TRUE if no error occurs +*************************************************************************************************** +*/ +BOOL_32 EgBasedAddrLib::DispatchComputeSurfaceInfo( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + AddrTileMode tileMode = pIn->tileMode; + UINT_32 bpp = pIn->bpp; + UINT_32 numSamples = pIn->numSamples; + UINT_32 numFrags = ((pIn->numFrags == 0) ? numSamples : pIn->numFrags); + UINT_32 pitch = pIn->width; + UINT_32 height = pIn->height; + UINT_32 numSlices = pIn->numSlices; + UINT_32 mipLevel = pIn->mipLevel; + ADDR_SURFACE_FLAGS flags = pIn->flags; + + ADDR_TILEINFO tileInfoDef = {0}; + ADDR_TILEINFO* pTileInfo = &tileInfoDef; + + UINT_32 padDims = 0; + BOOL_32 valid; + + tileMode = DegradeLargeThickTile(tileMode, bpp); + + // Only override numSamples for NI above + if (m_chipFamily >= ADDR_CHIP_FAMILY_NI) + { + if (numFrags != numSamples) // This means EQAA + { + // The real surface size needed is determined by number of fragments + numSamples = numFrags; + } + + // Save altered numSamples in pOut + pOut->numSamples = numSamples; + } + + // Caller makes sure pOut->pTileInfo is not NULL, see HwlComputeSurfaceInfo + ADDR_ASSERT(pOut->pTileInfo); + + if (pOut->pTileInfo != NULL) + { + pTileInfo = pOut->pTileInfo; + } + + // Set default values + if (pIn->pTileInfo != NULL) + { + if (pTileInfo != pIn->pTileInfo) + { + *pTileInfo = *pIn->pTileInfo; + } + } + else + { + memset(pTileInfo, 0, sizeof(ADDR_TILEINFO)); + } + + // For macro tile mode, we should calculate default tiling parameters + HwlSetupTileInfo(tileMode, + flags, + bpp, + pitch, + height, + numSamples, + pIn->pTileInfo, + pTileInfo, + pIn->tileType, + pOut); + + if (flags.cube) + { + if (mipLevel == 0) + { + padDims = 2; + } + + if (numSlices == 1) + { + // This is calculating one face, remove cube flag + flags.cube = 0; + } + } + + switch (tileMode) + { + case ADDR_TM_LINEAR_GENERAL://fall through + case ADDR_TM_LINEAR_ALIGNED: + valid = ComputeSurfaceInfoLinear(pIn, pOut, padDims); + break; + + case ADDR_TM_1D_TILED_THIN1://fall through + case ADDR_TM_1D_TILED_THICK: + valid = ComputeSurfaceInfoMicroTiled(pIn, pOut, padDims, tileMode); + break; + + case ADDR_TM_2D_TILED_THIN1: //fall through + case ADDR_TM_2D_TILED_THICK: //fall through + case ADDR_TM_3D_TILED_THIN1: //fall through + case ADDR_TM_3D_TILED_THICK: //fall through + case ADDR_TM_2D_TILED_XTHICK: //fall through + case ADDR_TM_3D_TILED_XTHICK: //fall through + case ADDR_TM_PRT_TILED_THIN1: //fall through + case ADDR_TM_PRT_2D_TILED_THIN1://fall through + case ADDR_TM_PRT_3D_TILED_THIN1://fall through + case ADDR_TM_PRT_TILED_THICK: //fall through + case ADDR_TM_PRT_2D_TILED_THICK://fall through + case ADDR_TM_PRT_3D_TILED_THICK: + valid = ComputeSurfaceInfoMacroTiled(pIn, pOut, padDims, tileMode); + break; + + default: + valid = FALSE; + ADDR_ASSERT_ALWAYS(); + break; + } + + return valid; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::ComputeSurfaceInfoLinear +* +* @brief +* Compute linear surface sizes include padded pitch, height, slices, total size in +* bytes, meanwhile alignments as well. Since it is linear mode, so output tile mode +* will not be changed here. Results are returned through output parameters. +* +* @return +* TRUE if no error occurs +*************************************************************************************************** +*/ +BOOL_32 EgBasedAddrLib::ComputeSurfaceInfoLinear( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] Input structure + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut, ///< [out] Output structure + UINT_32 padDims ///< [in] Dimensions to padd + ) const +{ + UINT_32 expPitch = pIn->width; + UINT_32 expHeight = pIn->height; + UINT_32 expNumSlices = pIn->numSlices; + + // No linear MSAA on real H/W, keep this for TGL + UINT_32 numSamples = pOut->numSamples; + + const UINT_32 microTileThickness = 1; + + // + // Compute the surface alignments. + // + ComputeSurfaceAlignmentsLinear(pIn->tileMode, + pIn->bpp, + pIn->flags, + &pOut->baseAlign, + &pOut->pitchAlign, + &pOut->heightAlign); + + if ((pIn->tileMode == ADDR_TM_LINEAR_GENERAL) && pIn->flags.color && (pIn->height > 1)) + { +#if !ALT_TEST + // When linear_general surface is accessed in multiple lines, it requires 8 pixels in pitch + // alignment since PITCH_TILE_MAX is in unit of 8 pixels. + // It is OK if it is accessed per line. + ADDR_ASSERT((pIn->width % 8) == 0); +#endif + } + + pOut->depthAlign = microTileThickness; + + expPitch = HwlPreHandleBaseLvl3xPitch(pIn, expPitch); + + // + // Pad pitch and height to the required granularities. + // + PadDimensions(pIn->tileMode, + pIn->bpp, + pIn->flags, + numSamples, + pOut->pTileInfo, + padDims, + pIn->mipLevel, + &expPitch, pOut->pitchAlign, + &expHeight, pOut->heightAlign, + &expNumSlices, microTileThickness); + + expPitch = HwlPostHandleBaseLvl3xPitch(pIn, expPitch); + + // + // Adjust per HWL + // + + UINT_64 logicalSliceSize; + + logicalSliceSize = HwlGetSizeAdjustmentLinear(pIn->tileMode, + pIn->bpp, + numSamples, + pOut->baseAlign, + pOut->pitchAlign, + &expPitch, + &expHeight, + &pOut->heightAlign); + + + pOut->pitch = expPitch; + pOut->height = expHeight; + pOut->depth = expNumSlices; + + pOut->surfSize = logicalSliceSize * expNumSlices; + + pOut->tileMode = pIn->tileMode; + + return TRUE; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::ComputeSurfaceInfoMicroTiled +* +* @brief +* Compute 1D/Micro Tiled surface sizes include padded pitch, height, slices, total +* size in bytes, meanwhile alignments as well. Results are returned through output +* parameters. +* +* @return +* TRUE if no error occurs +*************************************************************************************************** +*/ +BOOL_32 EgBasedAddrLib::ComputeSurfaceInfoMicroTiled( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] Input structure + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut, ///< [out] Output structure + UINT_32 padDims, ///< [in] Dimensions to padd + AddrTileMode expTileMode ///< [in] Expected tile mode + ) const +{ + BOOL_32 valid = TRUE; + + UINT_32 microTileThickness; + UINT_32 expPitch = pIn->width; + UINT_32 expHeight = pIn->height; + UINT_32 expNumSlices = pIn->numSlices; + + // No 1D MSAA on real H/W, keep this for TGL + UINT_32 numSamples = pOut->numSamples; + + // + // Compute the micro tile thickness. + // + microTileThickness = ComputeSurfaceThickness(expTileMode); + + // + // Extra override for mip levels + // + if (pIn->mipLevel > 0) + { + // + // Reduce tiling mode from thick to thin if the number of slices is less than the + // micro tile thickness. + // + if ((expTileMode == ADDR_TM_1D_TILED_THICK) && + (expNumSlices < ThickTileThickness)) + { + expTileMode = HwlDegradeThickTileMode(ADDR_TM_1D_TILED_THICK, expNumSlices, NULL); + if (expTileMode != ADDR_TM_1D_TILED_THICK) + { + microTileThickness = 1; + } + } + } + + // + // Compute the surface restrictions. + // + ComputeSurfaceAlignmentsMicroTiled(expTileMode, + pIn->bpp, + pIn->flags, + pIn->mipLevel, + numSamples, + &pOut->baseAlign, + &pOut->pitchAlign, + &pOut->heightAlign); + + pOut->depthAlign = microTileThickness; + + // + // Pad pitch and height to the required granularities. + // Compute surface size. + // Return parameters. + // + PadDimensions(expTileMode, + pIn->bpp, + pIn->flags, + numSamples, + pOut->pTileInfo, + padDims, + pIn->mipLevel, + &expPitch, pOut->pitchAlign, + &expHeight, pOut->heightAlign, + &expNumSlices, microTileThickness); + + // + // Get HWL specific pitch adjustment + // + UINT_64 logicalSliceSize = HwlGetSizeAdjustmentMicroTiled(microTileThickness, + pIn->bpp, + pIn->flags, + numSamples, + pOut->baseAlign, + pOut->pitchAlign, + &expPitch, + &expHeight); + + + pOut->pitch = expPitch; + pOut->height = expHeight; + pOut->depth = expNumSlices; + + pOut->surfSize = logicalSliceSize * expNumSlices; + + pOut->tileMode = expTileMode; + + return valid; +} + + +/** +*************************************************************************************************** +* EgBasedAddrLib::ComputeSurfaceInfoMacroTiled +* +* @brief +* Compute 2D/macro tiled surface sizes include padded pitch, height, slices, total +* size in bytes, meanwhile output suitable tile mode and alignments might be changed +* in this call as well. Results are returned through output parameters. +* +* @return +* TRUE if no error occurs +*************************************************************************************************** +*/ +BOOL_32 EgBasedAddrLib::ComputeSurfaceInfoMacroTiled( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] Input structure + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut, ///< [out] Output structure + UINT_32 padDims, ///< [in] Dimensions to padd + AddrTileMode expTileMode ///< [in] Expected tile mode + ) const +{ + BOOL_32 valid = TRUE; + + AddrTileMode origTileMode = expTileMode; + UINT_32 microTileThickness; + + UINT_32 paddedPitch; + UINT_32 paddedHeight; + UINT_64 bytesPerSlice; + + UINT_32 expPitch = pIn->width; + UINT_32 expHeight = pIn->height; + UINT_32 expNumSlices = pIn->numSlices; + + UINT_32 numSamples = pOut->numSamples; + + // + // Compute the surface restrictions as base + // SanityCheckMacroTiled is called in ComputeSurfaceAlignmentsMacroTiled + // + valid = ComputeSurfaceAlignmentsMacroTiled(expTileMode, + pIn->bpp, + pIn->flags, + pIn->mipLevel, + numSamples, + pOut->pTileInfo, + &pOut->baseAlign, + &pOut->pitchAlign, + &pOut->heightAlign); + + if (valid) + { + // + // Compute the micro tile thickness. + // + microTileThickness = ComputeSurfaceThickness(expTileMode); + + // + // Find the correct tiling mode for mip levels + // + if (pIn->mipLevel > 0) + { + // + // Try valid tile mode + // + expTileMode = ComputeSurfaceMipLevelTileMode(expTileMode, + pIn->bpp, + expPitch, + expHeight, + expNumSlices, + numSamples, + pOut->pitchAlign, + pOut->heightAlign, + pOut->pTileInfo); + + if (!IsMacroTiled(expTileMode)) // Downgraded to micro-tiled + { + return ComputeSurfaceInfoMicroTiled(pIn, pOut, padDims, expTileMode); + } + else + { + if (microTileThickness != ComputeSurfaceThickness(expTileMode)) + { + // + // Re-compute if thickness changed since bank-height may be changed! + // + return ComputeSurfaceInfoMacroTiled(pIn, pOut, padDims, expTileMode); + } + } + } + + paddedPitch = expPitch; + paddedHeight = expHeight; + + // + // Re-cal alignment + // + if (expTileMode != origTileMode) // Tile mode is changed but still macro-tiled + { + valid = ComputeSurfaceAlignmentsMacroTiled(expTileMode, + pIn->bpp, + pIn->flags, + pIn->mipLevel, + numSamples, + pOut->pTileInfo, + &pOut->baseAlign, + &pOut->pitchAlign, + &pOut->heightAlign); + } + + // + // Do padding + // + PadDimensions(expTileMode, + pIn->bpp, + pIn->flags, + numSamples, + pOut->pTileInfo, + padDims, + pIn->mipLevel, + &paddedPitch, pOut->pitchAlign, + &paddedHeight, pOut->heightAlign, + &expNumSlices, microTileThickness); + + if (pIn->flags.qbStereo && + (pOut->pStereoInfo != NULL) && + HwlStereoCheckRightOffsetPadding()) + { + // Eye height's bank bits are different from y == 0? + // Since 3D rendering treats right eye buffer starting from y == "eye height" while + // display engine treats it to be 0, so the bank bits may be different, we pad + // more in height to make sure y == "eye height" has the same bank bits as y == 0. + UINT_32 checkMask = pOut->pTileInfo->banks - 1; + UINT_32 bankBits = 0; + do + { + bankBits = (paddedHeight / 8 / pOut->pTileInfo->bankHeight) & checkMask; + + if (bankBits) + { + paddedHeight += pOut->heightAlign; + } + } while (bankBits); + } + + // + // Compute the size of a slice. + // + bytesPerSlice = BITS_TO_BYTES(static_cast(paddedPitch) * + paddedHeight * NextPow2(pIn->bpp) * numSamples); + + pOut->pitch = paddedPitch; + // Put this check right here to workaround special mipmap cases which the original height + // is needed. + // The original height is pre-stored in pOut->height in PostComputeMipLevel and + // pOut->pitch is needed in HwlCheckLastMacroTiledLvl, too. + if (m_configFlags.checkLast2DLevel && numSamples == 1) // Don't check MSAA + { + // Set a TRUE in pOut if next Level is the first 1D sub level + HwlCheckLastMacroTiledLvl(pIn, pOut); + } + pOut->height = paddedHeight; + + pOut->depth = expNumSlices; + + pOut->surfSize = bytesPerSlice * expNumSlices; + + pOut->tileMode = expTileMode; + + pOut->depthAlign = microTileThickness; + + } // if (valid) + + return valid; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::ComputeSurfaceAlignmentsLinear +* +* @brief +* Compute linear surface alignment, calculation results are returned through +* output parameters. +* +* @return +* TRUE if no error occurs +*************************************************************************************************** +*/ +BOOL_32 EgBasedAddrLib::ComputeSurfaceAlignmentsLinear( + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 bpp, ///< [in] bits per pixel + ADDR_SURFACE_FLAGS flags, ///< [in] surface flags + UINT_32* pBaseAlign, ///< [out] base address alignment in bytes + UINT_32* pPitchAlign, ///< [out] pitch alignment in pixels + UINT_32* pHeightAlign ///< [out] height alignment in pixels + ) const +{ + BOOL_32 valid = TRUE; + + switch (tileMode) + { + case ADDR_TM_LINEAR_GENERAL: + // + // The required base alignment and pitch and height granularities is to 1 element. + // + *pBaseAlign = (bpp > 8) ? bpp / 8 : 1; + *pPitchAlign = 1; + *pHeightAlign = 1; + break; + case ADDR_TM_LINEAR_ALIGNED: + // + // The required alignment for base is the pipe interleave size. + // The required granularity for pitch is hwl dependent. + // The required granularity for height is one row. + // + *pBaseAlign = m_pipeInterleaveBytes; + *pPitchAlign = HwlGetPitchAlignmentLinear(bpp, flags); + *pHeightAlign = 1; + break; + default: + *pBaseAlign = 1; + *pPitchAlign = 1; + *pHeightAlign = 1; + ADDR_UNHANDLED_CASE(); + break; + } + + AdjustPitchAlignment(flags, pPitchAlign); + + return valid; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::ComputeSurfaceAlignmentsMicroTiled +* +* @brief +* Compute 1D tiled surface alignment, calculation results are returned through +* output parameters. +* +* @return +* TRUE if no error occurs +*************************************************************************************************** +*/ +BOOL_32 EgBasedAddrLib::ComputeSurfaceAlignmentsMicroTiled( + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 bpp, ///< [in] bits per pixel + ADDR_SURFACE_FLAGS flags, ///< [in] surface flags + UINT_32 mipLevel, ///< [in] mip level + UINT_32 numSamples, ///< [in] number of samples + UINT_32* pBaseAlign, ///< [out] base address alignment in bytes + UINT_32* pPitchAlign, ///< [out] pitch alignment in pixels + UINT_32* pHeightAlign ///< [out] height alignment in pixels + ) const +{ + BOOL_32 valid = TRUE; + + // + // The required alignment for base is the pipe interleave size. + // + *pBaseAlign = m_pipeInterleaveBytes; + + *pPitchAlign = HwlGetPitchAlignmentMicroTiled(tileMode, bpp, flags, numSamples); + + *pHeightAlign = MicroTileHeight; + + AdjustPitchAlignment(flags, pPitchAlign); + + // ECR#393489 + // Workaround 2 for 1D tiling - There is HW bug for Carrizo + // where it requires the following alignments for 1D tiling. + if (flags.czDispCompatible && (mipLevel == 0)) + { + *pBaseAlign = PowTwoAlign(*pBaseAlign, 4096); //Base address MOD 4096 = 0 + *pPitchAlign = PowTwoAlign(*pPitchAlign, 512 / (BITS_TO_BYTES(bpp))); //(8 lines * pitch * bytes per pixel) MOD 4096 = 0 + } + // end Carrizo workaround for 1D tilling + + return valid; +} + + +/** +*************************************************************************************************** +* EgBasedAddrLib::HwlReduceBankWidthHeight +* +* @brief +* Additional checks, reduce bankHeight/bankWidth if needed and possible +* tileSize*BANK_WIDTH*BANK_HEIGHT <= ROW_SIZE +* +* @return +* TRUE if no error occurs +*************************************************************************************************** +*/ +BOOL_32 EgBasedAddrLib::HwlReduceBankWidthHeight( + UINT_32 tileSize, ///< [in] tile size + UINT_32 bpp, ///< [in] bits per pixel + ADDR_SURFACE_FLAGS flags, ///< [in] surface flags + UINT_32 numSamples, ///< [in] number of samples + UINT_32 bankHeightAlign, ///< [in] bank height alignment + UINT_32 pipes, ///< [in] pipes + ADDR_TILEINFO* pTileInfo ///< [in/out] bank structure. + ) const +{ + UINT_32 macroAspectAlign; + BOOL_32 valid = TRUE; + + if (tileSize * pTileInfo->bankWidth * pTileInfo->bankHeight > m_rowSize) + { + BOOL_32 stillGreater = TRUE; + + // Try reducing bankWidth first + if (stillGreater && pTileInfo->bankWidth > 1) + { + while (stillGreater && pTileInfo->bankWidth > 0) + { + pTileInfo->bankWidth >>= 1; + + if (pTileInfo->bankWidth == 0) + { + pTileInfo->bankWidth = 1; + break; + } + + stillGreater = + tileSize * pTileInfo->bankWidth * pTileInfo->bankHeight > m_rowSize; + } + + // bankWidth is reduced above, so we need to recalculate bankHeight and ratio + bankHeightAlign = Max(1u, + m_pipeInterleaveBytes * m_bankInterleave / + (tileSize * pTileInfo->bankWidth) + ); + + // We cannot increase bankHeight so just assert this case. + ADDR_ASSERT((pTileInfo->bankHeight % bankHeightAlign) == 0); + + if (numSamples == 1) + { + macroAspectAlign = Max(1u, + m_pipeInterleaveBytes * m_bankInterleave / + (tileSize * pipes * pTileInfo->bankWidth) + ); + pTileInfo->macroAspectRatio = PowTwoAlign(pTileInfo->macroAspectRatio, + macroAspectAlign); + } + } + + // Early quit bank_height degradation for "64" bit z buffer + if (flags.depth && bpp >= 64) + { + stillGreater = FALSE; + } + + // Then try reducing bankHeight + if (stillGreater && pTileInfo->bankHeight > bankHeightAlign) + { + while (stillGreater && pTileInfo->bankHeight > bankHeightAlign) + { + pTileInfo->bankHeight >>= 1; + + if (pTileInfo->bankHeight < bankHeightAlign) + { + pTileInfo->bankHeight = bankHeightAlign; + break; + } + + stillGreater = + tileSize * pTileInfo->bankWidth * pTileInfo->bankHeight > m_rowSize; + } + } + + valid = !stillGreater; + + // Generate a warning if we still fail to meet this constraint + if (!valid) + { + ADDR_WARN( + 0, ("TILE_SIZE(%d)*BANK_WIDTH(%d)*BANK_HEIGHT(%d) <= ROW_SIZE(%d)", + tileSize, pTileInfo->bankWidth, pTileInfo->bankHeight, m_rowSize)); + } + } + + return valid; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::ComputeSurfaceAlignmentsMacroTiled +* +* @brief +* Compute 2D tiled surface alignment, calculation results are returned through +* output parameters. +* +* @return +* TRUE if no error occurs +*************************************************************************************************** +*/ +BOOL_32 EgBasedAddrLib::ComputeSurfaceAlignmentsMacroTiled( + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 bpp, ///< [in] bits per pixel + ADDR_SURFACE_FLAGS flags, ///< [in] surface flags + UINT_32 mipLevel, ///< [in] mip level + UINT_32 numSamples, ///< [in] number of samples + ADDR_TILEINFO* pTileInfo, ///< [in/out] bank structure. + UINT_32* pBaseAlign, ///< [out] base address alignment in bytes + UINT_32* pPitchAlign, ///< [out] pitch alignment in pixels + UINT_32* pHeightAlign ///< [out] height alignment in pixels + ) const +{ + BOOL_32 valid = SanityCheckMacroTiled(pTileInfo); + + if (valid) + { + UINT_32 macroTileWidth; + UINT_32 macroTileHeight; + + UINT_32 tileSize; + UINT_32 bankHeightAlign; + UINT_32 macroAspectAlign; + + UINT_32 thickness = ComputeSurfaceThickness(tileMode); + UINT_32 pipes = HwlGetPipes(pTileInfo); + + // + // Align bank height first according to latest h/w spec + // + + // tile_size = MIN(tile_split, 64 * tile_thickness * element_bytes * num_samples) + tileSize = Min(pTileInfo->tileSplitBytes, + BITS_TO_BYTES(64 * thickness * bpp * numSamples)); + + // bank_height_align = + // MAX(1, (pipe_interleave_bytes * bank_interleave)/(tile_size*bank_width)) + bankHeightAlign = Max(1u, + m_pipeInterleaveBytes * m_bankInterleave / + (tileSize * pTileInfo->bankWidth) + ); + + pTileInfo->bankHeight = PowTwoAlign(pTileInfo->bankHeight, bankHeightAlign); + + // num_pipes * bank_width * macro_tile_aspect >= + // (pipe_interleave_size * bank_interleave) / tile_size + if (numSamples == 1) + { + // this restriction is only for mipmap (mipmap's numSamples must be 1) + macroAspectAlign = Max(1u, + m_pipeInterleaveBytes * m_bankInterleave / + (tileSize * pipes * pTileInfo->bankWidth) + ); + pTileInfo->macroAspectRatio = PowTwoAlign(pTileInfo->macroAspectRatio, macroAspectAlign); + } + + valid = HwlReduceBankWidthHeight(tileSize, + bpp, + flags, + numSamples, + bankHeightAlign, + pipes, + pTileInfo); + + // + // The required granularity for pitch is the macro tile width. + // + macroTileWidth = MicroTileWidth * pTileInfo->bankWidth * pipes * + pTileInfo->macroAspectRatio; + + *pPitchAlign = macroTileWidth; + + AdjustPitchAlignment(flags, pPitchAlign); + + // + // The required granularity for height is the macro tile height. + // + macroTileHeight = MicroTileHeight * pTileInfo->bankHeight * pTileInfo->banks / + pTileInfo->macroAspectRatio; + + *pHeightAlign = macroTileHeight; + + // + // Compute base alignment + // + *pBaseAlign = pipes * + pTileInfo->bankWidth * pTileInfo->banks * pTileInfo->bankHeight * tileSize; + + if ((mipLevel == 0) && (flags.prt) && (m_chipFamily == ADDR_CHIP_FAMILY_SI)) + { + static const UINT_32 PrtTileSize = 0x10000; + + UINT_32 macroTileSize = macroTileWidth * macroTileHeight * numSamples * bpp / 8; + + if (macroTileSize < PrtTileSize) + { + UINT_32 numMacroTiles = PrtTileSize / macroTileSize; + + ADDR_ASSERT((PrtTileSize % macroTileSize) == 0); + + *pPitchAlign *= numMacroTiles; + *pBaseAlign *= numMacroTiles; + } + } + } + + return valid; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::SanityCheckMacroTiled +* +* @brief +* Check if macro-tiled parameters are valid +* @return +* TRUE if valid +*************************************************************************************************** +*/ +BOOL_32 EgBasedAddrLib::SanityCheckMacroTiled( + ADDR_TILEINFO* pTileInfo ///< [in] macro-tiled parameters + ) const +{ + BOOL_32 valid = TRUE; + UINT_32 numPipes = HwlGetPipes(pTileInfo); + + switch (pTileInfo->banks) + { + case 2: //fall through + case 4: //fall through + case 8: //fall through + case 16: + break; + default: + valid = FALSE; + break; + + } + + if (valid) + { + switch (pTileInfo->bankWidth) + { + case 1: //fall through + case 2: //fall through + case 4: //fall through + case 8: + break; + default: + valid = FALSE; + break; + } + } + + if (valid) + { + switch (pTileInfo->bankHeight) + { + case 1: //fall through + case 2: //fall through + case 4: //fall through + case 8: + break; + default: + valid = FALSE; + break; + } + } + + if (valid) + { + switch (pTileInfo->macroAspectRatio) + { + case 1: //fall through + case 2: //fall through + case 4: //fall through + case 8: + break; + default: + valid = FALSE; + break; + } + } + + if (valid) + { + if (pTileInfo->banks < pTileInfo->macroAspectRatio) + { + // This will generate macro tile height <= 1 + valid = FALSE; + } + } + + if (valid) + { + if (pTileInfo->tileSplitBytes > m_rowSize) + { + valid = FALSE; + } + } + + if (valid) + { + valid = HwlSanityCheckMacroTiled(pTileInfo); + } + + ADDR_ASSERT(valid == TRUE); + + // Add this assert for guidance + ADDR_ASSERT(numPipes * pTileInfo->banks >= 4); + + return valid; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::ComputeSurfaceMipLevelTileMode +* +* @brief +* Compute valid tile mode for surface mipmap sub-levels +* +* @return +* Suitable tile mode +*************************************************************************************************** +*/ +AddrTileMode EgBasedAddrLib::ComputeSurfaceMipLevelTileMode( + AddrTileMode baseTileMode, ///< [in] base tile mode + UINT_32 bpp, ///< [in] bits per pixels + UINT_32 pitch, ///< [in] current level pitch + UINT_32 height, ///< [in] current level height + UINT_32 numSlices, ///< [in] current number of slices + UINT_32 numSamples, ///< [in] number of samples + UINT_32 pitchAlign, ///< [in] pitch alignment + UINT_32 heightAlign, ///< [in] height alignment + ADDR_TILEINFO* pTileInfo ///< [in] ptr to bank structure + ) const +{ + UINT_32 bytesPerTile; + + AddrTileMode expTileMode = baseTileMode; + UINT_32 microTileThickness = ComputeSurfaceThickness(expTileMode); + UINT_32 interleaveSize = m_pipeInterleaveBytes * m_bankInterleave; + + // + // Compute the size of a slice. + // + bytesPerTile = BITS_TO_BYTES(MicroTilePixels * microTileThickness * NextPow2(bpp) * numSamples); + + // + // Reduce tiling mode from thick to thin if the number of slices is less than the + // micro tile thickness. + // + if (numSlices < microTileThickness) + { + expTileMode = HwlDegradeThickTileMode(expTileMode, numSlices, &bytesPerTile); + } + + if (bytesPerTile > pTileInfo->tileSplitBytes) + { + bytesPerTile = pTileInfo->tileSplitBytes; + } + + UINT_32 threshold1 = + bytesPerTile * HwlGetPipes(pTileInfo) * pTileInfo->bankWidth * pTileInfo->macroAspectRatio; + + UINT_32 threshold2 = + bytesPerTile * pTileInfo->bankWidth * pTileInfo->bankHeight; + + // + // Reduce the tile mode from 2D/3D to 1D in following conditions + // + switch (expTileMode) + { + case ADDR_TM_2D_TILED_THIN1: //fall through + case ADDR_TM_3D_TILED_THIN1: + case ADDR_TM_PRT_TILED_THIN1: + case ADDR_TM_PRT_2D_TILED_THIN1: + case ADDR_TM_PRT_3D_TILED_THIN1: + if ((pitch < pitchAlign) || + (height < heightAlign) || + (interleaveSize > threshold1) || + (interleaveSize > threshold2)) + { + expTileMode = ADDR_TM_1D_TILED_THIN1; + } + break; + case ADDR_TM_2D_TILED_THICK: //fall through + case ADDR_TM_3D_TILED_THICK: + case ADDR_TM_2D_TILED_XTHICK: + case ADDR_TM_3D_TILED_XTHICK: + case ADDR_TM_PRT_TILED_THICK: + case ADDR_TM_PRT_2D_TILED_THICK: + case ADDR_TM_PRT_3D_TILED_THICK: + if ((pitch < pitchAlign) || + (height < heightAlign)) + { + expTileMode = ADDR_TM_1D_TILED_THICK; + } + break; + default: + break; + } + + return expTileMode; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::HwlDegradeBaseLevel +* @brief +* Check if degrade is needed for base level +* @return +* TRUE if degrade is suggested +*************************************************************************************************** +*/ +BOOL_32 EgBasedAddrLib::HwlDegradeBaseLevel( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const +{ + BOOL_32 degrade = FALSE; + BOOL_32 valid = TRUE; + + ADDR_ASSERT(IsMacroTiled(pIn->tileMode)); + + UINT_32 baseAlign; + UINT_32 pitchAlign; + UINT_32 heightAlign; + + ADDR_ASSERT(pIn->pTileInfo); + ADDR_TILEINFO tileInfo = *pIn->pTileInfo; + ADDR_COMPUTE_SURFACE_INFO_OUTPUT out = {0}; + + if (UseTileIndex(pIn->tileIndex)) + { + out.tileIndex = pIn->tileIndex; + out.macroModeIndex = TileIndexInvalid; + } + + HwlSetupTileInfo(pIn->tileMode, + pIn->flags, + pIn->bpp, + pIn->width, + pIn->height, + pIn->numSamples, + &tileInfo, + &tileInfo, + pIn->tileType, + &out); + + valid = ComputeSurfaceAlignmentsMacroTiled(pIn->tileMode, + pIn->bpp, + pIn->flags, + pIn->mipLevel, + pIn->numSamples, + &tileInfo, + &baseAlign, + &pitchAlign, + &heightAlign); + + if (valid) + { + degrade = (pIn->width < pitchAlign || pIn->height < heightAlign); + } + else + { + degrade = TRUE; + } + + return degrade; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::HwlDegradeThickTileMode +* +* @brief +* Degrades valid tile mode for thick modes if needed +* +* @return +* Suitable tile mode +*************************************************************************************************** +*/ +AddrTileMode EgBasedAddrLib::HwlDegradeThickTileMode( + AddrTileMode baseTileMode, ///< [in] base tile mode + UINT_32 numSlices, ///< [in] current number of slices + UINT_32* pBytesPerTile ///< [in/out] pointer to bytes per slice + ) const +{ + ADDR_ASSERT(numSlices < ComputeSurfaceThickness(baseTileMode)); + // if pBytesPerTile is NULL, this is a don't-care.... + UINT_32 bytesPerTile = pBytesPerTile != NULL ? *pBytesPerTile : 64; + + AddrTileMode expTileMode = baseTileMode; + switch (baseTileMode) + { + case ADDR_TM_1D_TILED_THICK: + expTileMode = ADDR_TM_1D_TILED_THIN1; + bytesPerTile >>= 2; + break; + case ADDR_TM_2D_TILED_THICK: + expTileMode = ADDR_TM_2D_TILED_THIN1; + bytesPerTile >>= 2; + break; + case ADDR_TM_3D_TILED_THICK: + expTileMode = ADDR_TM_3D_TILED_THIN1; + bytesPerTile >>= 2; + break; + case ADDR_TM_2D_TILED_XTHICK: + if (numSlices < ThickTileThickness) + { + expTileMode = ADDR_TM_2D_TILED_THIN1; + bytesPerTile >>= 3; + } + else + { + expTileMode = ADDR_TM_2D_TILED_THICK; + bytesPerTile >>= 1; + } + break; + case ADDR_TM_3D_TILED_XTHICK: + if (numSlices < ThickTileThickness) + { + expTileMode = ADDR_TM_3D_TILED_THIN1; + bytesPerTile >>= 3; + } + else + { + expTileMode = ADDR_TM_3D_TILED_THICK; + bytesPerTile >>= 1; + } + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + + if (pBytesPerTile != NULL) + { + *pBytesPerTile = bytesPerTile; + } + + return expTileMode; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::DispatchComputeSurfaceAddrFromCoord +* +* @brief +* Compute surface address from given coord (x, y, slice,sample) +* +* @return +* Address in bytes +*************************************************************************************************** +*/ +UINT_64 EgBasedAddrLib::DispatchComputeSurfaceAddrFromCoord( + const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure + ) const +{ + UINT_32 x = pIn->x; + UINT_32 y = pIn->y; + UINT_32 slice = pIn->slice; + UINT_32 sample = pIn->sample; + UINT_32 bpp = pIn->bpp; + UINT_32 pitch = pIn->pitch; + UINT_32 height = pIn->height; + UINT_32 numSlices = pIn->numSlices; + UINT_32 numSamples = ((pIn->numSamples == 0) ? 1 : pIn->numSamples); + UINT_32 numFrags = ((pIn->numFrags == 0) ? numSamples : pIn->numFrags); + AddrTileMode tileMode = pIn->tileMode; + AddrTileType microTileType = pIn->tileType; + BOOL_32 ignoreSE = pIn->ignoreSE; + BOOL_32 isDepthSampleOrder = pIn->isDepth; + ADDR_TILEINFO* pTileInfo = pIn->pTileInfo; + + UINT_32* pBitPosition = &pOut->bitPosition; + UINT_64 addr; + +#if ADDR_AM_BUILD + UINT_32 addr5Bit = 0; + UINT_32 addr5Swizzle = pIn->addr5Swizzle; + BOOL_32 is32ByteTile = pIn->is32ByteTile; +#endif + + // ADDR_DEPTH_SAMPLE_ORDER = non-disp + depth-sample-order + if (microTileType == ADDR_DEPTH_SAMPLE_ORDER) + { + isDepthSampleOrder = TRUE; + } + + if (m_chipFamily >= ADDR_CHIP_FAMILY_NI) + { + if (numFrags != numSamples) + { + numSamples = numFrags; + ADDR_ASSERT(sample < numSamples); + } + + /// @note + /// 128 bit/thick tiled surface doesn't support display tiling and + /// mipmap chain must have the same tileType, so please fill tileType correctly + if (!IsLinear(pIn->tileMode)) + { + if (bpp >= 128 || ComputeSurfaceThickness(tileMode) > 1) + { + ADDR_ASSERT(microTileType != ADDR_DISPLAYABLE); + } + } + } + + switch (tileMode) + { + case ADDR_TM_LINEAR_GENERAL://fall through + case ADDR_TM_LINEAR_ALIGNED: + addr = ComputeSurfaceAddrFromCoordLinear(x, + y, + slice, + sample, + bpp, + pitch, + height, + numSlices, + pBitPosition); + break; + case ADDR_TM_1D_TILED_THIN1://fall through + case ADDR_TM_1D_TILED_THICK: + addr = ComputeSurfaceAddrFromCoordMicroTiled(x, + y, + slice, + sample, + bpp, + pitch, + height, + numSamples, + tileMode, + microTileType, + isDepthSampleOrder, + pBitPosition); + break; + case ADDR_TM_2D_TILED_THIN1: //fall through + case ADDR_TM_2D_TILED_THICK: //fall through + case ADDR_TM_3D_TILED_THIN1: //fall through + case ADDR_TM_3D_TILED_THICK: //fall through + case ADDR_TM_2D_TILED_XTHICK: //fall through + case ADDR_TM_3D_TILED_XTHICK: //fall through + case ADDR_TM_PRT_TILED_THIN1: //fall through + case ADDR_TM_PRT_2D_TILED_THIN1://fall through + case ADDR_TM_PRT_3D_TILED_THIN1://fall through + case ADDR_TM_PRT_TILED_THICK: //fall through + case ADDR_TM_PRT_2D_TILED_THICK://fall through + case ADDR_TM_PRT_3D_TILED_THICK: + UINT_32 pipeSwizzle; + UINT_32 bankSwizzle; + + if (m_configFlags.useCombinedSwizzle) + { + ExtractBankPipeSwizzle(pIn->tileSwizzle, pIn->pTileInfo, + &bankSwizzle, &pipeSwizzle); + } + else + { + pipeSwizzle = pIn->pipeSwizzle; + bankSwizzle = pIn->bankSwizzle; + } + + addr = ComputeSurfaceAddrFromCoordMacroTiled(x, + y, + slice, + sample, + bpp, + pitch, + height, + numSamples, + tileMode, + microTileType, + ignoreSE, + isDepthSampleOrder, + pipeSwizzle, + bankSwizzle, + pTileInfo, + pBitPosition); + break; + default: + addr = 0; + ADDR_ASSERT_ALWAYS(); + break; + } + +#if ADDR_AM_BUILD + if (m_chipFamily >= ADDR_CHIP_FAMILY_NI) + { + if (addr5Swizzle && isDepthSampleOrder && is32ByteTile) + { + UINT_32 tx = x >> 3; + UINT_32 ty = y >> 3; + UINT_32 tileBits = ((ty&0x3) << 2) | (tx&0x3); + + tileBits = tileBits & addr5Swizzle; + addr5Bit = XorReduce(tileBits, 4); + + addr = addr | static_cast(addr5Bit << 5); + } + } +#endif + + return addr; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::ComputeSurfaceAddrFromCoordMicroTiled +* +* @brief +* Computes the surface address and bit position from a +* coordinate for 2D tilied (macro tiled) +* @return +* The byte address +*************************************************************************************************** +*/ +UINT_64 EgBasedAddrLib::ComputeSurfaceAddrFromCoordMacroTiled( + UINT_32 x, ///< [in] x coordinate + UINT_32 y, ///< [in] y coordinate + UINT_32 slice, ///< [in] slice index + UINT_32 sample, ///< [in] sample index + UINT_32 bpp, ///< [in] bits per pixel + UINT_32 pitch, ///< [in] surface pitch, in pixels + UINT_32 height, ///< [in] surface height, in pixels + UINT_32 numSamples, ///< [in] number of samples + AddrTileMode tileMode, ///< [in] tile mode + AddrTileType microTileType, ///< [in] micro tiling type + BOOL_32 ignoreSE, ///< [in] TRUE if shader enginers can be ignored + BOOL_32 isDepthSampleOrder, ///< [in] TRUE if it depth sample ordering is used + UINT_32 pipeSwizzle, ///< [in] pipe swizzle + UINT_32 bankSwizzle, ///< [in] bank swizzle + ADDR_TILEINFO* pTileInfo, ///< [in] bank structure + /// **All fields to be valid on entry** + UINT_32* pBitPosition ///< [out] bit position, e.g. FMT_1 will use this + ) const +{ + UINT_64 addr; + + UINT_32 microTileBytes; + UINT_32 microTileBits; + UINT_32 sampleOffset; + UINT_32 pixelIndex; + UINT_32 pixelOffset; + UINT_32 elementOffset; + UINT_32 tileSplitSlice; + UINT_32 pipe; + UINT_32 bank; + UINT_64 sliceBytes; + UINT_64 sliceOffset; + UINT_32 macroTilePitch; + UINT_32 macroTileHeight; + UINT_32 macroTilesPerRow; + UINT_32 macroTilesPerSlice; + UINT_64 macroTileBytes; + UINT_32 macroTileIndexX; + UINT_32 macroTileIndexY; + UINT_64 macroTileOffset; + UINT_64 totalOffset; + UINT_64 pipeInterleaveMask; + UINT_64 bankInterleaveMask; + UINT_64 pipeInterleaveOffset; + UINT_32 bankInterleaveOffset; + UINT_64 offset; + UINT_32 tileRowIndex; + UINT_32 tileColumnIndex; + UINT_32 tileIndex; + UINT_32 tileOffset; + + UINT_32 microTileThickness = ComputeSurfaceThickness(tileMode); + + // + // Compute the number of group, pipe, and bank bits. + // + UINT_32 numPipes = HwlGetPipes(pTileInfo); + UINT_32 numPipeInterleaveBits = Log2(m_pipeInterleaveBytes); + UINT_32 numPipeBits = Log2(numPipes); + UINT_32 numBankInterleaveBits = Log2(m_bankInterleave); + UINT_32 numBankBits = Log2(pTileInfo->banks); + + // + // Compute the micro tile size. + // + microTileBits = MicroTilePixels * microTileThickness * bpp * numSamples; + + microTileBytes = microTileBits / 8; + // + // Compute the pixel index within the micro tile. + // + pixelIndex = ComputePixelIndexWithinMicroTile(x, + y, + slice, + bpp, + tileMode, + microTileType); + + // + // Compute the sample offset and pixel offset. + // + if (isDepthSampleOrder) + { + // + // For depth surfaces, samples are stored contiguously for each element, so the sample + // offset is the sample number times the element size. + // + sampleOffset = sample * bpp; + pixelOffset = pixelIndex * bpp * numSamples; + } + else + { + // + // For color surfaces, all elements for a particular sample are stored contiguously, so + // the sample offset is the sample number times the micro tile size divided yBit the number + // of samples. + // + sampleOffset = sample * (microTileBits / numSamples); + pixelOffset = pixelIndex * bpp; + } + + // + // Compute the element offset. + // + elementOffset = pixelOffset + sampleOffset; + + *pBitPosition = static_cast(elementOffset % 8); + + elementOffset /= 8; //bit-to-byte + + // + // Determine if tiles need to be split across slices. + // + // If the size of the micro tile is larger than the tile split size, then the tile will be + // split across multiple slices. + // + UINT_32 slicesPerTile = 1; + + if ((microTileBytes > pTileInfo->tileSplitBytes) && (microTileThickness == 1)) + { //don't support for thick mode + + // + // Compute the number of slices per tile. + // + slicesPerTile = microTileBytes / pTileInfo->tileSplitBytes; + + // + // Compute the tile split slice number for use in rotating the bank. + // + tileSplitSlice = elementOffset / pTileInfo->tileSplitBytes; + + // + // Adjust the element offset to account for the portion of the tile that is being moved to + // a new slice.. + // + elementOffset %= pTileInfo->tileSplitBytes; + + // + // Adjust the microTileBytes size to tileSplitBytes size since + // a new slice.. + // + microTileBytes = pTileInfo->tileSplitBytes; + } + else + { + tileSplitSlice = 0; + } + + // + // Compute macro tile pitch and height. + // + macroTilePitch = + (MicroTileWidth * pTileInfo->bankWidth * numPipes) * pTileInfo->macroAspectRatio; + macroTileHeight = + (MicroTileHeight * pTileInfo->bankHeight * pTileInfo->banks) / pTileInfo->macroAspectRatio; + + // + // Compute the number of bytes per macro tile. Note: bytes of the same bank/pipe actually + // + macroTileBytes = + static_cast(microTileBytes) * + (macroTilePitch / MicroTileWidth) * (macroTileHeight / MicroTileHeight) / + (numPipes * pTileInfo->banks); + + // + // Compute the number of macro tiles per row. + // + macroTilesPerRow = pitch / macroTilePitch; + + // + // Compute the offset to the macro tile containing the specified coordinate. + // + macroTileIndexX = x / macroTilePitch; + macroTileIndexY = y / macroTileHeight; + macroTileOffset = ((macroTileIndexY * macroTilesPerRow) + macroTileIndexX) * macroTileBytes; + + // + // Compute the number of macro tiles per slice. + // + macroTilesPerSlice = macroTilesPerRow * (height / macroTileHeight); + + // + // Compute the slice size. + // + sliceBytes = macroTilesPerSlice * macroTileBytes; + + // + // Compute the slice offset. + // + sliceOffset = sliceBytes * (tileSplitSlice + slicesPerTile * (slice / microTileThickness)); + + // + // Compute tile offest + // + tileRowIndex = (y / MicroTileHeight) % pTileInfo->bankHeight; + tileColumnIndex = ((x / MicroTileWidth) / numPipes) % pTileInfo->bankWidth; + tileIndex = (tileRowIndex * pTileInfo->bankWidth) + tileColumnIndex; + tileOffset = tileIndex * microTileBytes; + + // + // Combine the slice offset and macro tile offset with the pixel and sample offsets, accounting + // for the pipe and bank bits in the middle of the address. + // + totalOffset = sliceOffset + macroTileOffset + elementOffset + tileOffset; + + // + // Get the pipe and bank. + // + + // when the tileMode is PRT type, then adjust x and y coordinates + if (IsPrtNoRotationTileMode(tileMode)) + { + x = x % macroTilePitch; + y = y % macroTileHeight; + } + + pipe = ComputePipeFromCoord(x, + y, + slice, + tileMode, + pipeSwizzle, + ignoreSE, + pTileInfo); + + bank = ComputeBankFromCoord(x, + y, + slice, + tileMode, + bankSwizzle, + tileSplitSlice, + pTileInfo); + + + // + // Split the offset to put some bits below the pipe+bank bits and some above. + // + pipeInterleaveMask = (1 << numPipeInterleaveBits) - 1; + bankInterleaveMask = (1 << numBankInterleaveBits) - 1; + pipeInterleaveOffset = totalOffset & pipeInterleaveMask; + bankInterleaveOffset = static_cast((totalOffset >> numPipeInterleaveBits) & + bankInterleaveMask); + offset = totalOffset >> (numPipeInterleaveBits + numBankInterleaveBits); + + // + // Assemble the address from its components. + // + addr = pipeInterleaveOffset; + // This is to remove /analyze warnings + UINT_32 pipeBits = pipe << numPipeInterleaveBits; + UINT_32 bankInterleaveBits = bankInterleaveOffset << (numPipeInterleaveBits + numPipeBits); + UINT_32 bankBits = bank << (numPipeInterleaveBits + numPipeBits + + numBankInterleaveBits); + UINT_64 offsetBits = offset << (numPipeInterleaveBits + numPipeBits + + numBankInterleaveBits + numBankBits); + + addr |= pipeBits; + addr |= bankInterleaveBits; + addr |= bankBits; + addr |= offsetBits; + + return addr; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::ComputeSurfaceAddrFromCoordMicroTiled +* +* @brief +* Computes the surface address and bit position from a coordinate for 1D tilied +* (micro tiled) +* @return +* The byte address +*************************************************************************************************** +*/ +UINT_64 EgBasedAddrLib::ComputeSurfaceAddrFromCoordMicroTiled( + UINT_32 x, ///< [in] x coordinate + UINT_32 y, ///< [in] y coordinate + UINT_32 slice, ///< [in] slice index + UINT_32 sample, ///< [in] sample index + UINT_32 bpp, ///< [in] bits per pixel + UINT_32 pitch, ///< [in] pitch, in pixels + UINT_32 height, ///< [in] height, in pixels + UINT_32 numSamples, ///< [in] number of samples + AddrTileMode tileMode, ///< [in] tile mode + AddrTileType microTileType, ///< [in] micro tiling type + BOOL_32 isDepthSampleOrder, ///< [in] TRUE if depth sample ordering is used + UINT_32* pBitPosition ///< [out] bit position, e.g. FMT_1 will use this + ) const +{ + UINT_64 addr = 0; + + UINT_32 microTileBytes; + UINT_64 sliceBytes; + UINT_32 microTilesPerRow; + UINT_32 microTileIndexX; + UINT_32 microTileIndexY; + UINT_32 microTileIndexZ; + UINT_64 sliceOffset; + UINT_64 microTileOffset; + UINT_32 sampleOffset; + UINT_32 pixelIndex; + UINT_32 pixelOffset; + + UINT_32 microTileThickness = ComputeSurfaceThickness(tileMode); + + // + // Compute the micro tile size. + // + microTileBytes = BITS_TO_BYTES(MicroTilePixels * microTileThickness * bpp * numSamples); + + // + // Compute the slice size. + // + sliceBytes = + BITS_TO_BYTES(static_cast(pitch) * height * microTileThickness * bpp * numSamples); + + // + // Compute the number of micro tiles per row. + // + microTilesPerRow = pitch / MicroTileWidth; + + // + // Compute the micro tile index. + // + microTileIndexX = x / MicroTileWidth; + microTileIndexY = y / MicroTileHeight; + microTileIndexZ = slice / microTileThickness; + + // + // Compute the slice offset. + // + sliceOffset = static_cast(microTileIndexZ) * sliceBytes; + + // + // Compute the offset to the micro tile containing the specified coordinate. + // + microTileOffset = (static_cast(microTileIndexY) * microTilesPerRow + microTileIndexX) * + microTileBytes; + + // + // Compute the pixel index within the micro tile. + // + pixelIndex = ComputePixelIndexWithinMicroTile(x, + y, + slice, + bpp, + tileMode, + microTileType); + + // Compute the sample offset. + // + if (isDepthSampleOrder) + { + // + // For depth surfaces, samples are stored contiguously for each element, so the sample + // offset is the sample number times the element size. + // + sampleOffset = sample * bpp; + pixelOffset = pixelIndex * bpp * numSamples; + } + else + { + // + // For color surfaces, all elements for a particular sample are stored contiguously, so + // the sample offset is the sample number times the micro tile size divided yBit the number + // of samples. + // + sampleOffset = sample * (microTileBytes*8 / numSamples); + pixelOffset = pixelIndex * bpp; + } + + // + // Compute the bit position of the pixel. Each element is stored with one bit per sample. + // + + UINT_32 elemOffset = sampleOffset + pixelOffset; + + *pBitPosition = elemOffset % 8; + elemOffset /= 8; + + // + // Combine the slice offset, micro tile offset, sample offset, and pixel offsets. + // + addr = sliceOffset + microTileOffset + elemOffset; + + return addr; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::HwlComputePixelCoordFromOffset +* +* @brief +* Compute pixel coordinate from offset inside a micro tile +* @return +* N/A +*************************************************************************************************** +*/ +VOID EgBasedAddrLib::HwlComputePixelCoordFromOffset( + UINT_32 offset, ///< [in] offset inside micro tile in bits + UINT_32 bpp, ///< [in] bits per pixel + UINT_32 numSamples, ///< [in] number of samples + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 tileBase, ///< [in] base offset within a tile + UINT_32 compBits, ///< [in] component bits actually needed(for planar surface) + UINT_32* pX, ///< [out] x coordinate + UINT_32* pY, ///< [out] y coordinate + UINT_32* pSlice, ///< [out] slice index + UINT_32* pSample, ///< [out] sample index + AddrTileType microTileType, ///< [in] micro tiling type + BOOL_32 isDepthSampleOrder ///< [in] TRUE if depth sample order in microtile is used + ) const +{ + UINT_32 x = 0; + UINT_32 y = 0; + UINT_32 z = 0; + UINT_32 thickness = ComputeSurfaceThickness(tileMode); + + // For planar surface, we adjust offset acoording to tile base + if ((bpp != compBits) && (compBits != 0) && isDepthSampleOrder) + { + offset -= tileBase; + + ADDR_ASSERT(microTileType == ADDR_NON_DISPLAYABLE || + microTileType == ADDR_DEPTH_SAMPLE_ORDER); + + bpp = compBits; + } + + UINT_32 sampleTileBits; + UINT_32 samplePixelBits; + UINT_32 pixelIndex; + + if (isDepthSampleOrder) + { + samplePixelBits = bpp * numSamples; + pixelIndex = offset / samplePixelBits; + *pSample = (offset % samplePixelBits) / bpp; + } + else + { + sampleTileBits = MicroTilePixels * bpp * thickness; + *pSample = offset / sampleTileBits; + pixelIndex = (offset % sampleTileBits) / bpp; + } + + if (microTileType != ADDR_THICK) + { + if (microTileType == ADDR_DISPLAYABLE) // displayable + { + switch (bpp) + { + case 8: + x = pixelIndex & 0x7; + y = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,3),_BIT(pixelIndex,4)); + break; + case 16: + x = pixelIndex & 0x7; + y = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,4),_BIT(pixelIndex,3)); + break; + case 32: + x = Bits2Number(3, _BIT(pixelIndex,3),_BIT(pixelIndex,1),_BIT(pixelIndex,0)); + y = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,4),_BIT(pixelIndex,2)); + break; + case 64: + x = Bits2Number(3, _BIT(pixelIndex,3),_BIT(pixelIndex,2),_BIT(pixelIndex,0)); + y = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,4),_BIT(pixelIndex,1)); + break; + case 128: + x = Bits2Number(3, _BIT(pixelIndex,3),_BIT(pixelIndex,2),_BIT(pixelIndex,1)); + y = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,4),_BIT(pixelIndex,0)); + break; + default: + break; + } + } + else if (microTileType == ADDR_NON_DISPLAYABLE || microTileType == ADDR_DEPTH_SAMPLE_ORDER) + { + x = Bits2Number(3, _BIT(pixelIndex,4),_BIT(pixelIndex,2),_BIT(pixelIndex,0)); + y = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,3),_BIT(pixelIndex,1)); + } + else if (microTileType == ADDR_ROTATED) + { + /* + 8-Bit Elements + element_index[5:0] = { x[2], x[0], x[1], y[2], y[1], y[0] } + + 16-Bit Elements + element_index[5:0] = { x[2], x[1], x[0], y[2], y[1], y[0] } + + 32-Bit Elements + element_index[5:0] = { x[2], x[1], y[2], x[0], y[1], y[0] } + + 64-Bit Elements + element_index[5:0] = { y[2], x[2], x[1], y[1], x[0], y[0] } + */ + switch(bpp) + { + case 8: + x = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,3),_BIT(pixelIndex,4)); + y = pixelIndex & 0x7; + break; + case 16: + x = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,4),_BIT(pixelIndex,3)); + y = pixelIndex & 0x7; + break; + case 32: + x = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,4),_BIT(pixelIndex,2)); + y = Bits2Number(3, _BIT(pixelIndex,3),_BIT(pixelIndex,1),_BIT(pixelIndex,0)); + break; + case 64: + x = Bits2Number(3, _BIT(pixelIndex,4),_BIT(pixelIndex,3),_BIT(pixelIndex,1)); + y = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,2),_BIT(pixelIndex,0)); + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + } + + if (thickness > 1) // thick + { + z = Bits2Number(3, _BIT(pixelIndex,8),_BIT(pixelIndex,7),_BIT(pixelIndex,6)); + } + } + else + { + ADDR_ASSERT((m_chipFamily >= ADDR_CHIP_FAMILY_CI) && (thickness > 1)); + /* + 8-Bit Elements and 16-Bit Elements + element_index[7:0] = { y[2], x[2], z[1], z[0], y[1], x[1], y[0], x[0] } + + 32-Bit Elements + element_index[7:0] = { y[2], x[2], z[1], y[1], z[0], x[1], y[0], x[0] } + + 64-Bit Elements and 128-Bit Elements + element_index[7:0] = { y[2], x[2], z[1], y[1], x[1], z[0], y[0], x[0] } + + The equation to compute the element index for the extra thick tile: + element_index[8] = z[2] + */ + switch (bpp) + { + case 8: + case 16: // fall-through + x = Bits2Number(3, _BIT(pixelIndex,6),_BIT(pixelIndex,2),_BIT(pixelIndex,0)); + y = Bits2Number(3, _BIT(pixelIndex,7),_BIT(pixelIndex,3),_BIT(pixelIndex,1)); + z = Bits2Number(2, _BIT(pixelIndex,5),_BIT(pixelIndex,4)); + break; + case 32: + x = Bits2Number(3, _BIT(pixelIndex,6),_BIT(pixelIndex,2),_BIT(pixelIndex,0)); + y = Bits2Number(3, _BIT(pixelIndex,7),_BIT(pixelIndex,4),_BIT(pixelIndex,1)); + z = Bits2Number(2, _BIT(pixelIndex,5),_BIT(pixelIndex,3)); + break; + case 64: + case 128: // fall-through + x = Bits2Number(3, _BIT(pixelIndex,6),_BIT(pixelIndex,3),_BIT(pixelIndex,0)); + y = Bits2Number(3, _BIT(pixelIndex,7),_BIT(pixelIndex,4),_BIT(pixelIndex,1)); + z = Bits2Number(2, _BIT(pixelIndex,5),_BIT(pixelIndex,2)); + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + + if (thickness == 8) + { + z += Bits2Number(3,_BIT(pixelIndex,8),0,0); + } + } + + *pX = x; + *pY = y; + *pSlice += z; +} + + +/** +*************************************************************************************************** +* EgBasedAddrLib::DispatchComputeSurfaceCoordFromAddrDispatch +* +* @brief +* Compute (x,y,slice,sample) coordinates from surface address +* @return +* N/A +*************************************************************************************************** +*/ +VOID EgBasedAddrLib::DispatchComputeSurfaceCoordFromAddr( + const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure + ) const +{ + UINT_64 addr = pIn->addr; + UINT_32 bitPosition = pIn->bitPosition; + UINT_32 bpp = pIn->bpp; + UINT_32 pitch = pIn->pitch; + UINT_32 height = pIn->height; + UINT_32 numSlices = pIn->numSlices; + UINT_32 numSamples = ((pIn->numSamples == 0) ? 1 : pIn->numSamples); + UINT_32 numFrags = ((pIn->numFrags == 0) ? numSamples : pIn->numFrags); + AddrTileMode tileMode = pIn->tileMode; + UINT_32 tileBase = pIn->tileBase; + UINT_32 compBits = pIn->compBits; + AddrTileType microTileType = pIn->tileType; + BOOL_32 ignoreSE = pIn->ignoreSE; + BOOL_32 isDepthSampleOrder = pIn->isDepth; + ADDR_TILEINFO* pTileInfo = pIn->pTileInfo; + + UINT_32* pX = &pOut->x; + UINT_32* pY = &pOut->y; + UINT_32* pSlice = &pOut->slice; + UINT_32* pSample = &pOut->sample; + + if (microTileType == ADDR_DEPTH_SAMPLE_ORDER) + { + isDepthSampleOrder = TRUE; + } + + if (m_chipFamily >= ADDR_CHIP_FAMILY_NI) + { + if (numFrags != numSamples) + { + numSamples = numFrags; + } + + /// @note + /// 128 bit/thick tiled surface doesn't support display tiling and + /// mipmap chain must have the same tileType, so please fill tileType correctly + if (!IsLinear(pIn->tileMode)) + { + if (bpp >= 128 || ComputeSurfaceThickness(tileMode) > 1) + { + ADDR_ASSERT(microTileType != ADDR_DISPLAYABLE); + } + } + } + + switch (tileMode) + { + case ADDR_TM_LINEAR_GENERAL://fall through + case ADDR_TM_LINEAR_ALIGNED: + ComputeSurfaceCoordFromAddrLinear(addr, + bitPosition, + bpp, + pitch, + height, + numSlices, + pX, + pY, + pSlice, + pSample); + break; + case ADDR_TM_1D_TILED_THIN1://fall through + case ADDR_TM_1D_TILED_THICK: + ComputeSurfaceCoordFromAddrMicroTiled(addr, + bitPosition, + bpp, + pitch, + height, + numSamples, + tileMode, + tileBase, + compBits, + pX, + pY, + pSlice, + pSample, + microTileType, + isDepthSampleOrder); + break; + case ADDR_TM_2D_TILED_THIN1: //fall through + case ADDR_TM_2D_TILED_THICK: //fall through + case ADDR_TM_3D_TILED_THIN1: //fall through + case ADDR_TM_3D_TILED_THICK: //fall through + case ADDR_TM_2D_TILED_XTHICK: //fall through + case ADDR_TM_3D_TILED_XTHICK: //fall through + case ADDR_TM_PRT_TILED_THIN1: //fall through + case ADDR_TM_PRT_2D_TILED_THIN1://fall through + case ADDR_TM_PRT_3D_TILED_THIN1://fall through + case ADDR_TM_PRT_TILED_THICK: //fall through + case ADDR_TM_PRT_2D_TILED_THICK://fall through + case ADDR_TM_PRT_3D_TILED_THICK: + UINT_32 pipeSwizzle; + UINT_32 bankSwizzle; + + if (m_configFlags.useCombinedSwizzle) + { + ExtractBankPipeSwizzle(pIn->tileSwizzle, pIn->pTileInfo, + &bankSwizzle, &pipeSwizzle); + } + else + { + pipeSwizzle = pIn->pipeSwizzle; + bankSwizzle = pIn->bankSwizzle; + } + + ComputeSurfaceCoordFromAddrMacroTiled(addr, + bitPosition, + bpp, + pitch, + height, + numSamples, + tileMode, + tileBase, + compBits, + microTileType, + ignoreSE, + isDepthSampleOrder, + pipeSwizzle, + bankSwizzle, + pTileInfo, + pX, + pY, + pSlice, + pSample); + break; + default: + ADDR_ASSERT_ALWAYS(); + } +} + + +/** +*************************************************************************************************** +* EgBasedAddrLib::ComputeSurfaceCoordFromAddrMacroTiled +* +* @brief +* Compute surface coordinates from address for macro tiled surface +* @return +* N/A +*************************************************************************************************** +*/ +VOID EgBasedAddrLib::ComputeSurfaceCoordFromAddrMacroTiled( + UINT_64 addr, ///< [in] byte address + UINT_32 bitPosition, ///< [in] bit position + UINT_32 bpp, ///< [in] bits per pixel + UINT_32 pitch, ///< [in] pitch in pixels + UINT_32 height, ///< [in] height in pixels + UINT_32 numSamples, ///< [in] number of samples + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 tileBase, ///< [in] tile base offset + UINT_32 compBits, ///< [in] component bits (for planar surface) + AddrTileType microTileType, ///< [in] micro tiling type + BOOL_32 ignoreSE, ///< [in] TRUE if shader engines can be ignored + BOOL_32 isDepthSampleOrder, ///< [in] TRUE if depth sample order is used + UINT_32 pipeSwizzle, ///< [in] pipe swizzle + UINT_32 bankSwizzle, ///< [in] bank swizzle + ADDR_TILEINFO* pTileInfo, ///< [in] bank structure. + /// **All fields to be valid on entry** + UINT_32* pX, ///< [out] X coord + UINT_32* pY, ///< [out] Y coord + UINT_32* pSlice, ///< [out] slice index + UINT_32* pSample ///< [out] sample index + ) const +{ + UINT_32 mx; + UINT_32 my; + UINT_64 tileBits; + UINT_64 macroTileBits; + UINT_32 slices; + UINT_32 tileSlices; + UINT_64 elementOffset; + UINT_64 macroTileIndex; + UINT_32 tileIndex; + UINT_64 totalOffset; + + + UINT_32 bank; + UINT_32 pipe; + UINT_32 groupBits = m_pipeInterleaveBytes << 3; + UINT_32 pipes = HwlGetPipes(pTileInfo); + UINT_32 banks = pTileInfo->banks; + + UINT_32 bankInterleave = m_bankInterleave; + + UINT_64 addrBits = BYTES_TO_BITS(addr) + bitPosition; + + // + // remove bits for bank and pipe + // + totalOffset = (addrBits % groupBits) + + (((addrBits / groupBits / pipes) % bankInterleave) * groupBits) + + (((addrBits / groupBits / pipes) / bankInterleave) / banks) * groupBits * bankInterleave; + + UINT_32 microTileThickness = ComputeSurfaceThickness(tileMode); + + UINT_32 microTileBits = bpp * microTileThickness * MicroTilePixels * numSamples; + + UINT_32 microTileBytes = BITS_TO_BYTES(microTileBits); + // + // Determine if tiles need to be split across slices. + // + // If the size of the micro tile is larger than the tile split size, then the tile will be + // split across multiple slices. + // + UINT_32 slicesPerTile = 1; //_State->TileSlices + + if ((microTileBytes > pTileInfo->tileSplitBytes) && (microTileThickness == 1)) + { //don't support for thick mode + + // + // Compute the number of slices per tile. + // + slicesPerTile = microTileBytes / pTileInfo->tileSplitBytes; + } + + tileBits = microTileBits / slicesPerTile; // micro tile bits + + // in micro tiles because not MicroTileWidth timed. + UINT_32 macroWidth = pTileInfo->bankWidth * pipes * pTileInfo->macroAspectRatio; + // in micro tiles as well + UINT_32 macroHeight = pTileInfo->bankHeight * banks / pTileInfo->macroAspectRatio; + + UINT_32 pitchInMacroTiles = pitch / MicroTileWidth / macroWidth; + + macroTileBits = (macroWidth * macroHeight) * tileBits / (banks * pipes); + + macroTileIndex = totalOffset / macroTileBits; + + // pitchMacros * height / heightMacros; macroTilesPerSlice == _State->SliceMacros + UINT_32 macroTilesPerSlice = (pitch / (macroWidth * MicroTileWidth)) * height / + (macroHeight * MicroTileWidth); + + slices = static_cast(macroTileIndex / macroTilesPerSlice); + + *pSlice = static_cast(slices / slicesPerTile * microTileThickness); + + // + // calculate element offset and x[2:0], y[2:0], z[1:0] for thick + // + tileSlices = slices % slicesPerTile; + + elementOffset = tileSlices * tileBits; + elementOffset += totalOffset % tileBits; + + UINT_32 coordZ = 0; + + HwlComputePixelCoordFromOffset(static_cast(elementOffset), + bpp, + numSamples, + tileMode, + tileBase, + compBits, + pX, + pY, + &coordZ, + pSample, + microTileType, + isDepthSampleOrder); + + macroTileIndex = macroTileIndex % macroTilesPerSlice; + *pY += static_cast(macroTileIndex / pitchInMacroTiles * macroHeight * MicroTileHeight); + *pX += static_cast(macroTileIndex % pitchInMacroTiles * macroWidth * MicroTileWidth); + + *pSlice += coordZ; + + tileIndex = static_cast((totalOffset % macroTileBits) / tileBits); + + my = (tileIndex / pTileInfo->bankWidth) % pTileInfo->bankHeight * MicroTileHeight; + mx = (tileIndex % pTileInfo->bankWidth) * pipes * MicroTileWidth; + + *pY += my; + *pX += mx; + + bank = ComputeBankFromAddr(addr, banks, pipes); + pipe = ComputePipeFromAddr(addr, pipes); + + HwlComputeSurfaceCoord2DFromBankPipe(tileMode, + pX, + pY, + *pSlice, + bank, + pipe, + bankSwizzle, + pipeSwizzle, + tileSlices, + ignoreSE, + pTileInfo); +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::ComputeSurfaceCoord2DFromBankPipe +* +* @brief +* Compute surface x,y coordinates from bank/pipe info +* @return +* N/A +*************************************************************************************************** +*/ +VOID EgBasedAddrLib::ComputeSurfaceCoord2DFromBankPipe( + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 x, ///< [in] x coordinate + UINT_32 y, ///< [in] y coordinate + UINT_32 slice, ///< [in] slice index + UINT_32 bank, ///< [in] bank number + UINT_32 pipe, ///< [in] pipe number + UINT_32 bankSwizzle,///< [in] bank swizzle + UINT_32 pipeSwizzle,///< [in] pipe swizzle + UINT_32 tileSlices, ///< [in] slices in a micro tile + ADDR_TILEINFO* pTileInfo, ///< [in] bank structure. **All fields to be valid on entry** + CoordFromBankPipe* pOutput ///< [out] pointer to extracted x/y bits + ) const +{ + UINT_32 yBit3 = 0; + UINT_32 yBit4 = 0; + UINT_32 yBit5 = 0; + UINT_32 yBit6 = 0; + + UINT_32 xBit3 = 0; + UINT_32 xBit4 = 0; + UINT_32 xBit5 = 0; + + UINT_32 tileSplitRotation; + + UINT_32 numPipes = HwlGetPipes(pTileInfo); + + UINT_32 bankRotation = ComputeBankRotation(tileMode, + pTileInfo->banks, numPipes); + + UINT_32 pipeRotation = ComputePipeRotation(tileMode, numPipes); + + UINT_32 xBit = x / (MicroTileWidth * pTileInfo->bankWidth * numPipes); + UINT_32 yBit = y / (MicroTileHeight * pTileInfo->bankHeight); + + //calculate the bank and pipe before rotation and swizzle + + switch (tileMode) + { + case ADDR_TM_2D_TILED_THIN1: //fall through + case ADDR_TM_2D_TILED_THICK: //fall through + case ADDR_TM_2D_TILED_XTHICK: //fall through + case ADDR_TM_3D_TILED_THIN1: //fall through + case ADDR_TM_3D_TILED_THICK: //fall through + case ADDR_TM_3D_TILED_XTHICK: + tileSplitRotation = ((pTileInfo->banks / 2) + 1); + break; + default: + tileSplitRotation = 0; + break; + } + + UINT_32 microTileThickness = ComputeSurfaceThickness(tileMode); + + bank ^= tileSplitRotation * tileSlices; + if (pipeRotation == 0) + { + bank ^= bankRotation * (slice / microTileThickness) + bankSwizzle; + bank %= pTileInfo->banks; + pipe ^= pipeSwizzle; + } + else + { + bank ^= bankRotation * (slice / microTileThickness) / numPipes + bankSwizzle; + bank %= pTileInfo->banks; + pipe ^= pipeRotation * (slice / microTileThickness) + pipeSwizzle; + } + + if (pTileInfo->macroAspectRatio == 1) + { + switch (pTileInfo->banks) + { + case 2: + yBit3 = _BIT(bank, 0) ^ _BIT(xBit,0); + break; + case 4: + yBit4 = _BIT(bank, 0) ^ _BIT(xBit,0); + yBit3 = _BIT(bank, 1) ^ _BIT(xBit,1); + break; + case 8: + yBit3 = _BIT(bank, 2) ^ _BIT(xBit,2); + yBit5 = _BIT(bank, 0) ^ _BIT(xBit,0); + yBit4 = _BIT(bank, 1) ^ _BIT(xBit,1) ^ yBit5; + break; + case 16: + yBit3 = _BIT(bank, 3) ^ _BIT(xBit, 3); + yBit4 = _BIT(bank, 2) ^ _BIT(xBit, 2); + yBit6 = _BIT(bank, 0) ^ _BIT(xBit, 0); + yBit5 = _BIT(bank, 1) ^ _BIT(xBit, 1) ^ yBit6; + break; + default: + break; + } + + } + else if (pTileInfo->macroAspectRatio == 2) + { + switch (pTileInfo->banks) + { + case 2: //xBit3 = yBit3^b0 + xBit3 = _BIT(bank, 0) ^ _BIT(yBit,0); + break; + case 4: //xBit3=yBit4^b0; yBit3=xBit4^b1 + xBit3 = _BIT(bank, 0) ^ _BIT(yBit,1); + yBit3 = _BIT(bank, 1) ^ _BIT(xBit,1); + break; + case 8: //xBit4, xBit5, yBit5 are known + xBit3 = _BIT(bank, 0) ^ _BIT(yBit,2); + yBit3 = _BIT(bank, 2) ^ _BIT(xBit,2); + yBit4 = _BIT(bank, 1) ^ _BIT(xBit,1) ^ _BIT(yBit, 2); + break; + case 16://x4,x5,x6,y6 are known + xBit3 = _BIT(bank, 0) ^ _BIT(yBit, 3); //x3 = y6 ^ b0 + yBit3 = _BIT(bank, 3) ^ _BIT(xBit, 3); //y3 = x6 ^ b3 + yBit4 = _BIT(bank, 2) ^ _BIT(xBit, 2); //y4 = x5 ^ b2 + yBit5 = _BIT(bank, 1) ^ _BIT(xBit, 1) ^ _BIT(yBit, 3); //y5=x4^y6^b1 + break; + default: + break; + } + } + else if (pTileInfo->macroAspectRatio == 4) + { + switch (pTileInfo->banks) + { + case 4: //yBit3, yBit4 + xBit3 = _BIT(bank, 0) ^ _BIT(yBit,1); + xBit4 = _BIT(bank, 1) ^ _BIT(yBit,0); + break; + case 8: //xBit5, yBit4, yBit5 + xBit3 = _BIT(bank, 0) ^ _BIT(yBit,2); + yBit3 = _BIT(bank, 2) ^ _BIT(xBit,2); + xBit4 = _BIT(bank, 1) ^ _BIT(yBit,1) ^ _BIT(yBit,2); + break; + case 16: //xBit5, xBit6, yBit5, yBit6 + xBit3 = _BIT(bank, 0) ^ _BIT(yBit, 3);//x3 = b0 ^ y6 + xBit4 = _BIT(bank, 1) ^ _BIT(yBit, 2) ^ _BIT(yBit, 3);//x4 = b1 ^ y5 ^ y6; + yBit3 = _BIT(bank, 3) ^ _BIT(xBit, 3); //y3 = b3 ^ x6; + yBit4 = _BIT(bank, 2) ^ _BIT(xBit, 2); //y4 = b2 ^ x5; + break; + default: + break; + } + } + else if (pTileInfo->macroAspectRatio == 8) + { + switch (pTileInfo->banks) + { + case 8: //yBit3, yBit4, yBit5 + xBit3 = _BIT(bank, 0) ^ _BIT(yBit,2); //x3 = b0 ^ y5; + xBit4 = _BIT(bank, 1) ^ _BIT(yBit,1) ^ _BIT(yBit, 2);//x4 = b1 ^ y4 ^ y5; + xBit5 = _BIT(bank, 2) ^ _BIT(yBit,0); + break; + case 16: //xBit6, yBit4, yBit5, yBit6 + xBit3 = _BIT(bank, 0) ^ _BIT(yBit, 3);//x3 = y6 ^ b0 + xBit4 = _BIT(bank, 1) ^ _BIT(yBit, 2) ^ _BIT(yBit, 3);//x4 = y5 ^ y6 ^ b1 + xBit5 = _BIT(bank, 2) ^ _BIT(yBit, 1);//x5 = y4 ^ b2 + yBit3 = _BIT(bank, 3) ^ _BIT(xBit, 3); //y3 = x6 ^ b3 + break; + default: + break; + } + } + + pOutput->xBits = xBit; + pOutput->yBits = yBit; + + pOutput->xBit3 = xBit3; + pOutput->xBit4 = xBit4; + pOutput->xBit5 = xBit5; + pOutput->yBit3 = yBit3; + pOutput->yBit4 = yBit4; + pOutput->yBit5 = yBit5; + pOutput->yBit6 = yBit6; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::HwlExtractBankPipeSwizzle +* @brief +* Entry of EgBasedAddrLib ExtractBankPipeSwizzle +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE EgBasedAddrLib::HwlExtractBankPipeSwizzle( + const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, ///< [in] input structure + ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut ///< [out] output structure + ) const +{ + ExtractBankPipeSwizzle(pIn->base256b, + pIn->pTileInfo, + &pOut->bankSwizzle, + &pOut->pipeSwizzle); + + return ADDR_OK; +} + + +/** +*************************************************************************************************** +* EgBasedAddrLib::HwlCombineBankPipeSwizzle +* @brief +* Combine bank/pipe swizzle +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE EgBasedAddrLib::HwlCombineBankPipeSwizzle( + UINT_32 bankSwizzle, ///< [in] bank swizzle + UINT_32 pipeSwizzle, ///< [in] pipe swizzle + ADDR_TILEINFO* pTileInfo, ///< [in] tile info + UINT_64 baseAddr, ///< [in] base address + UINT_32* pTileSwizzle ///< [out] combined swizzle + ) const +{ + ADDR_E_RETURNCODE retCode = ADDR_OK; + + if (pTileSwizzle) + { + *pTileSwizzle = GetBankPipeSwizzle(bankSwizzle, pipeSwizzle, baseAddr, pTileInfo); + } + else + { + retCode = ADDR_INVALIDPARAMS; + } + + return retCode; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::HwlComputeBaseSwizzle +* @brief +* Compute base swizzle +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE EgBasedAddrLib::HwlComputeBaseSwizzle( + const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, + ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut + ) const +{ + UINT_32 bankSwizzle = 0; + UINT_32 pipeSwizzle = 0; + ADDR_TILEINFO* pTileInfo = pIn->pTileInfo; + + ADDR_ASSERT(IsMacroTiled(pIn->tileMode)); + ADDR_ASSERT(pIn->pTileInfo); + + /// This is a legacy misreading of h/w doc, use it as it doesn't hurt. + static const UINT_8 bankRotationArray[4][16] = { + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, // ADDR_SURF_2_BANK + { 0, 1, 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, // ADDR_SURF_4_BANK + { 0, 3, 6, 1, 4, 7, 2, 5, 0, 0, 0, 0, 0, 0, 0, 0 }, // ADDR_SURF_8_BANK + { 0, 7, 14, 5, 12, 3, 10, 1, 8, 15, 6, 13, 4, 11, 2, 9 }, // ADDR_SURF_16_BANK + }; + + UINT_32 banks = pTileInfo ? pTileInfo->banks : 2; + UINT_32 hwNumBanks; + + // Uses less bank swizzle bits + if (pIn->option.reduceBankBit && banks > 2) + { + banks >>= 1; + } + + switch (banks) + { + case 2: + hwNumBanks = 0; + break; + case 4: + hwNumBanks = 1; + break; + case 8: + hwNumBanks = 2; + break; + case 16: + hwNumBanks = 3; + break; + default: + ADDR_ASSERT_ALWAYS(); + hwNumBanks = 0; + break; + } + + if (pIn->option.genOption == ADDR_SWIZZLE_GEN_LINEAR) + { + bankSwizzle = pIn->surfIndex & (banks - 1); + } + else // (pIn->option.genOption == ADDR_SWIZZLE_GEN_DEFAULT) + { + bankSwizzle = bankRotationArray[hwNumBanks][pIn->surfIndex & (banks - 1)]; + } + + if (IsMacro3dTiled(pIn->tileMode)) + { + pipeSwizzle = pIn->surfIndex & (HwlGetPipes(pTileInfo) - 1); + } + + return HwlCombineBankPipeSwizzle(bankSwizzle, pipeSwizzle, pTileInfo, 0, &pOut->tileSwizzle); +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::ExtractBankPipeSwizzle +* @brief +* Extract bank/pipe swizzle from base256b +* @return +* N/A +*************************************************************************************************** +*/ +VOID EgBasedAddrLib::ExtractBankPipeSwizzle( + UINT_32 base256b, ///< [in] input base256b register value + ADDR_TILEINFO* pTileInfo, ///< [in] 2D tile parameters. Client must provide all data + UINT_32* pBankSwizzle, ///< [out] bank swizzle + UINT_32* pPipeSwizzle ///< [out] pipe swizzle + ) const +{ + UINT_32 bankSwizzle = 0; + UINT_32 pipeSwizzle = 0; + + if (base256b != 0) + { + UINT_32 numPipes = HwlGetPipes(pTileInfo); + UINT_32 bankBits = QLog2(pTileInfo->banks); + UINT_32 pipeBits = QLog2(numPipes); + UINT_32 groupBytes = m_pipeInterleaveBytes; + UINT_32 bankInterleave = m_bankInterleave; + + pipeSwizzle = + (base256b / (groupBytes >> 8)) & ((1<> 8) / numPipes / bankInterleave) & ((1 << bankBits) - 1); + } + + *pPipeSwizzle = pipeSwizzle; + *pBankSwizzle = bankSwizzle; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::GetBankPipeSwizzle +* @brief +* Combine bank/pipe swizzle +* @return +* Base256b bits (only filled bank/pipe bits) +*************************************************************************************************** +*/ +UINT_32 EgBasedAddrLib::GetBankPipeSwizzle( + UINT_32 bankSwizzle, ///< [in] bank swizzle + UINT_32 pipeSwizzle, ///< [in] pipe swizzle + UINT_64 baseAddr, ///< [in] base address + ADDR_TILEINFO* pTileInfo ///< [in] tile info + ) const +{ + UINT_32 pipeBits = QLog2(HwlGetPipes(pTileInfo)); + UINT_32 bankInterleaveBits = QLog2(m_bankInterleave); + UINT_32 tileSwizzle = pipeSwizzle + ((bankSwizzle << bankInterleaveBits) << pipeBits); + + baseAddr ^= tileSwizzle * m_pipeInterleaveBytes; + baseAddr >>= 8; + + return static_cast(baseAddr); +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::ComputeSliceTileSwizzle +* @brief +* Compute cubemap/3d texture faces/slices tile swizzle +* @return +* Tile swizzle +*************************************************************************************************** +*/ +UINT_32 EgBasedAddrLib::ComputeSliceTileSwizzle( + AddrTileMode tileMode, ///< [in] Tile mode + UINT_32 baseSwizzle, ///< [in] Base swizzle + UINT_32 slice, ///< [in] Slice index, Cubemap face index, 0 means +X + UINT_64 baseAddr, ///< [in] Base address + ADDR_TILEINFO* pTileInfo ///< [in] Bank structure + ) const +{ + UINT_32 tileSwizzle = 0; + + if (IsMacroTiled(tileMode)) // Swizzle only for macro tile mode + { + UINT_32 firstSlice = slice / ComputeSurfaceThickness(tileMode); + + UINT_32 numPipes = HwlGetPipes(pTileInfo); + UINT_32 numBanks = pTileInfo->banks; + + UINT_32 pipeRotation; + UINT_32 bankRotation; + + UINT_32 bankSwizzle = 0; + UINT_32 pipeSwizzle = 0; + + pipeRotation = ComputePipeRotation(tileMode, numPipes); + bankRotation = ComputeBankRotation(tileMode, numBanks, numPipes); + + if (baseSwizzle != 0) + { + ExtractBankPipeSwizzle(baseSwizzle, + pTileInfo, + &bankSwizzle, + &pipeSwizzle); + } + + if (pipeRotation == 0) //2D mode + { + bankSwizzle += firstSlice * bankRotation; + bankSwizzle %= numBanks; + } + else //3D mode + { + pipeSwizzle += firstSlice * pipeRotation; + pipeSwizzle %= numPipes; + bankSwizzle += firstSlice * bankRotation / numPipes; + bankSwizzle %= numBanks; + } + + tileSwizzle = GetBankPipeSwizzle(bankSwizzle, + pipeSwizzle, + baseAddr, + pTileInfo); + } + + return tileSwizzle; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::HwlComputeQbStereoRightSwizzle +* +* @brief +* Compute right eye swizzle +* @return +* swizzle +*************************************************************************************************** +*/ +UINT_32 EgBasedAddrLib::HwlComputeQbStereoRightSwizzle( + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pInfo ///< [in] Surface info, must be valid + ) const +{ + UINT_32 bankBits = 0; + UINT_32 swizzle = 0; + + // The assumption is default swizzle for left eye is 0 + if (IsMacroTiled(pInfo->tileMode) && pInfo->pStereoInfo && pInfo->pTileInfo) + { + bankBits = ComputeBankFromCoord(0, pInfo->height, 0, + pInfo->tileMode, 0, 0, pInfo->pTileInfo); + + if (bankBits) + { + HwlCombineBankPipeSwizzle(bankBits, 0, pInfo->pTileInfo, 0, &swizzle); + } + } + + return swizzle; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::ComputeBankFromCoord +* +* @brief +* Compute bank number from coordinates +* @return +* Bank number +*************************************************************************************************** +*/ +UINT_32 EgBasedAddrLib::ComputeBankFromCoord( + UINT_32 x, ///< [in] x coordinate + UINT_32 y, ///< [in] y coordinate + UINT_32 slice, ///< [in] slice index + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 bankSwizzle, ///< [in] bank swizzle + UINT_32 tileSplitSlice, ///< [in] If the size of the pixel offset is larger than the + /// tile split size, then the pixel will be moved to a separate + /// slice. This value equals pixelOffset / tileSplitBytes + /// in this case. Otherwise this is 0. + ADDR_TILEINFO* pTileInfo ///< [in] tile info + ) const +{ + UINT_32 pipes = HwlGetPipes(pTileInfo); + UINT_32 bankBit0 = 0; + UINT_32 bankBit1 = 0; + UINT_32 bankBit2 = 0; + UINT_32 bankBit3 = 0; + UINT_32 sliceRotation; + UINT_32 tileSplitRotation; + UINT_32 bank; + UINT_32 numBanks = pTileInfo->banks; + UINT_32 bankWidth = pTileInfo->bankWidth; + UINT_32 bankHeight = pTileInfo->bankHeight; + + UINT_32 tx = x / MicroTileWidth / (bankWidth * pipes); + UINT_32 ty = y / MicroTileHeight / bankHeight; + + UINT_32 x3 = _BIT(tx,0); + UINT_32 x4 = _BIT(tx,1); + UINT_32 x5 = _BIT(tx,2); + UINT_32 x6 = _BIT(tx,3); + UINT_32 y3 = _BIT(ty,0); + UINT_32 y4 = _BIT(ty,1); + UINT_32 y5 = _BIT(ty,2); + UINT_32 y6 = _BIT(ty,3); + + switch (numBanks) + { + case 16: + bankBit0 = x3 ^ y6; + bankBit1 = x4 ^ y5 ^ y6; + bankBit2 = x5 ^ y4; + bankBit3 = x6 ^ y3; + break; + case 8: + bankBit0 = x3 ^ y5; + bankBit1 = x4 ^ y4 ^ y5; + bankBit2 = x5 ^ y3; + break; + case 4: + bankBit0 = x3 ^ y4; + bankBit1 = x4 ^ y3; + break; + case 2: + bankBit0 = x3 ^ y3; + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + + bank = bankBit0 | (bankBit1 << 1) | (bankBit2 << 2) | (bankBit3 << 3); + + //Bits2Number(4, bankBit3, bankBit2, bankBit1, bankBit0); + + bank = HwlPreAdjustBank((x / MicroTileWidth), bank, pTileInfo); + // + // Compute bank rotation for the slice. + // + UINT_32 microTileThickness = ComputeSurfaceThickness(tileMode); + + switch (tileMode) + { + case ADDR_TM_2D_TILED_THIN1: // fall through + case ADDR_TM_2D_TILED_THICK: // fall through + case ADDR_TM_2D_TILED_XTHICK: + sliceRotation = ((numBanks / 2) - 1) * (slice / microTileThickness); + break; + case ADDR_TM_3D_TILED_THIN1: // fall through + case ADDR_TM_3D_TILED_THICK: // fall through + case ADDR_TM_3D_TILED_XTHICK: + sliceRotation = + Max(1u, (pipes / 2) - 1) * (slice / microTileThickness) / pipes; + break; + default: + sliceRotation = 0; + break; + } + + + // + // Compute bank rotation for the tile split slice. + // + // The sample slice will be non-zero if samples must be split across multiple slices. + // This situation arises when the micro tile size multiplied yBit the number of samples exceeds + // the split size (set in GB_ADDR_CONFIG). + // + switch (tileMode) + { + case ADDR_TM_2D_TILED_THIN1: //fall through + case ADDR_TM_3D_TILED_THIN1: //fall through + case ADDR_TM_PRT_2D_TILED_THIN1: //fall through + case ADDR_TM_PRT_3D_TILED_THIN1: //fall through + tileSplitRotation = ((numBanks / 2) + 1) * tileSplitSlice; + break; + default: + tileSplitRotation = 0; + break; + } + + // + // Apply bank rotation for the slice and tile split slice. + // + bank ^= bankSwizzle + sliceRotation; + bank ^= tileSplitRotation; + + bank &= (numBanks - 1); + + return bank; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::ComputeBankFromAddr +* +* @brief +* Compute the bank number from an address +* @return +* Bank number +*************************************************************************************************** +*/ +UINT_32 EgBasedAddrLib::ComputeBankFromAddr( + UINT_64 addr, ///< [in] address + UINT_32 numBanks, ///< [in] number of banks + UINT_32 numPipes ///< [in] number of pipes + ) const +{ + UINT_32 bank; + + // + // The LSBs of the address are arranged as follows: + // bank | bankInterleave | pipe | pipeInterleave + // + // To get the bank number, shift off the pipe interleave, pipe, and bank interlave bits and + // mask the bank bits. + // + bank = static_cast( + (addr >> Log2(m_pipeInterleaveBytes * numPipes * m_bankInterleave)) & + (numBanks - 1) + ); + + return bank; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::ComputePipeRotation +* +* @brief +* Compute pipe rotation value +* @return +* Pipe rotation +*************************************************************************************************** +*/ +UINT_32 EgBasedAddrLib::ComputePipeRotation( + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 numPipes ///< [in] number of pipes + ) const +{ + UINT_32 rotation; + + switch (tileMode) + { + case ADDR_TM_3D_TILED_THIN1: //fall through + case ADDR_TM_3D_TILED_THICK: //fall through + case ADDR_TM_3D_TILED_XTHICK: //fall through + case ADDR_TM_PRT_3D_TILED_THIN1: //fall through + case ADDR_TM_PRT_3D_TILED_THICK: + rotation = (numPipes < 4) ? 1 : (numPipes / 2 - 1); + break; + default: + rotation = 0; + } + + return rotation; +} + + + +/** +*************************************************************************************************** +* EgBasedAddrLib::ComputeBankRotation +* +* @brief +* Compute bank rotation value +* @return +* Bank rotation +*************************************************************************************************** +*/ +UINT_32 EgBasedAddrLib::ComputeBankRotation( + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 numBanks, ///< [in] number of banks + UINT_32 numPipes ///< [in] number of pipes + ) const +{ + UINT_32 rotation; + + switch (tileMode) + { + case ADDR_TM_2D_TILED_THIN1: // fall through + case ADDR_TM_2D_TILED_THICK: // fall through + case ADDR_TM_2D_TILED_XTHICK: + case ADDR_TM_PRT_2D_TILED_THIN1: + case ADDR_TM_PRT_2D_TILED_THICK: + // Rotate banks per Z-slice yBit 1 for 4-bank or 3 for 8-bank + rotation = numBanks / 2 - 1; + break; + case ADDR_TM_3D_TILED_THIN1: // fall through + case ADDR_TM_3D_TILED_THICK: // fall through + case ADDR_TM_3D_TILED_XTHICK: + case ADDR_TM_PRT_3D_TILED_THIN1: + case ADDR_TM_PRT_3D_TILED_THICK: + rotation = (numPipes < 4) ? 1 : (numPipes / 2 - 1); // rotate pipes & banks + break; + default: + rotation = 0; + } + + return rotation; +} + + +/** +*************************************************************************************************** +* EgBasedAddrLib::ComputeHtileBytes +* +* @brief +* Compute htile size in bytes +* +* @return +* Htile size in bytes +*************************************************************************************************** +*/ +UINT_64 EgBasedAddrLib::ComputeHtileBytes( + UINT_32 pitch, ///< [in] pitch + UINT_32 height, ///< [in] height + UINT_32 bpp, ///< [in] bits per pixel + BOOL_32 isLinear, ///< [in] if it is linear mode + UINT_32 numSlices, ///< [in] number of slices + UINT_64* sliceBytes, ///< [out] bytes per slice + UINT_32 baseAlign ///< [in] base alignments + ) const +{ + UINT_64 surfBytes; + + const UINT_64 HtileCacheLineSize = BITS_TO_BYTES(HtileCacheBits); + + *sliceBytes = BITS_TO_BYTES(static_cast(pitch) * height * bpp / 64); + + if (m_configFlags.useHtileSliceAlign) + { + // Align the sliceSize to htilecachelinesize * pipes at first + *sliceBytes = PowTwoAlign(*sliceBytes, HtileCacheLineSize * m_pipes); + surfBytes = *sliceBytes * numSlices; + } + else + { + // Align the surfSize to htilecachelinesize * pipes at last + surfBytes = *sliceBytes * numSlices; + surfBytes = PowTwoAlign(surfBytes, HtileCacheLineSize * m_pipes); + } + + return surfBytes; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::DispatchComputeFmaskInfo +* +* @brief +* Compute fmask sizes include padded pitch, height, slices, total size in bytes, +* meanwhile output suitable tile mode and alignments as well. Results are returned +* through output parameters. +* +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE EgBasedAddrLib::DispatchComputeFmaskInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut) ///< [out] output structure +{ + ADDR_E_RETURNCODE retCode = ADDR_OK; + + ADDR_COMPUTE_SURFACE_INFO_INPUT surfIn = {0}; + ADDR_COMPUTE_SURFACE_INFO_OUTPUT surfOut = {0}; + + // Setup input structure + surfIn.tileMode = pIn->tileMode; + surfIn.width = pIn->pitch; + surfIn.height = pIn->height; + surfIn.numSlices = pIn->numSlices; + surfIn.pTileInfo = pIn->pTileInfo; + surfIn.tileType = ADDR_NON_DISPLAYABLE; + surfIn.flags.fmask = 1; + + // Setup output structure + surfOut.pTileInfo = pOut->pTileInfo; + + // Setup hwl specific fields + HwlFmaskPreThunkSurfInfo(pIn, pOut, &surfIn, &surfOut); + + surfIn.bpp = HwlComputeFmaskBits(pIn, &surfIn.numSamples); + + // ComputeSurfaceInfo needs numSamples in surfOut as surface routines need adjusted numSamples + surfOut.numSamples = surfIn.numSamples; + + retCode = HwlComputeSurfaceInfo(&surfIn, &surfOut); + + // Save bpp field for surface dump support + surfOut.bpp = surfIn.bpp; + + if (retCode == ADDR_OK) + { + pOut->bpp = surfOut.bpp; + pOut->pitch = surfOut.pitch; + pOut->height = surfOut.height; + pOut->numSlices = surfOut.depth; + pOut->fmaskBytes = surfOut.surfSize; + pOut->baseAlign = surfOut.baseAlign; + pOut->pitchAlign = surfOut.pitchAlign; + pOut->heightAlign = surfOut.heightAlign; + + if (surfOut.depth > 1) + { + // For fmask, expNumSlices is stored in depth. + pOut->sliceSize = surfOut.surfSize / surfOut.depth; + } + else + { + pOut->sliceSize = surfOut.surfSize; + } + + // Save numSamples field for surface dump support + pOut->numSamples = surfOut.numSamples; + + HwlFmaskPostThunkSurfInfo(&surfOut, pOut); + } + + return retCode; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::HwlFmaskSurfaceInfo +* @brief +* Entry of EgBasedAddrLib ComputeFmaskInfo +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE EgBasedAddrLib::HwlComputeFmaskInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut ///< [out] output structure + ) +{ + ADDR_E_RETURNCODE retCode = ADDR_OK; + + ADDR_TILEINFO tileInfo = {0}; + + // Use internal tile info if pOut does not have a valid pTileInfo + if (pOut->pTileInfo == NULL) + { + pOut->pTileInfo = &tileInfo; + } + + retCode = DispatchComputeFmaskInfo(pIn, pOut); + + if (retCode == ADDR_OK) + { + pOut->tileIndex = + HwlPostCheckTileIndex(pOut->pTileInfo, pIn->tileMode, ADDR_NON_DISPLAYABLE, + pOut->tileIndex); + } + + // Resets pTileInfo to NULL if the internal tile info is used + if (pOut->pTileInfo == &tileInfo) + { + pOut->pTileInfo = NULL; + } + + return retCode; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::HwlComputeFmaskAddrFromCoord +* @brief +* Entry of EgBasedAddrLib ComputeFmaskAddrFromCoord +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE EgBasedAddrLib::HwlComputeFmaskAddrFromCoord( + const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE retCode = ADDR_OK; + +#if ADDR_AM_BUILD + if ((pIn->x > pIn->pitch) || + (pIn->y > pIn->height) || + (pIn->numSamples > m_maxSamples) || + (pIn->sample >= m_maxSamples)) + { + retCode = ADDR_INVALIDPARAMS; + } + else + { + pOut->addr = DispatchComputeFmaskAddrFromCoord(pIn, pOut); + } +#endif + + return retCode; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::HwlComputeFmaskCoordFromAddr +* @brief +* Entry of EgBasedAddrLib ComputeFmaskCoordFromAddr +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE EgBasedAddrLib::HwlComputeFmaskCoordFromAddr( + const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE retCode = ADDR_OK; + +#if ADDR_AM_BUILD + if ((pIn->bitPosition >= 8) || + (pIn->numSamples > m_maxSamples)) + { + retCode = ADDR_INVALIDPARAMS; + } + else + { + DispatchComputeFmaskCoordFromAddr(pIn, pOut); + } +#endif + + return retCode; +} + +#if ADDR_AM_BUILD +/** +*************************************************************************************************** +* EgBasedAddrLib::DispatchComputeFmaskAddrFromCoord +* +* @brief +* Computes the FMASK address and bit position from a coordinate. +* @return +* The byte address +*************************************************************************************************** +*/ +UINT_64 EgBasedAddrLib::DispatchComputeFmaskAddrFromCoord( + const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure + ) const +{ + UINT_32 x = pIn->x; + UINT_32 y = pIn->y; + UINT_32 slice = pIn->slice; + UINT_32 sample = pIn->sample; + UINT_32 plane = pIn->plane; + UINT_32 pitch = pIn->pitch; + UINT_32 height = pIn->height; + UINT_32 numSamples = pIn->numSamples; + AddrTileMode tileMode = pIn->tileMode; + BOOL_32 ignoreSE = pIn->ignoreSE; + ADDR_TILEINFO* pTileInfo = pIn->pTileInfo; + BOOL_32 resolved = pIn->resolved; + + UINT_32* pBitPosition = &pOut->bitPosition; + UINT_64 addr = 0; + + ADDR_ASSERT(numSamples > 1); + ADDR_ASSERT(ComputeSurfaceThickness(tileMode) == 1); + + switch (tileMode) + { + case ADDR_TM_1D_TILED_THIN1: + addr = ComputeFmaskAddrFromCoordMicroTiled(x, + y, + slice, + sample, + plane, + pitch, + height, + numSamples, + tileMode, + resolved, + pBitPosition); + break; + case ADDR_TM_2D_TILED_THIN1: //fall through + case ADDR_TM_3D_TILED_THIN1: + UINT_32 pipeSwizzle; + UINT_32 bankSwizzle; + + if (m_configFlags.useCombinedSwizzle) + { + ExtractBankPipeSwizzle(pIn->tileSwizzle, pIn->pTileInfo, + &bankSwizzle, &pipeSwizzle); + } + else + { + pipeSwizzle = pIn->pipeSwizzle; + bankSwizzle = pIn->bankSwizzle; + } + + addr = ComputeFmaskAddrFromCoordMacroTiled(x, + y, + slice, + sample, + plane, + pitch, + height, + numSamples, + tileMode, + pipeSwizzle, + bankSwizzle, + ignoreSE, + pTileInfo, + resolved, + pBitPosition); + break; + default: + *pBitPosition = 0; + break; + } + + return addr; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::ComputeFmaskAddrFromCoordMicroTiled +* +* @brief +* Computes the FMASK address and bit position from a coordinate for 1D tilied (micro +* tiled) +* @return +* The byte address +*************************************************************************************************** +*/ +UINT_64 EgBasedAddrLib::ComputeFmaskAddrFromCoordMicroTiled( + UINT_32 x, ///< [in] x coordinate + UINT_32 y, ///< [in] y coordinate + UINT_32 slice, ///< [in] slice index + UINT_32 sample, ///< [in] sample number + UINT_32 plane, ///< [in] plane number + UINT_32 pitch, ///< [in] surface pitch in pixels + UINT_32 height, ///< [in] surface height in pixels + UINT_32 numSamples, ///< [in] number of samples + AddrTileMode tileMode, ///< [in] tile mode + BOOL_32 resolved, ///< [in] TRUE if this is for resolved fmask + UINT_32* pBitPosition ///< [out] pointer to returned bit position + ) const +{ + UINT_64 addr = 0; + UINT_32 effectiveBpp; + UINT_32 effectiveSamples; + + // + // 2xAA use the same layout as 4xAA + // + if (numSamples == 2) + { + numSamples = 4; + } + + // + // Compute the number of planes. + // + if (!resolved) + { + effectiveSamples = ComputeFmaskNumPlanesFromNumSamples(numSamples); + effectiveBpp = numSamples; + + // + // Compute the address just like a color surface with numSamples bits per element and + // numPlanes samples. + // + addr = ComputeSurfaceAddrFromCoordMicroTiled(x, + y, + slice, + plane, // sample + effectiveBpp, + pitch, + height, + effectiveSamples, + tileMode, + ADDR_NON_DISPLAYABLE, + FALSE, + pBitPosition); + + // + // Compute the real bit position. Each (sample, plane) is stored with one bit per sample. + // + + // + // Compute the pixel index with in the micro tile + // + UINT_32 pixelIndex = ComputePixelIndexWithinMicroTile(x % 8, + y % 8, + slice, + 1, + tileMode, + ADDR_NON_DISPLAYABLE); + + *pBitPosition = ((pixelIndex * numSamples) + sample) & (BITS_PER_BYTE-1); + + UINT_64 bitAddr = BYTES_TO_BITS(addr) + *pBitPosition; + + addr = bitAddr / 8; + } + else + { + effectiveBpp = ComputeFmaskResolvedBppFromNumSamples(numSamples); + effectiveSamples = 1; + + // + // Compute the address just like a color surface with numSamples bits per element and + // numPlanes samples. + // + addr = ComputeSurfaceAddrFromCoordMicroTiled(x, + y, + slice, + sample, + effectiveBpp, + pitch, + height, + effectiveSamples, + tileMode, + ADDR_NON_DISPLAYABLE, + TRUE, + pBitPosition); + } + + return addr; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::ComputeFmaskAddrFromCoordMacroTiled +* +* @brief +* Computes the FMASK address and bit position from a coordinate for 2D tilied (macro +* tiled) +* @return +* The byte address +*************************************************************************************************** +*/ +UINT_64 EgBasedAddrLib::ComputeFmaskAddrFromCoordMacroTiled( + UINT_32 x, ///< [in] x coordinate + UINT_32 y, ///< [in] y coordinate + UINT_32 slice, ///< [in] slice index + UINT_32 sample, ///< [in] sample number + UINT_32 plane, ///< [in] plane number + UINT_32 pitch, ///< [in] surface pitch in pixels + UINT_32 height, ///< [in] surface height in pixels + UINT_32 numSamples, ///< [in] number of samples + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 pipeSwizzle, ///< [in] pipe swizzle + UINT_32 bankSwizzle, ///< [in] bank swizzle + BOOL_32 ignoreSE, ///< [in] TRUE if ignore shader engine + ADDR_TILEINFO* pTileInfo, ///< [in] bank structure.**All fields to be valid on entry** + BOOL_32 resolved, ///< [in] TRUE if this is for resolved fmask + UINT_32* pBitPosition ///< [out] pointer to returned bit position + ) const +{ + UINT_64 addr = 0; + UINT_32 effectiveBpp; + UINT_32 effectiveSamples; + + // + // 2xAA use the same layout as 4xAA + // + if (numSamples == 2) + { + numSamples = 4; + } + + // + // Compute the number of planes. + // + if (!resolved) + { + effectiveSamples = ComputeFmaskNumPlanesFromNumSamples(numSamples); + effectiveBpp = numSamples; + + // + // Compute the address just like a color surface with numSamples bits per element and + // numPlanes samples. + // + addr = ComputeSurfaceAddrFromCoordMacroTiled(x, + y, + slice, + plane, // sample + effectiveBpp, + pitch, + height, + effectiveSamples, + tileMode, + ADDR_NON_DISPLAYABLE,// isdisp + ignoreSE,// ignore_shader + FALSE,// depth_sample_order + pipeSwizzle, + bankSwizzle, + pTileInfo, + pBitPosition); + + // + // Compute the real bit position. Each (sample, plane) is stored with one bit per sample. + // + + + // + // Compute the pixel index with in the micro tile + // + UINT_32 pixelIndex = ComputePixelIndexWithinMicroTile(x , + y , + slice, + effectiveBpp, + tileMode, + ADDR_NON_DISPLAYABLE); + + *pBitPosition = ((pixelIndex * numSamples) + sample) & (BITS_PER_BYTE-1); + + UINT_64 bitAddr = BYTES_TO_BITS(addr) + *pBitPosition; + + addr = bitAddr / 8; + + } + else + { + effectiveBpp = ComputeFmaskResolvedBppFromNumSamples(numSamples); + effectiveSamples = 1; + + // + // Compute the address just like a color surface with numSamples bits per element and + // numPlanes samples. + // + addr = ComputeSurfaceAddrFromCoordMacroTiled(x, + y, + slice, + sample, + effectiveBpp, + pitch, + height, + effectiveSamples, + tileMode, + ADDR_NON_DISPLAYABLE, + ignoreSE, + TRUE, + pipeSwizzle, + bankSwizzle, + pTileInfo, + pBitPosition); + } + + return addr; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::ComputeFmaskCoordFromAddrMicroTiled +* +* @brief +* Compute (x,y,slice,sample,plane) coordinates from fmask address +* @return +* N/A +* +*************************************************************************************************** +*/ +VOID EgBasedAddrLib::ComputeFmaskCoordFromAddrMicroTiled( + UINT_64 addr, ///< [in] byte address + UINT_32 bitPosition,///< [in] bit position + UINT_32 pitch, ///< [in] pitch in pixels + UINT_32 height, ///< [in] height in pixels + UINT_32 numSamples, ///< [in] number of samples (of color buffer) + AddrTileMode tileMode, ///< [in] tile mode + BOOL_32 resolved, ///< [in] TRUE if it is resolved fmask + UINT_32* pX, ///< [out] X coord + UINT_32* pY, ///< [out] Y coord + UINT_32* pSlice, ///< [out] slice index + UINT_32* pSample, ///< [out] sample index + UINT_32* pPlane ///< [out] plane index + ) const +{ + UINT_32 effectiveBpp; + UINT_32 effectiveSamples; + + // 2xAA use the same layout as 4xAA + if (numSamples == 2) + { + numSamples = 4; + } + + if (!resolved) + { + effectiveSamples = ComputeFmaskNumPlanesFromNumSamples(numSamples); + effectiveBpp = numSamples; + + ComputeSurfaceCoordFromAddrMicroTiled(addr, + bitPosition, + effectiveBpp, + pitch, + height, + effectiveSamples, + tileMode, + 0, // tileBase + 0, // compBits + pX, + pY, + pSlice, + pPlane, + ADDR_NON_DISPLAYABLE, // microTileType + FALSE // isDepthSampleOrder + ); + + + if ( pSample ) + { + *pSample = bitPosition % numSamples; + } + } + else + { + effectiveBpp = ComputeFmaskResolvedBppFromNumSamples(numSamples); + effectiveSamples = 1; + + ComputeSurfaceCoordFromAddrMicroTiled(addr, + bitPosition, + effectiveBpp, + pitch, + height, + effectiveSamples, + tileMode, + 0, // tileBase + 0, // compBits + pX, + pY, + pSlice, + pSample, + ADDR_NON_DISPLAYABLE, // microTileType + TRUE // isDepthSampleOrder + ); + } +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::ComputeFmaskCoordFromAddrMacroTiled +* +* @brief +* Compute (x,y,slice,sample,plane) coordinates from +* fmask address +* @return +* N/A +* +*************************************************************************************************** +*/ +VOID EgBasedAddrLib::ComputeFmaskCoordFromAddrMacroTiled( + UINT_64 addr, ///< [in] byte address + UINT_32 bitPosition,///< [in] bit position + UINT_32 pitch, ///< [in] pitch in pixels + UINT_32 height, ///< [in] height in pixels + UINT_32 numSamples, ///< [in] number of samples (of color buffer) + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 pipeSwizzle,///< [in] pipe swizzle + UINT_32 bankSwizzle,///< [in] bank swizzle + BOOL_32 ignoreSE, ///< [in] TRUE if ignore shader engine + ADDR_TILEINFO* pTileInfo, ///< [in] bank structure. **All fields to be valid on entry** + BOOL_32 resolved, ///< [in] TRUE if it is resolved fmask + UINT_32* pX, ///< [out] X coord + UINT_32* pY, ///< [out] Y coord + UINT_32* pSlice, ///< [out] slice index + UINT_32* pSample, ///< [out] sample index + UINT_32* pPlane ///< [out] plane index + ) const +{ + UINT_32 effectiveBpp; + UINT_32 effectiveSamples; + + // 2xAA use the same layout as 4xAA + if (numSamples == 2) + { + numSamples = 4; + } + + // + // Compute the number of planes. + // + if (!resolved) + { + effectiveSamples = ComputeFmaskNumPlanesFromNumSamples(numSamples); + effectiveBpp = numSamples; + + ComputeSurfaceCoordFromAddrMacroTiled(addr, + bitPosition, + effectiveBpp, + pitch, + height, + effectiveSamples, + tileMode, + 0, // No tileBase + 0, // No compBits + ADDR_NON_DISPLAYABLE, + ignoreSE, + FALSE, + pipeSwizzle, + bankSwizzle, + pTileInfo, + pX, + pY, + pSlice, + pPlane); + + if (pSample) + { + *pSample = bitPosition % numSamples; + } + } + else + { + effectiveBpp = ComputeFmaskResolvedBppFromNumSamples(numSamples); + effectiveSamples = 1; + + ComputeSurfaceCoordFromAddrMacroTiled(addr, + bitPosition, + effectiveBpp, + pitch, + height, + effectiveSamples, + tileMode, + 0, // No tileBase + 0, // No compBits + ADDR_NON_DISPLAYABLE, + ignoreSE, + TRUE, + pipeSwizzle, + bankSwizzle, + pTileInfo, + pX, + pY, + pSlice, + pSample); + } +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::DispatchComputeFmaskCoordFromAddr +* +* @brief +* Compute (x,y,slice,sample,plane) coordinates from +* fmask address +* @return +* N/A +* +*************************************************************************************************** +*/ +VOID EgBasedAddrLib::DispatchComputeFmaskCoordFromAddr( + const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure + ) const +{ + UINT_64 addr = pIn->addr; + UINT_32 bitPosition = pIn->bitPosition; + UINT_32 pitch = pIn->pitch; + UINT_32 height = pIn->height; + UINT_32 numSamples = pIn->numSamples; + AddrTileMode tileMode = pIn->tileMode; + BOOL_32 ignoreSE = pIn->ignoreSE; + ADDR_TILEINFO* pTileInfo = pIn->pTileInfo; + BOOL_32 resolved = pIn->resolved; + + UINT_32* pX = &pOut->x; + UINT_32* pY = &pOut->y; + UINT_32* pSlice = &pOut->slice; + UINT_32* pSample = &pOut->sample; + UINT_32* pPlane = &pOut->plane; + + switch (tileMode) + { + case ADDR_TM_1D_TILED_THIN1: + ComputeFmaskCoordFromAddrMicroTiled(addr, + bitPosition, + pitch, + height, + numSamples, + tileMode, + resolved, + pX, + pY, + pSlice, + pSample, + pPlane); + break; + case ADDR_TM_2D_TILED_THIN1://fall through + case ADDR_TM_3D_TILED_THIN1: + UINT_32 pipeSwizzle; + UINT_32 bankSwizzle; + + if (m_configFlags.useCombinedSwizzle) + { + ExtractBankPipeSwizzle(pIn->tileSwizzle, pIn->pTileInfo, + &bankSwizzle, &pipeSwizzle); + } + else + { + pipeSwizzle = pIn->pipeSwizzle; + bankSwizzle = pIn->bankSwizzle; + } + + ComputeFmaskCoordFromAddrMacroTiled(addr, + bitPosition, + pitch, + height, + numSamples, + tileMode, + pipeSwizzle, + bankSwizzle, + ignoreSE, + pTileInfo, + resolved, + pX, + pY, + pSlice, + pSample, + pPlane); + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + + } +} +#endif + +/** +*************************************************************************************************** +* EgBasedAddrLib::ComputeFmaskNumPlanesFromNumSamples +* +* @brief +* Compute fmask number of planes from number of samples +* +* @return +* Number of planes +*************************************************************************************************** +*/ +UINT_32 EgBasedAddrLib::ComputeFmaskNumPlanesFromNumSamples( + UINT_32 numSamples) ///< [in] number of samples +{ + UINT_32 numPlanes; + + // + // FMASK is stored such that each micro tile is composed of elements containing N bits, where + // N is the number of samples. There is a micro tile for each bit in the FMASK address, and + // micro tiles for each address bit, sometimes referred to as a plane, are stored sequentially. + // The FMASK for a 2-sample surface looks like a general surface with 2 bits per element. + // The FMASK for a 4-sample surface looks like a general surface with 4 bits per element and + // 2 samples. The FMASK for an 8-sample surface looks like a general surface with 8 bits per + // element and 4 samples. R6xx and R7xx only stored 3 planes for 8-sample FMASK surfaces. + // This was changed for R8xx to simplify the logic in the CB. + // + switch (numSamples) + { + case 2: + numPlanes = 1; + break; + case 4: + numPlanes = 2; + break; + case 8: + numPlanes = 4; + break; + default: + ADDR_UNHANDLED_CASE(); + numPlanes = 0; + break; + } + return numPlanes; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::ComputeFmaskResolvedBppFromNumSamples +* +* @brief +* Compute resolved fmask effective bpp based on number of samples +* +* @return +* bpp +*************************************************************************************************** +*/ +UINT_32 EgBasedAddrLib::ComputeFmaskResolvedBppFromNumSamples( + UINT_32 numSamples) ///< number of samples +{ + UINT_32 bpp; + + // + // Resolved FMASK surfaces are generated yBit the CB and read yBit the texture unit + // so that the texture unit can read compressed multi-sample color data. + // These surfaces store each index value packed per element. + // Each element contains at least num_samples * log2(num_samples) bits. + // Resolved FMASK surfaces are addressed as follows: + // 2-sample Addressed similarly to a color surface with 8 bits per element and 1 sample. + // 4-sample Addressed similarly to a color surface with 8 bits per element and 1 sample. + // 8-sample Addressed similarly to a color surface with 32 bits per element and 1 sample. + + switch (numSamples) + { + case 2: + bpp = 8; + break; + case 4: + bpp = 8; + break; + case 8: + bpp = 32; + break; + default: + ADDR_UNHANDLED_CASE(); + bpp = 0; + break; + } + return bpp; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::IsTileInfoAllZero +* +* @brief +* Return TRUE if all field are zero +* @note +* Since NULL input is consider to be all zero +*************************************************************************************************** +*/ +BOOL_32 EgBasedAddrLib::IsTileInfoAllZero( + ADDR_TILEINFO* pTileInfo) +{ + BOOL_32 allZero = TRUE; + + if (pTileInfo) + { + if ((pTileInfo->banks != 0) || + (pTileInfo->bankWidth != 0) || + (pTileInfo->bankHeight != 0) || + (pTileInfo->macroAspectRatio != 0) || + (pTileInfo->tileSplitBytes != 0) || + (pTileInfo->pipeConfig != 0) + ) + { + allZero = FALSE; + } + } + + return allZero; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::HwlTileInfoEqual +* +* @brief +* Return TRUE if all field are equal +* @note +* Only takes care of current HWL's data +*************************************************************************************************** +*/ +BOOL_32 EgBasedAddrLib::HwlTileInfoEqual( + const ADDR_TILEINFO* pLeft, ///<[in] Left compare operand + const ADDR_TILEINFO* pRight ///<[in] Right compare operand + ) const +{ + BOOL_32 equal = FALSE; + + if (pLeft->banks == pRight->banks && + pLeft->bankWidth == pRight->bankWidth && + pLeft->bankHeight == pRight->bankHeight && + pLeft->macroAspectRatio == pRight->macroAspectRatio && + pLeft->tileSplitBytes == pRight->tileSplitBytes) + { + equal = TRUE; + } + + return equal; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::HwlConvertTileInfoToHW +* @brief +* Entry of EgBasedAddrLib ConvertTileInfoToHW +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE EgBasedAddrLib::HwlConvertTileInfoToHW( + const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, ///< [in] input structure + ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE retCode = ADDR_OK; + + ADDR_TILEINFO *pTileInfoIn = pIn->pTileInfo; + ADDR_TILEINFO *pTileInfoOut = pOut->pTileInfo; + + if ((pTileInfoIn != NULL) && (pTileInfoOut != NULL)) + { + if (pIn->reverse == FALSE) + { + switch (pTileInfoIn->banks) + { + case 2: + pTileInfoOut->banks = 0; + break; + case 4: + pTileInfoOut->banks = 1; + break; + case 8: + pTileInfoOut->banks = 2; + break; + case 16: + pTileInfoOut->banks = 3; + break; + default: + ADDR_ASSERT_ALWAYS(); + retCode = ADDR_INVALIDPARAMS; + pTileInfoOut->banks = 0; + break; + } + + switch (pTileInfoIn->bankWidth) + { + case 1: + pTileInfoOut->bankWidth = 0; + break; + case 2: + pTileInfoOut->bankWidth = 1; + break; + case 4: + pTileInfoOut->bankWidth = 2; + break; + case 8: + pTileInfoOut->bankWidth = 3; + break; + default: + ADDR_ASSERT_ALWAYS(); + retCode = ADDR_INVALIDPARAMS; + pTileInfoOut->bankWidth = 0; + break; + } + + switch (pTileInfoIn->bankHeight) + { + case 1: + pTileInfoOut->bankHeight = 0; + break; + case 2: + pTileInfoOut->bankHeight = 1; + break; + case 4: + pTileInfoOut->bankHeight = 2; + break; + case 8: + pTileInfoOut->bankHeight = 3; + break; + default: + ADDR_ASSERT_ALWAYS(); + retCode = ADDR_INVALIDPARAMS; + pTileInfoOut->bankHeight = 0; + break; + } + + switch (pTileInfoIn->macroAspectRatio) + { + case 1: + pTileInfoOut->macroAspectRatio = 0; + break; + case 2: + pTileInfoOut->macroAspectRatio = 1; + break; + case 4: + pTileInfoOut->macroAspectRatio = 2; + break; + case 8: + pTileInfoOut->macroAspectRatio = 3; + break; + default: + ADDR_ASSERT_ALWAYS(); + retCode = ADDR_INVALIDPARAMS; + pTileInfoOut->macroAspectRatio = 0; + break; + } + + switch (pTileInfoIn->tileSplitBytes) + { + case 64: + pTileInfoOut->tileSplitBytes = 0; + break; + case 128: + pTileInfoOut->tileSplitBytes = 1; + break; + case 256: + pTileInfoOut->tileSplitBytes = 2; + break; + case 512: + pTileInfoOut->tileSplitBytes = 3; + break; + case 1024: + pTileInfoOut->tileSplitBytes = 4; + break; + case 2048: + pTileInfoOut->tileSplitBytes = 5; + break; + case 4096: + pTileInfoOut->tileSplitBytes = 6; + break; + default: + ADDR_ASSERT_ALWAYS(); + retCode = ADDR_INVALIDPARAMS; + pTileInfoOut->tileSplitBytes = 0; + break; + } + } + else + { + switch (pTileInfoIn->banks) + { + case 0: + pTileInfoOut->banks = 2; + break; + case 1: + pTileInfoOut->banks = 4; + break; + case 2: + pTileInfoOut->banks = 8; + break; + case 3: + pTileInfoOut->banks = 16; + break; + default: + ADDR_ASSERT_ALWAYS(); + retCode = ADDR_INVALIDPARAMS; + pTileInfoOut->banks = 2; + break; + } + + switch (pTileInfoIn->bankWidth) + { + case 0: + pTileInfoOut->bankWidth = 1; + break; + case 1: + pTileInfoOut->bankWidth = 2; + break; + case 2: + pTileInfoOut->bankWidth = 4; + break; + case 3: + pTileInfoOut->bankWidth = 8; + break; + default: + ADDR_ASSERT_ALWAYS(); + retCode = ADDR_INVALIDPARAMS; + pTileInfoOut->bankWidth = 1; + break; + } + + switch (pTileInfoIn->bankHeight) + { + case 0: + pTileInfoOut->bankHeight = 1; + break; + case 1: + pTileInfoOut->bankHeight = 2; + break; + case 2: + pTileInfoOut->bankHeight = 4; + break; + case 3: + pTileInfoOut->bankHeight = 8; + break; + default: + ADDR_ASSERT_ALWAYS(); + retCode = ADDR_INVALIDPARAMS; + pTileInfoOut->bankHeight = 1; + break; + } + + switch (pTileInfoIn->macroAspectRatio) + { + case 0: + pTileInfoOut->macroAspectRatio = 1; + break; + case 1: + pTileInfoOut->macroAspectRatio = 2; + break; + case 2: + pTileInfoOut->macroAspectRatio = 4; + break; + case 3: + pTileInfoOut->macroAspectRatio = 8; + break; + default: + ADDR_ASSERT_ALWAYS(); + retCode = ADDR_INVALIDPARAMS; + pTileInfoOut->macroAspectRatio = 1; + break; + } + + switch (pTileInfoIn->tileSplitBytes) + { + case 0: + pTileInfoOut->tileSplitBytes = 64; + break; + case 1: + pTileInfoOut->tileSplitBytes = 128; + break; + case 2: + pTileInfoOut->tileSplitBytes = 256; + break; + case 3: + pTileInfoOut->tileSplitBytes = 512; + break; + case 4: + pTileInfoOut->tileSplitBytes = 1024; + break; + case 5: + pTileInfoOut->tileSplitBytes = 2048; + break; + case 6: + pTileInfoOut->tileSplitBytes = 4096; + break; + default: + ADDR_ASSERT_ALWAYS(); + retCode = ADDR_INVALIDPARAMS; + pTileInfoOut->tileSplitBytes = 64; + break; + } + } + + if (pTileInfoIn != pTileInfoOut) + { + pTileInfoOut->pipeConfig = pTileInfoIn->pipeConfig; + } + } + else + { + ADDR_ASSERT_ALWAYS(); + retCode = ADDR_INVALIDPARAMS; + } + + return retCode; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::HwlComputeSurfaceInfo +* @brief +* Entry of EgBasedAddrLib ComputeSurfaceInfo +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE EgBasedAddrLib::HwlComputeSurfaceInfo( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE retCode = ADDR_OK; + + if (pIn->numSamples < pIn->numFrags) + { + retCode = ADDR_INVALIDPARAMS; + } + + ADDR_TILEINFO tileInfo = {0}; + + if (retCode == ADDR_OK) + { + // Uses internal tile info if pOut does not have a valid pTileInfo + if (pOut->pTileInfo == NULL) + { + pOut->pTileInfo = &tileInfo; + } + + if (!DispatchComputeSurfaceInfo(pIn, pOut)) + { + retCode = ADDR_INVALIDPARAMS; + } + + // Returns an index + pOut->tileIndex = HwlPostCheckTileIndex(pOut->pTileInfo, + pOut->tileMode, + pOut->tileType, + pOut->tileIndex); + + if (IsMacroTiled(pOut->tileMode) && (pOut->macroModeIndex == TileIndexInvalid)) + { + pOut->macroModeIndex = HwlComputeMacroModeIndex(pOut->tileIndex, + pIn->flags, + pIn->bpp, + pIn->numSamples, + pOut->pTileInfo); + } + + // Resets pTileInfo to NULL if the internal tile info is used + if (pOut->pTileInfo == &tileInfo) + { +#if DEBUG + // Client does not pass in a valid pTileInfo + if (IsMacroTiled(pOut->tileMode)) + { + // If a valid index is returned, then no pTileInfo is okay + ADDR_ASSERT(!m_configFlags.useTileIndex || pOut->tileIndex != TileIndexInvalid); + + if (!IsTileInfoAllZero(pIn->pTileInfo)) + { + // The initial value of pIn->pTileInfo is copied to tileInfo + // We do not expect any of these value to be changed nor any 0 of inputs + ADDR_ASSERT(tileInfo.banks == pIn->pTileInfo->banks); + ADDR_ASSERT(tileInfo.bankWidth == pIn->pTileInfo->bankWidth); + ADDR_ASSERT(tileInfo.bankHeight == pIn->pTileInfo->bankHeight); + ADDR_ASSERT(tileInfo.macroAspectRatio == pIn->pTileInfo->macroAspectRatio); + ADDR_ASSERT(tileInfo.tileSplitBytes == pIn->pTileInfo->tileSplitBytes); + } + } +#endif + pOut->pTileInfo = NULL; + } + } + + return retCode; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::HwlComputeSurfaceAddrFromCoord +* @brief +* Entry of EgBasedAddrLib ComputeSurfaceAddrFromCoord +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE EgBasedAddrLib::HwlComputeSurfaceAddrFromCoord( + const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE retCode = ADDR_OK; + + if ( +#if !ALT_TEST // Overflow test needs this out-of-boundary coord + (pIn->x > pIn->pitch) || + (pIn->y > pIn->height) || +#endif + (pIn->numSamples > m_maxSamples)) + { + retCode = ADDR_INVALIDPARAMS; + } + else + { + pOut->addr = DispatchComputeSurfaceAddrFromCoord(pIn, pOut); + } + + return retCode; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::HwlComputeSurfaceCoordFromAddr +* @brief +* Entry of EgBasedAddrLib ComputeSurfaceCoordFromAddr +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE EgBasedAddrLib::HwlComputeSurfaceCoordFromAddr( + const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE retCode = ADDR_OK; + + if ((pIn->bitPosition >= 8) || + (pIn->numSamples > m_maxSamples)) + { + retCode = ADDR_INVALIDPARAMS; + } + else + { + DispatchComputeSurfaceCoordFromAddr(pIn, pOut); + } + return retCode; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::HwlComputeSliceTileSwizzle +* @brief +* Entry of EgBasedAddrLib ComputeSurfaceCoordFromAddr +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE EgBasedAddrLib::HwlComputeSliceTileSwizzle( + const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE retCode = ADDR_OK; + + if (pIn->pTileInfo && (pIn->pTileInfo->banks > 0)) + { + + pOut->tileSwizzle = ComputeSliceTileSwizzle(pIn->tileMode, + pIn->baseSwizzle, + pIn->slice, + pIn->baseAddr, + pIn->pTileInfo); + } + else + { + retCode = ADDR_INVALIDPARAMS; + } + + return retCode; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::HwlComputeHtileBpp +* +* @brief +* Compute htile bpp +* +* @return +* Htile bpp +*************************************************************************************************** +*/ +UINT_32 EgBasedAddrLib::HwlComputeHtileBpp( + BOOL_32 isWidth8, ///< [in] TRUE if block width is 8 + BOOL_32 isHeight8 ///< [in] TRUE if block height is 8 + ) const +{ + // only support 8x8 mode + ADDR_ASSERT(isWidth8 && isHeight8); + return 32; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::HwlComputeHtileBaseAlign +* +* @brief +* Compute htile base alignment +* +* @return +* Htile base alignment +*************************************************************************************************** +*/ +UINT_32 EgBasedAddrLib::HwlComputeHtileBaseAlign( + BOOL_32 isTcCompatible, ///< [in] if TC compatible + BOOL_32 isLinear, ///< [in] if it is linear mode + ADDR_TILEINFO* pTileInfo ///< [in] Tile info + ) const +{ + UINT_32 baseAlign = m_pipeInterleaveBytes * HwlGetPipes(pTileInfo); + + if (isTcCompatible) + { + ADDR_ASSERT(pTileInfo != NULL); + if (pTileInfo) + { + baseAlign *= pTileInfo->banks; + } + } + + return baseAlign; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::HwlGetPitchAlignmentMicroTiled +* +* @brief +* Compute 1D tiled surface pitch alignment, calculation results are returned through +* output parameters. +* +* @return +* pitch alignment +*************************************************************************************************** +*/ +UINT_32 EgBasedAddrLib::HwlGetPitchAlignmentMicroTiled( + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 bpp, ///< [in] bits per pixel + ADDR_SURFACE_FLAGS flags, ///< [in] surface flags + UINT_32 numSamples ///< [in] number of samples + ) const +{ + UINT_32 pitchAlign; + + UINT_32 microTileThickness = ComputeSurfaceThickness(tileMode); + + UINT_32 pixelsPerMicroTile; + UINT_32 pixelsPerPipeInterleave; + UINT_32 microTilesPerPipeInterleave; + + // + // Special workaround for depth/stencil buffer, use 8 bpp to meet larger requirement for + // stencil buffer since pitch alignment is related to bpp. + // For a depth only buffer do not set this. + // + // Note: this actually does not work for mipmap but mipmap depth texture is not really + // sampled with mipmap. + // + if (flags.depth && !flags.noStencil) + { + bpp = 8; + } + + pixelsPerMicroTile = MicroTilePixels * microTileThickness; + pixelsPerPipeInterleave = BYTES_TO_BITS(m_pipeInterleaveBytes) / (bpp * numSamples); + microTilesPerPipeInterleave = pixelsPerPipeInterleave / pixelsPerMicroTile; + + pitchAlign = Max(MicroTileWidth, microTilesPerPipeInterleave * MicroTileWidth); + + return pitchAlign; +} + +/** +*************************************************************************************************** +* EgBasedAddrLib::HwlGetSizeAdjustmentMicroTiled +* +* @brief +* Adjust 1D tiled surface pitch and slice size +* +* @return +* Logical slice size in bytes +*************************************************************************************************** +*/ +UINT_64 EgBasedAddrLib::HwlGetSizeAdjustmentMicroTiled( + UINT_32 thickness, ///< [in] thickness + UINT_32 bpp, ///< [in] bits per pixel + ADDR_SURFACE_FLAGS flags, ///< [in] surface flags + UINT_32 numSamples, ///< [in] number of samples + UINT_32 baseAlign, ///< [in] base alignment + UINT_32 pitchAlign, ///< [in] pitch alignment + UINT_32* pPitch, ///< [in/out] pointer to pitch + UINT_32* pHeight ///< [in/out] pointer to height + ) const +{ + UINT_64 logicalSliceSize; + UINT_64 physicalSliceSize; + + UINT_32 pitch = *pPitch; + UINT_32 height = *pHeight; + + // Logical slice: pitch * height * bpp * numSamples (no 1D MSAA so actually numSamples == 1) + logicalSliceSize = BITS_TO_BYTES(static_cast(pitch) * height * bpp * numSamples); + + // Physical slice: multiplied by thickness + physicalSliceSize = logicalSliceSize * thickness; + + // + // R800 will always pad physical slice size to baseAlign which is pipe_interleave_bytes + // + ADDR_ASSERT((physicalSliceSize % baseAlign) == 0) + + return logicalSliceSize; +} + diff -Nru mesa-12.0.6/src/amd/addrlib/r800/egbaddrlib.h mesa-17.0.7/src/amd/addrlib/r800/egbaddrlib.h --- mesa-12.0.6/src/amd/addrlib/r800/egbaddrlib.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/addrlib/r800/egbaddrlib.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,412 @@ +/* + * Copyright © 2014 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +*************************************************************************************************** +* @file egbaddrlib.h +* @brief Contains the EgBasedAddrLib class definition. +*************************************************************************************************** +*/ + +#ifndef __EG_BASED_ADDR_LIB_H__ +#define __EG_BASED_ADDR_LIB_H__ + +#include "addrlib.h" + + +/// Structures for functions +struct CoordFromBankPipe +{ + UINT_32 xBits : 3; + UINT_32 yBits : 4; + + UINT_32 xBit3 : 1; + UINT_32 xBit4 : 1; + UINT_32 xBit5 : 1; + UINT_32 yBit3 : 1; + UINT_32 yBit4 : 1; + UINT_32 yBit5 : 1; + UINT_32 yBit6 : 1; +}; + +/** +*************************************************************************************************** +* @brief This class is the Evergreen based address library +* @note Abstract class +*************************************************************************************************** +*/ +class EgBasedAddrLib : public AddrLib +{ +protected: + EgBasedAddrLib(const AddrClient* pClient); + virtual ~EgBasedAddrLib(); + +public: + + /// Surface info functions + + // NOTE: DispatchComputeSurfaceInfo using TileInfo takes both an input and an output. + // On input: + // One or more fields may be 0 to be calculated/defaulted - pre-SI h/w. + // H/W using tile mode index only accepts none or all 0's - SI and newer h/w. + // It then returns the actual tiling configuration used. + // Other methods' TileInfo must be valid on entry + BOOL_32 DispatchComputeSurfaceInfo( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE DispatchComputeFmaskInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut); + +protected: + // Hwl interface + virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoord( + const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeSurfaceCoordFromAddr( + const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeSliceTileSwizzle( + const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, + ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlExtractBankPipeSwizzle( + const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, + ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlCombineBankPipeSwizzle( + UINT_32 bankSwizzle, UINT_32 pipeSwizzle, ADDR_TILEINFO* pTileInfo, + UINT_64 baseAddr, UINT_32* pTileSwizzle) const; + + virtual ADDR_E_RETURNCODE HwlComputeBaseSwizzle( + const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, + ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlConvertTileInfoToHW( + const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, + ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const; + + virtual UINT_32 HwlComputeHtileBpp( + BOOL_32 isWidth8, BOOL_32 isHeight8) const; + + virtual UINT_32 HwlComputeHtileBaseAlign( + BOOL_32 isTcCompatible, BOOL_32 isLinear, ADDR_TILEINFO* pTileInfo) const; + + virtual ADDR_E_RETURNCODE HwlComputeFmaskInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut); + + virtual ADDR_E_RETURNCODE HwlComputeFmaskAddrFromCoord( + const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlComputeFmaskCoordFromAddr( + const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const; + + virtual BOOL_32 HwlDegradeBaseLevel( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const; + + virtual UINT_32 HwlComputeQbStereoRightSwizzle( + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pInfo) const; + + virtual VOID HwlComputePixelCoordFromOffset( + UINT_32 offset, UINT_32 bpp, UINT_32 numSamples, + AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits, + UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample, + AddrTileType microTileType, BOOL_32 isDepthSampleOrder) const; + + /// Return Cmask block max + virtual BOOL_32 HwlGetMaxCmaskBlockMax() const + { + return 16383; // 14 bits + } + + // Sub-hwl interface + /// Pure virtual function to setup tile info (indices) if client requests to do so + virtual VOID HwlSetupTileInfo( + AddrTileMode tileMode, ADDR_SURFACE_FLAGS flags, + UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, + ADDR_TILEINFO* inputTileInfo, ADDR_TILEINFO* outputTileInfo, + AddrTileType inTileType, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0; + + /// Pure virtual function to get pitch alignment for linear modes + virtual UINT_32 HwlGetPitchAlignmentLinear(UINT_32 bpp, ADDR_SURFACE_FLAGS flags) const = 0; + + /// Pure virtual function to get size adjustment for linear modes + virtual UINT_64 HwlGetSizeAdjustmentLinear( + AddrTileMode tileMode, + UINT_32 bpp, UINT_32 numSamples, UINT_32 baseAlign, UINT_32 pitchAlign, + UINT_32 *pPitch, UINT_32 *pHeight, UINT_32 *pHeightAlign) const = 0; + + virtual UINT_32 HwlGetPitchAlignmentMicroTiled( + AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples) const; + + virtual UINT_64 HwlGetSizeAdjustmentMicroTiled( + UINT_32 thickness, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples, + UINT_32 baseAlign, UINT_32 pitchAlign, + UINT_32 *pPitch, UINT_32 *pHeight) const; + + /// Pure virtual function to do extra sanity check + virtual BOOL_32 HwlSanityCheckMacroTiled( + ADDR_TILEINFO* pTileInfo) const = 0; + + /// Pure virtual function to check current level to be the last macro tiled one + virtual VOID HwlCheckLastMacroTiledLvl( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0; + + /// Adjusts bank before bank is modified by rotation + virtual UINT_32 HwlPreAdjustBank( + UINT_32 tileX, UINT_32 bank, ADDR_TILEINFO* pTileInfo) const = 0; + + virtual VOID HwlComputeSurfaceCoord2DFromBankPipe( + AddrTileMode tileMode, UINT_32* pX, UINT_32* pY, UINT_32 slice, + UINT_32 bank, UINT_32 pipe, + UINT_32 bankSwizzle, UINT_32 pipeSwizzle, UINT_32 tileSlices, + BOOL_32 ignoreSE, + ADDR_TILEINFO* pTileInfo) const = 0; + + virtual BOOL_32 HwlTileInfoEqual( + const ADDR_TILEINFO* pLeft, const ADDR_TILEINFO* pRight) const; + + virtual AddrTileMode HwlDegradeThickTileMode( + AddrTileMode baseTileMode, UINT_32 numSlices, UINT_32* pBytesPerTile) const; + + virtual INT_32 HwlPostCheckTileIndex( + const ADDR_TILEINFO* pInfo, AddrTileMode mode, AddrTileType type, + INT curIndex = TileIndexInvalid) const + { + return TileIndexInvalid; + } + + virtual VOID HwlFmaskPreThunkSurfInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pFmaskIn, + const ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut, + ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut) const + { + } + + virtual VOID HwlFmaskPostThunkSurfInfo( + const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut, + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut) const + { + } + + /// Virtual function to check if the height needs extra padding + /// for stereo right eye offset, to avoid bank pipe swizzle + virtual BOOL_32 HwlStereoCheckRightOffsetPadding() const + { + return FALSE; + } + + virtual BOOL_32 HwlReduceBankWidthHeight( + UINT_32 tileSize, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples, + UINT_32 bankHeightAlign, UINT_32 pipes, + ADDR_TILEINFO* pTileInfo) const; + + // Protected non-virtual functions + + /// Mip level functions + AddrTileMode ComputeSurfaceMipLevelTileMode( + AddrTileMode baseTileMode, UINT_32 bpp, + UINT_32 pitch, UINT_32 height, UINT_32 numSlices, UINT_32 numSamples, + UINT_32 pitchAlign, UINT_32 heightAlign, + ADDR_TILEINFO* pTileInfo) const; + + /// Swizzle functions + VOID ExtractBankPipeSwizzle( + UINT_32 base256b, ADDR_TILEINFO* pTileInfo, + UINT_32* pBankSwizzle, UINT_32* pPipeSwizzle) const; + + UINT_32 GetBankPipeSwizzle( + UINT_32 bankSwizzle, UINT_32 pipeSwizzle, + UINT_64 baseAddr, ADDR_TILEINFO* pTileInfo) const; + + UINT_32 ComputeSliceTileSwizzle( + AddrTileMode tileMode, UINT_32 baseSwizzle, UINT_32 slice, UINT_64 baseAddr, + ADDR_TILEINFO* pTileInfo) const; + + /// Addressing functions + UINT_32 ComputeBankFromCoord( + UINT_32 x, UINT_32 y, UINT_32 slice, + AddrTileMode tileMode, UINT_32 bankSwizzle, UINT_32 tileSpitSlice, + ADDR_TILEINFO* pTileInfo) const; + + UINT_32 ComputeBankFromAddr( + UINT_64 addr, UINT_32 numBanks, UINT_32 numPipes) const; + + UINT_32 ComputePipeRotation( + AddrTileMode tileMode, UINT_32 numPipes) const; + + UINT_32 ComputeBankRotation( + AddrTileMode tileMode, UINT_32 numBanks, + UINT_32 numPipes) const; + + VOID ComputeSurfaceCoord2DFromBankPipe( + AddrTileMode tileMode, UINT_32 x, UINT_32 y, UINT_32 slice, + UINT_32 bank, UINT_32 pipe, + UINT_32 bankSwizzle, UINT_32 pipeSwizzle, UINT_32 tileSlices, + ADDR_TILEINFO* pTileInfo, + CoordFromBankPipe *pOutput) const; + + /// Htile/Cmask functions + UINT_64 ComputeHtileBytes( + UINT_32 pitch, UINT_32 height, UINT_32 bpp, + BOOL_32 isLinear, UINT_32 numSlices, UINT_64* sliceBytes, UINT_32 baseAlign) const; + + // Static functions + static BOOL_32 IsTileInfoAllZero(ADDR_TILEINFO* pTileInfo); + static UINT_32 ComputeFmaskNumPlanesFromNumSamples(UINT_32 numSamples); + static UINT_32 ComputeFmaskResolvedBppFromNumSamples(UINT_32 numSamples); + +private: + + BOOL_32 ComputeSurfaceInfoLinear( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut, + UINT_32 padDims) const; + + BOOL_32 ComputeSurfaceInfoMicroTiled( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut, + UINT_32 padDims, + AddrTileMode expTileMode) const; + + BOOL_32 ComputeSurfaceInfoMacroTiled( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut, + UINT_32 padDims, + AddrTileMode expTileMode) const; + + BOOL_32 ComputeSurfaceAlignmentsLinear( + AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, + UINT_32* pBaseAlign, UINT_32* pPitchAlign, UINT_32* pHeightAlign) const; + + BOOL_32 ComputeSurfaceAlignmentsMicroTiled( + AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, + UINT_32 mipLevel, UINT_32 numSamples, + UINT_32* pBaseAlign, UINT_32* pPitchAlign, UINT_32* pHeightAlign) const; + + BOOL_32 ComputeSurfaceAlignmentsMacroTiled( + AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, + UINT_32 mipLevel, UINT_32 numSamples, + ADDR_TILEINFO* pTileInfo, + UINT_32* pBaseAlign, UINT_32* pPitchAlign, UINT_32* pHeightAlign) const; + + /// Surface addressing functions + UINT_64 DispatchComputeSurfaceAddrFromCoord( + const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; + + VOID DispatchComputeSurfaceCoordFromAddr( + const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const; + + UINT_64 ComputeSurfaceAddrFromCoordMicroTiled( + UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample, + UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, + AddrTileMode tileMode, + AddrTileType microTileType, BOOL_32 isDepthSampleOrder, + UINT_32* pBitPosition) const; + + UINT_64 ComputeSurfaceAddrFromCoordMacroTiled( + UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample, + UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, + AddrTileMode tileMode, + AddrTileType microTileType, BOOL_32 ignoreSE, BOOL_32 isDepthSampleOrder, + UINT_32 pipeSwizzle, UINT_32 bankSwizzle, + ADDR_TILEINFO* pTileInfo, + UINT_32* pBitPosition) const; + + VOID ComputeSurfaceCoordFromAddrMacroTiled( + UINT_64 addr, UINT_32 bitPosition, + UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, + AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits, + AddrTileType microTileType, BOOL_32 ignoreSE, BOOL_32 isDepthSampleOrder, + UINT_32 pipeSwizzle, UINT_32 bankSwizzle, + ADDR_TILEINFO* pTileInfo, + UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample) const; + + /// Fmask functions + UINT_64 DispatchComputeFmaskAddrFromCoord( + const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, + ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const; + + VOID DispatchComputeFmaskCoordFromAddr( + const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, + ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const; + + // FMASK related methods - private + UINT_64 ComputeFmaskAddrFromCoordMicroTiled( + UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample, UINT_32 plane, + UINT_32 pitch, UINT_32 height, UINT_32 numSamples, AddrTileMode tileMode, + BOOL_32 resolved, UINT_32* pBitPosition) const; + + VOID ComputeFmaskCoordFromAddrMicroTiled( + UINT_64 addr, UINT_32 bitPosition, + UINT_32 pitch, UINT_32 height, UINT_32 numSamples, + AddrTileMode tileMode, BOOL_32 resolved, + UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample, UINT_32* pPlane) const; + + VOID ComputeFmaskCoordFromAddrMacroTiled( + UINT_64 addr, UINT_32 bitPosition, + UINT_32 pitch, UINT_32 height, UINT_32 numSamples, AddrTileMode tileMode, + UINT_32 pipeSwizzle, UINT_32 bankSwizzle, + BOOL_32 ignoreSE, + ADDR_TILEINFO* pTileInfo, + BOOL_32 resolved, + UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample, UINT_32* pPlane) const; + + UINT_64 ComputeFmaskAddrFromCoordMacroTiled( + UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample, UINT_32 plane, + UINT_32 pitch, UINT_32 height, UINT_32 numSamples, + AddrTileMode tileMode, UINT_32 pipeSwizzle, UINT_32 bankSwizzle, + BOOL_32 ignoreSE, + ADDR_TILEINFO* pTileInfo, + BOOL_32 resolved, + UINT_32* pBitPosition) const; + + /// Sanity check functions + BOOL_32 SanityCheckMacroTiled( + ADDR_TILEINFO* pTileInfo) const; + +protected: + UINT_32 m_ranks; ///< Number of ranks - MC_ARB_RAMCFG.NOOFRANK + UINT_32 m_logicalBanks; ///< Logical banks = m_banks * m_ranks if m_banks != 16 + UINT_32 m_bankInterleave; ///< Bank interleave, as a multiple of pipe interleave size +}; + +#endif + diff -Nru mesa-12.0.6/src/amd/addrlib/r800/siaddrlib.cpp mesa-17.0.7/src/amd/addrlib/r800/siaddrlib.cpp --- mesa-12.0.6/src/amd/addrlib/r800/siaddrlib.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/addrlib/r800/siaddrlib.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,2818 @@ +/* + * Copyright © 2014 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +*************************************************************************************************** +* @file siaddrlib.cpp +* @brief Contains the implementation for the SIAddrLib class. +*************************************************************************************************** +*/ + +#include "siaddrlib.h" + +#include "si_gb_reg.h" + +#include "si_ci_vi_merged_enum.h" + +#if BRAHMA_BUILD +#include "amdgpu_id.h" +#else +#include "si_id.h" +#endif + +/////////////////////////////////////////////////////////////////////////////////////////////////// +/////////////////////////////////////////////////////////////////////////////////////////////////// + +/** +*************************************************************************************************** +* AddrSIHwlInit +* +* @brief +* Creates an SIAddrLib object. +* +* @return +* Returns an SIAddrLib object pointer. +*************************************************************************************************** +*/ +AddrLib* AddrSIHwlInit(const AddrClient* pClient) +{ + return SIAddrLib::CreateObj(pClient); +} + +/** +*************************************************************************************************** +* SIAddrLib::SIAddrLib +* +* @brief +* Constructor +* +*************************************************************************************************** +*/ +SIAddrLib::SIAddrLib(const AddrClient* pClient) : + EgBasedAddrLib(pClient), + m_noOfEntries(0) +{ + m_class = SI_ADDRLIB; + memset(&m_settings, 0, sizeof(m_settings)); +} + +/** +*************************************************************************************************** +* SIAddrLib::~SIAddrLib +* +* @brief +* Destructor +*************************************************************************************************** +*/ +SIAddrLib::~SIAddrLib() +{ +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlGetPipes +* +* @brief +* Get number pipes +* @return +* num pipes +*************************************************************************************************** +*/ +UINT_32 SIAddrLib::HwlGetPipes( + const ADDR_TILEINFO* pTileInfo ///< [in] Tile info + ) const +{ + UINT_32 numPipes; + + if (pTileInfo) + { + numPipes = GetPipePerSurf(pTileInfo->pipeConfig); + } + else + { + ADDR_ASSERT_ALWAYS(); + numPipes = m_pipes; // Suppose we should still have a global pipes + } + + return numPipes; +} + +/** +*************************************************************************************************** +* SIAddrLib::GetPipePerSurf +* @brief +* get pipe num base on inputing tileinfo->pipeconfig +* @return +* pipe number +*************************************************************************************************** +*/ +UINT_32 SIAddrLib::GetPipePerSurf( + AddrPipeCfg pipeConfig ///< [in] pipe config + ) const +{ + UINT_32 numPipes = 0; + + switch (pipeConfig) + { + case ADDR_PIPECFG_P2: + numPipes = 2; + break; + case ADDR_PIPECFG_P4_8x16: + case ADDR_PIPECFG_P4_16x16: + case ADDR_PIPECFG_P4_16x32: + case ADDR_PIPECFG_P4_32x32: + numPipes = 4; + break; + case ADDR_PIPECFG_P8_16x16_8x16: + case ADDR_PIPECFG_P8_16x32_8x16: + case ADDR_PIPECFG_P8_32x32_8x16: + case ADDR_PIPECFG_P8_16x32_16x16: + case ADDR_PIPECFG_P8_32x32_16x16: + case ADDR_PIPECFG_P8_32x32_16x32: + case ADDR_PIPECFG_P8_32x64_32x32: + numPipes = 8; + break; + case ADDR_PIPECFG_P16_32x32_8x16: + case ADDR_PIPECFG_P16_32x32_16x16: + numPipes = 16; + break; + default: + ADDR_ASSERT(!"Invalid pipe config"); + numPipes = m_pipes; + } + return numPipes; +} + +/** +*************************************************************************************************** +* SIAddrLib::ComputePipeFromCoord +* +* @brief +* Compute pipe number from coordinates +* @return +* Pipe number +*************************************************************************************************** +*/ +UINT_32 SIAddrLib::ComputePipeFromCoord( + UINT_32 x, ///< [in] x coordinate + UINT_32 y, ///< [in] y coordinate + UINT_32 slice, ///< [in] slice index + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 pipeSwizzle, ///< [in] pipe swizzle + BOOL_32 ignoreSE, ///< [in] TRUE if shader engines are ignored + ADDR_TILEINFO* pTileInfo ///< [in] Tile info + ) const +{ + UINT_32 pipe; + UINT_32 pipeBit0 = 0; + UINT_32 pipeBit1 = 0; + UINT_32 pipeBit2 = 0; + UINT_32 pipeBit3 = 0; + UINT_32 sliceRotation; + UINT_32 numPipes = 0; + + UINT_32 tx = x / MicroTileWidth; + UINT_32 ty = y / MicroTileHeight; + UINT_32 x3 = _BIT(tx,0); + UINT_32 x4 = _BIT(tx,1); + UINT_32 x5 = _BIT(tx,2); + UINT_32 x6 = _BIT(tx,3); + UINT_32 y3 = _BIT(ty,0); + UINT_32 y4 = _BIT(ty,1); + UINT_32 y5 = _BIT(ty,2); + UINT_32 y6 = _BIT(ty,3); + + switch (pTileInfo->pipeConfig) + { + case ADDR_PIPECFG_P2: + pipeBit0 = x3 ^ y3; + numPipes = 2; + break; + case ADDR_PIPECFG_P4_8x16: + pipeBit0 = x4 ^ y3; + pipeBit1 = x3 ^ y4; + numPipes = 4; + break; + case ADDR_PIPECFG_P4_16x16: + pipeBit0 = x3 ^ y3 ^ x4; + pipeBit1 = x4 ^ y4; + numPipes = 4; + break; + case ADDR_PIPECFG_P4_16x32: + pipeBit0 = x3 ^ y3 ^ x4; + pipeBit1 = x4 ^ y5; + numPipes = 4; + break; + case ADDR_PIPECFG_P4_32x32: + pipeBit0 = x3 ^ y3 ^ x5; + pipeBit1 = x5 ^ y5; + numPipes = 4; + break; + case ADDR_PIPECFG_P8_16x16_8x16: + pipeBit0 = x4 ^ y3 ^ x5; + pipeBit1 = x3 ^ y5; + numPipes = 8; + break; + case ADDR_PIPECFG_P8_16x32_8x16: + pipeBit0 = x4 ^ y3 ^ x5; + pipeBit1 = x3 ^ y4; + pipeBit2 = x4 ^ y5; + numPipes = 8; + break; + case ADDR_PIPECFG_P8_16x32_16x16: + pipeBit0 = x3 ^ y3 ^ x4; + pipeBit1 = x5 ^ y4; + pipeBit2 = x4 ^ y5; + numPipes = 8; + break; + case ADDR_PIPECFG_P8_32x32_8x16: + pipeBit0 = x4 ^ y3 ^ x5; + pipeBit1 = x3 ^ y4; + pipeBit2 = x5 ^ y5; + numPipes = 8; + break; + case ADDR_PIPECFG_P8_32x32_16x16: + pipeBit0 = x3 ^ y3 ^ x4; + pipeBit1 = x4 ^ y4; + pipeBit2 = x5 ^ y5; + numPipes = 8; + break; + case ADDR_PIPECFG_P8_32x32_16x32: + pipeBit0 = x3 ^ y3 ^ x4; + pipeBit1 = x4 ^ y6; + pipeBit2 = x5 ^ y5; + numPipes = 8; + break; + case ADDR_PIPECFG_P8_32x64_32x32: + pipeBit0 = x3 ^ y3 ^ x5; + pipeBit1 = x6 ^ y5; + pipeBit2 = x5 ^ y6; + numPipes = 8; + break; + case ADDR_PIPECFG_P16_32x32_8x16: + pipeBit0 = x4 ^ y3; + pipeBit1 = x3 ^ y4; + pipeBit2 = x5 ^ y6; + pipeBit3 = x6 ^ y5; + numPipes = 16; + break; + case ADDR_PIPECFG_P16_32x32_16x16: + pipeBit0 = x3 ^ y3 ^ x4; + pipeBit1 = x4 ^ y4; + pipeBit2 = x5 ^ y6; + pipeBit3 = x6 ^ y5; + numPipes = 16; + break; + default: + ADDR_UNHANDLED_CASE(); + break; + } + pipe = pipeBit0 | (pipeBit1 << 1) | (pipeBit2 << 2) | (pipeBit3 << 3); + + UINT_32 microTileThickness = ComputeSurfaceThickness(tileMode); + + // + // Apply pipe rotation for the slice. + // + switch (tileMode) + { + case ADDR_TM_3D_TILED_THIN1: //fall through thin + case ADDR_TM_3D_TILED_THICK: //fall through thick + case ADDR_TM_3D_TILED_XTHICK: + sliceRotation = + Max(1, static_cast(numPipes / 2) - 1) * (slice / microTileThickness); + break; + default: + sliceRotation = 0; + break; + } + pipeSwizzle += sliceRotation; + pipeSwizzle &= (numPipes - 1); + + pipe = pipe ^ pipeSwizzle; + + return pipe; +} + +/** +*************************************************************************************************** +* SIAddrLib::ComputeTileCoordFromPipeAndElemIdx +* +* @brief +* Compute (x,y) of a tile within a macro tile from address +* @return +* Pipe number +*************************************************************************************************** +*/ +VOID SIAddrLib::ComputeTileCoordFromPipeAndElemIdx( + UINT_32 elemIdx, ///< [in] per pipe element index within a macro tile + UINT_32 pipe, ///< [in] pipe index + AddrPipeCfg pipeCfg, ///< [in] pipe config + UINT_32 pitchInMacroTile, ///< [in] surface pitch in macro tile + UINT_32 x, ///< [in] x coordinate of the (0,0) tile in a macro tile + UINT_32 y, ///< [in] y coordinate of the (0,0) tile in a macro tile + UINT_32* pX, ///< [out] x coordinate + UINT_32* pY ///< [out] y coordinate + ) const +{ + UINT_32 pipebit0 = _BIT(pipe,0); + UINT_32 pipebit1 = _BIT(pipe,1); + UINT_32 pipebit2 = _BIT(pipe,2); + UINT_32 pipebit3 = _BIT(pipe,3); + UINT_32 elemIdx0 = _BIT(elemIdx,0); + UINT_32 elemIdx1 = _BIT(elemIdx,1); + UINT_32 elemIdx2 = _BIT(elemIdx,2); + UINT_32 x3 = 0; + UINT_32 x4 = 0; + UINT_32 x5 = 0; + UINT_32 x6 = 0; + UINT_32 y3 = 0; + UINT_32 y4 = 0; + UINT_32 y5 = 0; + UINT_32 y6 = 0; + + switch(pipeCfg) + { + case ADDR_PIPECFG_P2: + x4 = elemIdx2; + y4 = elemIdx1 ^ x4; + y3 = elemIdx0 ^ x4; + x3 = pipebit0 ^ y3; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(2, x4, x3); + break; + case ADDR_PIPECFG_P4_8x16: + x4 = elemIdx1; + y4 = elemIdx0 ^ x4; + x3 = pipebit1 ^ y4; + y3 = pipebit0 ^ x4; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(2, x4, x3); + break; + case ADDR_PIPECFG_P4_16x16: + x4 = elemIdx1; + y3 = elemIdx0 ^ x4; + y4 = pipebit1 ^ x4; + x3 = pipebit0 ^ y3 ^ x4; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(2, x4, x3); + break; + case ADDR_PIPECFG_P4_16x32: + x3 = elemIdx0 ^ pipebit0; + y5 = _BIT(y,5); + x4 = pipebit1 ^ y5; + y3 = pipebit0 ^ x3 ^ x4; + y4 = elemIdx1 ^ x4; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(2, x4, x3); + break; + case ADDR_PIPECFG_P4_32x32: + x4 = elemIdx2; + y3 = elemIdx0 ^ x4; + y4 = elemIdx1 ^ x4; + if((pitchInMacroTile % 2) == 0) + { //even + y5 = _BIT(y,5); + x5 = pipebit1 ^ y5; + x3 = pipebit0 ^ y3 ^ x5; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(3, x5, x4, x3); + } + else + { //odd + x5 = _BIT(x,5); + x3 = pipebit0 ^ y3 ^ x5; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(2, x4, x3); + } + break; + case ADDR_PIPECFG_P8_16x16_8x16: + x4 = elemIdx0; + y5 = _BIT(y,5); + x5 = _BIT(x,5); + x3 = pipebit1 ^ y5; + y4 = pipebit2 ^ x4; + y3 = pipebit0 ^ x5 ^ x4; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(2, x4, x3); + break; + case ADDR_PIPECFG_P8_16x32_8x16: + x3 = elemIdx0; + y4 = pipebit1 ^ x3; + y5 = _BIT(y,5); + x5 = _BIT(x,5); + x4 = pipebit2 ^ y5; + y3 = pipebit0 ^ x4 ^ x5; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(2, x4, x3); + break; + case ADDR_PIPECFG_P8_32x32_8x16: + x4 = elemIdx1; + y4 = elemIdx0 ^ x4; + x3 = pipebit1 ^ y4; + if((pitchInMacroTile % 2) == 0) + { //even + y5 = _BIT(y,5); + x5 = _BIT(x,5); + x5 = pipebit2 ^ y5; + y3 = pipebit0 ^ x4 ^ x5; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(3, x5, x4, x3); + } + else + { //odd + x5 = _BIT(x,5); + y3 = pipebit0 ^ x4 ^ x5; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(2, x4, x3); + } + break; + case ADDR_PIPECFG_P8_16x32_16x16: + x3 = elemIdx0; + x5 = _BIT(x,5); + y5 = _BIT(y,5); + x4 = pipebit2 ^ y5; + y4 = pipebit1 ^ x5; + y3 = pipebit0 ^ x3 ^ x4; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(2, x4, x3); + break; + case ADDR_PIPECFG_P8_32x32_16x16: + x4 = elemIdx1; + y3 = elemIdx0 ^ x4; + x3 = y3^x4^pipebit0; + y4 = pipebit1 ^ x4; + if((pitchInMacroTile % 2) == 0) + { //even + y5 = _BIT(y,5); + x5 = pipebit2 ^ y5; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(3, x5, x4, x3); + } + else + { //odd + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(2, x4, x3); + } + break; + case ADDR_PIPECFG_P8_32x32_16x32: + if((pitchInMacroTile % 2) == 0) + { //even + y5 = _BIT(y,5); + y6 = _BIT(y,6); + x4 = pipebit1 ^ y6; + y3 = elemIdx0 ^ x4; + y4 = elemIdx1 ^ x4; + x3 = pipebit0 ^ y3 ^ x4; + x5 = pipebit2 ^ y5; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(3, x5, x4, x3); + } + else + { //odd + y6 = _BIT(y,6); + x4 = pipebit1 ^ y6; + y3 = elemIdx0 ^ x4; + y4 = elemIdx1 ^ x4; + x3 = pipebit0 ^ y3 ^ x4; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(2, x4, x3); + } + break; + case ADDR_PIPECFG_P8_32x64_32x32: + x4 = elemIdx2; + y3 = elemIdx0 ^ x4; + y4 = elemIdx1 ^ x4; + if((pitchInMacroTile % 4) == 0) + { //multiple of 4 + y5 = _BIT(y,5); + y6 = _BIT(y,6); + x5 = pipebit2 ^ y6; + x6 = pipebit1 ^ y5; + x3 = pipebit0 ^ y3 ^ x5; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(4, x6, x5, x4, x3); + } + else + { + y6 = _BIT(y,6); + x5 = pipebit2 ^ y6; + x3 = pipebit0 ^ y3 ^ x5; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(3, x5, x4, x3); + } + break; + case ADDR_PIPECFG_P16_32x32_8x16: + x4 = elemIdx1; + y4 = elemIdx0 ^ x4; + y3 = pipebit0 ^ x4; + x3 = pipebit1 ^ y4; + if((pitchInMacroTile % 4) == 0) + { //multiple of 4 + y5 = _BIT(y,5); + y6 = _BIT(y,6); + x5 = pipebit2 ^ y6; + x6 = pipebit3 ^ y5; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(4, x6, x5,x4, x3); + } + else + { + y6 = _BIT(y,6); + x5 = pipebit2 ^ y6; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(3, x5, x4, x3); + } + break; + case ADDR_PIPECFG_P16_32x32_16x16: + x4 = elemIdx1; + y3 = elemIdx0 ^ x4; + y4 = pipebit1 ^ x4; + x3 = pipebit0 ^ y3 ^ x4; + if((pitchInMacroTile % 4) == 0) + { //multiple of 4 + y5 = _BIT(y,5); + y6 = _BIT(y,6); + x5 = pipebit2 ^ y6; + x6 = pipebit3 ^ y5; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(4, x6, x5, x4, x3); + } + else + { + y6 = _BIT(y,6); + x5 = pipebit2 ^ y6; + *pY = Bits2Number(2, y4, y3); + *pX = Bits2Number(3, x5, x4, x3); + } + break; + default: + ADDR_UNHANDLED_CASE(); + } +} + +/** +*************************************************************************************************** +* SIAddrLib::TileCoordToMaskElementIndex +* +* @brief +* Compute element index from coordinates in tiles +* @return +* Element index +*************************************************************************************************** +*/ +UINT_32 SIAddrLib::TileCoordToMaskElementIndex( + UINT_32 tx, ///< [in] x coord, in Tiles + UINT_32 ty, ///< [in] y coord, in Tiles + AddrPipeCfg pipeConfig, ///< [in] pipe config + UINT_32* macroShift, ///< [out] macro shift + UINT_32* elemIdxBits ///< [out] tile offset bits + ) const +{ + UINT_32 elemIdx = 0; + UINT_32 elemIdx0, elemIdx1, elemIdx2; + UINT_32 tx0, tx1; + UINT_32 ty0, ty1; + + tx0 = _BIT(tx,0); + tx1 = _BIT(tx,1); + ty0 = _BIT(ty,0); + ty1 = _BIT(ty,1); + + switch(pipeConfig) + { + case ADDR_PIPECFG_P2: + *macroShift = 3; + *elemIdxBits =3; + elemIdx2 = tx1; + elemIdx1 = tx1 ^ ty1; + elemIdx0 = tx1 ^ ty0; + elemIdx = Bits2Number(3,elemIdx2,elemIdx1,elemIdx0); + break; + case ADDR_PIPECFG_P4_8x16: + *macroShift = 2; + *elemIdxBits =2; + elemIdx1 = tx1; + elemIdx0 = tx1 ^ ty1; + elemIdx = Bits2Number(2,elemIdx1,elemIdx0); + break; + case ADDR_PIPECFG_P4_16x16: + *macroShift = 2; + *elemIdxBits =2; + elemIdx0 = tx1^ty0; + elemIdx1 = tx1; + elemIdx = Bits2Number(2, elemIdx1, elemIdx0); + break; + case ADDR_PIPECFG_P4_16x32: + *macroShift = 2; + *elemIdxBits =2; + elemIdx0 = tx1^ty0; + elemIdx1 = tx1^ty1; + elemIdx = Bits2Number(2, elemIdx1, elemIdx0); + break; + case ADDR_PIPECFG_P4_32x32: + *macroShift = 2; + *elemIdxBits =3; + elemIdx0 = tx1^ty0; + elemIdx1 = tx1^ty1; + elemIdx2 = tx1; + elemIdx = Bits2Number(3, elemIdx2, elemIdx1, elemIdx0); + break; + case ADDR_PIPECFG_P8_16x16_8x16: + *macroShift = 1; + *elemIdxBits =1; + elemIdx0 = tx1; + elemIdx = elemIdx0; + break; + case ADDR_PIPECFG_P8_16x32_8x16: + *macroShift = 1; + *elemIdxBits =1; + elemIdx0 = tx0; + elemIdx = elemIdx0; + break; + case ADDR_PIPECFG_P8_32x32_8x16: + *macroShift = 1; + *elemIdxBits =2; + elemIdx1 = tx1; + elemIdx0 = tx1^ty1; + elemIdx = Bits2Number(2, elemIdx1, elemIdx0); + break; + case ADDR_PIPECFG_P8_16x32_16x16: + *macroShift = 1; + *elemIdxBits =1; + elemIdx0 = tx0; + elemIdx = elemIdx0; + break; + case ADDR_PIPECFG_P8_32x32_16x16: + *macroShift = 1; + *elemIdxBits =2; + elemIdx0 = tx1^ty0; + elemIdx1 = tx1; + elemIdx = Bits2Number(2, elemIdx1, elemIdx0); + break; + case ADDR_PIPECFG_P8_32x32_16x32: + *macroShift = 1; + *elemIdxBits =2; + elemIdx0 = tx1^ty0; + elemIdx1 = tx1^ty1; + elemIdx = Bits2Number(2, elemIdx1, elemIdx0); + break; + case ADDR_PIPECFG_P8_32x64_32x32: + *macroShift = 1; + *elemIdxBits =3; + elemIdx0 = tx1^ty0; + elemIdx1 = tx1^ty1; + elemIdx2 = tx1; + elemIdx = Bits2Number(3, elemIdx2, elemIdx1, elemIdx0); + break; + case ADDR_PIPECFG_P16_32x32_8x16: + *macroShift = 0; + *elemIdxBits =2; + elemIdx0 = tx1^ty1; + elemIdx1 = tx1; + elemIdx = Bits2Number(2, elemIdx1, elemIdx0); + break; + case ADDR_PIPECFG_P16_32x32_16x16: + *macroShift = 0; + *elemIdxBits =2; + elemIdx0 = tx1^ty0; + elemIdx1 = tx1; + elemIdx = Bits2Number(2, elemIdx1, elemIdx0); + break; + default: + ADDR_UNHANDLED_CASE(); + break; + } + + return elemIdx; +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlComputeTileDataWidthAndHeightLinear +* +* @brief +* Compute the squared cache shape for per-tile data (CMASK and HTILE) for linear layout +* +* @return +* N/A +* +* @note +* MacroWidth and macroHeight are measured in pixels +*************************************************************************************************** +*/ +VOID SIAddrLib::HwlComputeTileDataWidthAndHeightLinear( + UINT_32* pMacroWidth, ///< [out] macro tile width + UINT_32* pMacroHeight, ///< [out] macro tile height + UINT_32 bpp, ///< [in] bits per pixel + ADDR_TILEINFO* pTileInfo ///< [in] tile info + ) const +{ + ADDR_ASSERT(pTileInfo != NULL); + UINT_32 macroWidth; + UINT_32 macroHeight; + + /// In linear mode, the htile or cmask buffer must be padded out to 4 tiles + /// but for P8_32x64_32x32, it must be padded out to 8 tiles + /// Actually there are more pipe configs which need 8-tile padding but SI family + /// has a bug which is fixed in CI family + if ((pTileInfo->pipeConfig == ADDR_PIPECFG_P8_32x64_32x32) || + (pTileInfo->pipeConfig == ADDR_PIPECFG_P16_32x32_8x16) || + (pTileInfo->pipeConfig == ADDR_PIPECFG_P8_32x32_16x16)) + { + macroWidth = 8*MicroTileWidth; + macroHeight = 8*MicroTileHeight; + } + else + { + macroWidth = 4*MicroTileWidth; + macroHeight = 4*MicroTileHeight; + } + + *pMacroWidth = macroWidth; + *pMacroHeight = macroHeight; +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlComputeHtileBytes +* +* @brief +* Compute htile size in bytes +* +* @return +* Htile size in bytes +*************************************************************************************************** +*/ +UINT_64 SIAddrLib::HwlComputeHtileBytes( + UINT_32 pitch, ///< [in] pitch + UINT_32 height, ///< [in] height + UINT_32 bpp, ///< [in] bits per pixel + BOOL_32 isLinear, ///< [in] if it is linear mode + UINT_32 numSlices, ///< [in] number of slices + UINT_64* pSliceBytes, ///< [out] bytes per slice + UINT_32 baseAlign ///< [in] base alignments + ) const +{ + return ComputeHtileBytes(pitch, height, bpp, isLinear, numSlices, pSliceBytes, baseAlign); +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlComputeXmaskAddrFromCoord +* +* @brief +* Compute address from coordinates for htile/cmask +* @return +* Byte address +*************************************************************************************************** +*/ +UINT_64 SIAddrLib::HwlComputeXmaskAddrFromCoord( + UINT_32 pitch, ///< [in] pitch + UINT_32 height, ///< [in] height + UINT_32 x, ///< [in] x coord + UINT_32 y, ///< [in] y coord + UINT_32 slice, ///< [in] slice/depth index + UINT_32 numSlices, ///< [in] number of slices + UINT_32 factor, ///< [in] factor that indicates cmask(2) or htile(1) + BOOL_32 isLinear, ///< [in] linear or tiled HTILE layout + BOOL_32 isWidth8, ///< [in] TRUE if width is 8, FALSE means 4. It's register value + BOOL_32 isHeight8, ///< [in] TRUE if width is 8, FALSE means 4. It's register value + ADDR_TILEINFO* pTileInfo, ///< [in] Tile info + UINT_32* pBitPosition ///< [out] bit position inside a byte + ) const +{ + UINT_32 tx = x / MicroTileWidth; + UINT_32 ty = y / MicroTileHeight; + UINT_32 newPitch; + UINT_32 newHeight; + UINT_64 totalBytes; + UINT_32 macroWidth; + UINT_32 macroHeight; + UINT_64 pSliceBytes; + UINT_32 pBaseAlign; + UINT_32 tileNumPerPipe; + UINT_32 elemBits; + + if (factor == 2) //CMASK + { + ADDR_CMASK_FLAGS flags = {{0}}; + + tileNumPerPipe = 256; + + ComputeCmaskInfo(flags, + pitch, + height, + numSlices, + isLinear, + pTileInfo, + &newPitch, + &newHeight, + &totalBytes, + ¯oWidth, + ¯oHeight); + elemBits = CmaskElemBits; + } + else //HTile + { + ADDR_HTILE_FLAGS flags = {{0}}; + + tileNumPerPipe = 512; + + ComputeHtileInfo(flags, + pitch, + height, + numSlices, + isLinear, + TRUE, + TRUE, + pTileInfo, + &newPitch, + &newHeight, + &totalBytes, + ¯oWidth, + ¯oHeight, + &pSliceBytes, + &pBaseAlign); + elemBits = 32; + } + + const UINT_32 pitchInTile = newPitch / MicroTileWidth; + const UINT_32 heightInTile = newHeight / MicroTileWidth; + UINT_64 macroOffset; // Per pipe starting offset of the macro tile in which this tile lies. + UINT_64 microNumber; // Per pipe starting offset of the macro tile in which this tile lies. + UINT_32 microX; + UINT_32 microY; + UINT_64 microOffset; + UINT_32 microShift; + UINT_64 totalOffset; + UINT_32 elemIdxBits; + UINT_32 elemIdx = + TileCoordToMaskElementIndex(tx, ty, pTileInfo->pipeConfig, µShift, &elemIdxBits); + + UINT_32 numPipes = HwlGetPipes(pTileInfo); + + if (isLinear) + { //linear addressing + // Linear addressing is extremelly wasting memory if slice > 1, since each pipe has the full + // slice memory foot print instead of divided by numPipes. + microX = tx / 4; // Macro Tile is 4x4 + microY = ty / 4 ; + microNumber = static_cast(microX + microY * (pitchInTile / 4)) << microShift; + + UINT_32 sliceBits = pitchInTile * heightInTile; + + // do htile single slice alignment if the flag is true + if (m_configFlags.useHtileSliceAlign && (factor == 1)) //Htile + { + sliceBits = PowTwoAlign(sliceBits, BITS_TO_BYTES(HtileCacheBits) * numPipes / elemBits); + } + macroOffset = slice * (sliceBits / numPipes) * elemBits ; + } + else + { //tiled addressing + const UINT_32 macroWidthInTile = macroWidth / MicroTileWidth; // Now in unit of Tiles + const UINT_32 macroHeightInTile = macroHeight / MicroTileHeight; + const UINT_32 pitchInCL = pitchInTile / macroWidthInTile; + const UINT_32 heightInCL = heightInTile / macroHeightInTile; + + const UINT_32 macroX = x / macroWidth; + const UINT_32 macroY = y / macroHeight; + const UINT_32 macroNumber = macroX + macroY * pitchInCL + slice * pitchInCL * heightInCL; + + // Per pipe starting offset of the cache line in which this tile lies. + microX = (x % macroWidth) / MicroTileWidth / 4; // Macro Tile is 4x4 + microY = (y % macroHeight) / MicroTileHeight / 4 ; + microNumber = static_cast(microX + microY * (macroWidth / MicroTileWidth / 4)) << microShift; + + macroOffset = macroNumber * tileNumPerPipe * elemBits; + } + + if(elemIdxBits == microShift) + { + microNumber += elemIdx; + } + else + { + microNumber >>= elemIdxBits; + microNumber <<= elemIdxBits; + microNumber += elemIdx; + } + + microOffset = elemBits * microNumber; + totalOffset = microOffset + macroOffset; + + UINT_32 pipe = ComputePipeFromCoord(x, y, 0, ADDR_TM_2D_TILED_THIN1, 0, FALSE, pTileInfo); + UINT_64 addrInBits = totalOffset % (m_pipeInterleaveBytes * 8) + + pipe * (m_pipeInterleaveBytes * 8) + + totalOffset / (m_pipeInterleaveBytes * 8) * (m_pipeInterleaveBytes * 8) * numPipes; + *pBitPosition = static_cast(addrInBits) % 8; + UINT_64 addr = addrInBits / 8; + + return addr; +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlComputeXmaskCoordFromAddr +* +* @brief +* Compute the coord from an address of a cmask/htile +* +* @return +* N/A +* +* @note +* This method is reused by htile, so rename to Xmask +*************************************************************************************************** +*/ +VOID SIAddrLib::HwlComputeXmaskCoordFromAddr( + UINT_64 addr, ///< [in] address + UINT_32 bitPosition, ///< [in] bitPosition in a byte + UINT_32 pitch, ///< [in] pitch + UINT_32 height, ///< [in] height + UINT_32 numSlices, ///< [in] number of slices + UINT_32 factor, ///< [in] factor that indicates cmask or htile + BOOL_32 isLinear, ///< [in] linear or tiled HTILE layout + BOOL_32 isWidth8, ///< [in] Not used by SI + BOOL_32 isHeight8, ///< [in] Not used by SI + ADDR_TILEINFO* pTileInfo, ///< [in] Tile info + UINT_32* pX, ///< [out] x coord + UINT_32* pY, ///< [out] y coord + UINT_32* pSlice ///< [out] slice index + ) const +{ + UINT_32 newPitch; + UINT_32 newHeight; + UINT_64 totalBytes; + UINT_32 clWidth; + UINT_32 clHeight; + UINT_32 tileNumPerPipe; + UINT_64 sliceBytes; + + *pX = 0; + *pY = 0; + *pSlice = 0; + + if (factor == 2) //CMASK + { + ADDR_CMASK_FLAGS flags = {{0}}; + + tileNumPerPipe = 256; + + ComputeCmaskInfo(flags, + pitch, + height, + numSlices, + isLinear, + pTileInfo, + &newPitch, + &newHeight, + &totalBytes, + &clWidth, + &clHeight); + } + else //HTile + { + ADDR_HTILE_FLAGS flags = {{0}}; + + tileNumPerPipe = 512; + + ComputeHtileInfo(flags, + pitch, + height, + numSlices, + isLinear, + TRUE, + TRUE, + pTileInfo, + &newPitch, + &newHeight, + &totalBytes, + &clWidth, + &clHeight, + &sliceBytes); + } + + const UINT_32 pitchInTile = newPitch / MicroTileWidth; + const UINT_32 heightInTile = newHeight / MicroTileWidth; + const UINT_32 pitchInMacroTile = pitchInTile / 4; + UINT_32 macroShift; + UINT_32 elemIdxBits; + // get macroShift and elemIdxBits + TileCoordToMaskElementIndex(0, 0, pTileInfo->pipeConfig, ¯oShift, &elemIdxBits); + + const UINT_32 numPipes = HwlGetPipes(pTileInfo); + const UINT_32 pipe = (UINT_32)((addr / m_pipeInterleaveBytes) % numPipes); + // per pipe + UINT_64 localOffset = (addr % m_pipeInterleaveBytes) + + (addr / m_pipeInterleaveBytes / numPipes)* m_pipeInterleaveBytes; + + UINT_32 tileIndex; + if (factor == 2) //CMASK + { + tileIndex = (UINT_32)(localOffset * 2 + (bitPosition != 0)); + } + else + { + tileIndex = (UINT_32)(localOffset / 4); + } + + UINT_32 macroOffset; + if (isLinear) + { + UINT_32 sliceSizeInTile = pitchInTile * heightInTile; + + // do htile single slice alignment if the flag is true + if (m_configFlags.useHtileSliceAlign && (factor == 1)) //Htile + { + sliceSizeInTile = PowTwoAlign(sliceSizeInTile, static_cast(sliceBytes) / 64); + } + *pSlice = tileIndex / (sliceSizeInTile / numPipes); + macroOffset = tileIndex % (sliceSizeInTile / numPipes); + } + else + { + const UINT_32 clWidthInTile = clWidth / MicroTileWidth; // Now in unit of Tiles + const UINT_32 clHeightInTile = clHeight / MicroTileHeight; + const UINT_32 pitchInCL = pitchInTile / clWidthInTile; + const UINT_32 heightInCL = heightInTile / clHeightInTile; + const UINT_32 clIndex = tileIndex / tileNumPerPipe; + + UINT_32 clX = clIndex % pitchInCL; + UINT_32 clY = (clIndex % (heightInCL * pitchInCL)) / pitchInCL; + + *pX = clX * clWidthInTile * MicroTileWidth; + *pY = clY * clHeightInTile * MicroTileHeight; + *pSlice = clIndex / (heightInCL * pitchInCL); + + macroOffset = tileIndex % tileNumPerPipe; + } + + UINT_32 elemIdx = macroOffset & 7; + macroOffset >>= elemIdxBits; + + if (elemIdxBits != macroShift) + { + macroOffset <<= (elemIdxBits - macroShift); + + UINT_32 pipebit1 = _BIT(pipe,1); + UINT_32 pipebit2 = _BIT(pipe,2); + UINT_32 pipebit3 = _BIT(pipe,3); + if (pitchInMacroTile % 2) + { //odd + switch (pTileInfo->pipeConfig) + { + case ADDR_PIPECFG_P4_32x32: + macroOffset |= pipebit1; + break; + case ADDR_PIPECFG_P8_32x32_8x16: + case ADDR_PIPECFG_P8_32x32_16x16: + case ADDR_PIPECFG_P8_32x32_16x32: + macroOffset |= pipebit2; + break; + default: + break; + } + + } + + if (pitchInMacroTile % 4) + { + if (pTileInfo->pipeConfig == ADDR_PIPECFG_P8_32x64_32x32) + { + macroOffset |= (pipebit1<<1); + } + if((pTileInfo->pipeConfig == ADDR_PIPECFG_P16_32x32_8x16) || + (pTileInfo->pipeConfig == ADDR_PIPECFG_P16_32x32_16x16)) + { + macroOffset |= (pipebit3<<1); + } + } + } + + UINT_32 macroX; + UINT_32 macroY; + + if (isLinear) + { + macroX = macroOffset % pitchInMacroTile; + macroY = macroOffset / pitchInMacroTile; + } + else + { + const UINT_32 clWidthInMacroTile = clWidth / (MicroTileWidth * 4); + macroX = macroOffset % clWidthInMacroTile; + macroY = macroOffset / clWidthInMacroTile; + } + + *pX += macroX * 4 * MicroTileWidth; + *pY += macroY * 4 * MicroTileHeight; + + UINT_32 microX; + UINT_32 microY; + ComputeTileCoordFromPipeAndElemIdx(elemIdx, pipe, pTileInfo->pipeConfig, pitchInMacroTile, + *pX, *pY, µX, µY); + + *pX += microX * MicroTileWidth; + *pY += microY * MicroTileWidth; +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlGetPitchAlignmentLinear +* @brief +* Get pitch alignment +* @return +* pitch alignment +*************************************************************************************************** +*/ +UINT_32 SIAddrLib::HwlGetPitchAlignmentLinear( + UINT_32 bpp, ///< [in] bits per pixel + ADDR_SURFACE_FLAGS flags ///< [in] surface flags + ) const +{ + UINT_32 pitchAlign; + + // Interleaved access requires a 256B aligned pitch, so fall back to pre-SI alignment + if (flags.interleaved) + { + pitchAlign = Max(64u, m_pipeInterleaveBytes / BITS_TO_BYTES(bpp)); + + } + else + { + pitchAlign = Max(8u, 64 / BITS_TO_BYTES(bpp)); + } + + return pitchAlign; +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlGetSizeAdjustmentLinear +* +* @brief +* Adjust linear surface pitch and slice size +* +* @return +* Logical slice size in bytes +*************************************************************************************************** +*/ +UINT_64 SIAddrLib::HwlGetSizeAdjustmentLinear( + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 bpp, ///< [in] bits per pixel + UINT_32 numSamples, ///< [in] number of samples + UINT_32 baseAlign, ///< [in] base alignment + UINT_32 pitchAlign, ///< [in] pitch alignment + UINT_32* pPitch, ///< [in/out] pointer to pitch + UINT_32* pHeight, ///< [in/out] pointer to height + UINT_32* pHeightAlign ///< [in/out] pointer to height align + ) const +{ + UINT_64 sliceSize; + if (tileMode == ADDR_TM_LINEAR_GENERAL) + { + sliceSize = BITS_TO_BYTES(static_cast(*pPitch) * (*pHeight) * bpp * numSamples); + } + else + { + UINT_32 pitch = *pPitch; + UINT_32 height = *pHeight; + + UINT_32 pixelsPerPipeInterleave = m_pipeInterleaveBytes / BITS_TO_BYTES(bpp); + UINT_32 sliceAlignInPixel = pixelsPerPipeInterleave < 64 ? 64 : pixelsPerPipeInterleave; + + // numSamples should be 1 in real cases (no MSAA for linear but TGL may pass non 1 value) + UINT_64 pixelPerSlice = static_cast(pitch) * height * numSamples; + + while (pixelPerSlice % sliceAlignInPixel) + { + pitch += pitchAlign; + pixelPerSlice = static_cast(pitch) * height * numSamples; + } + + *pPitch = pitch; + + UINT_32 heightAlign = 1; + + while ((pitch * heightAlign) % sliceAlignInPixel) + { + heightAlign++; + } + + *pHeightAlign = heightAlign; + + sliceSize = BITS_TO_BYTES(pixelPerSlice * bpp); + } + + return sliceSize; +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlPreHandleBaseLvl3xPitch +* +* @brief +* Pre-handler of 3x pitch (96 bit) adjustment +* +* @return +* Expected pitch +*************************************************************************************************** +*/ +UINT_32 SIAddrLib::HwlPreHandleBaseLvl3xPitch( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input + UINT_32 expPitch ///< [in] pitch + ) const +{ + ADDR_ASSERT(pIn->width == expPitch); + + // From SI, if pow2Pad is 1 the pitch is expanded 3x first, then padded to pow2, so nothing to + // do here + if (!pIn->flags.pow2Pad) + { + AddrLib::HwlPreHandleBaseLvl3xPitch(pIn, expPitch); + } + else + { + ADDR_ASSERT(IsPow2(expPitch)); + } + + return expPitch; +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlPostHandleBaseLvl3xPitch +* +* @brief +* Post-handler of 3x pitch adjustment +* +* @return +* Expected pitch +*************************************************************************************************** +*/ +UINT_32 SIAddrLib::HwlPostHandleBaseLvl3xPitch( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input + UINT_32 expPitch ///< [in] pitch + ) const +{ + /** + * @note The pitch will be divided by 3 in the end so the value will look odd but h/w should + * be able to compute a correct pitch from it as h/w address library is doing the job. + */ + // From SI, the pitch is expanded 3x first, then padded to pow2, so no special handler here + if (!pIn->flags.pow2Pad) + { + AddrLib::HwlPostHandleBaseLvl3xPitch(pIn, expPitch); + } + + return expPitch; +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlGetPitchAlignmentMicroTiled +* +* @brief +* Compute 1D tiled surface pitch alignment +* +* @return +* pitch alignment +*************************************************************************************************** +*/ +UINT_32 SIAddrLib::HwlGetPitchAlignmentMicroTiled( + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 bpp, ///< [in] bits per pixel + ADDR_SURFACE_FLAGS flags, ///< [in] surface flags + UINT_32 numSamples ///< [in] number of samples + ) const +{ + UINT_32 pitchAlign; + + if (flags.qbStereo) + { + pitchAlign = EgBasedAddrLib::HwlGetPitchAlignmentMicroTiled(tileMode,bpp,flags,numSamples); + } + else + { + pitchAlign = 8; + } + + return pitchAlign; +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlGetSizeAdjustmentMicroTiled +* +* @brief +* Adjust 1D tiled surface pitch and slice size +* +* @return +* Logical slice size in bytes +*************************************************************************************************** +*/ +UINT_64 SIAddrLib::HwlGetSizeAdjustmentMicroTiled( + UINT_32 thickness, ///< [in] thickness + UINT_32 bpp, ///< [in] bits per pixel + ADDR_SURFACE_FLAGS flags, ///< [in] surface flags + UINT_32 numSamples, ///< [in] number of samples + UINT_32 baseAlign, ///< [in] base alignment + UINT_32 pitchAlign, ///< [in] pitch alignment + UINT_32* pPitch, ///< [in/out] pointer to pitch + UINT_32* pHeight ///< [in/out] pointer to height + ) const +{ + UINT_64 logicalSliceSize; + UINT_64 physicalSliceSize; + + UINT_32 pitch = *pPitch; + UINT_32 height = *pHeight; + + // Logical slice: pitch * height * bpp * numSamples (no 1D MSAA so actually numSamples == 1) + logicalSliceSize = BITS_TO_BYTES(static_cast(pitch) * height * bpp * numSamples); + + // Physical slice: multiplied by thickness + physicalSliceSize = logicalSliceSize * thickness; + + // Pitch alignment is always 8, so if slice size is not padded to base alignment + // (pipe_interleave_size), we need to increase pitch + while ((physicalSliceSize % baseAlign) != 0) + { + pitch += pitchAlign; + + logicalSliceSize = BITS_TO_BYTES(static_cast(pitch) * height * bpp * numSamples); + + physicalSliceSize = logicalSliceSize * thickness; + } + +#if !ALT_TEST + // + // Special workaround for depth/stencil buffer, use 8 bpp to align depth buffer again since + // the stencil plane may have larger pitch if the slice size is smaller than base alignment. + // + // Note: this actually does not work for mipmap but mipmap depth texture is not really + // sampled with mipmap. + // + if (flags.depth && !flags.noStencil) + { + ADDR_ASSERT(numSamples == 1); + + UINT_64 logicalSiceSizeStencil = static_cast(pitch) * height; // 1 byte stencil + + while ((logicalSiceSizeStencil % baseAlign) != 0) + { + pitch += pitchAlign; // Stencil plane's pitch alignment is the same as depth plane's + + logicalSiceSizeStencil = static_cast(pitch) * height; + } + + if (pitch != *pPitch) + { + // If this is a mipmap, this padded one cannot be sampled as a whole mipmap! + logicalSliceSize = logicalSiceSizeStencil * BITS_TO_BYTES(bpp); + } + } +#endif + *pPitch = pitch; + + // No adjust for pHeight + + return logicalSliceSize; +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlConvertChipFamily +* +* @brief +* Convert familyID defined in atiid.h to AddrChipFamily and set m_chipFamily/m_chipRevision +* @return +* AddrChipFamily +*************************************************************************************************** +*/ +AddrChipFamily SIAddrLib::HwlConvertChipFamily( + UINT_32 uChipFamily, ///< [in] chip family defined in atiih.h + UINT_32 uChipRevision) ///< [in] chip revision defined in "asic_family"_id.h +{ + AddrChipFamily family = ADDR_CHIP_FAMILY_SI; + + switch (uChipFamily) + { + case FAMILY_SI: + m_settings.isSouthernIsland = 1; + m_settings.isTahiti = ASICREV_IS_TAHITI_P(uChipRevision); + m_settings.isPitCairn = ASICREV_IS_PITCAIRN_PM(uChipRevision); + m_settings.isCapeVerde = ASICREV_IS_CAPEVERDE_M(uChipRevision); + m_settings.isOland = ASICREV_IS_OLAND_M(uChipRevision); + m_settings.isHainan = ASICREV_IS_HAINAN_V(uChipRevision); + break; + default: + ADDR_ASSERT(!"This should be a Fusion"); + break; + } + + return family; +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlSetupTileInfo +* +* @brief +* Setup default value of tile info for SI +*************************************************************************************************** +*/ +VOID SIAddrLib::HwlSetupTileInfo( + AddrTileMode tileMode, ///< [in] Tile mode + ADDR_SURFACE_FLAGS flags, ///< [in] Surface type flags + UINT_32 bpp, ///< [in] Bits per pixel + UINT_32 pitch, ///< [in] Pitch in pixels + UINT_32 height, ///< [in] Height in pixels + UINT_32 numSamples, ///< [in] Number of samples + ADDR_TILEINFO* pTileInfoIn, ///< [in] Tile info input: NULL for default + ADDR_TILEINFO* pTileInfoOut, ///< [out] Tile info output + AddrTileType inTileType, ///< [in] Tile type + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] Output + ) const +{ + UINT_32 thickness = ComputeSurfaceThickness(tileMode); + ADDR_TILEINFO* pTileInfo = pTileInfoOut; + INT index = TileIndexInvalid; + + // Fail-safe code + if (!IsLinear(tileMode)) + { + // 128 bpp/thick tiling must be non-displayable. + // Fmask reuse color buffer's entry but bank-height field can be from another entry + // To simplify the logic, fmask entry should be picked from non-displayable ones + if (bpp == 128 || thickness > 1 || flags.fmask || flags.prt) + { + inTileType = ADDR_NON_DISPLAYABLE; + } + + if (flags.depth || flags.stencil) + { + inTileType = ADDR_DEPTH_SAMPLE_ORDER; + } + } + + // Partial valid fields are not allowed for SI. + if (IsTileInfoAllZero(pTileInfo)) + { + if (IsMacroTiled(tileMode)) + { + if (flags.prt) + { + if (numSamples == 1) + { + if (flags.depth) + { + switch (bpp) + { + case 16: + index = 3; + break; + case 32: + index = 6; + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + } + else + { + switch (bpp) + { + case 8: + index = 21; + break; + case 16: + index = 22; + break; + case 32: + index = 23; + break; + case 64: + index = 24; + break; + case 128: + index = 25; + break; + default: + break; + } + + if (thickness > 1) + { + ADDR_ASSERT(bpp != 128); + index += 5; + } + } + } + else + { + ADDR_ASSERT(numSamples == 4); + + if (flags.depth) + { + switch (bpp) + { + case 16: + index = 5; + break; + case 32: + index = 7; + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + } + else + { + switch (bpp) + { + case 8: + index = 23; + break; + case 16: + index = 24; + break; + case 32: + index = 25; + break; + case 64: + index = 30; + break; + default: + ADDR_ASSERT_ALWAYS(); + break; + } + } + } + }//end of PRT part + // See table entries 0-7 + else if (flags.depth || flags.stencil) + { + if (flags.compressZ) + { + if (flags.stencil) + { + index = 0; + } + else + { + // optimal tile index for compressed depth/stencil. + switch (numSamples) + { + case 1: + index = 0; + break; + case 2: + case 4: + index = 1; + break; + case 8: + index = 2; + break; + default: + break; + } + } + } + else // unCompressZ + { + index = 3; + } + } + else //non PRT & non Depth & non Stencil + { + // See table entries 9-12 + if (inTileType == ADDR_DISPLAYABLE) + { + switch (bpp) + { + case 8: + index = 10; + break; + case 16: + index = 11; + break; + case 32: + index = 12; + break; + case 64: + index = 12; + break; + default: + break; + } + } + else + { + // See table entries 13-17 + if (thickness == 1) + { + if (flags.fmask) + { + UINT_32 fmaskPixelSize = bpp * numSamples; + + switch (fmaskPixelSize) + { + case 8: + index = 14; + break; + case 16: + index = 15; + break; + case 32: + index = 16; + break; + case 64: + index = 17; + break; + default: + ADDR_ASSERT_ALWAYS(); + } + } + else + { + switch (bpp) + { + case 8: + index = 14; + break; + case 16: + index = 15; + break; + case 32: + index = 16; + break; + case 64: + index = 17; + break; + case 128: + index = 17; + break; + default: + break; + } + } + } + else // thick tiling - entries 18-20 + { + switch (thickness) + { + case 4: + index = 20; + break; + case 8: + index = 19; + break; + default: + break; + } + } + } + } + } + else + { + if (tileMode == ADDR_TM_LINEAR_ALIGNED) + { + index = 8; + } + else if (tileMode == ADDR_TM_LINEAR_GENERAL) + { + index = TileIndexLinearGeneral; + } + else + { + if (flags.depth || flags.stencil) + { + index = 4; + } + else if (inTileType == ADDR_DISPLAYABLE) + { + index = 9; + } + else if (thickness == 1) + { + index = 13; + } + else + { + index = 18; + } + } + } + + if (index >= 0 && index <= 31) + { + *pTileInfo = m_tileTable[index].info; + pOut->tileType = m_tileTable[index].type; + } + + if (index == TileIndexLinearGeneral) + { + *pTileInfo = m_tileTable[8].info; + pOut->tileType = m_tileTable[8].type; + } + } + else + { + if (pTileInfoIn) + { + if (flags.stencil && pTileInfoIn->tileSplitBytes == 0) + { + // Stencil always uses index 0 + *pTileInfo = m_tileTable[0].info; + } + } + // Pass through tile type + pOut->tileType = inTileType; + } + + pOut->tileIndex = index; +} + +/** +*************************************************************************************************** +* SIAddrLib::DecodeGbRegs +* +* @brief +* Decodes GB_ADDR_CONFIG and noOfBanks/noOfRanks +* +* @return +* TRUE if all settings are valid +* +*************************************************************************************************** +*/ +BOOL_32 SIAddrLib::DecodeGbRegs( + const ADDR_REGISTER_VALUE* pRegValue) ///< [in] create input +{ + GB_ADDR_CONFIG reg; + BOOL_32 valid = TRUE; + + reg.val = pRegValue->gbAddrConfig; + + switch (reg.f.pipe_interleave_size) + { + case ADDR_CONFIG_PIPE_INTERLEAVE_256B: + m_pipeInterleaveBytes = ADDR_PIPEINTERLEAVE_256B; + break; + case ADDR_CONFIG_PIPE_INTERLEAVE_512B: + m_pipeInterleaveBytes = ADDR_PIPEINTERLEAVE_512B; + break; + default: + valid = FALSE; + ADDR_UNHANDLED_CASE(); + break; + } + + switch (reg.f.row_size) + { + case ADDR_CONFIG_1KB_ROW: + m_rowSize = ADDR_ROWSIZE_1KB; + break; + case ADDR_CONFIG_2KB_ROW: + m_rowSize = ADDR_ROWSIZE_2KB; + break; + case ADDR_CONFIG_4KB_ROW: + m_rowSize = ADDR_ROWSIZE_4KB; + break; + default: + valid = FALSE; + ADDR_UNHANDLED_CASE(); + break; + } + + switch (pRegValue->noOfBanks) + { + case 0: + m_banks = 4; + break; + case 1: + m_banks = 8; + break; + case 2: + m_banks = 16; + break; + default: + valid = FALSE; + ADDR_UNHANDLED_CASE(); + break; + } + + switch (pRegValue->noOfRanks) + { + case 0: + m_ranks = 1; + break; + case 1: + m_ranks = 2; + break; + default: + valid = FALSE; + ADDR_UNHANDLED_CASE(); + break; + } + + m_logicalBanks = m_banks * m_ranks; + + ADDR_ASSERT(m_logicalBanks <= 16); + + return valid; +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlInitGlobalParams +* +* @brief +* Initializes global parameters +* +* @return +* TRUE if all settings are valid +* +*************************************************************************************************** +*/ +BOOL_32 SIAddrLib::HwlInitGlobalParams( + const ADDR_CREATE_INPUT* pCreateIn) ///< [in] create input +{ + BOOL_32 valid = TRUE; + const ADDR_REGISTER_VALUE* pRegValue = &pCreateIn->regValue; + + valid = DecodeGbRegs(pRegValue); + + if (valid) + { + if (m_settings.isTahiti || m_settings.isPitCairn) + { + m_pipes = 8; + } + else if (m_settings.isCapeVerde || m_settings.isOland) + { + m_pipes = 4; + } + else + { + // Hainan is 2-pipe (m_settings.isHainan == 1) + m_pipes = 2; + } + + valid = InitTileSettingTable(pRegValue->pTileConfig, pRegValue->noOfEntries); + + m_maxSamples = 16; + } + + return valid; +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlConvertTileInfoToHW +* @brief +* Entry of si's ConvertTileInfoToHW +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE SIAddrLib::HwlConvertTileInfoToHW( + const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, ///< [in] input structure + ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE retCode = ADDR_OK; + + retCode = EgBasedAddrLib::HwlConvertTileInfoToHW(pIn, pOut); + + if (retCode == ADDR_OK) + { + if (pIn->reverse == FALSE) + { + if (pIn->pTileInfo->pipeConfig == ADDR_PIPECFG_INVALID) + { + retCode = ADDR_INVALIDPARAMS; + } + else + { + pOut->pTileInfo->pipeConfig = + static_cast(pIn->pTileInfo->pipeConfig - 1); + } + } + else + { + pOut->pTileInfo->pipeConfig = + static_cast(pIn->pTileInfo->pipeConfig + 1); + } + } + + return retCode; +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlComputeXmaskCoordYFrom8Pipe +* +* @brief +* Compute the Y coord which will be added to Xmask Y +* coord. +* @return +* Y coord +*************************************************************************************************** +*/ +UINT_32 SIAddrLib::HwlComputeXmaskCoordYFrom8Pipe( + UINT_32 pipe, ///< [in] pipe id + UINT_32 x ///< [in] tile coord x, which is original x coord / 8 + ) const +{ + // This function should never be called since it is 6xx/8xx specfic. + // Keep this empty implementation to avoid any mis-use. + ADDR_ASSERT_ALWAYS(); + + return 0; +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlComputeSurfaceCoord2DFromBankPipe +* +* @brief +* Compute surface x,y coordinates from bank/pipe info +* @return +* N/A +*************************************************************************************************** +*/ +VOID SIAddrLib::HwlComputeSurfaceCoord2DFromBankPipe( + AddrTileMode tileMode, ///< [in] tile mode + UINT_32* pX, ///< [in/out] x coordinate + UINT_32* pY, ///< [in/out] y coordinate + UINT_32 slice, ///< [in] slice index + UINT_32 bank, ///< [in] bank number + UINT_32 pipe, ///< [in] pipe number + UINT_32 bankSwizzle,///< [in] bank swizzle + UINT_32 pipeSwizzle,///< [in] pipe swizzle + UINT_32 tileSlices, ///< [in] slices in a micro tile + BOOL_32 ignoreSE, ///< [in] TRUE if shader engines are ignored + ADDR_TILEINFO* pTileInfo ///< [in] bank structure. **All fields to be valid on entry** + ) const +{ + UINT_32 xBit; + UINT_32 yBit; + UINT_32 yBit3 = 0; + UINT_32 yBit4 = 0; + UINT_32 yBit5 = 0; + UINT_32 yBit6 = 0; + + UINT_32 xBit3 = 0; + UINT_32 xBit4 = 0; + UINT_32 xBit5 = 0; + + UINT_32 numPipes = GetPipePerSurf(pTileInfo->pipeConfig); + + CoordFromBankPipe xyBits = {0}; + ComputeSurfaceCoord2DFromBankPipe(tileMode, *pX, *pY, slice, bank, pipe, + bankSwizzle, pipeSwizzle, tileSlices, pTileInfo, + &xyBits); + yBit3 = xyBits.yBit3; + yBit4 = xyBits.yBit4; + yBit5 = xyBits.yBit5; + yBit6 = xyBits.yBit6; + + xBit3 = xyBits.xBit3; + xBit4 = xyBits.xBit4; + xBit5 = xyBits.xBit5; + + yBit = xyBits.yBits; + + UINT_32 yBitTemp = 0; + + if ((pTileInfo->pipeConfig == ADDR_PIPECFG_P4_32x32) || + (pTileInfo->pipeConfig == ADDR_PIPECFG_P8_32x64_32x32)) + { + ADDR_ASSERT(pTileInfo->bankWidth == 1 && pTileInfo->macroAspectRatio > 1); + UINT_32 yBitToCheck = QLog2(pTileInfo->banks) - 1; + + ADDR_ASSERT(yBitToCheck <= 3); + + yBitTemp = _BIT(yBit, yBitToCheck); + + xBit3 = 0; + } + + yBit = Bits2Number(4, yBit6, yBit5, yBit4, yBit3); + xBit = Bits2Number(3, xBit5, xBit4, xBit3); + + *pY += yBit * pTileInfo->bankHeight * MicroTileHeight; + *pX += xBit * numPipes * pTileInfo->bankWidth * MicroTileWidth; + + //calculate the bank and pipe bits in x, y + UINT_32 xTile; //x in micro tile + UINT_32 x3 = 0; + UINT_32 x4 = 0; + UINT_32 x5 = 0; + UINT_32 x6 = 0; + UINT_32 y = *pY; + + UINT_32 pipeBit0 = _BIT(pipe,0); + UINT_32 pipeBit1 = _BIT(pipe,1); + UINT_32 pipeBit2 = _BIT(pipe,2); + + UINT_32 y3 = _BIT(y, 3); + UINT_32 y4 = _BIT(y, 4); + UINT_32 y5 = _BIT(y, 5); + UINT_32 y6 = _BIT(y, 6); + + // bankbit0 after ^x4^x5 + UINT_32 bankBit00 = _BIT(bank,0); + UINT_32 bankBit0 = 0; + + switch (pTileInfo->pipeConfig) + { + case ADDR_PIPECFG_P2: + x3 = pipeBit0 ^ y3; + break; + case ADDR_PIPECFG_P4_8x16: + x4 = pipeBit0 ^ y3; + x3 = pipeBit0 ^ y4; + break; + case ADDR_PIPECFG_P4_16x16: + x4 = pipeBit1 ^ y4; + x3 = pipeBit0 ^ y3 ^ x4; + break; + case ADDR_PIPECFG_P4_16x32: + x4 = pipeBit1 ^ y4; + x3 = pipeBit0 ^ y3 ^ x4; + break; + case ADDR_PIPECFG_P4_32x32: + x5 = pipeBit1 ^ y5; + x3 = pipeBit0 ^ y3 ^ x5; + bankBit0 = yBitTemp ^ x5; + x4 = bankBit00 ^ x5 ^ bankBit0; + *pX += x5 * 4 * 1 * 8; // x5 * num_pipes * bank_width * 8; + break; + case ADDR_PIPECFG_P8_16x16_8x16: + x3 = pipeBit1 ^ y5; + x4 = pipeBit2 ^ y4; + x5 = pipeBit0 ^ y3 ^ x4; + break; + case ADDR_PIPECFG_P8_16x32_8x16: + x3 = pipeBit1 ^ y4; + x4 = pipeBit2 ^ y5; + x5 = pipeBit0 ^ y3 ^ x4; + break; + case ADDR_PIPECFG_P8_32x32_8x16: + x3 = pipeBit1 ^ y4; + x5 = pipeBit2 ^ y5; + x4 = pipeBit0 ^ y3 ^ x5; + break; + case ADDR_PIPECFG_P8_16x32_16x16: + x4 = pipeBit2 ^ y5; + x5 = pipeBit1 ^ y4; + x3 = pipeBit0 ^ y3 ^ x4; + break; + case ADDR_PIPECFG_P8_32x32_16x16: + x5 = pipeBit2 ^ y5; + x4 = pipeBit1 ^ y4; + x3 = pipeBit0 ^ y3 ^ x4; + break; + case ADDR_PIPECFG_P8_32x32_16x32: + x5 = pipeBit2 ^ y5; + x4 = pipeBit1 ^ y6; + x3 = pipeBit0 ^ y3 ^ x4; + break; + case ADDR_PIPECFG_P8_32x64_32x32: + x6 = pipeBit1 ^ y5; + x5 = pipeBit2 ^ y6; + x3 = pipeBit0 ^ y3 ^ x5; + bankBit0 = yBitTemp ^ x6; + x4 = bankBit00 ^ x5 ^ bankBit0; + *pX += x6 * 8 * 1 * 8; // x6 * num_pipes * bank_width * 8; + break; + default: + ADDR_ASSERT_ALWAYS(); + } + + xTile = Bits2Number(3, x5, x4, x3); + + *pX += xTile << 3; +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlPreAdjustBank +* +* @brief +* Adjust bank before calculating address acoording to bank/pipe +* @return +* Adjusted bank +*************************************************************************************************** +*/ +UINT_32 SIAddrLib::HwlPreAdjustBank( + UINT_32 tileX, ///< [in] x coordinate in unit of tile + UINT_32 bank, ///< [in] bank + ADDR_TILEINFO* pTileInfo ///< [in] tile info + ) const +{ + if (((pTileInfo->pipeConfig == ADDR_PIPECFG_P4_32x32) || + (pTileInfo->pipeConfig == ADDR_PIPECFG_P8_32x64_32x32)) && (pTileInfo->bankWidth == 1)) + { + UINT_32 bankBit0 = _BIT(bank, 0); + UINT_32 x4 = _BIT(tileX, 1); + UINT_32 x5 = _BIT(tileX, 2); + + bankBit0 = bankBit0 ^ x4 ^ x5; + bank |= bankBit0; + + ADDR_ASSERT(pTileInfo->macroAspectRatio > 1) + } + + return bank; +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlComputeSurfaceInfo +* +* @brief +* Entry of si's ComputeSurfaceInfo +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE SIAddrLib::HwlComputeSurfaceInfo( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure + ) const +{ + pOut->tileIndex = pIn->tileIndex; + + return EgBasedAddrLib::HwlComputeSurfaceInfo(pIn,pOut); +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlComputeMipLevel +* @brief +* Compute MipLevel info (including level 0) +* @return +* TRUE if HWL's handled +*************************************************************************************************** +*/ +BOOL_32 SIAddrLib::HwlComputeMipLevel( + ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn ///< [in/out] Input structure + ) const +{ + // basePitch is calculated from level 0 so we only check this for mipLevel > 0 + if (pIn->mipLevel > 0) + { + // Note: Don't check expand 3x formats(96 bit) as the basePitch is not pow2 even if + // we explicity set pow2Pad flag. The 3x base pitch is padded to pow2 but after being + // divided by expandX factor (3) - to program texture pitch, the basePitch is never pow2. + if (!AddrElemLib::IsExpand3x(pIn->format)) + { + // Sublevel pitches are generated from base level pitch instead of width on SI + // If pow2Pad is 0, we don't assert - as this is not really used for a mip chain + ADDR_ASSERT(!pIn->flags.pow2Pad || ((pIn->basePitch != 0) && IsPow2(pIn->basePitch))); + } + + if (pIn->basePitch != 0) + { + pIn->width = Max(1u, pIn->basePitch >> pIn->mipLevel); + } + } + + // pow2Pad is done in PostComputeMipLevel + + return TRUE; +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlCheckLastMacroTiledLvl +* +* @brief +* Sets pOut->last2DLevel to TRUE if it is +* @note +* +*************************************************************************************************** +*/ +VOID SIAddrLib::HwlCheckLastMacroTiledLvl( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] Input structure + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [in/out] Output structure (used as input, too) + ) const +{ + // pow2Pad covers all mipmap cases + if (pIn->flags.pow2Pad) + { + ADDR_ASSERT(IsMacroTiled(pIn->tileMode)); + + UINT_32 nextPitch; + UINT_32 nextHeight; + UINT_32 nextSlices; + + AddrTileMode nextTileMode; + + if (pIn->mipLevel == 0 || pIn->basePitch == 0) + { + // Base level or fail-safe case (basePitch == 0) + nextPitch = pOut->pitch >> 1; + } + else + { + // Sub levels + nextPitch = pIn->basePitch >> (pIn->mipLevel + 1); + } + + // nextHeight must be shifted from this level's original height rather than a pow2 padded + // one but this requires original height stored somewhere (pOut->height) + ADDR_ASSERT(pOut->height != 0); + + // next level's height is just current level's >> 1 in pixels + nextHeight = pOut->height >> 1; + // Special format such as FMT_1 and FMT_32_32_32 can be linear only so we consider block + // compressed foramts + if (AddrElemLib::IsBlockCompressed(pIn->format)) + { + nextHeight = (nextHeight + 3) / 4; + } + nextHeight = NextPow2(nextHeight); + + // nextSlices may be 0 if this level's is 1 + if (pIn->flags.volume) + { + nextSlices = Max(1u, pIn->numSlices >> 1); + } + else + { + nextSlices = pIn->numSlices; + } + + nextTileMode = ComputeSurfaceMipLevelTileMode(pIn->tileMode, + pIn->bpp, + nextPitch, + nextHeight, + nextSlices, + pIn->numSamples, + pOut->pitchAlign, + pOut->heightAlign, + pOut->pTileInfo); + + pOut->last2DLevel = IsMicroTiled(nextTileMode); + } +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlDegradeThickTileMode +* +* @brief +* Degrades valid tile mode for thick modes if needed +* +* @return +* Suitable tile mode +*************************************************************************************************** +*/ +AddrTileMode SIAddrLib::HwlDegradeThickTileMode( + AddrTileMode baseTileMode, ///< [in] base tile mode + UINT_32 numSlices, ///< [in] current number of slices + UINT_32* pBytesPerTile ///< [in/out] pointer to bytes per slice + ) const +{ + return EgBasedAddrLib::HwlDegradeThickTileMode(baseTileMode, numSlices, pBytesPerTile); +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlTileInfoEqual +* +* @brief +* Return TRUE if all field are equal +* @note +* Only takes care of current HWL's data +*************************************************************************************************** +*/ +BOOL_32 SIAddrLib::HwlTileInfoEqual( + const ADDR_TILEINFO* pLeft, ///<[in] Left compare operand + const ADDR_TILEINFO* pRight ///<[in] Right compare operand + ) const +{ + BOOL_32 equal = FALSE; + + if (pLeft->pipeConfig == pRight->pipeConfig) + { + equal = EgBasedAddrLib::HwlTileInfoEqual(pLeft, pRight); + } + + return equal; +} + +/** +*************************************************************************************************** +* SIAddrLib::GetTileSettings +* +* @brief +* Get tile setting infos by index. +* @return +* Tile setting info. +*************************************************************************************************** +*/ +const ADDR_TILECONFIG* SIAddrLib::GetTileSetting( + UINT_32 index ///< [in] Tile index + ) const +{ + ADDR_ASSERT(index < m_noOfEntries); + return &m_tileTable[index]; +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlPostCheckTileIndex +* +* @brief +* Map a tile setting to index if curIndex is invalid, otherwise check if curIndex matches +* tile mode/type/info and change the index if needed +* @return +* Tile index. +*************************************************************************************************** +*/ +INT_32 SIAddrLib::HwlPostCheckTileIndex( + const ADDR_TILEINFO* pInfo, ///< [in] Tile Info + AddrTileMode mode, ///< [in] Tile mode + AddrTileType type, ///< [in] Tile type + INT curIndex ///< [in] Current index assigned in HwlSetupTileInfo + ) const +{ + INT_32 index = curIndex; + + if (mode == ADDR_TM_LINEAR_GENERAL) + { + index = TileIndexLinearGeneral; + } + else + { + BOOL_32 macroTiled = IsMacroTiled(mode); + + // We need to find a new index if either of them is true + // 1. curIndex is invalid + // 2. tile mode is changed + // 3. tile info does not match for macro tiled + if ((index == TileIndexInvalid || + (mode != m_tileTable[index].mode) || + (macroTiled && !HwlTileInfoEqual(pInfo, &m_tileTable[index].info)))) + { + for (index = 0; index < static_cast(m_noOfEntries); index++) + { + if (macroTiled) + { + // macro tile modes need all to match + if (HwlTileInfoEqual(pInfo, &m_tileTable[index].info) && + (mode == m_tileTable[index].mode) && + (type == m_tileTable[index].type)) + { + break; + } + } + else if (mode == ADDR_TM_LINEAR_ALIGNED) + { + // linear mode only needs tile mode to match + if (mode == m_tileTable[index].mode) + { + break; + } + } + else + { + // micro tile modes only need tile mode and tile type to match + if (mode == m_tileTable[index].mode && + type == m_tileTable[index].type) + { + break; + } + } + } + } + } + + ADDR_ASSERT(index < static_cast(m_noOfEntries)); + + if (index >= static_cast(m_noOfEntries)) + { + index = TileIndexInvalid; + } + + return index; +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlSetupTileCfg +* +* @brief +* Map tile index to tile setting. +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE SIAddrLib::HwlSetupTileCfg( + INT_32 index, ///< [in] Tile index + INT_32 macroModeIndex, ///< [in] Index in macro tile mode table(CI) + ADDR_TILEINFO* pInfo, ///< [out] Tile Info + AddrTileMode* pMode, ///< [out] Tile mode + AddrTileType* pType ///< [out] Tile type + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + // Global flag to control usage of tileIndex + if (UseTileIndex(index)) + { + if (index == TileIndexLinearGeneral) + { + if (pMode) + { + *pMode = ADDR_TM_LINEAR_GENERAL; + } + + if (pType) + { + *pType = ADDR_DISPLAYABLE; + } + + if (pInfo) + { + pInfo->banks = 2; + pInfo->bankWidth = 1; + pInfo->bankHeight = 1; + pInfo->macroAspectRatio = 1; + pInfo->tileSplitBytes = 64; + pInfo->pipeConfig = ADDR_PIPECFG_P2; + } + } + else if (static_cast(index) >= m_noOfEntries) + { + returnCode = ADDR_INVALIDPARAMS; + } + else + { + const ADDR_TILECONFIG* pCfgTable = GetTileSetting(index); + + if (pInfo) + { + *pInfo = pCfgTable->info; + } + else + { + if (IsMacroTiled(pCfgTable->mode)) + { + returnCode = ADDR_INVALIDPARAMS; + } + } + + if (pMode) + { + *pMode = pCfgTable->mode; + } + + if (pType) + { + *pType = pCfgTable->type; + } + } + } + + return returnCode; +} + +/** +*************************************************************************************************** +* SIAddrLib::ReadGbTileMode +* +* @brief +* Convert GB_TILE_MODE HW value to ADDR_TILE_CONFIG. +* @return +* NA. +*************************************************************************************************** +*/ +VOID SIAddrLib::ReadGbTileMode( + UINT_32 regValue, ///< [in] GB_TILE_MODE register + ADDR_TILECONFIG* pCfg ///< [out] output structure + ) const +{ + GB_TILE_MODE gbTileMode; + gbTileMode.val = regValue; + + pCfg->type = static_cast(gbTileMode.f.micro_tile_mode); + pCfg->info.bankHeight = 1 << gbTileMode.f.bank_height; + pCfg->info.bankWidth = 1 << gbTileMode.f.bank_width; + pCfg->info.banks = 1 << (gbTileMode.f.num_banks + 1); + pCfg->info.macroAspectRatio = 1 << gbTileMode.f.macro_tile_aspect; + pCfg->info.tileSplitBytes = 64 << gbTileMode.f.tile_split; + pCfg->info.pipeConfig = static_cast(gbTileMode.f.pipe_config + 1); + + UINT_32 regArrayMode = gbTileMode.f.array_mode; + + pCfg->mode = static_cast(regArrayMode); + + if (regArrayMode == 8) //ARRAY_2D_TILED_XTHICK + { + pCfg->mode = ADDR_TM_2D_TILED_XTHICK; + } + else if (regArrayMode >= 14) //ARRAY_3D_TILED_XTHICK + { + pCfg->mode = static_cast(pCfg->mode + 3); + } +} + +/** +*************************************************************************************************** +* SIAddrLib::InitTileSettingTable +* +* @brief +* Initialize the ADDR_TILE_CONFIG table. +* @return +* TRUE if tile table is correctly initialized +*************************************************************************************************** +*/ +BOOL_32 SIAddrLib::InitTileSettingTable( + const UINT_32* pCfg, ///< [in] Pointer to table of tile configs + UINT_32 noOfEntries ///< [in] Numbe of entries in the table above + ) +{ + BOOL_32 initOk = TRUE; + + ADDR_ASSERT(noOfEntries <= TileTableSize); + + memset(m_tileTable, 0, sizeof(m_tileTable)); + + if (noOfEntries != 0) + { + m_noOfEntries = noOfEntries; + } + else + { + m_noOfEntries = TileTableSize; + } + + if (pCfg) // From Client + { + for (UINT_32 i = 0; i < m_noOfEntries; i++) + { + ReadGbTileMode(*(pCfg + i), &m_tileTable[i]); + } + } + else + { + ADDR_ASSERT_ALWAYS(); + initOk = FALSE; + } + + if (initOk) + { + ADDR_ASSERT(m_tileTable[TILEINDEX_LINEAR_ALIGNED].mode == ADDR_TM_LINEAR_ALIGNED); + } + + return initOk; +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlGetTileIndex +* +* @brief +* Return the virtual/real index for given mode/type/info +* @return +* ADDR_OK if successful. +*************************************************************************************************** +*/ +ADDR_E_RETURNCODE SIAddrLib::HwlGetTileIndex( + const ADDR_GET_TILEINDEX_INPUT* pIn, + ADDR_GET_TILEINDEX_OUTPUT* pOut) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + pOut->index = HwlPostCheckTileIndex(pIn->pTileInfo, pIn->tileMode, pIn->tileType); + + return returnCode; +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlFmaskPreThunkSurfInfo +* +* @brief +* Some preparation before thunking a ComputeSurfaceInfo call for Fmask +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +VOID SIAddrLib::HwlFmaskPreThunkSurfInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pFmaskIn, ///< [in] Input of fmask info + const ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut, ///< [in] Output of fmask info + ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfIn, ///< [out] Input of thunked surface info + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut ///< [out] Output of thunked surface info + ) const +{ + pSurfIn->tileIndex = pFmaskIn->tileIndex; +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlFmaskPostThunkSurfInfo +* +* @brief +* Copy hwl extra field after calling thunked ComputeSurfaceInfo +* @return +* ADDR_E_RETURNCODE +*************************************************************************************************** +*/ +VOID SIAddrLib::HwlFmaskPostThunkSurfInfo( + const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut, ///< [in] Output of surface info + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut ///< [out] Output of fmask info + ) const +{ + pFmaskOut->macroModeIndex = TileIndexInvalid; + pFmaskOut->tileIndex = pSurfOut->tileIndex; +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlComputeFmaskBits +* @brief +* Computes fmask bits +* @return +* Fmask bits +*************************************************************************************************** +*/ +UINT_32 SIAddrLib::HwlComputeFmaskBits( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, + UINT_32* pNumSamples + ) const +{ + UINT_32 numSamples = pIn->numSamples; + UINT_32 numFrags = GetNumFragments(numSamples, pIn->numFrags); + UINT_32 bpp; + + if (numFrags != numSamples) // EQAA + { + ADDR_ASSERT(numFrags <= 8); + + if (!pIn->resolved) + { + if (numFrags == 1) + { + bpp = 1; + numSamples = numSamples == 16 ? 16 : 8; + } + else if (numFrags == 2) + { + ADDR_ASSERT(numSamples >= 4); + + bpp = 2; + numSamples = numSamples; + } + else if (numFrags == 4) + { + ADDR_ASSERT(numSamples >= 4); + + bpp = 4; + numSamples = numSamples; + } + else // numFrags == 8 + { + ADDR_ASSERT(numSamples == 16); + + bpp = 4; + numSamples = numSamples; + } + } + else + { + if (numFrags == 1) + { + bpp = (numSamples == 16) ? 16 : 8; + numSamples = 1; + } + else if (numFrags == 2) + { + ADDR_ASSERT(numSamples >= 4); + + bpp = numSamples*2; + numSamples = 1; + } + else if (numFrags == 4) + { + ADDR_ASSERT(numSamples >= 4); + + bpp = numSamples*4; + numSamples = 1; + } + else // numFrags == 8 + { + ADDR_ASSERT(numSamples >= 16); + + bpp = 16*4; + numSamples = 1; + } + } + } + else // Normal AA + { + if (!pIn->resolved) + { + bpp = ComputeFmaskNumPlanesFromNumSamples(numSamples); + numSamples = numSamples == 2 ? 8 : numSamples; + } + else + { + // The same as 8XX + bpp = ComputeFmaskResolvedBppFromNumSamples(numSamples); + numSamples = 1; // 1x sample + } + } + + SafeAssign(pNumSamples, numSamples); + + return bpp; +} + +/** +*************************************************************************************************** +* SIAddrLib::HwlOverrideTileMode +* +* @brief +* Override tile modes (for PRT only, avoid client passes in an invalid PRT mode for SI. +* +* @return +* Suitable tile mode +* +*************************************************************************************************** +*/ +BOOL_32 SIAddrLib::HwlOverrideTileMode( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure + AddrTileMode* pTileMode, ///< [in/out] pointer to the tile mode + AddrTileType* pTileType ///< [in/out] pointer to the tile type + ) const +{ + BOOL_32 bOverrided = FALSE; + AddrTileMode tileMode = *pTileMode; + + switch (tileMode) + { + case ADDR_TM_PRT_TILED_THIN1: + tileMode = ADDR_TM_2D_TILED_THIN1; + break; + + case ADDR_TM_PRT_TILED_THICK: + tileMode = ADDR_TM_2D_TILED_THICK; + break; + + case ADDR_TM_PRT_2D_TILED_THICK: + tileMode = ADDR_TM_2D_TILED_THICK; + break; + + case ADDR_TM_PRT_3D_TILED_THICK: + tileMode = ADDR_TM_3D_TILED_THICK; + break; + + default: + break; + } + + if (tileMode != *pTileMode) + { + *pTileMode = tileMode; + bOverrided = TRUE; + ADDR_ASSERT(pIn->flags.prt == TRUE); + } + + return bOverrided; +} + diff -Nru mesa-12.0.6/src/amd/addrlib/r800/siaddrlib.h mesa-17.0.7/src/amd/addrlib/r800/siaddrlib.h --- mesa-12.0.6/src/amd/addrlib/r800/siaddrlib.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/addrlib/r800/siaddrlib.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,262 @@ +/* + * Copyright © 2014 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** +*************************************************************************************************** +* @file siaddrlib.h +* @brief Contains the R800AddrLib class definition. +*************************************************************************************************** +*/ + +#ifndef __SI_ADDR_LIB_H__ +#define __SI_ADDR_LIB_H__ + +#include "addrlib.h" +#include "egbaddrlib.h" + +/** +*************************************************************************************************** +* @brief Describes the information in tile mode table +*************************************************************************************************** +*/ +struct ADDR_TILECONFIG +{ + AddrTileMode mode; + AddrTileType type; + ADDR_TILEINFO info; +}; + +/** +*************************************************************************************************** +* @brief SI specific settings structure. +*************************************************************************************************** +*/ +struct SIChipSettings +{ + struct + { + UINT_32 isSouthernIsland : 1; + UINT_32 isTahiti : 1; + UINT_32 isPitCairn : 1; + UINT_32 isCapeVerde : 1; + /// Oland/Hainan are of GFXIP 6.0, similar with SI + UINT_32 isOland : 1; + UINT_32 isHainan : 1; + }; +}; + +/** +*************************************************************************************************** +* @brief This class is the SI specific address library +* function set. +*************************************************************************************************** +*/ +class SIAddrLib : public EgBasedAddrLib +{ +public: + /// Creates SIAddrLib object + static AddrLib* CreateObj(const AddrClient* pClient) + { + return new(pClient) SIAddrLib(pClient); + } + +protected: + SIAddrLib(const AddrClient* pClient); + virtual ~SIAddrLib(); + + // Hwl interface - defined in AddrLib + virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlConvertTileInfoToHW( + const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, + ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const; + + virtual UINT_64 HwlComputeXmaskAddrFromCoord( + UINT_32 pitch, UINT_32 height, UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 numSlices, + UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8, + ADDR_TILEINFO* pTileInfo, UINT_32* pBitPosition) const; + + virtual VOID HwlComputeXmaskCoordFromAddr( + UINT_64 addr, UINT_32 bitPosition, UINT_32 pitch, UINT_32 height, UINT_32 numSlices, + UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8, + ADDR_TILEINFO* pTileInfo, UINT_32* pX, UINT_32* pY, UINT_32* pSlice) const; + + virtual ADDR_E_RETURNCODE HwlGetTileIndex( + const ADDR_GET_TILEINDEX_INPUT* pIn, + ADDR_GET_TILEINDEX_OUTPUT* pOut) const; + + virtual BOOL_32 HwlComputeMipLevel( + ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const; + + virtual AddrChipFamily HwlConvertChipFamily( + UINT_32 uChipFamily, UINT_32 uChipRevision); + + virtual BOOL_32 HwlInitGlobalParams( + const ADDR_CREATE_INPUT* pCreateIn); + + virtual ADDR_E_RETURNCODE HwlSetupTileCfg( + INT_32 index, INT_32 macroModeIndex, + ADDR_TILEINFO* pInfo, AddrTileMode* pMode = 0, AddrTileType* pType = 0) const; + + virtual VOID HwlComputeTileDataWidthAndHeightLinear( + UINT_32* pMacroWidth, UINT_32* pMacroHeight, + UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const; + + virtual UINT_64 HwlComputeHtileBytes( + UINT_32 pitch, UINT_32 height, UINT_32 bpp, + BOOL_32 isLinear, UINT_32 numSlices, UINT_64* pSliceBytes, UINT_32 baseAlign) const; + + virtual UINT_32 ComputePipeFromCoord( + UINT_32 x, UINT_32 y, UINT_32 slice, + AddrTileMode tileMode, UINT_32 pipeSwizzle, BOOL_32 ignoreSE, + ADDR_TILEINFO* pTileInfo) const; + + virtual UINT_32 HwlGetPipes(const ADDR_TILEINFO* pTileInfo) const; + + /// Pre-handler of 3x pitch (96 bit) adjustment + virtual UINT_32 HwlPreHandleBaseLvl3xPitch( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const; + /// Post-handler of 3x pitch adjustment + virtual UINT_32 HwlPostHandleBaseLvl3xPitch( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const; + + /// Dummy function to finalize the inheritance + virtual UINT_32 HwlComputeXmaskCoordYFrom8Pipe( + UINT_32 pipe, UINT_32 x) const; + + // Sub-hwl interface - defined in EgBasedAddrLib + virtual VOID HwlSetupTileInfo( + AddrTileMode tileMode, ADDR_SURFACE_FLAGS flags, + UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, + ADDR_TILEINFO* inputTileInfo, ADDR_TILEINFO* outputTileInfo, + AddrTileType inTileType, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + virtual UINT_32 HwlGetPitchAlignmentMicroTiled( + AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples) const; + + virtual UINT_64 HwlGetSizeAdjustmentMicroTiled( + UINT_32 thickness, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples, + UINT_32 baseAlign, UINT_32 pitchAlign, + UINT_32 *pPitch, UINT_32 *pHeight) const; + + virtual VOID HwlCheckLastMacroTiledLvl( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + + virtual BOOL_32 HwlTileInfoEqual( + const ADDR_TILEINFO* pLeft, const ADDR_TILEINFO* pRight) const; + + virtual AddrTileMode HwlDegradeThickTileMode( + AddrTileMode baseTileMode, UINT_32 numSlices, UINT_32* pBytesPerTile) const; + + virtual BOOL_32 HwlOverrideTileMode( + const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, + AddrTileMode* pTileMode, + AddrTileType* pTileType) const; + + virtual BOOL_32 HwlSanityCheckMacroTiled( + ADDR_TILEINFO* pTileInfo) const + { + return TRUE; + } + + virtual UINT_32 HwlGetPitchAlignmentLinear(UINT_32 bpp, ADDR_SURFACE_FLAGS flags) const; + + virtual UINT_64 HwlGetSizeAdjustmentLinear( + AddrTileMode tileMode, + UINT_32 bpp, UINT_32 numSamples, UINT_32 baseAlign, UINT_32 pitchAlign, + UINT_32 *pPitch, UINT_32 *pHeight, UINT_32 *pHeightAlign) const; + + virtual VOID HwlComputeSurfaceCoord2DFromBankPipe( + AddrTileMode tileMode, UINT_32* pX, UINT_32* pY, UINT_32 slice, + UINT_32 bank, UINT_32 pipe, + UINT_32 bankSwizzle, UINT_32 pipeSwizzle, UINT_32 tileSlices, + BOOL_32 ignoreSE, + ADDR_TILEINFO* pTileInfo) const; + + virtual UINT_32 HwlPreAdjustBank( + UINT_32 tileX, UINT_32 bank, ADDR_TILEINFO* pTileInfo) const; + + virtual INT_32 HwlPostCheckTileIndex( + const ADDR_TILEINFO* pInfo, AddrTileMode mode, AddrTileType type, + INT curIndex = TileIndexInvalid) const; + + virtual VOID HwlFmaskPreThunkSurfInfo( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pFmaskIn, + const ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut, + ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut) const; + + virtual VOID HwlFmaskPostThunkSurfInfo( + const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut, + ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut) const; + + virtual UINT_32 HwlComputeFmaskBits( + const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, + UINT_32* pNumSamples) const; + + virtual BOOL_32 HwlReduceBankWidthHeight( + UINT_32 tileSize, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples, + UINT_32 bankHeightAlign, UINT_32 pipes, + ADDR_TILEINFO* pTileInfo) const + { + return TRUE; + } + + // Protected non-virtual functions + VOID ComputeTileCoordFromPipeAndElemIdx( + UINT_32 elemIdx, UINT_32 pipe, AddrPipeCfg pipeCfg, UINT_32 pitchInMacroTile, + UINT_32 x, UINT_32 y, UINT_32* pX, UINT_32* pY) const; + + UINT_32 TileCoordToMaskElementIndex( + UINT_32 tx, UINT_32 ty, AddrPipeCfg pipeConfig, + UINT_32 *macroShift, UINT_32 *elemIdxBits) const; + + BOOL_32 DecodeGbRegs( + const ADDR_REGISTER_VALUE* pRegValue); + + const ADDR_TILECONFIG* GetTileSetting( + UINT_32 index) const; + + static const UINT_32 TileTableSize = 32; + ADDR_TILECONFIG m_tileTable[TileTableSize]; + UINT_32 m_noOfEntries; + +private: + + UINT_32 GetPipePerSurf(AddrPipeCfg pipeConfig) const; + + VOID ReadGbTileMode( + UINT_32 regValue, ADDR_TILECONFIG* pCfg) const; + BOOL_32 InitTileSettingTable( + const UINT_32 *pSetting, UINT_32 noOfEntries); + + SIChipSettings m_settings; +}; + +#endif + diff -Nru mesa-12.0.6/src/amd/common/ac_binary.c mesa-17.0.7/src/amd/common/ac_binary.c --- mesa-12.0.6/src/amd/common/ac_binary.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/common/ac_binary.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,288 @@ +/* + * Copyright 2014 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: Tom Stellard + * + * Based on radeon_elf_util.c. + */ + +#include "ac_binary.h" + +#include "util/u_math.h" +#include "util/u_memory.h" + +#include +#include +#include + +#include + +#define SPILLED_SGPRS 0x4 +#define SPILLED_VGPRS 0x8 + +static void parse_symbol_table(Elf_Data *symbol_table_data, + const GElf_Shdr *symbol_table_header, + struct ac_shader_binary *binary) +{ + GElf_Sym symbol; + unsigned i = 0; + unsigned symbol_count = + symbol_table_header->sh_size / symbol_table_header->sh_entsize; + + /* We are over allocating this list, because symbol_count gives the + * total number of symbols, and we will only be filling the list + * with offsets of global symbols. The memory savings from + * allocating the correct size of this list will be small, and + * I don't think it is worth the cost of pre-computing the number + * of global symbols. + */ + binary->global_symbol_offsets = CALLOC(symbol_count, sizeof(uint64_t)); + + while (gelf_getsym(symbol_table_data, i++, &symbol)) { + unsigned i; + if (GELF_ST_BIND(symbol.st_info) != STB_GLOBAL || + symbol.st_shndx == 0 /* Undefined symbol */) { + continue; + } + + binary->global_symbol_offsets[binary->global_symbol_count] = + symbol.st_value; + + /* Sort the list using bubble sort. This list will usually + * be small. */ + for (i = binary->global_symbol_count; i > 0; --i) { + uint64_t lhs = binary->global_symbol_offsets[i - 1]; + uint64_t rhs = binary->global_symbol_offsets[i]; + if (lhs < rhs) { + break; + } + binary->global_symbol_offsets[i] = lhs; + binary->global_symbol_offsets[i - 1] = rhs; + } + ++binary->global_symbol_count; + } +} + +static void parse_relocs(Elf *elf, Elf_Data *relocs, Elf_Data *symbols, + unsigned symbol_sh_link, + struct ac_shader_binary *binary) +{ + unsigned i; + + if (!relocs || !symbols || !binary->reloc_count) { + return; + } + binary->relocs = CALLOC(binary->reloc_count, + sizeof(struct ac_shader_reloc)); + for (i = 0; i < binary->reloc_count; i++) { + GElf_Sym symbol; + GElf_Rel rel; + char *symbol_name; + struct ac_shader_reloc *reloc = &binary->relocs[i]; + + gelf_getrel(relocs, i, &rel); + gelf_getsym(symbols, GELF_R_SYM(rel.r_info), &symbol); + symbol_name = elf_strptr(elf, symbol_sh_link, symbol.st_name); + + reloc->offset = rel.r_offset; + strncpy(reloc->name, symbol_name, sizeof(reloc->name)-1); + reloc->name[sizeof(reloc->name)-1] = 0; + } +} + +void ac_elf_read(const char *elf_data, unsigned elf_size, + struct ac_shader_binary *binary) +{ + char *elf_buffer; + Elf *elf; + Elf_Scn *section = NULL; + Elf_Data *symbols = NULL, *relocs = NULL; + size_t section_str_index; + unsigned symbol_sh_link = 0; + + /* One of the libelf implementations + * (http://www.mr511.de/software/english.htm) requires calling + * elf_version() before elf_memory(). + */ + elf_version(EV_CURRENT); + elf_buffer = MALLOC(elf_size); + memcpy(elf_buffer, elf_data, elf_size); + + elf = elf_memory(elf_buffer, elf_size); + + elf_getshdrstrndx(elf, §ion_str_index); + + while ((section = elf_nextscn(elf, section))) { + const char *name; + Elf_Data *section_data = NULL; + GElf_Shdr section_header; + if (gelf_getshdr(section, §ion_header) != §ion_header) { + fprintf(stderr, "Failed to read ELF section header\n"); + return; + } + name = elf_strptr(elf, section_str_index, section_header.sh_name); + if (!strcmp(name, ".text")) { + section_data = elf_getdata(section, section_data); + binary->code_size = section_data->d_size; + binary->code = MALLOC(binary->code_size * sizeof(unsigned char)); + memcpy(binary->code, section_data->d_buf, binary->code_size); + } else if (!strcmp(name, ".AMDGPU.config")) { + section_data = elf_getdata(section, section_data); + binary->config_size = section_data->d_size; + binary->config = MALLOC(binary->config_size * sizeof(unsigned char)); + memcpy(binary->config, section_data->d_buf, binary->config_size); + } else if (!strcmp(name, ".AMDGPU.disasm")) { + /* Always read disassembly if it's available. */ + section_data = elf_getdata(section, section_data); + binary->disasm_string = strndup(section_data->d_buf, + section_data->d_size); + } else if (!strncmp(name, ".rodata", 7)) { + section_data = elf_getdata(section, section_data); + binary->rodata_size = section_data->d_size; + binary->rodata = MALLOC(binary->rodata_size * sizeof(unsigned char)); + memcpy(binary->rodata, section_data->d_buf, binary->rodata_size); + } else if (!strncmp(name, ".symtab", 7)) { + symbols = elf_getdata(section, section_data); + symbol_sh_link = section_header.sh_link; + parse_symbol_table(symbols, §ion_header, binary); + } else if (!strcmp(name, ".rel.text")) { + relocs = elf_getdata(section, section_data); + binary->reloc_count = section_header.sh_size / + section_header.sh_entsize; + } + } + + parse_relocs(elf, relocs, symbols, symbol_sh_link, binary); + + if (elf){ + elf_end(elf); + } + FREE(elf_buffer); + + /* Cache the config size per symbol */ + if (binary->global_symbol_count) { + binary->config_size_per_symbol = + binary->config_size / binary->global_symbol_count; + } else { + binary->global_symbol_count = 1; + binary->config_size_per_symbol = binary->config_size; + } +} + +static +const unsigned char *ac_shader_binary_config_start( + const struct ac_shader_binary *binary, + uint64_t symbol_offset) +{ + unsigned i; + for (i = 0; i < binary->global_symbol_count; ++i) { + if (binary->global_symbol_offsets[i] == symbol_offset) { + unsigned offset = i * binary->config_size_per_symbol; + return binary->config + offset; + } + } + return binary->config; +} + + +static const char *scratch_rsrc_dword0_symbol = + "SCRATCH_RSRC_DWORD0"; + +static const char *scratch_rsrc_dword1_symbol = + "SCRATCH_RSRC_DWORD1"; + +void ac_shader_binary_read_config(struct ac_shader_binary *binary, + struct ac_shader_config *conf, + unsigned symbol_offset) +{ + unsigned i; + const unsigned char *config = + ac_shader_binary_config_start(binary, symbol_offset); + bool really_needs_scratch = false; + + /* LLVM adds SGPR spills to the scratch size. + * Find out if we really need the scratch buffer. + */ + for (i = 0; i < binary->reloc_count; i++) { + const struct ac_shader_reloc *reloc = &binary->relocs[i]; + + if (!strcmp(scratch_rsrc_dword0_symbol, reloc->name) || + !strcmp(scratch_rsrc_dword1_symbol, reloc->name)) { + really_needs_scratch = true; + break; + } + } + + for (i = 0; i < binary->config_size_per_symbol; i+= 8) { + unsigned reg = util_le32_to_cpu(*(uint32_t*)(config + i)); + unsigned value = util_le32_to_cpu(*(uint32_t*)(config + i + 4)); + switch (reg) { + case R_00B028_SPI_SHADER_PGM_RSRC1_PS: + case R_00B128_SPI_SHADER_PGM_RSRC1_VS: + case R_00B228_SPI_SHADER_PGM_RSRC1_GS: + case R_00B848_COMPUTE_PGM_RSRC1: + conf->num_sgprs = MAX2(conf->num_sgprs, (G_00B028_SGPRS(value) + 1) * 8); + conf->num_vgprs = MAX2(conf->num_vgprs, (G_00B028_VGPRS(value) + 1) * 4); + conf->float_mode = G_00B028_FLOAT_MODE(value); + break; + case R_00B02C_SPI_SHADER_PGM_RSRC2_PS: + conf->lds_size = MAX2(conf->lds_size, G_00B02C_EXTRA_LDS_SIZE(value)); + break; + case R_00B84C_COMPUTE_PGM_RSRC2: + conf->lds_size = MAX2(conf->lds_size, G_00B84C_LDS_SIZE(value)); + break; + case R_0286CC_SPI_PS_INPUT_ENA: + conf->spi_ps_input_ena = value; + break; + case R_0286D0_SPI_PS_INPUT_ADDR: + conf->spi_ps_input_addr = value; + break; + case R_0286E8_SPI_TMPRING_SIZE: + case R_00B860_COMPUTE_TMPRING_SIZE: + /* WAVESIZE is in units of 256 dwords. */ + if (really_needs_scratch) + conf->scratch_bytes_per_wave = + G_00B860_WAVESIZE(value) * 256 * 4; + break; + case SPILLED_SGPRS: + conf->spilled_sgprs = value; + break; + case SPILLED_VGPRS: + conf->spilled_vgprs = value; + break; + default: + { + static bool printed; + + if (!printed) { + fprintf(stderr, "Warning: LLVM emitted unknown " + "config register: 0x%x\n", reg); + printed = true; + } + } + break; + } + + if (!conf->spi_ps_input_addr) + conf->spi_ps_input_addr = conf->spi_ps_input_ena; + } +} diff -Nru mesa-12.0.6/src/amd/common/ac_binary.h mesa-17.0.7/src/amd/common/ac_binary.h --- mesa-12.0.6/src/amd/common/ac_binary.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/common/ac_binary.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,88 @@ +/* + * Copyright 2014 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: Tom Stellard + * + */ + +#pragma once + +#include + +struct ac_shader_reloc { + char name[32]; + uint64_t offset; +}; + +struct ac_shader_binary { + /** Shader code */ + unsigned char *code; + unsigned code_size; + + /** Config/Context register state that accompanies this shader. + * This is a stream of dword pairs. First dword contains the + * register address, the second dword contains the value.*/ + unsigned char *config; + unsigned config_size; + + /** The number of bytes of config information for each global symbol. + */ + unsigned config_size_per_symbol; + + /** Constant data accessed by the shader. This will be uploaded + * into a constant buffer. */ + unsigned char *rodata; + unsigned rodata_size; + + /** List of symbol offsets for the shader */ + uint64_t *global_symbol_offsets; + unsigned global_symbol_count; + + struct ac_shader_reloc *relocs; + unsigned reloc_count; + + /** Disassembled shader in a string. */ + char *disasm_string; +}; + +struct ac_shader_config { + unsigned num_sgprs; + unsigned num_vgprs; + unsigned spilled_sgprs; + unsigned spilled_vgprs; + unsigned lds_size; + unsigned spi_ps_input_ena; + unsigned spi_ps_input_addr; + unsigned float_mode; + unsigned scratch_bytes_per_wave; +}; + +/* + * Parse the elf binary stored in \p elf_data and create a + * ac_shader_binary object. + */ +void ac_elf_read(const char *elf_data, unsigned elf_size, + struct ac_shader_binary *binary); + +void ac_shader_binary_read_config(struct ac_shader_binary *binary, + struct ac_shader_config *conf, + unsigned symbol_offset); diff -Nru mesa-12.0.6/src/amd/common/ac_debug.c mesa-17.0.7/src/amd/common/ac_debug.c --- mesa-12.0.6/src/amd/common/ac_debug.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/common/ac_debug.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,376 @@ +/* + * Copyright 2015 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Marek Olšák + */ + +#include "ac_debug.h" + +#include "sid.h" +#include "sid_tables.h" +#include "util/u_math.h" +#include "util/u_memory.h" + +/* Parsed IBs are difficult to read without colors. Use "less -R file" to + * read them, or use "aha -b -f file" to convert them to html. + */ +#define COLOR_RESET "\033[0m" +#define COLOR_RED "\033[31m" +#define COLOR_GREEN "\033[1;32m" +#define COLOR_YELLOW "\033[1;33m" +#define COLOR_CYAN "\033[1;36m" + +#define INDENT_PKT 8 + +static void print_spaces(FILE *f, unsigned num) +{ + fprintf(f, "%*s", num, ""); +} + +static void print_value(FILE *file, uint32_t value, int bits) +{ + /* Guess if it's int or float */ + if (value <= (1 << 15)) { + if (value <= 9) + fprintf(file, "%u\n", value); + else + fprintf(file, "%u (0x%0*x)\n", value, bits / 4, value); + } else { + float f = uif(value); + + if (fabs(f) < 100000 && f*10 == floor(f*10)) + fprintf(file, "%.1ff (0x%0*x)\n", f, bits / 4, value); + else + /* Don't print more leading zeros than there are bits. */ + fprintf(file, "0x%0*x\n", bits / 4, value); + } +} + +static void print_named_value(FILE *file, const char *name, uint32_t value, + int bits) +{ + print_spaces(file, INDENT_PKT); + fprintf(file, COLOR_YELLOW "%s" COLOR_RESET " <- ", name); + print_value(file, value, bits); +} + +void ac_dump_reg(FILE *file, unsigned offset, uint32_t value, + uint32_t field_mask) +{ + int r, f; + + for (r = 0; r < ARRAY_SIZE(sid_reg_table); r++) { + const struct si_reg *reg = &sid_reg_table[r]; + const char *reg_name = sid_strings + reg->name_offset; + + if (reg->offset == offset) { + bool first_field = true; + + print_spaces(file, INDENT_PKT); + fprintf(file, COLOR_YELLOW "%s" COLOR_RESET " <- ", + reg_name); + + if (!reg->num_fields) { + print_value(file, value, 32); + return; + } + + for (f = 0; f < reg->num_fields; f++) { + const struct si_field *field = sid_fields_table + reg->fields_offset + f; + const int *values_offsets = sid_strings_offsets + field->values_offset; + uint32_t val = (value & field->mask) >> + (ffs(field->mask) - 1); + + if (!(field->mask & field_mask)) + continue; + + /* Indent the field. */ + if (!first_field) + print_spaces(file, + INDENT_PKT + strlen(reg_name) + 4); + + /* Print the field. */ + fprintf(file, "%s = ", sid_strings + field->name_offset); + + if (val < field->num_values && values_offsets[val] >= 0) + fprintf(file, "%s\n", sid_strings + values_offsets[val]); + else + print_value(file, val, + util_bitcount(field->mask)); + + first_field = false; + } + return; + } + } + + print_spaces(file, INDENT_PKT); + fprintf(file, COLOR_YELLOW "0x%05x" COLOR_RESET " <- 0x%08x\n", offset, value); +} + +static void ac_parse_set_reg_packet(FILE *f, uint32_t *ib, unsigned count, + unsigned reg_offset) +{ + unsigned reg = (ib[1] << 2) + reg_offset; + int i; + + for (i = 0; i < count; i++) + ac_dump_reg(f, reg + i*4, ib[2+i], ~0); +} + +static uint32_t *ac_parse_packet3(FILE *f, uint32_t *ib, int *num_dw, + int trace_id, enum chip_class chip_class, + ac_debug_addr_callback addr_callback, + void *addr_callback_data) +{ + unsigned count = PKT_COUNT_G(ib[0]); + unsigned op = PKT3_IT_OPCODE_G(ib[0]); + const char *predicate = PKT3_PREDICATE(ib[0]) ? "(predicate)" : ""; + int i; + + /* Print the name first. */ + for (i = 0; i < ARRAY_SIZE(packet3_table); i++) + if (packet3_table[i].op == op) + break; + + if (i < ARRAY_SIZE(packet3_table)) { + const char *name = sid_strings + packet3_table[i].name_offset; + + if (op == PKT3_SET_CONTEXT_REG || + op == PKT3_SET_CONFIG_REG || + op == PKT3_SET_UCONFIG_REG || + op == PKT3_SET_SH_REG) + fprintf(f, COLOR_CYAN "%s%s" COLOR_CYAN ":\n", + name, predicate); + else + fprintf(f, COLOR_GREEN "%s%s" COLOR_RESET ":\n", + name, predicate); + } else + fprintf(f, COLOR_RED "PKT3_UNKNOWN 0x%x%s" COLOR_RESET ":\n", + op, predicate); + + /* Print the contents. */ + switch (op) { + case PKT3_SET_CONTEXT_REG: + ac_parse_set_reg_packet(f, ib, count, SI_CONTEXT_REG_OFFSET); + break; + case PKT3_SET_CONFIG_REG: + ac_parse_set_reg_packet(f, ib, count, SI_CONFIG_REG_OFFSET); + break; + case PKT3_SET_UCONFIG_REG: + ac_parse_set_reg_packet(f, ib, count, CIK_UCONFIG_REG_OFFSET); + break; + case PKT3_SET_SH_REG: + ac_parse_set_reg_packet(f, ib, count, SI_SH_REG_OFFSET); + break; + case PKT3_ACQUIRE_MEM: + ac_dump_reg(f, R_0301F0_CP_COHER_CNTL, ib[1], ~0); + ac_dump_reg(f, R_0301F4_CP_COHER_SIZE, ib[2], ~0); + ac_dump_reg(f, R_030230_CP_COHER_SIZE_HI, ib[3], ~0); + ac_dump_reg(f, R_0301F8_CP_COHER_BASE, ib[4], ~0); + ac_dump_reg(f, R_0301E4_CP_COHER_BASE_HI, ib[5], ~0); + print_named_value(f, "POLL_INTERVAL", ib[6], 16); + break; + case PKT3_SURFACE_SYNC: + if (chip_class >= CIK) { + ac_dump_reg(f, R_0301F0_CP_COHER_CNTL, ib[1], ~0); + ac_dump_reg(f, R_0301F4_CP_COHER_SIZE, ib[2], ~0); + ac_dump_reg(f, R_0301F8_CP_COHER_BASE, ib[3], ~0); + } else { + ac_dump_reg(f, R_0085F0_CP_COHER_CNTL, ib[1], ~0); + ac_dump_reg(f, R_0085F4_CP_COHER_SIZE, ib[2], ~0); + ac_dump_reg(f, R_0085F8_CP_COHER_BASE, ib[3], ~0); + } + print_named_value(f, "POLL_INTERVAL", ib[4], 16); + break; + case PKT3_EVENT_WRITE: + ac_dump_reg(f, R_028A90_VGT_EVENT_INITIATOR, ib[1], + S_028A90_EVENT_TYPE(~0)); + print_named_value(f, "EVENT_INDEX", (ib[1] >> 8) & 0xf, 4); + print_named_value(f, "INV_L2", (ib[1] >> 20) & 0x1, 1); + if (count > 0) { + print_named_value(f, "ADDRESS_LO", ib[2], 32); + print_named_value(f, "ADDRESS_HI", ib[3], 16); + } + break; + case PKT3_DRAW_INDEX_AUTO: + ac_dump_reg(f, R_030930_VGT_NUM_INDICES, ib[1], ~0); + ac_dump_reg(f, R_0287F0_VGT_DRAW_INITIATOR, ib[2], ~0); + break; + case PKT3_DRAW_INDEX_2: + ac_dump_reg(f, R_028A78_VGT_DMA_MAX_SIZE, ib[1], ~0); + ac_dump_reg(f, R_0287E8_VGT_DMA_BASE, ib[2], ~0); + ac_dump_reg(f, R_0287E4_VGT_DMA_BASE_HI, ib[3], ~0); + ac_dump_reg(f, R_030930_VGT_NUM_INDICES, ib[4], ~0); + ac_dump_reg(f, R_0287F0_VGT_DRAW_INITIATOR, ib[5], ~0); + break; + case PKT3_INDEX_TYPE: + ac_dump_reg(f, R_028A7C_VGT_DMA_INDEX_TYPE, ib[1], ~0); + break; + case PKT3_NUM_INSTANCES: + ac_dump_reg(f, R_030934_VGT_NUM_INSTANCES, ib[1], ~0); + break; + case PKT3_WRITE_DATA: + ac_dump_reg(f, R_370_CONTROL, ib[1], ~0); + ac_dump_reg(f, R_371_DST_ADDR_LO, ib[2], ~0); + ac_dump_reg(f, R_372_DST_ADDR_HI, ib[3], ~0); + for (i = 2; i < count; i++) { + print_spaces(f, INDENT_PKT); + fprintf(f, "0x%08x\n", ib[2+i]); + } + break; + case PKT3_CP_DMA: + ac_dump_reg(f, R_410_CP_DMA_WORD0, ib[1], ~0); + ac_dump_reg(f, R_411_CP_DMA_WORD1, ib[2], ~0); + ac_dump_reg(f, R_412_CP_DMA_WORD2, ib[3], ~0); + ac_dump_reg(f, R_413_CP_DMA_WORD3, ib[4], ~0); + ac_dump_reg(f, R_414_COMMAND, ib[5], ~0); + break; + case PKT3_DMA_DATA: + ac_dump_reg(f, R_500_DMA_DATA_WORD0, ib[1], ~0); + ac_dump_reg(f, R_501_SRC_ADDR_LO, ib[2], ~0); + ac_dump_reg(f, R_502_SRC_ADDR_HI, ib[3], ~0); + ac_dump_reg(f, R_503_DST_ADDR_LO, ib[4], ~0); + ac_dump_reg(f, R_504_DST_ADDR_HI, ib[5], ~0); + ac_dump_reg(f, R_414_COMMAND, ib[6], ~0); + break; + case PKT3_INDIRECT_BUFFER_SI: + case PKT3_INDIRECT_BUFFER_CONST: + case PKT3_INDIRECT_BUFFER_CIK: + ac_dump_reg(f, R_3F0_IB_BASE_LO, ib[1], ~0); + ac_dump_reg(f, R_3F1_IB_BASE_HI, ib[2], ~0); + ac_dump_reg(f, R_3F2_CONTROL, ib[3], ~0); + + if (addr_callback) { + uint64_t addr = ((uint64_t)ib[2] << 32) | ib[1]; + void *data = addr_callback(addr_callback_data, addr); + const char *name = G_3F2_CHAIN(ib[3]) ? "chained" : "nested"; + + if (data) + ac_parse_ib(f, data, G_3F2_IB_SIZE(ib[3]), + trace_id, name, chip_class, + addr_callback, addr_callback_data); + } + break; + case PKT3_CLEAR_STATE: + case PKT3_INCREMENT_DE_COUNTER: + case PKT3_PFP_SYNC_ME: + break; + case PKT3_NOP: + if (ib[0] == 0xffff1000) { + count = -1; /* One dword NOP. */ + break; + } else if (count == 0 && AC_IS_TRACE_POINT(ib[1])) { + unsigned packet_id = AC_GET_TRACE_POINT_ID(ib[1]); + + print_spaces(f, INDENT_PKT); + fprintf(f, COLOR_RED "Trace point ID: %u\n", packet_id); + + if (trace_id == -1) + break; /* tracing was disabled */ + + print_spaces(f, INDENT_PKT); + if (packet_id < trace_id) + fprintf(f, COLOR_RED + "This trace point was reached by the CP." + COLOR_RESET "\n"); + else if (packet_id == trace_id) + fprintf(f, COLOR_RED + "!!!!! This is the last trace point that " + "was reached by the CP !!!!!" + COLOR_RESET "\n"); + else if (packet_id+1 == trace_id) + fprintf(f, COLOR_RED + "!!!!! This is the first trace point that " + "was NOT been reached by the CP !!!!!" + COLOR_RESET "\n"); + else + fprintf(f, COLOR_RED + "!!!!! This trace point was NOT reached " + "by the CP !!!!!" + COLOR_RESET "\n"); + break; + } + /* fall through, print all dwords */ + default: + for (i = 0; i < count+1; i++) { + print_spaces(f, INDENT_PKT); + fprintf(f, "0x%08x\n", ib[1+i]); + } + } + + ib += count + 2; + *num_dw -= count + 2; + return ib; +} + +/** + * Parse and print an IB into a file. + * + * \param f file + * \param ib IB + * \param num_dw size of the IB + * \param chip_class chip class + * \param trace_id the last trace ID that is known to have been reached + * and executed by the CP, typically read from a buffer + * \param addr_callback Get a mapped pointer of the IB at a given address. Can + * be NULL. + * \param addr_callback_data user data for addr_callback + */ +void ac_parse_ib(FILE *f, uint32_t *ib, int num_dw, int trace_id, + const char *name, enum chip_class chip_class, + ac_debug_addr_callback addr_callback, void *addr_callback_data) +{ + fprintf(f, "------------------ %s begin ------------------\n", name); + + while (num_dw > 0) { + unsigned type = PKT_TYPE_G(ib[0]); + + switch (type) { + case 3: + ib = ac_parse_packet3(f, ib, &num_dw, trace_id, + chip_class, addr_callback, + addr_callback_data); + break; + case 2: + /* type-2 nop */ + if (ib[0] == 0x80000000) { + fprintf(f, COLOR_GREEN "NOP (type 2)" COLOR_RESET "\n"); + ib++; + num_dw--; + break; + } + /* fall through */ + default: + fprintf(f, "Unknown packet type %i\n", type); + return; + } + } + + fprintf(f, "------------------- %s end -------------------\n", name); + if (num_dw < 0) { + printf("Packet ends after the end of IB.\n"); + exit(0); + } + fprintf(f, "\n"); +} diff -Nru mesa-12.0.6/src/amd/common/ac_debug.h mesa-17.0.7/src/amd/common/ac_debug.h --- mesa-12.0.6/src/amd/common/ac_debug.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/common/ac_debug.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,46 @@ +/* + * Copyright 2015 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Marek Olšák + */ +#ifndef AC_DEBUG_H +#define AC_DEBUG_H + +#include +#include + +#include "amd_family.h" + +#define AC_ENCODE_TRACE_POINT(id) (0xcafe0000 | ((id) & 0xffff)) +#define AC_IS_TRACE_POINT(x) (((x) & 0xcafe0000) == 0xcafe0000) +#define AC_GET_TRACE_POINT_ID(x) ((x) & 0xffff) + +typedef void *(*ac_debug_addr_callback)(void *data, uint64_t addr); + +void ac_dump_reg(FILE *file, unsigned offset, uint32_t value, + uint32_t field_mask); +void ac_parse_ib(FILE *f, uint32_t *ib, int num_dw, int trace_id, + const char *name, enum chip_class chip_class, + ac_debug_addr_callback addr_callback, void *addr_callback_data); + +#endif diff -Nru mesa-12.0.6/src/amd/common/ac_llvm_helper.cpp mesa-17.0.7/src/amd/common/ac_llvm_helper.cpp --- mesa-12.0.6/src/amd/common/ac_llvm_helper.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/common/ac_llvm_helper.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,55 @@ +/* + * Copyright 2014 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + */ + +/* based on Marek's patch to lp_bld_misc.cpp */ + +// Workaround http://llvm.org/PR23628 +#if HAVE_LLVM >= 0x0307 +# pragma push_macro("DEBUG") +# undef DEBUG +#endif + +#include "ac_llvm_util.h" +#include +#include +#include +#include + +void ac_add_attr_dereferenceable(LLVMValueRef val, uint64_t bytes) +{ + llvm::Argument *A = llvm::unwrap(val); + llvm::AttrBuilder B; + B.addDereferenceableAttr(bytes); + A->addAttr(llvm::AttributeSet::get(A->getContext(), A->getArgNo() + 1, B)); +} + +bool ac_is_sgpr_param(LLVMValueRef arg) +{ + llvm::Argument *A = llvm::unwrap(arg); + llvm::AttributeSet AS = A->getParent()->getAttributes(); + unsigned ArgNo = A->getArgNo(); + return AS.hasAttribute(ArgNo + 1, llvm::Attribute::ByVal) || + AS.hasAttribute(ArgNo + 1, llvm::Attribute::InReg); +} diff -Nru mesa-12.0.6/src/amd/common/ac_llvm_util.c mesa-17.0.7/src/amd/common/ac_llvm_util.c --- mesa-12.0.6/src/amd/common/ac_llvm_util.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/common/ac_llvm_util.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,507 @@ +/* + * Copyright 2014 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + */ +/* based on pieces from si_pipe.c and radeon_llvm_emit.c */ +#include "ac_llvm_util.h" + +#include + +#include "c11/threads.h" + +#include +#include + +#include "util/bitscan.h" +#include "util/macros.h" + +static void ac_init_llvm_target() +{ +#if HAVE_LLVM < 0x0307 + LLVMInitializeR600TargetInfo(); + LLVMInitializeR600Target(); + LLVMInitializeR600TargetMC(); + LLVMInitializeR600AsmPrinter(); +#else + LLVMInitializeAMDGPUTargetInfo(); + LLVMInitializeAMDGPUTarget(); + LLVMInitializeAMDGPUTargetMC(); + LLVMInitializeAMDGPUAsmPrinter(); +#endif +} + +static once_flag ac_init_llvm_target_once_flag = ONCE_FLAG_INIT; + +static LLVMTargetRef ac_get_llvm_target(const char *triple) +{ + LLVMTargetRef target = NULL; + char *err_message = NULL; + + call_once(&ac_init_llvm_target_once_flag, ac_init_llvm_target); + + if (LLVMGetTargetFromTriple(triple, &target, &err_message)) { + fprintf(stderr, "Cannot find target for triple %s ", triple); + if (err_message) { + fprintf(stderr, "%s\n", err_message); + } + LLVMDisposeMessage(err_message); + return NULL; + } + return target; +} + +static const char *ac_get_llvm_processor_name(enum radeon_family family) +{ + switch (family) { + case CHIP_TAHITI: + return "tahiti"; + case CHIP_PITCAIRN: + return "pitcairn"; + case CHIP_VERDE: + return "verde"; + case CHIP_OLAND: + return "oland"; + case CHIP_HAINAN: + return "hainan"; + case CHIP_BONAIRE: + return "bonaire"; + case CHIP_KABINI: + return "kabini"; + case CHIP_KAVERI: + return "kaveri"; + case CHIP_HAWAII: + return "hawaii"; + case CHIP_MULLINS: + return "mullins"; + case CHIP_TONGA: + return "tonga"; + case CHIP_ICELAND: + return "iceland"; + case CHIP_CARRIZO: + return "carrizo"; +#if HAVE_LLVM <= 0x0307 + case CHIP_FIJI: + return "tonga"; + case CHIP_STONEY: + return "carrizo"; +#else + case CHIP_FIJI: + return "fiji"; + case CHIP_STONEY: + return "stoney"; +#endif +#if HAVE_LLVM <= 0x0308 + case CHIP_POLARIS10: + return "tonga"; + case CHIP_POLARIS11: + return "tonga"; +#else + case CHIP_POLARIS10: + return "polaris10"; + case CHIP_POLARIS11: + case CHIP_POLARIS12: + return "polaris11"; +#endif + default: + return ""; + } +} + +LLVMTargetMachineRef ac_create_target_machine(enum radeon_family family) +{ + assert(family >= CHIP_TAHITI); + + const char *triple = "amdgcn--"; + LLVMTargetRef target = ac_get_llvm_target(triple); + LLVMTargetMachineRef tm = LLVMCreateTargetMachine( + target, + triple, + ac_get_llvm_processor_name(family), + "+DumpCode,+vgpr-spilling", + LLVMCodeGenLevelDefault, + LLVMRelocDefault, + LLVMCodeModelDefault); + + return tm; +} + +/* Initialize module-independent parts of the context. + * + * The caller is responsible for initializing ctx::module and ctx::builder. + */ +void +ac_llvm_context_init(struct ac_llvm_context *ctx, LLVMContextRef context) +{ + LLVMValueRef args[1]; + + ctx->context = context; + ctx->module = NULL; + ctx->builder = NULL; + + ctx->i32 = LLVMIntTypeInContext(ctx->context, 32); + ctx->f32 = LLVMFloatTypeInContext(ctx->context); + + ctx->fpmath_md_kind = LLVMGetMDKindIDInContext(ctx->context, "fpmath", 6); + + args[0] = LLVMConstReal(ctx->f32, 2.5); + ctx->fpmath_md_2p5_ulp = LLVMMDNodeInContext(ctx->context, args, 1); +} + +#if HAVE_LLVM < 0x0400 +static LLVMAttribute ac_attr_to_llvm_attr(enum ac_func_attr attr) +{ + switch (attr) { + case AC_FUNC_ATTR_ALWAYSINLINE: return LLVMAlwaysInlineAttribute; + case AC_FUNC_ATTR_BYVAL: return LLVMByValAttribute; + case AC_FUNC_ATTR_INREG: return LLVMInRegAttribute; + case AC_FUNC_ATTR_NOALIAS: return LLVMNoAliasAttribute; + case AC_FUNC_ATTR_NOUNWIND: return LLVMNoUnwindAttribute; + case AC_FUNC_ATTR_READNONE: return LLVMReadNoneAttribute; + case AC_FUNC_ATTR_READONLY: return LLVMReadOnlyAttribute; + default: + fprintf(stderr, "Unhandled function attribute: %x\n", attr); + return 0; + } +} + +#else + +static const char *attr_to_str(enum ac_func_attr attr) +{ + switch (attr) { + case AC_FUNC_ATTR_ALWAYSINLINE: return "alwaysinline"; + case AC_FUNC_ATTR_BYVAL: return "byval"; + case AC_FUNC_ATTR_INREG: return "inreg"; + case AC_FUNC_ATTR_NOALIAS: return "noalias"; + case AC_FUNC_ATTR_NOUNWIND: return "nounwind"; + case AC_FUNC_ATTR_READNONE: return "readnone"; + case AC_FUNC_ATTR_READONLY: return "readonly"; + default: + fprintf(stderr, "Unhandled function attribute: %x\n", attr); + return 0; + } +} + +#endif + +void +ac_add_function_attr(LLVMValueRef function, + int attr_idx, + enum ac_func_attr attr) +{ + +#if HAVE_LLVM < 0x0400 + LLVMAttribute llvm_attr = ac_attr_to_llvm_attr(attr); + if (attr_idx == -1) { + LLVMAddFunctionAttr(function, llvm_attr); + } else { + LLVMAddAttribute(LLVMGetParam(function, attr_idx - 1), llvm_attr); + } +#else + LLVMContextRef context = LLVMGetModuleContext(LLVMGetGlobalParent(function)); + const char *attr_name = attr_to_str(attr); + unsigned kind_id = LLVMGetEnumAttributeKindForName(attr_name, + strlen(attr_name)); + LLVMAttributeRef llvm_attr = LLVMCreateEnumAttribute(context, kind_id, 0); + LLVMAddAttributeAtIndex(function, attr_idx, llvm_attr); +#endif +} + +LLVMValueRef +ac_emit_llvm_intrinsic(struct ac_llvm_context *ctx, const char *name, + LLVMTypeRef return_type, LLVMValueRef *params, + unsigned param_count, unsigned attrib_mask) +{ + LLVMValueRef function; + + function = LLVMGetNamedFunction(ctx->module, name); + if (!function) { + LLVMTypeRef param_types[32], function_type; + unsigned i; + + assert(param_count <= 32); + + for (i = 0; i < param_count; ++i) { + assert(params[i]); + param_types[i] = LLVMTypeOf(params[i]); + } + function_type = + LLVMFunctionType(return_type, param_types, param_count, 0); + function = LLVMAddFunction(ctx->module, name, function_type); + + LLVMSetFunctionCallConv(function, LLVMCCallConv); + LLVMSetLinkage(function, LLVMExternalLinkage); + + attrib_mask |= AC_FUNC_ATTR_NOUNWIND; + while (attrib_mask) { + enum ac_func_attr attr = 1u << u_bit_scan(&attrib_mask); + ac_add_function_attr(function, -1, attr); + } + } + return LLVMBuildCall(ctx->builder, function, params, param_count, ""); +} + +LLVMValueRef +ac_build_gather_values_extended(struct ac_llvm_context *ctx, + LLVMValueRef *values, + unsigned value_count, + unsigned value_stride, + bool load) +{ + LLVMBuilderRef builder = ctx->builder; + LLVMValueRef vec; + unsigned i; + + + if (value_count == 1) { + if (load) + return LLVMBuildLoad(builder, values[0], ""); + return values[0]; + } else if (!value_count) + unreachable("value_count is 0"); + + for (i = 0; i < value_count; i++) { + LLVMValueRef value = values[i * value_stride]; + if (load) + value = LLVMBuildLoad(builder, value, ""); + + if (!i) + vec = LLVMGetUndef( LLVMVectorType(LLVMTypeOf(value), value_count)); + LLVMValueRef index = LLVMConstInt(ctx->i32, i, false); + vec = LLVMBuildInsertElement(builder, vec, value, index, ""); + } + return vec; +} + +LLVMValueRef +ac_build_gather_values(struct ac_llvm_context *ctx, + LLVMValueRef *values, + unsigned value_count) +{ + return ac_build_gather_values_extended(ctx, values, value_count, 1, false); +} + +LLVMValueRef +ac_emit_fdiv(struct ac_llvm_context *ctx, + LLVMValueRef num, + LLVMValueRef den) +{ + LLVMValueRef ret = LLVMBuildFDiv(ctx->builder, num, den, ""); + + if (!LLVMIsConstant(ret)) + LLVMSetMetadata(ret, ctx->fpmath_md_kind, ctx->fpmath_md_2p5_ulp); + return ret; +} + +/* Coordinates for cube map selection. sc, tc, and ma are as in Table 8.27 + * of the OpenGL 4.5 (Compatibility Profile) specification, except ma is + * already multiplied by two. id is the cube face number. + */ +struct cube_selection_coords { + LLVMValueRef stc[2]; + LLVMValueRef ma; + LLVMValueRef id; +}; + +static void +build_cube_intrinsic(struct ac_llvm_context *ctx, + LLVMValueRef in[3], + struct cube_selection_coords *out) +{ + LLVMBuilderRef builder = ctx->builder; + + if (HAVE_LLVM >= 0x0309) { + LLVMTypeRef f32 = ctx->f32; + + out->stc[1] = ac_emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubetc", + f32, in, 3, AC_FUNC_ATTR_READNONE); + out->stc[0] = ac_emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubesc", + f32, in, 3, AC_FUNC_ATTR_READNONE); + out->ma = ac_emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubema", + f32, in, 3, AC_FUNC_ATTR_READNONE); + out->id = ac_emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubeid", + f32, in, 3, AC_FUNC_ATTR_READNONE); + } else { + LLVMValueRef c[4] = { + in[0], + in[1], + in[2], + LLVMGetUndef(LLVMTypeOf(in[0])) + }; + LLVMValueRef vec = ac_build_gather_values(ctx, c, 4); + + LLVMValueRef tmp = + ac_emit_llvm_intrinsic(ctx, "llvm.AMDGPU.cube", + LLVMTypeOf(vec), &vec, 1, + AC_FUNC_ATTR_READNONE); + + out->stc[1] = LLVMBuildExtractElement(builder, tmp, + LLVMConstInt(ctx->i32, 0, 0), ""); + out->stc[0] = LLVMBuildExtractElement(builder, tmp, + LLVMConstInt(ctx->i32, 1, 0), ""); + out->ma = LLVMBuildExtractElement(builder, tmp, + LLVMConstInt(ctx->i32, 2, 0), ""); + out->id = LLVMBuildExtractElement(builder, tmp, + LLVMConstInt(ctx->i32, 3, 0), ""); + } +} + +/** + * Build a manual selection sequence for cube face sc/tc coordinates and + * major axis vector (multiplied by 2 for consistency) for the given + * vec3 \p coords, for the face implied by \p selcoords. + * + * For the major axis, we always adjust the sign to be in the direction of + * selcoords.ma; i.e., a positive out_ma means that coords is pointed towards + * the selcoords major axis. + */ +static void build_cube_select(LLVMBuilderRef builder, + const struct cube_selection_coords *selcoords, + const LLVMValueRef *coords, + LLVMValueRef *out_st, + LLVMValueRef *out_ma) +{ + LLVMTypeRef f32 = LLVMTypeOf(coords[0]); + LLVMValueRef is_ma_positive; + LLVMValueRef sgn_ma; + LLVMValueRef is_ma_z, is_not_ma_z; + LLVMValueRef is_ma_y; + LLVMValueRef is_ma_x; + LLVMValueRef sgn; + LLVMValueRef tmp; + + is_ma_positive = LLVMBuildFCmp(builder, LLVMRealUGE, + selcoords->ma, LLVMConstReal(f32, 0.0), ""); + sgn_ma = LLVMBuildSelect(builder, is_ma_positive, + LLVMConstReal(f32, 1.0), LLVMConstReal(f32, -1.0), ""); + + is_ma_z = LLVMBuildFCmp(builder, LLVMRealUGE, selcoords->id, LLVMConstReal(f32, 4.0), ""); + is_not_ma_z = LLVMBuildNot(builder, is_ma_z, ""); + is_ma_y = LLVMBuildAnd(builder, is_not_ma_z, + LLVMBuildFCmp(builder, LLVMRealUGE, selcoords->id, LLVMConstReal(f32, 2.0), ""), ""); + is_ma_x = LLVMBuildAnd(builder, is_not_ma_z, LLVMBuildNot(builder, is_ma_y, ""), ""); + + /* Select sc */ + tmp = LLVMBuildSelect(builder, is_ma_z, coords[2], coords[0], ""); + sgn = LLVMBuildSelect(builder, is_ma_y, LLVMConstReal(f32, 1.0), + LLVMBuildSelect(builder, is_ma_x, sgn_ma, + LLVMBuildFNeg(builder, sgn_ma, ""), ""), ""); + out_st[0] = LLVMBuildFMul(builder, tmp, sgn, ""); + + /* Select tc */ + tmp = LLVMBuildSelect(builder, is_ma_y, coords[2], coords[1], ""); + sgn = LLVMBuildSelect(builder, is_ma_y, LLVMBuildFNeg(builder, sgn_ma, ""), + LLVMConstReal(f32, -1.0), ""); + out_st[1] = LLVMBuildFMul(builder, tmp, sgn, ""); + + /* Select ma */ + tmp = LLVMBuildSelect(builder, is_ma_z, coords[2], + LLVMBuildSelect(builder, is_ma_y, coords[1], coords[0], ""), ""); + sgn = LLVMBuildSelect(builder, is_ma_positive, + LLVMConstReal(f32, 2.0), LLVMConstReal(f32, -2.0), ""); + *out_ma = LLVMBuildFMul(builder, tmp, sgn, ""); +} + +void +ac_prepare_cube_coords(struct ac_llvm_context *ctx, + bool is_deriv, bool is_array, + LLVMValueRef *coords_arg, + LLVMValueRef *derivs_arg) +{ + + LLVMBuilderRef builder = ctx->builder; + struct cube_selection_coords selcoords; + LLVMValueRef coords[3]; + LLVMValueRef invma; + + build_cube_intrinsic(ctx, coords_arg, &selcoords); + + invma = ac_emit_llvm_intrinsic(ctx, "llvm.fabs.f32", + ctx->f32, &selcoords.ma, 1, AC_FUNC_ATTR_READNONE); + invma = ac_emit_fdiv(ctx, LLVMConstReal(ctx->f32, 1.0), invma); + + for (int i = 0; i < 2; ++i) + coords[i] = LLVMBuildFMul(builder, selcoords.stc[i], invma, ""); + + coords[2] = selcoords.id; + + if (is_deriv && derivs_arg) { + LLVMValueRef derivs[4]; + int axis; + + /* Convert cube derivatives to 2D derivatives. */ + for (axis = 0; axis < 2; axis++) { + LLVMValueRef deriv_st[2]; + LLVMValueRef deriv_ma; + + /* Transform the derivative alongside the texture + * coordinate. Mathematically, the correct formula is + * as follows. Assume we're projecting onto the +Z face + * and denote by dx/dh the derivative of the (original) + * X texture coordinate with respect to horizontal + * window coordinates. The projection onto the +Z face + * plane is: + * + * f(x,z) = x/z + * + * Then df/dh = df/dx * dx/dh + df/dz * dz/dh + * = 1/z * dx/dh - x/z * 1/z * dz/dh. + * + * This motivatives the implementation below. + * + * Whether this actually gives the expected results for + * apps that might feed in derivatives obtained via + * finite differences is anyone's guess. The OpenGL spec + * seems awfully quiet about how textureGrad for cube + * maps should be handled. + */ + build_cube_select(builder, &selcoords, &derivs_arg[axis * 3], + deriv_st, &deriv_ma); + + deriv_ma = LLVMBuildFMul(builder, deriv_ma, invma, ""); + + for (int i = 0; i < 2; ++i) + derivs[axis * 2 + i] = + LLVMBuildFSub(builder, + LLVMBuildFMul(builder, deriv_st[i], invma, ""), + LLVMBuildFMul(builder, deriv_ma, coords[i], ""), ""); + } + + memcpy(derivs_arg, derivs, sizeof(derivs)); + } + + /* Shift the texture coordinate. This must be applied after the + * derivative calculation. + */ + for (int i = 0; i < 2; ++i) + coords[i] = LLVMBuildFAdd(builder, coords[i], LLVMConstReal(ctx->f32, 1.5), ""); + + if (is_array) { + /* for cube arrays coord.z = coord.w(array_index) * 8 + face */ + /* coords_arg.w component - array_index for cube arrays */ + LLVMValueRef tmp = LLVMBuildFMul(ctx->builder, coords_arg[3], LLVMConstReal(ctx->f32, 8.0), ""); + coords[2] = LLVMBuildFAdd(ctx->builder, tmp, coords[2], ""); + } + + memcpy(coords_arg, coords, sizeof(coords)); +} diff -Nru mesa-12.0.6/src/amd/common/ac_llvm_util.h mesa-17.0.7/src/amd/common/ac_llvm_util.h --- mesa-12.0.6/src/amd/common/ac_llvm_util.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/common/ac_llvm_util.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,100 @@ +/* + * Copyright 2016 Bas Nieuwenhuizen + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + */ +#pragma once + +#include +#include + +#include "amd_family.h" + +#ifdef __cplusplus +extern "C" { +#endif + +enum ac_func_attr { + AC_FUNC_ATTR_ALWAYSINLINE = (1 << 0), + AC_FUNC_ATTR_BYVAL = (1 << 1), + AC_FUNC_ATTR_INREG = (1 << 2), + AC_FUNC_ATTR_NOALIAS = (1 << 3), + AC_FUNC_ATTR_NOUNWIND = (1 << 4), + AC_FUNC_ATTR_READNONE = (1 << 5), + AC_FUNC_ATTR_READONLY = (1 << 6), + AC_FUNC_ATTR_LAST = (1 << 7) +}; + +struct ac_llvm_context { + LLVMContextRef context; + LLVMModuleRef module; + LLVMBuilderRef builder; + + LLVMTypeRef i32; + LLVMTypeRef f32; + + unsigned fpmath_md_kind; + LLVMValueRef fpmath_md_2p5_ulp; +}; + +LLVMTargetMachineRef ac_create_target_machine(enum radeon_family family); + +void ac_add_attr_dereferenceable(LLVMValueRef val, uint64_t bytes); +bool ac_is_sgpr_param(LLVMValueRef param); + +void +ac_llvm_context_init(struct ac_llvm_context *ctx, LLVMContextRef context); + +void +ac_add_function_attr(LLVMValueRef function, + int attr_idx, + enum ac_func_attr attr); +LLVMValueRef +ac_emit_llvm_intrinsic(struct ac_llvm_context *ctx, const char *name, + LLVMTypeRef return_type, LLVMValueRef *params, + unsigned param_count, unsigned attrib_mask); + +LLVMValueRef +ac_build_gather_values_extended(struct ac_llvm_context *ctx, + LLVMValueRef *values, + unsigned value_count, + unsigned value_stride, + bool load); +LLVMValueRef +ac_build_gather_values(struct ac_llvm_context *ctx, + LLVMValueRef *values, + unsigned value_count); + +LLVMValueRef +ac_emit_fdiv(struct ac_llvm_context *ctx, + LLVMValueRef num, + LLVMValueRef den); + +void +ac_prepare_cube_coords(struct ac_llvm_context *ctx, + bool is_deriv, bool is_array, + LLVMValueRef *coords_arg, + LLVMValueRef *derivs_arg); + +#ifdef __cplusplus +} +#endif diff -Nru mesa-12.0.6/src/amd/common/ac_nir_to_llvm.c mesa-17.0.7/src/amd/common/ac_nir_to_llvm.c --- mesa-12.0.6/src/amd/common/ac_nir_to_llvm.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/common/ac_nir_to_llvm.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,4690 @@ +/* + * Copyright © 2016 Bas Nieuwenhuizen + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "ac_nir_to_llvm.h" +#include "ac_llvm_util.h" +#include "ac_binary.h" +#include "sid.h" +#include "nir/nir.h" +#include "../vulkan/radv_descriptor_set.h" +#include "util/bitscan.h" +#include + +enum radeon_llvm_calling_convention { + RADEON_LLVM_AMDGPU_VS = 87, + RADEON_LLVM_AMDGPU_GS = 88, + RADEON_LLVM_AMDGPU_PS = 89, + RADEON_LLVM_AMDGPU_CS = 90, +}; + +#define CONST_ADDR_SPACE 2 +#define LOCAL_ADDR_SPACE 3 + +#define RADEON_LLVM_MAX_INPUTS (VARYING_SLOT_VAR31 + 1) +#define RADEON_LLVM_MAX_OUTPUTS (VARYING_SLOT_VAR31 + 1) + +enum desc_type { + DESC_IMAGE, + DESC_FMASK, + DESC_SAMPLER, + DESC_BUFFER, +}; + +struct nir_to_llvm_context { + struct ac_llvm_context ac; + const struct ac_nir_compiler_options *options; + struct ac_shader_variant_info *shader_info; + + LLVMContextRef context; + LLVMModuleRef module; + LLVMBuilderRef builder; + LLVMValueRef main_function; + + struct hash_table *defs; + struct hash_table *phis; + + LLVMValueRef descriptor_sets[AC_UD_MAX_SETS]; + LLVMValueRef push_constants; + LLVMValueRef num_work_groups; + LLVMValueRef workgroup_ids; + LLVMValueRef local_invocation_ids; + LLVMValueRef tg_size; + + LLVMValueRef vertex_buffers; + LLVMValueRef base_vertex; + LLVMValueRef start_instance; + LLVMValueRef vertex_id; + LLVMValueRef rel_auto_id; + LLVMValueRef vs_prim_id; + LLVMValueRef instance_id; + + LLVMValueRef prim_mask; + LLVMValueRef sample_positions; + LLVMValueRef persp_sample, persp_center, persp_centroid; + LLVMValueRef linear_sample, linear_center, linear_centroid; + LLVMValueRef front_face; + LLVMValueRef ancillary; + LLVMValueRef frag_pos[4]; + + LLVMBasicBlockRef continue_block; + LLVMBasicBlockRef break_block; + + LLVMTypeRef i1; + LLVMTypeRef i8; + LLVMTypeRef i16; + LLVMTypeRef i32; + LLVMTypeRef i64; + LLVMTypeRef v2i32; + LLVMTypeRef v3i32; + LLVMTypeRef v4i32; + LLVMTypeRef v8i32; + LLVMTypeRef f32; + LLVMTypeRef f16; + LLVMTypeRef v2f32; + LLVMTypeRef v4f32; + LLVMTypeRef v16i8; + LLVMTypeRef voidt; + + LLVMValueRef i32zero; + LLVMValueRef i32one; + LLVMValueRef f32zero; + LLVMValueRef f32one; + LLVMValueRef v4f32empty; + + unsigned range_md_kind; + unsigned uniform_md_kind; + unsigned invariant_load_md_kind; + LLVMValueRef empty_md; + gl_shader_stage stage; + + LLVMValueRef lds; + LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS * 4]; + LLVMValueRef outputs[RADEON_LLVM_MAX_OUTPUTS * 4]; + + LLVMValueRef shared_memory; + uint64_t input_mask; + uint64_t output_mask; + int num_locals; + LLVMValueRef *locals; + bool has_ddxy; + unsigned num_clips; + unsigned num_culls; + + bool has_ds_bpermute; +}; + +struct ac_tex_info { + LLVMValueRef args[12]; + int arg_count; + LLVMTypeRef dst_type; + bool has_offset; +}; + +static LLVMValueRef get_sampler_desc(struct nir_to_llvm_context *ctx, + nir_deref_var *deref, + enum desc_type desc_type); +static unsigned radeon_llvm_reg_index_soa(unsigned index, unsigned chan) +{ + return (index * 4) + chan; +} + +static unsigned llvm_get_type_size(LLVMTypeRef type) +{ + LLVMTypeKind kind = LLVMGetTypeKind(type); + + switch (kind) { + case LLVMIntegerTypeKind: + return LLVMGetIntTypeWidth(type) / 8; + case LLVMFloatTypeKind: + return 4; + case LLVMPointerTypeKind: + return 8; + case LLVMVectorTypeKind: + return LLVMGetVectorSize(type) * + llvm_get_type_size(LLVMGetElementType(type)); + default: + assert(0); + return 0; + } +} + +static void set_llvm_calling_convention(LLVMValueRef func, + gl_shader_stage stage) +{ + enum radeon_llvm_calling_convention calling_conv; + + switch (stage) { + case MESA_SHADER_VERTEX: + case MESA_SHADER_TESS_CTRL: + case MESA_SHADER_TESS_EVAL: + calling_conv = RADEON_LLVM_AMDGPU_VS; + break; + case MESA_SHADER_GEOMETRY: + calling_conv = RADEON_LLVM_AMDGPU_GS; + break; + case MESA_SHADER_FRAGMENT: + calling_conv = RADEON_LLVM_AMDGPU_PS; + break; + case MESA_SHADER_COMPUTE: + calling_conv = RADEON_LLVM_AMDGPU_CS; + break; + default: + unreachable("Unhandle shader type"); + } + + LLVMSetFunctionCallConv(func, calling_conv); +} + +static LLVMValueRef +create_llvm_function(LLVMContextRef ctx, LLVMModuleRef module, + LLVMBuilderRef builder, LLVMTypeRef *return_types, + unsigned num_return_elems, LLVMTypeRef *param_types, + unsigned param_count, unsigned array_params_mask, + unsigned sgpr_params, bool unsafe_math) +{ + LLVMTypeRef main_function_type, ret_type; + LLVMBasicBlockRef main_function_body; + + if (num_return_elems) + ret_type = LLVMStructTypeInContext(ctx, return_types, + num_return_elems, true); + else + ret_type = LLVMVoidTypeInContext(ctx); + + /* Setup the function */ + main_function_type = + LLVMFunctionType(ret_type, param_types, param_count, 0); + LLVMValueRef main_function = + LLVMAddFunction(module, "main", main_function_type); + main_function_body = + LLVMAppendBasicBlockInContext(ctx, main_function, "main_body"); + LLVMPositionBuilderAtEnd(builder, main_function_body); + + LLVMSetFunctionCallConv(main_function, RADEON_LLVM_AMDGPU_CS); + for (unsigned i = 0; i < sgpr_params; ++i) { + if (array_params_mask & (1 << i)) { + LLVMValueRef P = LLVMGetParam(main_function, i); + ac_add_function_attr(main_function, i + 1, AC_FUNC_ATTR_BYVAL); + ac_add_attr_dereferenceable(P, UINT64_MAX); + } + else { + ac_add_function_attr(main_function, i + 1, AC_FUNC_ATTR_INREG); + } + } + + if (unsafe_math) { + /* These were copied from some LLVM test. */ + LLVMAddTargetDependentFunctionAttr(main_function, + "less-precise-fpmad", + "true"); + LLVMAddTargetDependentFunctionAttr(main_function, + "no-infs-fp-math", + "true"); + LLVMAddTargetDependentFunctionAttr(main_function, + "no-nans-fp-math", + "true"); + LLVMAddTargetDependentFunctionAttr(main_function, + "unsafe-fp-math", + "true"); + } + return main_function; +} + +static LLVMTypeRef const_array(LLVMTypeRef elem_type, int num_elements) +{ + return LLVMPointerType(LLVMArrayType(elem_type, num_elements), + CONST_ADDR_SPACE); +} + +static LLVMValueRef get_shared_memory_ptr(struct nir_to_llvm_context *ctx, + int idx, + LLVMTypeRef type) +{ + LLVMValueRef offset; + LLVMValueRef ptr; + int addr_space; + + offset = LLVMConstInt(ctx->i32, idx * 16, false); + + ptr = ctx->shared_memory; + ptr = LLVMBuildGEP(ctx->builder, ptr, &offset, 1, ""); + addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr)); + ptr = LLVMBuildBitCast(ctx->builder, ptr, LLVMPointerType(type, addr_space), ""); + return ptr; +} + +static LLVMValueRef to_integer(struct nir_to_llvm_context *ctx, LLVMValueRef v) +{ + LLVMTypeRef type = LLVMTypeOf(v); + if (type == ctx->f32) { + return LLVMBuildBitCast(ctx->builder, v, ctx->i32, ""); + } else if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) { + LLVMTypeRef elem_type = LLVMGetElementType(type); + if (elem_type == ctx->f32) { + LLVMTypeRef nt = LLVMVectorType(ctx->i32, LLVMGetVectorSize(type)); + return LLVMBuildBitCast(ctx->builder, v, nt, ""); + } + } + return v; +} + +static LLVMValueRef to_float(struct nir_to_llvm_context *ctx, LLVMValueRef v) +{ + LLVMTypeRef type = LLVMTypeOf(v); + if (type == ctx->i32) { + return LLVMBuildBitCast(ctx->builder, v, ctx->f32, ""); + } else if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) { + LLVMTypeRef elem_type = LLVMGetElementType(type); + if (elem_type == ctx->i32) { + LLVMTypeRef nt = LLVMVectorType(ctx->f32, LLVMGetVectorSize(type)); + return LLVMBuildBitCast(ctx->builder, v, nt, ""); + } + } + return v; +} + +static LLVMValueRef unpack_param(struct nir_to_llvm_context *ctx, + LLVMValueRef param, unsigned rshift, + unsigned bitwidth) +{ + LLVMValueRef value = param; + if (rshift) + value = LLVMBuildLShr(ctx->builder, value, + LLVMConstInt(ctx->i32, rshift, false), ""); + + if (rshift + bitwidth < 32) { + unsigned mask = (1 << bitwidth) - 1; + value = LLVMBuildAnd(ctx->builder, value, + LLVMConstInt(ctx->i32, mask, false), ""); + } + return value; +} + +static LLVMValueRef build_gep0(struct nir_to_llvm_context *ctx, + LLVMValueRef base_ptr, LLVMValueRef index) +{ + LLVMValueRef indices[2] = { + ctx->i32zero, + index, + }; + return LLVMBuildGEP(ctx->builder, base_ptr, + indices, 2, ""); +} + +static LLVMValueRef build_indexed_load(struct nir_to_llvm_context *ctx, + LLVMValueRef base_ptr, LLVMValueRef index, + bool uniform) +{ + LLVMValueRef pointer; + pointer = build_gep0(ctx, base_ptr, index); + if (uniform) + LLVMSetMetadata(pointer, ctx->uniform_md_kind, ctx->empty_md); + return LLVMBuildLoad(ctx->builder, pointer, ""); +} + +static LLVMValueRef build_indexed_load_const(struct nir_to_llvm_context *ctx, + LLVMValueRef base_ptr, LLVMValueRef index) +{ + LLVMValueRef result = build_indexed_load(ctx, base_ptr, index, true); + LLVMSetMetadata(result, ctx->invariant_load_md_kind, ctx->empty_md); + return result; +} + +static void set_userdata_location(struct ac_userdata_info *ud_info, uint8_t sgpr_idx, uint8_t num_sgprs) +{ + ud_info->sgpr_idx = sgpr_idx; + ud_info->num_sgprs = num_sgprs; + ud_info->indirect = false; + ud_info->indirect_offset = 0; +} + +static void set_userdata_location_shader(struct nir_to_llvm_context *ctx, + int idx, uint8_t sgpr_idx, uint8_t num_sgprs) +{ + set_userdata_location(&ctx->shader_info->user_sgprs_locs.shader_data[idx], sgpr_idx, num_sgprs); +} + +#if 0 +static void set_userdata_location_indirect(struct ac_userdata_info *ud_info, uint8_t sgpr_idx, uint8_t num_sgprs, + uint32_t indirect_offset) +{ + ud_info->sgpr_idx = sgpr_idx; + ud_info->num_sgprs = num_sgprs; + ud_info->indirect = true; + ud_info->indirect_offset = indirect_offset; +} +#endif + +static void create_function(struct nir_to_llvm_context *ctx) +{ + LLVMTypeRef arg_types[23]; + unsigned arg_idx = 0; + unsigned array_params_mask = 0; + unsigned sgpr_count = 0, user_sgpr_count; + unsigned i; + unsigned num_sets = ctx->options->layout ? ctx->options->layout->num_sets : 0; + unsigned user_sgpr_idx; + bool need_push_constants; + + need_push_constants = true; + if (!ctx->options->layout) + need_push_constants = false; + else if (!ctx->options->layout->push_constant_size && + !ctx->options->layout->dynamic_offset_count) + need_push_constants = false; + + /* 1 for each descriptor set */ + for (unsigned i = 0; i < num_sets; ++i) { + if (ctx->options->layout->set[i].layout->shader_stages & (1 << ctx->stage)) { + array_params_mask |= (1 << arg_idx); + arg_types[arg_idx++] = const_array(ctx->i8, 1024 * 1024); + } + } + + if (need_push_constants) { + /* 1 for push constants and dynamic descriptors */ + array_params_mask |= (1 << arg_idx); + arg_types[arg_idx++] = const_array(ctx->i8, 1024 * 1024); + } + + switch (ctx->stage) { + case MESA_SHADER_COMPUTE: + arg_types[arg_idx++] = LLVMVectorType(ctx->i32, 3); /* grid size */ + user_sgpr_count = arg_idx; + arg_types[arg_idx++] = LLVMVectorType(ctx->i32, 3); + arg_types[arg_idx++] = ctx->i32; + sgpr_count = arg_idx; + + arg_types[arg_idx++] = LLVMVectorType(ctx->i32, 3); + break; + case MESA_SHADER_VERTEX: + arg_types[arg_idx++] = const_array(ctx->v16i8, 16); /* vertex buffers */ + arg_types[arg_idx++] = ctx->i32; // base vertex + arg_types[arg_idx++] = ctx->i32; // start instance + user_sgpr_count = sgpr_count = arg_idx; + arg_types[arg_idx++] = ctx->i32; // vertex id + arg_types[arg_idx++] = ctx->i32; // rel auto id + arg_types[arg_idx++] = ctx->i32; // vs prim id + arg_types[arg_idx++] = ctx->i32; // instance id + break; + case MESA_SHADER_FRAGMENT: + arg_types[arg_idx++] = const_array(ctx->f32, 32); /* sample positions */ + user_sgpr_count = arg_idx; + arg_types[arg_idx++] = ctx->i32; /* prim mask */ + sgpr_count = arg_idx; + arg_types[arg_idx++] = ctx->v2i32; /* persp sample */ + arg_types[arg_idx++] = ctx->v2i32; /* persp center */ + arg_types[arg_idx++] = ctx->v2i32; /* persp centroid */ + arg_types[arg_idx++] = ctx->v3i32; /* persp pull model */ + arg_types[arg_idx++] = ctx->v2i32; /* linear sample */ + arg_types[arg_idx++] = ctx->v2i32; /* linear center */ + arg_types[arg_idx++] = ctx->v2i32; /* linear centroid */ + arg_types[arg_idx++] = ctx->f32; /* line stipple tex */ + arg_types[arg_idx++] = ctx->f32; /* pos x float */ + arg_types[arg_idx++] = ctx->f32; /* pos y float */ + arg_types[arg_idx++] = ctx->f32; /* pos z float */ + arg_types[arg_idx++] = ctx->f32; /* pos w float */ + arg_types[arg_idx++] = ctx->i32; /* front face */ + arg_types[arg_idx++] = ctx->i32; /* ancillary */ + arg_types[arg_idx++] = ctx->f32; /* sample coverage */ + arg_types[arg_idx++] = ctx->i32; /* fixed pt */ + break; + default: + unreachable("Shader stage not implemented"); + } + + ctx->main_function = create_llvm_function( + ctx->context, ctx->module, ctx->builder, NULL, 0, arg_types, + arg_idx, array_params_mask, sgpr_count, ctx->options->unsafe_math); + set_llvm_calling_convention(ctx->main_function, ctx->stage); + + + ctx->shader_info->num_input_sgprs = 0; + ctx->shader_info->num_input_vgprs = 0; + + for (i = 0; i < user_sgpr_count; i++) + ctx->shader_info->num_user_sgprs += llvm_get_type_size(arg_types[i]) / 4; + + ctx->shader_info->num_input_sgprs = ctx->shader_info->num_user_sgprs; + for (; i < sgpr_count; i++) + ctx->shader_info->num_input_sgprs += llvm_get_type_size(arg_types[i]) / 4; + + if (ctx->stage != MESA_SHADER_FRAGMENT) + for (; i < arg_idx; ++i) + ctx->shader_info->num_input_vgprs += llvm_get_type_size(arg_types[i]) / 4; + + arg_idx = 0; + user_sgpr_idx = 0; + for (unsigned i = 0; i < num_sets; ++i) { + if (ctx->options->layout->set[i].layout->shader_stages & (1 << ctx->stage)) { + set_userdata_location(&ctx->shader_info->user_sgprs_locs.descriptor_sets[i], user_sgpr_idx, 2); + user_sgpr_idx += 2; + ctx->descriptor_sets[i] = + LLVMGetParam(ctx->main_function, arg_idx++); + } else + ctx->descriptor_sets[i] = NULL; + } + + if (need_push_constants) { + ctx->push_constants = LLVMGetParam(ctx->main_function, arg_idx++); + set_userdata_location_shader(ctx, AC_UD_PUSH_CONSTANTS, user_sgpr_idx, 2); + user_sgpr_idx += 2; + } + + switch (ctx->stage) { + case MESA_SHADER_COMPUTE: + set_userdata_location_shader(ctx, AC_UD_CS_GRID_SIZE, user_sgpr_idx, 3); + user_sgpr_idx += 3; + ctx->num_work_groups = + LLVMGetParam(ctx->main_function, arg_idx++); + ctx->workgroup_ids = + LLVMGetParam(ctx->main_function, arg_idx++); + ctx->tg_size = + LLVMGetParam(ctx->main_function, arg_idx++); + ctx->local_invocation_ids = + LLVMGetParam(ctx->main_function, arg_idx++); + break; + case MESA_SHADER_VERTEX: + set_userdata_location_shader(ctx, AC_UD_VS_VERTEX_BUFFERS, user_sgpr_idx, 2); + user_sgpr_idx += 2; + ctx->vertex_buffers = LLVMGetParam(ctx->main_function, arg_idx++); + set_userdata_location_shader(ctx, AC_UD_VS_BASE_VERTEX_START_INSTANCE, user_sgpr_idx, 2); + user_sgpr_idx += 2; + ctx->base_vertex = LLVMGetParam(ctx->main_function, arg_idx++); + ctx->start_instance = LLVMGetParam(ctx->main_function, arg_idx++); + ctx->vertex_id = LLVMGetParam(ctx->main_function, arg_idx++); + ctx->rel_auto_id = LLVMGetParam(ctx->main_function, arg_idx++); + ctx->vs_prim_id = LLVMGetParam(ctx->main_function, arg_idx++); + ctx->instance_id = LLVMGetParam(ctx->main_function, arg_idx++); + break; + case MESA_SHADER_FRAGMENT: + set_userdata_location_shader(ctx, AC_UD_PS_SAMPLE_POS, user_sgpr_idx, 2); + user_sgpr_idx += 2; + ctx->sample_positions = LLVMGetParam(ctx->main_function, arg_idx++); + ctx->prim_mask = LLVMGetParam(ctx->main_function, arg_idx++); + ctx->persp_sample = LLVMGetParam(ctx->main_function, arg_idx++); + ctx->persp_center = LLVMGetParam(ctx->main_function, arg_idx++); + ctx->persp_centroid = LLVMGetParam(ctx->main_function, arg_idx++); + arg_idx++; + ctx->linear_sample = LLVMGetParam(ctx->main_function, arg_idx++); + ctx->linear_center = LLVMGetParam(ctx->main_function, arg_idx++); + ctx->linear_centroid = LLVMGetParam(ctx->main_function, arg_idx++); + arg_idx++; /* line stipple */ + ctx->frag_pos[0] = LLVMGetParam(ctx->main_function, arg_idx++); + ctx->frag_pos[1] = LLVMGetParam(ctx->main_function, arg_idx++); + ctx->frag_pos[2] = LLVMGetParam(ctx->main_function, arg_idx++); + ctx->frag_pos[3] = LLVMGetParam(ctx->main_function, arg_idx++); + ctx->front_face = LLVMGetParam(ctx->main_function, arg_idx++); + ctx->ancillary = LLVMGetParam(ctx->main_function, arg_idx++); + break; + default: + unreachable("Shader stage not implemented"); + } +} + +static void setup_types(struct nir_to_llvm_context *ctx) +{ + LLVMValueRef args[4]; + + ctx->voidt = LLVMVoidTypeInContext(ctx->context); + ctx->i1 = LLVMIntTypeInContext(ctx->context, 1); + ctx->i8 = LLVMIntTypeInContext(ctx->context, 8); + ctx->i16 = LLVMIntTypeInContext(ctx->context, 16); + ctx->i32 = LLVMIntTypeInContext(ctx->context, 32); + ctx->i64 = LLVMIntTypeInContext(ctx->context, 64); + ctx->v2i32 = LLVMVectorType(ctx->i32, 2); + ctx->v3i32 = LLVMVectorType(ctx->i32, 3); + ctx->v4i32 = LLVMVectorType(ctx->i32, 4); + ctx->v8i32 = LLVMVectorType(ctx->i32, 8); + ctx->f32 = LLVMFloatTypeInContext(ctx->context); + ctx->f16 = LLVMHalfTypeInContext(ctx->context); + ctx->v2f32 = LLVMVectorType(ctx->f32, 2); + ctx->v4f32 = LLVMVectorType(ctx->f32, 4); + ctx->v16i8 = LLVMVectorType(ctx->i8, 16); + + ctx->i32zero = LLVMConstInt(ctx->i32, 0, false); + ctx->i32one = LLVMConstInt(ctx->i32, 1, false); + ctx->f32zero = LLVMConstReal(ctx->f32, 0.0); + ctx->f32one = LLVMConstReal(ctx->f32, 1.0); + + args[0] = ctx->f32zero; + args[1] = ctx->f32zero; + args[2] = ctx->f32zero; + args[3] = ctx->f32one; + ctx->v4f32empty = LLVMConstVector(args, 4); + + ctx->range_md_kind = LLVMGetMDKindIDInContext(ctx->context, + "range", 5); + ctx->invariant_load_md_kind = LLVMGetMDKindIDInContext(ctx->context, + "invariant.load", 14); + ctx->uniform_md_kind = + LLVMGetMDKindIDInContext(ctx->context, "amdgpu.uniform", 14); + ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0); + + args[0] = LLVMConstReal(ctx->f32, 2.5); +} + +static int get_llvm_num_components(LLVMValueRef value) +{ + LLVMTypeRef type = LLVMTypeOf(value); + unsigned num_components = LLVMGetTypeKind(type) == LLVMVectorTypeKind + ? LLVMGetVectorSize(type) + : 1; + return num_components; +} + +static LLVMValueRef llvm_extract_elem(struct nir_to_llvm_context *ctx, + LLVMValueRef value, + int index) +{ + int count = get_llvm_num_components(value); + + assert(index < count); + if (count == 1) + return value; + + return LLVMBuildExtractElement(ctx->builder, value, + LLVMConstInt(ctx->i32, index, false), ""); +} + +static LLVMValueRef trim_vector(struct nir_to_llvm_context *ctx, + LLVMValueRef value, unsigned count) +{ + unsigned num_components = get_llvm_num_components(value); + if (count == num_components) + return value; + + LLVMValueRef masks[] = { + LLVMConstInt(ctx->i32, 0, false), LLVMConstInt(ctx->i32, 1, false), + LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false)}; + + if (count == 1) + return LLVMBuildExtractElement(ctx->builder, value, masks[0], + ""); + + LLVMValueRef swizzle = LLVMConstVector(masks, count); + return LLVMBuildShuffleVector(ctx->builder, value, value, swizzle, ""); +} + +static void +build_store_values_extended(struct nir_to_llvm_context *ctx, + LLVMValueRef *values, + unsigned value_count, + unsigned value_stride, + LLVMValueRef vec) +{ + LLVMBuilderRef builder = ctx->builder; + unsigned i; + + if (value_count == 1) { + LLVMBuildStore(builder, vec, values[0]); + return; + } + + for (i = 0; i < value_count; i++) { + LLVMValueRef ptr = values[i * value_stride]; + LLVMValueRef index = LLVMConstInt(ctx->i32, i, false); + LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, ""); + LLVMBuildStore(builder, value, ptr); + } +} + +static LLVMTypeRef get_def_type(struct nir_to_llvm_context *ctx, + nir_ssa_def *def) +{ + LLVMTypeRef type = LLVMIntTypeInContext(ctx->context, def->bit_size); + if (def->num_components > 1) { + type = LLVMVectorType(type, def->num_components); + } + return type; +} + +static LLVMValueRef get_src(struct nir_to_llvm_context *ctx, nir_src src) +{ + assert(src.is_ssa); + struct hash_entry *entry = _mesa_hash_table_search(ctx->defs, src.ssa); + return (LLVMValueRef)entry->data; +} + + +static LLVMBasicBlockRef get_block(struct nir_to_llvm_context *ctx, + struct nir_block *b) +{ + struct hash_entry *entry = _mesa_hash_table_search(ctx->defs, b); + return (LLVMBasicBlockRef)entry->data; +} + +static LLVMValueRef get_alu_src(struct nir_to_llvm_context *ctx, + nir_alu_src src, + unsigned num_components) +{ + LLVMValueRef value = get_src(ctx, src.src); + bool need_swizzle = false; + + assert(value); + LLVMTypeRef type = LLVMTypeOf(value); + unsigned src_components = LLVMGetTypeKind(type) == LLVMVectorTypeKind + ? LLVMGetVectorSize(type) + : 1; + + for (unsigned i = 0; i < num_components; ++i) { + assert(src.swizzle[i] < src_components); + if (src.swizzle[i] != i) + need_swizzle = true; + } + + if (need_swizzle || num_components != src_components) { + LLVMValueRef masks[] = { + LLVMConstInt(ctx->i32, src.swizzle[0], false), + LLVMConstInt(ctx->i32, src.swizzle[1], false), + LLVMConstInt(ctx->i32, src.swizzle[2], false), + LLVMConstInt(ctx->i32, src.swizzle[3], false)}; + + if (src_components > 1 && num_components == 1) { + value = LLVMBuildExtractElement(ctx->builder, value, + masks[0], ""); + } else if (src_components == 1 && num_components > 1) { + LLVMValueRef values[] = {value, value, value, value}; + value = ac_build_gather_values(&ctx->ac, values, num_components); + } else { + LLVMValueRef swizzle = LLVMConstVector(masks, num_components); + value = LLVMBuildShuffleVector(ctx->builder, value, value, + swizzle, ""); + } + } + assert(!src.negate); + assert(!src.abs); + return value; +} + +static LLVMValueRef emit_int_cmp(struct nir_to_llvm_context *ctx, + LLVMIntPredicate pred, LLVMValueRef src0, + LLVMValueRef src1) +{ + LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, ""); + return LLVMBuildSelect(ctx->builder, result, + LLVMConstInt(ctx->i32, 0xFFFFFFFF, false), + LLVMConstInt(ctx->i32, 0, false), ""); +} + +static LLVMValueRef emit_float_cmp(struct nir_to_llvm_context *ctx, + LLVMRealPredicate pred, LLVMValueRef src0, + LLVMValueRef src1) +{ + LLVMValueRef result; + src0 = to_float(ctx, src0); + src1 = to_float(ctx, src1); + result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, ""); + return LLVMBuildSelect(ctx->builder, result, + LLVMConstInt(ctx->i32, 0xFFFFFFFF, false), + LLVMConstInt(ctx->i32, 0, false), ""); +} + +static LLVMValueRef emit_intrin_1f_param(struct nir_to_llvm_context *ctx, + const char *intrin, + LLVMValueRef src0) +{ + LLVMValueRef params[] = { + to_float(ctx, src0), + }; + return ac_emit_llvm_intrinsic(&ctx->ac, intrin, ctx->f32, params, 1, AC_FUNC_ATTR_READNONE); +} + +static LLVMValueRef emit_intrin_2f_param(struct nir_to_llvm_context *ctx, + const char *intrin, + LLVMValueRef src0, LLVMValueRef src1) +{ + LLVMValueRef params[] = { + to_float(ctx, src0), + to_float(ctx, src1), + }; + return ac_emit_llvm_intrinsic(&ctx->ac, intrin, ctx->f32, params, 2, AC_FUNC_ATTR_READNONE); +} + +static LLVMValueRef emit_intrin_3f_param(struct nir_to_llvm_context *ctx, + const char *intrin, + LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2) +{ + LLVMValueRef params[] = { + to_float(ctx, src0), + to_float(ctx, src1), + to_float(ctx, src2), + }; + return ac_emit_llvm_intrinsic(&ctx->ac, intrin, ctx->f32, params, 3, AC_FUNC_ATTR_READNONE); +} + +static LLVMValueRef emit_bcsel(struct nir_to_llvm_context *ctx, + LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2) +{ + LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, + ctx->i32zero, ""); + return LLVMBuildSelect(ctx->builder, v, src1, src2, ""); +} + +static LLVMValueRef emit_find_lsb(struct nir_to_llvm_context *ctx, + LLVMValueRef src0) +{ + LLVMValueRef params[2] = { + src0, + + /* The value of 1 means that ffs(x=0) = undef, so LLVM won't + * add special code to check for x=0. The reason is that + * the LLVM behavior for x=0 is different from what we + * need here. + * + * The hardware already implements the correct behavior. + */ + LLVMConstInt(ctx->i32, 1, false), + }; + return ac_emit_llvm_intrinsic(&ctx->ac, "llvm.cttz.i32", ctx->i32, params, 2, AC_FUNC_ATTR_READNONE); +} + +static LLVMValueRef emit_ifind_msb(struct nir_to_llvm_context *ctx, + LLVMValueRef src0) +{ + LLVMValueRef msb = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.AMDGPU.flbit.i32", + ctx->i32, &src0, 1, + AC_FUNC_ATTR_READNONE); + + /* The HW returns the last bit index from MSB, but NIR wants + * the index from LSB. Invert it by doing "31 - msb". */ + msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false), + msb, ""); + + LLVMValueRef all_ones = LLVMConstInt(ctx->i32, -1, true); + LLVMValueRef cond = LLVMBuildOr(ctx->builder, + LLVMBuildICmp(ctx->builder, LLVMIntEQ, + src0, ctx->i32zero, ""), + LLVMBuildICmp(ctx->builder, LLVMIntEQ, + src0, all_ones, ""), ""); + + return LLVMBuildSelect(ctx->builder, cond, all_ones, msb, ""); +} + +static LLVMValueRef emit_ufind_msb(struct nir_to_llvm_context *ctx, + LLVMValueRef src0) +{ + LLVMValueRef args[2] = { + src0, + ctx->i32one, + }; + LLVMValueRef msb = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.ctlz.i32", + ctx->i32, args, ARRAY_SIZE(args), + AC_FUNC_ATTR_READNONE); + + /* The HW returns the last bit index from MSB, but NIR wants + * the index from LSB. Invert it by doing "31 - msb". */ + msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false), + msb, ""); + + return LLVMBuildSelect(ctx->builder, + LLVMBuildICmp(ctx->builder, LLVMIntEQ, src0, + ctx->i32zero, ""), + LLVMConstInt(ctx->i32, -1, true), msb, ""); +} + +static LLVMValueRef emit_minmax_int(struct nir_to_llvm_context *ctx, + LLVMIntPredicate pred, + LLVMValueRef src0, LLVMValueRef src1) +{ + return LLVMBuildSelect(ctx->builder, + LLVMBuildICmp(ctx->builder, pred, src0, src1, ""), + src0, + src1, ""); + +} +static LLVMValueRef emit_iabs(struct nir_to_llvm_context *ctx, + LLVMValueRef src0) +{ + return emit_minmax_int(ctx, LLVMIntSGT, src0, + LLVMBuildNeg(ctx->builder, src0, "")); +} + +static LLVMValueRef emit_fsign(struct nir_to_llvm_context *ctx, + LLVMValueRef src0) +{ + LLVMValueRef cmp, val; + + cmp = LLVMBuildFCmp(ctx->builder, LLVMRealOGT, src0, ctx->f32zero, ""); + val = LLVMBuildSelect(ctx->builder, cmp, ctx->f32one, src0, ""); + cmp = LLVMBuildFCmp(ctx->builder, LLVMRealOGE, val, ctx->f32zero, ""); + val = LLVMBuildSelect(ctx->builder, cmp, val, LLVMConstReal(ctx->f32, -1.0), ""); + return val; +} + +static LLVMValueRef emit_isign(struct nir_to_llvm_context *ctx, + LLVMValueRef src0) +{ + LLVMValueRef cmp, val; + + cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGT, src0, ctx->i32zero, ""); + val = LLVMBuildSelect(ctx->builder, cmp, ctx->i32one, src0, ""); + cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGE, val, ctx->i32zero, ""); + val = LLVMBuildSelect(ctx->builder, cmp, val, LLVMConstInt(ctx->i32, -1, true), ""); + return val; +} + +static LLVMValueRef emit_ffract(struct nir_to_llvm_context *ctx, + LLVMValueRef src0) +{ + const char *intr = "llvm.floor.f32"; + LLVMValueRef fsrc0 = to_float(ctx, src0); + LLVMValueRef params[] = { + fsrc0, + }; + LLVMValueRef floor = ac_emit_llvm_intrinsic(&ctx->ac, intr, + ctx->f32, params, 1, + AC_FUNC_ATTR_READNONE); + return LLVMBuildFSub(ctx->builder, fsrc0, floor, ""); +} + +static LLVMValueRef emit_uint_carry(struct nir_to_llvm_context *ctx, + const char *intrin, + LLVMValueRef src0, LLVMValueRef src1) +{ + LLVMTypeRef ret_type; + LLVMTypeRef types[] = { ctx->i32, ctx->i1 }; + LLVMValueRef res; + LLVMValueRef params[] = { src0, src1 }; + ret_type = LLVMStructTypeInContext(ctx->context, types, + 2, true); + + res = ac_emit_llvm_intrinsic(&ctx->ac, intrin, ret_type, + params, 2, AC_FUNC_ATTR_READNONE); + + res = LLVMBuildExtractValue(ctx->builder, res, 1, ""); + res = LLVMBuildZExt(ctx->builder, res, ctx->i32, ""); + return res; +} + +static LLVMValueRef emit_b2f(struct nir_to_llvm_context *ctx, + LLVMValueRef src0) +{ + return LLVMBuildAnd(ctx->builder, src0, LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""), ""); +} + +static LLVMValueRef emit_umul_high(struct nir_to_llvm_context *ctx, + LLVMValueRef src0, LLVMValueRef src1) +{ + LLVMValueRef dst64, result; + src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, ""); + src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, ""); + + dst64 = LLVMBuildMul(ctx->builder, src0, src1, ""); + dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), ""); + result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, ""); + return result; +} + +static LLVMValueRef emit_imul_high(struct nir_to_llvm_context *ctx, + LLVMValueRef src0, LLVMValueRef src1) +{ + LLVMValueRef dst64, result; + src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, ""); + src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, ""); + + dst64 = LLVMBuildMul(ctx->builder, src0, src1, ""); + dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), ""); + result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, ""); + return result; +} + +static LLVMValueRef emit_bitfield_extract(struct nir_to_llvm_context *ctx, + const char *intrin, + LLVMValueRef srcs[3]) +{ + LLVMValueRef result; + LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], LLVMConstInt(ctx->i32, 32, false), ""); + result = ac_emit_llvm_intrinsic(&ctx->ac, intrin, ctx->i32, srcs, 3, AC_FUNC_ATTR_READNONE); + + result = LLVMBuildSelect(ctx->builder, icond, srcs[0], result, ""); + return result; +} + +static LLVMValueRef emit_bitfield_insert(struct nir_to_llvm_context *ctx, + LLVMValueRef src0, LLVMValueRef src1, + LLVMValueRef src2, LLVMValueRef src3) +{ + LLVMValueRef bfi_args[3], result; + + bfi_args[0] = LLVMBuildShl(ctx->builder, + LLVMBuildSub(ctx->builder, + LLVMBuildShl(ctx->builder, + ctx->i32one, + src3, ""), + ctx->i32one, ""), + src2, ""); + bfi_args[1] = LLVMBuildShl(ctx->builder, src1, src2, ""); + bfi_args[2] = src0; + + LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, src3, LLVMConstInt(ctx->i32, 32, false), ""); + + /* Calculate: + * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2) + * Use the right-hand side, which the LLVM backend can convert to V_BFI. + */ + result = LLVMBuildXor(ctx->builder, bfi_args[2], + LLVMBuildAnd(ctx->builder, bfi_args[0], + LLVMBuildXor(ctx->builder, bfi_args[1], bfi_args[2], ""), ""), ""); + + result = LLVMBuildSelect(ctx->builder, icond, src1, result, ""); + return result; +} + +static LLVMValueRef emit_pack_half_2x16(struct nir_to_llvm_context *ctx, + LLVMValueRef src0) +{ + LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false); + int i; + LLVMValueRef comp[2]; + + src0 = to_float(ctx, src0); + comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32zero, ""); + comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32one, ""); + for (i = 0; i < 2; i++) { + comp[i] = LLVMBuildFPTrunc(ctx->builder, comp[i], ctx->f16, ""); + comp[i] = LLVMBuildBitCast(ctx->builder, comp[i], ctx->i16, ""); + comp[i] = LLVMBuildZExt(ctx->builder, comp[i], ctx->i32, ""); + } + + comp[1] = LLVMBuildShl(ctx->builder, comp[1], const16, ""); + comp[0] = LLVMBuildOr(ctx->builder, comp[0], comp[1], ""); + + return comp[0]; +} + +static LLVMValueRef emit_unpack_half_2x16(struct nir_to_llvm_context *ctx, + LLVMValueRef src0) +{ + LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false); + LLVMValueRef temps[2], result, val; + int i; + + for (i = 0; i < 2; i++) { + val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0; + val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, ""); + val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, ""); + temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, ""); + } + + result = LLVMBuildInsertElement(ctx->builder, LLVMGetUndef(ctx->v2f32), temps[0], + ctx->i32zero, ""); + result = LLVMBuildInsertElement(ctx->builder, result, temps[1], + ctx->i32one, ""); + return result; +} + +/** + * Set range metadata on an instruction. This can only be used on load and + * call instructions. If you know an instruction can only produce the values + * 0, 1, 2, you would do set_range_metadata(value, 0, 3); + * \p lo is the minimum value inclusive. + * \p hi is the maximum value exclusive. + */ +static void set_range_metadata(struct nir_to_llvm_context *ctx, + LLVMValueRef value, unsigned lo, unsigned hi) +{ + LLVMValueRef range_md, md_args[2]; + LLVMTypeRef type = LLVMTypeOf(value); + LLVMContextRef context = LLVMGetTypeContext(type); + + md_args[0] = LLVMConstInt(type, lo, false); + md_args[1] = LLVMConstInt(type, hi, false); + range_md = LLVMMDNodeInContext(context, md_args, 2); + LLVMSetMetadata(value, ctx->range_md_kind, range_md); +} + +static LLVMValueRef get_thread_id(struct nir_to_llvm_context *ctx) +{ + LLVMValueRef tid; + LLVMValueRef tid_args[2]; + tid_args[0] = LLVMConstInt(ctx->i32, 0xffffffff, false); + tid_args[1] = ctx->i32zero; + tid_args[1] = ac_emit_llvm_intrinsic(&ctx->ac, + "llvm.amdgcn.mbcnt.lo", ctx->i32, + tid_args, 2, AC_FUNC_ATTR_READNONE); + + tid = ac_emit_llvm_intrinsic(&ctx->ac, + "llvm.amdgcn.mbcnt.hi", ctx->i32, + tid_args, 2, AC_FUNC_ATTR_READNONE); + set_range_metadata(ctx, tid, 0, 64); + return tid; +} + +/* + * SI implements derivatives using the local data store (LDS) + * All writes to the LDS happen in all executing threads at + * the same time. TID is the Thread ID for the current + * thread and is a value between 0 and 63, representing + * the thread's position in the wavefront. + * + * For the pixel shader threads are grouped into quads of four pixels. + * The TIDs of the pixels of a quad are: + * + * +------+------+ + * |4n + 0|4n + 1| + * +------+------+ + * |4n + 2|4n + 3| + * +------+------+ + * + * So, masking the TID with 0xfffffffc yields the TID of the top left pixel + * of the quad, masking with 0xfffffffd yields the TID of the top pixel of + * the current pixel's column, and masking with 0xfffffffe yields the TID + * of the left pixel of the current pixel's row. + * + * Adding 1 yields the TID of the pixel to the right of the left pixel, and + * adding 2 yields the TID of the pixel below the top pixel. + */ +/* masks for thread ID. */ +#define TID_MASK_TOP_LEFT 0xfffffffc +#define TID_MASK_TOP 0xfffffffd +#define TID_MASK_LEFT 0xfffffffe +static LLVMValueRef emit_ddxy(struct nir_to_llvm_context *ctx, + nir_op op, + LLVMValueRef src0) +{ + LLVMValueRef tl, trbl, result; + LLVMValueRef tl_tid, trbl_tid; + LLVMValueRef args[2]; + LLVMValueRef thread_id; + unsigned mask; + int idx; + ctx->has_ddxy = true; + + if (!ctx->lds && !ctx->has_ds_bpermute) + ctx->lds = LLVMAddGlobalInAddressSpace(ctx->module, + LLVMArrayType(ctx->i32, 64), + "ddxy_lds", LOCAL_ADDR_SPACE); + + thread_id = get_thread_id(ctx); + if (op == nir_op_fddx_fine || op == nir_op_fddx) + mask = TID_MASK_LEFT; + else if (op == nir_op_fddy_fine || op == nir_op_fddy) + mask = TID_MASK_TOP; + else + mask = TID_MASK_TOP_LEFT; + + tl_tid = LLVMBuildAnd(ctx->builder, thread_id, + LLVMConstInt(ctx->i32, mask, false), ""); + /* for DDX we want to next X pixel, DDY next Y pixel. */ + if (op == nir_op_fddx_fine || + op == nir_op_fddx_coarse || + op == nir_op_fddx) + idx = 1; + else + idx = 2; + + trbl_tid = LLVMBuildAdd(ctx->builder, tl_tid, + LLVMConstInt(ctx->i32, idx, false), ""); + + if (ctx->has_ds_bpermute) { + args[0] = LLVMBuildMul(ctx->builder, tl_tid, + LLVMConstInt(ctx->i32, 4, false), ""); + args[1] = src0; + tl = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.amdgcn.ds.bpermute", + ctx->i32, args, 2, + AC_FUNC_ATTR_READNONE); + + args[0] = LLVMBuildMul(ctx->builder, trbl_tid, + LLVMConstInt(ctx->i32, 4, false), ""); + trbl = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.amdgcn.ds.bpermute", + ctx->i32, args, 2, + AC_FUNC_ATTR_READNONE); + } else { + LLVMValueRef store_ptr, load_ptr0, load_ptr1; + + store_ptr = build_gep0(ctx, ctx->lds, thread_id); + load_ptr0 = build_gep0(ctx, ctx->lds, tl_tid); + load_ptr1 = build_gep0(ctx, ctx->lds, trbl_tid); + + LLVMBuildStore(ctx->builder, src0, store_ptr); + tl = LLVMBuildLoad(ctx->builder, load_ptr0, ""); + trbl = LLVMBuildLoad(ctx->builder, load_ptr1, ""); + } + tl = LLVMBuildBitCast(ctx->builder, tl, ctx->f32, ""); + trbl = LLVMBuildBitCast(ctx->builder, trbl, ctx->f32, ""); + result = LLVMBuildFSub(ctx->builder, trbl, tl, ""); + return result; +} + +/* + * this takes an I,J coordinate pair, + * and works out the X and Y derivatives. + * it returns DDX(I), DDX(J), DDY(I), DDY(J). + */ +static LLVMValueRef emit_ddxy_interp( + struct nir_to_llvm_context *ctx, + LLVMValueRef interp_ij) +{ + LLVMValueRef result[4], a; + unsigned i; + + for (i = 0; i < 2; i++) { + a = LLVMBuildExtractElement(ctx->builder, interp_ij, + LLVMConstInt(ctx->i32, i, false), ""); + result[i] = emit_ddxy(ctx, nir_op_fddx, a); + result[2+i] = emit_ddxy(ctx, nir_op_fddy, a); + } + return ac_build_gather_values(&ctx->ac, result, 4); +} + +static void visit_alu(struct nir_to_llvm_context *ctx, nir_alu_instr *instr) +{ + LLVMValueRef src[4], result = NULL; + unsigned num_components = instr->dest.dest.ssa.num_components; + unsigned src_components; + + assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src)); + switch (instr->op) { + case nir_op_vec2: + case nir_op_vec3: + case nir_op_vec4: + src_components = 1; + break; + case nir_op_pack_half_2x16: + src_components = 2; + break; + case nir_op_unpack_half_2x16: + src_components = 1; + break; + default: + src_components = num_components; + break; + } + for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) + src[i] = get_alu_src(ctx, instr->src[i], src_components); + + switch (instr->op) { + case nir_op_fmov: + case nir_op_imov: + result = src[0]; + break; + case nir_op_fneg: + src[0] = to_float(ctx, src[0]); + result = LLVMBuildFNeg(ctx->builder, src[0], ""); + break; + case nir_op_ineg: + result = LLVMBuildNeg(ctx->builder, src[0], ""); + break; + case nir_op_inot: + result = LLVMBuildNot(ctx->builder, src[0], ""); + break; + case nir_op_iadd: + result = LLVMBuildAdd(ctx->builder, src[0], src[1], ""); + break; + case nir_op_fadd: + src[0] = to_float(ctx, src[0]); + src[1] = to_float(ctx, src[1]); + result = LLVMBuildFAdd(ctx->builder, src[0], src[1], ""); + break; + case nir_op_fsub: + src[0] = to_float(ctx, src[0]); + src[1] = to_float(ctx, src[1]); + result = LLVMBuildFSub(ctx->builder, src[0], src[1], ""); + break; + case nir_op_isub: + result = LLVMBuildSub(ctx->builder, src[0], src[1], ""); + break; + case nir_op_imul: + result = LLVMBuildMul(ctx->builder, src[0], src[1], ""); + break; + case nir_op_imod: + result = LLVMBuildSRem(ctx->builder, src[0], src[1], ""); + break; + case nir_op_umod: + result = LLVMBuildURem(ctx->builder, src[0], src[1], ""); + break; + case nir_op_fmod: + src[0] = to_float(ctx, src[0]); + src[1] = to_float(ctx, src[1]); + result = ac_emit_fdiv(&ctx->ac, src[0], src[1]); + result = emit_intrin_1f_param(ctx, "llvm.floor.f32", result); + result = LLVMBuildFMul(ctx->builder, src[1] , result, ""); + result = LLVMBuildFSub(ctx->builder, src[0], result, ""); + break; + case nir_op_frem: + src[0] = to_float(ctx, src[0]); + src[1] = to_float(ctx, src[1]); + result = LLVMBuildFRem(ctx->builder, src[0], src[1], ""); + break; + case nir_op_irem: + result = LLVMBuildSRem(ctx->builder, src[0], src[1], ""); + break; + case nir_op_idiv: + result = LLVMBuildSDiv(ctx->builder, src[0], src[1], ""); + break; + case nir_op_udiv: + result = LLVMBuildUDiv(ctx->builder, src[0], src[1], ""); + break; + case nir_op_fmul: + src[0] = to_float(ctx, src[0]); + src[1] = to_float(ctx, src[1]); + result = LLVMBuildFMul(ctx->builder, src[0], src[1], ""); + break; + case nir_op_fdiv: + src[0] = to_float(ctx, src[0]); + src[1] = to_float(ctx, src[1]); + result = ac_emit_fdiv(&ctx->ac, src[0], src[1]); + break; + case nir_op_frcp: + src[0] = to_float(ctx, src[0]); + result = ac_emit_fdiv(&ctx->ac, ctx->f32one, src[0]); + break; + case nir_op_iand: + result = LLVMBuildAnd(ctx->builder, src[0], src[1], ""); + break; + case nir_op_ior: + result = LLVMBuildOr(ctx->builder, src[0], src[1], ""); + break; + case nir_op_ixor: + result = LLVMBuildXor(ctx->builder, src[0], src[1], ""); + break; + case nir_op_ishl: + result = LLVMBuildShl(ctx->builder, src[0], src[1], ""); + break; + case nir_op_ishr: + result = LLVMBuildAShr(ctx->builder, src[0], src[1], ""); + break; + case nir_op_ushr: + result = LLVMBuildLShr(ctx->builder, src[0], src[1], ""); + break; + case nir_op_ilt: + result = emit_int_cmp(ctx, LLVMIntSLT, src[0], src[1]); + break; + case nir_op_ine: + result = emit_int_cmp(ctx, LLVMIntNE, src[0], src[1]); + break; + case nir_op_ieq: + result = emit_int_cmp(ctx, LLVMIntEQ, src[0], src[1]); + break; + case nir_op_ige: + result = emit_int_cmp(ctx, LLVMIntSGE, src[0], src[1]); + break; + case nir_op_ult: + result = emit_int_cmp(ctx, LLVMIntULT, src[0], src[1]); + break; + case nir_op_uge: + result = emit_int_cmp(ctx, LLVMIntUGE, src[0], src[1]); + break; + case nir_op_feq: + result = emit_float_cmp(ctx, LLVMRealUEQ, src[0], src[1]); + break; + case nir_op_fne: + result = emit_float_cmp(ctx, LLVMRealUNE, src[0], src[1]); + break; + case nir_op_flt: + result = emit_float_cmp(ctx, LLVMRealULT, src[0], src[1]); + break; + case nir_op_fge: + result = emit_float_cmp(ctx, LLVMRealUGE, src[0], src[1]); + break; + case nir_op_fabs: + result = emit_intrin_1f_param(ctx, "llvm.fabs.f32", src[0]); + break; + case nir_op_iabs: + result = emit_iabs(ctx, src[0]); + break; + case nir_op_imax: + result = emit_minmax_int(ctx, LLVMIntSGT, src[0], src[1]); + break; + case nir_op_imin: + result = emit_minmax_int(ctx, LLVMIntSLT, src[0], src[1]); + break; + case nir_op_umax: + result = emit_minmax_int(ctx, LLVMIntUGT, src[0], src[1]); + break; + case nir_op_umin: + result = emit_minmax_int(ctx, LLVMIntULT, src[0], src[1]); + break; + case nir_op_isign: + result = emit_isign(ctx, src[0]); + break; + case nir_op_fsign: + src[0] = to_float(ctx, src[0]); + result = emit_fsign(ctx, src[0]); + break; + case nir_op_ffloor: + result = emit_intrin_1f_param(ctx, "llvm.floor.f32", src[0]); + break; + case nir_op_ftrunc: + result = emit_intrin_1f_param(ctx, "llvm.trunc.f32", src[0]); + break; + case nir_op_fceil: + result = emit_intrin_1f_param(ctx, "llvm.ceil.f32", src[0]); + break; + case nir_op_fround_even: + result = emit_intrin_1f_param(ctx, "llvm.rint.f32", src[0]); + break; + case nir_op_ffract: + result = emit_ffract(ctx, src[0]); + break; + case nir_op_fsin: + result = emit_intrin_1f_param(ctx, "llvm.sin.f32", src[0]); + break; + case nir_op_fcos: + result = emit_intrin_1f_param(ctx, "llvm.cos.f32", src[0]); + break; + case nir_op_fsqrt: + result = emit_intrin_1f_param(ctx, "llvm.sqrt.f32", src[0]); + break; + case nir_op_fexp2: + result = emit_intrin_1f_param(ctx, "llvm.exp2.f32", src[0]); + break; + case nir_op_flog2: + result = emit_intrin_1f_param(ctx, "llvm.log2.f32", src[0]); + break; + case nir_op_frsq: + result = emit_intrin_1f_param(ctx, "llvm.sqrt.f32", src[0]); + result = ac_emit_fdiv(&ctx->ac, ctx->f32one, result); + break; + case nir_op_fpow: + result = emit_intrin_2f_param(ctx, "llvm.pow.f32", src[0], src[1]); + break; + case nir_op_fmax: + result = emit_intrin_2f_param(ctx, "llvm.maxnum.f32", src[0], src[1]); + break; + case nir_op_fmin: + result = emit_intrin_2f_param(ctx, "llvm.minnum.f32", src[0], src[1]); + break; + case nir_op_ffma: + result = emit_intrin_3f_param(ctx, "llvm.fma.f32", src[0], src[1], src[2]); + break; + case nir_op_ibitfield_extract: + result = emit_bitfield_extract(ctx, "llvm.AMDGPU.bfe.i32", src); + break; + case nir_op_ubitfield_extract: + result = emit_bitfield_extract(ctx, "llvm.AMDGPU.bfe.u32", src); + break; + case nir_op_bitfield_insert: + result = emit_bitfield_insert(ctx, src[0], src[1], src[2], src[3]); + break; + case nir_op_bitfield_reverse: + result = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.bitreverse.i32", ctx->i32, src, 1, AC_FUNC_ATTR_READNONE); + break; + case nir_op_bit_count: + result = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.ctpop.i32", ctx->i32, src, 1, AC_FUNC_ATTR_READNONE); + break; + case nir_op_vec2: + case nir_op_vec3: + case nir_op_vec4: + for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) + src[i] = to_integer(ctx, src[i]); + result = ac_build_gather_values(&ctx->ac, src, num_components); + break; + case nir_op_f2i: + src[0] = to_float(ctx, src[0]); + result = LLVMBuildFPToSI(ctx->builder, src[0], ctx->i32, ""); + break; + case nir_op_f2u: + src[0] = to_float(ctx, src[0]); + result = LLVMBuildFPToUI(ctx->builder, src[0], ctx->i32, ""); + break; + case nir_op_i2f: + result = LLVMBuildSIToFP(ctx->builder, src[0], ctx->f32, ""); + break; + case nir_op_u2f: + result = LLVMBuildUIToFP(ctx->builder, src[0], ctx->f32, ""); + break; + case nir_op_bcsel: + result = emit_bcsel(ctx, src[0], src[1], src[2]); + break; + case nir_op_find_lsb: + result = emit_find_lsb(ctx, src[0]); + break; + case nir_op_ufind_msb: + result = emit_ufind_msb(ctx, src[0]); + break; + case nir_op_ifind_msb: + result = emit_ifind_msb(ctx, src[0]); + break; + case nir_op_uadd_carry: + result = emit_uint_carry(ctx, "llvm.uadd.with.overflow.i32", src[0], src[1]); + break; + case nir_op_usub_borrow: + result = emit_uint_carry(ctx, "llvm.usub.with.overflow.i32", src[0], src[1]); + break; + case nir_op_b2f: + result = emit_b2f(ctx, src[0]); + break; + case nir_op_fquantize2f16: + src[0] = to_float(ctx, src[0]); + result = LLVMBuildFPTrunc(ctx->builder, src[0], ctx->f16, ""); + /* need to convert back up to f32 */ + result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, ""); + break; + case nir_op_umul_high: + result = emit_umul_high(ctx, src[0], src[1]); + break; + case nir_op_imul_high: + result = emit_imul_high(ctx, src[0], src[1]); + break; + case nir_op_pack_half_2x16: + result = emit_pack_half_2x16(ctx, src[0]); + break; + case nir_op_unpack_half_2x16: + result = emit_unpack_half_2x16(ctx, src[0]); + break; + case nir_op_fddx: + case nir_op_fddy: + case nir_op_fddx_fine: + case nir_op_fddy_fine: + case nir_op_fddx_coarse: + case nir_op_fddy_coarse: + result = emit_ddxy(ctx, instr->op, src[0]); + break; + default: + fprintf(stderr, "Unknown NIR alu instr: "); + nir_print_instr(&instr->instr, stderr); + fprintf(stderr, "\n"); + abort(); + } + + if (result) { + assert(instr->dest.dest.is_ssa); + result = to_integer(ctx, result); + _mesa_hash_table_insert(ctx->defs, &instr->dest.dest.ssa, + result); + } +} + +static void visit_load_const(struct nir_to_llvm_context *ctx, + nir_load_const_instr *instr) +{ + LLVMValueRef values[4], value = NULL; + LLVMTypeRef element_type = + LLVMIntTypeInContext(ctx->context, instr->def.bit_size); + + for (unsigned i = 0; i < instr->def.num_components; ++i) { + switch (instr->def.bit_size) { + case 32: + values[i] = LLVMConstInt(element_type, + instr->value.u32[i], false); + break; + case 64: + values[i] = LLVMConstInt(element_type, + instr->value.u64[i], false); + break; + default: + fprintf(stderr, + "unsupported nir load_const bit_size: %d\n", + instr->def.bit_size); + abort(); + } + } + if (instr->def.num_components > 1) { + value = LLVMConstVector(values, instr->def.num_components); + } else + value = values[0]; + + _mesa_hash_table_insert(ctx->defs, &instr->def, value); +} + +static LLVMValueRef cast_ptr(struct nir_to_llvm_context *ctx, LLVMValueRef ptr, + LLVMTypeRef type) +{ + int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr)); + return LLVMBuildBitCast(ctx->builder, ptr, + LLVMPointerType(type, addr_space), ""); +} + +static LLVMValueRef +get_buffer_size(struct nir_to_llvm_context *ctx, LLVMValueRef descriptor, bool in_elements) +{ + LLVMValueRef size = + LLVMBuildExtractElement(ctx->builder, descriptor, + LLVMConstInt(ctx->i32, 2, false), ""); + + /* VI only */ + if (ctx->options->chip_class >= VI && in_elements) { + /* On VI, the descriptor contains the size in bytes, + * but TXQ must return the size in elements. + * The stride is always non-zero for resources using TXQ. + */ + LLVMValueRef stride = + LLVMBuildExtractElement(ctx->builder, descriptor, + LLVMConstInt(ctx->i32, 1, false), ""); + stride = LLVMBuildLShr(ctx->builder, stride, + LLVMConstInt(ctx->i32, 16, false), ""); + stride = LLVMBuildAnd(ctx->builder, stride, + LLVMConstInt(ctx->i32, 0x3fff, false), ""); + + size = LLVMBuildUDiv(ctx->builder, size, stride, ""); + } + return size; +} + +/** + * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with + * intrinsic names). + */ +static void build_int_type_name( + LLVMTypeRef type, + char *buf, unsigned bufsize) +{ + assert(bufsize >= 6); + + if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) + snprintf(buf, bufsize, "v%ui32", + LLVMGetVectorSize(type)); + else + strcpy(buf, "i32"); +} + +static LLVMValueRef radv_lower_gather4_integer(struct nir_to_llvm_context *ctx, + struct ac_tex_info *tinfo, + nir_tex_instr *instr, + const char *intr_name, + unsigned coord_vgpr_index) +{ + LLVMValueRef coord = tinfo->args[0]; + LLVMValueRef half_texel[2]; + int c; + + //TODO Rect + { + LLVMValueRef txq_args[10]; + int txq_arg_count = 0; + LLVMValueRef size; + bool da = instr->is_array || instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE; + txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, false); + txq_args[txq_arg_count++] = tinfo->args[1]; + txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0xf, 0); /* dmask */ + txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* unorm */ + txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* r128 */ + txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, da ? 1 : 0, 0); + txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* glc */ + txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* slc */ + txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* tfe */ + txq_args[txq_arg_count++] = LLVMConstInt(ctx->i32, 0, 0); /* lwe */ + size = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.SI.getresinfo.i32", ctx->v4i32, + txq_args, txq_arg_count, + AC_FUNC_ATTR_READNONE); + + for (c = 0; c < 2; c++) { + half_texel[c] = LLVMBuildExtractElement(ctx->builder, size, + LLVMConstInt(ctx->i32, c, false), ""); + half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, ""); + half_texel[c] = ac_emit_fdiv(&ctx->ac, ctx->f32one, half_texel[c]); + half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c], + LLVMConstReal(ctx->f32, -0.5), ""); + } + } + + for (c = 0; c < 2; c++) { + LLVMValueRef tmp; + LLVMValueRef index = LLVMConstInt(ctx->i32, coord_vgpr_index + c, 0); + tmp = LLVMBuildExtractElement(ctx->builder, coord, index, ""); + tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, ""); + tmp = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], ""); + tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, ""); + coord = LLVMBuildInsertElement(ctx->builder, coord, tmp, index, ""); + } + + tinfo->args[0] = coord; + return ac_emit_llvm_intrinsic(&ctx->ac, intr_name, tinfo->dst_type, tinfo->args, tinfo->arg_count, + AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_NOUNWIND); + +} + +static LLVMValueRef build_tex_intrinsic(struct nir_to_llvm_context *ctx, + nir_tex_instr *instr, + struct ac_tex_info *tinfo) +{ + const char *name = "llvm.SI.image.sample"; + const char *infix = ""; + char intr_name[127]; + char type[64]; + bool is_shadow = instr->is_shadow; + bool has_offset = tinfo->has_offset; + switch (instr->op) { + case nir_texop_txf: + case nir_texop_txf_ms: + case nir_texop_samples_identical: + name = instr->sampler_dim == GLSL_SAMPLER_DIM_MS ? "llvm.SI.image.load" : + instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? "llvm.SI.vs.load.input" : + "llvm.SI.image.load.mip"; + is_shadow = false; + has_offset = false; + break; + case nir_texop_txb: + infix = ".b"; + break; + case nir_texop_txl: + infix = ".l"; + break; + case nir_texop_txs: + name = "llvm.SI.getresinfo"; + break; + case nir_texop_query_levels: + name = "llvm.SI.getresinfo"; + break; + case nir_texop_tex: + if (ctx->stage != MESA_SHADER_FRAGMENT) + infix = ".lz"; + break; + case nir_texop_txd: + infix = ".d"; + break; + case nir_texop_tg4: + name = "llvm.SI.gather4"; + infix = ".lz"; + break; + case nir_texop_lod: + name = "llvm.SI.getlod"; + is_shadow = false; + has_offset = false; + break; + default: + break; + } + + build_int_type_name(LLVMTypeOf(tinfo->args[0]), type, sizeof(type)); + sprintf(intr_name, "%s%s%s%s.%s", name, is_shadow ? ".c" : "", infix, + has_offset ? ".o" : "", type); + + if (instr->op == nir_texop_tg4) { + enum glsl_base_type stype = glsl_get_sampler_result_type(instr->texture->var->type); + if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) { + return radv_lower_gather4_integer(ctx, tinfo, instr, intr_name, + (int)has_offset + (int)is_shadow); + } + } + return ac_emit_llvm_intrinsic(&ctx->ac, intr_name, tinfo->dst_type, tinfo->args, tinfo->arg_count, + AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_NOUNWIND); + +} + +static LLVMValueRef visit_vulkan_resource_index(struct nir_to_llvm_context *ctx, + nir_intrinsic_instr *instr) +{ + LLVMValueRef index = get_src(ctx, instr->src[0]); + unsigned desc_set = nir_intrinsic_desc_set(instr); + unsigned binding = nir_intrinsic_binding(instr); + LLVMValueRef desc_ptr = ctx->descriptor_sets[desc_set]; + struct radv_pipeline_layout *pipeline_layout = ctx->options->layout; + struct radv_descriptor_set_layout *layout = pipeline_layout->set[desc_set].layout; + unsigned base_offset = layout->binding[binding].offset; + LLVMValueRef offset, stride; + + if (layout->binding[binding].type == VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC || + layout->binding[binding].type == VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC) { + unsigned idx = pipeline_layout->set[desc_set].dynamic_offset_start + + layout->binding[binding].dynamic_offset_offset; + desc_ptr = ctx->push_constants; + base_offset = pipeline_layout->push_constant_size + 16 * idx; + stride = LLVMConstInt(ctx->i32, 16, false); + } else + stride = LLVMConstInt(ctx->i32, layout->binding[binding].size, false); + + offset = LLVMConstInt(ctx->i32, base_offset, false); + index = LLVMBuildMul(ctx->builder, index, stride, ""); + offset = LLVMBuildAdd(ctx->builder, offset, index, ""); + + desc_ptr = build_gep0(ctx, desc_ptr, offset); + desc_ptr = cast_ptr(ctx, desc_ptr, ctx->v4i32); + LLVMSetMetadata(desc_ptr, ctx->uniform_md_kind, ctx->empty_md); + + return LLVMBuildLoad(ctx->builder, desc_ptr, ""); +} + +static LLVMValueRef visit_load_push_constant(struct nir_to_llvm_context *ctx, + nir_intrinsic_instr *instr) +{ + LLVMValueRef ptr, addr; + + addr = LLVMConstInt(ctx->i32, nir_intrinsic_base(instr), 0); + addr = LLVMBuildAdd(ctx->builder, addr, get_src(ctx, instr->src[0]), ""); + + ptr = build_gep0(ctx, ctx->push_constants, addr); + ptr = cast_ptr(ctx, ptr, get_def_type(ctx, &instr->dest.ssa)); + + return LLVMBuildLoad(ctx->builder, ptr, ""); +} + +static LLVMValueRef visit_get_buffer_size(struct nir_to_llvm_context *ctx, + nir_intrinsic_instr *instr) +{ + LLVMValueRef desc = get_src(ctx, instr->src[0]); + + return get_buffer_size(ctx, desc, false); +} +static void visit_store_ssbo(struct nir_to_llvm_context *ctx, + nir_intrinsic_instr *instr) +{ + const char *store_name; + LLVMTypeRef data_type = ctx->f32; + unsigned writemask = nir_intrinsic_write_mask(instr); + LLVMValueRef base_data, base_offset; + LLVMValueRef params[6]; + + if (ctx->stage == MESA_SHADER_FRAGMENT) + ctx->shader_info->fs.writes_memory = true; + + params[1] = get_src(ctx, instr->src[1]); + params[2] = LLVMConstInt(ctx->i32, 0, false); /* vindex */ + params[4] = LLVMConstInt(ctx->i1, 0, false); /* glc */ + params[5] = LLVMConstInt(ctx->i1, 0, false); /* slc */ + + if (instr->num_components > 1) + data_type = LLVMVectorType(ctx->f32, instr->num_components); + + base_data = to_float(ctx, get_src(ctx, instr->src[0])); + base_data = trim_vector(ctx, base_data, instr->num_components); + base_data = LLVMBuildBitCast(ctx->builder, base_data, + data_type, ""); + base_offset = get_src(ctx, instr->src[2]); /* voffset */ + while (writemask) { + int start, count; + LLVMValueRef data; + LLVMValueRef offset; + LLVMValueRef tmp; + u_bit_scan_consecutive_range(&writemask, &start, &count); + + /* Due to an LLVM limitation, split 3-element writes + * into a 2-element and a 1-element write. */ + if (count == 3) { + writemask |= 1 << (start + 2); + count = 2; + } + + if (count == 4) { + store_name = "llvm.amdgcn.buffer.store.v4f32"; + data = base_data; + } else if (count == 2) { + tmp = LLVMBuildExtractElement(ctx->builder, + base_data, LLVMConstInt(ctx->i32, start, false), ""); + data = LLVMBuildInsertElement(ctx->builder, LLVMGetUndef(ctx->v2f32), tmp, + ctx->i32zero, ""); + + tmp = LLVMBuildExtractElement(ctx->builder, + base_data, LLVMConstInt(ctx->i32, start + 1, false), ""); + data = LLVMBuildInsertElement(ctx->builder, data, tmp, + ctx->i32one, ""); + store_name = "llvm.amdgcn.buffer.store.v2f32"; + + } else { + assert(count == 1); + if (get_llvm_num_components(base_data) > 1) + data = LLVMBuildExtractElement(ctx->builder, base_data, + LLVMConstInt(ctx->i32, start, false), ""); + else + data = base_data; + store_name = "llvm.amdgcn.buffer.store.f32"; + } + + offset = base_offset; + if (start != 0) { + offset = LLVMBuildAdd(ctx->builder, offset, LLVMConstInt(ctx->i32, start * 4, false), ""); + } + params[0] = data; + params[3] = offset; + ac_emit_llvm_intrinsic(&ctx->ac, store_name, + ctx->voidt, params, 6, 0); + } +} + +static LLVMValueRef visit_atomic_ssbo(struct nir_to_llvm_context *ctx, + nir_intrinsic_instr *instr) +{ + const char *name; + LLVMValueRef params[6]; + int arg_count = 0; + if (ctx->stage == MESA_SHADER_FRAGMENT) + ctx->shader_info->fs.writes_memory = true; + + if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) { + params[arg_count++] = llvm_extract_elem(ctx, get_src(ctx, instr->src[3]), 0); + } + params[arg_count++] = llvm_extract_elem(ctx, get_src(ctx, instr->src[2]), 0); + params[arg_count++] = get_src(ctx, instr->src[0]); + params[arg_count++] = LLVMConstInt(ctx->i32, 0, false); /* vindex */ + params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */ + params[arg_count++] = LLVMConstInt(ctx->i1, 0, false); /* slc */ + + switch (instr->intrinsic) { + case nir_intrinsic_ssbo_atomic_add: + name = "llvm.amdgcn.buffer.atomic.add"; + break; + case nir_intrinsic_ssbo_atomic_imin: + name = "llvm.amdgcn.buffer.atomic.smin"; + break; + case nir_intrinsic_ssbo_atomic_umin: + name = "llvm.amdgcn.buffer.atomic.umin"; + break; + case nir_intrinsic_ssbo_atomic_imax: + name = "llvm.amdgcn.buffer.atomic.smax"; + break; + case nir_intrinsic_ssbo_atomic_umax: + name = "llvm.amdgcn.buffer.atomic.umax"; + break; + case nir_intrinsic_ssbo_atomic_and: + name = "llvm.amdgcn.buffer.atomic.and"; + break; + case nir_intrinsic_ssbo_atomic_or: + name = "llvm.amdgcn.buffer.atomic.or"; + break; + case nir_intrinsic_ssbo_atomic_xor: + name = "llvm.amdgcn.buffer.atomic.xor"; + break; + case nir_intrinsic_ssbo_atomic_exchange: + name = "llvm.amdgcn.buffer.atomic.swap"; + break; + case nir_intrinsic_ssbo_atomic_comp_swap: + name = "llvm.amdgcn.buffer.atomic.cmpswap"; + break; + default: + abort(); + } + + return ac_emit_llvm_intrinsic(&ctx->ac, name, ctx->i32, params, arg_count, 0); +} + +static LLVMValueRef visit_load_buffer(struct nir_to_llvm_context *ctx, + nir_intrinsic_instr *instr) +{ + const char *load_name; + LLVMTypeRef data_type = ctx->f32; + if (instr->num_components == 3) + data_type = LLVMVectorType(ctx->f32, 4); + else if (instr->num_components > 1) + data_type = LLVMVectorType(ctx->f32, instr->num_components); + + if (instr->num_components == 4 || instr->num_components == 3) + load_name = "llvm.amdgcn.buffer.load.v4f32"; + else if (instr->num_components == 2) + load_name = "llvm.amdgcn.buffer.load.v2f32"; + else if (instr->num_components == 1) + load_name = "llvm.amdgcn.buffer.load.f32"; + else + abort(); + + LLVMValueRef params[] = { + get_src(ctx, instr->src[0]), + LLVMConstInt(ctx->i32, 0, false), + get_src(ctx, instr->src[1]), + LLVMConstInt(ctx->i1, 0, false), + LLVMConstInt(ctx->i1, 0, false), + }; + + LLVMValueRef ret = + ac_emit_llvm_intrinsic(&ctx->ac, load_name, data_type, params, 5, 0); + + if (instr->num_components == 3) + ret = trim_vector(ctx, ret, 3); + + return LLVMBuildBitCast(ctx->builder, ret, + get_def_type(ctx, &instr->dest.ssa), ""); +} + +static LLVMValueRef visit_load_ubo_buffer(struct nir_to_llvm_context *ctx, + nir_intrinsic_instr *instr) +{ + LLVMValueRef results[4], ret; + LLVMValueRef rsrc = get_src(ctx, instr->src[0]); + LLVMValueRef offset = get_src(ctx, instr->src[1]); + + rsrc = LLVMBuildBitCast(ctx->builder, rsrc, LLVMVectorType(ctx->i8, 16), ""); + + for (unsigned i = 0; i < instr->num_components; ++i) { + LLVMValueRef params[] = { + rsrc, + LLVMBuildAdd(ctx->builder, LLVMConstInt(ctx->i32, 4 * i, 0), + offset, "") + }; + results[i] = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.SI.load.const", ctx->f32, + params, 2, AC_FUNC_ATTR_READNONE); + } + + + ret = ac_build_gather_values(&ctx->ac, results, instr->num_components); + return LLVMBuildBitCast(ctx->builder, ret, + get_def_type(ctx, &instr->dest.ssa), ""); +} + +static void +radv_get_deref_offset(struct nir_to_llvm_context *ctx, nir_deref *tail, + bool vs_in, unsigned *const_out, LLVMValueRef *indir_out) +{ + unsigned const_offset = 0; + LLVMValueRef offset = NULL; + + + while (tail->child != NULL) { + const struct glsl_type *parent_type = tail->type; + tail = tail->child; + + if (tail->deref_type == nir_deref_type_array) { + nir_deref_array *deref_array = nir_deref_as_array(tail); + LLVMValueRef index, stride, local_offset; + unsigned size = glsl_count_attribute_slots(tail->type, vs_in); + + const_offset += size * deref_array->base_offset; + if (deref_array->deref_array_type == nir_deref_array_type_direct) + continue; + + assert(deref_array->deref_array_type == nir_deref_array_type_indirect); + index = get_src(ctx, deref_array->indirect); + stride = LLVMConstInt(ctx->i32, size, 0); + local_offset = LLVMBuildMul(ctx->builder, stride, index, ""); + + if (offset) + offset = LLVMBuildAdd(ctx->builder, offset, local_offset, ""); + else + offset = local_offset; + } else if (tail->deref_type == nir_deref_type_struct) { + nir_deref_struct *deref_struct = nir_deref_as_struct(tail); + + for (unsigned i = 0; i < deref_struct->index; i++) { + const struct glsl_type *ft = glsl_get_struct_field(parent_type, i); + const_offset += glsl_count_attribute_slots(ft, vs_in); + } + } else + unreachable("unsupported deref type"); + + } + + if (const_offset && offset) + offset = LLVMBuildAdd(ctx->builder, offset, + LLVMConstInt(ctx->i32, const_offset, 0), + ""); + + *const_out = const_offset; + *indir_out = offset; +} + +static LLVMValueRef visit_load_var(struct nir_to_llvm_context *ctx, + nir_intrinsic_instr *instr) +{ + LLVMValueRef values[4]; + int idx = instr->variables[0]->var->data.driver_location; + int ve = instr->dest.ssa.num_components; + LLVMValueRef indir_index; + unsigned const_index; + switch (instr->variables[0]->var->data.mode) { + case nir_var_shader_in: + radv_get_deref_offset(ctx, &instr->variables[0]->deref, + ctx->stage == MESA_SHADER_VERTEX, + &const_index, &indir_index); + for (unsigned chan = 0; chan < ve; chan++) { + if (indir_index) { + unsigned count = glsl_count_attribute_slots( + instr->variables[0]->var->type, + ctx->stage == MESA_SHADER_VERTEX); + LLVMValueRef tmp_vec = ac_build_gather_values_extended( + &ctx->ac, ctx->inputs + idx + chan, count, + 4, false); + + values[chan] = LLVMBuildExtractElement(ctx->builder, + tmp_vec, + indir_index, ""); + } else + values[chan] = ctx->inputs[idx + chan + const_index * 4]; + } + return to_integer(ctx, ac_build_gather_values(&ctx->ac, values, ve)); + break; + case nir_var_local: + radv_get_deref_offset(ctx, &instr->variables[0]->deref, false, + &const_index, &indir_index); + for (unsigned chan = 0; chan < ve; chan++) { + if (indir_index) { + unsigned count = glsl_count_attribute_slots( + instr->variables[0]->var->type, false); + LLVMValueRef tmp_vec = ac_build_gather_values_extended( + &ctx->ac, ctx->locals + idx + chan, count, + 4, true); + + values[chan] = LLVMBuildExtractElement(ctx->builder, + tmp_vec, + indir_index, ""); + } else { + values[chan] = LLVMBuildLoad(ctx->builder, ctx->locals[idx + chan + const_index * 4], ""); + } + } + return to_integer(ctx, ac_build_gather_values(&ctx->ac, values, ve)); + case nir_var_shader_out: + radv_get_deref_offset(ctx, &instr->variables[0]->deref, false, + &const_index, &indir_index); + for (unsigned chan = 0; chan < ve; chan++) { + if (indir_index) { + unsigned count = glsl_count_attribute_slots( + instr->variables[0]->var->type, false); + LLVMValueRef tmp_vec = ac_build_gather_values_extended( + &ctx->ac, ctx->outputs + idx + chan, count, + 4, true); + + values[chan] = LLVMBuildExtractElement(ctx->builder, + tmp_vec, + indir_index, ""); + } else { + values[chan] = LLVMBuildLoad(ctx->builder, + ctx->outputs[idx + chan + const_index * 4], + ""); + } + } + return to_integer(ctx, ac_build_gather_values(&ctx->ac, values, ve)); + case nir_var_shared: { + radv_get_deref_offset(ctx, &instr->variables[0]->deref, false, + &const_index, &indir_index); + LLVMValueRef ptr = get_shared_memory_ptr(ctx, idx, ctx->i32); + LLVMValueRef derived_ptr; + + if (indir_index) + indir_index = LLVMBuildMul(ctx->builder, indir_index, LLVMConstInt(ctx->i32, 4, false), ""); + + for (unsigned chan = 0; chan < ve; chan++) { + LLVMValueRef index = LLVMConstInt(ctx->i32, chan, false); + if (indir_index) + index = LLVMBuildAdd(ctx->builder, index, indir_index, ""); + derived_ptr = LLVMBuildGEP(ctx->builder, ptr, &index, 1, ""); + values[chan] = LLVMBuildLoad(ctx->builder, derived_ptr, ""); + } + return to_integer(ctx, ac_build_gather_values(&ctx->ac, values, ve)); + } + default: + break; + } + return NULL; +} + +static void +visit_store_var(struct nir_to_llvm_context *ctx, + nir_intrinsic_instr *instr) +{ + LLVMValueRef temp_ptr, value; + int idx = instr->variables[0]->var->data.driver_location; + LLVMValueRef src = to_float(ctx, get_src(ctx, instr->src[0])); + int writemask = instr->const_index[0]; + LLVMValueRef indir_index; + unsigned const_index; + switch (instr->variables[0]->var->data.mode) { + case nir_var_shader_out: + radv_get_deref_offset(ctx, &instr->variables[0]->deref, false, + &const_index, &indir_index); + for (unsigned chan = 0; chan < 4; chan++) { + int stride = 4; + if (!(writemask & (1 << chan))) + continue; + if (get_llvm_num_components(src) == 1) + value = src; + else + value = LLVMBuildExtractElement(ctx->builder, src, + LLVMConstInt(ctx->i32, + chan, false), + ""); + + if (instr->variables[0]->var->data.location == VARYING_SLOT_CLIP_DIST0 || + instr->variables[0]->var->data.location == VARYING_SLOT_CULL_DIST0) + stride = 1; + if (indir_index) { + unsigned count = glsl_count_attribute_slots( + instr->variables[0]->var->type, false); + LLVMValueRef tmp_vec = ac_build_gather_values_extended( + &ctx->ac, ctx->outputs + idx + chan, count, + stride, true); + + if (get_llvm_num_components(tmp_vec) > 1) { + tmp_vec = LLVMBuildInsertElement(ctx->builder, tmp_vec, + value, indir_index, ""); + } else + tmp_vec = value; + build_store_values_extended(ctx, ctx->outputs + idx + chan, + count, stride, tmp_vec); + + } else { + temp_ptr = ctx->outputs[idx + chan + const_index * stride]; + + LLVMBuildStore(ctx->builder, value, temp_ptr); + } + } + break; + case nir_var_local: + radv_get_deref_offset(ctx, &instr->variables[0]->deref, false, + &const_index, &indir_index); + for (unsigned chan = 0; chan < 4; chan++) { + if (!(writemask & (1 << chan))) + continue; + + if (get_llvm_num_components(src) == 1) + value = src; + else + value = LLVMBuildExtractElement(ctx->builder, src, + LLVMConstInt(ctx->i32, chan, false), ""); + if (indir_index) { + unsigned count = glsl_count_attribute_slots( + instr->variables[0]->var->type, false); + LLVMValueRef tmp_vec = ac_build_gather_values_extended( + &ctx->ac, ctx->locals + idx + chan, count, + 4, true); + + tmp_vec = LLVMBuildInsertElement(ctx->builder, tmp_vec, + value, indir_index, ""); + build_store_values_extended(ctx, ctx->locals + idx + chan, + count, 4, tmp_vec); + } else { + temp_ptr = ctx->locals[idx + chan + const_index * 4]; + + LLVMBuildStore(ctx->builder, value, temp_ptr); + } + } + break; + case nir_var_shared: { + LLVMValueRef ptr; + radv_get_deref_offset(ctx, &instr->variables[0]->deref, false, + &const_index, &indir_index); + + ptr = get_shared_memory_ptr(ctx, idx, ctx->i32); + LLVMValueRef derived_ptr; + + if (indir_index) + indir_index = LLVMBuildMul(ctx->builder, indir_index, LLVMConstInt(ctx->i32, 4, false), ""); + + for (unsigned chan = 0; chan < 4; chan++) { + if (!(writemask & (1 << chan))) + continue; + + LLVMValueRef index = LLVMConstInt(ctx->i32, chan, false); + + if (get_llvm_num_components(src) == 1) + value = src; + else + value = LLVMBuildExtractElement(ctx->builder, src, + LLVMConstInt(ctx->i32, + chan, false), + ""); + + if (indir_index) + index = LLVMBuildAdd(ctx->builder, index, indir_index, ""); + + derived_ptr = LLVMBuildGEP(ctx->builder, ptr, &index, 1, ""); + LLVMBuildStore(ctx->builder, + to_integer(ctx, value), derived_ptr); + } + break; + } + default: + break; + } +} + +static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array) +{ + switch (dim) { + case GLSL_SAMPLER_DIM_BUF: + return 1; + case GLSL_SAMPLER_DIM_1D: + return array ? 2 : 1; + case GLSL_SAMPLER_DIM_2D: + return array ? 3 : 2; + case GLSL_SAMPLER_DIM_MS: + return array ? 4 : 3; + case GLSL_SAMPLER_DIM_3D: + case GLSL_SAMPLER_DIM_CUBE: + return 3; + case GLSL_SAMPLER_DIM_RECT: + case GLSL_SAMPLER_DIM_SUBPASS: + return 2; + case GLSL_SAMPLER_DIM_SUBPASS_MS: + return 3; + default: + break; + } + return 0; +} + +static LLVMValueRef get_image_coords(struct nir_to_llvm_context *ctx, + nir_intrinsic_instr *instr) +{ + const struct glsl_type *type = instr->variables[0]->var->type; + if(instr->variables[0]->deref.child) + type = instr->variables[0]->deref.child->type; + + LLVMValueRef src0 = get_src(ctx, instr->src[0]); + LLVMValueRef coords[4]; + LLVMValueRef masks[] = { + LLVMConstInt(ctx->i32, 0, false), LLVMConstInt(ctx->i32, 1, false), + LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false), + }; + LLVMValueRef res; + int count; + enum glsl_sampler_dim dim = glsl_get_sampler_dim(type); + bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS || + dim == GLSL_SAMPLER_DIM_SUBPASS_MS); + bool is_ms = (dim == GLSL_SAMPLER_DIM_MS || + dim == GLSL_SAMPLER_DIM_SUBPASS_MS); + + count = image_type_to_components_count(dim, + glsl_sampler_type_is_array(type)); + + if (count == 1) { + if (instr->src[0].ssa->num_components) + res = LLVMBuildExtractElement(ctx->builder, src0, masks[0], ""); + else + res = src0; + } else { + int chan; + if (is_ms) + count--; + for (chan = 0; chan < count; ++chan) { + coords[chan] = LLVMBuildExtractElement(ctx->builder, src0, masks[chan], ""); + } + + if (add_frag_pos) { + for (chan = 0; chan < count; ++chan) + coords[chan] = LLVMBuildAdd(ctx->builder, coords[chan], LLVMBuildFPToUI(ctx->builder, ctx->frag_pos[chan], ctx->i32, ""), ""); + } + if (is_ms) { + coords[count] = llvm_extract_elem(ctx, get_src(ctx, instr->src[1]), 0); + count++; + } + + if (count == 3) { + coords[3] = LLVMGetUndef(ctx->i32); + count = 4; + } + res = ac_build_gather_values(&ctx->ac, coords, count); + } + return res; +} + +static void build_type_name_for_intr( + LLVMTypeRef type, + char *buf, unsigned bufsize) +{ + LLVMTypeRef elem_type = type; + + assert(bufsize >= 8); + + if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) { + int ret = snprintf(buf, bufsize, "v%u", + LLVMGetVectorSize(type)); + if (ret < 0) { + char *type_name = LLVMPrintTypeToString(type); + fprintf(stderr, "Error building type name for: %s\n", + type_name); + return; + } + elem_type = LLVMGetElementType(type); + buf += ret; + bufsize -= ret; + } + switch (LLVMGetTypeKind(elem_type)) { + default: break; + case LLVMIntegerTypeKind: + snprintf(buf, bufsize, "i%d", LLVMGetIntTypeWidth(elem_type)); + break; + case LLVMFloatTypeKind: + snprintf(buf, bufsize, "f32"); + break; + case LLVMDoubleTypeKind: + snprintf(buf, bufsize, "f64"); + break; + } +} + +static void get_image_intr_name(const char *base_name, + LLVMTypeRef data_type, + LLVMTypeRef coords_type, + LLVMTypeRef rsrc_type, + char *out_name, unsigned out_len) +{ + char coords_type_name[8]; + + build_type_name_for_intr(coords_type, coords_type_name, + sizeof(coords_type_name)); + + if (HAVE_LLVM <= 0x0309) { + snprintf(out_name, out_len, "%s.%s", base_name, coords_type_name); + } else { + char data_type_name[8]; + char rsrc_type_name[8]; + + build_type_name_for_intr(data_type, data_type_name, + sizeof(data_type_name)); + build_type_name_for_intr(rsrc_type, rsrc_type_name, + sizeof(rsrc_type_name)); + snprintf(out_name, out_len, "%s.%s.%s.%s", base_name, + data_type_name, coords_type_name, rsrc_type_name); + } +} + +static LLVMValueRef visit_image_load(struct nir_to_llvm_context *ctx, + nir_intrinsic_instr *instr) +{ + LLVMValueRef params[7]; + LLVMValueRef res; + char intrinsic_name[64]; + const nir_variable *var = instr->variables[0]->var; + const struct glsl_type *type = var->type; + if(instr->variables[0]->deref.child) + type = instr->variables[0]->deref.child->type; + + type = glsl_without_array(type); + if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) { + params[0] = get_sampler_desc(ctx, instr->variables[0], DESC_BUFFER); + params[1] = LLVMBuildExtractElement(ctx->builder, get_src(ctx, instr->src[0]), + LLVMConstInt(ctx->i32, 0, false), ""); /* vindex */ + params[2] = LLVMConstInt(ctx->i32, 0, false); /* voffset */ + params[3] = LLVMConstInt(ctx->i1, 0, false); /* glc */ + params[4] = LLVMConstInt(ctx->i1, 0, false); /* slc */ + res = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.amdgcn.buffer.load.format.v4f32", ctx->v4f32, + params, 5, 0); + + res = trim_vector(ctx, res, instr->dest.ssa.num_components); + res = to_integer(ctx, res); + } else { + bool is_da = glsl_sampler_type_is_array(type) || + glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE; + LLVMValueRef da = is_da ? ctx->i32one : ctx->i32zero; + LLVMValueRef glc = LLVMConstInt(ctx->i1, 0, false); + LLVMValueRef slc = LLVMConstInt(ctx->i1, 0, false); + + params[0] = get_image_coords(ctx, instr); + params[1] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE); + params[2] = LLVMConstInt(ctx->i32, 15, false); /* dmask */ + if (HAVE_LLVM <= 0x0309) { + params[3] = LLVMConstInt(ctx->i1, 0, false); /* r128 */ + params[4] = da; + params[5] = glc; + params[6] = slc; + } else { + LLVMValueRef lwe = LLVMConstInt(ctx->i1, 0, false); + params[3] = glc; + params[4] = slc; + params[5] = lwe; + params[6] = da; + } + + get_image_intr_name("llvm.amdgcn.image.load", + ctx->v4f32, /* vdata */ + LLVMTypeOf(params[0]), /* coords */ + LLVMTypeOf(params[1]), /* rsrc */ + intrinsic_name, sizeof(intrinsic_name)); + + res = ac_emit_llvm_intrinsic(&ctx->ac, intrinsic_name, ctx->v4f32, + params, 7, AC_FUNC_ATTR_READONLY); + } + return to_integer(ctx, res); +} + +static void visit_image_store(struct nir_to_llvm_context *ctx, + nir_intrinsic_instr *instr) +{ + LLVMValueRef params[8]; + char intrinsic_name[64]; + const nir_variable *var = instr->variables[0]->var; + LLVMValueRef i1false = LLVMConstInt(ctx->i1, 0, 0); + LLVMValueRef i1true = LLVMConstInt(ctx->i1, 1, 0); + const struct glsl_type *type = glsl_without_array(var->type); + + if (ctx->stage == MESA_SHADER_FRAGMENT) + ctx->shader_info->fs.writes_memory = true; + + if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) { + params[0] = to_float(ctx, get_src(ctx, instr->src[2])); /* data */ + params[1] = get_sampler_desc(ctx, instr->variables[0], DESC_BUFFER); + params[2] = LLVMBuildExtractElement(ctx->builder, get_src(ctx, instr->src[0]), + LLVMConstInt(ctx->i32, 0, false), ""); /* vindex */ + params[3] = LLVMConstInt(ctx->i32, 0, false); /* voffset */ + params[4] = i1false; /* glc */ + params[5] = i1false; /* slc */ + ac_emit_llvm_intrinsic(&ctx->ac, "llvm.amdgcn.buffer.store.format.v4f32", ctx->voidt, + params, 6, 0); + } else { + bool is_da = glsl_sampler_type_is_array(type) || + glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE; + LLVMValueRef da = is_da ? i1true : i1false; + LLVMValueRef glc = i1false; + LLVMValueRef slc = i1false; + + params[0] = to_float(ctx, get_src(ctx, instr->src[2])); + params[1] = get_image_coords(ctx, instr); /* coords */ + params[2] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE); + params[3] = LLVMConstInt(ctx->i32, 15, false); /* dmask */ + if (HAVE_LLVM <= 0x0309) { + params[4] = i1false; /* r128 */ + params[5] = da; + params[6] = glc; + params[7] = slc; + } else { + LLVMValueRef lwe = i1false; + params[4] = glc; + params[5] = slc; + params[6] = lwe; + params[7] = da; + } + + get_image_intr_name("llvm.amdgcn.image.store", + LLVMTypeOf(params[0]), /* vdata */ + LLVMTypeOf(params[1]), /* coords */ + LLVMTypeOf(params[2]), /* rsrc */ + intrinsic_name, sizeof(intrinsic_name)); + + ac_emit_llvm_intrinsic(&ctx->ac, intrinsic_name, ctx->voidt, + params, 8, 0); + } + +} + +static LLVMValueRef visit_image_atomic(struct nir_to_llvm_context *ctx, + nir_intrinsic_instr *instr) +{ + LLVMValueRef params[6]; + int param_count = 0; + const nir_variable *var = instr->variables[0]->var; + LLVMValueRef i1false = LLVMConstInt(ctx->i1, 0, 0); + LLVMValueRef i1true = LLVMConstInt(ctx->i1, 1, 0); + const char *base_name = "llvm.amdgcn.image.atomic"; + const char *atomic_name; + LLVMValueRef coords; + char intrinsic_name[32], coords_type[8]; + const struct glsl_type *type = glsl_without_array(var->type); + + if (ctx->stage == MESA_SHADER_FRAGMENT) + ctx->shader_info->fs.writes_memory = true; + + params[param_count++] = get_src(ctx, instr->src[2]); + if (instr->intrinsic == nir_intrinsic_image_atomic_comp_swap) + params[param_count++] = get_src(ctx, instr->src[3]); + + if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) { + params[param_count++] = get_sampler_desc(ctx, instr->variables[0], DESC_BUFFER); + coords = params[param_count++] = LLVMBuildExtractElement(ctx->builder, get_src(ctx, instr->src[0]), + LLVMConstInt(ctx->i32, 0, false), ""); /* vindex */ + params[param_count++] = ctx->i32zero; /* voffset */ + params[param_count++] = i1false; /* glc */ + params[param_count++] = i1false; /* slc */ + } else { + bool da = glsl_sampler_type_is_array(type) || + glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE; + + coords = params[param_count++] = get_image_coords(ctx, instr); + params[param_count++] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE); + params[param_count++] = i1false; /* r128 */ + params[param_count++] = da ? i1true : i1false; /* da */ + params[param_count++] = i1false; /* slc */ + } + + switch (instr->intrinsic) { + case nir_intrinsic_image_atomic_add: + atomic_name = "add"; + break; + case nir_intrinsic_image_atomic_min: + atomic_name = "smin"; + break; + case nir_intrinsic_image_atomic_max: + atomic_name = "smax"; + break; + case nir_intrinsic_image_atomic_and: + atomic_name = "and"; + break; + case nir_intrinsic_image_atomic_or: + atomic_name = "or"; + break; + case nir_intrinsic_image_atomic_xor: + atomic_name = "xor"; + break; + case nir_intrinsic_image_atomic_exchange: + atomic_name = "swap"; + break; + case nir_intrinsic_image_atomic_comp_swap: + atomic_name = "cmpswap"; + break; + default: + abort(); + } + build_int_type_name(LLVMTypeOf(coords), + coords_type, sizeof(coords_type)); + + snprintf(intrinsic_name, sizeof(intrinsic_name), + "%s.%s.%s", base_name, atomic_name, coords_type); + return ac_emit_llvm_intrinsic(&ctx->ac, intrinsic_name, ctx->i32, params, param_count, 0); +} + +static LLVMValueRef visit_image_size(struct nir_to_llvm_context *ctx, + nir_intrinsic_instr *instr) +{ + LLVMValueRef res; + LLVMValueRef params[10]; + const nir_variable *var = instr->variables[0]->var; + const struct glsl_type *type = instr->variables[0]->var->type; + bool da = glsl_sampler_type_is_array(var->type) || + glsl_get_sampler_dim(var->type) == GLSL_SAMPLER_DIM_CUBE; + if(instr->variables[0]->deref.child) + type = instr->variables[0]->deref.child->type; + + if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_BUF) + return get_buffer_size(ctx, get_sampler_desc(ctx, instr->variables[0], DESC_BUFFER), true); + params[0] = ctx->i32zero; + params[1] = get_sampler_desc(ctx, instr->variables[0], DESC_IMAGE); + params[2] = LLVMConstInt(ctx->i32, 15, false); + params[3] = ctx->i32zero; + params[4] = ctx->i32zero; + params[5] = da ? ctx->i32one : ctx->i32zero; + params[6] = ctx->i32zero; + params[7] = ctx->i32zero; + params[8] = ctx->i32zero; + params[9] = ctx->i32zero; + + res = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.SI.getresinfo.i32", ctx->v4i32, + params, 10, AC_FUNC_ATTR_READNONE); + + if (glsl_get_sampler_dim(type) == GLSL_SAMPLER_DIM_CUBE && + glsl_sampler_type_is_array(type)) { + LLVMValueRef two = LLVMConstInt(ctx->i32, 2, false); + LLVMValueRef six = LLVMConstInt(ctx->i32, 6, false); + LLVMValueRef z = LLVMBuildExtractElement(ctx->builder, res, two, ""); + z = LLVMBuildSDiv(ctx->builder, z, six, ""); + res = LLVMBuildInsertElement(ctx->builder, res, z, two, ""); + } + return res; +} + +static void emit_waitcnt(struct nir_to_llvm_context *ctx) +{ + LLVMValueRef args[1] = { + LLVMConstInt(ctx->i32, 0xf70, false), + }; + ac_emit_llvm_intrinsic(&ctx->ac, "llvm.amdgcn.s.waitcnt", + ctx->voidt, args, 1, 0); +} + +static void emit_barrier(struct nir_to_llvm_context *ctx) +{ + // TODO tess + ac_emit_llvm_intrinsic(&ctx->ac, "llvm.amdgcn.s.barrier", + ctx->voidt, NULL, 0, 0); +} + +static void emit_discard_if(struct nir_to_llvm_context *ctx, + nir_intrinsic_instr *instr) +{ + LLVMValueRef cond; + ctx->shader_info->fs.can_discard = true; + + cond = LLVMBuildICmp(ctx->builder, LLVMIntNE, + get_src(ctx, instr->src[0]), + ctx->i32zero, ""); + + cond = LLVMBuildSelect(ctx->builder, cond, + LLVMConstReal(ctx->f32, -1.0f), + ctx->f32zero, ""); + ac_emit_llvm_intrinsic(&ctx->ac, "llvm.AMDGPU.kill", + ctx->voidt, + &cond, 1, 0); +} + +static LLVMValueRef +visit_load_local_invocation_index(struct nir_to_llvm_context *ctx) +{ + LLVMValueRef result; + LLVMValueRef thread_id = get_thread_id(ctx); + result = LLVMBuildAnd(ctx->builder, ctx->tg_size, + LLVMConstInt(ctx->i32, 0xfc0, false), ""); + + return LLVMBuildAdd(ctx->builder, result, thread_id, ""); +} + +static LLVMValueRef visit_var_atomic(struct nir_to_llvm_context *ctx, + nir_intrinsic_instr *instr) +{ + LLVMValueRef ptr, result; + int idx = instr->variables[0]->var->data.driver_location; + LLVMValueRef src = get_src(ctx, instr->src[0]); + ptr = get_shared_memory_ptr(ctx, idx, ctx->i32); + + if (instr->intrinsic == nir_intrinsic_var_atomic_comp_swap) { + LLVMValueRef src1 = get_src(ctx, instr->src[1]); + result = LLVMBuildAtomicCmpXchg(ctx->builder, + ptr, src, src1, + LLVMAtomicOrderingSequentiallyConsistent, + LLVMAtomicOrderingSequentiallyConsistent, + false); + } else { + LLVMAtomicRMWBinOp op; + switch (instr->intrinsic) { + case nir_intrinsic_var_atomic_add: + op = LLVMAtomicRMWBinOpAdd; + break; + case nir_intrinsic_var_atomic_umin: + op = LLVMAtomicRMWBinOpUMin; + break; + case nir_intrinsic_var_atomic_umax: + op = LLVMAtomicRMWBinOpUMax; + break; + case nir_intrinsic_var_atomic_imin: + op = LLVMAtomicRMWBinOpMin; + break; + case nir_intrinsic_var_atomic_imax: + op = LLVMAtomicRMWBinOpMax; + break; + case nir_intrinsic_var_atomic_and: + op = LLVMAtomicRMWBinOpAnd; + break; + case nir_intrinsic_var_atomic_or: + op = LLVMAtomicRMWBinOpOr; + break; + case nir_intrinsic_var_atomic_xor: + op = LLVMAtomicRMWBinOpXor; + break; + case nir_intrinsic_var_atomic_exchange: + op = LLVMAtomicRMWBinOpXchg; + break; + default: + return NULL; + } + + result = LLVMBuildAtomicRMW(ctx->builder, op, ptr, to_integer(ctx, src), + LLVMAtomicOrderingSequentiallyConsistent, + false); + } + return result; +} + +#define INTERP_CENTER 0 +#define INTERP_CENTROID 1 +#define INTERP_SAMPLE 2 + +static LLVMValueRef lookup_interp_param(struct nir_to_llvm_context *ctx, + enum glsl_interp_mode interp, unsigned location) +{ + switch (interp) { + case INTERP_MODE_FLAT: + default: + return NULL; + case INTERP_MODE_SMOOTH: + case INTERP_MODE_NONE: + if (location == INTERP_CENTER) + return ctx->persp_center; + else if (location == INTERP_CENTROID) + return ctx->persp_centroid; + else if (location == INTERP_SAMPLE) + return ctx->persp_sample; + break; + case INTERP_MODE_NOPERSPECTIVE: + if (location == INTERP_CENTER) + return ctx->linear_center; + else if (location == INTERP_CENTROID) + return ctx->linear_centroid; + else if (location == INTERP_SAMPLE) + return ctx->linear_sample; + break; + } + return NULL; +} + +static LLVMValueRef load_sample_position(struct nir_to_llvm_context *ctx, + LLVMValueRef sample_id) +{ + /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */ + LLVMValueRef offset0 = LLVMBuildMul(ctx->builder, sample_id, LLVMConstInt(ctx->i32, 8, false), ""); + LLVMValueRef offset1 = LLVMBuildAdd(ctx->builder, offset0, LLVMConstInt(ctx->i32, 4, false), ""); + LLVMValueRef result[2]; + + result[0] = build_indexed_load_const(ctx, ctx->sample_positions, offset0); + result[1] = build_indexed_load_const(ctx, ctx->sample_positions, offset1); + + return ac_build_gather_values(&ctx->ac, result, 2); +} + +static LLVMValueRef load_sample_pos(struct nir_to_llvm_context *ctx) +{ + LLVMValueRef values[2]; + + values[0] = emit_ffract(ctx, ctx->frag_pos[0]); + values[1] = emit_ffract(ctx, ctx->frag_pos[1]); + return ac_build_gather_values(&ctx->ac, values, 2); +} + +static LLVMValueRef visit_interp(struct nir_to_llvm_context *ctx, + nir_intrinsic_instr *instr) +{ + LLVMValueRef result[2]; + LLVMValueRef interp_param, attr_number; + unsigned location; + unsigned chan; + LLVMValueRef src_c0, src_c1; + const char *intr_name; + LLVMValueRef src0; + int input_index = instr->variables[0]->var->data.location - VARYING_SLOT_VAR0; + switch (instr->intrinsic) { + case nir_intrinsic_interp_var_at_centroid: + location = INTERP_CENTROID; + break; + case nir_intrinsic_interp_var_at_sample: + case nir_intrinsic_interp_var_at_offset: + location = INTERP_SAMPLE; + src0 = get_src(ctx, instr->src[0]); + break; + default: + break; + } + + if (instr->intrinsic == nir_intrinsic_interp_var_at_offset) { + src_c0 = to_float(ctx, LLVMBuildExtractElement(ctx->builder, src0, ctx->i32zero, "")); + src_c1 = to_float(ctx, LLVMBuildExtractElement(ctx->builder, src0, ctx->i32one, "")); + } else if (instr->intrinsic == nir_intrinsic_interp_var_at_sample) { + LLVMValueRef sample_position; + LLVMValueRef halfval = LLVMConstReal(ctx->f32, 0.5f); + + /* fetch sample ID */ + sample_position = load_sample_position(ctx, src0); + + src_c0 = LLVMBuildExtractElement(ctx->builder, sample_position, ctx->i32zero, ""); + src_c0 = LLVMBuildFSub(ctx->builder, src_c0, halfval, ""); + src_c1 = LLVMBuildExtractElement(ctx->builder, sample_position, ctx->i32one, ""); + src_c1 = LLVMBuildFSub(ctx->builder, src_c1, halfval, ""); + } + interp_param = lookup_interp_param(ctx, instr->variables[0]->var->data.interpolation, location); + attr_number = LLVMConstInt(ctx->i32, input_index, false); + + if (location == INTERP_SAMPLE) { + LLVMValueRef ij_out[2]; + LLVMValueRef ddxy_out = emit_ddxy_interp(ctx, interp_param); + + /* + * take the I then J parameters, and the DDX/Y for it, and + * calculate the IJ inputs for the interpolator. + * temp1 = ddx * offset/sample.x + I; + * interp_param.I = ddy * offset/sample.y + temp1; + * temp1 = ddx * offset/sample.x + J; + * interp_param.J = ddy * offset/sample.y + temp1; + */ + for (unsigned i = 0; i < 2; i++) { + LLVMValueRef ix_ll = LLVMConstInt(ctx->i32, i, false); + LLVMValueRef iy_ll = LLVMConstInt(ctx->i32, i + 2, false); + LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->builder, + ddxy_out, ix_ll, ""); + LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->builder, + ddxy_out, iy_ll, ""); + LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->builder, + interp_param, ix_ll, ""); + LLVMValueRef temp1, temp2; + + interp_el = LLVMBuildBitCast(ctx->builder, interp_el, + ctx->f32, ""); + + temp1 = LLVMBuildFMul(ctx->builder, ddx_el, src_c0, ""); + temp1 = LLVMBuildFAdd(ctx->builder, temp1, interp_el, ""); + + temp2 = LLVMBuildFMul(ctx->builder, ddy_el, src_c1, ""); + temp2 = LLVMBuildFAdd(ctx->builder, temp2, temp1, ""); + + ij_out[i] = LLVMBuildBitCast(ctx->builder, + temp2, ctx->i32, ""); + } + interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2); + + } + intr_name = interp_param ? "llvm.SI.fs.interp" : "llvm.SI.fs.constant"; + for (chan = 0; chan < 2; chan++) { + LLVMValueRef args[4]; + LLVMValueRef llvm_chan = LLVMConstInt(ctx->i32, chan, false); + + args[0] = llvm_chan; + args[1] = attr_number; + args[2] = ctx->prim_mask; + args[3] = interp_param; + result[chan] = ac_emit_llvm_intrinsic(&ctx->ac, intr_name, + ctx->f32, args, args[3] ? 4 : 3, + AC_FUNC_ATTR_READNONE); + } + return ac_build_gather_values(&ctx->ac, result, 2); +} + +static void visit_intrinsic(struct nir_to_llvm_context *ctx, + nir_intrinsic_instr *instr) +{ + LLVMValueRef result = NULL; + + switch (instr->intrinsic) { + case nir_intrinsic_load_work_group_id: { + result = ctx->workgroup_ids; + break; + } + case nir_intrinsic_load_base_vertex: { + result = ctx->base_vertex; + break; + } + case nir_intrinsic_load_vertex_id_zero_base: { + result = ctx->vertex_id; + break; + } + case nir_intrinsic_load_local_invocation_id: { + result = ctx->local_invocation_ids; + break; + } + case nir_intrinsic_load_base_instance: + result = ctx->start_instance; + break; + case nir_intrinsic_load_sample_id: + ctx->shader_info->fs.force_persample = true; + result = unpack_param(ctx, ctx->ancillary, 8, 4); + break; + case nir_intrinsic_load_sample_pos: + ctx->shader_info->fs.force_persample = true; + result = load_sample_pos(ctx); + break; + case nir_intrinsic_load_front_face: + result = ctx->front_face; + break; + case nir_intrinsic_load_instance_id: + result = ctx->instance_id; + ctx->shader_info->vs.vgpr_comp_cnt = MAX2(3, + ctx->shader_info->vs.vgpr_comp_cnt); + break; + case nir_intrinsic_load_num_work_groups: + result = ctx->num_work_groups; + break; + case nir_intrinsic_load_local_invocation_index: + result = visit_load_local_invocation_index(ctx); + break; + case nir_intrinsic_load_push_constant: + result = visit_load_push_constant(ctx, instr); + break; + case nir_intrinsic_vulkan_resource_index: + result = visit_vulkan_resource_index(ctx, instr); + break; + case nir_intrinsic_store_ssbo: + visit_store_ssbo(ctx, instr); + break; + case nir_intrinsic_load_ssbo: + result = visit_load_buffer(ctx, instr); + break; + case nir_intrinsic_ssbo_atomic_add: + case nir_intrinsic_ssbo_atomic_imin: + case nir_intrinsic_ssbo_atomic_umin: + case nir_intrinsic_ssbo_atomic_imax: + case nir_intrinsic_ssbo_atomic_umax: + case nir_intrinsic_ssbo_atomic_and: + case nir_intrinsic_ssbo_atomic_or: + case nir_intrinsic_ssbo_atomic_xor: + case nir_intrinsic_ssbo_atomic_exchange: + case nir_intrinsic_ssbo_atomic_comp_swap: + result = visit_atomic_ssbo(ctx, instr); + break; + case nir_intrinsic_load_ubo: + result = visit_load_ubo_buffer(ctx, instr); + break; + case nir_intrinsic_get_buffer_size: + result = visit_get_buffer_size(ctx, instr); + break; + case nir_intrinsic_load_var: + result = visit_load_var(ctx, instr); + break; + case nir_intrinsic_store_var: + visit_store_var(ctx, instr); + break; + case nir_intrinsic_image_load: + result = visit_image_load(ctx, instr); + break; + case nir_intrinsic_image_store: + visit_image_store(ctx, instr); + break; + case nir_intrinsic_image_atomic_add: + case nir_intrinsic_image_atomic_min: + case nir_intrinsic_image_atomic_max: + case nir_intrinsic_image_atomic_and: + case nir_intrinsic_image_atomic_or: + case nir_intrinsic_image_atomic_xor: + case nir_intrinsic_image_atomic_exchange: + case nir_intrinsic_image_atomic_comp_swap: + result = visit_image_atomic(ctx, instr); + break; + case nir_intrinsic_image_size: + result = visit_image_size(ctx, instr); + break; + case nir_intrinsic_discard: + ctx->shader_info->fs.can_discard = true; + ac_emit_llvm_intrinsic(&ctx->ac, "llvm.AMDGPU.kilp", + ctx->voidt, + NULL, 0, 0); + break; + case nir_intrinsic_discard_if: + emit_discard_if(ctx, instr); + break; + case nir_intrinsic_memory_barrier: + emit_waitcnt(ctx); + break; + case nir_intrinsic_barrier: + emit_barrier(ctx); + break; + case nir_intrinsic_var_atomic_add: + case nir_intrinsic_var_atomic_imin: + case nir_intrinsic_var_atomic_umin: + case nir_intrinsic_var_atomic_imax: + case nir_intrinsic_var_atomic_umax: + case nir_intrinsic_var_atomic_and: + case nir_intrinsic_var_atomic_or: + case nir_intrinsic_var_atomic_xor: + case nir_intrinsic_var_atomic_exchange: + case nir_intrinsic_var_atomic_comp_swap: + result = visit_var_atomic(ctx, instr); + break; + case nir_intrinsic_interp_var_at_centroid: + case nir_intrinsic_interp_var_at_sample: + case nir_intrinsic_interp_var_at_offset: + result = visit_interp(ctx, instr); + break; + default: + fprintf(stderr, "Unknown intrinsic: "); + nir_print_instr(&instr->instr, stderr); + fprintf(stderr, "\n"); + break; + } + if (result) { + _mesa_hash_table_insert(ctx->defs, &instr->dest.ssa, result); + } +} + +static LLVMValueRef get_sampler_desc(struct nir_to_llvm_context *ctx, + nir_deref_var *deref, + enum desc_type desc_type) +{ + unsigned desc_set = deref->var->data.descriptor_set; + LLVMValueRef list = ctx->descriptor_sets[desc_set]; + struct radv_descriptor_set_layout *layout = ctx->options->layout->set[desc_set].layout; + struct radv_descriptor_set_binding_layout *binding = layout->binding + deref->var->data.binding; + unsigned offset = binding->offset; + unsigned stride = binding->size; + unsigned type_size; + LLVMBuilderRef builder = ctx->builder; + LLVMTypeRef type; + LLVMValueRef index = NULL; + + assert(deref->var->data.binding < layout->binding_count); + + switch (desc_type) { + case DESC_IMAGE: + type = ctx->v8i32; + type_size = 32; + break; + case DESC_FMASK: + type = ctx->v8i32; + offset += 32; + type_size = 32; + break; + case DESC_SAMPLER: + type = ctx->v4i32; + if (binding->type == VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER) + offset += 64; + + type_size = 16; + break; + case DESC_BUFFER: + type = ctx->v4i32; + type_size = 16; + break; + default: + unreachable("invalid desc_type\n"); + } + + if (deref->deref.child) { + nir_deref_array *child = (nir_deref_array*)deref->deref.child; + + assert(child->deref_array_type != nir_deref_array_type_wildcard); + offset += child->base_offset * stride; + if (child->deref_array_type == nir_deref_array_type_indirect) { + index = get_src(ctx, child->indirect); + } + } + + assert(stride % type_size == 0); + + if (!index) + index = ctx->i32zero; + + index = LLVMBuildMul(builder, index, LLVMConstInt(ctx->i32, stride / type_size, 0), ""); + + list = build_gep0(ctx, list, LLVMConstInt(ctx->i32, offset, 0)); + list = LLVMBuildPointerCast(builder, list, const_array(type, 0), ""); + + return build_indexed_load_const(ctx, list, index); +} + +static void set_tex_fetch_args(struct nir_to_llvm_context *ctx, + struct ac_tex_info *tinfo, + nir_tex_instr *instr, + nir_texop op, + LLVMValueRef res_ptr, LLVMValueRef samp_ptr, + LLVMValueRef *param, unsigned count, + unsigned dmask) +{ + int num_args; + unsigned is_rect = 0; + bool da = instr->is_array || instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE; + + if (op == nir_texop_lod) + da = false; + /* Pad to power of two vector */ + while (count < util_next_power_of_two(count)) + param[count++] = LLVMGetUndef(ctx->i32); + + if (count > 1) + tinfo->args[0] = ac_build_gather_values(&ctx->ac, param, count); + else + tinfo->args[0] = param[0]; + + tinfo->args[1] = res_ptr; + num_args = 2; + + if (op == nir_texop_txf || + op == nir_texop_txf_ms || + op == nir_texop_query_levels || + op == nir_texop_texture_samples || + op == nir_texop_txs) + tinfo->dst_type = ctx->v4i32; + else { + tinfo->dst_type = ctx->v4f32; + tinfo->args[num_args++] = samp_ptr; + } + + if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF && op == nir_texop_txf) { + tinfo->args[0] = res_ptr; + tinfo->args[1] = LLVMConstInt(ctx->i32, 0, false); + tinfo->args[2] = param[0]; + tinfo->arg_count = 3; + return; + } + + tinfo->args[num_args++] = LLVMConstInt(ctx->i32, dmask, 0); + tinfo->args[num_args++] = LLVMConstInt(ctx->i32, is_rect, 0); /* unorm */ + tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* r128 */ + tinfo->args[num_args++] = LLVMConstInt(ctx->i32, da ? 1 : 0, 0); + tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* glc */ + tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* slc */ + tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* tfe */ + tinfo->args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* lwe */ + + tinfo->arg_count = num_args; +} + +/* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL. + * + * SI-CI: + * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic + * filtering manually. The driver sets img7 to a mask clearing + * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do: + * s_and_b32 samp0, samp0, img7 + * + * VI: + * The ANISO_OVERRIDE sampler field enables this fix in TA. + */ +static LLVMValueRef sici_fix_sampler_aniso(struct nir_to_llvm_context *ctx, + LLVMValueRef res, LLVMValueRef samp) +{ + LLVMBuilderRef builder = ctx->builder; + LLVMValueRef img7, samp0; + + if (ctx->options->chip_class >= VI) + return samp; + + img7 = LLVMBuildExtractElement(builder, res, + LLVMConstInt(ctx->i32, 7, 0), ""); + samp0 = LLVMBuildExtractElement(builder, samp, + LLVMConstInt(ctx->i32, 0, 0), ""); + samp0 = LLVMBuildAnd(builder, samp0, img7, ""); + return LLVMBuildInsertElement(builder, samp, samp0, + LLVMConstInt(ctx->i32, 0, 0), ""); +} + +static void tex_fetch_ptrs(struct nir_to_llvm_context *ctx, + nir_tex_instr *instr, + LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr, + LLVMValueRef *fmask_ptr) +{ + if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) + *res_ptr = get_sampler_desc(ctx, instr->texture, DESC_BUFFER); + else + *res_ptr = get_sampler_desc(ctx, instr->texture, DESC_IMAGE); + if (samp_ptr) { + if (instr->sampler) + *samp_ptr = get_sampler_desc(ctx, instr->sampler, DESC_SAMPLER); + else + *samp_ptr = get_sampler_desc(ctx, instr->texture, DESC_SAMPLER); + if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT) + *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr); + } + if (fmask_ptr && !instr->sampler && (instr->op == nir_texop_txf_ms || + instr->op == nir_texop_samples_identical)) + *fmask_ptr = get_sampler_desc(ctx, instr->texture, DESC_FMASK); +} + +static LLVMValueRef apply_round_slice(struct nir_to_llvm_context *ctx, + LLVMValueRef coord) +{ + coord = to_float(ctx, coord); + coord = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.rint.f32", ctx->f32, &coord, 1, 0); + coord = to_integer(ctx, coord); + return coord; +} + +static void visit_tex(struct nir_to_llvm_context *ctx, nir_tex_instr *instr) +{ + LLVMValueRef result = NULL; + struct ac_tex_info tinfo = { 0 }; + unsigned dmask = 0xf; + LLVMValueRef address[16]; + LLVMValueRef coords[5]; + LLVMValueRef coord = NULL, lod = NULL, comparator = NULL; + LLVMValueRef bias = NULL, offsets = NULL; + LLVMValueRef res_ptr, samp_ptr, fmask_ptr = NULL, sample_index = NULL; + LLVMValueRef ddx = NULL, ddy = NULL; + LLVMValueRef derivs[6]; + unsigned chan, count = 0; + unsigned const_src = 0, num_deriv_comp = 0; + + tex_fetch_ptrs(ctx, instr, &res_ptr, &samp_ptr, &fmask_ptr); + + for (unsigned i = 0; i < instr->num_srcs; i++) { + switch (instr->src[i].src_type) { + case nir_tex_src_coord: + coord = get_src(ctx, instr->src[i].src); + break; + case nir_tex_src_projector: + break; + case nir_tex_src_comparator: + comparator = get_src(ctx, instr->src[i].src); + break; + case nir_tex_src_offset: + offsets = get_src(ctx, instr->src[i].src); + const_src = i; + break; + case nir_tex_src_bias: + bias = get_src(ctx, instr->src[i].src); + break; + case nir_tex_src_lod: + lod = get_src(ctx, instr->src[i].src); + break; + case nir_tex_src_ms_index: + sample_index = get_src(ctx, instr->src[i].src); + break; + case nir_tex_src_ms_mcs: + break; + case nir_tex_src_ddx: + ddx = get_src(ctx, instr->src[i].src); + num_deriv_comp = instr->src[i].src.ssa->num_components; + break; + case nir_tex_src_ddy: + ddy = get_src(ctx, instr->src[i].src); + break; + case nir_tex_src_texture_offset: + case nir_tex_src_sampler_offset: + case nir_tex_src_plane: + default: + break; + } + } + + if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) { + result = get_buffer_size(ctx, res_ptr, true); + goto write_result; + } + + if (instr->op == nir_texop_texture_samples) { + LLVMValueRef res, samples, is_msaa; + res = LLVMBuildBitCast(ctx->builder, res_ptr, ctx->v8i32, ""); + samples = LLVMBuildExtractElement(ctx->builder, res, + LLVMConstInt(ctx->i32, 3, false), ""); + is_msaa = LLVMBuildLShr(ctx->builder, samples, + LLVMConstInt(ctx->i32, 28, false), ""); + is_msaa = LLVMBuildAnd(ctx->builder, is_msaa, + LLVMConstInt(ctx->i32, 0xe, false), ""); + is_msaa = LLVMBuildICmp(ctx->builder, LLVMIntEQ, is_msaa, + LLVMConstInt(ctx->i32, 0xe, false), ""); + + samples = LLVMBuildLShr(ctx->builder, samples, + LLVMConstInt(ctx->i32, 16, false), ""); + samples = LLVMBuildAnd(ctx->builder, samples, + LLVMConstInt(ctx->i32, 0xf, false), ""); + samples = LLVMBuildShl(ctx->builder, ctx->i32one, + samples, ""); + samples = LLVMBuildSelect(ctx->builder, is_msaa, samples, + ctx->i32one, ""); + result = samples; + goto write_result; + } + + if (coord) + for (chan = 0; chan < instr->coord_components; chan++) + coords[chan] = llvm_extract_elem(ctx, coord, chan); + + if (offsets && instr->op != nir_texop_txf) { + LLVMValueRef offset[3], pack; + for (chan = 0; chan < 3; ++chan) + offset[chan] = ctx->i32zero; + + tinfo.has_offset = true; + for (chan = 0; chan < get_llvm_num_components(offsets); chan++) { + offset[chan] = llvm_extract_elem(ctx, offsets, chan); + offset[chan] = LLVMBuildAnd(ctx->builder, offset[chan], + LLVMConstInt(ctx->i32, 0x3f, false), ""); + if (chan) + offset[chan] = LLVMBuildShl(ctx->builder, offset[chan], + LLVMConstInt(ctx->i32, chan * 8, false), ""); + } + pack = LLVMBuildOr(ctx->builder, offset[0], offset[1], ""); + pack = LLVMBuildOr(ctx->builder, pack, offset[2], ""); + address[count++] = pack; + + } + /* pack LOD bias value */ + if (instr->op == nir_texop_txb && bias) { + address[count++] = bias; + } + + /* Pack depth comparison value */ + if (instr->is_shadow && comparator) { + address[count++] = llvm_extract_elem(ctx, comparator, 0); + } + + /* pack derivatives */ + if (ddx || ddy) { + switch (instr->sampler_dim) { + case GLSL_SAMPLER_DIM_3D: + case GLSL_SAMPLER_DIM_CUBE: + num_deriv_comp = 3; + break; + case GLSL_SAMPLER_DIM_2D: + default: + num_deriv_comp = 2; + break; + case GLSL_SAMPLER_DIM_1D: + num_deriv_comp = 1; + break; + } + + for (unsigned i = 0; i < num_deriv_comp; i++) { + derivs[i * 2] = to_float(ctx, llvm_extract_elem(ctx, ddx, i)); + derivs[i * 2 + 1] = to_float(ctx, llvm_extract_elem(ctx, ddy, i)); + } + } + + if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && coord) { + for (chan = 0; chan < instr->coord_components; chan++) + coords[chan] = to_float(ctx, coords[chan]); + if (instr->coord_components == 3) + coords[3] = LLVMGetUndef(ctx->f32); + ac_prepare_cube_coords(&ctx->ac, + instr->op == nir_texop_txd, instr->is_array, + coords, derivs); + if (num_deriv_comp) + num_deriv_comp--; + } + + if (ddx || ddy) { + for (unsigned i = 0; i < num_deriv_comp * 2; i++) + address[count++] = derivs[i]; + } + + /* Pack texture coordinates */ + if (coord) { + address[count++] = coords[0]; + if (instr->coord_components > 1) { + if (instr->sampler_dim == GLSL_SAMPLER_DIM_1D && instr->is_array && instr->op != nir_texop_txf) { + coords[1] = apply_round_slice(ctx, coords[1]); + } + address[count++] = coords[1]; + } + if (instr->coord_components > 2) { + /* This seems like a bit of a hack - but it passes Vulkan CTS with it */ + if (instr->sampler_dim != GLSL_SAMPLER_DIM_3D && instr->op != nir_texop_txf) { + coords[2] = apply_round_slice(ctx, coords[2]); + } + address[count++] = coords[2]; + } + } + + /* Pack LOD */ + if ((instr->op == nir_texop_txl || instr->op == nir_texop_txf) && lod) { + address[count++] = lod; + } else if (instr->op == nir_texop_txf_ms && sample_index) { + address[count++] = sample_index; + } else if(instr->op == nir_texop_txs) { + count = 0; + if (lod) + address[count++] = lod; + else + address[count++] = ctx->i32zero; + } + + for (chan = 0; chan < count; chan++) { + address[chan] = LLVMBuildBitCast(ctx->builder, + address[chan], ctx->i32, ""); + } + + if (instr->op == nir_texop_samples_identical) { + LLVMValueRef txf_address[4]; + struct ac_tex_info txf_info = { 0 }; + unsigned txf_count = count; + memcpy(txf_address, address, sizeof(txf_address)); + + if (!instr->is_array) + txf_address[2] = ctx->i32zero; + txf_address[3] = ctx->i32zero; + + set_tex_fetch_args(ctx, &txf_info, instr, nir_texop_txf, + fmask_ptr, NULL, + txf_address, txf_count, 0xf); + + result = build_tex_intrinsic(ctx, instr, &txf_info); + + result = LLVMBuildExtractElement(ctx->builder, result, ctx->i32zero, ""); + result = emit_int_cmp(ctx, LLVMIntEQ, result, ctx->i32zero); + goto write_result; + } + + /* Adjust the sample index according to FMASK. + * + * For uncompressed MSAA surfaces, FMASK should return 0x76543210, + * which is the identity mapping. Each nibble says which physical sample + * should be fetched to get that sample. + * + * For example, 0x11111100 means there are only 2 samples stored and + * the second sample covers 3/4 of the pixel. When reading samples 0 + * and 1, return physical sample 0 (determined by the first two 0s + * in FMASK), otherwise return physical sample 1. + * + * The sample index should be adjusted as follows: + * sample_index = (fmask >> (sample_index * 4)) & 0xF; + */ + if (instr->sampler_dim == GLSL_SAMPLER_DIM_MS && + instr->op != nir_texop_txs) { + LLVMValueRef txf_address[4]; + struct ac_tex_info txf_info = { 0 }; + unsigned txf_count = count; + memcpy(txf_address, address, sizeof(txf_address)); + + if (!instr->is_array) + txf_address[2] = ctx->i32zero; + txf_address[3] = ctx->i32zero; + + set_tex_fetch_args(ctx, &txf_info, instr, nir_texop_txf, + fmask_ptr, NULL, + txf_address, txf_count, 0xf); + + result = build_tex_intrinsic(ctx, instr, &txf_info); + LLVMValueRef four = LLVMConstInt(ctx->i32, 4, false); + LLVMValueRef F = LLVMConstInt(ctx->i32, 0xf, false); + + LLVMValueRef fmask = LLVMBuildExtractElement(ctx->builder, + result, + ctx->i32zero, ""); + + unsigned sample_chan = instr->is_array ? 3 : 2; + + LLVMValueRef sample_index4 = + LLVMBuildMul(ctx->builder, address[sample_chan], four, ""); + LLVMValueRef shifted_fmask = + LLVMBuildLShr(ctx->builder, fmask, sample_index4, ""); + LLVMValueRef final_sample = + LLVMBuildAnd(ctx->builder, shifted_fmask, F, ""); + + /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK + * resource descriptor is 0 (invalid), + */ + LLVMValueRef fmask_desc = + LLVMBuildBitCast(ctx->builder, fmask_ptr, + ctx->v8i32, ""); + + LLVMValueRef fmask_word1 = + LLVMBuildExtractElement(ctx->builder, fmask_desc, + ctx->i32one, ""); + + LLVMValueRef word1_is_nonzero = + LLVMBuildICmp(ctx->builder, LLVMIntNE, + fmask_word1, ctx->i32zero, ""); + + /* Replace the MSAA sample index. */ + address[sample_chan] = + LLVMBuildSelect(ctx->builder, word1_is_nonzero, + final_sample, address[sample_chan], ""); + } + + if (offsets && instr->op == nir_texop_txf) { + nir_const_value *const_offset = + nir_src_as_const_value(instr->src[const_src].src); + int num_offsets = instr->src[const_src].src.ssa->num_components; + assert(const_offset); + num_offsets = MIN2(num_offsets, instr->coord_components); + if (num_offsets > 2) + address[2] = LLVMBuildAdd(ctx->builder, + address[2], LLVMConstInt(ctx->i32, const_offset->i32[2], false), ""); + if (num_offsets > 1) + address[1] = LLVMBuildAdd(ctx->builder, + address[1], LLVMConstInt(ctx->i32, const_offset->i32[1], false), ""); + address[0] = LLVMBuildAdd(ctx->builder, + address[0], LLVMConstInt(ctx->i32, const_offset->i32[0], false), ""); + + } + + /* TODO TG4 support */ + if (instr->op == nir_texop_tg4) { + if (instr->is_shadow) + dmask = 1; + else + dmask = 1 << instr->component; + } + set_tex_fetch_args(ctx, &tinfo, instr, instr->op, + res_ptr, samp_ptr, address, count, dmask); + + result = build_tex_intrinsic(ctx, instr, &tinfo); + + if (instr->op == nir_texop_query_levels) + result = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, 3, false), ""); + else if (instr->is_shadow && instr->op != nir_texop_txs && instr->op != nir_texop_lod && instr->op != nir_texop_tg4) + result = LLVMBuildExtractElement(ctx->builder, result, ctx->i32zero, ""); + else if (instr->op == nir_texop_txs && + instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && + instr->is_array) { + LLVMValueRef two = LLVMConstInt(ctx->i32, 2, false); + LLVMValueRef six = LLVMConstInt(ctx->i32, 6, false); + LLVMValueRef z = LLVMBuildExtractElement(ctx->builder, result, two, ""); + z = LLVMBuildSDiv(ctx->builder, z, six, ""); + result = LLVMBuildInsertElement(ctx->builder, result, z, two, ""); + } else if (instr->dest.ssa.num_components != 4) + result = trim_vector(ctx, result, instr->dest.ssa.num_components); + +write_result: + if (result) { + assert(instr->dest.is_ssa); + result = to_integer(ctx, result); + _mesa_hash_table_insert(ctx->defs, &instr->dest.ssa, result); + } +} + + +static void visit_phi(struct nir_to_llvm_context *ctx, nir_phi_instr *instr) +{ + LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa); + LLVMValueRef result = LLVMBuildPhi(ctx->builder, type, ""); + + _mesa_hash_table_insert(ctx->defs, &instr->dest.ssa, result); + _mesa_hash_table_insert(ctx->phis, instr, result); +} + +static void visit_post_phi(struct nir_to_llvm_context *ctx, + nir_phi_instr *instr, + LLVMValueRef llvm_phi) +{ + nir_foreach_phi_src(src, instr) { + LLVMBasicBlockRef block = get_block(ctx, src->pred); + LLVMValueRef llvm_src = get_src(ctx, src->src); + + LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1); + } +} + +static void phi_post_pass(struct nir_to_llvm_context *ctx) +{ + struct hash_entry *entry; + hash_table_foreach(ctx->phis, entry) { + visit_post_phi(ctx, (nir_phi_instr*)entry->key, + (LLVMValueRef)entry->data); + } +} + + +static void visit_ssa_undef(struct nir_to_llvm_context *ctx, + nir_ssa_undef_instr *instr) +{ + unsigned num_components = instr->def.num_components; + LLVMValueRef undef; + + if (num_components == 1) + undef = LLVMGetUndef(ctx->i32); + else { + undef = LLVMGetUndef(LLVMVectorType(ctx->i32, num_components)); + } + _mesa_hash_table_insert(ctx->defs, &instr->def, undef); +} + +static void visit_jump(struct nir_to_llvm_context *ctx, + nir_jump_instr *instr) +{ + switch (instr->type) { + case nir_jump_break: + LLVMBuildBr(ctx->builder, ctx->break_block); + LLVMClearInsertionPosition(ctx->builder); + break; + case nir_jump_continue: + LLVMBuildBr(ctx->builder, ctx->continue_block); + LLVMClearInsertionPosition(ctx->builder); + break; + default: + fprintf(stderr, "Unknown NIR jump instr: "); + nir_print_instr(&instr->instr, stderr); + fprintf(stderr, "\n"); + abort(); + } +} + +static void visit_cf_list(struct nir_to_llvm_context *ctx, + struct exec_list *list); + +static void visit_block(struct nir_to_llvm_context *ctx, nir_block *block) +{ + LLVMBasicBlockRef llvm_block = LLVMGetInsertBlock(ctx->builder); + nir_foreach_instr(instr, block) + { + switch (instr->type) { + case nir_instr_type_alu: + visit_alu(ctx, nir_instr_as_alu(instr)); + break; + case nir_instr_type_load_const: + visit_load_const(ctx, nir_instr_as_load_const(instr)); + break; + case nir_instr_type_intrinsic: + visit_intrinsic(ctx, nir_instr_as_intrinsic(instr)); + break; + case nir_instr_type_tex: + visit_tex(ctx, nir_instr_as_tex(instr)); + break; + case nir_instr_type_phi: + visit_phi(ctx, nir_instr_as_phi(instr)); + break; + case nir_instr_type_ssa_undef: + visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr)); + break; + case nir_instr_type_jump: + visit_jump(ctx, nir_instr_as_jump(instr)); + break; + default: + fprintf(stderr, "Unknown NIR instr type: "); + nir_print_instr(instr, stderr); + fprintf(stderr, "\n"); + abort(); + } + } + + _mesa_hash_table_insert(ctx->defs, block, llvm_block); +} + +static void visit_if(struct nir_to_llvm_context *ctx, nir_if *if_stmt) +{ + LLVMValueRef value = get_src(ctx, if_stmt->condition); + + LLVMBasicBlockRef merge_block = + LLVMAppendBasicBlockInContext(ctx->context, ctx->main_function, ""); + LLVMBasicBlockRef if_block = + LLVMAppendBasicBlockInContext(ctx->context, ctx->main_function, ""); + LLVMBasicBlockRef else_block = merge_block; + if (!exec_list_is_empty(&if_stmt->else_list)) + else_block = LLVMAppendBasicBlockInContext( + ctx->context, ctx->main_function, ""); + + LLVMValueRef cond = LLVMBuildICmp(ctx->builder, LLVMIntNE, value, + LLVMConstInt(ctx->i32, 0, false), ""); + LLVMBuildCondBr(ctx->builder, cond, if_block, else_block); + + LLVMPositionBuilderAtEnd(ctx->builder, if_block); + visit_cf_list(ctx, &if_stmt->then_list); + if (LLVMGetInsertBlock(ctx->builder)) + LLVMBuildBr(ctx->builder, merge_block); + + if (!exec_list_is_empty(&if_stmt->else_list)) { + LLVMPositionBuilderAtEnd(ctx->builder, else_block); + visit_cf_list(ctx, &if_stmt->else_list); + if (LLVMGetInsertBlock(ctx->builder)) + LLVMBuildBr(ctx->builder, merge_block); + } + + LLVMPositionBuilderAtEnd(ctx->builder, merge_block); +} + +static void visit_loop(struct nir_to_llvm_context *ctx, nir_loop *loop) +{ + LLVMBasicBlockRef continue_parent = ctx->continue_block; + LLVMBasicBlockRef break_parent = ctx->break_block; + + ctx->continue_block = + LLVMAppendBasicBlockInContext(ctx->context, ctx->main_function, ""); + ctx->break_block = + LLVMAppendBasicBlockInContext(ctx->context, ctx->main_function, ""); + + LLVMBuildBr(ctx->builder, ctx->continue_block); + LLVMPositionBuilderAtEnd(ctx->builder, ctx->continue_block); + visit_cf_list(ctx, &loop->body); + + if (LLVMGetInsertBlock(ctx->builder)) + LLVMBuildBr(ctx->builder, ctx->continue_block); + LLVMPositionBuilderAtEnd(ctx->builder, ctx->break_block); + + ctx->continue_block = continue_parent; + ctx->break_block = break_parent; +} + +static void visit_cf_list(struct nir_to_llvm_context *ctx, + struct exec_list *list) +{ + foreach_list_typed(nir_cf_node, node, node, list) + { + switch (node->type) { + case nir_cf_node_block: + visit_block(ctx, nir_cf_node_as_block(node)); + break; + + case nir_cf_node_if: + visit_if(ctx, nir_cf_node_as_if(node)); + break; + + case nir_cf_node_loop: + visit_loop(ctx, nir_cf_node_as_loop(node)); + break; + + default: + assert(0); + } + } +} + +static void +handle_vs_input_decl(struct nir_to_llvm_context *ctx, + struct nir_variable *variable) +{ + LLVMValueRef t_list_ptr = ctx->vertex_buffers; + LLVMValueRef t_offset; + LLVMValueRef t_list; + LLVMValueRef args[3]; + LLVMValueRef input; + LLVMValueRef buffer_index; + int index = variable->data.location - VERT_ATTRIB_GENERIC0; + int idx = variable->data.location; + unsigned attrib_count = glsl_count_attribute_slots(variable->type, true); + + variable->data.driver_location = idx * 4; + + if (ctx->options->key.vs.instance_rate_inputs & (1u << index)) { + buffer_index = LLVMBuildAdd(ctx->builder, ctx->instance_id, + ctx->start_instance, ""); + ctx->shader_info->vs.vgpr_comp_cnt = MAX2(3, + ctx->shader_info->vs.vgpr_comp_cnt); + } else + buffer_index = LLVMBuildAdd(ctx->builder, ctx->vertex_id, + ctx->base_vertex, ""); + + for (unsigned i = 0; i < attrib_count; ++i, ++idx) { + t_offset = LLVMConstInt(ctx->i32, index + i, false); + + t_list = build_indexed_load_const(ctx, t_list_ptr, t_offset); + args[0] = t_list; + args[1] = LLVMConstInt(ctx->i32, 0, false); + args[2] = buffer_index; + input = ac_emit_llvm_intrinsic(&ctx->ac, + "llvm.SI.vs.load.input", ctx->v4f32, args, 3, + AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_NOUNWIND); + + for (unsigned chan = 0; chan < 4; chan++) { + LLVMValueRef llvm_chan = LLVMConstInt(ctx->i32, chan, false); + ctx->inputs[radeon_llvm_reg_index_soa(idx, chan)] = + to_integer(ctx, LLVMBuildExtractElement(ctx->builder, + input, llvm_chan, "")); + } + } +} + + +static void interp_fs_input(struct nir_to_llvm_context *ctx, + unsigned attr, + LLVMValueRef interp_param, + LLVMValueRef prim_mask, + LLVMValueRef result[4]) +{ + const char *intr_name; + LLVMValueRef attr_number; + unsigned chan; + + attr_number = LLVMConstInt(ctx->i32, attr, false); + + /* fs.constant returns the param from the middle vertex, so it's not + * really useful for flat shading. It's meant to be used for custom + * interpolation (but the intrinsic can't fetch from the other two + * vertices). + * + * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state + * to do the right thing. The only reason we use fs.constant is that + * fs.interp cannot be used on integers, because they can be equal + * to NaN. + */ + intr_name = interp_param ? "llvm.SI.fs.interp" : "llvm.SI.fs.constant"; + + for (chan = 0; chan < 4; chan++) { + LLVMValueRef args[4]; + LLVMValueRef llvm_chan = LLVMConstInt(ctx->i32, chan, false); + + args[0] = llvm_chan; + args[1] = attr_number; + args[2] = prim_mask; + args[3] = interp_param; + result[chan] = ac_emit_llvm_intrinsic(&ctx->ac, intr_name, + ctx->f32, args, args[3] ? 4 : 3, + AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_NOUNWIND); + } +} + +static void +handle_fs_input_decl(struct nir_to_llvm_context *ctx, + struct nir_variable *variable) +{ + int idx = variable->data.location; + unsigned attrib_count = glsl_count_attribute_slots(variable->type, false); + LLVMValueRef interp; + + variable->data.driver_location = idx * 4; + ctx->input_mask |= ((1ull << attrib_count) - 1) << variable->data.location; + + if (glsl_get_base_type(glsl_without_array(variable->type)) == GLSL_TYPE_FLOAT) { + unsigned interp_type; + if (variable->data.sample) { + interp_type = INTERP_SAMPLE; + ctx->shader_info->fs.force_persample = true; + } else if (variable->data.centroid) + interp_type = INTERP_CENTROID; + else + interp_type = INTERP_CENTER; + + interp = lookup_interp_param(ctx, variable->data.interpolation, interp_type); + } else + interp = NULL; + + for (unsigned i = 0; i < attrib_count; ++i) + ctx->inputs[radeon_llvm_reg_index_soa(idx + i, 0)] = interp; + +} + +static void +handle_shader_input_decl(struct nir_to_llvm_context *ctx, + struct nir_variable *variable) +{ + switch (ctx->stage) { + case MESA_SHADER_VERTEX: + handle_vs_input_decl(ctx, variable); + break; + case MESA_SHADER_FRAGMENT: + handle_fs_input_decl(ctx, variable); + break; + default: + break; + } + +} + +static void +handle_fs_inputs_pre(struct nir_to_llvm_context *ctx, + struct nir_shader *nir) +{ + unsigned index = 0; + for (unsigned i = 0; i < RADEON_LLVM_MAX_INPUTS; ++i) { + LLVMValueRef interp_param; + LLVMValueRef *inputs = ctx->inputs +radeon_llvm_reg_index_soa(i, 0); + + if (!(ctx->input_mask & (1ull << i))) + continue; + + if (i >= VARYING_SLOT_VAR0 || i == VARYING_SLOT_PNTC) { + interp_param = *inputs; + interp_fs_input(ctx, index, interp_param, ctx->prim_mask, + inputs); + + if (!interp_param) + ctx->shader_info->fs.flat_shaded_mask |= 1u << index; + ++index; + } else if (i == VARYING_SLOT_POS) { + for(int i = 0; i < 3; ++i) + inputs[i] = ctx->frag_pos[i]; + + inputs[3] = ac_emit_fdiv(&ctx->ac, ctx->f32one, ctx->frag_pos[3]); + } + } + ctx->shader_info->fs.num_interp = index; + if (ctx->input_mask & (1 << VARYING_SLOT_PNTC)) + ctx->shader_info->fs.has_pcoord = true; + ctx->shader_info->fs.input_mask = ctx->input_mask >> VARYING_SLOT_VAR0; +} + +static LLVMValueRef +ac_build_alloca(struct nir_to_llvm_context *ctx, + LLVMTypeRef type, + const char *name) +{ + LLVMBuilderRef builder = ctx->builder; + LLVMBasicBlockRef current_block = LLVMGetInsertBlock(builder); + LLVMValueRef function = LLVMGetBasicBlockParent(current_block); + LLVMBasicBlockRef first_block = LLVMGetEntryBasicBlock(function); + LLVMValueRef first_instr = LLVMGetFirstInstruction(first_block); + LLVMBuilderRef first_builder = LLVMCreateBuilderInContext(ctx->context); + LLVMValueRef res; + + if (first_instr) { + LLVMPositionBuilderBefore(first_builder, first_instr); + } else { + LLVMPositionBuilderAtEnd(first_builder, first_block); + } + + res = LLVMBuildAlloca(first_builder, type, name); + LLVMBuildStore(builder, LLVMConstNull(type), res); + + LLVMDisposeBuilder(first_builder); + + return res; +} + +static LLVMValueRef si_build_alloca_undef(struct nir_to_llvm_context *ctx, + LLVMTypeRef type, + const char *name) +{ + LLVMValueRef ptr = ac_build_alloca(ctx, type, name); + LLVMBuildStore(ctx->builder, LLVMGetUndef(type), ptr); + return ptr; +} + +static void +handle_shader_output_decl(struct nir_to_llvm_context *ctx, + struct nir_variable *variable) +{ + int idx = variable->data.location + variable->data.index; + unsigned attrib_count = glsl_count_attribute_slots(variable->type, false); + + variable->data.driver_location = idx * 4; + + if (ctx->stage == MESA_SHADER_VERTEX) { + + if (idx == VARYING_SLOT_CLIP_DIST0 || + idx == VARYING_SLOT_CULL_DIST0) { + int length = glsl_get_length(variable->type); + if (idx == VARYING_SLOT_CLIP_DIST0) { + ctx->shader_info->vs.clip_dist_mask = (1 << length) - 1; + ctx->num_clips = length; + } else if (idx == VARYING_SLOT_CULL_DIST0) { + ctx->shader_info->vs.cull_dist_mask = (1 << length) - 1; + ctx->num_culls = length; + } + if (length > 4) + attrib_count = 2; + else + attrib_count = 1; + } + } + + for (unsigned i = 0; i < attrib_count; ++i) { + for (unsigned chan = 0; chan < 4; chan++) { + ctx->outputs[radeon_llvm_reg_index_soa(idx + i, chan)] = + si_build_alloca_undef(ctx, ctx->f32, ""); + } + } + ctx->output_mask |= ((1ull << attrib_count) - 1) << idx; +} + +static void +setup_locals(struct nir_to_llvm_context *ctx, + struct nir_function *func) +{ + int i, j; + ctx->num_locals = 0; + nir_foreach_variable(variable, &func->impl->locals) { + unsigned attrib_count = glsl_count_attribute_slots(variable->type, false); + variable->data.driver_location = ctx->num_locals * 4; + ctx->num_locals += attrib_count; + } + ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef)); + if (!ctx->locals) + return; + + for (i = 0; i < ctx->num_locals; i++) { + for (j = 0; j < 4; j++) { + ctx->locals[i * 4 + j] = + si_build_alloca_undef(ctx, ctx->f32, "temp"); + } + } +} + +static LLVMValueRef +emit_float_saturate(struct nir_to_llvm_context *ctx, LLVMValueRef v, float lo, float hi) +{ + v = to_float(ctx, v); + v = emit_intrin_2f_param(ctx, "llvm.maxnum.f32", v, LLVMConstReal(ctx->f32, lo)); + return emit_intrin_2f_param(ctx, "llvm.minnum.f32", v, LLVMConstReal(ctx->f32, hi)); +} + + +static LLVMValueRef emit_pack_int16(struct nir_to_llvm_context *ctx, + LLVMValueRef src0, LLVMValueRef src1) +{ + LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false); + LLVMValueRef comp[2]; + + comp[0] = LLVMBuildAnd(ctx->builder, src0, LLVMConstInt(ctx-> i32, 65535, 0), ""); + comp[1] = LLVMBuildAnd(ctx->builder, src1, LLVMConstInt(ctx-> i32, 65535, 0), ""); + comp[1] = LLVMBuildShl(ctx->builder, comp[1], const16, ""); + return LLVMBuildOr(ctx->builder, comp[0], comp[1], ""); +} + +/* Initialize arguments for the shader export intrinsic */ +static void +si_llvm_init_export_args(struct nir_to_llvm_context *ctx, + LLVMValueRef *values, + unsigned target, + LLVMValueRef *args) +{ + /* Default is 0xf. Adjusted below depending on the format. */ + args[0] = LLVMConstInt(ctx->i32, target != V_008DFC_SQ_EXP_NULL ? 0xf : 0, false); + /* Specify whether the EXEC mask represents the valid mask */ + args[1] = LLVMConstInt(ctx->i32, 0, false); + + /* Specify whether this is the last export */ + args[2] = LLVMConstInt(ctx->i32, 0, false); + /* Specify the target we are exporting */ + args[3] = LLVMConstInt(ctx->i32, target, false); + + args[4] = LLVMConstInt(ctx->i32, 0, false); /* COMPR flag */ + args[5] = LLVMGetUndef(ctx->f32); + args[6] = LLVMGetUndef(ctx->f32); + args[7] = LLVMGetUndef(ctx->f32); + args[8] = LLVMGetUndef(ctx->f32); + + if (!values) + return; + + if (ctx->stage == MESA_SHADER_FRAGMENT && target >= V_008DFC_SQ_EXP_MRT) { + LLVMValueRef val[4]; + unsigned index = target - V_008DFC_SQ_EXP_MRT; + unsigned col_format = (ctx->options->key.fs.col_format >> (4 * index)) & 0xf; + bool is_int8 = (ctx->options->key.fs.is_int8 >> index) & 1; + + switch(col_format) { + case V_028714_SPI_SHADER_ZERO: + args[0] = LLVMConstInt(ctx->i32, 0x0, 0); + args[3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_NULL, 0); + break; + + case V_028714_SPI_SHADER_32_R: + args[0] = LLVMConstInt(ctx->i32, 0x1, 0); + args[5] = values[0]; + break; + + case V_028714_SPI_SHADER_32_GR: + args[0] = LLVMConstInt(ctx->i32, 0x3, 0); + args[5] = values[0]; + args[6] = values[1]; + break; + + case V_028714_SPI_SHADER_32_AR: + args[0] = LLVMConstInt(ctx->i32, 0x9, 0); + args[5] = values[0]; + args[8] = values[3]; + break; + + case V_028714_SPI_SHADER_FP16_ABGR: + args[4] = ctx->i32one; + + for (unsigned chan = 0; chan < 2; chan++) { + LLVMValueRef pack_args[2] = { + values[2 * chan], + values[2 * chan + 1] + }; + LLVMValueRef packed; + + packed = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.SI.packf16", + ctx->i32, pack_args, 2, + AC_FUNC_ATTR_READNONE); + args[chan + 5] = packed; + } + break; + + case V_028714_SPI_SHADER_UNORM16_ABGR: + for (unsigned chan = 0; chan < 4; chan++) { + val[chan] = emit_float_saturate(ctx, values[chan], 0, 1); + val[chan] = LLVMBuildFMul(ctx->builder, val[chan], + LLVMConstReal(ctx->f32, 65535), ""); + val[chan] = LLVMBuildFAdd(ctx->builder, val[chan], + LLVMConstReal(ctx->f32, 0.5), ""); + val[chan] = LLVMBuildFPToUI(ctx->builder, val[chan], + ctx->i32, ""); + } + + args[4] = ctx->i32one; + args[5] = emit_pack_int16(ctx, val[0], val[1]); + args[6] = emit_pack_int16(ctx, val[2], val[3]); + break; + + case V_028714_SPI_SHADER_SNORM16_ABGR: + for (unsigned chan = 0; chan < 4; chan++) { + val[chan] = emit_float_saturate(ctx, values[chan], -1, 1); + val[chan] = LLVMBuildFMul(ctx->builder, val[chan], + LLVMConstReal(ctx->f32, 32767), ""); + + /* If positive, add 0.5, else add -0.5. */ + val[chan] = LLVMBuildFAdd(ctx->builder, val[chan], + LLVMBuildSelect(ctx->builder, + LLVMBuildFCmp(ctx->builder, LLVMRealOGE, + val[chan], ctx->f32zero, ""), + LLVMConstReal(ctx->f32, 0.5), + LLVMConstReal(ctx->f32, -0.5), ""), ""); + val[chan] = LLVMBuildFPToSI(ctx->builder, val[chan], ctx->i32, ""); + } + + args[4] = ctx->i32one; + args[5] = emit_pack_int16(ctx, val[0], val[1]); + args[6] = emit_pack_int16(ctx, val[2], val[3]); + break; + + case V_028714_SPI_SHADER_UINT16_ABGR: { + LLVMValueRef max = LLVMConstInt(ctx->i32, is_int8 ? 255 : 65535, 0); + + for (unsigned chan = 0; chan < 4; chan++) { + val[chan] = to_integer(ctx, values[chan]); + val[chan] = emit_minmax_int(ctx, LLVMIntULT, val[chan], max); + } + + args[4] = ctx->i32one; + args[5] = emit_pack_int16(ctx, val[0], val[1]); + args[6] = emit_pack_int16(ctx, val[2], val[3]); + break; + } + + case V_028714_SPI_SHADER_SINT16_ABGR: { + LLVMValueRef max = LLVMConstInt(ctx->i32, is_int8 ? 127 : 32767, 0); + LLVMValueRef min = LLVMConstInt(ctx->i32, is_int8 ? -128 : -32768, 0); + + /* Clamp. */ + for (unsigned chan = 0; chan < 4; chan++) { + val[chan] = to_integer(ctx, values[chan]); + val[chan] = emit_minmax_int(ctx, LLVMIntSLT, val[chan], max); + val[chan] = emit_minmax_int(ctx, LLVMIntSGT, val[chan], min); + } + + args[4] = ctx->i32one; + args[5] = emit_pack_int16(ctx, val[0], val[1]); + args[6] = emit_pack_int16(ctx, val[2], val[3]); + break; + } + + default: + case V_028714_SPI_SHADER_32_ABGR: + memcpy(&args[5], values, sizeof(values[0]) * 4); + break; + } + } else + memcpy(&args[5], values, sizeof(values[0]) * 4); + + for (unsigned i = 5; i < 9; ++i) + args[i] = to_float(ctx, args[i]); +} + +static void +handle_vs_outputs_post(struct nir_to_llvm_context *ctx) +{ + uint32_t param_count = 0; + unsigned target; + unsigned pos_idx, num_pos_exports = 0; + LLVMValueRef args[9]; + LLVMValueRef pos_args[4][9] = { { 0 } }; + LLVMValueRef psize_value = NULL, layer_value = NULL, viewport_index_value = NULL; + int i; + const uint64_t clip_mask = ctx->output_mask & ((1ull << VARYING_SLOT_CLIP_DIST0) | + (1ull << VARYING_SLOT_CLIP_DIST1) | + (1ull << VARYING_SLOT_CULL_DIST0) | + (1ull << VARYING_SLOT_CULL_DIST1)); + + if (clip_mask) { + LLVMValueRef slots[8]; + unsigned j; + + if (ctx->shader_info->vs.cull_dist_mask) + ctx->shader_info->vs.cull_dist_mask <<= ctx->num_clips; + + i = VARYING_SLOT_CLIP_DIST0; + for (j = 0; j < ctx->num_clips; j++) + slots[j] = to_float(ctx, LLVMBuildLoad(ctx->builder, + ctx->outputs[radeon_llvm_reg_index_soa(i, j)], "")); + i = VARYING_SLOT_CULL_DIST0; + for (j = 0; j < ctx->num_culls; j++) + slots[ctx->num_clips + j] = to_float(ctx, LLVMBuildLoad(ctx->builder, + ctx->outputs[radeon_llvm_reg_index_soa(i, j)], "")); + + for (i = ctx->num_clips + ctx->num_culls; i < 8; i++) + slots[i] = LLVMGetUndef(ctx->f32); + + if (ctx->num_clips + ctx->num_culls > 4) { + target = V_008DFC_SQ_EXP_POS + 3; + si_llvm_init_export_args(ctx, &slots[4], target, args); + memcpy(pos_args[target - V_008DFC_SQ_EXP_POS], + args, sizeof(args)); + } + + target = V_008DFC_SQ_EXP_POS + 2; + si_llvm_init_export_args(ctx, &slots[0], target, args); + memcpy(pos_args[target - V_008DFC_SQ_EXP_POS], + args, sizeof(args)); + + } + + for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) { + LLVMValueRef values[4]; + if (!(ctx->output_mask & (1ull << i))) + continue; + + for (unsigned j = 0; j < 4; j++) + values[j] = to_float(ctx, LLVMBuildLoad(ctx->builder, + ctx->outputs[radeon_llvm_reg_index_soa(i, j)], "")); + + if (i == VARYING_SLOT_POS) { + target = V_008DFC_SQ_EXP_POS; + } else if (i == VARYING_SLOT_CLIP_DIST0 || + i == VARYING_SLOT_CLIP_DIST1 || + i == VARYING_SLOT_CULL_DIST0 || + i == VARYING_SLOT_CULL_DIST1) { + continue; + } else if (i == VARYING_SLOT_PSIZ) { + ctx->shader_info->vs.writes_pointsize = true; + psize_value = values[0]; + continue; + } else if (i == VARYING_SLOT_LAYER) { + ctx->shader_info->vs.writes_layer = true; + layer_value = values[0]; + continue; + } else if (i == VARYING_SLOT_VIEWPORT) { + ctx->shader_info->vs.writes_viewport_index = true; + viewport_index_value = values[0]; + continue; + } else if (i >= VARYING_SLOT_VAR0) { + ctx->shader_info->vs.export_mask |= 1u << (i - VARYING_SLOT_VAR0); + target = V_008DFC_SQ_EXP_PARAM + param_count; + param_count++; + } + + si_llvm_init_export_args(ctx, values, target, args); + + if (target >= V_008DFC_SQ_EXP_POS && + target <= (V_008DFC_SQ_EXP_POS + 3)) { + memcpy(pos_args[target - V_008DFC_SQ_EXP_POS], + args, sizeof(args)); + } else { + ac_emit_llvm_intrinsic(&ctx->ac, + "llvm.SI.export", + ctx->voidt, + args, 9, 0); + } + } + + /* We need to add the position output manually if it's missing. */ + if (!pos_args[0][0]) { + pos_args[0][0] = LLVMConstInt(ctx->i32, 0xf, false); + pos_args[0][1] = ctx->i32zero; /* EXEC mask */ + pos_args[0][2] = ctx->i32zero; /* last export? */ + pos_args[0][3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_POS, false); + pos_args[0][4] = ctx->i32zero; /* COMPR flag */ + pos_args[0][5] = ctx->f32zero; /* X */ + pos_args[0][6] = ctx->f32zero; /* Y */ + pos_args[0][7] = ctx->f32zero; /* Z */ + pos_args[0][8] = ctx->f32one; /* W */ + } + + uint32_t mask = ((ctx->shader_info->vs.writes_pointsize == true ? 1 : 0) | + (ctx->shader_info->vs.writes_layer == true ? 4 : 0) | + (ctx->shader_info->vs.writes_viewport_index == true ? 8 : 0)); + if (mask) { + pos_args[1][0] = LLVMConstInt(ctx->i32, mask, false); /* writemask */ + pos_args[1][1] = ctx->i32zero; /* EXEC mask */ + pos_args[1][2] = ctx->i32zero; /* last export? */ + pos_args[1][3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_POS + 1, false); + pos_args[1][4] = ctx->i32zero; /* COMPR flag */ + pos_args[1][5] = ctx->f32zero; /* X */ + pos_args[1][6] = ctx->f32zero; /* Y */ + pos_args[1][7] = ctx->f32zero; /* Z */ + pos_args[1][8] = ctx->f32zero; /* W */ + + if (ctx->shader_info->vs.writes_pointsize == true) + pos_args[1][5] = psize_value; + if (ctx->shader_info->vs.writes_layer == true) + pos_args[1][7] = layer_value; + if (ctx->shader_info->vs.writes_viewport_index == true) + pos_args[1][8] = viewport_index_value; + } + for (i = 0; i < 4; i++) { + if (pos_args[i][0]) + num_pos_exports++; + } + + pos_idx = 0; + for (i = 0; i < 4; i++) { + if (!pos_args[i][0]) + continue; + + /* Specify the target we are exporting */ + pos_args[i][3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_POS + pos_idx++, false); + if (pos_idx == num_pos_exports) + pos_args[i][2] = ctx->i32one; + ac_emit_llvm_intrinsic(&ctx->ac, + "llvm.SI.export", + ctx->voidt, + pos_args[i], 9, 0); + } + + ctx->shader_info->vs.pos_exports = num_pos_exports; + ctx->shader_info->vs.param_exports = param_count; +} + +static void +si_export_mrt_color(struct nir_to_llvm_context *ctx, + LLVMValueRef *color, unsigned param, bool is_last) +{ + LLVMValueRef args[9]; + /* Export */ + si_llvm_init_export_args(ctx, color, param, + args); + + if (is_last) { + args[1] = ctx->i32one; /* whether the EXEC mask is valid */ + args[2] = ctx->i32one; /* DONE bit */ + } else if (args[0] == ctx->i32zero) + return; /* unnecessary NULL export */ + + ac_emit_llvm_intrinsic(&ctx->ac, "llvm.SI.export", + ctx->voidt, args, 9, 0); +} + +static void +si_export_mrt_z(struct nir_to_llvm_context *ctx, + LLVMValueRef depth, LLVMValueRef stencil, + LLVMValueRef samplemask) +{ + LLVMValueRef args[9]; + unsigned mask = 0; + args[1] = ctx->i32one; /* whether the EXEC mask is valid */ + args[2] = ctx->i32one; /* DONE bit */ + /* Specify the target we are exporting */ + args[3] = LLVMConstInt(ctx->i32, V_008DFC_SQ_EXP_MRTZ, false); + + args[4] = ctx->i32zero; /* COMP flag */ + args[5] = LLVMGetUndef(ctx->f32); /* R, depth */ + args[6] = LLVMGetUndef(ctx->f32); /* G, stencil test val[0:7], stencil op val[8:15] */ + args[7] = LLVMGetUndef(ctx->f32); /* B, sample mask */ + args[8] = LLVMGetUndef(ctx->f32); /* A, alpha to mask */ + + if (depth) { + args[5] = depth; + mask |= 0x1; + } + + if (stencil) { + args[6] = stencil; + mask |= 0x2; + } + + if (samplemask) { + args[7] = samplemask; + mask |= 0x04; + } + + /* SI (except OLAND) has a bug that it only looks + * at the X writemask component. */ + if (ctx->options->chip_class == SI && + ctx->options->family != CHIP_OLAND) + mask |= 0x01; + + args[0] = LLVMConstInt(ctx->i32, mask, false); + ac_emit_llvm_intrinsic(&ctx->ac, "llvm.SI.export", + ctx->voidt, args, 9, 0); +} + +static void +handle_fs_outputs_post(struct nir_to_llvm_context *ctx) +{ + unsigned index = 0; + LLVMValueRef depth = NULL, stencil = NULL, samplemask = NULL; + + for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) { + LLVMValueRef values[4]; + + if (!(ctx->output_mask & (1ull << i))) + continue; + + if (i == FRAG_RESULT_DEPTH) { + ctx->shader_info->fs.writes_z = true; + depth = to_float(ctx, LLVMBuildLoad(ctx->builder, + ctx->outputs[radeon_llvm_reg_index_soa(i, 0)], "")); + } else if (i == FRAG_RESULT_STENCIL) { + ctx->shader_info->fs.writes_stencil = true; + stencil = to_float(ctx, LLVMBuildLoad(ctx->builder, + ctx->outputs[radeon_llvm_reg_index_soa(i, 0)], "")); + } else { + bool last = false; + for (unsigned j = 0; j < 4; j++) + values[j] = to_float(ctx, LLVMBuildLoad(ctx->builder, + ctx->outputs[radeon_llvm_reg_index_soa(i, j)], "")); + + if (!ctx->shader_info->fs.writes_z && !ctx->shader_info->fs.writes_stencil) + last = ctx->output_mask <= ((1ull << (i + 1)) - 1); + + si_export_mrt_color(ctx, values, V_008DFC_SQ_EXP_MRT + index, last); + index++; + } + } + + if (depth || stencil) + si_export_mrt_z(ctx, depth, stencil, samplemask); + else if (!index) + si_export_mrt_color(ctx, NULL, V_008DFC_SQ_EXP_NULL, true); + + ctx->shader_info->fs.output_mask = index ? ((1ull << index) - 1) : 0; +} + +static void +handle_shader_outputs_post(struct nir_to_llvm_context *ctx) +{ + switch (ctx->stage) { + case MESA_SHADER_VERTEX: + handle_vs_outputs_post(ctx); + break; + case MESA_SHADER_FRAGMENT: + handle_fs_outputs_post(ctx); + break; + default: + break; + } +} + +static void +handle_shared_compute_var(struct nir_to_llvm_context *ctx, + struct nir_variable *variable, uint32_t *offset, int idx) +{ + unsigned size = glsl_count_attribute_slots(variable->type, false); + variable->data.driver_location = *offset; + *offset += size; +} + +static void ac_llvm_finalize_module(struct nir_to_llvm_context * ctx) +{ + LLVMPassManagerRef passmgr; + /* Create the pass manager */ + passmgr = LLVMCreateFunctionPassManagerForModule( + ctx->module); + + /* This pass should eliminate all the load and store instructions */ + LLVMAddPromoteMemoryToRegisterPass(passmgr); + + /* Add some optimization passes */ + LLVMAddScalarReplAggregatesPass(passmgr); + LLVMAddLICMPass(passmgr); + LLVMAddAggressiveDCEPass(passmgr); + LLVMAddCFGSimplificationPass(passmgr); + LLVMAddInstructionCombiningPass(passmgr); + + /* Run the pass */ + LLVMInitializeFunctionPassManager(passmgr); + LLVMRunFunctionPassManager(passmgr, ctx->main_function); + LLVMFinalizeFunctionPassManager(passmgr); + + LLVMDisposeBuilder(ctx->builder); + LLVMDisposePassManager(passmgr); +} + +static +LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm, + struct nir_shader *nir, + struct ac_shader_variant_info *shader_info, + const struct ac_nir_compiler_options *options) +{ + struct nir_to_llvm_context ctx = {0}; + struct nir_function *func; + unsigned i; + ctx.options = options; + ctx.shader_info = shader_info; + ctx.context = LLVMContextCreate(); + ctx.module = LLVMModuleCreateWithNameInContext("shader", ctx.context); + + ac_llvm_context_init(&ctx.ac, ctx.context); + ctx.ac.module = ctx.module; + + ctx.has_ds_bpermute = ctx.options->chip_class >= VI; + + memset(shader_info, 0, sizeof(*shader_info)); + + LLVMSetTarget(ctx.module, "amdgcn--"); + + LLVMTargetDataRef data_layout = LLVMCreateTargetDataLayout(tm); + char *data_layout_str = LLVMCopyStringRepOfTargetData(data_layout); + LLVMSetDataLayout(ctx.module, data_layout_str); + LLVMDisposeTargetData(data_layout); + LLVMDisposeMessage(data_layout_str); + + setup_types(&ctx); + + ctx.builder = LLVMCreateBuilderInContext(ctx.context); + ctx.ac.builder = ctx.builder; + ctx.stage = nir->stage; + + for (i = 0; i < AC_UD_MAX_SETS; i++) + shader_info->user_sgprs_locs.descriptor_sets[i].sgpr_idx = -1; + for (i = 0; i < AC_UD_MAX_UD; i++) + shader_info->user_sgprs_locs.shader_data[i].sgpr_idx = -1; + + create_function(&ctx); + + if (nir->stage == MESA_SHADER_COMPUTE) { + int num_shared = 0; + nir_foreach_variable(variable, &nir->shared) + num_shared++; + if (num_shared) { + int idx = 0; + uint32_t shared_size = 0; + LLVMValueRef var; + LLVMTypeRef i8p = LLVMPointerType(ctx.i8, LOCAL_ADDR_SPACE); + nir_foreach_variable(variable, &nir->shared) { + handle_shared_compute_var(&ctx, variable, &shared_size, idx); + idx++; + } + + shared_size *= 16; + var = LLVMAddGlobalInAddressSpace(ctx.module, + LLVMArrayType(ctx.i8, shared_size), + "compute_lds", + LOCAL_ADDR_SPACE); + LLVMSetAlignment(var, 4); + ctx.shared_memory = LLVMBuildBitCast(ctx.builder, var, i8p, ""); + } + } + + nir_foreach_variable(variable, &nir->inputs) + handle_shader_input_decl(&ctx, variable); + + if (nir->stage == MESA_SHADER_FRAGMENT) + handle_fs_inputs_pre(&ctx, nir); + + nir_foreach_variable(variable, &nir->outputs) + handle_shader_output_decl(&ctx, variable); + + ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer, + _mesa_key_pointer_equal); + ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer, + _mesa_key_pointer_equal); + + func = (struct nir_function *)exec_list_get_head(&nir->functions); + + setup_locals(&ctx, func); + + visit_cf_list(&ctx, &func->impl->body); + phi_post_pass(&ctx); + + handle_shader_outputs_post(&ctx); + LLVMBuildRetVoid(ctx.builder); + + ac_llvm_finalize_module(&ctx); + free(ctx.locals); + ralloc_free(ctx.defs); + ralloc_free(ctx.phis); + + return ctx.module; +} + +static void ac_diagnostic_handler(LLVMDiagnosticInfoRef di, void *context) +{ + unsigned *retval = (unsigned *)context; + LLVMDiagnosticSeverity severity = LLVMGetDiagInfoSeverity(di); + char *description = LLVMGetDiagInfoDescription(di); + + if (severity == LLVMDSError) { + *retval = 1; + fprintf(stderr, "LLVM triggered Diagnostic Handler: %s\n", + description); + } + + LLVMDisposeMessage(description); +} + +static unsigned ac_llvm_compile(LLVMModuleRef M, + struct ac_shader_binary *binary, + LLVMTargetMachineRef tm) +{ + unsigned retval = 0; + char *err; + LLVMContextRef llvm_ctx; + LLVMMemoryBufferRef out_buffer; + unsigned buffer_size; + const char *buffer_data; + LLVMBool mem_err; + + /* Setup Diagnostic Handler*/ + llvm_ctx = LLVMGetModuleContext(M); + + LLVMContextSetDiagnosticHandler(llvm_ctx, ac_diagnostic_handler, + &retval); + + /* Compile IR*/ + mem_err = LLVMTargetMachineEmitToMemoryBuffer(tm, M, LLVMObjectFile, + &err, &out_buffer); + + /* Process Errors/Warnings */ + if (mem_err) { + fprintf(stderr, "%s: %s", __FUNCTION__, err); + free(err); + retval = 1; + goto out; + } + + /* Extract Shader Code*/ + buffer_size = LLVMGetBufferSize(out_buffer); + buffer_data = LLVMGetBufferStart(out_buffer); + + ac_elf_read(buffer_data, buffer_size, binary); + + /* Clean up */ + LLVMDisposeMemoryBuffer(out_buffer); + +out: + return retval; +} + +static void ac_compile_llvm_module(LLVMTargetMachineRef tm, + LLVMModuleRef llvm_module, + struct ac_shader_binary *binary, + struct ac_shader_config *config, + struct ac_shader_variant_info *shader_info, + gl_shader_stage stage, + bool dump_shader) +{ + if (dump_shader) + LLVMDumpModule(llvm_module); + + memset(binary, 0, sizeof(*binary)); + int v = ac_llvm_compile(llvm_module, binary, tm); + if (v) { + fprintf(stderr, "compile failed\n"); + } + + if (dump_shader) + fprintf(stderr, "disasm:\n%s\n", binary->disasm_string); + + ac_shader_binary_read_config(binary, config, 0); + + LLVMContextRef ctx = LLVMGetModuleContext(llvm_module); + LLVMDisposeModule(llvm_module); + LLVMContextDispose(ctx); + + if (stage == MESA_SHADER_FRAGMENT) { + shader_info->num_input_vgprs = 0; + if (G_0286CC_PERSP_SAMPLE_ENA(config->spi_ps_input_addr)) + shader_info->num_input_vgprs += 2; + if (G_0286CC_PERSP_CENTER_ENA(config->spi_ps_input_addr)) + shader_info->num_input_vgprs += 2; + if (G_0286CC_PERSP_CENTROID_ENA(config->spi_ps_input_addr)) + shader_info->num_input_vgprs += 2; + if (G_0286CC_PERSP_PULL_MODEL_ENA(config->spi_ps_input_addr)) + shader_info->num_input_vgprs += 3; + if (G_0286CC_LINEAR_SAMPLE_ENA(config->spi_ps_input_addr)) + shader_info->num_input_vgprs += 2; + if (G_0286CC_LINEAR_CENTER_ENA(config->spi_ps_input_addr)) + shader_info->num_input_vgprs += 2; + if (G_0286CC_LINEAR_CENTROID_ENA(config->spi_ps_input_addr)) + shader_info->num_input_vgprs += 2; + if (G_0286CC_LINE_STIPPLE_TEX_ENA(config->spi_ps_input_addr)) + shader_info->num_input_vgprs += 1; + if (G_0286CC_POS_X_FLOAT_ENA(config->spi_ps_input_addr)) + shader_info->num_input_vgprs += 1; + if (G_0286CC_POS_Y_FLOAT_ENA(config->spi_ps_input_addr)) + shader_info->num_input_vgprs += 1; + if (G_0286CC_POS_Z_FLOAT_ENA(config->spi_ps_input_addr)) + shader_info->num_input_vgprs += 1; + if (G_0286CC_POS_W_FLOAT_ENA(config->spi_ps_input_addr)) + shader_info->num_input_vgprs += 1; + if (G_0286CC_FRONT_FACE_ENA(config->spi_ps_input_addr)) + shader_info->num_input_vgprs += 1; + if (G_0286CC_ANCILLARY_ENA(config->spi_ps_input_addr)) + shader_info->num_input_vgprs += 1; + if (G_0286CC_SAMPLE_COVERAGE_ENA(config->spi_ps_input_addr)) + shader_info->num_input_vgprs += 1; + if (G_0286CC_POS_FIXED_PT_ENA(config->spi_ps_input_addr)) + shader_info->num_input_vgprs += 1; + } + config->num_vgprs = MAX2(config->num_vgprs, shader_info->num_input_vgprs); + + /* +3 for scratch wave offset and VCC */ + config->num_sgprs = MAX2(config->num_sgprs, + shader_info->num_input_sgprs + 3); +} + +void ac_compile_nir_shader(LLVMTargetMachineRef tm, + struct ac_shader_binary *binary, + struct ac_shader_config *config, + struct ac_shader_variant_info *shader_info, + struct nir_shader *nir, + const struct ac_nir_compiler_options *options, + bool dump_shader) +{ + + LLVMModuleRef llvm_module = ac_translate_nir_to_llvm(tm, nir, shader_info, + options); + + ac_compile_llvm_module(tm, llvm_module, binary, config, shader_info, nir->stage, dump_shader); + switch (nir->stage) { + case MESA_SHADER_COMPUTE: + for (int i = 0; i < 3; ++i) + shader_info->cs.block_size[i] = nir->info->cs.local_size[i]; + break; + case MESA_SHADER_FRAGMENT: + shader_info->fs.early_fragment_test = nir->info->fs.early_fragment_tests; + break; + default: + break; + } +} diff -Nru mesa-12.0.6/src/amd/common/ac_nir_to_llvm.h mesa-17.0.7/src/amd/common/ac_nir_to_llvm.h --- mesa-12.0.6/src/amd/common/ac_nir_to_llvm.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/common/ac_nir_to_llvm.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,132 @@ +/* + * Copyright © 2016 Bas Nieuwenhuizen + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#pragma once + +#include +#include "llvm-c/Core.h" +#include "llvm-c/TargetMachine.h" +#include "amd_family.h" +#include "../vulkan/radv_descriptor_set.h" + +struct ac_shader_binary; +struct ac_shader_config; +struct nir_shader; +struct radv_pipeline_layout; + + +struct ac_vs_variant_key { + uint32_t instance_rate_inputs; +}; + +struct ac_fs_variant_key { + uint32_t col_format; + uint32_t is_int8; +}; + +union ac_shader_variant_key { + struct ac_vs_variant_key vs; + struct ac_fs_variant_key fs; +}; + +struct ac_nir_compiler_options { + struct radv_pipeline_layout *layout; + union ac_shader_variant_key key; + bool unsafe_math; + enum radeon_family family; + enum chip_class chip_class; +}; + +struct ac_userdata_info { + int8_t sgpr_idx; + uint8_t num_sgprs; + bool indirect; + uint32_t indirect_offset; +}; + +enum ac_ud_index { + AC_UD_PUSH_CONSTANTS = 0, + AC_UD_SHADER_START = 1, + AC_UD_VS_VERTEX_BUFFERS = AC_UD_SHADER_START, + AC_UD_VS_BASE_VERTEX_START_INSTANCE, + AC_UD_VS_MAX_UD, + AC_UD_PS_SAMPLE_POS = AC_UD_SHADER_START, + AC_UD_PS_MAX_UD, + AC_UD_CS_GRID_SIZE = AC_UD_SHADER_START, + AC_UD_CS_MAX_UD, + AC_UD_MAX_UD = AC_UD_VS_MAX_UD, +}; + +// Match MAX_SETS from radv_descriptor_set.h +#define AC_UD_MAX_SETS MAX_SETS + +struct ac_userdata_locations { + struct ac_userdata_info descriptor_sets[AC_UD_MAX_SETS]; + struct ac_userdata_info shader_data[AC_UD_MAX_UD]; +}; + +struct ac_shader_variant_info { + struct ac_userdata_locations user_sgprs_locs; + unsigned num_user_sgprs; + unsigned num_input_sgprs; + unsigned num_input_vgprs; + union { + struct { + unsigned param_exports; + unsigned pos_exports; + unsigned vgpr_comp_cnt; + uint32_t export_mask; + bool writes_pointsize; + bool writes_layer; + bool writes_viewport_index; + uint8_t clip_dist_mask; + uint8_t cull_dist_mask; + } vs; + struct { + unsigned num_interp; + uint32_t input_mask; + unsigned output_mask; + uint32_t flat_shaded_mask; + bool has_pcoord; + bool can_discard; + bool writes_z; + bool writes_stencil; + bool early_fragment_test; + bool writes_memory; + bool force_persample; + } fs; + struct { + unsigned block_size[3]; + } cs; + }; +}; + +void ac_compile_nir_shader(LLVMTargetMachineRef tm, + struct ac_shader_binary *binary, + struct ac_shader_config *config, + struct ac_shader_variant_info *shader_info, + struct nir_shader *nir, + const struct ac_nir_compiler_options *options, + bool dump_shader); + + diff -Nru mesa-12.0.6/src/amd/common/amd_family.h mesa-17.0.7/src/amd/common/amd_family.h --- mesa-12.0.6/src/amd/common/amd_family.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/common/amd_family.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,112 @@ +/* + * Copyright 2008 Corbin Simpson + * Copyright 2010 Marek Olšák + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef AMD_FAMILY_H +#define AMD_FAMILY_H + +enum radeon_family { + CHIP_UNKNOWN = 0, + CHIP_R300, /* R3xx-based cores. */ + CHIP_R350, + CHIP_RV350, + CHIP_RV370, + CHIP_RV380, + CHIP_RS400, + CHIP_RC410, + CHIP_RS480, + CHIP_R420, /* R4xx-based cores. */ + CHIP_R423, + CHIP_R430, + CHIP_R480, + CHIP_R481, + CHIP_RV410, + CHIP_RS600, + CHIP_RS690, + CHIP_RS740, + CHIP_RV515, /* R5xx-based cores. */ + CHIP_R520, + CHIP_RV530, + CHIP_R580, + CHIP_RV560, + CHIP_RV570, + CHIP_R600, + CHIP_RV610, + CHIP_RV630, + CHIP_RV670, + CHIP_RV620, + CHIP_RV635, + CHIP_RS780, + CHIP_RS880, + CHIP_RV770, + CHIP_RV730, + CHIP_RV710, + CHIP_RV740, + CHIP_CEDAR, + CHIP_REDWOOD, + CHIP_JUNIPER, + CHIP_CYPRESS, + CHIP_HEMLOCK, + CHIP_PALM, + CHIP_SUMO, + CHIP_SUMO2, + CHIP_BARTS, + CHIP_TURKS, + CHIP_CAICOS, + CHIP_CAYMAN, + CHIP_ARUBA, + CHIP_TAHITI, + CHIP_PITCAIRN, + CHIP_VERDE, + CHIP_OLAND, + CHIP_HAINAN, + CHIP_BONAIRE, + CHIP_KAVERI, + CHIP_KABINI, + CHIP_HAWAII, + CHIP_MULLINS, + CHIP_TONGA, + CHIP_ICELAND, + CHIP_CARRIZO, + CHIP_FIJI, + CHIP_STONEY, + CHIP_POLARIS10, + CHIP_POLARIS11, + CHIP_POLARIS12, + CHIP_LAST, +}; + +enum chip_class { + CLASS_UNKNOWN = 0, + R300, + R400, + R500, + R600, + R700, + EVERGREEN, + CAYMAN, + SI, + CIK, + VI, +}; + +#endif diff -Nru mesa-12.0.6/src/amd/common/amdgpu_id.h mesa-17.0.7/src/amd/common/amdgpu_id.h --- mesa-12.0.6/src/amd/common/amdgpu_id.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/common/amdgpu_id.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,177 @@ +/* + * Copyright © 2014 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/** + * This file is included by addrlib. It adds GPU family definitions and + * macros compatible with addrlib. + */ + +#ifndef AMDGPU_ID_H +#define AMDGPU_ID_H + +#include "util/u_endian.h" + +#if defined(PIPE_ARCH_LITTLE_ENDIAN) +#define LITTLEENDIAN_CPU +#elif defined(PIPE_ARCH_BIG_ENDIAN) +#define BIGENDIAN_CPU +#endif + +enum { + FAMILY_UNKNOWN, + FAMILY_SI, + FAMILY_CI, + FAMILY_KV, + FAMILY_VI, + FAMILY_CZ, + FAMILY_PI, + FAMILY_LAST, +}; + +/* SI specific rev IDs */ +enum { + SI_TAHITI_P_A11 = 1, + SI_TAHITI_P_A0 = SI_TAHITI_P_A11, /*A0 is alias of A11*/ + SI_TAHITI_P_A21 = 5, + SI_TAHITI_P_B0 = SI_TAHITI_P_A21, /*B0 is alias of A21*/ + SI_TAHITI_P_A22 = 6, + SI_TAHITI_P_B1 = SI_TAHITI_P_A22, /*B1 is alias of A22*/ + + SI_PITCAIRN_PM_A11 = 20, + SI_PITCAIRN_PM_A0 = SI_PITCAIRN_PM_A11, /*A0 is alias of A11*/ + SI_PITCAIRN_PM_A12 = 21, + SI_PITCAIRN_PM_A1 = SI_PITCAIRN_PM_A12, /*A1 is alias of A12*/ + + SI_CAPEVERDE_M_A11 = 40, + SI_CAPEVERDE_M_A0 = SI_CAPEVERDE_M_A11, /*A0 is alias of A11*/ + SI_CAPEVERDE_M_A12 = 41, + SI_CAPEVERDE_M_A1 = SI_CAPEVERDE_M_A12, /*A1 is alias of A12*/ + + SI_OLAND_M_A0 = 60, + + SI_HAINAN_V_A0 = 70, + + SI_UNKNOWN = 0xFF +}; + + +#define ASICREV_IS_TAHITI_P(eChipRev) \ + (eChipRev < SI_PITCAIRN_PM_A11) +#define ASICREV_IS_PITCAIRN_PM(eChipRev) \ + ((eChipRev >= SI_PITCAIRN_PM_A11) && (eChipRev < SI_CAPEVERDE_M_A11)) +#define ASICREV_IS_CAPEVERDE_M(eChipRev) \ + ((eChipRev >= SI_CAPEVERDE_M_A11) && (eChipRev < SI_OLAND_M_A0)) +#define ASICREV_IS_OLAND_M(eChipRev) \ + ((eChipRev >= SI_OLAND_M_A0) && (eChipRev < SI_HAINAN_V_A0)) +#define ASICREV_IS_HAINAN_V(eChipRev) \ +(eChipRev >= SI_HAINAN_V_A0) + +/* CI specific revIDs */ +enum { + CI_BONAIRE_M_A0 = 20, + CI_BONAIRE_M_A1 = 21, + + CI_HAWAII_P_A0 = 40, + + CI_UNKNOWN = 0xFF +}; + +#define ASICREV_IS_BONAIRE_M(eChipRev) \ + ((eChipRev >= CI_BONAIRE_M_A0) && (eChipRev < CI_HAWAII_P_A0)) +#define ASICREV_IS_HAWAII_P(eChipRev) \ + (eChipRev >= CI_HAWAII_P_A0) + +/* KV specific rev IDs */ +enum { + KV_SPECTRE_A0 = 0x01, /* KV1 with Spectre GFX core, 8-8-1-2 (CU-Pix-Primitive-RB) */ + KV_SPOOKY_A0 = 0x41, /* KV2 with Spooky GFX core, including downgraded from Spectre core, 3-4-1-1 (CU-Pix-Primitive-RB) */ + KB_KALINDI_A0 = 0x81, /* KB with Kalindi GFX core, 2-4-1-1 (CU-Pix-Primitive-RB) */ + KB_KALINDI_A1 = 0x82, /* KB with Kalindi GFX core, 2-4-1-1 (CU-Pix-Primitive-RB) */ + BV_KALINDI_A2 = 0x85, /* BV with Kalindi GFX core, 2-4-1-1 (CU-Pix-Primitive-RB) */ + ML_GODAVARI_A0 = 0xa1, /* ML with Godavari GFX core, 2-4-1-1 (CU-Pix-Primitive-RB) */ + ML_GODAVARI_A1 = 0xa2, /* ML with Godavari GFX core, 2-4-1-1 (CU-Pix-Primitive-RB) */ + KV_UNKNOWN = 0xFF +}; + +#define ASICREV_IS_SPECTRE(eChipRev) \ + ((eChipRev >= KV_SPECTRE_A0) && (eChipRev < KV_SPOOKY_A0)) /* identify all versions of SPRECTRE and supported features set */ +#define ASICREV_IS_SPOOKY(eChipRev) \ + ((eChipRev >= KV_SPOOKY_A0) && (eChipRev < KB_KALINDI_A0)) /* identify all versions of SPOOKY and supported features set */ +#define ASICREV_IS_KALINDI(eChipRev) \ + ((eChipRev >= KB_KALINDI_A0) && (eChipRev < KV_UNKNOWN)) /* identify all versions of KALINDI and supported features set */ + +/* Following macros are subset of ASICREV_IS_KALINDI macro */ +#define ASICREV_IS_KALINDI_BHAVANI(eChipRev) \ + ((eChipRev >= BV_KALINDI_A2) && (eChipRev < ML_GODAVARI_A0)) /* identify all versions of BHAVANI and supported features set */ +#define ASICREV_IS_KALINDI_GODAVARI(eChipRev) \ + ((eChipRev >= ML_GODAVARI_A0) && (eChipRev < KV_UNKNOWN)) /* identify all versions of GODAVARI and supported features set */ + +/* VI specific rev IDs */ +enum { + VI_ICELAND_M_A0 = 1, + + VI_TONGA_P_A0 = 20, + VI_TONGA_P_A1 = 21, + + VI_FIJI_P_A0 = 60, + + VI_POLARIS10_P_A0 = 80, + + VI_POLARIS11_M_A0 = 90, + + VI_POLARIS12_V_A0 = 100, + + VI_UNKNOWN = 0xFF +}; + + +#define ASICREV_IS_ICELAND_M(eChipRev) \ + (eChipRev < VI_TONGA_P_A0) +#define ASICREV_IS_TONGA_P(eChipRev) \ + ((eChipRev >= VI_TONGA_P_A0) && (eChipRev < VI_FIJI_P_A0)) +#define ASICREV_IS_FIJI_P(eChipRev) \ + ((eChipRev >= VI_FIJI_P_A0) && (eChipRev < VI_POLARIS10_P_A0)) +#define ASICREV_IS_POLARIS10_P(eChipRev)\ + ((eChipRev >= VI_POLARIS10_P_A0) && (eChipRev < VI_POLARIS11_M_A0)) +#define ASICREV_IS_POLARIS11_M(eChipRev) \ + (eChipRev >= VI_POLARIS11_M_A0 && eChipRev < VI_POLARIS12_V_A0) +#define ASICREV_IS_POLARIS12_V(eChipRev)\ + (eChipRev >= VI_POLARIS12_V_A0) + +/* CZ specific rev IDs */ +enum { + CARRIZO_A0 = 0x01, + STONEY_A0 = 0x61, + CZ_UNKNOWN = 0xFF +}; + +#define ASICREV_IS_CARRIZO(eChipRev) \ + ((eChipRev >= CARRIZO_A0) && (eChipRev < STONEY_A0)) + +#define ASICREV_IS_STONEY(eChipRev) \ + ((eChipRev >= STONEY_A0) && (eChipRev < CZ_UNKNOWN)) + +#endif /* AMDGPU_ID_H */ diff -Nru mesa-12.0.6/src/amd/common/amd_kernel_code_t.h mesa-17.0.7/src/amd/common/amd_kernel_code_t.h --- mesa-12.0.6/src/amd/common/amd_kernel_code_t.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/common/amd_kernel_code_t.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,534 @@ +/* + * Copyright 2015,2016 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef AMDKERNELCODET_H +#define AMDKERNELCODET_H + +//---------------------------------------------------------------------------// +// AMD Kernel Code, and its dependencies // +//---------------------------------------------------------------------------// + +// Sets val bits for specified mask in specified dst packed instance. +#define AMD_HSA_BITS_SET(dst, mask, val) \ + dst &= (~(1 << mask ## _SHIFT) & ~mask); \ + dst |= (((val) << mask ## _SHIFT) & mask) + +// Gets bits for specified mask from specified src packed instance. +#define AMD_HSA_BITS_GET(src, mask) \ + ((src & mask) >> mask ## _SHIFT) \ + +/* Every amd_*_code_t has the following properties, which are composed of + * a number of bit fields. Every bit field has a mask (AMD_CODE_PROPERTY_*), + * bit width (AMD_CODE_PROPERTY_*_WIDTH, and bit shift amount + * (AMD_CODE_PROPERTY_*_SHIFT) for convenient access. Unused bits must be 0. + * + * (Note that bit fields cannot be used as their layout is + * implementation defined in the C standard and so cannot be used to + * specify an ABI) + */ +enum amd_code_property_mask_t { + + /* Enable the setup of the SGPR user data registers + * (AMD_CODE_PROPERTY_ENABLE_SGPR_*), see documentation of amd_kernel_code_t + * for initial register state. + * + * The total number of SGPRuser data registers requested must not + * exceed 16. Any requests beyond 16 will be ignored. + * + * Used to set COMPUTE_PGM_RSRC2.USER_SGPR (set to total count of + * SGPR user data registers enabled up to 16). + */ + + AMD_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER_SHIFT = 0, + AMD_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER_WIDTH = 1, + AMD_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER = ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER_WIDTH) - 1) << AMD_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER_SHIFT, + + AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_PTR_SHIFT = 1, + AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_PTR_WIDTH = 1, + AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_PTR = ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_PTR_WIDTH) - 1) << AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_PTR_SHIFT, + + AMD_CODE_PROPERTY_ENABLE_SGPR_QUEUE_PTR_SHIFT = 2, + AMD_CODE_PROPERTY_ENABLE_SGPR_QUEUE_PTR_WIDTH = 1, + AMD_CODE_PROPERTY_ENABLE_SGPR_QUEUE_PTR = ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_QUEUE_PTR_WIDTH) - 1) << AMD_CODE_PROPERTY_ENABLE_SGPR_QUEUE_PTR_SHIFT, + + AMD_CODE_PROPERTY_ENABLE_SGPR_KERNARG_SEGMENT_PTR_SHIFT = 3, + AMD_CODE_PROPERTY_ENABLE_SGPR_KERNARG_SEGMENT_PTR_WIDTH = 1, + AMD_CODE_PROPERTY_ENABLE_SGPR_KERNARG_SEGMENT_PTR = ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_KERNARG_SEGMENT_PTR_WIDTH) - 1) << AMD_CODE_PROPERTY_ENABLE_SGPR_KERNARG_SEGMENT_PTR_SHIFT, + + AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_ID_SHIFT = 4, + AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_ID_WIDTH = 1, + AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_ID = ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_ID_WIDTH) - 1) << AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_ID_SHIFT, + + AMD_CODE_PROPERTY_ENABLE_SGPR_FLAT_SCRATCH_INIT_SHIFT = 5, + AMD_CODE_PROPERTY_ENABLE_SGPR_FLAT_SCRATCH_INIT_WIDTH = 1, + AMD_CODE_PROPERTY_ENABLE_SGPR_FLAT_SCRATCH_INIT = ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_FLAT_SCRATCH_INIT_WIDTH) - 1) << AMD_CODE_PROPERTY_ENABLE_SGPR_FLAT_SCRATCH_INIT_SHIFT, + + AMD_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_SIZE_SHIFT = 6, + AMD_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_SIZE_WIDTH = 1, + AMD_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_SIZE = ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_SIZE_WIDTH) - 1) << AMD_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_SIZE_SHIFT, + + AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_X_SHIFT = 7, + AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_X_WIDTH = 1, + AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_X = ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_X_WIDTH) - 1) << AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_X_SHIFT, + + AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_Y_SHIFT = 8, + AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_Y_WIDTH = 1, + AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_Y = ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_Y_WIDTH) - 1) << AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_Y_SHIFT, + + AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_Z_SHIFT = 9, + AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_Z_WIDTH = 1, + AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_Z = ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_Z_WIDTH) - 1) << AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_Z_SHIFT, + + AMD_CODE_PROPERTY_RESERVED1_SHIFT = 10, + AMD_CODE_PROPERTY_RESERVED1_WIDTH = 6, + AMD_CODE_PROPERTY_RESERVED1 = ((1 << AMD_CODE_PROPERTY_RESERVED1_WIDTH) - 1) << AMD_CODE_PROPERTY_RESERVED1_SHIFT, + + /* Control wave ID base counter for GDS ordered-append. Used to set + * COMPUTE_DISPATCH_INITIATOR.ORDERED_APPEND_ENBL. (Not sure if + * ORDERED_APPEND_MODE also needs to be settable) + */ + AMD_CODE_PROPERTY_ENABLE_ORDERED_APPEND_GDS_SHIFT = 16, + AMD_CODE_PROPERTY_ENABLE_ORDERED_APPEND_GDS_WIDTH = 1, + AMD_CODE_PROPERTY_ENABLE_ORDERED_APPEND_GDS = ((1 << AMD_CODE_PROPERTY_ENABLE_ORDERED_APPEND_GDS_WIDTH) - 1) << AMD_CODE_PROPERTY_ENABLE_ORDERED_APPEND_GDS_SHIFT, + + /* The interleave (swizzle) element size in bytes required by the + * code for private memory. This must be 2, 4, 8 or 16. This value + * is provided to the finalizer when it is invoked and is recorded + * here. The hardware will interleave the memory requests of each + * lane of a wavefront by this element size to ensure each + * work-item gets a distinct memory memory location. Therefore, the + * finalizer ensures that all load and store operations done to + * private memory do not exceed this size. For example, if the + * element size is 4 (32-bits or dword) and a 64-bit value must be + * loaded, the finalizer will generate two 32-bit loads. This + * ensures that the interleaving will get the work-item + * specific dword for both halves of the 64-bit value. If it just + * did a 64-bit load then it would get one dword which belonged to + * its own work-item, but the second dword would belong to the + * adjacent lane work-item since the interleaving is in dwords. + * + * The value used must match the value that the runtime configures + * the GPU flat scratch (SH_STATIC_MEM_CONFIG.ELEMENT_SIZE). This + * is generally DWORD. + * + * USE VALUES FROM THE AMD_ELEMENT_BYTE_SIZE_T ENUM. + */ + AMD_CODE_PROPERTY_PRIVATE_ELEMENT_SIZE_SHIFT = 17, + AMD_CODE_PROPERTY_PRIVATE_ELEMENT_SIZE_WIDTH = 2, + AMD_CODE_PROPERTY_PRIVATE_ELEMENT_SIZE = ((1 << AMD_CODE_PROPERTY_PRIVATE_ELEMENT_SIZE_WIDTH) - 1) << AMD_CODE_PROPERTY_PRIVATE_ELEMENT_SIZE_SHIFT, + + /* Are global memory addresses 64 bits. Must match + * amd_kernel_code_t.hsail_machine_model == + * HSA_MACHINE_LARGE. Must also match + * SH_MEM_CONFIG.PTR32 (GFX6 (SI)/GFX7 (CI)), + * SH_MEM_CONFIG.ADDRESS_MODE (GFX8 (VI)+). + */ + AMD_CODE_PROPERTY_IS_PTR64_SHIFT = 19, + AMD_CODE_PROPERTY_IS_PTR64_WIDTH = 1, + AMD_CODE_PROPERTY_IS_PTR64 = ((1 << AMD_CODE_PROPERTY_IS_PTR64_WIDTH) - 1) << AMD_CODE_PROPERTY_IS_PTR64_SHIFT, + + /* Indicate if the generated ISA is using a dynamically sized call + * stack. This can happen if calls are implemented using a call + * stack and recursion, alloca or calls to indirect functions are + * present. In these cases the Finalizer cannot compute the total + * private segment size at compile time. In this case the + * workitem_private_segment_byte_size only specifies the statically + * know private segment size, and additional space must be added + * for the call stack. + */ + AMD_CODE_PROPERTY_IS_DYNAMIC_CALLSTACK_SHIFT = 20, + AMD_CODE_PROPERTY_IS_DYNAMIC_CALLSTACK_WIDTH = 1, + AMD_CODE_PROPERTY_IS_DYNAMIC_CALLSTACK = ((1 << AMD_CODE_PROPERTY_IS_DYNAMIC_CALLSTACK_WIDTH) - 1) << AMD_CODE_PROPERTY_IS_DYNAMIC_CALLSTACK_SHIFT, + + /* Indicate if code generated has support for debugging. */ + AMD_CODE_PROPERTY_IS_DEBUG_SUPPORTED_SHIFT = 21, + AMD_CODE_PROPERTY_IS_DEBUG_SUPPORTED_WIDTH = 1, + AMD_CODE_PROPERTY_IS_DEBUG_SUPPORTED = ((1 << AMD_CODE_PROPERTY_IS_DEBUG_SUPPORTED_WIDTH) - 1) << AMD_CODE_PROPERTY_IS_DEBUG_SUPPORTED_SHIFT, + + AMD_CODE_PROPERTY_IS_XNACK_SUPPORTED_SHIFT = 22, + AMD_CODE_PROPERTY_IS_XNACK_SUPPORTED_WIDTH = 1, + AMD_CODE_PROPERTY_IS_XNACK_SUPPORTED = ((1 << AMD_CODE_PROPERTY_IS_XNACK_SUPPORTED_WIDTH) - 1) << AMD_CODE_PROPERTY_IS_XNACK_SUPPORTED_SHIFT, + + AMD_CODE_PROPERTY_RESERVED2_SHIFT = 23, + AMD_CODE_PROPERTY_RESERVED2_WIDTH = 9, + AMD_CODE_PROPERTY_RESERVED2 = ((1 << AMD_CODE_PROPERTY_RESERVED2_WIDTH) - 1) << AMD_CODE_PROPERTY_RESERVED2_SHIFT +}; + +/* AMD Kernel Code Object (amd_kernel_code_t). GPU CP uses the AMD Kernel + * Code Object to set up the hardware to execute the kernel dispatch. + * + * Initial Kernel Register State. + * + * Initial kernel register state will be set up by CP/SPI prior to the start + * of execution of every wavefront. This is limited by the constraints of the + * current hardware. + * + * The order of the SGPR registers is defined, but the Finalizer can specify + * which ones are actually setup in the amd_kernel_code_t object using the + * enable_sgpr_* bit fields. The register numbers used for enabled registers + * are dense starting at SGPR0: the first enabled register is SGPR0, the next + * enabled register is SGPR1 etc.; disabled registers do not have an SGPR + * number. + * + * The initial SGPRs comprise up to 16 User SRGPs that are set up by CP and + * apply to all waves of the grid. It is possible to specify more than 16 User + * SGPRs using the enable_sgpr_* bit fields, in which case only the first 16 + * are actually initialized. These are then immediately followed by the System + * SGPRs that are set up by ADC/SPI and can have different values for each wave + * of the grid dispatch. + * + * SGPR register initial state is defined as follows: + * + * Private Segment Buffer (enable_sgpr_private_segment_buffer): + * Number of User SGPR registers: 4. V# that can be used, together with + * Scratch Wave Offset as an offset, to access the Private/Spill/Arg + * segments using a segment address. It must be set as follows: + * - Base address: of the scratch memory area used by the dispatch. It + * does not include the scratch wave offset. It will be the per process + * SH_HIDDEN_PRIVATE_BASE_VMID plus any offset from this dispatch (for + * example there may be a per pipe offset, or per AQL Queue offset). + * - Stride + data_format: Element Size * Index Stride (???) + * - Cache swizzle: ??? + * - Swizzle enable: SH_STATIC_MEM_CONFIG.SWIZZLE_ENABLE (must be 1 for + * scratch) + * - Num records: Flat Scratch Work Item Size / Element Size (???) + * - Dst_sel_*: ??? + * - Num_format: ??? + * - Element_size: SH_STATIC_MEM_CONFIG.ELEMENT_SIZE (will be DWORD, must + * agree with amd_kernel_code_t.privateElementSize) + * - Index_stride: SH_STATIC_MEM_CONFIG.INDEX_STRIDE (will be 64 as must + * be number of wavefront lanes for scratch, must agree with + * amd_kernel_code_t.wavefrontSize) + * - Add tid enable: 1 + * - ATC: from SH_MEM_CONFIG.PRIVATE_ATC, + * - Hash_enable: ??? + * - Heap: ??? + * - Mtype: from SH_STATIC_MEM_CONFIG.PRIVATE_MTYPE + * - Type: 0 (a buffer) (???) + * + * Dispatch Ptr (enable_sgpr_dispatch_ptr): + * Number of User SGPR registers: 2. 64 bit address of AQL dispatch packet + * for kernel actually executing. + * + * Queue Ptr (enable_sgpr_queue_ptr): + * Number of User SGPR registers: 2. 64 bit address of AmdQueue object for + * AQL queue on which the dispatch packet was queued. + * + * Kernarg Segment Ptr (enable_sgpr_kernarg_segment_ptr): + * Number of User SGPR registers: 2. 64 bit address of Kernarg segment. This + * is directly copied from the kernargPtr in the dispatch packet. Having CP + * load it once avoids loading it at the beginning of every wavefront. + * + * Dispatch Id (enable_sgpr_dispatch_id): + * Number of User SGPR registers: 2. 64 bit Dispatch ID of the dispatch + * packet being executed. + * + * Flat Scratch Init (enable_sgpr_flat_scratch_init): + * Number of User SGPR registers: 2. This is 2 SGPRs. + * + * For CI/VI: + * The first SGPR is a 32 bit byte offset from SH_MEM_HIDDEN_PRIVATE_BASE + * to base of memory for scratch for this dispatch. This is the same offset + * used in computing the Scratch Segment Buffer base address. The value of + * Scratch Wave Offset must be added by the kernel code and moved to + * SGPRn-4 for use as the FLAT SCRATCH BASE in flat memory instructions. + * + * The second SGPR is 32 bit byte size of a single work-item's scratch + * memory usage. This is directly loaded from the dispatch packet Private + * Segment Byte Size and rounded up to a multiple of DWORD. + * + * \todo [Does CP need to round this to >4 byte alignment?] + * + * The kernel code must move to SGPRn-3 for use as the FLAT SCRATCH SIZE in + * flat memory instructions. Having CP load it once avoids loading it at + * the beginning of every wavefront. + * + * Private Segment Size (enable_sgpr_private_segment_size): + * Number of User SGPR registers: 1. The 32 bit byte size of a single + * work-item's scratch memory allocation. This is the value from the dispatch + * packet. Private Segment Byte Size rounded up by CP to a multiple of DWORD. + * + * \todo [Does CP need to round this to >4 byte alignment?] + * + * Having CP load it once avoids loading it at the beginning of every + * wavefront. + * + * \todo [This will not be used for CI/VI since it is the same value as + * the second SGPR of Flat Scratch Init. + * + * Grid Work-Group Count X (enable_sgpr_grid_workgroup_count_x): + * Number of User SGPR registers: 1. 32 bit count of the number of + * work-groups in the X dimension for the grid being executed. Computed from + * the fields in the HsaDispatchPacket as + * ((gridSize.x+workgroupSize.x-1)/workgroupSize.x). + * + * Grid Work-Group Count Y (enable_sgpr_grid_workgroup_count_y): + * Number of User SGPR registers: 1. 32 bit count of the number of + * work-groups in the Y dimension for the grid being executed. Computed from + * the fields in the HsaDispatchPacket as + * ((gridSize.y+workgroupSize.y-1)/workgroupSize.y). + * + * Only initialized if <16 previous SGPRs initialized. + * + * Grid Work-Group Count Z (enable_sgpr_grid_workgroup_count_z): + * Number of User SGPR registers: 1. 32 bit count of the number of + * work-groups in the Z dimension for the grid being executed. Computed + * from the fields in the HsaDispatchPacket as + * ((gridSize.z+workgroupSize.z-1)/workgroupSize.z). + * + * Only initialized if <16 previous SGPRs initialized. + * + * Work-Group Id X (enable_sgpr_workgroup_id_x): + * Number of System SGPR registers: 1. 32 bit work group id in X dimension + * of grid for wavefront. Always present. + * + * Work-Group Id Y (enable_sgpr_workgroup_id_y): + * Number of System SGPR registers: 1. 32 bit work group id in Y dimension + * of grid for wavefront. + * + * Work-Group Id Z (enable_sgpr_workgroup_id_z): + * Number of System SGPR registers: 1. 32 bit work group id in Z dimension + * of grid for wavefront. If present then Work-group Id Y will also be + * present + * + * Work-Group Info (enable_sgpr_workgroup_info): + * Number of System SGPR registers: 1. {first_wave, 14'b0000, + * ordered_append_term[10:0], threadgroup_size_in_waves[5:0]} + * + * Private Segment Wave Byte Offset + * (enable_sgpr_private_segment_wave_byte_offset): + * Number of System SGPR registers: 1. 32 bit byte offset from base of + * dispatch scratch base. Must be used as an offset with Private/Spill/Arg + * segment address when using Scratch Segment Buffer. It must be added to + * Flat Scratch Offset if setting up FLAT SCRATCH for flat addressing. + * + * + * The order of the VGPR registers is defined, but the Finalizer can specify + * which ones are actually setup in the amd_kernel_code_t object using the + * enableVgpr* bit fields. The register numbers used for enabled registers + * are dense starting at VGPR0: the first enabled register is VGPR0, the next + * enabled register is VGPR1 etc.; disabled registers do not have an VGPR + * number. + * + * VGPR register initial state is defined as follows: + * + * Work-Item Id X (always initialized): + * Number of registers: 1. 32 bit work item id in X dimension of work-group + * for wavefront lane. + * + * Work-Item Id X (enable_vgpr_workitem_id > 0): + * Number of registers: 1. 32 bit work item id in Y dimension of work-group + * for wavefront lane. + * + * Work-Item Id X (enable_vgpr_workitem_id > 0): + * Number of registers: 1. 32 bit work item id in Z dimension of work-group + * for wavefront lane. + * + * + * The setting of registers is being done by existing GPU hardware as follows: + * 1) SGPRs before the Work-Group Ids are set by CP using the 16 User Data + * registers. + * 2) Work-group Id registers X, Y, Z are set by SPI which supports any + * combination including none. + * 3) Scratch Wave Offset is also set by SPI which is why its value cannot + * be added into the value Flat Scratch Offset which would avoid the + * Finalizer generated prolog having to do the add. + * 4) The VGPRs are set by SPI which only supports specifying either (X), + * (X, Y) or (X, Y, Z). + * + * Flat Scratch Dispatch Offset and Flat Scratch Size are adjacent SGRRs so + * they can be moved as a 64 bit value to the hardware required SGPRn-3 and + * SGPRn-4 respectively using the Finalizer ?FLAT_SCRATCH? Register. + * + * The global segment can be accessed either using flat operations or buffer + * operations. If buffer operations are used then the Global Buffer used to + * access HSAIL Global/Readonly/Kernarg (which are combine) segments using a + * segment address is not passed into the kernel code by CP since its base + * address is always 0. Instead the Finalizer generates prolog code to + * initialize 4 SGPRs with a V# that has the following properties, and then + * uses that in the buffer instructions: + * - base address of 0 + * - no swizzle + * - ATC=1 + * - MTYPE set to support memory coherence specified in + * amd_kernel_code_t.globalMemoryCoherence + * + * When the Global Buffer is used to access the Kernarg segment, must add the + * dispatch packet kernArgPtr to a kernarg segment address before using this V#. + * Alternatively scalar loads can be used if the kernarg offset is uniform, as + * the kernarg segment is constant for the duration of the kernel execution. + */ + +typedef struct amd_kernel_code_s { + uint32_t amd_kernel_code_version_major; + uint32_t amd_kernel_code_version_minor; + uint16_t amd_machine_kind; + uint16_t amd_machine_version_major; + uint16_t amd_machine_version_minor; + uint16_t amd_machine_version_stepping; + + /* Byte offset (possibly negative) from start of amd_kernel_code_t + * object to kernel's entry point instruction. The actual code for + * the kernel is required to be 256 byte aligned to match hardware + * requirements (SQ cache line is 16). The code must be position + * independent code (PIC) for AMD devices to give runtime the + * option of copying code to discrete GPU memory or APU L2 + * cache. The Finalizer should endeavour to allocate all kernel + * machine code in contiguous memory pages so that a device + * pre-fetcher will tend to only pre-fetch Kernel Code objects, + * improving cache performance. + */ + int64_t kernel_code_entry_byte_offset; + + /* Range of bytes to consider prefetching expressed as an offset + * and size. The offset is from the start (possibly negative) of + * amd_kernel_code_t object. Set both to 0 if no prefetch + * information is available. + */ + int64_t kernel_code_prefetch_byte_offset; + uint64_t kernel_code_prefetch_byte_size; + + /* Number of bytes of scratch backing memory required for full + * occupancy of target chip. This takes into account the number of + * bytes of scratch per work-item, the wavefront size, the maximum + * number of wavefronts per CU, and the number of CUs. This is an + * upper limit on scratch. If the grid being dispatched is small it + * may only need less than this. If the kernel uses no scratch, or + * the Finalizer has not computed this value, it must be 0. + */ + uint64_t max_scratch_backing_memory_byte_size; + + /* Shader program settings for CS. Contains COMPUTE_PGM_RSRC1 and + * COMPUTE_PGM_RSRC2 registers. + */ + uint64_t compute_pgm_resource_registers; + + /* Code properties. See amd_code_property_mask_t for a full list of + * properties. + */ + uint32_t code_properties; + + /* The amount of memory required for the combined private, spill + * and arg segments for a work-item in bytes. If + * is_dynamic_callstack is 1 then additional space must be added to + * this value for the call stack. + */ + uint32_t workitem_private_segment_byte_size; + + /* The amount of group segment memory required by a work-group in + * bytes. This does not include any dynamically allocated group + * segment memory that may be added when the kernel is + * dispatched. + */ + uint32_t workgroup_group_segment_byte_size; + + /* Number of byte of GDS required by kernel dispatch. Must be 0 if + * not using GDS. + */ + uint32_t gds_segment_byte_size; + + /* The size in bytes of the kernarg segment that holds the values + * of the arguments to the kernel. This could be used by CP to + * prefetch the kernarg segment pointed to by the dispatch packet. + */ + uint64_t kernarg_segment_byte_size; + + /* Number of fbarrier's used in the kernel and all functions it + * calls. If the implementation uses group memory to allocate the + * fbarriers then that amount must already be included in the + * workgroup_group_segment_byte_size total. + */ + uint32_t workgroup_fbarrier_count; + + /* Number of scalar registers used by a wavefront. This includes + * the special SGPRs for VCC, Flat Scratch Base, Flat Scratch Size + * and XNACK (for GFX8 (VI)). It does not include the 16 SGPR added if a + * trap handler is enabled. Used to set COMPUTE_PGM_RSRC1.SGPRS. + */ + uint16_t wavefront_sgpr_count; + + /* Number of vector registers used by each work-item. Used to set + * COMPUTE_PGM_RSRC1.VGPRS. + */ + uint16_t workitem_vgpr_count; + + /* If reserved_vgpr_count is 0 then must be 0. Otherwise, this is the + * first fixed VGPR number reserved. + */ + uint16_t reserved_vgpr_first; + + /* The number of consecutive VGPRs reserved by the client. If + * is_debug_supported then this count includes VGPRs reserved + * for debugger use. + */ + uint16_t reserved_vgpr_count; + + /* If reserved_sgpr_count is 0 then must be 0. Otherwise, this is the + * first fixed SGPR number reserved. + */ + uint16_t reserved_sgpr_first; + + /* The number of consecutive SGPRs reserved by the client. If + * is_debug_supported then this count includes SGPRs reserved + * for debugger use. + */ + uint16_t reserved_sgpr_count; + + /* If is_debug_supported is 0 then must be 0. Otherwise, this is the + * fixed SGPR number used to hold the wave scratch offset for the + * entire kernel execution, or uint16_t(-1) if the register is not + * used or not known. + */ + uint16_t debug_wavefront_private_segment_offset_sgpr; + + /* If is_debug_supported is 0 then must be 0. Otherwise, this is the + * fixed SGPR number of the first of 4 SGPRs used to hold the + * scratch V# used for the entire kernel execution, or uint16_t(-1) + * if the registers are not used or not known. + */ + uint16_t debug_private_segment_buffer_sgpr; + + /* The maximum byte alignment of variables used by the kernel in + * the specified memory segment. Expressed as a power of two. Must + * be at least HSA_POWERTWO_16. + */ + uint8_t kernarg_segment_alignment; + uint8_t group_segment_alignment; + uint8_t private_segment_alignment; + + /* Wavefront size expressed as a power of two. Must be a power of 2 + * in range 1..64 inclusive. Used to support runtime query that + * obtains wavefront size, which may be used by application to + * allocated dynamic group memory and set the dispatch work-group + * size. + */ + uint8_t wavefront_size; + + int32_t call_convention; + uint8_t reserved3[12]; + uint64_t runtime_loader_kernel_symbol; + uint64_t control_directives[16]; +} amd_kernel_code_t; + +#endif // AMDKERNELCODET_H diff -Nru mesa-12.0.6/src/amd/common/r600d_common.h mesa-17.0.7/src/amd/common/r600d_common.h --- mesa-12.0.6/src/amd/common/r600d_common.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/common/r600d_common.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,252 @@ +/* + * Copyright 2013 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: Marek Olšák + */ + +#ifndef R600D_COMMON_H +#define R600D_COMMON_H + +#define R600_CONFIG_REG_OFFSET 0x08000 +#define R600_CONTEXT_REG_OFFSET 0x28000 +#define SI_SH_REG_OFFSET 0x0000B000 +#define SI_SH_REG_END 0x0000C000 +#define CIK_UCONFIG_REG_OFFSET 0x00030000 +#define CIK_UCONFIG_REG_END 0x00038000 + +#define PKT_TYPE_S(x) (((unsigned)(x) & 0x3) << 30) +#define PKT_COUNT_S(x) (((unsigned)(x) & 0x3FFF) << 16) +#define PKT3_IT_OPCODE_S(x) (((unsigned)(x) & 0xFF) << 8) +#define PKT3_PREDICATE(x) (((x) >> 0) & 0x1) +#define PKT3(op, count, predicate) (PKT_TYPE_S(3) | PKT_COUNT_S(count) | PKT3_IT_OPCODE_S(op) | PKT3_PREDICATE(predicate)) + +#define RADEON_CP_PACKET3_COMPUTE_MODE 0x00000002 + +#define PKT3_NOP 0x10 +#define PKT3_SET_PREDICATION 0x20 +#define PKT3_STRMOUT_BUFFER_UPDATE 0x34 +#define STRMOUT_STORE_BUFFER_FILLED_SIZE 1 +#define STRMOUT_OFFSET_SOURCE(x) (((unsigned)(x) & 0x3) << 1) +#define STRMOUT_OFFSET_FROM_PACKET 0 +#define STRMOUT_OFFSET_FROM_VGT_FILLED_SIZE 1 +#define STRMOUT_OFFSET_FROM_MEM 2 +#define STRMOUT_OFFSET_NONE 3 +#define STRMOUT_SELECT_BUFFER(x) (((unsigned)(x) & 0x3) << 8) +#define PKT3_WAIT_REG_MEM 0x3C +#define WAIT_REG_MEM_EQUAL 3 +#define WAIT_REG_MEM_MEM_SPACE(x) (((unsigned)(x) & 0x3) << 4) +#define PKT3_EVENT_WRITE 0x46 +#define PKT3_EVENT_WRITE_EOP 0x47 +#define EOP_DATA_SEL(x) ((x) << 29) + /* 0 - discard + * 1 - send low 32bit data + * 2 - send 64bit data + * 3 - send 64bit GPU counter value + * 4 - send 64bit sys counter value + */ +#define PKT3_SET_CONFIG_REG 0x68 +#define PKT3_SET_CONTEXT_REG 0x69 +#define PKT3_STRMOUT_BASE_UPDATE 0x72 /* r700 only */ +#define PKT3_SURFACE_BASE_UPDATE 0x73 /* r600 only */ +#define SURFACE_BASE_UPDATE_DEPTH (1 << 0) +#define SURFACE_BASE_UPDATE_COLOR(x) (2 << (x)) +#define SURFACE_BASE_UPDATE_COLOR_NUM(x) (((1 << x) - 1) << 1) +#define SURFACE_BASE_UPDATE_STRMOUT(x) (0x200 << (x)) +#define PKT3_SET_SH_REG 0x76 /* SI and later */ +#define PKT3_SET_UCONFIG_REG 0x79 /* CIK and later */ + +#define EVENT_TYPE_SAMPLE_STREAMOUTSTATS1 0x1 /* EG and later */ +#define EVENT_TYPE_SAMPLE_STREAMOUTSTATS2 0x2 /* EG and later */ +#define EVENT_TYPE_SAMPLE_STREAMOUTSTATS3 0x3 /* EG and later */ +#define EVENT_TYPE_PS_PARTIAL_FLUSH 0x10 +#define EVENT_TYPE_CACHE_FLUSH_AND_INV_TS_EVENT 0x14 +#define EVENT_TYPE_ZPASS_DONE 0x15 +#define EVENT_TYPE_CACHE_FLUSH_AND_INV_EVENT 0x16 +#define EVENT_TYPE_PERFCOUNTER_START 0x17 +#define EVENT_TYPE_PERFCOUNTER_STOP 0x18 +#define EVENT_TYPE_PIPELINESTAT_START 25 +#define EVENT_TYPE_PIPELINESTAT_STOP 26 +#define EVENT_TYPE_PERFCOUNTER_SAMPLE 0x1B +#define EVENT_TYPE_SAMPLE_PIPELINESTAT 30 +#define EVENT_TYPE_SO_VGTSTREAMOUT_FLUSH 0x1f +#define EVENT_TYPE_SAMPLE_STREAMOUTSTATS 0x20 +#define EVENT_TYPE_BOTTOM_OF_PIPE_TS 40 +#define EVENT_TYPE_FLUSH_AND_INV_DB_META 0x2c /* supported on r700+ */ +#define EVENT_TYPE_FLUSH_AND_INV_CB_META 46 /* supported on r700+ */ +#define EVENT_TYPE(x) ((x) << 0) +#define EVENT_INDEX(x) ((x) << 8) + /* 0 - any non-TS event + * 1 - ZPASS_DONE + * 2 - SAMPLE_PIPELINESTAT + * 3 - SAMPLE_STREAMOUTSTAT* + * 4 - *S_PARTIAL_FLUSH + * 5 - TS events + */ + +#define PREDICATION_OP_CLEAR 0x0 +#define PREDICATION_OP_ZPASS 0x1 +#define PREDICATION_OP_PRIMCOUNT 0x2 +#define PRED_OP(x) ((x) << 16) +#define PREDICATION_CONTINUE (1 << 31) +#define PREDICATION_HINT_WAIT (0 << 12) +#define PREDICATION_HINT_NOWAIT_DRAW (1 << 12) +#define PREDICATION_DRAW_NOT_VISIBLE (0 << 8) +#define PREDICATION_DRAW_VISIBLE (1 << 8) + +/* R600-R700*/ +#define R_008490_CP_STRMOUT_CNTL 0x008490 +#define S_008490_OFFSET_UPDATE_DONE(x) (((unsigned)(x) & 0x1) << 0) +#define R_028AB0_VGT_STRMOUT_EN 0x028AB0 +#define S_028AB0_STREAMOUT(x) (((unsigned)(x) & 0x1) << 0) +#define G_028AB0_STREAMOUT(x) (((x) >> 0) & 0x1) +#define C_028AB0_STREAMOUT 0xFFFFFFFE +#define R_028B20_VGT_STRMOUT_BUFFER_EN 0x028B20 +#define S_028B20_BUFFER_0_EN(x) (((unsigned)(x) & 0x1) << 0) +#define G_028B20_BUFFER_0_EN(x) (((x) >> 0) & 0x1) +#define C_028B20_BUFFER_0_EN 0xFFFFFFFE +#define S_028B20_BUFFER_1_EN(x) (((unsigned)(x) & 0x1) << 1) +#define G_028B20_BUFFER_1_EN(x) (((x) >> 1) & 0x1) +#define C_028B20_BUFFER_1_EN 0xFFFFFFFD +#define S_028B20_BUFFER_2_EN(x) (((unsigned)(x) & 0x1) << 2) +#define G_028B20_BUFFER_2_EN(x) (((x) >> 2) & 0x1) +#define C_028B20_BUFFER_2_EN 0xFFFFFFFB +#define S_028B20_BUFFER_3_EN(x) (((unsigned)(x) & 0x1) << 3) +#define G_028B20_BUFFER_3_EN(x) (((x) >> 3) & 0x1) +#define C_028B20_BUFFER_3_EN 0xFFFFFFF7 +#define R_028AD0_VGT_STRMOUT_BUFFER_SIZE_0 0x028AD0 + +#define V_0280A0_SWAP_STD 0x00000000 +#define V_0280A0_SWAP_ALT 0x00000001 +#define V_0280A0_SWAP_STD_REV 0x00000002 +#define V_0280A0_SWAP_ALT_REV 0x00000003 + +/* EG+ */ +#define R_0084FC_CP_STRMOUT_CNTL 0x0084FC +#define S_0084FC_OFFSET_UPDATE_DONE(x) (((unsigned)(x) & 0x1) << 0) +#define R_028B94_VGT_STRMOUT_CONFIG 0x028B94 +#define S_028B94_STREAMOUT_0_EN(x) (((unsigned)(x) & 0x1) << 0) +#define G_028B94_STREAMOUT_0_EN(x) (((x) >> 0) & 0x1) +#define C_028B94_STREAMOUT_0_EN 0xFFFFFFFE +#define S_028B94_STREAMOUT_1_EN(x) (((unsigned)(x) & 0x1) << 1) +#define G_028B94_STREAMOUT_1_EN(x) (((x) >> 1) & 0x1) +#define C_028B94_STREAMOUT_1_EN 0xFFFFFFFD +#define S_028B94_STREAMOUT_2_EN(x) (((unsigned)(x) & 0x1) << 2) +#define G_028B94_STREAMOUT_2_EN(x) (((x) >> 2) & 0x1) +#define C_028B94_STREAMOUT_2_EN 0xFFFFFFFB +#define S_028B94_STREAMOUT_3_EN(x) (((unsigned)(x) & 0x1) << 3) +#define G_028B94_STREAMOUT_3_EN(x) (((x) >> 3) & 0x1) +#define C_028B94_STREAMOUT_3_EN 0xFFFFFFF7 +#define S_028B94_RAST_STREAM(x) (((unsigned)(x) & 0x07) << 4) +#define G_028B94_RAST_STREAM(x) (((x) >> 4) & 0x07) +#define C_028B94_RAST_STREAM 0xFFFFFF8F +#define S_028B94_RAST_STREAM_MASK(x) (((unsigned)(x) & 0x0F) << 8) /* SI+ */ +#define G_028B94_RAST_STREAM_MASK(x) (((x) >> 8) & 0x0F) +#define C_028B94_RAST_STREAM_MASK 0xFFFFF0FF +#define S_028B94_USE_RAST_STREAM_MASK(x) (((unsigned)(x) & 0x1) << 31) /* SI+ */ +#define G_028B94_USE_RAST_STREAM_MASK(x) (((x) >> 31) & 0x1) +#define C_028B94_USE_RAST_STREAM_MASK 0x7FFFFFFF +#define R_028B98_VGT_STRMOUT_BUFFER_CONFIG 0x028B98 +#define S_028B98_STREAM_0_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028B98_STREAM_0_BUFFER_EN(x) (((x) >> 0) & 0x0F) +#define C_028B98_STREAM_0_BUFFER_EN 0xFFFFFFF0 +#define S_028B98_STREAM_1_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028B98_STREAM_1_BUFFER_EN(x) (((x) >> 4) & 0x0F) +#define C_028B98_STREAM_1_BUFFER_EN 0xFFFFFF0F +#define S_028B98_STREAM_2_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028B98_STREAM_2_BUFFER_EN(x) (((x) >> 8) & 0x0F) +#define C_028B98_STREAM_2_BUFFER_EN 0xFFFFF0FF +#define S_028B98_STREAM_3_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028B98_STREAM_3_BUFFER_EN(x) (((x) >> 12) & 0x0F) +#define C_028B98_STREAM_3_BUFFER_EN 0xFFFF0FFF + +#define EG_R_028A4C_PA_SC_MODE_CNTL_1 0x028A4C +#define EG_S_028A4C_PS_ITER_SAMPLE(x) (((unsigned)(x) & 0x1) << 16) +#define EG_S_028A4C_FORCE_EOV_CNTDWN_ENABLE(x) (((unsigned)(x) & 0x1) << 25) +#define EG_S_028A4C_FORCE_EOV_REZ_ENABLE(x) (((unsigned)(x) & 0x1) << 26) + +#define CM_R_028804_DB_EQAA 0x00028804 +#define S_028804_MAX_ANCHOR_SAMPLES(x) (((unsigned)(x) & 0x7) << 0) +#define S_028804_PS_ITER_SAMPLES(x) (((unsigned)(x) & 0x7) << 4) +#define S_028804_MASK_EXPORT_NUM_SAMPLES(x) (((unsigned)(x) & 0x7) << 8) +#define S_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((unsigned)(x) & 0x7) << 12) +#define S_028804_HIGH_QUALITY_INTERSECTIONS(x) (((unsigned)(x) & 0x1) << 16) +#define S_028804_INCOHERENT_EQAA_READS(x) (((unsigned)(x) & 0x1) << 17) +#define S_028804_INTERPOLATE_COMP_Z(x) (((unsigned)(x) & 0x1) << 18) +#define S_028804_INTERPOLATE_SRC_Z(x) (((unsigned)(x) & 0x1) << 19) +#define S_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((unsigned)(x) & 0x1) << 20) +#define S_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((unsigned)(x) & 0x1) << 21) +#define S_028804_OVERRASTERIZATION_AMOUNT(x) (((unsigned)(x) & 0x07) << 24) +#define S_028804_ENABLE_POSTZ_OVERRASTERIZATION(x) (((unsigned)(x) & 0x1) << 27) +#define CM_R_028BDC_PA_SC_LINE_CNTL 0x28bdc +#define S_028BDC_EXPAND_LINE_WIDTH(x) (((unsigned)(x) & 0x1) << 9) +#define G_028BDC_EXPAND_LINE_WIDTH(x) (((x) >> 9) & 0x1) +#define C_028BDC_EXPAND_LINE_WIDTH 0xFFFFFDFF +#define S_028BDC_LAST_PIXEL(x) (((unsigned)(x) & 0x1) << 10) +#define G_028BDC_LAST_PIXEL(x) (((x) >> 10) & 0x1) +#define C_028BDC_LAST_PIXEL 0xFFFFFBFF +#define S_028BDC_PERPENDICULAR_ENDCAP_ENA(x) (((unsigned)(x) & 0x1) << 11) +#define G_028BDC_PERPENDICULAR_ENDCAP_ENA(x) (((x) >> 11) & 0x1) +#define C_028BDC_PERPENDICULAR_ENDCAP_ENA 0xFFFFF7FF +#define S_028BDC_DX10_DIAMOND_TEST_ENA(x) (((unsigned)(x) & 0x1) << 12) +#define G_028BDC_DX10_DIAMOND_TEST_ENA(x) (((x) >> 12) & 0x1) +#define C_028BDC_DX10_DIAMOND_TEST_ENA 0xFFFFEFFF +#define CM_R_028BE0_PA_SC_AA_CONFIG 0x28be0 +#define S_028BE0_MSAA_NUM_SAMPLES(x) (((unsigned)(x) & 0x7) << 0) +#define S_028BE0_AA_MASK_CENTROID_DTMN(x) (((unsigned)(x) & 0x1) << 4) +#define S_028BE0_MAX_SAMPLE_DIST(x) (((unsigned)(x) & 0xf) << 13) +#define S_028BE0_MSAA_EXPOSED_SAMPLES(x) (((unsigned)(x) & 0x7) << 20) +#define S_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((unsigned)(x) & 0x3) << 24) +#define CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 0x28bf8 +#define CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0 0x28c08 +#define CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0 0x28c18 +#define CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0 0x28c28 + +#define EG_S_028C70_FAST_CLEAR(x) (((unsigned)(x) & 0x1) << 17) +#define SI_S_028C70_FAST_CLEAR(x) (((unsigned)(x) & 0x1) << 13) + +/*CIK+*/ +#define R_0300FC_CP_STRMOUT_CNTL 0x0300FC + +#define R600_R_028C0C_PA_CL_GB_VERT_CLIP_ADJ 0x028C0C +#define CM_R_028BE8_PA_CL_GB_VERT_CLIP_ADJ 0x28be8 +#define R_02843C_PA_CL_VPORT_XSCALE 0x02843C + +#define R_028250_PA_SC_VPORT_SCISSOR_0_TL 0x028250 +#define S_028250_TL_X(x) (((unsigned)(x) & 0x7FFF) << 0) +#define G_028250_TL_X(x) (((x) >> 0) & 0x7FFF) +#define C_028250_TL_X 0xFFFF8000 +#define S_028250_TL_Y(x) (((unsigned)(x) & 0x7FFF) << 16) +#define G_028250_TL_Y(x) (((x) >> 16) & 0x7FFF) +#define C_028250_TL_Y 0x8000FFFF +#define S_028250_WINDOW_OFFSET_DISABLE(x) (((unsigned)(x) & 0x1) << 31) +#define G_028250_WINDOW_OFFSET_DISABLE(x) (((x) >> 31) & 0x1) +#define C_028250_WINDOW_OFFSET_DISABLE 0x7FFFFFFF +#define S_028254_BR_X(x) (((unsigned)(x) & 0x7FFF) << 0) +#define G_028254_BR_X(x) (((x) >> 0) & 0x7FFF) +#define C_028254_BR_X 0xFFFF8000 +#define S_028254_BR_Y(x) (((unsigned)(x) & 0x7FFF) << 16) +#define G_028254_BR_Y(x) (((x) >> 16) & 0x7FFF) +#define C_028254_BR_Y 0x8000FFFF +#define R_0282D0_PA_SC_VPORT_ZMIN_0 0x0282D0 +#define R_0282D4_PA_SC_VPORT_ZMAX_0 0x0282D4 + +#endif diff -Nru mesa-12.0.6/src/amd/common/sid.h mesa-17.0.7/src/amd/common/sid.h --- mesa-12.0.6/src/amd/common/sid.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/common/sid.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,9066 @@ +/* + * Southern Islands Register documentation + * + * Copyright (C) 2011 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN + * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef SID_H +#define SID_H + +/* si values */ +#define SI_CONFIG_REG_OFFSET 0x00008000 +#define SI_CONFIG_REG_END 0x0000B000 +#define SI_SH_REG_OFFSET 0x0000B000 +#define SI_SH_REG_END 0x0000C000 +#define SI_CONTEXT_REG_OFFSET 0x00028000 +#define SI_CONTEXT_REG_END 0x00029000 +#define CIK_UCONFIG_REG_OFFSET 0x00030000 +#define CIK_UCONFIG_REG_END 0x00038000 + +#define EVENT_TYPE_CACHE_FLUSH 0x6 +#define EVENT_TYPE_PS_PARTIAL_FLUSH 0x10 +#define EVENT_TYPE_CACHE_FLUSH_AND_INV_TS_EVENT 0x14 +#define EVENT_TYPE_ZPASS_DONE 0x15 +#define EVENT_TYPE_CACHE_FLUSH_AND_INV_EVENT 0x16 +#define EVENT_TYPE_SO_VGTSTREAMOUT_FLUSH 0x1f +#define EVENT_TYPE_SAMPLE_STREAMOUTSTATS 0x20 +#define EVENT_TYPE(x) ((x) << 0) +#define EVENT_INDEX(x) ((x) << 8) + /* 0 - any non-TS event + * 1 - ZPASS_DONE + * 2 - SAMPLE_PIPELINESTAT + * 3 - SAMPLE_STREAMOUTSTAT* + * 4 - *S_PARTIAL_FLUSH + * 5 - TS events + */ +#define EVENT_WRITE_INV_L2 0x100000 + + +#define PREDICATION_OP_CLEAR 0x0 +#define PREDICATION_OP_ZPASS 0x1 +#define PREDICATION_OP_PRIMCOUNT 0x2 + +#define PRED_OP(x) ((x) << 16) + +#define PREDICATION_CONTINUE (1 << 31) + +#define PREDICATION_HINT_WAIT (0 << 12) +#define PREDICATION_HINT_NOWAIT_DRAW (1 << 12) + +#define PREDICATION_DRAW_NOT_VISIBLE (0 << 8) +#define PREDICATION_DRAW_VISIBLE (1 << 8) + +#define R600_TEXEL_PITCH_ALIGNMENT_MASK 0x7 + +/* All registers defined in this packet section don't exist and the only + * purpose of these definitions is to define packet encoding that + * the IB parser understands, and also to have an accurate documentation. + */ +#define PKT3_NOP 0x10 +#define PKT3_SET_BASE 0x11 +#define PKT3_CLEAR_STATE 0x12 +#define PKT3_INDEX_BUFFER_SIZE 0x13 +#define PKT3_DISPATCH_DIRECT 0x15 +#define PKT3_DISPATCH_INDIRECT 0x16 +#define PKT3_OCCLUSION_QUERY 0x1F /* new for CIK */ +#define PKT3_SET_PREDICATION 0x20 +#define PKT3_COND_EXEC 0x22 +#define PKT3_PRED_EXEC 0x23 +#define PKT3_DRAW_INDIRECT 0x24 +#define PKT3_DRAW_INDEX_INDIRECT 0x25 +#define PKT3_INDEX_BASE 0x26 +#define PKT3_DRAW_INDEX_2 0x27 +#define PKT3_CONTEXT_CONTROL 0x28 +#define CONTEXT_CONTROL_LOAD_ENABLE(x) (((unsigned)(x) & 0x1) << 31) +#define CONTEXT_CONTROL_LOAD_CE_RAM(x) (((unsigned)(x) & 0x1) << 28) +#define CONTEXT_CONTROL_SHADOW_ENABLE(x) (((unsigned)(x) & 0x1) << 31) +#define PKT3_INDEX_TYPE 0x2A +#define PKT3_DRAW_INDIRECT_MULTI 0x2C +#define R_2C3_DRAW_INDEX_LOC 0x2C3 +#define S_2C3_COUNT_INDIRECT_ENABLE(x) (((unsigned)(x) & 0x1) << 30) +#define S_2C3_DRAW_INDEX_ENABLE(x) (((unsigned)(x) & 0x1) << 31) +#define PKT3_DRAW_INDEX_AUTO 0x2D +#define PKT3_DRAW_INDEX_IMMD 0x2E /* not on CIK */ +#define PKT3_NUM_INSTANCES 0x2F +#define PKT3_DRAW_INDEX_MULTI_AUTO 0x30 +#define PKT3_INDIRECT_BUFFER_SI 0x32 /* not on CIK */ +#define PKT3_INDIRECT_BUFFER_CONST 0x33 +#define PKT3_STRMOUT_BUFFER_UPDATE 0x34 +#define PKT3_DRAW_INDEX_OFFSET_2 0x35 +#define PKT3_WRITE_DATA 0x37 +#define R_370_CONTROL 0x370 /* 0x[packet number][word index] */ +#define S_370_ENGINE_SEL(x) (((unsigned)(x) & 0x3) << 30) +#define V_370_ME 0 +#define V_370_PFP 1 +#define V_370_CE 2 +#define V_370_DE 3 +#define S_370_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 20) +#define S_370_WR_ONE_ADDR(x) (((unsigned)(x) & 0x1) << 16) +#define S_370_DST_SEL(x) (((unsigned)(x) & 0xf) << 8) +#define V_370_MEM_MAPPED_REGISTER 0 +#define V_370_MEMORY_SYNC 1 +#define V_370_TC_L2 2 +#define V_370_GDS 3 +#define V_370_RESERVED 4 +#define V_370_MEM_ASYNC 5 +#define R_371_DST_ADDR_LO 0x371 +#define R_372_DST_ADDR_HI 0x372 +#define PKT3_DRAW_INDEX_INDIRECT_MULTI 0x38 +#define PKT3_MEM_SEMAPHORE 0x39 +#define PKT3_MPEG_INDEX 0x3A /* not on CIK */ +#define PKT3_WAIT_REG_MEM 0x3C +#define WAIT_REG_MEM_EQUAL 3 +#define PKT3_MEM_WRITE 0x3D /* not on CIK */ +#define PKT3_INDIRECT_BUFFER_CIK 0x3F /* new on CIK */ +#define R_3F0_IB_BASE_LO 0x3F0 +#define R_3F1_IB_BASE_HI 0x3F1 +#define R_3F2_CONTROL 0x3F2 +#define S_3F2_IB_SIZE(x) (((unsigned)(x) & 0xfffff) << 0) +#define G_3F2_IB_SIZE(x) (((unsigned)(x) >> 0) & 0xfffff) +#define S_3F2_CHAIN(x) (((unsigned)(x) & 0x1) << 20) +#define G_3F2_CHAIN(x) (((unsigned)(x) >> 20) & 0x1) +#define S_3F2_VALID(x) (((unsigned)(x) & 0x1) << 23) + +#define PKT3_COPY_DATA 0x40 +#define COPY_DATA_SRC_SEL(x) ((x) & 0xf) +#define COPY_DATA_REG 0 +#define COPY_DATA_MEM 1 +#define COPY_DATA_PERF 4 +#define COPY_DATA_IMM 5 +#define COPY_DATA_DST_SEL(x) (((unsigned)(x) & 0xf) << 8) +#define COPY_DATA_COUNT_SEL (1 << 16) +#define COPY_DATA_WR_CONFIRM (1 << 20) +#define PKT3_PFP_SYNC_ME 0x42 +#define PKT3_SURFACE_SYNC 0x43 /* deprecated on CIK, use ACQUIRE_MEM */ +#define PKT3_ME_INITIALIZE 0x44 /* not on CIK */ +#define PKT3_COND_WRITE 0x45 +#define PKT3_EVENT_WRITE 0x46 +#define PKT3_EVENT_WRITE_EOP 0x47 +/* CP DMA bug: Any use of CP_DMA.DST_SEL=TC must be avoided when EOS packets + * are used. Use DST_SEL=MC instead. For prefetch, use SRC_SEL=TC and + * DST_SEL=MC. Only CIK chips are affected. + */ +/*#define PKT3_EVENT_WRITE_EOS 0x48*/ /* fix CP DMA before uncommenting */ +#define PKT3_RELEASE_MEM 0x49 +#define PKT3_ONE_REG_WRITE 0x57 /* not on CIK */ +#define PKT3_ACQUIRE_MEM 0x58 /* new for CIK */ +#define PKT3_SET_CONFIG_REG 0x68 +#define PKT3_SET_CONTEXT_REG 0x69 +#define PKT3_SET_SH_REG 0x76 +#define PKT3_SET_SH_REG_OFFSET 0x77 +#define PKT3_SET_UCONFIG_REG 0x79 /* new for CIK */ +#define PKT3_LOAD_CONST_RAM 0x80 +#define PKT3_WRITE_CONST_RAM 0x81 +#define PKT3_DUMP_CONST_RAM 0x83 +#define PKT3_INCREMENT_CE_COUNTER 0x84 +#define PKT3_INCREMENT_DE_COUNTER 0x85 +#define PKT3_WAIT_ON_CE_COUNTER 0x86 + +#define PKT_TYPE_S(x) (((unsigned)(x) & 0x3) << 30) +#define PKT_TYPE_G(x) (((x) >> 30) & 0x3) +#define PKT_TYPE_C 0x3FFFFFFF +#define PKT_COUNT_S(x) (((unsigned)(x) & 0x3FFF) << 16) +#define PKT_COUNT_G(x) (((x) >> 16) & 0x3FFF) +#define PKT_COUNT_C 0xC000FFFF +#define PKT0_BASE_INDEX_S(x) (((unsigned)(x) & 0xFFFF) << 0) +#define PKT0_BASE_INDEX_G(x) (((x) >> 0) & 0xFFFF) +#define PKT0_BASE_INDEX_C 0xFFFF0000 +#define PKT3_IT_OPCODE_S(x) (((unsigned)(x) & 0xFF) << 8) +#define PKT3_IT_OPCODE_G(x) (((x) >> 8) & 0xFF) +#define PKT3_IT_OPCODE_C 0xFFFF00FF +#define PKT3_PREDICATE(x) (((x) >> 0) & 0x1) +#define PKT3_SHADER_TYPE_S(x) (((unsigned)(x) & 0x1) << 1) +#define PKT0(index, count) (PKT_TYPE_S(0) | PKT0_BASE_INDEX_S(index) | PKT_COUNT_S(count)) +#define PKT3(op, count, predicate) (PKT_TYPE_S(3) | PKT_COUNT_S(count) | PKT3_IT_OPCODE_S(op) | PKT3_PREDICATE(predicate)) + +#define PKT3_CP_DMA 0x41 +/* 1. header + * 2. SRC_ADDR_LO [31:0] or DATA [31:0] + * 3. CP_SYNC [31] | SRC_SEL [30:29] | ENGINE [27] | DST_SEL [21:20] | SRC_ADDR_HI [15:0] + * 4. DST_ADDR_LO [31:0] + * 5. DST_ADDR_HI [15:0] + * 6. COMMAND [29:22] | BYTE_COUNT [20:0] + */ +#define R_410_CP_DMA_WORD0 0x410 /* 0x[packet number][word index] */ +#define S_410_SRC_ADDR_LO(x) ((x) & 0xffffffff) +#define R_411_CP_DMA_WORD1 0x411 +#define S_411_CP_SYNC(x) (((unsigned)(x) & 0x1) << 31) +#define S_411_SRC_SEL(x) (((unsigned)(x) & 0x3) << 29) +#define V_411_SRC_ADDR 0 +#define V_411_GDS 1 /* program SAS to 1 as well */ +#define V_411_DATA 2 +#define V_411_SRC_ADDR_TC_L2 3 /* new for CIK */ +#define S_411_ENGINE(x) (((unsigned)(x) & 0x1) << 27) +#define V_411_ME 0 +#define V_411_PFP 1 +#define S_411_DSL_SEL(x) (((unsigned)(x) & 0x3) << 20) +#define V_411_DST_ADDR 0 +#define V_411_GDS 1 /* program DAS to 1 as well */ +#define V_411_DST_ADDR_TC_L2 3 /* new for CIK */ +#define S_411_SRC_ADDR_HI(x) ((x) & 0xffff) +#define R_412_CP_DMA_WORD2 0x412 /* 0x[packet number][word index] */ +#define S_412_DST_ADDR_LO(x) ((x) & 0xffffffff) +#define R_413_CP_DMA_WORD3 0x413 /* 0x[packet number][word index] */ +#define S_413_DST_ADDR_HI(x) ((x) & 0xffff) +#define R_414_COMMAND 0x414 +#define S_414_BYTE_COUNT(x) ((x) & 0x1fffff) +#define S_414_DISABLE_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 21) +#define S_414_SRC_SWAP(x) (((unsigned)(x) & 0x3) << 22) +#define V_414_NONE 0 +#define V_414_8_IN_16 1 +#define V_414_8_IN_32 2 +#define V_414_8_IN_64 3 +#define S_414_DST_SWAP(x) (((unsigned)(x) & 0x3) << 24) +#define V_414_NONE 0 +#define V_414_8_IN_16 1 +#define V_414_8_IN_32 2 +#define V_414_8_IN_64 3 +#define S_414_SAS(x) (((unsigned)(x) & 0x1) << 26) +#define V_414_MEMORY 0 +#define V_414_REGISTER 1 +#define S_414_DAS(x) (((unsigned)(x) & 0x1) << 27) +#define V_414_MEMORY 0 +#define V_414_REGISTER 1 +#define S_414_SAIC(x) (((unsigned)(x) & 0x1) << 28) +#define V_414_INCREMENT 0 +#define V_414_NO_INCREMENT 1 +#define S_414_DAIC(x) (((unsigned)(x) & 0x1) << 29) +#define V_414_INCREMENT 0 +#define V_414_NO_INCREMENT 1 +#define S_414_RAW_WAIT(x) (((unsigned)(x) & 0x1) << 30) + +#define PKT3_DMA_DATA 0x50 /* new for CIK */ +/* 1. header + * 2. CP_SYNC [31] | SRC_SEL [30:29] | DST_SEL [21:20] | ENGINE [0] + * 2. SRC_ADDR_LO [31:0] or DATA [31:0] + * 3. SRC_ADDR_HI [31:0] + * 4. DST_ADDR_LO [31:0] + * 5. DST_ADDR_HI [31:0] + * 6. COMMAND [29:22] | BYTE_COUNT [20:0] + */ +#define R_500_DMA_DATA_WORD0 0x500 /* 0x[packet number][word index] */ +#define S_500_CP_SYNC(x) (((unsigned)(x) & 0x1) << 31) +#define S_500_SRC_SEL(x) (((unsigned)(x) & 0x3) << 29) +#define V_500_SRC_ADDR 0 +#define V_500_GDS 1 /* program SAS to 1 as well */ +#define V_500_DATA 2 +#define V_500_SRC_ADDR_TC_L2 3 /* new for CIK */ +#define S_500_DSL_SEL(x) (((unsigned)(x) & 0x3) << 20) +#define V_500_DST_ADDR 0 +#define V_500_GDS 1 /* program DAS to 1 as well */ +#define V_500_DST_ADDR_TC_L2 3 /* new for CIK */ +#define S_500_ENGINE(x) ((x) & 0x1) +#define V_500_ME 0 +#define V_500_PFP 1 +#define R_501_SRC_ADDR_LO 0x501 +#define R_502_SRC_ADDR_HI 0x502 +#define R_503_DST_ADDR_LO 0x503 +#define R_504_DST_ADDR_HI 0x504 + +#define R_000E4C_SRBM_STATUS2 0x000E4C +#define S_000E4C_SDMA_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 0) +#define G_000E4C_SDMA_RQ_PENDING(x) (((x) >> 0) & 0x1) +#define C_000E4C_SDMA_RQ_PENDING 0xFFFFFFFE +#define S_000E4C_TST_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 1) +#define G_000E4C_TST_RQ_PENDING(x) (((x) >> 1) & 0x1) +#define C_000E4C_TST_RQ_PENDING 0xFFFFFFFD +#define S_000E4C_SDMA1_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 2) +#define G_000E4C_SDMA1_RQ_PENDING(x) (((x) >> 2) & 0x1) +#define C_000E4C_SDMA1_RQ_PENDING 0xFFFFFFFB +#define S_000E4C_VCE0_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 3) +#define G_000E4C_VCE0_RQ_PENDING(x) (((x) >> 3) & 0x1) +#define C_000E4C_VCE0_RQ_PENDING 0xFFFFFFF7 +#define S_000E4C_VP8_BUSY(x) (((unsigned)(x) & 0x1) << 4) +#define G_000E4C_VP8_BUSY(x) (((x) >> 4) & 0x1) +#define C_000E4C_VP8_BUSY 0xFFFFFFEF +#define S_000E4C_SDMA_BUSY(x) (((unsigned)(x) & 0x1) << 5) +#define G_000E4C_SDMA_BUSY(x) (((x) >> 5) & 0x1) +#define C_000E4C_SDMA_BUSY 0xFFFFFFDF +#define S_000E4C_SDMA1_BUSY(x) (((unsigned)(x) & 0x1) << 6) +#define G_000E4C_SDMA1_BUSY(x) (((x) >> 6) & 0x1) +#define C_000E4C_SDMA1_BUSY 0xFFFFFFBF +#define S_000E4C_VCE0_BUSY(x) (((unsigned)(x) & 0x1) << 7) +#define G_000E4C_VCE0_BUSY(x) (((x) >> 7) & 0x1) +#define C_000E4C_VCE0_BUSY 0xFFFFFF7F +#define S_000E4C_XDMA_BUSY(x) (((unsigned)(x) & 0x1) << 8) +#define G_000E4C_XDMA_BUSY(x) (((x) >> 8) & 0x1) +#define C_000E4C_XDMA_BUSY 0xFFFFFEFF +#define S_000E4C_CHUB_BUSY(x) (((unsigned)(x) & 0x1) << 9) +#define G_000E4C_CHUB_BUSY(x) (((x) >> 9) & 0x1) +#define C_000E4C_CHUB_BUSY 0xFFFFFDFF +#define S_000E4C_SDMA2_BUSY(x) (((unsigned)(x) & 0x1) << 10) +#define G_000E4C_SDMA2_BUSY(x) (((x) >> 10) & 0x1) +#define C_000E4C_SDMA2_BUSY 0xFFFFFBFF +#define S_000E4C_SDMA3_BUSY(x) (((unsigned)(x) & 0x1) << 11) +#define G_000E4C_SDMA3_BUSY(x) (((x) >> 11) & 0x1) +#define C_000E4C_SDMA3_BUSY 0xFFFFF7FF +#define S_000E4C_SAMSCP_BUSY(x) (((unsigned)(x) & 0x1) << 12) +#define G_000E4C_SAMSCP_BUSY(x) (((x) >> 12) & 0x1) +#define C_000E4C_SAMSCP_BUSY 0xFFFFEFFF +#define S_000E4C_ISP_BUSY(x) (((unsigned)(x) & 0x1) << 13) +#define G_000E4C_ISP_BUSY(x) (((x) >> 13) & 0x1) +#define C_000E4C_ISP_BUSY 0xFFFFDFFF +#define S_000E4C_VCE1_BUSY(x) (((unsigned)(x) & 0x1) << 14) +#define G_000E4C_VCE1_BUSY(x) (((x) >> 14) & 0x1) +#define C_000E4C_VCE1_BUSY 0xFFFFBFFF +#define S_000E4C_ODE_BUSY(x) (((unsigned)(x) & 0x1) << 15) +#define G_000E4C_ODE_BUSY(x) (((x) >> 15) & 0x1) +#define C_000E4C_ODE_BUSY 0xFFFF7FFF +#define S_000E4C_SDMA2_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 16) +#define G_000E4C_SDMA2_RQ_PENDING(x) (((x) >> 16) & 0x1) +#define C_000E4C_SDMA2_RQ_PENDING 0xFFFEFFFF +#define S_000E4C_SDMA3_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 17) +#define G_000E4C_SDMA3_RQ_PENDING(x) (((x) >> 17) & 0x1) +#define C_000E4C_SDMA3_RQ_PENDING 0xFFFDFFFF +#define S_000E4C_SAMSCP_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 18) +#define G_000E4C_SAMSCP_RQ_PENDING(x) (((x) >> 18) & 0x1) +#define C_000E4C_SAMSCP_RQ_PENDING 0xFFFBFFFF +#define S_000E4C_ISP_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 19) +#define G_000E4C_ISP_RQ_PENDING(x) (((x) >> 19) & 0x1) +#define C_000E4C_ISP_RQ_PENDING 0xFFF7FFFF +#define S_000E4C_VCE1_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 20) +#define G_000E4C_VCE1_RQ_PENDING(x) (((x) >> 20) & 0x1) +#define C_000E4C_VCE1_RQ_PENDING 0xFFEFFFFF +#define R_000E50_SRBM_STATUS 0x000E50 +#define S_000E50_UVD_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 1) +#define G_000E50_UVD_RQ_PENDING(x) (((x) >> 1) & 0x1) +#define C_000E50_UVD_RQ_PENDING 0xFFFFFFFD +#define S_000E50_SAMMSP_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 2) +#define G_000E50_SAMMSP_RQ_PENDING(x) (((x) >> 2) & 0x1) +#define C_000E50_SAMMSP_RQ_PENDING 0xFFFFFFFB +#define S_000E50_ACP_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 3) +#define G_000E50_ACP_RQ_PENDING(x) (((x) >> 3) & 0x1) +#define C_000E50_ACP_RQ_PENDING 0xFFFFFFF7 +#define S_000E50_SMU_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 4) +#define G_000E50_SMU_RQ_PENDING(x) (((x) >> 4) & 0x1) +#define C_000E50_SMU_RQ_PENDING 0xFFFFFFEF +#define S_000E50_GRBM_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 5) +#define G_000E50_GRBM_RQ_PENDING(x) (((x) >> 5) & 0x1) +#define C_000E50_GRBM_RQ_PENDING 0xFFFFFFDF +#define S_000E50_HI_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 6) +#define G_000E50_HI_RQ_PENDING(x) (((x) >> 6) & 0x1) +#define C_000E50_HI_RQ_PENDING 0xFFFFFFBF +#define S_000E50_VMC_BUSY(x) (((unsigned)(x) & 0x1) << 8) +#define G_000E50_VMC_BUSY(x) (((x) >> 8) & 0x1) +#define C_000E50_VMC_BUSY 0xFFFFFEFF +#define S_000E50_MCB_BUSY(x) (((unsigned)(x) & 0x1) << 9) +#define G_000E50_MCB_BUSY(x) (((x) >> 9) & 0x1) +#define C_000E50_MCB_BUSY 0xFFFFFDFF +#define S_000E50_MCB_NON_DISPLAY_BUSY(x) (((unsigned)(x) & 0x1) << 10) +#define G_000E50_MCB_NON_DISPLAY_BUSY(x) (((x) >> 10) & 0x1) +#define C_000E50_MCB_NON_DISPLAY_BUSY 0xFFFFFBFF +#define S_000E50_MCC_BUSY(x) (((unsigned)(x) & 0x1) << 11) +#define G_000E50_MCC_BUSY(x) (((x) >> 11) & 0x1) +#define C_000E50_MCC_BUSY 0xFFFFF7FF +#define S_000E50_MCD_BUSY(x) (((unsigned)(x) & 0x1) << 12) +#define G_000E50_MCD_BUSY(x) (((x) >> 12) & 0x1) +#define C_000E50_MCD_BUSY 0xFFFFEFFF +#define S_000E50_VMC1_BUSY(x) (((unsigned)(x) & 0x1) << 13) +#define G_000E50_VMC1_BUSY(x) (((x) >> 13) & 0x1) +#define C_000E50_VMC1_BUSY 0xFFFFDFFF +#define S_000E50_SEM_BUSY(x) (((unsigned)(x) & 0x1) << 14) +#define G_000E50_SEM_BUSY(x) (((x) >> 14) & 0x1) +#define C_000E50_SEM_BUSY 0xFFFFBFFF +#define S_000E50_ACP_BUSY(x) (((unsigned)(x) & 0x1) << 16) +#define G_000E50_ACP_BUSY(x) (((x) >> 16) & 0x1) +#define C_000E50_ACP_BUSY 0xFFFEFFFF +#define S_000E50_IH_BUSY(x) (((unsigned)(x) & 0x1) << 17) +#define G_000E50_IH_BUSY(x) (((x) >> 17) & 0x1) +#define C_000E50_IH_BUSY 0xFFFDFFFF +#define S_000E50_UVD_BUSY(x) (((unsigned)(x) & 0x1) << 19) +#define G_000E50_UVD_BUSY(x) (((x) >> 19) & 0x1) +#define C_000E50_UVD_BUSY 0xFFF7FFFF +#define S_000E50_SAMMSP_BUSY(x) (((unsigned)(x) & 0x1) << 20) +#define G_000E50_SAMMSP_BUSY(x) (((x) >> 20) & 0x1) +#define C_000E50_SAMMSP_BUSY 0xFFEFFFFF +#define S_000E50_GCATCL2_BUSY(x) (((unsigned)(x) & 0x1) << 21) +#define G_000E50_GCATCL2_BUSY(x) (((x) >> 21) & 0x1) +#define C_000E50_GCATCL2_BUSY 0xFFDFFFFF +#define S_000E50_OSATCL2_BUSY(x) (((unsigned)(x) & 0x1) << 22) +#define G_000E50_OSATCL2_BUSY(x) (((x) >> 22) & 0x1) +#define C_000E50_OSATCL2_BUSY 0xFFBFFFFF +#define S_000E50_BIF_BUSY(x) (((unsigned)(x) & 0x1) << 29) +#define G_000E50_BIF_BUSY(x) (((x) >> 29) & 0x1) +#define C_000E50_BIF_BUSY 0xDFFFFFFF +#define R_000E54_SRBM_STATUS3 0x000E54 +#define S_000E54_MCC0_BUSY(x) (((unsigned)(x) & 0x1) << 0) +#define G_000E54_MCC0_BUSY(x) (((x) >> 0) & 0x1) +#define C_000E54_MCC0_BUSY 0xFFFFFFFE +#define S_000E54_MCC1_BUSY(x) (((unsigned)(x) & 0x1) << 1) +#define G_000E54_MCC1_BUSY(x) (((x) >> 1) & 0x1) +#define C_000E54_MCC1_BUSY 0xFFFFFFFD +#define S_000E54_MCC2_BUSY(x) (((unsigned)(x) & 0x1) << 2) +#define G_000E54_MCC2_BUSY(x) (((x) >> 2) & 0x1) +#define C_000E54_MCC2_BUSY 0xFFFFFFFB +#define S_000E54_MCC3_BUSY(x) (((unsigned)(x) & 0x1) << 3) +#define G_000E54_MCC3_BUSY(x) (((x) >> 3) & 0x1) +#define C_000E54_MCC3_BUSY 0xFFFFFFF7 +#define S_000E54_MCC4_BUSY(x) (((unsigned)(x) & 0x1) << 4) +#define G_000E54_MCC4_BUSY(x) (((x) >> 4) & 0x1) +#define C_000E54_MCC4_BUSY 0xFFFFFFEF +#define S_000E54_MCC5_BUSY(x) (((unsigned)(x) & 0x1) << 5) +#define G_000E54_MCC5_BUSY(x) (((x) >> 5) & 0x1) +#define C_000E54_MCC5_BUSY 0xFFFFFFDF +#define S_000E54_MCC6_BUSY(x) (((unsigned)(x) & 0x1) << 6) +#define G_000E54_MCC6_BUSY(x) (((x) >> 6) & 0x1) +#define C_000E54_MCC6_BUSY 0xFFFFFFBF +#define S_000E54_MCC7_BUSY(x) (((unsigned)(x) & 0x1) << 7) +#define G_000E54_MCC7_BUSY(x) (((x) >> 7) & 0x1) +#define C_000E54_MCC7_BUSY 0xFFFFFF7F +#define S_000E54_MCD0_BUSY(x) (((unsigned)(x) & 0x1) << 8) +#define G_000E54_MCD0_BUSY(x) (((x) >> 8) & 0x1) +#define C_000E54_MCD0_BUSY 0xFFFFFEFF +#define S_000E54_MCD1_BUSY(x) (((unsigned)(x) & 0x1) << 9) +#define G_000E54_MCD1_BUSY(x) (((x) >> 9) & 0x1) +#define C_000E54_MCD1_BUSY 0xFFFFFDFF +#define S_000E54_MCD2_BUSY(x) (((unsigned)(x) & 0x1) << 10) +#define G_000E54_MCD2_BUSY(x) (((x) >> 10) & 0x1) +#define C_000E54_MCD2_BUSY 0xFFFFFBFF +#define S_000E54_MCD3_BUSY(x) (((unsigned)(x) & 0x1) << 11) +#define G_000E54_MCD3_BUSY(x) (((x) >> 11) & 0x1) +#define C_000E54_MCD3_BUSY 0xFFFFF7FF +#define S_000E54_MCD4_BUSY(x) (((unsigned)(x) & 0x1) << 12) +#define G_000E54_MCD4_BUSY(x) (((x) >> 12) & 0x1) +#define C_000E54_MCD4_BUSY 0xFFFFEFFF +#define S_000E54_MCD5_BUSY(x) (((unsigned)(x) & 0x1) << 13) +#define G_000E54_MCD5_BUSY(x) (((x) >> 13) & 0x1) +#define C_000E54_MCD5_BUSY 0xFFFFDFFF +#define S_000E54_MCD6_BUSY(x) (((unsigned)(x) & 0x1) << 14) +#define G_000E54_MCD6_BUSY(x) (((x) >> 14) & 0x1) +#define C_000E54_MCD6_BUSY 0xFFFFBFFF +#define S_000E54_MCD7_BUSY(x) (((unsigned)(x) & 0x1) << 15) +#define G_000E54_MCD7_BUSY(x) (((x) >> 15) & 0x1) +#define C_000E54_MCD7_BUSY 0xFFFF7FFF +#define R_00D034_SDMA0_STATUS_REG 0x00D034 +#define S_00D034_IDLE(x) (((unsigned)(x) & 0x1) << 0) +#define G_00D034_IDLE(x) (((x) >> 0) & 0x1) +#define C_00D034_IDLE 0xFFFFFFFE +#define S_00D034_REG_IDLE(x) (((unsigned)(x) & 0x1) << 1) +#define G_00D034_REG_IDLE(x) (((x) >> 1) & 0x1) +#define C_00D034_REG_IDLE 0xFFFFFFFD +#define S_00D034_RB_EMPTY(x) (((unsigned)(x) & 0x1) << 2) +#define G_00D034_RB_EMPTY(x) (((x) >> 2) & 0x1) +#define C_00D034_RB_EMPTY 0xFFFFFFFB +#define S_00D034_RB_FULL(x) (((unsigned)(x) & 0x1) << 3) +#define G_00D034_RB_FULL(x) (((x) >> 3) & 0x1) +#define C_00D034_RB_FULL 0xFFFFFFF7 +#define S_00D034_RB_CMD_IDLE(x) (((unsigned)(x) & 0x1) << 4) +#define G_00D034_RB_CMD_IDLE(x) (((x) >> 4) & 0x1) +#define C_00D034_RB_CMD_IDLE 0xFFFFFFEF +#define S_00D034_RB_CMD_FULL(x) (((unsigned)(x) & 0x1) << 5) +#define G_00D034_RB_CMD_FULL(x) (((x) >> 5) & 0x1) +#define C_00D034_RB_CMD_FULL 0xFFFFFFDF +#define S_00D034_IB_CMD_IDLE(x) (((unsigned)(x) & 0x1) << 6) +#define G_00D034_IB_CMD_IDLE(x) (((x) >> 6) & 0x1) +#define C_00D034_IB_CMD_IDLE 0xFFFFFFBF +#define S_00D034_IB_CMD_FULL(x) (((unsigned)(x) & 0x1) << 7) +#define G_00D034_IB_CMD_FULL(x) (((x) >> 7) & 0x1) +#define C_00D034_IB_CMD_FULL 0xFFFFFF7F +#define S_00D034_BLOCK_IDLE(x) (((unsigned)(x) & 0x1) << 8) +#define G_00D034_BLOCK_IDLE(x) (((x) >> 8) & 0x1) +#define C_00D034_BLOCK_IDLE 0xFFFFFEFF +#define S_00D034_INSIDE_IB(x) (((unsigned)(x) & 0x1) << 9) +#define G_00D034_INSIDE_IB(x) (((x) >> 9) & 0x1) +#define C_00D034_INSIDE_IB 0xFFFFFDFF +#define S_00D034_EX_IDLE(x) (((unsigned)(x) & 0x1) << 10) +#define G_00D034_EX_IDLE(x) (((x) >> 10) & 0x1) +#define C_00D034_EX_IDLE 0xFFFFFBFF +#define S_00D034_EX_IDLE_POLL_TIMER_EXPIRE(x) (((unsigned)(x) & 0x1) << 11) +#define G_00D034_EX_IDLE_POLL_TIMER_EXPIRE(x) (((x) >> 11) & 0x1) +#define C_00D034_EX_IDLE_POLL_TIMER_EXPIRE 0xFFFFF7FF +#define S_00D034_PACKET_READY(x) (((unsigned)(x) & 0x1) << 12) +#define G_00D034_PACKET_READY(x) (((x) >> 12) & 0x1) +#define C_00D034_PACKET_READY 0xFFFFEFFF +#define S_00D034_MC_WR_IDLE(x) (((unsigned)(x) & 0x1) << 13) +#define G_00D034_MC_WR_IDLE(x) (((x) >> 13) & 0x1) +#define C_00D034_MC_WR_IDLE 0xFFFFDFFF +#define S_00D034_SRBM_IDLE(x) (((unsigned)(x) & 0x1) << 14) +#define G_00D034_SRBM_IDLE(x) (((x) >> 14) & 0x1) +#define C_00D034_SRBM_IDLE 0xFFFFBFFF +#define S_00D034_CONTEXT_EMPTY(x) (((unsigned)(x) & 0x1) << 15) +#define G_00D034_CONTEXT_EMPTY(x) (((x) >> 15) & 0x1) +#define C_00D034_CONTEXT_EMPTY 0xFFFF7FFF +#define S_00D034_DELTA_RPTR_FULL(x) (((unsigned)(x) & 0x1) << 16) +#define G_00D034_DELTA_RPTR_FULL(x) (((x) >> 16) & 0x1) +#define C_00D034_DELTA_RPTR_FULL 0xFFFEFFFF +#define S_00D034_RB_MC_RREQ_IDLE(x) (((unsigned)(x) & 0x1) << 17) +#define G_00D034_RB_MC_RREQ_IDLE(x) (((x) >> 17) & 0x1) +#define C_00D034_RB_MC_RREQ_IDLE 0xFFFDFFFF +#define S_00D034_IB_MC_RREQ_IDLE(x) (((unsigned)(x) & 0x1) << 18) +#define G_00D034_IB_MC_RREQ_IDLE(x) (((x) >> 18) & 0x1) +#define C_00D034_IB_MC_RREQ_IDLE 0xFFFBFFFF +#define S_00D034_MC_RD_IDLE(x) (((unsigned)(x) & 0x1) << 19) +#define G_00D034_MC_RD_IDLE(x) (((x) >> 19) & 0x1) +#define C_00D034_MC_RD_IDLE 0xFFF7FFFF +#define S_00D034_DELTA_RPTR_EMPTY(x) (((unsigned)(x) & 0x1) << 20) +#define G_00D034_DELTA_RPTR_EMPTY(x) (((x) >> 20) & 0x1) +#define C_00D034_DELTA_RPTR_EMPTY 0xFFEFFFFF +#define S_00D034_MC_RD_RET_STALL(x) (((unsigned)(x) & 0x1) << 21) +#define G_00D034_MC_RD_RET_STALL(x) (((x) >> 21) & 0x1) +#define C_00D034_MC_RD_RET_STALL 0xFFDFFFFF +#define S_00D034_MC_RD_NO_POLL_IDLE(x) (((unsigned)(x) & 0x1) << 22) +#define G_00D034_MC_RD_NO_POLL_IDLE(x) (((x) >> 22) & 0x1) +#define C_00D034_MC_RD_NO_POLL_IDLE 0xFFBFFFFF +#define S_00D034_PREV_CMD_IDLE(x) (((unsigned)(x) & 0x1) << 25) +#define G_00D034_PREV_CMD_IDLE(x) (((x) >> 25) & 0x1) +#define C_00D034_PREV_CMD_IDLE 0xFDFFFFFF +#define S_00D034_SEM_IDLE(x) (((unsigned)(x) & 0x1) << 26) +#define G_00D034_SEM_IDLE(x) (((x) >> 26) & 0x1) +#define C_00D034_SEM_IDLE 0xFBFFFFFF +#define S_00D034_SEM_REQ_STALL(x) (((unsigned)(x) & 0x1) << 27) +#define G_00D034_SEM_REQ_STALL(x) (((x) >> 27) & 0x1) +#define C_00D034_SEM_REQ_STALL 0xF7FFFFFF +#define S_00D034_SEM_RESP_STATE(x) (((unsigned)(x) & 0x03) << 28) +#define G_00D034_SEM_RESP_STATE(x) (((x) >> 28) & 0x03) +#define C_00D034_SEM_RESP_STATE 0xCFFFFFFF +#define S_00D034_INT_IDLE(x) (((unsigned)(x) & 0x1) << 30) +#define G_00D034_INT_IDLE(x) (((x) >> 30) & 0x1) +#define C_00D034_INT_IDLE 0xBFFFFFFF +#define S_00D034_INT_REQ_STALL(x) (((unsigned)(x) & 0x1) << 31) +#define G_00D034_INT_REQ_STALL(x) (((x) >> 31) & 0x1) +#define C_00D034_INT_REQ_STALL 0x7FFFFFFF +#define R_00D834_SDMA1_STATUS_REG 0x00D834 +#define R_008008_GRBM_STATUS2 0x008008 +#define S_008008_ME0PIPE1_CMDFIFO_AVAIL(x) (((unsigned)(x) & 0x0F) << 0) +#define G_008008_ME0PIPE1_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x0F) +#define C_008008_ME0PIPE1_CMDFIFO_AVAIL 0xFFFFFFF0 +#define S_008008_ME0PIPE1_CF_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 4) +#define G_008008_ME0PIPE1_CF_RQ_PENDING(x) (((x) >> 4) & 0x1) +#define C_008008_ME0PIPE1_CF_RQ_PENDING 0xFFFFFFEF +#define S_008008_ME0PIPE1_PF_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 5) +#define G_008008_ME0PIPE1_PF_RQ_PENDING(x) (((x) >> 5) & 0x1) +#define C_008008_ME0PIPE1_PF_RQ_PENDING 0xFFFFFFDF +#define S_008008_ME1PIPE0_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 6) +#define G_008008_ME1PIPE0_RQ_PENDING(x) (((x) >> 6) & 0x1) +#define C_008008_ME1PIPE0_RQ_PENDING 0xFFFFFFBF +#define S_008008_ME1PIPE1_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 7) +#define G_008008_ME1PIPE1_RQ_PENDING(x) (((x) >> 7) & 0x1) +#define C_008008_ME1PIPE1_RQ_PENDING 0xFFFFFF7F +#define S_008008_ME1PIPE2_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 8) +#define G_008008_ME1PIPE2_RQ_PENDING(x) (((x) >> 8) & 0x1) +#define C_008008_ME1PIPE2_RQ_PENDING 0xFFFFFEFF +#define S_008008_ME1PIPE3_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 9) +#define G_008008_ME1PIPE3_RQ_PENDING(x) (((x) >> 9) & 0x1) +#define C_008008_ME1PIPE3_RQ_PENDING 0xFFFFFDFF +#define S_008008_ME2PIPE0_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 10) +#define G_008008_ME2PIPE0_RQ_PENDING(x) (((x) >> 10) & 0x1) +#define C_008008_ME2PIPE0_RQ_PENDING 0xFFFFFBFF +#define S_008008_ME2PIPE1_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 11) +#define G_008008_ME2PIPE1_RQ_PENDING(x) (((x) >> 11) & 0x1) +#define C_008008_ME2PIPE1_RQ_PENDING 0xFFFFF7FF +#define S_008008_ME2PIPE2_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 12) +#define G_008008_ME2PIPE2_RQ_PENDING(x) (((x) >> 12) & 0x1) +#define C_008008_ME2PIPE2_RQ_PENDING 0xFFFFEFFF +#define S_008008_ME2PIPE3_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 13) +#define G_008008_ME2PIPE3_RQ_PENDING(x) (((x) >> 13) & 0x1) +#define C_008008_ME2PIPE3_RQ_PENDING 0xFFFFDFFF +#define S_008008_RLC_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 14) +#define G_008008_RLC_RQ_PENDING(x) (((x) >> 14) & 0x1) +#define C_008008_RLC_RQ_PENDING 0xFFFFBFFF +#define S_008008_RLC_BUSY(x) (((unsigned)(x) & 0x1) << 24) +#define G_008008_RLC_BUSY(x) (((x) >> 24) & 0x1) +#define C_008008_RLC_BUSY 0xFEFFFFFF +#define S_008008_TC_BUSY(x) (((unsigned)(x) & 0x1) << 25) +#define G_008008_TC_BUSY(x) (((x) >> 25) & 0x1) +#define C_008008_TC_BUSY 0xFDFFFFFF +#define S_008008_TCC_CC_RESIDENT(x) (((unsigned)(x) & 0x1) << 26) +#define G_008008_TCC_CC_RESIDENT(x) (((x) >> 26) & 0x1) +#define C_008008_TCC_CC_RESIDENT 0xFBFFFFFF +#define S_008008_CPF_BUSY(x) (((unsigned)(x) & 0x1) << 28) +#define G_008008_CPF_BUSY(x) (((x) >> 28) & 0x1) +#define C_008008_CPF_BUSY 0xEFFFFFFF +#define S_008008_CPC_BUSY(x) (((unsigned)(x) & 0x1) << 29) +#define G_008008_CPC_BUSY(x) (((x) >> 29) & 0x1) +#define C_008008_CPC_BUSY 0xDFFFFFFF +#define S_008008_CPG_BUSY(x) (((unsigned)(x) & 0x1) << 30) +#define G_008008_CPG_BUSY(x) (((x) >> 30) & 0x1) +#define C_008008_CPG_BUSY 0xBFFFFFFF +#define R_008010_GRBM_STATUS 0x008010 +#define S_008010_ME0PIPE0_CMDFIFO_AVAIL(x) (((unsigned)(x) & 0x0F) << 0) +#define G_008010_ME0PIPE0_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x0F) +#define C_008010_ME0PIPE0_CMDFIFO_AVAIL 0xFFFFFFF0 +#define S_008010_SRBM_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 5) +#define G_008010_SRBM_RQ_PENDING(x) (((x) >> 5) & 0x1) +#define C_008010_SRBM_RQ_PENDING 0xFFFFFFDF +#define S_008010_ME0PIPE0_CF_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 7) +#define G_008010_ME0PIPE0_CF_RQ_PENDING(x) (((x) >> 7) & 0x1) +#define C_008010_ME0PIPE0_CF_RQ_PENDING 0xFFFFFF7F +#define S_008010_ME0PIPE0_PF_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 8) +#define G_008010_ME0PIPE0_PF_RQ_PENDING(x) (((x) >> 8) & 0x1) +#define C_008010_ME0PIPE0_PF_RQ_PENDING 0xFFFFFEFF +#define S_008010_GDS_DMA_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 9) +#define G_008010_GDS_DMA_RQ_PENDING(x) (((x) >> 9) & 0x1) +#define C_008010_GDS_DMA_RQ_PENDING 0xFFFFFDFF +#define S_008010_DB_CLEAN(x) (((unsigned)(x) & 0x1) << 12) +#define G_008010_DB_CLEAN(x) (((x) >> 12) & 0x1) +#define C_008010_DB_CLEAN 0xFFFFEFFF +#define S_008010_CB_CLEAN(x) (((unsigned)(x) & 0x1) << 13) +#define G_008010_CB_CLEAN(x) (((x) >> 13) & 0x1) +#define C_008010_CB_CLEAN 0xFFFFDFFF +#define S_008010_TA_BUSY(x) (((unsigned)(x) & 0x1) << 14) +#define G_008010_TA_BUSY(x) (((x) >> 14) & 0x1) +#define C_008010_TA_BUSY 0xFFFFBFFF +#define S_008010_GDS_BUSY(x) (((unsigned)(x) & 0x1) << 15) +#define G_008010_GDS_BUSY(x) (((x) >> 15) & 0x1) +#define C_008010_GDS_BUSY 0xFFFF7FFF +#define S_008010_WD_BUSY_NO_DMA(x) (((unsigned)(x) & 0x1) << 16) +#define G_008010_WD_BUSY_NO_DMA(x) (((x) >> 16) & 0x1) +#define C_008010_WD_BUSY_NO_DMA 0xFFFEFFFF +#define S_008010_VGT_BUSY(x) (((unsigned)(x) & 0x1) << 17) +#define G_008010_VGT_BUSY(x) (((x) >> 17) & 0x1) +#define C_008010_VGT_BUSY 0xFFFDFFFF +#define S_008010_IA_BUSY_NO_DMA(x) (((unsigned)(x) & 0x1) << 18) +#define G_008010_IA_BUSY_NO_DMA(x) (((x) >> 18) & 0x1) +#define C_008010_IA_BUSY_NO_DMA 0xFFFBFFFF +#define S_008010_IA_BUSY(x) (((unsigned)(x) & 0x1) << 19) +#define G_008010_IA_BUSY(x) (((x) >> 19) & 0x1) +#define C_008010_IA_BUSY 0xFFF7FFFF +#define S_008010_SX_BUSY(x) (((unsigned)(x) & 0x1) << 20) +#define G_008010_SX_BUSY(x) (((x) >> 20) & 0x1) +#define C_008010_SX_BUSY 0xFFEFFFFF +#define S_008010_WD_BUSY(x) (((unsigned)(x) & 0x1) << 21) +#define G_008010_WD_BUSY(x) (((x) >> 21) & 0x1) +#define C_008010_WD_BUSY 0xFFDFFFFF +#define S_008010_SPI_BUSY(x) (((unsigned)(x) & 0x1) << 22) +#define G_008010_SPI_BUSY(x) (((x) >> 22) & 0x1) +#define C_008010_SPI_BUSY 0xFFBFFFFF +#define S_008010_BCI_BUSY(x) (((unsigned)(x) & 0x1) << 23) +#define G_008010_BCI_BUSY(x) (((x) >> 23) & 0x1) +#define C_008010_BCI_BUSY 0xFF7FFFFF +#define S_008010_SC_BUSY(x) (((unsigned)(x) & 0x1) << 24) +#define G_008010_SC_BUSY(x) (((x) >> 24) & 0x1) +#define C_008010_SC_BUSY 0xFEFFFFFF +#define S_008010_PA_BUSY(x) (((unsigned)(x) & 0x1) << 25) +#define G_008010_PA_BUSY(x) (((x) >> 25) & 0x1) +#define C_008010_PA_BUSY 0xFDFFFFFF +#define S_008010_DB_BUSY(x) (((unsigned)(x) & 0x1) << 26) +#define G_008010_DB_BUSY(x) (((x) >> 26) & 0x1) +#define C_008010_DB_BUSY 0xFBFFFFFF +#define S_008010_CP_COHERENCY_BUSY(x) (((unsigned)(x) & 0x1) << 28) +#define G_008010_CP_COHERENCY_BUSY(x) (((x) >> 28) & 0x1) +#define C_008010_CP_COHERENCY_BUSY 0xEFFFFFFF +#define S_008010_CP_BUSY(x) (((unsigned)(x) & 0x1) << 29) +#define G_008010_CP_BUSY(x) (((x) >> 29) & 0x1) +#define C_008010_CP_BUSY 0xDFFFFFFF +#define S_008010_CB_BUSY(x) (((unsigned)(x) & 0x1) << 30) +#define G_008010_CB_BUSY(x) (((x) >> 30) & 0x1) +#define C_008010_CB_BUSY 0xBFFFFFFF +#define S_008010_GUI_ACTIVE(x) (((unsigned)(x) & 0x1) << 31) +#define G_008010_GUI_ACTIVE(x) (((x) >> 31) & 0x1) +#define C_008010_GUI_ACTIVE 0x7FFFFFFF +#define GRBM_GFX_INDEX 0x802C +#define INSTANCE_INDEX(x) ((x) << 0) +#define SH_INDEX(x) ((x) << 8) +#define SE_INDEX(x) ((x) << 16) +#define SH_BROADCAST_WRITES (1 << 29) +#define INSTANCE_BROADCAST_WRITES (1 << 30) +#define SE_BROADCAST_WRITES (1 << 31) +#define R_0084FC_CP_STRMOUT_CNTL 0x0084FC +#define S_0084FC_OFFSET_UPDATE_DONE(x) (((unsigned)(x) & 0x1) << 0) +#define R_0085F0_CP_COHER_CNTL 0x0085F0 +#define S_0085F0_DEST_BASE_0_ENA(x) (((unsigned)(x) & 0x1) << 0) +#define G_0085F0_DEST_BASE_0_ENA(x) (((x) >> 0) & 0x1) +#define C_0085F0_DEST_BASE_0_ENA 0xFFFFFFFE +#define S_0085F0_DEST_BASE_1_ENA(x) (((unsigned)(x) & 0x1) << 1) +#define G_0085F0_DEST_BASE_1_ENA(x) (((x) >> 1) & 0x1) +#define C_0085F0_DEST_BASE_1_ENA 0xFFFFFFFD +#define S_0085F0_CB0_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 6) +#define G_0085F0_CB0_DEST_BASE_ENA(x) (((x) >> 6) & 0x1) +#define C_0085F0_CB0_DEST_BASE_ENA 0xFFFFFFBF +#define S_0085F0_CB1_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 7) +#define G_0085F0_CB1_DEST_BASE_ENA(x) (((x) >> 7) & 0x1) +#define C_0085F0_CB1_DEST_BASE_ENA 0xFFFFFF7F +#define S_0085F0_CB2_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 8) +#define G_0085F0_CB2_DEST_BASE_ENA(x) (((x) >> 8) & 0x1) +#define C_0085F0_CB2_DEST_BASE_ENA 0xFFFFFEFF +#define S_0085F0_CB3_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 9) +#define G_0085F0_CB3_DEST_BASE_ENA(x) (((x) >> 9) & 0x1) +#define C_0085F0_CB3_DEST_BASE_ENA 0xFFFFFDFF +#define S_0085F0_CB4_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 10) +#define G_0085F0_CB4_DEST_BASE_ENA(x) (((x) >> 10) & 0x1) +#define C_0085F0_CB4_DEST_BASE_ENA 0xFFFFFBFF +#define S_0085F0_CB5_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 11) +#define G_0085F0_CB5_DEST_BASE_ENA(x) (((x) >> 11) & 0x1) +#define C_0085F0_CB5_DEST_BASE_ENA 0xFFFFF7FF +#define S_0085F0_CB6_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 12) +#define G_0085F0_CB6_DEST_BASE_ENA(x) (((x) >> 12) & 0x1) +#define C_0085F0_CB6_DEST_BASE_ENA 0xFFFFEFFF +#define S_0085F0_CB7_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 13) +#define G_0085F0_CB7_DEST_BASE_ENA(x) (((x) >> 13) & 0x1) +#define C_0085F0_CB7_DEST_BASE_ENA 0xFFFFDFFF +#define S_0085F0_DB_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 14) +#define G_0085F0_DB_DEST_BASE_ENA(x) (((x) >> 14) & 0x1) +#define C_0085F0_DB_DEST_BASE_ENA 0xFFFFBFFF +#define S_0085F0_DEST_BASE_2_ENA(x) (((unsigned)(x) & 0x1) << 19) +#define G_0085F0_DEST_BASE_2_ENA(x) (((x) >> 19) & 0x1) +#define C_0085F0_DEST_BASE_2_ENA 0xFFF7FFFF +#define S_0085F0_DEST_BASE_3_ENA(x) (((unsigned)(x) & 0x1) << 21) +#define G_0085F0_DEST_BASE_3_ENA(x) (((x) >> 21) & 0x1) +#define C_0085F0_DEST_BASE_3_ENA 0xFFDFFFFF +#define S_0085F0_TCL1_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 22) +#define G_0085F0_TCL1_ACTION_ENA(x) (((x) >> 22) & 0x1) +#define C_0085F0_TCL1_ACTION_ENA 0xFFBFFFFF +#define S_0085F0_TC_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 23) +#define G_0085F0_TC_ACTION_ENA(x) (((x) >> 23) & 0x1) +#define C_0085F0_TC_ACTION_ENA 0xFF7FFFFF +#define S_0085F0_CB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 25) +#define G_0085F0_CB_ACTION_ENA(x) (((x) >> 25) & 0x1) +#define C_0085F0_CB_ACTION_ENA 0xFDFFFFFF +#define S_0085F0_DB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 26) +#define G_0085F0_DB_ACTION_ENA(x) (((x) >> 26) & 0x1) +#define C_0085F0_DB_ACTION_ENA 0xFBFFFFFF +#define S_0085F0_SH_KCACHE_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 27) +#define G_0085F0_SH_KCACHE_ACTION_ENA(x) (((x) >> 27) & 0x1) +#define C_0085F0_SH_KCACHE_ACTION_ENA 0xF7FFFFFF +#define S_0085F0_SH_ICACHE_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 29) +#define G_0085F0_SH_ICACHE_ACTION_ENA(x) (((x) >> 29) & 0x1) +#define C_0085F0_SH_ICACHE_ACTION_ENA 0xDFFFFFFF +#define R_0085F4_CP_COHER_SIZE 0x0085F4 +#define R_0085F8_CP_COHER_BASE 0x0085F8 +#define R_008014_GRBM_STATUS_SE0 0x008014 +#define S_008014_DB_CLEAN(x) (((unsigned)(x) & 0x1) << 1) +#define G_008014_DB_CLEAN(x) (((x) >> 1) & 0x1) +#define C_008014_DB_CLEAN 0xFFFFFFFD +#define S_008014_CB_CLEAN(x) (((unsigned)(x) & 0x1) << 2) +#define G_008014_CB_CLEAN(x) (((x) >> 2) & 0x1) +#define C_008014_CB_CLEAN 0xFFFFFFFB +#define S_008014_BCI_BUSY(x) (((unsigned)(x) & 0x1) << 22) +#define G_008014_BCI_BUSY(x) (((x) >> 22) & 0x1) +#define C_008014_BCI_BUSY 0xFFBFFFFF +#define S_008014_VGT_BUSY(x) (((unsigned)(x) & 0x1) << 23) +#define G_008014_VGT_BUSY(x) (((x) >> 23) & 0x1) +#define C_008014_VGT_BUSY 0xFF7FFFFF +#define S_008014_PA_BUSY(x) (((unsigned)(x) & 0x1) << 24) +#define G_008014_PA_BUSY(x) (((x) >> 24) & 0x1) +#define C_008014_PA_BUSY 0xFEFFFFFF +#define S_008014_TA_BUSY(x) (((unsigned)(x) & 0x1) << 25) +#define G_008014_TA_BUSY(x) (((x) >> 25) & 0x1) +#define C_008014_TA_BUSY 0xFDFFFFFF +#define S_008014_SX_BUSY(x) (((unsigned)(x) & 0x1) << 26) +#define G_008014_SX_BUSY(x) (((x) >> 26) & 0x1) +#define C_008014_SX_BUSY 0xFBFFFFFF +#define S_008014_SPI_BUSY(x) (((unsigned)(x) & 0x1) << 27) +#define G_008014_SPI_BUSY(x) (((x) >> 27) & 0x1) +#define C_008014_SPI_BUSY 0xF7FFFFFF +#define S_008014_SC_BUSY(x) (((unsigned)(x) & 0x1) << 29) +#define G_008014_SC_BUSY(x) (((x) >> 29) & 0x1) +#define C_008014_SC_BUSY 0xDFFFFFFF +#define S_008014_DB_BUSY(x) (((unsigned)(x) & 0x1) << 30) +#define G_008014_DB_BUSY(x) (((x) >> 30) & 0x1) +#define C_008014_DB_BUSY 0xBFFFFFFF +#define S_008014_CB_BUSY(x) (((unsigned)(x) & 0x1) << 31) +#define G_008014_CB_BUSY(x) (((x) >> 31) & 0x1) +#define C_008014_CB_BUSY 0x7FFFFFFF +#define R_008018_GRBM_STATUS_SE1 0x008018 +#define S_008018_DB_CLEAN(x) (((unsigned)(x) & 0x1) << 1) +#define G_008018_DB_CLEAN(x) (((x) >> 1) & 0x1) +#define C_008018_DB_CLEAN 0xFFFFFFFD +#define S_008018_CB_CLEAN(x) (((unsigned)(x) & 0x1) << 2) +#define G_008018_CB_CLEAN(x) (((x) >> 2) & 0x1) +#define C_008018_CB_CLEAN 0xFFFFFFFB +#define S_008018_BCI_BUSY(x) (((unsigned)(x) & 0x1) << 22) +#define G_008018_BCI_BUSY(x) (((x) >> 22) & 0x1) +#define C_008018_BCI_BUSY 0xFFBFFFFF +#define S_008018_VGT_BUSY(x) (((unsigned)(x) & 0x1) << 23) +#define G_008018_VGT_BUSY(x) (((x) >> 23) & 0x1) +#define C_008018_VGT_BUSY 0xFF7FFFFF +#define S_008018_PA_BUSY(x) (((unsigned)(x) & 0x1) << 24) +#define G_008018_PA_BUSY(x) (((x) >> 24) & 0x1) +#define C_008018_PA_BUSY 0xFEFFFFFF +#define S_008018_TA_BUSY(x) (((unsigned)(x) & 0x1) << 25) +#define G_008018_TA_BUSY(x) (((x) >> 25) & 0x1) +#define C_008018_TA_BUSY 0xFDFFFFFF +#define S_008018_SX_BUSY(x) (((unsigned)(x) & 0x1) << 26) +#define G_008018_SX_BUSY(x) (((x) >> 26) & 0x1) +#define C_008018_SX_BUSY 0xFBFFFFFF +#define S_008018_SPI_BUSY(x) (((unsigned)(x) & 0x1) << 27) +#define G_008018_SPI_BUSY(x) (((x) >> 27) & 0x1) +#define C_008018_SPI_BUSY 0xF7FFFFFF +#define S_008018_SC_BUSY(x) (((unsigned)(x) & 0x1) << 29) +#define G_008018_SC_BUSY(x) (((x) >> 29) & 0x1) +#define C_008018_SC_BUSY 0xDFFFFFFF +#define S_008018_DB_BUSY(x) (((unsigned)(x) & 0x1) << 30) +#define G_008018_DB_BUSY(x) (((x) >> 30) & 0x1) +#define C_008018_DB_BUSY 0xBFFFFFFF +#define S_008018_CB_BUSY(x) (((unsigned)(x) & 0x1) << 31) +#define G_008018_CB_BUSY(x) (((x) >> 31) & 0x1) +#define C_008018_CB_BUSY 0x7FFFFFFF +#define R_008038_GRBM_STATUS_SE2 0x008038 +#define S_008038_DB_CLEAN(x) (((unsigned)(x) & 0x1) << 1) +#define G_008038_DB_CLEAN(x) (((x) >> 1) & 0x1) +#define C_008038_DB_CLEAN 0xFFFFFFFD +#define S_008038_CB_CLEAN(x) (((unsigned)(x) & 0x1) << 2) +#define G_008038_CB_CLEAN(x) (((x) >> 2) & 0x1) +#define C_008038_CB_CLEAN 0xFFFFFFFB +#define S_008038_BCI_BUSY(x) (((unsigned)(x) & 0x1) << 22) +#define G_008038_BCI_BUSY(x) (((x) >> 22) & 0x1) +#define C_008038_BCI_BUSY 0xFFBFFFFF +#define S_008038_VGT_BUSY(x) (((unsigned)(x) & 0x1) << 23) +#define G_008038_VGT_BUSY(x) (((x) >> 23) & 0x1) +#define C_008038_VGT_BUSY 0xFF7FFFFF +#define S_008038_PA_BUSY(x) (((unsigned)(x) & 0x1) << 24) +#define G_008038_PA_BUSY(x) (((x) >> 24) & 0x1) +#define C_008038_PA_BUSY 0xFEFFFFFF +#define S_008038_TA_BUSY(x) (((unsigned)(x) & 0x1) << 25) +#define G_008038_TA_BUSY(x) (((x) >> 25) & 0x1) +#define C_008038_TA_BUSY 0xFDFFFFFF +#define S_008038_SX_BUSY(x) (((unsigned)(x) & 0x1) << 26) +#define G_008038_SX_BUSY(x) (((x) >> 26) & 0x1) +#define C_008038_SX_BUSY 0xFBFFFFFF +#define S_008038_SPI_BUSY(x) (((unsigned)(x) & 0x1) << 27) +#define G_008038_SPI_BUSY(x) (((x) >> 27) & 0x1) +#define C_008038_SPI_BUSY 0xF7FFFFFF +#define S_008038_SC_BUSY(x) (((unsigned)(x) & 0x1) << 29) +#define G_008038_SC_BUSY(x) (((x) >> 29) & 0x1) +#define C_008038_SC_BUSY 0xDFFFFFFF +#define S_008038_DB_BUSY(x) (((unsigned)(x) & 0x1) << 30) +#define G_008038_DB_BUSY(x) (((x) >> 30) & 0x1) +#define C_008038_DB_BUSY 0xBFFFFFFF +#define S_008038_CB_BUSY(x) (((unsigned)(x) & 0x1) << 31) +#define G_008038_CB_BUSY(x) (((x) >> 31) & 0x1) +#define C_008038_CB_BUSY 0x7FFFFFFF +#define R_00803C_GRBM_STATUS_SE3 0x00803C +#define S_00803C_DB_CLEAN(x) (((unsigned)(x) & 0x1) << 1) +#define G_00803C_DB_CLEAN(x) (((x) >> 1) & 0x1) +#define C_00803C_DB_CLEAN 0xFFFFFFFD +#define S_00803C_CB_CLEAN(x) (((unsigned)(x) & 0x1) << 2) +#define G_00803C_CB_CLEAN(x) (((x) >> 2) & 0x1) +#define C_00803C_CB_CLEAN 0xFFFFFFFB +#define S_00803C_BCI_BUSY(x) (((unsigned)(x) & 0x1) << 22) +#define G_00803C_BCI_BUSY(x) (((x) >> 22) & 0x1) +#define C_00803C_BCI_BUSY 0xFFBFFFFF +#define S_00803C_VGT_BUSY(x) (((unsigned)(x) & 0x1) << 23) +#define G_00803C_VGT_BUSY(x) (((x) >> 23) & 0x1) +#define C_00803C_VGT_BUSY 0xFF7FFFFF +#define S_00803C_PA_BUSY(x) (((unsigned)(x) & 0x1) << 24) +#define G_00803C_PA_BUSY(x) (((x) >> 24) & 0x1) +#define C_00803C_PA_BUSY 0xFEFFFFFF +#define S_00803C_TA_BUSY(x) (((unsigned)(x) & 0x1) << 25) +#define G_00803C_TA_BUSY(x) (((x) >> 25) & 0x1) +#define C_00803C_TA_BUSY 0xFDFFFFFF +#define S_00803C_SX_BUSY(x) (((unsigned)(x) & 0x1) << 26) +#define G_00803C_SX_BUSY(x) (((x) >> 26) & 0x1) +#define C_00803C_SX_BUSY 0xFBFFFFFF +#define S_00803C_SPI_BUSY(x) (((unsigned)(x) & 0x1) << 27) +#define G_00803C_SPI_BUSY(x) (((x) >> 27) & 0x1) +#define C_00803C_SPI_BUSY 0xF7FFFFFF +#define S_00803C_SC_BUSY(x) (((unsigned)(x) & 0x1) << 29) +#define G_00803C_SC_BUSY(x) (((x) >> 29) & 0x1) +#define C_00803C_SC_BUSY 0xDFFFFFFF +#define S_00803C_DB_BUSY(x) (((unsigned)(x) & 0x1) << 30) +#define G_00803C_DB_BUSY(x) (((x) >> 30) & 0x1) +#define C_00803C_DB_BUSY 0xBFFFFFFF +#define S_00803C_CB_BUSY(x) (((unsigned)(x) & 0x1) << 31) +#define G_00803C_CB_BUSY(x) (((x) >> 31) & 0x1) +#define C_00803C_CB_BUSY 0x7FFFFFFF +/* CIK */ +#define R_0300FC_CP_STRMOUT_CNTL 0x0300FC +#define S_0300FC_OFFSET_UPDATE_DONE(x) (((unsigned)(x) & 0x1) << 0) +#define G_0300FC_OFFSET_UPDATE_DONE(x) (((x) >> 0) & 0x1) +#define C_0300FC_OFFSET_UPDATE_DONE 0xFFFFFFFE +#define R_0301E4_CP_COHER_BASE_HI 0x0301E4 +#define S_0301E4_COHER_BASE_HI_256B(x) (((unsigned)(x) & 0xFF) << 0) +#define G_0301E4_COHER_BASE_HI_256B(x) (((x) >> 0) & 0xFF) +#define C_0301E4_COHER_BASE_HI_256B 0xFFFFFF00 +#define R_0301EC_CP_COHER_START_DELAY 0x0301EC +#define S_0301EC_START_DELAY_COUNT(x) (((unsigned)(x) & 0x3F) << 0) +#define G_0301EC_START_DELAY_COUNT(x) (((x) >> 0) & 0x3F) +#define C_0301EC_START_DELAY_COUNT 0xFFFFFFC0 +#define R_0301F0_CP_COHER_CNTL 0x0301F0 +#define S_0301F0_DEST_BASE_0_ENA(x) (((unsigned)(x) & 0x1) << 0) +#define G_0301F0_DEST_BASE_0_ENA(x) (((x) >> 0) & 0x1) +#define C_0301F0_DEST_BASE_0_ENA 0xFFFFFFFE +#define S_0301F0_DEST_BASE_1_ENA(x) (((unsigned)(x) & 0x1) << 1) +#define G_0301F0_DEST_BASE_1_ENA(x) (((x) >> 1) & 0x1) +#define C_0301F0_DEST_BASE_1_ENA 0xFFFFFFFD +/* VI */ +#define S_0301F0_TC_SD_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 2) +#define G_0301F0_TC_SD_ACTION_ENA(x) (((x) >> 2) & 0x1) +#define C_0301F0_TC_SD_ACTION_ENA 0xFFFFFFFB +#define S_0301F0_TC_NC_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 3) +#define G_0301F0_TC_NC_ACTION_ENA(x) (((x) >> 3) & 0x1) +#define C_0301F0_TC_NC_ACTION_ENA 0xFFFFFFF7 +/* */ +#define S_0301F0_CB0_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 6) +#define G_0301F0_CB0_DEST_BASE_ENA(x) (((x) >> 6) & 0x1) +#define C_0301F0_CB0_DEST_BASE_ENA 0xFFFFFFBF +#define S_0301F0_CB1_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 7) +#define G_0301F0_CB1_DEST_BASE_ENA(x) (((x) >> 7) & 0x1) +#define C_0301F0_CB1_DEST_BASE_ENA 0xFFFFFF7F +#define S_0301F0_CB2_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 8) +#define G_0301F0_CB2_DEST_BASE_ENA(x) (((x) >> 8) & 0x1) +#define C_0301F0_CB2_DEST_BASE_ENA 0xFFFFFEFF +#define S_0301F0_CB3_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 9) +#define G_0301F0_CB3_DEST_BASE_ENA(x) (((x) >> 9) & 0x1) +#define C_0301F0_CB3_DEST_BASE_ENA 0xFFFFFDFF +#define S_0301F0_CB4_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 10) +#define G_0301F0_CB4_DEST_BASE_ENA(x) (((x) >> 10) & 0x1) +#define C_0301F0_CB4_DEST_BASE_ENA 0xFFFFFBFF +#define S_0301F0_CB5_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 11) +#define G_0301F0_CB5_DEST_BASE_ENA(x) (((x) >> 11) & 0x1) +#define C_0301F0_CB5_DEST_BASE_ENA 0xFFFFF7FF +#define S_0301F0_CB6_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 12) +#define G_0301F0_CB6_DEST_BASE_ENA(x) (((x) >> 12) & 0x1) +#define C_0301F0_CB6_DEST_BASE_ENA 0xFFFFEFFF +#define S_0301F0_CB7_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 13) +#define G_0301F0_CB7_DEST_BASE_ENA(x) (((x) >> 13) & 0x1) +#define C_0301F0_CB7_DEST_BASE_ENA 0xFFFFDFFF +#define S_0301F0_DB_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 14) +#define G_0301F0_DB_DEST_BASE_ENA(x) (((x) >> 14) & 0x1) +#define C_0301F0_DB_DEST_BASE_ENA 0xFFFFBFFF +#define S_0301F0_TCL1_VOL_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 15) +#define G_0301F0_TCL1_VOL_ACTION_ENA(x) (((x) >> 15) & 0x1) +#define C_0301F0_TCL1_VOL_ACTION_ENA 0xFFFF7FFF +#define S_0301F0_TC_VOL_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 16) /* not on VI */ +#define G_0301F0_TC_VOL_ACTION_ENA(x) (((x) >> 16) & 0x1) +#define C_0301F0_TC_VOL_ACTION_ENA 0xFFFEFFFF +#define S_0301F0_TC_WB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 18) +#define G_0301F0_TC_WB_ACTION_ENA(x) (((x) >> 18) & 0x1) +#define C_0301F0_TC_WB_ACTION_ENA 0xFFFBFFFF +#define S_0301F0_DEST_BASE_2_ENA(x) (((unsigned)(x) & 0x1) << 19) +#define G_0301F0_DEST_BASE_2_ENA(x) (((x) >> 19) & 0x1) +#define C_0301F0_DEST_BASE_2_ENA 0xFFF7FFFF +#define S_0301F0_DEST_BASE_3_ENA(x) (((unsigned)(x) & 0x1) << 21) +#define G_0301F0_DEST_BASE_3_ENA(x) (((x) >> 21) & 0x1) +#define C_0301F0_DEST_BASE_3_ENA 0xFFDFFFFF +#define S_0301F0_TCL1_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 22) +#define G_0301F0_TCL1_ACTION_ENA(x) (((x) >> 22) & 0x1) +#define C_0301F0_TCL1_ACTION_ENA 0xFFBFFFFF +#define S_0301F0_TC_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 23) +#define G_0301F0_TC_ACTION_ENA(x) (((x) >> 23) & 0x1) +#define C_0301F0_TC_ACTION_ENA 0xFF7FFFFF +#define S_0301F0_CB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 25) +#define G_0301F0_CB_ACTION_ENA(x) (((x) >> 25) & 0x1) +#define C_0301F0_CB_ACTION_ENA 0xFDFFFFFF +#define S_0301F0_DB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 26) +#define G_0301F0_DB_ACTION_ENA(x) (((x) >> 26) & 0x1) +#define C_0301F0_DB_ACTION_ENA 0xFBFFFFFF +#define S_0301F0_SH_KCACHE_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 27) +#define G_0301F0_SH_KCACHE_ACTION_ENA(x) (((x) >> 27) & 0x1) +#define C_0301F0_SH_KCACHE_ACTION_ENA 0xF7FFFFFF +#define S_0301F0_SH_KCACHE_VOL_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 28) +#define G_0301F0_SH_KCACHE_VOL_ACTION_ENA(x) (((x) >> 28) & 0x1) +#define C_0301F0_SH_KCACHE_VOL_ACTION_ENA 0xEFFFFFFF +#define S_0301F0_SH_ICACHE_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 29) +#define G_0301F0_SH_ICACHE_ACTION_ENA(x) (((x) >> 29) & 0x1) +#define C_0301F0_SH_ICACHE_ACTION_ENA 0xDFFFFFFF +/* VI */ +#define S_0301F0_SH_KCACHE_WB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 30) +#define G_0301F0_SH_KCACHE_WB_ACTION_ENA(x) (((x) >> 30) & 0x1) +#define C_0301F0_SH_KCACHE_WB_ACTION_ENA 0xBFFFFFFF +#define S_0301F0_SH_SD_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 31) +#define G_0301F0_SH_SD_ACTION_ENA(x) (((x) >> 31) & 0x1) +#define C_0301F0_SH_SD_ACTION_ENA 0x7FFFFFFF +/* */ +#define R_0301F4_CP_COHER_SIZE 0x0301F4 +#define R_0301F8_CP_COHER_BASE 0x0301F8 +#define R_0301FC_CP_COHER_STATUS 0x0301FC +#define S_0301FC_MATCHING_GFX_CNTX(x) (((unsigned)(x) & 0xFF) << 0) +#define G_0301FC_MATCHING_GFX_CNTX(x) (((x) >> 0) & 0xFF) +#define C_0301FC_MATCHING_GFX_CNTX 0xFFFFFF00 +#define S_0301FC_MEID(x) (((unsigned)(x) & 0x03) << 24) +#define G_0301FC_MEID(x) (((x) >> 24) & 0x03) +#define C_0301FC_MEID 0xFCFFFFFF +#define S_0301FC_PHASE1_STATUS(x) (((unsigned)(x) & 0x1) << 30) +#define G_0301FC_PHASE1_STATUS(x) (((x) >> 30) & 0x1) +#define C_0301FC_PHASE1_STATUS 0xBFFFFFFF +#define S_0301FC_STATUS(x) (((unsigned)(x) & 0x1) << 31) +#define G_0301FC_STATUS(x) (((x) >> 31) & 0x1) +#define C_0301FC_STATUS 0x7FFFFFFF +#define R_008210_CP_CPC_STATUS 0x008210 +#define S_008210_MEC1_BUSY(x) (((unsigned)(x) & 0x1) << 0) +#define G_008210_MEC1_BUSY(x) (((x) >> 0) & 0x1) +#define C_008210_MEC1_BUSY 0xFFFFFFFE +#define S_008210_MEC2_BUSY(x) (((unsigned)(x) & 0x1) << 1) +#define G_008210_MEC2_BUSY(x) (((x) >> 1) & 0x1) +#define C_008210_MEC2_BUSY 0xFFFFFFFD +#define S_008210_DC0_BUSY(x) (((unsigned)(x) & 0x1) << 2) +#define G_008210_DC0_BUSY(x) (((x) >> 2) & 0x1) +#define C_008210_DC0_BUSY 0xFFFFFFFB +#define S_008210_DC1_BUSY(x) (((unsigned)(x) & 0x1) << 3) +#define G_008210_DC1_BUSY(x) (((x) >> 3) & 0x1) +#define C_008210_DC1_BUSY 0xFFFFFFF7 +#define S_008210_RCIU1_BUSY(x) (((unsigned)(x) & 0x1) << 4) +#define G_008210_RCIU1_BUSY(x) (((x) >> 4) & 0x1) +#define C_008210_RCIU1_BUSY 0xFFFFFFEF +#define S_008210_RCIU2_BUSY(x) (((unsigned)(x) & 0x1) << 5) +#define G_008210_RCIU2_BUSY(x) (((x) >> 5) & 0x1) +#define C_008210_RCIU2_BUSY 0xFFFFFFDF +#define S_008210_ROQ1_BUSY(x) (((unsigned)(x) & 0x1) << 6) +#define G_008210_ROQ1_BUSY(x) (((x) >> 6) & 0x1) +#define C_008210_ROQ1_BUSY 0xFFFFFFBF +#define S_008210_ROQ2_BUSY(x) (((unsigned)(x) & 0x1) << 7) +#define G_008210_ROQ2_BUSY(x) (((x) >> 7) & 0x1) +#define C_008210_ROQ2_BUSY 0xFFFFFF7F +#define S_008210_TCIU_BUSY(x) (((unsigned)(x) & 0x1) << 10) +#define G_008210_TCIU_BUSY(x) (((x) >> 10) & 0x1) +#define C_008210_TCIU_BUSY 0xFFFFFBFF +#define S_008210_SCRATCH_RAM_BUSY(x) (((unsigned)(x) & 0x1) << 11) +#define G_008210_SCRATCH_RAM_BUSY(x) (((x) >> 11) & 0x1) +#define C_008210_SCRATCH_RAM_BUSY 0xFFFFF7FF +#define S_008210_QU_BUSY(x) (((unsigned)(x) & 0x1) << 12) +#define G_008210_QU_BUSY(x) (((x) >> 12) & 0x1) +#define C_008210_QU_BUSY 0xFFFFEFFF +#define S_008210_ATCL2IU_BUSY(x) (((unsigned)(x) & 0x1) << 13) +#define G_008210_ATCL2IU_BUSY(x) (((x) >> 13) & 0x1) +#define C_008210_ATCL2IU_BUSY 0xFFFFDFFF +#define S_008210_CPG_CPC_BUSY(x) (((unsigned)(x) & 0x1) << 29) +#define G_008210_CPG_CPC_BUSY(x) (((x) >> 29) & 0x1) +#define C_008210_CPG_CPC_BUSY 0xDFFFFFFF +#define S_008210_CPF_CPC_BUSY(x) (((unsigned)(x) & 0x1) << 30) +#define G_008210_CPF_CPC_BUSY(x) (((x) >> 30) & 0x1) +#define C_008210_CPF_CPC_BUSY 0xBFFFFFFF +#define S_008210_CPC_BUSY(x) (((unsigned)(x) & 0x1) << 31) +#define G_008210_CPC_BUSY(x) (((x) >> 31) & 0x1) +#define C_008210_CPC_BUSY 0x7FFFFFFF +#define R_008214_CP_CPC_BUSY_STAT 0x008214 +#define S_008214_MEC1_LOAD_BUSY(x) (((unsigned)(x) & 0x1) << 0) +#define G_008214_MEC1_LOAD_BUSY(x) (((x) >> 0) & 0x1) +#define C_008214_MEC1_LOAD_BUSY 0xFFFFFFFE +#define S_008214_MEC1_SEMAPOHRE_BUSY(x) (((unsigned)(x) & 0x1) << 1) +#define G_008214_MEC1_SEMAPOHRE_BUSY(x) (((x) >> 1) & 0x1) +#define C_008214_MEC1_SEMAPOHRE_BUSY 0xFFFFFFFD +#define S_008214_MEC1_MUTEX_BUSY(x) (((unsigned)(x) & 0x1) << 2) +#define G_008214_MEC1_MUTEX_BUSY(x) (((x) >> 2) & 0x1) +#define C_008214_MEC1_MUTEX_BUSY 0xFFFFFFFB +#define S_008214_MEC1_MESSAGE_BUSY(x) (((unsigned)(x) & 0x1) << 3) +#define G_008214_MEC1_MESSAGE_BUSY(x) (((x) >> 3) & 0x1) +#define C_008214_MEC1_MESSAGE_BUSY 0xFFFFFFF7 +#define S_008214_MEC1_EOP_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 4) +#define G_008214_MEC1_EOP_QUEUE_BUSY(x) (((x) >> 4) & 0x1) +#define C_008214_MEC1_EOP_QUEUE_BUSY 0xFFFFFFEF +#define S_008214_MEC1_IQ_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 5) +#define G_008214_MEC1_IQ_QUEUE_BUSY(x) (((x) >> 5) & 0x1) +#define C_008214_MEC1_IQ_QUEUE_BUSY 0xFFFFFFDF +#define S_008214_MEC1_IB_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 6) +#define G_008214_MEC1_IB_QUEUE_BUSY(x) (((x) >> 6) & 0x1) +#define C_008214_MEC1_IB_QUEUE_BUSY 0xFFFFFFBF +#define S_008214_MEC1_TC_BUSY(x) (((unsigned)(x) & 0x1) << 7) +#define G_008214_MEC1_TC_BUSY(x) (((x) >> 7) & 0x1) +#define C_008214_MEC1_TC_BUSY 0xFFFFFF7F +#define S_008214_MEC1_DMA_BUSY(x) (((unsigned)(x) & 0x1) << 8) +#define G_008214_MEC1_DMA_BUSY(x) (((x) >> 8) & 0x1) +#define C_008214_MEC1_DMA_BUSY 0xFFFFFEFF +#define S_008214_MEC1_PARTIAL_FLUSH_BUSY(x) (((unsigned)(x) & 0x1) << 9) +#define G_008214_MEC1_PARTIAL_FLUSH_BUSY(x) (((x) >> 9) & 0x1) +#define C_008214_MEC1_PARTIAL_FLUSH_BUSY 0xFFFFFDFF +#define S_008214_MEC1_PIPE0_BUSY(x) (((unsigned)(x) & 0x1) << 10) +#define G_008214_MEC1_PIPE0_BUSY(x) (((x) >> 10) & 0x1) +#define C_008214_MEC1_PIPE0_BUSY 0xFFFFFBFF +#define S_008214_MEC1_PIPE1_BUSY(x) (((unsigned)(x) & 0x1) << 11) +#define G_008214_MEC1_PIPE1_BUSY(x) (((x) >> 11) & 0x1) +#define C_008214_MEC1_PIPE1_BUSY 0xFFFFF7FF +#define S_008214_MEC1_PIPE2_BUSY(x) (((unsigned)(x) & 0x1) << 12) +#define G_008214_MEC1_PIPE2_BUSY(x) (((x) >> 12) & 0x1) +#define C_008214_MEC1_PIPE2_BUSY 0xFFFFEFFF +#define S_008214_MEC1_PIPE3_BUSY(x) (((unsigned)(x) & 0x1) << 13) +#define G_008214_MEC1_PIPE3_BUSY(x) (((x) >> 13) & 0x1) +#define C_008214_MEC1_PIPE3_BUSY 0xFFFFDFFF +#define S_008214_MEC2_LOAD_BUSY(x) (((unsigned)(x) & 0x1) << 16) +#define G_008214_MEC2_LOAD_BUSY(x) (((x) >> 16) & 0x1) +#define C_008214_MEC2_LOAD_BUSY 0xFFFEFFFF +#define S_008214_MEC2_SEMAPOHRE_BUSY(x) (((unsigned)(x) & 0x1) << 17) +#define G_008214_MEC2_SEMAPOHRE_BUSY(x) (((x) >> 17) & 0x1) +#define C_008214_MEC2_SEMAPOHRE_BUSY 0xFFFDFFFF +#define S_008214_MEC2_MUTEX_BUSY(x) (((unsigned)(x) & 0x1) << 18) +#define G_008214_MEC2_MUTEX_BUSY(x) (((x) >> 18) & 0x1) +#define C_008214_MEC2_MUTEX_BUSY 0xFFFBFFFF +#define S_008214_MEC2_MESSAGE_BUSY(x) (((unsigned)(x) & 0x1) << 19) +#define G_008214_MEC2_MESSAGE_BUSY(x) (((x) >> 19) & 0x1) +#define C_008214_MEC2_MESSAGE_BUSY 0xFFF7FFFF +#define S_008214_MEC2_EOP_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 20) +#define G_008214_MEC2_EOP_QUEUE_BUSY(x) (((x) >> 20) & 0x1) +#define C_008214_MEC2_EOP_QUEUE_BUSY 0xFFEFFFFF +#define S_008214_MEC2_IQ_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 21) +#define G_008214_MEC2_IQ_QUEUE_BUSY(x) (((x) >> 21) & 0x1) +#define C_008214_MEC2_IQ_QUEUE_BUSY 0xFFDFFFFF +#define S_008214_MEC2_IB_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 22) +#define G_008214_MEC2_IB_QUEUE_BUSY(x) (((x) >> 22) & 0x1) +#define C_008214_MEC2_IB_QUEUE_BUSY 0xFFBFFFFF +#define S_008214_MEC2_TC_BUSY(x) (((unsigned)(x) & 0x1) << 23) +#define G_008214_MEC2_TC_BUSY(x) (((x) >> 23) & 0x1) +#define C_008214_MEC2_TC_BUSY 0xFF7FFFFF +#define S_008214_MEC2_DMA_BUSY(x) (((unsigned)(x) & 0x1) << 24) +#define G_008214_MEC2_DMA_BUSY(x) (((x) >> 24) & 0x1) +#define C_008214_MEC2_DMA_BUSY 0xFEFFFFFF +#define S_008214_MEC2_PARTIAL_FLUSH_BUSY(x) (((unsigned)(x) & 0x1) << 25) +#define G_008214_MEC2_PARTIAL_FLUSH_BUSY(x) (((x) >> 25) & 0x1) +#define C_008214_MEC2_PARTIAL_FLUSH_BUSY 0xFDFFFFFF +#define S_008214_MEC2_PIPE0_BUSY(x) (((unsigned)(x) & 0x1) << 26) +#define G_008214_MEC2_PIPE0_BUSY(x) (((x) >> 26) & 0x1) +#define C_008214_MEC2_PIPE0_BUSY 0xFBFFFFFF +#define S_008214_MEC2_PIPE1_BUSY(x) (((unsigned)(x) & 0x1) << 27) +#define G_008214_MEC2_PIPE1_BUSY(x) (((x) >> 27) & 0x1) +#define C_008214_MEC2_PIPE1_BUSY 0xF7FFFFFF +#define S_008214_MEC2_PIPE2_BUSY(x) (((unsigned)(x) & 0x1) << 28) +#define G_008214_MEC2_PIPE2_BUSY(x) (((x) >> 28) & 0x1) +#define C_008214_MEC2_PIPE2_BUSY 0xEFFFFFFF +#define S_008214_MEC2_PIPE3_BUSY(x) (((unsigned)(x) & 0x1) << 29) +#define G_008214_MEC2_PIPE3_BUSY(x) (((x) >> 29) & 0x1) +#define C_008214_MEC2_PIPE3_BUSY 0xDFFFFFFF +#define R_008218_CP_CPC_STALLED_STAT1 0x008218 +#define S_008218_RCIU_TX_FREE_STALL(x) (((unsigned)(x) & 0x1) << 3) +#define G_008218_RCIU_TX_FREE_STALL(x) (((x) >> 3) & 0x1) +#define C_008218_RCIU_TX_FREE_STALL 0xFFFFFFF7 +#define S_008218_RCIU_PRIV_VIOLATION(x) (((unsigned)(x) & 0x1) << 4) +#define G_008218_RCIU_PRIV_VIOLATION(x) (((x) >> 4) & 0x1) +#define C_008218_RCIU_PRIV_VIOLATION 0xFFFFFFEF +#define S_008218_TCIU_TX_FREE_STALL(x) (((unsigned)(x) & 0x1) << 6) +#define G_008218_TCIU_TX_FREE_STALL(x) (((x) >> 6) & 0x1) +#define C_008218_TCIU_TX_FREE_STALL 0xFFFFFFBF +#define S_008218_MEC1_DECODING_PACKET(x) (((unsigned)(x) & 0x1) << 8) +#define G_008218_MEC1_DECODING_PACKET(x) (((x) >> 8) & 0x1) +#define C_008218_MEC1_DECODING_PACKET 0xFFFFFEFF +#define S_008218_MEC1_WAIT_ON_RCIU(x) (((unsigned)(x) & 0x1) << 9) +#define G_008218_MEC1_WAIT_ON_RCIU(x) (((x) >> 9) & 0x1) +#define C_008218_MEC1_WAIT_ON_RCIU 0xFFFFFDFF +#define S_008218_MEC1_WAIT_ON_RCIU_READ(x) (((unsigned)(x) & 0x1) << 10) +#define G_008218_MEC1_WAIT_ON_RCIU_READ(x) (((x) >> 10) & 0x1) +#define C_008218_MEC1_WAIT_ON_RCIU_READ 0xFFFFFBFF +#define S_008218_MEC1_WAIT_ON_ROQ_DATA(x) (((unsigned)(x) & 0x1) << 13) +#define G_008218_MEC1_WAIT_ON_ROQ_DATA(x) (((x) >> 13) & 0x1) +#define C_008218_MEC1_WAIT_ON_ROQ_DATA 0xFFFFDFFF +#define S_008218_MEC2_DECODING_PACKET(x) (((unsigned)(x) & 0x1) << 16) +#define G_008218_MEC2_DECODING_PACKET(x) (((x) >> 16) & 0x1) +#define C_008218_MEC2_DECODING_PACKET 0xFFFEFFFF +#define S_008218_MEC2_WAIT_ON_RCIU(x) (((unsigned)(x) & 0x1) << 17) +#define G_008218_MEC2_WAIT_ON_RCIU(x) (((x) >> 17) & 0x1) +#define C_008218_MEC2_WAIT_ON_RCIU 0xFFFDFFFF +#define S_008218_MEC2_WAIT_ON_RCIU_READ(x) (((unsigned)(x) & 0x1) << 18) +#define G_008218_MEC2_WAIT_ON_RCIU_READ(x) (((x) >> 18) & 0x1) +#define C_008218_MEC2_WAIT_ON_RCIU_READ 0xFFFBFFFF +#define S_008218_MEC2_WAIT_ON_ROQ_DATA(x) (((unsigned)(x) & 0x1) << 21) +#define G_008218_MEC2_WAIT_ON_ROQ_DATA(x) (((x) >> 21) & 0x1) +#define C_008218_MEC2_WAIT_ON_ROQ_DATA 0xFFDFFFFF +#define S_008218_ATCL2IU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 22) +#define G_008218_ATCL2IU_WAITING_ON_FREE(x) (((x) >> 22) & 0x1) +#define C_008218_ATCL2IU_WAITING_ON_FREE 0xFFBFFFFF +#define S_008218_ATCL2IU_WAITING_ON_TAGS(x) (((unsigned)(x) & 0x1) << 23) +#define G_008218_ATCL2IU_WAITING_ON_TAGS(x) (((x) >> 23) & 0x1) +#define C_008218_ATCL2IU_WAITING_ON_TAGS 0xFF7FFFFF +#define S_008218_ATCL1_WAITING_ON_TRANS(x) (((unsigned)(x) & 0x1) << 24) +#define G_008218_ATCL1_WAITING_ON_TRANS(x) (((x) >> 24) & 0x1) +#define C_008218_ATCL1_WAITING_ON_TRANS 0xFEFFFFFF +#define R_00821C_CP_CPF_STATUS 0x00821C +#define S_00821C_POST_WPTR_GFX_BUSY(x) (((unsigned)(x) & 0x1) << 0) +#define G_00821C_POST_WPTR_GFX_BUSY(x) (((x) >> 0) & 0x1) +#define C_00821C_POST_WPTR_GFX_BUSY 0xFFFFFFFE +#define S_00821C_CSF_BUSY(x) (((unsigned)(x) & 0x1) << 1) +#define G_00821C_CSF_BUSY(x) (((x) >> 1) & 0x1) +#define C_00821C_CSF_BUSY 0xFFFFFFFD +#define S_00821C_ROQ_ALIGN_BUSY(x) (((unsigned)(x) & 0x1) << 4) +#define G_00821C_ROQ_ALIGN_BUSY(x) (((x) >> 4) & 0x1) +#define C_00821C_ROQ_ALIGN_BUSY 0xFFFFFFEF +#define S_00821C_ROQ_RING_BUSY(x) (((unsigned)(x) & 0x1) << 5) +#define G_00821C_ROQ_RING_BUSY(x) (((x) >> 5) & 0x1) +#define C_00821C_ROQ_RING_BUSY 0xFFFFFFDF +#define S_00821C_ROQ_INDIRECT1_BUSY(x) (((unsigned)(x) & 0x1) << 6) +#define G_00821C_ROQ_INDIRECT1_BUSY(x) (((x) >> 6) & 0x1) +#define C_00821C_ROQ_INDIRECT1_BUSY 0xFFFFFFBF +#define S_00821C_ROQ_INDIRECT2_BUSY(x) (((unsigned)(x) & 0x1) << 7) +#define G_00821C_ROQ_INDIRECT2_BUSY(x) (((x) >> 7) & 0x1) +#define C_00821C_ROQ_INDIRECT2_BUSY 0xFFFFFF7F +#define S_00821C_ROQ_STATE_BUSY(x) (((unsigned)(x) & 0x1) << 8) +#define G_00821C_ROQ_STATE_BUSY(x) (((x) >> 8) & 0x1) +#define C_00821C_ROQ_STATE_BUSY 0xFFFFFEFF +#define S_00821C_ROQ_CE_RING_BUSY(x) (((unsigned)(x) & 0x1) << 9) +#define G_00821C_ROQ_CE_RING_BUSY(x) (((x) >> 9) & 0x1) +#define C_00821C_ROQ_CE_RING_BUSY 0xFFFFFDFF +#define S_00821C_ROQ_CE_INDIRECT1_BUSY(x) (((unsigned)(x) & 0x1) << 10) +#define G_00821C_ROQ_CE_INDIRECT1_BUSY(x) (((x) >> 10) & 0x1) +#define C_00821C_ROQ_CE_INDIRECT1_BUSY 0xFFFFFBFF +#define S_00821C_ROQ_CE_INDIRECT2_BUSY(x) (((unsigned)(x) & 0x1) << 11) +#define G_00821C_ROQ_CE_INDIRECT2_BUSY(x) (((x) >> 11) & 0x1) +#define C_00821C_ROQ_CE_INDIRECT2_BUSY 0xFFFFF7FF +#define S_00821C_SEMAPHORE_BUSY(x) (((unsigned)(x) & 0x1) << 12) +#define G_00821C_SEMAPHORE_BUSY(x) (((x) >> 12) & 0x1) +#define C_00821C_SEMAPHORE_BUSY 0xFFFFEFFF +#define S_00821C_INTERRUPT_BUSY(x) (((unsigned)(x) & 0x1) << 13) +#define G_00821C_INTERRUPT_BUSY(x) (((x) >> 13) & 0x1) +#define C_00821C_INTERRUPT_BUSY 0xFFFFDFFF +#define S_00821C_TCIU_BUSY(x) (((unsigned)(x) & 0x1) << 14) +#define G_00821C_TCIU_BUSY(x) (((x) >> 14) & 0x1) +#define C_00821C_TCIU_BUSY 0xFFFFBFFF +#define S_00821C_HQD_BUSY(x) (((unsigned)(x) & 0x1) << 15) +#define G_00821C_HQD_BUSY(x) (((x) >> 15) & 0x1) +#define C_00821C_HQD_BUSY 0xFFFF7FFF +#define S_00821C_PRT_BUSY(x) (((unsigned)(x) & 0x1) << 16) +#define G_00821C_PRT_BUSY(x) (((x) >> 16) & 0x1) +#define C_00821C_PRT_BUSY 0xFFFEFFFF +#define S_00821C_ATCL2IU_BUSY(x) (((unsigned)(x) & 0x1) << 17) +#define G_00821C_ATCL2IU_BUSY(x) (((x) >> 17) & 0x1) +#define C_00821C_ATCL2IU_BUSY 0xFFFDFFFF +#define S_00821C_CPF_GFX_BUSY(x) (((unsigned)(x) & 0x1) << 26) +#define G_00821C_CPF_GFX_BUSY(x) (((x) >> 26) & 0x1) +#define C_00821C_CPF_GFX_BUSY 0xFBFFFFFF +#define S_00821C_CPF_CMP_BUSY(x) (((unsigned)(x) & 0x1) << 27) +#define G_00821C_CPF_CMP_BUSY(x) (((x) >> 27) & 0x1) +#define C_00821C_CPF_CMP_BUSY 0xF7FFFFFF +#define S_00821C_GRBM_CPF_STAT_BUSY(x) (((unsigned)(x) & 0x03) << 28) +#define G_00821C_GRBM_CPF_STAT_BUSY(x) (((x) >> 28) & 0x03) +#define C_00821C_GRBM_CPF_STAT_BUSY 0xCFFFFFFF +#define S_00821C_CPC_CPF_BUSY(x) (((unsigned)(x) & 0x1) << 30) +#define G_00821C_CPC_CPF_BUSY(x) (((x) >> 30) & 0x1) +#define C_00821C_CPC_CPF_BUSY 0xBFFFFFFF +#define S_00821C_CPF_BUSY(x) (((unsigned)(x) & 0x1) << 31) +#define G_00821C_CPF_BUSY(x) (((x) >> 31) & 0x1) +#define C_00821C_CPF_BUSY 0x7FFFFFFF +#define R_008220_CP_CPF_BUSY_STAT 0x008220 +#define S_008220_REG_BUS_FIFO_BUSY(x) (((unsigned)(x) & 0x1) << 0) +#define G_008220_REG_BUS_FIFO_BUSY(x) (((x) >> 0) & 0x1) +#define C_008220_REG_BUS_FIFO_BUSY 0xFFFFFFFE +#define S_008220_CSF_RING_BUSY(x) (((unsigned)(x) & 0x1) << 1) +#define G_008220_CSF_RING_BUSY(x) (((x) >> 1) & 0x1) +#define C_008220_CSF_RING_BUSY 0xFFFFFFFD +#define S_008220_CSF_INDIRECT1_BUSY(x) (((unsigned)(x) & 0x1) << 2) +#define G_008220_CSF_INDIRECT1_BUSY(x) (((x) >> 2) & 0x1) +#define C_008220_CSF_INDIRECT1_BUSY 0xFFFFFFFB +#define S_008220_CSF_INDIRECT2_BUSY(x) (((unsigned)(x) & 0x1) << 3) +#define G_008220_CSF_INDIRECT2_BUSY(x) (((x) >> 3) & 0x1) +#define C_008220_CSF_INDIRECT2_BUSY 0xFFFFFFF7 +#define S_008220_CSF_STATE_BUSY(x) (((unsigned)(x) & 0x1) << 4) +#define G_008220_CSF_STATE_BUSY(x) (((x) >> 4) & 0x1) +#define C_008220_CSF_STATE_BUSY 0xFFFFFFEF +#define S_008220_CSF_CE_INDR1_BUSY(x) (((unsigned)(x) & 0x1) << 5) +#define G_008220_CSF_CE_INDR1_BUSY(x) (((x) >> 5) & 0x1) +#define C_008220_CSF_CE_INDR1_BUSY 0xFFFFFFDF +#define S_008220_CSF_CE_INDR2_BUSY(x) (((unsigned)(x) & 0x1) << 6) +#define G_008220_CSF_CE_INDR2_BUSY(x) (((x) >> 6) & 0x1) +#define C_008220_CSF_CE_INDR2_BUSY 0xFFFFFFBF +#define S_008220_CSF_ARBITER_BUSY(x) (((unsigned)(x) & 0x1) << 7) +#define G_008220_CSF_ARBITER_BUSY(x) (((x) >> 7) & 0x1) +#define C_008220_CSF_ARBITER_BUSY 0xFFFFFF7F +#define S_008220_CSF_INPUT_BUSY(x) (((unsigned)(x) & 0x1) << 8) +#define G_008220_CSF_INPUT_BUSY(x) (((x) >> 8) & 0x1) +#define C_008220_CSF_INPUT_BUSY 0xFFFFFEFF +#define S_008220_OUTSTANDING_READ_TAGS(x) (((unsigned)(x) & 0x1) << 9) +#define G_008220_OUTSTANDING_READ_TAGS(x) (((x) >> 9) & 0x1) +#define C_008220_OUTSTANDING_READ_TAGS 0xFFFFFDFF +#define S_008220_HPD_PROCESSING_EOP_BUSY(x) (((unsigned)(x) & 0x1) << 11) +#define G_008220_HPD_PROCESSING_EOP_BUSY(x) (((x) >> 11) & 0x1) +#define C_008220_HPD_PROCESSING_EOP_BUSY 0xFFFFF7FF +#define S_008220_HQD_DISPATCH_BUSY(x) (((unsigned)(x) & 0x1) << 12) +#define G_008220_HQD_DISPATCH_BUSY(x) (((x) >> 12) & 0x1) +#define C_008220_HQD_DISPATCH_BUSY 0xFFFFEFFF +#define S_008220_HQD_IQ_TIMER_BUSY(x) (((unsigned)(x) & 0x1) << 13) +#define G_008220_HQD_IQ_TIMER_BUSY(x) (((x) >> 13) & 0x1) +#define C_008220_HQD_IQ_TIMER_BUSY 0xFFFFDFFF +#define S_008220_HQD_DMA_OFFLOAD_BUSY(x) (((unsigned)(x) & 0x1) << 14) +#define G_008220_HQD_DMA_OFFLOAD_BUSY(x) (((x) >> 14) & 0x1) +#define C_008220_HQD_DMA_OFFLOAD_BUSY 0xFFFFBFFF +#define S_008220_HQD_WAIT_SEMAPHORE_BUSY(x) (((unsigned)(x) & 0x1) << 15) +#define G_008220_HQD_WAIT_SEMAPHORE_BUSY(x) (((x) >> 15) & 0x1) +#define C_008220_HQD_WAIT_SEMAPHORE_BUSY 0xFFFF7FFF +#define S_008220_HQD_SIGNAL_SEMAPHORE_BUSY(x) (((unsigned)(x) & 0x1) << 16) +#define G_008220_HQD_SIGNAL_SEMAPHORE_BUSY(x) (((x) >> 16) & 0x1) +#define C_008220_HQD_SIGNAL_SEMAPHORE_BUSY 0xFFFEFFFF +#define S_008220_HQD_MESSAGE_BUSY(x) (((unsigned)(x) & 0x1) << 17) +#define G_008220_HQD_MESSAGE_BUSY(x) (((x) >> 17) & 0x1) +#define C_008220_HQD_MESSAGE_BUSY 0xFFFDFFFF +#define S_008220_HQD_PQ_FETCHER_BUSY(x) (((unsigned)(x) & 0x1) << 18) +#define G_008220_HQD_PQ_FETCHER_BUSY(x) (((x) >> 18) & 0x1) +#define C_008220_HQD_PQ_FETCHER_BUSY 0xFFFBFFFF +#define S_008220_HQD_IB_FETCHER_BUSY(x) (((unsigned)(x) & 0x1) << 19) +#define G_008220_HQD_IB_FETCHER_BUSY(x) (((x) >> 19) & 0x1) +#define C_008220_HQD_IB_FETCHER_BUSY 0xFFF7FFFF +#define S_008220_HQD_IQ_FETCHER_BUSY(x) (((unsigned)(x) & 0x1) << 20) +#define G_008220_HQD_IQ_FETCHER_BUSY(x) (((x) >> 20) & 0x1) +#define C_008220_HQD_IQ_FETCHER_BUSY 0xFFEFFFFF +#define S_008220_HQD_EOP_FETCHER_BUSY(x) (((unsigned)(x) & 0x1) << 21) +#define G_008220_HQD_EOP_FETCHER_BUSY(x) (((x) >> 21) & 0x1) +#define C_008220_HQD_EOP_FETCHER_BUSY 0xFFDFFFFF +#define S_008220_HQD_CONSUMED_RPTR_BUSY(x) (((unsigned)(x) & 0x1) << 22) +#define G_008220_HQD_CONSUMED_RPTR_BUSY(x) (((x) >> 22) & 0x1) +#define C_008220_HQD_CONSUMED_RPTR_BUSY 0xFFBFFFFF +#define S_008220_HQD_FETCHER_ARB_BUSY(x) (((unsigned)(x) & 0x1) << 23) +#define G_008220_HQD_FETCHER_ARB_BUSY(x) (((x) >> 23) & 0x1) +#define C_008220_HQD_FETCHER_ARB_BUSY 0xFF7FFFFF +#define S_008220_HQD_ROQ_ALIGN_BUSY(x) (((unsigned)(x) & 0x1) << 24) +#define G_008220_HQD_ROQ_ALIGN_BUSY(x) (((x) >> 24) & 0x1) +#define C_008220_HQD_ROQ_ALIGN_BUSY 0xFEFFFFFF +#define S_008220_HQD_ROQ_EOP_BUSY(x) (((unsigned)(x) & 0x1) << 25) +#define G_008220_HQD_ROQ_EOP_BUSY(x) (((x) >> 25) & 0x1) +#define C_008220_HQD_ROQ_EOP_BUSY 0xFDFFFFFF +#define S_008220_HQD_ROQ_IQ_BUSY(x) (((unsigned)(x) & 0x1) << 26) +#define G_008220_HQD_ROQ_IQ_BUSY(x) (((x) >> 26) & 0x1) +#define C_008220_HQD_ROQ_IQ_BUSY 0xFBFFFFFF +#define S_008220_HQD_ROQ_PQ_BUSY(x) (((unsigned)(x) & 0x1) << 27) +#define G_008220_HQD_ROQ_PQ_BUSY(x) (((x) >> 27) & 0x1) +#define C_008220_HQD_ROQ_PQ_BUSY 0xF7FFFFFF +#define S_008220_HQD_ROQ_IB_BUSY(x) (((unsigned)(x) & 0x1) << 28) +#define G_008220_HQD_ROQ_IB_BUSY(x) (((x) >> 28) & 0x1) +#define C_008220_HQD_ROQ_IB_BUSY 0xEFFFFFFF +#define S_008220_HQD_WPTR_POLL_BUSY(x) (((unsigned)(x) & 0x1) << 29) +#define G_008220_HQD_WPTR_POLL_BUSY(x) (((x) >> 29) & 0x1) +#define C_008220_HQD_WPTR_POLL_BUSY 0xDFFFFFFF +#define S_008220_HQD_PQ_BUSY(x) (((unsigned)(x) & 0x1) << 30) +#define G_008220_HQD_PQ_BUSY(x) (((x) >> 30) & 0x1) +#define C_008220_HQD_PQ_BUSY 0xBFFFFFFF +#define S_008220_HQD_IB_BUSY(x) (((unsigned)(x) & 0x1) << 31) +#define G_008220_HQD_IB_BUSY(x) (((x) >> 31) & 0x1) +#define C_008220_HQD_IB_BUSY 0x7FFFFFFF +#define R_008224_CP_CPF_STALLED_STAT1 0x008224 +#define S_008224_RING_FETCHING_DATA(x) (((unsigned)(x) & 0x1) << 0) +#define G_008224_RING_FETCHING_DATA(x) (((x) >> 0) & 0x1) +#define C_008224_RING_FETCHING_DATA 0xFFFFFFFE +#define S_008224_INDR1_FETCHING_DATA(x) (((unsigned)(x) & 0x1) << 1) +#define G_008224_INDR1_FETCHING_DATA(x) (((x) >> 1) & 0x1) +#define C_008224_INDR1_FETCHING_DATA 0xFFFFFFFD +#define S_008224_INDR2_FETCHING_DATA(x) (((unsigned)(x) & 0x1) << 2) +#define G_008224_INDR2_FETCHING_DATA(x) (((x) >> 2) & 0x1) +#define C_008224_INDR2_FETCHING_DATA 0xFFFFFFFB +#define S_008224_STATE_FETCHING_DATA(x) (((unsigned)(x) & 0x1) << 3) +#define G_008224_STATE_FETCHING_DATA(x) (((x) >> 3) & 0x1) +#define C_008224_STATE_FETCHING_DATA 0xFFFFFFF7 +#define S_008224_TCIU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 5) +#define G_008224_TCIU_WAITING_ON_FREE(x) (((x) >> 5) & 0x1) +#define C_008224_TCIU_WAITING_ON_FREE 0xFFFFFFDF +#define S_008224_TCIU_WAITING_ON_TAGS(x) (((unsigned)(x) & 0x1) << 6) +#define G_008224_TCIU_WAITING_ON_TAGS(x) (((x) >> 6) & 0x1) +#define C_008224_TCIU_WAITING_ON_TAGS 0xFFFFFFBF +#define S_008224_ATCL2IU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 7) +#define G_008224_ATCL2IU_WAITING_ON_FREE(x) (((x) >> 7) & 0x1) +#define C_008224_ATCL2IU_WAITING_ON_FREE 0xFFFFFF7F +#define S_008224_ATCL2IU_WAITING_ON_TAGS(x) (((unsigned)(x) & 0x1) << 8) +#define G_008224_ATCL2IU_WAITING_ON_TAGS(x) (((x) >> 8) & 0x1) +#define C_008224_ATCL2IU_WAITING_ON_TAGS 0xFFFFFEFF +#define S_008224_ATCL1_WAITING_ON_TRANS(x) (((unsigned)(x) & 0x1) << 9) +#define G_008224_ATCL1_WAITING_ON_TRANS(x) (((x) >> 9) & 0x1) +#define C_008224_ATCL1_WAITING_ON_TRANS 0xFFFFFDFF +#define R_030230_CP_COHER_SIZE_HI 0x030230 +#define S_030230_COHER_SIZE_HI_256B(x) (((unsigned)(x) & 0xFF) << 0) +#define G_030230_COHER_SIZE_HI_256B(x) (((x) >> 0) & 0xFF) +#define C_030230_COHER_SIZE_HI_256B 0xFFFFFF00 +/* */ +#define R_0088B0_VGT_VTX_VECT_EJECT_REG 0x0088B0 +#define S_0088B0_PRIM_COUNT(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_0088B0_PRIM_COUNT(x) (((x) >> 0) & 0x3FF) +#define C_0088B0_PRIM_COUNT 0xFFFFFC00 +#define R_0088C4_VGT_CACHE_INVALIDATION 0x0088C4 +#define S_0088C4_VS_NO_EXTRA_BUFFER(x) (((unsigned)(x) & 0x1) << 5) +#define G_0088C4_VS_NO_EXTRA_BUFFER(x) (((x) >> 5) & 0x1) +#define C_0088C4_VS_NO_EXTRA_BUFFER 0xFFFFFFDF +#define S_0088C4_STREAMOUT_FULL_FLUSH(x) (((unsigned)(x) & 0x1) << 13) +#define G_0088C4_STREAMOUT_FULL_FLUSH(x) (((x) >> 13) & 0x1) +#define C_0088C4_STREAMOUT_FULL_FLUSH 0xFFFFDFFF +#define S_0088C4_ES_LIMIT(x) (((unsigned)(x) & 0x1F) << 16) +#define G_0088C4_ES_LIMIT(x) (((x) >> 16) & 0x1F) +#define C_0088C4_ES_LIMIT 0xFFE0FFFF +#define R_0088C8_VGT_ESGS_RING_SIZE 0x0088C8 +#define R_0088CC_VGT_GSVS_RING_SIZE 0x0088CC +#define R_0088D4_VGT_GS_VERTEX_REUSE 0x0088D4 +#define S_0088D4_VERT_REUSE(x) (((unsigned)(x) & 0x1F) << 0) +#define G_0088D4_VERT_REUSE(x) (((x) >> 0) & 0x1F) +#define C_0088D4_VERT_REUSE 0xFFFFFFE0 +#define R_008958_VGT_PRIMITIVE_TYPE 0x008958 +#define S_008958_PRIM_TYPE(x) (((unsigned)(x) & 0x3F) << 0) +#define G_008958_PRIM_TYPE(x) (((x) >> 0) & 0x3F) +#define C_008958_PRIM_TYPE 0xFFFFFFC0 +#define V_008958_DI_PT_NONE 0x00 +#define V_008958_DI_PT_POINTLIST 0x01 +#define V_008958_DI_PT_LINELIST 0x02 +#define V_008958_DI_PT_LINESTRIP 0x03 +#define V_008958_DI_PT_TRILIST 0x04 +#define V_008958_DI_PT_TRIFAN 0x05 +#define V_008958_DI_PT_TRISTRIP 0x06 +#define V_008958_DI_PT_UNUSED_0 0x07 +#define V_008958_DI_PT_UNUSED_1 0x08 +#define V_008958_DI_PT_PATCH 0x09 +#define V_008958_DI_PT_LINELIST_ADJ 0x0A +#define V_008958_DI_PT_LINESTRIP_ADJ 0x0B +#define V_008958_DI_PT_TRILIST_ADJ 0x0C +#define V_008958_DI_PT_TRISTRIP_ADJ 0x0D +#define V_008958_DI_PT_UNUSED_3 0x0E +#define V_008958_DI_PT_UNUSED_4 0x0F +#define V_008958_DI_PT_TRI_WITH_WFLAGS 0x10 +#define V_008958_DI_PT_RECTLIST 0x11 +#define V_008958_DI_PT_LINELOOP 0x12 +#define V_008958_DI_PT_QUADLIST 0x13 +#define V_008958_DI_PT_QUADSTRIP 0x14 +#define V_008958_DI_PT_POLYGON 0x15 +#define V_008958_DI_PT_2D_COPY_RECT_LIST_V0 0x16 +#define V_008958_DI_PT_2D_COPY_RECT_LIST_V1 0x17 +#define V_008958_DI_PT_2D_COPY_RECT_LIST_V2 0x18 +#define V_008958_DI_PT_2D_COPY_RECT_LIST_V3 0x19 +#define V_008958_DI_PT_2D_FILL_RECT_LIST 0x1A +#define V_008958_DI_PT_2D_LINE_STRIP 0x1B +#define V_008958_DI_PT_2D_TRI_STRIP 0x1C +#define R_00895C_VGT_INDEX_TYPE 0x00895C +#define S_00895C_INDEX_TYPE(x) (((unsigned)(x) & 0x03) << 0) +#define G_00895C_INDEX_TYPE(x) (((x) >> 0) & 0x03) +#define C_00895C_INDEX_TYPE 0xFFFFFFFC +#define V_00895C_DI_INDEX_SIZE_16_BIT 0x00 +#define V_00895C_DI_INDEX_SIZE_32_BIT 0x01 +#define R_008960_VGT_STRMOUT_BUFFER_FILLED_SIZE_0 0x008960 +#define R_008964_VGT_STRMOUT_BUFFER_FILLED_SIZE_1 0x008964 +#define R_008968_VGT_STRMOUT_BUFFER_FILLED_SIZE_2 0x008968 +#define R_00896C_VGT_STRMOUT_BUFFER_FILLED_SIZE_3 0x00896C +#define R_008970_VGT_NUM_INDICES 0x008970 +#define R_008974_VGT_NUM_INSTANCES 0x008974 +#define R_008988_VGT_TF_RING_SIZE 0x008988 +#define S_008988_SIZE(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_008988_SIZE(x) (((x) >> 0) & 0xFFFF) +#define C_008988_SIZE 0xFFFF0000 +#define R_0089B0_VGT_HS_OFFCHIP_PARAM 0x0089B0 +#define S_0089B0_OFFCHIP_BUFFERING(x) (((unsigned)(x) & 0x7F) << 0) +#define G_0089B0_OFFCHIP_BUFFERING(x) (((x) >> 0) & 0x7F) +#define C_0089B0_OFFCHIP_BUFFERING 0xFFFFFF80 +#define R_0089B8_VGT_TF_MEMORY_BASE 0x0089B8 +#define R_008A14_PA_CL_ENHANCE 0x008A14 +#define S_008A14_CLIP_VTX_REORDER_ENA(x) (((unsigned)(x) & 0x1) << 0) +#define G_008A14_CLIP_VTX_REORDER_ENA(x) (((x) >> 0) & 0x1) +#define C_008A14_CLIP_VTX_REORDER_ENA 0xFFFFFFFE +#define S_008A14_NUM_CLIP_SEQ(x) (((unsigned)(x) & 0x03) << 1) +#define G_008A14_NUM_CLIP_SEQ(x) (((x) >> 1) & 0x03) +#define C_008A14_NUM_CLIP_SEQ 0xFFFFFFF9 +#define S_008A14_CLIPPED_PRIM_SEQ_STALL(x) (((unsigned)(x) & 0x1) << 3) +#define G_008A14_CLIPPED_PRIM_SEQ_STALL(x) (((x) >> 3) & 0x1) +#define C_008A14_CLIPPED_PRIM_SEQ_STALL 0xFFFFFFF7 +#define S_008A14_VE_NAN_PROC_DISABLE(x) (((unsigned)(x) & 0x1) << 4) +#define G_008A14_VE_NAN_PROC_DISABLE(x) (((x) >> 4) & 0x1) +#define C_008A14_VE_NAN_PROC_DISABLE 0xFFFFFFEF +#define R_008A60_PA_SU_LINE_STIPPLE_VALUE 0x008A60 +#define S_008A60_LINE_STIPPLE_VALUE(x) (((unsigned)(x) & 0xFFFFFF) << 0) +#define G_008A60_LINE_STIPPLE_VALUE(x) (((x) >> 0) & 0xFFFFFF) +#define C_008A60_LINE_STIPPLE_VALUE 0xFF000000 +#define R_008B10_PA_SC_LINE_STIPPLE_STATE 0x008B10 +#define S_008B10_CURRENT_PTR(x) (((unsigned)(x) & 0x0F) << 0) +#define G_008B10_CURRENT_PTR(x) (((x) >> 0) & 0x0F) +#define C_008B10_CURRENT_PTR 0xFFFFFFF0 +#define S_008B10_CURRENT_COUNT(x) (((unsigned)(x) & 0xFF) << 8) +#define G_008B10_CURRENT_COUNT(x) (((x) >> 8) & 0xFF) +#define C_008B10_CURRENT_COUNT 0xFFFF00FF +#define R_008670_CP_STALLED_STAT3 0x008670 +#define S_008670_CE_TO_CSF_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 0) +#define G_008670_CE_TO_CSF_NOT_RDY_TO_RCV(x) (((x) >> 0) & 0x1) +#define C_008670_CE_TO_CSF_NOT_RDY_TO_RCV 0xFFFFFFFE +#define S_008670_CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 1) +#define G_008670_CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV(x) (((x) >> 1) & 0x1) +#define C_008670_CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV 0xFFFFFFFD +#define S_008670_CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER(x) (((unsigned)(x) & 0x1) << 2) +#define G_008670_CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER(x) (((x) >> 2) & 0x1) +#define C_008670_CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER 0xFFFFFFFB +#define S_008670_CE_TO_RAM_INIT_NOT_RDY(x) (((unsigned)(x) & 0x1) << 3) +#define G_008670_CE_TO_RAM_INIT_NOT_RDY(x) (((x) >> 3) & 0x1) +#define C_008670_CE_TO_RAM_INIT_NOT_RDY 0xFFFFFFF7 +#define S_008670_CE_TO_RAM_DUMP_NOT_RDY(x) (((unsigned)(x) & 0x1) << 4) +#define G_008670_CE_TO_RAM_DUMP_NOT_RDY(x) (((x) >> 4) & 0x1) +#define C_008670_CE_TO_RAM_DUMP_NOT_RDY 0xFFFFFFEF +#define S_008670_CE_TO_RAM_WRITE_NOT_RDY(x) (((unsigned)(x) & 0x1) << 5) +#define G_008670_CE_TO_RAM_WRITE_NOT_RDY(x) (((x) >> 5) & 0x1) +#define C_008670_CE_TO_RAM_WRITE_NOT_RDY 0xFFFFFFDF +#define S_008670_CE_TO_INC_FIFO_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 6) +#define G_008670_CE_TO_INC_FIFO_NOT_RDY_TO_RCV(x) (((x) >> 6) & 0x1) +#define C_008670_CE_TO_INC_FIFO_NOT_RDY_TO_RCV 0xFFFFFFBF +#define S_008670_CE_TO_WR_FIFO_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 7) +#define G_008670_CE_TO_WR_FIFO_NOT_RDY_TO_RCV(x) (((x) >> 7) & 0x1) +#define C_008670_CE_TO_WR_FIFO_NOT_RDY_TO_RCV 0xFFFFFF7F +#define S_008670_CE_WAITING_ON_BUFFER_DATA(x) (((unsigned)(x) & 0x1) << 10) +#define G_008670_CE_WAITING_ON_BUFFER_DATA(x) (((x) >> 10) & 0x1) +#define C_008670_CE_WAITING_ON_BUFFER_DATA 0xFFFFFBFF +#define S_008670_CE_WAITING_ON_CE_BUFFER_FLAG(x) (((unsigned)(x) & 0x1) << 11) +#define G_008670_CE_WAITING_ON_CE_BUFFER_FLAG(x) (((x) >> 11) & 0x1) +#define C_008670_CE_WAITING_ON_CE_BUFFER_FLAG 0xFFFFF7FF +#define S_008670_CE_WAITING_ON_DE_COUNTER(x) (((unsigned)(x) & 0x1) << 12) +#define G_008670_CE_WAITING_ON_DE_COUNTER(x) (((x) >> 12) & 0x1) +#define C_008670_CE_WAITING_ON_DE_COUNTER 0xFFFFEFFF +#define S_008670_CE_WAITING_ON_DE_COUNTER_UNDERFLOW(x) (((unsigned)(x) & 0x1) << 13) +#define G_008670_CE_WAITING_ON_DE_COUNTER_UNDERFLOW(x) (((x) >> 13) & 0x1) +#define C_008670_CE_WAITING_ON_DE_COUNTER_UNDERFLOW 0xFFFFDFFF +#define S_008670_TCIU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 14) +#define G_008670_TCIU_WAITING_ON_FREE(x) (((x) >> 14) & 0x1) +#define C_008670_TCIU_WAITING_ON_FREE 0xFFFFBFFF +#define S_008670_TCIU_WAITING_ON_TAGS(x) (((unsigned)(x) & 0x1) << 15) +#define G_008670_TCIU_WAITING_ON_TAGS(x) (((x) >> 15) & 0x1) +#define C_008670_TCIU_WAITING_ON_TAGS 0xFFFF7FFF +#define S_008670_CE_STALLED_ON_TC_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 16) +#define G_008670_CE_STALLED_ON_TC_WR_CONFIRM(x) (((x) >> 16) & 0x1) +#define C_008670_CE_STALLED_ON_TC_WR_CONFIRM 0xFFFEFFFF +#define S_008670_CE_STALLED_ON_ATOMIC_RTN_DATA(x) (((unsigned)(x) & 0x1) << 17) +#define G_008670_CE_STALLED_ON_ATOMIC_RTN_DATA(x) (((x) >> 17) & 0x1) +#define C_008670_CE_STALLED_ON_ATOMIC_RTN_DATA 0xFFFDFFFF +#define S_008670_ATCL2IU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 18) +#define G_008670_ATCL2IU_WAITING_ON_FREE(x) (((x) >> 18) & 0x1) +#define C_008670_ATCL2IU_WAITING_ON_FREE 0xFFFBFFFF +#define S_008670_ATCL2IU_WAITING_ON_TAGS(x) (((unsigned)(x) & 0x1) << 19) +#define G_008670_ATCL2IU_WAITING_ON_TAGS(x) (((x) >> 19) & 0x1) +#define C_008670_ATCL2IU_WAITING_ON_TAGS 0xFFF7FFFF +#define S_008670_ATCL1_WAITING_ON_TRANS(x) (((unsigned)(x) & 0x1) << 20) +#define G_008670_ATCL1_WAITING_ON_TRANS(x) (((x) >> 20) & 0x1) +#define C_008670_ATCL1_WAITING_ON_TRANS 0xFFEFFFFF +#define R_008674_CP_STALLED_STAT1 0x008674 +#define S_008674_RBIU_TO_DMA_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 0) +#define G_008674_RBIU_TO_DMA_NOT_RDY_TO_RCV(x) (((x) >> 0) & 0x1) +#define C_008674_RBIU_TO_DMA_NOT_RDY_TO_RCV 0xFFFFFFFE +#define S_008674_RBIU_TO_SEM_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 2) +#define G_008674_RBIU_TO_SEM_NOT_RDY_TO_RCV(x) (((x) >> 2) & 0x1) +#define C_008674_RBIU_TO_SEM_NOT_RDY_TO_RCV 0xFFFFFFFB +#define S_008674_RBIU_TO_MEMWR_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 4) +#define G_008674_RBIU_TO_MEMWR_NOT_RDY_TO_RCV(x) (((x) >> 4) & 0x1) +#define C_008674_RBIU_TO_MEMWR_NOT_RDY_TO_RCV 0xFFFFFFEF +#define S_008674_ME_HAS_ACTIVE_CE_BUFFER_FLAG(x) (((unsigned)(x) & 0x1) << 10) +#define G_008674_ME_HAS_ACTIVE_CE_BUFFER_FLAG(x) (((x) >> 10) & 0x1) +#define C_008674_ME_HAS_ACTIVE_CE_BUFFER_FLAG 0xFFFFFBFF +#define S_008674_ME_HAS_ACTIVE_DE_BUFFER_FLAG(x) (((unsigned)(x) & 0x1) << 11) +#define G_008674_ME_HAS_ACTIVE_DE_BUFFER_FLAG(x) (((x) >> 11) & 0x1) +#define C_008674_ME_HAS_ACTIVE_DE_BUFFER_FLAG 0xFFFFF7FF +#define S_008674_ME_STALLED_ON_TC_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 12) +#define G_008674_ME_STALLED_ON_TC_WR_CONFIRM(x) (((x) >> 12) & 0x1) +#define C_008674_ME_STALLED_ON_TC_WR_CONFIRM 0xFFFFEFFF +#define S_008674_ME_STALLED_ON_ATOMIC_RTN_DATA(x) (((unsigned)(x) & 0x1) << 13) +#define G_008674_ME_STALLED_ON_ATOMIC_RTN_DATA(x) (((x) >> 13) & 0x1) +#define C_008674_ME_STALLED_ON_ATOMIC_RTN_DATA 0xFFFFDFFF +#define S_008674_ME_WAITING_ON_TC_READ_DATA(x) (((unsigned)(x) & 0x1) << 14) +#define G_008674_ME_WAITING_ON_TC_READ_DATA(x) (((x) >> 14) & 0x1) +#define C_008674_ME_WAITING_ON_TC_READ_DATA 0xFFFFBFFF +#define S_008674_ME_WAITING_ON_REG_READ_DATA(x) (((unsigned)(x) & 0x1) << 15) +#define G_008674_ME_WAITING_ON_REG_READ_DATA(x) (((x) >> 15) & 0x1) +#define C_008674_ME_WAITING_ON_REG_READ_DATA 0xFFFF7FFF +#define S_008674_RCIU_WAITING_ON_GDS_FREE(x) (((unsigned)(x) & 0x1) << 23) +#define G_008674_RCIU_WAITING_ON_GDS_FREE(x) (((x) >> 23) & 0x1) +#define C_008674_RCIU_WAITING_ON_GDS_FREE 0xFF7FFFFF +#define S_008674_RCIU_WAITING_ON_GRBM_FREE(x) (((unsigned)(x) & 0x1) << 24) +#define G_008674_RCIU_WAITING_ON_GRBM_FREE(x) (((x) >> 24) & 0x1) +#define C_008674_RCIU_WAITING_ON_GRBM_FREE 0xFEFFFFFF +#define S_008674_RCIU_WAITING_ON_VGT_FREE(x) (((unsigned)(x) & 0x1) << 25) +#define G_008674_RCIU_WAITING_ON_VGT_FREE(x) (((x) >> 25) & 0x1) +#define C_008674_RCIU_WAITING_ON_VGT_FREE 0xFDFFFFFF +#define S_008674_RCIU_STALLED_ON_ME_READ(x) (((unsigned)(x) & 0x1) << 26) +#define G_008674_RCIU_STALLED_ON_ME_READ(x) (((x) >> 26) & 0x1) +#define C_008674_RCIU_STALLED_ON_ME_READ 0xFBFFFFFF +#define S_008674_RCIU_STALLED_ON_DMA_READ(x) (((unsigned)(x) & 0x1) << 27) +#define G_008674_RCIU_STALLED_ON_DMA_READ(x) (((x) >> 27) & 0x1) +#define C_008674_RCIU_STALLED_ON_DMA_READ 0xF7FFFFFF +#define S_008674_RCIU_STALLED_ON_APPEND_READ(x) (((unsigned)(x) & 0x1) << 28) +#define G_008674_RCIU_STALLED_ON_APPEND_READ(x) (((x) >> 28) & 0x1) +#define C_008674_RCIU_STALLED_ON_APPEND_READ 0xEFFFFFFF +#define S_008674_RCIU_HALTED_BY_REG_VIOLATION(x) (((unsigned)(x) & 0x1) << 29) +#define G_008674_RCIU_HALTED_BY_REG_VIOLATION(x) (((x) >> 29) & 0x1) +#define C_008674_RCIU_HALTED_BY_REG_VIOLATION 0xDFFFFFFF +#define R_008678_CP_STALLED_STAT2 0x008678 +#define S_008678_PFP_TO_CSF_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 0) +#define G_008678_PFP_TO_CSF_NOT_RDY_TO_RCV(x) (((x) >> 0) & 0x1) +#define C_008678_PFP_TO_CSF_NOT_RDY_TO_RCV 0xFFFFFFFE +#define S_008678_PFP_TO_MEQ_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 1) +#define G_008678_PFP_TO_MEQ_NOT_RDY_TO_RCV(x) (((x) >> 1) & 0x1) +#define C_008678_PFP_TO_MEQ_NOT_RDY_TO_RCV 0xFFFFFFFD +#define S_008678_PFP_TO_RCIU_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 2) +#define G_008678_PFP_TO_RCIU_NOT_RDY_TO_RCV(x) (((x) >> 2) & 0x1) +#define C_008678_PFP_TO_RCIU_NOT_RDY_TO_RCV 0xFFFFFFFB +#define S_008678_PFP_TO_VGT_WRITES_PENDING(x) (((unsigned)(x) & 0x1) << 4) +#define G_008678_PFP_TO_VGT_WRITES_PENDING(x) (((x) >> 4) & 0x1) +#define C_008678_PFP_TO_VGT_WRITES_PENDING 0xFFFFFFEF +#define S_008678_PFP_RCIU_READ_PENDING(x) (((unsigned)(x) & 0x1) << 5) +#define G_008678_PFP_RCIU_READ_PENDING(x) (((x) >> 5) & 0x1) +#define C_008678_PFP_RCIU_READ_PENDING 0xFFFFFFDF +#define S_008678_PFP_WAITING_ON_BUFFER_DATA(x) (((unsigned)(x) & 0x1) << 8) +#define G_008678_PFP_WAITING_ON_BUFFER_DATA(x) (((x) >> 8) & 0x1) +#define C_008678_PFP_WAITING_ON_BUFFER_DATA 0xFFFFFEFF +#define S_008678_ME_WAIT_ON_CE_COUNTER(x) (((unsigned)(x) & 0x1) << 9) +#define G_008678_ME_WAIT_ON_CE_COUNTER(x) (((x) >> 9) & 0x1) +#define C_008678_ME_WAIT_ON_CE_COUNTER 0xFFFFFDFF +#define S_008678_ME_WAIT_ON_AVAIL_BUFFER(x) (((unsigned)(x) & 0x1) << 10) +#define G_008678_ME_WAIT_ON_AVAIL_BUFFER(x) (((x) >> 10) & 0x1) +#define C_008678_ME_WAIT_ON_AVAIL_BUFFER 0xFFFFFBFF +#define S_008678_GFX_CNTX_NOT_AVAIL_TO_ME(x) (((unsigned)(x) & 0x1) << 11) +#define G_008678_GFX_CNTX_NOT_AVAIL_TO_ME(x) (((x) >> 11) & 0x1) +#define C_008678_GFX_CNTX_NOT_AVAIL_TO_ME 0xFFFFF7FF +#define S_008678_ME_RCIU_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 12) +#define G_008678_ME_RCIU_NOT_RDY_TO_RCV(x) (((x) >> 12) & 0x1) +#define C_008678_ME_RCIU_NOT_RDY_TO_RCV 0xFFFFEFFF +#define S_008678_ME_TO_CONST_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 13) +#define G_008678_ME_TO_CONST_NOT_RDY_TO_RCV(x) (((x) >> 13) & 0x1) +#define C_008678_ME_TO_CONST_NOT_RDY_TO_RCV 0xFFFFDFFF +#define S_008678_ME_WAITING_DATA_FROM_PFP(x) (((unsigned)(x) & 0x1) << 14) +#define G_008678_ME_WAITING_DATA_FROM_PFP(x) (((x) >> 14) & 0x1) +#define C_008678_ME_WAITING_DATA_FROM_PFP 0xFFFFBFFF +#define S_008678_ME_WAITING_ON_PARTIAL_FLUSH(x) (((unsigned)(x) & 0x1) << 15) +#define G_008678_ME_WAITING_ON_PARTIAL_FLUSH(x) (((x) >> 15) & 0x1) +#define C_008678_ME_WAITING_ON_PARTIAL_FLUSH 0xFFFF7FFF +#define S_008678_MEQ_TO_ME_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 16) +#define G_008678_MEQ_TO_ME_NOT_RDY_TO_RCV(x) (((x) >> 16) & 0x1) +#define C_008678_MEQ_TO_ME_NOT_RDY_TO_RCV 0xFFFEFFFF +#define S_008678_STQ_TO_ME_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 17) +#define G_008678_STQ_TO_ME_NOT_RDY_TO_RCV(x) (((x) >> 17) & 0x1) +#define C_008678_STQ_TO_ME_NOT_RDY_TO_RCV 0xFFFDFFFF +#define S_008678_ME_WAITING_DATA_FROM_STQ(x) (((unsigned)(x) & 0x1) << 18) +#define G_008678_ME_WAITING_DATA_FROM_STQ(x) (((x) >> 18) & 0x1) +#define C_008678_ME_WAITING_DATA_FROM_STQ 0xFFFBFFFF +#define S_008678_PFP_STALLED_ON_TC_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 19) +#define G_008678_PFP_STALLED_ON_TC_WR_CONFIRM(x) (((x) >> 19) & 0x1) +#define C_008678_PFP_STALLED_ON_TC_WR_CONFIRM 0xFFF7FFFF +#define S_008678_PFP_STALLED_ON_ATOMIC_RTN_DATA(x) (((unsigned)(x) & 0x1) << 20) +#define G_008678_PFP_STALLED_ON_ATOMIC_RTN_DATA(x) (((x) >> 20) & 0x1) +#define C_008678_PFP_STALLED_ON_ATOMIC_RTN_DATA 0xFFEFFFFF +#define S_008678_EOPD_FIFO_NEEDS_SC_EOP_DONE(x) (((unsigned)(x) & 0x1) << 21) +#define G_008678_EOPD_FIFO_NEEDS_SC_EOP_DONE(x) (((x) >> 21) & 0x1) +#define C_008678_EOPD_FIFO_NEEDS_SC_EOP_DONE 0xFFDFFFFF +#define S_008678_EOPD_FIFO_NEEDS_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 22) +#define G_008678_EOPD_FIFO_NEEDS_WR_CONFIRM(x) (((x) >> 22) & 0x1) +#define C_008678_EOPD_FIFO_NEEDS_WR_CONFIRM 0xFFBFFFFF +#define S_008678_STRMO_WR_OF_PRIM_DATA_PENDING(x) (((unsigned)(x) & 0x1) << 23) +#define G_008678_STRMO_WR_OF_PRIM_DATA_PENDING(x) (((x) >> 23) & 0x1) +#define C_008678_STRMO_WR_OF_PRIM_DATA_PENDING 0xFF7FFFFF +#define S_008678_PIPE_STATS_WR_DATA_PENDING(x) (((unsigned)(x) & 0x1) << 24) +#define G_008678_PIPE_STATS_WR_DATA_PENDING(x) (((x) >> 24) & 0x1) +#define C_008678_PIPE_STATS_WR_DATA_PENDING 0xFEFFFFFF +#define S_008678_APPEND_RDY_WAIT_ON_CS_DONE(x) (((unsigned)(x) & 0x1) << 25) +#define G_008678_APPEND_RDY_WAIT_ON_CS_DONE(x) (((x) >> 25) & 0x1) +#define C_008678_APPEND_RDY_WAIT_ON_CS_DONE 0xFDFFFFFF +#define S_008678_APPEND_RDY_WAIT_ON_PS_DONE(x) (((unsigned)(x) & 0x1) << 26) +#define G_008678_APPEND_RDY_WAIT_ON_PS_DONE(x) (((x) >> 26) & 0x1) +#define C_008678_APPEND_RDY_WAIT_ON_PS_DONE 0xFBFFFFFF +#define S_008678_APPEND_WAIT_ON_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 27) +#define G_008678_APPEND_WAIT_ON_WR_CONFIRM(x) (((x) >> 27) & 0x1) +#define C_008678_APPEND_WAIT_ON_WR_CONFIRM 0xF7FFFFFF +#define S_008678_APPEND_ACTIVE_PARTITION(x) (((unsigned)(x) & 0x1) << 28) +#define G_008678_APPEND_ACTIVE_PARTITION(x) (((x) >> 28) & 0x1) +#define C_008678_APPEND_ACTIVE_PARTITION 0xEFFFFFFF +#define S_008678_APPEND_WAITING_TO_SEND_MEMWRITE(x) (((unsigned)(x) & 0x1) << 29) +#define G_008678_APPEND_WAITING_TO_SEND_MEMWRITE(x) (((x) >> 29) & 0x1) +#define C_008678_APPEND_WAITING_TO_SEND_MEMWRITE 0xDFFFFFFF +#define S_008678_SURF_SYNC_NEEDS_IDLE_CNTXS(x) (((unsigned)(x) & 0x1) << 30) +#define G_008678_SURF_SYNC_NEEDS_IDLE_CNTXS(x) (((x) >> 30) & 0x1) +#define C_008678_SURF_SYNC_NEEDS_IDLE_CNTXS 0xBFFFFFFF +#define S_008678_SURF_SYNC_NEEDS_ALL_CLEAN(x) (((unsigned)(x) & 0x1) << 31) +#define G_008678_SURF_SYNC_NEEDS_ALL_CLEAN(x) (((x) >> 31) & 0x1) +#define C_008678_SURF_SYNC_NEEDS_ALL_CLEAN 0x7FFFFFFF +#define R_008680_CP_STAT 0x008680 +#define S_008680_ROQ_RING_BUSY(x) (((unsigned)(x) & 0x1) << 9) +#define G_008680_ROQ_RING_BUSY(x) (((x) >> 9) & 0x1) +#define C_008680_ROQ_RING_BUSY 0xFFFFFDFF +#define S_008680_ROQ_INDIRECT1_BUSY(x) (((unsigned)(x) & 0x1) << 10) +#define G_008680_ROQ_INDIRECT1_BUSY(x) (((x) >> 10) & 0x1) +#define C_008680_ROQ_INDIRECT1_BUSY 0xFFFFFBFF +#define S_008680_ROQ_INDIRECT2_BUSY(x) (((unsigned)(x) & 0x1) << 11) +#define G_008680_ROQ_INDIRECT2_BUSY(x) (((x) >> 11) & 0x1) +#define C_008680_ROQ_INDIRECT2_BUSY 0xFFFFF7FF +#define S_008680_ROQ_STATE_BUSY(x) (((unsigned)(x) & 0x1) << 12) +#define G_008680_ROQ_STATE_BUSY(x) (((x) >> 12) & 0x1) +#define C_008680_ROQ_STATE_BUSY 0xFFFFEFFF +#define S_008680_DC_BUSY(x) (((unsigned)(x) & 0x1) << 13) +#define G_008680_DC_BUSY(x) (((x) >> 13) & 0x1) +#define C_008680_DC_BUSY 0xFFFFDFFF +#define S_008680_ATCL2IU_BUSY(x) (((unsigned)(x) & 0x1) << 14) +#define G_008680_ATCL2IU_BUSY(x) (((x) >> 14) & 0x1) +#define C_008680_ATCL2IU_BUSY 0xFFFFBFFF +#define S_008680_PFP_BUSY(x) (((unsigned)(x) & 0x1) << 15) +#define G_008680_PFP_BUSY(x) (((x) >> 15) & 0x1) +#define C_008680_PFP_BUSY 0xFFFF7FFF +#define S_008680_MEQ_BUSY(x) (((unsigned)(x) & 0x1) << 16) +#define G_008680_MEQ_BUSY(x) (((x) >> 16) & 0x1) +#define C_008680_MEQ_BUSY 0xFFFEFFFF +#define S_008680_ME_BUSY(x) (((unsigned)(x) & 0x1) << 17) +#define G_008680_ME_BUSY(x) (((x) >> 17) & 0x1) +#define C_008680_ME_BUSY 0xFFFDFFFF +#define S_008680_QUERY_BUSY(x) (((unsigned)(x) & 0x1) << 18) +#define G_008680_QUERY_BUSY(x) (((x) >> 18) & 0x1) +#define C_008680_QUERY_BUSY 0xFFFBFFFF +#define S_008680_SEMAPHORE_BUSY(x) (((unsigned)(x) & 0x1) << 19) +#define G_008680_SEMAPHORE_BUSY(x) (((x) >> 19) & 0x1) +#define C_008680_SEMAPHORE_BUSY 0xFFF7FFFF +#define S_008680_INTERRUPT_BUSY(x) (((unsigned)(x) & 0x1) << 20) +#define G_008680_INTERRUPT_BUSY(x) (((x) >> 20) & 0x1) +#define C_008680_INTERRUPT_BUSY 0xFFEFFFFF +#define S_008680_SURFACE_SYNC_BUSY(x) (((unsigned)(x) & 0x1) << 21) +#define G_008680_SURFACE_SYNC_BUSY(x) (((x) >> 21) & 0x1) +#define C_008680_SURFACE_SYNC_BUSY 0xFFDFFFFF +#define S_008680_DMA_BUSY(x) (((unsigned)(x) & 0x1) << 22) +#define G_008680_DMA_BUSY(x) (((x) >> 22) & 0x1) +#define C_008680_DMA_BUSY 0xFFBFFFFF +#define S_008680_RCIU_BUSY(x) (((unsigned)(x) & 0x1) << 23) +#define G_008680_RCIU_BUSY(x) (((x) >> 23) & 0x1) +#define C_008680_RCIU_BUSY 0xFF7FFFFF +#define S_008680_SCRATCH_RAM_BUSY(x) (((unsigned)(x) & 0x1) << 24) +#define G_008680_SCRATCH_RAM_BUSY(x) (((x) >> 24) & 0x1) +#define C_008680_SCRATCH_RAM_BUSY 0xFEFFFFFF +#define S_008680_CPC_CPG_BUSY(x) (((unsigned)(x) & 0x1) << 25) +#define G_008680_CPC_CPG_BUSY(x) (((x) >> 25) & 0x1) +#define C_008680_CPC_CPG_BUSY 0xFDFFFFFF +#define S_008680_CE_BUSY(x) (((unsigned)(x) & 0x1) << 26) +#define G_008680_CE_BUSY(x) (((x) >> 26) & 0x1) +#define C_008680_CE_BUSY 0xFBFFFFFF +#define S_008680_TCIU_BUSY(x) (((unsigned)(x) & 0x1) << 27) +#define G_008680_TCIU_BUSY(x) (((x) >> 27) & 0x1) +#define C_008680_TCIU_BUSY 0xF7FFFFFF +#define S_008680_ROQ_CE_RING_BUSY(x) (((unsigned)(x) & 0x1) << 28) +#define G_008680_ROQ_CE_RING_BUSY(x) (((x) >> 28) & 0x1) +#define C_008680_ROQ_CE_RING_BUSY 0xEFFFFFFF +#define S_008680_ROQ_CE_INDIRECT1_BUSY(x) (((unsigned)(x) & 0x1) << 29) +#define G_008680_ROQ_CE_INDIRECT1_BUSY(x) (((x) >> 29) & 0x1) +#define C_008680_ROQ_CE_INDIRECT1_BUSY 0xDFFFFFFF +#define S_008680_ROQ_CE_INDIRECT2_BUSY(x) (((unsigned)(x) & 0x1) << 30) +#define G_008680_ROQ_CE_INDIRECT2_BUSY(x) (((x) >> 30) & 0x1) +#define C_008680_ROQ_CE_INDIRECT2_BUSY 0xBFFFFFFF +#define S_008680_CP_BUSY(x) (((unsigned)(x) & 0x1) << 31) +#define G_008680_CP_BUSY(x) (((x) >> 31) & 0x1) +#define C_008680_CP_BUSY 0x7FFFFFFF +/* CIK */ +#define R_030800_GRBM_GFX_INDEX 0x030800 +#define S_030800_INSTANCE_INDEX(x) (((unsigned)(x) & 0xFF) << 0) +#define G_030800_INSTANCE_INDEX(x) (((x) >> 0) & 0xFF) +#define C_030800_INSTANCE_INDEX 0xFFFFFF00 +#define S_030800_SH_INDEX(x) (((unsigned)(x) & 0xFF) << 8) +#define G_030800_SH_INDEX(x) (((x) >> 8) & 0xFF) +#define C_030800_SH_INDEX 0xFFFF00FF +#define S_030800_SE_INDEX(x) (((unsigned)(x) & 0xFF) << 16) +#define G_030800_SE_INDEX(x) (((x) >> 16) & 0xFF) +#define C_030800_SE_INDEX 0xFF00FFFF +#define S_030800_SH_BROADCAST_WRITES(x) (((unsigned)(x) & 0x1) << 29) +#define G_030800_SH_BROADCAST_WRITES(x) (((x) >> 29) & 0x1) +#define C_030800_SH_BROADCAST_WRITES 0xDFFFFFFF +#define S_030800_INSTANCE_BROADCAST_WRITES(x) (((unsigned)(x) & 0x1) << 30) +#define G_030800_INSTANCE_BROADCAST_WRITES(x) (((x) >> 30) & 0x1) +#define C_030800_INSTANCE_BROADCAST_WRITES 0xBFFFFFFF +#define S_030800_SE_BROADCAST_WRITES(x) (((unsigned)(x) & 0x1) << 31) +#define G_030800_SE_BROADCAST_WRITES(x) (((x) >> 31) & 0x1) +#define C_030800_SE_BROADCAST_WRITES 0x7FFFFFFF +#define R_030900_VGT_ESGS_RING_SIZE 0x030900 +#define R_030904_VGT_GSVS_RING_SIZE 0x030904 +#define R_030908_VGT_PRIMITIVE_TYPE 0x030908 +#define S_030908_PRIM_TYPE(x) (((unsigned)(x) & 0x3F) << 0) +#define G_030908_PRIM_TYPE(x) (((x) >> 0) & 0x3F) +#define C_030908_PRIM_TYPE 0xFFFFFFC0 +#define V_030908_DI_PT_NONE 0x00 +#define V_030908_DI_PT_POINTLIST 0x01 +#define V_030908_DI_PT_LINELIST 0x02 +#define V_030908_DI_PT_LINESTRIP 0x03 +#define V_030908_DI_PT_TRILIST 0x04 +#define V_030908_DI_PT_TRIFAN 0x05 +#define V_030908_DI_PT_TRISTRIP 0x06 +#define V_030908_DI_PT_PATCH 0x09 +#define V_030908_DI_PT_LINELIST_ADJ 0x0A +#define V_030908_DI_PT_LINESTRIP_ADJ 0x0B +#define V_030908_DI_PT_TRILIST_ADJ 0x0C +#define V_030908_DI_PT_TRISTRIP_ADJ 0x0D +#define V_030908_DI_PT_TRI_WITH_WFLAGS 0x10 +#define V_030908_DI_PT_RECTLIST 0x11 +#define V_030908_DI_PT_LINELOOP 0x12 +#define V_030908_DI_PT_QUADLIST 0x13 +#define V_030908_DI_PT_QUADSTRIP 0x14 +#define V_030908_DI_PT_POLYGON 0x15 +#define V_030908_DI_PT_2D_COPY_RECT_LIST_V0 0x16 +#define V_030908_DI_PT_2D_COPY_RECT_LIST_V1 0x17 +#define V_030908_DI_PT_2D_COPY_RECT_LIST_V2 0x18 +#define V_030908_DI_PT_2D_COPY_RECT_LIST_V3 0x19 +#define V_030908_DI_PT_2D_FILL_RECT_LIST 0x1A +#define V_030908_DI_PT_2D_LINE_STRIP 0x1B +#define V_030908_DI_PT_2D_TRI_STRIP 0x1C +#define R_03090C_VGT_INDEX_TYPE 0x03090C +#define S_03090C_INDEX_TYPE(x) (((unsigned)(x) & 0x03) << 0) +#define G_03090C_INDEX_TYPE(x) (((x) >> 0) & 0x03) +#define C_03090C_INDEX_TYPE 0xFFFFFFFC +#define V_03090C_DI_INDEX_SIZE_16_BIT 0x00 +#define V_03090C_DI_INDEX_SIZE_32_BIT 0x01 +#define R_030910_VGT_STRMOUT_BUFFER_FILLED_SIZE_0 0x030910 +#define R_030914_VGT_STRMOUT_BUFFER_FILLED_SIZE_1 0x030914 +#define R_030918_VGT_STRMOUT_BUFFER_FILLED_SIZE_2 0x030918 +#define R_03091C_VGT_STRMOUT_BUFFER_FILLED_SIZE_3 0x03091C +#define R_030930_VGT_NUM_INDICES 0x030930 +#define R_030934_VGT_NUM_INSTANCES 0x030934 +#define R_030938_VGT_TF_RING_SIZE 0x030938 +#define S_030938_SIZE(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_030938_SIZE(x) (((x) >> 0) & 0xFFFF) +#define C_030938_SIZE 0xFFFF0000 +#define R_03093C_VGT_HS_OFFCHIP_PARAM 0x03093C +#define S_03093C_OFFCHIP_BUFFERING(x) (((unsigned)(x) & 0x1FF) << 0) +#define G_03093C_OFFCHIP_BUFFERING(x) (((x) >> 0) & 0x1FF) +#define C_03093C_OFFCHIP_BUFFERING 0xFFFFFE00 +#define S_03093C_OFFCHIP_GRANULARITY(x) (((unsigned)(x) & 0x03) << 9) +#define G_03093C_OFFCHIP_GRANULARITY(x) (((x) >> 9) & 0x03) +#define C_03093C_OFFCHIP_GRANULARITY 0xFFFFF9FF +#define V_03093C_X_8K_DWORDS 0x00 +#define V_03093C_X_4K_DWORDS 0x01 +#define V_03093C_X_2K_DWORDS 0x02 +#define V_03093C_X_1K_DWORDS 0x03 +#define R_030940_VGT_TF_MEMORY_BASE 0x030940 +#define R_030A00_PA_SU_LINE_STIPPLE_VALUE 0x030A00 +#define S_030A00_LINE_STIPPLE_VALUE(x) (((unsigned)(x) & 0xFFFFFF) << 0) +#define G_030A00_LINE_STIPPLE_VALUE(x) (((x) >> 0) & 0xFFFFFF) +#define C_030A00_LINE_STIPPLE_VALUE 0xFF000000 +#define R_030A04_PA_SC_LINE_STIPPLE_STATE 0x030A04 +#define S_030A04_CURRENT_PTR(x) (((unsigned)(x) & 0x0F) << 0) +#define G_030A04_CURRENT_PTR(x) (((x) >> 0) & 0x0F) +#define C_030A04_CURRENT_PTR 0xFFFFFFF0 +#define S_030A04_CURRENT_COUNT(x) (((unsigned)(x) & 0xFF) << 8) +#define G_030A04_CURRENT_COUNT(x) (((x) >> 8) & 0xFF) +#define C_030A04_CURRENT_COUNT 0xFFFF00FF +#define R_030A10_PA_SC_SCREEN_EXTENT_MIN_0 0x030A10 +#define S_030A10_X(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_030A10_X(x) (((x) >> 0) & 0xFFFF) +#define C_030A10_X 0xFFFF0000 +#define S_030A10_Y(x) (((unsigned)(x) & 0xFFFF) << 16) +#define G_030A10_Y(x) (((x) >> 16) & 0xFFFF) +#define C_030A10_Y 0x0000FFFF +#define R_030A14_PA_SC_SCREEN_EXTENT_MAX_0 0x030A14 +#define S_030A14_X(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_030A14_X(x) (((x) >> 0) & 0xFFFF) +#define C_030A14_X 0xFFFF0000 +#define S_030A14_Y(x) (((unsigned)(x) & 0xFFFF) << 16) +#define G_030A14_Y(x) (((x) >> 16) & 0xFFFF) +#define C_030A14_Y 0x0000FFFF +#define R_030A18_PA_SC_SCREEN_EXTENT_MIN_1 0x030A18 +#define S_030A18_X(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_030A18_X(x) (((x) >> 0) & 0xFFFF) +#define C_030A18_X 0xFFFF0000 +#define S_030A18_Y(x) (((unsigned)(x) & 0xFFFF) << 16) +#define G_030A18_Y(x) (((x) >> 16) & 0xFFFF) +#define C_030A18_Y 0x0000FFFF +#define R_030A2C_PA_SC_SCREEN_EXTENT_MAX_1 0x030A2C +#define S_030A2C_X(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_030A2C_X(x) (((x) >> 0) & 0xFFFF) +#define C_030A2C_X 0xFFFF0000 +#define S_030A2C_Y(x) (((unsigned)(x) & 0xFFFF) << 16) +#define G_030A2C_Y(x) (((x) >> 16) & 0xFFFF) +#define C_030A2C_Y 0x0000FFFF +/* */ +#define R_008BF0_PA_SC_ENHANCE 0x008BF0 +#define S_008BF0_ENABLE_PA_SC_OUT_OF_ORDER(x) (((unsigned)(x) & 0x1) << 0) +#define G_008BF0_ENABLE_PA_SC_OUT_OF_ORDER(x) (((x) >> 0) & 0x1) +#define C_008BF0_ENABLE_PA_SC_OUT_OF_ORDER 0xFFFFFFFE +#define S_008BF0_DISABLE_SC_DB_TILE_FIX(x) (((unsigned)(x) & 0x1) << 1) +#define G_008BF0_DISABLE_SC_DB_TILE_FIX(x) (((x) >> 1) & 0x1) +#define C_008BF0_DISABLE_SC_DB_TILE_FIX 0xFFFFFFFD +#define S_008BF0_DISABLE_AA_MASK_FULL_FIX(x) (((unsigned)(x) & 0x1) << 2) +#define G_008BF0_DISABLE_AA_MASK_FULL_FIX(x) (((x) >> 2) & 0x1) +#define C_008BF0_DISABLE_AA_MASK_FULL_FIX 0xFFFFFFFB +#define S_008BF0_ENABLE_1XMSAA_SAMPLE_LOCATIONS(x) (((unsigned)(x) & 0x1) << 3) +#define G_008BF0_ENABLE_1XMSAA_SAMPLE_LOCATIONS(x) (((x) >> 3) & 0x1) +#define C_008BF0_ENABLE_1XMSAA_SAMPLE_LOCATIONS 0xFFFFFFF7 +#define S_008BF0_ENABLE_1XMSAA_SAMPLE_LOC_CENTROID(x) (((unsigned)(x) & 0x1) << 4) +#define G_008BF0_ENABLE_1XMSAA_SAMPLE_LOC_CENTROID(x) (((x) >> 4) & 0x1) +#define C_008BF0_ENABLE_1XMSAA_SAMPLE_LOC_CENTROID 0xFFFFFFEF +#define S_008BF0_DISABLE_SCISSOR_FIX(x) (((unsigned)(x) & 0x1) << 5) +#define G_008BF0_DISABLE_SCISSOR_FIX(x) (((x) >> 5) & 0x1) +#define C_008BF0_DISABLE_SCISSOR_FIX 0xFFFFFFDF +#define S_008BF0_DISABLE_PW_BUBBLE_COLLAPSE(x) (((unsigned)(x) & 0x03) << 6) +#define G_008BF0_DISABLE_PW_BUBBLE_COLLAPSE(x) (((x) >> 6) & 0x03) +#define C_008BF0_DISABLE_PW_BUBBLE_COLLAPSE 0xFFFFFF3F +#define S_008BF0_SEND_UNLIT_STILES_TO_PACKER(x) (((unsigned)(x) & 0x1) << 8) +#define G_008BF0_SEND_UNLIT_STILES_TO_PACKER(x) (((x) >> 8) & 0x1) +#define C_008BF0_SEND_UNLIT_STILES_TO_PACKER 0xFFFFFEFF +#define S_008BF0_DISABLE_DUALGRAD_PERF_OPTIMIZATION(x) (((unsigned)(x) & 0x1) << 9) +#define G_008BF0_DISABLE_DUALGRAD_PERF_OPTIMIZATION(x) (((x) >> 9) & 0x1) +#define C_008BF0_DISABLE_DUALGRAD_PERF_OPTIMIZATION 0xFFFFFDFF +#define R_008C08_SQC_CACHES 0x008C08 +#define S_008C08_INST_INVALIDATE(x) (((unsigned)(x) & 0x1) << 0) +#define G_008C08_INST_INVALIDATE(x) (((x) >> 0) & 0x1) +#define C_008C08_INST_INVALIDATE 0xFFFFFFFE +#define S_008C08_DATA_INVALIDATE(x) (((unsigned)(x) & 0x1) << 1) +#define G_008C08_DATA_INVALIDATE(x) (((x) >> 1) & 0x1) +#define C_008C08_DATA_INVALIDATE 0xFFFFFFFD +/* CIK */ +#define R_030D20_SQC_CACHES 0x030D20 +#define S_030D20_INST_INVALIDATE(x) (((unsigned)(x) & 0x1) << 0) +#define G_030D20_INST_INVALIDATE(x) (((x) >> 0) & 0x1) +#define C_030D20_INST_INVALIDATE 0xFFFFFFFE +#define S_030D20_DATA_INVALIDATE(x) (((unsigned)(x) & 0x1) << 1) +#define G_030D20_DATA_INVALIDATE(x) (((x) >> 1) & 0x1) +#define C_030D20_DATA_INVALIDATE 0xFFFFFFFD +#define S_030D20_INVALIDATE_VOLATILE(x) (((unsigned)(x) & 0x1) << 2) +#define G_030D20_INVALIDATE_VOLATILE(x) (((x) >> 2) & 0x1) +#define C_030D20_INVALIDATE_VOLATILE 0xFFFFFFFB +/* */ +#define R_008C0C_SQ_RANDOM_WAVE_PRI 0x008C0C +#define S_008C0C_RET(x) (((unsigned)(x) & 0x7F) << 0) +#define G_008C0C_RET(x) (((x) >> 0) & 0x7F) +#define C_008C0C_RET 0xFFFFFF80 +#define S_008C0C_RUI(x) (((unsigned)(x) & 0x07) << 7) +#define G_008C0C_RUI(x) (((x) >> 7) & 0x07) +#define C_008C0C_RUI 0xFFFFFC7F +#define S_008C0C_RNG(x) (((unsigned)(x) & 0x7FF) << 10) +#define G_008C0C_RNG(x) (((x) >> 10) & 0x7FF) +#define C_008C0C_RNG 0xFFE003FF +#define R_008DFC_SQ_EXP_0 0x008DFC +#define S_008DFC_EN(x) (((unsigned)(x) & 0x0F) << 0) +#define G_008DFC_EN(x) (((x) >> 0) & 0x0F) +#define C_008DFC_EN 0xFFFFFFF0 +#define S_008DFC_TGT(x) (((unsigned)(x) & 0x3F) << 4) +#define G_008DFC_TGT(x) (((x) >> 4) & 0x3F) +#define C_008DFC_TGT 0xFFFFFC0F +#define V_008DFC_SQ_EXP_MRT 0x00 +#define V_008DFC_SQ_EXP_MRTZ 0x08 +#define V_008DFC_SQ_EXP_NULL 0x09 +#define V_008DFC_SQ_EXP_POS 0x0C +#define V_008DFC_SQ_EXP_PARAM 0x20 +#define S_008DFC_COMPR(x) (((unsigned)(x) & 0x1) << 10) +#define G_008DFC_COMPR(x) (((x) >> 10) & 0x1) +#define C_008DFC_COMPR 0xFFFFFBFF +#define S_008DFC_DONE(x) (((unsigned)(x) & 0x1) << 11) +#define G_008DFC_DONE(x) (((x) >> 11) & 0x1) +#define C_008DFC_DONE 0xFFFFF7FF +#define S_008DFC_VM(x) (((unsigned)(x) & 0x1) << 12) +#define G_008DFC_VM(x) (((x) >> 12) & 0x1) +#define C_008DFC_VM 0xFFFFEFFF +#define S_008DFC_ENCODING(x) (((unsigned)(x) & 0x3F) << 26) +#define G_008DFC_ENCODING(x) (((x) >> 26) & 0x3F) +#define C_008DFC_ENCODING 0x03FFFFFF +#define V_008DFC_SQ_ENC_EXP_FIELD 0x3E +#define R_030E00_TA_CS_BC_BASE_ADDR 0x030E00 +#define R_030E04_TA_CS_BC_BASE_ADDR_HI 0x030E04 +#define S_030E04_ADDRESS(x) (((unsigned)(x) & 0xFF) << 0) +#define G_030E04_ADDRESS(x) (((x) >> 0) & 0xFF) +#define C_030E04_ADDRESS 0xFFFFFF00 +#define R_030F00_DB_OCCLUSION_COUNT0_LOW 0x030F00 +#define R_008F00_SQ_BUF_RSRC_WORD0 0x008F00 +#define R_030F04_DB_OCCLUSION_COUNT0_HI 0x030F04 +#define S_030F04_COUNT_HI(x) (((unsigned)(x) & 0x7FFFFFFF) << 0) +#define G_030F04_COUNT_HI(x) (((x) >> 0) & 0x7FFFFFFF) +#define C_030F04_COUNT_HI 0x80000000 +#define R_008F04_SQ_BUF_RSRC_WORD1 0x008F04 +#define S_008F04_BASE_ADDRESS_HI(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_008F04_BASE_ADDRESS_HI(x) (((x) >> 0) & 0xFFFF) +#define C_008F04_BASE_ADDRESS_HI 0xFFFF0000 +#define S_008F04_STRIDE(x) (((unsigned)(x) & 0x3FFF) << 16) +#define G_008F04_STRIDE(x) (((x) >> 16) & 0x3FFF) +#define C_008F04_STRIDE 0xC000FFFF +#define S_008F04_CACHE_SWIZZLE(x) (((unsigned)(x) & 0x1) << 30) +#define G_008F04_CACHE_SWIZZLE(x) (((x) >> 30) & 0x1) +#define C_008F04_CACHE_SWIZZLE 0xBFFFFFFF +#define S_008F04_SWIZZLE_ENABLE(x) (((unsigned)(x) & 0x1) << 31) +#define G_008F04_SWIZZLE_ENABLE(x) (((x) >> 31) & 0x1) +#define C_008F04_SWIZZLE_ENABLE 0x7FFFFFFF +#define R_030F08_DB_OCCLUSION_COUNT1_LOW 0x030F08 +#define R_008F08_SQ_BUF_RSRC_WORD2 0x008F08 +#define R_030F0C_DB_OCCLUSION_COUNT1_HI 0x030F0C +#define S_030F0C_COUNT_HI(x) (((unsigned)(x) & 0x7FFFFFFF) << 0) +#define G_030F0C_COUNT_HI(x) (((x) >> 0) & 0x7FFFFFFF) +#define C_030F0C_COUNT_HI 0x80000000 +#define R_008F0C_SQ_BUF_RSRC_WORD3 0x008F0C +#define S_008F0C_DST_SEL_X(x) (((unsigned)(x) & 0x07) << 0) +#define G_008F0C_DST_SEL_X(x) (((x) >> 0) & 0x07) +#define C_008F0C_DST_SEL_X 0xFFFFFFF8 +#define V_008F0C_SQ_SEL_0 0x00 +#define V_008F0C_SQ_SEL_1 0x01 +#define V_008F0C_SQ_SEL_RESERVED_0 0x02 +#define V_008F0C_SQ_SEL_RESERVED_1 0x03 +#define V_008F0C_SQ_SEL_X 0x04 +#define V_008F0C_SQ_SEL_Y 0x05 +#define V_008F0C_SQ_SEL_Z 0x06 +#define V_008F0C_SQ_SEL_W 0x07 +#define S_008F0C_DST_SEL_Y(x) (((unsigned)(x) & 0x07) << 3) +#define G_008F0C_DST_SEL_Y(x) (((x) >> 3) & 0x07) +#define C_008F0C_DST_SEL_Y 0xFFFFFFC7 +#define V_008F0C_SQ_SEL_0 0x00 +#define V_008F0C_SQ_SEL_1 0x01 +#define V_008F0C_SQ_SEL_RESERVED_0 0x02 +#define V_008F0C_SQ_SEL_RESERVED_1 0x03 +#define V_008F0C_SQ_SEL_X 0x04 +#define V_008F0C_SQ_SEL_Y 0x05 +#define V_008F0C_SQ_SEL_Z 0x06 +#define V_008F0C_SQ_SEL_W 0x07 +#define S_008F0C_DST_SEL_Z(x) (((unsigned)(x) & 0x07) << 6) +#define G_008F0C_DST_SEL_Z(x) (((x) >> 6) & 0x07) +#define C_008F0C_DST_SEL_Z 0xFFFFFE3F +#define V_008F0C_SQ_SEL_0 0x00 +#define V_008F0C_SQ_SEL_1 0x01 +#define V_008F0C_SQ_SEL_RESERVED_0 0x02 +#define V_008F0C_SQ_SEL_RESERVED_1 0x03 +#define V_008F0C_SQ_SEL_X 0x04 +#define V_008F0C_SQ_SEL_Y 0x05 +#define V_008F0C_SQ_SEL_Z 0x06 +#define V_008F0C_SQ_SEL_W 0x07 +#define S_008F0C_DST_SEL_W(x) (((unsigned)(x) & 0x07) << 9) +#define G_008F0C_DST_SEL_W(x) (((x) >> 9) & 0x07) +#define C_008F0C_DST_SEL_W 0xFFFFF1FF +#define V_008F0C_SQ_SEL_0 0x00 +#define V_008F0C_SQ_SEL_1 0x01 +#define V_008F0C_SQ_SEL_RESERVED_0 0x02 +#define V_008F0C_SQ_SEL_RESERVED_1 0x03 +#define V_008F0C_SQ_SEL_X 0x04 +#define V_008F0C_SQ_SEL_Y 0x05 +#define V_008F0C_SQ_SEL_Z 0x06 +#define V_008F0C_SQ_SEL_W 0x07 +#define S_008F0C_NUM_FORMAT(x) (((unsigned)(x) & 0x07) << 12) +#define G_008F0C_NUM_FORMAT(x) (((x) >> 12) & 0x07) +#define C_008F0C_NUM_FORMAT 0xFFFF8FFF +#define V_008F0C_BUF_NUM_FORMAT_UNORM 0x00 +#define V_008F0C_BUF_NUM_FORMAT_SNORM 0x01 +#define V_008F0C_BUF_NUM_FORMAT_USCALED 0x02 +#define V_008F0C_BUF_NUM_FORMAT_SSCALED 0x03 +#define V_008F0C_BUF_NUM_FORMAT_UINT 0x04 +#define V_008F0C_BUF_NUM_FORMAT_SINT 0x05 +#define V_008F0C_BUF_NUM_FORMAT_SNORM_OGL 0x06 +#define V_008F0C_BUF_NUM_FORMAT_FLOAT 0x07 +#define S_008F0C_DATA_FORMAT(x) (((unsigned)(x) & 0x0F) << 15) +#define G_008F0C_DATA_FORMAT(x) (((x) >> 15) & 0x0F) +#define C_008F0C_DATA_FORMAT 0xFFF87FFF +#define V_008F0C_BUF_DATA_FORMAT_INVALID 0x00 +#define V_008F0C_BUF_DATA_FORMAT_8 0x01 +#define V_008F0C_BUF_DATA_FORMAT_16 0x02 +#define V_008F0C_BUF_DATA_FORMAT_8_8 0x03 +#define V_008F0C_BUF_DATA_FORMAT_32 0x04 +#define V_008F0C_BUF_DATA_FORMAT_16_16 0x05 +#define V_008F0C_BUF_DATA_FORMAT_10_11_11 0x06 +#define V_008F0C_BUF_DATA_FORMAT_11_11_10 0x07 +#define V_008F0C_BUF_DATA_FORMAT_10_10_10_2 0x08 +#define V_008F0C_BUF_DATA_FORMAT_2_10_10_10 0x09 +#define V_008F0C_BUF_DATA_FORMAT_8_8_8_8 0x0A +#define V_008F0C_BUF_DATA_FORMAT_32_32 0x0B +#define V_008F0C_BUF_DATA_FORMAT_16_16_16_16 0x0C +#define V_008F0C_BUF_DATA_FORMAT_32_32_32 0x0D +#define V_008F0C_BUF_DATA_FORMAT_32_32_32_32 0x0E +#define V_008F0C_BUF_DATA_FORMAT_RESERVED_15 0x0F +#define S_008F0C_ELEMENT_SIZE(x) (((unsigned)(x) & 0x03) << 19) +#define G_008F0C_ELEMENT_SIZE(x) (((x) >> 19) & 0x03) +#define C_008F0C_ELEMENT_SIZE 0xFFE7FFFF +#define S_008F0C_INDEX_STRIDE(x) (((unsigned)(x) & 0x03) << 21) +#define G_008F0C_INDEX_STRIDE(x) (((x) >> 21) & 0x03) +#define C_008F0C_INDEX_STRIDE 0xFF9FFFFF +#define S_008F0C_ADD_TID_ENABLE(x) (((unsigned)(x) & 0x1) << 23) +#define G_008F0C_ADD_TID_ENABLE(x) (((x) >> 23) & 0x1) +#define C_008F0C_ADD_TID_ENABLE 0xFF7FFFFF +/* CIK */ +#define S_008F0C_ATC(x) (((unsigned)(x) & 0x1) << 24) +#define G_008F0C_ATC(x) (((x) >> 24) & 0x1) +#define C_008F0C_ATC 0xFEFFFFFF +/* */ +#define S_008F0C_HASH_ENABLE(x) (((unsigned)(x) & 0x1) << 25) +#define G_008F0C_HASH_ENABLE(x) (((x) >> 25) & 0x1) +#define C_008F0C_HASH_ENABLE 0xFDFFFFFF +#define S_008F0C_HEAP(x) (((unsigned)(x) & 0x1) << 26) +#define G_008F0C_HEAP(x) (((x) >> 26) & 0x1) +#define C_008F0C_HEAP 0xFBFFFFFF +/* CIK */ +#define S_008F0C_MTYPE(x) (((unsigned)(x) & 0x07) << 27) +#define G_008F0C_MTYPE(x) (((x) >> 27) & 0x07) +#define C_008F0C_MTYPE 0xC7FFFFFF +/* */ +#define S_008F0C_TYPE(x) (((unsigned)(x) & 0x03) << 30) +#define G_008F0C_TYPE(x) (((x) >> 30) & 0x03) +#define C_008F0C_TYPE 0x3FFFFFFF +#define V_008F0C_SQ_RSRC_BUF 0x00 +#define V_008F0C_SQ_RSRC_BUF_RSVD_1 0x01 +#define V_008F0C_SQ_RSRC_BUF_RSVD_2 0x02 +#define V_008F0C_SQ_RSRC_BUF_RSVD_3 0x03 +#define R_030F10_DB_OCCLUSION_COUNT2_LOW 0x030F10 +#define R_008F10_SQ_IMG_RSRC_WORD0 0x008F10 +#define R_030F14_DB_OCCLUSION_COUNT2_HI 0x030F14 +#define S_030F14_COUNT_HI(x) (((unsigned)(x) & 0x7FFFFFFF) << 0) +#define G_030F14_COUNT_HI(x) (((x) >> 0) & 0x7FFFFFFF) +#define C_030F14_COUNT_HI 0x80000000 +#define R_008F14_SQ_IMG_RSRC_WORD1 0x008F14 +#define S_008F14_BASE_ADDRESS_HI(x) (((unsigned)(x) & 0xFF) << 0) +#define G_008F14_BASE_ADDRESS_HI(x) (((x) >> 0) & 0xFF) +#define C_008F14_BASE_ADDRESS_HI 0xFFFFFF00 +#define S_008F14_MIN_LOD(x) (((unsigned)(x) & 0xFFF) << 8) +#define G_008F14_MIN_LOD(x) (((x) >> 8) & 0xFFF) +#define C_008F14_MIN_LOD 0xFFF000FF +#define S_008F14_DATA_FORMAT(x) (((unsigned)(x) & 0x3F) << 20) +#define G_008F14_DATA_FORMAT(x) (((x) >> 20) & 0x3F) +#define C_008F14_DATA_FORMAT 0xFC0FFFFF +#define V_008F14_IMG_DATA_FORMAT_INVALID 0x00 +#define V_008F14_IMG_DATA_FORMAT_8 0x01 +#define V_008F14_IMG_DATA_FORMAT_16 0x02 +#define V_008F14_IMG_DATA_FORMAT_8_8 0x03 +#define V_008F14_IMG_DATA_FORMAT_32 0x04 +#define V_008F14_IMG_DATA_FORMAT_16_16 0x05 +#define V_008F14_IMG_DATA_FORMAT_10_11_11 0x06 +#define V_008F14_IMG_DATA_FORMAT_11_11_10 0x07 +#define V_008F14_IMG_DATA_FORMAT_10_10_10_2 0x08 +#define V_008F14_IMG_DATA_FORMAT_2_10_10_10 0x09 +#define V_008F14_IMG_DATA_FORMAT_8_8_8_8 0x0A +#define V_008F14_IMG_DATA_FORMAT_32_32 0x0B +#define V_008F14_IMG_DATA_FORMAT_16_16_16_16 0x0C +#define V_008F14_IMG_DATA_FORMAT_32_32_32 0x0D +#define V_008F14_IMG_DATA_FORMAT_32_32_32_32 0x0E +#define V_008F14_IMG_DATA_FORMAT_RESERVED_15 0x0F +#define V_008F14_IMG_DATA_FORMAT_5_6_5 0x10 +#define V_008F14_IMG_DATA_FORMAT_1_5_5_5 0x11 +#define V_008F14_IMG_DATA_FORMAT_5_5_5_1 0x12 +#define V_008F14_IMG_DATA_FORMAT_4_4_4_4 0x13 +#define V_008F14_IMG_DATA_FORMAT_8_24 0x14 +#define V_008F14_IMG_DATA_FORMAT_24_8 0x15 +#define V_008F14_IMG_DATA_FORMAT_X24_8_32 0x16 +#define V_008F14_IMG_DATA_FORMAT_8_AS_8_8_8_8 0x17 /* stoney+ */ +#define V_008F14_IMG_DATA_FORMAT_ETC2_RGB 0x18 /* stoney+ */ +#define V_008F14_IMG_DATA_FORMAT_ETC2_RGBA 0x19 /* stoney+ */ +#define V_008F14_IMG_DATA_FORMAT_ETC2_R 0x1A /* stoney+ */ +#define V_008F14_IMG_DATA_FORMAT_ETC2_RG 0x1B /* stoney+ */ +#define V_008F14_IMG_DATA_FORMAT_ETC2_RGBA1 0x1C /* stoney+ */ +#define V_008F14_IMG_DATA_FORMAT_RESERVED_29 0x1D +#define V_008F14_IMG_DATA_FORMAT_RESERVED_30 0x1E +#define V_008F14_IMG_DATA_FORMAT_RESERVED_31 0x1F +#define V_008F14_IMG_DATA_FORMAT_GB_GR 0x20 +#define V_008F14_IMG_DATA_FORMAT_BG_RG 0x21 +#define V_008F14_IMG_DATA_FORMAT_5_9_9_9 0x22 +#define V_008F14_IMG_DATA_FORMAT_BC1 0x23 +#define V_008F14_IMG_DATA_FORMAT_BC2 0x24 +#define V_008F14_IMG_DATA_FORMAT_BC3 0x25 +#define V_008F14_IMG_DATA_FORMAT_BC4 0x26 +#define V_008F14_IMG_DATA_FORMAT_BC5 0x27 +#define V_008F14_IMG_DATA_FORMAT_BC6 0x28 +#define V_008F14_IMG_DATA_FORMAT_BC7 0x29 +#define V_008F14_IMG_DATA_FORMAT_16_AS_16_16_16_16 0x2A /* stoney+ */ +#define V_008F14_IMG_DATA_FORMAT_16_AS_32_32_32_32 0x2B /* stoney+ */ +#define V_008F14_IMG_DATA_FORMAT_FMASK8_S2_F1 0x2C +#define V_008F14_IMG_DATA_FORMAT_FMASK8_S4_F1 0x2D +#define V_008F14_IMG_DATA_FORMAT_FMASK8_S8_F1 0x2E +#define V_008F14_IMG_DATA_FORMAT_FMASK8_S2_F2 0x2F +#define V_008F14_IMG_DATA_FORMAT_FMASK8_S4_F2 0x30 +#define V_008F14_IMG_DATA_FORMAT_FMASK8_S4_F4 0x31 +#define V_008F14_IMG_DATA_FORMAT_FMASK16_S16_F1 0x32 +#define V_008F14_IMG_DATA_FORMAT_FMASK16_S8_F2 0x33 +#define V_008F14_IMG_DATA_FORMAT_FMASK32_S16_F2 0x34 +#define V_008F14_IMG_DATA_FORMAT_FMASK32_S8_F4 0x35 +#define V_008F14_IMG_DATA_FORMAT_FMASK32_S8_F8 0x36 +#define V_008F14_IMG_DATA_FORMAT_FMASK64_S16_F4 0x37 +#define V_008F14_IMG_DATA_FORMAT_FMASK64_S16_F8 0x38 +#define V_008F14_IMG_DATA_FORMAT_4_4 0x39 +#define V_008F14_IMG_DATA_FORMAT_6_5_5 0x3A +#define V_008F14_IMG_DATA_FORMAT_1 0x3B +#define V_008F14_IMG_DATA_FORMAT_1_REVERSED 0x3C +#define V_008F14_IMG_DATA_FORMAT_32_AS_8 0x3D /* not on stoney */ +#define V_008F14_IMG_DATA_FORMAT_32_AS_8_8 0x3E /* not on stoney */ +#define V_008F14_IMG_DATA_FORMAT_32_AS_32_32_32_32 0x3F +#define S_008F14_NUM_FORMAT(x) (((unsigned)(x) & 0x0F) << 26) +#define G_008F14_NUM_FORMAT(x) (((x) >> 26) & 0x0F) +#define C_008F14_NUM_FORMAT 0xC3FFFFFF +#define V_008F14_IMG_NUM_FORMAT_UNORM 0x00 +#define V_008F14_IMG_NUM_FORMAT_SNORM 0x01 +#define V_008F14_IMG_NUM_FORMAT_USCALED 0x02 +#define V_008F14_IMG_NUM_FORMAT_SSCALED 0x03 +#define V_008F14_IMG_NUM_FORMAT_UINT 0x04 +#define V_008F14_IMG_NUM_FORMAT_SINT 0x05 +#define V_008F14_IMG_NUM_FORMAT_SNORM_OGL 0x06 +#define V_008F14_IMG_NUM_FORMAT_FLOAT 0x07 +#define V_008F14_IMG_NUM_FORMAT_RESERVED_8 0x08 +#define V_008F14_IMG_NUM_FORMAT_SRGB 0x09 +#define V_008F14_IMG_NUM_FORMAT_UBNORM 0x0A +#define V_008F14_IMG_NUM_FORMAT_UBNORM_OGL 0x0B +#define V_008F14_IMG_NUM_FORMAT_UBINT 0x0C +#define V_008F14_IMG_NUM_FORMAT_UBSCALED 0x0D +#define V_008F14_IMG_NUM_FORMAT_RESERVED_14 0x0E +#define V_008F14_IMG_NUM_FORMAT_RESERVED_15 0x0F +/* CIK */ +#define S_008F14_MTYPE(x) (((unsigned)(x) & 0x03) << 30) +#define G_008F14_MTYPE(x) (((x) >> 30) & 0x03) +#define C_008F14_MTYPE 0x3FFFFFFF +/* */ +#define R_030F18_DB_OCCLUSION_COUNT3_LOW 0x030F18 +#define R_008F18_SQ_IMG_RSRC_WORD2 0x008F18 +#define S_008F18_WIDTH(x) (((unsigned)(x) & 0x3FFF) << 0) +#define G_008F18_WIDTH(x) (((x) >> 0) & 0x3FFF) +#define C_008F18_WIDTH 0xFFFFC000 +#define S_008F18_HEIGHT(x) (((unsigned)(x) & 0x3FFF) << 14) +#define G_008F18_HEIGHT(x) (((x) >> 14) & 0x3FFF) +#define C_008F18_HEIGHT 0xF0003FFF +#define S_008F18_PERF_MOD(x) (((unsigned)(x) & 0x07) << 28) +#define G_008F18_PERF_MOD(x) (((x) >> 28) & 0x07) +#define C_008F18_PERF_MOD 0x8FFFFFFF +#define S_008F18_INTERLACED(x) (((unsigned)(x) & 0x1) << 31) +#define G_008F18_INTERLACED(x) (((x) >> 31) & 0x1) +#define C_008F18_INTERLACED 0x7FFFFFFF +#define R_030F1C_DB_OCCLUSION_COUNT3_HI 0x030F1C +#define S_030F1C_COUNT_HI(x) (((unsigned)(x) & 0x7FFFFFFF) << 0) +#define G_030F1C_COUNT_HI(x) (((x) >> 0) & 0x7FFFFFFF) +#define C_030F1C_COUNT_HI 0x80000000 +#define R_008F1C_SQ_IMG_RSRC_WORD3 0x008F1C +#define S_008F1C_DST_SEL_X(x) (((unsigned)(x) & 0x07) << 0) +#define G_008F1C_DST_SEL_X(x) (((x) >> 0) & 0x07) +#define C_008F1C_DST_SEL_X 0xFFFFFFF8 +#define V_008F1C_SQ_SEL_0 0x00 +#define V_008F1C_SQ_SEL_1 0x01 +#define V_008F1C_SQ_SEL_RESERVED_0 0x02 +#define V_008F1C_SQ_SEL_RESERVED_1 0x03 +#define V_008F1C_SQ_SEL_X 0x04 +#define V_008F1C_SQ_SEL_Y 0x05 +#define V_008F1C_SQ_SEL_Z 0x06 +#define V_008F1C_SQ_SEL_W 0x07 +#define S_008F1C_DST_SEL_Y(x) (((unsigned)(x) & 0x07) << 3) +#define G_008F1C_DST_SEL_Y(x) (((x) >> 3) & 0x07) +#define C_008F1C_DST_SEL_Y 0xFFFFFFC7 +#define V_008F1C_SQ_SEL_0 0x00 +#define V_008F1C_SQ_SEL_1 0x01 +#define V_008F1C_SQ_SEL_RESERVED_0 0x02 +#define V_008F1C_SQ_SEL_RESERVED_1 0x03 +#define V_008F1C_SQ_SEL_X 0x04 +#define V_008F1C_SQ_SEL_Y 0x05 +#define V_008F1C_SQ_SEL_Z 0x06 +#define V_008F1C_SQ_SEL_W 0x07 +#define S_008F1C_DST_SEL_Z(x) (((unsigned)(x) & 0x07) << 6) +#define G_008F1C_DST_SEL_Z(x) (((x) >> 6) & 0x07) +#define C_008F1C_DST_SEL_Z 0xFFFFFE3F +#define V_008F1C_SQ_SEL_0 0x00 +#define V_008F1C_SQ_SEL_1 0x01 +#define V_008F1C_SQ_SEL_RESERVED_0 0x02 +#define V_008F1C_SQ_SEL_RESERVED_1 0x03 +#define V_008F1C_SQ_SEL_X 0x04 +#define V_008F1C_SQ_SEL_Y 0x05 +#define V_008F1C_SQ_SEL_Z 0x06 +#define V_008F1C_SQ_SEL_W 0x07 +#define S_008F1C_DST_SEL_W(x) (((unsigned)(x) & 0x07) << 9) +#define G_008F1C_DST_SEL_W(x) (((x) >> 9) & 0x07) +#define C_008F1C_DST_SEL_W 0xFFFFF1FF +#define V_008F1C_SQ_SEL_0 0x00 +#define V_008F1C_SQ_SEL_1 0x01 +#define V_008F1C_SQ_SEL_RESERVED_0 0x02 +#define V_008F1C_SQ_SEL_RESERVED_1 0x03 +#define V_008F1C_SQ_SEL_X 0x04 +#define V_008F1C_SQ_SEL_Y 0x05 +#define V_008F1C_SQ_SEL_Z 0x06 +#define V_008F1C_SQ_SEL_W 0x07 +#define S_008F1C_BASE_LEVEL(x) (((unsigned)(x) & 0x0F) << 12) +#define G_008F1C_BASE_LEVEL(x) (((x) >> 12) & 0x0F) +#define C_008F1C_BASE_LEVEL 0xFFFF0FFF +#define S_008F1C_LAST_LEVEL(x) (((unsigned)(x) & 0x0F) << 16) +#define G_008F1C_LAST_LEVEL(x) (((x) >> 16) & 0x0F) +#define C_008F1C_LAST_LEVEL 0xFFF0FFFF +#define S_008F1C_TILING_INDEX(x) (((unsigned)(x) & 0x1F) << 20) +#define G_008F1C_TILING_INDEX(x) (((x) >> 20) & 0x1F) +#define C_008F1C_TILING_INDEX 0xFE0FFFFF +#define S_008F1C_POW2_PAD(x) (((unsigned)(x) & 0x1) << 25) +#define G_008F1C_POW2_PAD(x) (((x) >> 25) & 0x1) +#define C_008F1C_POW2_PAD 0xFDFFFFFF +/* CIK */ +#define S_008F1C_MTYPE(x) (((unsigned)(x) & 0x1) << 26) +#define G_008F1C_MTYPE(x) (((x) >> 26) & 0x1) +#define C_008F1C_MTYPE 0xFBFFFFFF +#define S_008F1C_ATC(x) (((unsigned)(x) & 0x1) << 27) +#define G_008F1C_ATC(x) (((x) >> 27) & 0x1) +#define C_008F1C_ATC 0xF7FFFFFF +/* */ +#define S_008F1C_TYPE(x) (((unsigned)(x) & 0x0F) << 28) +#define G_008F1C_TYPE(x) (((x) >> 28) & 0x0F) +#define C_008F1C_TYPE 0x0FFFFFFF +#define V_008F1C_SQ_RSRC_IMG_RSVD_0 0x00 +#define V_008F1C_SQ_RSRC_IMG_RSVD_1 0x01 +#define V_008F1C_SQ_RSRC_IMG_RSVD_2 0x02 +#define V_008F1C_SQ_RSRC_IMG_RSVD_3 0x03 +#define V_008F1C_SQ_RSRC_IMG_RSVD_4 0x04 +#define V_008F1C_SQ_RSRC_IMG_RSVD_5 0x05 +#define V_008F1C_SQ_RSRC_IMG_RSVD_6 0x06 +#define V_008F1C_SQ_RSRC_IMG_RSVD_7 0x07 +#define V_008F1C_SQ_RSRC_IMG_1D 0x08 +#define V_008F1C_SQ_RSRC_IMG_2D 0x09 +#define V_008F1C_SQ_RSRC_IMG_3D 0x0A +#define V_008F1C_SQ_RSRC_IMG_CUBE 0x0B +#define V_008F1C_SQ_RSRC_IMG_1D_ARRAY 0x0C +#define V_008F1C_SQ_RSRC_IMG_2D_ARRAY 0x0D +#define V_008F1C_SQ_RSRC_IMG_2D_MSAA 0x0E +#define V_008F1C_SQ_RSRC_IMG_2D_MSAA_ARRAY 0x0F +#define R_008F20_SQ_IMG_RSRC_WORD4 0x008F20 +#define S_008F20_DEPTH(x) (((unsigned)(x) & 0x1FFF) << 0) +#define G_008F20_DEPTH(x) (((x) >> 0) & 0x1FFF) +#define C_008F20_DEPTH 0xFFFFE000 +#define S_008F20_PITCH(x) (((unsigned)(x) & 0x3FFF) << 13) +#define G_008F20_PITCH(x) (((x) >> 13) & 0x3FFF) +#define C_008F20_PITCH 0xF8001FFF +#define R_008F24_SQ_IMG_RSRC_WORD5 0x008F24 +#define S_008F24_BASE_ARRAY(x) (((unsigned)(x) & 0x1FFF) << 0) +#define G_008F24_BASE_ARRAY(x) (((x) >> 0) & 0x1FFF) +#define C_008F24_BASE_ARRAY 0xFFFFE000 +#define S_008F24_LAST_ARRAY(x) (((unsigned)(x) & 0x1FFF) << 13) +#define G_008F24_LAST_ARRAY(x) (((x) >> 13) & 0x1FFF) +#define C_008F24_LAST_ARRAY 0xFC001FFF +#define R_008F28_SQ_IMG_RSRC_WORD6 0x008F28 +#define S_008F28_MIN_LOD_WARN(x) (((unsigned)(x) & 0xFFF) << 0) +#define G_008F28_MIN_LOD_WARN(x) (((x) >> 0) & 0xFFF) +#define C_008F28_MIN_LOD_WARN 0xFFFFF000 +/* CIK */ +#define S_008F28_COUNTER_BANK_ID(x) (((unsigned)(x) & 0xFF) << 12) +#define G_008F28_COUNTER_BANK_ID(x) (((x) >> 12) & 0xFF) +#define C_008F28_COUNTER_BANK_ID 0xFFF00FFF +#define S_008F28_LOD_HDW_CNT_EN(x) (((unsigned)(x) & 0x1) << 20) +#define G_008F28_LOD_HDW_CNT_EN(x) (((x) >> 20) & 0x1) +#define C_008F28_LOD_HDW_CNT_EN 0xFFEFFFFF +/* */ +/* VI */ +#define S_008F28_COMPRESSION_EN(x) (((unsigned)(x) & 0x1) << 21) +#define G_008F28_COMPRESSION_EN(x) (((x) >> 21) & 0x1) +#define C_008F28_COMPRESSION_EN 0xFFDFFFFF +#define S_008F28_ALPHA_IS_ON_MSB(x) (((unsigned)(x) & 0x1) << 22) +#define G_008F28_ALPHA_IS_ON_MSB(x) (((x) >> 22) & 0x1) +#define C_008F28_ALPHA_IS_ON_MSB 0xFFBFFFFF +#define S_008F28_COLOR_TRANSFORM(x) (((unsigned)(x) & 0x1) << 23) +#define G_008F28_COLOR_TRANSFORM(x) (((x) >> 23) & 0x1) +#define C_008F28_COLOR_TRANSFORM 0xFF7FFFFF +#define S_008F28_LOST_ALPHA_BITS(x) (((unsigned)(x) & 0x0F) << 24) +#define G_008F28_LOST_ALPHA_BITS(x) (((x) >> 24) & 0x0F) +#define C_008F28_LOST_ALPHA_BITS 0xF0FFFFFF +#define S_008F28_LOST_COLOR_BITS(x) (((unsigned)(x) & 0x0F) << 28) +#define G_008F28_LOST_COLOR_BITS(x) (((x) >> 28) & 0x0F) +#define C_008F28_LOST_COLOR_BITS 0x0FFFFFFF +/* */ +#define R_008F2C_SQ_IMG_RSRC_WORD7 0x008F2C +#define R_008F30_SQ_IMG_SAMP_WORD0 0x008F30 +#define S_008F30_CLAMP_X(x) (((unsigned)(x) & 0x07) << 0) +#define G_008F30_CLAMP_X(x) (((x) >> 0) & 0x07) +#define C_008F30_CLAMP_X 0xFFFFFFF8 +#define V_008F30_SQ_TEX_WRAP 0x00 +#define V_008F30_SQ_TEX_MIRROR 0x01 +#define V_008F30_SQ_TEX_CLAMP_LAST_TEXEL 0x02 +#define V_008F30_SQ_TEX_MIRROR_ONCE_LAST_TEXEL 0x03 +#define V_008F30_SQ_TEX_CLAMP_HALF_BORDER 0x04 +#define V_008F30_SQ_TEX_MIRROR_ONCE_HALF_BORDER 0x05 +#define V_008F30_SQ_TEX_CLAMP_BORDER 0x06 +#define V_008F30_SQ_TEX_MIRROR_ONCE_BORDER 0x07 +#define S_008F30_CLAMP_Y(x) (((unsigned)(x) & 0x07) << 3) +#define G_008F30_CLAMP_Y(x) (((x) >> 3) & 0x07) +#define C_008F30_CLAMP_Y 0xFFFFFFC7 +#define V_008F30_SQ_TEX_WRAP 0x00 +#define V_008F30_SQ_TEX_MIRROR 0x01 +#define V_008F30_SQ_TEX_CLAMP_LAST_TEXEL 0x02 +#define V_008F30_SQ_TEX_MIRROR_ONCE_LAST_TEXEL 0x03 +#define V_008F30_SQ_TEX_CLAMP_HALF_BORDER 0x04 +#define V_008F30_SQ_TEX_MIRROR_ONCE_HALF_BORDER 0x05 +#define V_008F30_SQ_TEX_CLAMP_BORDER 0x06 +#define V_008F30_SQ_TEX_MIRROR_ONCE_BORDER 0x07 +#define S_008F30_CLAMP_Z(x) (((unsigned)(x) & 0x07) << 6) +#define G_008F30_CLAMP_Z(x) (((x) >> 6) & 0x07) +#define C_008F30_CLAMP_Z 0xFFFFFE3F +#define V_008F30_SQ_TEX_WRAP 0x00 +#define V_008F30_SQ_TEX_MIRROR 0x01 +#define V_008F30_SQ_TEX_CLAMP_LAST_TEXEL 0x02 +#define V_008F30_SQ_TEX_MIRROR_ONCE_LAST_TEXEL 0x03 +#define V_008F30_SQ_TEX_CLAMP_HALF_BORDER 0x04 +#define V_008F30_SQ_TEX_MIRROR_ONCE_HALF_BORDER 0x05 +#define V_008F30_SQ_TEX_CLAMP_BORDER 0x06 +#define V_008F30_SQ_TEX_MIRROR_ONCE_BORDER 0x07 +#define S_008F30_MAX_ANISO_RATIO(x) (((unsigned)(x) & 0x07) << 9) +#define G_008F30_MAX_ANISO_RATIO(x) (((x) >> 9) & 0x07) +#define C_008F30_MAX_ANISO_RATIO 0xFFFFF1FF +#define S_008F30_DEPTH_COMPARE_FUNC(x) (((unsigned)(x) & 0x07) << 12) +#define G_008F30_DEPTH_COMPARE_FUNC(x) (((x) >> 12) & 0x07) +#define C_008F30_DEPTH_COMPARE_FUNC 0xFFFF8FFF +#define V_008F30_SQ_TEX_DEPTH_COMPARE_NEVER 0x00 +#define V_008F30_SQ_TEX_DEPTH_COMPARE_LESS 0x01 +#define V_008F30_SQ_TEX_DEPTH_COMPARE_EQUAL 0x02 +#define V_008F30_SQ_TEX_DEPTH_COMPARE_LESSEQUAL 0x03 +#define V_008F30_SQ_TEX_DEPTH_COMPARE_GREATER 0x04 +#define V_008F30_SQ_TEX_DEPTH_COMPARE_NOTEQUAL 0x05 +#define V_008F30_SQ_TEX_DEPTH_COMPARE_GREATEREQUAL 0x06 +#define V_008F30_SQ_TEX_DEPTH_COMPARE_ALWAYS 0x07 +#define S_008F30_FORCE_UNNORMALIZED(x) (((unsigned)(x) & 0x1) << 15) +#define G_008F30_FORCE_UNNORMALIZED(x) (((x) >> 15) & 0x1) +#define C_008F30_FORCE_UNNORMALIZED 0xFFFF7FFF +#define S_008F30_ANISO_THRESHOLD(x) (((unsigned)(x) & 0x07) << 16) +#define G_008F30_ANISO_THRESHOLD(x) (((x) >> 16) & 0x07) +#define C_008F30_ANISO_THRESHOLD 0xFFF8FFFF +#define S_008F30_MC_COORD_TRUNC(x) (((unsigned)(x) & 0x1) << 19) +#define G_008F30_MC_COORD_TRUNC(x) (((x) >> 19) & 0x1) +#define C_008F30_MC_COORD_TRUNC 0xFFF7FFFF +#define S_008F30_FORCE_DEGAMMA(x) (((unsigned)(x) & 0x1) << 20) +#define G_008F30_FORCE_DEGAMMA(x) (((x) >> 20) & 0x1) +#define C_008F30_FORCE_DEGAMMA 0xFFEFFFFF +#define S_008F30_ANISO_BIAS(x) (((unsigned)(x) & 0x3F) << 21) +#define G_008F30_ANISO_BIAS(x) (((x) >> 21) & 0x3F) +#define C_008F30_ANISO_BIAS 0xF81FFFFF +#define S_008F30_TRUNC_COORD(x) (((unsigned)(x) & 0x1) << 27) +#define G_008F30_TRUNC_COORD(x) (((x) >> 27) & 0x1) +#define C_008F30_TRUNC_COORD 0xF7FFFFFF +#define S_008F30_DISABLE_CUBE_WRAP(x) (((unsigned)(x) & 0x1) << 28) +#define G_008F30_DISABLE_CUBE_WRAP(x) (((x) >> 28) & 0x1) +#define C_008F30_DISABLE_CUBE_WRAP 0xEFFFFFFF +#define S_008F30_FILTER_MODE(x) (((unsigned)(x) & 0x03) << 29) +#define G_008F30_FILTER_MODE(x) (((x) >> 29) & 0x03) +#define C_008F30_FILTER_MODE 0x9FFFFFFF +/* VI */ +#define S_008F30_COMPAT_MODE(x) (((unsigned)(x) & 0x1) << 31) +#define G_008F30_COMPAT_MODE(x) (((x) >> 31) & 0x1) +#define C_008F30_COMPAT_MODE 0x7FFFFFFF +/* */ +#define R_008F34_SQ_IMG_SAMP_WORD1 0x008F34 +#define S_008F34_MIN_LOD(x) (((unsigned)(x) & 0xFFF) << 0) +#define G_008F34_MIN_LOD(x) (((x) >> 0) & 0xFFF) +#define C_008F34_MIN_LOD 0xFFFFF000 +#define S_008F34_MAX_LOD(x) (((unsigned)(x) & 0xFFF) << 12) +#define G_008F34_MAX_LOD(x) (((x) >> 12) & 0xFFF) +#define C_008F34_MAX_LOD 0xFF000FFF +#define S_008F34_PERF_MIP(x) (((unsigned)(x) & 0x0F) << 24) +#define G_008F34_PERF_MIP(x) (((x) >> 24) & 0x0F) +#define C_008F34_PERF_MIP 0xF0FFFFFF +#define S_008F34_PERF_Z(x) (((unsigned)(x) & 0x0F) << 28) +#define G_008F34_PERF_Z(x) (((x) >> 28) & 0x0F) +#define C_008F34_PERF_Z 0x0FFFFFFF +#define R_008F38_SQ_IMG_SAMP_WORD2 0x008F38 +#define S_008F38_LOD_BIAS(x) (((unsigned)(x) & 0x3FFF) << 0) +#define G_008F38_LOD_BIAS(x) (((x) >> 0) & 0x3FFF) +#define C_008F38_LOD_BIAS 0xFFFFC000 +#define S_008F38_LOD_BIAS_SEC(x) (((unsigned)(x) & 0x3F) << 14) +#define G_008F38_LOD_BIAS_SEC(x) (((x) >> 14) & 0x3F) +#define C_008F38_LOD_BIAS_SEC 0xFFF03FFF +#define S_008F38_XY_MAG_FILTER(x) (((unsigned)(x) & 0x03) << 20) +#define G_008F38_XY_MAG_FILTER(x) (((x) >> 20) & 0x03) +#define C_008F38_XY_MAG_FILTER 0xFFCFFFFF +#define V_008F38_SQ_TEX_XY_FILTER_POINT 0x00 +#define V_008F38_SQ_TEX_XY_FILTER_BILINEAR 0x01 +#define S_008F38_XY_MIN_FILTER(x) (((unsigned)(x) & 0x03) << 22) +#define G_008F38_XY_MIN_FILTER(x) (((x) >> 22) & 0x03) +#define C_008F38_XY_MIN_FILTER 0xFF3FFFFF +#define V_008F38_SQ_TEX_XY_FILTER_POINT 0x00 +#define V_008F38_SQ_TEX_XY_FILTER_BILINEAR 0x01 +#define V_008F38_SQ_TEX_XY_FILTER_ANISO_POINT 0x02 +#define V_008F38_SQ_TEX_XY_FILTER_ANISO_BILINEAR 0x03 +#define S_008F38_Z_FILTER(x) (((unsigned)(x) & 0x03) << 24) +#define G_008F38_Z_FILTER(x) (((x) >> 24) & 0x03) +#define C_008F38_Z_FILTER 0xFCFFFFFF +#define V_008F38_SQ_TEX_Z_FILTER_NONE 0x00 +#define V_008F38_SQ_TEX_Z_FILTER_POINT 0x01 +#define V_008F38_SQ_TEX_Z_FILTER_LINEAR 0x02 +#define S_008F38_MIP_FILTER(x) (((unsigned)(x) & 0x03) << 26) +#define G_008F38_MIP_FILTER(x) (((x) >> 26) & 0x03) +#define C_008F38_MIP_FILTER 0xF3FFFFFF +#define V_008F38_SQ_TEX_Z_FILTER_NONE 0x00 +#define V_008F38_SQ_TEX_Z_FILTER_POINT 0x01 +#define V_008F38_SQ_TEX_Z_FILTER_LINEAR 0x02 +#define S_008F38_MIP_POINT_PRECLAMP(x) (((unsigned)(x) & 0x1) << 28) +#define G_008F38_MIP_POINT_PRECLAMP(x) (((x) >> 28) & 0x1) +#define C_008F38_MIP_POINT_PRECLAMP 0xEFFFFFFF +#define S_008F38_DISABLE_LSB_CEIL(x) (((unsigned)(x) & 0x1) << 29) +#define G_008F38_DISABLE_LSB_CEIL(x) (((x) >> 29) & 0x1) +#define C_008F38_DISABLE_LSB_CEIL 0xDFFFFFFF +#define S_008F38_FILTER_PREC_FIX(x) (((unsigned)(x) & 0x1) << 30) +#define G_008F38_FILTER_PREC_FIX(x) (((x) >> 30) & 0x1) +#define C_008F38_FILTER_PREC_FIX 0xBFFFFFFF +#define S_008F38_ANISO_OVERRIDE(x) (((unsigned)(x) & 0x1) << 31) +#define G_008F38_ANISO_OVERRIDE(x) (((x) >> 31) & 0x1) +#define C_008F38_ANISO_OVERRIDE 0x7FFFFFFF +#define R_008F3C_SQ_IMG_SAMP_WORD3 0x008F3C +#define S_008F3C_BORDER_COLOR_PTR(x) (((unsigned)(x) & 0xFFF) << 0) +#define G_008F3C_BORDER_COLOR_PTR(x) (((x) >> 0) & 0xFFF) +#define C_008F3C_BORDER_COLOR_PTR 0xFFFFF000 +#define S_008F3C_BORDER_COLOR_TYPE(x) (((unsigned)(x) & 0x03) << 30) +#define G_008F3C_BORDER_COLOR_TYPE(x) (((x) >> 30) & 0x03) +#define C_008F3C_BORDER_COLOR_TYPE 0x3FFFFFFF +#define V_008F3C_SQ_TEX_BORDER_COLOR_TRANS_BLACK 0x00 +#define V_008F3C_SQ_TEX_BORDER_COLOR_OPAQUE_BLACK 0x01 +#define V_008F3C_SQ_TEX_BORDER_COLOR_OPAQUE_WHITE 0x02 +#define V_008F3C_SQ_TEX_BORDER_COLOR_REGISTER 0x03 +#define R_0090DC_SPI_DYN_GPR_LOCK_EN 0x0090DC /* not on CIK */ +#define S_0090DC_VS_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 0) +#define G_0090DC_VS_LOW_THRESHOLD(x) (((x) >> 0) & 0x0F) +#define C_0090DC_VS_LOW_THRESHOLD 0xFFFFFFF0 +#define S_0090DC_GS_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 4) +#define G_0090DC_GS_LOW_THRESHOLD(x) (((x) >> 4) & 0x0F) +#define C_0090DC_GS_LOW_THRESHOLD 0xFFFFFF0F +#define S_0090DC_ES_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 8) +#define G_0090DC_ES_LOW_THRESHOLD(x) (((x) >> 8) & 0x0F) +#define C_0090DC_ES_LOW_THRESHOLD 0xFFFFF0FF +#define S_0090DC_HS_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 12) +#define G_0090DC_HS_LOW_THRESHOLD(x) (((x) >> 12) & 0x0F) +#define C_0090DC_HS_LOW_THRESHOLD 0xFFFF0FFF +#define S_0090DC_LS_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 16) +#define G_0090DC_LS_LOW_THRESHOLD(x) (((x) >> 16) & 0x0F) +#define C_0090DC_LS_LOW_THRESHOLD 0xFFF0FFFF +#define R_0090E0_SPI_STATIC_THREAD_MGMT_1 0x0090E0 /* not on CIK */ +#define S_0090E0_PS_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_0090E0_PS_CU_EN(x) (((x) >> 0) & 0xFFFF) +#define C_0090E0_PS_CU_EN 0xFFFF0000 +#define S_0090E0_VS_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 16) +#define G_0090E0_VS_CU_EN(x) (((x) >> 16) & 0xFFFF) +#define C_0090E0_VS_CU_EN 0x0000FFFF +#define R_0090E4_SPI_STATIC_THREAD_MGMT_2 0x0090E4 /* not on CIK */ +#define S_0090E4_GS_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_0090E4_GS_CU_EN(x) (((x) >> 0) & 0xFFFF) +#define C_0090E4_GS_CU_EN 0xFFFF0000 +#define S_0090E4_ES_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 16) +#define G_0090E4_ES_CU_EN(x) (((x) >> 16) & 0xFFFF) +#define C_0090E4_ES_CU_EN 0x0000FFFF +#define R_0090E8_SPI_STATIC_THREAD_MGMT_3 0x0090E8 /* not on CIK */ +#define S_0090E8_LSHS_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_0090E8_LSHS_CU_EN(x) (((x) >> 0) & 0xFFFF) +#define C_0090E8_LSHS_CU_EN 0xFFFF0000 +#define R_0090EC_SPI_PS_MAX_WAVE_ID 0x0090EC +#define S_0090EC_MAX_WAVE_ID(x) (((unsigned)(x) & 0xFFF) << 0) +#define G_0090EC_MAX_WAVE_ID(x) (((x) >> 0) & 0xFFF) +#define C_0090EC_MAX_WAVE_ID 0xFFFFF000 +/* CIK */ +#define R_0090E8_SPI_PS_MAX_WAVE_ID 0x0090E8 +#define S_0090E8_MAX_WAVE_ID(x) (((unsigned)(x) & 0xFFF) << 0) +#define G_0090E8_MAX_WAVE_ID(x) (((x) >> 0) & 0xFFF) +#define C_0090E8_MAX_WAVE_ID 0xFFFFF000 +/* */ +#define R_0090F0_SPI_ARB_PRIORITY 0x0090F0 +#define S_0090F0_RING_ORDER_TS0(x) (((unsigned)(x) & 0x07) << 0) +#define G_0090F0_RING_ORDER_TS0(x) (((x) >> 0) & 0x07) +#define C_0090F0_RING_ORDER_TS0 0xFFFFFFF8 +#define V_0090F0_X_R0 0x00 +#define S_0090F0_RING_ORDER_TS1(x) (((unsigned)(x) & 0x07) << 3) +#define G_0090F0_RING_ORDER_TS1(x) (((x) >> 3) & 0x07) +#define C_0090F0_RING_ORDER_TS1 0xFFFFFFC7 +#define S_0090F0_RING_ORDER_TS2(x) (((unsigned)(x) & 0x07) << 6) +#define G_0090F0_RING_ORDER_TS2(x) (((x) >> 6) & 0x07) +#define C_0090F0_RING_ORDER_TS2 0xFFFFFE3F +/* CIK */ +#define R_00C700_SPI_ARB_PRIORITY 0x00C700 +#define S_00C700_PIPE_ORDER_TS0(x) (((unsigned)(x) & 0x07) << 0) +#define G_00C700_PIPE_ORDER_TS0(x) (((x) >> 0) & 0x07) +#define C_00C700_PIPE_ORDER_TS0 0xFFFFFFF8 +#define S_00C700_PIPE_ORDER_TS1(x) (((unsigned)(x) & 0x07) << 3) +#define G_00C700_PIPE_ORDER_TS1(x) (((x) >> 3) & 0x07) +#define C_00C700_PIPE_ORDER_TS1 0xFFFFFFC7 +#define S_00C700_PIPE_ORDER_TS2(x) (((unsigned)(x) & 0x07) << 6) +#define G_00C700_PIPE_ORDER_TS2(x) (((x) >> 6) & 0x07) +#define C_00C700_PIPE_ORDER_TS2 0xFFFFFE3F +#define S_00C700_PIPE_ORDER_TS3(x) (((unsigned)(x) & 0x07) << 9) +#define G_00C700_PIPE_ORDER_TS3(x) (((x) >> 9) & 0x07) +#define C_00C700_PIPE_ORDER_TS3 0xFFFFF1FF +#define S_00C700_TS0_DUR_MULT(x) (((unsigned)(x) & 0x03) << 12) +#define G_00C700_TS0_DUR_MULT(x) (((x) >> 12) & 0x03) +#define C_00C700_TS0_DUR_MULT 0xFFFFCFFF +#define S_00C700_TS1_DUR_MULT(x) (((unsigned)(x) & 0x03) << 14) +#define G_00C700_TS1_DUR_MULT(x) (((x) >> 14) & 0x03) +#define C_00C700_TS1_DUR_MULT 0xFFFF3FFF +#define S_00C700_TS2_DUR_MULT(x) (((unsigned)(x) & 0x03) << 16) +#define G_00C700_TS2_DUR_MULT(x) (((x) >> 16) & 0x03) +#define C_00C700_TS2_DUR_MULT 0xFFFCFFFF +#define S_00C700_TS3_DUR_MULT(x) (((unsigned)(x) & 0x03) << 18) +#define G_00C700_TS3_DUR_MULT(x) (((x) >> 18) & 0x03) +#define C_00C700_TS3_DUR_MULT 0xFFF3FFFF +/* */ +#define R_0090F4_SPI_ARB_CYCLES_0 0x0090F4 /* moved to 0xC704 on CIK */ +#define S_0090F4_TS0_DURATION(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_0090F4_TS0_DURATION(x) (((x) >> 0) & 0xFFFF) +#define C_0090F4_TS0_DURATION 0xFFFF0000 +#define S_0090F4_TS1_DURATION(x) (((unsigned)(x) & 0xFFFF) << 16) +#define G_0090F4_TS1_DURATION(x) (((x) >> 16) & 0xFFFF) +#define C_0090F4_TS1_DURATION 0x0000FFFF +#define R_0090F8_SPI_ARB_CYCLES_1 0x0090F8 /* moved to 0xC708 on CIK */ +#define S_0090F8_TS2_DURATION(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_0090F8_TS2_DURATION(x) (((x) >> 0) & 0xFFFF) +#define C_0090F8_TS2_DURATION 0xFFFF0000 +/* CIK */ +#define R_008F40_SQ_FLAT_SCRATCH_WORD0 0x008F40 +#define S_008F40_SIZE(x) (((unsigned)(x) & 0x7FFFF) << 0) +#define G_008F40_SIZE(x) (((x) >> 0) & 0x7FFFF) +#define C_008F40_SIZE 0xFFF80000 +#define R_008F44_SQ_FLAT_SCRATCH_WORD1 0x008F44 +#define S_008F44_OFFSET(x) (((unsigned)(x) & 0xFFFFFF) << 0) +#define G_008F44_OFFSET(x) (((x) >> 0) & 0xFFFFFF) +#define C_008F44_OFFSET 0xFF000000 +/* */ +#define R_030FF8_DB_ZPASS_COUNT_LOW 0x030FF8 +#define R_030FFC_DB_ZPASS_COUNT_HI 0x030FFC +#define S_030FFC_COUNT_HI(x) (((unsigned)(x) & 0x7FFFFFFF) << 0) +#define G_030FFC_COUNT_HI(x) (((x) >> 0) & 0x7FFFFFFF) +#define C_030FFC_COUNT_HI 0x80000000 +#define R_009100_SPI_CONFIG_CNTL 0x009100 +#define S_009100_GPR_WRITE_PRIORITY(x) (((unsigned)(x) & 0x1FFFFF) << 0) +#define G_009100_GPR_WRITE_PRIORITY(x) (((x) >> 0) & 0x1FFFFF) +#define C_009100_GPR_WRITE_PRIORITY 0xFFE00000 +#define S_009100_EXP_PRIORITY_ORDER(x) (((unsigned)(x) & 0x07) << 21) +#define G_009100_EXP_PRIORITY_ORDER(x) (((x) >> 21) & 0x07) +#define C_009100_EXP_PRIORITY_ORDER 0xFF1FFFFF +#define S_009100_ENABLE_SQG_TOP_EVENTS(x) (((unsigned)(x) & 0x1) << 24) +#define G_009100_ENABLE_SQG_TOP_EVENTS(x) (((x) >> 24) & 0x1) +#define C_009100_ENABLE_SQG_TOP_EVENTS 0xFEFFFFFF +#define S_009100_ENABLE_SQG_BOP_EVENTS(x) (((unsigned)(x) & 0x1) << 25) +#define G_009100_ENABLE_SQG_BOP_EVENTS(x) (((x) >> 25) & 0x1) +#define C_009100_ENABLE_SQG_BOP_EVENTS 0xFDFFFFFF +#define S_009100_RSRC_MGMT_RESET(x) (((unsigned)(x) & 0x1) << 26) +#define G_009100_RSRC_MGMT_RESET(x) (((x) >> 26) & 0x1) +#define C_009100_RSRC_MGMT_RESET 0xFBFFFFFF +#define R_00913C_SPI_CONFIG_CNTL_1 0x00913C +#define S_00913C_VTX_DONE_DELAY(x) (((unsigned)(x) & 0x0F) << 0) +#define G_00913C_VTX_DONE_DELAY(x) (((x) >> 0) & 0x0F) +#define C_00913C_VTX_DONE_DELAY 0xFFFFFFF0 +#define V_00913C_X_DELAY_14_CLKS 0x00 +#define V_00913C_X_DELAY_16_CLKS 0x01 +#define V_00913C_X_DELAY_18_CLKS 0x02 +#define V_00913C_X_DELAY_20_CLKS 0x03 +#define V_00913C_X_DELAY_22_CLKS 0x04 +#define V_00913C_X_DELAY_24_CLKS 0x05 +#define V_00913C_X_DELAY_26_CLKS 0x06 +#define V_00913C_X_DELAY_28_CLKS 0x07 +#define V_00913C_X_DELAY_30_CLKS 0x08 +#define V_00913C_X_DELAY_32_CLKS 0x09 +#define V_00913C_X_DELAY_34_CLKS 0x0A +#define V_00913C_X_DELAY_4_CLKS 0x0B +#define V_00913C_X_DELAY_6_CLKS 0x0C +#define V_00913C_X_DELAY_8_CLKS 0x0D +#define V_00913C_X_DELAY_10_CLKS 0x0E +#define V_00913C_X_DELAY_12_CLKS 0x0F +#define S_00913C_INTERP_ONE_PRIM_PER_ROW(x) (((unsigned)(x) & 0x1) << 4) +#define G_00913C_INTERP_ONE_PRIM_PER_ROW(x) (((x) >> 4) & 0x1) +#define C_00913C_INTERP_ONE_PRIM_PER_ROW 0xFFFFFFEF +#define S_00913C_PC_LIMIT_ENABLE(x) (((unsigned)(x) & 0x1) << 6) +#define G_00913C_PC_LIMIT_ENABLE(x) (((x) >> 6) & 0x1) +#define C_00913C_PC_LIMIT_ENABLE 0xFFFFFFBF +#define S_00913C_PC_LIMIT_STRICT(x) (((unsigned)(x) & 0x1) << 7) +#define G_00913C_PC_LIMIT_STRICT(x) (((x) >> 7) & 0x1) +#define C_00913C_PC_LIMIT_STRICT 0xFFFFFF7F +#define S_00913C_PC_LIMIT_SIZE(x) (((unsigned)(x) & 0xFFFF) << 16) +#define G_00913C_PC_LIMIT_SIZE(x) (((x) >> 16) & 0xFFFF) +#define C_00913C_PC_LIMIT_SIZE 0x0000FFFF +#define R_00936C_SPI_RESOURCE_RESERVE_CU_AB_0 0x00936C +#define S_00936C_TYPE_A(x) (((unsigned)(x) & 0x0F) << 0) +#define G_00936C_TYPE_A(x) (((x) >> 0) & 0x0F) +#define C_00936C_TYPE_A 0xFFFFFFF0 +#define S_00936C_VGPR_A(x) (((unsigned)(x) & 0x07) << 4) +#define G_00936C_VGPR_A(x) (((x) >> 4) & 0x07) +#define C_00936C_VGPR_A 0xFFFFFF8F +#define S_00936C_SGPR_A(x) (((unsigned)(x) & 0x07) << 7) +#define G_00936C_SGPR_A(x) (((x) >> 7) & 0x07) +#define C_00936C_SGPR_A 0xFFFFFC7F +#define S_00936C_LDS_A(x) (((unsigned)(x) & 0x07) << 10) +#define G_00936C_LDS_A(x) (((x) >> 10) & 0x07) +#define C_00936C_LDS_A 0xFFFFE3FF +#define S_00936C_WAVES_A(x) (((unsigned)(x) & 0x03) << 13) +#define G_00936C_WAVES_A(x) (((x) >> 13) & 0x03) +#define C_00936C_WAVES_A 0xFFFF9FFF +#define S_00936C_EN_A(x) (((unsigned)(x) & 0x1) << 15) +#define G_00936C_EN_A(x) (((x) >> 15) & 0x1) +#define C_00936C_EN_A 0xFFFF7FFF +#define S_00936C_TYPE_B(x) (((unsigned)(x) & 0x0F) << 16) +#define G_00936C_TYPE_B(x) (((x) >> 16) & 0x0F) +#define C_00936C_TYPE_B 0xFFF0FFFF +#define S_00936C_VGPR_B(x) (((unsigned)(x) & 0x07) << 20) +#define G_00936C_VGPR_B(x) (((x) >> 20) & 0x07) +#define C_00936C_VGPR_B 0xFF8FFFFF +#define S_00936C_SGPR_B(x) (((unsigned)(x) & 0x07) << 23) +#define G_00936C_SGPR_B(x) (((x) >> 23) & 0x07) +#define C_00936C_SGPR_B 0xFC7FFFFF +#define S_00936C_LDS_B(x) (((unsigned)(x) & 0x07) << 26) +#define G_00936C_LDS_B(x) (((x) >> 26) & 0x07) +#define C_00936C_LDS_B 0xE3FFFFFF +#define S_00936C_WAVES_B(x) (((unsigned)(x) & 0x03) << 29) +#define G_00936C_WAVES_B(x) (((x) >> 29) & 0x03) +#define C_00936C_WAVES_B 0x9FFFFFFF +#define S_00936C_EN_B(x) (((unsigned)(x) & 0x1) << 31) +#define G_00936C_EN_B(x) (((x) >> 31) & 0x1) +#define C_00936C_EN_B 0x7FFFFFFF +#define R_00950C_TA_CS_BC_BASE_ADDR 0x00950C +#define R_009858_DB_SUBTILE_CONTROL 0x009858 +#define S_009858_MSAA1_X(x) (((unsigned)(x) & 0x03) << 0) +#define G_009858_MSAA1_X(x) (((x) >> 0) & 0x03) +#define C_009858_MSAA1_X 0xFFFFFFFC +#define S_009858_MSAA1_Y(x) (((unsigned)(x) & 0x03) << 2) +#define G_009858_MSAA1_Y(x) (((x) >> 2) & 0x03) +#define C_009858_MSAA1_Y 0xFFFFFFF3 +#define S_009858_MSAA2_X(x) (((unsigned)(x) & 0x03) << 4) +#define G_009858_MSAA2_X(x) (((x) >> 4) & 0x03) +#define C_009858_MSAA2_X 0xFFFFFFCF +#define S_009858_MSAA2_Y(x) (((unsigned)(x) & 0x03) << 6) +#define G_009858_MSAA2_Y(x) (((x) >> 6) & 0x03) +#define C_009858_MSAA2_Y 0xFFFFFF3F +#define S_009858_MSAA4_X(x) (((unsigned)(x) & 0x03) << 8) +#define G_009858_MSAA4_X(x) (((x) >> 8) & 0x03) +#define C_009858_MSAA4_X 0xFFFFFCFF +#define S_009858_MSAA4_Y(x) (((unsigned)(x) & 0x03) << 10) +#define G_009858_MSAA4_Y(x) (((x) >> 10) & 0x03) +#define C_009858_MSAA4_Y 0xFFFFF3FF +#define S_009858_MSAA8_X(x) (((unsigned)(x) & 0x03) << 12) +#define G_009858_MSAA8_X(x) (((x) >> 12) & 0x03) +#define C_009858_MSAA8_X 0xFFFFCFFF +#define S_009858_MSAA8_Y(x) (((unsigned)(x) & 0x03) << 14) +#define G_009858_MSAA8_Y(x) (((x) >> 14) & 0x03) +#define C_009858_MSAA8_Y 0xFFFF3FFF +#define S_009858_MSAA16_X(x) (((unsigned)(x) & 0x03) << 16) +#define G_009858_MSAA16_X(x) (((x) >> 16) & 0x03) +#define C_009858_MSAA16_X 0xFFFCFFFF +#define S_009858_MSAA16_Y(x) (((unsigned)(x) & 0x03) << 18) +#define G_009858_MSAA16_Y(x) (((x) >> 18) & 0x03) +#define C_009858_MSAA16_Y 0xFFF3FFFF +#define R_0098F8_GB_ADDR_CONFIG 0x0098F8 +#define S_0098F8_NUM_PIPES(x) (((unsigned)(x) & 0x07) << 0) +#define G_0098F8_NUM_PIPES(x) (((x) >> 0) & 0x07) +#define C_0098F8_NUM_PIPES 0xFFFFFFF8 +#define S_0098F8_PIPE_INTERLEAVE_SIZE(x) (((unsigned)(x) & 0x07) << 4) +#define G_0098F8_PIPE_INTERLEAVE_SIZE(x) (((x) >> 4) & 0x07) +#define C_0098F8_PIPE_INTERLEAVE_SIZE 0xFFFFFF8F +#define S_0098F8_BANK_INTERLEAVE_SIZE(x) (((unsigned)(x) & 0x07) << 8) +#define G_0098F8_BANK_INTERLEAVE_SIZE(x) (((x) >> 8) & 0x07) +#define C_0098F8_BANK_INTERLEAVE_SIZE 0xFFFFF8FF +#define S_0098F8_NUM_SHADER_ENGINES(x) (((unsigned)(x) & 0x03) << 12) +#define G_0098F8_NUM_SHADER_ENGINES(x) (((x) >> 12) & 0x03) +#define C_0098F8_NUM_SHADER_ENGINES 0xFFFFCFFF +#define S_0098F8_SHADER_ENGINE_TILE_SIZE(x) (((unsigned)(x) & 0x07) << 16) +#define G_0098F8_SHADER_ENGINE_TILE_SIZE(x) (((x) >> 16) & 0x07) +#define C_0098F8_SHADER_ENGINE_TILE_SIZE 0xFFF8FFFF +#define S_0098F8_NUM_GPUS(x) (((unsigned)(x) & 0x07) << 20) +#define G_0098F8_NUM_GPUS(x) (((x) >> 20) & 0x07) +#define C_0098F8_NUM_GPUS 0xFF8FFFFF +#define S_0098F8_MULTI_GPU_TILE_SIZE(x) (((unsigned)(x) & 0x03) << 24) +#define G_0098F8_MULTI_GPU_TILE_SIZE(x) (((x) >> 24) & 0x03) +#define C_0098F8_MULTI_GPU_TILE_SIZE 0xFCFFFFFF +#define S_0098F8_ROW_SIZE(x) (((unsigned)(x) & 0x03) << 28) +#define G_0098F8_ROW_SIZE(x) (((x) >> 28) & 0x03) +#define C_0098F8_ROW_SIZE 0xCFFFFFFF +#define S_0098F8_NUM_LOWER_PIPES(x) (((unsigned)(x) & 0x1) << 30) +#define G_0098F8_NUM_LOWER_PIPES(x) (((x) >> 30) & 0x1) +#define C_0098F8_NUM_LOWER_PIPES 0xBFFFFFFF +#define R_009910_GB_TILE_MODE0 0x009910 +#define S_009910_MICRO_TILE_MODE(x) (((unsigned)(x) & 0x03) << 0) +#define G_009910_MICRO_TILE_MODE(x) (((x) >> 0) & 0x03) +#define C_009910_MICRO_TILE_MODE 0xFFFFFFFC +#define V_009910_ADDR_SURF_DISPLAY_MICRO_TILING 0x00 +#define V_009910_ADDR_SURF_THIN_MICRO_TILING 0x01 +#define V_009910_ADDR_SURF_DEPTH_MICRO_TILING 0x02 +#define V_009910_ADDR_SURF_THICK_MICRO_TILING 0x03 +#define S_009910_ARRAY_MODE(x) (((unsigned)(x) & 0x0F) << 2) +#define G_009910_ARRAY_MODE(x) (((x) >> 2) & 0x0F) +#define C_009910_ARRAY_MODE 0xFFFFFFC3 +#define V_009910_ARRAY_LINEAR_GENERAL 0x00 +#define V_009910_ARRAY_LINEAR_ALIGNED 0x01 +#define V_009910_ARRAY_1D_TILED_THIN1 0x02 +#define V_009910_ARRAY_1D_TILED_THICK 0x03 +#define V_009910_ARRAY_2D_TILED_THIN1 0x04 +#define V_009910_ARRAY_2D_TILED_THICK 0x07 +#define V_009910_ARRAY_2D_TILED_XTHICK 0x08 +#define V_009910_ARRAY_3D_TILED_THIN1 0x0C +#define V_009910_ARRAY_3D_TILED_THICK 0x0D +#define V_009910_ARRAY_3D_TILED_XTHICK 0x0E +#define V_009910_ARRAY_POWER_SAVE 0x0F +#define S_009910_PIPE_CONFIG(x) (((unsigned)(x) & 0x1F) << 6) +#define G_009910_PIPE_CONFIG(x) (((x) >> 6) & 0x1F) +#define C_009910_PIPE_CONFIG 0xFFFFF83F +#define V_009910_ADDR_SURF_P2 0x00 +#define V_009910_ADDR_SURF_P2_RESERVED0 0x01 +#define V_009910_ADDR_SURF_P2_RESERVED1 0x02 +#define V_009910_ADDR_SURF_P2_RESERVED2 0x03 +#define V_009910_X_ADDR_SURF_P4_8X16 0x04 +#define V_009910_X_ADDR_SURF_P4_16X16 0x05 +#define V_009910_X_ADDR_SURF_P4_16X32 0x06 +#define V_009910_X_ADDR_SURF_P4_32X32 0x07 +#define V_009910_X_ADDR_SURF_P8_16X16_8X16 0x08 +#define V_009910_X_ADDR_SURF_P8_16X32_8X16 0x09 +#define V_009910_X_ADDR_SURF_P8_32X32_8X16 0x0A +#define V_009910_X_ADDR_SURF_P8_16X32_16X16 0x0B +#define V_009910_X_ADDR_SURF_P8_32X32_16X16 0x0C +#define V_009910_X_ADDR_SURF_P8_32X32_16X32 0x0D +#define V_009910_X_ADDR_SURF_P8_32X64_32X32 0x0E +#define S_009910_TILE_SPLIT(x) (((unsigned)(x) & 0x07) << 11) +#define G_009910_TILE_SPLIT(x) (((x) >> 11) & 0x07) +#define C_009910_TILE_SPLIT 0xFFFFC7FF +#define V_009910_ADDR_SURF_TILE_SPLIT_64B 0x00 +#define V_009910_ADDR_SURF_TILE_SPLIT_128B 0x01 +#define V_009910_ADDR_SURF_TILE_SPLIT_256B 0x02 +#define V_009910_ADDR_SURF_TILE_SPLIT_512B 0x03 +#define V_009910_ADDR_SURF_TILE_SPLIT_1KB 0x04 +#define V_009910_ADDR_SURF_TILE_SPLIT_2KB 0x05 +#define V_009910_ADDR_SURF_TILE_SPLIT_4KB 0x06 +#define S_009910_BANK_WIDTH(x) (((unsigned)(x) & 0x03) << 14) +#define G_009910_BANK_WIDTH(x) (((x) >> 14) & 0x03) +#define C_009910_BANK_WIDTH 0xFFFF3FFF +#define V_009910_ADDR_SURF_BANK_WIDTH_1 0x00 +#define V_009910_ADDR_SURF_BANK_WIDTH_2 0x01 +#define V_009910_ADDR_SURF_BANK_WIDTH_4 0x02 +#define V_009910_ADDR_SURF_BANK_WIDTH_8 0x03 +#define S_009910_BANK_HEIGHT(x) (((unsigned)(x) & 0x03) << 16) +#define G_009910_BANK_HEIGHT(x) (((x) >> 16) & 0x03) +#define C_009910_BANK_HEIGHT 0xFFFCFFFF +#define V_009910_ADDR_SURF_BANK_HEIGHT_1 0x00 +#define V_009910_ADDR_SURF_BANK_HEIGHT_2 0x01 +#define V_009910_ADDR_SURF_BANK_HEIGHT_4 0x02 +#define V_009910_ADDR_SURF_BANK_HEIGHT_8 0x03 +#define S_009910_MACRO_TILE_ASPECT(x) (((unsigned)(x) & 0x03) << 18) +#define G_009910_MACRO_TILE_ASPECT(x) (((x) >> 18) & 0x03) +#define C_009910_MACRO_TILE_ASPECT 0xFFF3FFFF +#define V_009910_ADDR_SURF_MACRO_ASPECT_1 0x00 +#define V_009910_ADDR_SURF_MACRO_ASPECT_2 0x01 +#define V_009910_ADDR_SURF_MACRO_ASPECT_4 0x02 +#define V_009910_ADDR_SURF_MACRO_ASPECT_8 0x03 +#define S_009910_NUM_BANKS(x) (((unsigned)(x) & 0x03) << 20) +#define G_009910_NUM_BANKS(x) (((x) >> 20) & 0x03) +#define C_009910_NUM_BANKS 0xFFCFFFFF +#define V_009910_ADDR_SURF_2_BANK 0x00 +#define V_009910_ADDR_SURF_4_BANK 0x01 +#define V_009910_ADDR_SURF_8_BANK 0x02 +#define V_009910_ADDR_SURF_16_BANK 0x03 +#define S_009910_MICRO_TILE_MODE_NEW(x) (((unsigned)(x) & 0x07) << 22) +#define G_009910_MICRO_TILE_MODE_NEW(x) (((x) >> 22) & 0x07) +#define C_009910_MICRO_TILE_MODE_NEW 0xFE3FFFFF +#define V_009910_ADDR_SURF_DISPLAY_MICRO_TILING 0x00 +#define V_009910_ADDR_SURF_THIN_MICRO_TILING 0x01 +#define V_009910_ADDR_SURF_DEPTH_MICRO_TILING 0x02 +#define V_009910_ADDR_SURF_ROTATED_MICRO_TILING 0x03 +#define S_009910_SAMPLE_SPLIT(x) (((unsigned)(x) & 0x03) << 25) +#define G_009910_SAMPLE_SPLIT(x) (((x) >> 25) & 0x03) +#define C_009910_SAMPLE_SPLIT 0xF9FFFFFF +#define R_009914_GB_TILE_MODE1 0x009914 +#define R_009918_GB_TILE_MODE2 0x009918 +#define R_00991C_GB_TILE_MODE3 0x00991C +#define R_009920_GB_TILE_MODE4 0x009920 +#define R_009924_GB_TILE_MODE5 0x009924 +#define R_009928_GB_TILE_MODE6 0x009928 +#define R_00992C_GB_TILE_MODE7 0x00992C +#define R_009930_GB_TILE_MODE8 0x009930 +#define R_009934_GB_TILE_MODE9 0x009934 +#define R_009938_GB_TILE_MODE10 0x009938 +#define R_00993C_GB_TILE_MODE11 0x00993C +#define R_009940_GB_TILE_MODE12 0x009940 +#define R_009944_GB_TILE_MODE13 0x009944 +#define R_009948_GB_TILE_MODE14 0x009948 +#define R_00994C_GB_TILE_MODE15 0x00994C +#define R_009950_GB_TILE_MODE16 0x009950 +#define R_009954_GB_TILE_MODE17 0x009954 +#define R_009958_GB_TILE_MODE18 0x009958 +#define R_00995C_GB_TILE_MODE19 0x00995C +#define R_009960_GB_TILE_MODE20 0x009960 +#define R_009964_GB_TILE_MODE21 0x009964 +#define R_009968_GB_TILE_MODE22 0x009968 +#define R_00996C_GB_TILE_MODE23 0x00996C +#define R_009970_GB_TILE_MODE24 0x009970 +#define R_009974_GB_TILE_MODE25 0x009974 +#define R_009978_GB_TILE_MODE26 0x009978 +#define R_00997C_GB_TILE_MODE27 0x00997C +#define R_009980_GB_TILE_MODE28 0x009980 +#define R_009984_GB_TILE_MODE29 0x009984 +#define R_009988_GB_TILE_MODE30 0x009988 +#define R_00998C_GB_TILE_MODE31 0x00998C +/* CIK */ +#define R_009990_GB_MACROTILE_MODE0 0x009990 +#define S_009990_BANK_WIDTH(x) (((unsigned)(x) & 0x03) << 0) +#define G_009990_BANK_WIDTH(x) (((x) >> 0) & 0x03) +#define C_009990_BANK_WIDTH 0xFFFFFFFC +#define S_009990_BANK_HEIGHT(x) (((unsigned)(x) & 0x03) << 2) +#define G_009990_BANK_HEIGHT(x) (((x) >> 2) & 0x03) +#define C_009990_BANK_HEIGHT 0xFFFFFFF3 +#define S_009990_MACRO_TILE_ASPECT(x) (((unsigned)(x) & 0x03) << 4) +#define G_009990_MACRO_TILE_ASPECT(x) (((x) >> 4) & 0x03) +#define C_009990_MACRO_TILE_ASPECT 0xFFFFFFCF +#define S_009990_NUM_BANKS(x) (((unsigned)(x) & 0x03) << 6) +#define G_009990_NUM_BANKS(x) (((x) >> 6) & 0x03) +#define C_009990_NUM_BANKS 0xFFFFFF3F +#define R_009994_GB_MACROTILE_MODE1 0x009994 +#define R_009998_GB_MACROTILE_MODE2 0x009998 +#define R_00999C_GB_MACROTILE_MODE3 0x00999C +#define R_0099A0_GB_MACROTILE_MODE4 0x0099A0 +#define R_0099A4_GB_MACROTILE_MODE5 0x0099A4 +#define R_0099A8_GB_MACROTILE_MODE6 0x0099A8 +#define R_0099AC_GB_MACROTILE_MODE7 0x0099AC +#define R_0099B0_GB_MACROTILE_MODE8 0x0099B0 +#define R_0099B4_GB_MACROTILE_MODE9 0x0099B4 +#define R_0099B8_GB_MACROTILE_MODE10 0x0099B8 +#define R_0099BC_GB_MACROTILE_MODE11 0x0099BC +#define R_0099C0_GB_MACROTILE_MODE12 0x0099C0 +#define R_0099C4_GB_MACROTILE_MODE13 0x0099C4 +#define R_0099C8_GB_MACROTILE_MODE14 0x0099C8 +#define R_0099CC_GB_MACROTILE_MODE15 0x0099CC +/* */ +#define R_00B000_SPI_SHADER_TBA_LO_PS 0x00B000 +#define R_00B004_SPI_SHADER_TBA_HI_PS 0x00B004 +#define S_00B004_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) +#define G_00B004_MEM_BASE(x) (((x) >> 0) & 0xFF) +#define C_00B004_MEM_BASE 0xFFFFFF00 +#define R_00B008_SPI_SHADER_TMA_LO_PS 0x00B008 +#define R_00B00C_SPI_SHADER_TMA_HI_PS 0x00B00C +#define S_00B00C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) +#define G_00B00C_MEM_BASE(x) (((x) >> 0) & 0xFF) +#define C_00B00C_MEM_BASE 0xFFFFFF00 +/* CIK */ +#define R_00B01C_SPI_SHADER_PGM_RSRC3_PS 0x00B01C +#define S_00B01C_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_00B01C_CU_EN(x) (((x) >> 0) & 0xFFFF) +#define C_00B01C_CU_EN 0xFFFF0000 +#define S_00B01C_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 16) +#define G_00B01C_WAVE_LIMIT(x) (((x) >> 16) & 0x3F) +#define C_00B01C_WAVE_LIMIT 0xFFC0FFFF +#define S_00B01C_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 22) +#define G_00B01C_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0x0F) +#define C_00B01C_LOCK_LOW_THRESHOLD 0xFC3FFFFF +/* */ +#define R_00B020_SPI_SHADER_PGM_LO_PS 0x00B020 +#define R_00B024_SPI_SHADER_PGM_HI_PS 0x00B024 +#define S_00B024_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) +#define G_00B024_MEM_BASE(x) (((x) >> 0) & 0xFF) +#define C_00B024_MEM_BASE 0xFFFFFF00 +#define R_00B028_SPI_SHADER_PGM_RSRC1_PS 0x00B028 +#define S_00B028_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) +#define G_00B028_VGPRS(x) (((x) >> 0) & 0x3F) +#define C_00B028_VGPRS 0xFFFFFFC0 +#define S_00B028_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) +#define G_00B028_SGPRS(x) (((x) >> 6) & 0x0F) +#define C_00B028_SGPRS 0xFFFFFC3F +#define S_00B028_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) +#define G_00B028_PRIORITY(x) (((x) >> 10) & 0x03) +#define C_00B028_PRIORITY 0xFFFFF3FF +#define S_00B028_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) +#define G_00B028_FLOAT_MODE(x) (((x) >> 12) & 0xFF) +#define C_00B028_FLOAT_MODE 0xFFF00FFF +#define V_00B028_FP_32_DENORMS 0x30 +#define V_00B028_FP_64_DENORMS 0xc0 +#define V_00B028_FP_ALL_DENORMS 0xf0 +#define S_00B028_PRIV(x) (((unsigned)(x) & 0x1) << 20) +#define G_00B028_PRIV(x) (((x) >> 20) & 0x1) +#define C_00B028_PRIV 0xFFEFFFFF +#define S_00B028_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) +#define G_00B028_DX10_CLAMP(x) (((x) >> 21) & 0x1) +#define C_00B028_DX10_CLAMP 0xFFDFFFFF +#define S_00B028_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) +#define G_00B028_DEBUG_MODE(x) (((x) >> 22) & 0x1) +#define C_00B028_DEBUG_MODE 0xFFBFFFFF +#define S_00B028_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) +#define G_00B028_IEEE_MODE(x) (((x) >> 23) & 0x1) +#define C_00B028_IEEE_MODE 0xFF7FFFFF +#define S_00B028_CU_GROUP_DISABLE(x) (((unsigned)(x) & 0x1) << 24) +#define G_00B028_CU_GROUP_DISABLE(x) (((x) >> 24) & 0x1) +#define C_00B028_CU_GROUP_DISABLE 0xFEFFFFFF +/* CIK */ +#define S_00B028_CACHE_CTL(x) (((unsigned)(x) & 0x07) << 25) +#define G_00B028_CACHE_CTL(x) (((x) >> 25) & 0x07) +#define C_00B028_CACHE_CTL 0xF1FFFFFF +#define S_00B028_CDBG_USER(x) (((unsigned)(x) & 0x1) << 28) +#define G_00B028_CDBG_USER(x) (((x) >> 28) & 0x1) +#define C_00B028_CDBG_USER 0xEFFFFFFF +/* */ +#define R_00B02C_SPI_SHADER_PGM_RSRC2_PS 0x00B02C +#define S_00B02C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) +#define G_00B02C_SCRATCH_EN(x) (((x) >> 0) & 0x1) +#define C_00B02C_SCRATCH_EN 0xFFFFFFFE +#define S_00B02C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) +#define G_00B02C_USER_SGPR(x) (((x) >> 1) & 0x1F) +#define C_00B02C_USER_SGPR 0xFFFFFFC1 +#define S_00B02C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) +#define G_00B02C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) +#define C_00B02C_TRAP_PRESENT 0xFFFFFFBF +#define S_00B02C_WAVE_CNT_EN(x) (((unsigned)(x) & 0x1) << 7) +#define G_00B02C_WAVE_CNT_EN(x) (((x) >> 7) & 0x1) +#define C_00B02C_WAVE_CNT_EN 0xFFFFFF7F +#define S_00B02C_EXTRA_LDS_SIZE(x) (((unsigned)(x) & 0xFF) << 8) +#define G_00B02C_EXTRA_LDS_SIZE(x) (((x) >> 8) & 0xFF) +#define C_00B02C_EXTRA_LDS_SIZE 0xFFFF00FF +#define S_00B02C_EXCP_EN(x) (((unsigned)(x) & 0x7F) << 16) /* mask is 0x1FF on CIK */ +#define G_00B02C_EXCP_EN(x) (((x) >> 16) & 0x7F) /* mask is 0x1FF on CIK */ +#define C_00B02C_EXCP_EN 0xFF80FFFF /* mask is 0x1FF on CIK */ +#define S_00B02C_EXCP_EN_CIK(x) (((unsigned)(x) & 0x1FF) << 16) +#define G_00B02C_EXCP_EN_CIK(x) (((x) >> 16) & 0x1FF) +#define C_00B02C_EXCP_EN_CIK 0xFE00FFFF +#define R_00B030_SPI_SHADER_USER_DATA_PS_0 0x00B030 +#define R_00B034_SPI_SHADER_USER_DATA_PS_1 0x00B034 +#define R_00B038_SPI_SHADER_USER_DATA_PS_2 0x00B038 +#define R_00B03C_SPI_SHADER_USER_DATA_PS_3 0x00B03C +#define R_00B040_SPI_SHADER_USER_DATA_PS_4 0x00B040 +#define R_00B044_SPI_SHADER_USER_DATA_PS_5 0x00B044 +#define R_00B048_SPI_SHADER_USER_DATA_PS_6 0x00B048 +#define R_00B04C_SPI_SHADER_USER_DATA_PS_7 0x00B04C +#define R_00B050_SPI_SHADER_USER_DATA_PS_8 0x00B050 +#define R_00B054_SPI_SHADER_USER_DATA_PS_9 0x00B054 +#define R_00B058_SPI_SHADER_USER_DATA_PS_10 0x00B058 +#define R_00B05C_SPI_SHADER_USER_DATA_PS_11 0x00B05C +#define R_00B060_SPI_SHADER_USER_DATA_PS_12 0x00B060 +#define R_00B064_SPI_SHADER_USER_DATA_PS_13 0x00B064 +#define R_00B068_SPI_SHADER_USER_DATA_PS_14 0x00B068 +#define R_00B06C_SPI_SHADER_USER_DATA_PS_15 0x00B06C +#define R_00B100_SPI_SHADER_TBA_LO_VS 0x00B100 +#define R_00B104_SPI_SHADER_TBA_HI_VS 0x00B104 +#define S_00B104_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) +#define G_00B104_MEM_BASE(x) (((x) >> 0) & 0xFF) +#define C_00B104_MEM_BASE 0xFFFFFF00 +#define R_00B108_SPI_SHADER_TMA_LO_VS 0x00B108 +#define R_00B10C_SPI_SHADER_TMA_HI_VS 0x00B10C +#define S_00B10C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) +#define G_00B10C_MEM_BASE(x) (((x) >> 0) & 0xFF) +#define C_00B10C_MEM_BASE 0xFFFFFF00 +/* CIK */ +#define R_00B118_SPI_SHADER_PGM_RSRC3_VS 0x00B118 +#define S_00B118_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_00B118_CU_EN(x) (((x) >> 0) & 0xFFFF) +#define C_00B118_CU_EN 0xFFFF0000 +#define S_00B118_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 16) +#define G_00B118_WAVE_LIMIT(x) (((x) >> 16) & 0x3F) +#define C_00B118_WAVE_LIMIT 0xFFC0FFFF +#define S_00B118_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 22) +#define G_00B118_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0x0F) +#define C_00B118_LOCK_LOW_THRESHOLD 0xFC3FFFFF +#define R_00B11C_SPI_SHADER_LATE_ALLOC_VS 0x00B11C +#define S_00B11C_LIMIT(x) (((unsigned)(x) & 0x3F) << 0) +#define G_00B11C_LIMIT(x) (((x) >> 0) & 0x3F) +#define C_00B11C_LIMIT 0xFFFFFFC0 +/* */ +#define R_00B120_SPI_SHADER_PGM_LO_VS 0x00B120 +#define R_00B124_SPI_SHADER_PGM_HI_VS 0x00B124 +#define S_00B124_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) +#define G_00B124_MEM_BASE(x) (((x) >> 0) & 0xFF) +#define C_00B124_MEM_BASE 0xFFFFFF00 +#define R_00B128_SPI_SHADER_PGM_RSRC1_VS 0x00B128 +#define S_00B128_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) +#define G_00B128_VGPRS(x) (((x) >> 0) & 0x3F) +#define C_00B128_VGPRS 0xFFFFFFC0 +#define S_00B128_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) +#define G_00B128_SGPRS(x) (((x) >> 6) & 0x0F) +#define C_00B128_SGPRS 0xFFFFFC3F +#define S_00B128_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) +#define G_00B128_PRIORITY(x) (((x) >> 10) & 0x03) +#define C_00B128_PRIORITY 0xFFFFF3FF +#define S_00B128_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) +#define G_00B128_FLOAT_MODE(x) (((x) >> 12) & 0xFF) +#define C_00B128_FLOAT_MODE 0xFFF00FFF +#define S_00B128_PRIV(x) (((unsigned)(x) & 0x1) << 20) +#define G_00B128_PRIV(x) (((x) >> 20) & 0x1) +#define C_00B128_PRIV 0xFFEFFFFF +#define S_00B128_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) +#define G_00B128_DX10_CLAMP(x) (((x) >> 21) & 0x1) +#define C_00B128_DX10_CLAMP 0xFFDFFFFF +#define S_00B128_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) +#define G_00B128_DEBUG_MODE(x) (((x) >> 22) & 0x1) +#define C_00B128_DEBUG_MODE 0xFFBFFFFF +#define S_00B128_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) +#define G_00B128_IEEE_MODE(x) (((x) >> 23) & 0x1) +#define C_00B128_IEEE_MODE 0xFF7FFFFF +#define S_00B128_VGPR_COMP_CNT(x) (((unsigned)(x) & 0x03) << 24) +#define G_00B128_VGPR_COMP_CNT(x) (((x) >> 24) & 0x03) +#define C_00B128_VGPR_COMP_CNT 0xFCFFFFFF +#define S_00B128_CU_GROUP_ENABLE(x) (((unsigned)(x) & 0x1) << 26) +#define G_00B128_CU_GROUP_ENABLE(x) (((x) >> 26) & 0x1) +#define C_00B128_CU_GROUP_ENABLE 0xFBFFFFFF +/* CIK */ +#define S_00B128_CACHE_CTL(x) (((unsigned)(x) & 0x07) << 27) +#define G_00B128_CACHE_CTL(x) (((x) >> 27) & 0x07) +#define C_00B128_CACHE_CTL 0xC7FFFFFF +#define S_00B128_CDBG_USER(x) (((unsigned)(x) & 0x1) << 30) +#define G_00B128_CDBG_USER(x) (((x) >> 30) & 0x1) +#define C_00B128_CDBG_USER 0xBFFFFFFF +/* */ +#define R_00B12C_SPI_SHADER_PGM_RSRC2_VS 0x00B12C +#define S_00B12C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) +#define G_00B12C_SCRATCH_EN(x) (((x) >> 0) & 0x1) +#define C_00B12C_SCRATCH_EN 0xFFFFFFFE +#define S_00B12C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) +#define G_00B12C_USER_SGPR(x) (((x) >> 1) & 0x1F) +#define C_00B12C_USER_SGPR 0xFFFFFFC1 +#define S_00B12C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) +#define G_00B12C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) +#define C_00B12C_TRAP_PRESENT 0xFFFFFFBF +#define S_00B12C_OC_LDS_EN(x) (((unsigned)(x) & 0x1) << 7) +#define G_00B12C_OC_LDS_EN(x) (((x) >> 7) & 0x1) +#define C_00B12C_OC_LDS_EN 0xFFFFFF7F +#define S_00B12C_SO_BASE0_EN(x) (((unsigned)(x) & 0x1) << 8) +#define G_00B12C_SO_BASE0_EN(x) (((x) >> 8) & 0x1) +#define C_00B12C_SO_BASE0_EN 0xFFFFFEFF +#define S_00B12C_SO_BASE1_EN(x) (((unsigned)(x) & 0x1) << 9) +#define G_00B12C_SO_BASE1_EN(x) (((x) >> 9) & 0x1) +#define C_00B12C_SO_BASE1_EN 0xFFFFFDFF +#define S_00B12C_SO_BASE2_EN(x) (((unsigned)(x) & 0x1) << 10) +#define G_00B12C_SO_BASE2_EN(x) (((x) >> 10) & 0x1) +#define C_00B12C_SO_BASE2_EN 0xFFFFFBFF +#define S_00B12C_SO_BASE3_EN(x) (((unsigned)(x) & 0x1) << 11) +#define G_00B12C_SO_BASE3_EN(x) (((x) >> 11) & 0x1) +#define C_00B12C_SO_BASE3_EN 0xFFFFF7FF +#define S_00B12C_SO_EN(x) (((unsigned)(x) & 0x1) << 12) +#define G_00B12C_SO_EN(x) (((x) >> 12) & 0x1) +#define C_00B12C_SO_EN 0xFFFFEFFF +#define S_00B12C_EXCP_EN(x) (((unsigned)(x) & 0x7F) << 13) /* mask is 0x1FF on CIK */ +#define G_00B12C_EXCP_EN(x) (((x) >> 13) & 0x7F) /* mask is 0x1FF on CIK */ +#define C_00B12C_EXCP_EN 0xFFF01FFF /* mask is 0x1FF on CIK */ +#define S_00B12C_EXCP_EN_CIK(x) (((unsigned)(x) & 0x1FF) << 13) +#define G_00B12C_EXCP_EN_CIK(x) (((x) >> 13) & 0x1FF) +#define C_00B12C_EXCP_EN_CIK 0xFFC01FFF +/* VI */ +#define S_00B12C_DISPATCH_DRAW_EN(x) (((unsigned)(x) & 0x1) << 24) +#define G_00B12C_DISPATCH_DRAW_EN(x) (((x) >> 24) & 0x1) +#define C_00B12C_DISPATCH_DRAW_EN 0xFEFFFFFF +/* */ +#define R_00B130_SPI_SHADER_USER_DATA_VS_0 0x00B130 +#define R_00B134_SPI_SHADER_USER_DATA_VS_1 0x00B134 +#define R_00B138_SPI_SHADER_USER_DATA_VS_2 0x00B138 +#define R_00B13C_SPI_SHADER_USER_DATA_VS_3 0x00B13C +#define R_00B140_SPI_SHADER_USER_DATA_VS_4 0x00B140 +#define R_00B144_SPI_SHADER_USER_DATA_VS_5 0x00B144 +#define R_00B148_SPI_SHADER_USER_DATA_VS_6 0x00B148 +#define R_00B14C_SPI_SHADER_USER_DATA_VS_7 0x00B14C +#define R_00B150_SPI_SHADER_USER_DATA_VS_8 0x00B150 +#define R_00B154_SPI_SHADER_USER_DATA_VS_9 0x00B154 +#define R_00B158_SPI_SHADER_USER_DATA_VS_10 0x00B158 +#define R_00B15C_SPI_SHADER_USER_DATA_VS_11 0x00B15C +#define R_00B160_SPI_SHADER_USER_DATA_VS_12 0x00B160 +#define R_00B164_SPI_SHADER_USER_DATA_VS_13 0x00B164 +#define R_00B168_SPI_SHADER_USER_DATA_VS_14 0x00B168 +#define R_00B16C_SPI_SHADER_USER_DATA_VS_15 0x00B16C +#define R_00B200_SPI_SHADER_TBA_LO_GS 0x00B200 +#define R_00B204_SPI_SHADER_TBA_HI_GS 0x00B204 +#define S_00B204_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) +#define G_00B204_MEM_BASE(x) (((x) >> 0) & 0xFF) +#define C_00B204_MEM_BASE 0xFFFFFF00 +#define R_00B208_SPI_SHADER_TMA_LO_GS 0x00B208 +#define R_00B20C_SPI_SHADER_TMA_HI_GS 0x00B20C +#define S_00B20C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) +#define G_00B20C_MEM_BASE(x) (((x) >> 0) & 0xFF) +#define C_00B20C_MEM_BASE 0xFFFFFF00 +/* CIK */ +#define R_00B21C_SPI_SHADER_PGM_RSRC3_GS 0x00B21C +#define S_00B21C_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_00B21C_CU_EN(x) (((x) >> 0) & 0xFFFF) +#define C_00B21C_CU_EN 0xFFFF0000 +#define S_00B21C_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 16) +#define G_00B21C_WAVE_LIMIT(x) (((x) >> 16) & 0x3F) +#define C_00B21C_WAVE_LIMIT 0xFFC0FFFF +#define S_00B21C_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 22) +#define G_00B21C_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0x0F) +#define C_00B21C_LOCK_LOW_THRESHOLD 0xFC3FFFFF +/* */ +/* VI */ +#define S_00B21C_GROUP_FIFO_DEPTH(x) (((unsigned)(x) & 0x3F) << 26) +#define G_00B21C_GROUP_FIFO_DEPTH(x) (((x) >> 26) & 0x3F) +#define C_00B21C_GROUP_FIFO_DEPTH 0x03FFFFFF +/* */ +#define R_00B220_SPI_SHADER_PGM_LO_GS 0x00B220 +#define R_00B224_SPI_SHADER_PGM_HI_GS 0x00B224 +#define S_00B224_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) +#define G_00B224_MEM_BASE(x) (((x) >> 0) & 0xFF) +#define C_00B224_MEM_BASE 0xFFFFFF00 +#define R_00B228_SPI_SHADER_PGM_RSRC1_GS 0x00B228 +#define S_00B228_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) +#define G_00B228_VGPRS(x) (((x) >> 0) & 0x3F) +#define C_00B228_VGPRS 0xFFFFFFC0 +#define S_00B228_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) +#define G_00B228_SGPRS(x) (((x) >> 6) & 0x0F) +#define C_00B228_SGPRS 0xFFFFFC3F +#define S_00B228_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) +#define G_00B228_PRIORITY(x) (((x) >> 10) & 0x03) +#define C_00B228_PRIORITY 0xFFFFF3FF +#define S_00B228_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) +#define G_00B228_FLOAT_MODE(x) (((x) >> 12) & 0xFF) +#define C_00B228_FLOAT_MODE 0xFFF00FFF +#define S_00B228_PRIV(x) (((unsigned)(x) & 0x1) << 20) +#define G_00B228_PRIV(x) (((x) >> 20) & 0x1) +#define C_00B228_PRIV 0xFFEFFFFF +#define S_00B228_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) +#define G_00B228_DX10_CLAMP(x) (((x) >> 21) & 0x1) +#define C_00B228_DX10_CLAMP 0xFFDFFFFF +#define S_00B228_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) +#define G_00B228_DEBUG_MODE(x) (((x) >> 22) & 0x1) +#define C_00B228_DEBUG_MODE 0xFFBFFFFF +#define S_00B228_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) +#define G_00B228_IEEE_MODE(x) (((x) >> 23) & 0x1) +#define C_00B228_IEEE_MODE 0xFF7FFFFF +#define S_00B228_CU_GROUP_ENABLE(x) (((unsigned)(x) & 0x1) << 24) +#define G_00B228_CU_GROUP_ENABLE(x) (((x) >> 24) & 0x1) +#define C_00B228_CU_GROUP_ENABLE 0xFEFFFFFF +/* CIK */ +#define S_00B228_CACHE_CTL(x) (((unsigned)(x) & 0x07) << 25) +#define G_00B228_CACHE_CTL(x) (((x) >> 25) & 0x07) +#define C_00B228_CACHE_CTL 0xF1FFFFFF +#define S_00B228_CDBG_USER(x) (((unsigned)(x) & 0x1) << 28) +#define G_00B228_CDBG_USER(x) (((x) >> 28) & 0x1) +#define C_00B228_CDBG_USER 0xEFFFFFFF +/* */ +#define R_00B22C_SPI_SHADER_PGM_RSRC2_GS 0x00B22C +#define S_00B22C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) +#define G_00B22C_SCRATCH_EN(x) (((x) >> 0) & 0x1) +#define C_00B22C_SCRATCH_EN 0xFFFFFFFE +#define S_00B22C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) +#define G_00B22C_USER_SGPR(x) (((x) >> 1) & 0x1F) +#define C_00B22C_USER_SGPR 0xFFFFFFC1 +#define S_00B22C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) +#define G_00B22C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) +#define C_00B22C_TRAP_PRESENT 0xFFFFFFBF +#define S_00B22C_EXCP_EN(x) (((unsigned)(x) & 0x7F) << 7) /* mask is 0x1FF on CIK */ +#define G_00B22C_EXCP_EN(x) (((x) >> 7) & 0x7F) /* mask is 0x1FF on CIK */ +#define C_00B22C_EXCP_EN 0xFFFFC07F /* mask is 0x1FF on CIK */ +#define S_00B22C_EXCP_EN_CIK(x) (((unsigned)(x) & 0x1FF) << 7) +#define G_00B22C_EXCP_EN_CIK(x) (((x) >> 7) & 0x1FF) +#define C_00B22C_EXCP_EN_CIK 0xFFFF007F +#define R_00B230_SPI_SHADER_USER_DATA_GS_0 0x00B230 +#define R_00B234_SPI_SHADER_USER_DATA_GS_1 0x00B234 +#define R_00B238_SPI_SHADER_USER_DATA_GS_2 0x00B238 +#define R_00B23C_SPI_SHADER_USER_DATA_GS_3 0x00B23C +#define R_00B240_SPI_SHADER_USER_DATA_GS_4 0x00B240 +#define R_00B244_SPI_SHADER_USER_DATA_GS_5 0x00B244 +#define R_00B248_SPI_SHADER_USER_DATA_GS_6 0x00B248 +#define R_00B24C_SPI_SHADER_USER_DATA_GS_7 0x00B24C +#define R_00B250_SPI_SHADER_USER_DATA_GS_8 0x00B250 +#define R_00B254_SPI_SHADER_USER_DATA_GS_9 0x00B254 +#define R_00B258_SPI_SHADER_USER_DATA_GS_10 0x00B258 +#define R_00B25C_SPI_SHADER_USER_DATA_GS_11 0x00B25C +#define R_00B260_SPI_SHADER_USER_DATA_GS_12 0x00B260 +#define R_00B264_SPI_SHADER_USER_DATA_GS_13 0x00B264 +#define R_00B268_SPI_SHADER_USER_DATA_GS_14 0x00B268 +#define R_00B26C_SPI_SHADER_USER_DATA_GS_15 0x00B26C +#define R_00B300_SPI_SHADER_TBA_LO_ES 0x00B300 +#define R_00B304_SPI_SHADER_TBA_HI_ES 0x00B304 +#define S_00B304_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) +#define G_00B304_MEM_BASE(x) (((x) >> 0) & 0xFF) +#define C_00B304_MEM_BASE 0xFFFFFF00 +#define R_00B308_SPI_SHADER_TMA_LO_ES 0x00B308 +#define R_00B30C_SPI_SHADER_TMA_HI_ES 0x00B30C +#define S_00B30C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) +#define G_00B30C_MEM_BASE(x) (((x) >> 0) & 0xFF) +#define C_00B30C_MEM_BASE 0xFFFFFF00 +/* CIK */ +#define R_00B31C_SPI_SHADER_PGM_RSRC3_ES 0x00B31C +#define S_00B31C_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_00B31C_CU_EN(x) (((x) >> 0) & 0xFFFF) +#define C_00B31C_CU_EN 0xFFFF0000 +#define S_00B31C_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 16) +#define G_00B31C_WAVE_LIMIT(x) (((x) >> 16) & 0x3F) +#define C_00B31C_WAVE_LIMIT 0xFFC0FFFF +#define S_00B31C_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 22) +#define G_00B31C_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0x0F) +#define C_00B31C_LOCK_LOW_THRESHOLD 0xFC3FFFFF +/* */ +/* VI */ +#define S_00B31C_GROUP_FIFO_DEPTH(x) (((unsigned)(x) & 0x3F) << 26) +#define G_00B31C_GROUP_FIFO_DEPTH(x) (((x) >> 26) & 0x3F) +#define C_00B31C_GROUP_FIFO_DEPTH 0x03FFFFFF +/* */ +#define R_00B320_SPI_SHADER_PGM_LO_ES 0x00B320 +#define R_00B324_SPI_SHADER_PGM_HI_ES 0x00B324 +#define S_00B324_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) +#define G_00B324_MEM_BASE(x) (((x) >> 0) & 0xFF) +#define C_00B324_MEM_BASE 0xFFFFFF00 +#define R_00B328_SPI_SHADER_PGM_RSRC1_ES 0x00B328 +#define S_00B328_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) +#define G_00B328_VGPRS(x) (((x) >> 0) & 0x3F) +#define C_00B328_VGPRS 0xFFFFFFC0 +#define S_00B328_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) +#define G_00B328_SGPRS(x) (((x) >> 6) & 0x0F) +#define C_00B328_SGPRS 0xFFFFFC3F +#define S_00B328_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) +#define G_00B328_PRIORITY(x) (((x) >> 10) & 0x03) +#define C_00B328_PRIORITY 0xFFFFF3FF +#define S_00B328_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) +#define G_00B328_FLOAT_MODE(x) (((x) >> 12) & 0xFF) +#define C_00B328_FLOAT_MODE 0xFFF00FFF +#define S_00B328_PRIV(x) (((unsigned)(x) & 0x1) << 20) +#define G_00B328_PRIV(x) (((x) >> 20) & 0x1) +#define C_00B328_PRIV 0xFFEFFFFF +#define S_00B328_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) +#define G_00B328_DX10_CLAMP(x) (((x) >> 21) & 0x1) +#define C_00B328_DX10_CLAMP 0xFFDFFFFF +#define S_00B328_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) +#define G_00B328_DEBUG_MODE(x) (((x) >> 22) & 0x1) +#define C_00B328_DEBUG_MODE 0xFFBFFFFF +#define S_00B328_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) +#define G_00B328_IEEE_MODE(x) (((x) >> 23) & 0x1) +#define C_00B328_IEEE_MODE 0xFF7FFFFF +#define S_00B328_VGPR_COMP_CNT(x) (((unsigned)(x) & 0x03) << 24) +#define G_00B328_VGPR_COMP_CNT(x) (((x) >> 24) & 0x03) +#define C_00B328_VGPR_COMP_CNT 0xFCFFFFFF +#define S_00B328_CU_GROUP_ENABLE(x) (((unsigned)(x) & 0x1) << 26) +#define G_00B328_CU_GROUP_ENABLE(x) (((x) >> 26) & 0x1) +#define C_00B328_CU_GROUP_ENABLE 0xFBFFFFFF +/* CIK */ +#define S_00B328_CACHE_CTL(x) (((unsigned)(x) & 0x07) << 27) +#define G_00B328_CACHE_CTL(x) (((x) >> 27) & 0x07) +#define C_00B328_CACHE_CTL 0xC7FFFFFF +#define S_00B328_CDBG_USER(x) (((unsigned)(x) & 0x1) << 30) +#define G_00B328_CDBG_USER(x) (((x) >> 30) & 0x1) +#define C_00B328_CDBG_USER 0xBFFFFFFF +/* */ +#define R_00B32C_SPI_SHADER_PGM_RSRC2_ES 0x00B32C +#define S_00B32C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) +#define G_00B32C_SCRATCH_EN(x) (((x) >> 0) & 0x1) +#define C_00B32C_SCRATCH_EN 0xFFFFFFFE +#define S_00B32C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) +#define G_00B32C_USER_SGPR(x) (((x) >> 1) & 0x1F) +#define C_00B32C_USER_SGPR 0xFFFFFFC1 +#define S_00B32C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) +#define G_00B32C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) +#define C_00B32C_TRAP_PRESENT 0xFFFFFFBF +#define S_00B32C_OC_LDS_EN(x) (((unsigned)(x) & 0x1) << 7) +#define G_00B32C_OC_LDS_EN(x) (((x) >> 7) & 0x1) +#define C_00B32C_OC_LDS_EN 0xFFFFFF7F +#define S_00B32C_EXCP_EN(x) (((unsigned)(x) & 0x7F) << 8) /* mask is 0x1FF on CIK */ +#define G_00B32C_EXCP_EN(x) (((x) >> 8) & 0x7F) /* mask is 0x1FF on CIK */ +#define C_00B32C_EXCP_EN 0xFFFF80FF /* mask is 0x1FF on CIK */ +#define S_00B32C_LDS_SIZE(x) (((unsigned)(x) & 0x1FF) << 20) /* CIK, for on-chip GS */ +#define G_00B32C_LDS_SIZE(x) (((x) >> 20) & 0x1FF) /* CIK, for on-chip GS */ +#define C_00B32C_LDS_SIZE 0xE00FFFFF /* CIK, for on-chip GS */ +#define R_00B330_SPI_SHADER_USER_DATA_ES_0 0x00B330 +#define R_00B334_SPI_SHADER_USER_DATA_ES_1 0x00B334 +#define R_00B338_SPI_SHADER_USER_DATA_ES_2 0x00B338 +#define R_00B33C_SPI_SHADER_USER_DATA_ES_3 0x00B33C +#define R_00B340_SPI_SHADER_USER_DATA_ES_4 0x00B340 +#define R_00B344_SPI_SHADER_USER_DATA_ES_5 0x00B344 +#define R_00B348_SPI_SHADER_USER_DATA_ES_6 0x00B348 +#define R_00B34C_SPI_SHADER_USER_DATA_ES_7 0x00B34C +#define R_00B350_SPI_SHADER_USER_DATA_ES_8 0x00B350 +#define R_00B354_SPI_SHADER_USER_DATA_ES_9 0x00B354 +#define R_00B358_SPI_SHADER_USER_DATA_ES_10 0x00B358 +#define R_00B35C_SPI_SHADER_USER_DATA_ES_11 0x00B35C +#define R_00B360_SPI_SHADER_USER_DATA_ES_12 0x00B360 +#define R_00B364_SPI_SHADER_USER_DATA_ES_13 0x00B364 +#define R_00B368_SPI_SHADER_USER_DATA_ES_14 0x00B368 +#define R_00B36C_SPI_SHADER_USER_DATA_ES_15 0x00B36C +#define R_00B400_SPI_SHADER_TBA_LO_HS 0x00B400 +#define R_00B404_SPI_SHADER_TBA_HI_HS 0x00B404 +#define S_00B404_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) +#define G_00B404_MEM_BASE(x) (((x) >> 0) & 0xFF) +#define C_00B404_MEM_BASE 0xFFFFFF00 +#define R_00B408_SPI_SHADER_TMA_LO_HS 0x00B408 +#define R_00B40C_SPI_SHADER_TMA_HI_HS 0x00B40C +#define S_00B40C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) +#define G_00B40C_MEM_BASE(x) (((x) >> 0) & 0xFF) +#define C_00B40C_MEM_BASE 0xFFFFFF00 +/* CIK */ +#define R_00B41C_SPI_SHADER_PGM_RSRC3_HS 0x00B41C +#define S_00B41C_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 0) +#define G_00B41C_WAVE_LIMIT(x) (((x) >> 0) & 0x3F) +#define C_00B41C_WAVE_LIMIT 0xFFFFFFC0 +#define S_00B41C_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 6) +#define G_00B41C_LOCK_LOW_THRESHOLD(x) (((x) >> 6) & 0x0F) +#define C_00B41C_LOCK_LOW_THRESHOLD 0xFFFFFC3F +/* */ +/* VI */ +#define S_00B41C_GROUP_FIFO_DEPTH(x) (((unsigned)(x) & 0x3F) << 10) +#define G_00B41C_GROUP_FIFO_DEPTH(x) (((x) >> 10) & 0x3F) +#define C_00B41C_GROUP_FIFO_DEPTH 0xFFFF03FF +/* */ +#define R_00B420_SPI_SHADER_PGM_LO_HS 0x00B420 +#define R_00B424_SPI_SHADER_PGM_HI_HS 0x00B424 +#define S_00B424_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) +#define G_00B424_MEM_BASE(x) (((x) >> 0) & 0xFF) +#define C_00B424_MEM_BASE 0xFFFFFF00 +#define R_00B428_SPI_SHADER_PGM_RSRC1_HS 0x00B428 +#define S_00B428_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) +#define G_00B428_VGPRS(x) (((x) >> 0) & 0x3F) +#define C_00B428_VGPRS 0xFFFFFFC0 +#define S_00B428_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) +#define G_00B428_SGPRS(x) (((x) >> 6) & 0x0F) +#define C_00B428_SGPRS 0xFFFFFC3F +#define S_00B428_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) +#define G_00B428_PRIORITY(x) (((x) >> 10) & 0x03) +#define C_00B428_PRIORITY 0xFFFFF3FF +#define S_00B428_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) +#define G_00B428_FLOAT_MODE(x) (((x) >> 12) & 0xFF) +#define C_00B428_FLOAT_MODE 0xFFF00FFF +#define S_00B428_PRIV(x) (((unsigned)(x) & 0x1) << 20) +#define G_00B428_PRIV(x) (((x) >> 20) & 0x1) +#define C_00B428_PRIV 0xFFEFFFFF +#define S_00B428_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) +#define G_00B428_DX10_CLAMP(x) (((x) >> 21) & 0x1) +#define C_00B428_DX10_CLAMP 0xFFDFFFFF +#define S_00B428_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) +#define G_00B428_DEBUG_MODE(x) (((x) >> 22) & 0x1) +#define C_00B428_DEBUG_MODE 0xFFBFFFFF +#define S_00B428_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) +#define G_00B428_IEEE_MODE(x) (((x) >> 23) & 0x1) +#define C_00B428_IEEE_MODE 0xFF7FFFFF +/* CIK */ +#define S_00B428_CACHE_CTL(x) (((unsigned)(x) & 0x07) << 24) +#define G_00B428_CACHE_CTL(x) (((x) >> 24) & 0x07) +#define C_00B428_CACHE_CTL 0xF8FFFFFF +#define S_00B428_CDBG_USER(x) (((unsigned)(x) & 0x1) << 27) +#define G_00B428_CDBG_USER(x) (((x) >> 27) & 0x1) +#define C_00B428_CDBG_USER 0xF7FFFFFF +/* */ +#define R_00B42C_SPI_SHADER_PGM_RSRC2_HS 0x00B42C +#define S_00B42C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) +#define G_00B42C_SCRATCH_EN(x) (((x) >> 0) & 0x1) +#define C_00B42C_SCRATCH_EN 0xFFFFFFFE +#define S_00B42C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) +#define G_00B42C_USER_SGPR(x) (((x) >> 1) & 0x1F) +#define C_00B42C_USER_SGPR 0xFFFFFFC1 +#define S_00B42C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) +#define G_00B42C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) +#define C_00B42C_TRAP_PRESENT 0xFFFFFFBF +#define S_00B42C_OC_LDS_EN(x) (((unsigned)(x) & 0x1) << 7) +#define G_00B42C_OC_LDS_EN(x) (((x) >> 7) & 0x1) +#define C_00B42C_OC_LDS_EN 0xFFFFFF7F +#define S_00B42C_TG_SIZE_EN(x) (((unsigned)(x) & 0x1) << 8) +#define G_00B42C_TG_SIZE_EN(x) (((x) >> 8) & 0x1) +#define C_00B42C_TG_SIZE_EN 0xFFFFFEFF +#define S_00B42C_EXCP_EN(x) (((unsigned)(x) & 0x7F) << 9) /* mask is 0x1FF on CIK */ +#define G_00B42C_EXCP_EN(x) (((x) >> 9) & 0x7F) /* mask is 0x1FF on CIK */ +#define C_00B42C_EXCP_EN 0xFFFF01FF /* mask is 0x1FF on CIK */ +#define R_00B430_SPI_SHADER_USER_DATA_HS_0 0x00B430 +#define R_00B434_SPI_SHADER_USER_DATA_HS_1 0x00B434 +#define R_00B438_SPI_SHADER_USER_DATA_HS_2 0x00B438 +#define R_00B43C_SPI_SHADER_USER_DATA_HS_3 0x00B43C +#define R_00B440_SPI_SHADER_USER_DATA_HS_4 0x00B440 +#define R_00B444_SPI_SHADER_USER_DATA_HS_5 0x00B444 +#define R_00B448_SPI_SHADER_USER_DATA_HS_6 0x00B448 +#define R_00B44C_SPI_SHADER_USER_DATA_HS_7 0x00B44C +#define R_00B450_SPI_SHADER_USER_DATA_HS_8 0x00B450 +#define R_00B454_SPI_SHADER_USER_DATA_HS_9 0x00B454 +#define R_00B458_SPI_SHADER_USER_DATA_HS_10 0x00B458 +#define R_00B45C_SPI_SHADER_USER_DATA_HS_11 0x00B45C +#define R_00B460_SPI_SHADER_USER_DATA_HS_12 0x00B460 +#define R_00B464_SPI_SHADER_USER_DATA_HS_13 0x00B464 +#define R_00B468_SPI_SHADER_USER_DATA_HS_14 0x00B468 +#define R_00B46C_SPI_SHADER_USER_DATA_HS_15 0x00B46C +#define R_00B500_SPI_SHADER_TBA_LO_LS 0x00B500 +#define R_00B504_SPI_SHADER_TBA_HI_LS 0x00B504 +#define S_00B504_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) +#define G_00B504_MEM_BASE(x) (((x) >> 0) & 0xFF) +#define C_00B504_MEM_BASE 0xFFFFFF00 +#define R_00B508_SPI_SHADER_TMA_LO_LS 0x00B508 +#define R_00B50C_SPI_SHADER_TMA_HI_LS 0x00B50C +#define S_00B50C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) +#define G_00B50C_MEM_BASE(x) (((x) >> 0) & 0xFF) +#define C_00B50C_MEM_BASE 0xFFFFFF00 +/* CIK */ +#define R_00B51C_SPI_SHADER_PGM_RSRC3_LS 0x00B51C +#define S_00B51C_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_00B51C_CU_EN(x) (((x) >> 0) & 0xFFFF) +#define C_00B51C_CU_EN 0xFFFF0000 +#define S_00B51C_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 16) +#define G_00B51C_WAVE_LIMIT(x) (((x) >> 16) & 0x3F) +#define C_00B51C_WAVE_LIMIT 0xFFC0FFFF +#define S_00B51C_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 22) +#define G_00B51C_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0x0F) +#define C_00B51C_LOCK_LOW_THRESHOLD 0xFC3FFFFF +/* */ +/* VI */ +#define S_00B51C_GROUP_FIFO_DEPTH(x) (((unsigned)(x) & 0x3F) << 26) +#define G_00B51C_GROUP_FIFO_DEPTH(x) (((x) >> 26) & 0x3F) +#define C_00B51C_GROUP_FIFO_DEPTH 0x03FFFFFF +/* */ +#define R_00B520_SPI_SHADER_PGM_LO_LS 0x00B520 +#define R_00B524_SPI_SHADER_PGM_HI_LS 0x00B524 +#define S_00B524_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) +#define G_00B524_MEM_BASE(x) (((x) >> 0) & 0xFF) +#define C_00B524_MEM_BASE 0xFFFFFF00 +#define R_00B528_SPI_SHADER_PGM_RSRC1_LS 0x00B528 +#define S_00B528_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) +#define G_00B528_VGPRS(x) (((x) >> 0) & 0x3F) +#define C_00B528_VGPRS 0xFFFFFFC0 +#define S_00B528_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) +#define G_00B528_SGPRS(x) (((x) >> 6) & 0x0F) +#define C_00B528_SGPRS 0xFFFFFC3F +#define S_00B528_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) +#define G_00B528_PRIORITY(x) (((x) >> 10) & 0x03) +#define C_00B528_PRIORITY 0xFFFFF3FF +#define S_00B528_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) +#define G_00B528_FLOAT_MODE(x) (((x) >> 12) & 0xFF) +#define C_00B528_FLOAT_MODE 0xFFF00FFF +#define S_00B528_PRIV(x) (((unsigned)(x) & 0x1) << 20) +#define G_00B528_PRIV(x) (((x) >> 20) & 0x1) +#define C_00B528_PRIV 0xFFEFFFFF +#define S_00B528_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) +#define G_00B528_DX10_CLAMP(x) (((x) >> 21) & 0x1) +#define C_00B528_DX10_CLAMP 0xFFDFFFFF +#define S_00B528_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) +#define G_00B528_DEBUG_MODE(x) (((x) >> 22) & 0x1) +#define C_00B528_DEBUG_MODE 0xFFBFFFFF +#define S_00B528_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) +#define G_00B528_IEEE_MODE(x) (((x) >> 23) & 0x1) +#define C_00B528_IEEE_MODE 0xFF7FFFFF +#define S_00B528_VGPR_COMP_CNT(x) (((unsigned)(x) & 0x03) << 24) +#define G_00B528_VGPR_COMP_CNT(x) (((x) >> 24) & 0x03) +#define C_00B528_VGPR_COMP_CNT 0xFCFFFFFF +/* CIK */ +#define S_00B528_CACHE_CTL(x) (((unsigned)(x) & 0x07) << 26) +#define G_00B528_CACHE_CTL(x) (((x) >> 26) & 0x07) +#define C_00B528_CACHE_CTL 0xE3FFFFFF +#define S_00B528_CDBG_USER(x) (((unsigned)(x) & 0x1) << 29) +#define G_00B528_CDBG_USER(x) (((x) >> 29) & 0x1) +#define C_00B528_CDBG_USER 0xDFFFFFFF +/* */ +#define R_00B52C_SPI_SHADER_PGM_RSRC2_LS 0x00B52C +#define S_00B52C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) +#define G_00B52C_SCRATCH_EN(x) (((x) >> 0) & 0x1) +#define C_00B52C_SCRATCH_EN 0xFFFFFFFE +#define S_00B52C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) +#define G_00B52C_USER_SGPR(x) (((x) >> 1) & 0x1F) +#define C_00B52C_USER_SGPR 0xFFFFFFC1 +#define S_00B52C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) +#define G_00B52C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) +#define C_00B52C_TRAP_PRESENT 0xFFFFFFBF +#define S_00B52C_LDS_SIZE(x) (((unsigned)(x) & 0x1FF) << 7) +#define G_00B52C_LDS_SIZE(x) (((x) >> 7) & 0x1FF) +#define C_00B52C_LDS_SIZE 0xFFFF007F +#define S_00B52C_EXCP_EN(x) (((unsigned)(x) & 0x7F) << 16) /* mask is 0x1FF on CIK */ +#define G_00B52C_EXCP_EN(x) (((x) >> 16) & 0x7F) /* mask is 0x1FF on CIK */ +#define C_00B52C_EXCP_EN 0xFF80FFFF /* mask is 0x1FF on CIK */ +#define R_00B530_SPI_SHADER_USER_DATA_LS_0 0x00B530 +#define R_00B534_SPI_SHADER_USER_DATA_LS_1 0x00B534 +#define R_00B538_SPI_SHADER_USER_DATA_LS_2 0x00B538 +#define R_00B53C_SPI_SHADER_USER_DATA_LS_3 0x00B53C +#define R_00B540_SPI_SHADER_USER_DATA_LS_4 0x00B540 +#define R_00B544_SPI_SHADER_USER_DATA_LS_5 0x00B544 +#define R_00B548_SPI_SHADER_USER_DATA_LS_6 0x00B548 +#define R_00B54C_SPI_SHADER_USER_DATA_LS_7 0x00B54C +#define R_00B550_SPI_SHADER_USER_DATA_LS_8 0x00B550 +#define R_00B554_SPI_SHADER_USER_DATA_LS_9 0x00B554 +#define R_00B558_SPI_SHADER_USER_DATA_LS_10 0x00B558 +#define R_00B55C_SPI_SHADER_USER_DATA_LS_11 0x00B55C +#define R_00B560_SPI_SHADER_USER_DATA_LS_12 0x00B560 +#define R_00B564_SPI_SHADER_USER_DATA_LS_13 0x00B564 +#define R_00B568_SPI_SHADER_USER_DATA_LS_14 0x00B568 +#define R_00B56C_SPI_SHADER_USER_DATA_LS_15 0x00B56C +#define R_00B800_COMPUTE_DISPATCH_INITIATOR 0x00B800 +#define S_00B800_COMPUTE_SHADER_EN(x) (((unsigned)(x) & 0x1) << 0) +#define G_00B800_COMPUTE_SHADER_EN(x) (((x) >> 0) & 0x1) +#define C_00B800_COMPUTE_SHADER_EN 0xFFFFFFFE +#define S_00B800_PARTIAL_TG_EN(x) (((unsigned)(x) & 0x1) << 1) +#define G_00B800_PARTIAL_TG_EN(x) (((x) >> 1) & 0x1) +#define C_00B800_PARTIAL_TG_EN 0xFFFFFFFD +#define S_00B800_FORCE_START_AT_000(x) (((unsigned)(x) & 0x1) << 2) +#define G_00B800_FORCE_START_AT_000(x) (((x) >> 2) & 0x1) +#define C_00B800_FORCE_START_AT_000 0xFFFFFFFB +#define S_00B800_ORDERED_APPEND_ENBL(x) (((unsigned)(x) & 0x1) << 3) +#define G_00B800_ORDERED_APPEND_ENBL(x) (((x) >> 3) & 0x1) +#define C_00B800_ORDERED_APPEND_ENBL 0xFFFFFFF7 +/* CIK */ +#define S_00B800_ORDERED_APPEND_MODE(x) (((unsigned)(x) & 0x1) << 4) +#define G_00B800_ORDERED_APPEND_MODE(x) (((x) >> 4) & 0x1) +#define C_00B800_ORDERED_APPEND_MODE 0xFFFFFFEF +#define S_00B800_USE_THREAD_DIMENSIONS(x) (((unsigned)(x) & 0x1) << 5) +#define G_00B800_USE_THREAD_DIMENSIONS(x) (((x) >> 5) & 0x1) +#define C_00B800_USE_THREAD_DIMENSIONS 0xFFFFFFDF +#define S_00B800_ORDER_MODE(x) (((unsigned)(x) & 0x1) << 6) +#define G_00B800_ORDER_MODE(x) (((x) >> 6) & 0x1) +#define C_00B800_ORDER_MODE 0xFFFFFFBF +#define S_00B800_DISPATCH_CACHE_CNTL(x) (((unsigned)(x) & 0x07) << 7) +#define G_00B800_DISPATCH_CACHE_CNTL(x) (((x) >> 7) & 0x07) +#define C_00B800_DISPATCH_CACHE_CNTL 0xFFFFFC7F +#define S_00B800_SCALAR_L1_INV_VOL(x) (((unsigned)(x) & 0x1) << 10) +#define G_00B800_SCALAR_L1_INV_VOL(x) (((x) >> 10) & 0x1) +#define C_00B800_SCALAR_L1_INV_VOL 0xFFFFFBFF +#define S_00B800_VECTOR_L1_INV_VOL(x) (((unsigned)(x) & 0x1) << 11) +#define G_00B800_VECTOR_L1_INV_VOL(x) (((x) >> 11) & 0x1) +#define C_00B800_VECTOR_L1_INV_VOL 0xFFFFF7FF +#define S_00B800_DATA_ATC(x) (((unsigned)(x) & 0x1) << 12) +#define G_00B800_DATA_ATC(x) (((x) >> 12) & 0x1) +#define C_00B800_DATA_ATC 0xFFFFEFFF +#define S_00B800_RESTORE(x) (((unsigned)(x) & 0x1) << 14) +#define G_00B800_RESTORE(x) (((x) >> 14) & 0x1) +#define C_00B800_RESTORE 0xFFFFBFFF +/* */ +#define R_00B804_COMPUTE_DIM_X 0x00B804 +#define R_00B808_COMPUTE_DIM_Y 0x00B808 +#define R_00B80C_COMPUTE_DIM_Z 0x00B80C +#define R_00B810_COMPUTE_START_X 0x00B810 +#define R_00B814_COMPUTE_START_Y 0x00B814 +#define R_00B818_COMPUTE_START_Z 0x00B818 +#define R_00B81C_COMPUTE_NUM_THREAD_X 0x00B81C +#define S_00B81C_NUM_THREAD_FULL(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_00B81C_NUM_THREAD_FULL(x) (((x) >> 0) & 0xFFFF) +#define C_00B81C_NUM_THREAD_FULL 0xFFFF0000 +#define S_00B81C_NUM_THREAD_PARTIAL(x) (((unsigned)(x) & 0xFFFF) << 16) +#define G_00B81C_NUM_THREAD_PARTIAL(x) (((x) >> 16) & 0xFFFF) +#define C_00B81C_NUM_THREAD_PARTIAL 0x0000FFFF +#define R_00B820_COMPUTE_NUM_THREAD_Y 0x00B820 +#define S_00B820_NUM_THREAD_FULL(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_00B820_NUM_THREAD_FULL(x) (((x) >> 0) & 0xFFFF) +#define C_00B820_NUM_THREAD_FULL 0xFFFF0000 +#define S_00B820_NUM_THREAD_PARTIAL(x) (((unsigned)(x) & 0xFFFF) << 16) +#define G_00B820_NUM_THREAD_PARTIAL(x) (((x) >> 16) & 0xFFFF) +#define C_00B820_NUM_THREAD_PARTIAL 0x0000FFFF +#define R_00B824_COMPUTE_NUM_THREAD_Z 0x00B824 +#define S_00B824_NUM_THREAD_FULL(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_00B824_NUM_THREAD_FULL(x) (((x) >> 0) & 0xFFFF) +#define C_00B824_NUM_THREAD_FULL 0xFFFF0000 +#define S_00B824_NUM_THREAD_PARTIAL(x) (((unsigned)(x) & 0xFFFF) << 16) +#define G_00B824_NUM_THREAD_PARTIAL(x) (((x) >> 16) & 0xFFFF) +#define C_00B824_NUM_THREAD_PARTIAL 0x0000FFFF +#define R_00B82C_COMPUTE_MAX_WAVE_ID 0x00B82C /* moved to 0xCD20 on CIK */ +#define S_00B82C_MAX_WAVE_ID(x) (((unsigned)(x) & 0xFFF) << 0) +#define G_00B82C_MAX_WAVE_ID(x) (((x) >> 0) & 0xFFF) +#define C_00B82C_MAX_WAVE_ID 0xFFFFF000 +/* CIK */ +#define R_00B828_COMPUTE_PIPELINESTAT_ENABLE 0x00B828 +#define S_00B828_PIPELINESTAT_ENABLE(x) (((unsigned)(x) & 0x1) << 0) +#define G_00B828_PIPELINESTAT_ENABLE(x) (((x) >> 0) & 0x1) +#define C_00B828_PIPELINESTAT_ENABLE 0xFFFFFFFE +#define R_00B82C_COMPUTE_PERFCOUNT_ENABLE 0x00B82C +#define S_00B82C_PERFCOUNT_ENABLE(x) (((unsigned)(x) & 0x1) << 0) +#define G_00B82C_PERFCOUNT_ENABLE(x) (((x) >> 0) & 0x1) +#define C_00B82C_PERFCOUNT_ENABLE 0xFFFFFFFE +/* */ +#define R_00B830_COMPUTE_PGM_LO 0x00B830 +#define R_00B834_COMPUTE_PGM_HI 0x00B834 +#define S_00B834_DATA(x) (((unsigned)(x) & 0xFF) << 0) +#define G_00B834_DATA(x) (((x) >> 0) & 0xFF) +#define C_00B834_DATA 0xFFFFFF00 +/* CIK */ +#define S_00B834_INST_ATC(x) (((unsigned)(x) & 0x1) << 8) +#define G_00B834_INST_ATC(x) (((x) >> 8) & 0x1) +#define C_00B834_INST_ATC 0xFFFFFEFF +/* */ +#define R_00B838_COMPUTE_TBA_LO 0x00B838 +#define R_00B83C_COMPUTE_TBA_HI 0x00B83C +#define S_00B83C_DATA(x) (((unsigned)(x) & 0xFF) << 0) +#define G_00B83C_DATA(x) (((x) >> 0) & 0xFF) +#define C_00B83C_DATA 0xFFFFFF00 +#define R_00B840_COMPUTE_TMA_LO 0x00B840 +#define R_00B844_COMPUTE_TMA_HI 0x00B844 +#define S_00B844_DATA(x) (((unsigned)(x) & 0xFF) << 0) +#define G_00B844_DATA(x) (((x) >> 0) & 0xFF) +#define C_00B844_DATA 0xFFFFFF00 +#define R_00B848_COMPUTE_PGM_RSRC1 0x00B848 +#define S_00B848_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) +#define G_00B848_VGPRS(x) (((x) >> 0) & 0x3F) +#define C_00B848_VGPRS 0xFFFFFFC0 +#define S_00B848_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) +#define G_00B848_SGPRS(x) (((x) >> 6) & 0x0F) +#define C_00B848_SGPRS 0xFFFFFC3F +#define S_00B848_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) +#define G_00B848_PRIORITY(x) (((x) >> 10) & 0x03) +#define C_00B848_PRIORITY 0xFFFFF3FF +#define S_00B848_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) +#define G_00B848_FLOAT_MODE(x) (((x) >> 12) & 0xFF) +#define C_00B848_FLOAT_MODE 0xFFF00FFF +#define S_00B848_PRIV(x) (((unsigned)(x) & 0x1) << 20) +#define G_00B848_PRIV(x) (((x) >> 20) & 0x1) +#define C_00B848_PRIV 0xFFEFFFFF +#define S_00B848_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) +#define G_00B848_DX10_CLAMP(x) (((x) >> 21) & 0x1) +#define C_00B848_DX10_CLAMP 0xFFDFFFFF +#define S_00B848_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) +#define G_00B848_DEBUG_MODE(x) (((x) >> 22) & 0x1) +#define C_00B848_DEBUG_MODE 0xFFBFFFFF +#define S_00B848_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) +#define G_00B848_IEEE_MODE(x) (((x) >> 23) & 0x1) +#define C_00B848_IEEE_MODE 0xFF7FFFFF +/* CIK */ +#define S_00B848_BULKY(x) (((unsigned)(x) & 0x1) << 24) +#define G_00B848_BULKY(x) (((x) >> 24) & 0x1) +#define C_00B848_BULKY 0xFEFFFFFF +#define S_00B848_CDBG_USER(x) (((unsigned)(x) & 0x1) << 25) +#define G_00B848_CDBG_USER(x) (((x) >> 25) & 0x1) +#define C_00B848_CDBG_USER 0xFDFFFFFF +/* */ +#define R_00B84C_COMPUTE_PGM_RSRC2 0x00B84C +#define S_00B84C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) +#define G_00B84C_SCRATCH_EN(x) (((x) >> 0) & 0x1) +#define C_00B84C_SCRATCH_EN 0xFFFFFFFE +#define S_00B84C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) +#define G_00B84C_USER_SGPR(x) (((x) >> 1) & 0x1F) +#define C_00B84C_USER_SGPR 0xFFFFFFC1 +#define S_00B84C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) +#define G_00B84C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) +#define C_00B84C_TRAP_PRESENT 0xFFFFFFBF +#define S_00B84C_TGID_X_EN(x) (((unsigned)(x) & 0x1) << 7) +#define G_00B84C_TGID_X_EN(x) (((x) >> 7) & 0x1) +#define C_00B84C_TGID_X_EN 0xFFFFFF7F +#define S_00B84C_TGID_Y_EN(x) (((unsigned)(x) & 0x1) << 8) +#define G_00B84C_TGID_Y_EN(x) (((x) >> 8) & 0x1) +#define C_00B84C_TGID_Y_EN 0xFFFFFEFF +#define S_00B84C_TGID_Z_EN(x) (((unsigned)(x) & 0x1) << 9) +#define G_00B84C_TGID_Z_EN(x) (((x) >> 9) & 0x1) +#define C_00B84C_TGID_Z_EN 0xFFFFFDFF +#define S_00B84C_TG_SIZE_EN(x) (((unsigned)(x) & 0x1) << 10) +#define G_00B84C_TG_SIZE_EN(x) (((x) >> 10) & 0x1) +#define C_00B84C_TG_SIZE_EN 0xFFFFFBFF +#define S_00B84C_TIDIG_COMP_CNT(x) (((unsigned)(x) & 0x03) << 11) +#define G_00B84C_TIDIG_COMP_CNT(x) (((x) >> 11) & 0x03) +#define C_00B84C_TIDIG_COMP_CNT 0xFFFFE7FF +/* CIK */ +#define S_00B84C_EXCP_EN_MSB(x) (((unsigned)(x) & 0x03) << 13) +#define G_00B84C_EXCP_EN_MSB(x) (((x) >> 13) & 0x03) +#define C_00B84C_EXCP_EN_MSB 0xFFFF9FFF +/* */ +#define S_00B84C_LDS_SIZE(x) (((unsigned)(x) & 0x1FF) << 15) +#define G_00B84C_LDS_SIZE(x) (((x) >> 15) & 0x1FF) +#define C_00B84C_LDS_SIZE 0xFF007FFF +#define S_00B84C_EXCP_EN(x) (((unsigned)(x) & 0x7F) << 24) +#define G_00B84C_EXCP_EN(x) (((x) >> 24) & 0x7F) +#define C_00B84C_EXCP_EN 0x80FFFFFF +#define R_00B850_COMPUTE_VMID 0x00B850 +#define S_00B850_DATA(x) (((unsigned)(x) & 0x0F) << 0) +#define G_00B850_DATA(x) (((x) >> 0) & 0x0F) +#define C_00B850_DATA 0xFFFFFFF0 +#define R_00B854_COMPUTE_RESOURCE_LIMITS 0x00B854 +#define S_00B854_WAVES_PER_SH(x) (((unsigned)(x) & 0x3F) << 0) /* mask is 0x3FF on CIK */ +#define G_00B854_WAVES_PER_SH(x) (((x) >> 0) & 0x3F) /* mask is 0x3FF on CIK */ +#define C_00B854_WAVES_PER_SH 0xFFFFFFC0 /* mask is 0x3FF on CIK */ +#define S_00B854_WAVES_PER_SH_CIK(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_00B854_WAVES_PER_SH_CIK(x) (((x) >> 0) & 0x3FF) +#define C_00B854_WAVES_PER_SH_CIK 0xFFFFFC00 +#define S_00B854_TG_PER_CU(x) (((unsigned)(x) & 0x0F) << 12) +#define G_00B854_TG_PER_CU(x) (((x) >> 12) & 0x0F) +#define C_00B854_TG_PER_CU 0xFFFF0FFF +#define S_00B854_LOCK_THRESHOLD(x) (((unsigned)(x) & 0x3F) << 16) +#define G_00B854_LOCK_THRESHOLD(x) (((x) >> 16) & 0x3F) +#define C_00B854_LOCK_THRESHOLD 0xFFC0FFFF +#define S_00B854_SIMD_DEST_CNTL(x) (((unsigned)(x) & 0x1) << 22) +#define G_00B854_SIMD_DEST_CNTL(x) (((x) >> 22) & 0x1) +#define C_00B854_SIMD_DEST_CNTL 0xFFBFFFFF +/* CIK */ +#define S_00B854_FORCE_SIMD_DIST(x) (((unsigned)(x) & 0x1) << 23) +#define G_00B854_FORCE_SIMD_DIST(x) (((x) >> 23) & 0x1) +#define C_00B854_FORCE_SIMD_DIST 0xFF7FFFFF +#define S_00B854_CU_GROUP_COUNT(x) (((unsigned)(x) & 0x07) << 24) +#define G_00B854_CU_GROUP_COUNT(x) (((x) >> 24) & 0x07) +#define C_00B854_CU_GROUP_COUNT 0xF8FFFFFF +/* */ +#define R_00B858_COMPUTE_STATIC_THREAD_MGMT_SE0 0x00B858 +#define S_00B858_SH0_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_00B858_SH0_CU_EN(x) (((x) >> 0) & 0xFFFF) +#define C_00B858_SH0_CU_EN 0xFFFF0000 +#define S_00B858_SH1_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 16) +#define G_00B858_SH1_CU_EN(x) (((x) >> 16) & 0xFFFF) +#define C_00B858_SH1_CU_EN 0x0000FFFF +#define R_00B85C_COMPUTE_STATIC_THREAD_MGMT_SE1 0x00B85C +#define S_00B85C_SH0_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_00B85C_SH0_CU_EN(x) (((x) >> 0) & 0xFFFF) +#define C_00B85C_SH0_CU_EN 0xFFFF0000 +#define S_00B85C_SH1_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 16) +#define G_00B85C_SH1_CU_EN(x) (((x) >> 16) & 0xFFFF) +#define C_00B85C_SH1_CU_EN 0x0000FFFF +#define R_00B860_COMPUTE_TMPRING_SIZE 0x00B860 +#define S_00B860_WAVES(x) (((unsigned)(x) & 0xFFF) << 0) +#define G_00B860_WAVES(x) (((x) >> 0) & 0xFFF) +#define C_00B860_WAVES 0xFFFFF000 +#define S_00B860_WAVESIZE(x) (((unsigned)(x) & 0x1FFF) << 12) +#define G_00B860_WAVESIZE(x) (((x) >> 12) & 0x1FFF) +#define C_00B860_WAVESIZE 0xFE000FFF +/* CIK */ +#define R_00B864_COMPUTE_STATIC_THREAD_MGMT_SE2 0x00B864 +#define S_00B864_SH0_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_00B864_SH0_CU_EN(x) (((x) >> 0) & 0xFFFF) +#define C_00B864_SH0_CU_EN 0xFFFF0000 +#define S_00B864_SH1_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 16) +#define G_00B864_SH1_CU_EN(x) (((x) >> 16) & 0xFFFF) +#define C_00B864_SH1_CU_EN 0x0000FFFF +#define R_00B868_COMPUTE_STATIC_THREAD_MGMT_SE3 0x00B868 +#define S_00B868_SH0_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_00B868_SH0_CU_EN(x) (((x) >> 0) & 0xFFFF) +#define C_00B868_SH0_CU_EN 0xFFFF0000 +#define S_00B868_SH1_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 16) +#define G_00B868_SH1_CU_EN(x) (((x) >> 16) & 0xFFFF) +#define C_00B868_SH1_CU_EN 0x0000FFFF +#define R_00B86C_COMPUTE_RESTART_X 0x00B86C +#define R_00B870_COMPUTE_RESTART_Y 0x00B870 +#define R_00B874_COMPUTE_RESTART_Z 0x00B874 +#define R_00B87C_COMPUTE_MISC_RESERVED 0x00B87C +#define S_00B87C_SEND_SEID(x) (((unsigned)(x) & 0x03) << 0) +#define G_00B87C_SEND_SEID(x) (((x) >> 0) & 0x03) +#define C_00B87C_SEND_SEID 0xFFFFFFFC +#define S_00B87C_RESERVED2(x) (((unsigned)(x) & 0x1) << 2) +#define G_00B87C_RESERVED2(x) (((x) >> 2) & 0x1) +#define C_00B87C_RESERVED2 0xFFFFFFFB +#define S_00B87C_RESERVED3(x) (((unsigned)(x) & 0x1) << 3) +#define G_00B87C_RESERVED3(x) (((x) >> 3) & 0x1) +#define C_00B87C_RESERVED3 0xFFFFFFF7 +#define S_00B87C_RESERVED4(x) (((unsigned)(x) & 0x1) << 4) +#define G_00B87C_RESERVED4(x) (((x) >> 4) & 0x1) +#define C_00B87C_RESERVED4 0xFFFFFFEF +/* VI */ +#define S_00B87C_WAVE_ID_BASE(x) (((unsigned)(x) & 0xFFF) << 5) +#define G_00B87C_WAVE_ID_BASE(x) (((x) >> 5) & 0xFFF) +#define C_00B87C_WAVE_ID_BASE 0xFFFE001F +#define R_00B880_COMPUTE_DISPATCH_ID 0x00B880 +#define R_00B884_COMPUTE_THREADGROUP_ID 0x00B884 +#define R_00B888_COMPUTE_RELAUNCH 0x00B888 +#define S_00B888_PAYLOAD(x) (((unsigned)(x) & 0x3FFFFFFF) << 0) +#define G_00B888_PAYLOAD(x) (((x) >> 0) & 0x3FFFFFFF) +#define C_00B888_PAYLOAD 0xC0000000 +#define S_00B888_IS_EVENT(x) (((unsigned)(x) & 0x1) << 30) +#define G_00B888_IS_EVENT(x) (((x) >> 30) & 0x1) +#define C_00B888_IS_EVENT 0xBFFFFFFF +#define S_00B888_IS_STATE(x) (((unsigned)(x) & 0x1) << 31) +#define G_00B888_IS_STATE(x) (((x) >> 31) & 0x1) +#define C_00B888_IS_STATE 0x7FFFFFFF +#define R_00B88C_COMPUTE_WAVE_RESTORE_ADDR_LO 0x00B88C +#define R_00B890_COMPUTE_WAVE_RESTORE_ADDR_HI 0x00B890 +#define S_00B890_ADDR(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_00B890_ADDR(x) (((x) >> 0) & 0xFFFF) +#define C_00B890_ADDR 0xFFFF0000 +#define R_00B894_COMPUTE_WAVE_RESTORE_CONTROL 0x00B894 +#define S_00B894_ATC(x) (((unsigned)(x) & 0x1) << 0) +#define G_00B894_ATC(x) (((x) >> 0) & 0x1) +#define C_00B894_ATC 0xFFFFFFFE +#define S_00B894_MTYPE(x) (((unsigned)(x) & 0x03) << 1) +#define G_00B894_MTYPE(x) (((x) >> 1) & 0x03) +#define C_00B894_MTYPE 0xFFFFFFF9 +/* */ +/* */ +#define R_00B900_COMPUTE_USER_DATA_0 0x00B900 +#define R_00B904_COMPUTE_USER_DATA_1 0x00B904 +#define R_00B908_COMPUTE_USER_DATA_2 0x00B908 +#define R_00B90C_COMPUTE_USER_DATA_3 0x00B90C +#define R_00B910_COMPUTE_USER_DATA_4 0x00B910 +#define R_00B914_COMPUTE_USER_DATA_5 0x00B914 +#define R_00B918_COMPUTE_USER_DATA_6 0x00B918 +#define R_00B91C_COMPUTE_USER_DATA_7 0x00B91C +#define R_00B920_COMPUTE_USER_DATA_8 0x00B920 +#define R_00B924_COMPUTE_USER_DATA_9 0x00B924 +#define R_00B928_COMPUTE_USER_DATA_10 0x00B928 +#define R_00B92C_COMPUTE_USER_DATA_11 0x00B92C +#define R_00B930_COMPUTE_USER_DATA_12 0x00B930 +#define R_00B934_COMPUTE_USER_DATA_13 0x00B934 +#define R_00B938_COMPUTE_USER_DATA_14 0x00B938 +#define R_00B93C_COMPUTE_USER_DATA_15 0x00B93C +#define R_00B9FC_COMPUTE_NOWHERE 0x00B9FC +#define R_034000_CPG_PERFCOUNTER1_LO 0x034000 +#define R_034004_CPG_PERFCOUNTER1_HI 0x034004 +#define R_034008_CPG_PERFCOUNTER0_LO 0x034008 +#define R_03400C_CPG_PERFCOUNTER0_HI 0x03400C +#define R_034010_CPC_PERFCOUNTER1_LO 0x034010 +#define R_034014_CPC_PERFCOUNTER1_HI 0x034014 +#define R_034018_CPC_PERFCOUNTER0_LO 0x034018 +#define R_03401C_CPC_PERFCOUNTER0_HI 0x03401C +#define R_034020_CPF_PERFCOUNTER1_LO 0x034020 +#define R_034024_CPF_PERFCOUNTER1_HI 0x034024 +#define R_034028_CPF_PERFCOUNTER0_LO 0x034028 +#define R_03402C_CPF_PERFCOUNTER0_HI 0x03402C +#define R_034100_GRBM_PERFCOUNTER0_LO 0x034100 +#define R_034104_GRBM_PERFCOUNTER0_HI 0x034104 +#define R_03410C_GRBM_PERFCOUNTER1_LO 0x03410C +#define R_034110_GRBM_PERFCOUNTER1_HI 0x034110 +#define R_034114_GRBM_SE0_PERFCOUNTER_LO 0x034114 +#define R_034118_GRBM_SE0_PERFCOUNTER_HI 0x034118 +#define R_03411C_GRBM_SE1_PERFCOUNTER_LO 0x03411C +#define R_034120_GRBM_SE1_PERFCOUNTER_HI 0x034120 +#define R_034124_GRBM_SE2_PERFCOUNTER_LO 0x034124 +#define R_034128_GRBM_SE2_PERFCOUNTER_HI 0x034128 +#define R_03412C_GRBM_SE3_PERFCOUNTER_LO 0x03412C +#define R_034130_GRBM_SE3_PERFCOUNTER_HI 0x034130 +#define R_034200_WD_PERFCOUNTER0_LO 0x034200 +#define R_034204_WD_PERFCOUNTER0_HI 0x034204 +#define R_034208_WD_PERFCOUNTER1_LO 0x034208 +#define R_03420C_WD_PERFCOUNTER1_HI 0x03420C +#define R_034210_WD_PERFCOUNTER2_LO 0x034210 +#define R_034214_WD_PERFCOUNTER2_HI 0x034214 +#define R_034218_WD_PERFCOUNTER3_LO 0x034218 +#define R_03421C_WD_PERFCOUNTER3_HI 0x03421C +#define R_034220_IA_PERFCOUNTER0_LO 0x034220 +#define R_034224_IA_PERFCOUNTER0_HI 0x034224 +#define R_034228_IA_PERFCOUNTER1_LO 0x034228 +#define R_03422C_IA_PERFCOUNTER1_HI 0x03422C +#define R_034230_IA_PERFCOUNTER2_LO 0x034230 +#define R_034234_IA_PERFCOUNTER2_HI 0x034234 +#define R_034238_IA_PERFCOUNTER3_LO 0x034238 +#define R_03423C_IA_PERFCOUNTER3_HI 0x03423C +#define R_034240_VGT_PERFCOUNTER0_LO 0x034240 +#define R_034244_VGT_PERFCOUNTER0_HI 0x034244 +#define R_034248_VGT_PERFCOUNTER1_LO 0x034248 +#define R_03424C_VGT_PERFCOUNTER1_HI 0x03424C +#define R_034250_VGT_PERFCOUNTER2_LO 0x034250 +#define R_034254_VGT_PERFCOUNTER2_HI 0x034254 +#define R_034258_VGT_PERFCOUNTER3_LO 0x034258 +#define R_03425C_VGT_PERFCOUNTER3_HI 0x03425C +#define R_034400_PA_SU_PERFCOUNTER0_LO 0x034400 +#define R_034404_PA_SU_PERFCOUNTER0_HI 0x034404 +#define S_034404_PERFCOUNTER_HI(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_034404_PERFCOUNTER_HI(x) (((x) >> 0) & 0xFFFF) +#define C_034404_PERFCOUNTER_HI 0xFFFF0000 +#define R_034408_PA_SU_PERFCOUNTER1_LO 0x034408 +#define R_03440C_PA_SU_PERFCOUNTER1_HI 0x03440C +#define R_034410_PA_SU_PERFCOUNTER2_LO 0x034410 +#define R_034414_PA_SU_PERFCOUNTER2_HI 0x034414 +#define R_034418_PA_SU_PERFCOUNTER3_LO 0x034418 +#define R_03441C_PA_SU_PERFCOUNTER3_HI 0x03441C +#define R_034500_PA_SC_PERFCOUNTER0_LO 0x034500 +#define R_034504_PA_SC_PERFCOUNTER0_HI 0x034504 +#define R_034508_PA_SC_PERFCOUNTER1_LO 0x034508 +#define R_03450C_PA_SC_PERFCOUNTER1_HI 0x03450C +#define R_034510_PA_SC_PERFCOUNTER2_LO 0x034510 +#define R_034514_PA_SC_PERFCOUNTER2_HI 0x034514 +#define R_034518_PA_SC_PERFCOUNTER3_LO 0x034518 +#define R_03451C_PA_SC_PERFCOUNTER3_HI 0x03451C +#define R_034520_PA_SC_PERFCOUNTER4_LO 0x034520 +#define R_034524_PA_SC_PERFCOUNTER4_HI 0x034524 +#define R_034528_PA_SC_PERFCOUNTER5_LO 0x034528 +#define R_03452C_PA_SC_PERFCOUNTER5_HI 0x03452C +#define R_034530_PA_SC_PERFCOUNTER6_LO 0x034530 +#define R_034534_PA_SC_PERFCOUNTER6_HI 0x034534 +#define R_034538_PA_SC_PERFCOUNTER7_LO 0x034538 +#define R_03453C_PA_SC_PERFCOUNTER7_HI 0x03453C +#define R_034600_SPI_PERFCOUNTER0_HI 0x034600 +#define R_034604_SPI_PERFCOUNTER0_LO 0x034604 +#define R_034608_SPI_PERFCOUNTER1_HI 0x034608 +#define R_03460C_SPI_PERFCOUNTER1_LO 0x03460C +#define R_034610_SPI_PERFCOUNTER2_HI 0x034610 +#define R_034614_SPI_PERFCOUNTER2_LO 0x034614 +#define R_034618_SPI_PERFCOUNTER3_HI 0x034618 +#define R_03461C_SPI_PERFCOUNTER3_LO 0x03461C +#define R_034620_SPI_PERFCOUNTER4_HI 0x034620 +#define R_034624_SPI_PERFCOUNTER4_LO 0x034624 +#define R_034628_SPI_PERFCOUNTER5_HI 0x034628 +#define R_03462C_SPI_PERFCOUNTER5_LO 0x03462C +#define R_034700_SQ_PERFCOUNTER0_LO 0x034700 +#define R_034704_SQ_PERFCOUNTER0_HI 0x034704 +#define R_034708_SQ_PERFCOUNTER1_LO 0x034708 +#define R_03470C_SQ_PERFCOUNTER1_HI 0x03470C +#define R_034710_SQ_PERFCOUNTER2_LO 0x034710 +#define R_034714_SQ_PERFCOUNTER2_HI 0x034714 +#define R_034718_SQ_PERFCOUNTER3_LO 0x034718 +#define R_03471C_SQ_PERFCOUNTER3_HI 0x03471C +#define R_034720_SQ_PERFCOUNTER4_LO 0x034720 +#define R_034724_SQ_PERFCOUNTER4_HI 0x034724 +#define R_034728_SQ_PERFCOUNTER5_LO 0x034728 +#define R_03472C_SQ_PERFCOUNTER5_HI 0x03472C +#define R_034730_SQ_PERFCOUNTER6_LO 0x034730 +#define R_034734_SQ_PERFCOUNTER6_HI 0x034734 +#define R_034738_SQ_PERFCOUNTER7_LO 0x034738 +#define R_03473C_SQ_PERFCOUNTER7_HI 0x03473C +#define R_034740_SQ_PERFCOUNTER8_LO 0x034740 +#define R_034744_SQ_PERFCOUNTER8_HI 0x034744 +#define R_034748_SQ_PERFCOUNTER9_LO 0x034748 +#define R_03474C_SQ_PERFCOUNTER9_HI 0x03474C +#define R_034750_SQ_PERFCOUNTER10_LO 0x034750 +#define R_034754_SQ_PERFCOUNTER10_HI 0x034754 +#define R_034758_SQ_PERFCOUNTER11_LO 0x034758 +#define R_03475C_SQ_PERFCOUNTER11_HI 0x03475C +#define R_034760_SQ_PERFCOUNTER12_LO 0x034760 +#define R_034764_SQ_PERFCOUNTER12_HI 0x034764 +#define R_034768_SQ_PERFCOUNTER13_LO 0x034768 +#define R_03476C_SQ_PERFCOUNTER13_HI 0x03476C +#define R_034770_SQ_PERFCOUNTER14_LO 0x034770 +#define R_034774_SQ_PERFCOUNTER14_HI 0x034774 +#define R_034778_SQ_PERFCOUNTER15_LO 0x034778 +#define R_03477C_SQ_PERFCOUNTER15_HI 0x03477C +#define R_034900_SX_PERFCOUNTER0_LO 0x034900 +#define R_034904_SX_PERFCOUNTER0_HI 0x034904 +#define R_034908_SX_PERFCOUNTER1_LO 0x034908 +#define R_03490C_SX_PERFCOUNTER1_HI 0x03490C +#define R_034910_SX_PERFCOUNTER2_LO 0x034910 +#define R_034914_SX_PERFCOUNTER2_HI 0x034914 +#define R_034918_SX_PERFCOUNTER3_LO 0x034918 +#define R_03491C_SX_PERFCOUNTER3_HI 0x03491C +#define R_034A00_GDS_PERFCOUNTER0_LO 0x034A00 +#define R_034A04_GDS_PERFCOUNTER0_HI 0x034A04 +#define R_034A08_GDS_PERFCOUNTER1_LO 0x034A08 +#define R_034A0C_GDS_PERFCOUNTER1_HI 0x034A0C +#define R_034A10_GDS_PERFCOUNTER2_LO 0x034A10 +#define R_034A14_GDS_PERFCOUNTER2_HI 0x034A14 +#define R_034A18_GDS_PERFCOUNTER3_LO 0x034A18 +#define R_034A1C_GDS_PERFCOUNTER3_HI 0x034A1C +#define R_034B00_TA_PERFCOUNTER0_LO 0x034B00 +#define R_034B04_TA_PERFCOUNTER0_HI 0x034B04 +#define R_034B08_TA_PERFCOUNTER1_LO 0x034B08 +#define R_034B0C_TA_PERFCOUNTER1_HI 0x034B0C +#define R_034C00_TD_PERFCOUNTER0_LO 0x034C00 +#define R_034C04_TD_PERFCOUNTER0_HI 0x034C04 +#define R_034C08_TD_PERFCOUNTER1_LO 0x034C08 +#define R_034C0C_TD_PERFCOUNTER1_HI 0x034C0C +#define R_034D00_TCP_PERFCOUNTER0_LO 0x034D00 +#define R_034D04_TCP_PERFCOUNTER0_HI 0x034D04 +#define R_034D08_TCP_PERFCOUNTER1_LO 0x034D08 +#define R_034D0C_TCP_PERFCOUNTER1_HI 0x034D0C +#define R_034D10_TCP_PERFCOUNTER2_LO 0x034D10 +#define R_034D14_TCP_PERFCOUNTER2_HI 0x034D14 +#define R_034D18_TCP_PERFCOUNTER3_LO 0x034D18 +#define R_034D1C_TCP_PERFCOUNTER3_HI 0x034D1C +#define R_034E00_TCC_PERFCOUNTER0_LO 0x034E00 +#define R_034E04_TCC_PERFCOUNTER0_HI 0x034E04 +#define R_034E08_TCC_PERFCOUNTER1_LO 0x034E08 +#define R_034E0C_TCC_PERFCOUNTER1_HI 0x034E0C +#define R_034E10_TCC_PERFCOUNTER2_LO 0x034E10 +#define R_034E14_TCC_PERFCOUNTER2_HI 0x034E14 +#define R_034E18_TCC_PERFCOUNTER3_LO 0x034E18 +#define R_034E1C_TCC_PERFCOUNTER3_HI 0x034E1C +#define R_034E40_TCA_PERFCOUNTER0_LO 0x034E40 +#define R_034E44_TCA_PERFCOUNTER0_HI 0x034E44 +#define R_034E48_TCA_PERFCOUNTER1_LO 0x034E48 +#define R_034E4C_TCA_PERFCOUNTER1_HI 0x034E4C +#define R_034E50_TCA_PERFCOUNTER2_LO 0x034E50 +#define R_034E54_TCA_PERFCOUNTER2_HI 0x034E54 +#define R_034E58_TCA_PERFCOUNTER3_LO 0x034E58 +#define R_034E5C_TCA_PERFCOUNTER3_HI 0x034E5C +#define R_035018_CB_PERFCOUNTER0_LO 0x035018 +#define R_03501C_CB_PERFCOUNTER0_HI 0x03501C +#define R_035020_CB_PERFCOUNTER1_LO 0x035020 +#define R_035024_CB_PERFCOUNTER1_HI 0x035024 +#define R_035028_CB_PERFCOUNTER2_LO 0x035028 +#define R_03502C_CB_PERFCOUNTER2_HI 0x03502C +#define R_035030_CB_PERFCOUNTER3_LO 0x035030 +#define R_035034_CB_PERFCOUNTER3_HI 0x035034 +#define R_035100_DB_PERFCOUNTER0_LO 0x035100 +#define R_035104_DB_PERFCOUNTER0_HI 0x035104 +#define R_035108_DB_PERFCOUNTER1_LO 0x035108 +#define R_03510C_DB_PERFCOUNTER1_HI 0x03510C +#define R_035110_DB_PERFCOUNTER2_LO 0x035110 +#define R_035114_DB_PERFCOUNTER2_HI 0x035114 +#define R_035118_DB_PERFCOUNTER3_LO 0x035118 +#define R_03511C_DB_PERFCOUNTER3_HI 0x03511C +#define R_035200_RLC_PERFCOUNTER0_LO 0x035200 +#define R_035204_RLC_PERFCOUNTER0_HI 0x035204 +#define R_035208_RLC_PERFCOUNTER1_LO 0x035208 +#define R_03520C_RLC_PERFCOUNTER1_HI 0x03520C +#define R_036000_CPG_PERFCOUNTER1_SELECT 0x036000 +#define R_036004_CPG_PERFCOUNTER0_SELECT1 0x036004 +#define S_036004_PERF_SEL2(x) (((unsigned)(x) & 0x3F) << 0) +#define G_036004_PERF_SEL2(x) (((x) >> 0) & 0x3F) +#define C_036004_PERF_SEL2 0xFFFFFFC0 +#define S_036004_PERF_SEL3(x) (((unsigned)(x) & 0x3F) << 10) +#define G_036004_PERF_SEL3(x) (((x) >> 10) & 0x3F) +#define C_036004_PERF_SEL3 0xFFFF03FF +#define R_036008_CPG_PERFCOUNTER0_SELECT 0x036008 +#define S_036008_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) +#define G_036008_PERF_SEL(x) (((x) >> 0) & 0x3F) +#define C_036008_PERF_SEL 0xFFFFFFC0 +#define S_036008_PERF_SEL1(x) (((unsigned)(x) & 0x3F) << 10) +#define G_036008_PERF_SEL1(x) (((x) >> 10) & 0x3F) +#define C_036008_PERF_SEL1 0xFFFF03FF +#define S_036008_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) +#define G_036008_CNTR_MODE(x) (((x) >> 20) & 0x0F) +#define C_036008_CNTR_MODE 0xFF0FFFFF +#define R_03600C_CPC_PERFCOUNTER1_SELECT 0x03600C +#define R_036010_CPC_PERFCOUNTER0_SELECT1 0x036010 +#define S_036010_PERF_SEL2(x) (((unsigned)(x) & 0x3F) << 0) +#define G_036010_PERF_SEL2(x) (((x) >> 0) & 0x3F) +#define C_036010_PERF_SEL2 0xFFFFFFC0 +#define S_036010_PERF_SEL3(x) (((unsigned)(x) & 0x3F) << 10) +#define G_036010_PERF_SEL3(x) (((x) >> 10) & 0x3F) +#define C_036010_PERF_SEL3 0xFFFF03FF +#define R_036014_CPF_PERFCOUNTER1_SELECT 0x036014 +#define R_036018_CPF_PERFCOUNTER0_SELECT1 0x036018 +#define S_036018_PERF_SEL2(x) (((unsigned)(x) & 0x3F) << 0) +#define G_036018_PERF_SEL2(x) (((x) >> 0) & 0x3F) +#define C_036018_PERF_SEL2 0xFFFFFFC0 +#define S_036018_PERF_SEL3(x) (((unsigned)(x) & 0x3F) << 10) +#define G_036018_PERF_SEL3(x) (((x) >> 10) & 0x3F) +#define C_036018_PERF_SEL3 0xFFFF03FF +#define R_03601C_CPF_PERFCOUNTER0_SELECT 0x03601C +#define S_03601C_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) +#define G_03601C_PERF_SEL(x) (((x) >> 0) & 0x3F) +#define C_03601C_PERF_SEL 0xFFFFFFC0 +#define S_03601C_PERF_SEL1(x) (((unsigned)(x) & 0x3F) << 10) +#define G_03601C_PERF_SEL1(x) (((x) >> 10) & 0x3F) +#define C_03601C_PERF_SEL1 0xFFFF03FF +#define S_03601C_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) +#define G_03601C_CNTR_MODE(x) (((x) >> 20) & 0x0F) +#define C_03601C_CNTR_MODE 0xFF0FFFFF +#define R_036020_CP_PERFMON_CNTL 0x036020 +#define S_036020_PERFMON_STATE(x) (((unsigned)(x) & 0x0F) << 0) +#define G_036020_PERFMON_STATE(x) (((x) >> 0) & 0x0F) +#define C_036020_PERFMON_STATE 0xFFFFFFF0 +#define V_036020_DISABLE_AND_RESET 0x00 +#define V_036020_START_COUNTING 0x01 +#define V_036020_STOP_COUNTING 0x02 +#define S_036020_SPM_PERFMON_STATE(x) (((unsigned)(x) & 0x0F) << 4) +#define G_036020_SPM_PERFMON_STATE(x) (((x) >> 4) & 0x0F) +#define C_036020_SPM_PERFMON_STATE 0xFFFFFF0F +#define S_036020_PERFMON_ENABLE_MODE(x) (((unsigned)(x) & 0x03) << 8) +#define G_036020_PERFMON_ENABLE_MODE(x) (((x) >> 8) & 0x03) +#define C_036020_PERFMON_ENABLE_MODE 0xFFFFFCFF +#define S_036020_PERFMON_SAMPLE_ENABLE(x) (((unsigned)(x) & 0x1) << 10) +#define G_036020_PERFMON_SAMPLE_ENABLE(x) (((x) >> 10) & 0x1) +#define C_036020_PERFMON_SAMPLE_ENABLE 0xFFFFFBFF +#define R_036024_CPC_PERFCOUNTER0_SELECT 0x036024 +#define S_036024_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) +#define G_036024_PERF_SEL(x) (((x) >> 0) & 0x3F) +#define C_036024_PERF_SEL 0xFFFFFFC0 +#define S_036024_PERF_SEL1(x) (((unsigned)(x) & 0x3F) << 10) +#define G_036024_PERF_SEL1(x) (((x) >> 10) & 0x3F) +#define C_036024_PERF_SEL1 0xFFFF03FF +#define S_036024_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) +#define G_036024_CNTR_MODE(x) (((x) >> 20) & 0x0F) +#define C_036024_CNTR_MODE 0xFF0FFFFF +#define R_036100_GRBM_PERFCOUNTER0_SELECT 0x036100 +#define S_036100_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) +#define G_036100_PERF_SEL(x) (((x) >> 0) & 0x3F) +#define C_036100_PERF_SEL 0xFFFFFFC0 +#define S_036100_DB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 10) +#define G_036100_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1) +#define C_036100_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF +#define S_036100_CB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 11) +#define G_036100_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1) +#define C_036100_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF +#define S_036100_VGT_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 12) +#define G_036100_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1) +#define C_036100_VGT_BUSY_USER_DEFINED_MASK 0xFFFFEFFF +#define S_036100_TA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 13) +#define G_036100_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1) +#define C_036100_TA_BUSY_USER_DEFINED_MASK 0xFFFFDFFF +#define S_036100_SX_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 14) +#define G_036100_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 14) & 0x1) +#define C_036100_SX_BUSY_USER_DEFINED_MASK 0xFFFFBFFF +#define S_036100_SPI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 16) +#define G_036100_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1) +#define C_036100_SPI_BUSY_USER_DEFINED_MASK 0xFFFEFFFF +#define S_036100_SC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 17) +#define G_036100_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1) +#define C_036100_SC_BUSY_USER_DEFINED_MASK 0xFFFDFFFF +#define S_036100_PA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 18) +#define G_036100_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1) +#define C_036100_PA_BUSY_USER_DEFINED_MASK 0xFFFBFFFF +#define S_036100_GRBM_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 19) +#define G_036100_GRBM_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1) +#define C_036100_GRBM_BUSY_USER_DEFINED_MASK 0xFFF7FFFF +#define S_036100_DB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 20) +#define G_036100_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1) +#define C_036100_DB_BUSY_USER_DEFINED_MASK 0xFFEFFFFF +#define S_036100_CB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 21) +#define G_036100_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1) +#define C_036100_CB_BUSY_USER_DEFINED_MASK 0xFFDFFFFF +#define S_036100_CP_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 22) +#define G_036100_CP_BUSY_USER_DEFINED_MASK(x) (((x) >> 22) & 0x1) +#define C_036100_CP_BUSY_USER_DEFINED_MASK 0xFFBFFFFF +#define S_036100_IA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 23) +#define G_036100_IA_BUSY_USER_DEFINED_MASK(x) (((x) >> 23) & 0x1) +#define C_036100_IA_BUSY_USER_DEFINED_MASK 0xFF7FFFFF +#define S_036100_GDS_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 24) +#define G_036100_GDS_BUSY_USER_DEFINED_MASK(x) (((x) >> 24) & 0x1) +#define C_036100_GDS_BUSY_USER_DEFINED_MASK 0xFEFFFFFF +#define S_036100_BCI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 25) +#define G_036100_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 25) & 0x1) +#define C_036100_BCI_BUSY_USER_DEFINED_MASK 0xFDFFFFFF +#define S_036100_RLC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 26) +#define G_036100_RLC_BUSY_USER_DEFINED_MASK(x) (((x) >> 26) & 0x1) +#define C_036100_RLC_BUSY_USER_DEFINED_MASK 0xFBFFFFFF +#define S_036100_TC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 27) +#define G_036100_TC_BUSY_USER_DEFINED_MASK(x) (((x) >> 27) & 0x1) +#define C_036100_TC_BUSY_USER_DEFINED_MASK 0xF7FFFFFF +#define S_036100_WD_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 28) +#define G_036100_WD_BUSY_USER_DEFINED_MASK(x) (((x) >> 28) & 0x1) +#define C_036100_WD_BUSY_USER_DEFINED_MASK 0xEFFFFFFF +#define R_036104_GRBM_PERFCOUNTER1_SELECT 0x036104 +#define R_036108_GRBM_SE0_PERFCOUNTER_SELECT 0x036108 +#define S_036108_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) +#define G_036108_PERF_SEL(x) (((x) >> 0) & 0x3F) +#define C_036108_PERF_SEL 0xFFFFFFC0 +#define S_036108_DB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 10) +#define G_036108_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1) +#define C_036108_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF +#define S_036108_CB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 11) +#define G_036108_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1) +#define C_036108_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF +#define S_036108_TA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 12) +#define G_036108_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1) +#define C_036108_TA_BUSY_USER_DEFINED_MASK 0xFFFFEFFF +#define S_036108_SX_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 13) +#define G_036108_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1) +#define C_036108_SX_BUSY_USER_DEFINED_MASK 0xFFFFDFFF +#define S_036108_SPI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 15) +#define G_036108_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 15) & 0x1) +#define C_036108_SPI_BUSY_USER_DEFINED_MASK 0xFFFF7FFF +#define S_036108_SC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 16) +#define G_036108_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1) +#define C_036108_SC_BUSY_USER_DEFINED_MASK 0xFFFEFFFF +#define S_036108_DB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 17) +#define G_036108_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1) +#define C_036108_DB_BUSY_USER_DEFINED_MASK 0xFFFDFFFF +#define S_036108_CB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 18) +#define G_036108_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1) +#define C_036108_CB_BUSY_USER_DEFINED_MASK 0xFFFBFFFF +#define S_036108_VGT_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 19) +#define G_036108_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1) +#define C_036108_VGT_BUSY_USER_DEFINED_MASK 0xFFF7FFFF +#define S_036108_PA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 20) +#define G_036108_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1) +#define C_036108_PA_BUSY_USER_DEFINED_MASK 0xFFEFFFFF +#define S_036108_BCI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 21) +#define G_036108_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1) +#define C_036108_BCI_BUSY_USER_DEFINED_MASK 0xFFDFFFFF +#define R_03610C_GRBM_SE1_PERFCOUNTER_SELECT 0x03610C +#define S_03610C_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) +#define G_03610C_PERF_SEL(x) (((x) >> 0) & 0x3F) +#define C_03610C_PERF_SEL 0xFFFFFFC0 +#define S_03610C_DB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 10) +#define G_03610C_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1) +#define C_03610C_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF +#define S_03610C_CB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 11) +#define G_03610C_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1) +#define C_03610C_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF +#define S_03610C_TA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 12) +#define G_03610C_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1) +#define C_03610C_TA_BUSY_USER_DEFINED_MASK 0xFFFFEFFF +#define S_03610C_SX_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 13) +#define G_03610C_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1) +#define C_03610C_SX_BUSY_USER_DEFINED_MASK 0xFFFFDFFF +#define S_03610C_SPI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 15) +#define G_03610C_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 15) & 0x1) +#define C_03610C_SPI_BUSY_USER_DEFINED_MASK 0xFFFF7FFF +#define S_03610C_SC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 16) +#define G_03610C_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1) +#define C_03610C_SC_BUSY_USER_DEFINED_MASK 0xFFFEFFFF +#define S_03610C_DB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 17) +#define G_03610C_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1) +#define C_03610C_DB_BUSY_USER_DEFINED_MASK 0xFFFDFFFF +#define S_03610C_CB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 18) +#define G_03610C_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1) +#define C_03610C_CB_BUSY_USER_DEFINED_MASK 0xFFFBFFFF +#define S_03610C_VGT_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 19) +#define G_03610C_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1) +#define C_03610C_VGT_BUSY_USER_DEFINED_MASK 0xFFF7FFFF +#define S_03610C_PA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 20) +#define G_03610C_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1) +#define C_03610C_PA_BUSY_USER_DEFINED_MASK 0xFFEFFFFF +#define S_03610C_BCI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 21) +#define G_03610C_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1) +#define C_03610C_BCI_BUSY_USER_DEFINED_MASK 0xFFDFFFFF +#define R_036110_GRBM_SE2_PERFCOUNTER_SELECT 0x036110 +#define S_036110_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) +#define G_036110_PERF_SEL(x) (((x) >> 0) & 0x3F) +#define C_036110_PERF_SEL 0xFFFFFFC0 +#define S_036110_DB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 10) +#define G_036110_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1) +#define C_036110_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF +#define S_036110_CB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 11) +#define G_036110_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1) +#define C_036110_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF +#define S_036110_TA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 12) +#define G_036110_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1) +#define C_036110_TA_BUSY_USER_DEFINED_MASK 0xFFFFEFFF +#define S_036110_SX_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 13) +#define G_036110_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1) +#define C_036110_SX_BUSY_USER_DEFINED_MASK 0xFFFFDFFF +#define S_036110_SPI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 15) +#define G_036110_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 15) & 0x1) +#define C_036110_SPI_BUSY_USER_DEFINED_MASK 0xFFFF7FFF +#define S_036110_SC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 16) +#define G_036110_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1) +#define C_036110_SC_BUSY_USER_DEFINED_MASK 0xFFFEFFFF +#define S_036110_DB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 17) +#define G_036110_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1) +#define C_036110_DB_BUSY_USER_DEFINED_MASK 0xFFFDFFFF +#define S_036110_CB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 18) +#define G_036110_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1) +#define C_036110_CB_BUSY_USER_DEFINED_MASK 0xFFFBFFFF +#define S_036110_VGT_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 19) +#define G_036110_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1) +#define C_036110_VGT_BUSY_USER_DEFINED_MASK 0xFFF7FFFF +#define S_036110_PA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 20) +#define G_036110_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1) +#define C_036110_PA_BUSY_USER_DEFINED_MASK 0xFFEFFFFF +#define S_036110_BCI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 21) +#define G_036110_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1) +#define C_036110_BCI_BUSY_USER_DEFINED_MASK 0xFFDFFFFF +#define R_036114_GRBM_SE3_PERFCOUNTER_SELECT 0x036114 +#define S_036114_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) +#define G_036114_PERF_SEL(x) (((x) >> 0) & 0x3F) +#define C_036114_PERF_SEL 0xFFFFFFC0 +#define S_036114_DB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 10) +#define G_036114_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1) +#define C_036114_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF +#define S_036114_CB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 11) +#define G_036114_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1) +#define C_036114_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF +#define S_036114_TA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 12) +#define G_036114_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1) +#define C_036114_TA_BUSY_USER_DEFINED_MASK 0xFFFFEFFF +#define S_036114_SX_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 13) +#define G_036114_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1) +#define C_036114_SX_BUSY_USER_DEFINED_MASK 0xFFFFDFFF +#define S_036114_SPI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 15) +#define G_036114_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 15) & 0x1) +#define C_036114_SPI_BUSY_USER_DEFINED_MASK 0xFFFF7FFF +#define S_036114_SC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 16) +#define G_036114_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1) +#define C_036114_SC_BUSY_USER_DEFINED_MASK 0xFFFEFFFF +#define S_036114_DB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 17) +#define G_036114_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1) +#define C_036114_DB_BUSY_USER_DEFINED_MASK 0xFFFDFFFF +#define S_036114_CB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 18) +#define G_036114_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1) +#define C_036114_CB_BUSY_USER_DEFINED_MASK 0xFFFBFFFF +#define S_036114_VGT_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 19) +#define G_036114_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1) +#define C_036114_VGT_BUSY_USER_DEFINED_MASK 0xFFF7FFFF +#define S_036114_PA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 20) +#define G_036114_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1) +#define C_036114_PA_BUSY_USER_DEFINED_MASK 0xFFEFFFFF +#define S_036114_BCI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 21) +#define G_036114_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1) +#define C_036114_BCI_BUSY_USER_DEFINED_MASK 0xFFDFFFFF +#define R_036200_WD_PERFCOUNTER0_SELECT 0x036200 +#define S_036200_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) +#define G_036200_PERF_SEL(x) (((x) >> 0) & 0xFF) +#define C_036200_PERF_SEL 0xFFFFFF00 +#define S_036200_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) +#define G_036200_PERF_MODE(x) (((x) >> 28) & 0x0F) +#define C_036200_PERF_MODE 0x0FFFFFFF +#define R_036204_WD_PERFCOUNTER1_SELECT 0x036204 +#define R_036208_WD_PERFCOUNTER2_SELECT 0x036208 +#define R_03620C_WD_PERFCOUNTER3_SELECT 0x03620C +#define R_036210_IA_PERFCOUNTER0_SELECT 0x036210 +#define S_036210_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_036210_PERF_SEL(x) (((x) >> 0) & 0x3FF) +#define C_036210_PERF_SEL 0xFFFFFC00 +#define S_036210_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) +#define G_036210_PERF_SEL1(x) (((x) >> 10) & 0x3FF) +#define C_036210_PERF_SEL1 0xFFF003FF +#define S_036210_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) +#define G_036210_CNTR_MODE(x) (((x) >> 20) & 0x0F) +#define C_036210_CNTR_MODE 0xFF0FFFFF +#define S_036210_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) +#define G_036210_PERF_MODE1(x) (((x) >> 24) & 0x0F) +#define C_036210_PERF_MODE1 0xF0FFFFFF +#define S_036210_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) +#define G_036210_PERF_MODE(x) (((x) >> 28) & 0x0F) +#define C_036210_PERF_MODE 0x0FFFFFFF +#define R_036214_IA_PERFCOUNTER1_SELECT 0x036214 +#define R_036218_IA_PERFCOUNTER2_SELECT 0x036218 +#define R_03621C_IA_PERFCOUNTER3_SELECT 0x03621C +#define R_036220_IA_PERFCOUNTER0_SELECT1 0x036220 +#define S_036220_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_036220_PERF_SEL2(x) (((x) >> 0) & 0x3FF) +#define C_036220_PERF_SEL2 0xFFFFFC00 +#define S_036220_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) +#define G_036220_PERF_SEL3(x) (((x) >> 10) & 0x3FF) +#define C_036220_PERF_SEL3 0xFFF003FF +#define S_036220_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) +#define G_036220_PERF_MODE3(x) (((x) >> 24) & 0x0F) +#define C_036220_PERF_MODE3 0xF0FFFFFF +#define S_036220_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) +#define G_036220_PERF_MODE2(x) (((x) >> 28) & 0x0F) +#define C_036220_PERF_MODE2 0x0FFFFFFF +#define R_036230_VGT_PERFCOUNTER0_SELECT 0x036230 +#define S_036230_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_036230_PERF_SEL(x) (((x) >> 0) & 0x3FF) +#define C_036230_PERF_SEL 0xFFFFFC00 +#define S_036230_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) +#define G_036230_PERF_SEL1(x) (((x) >> 10) & 0x3FF) +#define C_036230_PERF_SEL1 0xFFF003FF +#define S_036230_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) +#define G_036230_CNTR_MODE(x) (((x) >> 20) & 0x0F) +#define C_036230_CNTR_MODE 0xFF0FFFFF +#define S_036230_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) +#define G_036230_PERF_MODE1(x) (((x) >> 24) & 0x0F) +#define C_036230_PERF_MODE1 0xF0FFFFFF +#define S_036230_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) +#define G_036230_PERF_MODE(x) (((x) >> 28) & 0x0F) +#define C_036230_PERF_MODE 0x0FFFFFFF +#define R_036234_VGT_PERFCOUNTER1_SELECT 0x036234 +#define R_036238_VGT_PERFCOUNTER2_SELECT 0x036238 +#define R_03623C_VGT_PERFCOUNTER3_SELECT 0x03623C +#define R_036240_VGT_PERFCOUNTER0_SELECT1 0x036240 +#define S_036240_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_036240_PERF_SEL2(x) (((x) >> 0) & 0x3FF) +#define C_036240_PERF_SEL2 0xFFFFFC00 +#define S_036240_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) +#define G_036240_PERF_SEL3(x) (((x) >> 10) & 0x3FF) +#define C_036240_PERF_SEL3 0xFFF003FF +#define S_036240_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) +#define G_036240_PERF_MODE3(x) (((x) >> 24) & 0x0F) +#define C_036240_PERF_MODE3 0xF0FFFFFF +#define S_036240_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) +#define G_036240_PERF_MODE2(x) (((x) >> 28) & 0x0F) +#define C_036240_PERF_MODE2 0x0FFFFFFF +#define R_036244_VGT_PERFCOUNTER1_SELECT1 0x036244 +#define R_036250_VGT_PERFCOUNTER_SEID_MASK 0x036250 +#define S_036250_PERF_SEID_IGNORE_MASK(x) (((unsigned)(x) & 0xFF) << 0) +#define G_036250_PERF_SEID_IGNORE_MASK(x) (((x) >> 0) & 0xFF) +#define C_036250_PERF_SEID_IGNORE_MASK 0xFFFFFF00 +#define R_036400_PA_SU_PERFCOUNTER0_SELECT 0x036400 +#define S_036400_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_036400_PERF_SEL(x) (((x) >> 0) & 0x3FF) +#define C_036400_PERF_SEL 0xFFFFFC00 +#define S_036400_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) +#define G_036400_PERF_SEL1(x) (((x) >> 10) & 0x3FF) +#define C_036400_PERF_SEL1 0xFFF003FF +#define S_036400_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) +#define G_036400_CNTR_MODE(x) (((x) >> 20) & 0x0F) +#define C_036400_CNTR_MODE 0xFF0FFFFF +#define R_036404_PA_SU_PERFCOUNTER0_SELECT1 0x036404 +#define S_036404_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_036404_PERF_SEL2(x) (((x) >> 0) & 0x3FF) +#define C_036404_PERF_SEL2 0xFFFFFC00 +#define S_036404_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) +#define G_036404_PERF_SEL3(x) (((x) >> 10) & 0x3FF) +#define C_036404_PERF_SEL3 0xFFF003FF +#define R_036408_PA_SU_PERFCOUNTER1_SELECT 0x036408 +#define R_03640C_PA_SU_PERFCOUNTER1_SELECT1 0x03640C +#define R_036410_PA_SU_PERFCOUNTER2_SELECT 0x036410 +#define R_036414_PA_SU_PERFCOUNTER3_SELECT 0x036414 +#define R_036500_PA_SC_PERFCOUNTER0_SELECT 0x036500 +#define S_036500_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_036500_PERF_SEL(x) (((x) >> 0) & 0x3FF) +#define C_036500_PERF_SEL 0xFFFFFC00 +#define S_036500_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) +#define G_036500_PERF_SEL1(x) (((x) >> 10) & 0x3FF) +#define C_036500_PERF_SEL1 0xFFF003FF +#define S_036500_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) +#define G_036500_CNTR_MODE(x) (((x) >> 20) & 0x0F) +#define C_036500_CNTR_MODE 0xFF0FFFFF +#define R_036504_PA_SC_PERFCOUNTER0_SELECT1 0x036504 +#define S_036504_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_036504_PERF_SEL2(x) (((x) >> 0) & 0x3FF) +#define C_036504_PERF_SEL2 0xFFFFFC00 +#define S_036504_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) +#define G_036504_PERF_SEL3(x) (((x) >> 10) & 0x3FF) +#define C_036504_PERF_SEL3 0xFFF003FF +#define R_036508_PA_SC_PERFCOUNTER1_SELECT 0x036508 +#define R_03650C_PA_SC_PERFCOUNTER2_SELECT 0x03650C +#define R_036510_PA_SC_PERFCOUNTER3_SELECT 0x036510 +#define R_036514_PA_SC_PERFCOUNTER4_SELECT 0x036514 +#define R_036518_PA_SC_PERFCOUNTER5_SELECT 0x036518 +#define R_03651C_PA_SC_PERFCOUNTER6_SELECT 0x03651C +#define R_036520_PA_SC_PERFCOUNTER7_SELECT 0x036520 +#define R_036600_SPI_PERFCOUNTER0_SELECT 0x036600 +#define S_036600_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_036600_PERF_SEL(x) (((x) >> 0) & 0x3FF) +#define C_036600_PERF_SEL 0xFFFFFC00 +#define S_036600_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) +#define G_036600_PERF_SEL1(x) (((x) >> 10) & 0x3FF) +#define C_036600_PERF_SEL1 0xFFF003FF +#define S_036600_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) +#define G_036600_CNTR_MODE(x) (((x) >> 20) & 0x0F) +#define C_036600_CNTR_MODE 0xFF0FFFFF +#define R_036604_SPI_PERFCOUNTER1_SELECT 0x036604 +#define R_036608_SPI_PERFCOUNTER2_SELECT 0x036608 +#define R_03660C_SPI_PERFCOUNTER3_SELECT 0x03660C +#define R_036610_SPI_PERFCOUNTER0_SELECT1 0x036610 +#define S_036610_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_036610_PERF_SEL2(x) (((x) >> 0) & 0x3FF) +#define C_036610_PERF_SEL2 0xFFFFFC00 +#define S_036610_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) +#define G_036610_PERF_SEL3(x) (((x) >> 10) & 0x3FF) +#define C_036610_PERF_SEL3 0xFFF003FF +#define R_036614_SPI_PERFCOUNTER1_SELECT1 0x036614 +#define R_036618_SPI_PERFCOUNTER2_SELECT1 0x036618 +#define R_03661C_SPI_PERFCOUNTER3_SELECT1 0x03661C +#define R_036620_SPI_PERFCOUNTER4_SELECT 0x036620 +#define R_036624_SPI_PERFCOUNTER5_SELECT 0x036624 +#define R_036628_SPI_PERFCOUNTER_BINS 0x036628 +#define S_036628_BIN0_MIN(x) (((unsigned)(x) & 0x0F) << 0) +#define G_036628_BIN0_MIN(x) (((x) >> 0) & 0x0F) +#define C_036628_BIN0_MIN 0xFFFFFFF0 +#define S_036628_BIN0_MAX(x) (((unsigned)(x) & 0x0F) << 4) +#define G_036628_BIN0_MAX(x) (((x) >> 4) & 0x0F) +#define C_036628_BIN0_MAX 0xFFFFFF0F +#define S_036628_BIN1_MIN(x) (((unsigned)(x) & 0x0F) << 8) +#define G_036628_BIN1_MIN(x) (((x) >> 8) & 0x0F) +#define C_036628_BIN1_MIN 0xFFFFF0FF +#define S_036628_BIN1_MAX(x) (((unsigned)(x) & 0x0F) << 12) +#define G_036628_BIN1_MAX(x) (((x) >> 12) & 0x0F) +#define C_036628_BIN1_MAX 0xFFFF0FFF +#define S_036628_BIN2_MIN(x) (((unsigned)(x) & 0x0F) << 16) +#define G_036628_BIN2_MIN(x) (((x) >> 16) & 0x0F) +#define C_036628_BIN2_MIN 0xFFF0FFFF +#define S_036628_BIN2_MAX(x) (((unsigned)(x) & 0x0F) << 20) +#define G_036628_BIN2_MAX(x) (((x) >> 20) & 0x0F) +#define C_036628_BIN2_MAX 0xFF0FFFFF +#define S_036628_BIN3_MIN(x) (((unsigned)(x) & 0x0F) << 24) +#define G_036628_BIN3_MIN(x) (((x) >> 24) & 0x0F) +#define C_036628_BIN3_MIN 0xF0FFFFFF +#define S_036628_BIN3_MAX(x) (((unsigned)(x) & 0x0F) << 28) +#define G_036628_BIN3_MAX(x) (((x) >> 28) & 0x0F) +#define C_036628_BIN3_MAX 0x0FFFFFFF +#define R_036700_SQ_PERFCOUNTER0_SELECT 0x036700 +#define S_036700_PERF_SEL(x) (((unsigned)(x) & 0x1FF) << 0) +#define G_036700_PERF_SEL(x) (((x) >> 0) & 0x1FF) +#define C_036700_PERF_SEL 0xFFFFFE00 +#define S_036700_SQC_BANK_MASK(x) (((unsigned)(x) & 0x0F) << 12) +#define G_036700_SQC_BANK_MASK(x) (((x) >> 12) & 0x0F) +#define C_036700_SQC_BANK_MASK 0xFFFF0FFF +#define S_036700_SQC_CLIENT_MASK(x) (((unsigned)(x) & 0x0F) << 16) +#define G_036700_SQC_CLIENT_MASK(x) (((x) >> 16) & 0x0F) +#define C_036700_SQC_CLIENT_MASK 0xFFF0FFFF +#define S_036700_SPM_MODE(x) (((unsigned)(x) & 0x0F) << 20) +#define G_036700_SPM_MODE(x) (((x) >> 20) & 0x0F) +#define C_036700_SPM_MODE 0xFF0FFFFF +#define S_036700_SIMD_MASK(x) (((unsigned)(x) & 0x0F) << 24) +#define G_036700_SIMD_MASK(x) (((x) >> 24) & 0x0F) +#define C_036700_SIMD_MASK 0xF0FFFFFF +#define S_036700_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) +#define G_036700_PERF_MODE(x) (((x) >> 28) & 0x0F) +#define C_036700_PERF_MODE 0x0FFFFFFF +#define R_036704_SQ_PERFCOUNTER1_SELECT 0x036704 +#define R_036708_SQ_PERFCOUNTER2_SELECT 0x036708 +#define R_03670C_SQ_PERFCOUNTER3_SELECT 0x03670C +#define R_036710_SQ_PERFCOUNTER4_SELECT 0x036710 +#define R_036714_SQ_PERFCOUNTER5_SELECT 0x036714 +#define R_036718_SQ_PERFCOUNTER6_SELECT 0x036718 +#define R_03671C_SQ_PERFCOUNTER7_SELECT 0x03671C +#define R_036720_SQ_PERFCOUNTER8_SELECT 0x036720 +#define R_036724_SQ_PERFCOUNTER9_SELECT 0x036724 +#define R_036728_SQ_PERFCOUNTER10_SELECT 0x036728 +#define R_03672C_SQ_PERFCOUNTER11_SELECT 0x03672C +#define R_036730_SQ_PERFCOUNTER12_SELECT 0x036730 +#define R_036734_SQ_PERFCOUNTER13_SELECT 0x036734 +#define R_036738_SQ_PERFCOUNTER14_SELECT 0x036738 +#define R_03673C_SQ_PERFCOUNTER15_SELECT 0x03673C +#define R_036780_SQ_PERFCOUNTER_CTRL 0x036780 +#define S_036780_PS_EN(x) (((unsigned)(x) & 0x1) << 0) +#define G_036780_PS_EN(x) (((x) >> 0) & 0x1) +#define C_036780_PS_EN 0xFFFFFFFE +#define S_036780_VS_EN(x) (((unsigned)(x) & 0x1) << 1) +#define G_036780_VS_EN(x) (((x) >> 1) & 0x1) +#define C_036780_VS_EN 0xFFFFFFFD +#define S_036780_GS_EN(x) (((unsigned)(x) & 0x1) << 2) +#define G_036780_GS_EN(x) (((x) >> 2) & 0x1) +#define C_036780_GS_EN 0xFFFFFFFB +#define S_036780_ES_EN(x) (((unsigned)(x) & 0x1) << 3) +#define G_036780_ES_EN(x) (((x) >> 3) & 0x1) +#define C_036780_ES_EN 0xFFFFFFF7 +#define S_036780_HS_EN(x) (((unsigned)(x) & 0x1) << 4) +#define G_036780_HS_EN(x) (((x) >> 4) & 0x1) +#define C_036780_HS_EN 0xFFFFFFEF +#define S_036780_LS_EN(x) (((unsigned)(x) & 0x1) << 5) +#define G_036780_LS_EN(x) (((x) >> 5) & 0x1) +#define C_036780_LS_EN 0xFFFFFFDF +#define S_036780_CS_EN(x) (((unsigned)(x) & 0x1) << 6) +#define G_036780_CS_EN(x) (((x) >> 6) & 0x1) +#define C_036780_CS_EN 0xFFFFFFBF +#define S_036780_CNTR_RATE(x) (((unsigned)(x) & 0x1F) << 8) +#define G_036780_CNTR_RATE(x) (((x) >> 8) & 0x1F) +#define C_036780_CNTR_RATE 0xFFFFE0FF +#define S_036780_DISABLE_FLUSH(x) (((unsigned)(x) & 0x1) << 13) +#define G_036780_DISABLE_FLUSH(x) (((x) >> 13) & 0x1) +#define C_036780_DISABLE_FLUSH 0xFFFFDFFF +#define R_036784_SQ_PERFCOUNTER_MASK 0x036784 +#define S_036784_SH0_MASK(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_036784_SH0_MASK(x) (((x) >> 0) & 0xFFFF) +#define C_036784_SH0_MASK 0xFFFF0000 +#define S_036784_SH1_MASK(x) (((unsigned)(x) & 0xFFFF) << 16) +#define G_036784_SH1_MASK(x) (((x) >> 16) & 0xFFFF) +#define C_036784_SH1_MASK 0x0000FFFF +#define R_036788_SQ_PERFCOUNTER_CTRL2 0x036788 +#define S_036788_FORCE_EN(x) (((unsigned)(x) & 0x1) << 0) +#define G_036788_FORCE_EN(x) (((x) >> 0) & 0x1) +#define C_036788_FORCE_EN 0xFFFFFFFE +#define R_036900_SX_PERFCOUNTER0_SELECT 0x036900 +#define S_036900_PERFCOUNTER_SELECT(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_036900_PERFCOUNTER_SELECT(x) (((x) >> 0) & 0x3FF) +#define C_036900_PERFCOUNTER_SELECT 0xFFFFFC00 +#define S_036900_PERFCOUNTER_SELECT1(x) (((unsigned)(x) & 0x3FF) << 10) +#define G_036900_PERFCOUNTER_SELECT1(x) (((x) >> 10) & 0x3FF) +#define C_036900_PERFCOUNTER_SELECT1 0xFFF003FF +#define S_036900_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) +#define G_036900_CNTR_MODE(x) (((x) >> 20) & 0x0F) +#define C_036900_CNTR_MODE 0xFF0FFFFF +#define R_036904_SX_PERFCOUNTER1_SELECT 0x036904 +#define R_036908_SX_PERFCOUNTER2_SELECT 0x036908 +#define R_03690C_SX_PERFCOUNTER3_SELECT 0x03690C +#define R_036910_SX_PERFCOUNTER0_SELECT1 0x036910 +#define S_036910_PERFCOUNTER_SELECT2(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_036910_PERFCOUNTER_SELECT2(x) (((x) >> 0) & 0x3FF) +#define C_036910_PERFCOUNTER_SELECT2 0xFFFFFC00 +#define S_036910_PERFCOUNTER_SELECT3(x) (((unsigned)(x) & 0x3FF) << 10) +#define G_036910_PERFCOUNTER_SELECT3(x) (((x) >> 10) & 0x3FF) +#define C_036910_PERFCOUNTER_SELECT3 0xFFF003FF +#define R_036914_SX_PERFCOUNTER1_SELECT1 0x036914 +#define R_036A00_GDS_PERFCOUNTER0_SELECT 0x036A00 +#define S_036A00_PERFCOUNTER_SELECT(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_036A00_PERFCOUNTER_SELECT(x) (((x) >> 0) & 0x3FF) +#define C_036A00_PERFCOUNTER_SELECT 0xFFFFFC00 +#define S_036A00_PERFCOUNTER_SELECT1(x) (((unsigned)(x) & 0x3FF) << 10) +#define G_036A00_PERFCOUNTER_SELECT1(x) (((x) >> 10) & 0x3FF) +#define C_036A00_PERFCOUNTER_SELECT1 0xFFF003FF +#define S_036A00_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) +#define G_036A00_CNTR_MODE(x) (((x) >> 20) & 0x0F) +#define C_036A00_CNTR_MODE 0xFF0FFFFF +#define R_036A04_GDS_PERFCOUNTER1_SELECT 0x036A04 +#define R_036A08_GDS_PERFCOUNTER2_SELECT 0x036A08 +#define R_036A0C_GDS_PERFCOUNTER3_SELECT 0x036A0C +#define R_036A10_GDS_PERFCOUNTER0_SELECT1 0x036A10 +#define S_036A10_PERFCOUNTER_SELECT2(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_036A10_PERFCOUNTER_SELECT2(x) (((x) >> 0) & 0x3FF) +#define C_036A10_PERFCOUNTER_SELECT2 0xFFFFFC00 +#define S_036A10_PERFCOUNTER_SELECT3(x) (((unsigned)(x) & 0x3FF) << 10) +#define G_036A10_PERFCOUNTER_SELECT3(x) (((x) >> 10) & 0x3FF) +#define C_036A10_PERFCOUNTER_SELECT3 0xFFF003FF +#define R_036B00_TA_PERFCOUNTER0_SELECT 0x036B00 +#define S_036B00_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) +#define G_036B00_PERF_SEL(x) (((x) >> 0) & 0xFF) +#define C_036B00_PERF_SEL 0xFFFFFF00 +#define S_036B00_PERF_SEL1(x) (((unsigned)(x) & 0xFF) << 10) +#define G_036B00_PERF_SEL1(x) (((x) >> 10) & 0xFF) +#define C_036B00_PERF_SEL1 0xFFFC03FF +#define S_036B00_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) +#define G_036B00_CNTR_MODE(x) (((x) >> 20) & 0x0F) +#define C_036B00_CNTR_MODE 0xFF0FFFFF +#define S_036B00_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) +#define G_036B00_PERF_MODE1(x) (((x) >> 24) & 0x0F) +#define C_036B00_PERF_MODE1 0xF0FFFFFF +#define S_036B00_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) +#define G_036B00_PERF_MODE(x) (((x) >> 28) & 0x0F) +#define C_036B00_PERF_MODE 0x0FFFFFFF +#define R_036B04_TA_PERFCOUNTER0_SELECT1 0x036B04 +#define S_036B04_PERF_SEL2(x) (((unsigned)(x) & 0xFF) << 0) +#define G_036B04_PERF_SEL2(x) (((x) >> 0) & 0xFF) +#define C_036B04_PERF_SEL2 0xFFFFFF00 +#define S_036B04_PERF_SEL3(x) (((unsigned)(x) & 0xFF) << 10) +#define G_036B04_PERF_SEL3(x) (((x) >> 10) & 0xFF) +#define C_036B04_PERF_SEL3 0xFFFC03FF +#define S_036B04_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) +#define G_036B04_PERF_MODE3(x) (((x) >> 24) & 0x0F) +#define C_036B04_PERF_MODE3 0xF0FFFFFF +#define S_036B04_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) +#define G_036B04_PERF_MODE2(x) (((x) >> 28) & 0x0F) +#define C_036B04_PERF_MODE2 0x0FFFFFFF +#define R_036B08_TA_PERFCOUNTER1_SELECT 0x036B08 +#define R_036C00_TD_PERFCOUNTER0_SELECT 0x036C00 +#define S_036C00_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) +#define G_036C00_PERF_SEL(x) (((x) >> 0) & 0xFF) +#define C_036C00_PERF_SEL 0xFFFFFF00 +#define S_036C00_PERF_SEL1(x) (((unsigned)(x) & 0xFF) << 10) +#define G_036C00_PERF_SEL1(x) (((x) >> 10) & 0xFF) +#define C_036C00_PERF_SEL1 0xFFFC03FF +#define S_036C00_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) +#define G_036C00_CNTR_MODE(x) (((x) >> 20) & 0x0F) +#define C_036C00_CNTR_MODE 0xFF0FFFFF +#define S_036C00_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) +#define G_036C00_PERF_MODE1(x) (((x) >> 24) & 0x0F) +#define C_036C00_PERF_MODE1 0xF0FFFFFF +#define S_036C00_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) +#define G_036C00_PERF_MODE(x) (((x) >> 28) & 0x0F) +#define C_036C00_PERF_MODE 0x0FFFFFFF +#define R_036C04_TD_PERFCOUNTER0_SELECT1 0x036C04 +#define S_036C04_PERF_SEL2(x) (((unsigned)(x) & 0xFF) << 0) +#define G_036C04_PERF_SEL2(x) (((x) >> 0) & 0xFF) +#define C_036C04_PERF_SEL2 0xFFFFFF00 +#define S_036C04_PERF_SEL3(x) (((unsigned)(x) & 0xFF) << 10) +#define G_036C04_PERF_SEL3(x) (((x) >> 10) & 0xFF) +#define C_036C04_PERF_SEL3 0xFFFC03FF +#define S_036C04_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) +#define G_036C04_PERF_MODE3(x) (((x) >> 24) & 0x0F) +#define C_036C04_PERF_MODE3 0xF0FFFFFF +#define S_036C04_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) +#define G_036C04_PERF_MODE2(x) (((x) >> 28) & 0x0F) +#define C_036C04_PERF_MODE2 0x0FFFFFFF +#define R_036C08_TD_PERFCOUNTER1_SELECT 0x036C08 +#define R_036D00_TCP_PERFCOUNTER0_SELECT 0x036D00 +#define S_036D00_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_036D00_PERF_SEL(x) (((x) >> 0) & 0x3FF) +#define C_036D00_PERF_SEL 0xFFFFFC00 +#define S_036D00_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) +#define G_036D00_PERF_SEL1(x) (((x) >> 10) & 0x3FF) +#define C_036D00_PERF_SEL1 0xFFF003FF +#define S_036D00_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) +#define G_036D00_CNTR_MODE(x) (((x) >> 20) & 0x0F) +#define C_036D00_CNTR_MODE 0xFF0FFFFF +#define S_036D00_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) +#define G_036D00_PERF_MODE1(x) (((x) >> 24) & 0x0F) +#define C_036D00_PERF_MODE1 0xF0FFFFFF +#define S_036D00_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) +#define G_036D00_PERF_MODE(x) (((x) >> 28) & 0x0F) +#define C_036D00_PERF_MODE 0x0FFFFFFF +#define R_036D04_TCP_PERFCOUNTER0_SELECT1 0x036D04 +#define S_036D04_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_036D04_PERF_SEL2(x) (((x) >> 0) & 0x3FF) +#define C_036D04_PERF_SEL2 0xFFFFFC00 +#define S_036D04_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) +#define G_036D04_PERF_SEL3(x) (((x) >> 10) & 0x3FF) +#define C_036D04_PERF_SEL3 0xFFF003FF +#define S_036D04_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) +#define G_036D04_PERF_MODE3(x) (((x) >> 24) & 0x0F) +#define C_036D04_PERF_MODE3 0xF0FFFFFF +#define S_036D04_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) +#define G_036D04_PERF_MODE2(x) (((x) >> 28) & 0x0F) +#define C_036D04_PERF_MODE2 0x0FFFFFFF +#define R_036D08_TCP_PERFCOUNTER1_SELECT 0x036D08 +#define R_036D0C_TCP_PERFCOUNTER1_SELECT1 0x036D0C +#define R_036D10_TCP_PERFCOUNTER2_SELECT 0x036D10 +#define R_036D14_TCP_PERFCOUNTER3_SELECT 0x036D14 +#define R_036E00_TCC_PERFCOUNTER0_SELECT 0x036E00 +#define S_036E00_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_036E00_PERF_SEL(x) (((x) >> 0) & 0x3FF) +#define C_036E00_PERF_SEL 0xFFFFFC00 +#define S_036E00_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) +#define G_036E00_PERF_SEL1(x) (((x) >> 10) & 0x3FF) +#define C_036E00_PERF_SEL1 0xFFF003FF +#define S_036E00_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) +#define G_036E00_CNTR_MODE(x) (((x) >> 20) & 0x0F) +#define C_036E00_CNTR_MODE 0xFF0FFFFF +#define S_036E00_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) +#define G_036E00_PERF_MODE1(x) (((x) >> 24) & 0x0F) +#define C_036E00_PERF_MODE1 0xF0FFFFFF +#define S_036E00_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) +#define G_036E00_PERF_MODE(x) (((x) >> 28) & 0x0F) +#define C_036E00_PERF_MODE 0x0FFFFFFF +#define R_036E04_TCC_PERFCOUNTER0_SELECT1 0x036E04 +#define S_036E04_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_036E04_PERF_SEL2(x) (((x) >> 0) & 0x3FF) +#define C_036E04_PERF_SEL2 0xFFFFFC00 +#define S_036E04_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) +#define G_036E04_PERF_SEL3(x) (((x) >> 10) & 0x3FF) +#define C_036E04_PERF_SEL3 0xFFF003FF +#define S_036E04_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 24) +#define G_036E04_PERF_MODE2(x) (((x) >> 24) & 0x0F) +#define C_036E04_PERF_MODE2 0xF0FFFFFF +#define S_036E04_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 28) +#define G_036E04_PERF_MODE3(x) (((x) >> 28) & 0x0F) +#define C_036E04_PERF_MODE3 0x0FFFFFFF +#define R_036E08_TCC_PERFCOUNTER1_SELECT 0x036E08 +#define R_036E0C_TCC_PERFCOUNTER1_SELECT1 0x036E0C +#define R_036E10_TCC_PERFCOUNTER2_SELECT 0x036E10 +#define R_036E14_TCC_PERFCOUNTER3_SELECT 0x036E14 +#define R_036E40_TCA_PERFCOUNTER0_SELECT 0x036E40 +#define S_036E40_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_036E40_PERF_SEL(x) (((x) >> 0) & 0x3FF) +#define C_036E40_PERF_SEL 0xFFFFFC00 +#define S_036E40_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) +#define G_036E40_PERF_SEL1(x) (((x) >> 10) & 0x3FF) +#define C_036E40_PERF_SEL1 0xFFF003FF +#define S_036E40_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) +#define G_036E40_CNTR_MODE(x) (((x) >> 20) & 0x0F) +#define C_036E40_CNTR_MODE 0xFF0FFFFF +#define S_036E40_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) +#define G_036E40_PERF_MODE1(x) (((x) >> 24) & 0x0F) +#define C_036E40_PERF_MODE1 0xF0FFFFFF +#define S_036E40_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) +#define G_036E40_PERF_MODE(x) (((x) >> 28) & 0x0F) +#define C_036E40_PERF_MODE 0x0FFFFFFF +#define R_036E44_TCA_PERFCOUNTER0_SELECT1 0x036E44 +#define S_036E44_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_036E44_PERF_SEL2(x) (((x) >> 0) & 0x3FF) +#define C_036E44_PERF_SEL2 0xFFFFFC00 +#define S_036E44_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) +#define G_036E44_PERF_SEL3(x) (((x) >> 10) & 0x3FF) +#define C_036E44_PERF_SEL3 0xFFF003FF +#define S_036E44_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 24) +#define G_036E44_PERF_MODE2(x) (((x) >> 24) & 0x0F) +#define C_036E44_PERF_MODE2 0xF0FFFFFF +#define S_036E44_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 28) +#define G_036E44_PERF_MODE3(x) (((x) >> 28) & 0x0F) +#define C_036E44_PERF_MODE3 0x0FFFFFFF +#define R_036E48_TCA_PERFCOUNTER1_SELECT 0x036E48 +#define R_036E4C_TCA_PERFCOUNTER1_SELECT1 0x036E4C +#define R_036E50_TCA_PERFCOUNTER2_SELECT 0x036E50 +#define R_036E54_TCA_PERFCOUNTER3_SELECT 0x036E54 +#define R_037000_CB_PERFCOUNTER_FILTER 0x037000 +#define S_037000_OP_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 0) +#define G_037000_OP_FILTER_ENABLE(x) (((x) >> 0) & 0x1) +#define C_037000_OP_FILTER_ENABLE 0xFFFFFFFE +#define S_037000_OP_FILTER_SEL(x) (((unsigned)(x) & 0x07) << 1) +#define G_037000_OP_FILTER_SEL(x) (((x) >> 1) & 0x07) +#define C_037000_OP_FILTER_SEL 0xFFFFFFF1 +#define S_037000_FORMAT_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 4) +#define G_037000_FORMAT_FILTER_ENABLE(x) (((x) >> 4) & 0x1) +#define C_037000_FORMAT_FILTER_ENABLE 0xFFFFFFEF +#define S_037000_FORMAT_FILTER_SEL(x) (((unsigned)(x) & 0x1F) << 5) +#define G_037000_FORMAT_FILTER_SEL(x) (((x) >> 5) & 0x1F) +#define C_037000_FORMAT_FILTER_SEL 0xFFFFFC1F +#define S_037000_CLEAR_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 10) +#define G_037000_CLEAR_FILTER_ENABLE(x) (((x) >> 10) & 0x1) +#define C_037000_CLEAR_FILTER_ENABLE 0xFFFFFBFF +#define S_037000_CLEAR_FILTER_SEL(x) (((unsigned)(x) & 0x1) << 11) +#define G_037000_CLEAR_FILTER_SEL(x) (((x) >> 11) & 0x1) +#define C_037000_CLEAR_FILTER_SEL 0xFFFFF7FF +#define S_037000_MRT_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 12) +#define G_037000_MRT_FILTER_ENABLE(x) (((x) >> 12) & 0x1) +#define C_037000_MRT_FILTER_ENABLE 0xFFFFEFFF +#define S_037000_MRT_FILTER_SEL(x) (((unsigned)(x) & 0x07) << 13) +#define G_037000_MRT_FILTER_SEL(x) (((x) >> 13) & 0x07) +#define C_037000_MRT_FILTER_SEL 0xFFFF1FFF +#define S_037000_NUM_SAMPLES_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 17) +#define G_037000_NUM_SAMPLES_FILTER_ENABLE(x) (((x) >> 17) & 0x1) +#define C_037000_NUM_SAMPLES_FILTER_ENABLE 0xFFFDFFFF +#define S_037000_NUM_SAMPLES_FILTER_SEL(x) (((unsigned)(x) & 0x07) << 18) +#define G_037000_NUM_SAMPLES_FILTER_SEL(x) (((x) >> 18) & 0x07) +#define C_037000_NUM_SAMPLES_FILTER_SEL 0xFFE3FFFF +#define S_037000_NUM_FRAGMENTS_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 21) +#define G_037000_NUM_FRAGMENTS_FILTER_ENABLE(x) (((x) >> 21) & 0x1) +#define C_037000_NUM_FRAGMENTS_FILTER_ENABLE 0xFFDFFFFF +#define S_037000_NUM_FRAGMENTS_FILTER_SEL(x) (((unsigned)(x) & 0x03) << 22) +#define G_037000_NUM_FRAGMENTS_FILTER_SEL(x) (((x) >> 22) & 0x03) +#define C_037000_NUM_FRAGMENTS_FILTER_SEL 0xFF3FFFFF +#define R_037004_CB_PERFCOUNTER0_SELECT 0x037004 +#define S_037004_PERF_SEL(x) (((unsigned)(x) & 0x1FF) << 0) +#define G_037004_PERF_SEL(x) (((x) >> 0) & 0x1FF) +#define C_037004_PERF_SEL 0xFFFFFE00 +#define S_037004_PERF_SEL1(x) (((unsigned)(x) & 0x1FF) << 10) +#define G_037004_PERF_SEL1(x) (((x) >> 10) & 0x1FF) +#define C_037004_PERF_SEL1 0xFFF803FF +#define S_037004_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) +#define G_037004_CNTR_MODE(x) (((x) >> 20) & 0x0F) +#define C_037004_CNTR_MODE 0xFF0FFFFF +#define S_037004_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) +#define G_037004_PERF_MODE1(x) (((x) >> 24) & 0x0F) +#define C_037004_PERF_MODE1 0xF0FFFFFF +#define S_037004_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) +#define G_037004_PERF_MODE(x) (((x) >> 28) & 0x0F) +#define C_037004_PERF_MODE 0x0FFFFFFF +#define R_037008_CB_PERFCOUNTER0_SELECT1 0x037008 +#define S_037008_PERF_SEL2(x) (((unsigned)(x) & 0x1FF) << 0) +#define G_037008_PERF_SEL2(x) (((x) >> 0) & 0x1FF) +#define C_037008_PERF_SEL2 0xFFFFFE00 +#define S_037008_PERF_SEL3(x) (((unsigned)(x) & 0x1FF) << 10) +#define G_037008_PERF_SEL3(x) (((x) >> 10) & 0x1FF) +#define C_037008_PERF_SEL3 0xFFF803FF +#define S_037008_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) +#define G_037008_PERF_MODE3(x) (((x) >> 24) & 0x0F) +#define C_037008_PERF_MODE3 0xF0FFFFFF +#define S_037008_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) +#define G_037008_PERF_MODE2(x) (((x) >> 28) & 0x0F) +#define C_037008_PERF_MODE2 0x0FFFFFFF +#define R_03700C_CB_PERFCOUNTER1_SELECT 0x03700C +#define R_037010_CB_PERFCOUNTER2_SELECT 0x037010 +#define R_037014_CB_PERFCOUNTER3_SELECT 0x037014 +#define R_037100_DB_PERFCOUNTER0_SELECT 0x037100 +#define S_037100_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_037100_PERF_SEL(x) (((x) >> 0) & 0x3FF) +#define C_037100_PERF_SEL 0xFFFFFC00 +#define S_037100_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) +#define G_037100_PERF_SEL1(x) (((x) >> 10) & 0x3FF) +#define C_037100_PERF_SEL1 0xFFF003FF +#define S_037100_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) +#define G_037100_CNTR_MODE(x) (((x) >> 20) & 0x0F) +#define C_037100_CNTR_MODE 0xFF0FFFFF +#define S_037100_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) +#define G_037100_PERF_MODE1(x) (((x) >> 24) & 0x0F) +#define C_037100_PERF_MODE1 0xF0FFFFFF +#define S_037100_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) +#define G_037100_PERF_MODE(x) (((x) >> 28) & 0x0F) +#define C_037100_PERF_MODE 0x0FFFFFFF +#define R_037104_DB_PERFCOUNTER0_SELECT1 0x037104 +#define S_037104_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_037104_PERF_SEL2(x) (((x) >> 0) & 0x3FF) +#define C_037104_PERF_SEL2 0xFFFFFC00 +#define S_037104_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) +#define G_037104_PERF_SEL3(x) (((x) >> 10) & 0x3FF) +#define C_037104_PERF_SEL3 0xFFF003FF +#define S_037104_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) +#define G_037104_PERF_MODE3(x) (((x) >> 24) & 0x0F) +#define C_037104_PERF_MODE3 0xF0FFFFFF +#define S_037104_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) +#define G_037104_PERF_MODE2(x) (((x) >> 28) & 0x0F) +#define C_037104_PERF_MODE2 0x0FFFFFFF +#define R_037108_DB_PERFCOUNTER1_SELECT 0x037108 +#define R_03710C_DB_PERFCOUNTER1_SELECT1 0x03710C +#define R_037110_DB_PERFCOUNTER2_SELECT 0x037110 +#define R_037118_DB_PERFCOUNTER3_SELECT 0x037118 +#define R_028000_DB_RENDER_CONTROL 0x028000 +#define S_028000_DEPTH_CLEAR_ENABLE(x) (((unsigned)(x) & 0x1) << 0) +#define G_028000_DEPTH_CLEAR_ENABLE(x) (((x) >> 0) & 0x1) +#define C_028000_DEPTH_CLEAR_ENABLE 0xFFFFFFFE +#define S_028000_STENCIL_CLEAR_ENABLE(x) (((unsigned)(x) & 0x1) << 1) +#define G_028000_STENCIL_CLEAR_ENABLE(x) (((x) >> 1) & 0x1) +#define C_028000_STENCIL_CLEAR_ENABLE 0xFFFFFFFD +#define S_028000_DEPTH_COPY(x) (((unsigned)(x) & 0x1) << 2) +#define G_028000_DEPTH_COPY(x) (((x) >> 2) & 0x1) +#define C_028000_DEPTH_COPY 0xFFFFFFFB +#define S_028000_STENCIL_COPY(x) (((unsigned)(x) & 0x1) << 3) +#define G_028000_STENCIL_COPY(x) (((x) >> 3) & 0x1) +#define C_028000_STENCIL_COPY 0xFFFFFFF7 +#define S_028000_RESUMMARIZE_ENABLE(x) (((unsigned)(x) & 0x1) << 4) +#define G_028000_RESUMMARIZE_ENABLE(x) (((x) >> 4) & 0x1) +#define C_028000_RESUMMARIZE_ENABLE 0xFFFFFFEF +#define S_028000_STENCIL_COMPRESS_DISABLE(x) (((unsigned)(x) & 0x1) << 5) +#define G_028000_STENCIL_COMPRESS_DISABLE(x) (((x) >> 5) & 0x1) +#define C_028000_STENCIL_COMPRESS_DISABLE 0xFFFFFFDF +#define S_028000_DEPTH_COMPRESS_DISABLE(x) (((unsigned)(x) & 0x1) << 6) +#define G_028000_DEPTH_COMPRESS_DISABLE(x) (((x) >> 6) & 0x1) +#define C_028000_DEPTH_COMPRESS_DISABLE 0xFFFFFFBF +#define S_028000_COPY_CENTROID(x) (((unsigned)(x) & 0x1) << 7) +#define G_028000_COPY_CENTROID(x) (((x) >> 7) & 0x1) +#define C_028000_COPY_CENTROID 0xFFFFFF7F +#define S_028000_COPY_SAMPLE(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028000_COPY_SAMPLE(x) (((x) >> 8) & 0x0F) +#define C_028000_COPY_SAMPLE 0xFFFFF0FF +/* VI */ +#define S_028000_DECOMPRESS_ENABLE(x) (((unsigned)(x) & 0x1) << 12) +#define G_028000_DECOMPRESS_ENABLE(x) (((x) >> 12) & 0x1) +#define C_028000_DECOMPRESS_ENABLE 0xFFFFEFFF +/* */ +#define R_028004_DB_COUNT_CONTROL 0x028004 +#define S_028004_ZPASS_INCREMENT_DISABLE(x) (((unsigned)(x) & 0x1) << 0) +#define G_028004_ZPASS_INCREMENT_DISABLE(x) (((x) >> 0) & 0x1) +#define C_028004_ZPASS_INCREMENT_DISABLE 0xFFFFFFFE +#define S_028004_PERFECT_ZPASS_COUNTS(x) (((unsigned)(x) & 0x1) << 1) +#define G_028004_PERFECT_ZPASS_COUNTS(x) (((x) >> 1) & 0x1) +#define C_028004_PERFECT_ZPASS_COUNTS 0xFFFFFFFD +#define S_028004_SAMPLE_RATE(x) (((unsigned)(x) & 0x07) << 4) +#define G_028004_SAMPLE_RATE(x) (((x) >> 4) & 0x07) +#define C_028004_SAMPLE_RATE 0xFFFFFF8F +/* CIK */ +#define S_028004_ZPASS_ENABLE(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028004_ZPASS_ENABLE(x) (((x) >> 8) & 0x0F) +#define C_028004_ZPASS_ENABLE 0xFFFFF0FF +#define S_028004_ZFAIL_ENABLE(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028004_ZFAIL_ENABLE(x) (((x) >> 12) & 0x0F) +#define C_028004_ZFAIL_ENABLE 0xFFFF0FFF +#define S_028004_SFAIL_ENABLE(x) (((unsigned)(x) & 0x0F) << 16) +#define G_028004_SFAIL_ENABLE(x) (((x) >> 16) & 0x0F) +#define C_028004_SFAIL_ENABLE 0xFFF0FFFF +#define S_028004_DBFAIL_ENABLE(x) (((unsigned)(x) & 0x0F) << 20) +#define G_028004_DBFAIL_ENABLE(x) (((x) >> 20) & 0x0F) +#define C_028004_DBFAIL_ENABLE 0xFF0FFFFF +#define S_028004_SLICE_EVEN_ENABLE(x) (((unsigned)(x) & 0x0F) << 24) +#define G_028004_SLICE_EVEN_ENABLE(x) (((x) >> 24) & 0x0F) +#define C_028004_SLICE_EVEN_ENABLE 0xF0FFFFFF +#define S_028004_SLICE_ODD_ENABLE(x) (((unsigned)(x) & 0x0F) << 28) +#define G_028004_SLICE_ODD_ENABLE(x) (((x) >> 28) & 0x0F) +#define C_028004_SLICE_ODD_ENABLE 0x0FFFFFFF +/* */ +#define R_028008_DB_DEPTH_VIEW 0x028008 +#define S_028008_SLICE_START(x) (((unsigned)(x) & 0x7FF) << 0) +#define G_028008_SLICE_START(x) (((x) >> 0) & 0x7FF) +#define C_028008_SLICE_START 0xFFFFF800 +#define S_028008_SLICE_MAX(x) (((unsigned)(x) & 0x7FF) << 13) +#define G_028008_SLICE_MAX(x) (((x) >> 13) & 0x7FF) +#define C_028008_SLICE_MAX 0xFF001FFF +#define S_028008_Z_READ_ONLY(x) (((unsigned)(x) & 0x1) << 24) +#define G_028008_Z_READ_ONLY(x) (((x) >> 24) & 0x1) +#define C_028008_Z_READ_ONLY 0xFEFFFFFF +#define S_028008_STENCIL_READ_ONLY(x) (((unsigned)(x) & 0x1) << 25) +#define G_028008_STENCIL_READ_ONLY(x) (((x) >> 25) & 0x1) +#define C_028008_STENCIL_READ_ONLY 0xFDFFFFFF +#define R_02800C_DB_RENDER_OVERRIDE 0x02800C +#define S_02800C_FORCE_HIZ_ENABLE(x) (((unsigned)(x) & 0x03) << 0) +#define G_02800C_FORCE_HIZ_ENABLE(x) (((x) >> 0) & 0x03) +#define C_02800C_FORCE_HIZ_ENABLE 0xFFFFFFFC +#define V_02800C_FORCE_OFF 0x00 +#define V_02800C_FORCE_ENABLE 0x01 +#define V_02800C_FORCE_DISABLE 0x02 +#define V_02800C_FORCE_RESERVED 0x03 +#define S_02800C_FORCE_HIS_ENABLE0(x) (((unsigned)(x) & 0x03) << 2) +#define G_02800C_FORCE_HIS_ENABLE0(x) (((x) >> 2) & 0x03) +#define C_02800C_FORCE_HIS_ENABLE0 0xFFFFFFF3 +#define V_02800C_FORCE_OFF 0x00 +#define V_02800C_FORCE_ENABLE 0x01 +#define V_02800C_FORCE_DISABLE 0x02 +#define V_02800C_FORCE_RESERVED 0x03 +#define S_02800C_FORCE_HIS_ENABLE1(x) (((unsigned)(x) & 0x03) << 4) +#define G_02800C_FORCE_HIS_ENABLE1(x) (((x) >> 4) & 0x03) +#define C_02800C_FORCE_HIS_ENABLE1 0xFFFFFFCF +#define V_02800C_FORCE_OFF 0x00 +#define V_02800C_FORCE_ENABLE 0x01 +#define V_02800C_FORCE_DISABLE 0x02 +#define V_02800C_FORCE_RESERVED 0x03 +#define S_02800C_FORCE_SHADER_Z_ORDER(x) (((unsigned)(x) & 0x1) << 6) +#define G_02800C_FORCE_SHADER_Z_ORDER(x) (((x) >> 6) & 0x1) +#define C_02800C_FORCE_SHADER_Z_ORDER 0xFFFFFFBF +#define S_02800C_FAST_Z_DISABLE(x) (((unsigned)(x) & 0x1) << 7) +#define G_02800C_FAST_Z_DISABLE(x) (((x) >> 7) & 0x1) +#define C_02800C_FAST_Z_DISABLE 0xFFFFFF7F +#define S_02800C_FAST_STENCIL_DISABLE(x) (((unsigned)(x) & 0x1) << 8) +#define G_02800C_FAST_STENCIL_DISABLE(x) (((x) >> 8) & 0x1) +#define C_02800C_FAST_STENCIL_DISABLE 0xFFFFFEFF +#define S_02800C_NOOP_CULL_DISABLE(x) (((unsigned)(x) & 0x1) << 9) +#define G_02800C_NOOP_CULL_DISABLE(x) (((x) >> 9) & 0x1) +#define C_02800C_NOOP_CULL_DISABLE 0xFFFFFDFF +#define S_02800C_FORCE_COLOR_KILL(x) (((unsigned)(x) & 0x1) << 10) +#define G_02800C_FORCE_COLOR_KILL(x) (((x) >> 10) & 0x1) +#define C_02800C_FORCE_COLOR_KILL 0xFFFFFBFF +#define S_02800C_FORCE_Z_READ(x) (((unsigned)(x) & 0x1) << 11) +#define G_02800C_FORCE_Z_READ(x) (((x) >> 11) & 0x1) +#define C_02800C_FORCE_Z_READ 0xFFFFF7FF +#define S_02800C_FORCE_STENCIL_READ(x) (((unsigned)(x) & 0x1) << 12) +#define G_02800C_FORCE_STENCIL_READ(x) (((x) >> 12) & 0x1) +#define C_02800C_FORCE_STENCIL_READ 0xFFFFEFFF +#define S_02800C_FORCE_FULL_Z_RANGE(x) (((unsigned)(x) & 0x03) << 13) +#define G_02800C_FORCE_FULL_Z_RANGE(x) (((x) >> 13) & 0x03) +#define C_02800C_FORCE_FULL_Z_RANGE 0xFFFF9FFF +#define V_02800C_FORCE_OFF 0x00 +#define V_02800C_FORCE_ENABLE 0x01 +#define V_02800C_FORCE_DISABLE 0x02 +#define V_02800C_FORCE_RESERVED 0x03 +#define S_02800C_FORCE_QC_SMASK_CONFLICT(x) (((unsigned)(x) & 0x1) << 15) +#define G_02800C_FORCE_QC_SMASK_CONFLICT(x) (((x) >> 15) & 0x1) +#define C_02800C_FORCE_QC_SMASK_CONFLICT 0xFFFF7FFF +#define S_02800C_DISABLE_VIEWPORT_CLAMP(x) (((unsigned)(x) & 0x1) << 16) +#define G_02800C_DISABLE_VIEWPORT_CLAMP(x) (((x) >> 16) & 0x1) +#define C_02800C_DISABLE_VIEWPORT_CLAMP 0xFFFEFFFF +#define S_02800C_IGNORE_SC_ZRANGE(x) (((unsigned)(x) & 0x1) << 17) +#define G_02800C_IGNORE_SC_ZRANGE(x) (((x) >> 17) & 0x1) +#define C_02800C_IGNORE_SC_ZRANGE 0xFFFDFFFF +#define S_02800C_DISABLE_FULLY_COVERED(x) (((unsigned)(x) & 0x1) << 18) +#define G_02800C_DISABLE_FULLY_COVERED(x) (((x) >> 18) & 0x1) +#define C_02800C_DISABLE_FULLY_COVERED 0xFFFBFFFF +#define S_02800C_FORCE_Z_LIMIT_SUMM(x) (((unsigned)(x) & 0x03) << 19) +#define G_02800C_FORCE_Z_LIMIT_SUMM(x) (((x) >> 19) & 0x03) +#define C_02800C_FORCE_Z_LIMIT_SUMM 0xFFE7FFFF +#define V_02800C_FORCE_SUMM_OFF 0x00 +#define V_02800C_FORCE_SUMM_MINZ 0x01 +#define V_02800C_FORCE_SUMM_MAXZ 0x02 +#define V_02800C_FORCE_SUMM_BOTH 0x03 +#define S_02800C_MAX_TILES_IN_DTT(x) (((unsigned)(x) & 0x1F) << 21) +#define G_02800C_MAX_TILES_IN_DTT(x) (((x) >> 21) & 0x1F) +#define C_02800C_MAX_TILES_IN_DTT 0xFC1FFFFF +#define S_02800C_DISABLE_TILE_RATE_TILES(x) (((unsigned)(x) & 0x1) << 26) +#define G_02800C_DISABLE_TILE_RATE_TILES(x) (((x) >> 26) & 0x1) +#define C_02800C_DISABLE_TILE_RATE_TILES 0xFBFFFFFF +#define S_02800C_FORCE_Z_DIRTY(x) (((unsigned)(x) & 0x1) << 27) +#define G_02800C_FORCE_Z_DIRTY(x) (((x) >> 27) & 0x1) +#define C_02800C_FORCE_Z_DIRTY 0xF7FFFFFF +#define S_02800C_FORCE_STENCIL_DIRTY(x) (((unsigned)(x) & 0x1) << 28) +#define G_02800C_FORCE_STENCIL_DIRTY(x) (((x) >> 28) & 0x1) +#define C_02800C_FORCE_STENCIL_DIRTY 0xEFFFFFFF +#define S_02800C_FORCE_Z_VALID(x) (((unsigned)(x) & 0x1) << 29) +#define G_02800C_FORCE_Z_VALID(x) (((x) >> 29) & 0x1) +#define C_02800C_FORCE_Z_VALID 0xDFFFFFFF +#define S_02800C_FORCE_STENCIL_VALID(x) (((unsigned)(x) & 0x1) << 30) +#define G_02800C_FORCE_STENCIL_VALID(x) (((x) >> 30) & 0x1) +#define C_02800C_FORCE_STENCIL_VALID 0xBFFFFFFF +#define S_02800C_PRESERVE_COMPRESSION(x) (((unsigned)(x) & 0x1) << 31) +#define G_02800C_PRESERVE_COMPRESSION(x) (((x) >> 31) & 0x1) +#define C_02800C_PRESERVE_COMPRESSION 0x7FFFFFFF +#define R_028010_DB_RENDER_OVERRIDE2 0x028010 +#define S_028010_PARTIAL_SQUAD_LAUNCH_CONTROL(x) (((unsigned)(x) & 0x03) << 0) +#define G_028010_PARTIAL_SQUAD_LAUNCH_CONTROL(x) (((x) >> 0) & 0x03) +#define C_028010_PARTIAL_SQUAD_LAUNCH_CONTROL 0xFFFFFFFC +#define V_028010_PSLC_AUTO 0x00 +#define V_028010_PSLC_ON_HANG_ONLY 0x01 +#define V_028010_PSLC_ASAP 0x02 +#define V_028010_PSLC_COUNTDOWN 0x03 +#define S_028010_PARTIAL_SQUAD_LAUNCH_COUNTDOWN(x) (((unsigned)(x) & 0x07) << 2) +#define G_028010_PARTIAL_SQUAD_LAUNCH_COUNTDOWN(x) (((x) >> 2) & 0x07) +#define C_028010_PARTIAL_SQUAD_LAUNCH_COUNTDOWN 0xFFFFFFE3 +#define S_028010_DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION(x) (((unsigned)(x) & 0x1) << 5) +#define G_028010_DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION(x) (((x) >> 5) & 0x1) +#define C_028010_DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION 0xFFFFFFDF +#define S_028010_DISABLE_SMEM_EXPCLEAR_OPTIMIZATION(x) (((unsigned)(x) & 0x1) << 6) +#define G_028010_DISABLE_SMEM_EXPCLEAR_OPTIMIZATION(x) (((x) >> 6) & 0x1) +#define C_028010_DISABLE_SMEM_EXPCLEAR_OPTIMIZATION 0xFFFFFFBF +#define S_028010_DISABLE_COLOR_ON_VALIDATION(x) (((unsigned)(x) & 0x1) << 7) +#define G_028010_DISABLE_COLOR_ON_VALIDATION(x) (((x) >> 7) & 0x1) +#define C_028010_DISABLE_COLOR_ON_VALIDATION 0xFFFFFF7F +#define S_028010_DECOMPRESS_Z_ON_FLUSH(x) (((unsigned)(x) & 0x1) << 8) +#define G_028010_DECOMPRESS_Z_ON_FLUSH(x) (((x) >> 8) & 0x1) +#define C_028010_DECOMPRESS_Z_ON_FLUSH 0xFFFFFEFF +#define S_028010_DISABLE_REG_SNOOP(x) (((unsigned)(x) & 0x1) << 9) +#define G_028010_DISABLE_REG_SNOOP(x) (((x) >> 9) & 0x1) +#define C_028010_DISABLE_REG_SNOOP 0xFFFFFDFF +#define S_028010_DEPTH_BOUNDS_HIER_DEPTH_DISABLE(x) (((unsigned)(x) & 0x1) << 10) +#define G_028010_DEPTH_BOUNDS_HIER_DEPTH_DISABLE(x) (((x) >> 10) & 0x1) +#define C_028010_DEPTH_BOUNDS_HIER_DEPTH_DISABLE 0xFFFFFBFF +/* CIK */ +#define S_028010_SEPARATE_HIZS_FUNC_ENABLE(x) (((unsigned)(x) & 0x1) << 11) +#define G_028010_SEPARATE_HIZS_FUNC_ENABLE(x) (((x) >> 11) & 0x1) +#define C_028010_SEPARATE_HIZS_FUNC_ENABLE 0xFFFFF7FF +#define S_028010_HIZ_ZFUNC(x) (((unsigned)(x) & 0x07) << 12) +#define G_028010_HIZ_ZFUNC(x) (((x) >> 12) & 0x07) +#define C_028010_HIZ_ZFUNC 0xFFFF8FFF +#define S_028010_HIS_SFUNC_FF(x) (((unsigned)(x) & 0x07) << 15) +#define G_028010_HIS_SFUNC_FF(x) (((x) >> 15) & 0x07) +#define C_028010_HIS_SFUNC_FF 0xFFFC7FFF +#define S_028010_HIS_SFUNC_BF(x) (((unsigned)(x) & 0x07) << 18) +#define G_028010_HIS_SFUNC_BF(x) (((x) >> 18) & 0x07) +#define C_028010_HIS_SFUNC_BF 0xFFE3FFFF +#define S_028010_PRESERVE_ZRANGE(x) (((unsigned)(x) & 0x1) << 21) +#define G_028010_PRESERVE_ZRANGE(x) (((x) >> 21) & 0x1) +#define C_028010_PRESERVE_ZRANGE 0xFFDFFFFF +#define S_028010_PRESERVE_SRESULTS(x) (((unsigned)(x) & 0x1) << 22) +#define G_028010_PRESERVE_SRESULTS(x) (((x) >> 22) & 0x1) +#define C_028010_PRESERVE_SRESULTS 0xFFBFFFFF +#define S_028010_DISABLE_FAST_PASS(x) (((unsigned)(x) & 0x1) << 23) +#define G_028010_DISABLE_FAST_PASS(x) (((x) >> 23) & 0x1) +#define C_028010_DISABLE_FAST_PASS 0xFF7FFFFF +/* */ +#define R_028014_DB_HTILE_DATA_BASE 0x028014 +#define R_028020_DB_DEPTH_BOUNDS_MIN 0x028020 +#define R_028024_DB_DEPTH_BOUNDS_MAX 0x028024 +#define R_028028_DB_STENCIL_CLEAR 0x028028 +#define S_028028_CLEAR(x) (((unsigned)(x) & 0xFF) << 0) +#define G_028028_CLEAR(x) (((x) >> 0) & 0xFF) +#define C_028028_CLEAR 0xFFFFFF00 +#define R_02802C_DB_DEPTH_CLEAR 0x02802C +#define R_028030_PA_SC_SCREEN_SCISSOR_TL 0x028030 +#define S_028030_TL_X(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_028030_TL_X(x) (((x) >> 0) & 0xFFFF) +#define C_028030_TL_X 0xFFFF0000 +#define S_028030_TL_Y(x) (((unsigned)(x) & 0xFFFF) << 16) +#define G_028030_TL_Y(x) (((x) >> 16) & 0xFFFF) +#define C_028030_TL_Y 0x0000FFFF +#define R_028034_PA_SC_SCREEN_SCISSOR_BR 0x028034 +#define S_028034_BR_X(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_028034_BR_X(x) (((x) >> 0) & 0xFFFF) +#define C_028034_BR_X 0xFFFF0000 +#define S_028034_BR_Y(x) (((unsigned)(x) & 0xFFFF) << 16) +#define G_028034_BR_Y(x) (((x) >> 16) & 0xFFFF) +#define C_028034_BR_Y 0x0000FFFF +#define R_02803C_DB_DEPTH_INFO 0x02803C +#define S_02803C_ADDR5_SWIZZLE_MASK(x) (((unsigned)(x) & 0x0F) << 0) +#define G_02803C_ADDR5_SWIZZLE_MASK(x) (((x) >> 0) & 0x0F) +#define C_02803C_ADDR5_SWIZZLE_MASK 0xFFFFFFF0 +/* CIK */ +#define S_02803C_ARRAY_MODE(x) (((unsigned)(x) & 0x0F) << 4) +#define G_02803C_ARRAY_MODE(x) (((x) >> 4) & 0x0F) +#define C_02803C_ARRAY_MODE 0xFFFFFF0F +#define V_02803C_ARRAY_LINEAR_GENERAL 0x00 +#define V_02803C_ARRAY_LINEAR_ALIGNED 0x01 +#define V_02803C_ARRAY_1D_TILED_THIN1 0x02 +#define V_02803C_ARRAY_2D_TILED_THIN1 0x04 +#define V_02803C_ARRAY_PRT_TILED_THIN1 0x05 +#define V_02803C_ARRAY_PRT_2D_TILED_THIN1 0x06 +#define S_02803C_PIPE_CONFIG(x) (((unsigned)(x) & 0x1F) << 8) +#define G_02803C_PIPE_CONFIG(x) (((x) >> 8) & 0x1F) +#define C_02803C_PIPE_CONFIG 0xFFFFE0FF +#define V_02803C_ADDR_SURF_P2 0x00 +#define V_02803C_X_ADDR_SURF_P4_8X16 0x04 +#define V_02803C_X_ADDR_SURF_P4_16X16 0x05 +#define V_02803C_X_ADDR_SURF_P4_16X32 0x06 +#define V_02803C_X_ADDR_SURF_P4_32X32 0x07 +#define V_02803C_X_ADDR_SURF_P8_16X16_8X16 0x08 +#define V_02803C_X_ADDR_SURF_P8_16X32_8X16 0x09 +#define V_02803C_X_ADDR_SURF_P8_32X32_8X16 0x0A +#define V_02803C_X_ADDR_SURF_P8_16X32_16X16 0x0B +#define V_02803C_X_ADDR_SURF_P8_32X32_16X16 0x0C +#define V_02803C_X_ADDR_SURF_P8_32X32_16X32 0x0D +#define V_02803C_X_ADDR_SURF_P8_32X64_32X32 0x0E +#define V_02803C_X_ADDR_SURF_P16_32X32_8X16 0x10 +#define V_02803C_X_ADDR_SURF_P16_32X32_16X16 0x11 +#define S_02803C_BANK_WIDTH(x) (((unsigned)(x) & 0x03) << 13) +#define G_02803C_BANK_WIDTH(x) (((x) >> 13) & 0x03) +#define C_02803C_BANK_WIDTH 0xFFFF9FFF +#define V_02803C_ADDR_SURF_BANK_WIDTH_1 0x00 +#define V_02803C_ADDR_SURF_BANK_WIDTH_2 0x01 +#define V_02803C_ADDR_SURF_BANK_WIDTH_4 0x02 +#define V_02803C_ADDR_SURF_BANK_WIDTH_8 0x03 +#define S_02803C_BANK_HEIGHT(x) (((unsigned)(x) & 0x03) << 15) +#define G_02803C_BANK_HEIGHT(x) (((x) >> 15) & 0x03) +#define C_02803C_BANK_HEIGHT 0xFFFE7FFF +#define V_02803C_ADDR_SURF_BANK_HEIGHT_1 0x00 +#define V_02803C_ADDR_SURF_BANK_HEIGHT_2 0x01 +#define V_02803C_ADDR_SURF_BANK_HEIGHT_4 0x02 +#define V_02803C_ADDR_SURF_BANK_HEIGHT_8 0x03 +#define S_02803C_MACRO_TILE_ASPECT(x) (((unsigned)(x) & 0x03) << 17) +#define G_02803C_MACRO_TILE_ASPECT(x) (((x) >> 17) & 0x03) +#define C_02803C_MACRO_TILE_ASPECT 0xFFF9FFFF +#define V_02803C_ADDR_SURF_MACRO_ASPECT_1 0x00 +#define V_02803C_ADDR_SURF_MACRO_ASPECT_2 0x01 +#define V_02803C_ADDR_SURF_MACRO_ASPECT_4 0x02 +#define V_02803C_ADDR_SURF_MACRO_ASPECT_8 0x03 +#define S_02803C_NUM_BANKS(x) (((unsigned)(x) & 0x03) << 19) +#define G_02803C_NUM_BANKS(x) (((x) >> 19) & 0x03) +#define C_02803C_NUM_BANKS 0xFFE7FFFF +#define V_02803C_ADDR_SURF_2_BANK 0x00 +#define V_02803C_ADDR_SURF_4_BANK 0x01 +#define V_02803C_ADDR_SURF_8_BANK 0x02 +#define V_02803C_ADDR_SURF_16_BANK 0x03 +/* */ +#define R_028040_DB_Z_INFO 0x028040 +#define S_028040_FORMAT(x) (((unsigned)(x) & 0x03) << 0) +#define G_028040_FORMAT(x) (((x) >> 0) & 0x03) +#define C_028040_FORMAT 0xFFFFFFFC +#define V_028040_Z_INVALID 0x00 +#define V_028040_Z_16 0x01 +#define V_028040_Z_24 0x02 /* deprecated */ +#define V_028040_Z_32_FLOAT 0x03 +#define S_028040_NUM_SAMPLES(x) (((unsigned)(x) & 0x03) << 2) +#define G_028040_NUM_SAMPLES(x) (((x) >> 2) & 0x03) +#define C_028040_NUM_SAMPLES 0xFFFFFFF3 +/* CIK */ +#define S_028040_TILE_SPLIT(x) (((unsigned)(x) & 0x07) << 13) +#define G_028040_TILE_SPLIT(x) (((x) >> 13) & 0x07) +#define C_028040_TILE_SPLIT 0xFFFF1FFF +#define V_028040_ADDR_SURF_TILE_SPLIT_64B 0x00 +#define V_028040_ADDR_SURF_TILE_SPLIT_128B 0x01 +#define V_028040_ADDR_SURF_TILE_SPLIT_256B 0x02 +#define V_028040_ADDR_SURF_TILE_SPLIT_512B 0x03 +#define V_028040_ADDR_SURF_TILE_SPLIT_1KB 0x04 +#define V_028040_ADDR_SURF_TILE_SPLIT_2KB 0x05 +#define V_028040_ADDR_SURF_TILE_SPLIT_4KB 0x06 +/* */ +#define S_028040_TILE_MODE_INDEX(x) (((unsigned)(x) & 0x07) << 20) /* not on CIK */ +#define G_028040_TILE_MODE_INDEX(x) (((x) >> 20) & 0x07) /* not on CIK */ +#define C_028040_TILE_MODE_INDEX 0xFF8FFFFF /* not on CIK */ +/* VI */ +#define S_028040_DECOMPRESS_ON_N_ZPLANES(x) (((unsigned)(x) & 0x0F) << 23) +#define G_028040_DECOMPRESS_ON_N_ZPLANES(x) (((x) >> 23) & 0x0F) +#define C_028040_DECOMPRESS_ON_N_ZPLANES 0xF87FFFFF +/* */ +#define S_028040_ALLOW_EXPCLEAR(x) (((unsigned)(x) & 0x1) << 27) +#define G_028040_ALLOW_EXPCLEAR(x) (((x) >> 27) & 0x1) +#define C_028040_ALLOW_EXPCLEAR 0xF7FFFFFF +#define S_028040_READ_SIZE(x) (((unsigned)(x) & 0x1) << 28) +#define G_028040_READ_SIZE(x) (((x) >> 28) & 0x1) +#define C_028040_READ_SIZE 0xEFFFFFFF +#define S_028040_TILE_SURFACE_ENABLE(x) (((unsigned)(x) & 0x1) << 29) +#define G_028040_TILE_SURFACE_ENABLE(x) (((x) >> 29) & 0x1) +#define C_028040_TILE_SURFACE_ENABLE 0xDFFFFFFF +/* VI */ +#define S_028040_CLEAR_DISALLOWED(x) (((unsigned)(x) & 0x1) << 30) +#define G_028040_CLEAR_DISALLOWED(x) (((x) >> 30) & 0x1) +#define C_028040_CLEAR_DISALLOWED 0xBFFFFFFF +/* */ +#define S_028040_ZRANGE_PRECISION(x) (((unsigned)(x) & 0x1) << 31) +#define G_028040_ZRANGE_PRECISION(x) (((x) >> 31) & 0x1) +#define C_028040_ZRANGE_PRECISION 0x7FFFFFFF +#define R_028044_DB_STENCIL_INFO 0x028044 +#define S_028044_FORMAT(x) (((unsigned)(x) & 0x1) << 0) +#define G_028044_FORMAT(x) (((x) >> 0) & 0x1) +#define C_028044_FORMAT 0xFFFFFFFE +#define V_028044_STENCIL_INVALID 0x00 +#define V_028044_STENCIL_8 0x01 +/* CIK */ +#define S_028044_TILE_SPLIT(x) (((unsigned)(x) & 0x07) << 13) +#define G_028044_TILE_SPLIT(x) (((x) >> 13) & 0x07) +#define C_028044_TILE_SPLIT 0xFFFF1FFF +#define V_028044_ADDR_SURF_TILE_SPLIT_64B 0x00 +#define V_028044_ADDR_SURF_TILE_SPLIT_128B 0x01 +#define V_028044_ADDR_SURF_TILE_SPLIT_256B 0x02 +#define V_028044_ADDR_SURF_TILE_SPLIT_512B 0x03 +#define V_028044_ADDR_SURF_TILE_SPLIT_1KB 0x04 +#define V_028044_ADDR_SURF_TILE_SPLIT_2KB 0x05 +#define V_028044_ADDR_SURF_TILE_SPLIT_4KB 0x06 +/* */ +#define S_028044_TILE_MODE_INDEX(x) (((unsigned)(x) & 0x07) << 20) /* not on CIK */ +#define G_028044_TILE_MODE_INDEX(x) (((x) >> 20) & 0x07) /* not on CIK */ +#define C_028044_TILE_MODE_INDEX 0xFF8FFFFF /* not on CIK */ +#define S_028044_ALLOW_EXPCLEAR(x) (((unsigned)(x) & 0x1) << 27) +#define G_028044_ALLOW_EXPCLEAR(x) (((x) >> 27) & 0x1) +#define C_028044_ALLOW_EXPCLEAR 0xF7FFFFFF +#define S_028044_TILE_STENCIL_DISABLE(x) (((unsigned)(x) & 0x1) << 29) +#define G_028044_TILE_STENCIL_DISABLE(x) (((x) >> 29) & 0x1) +#define C_028044_TILE_STENCIL_DISABLE 0xDFFFFFFF +/* VI */ +#define S_028044_CLEAR_DISALLOWED(x) (((unsigned)(x) & 0x1) << 30) +#define G_028044_CLEAR_DISALLOWED(x) (((x) >> 30) & 0x1) +#define C_028044_CLEAR_DISALLOWED 0xBFFFFFFF +/* */ +#define R_028048_DB_Z_READ_BASE 0x028048 +#define R_02804C_DB_STENCIL_READ_BASE 0x02804C +#define R_028050_DB_Z_WRITE_BASE 0x028050 +#define R_028054_DB_STENCIL_WRITE_BASE 0x028054 +#define R_028058_DB_DEPTH_SIZE 0x028058 +#define S_028058_PITCH_TILE_MAX(x) (((unsigned)(x) & 0x7FF) << 0) +#define G_028058_PITCH_TILE_MAX(x) (((x) >> 0) & 0x7FF) +#define C_028058_PITCH_TILE_MAX 0xFFFFF800 +#define S_028058_HEIGHT_TILE_MAX(x) (((unsigned)(x) & 0x7FF) << 11) +#define G_028058_HEIGHT_TILE_MAX(x) (((x) >> 11) & 0x7FF) +#define C_028058_HEIGHT_TILE_MAX 0xFFC007FF +#define R_02805C_DB_DEPTH_SLICE 0x02805C +#define S_02805C_SLICE_TILE_MAX(x) (((unsigned)(x) & 0x3FFFFF) << 0) +#define G_02805C_SLICE_TILE_MAX(x) (((x) >> 0) & 0x3FFFFF) +#define C_02805C_SLICE_TILE_MAX 0xFFC00000 +#define R_028080_TA_BC_BASE_ADDR 0x028080 +/* CIK */ +#define R_028084_TA_BC_BASE_ADDR_HI 0x028084 +#define S_028084_ADDRESS(x) (((unsigned)(x) & 0xFF) << 0) +#define G_028084_ADDRESS(x) (((x) >> 0) & 0xFF) +#define C_028084_ADDRESS 0xFFFFFF00 +#define R_0281E8_COHER_DEST_BASE_HI_0 0x0281E8 +#define R_0281EC_COHER_DEST_BASE_HI_1 0x0281EC +#define R_0281F0_COHER_DEST_BASE_HI_2 0x0281F0 +#define R_0281F4_COHER_DEST_BASE_HI_3 0x0281F4 +/* */ +#define R_0281F8_COHER_DEST_BASE_2 0x0281F8 +#define R_0281FC_COHER_DEST_BASE_3 0x0281FC +#define R_028200_PA_SC_WINDOW_OFFSET 0x028200 +#define S_028200_WINDOW_X_OFFSET(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_028200_WINDOW_X_OFFSET(x) (((x) >> 0) & 0xFFFF) +#define C_028200_WINDOW_X_OFFSET 0xFFFF0000 +#define S_028200_WINDOW_Y_OFFSET(x) (((unsigned)(x) & 0xFFFF) << 16) +#define G_028200_WINDOW_Y_OFFSET(x) (((x) >> 16) & 0xFFFF) +#define C_028200_WINDOW_Y_OFFSET 0x0000FFFF +#define R_028204_PA_SC_WINDOW_SCISSOR_TL 0x028204 +#define S_028204_TL_X(x) (((unsigned)(x) & 0x7FFF) << 0) +#define G_028204_TL_X(x) (((x) >> 0) & 0x7FFF) +#define C_028204_TL_X 0xFFFF8000 +#define S_028204_TL_Y(x) (((unsigned)(x) & 0x7FFF) << 16) +#define G_028204_TL_Y(x) (((x) >> 16) & 0x7FFF) +#define C_028204_TL_Y 0x8000FFFF +#define S_028204_WINDOW_OFFSET_DISABLE(x) (((unsigned)(x) & 0x1) << 31) +#define G_028204_WINDOW_OFFSET_DISABLE(x) (((x) >> 31) & 0x1) +#define C_028204_WINDOW_OFFSET_DISABLE 0x7FFFFFFF +#define R_028208_PA_SC_WINDOW_SCISSOR_BR 0x028208 +#define S_028208_BR_X(x) (((unsigned)(x) & 0x7FFF) << 0) +#define G_028208_BR_X(x) (((x) >> 0) & 0x7FFF) +#define C_028208_BR_X 0xFFFF8000 +#define S_028208_BR_Y(x) (((unsigned)(x) & 0x7FFF) << 16) +#define G_028208_BR_Y(x) (((x) >> 16) & 0x7FFF) +#define C_028208_BR_Y 0x8000FFFF +#define R_02820C_PA_SC_CLIPRECT_RULE 0x02820C +#define S_02820C_CLIP_RULE(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_02820C_CLIP_RULE(x) (((x) >> 0) & 0xFFFF) +#define C_02820C_CLIP_RULE 0xFFFF0000 +#define R_028210_PA_SC_CLIPRECT_0_TL 0x028210 +#define S_028210_TL_X(x) (((unsigned)(x) & 0x7FFF) << 0) +#define G_028210_TL_X(x) (((x) >> 0) & 0x7FFF) +#define C_028210_TL_X 0xFFFF8000 +#define S_028210_TL_Y(x) (((unsigned)(x) & 0x7FFF) << 16) +#define G_028210_TL_Y(x) (((x) >> 16) & 0x7FFF) +#define C_028210_TL_Y 0x8000FFFF +#define R_028214_PA_SC_CLIPRECT_0_BR 0x028214 +#define S_028214_BR_X(x) (((unsigned)(x) & 0x7FFF) << 0) +#define G_028214_BR_X(x) (((x) >> 0) & 0x7FFF) +#define C_028214_BR_X 0xFFFF8000 +#define S_028214_BR_Y(x) (((unsigned)(x) & 0x7FFF) << 16) +#define G_028214_BR_Y(x) (((x) >> 16) & 0x7FFF) +#define C_028214_BR_Y 0x8000FFFF +#define R_028218_PA_SC_CLIPRECT_1_TL 0x028218 +#define R_02821C_PA_SC_CLIPRECT_1_BR 0x02821C +#define R_028220_PA_SC_CLIPRECT_2_TL 0x028220 +#define R_028224_PA_SC_CLIPRECT_2_BR 0x028224 +#define R_028228_PA_SC_CLIPRECT_3_TL 0x028228 +#define R_02822C_PA_SC_CLIPRECT_3_BR 0x02822C +#define R_028230_PA_SC_EDGERULE 0x028230 +#define S_028230_ER_TRI(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028230_ER_TRI(x) (((x) >> 0) & 0x0F) +#define C_028230_ER_TRI 0xFFFFFFF0 +#define S_028230_ER_POINT(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028230_ER_POINT(x) (((x) >> 4) & 0x0F) +#define C_028230_ER_POINT 0xFFFFFF0F +#define S_028230_ER_RECT(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028230_ER_RECT(x) (((x) >> 8) & 0x0F) +#define C_028230_ER_RECT 0xFFFFF0FF +#define S_028230_ER_LINE_LR(x) (((unsigned)(x) & 0x3F) << 12) +#define G_028230_ER_LINE_LR(x) (((x) >> 12) & 0x3F) +#define C_028230_ER_LINE_LR 0xFFFC0FFF +#define S_028230_ER_LINE_RL(x) (((unsigned)(x) & 0x3F) << 18) +#define G_028230_ER_LINE_RL(x) (((x) >> 18) & 0x3F) +#define C_028230_ER_LINE_RL 0xFF03FFFF +#define S_028230_ER_LINE_TB(x) (((unsigned)(x) & 0x0F) << 24) +#define G_028230_ER_LINE_TB(x) (((x) >> 24) & 0x0F) +#define C_028230_ER_LINE_TB 0xF0FFFFFF +#define S_028230_ER_LINE_BT(x) (((unsigned)(x) & 0x0F) << 28) +#define G_028230_ER_LINE_BT(x) (((x) >> 28) & 0x0F) +#define C_028230_ER_LINE_BT 0x0FFFFFFF +#define R_028234_PA_SU_HARDWARE_SCREEN_OFFSET 0x028234 +#define S_028234_HW_SCREEN_OFFSET_X(x) (((unsigned)(x) & 0x1FF) << 0) +#define G_028234_HW_SCREEN_OFFSET_X(x) (((x) >> 0) & 0x1FF) +#define C_028234_HW_SCREEN_OFFSET_X 0xFFFFFE00 +#define S_028234_HW_SCREEN_OFFSET_Y(x) (((unsigned)(x) & 0x1FF) << 16) +#define G_028234_HW_SCREEN_OFFSET_Y(x) (((x) >> 16) & 0x1FF) +#define C_028234_HW_SCREEN_OFFSET_Y 0xFE00FFFF +#define R_028238_CB_TARGET_MASK 0x028238 +#define S_028238_TARGET0_ENABLE(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028238_TARGET0_ENABLE(x) (((x) >> 0) & 0x0F) +#define C_028238_TARGET0_ENABLE 0xFFFFFFF0 +#define S_028238_TARGET1_ENABLE(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028238_TARGET1_ENABLE(x) (((x) >> 4) & 0x0F) +#define C_028238_TARGET1_ENABLE 0xFFFFFF0F +#define S_028238_TARGET2_ENABLE(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028238_TARGET2_ENABLE(x) (((x) >> 8) & 0x0F) +#define C_028238_TARGET2_ENABLE 0xFFFFF0FF +#define S_028238_TARGET3_ENABLE(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028238_TARGET3_ENABLE(x) (((x) >> 12) & 0x0F) +#define C_028238_TARGET3_ENABLE 0xFFFF0FFF +#define S_028238_TARGET4_ENABLE(x) (((unsigned)(x) & 0x0F) << 16) +#define G_028238_TARGET4_ENABLE(x) (((x) >> 16) & 0x0F) +#define C_028238_TARGET4_ENABLE 0xFFF0FFFF +#define S_028238_TARGET5_ENABLE(x) (((unsigned)(x) & 0x0F) << 20) +#define G_028238_TARGET5_ENABLE(x) (((x) >> 20) & 0x0F) +#define C_028238_TARGET5_ENABLE 0xFF0FFFFF +#define S_028238_TARGET6_ENABLE(x) (((unsigned)(x) & 0x0F) << 24) +#define G_028238_TARGET6_ENABLE(x) (((x) >> 24) & 0x0F) +#define C_028238_TARGET6_ENABLE 0xF0FFFFFF +#define S_028238_TARGET7_ENABLE(x) (((unsigned)(x) & 0x0F) << 28) +#define G_028238_TARGET7_ENABLE(x) (((x) >> 28) & 0x0F) +#define C_028238_TARGET7_ENABLE 0x0FFFFFFF +#define R_02823C_CB_SHADER_MASK 0x02823C +#define S_02823C_OUTPUT0_ENABLE(x) (((unsigned)(x) & 0x0F) << 0) +#define G_02823C_OUTPUT0_ENABLE(x) (((x) >> 0) & 0x0F) +#define C_02823C_OUTPUT0_ENABLE 0xFFFFFFF0 +#define S_02823C_OUTPUT1_ENABLE(x) (((unsigned)(x) & 0x0F) << 4) +#define G_02823C_OUTPUT1_ENABLE(x) (((x) >> 4) & 0x0F) +#define C_02823C_OUTPUT1_ENABLE 0xFFFFFF0F +#define S_02823C_OUTPUT2_ENABLE(x) (((unsigned)(x) & 0x0F) << 8) +#define G_02823C_OUTPUT2_ENABLE(x) (((x) >> 8) & 0x0F) +#define C_02823C_OUTPUT2_ENABLE 0xFFFFF0FF +#define S_02823C_OUTPUT3_ENABLE(x) (((unsigned)(x) & 0x0F) << 12) +#define G_02823C_OUTPUT3_ENABLE(x) (((x) >> 12) & 0x0F) +#define C_02823C_OUTPUT3_ENABLE 0xFFFF0FFF +#define S_02823C_OUTPUT4_ENABLE(x) (((unsigned)(x) & 0x0F) << 16) +#define G_02823C_OUTPUT4_ENABLE(x) (((x) >> 16) & 0x0F) +#define C_02823C_OUTPUT4_ENABLE 0xFFF0FFFF +#define S_02823C_OUTPUT5_ENABLE(x) (((unsigned)(x) & 0x0F) << 20) +#define G_02823C_OUTPUT5_ENABLE(x) (((x) >> 20) & 0x0F) +#define C_02823C_OUTPUT5_ENABLE 0xFF0FFFFF +#define S_02823C_OUTPUT6_ENABLE(x) (((unsigned)(x) & 0x0F) << 24) +#define G_02823C_OUTPUT6_ENABLE(x) (((x) >> 24) & 0x0F) +#define C_02823C_OUTPUT6_ENABLE 0xF0FFFFFF +#define S_02823C_OUTPUT7_ENABLE(x) (((unsigned)(x) & 0x0F) << 28) +#define G_02823C_OUTPUT7_ENABLE(x) (((x) >> 28) & 0x0F) +#define C_02823C_OUTPUT7_ENABLE 0x0FFFFFFF +#define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240 +#define S_028240_TL_X(x) (((unsigned)(x) & 0x7FFF) << 0) +#define G_028240_TL_X(x) (((x) >> 0) & 0x7FFF) +#define C_028240_TL_X 0xFFFF8000 +#define S_028240_TL_Y(x) (((unsigned)(x) & 0x7FFF) << 16) +#define G_028240_TL_Y(x) (((x) >> 16) & 0x7FFF) +#define C_028240_TL_Y 0x8000FFFF +#define S_028240_WINDOW_OFFSET_DISABLE(x) (((unsigned)(x) & 0x1) << 31) +#define G_028240_WINDOW_OFFSET_DISABLE(x) (((x) >> 31) & 0x1) +#define C_028240_WINDOW_OFFSET_DISABLE 0x7FFFFFFF +#define R_028244_PA_SC_GENERIC_SCISSOR_BR 0x028244 +#define S_028244_BR_X(x) (((unsigned)(x) & 0x7FFF) << 0) +#define G_028244_BR_X(x) (((x) >> 0) & 0x7FFF) +#define C_028244_BR_X 0xFFFF8000 +#define S_028244_BR_Y(x) (((unsigned)(x) & 0x7FFF) << 16) +#define G_028244_BR_Y(x) (((x) >> 16) & 0x7FFF) +#define C_028244_BR_Y 0x8000FFFF +#define R_028248_COHER_DEST_BASE_0 0x028248 +#define R_02824C_COHER_DEST_BASE_1 0x02824C +#define R_028250_PA_SC_VPORT_SCISSOR_0_TL 0x028250 +#define S_028250_TL_X(x) (((unsigned)(x) & 0x7FFF) << 0) +#define G_028250_TL_X(x) (((x) >> 0) & 0x7FFF) +#define C_028250_TL_X 0xFFFF8000 +#define S_028250_TL_Y(x) (((unsigned)(x) & 0x7FFF) << 16) +#define G_028250_TL_Y(x) (((x) >> 16) & 0x7FFF) +#define C_028250_TL_Y 0x8000FFFF +#define S_028250_WINDOW_OFFSET_DISABLE(x) (((unsigned)(x) & 0x1) << 31) +#define G_028250_WINDOW_OFFSET_DISABLE(x) (((x) >> 31) & 0x1) +#define C_028250_WINDOW_OFFSET_DISABLE 0x7FFFFFFF +#define R_028254_PA_SC_VPORT_SCISSOR_0_BR 0x028254 +#define S_028254_BR_X(x) (((unsigned)(x) & 0x7FFF) << 0) +#define G_028254_BR_X(x) (((x) >> 0) & 0x7FFF) +#define C_028254_BR_X 0xFFFF8000 +#define S_028254_BR_Y(x) (((unsigned)(x) & 0x7FFF) << 16) +#define G_028254_BR_Y(x) (((x) >> 16) & 0x7FFF) +#define C_028254_BR_Y 0x8000FFFF +#define R_028258_PA_SC_VPORT_SCISSOR_1_TL 0x028258 +#define R_02825C_PA_SC_VPORT_SCISSOR_1_BR 0x02825C +#define R_028260_PA_SC_VPORT_SCISSOR_2_TL 0x028260 +#define R_028264_PA_SC_VPORT_SCISSOR_2_BR 0x028264 +#define R_028268_PA_SC_VPORT_SCISSOR_3_TL 0x028268 +#define R_02826C_PA_SC_VPORT_SCISSOR_3_BR 0x02826C +#define R_028270_PA_SC_VPORT_SCISSOR_4_TL 0x028270 +#define R_028274_PA_SC_VPORT_SCISSOR_4_BR 0x028274 +#define R_028278_PA_SC_VPORT_SCISSOR_5_TL 0x028278 +#define R_02827C_PA_SC_VPORT_SCISSOR_5_BR 0x02827C +#define R_028280_PA_SC_VPORT_SCISSOR_6_TL 0x028280 +#define R_028284_PA_SC_VPORT_SCISSOR_6_BR 0x028284 +#define R_028288_PA_SC_VPORT_SCISSOR_7_TL 0x028288 +#define R_02828C_PA_SC_VPORT_SCISSOR_7_BR 0x02828C +#define R_028290_PA_SC_VPORT_SCISSOR_8_TL 0x028290 +#define R_028294_PA_SC_VPORT_SCISSOR_8_BR 0x028294 +#define R_028298_PA_SC_VPORT_SCISSOR_9_TL 0x028298 +#define R_02829C_PA_SC_VPORT_SCISSOR_9_BR 0x02829C +#define R_0282A0_PA_SC_VPORT_SCISSOR_10_TL 0x0282A0 +#define R_0282A4_PA_SC_VPORT_SCISSOR_10_BR 0x0282A4 +#define R_0282A8_PA_SC_VPORT_SCISSOR_11_TL 0x0282A8 +#define R_0282AC_PA_SC_VPORT_SCISSOR_11_BR 0x0282AC +#define R_0282B0_PA_SC_VPORT_SCISSOR_12_TL 0x0282B0 +#define R_0282B4_PA_SC_VPORT_SCISSOR_12_BR 0x0282B4 +#define R_0282B8_PA_SC_VPORT_SCISSOR_13_TL 0x0282B8 +#define R_0282BC_PA_SC_VPORT_SCISSOR_13_BR 0x0282BC +#define R_0282C0_PA_SC_VPORT_SCISSOR_14_TL 0x0282C0 +#define R_0282C4_PA_SC_VPORT_SCISSOR_14_BR 0x0282C4 +#define R_0282C8_PA_SC_VPORT_SCISSOR_15_TL 0x0282C8 +#define R_0282CC_PA_SC_VPORT_SCISSOR_15_BR 0x0282CC +#define R_0282D0_PA_SC_VPORT_ZMIN_0 0x0282D0 +#define R_0282D4_PA_SC_VPORT_ZMAX_0 0x0282D4 +#define R_0282D8_PA_SC_VPORT_ZMIN_1 0x0282D8 +#define R_0282DC_PA_SC_VPORT_ZMAX_1 0x0282DC +#define R_0282E0_PA_SC_VPORT_ZMIN_2 0x0282E0 +#define R_0282E4_PA_SC_VPORT_ZMAX_2 0x0282E4 +#define R_0282E8_PA_SC_VPORT_ZMIN_3 0x0282E8 +#define R_0282EC_PA_SC_VPORT_ZMAX_3 0x0282EC +#define R_0282F0_PA_SC_VPORT_ZMIN_4 0x0282F0 +#define R_0282F4_PA_SC_VPORT_ZMAX_4 0x0282F4 +#define R_0282F8_PA_SC_VPORT_ZMIN_5 0x0282F8 +#define R_0282FC_PA_SC_VPORT_ZMAX_5 0x0282FC +#define R_028300_PA_SC_VPORT_ZMIN_6 0x028300 +#define R_028304_PA_SC_VPORT_ZMAX_6 0x028304 +#define R_028308_PA_SC_VPORT_ZMIN_7 0x028308 +#define R_02830C_PA_SC_VPORT_ZMAX_7 0x02830C +#define R_028310_PA_SC_VPORT_ZMIN_8 0x028310 +#define R_028314_PA_SC_VPORT_ZMAX_8 0x028314 +#define R_028318_PA_SC_VPORT_ZMIN_9 0x028318 +#define R_02831C_PA_SC_VPORT_ZMAX_9 0x02831C +#define R_028320_PA_SC_VPORT_ZMIN_10 0x028320 +#define R_028324_PA_SC_VPORT_ZMAX_10 0x028324 +#define R_028328_PA_SC_VPORT_ZMIN_11 0x028328 +#define R_02832C_PA_SC_VPORT_ZMAX_11 0x02832C +#define R_028330_PA_SC_VPORT_ZMIN_12 0x028330 +#define R_028334_PA_SC_VPORT_ZMAX_12 0x028334 +#define R_028338_PA_SC_VPORT_ZMIN_13 0x028338 +#define R_02833C_PA_SC_VPORT_ZMAX_13 0x02833C +#define R_028340_PA_SC_VPORT_ZMIN_14 0x028340 +#define R_028344_PA_SC_VPORT_ZMAX_14 0x028344 +#define R_028348_PA_SC_VPORT_ZMIN_15 0x028348 +#define R_02834C_PA_SC_VPORT_ZMAX_15 0x02834C +#define R_028350_PA_SC_RASTER_CONFIG 0x028350 +#define S_028350_RB_MAP_PKR0(x) (((unsigned)(x) & 0x03) << 0) +#define G_028350_RB_MAP_PKR0(x) (((x) >> 0) & 0x03) +#define C_028350_RB_MAP_PKR0 0xFFFFFFFC +#define V_028350_RASTER_CONFIG_RB_MAP_0 0x00 +#define V_028350_RASTER_CONFIG_RB_MAP_1 0x01 +#define V_028350_RASTER_CONFIG_RB_MAP_2 0x02 +#define V_028350_RASTER_CONFIG_RB_MAP_3 0x03 +#define S_028350_RB_MAP_PKR1(x) (((unsigned)(x) & 0x03) << 2) +#define G_028350_RB_MAP_PKR1(x) (((x) >> 2) & 0x03) +#define C_028350_RB_MAP_PKR1 0xFFFFFFF3 +#define V_028350_RASTER_CONFIG_RB_MAP_0 0x00 +#define V_028350_RASTER_CONFIG_RB_MAP_1 0x01 +#define V_028350_RASTER_CONFIG_RB_MAP_2 0x02 +#define V_028350_RASTER_CONFIG_RB_MAP_3 0x03 +#define S_028350_RB_XSEL2(x) (((unsigned)(x) & 0x03) << 4) +#define G_028350_RB_XSEL2(x) (((x) >> 4) & 0x03) +#define C_028350_RB_XSEL2 0xFFFFFFCF +#define V_028350_RASTER_CONFIG_RB_XSEL2_0 0x00 +#define V_028350_RASTER_CONFIG_RB_XSEL2_1 0x01 +#define V_028350_RASTER_CONFIG_RB_XSEL2_2 0x02 +#define V_028350_RASTER_CONFIG_RB_XSEL2_3 0x03 +#define S_028350_RB_XSEL(x) (((unsigned)(x) & 0x1) << 6) +#define G_028350_RB_XSEL(x) (((x) >> 6) & 0x1) +#define C_028350_RB_XSEL 0xFFFFFFBF +#define S_028350_RB_YSEL(x) (((unsigned)(x) & 0x1) << 7) +#define G_028350_RB_YSEL(x) (((x) >> 7) & 0x1) +#define C_028350_RB_YSEL 0xFFFFFF7F +#define S_028350_PKR_MAP(x) (((unsigned)(x) & 0x03) << 8) +#define G_028350_PKR_MAP(x) (((x) >> 8) & 0x03) +#define C_028350_PKR_MAP 0xFFFFFCFF +#define V_028350_RASTER_CONFIG_PKR_MAP_0 0x00 +#define V_028350_RASTER_CONFIG_PKR_MAP_1 0x01 +#define V_028350_RASTER_CONFIG_PKR_MAP_2 0x02 +#define V_028350_RASTER_CONFIG_PKR_MAP_3 0x03 +#define S_028350_PKR_XSEL(x) (((unsigned)(x) & 0x03) << 10) +#define G_028350_PKR_XSEL(x) (((x) >> 10) & 0x03) +#define C_028350_PKR_XSEL 0xFFFFF3FF +#define V_028350_RASTER_CONFIG_PKR_XSEL_0 0x00 +#define V_028350_RASTER_CONFIG_PKR_XSEL_1 0x01 +#define V_028350_RASTER_CONFIG_PKR_XSEL_2 0x02 +#define V_028350_RASTER_CONFIG_PKR_XSEL_3 0x03 +#define S_028350_PKR_YSEL(x) (((unsigned)(x) & 0x03) << 12) +#define G_028350_PKR_YSEL(x) (((x) >> 12) & 0x03) +#define C_028350_PKR_YSEL 0xFFFFCFFF +#define V_028350_RASTER_CONFIG_PKR_YSEL_0 0x00 +#define V_028350_RASTER_CONFIG_PKR_YSEL_1 0x01 +#define V_028350_RASTER_CONFIG_PKR_YSEL_2 0x02 +#define V_028350_RASTER_CONFIG_PKR_YSEL_3 0x03 +#define S_028350_PKR_XSEL2(x) (((unsigned)(x) & 0x03) << 14) +#define G_028350_PKR_XSEL2(x) (((x) >> 14) & 0x03) +#define C_028350_PKR_XSEL2 0xFFFF3FFF +#define V_028350_RASTER_CONFIG_PKR_XSEL2_0 0x00 +#define V_028350_RASTER_CONFIG_PKR_XSEL2_1 0x01 +#define V_028350_RASTER_CONFIG_PKR_XSEL2_2 0x02 +#define V_028350_RASTER_CONFIG_PKR_XSEL2_3 0x03 +#define S_028350_SC_MAP(x) (((unsigned)(x) & 0x03) << 16) +#define G_028350_SC_MAP(x) (((x) >> 16) & 0x03) +#define C_028350_SC_MAP 0xFFFCFFFF +#define V_028350_RASTER_CONFIG_SC_MAP_0 0x00 +#define V_028350_RASTER_CONFIG_SC_MAP_1 0x01 +#define V_028350_RASTER_CONFIG_SC_MAP_2 0x02 +#define V_028350_RASTER_CONFIG_SC_MAP_3 0x03 +#define S_028350_SC_XSEL(x) (((unsigned)(x) & 0x03) << 18) +#define G_028350_SC_XSEL(x) (((x) >> 18) & 0x03) +#define C_028350_SC_XSEL 0xFFF3FFFF +#define V_028350_RASTER_CONFIG_SC_XSEL_8_WIDE_TILE 0x00 +#define V_028350_RASTER_CONFIG_SC_XSEL_16_WIDE_TILE 0x01 +#define V_028350_RASTER_CONFIG_SC_XSEL_32_WIDE_TILE 0x02 +#define V_028350_RASTER_CONFIG_SC_XSEL_64_WIDE_TILE 0x03 +#define S_028350_SC_YSEL(x) (((unsigned)(x) & 0x03) << 20) +#define G_028350_SC_YSEL(x) (((x) >> 20) & 0x03) +#define C_028350_SC_YSEL 0xFFCFFFFF +#define V_028350_RASTER_CONFIG_SC_YSEL_8_WIDE_TILE 0x00 +#define V_028350_RASTER_CONFIG_SC_YSEL_16_WIDE_TILE 0x01 +#define V_028350_RASTER_CONFIG_SC_YSEL_32_WIDE_TILE 0x02 +#define V_028350_RASTER_CONFIG_SC_YSEL_64_WIDE_TILE 0x03 +#define S_028350_SE_MAP(x) (((unsigned)(x) & 0x03) << 24) +#define G_028350_SE_MAP(x) (((x) >> 24) & 0x03) +#define C_028350_SE_MAP 0xFCFFFFFF +#define V_028350_RASTER_CONFIG_SE_MAP_0 0x00 +#define V_028350_RASTER_CONFIG_SE_MAP_1 0x01 +#define V_028350_RASTER_CONFIG_SE_MAP_2 0x02 +#define V_028350_RASTER_CONFIG_SE_MAP_3 0x03 +#define S_028350_SE_XSEL(x) (((unsigned)(x) & 0x03) << 26) +#define G_028350_SE_XSEL(x) (((x) >> 26) & 0x03) +#define C_028350_SE_XSEL 0xF3FFFFFF +#define V_028350_RASTER_CONFIG_SE_XSEL_8_WIDE_TILE 0x00 +#define V_028350_RASTER_CONFIG_SE_XSEL_16_WIDE_TILE 0x01 +#define V_028350_RASTER_CONFIG_SE_XSEL_32_WIDE_TILE 0x02 +#define V_028350_RASTER_CONFIG_SE_XSEL_64_WIDE_TILE 0x03 +#define S_028350_SE_YSEL(x) (((unsigned)(x) & 0x03) << 28) +#define G_028350_SE_YSEL(x) (((x) >> 28) & 0x03) +#define C_028350_SE_YSEL 0xCFFFFFFF +#define V_028350_RASTER_CONFIG_SE_YSEL_8_WIDE_TILE 0x00 +#define V_028350_RASTER_CONFIG_SE_YSEL_16_WIDE_TILE 0x01 +#define V_028350_RASTER_CONFIG_SE_YSEL_32_WIDE_TILE 0x02 +#define V_028350_RASTER_CONFIG_SE_YSEL_64_WIDE_TILE 0x03 +/* CIK */ +#define R_028354_PA_SC_RASTER_CONFIG_1 0x028354 +#define S_028354_SE_PAIR_MAP(x) (((unsigned)(x) & 0x03) << 0) +#define G_028354_SE_PAIR_MAP(x) (((x) >> 0) & 0x03) +#define C_028354_SE_PAIR_MAP 0xFFFFFFFC +#define V_028354_RASTER_CONFIG_SE_PAIR_MAP_0 0x00 +#define V_028354_RASTER_CONFIG_SE_PAIR_MAP_1 0x01 +#define V_028354_RASTER_CONFIG_SE_PAIR_MAP_2 0x02 +#define V_028354_RASTER_CONFIG_SE_PAIR_MAP_3 0x03 +#define S_028354_SE_PAIR_XSEL(x) (((unsigned)(x) & 0x03) << 2) +#define G_028354_SE_PAIR_XSEL(x) (((x) >> 2) & 0x03) +#define C_028354_SE_PAIR_XSEL 0xFFFFFFF3 +#define V_028354_RASTER_CONFIG_SE_PAIR_XSEL_8_WIDE_TILE 0x00 +#define V_028354_RASTER_CONFIG_SE_PAIR_XSEL_16_WIDE_TILE 0x01 +#define V_028354_RASTER_CONFIG_SE_PAIR_XSEL_32_WIDE_TILE 0x02 +#define V_028354_RASTER_CONFIG_SE_PAIR_XSEL_64_WIDE_TILE 0x03 +#define S_028354_SE_PAIR_YSEL(x) (((unsigned)(x) & 0x03) << 4) +#define G_028354_SE_PAIR_YSEL(x) (((x) >> 4) & 0x03) +#define C_028354_SE_PAIR_YSEL 0xFFFFFFCF +#define V_028354_RASTER_CONFIG_SE_PAIR_YSEL_8_WIDE_TILE 0x00 +#define V_028354_RASTER_CONFIG_SE_PAIR_YSEL_16_WIDE_TILE 0x01 +#define V_028354_RASTER_CONFIG_SE_PAIR_YSEL_32_WIDE_TILE 0x02 +#define V_028354_RASTER_CONFIG_SE_PAIR_YSEL_64_WIDE_TILE 0x03 +#define R_028358_PA_SC_SCREEN_EXTENT_CONTROL 0x028358 +#define S_028358_SLICE_EVEN_ENABLE(x) (((unsigned)(x) & 0x03) << 0) +#define G_028358_SLICE_EVEN_ENABLE(x) (((x) >> 0) & 0x03) +#define C_028358_SLICE_EVEN_ENABLE 0xFFFFFFFC +#define S_028358_SLICE_ODD_ENABLE(x) (((unsigned)(x) & 0x03) << 2) +#define G_028358_SLICE_ODD_ENABLE(x) (((x) >> 2) & 0x03) +#define C_028358_SLICE_ODD_ENABLE 0xFFFFFFF3 +/* */ +#define R_028400_VGT_MAX_VTX_INDX 0x028400 +#define R_028404_VGT_MIN_VTX_INDX 0x028404 +#define R_028408_VGT_INDX_OFFSET 0x028408 +#define R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX 0x02840C +#define R_028414_CB_BLEND_RED 0x028414 +#define R_028418_CB_BLEND_GREEN 0x028418 +#define R_02841C_CB_BLEND_BLUE 0x02841C +#define R_028420_CB_BLEND_ALPHA 0x028420 +/* VI */ +#define R_028424_CB_DCC_CONTROL 0x028424 +#define S_028424_OVERWRITE_COMBINER_DISABLE(x) (((unsigned)(x) & 0x1) << 0) +#define G_028424_OVERWRITE_COMBINER_DISABLE(x) (((x) >> 0) & 0x1) +#define C_028424_OVERWRITE_COMBINER_DISABLE 0xFFFFFFFE +#define S_028424_OVERWRITE_COMBINER_MRT_SHARING_DISABLE(x) (((unsigned)(x) & 0x1) << 1) +#define G_028424_OVERWRITE_COMBINER_MRT_SHARING_DISABLE(x) (((x) >> 1) & 0x1) +#define C_028424_OVERWRITE_COMBINER_MRT_SHARING_DISABLE 0xFFFFFFFD +#define S_028424_OVERWRITE_COMBINER_WATERMARK(x) (((unsigned)(x) & 0x1F) << 2) +#define G_028424_OVERWRITE_COMBINER_WATERMARK(x) (((x) >> 2) & 0x1F) +#define C_028424_OVERWRITE_COMBINER_WATERMARK 0xFFFFFF83 +/* */ +#define R_02842C_DB_STENCIL_CONTROL 0x02842C +#define S_02842C_STENCILFAIL(x) (((unsigned)(x) & 0x0F) << 0) +#define G_02842C_STENCILFAIL(x) (((x) >> 0) & 0x0F) +#define C_02842C_STENCILFAIL 0xFFFFFFF0 +#define V_02842C_STENCIL_KEEP 0x00 +#define V_02842C_STENCIL_ZERO 0x01 +#define V_02842C_STENCIL_ONES 0x02 +#define V_02842C_STENCIL_REPLACE_TEST 0x03 +#define V_02842C_STENCIL_REPLACE_OP 0x04 +#define V_02842C_STENCIL_ADD_CLAMP 0x05 +#define V_02842C_STENCIL_SUB_CLAMP 0x06 +#define V_02842C_STENCIL_INVERT 0x07 +#define V_02842C_STENCIL_ADD_WRAP 0x08 +#define V_02842C_STENCIL_SUB_WRAP 0x09 +#define V_02842C_STENCIL_AND 0x0A +#define V_02842C_STENCIL_OR 0x0B +#define V_02842C_STENCIL_XOR 0x0C +#define V_02842C_STENCIL_NAND 0x0D +#define V_02842C_STENCIL_NOR 0x0E +#define V_02842C_STENCIL_XNOR 0x0F +#define S_02842C_STENCILZPASS(x) (((unsigned)(x) & 0x0F) << 4) +#define G_02842C_STENCILZPASS(x) (((x) >> 4) & 0x0F) +#define C_02842C_STENCILZPASS 0xFFFFFF0F +#define V_02842C_STENCIL_KEEP 0x00 +#define V_02842C_STENCIL_ZERO 0x01 +#define V_02842C_STENCIL_ONES 0x02 +#define V_02842C_STENCIL_REPLACE_TEST 0x03 +#define V_02842C_STENCIL_REPLACE_OP 0x04 +#define V_02842C_STENCIL_ADD_CLAMP 0x05 +#define V_02842C_STENCIL_SUB_CLAMP 0x06 +#define V_02842C_STENCIL_INVERT 0x07 +#define V_02842C_STENCIL_ADD_WRAP 0x08 +#define V_02842C_STENCIL_SUB_WRAP 0x09 +#define V_02842C_STENCIL_AND 0x0A +#define V_02842C_STENCIL_OR 0x0B +#define V_02842C_STENCIL_XOR 0x0C +#define V_02842C_STENCIL_NAND 0x0D +#define V_02842C_STENCIL_NOR 0x0E +#define V_02842C_STENCIL_XNOR 0x0F +#define S_02842C_STENCILZFAIL(x) (((unsigned)(x) & 0x0F) << 8) +#define G_02842C_STENCILZFAIL(x) (((x) >> 8) & 0x0F) +#define C_02842C_STENCILZFAIL 0xFFFFF0FF +#define V_02842C_STENCIL_KEEP 0x00 +#define V_02842C_STENCIL_ZERO 0x01 +#define V_02842C_STENCIL_ONES 0x02 +#define V_02842C_STENCIL_REPLACE_TEST 0x03 +#define V_02842C_STENCIL_REPLACE_OP 0x04 +#define V_02842C_STENCIL_ADD_CLAMP 0x05 +#define V_02842C_STENCIL_SUB_CLAMP 0x06 +#define V_02842C_STENCIL_INVERT 0x07 +#define V_02842C_STENCIL_ADD_WRAP 0x08 +#define V_02842C_STENCIL_SUB_WRAP 0x09 +#define V_02842C_STENCIL_AND 0x0A +#define V_02842C_STENCIL_OR 0x0B +#define V_02842C_STENCIL_XOR 0x0C +#define V_02842C_STENCIL_NAND 0x0D +#define V_02842C_STENCIL_NOR 0x0E +#define V_02842C_STENCIL_XNOR 0x0F +#define S_02842C_STENCILFAIL_BF(x) (((unsigned)(x) & 0x0F) << 12) +#define G_02842C_STENCILFAIL_BF(x) (((x) >> 12) & 0x0F) +#define C_02842C_STENCILFAIL_BF 0xFFFF0FFF +#define V_02842C_STENCIL_KEEP 0x00 +#define V_02842C_STENCIL_ZERO 0x01 +#define V_02842C_STENCIL_ONES 0x02 +#define V_02842C_STENCIL_REPLACE_TEST 0x03 +#define V_02842C_STENCIL_REPLACE_OP 0x04 +#define V_02842C_STENCIL_ADD_CLAMP 0x05 +#define V_02842C_STENCIL_SUB_CLAMP 0x06 +#define V_02842C_STENCIL_INVERT 0x07 +#define V_02842C_STENCIL_ADD_WRAP 0x08 +#define V_02842C_STENCIL_SUB_WRAP 0x09 +#define V_02842C_STENCIL_AND 0x0A +#define V_02842C_STENCIL_OR 0x0B +#define V_02842C_STENCIL_XOR 0x0C +#define V_02842C_STENCIL_NAND 0x0D +#define V_02842C_STENCIL_NOR 0x0E +#define V_02842C_STENCIL_XNOR 0x0F +#define S_02842C_STENCILZPASS_BF(x) (((unsigned)(x) & 0x0F) << 16) +#define G_02842C_STENCILZPASS_BF(x) (((x) >> 16) & 0x0F) +#define C_02842C_STENCILZPASS_BF 0xFFF0FFFF +#define V_02842C_STENCIL_KEEP 0x00 +#define V_02842C_STENCIL_ZERO 0x01 +#define V_02842C_STENCIL_ONES 0x02 +#define V_02842C_STENCIL_REPLACE_TEST 0x03 +#define V_02842C_STENCIL_REPLACE_OP 0x04 +#define V_02842C_STENCIL_ADD_CLAMP 0x05 +#define V_02842C_STENCIL_SUB_CLAMP 0x06 +#define V_02842C_STENCIL_INVERT 0x07 +#define V_02842C_STENCIL_ADD_WRAP 0x08 +#define V_02842C_STENCIL_SUB_WRAP 0x09 +#define V_02842C_STENCIL_AND 0x0A +#define V_02842C_STENCIL_OR 0x0B +#define V_02842C_STENCIL_XOR 0x0C +#define V_02842C_STENCIL_NAND 0x0D +#define V_02842C_STENCIL_NOR 0x0E +#define V_02842C_STENCIL_XNOR 0x0F +#define S_02842C_STENCILZFAIL_BF(x) (((unsigned)(x) & 0x0F) << 20) +#define G_02842C_STENCILZFAIL_BF(x) (((x) >> 20) & 0x0F) +#define C_02842C_STENCILZFAIL_BF 0xFF0FFFFF +#define V_02842C_STENCIL_KEEP 0x00 +#define V_02842C_STENCIL_ZERO 0x01 +#define V_02842C_STENCIL_ONES 0x02 +#define V_02842C_STENCIL_REPLACE_TEST 0x03 +#define V_02842C_STENCIL_REPLACE_OP 0x04 +#define V_02842C_STENCIL_ADD_CLAMP 0x05 +#define V_02842C_STENCIL_SUB_CLAMP 0x06 +#define V_02842C_STENCIL_INVERT 0x07 +#define V_02842C_STENCIL_ADD_WRAP 0x08 +#define V_02842C_STENCIL_SUB_WRAP 0x09 +#define V_02842C_STENCIL_AND 0x0A +#define V_02842C_STENCIL_OR 0x0B +#define V_02842C_STENCIL_XOR 0x0C +#define V_02842C_STENCIL_NAND 0x0D +#define V_02842C_STENCIL_NOR 0x0E +#define V_02842C_STENCIL_XNOR 0x0F +#define R_028430_DB_STENCILREFMASK 0x028430 +#define S_028430_STENCILTESTVAL(x) (((unsigned)(x) & 0xFF) << 0) +#define G_028430_STENCILTESTVAL(x) (((x) >> 0) & 0xFF) +#define C_028430_STENCILTESTVAL 0xFFFFFF00 +#define S_028430_STENCILMASK(x) (((unsigned)(x) & 0xFF) << 8) +#define G_028430_STENCILMASK(x) (((x) >> 8) & 0xFF) +#define C_028430_STENCILMASK 0xFFFF00FF +#define S_028430_STENCILWRITEMASK(x) (((unsigned)(x) & 0xFF) << 16) +#define G_028430_STENCILWRITEMASK(x) (((x) >> 16) & 0xFF) +#define C_028430_STENCILWRITEMASK 0xFF00FFFF +#define S_028430_STENCILOPVAL(x) (((unsigned)(x) & 0xFF) << 24) +#define G_028430_STENCILOPVAL(x) (((x) >> 24) & 0xFF) +#define C_028430_STENCILOPVAL 0x00FFFFFF +#define R_028434_DB_STENCILREFMASK_BF 0x028434 +#define S_028434_STENCILTESTVAL_BF(x) (((unsigned)(x) & 0xFF) << 0) +#define G_028434_STENCILTESTVAL_BF(x) (((x) >> 0) & 0xFF) +#define C_028434_STENCILTESTVAL_BF 0xFFFFFF00 +#define S_028434_STENCILMASK_BF(x) (((unsigned)(x) & 0xFF) << 8) +#define G_028434_STENCILMASK_BF(x) (((x) >> 8) & 0xFF) +#define C_028434_STENCILMASK_BF 0xFFFF00FF +#define S_028434_STENCILWRITEMASK_BF(x) (((unsigned)(x) & 0xFF) << 16) +#define G_028434_STENCILWRITEMASK_BF(x) (((x) >> 16) & 0xFF) +#define C_028434_STENCILWRITEMASK_BF 0xFF00FFFF +#define S_028434_STENCILOPVAL_BF(x) (((unsigned)(x) & 0xFF) << 24) +#define G_028434_STENCILOPVAL_BF(x) (((x) >> 24) & 0xFF) +#define C_028434_STENCILOPVAL_BF 0x00FFFFFF +#define R_02843C_PA_CL_VPORT_XSCALE 0x02843C +#define R_028440_PA_CL_VPORT_XOFFSET 0x028440 +#define R_028444_PA_CL_VPORT_YSCALE 0x028444 +#define R_028448_PA_CL_VPORT_YOFFSET 0x028448 +#define R_02844C_PA_CL_VPORT_ZSCALE 0x02844C +#define R_028450_PA_CL_VPORT_ZOFFSET 0x028450 +#define R_028454_PA_CL_VPORT_XSCALE_1 0x028454 +#define R_028458_PA_CL_VPORT_XOFFSET_1 0x028458 +#define R_02845C_PA_CL_VPORT_YSCALE_1 0x02845C +#define R_028460_PA_CL_VPORT_YOFFSET_1 0x028460 +#define R_028464_PA_CL_VPORT_ZSCALE_1 0x028464 +#define R_028468_PA_CL_VPORT_ZOFFSET_1 0x028468 +#define R_02846C_PA_CL_VPORT_XSCALE_2 0x02846C +#define R_028470_PA_CL_VPORT_XOFFSET_2 0x028470 +#define R_028474_PA_CL_VPORT_YSCALE_2 0x028474 +#define R_028478_PA_CL_VPORT_YOFFSET_2 0x028478 +#define R_02847C_PA_CL_VPORT_ZSCALE_2 0x02847C +#define R_028480_PA_CL_VPORT_ZOFFSET_2 0x028480 +#define R_028484_PA_CL_VPORT_XSCALE_3 0x028484 +#define R_028488_PA_CL_VPORT_XOFFSET_3 0x028488 +#define R_02848C_PA_CL_VPORT_YSCALE_3 0x02848C +#define R_028490_PA_CL_VPORT_YOFFSET_3 0x028490 +#define R_028494_PA_CL_VPORT_ZSCALE_3 0x028494 +#define R_028498_PA_CL_VPORT_ZOFFSET_3 0x028498 +#define R_02849C_PA_CL_VPORT_XSCALE_4 0x02849C +#define R_0284A0_PA_CL_VPORT_XOFFSET_4 0x0284A0 +#define R_0284A4_PA_CL_VPORT_YSCALE_4 0x0284A4 +#define R_0284A8_PA_CL_VPORT_YOFFSET_4 0x0284A8 +#define R_0284AC_PA_CL_VPORT_ZSCALE_4 0x0284AC +#define R_0284B0_PA_CL_VPORT_ZOFFSET_4 0x0284B0 +#define R_0284B4_PA_CL_VPORT_XSCALE_5 0x0284B4 +#define R_0284B8_PA_CL_VPORT_XOFFSET_5 0x0284B8 +#define R_0284BC_PA_CL_VPORT_YSCALE_5 0x0284BC +#define R_0284C0_PA_CL_VPORT_YOFFSET_5 0x0284C0 +#define R_0284C4_PA_CL_VPORT_ZSCALE_5 0x0284C4 +#define R_0284C8_PA_CL_VPORT_ZOFFSET_5 0x0284C8 +#define R_0284CC_PA_CL_VPORT_XSCALE_6 0x0284CC +#define R_0284D0_PA_CL_VPORT_XOFFSET_6 0x0284D0 +#define R_0284D4_PA_CL_VPORT_YSCALE_6 0x0284D4 +#define R_0284D8_PA_CL_VPORT_YOFFSET_6 0x0284D8 +#define R_0284DC_PA_CL_VPORT_ZSCALE_6 0x0284DC +#define R_0284E0_PA_CL_VPORT_ZOFFSET_6 0x0284E0 +#define R_0284E4_PA_CL_VPORT_XSCALE_7 0x0284E4 +#define R_0284E8_PA_CL_VPORT_XOFFSET_7 0x0284E8 +#define R_0284EC_PA_CL_VPORT_YSCALE_7 0x0284EC +#define R_0284F0_PA_CL_VPORT_YOFFSET_7 0x0284F0 +#define R_0284F4_PA_CL_VPORT_ZSCALE_7 0x0284F4 +#define R_0284F8_PA_CL_VPORT_ZOFFSET_7 0x0284F8 +#define R_0284FC_PA_CL_VPORT_XSCALE_8 0x0284FC +#define R_028500_PA_CL_VPORT_XOFFSET_8 0x028500 +#define R_028504_PA_CL_VPORT_YSCALE_8 0x028504 +#define R_028508_PA_CL_VPORT_YOFFSET_8 0x028508 +#define R_02850C_PA_CL_VPORT_ZSCALE_8 0x02850C +#define R_028510_PA_CL_VPORT_ZOFFSET_8 0x028510 +#define R_028514_PA_CL_VPORT_XSCALE_9 0x028514 +#define R_028518_PA_CL_VPORT_XOFFSET_9 0x028518 +#define R_02851C_PA_CL_VPORT_YSCALE_9 0x02851C +#define R_028520_PA_CL_VPORT_YOFFSET_9 0x028520 +#define R_028524_PA_CL_VPORT_ZSCALE_9 0x028524 +#define R_028528_PA_CL_VPORT_ZOFFSET_9 0x028528 +#define R_02852C_PA_CL_VPORT_XSCALE_10 0x02852C +#define R_028530_PA_CL_VPORT_XOFFSET_10 0x028530 +#define R_028534_PA_CL_VPORT_YSCALE_10 0x028534 +#define R_028538_PA_CL_VPORT_YOFFSET_10 0x028538 +#define R_02853C_PA_CL_VPORT_ZSCALE_10 0x02853C +#define R_028540_PA_CL_VPORT_ZOFFSET_10 0x028540 +#define R_028544_PA_CL_VPORT_XSCALE_11 0x028544 +#define R_028548_PA_CL_VPORT_XOFFSET_11 0x028548 +#define R_02854C_PA_CL_VPORT_YSCALE_11 0x02854C +#define R_028550_PA_CL_VPORT_YOFFSET_11 0x028550 +#define R_028554_PA_CL_VPORT_ZSCALE_11 0x028554 +#define R_028558_PA_CL_VPORT_ZOFFSET_11 0x028558 +#define R_02855C_PA_CL_VPORT_XSCALE_12 0x02855C +#define R_028560_PA_CL_VPORT_XOFFSET_12 0x028560 +#define R_028564_PA_CL_VPORT_YSCALE_12 0x028564 +#define R_028568_PA_CL_VPORT_YOFFSET_12 0x028568 +#define R_02856C_PA_CL_VPORT_ZSCALE_12 0x02856C +#define R_028570_PA_CL_VPORT_ZOFFSET_12 0x028570 +#define R_028574_PA_CL_VPORT_XSCALE_13 0x028574 +#define R_028578_PA_CL_VPORT_XOFFSET_13 0x028578 +#define R_02857C_PA_CL_VPORT_YSCALE_13 0x02857C +#define R_028580_PA_CL_VPORT_YOFFSET_13 0x028580 +#define R_028584_PA_CL_VPORT_ZSCALE_13 0x028584 +#define R_028588_PA_CL_VPORT_ZOFFSET_13 0x028588 +#define R_02858C_PA_CL_VPORT_XSCALE_14 0x02858C +#define R_028590_PA_CL_VPORT_XOFFSET_14 0x028590 +#define R_028594_PA_CL_VPORT_YSCALE_14 0x028594 +#define R_028598_PA_CL_VPORT_YOFFSET_14 0x028598 +#define R_02859C_PA_CL_VPORT_ZSCALE_14 0x02859C +#define R_0285A0_PA_CL_VPORT_ZOFFSET_14 0x0285A0 +#define R_0285A4_PA_CL_VPORT_XSCALE_15 0x0285A4 +#define R_0285A8_PA_CL_VPORT_XOFFSET_15 0x0285A8 +#define R_0285AC_PA_CL_VPORT_YSCALE_15 0x0285AC +#define R_0285B0_PA_CL_VPORT_YOFFSET_15 0x0285B0 +#define R_0285B4_PA_CL_VPORT_ZSCALE_15 0x0285B4 +#define R_0285B8_PA_CL_VPORT_ZOFFSET_15 0x0285B8 +#define R_0285BC_PA_CL_UCP_0_X 0x0285BC +#define R_0285C0_PA_CL_UCP_0_Y 0x0285C0 +#define R_0285C4_PA_CL_UCP_0_Z 0x0285C4 +#define R_0285C8_PA_CL_UCP_0_W 0x0285C8 +#define R_0285CC_PA_CL_UCP_1_X 0x0285CC +#define R_0285D0_PA_CL_UCP_1_Y 0x0285D0 +#define R_0285D4_PA_CL_UCP_1_Z 0x0285D4 +#define R_0285D8_PA_CL_UCP_1_W 0x0285D8 +#define R_0285DC_PA_CL_UCP_2_X 0x0285DC +#define R_0285E0_PA_CL_UCP_2_Y 0x0285E0 +#define R_0285E4_PA_CL_UCP_2_Z 0x0285E4 +#define R_0285E8_PA_CL_UCP_2_W 0x0285E8 +#define R_0285EC_PA_CL_UCP_3_X 0x0285EC +#define R_0285F0_PA_CL_UCP_3_Y 0x0285F0 +#define R_0285F4_PA_CL_UCP_3_Z 0x0285F4 +#define R_0285F8_PA_CL_UCP_3_W 0x0285F8 +#define R_0285FC_PA_CL_UCP_4_X 0x0285FC +#define R_028600_PA_CL_UCP_4_Y 0x028600 +#define R_028604_PA_CL_UCP_4_Z 0x028604 +#define R_028608_PA_CL_UCP_4_W 0x028608 +#define R_02860C_PA_CL_UCP_5_X 0x02860C +#define R_028610_PA_CL_UCP_5_Y 0x028610 +#define R_028614_PA_CL_UCP_5_Z 0x028614 +#define R_028618_PA_CL_UCP_5_W 0x028618 +#define R_028644_SPI_PS_INPUT_CNTL_0 0x028644 +#define S_028644_OFFSET(x) (((unsigned)(x) & 0x3F) << 0) +#define G_028644_OFFSET(x) (((x) >> 0) & 0x3F) +#define C_028644_OFFSET 0xFFFFFFC0 +#define S_028644_DEFAULT_VAL(x) (((unsigned)(x) & 0x03) << 8) +#define G_028644_DEFAULT_VAL(x) (((x) >> 8) & 0x03) +#define C_028644_DEFAULT_VAL 0xFFFFFCFF +#define V_028644_X_0_0F 0x00 +#define S_028644_FLAT_SHADE(x) (((unsigned)(x) & 0x1) << 10) +#define G_028644_FLAT_SHADE(x) (((x) >> 10) & 0x1) +#define C_028644_FLAT_SHADE 0xFFFFFBFF +#define S_028644_CYL_WRAP(x) (((unsigned)(x) & 0x0F) << 13) +#define G_028644_CYL_WRAP(x) (((x) >> 13) & 0x0F) +#define C_028644_CYL_WRAP 0xFFFE1FFF +#define S_028644_PT_SPRITE_TEX(x) (((unsigned)(x) & 0x1) << 17) +#define G_028644_PT_SPRITE_TEX(x) (((x) >> 17) & 0x1) +#define C_028644_PT_SPRITE_TEX 0xFFFDFFFF +/* CIK */ +#define S_028644_DUP(x) (((unsigned)(x) & 0x1) << 18) +#define G_028644_DUP(x) (((x) >> 18) & 0x1) +#define C_028644_DUP 0xFFFBFFFF +/* */ +/* VI */ +#define S_028644_FP16_INTERP_MODE(x) (((unsigned)(x) & 0x1) << 19) +#define G_028644_FP16_INTERP_MODE(x) (((x) >> 19) & 0x1) +#define C_028644_FP16_INTERP_MODE 0xFFF7FFFF +#define S_028644_USE_DEFAULT_ATTR1(x) (((unsigned)(x) & 0x1) << 20) +#define G_028644_USE_DEFAULT_ATTR1(x) (((x) >> 20) & 0x1) +#define C_028644_USE_DEFAULT_ATTR1 0xFFEFFFFF +#define S_028644_DEFAULT_VAL_ATTR1(x) (((unsigned)(x) & 0x03) << 21) +#define G_028644_DEFAULT_VAL_ATTR1(x) (((x) >> 21) & 0x03) +#define C_028644_DEFAULT_VAL_ATTR1 0xFF9FFFFF +#define S_028644_PT_SPRITE_TEX_ATTR1(x) (((unsigned)(x) & 0x1) << 23) +#define G_028644_PT_SPRITE_TEX_ATTR1(x) (((x) >> 23) & 0x1) +#define C_028644_PT_SPRITE_TEX_ATTR1 0xFF7FFFFF +#define S_028644_ATTR0_VALID(x) (((unsigned)(x) & 0x1) << 24) +#define G_028644_ATTR0_VALID(x) (((x) >> 24) & 0x1) +#define C_028644_ATTR0_VALID 0xFEFFFFFF +#define S_028644_ATTR1_VALID(x) (((unsigned)(x) & 0x1) << 25) +#define G_028644_ATTR1_VALID(x) (((x) >> 25) & 0x1) +#define C_028644_ATTR1_VALID 0xFDFFFFFF +/* */ +#define R_028648_SPI_PS_INPUT_CNTL_1 0x028648 +#define R_02864C_SPI_PS_INPUT_CNTL_2 0x02864C +#define R_028650_SPI_PS_INPUT_CNTL_3 0x028650 +#define R_028654_SPI_PS_INPUT_CNTL_4 0x028654 +#define R_028658_SPI_PS_INPUT_CNTL_5 0x028658 +#define R_02865C_SPI_PS_INPUT_CNTL_6 0x02865C +#define R_028660_SPI_PS_INPUT_CNTL_7 0x028660 +#define R_028664_SPI_PS_INPUT_CNTL_8 0x028664 +#define R_028668_SPI_PS_INPUT_CNTL_9 0x028668 +#define R_02866C_SPI_PS_INPUT_CNTL_10 0x02866C +#define R_028670_SPI_PS_INPUT_CNTL_11 0x028670 +#define R_028674_SPI_PS_INPUT_CNTL_12 0x028674 +#define R_028678_SPI_PS_INPUT_CNTL_13 0x028678 +#define R_02867C_SPI_PS_INPUT_CNTL_14 0x02867C +#define R_028680_SPI_PS_INPUT_CNTL_15 0x028680 +#define R_028684_SPI_PS_INPUT_CNTL_16 0x028684 +#define R_028688_SPI_PS_INPUT_CNTL_17 0x028688 +#define R_02868C_SPI_PS_INPUT_CNTL_18 0x02868C +#define R_028690_SPI_PS_INPUT_CNTL_19 0x028690 +#define R_028694_SPI_PS_INPUT_CNTL_20 0x028694 +#define R_028698_SPI_PS_INPUT_CNTL_21 0x028698 +#define R_02869C_SPI_PS_INPUT_CNTL_22 0x02869C +#define R_0286A0_SPI_PS_INPUT_CNTL_23 0x0286A0 +#define R_0286A4_SPI_PS_INPUT_CNTL_24 0x0286A4 +#define R_0286A8_SPI_PS_INPUT_CNTL_25 0x0286A8 +#define R_0286AC_SPI_PS_INPUT_CNTL_26 0x0286AC +#define R_0286B0_SPI_PS_INPUT_CNTL_27 0x0286B0 +#define R_0286B4_SPI_PS_INPUT_CNTL_28 0x0286B4 +#define R_0286B8_SPI_PS_INPUT_CNTL_29 0x0286B8 +#define R_0286BC_SPI_PS_INPUT_CNTL_30 0x0286BC +#define R_0286C0_SPI_PS_INPUT_CNTL_31 0x0286C0 +#define R_0286C4_SPI_VS_OUT_CONFIG 0x0286C4 +#define S_0286C4_VS_EXPORT_COUNT(x) (((unsigned)(x) & 0x1F) << 1) +#define G_0286C4_VS_EXPORT_COUNT(x) (((x) >> 1) & 0x1F) +#define C_0286C4_VS_EXPORT_COUNT 0xFFFFFFC1 +#define S_0286C4_VS_HALF_PACK(x) (((unsigned)(x) & 0x1) << 6) +#define G_0286C4_VS_HALF_PACK(x) (((x) >> 6) & 0x1) +#define C_0286C4_VS_HALF_PACK 0xFFFFFFBF +#define S_0286C4_VS_EXPORTS_FOG(x) (((unsigned)(x) & 0x1) << 7) /* not on CIK */ +#define G_0286C4_VS_EXPORTS_FOG(x) (((x) >> 7) & 0x1) /* not on CIK */ +#define C_0286C4_VS_EXPORTS_FOG 0xFFFFFF7F /* not on CIK */ +#define S_0286C4_VS_OUT_FOG_VEC_ADDR(x) (((unsigned)(x) & 0x1F) << 8) /* not on CIK */ +#define G_0286C4_VS_OUT_FOG_VEC_ADDR(x) (((x) >> 8) & 0x1F) /* not on CIK */ +#define C_0286C4_VS_OUT_FOG_VEC_ADDR 0xFFFFE0FF /* not on CIK */ +#define R_0286CC_SPI_PS_INPUT_ENA 0x0286CC +#define S_0286CC_PERSP_SAMPLE_ENA(x) (((unsigned)(x) & 0x1) << 0) +#define G_0286CC_PERSP_SAMPLE_ENA(x) (((x) >> 0) & 0x1) +#define C_0286CC_PERSP_SAMPLE_ENA 0xFFFFFFFE +#define S_0286CC_PERSP_CENTER_ENA(x) (((unsigned)(x) & 0x1) << 1) +#define G_0286CC_PERSP_CENTER_ENA(x) (((x) >> 1) & 0x1) +#define C_0286CC_PERSP_CENTER_ENA 0xFFFFFFFD +#define S_0286CC_PERSP_CENTROID_ENA(x) (((unsigned)(x) & 0x1) << 2) +#define G_0286CC_PERSP_CENTROID_ENA(x) (((x) >> 2) & 0x1) +#define C_0286CC_PERSP_CENTROID_ENA 0xFFFFFFFB +#define S_0286CC_PERSP_PULL_MODEL_ENA(x) (((unsigned)(x) & 0x1) << 3) +#define G_0286CC_PERSP_PULL_MODEL_ENA(x) (((x) >> 3) & 0x1) +#define C_0286CC_PERSP_PULL_MODEL_ENA 0xFFFFFFF7 +#define S_0286CC_LINEAR_SAMPLE_ENA(x) (((unsigned)(x) & 0x1) << 4) +#define G_0286CC_LINEAR_SAMPLE_ENA(x) (((x) >> 4) & 0x1) +#define C_0286CC_LINEAR_SAMPLE_ENA 0xFFFFFFEF +#define S_0286CC_LINEAR_CENTER_ENA(x) (((unsigned)(x) & 0x1) << 5) +#define G_0286CC_LINEAR_CENTER_ENA(x) (((x) >> 5) & 0x1) +#define C_0286CC_LINEAR_CENTER_ENA 0xFFFFFFDF +#define S_0286CC_LINEAR_CENTROID_ENA(x) (((unsigned)(x) & 0x1) << 6) +#define G_0286CC_LINEAR_CENTROID_ENA(x) (((x) >> 6) & 0x1) +#define C_0286CC_LINEAR_CENTROID_ENA 0xFFFFFFBF +#define S_0286CC_LINE_STIPPLE_TEX_ENA(x) (((unsigned)(x) & 0x1) << 7) +#define G_0286CC_LINE_STIPPLE_TEX_ENA(x) (((x) >> 7) & 0x1) +#define C_0286CC_LINE_STIPPLE_TEX_ENA 0xFFFFFF7F +#define S_0286CC_POS_X_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 8) +#define G_0286CC_POS_X_FLOAT_ENA(x) (((x) >> 8) & 0x1) +#define C_0286CC_POS_X_FLOAT_ENA 0xFFFFFEFF +#define S_0286CC_POS_Y_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 9) +#define G_0286CC_POS_Y_FLOAT_ENA(x) (((x) >> 9) & 0x1) +#define C_0286CC_POS_Y_FLOAT_ENA 0xFFFFFDFF +#define S_0286CC_POS_Z_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 10) +#define G_0286CC_POS_Z_FLOAT_ENA(x) (((x) >> 10) & 0x1) +#define C_0286CC_POS_Z_FLOAT_ENA 0xFFFFFBFF +#define S_0286CC_POS_W_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 11) +#define G_0286CC_POS_W_FLOAT_ENA(x) (((x) >> 11) & 0x1) +#define C_0286CC_POS_W_FLOAT_ENA 0xFFFFF7FF +#define S_0286CC_FRONT_FACE_ENA(x) (((unsigned)(x) & 0x1) << 12) +#define G_0286CC_FRONT_FACE_ENA(x) (((x) >> 12) & 0x1) +#define C_0286CC_FRONT_FACE_ENA 0xFFFFEFFF +#define S_0286CC_ANCILLARY_ENA(x) (((unsigned)(x) & 0x1) << 13) +#define G_0286CC_ANCILLARY_ENA(x) (((x) >> 13) & 0x1) +#define C_0286CC_ANCILLARY_ENA 0xFFFFDFFF +#define S_0286CC_SAMPLE_COVERAGE_ENA(x) (((unsigned)(x) & 0x1) << 14) +#define G_0286CC_SAMPLE_COVERAGE_ENA(x) (((x) >> 14) & 0x1) +#define C_0286CC_SAMPLE_COVERAGE_ENA 0xFFFFBFFF +#define S_0286CC_POS_FIXED_PT_ENA(x) (((unsigned)(x) & 0x1) << 15) +#define G_0286CC_POS_FIXED_PT_ENA(x) (((x) >> 15) & 0x1) +#define C_0286CC_POS_FIXED_PT_ENA 0xFFFF7FFF +#define R_0286D0_SPI_PS_INPUT_ADDR 0x0286D0 +#define S_0286D0_PERSP_SAMPLE_ENA(x) (((unsigned)(x) & 0x1) << 0) +#define G_0286D0_PERSP_SAMPLE_ENA(x) (((x) >> 0) & 0x1) +#define C_0286D0_PERSP_SAMPLE_ENA 0xFFFFFFFE +#define S_0286D0_PERSP_CENTER_ENA(x) (((unsigned)(x) & 0x1) << 1) +#define G_0286D0_PERSP_CENTER_ENA(x) (((x) >> 1) & 0x1) +#define C_0286D0_PERSP_CENTER_ENA 0xFFFFFFFD +#define S_0286D0_PERSP_CENTROID_ENA(x) (((unsigned)(x) & 0x1) << 2) +#define G_0286D0_PERSP_CENTROID_ENA(x) (((x) >> 2) & 0x1) +#define C_0286D0_PERSP_CENTROID_ENA 0xFFFFFFFB +#define S_0286D0_PERSP_PULL_MODEL_ENA(x) (((unsigned)(x) & 0x1) << 3) +#define G_0286D0_PERSP_PULL_MODEL_ENA(x) (((x) >> 3) & 0x1) +#define C_0286D0_PERSP_PULL_MODEL_ENA 0xFFFFFFF7 +#define S_0286D0_LINEAR_SAMPLE_ENA(x) (((unsigned)(x) & 0x1) << 4) +#define G_0286D0_LINEAR_SAMPLE_ENA(x) (((x) >> 4) & 0x1) +#define C_0286D0_LINEAR_SAMPLE_ENA 0xFFFFFFEF +#define S_0286D0_LINEAR_CENTER_ENA(x) (((unsigned)(x) & 0x1) << 5) +#define G_0286D0_LINEAR_CENTER_ENA(x) (((x) >> 5) & 0x1) +#define C_0286D0_LINEAR_CENTER_ENA 0xFFFFFFDF +#define S_0286D0_LINEAR_CENTROID_ENA(x) (((unsigned)(x) & 0x1) << 6) +#define G_0286D0_LINEAR_CENTROID_ENA(x) (((x) >> 6) & 0x1) +#define C_0286D0_LINEAR_CENTROID_ENA 0xFFFFFFBF +#define S_0286D0_LINE_STIPPLE_TEX_ENA(x) (((unsigned)(x) & 0x1) << 7) +#define G_0286D0_LINE_STIPPLE_TEX_ENA(x) (((x) >> 7) & 0x1) +#define C_0286D0_LINE_STIPPLE_TEX_ENA 0xFFFFFF7F +#define S_0286D0_POS_X_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 8) +#define G_0286D0_POS_X_FLOAT_ENA(x) (((x) >> 8) & 0x1) +#define C_0286D0_POS_X_FLOAT_ENA 0xFFFFFEFF +#define S_0286D0_POS_Y_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 9) +#define G_0286D0_POS_Y_FLOAT_ENA(x) (((x) >> 9) & 0x1) +#define C_0286D0_POS_Y_FLOAT_ENA 0xFFFFFDFF +#define S_0286D0_POS_Z_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 10) +#define G_0286D0_POS_Z_FLOAT_ENA(x) (((x) >> 10) & 0x1) +#define C_0286D0_POS_Z_FLOAT_ENA 0xFFFFFBFF +#define S_0286D0_POS_W_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 11) +#define G_0286D0_POS_W_FLOAT_ENA(x) (((x) >> 11) & 0x1) +#define C_0286D0_POS_W_FLOAT_ENA 0xFFFFF7FF +#define S_0286D0_FRONT_FACE_ENA(x) (((unsigned)(x) & 0x1) << 12) +#define G_0286D0_FRONT_FACE_ENA(x) (((x) >> 12) & 0x1) +#define C_0286D0_FRONT_FACE_ENA 0xFFFFEFFF +#define S_0286D0_ANCILLARY_ENA(x) (((unsigned)(x) & 0x1) << 13) +#define G_0286D0_ANCILLARY_ENA(x) (((x) >> 13) & 0x1) +#define C_0286D0_ANCILLARY_ENA 0xFFFFDFFF +#define S_0286D0_SAMPLE_COVERAGE_ENA(x) (((unsigned)(x) & 0x1) << 14) +#define G_0286D0_SAMPLE_COVERAGE_ENA(x) (((x) >> 14) & 0x1) +#define C_0286D0_SAMPLE_COVERAGE_ENA 0xFFFFBFFF +#define S_0286D0_POS_FIXED_PT_ENA(x) (((unsigned)(x) & 0x1) << 15) +#define G_0286D0_POS_FIXED_PT_ENA(x) (((x) >> 15) & 0x1) +#define C_0286D0_POS_FIXED_PT_ENA 0xFFFF7FFF +#define R_0286D4_SPI_INTERP_CONTROL_0 0x0286D4 +#define S_0286D4_FLAT_SHADE_ENA(x) (((unsigned)(x) & 0x1) << 0) +#define G_0286D4_FLAT_SHADE_ENA(x) (((x) >> 0) & 0x1) +#define C_0286D4_FLAT_SHADE_ENA 0xFFFFFFFE +#define S_0286D4_PNT_SPRITE_ENA(x) (((unsigned)(x) & 0x1) << 1) +#define G_0286D4_PNT_SPRITE_ENA(x) (((x) >> 1) & 0x1) +#define C_0286D4_PNT_SPRITE_ENA 0xFFFFFFFD +#define S_0286D4_PNT_SPRITE_OVRD_X(x) (((unsigned)(x) & 0x07) << 2) +#define G_0286D4_PNT_SPRITE_OVRD_X(x) (((x) >> 2) & 0x07) +#define C_0286D4_PNT_SPRITE_OVRD_X 0xFFFFFFE3 +#define V_0286D4_SPI_PNT_SPRITE_SEL_0 0x00 +#define V_0286D4_SPI_PNT_SPRITE_SEL_1 0x01 +#define V_0286D4_SPI_PNT_SPRITE_SEL_S 0x02 +#define V_0286D4_SPI_PNT_SPRITE_SEL_T 0x03 +#define V_0286D4_SPI_PNT_SPRITE_SEL_NONE 0x04 +#define S_0286D4_PNT_SPRITE_OVRD_Y(x) (((unsigned)(x) & 0x07) << 5) +#define G_0286D4_PNT_SPRITE_OVRD_Y(x) (((x) >> 5) & 0x07) +#define C_0286D4_PNT_SPRITE_OVRD_Y 0xFFFFFF1F +#define V_0286D4_SPI_PNT_SPRITE_SEL_0 0x00 +#define V_0286D4_SPI_PNT_SPRITE_SEL_1 0x01 +#define V_0286D4_SPI_PNT_SPRITE_SEL_S 0x02 +#define V_0286D4_SPI_PNT_SPRITE_SEL_T 0x03 +#define V_0286D4_SPI_PNT_SPRITE_SEL_NONE 0x04 +#define S_0286D4_PNT_SPRITE_OVRD_Z(x) (((unsigned)(x) & 0x07) << 8) +#define G_0286D4_PNT_SPRITE_OVRD_Z(x) (((x) >> 8) & 0x07) +#define C_0286D4_PNT_SPRITE_OVRD_Z 0xFFFFF8FF +#define V_0286D4_SPI_PNT_SPRITE_SEL_0 0x00 +#define V_0286D4_SPI_PNT_SPRITE_SEL_1 0x01 +#define V_0286D4_SPI_PNT_SPRITE_SEL_S 0x02 +#define V_0286D4_SPI_PNT_SPRITE_SEL_T 0x03 +#define V_0286D4_SPI_PNT_SPRITE_SEL_NONE 0x04 +#define S_0286D4_PNT_SPRITE_OVRD_W(x) (((unsigned)(x) & 0x07) << 11) +#define G_0286D4_PNT_SPRITE_OVRD_W(x) (((x) >> 11) & 0x07) +#define C_0286D4_PNT_SPRITE_OVRD_W 0xFFFFC7FF +#define V_0286D4_SPI_PNT_SPRITE_SEL_0 0x00 +#define V_0286D4_SPI_PNT_SPRITE_SEL_1 0x01 +#define V_0286D4_SPI_PNT_SPRITE_SEL_S 0x02 +#define V_0286D4_SPI_PNT_SPRITE_SEL_T 0x03 +#define V_0286D4_SPI_PNT_SPRITE_SEL_NONE 0x04 +#define S_0286D4_PNT_SPRITE_TOP_1(x) (((unsigned)(x) & 0x1) << 14) +#define G_0286D4_PNT_SPRITE_TOP_1(x) (((x) >> 14) & 0x1) +#define C_0286D4_PNT_SPRITE_TOP_1 0xFFFFBFFF +#define R_0286D8_SPI_PS_IN_CONTROL 0x0286D8 +#define S_0286D8_NUM_INTERP(x) (((unsigned)(x) & 0x3F) << 0) +#define G_0286D8_NUM_INTERP(x) (((x) >> 0) & 0x3F) +#define C_0286D8_NUM_INTERP 0xFFFFFFC0 +#define S_0286D8_PARAM_GEN(x) (((unsigned)(x) & 0x1) << 6) +#define G_0286D8_PARAM_GEN(x) (((x) >> 6) & 0x1) +#define C_0286D8_PARAM_GEN 0xFFFFFFBF +#define S_0286D8_FOG_ADDR(x) (((unsigned)(x) & 0x7F) << 7) /* not on CIK */ +#define G_0286D8_FOG_ADDR(x) (((x) >> 7) & 0x7F) /* not on CIK */ +#define C_0286D8_FOG_ADDR 0xFFFFC07F /* not on CIK */ +#define S_0286D8_BC_OPTIMIZE_DISABLE(x) (((unsigned)(x) & 0x1) << 14) +#define G_0286D8_BC_OPTIMIZE_DISABLE(x) (((x) >> 14) & 0x1) +#define C_0286D8_BC_OPTIMIZE_DISABLE 0xFFFFBFFF +#define S_0286D8_PASS_FOG_THROUGH_PS(x) (((unsigned)(x) & 0x1) << 15) /* not on CIK */ +#define G_0286D8_PASS_FOG_THROUGH_PS(x) (((x) >> 15) & 0x1) /* not on CIK */ +#define C_0286D8_PASS_FOG_THROUGH_PS 0xFFFF7FFF /* not on CIK */ +#define R_0286E0_SPI_BARYC_CNTL 0x0286E0 +#define S_0286E0_PERSP_CENTER_CNTL(x) (((unsigned)(x) & 0x1) << 0) +#define G_0286E0_PERSP_CENTER_CNTL(x) (((x) >> 0) & 0x1) +#define C_0286E0_PERSP_CENTER_CNTL 0xFFFFFFFE +#define S_0286E0_PERSP_CENTROID_CNTL(x) (((unsigned)(x) & 0x1) << 4) +#define G_0286E0_PERSP_CENTROID_CNTL(x) (((x) >> 4) & 0x1) +#define C_0286E0_PERSP_CENTROID_CNTL 0xFFFFFFEF +#define S_0286E0_LINEAR_CENTER_CNTL(x) (((unsigned)(x) & 0x1) << 8) +#define G_0286E0_LINEAR_CENTER_CNTL(x) (((x) >> 8) & 0x1) +#define C_0286E0_LINEAR_CENTER_CNTL 0xFFFFFEFF +#define S_0286E0_LINEAR_CENTROID_CNTL(x) (((unsigned)(x) & 0x1) << 12) +#define G_0286E0_LINEAR_CENTROID_CNTL(x) (((x) >> 12) & 0x1) +#define C_0286E0_LINEAR_CENTROID_CNTL 0xFFFFEFFF +#define S_0286E0_POS_FLOAT_LOCATION(x) (((unsigned)(x) & 0x03) << 16) +#define G_0286E0_POS_FLOAT_LOCATION(x) (((x) >> 16) & 0x03) +#define C_0286E0_POS_FLOAT_LOCATION 0xFFFCFFFF +#define V_0286E0_X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT 0x00 +#define S_0286E0_POS_FLOAT_ULC(x) (((unsigned)(x) & 0x1) << 20) +#define G_0286E0_POS_FLOAT_ULC(x) (((x) >> 20) & 0x1) +#define C_0286E0_POS_FLOAT_ULC 0xFFEFFFFF +#define S_0286E0_FRONT_FACE_ALL_BITS(x) (((unsigned)(x) & 0x1) << 24) +#define G_0286E0_FRONT_FACE_ALL_BITS(x) (((x) >> 24) & 0x1) +#define C_0286E0_FRONT_FACE_ALL_BITS 0xFEFFFFFF +#define R_0286E8_SPI_TMPRING_SIZE 0x0286E8 +#define S_0286E8_WAVES(x) (((unsigned)(x) & 0xFFF) << 0) +#define G_0286E8_WAVES(x) (((x) >> 0) & 0xFFF) +#define C_0286E8_WAVES 0xFFFFF000 +#define S_0286E8_WAVESIZE(x) (((unsigned)(x) & 0x1FFF) << 12) +#define G_0286E8_WAVESIZE(x) (((x) >> 12) & 0x1FFF) +#define C_0286E8_WAVESIZE 0xFE000FFF +#define R_028704_SPI_WAVE_MGMT_1 0x028704 /* not on CIK */ +#define S_028704_NUM_PS_WAVES(x) (((unsigned)(x) & 0x3F) << 0) +#define G_028704_NUM_PS_WAVES(x) (((x) >> 0) & 0x3F) +#define C_028704_NUM_PS_WAVES 0xFFFFFFC0 +#define S_028704_NUM_VS_WAVES(x) (((unsigned)(x) & 0x3F) << 6) +#define G_028704_NUM_VS_WAVES(x) (((x) >> 6) & 0x3F) +#define C_028704_NUM_VS_WAVES 0xFFFFF03F +#define S_028704_NUM_GS_WAVES(x) (((unsigned)(x) & 0x3F) << 12) +#define G_028704_NUM_GS_WAVES(x) (((x) >> 12) & 0x3F) +#define C_028704_NUM_GS_WAVES 0xFFFC0FFF +#define S_028704_NUM_ES_WAVES(x) (((unsigned)(x) & 0x3F) << 18) +#define G_028704_NUM_ES_WAVES(x) (((x) >> 18) & 0x3F) +#define C_028704_NUM_ES_WAVES 0xFF03FFFF +#define S_028704_NUM_HS_WAVES(x) (((unsigned)(x) & 0x3F) << 24) +#define G_028704_NUM_HS_WAVES(x) (((x) >> 24) & 0x3F) +#define C_028704_NUM_HS_WAVES 0xC0FFFFFF +#define R_028708_SPI_WAVE_MGMT_2 0x028708 /* not on CIK */ +#define S_028708_NUM_LS_WAVES(x) (((unsigned)(x) & 0x3F) << 0) +#define G_028708_NUM_LS_WAVES(x) (((x) >> 0) & 0x3F) +#define C_028708_NUM_LS_WAVES 0xFFFFFFC0 +#define R_02870C_SPI_SHADER_POS_FORMAT 0x02870C +#define S_02870C_POS0_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 0) +#define G_02870C_POS0_EXPORT_FORMAT(x) (((x) >> 0) & 0x0F) +#define C_02870C_POS0_EXPORT_FORMAT 0xFFFFFFF0 +#define V_02870C_SPI_SHADER_NONE 0x00 +#define V_02870C_SPI_SHADER_1COMP 0x01 +#define V_02870C_SPI_SHADER_2COMP 0x02 +#define V_02870C_SPI_SHADER_4COMPRESS 0x03 +#define V_02870C_SPI_SHADER_4COMP 0x04 +#define S_02870C_POS1_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 4) +#define G_02870C_POS1_EXPORT_FORMAT(x) (((x) >> 4) & 0x0F) +#define C_02870C_POS1_EXPORT_FORMAT 0xFFFFFF0F +#define V_02870C_SPI_SHADER_NONE 0x00 +#define V_02870C_SPI_SHADER_1COMP 0x01 +#define V_02870C_SPI_SHADER_2COMP 0x02 +#define V_02870C_SPI_SHADER_4COMPRESS 0x03 +#define V_02870C_SPI_SHADER_4COMP 0x04 +#define S_02870C_POS2_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 8) +#define G_02870C_POS2_EXPORT_FORMAT(x) (((x) >> 8) & 0x0F) +#define C_02870C_POS2_EXPORT_FORMAT 0xFFFFF0FF +#define V_02870C_SPI_SHADER_NONE 0x00 +#define V_02870C_SPI_SHADER_1COMP 0x01 +#define V_02870C_SPI_SHADER_2COMP 0x02 +#define V_02870C_SPI_SHADER_4COMPRESS 0x03 +#define V_02870C_SPI_SHADER_4COMP 0x04 +#define S_02870C_POS3_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 12) +#define G_02870C_POS3_EXPORT_FORMAT(x) (((x) >> 12) & 0x0F) +#define C_02870C_POS3_EXPORT_FORMAT 0xFFFF0FFF +#define V_02870C_SPI_SHADER_NONE 0x00 +#define V_02870C_SPI_SHADER_1COMP 0x01 +#define V_02870C_SPI_SHADER_2COMP 0x02 +#define V_02870C_SPI_SHADER_4COMPRESS 0x03 +#define V_02870C_SPI_SHADER_4COMP 0x04 +#define R_028710_SPI_SHADER_Z_FORMAT 0x028710 +#define S_028710_Z_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028710_Z_EXPORT_FORMAT(x) (((x) >> 0) & 0x0F) +#define C_028710_Z_EXPORT_FORMAT 0xFFFFFFF0 +#define V_028710_SPI_SHADER_ZERO 0x00 +#define V_028710_SPI_SHADER_32_R 0x01 +#define V_028710_SPI_SHADER_32_GR 0x02 +#define V_028710_SPI_SHADER_32_AR 0x03 +#define V_028710_SPI_SHADER_FP16_ABGR 0x04 +#define V_028710_SPI_SHADER_UNORM16_ABGR 0x05 +#define V_028710_SPI_SHADER_SNORM16_ABGR 0x06 +#define V_028710_SPI_SHADER_UINT16_ABGR 0x07 +#define V_028710_SPI_SHADER_SINT16_ABGR 0x08 +#define V_028710_SPI_SHADER_32_ABGR 0x09 +#define R_028714_SPI_SHADER_COL_FORMAT 0x028714 +#define S_028714_COL0_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028714_COL0_EXPORT_FORMAT(x) (((x) >> 0) & 0x0F) +#define C_028714_COL0_EXPORT_FORMAT 0xFFFFFFF0 +#define V_028714_SPI_SHADER_ZERO 0x00 +#define V_028714_SPI_SHADER_32_R 0x01 +#define V_028714_SPI_SHADER_32_GR 0x02 +#define V_028714_SPI_SHADER_32_AR 0x03 +#define V_028714_SPI_SHADER_FP16_ABGR 0x04 +#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 +#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 +#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 +#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 +#define V_028714_SPI_SHADER_32_ABGR 0x09 +#define S_028714_COL1_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028714_COL1_EXPORT_FORMAT(x) (((x) >> 4) & 0x0F) +#define C_028714_COL1_EXPORT_FORMAT 0xFFFFFF0F +#define V_028714_SPI_SHADER_ZERO 0x00 +#define V_028714_SPI_SHADER_32_R 0x01 +#define V_028714_SPI_SHADER_32_GR 0x02 +#define V_028714_SPI_SHADER_32_AR 0x03 +#define V_028714_SPI_SHADER_FP16_ABGR 0x04 +#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 +#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 +#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 +#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 +#define V_028714_SPI_SHADER_32_ABGR 0x09 +#define S_028714_COL2_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028714_COL2_EXPORT_FORMAT(x) (((x) >> 8) & 0x0F) +#define C_028714_COL2_EXPORT_FORMAT 0xFFFFF0FF +#define V_028714_SPI_SHADER_ZERO 0x00 +#define V_028714_SPI_SHADER_32_R 0x01 +#define V_028714_SPI_SHADER_32_GR 0x02 +#define V_028714_SPI_SHADER_32_AR 0x03 +#define V_028714_SPI_SHADER_FP16_ABGR 0x04 +#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 +#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 +#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 +#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 +#define V_028714_SPI_SHADER_32_ABGR 0x09 +#define S_028714_COL3_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028714_COL3_EXPORT_FORMAT(x) (((x) >> 12) & 0x0F) +#define C_028714_COL3_EXPORT_FORMAT 0xFFFF0FFF +#define V_028714_SPI_SHADER_ZERO 0x00 +#define V_028714_SPI_SHADER_32_R 0x01 +#define V_028714_SPI_SHADER_32_GR 0x02 +#define V_028714_SPI_SHADER_32_AR 0x03 +#define V_028714_SPI_SHADER_FP16_ABGR 0x04 +#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 +#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 +#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 +#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 +#define V_028714_SPI_SHADER_32_ABGR 0x09 +#define S_028714_COL4_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 16) +#define G_028714_COL4_EXPORT_FORMAT(x) (((x) >> 16) & 0x0F) +#define C_028714_COL4_EXPORT_FORMAT 0xFFF0FFFF +#define V_028714_SPI_SHADER_ZERO 0x00 +#define V_028714_SPI_SHADER_32_R 0x01 +#define V_028714_SPI_SHADER_32_GR 0x02 +#define V_028714_SPI_SHADER_32_AR 0x03 +#define V_028714_SPI_SHADER_FP16_ABGR 0x04 +#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 +#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 +#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 +#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 +#define V_028714_SPI_SHADER_32_ABGR 0x09 +#define S_028714_COL5_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 20) +#define G_028714_COL5_EXPORT_FORMAT(x) (((x) >> 20) & 0x0F) +#define C_028714_COL5_EXPORT_FORMAT 0xFF0FFFFF +#define V_028714_SPI_SHADER_ZERO 0x00 +#define V_028714_SPI_SHADER_32_R 0x01 +#define V_028714_SPI_SHADER_32_GR 0x02 +#define V_028714_SPI_SHADER_32_AR 0x03 +#define V_028714_SPI_SHADER_FP16_ABGR 0x04 +#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 +#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 +#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 +#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 +#define V_028714_SPI_SHADER_32_ABGR 0x09 +#define S_028714_COL6_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 24) +#define G_028714_COL6_EXPORT_FORMAT(x) (((x) >> 24) & 0x0F) +#define C_028714_COL6_EXPORT_FORMAT 0xF0FFFFFF +#define V_028714_SPI_SHADER_ZERO 0x00 +#define V_028714_SPI_SHADER_32_R 0x01 +#define V_028714_SPI_SHADER_32_GR 0x02 +#define V_028714_SPI_SHADER_32_AR 0x03 +#define V_028714_SPI_SHADER_FP16_ABGR 0x04 +#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 +#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 +#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 +#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 +#define V_028714_SPI_SHADER_32_ABGR 0x09 +#define S_028714_COL7_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 28) +#define G_028714_COL7_EXPORT_FORMAT(x) (((x) >> 28) & 0x0F) +#define C_028714_COL7_EXPORT_FORMAT 0x0FFFFFFF +#define V_028714_SPI_SHADER_ZERO 0x00 +#define V_028714_SPI_SHADER_32_R 0x01 +#define V_028714_SPI_SHADER_32_GR 0x02 +#define V_028714_SPI_SHADER_32_AR 0x03 +#define V_028714_SPI_SHADER_FP16_ABGR 0x04 +#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 +#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 +#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 +#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 +#define V_028714_SPI_SHADER_32_ABGR 0x09 +/* Stoney */ +#define R_028754_SX_PS_DOWNCONVERT 0x028754 +#define S_028754_MRT0(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028754_MRT0(x) (((x) >> 0) & 0x0F) +#define C_028754_MRT0 0xFFFFFFF0 +#define V_028754_SX_RT_EXPORT_NO_CONVERSION 0 +#define V_028754_SX_RT_EXPORT_32_R 1 +#define V_028754_SX_RT_EXPORT_32_A 2 +#define V_028754_SX_RT_EXPORT_10_11_11 3 +#define V_028754_SX_RT_EXPORT_2_10_10_10 4 +#define V_028754_SX_RT_EXPORT_8_8_8_8 5 +#define V_028754_SX_RT_EXPORT_5_6_5 6 +#define V_028754_SX_RT_EXPORT_1_5_5_5 7 +#define V_028754_SX_RT_EXPORT_4_4_4_4 8 +#define V_028754_SX_RT_EXPORT_16_16_GR 9 +#define V_028754_SX_RT_EXPORT_16_16_AR 10 +#define S_028754_MRT1(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028754_MRT1(x) (((x) >> 4) & 0x0F) +#define C_028754_MRT1 0xFFFFFF0F +#define S_028754_MRT2(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028754_MRT2(x) (((x) >> 8) & 0x0F) +#define C_028754_MRT2 0xFFFFF0FF +#define S_028754_MRT3(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028754_MRT3(x) (((x) >> 12) & 0x0F) +#define C_028754_MRT3 0xFFFF0FFF +#define S_028754_MRT4(x) (((unsigned)(x) & 0x0F) << 16) +#define G_028754_MRT4(x) (((x) >> 16) & 0x0F) +#define C_028754_MRT4 0xFFF0FFFF +#define S_028754_MRT5(x) (((unsigned)(x) & 0x0F) << 20) +#define G_028754_MRT5(x) (((x) >> 20) & 0x0F) +#define C_028754_MRT5 0xFF0FFFFF +#define S_028754_MRT6(x) (((unsigned)(x) & 0x0F) << 24) +#define G_028754_MRT6(x) (((x) >> 24) & 0x0F) +#define C_028754_MRT6 0xF0FFFFFF +#define S_028754_MRT7(x) (((unsigned)(x) & 0x0F) << 28) +#define G_028754_MRT7(x) (((x) >> 28) & 0x0F) +#define C_028754_MRT7 0x0FFFFFFF +#define R_028758_SX_BLEND_OPT_EPSILON 0x028758 +#define S_028758_MRT0_EPSILON(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028758_MRT0_EPSILON(x) (((x) >> 0) & 0x0F) +#define C_028758_MRT0_EPSILON 0xFFFFFFF0 +#define V_028758_EXACT 0 +#define V_028758_11BIT_FORMAT 1 +#define V_028758_10BIT_FORMAT 3 +#define V_028758_8BIT_FORMAT 7 +#define V_028758_6BIT_FORMAT 11 +#define V_028758_5BIT_FORMAT 13 +#define V_028758_4BIT_FORMAT 15 +#define S_028758_MRT1_EPSILON(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028758_MRT1_EPSILON(x) (((x) >> 4) & 0x0F) +#define C_028758_MRT1_EPSILON 0xFFFFFF0F +#define S_028758_MRT2_EPSILON(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028758_MRT2_EPSILON(x) (((x) >> 8) & 0x0F) +#define C_028758_MRT2_EPSILON 0xFFFFF0FF +#define S_028758_MRT3_EPSILON(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028758_MRT3_EPSILON(x) (((x) >> 12) & 0x0F) +#define C_028758_MRT3_EPSILON 0xFFFF0FFF +#define S_028758_MRT4_EPSILON(x) (((unsigned)(x) & 0x0F) << 16) +#define G_028758_MRT4_EPSILON(x) (((x) >> 16) & 0x0F) +#define C_028758_MRT4_EPSILON 0xFFF0FFFF +#define S_028758_MRT5_EPSILON(x) (((unsigned)(x) & 0x0F) << 20) +#define G_028758_MRT5_EPSILON(x) (((x) >> 20) & 0x0F) +#define C_028758_MRT5_EPSILON 0xFF0FFFFF +#define S_028758_MRT6_EPSILON(x) (((unsigned)(x) & 0x0F) << 24) +#define G_028758_MRT6_EPSILON(x) (((x) >> 24) & 0x0F) +#define C_028758_MRT6_EPSILON 0xF0FFFFFF +#define S_028758_MRT7_EPSILON(x) (((unsigned)(x) & 0x0F) << 28) +#define G_028758_MRT7_EPSILON(x) (((x) >> 28) & 0x0F) +#define C_028758_MRT7_EPSILON 0x0FFFFFFF +#define R_02875C_SX_BLEND_OPT_CONTROL 0x02875C +#define S_02875C_MRT0_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 0) +#define G_02875C_MRT0_COLOR_OPT_DISABLE(x) (((x) >> 0) & 0x1) +#define C_02875C_MRT0_COLOR_OPT_DISABLE 0xFFFFFFFE +#define S_02875C_MRT0_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 1) +#define G_02875C_MRT0_ALPHA_OPT_DISABLE(x) (((x) >> 1) & 0x1) +#define C_02875C_MRT0_ALPHA_OPT_DISABLE 0xFFFFFFFD +#define S_02875C_MRT1_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 4) +#define G_02875C_MRT1_COLOR_OPT_DISABLE(x) (((x) >> 4) & 0x1) +#define C_02875C_MRT1_COLOR_OPT_DISABLE 0xFFFFFFEF +#define S_02875C_MRT1_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 5) +#define G_02875C_MRT1_ALPHA_OPT_DISABLE(x) (((x) >> 5) & 0x1) +#define C_02875C_MRT1_ALPHA_OPT_DISABLE 0xFFFFFFDF +#define S_02875C_MRT2_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 8) +#define G_02875C_MRT2_COLOR_OPT_DISABLE(x) (((x) >> 8) & 0x1) +#define C_02875C_MRT2_COLOR_OPT_DISABLE 0xFFFFFEFF +#define S_02875C_MRT2_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 9) +#define G_02875C_MRT2_ALPHA_OPT_DISABLE(x) (((x) >> 9) & 0x1) +#define C_02875C_MRT2_ALPHA_OPT_DISABLE 0xFFFFFDFF +#define S_02875C_MRT3_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 12) +#define G_02875C_MRT3_COLOR_OPT_DISABLE(x) (((x) >> 12) & 0x1) +#define C_02875C_MRT3_COLOR_OPT_DISABLE 0xFFFFEFFF +#define S_02875C_MRT3_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 13) +#define G_02875C_MRT3_ALPHA_OPT_DISABLE(x) (((x) >> 13) & 0x1) +#define C_02875C_MRT3_ALPHA_OPT_DISABLE 0xFFFFDFFF +#define S_02875C_MRT4_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 16) +#define G_02875C_MRT4_COLOR_OPT_DISABLE(x) (((x) >> 16) & 0x1) +#define C_02875C_MRT4_COLOR_OPT_DISABLE 0xFFFEFFFF +#define S_02875C_MRT4_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 17) +#define G_02875C_MRT4_ALPHA_OPT_DISABLE(x) (((x) >> 17) & 0x1) +#define C_02875C_MRT4_ALPHA_OPT_DISABLE 0xFFFDFFFF +#define S_02875C_MRT5_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 20) +#define G_02875C_MRT5_COLOR_OPT_DISABLE(x) (((x) >> 20) & 0x1) +#define C_02875C_MRT5_COLOR_OPT_DISABLE 0xFFEFFFFF +#define S_02875C_MRT5_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 21) +#define G_02875C_MRT5_ALPHA_OPT_DISABLE(x) (((x) >> 21) & 0x1) +#define C_02875C_MRT5_ALPHA_OPT_DISABLE 0xFFDFFFFF +#define S_02875C_MRT6_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 24) +#define G_02875C_MRT6_COLOR_OPT_DISABLE(x) (((x) >> 24) & 0x1) +#define C_02875C_MRT6_COLOR_OPT_DISABLE 0xFEFFFFFF +#define S_02875C_MRT6_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 25) +#define G_02875C_MRT6_ALPHA_OPT_DISABLE(x) (((x) >> 25) & 0x1) +#define C_02875C_MRT6_ALPHA_OPT_DISABLE 0xFDFFFFFF +#define S_02875C_MRT7_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 28) +#define G_02875C_MRT7_COLOR_OPT_DISABLE(x) (((x) >> 28) & 0x1) +#define C_02875C_MRT7_COLOR_OPT_DISABLE 0xEFFFFFFF +#define S_02875C_MRT7_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 29) +#define G_02875C_MRT7_ALPHA_OPT_DISABLE(x) (((x) >> 29) & 0x1) +#define C_02875C_MRT7_ALPHA_OPT_DISABLE 0xDFFFFFFF +#define S_02875C_PIXEN_ZERO_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 31) +#define G_02875C_PIXEN_ZERO_OPT_DISABLE(x) (((x) >> 31) & 0x1) +#define C_02875C_PIXEN_ZERO_OPT_DISABLE 0x7FFFFFFF +#define R_028760_SX_MRT0_BLEND_OPT 0x028760 +#define S_028760_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) +#define G_028760_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) +#define C_028760_COLOR_SRC_OPT 0xFFFFFFF8 +#define V_028760_BLEND_OPT_PRESERVE_NONE_IGNORE_ALL 0 +#define V_028760_BLEND_OPT_PRESERVE_ALL_IGNORE_NONE 1 +#define V_028760_BLEND_OPT_PRESERVE_C1_IGNORE_C0 2 +#define V_028760_BLEND_OPT_PRESERVE_C0_IGNORE_C1 3 +#define V_028760_BLEND_OPT_PRESERVE_A1_IGNORE_A0 4 +#define V_028760_BLEND_OPT_PRESERVE_A0_IGNORE_A1 5 +#define V_028760_BLEND_OPT_PRESERVE_NONE_IGNORE_A0 6 +#define V_028760_BLEND_OPT_PRESERVE_NONE_IGNORE_NONE 7 +#define S_028760_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) +#define G_028760_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) +#define C_028760_COLOR_DST_OPT 0xFFFFFF8F +#define S_028760_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) +#define G_028760_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) +#define C_028760_COLOR_COMB_FCN 0xFFFFF8FF +#define V_028760_OPT_COMB_NONE 0 +#define V_028760_OPT_COMB_ADD 1 +#define V_028760_OPT_COMB_SUBTRACT 2 +#define V_028760_OPT_COMB_MIN 3 +#define V_028760_OPT_COMB_MAX 4 +#define V_028760_OPT_COMB_REVSUBTRACT 5 +#define V_028760_OPT_COMB_BLEND_DISABLED 6 +#define V_028760_OPT_COMB_SAFE_ADD 7 +#define S_028760_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) +#define G_028760_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) +#define C_028760_ALPHA_SRC_OPT 0xFFF8FFFF +#define S_028760_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) +#define G_028760_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) +#define C_028760_ALPHA_DST_OPT 0xFF8FFFFF +#define S_028760_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) +#define G_028760_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) +#define C_028760_ALPHA_COMB_FCN 0xF8FFFFFF +#define R_028764_SX_MRT1_BLEND_OPT 0x028764 +#define S_028764_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) +#define G_028764_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) +#define C_028764_COLOR_SRC_OPT 0xFFFFFFF8 +#define S_028764_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) +#define G_028764_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) +#define C_028764_COLOR_DST_OPT 0xFFFFFF8F +#define S_028764_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) +#define G_028764_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) +#define C_028764_COLOR_COMB_FCN 0xFFFFF8FF +#define S_028764_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) +#define G_028764_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) +#define C_028764_ALPHA_SRC_OPT 0xFFF8FFFF +#define S_028764_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) +#define G_028764_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) +#define C_028764_ALPHA_DST_OPT 0xFF8FFFFF +#define S_028764_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) +#define G_028764_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) +#define C_028764_ALPHA_COMB_FCN 0xF8FFFFFF +#define R_028768_SX_MRT2_BLEND_OPT 0x028768 +#define S_028768_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) +#define G_028768_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) +#define C_028768_COLOR_SRC_OPT 0xFFFFFFF8 +#define S_028768_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) +#define G_028768_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) +#define C_028768_COLOR_DST_OPT 0xFFFFFF8F +#define S_028768_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) +#define G_028768_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) +#define C_028768_COLOR_COMB_FCN 0xFFFFF8FF +#define S_028768_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) +#define G_028768_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) +#define C_028768_ALPHA_SRC_OPT 0xFFF8FFFF +#define S_028768_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) +#define G_028768_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) +#define C_028768_ALPHA_DST_OPT 0xFF8FFFFF +#define S_028768_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) +#define G_028768_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) +#define C_028768_ALPHA_COMB_FCN 0xF8FFFFFF +#define R_02876C_SX_MRT3_BLEND_OPT 0x02876C +#define S_02876C_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) +#define G_02876C_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) +#define C_02876C_COLOR_SRC_OPT 0xFFFFFFF8 +#define S_02876C_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) +#define G_02876C_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) +#define C_02876C_COLOR_DST_OPT 0xFFFFFF8F +#define S_02876C_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) +#define G_02876C_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) +#define C_02876C_COLOR_COMB_FCN 0xFFFFF8FF +#define S_02876C_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) +#define G_02876C_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) +#define C_02876C_ALPHA_SRC_OPT 0xFFF8FFFF +#define S_02876C_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) +#define G_02876C_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) +#define C_02876C_ALPHA_DST_OPT 0xFF8FFFFF +#define S_02876C_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) +#define G_02876C_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) +#define C_02876C_ALPHA_COMB_FCN 0xF8FFFFFF +#define R_028770_SX_MRT4_BLEND_OPT 0x028770 +#define S_028770_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) +#define G_028770_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) +#define C_028770_COLOR_SRC_OPT 0xFFFFFFF8 +#define S_028770_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) +#define G_028770_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) +#define C_028770_COLOR_DST_OPT 0xFFFFFF8F +#define S_028770_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) +#define G_028770_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) +#define C_028770_COLOR_COMB_FCN 0xFFFFF8FF +#define S_028770_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) +#define G_028770_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) +#define C_028770_ALPHA_SRC_OPT 0xFFF8FFFF +#define S_028770_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) +#define G_028770_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) +#define C_028770_ALPHA_DST_OPT 0xFF8FFFFF +#define S_028770_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) +#define G_028770_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) +#define C_028770_ALPHA_COMB_FCN 0xF8FFFFFF +#define R_028774_SX_MRT5_BLEND_OPT 0x028774 +#define S_028774_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) +#define G_028774_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) +#define C_028774_COLOR_SRC_OPT 0xFFFFFFF8 +#define S_028774_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) +#define G_028774_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) +#define C_028774_COLOR_DST_OPT 0xFFFFFF8F +#define S_028774_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) +#define G_028774_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) +#define C_028774_COLOR_COMB_FCN 0xFFFFF8FF +#define S_028774_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) +#define G_028774_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) +#define C_028774_ALPHA_SRC_OPT 0xFFF8FFFF +#define S_028774_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) +#define G_028774_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) +#define C_028774_ALPHA_DST_OPT 0xFF8FFFFF +#define S_028774_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) +#define G_028774_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) +#define C_028774_ALPHA_COMB_FCN 0xF8FFFFFF +#define R_028778_SX_MRT6_BLEND_OPT 0x028778 +#define S_028778_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) +#define G_028778_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) +#define C_028778_COLOR_SRC_OPT 0xFFFFFFF8 +#define S_028778_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) +#define G_028778_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) +#define C_028778_COLOR_DST_OPT 0xFFFFFF8F +#define S_028778_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) +#define G_028778_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) +#define C_028778_COLOR_COMB_FCN 0xFFFFF8FF +#define S_028778_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) +#define G_028778_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) +#define C_028778_ALPHA_SRC_OPT 0xFFF8FFFF +#define S_028778_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) +#define G_028778_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) +#define C_028778_ALPHA_DST_OPT 0xFF8FFFFF +#define S_028778_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) +#define G_028778_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) +#define C_028778_ALPHA_COMB_FCN 0xF8FFFFFF +#define R_02877C_SX_MRT7_BLEND_OPT 0x02877C +#define S_02877C_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) +#define G_02877C_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) +#define C_02877C_COLOR_SRC_OPT 0xFFFFFFF8 +#define S_02877C_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) +#define G_02877C_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) +#define C_02877C_COLOR_DST_OPT 0xFFFFFF8F +#define S_02877C_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) +#define G_02877C_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) +#define C_02877C_COLOR_COMB_FCN 0xFFFFF8FF +#define S_02877C_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) +#define G_02877C_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) +#define C_02877C_ALPHA_SRC_OPT 0xFFF8FFFF +#define S_02877C_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) +#define G_02877C_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) +#define C_02877C_ALPHA_DST_OPT 0xFF8FFFFF +#define S_02877C_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) +#define G_02877C_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) +#define C_02877C_ALPHA_COMB_FCN 0xF8FFFFFF +/* */ +#define R_028780_CB_BLEND0_CONTROL 0x028780 +#define S_028780_COLOR_SRCBLEND(x) (((unsigned)(x) & 0x1F) << 0) +#define G_028780_COLOR_SRCBLEND(x) (((x) >> 0) & 0x1F) +#define C_028780_COLOR_SRCBLEND 0xFFFFFFE0 +#define V_028780_BLEND_ZERO 0x00 +#define V_028780_BLEND_ONE 0x01 +#define V_028780_BLEND_SRC_COLOR 0x02 +#define V_028780_BLEND_ONE_MINUS_SRC_COLOR 0x03 +#define V_028780_BLEND_SRC_ALPHA 0x04 +#define V_028780_BLEND_ONE_MINUS_SRC_ALPHA 0x05 +#define V_028780_BLEND_DST_ALPHA 0x06 +#define V_028780_BLEND_ONE_MINUS_DST_ALPHA 0x07 +#define V_028780_BLEND_DST_COLOR 0x08 +#define V_028780_BLEND_ONE_MINUS_DST_COLOR 0x09 +#define V_028780_BLEND_SRC_ALPHA_SATURATE 0x0A +#define V_028780_BLEND_CONSTANT_COLOR 0x0D +#define V_028780_BLEND_ONE_MINUS_CONSTANT_COLOR 0x0E +#define V_028780_BLEND_SRC1_COLOR 0x0F +#define V_028780_BLEND_INV_SRC1_COLOR 0x10 +#define V_028780_BLEND_SRC1_ALPHA 0x11 +#define V_028780_BLEND_INV_SRC1_ALPHA 0x12 +#define V_028780_BLEND_CONSTANT_ALPHA 0x13 +#define V_028780_BLEND_ONE_MINUS_CONSTANT_ALPHA 0x14 +#define S_028780_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 5) +#define G_028780_COLOR_COMB_FCN(x) (((x) >> 5) & 0x07) +#define C_028780_COLOR_COMB_FCN 0xFFFFFF1F +#define V_028780_COMB_DST_PLUS_SRC 0x00 +#define V_028780_COMB_SRC_MINUS_DST 0x01 +#define V_028780_COMB_MIN_DST_SRC 0x02 +#define V_028780_COMB_MAX_DST_SRC 0x03 +#define V_028780_COMB_DST_MINUS_SRC 0x04 +#define S_028780_COLOR_DESTBLEND(x) (((unsigned)(x) & 0x1F) << 8) +#define G_028780_COLOR_DESTBLEND(x) (((x) >> 8) & 0x1F) +#define C_028780_COLOR_DESTBLEND 0xFFFFE0FF +#define V_028780_BLEND_ZERO 0x00 +#define V_028780_BLEND_ONE 0x01 +#define V_028780_BLEND_SRC_COLOR 0x02 +#define V_028780_BLEND_ONE_MINUS_SRC_COLOR 0x03 +#define V_028780_BLEND_SRC_ALPHA 0x04 +#define V_028780_BLEND_ONE_MINUS_SRC_ALPHA 0x05 +#define V_028780_BLEND_DST_ALPHA 0x06 +#define V_028780_BLEND_ONE_MINUS_DST_ALPHA 0x07 +#define V_028780_BLEND_DST_COLOR 0x08 +#define V_028780_BLEND_ONE_MINUS_DST_COLOR 0x09 +#define V_028780_BLEND_SRC_ALPHA_SATURATE 0x0A +#define V_028780_BLEND_CONSTANT_COLOR 0x0D +#define V_028780_BLEND_ONE_MINUS_CONSTANT_COLOR 0x0E +#define V_028780_BLEND_SRC1_COLOR 0x0F +#define V_028780_BLEND_INV_SRC1_COLOR 0x10 +#define V_028780_BLEND_SRC1_ALPHA 0x11 +#define V_028780_BLEND_INV_SRC1_ALPHA 0x12 +#define V_028780_BLEND_CONSTANT_ALPHA 0x13 +#define V_028780_BLEND_ONE_MINUS_CONSTANT_ALPHA 0x14 +#define S_028780_ALPHA_SRCBLEND(x) (((unsigned)(x) & 0x1F) << 16) +#define G_028780_ALPHA_SRCBLEND(x) (((x) >> 16) & 0x1F) +#define C_028780_ALPHA_SRCBLEND 0xFFE0FFFF +#define V_028780_BLEND_ZERO 0x00 +#define V_028780_BLEND_ONE 0x01 +#define V_028780_BLEND_SRC_COLOR 0x02 +#define V_028780_BLEND_ONE_MINUS_SRC_COLOR 0x03 +#define V_028780_BLEND_SRC_ALPHA 0x04 +#define V_028780_BLEND_ONE_MINUS_SRC_ALPHA 0x05 +#define V_028780_BLEND_DST_ALPHA 0x06 +#define V_028780_BLEND_ONE_MINUS_DST_ALPHA 0x07 +#define V_028780_BLEND_DST_COLOR 0x08 +#define V_028780_BLEND_ONE_MINUS_DST_COLOR 0x09 +#define V_028780_BLEND_SRC_ALPHA_SATURATE 0x0A +#define V_028780_BLEND_CONSTANT_COLOR 0x0D +#define V_028780_BLEND_ONE_MINUS_CONSTANT_COLOR 0x0E +#define V_028780_BLEND_SRC1_COLOR 0x0F +#define V_028780_BLEND_INV_SRC1_COLOR 0x10 +#define V_028780_BLEND_SRC1_ALPHA 0x11 +#define V_028780_BLEND_INV_SRC1_ALPHA 0x12 +#define V_028780_BLEND_CONSTANT_ALPHA 0x13 +#define V_028780_BLEND_ONE_MINUS_CONSTANT_ALPHA 0x14 +#define S_028780_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 21) +#define G_028780_ALPHA_COMB_FCN(x) (((x) >> 21) & 0x07) +#define C_028780_ALPHA_COMB_FCN 0xFF1FFFFF +#define V_028780_COMB_DST_PLUS_SRC 0x00 +#define V_028780_COMB_SRC_MINUS_DST 0x01 +#define V_028780_COMB_MIN_DST_SRC 0x02 +#define V_028780_COMB_MAX_DST_SRC 0x03 +#define V_028780_COMB_DST_MINUS_SRC 0x04 +#define S_028780_ALPHA_DESTBLEND(x) (((unsigned)(x) & 0x1F) << 24) +#define G_028780_ALPHA_DESTBLEND(x) (((x) >> 24) & 0x1F) +#define C_028780_ALPHA_DESTBLEND 0xE0FFFFFF +#define V_028780_BLEND_ZERO 0x00 +#define V_028780_BLEND_ONE 0x01 +#define V_028780_BLEND_SRC_COLOR 0x02 +#define V_028780_BLEND_ONE_MINUS_SRC_COLOR 0x03 +#define V_028780_BLEND_SRC_ALPHA 0x04 +#define V_028780_BLEND_ONE_MINUS_SRC_ALPHA 0x05 +#define V_028780_BLEND_DST_ALPHA 0x06 +#define V_028780_BLEND_ONE_MINUS_DST_ALPHA 0x07 +#define V_028780_BLEND_DST_COLOR 0x08 +#define V_028780_BLEND_ONE_MINUS_DST_COLOR 0x09 +#define V_028780_BLEND_SRC_ALPHA_SATURATE 0x0A +#define V_028780_BLEND_CONSTANT_COLOR 0x0D +#define V_028780_BLEND_ONE_MINUS_CONSTANT_COLOR 0x0E +#define V_028780_BLEND_SRC1_COLOR 0x0F +#define V_028780_BLEND_INV_SRC1_COLOR 0x10 +#define V_028780_BLEND_SRC1_ALPHA 0x11 +#define V_028780_BLEND_INV_SRC1_ALPHA 0x12 +#define V_028780_BLEND_CONSTANT_ALPHA 0x13 +#define V_028780_BLEND_ONE_MINUS_CONSTANT_ALPHA 0x14 +#define S_028780_SEPARATE_ALPHA_BLEND(x) (((unsigned)(x) & 0x1) << 29) +#define G_028780_SEPARATE_ALPHA_BLEND(x) (((x) >> 29) & 0x1) +#define C_028780_SEPARATE_ALPHA_BLEND 0xDFFFFFFF +#define S_028780_ENABLE(x) (((unsigned)(x) & 0x1) << 30) +#define G_028780_ENABLE(x) (((x) >> 30) & 0x1) +#define C_028780_ENABLE 0xBFFFFFFF +#define S_028780_DISABLE_ROP3(x) (((unsigned)(x) & 0x1) << 31) +#define G_028780_DISABLE_ROP3(x) (((x) >> 31) & 0x1) +#define C_028780_DISABLE_ROP3 0x7FFFFFFF +#define R_028784_CB_BLEND1_CONTROL 0x028784 +#define R_028788_CB_BLEND2_CONTROL 0x028788 +#define R_02878C_CB_BLEND3_CONTROL 0x02878C +#define R_028790_CB_BLEND4_CONTROL 0x028790 +#define R_028794_CB_BLEND5_CONTROL 0x028794 +#define R_028798_CB_BLEND6_CONTROL 0x028798 +#define R_02879C_CB_BLEND7_CONTROL 0x02879C +#define R_0287CC_CS_COPY_STATE 0x0287CC +#define S_0287CC_SRC_STATE_ID(x) (((unsigned)(x) & 0x07) << 0) +#define G_0287CC_SRC_STATE_ID(x) (((x) >> 0) & 0x07) +#define C_0287CC_SRC_STATE_ID 0xFFFFFFF8 +#define R_0287D4_PA_CL_POINT_X_RAD 0x0287D4 +#define R_0287D8_PA_CL_POINT_Y_RAD 0x0287D8 +#define R_0287DC_PA_CL_POINT_SIZE 0x0287DC +#define R_0287E0_PA_CL_POINT_CULL_RAD 0x0287E0 +#define R_0287E4_VGT_DMA_BASE_HI 0x0287E4 +#define S_0287E4_BASE_ADDR(x) (((unsigned)(x) & 0xFF) << 0) +#define G_0287E4_BASE_ADDR(x) (((x) >> 0) & 0xFF) +#define C_0287E4_BASE_ADDR 0xFFFFFF00 +#define R_0287E8_VGT_DMA_BASE 0x0287E8 +#define R_0287F0_VGT_DRAW_INITIATOR 0x0287F0 +#define S_0287F0_SOURCE_SELECT(x) (((unsigned)(x) & 0x03) << 0) +#define G_0287F0_SOURCE_SELECT(x) (((x) >> 0) & 0x03) +#define C_0287F0_SOURCE_SELECT 0xFFFFFFFC +#define V_0287F0_DI_SRC_SEL_DMA 0x00 +#define V_0287F0_DI_SRC_SEL_IMMEDIATE 0x01 /* not on CIK */ +#define V_0287F0_DI_SRC_SEL_AUTO_INDEX 0x02 +#define V_0287F0_DI_SRC_SEL_RESERVED 0x03 +#define S_0287F0_MAJOR_MODE(x) (((unsigned)(x) & 0x03) << 2) +#define G_0287F0_MAJOR_MODE(x) (((x) >> 2) & 0x03) +#define C_0287F0_MAJOR_MODE 0xFFFFFFF3 +#define V_0287F0_DI_MAJOR_MODE_0 0x00 +#define V_0287F0_DI_MAJOR_MODE_1 0x01 +#define S_0287F0_NOT_EOP(x) (((unsigned)(x) & 0x1) << 5) +#define G_0287F0_NOT_EOP(x) (((x) >> 5) & 0x1) +#define C_0287F0_NOT_EOP 0xFFFFFFDF +#define S_0287F0_USE_OPAQUE(x) (((unsigned)(x) & 0x1) << 6) +#define G_0287F0_USE_OPAQUE(x) (((x) >> 6) & 0x1) +#define C_0287F0_USE_OPAQUE 0xFFFFFFBF +#define R_0287F4_VGT_IMMED_DATA 0x0287F4 /* not on CIK */ +#define R_0287F8_VGT_EVENT_ADDRESS_REG 0x0287F8 +#define S_0287F8_ADDRESS_LOW(x) (((unsigned)(x) & 0xFFFFFFF) << 0) +#define G_0287F8_ADDRESS_LOW(x) (((x) >> 0) & 0xFFFFFFF) +#define C_0287F8_ADDRESS_LOW 0xF0000000 +#define R_028800_DB_DEPTH_CONTROL 0x028800 +#define S_028800_STENCIL_ENABLE(x) (((unsigned)(x) & 0x1) << 0) +#define G_028800_STENCIL_ENABLE(x) (((x) >> 0) & 0x1) +#define C_028800_STENCIL_ENABLE 0xFFFFFFFE +#define S_028800_Z_ENABLE(x) (((unsigned)(x) & 0x1) << 1) +#define G_028800_Z_ENABLE(x) (((x) >> 1) & 0x1) +#define C_028800_Z_ENABLE 0xFFFFFFFD +#define S_028800_Z_WRITE_ENABLE(x) (((unsigned)(x) & 0x1) << 2) +#define G_028800_Z_WRITE_ENABLE(x) (((x) >> 2) & 0x1) +#define C_028800_Z_WRITE_ENABLE 0xFFFFFFFB +#define S_028800_DEPTH_BOUNDS_ENABLE(x) (((unsigned)(x) & 0x1) << 3) +#define G_028800_DEPTH_BOUNDS_ENABLE(x) (((x) >> 3) & 0x1) +#define C_028800_DEPTH_BOUNDS_ENABLE 0xFFFFFFF7 +#define S_028800_ZFUNC(x) (((unsigned)(x) & 0x07) << 4) +#define G_028800_ZFUNC(x) (((x) >> 4) & 0x07) +#define C_028800_ZFUNC 0xFFFFFF8F +#define V_028800_FRAG_NEVER 0x00 +#define V_028800_FRAG_LESS 0x01 +#define V_028800_FRAG_EQUAL 0x02 +#define V_028800_FRAG_LEQUAL 0x03 +#define V_028800_FRAG_GREATER 0x04 +#define V_028800_FRAG_NOTEQUAL 0x05 +#define V_028800_FRAG_GEQUAL 0x06 +#define V_028800_FRAG_ALWAYS 0x07 +#define S_028800_BACKFACE_ENABLE(x) (((unsigned)(x) & 0x1) << 7) +#define G_028800_BACKFACE_ENABLE(x) (((x) >> 7) & 0x1) +#define C_028800_BACKFACE_ENABLE 0xFFFFFF7F +#define S_028800_STENCILFUNC(x) (((unsigned)(x) & 0x07) << 8) +#define G_028800_STENCILFUNC(x) (((x) >> 8) & 0x07) +#define C_028800_STENCILFUNC 0xFFFFF8FF +#define V_028800_REF_NEVER 0x00 +#define V_028800_REF_LESS 0x01 +#define V_028800_REF_EQUAL 0x02 +#define V_028800_REF_LEQUAL 0x03 +#define V_028800_REF_GREATER 0x04 +#define V_028800_REF_NOTEQUAL 0x05 +#define V_028800_REF_GEQUAL 0x06 +#define V_028800_REF_ALWAYS 0x07 +#define S_028800_STENCILFUNC_BF(x) (((unsigned)(x) & 0x07) << 20) +#define G_028800_STENCILFUNC_BF(x) (((x) >> 20) & 0x07) +#define C_028800_STENCILFUNC_BF 0xFF8FFFFF +#define V_028800_REF_NEVER 0x00 +#define V_028800_REF_LESS 0x01 +#define V_028800_REF_EQUAL 0x02 +#define V_028800_REF_LEQUAL 0x03 +#define V_028800_REF_GREATER 0x04 +#define V_028800_REF_NOTEQUAL 0x05 +#define V_028800_REF_GEQUAL 0x06 +#define V_028800_REF_ALWAYS 0x07 +#define S_028800_ENABLE_COLOR_WRITES_ON_DEPTH_FAIL(x) (((unsigned)(x) & 0x1) << 30) +#define G_028800_ENABLE_COLOR_WRITES_ON_DEPTH_FAIL(x) (((x) >> 30) & 0x1) +#define C_028800_ENABLE_COLOR_WRITES_ON_DEPTH_FAIL 0xBFFFFFFF +#define S_028800_DISABLE_COLOR_WRITES_ON_DEPTH_PASS(x) (((unsigned)(x) & 0x1) << 31) +#define G_028800_DISABLE_COLOR_WRITES_ON_DEPTH_PASS(x) (((x) >> 31) & 0x1) +#define C_028800_DISABLE_COLOR_WRITES_ON_DEPTH_PASS 0x7FFFFFFF +#define R_028804_DB_EQAA 0x028804 +#define S_028804_MAX_ANCHOR_SAMPLES(x) (((unsigned)(x) & 0x7) << 0) +#define G_028804_MAX_ANCHOR_SAMPLES(x) (((x) >> 0) & 0x07) +#define C_028804_MAX_ANCHOR_SAMPLES 0xFFFFFFF8 +#define S_028804_PS_ITER_SAMPLES(x) (((unsigned)(x) & 0x7) << 4) +#define G_028804_PS_ITER_SAMPLES(x) (((x) >> 4) & 0x07) +#define C_028804_PS_ITER_SAMPLES 0xFFFFFF8F +#define S_028804_MASK_EXPORT_NUM_SAMPLES(x) (((unsigned)(x) & 0x7) << 8) +#define G_028804_MASK_EXPORT_NUM_SAMPLES(x) (((x) >> 8) & 0x07) +#define C_028804_MASK_EXPORT_NUM_SAMPLES 0xFFFFF8FF +#define S_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((unsigned)(x) & 0x7) << 12) +#define G_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((x) >> 12) & 0x07) +#define C_028804_ALPHA_TO_MASK_NUM_SAMPLES 0xFFFF8FFF +#define S_028804_HIGH_QUALITY_INTERSECTIONS(x) (((unsigned)(x) & 0x1) << 16) +#define G_028804_HIGH_QUALITY_INTERSECTIONS(x) (((x) >> 16) & 0x1) +#define C_028804_HIGH_QUALITY_INTERSECTIONS 0xFFFEFFFF +#define S_028804_INCOHERENT_EQAA_READS(x) (((unsigned)(x) & 0x1) << 17) +#define G_028804_INCOHERENT_EQAA_READS(x) (((x) >> 17) & 0x1) +#define C_028804_INCOHERENT_EQAA_READS 0xFFFDFFFF +#define S_028804_INTERPOLATE_COMP_Z(x) (((unsigned)(x) & 0x1) << 18) +#define G_028804_INTERPOLATE_COMP_Z(x) (((x) >> 18) & 0x1) +#define C_028804_INTERPOLATE_COMP_Z 0xFFFBFFFF +#define S_028804_INTERPOLATE_SRC_Z(x) (((unsigned)(x) & 0x1) << 19) +#define G_028804_INTERPOLATE_SRC_Z(x) (((x) >> 19) & 0x1) +#define C_028804_INTERPOLATE_SRC_Z 0xFFF7FFFF +#define S_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((unsigned)(x) & 0x1) << 20) +#define G_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((x) >> 20) & 0x1) +#define C_028804_STATIC_ANCHOR_ASSOCIATIONS 0xFFEFFFFF +#define S_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((unsigned)(x) & 0x1) << 21) +#define G_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((x) >> 21) & 0x1) +#define C_028804_ALPHA_TO_MASK_EQAA_DISABLE 0xFFDFFFFF +#define S_028804_OVERRASTERIZATION_AMOUNT(x) (((unsigned)(x) & 0x07) << 24) +#define G_028804_OVERRASTERIZATION_AMOUNT(x) (((x) >> 24) & 0x07) +#define C_028804_OVERRASTERIZATION_AMOUNT 0xF8FFFFFF +#define S_028804_ENABLE_POSTZ_OVERRASTERIZATION(x) (((unsigned)(x) & 0x1) << 27) +#define G_028804_ENABLE_POSTZ_OVERRASTERIZATION(x) (((x) >> 27) & 0x1) +#define C_028804_ENABLE_POSTZ_OVERRASTERIZATION 0xF7FFFFFF +#define R_028808_CB_COLOR_CONTROL 0x028808 +#define S_028808_DISABLE_DUAL_QUAD(x) (((unsigned)(x) & 0x1) << 0) +#define G_028808_DISABLE_DUAL_QUAD(x) (((x) >> 0) & 0x1) +#define C_028808_DISABLE_DUAL_QUAD 0xFFFFFFFE +#define S_028808_DEGAMMA_ENABLE(x) (((unsigned)(x) & 0x1) << 3) +#define G_028808_DEGAMMA_ENABLE(x) (((x) >> 3) & 0x1) +#define C_028808_DEGAMMA_ENABLE 0xFFFFFFF7 +#define S_028808_MODE(x) (((unsigned)(x) & 0x07) << 4) +#define G_028808_MODE(x) (((x) >> 4) & 0x07) +#define C_028808_MODE 0xFFFFFF8F +#define V_028808_CB_DISABLE 0x00 +#define V_028808_CB_NORMAL 0x01 +#define V_028808_CB_ELIMINATE_FAST_CLEAR 0x02 +#define V_028808_CB_RESOLVE 0x03 +#define V_028808_CB_FMASK_DECOMPRESS 0x05 +#define V_028808_CB_DCC_DECOMPRESS 0x06 +#define S_028808_ROP3(x) (((unsigned)(x) & 0xFF) << 16) +#define G_028808_ROP3(x) (((x) >> 16) & 0xFF) +#define C_028808_ROP3 0xFF00FFFF +#define V_028808_X_0X00 0x00 +#define V_028808_X_0X05 0x05 +#define V_028808_X_0X0A 0x0A +#define V_028808_X_0X0F 0x0F +#define V_028808_X_0X11 0x11 +#define V_028808_X_0X22 0x22 +#define V_028808_X_0X33 0x33 +#define V_028808_X_0X44 0x44 +#define V_028808_X_0X50 0x50 +#define V_028808_X_0X55 0x55 +#define V_028808_X_0X5A 0x5A +#define V_028808_X_0X5F 0x5F +#define V_028808_X_0X66 0x66 +#define V_028808_X_0X77 0x77 +#define V_028808_X_0X88 0x88 +#define V_028808_X_0X99 0x99 +#define V_028808_X_0XA0 0xA0 +#define V_028808_X_0XA5 0xA5 +#define V_028808_X_0XAA 0xAA +#define V_028808_X_0XAF 0xAF +#define V_028808_X_0XBB 0xBB +#define V_028808_X_0XCC 0xCC +#define V_028808_X_0XDD 0xDD +#define V_028808_X_0XEE 0xEE +#define V_028808_X_0XF0 0xF0 +#define V_028808_X_0XF5 0xF5 +#define V_028808_X_0XFA 0xFA +#define V_028808_X_0XFF 0xFF +#define R_02880C_DB_SHADER_CONTROL 0x02880C +#define S_02880C_Z_EXPORT_ENABLE(x) (((unsigned)(x) & 0x1) << 0) +#define G_02880C_Z_EXPORT_ENABLE(x) (((x) >> 0) & 0x1) +#define C_02880C_Z_EXPORT_ENABLE 0xFFFFFFFE +#define S_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE(x) (((unsigned)(x) & 0x1) << 1) +#define G_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE(x) (((x) >> 1) & 0x1) +#define C_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE 0xFFFFFFFD +#define S_02880C_STENCIL_OP_VAL_EXPORT_ENABLE(x) (((unsigned)(x) & 0x1) << 2) +#define G_02880C_STENCIL_OP_VAL_EXPORT_ENABLE(x) (((x) >> 2) & 0x1) +#define C_02880C_STENCIL_OP_VAL_EXPORT_ENABLE 0xFFFFFFFB +#define S_02880C_Z_ORDER(x) (((unsigned)(x) & 0x03) << 4) +#define G_02880C_Z_ORDER(x) (((x) >> 4) & 0x03) +#define C_02880C_Z_ORDER 0xFFFFFFCF +#define V_02880C_LATE_Z 0x00 +#define V_02880C_EARLY_Z_THEN_LATE_Z 0x01 +#define V_02880C_RE_Z 0x02 +#define V_02880C_EARLY_Z_THEN_RE_Z 0x03 +#define S_02880C_KILL_ENABLE(x) (((unsigned)(x) & 0x1) << 6) +#define G_02880C_KILL_ENABLE(x) (((x) >> 6) & 0x1) +#define C_02880C_KILL_ENABLE 0xFFFFFFBF +#define S_02880C_COVERAGE_TO_MASK_ENABLE(x) (((unsigned)(x) & 0x1) << 7) +#define G_02880C_COVERAGE_TO_MASK_ENABLE(x) (((x) >> 7) & 0x1) +#define C_02880C_COVERAGE_TO_MASK_ENABLE 0xFFFFFF7F +#define S_02880C_MASK_EXPORT_ENABLE(x) (((unsigned)(x) & 0x1) << 8) +#define G_02880C_MASK_EXPORT_ENABLE(x) (((x) >> 8) & 0x1) +#define C_02880C_MASK_EXPORT_ENABLE 0xFFFFFEFF +#define S_02880C_EXEC_ON_HIER_FAIL(x) (((unsigned)(x) & 0x1) << 9) +#define G_02880C_EXEC_ON_HIER_FAIL(x) (((x) >> 9) & 0x1) +#define C_02880C_EXEC_ON_HIER_FAIL 0xFFFFFDFF +#define S_02880C_EXEC_ON_NOOP(x) (((unsigned)(x) & 0x1) << 10) +#define G_02880C_EXEC_ON_NOOP(x) (((x) >> 10) & 0x1) +#define C_02880C_EXEC_ON_NOOP 0xFFFFFBFF +#define S_02880C_ALPHA_TO_MASK_DISABLE(x) (((unsigned)(x) & 0x1) << 11) +#define G_02880C_ALPHA_TO_MASK_DISABLE(x) (((x) >> 11) & 0x1) +#define C_02880C_ALPHA_TO_MASK_DISABLE 0xFFFFF7FF +#define S_02880C_DEPTH_BEFORE_SHADER(x) (((unsigned)(x) & 0x1) << 12) +#define G_02880C_DEPTH_BEFORE_SHADER(x) (((x) >> 12) & 0x1) +#define C_02880C_DEPTH_BEFORE_SHADER 0xFFFFEFFF +/* CIK */ +#define S_02880C_CONSERVATIVE_Z_EXPORT(x) (((unsigned)(x) & 0x03) << 13) +#define G_02880C_CONSERVATIVE_Z_EXPORT(x) (((x) >> 13) & 0x03) +#define C_02880C_CONSERVATIVE_Z_EXPORT 0xFFFF9FFF +#define V_02880C_EXPORT_ANY_Z 0 +#define V_02880C_EXPORT_LESS_THAN_Z 1 +#define V_02880C_EXPORT_GREATER_THAN_Z 2 +#define V_02880C_EXPORT_RESERVED 3 +/* */ +/* Stoney */ +#define S_02880C_DUAL_QUAD_DISABLE(x) (((unsigned)(x) & 0x1) << 15) +#define G_02880C_DUAL_QUAD_DISABLE(x) (((x) >> 15) & 0x1) +#define C_02880C_DUAL_QUAD_DISABLE 0xFFFF7FFF +/* */ +#define R_028810_PA_CL_CLIP_CNTL 0x028810 +#define S_028810_UCP_ENA_0(x) (((unsigned)(x) & 0x1) << 0) +#define G_028810_UCP_ENA_0(x) (((x) >> 0) & 0x1) +#define C_028810_UCP_ENA_0 0xFFFFFFFE +#define S_028810_UCP_ENA_1(x) (((unsigned)(x) & 0x1) << 1) +#define G_028810_UCP_ENA_1(x) (((x) >> 1) & 0x1) +#define C_028810_UCP_ENA_1 0xFFFFFFFD +#define S_028810_UCP_ENA_2(x) (((unsigned)(x) & 0x1) << 2) +#define G_028810_UCP_ENA_2(x) (((x) >> 2) & 0x1) +#define C_028810_UCP_ENA_2 0xFFFFFFFB +#define S_028810_UCP_ENA_3(x) (((unsigned)(x) & 0x1) << 3) +#define G_028810_UCP_ENA_3(x) (((x) >> 3) & 0x1) +#define C_028810_UCP_ENA_3 0xFFFFFFF7 +#define S_028810_UCP_ENA_4(x) (((unsigned)(x) & 0x1) << 4) +#define G_028810_UCP_ENA_4(x) (((x) >> 4) & 0x1) +#define C_028810_UCP_ENA_4 0xFFFFFFEF +#define S_028810_UCP_ENA_5(x) (((unsigned)(x) & 0x1) << 5) +#define G_028810_UCP_ENA_5(x) (((x) >> 5) & 0x1) +#define C_028810_UCP_ENA_5 0xFFFFFFDF +#define S_028810_PS_UCP_Y_SCALE_NEG(x) (((unsigned)(x) & 0x1) << 13) +#define G_028810_PS_UCP_Y_SCALE_NEG(x) (((x) >> 13) & 0x1) +#define C_028810_PS_UCP_Y_SCALE_NEG 0xFFFFDFFF +#define S_028810_PS_UCP_MODE(x) (((unsigned)(x) & 0x03) << 14) +#define G_028810_PS_UCP_MODE(x) (((x) >> 14) & 0x03) +#define C_028810_PS_UCP_MODE 0xFFFF3FFF +#define S_028810_CLIP_DISABLE(x) (((unsigned)(x) & 0x1) << 16) +#define G_028810_CLIP_DISABLE(x) (((x) >> 16) & 0x1) +#define C_028810_CLIP_DISABLE 0xFFFEFFFF +#define S_028810_UCP_CULL_ONLY_ENA(x) (((unsigned)(x) & 0x1) << 17) +#define G_028810_UCP_CULL_ONLY_ENA(x) (((x) >> 17) & 0x1) +#define C_028810_UCP_CULL_ONLY_ENA 0xFFFDFFFF +#define S_028810_BOUNDARY_EDGE_FLAG_ENA(x) (((unsigned)(x) & 0x1) << 18) +#define G_028810_BOUNDARY_EDGE_FLAG_ENA(x) (((x) >> 18) & 0x1) +#define C_028810_BOUNDARY_EDGE_FLAG_ENA 0xFFFBFFFF +#define S_028810_DX_CLIP_SPACE_DEF(x) (((unsigned)(x) & 0x1) << 19) +#define G_028810_DX_CLIP_SPACE_DEF(x) (((x) >> 19) & 0x1) +#define C_028810_DX_CLIP_SPACE_DEF 0xFFF7FFFF +#define S_028810_DIS_CLIP_ERR_DETECT(x) (((unsigned)(x) & 0x1) << 20) +#define G_028810_DIS_CLIP_ERR_DETECT(x) (((x) >> 20) & 0x1) +#define C_028810_DIS_CLIP_ERR_DETECT 0xFFEFFFFF +#define S_028810_VTX_KILL_OR(x) (((unsigned)(x) & 0x1) << 21) +#define G_028810_VTX_KILL_OR(x) (((x) >> 21) & 0x1) +#define C_028810_VTX_KILL_OR 0xFFDFFFFF +#define S_028810_DX_RASTERIZATION_KILL(x) (((unsigned)(x) & 0x1) << 22) +#define G_028810_DX_RASTERIZATION_KILL(x) (((x) >> 22) & 0x1) +#define C_028810_DX_RASTERIZATION_KILL 0xFFBFFFFF +#define S_028810_DX_LINEAR_ATTR_CLIP_ENA(x) (((unsigned)(x) & 0x1) << 24) +#define G_028810_DX_LINEAR_ATTR_CLIP_ENA(x) (((x) >> 24) & 0x1) +#define C_028810_DX_LINEAR_ATTR_CLIP_ENA 0xFEFFFFFF +#define S_028810_VTE_VPORT_PROVOKE_DISABLE(x) (((unsigned)(x) & 0x1) << 25) +#define G_028810_VTE_VPORT_PROVOKE_DISABLE(x) (((x) >> 25) & 0x1) +#define C_028810_VTE_VPORT_PROVOKE_DISABLE 0xFDFFFFFF +#define S_028810_ZCLIP_NEAR_DISABLE(x) (((unsigned)(x) & 0x1) << 26) +#define G_028810_ZCLIP_NEAR_DISABLE(x) (((x) >> 26) & 0x1) +#define C_028810_ZCLIP_NEAR_DISABLE 0xFBFFFFFF +#define S_028810_ZCLIP_FAR_DISABLE(x) (((unsigned)(x) & 0x1) << 27) +#define G_028810_ZCLIP_FAR_DISABLE(x) (((x) >> 27) & 0x1) +#define C_028810_ZCLIP_FAR_DISABLE 0xF7FFFFFF +#define R_028814_PA_SU_SC_MODE_CNTL 0x028814 +#define S_028814_CULL_FRONT(x) (((unsigned)(x) & 0x1) << 0) +#define G_028814_CULL_FRONT(x) (((x) >> 0) & 0x1) +#define C_028814_CULL_FRONT 0xFFFFFFFE +#define S_028814_CULL_BACK(x) (((unsigned)(x) & 0x1) << 1) +#define G_028814_CULL_BACK(x) (((x) >> 1) & 0x1) +#define C_028814_CULL_BACK 0xFFFFFFFD +#define S_028814_FACE(x) (((unsigned)(x) & 0x1) << 2) +#define G_028814_FACE(x) (((x) >> 2) & 0x1) +#define C_028814_FACE 0xFFFFFFFB +#define S_028814_POLY_MODE(x) (((unsigned)(x) & 0x03) << 3) +#define G_028814_POLY_MODE(x) (((x) >> 3) & 0x03) +#define C_028814_POLY_MODE 0xFFFFFFE7 +#define V_028814_X_DISABLE_POLY_MODE 0x00 +#define V_028814_X_DUAL_MODE 0x01 +#define S_028814_POLYMODE_FRONT_PTYPE(x) (((unsigned)(x) & 0x07) << 5) +#define G_028814_POLYMODE_FRONT_PTYPE(x) (((x) >> 5) & 0x07) +#define C_028814_POLYMODE_FRONT_PTYPE 0xFFFFFF1F +#define V_028814_X_DRAW_POINTS 0x00 +#define V_028814_X_DRAW_LINES 0x01 +#define V_028814_X_DRAW_TRIANGLES 0x02 +#define S_028814_POLYMODE_BACK_PTYPE(x) (((unsigned)(x) & 0x07) << 8) +#define G_028814_POLYMODE_BACK_PTYPE(x) (((x) >> 8) & 0x07) +#define C_028814_POLYMODE_BACK_PTYPE 0xFFFFF8FF +#define V_028814_X_DRAW_POINTS 0x00 +#define V_028814_X_DRAW_LINES 0x01 +#define V_028814_X_DRAW_TRIANGLES 0x02 +#define S_028814_POLY_OFFSET_FRONT_ENABLE(x) (((unsigned)(x) & 0x1) << 11) +#define G_028814_POLY_OFFSET_FRONT_ENABLE(x) (((x) >> 11) & 0x1) +#define C_028814_POLY_OFFSET_FRONT_ENABLE 0xFFFFF7FF +#define S_028814_POLY_OFFSET_BACK_ENABLE(x) (((unsigned)(x) & 0x1) << 12) +#define G_028814_POLY_OFFSET_BACK_ENABLE(x) (((x) >> 12) & 0x1) +#define C_028814_POLY_OFFSET_BACK_ENABLE 0xFFFFEFFF +#define S_028814_POLY_OFFSET_PARA_ENABLE(x) (((unsigned)(x) & 0x1) << 13) +#define G_028814_POLY_OFFSET_PARA_ENABLE(x) (((x) >> 13) & 0x1) +#define C_028814_POLY_OFFSET_PARA_ENABLE 0xFFFFDFFF +#define S_028814_VTX_WINDOW_OFFSET_ENABLE(x) (((unsigned)(x) & 0x1) << 16) +#define G_028814_VTX_WINDOW_OFFSET_ENABLE(x) (((x) >> 16) & 0x1) +#define C_028814_VTX_WINDOW_OFFSET_ENABLE 0xFFFEFFFF +#define S_028814_PROVOKING_VTX_LAST(x) (((unsigned)(x) & 0x1) << 19) +#define G_028814_PROVOKING_VTX_LAST(x) (((x) >> 19) & 0x1) +#define C_028814_PROVOKING_VTX_LAST 0xFFF7FFFF +#define S_028814_PERSP_CORR_DIS(x) (((unsigned)(x) & 0x1) << 20) +#define G_028814_PERSP_CORR_DIS(x) (((x) >> 20) & 0x1) +#define C_028814_PERSP_CORR_DIS 0xFFEFFFFF +#define S_028814_MULTI_PRIM_IB_ENA(x) (((unsigned)(x) & 0x1) << 21) +#define G_028814_MULTI_PRIM_IB_ENA(x) (((x) >> 21) & 0x1) +#define C_028814_MULTI_PRIM_IB_ENA 0xFFDFFFFF +#define R_028818_PA_CL_VTE_CNTL 0x028818 +#define S_028818_VPORT_X_SCALE_ENA(x) (((unsigned)(x) & 0x1) << 0) +#define G_028818_VPORT_X_SCALE_ENA(x) (((x) >> 0) & 0x1) +#define C_028818_VPORT_X_SCALE_ENA 0xFFFFFFFE +#define S_028818_VPORT_X_OFFSET_ENA(x) (((unsigned)(x) & 0x1) << 1) +#define G_028818_VPORT_X_OFFSET_ENA(x) (((x) >> 1) & 0x1) +#define C_028818_VPORT_X_OFFSET_ENA 0xFFFFFFFD +#define S_028818_VPORT_Y_SCALE_ENA(x) (((unsigned)(x) & 0x1) << 2) +#define G_028818_VPORT_Y_SCALE_ENA(x) (((x) >> 2) & 0x1) +#define C_028818_VPORT_Y_SCALE_ENA 0xFFFFFFFB +#define S_028818_VPORT_Y_OFFSET_ENA(x) (((unsigned)(x) & 0x1) << 3) +#define G_028818_VPORT_Y_OFFSET_ENA(x) (((x) >> 3) & 0x1) +#define C_028818_VPORT_Y_OFFSET_ENA 0xFFFFFFF7 +#define S_028818_VPORT_Z_SCALE_ENA(x) (((unsigned)(x) & 0x1) << 4) +#define G_028818_VPORT_Z_SCALE_ENA(x) (((x) >> 4) & 0x1) +#define C_028818_VPORT_Z_SCALE_ENA 0xFFFFFFEF +#define S_028818_VPORT_Z_OFFSET_ENA(x) (((unsigned)(x) & 0x1) << 5) +#define G_028818_VPORT_Z_OFFSET_ENA(x) (((x) >> 5) & 0x1) +#define C_028818_VPORT_Z_OFFSET_ENA 0xFFFFFFDF +#define S_028818_VTX_XY_FMT(x) (((unsigned)(x) & 0x1) << 8) +#define G_028818_VTX_XY_FMT(x) (((x) >> 8) & 0x1) +#define C_028818_VTX_XY_FMT 0xFFFFFEFF +#define S_028818_VTX_Z_FMT(x) (((unsigned)(x) & 0x1) << 9) +#define G_028818_VTX_Z_FMT(x) (((x) >> 9) & 0x1) +#define C_028818_VTX_Z_FMT 0xFFFFFDFF +#define S_028818_VTX_W0_FMT(x) (((unsigned)(x) & 0x1) << 10) +#define G_028818_VTX_W0_FMT(x) (((x) >> 10) & 0x1) +#define C_028818_VTX_W0_FMT 0xFFFFFBFF +#define R_02881C_PA_CL_VS_OUT_CNTL 0x02881C +#define S_02881C_CLIP_DIST_ENA_0(x) (((unsigned)(x) & 0x1) << 0) +#define G_02881C_CLIP_DIST_ENA_0(x) (((x) >> 0) & 0x1) +#define C_02881C_CLIP_DIST_ENA_0 0xFFFFFFFE +#define S_02881C_CLIP_DIST_ENA_1(x) (((unsigned)(x) & 0x1) << 1) +#define G_02881C_CLIP_DIST_ENA_1(x) (((x) >> 1) & 0x1) +#define C_02881C_CLIP_DIST_ENA_1 0xFFFFFFFD +#define S_02881C_CLIP_DIST_ENA_2(x) (((unsigned)(x) & 0x1) << 2) +#define G_02881C_CLIP_DIST_ENA_2(x) (((x) >> 2) & 0x1) +#define C_02881C_CLIP_DIST_ENA_2 0xFFFFFFFB +#define S_02881C_CLIP_DIST_ENA_3(x) (((unsigned)(x) & 0x1) << 3) +#define G_02881C_CLIP_DIST_ENA_3(x) (((x) >> 3) & 0x1) +#define C_02881C_CLIP_DIST_ENA_3 0xFFFFFFF7 +#define S_02881C_CLIP_DIST_ENA_4(x) (((unsigned)(x) & 0x1) << 4) +#define G_02881C_CLIP_DIST_ENA_4(x) (((x) >> 4) & 0x1) +#define C_02881C_CLIP_DIST_ENA_4 0xFFFFFFEF +#define S_02881C_CLIP_DIST_ENA_5(x) (((unsigned)(x) & 0x1) << 5) +#define G_02881C_CLIP_DIST_ENA_5(x) (((x) >> 5) & 0x1) +#define C_02881C_CLIP_DIST_ENA_5 0xFFFFFFDF +#define S_02881C_CLIP_DIST_ENA_6(x) (((unsigned)(x) & 0x1) << 6) +#define G_02881C_CLIP_DIST_ENA_6(x) (((x) >> 6) & 0x1) +#define C_02881C_CLIP_DIST_ENA_6 0xFFFFFFBF +#define S_02881C_CLIP_DIST_ENA_7(x) (((unsigned)(x) & 0x1) << 7) +#define G_02881C_CLIP_DIST_ENA_7(x) (((x) >> 7) & 0x1) +#define C_02881C_CLIP_DIST_ENA_7 0xFFFFFF7F +#define S_02881C_CULL_DIST_ENA_0(x) (((unsigned)(x) & 0x1) << 8) +#define G_02881C_CULL_DIST_ENA_0(x) (((x) >> 8) & 0x1) +#define C_02881C_CULL_DIST_ENA_0 0xFFFFFEFF +#define S_02881C_CULL_DIST_ENA_1(x) (((unsigned)(x) & 0x1) << 9) +#define G_02881C_CULL_DIST_ENA_1(x) (((x) >> 9) & 0x1) +#define C_02881C_CULL_DIST_ENA_1 0xFFFFFDFF +#define S_02881C_CULL_DIST_ENA_2(x) (((unsigned)(x) & 0x1) << 10) +#define G_02881C_CULL_DIST_ENA_2(x) (((x) >> 10) & 0x1) +#define C_02881C_CULL_DIST_ENA_2 0xFFFFFBFF +#define S_02881C_CULL_DIST_ENA_3(x) (((unsigned)(x) & 0x1) << 11) +#define G_02881C_CULL_DIST_ENA_3(x) (((x) >> 11) & 0x1) +#define C_02881C_CULL_DIST_ENA_3 0xFFFFF7FF +#define S_02881C_CULL_DIST_ENA_4(x) (((unsigned)(x) & 0x1) << 12) +#define G_02881C_CULL_DIST_ENA_4(x) (((x) >> 12) & 0x1) +#define C_02881C_CULL_DIST_ENA_4 0xFFFFEFFF +#define S_02881C_CULL_DIST_ENA_5(x) (((unsigned)(x) & 0x1) << 13) +#define G_02881C_CULL_DIST_ENA_5(x) (((x) >> 13) & 0x1) +#define C_02881C_CULL_DIST_ENA_5 0xFFFFDFFF +#define S_02881C_CULL_DIST_ENA_6(x) (((unsigned)(x) & 0x1) << 14) +#define G_02881C_CULL_DIST_ENA_6(x) (((x) >> 14) & 0x1) +#define C_02881C_CULL_DIST_ENA_6 0xFFFFBFFF +#define S_02881C_CULL_DIST_ENA_7(x) (((unsigned)(x) & 0x1) << 15) +#define G_02881C_CULL_DIST_ENA_7(x) (((x) >> 15) & 0x1) +#define C_02881C_CULL_DIST_ENA_7 0xFFFF7FFF +#define S_02881C_USE_VTX_POINT_SIZE(x) (((unsigned)(x) & 0x1) << 16) +#define G_02881C_USE_VTX_POINT_SIZE(x) (((x) >> 16) & 0x1) +#define C_02881C_USE_VTX_POINT_SIZE 0xFFFEFFFF +#define S_02881C_USE_VTX_EDGE_FLAG(x) (((unsigned)(x) & 0x1) << 17) +#define G_02881C_USE_VTX_EDGE_FLAG(x) (((x) >> 17) & 0x1) +#define C_02881C_USE_VTX_EDGE_FLAG 0xFFFDFFFF +#define S_02881C_USE_VTX_RENDER_TARGET_INDX(x) (((unsigned)(x) & 0x1) << 18) +#define G_02881C_USE_VTX_RENDER_TARGET_INDX(x) (((x) >> 18) & 0x1) +#define C_02881C_USE_VTX_RENDER_TARGET_INDX 0xFFFBFFFF +#define S_02881C_USE_VTX_VIEWPORT_INDX(x) (((unsigned)(x) & 0x1) << 19) +#define G_02881C_USE_VTX_VIEWPORT_INDX(x) (((x) >> 19) & 0x1) +#define C_02881C_USE_VTX_VIEWPORT_INDX 0xFFF7FFFF +#define S_02881C_USE_VTX_KILL_FLAG(x) (((unsigned)(x) & 0x1) << 20) +#define G_02881C_USE_VTX_KILL_FLAG(x) (((x) >> 20) & 0x1) +#define C_02881C_USE_VTX_KILL_FLAG 0xFFEFFFFF +#define S_02881C_VS_OUT_MISC_VEC_ENA(x) (((unsigned)(x) & 0x1) << 21) +#define G_02881C_VS_OUT_MISC_VEC_ENA(x) (((x) >> 21) & 0x1) +#define C_02881C_VS_OUT_MISC_VEC_ENA 0xFFDFFFFF +#define S_02881C_VS_OUT_CCDIST0_VEC_ENA(x) (((unsigned)(x) & 0x1) << 22) +#define G_02881C_VS_OUT_CCDIST0_VEC_ENA(x) (((x) >> 22) & 0x1) +#define C_02881C_VS_OUT_CCDIST0_VEC_ENA 0xFFBFFFFF +#define S_02881C_VS_OUT_CCDIST1_VEC_ENA(x) (((unsigned)(x) & 0x1) << 23) +#define G_02881C_VS_OUT_CCDIST1_VEC_ENA(x) (((x) >> 23) & 0x1) +#define C_02881C_VS_OUT_CCDIST1_VEC_ENA 0xFF7FFFFF +#define S_02881C_VS_OUT_MISC_SIDE_BUS_ENA(x) (((unsigned)(x) & 0x1) << 24) +#define G_02881C_VS_OUT_MISC_SIDE_BUS_ENA(x) (((x) >> 24) & 0x1) +#define C_02881C_VS_OUT_MISC_SIDE_BUS_ENA 0xFEFFFFFF +#define S_02881C_USE_VTX_GS_CUT_FLAG(x) (((unsigned)(x) & 0x1) << 25) +#define G_02881C_USE_VTX_GS_CUT_FLAG(x) (((x) >> 25) & 0x1) +#define C_02881C_USE_VTX_GS_CUT_FLAG 0xFDFFFFFF +/* VI */ +#define S_02881C_USE_VTX_LINE_WIDTH(x) (((unsigned)(x) & 0x1) << 26) +#define G_02881C_USE_VTX_LINE_WIDTH(x) (((x) >> 26) & 0x1) +#define C_02881C_USE_VTX_LINE_WIDTH 0xFBFFFFFF +/* */ +#define R_028820_PA_CL_NANINF_CNTL 0x028820 +#define S_028820_VTE_XY_INF_DISCARD(x) (((unsigned)(x) & 0x1) << 0) +#define G_028820_VTE_XY_INF_DISCARD(x) (((x) >> 0) & 0x1) +#define C_028820_VTE_XY_INF_DISCARD 0xFFFFFFFE +#define S_028820_VTE_Z_INF_DISCARD(x) (((unsigned)(x) & 0x1) << 1) +#define G_028820_VTE_Z_INF_DISCARD(x) (((x) >> 1) & 0x1) +#define C_028820_VTE_Z_INF_DISCARD 0xFFFFFFFD +#define S_028820_VTE_W_INF_DISCARD(x) (((unsigned)(x) & 0x1) << 2) +#define G_028820_VTE_W_INF_DISCARD(x) (((x) >> 2) & 0x1) +#define C_028820_VTE_W_INF_DISCARD 0xFFFFFFFB +#define S_028820_VTE_0XNANINF_IS_0(x) (((unsigned)(x) & 0x1) << 3) +#define G_028820_VTE_0XNANINF_IS_0(x) (((x) >> 3) & 0x1) +#define C_028820_VTE_0XNANINF_IS_0 0xFFFFFFF7 +#define S_028820_VTE_XY_NAN_RETAIN(x) (((unsigned)(x) & 0x1) << 4) +#define G_028820_VTE_XY_NAN_RETAIN(x) (((x) >> 4) & 0x1) +#define C_028820_VTE_XY_NAN_RETAIN 0xFFFFFFEF +#define S_028820_VTE_Z_NAN_RETAIN(x) (((unsigned)(x) & 0x1) << 5) +#define G_028820_VTE_Z_NAN_RETAIN(x) (((x) >> 5) & 0x1) +#define C_028820_VTE_Z_NAN_RETAIN 0xFFFFFFDF +#define S_028820_VTE_W_NAN_RETAIN(x) (((unsigned)(x) & 0x1) << 6) +#define G_028820_VTE_W_NAN_RETAIN(x) (((x) >> 6) & 0x1) +#define C_028820_VTE_W_NAN_RETAIN 0xFFFFFFBF +#define S_028820_VTE_W_RECIP_NAN_IS_0(x) (((unsigned)(x) & 0x1) << 7) +#define G_028820_VTE_W_RECIP_NAN_IS_0(x) (((x) >> 7) & 0x1) +#define C_028820_VTE_W_RECIP_NAN_IS_0 0xFFFFFF7F +#define S_028820_VS_XY_NAN_TO_INF(x) (((unsigned)(x) & 0x1) << 8) +#define G_028820_VS_XY_NAN_TO_INF(x) (((x) >> 8) & 0x1) +#define C_028820_VS_XY_NAN_TO_INF 0xFFFFFEFF +#define S_028820_VS_XY_INF_RETAIN(x) (((unsigned)(x) & 0x1) << 9) +#define G_028820_VS_XY_INF_RETAIN(x) (((x) >> 9) & 0x1) +#define C_028820_VS_XY_INF_RETAIN 0xFFFFFDFF +#define S_028820_VS_Z_NAN_TO_INF(x) (((unsigned)(x) & 0x1) << 10) +#define G_028820_VS_Z_NAN_TO_INF(x) (((x) >> 10) & 0x1) +#define C_028820_VS_Z_NAN_TO_INF 0xFFFFFBFF +#define S_028820_VS_Z_INF_RETAIN(x) (((unsigned)(x) & 0x1) << 11) +#define G_028820_VS_Z_INF_RETAIN(x) (((x) >> 11) & 0x1) +#define C_028820_VS_Z_INF_RETAIN 0xFFFFF7FF +#define S_028820_VS_W_NAN_TO_INF(x) (((unsigned)(x) & 0x1) << 12) +#define G_028820_VS_W_NAN_TO_INF(x) (((x) >> 12) & 0x1) +#define C_028820_VS_W_NAN_TO_INF 0xFFFFEFFF +#define S_028820_VS_W_INF_RETAIN(x) (((unsigned)(x) & 0x1) << 13) +#define G_028820_VS_W_INF_RETAIN(x) (((x) >> 13) & 0x1) +#define C_028820_VS_W_INF_RETAIN 0xFFFFDFFF +#define S_028820_VS_CLIP_DIST_INF_DISCARD(x) (((unsigned)(x) & 0x1) << 14) +#define G_028820_VS_CLIP_DIST_INF_DISCARD(x) (((x) >> 14) & 0x1) +#define C_028820_VS_CLIP_DIST_INF_DISCARD 0xFFFFBFFF +#define S_028820_VTE_NO_OUTPUT_NEG_0(x) (((unsigned)(x) & 0x1) << 20) +#define G_028820_VTE_NO_OUTPUT_NEG_0(x) (((x) >> 20) & 0x1) +#define C_028820_VTE_NO_OUTPUT_NEG_0 0xFFEFFFFF +#define R_028824_PA_SU_LINE_STIPPLE_CNTL 0x028824 +#define S_028824_LINE_STIPPLE_RESET(x) (((unsigned)(x) & 0x03) << 0) +#define G_028824_LINE_STIPPLE_RESET(x) (((x) >> 0) & 0x03) +#define C_028824_LINE_STIPPLE_RESET 0xFFFFFFFC +#define S_028824_EXPAND_FULL_LENGTH(x) (((unsigned)(x) & 0x1) << 2) +#define G_028824_EXPAND_FULL_LENGTH(x) (((x) >> 2) & 0x1) +#define C_028824_EXPAND_FULL_LENGTH 0xFFFFFFFB +#define S_028824_FRACTIONAL_ACCUM(x) (((unsigned)(x) & 0x1) << 3) +#define G_028824_FRACTIONAL_ACCUM(x) (((x) >> 3) & 0x1) +#define C_028824_FRACTIONAL_ACCUM 0xFFFFFFF7 +#define S_028824_DIAMOND_ADJUST(x) (((unsigned)(x) & 0x1) << 4) +#define G_028824_DIAMOND_ADJUST(x) (((x) >> 4) & 0x1) +#define C_028824_DIAMOND_ADJUST 0xFFFFFFEF +#define R_028828_PA_SU_LINE_STIPPLE_SCALE 0x028828 +#define R_02882C_PA_SU_PRIM_FILTER_CNTL 0x02882C +#define S_02882C_TRIANGLE_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 0) +#define G_02882C_TRIANGLE_FILTER_DISABLE(x) (((x) >> 0) & 0x1) +#define C_02882C_TRIANGLE_FILTER_DISABLE 0xFFFFFFFE +#define S_02882C_LINE_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 1) +#define G_02882C_LINE_FILTER_DISABLE(x) (((x) >> 1) & 0x1) +#define C_02882C_LINE_FILTER_DISABLE 0xFFFFFFFD +#define S_02882C_POINT_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 2) +#define G_02882C_POINT_FILTER_DISABLE(x) (((x) >> 2) & 0x1) +#define C_02882C_POINT_FILTER_DISABLE 0xFFFFFFFB +#define S_02882C_RECTANGLE_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 3) +#define G_02882C_RECTANGLE_FILTER_DISABLE(x) (((x) >> 3) & 0x1) +#define C_02882C_RECTANGLE_FILTER_DISABLE 0xFFFFFFF7 +#define S_02882C_TRIANGLE_EXPAND_ENA(x) (((unsigned)(x) & 0x1) << 4) +#define G_02882C_TRIANGLE_EXPAND_ENA(x) (((x) >> 4) & 0x1) +#define C_02882C_TRIANGLE_EXPAND_ENA 0xFFFFFFEF +#define S_02882C_LINE_EXPAND_ENA(x) (((unsigned)(x) & 0x1) << 5) +#define G_02882C_LINE_EXPAND_ENA(x) (((x) >> 5) & 0x1) +#define C_02882C_LINE_EXPAND_ENA 0xFFFFFFDF +#define S_02882C_POINT_EXPAND_ENA(x) (((unsigned)(x) & 0x1) << 6) +#define G_02882C_POINT_EXPAND_ENA(x) (((x) >> 6) & 0x1) +#define C_02882C_POINT_EXPAND_ENA 0xFFFFFFBF +#define S_02882C_RECTANGLE_EXPAND_ENA(x) (((unsigned)(x) & 0x1) << 7) +#define G_02882C_RECTANGLE_EXPAND_ENA(x) (((x) >> 7) & 0x1) +#define C_02882C_RECTANGLE_EXPAND_ENA 0xFFFFFF7F +#define S_02882C_PRIM_EXPAND_CONSTANT(x) (((unsigned)(x) & 0xFF) << 8) +#define G_02882C_PRIM_EXPAND_CONSTANT(x) (((x) >> 8) & 0xFF) +#define C_02882C_PRIM_EXPAND_CONSTANT 0xFFFF00FF +/* CIK */ +#define S_02882C_XMAX_RIGHT_EXCLUSION(x) (((unsigned)(x) & 0x1) << 30) +#define G_02882C_XMAX_RIGHT_EXCLUSION(x) (((x) >> 30) & 0x1) +#define C_02882C_XMAX_RIGHT_EXCLUSION 0xBFFFFFFF +#define S_02882C_YMAX_BOTTOM_EXCLUSION(x) (((unsigned)(x) & 0x1) << 31) +#define G_02882C_YMAX_BOTTOM_EXCLUSION(x) (((x) >> 31) & 0x1) +#define C_02882C_YMAX_BOTTOM_EXCLUSION 0x7FFFFFFF +/* */ +#define R_028830_PA_SU_SMALL_PRIM_FILTER_CNTL 0x028830 /* Polaris */ +#define S_028830_SMALL_PRIM_FILTER_ENABLE(x) (((x) & 0x1) << 0) +#define C_028830_SMALL_PRIM_FILTER_ENABLE 0xFFFFFFFE +#define S_028830_TRIANGLE_FILTER_DISABLE(x) (((x) & 0x1) << 1) +#define S_028830_LINE_FILTER_DISABLE(x) (((x) & 0x1) << 2) +#define S_028830_POINT_FILTER_DISABLE(x) (((x) & 0x1) << 3) +#define S_028830_RECTANGLE_FILTER_DISABLE(x) (((x) & 0x1) << 4) +#define R_028A00_PA_SU_POINT_SIZE 0x028A00 +#define S_028A00_HEIGHT(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_028A00_HEIGHT(x) (((x) >> 0) & 0xFFFF) +#define C_028A00_HEIGHT 0xFFFF0000 +#define S_028A00_WIDTH(x) (((unsigned)(x) & 0xFFFF) << 16) +#define G_028A00_WIDTH(x) (((x) >> 16) & 0xFFFF) +#define C_028A00_WIDTH 0x0000FFFF +#define R_028A04_PA_SU_POINT_MINMAX 0x028A04 +#define S_028A04_MIN_SIZE(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_028A04_MIN_SIZE(x) (((x) >> 0) & 0xFFFF) +#define C_028A04_MIN_SIZE 0xFFFF0000 +#define S_028A04_MAX_SIZE(x) (((unsigned)(x) & 0xFFFF) << 16) +#define G_028A04_MAX_SIZE(x) (((x) >> 16) & 0xFFFF) +#define C_028A04_MAX_SIZE 0x0000FFFF +#define R_028A08_PA_SU_LINE_CNTL 0x028A08 +#define S_028A08_WIDTH(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_028A08_WIDTH(x) (((x) >> 0) & 0xFFFF) +#define C_028A08_WIDTH 0xFFFF0000 +#define R_028A0C_PA_SC_LINE_STIPPLE 0x028A0C +#define S_028A0C_LINE_PATTERN(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_028A0C_LINE_PATTERN(x) (((x) >> 0) & 0xFFFF) +#define C_028A0C_LINE_PATTERN 0xFFFF0000 +#define S_028A0C_REPEAT_COUNT(x) (((unsigned)(x) & 0xFF) << 16) +#define G_028A0C_REPEAT_COUNT(x) (((x) >> 16) & 0xFF) +#define C_028A0C_REPEAT_COUNT 0xFF00FFFF +#define S_028A0C_PATTERN_BIT_ORDER(x) (((unsigned)(x) & 0x1) << 28) +#define G_028A0C_PATTERN_BIT_ORDER(x) (((x) >> 28) & 0x1) +#define C_028A0C_PATTERN_BIT_ORDER 0xEFFFFFFF +#define S_028A0C_AUTO_RESET_CNTL(x) (((unsigned)(x) & 0x03) << 29) +#define G_028A0C_AUTO_RESET_CNTL(x) (((x) >> 29) & 0x03) +#define C_028A0C_AUTO_RESET_CNTL 0x9FFFFFFF +#define R_028A10_VGT_OUTPUT_PATH_CNTL 0x028A10 +#define S_028A10_PATH_SELECT(x) (((unsigned)(x) & 0x07) << 0) +#define G_028A10_PATH_SELECT(x) (((x) >> 0) & 0x07) +#define C_028A10_PATH_SELECT 0xFFFFFFF8 +#define V_028A10_VGT_OUTPATH_VTX_REUSE 0x00 +#define V_028A10_VGT_OUTPATH_TESS_EN 0x01 +#define V_028A10_VGT_OUTPATH_PASSTHRU 0x02 +#define V_028A10_VGT_OUTPATH_GS_BLOCK 0x03 +#define V_028A10_VGT_OUTPATH_HS_BLOCK 0x04 +#define R_028A14_VGT_HOS_CNTL 0x028A14 +#define S_028A14_TESS_MODE(x) (((unsigned)(x) & 0x03) << 0) +#define G_028A14_TESS_MODE(x) (((x) >> 0) & 0x03) +#define C_028A14_TESS_MODE 0xFFFFFFFC +#define R_028A18_VGT_HOS_MAX_TESS_LEVEL 0x028A18 +#define R_028A1C_VGT_HOS_MIN_TESS_LEVEL 0x028A1C +#define R_028A20_VGT_HOS_REUSE_DEPTH 0x028A20 +#define S_028A20_REUSE_DEPTH(x) (((unsigned)(x) & 0xFF) << 0) +#define G_028A20_REUSE_DEPTH(x) (((x) >> 0) & 0xFF) +#define C_028A20_REUSE_DEPTH 0xFFFFFF00 +#define R_028A24_VGT_GROUP_PRIM_TYPE 0x028A24 +#define S_028A24_PRIM_TYPE(x) (((unsigned)(x) & 0x1F) << 0) +#define G_028A24_PRIM_TYPE(x) (((x) >> 0) & 0x1F) +#define C_028A24_PRIM_TYPE 0xFFFFFFE0 +#define V_028A24_VGT_GRP_3D_POINT 0x00 +#define V_028A24_VGT_GRP_3D_LINE 0x01 +#define V_028A24_VGT_GRP_3D_TRI 0x02 +#define V_028A24_VGT_GRP_3D_RECT 0x03 +#define V_028A24_VGT_GRP_3D_QUAD 0x04 +#define V_028A24_VGT_GRP_2D_COPY_RECT_V0 0x05 +#define V_028A24_VGT_GRP_2D_COPY_RECT_V1 0x06 +#define V_028A24_VGT_GRP_2D_COPY_RECT_V2 0x07 +#define V_028A24_VGT_GRP_2D_COPY_RECT_V3 0x08 +#define V_028A24_VGT_GRP_2D_FILL_RECT 0x09 +#define V_028A24_VGT_GRP_2D_LINE 0x0A +#define V_028A24_VGT_GRP_2D_TRI 0x0B +#define V_028A24_VGT_GRP_PRIM_INDEX_LINE 0x0C +#define V_028A24_VGT_GRP_PRIM_INDEX_TRI 0x0D +#define V_028A24_VGT_GRP_PRIM_INDEX_QUAD 0x0E +#define V_028A24_VGT_GRP_3D_LINE_ADJ 0x0F +#define V_028A24_VGT_GRP_3D_TRI_ADJ 0x10 +#define V_028A24_VGT_GRP_3D_PATCH 0x11 +#define S_028A24_RETAIN_ORDER(x) (((unsigned)(x) & 0x1) << 14) +#define G_028A24_RETAIN_ORDER(x) (((x) >> 14) & 0x1) +#define C_028A24_RETAIN_ORDER 0xFFFFBFFF +#define S_028A24_RETAIN_QUADS(x) (((unsigned)(x) & 0x1) << 15) +#define G_028A24_RETAIN_QUADS(x) (((x) >> 15) & 0x1) +#define C_028A24_RETAIN_QUADS 0xFFFF7FFF +#define S_028A24_PRIM_ORDER(x) (((unsigned)(x) & 0x07) << 16) +#define G_028A24_PRIM_ORDER(x) (((x) >> 16) & 0x07) +#define C_028A24_PRIM_ORDER 0xFFF8FFFF +#define V_028A24_VGT_GRP_LIST 0x00 +#define V_028A24_VGT_GRP_STRIP 0x01 +#define V_028A24_VGT_GRP_FAN 0x02 +#define V_028A24_VGT_GRP_LOOP 0x03 +#define V_028A24_VGT_GRP_POLYGON 0x04 +#define R_028A28_VGT_GROUP_FIRST_DECR 0x028A28 +#define S_028A28_FIRST_DECR(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028A28_FIRST_DECR(x) (((x) >> 0) & 0x0F) +#define C_028A28_FIRST_DECR 0xFFFFFFF0 +#define R_028A2C_VGT_GROUP_DECR 0x028A2C +#define S_028A2C_DECR(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028A2C_DECR(x) (((x) >> 0) & 0x0F) +#define C_028A2C_DECR 0xFFFFFFF0 +#define R_028A30_VGT_GROUP_VECT_0_CNTL 0x028A30 +#define S_028A30_COMP_X_EN(x) (((unsigned)(x) & 0x1) << 0) +#define G_028A30_COMP_X_EN(x) (((x) >> 0) & 0x1) +#define C_028A30_COMP_X_EN 0xFFFFFFFE +#define S_028A30_COMP_Y_EN(x) (((unsigned)(x) & 0x1) << 1) +#define G_028A30_COMP_Y_EN(x) (((x) >> 1) & 0x1) +#define C_028A30_COMP_Y_EN 0xFFFFFFFD +#define S_028A30_COMP_Z_EN(x) (((unsigned)(x) & 0x1) << 2) +#define G_028A30_COMP_Z_EN(x) (((x) >> 2) & 0x1) +#define C_028A30_COMP_Z_EN 0xFFFFFFFB +#define S_028A30_COMP_W_EN(x) (((unsigned)(x) & 0x1) << 3) +#define G_028A30_COMP_W_EN(x) (((x) >> 3) & 0x1) +#define C_028A30_COMP_W_EN 0xFFFFFFF7 +#define S_028A30_STRIDE(x) (((unsigned)(x) & 0xFF) << 8) +#define G_028A30_STRIDE(x) (((x) >> 8) & 0xFF) +#define C_028A30_STRIDE 0xFFFF00FF +#define S_028A30_SHIFT(x) (((unsigned)(x) & 0xFF) << 16) +#define G_028A30_SHIFT(x) (((x) >> 16) & 0xFF) +#define C_028A30_SHIFT 0xFF00FFFF +#define R_028A34_VGT_GROUP_VECT_1_CNTL 0x028A34 +#define S_028A34_COMP_X_EN(x) (((unsigned)(x) & 0x1) << 0) +#define G_028A34_COMP_X_EN(x) (((x) >> 0) & 0x1) +#define C_028A34_COMP_X_EN 0xFFFFFFFE +#define S_028A34_COMP_Y_EN(x) (((unsigned)(x) & 0x1) << 1) +#define G_028A34_COMP_Y_EN(x) (((x) >> 1) & 0x1) +#define C_028A34_COMP_Y_EN 0xFFFFFFFD +#define S_028A34_COMP_Z_EN(x) (((unsigned)(x) & 0x1) << 2) +#define G_028A34_COMP_Z_EN(x) (((x) >> 2) & 0x1) +#define C_028A34_COMP_Z_EN 0xFFFFFFFB +#define S_028A34_COMP_W_EN(x) (((unsigned)(x) & 0x1) << 3) +#define G_028A34_COMP_W_EN(x) (((x) >> 3) & 0x1) +#define C_028A34_COMP_W_EN 0xFFFFFFF7 +#define S_028A34_STRIDE(x) (((unsigned)(x) & 0xFF) << 8) +#define G_028A34_STRIDE(x) (((x) >> 8) & 0xFF) +#define C_028A34_STRIDE 0xFFFF00FF +#define S_028A34_SHIFT(x) (((unsigned)(x) & 0xFF) << 16) +#define G_028A34_SHIFT(x) (((x) >> 16) & 0xFF) +#define C_028A34_SHIFT 0xFF00FFFF +#define R_028A38_VGT_GROUP_VECT_0_FMT_CNTL 0x028A38 +#define S_028A38_X_CONV(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028A38_X_CONV(x) (((x) >> 0) & 0x0F) +#define C_028A38_X_CONV 0xFFFFFFF0 +#define V_028A38_VGT_GRP_INDEX_16 0x00 +#define V_028A38_VGT_GRP_INDEX_32 0x01 +#define V_028A38_VGT_GRP_UINT_16 0x02 +#define V_028A38_VGT_GRP_UINT_32 0x03 +#define V_028A38_VGT_GRP_SINT_16 0x04 +#define V_028A38_VGT_GRP_SINT_32 0x05 +#define V_028A38_VGT_GRP_FLOAT_32 0x06 +#define V_028A38_VGT_GRP_AUTO_PRIM 0x07 +#define V_028A38_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 +#define S_028A38_X_OFFSET(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028A38_X_OFFSET(x) (((x) >> 4) & 0x0F) +#define C_028A38_X_OFFSET 0xFFFFFF0F +#define S_028A38_Y_CONV(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028A38_Y_CONV(x) (((x) >> 8) & 0x0F) +#define C_028A38_Y_CONV 0xFFFFF0FF +#define V_028A38_VGT_GRP_INDEX_16 0x00 +#define V_028A38_VGT_GRP_INDEX_32 0x01 +#define V_028A38_VGT_GRP_UINT_16 0x02 +#define V_028A38_VGT_GRP_UINT_32 0x03 +#define V_028A38_VGT_GRP_SINT_16 0x04 +#define V_028A38_VGT_GRP_SINT_32 0x05 +#define V_028A38_VGT_GRP_FLOAT_32 0x06 +#define V_028A38_VGT_GRP_AUTO_PRIM 0x07 +#define V_028A38_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 +#define S_028A38_Y_OFFSET(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028A38_Y_OFFSET(x) (((x) >> 12) & 0x0F) +#define C_028A38_Y_OFFSET 0xFFFF0FFF +#define S_028A38_Z_CONV(x) (((unsigned)(x) & 0x0F) << 16) +#define G_028A38_Z_CONV(x) (((x) >> 16) & 0x0F) +#define C_028A38_Z_CONV 0xFFF0FFFF +#define V_028A38_VGT_GRP_INDEX_16 0x00 +#define V_028A38_VGT_GRP_INDEX_32 0x01 +#define V_028A38_VGT_GRP_UINT_16 0x02 +#define V_028A38_VGT_GRP_UINT_32 0x03 +#define V_028A38_VGT_GRP_SINT_16 0x04 +#define V_028A38_VGT_GRP_SINT_32 0x05 +#define V_028A38_VGT_GRP_FLOAT_32 0x06 +#define V_028A38_VGT_GRP_AUTO_PRIM 0x07 +#define V_028A38_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 +#define S_028A38_Z_OFFSET(x) (((unsigned)(x) & 0x0F) << 20) +#define G_028A38_Z_OFFSET(x) (((x) >> 20) & 0x0F) +#define C_028A38_Z_OFFSET 0xFF0FFFFF +#define S_028A38_W_CONV(x) (((unsigned)(x) & 0x0F) << 24) +#define G_028A38_W_CONV(x) (((x) >> 24) & 0x0F) +#define C_028A38_W_CONV 0xF0FFFFFF +#define V_028A38_VGT_GRP_INDEX_16 0x00 +#define V_028A38_VGT_GRP_INDEX_32 0x01 +#define V_028A38_VGT_GRP_UINT_16 0x02 +#define V_028A38_VGT_GRP_UINT_32 0x03 +#define V_028A38_VGT_GRP_SINT_16 0x04 +#define V_028A38_VGT_GRP_SINT_32 0x05 +#define V_028A38_VGT_GRP_FLOAT_32 0x06 +#define V_028A38_VGT_GRP_AUTO_PRIM 0x07 +#define V_028A38_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 +#define S_028A38_W_OFFSET(x) (((unsigned)(x) & 0x0F) << 28) +#define G_028A38_W_OFFSET(x) (((x) >> 28) & 0x0F) +#define C_028A38_W_OFFSET 0x0FFFFFFF +#define R_028A3C_VGT_GROUP_VECT_1_FMT_CNTL 0x028A3C +#define S_028A3C_X_CONV(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028A3C_X_CONV(x) (((x) >> 0) & 0x0F) +#define C_028A3C_X_CONV 0xFFFFFFF0 +#define V_028A3C_VGT_GRP_INDEX_16 0x00 +#define V_028A3C_VGT_GRP_INDEX_32 0x01 +#define V_028A3C_VGT_GRP_UINT_16 0x02 +#define V_028A3C_VGT_GRP_UINT_32 0x03 +#define V_028A3C_VGT_GRP_SINT_16 0x04 +#define V_028A3C_VGT_GRP_SINT_32 0x05 +#define V_028A3C_VGT_GRP_FLOAT_32 0x06 +#define V_028A3C_VGT_GRP_AUTO_PRIM 0x07 +#define V_028A3C_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 +#define S_028A3C_X_OFFSET(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028A3C_X_OFFSET(x) (((x) >> 4) & 0x0F) +#define C_028A3C_X_OFFSET 0xFFFFFF0F +#define S_028A3C_Y_CONV(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028A3C_Y_CONV(x) (((x) >> 8) & 0x0F) +#define C_028A3C_Y_CONV 0xFFFFF0FF +#define V_028A3C_VGT_GRP_INDEX_16 0x00 +#define V_028A3C_VGT_GRP_INDEX_32 0x01 +#define V_028A3C_VGT_GRP_UINT_16 0x02 +#define V_028A3C_VGT_GRP_UINT_32 0x03 +#define V_028A3C_VGT_GRP_SINT_16 0x04 +#define V_028A3C_VGT_GRP_SINT_32 0x05 +#define V_028A3C_VGT_GRP_FLOAT_32 0x06 +#define V_028A3C_VGT_GRP_AUTO_PRIM 0x07 +#define V_028A3C_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 +#define S_028A3C_Y_OFFSET(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028A3C_Y_OFFSET(x) (((x) >> 12) & 0x0F) +#define C_028A3C_Y_OFFSET 0xFFFF0FFF +#define S_028A3C_Z_CONV(x) (((unsigned)(x) & 0x0F) << 16) +#define G_028A3C_Z_CONV(x) (((x) >> 16) & 0x0F) +#define C_028A3C_Z_CONV 0xFFF0FFFF +#define V_028A3C_VGT_GRP_INDEX_16 0x00 +#define V_028A3C_VGT_GRP_INDEX_32 0x01 +#define V_028A3C_VGT_GRP_UINT_16 0x02 +#define V_028A3C_VGT_GRP_UINT_32 0x03 +#define V_028A3C_VGT_GRP_SINT_16 0x04 +#define V_028A3C_VGT_GRP_SINT_32 0x05 +#define V_028A3C_VGT_GRP_FLOAT_32 0x06 +#define V_028A3C_VGT_GRP_AUTO_PRIM 0x07 +#define V_028A3C_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 +#define S_028A3C_Z_OFFSET(x) (((unsigned)(x) & 0x0F) << 20) +#define G_028A3C_Z_OFFSET(x) (((x) >> 20) & 0x0F) +#define C_028A3C_Z_OFFSET 0xFF0FFFFF +#define S_028A3C_W_CONV(x) (((unsigned)(x) & 0x0F) << 24) +#define G_028A3C_W_CONV(x) (((x) >> 24) & 0x0F) +#define C_028A3C_W_CONV 0xF0FFFFFF +#define V_028A3C_VGT_GRP_INDEX_16 0x00 +#define V_028A3C_VGT_GRP_INDEX_32 0x01 +#define V_028A3C_VGT_GRP_UINT_16 0x02 +#define V_028A3C_VGT_GRP_UINT_32 0x03 +#define V_028A3C_VGT_GRP_SINT_16 0x04 +#define V_028A3C_VGT_GRP_SINT_32 0x05 +#define V_028A3C_VGT_GRP_FLOAT_32 0x06 +#define V_028A3C_VGT_GRP_AUTO_PRIM 0x07 +#define V_028A3C_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 +#define S_028A3C_W_OFFSET(x) (((unsigned)(x) & 0x0F) << 28) +#define G_028A3C_W_OFFSET(x) (((x) >> 28) & 0x0F) +#define C_028A3C_W_OFFSET 0x0FFFFFFF +#define R_028A40_VGT_GS_MODE 0x028A40 +#define S_028A40_MODE(x) (((unsigned)(x) & 0x07) << 0) +#define G_028A40_MODE(x) (((x) >> 0) & 0x07) +#define C_028A40_MODE 0xFFFFFFF8 +#define V_028A40_GS_OFF 0x00 +#define V_028A40_GS_SCENARIO_A 0x01 +#define V_028A40_GS_SCENARIO_B 0x02 +#define V_028A40_GS_SCENARIO_G 0x03 +#define V_028A40_GS_SCENARIO_C 0x04 +#define V_028A40_SPRITE_EN 0x05 +#define S_028A40_RESERVED_0(x) (((unsigned)(x) & 0x1) << 3) +#define G_028A40_RESERVED_0(x) (((x) >> 3) & 0x1) +#define C_028A40_RESERVED_0 0xFFFFFFF7 +#define S_028A40_CUT_MODE(x) (((unsigned)(x) & 0x03) << 4) +#define G_028A40_CUT_MODE(x) (((x) >> 4) & 0x03) +#define C_028A40_CUT_MODE 0xFFFFFFCF +#define V_028A40_GS_CUT_1024 0x00 +#define V_028A40_GS_CUT_512 0x01 +#define V_028A40_GS_CUT_256 0x02 +#define V_028A40_GS_CUT_128 0x03 +#define S_028A40_RESERVED_1(x) (((unsigned)(x) & 0x1F) << 6) +#define G_028A40_RESERVED_1(x) (((x) >> 6) & 0x1F) +#define C_028A40_RESERVED_1 0xFFFFF83F +#define S_028A40_GS_C_PACK_EN(x) (((unsigned)(x) & 0x1) << 11) +#define G_028A40_GS_C_PACK_EN(x) (((x) >> 11) & 0x1) +#define C_028A40_GS_C_PACK_EN 0xFFFFF7FF +#define S_028A40_RESERVED_2(x) (((unsigned)(x) & 0x1) << 12) +#define G_028A40_RESERVED_2(x) (((x) >> 12) & 0x1) +#define C_028A40_RESERVED_2 0xFFFFEFFF +#define S_028A40_ES_PASSTHRU(x) (((unsigned)(x) & 0x1) << 13) +#define G_028A40_ES_PASSTHRU(x) (((x) >> 13) & 0x1) +#define C_028A40_ES_PASSTHRU 0xFFFFDFFF +/* SI-CIK */ +#define S_028A40_COMPUTE_MODE(x) (((unsigned)(x) & 0x1) << 14) +#define G_028A40_COMPUTE_MODE(x) (((x) >> 14) & 0x1) +#define C_028A40_COMPUTE_MODE 0xFFFFBFFF +#define S_028A40_FAST_COMPUTE_MODE(x) (((unsigned)(x) & 0x1) << 15) +#define G_028A40_FAST_COMPUTE_MODE(x) (((x) >> 15) & 0x1) +#define C_028A40_FAST_COMPUTE_MODE 0xFFFF7FFF +#define S_028A40_ELEMENT_INFO_EN(x) (((unsigned)(x) & 0x1) << 16) +#define G_028A40_ELEMENT_INFO_EN(x) (((x) >> 16) & 0x1) +#define C_028A40_ELEMENT_INFO_EN 0xFFFEFFFF +/* */ +#define S_028A40_PARTIAL_THD_AT_EOI(x) (((unsigned)(x) & 0x1) << 17) +#define G_028A40_PARTIAL_THD_AT_EOI(x) (((x) >> 17) & 0x1) +#define C_028A40_PARTIAL_THD_AT_EOI 0xFFFDFFFF +#define S_028A40_SUPPRESS_CUTS(x) (((unsigned)(x) & 0x1) << 18) +#define G_028A40_SUPPRESS_CUTS(x) (((x) >> 18) & 0x1) +#define C_028A40_SUPPRESS_CUTS 0xFFFBFFFF +#define S_028A40_ES_WRITE_OPTIMIZE(x) (((unsigned)(x) & 0x1) << 19) +#define G_028A40_ES_WRITE_OPTIMIZE(x) (((x) >> 19) & 0x1) +#define C_028A40_ES_WRITE_OPTIMIZE 0xFFF7FFFF +#define S_028A40_GS_WRITE_OPTIMIZE(x) (((unsigned)(x) & 0x1) << 20) +#define G_028A40_GS_WRITE_OPTIMIZE(x) (((x) >> 20) & 0x1) +#define C_028A40_GS_WRITE_OPTIMIZE 0xFFEFFFFF +/* CIK */ +#define S_028A40_ONCHIP(x) (((unsigned)(x) & 0x03) << 21) +#define G_028A40_ONCHIP(x) (((x) >> 21) & 0x03) +#define C_028A40_ONCHIP 0xFF9FFFFF +#define V_028A40_X_0_OFFCHIP_GS 0x00 +#define V_028A40_X_3_ES_AND_GS_ARE_ONCHIP 0x03 +#define R_028A44_VGT_GS_ONCHIP_CNTL 0x028A44 +#define S_028A44_ES_VERTS_PER_SUBGRP(x) (((unsigned)(x) & 0x7FF) << 0) +#define G_028A44_ES_VERTS_PER_SUBGRP(x) (((x) >> 0) & 0x7FF) +#define C_028A44_ES_VERTS_PER_SUBGRP 0xFFFFF800 +#define S_028A44_GS_PRIMS_PER_SUBGRP(x) (((unsigned)(x) & 0x7FF) << 11) +#define G_028A44_GS_PRIMS_PER_SUBGRP(x) (((x) >> 11) & 0x7FF) +#define C_028A44_GS_PRIMS_PER_SUBGRP 0xFFC007FF +/* */ +#define R_028A48_PA_SC_MODE_CNTL_0 0x028A48 +#define S_028A48_MSAA_ENABLE(x) (((unsigned)(x) & 0x1) << 0) +#define G_028A48_MSAA_ENABLE(x) (((x) >> 0) & 0x1) +#define C_028A48_MSAA_ENABLE 0xFFFFFFFE +#define S_028A48_VPORT_SCISSOR_ENABLE(x) (((unsigned)(x) & 0x1) << 1) +#define G_028A48_VPORT_SCISSOR_ENABLE(x) (((x) >> 1) & 0x1) +#define C_028A48_VPORT_SCISSOR_ENABLE 0xFFFFFFFD +#define S_028A48_LINE_STIPPLE_ENABLE(x) (((unsigned)(x) & 0x1) << 2) +#define G_028A48_LINE_STIPPLE_ENABLE(x) (((x) >> 2) & 0x1) +#define C_028A48_LINE_STIPPLE_ENABLE 0xFFFFFFFB +#define S_028A48_SEND_UNLIT_STILES_TO_PKR(x) (((unsigned)(x) & 0x1) << 3) +#define G_028A48_SEND_UNLIT_STILES_TO_PKR(x) (((x) >> 3) & 0x1) +#define C_028A48_SEND_UNLIT_STILES_TO_PKR 0xFFFFFFF7 +#define R_028A4C_PA_SC_MODE_CNTL_1 0x028A4C +#define S_028A4C_WALK_SIZE(x) (((unsigned)(x) & 0x1) << 0) +#define G_028A4C_WALK_SIZE(x) (((x) >> 0) & 0x1) +#define C_028A4C_WALK_SIZE 0xFFFFFFFE +#define S_028A4C_WALK_ALIGNMENT(x) (((unsigned)(x) & 0x1) << 1) +#define G_028A4C_WALK_ALIGNMENT(x) (((x) >> 1) & 0x1) +#define C_028A4C_WALK_ALIGNMENT 0xFFFFFFFD +#define S_028A4C_WALK_ALIGN8_PRIM_FITS_ST(x) (((unsigned)(x) & 0x1) << 2) +#define G_028A4C_WALK_ALIGN8_PRIM_FITS_ST(x) (((x) >> 2) & 0x1) +#define C_028A4C_WALK_ALIGN8_PRIM_FITS_ST 0xFFFFFFFB +#define S_028A4C_WALK_FENCE_ENABLE(x) (((unsigned)(x) & 0x1) << 3) +#define G_028A4C_WALK_FENCE_ENABLE(x) (((x) >> 3) & 0x1) +#define C_028A4C_WALK_FENCE_ENABLE 0xFFFFFFF7 +#define S_028A4C_WALK_FENCE_SIZE(x) (((unsigned)(x) & 0x07) << 4) +#define G_028A4C_WALK_FENCE_SIZE(x) (((x) >> 4) & 0x07) +#define C_028A4C_WALK_FENCE_SIZE 0xFFFFFF8F +#define S_028A4C_SUPERTILE_WALK_ORDER_ENABLE(x) (((unsigned)(x) & 0x1) << 7) +#define G_028A4C_SUPERTILE_WALK_ORDER_ENABLE(x) (((x) >> 7) & 0x1) +#define C_028A4C_SUPERTILE_WALK_ORDER_ENABLE 0xFFFFFF7F +#define S_028A4C_TILE_WALK_ORDER_ENABLE(x) (((unsigned)(x) & 0x1) << 8) +#define G_028A4C_TILE_WALK_ORDER_ENABLE(x) (((x) >> 8) & 0x1) +#define C_028A4C_TILE_WALK_ORDER_ENABLE 0xFFFFFEFF +#define S_028A4C_TILE_COVER_DISABLE(x) (((unsigned)(x) & 0x1) << 9) +#define G_028A4C_TILE_COVER_DISABLE(x) (((x) >> 9) & 0x1) +#define C_028A4C_TILE_COVER_DISABLE 0xFFFFFDFF +#define S_028A4C_TILE_COVER_NO_SCISSOR(x) (((unsigned)(x) & 0x1) << 10) +#define G_028A4C_TILE_COVER_NO_SCISSOR(x) (((x) >> 10) & 0x1) +#define C_028A4C_TILE_COVER_NO_SCISSOR 0xFFFFFBFF +#define S_028A4C_ZMM_LINE_EXTENT(x) (((unsigned)(x) & 0x1) << 11) +#define G_028A4C_ZMM_LINE_EXTENT(x) (((x) >> 11) & 0x1) +#define C_028A4C_ZMM_LINE_EXTENT 0xFFFFF7FF +#define S_028A4C_ZMM_LINE_OFFSET(x) (((unsigned)(x) & 0x1) << 12) +#define G_028A4C_ZMM_LINE_OFFSET(x) (((x) >> 12) & 0x1) +#define C_028A4C_ZMM_LINE_OFFSET 0xFFFFEFFF +#define S_028A4C_ZMM_RECT_EXTENT(x) (((unsigned)(x) & 0x1) << 13) +#define G_028A4C_ZMM_RECT_EXTENT(x) (((x) >> 13) & 0x1) +#define C_028A4C_ZMM_RECT_EXTENT 0xFFFFDFFF +#define S_028A4C_KILL_PIX_POST_HI_Z(x) (((unsigned)(x) & 0x1) << 14) +#define G_028A4C_KILL_PIX_POST_HI_Z(x) (((x) >> 14) & 0x1) +#define C_028A4C_KILL_PIX_POST_HI_Z 0xFFFFBFFF +#define S_028A4C_KILL_PIX_POST_DETAIL_MASK(x) (((unsigned)(x) & 0x1) << 15) +#define G_028A4C_KILL_PIX_POST_DETAIL_MASK(x) (((x) >> 15) & 0x1) +#define C_028A4C_KILL_PIX_POST_DETAIL_MASK 0xFFFF7FFF +#define S_028A4C_PS_ITER_SAMPLE(x) (((unsigned)(x) & 0x1) << 16) +#define G_028A4C_PS_ITER_SAMPLE(x) (((x) >> 16) & 0x1) +#define C_028A4C_PS_ITER_SAMPLE 0xFFFEFFFF +#define S_028A4C_MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE(x) (((unsigned)(x) & 0x1) << 17) +#define G_028A4C_MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE(x) (((x) >> 17) & 0x1) +#define C_028A4C_MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE 0xFFFDFFFF +#define S_028A4C_MULTI_GPU_SUPERTILE_ENABLE(x) (((unsigned)(x) & 0x1) << 18) +#define G_028A4C_MULTI_GPU_SUPERTILE_ENABLE(x) (((x) >> 18) & 0x1) +#define C_028A4C_MULTI_GPU_SUPERTILE_ENABLE 0xFFFBFFFF +#define S_028A4C_GPU_ID_OVERRIDE_ENABLE(x) (((unsigned)(x) & 0x1) << 19) +#define G_028A4C_GPU_ID_OVERRIDE_ENABLE(x) (((x) >> 19) & 0x1) +#define C_028A4C_GPU_ID_OVERRIDE_ENABLE 0xFFF7FFFF +#define S_028A4C_GPU_ID_OVERRIDE(x) (((unsigned)(x) & 0x0F) << 20) +#define G_028A4C_GPU_ID_OVERRIDE(x) (((x) >> 20) & 0x0F) +#define C_028A4C_GPU_ID_OVERRIDE 0xFF0FFFFF +#define S_028A4C_MULTI_GPU_PRIM_DISCARD_ENABLE(x) (((unsigned)(x) & 0x1) << 24) +#define G_028A4C_MULTI_GPU_PRIM_DISCARD_ENABLE(x) (((x) >> 24) & 0x1) +#define C_028A4C_MULTI_GPU_PRIM_DISCARD_ENABLE 0xFEFFFFFF +#define S_028A4C_FORCE_EOV_CNTDWN_ENABLE(x) (((unsigned)(x) & 0x1) << 25) +#define G_028A4C_FORCE_EOV_CNTDWN_ENABLE(x) (((x) >> 25) & 0x1) +#define C_028A4C_FORCE_EOV_CNTDWN_ENABLE 0xFDFFFFFF +#define S_028A4C_FORCE_EOV_REZ_ENABLE(x) (((unsigned)(x) & 0x1) << 26) +#define G_028A4C_FORCE_EOV_REZ_ENABLE(x) (((x) >> 26) & 0x1) +#define C_028A4C_FORCE_EOV_REZ_ENABLE 0xFBFFFFFF +#define S_028A4C_OUT_OF_ORDER_PRIMITIVE_ENABLE(x) (((unsigned)(x) & 0x1) << 27) +#define G_028A4C_OUT_OF_ORDER_PRIMITIVE_ENABLE(x) (((x) >> 27) & 0x1) +#define C_028A4C_OUT_OF_ORDER_PRIMITIVE_ENABLE 0xF7FFFFFF +#define S_028A4C_OUT_OF_ORDER_WATER_MARK(x) (((unsigned)(x) & 0x07) << 28) +#define G_028A4C_OUT_OF_ORDER_WATER_MARK(x) (((x) >> 28) & 0x07) +#define C_028A4C_OUT_OF_ORDER_WATER_MARK 0x8FFFFFFF +#define R_028A50_VGT_ENHANCE 0x028A50 +#define R_028A54_VGT_GS_PER_ES 0x028A54 +#define S_028A54_GS_PER_ES(x) (((unsigned)(x) & 0x7FF) << 0) +#define G_028A54_GS_PER_ES(x) (((x) >> 0) & 0x7FF) +#define C_028A54_GS_PER_ES 0xFFFFF800 +#define R_028A58_VGT_ES_PER_GS 0x028A58 +#define S_028A58_ES_PER_GS(x) (((unsigned)(x) & 0x7FF) << 0) +#define G_028A58_ES_PER_GS(x) (((x) >> 0) & 0x7FF) +#define C_028A58_ES_PER_GS 0xFFFFF800 +#define R_028A5C_VGT_GS_PER_VS 0x028A5C +#define S_028A5C_GS_PER_VS(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028A5C_GS_PER_VS(x) (((x) >> 0) & 0x0F) +#define C_028A5C_GS_PER_VS 0xFFFFFFF0 +#define R_028A60_VGT_GSVS_RING_OFFSET_1 0x028A60 +#define S_028A60_OFFSET(x) (((unsigned)(x) & 0x7FFF) << 0) +#define G_028A60_OFFSET(x) (((x) >> 0) & 0x7FFF) +#define C_028A60_OFFSET 0xFFFF8000 +#define R_028A64_VGT_GSVS_RING_OFFSET_2 0x028A64 +#define S_028A64_OFFSET(x) (((unsigned)(x) & 0x7FFF) << 0) +#define G_028A64_OFFSET(x) (((x) >> 0) & 0x7FFF) +#define C_028A64_OFFSET 0xFFFF8000 +#define R_028A68_VGT_GSVS_RING_OFFSET_3 0x028A68 +#define S_028A68_OFFSET(x) (((unsigned)(x) & 0x7FFF) << 0) +#define G_028A68_OFFSET(x) (((x) >> 0) & 0x7FFF) +#define C_028A68_OFFSET 0xFFFF8000 +#define R_028A6C_VGT_GS_OUT_PRIM_TYPE 0x028A6C +#define S_028A6C_OUTPRIM_TYPE(x) (((unsigned)(x) & 0x3F) << 0) +#define G_028A6C_OUTPRIM_TYPE(x) (((x) >> 0) & 0x3F) +#define C_028A6C_OUTPRIM_TYPE 0xFFFFFFC0 +#define V_028A6C_OUTPRIM_TYPE_POINTLIST 0 +#define V_028A6C_OUTPRIM_TYPE_LINESTRIP 1 +#define V_028A6C_OUTPRIM_TYPE_TRISTRIP 2 +#define S_028A6C_OUTPRIM_TYPE_1(x) (((unsigned)(x) & 0x3F) << 8) +#define G_028A6C_OUTPRIM_TYPE_1(x) (((x) >> 8) & 0x3F) +#define C_028A6C_OUTPRIM_TYPE_1 0xFFFFC0FF +#define S_028A6C_OUTPRIM_TYPE_2(x) (((unsigned)(x) & 0x3F) << 16) +#define G_028A6C_OUTPRIM_TYPE_2(x) (((x) >> 16) & 0x3F) +#define C_028A6C_OUTPRIM_TYPE_2 0xFFC0FFFF +#define S_028A6C_OUTPRIM_TYPE_3(x) (((unsigned)(x) & 0x3F) << 22) +#define G_028A6C_OUTPRIM_TYPE_3(x) (((x) >> 22) & 0x3F) +#define C_028A6C_OUTPRIM_TYPE_3 0xF03FFFFF +#define S_028A6C_UNIQUE_TYPE_PER_STREAM(x) (((unsigned)(x) & 0x1) << 31) +#define G_028A6C_UNIQUE_TYPE_PER_STREAM(x) (((x) >> 31) & 0x1) +#define C_028A6C_UNIQUE_TYPE_PER_STREAM 0x7FFFFFFF +#define R_028A70_IA_ENHANCE 0x028A70 +#define R_028A74_VGT_DMA_SIZE 0x028A74 +#define R_028A78_VGT_DMA_MAX_SIZE 0x028A78 +#define R_028A7C_VGT_DMA_INDEX_TYPE 0x028A7C +#define S_028A7C_INDEX_TYPE(x) (((unsigned)(x) & 0x03) << 0) +#define G_028A7C_INDEX_TYPE(x) (((x) >> 0) & 0x03) +#define C_028A7C_INDEX_TYPE 0xFFFFFFFC +#define V_028A7C_VGT_INDEX_16 0x00 +#define V_028A7C_VGT_INDEX_32 0x01 +#define V_028A7C_VGT_INDEX_8 0x02 /* VI */ +#define S_028A7C_SWAP_MODE(x) (((unsigned)(x) & 0x03) << 2) +#define G_028A7C_SWAP_MODE(x) (((x) >> 2) & 0x03) +#define C_028A7C_SWAP_MODE 0xFFFFFFF3 +#define V_028A7C_VGT_DMA_SWAP_NONE 0x00 +#define V_028A7C_VGT_DMA_SWAP_16_BIT 0x01 +#define V_028A7C_VGT_DMA_SWAP_32_BIT 0x02 +#define V_028A7C_VGT_DMA_SWAP_WORD 0x03 +/* CIK */ +#define S_028A7C_BUF_TYPE(x) (((unsigned)(x) & 0x03) << 4) +#define G_028A7C_BUF_TYPE(x) (((x) >> 4) & 0x03) +#define C_028A7C_BUF_TYPE 0xFFFFFFCF +#define V_028A7C_VGT_DMA_BUF_MEM 0x00 +#define V_028A7C_VGT_DMA_BUF_RING 0x01 +#define V_028A7C_VGT_DMA_BUF_SETUP 0x02 +#define S_028A7C_RDREQ_POLICY(x) (((unsigned)(x) & 0x03) << 6) +#define G_028A7C_RDREQ_POLICY(x) (((x) >> 6) & 0x03) +#define C_028A7C_RDREQ_POLICY 0xFFFFFF3F +#define V_028A7C_VGT_POLICY_LRU 0x00 +#define V_028A7C_VGT_POLICY_STREAM 0x01 +#define S_028A7C_RDREQ_POLICY_VI(x) (((unsigned)(x) & 0x1) << 6) +#define G_028A7C_RDREQ_POLICY_VI(x) (((x) >> 6) & 0x1) +#define C_028A7C_RDREQ_POLICY_VI 0xFFFFFFBF +#define S_028A7C_ATC(x) (((unsigned)(x) & 0x1) << 8) +#define G_028A7C_ATC(x) (((x) >> 8) & 0x1) +#define C_028A7C_ATC 0xFFFFFEFF +#define S_028A7C_NOT_EOP(x) (((unsigned)(x) & 0x1) << 9) +#define G_028A7C_NOT_EOP(x) (((x) >> 9) & 0x1) +#define C_028A7C_NOT_EOP 0xFFFFFDFF +#define S_028A7C_REQ_PATH(x) (((unsigned)(x) & 0x1) << 10) +#define G_028A7C_REQ_PATH(x) (((x) >> 10) & 0x1) +#define C_028A7C_REQ_PATH 0xFFFFFBFF +/* */ +/* VI */ +#define S_028A7C_MTYPE(x) (((unsigned)(x) & 0x03) << 11) +#define G_028A7C_MTYPE(x) (((x) >> 11) & 0x03) +#define C_028A7C_MTYPE 0xFFFFE7FF +/* */ +#define R_028A80_WD_ENHANCE 0x028A80 +#define R_028A84_VGT_PRIMITIVEID_EN 0x028A84 +#define S_028A84_PRIMITIVEID_EN(x) (((unsigned)(x) & 0x1) << 0) +#define G_028A84_PRIMITIVEID_EN(x) (((x) >> 0) & 0x1) +#define C_028A84_PRIMITIVEID_EN 0xFFFFFFFE +#define S_028A84_DISABLE_RESET_ON_EOI(x) (((unsigned)(x) & 0x1) << 1) /* not on CIK */ +#define G_028A84_DISABLE_RESET_ON_EOI(x) (((x) >> 1) & 0x1) /* not on CIK */ +#define C_028A84_DISABLE_RESET_ON_EOI 0xFFFFFFFD /* not on CIK */ +#define R_028A88_VGT_DMA_NUM_INSTANCES 0x028A88 +#define R_028A8C_VGT_PRIMITIVEID_RESET 0x028A8C +#define R_028A90_VGT_EVENT_INITIATOR 0x028A90 +#define S_028A90_EVENT_TYPE(x) (((unsigned)(x) & 0x3F) << 0) +#define G_028A90_EVENT_TYPE(x) (((x) >> 0) & 0x3F) +#define C_028A90_EVENT_TYPE 0xFFFFFFC0 +#define V_028A90_SAMPLE_STREAMOUTSTATS1 0x01 +#define V_028A90_SAMPLE_STREAMOUTSTATS2 0x02 +#define V_028A90_SAMPLE_STREAMOUTSTATS3 0x03 +#define V_028A90_CACHE_FLUSH_TS 0x04 +#define V_028A90_CONTEXT_DONE 0x05 +#define V_028A90_CACHE_FLUSH 0x06 +#define V_028A90_CS_PARTIAL_FLUSH 0x07 +#define V_028A90_VGT_STREAMOUT_SYNC 0x08 +#define V_028A90_VGT_STREAMOUT_RESET 0x0A +#define V_028A90_END_OF_PIPE_INCR_DE 0x0B +#define V_028A90_END_OF_PIPE_IB_END 0x0C +#define V_028A90_RST_PIX_CNT 0x0D +#define V_028A90_VS_PARTIAL_FLUSH 0x0F +#define V_028A90_PS_PARTIAL_FLUSH 0x10 +#define V_028A90_FLUSH_HS_OUTPUT 0x11 +#define V_028A90_FLUSH_LS_OUTPUT 0x12 +#define V_028A90_CACHE_FLUSH_AND_INV_TS_EVENT 0x14 +#define V_028A90_ZPASS_DONE 0x15 +#define V_028A90_CACHE_FLUSH_AND_INV_EVENT 0x16 +#define V_028A90_PERFCOUNTER_START 0x17 +#define V_028A90_PERFCOUNTER_STOP 0x18 +#define V_028A90_PIPELINESTAT_START 0x19 +#define V_028A90_PIPELINESTAT_STOP 0x1A +#define V_028A90_PERFCOUNTER_SAMPLE 0x1B +#define V_028A90_FLUSH_ES_OUTPUT 0x1C +#define V_028A90_FLUSH_GS_OUTPUT 0x1D +#define V_028A90_SAMPLE_PIPELINESTAT 0x1E +#define V_028A90_SO_VGTSTREAMOUT_FLUSH 0x1F +#define V_028A90_SAMPLE_STREAMOUTSTATS 0x20 +#define V_028A90_RESET_VTX_CNT 0x21 +#define V_028A90_BLOCK_CONTEXT_DONE 0x22 +#define V_028A90_CS_CONTEXT_DONE 0x23 +#define V_028A90_VGT_FLUSH 0x24 +#define V_028A90_SC_SEND_DB_VPZ 0x27 +#define V_028A90_BOTTOM_OF_PIPE_TS 0x28 +#define V_028A90_DB_CACHE_FLUSH_AND_INV 0x2A +#define V_028A90_FLUSH_AND_INV_DB_DATA_TS 0x2B +#define V_028A90_FLUSH_AND_INV_DB_META 0x2C +#define V_028A90_FLUSH_AND_INV_CB_DATA_TS 0x2D +#define V_028A90_FLUSH_AND_INV_CB_META 0x2E +#define V_028A90_CS_DONE 0x2F +#define V_028A90_PS_DONE 0x30 +#define V_028A90_FLUSH_AND_INV_CB_PIXEL_DATA 0x31 +#define V_028A90_THREAD_TRACE_START 0x33 +#define V_028A90_THREAD_TRACE_STOP 0x34 +#define V_028A90_THREAD_TRACE_MARKER 0x35 +#define V_028A90_THREAD_TRACE_FLUSH 0x36 +#define V_028A90_THREAD_TRACE_FINISH 0x37 +/* CIK */ +#define V_028A90_PIXEL_PIPE_STAT_CONTROL 0x38 +#define V_028A90_PIXEL_PIPE_STAT_DUMP 0x39 +#define V_028A90_PIXEL_PIPE_STAT_RESET 0x3A +/* */ +#define S_028A90_ADDRESS_HI(x) (((unsigned)(x) & 0x1FF) << 18) +#define G_028A90_ADDRESS_HI(x) (((x) >> 18) & 0x1FF) +#define C_028A90_ADDRESS_HI 0xF803FFFF +#define S_028A90_EXTENDED_EVENT(x) (((unsigned)(x) & 0x1) << 27) +#define G_028A90_EXTENDED_EVENT(x) (((x) >> 27) & 0x1) +#define C_028A90_EXTENDED_EVENT 0xF7FFFFFF +#define R_028A94_VGT_MULTI_PRIM_IB_RESET_EN 0x028A94 +#define S_028A94_RESET_EN(x) (((unsigned)(x) & 0x1) << 0) +#define G_028A94_RESET_EN(x) (((x) >> 0) & 0x1) +#define C_028A94_RESET_EN 0xFFFFFFFE +#define R_028AA0_VGT_INSTANCE_STEP_RATE_0 0x028AA0 +#define R_028AA4_VGT_INSTANCE_STEP_RATE_1 0x028AA4 +#define R_028AA8_IA_MULTI_VGT_PARAM 0x028AA8 +#define S_028AA8_PRIMGROUP_SIZE(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_028AA8_PRIMGROUP_SIZE(x) (((x) >> 0) & 0xFFFF) +#define C_028AA8_PRIMGROUP_SIZE 0xFFFF0000 +#define S_028AA8_PARTIAL_VS_WAVE_ON(x) (((unsigned)(x) & 0x1) << 16) +#define G_028AA8_PARTIAL_VS_WAVE_ON(x) (((x) >> 16) & 0x1) +#define C_028AA8_PARTIAL_VS_WAVE_ON 0xFFFEFFFF +#define S_028AA8_SWITCH_ON_EOP(x) (((unsigned)(x) & 0x1) << 17) +#define G_028AA8_SWITCH_ON_EOP(x) (((x) >> 17) & 0x1) +#define C_028AA8_SWITCH_ON_EOP 0xFFFDFFFF +#define S_028AA8_PARTIAL_ES_WAVE_ON(x) (((unsigned)(x) & 0x1) << 18) +#define G_028AA8_PARTIAL_ES_WAVE_ON(x) (((x) >> 18) & 0x1) +#define C_028AA8_PARTIAL_ES_WAVE_ON 0xFFFBFFFF +#define S_028AA8_SWITCH_ON_EOI(x) (((unsigned)(x) & 0x1) << 19) +#define G_028AA8_SWITCH_ON_EOI(x) (((x) >> 19) & 0x1) +#define C_028AA8_SWITCH_ON_EOI 0xFFF7FFFF +/* CIK */ +#define S_028AA8_WD_SWITCH_ON_EOP(x) (((unsigned)(x) & 0x1) << 20) +#define G_028AA8_WD_SWITCH_ON_EOP(x) (((x) >> 20) & 0x1) +#define C_028AA8_WD_SWITCH_ON_EOP 0xFFEFFFFF +/* VI */ +#define S_028AA8_MAX_PRIMGRP_IN_WAVE(x) (((unsigned)(x) & 0x0F) << 28) +#define G_028AA8_MAX_PRIMGRP_IN_WAVE(x) (((x) >> 28) & 0x0F) +#define C_028AA8_MAX_PRIMGRP_IN_WAVE 0x0FFFFFFF +/* */ +#define R_028AAC_VGT_ESGS_RING_ITEMSIZE 0x028AAC +#define S_028AAC_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) +#define G_028AAC_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) +#define C_028AAC_ITEMSIZE 0xFFFF8000 +#define R_028AB0_VGT_GSVS_RING_ITEMSIZE 0x028AB0 +#define S_028AB0_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) +#define G_028AB0_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) +#define C_028AB0_ITEMSIZE 0xFFFF8000 +#define R_028AB4_VGT_REUSE_OFF 0x028AB4 +#define S_028AB4_REUSE_OFF(x) (((unsigned)(x) & 0x1) << 0) +#define G_028AB4_REUSE_OFF(x) (((x) >> 0) & 0x1) +#define C_028AB4_REUSE_OFF 0xFFFFFFFE +#define R_028AB8_VGT_VTX_CNT_EN 0x028AB8 +#define S_028AB8_VTX_CNT_EN(x) (((unsigned)(x) & 0x1) << 0) +#define G_028AB8_VTX_CNT_EN(x) (((x) >> 0) & 0x1) +#define C_028AB8_VTX_CNT_EN 0xFFFFFFFE +#define R_028ABC_DB_HTILE_SURFACE 0x028ABC +#define S_028ABC_LINEAR(x) (((unsigned)(x) & 0x1) << 0) +#define G_028ABC_LINEAR(x) (((x) >> 0) & 0x1) +#define C_028ABC_LINEAR 0xFFFFFFFE +#define S_028ABC_FULL_CACHE(x) (((unsigned)(x) & 0x1) << 1) +#define G_028ABC_FULL_CACHE(x) (((x) >> 1) & 0x1) +#define C_028ABC_FULL_CACHE 0xFFFFFFFD +#define S_028ABC_HTILE_USES_PRELOAD_WIN(x) (((unsigned)(x) & 0x1) << 2) +#define G_028ABC_HTILE_USES_PRELOAD_WIN(x) (((x) >> 2) & 0x1) +#define C_028ABC_HTILE_USES_PRELOAD_WIN 0xFFFFFFFB +#define S_028ABC_PRELOAD(x) (((unsigned)(x) & 0x1) << 3) +#define G_028ABC_PRELOAD(x) (((x) >> 3) & 0x1) +#define C_028ABC_PRELOAD 0xFFFFFFF7 +#define S_028ABC_PREFETCH_WIDTH(x) (((unsigned)(x) & 0x3F) << 4) +#define G_028ABC_PREFETCH_WIDTH(x) (((x) >> 4) & 0x3F) +#define C_028ABC_PREFETCH_WIDTH 0xFFFFFC0F +#define S_028ABC_PREFETCH_HEIGHT(x) (((unsigned)(x) & 0x3F) << 10) +#define G_028ABC_PREFETCH_HEIGHT(x) (((x) >> 10) & 0x3F) +#define C_028ABC_PREFETCH_HEIGHT 0xFFFF03FF +#define S_028ABC_DST_OUTSIDE_ZERO_TO_ONE(x) (((unsigned)(x) & 0x1) << 16) +#define G_028ABC_DST_OUTSIDE_ZERO_TO_ONE(x) (((x) >> 16) & 0x1) +#define C_028ABC_DST_OUTSIDE_ZERO_TO_ONE 0xFFFEFFFF +/* VI */ +#define S_028ABC_TC_COMPATIBLE(x) (((unsigned)(x) & 0x1) << 17) +#define G_028ABC_TC_COMPATIBLE(x) (((x) >> 17) & 0x1) +#define C_028ABC_TC_COMPATIBLE 0xFFFDFFFF +/* */ +#define R_028AC0_DB_SRESULTS_COMPARE_STATE0 0x028AC0 +#define S_028AC0_COMPAREFUNC0(x) (((unsigned)(x) & 0x07) << 0) +#define G_028AC0_COMPAREFUNC0(x) (((x) >> 0) & 0x07) +#define C_028AC0_COMPAREFUNC0 0xFFFFFFF8 +#define V_028AC0_REF_NEVER 0x00 +#define V_028AC0_REF_LESS 0x01 +#define V_028AC0_REF_EQUAL 0x02 +#define V_028AC0_REF_LEQUAL 0x03 +#define V_028AC0_REF_GREATER 0x04 +#define V_028AC0_REF_NOTEQUAL 0x05 +#define V_028AC0_REF_GEQUAL 0x06 +#define V_028AC0_REF_ALWAYS 0x07 +#define S_028AC0_COMPAREVALUE0(x) (((unsigned)(x) & 0xFF) << 4) +#define G_028AC0_COMPAREVALUE0(x) (((x) >> 4) & 0xFF) +#define C_028AC0_COMPAREVALUE0 0xFFFFF00F +#define S_028AC0_COMPAREMASK0(x) (((unsigned)(x) & 0xFF) << 12) +#define G_028AC0_COMPAREMASK0(x) (((x) >> 12) & 0xFF) +#define C_028AC0_COMPAREMASK0 0xFFF00FFF +#define S_028AC0_ENABLE0(x) (((unsigned)(x) & 0x1) << 24) +#define G_028AC0_ENABLE0(x) (((x) >> 24) & 0x1) +#define C_028AC0_ENABLE0 0xFEFFFFFF +#define R_028AC4_DB_SRESULTS_COMPARE_STATE1 0x028AC4 +#define S_028AC4_COMPAREFUNC1(x) (((unsigned)(x) & 0x07) << 0) +#define G_028AC4_COMPAREFUNC1(x) (((x) >> 0) & 0x07) +#define C_028AC4_COMPAREFUNC1 0xFFFFFFF8 +#define V_028AC4_REF_NEVER 0x00 +#define V_028AC4_REF_LESS 0x01 +#define V_028AC4_REF_EQUAL 0x02 +#define V_028AC4_REF_LEQUAL 0x03 +#define V_028AC4_REF_GREATER 0x04 +#define V_028AC4_REF_NOTEQUAL 0x05 +#define V_028AC4_REF_GEQUAL 0x06 +#define V_028AC4_REF_ALWAYS 0x07 +#define S_028AC4_COMPAREVALUE1(x) (((unsigned)(x) & 0xFF) << 4) +#define G_028AC4_COMPAREVALUE1(x) (((x) >> 4) & 0xFF) +#define C_028AC4_COMPAREVALUE1 0xFFFFF00F +#define S_028AC4_COMPAREMASK1(x) (((unsigned)(x) & 0xFF) << 12) +#define G_028AC4_COMPAREMASK1(x) (((x) >> 12) & 0xFF) +#define C_028AC4_COMPAREMASK1 0xFFF00FFF +#define S_028AC4_ENABLE1(x) (((unsigned)(x) & 0x1) << 24) +#define G_028AC4_ENABLE1(x) (((x) >> 24) & 0x1) +#define C_028AC4_ENABLE1 0xFEFFFFFF +#define R_028AC8_DB_PRELOAD_CONTROL 0x028AC8 +#define S_028AC8_START_X(x) (((unsigned)(x) & 0xFF) << 0) +#define G_028AC8_START_X(x) (((x) >> 0) & 0xFF) +#define C_028AC8_START_X 0xFFFFFF00 +#define S_028AC8_START_Y(x) (((unsigned)(x) & 0xFF) << 8) +#define G_028AC8_START_Y(x) (((x) >> 8) & 0xFF) +#define C_028AC8_START_Y 0xFFFF00FF +#define S_028AC8_MAX_X(x) (((unsigned)(x) & 0xFF) << 16) +#define G_028AC8_MAX_X(x) (((x) >> 16) & 0xFF) +#define C_028AC8_MAX_X 0xFF00FFFF +#define S_028AC8_MAX_Y(x) (((unsigned)(x) & 0xFF) << 24) +#define G_028AC8_MAX_Y(x) (((x) >> 24) & 0xFF) +#define C_028AC8_MAX_Y 0x00FFFFFF +#define R_028AD0_VGT_STRMOUT_BUFFER_SIZE_0 0x028AD0 +#define R_028AD4_VGT_STRMOUT_VTX_STRIDE_0 0x028AD4 +#define S_028AD4_STRIDE(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_028AD4_STRIDE(x) (((x) >> 0) & 0x3FF) +#define C_028AD4_STRIDE 0xFFFFFC00 +#define R_028ADC_VGT_STRMOUT_BUFFER_OFFSET_0 0x028ADC +#define R_028AE0_VGT_STRMOUT_BUFFER_SIZE_1 0x028AE0 +#define R_028AE4_VGT_STRMOUT_VTX_STRIDE_1 0x028AE4 +#define S_028AE4_STRIDE(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_028AE4_STRIDE(x) (((x) >> 0) & 0x3FF) +#define C_028AE4_STRIDE 0xFFFFFC00 +#define R_028AEC_VGT_STRMOUT_BUFFER_OFFSET_1 0x028AEC +#define R_028AF0_VGT_STRMOUT_BUFFER_SIZE_2 0x028AF0 +#define R_028AF4_VGT_STRMOUT_VTX_STRIDE_2 0x028AF4 +#define S_028AF4_STRIDE(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_028AF4_STRIDE(x) (((x) >> 0) & 0x3FF) +#define C_028AF4_STRIDE 0xFFFFFC00 +#define R_028AFC_VGT_STRMOUT_BUFFER_OFFSET_2 0x028AFC +#define R_028B00_VGT_STRMOUT_BUFFER_SIZE_3 0x028B00 +#define R_028B04_VGT_STRMOUT_VTX_STRIDE_3 0x028B04 +#define S_028B04_STRIDE(x) (((unsigned)(x) & 0x3FF) << 0) +#define G_028B04_STRIDE(x) (((x) >> 0) & 0x3FF) +#define C_028B04_STRIDE 0xFFFFFC00 +#define R_028B0C_VGT_STRMOUT_BUFFER_OFFSET_3 0x028B0C +#define R_028B28_VGT_STRMOUT_DRAW_OPAQUE_OFFSET 0x028B28 +#define R_028B2C_VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE 0x028B2C +#define R_028B30_VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE 0x028B30 +#define S_028B30_VERTEX_STRIDE(x) (((unsigned)(x) & 0x1FF) << 0) +#define G_028B30_VERTEX_STRIDE(x) (((x) >> 0) & 0x1FF) +#define C_028B30_VERTEX_STRIDE 0xFFFFFE00 +#define R_028B38_VGT_GS_MAX_VERT_OUT 0x028B38 +#define S_028B38_MAX_VERT_OUT(x) (((unsigned)(x) & 0x7FF) << 0) +#define G_028B38_MAX_VERT_OUT(x) (((x) >> 0) & 0x7FF) +#define C_028B38_MAX_VERT_OUT 0xFFFFF800 +/* VI */ +#define R_028B50_VGT_TESS_DISTRIBUTION 0x028B50 +#define S_028B50_ACCUM_ISOLINE(x) (((unsigned)(x) & 0xFF) << 0) +#define G_028B50_ACCUM_ISOLINE(x) (((x) >> 0) & 0xFF) +#define C_028B50_ACCUM_ISOLINE 0xFFFFFF00 +#define S_028B50_ACCUM_TRI(x) (((unsigned)(x) & 0xFF) << 8) +#define G_028B50_ACCUM_TRI(x) (((x) >> 8) & 0xFF) +#define C_028B50_ACCUM_TRI 0xFFFF00FF +#define S_028B50_ACCUM_QUAD(x) (((unsigned)(x) & 0xFF) << 16) +#define G_028B50_ACCUM_QUAD(x) (((x) >> 16) & 0xFF) +#define C_028B50_ACCUM_QUAD 0xFF00FFFF +#define S_028B50_DONUT_SPLIT(x) (((unsigned)(x) & 0x1F) << 24) +#define G_028B50_DONUT_SPLIT(x) (((x) >> 24) & 0x1F) +#define C_028B50_DONUT_SPLIT 0xE0FFFFFF +#define S_028B50_TRAP_SPLIT(x) (((unsigned)(x) & 0x7) << 29) /* Fiji+ */ +#define G_028B50_TRAP_SPLIT(x) (((x) >> 29) & 0x7) +#define C_028B50_TRAP_SPLIT 0x1FFFFFFF +/* */ +#define R_028B54_VGT_SHADER_STAGES_EN 0x028B54 +#define S_028B54_LS_EN(x) (((unsigned)(x) & 0x03) << 0) +#define G_028B54_LS_EN(x) (((x) >> 0) & 0x03) +#define C_028B54_LS_EN 0xFFFFFFFC +#define V_028B54_LS_STAGE_OFF 0x00 +#define V_028B54_LS_STAGE_ON 0x01 +#define V_028B54_CS_STAGE_ON 0x02 +#define S_028B54_HS_EN(x) (((unsigned)(x) & 0x1) << 2) +#define G_028B54_HS_EN(x) (((x) >> 2) & 0x1) +#define C_028B54_HS_EN 0xFFFFFFFB +#define S_028B54_ES_EN(x) (((unsigned)(x) & 0x03) << 3) +#define G_028B54_ES_EN(x) (((x) >> 3) & 0x03) +#define C_028B54_ES_EN 0xFFFFFFE7 +#define V_028B54_ES_STAGE_OFF 0x00 +#define V_028B54_ES_STAGE_DS 0x01 +#define V_028B54_ES_STAGE_REAL 0x02 +#define S_028B54_GS_EN(x) (((unsigned)(x) & 0x1) << 5) +#define G_028B54_GS_EN(x) (((x) >> 5) & 0x1) +#define C_028B54_GS_EN 0xFFFFFFDF +#define S_028B54_VS_EN(x) (((unsigned)(x) & 0x03) << 6) +#define G_028B54_VS_EN(x) (((x) >> 6) & 0x03) +#define C_028B54_VS_EN 0xFFFFFF3F +#define V_028B54_VS_STAGE_REAL 0x00 +#define V_028B54_VS_STAGE_DS 0x01 +#define V_028B54_VS_STAGE_COPY_SHADER 0x02 +#define S_028B54_DYNAMIC_HS(x) (((unsigned)(x) & 0x1) << 8) +#define G_028B54_DYNAMIC_HS(x) (((x) >> 8) & 0x1) +#define C_028B54_DYNAMIC_HS 0xFFFFFEFF +/* VI */ +#define S_028B54_DISPATCH_DRAW_EN(x) (((unsigned)(x) & 0x1) << 9) +#define G_028B54_DISPATCH_DRAW_EN(x) (((x) >> 9) & 0x1) +#define C_028B54_DISPATCH_DRAW_EN 0xFFFFFDFF +#define S_028B54_DIS_DEALLOC_ACCUM_0(x) (((unsigned)(x) & 0x1) << 10) +#define G_028B54_DIS_DEALLOC_ACCUM_0(x) (((x) >> 10) & 0x1) +#define C_028B54_DIS_DEALLOC_ACCUM_0 0xFFFFFBFF +#define S_028B54_DIS_DEALLOC_ACCUM_1(x) (((unsigned)(x) & 0x1) << 11) +#define G_028B54_DIS_DEALLOC_ACCUM_1(x) (((x) >> 11) & 0x1) +#define C_028B54_DIS_DEALLOC_ACCUM_1 0xFFFFF7FF +#define S_028B54_VS_WAVE_ID_EN(x) (((unsigned)(x) & 0x1) << 12) +#define G_028B54_VS_WAVE_ID_EN(x) (((x) >> 12) & 0x1) +#define C_028B54_VS_WAVE_ID_EN 0xFFFFEFFF +/* */ +#define R_028B58_VGT_LS_HS_CONFIG 0x028B58 +#define S_028B58_NUM_PATCHES(x) (((unsigned)(x) & 0xFF) << 0) +#define G_028B58_NUM_PATCHES(x) (((x) >> 0) & 0xFF) +#define C_028B58_NUM_PATCHES 0xFFFFFF00 +#define S_028B58_HS_NUM_INPUT_CP(x) (((unsigned)(x) & 0x3F) << 8) +#define G_028B58_HS_NUM_INPUT_CP(x) (((x) >> 8) & 0x3F) +#define C_028B58_HS_NUM_INPUT_CP 0xFFFFC0FF +#define S_028B58_HS_NUM_OUTPUT_CP(x) (((unsigned)(x) & 0x3F) << 14) +#define G_028B58_HS_NUM_OUTPUT_CP(x) (((x) >> 14) & 0x3F) +#define C_028B58_HS_NUM_OUTPUT_CP 0xFFF03FFF +#define R_028B5C_VGT_GS_VERT_ITEMSIZE 0x028B5C +#define S_028B5C_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) +#define G_028B5C_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) +#define C_028B5C_ITEMSIZE 0xFFFF8000 +#define R_028B60_VGT_GS_VERT_ITEMSIZE_1 0x028B60 +#define S_028B60_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) +#define G_028B60_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) +#define C_028B60_ITEMSIZE 0xFFFF8000 +#define R_028B64_VGT_GS_VERT_ITEMSIZE_2 0x028B64 +#define S_028B64_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) +#define G_028B64_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) +#define C_028B64_ITEMSIZE 0xFFFF8000 +#define R_028B68_VGT_GS_VERT_ITEMSIZE_3 0x028B68 +#define S_028B68_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) +#define G_028B68_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) +#define C_028B68_ITEMSIZE 0xFFFF8000 +#define R_028B6C_VGT_TF_PARAM 0x028B6C +#define S_028B6C_TYPE(x) (((unsigned)(x) & 0x03) << 0) +#define G_028B6C_TYPE(x) (((x) >> 0) & 0x03) +#define C_028B6C_TYPE 0xFFFFFFFC +#define V_028B6C_TESS_ISOLINE 0x00 +#define V_028B6C_TESS_TRIANGLE 0x01 +#define V_028B6C_TESS_QUAD 0x02 +#define S_028B6C_PARTITIONING(x) (((unsigned)(x) & 0x07) << 2) +#define G_028B6C_PARTITIONING(x) (((x) >> 2) & 0x07) +#define C_028B6C_PARTITIONING 0xFFFFFFE3 +#define V_028B6C_PART_INTEGER 0x00 +#define V_028B6C_PART_POW2 0x01 +#define V_028B6C_PART_FRAC_ODD 0x02 +#define V_028B6C_PART_FRAC_EVEN 0x03 +#define S_028B6C_TOPOLOGY(x) (((unsigned)(x) & 0x07) << 5) +#define G_028B6C_TOPOLOGY(x) (((x) >> 5) & 0x07) +#define C_028B6C_TOPOLOGY 0xFFFFFF1F +#define V_028B6C_OUTPUT_POINT 0x00 +#define V_028B6C_OUTPUT_LINE 0x01 +#define V_028B6C_OUTPUT_TRIANGLE_CW 0x02 +#define V_028B6C_OUTPUT_TRIANGLE_CCW 0x03 +#define S_028B6C_RESERVED_REDUC_AXIS(x) (((unsigned)(x) & 0x1) << 8) /* not on CIK */ +#define G_028B6C_RESERVED_REDUC_AXIS(x) (((x) >> 8) & 0x1) /* not on CIK */ +#define C_028B6C_RESERVED_REDUC_AXIS 0xFFFFFEFF /* not on CIK */ +#define S_028B6C_DEPRECATED(x) (((unsigned)(x) & 0x1) << 9) +#define G_028B6C_DEPRECATED(x) (((x) >> 9) & 0x1) +#define C_028B6C_DEPRECATED 0xFFFFFDFF +#define S_028B6C_NUM_DS_WAVES_PER_SIMD(x) (((unsigned)(x) & 0x0F) << 10) +#define G_028B6C_NUM_DS_WAVES_PER_SIMD(x) (((x) >> 10) & 0x0F) +#define C_028B6C_NUM_DS_WAVES_PER_SIMD 0xFFFFC3FF +#define S_028B6C_DISABLE_DONUTS(x) (((unsigned)(x) & 0x1) << 14) +#define G_028B6C_DISABLE_DONUTS(x) (((x) >> 14) & 0x1) +#define C_028B6C_DISABLE_DONUTS 0xFFFFBFFF +/* CIK */ +#define S_028B6C_RDREQ_POLICY(x) (((unsigned)(x) & 0x03) << 15) +#define G_028B6C_RDREQ_POLICY(x) (((x) >> 15) & 0x03) +#define C_028B6C_RDREQ_POLICY 0xFFFE7FFF +#define V_028B6C_VGT_POLICY_LRU 0x00 +#define V_028B6C_VGT_POLICY_STREAM 0x01 +#define V_028B6C_VGT_POLICY_BYPASS 0x02 +/* */ +/* VI */ +#define S_028B6C_RDREQ_POLICY_VI(x) (((unsigned)(x) & 0x1) << 15) +#define G_028B6C_RDREQ_POLICY_VI(x) (((x) >> 15) & 0x1) +#define C_028B6C_RDREQ_POLICY_VI 0xFFFF7FFF +#define S_028B6C_DISTRIBUTION_MODE(x) (((unsigned)(x) & 0x03) << 17) +#define G_028B6C_DISTRIBUTION_MODE(x) (((x) >> 17) & 0x03) +#define C_028B6C_DISTRIBUTION_MODE 0xFFF9FFFF +#define V_028B6C_DISTRIBUTION_MODE_NO_DIST 0x00 +#define V_028B6C_DISTRIBUTION_MODE_PATCHES 0x01 +#define V_028B6C_DISTRIBUTION_MODE_DONUTS 0x02 +#define V_028B6C_DISTRIBUTION_MODE_TRAPEZOIDS 0x03 /* Fiji+ */ +#define S_028B6C_MTYPE(x) (((unsigned)(x) & 0x03) << 19) +#define G_028B6C_MTYPE(x) (((x) >> 19) & 0x03) +#define C_028B6C_MTYPE 0xFFE7FFFF +/* */ +#define R_028B70_DB_ALPHA_TO_MASK 0x028B70 +#define S_028B70_ALPHA_TO_MASK_ENABLE(x) (((unsigned)(x) & 0x1) << 0) +#define G_028B70_ALPHA_TO_MASK_ENABLE(x) (((x) >> 0) & 0x1) +#define C_028B70_ALPHA_TO_MASK_ENABLE 0xFFFFFFFE +#define S_028B70_ALPHA_TO_MASK_OFFSET0(x) (((unsigned)(x) & 0x03) << 8) +#define G_028B70_ALPHA_TO_MASK_OFFSET0(x) (((x) >> 8) & 0x03) +#define C_028B70_ALPHA_TO_MASK_OFFSET0 0xFFFFFCFF +#define S_028B70_ALPHA_TO_MASK_OFFSET1(x) (((unsigned)(x) & 0x03) << 10) +#define G_028B70_ALPHA_TO_MASK_OFFSET1(x) (((x) >> 10) & 0x03) +#define C_028B70_ALPHA_TO_MASK_OFFSET1 0xFFFFF3FF +#define S_028B70_ALPHA_TO_MASK_OFFSET2(x) (((unsigned)(x) & 0x03) << 12) +#define G_028B70_ALPHA_TO_MASK_OFFSET2(x) (((x) >> 12) & 0x03) +#define C_028B70_ALPHA_TO_MASK_OFFSET2 0xFFFFCFFF +#define S_028B70_ALPHA_TO_MASK_OFFSET3(x) (((unsigned)(x) & 0x03) << 14) +#define G_028B70_ALPHA_TO_MASK_OFFSET3(x) (((x) >> 14) & 0x03) +#define C_028B70_ALPHA_TO_MASK_OFFSET3 0xFFFF3FFF +#define S_028B70_OFFSET_ROUND(x) (((unsigned)(x) & 0x1) << 16) +#define G_028B70_OFFSET_ROUND(x) (((x) >> 16) & 0x1) +#define C_028B70_OFFSET_ROUND 0xFFFEFFFF +/* CIK */ +#define R_028B74_VGT_DISPATCH_DRAW_INDEX 0x028B74 +/* */ +#define R_028B78_PA_SU_POLY_OFFSET_DB_FMT_CNTL 0x028B78 +#define S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(x) (((unsigned)(x) & 0xFF) << 0) +#define G_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(x) (((x) >> 0) & 0xFF) +#define C_028B78_POLY_OFFSET_NEG_NUM_DB_BITS 0xFFFFFF00 +#define S_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(x) (((unsigned)(x) & 0x1) << 8) +#define G_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(x) (((x) >> 8) & 0x1) +#define C_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT 0xFFFFFEFF +#define R_028B7C_PA_SU_POLY_OFFSET_CLAMP 0x028B7C +#define R_028B80_PA_SU_POLY_OFFSET_FRONT_SCALE 0x028B80 +#define R_028B84_PA_SU_POLY_OFFSET_FRONT_OFFSET 0x028B84 +#define R_028B88_PA_SU_POLY_OFFSET_BACK_SCALE 0x028B88 +#define R_028B8C_PA_SU_POLY_OFFSET_BACK_OFFSET 0x028B8C +#define R_028B90_VGT_GS_INSTANCE_CNT 0x028B90 +#define S_028B90_ENABLE(x) (((unsigned)(x) & 0x1) << 0) +#define G_028B90_ENABLE(x) (((x) >> 0) & 0x1) +#define C_028B90_ENABLE 0xFFFFFFFE +#define S_028B90_CNT(x) (((unsigned)(x) & 0x7F) << 2) +#define G_028B90_CNT(x) (((x) >> 2) & 0x7F) +#define C_028B90_CNT 0xFFFFFE03 +#define R_028B94_VGT_STRMOUT_CONFIG 0x028B94 +#define S_028B94_STREAMOUT_0_EN(x) (((unsigned)(x) & 0x1) << 0) +#define G_028B94_STREAMOUT_0_EN(x) (((x) >> 0) & 0x1) +#define C_028B94_STREAMOUT_0_EN 0xFFFFFFFE +#define S_028B94_STREAMOUT_1_EN(x) (((unsigned)(x) & 0x1) << 1) +#define G_028B94_STREAMOUT_1_EN(x) (((x) >> 1) & 0x1) +#define C_028B94_STREAMOUT_1_EN 0xFFFFFFFD +#define S_028B94_STREAMOUT_2_EN(x) (((unsigned)(x) & 0x1) << 2) +#define G_028B94_STREAMOUT_2_EN(x) (((x) >> 2) & 0x1) +#define C_028B94_STREAMOUT_2_EN 0xFFFFFFFB +#define S_028B94_STREAMOUT_3_EN(x) (((unsigned)(x) & 0x1) << 3) +#define G_028B94_STREAMOUT_3_EN(x) (((x) >> 3) & 0x1) +#define C_028B94_STREAMOUT_3_EN 0xFFFFFFF7 +#define S_028B94_RAST_STREAM(x) (((unsigned)(x) & 0x07) << 4) +#define G_028B94_RAST_STREAM(x) (((x) >> 4) & 0x07) +#define C_028B94_RAST_STREAM 0xFFFFFF8F +#define S_028B94_RAST_STREAM_MASK(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028B94_RAST_STREAM_MASK(x) (((x) >> 8) & 0x0F) +#define C_028B94_RAST_STREAM_MASK 0xFFFFF0FF +#define S_028B94_USE_RAST_STREAM_MASK(x) (((unsigned)(x) & 0x1) << 31) +#define G_028B94_USE_RAST_STREAM_MASK(x) (((x) >> 31) & 0x1) +#define C_028B94_USE_RAST_STREAM_MASK 0x7FFFFFFF +#define R_028B98_VGT_STRMOUT_BUFFER_CONFIG 0x028B98 +#define S_028B98_STREAM_0_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028B98_STREAM_0_BUFFER_EN(x) (((x) >> 0) & 0x0F) +#define C_028B98_STREAM_0_BUFFER_EN 0xFFFFFFF0 +#define S_028B98_STREAM_1_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028B98_STREAM_1_BUFFER_EN(x) (((x) >> 4) & 0x0F) +#define C_028B98_STREAM_1_BUFFER_EN 0xFFFFFF0F +#define S_028B98_STREAM_2_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028B98_STREAM_2_BUFFER_EN(x) (((x) >> 8) & 0x0F) +#define C_028B98_STREAM_2_BUFFER_EN 0xFFFFF0FF +#define S_028B98_STREAM_3_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028B98_STREAM_3_BUFFER_EN(x) (((x) >> 12) & 0x0F) +#define C_028B98_STREAM_3_BUFFER_EN 0xFFFF0FFF +#define R_028BD4_PA_SC_CENTROID_PRIORITY_0 0x028BD4 +#define S_028BD4_DISTANCE_0(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028BD4_DISTANCE_0(x) (((x) >> 0) & 0x0F) +#define C_028BD4_DISTANCE_0 0xFFFFFFF0 +#define S_028BD4_DISTANCE_1(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028BD4_DISTANCE_1(x) (((x) >> 4) & 0x0F) +#define C_028BD4_DISTANCE_1 0xFFFFFF0F +#define S_028BD4_DISTANCE_2(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028BD4_DISTANCE_2(x) (((x) >> 8) & 0x0F) +#define C_028BD4_DISTANCE_2 0xFFFFF0FF +#define S_028BD4_DISTANCE_3(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028BD4_DISTANCE_3(x) (((x) >> 12) & 0x0F) +#define C_028BD4_DISTANCE_3 0xFFFF0FFF +#define S_028BD4_DISTANCE_4(x) (((unsigned)(x) & 0x0F) << 16) +#define G_028BD4_DISTANCE_4(x) (((x) >> 16) & 0x0F) +#define C_028BD4_DISTANCE_4 0xFFF0FFFF +#define S_028BD4_DISTANCE_5(x) (((unsigned)(x) & 0x0F) << 20) +#define G_028BD4_DISTANCE_5(x) (((x) >> 20) & 0x0F) +#define C_028BD4_DISTANCE_5 0xFF0FFFFF +#define S_028BD4_DISTANCE_6(x) (((unsigned)(x) & 0x0F) << 24) +#define G_028BD4_DISTANCE_6(x) (((x) >> 24) & 0x0F) +#define C_028BD4_DISTANCE_6 0xF0FFFFFF +#define S_028BD4_DISTANCE_7(x) (((unsigned)(x) & 0x0F) << 28) +#define G_028BD4_DISTANCE_7(x) (((x) >> 28) & 0x0F) +#define C_028BD4_DISTANCE_7 0x0FFFFFFF +#define R_028BD8_PA_SC_CENTROID_PRIORITY_1 0x028BD8 +#define S_028BD8_DISTANCE_8(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028BD8_DISTANCE_8(x) (((x) >> 0) & 0x0F) +#define C_028BD8_DISTANCE_8 0xFFFFFFF0 +#define S_028BD8_DISTANCE_9(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028BD8_DISTANCE_9(x) (((x) >> 4) & 0x0F) +#define C_028BD8_DISTANCE_9 0xFFFFFF0F +#define S_028BD8_DISTANCE_10(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028BD8_DISTANCE_10(x) (((x) >> 8) & 0x0F) +#define C_028BD8_DISTANCE_10 0xFFFFF0FF +#define S_028BD8_DISTANCE_11(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028BD8_DISTANCE_11(x) (((x) >> 12) & 0x0F) +#define C_028BD8_DISTANCE_11 0xFFFF0FFF +#define S_028BD8_DISTANCE_12(x) (((unsigned)(x) & 0x0F) << 16) +#define G_028BD8_DISTANCE_12(x) (((x) >> 16) & 0x0F) +#define C_028BD8_DISTANCE_12 0xFFF0FFFF +#define S_028BD8_DISTANCE_13(x) (((unsigned)(x) & 0x0F) << 20) +#define G_028BD8_DISTANCE_13(x) (((x) >> 20) & 0x0F) +#define C_028BD8_DISTANCE_13 0xFF0FFFFF +#define S_028BD8_DISTANCE_14(x) (((unsigned)(x) & 0x0F) << 24) +#define G_028BD8_DISTANCE_14(x) (((x) >> 24) & 0x0F) +#define C_028BD8_DISTANCE_14 0xF0FFFFFF +#define S_028BD8_DISTANCE_15(x) (((unsigned)(x) & 0x0F) << 28) +#define G_028BD8_DISTANCE_15(x) (((x) >> 28) & 0x0F) +#define C_028BD8_DISTANCE_15 0x0FFFFFFF +#define R_028BDC_PA_SC_LINE_CNTL 0x028BDC +#define S_028BDC_EXPAND_LINE_WIDTH(x) (((unsigned)(x) & 0x1) << 9) +#define G_028BDC_EXPAND_LINE_WIDTH(x) (((x) >> 9) & 0x1) +#define C_028BDC_EXPAND_LINE_WIDTH 0xFFFFFDFF +#define S_028BDC_LAST_PIXEL(x) (((unsigned)(x) & 0x1) << 10) +#define G_028BDC_LAST_PIXEL(x) (((x) >> 10) & 0x1) +#define C_028BDC_LAST_PIXEL 0xFFFFFBFF +#define S_028BDC_PERPENDICULAR_ENDCAP_ENA(x) (((unsigned)(x) & 0x1) << 11) +#define G_028BDC_PERPENDICULAR_ENDCAP_ENA(x) (((x) >> 11) & 0x1) +#define C_028BDC_PERPENDICULAR_ENDCAP_ENA 0xFFFFF7FF +#define S_028BDC_DX10_DIAMOND_TEST_ENA(x) (((unsigned)(x) & 0x1) << 12) +#define G_028BDC_DX10_DIAMOND_TEST_ENA(x) (((x) >> 12) & 0x1) +#define C_028BDC_DX10_DIAMOND_TEST_ENA 0xFFFFEFFF +#define R_028BE0_PA_SC_AA_CONFIG 0x028BE0 +#define S_028BE0_MSAA_NUM_SAMPLES(x) (((unsigned)(x) & 0x7) << 0) +#define G_028BE0_MSAA_NUM_SAMPLES(x) (((x) >> 0) & 0x07) +#define C_028BE0_MSAA_NUM_SAMPLES 0xFFFFFFF8 +#define S_028BE0_AA_MASK_CENTROID_DTMN(x) (((unsigned)(x) & 0x1) << 4) +#define G_028BE0_AA_MASK_CENTROID_DTMN(x) (((x) >> 4) & 0x1) +#define C_028BE0_AA_MASK_CENTROID_DTMN 0xFFFFFFEF +#define S_028BE0_MAX_SAMPLE_DIST(x) (((unsigned)(x) & 0xf) << 13) +#define G_028BE0_MAX_SAMPLE_DIST(x) (((x) >> 13) & 0x0F) +#define C_028BE0_MAX_SAMPLE_DIST 0xFFFE1FFF +#define S_028BE0_MSAA_EXPOSED_SAMPLES(x) (((unsigned)(x) & 0x7) << 20) +#define G_028BE0_MSAA_EXPOSED_SAMPLES(x) (((x) >> 20) & 0x07) +#define C_028BE0_MSAA_EXPOSED_SAMPLES 0xFF8FFFFF +#define S_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((unsigned)(x) & 0x3) << 24) +#define G_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((x) >> 24) & 0x03) +#define C_028BE0_DETAIL_TO_EXPOSED_MODE 0xFCFFFFFF +#define R_028BE4_PA_SU_VTX_CNTL 0x028BE4 +#define S_028BE4_PIX_CENTER(x) (((unsigned)(x) & 0x1) << 0) +#define G_028BE4_PIX_CENTER(x) (((x) >> 0) & 0x1) +#define C_028BE4_PIX_CENTER 0xFFFFFFFE +#define S_028BE4_ROUND_MODE(x) (((unsigned)(x) & 0x03) << 1) +#define G_028BE4_ROUND_MODE(x) (((x) >> 1) & 0x03) +#define C_028BE4_ROUND_MODE 0xFFFFFFF9 +#define V_028BE4_X_TRUNCATE 0x00 +#define V_028BE4_X_ROUND 0x01 +#define V_028BE4_X_ROUND_TO_EVEN 0x02 +#define V_028BE4_X_ROUND_TO_ODD 0x03 +#define S_028BE4_QUANT_MODE(x) (((unsigned)(x) & 0x07) << 3) +#define G_028BE4_QUANT_MODE(x) (((x) >> 3) & 0x07) +#define C_028BE4_QUANT_MODE 0xFFFFFFC7 +#define V_028BE4_X_16_8_FIXED_POINT_1_16TH 0x00 +#define V_028BE4_X_16_8_FIXED_POINT_1_8TH 0x01 +#define V_028BE4_X_16_8_FIXED_POINT_1_4TH 0x02 +#define V_028BE4_X_16_8_FIXED_POINT_1_2 0x03 +#define V_028BE4_X_16_8_FIXED_POINT_1 0x04 +#define V_028BE4_X_16_8_FIXED_POINT_1_256TH 0x05 +#define V_028BE4_X_14_10_FIXED_POINT_1_1024TH 0x06 +#define V_028BE4_X_12_12_FIXED_POINT_1_4096TH 0x07 +#define R_028BE8_PA_CL_GB_VERT_CLIP_ADJ 0x028BE8 +#define R_028BEC_PA_CL_GB_VERT_DISC_ADJ 0x028BEC +#define R_028BF0_PA_CL_GB_HORZ_CLIP_ADJ 0x028BF0 +#define R_028BF4_PA_CL_GB_HORZ_DISC_ADJ 0x028BF4 +#define R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 0x028BF8 +#define S_028BF8_S0_X(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028BF8_S0_X(x) (((x) >> 0) & 0x0F) +#define C_028BF8_S0_X 0xFFFFFFF0 +#define S_028BF8_S0_Y(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028BF8_S0_Y(x) (((x) >> 4) & 0x0F) +#define C_028BF8_S0_Y 0xFFFFFF0F +#define S_028BF8_S1_X(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028BF8_S1_X(x) (((x) >> 8) & 0x0F) +#define C_028BF8_S1_X 0xFFFFF0FF +#define S_028BF8_S1_Y(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028BF8_S1_Y(x) (((x) >> 12) & 0x0F) +#define C_028BF8_S1_Y 0xFFFF0FFF +#define S_028BF8_S2_X(x) (((unsigned)(x) & 0x0F) << 16) +#define G_028BF8_S2_X(x) (((x) >> 16) & 0x0F) +#define C_028BF8_S2_X 0xFFF0FFFF +#define S_028BF8_S2_Y(x) (((unsigned)(x) & 0x0F) << 20) +#define G_028BF8_S2_Y(x) (((x) >> 20) & 0x0F) +#define C_028BF8_S2_Y 0xFF0FFFFF +#define S_028BF8_S3_X(x) (((unsigned)(x) & 0x0F) << 24) +#define G_028BF8_S3_X(x) (((x) >> 24) & 0x0F) +#define C_028BF8_S3_X 0xF0FFFFFF +#define S_028BF8_S3_Y(x) (((unsigned)(x) & 0x0F) << 28) +#define G_028BF8_S3_Y(x) (((x) >> 28) & 0x0F) +#define C_028BF8_S3_Y 0x0FFFFFFF +#define R_028BFC_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1 0x028BFC +#define S_028BFC_S4_X(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028BFC_S4_X(x) (((x) >> 0) & 0x0F) +#define C_028BFC_S4_X 0xFFFFFFF0 +#define S_028BFC_S4_Y(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028BFC_S4_Y(x) (((x) >> 4) & 0x0F) +#define C_028BFC_S4_Y 0xFFFFFF0F +#define S_028BFC_S5_X(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028BFC_S5_X(x) (((x) >> 8) & 0x0F) +#define C_028BFC_S5_X 0xFFFFF0FF +#define S_028BFC_S5_Y(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028BFC_S5_Y(x) (((x) >> 12) & 0x0F) +#define C_028BFC_S5_Y 0xFFFF0FFF +#define S_028BFC_S6_X(x) (((unsigned)(x) & 0x0F) << 16) +#define G_028BFC_S6_X(x) (((x) >> 16) & 0x0F) +#define C_028BFC_S6_X 0xFFF0FFFF +#define S_028BFC_S6_Y(x) (((unsigned)(x) & 0x0F) << 20) +#define G_028BFC_S6_Y(x) (((x) >> 20) & 0x0F) +#define C_028BFC_S6_Y 0xFF0FFFFF +#define S_028BFC_S7_X(x) (((unsigned)(x) & 0x0F) << 24) +#define G_028BFC_S7_X(x) (((x) >> 24) & 0x0F) +#define C_028BFC_S7_X 0xF0FFFFFF +#define S_028BFC_S7_Y(x) (((unsigned)(x) & 0x0F) << 28) +#define G_028BFC_S7_Y(x) (((x) >> 28) & 0x0F) +#define C_028BFC_S7_Y 0x0FFFFFFF +#define R_028C00_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2 0x028C00 +#define S_028C00_S8_X(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028C00_S8_X(x) (((x) >> 0) & 0x0F) +#define C_028C00_S8_X 0xFFFFFFF0 +#define S_028C00_S8_Y(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028C00_S8_Y(x) (((x) >> 4) & 0x0F) +#define C_028C00_S8_Y 0xFFFFFF0F +#define S_028C00_S9_X(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028C00_S9_X(x) (((x) >> 8) & 0x0F) +#define C_028C00_S9_X 0xFFFFF0FF +#define S_028C00_S9_Y(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028C00_S9_Y(x) (((x) >> 12) & 0x0F) +#define C_028C00_S9_Y 0xFFFF0FFF +#define S_028C00_S10_X(x) (((unsigned)(x) & 0x0F) << 16) +#define G_028C00_S10_X(x) (((x) >> 16) & 0x0F) +#define C_028C00_S10_X 0xFFF0FFFF +#define S_028C00_S10_Y(x) (((unsigned)(x) & 0x0F) << 20) +#define G_028C00_S10_Y(x) (((x) >> 20) & 0x0F) +#define C_028C00_S10_Y 0xFF0FFFFF +#define S_028C00_S11_X(x) (((unsigned)(x) & 0x0F) << 24) +#define G_028C00_S11_X(x) (((x) >> 24) & 0x0F) +#define C_028C00_S11_X 0xF0FFFFFF +#define S_028C00_S11_Y(x) (((unsigned)(x) & 0x0F) << 28) +#define G_028C00_S11_Y(x) (((x) >> 28) & 0x0F) +#define C_028C00_S11_Y 0x0FFFFFFF +#define R_028C04_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3 0x028C04 +#define S_028C04_S12_X(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028C04_S12_X(x) (((x) >> 0) & 0x0F) +#define C_028C04_S12_X 0xFFFFFFF0 +#define S_028C04_S12_Y(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028C04_S12_Y(x) (((x) >> 4) & 0x0F) +#define C_028C04_S12_Y 0xFFFFFF0F +#define S_028C04_S13_X(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028C04_S13_X(x) (((x) >> 8) & 0x0F) +#define C_028C04_S13_X 0xFFFFF0FF +#define S_028C04_S13_Y(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028C04_S13_Y(x) (((x) >> 12) & 0x0F) +#define C_028C04_S13_Y 0xFFFF0FFF +#define S_028C04_S14_X(x) (((unsigned)(x) & 0x0F) << 16) +#define G_028C04_S14_X(x) (((x) >> 16) & 0x0F) +#define C_028C04_S14_X 0xFFF0FFFF +#define S_028C04_S14_Y(x) (((unsigned)(x) & 0x0F) << 20) +#define G_028C04_S14_Y(x) (((x) >> 20) & 0x0F) +#define C_028C04_S14_Y 0xFF0FFFFF +#define S_028C04_S15_X(x) (((unsigned)(x) & 0x0F) << 24) +#define G_028C04_S15_X(x) (((x) >> 24) & 0x0F) +#define C_028C04_S15_X 0xF0FFFFFF +#define S_028C04_S15_Y(x) (((unsigned)(x) & 0x0F) << 28) +#define G_028C04_S15_Y(x) (((x) >> 28) & 0x0F) +#define C_028C04_S15_Y 0x0FFFFFFF +#define R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0 0x028C08 +#define S_028C08_S0_X(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028C08_S0_X(x) (((x) >> 0) & 0x0F) +#define C_028C08_S0_X 0xFFFFFFF0 +#define S_028C08_S0_Y(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028C08_S0_Y(x) (((x) >> 4) & 0x0F) +#define C_028C08_S0_Y 0xFFFFFF0F +#define S_028C08_S1_X(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028C08_S1_X(x) (((x) >> 8) & 0x0F) +#define C_028C08_S1_X 0xFFFFF0FF +#define S_028C08_S1_Y(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028C08_S1_Y(x) (((x) >> 12) & 0x0F) +#define C_028C08_S1_Y 0xFFFF0FFF +#define S_028C08_S2_X(x) (((unsigned)(x) & 0x0F) << 16) +#define G_028C08_S2_X(x) (((x) >> 16) & 0x0F) +#define C_028C08_S2_X 0xFFF0FFFF +#define S_028C08_S2_Y(x) (((unsigned)(x) & 0x0F) << 20) +#define G_028C08_S2_Y(x) (((x) >> 20) & 0x0F) +#define C_028C08_S2_Y 0xFF0FFFFF +#define S_028C08_S3_X(x) (((unsigned)(x) & 0x0F) << 24) +#define G_028C08_S3_X(x) (((x) >> 24) & 0x0F) +#define C_028C08_S3_X 0xF0FFFFFF +#define S_028C08_S3_Y(x) (((unsigned)(x) & 0x0F) << 28) +#define G_028C08_S3_Y(x) (((x) >> 28) & 0x0F) +#define C_028C08_S3_Y 0x0FFFFFFF +#define R_028C0C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1 0x028C0C +#define S_028C0C_S4_X(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028C0C_S4_X(x) (((x) >> 0) & 0x0F) +#define C_028C0C_S4_X 0xFFFFFFF0 +#define S_028C0C_S4_Y(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028C0C_S4_Y(x) (((x) >> 4) & 0x0F) +#define C_028C0C_S4_Y 0xFFFFFF0F +#define S_028C0C_S5_X(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028C0C_S5_X(x) (((x) >> 8) & 0x0F) +#define C_028C0C_S5_X 0xFFFFF0FF +#define S_028C0C_S5_Y(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028C0C_S5_Y(x) (((x) >> 12) & 0x0F) +#define C_028C0C_S5_Y 0xFFFF0FFF +#define S_028C0C_S6_X(x) (((unsigned)(x) & 0x0F) << 16) +#define G_028C0C_S6_X(x) (((x) >> 16) & 0x0F) +#define C_028C0C_S6_X 0xFFF0FFFF +#define S_028C0C_S6_Y(x) (((unsigned)(x) & 0x0F) << 20) +#define G_028C0C_S6_Y(x) (((x) >> 20) & 0x0F) +#define C_028C0C_S6_Y 0xFF0FFFFF +#define S_028C0C_S7_X(x) (((unsigned)(x) & 0x0F) << 24) +#define G_028C0C_S7_X(x) (((x) >> 24) & 0x0F) +#define C_028C0C_S7_X 0xF0FFFFFF +#define S_028C0C_S7_Y(x) (((unsigned)(x) & 0x0F) << 28) +#define G_028C0C_S7_Y(x) (((x) >> 28) & 0x0F) +#define C_028C0C_S7_Y 0x0FFFFFFF +#define R_028C10_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2 0x028C10 +#define S_028C10_S8_X(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028C10_S8_X(x) (((x) >> 0) & 0x0F) +#define C_028C10_S8_X 0xFFFFFFF0 +#define S_028C10_S8_Y(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028C10_S8_Y(x) (((x) >> 4) & 0x0F) +#define C_028C10_S8_Y 0xFFFFFF0F +#define S_028C10_S9_X(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028C10_S9_X(x) (((x) >> 8) & 0x0F) +#define C_028C10_S9_X 0xFFFFF0FF +#define S_028C10_S9_Y(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028C10_S9_Y(x) (((x) >> 12) & 0x0F) +#define C_028C10_S9_Y 0xFFFF0FFF +#define S_028C10_S10_X(x) (((unsigned)(x) & 0x0F) << 16) +#define G_028C10_S10_X(x) (((x) >> 16) & 0x0F) +#define C_028C10_S10_X 0xFFF0FFFF +#define S_028C10_S10_Y(x) (((unsigned)(x) & 0x0F) << 20) +#define G_028C10_S10_Y(x) (((x) >> 20) & 0x0F) +#define C_028C10_S10_Y 0xFF0FFFFF +#define S_028C10_S11_X(x) (((unsigned)(x) & 0x0F) << 24) +#define G_028C10_S11_X(x) (((x) >> 24) & 0x0F) +#define C_028C10_S11_X 0xF0FFFFFF +#define S_028C10_S11_Y(x) (((unsigned)(x) & 0x0F) << 28) +#define G_028C10_S11_Y(x) (((x) >> 28) & 0x0F) +#define C_028C10_S11_Y 0x0FFFFFFF +#define R_028C14_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3 0x028C14 +#define S_028C14_S12_X(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028C14_S12_X(x) (((x) >> 0) & 0x0F) +#define C_028C14_S12_X 0xFFFFFFF0 +#define S_028C14_S12_Y(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028C14_S12_Y(x) (((x) >> 4) & 0x0F) +#define C_028C14_S12_Y 0xFFFFFF0F +#define S_028C14_S13_X(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028C14_S13_X(x) (((x) >> 8) & 0x0F) +#define C_028C14_S13_X 0xFFFFF0FF +#define S_028C14_S13_Y(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028C14_S13_Y(x) (((x) >> 12) & 0x0F) +#define C_028C14_S13_Y 0xFFFF0FFF +#define S_028C14_S14_X(x) (((unsigned)(x) & 0x0F) << 16) +#define G_028C14_S14_X(x) (((x) >> 16) & 0x0F) +#define C_028C14_S14_X 0xFFF0FFFF +#define S_028C14_S14_Y(x) (((unsigned)(x) & 0x0F) << 20) +#define G_028C14_S14_Y(x) (((x) >> 20) & 0x0F) +#define C_028C14_S14_Y 0xFF0FFFFF +#define S_028C14_S15_X(x) (((unsigned)(x) & 0x0F) << 24) +#define G_028C14_S15_X(x) (((x) >> 24) & 0x0F) +#define C_028C14_S15_X 0xF0FFFFFF +#define S_028C14_S15_Y(x) (((unsigned)(x) & 0x0F) << 28) +#define G_028C14_S15_Y(x) (((x) >> 28) & 0x0F) +#define C_028C14_S15_Y 0x0FFFFFFF +#define R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0 0x028C18 +#define S_028C18_S0_X(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028C18_S0_X(x) (((x) >> 0) & 0x0F) +#define C_028C18_S0_X 0xFFFFFFF0 +#define S_028C18_S0_Y(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028C18_S0_Y(x) (((x) >> 4) & 0x0F) +#define C_028C18_S0_Y 0xFFFFFF0F +#define S_028C18_S1_X(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028C18_S1_X(x) (((x) >> 8) & 0x0F) +#define C_028C18_S1_X 0xFFFFF0FF +#define S_028C18_S1_Y(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028C18_S1_Y(x) (((x) >> 12) & 0x0F) +#define C_028C18_S1_Y 0xFFFF0FFF +#define S_028C18_S2_X(x) (((unsigned)(x) & 0x0F) << 16) +#define G_028C18_S2_X(x) (((x) >> 16) & 0x0F) +#define C_028C18_S2_X 0xFFF0FFFF +#define S_028C18_S2_Y(x) (((unsigned)(x) & 0x0F) << 20) +#define G_028C18_S2_Y(x) (((x) >> 20) & 0x0F) +#define C_028C18_S2_Y 0xFF0FFFFF +#define S_028C18_S3_X(x) (((unsigned)(x) & 0x0F) << 24) +#define G_028C18_S3_X(x) (((x) >> 24) & 0x0F) +#define C_028C18_S3_X 0xF0FFFFFF +#define S_028C18_S3_Y(x) (((unsigned)(x) & 0x0F) << 28) +#define G_028C18_S3_Y(x) (((x) >> 28) & 0x0F) +#define C_028C18_S3_Y 0x0FFFFFFF +#define R_028C1C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1 0x028C1C +#define S_028C1C_S4_X(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028C1C_S4_X(x) (((x) >> 0) & 0x0F) +#define C_028C1C_S4_X 0xFFFFFFF0 +#define S_028C1C_S4_Y(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028C1C_S4_Y(x) (((x) >> 4) & 0x0F) +#define C_028C1C_S4_Y 0xFFFFFF0F +#define S_028C1C_S5_X(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028C1C_S5_X(x) (((x) >> 8) & 0x0F) +#define C_028C1C_S5_X 0xFFFFF0FF +#define S_028C1C_S5_Y(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028C1C_S5_Y(x) (((x) >> 12) & 0x0F) +#define C_028C1C_S5_Y 0xFFFF0FFF +#define S_028C1C_S6_X(x) (((unsigned)(x) & 0x0F) << 16) +#define G_028C1C_S6_X(x) (((x) >> 16) & 0x0F) +#define C_028C1C_S6_X 0xFFF0FFFF +#define S_028C1C_S6_Y(x) (((unsigned)(x) & 0x0F) << 20) +#define G_028C1C_S6_Y(x) (((x) >> 20) & 0x0F) +#define C_028C1C_S6_Y 0xFF0FFFFF +#define S_028C1C_S7_X(x) (((unsigned)(x) & 0x0F) << 24) +#define G_028C1C_S7_X(x) (((x) >> 24) & 0x0F) +#define C_028C1C_S7_X 0xF0FFFFFF +#define S_028C1C_S7_Y(x) (((unsigned)(x) & 0x0F) << 28) +#define G_028C1C_S7_Y(x) (((x) >> 28) & 0x0F) +#define C_028C1C_S7_Y 0x0FFFFFFF +#define R_028C20_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2 0x028C20 +#define S_028C20_S8_X(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028C20_S8_X(x) (((x) >> 0) & 0x0F) +#define C_028C20_S8_X 0xFFFFFFF0 +#define S_028C20_S8_Y(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028C20_S8_Y(x) (((x) >> 4) & 0x0F) +#define C_028C20_S8_Y 0xFFFFFF0F +#define S_028C20_S9_X(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028C20_S9_X(x) (((x) >> 8) & 0x0F) +#define C_028C20_S9_X 0xFFFFF0FF +#define S_028C20_S9_Y(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028C20_S9_Y(x) (((x) >> 12) & 0x0F) +#define C_028C20_S9_Y 0xFFFF0FFF +#define S_028C20_S10_X(x) (((unsigned)(x) & 0x0F) << 16) +#define G_028C20_S10_X(x) (((x) >> 16) & 0x0F) +#define C_028C20_S10_X 0xFFF0FFFF +#define S_028C20_S10_Y(x) (((unsigned)(x) & 0x0F) << 20) +#define G_028C20_S10_Y(x) (((x) >> 20) & 0x0F) +#define C_028C20_S10_Y 0xFF0FFFFF +#define S_028C20_S11_X(x) (((unsigned)(x) & 0x0F) << 24) +#define G_028C20_S11_X(x) (((x) >> 24) & 0x0F) +#define C_028C20_S11_X 0xF0FFFFFF +#define S_028C20_S11_Y(x) (((unsigned)(x) & 0x0F) << 28) +#define G_028C20_S11_Y(x) (((x) >> 28) & 0x0F) +#define C_028C20_S11_Y 0x0FFFFFFF +#define R_028C24_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3 0x028C24 +#define S_028C24_S12_X(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028C24_S12_X(x) (((x) >> 0) & 0x0F) +#define C_028C24_S12_X 0xFFFFFFF0 +#define S_028C24_S12_Y(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028C24_S12_Y(x) (((x) >> 4) & 0x0F) +#define C_028C24_S12_Y 0xFFFFFF0F +#define S_028C24_S13_X(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028C24_S13_X(x) (((x) >> 8) & 0x0F) +#define C_028C24_S13_X 0xFFFFF0FF +#define S_028C24_S13_Y(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028C24_S13_Y(x) (((x) >> 12) & 0x0F) +#define C_028C24_S13_Y 0xFFFF0FFF +#define S_028C24_S14_X(x) (((unsigned)(x) & 0x0F) << 16) +#define G_028C24_S14_X(x) (((x) >> 16) & 0x0F) +#define C_028C24_S14_X 0xFFF0FFFF +#define S_028C24_S14_Y(x) (((unsigned)(x) & 0x0F) << 20) +#define G_028C24_S14_Y(x) (((x) >> 20) & 0x0F) +#define C_028C24_S14_Y 0xFF0FFFFF +#define S_028C24_S15_X(x) (((unsigned)(x) & 0x0F) << 24) +#define G_028C24_S15_X(x) (((x) >> 24) & 0x0F) +#define C_028C24_S15_X 0xF0FFFFFF +#define S_028C24_S15_Y(x) (((unsigned)(x) & 0x0F) << 28) +#define G_028C24_S15_Y(x) (((x) >> 28) & 0x0F) +#define C_028C24_S15_Y 0x0FFFFFFF +#define R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0 0x028C28 +#define S_028C28_S0_X(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028C28_S0_X(x) (((x) >> 0) & 0x0F) +#define C_028C28_S0_X 0xFFFFFFF0 +#define S_028C28_S0_Y(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028C28_S0_Y(x) (((x) >> 4) & 0x0F) +#define C_028C28_S0_Y 0xFFFFFF0F +#define S_028C28_S1_X(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028C28_S1_X(x) (((x) >> 8) & 0x0F) +#define C_028C28_S1_X 0xFFFFF0FF +#define S_028C28_S1_Y(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028C28_S1_Y(x) (((x) >> 12) & 0x0F) +#define C_028C28_S1_Y 0xFFFF0FFF +#define S_028C28_S2_X(x) (((unsigned)(x) & 0x0F) << 16) +#define G_028C28_S2_X(x) (((x) >> 16) & 0x0F) +#define C_028C28_S2_X 0xFFF0FFFF +#define S_028C28_S2_Y(x) (((unsigned)(x) & 0x0F) << 20) +#define G_028C28_S2_Y(x) (((x) >> 20) & 0x0F) +#define C_028C28_S2_Y 0xFF0FFFFF +#define S_028C28_S3_X(x) (((unsigned)(x) & 0x0F) << 24) +#define G_028C28_S3_X(x) (((x) >> 24) & 0x0F) +#define C_028C28_S3_X 0xF0FFFFFF +#define S_028C28_S3_Y(x) (((unsigned)(x) & 0x0F) << 28) +#define G_028C28_S3_Y(x) (((x) >> 28) & 0x0F) +#define C_028C28_S3_Y 0x0FFFFFFF +#define R_028C2C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1 0x028C2C +#define S_028C2C_S4_X(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028C2C_S4_X(x) (((x) >> 0) & 0x0F) +#define C_028C2C_S4_X 0xFFFFFFF0 +#define S_028C2C_S4_Y(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028C2C_S4_Y(x) (((x) >> 4) & 0x0F) +#define C_028C2C_S4_Y 0xFFFFFF0F +#define S_028C2C_S5_X(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028C2C_S5_X(x) (((x) >> 8) & 0x0F) +#define C_028C2C_S5_X 0xFFFFF0FF +#define S_028C2C_S5_Y(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028C2C_S5_Y(x) (((x) >> 12) & 0x0F) +#define C_028C2C_S5_Y 0xFFFF0FFF +#define S_028C2C_S6_X(x) (((unsigned)(x) & 0x0F) << 16) +#define G_028C2C_S6_X(x) (((x) >> 16) & 0x0F) +#define C_028C2C_S6_X 0xFFF0FFFF +#define S_028C2C_S6_Y(x) (((unsigned)(x) & 0x0F) << 20) +#define G_028C2C_S6_Y(x) (((x) >> 20) & 0x0F) +#define C_028C2C_S6_Y 0xFF0FFFFF +#define S_028C2C_S7_X(x) (((unsigned)(x) & 0x0F) << 24) +#define G_028C2C_S7_X(x) (((x) >> 24) & 0x0F) +#define C_028C2C_S7_X 0xF0FFFFFF +#define S_028C2C_S7_Y(x) (((unsigned)(x) & 0x0F) << 28) +#define G_028C2C_S7_Y(x) (((x) >> 28) & 0x0F) +#define C_028C2C_S7_Y 0x0FFFFFFF +#define R_028C30_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2 0x028C30 +#define S_028C30_S8_X(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028C30_S8_X(x) (((x) >> 0) & 0x0F) +#define C_028C30_S8_X 0xFFFFFFF0 +#define S_028C30_S8_Y(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028C30_S8_Y(x) (((x) >> 4) & 0x0F) +#define C_028C30_S8_Y 0xFFFFFF0F +#define S_028C30_S9_X(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028C30_S9_X(x) (((x) >> 8) & 0x0F) +#define C_028C30_S9_X 0xFFFFF0FF +#define S_028C30_S9_Y(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028C30_S9_Y(x) (((x) >> 12) & 0x0F) +#define C_028C30_S9_Y 0xFFFF0FFF +#define S_028C30_S10_X(x) (((unsigned)(x) & 0x0F) << 16) +#define G_028C30_S10_X(x) (((x) >> 16) & 0x0F) +#define C_028C30_S10_X 0xFFF0FFFF +#define S_028C30_S10_Y(x) (((unsigned)(x) & 0x0F) << 20) +#define G_028C30_S10_Y(x) (((x) >> 20) & 0x0F) +#define C_028C30_S10_Y 0xFF0FFFFF +#define S_028C30_S11_X(x) (((unsigned)(x) & 0x0F) << 24) +#define G_028C30_S11_X(x) (((x) >> 24) & 0x0F) +#define C_028C30_S11_X 0xF0FFFFFF +#define S_028C30_S11_Y(x) (((unsigned)(x) & 0x0F) << 28) +#define G_028C30_S11_Y(x) (((x) >> 28) & 0x0F) +#define C_028C30_S11_Y 0x0FFFFFFF +#define R_028C34_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3 0x028C34 +#define S_028C34_S12_X(x) (((unsigned)(x) & 0x0F) << 0) +#define G_028C34_S12_X(x) (((x) >> 0) & 0x0F) +#define C_028C34_S12_X 0xFFFFFFF0 +#define S_028C34_S12_Y(x) (((unsigned)(x) & 0x0F) << 4) +#define G_028C34_S12_Y(x) (((x) >> 4) & 0x0F) +#define C_028C34_S12_Y 0xFFFFFF0F +#define S_028C34_S13_X(x) (((unsigned)(x) & 0x0F) << 8) +#define G_028C34_S13_X(x) (((x) >> 8) & 0x0F) +#define C_028C34_S13_X 0xFFFFF0FF +#define S_028C34_S13_Y(x) (((unsigned)(x) & 0x0F) << 12) +#define G_028C34_S13_Y(x) (((x) >> 12) & 0x0F) +#define C_028C34_S13_Y 0xFFFF0FFF +#define S_028C34_S14_X(x) (((unsigned)(x) & 0x0F) << 16) +#define G_028C34_S14_X(x) (((x) >> 16) & 0x0F) +#define C_028C34_S14_X 0xFFF0FFFF +#define S_028C34_S14_Y(x) (((unsigned)(x) & 0x0F) << 20) +#define G_028C34_S14_Y(x) (((x) >> 20) & 0x0F) +#define C_028C34_S14_Y 0xFF0FFFFF +#define S_028C34_S15_X(x) (((unsigned)(x) & 0x0F) << 24) +#define G_028C34_S15_X(x) (((x) >> 24) & 0x0F) +#define C_028C34_S15_X 0xF0FFFFFF +#define S_028C34_S15_Y(x) (((unsigned)(x) & 0x0F) << 28) +#define G_028C34_S15_Y(x) (((x) >> 28) & 0x0F) +#define C_028C34_S15_Y 0x0FFFFFFF +#define R_028C38_PA_SC_AA_MASK_X0Y0_X1Y0 0x028C38 +#define S_028C38_AA_MASK_X0Y0(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_028C38_AA_MASK_X0Y0(x) (((x) >> 0) & 0xFFFF) +#define C_028C38_AA_MASK_X0Y0 0xFFFF0000 +#define S_028C38_AA_MASK_X1Y0(x) (((unsigned)(x) & 0xFFFF) << 16) +#define G_028C38_AA_MASK_X1Y0(x) (((x) >> 16) & 0xFFFF) +#define C_028C38_AA_MASK_X1Y0 0x0000FFFF +#define R_028C3C_PA_SC_AA_MASK_X0Y1_X1Y1 0x028C3C +#define S_028C3C_AA_MASK_X0Y1(x) (((unsigned)(x) & 0xFFFF) << 0) +#define G_028C3C_AA_MASK_X0Y1(x) (((x) >> 0) & 0xFFFF) +#define C_028C3C_AA_MASK_X0Y1 0xFFFF0000 +#define S_028C3C_AA_MASK_X1Y1(x) (((unsigned)(x) & 0xFFFF) << 16) +#define G_028C3C_AA_MASK_X1Y1(x) (((x) >> 16) & 0xFFFF) +#define C_028C3C_AA_MASK_X1Y1 0x0000FFFF +/* Stoney */ +#define R_028C40_PA_SC_SHADER_CONTROL 0x028C40 +#define S_028C40_REALIGN_DQUADS_AFTER_N_WAVES(x) (((unsigned)(x) & 0x03) << 0) +#define G_028C40_REALIGN_DQUADS_AFTER_N_WAVES(x) (((x) >> 0) & 0x03) +#define C_028C40_REALIGN_DQUADS_AFTER_N_WAVES 0xFFFFFFFC +/* */ +#define R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL 0x028C58 +#define S_028C58_VTX_REUSE_DEPTH(x) (((unsigned)(x) & 0xFF) << 0) +#define G_028C58_VTX_REUSE_DEPTH(x) (((x) >> 0) & 0xFF) +#define C_028C58_VTX_REUSE_DEPTH 0xFFFFFF00 +#define R_028C5C_VGT_OUT_DEALLOC_CNTL 0x028C5C +#define S_028C5C_DEALLOC_DIST(x) (((unsigned)(x) & 0x7F) << 0) +#define G_028C5C_DEALLOC_DIST(x) (((x) >> 0) & 0x7F) +#define C_028C5C_DEALLOC_DIST 0xFFFFFF80 +#define R_028C60_CB_COLOR0_BASE 0x028C60 +#define R_028C64_CB_COLOR0_PITCH 0x028C64 +#define S_028C64_TILE_MAX(x) (((unsigned)(x) & 0x7FF) << 0) +#define G_028C64_TILE_MAX(x) (((x) >> 0) & 0x7FF) +#define C_028C64_TILE_MAX 0xFFFFF800 +/* CIK */ +#define S_028C64_FMASK_TILE_MAX(x) (((unsigned)(x) & 0x7FF) << 20) +#define G_028C64_FMASK_TILE_MAX(x) (((x) >> 20) & 0x7FF) +#define C_028C64_FMASK_TILE_MAX 0x800FFFFF +/* */ +#define R_028C68_CB_COLOR0_SLICE 0x028C68 +#define S_028C68_TILE_MAX(x) (((unsigned)(x) & 0x3FFFFF) << 0) +#define G_028C68_TILE_MAX(x) (((x) >> 0) & 0x3FFFFF) +#define C_028C68_TILE_MAX 0xFFC00000 +#define R_028C6C_CB_COLOR0_VIEW 0x028C6C +#define S_028C6C_SLICE_START(x) (((unsigned)(x) & 0x7FF) << 0) +#define G_028C6C_SLICE_START(x) (((x) >> 0) & 0x7FF) +#define C_028C6C_SLICE_START 0xFFFFF800 +#define S_028C6C_SLICE_MAX(x) (((unsigned)(x) & 0x7FF) << 13) +#define G_028C6C_SLICE_MAX(x) (((x) >> 13) & 0x7FF) +#define C_028C6C_SLICE_MAX 0xFF001FFF +#define R_028C70_CB_COLOR0_INFO 0x028C70 +#define S_028C70_ENDIAN(x) (((unsigned)(x) & 0x03) << 0) +#define G_028C70_ENDIAN(x) (((x) >> 0) & 0x03) +#define C_028C70_ENDIAN 0xFFFFFFFC +#define V_028C70_ENDIAN_NONE 0x00 +#define V_028C70_ENDIAN_8IN16 0x01 +#define V_028C70_ENDIAN_8IN32 0x02 +#define V_028C70_ENDIAN_8IN64 0x03 +#define S_028C70_FORMAT(x) (((unsigned)(x) & 0x1F) << 2) +#define G_028C70_FORMAT(x) (((x) >> 2) & 0x1F) +#define C_028C70_FORMAT 0xFFFFFF83 +#define V_028C70_COLOR_INVALID 0x00 +#define V_028C70_COLOR_8 0x01 +#define V_028C70_COLOR_16 0x02 +#define V_028C70_COLOR_8_8 0x03 +#define V_028C70_COLOR_32 0x04 +#define V_028C70_COLOR_16_16 0x05 +#define V_028C70_COLOR_10_11_11 0x06 +#define V_028C70_COLOR_11_11_10 0x07 +#define V_028C70_COLOR_10_10_10_2 0x08 +#define V_028C70_COLOR_2_10_10_10 0x09 +#define V_028C70_COLOR_8_8_8_8 0x0A +#define V_028C70_COLOR_32_32 0x0B +#define V_028C70_COLOR_16_16_16_16 0x0C +#define V_028C70_COLOR_32_32_32_32 0x0E +#define V_028C70_COLOR_5_6_5 0x10 +#define V_028C70_COLOR_1_5_5_5 0x11 +#define V_028C70_COLOR_5_5_5_1 0x12 +#define V_028C70_COLOR_4_4_4_4 0x13 +#define V_028C70_COLOR_8_24 0x14 +#define V_028C70_COLOR_24_8 0x15 +#define V_028C70_COLOR_X24_8_32_FLOAT 0x16 +#define S_028C70_LINEAR_GENERAL(x) (((unsigned)(x) & 0x1) << 7) +#define G_028C70_LINEAR_GENERAL(x) (((x) >> 7) & 0x1) +#define C_028C70_LINEAR_GENERAL 0xFFFFFF7F +#define S_028C70_NUMBER_TYPE(x) (((unsigned)(x) & 0x07) << 8) +#define G_028C70_NUMBER_TYPE(x) (((x) >> 8) & 0x07) +#define C_028C70_NUMBER_TYPE 0xFFFFF8FF +#define V_028C70_NUMBER_UNORM 0x00 +#define V_028C70_NUMBER_SNORM 0x01 +#define V_028C70_NUMBER_UINT 0x04 +#define V_028C70_NUMBER_SINT 0x05 +#define V_028C70_NUMBER_SRGB 0x06 +#define V_028C70_NUMBER_FLOAT 0x07 +#define S_028C70_COMP_SWAP(x) (((unsigned)(x) & 0x03) << 11) +#define G_028C70_COMP_SWAP(x) (((x) >> 11) & 0x03) +#define C_028C70_COMP_SWAP 0xFFFFE7FF +#define V_028C70_SWAP_STD 0x00 +#define V_028C70_SWAP_ALT 0x01 +#define V_028C70_SWAP_STD_REV 0x02 +#define V_028C70_SWAP_ALT_REV 0x03 +#define S_028C70_FAST_CLEAR(x) (((unsigned)(x) & 0x1) << 13) +#define G_028C70_FAST_CLEAR(x) (((x) >> 13) & 0x1) +#define C_028C70_FAST_CLEAR 0xFFFFDFFF +#define S_028C70_COMPRESSION(x) (((unsigned)(x) & 0x1) << 14) +#define G_028C70_COMPRESSION(x) (((x) >> 14) & 0x1) +#define C_028C70_COMPRESSION 0xFFFFBFFF +#define S_028C70_BLEND_CLAMP(x) (((unsigned)(x) & 0x1) << 15) +#define G_028C70_BLEND_CLAMP(x) (((x) >> 15) & 0x1) +#define C_028C70_BLEND_CLAMP 0xFFFF7FFF +#define S_028C70_BLEND_BYPASS(x) (((unsigned)(x) & 0x1) << 16) +#define G_028C70_BLEND_BYPASS(x) (((x) >> 16) & 0x1) +#define C_028C70_BLEND_BYPASS 0xFFFEFFFF +#define S_028C70_SIMPLE_FLOAT(x) (((unsigned)(x) & 0x1) << 17) +#define G_028C70_SIMPLE_FLOAT(x) (((x) >> 17) & 0x1) +#define C_028C70_SIMPLE_FLOAT 0xFFFDFFFF +#define S_028C70_ROUND_MODE(x) (((unsigned)(x) & 0x1) << 18) +#define G_028C70_ROUND_MODE(x) (((x) >> 18) & 0x1) +#define C_028C70_ROUND_MODE 0xFFFBFFFF +#define S_028C70_CMASK_IS_LINEAR(x) (((unsigned)(x) & 0x1) << 19) +#define G_028C70_CMASK_IS_LINEAR(x) (((x) >> 19) & 0x1) +#define C_028C70_CMASK_IS_LINEAR 0xFFF7FFFF +#define S_028C70_BLEND_OPT_DONT_RD_DST(x) (((unsigned)(x) & 0x07) << 20) +#define G_028C70_BLEND_OPT_DONT_RD_DST(x) (((x) >> 20) & 0x07) +#define C_028C70_BLEND_OPT_DONT_RD_DST 0xFF8FFFFF +#define V_028C70_FORCE_OPT_AUTO 0x00 +#define V_028C70_FORCE_OPT_DISABLE 0x01 +#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_A_0 0x02 +#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_RGB_0 0x03 +#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_ARGB_0 0x04 +#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_A_1 0x05 +#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_RGB_1 0x06 +#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_ARGB_1 0x07 +#define S_028C70_BLEND_OPT_DISCARD_PIXEL(x) (((unsigned)(x) & 0x07) << 23) +#define G_028C70_BLEND_OPT_DISCARD_PIXEL(x) (((x) >> 23) & 0x07) +#define C_028C70_BLEND_OPT_DISCARD_PIXEL 0xFC7FFFFF +#define V_028C70_FORCE_OPT_AUTO 0x00 +#define V_028C70_FORCE_OPT_DISABLE 0x01 +#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_A_0 0x02 +#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_RGB_0 0x03 +#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_ARGB_0 0x04 +#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_A_1 0x05 +#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_RGB_1 0x06 +#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_ARGB_1 0x07 +/* CIK */ +#define S_028C70_FMASK_COMPRESSION_DISABLE(x) (((unsigned)(x) & 0x1) << 26) +#define G_028C70_FMASK_COMPRESSION_DISABLE(x) (((x) >> 26) & 0x1) +#define C_028C70_FMASK_COMPRESSION_DISABLE 0xFBFFFFFF +/* */ +/* VI */ +#define S_028C70_FMASK_COMPRESS_1FRAG_ONLY(x) (((unsigned)(x) & 0x1) << 27) +#define G_028C70_FMASK_COMPRESS_1FRAG_ONLY(x) (((x) >> 27) & 0x1) +#define C_028C70_FMASK_COMPRESS_1FRAG_ONLY 0xF7FFFFFF +#define S_028C70_DCC_ENABLE(x) (((unsigned)(x) & 0x1) << 28) +#define G_028C70_DCC_ENABLE(x) (((x) >> 28) & 0x1) +#define C_028C70_DCC_ENABLE 0xEFFFFFFF +#define S_028C70_CMASK_ADDR_TYPE(x) (((unsigned)(x) & 0x03) << 29) +#define G_028C70_CMASK_ADDR_TYPE(x) (((x) >> 29) & 0x03) +#define C_028C70_CMASK_ADDR_TYPE 0x9FFFFFFF +/* */ +#define R_028C74_CB_COLOR0_ATTRIB 0x028C74 +#define S_028C74_TILE_MODE_INDEX(x) (((unsigned)(x) & 0x1F) << 0) +#define G_028C74_TILE_MODE_INDEX(x) (((x) >> 0) & 0x1F) +#define C_028C74_TILE_MODE_INDEX 0xFFFFFFE0 +#define S_028C74_FMASK_TILE_MODE_INDEX(x) (((unsigned)(x) & 0x1F) << 5) +#define G_028C74_FMASK_TILE_MODE_INDEX(x) (((x) >> 5) & 0x1F) +#define C_028C74_FMASK_TILE_MODE_INDEX 0xFFFFFC1F +#define S_028C74_FMASK_BANK_HEIGHT(x) (((unsigned)(x) & 0x03) << 10) +#define G_028C74_FMASK_BANK_HEIGHT(x) (((x) >> 10) & 0x03) +#define C_028C74_FMASK_BANK_HEIGHT 0xFFFFF3FF +#define S_028C74_NUM_SAMPLES(x) (((unsigned)(x) & 0x07) << 12) +#define G_028C74_NUM_SAMPLES(x) (((x) >> 12) & 0x07) +#define C_028C74_NUM_SAMPLES 0xFFFF8FFF +#define S_028C74_NUM_FRAGMENTS(x) (((unsigned)(x) & 0x03) << 15) +#define G_028C74_NUM_FRAGMENTS(x) (((x) >> 15) & 0x03) +#define C_028C74_NUM_FRAGMENTS 0xFFFE7FFF +#define S_028C74_FORCE_DST_ALPHA_1(x) (((unsigned)(x) & 0x1) << 17) +#define G_028C74_FORCE_DST_ALPHA_1(x) (((x) >> 17) & 0x1) +#define C_028C74_FORCE_DST_ALPHA_1 0xFFFDFFFF +/* VI */ +#define R_028C78_CB_COLOR0_DCC_CONTROL 0x028C78 +#define S_028C78_OVERWRITE_COMBINER_DISABLE(x) (((unsigned)(x) & 0x1) << 0) +#define G_028C78_OVERWRITE_COMBINER_DISABLE(x) (((x) >> 0) & 0x1) +#define C_028C78_OVERWRITE_COMBINER_DISABLE 0xFFFFFFFE +#define S_028C78_KEY_CLEAR_ENABLE(x) (((unsigned)(x) & 0x1) << 1) +#define G_028C78_KEY_CLEAR_ENABLE(x) (((x) >> 1) & 0x1) +#define C_028C78_KEY_CLEAR_ENABLE 0xFFFFFFFD +#define S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(x) (((unsigned)(x) & 0x03) << 2) +#define G_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(x) (((x) >> 2) & 0x03) +#define C_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE 0xFFFFFFF3 +#define S_028C78_MIN_COMPRESSED_BLOCK_SIZE(x) (((unsigned)(x) & 0x1) << 4) +#define G_028C78_MIN_COMPRESSED_BLOCK_SIZE(x) (((x) >> 4) & 0x1) +#define C_028C78_MIN_COMPRESSED_BLOCK_SIZE 0xFFFFFFEF +#define S_028C78_MAX_COMPRESSED_BLOCK_SIZE(x) (((unsigned)(x) & 0x03) << 5) +#define G_028C78_MAX_COMPRESSED_BLOCK_SIZE(x) (((x) >> 5) & 0x03) +#define C_028C78_MAX_COMPRESSED_BLOCK_SIZE 0xFFFFFF9F +#define S_028C78_COLOR_TRANSFORM(x) (((unsigned)(x) & 0x03) << 7) +#define G_028C78_COLOR_TRANSFORM(x) (((x) >> 7) & 0x03) +#define C_028C78_COLOR_TRANSFORM 0xFFFFFE7F +#define S_028C78_INDEPENDENT_64B_BLOCKS(x) (((unsigned)(x) & 0x1) << 9) +#define G_028C78_INDEPENDENT_64B_BLOCKS(x) (((x) >> 9) & 0x1) +#define C_028C78_INDEPENDENT_64B_BLOCKS 0xFFFFFDFF +#define S_028C78_LOSSY_RGB_PRECISION(x) (((unsigned)(x) & 0x0F) << 10) +#define G_028C78_LOSSY_RGB_PRECISION(x) (((x) >> 10) & 0x0F) +#define C_028C78_LOSSY_RGB_PRECISION 0xFFFFC3FF +#define S_028C78_LOSSY_ALPHA_PRECISION(x) (((unsigned)(x) & 0x0F) << 14) +#define G_028C78_LOSSY_ALPHA_PRECISION(x) (((x) >> 14) & 0x0F) +#define C_028C78_LOSSY_ALPHA_PRECISION 0xFFFC3FFF +/* */ +#define R_028C7C_CB_COLOR0_CMASK 0x028C7C +#define R_028C80_CB_COLOR0_CMASK_SLICE 0x028C80 +#define S_028C80_TILE_MAX(x) (((unsigned)(x) & 0x3FFF) << 0) +#define G_028C80_TILE_MAX(x) (((x) >> 0) & 0x3FFF) +#define C_028C80_TILE_MAX 0xFFFFC000 +#define R_028C84_CB_COLOR0_FMASK 0x028C84 +#define R_028C88_CB_COLOR0_FMASK_SLICE 0x028C88 +#define S_028C88_TILE_MAX(x) (((unsigned)(x) & 0x3FFFFF) << 0) +#define G_028C88_TILE_MAX(x) (((x) >> 0) & 0x3FFFFF) +#define C_028C88_TILE_MAX 0xFFC00000 +#define R_028C8C_CB_COLOR0_CLEAR_WORD0 0x028C8C +#define R_028C90_CB_COLOR0_CLEAR_WORD1 0x028C90 +#define R_028C94_CB_COLOR0_DCC_BASE 0x028C94 /* VI */ +#define R_028C9C_CB_COLOR1_BASE 0x028C9C +#define R_028CA0_CB_COLOR1_PITCH 0x028CA0 +#define R_028CA4_CB_COLOR1_SLICE 0x028CA4 +#define R_028CA8_CB_COLOR1_VIEW 0x028CA8 +#define R_028CAC_CB_COLOR1_INFO 0x028CAC +#define R_028CB0_CB_COLOR1_ATTRIB 0x028CB0 +#define R_028CB4_CB_COLOR1_DCC_CONTROL 0x028CB4 /* VI */ +#define R_028CB8_CB_COLOR1_CMASK 0x028CB8 +#define R_028CBC_CB_COLOR1_CMASK_SLICE 0x028CBC +#define R_028CC0_CB_COLOR1_FMASK 0x028CC0 +#define R_028CC4_CB_COLOR1_FMASK_SLICE 0x028CC4 +#define R_028CC8_CB_COLOR1_CLEAR_WORD0 0x028CC8 +#define R_028CCC_CB_COLOR1_CLEAR_WORD1 0x028CCC +#define R_028CD0_CB_COLOR1_DCC_BASE 0x028CD0 /* VI */ +#define R_028CD8_CB_COLOR2_BASE 0x028CD8 +#define R_028CDC_CB_COLOR2_PITCH 0x028CDC +#define R_028CE0_CB_COLOR2_SLICE 0x028CE0 +#define R_028CE4_CB_COLOR2_VIEW 0x028CE4 +#define R_028CE8_CB_COLOR2_INFO 0x028CE8 +#define R_028CEC_CB_COLOR2_ATTRIB 0x028CEC +#define R_028CF0_CB_COLOR2_DCC_CONTROL 0x028CF0 /* VI */ +#define R_028CF4_CB_COLOR2_CMASK 0x028CF4 +#define R_028CF8_CB_COLOR2_CMASK_SLICE 0x028CF8 +#define R_028CFC_CB_COLOR2_FMASK 0x028CFC +#define R_028D00_CB_COLOR2_FMASK_SLICE 0x028D00 +#define R_028D04_CB_COLOR2_CLEAR_WORD0 0x028D04 +#define R_028D08_CB_COLOR2_CLEAR_WORD1 0x028D08 +#define R_028D0C_CB_COLOR2_DCC_BASE 0x028D0C /* VI */ +#define R_028D14_CB_COLOR3_BASE 0x028D14 +#define R_028D18_CB_COLOR3_PITCH 0x028D18 +#define R_028D1C_CB_COLOR3_SLICE 0x028D1C +#define R_028D20_CB_COLOR3_VIEW 0x028D20 +#define R_028D24_CB_COLOR3_INFO 0x028D24 +#define R_028D28_CB_COLOR3_ATTRIB 0x028D28 +#define R_028D2C_CB_COLOR3_DCC_CONTROL 0x028D2C /* VI */ +#define R_028D30_CB_COLOR3_CMASK 0x028D30 +#define R_028D34_CB_COLOR3_CMASK_SLICE 0x028D34 +#define R_028D38_CB_COLOR3_FMASK 0x028D38 +#define R_028D3C_CB_COLOR3_FMASK_SLICE 0x028D3C +#define R_028D40_CB_COLOR3_CLEAR_WORD0 0x028D40 +#define R_028D44_CB_COLOR3_CLEAR_WORD1 0x028D44 +#define R_028D48_CB_COLOR3_DCC_BASE 0x028D48 /* VI */ +#define R_028D50_CB_COLOR4_BASE 0x028D50 +#define R_028D54_CB_COLOR4_PITCH 0x028D54 +#define R_028D58_CB_COLOR4_SLICE 0x028D58 +#define R_028D5C_CB_COLOR4_VIEW 0x028D5C +#define R_028D60_CB_COLOR4_INFO 0x028D60 +#define R_028D64_CB_COLOR4_ATTRIB 0x028D64 +#define R_028D68_CB_COLOR4_DCC_CONTROL 0x028D68 /* VI */ +#define R_028D6C_CB_COLOR4_CMASK 0x028D6C +#define R_028D70_CB_COLOR4_CMASK_SLICE 0x028D70 +#define R_028D74_CB_COLOR4_FMASK 0x028D74 +#define R_028D78_CB_COLOR4_FMASK_SLICE 0x028D78 +#define R_028D7C_CB_COLOR4_CLEAR_WORD0 0x028D7C +#define R_028D80_CB_COLOR4_CLEAR_WORD1 0x028D80 +#define R_028D84_CB_COLOR4_DCC_BASE 0x028D84 /* VI */ +#define R_028D8C_CB_COLOR5_BASE 0x028D8C +#define R_028D90_CB_COLOR5_PITCH 0x028D90 +#define R_028D94_CB_COLOR5_SLICE 0x028D94 +#define R_028D98_CB_COLOR5_VIEW 0x028D98 +#define R_028D9C_CB_COLOR5_INFO 0x028D9C +#define R_028DA0_CB_COLOR5_ATTRIB 0x028DA0 +#define R_028DA4_CB_COLOR5_DCC_CONTROL 0x028DA4 /* VI */ +#define R_028DA8_CB_COLOR5_CMASK 0x028DA8 +#define R_028DAC_CB_COLOR5_CMASK_SLICE 0x028DAC +#define R_028DB0_CB_COLOR5_FMASK 0x028DB0 +#define R_028DB4_CB_COLOR5_FMASK_SLICE 0x028DB4 +#define R_028DB8_CB_COLOR5_CLEAR_WORD0 0x028DB8 +#define R_028DBC_CB_COLOR5_CLEAR_WORD1 0x028DBC +#define R_028DC0_CB_COLOR5_DCC_BASE 0x028DC0 /* VI */ +#define R_028DC8_CB_COLOR6_BASE 0x028DC8 +#define R_028DCC_CB_COLOR6_PITCH 0x028DCC +#define R_028DD0_CB_COLOR6_SLICE 0x028DD0 +#define R_028DD4_CB_COLOR6_VIEW 0x028DD4 +#define R_028DD8_CB_COLOR6_INFO 0x028DD8 +#define R_028DDC_CB_COLOR6_ATTRIB 0x028DDC +#define R_028DE0_CB_COLOR6_DCC_CONTROL 0x028DE0 /* VI */ +#define R_028DE4_CB_COLOR6_CMASK 0x028DE4 +#define R_028DE8_CB_COLOR6_CMASK_SLICE 0x028DE8 +#define R_028DEC_CB_COLOR6_FMASK 0x028DEC +#define R_028DF0_CB_COLOR6_FMASK_SLICE 0x028DF0 +#define R_028DF4_CB_COLOR6_CLEAR_WORD0 0x028DF4 +#define R_028DF8_CB_COLOR6_CLEAR_WORD1 0x028DF8 +#define R_028DFC_CB_COLOR6_DCC_BASE 0x028DFC /* VI */ +#define R_028E04_CB_COLOR7_BASE 0x028E04 +#define R_028E08_CB_COLOR7_PITCH 0x028E08 +#define R_028E0C_CB_COLOR7_SLICE 0x028E0C +#define R_028E10_CB_COLOR7_VIEW 0x028E10 +#define R_028E14_CB_COLOR7_INFO 0x028E14 +#define R_028E18_CB_COLOR7_ATTRIB 0x028E18 +#define R_028E1C_CB_COLOR7_DCC_CONTROL 0x028E1C /* VI */ +#define R_028E20_CB_COLOR7_CMASK 0x028E20 +#define R_028E24_CB_COLOR7_CMASK_SLICE 0x028E24 +#define R_028E28_CB_COLOR7_FMASK 0x028E28 +#define R_028E2C_CB_COLOR7_FMASK_SLICE 0x028E2C +#define R_028E30_CB_COLOR7_CLEAR_WORD0 0x028E30 +#define R_028E34_CB_COLOR7_CLEAR_WORD1 0x028E34 +#define R_028E38_CB_COLOR7_DCC_BASE 0x028E38 /* VI */ + +/* SI async DMA packets */ +#define SI_DMA_PACKET(cmd, sub_cmd, n) ((((unsigned)(cmd) & 0xF) << 28) | \ + (((unsigned)(sub_cmd) & 0xFF) << 20) |\ + (((unsigned)(n) & 0xFFFFF) << 0)) +/* SI async DMA Packet types */ +#define SI_DMA_PACKET_WRITE 0x2 +#define SI_DMA_PACKET_COPY 0x3 +#define SI_DMA_COPY_MAX_BYTE_ALIGNED_SIZE 0xfffe0 +/* The documentation says 0xffff8 is the maximum size in dwords, which is + * 0x3fffe0 in bytes. */ +#define SI_DMA_COPY_MAX_DWORD_ALIGNED_SIZE 0x3fffe0 +#define SI_DMA_COPY_DWORD_ALIGNED 0x00 +#define SI_DMA_COPY_BYTE_ALIGNED 0x40 +#define SI_DMA_COPY_TILED 0x8 +#define SI_DMA_PACKET_INDIRECT_BUFFER 0x4 +#define SI_DMA_PACKET_SEMAPHORE 0x5 +#define SI_DMA_PACKET_FENCE 0x6 +#define SI_DMA_PACKET_TRAP 0x7 +#define SI_DMA_PACKET_SRBM_WRITE 0x9 +#define SI_DMA_PACKET_CONSTANT_FILL 0xd +#define SI_DMA_PACKET_NOP 0xf + +/* CIK async DMA packets */ +#define CIK_SDMA_PACKET(op, sub_op, n) ((((unsigned)(n) & 0xFFFF) << 16) | \ + (((unsigned)(sub_op) & 0xFF) << 8) | \ + (((unsigned)(op) & 0xFF) << 0)) +/* CIK async DMA packet types */ +#define CIK_SDMA_OPCODE_NOP 0x0 +#define CIK_SDMA_OPCODE_COPY 0x1 +#define CIK_SDMA_COPY_SUB_OPCODE_LINEAR 0x0 +#define CIK_SDMA_COPY_SUB_OPCODE_TILED 0x1 +#define CIK_SDMA_COPY_SUB_OPCODE_SOA 0x3 +#define CIK_SDMA_COPY_SUB_OPCODE_LINEAR_SUB_WINDOW 0x4 +#define CIK_SDMA_COPY_SUB_OPCODE_TILED_SUB_WINDOW 0x5 +#define CIK_SDMA_COPY_SUB_OPCODE_T2T_SUB_WINDOW 0x6 +#define CIK_SDMA_OPCODE_WRITE 0x2 +#define SDMA_WRITE_SUB_OPCODE_LINEAR 0x0 +#define SDMA_WRTIE_SUB_OPCODE_TILED 0x1 +#define CIK_SDMA_OPCODE_INDIRECT_BUFFER 0x4 +#define CIK_SDMA_PACKET_FENCE 0x5 +#define CIK_SDMA_PACKET_TRAP 0x6 +#define CIK_SDMA_PACKET_SEMAPHORE 0x7 +#define CIK_SDMA_PACKET_CONSTANT_FILL 0xb +#define CIK_SDMA_PACKET_SRBM_WRITE 0xe +#define CIK_SDMA_COPY_MAX_SIZE 0x3fffe0 + +#endif /* _SID_H */ + diff -Nru mesa-12.0.6/src/amd/common/sid_tables.h mesa-17.0.7/src/amd/common/sid_tables.h --- mesa-12.0.6/src/amd/common/sid_tables.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/common/sid_tables.h 2017-06-01 10:38:02.000000000 +0000 @@ -0,0 +1,7290 @@ +/* This file is autogenerated by sid_tables.py from sid.h. Do not edit directly. */ + +/* + * Copyright 2015 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef SID_TABLES_H +#define SID_TABLES_H + +struct si_field { + unsigned name_offset; + unsigned mask; + unsigned num_values; + unsigned values_offset; /* offset into sid_strings_offsets */ +}; + +struct si_reg { + unsigned name_offset; + unsigned offset; + unsigned num_fields; + unsigned fields_offset; +}; + +struct si_packet3 { + unsigned name_offset; + unsigned op; +}; + +static const struct si_packet3 packet3_table[] = { + {0, PKT3_NOP}, + {4, PKT3_SET_BASE}, + {13, PKT3_CLEAR_STATE}, + {25, PKT3_INDEX_BUFFER_SIZE}, + {43, PKT3_DISPATCH_DIRECT}, + {59, PKT3_DISPATCH_INDIRECT}, + {77, PKT3_OCCLUSION_QUERY}, + {93, PKT3_SET_PREDICATION}, + {109, PKT3_COND_EXEC}, + {119, PKT3_PRED_EXEC}, + {129, PKT3_DRAW_INDIRECT}, + {143, PKT3_DRAW_INDEX_INDIRECT}, + {163, PKT3_INDEX_BASE}, + {174, PKT3_DRAW_INDEX_2}, + {187, PKT3_CONTEXT_CONTROL}, + {203, PKT3_INDEX_TYPE}, + {214, PKT3_DRAW_INDIRECT_MULTI}, + {234, PKT3_DRAW_INDEX_AUTO}, + {250, PKT3_DRAW_INDEX_IMMD}, + {266, PKT3_NUM_INSTANCES}, + {280, PKT3_DRAW_INDEX_MULTI_AUTO}, + {302, PKT3_INDIRECT_BUFFER_SI}, + {321, PKT3_INDIRECT_BUFFER_CONST}, + {343, PKT3_STRMOUT_BUFFER_UPDATE}, + {365, PKT3_DRAW_INDEX_OFFSET_2}, + {385, PKT3_WRITE_DATA}, + {396, PKT3_DRAW_INDEX_INDIRECT_MULTI}, + {422, PKT3_MEM_SEMAPHORE}, + {436, PKT3_MPEG_INDEX}, + {447, PKT3_WAIT_REG_MEM}, + {460, PKT3_MEM_WRITE}, + {470, PKT3_INDIRECT_BUFFER_CIK}, + {490, PKT3_COPY_DATA}, + {500, PKT3_PFP_SYNC_ME}, + {512, PKT3_SURFACE_SYNC}, + {525, PKT3_ME_INITIALIZE}, + {539, PKT3_COND_WRITE}, + {550, PKT3_EVENT_WRITE}, + {562, PKT3_EVENT_WRITE_EOP}, + {578, PKT3_RELEASE_MEM}, + {590, PKT3_ONE_REG_WRITE}, + {604, PKT3_ACQUIRE_MEM}, + {616, PKT3_SET_CONFIG_REG}, + {631, PKT3_SET_CONTEXT_REG}, + {647, PKT3_SET_SH_REG}, + {658, PKT3_SET_SH_REG_OFFSET}, + {676, PKT3_SET_UCONFIG_REG}, + {692, PKT3_LOAD_CONST_RAM}, + {707, PKT3_WRITE_CONST_RAM}, + {723, PKT3_DUMP_CONST_RAM}, + {738, PKT3_INCREMENT_CE_COUNTER}, + {759, PKT3_INCREMENT_DE_COUNTER}, + {780, PKT3_WAIT_ON_CE_COUNTER}, + {799, PKT3_IT_OPCODE_C}, + {811, PKT3_CP_DMA}, + {818, PKT3_DMA_DATA}, +}; + +static const struct si_field sid_fields_table[] = { + /* 0 */ + {827, S_2C3_COUNT_INDIRECT_ENABLE(~0u)}, + {849, S_2C3_DRAW_INDEX_ENABLE(~0u)}, + /* 2 */ + {877, S_370_ENGINE_SEL(~0u), 4, 0}, + {888, S_370_WR_CONFIRM(~0u)}, + {899, S_370_WR_ONE_ADDR(~0u)}, + {972, S_370_DST_SEL(~0u), 6, 4}, + /* 6 */ + {980, S_3F2_IB_SIZE(~0u)}, + {988, S_3F2_CHAIN(~0u)}, + {994, S_3F2_VALID(~0u)}, + /* 9 */ + {1000, S_410_SRC_ADDR_LO(~0u)}, + /* 10 */ + {1012, S_411_CP_SYNC(~0u)}, + {1044, S_411_SRC_SEL(~0u), 4, 10}, + {1052, S_411_ENGINE(~0u), 2, 0}, + {1083, S_411_DSL_SEL(~0u), 4, 14}, + {1091, S_411_SRC_ADDR_HI(~0u)}, + /* 15 */ + {1103, S_412_DST_ADDR_LO(~0u)}, + /* 16 */ + {1115, S_413_DST_ADDR_HI(~0u)}, + /* 17 */ + {1127, S_414_BYTE_COUNT(~0u)}, + {1138, S_414_DISABLE_WR_CONFIRM(~0u)}, + {1186, S_414_SRC_SWAP(~0u), 4, 18}, + {1195, S_414_DST_SWAP(~0u), 4, 18}, + {1211, S_414_SAS(~0u), 2, 22}, + {1215, S_414_DAS(~0u), 2, 22}, + {1242, S_414_SAIC(~0u), 2, 24}, + {1247, S_414_DAIC(~0u), 2, 24}, + {1252, S_414_RAW_WAIT(~0u)}, + /* 26 */ + {1012, S_500_CP_SYNC(~0u)}, + {1044, S_500_SRC_SEL(~0u), 4, 10}, + {1083, S_500_DSL_SEL(~0u), 4, 14}, + {1052, S_500_ENGINE(~0u), 2, 0}, + /* 30 */ + {1261, S_000E4C_SDMA_RQ_PENDING(~0u)}, + {1277, S_000E4C_TST_RQ_PENDING(~0u)}, + {1292, S_000E4C_SDMA1_RQ_PENDING(~0u)}, + {1309, S_000E4C_VCE0_RQ_PENDING(~0u)}, + {1325, S_000E4C_VP8_BUSY(~0u)}, + {1334, S_000E4C_SDMA_BUSY(~0u)}, + {1344, S_000E4C_SDMA1_BUSY(~0u)}, + {1355, S_000E4C_VCE0_BUSY(~0u)}, + {1365, S_000E4C_XDMA_BUSY(~0u)}, + {1375, S_000E4C_CHUB_BUSY(~0u)}, + {1385, S_000E4C_SDMA2_BUSY(~0u)}, + {1396, S_000E4C_SDMA3_BUSY(~0u)}, + {1407, S_000E4C_SAMSCP_BUSY(~0u)}, + {1419, S_000E4C_ISP_BUSY(~0u)}, + {1428, S_000E4C_VCE1_BUSY(~0u)}, + {1438, S_000E4C_ODE_BUSY(~0u)}, + {1447, S_000E4C_SDMA2_RQ_PENDING(~0u)}, + {1464, S_000E4C_SDMA3_RQ_PENDING(~0u)}, + {1481, S_000E4C_SAMSCP_RQ_PENDING(~0u)}, + {1499, S_000E4C_ISP_RQ_PENDING(~0u)}, + {1514, S_000E4C_VCE1_RQ_PENDING(~0u)}, + /* 51 */ + {1530, S_000E50_UVD_RQ_PENDING(~0u)}, + {1545, S_000E50_SAMMSP_RQ_PENDING(~0u)}, + {1563, S_000E50_ACP_RQ_PENDING(~0u)}, + {1578, S_000E50_SMU_RQ_PENDING(~0u)}, + {1593, S_000E50_GRBM_RQ_PENDING(~0u)}, + {1609, S_000E50_HI_RQ_PENDING(~0u)}, + {1623, S_000E50_VMC_BUSY(~0u)}, + {1632, S_000E50_MCB_BUSY(~0u)}, + {1641, S_000E50_MCB_NON_DISPLAY_BUSY(~0u)}, + {1662, S_000E50_MCC_BUSY(~0u)}, + {1671, S_000E50_MCD_BUSY(~0u)}, + {1680, S_000E50_VMC1_BUSY(~0u)}, + {1690, S_000E50_SEM_BUSY(~0u)}, + {1699, S_000E50_ACP_BUSY(~0u)}, + {1708, S_000E50_IH_BUSY(~0u)}, + {1716, S_000E50_UVD_BUSY(~0u)}, + {1725, S_000E50_SAMMSP_BUSY(~0u)}, + {1737, S_000E50_GCATCL2_BUSY(~0u)}, + {1750, S_000E50_OSATCL2_BUSY(~0u)}, + {1763, S_000E50_BIF_BUSY(~0u)}, + /* 71 */ + {1772, S_000E54_MCC0_BUSY(~0u)}, + {1782, S_000E54_MCC1_BUSY(~0u)}, + {1792, S_000E54_MCC2_BUSY(~0u)}, + {1802, S_000E54_MCC3_BUSY(~0u)}, + {1812, S_000E54_MCC4_BUSY(~0u)}, + {1822, S_000E54_MCC5_BUSY(~0u)}, + {1832, S_000E54_MCC6_BUSY(~0u)}, + {1842, S_000E54_MCC7_BUSY(~0u)}, + {1852, S_000E54_MCD0_BUSY(~0u)}, + {1862, S_000E54_MCD1_BUSY(~0u)}, + {1872, S_000E54_MCD2_BUSY(~0u)}, + {1882, S_000E54_MCD3_BUSY(~0u)}, + {1892, S_000E54_MCD4_BUSY(~0u)}, + {1902, S_000E54_MCD5_BUSY(~0u)}, + {1912, S_000E54_MCD6_BUSY(~0u)}, + {1922, S_000E54_MCD7_BUSY(~0u)}, + /* 87 */ + {1932, S_00D034_IDLE(~0u)}, + {1937, S_00D034_REG_IDLE(~0u)}, + {1946, S_00D034_RB_EMPTY(~0u)}, + {1955, S_00D034_RB_FULL(~0u)}, + {1963, S_00D034_RB_CMD_IDLE(~0u)}, + {1975, S_00D034_RB_CMD_FULL(~0u)}, + {1987, S_00D034_IB_CMD_IDLE(~0u)}, + {1999, S_00D034_IB_CMD_FULL(~0u)}, + {2011, S_00D034_BLOCK_IDLE(~0u)}, + {2022, S_00D034_INSIDE_IB(~0u)}, + {2032, S_00D034_EX_IDLE(~0u)}, + {2040, S_00D034_EX_IDLE_POLL_TIMER_EXPIRE(~0u)}, + {2066, S_00D034_PACKET_READY(~0u)}, + {2079, S_00D034_MC_WR_IDLE(~0u)}, + {2090, S_00D034_SRBM_IDLE(~0u)}, + {2100, S_00D034_CONTEXT_EMPTY(~0u)}, + {2114, S_00D034_DELTA_RPTR_FULL(~0u)}, + {2130, S_00D034_RB_MC_RREQ_IDLE(~0u)}, + {2146, S_00D034_IB_MC_RREQ_IDLE(~0u)}, + {2162, S_00D034_MC_RD_IDLE(~0u)}, + {2173, S_00D034_DELTA_RPTR_EMPTY(~0u)}, + {2190, S_00D034_MC_RD_RET_STALL(~0u)}, + {2206, S_00D034_MC_RD_NO_POLL_IDLE(~0u)}, + {2225, S_00D034_PREV_CMD_IDLE(~0u)}, + {2239, S_00D034_SEM_IDLE(~0u)}, + {2248, S_00D034_SEM_REQ_STALL(~0u)}, + {2262, S_00D034_SEM_RESP_STATE(~0u)}, + {2277, S_00D034_INT_IDLE(~0u)}, + {2286, S_00D034_INT_REQ_STALL(~0u)}, + /* 116 */ + {2300, S_008008_ME0PIPE1_CMDFIFO_AVAIL(~0u)}, + {2323, S_008008_ME0PIPE1_CF_RQ_PENDING(~0u)}, + {2346, S_008008_ME0PIPE1_PF_RQ_PENDING(~0u)}, + {2369, S_008008_ME1PIPE0_RQ_PENDING(~0u)}, + {2389, S_008008_ME1PIPE1_RQ_PENDING(~0u)}, + {2409, S_008008_ME1PIPE2_RQ_PENDING(~0u)}, + {2429, S_008008_ME1PIPE3_RQ_PENDING(~0u)}, + {2449, S_008008_ME2PIPE0_RQ_PENDING(~0u)}, + {2469, S_008008_ME2PIPE1_RQ_PENDING(~0u)}, + {2489, S_008008_ME2PIPE2_RQ_PENDING(~0u)}, + {2509, S_008008_ME2PIPE3_RQ_PENDING(~0u)}, + {2529, S_008008_RLC_RQ_PENDING(~0u)}, + {2544, S_008008_RLC_BUSY(~0u)}, + {2553, S_008008_TC_BUSY(~0u)}, + {2561, S_008008_TCC_CC_RESIDENT(~0u)}, + {2577, S_008008_CPF_BUSY(~0u)}, + {2586, S_008008_CPC_BUSY(~0u)}, + {2595, S_008008_CPG_BUSY(~0u)}, + /* 134 */ + {2604, S_008010_ME0PIPE0_CMDFIFO_AVAIL(~0u)}, + {2627, S_008010_SRBM_RQ_PENDING(~0u)}, + {2643, S_008010_ME0PIPE0_CF_RQ_PENDING(~0u)}, + {2666, S_008010_ME0PIPE0_PF_RQ_PENDING(~0u)}, + {2689, S_008010_GDS_DMA_RQ_PENDING(~0u)}, + {2708, S_008010_DB_CLEAN(~0u)}, + {2717, S_008010_CB_CLEAN(~0u)}, + {2726, S_008010_TA_BUSY(~0u)}, + {2734, S_008010_GDS_BUSY(~0u)}, + {2743, S_008010_WD_BUSY_NO_DMA(~0u)}, + {2758, S_008010_VGT_BUSY(~0u)}, + {2767, S_008010_IA_BUSY_NO_DMA(~0u)}, + {2782, S_008010_IA_BUSY(~0u)}, + {2790, S_008010_SX_BUSY(~0u)}, + {2798, S_008010_WD_BUSY(~0u)}, + {2806, S_008010_SPI_BUSY(~0u)}, + {2815, S_008010_BCI_BUSY(~0u)}, + {2824, S_008010_SC_BUSY(~0u)}, + {2832, S_008010_PA_BUSY(~0u)}, + {2840, S_008010_DB_BUSY(~0u)}, + {2848, S_008010_CP_COHERENCY_BUSY(~0u)}, + {1411, S_008010_CP_BUSY(~0u)}, + {1633, S_008010_CB_BUSY(~0u)}, + {2866, S_008010_GUI_ACTIVE(~0u)}, + /* 158 */ + {2877, S_0084FC_OFFSET_UPDATE_DONE(~0u)}, + /* 159 */ + {2896, S_0085F0_DEST_BASE_0_ENA(~0u)}, + {2912, S_0085F0_DEST_BASE_1_ENA(~0u)}, + {2928, S_0085F0_CB0_DEST_BASE_ENA(~0u)}, + {2946, S_0085F0_CB1_DEST_BASE_ENA(~0u)}, + {2964, S_0085F0_CB2_DEST_BASE_ENA(~0u)}, + {2982, S_0085F0_CB3_DEST_BASE_ENA(~0u)}, + {3000, S_0085F0_CB4_DEST_BASE_ENA(~0u)}, + {3018, S_0085F0_CB5_DEST_BASE_ENA(~0u)}, + {3036, S_0085F0_CB6_DEST_BASE_ENA(~0u)}, + {3054, S_0085F0_CB7_DEST_BASE_ENA(~0u)}, + {3072, S_0085F0_DB_DEST_BASE_ENA(~0u)}, + {3089, S_0085F0_DEST_BASE_2_ENA(~0u)}, + {3105, S_0085F0_DEST_BASE_3_ENA(~0u)}, + {3121, S_0085F0_TCL1_ACTION_ENA(~0u)}, + {3137, S_0085F0_TC_ACTION_ENA(~0u)}, + {3151, S_0085F0_CB_ACTION_ENA(~0u)}, + {3165, S_0085F0_DB_ACTION_ENA(~0u)}, + {3179, S_0085F0_SH_KCACHE_ACTION_ENA(~0u)}, + {3200, S_0085F0_SH_ICACHE_ACTION_ENA(~0u)}, + /* 178 */ + {2708, S_008014_DB_CLEAN(~0u)}, + {2717, S_008014_CB_CLEAN(~0u)}, + {2815, S_008014_BCI_BUSY(~0u)}, + {2758, S_008014_VGT_BUSY(~0u)}, + {2832, S_008014_PA_BUSY(~0u)}, + {2726, S_008014_TA_BUSY(~0u)}, + {2790, S_008014_SX_BUSY(~0u)}, + {2806, S_008014_SPI_BUSY(~0u)}, + {2824, S_008014_SC_BUSY(~0u)}, + {2840, S_008014_DB_BUSY(~0u)}, + {1633, S_008014_CB_BUSY(~0u)}, + /* 189 */ + {2708, S_008018_DB_CLEAN(~0u)}, + {2717, S_008018_CB_CLEAN(~0u)}, + {2815, S_008018_BCI_BUSY(~0u)}, + {2758, S_008018_VGT_BUSY(~0u)}, + {2832, S_008018_PA_BUSY(~0u)}, + {2726, S_008018_TA_BUSY(~0u)}, + {2790, S_008018_SX_BUSY(~0u)}, + {2806, S_008018_SPI_BUSY(~0u)}, + {2824, S_008018_SC_BUSY(~0u)}, + {2840, S_008018_DB_BUSY(~0u)}, + {1633, S_008018_CB_BUSY(~0u)}, + /* 200 */ + {2708, S_008038_DB_CLEAN(~0u)}, + {2717, S_008038_CB_CLEAN(~0u)}, + {2815, S_008038_BCI_BUSY(~0u)}, + {2758, S_008038_VGT_BUSY(~0u)}, + {2832, S_008038_PA_BUSY(~0u)}, + {2726, S_008038_TA_BUSY(~0u)}, + {2790, S_008038_SX_BUSY(~0u)}, + {2806, S_008038_SPI_BUSY(~0u)}, + {2824, S_008038_SC_BUSY(~0u)}, + {2840, S_008038_DB_BUSY(~0u)}, + {1633, S_008038_CB_BUSY(~0u)}, + /* 211 */ + {2708, S_00803C_DB_CLEAN(~0u)}, + {2717, S_00803C_CB_CLEAN(~0u)}, + {2815, S_00803C_BCI_BUSY(~0u)}, + {2758, S_00803C_VGT_BUSY(~0u)}, + {2832, S_00803C_PA_BUSY(~0u)}, + {2726, S_00803C_TA_BUSY(~0u)}, + {2790, S_00803C_SX_BUSY(~0u)}, + {2806, S_00803C_SPI_BUSY(~0u)}, + {2824, S_00803C_SC_BUSY(~0u)}, + {2840, S_00803C_DB_BUSY(~0u)}, + {1633, S_00803C_CB_BUSY(~0u)}, + /* 222 */ + {2877, S_0300FC_OFFSET_UPDATE_DONE(~0u)}, + /* 223 */ + {3221, S_0301E4_COHER_BASE_HI_256B(~0u)}, + /* 224 */ + {3240, S_0301EC_START_DELAY_COUNT(~0u)}, + /* 225 */ + {2896, S_0301F0_DEST_BASE_0_ENA(~0u)}, + {2912, S_0301F0_DEST_BASE_1_ENA(~0u)}, + {3258, S_0301F0_TC_SD_ACTION_ENA(~0u)}, + {3275, S_0301F0_TC_NC_ACTION_ENA(~0u)}, + {2928, S_0301F0_CB0_DEST_BASE_ENA(~0u)}, + {2946, S_0301F0_CB1_DEST_BASE_ENA(~0u)}, + {2964, S_0301F0_CB2_DEST_BASE_ENA(~0u)}, + {2982, S_0301F0_CB3_DEST_BASE_ENA(~0u)}, + {3000, S_0301F0_CB4_DEST_BASE_ENA(~0u)}, + {3018, S_0301F0_CB5_DEST_BASE_ENA(~0u)}, + {3036, S_0301F0_CB6_DEST_BASE_ENA(~0u)}, + {3054, S_0301F0_CB7_DEST_BASE_ENA(~0u)}, + {3072, S_0301F0_DB_DEST_BASE_ENA(~0u)}, + {3292, S_0301F0_TCL1_VOL_ACTION_ENA(~0u)}, + {3312, S_0301F0_TC_VOL_ACTION_ENA(~0u)}, + {3330, S_0301F0_TC_WB_ACTION_ENA(~0u)}, + {3089, S_0301F0_DEST_BASE_2_ENA(~0u)}, + {3105, S_0301F0_DEST_BASE_3_ENA(~0u)}, + {3121, S_0301F0_TCL1_ACTION_ENA(~0u)}, + {3137, S_0301F0_TC_ACTION_ENA(~0u)}, + {3151, S_0301F0_CB_ACTION_ENA(~0u)}, + {3165, S_0301F0_DB_ACTION_ENA(~0u)}, + {3179, S_0301F0_SH_KCACHE_ACTION_ENA(~0u)}, + {3347, S_0301F0_SH_KCACHE_VOL_ACTION_ENA(~0u)}, + {3200, S_0301F0_SH_ICACHE_ACTION_ENA(~0u)}, + {3372, S_0301F0_SH_KCACHE_WB_ACTION_ENA(~0u)}, + {3396, S_0301F0_SH_SD_ACTION_ENA(~0u)}, + /* 252 */ + {3413, S_0301FC_MATCHING_GFX_CNTX(~0u)}, + {3431, S_0301FC_MEID(~0u)}, + {3436, S_0301FC_PHASE1_STATUS(~0u)}, + {3443, S_0301FC_STATUS(~0u)}, + /* 256 */ + {3450, S_008210_MEC1_BUSY(~0u)}, + {3460, S_008210_MEC2_BUSY(~0u)}, + {3470, S_008210_DC0_BUSY(~0u)}, + {3479, S_008210_DC1_BUSY(~0u)}, + {3488, S_008210_RCIU1_BUSY(~0u)}, + {3499, S_008210_RCIU2_BUSY(~0u)}, + {3510, S_008210_ROQ1_BUSY(~0u)}, + {3520, S_008210_ROQ2_BUSY(~0u)}, + {3530, S_008210_TCIU_BUSY(~0u)}, + {3540, S_008210_SCRATCH_RAM_BUSY(~0u)}, + {3557, S_008210_QU_BUSY(~0u)}, + {3565, S_008210_ATCL2IU_BUSY(~0u)}, + {3578, S_008210_CPG_CPC_BUSY(~0u)}, + {3591, S_008210_CPF_CPC_BUSY(~0u)}, + {2586, S_008210_CPC_BUSY(~0u)}, + /* 271 */ + {3604, S_008214_MEC1_LOAD_BUSY(~0u)}, + {3619, S_008214_MEC1_SEMAPOHRE_BUSY(~0u)}, + {3639, S_008214_MEC1_MUTEX_BUSY(~0u)}, + {3655, S_008214_MEC1_MESSAGE_BUSY(~0u)}, + {3673, S_008214_MEC1_EOP_QUEUE_BUSY(~0u)}, + {3693, S_008214_MEC1_IQ_QUEUE_BUSY(~0u)}, + {3712, S_008214_MEC1_IB_QUEUE_BUSY(~0u)}, + {3731, S_008214_MEC1_TC_BUSY(~0u)}, + {3744, S_008214_MEC1_DMA_BUSY(~0u)}, + {3758, S_008214_MEC1_PARTIAL_FLUSH_BUSY(~0u)}, + {3782, S_008214_MEC1_PIPE0_BUSY(~0u)}, + {3798, S_008214_MEC1_PIPE1_BUSY(~0u)}, + {3814, S_008214_MEC1_PIPE2_BUSY(~0u)}, + {3830, S_008214_MEC1_PIPE3_BUSY(~0u)}, + {3846, S_008214_MEC2_LOAD_BUSY(~0u)}, + {3861, S_008214_MEC2_SEMAPOHRE_BUSY(~0u)}, + {3881, S_008214_MEC2_MUTEX_BUSY(~0u)}, + {3897, S_008214_MEC2_MESSAGE_BUSY(~0u)}, + {3915, S_008214_MEC2_EOP_QUEUE_BUSY(~0u)}, + {3935, S_008214_MEC2_IQ_QUEUE_BUSY(~0u)}, + {3954, S_008214_MEC2_IB_QUEUE_BUSY(~0u)}, + {3973, S_008214_MEC2_TC_BUSY(~0u)}, + {3986, S_008214_MEC2_DMA_BUSY(~0u)}, + {4000, S_008214_MEC2_PARTIAL_FLUSH_BUSY(~0u)}, + {4024, S_008214_MEC2_PIPE0_BUSY(~0u)}, + {4040, S_008214_MEC2_PIPE1_BUSY(~0u)}, + {4056, S_008214_MEC2_PIPE2_BUSY(~0u)}, + {4072, S_008214_MEC2_PIPE3_BUSY(~0u)}, + /* 299 */ + {4088, S_008218_RCIU_TX_FREE_STALL(~0u)}, + {4107, S_008218_RCIU_PRIV_VIOLATION(~0u)}, + {4127, S_008218_TCIU_TX_FREE_STALL(~0u)}, + {4146, S_008218_MEC1_DECODING_PACKET(~0u)}, + {4167, S_008218_MEC1_WAIT_ON_RCIU(~0u)}, + {4185, S_008218_MEC1_WAIT_ON_RCIU_READ(~0u)}, + {4208, S_008218_MEC1_WAIT_ON_ROQ_DATA(~0u)}, + {4230, S_008218_MEC2_DECODING_PACKET(~0u)}, + {4251, S_008218_MEC2_WAIT_ON_RCIU(~0u)}, + {4269, S_008218_MEC2_WAIT_ON_RCIU_READ(~0u)}, + {4292, S_008218_MEC2_WAIT_ON_ROQ_DATA(~0u)}, + {4314, S_008218_ATCL2IU_WAITING_ON_FREE(~0u)}, + {4338, S_008218_ATCL2IU_WAITING_ON_TAGS(~0u)}, + {4362, S_008218_ATCL1_WAITING_ON_TRANS(~0u)}, + /* 313 */ + {4385, S_00821C_POST_WPTR_GFX_BUSY(~0u)}, + {4404, S_00821C_CSF_BUSY(~0u)}, + {4413, S_00821C_ROQ_ALIGN_BUSY(~0u)}, + {4428, S_00821C_ROQ_RING_BUSY(~0u)}, + {4442, S_00821C_ROQ_INDIRECT1_BUSY(~0u)}, + {4461, S_00821C_ROQ_INDIRECT2_BUSY(~0u)}, + {4480, S_00821C_ROQ_STATE_BUSY(~0u)}, + {4495, S_00821C_ROQ_CE_RING_BUSY(~0u)}, + {4512, S_00821C_ROQ_CE_INDIRECT1_BUSY(~0u)}, + {4534, S_00821C_ROQ_CE_INDIRECT2_BUSY(~0u)}, + {4556, S_00821C_SEMAPHORE_BUSY(~0u)}, + {4571, S_00821C_INTERRUPT_BUSY(~0u)}, + {3530, S_00821C_TCIU_BUSY(~0u)}, + {4586, S_00821C_HQD_BUSY(~0u)}, + {4595, S_00821C_PRT_BUSY(~0u)}, + {3565, S_00821C_ATCL2IU_BUSY(~0u)}, + {4604, S_00821C_CPF_GFX_BUSY(~0u)}, + {4617, S_00821C_CPF_CMP_BUSY(~0u)}, + {4630, S_00821C_GRBM_CPF_STAT_BUSY(~0u)}, + {4649, S_00821C_CPC_CPF_BUSY(~0u)}, + {2577, S_00821C_CPF_BUSY(~0u)}, + /* 334 */ + {4662, S_008220_REG_BUS_FIFO_BUSY(~0u)}, + {4680, S_008220_CSF_RING_BUSY(~0u)}, + {4694, S_008220_CSF_INDIRECT1_BUSY(~0u)}, + {4713, S_008220_CSF_INDIRECT2_BUSY(~0u)}, + {4732, S_008220_CSF_STATE_BUSY(~0u)}, + {4747, S_008220_CSF_CE_INDR1_BUSY(~0u)}, + {4765, S_008220_CSF_CE_INDR2_BUSY(~0u)}, + {4783, S_008220_CSF_ARBITER_BUSY(~0u)}, + {4800, S_008220_CSF_INPUT_BUSY(~0u)}, + {4815, S_008220_OUTSTANDING_READ_TAGS(~0u)}, + {4837, S_008220_HPD_PROCESSING_EOP_BUSY(~0u)}, + {4861, S_008220_HQD_DISPATCH_BUSY(~0u)}, + {4879, S_008220_HQD_IQ_TIMER_BUSY(~0u)}, + {4897, S_008220_HQD_DMA_OFFLOAD_BUSY(~0u)}, + {4918, S_008220_HQD_WAIT_SEMAPHORE_BUSY(~0u)}, + {4942, S_008220_HQD_SIGNAL_SEMAPHORE_BUSY(~0u)}, + {4968, S_008220_HQD_MESSAGE_BUSY(~0u)}, + {4985, S_008220_HQD_PQ_FETCHER_BUSY(~0u)}, + {5005, S_008220_HQD_IB_FETCHER_BUSY(~0u)}, + {5025, S_008220_HQD_IQ_FETCHER_BUSY(~0u)}, + {5045, S_008220_HQD_EOP_FETCHER_BUSY(~0u)}, + {5066, S_008220_HQD_CONSUMED_RPTR_BUSY(~0u)}, + {5089, S_008220_HQD_FETCHER_ARB_BUSY(~0u)}, + {5110, S_008220_HQD_ROQ_ALIGN_BUSY(~0u)}, + {5129, S_008220_HQD_ROQ_EOP_BUSY(~0u)}, + {5146, S_008220_HQD_ROQ_IQ_BUSY(~0u)}, + {5162, S_008220_HQD_ROQ_PQ_BUSY(~0u)}, + {5178, S_008220_HQD_ROQ_IB_BUSY(~0u)}, + {5194, S_008220_HQD_WPTR_POLL_BUSY(~0u)}, + {5213, S_008220_HQD_PQ_BUSY(~0u)}, + {5225, S_008220_HQD_IB_BUSY(~0u)}, + /* 365 */ + {5237, S_008224_RING_FETCHING_DATA(~0u)}, + {5256, S_008224_INDR1_FETCHING_DATA(~0u)}, + {5276, S_008224_INDR2_FETCHING_DATA(~0u)}, + {5296, S_008224_STATE_FETCHING_DATA(~0u)}, + {5316, S_008224_TCIU_WAITING_ON_FREE(~0u)}, + {5337, S_008224_TCIU_WAITING_ON_TAGS(~0u)}, + {4314, S_008224_ATCL2IU_WAITING_ON_FREE(~0u)}, + {4338, S_008224_ATCL2IU_WAITING_ON_TAGS(~0u)}, + {4362, S_008224_ATCL1_WAITING_ON_TRANS(~0u)}, + /* 374 */ + {5358, S_030230_COHER_SIZE_HI_256B(~0u)}, + /* 375 */ + {5377, S_0088B0_PRIM_COUNT(~0u)}, + /* 376 */ + {5388, S_0088C4_VS_NO_EXTRA_BUFFER(~0u)}, + {5407, S_0088C4_STREAMOUT_FULL_FLUSH(~0u)}, + {5428, S_0088C4_ES_LIMIT(~0u)}, + /* 379 */ + {5437, S_0088D4_VERT_REUSE(~0u)}, + /* 380 */ + {5964, S_008958_PRIM_TYPE(~0u), 29, 26}, + /* 381 */ + {203, S_00895C_INDEX_TYPE(~0u), 2, 55}, + /* 382 */ + {38, S_008988_SIZE(~0u)}, + /* 383 */ + {6016, S_0089B0_OFFCHIP_BUFFERING(~0u)}, + /* 384 */ + {6034, S_008A14_CLIP_VTX_REORDER_ENA(~0u)}, + {6055, S_008A14_NUM_CLIP_SEQ(~0u)}, + {6068, S_008A14_CLIPPED_PRIM_SEQ_STALL(~0u)}, + {6091, S_008A14_VE_NAN_PROC_DISABLE(~0u)}, + /* 388 */ + {6111, S_008A60_LINE_STIPPLE_VALUE(~0u)}, + /* 389 */ + {6130, S_008B10_CURRENT_PTR(~0u)}, + {6142, S_008B10_CURRENT_COUNT(~0u)}, + /* 391 */ + {6156, S_008670_CE_TO_CSF_NOT_RDY_TO_RCV(~0u)}, + {6181, S_008670_CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV(~0u)}, + {6219, S_008670_CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER(~0u)}, + {6260, S_008670_CE_TO_RAM_INIT_NOT_RDY(~0u)}, + {6283, S_008670_CE_TO_RAM_DUMP_NOT_RDY(~0u)}, + {6306, S_008670_CE_TO_RAM_WRITE_NOT_RDY(~0u)}, + {6330, S_008670_CE_TO_INC_FIFO_NOT_RDY_TO_RCV(~0u)}, + {6360, S_008670_CE_TO_WR_FIFO_NOT_RDY_TO_RCV(~0u)}, + {6389, S_008670_CE_WAITING_ON_BUFFER_DATA(~0u)}, + {6415, S_008670_CE_WAITING_ON_CE_BUFFER_FLAG(~0u)}, + {6444, S_008670_CE_WAITING_ON_DE_COUNTER(~0u)}, + {6469, S_008670_CE_WAITING_ON_DE_COUNTER_UNDERFLOW(~0u)}, + {5316, S_008670_TCIU_WAITING_ON_FREE(~0u)}, + {5337, S_008670_TCIU_WAITING_ON_TAGS(~0u)}, + {6504, S_008670_CE_STALLED_ON_TC_WR_CONFIRM(~0u)}, + {6532, S_008670_CE_STALLED_ON_ATOMIC_RTN_DATA(~0u)}, + {4314, S_008670_ATCL2IU_WAITING_ON_FREE(~0u)}, + {4338, S_008670_ATCL2IU_WAITING_ON_TAGS(~0u)}, + {4362, S_008670_ATCL1_WAITING_ON_TRANS(~0u)}, + /* 410 */ + {6562, S_008674_RBIU_TO_DMA_NOT_RDY_TO_RCV(~0u)}, + {6589, S_008674_RBIU_TO_SEM_NOT_RDY_TO_RCV(~0u)}, + {6616, S_008674_RBIU_TO_MEMWR_NOT_RDY_TO_RCV(~0u)}, + {6645, S_008674_ME_HAS_ACTIVE_CE_BUFFER_FLAG(~0u)}, + {6674, S_008674_ME_HAS_ACTIVE_DE_BUFFER_FLAG(~0u)}, + {6703, S_008674_ME_STALLED_ON_TC_WR_CONFIRM(~0u)}, + {6731, S_008674_ME_STALLED_ON_ATOMIC_RTN_DATA(~0u)}, + {6761, S_008674_ME_WAITING_ON_TC_READ_DATA(~0u)}, + {6788, S_008674_ME_WAITING_ON_REG_READ_DATA(~0u)}, + {6816, S_008674_RCIU_WAITING_ON_GDS_FREE(~0u)}, + {6841, S_008674_RCIU_WAITING_ON_GRBM_FREE(~0u)}, + {6867, S_008674_RCIU_WAITING_ON_VGT_FREE(~0u)}, + {6892, S_008674_RCIU_STALLED_ON_ME_READ(~0u)}, + {6916, S_008674_RCIU_STALLED_ON_DMA_READ(~0u)}, + {6941, S_008674_RCIU_STALLED_ON_APPEND_READ(~0u)}, + {6969, S_008674_RCIU_HALTED_BY_REG_VIOLATION(~0u)}, + /* 426 */ + {6998, S_008678_PFP_TO_CSF_NOT_RDY_TO_RCV(~0u)}, + {7024, S_008678_PFP_TO_MEQ_NOT_RDY_TO_RCV(~0u)}, + {7050, S_008678_PFP_TO_RCIU_NOT_RDY_TO_RCV(~0u)}, + {7077, S_008678_PFP_TO_VGT_WRITES_PENDING(~0u)}, + {7103, S_008678_PFP_RCIU_READ_PENDING(~0u)}, + {7125, S_008678_PFP_WAITING_ON_BUFFER_DATA(~0u)}, + {7152, S_008678_ME_WAIT_ON_CE_COUNTER(~0u)}, + {7174, S_008678_ME_WAIT_ON_AVAIL_BUFFER(~0u)}, + {7198, S_008678_GFX_CNTX_NOT_AVAIL_TO_ME(~0u)}, + {7223, S_008678_ME_RCIU_NOT_RDY_TO_RCV(~0u)}, + {7246, S_008678_ME_TO_CONST_NOT_RDY_TO_RCV(~0u)}, + {7273, S_008678_ME_WAITING_DATA_FROM_PFP(~0u)}, + {7298, S_008678_ME_WAITING_ON_PARTIAL_FLUSH(~0u)}, + {7326, S_008678_MEQ_TO_ME_NOT_RDY_TO_RCV(~0u)}, + {7351, S_008678_STQ_TO_ME_NOT_RDY_TO_RCV(~0u)}, + {7376, S_008678_ME_WAITING_DATA_FROM_STQ(~0u)}, + {7401, S_008678_PFP_STALLED_ON_TC_WR_CONFIRM(~0u)}, + {7430, S_008678_PFP_STALLED_ON_ATOMIC_RTN_DATA(~0u)}, + {7461, S_008678_EOPD_FIFO_NEEDS_SC_EOP_DONE(~0u)}, + {7489, S_008678_EOPD_FIFO_NEEDS_WR_CONFIRM(~0u)}, + {7516, S_008678_STRMO_WR_OF_PRIM_DATA_PENDING(~0u)}, + {7546, S_008678_PIPE_STATS_WR_DATA_PENDING(~0u)}, + {7573, S_008678_APPEND_RDY_WAIT_ON_CS_DONE(~0u)}, + {7600, S_008678_APPEND_RDY_WAIT_ON_PS_DONE(~0u)}, + {7627, S_008678_APPEND_WAIT_ON_WR_CONFIRM(~0u)}, + {7653, S_008678_APPEND_ACTIVE_PARTITION(~0u)}, + {7677, S_008678_APPEND_WAITING_TO_SEND_MEMWRITE(~0u)}, + {7709, S_008678_SURF_SYNC_NEEDS_IDLE_CNTXS(~0u)}, + {7736, S_008678_SURF_SYNC_NEEDS_ALL_CLEAN(~0u)}, + /* 455 */ + {4428, S_008680_ROQ_RING_BUSY(~0u)}, + {4442, S_008680_ROQ_INDIRECT1_BUSY(~0u)}, + {4461, S_008680_ROQ_INDIRECT2_BUSY(~0u)}, + {4480, S_008680_ROQ_STATE_BUSY(~0u)}, + {7762, S_008680_DC_BUSY(~0u)}, + {3565, S_008680_ATCL2IU_BUSY(~0u)}, + {7770, S_008680_PFP_BUSY(~0u)}, + {7779, S_008680_MEQ_BUSY(~0u)}, + {7788, S_008680_ME_BUSY(~0u)}, + {7796, S_008680_QUERY_BUSY(~0u)}, + {4556, S_008680_SEMAPHORE_BUSY(~0u)}, + {4571, S_008680_INTERRUPT_BUSY(~0u)}, + {7807, S_008680_SURFACE_SYNC_BUSY(~0u)}, + {1335, S_008680_DMA_BUSY(~0u)}, + {7825, S_008680_RCIU_BUSY(~0u)}, + {3540, S_008680_SCRATCH_RAM_BUSY(~0u)}, + {7835, S_008680_CPC_CPG_BUSY(~0u)}, + {7848, S_008680_CE_BUSY(~0u)}, + {3530, S_008680_TCIU_BUSY(~0u)}, + {4495, S_008680_ROQ_CE_RING_BUSY(~0u)}, + {4512, S_008680_ROQ_CE_INDIRECT1_BUSY(~0u)}, + {4534, S_008680_ROQ_CE_INDIRECT2_BUSY(~0u)}, + {1411, S_008680_CP_BUSY(~0u)}, + /* 478 */ + {7856, S_030800_INSTANCE_INDEX(~0u)}, + {7871, S_030800_SH_INDEX(~0u)}, + {7880, S_030800_SE_INDEX(~0u)}, + {7889, S_030800_SH_BROADCAST_WRITES(~0u)}, + {7909, S_030800_INSTANCE_BROADCAST_WRITES(~0u)}, + {7935, S_030800_SE_BROADCAST_WRITES(~0u)}, + /* 484 */ + {5964, S_030908_PRIM_TYPE(~0u), 29, 57}, + /* 485 */ + {203, S_03090C_INDEX_TYPE(~0u), 2, 55}, + /* 486 */ + {38, S_030938_SIZE(~0u)}, + /* 487 */ + {6016, S_03093C_OFFCHIP_BUFFERING(~0u)}, + {8003, S_03093C_OFFCHIP_GRANULARITY(~0u), 4, 86}, + /* 489 */ + {6111, S_030A00_LINE_STIPPLE_VALUE(~0u)}, + /* 490 */ + {6130, S_030A04_CURRENT_PTR(~0u)}, + {6142, S_030A04_CURRENT_COUNT(~0u)}, + /* 492 */ + {445, S_030A10_X(~0u)}, + {91, S_030A10_Y(~0u)}, + /* 494 */ + {445, S_030A14_X(~0u)}, + {91, S_030A14_Y(~0u)}, + /* 496 */ + {445, S_030A18_X(~0u)}, + {91, S_030A18_Y(~0u)}, + /* 498 */ + {445, S_030A2C_X(~0u)}, + {91, S_030A2C_Y(~0u)}, + /* 500 */ + {8023, S_008BF0_ENABLE_PA_SC_OUT_OF_ORDER(~0u)}, + {8049, S_008BF0_DISABLE_SC_DB_TILE_FIX(~0u)}, + {8072, S_008BF0_DISABLE_AA_MASK_FULL_FIX(~0u)}, + {8097, S_008BF0_ENABLE_1XMSAA_SAMPLE_LOCATIONS(~0u)}, + {8128, S_008BF0_ENABLE_1XMSAA_SAMPLE_LOC_CENTROID(~0u)}, + {8162, S_008BF0_DISABLE_SCISSOR_FIX(~0u)}, + {8182, S_008BF0_DISABLE_PW_BUBBLE_COLLAPSE(~0u)}, + {8209, S_008BF0_SEND_UNLIT_STILES_TO_PACKER(~0u)}, + {8237, S_008BF0_DISABLE_DUALGRAD_PERF_OPTIMIZATION(~0u)}, + /* 509 */ + {8272, S_008C08_INST_INVALIDATE(~0u)}, + {8288, S_008C08_DATA_INVALIDATE(~0u)}, + /* 511 */ + {8272, S_030D20_INST_INVALIDATE(~0u)}, + {8288, S_030D20_DATA_INVALIDATE(~0u)}, + {8304, S_030D20_INVALIDATE_VOLATILE(~0u)}, + /* 514 */ + {8324, S_008C0C_RET(~0u)}, + {8328, S_008C0C_RUI(~0u)}, + {8332, S_008C0C_RNG(~0u)}, + /* 517 */ + {8336, S_008DFC_EN(~0u)}, + {8398, S_008DFC_TGT(~0u), 33, 90}, + {8402, S_008DFC_COMPR(~0u)}, + {2891, S_008DFC_DONE(~0u)}, + {8408, S_008DFC_VM(~0u)}, + {8428, S_008DFC_ENCODING(~0u), 63, 123}, + /* 523 */ + {8437, S_030E04_ADDRESS(~0u)}, + /* 524 */ + {8445, S_030F04_COUNT_HI(~0u)}, + /* 525 */ + {8454, S_008F04_BASE_ADDRESS_HI(~0u)}, + {8470, S_008F04_STRIDE(~0u)}, + {8477, S_008F04_CACHE_SWIZZLE(~0u)}, + {8491, S_008F04_SWIZZLE_ENABLE(~0u)}, + /* 529 */ + {8445, S_030F0C_COUNT_HI(~0u)}, + /* 530 */ + {8596, S_008F0C_DST_SEL_X(~0u), 8, 186}, + {8606, S_008F0C_DST_SEL_Y(~0u), 8, 186}, + {8616, S_008F0C_DST_SEL_Z(~0u), 8, 186}, + {8626, S_008F0C_DST_SEL_W(~0u), 8, 186}, + {8810, S_008F0C_NUM_FORMAT(~0u), 8, 194}, + {9202, S_008F0C_DATA_FORMAT(~0u), 16, 202}, + {9214, S_008F0C_ELEMENT_SIZE(~0u)}, + {9227, S_008F0C_INDEX_STRIDE(~0u)}, + {9240, S_008F0C_ADD_TID_ENABLE(~0u)}, + {9255, S_008F0C_ATC(~0u)}, + {9259, S_008F0C_HASH_ENABLE(~0u)}, + {9271, S_008F0C_HEAP(~0u)}, + {9276, S_008F0C_MTYPE(~0u)}, + {209, S_008F0C_TYPE(~0u), 4, 218}, + /* 544 */ + {8445, S_030F14_COUNT_HI(~0u)}, + /* 545 */ + {8454, S_008F14_BASE_ADDRESS_HI(~0u)}, + {9351, S_008F14_MIN_LOD(~0u)}, + {9202, S_008F14_DATA_FORMAT(~0u), 64, 222}, + {8810, S_008F14_NUM_FORMAT(~0u), 16, 286}, + {9276, S_008F14_MTYPE(~0u)}, + /* 550 */ + {11341, S_008F18_WIDTH(~0u)}, + {11347, S_008F18_HEIGHT(~0u)}, + {11354, S_008F18_PERF_MOD(~0u)}, + {11363, S_008F18_INTERLACED(~0u)}, + /* 554 */ + {8445, S_030F1C_COUNT_HI(~0u)}, + /* 555 */ + {8596, S_008F1C_DST_SEL_X(~0u), 8, 186}, + {8606, S_008F1C_DST_SEL_Y(~0u), 8, 186}, + {8616, S_008F1C_DST_SEL_Z(~0u), 8, 186}, + {8626, S_008F1C_DST_SEL_W(~0u), 8, 186}, + {11374, S_008F1C_BASE_LEVEL(~0u)}, + {11385, S_008F1C_LAST_LEVEL(~0u)}, + {11396, S_008F1C_TILING_INDEX(~0u)}, + {11409, S_008F1C_POW2_PAD(~0u)}, + {9276, S_008F1C_MTYPE(~0u)}, + {9255, S_008F1C_ATC(~0u)}, + {209, S_008F1C_TYPE(~0u), 16, 302}, + /* 566 */ + {11720, S_008F20_DEPTH(~0u)}, + {11726, S_008F20_PITCH(~0u)}, + /* 568 */ + {11732, S_008F24_BASE_ARRAY(~0u)}, + {11743, S_008F24_LAST_ARRAY(~0u)}, + /* 570 */ + {11754, S_008F28_MIN_LOD_WARN(~0u)}, + {11767, S_008F28_COUNTER_BANK_ID(~0u)}, + {11783, S_008F28_LOD_HDW_CNT_EN(~0u)}, + {11798, S_008F28_COMPRESSION_EN(~0u)}, + {11813, S_008F28_ALPHA_IS_ON_MSB(~0u)}, + {11829, S_008F28_COLOR_TRANSFORM(~0u)}, + {11845, S_008F28_LOST_ALPHA_BITS(~0u)}, + {11861, S_008F28_LOST_COLOR_BITS(~0u)}, + /* 578 */ + {12059, S_008F30_CLAMP_X(~0u), 8, 318}, + {12067, S_008F30_CLAMP_Y(~0u), 8, 318}, + {12075, S_008F30_CLAMP_Z(~0u), 8, 318}, + {12083, S_008F30_MAX_ANISO_RATIO(~0u)}, + {12331, S_008F30_DEPTH_COMPARE_FUNC(~0u), 8, 326}, + {12350, S_008F30_FORCE_UNNORMALIZED(~0u)}, + {12369, S_008F30_ANISO_THRESHOLD(~0u)}, + {12385, S_008F30_MC_COORD_TRUNC(~0u)}, + {12400, S_008F30_FORCE_DEGAMMA(~0u)}, + {12414, S_008F30_ANISO_BIAS(~0u)}, + {12425, S_008F30_TRUNC_COORD(~0u)}, + {12437, S_008F30_DISABLE_CUBE_WRAP(~0u)}, + {12455, S_008F30_FILTER_MODE(~0u)}, + {12467, S_008F30_COMPAT_MODE(~0u)}, + /* 592 */ + {9351, S_008F34_MIN_LOD(~0u)}, + {12479, S_008F34_MAX_LOD(~0u)}, + {12487, S_008F34_PERF_MIP(~0u)}, + {12496, S_008F34_PERF_Z(~0u)}, + /* 596 */ + {12503, S_008F38_LOD_BIAS(~0u)}, + {12512, S_008F38_LOD_BIAS_SEC(~0u)}, + {12574, S_008F38_XY_MAG_FILTER(~0u), 2, 334}, + {12649, S_008F38_XY_MIN_FILTER(~0u), 4, 336}, + {12729, S_008F38_Z_FILTER(~0u), 3, 340}, + {12738, S_008F38_MIP_FILTER(~0u), 3, 340}, + {12749, S_008F38_MIP_POINT_PRECLAMP(~0u)}, + {12768, S_008F38_DISABLE_LSB_CEIL(~0u)}, + {12785, S_008F38_FILTER_PREC_FIX(~0u)}, + {12801, S_008F38_ANISO_OVERRIDE(~0u)}, + /* 606 */ + {12816, S_008F3C_BORDER_COLOR_PTR(~0u)}, + {12960, S_008F3C_BORDER_COLOR_TYPE(~0u), 4, 343}, + /* 608 */ + {12978, S_0090DC_VS_LOW_THRESHOLD(~0u)}, + {12995, S_0090DC_GS_LOW_THRESHOLD(~0u)}, + {13012, S_0090DC_ES_LOW_THRESHOLD(~0u)}, + {13029, S_0090DC_HS_LOW_THRESHOLD(~0u)}, + {13046, S_0090DC_LS_LOW_THRESHOLD(~0u)}, + /* 613 */ + {13063, S_0090E0_PS_CU_EN(~0u)}, + {13072, S_0090E0_VS_CU_EN(~0u)}, + /* 615 */ + {13081, S_0090E4_GS_CU_EN(~0u)}, + {13090, S_0090E4_ES_CU_EN(~0u)}, + /* 617 */ + {13099, S_0090E8_LSHS_CU_EN(~0u)}, + /* 618 */ + {13110, S_0090EC_MAX_WAVE_ID(~0u)}, + /* 619 */ + {13110, S_0090E8_MAX_WAVE_ID(~0u)}, + /* 620 */ + {13127, S_0090F0_RING_ORDER_TS0(~0u), 1, 347}, + {13142, S_0090F0_RING_ORDER_TS1(~0u)}, + {13157, S_0090F0_RING_ORDER_TS2(~0u)}, + /* 623 */ + {13172, S_00C700_PIPE_ORDER_TS0(~0u)}, + {13187, S_00C700_PIPE_ORDER_TS1(~0u)}, + {13202, S_00C700_PIPE_ORDER_TS2(~0u)}, + {13217, S_00C700_PIPE_ORDER_TS3(~0u)}, + {13232, S_00C700_TS0_DUR_MULT(~0u)}, + {13245, S_00C700_TS1_DUR_MULT(~0u)}, + {13258, S_00C700_TS2_DUR_MULT(~0u)}, + {13271, S_00C700_TS3_DUR_MULT(~0u)}, + /* 631 */ + {13284, S_0090F4_TS0_DURATION(~0u)}, + {13297, S_0090F4_TS1_DURATION(~0u)}, + /* 633 */ + {13310, S_0090F8_TS2_DURATION(~0u)}, + /* 634 */ + {38, S_008F40_SIZE(~0u)}, + /* 635 */ + {669, S_008F44_OFFSET(~0u)}, + /* 636 */ + {8445, S_030FFC_COUNT_HI(~0u)}, + /* 637 */ + {13323, S_009100_GPR_WRITE_PRIORITY(~0u)}, + {13342, S_009100_EXP_PRIORITY_ORDER(~0u)}, + {13361, S_009100_ENABLE_SQG_TOP_EVENTS(~0u)}, + {13383, S_009100_ENABLE_SQG_BOP_EVENTS(~0u)}, + {13405, S_009100_RSRC_MGMT_RESET(~0u)}, + /* 642 */ + {13674, S_00913C_VTX_DONE_DELAY(~0u), 16, 348}, + {13689, S_00913C_INTERP_ONE_PRIM_PER_ROW(~0u)}, + {13713, S_00913C_PC_LIMIT_ENABLE(~0u)}, + {13729, S_00913C_PC_LIMIT_STRICT(~0u)}, + {13745, S_00913C_PC_LIMIT_SIZE(~0u)}, + /* 647 */ + {13759, S_00936C_TYPE_A(~0u)}, + {13766, S_00936C_VGPR_A(~0u)}, + {13773, S_00936C_SGPR_A(~0u)}, + {13780, S_00936C_LDS_A(~0u)}, + {13786, S_00936C_WAVES_A(~0u)}, + {13794, S_00936C_EN_A(~0u)}, + {13799, S_00936C_TYPE_B(~0u)}, + {13806, S_00936C_VGPR_B(~0u)}, + {13813, S_00936C_SGPR_B(~0u)}, + {13820, S_00936C_LDS_B(~0u)}, + {13826, S_00936C_WAVES_B(~0u)}, + {13834, S_00936C_EN_B(~0u)}, + /* 659 */ + {13839, S_009858_MSAA1_X(~0u)}, + {13847, S_009858_MSAA1_Y(~0u)}, + {13855, S_009858_MSAA2_X(~0u)}, + {13863, S_009858_MSAA2_Y(~0u)}, + {13871, S_009858_MSAA4_X(~0u)}, + {13879, S_009858_MSAA4_Y(~0u)}, + {13887, S_009858_MSAA8_X(~0u)}, + {13895, S_009858_MSAA8_Y(~0u)}, + {13903, S_009858_MSAA16_X(~0u)}, + {13912, S_009858_MSAA16_Y(~0u)}, + /* 669 */ + {13921, S_0098F8_NUM_PIPES(~0u)}, + {13931, S_0098F8_PIPE_INTERLEAVE_SIZE(~0u)}, + {13952, S_0098F8_BANK_INTERLEAVE_SIZE(~0u)}, + {13973, S_0098F8_NUM_SHADER_ENGINES(~0u)}, + {13992, S_0098F8_SHADER_ENGINE_TILE_SIZE(~0u)}, + {14016, S_0098F8_NUM_GPUS(~0u)}, + {14025, S_0098F8_MULTI_GPU_TILE_SIZE(~0u)}, + {14045, S_0098F8_ROW_SIZE(~0u)}, + {14054, S_0098F8_NUM_LOWER_PIPES(~0u)}, + /* 678 */ + {14187, S_009910_MICRO_TILE_MODE(~0u), 4, 364}, + {14432, S_009910_ARRAY_MODE(~0u), 16, 368}, + {14794, S_009910_PIPE_CONFIG(~0u), 15, 384}, + {14984, S_009910_TILE_SPLIT(~0u), 7, 399}, + {15087, S_009910_BANK_WIDTH(~0u), 4, 406}, + {15194, S_009910_BANK_HEIGHT(~0u), 4, 410}, + {15306, S_009910_MACRO_TILE_ASPECT(~0u), 4, 414}, + {15393, S_009910_NUM_BANKS(~0u), 4, 418}, + {15434, S_009910_MICRO_TILE_MODE_NEW(~0u), 4, 422}, + {15454, S_009910_SAMPLE_SPLIT(~0u)}, + /* 688 */ + {15087, S_009990_BANK_WIDTH(~0u)}, + {15194, S_009990_BANK_HEIGHT(~0u)}, + {15306, S_009990_MACRO_TILE_ASPECT(~0u)}, + {15393, S_009990_NUM_BANKS(~0u)}, + /* 692 */ + {15467, S_00B004_MEM_BASE(~0u)}, + /* 693 */ + {15467, S_00B00C_MEM_BASE(~0u)}, + /* 694 */ + {13066, S_00B01C_CU_EN(~0u)}, + {15476, S_00B01C_WAVE_LIMIT(~0u)}, + {15487, S_00B01C_LOCK_LOW_THRESHOLD(~0u)}, + /* 697 */ + {15467, S_00B024_MEM_BASE(~0u)}, + /* 698 */ + {15506, S_00B028_VGPRS(~0u)}, + {15512, S_00B028_SGPRS(~0u)}, + {13333, S_00B028_PRIORITY(~0u)}, + {15561, S_00B028_FLOAT_MODE(~0u), 241, 426}, + {15572, S_00B028_PRIV(~0u)}, + {15577, S_00B028_DX10_CLAMP(~0u)}, + {15588, S_00B028_DEBUG_MODE(~0u)}, + {15599, S_00B028_IEEE_MODE(~0u)}, + {15609, S_00B028_CU_GROUP_DISABLE(~0u)}, + {15626, S_00B028_CACHE_CTL(~0u)}, + {15636, S_00B028_CDBG_USER(~0u)}, + /* 709 */ + {15646, S_00B02C_SCRATCH_EN(~0u)}, + {15657, S_00B02C_USER_SGPR(~0u)}, + {15667, S_00B02C_TRAP_PRESENT(~0u)}, + {15680, S_00B02C_WAVE_CNT_EN(~0u)}, + {15692, S_00B02C_EXTRA_LDS_SIZE(~0u)}, + {15707, S_00B02C_EXCP_EN(~0u)}, + {15715, S_00B02C_EXCP_EN_CIK(~0u)}, + /* 716 */ + {15467, S_00B104_MEM_BASE(~0u)}, + /* 717 */ + {15467, S_00B10C_MEM_BASE(~0u)}, + /* 718 */ + {13066, S_00B118_CU_EN(~0u)}, + {15476, S_00B118_WAVE_LIMIT(~0u)}, + {15487, S_00B118_LOCK_LOW_THRESHOLD(~0u)}, + /* 721 */ + {5431, S_00B11C_LIMIT(~0u)}, + /* 722 */ + {15467, S_00B124_MEM_BASE(~0u)}, + /* 723 */ + {15506, S_00B128_VGPRS(~0u)}, + {15512, S_00B128_SGPRS(~0u)}, + {13333, S_00B128_PRIORITY(~0u)}, + {15561, S_00B128_FLOAT_MODE(~0u)}, + {15572, S_00B128_PRIV(~0u)}, + {15577, S_00B128_DX10_CLAMP(~0u)}, + {15588, S_00B128_DEBUG_MODE(~0u)}, + {15599, S_00B128_IEEE_MODE(~0u)}, + {15727, S_00B128_VGPR_COMP_CNT(~0u)}, + {15741, S_00B128_CU_GROUP_ENABLE(~0u)}, + {15626, S_00B128_CACHE_CTL(~0u)}, + {15636, S_00B128_CDBG_USER(~0u)}, + /* 735 */ + {15646, S_00B12C_SCRATCH_EN(~0u)}, + {15657, S_00B12C_USER_SGPR(~0u)}, + {15667, S_00B12C_TRAP_PRESENT(~0u)}, + {15757, S_00B12C_OC_LDS_EN(~0u)}, + {15767, S_00B12C_SO_BASE0_EN(~0u)}, + {15779, S_00B12C_SO_BASE1_EN(~0u)}, + {15791, S_00B12C_SO_BASE2_EN(~0u)}, + {15803, S_00B12C_SO_BASE3_EN(~0u)}, + {15815, S_00B12C_SO_EN(~0u)}, + {15707, S_00B12C_EXCP_EN(~0u)}, + {15715, S_00B12C_EXCP_EN_CIK(~0u)}, + {15821, S_00B12C_DISPATCH_DRAW_EN(~0u)}, + /* 747 */ + {15467, S_00B204_MEM_BASE(~0u)}, + /* 748 */ + {15467, S_00B20C_MEM_BASE(~0u)}, + /* 749 */ + {13066, S_00B21C_CU_EN(~0u)}, + {15476, S_00B21C_WAVE_LIMIT(~0u)}, + {15487, S_00B21C_LOCK_LOW_THRESHOLD(~0u)}, + {15838, S_00B21C_GROUP_FIFO_DEPTH(~0u)}, + /* 753 */ + {15467, S_00B224_MEM_BASE(~0u)}, + /* 754 */ + {15506, S_00B228_VGPRS(~0u)}, + {15512, S_00B228_SGPRS(~0u)}, + {13333, S_00B228_PRIORITY(~0u)}, + {15561, S_00B228_FLOAT_MODE(~0u)}, + {15572, S_00B228_PRIV(~0u)}, + {15577, S_00B228_DX10_CLAMP(~0u)}, + {15588, S_00B228_DEBUG_MODE(~0u)}, + {15599, S_00B228_IEEE_MODE(~0u)}, + {15741, S_00B228_CU_GROUP_ENABLE(~0u)}, + {15626, S_00B228_CACHE_CTL(~0u)}, + {15636, S_00B228_CDBG_USER(~0u)}, + /* 765 */ + {15646, S_00B22C_SCRATCH_EN(~0u)}, + {15657, S_00B22C_USER_SGPR(~0u)}, + {15667, S_00B22C_TRAP_PRESENT(~0u)}, + {15707, S_00B22C_EXCP_EN(~0u)}, + {15715, S_00B22C_EXCP_EN_CIK(~0u)}, + /* 770 */ + {15467, S_00B304_MEM_BASE(~0u)}, + /* 771 */ + {15467, S_00B30C_MEM_BASE(~0u)}, + /* 772 */ + {13066, S_00B31C_CU_EN(~0u)}, + {15476, S_00B31C_WAVE_LIMIT(~0u)}, + {15487, S_00B31C_LOCK_LOW_THRESHOLD(~0u)}, + {15838, S_00B31C_GROUP_FIFO_DEPTH(~0u)}, + /* 776 */ + {15467, S_00B324_MEM_BASE(~0u)}, + /* 777 */ + {15506, S_00B328_VGPRS(~0u)}, + {15512, S_00B328_SGPRS(~0u)}, + {13333, S_00B328_PRIORITY(~0u)}, + {15561, S_00B328_FLOAT_MODE(~0u)}, + {15572, S_00B328_PRIV(~0u)}, + {15577, S_00B328_DX10_CLAMP(~0u)}, + {15588, S_00B328_DEBUG_MODE(~0u)}, + {15599, S_00B328_IEEE_MODE(~0u)}, + {15727, S_00B328_VGPR_COMP_CNT(~0u)}, + {15741, S_00B328_CU_GROUP_ENABLE(~0u)}, + {15626, S_00B328_CACHE_CTL(~0u)}, + {15636, S_00B328_CDBG_USER(~0u)}, + /* 789 */ + {15646, S_00B32C_SCRATCH_EN(~0u)}, + {15657, S_00B32C_USER_SGPR(~0u)}, + {15667, S_00B32C_TRAP_PRESENT(~0u)}, + {15757, S_00B32C_OC_LDS_EN(~0u)}, + {15707, S_00B32C_EXCP_EN(~0u)}, + {15698, S_00B32C_LDS_SIZE(~0u)}, + /* 795 */ + {15467, S_00B404_MEM_BASE(~0u)}, + /* 796 */ + {15467, S_00B40C_MEM_BASE(~0u)}, + /* 797 */ + {15476, S_00B41C_WAVE_LIMIT(~0u)}, + {15487, S_00B41C_LOCK_LOW_THRESHOLD(~0u)}, + {15838, S_00B41C_GROUP_FIFO_DEPTH(~0u)}, + /* 800 */ + {15467, S_00B424_MEM_BASE(~0u)}, + /* 801 */ + {15506, S_00B428_VGPRS(~0u)}, + {15512, S_00B428_SGPRS(~0u)}, + {13333, S_00B428_PRIORITY(~0u)}, + {15561, S_00B428_FLOAT_MODE(~0u)}, + {15572, S_00B428_PRIV(~0u)}, + {15577, S_00B428_DX10_CLAMP(~0u)}, + {15588, S_00B428_DEBUG_MODE(~0u)}, + {15599, S_00B428_IEEE_MODE(~0u)}, + {15626, S_00B428_CACHE_CTL(~0u)}, + {15636, S_00B428_CDBG_USER(~0u)}, + /* 811 */ + {15646, S_00B42C_SCRATCH_EN(~0u)}, + {15657, S_00B42C_USER_SGPR(~0u)}, + {15667, S_00B42C_TRAP_PRESENT(~0u)}, + {15757, S_00B42C_OC_LDS_EN(~0u)}, + {15855, S_00B42C_TG_SIZE_EN(~0u)}, + {15707, S_00B42C_EXCP_EN(~0u)}, + /* 817 */ + {15467, S_00B504_MEM_BASE(~0u)}, + /* 818 */ + {15467, S_00B50C_MEM_BASE(~0u)}, + /* 819 */ + {13066, S_00B51C_CU_EN(~0u)}, + {15476, S_00B51C_WAVE_LIMIT(~0u)}, + {15487, S_00B51C_LOCK_LOW_THRESHOLD(~0u)}, + {15838, S_00B51C_GROUP_FIFO_DEPTH(~0u)}, + /* 823 */ + {15467, S_00B524_MEM_BASE(~0u)}, + /* 824 */ + {15506, S_00B528_VGPRS(~0u)}, + {15512, S_00B528_SGPRS(~0u)}, + {13333, S_00B528_PRIORITY(~0u)}, + {15561, S_00B528_FLOAT_MODE(~0u)}, + {15572, S_00B528_PRIV(~0u)}, + {15577, S_00B528_DX10_CLAMP(~0u)}, + {15588, S_00B528_DEBUG_MODE(~0u)}, + {15599, S_00B528_IEEE_MODE(~0u)}, + {15727, S_00B528_VGPR_COMP_CNT(~0u)}, + {15626, S_00B528_CACHE_CTL(~0u)}, + {15636, S_00B528_CDBG_USER(~0u)}, + /* 835 */ + {15646, S_00B52C_SCRATCH_EN(~0u)}, + {15657, S_00B52C_USER_SGPR(~0u)}, + {15667, S_00B52C_TRAP_PRESENT(~0u)}, + {15698, S_00B52C_LDS_SIZE(~0u)}, + {15707, S_00B52C_EXCP_EN(~0u)}, + /* 840 */ + {15866, S_00B800_COMPUTE_SHADER_EN(~0u)}, + {15884, S_00B800_PARTIAL_TG_EN(~0u)}, + {15898, S_00B800_FORCE_START_AT_000(~0u)}, + {15917, S_00B800_ORDERED_APPEND_ENBL(~0u)}, + {15937, S_00B800_ORDERED_APPEND_MODE(~0u)}, + {15957, S_00B800_USE_THREAD_DIMENSIONS(~0u)}, + {15979, S_00B800_ORDER_MODE(~0u)}, + {15990, S_00B800_DISPATCH_CACHE_CNTL(~0u)}, + {16010, S_00B800_SCALAR_L1_INV_VOL(~0u)}, + {16028, S_00B800_VECTOR_L1_INV_VOL(~0u)}, + {16046, S_00B800_DATA_ATC(~0u)}, + {16055, S_00B800_RESTORE(~0u)}, + /* 852 */ + {16063, S_00B81C_NUM_THREAD_FULL(~0u)}, + {16079, S_00B81C_NUM_THREAD_PARTIAL(~0u)}, + /* 854 */ + {16063, S_00B820_NUM_THREAD_FULL(~0u)}, + {16079, S_00B820_NUM_THREAD_PARTIAL(~0u)}, + /* 856 */ + {16063, S_00B824_NUM_THREAD_FULL(~0u)}, + {16079, S_00B824_NUM_THREAD_PARTIAL(~0u)}, + /* 858 */ + {13110, S_00B82C_MAX_WAVE_ID(~0u)}, + /* 859 */ + {16098, S_00B828_PIPELINESTAT_ENABLE(~0u)}, + /* 860 */ + {16118, S_00B82C_PERFCOUNT_ENABLE(~0u)}, + /* 861 */ + {391, S_00B834_DATA(~0u)}, + {16135, S_00B834_INST_ATC(~0u)}, + /* 863 */ + {391, S_00B83C_DATA(~0u)}, + /* 864 */ + {391, S_00B844_DATA(~0u)}, + /* 865 */ + {15506, S_00B848_VGPRS(~0u)}, + {15512, S_00B848_SGPRS(~0u)}, + {13333, S_00B848_PRIORITY(~0u)}, + {15561, S_00B848_FLOAT_MODE(~0u)}, + {15572, S_00B848_PRIV(~0u)}, + {15577, S_00B848_DX10_CLAMP(~0u)}, + {15588, S_00B848_DEBUG_MODE(~0u)}, + {15599, S_00B848_IEEE_MODE(~0u)}, + {16144, S_00B848_BULKY(~0u)}, + {15636, S_00B848_CDBG_USER(~0u)}, + /* 875 */ + {15646, S_00B84C_SCRATCH_EN(~0u)}, + {15657, S_00B84C_USER_SGPR(~0u)}, + {15667, S_00B84C_TRAP_PRESENT(~0u)}, + {16150, S_00B84C_TGID_X_EN(~0u)}, + {16160, S_00B84C_TGID_Y_EN(~0u)}, + {16170, S_00B84C_TGID_Z_EN(~0u)}, + {15855, S_00B84C_TG_SIZE_EN(~0u)}, + {16180, S_00B84C_TIDIG_COMP_CNT(~0u)}, + {16195, S_00B84C_EXCP_EN_MSB(~0u)}, + {15698, S_00B84C_LDS_SIZE(~0u)}, + {15707, S_00B84C_EXCP_EN(~0u)}, + /* 886 */ + {391, S_00B850_DATA(~0u)}, + /* 887 */ + {16207, S_00B854_WAVES_PER_SH(~0u)}, + {16220, S_00B854_WAVES_PER_SH_CIK(~0u)}, + {16237, S_00B854_TG_PER_CU(~0u)}, + {16247, S_00B854_LOCK_THRESHOLD(~0u)}, + {16262, S_00B854_SIMD_DEST_CNTL(~0u)}, + {16277, S_00B854_FORCE_SIMD_DIST(~0u)}, + {16293, S_00B854_CU_GROUP_COUNT(~0u)}, + /* 894 */ + {16308, S_00B858_SH0_CU_EN(~0u)}, + {16318, S_00B858_SH1_CU_EN(~0u)}, + /* 896 */ + {16308, S_00B85C_SH0_CU_EN(~0u)}, + {16318, S_00B85C_SH1_CU_EN(~0u)}, + /* 898 */ + {16328, S_00B860_WAVES(~0u)}, + {16334, S_00B860_WAVESIZE(~0u)}, + /* 900 */ + {16308, S_00B864_SH0_CU_EN(~0u)}, + {16318, S_00B864_SH1_CU_EN(~0u)}, + /* 902 */ + {16308, S_00B868_SH0_CU_EN(~0u)}, + {16318, S_00B868_SH1_CU_EN(~0u)}, + /* 904 */ + {16343, S_00B87C_SEND_SEID(~0u)}, + {14515, S_00B87C_RESERVED2(~0u)}, + {16353, S_00B87C_RESERVED3(~0u)}, + {16363, S_00B87C_RESERVED4(~0u)}, + {16373, S_00B87C_WAVE_ID_BASE(~0u)}, + /* 909 */ + {16386, S_00B888_PAYLOAD(~0u)}, + {16394, S_00B888_IS_EVENT(~0u)}, + {16403, S_00B888_IS_STATE(~0u)}, + /* 912 */ + {906, S_00B890_ADDR(~0u)}, + /* 913 */ + {9255, S_00B894_ATC(~0u)}, + {9276, S_00B894_MTYPE(~0u)}, + /* 915 */ + {16412, S_034404_PERFCOUNTER_HI(~0u)}, + /* 916 */ + {16427, S_036004_PERF_SEL2(~0u)}, + {16437, S_036004_PERF_SEL3(~0u)}, + /* 918 */ + {16447, S_036008_PERF_SEL(~0u)}, + {16456, S_036008_PERF_SEL1(~0u)}, + {16466, S_036008_CNTR_MODE(~0u)}, + /* 921 */ + {16427, S_036010_PERF_SEL2(~0u)}, + {16437, S_036010_PERF_SEL3(~0u)}, + /* 923 */ + {16427, S_036018_PERF_SEL2(~0u)}, + {16437, S_036018_PERF_SEL3(~0u)}, + /* 925 */ + {16447, S_03601C_PERF_SEL(~0u)}, + {16456, S_03601C_PERF_SEL1(~0u)}, + {16466, S_03601C_CNTR_MODE(~0u)}, + /* 928 */ + {16523, S_036020_PERFMON_STATE(~0u), 3, 667}, + {16537, S_036020_SPM_PERFMON_STATE(~0u)}, + {16555, S_036020_PERFMON_ENABLE_MODE(~0u)}, + {16575, S_036020_PERFMON_SAMPLE_ENABLE(~0u)}, + /* 932 */ + {16447, S_036024_PERF_SEL(~0u)}, + {16456, S_036024_PERF_SEL1(~0u)}, + {16466, S_036024_CNTR_MODE(~0u)}, + /* 935 */ + {16447, S_036100_PERF_SEL(~0u)}, + {16597, S_036100_DB_CLEAN_USER_DEFINED_MASK(~0u)}, + {16624, S_036100_CB_CLEAN_USER_DEFINED_MASK(~0u)}, + {16651, S_036100_VGT_BUSY_USER_DEFINED_MASK(~0u)}, + {16678, S_036100_TA_BUSY_USER_DEFINED_MASK(~0u)}, + {16704, S_036100_SX_BUSY_USER_DEFINED_MASK(~0u)}, + {16730, S_036100_SPI_BUSY_USER_DEFINED_MASK(~0u)}, + {16757, S_036100_SC_BUSY_USER_DEFINED_MASK(~0u)}, + {16783, S_036100_PA_BUSY_USER_DEFINED_MASK(~0u)}, + {16809, S_036100_GRBM_BUSY_USER_DEFINED_MASK(~0u)}, + {16837, S_036100_DB_BUSY_USER_DEFINED_MASK(~0u)}, + {16863, S_036100_CB_BUSY_USER_DEFINED_MASK(~0u)}, + {16889, S_036100_CP_BUSY_USER_DEFINED_MASK(~0u)}, + {16915, S_036100_IA_BUSY_USER_DEFINED_MASK(~0u)}, + {16941, S_036100_GDS_BUSY_USER_DEFINED_MASK(~0u)}, + {16968, S_036100_BCI_BUSY_USER_DEFINED_MASK(~0u)}, + {16995, S_036100_RLC_BUSY_USER_DEFINED_MASK(~0u)}, + {17022, S_036100_TC_BUSY_USER_DEFINED_MASK(~0u)}, + {17048, S_036100_WD_BUSY_USER_DEFINED_MASK(~0u)}, + /* 954 */ + {16447, S_036108_PERF_SEL(~0u)}, + {16597, S_036108_DB_CLEAN_USER_DEFINED_MASK(~0u)}, + {16624, S_036108_CB_CLEAN_USER_DEFINED_MASK(~0u)}, + {16678, S_036108_TA_BUSY_USER_DEFINED_MASK(~0u)}, + {16704, S_036108_SX_BUSY_USER_DEFINED_MASK(~0u)}, + {16730, S_036108_SPI_BUSY_USER_DEFINED_MASK(~0u)}, + {16757, S_036108_SC_BUSY_USER_DEFINED_MASK(~0u)}, + {16837, S_036108_DB_BUSY_USER_DEFINED_MASK(~0u)}, + {16863, S_036108_CB_BUSY_USER_DEFINED_MASK(~0u)}, + {16651, S_036108_VGT_BUSY_USER_DEFINED_MASK(~0u)}, + {16783, S_036108_PA_BUSY_USER_DEFINED_MASK(~0u)}, + {16968, S_036108_BCI_BUSY_USER_DEFINED_MASK(~0u)}, + /* 966 */ + {16447, S_03610C_PERF_SEL(~0u)}, + {16597, S_03610C_DB_CLEAN_USER_DEFINED_MASK(~0u)}, + {16624, S_03610C_CB_CLEAN_USER_DEFINED_MASK(~0u)}, + {16678, S_03610C_TA_BUSY_USER_DEFINED_MASK(~0u)}, + {16704, S_03610C_SX_BUSY_USER_DEFINED_MASK(~0u)}, + {16730, S_03610C_SPI_BUSY_USER_DEFINED_MASK(~0u)}, + {16757, S_03610C_SC_BUSY_USER_DEFINED_MASK(~0u)}, + {16837, S_03610C_DB_BUSY_USER_DEFINED_MASK(~0u)}, + {16863, S_03610C_CB_BUSY_USER_DEFINED_MASK(~0u)}, + {16651, S_03610C_VGT_BUSY_USER_DEFINED_MASK(~0u)}, + {16783, S_03610C_PA_BUSY_USER_DEFINED_MASK(~0u)}, + {16968, S_03610C_BCI_BUSY_USER_DEFINED_MASK(~0u)}, + /* 978 */ + {16447, S_036110_PERF_SEL(~0u)}, + {16597, S_036110_DB_CLEAN_USER_DEFINED_MASK(~0u)}, + {16624, S_036110_CB_CLEAN_USER_DEFINED_MASK(~0u)}, + {16678, S_036110_TA_BUSY_USER_DEFINED_MASK(~0u)}, + {16704, S_036110_SX_BUSY_USER_DEFINED_MASK(~0u)}, + {16730, S_036110_SPI_BUSY_USER_DEFINED_MASK(~0u)}, + {16757, S_036110_SC_BUSY_USER_DEFINED_MASK(~0u)}, + {16837, S_036110_DB_BUSY_USER_DEFINED_MASK(~0u)}, + {16863, S_036110_CB_BUSY_USER_DEFINED_MASK(~0u)}, + {16651, S_036110_VGT_BUSY_USER_DEFINED_MASK(~0u)}, + {16783, S_036110_PA_BUSY_USER_DEFINED_MASK(~0u)}, + {16968, S_036110_BCI_BUSY_USER_DEFINED_MASK(~0u)}, + /* 990 */ + {16447, S_036114_PERF_SEL(~0u)}, + {16597, S_036114_DB_CLEAN_USER_DEFINED_MASK(~0u)}, + {16624, S_036114_CB_CLEAN_USER_DEFINED_MASK(~0u)}, + {16678, S_036114_TA_BUSY_USER_DEFINED_MASK(~0u)}, + {16704, S_036114_SX_BUSY_USER_DEFINED_MASK(~0u)}, + {16730, S_036114_SPI_BUSY_USER_DEFINED_MASK(~0u)}, + {16757, S_036114_SC_BUSY_USER_DEFINED_MASK(~0u)}, + {16837, S_036114_DB_BUSY_USER_DEFINED_MASK(~0u)}, + {16863, S_036114_CB_BUSY_USER_DEFINED_MASK(~0u)}, + {16651, S_036114_VGT_BUSY_USER_DEFINED_MASK(~0u)}, + {16783, S_036114_PA_BUSY_USER_DEFINED_MASK(~0u)}, + {16968, S_036114_BCI_BUSY_USER_DEFINED_MASK(~0u)}, + /* 1002 */ + {16447, S_036200_PERF_SEL(~0u)}, + {17074, S_036200_PERF_MODE(~0u)}, + /* 1004 */ + {16447, S_036210_PERF_SEL(~0u)}, + {16456, S_036210_PERF_SEL1(~0u)}, + {16466, S_036210_CNTR_MODE(~0u)}, + {17084, S_036210_PERF_MODE1(~0u)}, + {17074, S_036210_PERF_MODE(~0u)}, + /* 1009 */ + {16427, S_036220_PERF_SEL2(~0u)}, + {16437, S_036220_PERF_SEL3(~0u)}, + {17095, S_036220_PERF_MODE3(~0u)}, + {17106, S_036220_PERF_MODE2(~0u)}, + /* 1013 */ + {16447, S_036230_PERF_SEL(~0u)}, + {16456, S_036230_PERF_SEL1(~0u)}, + {16466, S_036230_CNTR_MODE(~0u)}, + {17084, S_036230_PERF_MODE1(~0u)}, + {17074, S_036230_PERF_MODE(~0u)}, + /* 1018 */ + {16427, S_036240_PERF_SEL2(~0u)}, + {16437, S_036240_PERF_SEL3(~0u)}, + {17095, S_036240_PERF_MODE3(~0u)}, + {17106, S_036240_PERF_MODE2(~0u)}, + /* 1022 */ + {17117, S_036250_PERF_SEID_IGNORE_MASK(~0u)}, + /* 1023 */ + {16447, S_036400_PERF_SEL(~0u)}, + {16456, S_036400_PERF_SEL1(~0u)}, + {16466, S_036400_CNTR_MODE(~0u)}, + /* 1026 */ + {16427, S_036404_PERF_SEL2(~0u)}, + {16437, S_036404_PERF_SEL3(~0u)}, + /* 1028 */ + {16447, S_036500_PERF_SEL(~0u)}, + {16456, S_036500_PERF_SEL1(~0u)}, + {16466, S_036500_CNTR_MODE(~0u)}, + /* 1031 */ + {16427, S_036504_PERF_SEL2(~0u)}, + {16437, S_036504_PERF_SEL3(~0u)}, + /* 1033 */ + {16447, S_036600_PERF_SEL(~0u)}, + {16456, S_036600_PERF_SEL1(~0u)}, + {16466, S_036600_CNTR_MODE(~0u)}, + /* 1036 */ + {16427, S_036610_PERF_SEL2(~0u)}, + {16437, S_036610_PERF_SEL3(~0u)}, + /* 1038 */ + {17139, S_036628_BIN0_MIN(~0u)}, + {17148, S_036628_BIN0_MAX(~0u)}, + {17157, S_036628_BIN1_MIN(~0u)}, + {17166, S_036628_BIN1_MAX(~0u)}, + {17175, S_036628_BIN2_MIN(~0u)}, + {17184, S_036628_BIN2_MAX(~0u)}, + {17193, S_036628_BIN3_MIN(~0u)}, + {17202, S_036628_BIN3_MAX(~0u)}, + /* 1046 */ + {16447, S_036700_PERF_SEL(~0u)}, + {17211, S_036700_SQC_BANK_MASK(~0u)}, + {17225, S_036700_SQC_CLIENT_MASK(~0u)}, + {17241, S_036700_SPM_MODE(~0u)}, + {17250, S_036700_SIMD_MASK(~0u)}, + {17074, S_036700_PERF_MODE(~0u)}, + /* 1052 */ + {17260, S_036780_PS_EN(~0u)}, + {17266, S_036780_VS_EN(~0u)}, + {17272, S_036780_GS_EN(~0u)}, + {17278, S_036780_ES_EN(~0u)}, + {17284, S_036780_HS_EN(~0u)}, + {17290, S_036780_LS_EN(~0u)}, + {17296, S_036780_CS_EN(~0u)}, + {17302, S_036780_CNTR_RATE(~0u)}, + {17312, S_036780_DISABLE_FLUSH(~0u)}, + /* 1061 */ + {17326, S_036784_SH0_MASK(~0u)}, + {17335, S_036784_SH1_MASK(~0u)}, + /* 1063 */ + {17344, S_036788_FORCE_EN(~0u)}, + /* 1064 */ + {17353, S_036900_PERFCOUNTER_SELECT(~0u)}, + {17372, S_036900_PERFCOUNTER_SELECT1(~0u)}, + {16466, S_036900_CNTR_MODE(~0u)}, + /* 1067 */ + {17392, S_036910_PERFCOUNTER_SELECT2(~0u)}, + {17412, S_036910_PERFCOUNTER_SELECT3(~0u)}, + /* 1069 */ + {17353, S_036A00_PERFCOUNTER_SELECT(~0u)}, + {17372, S_036A00_PERFCOUNTER_SELECT1(~0u)}, + {16466, S_036A00_CNTR_MODE(~0u)}, + /* 1072 */ + {17392, S_036A10_PERFCOUNTER_SELECT2(~0u)}, + {17412, S_036A10_PERFCOUNTER_SELECT3(~0u)}, + /* 1074 */ + {16447, S_036B00_PERF_SEL(~0u)}, + {16456, S_036B00_PERF_SEL1(~0u)}, + {16466, S_036B00_CNTR_MODE(~0u)}, + {17084, S_036B00_PERF_MODE1(~0u)}, + {17074, S_036B00_PERF_MODE(~0u)}, + /* 1079 */ + {16427, S_036B04_PERF_SEL2(~0u)}, + {16437, S_036B04_PERF_SEL3(~0u)}, + {17095, S_036B04_PERF_MODE3(~0u)}, + {17106, S_036B04_PERF_MODE2(~0u)}, + /* 1083 */ + {16447, S_036C00_PERF_SEL(~0u)}, + {16456, S_036C00_PERF_SEL1(~0u)}, + {16466, S_036C00_CNTR_MODE(~0u)}, + {17084, S_036C00_PERF_MODE1(~0u)}, + {17074, S_036C00_PERF_MODE(~0u)}, + /* 1088 */ + {16427, S_036C04_PERF_SEL2(~0u)}, + {16437, S_036C04_PERF_SEL3(~0u)}, + {17095, S_036C04_PERF_MODE3(~0u)}, + {17106, S_036C04_PERF_MODE2(~0u)}, + /* 1092 */ + {16447, S_036D00_PERF_SEL(~0u)}, + {16456, S_036D00_PERF_SEL1(~0u)}, + {16466, S_036D00_CNTR_MODE(~0u)}, + {17084, S_036D00_PERF_MODE1(~0u)}, + {17074, S_036D00_PERF_MODE(~0u)}, + /* 1097 */ + {16427, S_036D04_PERF_SEL2(~0u)}, + {16437, S_036D04_PERF_SEL3(~0u)}, + {17095, S_036D04_PERF_MODE3(~0u)}, + {17106, S_036D04_PERF_MODE2(~0u)}, + /* 1101 */ + {16447, S_036E00_PERF_SEL(~0u)}, + {16456, S_036E00_PERF_SEL1(~0u)}, + {16466, S_036E00_CNTR_MODE(~0u)}, + {17084, S_036E00_PERF_MODE1(~0u)}, + {17074, S_036E00_PERF_MODE(~0u)}, + /* 1106 */ + {16427, S_036E04_PERF_SEL2(~0u)}, + {16437, S_036E04_PERF_SEL3(~0u)}, + {17106, S_036E04_PERF_MODE2(~0u)}, + {17095, S_036E04_PERF_MODE3(~0u)}, + /* 1110 */ + {16447, S_036E40_PERF_SEL(~0u)}, + {16456, S_036E40_PERF_SEL1(~0u)}, + {16466, S_036E40_CNTR_MODE(~0u)}, + {17084, S_036E40_PERF_MODE1(~0u)}, + {17074, S_036E40_PERF_MODE(~0u)}, + /* 1115 */ + {16427, S_036E44_PERF_SEL2(~0u)}, + {16437, S_036E44_PERF_SEL3(~0u)}, + {17106, S_036E44_PERF_MODE2(~0u)}, + {17095, S_036E44_PERF_MODE3(~0u)}, + /* 1119 */ + {17432, S_037000_OP_FILTER_ENABLE(~0u)}, + {17449, S_037000_OP_FILTER_SEL(~0u)}, + {17463, S_037000_FORMAT_FILTER_ENABLE(~0u)}, + {17484, S_037000_FORMAT_FILTER_SEL(~0u)}, + {17502, S_037000_CLEAR_FILTER_ENABLE(~0u)}, + {17522, S_037000_CLEAR_FILTER_SEL(~0u)}, + {17539, S_037000_MRT_FILTER_ENABLE(~0u)}, + {17557, S_037000_MRT_FILTER_SEL(~0u)}, + {17572, S_037000_NUM_SAMPLES_FILTER_ENABLE(~0u)}, + {17598, S_037000_NUM_SAMPLES_FILTER_SEL(~0u)}, + {17621, S_037000_NUM_FRAGMENTS_FILTER_ENABLE(~0u)}, + {17649, S_037000_NUM_FRAGMENTS_FILTER_SEL(~0u)}, + /* 1131 */ + {16447, S_037004_PERF_SEL(~0u)}, + {16456, S_037004_PERF_SEL1(~0u)}, + {16466, S_037004_CNTR_MODE(~0u)}, + {17084, S_037004_PERF_MODE1(~0u)}, + {17074, S_037004_PERF_MODE(~0u)}, + /* 1136 */ + {16427, S_037008_PERF_SEL2(~0u)}, + {16437, S_037008_PERF_SEL3(~0u)}, + {17095, S_037008_PERF_MODE3(~0u)}, + {17106, S_037008_PERF_MODE2(~0u)}, + /* 1140 */ + {16447, S_037100_PERF_SEL(~0u)}, + {16456, S_037100_PERF_SEL1(~0u)}, + {16466, S_037100_CNTR_MODE(~0u)}, + {17084, S_037100_PERF_MODE1(~0u)}, + {17074, S_037100_PERF_MODE(~0u)}, + /* 1145 */ + {16427, S_037104_PERF_SEL2(~0u)}, + {16437, S_037104_PERF_SEL3(~0u)}, + {17095, S_037104_PERF_MODE3(~0u)}, + {17106, S_037104_PERF_MODE2(~0u)}, + /* 1149 */ + {17674, S_028000_DEPTH_CLEAR_ENABLE(~0u)}, + {17693, S_028000_STENCIL_CLEAR_ENABLE(~0u)}, + {17714, S_028000_DEPTH_COPY(~0u)}, + {17725, S_028000_STENCIL_COPY(~0u)}, + {17738, S_028000_RESUMMARIZE_ENABLE(~0u)}, + {17757, S_028000_STENCIL_COMPRESS_DISABLE(~0u)}, + {17782, S_028000_DEPTH_COMPRESS_DISABLE(~0u)}, + {17805, S_028000_COPY_CENTROID(~0u)}, + {17819, S_028000_COPY_SAMPLE(~0u)}, + {17831, S_028000_DECOMPRESS_ENABLE(~0u)}, + /* 1159 */ + {17849, S_028004_ZPASS_INCREMENT_DISABLE(~0u)}, + {17873, S_028004_PERFECT_ZPASS_COUNTS(~0u)}, + {17894, S_028004_SAMPLE_RATE(~0u)}, + {17906, S_028004_ZPASS_ENABLE(~0u)}, + {17919, S_028004_ZFAIL_ENABLE(~0u)}, + {17932, S_028004_SFAIL_ENABLE(~0u)}, + {17945, S_028004_DBFAIL_ENABLE(~0u)}, + {17959, S_028004_SLICE_EVEN_ENABLE(~0u)}, + {17977, S_028004_SLICE_ODD_ENABLE(~0u)}, + /* 1168 */ + {17994, S_028008_SLICE_START(~0u)}, + {18006, S_028008_SLICE_MAX(~0u)}, + {18016, S_028008_Z_READ_ONLY(~0u)}, + {18028, S_028008_STENCIL_READ_ONLY(~0u)}, + /* 1172 */ + {18098, S_02800C_FORCE_HIZ_ENABLE(~0u), 4, 670}, + {18115, S_02800C_FORCE_HIS_ENABLE0(~0u), 4, 670}, + {18133, S_02800C_FORCE_HIS_ENABLE1(~0u), 4, 670}, + {18151, S_02800C_FORCE_SHADER_Z_ORDER(~0u)}, + {18172, S_02800C_FAST_Z_DISABLE(~0u)}, + {18187, S_02800C_FAST_STENCIL_DISABLE(~0u)}, + {18208, S_02800C_NOOP_CULL_DISABLE(~0u)}, + {18226, S_02800C_FORCE_COLOR_KILL(~0u)}, + {18243, S_02800C_FORCE_Z_READ(~0u)}, + {18256, S_02800C_FORCE_STENCIL_READ(~0u)}, + {18275, S_02800C_FORCE_FULL_Z_RANGE(~0u), 4, 670}, + {18294, S_02800C_FORCE_QC_SMASK_CONFLICT(~0u)}, + {18318, S_02800C_DISABLE_VIEWPORT_CLAMP(~0u)}, + {18341, S_02800C_IGNORE_SC_ZRANGE(~0u)}, + {18358, S_02800C_DISABLE_FULLY_COVERED(~0u)}, + {18443, S_02800C_FORCE_Z_LIMIT_SUMM(~0u), 4, 674}, + {18462, S_02800C_MAX_TILES_IN_DTT(~0u)}, + {18479, S_02800C_DISABLE_TILE_RATE_TILES(~0u)}, + {18503, S_02800C_FORCE_Z_DIRTY(~0u)}, + {18517, S_02800C_FORCE_STENCIL_DIRTY(~0u)}, + {18537, S_02800C_FORCE_Z_VALID(~0u)}, + {18551, S_02800C_FORCE_STENCIL_VALID(~0u)}, + {18571, S_02800C_PRESERVE_COMPRESSION(~0u)}, + /* 1195 */ + {18645, S_028010_PARTIAL_SQUAD_LAUNCH_CONTROL(~0u), 4, 678}, + {18674, S_028010_PARTIAL_SQUAD_LAUNCH_COUNTDOWN(~0u)}, + {18705, S_028010_DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION(~0u)}, + {18741, S_028010_DISABLE_SMEM_EXPCLEAR_OPTIMIZATION(~0u)}, + {18776, S_028010_DISABLE_COLOR_ON_VALIDATION(~0u)}, + {18804, S_028010_DECOMPRESS_Z_ON_FLUSH(~0u)}, + {18826, S_028010_DISABLE_REG_SNOOP(~0u)}, + {18844, S_028010_DEPTH_BOUNDS_HIER_DEPTH_DISABLE(~0u)}, + {18876, S_028010_SEPARATE_HIZS_FUNC_ENABLE(~0u)}, + {18902, S_028010_HIZ_ZFUNC(~0u)}, + {18912, S_028010_HIS_SFUNC_FF(~0u)}, + {18925, S_028010_HIS_SFUNC_BF(~0u)}, + {18938, S_028010_PRESERVE_ZRANGE(~0u)}, + {18954, S_028010_PRESERVE_SRESULTS(~0u)}, + {18972, S_028010_DISABLE_FAST_PASS(~0u)}, + /* 1210 */ + {18990, S_028028_CLEAR(~0u)}, + /* 1211 */ + {18996, S_028030_TL_X(~0u)}, + {19001, S_028030_TL_Y(~0u)}, + /* 1213 */ + {19006, S_028034_BR_X(~0u)}, + {19011, S_028034_BR_Y(~0u)}, + /* 1215 */ + {19016, S_02803C_ADDR5_SWIZZLE_MASK(~0u)}, + {14432, S_02803C_ARRAY_MODE(~0u), 7, 682}, + {14794, S_02803C_PIPE_CONFIG(~0u), 18, 689}, + {15087, S_02803C_BANK_WIDTH(~0u), 4, 406}, + {15194, S_02803C_BANK_HEIGHT(~0u), 4, 410}, + {15306, S_02803C_MACRO_TILE_ASPECT(~0u), 4, 414}, + {15393, S_02803C_NUM_BANKS(~0u), 4, 418}, + /* 1222 */ + {8814, S_028040_FORMAT(~0u), 4, 707}, + {19168, S_028040_NUM_SAMPLES(~0u)}, + {14984, S_028040_TILE_SPLIT(~0u), 7, 399}, + {19180, S_028040_TILE_MODE_INDEX(~0u)}, + {19196, S_028040_DECOMPRESS_ON_N_ZPLANES(~0u)}, + {19220, S_028040_ALLOW_EXPCLEAR(~0u)}, + {19235, S_028040_READ_SIZE(~0u)}, + {19245, S_028040_TILE_SURFACE_ENABLE(~0u)}, + {19265, S_028040_CLEAR_DISALLOWED(~0u)}, + {19282, S_028040_ZRANGE_PRECISION(~0u)}, + /* 1232 */ + {8814, S_028044_FORMAT(~0u), 2, 711}, + {14984, S_028044_TILE_SPLIT(~0u), 7, 399}, + {19180, S_028044_TILE_MODE_INDEX(~0u)}, + {19220, S_028044_ALLOW_EXPCLEAR(~0u)}, + {19325, S_028044_TILE_STENCIL_DISABLE(~0u)}, + {19265, S_028044_CLEAR_DISALLOWED(~0u)}, + /* 1238 */ + {19346, S_028058_PITCH_TILE_MAX(~0u)}, + {19361, S_028058_HEIGHT_TILE_MAX(~0u)}, + /* 1240 */ + {19377, S_02805C_SLICE_TILE_MAX(~0u)}, + /* 1241 */ + {8437, S_028084_ADDRESS(~0u)}, + /* 1242 */ + {19392, S_028200_WINDOW_X_OFFSET(~0u)}, + {19408, S_028200_WINDOW_Y_OFFSET(~0u)}, + /* 1244 */ + {18996, S_028204_TL_X(~0u)}, + {19001, S_028204_TL_Y(~0u)}, + {19424, S_028204_WINDOW_OFFSET_DISABLE(~0u)}, + /* 1247 */ + {19006, S_028208_BR_X(~0u)}, + {19011, S_028208_BR_Y(~0u)}, + /* 1249 */ + {19446, S_02820C_CLIP_RULE(~0u)}, + /* 1250 */ + {18996, S_028210_TL_X(~0u)}, + {19001, S_028210_TL_Y(~0u)}, + /* 1252 */ + {19006, S_028214_BR_X(~0u)}, + {19011, S_028214_BR_Y(~0u)}, + /* 1254 */ + {19456, S_028230_ER_TRI(~0u)}, + {12539, S_028230_ER_POINT(~0u)}, + {19463, S_028230_ER_RECT(~0u)}, + {19471, S_028230_ER_LINE_LR(~0u)}, + {19482, S_028230_ER_LINE_RL(~0u)}, + {19493, S_028230_ER_LINE_TB(~0u)}, + {19504, S_028230_ER_LINE_BT(~0u)}, + /* 1261 */ + {19515, S_028234_HW_SCREEN_OFFSET_X(~0u)}, + {19534, S_028234_HW_SCREEN_OFFSET_Y(~0u)}, + /* 1263 */ + {19553, S_028238_TARGET0_ENABLE(~0u)}, + {19568, S_028238_TARGET1_ENABLE(~0u)}, + {19583, S_028238_TARGET2_ENABLE(~0u)}, + {19598, S_028238_TARGET3_ENABLE(~0u)}, + {19613, S_028238_TARGET4_ENABLE(~0u)}, + {19628, S_028238_TARGET5_ENABLE(~0u)}, + {19643, S_028238_TARGET6_ENABLE(~0u)}, + {19658, S_028238_TARGET7_ENABLE(~0u)}, + /* 1271 */ + {19673, S_02823C_OUTPUT0_ENABLE(~0u)}, + {19688, S_02823C_OUTPUT1_ENABLE(~0u)}, + {19703, S_02823C_OUTPUT2_ENABLE(~0u)}, + {19718, S_02823C_OUTPUT3_ENABLE(~0u)}, + {19733, S_02823C_OUTPUT4_ENABLE(~0u)}, + {19748, S_02823C_OUTPUT5_ENABLE(~0u)}, + {19763, S_02823C_OUTPUT6_ENABLE(~0u)}, + {19778, S_02823C_OUTPUT7_ENABLE(~0u)}, + /* 1279 */ + {18996, S_028240_TL_X(~0u)}, + {19001, S_028240_TL_Y(~0u)}, + {19424, S_028240_WINDOW_OFFSET_DISABLE(~0u)}, + /* 1282 */ + {19006, S_028244_BR_X(~0u)}, + {19011, S_028244_BR_Y(~0u)}, + /* 1284 */ + {18996, S_028250_TL_X(~0u)}, + {19001, S_028250_TL_Y(~0u)}, + {19424, S_028250_WINDOW_OFFSET_DISABLE(~0u)}, + /* 1287 */ + {19006, S_028254_BR_X(~0u)}, + {19011, S_028254_BR_Y(~0u)}, + /* 1289 */ + {19885, S_028350_RB_MAP_PKR0(~0u), 4, 713}, + {19897, S_028350_RB_MAP_PKR1(~0u), 4, 713}, + {20009, S_028350_RB_XSEL2(~0u), 4, 717}, + {20018, S_028350_RB_XSEL(~0u)}, + {20026, S_028350_RB_YSEL(~0u)}, + {20130, S_028350_PKR_MAP(~0u), 4, 721}, + {20238, S_028350_PKR_XSEL(~0u), 4, 725}, + {20347, S_028350_PKR_YSEL(~0u), 4, 729}, + {20460, S_028350_PKR_XSEL2(~0u), 4, 733}, + {20562, S_028350_SC_MAP(~0u), 4, 737}, + {20708, S_028350_SC_XSEL(~0u), 4, 741}, + {20855, S_028350_SC_YSEL(~0u), 4, 745}, + {20955, S_028350_SE_MAP(~0u), 4, 749}, + {21101, S_028350_SE_XSEL(~0u), 4, 753}, + {21248, S_028350_SE_YSEL(~0u), 4, 757}, + /* 1304 */ + {21368, S_028354_SE_PAIR_MAP(~0u), 4, 761}, + {21539, S_028354_SE_PAIR_XSEL(~0u), 4, 765}, + {21711, S_028354_SE_PAIR_YSEL(~0u), 4, 769}, + /* 1307 */ + {17959, S_028358_SLICE_EVEN_ENABLE(~0u)}, + {17977, S_028358_SLICE_ODD_ENABLE(~0u)}, + /* 1309 */ + {21724, S_028424_OVERWRITE_COMBINER_DISABLE(~0u)}, + {21751, S_028424_OVERWRITE_COMBINER_MRT_SHARING_DISABLE(~0u)}, + {21790, S_028424_OVERWRITE_COMBINER_WATERMARK(~0u)}, + /* 1312 */ + {22056, S_02842C_STENCILFAIL(~0u), 16, 773}, + {22068, S_02842C_STENCILZPASS(~0u), 16, 773}, + {22081, S_02842C_STENCILZFAIL(~0u), 16, 773}, + {22094, S_02842C_STENCILFAIL_BF(~0u), 16, 773}, + {22109, S_02842C_STENCILZPASS_BF(~0u), 16, 773}, + {22125, S_02842C_STENCILZFAIL_BF(~0u), 16, 773}, + /* 1318 */ + {22141, S_028430_STENCILTESTVAL(~0u)}, + {22156, S_028430_STENCILMASK(~0u)}, + {22168, S_028430_STENCILWRITEMASK(~0u)}, + {22185, S_028430_STENCILOPVAL(~0u)}, + /* 1322 */ + {22198, S_028434_STENCILTESTVAL_BF(~0u)}, + {22216, S_028434_STENCILMASK_BF(~0u)}, + {22231, S_028434_STENCILWRITEMASK_BF(~0u)}, + {22251, S_028434_STENCILOPVAL_BF(~0u)}, + /* 1326 */ + {669, S_028644_OFFSET(~0u)}, + {22274, S_028644_DEFAULT_VAL(~0u), 1, 789}, + {22286, S_028644_FLAT_SHADE(~0u)}, + {22297, S_028644_CYL_WRAP(~0u)}, + {22306, S_028644_PT_SPRITE_TEX(~0u)}, + {22320, S_028644_DUP(~0u)}, + {22324, S_028644_FP16_INTERP_MODE(~0u)}, + {22341, S_028644_USE_DEFAULT_ATTR1(~0u)}, + {22359, S_028644_DEFAULT_VAL_ATTR1(~0u)}, + {22377, S_028644_PT_SPRITE_TEX_ATTR1(~0u)}, + {22397, S_028644_ATTR0_VALID(~0u)}, + {22409, S_028644_ATTR1_VALID(~0u)}, + /* 1338 */ + {22421, S_0286C4_VS_EXPORT_COUNT(~0u)}, + {22437, S_0286C4_VS_HALF_PACK(~0u)}, + {22450, S_0286C4_VS_EXPORTS_FOG(~0u)}, + {22465, S_0286C4_VS_OUT_FOG_VEC_ADDR(~0u)}, + /* 1342 */ + {22485, S_0286CC_PERSP_SAMPLE_ENA(~0u)}, + {22502, S_0286CC_PERSP_CENTER_ENA(~0u)}, + {22519, S_0286CC_PERSP_CENTROID_ENA(~0u)}, + {22538, S_0286CC_PERSP_PULL_MODEL_ENA(~0u)}, + {22559, S_0286CC_LINEAR_SAMPLE_ENA(~0u)}, + {22577, S_0286CC_LINEAR_CENTER_ENA(~0u)}, + {22595, S_0286CC_LINEAR_CENTROID_ENA(~0u)}, + {22615, S_0286CC_LINE_STIPPLE_TEX_ENA(~0u)}, + {22636, S_0286CC_POS_X_FLOAT_ENA(~0u)}, + {22652, S_0286CC_POS_Y_FLOAT_ENA(~0u)}, + {22668, S_0286CC_POS_Z_FLOAT_ENA(~0u)}, + {22684, S_0286CC_POS_W_FLOAT_ENA(~0u)}, + {22700, S_0286CC_FRONT_FACE_ENA(~0u)}, + {22715, S_0286CC_ANCILLARY_ENA(~0u)}, + {22729, S_0286CC_SAMPLE_COVERAGE_ENA(~0u)}, + {22749, S_0286CC_POS_FIXED_PT_ENA(~0u)}, + /* 1358 */ + {22485, S_0286D0_PERSP_SAMPLE_ENA(~0u)}, + {22502, S_0286D0_PERSP_CENTER_ENA(~0u)}, + {22519, S_0286D0_PERSP_CENTROID_ENA(~0u)}, + {22538, S_0286D0_PERSP_PULL_MODEL_ENA(~0u)}, + {22559, S_0286D0_LINEAR_SAMPLE_ENA(~0u)}, + {22577, S_0286D0_LINEAR_CENTER_ENA(~0u)}, + {22595, S_0286D0_LINEAR_CENTROID_ENA(~0u)}, + {22615, S_0286D0_LINE_STIPPLE_TEX_ENA(~0u)}, + {22636, S_0286D0_POS_X_FLOAT_ENA(~0u)}, + {22652, S_0286D0_POS_Y_FLOAT_ENA(~0u)}, + {22668, S_0286D0_POS_Z_FLOAT_ENA(~0u)}, + {22684, S_0286D0_POS_W_FLOAT_ENA(~0u)}, + {22700, S_0286D0_FRONT_FACE_ENA(~0u)}, + {22715, S_0286D0_ANCILLARY_ENA(~0u)}, + {22729, S_0286D0_SAMPLE_COVERAGE_ENA(~0u)}, + {22749, S_0286D0_POS_FIXED_PT_ENA(~0u)}, + /* 1374 */ + {22766, S_0286D4_FLAT_SHADE_ENA(~0u)}, + {22781, S_0286D4_PNT_SPRITE_ENA(~0u)}, + {22904, S_0286D4_PNT_SPRITE_OVRD_X(~0u), 5, 790}, + {22922, S_0286D4_PNT_SPRITE_OVRD_Y(~0u), 5, 790}, + {22940, S_0286D4_PNT_SPRITE_OVRD_Z(~0u), 5, 790}, + {22958, S_0286D4_PNT_SPRITE_OVRD_W(~0u), 5, 790}, + {22976, S_0286D4_PNT_SPRITE_TOP_1(~0u)}, + /* 1381 */ + {22993, S_0286D8_NUM_INTERP(~0u)}, + {23004, S_0286D8_PARAM_GEN(~0u)}, + {23014, S_0286D8_FOG_ADDR(~0u)}, + {23023, S_0286D8_BC_OPTIMIZE_DISABLE(~0u)}, + {23043, S_0286D8_PASS_FOG_THROUGH_PS(~0u)}, + /* 1386 */ + {23063, S_0286E0_PERSP_CENTER_CNTL(~0u)}, + {23081, S_0286E0_PERSP_CENTROID_CNTL(~0u)}, + {23101, S_0286E0_LINEAR_CENTER_CNTL(~0u)}, + {23120, S_0286E0_LINEAR_CENTROID_CNTL(~0u)}, + {23190, S_0286E0_POS_FLOAT_LOCATION(~0u), 1, 795}, + {23209, S_0286E0_POS_FLOAT_ULC(~0u)}, + {23223, S_0286E0_FRONT_FACE_ALL_BITS(~0u)}, + /* 1393 */ + {16328, S_0286E8_WAVES(~0u)}, + {16334, S_0286E8_WAVESIZE(~0u)}, + /* 1395 */ + {23243, S_028704_NUM_PS_WAVES(~0u)}, + {23256, S_028704_NUM_VS_WAVES(~0u)}, + {23269, S_028704_NUM_GS_WAVES(~0u)}, + {23282, S_028704_NUM_ES_WAVES(~0u)}, + {23295, S_028704_NUM_HS_WAVES(~0u)}, + /* 1400 */ + {23308, S_028708_NUM_LS_WAVES(~0u)}, + /* 1401 */ + {23409, S_02870C_POS0_EXPORT_FORMAT(~0u), 5, 796}, + {23428, S_02870C_POS1_EXPORT_FORMAT(~0u), 5, 796}, + {23447, S_02870C_POS2_EXPORT_FORMAT(~0u), 5, 796}, + {23466, S_02870C_POS3_EXPORT_FORMAT(~0u), 5, 796}, + /* 1405 */ + {23685, S_028710_Z_EXPORT_FORMAT(~0u), 10, 801}, + /* 1406 */ + {23701, S_028714_COL0_EXPORT_FORMAT(~0u), 10, 801}, + {23720, S_028714_COL1_EXPORT_FORMAT(~0u), 10, 801}, + {23739, S_028714_COL2_EXPORT_FORMAT(~0u), 10, 801}, + {23758, S_028714_COL3_EXPORT_FORMAT(~0u), 10, 801}, + {23777, S_028714_COL4_EXPORT_FORMAT(~0u), 10, 801}, + {23796, S_028714_COL5_EXPORT_FORMAT(~0u), 10, 801}, + {23815, S_028714_COL6_EXPORT_FORMAT(~0u), 10, 801}, + {23834, S_028714_COL7_EXPORT_FORMAT(~0u), 10, 801}, + /* 1414 */ + {24088, S_028754_MRT0(~0u), 11, 811}, + {24093, S_028754_MRT1(~0u)}, + {24098, S_028754_MRT2(~0u)}, + {24103, S_028754_MRT3(~0u)}, + {24108, S_028754_MRT4(~0u)}, + {24113, S_028754_MRT5(~0u)}, + {24118, S_028754_MRT6(~0u)}, + {24123, S_028754_MRT7(~0u)}, + /* 1422 */ + {24208, S_028758_MRT0_EPSILON(~0u), 16, 822}, + {24221, S_028758_MRT1_EPSILON(~0u)}, + {24234, S_028758_MRT2_EPSILON(~0u)}, + {24247, S_028758_MRT3_EPSILON(~0u)}, + {24260, S_028758_MRT4_EPSILON(~0u)}, + {24273, S_028758_MRT5_EPSILON(~0u)}, + {24286, S_028758_MRT6_EPSILON(~0u)}, + {24299, S_028758_MRT7_EPSILON(~0u)}, + /* 1430 */ + {24312, S_02875C_MRT0_COLOR_OPT_DISABLE(~0u)}, + {24335, S_02875C_MRT0_ALPHA_OPT_DISABLE(~0u)}, + {24358, S_02875C_MRT1_COLOR_OPT_DISABLE(~0u)}, + {24381, S_02875C_MRT1_ALPHA_OPT_DISABLE(~0u)}, + {24404, S_02875C_MRT2_COLOR_OPT_DISABLE(~0u)}, + {24427, S_02875C_MRT2_ALPHA_OPT_DISABLE(~0u)}, + {24450, S_02875C_MRT3_COLOR_OPT_DISABLE(~0u)}, + {24473, S_02875C_MRT3_ALPHA_OPT_DISABLE(~0u)}, + {24496, S_02875C_MRT4_COLOR_OPT_DISABLE(~0u)}, + {24519, S_02875C_MRT4_ALPHA_OPT_DISABLE(~0u)}, + {24542, S_02875C_MRT5_COLOR_OPT_DISABLE(~0u)}, + {24565, S_02875C_MRT5_ALPHA_OPT_DISABLE(~0u)}, + {24588, S_02875C_MRT6_COLOR_OPT_DISABLE(~0u)}, + {24611, S_02875C_MRT6_ALPHA_OPT_DISABLE(~0u)}, + {24634, S_02875C_MRT7_COLOR_OPT_DISABLE(~0u)}, + {24657, S_02875C_MRT7_ALPHA_OPT_DISABLE(~0u)}, + {24680, S_02875C_PIXEN_ZERO_OPT_DISABLE(~0u)}, + /* 1447 */ + {24971, S_028760_COLOR_SRC_OPT(~0u), 8, 838}, + {24985, S_028760_COLOR_DST_OPT(~0u)}, + {25133, S_028760_COLOR_COMB_FCN(~0u), 8, 846}, + {25148, S_028760_ALPHA_SRC_OPT(~0u)}, + {25162, S_028760_ALPHA_DST_OPT(~0u)}, + {25176, S_028760_ALPHA_COMB_FCN(~0u)}, + /* 1453 */ + {24971, S_028764_COLOR_SRC_OPT(~0u)}, + {24985, S_028764_COLOR_DST_OPT(~0u)}, + {25133, S_028764_COLOR_COMB_FCN(~0u)}, + {25148, S_028764_ALPHA_SRC_OPT(~0u)}, + {25162, S_028764_ALPHA_DST_OPT(~0u)}, + {25176, S_028764_ALPHA_COMB_FCN(~0u)}, + /* 1459 */ + {24971, S_028768_COLOR_SRC_OPT(~0u)}, + {24985, S_028768_COLOR_DST_OPT(~0u)}, + {25133, S_028768_COLOR_COMB_FCN(~0u)}, + {25148, S_028768_ALPHA_SRC_OPT(~0u)}, + {25162, S_028768_ALPHA_DST_OPT(~0u)}, + {25176, S_028768_ALPHA_COMB_FCN(~0u)}, + /* 1465 */ + {24971, S_02876C_COLOR_SRC_OPT(~0u)}, + {24985, S_02876C_COLOR_DST_OPT(~0u)}, + {25133, S_02876C_COLOR_COMB_FCN(~0u)}, + {25148, S_02876C_ALPHA_SRC_OPT(~0u)}, + {25162, S_02876C_ALPHA_DST_OPT(~0u)}, + {25176, S_02876C_ALPHA_COMB_FCN(~0u)}, + /* 1471 */ + {24971, S_028770_COLOR_SRC_OPT(~0u)}, + {24985, S_028770_COLOR_DST_OPT(~0u)}, + {25133, S_028770_COLOR_COMB_FCN(~0u)}, + {25148, S_028770_ALPHA_SRC_OPT(~0u)}, + {25162, S_028770_ALPHA_DST_OPT(~0u)}, + {25176, S_028770_ALPHA_COMB_FCN(~0u)}, + /* 1477 */ + {24971, S_028774_COLOR_SRC_OPT(~0u)}, + {24985, S_028774_COLOR_DST_OPT(~0u)}, + {25133, S_028774_COLOR_COMB_FCN(~0u)}, + {25148, S_028774_ALPHA_SRC_OPT(~0u)}, + {25162, S_028774_ALPHA_DST_OPT(~0u)}, + {25176, S_028774_ALPHA_COMB_FCN(~0u)}, + /* 1483 */ + {24971, S_028778_COLOR_SRC_OPT(~0u)}, + {24985, S_028778_COLOR_DST_OPT(~0u)}, + {25133, S_028778_COLOR_COMB_FCN(~0u)}, + {25148, S_028778_ALPHA_SRC_OPT(~0u)}, + {25162, S_028778_ALPHA_DST_OPT(~0u)}, + {25176, S_028778_ALPHA_COMB_FCN(~0u)}, + /* 1489 */ + {24971, S_02877C_COLOR_SRC_OPT(~0u)}, + {24985, S_02877C_COLOR_DST_OPT(~0u)}, + {25133, S_02877C_COLOR_COMB_FCN(~0u)}, + {25148, S_02877C_ALPHA_SRC_OPT(~0u)}, + {25162, S_02877C_ALPHA_DST_OPT(~0u)}, + {25176, S_02877C_ALPHA_COMB_FCN(~0u)}, + /* 1495 */ + {25585, S_028780_COLOR_SRCBLEND(~0u), 21, 854}, + {25133, S_028780_COLOR_COMB_FCN(~0u), 5, 875}, + {25690, S_028780_COLOR_DESTBLEND(~0u), 21, 854}, + {25706, S_028780_ALPHA_SRCBLEND(~0u), 21, 854}, + {25176, S_028780_ALPHA_COMB_FCN(~0u), 5, 875}, + {25721, S_028780_ALPHA_DESTBLEND(~0u), 21, 854}, + {25737, S_028780_SEPARATE_ALPHA_BLEND(~0u)}, + {842, S_028780_ENABLE(~0u)}, + {25758, S_028780_DISABLE_ROP3(~0u)}, + /* 1504 */ + {25771, S_0287CC_SRC_STATE_ID(~0u)}, + /* 1505 */ + {25784, S_0287E4_BASE_ADDR(~0u)}, + /* 1506 */ + {25872, S_0287F0_SOURCE_SELECT(~0u), 4, 880}, + {25918, S_0287F0_MAJOR_MODE(~0u), 2, 884}, + {25929, S_0287F0_NOT_EOP(~0u)}, + {25937, S_0287F0_USE_OPAQUE(~0u)}, + /* 1510 */ + {25948, S_0287F8_ADDRESS_LOW(~0u)}, + /* 1511 */ + {25960, S_028800_STENCIL_ENABLE(~0u)}, + {18106, S_028800_Z_ENABLE(~0u)}, + {25975, S_028800_Z_WRITE_ENABLE(~0u)}, + {25990, S_028800_DEPTH_BOUNDS_ENABLE(~0u)}, + {18906, S_028800_ZFUNC(~0u), 8, 886}, + {26105, S_028800_BACKFACE_ENABLE(~0u)}, + {26208, S_028800_STENCILFUNC(~0u), 8, 894}, + {26220, S_028800_STENCILFUNC_BF(~0u), 8, 894}, + {26235, S_028800_ENABLE_COLOR_WRITES_ON_DEPTH_FAIL(~0u)}, + {26269, S_028800_DISABLE_COLOR_WRITES_ON_DEPTH_PASS(~0u)}, + /* 1521 */ + {26304, S_028804_MAX_ANCHOR_SAMPLES(~0u)}, + {26323, S_028804_PS_ITER_SAMPLES(~0u)}, + {26339, S_028804_MASK_EXPORT_NUM_SAMPLES(~0u)}, + {26363, S_028804_ALPHA_TO_MASK_NUM_SAMPLES(~0u)}, + {26389, S_028804_HIGH_QUALITY_INTERSECTIONS(~0u)}, + {26416, S_028804_INCOHERENT_EQAA_READS(~0u)}, + {26438, S_028804_INTERPOLATE_COMP_Z(~0u)}, + {26457, S_028804_INTERPOLATE_SRC_Z(~0u)}, + {26475, S_028804_STATIC_ANCHOR_ASSOCIATIONS(~0u)}, + {26502, S_028804_ALPHA_TO_MASK_EQAA_DISABLE(~0u)}, + {26529, S_028804_OVERRASTERIZATION_AMOUNT(~0u)}, + {26554, S_028804_ENABLE_POSTZ_OVERRASTERIZATION(~0u)}, + /* 1533 */ + {26585, S_028808_DISABLE_DUAL_QUAD(~0u)}, + {26603, S_028808_DEGAMMA_ENABLE(~0u)}, + {12462, S_028808_MODE(~0u), 7, 902}, + {25766, S_028808_ROP3(~0u), 256, 909}, + /* 1537 */ + {26908, S_02880C_Z_EXPORT_ENABLE(~0u)}, + {26924, S_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE(~0u)}, + {26955, S_02880C_STENCIL_OP_VAL_EXPORT_ENABLE(~0u)}, + {18164, S_02880C_Z_ORDER(~0u), 4, 1165}, + {27034, S_02880C_KILL_ENABLE(~0u)}, + {27046, S_02880C_COVERAGE_TO_MASK_ENABLE(~0u)}, + {27070, S_02880C_MASK_EXPORT_ENABLE(~0u)}, + {27089, S_02880C_EXEC_ON_HIER_FAIL(~0u)}, + {27107, S_02880C_EXEC_ON_NOOP(~0u)}, + {27120, S_02880C_ALPHA_TO_MASK_DISABLE(~0u)}, + {27142, S_02880C_DEPTH_BEFORE_SHADER(~0u)}, + {27232, S_02880C_CONSERVATIVE_Z_EXPORT(~0u), 4, 1169}, + {27254, S_02880C_DUAL_QUAD_DISABLE(~0u)}, + /* 1550 */ + {27272, S_028810_UCP_ENA_0(~0u)}, + {27282, S_028810_UCP_ENA_1(~0u)}, + {27292, S_028810_UCP_ENA_2(~0u)}, + {27302, S_028810_UCP_ENA_3(~0u)}, + {27312, S_028810_UCP_ENA_4(~0u)}, + {27322, S_028810_UCP_ENA_5(~0u)}, + {27332, S_028810_PS_UCP_Y_SCALE_NEG(~0u)}, + {27351, S_028810_PS_UCP_MODE(~0u)}, + {27363, S_028810_CLIP_DISABLE(~0u)}, + {27376, S_028810_UCP_CULL_ONLY_ENA(~0u)}, + {27394, S_028810_BOUNDARY_EDGE_FLAG_ENA(~0u)}, + {27417, S_028810_DX_CLIP_SPACE_DEF(~0u)}, + {27435, S_028810_DIS_CLIP_ERR_DETECT(~0u)}, + {27455, S_028810_VTX_KILL_OR(~0u)}, + {27467, S_028810_DX_RASTERIZATION_KILL(~0u)}, + {27489, S_028810_DX_LINEAR_ATTR_CLIP_ENA(~0u)}, + {27513, S_028810_VTE_VPORT_PROVOKE_DISABLE(~0u)}, + {27539, S_028810_ZCLIP_NEAR_DISABLE(~0u)}, + {27558, S_028810_ZCLIP_FAR_DISABLE(~0u)}, + /* 1569 */ + {27576, S_028814_CULL_FRONT(~0u)}, + {27587, S_028814_CULL_BACK(~0u)}, + {27597, S_028814_FACE(~0u)}, + {27612, S_028814_POLY_MODE(~0u), 2, 1173}, + {27678, S_028814_POLYMODE_FRONT_PTYPE(~0u), 3, 1175}, + {27699, S_028814_POLYMODE_BACK_PTYPE(~0u), 3, 1175}, + {27719, S_028814_POLY_OFFSET_FRONT_ENABLE(~0u)}, + {27744, S_028814_POLY_OFFSET_BACK_ENABLE(~0u)}, + {27768, S_028814_POLY_OFFSET_PARA_ENABLE(~0u)}, + {27792, S_028814_VTX_WINDOW_OFFSET_ENABLE(~0u)}, + {27817, S_028814_PROVOKING_VTX_LAST(~0u)}, + {27836, S_028814_PERSP_CORR_DIS(~0u)}, + {27851, S_028814_MULTI_PRIM_IB_ENA(~0u)}, + /* 1582 */ + {27869, S_028818_VPORT_X_SCALE_ENA(~0u)}, + {27887, S_028818_VPORT_X_OFFSET_ENA(~0u)}, + {27906, S_028818_VPORT_Y_SCALE_ENA(~0u)}, + {27924, S_028818_VPORT_Y_OFFSET_ENA(~0u)}, + {27943, S_028818_VPORT_Z_SCALE_ENA(~0u)}, + {27961, S_028818_VPORT_Z_OFFSET_ENA(~0u)}, + {27980, S_028818_VTX_XY_FMT(~0u)}, + {27991, S_028818_VTX_Z_FMT(~0u)}, + {28001, S_028818_VTX_W0_FMT(~0u)}, + /* 1591 */ + {28012, S_02881C_CLIP_DIST_ENA_0(~0u)}, + {28028, S_02881C_CLIP_DIST_ENA_1(~0u)}, + {28044, S_02881C_CLIP_DIST_ENA_2(~0u)}, + {28060, S_02881C_CLIP_DIST_ENA_3(~0u)}, + {28076, S_02881C_CLIP_DIST_ENA_4(~0u)}, + {28092, S_02881C_CLIP_DIST_ENA_5(~0u)}, + {28108, S_02881C_CLIP_DIST_ENA_6(~0u)}, + {28124, S_02881C_CLIP_DIST_ENA_7(~0u)}, + {28140, S_02881C_CULL_DIST_ENA_0(~0u)}, + {28156, S_02881C_CULL_DIST_ENA_1(~0u)}, + {28172, S_02881C_CULL_DIST_ENA_2(~0u)}, + {28188, S_02881C_CULL_DIST_ENA_3(~0u)}, + {28204, S_02881C_CULL_DIST_ENA_4(~0u)}, + {28220, S_02881C_CULL_DIST_ENA_5(~0u)}, + {28236, S_02881C_CULL_DIST_ENA_6(~0u)}, + {28252, S_02881C_CULL_DIST_ENA_7(~0u)}, + {28268, S_02881C_USE_VTX_POINT_SIZE(~0u)}, + {28287, S_02881C_USE_VTX_EDGE_FLAG(~0u)}, + {28305, S_02881C_USE_VTX_RENDER_TARGET_INDX(~0u)}, + {28332, S_02881C_USE_VTX_VIEWPORT_INDX(~0u)}, + {28354, S_02881C_USE_VTX_KILL_FLAG(~0u)}, + {28372, S_02881C_VS_OUT_MISC_VEC_ENA(~0u)}, + {28392, S_02881C_VS_OUT_CCDIST0_VEC_ENA(~0u)}, + {28415, S_02881C_VS_OUT_CCDIST1_VEC_ENA(~0u)}, + {28438, S_02881C_VS_OUT_MISC_SIDE_BUS_ENA(~0u)}, + {28463, S_02881C_USE_VTX_GS_CUT_FLAG(~0u)}, + {28483, S_02881C_USE_VTX_LINE_WIDTH(~0u)}, + /* 1618 */ + {28502, S_028820_VTE_XY_INF_DISCARD(~0u)}, + {28521, S_028820_VTE_Z_INF_DISCARD(~0u)}, + {28539, S_028820_VTE_W_INF_DISCARD(~0u)}, + {28557, S_028820_VTE_0XNANINF_IS_0(~0u)}, + {28575, S_028820_VTE_XY_NAN_RETAIN(~0u)}, + {28593, S_028820_VTE_Z_NAN_RETAIN(~0u)}, + {28610, S_028820_VTE_W_NAN_RETAIN(~0u)}, + {28627, S_028820_VTE_W_RECIP_NAN_IS_0(~0u)}, + {28648, S_028820_VS_XY_NAN_TO_INF(~0u)}, + {28665, S_028820_VS_XY_INF_RETAIN(~0u)}, + {28682, S_028820_VS_Z_NAN_TO_INF(~0u)}, + {28698, S_028820_VS_Z_INF_RETAIN(~0u)}, + {28714, S_028820_VS_W_NAN_TO_INF(~0u)}, + {28730, S_028820_VS_W_INF_RETAIN(~0u)}, + {28746, S_028820_VS_CLIP_DIST_INF_DISCARD(~0u)}, + {28771, S_028820_VTE_NO_OUTPUT_NEG_0(~0u)}, + /* 1634 */ + {28791, S_028824_LINE_STIPPLE_RESET(~0u)}, + {28810, S_028824_EXPAND_FULL_LENGTH(~0u)}, + {28829, S_028824_FRACTIONAL_ACCUM(~0u)}, + {28846, S_028824_DIAMOND_ADJUST(~0u)}, + /* 1638 */ + {28861, S_02882C_TRIANGLE_FILTER_DISABLE(~0u)}, + {28885, S_02882C_LINE_FILTER_DISABLE(~0u)}, + {28905, S_02882C_POINT_FILTER_DISABLE(~0u)}, + {28926, S_02882C_RECTANGLE_FILTER_DISABLE(~0u)}, + {28951, S_02882C_TRIANGLE_EXPAND_ENA(~0u)}, + {28971, S_02882C_LINE_EXPAND_ENA(~0u)}, + {28987, S_02882C_POINT_EXPAND_ENA(~0u)}, + {29004, S_02882C_RECTANGLE_EXPAND_ENA(~0u)}, + {29025, S_02882C_PRIM_EXPAND_CONSTANT(~0u)}, + {29046, S_02882C_XMAX_RIGHT_EXCLUSION(~0u)}, + {29067, S_02882C_YMAX_BOTTOM_EXCLUSION(~0u)}, + /* 1649 */ + {29089, S_028830_SMALL_PRIM_FILTER_ENABLE(~0u)}, + {28861, S_028830_TRIANGLE_FILTER_DISABLE(~0u)}, + {28885, S_028830_LINE_FILTER_DISABLE(~0u)}, + {28905, S_028830_POINT_FILTER_DISABLE(~0u)}, + {28926, S_028830_RECTANGLE_FILTER_DISABLE(~0u)}, + /* 1654 */ + {11347, S_028A00_HEIGHT(~0u)}, + {11341, S_028A00_WIDTH(~0u)}, + /* 1656 */ + {29114, S_028A04_MIN_SIZE(~0u)}, + {29123, S_028A04_MAX_SIZE(~0u)}, + /* 1658 */ + {11341, S_028A08_WIDTH(~0u)}, + /* 1659 */ + {29132, S_028A0C_LINE_PATTERN(~0u)}, + {29145, S_028A0C_REPEAT_COUNT(~0u)}, + {29158, S_028A0C_PATTERN_BIT_ORDER(~0u)}, + {29176, S_028A0C_AUTO_RESET_CNTL(~0u)}, + /* 1663 */ + {29297, S_028A10_PATH_SELECT(~0u), 5, 1178}, + /* 1664 */ + {29309, S_028A14_TESS_MODE(~0u)}, + /* 1665 */ + {29319, S_028A20_REUSE_DEPTH(~0u)}, + /* 1666 */ + {5964, S_028A24_PRIM_TYPE(~0u), 18, 1183}, + {29686, S_028A24_RETAIN_ORDER(~0u)}, + {29699, S_028A24_RETAIN_QUADS(~0u)}, + {29780, S_028A24_PRIM_ORDER(~0u), 5, 1201}, + /* 1670 */ + {29791, S_028A28_FIRST_DECR(~0u)}, + /* 1671 */ + {29797, S_028A2C_DECR(~0u)}, + /* 1672 */ + {29802, S_028A30_COMP_X_EN(~0u)}, + {29812, S_028A30_COMP_Y_EN(~0u)}, + {29822, S_028A30_COMP_Z_EN(~0u)}, + {29832, S_028A30_COMP_W_EN(~0u)}, + {8470, S_028A30_STRIDE(~0u)}, + {29842, S_028A30_SHIFT(~0u)}, + /* 1678 */ + {29802, S_028A34_COMP_X_EN(~0u)}, + {29812, S_028A34_COMP_Y_EN(~0u)}, + {29822, S_028A34_COMP_Z_EN(~0u)}, + {29832, S_028A34_COMP_W_EN(~0u)}, + {8470, S_028A34_STRIDE(~0u)}, + {29842, S_028A34_SHIFT(~0u)}, + /* 1684 */ + {30007, S_028A38_X_CONV(~0u), 9, 1206}, + {19399, S_028A38_X_OFFSET(~0u)}, + {30014, S_028A38_Y_CONV(~0u), 9, 1206}, + {19415, S_028A38_Y_OFFSET(~0u)}, + {30021, S_028A38_Z_CONV(~0u), 9, 1206}, + {30028, S_028A38_Z_OFFSET(~0u)}, + {30037, S_028A38_W_CONV(~0u), 9, 1206}, + {30044, S_028A38_W_OFFSET(~0u)}, + /* 1692 */ + {30007, S_028A3C_X_CONV(~0u), 9, 1206}, + {19399, S_028A3C_X_OFFSET(~0u)}, + {30014, S_028A3C_Y_CONV(~0u), 9, 1206}, + {19415, S_028A3C_Y_OFFSET(~0u)}, + {30021, S_028A3C_Z_CONV(~0u), 9, 1206}, + {30028, S_028A3C_Z_OFFSET(~0u)}, + {30037, S_028A3C_W_CONV(~0u), 9, 1206}, + {30044, S_028A3C_W_OFFSET(~0u)}, + /* 1700 */ + {12462, S_028A40_MODE(~0u), 6, 1215}, + {8531, S_028A40_RESERVED_0(~0u)}, + {30171, S_028A40_CUT_MODE(~0u), 4, 1221}, + {8549, S_028A40_RESERVED_1(~0u)}, + {30180, S_028A40_GS_C_PACK_EN(~0u)}, + {30193, S_028A40_RESERVED_2(~0u)}, + {30204, S_028A40_ES_PASSTHRU(~0u)}, + {30216, S_028A40_COMPUTE_MODE(~0u)}, + {30229, S_028A40_FAST_COMPUTE_MODE(~0u)}, + {30247, S_028A40_ELEMENT_INFO_EN(~0u)}, + {30263, S_028A40_PARTIAL_THD_AT_EOI(~0u)}, + {30282, S_028A40_SUPPRESS_CUTS(~0u)}, + {30296, S_028A40_ES_WRITE_OPTIMIZE(~0u)}, + {30314, S_028A40_GS_WRITE_OPTIMIZE(~0u)}, + {30365, S_028A40_ONCHIP(~0u), 4, 1225}, + /* 1715 */ + {30372, S_028A44_ES_VERTS_PER_SUBGRP(~0u)}, + {30392, S_028A44_GS_PRIMS_PER_SUBGRP(~0u)}, + /* 1717 */ + {30412, S_028A48_MSAA_ENABLE(~0u)}, + {30424, S_028A48_VPORT_SCISSOR_ENABLE(~0u)}, + {30445, S_028A48_LINE_STIPPLE_ENABLE(~0u)}, + {30465, S_028A48_SEND_UNLIT_STILES_TO_PKR(~0u)}, + /* 1721 */ + {30490, S_028A4C_WALK_SIZE(~0u)}, + {30500, S_028A4C_WALK_ALIGNMENT(~0u)}, + {30515, S_028A4C_WALK_ALIGN8_PRIM_FITS_ST(~0u)}, + {30540, S_028A4C_WALK_FENCE_ENABLE(~0u)}, + {30558, S_028A4C_WALK_FENCE_SIZE(~0u)}, + {30574, S_028A4C_SUPERTILE_WALK_ORDER_ENABLE(~0u)}, + {30579, S_028A4C_TILE_WALK_ORDER_ENABLE(~0u)}, + {30602, S_028A4C_TILE_COVER_DISABLE(~0u)}, + {30621, S_028A4C_TILE_COVER_NO_SCISSOR(~0u)}, + {30643, S_028A4C_ZMM_LINE_EXTENT(~0u)}, + {30659, S_028A4C_ZMM_LINE_OFFSET(~0u)}, + {30675, S_028A4C_ZMM_RECT_EXTENT(~0u)}, + {30691, S_028A4C_KILL_PIX_POST_HI_Z(~0u)}, + {30710, S_028A4C_KILL_PIX_POST_DETAIL_MASK(~0u)}, + {30736, S_028A4C_PS_ITER_SAMPLE(~0u)}, + {30751, S_028A4C_MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE(~0u)}, + {30791, S_028A4C_MULTI_GPU_SUPERTILE_ENABLE(~0u)}, + {30818, S_028A4C_GPU_ID_OVERRIDE_ENABLE(~0u)}, + {30841, S_028A4C_GPU_ID_OVERRIDE(~0u)}, + {30857, S_028A4C_MULTI_GPU_PRIM_DISCARD_ENABLE(~0u)}, + {30887, S_028A4C_FORCE_EOV_CNTDWN_ENABLE(~0u)}, + {30911, S_028A4C_FORCE_EOV_REZ_ENABLE(~0u)}, + {30932, S_028A4C_OUT_OF_ORDER_PRIMITIVE_ENABLE(~0u)}, + {30962, S_028A4C_OUT_OF_ORDER_WATER_MARK(~0u)}, + /* 1745 */ + {30986, S_028A54_GS_PER_ES(~0u)}, + /* 1746 */ + {30996, S_028A58_ES_PER_GS(~0u)}, + /* 1747 */ + {31006, S_028A5C_GS_PER_VS(~0u)}, + /* 1748 */ + {669, S_028A60_OFFSET(~0u)}, + /* 1749 */ + {669, S_028A64_OFFSET(~0u)}, + /* 1750 */ + {669, S_028A68_OFFSET(~0u)}, + /* 1751 */ + {31084, S_028A6C_OUTPRIM_TYPE(~0u), 3, 1229}, + {31097, S_028A6C_OUTPRIM_TYPE_1(~0u)}, + {31112, S_028A6C_OUTPRIM_TYPE_2(~0u)}, + {31127, S_028A6C_OUTPRIM_TYPE_3(~0u)}, + {31142, S_028A6C_UNIQUE_TYPE_PER_STREAM(~0u)}, + /* 1756 */ + {203, S_028A7C_INDEX_TYPE(~0u), 3, 1232}, + {31279, S_028A7C_SWAP_MODE(~0u), 4, 1235}, + {31340, S_028A7C_BUF_TYPE(~0u), 3, 1239}, + {31382, S_028A7C_RDREQ_POLICY(~0u), 2, 1242}, + {31395, S_028A7C_RDREQ_POLICY_VI(~0u)}, + {9255, S_028A7C_ATC(~0u)}, + {25929, S_028A7C_NOT_EOP(~0u)}, + {31411, S_028A7C_REQ_PATH(~0u)}, + {9276, S_028A7C_MTYPE(~0u)}, + /* 1765 */ + {31420, S_028A84_PRIMITIVEID_EN(~0u)}, + {31435, S_028A84_DISABLE_RESET_ON_EOI(~0u)}, + /* 1767 */ + {32391, S_028A90_EVENT_TYPE(~0u), 59, 1244}, + {8459, S_028A90_ADDRESS_HI(~0u)}, + {32402, S_028A90_EXTENDED_EVENT(~0u)}, + /* 1770 */ + {32417, S_028A94_RESET_EN(~0u)}, + /* 1771 */ + {32426, S_028AA8_PRIMGROUP_SIZE(~0u)}, + {32441, S_028AA8_PARTIAL_VS_WAVE_ON(~0u)}, + {32460, S_028AA8_SWITCH_ON_EOP(~0u)}, + {32474, S_028AA8_PARTIAL_ES_WAVE_ON(~0u)}, + {32493, S_028AA8_SWITCH_ON_EOI(~0u)}, + {32507, S_028AA8_WD_SWITCH_ON_EOP(~0u)}, + {32524, S_028AA8_MAX_PRIMGRP_IN_WAVE(~0u)}, + /* 1778 */ + {32544, S_028AAC_ITEMSIZE(~0u)}, + /* 1779 */ + {32544, S_028AB0_ITEMSIZE(~0u)}, + /* 1780 */ + {32553, S_028AB4_REUSE_OFF(~0u)}, + /* 1781 */ + {32563, S_028AB8_VTX_CNT_EN(~0u)}, + /* 1782 */ + {12567, S_028ABC_LINEAR(~0u)}, + {32574, S_028ABC_FULL_CACHE(~0u)}, + {32585, S_028ABC_HTILE_USES_PRELOAD_WIN(~0u)}, + {32608, S_028ABC_PRELOAD(~0u)}, + {32616, S_028ABC_PREFETCH_WIDTH(~0u)}, + {32631, S_028ABC_PREFETCH_HEIGHT(~0u)}, + {32647, S_028ABC_DST_OUTSIDE_ZERO_TO_ONE(~0u)}, + {32671, S_028ABC_TC_COMPATIBLE(~0u)}, + /* 1790 */ + {32685, S_028AC0_COMPAREFUNC0(~0u), 8, 894}, + {32698, S_028AC0_COMPAREVALUE0(~0u)}, + {32712, S_028AC0_COMPAREMASK0(~0u)}, + {18125, S_028AC0_ENABLE0(~0u)}, + /* 1794 */ + {32725, S_028AC4_COMPAREFUNC1(~0u), 8, 894}, + {32738, S_028AC4_COMPAREVALUE1(~0u)}, + {32752, S_028AC4_COMPAREMASK1(~0u)}, + {18143, S_028AC4_ENABLE1(~0u)}, + /* 1798 */ + {32765, S_028AC8_START_X(~0u)}, + {32773, S_028AC8_START_Y(~0u)}, + {32781, S_028AC8_MAX_X(~0u)}, + {32787, S_028AC8_MAX_Y(~0u)}, + /* 1802 */ + {8470, S_028AD4_STRIDE(~0u)}, + /* 1803 */ + {8470, S_028AE4_STRIDE(~0u)}, + /* 1804 */ + {8470, S_028AF4_STRIDE(~0u)}, + /* 1805 */ + {8470, S_028B04_STRIDE(~0u)}, + /* 1806 */ + {32793, S_028B30_VERTEX_STRIDE(~0u)}, + /* 1807 */ + {32807, S_028B38_MAX_VERT_OUT(~0u)}, + /* 1808 */ + {32820, S_028B50_ACCUM_ISOLINE(~0u)}, + {32834, S_028B50_ACCUM_TRI(~0u)}, + {32844, S_028B50_ACCUM_QUAD(~0u)}, + {32855, S_028B50_DONUT_SPLIT(~0u)}, + {32867, S_028B50_TRAP_SPLIT(~0u)}, + /* 1813 */ + {17290, S_028B54_LS_EN(~0u), 3, 1303}, + {17284, S_028B54_HS_EN(~0u)}, + {17278, S_028B54_ES_EN(~0u), 3, 1306}, + {17272, S_028B54_GS_EN(~0u)}, + {17266, S_028B54_VS_EN(~0u), 3, 1309}, + {33001, S_028B54_DYNAMIC_HS(~0u)}, + {15821, S_028B54_DISPATCH_DRAW_EN(~0u)}, + {33012, S_028B54_DIS_DEALLOC_ACCUM_0(~0u)}, + {33032, S_028B54_DIS_DEALLOC_ACCUM_1(~0u)}, + {33052, S_028B54_VS_WAVE_ID_EN(~0u)}, + /* 1823 */ + {33066, S_028B58_NUM_PATCHES(~0u)}, + {33078, S_028B58_HS_NUM_INPUT_CP(~0u)}, + {33094, S_028B58_HS_NUM_OUTPUT_CP(~0u)}, + /* 1826 */ + {32544, S_028B5C_ITEMSIZE(~0u)}, + /* 1827 */ + {32544, S_028B60_ITEMSIZE(~0u)}, + /* 1828 */ + {32544, S_028B64_ITEMSIZE(~0u)}, + /* 1829 */ + {32544, S_028B68_ITEMSIZE(~0u)}, + /* 1830 */ + {209, S_028B6C_TYPE(~0u), 3, 1312}, + {33200, S_028B6C_PARTITIONING(~0u), 4, 1315}, + {33277, S_028B6C_TOPOLOGY(~0u), 4, 1319}, + {33286, S_028B6C_RESERVED_REDUC_AXIS(~0u)}, + {33306, S_028B6C_DEPRECATED(~0u)}, + {33317, S_028B6C_NUM_DS_WAVES_PER_SIMD(~0u)}, + {33339, S_028B6C_DISABLE_DONUTS(~0u)}, + {31382, S_028B6C_RDREQ_POLICY(~0u), 3, 1323}, + {31395, S_028B6C_RDREQ_POLICY_VI(~0u)}, + {33478, S_028B6C_DISTRIBUTION_MODE(~0u), 4, 1326}, + {9276, S_028B6C_MTYPE(~0u)}, + /* 1841 */ + {33496, S_028B70_ALPHA_TO_MASK_ENABLE(~0u)}, + {33517, S_028B70_ALPHA_TO_MASK_OFFSET0(~0u)}, + {33539, S_028B70_ALPHA_TO_MASK_OFFSET1(~0u)}, + {33561, S_028B70_ALPHA_TO_MASK_OFFSET2(~0u)}, + {33583, S_028B70_ALPHA_TO_MASK_OFFSET3(~0u)}, + {33605, S_028B70_OFFSET_ROUND(~0u)}, + /* 1847 */ + {33618, S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(~0u)}, + {33646, S_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(~0u)}, + /* 1849 */ + {842, S_028B90_ENABLE(~0u)}, + {15737, S_028B90_CNT(~0u)}, + /* 1851 */ + {33674, S_028B94_STREAMOUT_0_EN(~0u)}, + {33689, S_028B94_STREAMOUT_1_EN(~0u)}, + {33704, S_028B94_STREAMOUT_2_EN(~0u)}, + {33719, S_028B94_STREAMOUT_3_EN(~0u)}, + {33734, S_028B94_RAST_STREAM(~0u)}, + {33746, S_028B94_RAST_STREAM_MASK(~0u)}, + {33763, S_028B94_USE_RAST_STREAM_MASK(~0u)}, + /* 1858 */ + {33784, S_028B98_STREAM_0_BUFFER_EN(~0u)}, + {33803, S_028B98_STREAM_1_BUFFER_EN(~0u)}, + {33822, S_028B98_STREAM_2_BUFFER_EN(~0u)}, + {33841, S_028B98_STREAM_3_BUFFER_EN(~0u)}, + /* 1862 */ + {33860, S_028BD4_DISTANCE_0(~0u)}, + {33871, S_028BD4_DISTANCE_1(~0u)}, + {33882, S_028BD4_DISTANCE_2(~0u)}, + {33893, S_028BD4_DISTANCE_3(~0u)}, + {33904, S_028BD4_DISTANCE_4(~0u)}, + {33915, S_028BD4_DISTANCE_5(~0u)}, + {33926, S_028BD4_DISTANCE_6(~0u)}, + {33937, S_028BD4_DISTANCE_7(~0u)}, + /* 1870 */ + {33948, S_028BD8_DISTANCE_8(~0u)}, + {33959, S_028BD8_DISTANCE_9(~0u)}, + {33970, S_028BD8_DISTANCE_10(~0u)}, + {33982, S_028BD8_DISTANCE_11(~0u)}, + {33994, S_028BD8_DISTANCE_12(~0u)}, + {34006, S_028BD8_DISTANCE_13(~0u)}, + {34018, S_028BD8_DISTANCE_14(~0u)}, + {34030, S_028BD8_DISTANCE_15(~0u)}, + /* 1878 */ + {34042, S_028BDC_EXPAND_LINE_WIDTH(~0u)}, + {34060, S_028BDC_LAST_PIXEL(~0u)}, + {34071, S_028BDC_PERPENDICULAR_ENDCAP_ENA(~0u)}, + {34096, S_028BDC_DX10_DIAMOND_TEST_ENA(~0u)}, + /* 1882 */ + {34118, S_028BE0_MSAA_NUM_SAMPLES(~0u)}, + {34135, S_028BE0_AA_MASK_CENTROID_DTMN(~0u)}, + {34157, S_028BE0_MAX_SAMPLE_DIST(~0u)}, + {34173, S_028BE0_MSAA_EXPOSED_SAMPLES(~0u)}, + {34194, S_028BE0_DETAIL_TO_EXPOSED_MODE(~0u)}, + /* 1887 */ + {34217, S_028BE4_PIX_CENTER(~0u)}, + {34278, S_028BE4_ROUND_MODE(~0u), 4, 1330}, + {34494, S_028BE4_QUANT_MODE(~0u), 8, 1334}, + /* 1890 */ + {34505, S_028BF8_S0_X(~0u)}, + {34510, S_028BF8_S0_Y(~0u)}, + {34515, S_028BF8_S1_X(~0u)}, + {34520, S_028BF8_S1_Y(~0u)}, + {34525, S_028BF8_S2_X(~0u)}, + {34530, S_028BF8_S2_Y(~0u)}, + {34535, S_028BF8_S3_X(~0u)}, + {34540, S_028BF8_S3_Y(~0u)}, + /* 1898 */ + {34545, S_028BFC_S4_X(~0u)}, + {34550, S_028BFC_S4_Y(~0u)}, + {34555, S_028BFC_S5_X(~0u)}, + {34560, S_028BFC_S5_Y(~0u)}, + {34565, S_028BFC_S6_X(~0u)}, + {34570, S_028BFC_S6_Y(~0u)}, + {34575, S_028BFC_S7_X(~0u)}, + {34580, S_028BFC_S7_Y(~0u)}, + /* 1906 */ + {34585, S_028C00_S8_X(~0u)}, + {34590, S_028C00_S8_Y(~0u)}, + {34595, S_028C00_S9_X(~0u)}, + {34600, S_028C00_S9_Y(~0u)}, + {34605, S_028C00_S10_X(~0u)}, + {34611, S_028C00_S10_Y(~0u)}, + {34617, S_028C00_S11_X(~0u)}, + {34623, S_028C00_S11_Y(~0u)}, + /* 1914 */ + {34629, S_028C04_S12_X(~0u)}, + {34635, S_028C04_S12_Y(~0u)}, + {34641, S_028C04_S13_X(~0u)}, + {34647, S_028C04_S13_Y(~0u)}, + {34653, S_028C04_S14_X(~0u)}, + {34659, S_028C04_S14_Y(~0u)}, + {34665, S_028C04_S15_X(~0u)}, + {34671, S_028C04_S15_Y(~0u)}, + /* 1922 */ + {34505, S_028C08_S0_X(~0u)}, + {34510, S_028C08_S0_Y(~0u)}, + {34515, S_028C08_S1_X(~0u)}, + {34520, S_028C08_S1_Y(~0u)}, + {34525, S_028C08_S2_X(~0u)}, + {34530, S_028C08_S2_Y(~0u)}, + {34535, S_028C08_S3_X(~0u)}, + {34540, S_028C08_S3_Y(~0u)}, + /* 1930 */ + {34545, S_028C0C_S4_X(~0u)}, + {34550, S_028C0C_S4_Y(~0u)}, + {34555, S_028C0C_S5_X(~0u)}, + {34560, S_028C0C_S5_Y(~0u)}, + {34565, S_028C0C_S6_X(~0u)}, + {34570, S_028C0C_S6_Y(~0u)}, + {34575, S_028C0C_S7_X(~0u)}, + {34580, S_028C0C_S7_Y(~0u)}, + /* 1938 */ + {34585, S_028C10_S8_X(~0u)}, + {34590, S_028C10_S8_Y(~0u)}, + {34595, S_028C10_S9_X(~0u)}, + {34600, S_028C10_S9_Y(~0u)}, + {34605, S_028C10_S10_X(~0u)}, + {34611, S_028C10_S10_Y(~0u)}, + {34617, S_028C10_S11_X(~0u)}, + {34623, S_028C10_S11_Y(~0u)}, + /* 1946 */ + {34629, S_028C14_S12_X(~0u)}, + {34635, S_028C14_S12_Y(~0u)}, + {34641, S_028C14_S13_X(~0u)}, + {34647, S_028C14_S13_Y(~0u)}, + {34653, S_028C14_S14_X(~0u)}, + {34659, S_028C14_S14_Y(~0u)}, + {34665, S_028C14_S15_X(~0u)}, + {34671, S_028C14_S15_Y(~0u)}, + /* 1954 */ + {34505, S_028C18_S0_X(~0u)}, + {34510, S_028C18_S0_Y(~0u)}, + {34515, S_028C18_S1_X(~0u)}, + {34520, S_028C18_S1_Y(~0u)}, + {34525, S_028C18_S2_X(~0u)}, + {34530, S_028C18_S2_Y(~0u)}, + {34535, S_028C18_S3_X(~0u)}, + {34540, S_028C18_S3_Y(~0u)}, + /* 1962 */ + {34545, S_028C1C_S4_X(~0u)}, + {34550, S_028C1C_S4_Y(~0u)}, + {34555, S_028C1C_S5_X(~0u)}, + {34560, S_028C1C_S5_Y(~0u)}, + {34565, S_028C1C_S6_X(~0u)}, + {34570, S_028C1C_S6_Y(~0u)}, + {34575, S_028C1C_S7_X(~0u)}, + {34580, S_028C1C_S7_Y(~0u)}, + /* 1970 */ + {34585, S_028C20_S8_X(~0u)}, + {34590, S_028C20_S8_Y(~0u)}, + {34595, S_028C20_S9_X(~0u)}, + {34600, S_028C20_S9_Y(~0u)}, + {34605, S_028C20_S10_X(~0u)}, + {34611, S_028C20_S10_Y(~0u)}, + {34617, S_028C20_S11_X(~0u)}, + {34623, S_028C20_S11_Y(~0u)}, + /* 1978 */ + {34629, S_028C24_S12_X(~0u)}, + {34635, S_028C24_S12_Y(~0u)}, + {34641, S_028C24_S13_X(~0u)}, + {34647, S_028C24_S13_Y(~0u)}, + {34653, S_028C24_S14_X(~0u)}, + {34659, S_028C24_S14_Y(~0u)}, + {34665, S_028C24_S15_X(~0u)}, + {34671, S_028C24_S15_Y(~0u)}, + /* 1986 */ + {34505, S_028C28_S0_X(~0u)}, + {34510, S_028C28_S0_Y(~0u)}, + {34515, S_028C28_S1_X(~0u)}, + {34520, S_028C28_S1_Y(~0u)}, + {34525, S_028C28_S2_X(~0u)}, + {34530, S_028C28_S2_Y(~0u)}, + {34535, S_028C28_S3_X(~0u)}, + {34540, S_028C28_S3_Y(~0u)}, + /* 1994 */ + {34545, S_028C2C_S4_X(~0u)}, + {34550, S_028C2C_S4_Y(~0u)}, + {34555, S_028C2C_S5_X(~0u)}, + {34560, S_028C2C_S5_Y(~0u)}, + {34565, S_028C2C_S6_X(~0u)}, + {34570, S_028C2C_S6_Y(~0u)}, + {34575, S_028C2C_S7_X(~0u)}, + {34580, S_028C2C_S7_Y(~0u)}, + /* 2002 */ + {34585, S_028C30_S8_X(~0u)}, + {34590, S_028C30_S8_Y(~0u)}, + {34595, S_028C30_S9_X(~0u)}, + {34600, S_028C30_S9_Y(~0u)}, + {34605, S_028C30_S10_X(~0u)}, + {34611, S_028C30_S10_Y(~0u)}, + {34617, S_028C30_S11_X(~0u)}, + {34623, S_028C30_S11_Y(~0u)}, + /* 2010 */ + {34629, S_028C34_S12_X(~0u)}, + {34635, S_028C34_S12_Y(~0u)}, + {34641, S_028C34_S13_X(~0u)}, + {34647, S_028C34_S13_Y(~0u)}, + {34653, S_028C34_S14_X(~0u)}, + {34659, S_028C34_S14_Y(~0u)}, + {34665, S_028C34_S15_X(~0u)}, + {34671, S_028C34_S15_Y(~0u)}, + /* 2018 */ + {34677, S_028C38_AA_MASK_X0Y0(~0u)}, + {34690, S_028C38_AA_MASK_X1Y0(~0u)}, + /* 2020 */ + {34703, S_028C3C_AA_MASK_X0Y1(~0u)}, + {34716, S_028C3C_AA_MASK_X1Y1(~0u)}, + /* 2022 */ + {34729, S_028C40_REALIGN_DQUADS_AFTER_N_WAVES(~0u)}, + /* 2023 */ + {34758, S_028C58_VTX_REUSE_DEPTH(~0u)}, + /* 2024 */ + {34774, S_028C5C_DEALLOC_DIST(~0u)}, + /* 2025 */ + {19352, S_028C64_TILE_MAX(~0u)}, + {34787, S_028C64_FMASK_TILE_MAX(~0u)}, + /* 2027 */ + {19352, S_028C68_TILE_MAX(~0u)}, + /* 2028 */ + {17994, S_028C6C_SLICE_START(~0u)}, + {18006, S_028C6C_SLICE_MAX(~0u)}, + /* 2030 */ + {34853, S_028C70_ENDIAN(~0u), 4, 1342}, + {8814, S_028C70_FORMAT(~0u), 23, 1346}, + {14209, S_028C70_LINEAR_GENERAL(~0u)}, + {35220, S_028C70_NUMBER_TYPE(~0u), 8, 1369}, + {35276, S_028C70_COMP_SWAP(~0u), 4, 1377}, + {26652, S_028C70_FAST_CLEAR(~0u)}, + {18580, S_028C70_COMPRESSION(~0u)}, + {35286, S_028C70_BLEND_CLAMP(~0u)}, + {35298, S_028C70_BLEND_BYPASS(~0u)}, + {35311, S_028C70_SIMPLE_FLOAT(~0u)}, + {34278, S_028C70_ROUND_MODE(~0u)}, + {35324, S_028C70_CMASK_IS_LINEAR(~0u)}, + {35551, S_028C70_BLEND_OPT_DONT_RD_DST(~0u), 8, 1381}, + {35573, S_028C70_BLEND_OPT_DISCARD_PIXEL(~0u), 8, 1381}, + {35597, S_028C70_FMASK_COMPRESSION_DISABLE(~0u)}, + {35623, S_028C70_FMASK_COMPRESS_1FRAG_ONLY(~0u)}, + {35649, S_028C70_DCC_ENABLE(~0u)}, + {35660, S_028C70_CMASK_ADDR_TYPE(~0u)}, + /* 2048 */ + {19180, S_028C74_TILE_MODE_INDEX(~0u)}, + {35676, S_028C74_FMASK_TILE_MODE_INDEX(~0u)}, + {35698, S_028C74_FMASK_BANK_HEIGHT(~0u)}, + {19168, S_028C74_NUM_SAMPLES(~0u)}, + {35716, S_028C74_NUM_FRAGMENTS(~0u)}, + {35730, S_028C74_FORCE_DST_ALPHA_1(~0u)}, + /* 2054 */ + {21724, S_028C78_OVERWRITE_COMBINER_DISABLE(~0u)}, + {35748, S_028C78_KEY_CLEAR_ENABLE(~0u)}, + {35765, S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(~0u)}, + {35793, S_028C78_MIN_COMPRESSED_BLOCK_SIZE(~0u)}, + {35819, S_028C78_MAX_COMPRESSED_BLOCK_SIZE(~0u)}, + {11829, S_028C78_COLOR_TRANSFORM(~0u)}, + {35845, S_028C78_INDEPENDENT_64B_BLOCKS(~0u)}, + {35868, S_028C78_LOSSY_RGB_PRECISION(~0u)}, + {35888, S_028C78_LOSSY_ALPHA_PRECISION(~0u)}, + /* 2063 */ + {19352, S_028C80_TILE_MAX(~0u)}, + /* 2064 */ + {19352, S_028C88_TILE_MAX(~0u)}, +}; + +static const struct si_reg sid_reg_table[] = { + {35910, R_2C3_DRAW_INDEX_LOC, 2, 0}, + {195, R_370_CONTROL, 4, 2}, + {1103, R_371_DST_ADDR_LO}, + {1115, R_372_DST_ADDR_HI}, + {35925, R_3F0_IB_BASE_LO}, + {35936, R_3F1_IB_BASE_HI}, + {195, R_3F2_CONTROL, 3, 6}, + {35947, R_410_CP_DMA_WORD0, 1, 9}, + {35960, R_411_CP_DMA_WORD1, 5, 10}, + {35973, R_412_CP_DMA_WORD2, 1, 15}, + {35986, R_413_CP_DMA_WORD3, 1, 16}, + {35999, R_414_COMMAND, 9, 17}, + {36007, R_500_DMA_DATA_WORD0, 4, 26}, + {1000, R_501_SRC_ADDR_LO}, + {1091, R_502_SRC_ADDR_HI}, + {1103, R_503_DST_ADDR_LO}, + {1115, R_504_DST_ADDR_HI}, + {36022, R_000E4C_SRBM_STATUS2, 21, 30}, + {36035, R_000E50_SRBM_STATUS, 20, 51}, + {36047, R_000E54_SRBM_STATUS3, 16, 71}, + {36060, R_00D034_SDMA0_STATUS_REG, 29, 87}, + {36077, R_00D834_SDMA1_STATUS_REG, 29, 87}, + {36094, R_008008_GRBM_STATUS2, 18, 116}, + {36107, R_008010_GRBM_STATUS, 24, 134}, + {36119, R_0084FC_CP_STRMOUT_CNTL, 1, 158}, + {36135, R_0085F0_CP_COHER_CNTL, 19, 159}, + {36149, R_0085F4_CP_COHER_SIZE}, + {36163, R_0085F8_CP_COHER_BASE}, + {36177, R_008014_GRBM_STATUS_SE0, 11, 178}, + {36193, R_008018_GRBM_STATUS_SE1, 11, 189}, + {36209, R_008038_GRBM_STATUS_SE2, 11, 200}, + {36225, R_00803C_GRBM_STATUS_SE3, 11, 211}, + {36119, R_0300FC_CP_STRMOUT_CNTL, 1, 222}, + {36241, R_0301E4_CP_COHER_BASE_HI, 1, 223}, + {36258, R_0301EC_CP_COHER_START_DELAY, 1, 224}, + {36135, R_0301F0_CP_COHER_CNTL, 27, 225}, + {36149, R_0301F4_CP_COHER_SIZE}, + {36163, R_0301F8_CP_COHER_BASE}, + {36279, R_0301FC_CP_COHER_STATUS, 4, 252}, + {36295, R_008210_CP_CPC_STATUS, 15, 256}, + {36309, R_008214_CP_CPC_BUSY_STAT, 28, 271}, + {36326, R_008218_CP_CPC_STALLED_STAT1, 14, 299}, + {36347, R_00821C_CP_CPF_STATUS, 21, 313}, + {36361, R_008220_CP_CPF_BUSY_STAT, 31, 334}, + {36378, R_008224_CP_CPF_STALLED_STAT1, 9, 365}, + {36399, R_030230_CP_COHER_SIZE_HI, 1, 374}, + {36416, R_0088B0_VGT_VTX_VECT_EJECT_REG, 1, 375}, + {36439, R_0088C4_VGT_CACHE_INVALIDATION, 3, 376}, + {36462, R_0088C8_VGT_ESGS_RING_SIZE}, + {36481, R_0088CC_VGT_GSVS_RING_SIZE}, + {36500, R_0088D4_VGT_GS_VERTEX_REUSE, 1, 379}, + {36520, R_008958_VGT_PRIMITIVE_TYPE, 1, 380}, + {36539, R_00895C_VGT_INDEX_TYPE, 1, 381}, + {36554, R_008960_VGT_STRMOUT_BUFFER_FILLED_SIZE_0}, + {36587, R_008964_VGT_STRMOUT_BUFFER_FILLED_SIZE_1}, + {36620, R_008968_VGT_STRMOUT_BUFFER_FILLED_SIZE_2}, + {36653, R_00896C_VGT_STRMOUT_BUFFER_FILLED_SIZE_3}, + {36686, R_008970_VGT_NUM_INDICES}, + {36702, R_008974_VGT_NUM_INSTANCES}, + {36720, R_008988_VGT_TF_RING_SIZE, 1, 382}, + {36737, R_0089B0_VGT_HS_OFFCHIP_PARAM, 1, 383}, + {36758, R_0089B8_VGT_TF_MEMORY_BASE}, + {36777, R_008A14_PA_CL_ENHANCE, 4, 384}, + {36791, R_008A60_PA_SU_LINE_STIPPLE_VALUE, 1, 388}, + {36816, R_008B10_PA_SC_LINE_STIPPLE_STATE, 2, 389}, + {36841, R_008670_CP_STALLED_STAT3, 19, 391}, + {36858, R_008674_CP_STALLED_STAT1, 16, 410}, + {36875, R_008678_CP_STALLED_STAT2, 29, 426}, + {36892, R_008680_CP_STAT, 23, 455}, + {36900, R_030800_GRBM_GFX_INDEX, 6, 478}, + {36462, R_030900_VGT_ESGS_RING_SIZE}, + {36481, R_030904_VGT_GSVS_RING_SIZE}, + {36520, R_030908_VGT_PRIMITIVE_TYPE, 1, 484}, + {36539, R_03090C_VGT_INDEX_TYPE, 1, 485}, + {36554, R_030910_VGT_STRMOUT_BUFFER_FILLED_SIZE_0}, + {36587, R_030914_VGT_STRMOUT_BUFFER_FILLED_SIZE_1}, + {36620, R_030918_VGT_STRMOUT_BUFFER_FILLED_SIZE_2}, + {36653, R_03091C_VGT_STRMOUT_BUFFER_FILLED_SIZE_3}, + {36686, R_030930_VGT_NUM_INDICES}, + {36702, R_030934_VGT_NUM_INSTANCES}, + {36720, R_030938_VGT_TF_RING_SIZE, 1, 486}, + {36737, R_03093C_VGT_HS_OFFCHIP_PARAM, 2, 487}, + {36758, R_030940_VGT_TF_MEMORY_BASE}, + {36791, R_030A00_PA_SU_LINE_STIPPLE_VALUE, 1, 489}, + {36816, R_030A04_PA_SC_LINE_STIPPLE_STATE, 2, 490}, + {36915, R_030A10_PA_SC_SCREEN_EXTENT_MIN_0, 2, 492}, + {36941, R_030A14_PA_SC_SCREEN_EXTENT_MAX_0, 2, 494}, + {36967, R_030A18_PA_SC_SCREEN_EXTENT_MIN_1, 2, 496}, + {36993, R_030A2C_PA_SC_SCREEN_EXTENT_MAX_1, 2, 498}, + {37019, R_008BF0_PA_SC_ENHANCE, 9, 500}, + {37033, R_008C08_SQC_CACHES, 2, 509}, + {37033, R_030D20_SQC_CACHES, 3, 511}, + {37044, R_008C0C_SQ_RANDOM_WAVE_PRI, 3, 514}, + {37063, R_008DFC_SQ_EXP_0, 6, 517}, + {37072, R_030E00_TA_CS_BC_BASE_ADDR}, + {37091, R_030E04_TA_CS_BC_BASE_ADDR_HI, 1, 523}, + {37113, R_030F00_DB_OCCLUSION_COUNT0_LOW}, + {37137, R_008F00_SQ_BUF_RSRC_WORD0}, + {37155, R_030F04_DB_OCCLUSION_COUNT0_HI, 1, 524}, + {37178, R_008F04_SQ_BUF_RSRC_WORD1, 4, 525}, + {37196, R_030F08_DB_OCCLUSION_COUNT1_LOW}, + {37220, R_008F08_SQ_BUF_RSRC_WORD2}, + {37238, R_030F0C_DB_OCCLUSION_COUNT1_HI, 1, 529}, + {37261, R_008F0C_SQ_BUF_RSRC_WORD3, 14, 530}, + {37279, R_030F10_DB_OCCLUSION_COUNT2_LOW}, + {37303, R_008F10_SQ_IMG_RSRC_WORD0}, + {37321, R_030F14_DB_OCCLUSION_COUNT2_HI, 1, 544}, + {37344, R_008F14_SQ_IMG_RSRC_WORD1, 5, 545}, + {37362, R_030F18_DB_OCCLUSION_COUNT3_LOW}, + {37386, R_008F18_SQ_IMG_RSRC_WORD2, 4, 550}, + {37404, R_030F1C_DB_OCCLUSION_COUNT3_HI, 1, 554}, + {37427, R_008F1C_SQ_IMG_RSRC_WORD3, 11, 555}, + {37445, R_008F20_SQ_IMG_RSRC_WORD4, 2, 566}, + {37463, R_008F24_SQ_IMG_RSRC_WORD5, 2, 568}, + {37481, R_008F28_SQ_IMG_RSRC_WORD6, 8, 570}, + {37499, R_008F2C_SQ_IMG_RSRC_WORD7}, + {37517, R_008F30_SQ_IMG_SAMP_WORD0, 14, 578}, + {37535, R_008F34_SQ_IMG_SAMP_WORD1, 4, 592}, + {37553, R_008F38_SQ_IMG_SAMP_WORD2, 10, 596}, + {37571, R_008F3C_SQ_IMG_SAMP_WORD3, 2, 606}, + {37589, R_0090DC_SPI_DYN_GPR_LOCK_EN, 5, 608}, + {37609, R_0090E0_SPI_STATIC_THREAD_MGMT_1, 2, 613}, + {37634, R_0090E4_SPI_STATIC_THREAD_MGMT_2, 2, 615}, + {37659, R_0090E8_SPI_STATIC_THREAD_MGMT_3, 1, 617}, + {37684, R_0090EC_SPI_PS_MAX_WAVE_ID, 1, 618}, + {37684, R_0090E8_SPI_PS_MAX_WAVE_ID, 1, 619}, + {37703, R_0090F0_SPI_ARB_PRIORITY, 3, 620}, + {37703, R_00C700_SPI_ARB_PRIORITY, 8, 623}, + {37720, R_0090F4_SPI_ARB_CYCLES_0, 2, 631}, + {37737, R_0090F8_SPI_ARB_CYCLES_1, 1, 633}, + {37754, R_008F40_SQ_FLAT_SCRATCH_WORD0, 1, 634}, + {37776, R_008F44_SQ_FLAT_SCRATCH_WORD1, 1, 635}, + {37798, R_030FF8_DB_ZPASS_COUNT_LOW}, + {37817, R_030FFC_DB_ZPASS_COUNT_HI, 1, 636}, + {37835, R_009100_SPI_CONFIG_CNTL, 5, 637}, + {37851, R_00913C_SPI_CONFIG_CNTL_1, 5, 642}, + {37869, R_00936C_SPI_RESOURCE_RESERVE_CU_AB_0, 12, 647}, + {37072, R_00950C_TA_CS_BC_BASE_ADDR}, + {37898, R_009858_DB_SUBTILE_CONTROL, 10, 659}, + {37917, R_0098F8_GB_ADDR_CONFIG, 9, 669}, + {37932, R_009910_GB_TILE_MODE0, 10, 678}, + {37946, R_009914_GB_TILE_MODE1, 10, 678}, + {37960, R_009918_GB_TILE_MODE2, 10, 678}, + {37974, R_00991C_GB_TILE_MODE3, 10, 678}, + {37988, R_009920_GB_TILE_MODE4, 10, 678}, + {38002, R_009924_GB_TILE_MODE5, 10, 678}, + {38016, R_009928_GB_TILE_MODE6, 10, 678}, + {38030, R_00992C_GB_TILE_MODE7, 10, 678}, + {38044, R_009930_GB_TILE_MODE8, 10, 678}, + {38058, R_009934_GB_TILE_MODE9, 10, 678}, + {38072, R_009938_GB_TILE_MODE10, 10, 678}, + {38087, R_00993C_GB_TILE_MODE11, 10, 678}, + {38102, R_009940_GB_TILE_MODE12, 10, 678}, + {38117, R_009944_GB_TILE_MODE13, 10, 678}, + {38132, R_009948_GB_TILE_MODE14, 10, 678}, + {38147, R_00994C_GB_TILE_MODE15, 10, 678}, + {38162, R_009950_GB_TILE_MODE16, 10, 678}, + {38177, R_009954_GB_TILE_MODE17, 10, 678}, + {38192, R_009958_GB_TILE_MODE18, 10, 678}, + {38207, R_00995C_GB_TILE_MODE19, 10, 678}, + {38222, R_009960_GB_TILE_MODE20, 10, 678}, + {38237, R_009964_GB_TILE_MODE21, 10, 678}, + {38252, R_009968_GB_TILE_MODE22, 10, 678}, + {38267, R_00996C_GB_TILE_MODE23, 10, 678}, + {38282, R_009970_GB_TILE_MODE24, 10, 678}, + {38297, R_009974_GB_TILE_MODE25, 10, 678}, + {38312, R_009978_GB_TILE_MODE26, 10, 678}, + {38327, R_00997C_GB_TILE_MODE27, 10, 678}, + {38342, R_009980_GB_TILE_MODE28, 10, 678}, + {38357, R_009984_GB_TILE_MODE29, 10, 678}, + {38372, R_009988_GB_TILE_MODE30, 10, 678}, + {38387, R_00998C_GB_TILE_MODE31, 10, 678}, + {38402, R_009990_GB_MACROTILE_MODE0, 4, 688}, + {38421, R_009994_GB_MACROTILE_MODE1, 4, 688}, + {38440, R_009998_GB_MACROTILE_MODE2, 4, 688}, + {38459, R_00999C_GB_MACROTILE_MODE3, 4, 688}, + {38478, R_0099A0_GB_MACROTILE_MODE4, 4, 688}, + {38497, R_0099A4_GB_MACROTILE_MODE5, 4, 688}, + {38516, R_0099A8_GB_MACROTILE_MODE6, 4, 688}, + {38535, R_0099AC_GB_MACROTILE_MODE7, 4, 688}, + {38554, R_0099B0_GB_MACROTILE_MODE8, 4, 688}, + {38573, R_0099B4_GB_MACROTILE_MODE9, 4, 688}, + {38592, R_0099B8_GB_MACROTILE_MODE10, 4, 688}, + {38612, R_0099BC_GB_MACROTILE_MODE11, 4, 688}, + {38632, R_0099C0_GB_MACROTILE_MODE12, 4, 688}, + {38652, R_0099C4_GB_MACROTILE_MODE13, 4, 688}, + {38672, R_0099C8_GB_MACROTILE_MODE14, 4, 688}, + {38692, R_0099CC_GB_MACROTILE_MODE15, 4, 688}, + {38712, R_00B000_SPI_SHADER_TBA_LO_PS}, + {38733, R_00B004_SPI_SHADER_TBA_HI_PS, 1, 692}, + {38754, R_00B008_SPI_SHADER_TMA_LO_PS}, + {38775, R_00B00C_SPI_SHADER_TMA_HI_PS, 1, 693}, + {38796, R_00B01C_SPI_SHADER_PGM_RSRC3_PS, 3, 694}, + {38820, R_00B020_SPI_SHADER_PGM_LO_PS}, + {38841, R_00B024_SPI_SHADER_PGM_HI_PS, 1, 697}, + {38862, R_00B028_SPI_SHADER_PGM_RSRC1_PS, 11, 698}, + {38886, R_00B02C_SPI_SHADER_PGM_RSRC2_PS, 7, 709}, + {38910, R_00B030_SPI_SHADER_USER_DATA_PS_0}, + {38936, R_00B034_SPI_SHADER_USER_DATA_PS_1}, + {38962, R_00B038_SPI_SHADER_USER_DATA_PS_2}, + {38988, R_00B03C_SPI_SHADER_USER_DATA_PS_3}, + {39014, R_00B040_SPI_SHADER_USER_DATA_PS_4}, + {39040, R_00B044_SPI_SHADER_USER_DATA_PS_5}, + {39066, R_00B048_SPI_SHADER_USER_DATA_PS_6}, + {39092, R_00B04C_SPI_SHADER_USER_DATA_PS_7}, + {39118, R_00B050_SPI_SHADER_USER_DATA_PS_8}, + {39144, R_00B054_SPI_SHADER_USER_DATA_PS_9}, + {39170, R_00B058_SPI_SHADER_USER_DATA_PS_10}, + {39197, R_00B05C_SPI_SHADER_USER_DATA_PS_11}, + {39224, R_00B060_SPI_SHADER_USER_DATA_PS_12}, + {39251, R_00B064_SPI_SHADER_USER_DATA_PS_13}, + {39278, R_00B068_SPI_SHADER_USER_DATA_PS_14}, + {39305, R_00B06C_SPI_SHADER_USER_DATA_PS_15}, + {39332, R_00B100_SPI_SHADER_TBA_LO_VS}, + {39353, R_00B104_SPI_SHADER_TBA_HI_VS, 1, 716}, + {39374, R_00B108_SPI_SHADER_TMA_LO_VS}, + {39395, R_00B10C_SPI_SHADER_TMA_HI_VS, 1, 717}, + {39416, R_00B118_SPI_SHADER_PGM_RSRC3_VS, 3, 718}, + {39440, R_00B11C_SPI_SHADER_LATE_ALLOC_VS, 1, 721}, + {39465, R_00B120_SPI_SHADER_PGM_LO_VS}, + {39486, R_00B124_SPI_SHADER_PGM_HI_VS, 1, 722}, + {39507, R_00B128_SPI_SHADER_PGM_RSRC1_VS, 12, 723}, + {39531, R_00B12C_SPI_SHADER_PGM_RSRC2_VS, 12, 735}, + {39555, R_00B130_SPI_SHADER_USER_DATA_VS_0}, + {39581, R_00B134_SPI_SHADER_USER_DATA_VS_1}, + {39607, R_00B138_SPI_SHADER_USER_DATA_VS_2}, + {39633, R_00B13C_SPI_SHADER_USER_DATA_VS_3}, + {39659, R_00B140_SPI_SHADER_USER_DATA_VS_4}, + {39685, R_00B144_SPI_SHADER_USER_DATA_VS_5}, + {39711, R_00B148_SPI_SHADER_USER_DATA_VS_6}, + {39737, R_00B14C_SPI_SHADER_USER_DATA_VS_7}, + {39763, R_00B150_SPI_SHADER_USER_DATA_VS_8}, + {39789, R_00B154_SPI_SHADER_USER_DATA_VS_9}, + {39815, R_00B158_SPI_SHADER_USER_DATA_VS_10}, + {39842, R_00B15C_SPI_SHADER_USER_DATA_VS_11}, + {39869, R_00B160_SPI_SHADER_USER_DATA_VS_12}, + {39896, R_00B164_SPI_SHADER_USER_DATA_VS_13}, + {39923, R_00B168_SPI_SHADER_USER_DATA_VS_14}, + {39950, R_00B16C_SPI_SHADER_USER_DATA_VS_15}, + {39977, R_00B200_SPI_SHADER_TBA_LO_GS}, + {39998, R_00B204_SPI_SHADER_TBA_HI_GS, 1, 747}, + {40019, R_00B208_SPI_SHADER_TMA_LO_GS}, + {40040, R_00B20C_SPI_SHADER_TMA_HI_GS, 1, 748}, + {40061, R_00B21C_SPI_SHADER_PGM_RSRC3_GS, 4, 749}, + {40085, R_00B220_SPI_SHADER_PGM_LO_GS}, + {40106, R_00B224_SPI_SHADER_PGM_HI_GS, 1, 753}, + {40127, R_00B228_SPI_SHADER_PGM_RSRC1_GS, 11, 754}, + {40151, R_00B22C_SPI_SHADER_PGM_RSRC2_GS, 5, 765}, + {40175, R_00B230_SPI_SHADER_USER_DATA_GS_0}, + {40201, R_00B234_SPI_SHADER_USER_DATA_GS_1}, + {40227, R_00B238_SPI_SHADER_USER_DATA_GS_2}, + {40253, R_00B23C_SPI_SHADER_USER_DATA_GS_3}, + {40279, R_00B240_SPI_SHADER_USER_DATA_GS_4}, + {40305, R_00B244_SPI_SHADER_USER_DATA_GS_5}, + {40331, R_00B248_SPI_SHADER_USER_DATA_GS_6}, + {40357, R_00B24C_SPI_SHADER_USER_DATA_GS_7}, + {40383, R_00B250_SPI_SHADER_USER_DATA_GS_8}, + {40409, R_00B254_SPI_SHADER_USER_DATA_GS_9}, + {40435, R_00B258_SPI_SHADER_USER_DATA_GS_10}, + {40462, R_00B25C_SPI_SHADER_USER_DATA_GS_11}, + {40489, R_00B260_SPI_SHADER_USER_DATA_GS_12}, + {40516, R_00B264_SPI_SHADER_USER_DATA_GS_13}, + {40543, R_00B268_SPI_SHADER_USER_DATA_GS_14}, + {40570, R_00B26C_SPI_SHADER_USER_DATA_GS_15}, + {40597, R_00B300_SPI_SHADER_TBA_LO_ES}, + {40618, R_00B304_SPI_SHADER_TBA_HI_ES, 1, 770}, + {40639, R_00B308_SPI_SHADER_TMA_LO_ES}, + {40660, R_00B30C_SPI_SHADER_TMA_HI_ES, 1, 771}, + {40681, R_00B31C_SPI_SHADER_PGM_RSRC3_ES, 4, 772}, + {40705, R_00B320_SPI_SHADER_PGM_LO_ES}, + {40726, R_00B324_SPI_SHADER_PGM_HI_ES, 1, 776}, + {40747, R_00B328_SPI_SHADER_PGM_RSRC1_ES, 12, 777}, + {40771, R_00B32C_SPI_SHADER_PGM_RSRC2_ES, 6, 789}, + {40795, R_00B330_SPI_SHADER_USER_DATA_ES_0}, + {40821, R_00B334_SPI_SHADER_USER_DATA_ES_1}, + {40847, R_00B338_SPI_SHADER_USER_DATA_ES_2}, + {40873, R_00B33C_SPI_SHADER_USER_DATA_ES_3}, + {40899, R_00B340_SPI_SHADER_USER_DATA_ES_4}, + {40925, R_00B344_SPI_SHADER_USER_DATA_ES_5}, + {40951, R_00B348_SPI_SHADER_USER_DATA_ES_6}, + {40977, R_00B34C_SPI_SHADER_USER_DATA_ES_7}, + {41003, R_00B350_SPI_SHADER_USER_DATA_ES_8}, + {41029, R_00B354_SPI_SHADER_USER_DATA_ES_9}, + {41055, R_00B358_SPI_SHADER_USER_DATA_ES_10}, + {41082, R_00B35C_SPI_SHADER_USER_DATA_ES_11}, + {41109, R_00B360_SPI_SHADER_USER_DATA_ES_12}, + {41136, R_00B364_SPI_SHADER_USER_DATA_ES_13}, + {41163, R_00B368_SPI_SHADER_USER_DATA_ES_14}, + {41190, R_00B36C_SPI_SHADER_USER_DATA_ES_15}, + {41217, R_00B400_SPI_SHADER_TBA_LO_HS}, + {41238, R_00B404_SPI_SHADER_TBA_HI_HS, 1, 795}, + {41259, R_00B408_SPI_SHADER_TMA_LO_HS}, + {41280, R_00B40C_SPI_SHADER_TMA_HI_HS, 1, 796}, + {41301, R_00B41C_SPI_SHADER_PGM_RSRC3_HS, 3, 797}, + {41325, R_00B420_SPI_SHADER_PGM_LO_HS}, + {41346, R_00B424_SPI_SHADER_PGM_HI_HS, 1, 800}, + {41367, R_00B428_SPI_SHADER_PGM_RSRC1_HS, 10, 801}, + {41391, R_00B42C_SPI_SHADER_PGM_RSRC2_HS, 6, 811}, + {41415, R_00B430_SPI_SHADER_USER_DATA_HS_0}, + {41441, R_00B434_SPI_SHADER_USER_DATA_HS_1}, + {41467, R_00B438_SPI_SHADER_USER_DATA_HS_2}, + {41493, R_00B43C_SPI_SHADER_USER_DATA_HS_3}, + {41519, R_00B440_SPI_SHADER_USER_DATA_HS_4}, + {41545, R_00B444_SPI_SHADER_USER_DATA_HS_5}, + {41571, R_00B448_SPI_SHADER_USER_DATA_HS_6}, + {41597, R_00B44C_SPI_SHADER_USER_DATA_HS_7}, + {41623, R_00B450_SPI_SHADER_USER_DATA_HS_8}, + {41649, R_00B454_SPI_SHADER_USER_DATA_HS_9}, + {41675, R_00B458_SPI_SHADER_USER_DATA_HS_10}, + {41702, R_00B45C_SPI_SHADER_USER_DATA_HS_11}, + {41729, R_00B460_SPI_SHADER_USER_DATA_HS_12}, + {41756, R_00B464_SPI_SHADER_USER_DATA_HS_13}, + {41783, R_00B468_SPI_SHADER_USER_DATA_HS_14}, + {41810, R_00B46C_SPI_SHADER_USER_DATA_HS_15}, + {41837, R_00B500_SPI_SHADER_TBA_LO_LS}, + {41858, R_00B504_SPI_SHADER_TBA_HI_LS, 1, 817}, + {41879, R_00B508_SPI_SHADER_TMA_LO_LS}, + {41900, R_00B50C_SPI_SHADER_TMA_HI_LS, 1, 818}, + {41921, R_00B51C_SPI_SHADER_PGM_RSRC3_LS, 4, 819}, + {41945, R_00B520_SPI_SHADER_PGM_LO_LS}, + {41966, R_00B524_SPI_SHADER_PGM_HI_LS, 1, 823}, + {41987, R_00B528_SPI_SHADER_PGM_RSRC1_LS, 11, 824}, + {42011, R_00B52C_SPI_SHADER_PGM_RSRC2_LS, 5, 835}, + {42035, R_00B530_SPI_SHADER_USER_DATA_LS_0}, + {42061, R_00B534_SPI_SHADER_USER_DATA_LS_1}, + {42087, R_00B538_SPI_SHADER_USER_DATA_LS_2}, + {42113, R_00B53C_SPI_SHADER_USER_DATA_LS_3}, + {42139, R_00B540_SPI_SHADER_USER_DATA_LS_4}, + {42165, R_00B544_SPI_SHADER_USER_DATA_LS_5}, + {42191, R_00B548_SPI_SHADER_USER_DATA_LS_6}, + {42217, R_00B54C_SPI_SHADER_USER_DATA_LS_7}, + {42243, R_00B550_SPI_SHADER_USER_DATA_LS_8}, + {42269, R_00B554_SPI_SHADER_USER_DATA_LS_9}, + {42295, R_00B558_SPI_SHADER_USER_DATA_LS_10}, + {42322, R_00B55C_SPI_SHADER_USER_DATA_LS_11}, + {42349, R_00B560_SPI_SHADER_USER_DATA_LS_12}, + {42376, R_00B564_SPI_SHADER_USER_DATA_LS_13}, + {42403, R_00B568_SPI_SHADER_USER_DATA_LS_14}, + {42430, R_00B56C_SPI_SHADER_USER_DATA_LS_15}, + {42457, R_00B800_COMPUTE_DISPATCH_INITIATOR, 12, 840}, + {42484, R_00B804_COMPUTE_DIM_X}, + {42498, R_00B808_COMPUTE_DIM_Y}, + {42512, R_00B80C_COMPUTE_DIM_Z}, + {42526, R_00B810_COMPUTE_START_X}, + {42542, R_00B814_COMPUTE_START_Y}, + {42558, R_00B818_COMPUTE_START_Z}, + {42574, R_00B81C_COMPUTE_NUM_THREAD_X, 2, 852}, + {42595, R_00B820_COMPUTE_NUM_THREAD_Y, 2, 854}, + {42616, R_00B824_COMPUTE_NUM_THREAD_Z, 2, 856}, + {42637, R_00B82C_COMPUTE_MAX_WAVE_ID, 1, 858}, + {42657, R_00B828_COMPUTE_PIPELINESTAT_ENABLE, 1, 859}, + {42685, R_00B82C_COMPUTE_PERFCOUNT_ENABLE, 1, 860}, + {42710, R_00B830_COMPUTE_PGM_LO}, + {42725, R_00B834_COMPUTE_PGM_HI, 2, 861}, + {42740, R_00B838_COMPUTE_TBA_LO}, + {42755, R_00B83C_COMPUTE_TBA_HI, 1, 863}, + {42770, R_00B840_COMPUTE_TMA_LO}, + {42785, R_00B844_COMPUTE_TMA_HI, 1, 864}, + {42800, R_00B848_COMPUTE_PGM_RSRC1, 10, 865}, + {42818, R_00B84C_COMPUTE_PGM_RSRC2, 11, 875}, + {42836, R_00B850_COMPUTE_VMID, 1, 886}, + {42849, R_00B854_COMPUTE_RESOURCE_LIMITS, 7, 887}, + {42873, R_00B858_COMPUTE_STATIC_THREAD_MGMT_SE0, 2, 894}, + {42904, R_00B85C_COMPUTE_STATIC_THREAD_MGMT_SE1, 2, 896}, + {42935, R_00B860_COMPUTE_TMPRING_SIZE, 2, 898}, + {42956, R_00B864_COMPUTE_STATIC_THREAD_MGMT_SE2, 2, 900}, + {42987, R_00B868_COMPUTE_STATIC_THREAD_MGMT_SE3, 2, 902}, + {43018, R_00B86C_COMPUTE_RESTART_X}, + {43036, R_00B870_COMPUTE_RESTART_Y}, + {43054, R_00B874_COMPUTE_RESTART_Z}, + {43072, R_00B87C_COMPUTE_MISC_RESERVED, 5, 904}, + {43094, R_00B880_COMPUTE_DISPATCH_ID}, + {43114, R_00B884_COMPUTE_THREADGROUP_ID}, + {43137, R_00B888_COMPUTE_RELAUNCH, 3, 909}, + {43154, R_00B88C_COMPUTE_WAVE_RESTORE_ADDR_LO}, + {43183, R_00B890_COMPUTE_WAVE_RESTORE_ADDR_HI, 1, 912}, + {43212, R_00B894_COMPUTE_WAVE_RESTORE_CONTROL, 2, 913}, + {43241, R_00B900_COMPUTE_USER_DATA_0}, + {43261, R_00B904_COMPUTE_USER_DATA_1}, + {43281, R_00B908_COMPUTE_USER_DATA_2}, + {43301, R_00B90C_COMPUTE_USER_DATA_3}, + {43321, R_00B910_COMPUTE_USER_DATA_4}, + {43341, R_00B914_COMPUTE_USER_DATA_5}, + {43361, R_00B918_COMPUTE_USER_DATA_6}, + {43381, R_00B91C_COMPUTE_USER_DATA_7}, + {43401, R_00B920_COMPUTE_USER_DATA_8}, + {43421, R_00B924_COMPUTE_USER_DATA_9}, + {43441, R_00B928_COMPUTE_USER_DATA_10}, + {43462, R_00B92C_COMPUTE_USER_DATA_11}, + {43483, R_00B930_COMPUTE_USER_DATA_12}, + {43504, R_00B934_COMPUTE_USER_DATA_13}, + {43525, R_00B938_COMPUTE_USER_DATA_14}, + {43546, R_00B93C_COMPUTE_USER_DATA_15}, + {43567, R_00B9FC_COMPUTE_NOWHERE}, + {43583, R_034000_CPG_PERFCOUNTER1_LO}, + {43603, R_034004_CPG_PERFCOUNTER1_HI}, + {43623, R_034008_CPG_PERFCOUNTER0_LO}, + {43643, R_03400C_CPG_PERFCOUNTER0_HI}, + {43663, R_034010_CPC_PERFCOUNTER1_LO}, + {43683, R_034014_CPC_PERFCOUNTER1_HI}, + {43703, R_034018_CPC_PERFCOUNTER0_LO}, + {43723, R_03401C_CPC_PERFCOUNTER0_HI}, + {43743, R_034020_CPF_PERFCOUNTER1_LO}, + {43763, R_034024_CPF_PERFCOUNTER1_HI}, + {43783, R_034028_CPF_PERFCOUNTER0_LO}, + {43803, R_03402C_CPF_PERFCOUNTER0_HI}, + {43823, R_034100_GRBM_PERFCOUNTER0_LO}, + {43844, R_034104_GRBM_PERFCOUNTER0_HI}, + {43865, R_03410C_GRBM_PERFCOUNTER1_LO}, + {43886, R_034110_GRBM_PERFCOUNTER1_HI}, + {43907, R_034114_GRBM_SE0_PERFCOUNTER_LO}, + {43931, R_034118_GRBM_SE0_PERFCOUNTER_HI}, + {43955, R_03411C_GRBM_SE1_PERFCOUNTER_LO}, + {43979, R_034120_GRBM_SE1_PERFCOUNTER_HI}, + {44003, R_034124_GRBM_SE2_PERFCOUNTER_LO}, + {44027, R_034128_GRBM_SE2_PERFCOUNTER_HI}, + {44051, R_03412C_GRBM_SE3_PERFCOUNTER_LO}, + {44075, R_034130_GRBM_SE3_PERFCOUNTER_HI}, + {44099, R_034200_WD_PERFCOUNTER0_LO}, + {44118, R_034204_WD_PERFCOUNTER0_HI}, + {44137, R_034208_WD_PERFCOUNTER1_LO}, + {44156, R_03420C_WD_PERFCOUNTER1_HI}, + {44175, R_034210_WD_PERFCOUNTER2_LO}, + {44194, R_034214_WD_PERFCOUNTER2_HI}, + {44213, R_034218_WD_PERFCOUNTER3_LO}, + {44232, R_03421C_WD_PERFCOUNTER3_HI}, + {44251, R_034220_IA_PERFCOUNTER0_LO}, + {44270, R_034224_IA_PERFCOUNTER0_HI}, + {44289, R_034228_IA_PERFCOUNTER1_LO}, + {44308, R_03422C_IA_PERFCOUNTER1_HI}, + {44327, R_034230_IA_PERFCOUNTER2_LO}, + {44346, R_034234_IA_PERFCOUNTER2_HI}, + {44365, R_034238_IA_PERFCOUNTER3_LO}, + {44384, R_03423C_IA_PERFCOUNTER3_HI}, + {44403, R_034240_VGT_PERFCOUNTER0_LO}, + {44423, R_034244_VGT_PERFCOUNTER0_HI}, + {44443, R_034248_VGT_PERFCOUNTER1_LO}, + {44463, R_03424C_VGT_PERFCOUNTER1_HI}, + {44483, R_034250_VGT_PERFCOUNTER2_LO}, + {44503, R_034254_VGT_PERFCOUNTER2_HI}, + {44523, R_034258_VGT_PERFCOUNTER3_LO}, + {44543, R_03425C_VGT_PERFCOUNTER3_HI}, + {44563, R_034400_PA_SU_PERFCOUNTER0_LO}, + {44585, R_034404_PA_SU_PERFCOUNTER0_HI, 1, 915}, + {44607, R_034408_PA_SU_PERFCOUNTER1_LO}, + {44629, R_03440C_PA_SU_PERFCOUNTER1_HI, 1, 915}, + {44651, R_034410_PA_SU_PERFCOUNTER2_LO}, + {44673, R_034414_PA_SU_PERFCOUNTER2_HI, 1, 915}, + {44695, R_034418_PA_SU_PERFCOUNTER3_LO}, + {44717, R_03441C_PA_SU_PERFCOUNTER3_HI, 1, 915}, + {44739, R_034500_PA_SC_PERFCOUNTER0_LO}, + {44761, R_034504_PA_SC_PERFCOUNTER0_HI}, + {44783, R_034508_PA_SC_PERFCOUNTER1_LO}, + {44805, R_03450C_PA_SC_PERFCOUNTER1_HI}, + {44827, R_034510_PA_SC_PERFCOUNTER2_LO}, + {44849, R_034514_PA_SC_PERFCOUNTER2_HI}, + {44871, R_034518_PA_SC_PERFCOUNTER3_LO}, + {44893, R_03451C_PA_SC_PERFCOUNTER3_HI}, + {44915, R_034520_PA_SC_PERFCOUNTER4_LO}, + {44937, R_034524_PA_SC_PERFCOUNTER4_HI}, + {44959, R_034528_PA_SC_PERFCOUNTER5_LO}, + {44981, R_03452C_PA_SC_PERFCOUNTER5_HI}, + {45003, R_034530_PA_SC_PERFCOUNTER6_LO}, + {45025, R_034534_PA_SC_PERFCOUNTER6_HI}, + {45047, R_034538_PA_SC_PERFCOUNTER7_LO}, + {45069, R_03453C_PA_SC_PERFCOUNTER7_HI}, + {45091, R_034600_SPI_PERFCOUNTER0_HI}, + {45111, R_034604_SPI_PERFCOUNTER0_LO}, + {45131, R_034608_SPI_PERFCOUNTER1_HI}, + {45151, R_03460C_SPI_PERFCOUNTER1_LO}, + {45171, R_034610_SPI_PERFCOUNTER2_HI}, + {45191, R_034614_SPI_PERFCOUNTER2_LO}, + {45211, R_034618_SPI_PERFCOUNTER3_HI}, + {45231, R_03461C_SPI_PERFCOUNTER3_LO}, + {45251, R_034620_SPI_PERFCOUNTER4_HI}, + {45271, R_034624_SPI_PERFCOUNTER4_LO}, + {45291, R_034628_SPI_PERFCOUNTER5_HI}, + {45311, R_03462C_SPI_PERFCOUNTER5_LO}, + {45331, R_034700_SQ_PERFCOUNTER0_LO}, + {45350, R_034704_SQ_PERFCOUNTER0_HI}, + {45369, R_034708_SQ_PERFCOUNTER1_LO}, + {45388, R_03470C_SQ_PERFCOUNTER1_HI}, + {45407, R_034710_SQ_PERFCOUNTER2_LO}, + {45426, R_034714_SQ_PERFCOUNTER2_HI}, + {45445, R_034718_SQ_PERFCOUNTER3_LO}, + {45464, R_03471C_SQ_PERFCOUNTER3_HI}, + {45483, R_034720_SQ_PERFCOUNTER4_LO}, + {45502, R_034724_SQ_PERFCOUNTER4_HI}, + {45521, R_034728_SQ_PERFCOUNTER5_LO}, + {45540, R_03472C_SQ_PERFCOUNTER5_HI}, + {45559, R_034730_SQ_PERFCOUNTER6_LO}, + {45578, R_034734_SQ_PERFCOUNTER6_HI}, + {45597, R_034738_SQ_PERFCOUNTER7_LO}, + {45616, R_03473C_SQ_PERFCOUNTER7_HI}, + {45635, R_034740_SQ_PERFCOUNTER8_LO}, + {45654, R_034744_SQ_PERFCOUNTER8_HI}, + {45673, R_034748_SQ_PERFCOUNTER9_LO}, + {45692, R_03474C_SQ_PERFCOUNTER9_HI}, + {45711, R_034750_SQ_PERFCOUNTER10_LO}, + {45731, R_034754_SQ_PERFCOUNTER10_HI}, + {45751, R_034758_SQ_PERFCOUNTER11_LO}, + {45771, R_03475C_SQ_PERFCOUNTER11_HI}, + {45791, R_034760_SQ_PERFCOUNTER12_LO}, + {45811, R_034764_SQ_PERFCOUNTER12_HI}, + {45831, R_034768_SQ_PERFCOUNTER13_LO}, + {45851, R_03476C_SQ_PERFCOUNTER13_HI}, + {45871, R_034770_SQ_PERFCOUNTER14_LO}, + {45891, R_034774_SQ_PERFCOUNTER14_HI}, + {45911, R_034778_SQ_PERFCOUNTER15_LO}, + {45931, R_03477C_SQ_PERFCOUNTER15_HI}, + {45951, R_034900_SX_PERFCOUNTER0_LO}, + {45970, R_034904_SX_PERFCOUNTER0_HI}, + {45989, R_034908_SX_PERFCOUNTER1_LO}, + {46008, R_03490C_SX_PERFCOUNTER1_HI}, + {46027, R_034910_SX_PERFCOUNTER2_LO}, + {46046, R_034914_SX_PERFCOUNTER2_HI}, + {46065, R_034918_SX_PERFCOUNTER3_LO}, + {46084, R_03491C_SX_PERFCOUNTER3_HI}, + {46103, R_034A00_GDS_PERFCOUNTER0_LO}, + {46123, R_034A04_GDS_PERFCOUNTER0_HI}, + {46143, R_034A08_GDS_PERFCOUNTER1_LO}, + {46163, R_034A0C_GDS_PERFCOUNTER1_HI}, + {46183, R_034A10_GDS_PERFCOUNTER2_LO}, + {46203, R_034A14_GDS_PERFCOUNTER2_HI}, + {46223, R_034A18_GDS_PERFCOUNTER3_LO}, + {46243, R_034A1C_GDS_PERFCOUNTER3_HI}, + {46263, R_034B00_TA_PERFCOUNTER0_LO}, + {46282, R_034B04_TA_PERFCOUNTER0_HI}, + {46301, R_034B08_TA_PERFCOUNTER1_LO}, + {46320, R_034B0C_TA_PERFCOUNTER1_HI}, + {46339, R_034C00_TD_PERFCOUNTER0_LO}, + {46358, R_034C04_TD_PERFCOUNTER0_HI}, + {46377, R_034C08_TD_PERFCOUNTER1_LO}, + {46396, R_034C0C_TD_PERFCOUNTER1_HI}, + {46415, R_034D00_TCP_PERFCOUNTER0_LO}, + {46435, R_034D04_TCP_PERFCOUNTER0_HI}, + {46455, R_034D08_TCP_PERFCOUNTER1_LO}, + {46475, R_034D0C_TCP_PERFCOUNTER1_HI}, + {46495, R_034D10_TCP_PERFCOUNTER2_LO}, + {46515, R_034D14_TCP_PERFCOUNTER2_HI}, + {46535, R_034D18_TCP_PERFCOUNTER3_LO}, + {46555, R_034D1C_TCP_PERFCOUNTER3_HI}, + {46575, R_034E00_TCC_PERFCOUNTER0_LO}, + {46595, R_034E04_TCC_PERFCOUNTER0_HI}, + {46615, R_034E08_TCC_PERFCOUNTER1_LO}, + {46635, R_034E0C_TCC_PERFCOUNTER1_HI}, + {46655, R_034E10_TCC_PERFCOUNTER2_LO}, + {46675, R_034E14_TCC_PERFCOUNTER2_HI}, + {46695, R_034E18_TCC_PERFCOUNTER3_LO}, + {46715, R_034E1C_TCC_PERFCOUNTER3_HI}, + {46735, R_034E40_TCA_PERFCOUNTER0_LO}, + {46755, R_034E44_TCA_PERFCOUNTER0_HI}, + {46775, R_034E48_TCA_PERFCOUNTER1_LO}, + {46795, R_034E4C_TCA_PERFCOUNTER1_HI}, + {46815, R_034E50_TCA_PERFCOUNTER2_LO}, + {46835, R_034E54_TCA_PERFCOUNTER2_HI}, + {46855, R_034E58_TCA_PERFCOUNTER3_LO}, + {46875, R_034E5C_TCA_PERFCOUNTER3_HI}, + {46895, R_035018_CB_PERFCOUNTER0_LO}, + {46914, R_03501C_CB_PERFCOUNTER0_HI}, + {46933, R_035020_CB_PERFCOUNTER1_LO}, + {46952, R_035024_CB_PERFCOUNTER1_HI}, + {46971, R_035028_CB_PERFCOUNTER2_LO}, + {46990, R_03502C_CB_PERFCOUNTER2_HI}, + {47009, R_035030_CB_PERFCOUNTER3_LO}, + {47028, R_035034_CB_PERFCOUNTER3_HI}, + {47047, R_035100_DB_PERFCOUNTER0_LO}, + {47066, R_035104_DB_PERFCOUNTER0_HI}, + {47085, R_035108_DB_PERFCOUNTER1_LO}, + {47104, R_03510C_DB_PERFCOUNTER1_HI}, + {47123, R_035110_DB_PERFCOUNTER2_LO}, + {47142, R_035114_DB_PERFCOUNTER2_HI}, + {47161, R_035118_DB_PERFCOUNTER3_LO}, + {47180, R_03511C_DB_PERFCOUNTER3_HI}, + {47199, R_035200_RLC_PERFCOUNTER0_LO}, + {47219, R_035204_RLC_PERFCOUNTER0_HI}, + {47239, R_035208_RLC_PERFCOUNTER1_LO}, + {47259, R_03520C_RLC_PERFCOUNTER1_HI}, + {47279, R_036000_CPG_PERFCOUNTER1_SELECT, 3, 918}, + {47303, R_036004_CPG_PERFCOUNTER0_SELECT1, 2, 916}, + {47328, R_036008_CPG_PERFCOUNTER0_SELECT, 3, 918}, + {47352, R_03600C_CPC_PERFCOUNTER1_SELECT, 3, 932}, + {47376, R_036010_CPC_PERFCOUNTER0_SELECT1, 2, 921}, + {47401, R_036014_CPF_PERFCOUNTER1_SELECT, 3, 925}, + {47425, R_036018_CPF_PERFCOUNTER0_SELECT1, 2, 923}, + {47450, R_03601C_CPF_PERFCOUNTER0_SELECT, 3, 925}, + {47474, R_036020_CP_PERFMON_CNTL, 4, 928}, + {47490, R_036024_CPC_PERFCOUNTER0_SELECT, 3, 932}, + {47514, R_036100_GRBM_PERFCOUNTER0_SELECT, 19, 935}, + {47539, R_036104_GRBM_PERFCOUNTER1_SELECT, 19, 935}, + {47564, R_036108_GRBM_SE0_PERFCOUNTER_SELECT, 12, 954}, + {47592, R_03610C_GRBM_SE1_PERFCOUNTER_SELECT, 12, 966}, + {47620, R_036110_GRBM_SE2_PERFCOUNTER_SELECT, 12, 978}, + {47648, R_036114_GRBM_SE3_PERFCOUNTER_SELECT, 12, 990}, + {47676, R_036200_WD_PERFCOUNTER0_SELECT, 2, 1002}, + {47699, R_036204_WD_PERFCOUNTER1_SELECT, 2, 1002}, + {47722, R_036208_WD_PERFCOUNTER2_SELECT, 2, 1002}, + {47745, R_03620C_WD_PERFCOUNTER3_SELECT, 2, 1002}, + {47768, R_036210_IA_PERFCOUNTER0_SELECT, 5, 1004}, + {47791, R_036214_IA_PERFCOUNTER1_SELECT, 5, 1004}, + {47814, R_036218_IA_PERFCOUNTER2_SELECT, 5, 1004}, + {47837, R_03621C_IA_PERFCOUNTER3_SELECT, 5, 1004}, + {47860, R_036220_IA_PERFCOUNTER0_SELECT1, 4, 1009}, + {47884, R_036230_VGT_PERFCOUNTER0_SELECT, 5, 1013}, + {47908, R_036234_VGT_PERFCOUNTER1_SELECT, 5, 1013}, + {47932, R_036238_VGT_PERFCOUNTER2_SELECT, 5, 1013}, + {47956, R_03623C_VGT_PERFCOUNTER3_SELECT, 5, 1013}, + {47980, R_036240_VGT_PERFCOUNTER0_SELECT1, 4, 1018}, + {48005, R_036244_VGT_PERFCOUNTER1_SELECT1}, + {48030, R_036250_VGT_PERFCOUNTER_SEID_MASK, 1, 1022}, + {48056, R_036400_PA_SU_PERFCOUNTER0_SELECT, 3, 1023}, + {48082, R_036404_PA_SU_PERFCOUNTER0_SELECT1, 2, 1026}, + {48109, R_036408_PA_SU_PERFCOUNTER1_SELECT, 3, 1023}, + {48135, R_03640C_PA_SU_PERFCOUNTER1_SELECT1}, + {48162, R_036410_PA_SU_PERFCOUNTER2_SELECT, 3, 1023}, + {48188, R_036414_PA_SU_PERFCOUNTER3_SELECT, 3, 1023}, + {48214, R_036500_PA_SC_PERFCOUNTER0_SELECT, 3, 1028}, + {48240, R_036504_PA_SC_PERFCOUNTER0_SELECT1, 2, 1031}, + {48267, R_036508_PA_SC_PERFCOUNTER1_SELECT, 3, 1028}, + {48293, R_03650C_PA_SC_PERFCOUNTER2_SELECT, 3, 1028}, + {48319, R_036510_PA_SC_PERFCOUNTER3_SELECT, 3, 1028}, + {48345, R_036514_PA_SC_PERFCOUNTER4_SELECT, 3, 1028}, + {48371, R_036518_PA_SC_PERFCOUNTER5_SELECT, 3, 1028}, + {48397, R_03651C_PA_SC_PERFCOUNTER6_SELECT, 3, 1028}, + {48423, R_036520_PA_SC_PERFCOUNTER7_SELECT, 3, 1028}, + {48449, R_036600_SPI_PERFCOUNTER0_SELECT, 3, 1033}, + {48473, R_036604_SPI_PERFCOUNTER1_SELECT, 3, 1033}, + {48497, R_036608_SPI_PERFCOUNTER2_SELECT, 3, 1033}, + {48521, R_03660C_SPI_PERFCOUNTER3_SELECT, 3, 1033}, + {48545, R_036610_SPI_PERFCOUNTER0_SELECT1, 2, 1036}, + {48570, R_036614_SPI_PERFCOUNTER1_SELECT1}, + {48595, R_036618_SPI_PERFCOUNTER2_SELECT1}, + {48620, R_03661C_SPI_PERFCOUNTER3_SELECT1}, + {48645, R_036620_SPI_PERFCOUNTER4_SELECT, 3, 1033}, + {48669, R_036624_SPI_PERFCOUNTER5_SELECT, 3, 1033}, + {48693, R_036628_SPI_PERFCOUNTER_BINS, 8, 1038}, + {48714, R_036700_SQ_PERFCOUNTER0_SELECT, 6, 1046}, + {48737, R_036704_SQ_PERFCOUNTER1_SELECT, 6, 1046}, + {48760, R_036708_SQ_PERFCOUNTER2_SELECT, 6, 1046}, + {48783, R_03670C_SQ_PERFCOUNTER3_SELECT, 6, 1046}, + {48806, R_036710_SQ_PERFCOUNTER4_SELECT, 6, 1046}, + {48829, R_036714_SQ_PERFCOUNTER5_SELECT, 6, 1046}, + {48852, R_036718_SQ_PERFCOUNTER6_SELECT, 6, 1046}, + {48875, R_03671C_SQ_PERFCOUNTER7_SELECT, 6, 1046}, + {48898, R_036720_SQ_PERFCOUNTER8_SELECT, 6, 1046}, + {48921, R_036724_SQ_PERFCOUNTER9_SELECT, 6, 1046}, + {48944, R_036728_SQ_PERFCOUNTER10_SELECT, 6, 1046}, + {48968, R_03672C_SQ_PERFCOUNTER11_SELECT, 6, 1046}, + {48992, R_036730_SQ_PERFCOUNTER12_SELECT, 6, 1046}, + {49016, R_036734_SQ_PERFCOUNTER13_SELECT, 6, 1046}, + {49040, R_036738_SQ_PERFCOUNTER14_SELECT, 6, 1046}, + {49064, R_03673C_SQ_PERFCOUNTER15_SELECT, 6, 1046}, + {49088, R_036780_SQ_PERFCOUNTER_CTRL, 9, 1052}, + {49108, R_036784_SQ_PERFCOUNTER_MASK, 2, 1061}, + {49128, R_036788_SQ_PERFCOUNTER_CTRL2, 1, 1063}, + {49149, R_036900_SX_PERFCOUNTER0_SELECT, 3, 1064}, + {49172, R_036904_SX_PERFCOUNTER1_SELECT, 3, 1064}, + {49195, R_036908_SX_PERFCOUNTER2_SELECT, 3, 1064}, + {49218, R_03690C_SX_PERFCOUNTER3_SELECT, 3, 1064}, + {49241, R_036910_SX_PERFCOUNTER0_SELECT1, 2, 1067}, + {49265, R_036914_SX_PERFCOUNTER1_SELECT1}, + {49289, R_036A00_GDS_PERFCOUNTER0_SELECT, 3, 1069}, + {49313, R_036A04_GDS_PERFCOUNTER1_SELECT, 3, 1069}, + {49337, R_036A08_GDS_PERFCOUNTER2_SELECT, 3, 1069}, + {49361, R_036A0C_GDS_PERFCOUNTER3_SELECT, 3, 1069}, + {49385, R_036A10_GDS_PERFCOUNTER0_SELECT1, 2, 1072}, + {49410, R_036B00_TA_PERFCOUNTER0_SELECT, 5, 1074}, + {49433, R_036B04_TA_PERFCOUNTER0_SELECT1, 4, 1079}, + {49457, R_036B08_TA_PERFCOUNTER1_SELECT, 5, 1074}, + {49480, R_036C00_TD_PERFCOUNTER0_SELECT, 5, 1083}, + {49503, R_036C04_TD_PERFCOUNTER0_SELECT1, 4, 1088}, + {49527, R_036C08_TD_PERFCOUNTER1_SELECT, 5, 1083}, + {49550, R_036D00_TCP_PERFCOUNTER0_SELECT, 5, 1092}, + {49574, R_036D04_TCP_PERFCOUNTER0_SELECT1, 4, 1097}, + {49599, R_036D08_TCP_PERFCOUNTER1_SELECT, 5, 1092}, + {49623, R_036D0C_TCP_PERFCOUNTER1_SELECT1}, + {49648, R_036D10_TCP_PERFCOUNTER2_SELECT, 5, 1092}, + {49672, R_036D14_TCP_PERFCOUNTER3_SELECT, 5, 1092}, + {49696, R_036E00_TCC_PERFCOUNTER0_SELECT, 5, 1101}, + {49720, R_036E04_TCC_PERFCOUNTER0_SELECT1, 4, 1106}, + {49745, R_036E08_TCC_PERFCOUNTER1_SELECT, 5, 1101}, + {49769, R_036E0C_TCC_PERFCOUNTER1_SELECT1}, + {49794, R_036E10_TCC_PERFCOUNTER2_SELECT, 5, 1101}, + {49818, R_036E14_TCC_PERFCOUNTER3_SELECT, 5, 1101}, + {49842, R_036E40_TCA_PERFCOUNTER0_SELECT, 5, 1110}, + {49866, R_036E44_TCA_PERFCOUNTER0_SELECT1, 4, 1115}, + {49891, R_036E48_TCA_PERFCOUNTER1_SELECT, 5, 1110}, + {49915, R_036E4C_TCA_PERFCOUNTER1_SELECT1}, + {49940, R_036E50_TCA_PERFCOUNTER2_SELECT, 5, 1110}, + {49964, R_036E54_TCA_PERFCOUNTER3_SELECT, 5, 1110}, + {49988, R_037000_CB_PERFCOUNTER_FILTER, 12, 1119}, + {50010, R_037004_CB_PERFCOUNTER0_SELECT, 5, 1131}, + {50033, R_037008_CB_PERFCOUNTER0_SELECT1, 4, 1136}, + {50057, R_03700C_CB_PERFCOUNTER1_SELECT, 5, 1131}, + {50080, R_037010_CB_PERFCOUNTER2_SELECT, 5, 1131}, + {50103, R_037014_CB_PERFCOUNTER3_SELECT, 5, 1131}, + {50126, R_037100_DB_PERFCOUNTER0_SELECT, 5, 1140}, + {50149, R_037104_DB_PERFCOUNTER0_SELECT1, 4, 1145}, + {50173, R_037108_DB_PERFCOUNTER1_SELECT, 5, 1140}, + {50196, R_03710C_DB_PERFCOUNTER1_SELECT1}, + {50220, R_037110_DB_PERFCOUNTER2_SELECT, 5, 1140}, + {50243, R_037118_DB_PERFCOUNTER3_SELECT, 5, 1140}, + {50266, R_028000_DB_RENDER_CONTROL, 10, 1149}, + {50284, R_028004_DB_COUNT_CONTROL, 9, 1159}, + {50301, R_028008_DB_DEPTH_VIEW, 4, 1168}, + {50315, R_02800C_DB_RENDER_OVERRIDE, 23, 1172}, + {50334, R_028010_DB_RENDER_OVERRIDE2, 15, 1195}, + {50354, R_028014_DB_HTILE_DATA_BASE}, + {50373, R_028020_DB_DEPTH_BOUNDS_MIN}, + {50393, R_028024_DB_DEPTH_BOUNDS_MAX}, + {50413, R_028028_DB_STENCIL_CLEAR, 1, 1210}, + {50430, R_02802C_DB_DEPTH_CLEAR}, + {50445, R_028030_PA_SC_SCREEN_SCISSOR_TL, 2, 1211}, + {50469, R_028034_PA_SC_SCREEN_SCISSOR_BR, 2, 1213}, + {50493, R_02803C_DB_DEPTH_INFO, 7, 1215}, + {50507, R_028040_DB_Z_INFO, 10, 1222}, + {50517, R_028044_DB_STENCIL_INFO, 6, 1232}, + {50533, R_028048_DB_Z_READ_BASE}, + {50548, R_02804C_DB_STENCIL_READ_BASE}, + {50569, R_028050_DB_Z_WRITE_BASE}, + {50585, R_028054_DB_STENCIL_WRITE_BASE}, + {50607, R_028058_DB_DEPTH_SIZE, 2, 1238}, + {50621, R_02805C_DB_DEPTH_SLICE, 1, 1240}, + {50636, R_028080_TA_BC_BASE_ADDR}, + {50652, R_028084_TA_BC_BASE_ADDR_HI, 1, 1241}, + {50671, R_0281E8_COHER_DEST_BASE_HI_0}, + {50692, R_0281EC_COHER_DEST_BASE_HI_1}, + {50713, R_0281F0_COHER_DEST_BASE_HI_2}, + {50734, R_0281F4_COHER_DEST_BASE_HI_3}, + {50755, R_0281F8_COHER_DEST_BASE_2}, + {50773, R_0281FC_COHER_DEST_BASE_3}, + {50791, R_028200_PA_SC_WINDOW_OFFSET, 2, 1242}, + {50811, R_028204_PA_SC_WINDOW_SCISSOR_TL, 3, 1244}, + {50835, R_028208_PA_SC_WINDOW_SCISSOR_BR, 2, 1247}, + {50859, R_02820C_PA_SC_CLIPRECT_RULE, 1, 1249}, + {50879, R_028210_PA_SC_CLIPRECT_0_TL, 2, 1250}, + {50899, R_028214_PA_SC_CLIPRECT_0_BR, 2, 1252}, + {50919, R_028218_PA_SC_CLIPRECT_1_TL, 2, 1250}, + {50939, R_02821C_PA_SC_CLIPRECT_1_BR, 2, 1252}, + {50959, R_028220_PA_SC_CLIPRECT_2_TL, 2, 1250}, + {50979, R_028224_PA_SC_CLIPRECT_2_BR, 2, 1252}, + {50999, R_028228_PA_SC_CLIPRECT_3_TL, 2, 1250}, + {51019, R_02822C_PA_SC_CLIPRECT_3_BR, 2, 1252}, + {51039, R_028230_PA_SC_EDGERULE, 7, 1254}, + {51054, R_028234_PA_SU_HARDWARE_SCREEN_OFFSET, 2, 1261}, + {51083, R_028238_CB_TARGET_MASK, 8, 1263}, + {51098, R_02823C_CB_SHADER_MASK, 8, 1271}, + {51113, R_028240_PA_SC_GENERIC_SCISSOR_TL, 3, 1279}, + {51138, R_028244_PA_SC_GENERIC_SCISSOR_BR, 2, 1282}, + {51163, R_028248_COHER_DEST_BASE_0}, + {51181, R_02824C_COHER_DEST_BASE_1}, + {51199, R_028250_PA_SC_VPORT_SCISSOR_0_TL, 3, 1284}, + {51224, R_028254_PA_SC_VPORT_SCISSOR_0_BR, 2, 1287}, + {51249, R_028258_PA_SC_VPORT_SCISSOR_1_TL, 3, 1284}, + {51274, R_02825C_PA_SC_VPORT_SCISSOR_1_BR, 2, 1287}, + {51299, R_028260_PA_SC_VPORT_SCISSOR_2_TL, 3, 1284}, + {51324, R_028264_PA_SC_VPORT_SCISSOR_2_BR, 2, 1287}, + {51349, R_028268_PA_SC_VPORT_SCISSOR_3_TL, 3, 1284}, + {51374, R_02826C_PA_SC_VPORT_SCISSOR_3_BR, 2, 1287}, + {51399, R_028270_PA_SC_VPORT_SCISSOR_4_TL, 3, 1284}, + {51424, R_028274_PA_SC_VPORT_SCISSOR_4_BR, 2, 1287}, + {51449, R_028278_PA_SC_VPORT_SCISSOR_5_TL, 3, 1284}, + {51474, R_02827C_PA_SC_VPORT_SCISSOR_5_BR, 2, 1287}, + {51499, R_028280_PA_SC_VPORT_SCISSOR_6_TL, 3, 1284}, + {51524, R_028284_PA_SC_VPORT_SCISSOR_6_BR, 2, 1287}, + {51549, R_028288_PA_SC_VPORT_SCISSOR_7_TL, 3, 1284}, + {51574, R_02828C_PA_SC_VPORT_SCISSOR_7_BR, 2, 1287}, + {51599, R_028290_PA_SC_VPORT_SCISSOR_8_TL, 3, 1284}, + {51624, R_028294_PA_SC_VPORT_SCISSOR_8_BR, 2, 1287}, + {51649, R_028298_PA_SC_VPORT_SCISSOR_9_TL, 3, 1284}, + {51674, R_02829C_PA_SC_VPORT_SCISSOR_9_BR, 2, 1287}, + {51699, R_0282A0_PA_SC_VPORT_SCISSOR_10_TL, 3, 1284}, + {51725, R_0282A4_PA_SC_VPORT_SCISSOR_10_BR, 2, 1287}, + {51751, R_0282A8_PA_SC_VPORT_SCISSOR_11_TL, 3, 1284}, + {51777, R_0282AC_PA_SC_VPORT_SCISSOR_11_BR, 2, 1287}, + {51803, R_0282B0_PA_SC_VPORT_SCISSOR_12_TL, 3, 1284}, + {51829, R_0282B4_PA_SC_VPORT_SCISSOR_12_BR, 2, 1287}, + {51855, R_0282B8_PA_SC_VPORT_SCISSOR_13_TL, 3, 1284}, + {51881, R_0282BC_PA_SC_VPORT_SCISSOR_13_BR, 2, 1287}, + {51907, R_0282C0_PA_SC_VPORT_SCISSOR_14_TL, 3, 1284}, + {51933, R_0282C4_PA_SC_VPORT_SCISSOR_14_BR, 2, 1287}, + {51959, R_0282C8_PA_SC_VPORT_SCISSOR_15_TL, 3, 1284}, + {51985, R_0282CC_PA_SC_VPORT_SCISSOR_15_BR, 2, 1287}, + {52011, R_0282D0_PA_SC_VPORT_ZMIN_0}, + {52030, R_0282D4_PA_SC_VPORT_ZMAX_0}, + {52049, R_0282D8_PA_SC_VPORT_ZMIN_1}, + {52068, R_0282DC_PA_SC_VPORT_ZMAX_1}, + {52087, R_0282E0_PA_SC_VPORT_ZMIN_2}, + {52106, R_0282E4_PA_SC_VPORT_ZMAX_2}, + {52125, R_0282E8_PA_SC_VPORT_ZMIN_3}, + {52144, R_0282EC_PA_SC_VPORT_ZMAX_3}, + {52163, R_0282F0_PA_SC_VPORT_ZMIN_4}, + {52182, R_0282F4_PA_SC_VPORT_ZMAX_4}, + {52201, R_0282F8_PA_SC_VPORT_ZMIN_5}, + {52220, R_0282FC_PA_SC_VPORT_ZMAX_5}, + {52239, R_028300_PA_SC_VPORT_ZMIN_6}, + {52258, R_028304_PA_SC_VPORT_ZMAX_6}, + {52277, R_028308_PA_SC_VPORT_ZMIN_7}, + {52296, R_02830C_PA_SC_VPORT_ZMAX_7}, + {52315, R_028310_PA_SC_VPORT_ZMIN_8}, + {52334, R_028314_PA_SC_VPORT_ZMAX_8}, + {52353, R_028318_PA_SC_VPORT_ZMIN_9}, + {52372, R_02831C_PA_SC_VPORT_ZMAX_9}, + {52391, R_028320_PA_SC_VPORT_ZMIN_10}, + {52411, R_028324_PA_SC_VPORT_ZMAX_10}, + {52431, R_028328_PA_SC_VPORT_ZMIN_11}, + {52451, R_02832C_PA_SC_VPORT_ZMAX_11}, + {52471, R_028330_PA_SC_VPORT_ZMIN_12}, + {52491, R_028334_PA_SC_VPORT_ZMAX_12}, + {52511, R_028338_PA_SC_VPORT_ZMIN_13}, + {52531, R_02833C_PA_SC_VPORT_ZMAX_13}, + {52551, R_028340_PA_SC_VPORT_ZMIN_14}, + {52571, R_028344_PA_SC_VPORT_ZMAX_14}, + {52591, R_028348_PA_SC_VPORT_ZMIN_15}, + {52611, R_02834C_PA_SC_VPORT_ZMAX_15}, + {52631, R_028350_PA_SC_RASTER_CONFIG, 15, 1289}, + {52651, R_028354_PA_SC_RASTER_CONFIG_1, 3, 1304}, + {52673, R_028358_PA_SC_SCREEN_EXTENT_CONTROL, 2, 1307}, + {52701, R_028400_VGT_MAX_VTX_INDX}, + {52718, R_028404_VGT_MIN_VTX_INDX}, + {52735, R_028408_VGT_INDX_OFFSET}, + {52751, R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX}, + {52780, R_028414_CB_BLEND_RED}, + {52793, R_028418_CB_BLEND_GREEN}, + {52808, R_02841C_CB_BLEND_BLUE}, + {52822, R_028420_CB_BLEND_ALPHA}, + {52837, R_028424_CB_DCC_CONTROL, 3, 1309}, + {52852, R_02842C_DB_STENCIL_CONTROL, 6, 1312}, + {52871, R_028430_DB_STENCILREFMASK, 4, 1318}, + {52889, R_028434_DB_STENCILREFMASK_BF, 4, 1322}, + {52910, R_02843C_PA_CL_VPORT_XSCALE}, + {52929, R_028440_PA_CL_VPORT_XOFFSET}, + {52949, R_028444_PA_CL_VPORT_YSCALE}, + {52968, R_028448_PA_CL_VPORT_YOFFSET}, + {52988, R_02844C_PA_CL_VPORT_ZSCALE}, + {53007, R_028450_PA_CL_VPORT_ZOFFSET}, + {53027, R_028454_PA_CL_VPORT_XSCALE_1}, + {53048, R_028458_PA_CL_VPORT_XOFFSET_1}, + {53070, R_02845C_PA_CL_VPORT_YSCALE_1}, + {53091, R_028460_PA_CL_VPORT_YOFFSET_1}, + {53113, R_028464_PA_CL_VPORT_ZSCALE_1}, + {53134, R_028468_PA_CL_VPORT_ZOFFSET_1}, + {53156, R_02846C_PA_CL_VPORT_XSCALE_2}, + {53177, R_028470_PA_CL_VPORT_XOFFSET_2}, + {53199, R_028474_PA_CL_VPORT_YSCALE_2}, + {53220, R_028478_PA_CL_VPORT_YOFFSET_2}, + {53242, R_02847C_PA_CL_VPORT_ZSCALE_2}, + {53263, R_028480_PA_CL_VPORT_ZOFFSET_2}, + {53285, R_028484_PA_CL_VPORT_XSCALE_3}, + {53306, R_028488_PA_CL_VPORT_XOFFSET_3}, + {53328, R_02848C_PA_CL_VPORT_YSCALE_3}, + {53349, R_028490_PA_CL_VPORT_YOFFSET_3}, + {53371, R_028494_PA_CL_VPORT_ZSCALE_3}, + {53392, R_028498_PA_CL_VPORT_ZOFFSET_3}, + {53414, R_02849C_PA_CL_VPORT_XSCALE_4}, + {53435, R_0284A0_PA_CL_VPORT_XOFFSET_4}, + {53457, R_0284A4_PA_CL_VPORT_YSCALE_4}, + {53478, R_0284A8_PA_CL_VPORT_YOFFSET_4}, + {53500, R_0284AC_PA_CL_VPORT_ZSCALE_4}, + {53521, R_0284B0_PA_CL_VPORT_ZOFFSET_4}, + {53543, R_0284B4_PA_CL_VPORT_XSCALE_5}, + {53564, R_0284B8_PA_CL_VPORT_XOFFSET_5}, + {53586, R_0284BC_PA_CL_VPORT_YSCALE_5}, + {53607, R_0284C0_PA_CL_VPORT_YOFFSET_5}, + {53629, R_0284C4_PA_CL_VPORT_ZSCALE_5}, + {53650, R_0284C8_PA_CL_VPORT_ZOFFSET_5}, + {53672, R_0284CC_PA_CL_VPORT_XSCALE_6}, + {53693, R_0284D0_PA_CL_VPORT_XOFFSET_6}, + {53715, R_0284D4_PA_CL_VPORT_YSCALE_6}, + {53736, R_0284D8_PA_CL_VPORT_YOFFSET_6}, + {53758, R_0284DC_PA_CL_VPORT_ZSCALE_6}, + {53779, R_0284E0_PA_CL_VPORT_ZOFFSET_6}, + {53801, R_0284E4_PA_CL_VPORT_XSCALE_7}, + {53822, R_0284E8_PA_CL_VPORT_XOFFSET_7}, + {53844, R_0284EC_PA_CL_VPORT_YSCALE_7}, + {53865, R_0284F0_PA_CL_VPORT_YOFFSET_7}, + {53887, R_0284F4_PA_CL_VPORT_ZSCALE_7}, + {53908, R_0284F8_PA_CL_VPORT_ZOFFSET_7}, + {53930, R_0284FC_PA_CL_VPORT_XSCALE_8}, + {53951, R_028500_PA_CL_VPORT_XOFFSET_8}, + {53973, R_028504_PA_CL_VPORT_YSCALE_8}, + {53994, R_028508_PA_CL_VPORT_YOFFSET_8}, + {54016, R_02850C_PA_CL_VPORT_ZSCALE_8}, + {54037, R_028510_PA_CL_VPORT_ZOFFSET_8}, + {54059, R_028514_PA_CL_VPORT_XSCALE_9}, + {54080, R_028518_PA_CL_VPORT_XOFFSET_9}, + {54102, R_02851C_PA_CL_VPORT_YSCALE_9}, + {54123, R_028520_PA_CL_VPORT_YOFFSET_9}, + {54145, R_028524_PA_CL_VPORT_ZSCALE_9}, + {54166, R_028528_PA_CL_VPORT_ZOFFSET_9}, + {54188, R_02852C_PA_CL_VPORT_XSCALE_10}, + {54210, R_028530_PA_CL_VPORT_XOFFSET_10}, + {54233, R_028534_PA_CL_VPORT_YSCALE_10}, + {54255, R_028538_PA_CL_VPORT_YOFFSET_10}, + {54278, R_02853C_PA_CL_VPORT_ZSCALE_10}, + {54300, R_028540_PA_CL_VPORT_ZOFFSET_10}, + {54323, R_028544_PA_CL_VPORT_XSCALE_11}, + {54345, R_028548_PA_CL_VPORT_XOFFSET_11}, + {54368, R_02854C_PA_CL_VPORT_YSCALE_11}, + {54390, R_028550_PA_CL_VPORT_YOFFSET_11}, + {54413, R_028554_PA_CL_VPORT_ZSCALE_11}, + {54435, R_028558_PA_CL_VPORT_ZOFFSET_11}, + {54458, R_02855C_PA_CL_VPORT_XSCALE_12}, + {54480, R_028560_PA_CL_VPORT_XOFFSET_12}, + {54503, R_028564_PA_CL_VPORT_YSCALE_12}, + {54525, R_028568_PA_CL_VPORT_YOFFSET_12}, + {54548, R_02856C_PA_CL_VPORT_ZSCALE_12}, + {54570, R_028570_PA_CL_VPORT_ZOFFSET_12}, + {54593, R_028574_PA_CL_VPORT_XSCALE_13}, + {54615, R_028578_PA_CL_VPORT_XOFFSET_13}, + {54638, R_02857C_PA_CL_VPORT_YSCALE_13}, + {54660, R_028580_PA_CL_VPORT_YOFFSET_13}, + {54683, R_028584_PA_CL_VPORT_ZSCALE_13}, + {54705, R_028588_PA_CL_VPORT_ZOFFSET_13}, + {54728, R_02858C_PA_CL_VPORT_XSCALE_14}, + {54750, R_028590_PA_CL_VPORT_XOFFSET_14}, + {54773, R_028594_PA_CL_VPORT_YSCALE_14}, + {54795, R_028598_PA_CL_VPORT_YOFFSET_14}, + {54818, R_02859C_PA_CL_VPORT_ZSCALE_14}, + {54840, R_0285A0_PA_CL_VPORT_ZOFFSET_14}, + {54863, R_0285A4_PA_CL_VPORT_XSCALE_15}, + {54885, R_0285A8_PA_CL_VPORT_XOFFSET_15}, + {54908, R_0285AC_PA_CL_VPORT_YSCALE_15}, + {54930, R_0285B0_PA_CL_VPORT_YOFFSET_15}, + {54953, R_0285B4_PA_CL_VPORT_ZSCALE_15}, + {54975, R_0285B8_PA_CL_VPORT_ZOFFSET_15}, + {54998, R_0285BC_PA_CL_UCP_0_X}, + {55012, R_0285C0_PA_CL_UCP_0_Y}, + {55026, R_0285C4_PA_CL_UCP_0_Z}, + {55040, R_0285C8_PA_CL_UCP_0_W}, + {55054, R_0285CC_PA_CL_UCP_1_X}, + {55068, R_0285D0_PA_CL_UCP_1_Y}, + {55082, R_0285D4_PA_CL_UCP_1_Z}, + {55096, R_0285D8_PA_CL_UCP_1_W}, + {55110, R_0285DC_PA_CL_UCP_2_X}, + {55124, R_0285E0_PA_CL_UCP_2_Y}, + {55138, R_0285E4_PA_CL_UCP_2_Z}, + {55152, R_0285E8_PA_CL_UCP_2_W}, + {55166, R_0285EC_PA_CL_UCP_3_X}, + {55180, R_0285F0_PA_CL_UCP_3_Y}, + {55194, R_0285F4_PA_CL_UCP_3_Z}, + {55208, R_0285F8_PA_CL_UCP_3_W}, + {55222, R_0285FC_PA_CL_UCP_4_X}, + {55236, R_028600_PA_CL_UCP_4_Y}, + {55250, R_028604_PA_CL_UCP_4_Z}, + {55264, R_028608_PA_CL_UCP_4_W}, + {55278, R_02860C_PA_CL_UCP_5_X}, + {55292, R_028610_PA_CL_UCP_5_Y}, + {55306, R_028614_PA_CL_UCP_5_Z}, + {55320, R_028618_PA_CL_UCP_5_W}, + {55334, R_028644_SPI_PS_INPUT_CNTL_0, 12, 1326}, + {55354, R_028648_SPI_PS_INPUT_CNTL_1, 12, 1326}, + {55374, R_02864C_SPI_PS_INPUT_CNTL_2, 12, 1326}, + {55394, R_028650_SPI_PS_INPUT_CNTL_3, 12, 1326}, + {55414, R_028654_SPI_PS_INPUT_CNTL_4, 12, 1326}, + {55434, R_028658_SPI_PS_INPUT_CNTL_5, 12, 1326}, + {55454, R_02865C_SPI_PS_INPUT_CNTL_6, 12, 1326}, + {55474, R_028660_SPI_PS_INPUT_CNTL_7, 12, 1326}, + {55494, R_028664_SPI_PS_INPUT_CNTL_8, 12, 1326}, + {55514, R_028668_SPI_PS_INPUT_CNTL_9, 12, 1326}, + {55534, R_02866C_SPI_PS_INPUT_CNTL_10, 12, 1326}, + {55555, R_028670_SPI_PS_INPUT_CNTL_11, 12, 1326}, + {55576, R_028674_SPI_PS_INPUT_CNTL_12, 12, 1326}, + {55597, R_028678_SPI_PS_INPUT_CNTL_13, 12, 1326}, + {55618, R_02867C_SPI_PS_INPUT_CNTL_14, 12, 1326}, + {55639, R_028680_SPI_PS_INPUT_CNTL_15, 12, 1326}, + {55660, R_028684_SPI_PS_INPUT_CNTL_16, 12, 1326}, + {55681, R_028688_SPI_PS_INPUT_CNTL_17, 12, 1326}, + {55702, R_02868C_SPI_PS_INPUT_CNTL_18, 12, 1326}, + {55723, R_028690_SPI_PS_INPUT_CNTL_19, 12, 1326}, + {55744, R_028694_SPI_PS_INPUT_CNTL_20, 12, 1326}, + {55765, R_028698_SPI_PS_INPUT_CNTL_21, 12, 1326}, + {55786, R_02869C_SPI_PS_INPUT_CNTL_22, 12, 1326}, + {55807, R_0286A0_SPI_PS_INPUT_CNTL_23, 12, 1326}, + {55828, R_0286A4_SPI_PS_INPUT_CNTL_24, 12, 1326}, + {55849, R_0286A8_SPI_PS_INPUT_CNTL_25, 12, 1326}, + {55870, R_0286AC_SPI_PS_INPUT_CNTL_26, 12, 1326}, + {55891, R_0286B0_SPI_PS_INPUT_CNTL_27, 12, 1326}, + {55912, R_0286B4_SPI_PS_INPUT_CNTL_28, 12, 1326}, + {55933, R_0286B8_SPI_PS_INPUT_CNTL_29, 12, 1326}, + {55954, R_0286BC_SPI_PS_INPUT_CNTL_30, 12, 1326}, + {55975, R_0286C0_SPI_PS_INPUT_CNTL_31, 12, 1326}, + {55996, R_0286C4_SPI_VS_OUT_CONFIG, 4, 1338}, + {56014, R_0286CC_SPI_PS_INPUT_ENA, 16, 1342}, + {56031, R_0286D0_SPI_PS_INPUT_ADDR, 16, 1358}, + {56049, R_0286D4_SPI_INTERP_CONTROL_0, 7, 1374}, + {56070, R_0286D8_SPI_PS_IN_CONTROL, 5, 1381}, + {56088, R_0286E0_SPI_BARYC_CNTL, 7, 1386}, + {56103, R_0286E8_SPI_TMPRING_SIZE, 2, 1393}, + {56120, R_028704_SPI_WAVE_MGMT_1, 5, 1395}, + {56136, R_028708_SPI_WAVE_MGMT_2, 1, 1400}, + {56152, R_02870C_SPI_SHADER_POS_FORMAT, 4, 1401}, + {56174, R_028710_SPI_SHADER_Z_FORMAT, 1, 1405}, + {56194, R_028714_SPI_SHADER_COL_FORMAT, 8, 1406}, + {56216, R_028754_SX_PS_DOWNCONVERT, 8, 1414}, + {56234, R_028758_SX_BLEND_OPT_EPSILON, 8, 1422}, + {56255, R_02875C_SX_BLEND_OPT_CONTROL, 17, 1430}, + {56276, R_028760_SX_MRT0_BLEND_OPT, 6, 1447}, + {56294, R_028764_SX_MRT1_BLEND_OPT, 6, 1453}, + {56312, R_028768_SX_MRT2_BLEND_OPT, 6, 1459}, + {56330, R_02876C_SX_MRT3_BLEND_OPT, 6, 1465}, + {56348, R_028770_SX_MRT4_BLEND_OPT, 6, 1471}, + {56366, R_028774_SX_MRT5_BLEND_OPT, 6, 1477}, + {56384, R_028778_SX_MRT6_BLEND_OPT, 6, 1483}, + {56402, R_02877C_SX_MRT7_BLEND_OPT, 6, 1489}, + {56420, R_028780_CB_BLEND0_CONTROL, 9, 1495}, + {56438, R_028784_CB_BLEND1_CONTROL, 9, 1495}, + {56456, R_028788_CB_BLEND2_CONTROL, 9, 1495}, + {56474, R_02878C_CB_BLEND3_CONTROL, 9, 1495}, + {56492, R_028790_CB_BLEND4_CONTROL, 9, 1495}, + {56510, R_028794_CB_BLEND5_CONTROL, 9, 1495}, + {56528, R_028798_CB_BLEND6_CONTROL, 9, 1495}, + {56546, R_02879C_CB_BLEND7_CONTROL, 9, 1495}, + {56564, R_0287CC_CS_COPY_STATE, 1, 1504}, + {56578, R_0287D4_PA_CL_POINT_X_RAD}, + {56596, R_0287D8_PA_CL_POINT_Y_RAD}, + {56614, R_0287DC_PA_CL_POINT_SIZE}, + {56631, R_0287E0_PA_CL_POINT_CULL_RAD}, + {56652, R_0287E4_VGT_DMA_BASE_HI, 1, 1505}, + {56668, R_0287E8_VGT_DMA_BASE}, + {56681, R_0287F0_VGT_DRAW_INITIATOR, 4, 1506}, + {56700, R_0287F4_VGT_IMMED_DATA}, + {56715, R_0287F8_VGT_EVENT_ADDRESS_REG, 1, 1510}, + {56737, R_028800_DB_DEPTH_CONTROL, 10, 1511}, + {56754, R_028804_DB_EQAA, 12, 1521}, + {56762, R_028808_CB_COLOR_CONTROL, 4, 1533}, + {56779, R_02880C_DB_SHADER_CONTROL, 13, 1537}, + {56797, R_028810_PA_CL_CLIP_CNTL, 19, 1550}, + {56813, R_028814_PA_SU_SC_MODE_CNTL, 13, 1569}, + {56832, R_028818_PA_CL_VTE_CNTL, 9, 1582}, + {56847, R_02881C_PA_CL_VS_OUT_CNTL, 27, 1591}, + {56865, R_028820_PA_CL_NANINF_CNTL, 16, 1618}, + {56883, R_028824_PA_SU_LINE_STIPPLE_CNTL, 4, 1634}, + {56907, R_028828_PA_SU_LINE_STIPPLE_SCALE}, + {56932, R_02882C_PA_SU_PRIM_FILTER_CNTL, 11, 1638}, + {56955, R_028830_PA_SU_SMALL_PRIM_FILTER_CNTL, 5, 1649}, + {56984, R_028A00_PA_SU_POINT_SIZE, 2, 1654}, + {57001, R_028A04_PA_SU_POINT_MINMAX, 2, 1656}, + {57020, R_028A08_PA_SU_LINE_CNTL, 1, 1658}, + {57036, R_028A0C_PA_SC_LINE_STIPPLE, 4, 1659}, + {57055, R_028A10_VGT_OUTPUT_PATH_CNTL, 1, 1663}, + {57076, R_028A14_VGT_HOS_CNTL, 1, 1664}, + {57089, R_028A18_VGT_HOS_MAX_TESS_LEVEL}, + {57112, R_028A1C_VGT_HOS_MIN_TESS_LEVEL}, + {57135, R_028A20_VGT_HOS_REUSE_DEPTH, 1, 1665}, + {57155, R_028A24_VGT_GROUP_PRIM_TYPE, 4, 1666}, + {57175, R_028A28_VGT_GROUP_FIRST_DECR, 1, 1670}, + {57196, R_028A2C_VGT_GROUP_DECR, 1, 1671}, + {57211, R_028A30_VGT_GROUP_VECT_0_CNTL, 6, 1672}, + {57233, R_028A34_VGT_GROUP_VECT_1_CNTL, 6, 1678}, + {57255, R_028A38_VGT_GROUP_VECT_0_FMT_CNTL, 8, 1684}, + {57281, R_028A3C_VGT_GROUP_VECT_1_FMT_CNTL, 8, 1692}, + {57307, R_028A40_VGT_GS_MODE, 15, 1700}, + {57319, R_028A44_VGT_GS_ONCHIP_CNTL, 2, 1715}, + {57338, R_028A48_PA_SC_MODE_CNTL_0, 4, 1717}, + {57356, R_028A4C_PA_SC_MODE_CNTL_1, 24, 1721}, + {57374, R_028A50_VGT_ENHANCE}, + {57386, R_028A54_VGT_GS_PER_ES, 1, 1745}, + {57400, R_028A58_VGT_ES_PER_GS, 1, 1746}, + {57414, R_028A5C_VGT_GS_PER_VS, 1, 1747}, + {57428, R_028A60_VGT_GSVS_RING_OFFSET_1, 1, 1748}, + {57451, R_028A64_VGT_GSVS_RING_OFFSET_2, 1, 1749}, + {57474, R_028A68_VGT_GSVS_RING_OFFSET_3, 1, 1750}, + {57497, R_028A6C_VGT_GS_OUT_PRIM_TYPE, 5, 1751}, + {57518, R_028A70_IA_ENHANCE}, + {57529, R_028A74_VGT_DMA_SIZE}, + {57542, R_028A78_VGT_DMA_MAX_SIZE}, + {57559, R_028A7C_VGT_DMA_INDEX_TYPE, 9, 1756}, + {57578, R_028A80_WD_ENHANCE}, + {57589, R_028A84_VGT_PRIMITIVEID_EN, 2, 1765}, + {57608, R_028A88_VGT_DMA_NUM_INSTANCES}, + {57630, R_028A8C_VGT_PRIMITIVEID_RESET}, + {57652, R_028A90_VGT_EVENT_INITIATOR, 3, 1767}, + {57672, R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, 1, 1770}, + {57699, R_028AA0_VGT_INSTANCE_STEP_RATE_0}, + {57724, R_028AA4_VGT_INSTANCE_STEP_RATE_1}, + {57749, R_028AA8_IA_MULTI_VGT_PARAM, 7, 1771}, + {57768, R_028AAC_VGT_ESGS_RING_ITEMSIZE, 1, 1778}, + {57791, R_028AB0_VGT_GSVS_RING_ITEMSIZE, 1, 1779}, + {57814, R_028AB4_VGT_REUSE_OFF, 1, 1780}, + {57828, R_028AB8_VGT_VTX_CNT_EN, 1, 1781}, + {57843, R_028ABC_DB_HTILE_SURFACE, 8, 1782}, + {57860, R_028AC0_DB_SRESULTS_COMPARE_STATE0, 4, 1790}, + {57887, R_028AC4_DB_SRESULTS_COMPARE_STATE1, 4, 1794}, + {57914, R_028AC8_DB_PRELOAD_CONTROL, 4, 1798}, + {57933, R_028AD0_VGT_STRMOUT_BUFFER_SIZE_0}, + {57959, R_028AD4_VGT_STRMOUT_VTX_STRIDE_0, 1, 1802}, + {57984, R_028ADC_VGT_STRMOUT_BUFFER_OFFSET_0}, + {58012, R_028AE0_VGT_STRMOUT_BUFFER_SIZE_1}, + {58038, R_028AE4_VGT_STRMOUT_VTX_STRIDE_1, 1, 1803}, + {58063, R_028AEC_VGT_STRMOUT_BUFFER_OFFSET_1}, + {58091, R_028AF0_VGT_STRMOUT_BUFFER_SIZE_2}, + {58117, R_028AF4_VGT_STRMOUT_VTX_STRIDE_2, 1, 1804}, + {58142, R_028AFC_VGT_STRMOUT_BUFFER_OFFSET_2}, + {58170, R_028B00_VGT_STRMOUT_BUFFER_SIZE_3}, + {58196, R_028B04_VGT_STRMOUT_VTX_STRIDE_3, 1, 1805}, + {58221, R_028B0C_VGT_STRMOUT_BUFFER_OFFSET_3}, + {58249, R_028B28_VGT_STRMOUT_DRAW_OPAQUE_OFFSET}, + {58280, R_028B2C_VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE}, + {58323, R_028B30_VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE, 1, 1806}, + {58361, R_028B38_VGT_GS_MAX_VERT_OUT, 1, 1807}, + {58381, R_028B50_VGT_TESS_DISTRIBUTION, 5, 1808}, + {58403, R_028B54_VGT_SHADER_STAGES_EN, 10, 1813}, + {58424, R_028B58_VGT_LS_HS_CONFIG, 3, 1823}, + {58441, R_028B5C_VGT_GS_VERT_ITEMSIZE, 1, 1826}, + {58462, R_028B60_VGT_GS_VERT_ITEMSIZE_1, 1, 1827}, + {58485, R_028B64_VGT_GS_VERT_ITEMSIZE_2, 1, 1828}, + {58508, R_028B68_VGT_GS_VERT_ITEMSIZE_3, 1, 1829}, + {58531, R_028B6C_VGT_TF_PARAM, 11, 1830}, + {58544, R_028B70_DB_ALPHA_TO_MASK, 6, 1841}, + {58561, R_028B74_VGT_DISPATCH_DRAW_INDEX}, + {58585, R_028B78_PA_SU_POLY_OFFSET_DB_FMT_CNTL, 2, 1847}, + {58615, R_028B7C_PA_SU_POLY_OFFSET_CLAMP}, + {58639, R_028B80_PA_SU_POLY_OFFSET_FRONT_SCALE}, + {58669, R_028B84_PA_SU_POLY_OFFSET_FRONT_OFFSET}, + {58700, R_028B88_PA_SU_POLY_OFFSET_BACK_SCALE}, + {58729, R_028B8C_PA_SU_POLY_OFFSET_BACK_OFFSET}, + {58759, R_028B90_VGT_GS_INSTANCE_CNT, 2, 1849}, + {58779, R_028B94_VGT_STRMOUT_CONFIG, 7, 1851}, + {58798, R_028B98_VGT_STRMOUT_BUFFER_CONFIG, 4, 1858}, + {58824, R_028BD4_PA_SC_CENTROID_PRIORITY_0, 8, 1862}, + {58850, R_028BD8_PA_SC_CENTROID_PRIORITY_1, 8, 1870}, + {58876, R_028BDC_PA_SC_LINE_CNTL, 4, 1878}, + {58892, R_028BE0_PA_SC_AA_CONFIG, 5, 1882}, + {58908, R_028BE4_PA_SU_VTX_CNTL, 3, 1887}, + {58923, R_028BE8_PA_CL_GB_VERT_CLIP_ADJ}, + {58946, R_028BEC_PA_CL_GB_VERT_DISC_ADJ}, + {58969, R_028BF0_PA_CL_GB_HORZ_CLIP_ADJ}, + {58992, R_028BF4_PA_CL_GB_HORZ_DISC_ADJ}, + {59015, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 8, 1890}, + {59049, R_028BFC_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1, 8, 1898}, + {59083, R_028C00_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2, 8, 1906}, + {59117, R_028C04_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3, 8, 1914}, + {59151, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, 8, 1922}, + {59185, R_028C0C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1, 8, 1930}, + {59219, R_028C10_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2, 8, 1938}, + {59253, R_028C14_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3, 8, 1946}, + {59287, R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, 8, 1954}, + {59321, R_028C1C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1, 8, 1962}, + {59355, R_028C20_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2, 8, 1970}, + {59389, R_028C24_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3, 8, 1978}, + {59423, R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, 8, 1986}, + {59457, R_028C2C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1, 8, 1994}, + {59491, R_028C30_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2, 8, 2002}, + {59525, R_028C34_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3, 8, 2010}, + {59559, R_028C38_PA_SC_AA_MASK_X0Y0_X1Y0, 2, 2018}, + {59583, R_028C3C_PA_SC_AA_MASK_X0Y1_X1Y1, 2, 2020}, + {59607, R_028C40_PA_SC_SHADER_CONTROL, 1, 2022}, + {59628, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, 1, 2023}, + {59656, R_028C5C_VGT_OUT_DEALLOC_CNTL, 1, 2024}, + {59677, R_028C60_CB_COLOR0_BASE}, + {59692, R_028C64_CB_COLOR0_PITCH, 2, 2025}, + {59708, R_028C68_CB_COLOR0_SLICE, 1, 2027}, + {59724, R_028C6C_CB_COLOR0_VIEW, 2, 2028}, + {59739, R_028C70_CB_COLOR0_INFO, 18, 2030}, + {59754, R_028C74_CB_COLOR0_ATTRIB, 6, 2048}, + {59771, R_028C78_CB_COLOR0_DCC_CONTROL, 9, 2054}, + {59793, R_028C7C_CB_COLOR0_CMASK}, + {59809, R_028C80_CB_COLOR0_CMASK_SLICE, 1, 2063}, + {59831, R_028C84_CB_COLOR0_FMASK}, + {59847, R_028C88_CB_COLOR0_FMASK_SLICE, 1, 2064}, + {59869, R_028C8C_CB_COLOR0_CLEAR_WORD0}, + {59891, R_028C90_CB_COLOR0_CLEAR_WORD1}, + {59913, R_028C94_CB_COLOR0_DCC_BASE}, + {59932, R_028C9C_CB_COLOR1_BASE}, + {59947, R_028CA0_CB_COLOR1_PITCH, 2, 2025}, + {59963, R_028CA4_CB_COLOR1_SLICE, 1, 2027}, + {59979, R_028CA8_CB_COLOR1_VIEW, 2, 2028}, + {59994, R_028CAC_CB_COLOR1_INFO, 18, 2030}, + {60009, R_028CB0_CB_COLOR1_ATTRIB, 6, 2048}, + {60026, R_028CB4_CB_COLOR1_DCC_CONTROL, 9, 2054}, + {60048, R_028CB8_CB_COLOR1_CMASK}, + {60064, R_028CBC_CB_COLOR1_CMASK_SLICE, 1, 2063}, + {60086, R_028CC0_CB_COLOR1_FMASK}, + {60102, R_028CC4_CB_COLOR1_FMASK_SLICE, 1, 2064}, + {60124, R_028CC8_CB_COLOR1_CLEAR_WORD0}, + {60146, R_028CCC_CB_COLOR1_CLEAR_WORD1}, + {60168, R_028CD0_CB_COLOR1_DCC_BASE}, + {60187, R_028CD8_CB_COLOR2_BASE}, + {60202, R_028CDC_CB_COLOR2_PITCH, 2, 2025}, + {60218, R_028CE0_CB_COLOR2_SLICE, 1, 2027}, + {60234, R_028CE4_CB_COLOR2_VIEW, 2, 2028}, + {60249, R_028CE8_CB_COLOR2_INFO, 18, 2030}, + {60264, R_028CEC_CB_COLOR2_ATTRIB, 6, 2048}, + {60281, R_028CF0_CB_COLOR2_DCC_CONTROL, 9, 2054}, + {60303, R_028CF4_CB_COLOR2_CMASK}, + {60319, R_028CF8_CB_COLOR2_CMASK_SLICE, 1, 2063}, + {60341, R_028CFC_CB_COLOR2_FMASK}, + {60357, R_028D00_CB_COLOR2_FMASK_SLICE, 1, 2064}, + {60379, R_028D04_CB_COLOR2_CLEAR_WORD0}, + {60401, R_028D08_CB_COLOR2_CLEAR_WORD1}, + {60423, R_028D0C_CB_COLOR2_DCC_BASE}, + {60442, R_028D14_CB_COLOR3_BASE}, + {60457, R_028D18_CB_COLOR3_PITCH, 2, 2025}, + {60473, R_028D1C_CB_COLOR3_SLICE, 1, 2027}, + {60489, R_028D20_CB_COLOR3_VIEW, 2, 2028}, + {60504, R_028D24_CB_COLOR3_INFO, 18, 2030}, + {60519, R_028D28_CB_COLOR3_ATTRIB, 6, 2048}, + {60536, R_028D2C_CB_COLOR3_DCC_CONTROL, 9, 2054}, + {60558, R_028D30_CB_COLOR3_CMASK}, + {60574, R_028D34_CB_COLOR3_CMASK_SLICE, 1, 2063}, + {60596, R_028D38_CB_COLOR3_FMASK}, + {60612, R_028D3C_CB_COLOR3_FMASK_SLICE, 1, 2064}, + {60634, R_028D40_CB_COLOR3_CLEAR_WORD0}, + {60656, R_028D44_CB_COLOR3_CLEAR_WORD1}, + {60678, R_028D48_CB_COLOR3_DCC_BASE}, + {60697, R_028D50_CB_COLOR4_BASE}, + {60712, R_028D54_CB_COLOR4_PITCH, 2, 2025}, + {60728, R_028D58_CB_COLOR4_SLICE, 1, 2027}, + {60744, R_028D5C_CB_COLOR4_VIEW, 2, 2028}, + {60759, R_028D60_CB_COLOR4_INFO, 18, 2030}, + {60774, R_028D64_CB_COLOR4_ATTRIB, 6, 2048}, + {60791, R_028D68_CB_COLOR4_DCC_CONTROL, 9, 2054}, + {60813, R_028D6C_CB_COLOR4_CMASK}, + {60829, R_028D70_CB_COLOR4_CMASK_SLICE, 1, 2063}, + {60851, R_028D74_CB_COLOR4_FMASK}, + {60867, R_028D78_CB_COLOR4_FMASK_SLICE, 1, 2064}, + {60889, R_028D7C_CB_COLOR4_CLEAR_WORD0}, + {60911, R_028D80_CB_COLOR4_CLEAR_WORD1}, + {60933, R_028D84_CB_COLOR4_DCC_BASE}, + {60952, R_028D8C_CB_COLOR5_BASE}, + {60967, R_028D90_CB_COLOR5_PITCH, 2, 2025}, + {60983, R_028D94_CB_COLOR5_SLICE, 1, 2027}, + {60999, R_028D98_CB_COLOR5_VIEW, 2, 2028}, + {61014, R_028D9C_CB_COLOR5_INFO, 18, 2030}, + {61029, R_028DA0_CB_COLOR5_ATTRIB, 6, 2048}, + {61046, R_028DA4_CB_COLOR5_DCC_CONTROL, 9, 2054}, + {61068, R_028DA8_CB_COLOR5_CMASK}, + {61084, R_028DAC_CB_COLOR5_CMASK_SLICE, 1, 2063}, + {61106, R_028DB0_CB_COLOR5_FMASK}, + {61122, R_028DB4_CB_COLOR5_FMASK_SLICE, 1, 2064}, + {61144, R_028DB8_CB_COLOR5_CLEAR_WORD0}, + {61166, R_028DBC_CB_COLOR5_CLEAR_WORD1}, + {61188, R_028DC0_CB_COLOR5_DCC_BASE}, + {61207, R_028DC8_CB_COLOR6_BASE}, + {61222, R_028DCC_CB_COLOR6_PITCH, 2, 2025}, + {61238, R_028DD0_CB_COLOR6_SLICE, 1, 2027}, + {61254, R_028DD4_CB_COLOR6_VIEW, 2, 2028}, + {61269, R_028DD8_CB_COLOR6_INFO, 18, 2030}, + {61284, R_028DDC_CB_COLOR6_ATTRIB, 6, 2048}, + {61301, R_028DE0_CB_COLOR6_DCC_CONTROL, 9, 2054}, + {61323, R_028DE4_CB_COLOR6_CMASK}, + {61339, R_028DE8_CB_COLOR6_CMASK_SLICE, 1, 2063}, + {61361, R_028DEC_CB_COLOR6_FMASK}, + {61377, R_028DF0_CB_COLOR6_FMASK_SLICE, 1, 2064}, + {61399, R_028DF4_CB_COLOR6_CLEAR_WORD0}, + {61421, R_028DF8_CB_COLOR6_CLEAR_WORD1}, + {61443, R_028DFC_CB_COLOR6_DCC_BASE}, + {61462, R_028E04_CB_COLOR7_BASE}, + {61477, R_028E08_CB_COLOR7_PITCH, 2, 2025}, + {61493, R_028E0C_CB_COLOR7_SLICE, 1, 2027}, + {61509, R_028E10_CB_COLOR7_VIEW, 2, 2028}, + {61524, R_028E14_CB_COLOR7_INFO, 18, 2030}, + {61539, R_028E18_CB_COLOR7_ATTRIB, 6, 2048}, + {61556, R_028E1C_CB_COLOR7_DCC_CONTROL, 9, 2054}, + {61578, R_028E20_CB_COLOR7_CMASK}, + {61594, R_028E24_CB_COLOR7_CMASK_SLICE, 1, 2063}, + {61616, R_028E28_CB_COLOR7_FMASK}, + {61632, R_028E2C_CB_COLOR7_FMASK_SLICE, 1, 2064}, + {61654, R_028E30_CB_COLOR7_CLEAR_WORD0}, + {61676, R_028E34_CB_COLOR7_CLEAR_WORD1}, + {61698, R_028E38_CB_COLOR7_DCC_BASE}, +}; + +static const char sid_strings[] = + "NOP\0" /* 0 */ + "SET_BASE\0" /* 4 */ + "CLEAR_STATE\0" /* 13 */ + "INDEX_BUFFER_SIZE\0" /* 25, 38 */ + "DISPATCH_DIRECT\0" /* 43 */ + "DISPATCH_INDIRECT\0" /* 59 */ + "OCCLUSION_QUERY\0" /* 91, 77 */ + "SET_PREDICATION\0" /* 93 */ + "COND_EXEC\0" /* 109 */ + "PRED_EXEC\0" /* 119 */ + "DRAW_INDIRECT\0" /* 129 */ + "DRAW_INDEX_INDIRECT\0" /* 143 */ + "INDEX_BASE\0" /* 163 */ + "DRAW_INDEX_2\0" /* 174 */ + "CONTEXT_CONTROL\0" /* 187, 195 */ + "INDEX_TYPE\0" /* 209, 203 */ + "DRAW_INDIRECT_MULTI\0" /* 214 */ + "DRAW_INDEX_AUTO\0" /* 234 */ + "DRAW_INDEX_IMMD\0" /* 250 */ + "NUM_INSTANCES\0" /* 266 */ + "DRAW_INDEX_MULTI_AUTO\0" /* 280 */ + "INDIRECT_BUFFER_SI\0" /* 302 */ + "INDIRECT_BUFFER_CONST\0" /* 321 */ + "STRMOUT_BUFFER_UPDATE\0" /* 343 */ + "DRAW_INDEX_OFFSET_2\0" /* 365 */ + "WRITE_DATA\0" /* 385, 391 */ + "DRAW_INDEX_INDIRECT_MULTI\0" /* 396 */ + "MEM_SEMAPHORE\0" /* 422 */ + "MPEG_INDEX\0" /* 436, 445 */ + "WAIT_REG_MEM\0" /* 447 */ + "MEM_WRITE\0" /* 460 */ + "INDIRECT_BUFFER_CIK\0" /* 470 */ + "COPY_DATA\0" /* 490 */ + "PFP_SYNC_ME\0" /* 500, 509 */ + "SURFACE_SYNC\0" /* 512 */ + "ME_INITIALIZE\0" /* 525 */ + "COND_WRITE\0" /* 539 */ + "EVENT_WRITE\0" /* 550 */ + "EVENT_WRITE_EOP\0" /* 562 */ + "RELEASE_MEM\0" /* 578 */ + "ONE_REG_WRITE\0" /* 590 */ + "ACQUIRE_MEM\0" /* 604 */ + "SET_CONFIG_REG\0" /* 616 */ + "SET_CONTEXT_REG\0" /* 631 */ + "SET_SH_REG\0" /* 647 */ + "SET_SH_REG_OFFSET\0" /* 658, 669 */ + "SET_UCONFIG_REG\0" /* 676 */ + "LOAD_CONST_RAM\0" /* 692 */ + "WRITE_CONST_RAM\0" /* 707 */ + "DUMP_CONST_RAM\0" /* 723 */ + "INCREMENT_CE_COUNTER\0" /* 738 */ + "INCREMENT_DE_COUNTER\0" /* 759 */ + "WAIT_ON_CE_COUNTER\0" /* 780 */ + "IT_OPCODE_C\0" /* 799 */ + "CP_DMA\0" /* 811 */ + "DMA_DATA\0" /* 818 */ + "COUNT_INDIRECT_ENABLE\0" /* 842, 827 */ + "DRAW_INDEX_ENABLE\0" /* 849 */ + "PFP\0" /* 867 */ + "CE\0" /* 871 */ + "DE\0" /* 874 */ + "ENGINE_SEL\0" /* 877 */ + "WR_CONFIRM\0" /* 888 */ + "WR_ONE_ADDR\0" /* 906, 899 */ + "MEM_MAPPED_REGISTER\0" /* 922, 911 */ + "MEMORY_SYNC\0" /* 931 */ + "TC_L2\0" /* 943 */ + "GDS\0" /* 949 */ + "RESERVED\0" /* 953 */ + "MEM_ASYNC\0" /* 962 */ + "DST_SEL\0" /* 972 */ + "IB_SIZE\0" /* 980 */ + "CHAIN\0" /* 988 */ + "VALID\0" /* 994 */ + "SRC_ADDR_LO\0" /* 1000 */ + "CP_SYNC\0" /* 1012 */ + "SRC_ADDR\0" /* 1020 */ + "SRC_ADDR_TC_L2\0" /* 1029 */ + "SRC_SEL\0" /* 1044 */ + "ENGINE\0" /* 1052 */ + "DST_ADDR\0" /* 1059 */ + "DST_ADDR_TC_L2\0" /* 1068 */ + "DSL_SEL\0" /* 1083 */ + "SRC_ADDR_HI\0" /* 1091 */ + "DST_ADDR_LO\0" /* 1103 */ + "DST_ADDR_HI\0" /* 1115 */ + "BYTE_COUNT\0" /* 1127 */ + "DISABLE_WR_CONFIRM\0" /* 1138 */ + "NONE\0" /* 1157 */ + "8_IN_16\0" /* 1162 */ + "8_IN_32\0" /* 1170 */ + "8_IN_64\0" /* 1178 */ + "SRC_SWAP\0" /* 1186 */ + "DST_SWAP\0" /* 1195 */ + "MEMORY\0" /* 1204 */ + "SAS\0" /* 1211 */ + "DAS\0" /* 1215 */ + "INCREMENT\0" /* 1219 */ + "NO_INCREMENT\0" /* 1229 */ + "SAIC\0" /* 1242 */ + "DAIC\0" /* 1247 */ + "RAW_WAIT\0" /* 1252 */ + "SDMA_RQ_PENDING\0" /* 1261 */ + "TST_RQ_PENDING\0" /* 1277 */ + "SDMA1_RQ_PENDING\0" /* 1292 */ + "VCE0_RQ_PENDING\0" /* 1309 */ + "VP8_BUSY\0" /* 1325 */ + "SDMA_BUSY\0" /* 1334, 1335 */ + "SDMA1_BUSY\0" /* 1344 */ + "VCE0_BUSY\0" /* 1355 */ + "XDMA_BUSY\0" /* 1365 */ + "CHUB_BUSY\0" /* 1375 */ + "SDMA2_BUSY\0" /* 1385 */ + "SDMA3_BUSY\0" /* 1396 */ + "SAMSCP_BUSY\0" /* 1411, 1407 */ + "ISP_BUSY\0" /* 1419 */ + "VCE1_BUSY\0" /* 1428 */ + "ODE_BUSY\0" /* 1438 */ + "SDMA2_RQ_PENDING\0" /* 1447 */ + "SDMA3_RQ_PENDING\0" /* 1464 */ + "SAMSCP_RQ_PENDING\0" /* 1481 */ + "ISP_RQ_PENDING\0" /* 1499 */ + "VCE1_RQ_PENDING\0" /* 1514 */ + "UVD_RQ_PENDING\0" /* 1530 */ + "SAMMSP_RQ_PENDING\0" /* 1545 */ + "ACP_RQ_PENDING\0" /* 1563 */ + "SMU_RQ_PENDING\0" /* 1578 */ + "GRBM_RQ_PENDING\0" /* 1593 */ + "HI_RQ_PENDING\0" /* 1609 */ + "VMC_BUSY\0" /* 1623 */ + "MCB_BUSY\0" /* 1632, 1633 */ + "MCB_NON_DISPLAY_BUSY\0" /* 1641 */ + "MCC_BUSY\0" /* 1662 */ + "MCD_BUSY\0" /* 1671 */ + "VMC1_BUSY\0" /* 1680 */ + "SEM_BUSY\0" /* 1690 */ + "ACP_BUSY\0" /* 1699 */ + "IH_BUSY\0" /* 1708 */ + "UVD_BUSY\0" /* 1716 */ + "SAMMSP_BUSY\0" /* 1725 */ + "GCATCL2_BUSY\0" /* 1737 */ + "OSATCL2_BUSY\0" /* 1750 */ + "BIF_BUSY\0" /* 1763 */ + "MCC0_BUSY\0" /* 1772 */ + "MCC1_BUSY\0" /* 1782 */ + "MCC2_BUSY\0" /* 1792 */ + "MCC3_BUSY\0" /* 1802 */ + "MCC4_BUSY\0" /* 1812 */ + "MCC5_BUSY\0" /* 1822 */ + "MCC6_BUSY\0" /* 1832 */ + "MCC7_BUSY\0" /* 1842 */ + "MCD0_BUSY\0" /* 1852 */ + "MCD1_BUSY\0" /* 1862 */ + "MCD2_BUSY\0" /* 1872 */ + "MCD3_BUSY\0" /* 1882 */ + "MCD4_BUSY\0" /* 1892 */ + "MCD5_BUSY\0" /* 1902 */ + "MCD6_BUSY\0" /* 1912 */ + "MCD7_BUSY\0" /* 1922 */ + "IDLE\0" /* 1932 */ + "REG_IDLE\0" /* 1937 */ + "RB_EMPTY\0" /* 1946 */ + "RB_FULL\0" /* 1955 */ + "RB_CMD_IDLE\0" /* 1963 */ + "RB_CMD_FULL\0" /* 1975 */ + "IB_CMD_IDLE\0" /* 1987 */ + "IB_CMD_FULL\0" /* 1999 */ + "BLOCK_IDLE\0" /* 2011 */ + "INSIDE_IB\0" /* 2022 */ + "EX_IDLE\0" /* 2032 */ + "EX_IDLE_POLL_TIMER_EXPIRE\0" /* 2040 */ + "PACKET_READY\0" /* 2066 */ + "MC_WR_IDLE\0" /* 2079 */ + "SRBM_IDLE\0" /* 2090 */ + "CONTEXT_EMPTY\0" /* 2100 */ + "DELTA_RPTR_FULL\0" /* 2114 */ + "RB_MC_RREQ_IDLE\0" /* 2130 */ + "IB_MC_RREQ_IDLE\0" /* 2146 */ + "MC_RD_IDLE\0" /* 2162 */ + "DELTA_RPTR_EMPTY\0" /* 2173 */ + "MC_RD_RET_STALL\0" /* 2190 */ + "MC_RD_NO_POLL_IDLE\0" /* 2206 */ + "PREV_CMD_IDLE\0" /* 2225 */ + "SEM_IDLE\0" /* 2239 */ + "SEM_REQ_STALL\0" /* 2248 */ + "SEM_RESP_STATE\0" /* 2262 */ + "INT_IDLE\0" /* 2277 */ + "INT_REQ_STALL\0" /* 2286 */ + "ME0PIPE1_CMDFIFO_AVAIL\0" /* 2300 */ + "ME0PIPE1_CF_RQ_PENDING\0" /* 2323 */ + "ME0PIPE1_PF_RQ_PENDING\0" /* 2346 */ + "ME1PIPE0_RQ_PENDING\0" /* 2369 */ + "ME1PIPE1_RQ_PENDING\0" /* 2389 */ + "ME1PIPE2_RQ_PENDING\0" /* 2409 */ + "ME1PIPE3_RQ_PENDING\0" /* 2429 */ + "ME2PIPE0_RQ_PENDING\0" /* 2449 */ + "ME2PIPE1_RQ_PENDING\0" /* 2469 */ + "ME2PIPE2_RQ_PENDING\0" /* 2489 */ + "ME2PIPE3_RQ_PENDING\0" /* 2509 */ + "RLC_RQ_PENDING\0" /* 2529 */ + "RLC_BUSY\0" /* 2544 */ + "TC_BUSY\0" /* 2553 */ + "TCC_CC_RESIDENT\0" /* 2561 */ + "CPF_BUSY\0" /* 2577 */ + "CPC_BUSY\0" /* 2586 */ + "CPG_BUSY\0" /* 2595 */ + "ME0PIPE0_CMDFIFO_AVAIL\0" /* 2604 */ + "SRBM_RQ_PENDING\0" /* 2627 */ + "ME0PIPE0_CF_RQ_PENDING\0" /* 2643 */ + "ME0PIPE0_PF_RQ_PENDING\0" /* 2666 */ + "GDS_DMA_RQ_PENDING\0" /* 2689 */ + "DB_CLEAN\0" /* 2708 */ + "CB_CLEAN\0" /* 2717 */ + "TA_BUSY\0" /* 2726 */ + "GDS_BUSY\0" /* 2734 */ + "WD_BUSY_NO_DMA\0" /* 2743 */ + "VGT_BUSY\0" /* 2758 */ + "IA_BUSY_NO_DMA\0" /* 2767 */ + "IA_BUSY\0" /* 2782 */ + "SX_BUSY\0" /* 2790 */ + "WD_BUSY\0" /* 2798 */ + "SPI_BUSY\0" /* 2806 */ + "BCI_BUSY\0" /* 2815 */ + "SC_BUSY\0" /* 2824 */ + "PA_BUSY\0" /* 2832 */ + "DB_BUSY\0" /* 2840 */ + "CP_COHERENCY_BUSY\0" /* 2848 */ + "GUI_ACTIVE\0" /* 2866 */ + "OFFSET_UPDATE_DONE\0" /* 2891, 2877 */ + "DEST_BASE_0_ENA\0" /* 2896 */ + "DEST_BASE_1_ENA\0" /* 2912 */ + "CB0_DEST_BASE_ENA\0" /* 2928 */ + "CB1_DEST_BASE_ENA\0" /* 2946 */ + "CB2_DEST_BASE_ENA\0" /* 2964 */ + "CB3_DEST_BASE_ENA\0" /* 2982 */ + "CB4_DEST_BASE_ENA\0" /* 3000 */ + "CB5_DEST_BASE_ENA\0" /* 3018 */ + "CB6_DEST_BASE_ENA\0" /* 3036 */ + "CB7_DEST_BASE_ENA\0" /* 3054 */ + "DB_DEST_BASE_ENA\0" /* 3072 */ + "DEST_BASE_2_ENA\0" /* 3089 */ + "DEST_BASE_3_ENA\0" /* 3105 */ + "TCL1_ACTION_ENA\0" /* 3121 */ + "TC_ACTION_ENA\0" /* 3137 */ + "CB_ACTION_ENA\0" /* 3151 */ + "DB_ACTION_ENA\0" /* 3165 */ + "SH_KCACHE_ACTION_ENA\0" /* 3179 */ + "SH_ICACHE_ACTION_ENA\0" /* 3200 */ + "COHER_BASE_HI_256B\0" /* 3221 */ + "START_DELAY_COUNT\0" /* 3240 */ + "TC_SD_ACTION_ENA\0" /* 3258 */ + "TC_NC_ACTION_ENA\0" /* 3275 */ + "TCL1_VOL_ACTION_ENA\0" /* 3292 */ + "TC_VOL_ACTION_ENA\0" /* 3312 */ + "TC_WB_ACTION_ENA\0" /* 3330 */ + "SH_KCACHE_VOL_ACTION_ENA\0" /* 3347 */ + "SH_KCACHE_WB_ACTION_ENA\0" /* 3372 */ + "SH_SD_ACTION_ENA\0" /* 3396 */ + "MATCHING_GFX_CNTX\0" /* 3413 */ + "MEID\0" /* 3431 */ + "PHASE1_STATUS\0" /* 3443, 3436 */ + "MEC1_BUSY\0" /* 3450 */ + "MEC2_BUSY\0" /* 3460 */ + "DC0_BUSY\0" /* 3470 */ + "DC1_BUSY\0" /* 3479 */ + "RCIU1_BUSY\0" /* 3488 */ + "RCIU2_BUSY\0" /* 3499 */ + "ROQ1_BUSY\0" /* 3510 */ + "ROQ2_BUSY\0" /* 3520 */ + "TCIU_BUSY\0" /* 3530 */ + "SCRATCH_RAM_BUSY\0" /* 3540 */ + "QU_BUSY\0" /* 3557 */ + "ATCL2IU_BUSY\0" /* 3565 */ + "CPG_CPC_BUSY\0" /* 3578 */ + "CPF_CPC_BUSY\0" /* 3591 */ + "MEC1_LOAD_BUSY\0" /* 3604 */ + "MEC1_SEMAPOHRE_BUSY\0" /* 3619 */ + "MEC1_MUTEX_BUSY\0" /* 3639 */ + "MEC1_MESSAGE_BUSY\0" /* 3655 */ + "MEC1_EOP_QUEUE_BUSY\0" /* 3673 */ + "MEC1_IQ_QUEUE_BUSY\0" /* 3693 */ + "MEC1_IB_QUEUE_BUSY\0" /* 3712 */ + "MEC1_TC_BUSY\0" /* 3731 */ + "MEC1_DMA_BUSY\0" /* 3744 */ + "MEC1_PARTIAL_FLUSH_BUSY\0" /* 3758 */ + "MEC1_PIPE0_BUSY\0" /* 3782 */ + "MEC1_PIPE1_BUSY\0" /* 3798 */ + "MEC1_PIPE2_BUSY\0" /* 3814 */ + "MEC1_PIPE3_BUSY\0" /* 3830 */ + "MEC2_LOAD_BUSY\0" /* 3846 */ + "MEC2_SEMAPOHRE_BUSY\0" /* 3861 */ + "MEC2_MUTEX_BUSY\0" /* 3881 */ + "MEC2_MESSAGE_BUSY\0" /* 3897 */ + "MEC2_EOP_QUEUE_BUSY\0" /* 3915 */ + "MEC2_IQ_QUEUE_BUSY\0" /* 3935 */ + "MEC2_IB_QUEUE_BUSY\0" /* 3954 */ + "MEC2_TC_BUSY\0" /* 3973 */ + "MEC2_DMA_BUSY\0" /* 3986 */ + "MEC2_PARTIAL_FLUSH_BUSY\0" /* 4000 */ + "MEC2_PIPE0_BUSY\0" /* 4024 */ + "MEC2_PIPE1_BUSY\0" /* 4040 */ + "MEC2_PIPE2_BUSY\0" /* 4056 */ + "MEC2_PIPE3_BUSY\0" /* 4072 */ + "RCIU_TX_FREE_STALL\0" /* 4088 */ + "RCIU_PRIV_VIOLATION\0" /* 4107 */ + "TCIU_TX_FREE_STALL\0" /* 4127 */ + "MEC1_DECODING_PACKET\0" /* 4146 */ + "MEC1_WAIT_ON_RCIU\0" /* 4167 */ + "MEC1_WAIT_ON_RCIU_READ\0" /* 4185 */ + "MEC1_WAIT_ON_ROQ_DATA\0" /* 4208 */ + "MEC2_DECODING_PACKET\0" /* 4230 */ + "MEC2_WAIT_ON_RCIU\0" /* 4251 */ + "MEC2_WAIT_ON_RCIU_READ\0" /* 4269 */ + "MEC2_WAIT_ON_ROQ_DATA\0" /* 4292 */ + "ATCL2IU_WAITING_ON_FREE\0" /* 4314 */ + "ATCL2IU_WAITING_ON_TAGS\0" /* 4338 */ + "ATCL1_WAITING_ON_TRANS\0" /* 4362 */ + "POST_WPTR_GFX_BUSY\0" /* 4385 */ + "CSF_BUSY\0" /* 4404 */ + "ROQ_ALIGN_BUSY\0" /* 4413 */ + "ROQ_RING_BUSY\0" /* 4428 */ + "ROQ_INDIRECT1_BUSY\0" /* 4442 */ + "ROQ_INDIRECT2_BUSY\0" /* 4461 */ + "ROQ_STATE_BUSY\0" /* 4480 */ + "ROQ_CE_RING_BUSY\0" /* 4495 */ + "ROQ_CE_INDIRECT1_BUSY\0" /* 4512 */ + "ROQ_CE_INDIRECT2_BUSY\0" /* 4534 */ + "SEMAPHORE_BUSY\0" /* 4556 */ + "INTERRUPT_BUSY\0" /* 4571 */ + "HQD_BUSY\0" /* 4586 */ + "PRT_BUSY\0" /* 4595 */ + "CPF_GFX_BUSY\0" /* 4604 */ + "CPF_CMP_BUSY\0" /* 4617 */ + "GRBM_CPF_STAT_BUSY\0" /* 4630 */ + "CPC_CPF_BUSY\0" /* 4649 */ + "REG_BUS_FIFO_BUSY\0" /* 4662 */ + "CSF_RING_BUSY\0" /* 4680 */ + "CSF_INDIRECT1_BUSY\0" /* 4694 */ + "CSF_INDIRECT2_BUSY\0" /* 4713 */ + "CSF_STATE_BUSY\0" /* 4732 */ + "CSF_CE_INDR1_BUSY\0" /* 4747 */ + "CSF_CE_INDR2_BUSY\0" /* 4765 */ + "CSF_ARBITER_BUSY\0" /* 4783 */ + "CSF_INPUT_BUSY\0" /* 4800 */ + "OUTSTANDING_READ_TAGS\0" /* 4815 */ + "HPD_PROCESSING_EOP_BUSY\0" /* 4837 */ + "HQD_DISPATCH_BUSY\0" /* 4861 */ + "HQD_IQ_TIMER_BUSY\0" /* 4879 */ + "HQD_DMA_OFFLOAD_BUSY\0" /* 4897 */ + "HQD_WAIT_SEMAPHORE_BUSY\0" /* 4918 */ + "HQD_SIGNAL_SEMAPHORE_BUSY\0" /* 4942 */ + "HQD_MESSAGE_BUSY\0" /* 4968 */ + "HQD_PQ_FETCHER_BUSY\0" /* 4985 */ + "HQD_IB_FETCHER_BUSY\0" /* 5005 */ + "HQD_IQ_FETCHER_BUSY\0" /* 5025 */ + "HQD_EOP_FETCHER_BUSY\0" /* 5045 */ + "HQD_CONSUMED_RPTR_BUSY\0" /* 5066 */ + "HQD_FETCHER_ARB_BUSY\0" /* 5089 */ + "HQD_ROQ_ALIGN_BUSY\0" /* 5110 */ + "HQD_ROQ_EOP_BUSY\0" /* 5129 */ + "HQD_ROQ_IQ_BUSY\0" /* 5146 */ + "HQD_ROQ_PQ_BUSY\0" /* 5162 */ + "HQD_ROQ_IB_BUSY\0" /* 5178 */ + "HQD_WPTR_POLL_BUSY\0" /* 5194 */ + "HQD_PQ_BUSY\0" /* 5213 */ + "HQD_IB_BUSY\0" /* 5225 */ + "RING_FETCHING_DATA\0" /* 5237 */ + "INDR1_FETCHING_DATA\0" /* 5256 */ + "INDR2_FETCHING_DATA\0" /* 5276 */ + "STATE_FETCHING_DATA\0" /* 5296 */ + "TCIU_WAITING_ON_FREE\0" /* 5316 */ + "TCIU_WAITING_ON_TAGS\0" /* 5337 */ + "COHER_SIZE_HI_256B\0" /* 5358 */ + "PRIM_COUNT\0" /* 5377 */ + "VS_NO_EXTRA_BUFFER\0" /* 5388 */ + "STREAMOUT_FULL_FLUSH\0" /* 5407 */ + "ES_LIMIT\0" /* 5428, 5431 */ + "VERT_REUSE\0" /* 5437 */ + "DI_PT_NONE\0" /* 5448 */ + "DI_PT_POINTLIST\0" /* 5459 */ + "DI_PT_LINELIST\0" /* 5475 */ + "DI_PT_LINESTRIP\0" /* 5490 */ + "DI_PT_TRILIST\0" /* 5506 */ + "DI_PT_TRIFAN\0" /* 5520 */ + "DI_PT_TRISTRIP\0" /* 5533 */ + "DI_PT_UNUSED_0\0" /* 5548 */ + "DI_PT_UNUSED_1\0" /* 5563 */ + "DI_PT_PATCH\0" /* 5578 */ + "DI_PT_LINELIST_ADJ\0" /* 5590 */ + "DI_PT_LINESTRIP_ADJ\0" /* 5609 */ + "DI_PT_TRILIST_ADJ\0" /* 5629 */ + "DI_PT_TRISTRIP_ADJ\0" /* 5647 */ + "DI_PT_UNUSED_3\0" /* 5666 */ + "DI_PT_UNUSED_4\0" /* 5681 */ + "DI_PT_TRI_WITH_WFLAGS\0" /* 5696 */ + "DI_PT_RECTLIST\0" /* 5718 */ + "DI_PT_LINELOOP\0" /* 5733 */ + "DI_PT_QUADLIST\0" /* 5748 */ + "DI_PT_QUADSTRIP\0" /* 5763 */ + "DI_PT_POLYGON\0" /* 5779 */ + "DI_PT_2D_COPY_RECT_LIST_V0\0" /* 5793 */ + "DI_PT_2D_COPY_RECT_LIST_V1\0" /* 5820 */ + "DI_PT_2D_COPY_RECT_LIST_V2\0" /* 5847 */ + "DI_PT_2D_COPY_RECT_LIST_V3\0" /* 5874 */ + "DI_PT_2D_FILL_RECT_LIST\0" /* 5901 */ + "DI_PT_2D_LINE_STRIP\0" /* 5925 */ + "DI_PT_2D_TRI_STRIP\0" /* 5945 */ + "PRIM_TYPE\0" /* 5964 */ + "DI_INDEX_SIZE_16_BIT\0" /* 5974 */ + "DI_INDEX_SIZE_32_BIT\0" /* 5995 */ + "OFFCHIP_BUFFERING\0" /* 6016 */ + "CLIP_VTX_REORDER_ENA\0" /* 6034 */ + "NUM_CLIP_SEQ\0" /* 6055 */ + "CLIPPED_PRIM_SEQ_STALL\0" /* 6068 */ + "VE_NAN_PROC_DISABLE\0" /* 6091 */ + "LINE_STIPPLE_VALUE\0" /* 6111 */ + "CURRENT_PTR\0" /* 6130 */ + "CURRENT_COUNT\0" /* 6142 */ + "CE_TO_CSF_NOT_RDY_TO_RCV\0" /* 6156 */ + "CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV\0" /* 6181 */ + "CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER\0" /* 6219 */ + "CE_TO_RAM_INIT_NOT_RDY\0" /* 6260 */ + "CE_TO_RAM_DUMP_NOT_RDY\0" /* 6283 */ + "CE_TO_RAM_WRITE_NOT_RDY\0" /* 6306 */ + "CE_TO_INC_FIFO_NOT_RDY_TO_RCV\0" /* 6330 */ + "CE_TO_WR_FIFO_NOT_RDY_TO_RCV\0" /* 6360 */ + "CE_WAITING_ON_BUFFER_DATA\0" /* 6389 */ + "CE_WAITING_ON_CE_BUFFER_FLAG\0" /* 6415 */ + "CE_WAITING_ON_DE_COUNTER\0" /* 6444 */ + "CE_WAITING_ON_DE_COUNTER_UNDERFLOW\0" /* 6469 */ + "CE_STALLED_ON_TC_WR_CONFIRM\0" /* 6504 */ + "CE_STALLED_ON_ATOMIC_RTN_DATA\0" /* 6532 */ + "RBIU_TO_DMA_NOT_RDY_TO_RCV\0" /* 6562 */ + "RBIU_TO_SEM_NOT_RDY_TO_RCV\0" /* 6589 */ + "RBIU_TO_MEMWR_NOT_RDY_TO_RCV\0" /* 6616 */ + "ME_HAS_ACTIVE_CE_BUFFER_FLAG\0" /* 6645 */ + "ME_HAS_ACTIVE_DE_BUFFER_FLAG\0" /* 6674 */ + "ME_STALLED_ON_TC_WR_CONFIRM\0" /* 6703 */ + "ME_STALLED_ON_ATOMIC_RTN_DATA\0" /* 6731 */ + "ME_WAITING_ON_TC_READ_DATA\0" /* 6761 */ + "ME_WAITING_ON_REG_READ_DATA\0" /* 6788 */ + "RCIU_WAITING_ON_GDS_FREE\0" /* 6816 */ + "RCIU_WAITING_ON_GRBM_FREE\0" /* 6841 */ + "RCIU_WAITING_ON_VGT_FREE\0" /* 6867 */ + "RCIU_STALLED_ON_ME_READ\0" /* 6892 */ + "RCIU_STALLED_ON_DMA_READ\0" /* 6916 */ + "RCIU_STALLED_ON_APPEND_READ\0" /* 6941 */ + "RCIU_HALTED_BY_REG_VIOLATION\0" /* 6969 */ + "PFP_TO_CSF_NOT_RDY_TO_RCV\0" /* 6998 */ + "PFP_TO_MEQ_NOT_RDY_TO_RCV\0" /* 7024 */ + "PFP_TO_RCIU_NOT_RDY_TO_RCV\0" /* 7050 */ + "PFP_TO_VGT_WRITES_PENDING\0" /* 7077 */ + "PFP_RCIU_READ_PENDING\0" /* 7103 */ + "PFP_WAITING_ON_BUFFER_DATA\0" /* 7125 */ + "ME_WAIT_ON_CE_COUNTER\0" /* 7152 */ + "ME_WAIT_ON_AVAIL_BUFFER\0" /* 7174 */ + "GFX_CNTX_NOT_AVAIL_TO_ME\0" /* 7198 */ + "ME_RCIU_NOT_RDY_TO_RCV\0" /* 7223 */ + "ME_TO_CONST_NOT_RDY_TO_RCV\0" /* 7246 */ + "ME_WAITING_DATA_FROM_PFP\0" /* 7273 */ + "ME_WAITING_ON_PARTIAL_FLUSH\0" /* 7298 */ + "MEQ_TO_ME_NOT_RDY_TO_RCV\0" /* 7326 */ + "STQ_TO_ME_NOT_RDY_TO_RCV\0" /* 7351 */ + "ME_WAITING_DATA_FROM_STQ\0" /* 7376 */ + "PFP_STALLED_ON_TC_WR_CONFIRM\0" /* 7401 */ + "PFP_STALLED_ON_ATOMIC_RTN_DATA\0" /* 7430 */ + "EOPD_FIFO_NEEDS_SC_EOP_DONE\0" /* 7461 */ + "EOPD_FIFO_NEEDS_WR_CONFIRM\0" /* 7489 */ + "STRMO_WR_OF_PRIM_DATA_PENDING\0" /* 7516 */ + "PIPE_STATS_WR_DATA_PENDING\0" /* 7546 */ + "APPEND_RDY_WAIT_ON_CS_DONE\0" /* 7592, 7573 */ + "APPEND_RDY_WAIT_ON_PS_DONE\0" /* 7600, 7619 */ + "APPEND_WAIT_ON_WR_CONFIRM\0" /* 7627 */ + "APPEND_ACTIVE_PARTITION\0" /* 7653 */ + "APPEND_WAITING_TO_SEND_MEMWRITE\0" /* 7677 */ + "SURF_SYNC_NEEDS_IDLE_CNTXS\0" /* 7709 */ + "SURF_SYNC_NEEDS_ALL_CLEAN\0" /* 7736 */ + "DC_BUSY\0" /* 7762 */ + "PFP_BUSY\0" /* 7770 */ + "MEQ_BUSY\0" /* 7779 */ + "ME_BUSY\0" /* 7788 */ + "QUERY_BUSY\0" /* 7796 */ + "SURFACE_SYNC_BUSY\0" /* 7807 */ + "RCIU_BUSY\0" /* 7825 */ + "CPC_CPG_BUSY\0" /* 7835 */ + "CE_BUSY\0" /* 7848 */ + "INSTANCE_INDEX\0" /* 7856 */ + "SH_INDEX\0" /* 7871 */ + "SE_INDEX\0" /* 7880 */ + "SH_BROADCAST_WRITES\0" /* 7889 */ + "INSTANCE_BROADCAST_WRITES\0" /* 7909 */ + "SE_BROADCAST_WRITES\0" /* 7935 */ + "X_8K_DWORDS\0" /* 7955 */ + "X_4K_DWORDS\0" /* 7967 */ + "X_2K_DWORDS\0" /* 7979 */ + "X_1K_DWORDS\0" /* 7991 */ + "OFFCHIP_GRANULARITY\0" /* 8003 */ + "ENABLE_PA_SC_OUT_OF_ORDER\0" /* 8023 */ + "DISABLE_SC_DB_TILE_FIX\0" /* 8049 */ + "DISABLE_AA_MASK_FULL_FIX\0" /* 8072 */ + "ENABLE_1XMSAA_SAMPLE_LOCATIONS\0" /* 8097 */ + "ENABLE_1XMSAA_SAMPLE_LOC_CENTROID\0" /* 8128 */ + "DISABLE_SCISSOR_FIX\0" /* 8162 */ + "DISABLE_PW_BUBBLE_COLLAPSE\0" /* 8182 */ + "SEND_UNLIT_STILES_TO_PACKER\0" /* 8209 */ + "DISABLE_DUALGRAD_PERF_OPTIMIZATION\0" /* 8237 */ + "INST_INVALIDATE\0" /* 8272 */ + "DATA_INVALIDATE\0" /* 8288 */ + "INVALIDATE_VOLATILE\0" /* 8304 */ + "RET\0" /* 8324 */ + "RUI\0" /* 8328 */ + "RNG\0" /* 8332 */ + "EN\0" /* 8336 */ + "SQ_EXP_MRT\0" /* 8339 */ + "SQ_EXP_MRTZ\0" /* 8350 */ + "SQ_EXP_NULL\0" /* 8362 */ + "SQ_EXP_POS\0" /* 8374 */ + "SQ_EXP_PARAM\0" /* 8385 */ + "TGT\0" /* 8398 */ + "COMPR\0" /* 8402 */ + "VM\0" /* 8408 */ + "SQ_ENC_EXP_FIELD\0" /* 8411 */ + "ENCODING\0" /* 8428 */ + "ADDRESS\0" /* 8437 */ + "COUNT_HI\0" /* 8445 */ + "BASE_ADDRESS_HI\0" /* 8459, 8454 */ + "STRIDE\0" /* 8470 */ + "CACHE_SWIZZLE\0" /* 8477 */ + "SWIZZLE_ENABLE\0" /* 8491 */ + "SQ_SEL_0\0" /* 8506 */ + "SQ_SEL_1\0" /* 8515 */ + "SQ_SEL_RESERVED_0\0" /* 8531, 8524 */ + "SQ_SEL_RESERVED_1\0" /* 8549, 8542 */ + "SQ_SEL_X\0" /* 8560 */ + "SQ_SEL_Y\0" /* 8569 */ + "SQ_SEL_Z\0" /* 8578 */ + "SQ_SEL_W\0" /* 8587 */ + "DST_SEL_X\0" /* 8596 */ + "DST_SEL_Y\0" /* 8606 */ + "DST_SEL_Z\0" /* 8616 */ + "DST_SEL_W\0" /* 8626 */ + "BUF_NUM_FORMAT_UNORM\0" /* 8636 */ + "BUF_NUM_FORMAT_SNORM\0" /* 8657 */ + "BUF_NUM_FORMAT_USCALED\0" /* 8678 */ + "BUF_NUM_FORMAT_SSCALED\0" /* 8701 */ + "BUF_NUM_FORMAT_UINT\0" /* 8724 */ + "BUF_NUM_FORMAT_SINT\0" /* 8744 */ + "BUF_NUM_FORMAT_SNORM_OGL\0" /* 8764 */ + "BUF_NUM_FORMAT_FLOAT\0" /* 8789 */ + "NUM_FORMAT\0" /* 8810, 8814 */ + "BUF_DATA_FORMAT_INVALID\0" /* 8821 */ + "BUF_DATA_FORMAT_8\0" /* 8845 */ + "BUF_DATA_FORMAT_16\0" /* 8863 */ + "BUF_DATA_FORMAT_8_8\0" /* 8882 */ + "BUF_DATA_FORMAT_32\0" /* 8902 */ + "BUF_DATA_FORMAT_16_16\0" /* 8921 */ + "BUF_DATA_FORMAT_10_11_11\0" /* 8943 */ + "BUF_DATA_FORMAT_11_11_10\0" /* 8968 */ + "BUF_DATA_FORMAT_10_10_10_2\0" /* 8993 */ + "BUF_DATA_FORMAT_2_10_10_10\0" /* 9020 */ + "BUF_DATA_FORMAT_8_8_8_8\0" /* 9047 */ + "BUF_DATA_FORMAT_32_32\0" /* 9071 */ + "BUF_DATA_FORMAT_16_16_16_16\0" /* 9093 */ + "BUF_DATA_FORMAT_32_32_32\0" /* 9121 */ + "BUF_DATA_FORMAT_32_32_32_32\0" /* 9146 */ + "BUF_DATA_FORMAT_RESERVED_15\0" /* 9174 */ + "DATA_FORMAT\0" /* 9202 */ + "ELEMENT_SIZE\0" /* 9214 */ + "INDEX_STRIDE\0" /* 9227 */ + "ADD_TID_ENABLE\0" /* 9240 */ + "ATC\0" /* 9255 */ + "HASH_ENABLE\0" /* 9259 */ + "HEAP\0" /* 9271 */ + "MTYPE\0" /* 9276 */ + "SQ_RSRC_BUF\0" /* 9282 */ + "SQ_RSRC_BUF_RSVD_1\0" /* 9294 */ + "SQ_RSRC_BUF_RSVD_2\0" /* 9313 */ + "SQ_RSRC_BUF_RSVD_3\0" /* 9332 */ + "MIN_LOD\0" /* 9351 */ + "IMG_DATA_FORMAT_INVALID\0" /* 9359 */ + "IMG_DATA_FORMAT_8\0" /* 9383 */ + "IMG_DATA_FORMAT_16\0" /* 9401 */ + "IMG_DATA_FORMAT_8_8\0" /* 9420 */ + "IMG_DATA_FORMAT_32\0" /* 9440 */ + "IMG_DATA_FORMAT_16_16\0" /* 9459 */ + "IMG_DATA_FORMAT_10_11_11\0" /* 9481 */ + "IMG_DATA_FORMAT_11_11_10\0" /* 9506 */ + "IMG_DATA_FORMAT_10_10_10_2\0" /* 9531 */ + "IMG_DATA_FORMAT_2_10_10_10\0" /* 9558 */ + "IMG_DATA_FORMAT_8_8_8_8\0" /* 9585 */ + "IMG_DATA_FORMAT_32_32\0" /* 9609 */ + "IMG_DATA_FORMAT_16_16_16_16\0" /* 9631 */ + "IMG_DATA_FORMAT_32_32_32\0" /* 9659 */ + "IMG_DATA_FORMAT_32_32_32_32\0" /* 9684 */ + "IMG_DATA_FORMAT_RESERVED_15\0" /* 9712 */ + "IMG_DATA_FORMAT_5_6_5\0" /* 9740 */ + "IMG_DATA_FORMAT_1_5_5_5\0" /* 9762 */ + "IMG_DATA_FORMAT_5_5_5_1\0" /* 9786 */ + "IMG_DATA_FORMAT_4_4_4_4\0" /* 9810 */ + "IMG_DATA_FORMAT_8_24\0" /* 9834 */ + "IMG_DATA_FORMAT_24_8\0" /* 9855 */ + "IMG_DATA_FORMAT_X24_8_32\0" /* 9876 */ + "IMG_DATA_FORMAT_8_AS_8_8_8_8\0" /* 9901 */ + "IMG_DATA_FORMAT_ETC2_RGB\0" /* 9930 */ + "IMG_DATA_FORMAT_ETC2_RGBA\0" /* 9955 */ + "IMG_DATA_FORMAT_ETC2_R\0" /* 9981 */ + "IMG_DATA_FORMAT_ETC2_RG\0" /* 10004 */ + "IMG_DATA_FORMAT_ETC2_RGBA1\0" /* 10028 */ + "IMG_DATA_FORMAT_RESERVED_29\0" /* 10055 */ + "IMG_DATA_FORMAT_RESERVED_30\0" /* 10083 */ + "IMG_DATA_FORMAT_RESERVED_31\0" /* 10111 */ + "IMG_DATA_FORMAT_GB_GR\0" /* 10139 */ + "IMG_DATA_FORMAT_BG_RG\0" /* 10161 */ + "IMG_DATA_FORMAT_5_9_9_9\0" /* 10183 */ + "IMG_DATA_FORMAT_BC1\0" /* 10207 */ + "IMG_DATA_FORMAT_BC2\0" /* 10227 */ + "IMG_DATA_FORMAT_BC3\0" /* 10247 */ + "IMG_DATA_FORMAT_BC4\0" /* 10267 */ + "IMG_DATA_FORMAT_BC5\0" /* 10287 */ + "IMG_DATA_FORMAT_BC6\0" /* 10307 */ + "IMG_DATA_FORMAT_BC7\0" /* 10327 */ + "IMG_DATA_FORMAT_16_AS_16_16_16_16\0" /* 10347 */ + "IMG_DATA_FORMAT_16_AS_32_32_32_32\0" /* 10381 */ + "IMG_DATA_FORMAT_FMASK8_S2_F1\0" /* 10415 */ + "IMG_DATA_FORMAT_FMASK8_S4_F1\0" /* 10444 */ + "IMG_DATA_FORMAT_FMASK8_S8_F1\0" /* 10473 */ + "IMG_DATA_FORMAT_FMASK8_S2_F2\0" /* 10502 */ + "IMG_DATA_FORMAT_FMASK8_S4_F2\0" /* 10531 */ + "IMG_DATA_FORMAT_FMASK8_S4_F4\0" /* 10560 */ + "IMG_DATA_FORMAT_FMASK16_S16_F1\0" /* 10589 */ + "IMG_DATA_FORMAT_FMASK16_S8_F2\0" /* 10620 */ + "IMG_DATA_FORMAT_FMASK32_S16_F2\0" /* 10650 */ + "IMG_DATA_FORMAT_FMASK32_S8_F4\0" /* 10681 */ + "IMG_DATA_FORMAT_FMASK32_S8_F8\0" /* 10711 */ + "IMG_DATA_FORMAT_FMASK64_S16_F4\0" /* 10741 */ + "IMG_DATA_FORMAT_FMASK64_S16_F8\0" /* 10772 */ + "IMG_DATA_FORMAT_4_4\0" /* 10803 */ + "IMG_DATA_FORMAT_6_5_5\0" /* 10823 */ + "IMG_DATA_FORMAT_1\0" /* 10845 */ + "IMG_DATA_FORMAT_1_REVERSED\0" /* 10863 */ + "IMG_DATA_FORMAT_32_AS_8\0" /* 10890 */ + "IMG_DATA_FORMAT_32_AS_8_8\0" /* 10914 */ + "IMG_DATA_FORMAT_32_AS_32_32_32_32\0" /* 10940 */ + "IMG_NUM_FORMAT_UNORM\0" /* 10974 */ + "IMG_NUM_FORMAT_SNORM\0" /* 10995 */ + "IMG_NUM_FORMAT_USCALED\0" /* 11016 */ + "IMG_NUM_FORMAT_SSCALED\0" /* 11039 */ + "IMG_NUM_FORMAT_UINT\0" /* 11062 */ + "IMG_NUM_FORMAT_SINT\0" /* 11082 */ + "IMG_NUM_FORMAT_SNORM_OGL\0" /* 11102 */ + "IMG_NUM_FORMAT_FLOAT\0" /* 11127 */ + "IMG_NUM_FORMAT_RESERVED_8\0" /* 11148 */ + "IMG_NUM_FORMAT_SRGB\0" /* 11174 */ + "IMG_NUM_FORMAT_UBNORM\0" /* 11194 */ + "IMG_NUM_FORMAT_UBNORM_OGL\0" /* 11216 */ + "IMG_NUM_FORMAT_UBINT\0" /* 11242 */ + "IMG_NUM_FORMAT_UBSCALED\0" /* 11263 */ + "IMG_NUM_FORMAT_RESERVED_14\0" /* 11287 */ + "IMG_NUM_FORMAT_RESERVED_15\0" /* 11314 */ + "WIDTH\0" /* 11341 */ + "HEIGHT\0" /* 11347 */ + "PERF_MOD\0" /* 11354 */ + "INTERLACED\0" /* 11363 */ + "BASE_LEVEL\0" /* 11374 */ + "LAST_LEVEL\0" /* 11385 */ + "TILING_INDEX\0" /* 11396 */ + "POW2_PAD\0" /* 11409 */ + "SQ_RSRC_IMG_RSVD_0\0" /* 11418 */ + "SQ_RSRC_IMG_RSVD_1\0" /* 11437 */ + "SQ_RSRC_IMG_RSVD_2\0" /* 11456 */ + "SQ_RSRC_IMG_RSVD_3\0" /* 11475 */ + "SQ_RSRC_IMG_RSVD_4\0" /* 11494 */ + "SQ_RSRC_IMG_RSVD_5\0" /* 11513 */ + "SQ_RSRC_IMG_RSVD_6\0" /* 11532 */ + "SQ_RSRC_IMG_RSVD_7\0" /* 11551 */ + "SQ_RSRC_IMG_1D\0" /* 11570 */ + "SQ_RSRC_IMG_2D\0" /* 11585 */ + "SQ_RSRC_IMG_3D\0" /* 11600 */ + "SQ_RSRC_IMG_CUBE\0" /* 11615 */ + "SQ_RSRC_IMG_1D_ARRAY\0" /* 11632 */ + "SQ_RSRC_IMG_2D_ARRAY\0" /* 11653 */ + "SQ_RSRC_IMG_2D_MSAA\0" /* 11674 */ + "SQ_RSRC_IMG_2D_MSAA_ARRAY\0" /* 11694 */ + "DEPTH\0" /* 11720 */ + "PITCH\0" /* 11726 */ + "BASE_ARRAY\0" /* 11732 */ + "LAST_ARRAY\0" /* 11743 */ + "MIN_LOD_WARN\0" /* 11754 */ + "COUNTER_BANK_ID\0" /* 11767 */ + "LOD_HDW_CNT_EN\0" /* 11783 */ + "COMPRESSION_EN\0" /* 11798 */ + "ALPHA_IS_ON_MSB\0" /* 11813 */ + "COLOR_TRANSFORM\0" /* 11829 */ + "LOST_ALPHA_BITS\0" /* 11845 */ + "LOST_COLOR_BITS\0" /* 11861 */ + "SQ_TEX_WRAP\0" /* 11877 */ + "SQ_TEX_MIRROR\0" /* 11889 */ + "SQ_TEX_CLAMP_LAST_TEXEL\0" /* 11903 */ + "SQ_TEX_MIRROR_ONCE_LAST_TEXEL\0" /* 11927 */ + "SQ_TEX_CLAMP_HALF_BORDER\0" /* 11957 */ + "SQ_TEX_MIRROR_ONCE_HALF_BORDER\0" /* 11982 */ + "SQ_TEX_CLAMP_BORDER\0" /* 12013 */ + "SQ_TEX_MIRROR_ONCE_BORDER\0" /* 12033 */ + "CLAMP_X\0" /* 12059 */ + "CLAMP_Y\0" /* 12067 */ + "CLAMP_Z\0" /* 12075 */ + "MAX_ANISO_RATIO\0" /* 12083 */ + "SQ_TEX_DEPTH_COMPARE_NEVER\0" /* 12099 */ + "SQ_TEX_DEPTH_COMPARE_LESS\0" /* 12126 */ + "SQ_TEX_DEPTH_COMPARE_EQUAL\0" /* 12152 */ + "SQ_TEX_DEPTH_COMPARE_LESSEQUAL\0" /* 12179 */ + "SQ_TEX_DEPTH_COMPARE_GREATER\0" /* 12210 */ + "SQ_TEX_DEPTH_COMPARE_NOTEQUAL\0" /* 12239 */ + "SQ_TEX_DEPTH_COMPARE_GREATEREQUAL\0" /* 12269 */ + "SQ_TEX_DEPTH_COMPARE_ALWAYS\0" /* 12303 */ + "DEPTH_COMPARE_FUNC\0" /* 12331 */ + "FORCE_UNNORMALIZED\0" /* 12350 */ + "ANISO_THRESHOLD\0" /* 12369 */ + "MC_COORD_TRUNC\0" /* 12385 */ + "FORCE_DEGAMMA\0" /* 12400 */ + "ANISO_BIAS\0" /* 12414 */ + "TRUNC_COORD\0" /* 12425 */ + "DISABLE_CUBE_WRAP\0" /* 12437 */ + "FILTER_MODE\0" /* 12462, 12455 */ + "COMPAT_MODE\0" /* 12467 */ + "MAX_LOD\0" /* 12479 */ + "PERF_MIP\0" /* 12487 */ + "PERF_Z\0" /* 12496 */ + "LOD_BIAS\0" /* 12503 */ + "LOD_BIAS_SEC\0" /* 12512 */ + "SQ_TEX_XY_FILTER_POINT\0" /* 12539, 12525 */ + "SQ_TEX_XY_FILTER_BILINEAR\0" /* 12548, 12567 */ + "XY_MAG_FILTER\0" /* 12574 */ + "SQ_TEX_XY_FILTER_ANISO_POINT\0" /* 12588 */ + "SQ_TEX_XY_FILTER_ANISO_BILINEAR\0" /* 12617 */ + "XY_MIN_FILTER\0" /* 12649 */ + "SQ_TEX_Z_FILTER_NONE\0" /* 12663 */ + "SQ_TEX_Z_FILTER_POINT\0" /* 12684 */ + "SQ_TEX_Z_FILTER_LINEAR\0" /* 12706 */ + "Z_FILTER\0" /* 12729 */ + "MIP_FILTER\0" /* 12738 */ + "MIP_POINT_PRECLAMP\0" /* 12749 */ + "DISABLE_LSB_CEIL\0" /* 12768 */ + "FILTER_PREC_FIX\0" /* 12785 */ + "ANISO_OVERRIDE\0" /* 12801 */ + "BORDER_COLOR_PTR\0" /* 12816 */ + "SQ_TEX_BORDER_COLOR_TRANS_BLACK\0" /* 12833 */ + "SQ_TEX_BORDER_COLOR_OPAQUE_BLACK\0" /* 12865 */ + "SQ_TEX_BORDER_COLOR_OPAQUE_WHITE\0" /* 12898 */ + "SQ_TEX_BORDER_COLOR_REGISTER\0" /* 12931 */ + "BORDER_COLOR_TYPE\0" /* 12960 */ + "VS_LOW_THRESHOLD\0" /* 12978 */ + "GS_LOW_THRESHOLD\0" /* 12995 */ + "ES_LOW_THRESHOLD\0" /* 13012 */ + "HS_LOW_THRESHOLD\0" /* 13029 */ + "LS_LOW_THRESHOLD\0" /* 13046 */ + "PS_CU_EN\0" /* 13066, 13063 */ + "VS_CU_EN\0" /* 13072 */ + "GS_CU_EN\0" /* 13081 */ + "ES_CU_EN\0" /* 13090 */ + "LSHS_CU_EN\0" /* 13099 */ + "MAX_WAVE_ID\0" /* 13110 */ + "X_R0\0" /* 13122 */ + "RING_ORDER_TS0\0" /* 13127 */ + "RING_ORDER_TS1\0" /* 13142 */ + "RING_ORDER_TS2\0" /* 13157 */ + "PIPE_ORDER_TS0\0" /* 13172 */ + "PIPE_ORDER_TS1\0" /* 13187 */ + "PIPE_ORDER_TS2\0" /* 13202 */ + "PIPE_ORDER_TS3\0" /* 13217 */ + "TS0_DUR_MULT\0" /* 13232 */ + "TS1_DUR_MULT\0" /* 13245 */ + "TS2_DUR_MULT\0" /* 13258 */ + "TS3_DUR_MULT\0" /* 13271 */ + "TS0_DURATION\0" /* 13284 */ + "TS1_DURATION\0" /* 13297 */ + "TS2_DURATION\0" /* 13310 */ + "GPR_WRITE_PRIORITY\0" /* 13323, 13333 */ + "EXP_PRIORITY_ORDER\0" /* 13342 */ + "ENABLE_SQG_TOP_EVENTS\0" /* 13361 */ + "ENABLE_SQG_BOP_EVENTS\0" /* 13383 */ + "RSRC_MGMT_RESET\0" /* 13405 */ + "X_DELAY_14_CLKS\0" /* 13421 */ + "X_DELAY_16_CLKS\0" /* 13437 */ + "X_DELAY_18_CLKS\0" /* 13453 */ + "X_DELAY_20_CLKS\0" /* 13469 */ + "X_DELAY_22_CLKS\0" /* 13485 */ + "X_DELAY_24_CLKS\0" /* 13501 */ + "X_DELAY_26_CLKS\0" /* 13517 */ + "X_DELAY_28_CLKS\0" /* 13533 */ + "X_DELAY_30_CLKS\0" /* 13549 */ + "X_DELAY_32_CLKS\0" /* 13565 */ + "X_DELAY_34_CLKS\0" /* 13581 */ + "X_DELAY_4_CLKS\0" /* 13597 */ + "X_DELAY_6_CLKS\0" /* 13612 */ + "X_DELAY_8_CLKS\0" /* 13627 */ + "X_DELAY_10_CLKS\0" /* 13642 */ + "X_DELAY_12_CLKS\0" /* 13658 */ + "VTX_DONE_DELAY\0" /* 13674 */ + "INTERP_ONE_PRIM_PER_ROW\0" /* 13689 */ + "PC_LIMIT_ENABLE\0" /* 13713 */ + "PC_LIMIT_STRICT\0" /* 13729 */ + "PC_LIMIT_SIZE\0" /* 13745 */ + "TYPE_A\0" /* 13759 */ + "VGPR_A\0" /* 13766 */ + "SGPR_A\0" /* 13773 */ + "LDS_A\0" /* 13780 */ + "WAVES_A\0" /* 13786 */ + "EN_A\0" /* 13794 */ + "TYPE_B\0" /* 13799 */ + "VGPR_B\0" /* 13806 */ + "SGPR_B\0" /* 13813 */ + "LDS_B\0" /* 13820 */ + "WAVES_B\0" /* 13826 */ + "EN_B\0" /* 13834 */ + "MSAA1_X\0" /* 13839 */ + "MSAA1_Y\0" /* 13847 */ + "MSAA2_X\0" /* 13855 */ + "MSAA2_Y\0" /* 13863 */ + "MSAA4_X\0" /* 13871 */ + "MSAA4_Y\0" /* 13879 */ + "MSAA8_X\0" /* 13887 */ + "MSAA8_Y\0" /* 13895 */ + "MSAA16_X\0" /* 13903 */ + "MSAA16_Y\0" /* 13912 */ + "NUM_PIPES\0" /* 13921 */ + "PIPE_INTERLEAVE_SIZE\0" /* 13931 */ + "BANK_INTERLEAVE_SIZE\0" /* 13952 */ + "NUM_SHADER_ENGINES\0" /* 13973 */ + "SHADER_ENGINE_TILE_SIZE\0" /* 13992 */ + "NUM_GPUS\0" /* 14016 */ + "MULTI_GPU_TILE_SIZE\0" /* 14025 */ + "ROW_SIZE\0" /* 14045 */ + "NUM_LOWER_PIPES\0" /* 14054 */ + "ADDR_SURF_DISPLAY_MICRO_TILING\0" /* 14070 */ + "ADDR_SURF_THIN_MICRO_TILING\0" /* 14101 */ + "ADDR_SURF_DEPTH_MICRO_TILING\0" /* 14129 */ + "ADDR_SURF_THICK_MICRO_TILING\0" /* 14158 */ + "MICRO_TILE_MODE\0" /* 14187 */ + "ARRAY_LINEAR_GENERAL\0" /* 14209, 14203 */ + "ARRAY_LINEAR_ALIGNED\0" /* 14224 */ + "ARRAY_1D_TILED_THIN1\0" /* 14245 */ + "ARRAY_1D_TILED_THICK\0" /* 14266 */ + "ARRAY_2D_TILED_THIN1\0" /* 14287 */ + "ARRAY_2D_TILED_THICK\0" /* 14308 */ + "ARRAY_2D_TILED_XTHICK\0" /* 14329 */ + "ARRAY_3D_TILED_THIN1\0" /* 14351 */ + "ARRAY_3D_TILED_THICK\0" /* 14372 */ + "ARRAY_3D_TILED_XTHICK\0" /* 14393 */ + "ARRAY_POWER_SAVE\0" /* 14415 */ + "ARRAY_MODE\0" /* 14432 */ + "ADDR_SURF_P2\0" /* 14443 */ + "ADDR_SURF_P2_RESERVED0\0" /* 14456 */ + "ADDR_SURF_P2_RESERVED1\0" /* 14479 */ + "ADDR_SURF_P2_RESERVED2\0" /* 14515, 14502 */ + "X_ADDR_SURF_P4_8X16\0" /* 14525 */ + "X_ADDR_SURF_P4_16X16\0" /* 14545 */ + "X_ADDR_SURF_P4_16X32\0" /* 14566 */ + "X_ADDR_SURF_P4_32X32\0" /* 14587 */ + "X_ADDR_SURF_P8_16X16_8X16\0" /* 14608 */ + "X_ADDR_SURF_P8_16X32_8X16\0" /* 14634 */ + "X_ADDR_SURF_P8_32X32_8X16\0" /* 14660 */ + "X_ADDR_SURF_P8_16X32_16X16\0" /* 14686 */ + "X_ADDR_SURF_P8_32X32_16X16\0" /* 14713 */ + "X_ADDR_SURF_P8_32X32_16X32\0" /* 14740 */ + "X_ADDR_SURF_P8_32X64_32X32\0" /* 14767 */ + "PIPE_CONFIG\0" /* 14794 */ + "ADDR_SURF_TILE_SPLIT_64B\0" /* 14806 */ + "ADDR_SURF_TILE_SPLIT_128B\0" /* 14831 */ + "ADDR_SURF_TILE_SPLIT_256B\0" /* 14857 */ + "ADDR_SURF_TILE_SPLIT_512B\0" /* 14883 */ + "ADDR_SURF_TILE_SPLIT_1KB\0" /* 14909 */ + "ADDR_SURF_TILE_SPLIT_2KB\0" /* 14934 */ + "ADDR_SURF_TILE_SPLIT_4KB\0" /* 14959 */ + "TILE_SPLIT\0" /* 14984 */ + "ADDR_SURF_BANK_WIDTH_1\0" /* 14995 */ + "ADDR_SURF_BANK_WIDTH_2\0" /* 15018 */ + "ADDR_SURF_BANK_WIDTH_4\0" /* 15041 */ + "ADDR_SURF_BANK_WIDTH_8\0" /* 15064 */ + "BANK_WIDTH\0" /* 15087 */ + "ADDR_SURF_BANK_HEIGHT_1\0" /* 15098 */ + "ADDR_SURF_BANK_HEIGHT_2\0" /* 15122 */ + "ADDR_SURF_BANK_HEIGHT_4\0" /* 15146 */ + "ADDR_SURF_BANK_HEIGHT_8\0" /* 15170 */ + "BANK_HEIGHT\0" /* 15194 */ + "ADDR_SURF_MACRO_ASPECT_1\0" /* 15206 */ + "ADDR_SURF_MACRO_ASPECT_2\0" /* 15231 */ + "ADDR_SURF_MACRO_ASPECT_4\0" /* 15256 */ + "ADDR_SURF_MACRO_ASPECT_8\0" /* 15281 */ + "MACRO_TILE_ASPECT\0" /* 15306 */ + "ADDR_SURF_2_BANK\0" /* 15324 */ + "ADDR_SURF_4_BANK\0" /* 15341 */ + "ADDR_SURF_8_BANK\0" /* 15358 */ + "ADDR_SURF_16_BANK\0" /* 15375 */ + "NUM_BANKS\0" /* 15393 */ + "ADDR_SURF_ROTATED_MICRO_TILING\0" /* 15403 */ + "MICRO_TILE_MODE_NEW\0" /* 15434 */ + "SAMPLE_SPLIT\0" /* 15454 */ + "MEM_BASE\0" /* 15467 */ + "WAVE_LIMIT\0" /* 15476 */ + "LOCK_LOW_THRESHOLD\0" /* 15487 */ + "VGPRS\0" /* 15506 */ + "SGPRS\0" /* 15512 */ + "FP_32_DENORMS\0" /* 15518 */ + "FP_64_DENORMS\0" /* 15532 */ + "FP_ALL_DENORMS\0" /* 15546 */ + "FLOAT_MODE\0" /* 15561 */ + "PRIV\0" /* 15572 */ + "DX10_CLAMP\0" /* 15577 */ + "DEBUG_MODE\0" /* 15588 */ + "IEEE_MODE\0" /* 15599 */ + "CU_GROUP_DISABLE\0" /* 15609 */ + "CACHE_CTL\0" /* 15626 */ + "CDBG_USER\0" /* 15636 */ + "SCRATCH_EN\0" /* 15646 */ + "USER_SGPR\0" /* 15657 */ + "TRAP_PRESENT\0" /* 15667 */ + "WAVE_CNT_EN\0" /* 15680 */ + "EXTRA_LDS_SIZE\0" /* 15698, 15692 */ + "EXCP_EN\0" /* 15707 */ + "EXCP_EN_CIK\0" /* 15715 */ + "VGPR_COMP_CNT\0" /* 15737, 15727 */ + "CU_GROUP_ENABLE\0" /* 15741 */ + "OC_LDS_EN\0" /* 15757 */ + "SO_BASE0_EN\0" /* 15767 */ + "SO_BASE1_EN\0" /* 15779 */ + "SO_BASE2_EN\0" /* 15791 */ + "SO_BASE3_EN\0" /* 15803 */ + "SO_EN\0" /* 15815 */ + "DISPATCH_DRAW_EN\0" /* 15821 */ + "GROUP_FIFO_DEPTH\0" /* 15838 */ + "TG_SIZE_EN\0" /* 15855 */ + "COMPUTE_SHADER_EN\0" /* 15866 */ + "PARTIAL_TG_EN\0" /* 15884 */ + "FORCE_START_AT_000\0" /* 15898 */ + "ORDERED_APPEND_ENBL\0" /* 15917 */ + "ORDERED_APPEND_MODE\0" /* 15937 */ + "USE_THREAD_DIMENSIONS\0" /* 15957 */ + "ORDER_MODE\0" /* 15979 */ + "DISPATCH_CACHE_CNTL\0" /* 15990 */ + "SCALAR_L1_INV_VOL\0" /* 16010 */ + "VECTOR_L1_INV_VOL\0" /* 16028 */ + "DATA_ATC\0" /* 16046 */ + "RESTORE\0" /* 16055 */ + "NUM_THREAD_FULL\0" /* 16063 */ + "NUM_THREAD_PARTIAL\0" /* 16079 */ + "PIPELINESTAT_ENABLE\0" /* 16098 */ + "PERFCOUNT_ENABLE\0" /* 16118 */ + "INST_ATC\0" /* 16135 */ + "BULKY\0" /* 16144 */ + "TGID_X_EN\0" /* 16150 */ + "TGID_Y_EN\0" /* 16160 */ + "TGID_Z_EN\0" /* 16170 */ + "TIDIG_COMP_CNT\0" /* 16180 */ + "EXCP_EN_MSB\0" /* 16195 */ + "WAVES_PER_SH\0" /* 16207 */ + "WAVES_PER_SH_CIK\0" /* 16220 */ + "TG_PER_CU\0" /* 16237 */ + "LOCK_THRESHOLD\0" /* 16247 */ + "SIMD_DEST_CNTL\0" /* 16262 */ + "FORCE_SIMD_DIST\0" /* 16277 */ + "CU_GROUP_COUNT\0" /* 16293 */ + "SH0_CU_EN\0" /* 16308 */ + "SH1_CU_EN\0" /* 16318 */ + "WAVES\0" /* 16328 */ + "WAVESIZE\0" /* 16334 */ + "SEND_SEID\0" /* 16343 */ + "RESERVED3\0" /* 16353 */ + "RESERVED4\0" /* 16363 */ + "WAVE_ID_BASE\0" /* 16373 */ + "PAYLOAD\0" /* 16386 */ + "IS_EVENT\0" /* 16394 */ + "IS_STATE\0" /* 16403 */ + "PERFCOUNTER_HI\0" /* 16412 */ + "PERF_SEL2\0" /* 16427 */ + "PERF_SEL3\0" /* 16437 */ + "PERF_SEL\0" /* 16447 */ + "PERF_SEL1\0" /* 16456 */ + "CNTR_MODE\0" /* 16466 */ + "DISABLE_AND_RESET\0" /* 16476 */ + "START_COUNTING\0" /* 16494 */ + "STOP_COUNTING\0" /* 16509 */ + "PERFMON_STATE\0" /* 16523 */ + "SPM_PERFMON_STATE\0" /* 16537 */ + "PERFMON_ENABLE_MODE\0" /* 16555 */ + "PERFMON_SAMPLE_ENABLE\0" /* 16575 */ + "DB_CLEAN_USER_DEFINED_MASK\0" /* 16597 */ + "CB_CLEAN_USER_DEFINED_MASK\0" /* 16624 */ + "VGT_BUSY_USER_DEFINED_MASK\0" /* 16651 */ + "TA_BUSY_USER_DEFINED_MASK\0" /* 16678 */ + "SX_BUSY_USER_DEFINED_MASK\0" /* 16704 */ + "SPI_BUSY_USER_DEFINED_MASK\0" /* 16730 */ + "SC_BUSY_USER_DEFINED_MASK\0" /* 16757 */ + "PA_BUSY_USER_DEFINED_MASK\0" /* 16783 */ + "GRBM_BUSY_USER_DEFINED_MASK\0" /* 16809 */ + "DB_BUSY_USER_DEFINED_MASK\0" /* 16837 */ + "CB_BUSY_USER_DEFINED_MASK\0" /* 16863 */ + "CP_BUSY_USER_DEFINED_MASK\0" /* 16889 */ + "IA_BUSY_USER_DEFINED_MASK\0" /* 16915 */ + "GDS_BUSY_USER_DEFINED_MASK\0" /* 16941 */ + "BCI_BUSY_USER_DEFINED_MASK\0" /* 16968 */ + "RLC_BUSY_USER_DEFINED_MASK\0" /* 16995 */ + "TC_BUSY_USER_DEFINED_MASK\0" /* 17022 */ + "WD_BUSY_USER_DEFINED_MASK\0" /* 17048 */ + "PERF_MODE\0" /* 17074 */ + "PERF_MODE1\0" /* 17084 */ + "PERF_MODE3\0" /* 17095 */ + "PERF_MODE2\0" /* 17106 */ + "PERF_SEID_IGNORE_MASK\0" /* 17117 */ + "BIN0_MIN\0" /* 17139 */ + "BIN0_MAX\0" /* 17148 */ + "BIN1_MIN\0" /* 17157 */ + "BIN1_MAX\0" /* 17166 */ + "BIN2_MIN\0" /* 17175 */ + "BIN2_MAX\0" /* 17184 */ + "BIN3_MIN\0" /* 17193 */ + "BIN3_MAX\0" /* 17202 */ + "SQC_BANK_MASK\0" /* 17211 */ + "SQC_CLIENT_MASK\0" /* 17225 */ + "SPM_MODE\0" /* 17241 */ + "SIMD_MASK\0" /* 17250 */ + "PS_EN\0" /* 17260 */ + "VS_EN\0" /* 17266 */ + "GS_EN\0" /* 17272 */ + "ES_EN\0" /* 17278 */ + "HS_EN\0" /* 17284 */ + "LS_EN\0" /* 17290 */ + "CS_EN\0" /* 17296 */ + "CNTR_RATE\0" /* 17302 */ + "DISABLE_FLUSH\0" /* 17312 */ + "SH0_MASK\0" /* 17326 */ + "SH1_MASK\0" /* 17335 */ + "FORCE_EN\0" /* 17344 */ + "PERFCOUNTER_SELECT\0" /* 17353 */ + "PERFCOUNTER_SELECT1\0" /* 17372 */ + "PERFCOUNTER_SELECT2\0" /* 17392 */ + "PERFCOUNTER_SELECT3\0" /* 17412 */ + "OP_FILTER_ENABLE\0" /* 17432 */ + "OP_FILTER_SEL\0" /* 17449 */ + "FORMAT_FILTER_ENABLE\0" /* 17463 */ + "FORMAT_FILTER_SEL\0" /* 17484 */ + "CLEAR_FILTER_ENABLE\0" /* 17502 */ + "CLEAR_FILTER_SEL\0" /* 17522 */ + "MRT_FILTER_ENABLE\0" /* 17539 */ + "MRT_FILTER_SEL\0" /* 17557 */ + "NUM_SAMPLES_FILTER_ENABLE\0" /* 17572 */ + "NUM_SAMPLES_FILTER_SEL\0" /* 17598 */ + "NUM_FRAGMENTS_FILTER_ENABLE\0" /* 17621 */ + "NUM_FRAGMENTS_FILTER_SEL\0" /* 17649 */ + "DEPTH_CLEAR_ENABLE\0" /* 17674 */ + "STENCIL_CLEAR_ENABLE\0" /* 17693 */ + "DEPTH_COPY\0" /* 17714 */ + "STENCIL_COPY\0" /* 17725 */ + "RESUMMARIZE_ENABLE\0" /* 17738 */ + "STENCIL_COMPRESS_DISABLE\0" /* 17757 */ + "DEPTH_COMPRESS_DISABLE\0" /* 17782 */ + "COPY_CENTROID\0" /* 17805 */ + "COPY_SAMPLE\0" /* 17819 */ + "DECOMPRESS_ENABLE\0" /* 17831 */ + "ZPASS_INCREMENT_DISABLE\0" /* 17849 */ + "PERFECT_ZPASS_COUNTS\0" /* 17873 */ + "SAMPLE_RATE\0" /* 17894 */ + "ZPASS_ENABLE\0" /* 17906 */ + "ZFAIL_ENABLE\0" /* 17919 */ + "SFAIL_ENABLE\0" /* 17932 */ + "DBFAIL_ENABLE\0" /* 17945 */ + "SLICE_EVEN_ENABLE\0" /* 17959 */ + "SLICE_ODD_ENABLE\0" /* 17977 */ + "SLICE_START\0" /* 17994 */ + "SLICE_MAX\0" /* 18006 */ + "Z_READ_ONLY\0" /* 18016 */ + "STENCIL_READ_ONLY\0" /* 18028 */ + "FORCE_OFF\0" /* 18046 */ + "FORCE_ENABLE\0" /* 18056 */ + "FORCE_DISABLE\0" /* 18069 */ + "FORCE_RESERVED\0" /* 18083 */ + "FORCE_HIZ_ENABLE\0" /* 18098, 18106 */ + "FORCE_HIS_ENABLE0\0" /* 18115, 18125 */ + "FORCE_HIS_ENABLE1\0" /* 18133, 18143 */ + "FORCE_SHADER_Z_ORDER\0" /* 18164, 18151 */ + "FAST_Z_DISABLE\0" /* 18172 */ + "FAST_STENCIL_DISABLE\0" /* 18187 */ + "NOOP_CULL_DISABLE\0" /* 18208 */ + "FORCE_COLOR_KILL\0" /* 18226 */ + "FORCE_Z_READ\0" /* 18243 */ + "FORCE_STENCIL_READ\0" /* 18256 */ + "FORCE_FULL_Z_RANGE\0" /* 18275 */ + "FORCE_QC_SMASK_CONFLICT\0" /* 18294 */ + "DISABLE_VIEWPORT_CLAMP\0" /* 18318 */ + "IGNORE_SC_ZRANGE\0" /* 18341 */ + "DISABLE_FULLY_COVERED\0" /* 18358 */ + "FORCE_SUMM_OFF\0" /* 18380 */ + "FORCE_SUMM_MINZ\0" /* 18395 */ + "FORCE_SUMM_MAXZ\0" /* 18411 */ + "FORCE_SUMM_BOTH\0" /* 18427 */ + "FORCE_Z_LIMIT_SUMM\0" /* 18443 */ + "MAX_TILES_IN_DTT\0" /* 18462 */ + "DISABLE_TILE_RATE_TILES\0" /* 18479 */ + "FORCE_Z_DIRTY\0" /* 18503 */ + "FORCE_STENCIL_DIRTY\0" /* 18517 */ + "FORCE_Z_VALID\0" /* 18537 */ + "FORCE_STENCIL_VALID\0" /* 18551 */ + "PRESERVE_COMPRESSION\0" /* 18571, 18580 */ + "PSLC_AUTO\0" /* 18592 */ + "PSLC_ON_HANG_ONLY\0" /* 18602 */ + "PSLC_ASAP\0" /* 18620 */ + "PSLC_COUNTDOWN\0" /* 18630 */ + "PARTIAL_SQUAD_LAUNCH_CONTROL\0" /* 18645 */ + "PARTIAL_SQUAD_LAUNCH_COUNTDOWN\0" /* 18674 */ + "DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION\0" /* 18705 */ + "DISABLE_SMEM_EXPCLEAR_OPTIMIZATION\0" /* 18741 */ + "DISABLE_COLOR_ON_VALIDATION\0" /* 18776 */ + "DECOMPRESS_Z_ON_FLUSH\0" /* 18804 */ + "DISABLE_REG_SNOOP\0" /* 18826 */ + "DEPTH_BOUNDS_HIER_DEPTH_DISABLE\0" /* 18844 */ + "SEPARATE_HIZS_FUNC_ENABLE\0" /* 18876 */ + "HIZ_ZFUNC\0" /* 18906, 18902 */ + "HIS_SFUNC_FF\0" /* 18912 */ + "HIS_SFUNC_BF\0" /* 18925 */ + "PRESERVE_ZRANGE\0" /* 18938 */ + "PRESERVE_SRESULTS\0" /* 18954 */ + "DISABLE_FAST_PASS\0" /* 18972 */ + "CLEAR\0" /* 18990 */ + "TL_X\0" /* 18996 */ + "TL_Y\0" /* 19001 */ + "BR_X\0" /* 19006 */ + "BR_Y\0" /* 19011 */ + "ADDR5_SWIZZLE_MASK\0" /* 19016 */ + "ARRAY_PRT_TILED_THIN1\0" /* 19035 */ + "ARRAY_PRT_2D_TILED_THIN1\0" /* 19057 */ + "X_ADDR_SURF_P16_32X32_8X16\0" /* 19082 */ + "X_ADDR_SURF_P16_32X32_16X16\0" /* 19109 */ + "Z_INVALID\0" /* 19137 */ + "Z_16\0" /* 19147 */ + "Z_24\0" /* 19152 */ + "Z_32_FLOAT\0" /* 19157 */ + "NUM_SAMPLES\0" /* 19168 */ + "TILE_MODE_INDEX\0" /* 19180 */ + "DECOMPRESS_ON_N_ZPLANES\0" /* 19196 */ + "ALLOW_EXPCLEAR\0" /* 19220 */ + "READ_SIZE\0" /* 19235 */ + "TILE_SURFACE_ENABLE\0" /* 19245 */ + "CLEAR_DISALLOWED\0" /* 19265 */ + "ZRANGE_PRECISION\0" /* 19282 */ + "STENCIL_INVALID\0" /* 19299 */ + "STENCIL_8\0" /* 19315 */ + "TILE_STENCIL_DISABLE\0" /* 19325 */ + "PITCH_TILE_MAX\0" /* 19352, 19346 */ + "HEIGHT_TILE_MAX\0" /* 19361 */ + "SLICE_TILE_MAX\0" /* 19377 */ + "WINDOW_X_OFFSET\0" /* 19392, 19399 */ + "WINDOW_Y_OFFSET\0" /* 19408, 19415 */ + "WINDOW_OFFSET_DISABLE\0" /* 19424 */ + "CLIP_RULE\0" /* 19446 */ + "ER_TRI\0" /* 19456 */ + "ER_RECT\0" /* 19463 */ + "ER_LINE_LR\0" /* 19471 */ + "ER_LINE_RL\0" /* 19482 */ + "ER_LINE_TB\0" /* 19493 */ + "ER_LINE_BT\0" /* 19504 */ + "HW_SCREEN_OFFSET_X\0" /* 19515 */ + "HW_SCREEN_OFFSET_Y\0" /* 19534 */ + "TARGET0_ENABLE\0" /* 19553 */ + "TARGET1_ENABLE\0" /* 19568 */ + "TARGET2_ENABLE\0" /* 19583 */ + "TARGET3_ENABLE\0" /* 19598 */ + "TARGET4_ENABLE\0" /* 19613 */ + "TARGET5_ENABLE\0" /* 19628 */ + "TARGET6_ENABLE\0" /* 19643 */ + "TARGET7_ENABLE\0" /* 19658 */ + "OUTPUT0_ENABLE\0" /* 19673 */ + "OUTPUT1_ENABLE\0" /* 19688 */ + "OUTPUT2_ENABLE\0" /* 19703 */ + "OUTPUT3_ENABLE\0" /* 19718 */ + "OUTPUT4_ENABLE\0" /* 19733 */ + "OUTPUT5_ENABLE\0" /* 19748 */ + "OUTPUT6_ENABLE\0" /* 19763 */ + "OUTPUT7_ENABLE\0" /* 19778 */ + "RASTER_CONFIG_RB_MAP_0\0" /* 19793 */ + "RASTER_CONFIG_RB_MAP_1\0" /* 19816 */ + "RASTER_CONFIG_RB_MAP_2\0" /* 19839 */ + "RASTER_CONFIG_RB_MAP_3\0" /* 19862 */ + "RB_MAP_PKR0\0" /* 19885 */ + "RB_MAP_PKR1\0" /* 19897 */ + "RASTER_CONFIG_RB_XSEL2_0\0" /* 19909 */ + "RASTER_CONFIG_RB_XSEL2_1\0" /* 19934 */ + "RASTER_CONFIG_RB_XSEL2_2\0" /* 19959 */ + "RASTER_CONFIG_RB_XSEL2_3\0" /* 19984 */ + "RB_XSEL2\0" /* 20009 */ + "RB_XSEL\0" /* 20018 */ + "RB_YSEL\0" /* 20026 */ + "RASTER_CONFIG_PKR_MAP_0\0" /* 20034 */ + "RASTER_CONFIG_PKR_MAP_1\0" /* 20058 */ + "RASTER_CONFIG_PKR_MAP_2\0" /* 20082 */ + "RASTER_CONFIG_PKR_MAP_3\0" /* 20106 */ + "PKR_MAP\0" /* 20130 */ + "RASTER_CONFIG_PKR_XSEL_0\0" /* 20138 */ + "RASTER_CONFIG_PKR_XSEL_1\0" /* 20163 */ + "RASTER_CONFIG_PKR_XSEL_2\0" /* 20188 */ + "RASTER_CONFIG_PKR_XSEL_3\0" /* 20213 */ + "PKR_XSEL\0" /* 20238 */ + "RASTER_CONFIG_PKR_YSEL_0\0" /* 20247 */ + "RASTER_CONFIG_PKR_YSEL_1\0" /* 20272 */ + "RASTER_CONFIG_PKR_YSEL_2\0" /* 20297 */ + "RASTER_CONFIG_PKR_YSEL_3\0" /* 20322 */ + "PKR_YSEL\0" /* 20347 */ + "RASTER_CONFIG_PKR_XSEL2_0\0" /* 20356 */ + "RASTER_CONFIG_PKR_XSEL2_1\0" /* 20382 */ + "RASTER_CONFIG_PKR_XSEL2_2\0" /* 20408 */ + "RASTER_CONFIG_PKR_XSEL2_3\0" /* 20434 */ + "PKR_XSEL2\0" /* 20460 */ + "RASTER_CONFIG_SC_MAP_0\0" /* 20470 */ + "RASTER_CONFIG_SC_MAP_1\0" /* 20493 */ + "RASTER_CONFIG_SC_MAP_2\0" /* 20516 */ + "RASTER_CONFIG_SC_MAP_3\0" /* 20539 */ + "SC_MAP\0" /* 20562 */ + "RASTER_CONFIG_SC_XSEL_8_WIDE_TILE\0" /* 20569 */ + "RASTER_CONFIG_SC_XSEL_16_WIDE_TILE\0" /* 20603 */ + "RASTER_CONFIG_SC_XSEL_32_WIDE_TILE\0" /* 20638 */ + "RASTER_CONFIG_SC_XSEL_64_WIDE_TILE\0" /* 20673 */ + "SC_XSEL\0" /* 20708 */ + "RASTER_CONFIG_SC_YSEL_8_WIDE_TILE\0" /* 20716 */ + "RASTER_CONFIG_SC_YSEL_16_WIDE_TILE\0" /* 20750 */ + "RASTER_CONFIG_SC_YSEL_32_WIDE_TILE\0" /* 20785 */ + "RASTER_CONFIG_SC_YSEL_64_WIDE_TILE\0" /* 20820 */ + "SC_YSEL\0" /* 20855 */ + "RASTER_CONFIG_SE_MAP_0\0" /* 20863 */ + "RASTER_CONFIG_SE_MAP_1\0" /* 20886 */ + "RASTER_CONFIG_SE_MAP_2\0" /* 20909 */ + "RASTER_CONFIG_SE_MAP_3\0" /* 20932 */ + "SE_MAP\0" /* 20955 */ + "RASTER_CONFIG_SE_XSEL_8_WIDE_TILE\0" /* 20962 */ + "RASTER_CONFIG_SE_XSEL_16_WIDE_TILE\0" /* 20996 */ + "RASTER_CONFIG_SE_XSEL_32_WIDE_TILE\0" /* 21031 */ + "RASTER_CONFIG_SE_XSEL_64_WIDE_TILE\0" /* 21066 */ + "SE_XSEL\0" /* 21101 */ + "RASTER_CONFIG_SE_YSEL_8_WIDE_TILE\0" /* 21109 */ + "RASTER_CONFIG_SE_YSEL_16_WIDE_TILE\0" /* 21143 */ + "RASTER_CONFIG_SE_YSEL_32_WIDE_TILE\0" /* 21178 */ + "RASTER_CONFIG_SE_YSEL_64_WIDE_TILE\0" /* 21213 */ + "SE_YSEL\0" /* 21248 */ + "RASTER_CONFIG_SE_PAIR_MAP_0\0" /* 21256 */ + "RASTER_CONFIG_SE_PAIR_MAP_1\0" /* 21284 */ + "RASTER_CONFIG_SE_PAIR_MAP_2\0" /* 21312 */ + "RASTER_CONFIG_SE_PAIR_MAP_3\0" /* 21340 */ + "SE_PAIR_MAP\0" /* 21368 */ + "RASTER_CONFIG_SE_PAIR_XSEL_8_WIDE_TILE\0" /* 21380 */ + "RASTER_CONFIG_SE_PAIR_XSEL_16_WIDE_TILE\0" /* 21419 */ + "RASTER_CONFIG_SE_PAIR_XSEL_32_WIDE_TILE\0" /* 21459 */ + "RASTER_CONFIG_SE_PAIR_XSEL_64_WIDE_TILE\0" /* 21499 */ + "SE_PAIR_XSEL\0" /* 21539 */ + "RASTER_CONFIG_SE_PAIR_YSEL_8_WIDE_TILE\0" /* 21552 */ + "RASTER_CONFIG_SE_PAIR_YSEL_16_WIDE_TILE\0" /* 21591 */ + "RASTER_CONFIG_SE_PAIR_YSEL_32_WIDE_TILE\0" /* 21631 */ + "RASTER_CONFIG_SE_PAIR_YSEL_64_WIDE_TILE\0" /* 21671 */ + "SE_PAIR_YSEL\0" /* 21711 */ + "OVERWRITE_COMBINER_DISABLE\0" /* 21724 */ + "OVERWRITE_COMBINER_MRT_SHARING_DISABLE\0" /* 21751 */ + "OVERWRITE_COMBINER_WATERMARK\0" /* 21790 */ + "STENCIL_KEEP\0" /* 21819 */ + "STENCIL_ZERO\0" /* 21832 */ + "STENCIL_ONES\0" /* 21845 */ + "STENCIL_REPLACE_TEST\0" /* 21858 */ + "STENCIL_REPLACE_OP\0" /* 21879 */ + "STENCIL_ADD_CLAMP\0" /* 21898 */ + "STENCIL_SUB_CLAMP\0" /* 21916 */ + "STENCIL_INVERT\0" /* 21934 */ + "STENCIL_ADD_WRAP\0" /* 21949 */ + "STENCIL_SUB_WRAP\0" /* 21966 */ + "STENCIL_AND\0" /* 21983 */ + "STENCIL_OR\0" /* 21995 */ + "STENCIL_XOR\0" /* 22006 */ + "STENCIL_NAND\0" /* 22018 */ + "STENCIL_NOR\0" /* 22031 */ + "STENCIL_XNOR\0" /* 22043 */ + "STENCILFAIL\0" /* 22056 */ + "STENCILZPASS\0" /* 22068 */ + "STENCILZFAIL\0" /* 22081 */ + "STENCILFAIL_BF\0" /* 22094 */ + "STENCILZPASS_BF\0" /* 22109 */ + "STENCILZFAIL_BF\0" /* 22125 */ + "STENCILTESTVAL\0" /* 22141 */ + "STENCILMASK\0" /* 22156 */ + "STENCILWRITEMASK\0" /* 22168 */ + "STENCILOPVAL\0" /* 22185 */ + "STENCILTESTVAL_BF\0" /* 22198 */ + "STENCILMASK_BF\0" /* 22216 */ + "STENCILWRITEMASK_BF\0" /* 22231 */ + "STENCILOPVAL_BF\0" /* 22251 */ + "X_0_0F\0" /* 22267 */ + "DEFAULT_VAL\0" /* 22274 */ + "FLAT_SHADE\0" /* 22286 */ + "CYL_WRAP\0" /* 22297 */ + "PT_SPRITE_TEX\0" /* 22306 */ + "DUP\0" /* 22320 */ + "FP16_INTERP_MODE\0" /* 22324 */ + "USE_DEFAULT_ATTR1\0" /* 22341 */ + "DEFAULT_VAL_ATTR1\0" /* 22359 */ + "PT_SPRITE_TEX_ATTR1\0" /* 22377 */ + "ATTR0_VALID\0" /* 22397 */ + "ATTR1_VALID\0" /* 22409 */ + "VS_EXPORT_COUNT\0" /* 22421 */ + "VS_HALF_PACK\0" /* 22437 */ + "VS_EXPORTS_FOG\0" /* 22450 */ + "VS_OUT_FOG_VEC_ADDR\0" /* 22465 */ + "PERSP_SAMPLE_ENA\0" /* 22485 */ + "PERSP_CENTER_ENA\0" /* 22502 */ + "PERSP_CENTROID_ENA\0" /* 22519 */ + "PERSP_PULL_MODEL_ENA\0" /* 22538 */ + "LINEAR_SAMPLE_ENA\0" /* 22559 */ + "LINEAR_CENTER_ENA\0" /* 22577 */ + "LINEAR_CENTROID_ENA\0" /* 22595 */ + "LINE_STIPPLE_TEX_ENA\0" /* 22615 */ + "POS_X_FLOAT_ENA\0" /* 22636 */ + "POS_Y_FLOAT_ENA\0" /* 22652 */ + "POS_Z_FLOAT_ENA\0" /* 22668 */ + "POS_W_FLOAT_ENA\0" /* 22684 */ + "FRONT_FACE_ENA\0" /* 22700 */ + "ANCILLARY_ENA\0" /* 22715 */ + "SAMPLE_COVERAGE_ENA\0" /* 22729 */ + "POS_FIXED_PT_ENA\0" /* 22749 */ + "FLAT_SHADE_ENA\0" /* 22766 */ + "PNT_SPRITE_ENA\0" /* 22781 */ + "SPI_PNT_SPRITE_SEL_0\0" /* 22796 */ + "SPI_PNT_SPRITE_SEL_1\0" /* 22817 */ + "SPI_PNT_SPRITE_SEL_S\0" /* 22838 */ + "SPI_PNT_SPRITE_SEL_T\0" /* 22859 */ + "SPI_PNT_SPRITE_SEL_NONE\0" /* 22880 */ + "PNT_SPRITE_OVRD_X\0" /* 22904 */ + "PNT_SPRITE_OVRD_Y\0" /* 22922 */ + "PNT_SPRITE_OVRD_Z\0" /* 22940 */ + "PNT_SPRITE_OVRD_W\0" /* 22958 */ + "PNT_SPRITE_TOP_1\0" /* 22976 */ + "NUM_INTERP\0" /* 22993 */ + "PARAM_GEN\0" /* 23004 */ + "FOG_ADDR\0" /* 23014 */ + "BC_OPTIMIZE_DISABLE\0" /* 23023 */ + "PASS_FOG_THROUGH_PS\0" /* 23043 */ + "PERSP_CENTER_CNTL\0" /* 23063 */ + "PERSP_CENTROID_CNTL\0" /* 23081 */ + "LINEAR_CENTER_CNTL\0" /* 23101 */ + "LINEAR_CENTROID_CNTL\0" /* 23120 */ + "X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT\0" /* 23141 */ + "POS_FLOAT_LOCATION\0" /* 23190 */ + "POS_FLOAT_ULC\0" /* 23209 */ + "FRONT_FACE_ALL_BITS\0" /* 23223 */ + "NUM_PS_WAVES\0" /* 23243 */ + "NUM_VS_WAVES\0" /* 23256 */ + "NUM_GS_WAVES\0" /* 23269 */ + "NUM_ES_WAVES\0" /* 23282 */ + "NUM_HS_WAVES\0" /* 23295 */ + "NUM_LS_WAVES\0" /* 23308 */ + "SPI_SHADER_NONE\0" /* 23321 */ + "SPI_SHADER_1COMP\0" /* 23337 */ + "SPI_SHADER_2COMP\0" /* 23354 */ + "SPI_SHADER_4COMPRESS\0" /* 23371 */ + "SPI_SHADER_4COMP\0" /* 23392 */ + "POS0_EXPORT_FORMAT\0" /* 23409 */ + "POS1_EXPORT_FORMAT\0" /* 23428 */ + "POS2_EXPORT_FORMAT\0" /* 23447 */ + "POS3_EXPORT_FORMAT\0" /* 23466 */ + "SPI_SHADER_ZERO\0" /* 23485 */ + "SPI_SHADER_32_R\0" /* 23501 */ + "SPI_SHADER_32_GR\0" /* 23517 */ + "SPI_SHADER_32_AR\0" /* 23534 */ + "SPI_SHADER_FP16_ABGR\0" /* 23551 */ + "SPI_SHADER_UNORM16_ABGR\0" /* 23572 */ + "SPI_SHADER_SNORM16_ABGR\0" /* 23596 */ + "SPI_SHADER_UINT16_ABGR\0" /* 23620 */ + "SPI_SHADER_SINT16_ABGR\0" /* 23643 */ + "SPI_SHADER_32_ABGR\0" /* 23666 */ + "Z_EXPORT_FORMAT\0" /* 23685 */ + "COL0_EXPORT_FORMAT\0" /* 23701 */ + "COL1_EXPORT_FORMAT\0" /* 23720 */ + "COL2_EXPORT_FORMAT\0" /* 23739 */ + "COL3_EXPORT_FORMAT\0" /* 23758 */ + "COL4_EXPORT_FORMAT\0" /* 23777 */ + "COL5_EXPORT_FORMAT\0" /* 23796 */ + "COL6_EXPORT_FORMAT\0" /* 23815 */ + "COL7_EXPORT_FORMAT\0" /* 23834 */ + "SX_RT_EXPORT_NO_CONVERSION\0" /* 23853 */ + "SX_RT_EXPORT_32_R\0" /* 23880 */ + "SX_RT_EXPORT_32_A\0" /* 23898 */ + "SX_RT_EXPORT_10_11_11\0" /* 23916 */ + "SX_RT_EXPORT_2_10_10_10\0" /* 23938 */ + "SX_RT_EXPORT_8_8_8_8\0" /* 23962 */ + "SX_RT_EXPORT_5_6_5\0" /* 23983 */ + "SX_RT_EXPORT_1_5_5_5\0" /* 24002 */ + "SX_RT_EXPORT_4_4_4_4\0" /* 24023 */ + "SX_RT_EXPORT_16_16_GR\0" /* 24044 */ + "SX_RT_EXPORT_16_16_AR\0" /* 24066 */ + "MRT0\0" /* 24088 */ + "MRT1\0" /* 24093 */ + "MRT2\0" /* 24098 */ + "MRT3\0" /* 24103 */ + "MRT4\0" /* 24108 */ + "MRT5\0" /* 24113 */ + "MRT6\0" /* 24118 */ + "MRT7\0" /* 24123 */ + "EXACT\0" /* 24128 */ + "11BIT_FORMAT\0" /* 24134 */ + "10BIT_FORMAT\0" /* 24147 */ + "8BIT_FORMAT\0" /* 24160 */ + "6BIT_FORMAT\0" /* 24172 */ + "5BIT_FORMAT\0" /* 24184 */ + "4BIT_FORMAT\0" /* 24196 */ + "MRT0_EPSILON\0" /* 24208 */ + "MRT1_EPSILON\0" /* 24221 */ + "MRT2_EPSILON\0" /* 24234 */ + "MRT3_EPSILON\0" /* 24247 */ + "MRT4_EPSILON\0" /* 24260 */ + "MRT5_EPSILON\0" /* 24273 */ + "MRT6_EPSILON\0" /* 24286 */ + "MRT7_EPSILON\0" /* 24299 */ + "MRT0_COLOR_OPT_DISABLE\0" /* 24312 */ + "MRT0_ALPHA_OPT_DISABLE\0" /* 24335 */ + "MRT1_COLOR_OPT_DISABLE\0" /* 24358 */ + "MRT1_ALPHA_OPT_DISABLE\0" /* 24381 */ + "MRT2_COLOR_OPT_DISABLE\0" /* 24404 */ + "MRT2_ALPHA_OPT_DISABLE\0" /* 24427 */ + "MRT3_COLOR_OPT_DISABLE\0" /* 24450 */ + "MRT3_ALPHA_OPT_DISABLE\0" /* 24473 */ + "MRT4_COLOR_OPT_DISABLE\0" /* 24496 */ + "MRT4_ALPHA_OPT_DISABLE\0" /* 24519 */ + "MRT5_COLOR_OPT_DISABLE\0" /* 24542 */ + "MRT5_ALPHA_OPT_DISABLE\0" /* 24565 */ + "MRT6_COLOR_OPT_DISABLE\0" /* 24588 */ + "MRT6_ALPHA_OPT_DISABLE\0" /* 24611 */ + "MRT7_COLOR_OPT_DISABLE\0" /* 24634 */ + "MRT7_ALPHA_OPT_DISABLE\0" /* 24657 */ + "PIXEN_ZERO_OPT_DISABLE\0" /* 24680 */ + "BLEND_OPT_PRESERVE_NONE_IGNORE_ALL\0" /* 24703 */ + "BLEND_OPT_PRESERVE_ALL_IGNORE_NONE\0" /* 24738 */ + "BLEND_OPT_PRESERVE_C1_IGNORE_C0\0" /* 24773 */ + "BLEND_OPT_PRESERVE_C0_IGNORE_C1\0" /* 24805 */ + "BLEND_OPT_PRESERVE_A1_IGNORE_A0\0" /* 24837 */ + "BLEND_OPT_PRESERVE_A0_IGNORE_A1\0" /* 24869 */ + "BLEND_OPT_PRESERVE_NONE_IGNORE_A0\0" /* 24901 */ + "BLEND_OPT_PRESERVE_NONE_IGNORE_NONE\0" /* 24935 */ + "COLOR_SRC_OPT\0" /* 24971 */ + "COLOR_DST_OPT\0" /* 24985 */ + "OPT_COMB_NONE\0" /* 24999 */ + "OPT_COMB_ADD\0" /* 25013 */ + "OPT_COMB_SUBTRACT\0" /* 25026 */ + "OPT_COMB_MIN\0" /* 25044 */ + "OPT_COMB_MAX\0" /* 25057 */ + "OPT_COMB_REVSUBTRACT\0" /* 25070 */ + "OPT_COMB_BLEND_DISABLED\0" /* 25091 */ + "OPT_COMB_SAFE_ADD\0" /* 25115 */ + "COLOR_COMB_FCN\0" /* 25133 */ + "ALPHA_SRC_OPT\0" /* 25148 */ + "ALPHA_DST_OPT\0" /* 25162 */ + "ALPHA_COMB_FCN\0" /* 25176 */ + "BLEND_ZERO\0" /* 25191 */ + "BLEND_ONE\0" /* 25202 */ + "BLEND_SRC_COLOR\0" /* 25212 */ + "BLEND_ONE_MINUS_SRC_COLOR\0" /* 25228 */ + "BLEND_SRC_ALPHA\0" /* 25254 */ + "BLEND_ONE_MINUS_SRC_ALPHA\0" /* 25270 */ + "BLEND_DST_ALPHA\0" /* 25296 */ + "BLEND_ONE_MINUS_DST_ALPHA\0" /* 25312 */ + "BLEND_DST_COLOR\0" /* 25338 */ + "BLEND_ONE_MINUS_DST_COLOR\0" /* 25354 */ + "BLEND_SRC_ALPHA_SATURATE\0" /* 25380 */ + "BLEND_CONSTANT_COLOR\0" /* 25405 */ + "BLEND_ONE_MINUS_CONSTANT_COLOR\0" /* 25426 */ + "BLEND_SRC1_COLOR\0" /* 25457 */ + "BLEND_INV_SRC1_COLOR\0" /* 25474 */ + "BLEND_SRC1_ALPHA\0" /* 25495 */ + "BLEND_INV_SRC1_ALPHA\0" /* 25512 */ + "BLEND_CONSTANT_ALPHA\0" /* 25533 */ + "BLEND_ONE_MINUS_CONSTANT_ALPHA\0" /* 25554 */ + "COLOR_SRCBLEND\0" /* 25585 */ + "COMB_DST_PLUS_SRC\0" /* 25600 */ + "COMB_SRC_MINUS_DST\0" /* 25618 */ + "COMB_MIN_DST_SRC\0" /* 25637 */ + "COMB_MAX_DST_SRC\0" /* 25654 */ + "COMB_DST_MINUS_SRC\0" /* 25671 */ + "COLOR_DESTBLEND\0" /* 25690 */ + "ALPHA_SRCBLEND\0" /* 25706 */ + "ALPHA_DESTBLEND\0" /* 25721 */ + "SEPARATE_ALPHA_BLEND\0" /* 25737 */ + "DISABLE_ROP3\0" /* 25766, 25758 */ + "SRC_STATE_ID\0" /* 25771 */ + "BASE_ADDR\0" /* 25784 */ + "DI_SRC_SEL_DMA\0" /* 25794 */ + "DI_SRC_SEL_IMMEDIATE\0" /* 25809 */ + "DI_SRC_SEL_AUTO_INDEX\0" /* 25830 */ + "DI_SRC_SEL_RESERVED\0" /* 25852 */ + "SOURCE_SELECT\0" /* 25872 */ + "DI_MAJOR_MODE_0\0" /* 25886 */ + "DI_MAJOR_MODE_1\0" /* 25902 */ + "MAJOR_MODE\0" /* 25918 */ + "NOT_EOP\0" /* 25929 */ + "USE_OPAQUE\0" /* 25937 */ + "ADDRESS_LOW\0" /* 25948 */ + "STENCIL_ENABLE\0" /* 25960 */ + "Z_WRITE_ENABLE\0" /* 25975 */ + "DEPTH_BOUNDS_ENABLE\0" /* 25990 */ + "FRAG_NEVER\0" /* 26010 */ + "FRAG_LESS\0" /* 26021 */ + "FRAG_EQUAL\0" /* 26031 */ + "FRAG_LEQUAL\0" /* 26042 */ + "FRAG_GREATER\0" /* 26054 */ + "FRAG_NOTEQUAL\0" /* 26067 */ + "FRAG_GEQUAL\0" /* 26081 */ + "FRAG_ALWAYS\0" /* 26093 */ + "BACKFACE_ENABLE\0" /* 26105 */ + "REF_NEVER\0" /* 26121 */ + "REF_LESS\0" /* 26131 */ + "REF_EQUAL\0" /* 26140 */ + "REF_LEQUAL\0" /* 26150 */ + "REF_GREATER\0" /* 26161 */ + "REF_NOTEQUAL\0" /* 26173 */ + "REF_GEQUAL\0" /* 26186 */ + "REF_ALWAYS\0" /* 26197 */ + "STENCILFUNC\0" /* 26208 */ + "STENCILFUNC_BF\0" /* 26220 */ + "ENABLE_COLOR_WRITES_ON_DEPTH_FAIL\0" /* 26235 */ + "DISABLE_COLOR_WRITES_ON_DEPTH_PASS\0" /* 26269 */ + "MAX_ANCHOR_SAMPLES\0" /* 26304 */ + "PS_ITER_SAMPLES\0" /* 26323 */ + "MASK_EXPORT_NUM_SAMPLES\0" /* 26339 */ + "ALPHA_TO_MASK_NUM_SAMPLES\0" /* 26363 */ + "HIGH_QUALITY_INTERSECTIONS\0" /* 26389 */ + "INCOHERENT_EQAA_READS\0" /* 26416 */ + "INTERPOLATE_COMP_Z\0" /* 26438 */ + "INTERPOLATE_SRC_Z\0" /* 26457 */ + "STATIC_ANCHOR_ASSOCIATIONS\0" /* 26475 */ + "ALPHA_TO_MASK_EQAA_DISABLE\0" /* 26502 */ + "OVERRASTERIZATION_AMOUNT\0" /* 26529 */ + "ENABLE_POSTZ_OVERRASTERIZATION\0" /* 26554 */ + "DISABLE_DUAL_QUAD\0" /* 26585 */ + "DEGAMMA_ENABLE\0" /* 26603 */ + "CB_DISABLE\0" /* 26618 */ + "CB_NORMAL\0" /* 26629 */ + "CB_ELIMINATE_FAST_CLEAR\0" /* 26652, 26639 */ + "CB_RESOLVE\0" /* 26663 */ + "CB_FMASK_DECOMPRESS\0" /* 26674 */ + "CB_DCC_DECOMPRESS\0" /* 26694 */ + "X_0X00\0" /* 26712 */ + "X_0X05\0" /* 26719 */ + "X_0X0A\0" /* 26726 */ + "X_0X0F\0" /* 26733 */ + "X_0X11\0" /* 26740 */ + "X_0X22\0" /* 26747 */ + "X_0X33\0" /* 26754 */ + "X_0X44\0" /* 26761 */ + "X_0X50\0" /* 26768 */ + "X_0X55\0" /* 26775 */ + "X_0X5A\0" /* 26782 */ + "X_0X5F\0" /* 26789 */ + "X_0X66\0" /* 26796 */ + "X_0X77\0" /* 26803 */ + "X_0X88\0" /* 26810 */ + "X_0X99\0" /* 26817 */ + "X_0XA0\0" /* 26824 */ + "X_0XA5\0" /* 26831 */ + "X_0XAA\0" /* 26838 */ + "X_0XAF\0" /* 26845 */ + "X_0XBB\0" /* 26852 */ + "X_0XCC\0" /* 26859 */ + "X_0XDD\0" /* 26866 */ + "X_0XEE\0" /* 26873 */ + "X_0XF0\0" /* 26880 */ + "X_0XF5\0" /* 26887 */ + "X_0XFA\0" /* 26894 */ + "X_0XFF\0" /* 26901 */ + "Z_EXPORT_ENABLE\0" /* 26908 */ + "STENCIL_TEST_VAL_EXPORT_ENABLE\0" /* 26924 */ + "STENCIL_OP_VAL_EXPORT_ENABLE\0" /* 26955 */ + "LATE_Z\0" /* 26984 */ + "EARLY_Z_THEN_LATE_Z\0" /* 26991 */ + "RE_Z\0" /* 27011 */ + "EARLY_Z_THEN_RE_Z\0" /* 27016 */ + "KILL_ENABLE\0" /* 27034 */ + "COVERAGE_TO_MASK_ENABLE\0" /* 27046 */ + "MASK_EXPORT_ENABLE\0" /* 27070 */ + "EXEC_ON_HIER_FAIL\0" /* 27089 */ + "EXEC_ON_NOOP\0" /* 27107 */ + "ALPHA_TO_MASK_DISABLE\0" /* 27120 */ + "DEPTH_BEFORE_SHADER\0" /* 27142 */ + "EXPORT_ANY_Z\0" /* 27162 */ + "EXPORT_LESS_THAN_Z\0" /* 27175 */ + "EXPORT_GREATER_THAN_Z\0" /* 27194 */ + "EXPORT_RESERVED\0" /* 27216 */ + "CONSERVATIVE_Z_EXPORT\0" /* 27232 */ + "DUAL_QUAD_DISABLE\0" /* 27254 */ + "UCP_ENA_0\0" /* 27272 */ + "UCP_ENA_1\0" /* 27282 */ + "UCP_ENA_2\0" /* 27292 */ + "UCP_ENA_3\0" /* 27302 */ + "UCP_ENA_4\0" /* 27312 */ + "UCP_ENA_5\0" /* 27322 */ + "PS_UCP_Y_SCALE_NEG\0" /* 27332 */ + "PS_UCP_MODE\0" /* 27351 */ + "CLIP_DISABLE\0" /* 27363 */ + "UCP_CULL_ONLY_ENA\0" /* 27376 */ + "BOUNDARY_EDGE_FLAG_ENA\0" /* 27394 */ + "DX_CLIP_SPACE_DEF\0" /* 27417 */ + "DIS_CLIP_ERR_DETECT\0" /* 27435 */ + "VTX_KILL_OR\0" /* 27455 */ + "DX_RASTERIZATION_KILL\0" /* 27467 */ + "DX_LINEAR_ATTR_CLIP_ENA\0" /* 27489 */ + "VTE_VPORT_PROVOKE_DISABLE\0" /* 27513 */ + "ZCLIP_NEAR_DISABLE\0" /* 27539 */ + "ZCLIP_FAR_DISABLE\0" /* 27558 */ + "CULL_FRONT\0" /* 27576 */ + "CULL_BACK\0" /* 27587 */ + "FACE\0" /* 27597 */ + "X_DISABLE_POLY_MODE\0" /* 27602, 27612 */ + "X_DUAL_MODE\0" /* 27622 */ + "X_DRAW_POINTS\0" /* 27634 */ + "X_DRAW_LINES\0" /* 27648 */ + "X_DRAW_TRIANGLES\0" /* 27661 */ + "POLYMODE_FRONT_PTYPE\0" /* 27678 */ + "POLYMODE_BACK_PTYPE\0" /* 27699 */ + "POLY_OFFSET_FRONT_ENABLE\0" /* 27719 */ + "POLY_OFFSET_BACK_ENABLE\0" /* 27744 */ + "POLY_OFFSET_PARA_ENABLE\0" /* 27768 */ + "VTX_WINDOW_OFFSET_ENABLE\0" /* 27792 */ + "PROVOKING_VTX_LAST\0" /* 27817 */ + "PERSP_CORR_DIS\0" /* 27836 */ + "MULTI_PRIM_IB_ENA\0" /* 27851 */ + "VPORT_X_SCALE_ENA\0" /* 27869 */ + "VPORT_X_OFFSET_ENA\0" /* 27887 */ + "VPORT_Y_SCALE_ENA\0" /* 27906 */ + "VPORT_Y_OFFSET_ENA\0" /* 27924 */ + "VPORT_Z_SCALE_ENA\0" /* 27943 */ + "VPORT_Z_OFFSET_ENA\0" /* 27961 */ + "VTX_XY_FMT\0" /* 27980 */ + "VTX_Z_FMT\0" /* 27991 */ + "VTX_W0_FMT\0" /* 28001 */ + "CLIP_DIST_ENA_0\0" /* 28012 */ + "CLIP_DIST_ENA_1\0" /* 28028 */ + "CLIP_DIST_ENA_2\0" /* 28044 */ + "CLIP_DIST_ENA_3\0" /* 28060 */ + "CLIP_DIST_ENA_4\0" /* 28076 */ + "CLIP_DIST_ENA_5\0" /* 28092 */ + "CLIP_DIST_ENA_6\0" /* 28108 */ + "CLIP_DIST_ENA_7\0" /* 28124 */ + "CULL_DIST_ENA_0\0" /* 28140 */ + "CULL_DIST_ENA_1\0" /* 28156 */ + "CULL_DIST_ENA_2\0" /* 28172 */ + "CULL_DIST_ENA_3\0" /* 28188 */ + "CULL_DIST_ENA_4\0" /* 28204 */ + "CULL_DIST_ENA_5\0" /* 28220 */ + "CULL_DIST_ENA_6\0" /* 28236 */ + "CULL_DIST_ENA_7\0" /* 28252 */ + "USE_VTX_POINT_SIZE\0" /* 28268 */ + "USE_VTX_EDGE_FLAG\0" /* 28287 */ + "USE_VTX_RENDER_TARGET_INDX\0" /* 28305 */ + "USE_VTX_VIEWPORT_INDX\0" /* 28332 */ + "USE_VTX_KILL_FLAG\0" /* 28354 */ + "VS_OUT_MISC_VEC_ENA\0" /* 28372 */ + "VS_OUT_CCDIST0_VEC_ENA\0" /* 28392 */ + "VS_OUT_CCDIST1_VEC_ENA\0" /* 28415 */ + "VS_OUT_MISC_SIDE_BUS_ENA\0" /* 28438 */ + "USE_VTX_GS_CUT_FLAG\0" /* 28463 */ + "USE_VTX_LINE_WIDTH\0" /* 28483 */ + "VTE_XY_INF_DISCARD\0" /* 28502 */ + "VTE_Z_INF_DISCARD\0" /* 28521 */ + "VTE_W_INF_DISCARD\0" /* 28539 */ + "VTE_0XNANINF_IS_0\0" /* 28557 */ + "VTE_XY_NAN_RETAIN\0" /* 28575 */ + "VTE_Z_NAN_RETAIN\0" /* 28593 */ + "VTE_W_NAN_RETAIN\0" /* 28610 */ + "VTE_W_RECIP_NAN_IS_0\0" /* 28627 */ + "VS_XY_NAN_TO_INF\0" /* 28648 */ + "VS_XY_INF_RETAIN\0" /* 28665 */ + "VS_Z_NAN_TO_INF\0" /* 28682 */ + "VS_Z_INF_RETAIN\0" /* 28698 */ + "VS_W_NAN_TO_INF\0" /* 28714 */ + "VS_W_INF_RETAIN\0" /* 28730 */ + "VS_CLIP_DIST_INF_DISCARD\0" /* 28746 */ + "VTE_NO_OUTPUT_NEG_0\0" /* 28771 */ + "LINE_STIPPLE_RESET\0" /* 28791 */ + "EXPAND_FULL_LENGTH\0" /* 28810 */ + "FRACTIONAL_ACCUM\0" /* 28829 */ + "DIAMOND_ADJUST\0" /* 28846 */ + "TRIANGLE_FILTER_DISABLE\0" /* 28861 */ + "LINE_FILTER_DISABLE\0" /* 28885 */ + "POINT_FILTER_DISABLE\0" /* 28905 */ + "RECTANGLE_FILTER_DISABLE\0" /* 28926 */ + "TRIANGLE_EXPAND_ENA\0" /* 28951 */ + "LINE_EXPAND_ENA\0" /* 28971 */ + "POINT_EXPAND_ENA\0" /* 28987 */ + "RECTANGLE_EXPAND_ENA\0" /* 29004 */ + "PRIM_EXPAND_CONSTANT\0" /* 29025 */ + "XMAX_RIGHT_EXCLUSION\0" /* 29046 */ + "YMAX_BOTTOM_EXCLUSION\0" /* 29067 */ + "SMALL_PRIM_FILTER_ENABLE\0" /* 29089 */ + "MIN_SIZE\0" /* 29114 */ + "MAX_SIZE\0" /* 29123 */ + "LINE_PATTERN\0" /* 29132 */ + "REPEAT_COUNT\0" /* 29145 */ + "PATTERN_BIT_ORDER\0" /* 29158 */ + "AUTO_RESET_CNTL\0" /* 29176 */ + "VGT_OUTPATH_VTX_REUSE\0" /* 29192 */ + "VGT_OUTPATH_TESS_EN\0" /* 29214 */ + "VGT_OUTPATH_PASSTHRU\0" /* 29234 */ + "VGT_OUTPATH_GS_BLOCK\0" /* 29255 */ + "VGT_OUTPATH_HS_BLOCK\0" /* 29276 */ + "PATH_SELECT\0" /* 29297 */ + "TESS_MODE\0" /* 29309 */ + "REUSE_DEPTH\0" /* 29319 */ + "VGT_GRP_3D_POINT\0" /* 29331 */ + "VGT_GRP_3D_LINE\0" /* 29348 */ + "VGT_GRP_3D_TRI\0" /* 29364 */ + "VGT_GRP_3D_RECT\0" /* 29379 */ + "VGT_GRP_3D_QUAD\0" /* 29395 */ + "VGT_GRP_2D_COPY_RECT_V0\0" /* 29411 */ + "VGT_GRP_2D_COPY_RECT_V1\0" /* 29435 */ + "VGT_GRP_2D_COPY_RECT_V2\0" /* 29459 */ + "VGT_GRP_2D_COPY_RECT_V3\0" /* 29483 */ + "VGT_GRP_2D_FILL_RECT\0" /* 29507 */ + "VGT_GRP_2D_LINE\0" /* 29528 */ + "VGT_GRP_2D_TRI\0" /* 29544 */ + "VGT_GRP_PRIM_INDEX_LINE\0" /* 29559 */ + "VGT_GRP_PRIM_INDEX_TRI\0" /* 29583 */ + "VGT_GRP_PRIM_INDEX_QUAD\0" /* 29606 */ + "VGT_GRP_3D_LINE_ADJ\0" /* 29630 */ + "VGT_GRP_3D_TRI_ADJ\0" /* 29650 */ + "VGT_GRP_3D_PATCH\0" /* 29669 */ + "RETAIN_ORDER\0" /* 29686 */ + "RETAIN_QUADS\0" /* 29699 */ + "VGT_GRP_LIST\0" /* 29712 */ + "VGT_GRP_STRIP\0" /* 29725 */ + "VGT_GRP_FAN\0" /* 29739 */ + "VGT_GRP_LOOP\0" /* 29751 */ + "VGT_GRP_POLYGON\0" /* 29764 */ + "PRIM_ORDER\0" /* 29780 */ + "FIRST_DECR\0" /* 29797, 29791 */ + "COMP_X_EN\0" /* 29802 */ + "COMP_Y_EN\0" /* 29812 */ + "COMP_Z_EN\0" /* 29822 */ + "COMP_W_EN\0" /* 29832 */ + "SHIFT\0" /* 29842 */ + "VGT_GRP_INDEX_16\0" /* 29848 */ + "VGT_GRP_INDEX_32\0" /* 29865 */ + "VGT_GRP_UINT_16\0" /* 29882 */ + "VGT_GRP_UINT_32\0" /* 29898 */ + "VGT_GRP_SINT_16\0" /* 29914 */ + "VGT_GRP_SINT_32\0" /* 29930 */ + "VGT_GRP_FLOAT_32\0" /* 29946 */ + "VGT_GRP_AUTO_PRIM\0" /* 29963 */ + "VGT_GRP_FIX_1_23_TO_FLOAT\0" /* 29981 */ + "X_CONV\0" /* 30007 */ + "Y_CONV\0" /* 30014 */ + "Z_CONV\0" /* 30021 */ + "Z_OFFSET\0" /* 30028 */ + "W_CONV\0" /* 30037 */ + "W_OFFSET\0" /* 30044 */ + "GS_OFF\0" /* 30053 */ + "GS_SCENARIO_A\0" /* 30060 */ + "GS_SCENARIO_B\0" /* 30074 */ + "GS_SCENARIO_G\0" /* 30088 */ + "GS_SCENARIO_C\0" /* 30102 */ + "SPRITE_EN\0" /* 30116 */ + "GS_CUT_1024\0" /* 30126 */ + "GS_CUT_512\0" /* 30138 */ + "GS_CUT_256\0" /* 30149 */ + "GS_CUT_128\0" /* 30160 */ + "CUT_MODE\0" /* 30171 */ + "GS_C_PACK_EN\0" /* 30180 */ + "RESERVED_2\0" /* 30193 */ + "ES_PASSTHRU\0" /* 30204 */ + "COMPUTE_MODE\0" /* 30216 */ + "FAST_COMPUTE_MODE\0" /* 30229 */ + "ELEMENT_INFO_EN\0" /* 30247 */ + "PARTIAL_THD_AT_EOI\0" /* 30263 */ + "SUPPRESS_CUTS\0" /* 30282 */ + "ES_WRITE_OPTIMIZE\0" /* 30296 */ + "GS_WRITE_OPTIMIZE\0" /* 30314 */ + "X_0_OFFCHIP_GS\0" /* 30332 */ + "X_3_ES_AND_GS_ARE_ONCHIP\0" /* 30347, 30365 */ + "ES_VERTS_PER_SUBGRP\0" /* 30372 */ + "GS_PRIMS_PER_SUBGRP\0" /* 30392 */ + "MSAA_ENABLE\0" /* 30412 */ + "VPORT_SCISSOR_ENABLE\0" /* 30424 */ + "LINE_STIPPLE_ENABLE\0" /* 30445 */ + "SEND_UNLIT_STILES_TO_PKR\0" /* 30465 */ + "WALK_SIZE\0" /* 30490 */ + "WALK_ALIGNMENT\0" /* 30500 */ + "WALK_ALIGN8_PRIM_FITS_ST\0" /* 30515 */ + "WALK_FENCE_ENABLE\0" /* 30540 */ + "WALK_FENCE_SIZE\0" /* 30558 */ + "SUPERTILE_WALK_ORDER_ENABLE\0" /* 30579, 30574 */ + "TILE_COVER_DISABLE\0" /* 30602 */ + "TILE_COVER_NO_SCISSOR\0" /* 30621 */ + "ZMM_LINE_EXTENT\0" /* 30643 */ + "ZMM_LINE_OFFSET\0" /* 30659 */ + "ZMM_RECT_EXTENT\0" /* 30675 */ + "KILL_PIX_POST_HI_Z\0" /* 30691 */ + "KILL_PIX_POST_DETAIL_MASK\0" /* 30710 */ + "PS_ITER_SAMPLE\0" /* 30736 */ + "MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE\0" /* 30751 */ + "MULTI_GPU_SUPERTILE_ENABLE\0" /* 30791 */ + "GPU_ID_OVERRIDE_ENABLE\0" /* 30818 */ + "GPU_ID_OVERRIDE\0" /* 30841 */ + "MULTI_GPU_PRIM_DISCARD_ENABLE\0" /* 30857 */ + "FORCE_EOV_CNTDWN_ENABLE\0" /* 30887 */ + "FORCE_EOV_REZ_ENABLE\0" /* 30911 */ + "OUT_OF_ORDER_PRIMITIVE_ENABLE\0" /* 30932 */ + "OUT_OF_ORDER_WATER_MARK\0" /* 30962 */ + "GS_PER_ES\0" /* 30986 */ + "ES_PER_GS\0" /* 30996 */ + "GS_PER_VS\0" /* 31006 */ + "OUTPRIM_TYPE_POINTLIST\0" /* 31016 */ + "OUTPRIM_TYPE_LINESTRIP\0" /* 31039 */ + "OUTPRIM_TYPE_TRISTRIP\0" /* 31062 */ + "OUTPRIM_TYPE\0" /* 31084 */ + "OUTPRIM_TYPE_1\0" /* 31097 */ + "OUTPRIM_TYPE_2\0" /* 31112 */ + "OUTPRIM_TYPE_3\0" /* 31127 */ + "UNIQUE_TYPE_PER_STREAM\0" /* 31142 */ + "VGT_INDEX_16\0" /* 31165 */ + "VGT_INDEX_32\0" /* 31178 */ + "VGT_INDEX_8\0" /* 31191 */ + "VGT_DMA_SWAP_NONE\0" /* 31203 */ + "VGT_DMA_SWAP_16_BIT\0" /* 31221 */ + "VGT_DMA_SWAP_32_BIT\0" /* 31241 */ + "VGT_DMA_SWAP_WORD\0" /* 31261 */ + "SWAP_MODE\0" /* 31279 */ + "VGT_DMA_BUF_MEM\0" /* 31289 */ + "VGT_DMA_BUF_RING\0" /* 31305 */ + "VGT_DMA_BUF_SETUP\0" /* 31322 */ + "BUF_TYPE\0" /* 31340 */ + "VGT_POLICY_LRU\0" /* 31349 */ + "VGT_POLICY_STREAM\0" /* 31364 */ + "RDREQ_POLICY\0" /* 31382 */ + "RDREQ_POLICY_VI\0" /* 31395 */ + "REQ_PATH\0" /* 31411 */ + "PRIMITIVEID_EN\0" /* 31420 */ + "DISABLE_RESET_ON_EOI\0" /* 31435 */ + "SAMPLE_STREAMOUTSTATS1\0" /* 31456 */ + "SAMPLE_STREAMOUTSTATS2\0" /* 31479 */ + "SAMPLE_STREAMOUTSTATS3\0" /* 31502 */ + "CACHE_FLUSH_TS\0" /* 31525 */ + "CONTEXT_DONE\0" /* 31540 */ + "CACHE_FLUSH\0" /* 31553 */ + "CS_PARTIAL_FLUSH\0" /* 31565 */ + "VGT_STREAMOUT_SYNC\0" /* 31582 */ + "VGT_STREAMOUT_RESET\0" /* 31601 */ + "END_OF_PIPE_INCR_DE\0" /* 31621 */ + "END_OF_PIPE_IB_END\0" /* 31641 */ + "RST_PIX_CNT\0" /* 31660 */ + "VS_PARTIAL_FLUSH\0" /* 31672 */ + "PS_PARTIAL_FLUSH\0" /* 31689 */ + "FLUSH_HS_OUTPUT\0" /* 31706 */ + "FLUSH_LS_OUTPUT\0" /* 31722 */ + "CACHE_FLUSH_AND_INV_TS_EVENT\0" /* 31738 */ + "ZPASS_DONE\0" /* 31767 */ + "CACHE_FLUSH_AND_INV_EVENT\0" /* 31778 */ + "PERFCOUNTER_START\0" /* 31804 */ + "PERFCOUNTER_STOP\0" /* 31822 */ + "PIPELINESTAT_START\0" /* 31839 */ + "PIPELINESTAT_STOP\0" /* 31858 */ + "PERFCOUNTER_SAMPLE\0" /* 31876 */ + "FLUSH_ES_OUTPUT\0" /* 31895 */ + "FLUSH_GS_OUTPUT\0" /* 31911 */ + "SAMPLE_PIPELINESTAT\0" /* 31927 */ + "SO_VGTSTREAMOUT_FLUSH\0" /* 31947 */ + "SAMPLE_STREAMOUTSTATS\0" /* 31969 */ + "RESET_VTX_CNT\0" /* 31991 */ + "BLOCK_CONTEXT_DONE\0" /* 32005 */ + "CS_CONTEXT_DONE\0" /* 32024 */ + "VGT_FLUSH\0" /* 32040 */ + "SC_SEND_DB_VPZ\0" /* 32050 */ + "BOTTOM_OF_PIPE_TS\0" /* 32065 */ + "DB_CACHE_FLUSH_AND_INV\0" /* 32083 */ + "FLUSH_AND_INV_DB_DATA_TS\0" /* 32106 */ + "FLUSH_AND_INV_DB_META\0" /* 32131 */ + "FLUSH_AND_INV_CB_DATA_TS\0" /* 32153 */ + "FLUSH_AND_INV_CB_META\0" /* 32178 */ + "FLUSH_AND_INV_CB_PIXEL_DATA\0" /* 32200 */ + "THREAD_TRACE_START\0" /* 32228 */ + "THREAD_TRACE_STOP\0" /* 32247 */ + "THREAD_TRACE_MARKER\0" /* 32265 */ + "THREAD_TRACE_FLUSH\0" /* 32285 */ + "THREAD_TRACE_FINISH\0" /* 32304 */ + "PIXEL_PIPE_STAT_CONTROL\0" /* 32324 */ + "PIXEL_PIPE_STAT_DUMP\0" /* 32348 */ + "PIXEL_PIPE_STAT_RESET\0" /* 32369 */ + "EVENT_TYPE\0" /* 32391 */ + "EXTENDED_EVENT\0" /* 32402 */ + "RESET_EN\0" /* 32417 */ + "PRIMGROUP_SIZE\0" /* 32426 */ + "PARTIAL_VS_WAVE_ON\0" /* 32441 */ + "SWITCH_ON_EOP\0" /* 32460 */ + "PARTIAL_ES_WAVE_ON\0" /* 32474 */ + "SWITCH_ON_EOI\0" /* 32493 */ + "WD_SWITCH_ON_EOP\0" /* 32507 */ + "MAX_PRIMGRP_IN_WAVE\0" /* 32524 */ + "ITEMSIZE\0" /* 32544 */ + "REUSE_OFF\0" /* 32553 */ + "VTX_CNT_EN\0" /* 32563 */ + "FULL_CACHE\0" /* 32574 */ + "HTILE_USES_PRELOAD_WIN\0" /* 32585 */ + "PRELOAD\0" /* 32608 */ + "PREFETCH_WIDTH\0" /* 32616 */ + "PREFETCH_HEIGHT\0" /* 32631 */ + "DST_OUTSIDE_ZERO_TO_ONE\0" /* 32647 */ + "TC_COMPATIBLE\0" /* 32671 */ + "COMPAREFUNC0\0" /* 32685 */ + "COMPAREVALUE0\0" /* 32698 */ + "COMPAREMASK0\0" /* 32712 */ + "COMPAREFUNC1\0" /* 32725 */ + "COMPAREVALUE1\0" /* 32738 */ + "COMPAREMASK1\0" /* 32752 */ + "START_X\0" /* 32765 */ + "START_Y\0" /* 32773 */ + "MAX_X\0" /* 32781 */ + "MAX_Y\0" /* 32787 */ + "VERTEX_STRIDE\0" /* 32793 */ + "MAX_VERT_OUT\0" /* 32807 */ + "ACCUM_ISOLINE\0" /* 32820 */ + "ACCUM_TRI\0" /* 32834 */ + "ACCUM_QUAD\0" /* 32844 */ + "DONUT_SPLIT\0" /* 32855 */ + "TRAP_SPLIT\0" /* 32867 */ + "LS_STAGE_OFF\0" /* 32878 */ + "LS_STAGE_ON\0" /* 32891 */ + "CS_STAGE_ON\0" /* 32903 */ + "ES_STAGE_OFF\0" /* 32915 */ + "ES_STAGE_DS\0" /* 32928 */ + "ES_STAGE_REAL\0" /* 32940 */ + "VS_STAGE_REAL\0" /* 32954 */ + "VS_STAGE_DS\0" /* 32968 */ + "VS_STAGE_COPY_SHADER\0" /* 32980 */ + "DYNAMIC_HS\0" /* 33001 */ + "DIS_DEALLOC_ACCUM_0\0" /* 33012 */ + "DIS_DEALLOC_ACCUM_1\0" /* 33032 */ + "VS_WAVE_ID_EN\0" /* 33052 */ + "NUM_PATCHES\0" /* 33066 */ + "HS_NUM_INPUT_CP\0" /* 33078 */ + "HS_NUM_OUTPUT_CP\0" /* 33094 */ + "TESS_ISOLINE\0" /* 33111 */ + "TESS_TRIANGLE\0" /* 33124 */ + "TESS_QUAD\0" /* 33138 */ + "PART_INTEGER\0" /* 33148 */ + "PART_POW2\0" /* 33161 */ + "PART_FRAC_ODD\0" /* 33171 */ + "PART_FRAC_EVEN\0" /* 33185 */ + "PARTITIONING\0" /* 33200 */ + "OUTPUT_POINT\0" /* 33213 */ + "OUTPUT_LINE\0" /* 33226 */ + "OUTPUT_TRIANGLE_CW\0" /* 33238 */ + "OUTPUT_TRIANGLE_CCW\0" /* 33257 */ + "TOPOLOGY\0" /* 33277 */ + "RESERVED_REDUC_AXIS\0" /* 33286 */ + "DEPRECATED\0" /* 33306 */ + "NUM_DS_WAVES_PER_SIMD\0" /* 33317 */ + "DISABLE_DONUTS\0" /* 33339 */ + "VGT_POLICY_BYPASS\0" /* 33354 */ + "DISTRIBUTION_MODE_NO_DIST\0" /* 33372 */ + "DISTRIBUTION_MODE_PATCHES\0" /* 33398 */ + "DISTRIBUTION_MODE_DONUTS\0" /* 33424 */ + "DISTRIBUTION_MODE_TRAPEZOIDS\0" /* 33449 */ + "DISTRIBUTION_MODE\0" /* 33478 */ + "ALPHA_TO_MASK_ENABLE\0" /* 33496 */ + "ALPHA_TO_MASK_OFFSET0\0" /* 33517 */ + "ALPHA_TO_MASK_OFFSET1\0" /* 33539 */ + "ALPHA_TO_MASK_OFFSET2\0" /* 33561 */ + "ALPHA_TO_MASK_OFFSET3\0" /* 33583 */ + "OFFSET_ROUND\0" /* 33605 */ + "POLY_OFFSET_NEG_NUM_DB_BITS\0" /* 33618 */ + "POLY_OFFSET_DB_IS_FLOAT_FMT\0" /* 33646 */ + "STREAMOUT_0_EN\0" /* 33674 */ + "STREAMOUT_1_EN\0" /* 33689 */ + "STREAMOUT_2_EN\0" /* 33704 */ + "STREAMOUT_3_EN\0" /* 33719 */ + "RAST_STREAM\0" /* 33734 */ + "RAST_STREAM_MASK\0" /* 33746 */ + "USE_RAST_STREAM_MASK\0" /* 33763 */ + "STREAM_0_BUFFER_EN\0" /* 33784 */ + "STREAM_1_BUFFER_EN\0" /* 33803 */ + "STREAM_2_BUFFER_EN\0" /* 33822 */ + "STREAM_3_BUFFER_EN\0" /* 33841 */ + "DISTANCE_0\0" /* 33860 */ + "DISTANCE_1\0" /* 33871 */ + "DISTANCE_2\0" /* 33882 */ + "DISTANCE_3\0" /* 33893 */ + "DISTANCE_4\0" /* 33904 */ + "DISTANCE_5\0" /* 33915 */ + "DISTANCE_6\0" /* 33926 */ + "DISTANCE_7\0" /* 33937 */ + "DISTANCE_8\0" /* 33948 */ + "DISTANCE_9\0" /* 33959 */ + "DISTANCE_10\0" /* 33970 */ + "DISTANCE_11\0" /* 33982 */ + "DISTANCE_12\0" /* 33994 */ + "DISTANCE_13\0" /* 34006 */ + "DISTANCE_14\0" /* 34018 */ + "DISTANCE_15\0" /* 34030 */ + "EXPAND_LINE_WIDTH\0" /* 34042 */ + "LAST_PIXEL\0" /* 34060 */ + "PERPENDICULAR_ENDCAP_ENA\0" /* 34071 */ + "DX10_DIAMOND_TEST_ENA\0" /* 34096 */ + "MSAA_NUM_SAMPLES\0" /* 34118 */ + "AA_MASK_CENTROID_DTMN\0" /* 34135 */ + "MAX_SAMPLE_DIST\0" /* 34157 */ + "MSAA_EXPOSED_SAMPLES\0" /* 34173 */ + "DETAIL_TO_EXPOSED_MODE\0" /* 34194 */ + "PIX_CENTER\0" /* 34217 */ + "X_TRUNCATE\0" /* 34228 */ + "X_ROUND\0" /* 34239 */ + "X_ROUND_TO_EVEN\0" /* 34247 */ + "X_ROUND_TO_ODD\0" /* 34263 */ + "ROUND_MODE\0" /* 34278 */ + "X_16_8_FIXED_POINT_1_16TH\0" /* 34289 */ + "X_16_8_FIXED_POINT_1_8TH\0" /* 34315 */ + "X_16_8_FIXED_POINT_1_4TH\0" /* 34340 */ + "X_16_8_FIXED_POINT_1_2\0" /* 34365 */ + "X_16_8_FIXED_POINT_1\0" /* 34388 */ + "X_16_8_FIXED_POINT_1_256TH\0" /* 34409 */ + "X_14_10_FIXED_POINT_1_1024TH\0" /* 34436 */ + "X_12_12_FIXED_POINT_1_4096TH\0" /* 34465 */ + "QUANT_MODE\0" /* 34494 */ + "S0_X\0" /* 34505 */ + "S0_Y\0" /* 34510 */ + "S1_X\0" /* 34515 */ + "S1_Y\0" /* 34520 */ + "S2_X\0" /* 34525 */ + "S2_Y\0" /* 34530 */ + "S3_X\0" /* 34535 */ + "S3_Y\0" /* 34540 */ + "S4_X\0" /* 34545 */ + "S4_Y\0" /* 34550 */ + "S5_X\0" /* 34555 */ + "S5_Y\0" /* 34560 */ + "S6_X\0" /* 34565 */ + "S6_Y\0" /* 34570 */ + "S7_X\0" /* 34575 */ + "S7_Y\0" /* 34580 */ + "S8_X\0" /* 34585 */ + "S8_Y\0" /* 34590 */ + "S9_X\0" /* 34595 */ + "S9_Y\0" /* 34600 */ + "S10_X\0" /* 34605 */ + "S10_Y\0" /* 34611 */ + "S11_X\0" /* 34617 */ + "S11_Y\0" /* 34623 */ + "S12_X\0" /* 34629 */ + "S12_Y\0" /* 34635 */ + "S13_X\0" /* 34641 */ + "S13_Y\0" /* 34647 */ + "S14_X\0" /* 34653 */ + "S14_Y\0" /* 34659 */ + "S15_X\0" /* 34665 */ + "S15_Y\0" /* 34671 */ + "AA_MASK_X0Y0\0" /* 34677 */ + "AA_MASK_X1Y0\0" /* 34690 */ + "AA_MASK_X0Y1\0" /* 34703 */ + "AA_MASK_X1Y1\0" /* 34716 */ + "REALIGN_DQUADS_AFTER_N_WAVES\0" /* 34729 */ + "VTX_REUSE_DEPTH\0" /* 34758 */ + "DEALLOC_DIST\0" /* 34774 */ + "FMASK_TILE_MAX\0" /* 34787 */ + "ENDIAN_NONE\0" /* 34802 */ + "ENDIAN_8IN16\0" /* 34814 */ + "ENDIAN_8IN32\0" /* 34827 */ + "ENDIAN_8IN64\0" /* 34840 */ + "ENDIAN\0" /* 34853 */ + "COLOR_INVALID\0" /* 34860 */ + "COLOR_8\0" /* 34874 */ + "COLOR_16\0" /* 34882 */ + "COLOR_8_8\0" /* 34891 */ + "COLOR_32\0" /* 34901 */ + "COLOR_16_16\0" /* 34910 */ + "COLOR_10_11_11\0" /* 34922 */ + "COLOR_11_11_10\0" /* 34937 */ + "COLOR_10_10_10_2\0" /* 34952 */ + "COLOR_2_10_10_10\0" /* 34969 */ + "COLOR_8_8_8_8\0" /* 34986 */ + "COLOR_32_32\0" /* 35000 */ + "COLOR_16_16_16_16\0" /* 35012 */ + "COLOR_32_32_32_32\0" /* 35030 */ + "COLOR_5_6_5\0" /* 35048 */ + "COLOR_1_5_5_5\0" /* 35060 */ + "COLOR_5_5_5_1\0" /* 35074 */ + "COLOR_4_4_4_4\0" /* 35088 */ + "COLOR_8_24\0" /* 35102 */ + "COLOR_24_8\0" /* 35113 */ + "COLOR_X24_8_32_FLOAT\0" /* 35124 */ + "NUMBER_UNORM\0" /* 35145 */ + "NUMBER_SNORM\0" /* 35158 */ + "NUMBER_UINT\0" /* 35171 */ + "NUMBER_SINT\0" /* 35183 */ + "NUMBER_SRGB\0" /* 35195 */ + "NUMBER_FLOAT\0" /* 35207 */ + "NUMBER_TYPE\0" /* 35220 */ + "SWAP_STD\0" /* 35232 */ + "SWAP_ALT\0" /* 35241 */ + "SWAP_STD_REV\0" /* 35250 */ + "SWAP_ALT_REV\0" /* 35263 */ + "COMP_SWAP\0" /* 35276 */ + "BLEND_CLAMP\0" /* 35286 */ + "BLEND_BYPASS\0" /* 35298 */ + "SIMPLE_FLOAT\0" /* 35311 */ + "CMASK_IS_LINEAR\0" /* 35324 */ + "FORCE_OPT_AUTO\0" /* 35340 */ + "FORCE_OPT_DISABLE\0" /* 35355 */ + "FORCE_OPT_ENABLE_IF_SRC_A_0\0" /* 35373 */ + "FORCE_OPT_ENABLE_IF_SRC_RGB_0\0" /* 35401 */ + "FORCE_OPT_ENABLE_IF_SRC_ARGB_0\0" /* 35431 */ + "FORCE_OPT_ENABLE_IF_SRC_A_1\0" /* 35462 */ + "FORCE_OPT_ENABLE_IF_SRC_RGB_1\0" /* 35490 */ + "FORCE_OPT_ENABLE_IF_SRC_ARGB_1\0" /* 35520 */ + "BLEND_OPT_DONT_RD_DST\0" /* 35551 */ + "BLEND_OPT_DISCARD_PIXEL\0" /* 35573 */ + "FMASK_COMPRESSION_DISABLE\0" /* 35597 */ + "FMASK_COMPRESS_1FRAG_ONLY\0" /* 35623 */ + "DCC_ENABLE\0" /* 35649 */ + "CMASK_ADDR_TYPE\0" /* 35660 */ + "FMASK_TILE_MODE_INDEX\0" /* 35676 */ + "FMASK_BANK_HEIGHT\0" /* 35698 */ + "NUM_FRAGMENTS\0" /* 35716 */ + "FORCE_DST_ALPHA_1\0" /* 35730 */ + "KEY_CLEAR_ENABLE\0" /* 35748 */ + "MAX_UNCOMPRESSED_BLOCK_SIZE\0" /* 35765 */ + "MIN_COMPRESSED_BLOCK_SIZE\0" /* 35793 */ + "MAX_COMPRESSED_BLOCK_SIZE\0" /* 35819 */ + "INDEPENDENT_64B_BLOCKS\0" /* 35845 */ + "LOSSY_RGB_PRECISION\0" /* 35868 */ + "LOSSY_ALPHA_PRECISION\0" /* 35888 */ + "DRAW_INDEX_LOC\0" /* 35910 */ + "IB_BASE_LO\0" /* 35925 */ + "IB_BASE_HI\0" /* 35936 */ + "CP_DMA_WORD0\0" /* 35947 */ + "CP_DMA_WORD1\0" /* 35960 */ + "CP_DMA_WORD2\0" /* 35973 */ + "CP_DMA_WORD3\0" /* 35986 */ + "COMMAND\0" /* 35999 */ + "DMA_DATA_WORD0\0" /* 36007 */ + "SRBM_STATUS2\0" /* 36022 */ + "SRBM_STATUS\0" /* 36035 */ + "SRBM_STATUS3\0" /* 36047 */ + "SDMA0_STATUS_REG\0" /* 36060 */ + "SDMA1_STATUS_REG\0" /* 36077 */ + "GRBM_STATUS2\0" /* 36094 */ + "GRBM_STATUS\0" /* 36107 */ + "CP_STRMOUT_CNTL\0" /* 36119 */ + "CP_COHER_CNTL\0" /* 36135 */ + "CP_COHER_SIZE\0" /* 36149 */ + "CP_COHER_BASE\0" /* 36163 */ + "GRBM_STATUS_SE0\0" /* 36177 */ + "GRBM_STATUS_SE1\0" /* 36193 */ + "GRBM_STATUS_SE2\0" /* 36209 */ + "GRBM_STATUS_SE3\0" /* 36225 */ + "CP_COHER_BASE_HI\0" /* 36241 */ + "CP_COHER_START_DELAY\0" /* 36258 */ + "CP_COHER_STATUS\0" /* 36279 */ + "CP_CPC_STATUS\0" /* 36295 */ + "CP_CPC_BUSY_STAT\0" /* 36309 */ + "CP_CPC_STALLED_STAT1\0" /* 36326 */ + "CP_CPF_STATUS\0" /* 36347 */ + "CP_CPF_BUSY_STAT\0" /* 36361 */ + "CP_CPF_STALLED_STAT1\0" /* 36378 */ + "CP_COHER_SIZE_HI\0" /* 36399 */ + "VGT_VTX_VECT_EJECT_REG\0" /* 36416 */ + "VGT_CACHE_INVALIDATION\0" /* 36439 */ + "VGT_ESGS_RING_SIZE\0" /* 36462 */ + "VGT_GSVS_RING_SIZE\0" /* 36481 */ + "VGT_GS_VERTEX_REUSE\0" /* 36500 */ + "VGT_PRIMITIVE_TYPE\0" /* 36520 */ + "VGT_INDEX_TYPE\0" /* 36539 */ + "VGT_STRMOUT_BUFFER_FILLED_SIZE_0\0" /* 36554 */ + "VGT_STRMOUT_BUFFER_FILLED_SIZE_1\0" /* 36587 */ + "VGT_STRMOUT_BUFFER_FILLED_SIZE_2\0" /* 36620 */ + "VGT_STRMOUT_BUFFER_FILLED_SIZE_3\0" /* 36653 */ + "VGT_NUM_INDICES\0" /* 36686 */ + "VGT_NUM_INSTANCES\0" /* 36702 */ + "VGT_TF_RING_SIZE\0" /* 36720 */ + "VGT_HS_OFFCHIP_PARAM\0" /* 36737 */ + "VGT_TF_MEMORY_BASE\0" /* 36758 */ + "PA_CL_ENHANCE\0" /* 36777 */ + "PA_SU_LINE_STIPPLE_VALUE\0" /* 36791 */ + "PA_SC_LINE_STIPPLE_STATE\0" /* 36816 */ + "CP_STALLED_STAT3\0" /* 36841 */ + "CP_STALLED_STAT1\0" /* 36858 */ + "CP_STALLED_STAT2\0" /* 36875 */ + "CP_STAT\0" /* 36892 */ + "GRBM_GFX_INDEX\0" /* 36900 */ + "PA_SC_SCREEN_EXTENT_MIN_0\0" /* 36915 */ + "PA_SC_SCREEN_EXTENT_MAX_0\0" /* 36941 */ + "PA_SC_SCREEN_EXTENT_MIN_1\0" /* 36967 */ + "PA_SC_SCREEN_EXTENT_MAX_1\0" /* 36993 */ + "PA_SC_ENHANCE\0" /* 37019 */ + "SQC_CACHES\0" /* 37033 */ + "SQ_RANDOM_WAVE_PRI\0" /* 37044 */ + "SQ_EXP_0\0" /* 37063 */ + "TA_CS_BC_BASE_ADDR\0" /* 37072 */ + "TA_CS_BC_BASE_ADDR_HI\0" /* 37091 */ + "DB_OCCLUSION_COUNT0_LOW\0" /* 37113 */ + "SQ_BUF_RSRC_WORD0\0" /* 37137 */ + "DB_OCCLUSION_COUNT0_HI\0" /* 37155 */ + "SQ_BUF_RSRC_WORD1\0" /* 37178 */ + "DB_OCCLUSION_COUNT1_LOW\0" /* 37196 */ + "SQ_BUF_RSRC_WORD2\0" /* 37220 */ + "DB_OCCLUSION_COUNT1_HI\0" /* 37238 */ + "SQ_BUF_RSRC_WORD3\0" /* 37261 */ + "DB_OCCLUSION_COUNT2_LOW\0" /* 37279 */ + "SQ_IMG_RSRC_WORD0\0" /* 37303 */ + "DB_OCCLUSION_COUNT2_HI\0" /* 37321 */ + "SQ_IMG_RSRC_WORD1\0" /* 37344 */ + "DB_OCCLUSION_COUNT3_LOW\0" /* 37362 */ + "SQ_IMG_RSRC_WORD2\0" /* 37386 */ + "DB_OCCLUSION_COUNT3_HI\0" /* 37404 */ + "SQ_IMG_RSRC_WORD3\0" /* 37427 */ + "SQ_IMG_RSRC_WORD4\0" /* 37445 */ + "SQ_IMG_RSRC_WORD5\0" /* 37463 */ + "SQ_IMG_RSRC_WORD6\0" /* 37481 */ + "SQ_IMG_RSRC_WORD7\0" /* 37499 */ + "SQ_IMG_SAMP_WORD0\0" /* 37517 */ + "SQ_IMG_SAMP_WORD1\0" /* 37535 */ + "SQ_IMG_SAMP_WORD2\0" /* 37553 */ + "SQ_IMG_SAMP_WORD3\0" /* 37571 */ + "SPI_DYN_GPR_LOCK_EN\0" /* 37589 */ + "SPI_STATIC_THREAD_MGMT_1\0" /* 37609 */ + "SPI_STATIC_THREAD_MGMT_2\0" /* 37634 */ + "SPI_STATIC_THREAD_MGMT_3\0" /* 37659 */ + "SPI_PS_MAX_WAVE_ID\0" /* 37684 */ + "SPI_ARB_PRIORITY\0" /* 37703 */ + "SPI_ARB_CYCLES_0\0" /* 37720 */ + "SPI_ARB_CYCLES_1\0" /* 37737 */ + "SQ_FLAT_SCRATCH_WORD0\0" /* 37754 */ + "SQ_FLAT_SCRATCH_WORD1\0" /* 37776 */ + "DB_ZPASS_COUNT_LOW\0" /* 37798 */ + "DB_ZPASS_COUNT_HI\0" /* 37817 */ + "SPI_CONFIG_CNTL\0" /* 37835 */ + "SPI_CONFIG_CNTL_1\0" /* 37851 */ + "SPI_RESOURCE_RESERVE_CU_AB_0\0" /* 37869 */ + "DB_SUBTILE_CONTROL\0" /* 37898 */ + "GB_ADDR_CONFIG\0" /* 37917 */ + "GB_TILE_MODE0\0" /* 37932 */ + "GB_TILE_MODE1\0" /* 37946 */ + "GB_TILE_MODE2\0" /* 37960 */ + "GB_TILE_MODE3\0" /* 37974 */ + "GB_TILE_MODE4\0" /* 37988 */ + "GB_TILE_MODE5\0" /* 38002 */ + "GB_TILE_MODE6\0" /* 38016 */ + "GB_TILE_MODE7\0" /* 38030 */ + "GB_TILE_MODE8\0" /* 38044 */ + "GB_TILE_MODE9\0" /* 38058 */ + "GB_TILE_MODE10\0" /* 38072 */ + "GB_TILE_MODE11\0" /* 38087 */ + "GB_TILE_MODE12\0" /* 38102 */ + "GB_TILE_MODE13\0" /* 38117 */ + "GB_TILE_MODE14\0" /* 38132 */ + "GB_TILE_MODE15\0" /* 38147 */ + "GB_TILE_MODE16\0" /* 38162 */ + "GB_TILE_MODE17\0" /* 38177 */ + "GB_TILE_MODE18\0" /* 38192 */ + "GB_TILE_MODE19\0" /* 38207 */ + "GB_TILE_MODE20\0" /* 38222 */ + "GB_TILE_MODE21\0" /* 38237 */ + "GB_TILE_MODE22\0" /* 38252 */ + "GB_TILE_MODE23\0" /* 38267 */ + "GB_TILE_MODE24\0" /* 38282 */ + "GB_TILE_MODE25\0" /* 38297 */ + "GB_TILE_MODE26\0" /* 38312 */ + "GB_TILE_MODE27\0" /* 38327 */ + "GB_TILE_MODE28\0" /* 38342 */ + "GB_TILE_MODE29\0" /* 38357 */ + "GB_TILE_MODE30\0" /* 38372 */ + "GB_TILE_MODE31\0" /* 38387 */ + "GB_MACROTILE_MODE0\0" /* 38402 */ + "GB_MACROTILE_MODE1\0" /* 38421 */ + "GB_MACROTILE_MODE2\0" /* 38440 */ + "GB_MACROTILE_MODE3\0" /* 38459 */ + "GB_MACROTILE_MODE4\0" /* 38478 */ + "GB_MACROTILE_MODE5\0" /* 38497 */ + "GB_MACROTILE_MODE6\0" /* 38516 */ + "GB_MACROTILE_MODE7\0" /* 38535 */ + "GB_MACROTILE_MODE8\0" /* 38554 */ + "GB_MACROTILE_MODE9\0" /* 38573 */ + "GB_MACROTILE_MODE10\0" /* 38592 */ + "GB_MACROTILE_MODE11\0" /* 38612 */ + "GB_MACROTILE_MODE12\0" /* 38632 */ + "GB_MACROTILE_MODE13\0" /* 38652 */ + "GB_MACROTILE_MODE14\0" /* 38672 */ + "GB_MACROTILE_MODE15\0" /* 38692 */ + "SPI_SHADER_TBA_LO_PS\0" /* 38712 */ + "SPI_SHADER_TBA_HI_PS\0" /* 38733 */ + "SPI_SHADER_TMA_LO_PS\0" /* 38754 */ + "SPI_SHADER_TMA_HI_PS\0" /* 38775 */ + "SPI_SHADER_PGM_RSRC3_PS\0" /* 38796 */ + "SPI_SHADER_PGM_LO_PS\0" /* 38820 */ + "SPI_SHADER_PGM_HI_PS\0" /* 38841 */ + "SPI_SHADER_PGM_RSRC1_PS\0" /* 38862 */ + "SPI_SHADER_PGM_RSRC2_PS\0" /* 38886 */ + "SPI_SHADER_USER_DATA_PS_0\0" /* 38910 */ + "SPI_SHADER_USER_DATA_PS_1\0" /* 38936 */ + "SPI_SHADER_USER_DATA_PS_2\0" /* 38962 */ + "SPI_SHADER_USER_DATA_PS_3\0" /* 38988 */ + "SPI_SHADER_USER_DATA_PS_4\0" /* 39014 */ + "SPI_SHADER_USER_DATA_PS_5\0" /* 39040 */ + "SPI_SHADER_USER_DATA_PS_6\0" /* 39066 */ + "SPI_SHADER_USER_DATA_PS_7\0" /* 39092 */ + "SPI_SHADER_USER_DATA_PS_8\0" /* 39118 */ + "SPI_SHADER_USER_DATA_PS_9\0" /* 39144 */ + "SPI_SHADER_USER_DATA_PS_10\0" /* 39170 */ + "SPI_SHADER_USER_DATA_PS_11\0" /* 39197 */ + "SPI_SHADER_USER_DATA_PS_12\0" /* 39224 */ + "SPI_SHADER_USER_DATA_PS_13\0" /* 39251 */ + "SPI_SHADER_USER_DATA_PS_14\0" /* 39278 */ + "SPI_SHADER_USER_DATA_PS_15\0" /* 39305 */ + "SPI_SHADER_TBA_LO_VS\0" /* 39332 */ + "SPI_SHADER_TBA_HI_VS\0" /* 39353 */ + "SPI_SHADER_TMA_LO_VS\0" /* 39374 */ + "SPI_SHADER_TMA_HI_VS\0" /* 39395 */ + "SPI_SHADER_PGM_RSRC3_VS\0" /* 39416 */ + "SPI_SHADER_LATE_ALLOC_VS\0" /* 39440 */ + "SPI_SHADER_PGM_LO_VS\0" /* 39465 */ + "SPI_SHADER_PGM_HI_VS\0" /* 39486 */ + "SPI_SHADER_PGM_RSRC1_VS\0" /* 39507 */ + "SPI_SHADER_PGM_RSRC2_VS\0" /* 39531 */ + "SPI_SHADER_USER_DATA_VS_0\0" /* 39555 */ + "SPI_SHADER_USER_DATA_VS_1\0" /* 39581 */ + "SPI_SHADER_USER_DATA_VS_2\0" /* 39607 */ + "SPI_SHADER_USER_DATA_VS_3\0" /* 39633 */ + "SPI_SHADER_USER_DATA_VS_4\0" /* 39659 */ + "SPI_SHADER_USER_DATA_VS_5\0" /* 39685 */ + "SPI_SHADER_USER_DATA_VS_6\0" /* 39711 */ + "SPI_SHADER_USER_DATA_VS_7\0" /* 39737 */ + "SPI_SHADER_USER_DATA_VS_8\0" /* 39763 */ + "SPI_SHADER_USER_DATA_VS_9\0" /* 39789 */ + "SPI_SHADER_USER_DATA_VS_10\0" /* 39815 */ + "SPI_SHADER_USER_DATA_VS_11\0" /* 39842 */ + "SPI_SHADER_USER_DATA_VS_12\0" /* 39869 */ + "SPI_SHADER_USER_DATA_VS_13\0" /* 39896 */ + "SPI_SHADER_USER_DATA_VS_14\0" /* 39923 */ + "SPI_SHADER_USER_DATA_VS_15\0" /* 39950 */ + "SPI_SHADER_TBA_LO_GS\0" /* 39977 */ + "SPI_SHADER_TBA_HI_GS\0" /* 39998 */ + "SPI_SHADER_TMA_LO_GS\0" /* 40019 */ + "SPI_SHADER_TMA_HI_GS\0" /* 40040 */ + "SPI_SHADER_PGM_RSRC3_GS\0" /* 40061 */ + "SPI_SHADER_PGM_LO_GS\0" /* 40085 */ + "SPI_SHADER_PGM_HI_GS\0" /* 40106 */ + "SPI_SHADER_PGM_RSRC1_GS\0" /* 40127 */ + "SPI_SHADER_PGM_RSRC2_GS\0" /* 40151 */ + "SPI_SHADER_USER_DATA_GS_0\0" /* 40175 */ + "SPI_SHADER_USER_DATA_GS_1\0" /* 40201 */ + "SPI_SHADER_USER_DATA_GS_2\0" /* 40227 */ + "SPI_SHADER_USER_DATA_GS_3\0" /* 40253 */ + "SPI_SHADER_USER_DATA_GS_4\0" /* 40279 */ + "SPI_SHADER_USER_DATA_GS_5\0" /* 40305 */ + "SPI_SHADER_USER_DATA_GS_6\0" /* 40331 */ + "SPI_SHADER_USER_DATA_GS_7\0" /* 40357 */ + "SPI_SHADER_USER_DATA_GS_8\0" /* 40383 */ + "SPI_SHADER_USER_DATA_GS_9\0" /* 40409 */ + "SPI_SHADER_USER_DATA_GS_10\0" /* 40435 */ + "SPI_SHADER_USER_DATA_GS_11\0" /* 40462 */ + "SPI_SHADER_USER_DATA_GS_12\0" /* 40489 */ + "SPI_SHADER_USER_DATA_GS_13\0" /* 40516 */ + "SPI_SHADER_USER_DATA_GS_14\0" /* 40543 */ + "SPI_SHADER_USER_DATA_GS_15\0" /* 40570 */ + "SPI_SHADER_TBA_LO_ES\0" /* 40597 */ + "SPI_SHADER_TBA_HI_ES\0" /* 40618 */ + "SPI_SHADER_TMA_LO_ES\0" /* 40639 */ + "SPI_SHADER_TMA_HI_ES\0" /* 40660 */ + "SPI_SHADER_PGM_RSRC3_ES\0" /* 40681 */ + "SPI_SHADER_PGM_LO_ES\0" /* 40705 */ + "SPI_SHADER_PGM_HI_ES\0" /* 40726 */ + "SPI_SHADER_PGM_RSRC1_ES\0" /* 40747 */ + "SPI_SHADER_PGM_RSRC2_ES\0" /* 40771 */ + "SPI_SHADER_USER_DATA_ES_0\0" /* 40795 */ + "SPI_SHADER_USER_DATA_ES_1\0" /* 40821 */ + "SPI_SHADER_USER_DATA_ES_2\0" /* 40847 */ + "SPI_SHADER_USER_DATA_ES_3\0" /* 40873 */ + "SPI_SHADER_USER_DATA_ES_4\0" /* 40899 */ + "SPI_SHADER_USER_DATA_ES_5\0" /* 40925 */ + "SPI_SHADER_USER_DATA_ES_6\0" /* 40951 */ + "SPI_SHADER_USER_DATA_ES_7\0" /* 40977 */ + "SPI_SHADER_USER_DATA_ES_8\0" /* 41003 */ + "SPI_SHADER_USER_DATA_ES_9\0" /* 41029 */ + "SPI_SHADER_USER_DATA_ES_10\0" /* 41055 */ + "SPI_SHADER_USER_DATA_ES_11\0" /* 41082 */ + "SPI_SHADER_USER_DATA_ES_12\0" /* 41109 */ + "SPI_SHADER_USER_DATA_ES_13\0" /* 41136 */ + "SPI_SHADER_USER_DATA_ES_14\0" /* 41163 */ + "SPI_SHADER_USER_DATA_ES_15\0" /* 41190 */ + "SPI_SHADER_TBA_LO_HS\0" /* 41217 */ + "SPI_SHADER_TBA_HI_HS\0" /* 41238 */ + "SPI_SHADER_TMA_LO_HS\0" /* 41259 */ + "SPI_SHADER_TMA_HI_HS\0" /* 41280 */ + "SPI_SHADER_PGM_RSRC3_HS\0" /* 41301 */ + "SPI_SHADER_PGM_LO_HS\0" /* 41325 */ + "SPI_SHADER_PGM_HI_HS\0" /* 41346 */ + "SPI_SHADER_PGM_RSRC1_HS\0" /* 41367 */ + "SPI_SHADER_PGM_RSRC2_HS\0" /* 41391 */ + "SPI_SHADER_USER_DATA_HS_0\0" /* 41415 */ + "SPI_SHADER_USER_DATA_HS_1\0" /* 41441 */ + "SPI_SHADER_USER_DATA_HS_2\0" /* 41467 */ + "SPI_SHADER_USER_DATA_HS_3\0" /* 41493 */ + "SPI_SHADER_USER_DATA_HS_4\0" /* 41519 */ + "SPI_SHADER_USER_DATA_HS_5\0" /* 41545 */ + "SPI_SHADER_USER_DATA_HS_6\0" /* 41571 */ + "SPI_SHADER_USER_DATA_HS_7\0" /* 41597 */ + "SPI_SHADER_USER_DATA_HS_8\0" /* 41623 */ + "SPI_SHADER_USER_DATA_HS_9\0" /* 41649 */ + "SPI_SHADER_USER_DATA_HS_10\0" /* 41675 */ + "SPI_SHADER_USER_DATA_HS_11\0" /* 41702 */ + "SPI_SHADER_USER_DATA_HS_12\0" /* 41729 */ + "SPI_SHADER_USER_DATA_HS_13\0" /* 41756 */ + "SPI_SHADER_USER_DATA_HS_14\0" /* 41783 */ + "SPI_SHADER_USER_DATA_HS_15\0" /* 41810 */ + "SPI_SHADER_TBA_LO_LS\0" /* 41837 */ + "SPI_SHADER_TBA_HI_LS\0" /* 41858 */ + "SPI_SHADER_TMA_LO_LS\0" /* 41879 */ + "SPI_SHADER_TMA_HI_LS\0" /* 41900 */ + "SPI_SHADER_PGM_RSRC3_LS\0" /* 41921 */ + "SPI_SHADER_PGM_LO_LS\0" /* 41945 */ + "SPI_SHADER_PGM_HI_LS\0" /* 41966 */ + "SPI_SHADER_PGM_RSRC1_LS\0" /* 41987 */ + "SPI_SHADER_PGM_RSRC2_LS\0" /* 42011 */ + "SPI_SHADER_USER_DATA_LS_0\0" /* 42035 */ + "SPI_SHADER_USER_DATA_LS_1\0" /* 42061 */ + "SPI_SHADER_USER_DATA_LS_2\0" /* 42087 */ + "SPI_SHADER_USER_DATA_LS_3\0" /* 42113 */ + "SPI_SHADER_USER_DATA_LS_4\0" /* 42139 */ + "SPI_SHADER_USER_DATA_LS_5\0" /* 42165 */ + "SPI_SHADER_USER_DATA_LS_6\0" /* 42191 */ + "SPI_SHADER_USER_DATA_LS_7\0" /* 42217 */ + "SPI_SHADER_USER_DATA_LS_8\0" /* 42243 */ + "SPI_SHADER_USER_DATA_LS_9\0" /* 42269 */ + "SPI_SHADER_USER_DATA_LS_10\0" /* 42295 */ + "SPI_SHADER_USER_DATA_LS_11\0" /* 42322 */ + "SPI_SHADER_USER_DATA_LS_12\0" /* 42349 */ + "SPI_SHADER_USER_DATA_LS_13\0" /* 42376 */ + "SPI_SHADER_USER_DATA_LS_14\0" /* 42403 */ + "SPI_SHADER_USER_DATA_LS_15\0" /* 42430 */ + "COMPUTE_DISPATCH_INITIATOR\0" /* 42457 */ + "COMPUTE_DIM_X\0" /* 42484 */ + "COMPUTE_DIM_Y\0" /* 42498 */ + "COMPUTE_DIM_Z\0" /* 42512 */ + "COMPUTE_START_X\0" /* 42526 */ + "COMPUTE_START_Y\0" /* 42542 */ + "COMPUTE_START_Z\0" /* 42558 */ + "COMPUTE_NUM_THREAD_X\0" /* 42574 */ + "COMPUTE_NUM_THREAD_Y\0" /* 42595 */ + "COMPUTE_NUM_THREAD_Z\0" /* 42616 */ + "COMPUTE_MAX_WAVE_ID\0" /* 42637 */ + "COMPUTE_PIPELINESTAT_ENABLE\0" /* 42657 */ + "COMPUTE_PERFCOUNT_ENABLE\0" /* 42685 */ + "COMPUTE_PGM_LO\0" /* 42710 */ + "COMPUTE_PGM_HI\0" /* 42725 */ + "COMPUTE_TBA_LO\0" /* 42740 */ + "COMPUTE_TBA_HI\0" /* 42755 */ + "COMPUTE_TMA_LO\0" /* 42770 */ + "COMPUTE_TMA_HI\0" /* 42785 */ + "COMPUTE_PGM_RSRC1\0" /* 42800 */ + "COMPUTE_PGM_RSRC2\0" /* 42818 */ + "COMPUTE_VMID\0" /* 42836 */ + "COMPUTE_RESOURCE_LIMITS\0" /* 42849 */ + "COMPUTE_STATIC_THREAD_MGMT_SE0\0" /* 42873 */ + "COMPUTE_STATIC_THREAD_MGMT_SE1\0" /* 42904 */ + "COMPUTE_TMPRING_SIZE\0" /* 42935 */ + "COMPUTE_STATIC_THREAD_MGMT_SE2\0" /* 42956 */ + "COMPUTE_STATIC_THREAD_MGMT_SE3\0" /* 42987 */ + "COMPUTE_RESTART_X\0" /* 43018 */ + "COMPUTE_RESTART_Y\0" /* 43036 */ + "COMPUTE_RESTART_Z\0" /* 43054 */ + "COMPUTE_MISC_RESERVED\0" /* 43072 */ + "COMPUTE_DISPATCH_ID\0" /* 43094 */ + "COMPUTE_THREADGROUP_ID\0" /* 43114 */ + "COMPUTE_RELAUNCH\0" /* 43137 */ + "COMPUTE_WAVE_RESTORE_ADDR_LO\0" /* 43154 */ + "COMPUTE_WAVE_RESTORE_ADDR_HI\0" /* 43183 */ + "COMPUTE_WAVE_RESTORE_CONTROL\0" /* 43212 */ + "COMPUTE_USER_DATA_0\0" /* 43241 */ + "COMPUTE_USER_DATA_1\0" /* 43261 */ + "COMPUTE_USER_DATA_2\0" /* 43281 */ + "COMPUTE_USER_DATA_3\0" /* 43301 */ + "COMPUTE_USER_DATA_4\0" /* 43321 */ + "COMPUTE_USER_DATA_5\0" /* 43341 */ + "COMPUTE_USER_DATA_6\0" /* 43361 */ + "COMPUTE_USER_DATA_7\0" /* 43381 */ + "COMPUTE_USER_DATA_8\0" /* 43401 */ + "COMPUTE_USER_DATA_9\0" /* 43421 */ + "COMPUTE_USER_DATA_10\0" /* 43441 */ + "COMPUTE_USER_DATA_11\0" /* 43462 */ + "COMPUTE_USER_DATA_12\0" /* 43483 */ + "COMPUTE_USER_DATA_13\0" /* 43504 */ + "COMPUTE_USER_DATA_14\0" /* 43525 */ + "COMPUTE_USER_DATA_15\0" /* 43546 */ + "COMPUTE_NOWHERE\0" /* 43567 */ + "CPG_PERFCOUNTER1_LO\0" /* 43583 */ + "CPG_PERFCOUNTER1_HI\0" /* 43603 */ + "CPG_PERFCOUNTER0_LO\0" /* 43623 */ + "CPG_PERFCOUNTER0_HI\0" /* 43643 */ + "CPC_PERFCOUNTER1_LO\0" /* 43663 */ + "CPC_PERFCOUNTER1_HI\0" /* 43683 */ + "CPC_PERFCOUNTER0_LO\0" /* 43703 */ + "CPC_PERFCOUNTER0_HI\0" /* 43723 */ + "CPF_PERFCOUNTER1_LO\0" /* 43743 */ + "CPF_PERFCOUNTER1_HI\0" /* 43763 */ + "CPF_PERFCOUNTER0_LO\0" /* 43783 */ + "CPF_PERFCOUNTER0_HI\0" /* 43803 */ + "GRBM_PERFCOUNTER0_LO\0" /* 43823 */ + "GRBM_PERFCOUNTER0_HI\0" /* 43844 */ + "GRBM_PERFCOUNTER1_LO\0" /* 43865 */ + "GRBM_PERFCOUNTER1_HI\0" /* 43886 */ + "GRBM_SE0_PERFCOUNTER_LO\0" /* 43907 */ + "GRBM_SE0_PERFCOUNTER_HI\0" /* 43931 */ + "GRBM_SE1_PERFCOUNTER_LO\0" /* 43955 */ + "GRBM_SE1_PERFCOUNTER_HI\0" /* 43979 */ + "GRBM_SE2_PERFCOUNTER_LO\0" /* 44003 */ + "GRBM_SE2_PERFCOUNTER_HI\0" /* 44027 */ + "GRBM_SE3_PERFCOUNTER_LO\0" /* 44051 */ + "GRBM_SE3_PERFCOUNTER_HI\0" /* 44075 */ + "WD_PERFCOUNTER0_LO\0" /* 44099 */ + "WD_PERFCOUNTER0_HI\0" /* 44118 */ + "WD_PERFCOUNTER1_LO\0" /* 44137 */ + "WD_PERFCOUNTER1_HI\0" /* 44156 */ + "WD_PERFCOUNTER2_LO\0" /* 44175 */ + "WD_PERFCOUNTER2_HI\0" /* 44194 */ + "WD_PERFCOUNTER3_LO\0" /* 44213 */ + "WD_PERFCOUNTER3_HI\0" /* 44232 */ + "IA_PERFCOUNTER0_LO\0" /* 44251 */ + "IA_PERFCOUNTER0_HI\0" /* 44270 */ + "IA_PERFCOUNTER1_LO\0" /* 44289 */ + "IA_PERFCOUNTER1_HI\0" /* 44308 */ + "IA_PERFCOUNTER2_LO\0" /* 44327 */ + "IA_PERFCOUNTER2_HI\0" /* 44346 */ + "IA_PERFCOUNTER3_LO\0" /* 44365 */ + "IA_PERFCOUNTER3_HI\0" /* 44384 */ + "VGT_PERFCOUNTER0_LO\0" /* 44403 */ + "VGT_PERFCOUNTER0_HI\0" /* 44423 */ + "VGT_PERFCOUNTER1_LO\0" /* 44443 */ + "VGT_PERFCOUNTER1_HI\0" /* 44463 */ + "VGT_PERFCOUNTER2_LO\0" /* 44483 */ + "VGT_PERFCOUNTER2_HI\0" /* 44503 */ + "VGT_PERFCOUNTER3_LO\0" /* 44523 */ + "VGT_PERFCOUNTER3_HI\0" /* 44543 */ + "PA_SU_PERFCOUNTER0_LO\0" /* 44563 */ + "PA_SU_PERFCOUNTER0_HI\0" /* 44585 */ + "PA_SU_PERFCOUNTER1_LO\0" /* 44607 */ + "PA_SU_PERFCOUNTER1_HI\0" /* 44629 */ + "PA_SU_PERFCOUNTER2_LO\0" /* 44651 */ + "PA_SU_PERFCOUNTER2_HI\0" /* 44673 */ + "PA_SU_PERFCOUNTER3_LO\0" /* 44695 */ + "PA_SU_PERFCOUNTER3_HI\0" /* 44717 */ + "PA_SC_PERFCOUNTER0_LO\0" /* 44739 */ + "PA_SC_PERFCOUNTER0_HI\0" /* 44761 */ + "PA_SC_PERFCOUNTER1_LO\0" /* 44783 */ + "PA_SC_PERFCOUNTER1_HI\0" /* 44805 */ + "PA_SC_PERFCOUNTER2_LO\0" /* 44827 */ + "PA_SC_PERFCOUNTER2_HI\0" /* 44849 */ + "PA_SC_PERFCOUNTER3_LO\0" /* 44871 */ + "PA_SC_PERFCOUNTER3_HI\0" /* 44893 */ + "PA_SC_PERFCOUNTER4_LO\0" /* 44915 */ + "PA_SC_PERFCOUNTER4_HI\0" /* 44937 */ + "PA_SC_PERFCOUNTER5_LO\0" /* 44959 */ + "PA_SC_PERFCOUNTER5_HI\0" /* 44981 */ + "PA_SC_PERFCOUNTER6_LO\0" /* 45003 */ + "PA_SC_PERFCOUNTER6_HI\0" /* 45025 */ + "PA_SC_PERFCOUNTER7_LO\0" /* 45047 */ + "PA_SC_PERFCOUNTER7_HI\0" /* 45069 */ + "SPI_PERFCOUNTER0_HI\0" /* 45091 */ + "SPI_PERFCOUNTER0_LO\0" /* 45111 */ + "SPI_PERFCOUNTER1_HI\0" /* 45131 */ + "SPI_PERFCOUNTER1_LO\0" /* 45151 */ + "SPI_PERFCOUNTER2_HI\0" /* 45171 */ + "SPI_PERFCOUNTER2_LO\0" /* 45191 */ + "SPI_PERFCOUNTER3_HI\0" /* 45211 */ + "SPI_PERFCOUNTER3_LO\0" /* 45231 */ + "SPI_PERFCOUNTER4_HI\0" /* 45251 */ + "SPI_PERFCOUNTER4_LO\0" /* 45271 */ + "SPI_PERFCOUNTER5_HI\0" /* 45291 */ + "SPI_PERFCOUNTER5_LO\0" /* 45311 */ + "SQ_PERFCOUNTER0_LO\0" /* 45331 */ + "SQ_PERFCOUNTER0_HI\0" /* 45350 */ + "SQ_PERFCOUNTER1_LO\0" /* 45369 */ + "SQ_PERFCOUNTER1_HI\0" /* 45388 */ + "SQ_PERFCOUNTER2_LO\0" /* 45407 */ + "SQ_PERFCOUNTER2_HI\0" /* 45426 */ + "SQ_PERFCOUNTER3_LO\0" /* 45445 */ + "SQ_PERFCOUNTER3_HI\0" /* 45464 */ + "SQ_PERFCOUNTER4_LO\0" /* 45483 */ + "SQ_PERFCOUNTER4_HI\0" /* 45502 */ + "SQ_PERFCOUNTER5_LO\0" /* 45521 */ + "SQ_PERFCOUNTER5_HI\0" /* 45540 */ + "SQ_PERFCOUNTER6_LO\0" /* 45559 */ + "SQ_PERFCOUNTER6_HI\0" /* 45578 */ + "SQ_PERFCOUNTER7_LO\0" /* 45597 */ + "SQ_PERFCOUNTER7_HI\0" /* 45616 */ + "SQ_PERFCOUNTER8_LO\0" /* 45635 */ + "SQ_PERFCOUNTER8_HI\0" /* 45654 */ + "SQ_PERFCOUNTER9_LO\0" /* 45673 */ + "SQ_PERFCOUNTER9_HI\0" /* 45692 */ + "SQ_PERFCOUNTER10_LO\0" /* 45711 */ + "SQ_PERFCOUNTER10_HI\0" /* 45731 */ + "SQ_PERFCOUNTER11_LO\0" /* 45751 */ + "SQ_PERFCOUNTER11_HI\0" /* 45771 */ + "SQ_PERFCOUNTER12_LO\0" /* 45791 */ + "SQ_PERFCOUNTER12_HI\0" /* 45811 */ + "SQ_PERFCOUNTER13_LO\0" /* 45831 */ + "SQ_PERFCOUNTER13_HI\0" /* 45851 */ + "SQ_PERFCOUNTER14_LO\0" /* 45871 */ + "SQ_PERFCOUNTER14_HI\0" /* 45891 */ + "SQ_PERFCOUNTER15_LO\0" /* 45911 */ + "SQ_PERFCOUNTER15_HI\0" /* 45931 */ + "SX_PERFCOUNTER0_LO\0" /* 45951 */ + "SX_PERFCOUNTER0_HI\0" /* 45970 */ + "SX_PERFCOUNTER1_LO\0" /* 45989 */ + "SX_PERFCOUNTER1_HI\0" /* 46008 */ + "SX_PERFCOUNTER2_LO\0" /* 46027 */ + "SX_PERFCOUNTER2_HI\0" /* 46046 */ + "SX_PERFCOUNTER3_LO\0" /* 46065 */ + "SX_PERFCOUNTER3_HI\0" /* 46084 */ + "GDS_PERFCOUNTER0_LO\0" /* 46103 */ + "GDS_PERFCOUNTER0_HI\0" /* 46123 */ + "GDS_PERFCOUNTER1_LO\0" /* 46143 */ + "GDS_PERFCOUNTER1_HI\0" /* 46163 */ + "GDS_PERFCOUNTER2_LO\0" /* 46183 */ + "GDS_PERFCOUNTER2_HI\0" /* 46203 */ + "GDS_PERFCOUNTER3_LO\0" /* 46223 */ + "GDS_PERFCOUNTER3_HI\0" /* 46243 */ + "TA_PERFCOUNTER0_LO\0" /* 46263 */ + "TA_PERFCOUNTER0_HI\0" /* 46282 */ + "TA_PERFCOUNTER1_LO\0" /* 46301 */ + "TA_PERFCOUNTER1_HI\0" /* 46320 */ + "TD_PERFCOUNTER0_LO\0" /* 46339 */ + "TD_PERFCOUNTER0_HI\0" /* 46358 */ + "TD_PERFCOUNTER1_LO\0" /* 46377 */ + "TD_PERFCOUNTER1_HI\0" /* 46396 */ + "TCP_PERFCOUNTER0_LO\0" /* 46415 */ + "TCP_PERFCOUNTER0_HI\0" /* 46435 */ + "TCP_PERFCOUNTER1_LO\0" /* 46455 */ + "TCP_PERFCOUNTER1_HI\0" /* 46475 */ + "TCP_PERFCOUNTER2_LO\0" /* 46495 */ + "TCP_PERFCOUNTER2_HI\0" /* 46515 */ + "TCP_PERFCOUNTER3_LO\0" /* 46535 */ + "TCP_PERFCOUNTER3_HI\0" /* 46555 */ + "TCC_PERFCOUNTER0_LO\0" /* 46575 */ + "TCC_PERFCOUNTER0_HI\0" /* 46595 */ + "TCC_PERFCOUNTER1_LO\0" /* 46615 */ + "TCC_PERFCOUNTER1_HI\0" /* 46635 */ + "TCC_PERFCOUNTER2_LO\0" /* 46655 */ + "TCC_PERFCOUNTER2_HI\0" /* 46675 */ + "TCC_PERFCOUNTER3_LO\0" /* 46695 */ + "TCC_PERFCOUNTER3_HI\0" /* 46715 */ + "TCA_PERFCOUNTER0_LO\0" /* 46735 */ + "TCA_PERFCOUNTER0_HI\0" /* 46755 */ + "TCA_PERFCOUNTER1_LO\0" /* 46775 */ + "TCA_PERFCOUNTER1_HI\0" /* 46795 */ + "TCA_PERFCOUNTER2_LO\0" /* 46815 */ + "TCA_PERFCOUNTER2_HI\0" /* 46835 */ + "TCA_PERFCOUNTER3_LO\0" /* 46855 */ + "TCA_PERFCOUNTER3_HI\0" /* 46875 */ + "CB_PERFCOUNTER0_LO\0" /* 46895 */ + "CB_PERFCOUNTER0_HI\0" /* 46914 */ + "CB_PERFCOUNTER1_LO\0" /* 46933 */ + "CB_PERFCOUNTER1_HI\0" /* 46952 */ + "CB_PERFCOUNTER2_LO\0" /* 46971 */ + "CB_PERFCOUNTER2_HI\0" /* 46990 */ + "CB_PERFCOUNTER3_LO\0" /* 47009 */ + "CB_PERFCOUNTER3_HI\0" /* 47028 */ + "DB_PERFCOUNTER0_LO\0" /* 47047 */ + "DB_PERFCOUNTER0_HI\0" /* 47066 */ + "DB_PERFCOUNTER1_LO\0" /* 47085 */ + "DB_PERFCOUNTER1_HI\0" /* 47104 */ + "DB_PERFCOUNTER2_LO\0" /* 47123 */ + "DB_PERFCOUNTER2_HI\0" /* 47142 */ + "DB_PERFCOUNTER3_LO\0" /* 47161 */ + "DB_PERFCOUNTER3_HI\0" /* 47180 */ + "RLC_PERFCOUNTER0_LO\0" /* 47199 */ + "RLC_PERFCOUNTER0_HI\0" /* 47219 */ + "RLC_PERFCOUNTER1_LO\0" /* 47239 */ + "RLC_PERFCOUNTER1_HI\0" /* 47259 */ + "CPG_PERFCOUNTER1_SELECT\0" /* 47279 */ + "CPG_PERFCOUNTER0_SELECT1\0" /* 47303 */ + "CPG_PERFCOUNTER0_SELECT\0" /* 47328 */ + "CPC_PERFCOUNTER1_SELECT\0" /* 47352 */ + "CPC_PERFCOUNTER0_SELECT1\0" /* 47376 */ + "CPF_PERFCOUNTER1_SELECT\0" /* 47401 */ + "CPF_PERFCOUNTER0_SELECT1\0" /* 47425 */ + "CPF_PERFCOUNTER0_SELECT\0" /* 47450 */ + "CP_PERFMON_CNTL\0" /* 47474 */ + "CPC_PERFCOUNTER0_SELECT\0" /* 47490 */ + "GRBM_PERFCOUNTER0_SELECT\0" /* 47514 */ + "GRBM_PERFCOUNTER1_SELECT\0" /* 47539 */ + "GRBM_SE0_PERFCOUNTER_SELECT\0" /* 47564 */ + "GRBM_SE1_PERFCOUNTER_SELECT\0" /* 47592 */ + "GRBM_SE2_PERFCOUNTER_SELECT\0" /* 47620 */ + "GRBM_SE3_PERFCOUNTER_SELECT\0" /* 47648 */ + "WD_PERFCOUNTER0_SELECT\0" /* 47676 */ + "WD_PERFCOUNTER1_SELECT\0" /* 47699 */ + "WD_PERFCOUNTER2_SELECT\0" /* 47722 */ + "WD_PERFCOUNTER3_SELECT\0" /* 47745 */ + "IA_PERFCOUNTER0_SELECT\0" /* 47768 */ + "IA_PERFCOUNTER1_SELECT\0" /* 47791 */ + "IA_PERFCOUNTER2_SELECT\0" /* 47814 */ + "IA_PERFCOUNTER3_SELECT\0" /* 47837 */ + "IA_PERFCOUNTER0_SELECT1\0" /* 47860 */ + "VGT_PERFCOUNTER0_SELECT\0" /* 47884 */ + "VGT_PERFCOUNTER1_SELECT\0" /* 47908 */ + "VGT_PERFCOUNTER2_SELECT\0" /* 47932 */ + "VGT_PERFCOUNTER3_SELECT\0" /* 47956 */ + "VGT_PERFCOUNTER0_SELECT1\0" /* 47980 */ + "VGT_PERFCOUNTER1_SELECT1\0" /* 48005 */ + "VGT_PERFCOUNTER_SEID_MASK\0" /* 48030 */ + "PA_SU_PERFCOUNTER0_SELECT\0" /* 48056 */ + "PA_SU_PERFCOUNTER0_SELECT1\0" /* 48082 */ + "PA_SU_PERFCOUNTER1_SELECT\0" /* 48109 */ + "PA_SU_PERFCOUNTER1_SELECT1\0" /* 48135 */ + "PA_SU_PERFCOUNTER2_SELECT\0" /* 48162 */ + "PA_SU_PERFCOUNTER3_SELECT\0" /* 48188 */ + "PA_SC_PERFCOUNTER0_SELECT\0" /* 48214 */ + "PA_SC_PERFCOUNTER0_SELECT1\0" /* 48240 */ + "PA_SC_PERFCOUNTER1_SELECT\0" /* 48267 */ + "PA_SC_PERFCOUNTER2_SELECT\0" /* 48293 */ + "PA_SC_PERFCOUNTER3_SELECT\0" /* 48319 */ + "PA_SC_PERFCOUNTER4_SELECT\0" /* 48345 */ + "PA_SC_PERFCOUNTER5_SELECT\0" /* 48371 */ + "PA_SC_PERFCOUNTER6_SELECT\0" /* 48397 */ + "PA_SC_PERFCOUNTER7_SELECT\0" /* 48423 */ + "SPI_PERFCOUNTER0_SELECT\0" /* 48449 */ + "SPI_PERFCOUNTER1_SELECT\0" /* 48473 */ + "SPI_PERFCOUNTER2_SELECT\0" /* 48497 */ + "SPI_PERFCOUNTER3_SELECT\0" /* 48521 */ + "SPI_PERFCOUNTER0_SELECT1\0" /* 48545 */ + "SPI_PERFCOUNTER1_SELECT1\0" /* 48570 */ + "SPI_PERFCOUNTER2_SELECT1\0" /* 48595 */ + "SPI_PERFCOUNTER3_SELECT1\0" /* 48620 */ + "SPI_PERFCOUNTER4_SELECT\0" /* 48645 */ + "SPI_PERFCOUNTER5_SELECT\0" /* 48669 */ + "SPI_PERFCOUNTER_BINS\0" /* 48693 */ + "SQ_PERFCOUNTER0_SELECT\0" /* 48714 */ + "SQ_PERFCOUNTER1_SELECT\0" /* 48737 */ + "SQ_PERFCOUNTER2_SELECT\0" /* 48760 */ + "SQ_PERFCOUNTER3_SELECT\0" /* 48783 */ + "SQ_PERFCOUNTER4_SELECT\0" /* 48806 */ + "SQ_PERFCOUNTER5_SELECT\0" /* 48829 */ + "SQ_PERFCOUNTER6_SELECT\0" /* 48852 */ + "SQ_PERFCOUNTER7_SELECT\0" /* 48875 */ + "SQ_PERFCOUNTER8_SELECT\0" /* 48898 */ + "SQ_PERFCOUNTER9_SELECT\0" /* 48921 */ + "SQ_PERFCOUNTER10_SELECT\0" /* 48944 */ + "SQ_PERFCOUNTER11_SELECT\0" /* 48968 */ + "SQ_PERFCOUNTER12_SELECT\0" /* 48992 */ + "SQ_PERFCOUNTER13_SELECT\0" /* 49016 */ + "SQ_PERFCOUNTER14_SELECT\0" /* 49040 */ + "SQ_PERFCOUNTER15_SELECT\0" /* 49064 */ + "SQ_PERFCOUNTER_CTRL\0" /* 49088 */ + "SQ_PERFCOUNTER_MASK\0" /* 49108 */ + "SQ_PERFCOUNTER_CTRL2\0" /* 49128 */ + "SX_PERFCOUNTER0_SELECT\0" /* 49149 */ + "SX_PERFCOUNTER1_SELECT\0" /* 49172 */ + "SX_PERFCOUNTER2_SELECT\0" /* 49195 */ + "SX_PERFCOUNTER3_SELECT\0" /* 49218 */ + "SX_PERFCOUNTER0_SELECT1\0" /* 49241 */ + "SX_PERFCOUNTER1_SELECT1\0" /* 49265 */ + "GDS_PERFCOUNTER0_SELECT\0" /* 49289 */ + "GDS_PERFCOUNTER1_SELECT\0" /* 49313 */ + "GDS_PERFCOUNTER2_SELECT\0" /* 49337 */ + "GDS_PERFCOUNTER3_SELECT\0" /* 49361 */ + "GDS_PERFCOUNTER0_SELECT1\0" /* 49385 */ + "TA_PERFCOUNTER0_SELECT\0" /* 49410 */ + "TA_PERFCOUNTER0_SELECT1\0" /* 49433 */ + "TA_PERFCOUNTER1_SELECT\0" /* 49457 */ + "TD_PERFCOUNTER0_SELECT\0" /* 49480 */ + "TD_PERFCOUNTER0_SELECT1\0" /* 49503 */ + "TD_PERFCOUNTER1_SELECT\0" /* 49527 */ + "TCP_PERFCOUNTER0_SELECT\0" /* 49550 */ + "TCP_PERFCOUNTER0_SELECT1\0" /* 49574 */ + "TCP_PERFCOUNTER1_SELECT\0" /* 49599 */ + "TCP_PERFCOUNTER1_SELECT1\0" /* 49623 */ + "TCP_PERFCOUNTER2_SELECT\0" /* 49648 */ + "TCP_PERFCOUNTER3_SELECT\0" /* 49672 */ + "TCC_PERFCOUNTER0_SELECT\0" /* 49696 */ + "TCC_PERFCOUNTER0_SELECT1\0" /* 49720 */ + "TCC_PERFCOUNTER1_SELECT\0" /* 49745 */ + "TCC_PERFCOUNTER1_SELECT1\0" /* 49769 */ + "TCC_PERFCOUNTER2_SELECT\0" /* 49794 */ + "TCC_PERFCOUNTER3_SELECT\0" /* 49818 */ + "TCA_PERFCOUNTER0_SELECT\0" /* 49842 */ + "TCA_PERFCOUNTER0_SELECT1\0" /* 49866 */ + "TCA_PERFCOUNTER1_SELECT\0" /* 49891 */ + "TCA_PERFCOUNTER1_SELECT1\0" /* 49915 */ + "TCA_PERFCOUNTER2_SELECT\0" /* 49940 */ + "TCA_PERFCOUNTER3_SELECT\0" /* 49964 */ + "CB_PERFCOUNTER_FILTER\0" /* 49988 */ + "CB_PERFCOUNTER0_SELECT\0" /* 50010 */ + "CB_PERFCOUNTER0_SELECT1\0" /* 50033 */ + "CB_PERFCOUNTER1_SELECT\0" /* 50057 */ + "CB_PERFCOUNTER2_SELECT\0" /* 50080 */ + "CB_PERFCOUNTER3_SELECT\0" /* 50103 */ + "DB_PERFCOUNTER0_SELECT\0" /* 50126 */ + "DB_PERFCOUNTER0_SELECT1\0" /* 50149 */ + "DB_PERFCOUNTER1_SELECT\0" /* 50173 */ + "DB_PERFCOUNTER1_SELECT1\0" /* 50196 */ + "DB_PERFCOUNTER2_SELECT\0" /* 50220 */ + "DB_PERFCOUNTER3_SELECT\0" /* 50243 */ + "DB_RENDER_CONTROL\0" /* 50266 */ + "DB_COUNT_CONTROL\0" /* 50284 */ + "DB_DEPTH_VIEW\0" /* 50301 */ + "DB_RENDER_OVERRIDE\0" /* 50315 */ + "DB_RENDER_OVERRIDE2\0" /* 50334 */ + "DB_HTILE_DATA_BASE\0" /* 50354 */ + "DB_DEPTH_BOUNDS_MIN\0" /* 50373 */ + "DB_DEPTH_BOUNDS_MAX\0" /* 50393 */ + "DB_STENCIL_CLEAR\0" /* 50413 */ + "DB_DEPTH_CLEAR\0" /* 50430 */ + "PA_SC_SCREEN_SCISSOR_TL\0" /* 50445 */ + "PA_SC_SCREEN_SCISSOR_BR\0" /* 50469 */ + "DB_DEPTH_INFO\0" /* 50493 */ + "DB_Z_INFO\0" /* 50507 */ + "DB_STENCIL_INFO\0" /* 50517 */ + "DB_Z_READ_BASE\0" /* 50533 */ + "DB_STENCIL_READ_BASE\0" /* 50548 */ + "DB_Z_WRITE_BASE\0" /* 50569 */ + "DB_STENCIL_WRITE_BASE\0" /* 50585 */ + "DB_DEPTH_SIZE\0" /* 50607 */ + "DB_DEPTH_SLICE\0" /* 50621 */ + "TA_BC_BASE_ADDR\0" /* 50636 */ + "TA_BC_BASE_ADDR_HI\0" /* 50652 */ + "COHER_DEST_BASE_HI_0\0" /* 50671 */ + "COHER_DEST_BASE_HI_1\0" /* 50692 */ + "COHER_DEST_BASE_HI_2\0" /* 50713 */ + "COHER_DEST_BASE_HI_3\0" /* 50734 */ + "COHER_DEST_BASE_2\0" /* 50755 */ + "COHER_DEST_BASE_3\0" /* 50773 */ + "PA_SC_WINDOW_OFFSET\0" /* 50791 */ + "PA_SC_WINDOW_SCISSOR_TL\0" /* 50811 */ + "PA_SC_WINDOW_SCISSOR_BR\0" /* 50835 */ + "PA_SC_CLIPRECT_RULE\0" /* 50859 */ + "PA_SC_CLIPRECT_0_TL\0" /* 50879 */ + "PA_SC_CLIPRECT_0_BR\0" /* 50899 */ + "PA_SC_CLIPRECT_1_TL\0" /* 50919 */ + "PA_SC_CLIPRECT_1_BR\0" /* 50939 */ + "PA_SC_CLIPRECT_2_TL\0" /* 50959 */ + "PA_SC_CLIPRECT_2_BR\0" /* 50979 */ + "PA_SC_CLIPRECT_3_TL\0" /* 50999 */ + "PA_SC_CLIPRECT_3_BR\0" /* 51019 */ + "PA_SC_EDGERULE\0" /* 51039 */ + "PA_SU_HARDWARE_SCREEN_OFFSET\0" /* 51054 */ + "CB_TARGET_MASK\0" /* 51083 */ + "CB_SHADER_MASK\0" /* 51098 */ + "PA_SC_GENERIC_SCISSOR_TL\0" /* 51113 */ + "PA_SC_GENERIC_SCISSOR_BR\0" /* 51138 */ + "COHER_DEST_BASE_0\0" /* 51163 */ + "COHER_DEST_BASE_1\0" /* 51181 */ + "PA_SC_VPORT_SCISSOR_0_TL\0" /* 51199 */ + "PA_SC_VPORT_SCISSOR_0_BR\0" /* 51224 */ + "PA_SC_VPORT_SCISSOR_1_TL\0" /* 51249 */ + "PA_SC_VPORT_SCISSOR_1_BR\0" /* 51274 */ + "PA_SC_VPORT_SCISSOR_2_TL\0" /* 51299 */ + "PA_SC_VPORT_SCISSOR_2_BR\0" /* 51324 */ + "PA_SC_VPORT_SCISSOR_3_TL\0" /* 51349 */ + "PA_SC_VPORT_SCISSOR_3_BR\0" /* 51374 */ + "PA_SC_VPORT_SCISSOR_4_TL\0" /* 51399 */ + "PA_SC_VPORT_SCISSOR_4_BR\0" /* 51424 */ + "PA_SC_VPORT_SCISSOR_5_TL\0" /* 51449 */ + "PA_SC_VPORT_SCISSOR_5_BR\0" /* 51474 */ + "PA_SC_VPORT_SCISSOR_6_TL\0" /* 51499 */ + "PA_SC_VPORT_SCISSOR_6_BR\0" /* 51524 */ + "PA_SC_VPORT_SCISSOR_7_TL\0" /* 51549 */ + "PA_SC_VPORT_SCISSOR_7_BR\0" /* 51574 */ + "PA_SC_VPORT_SCISSOR_8_TL\0" /* 51599 */ + "PA_SC_VPORT_SCISSOR_8_BR\0" /* 51624 */ + "PA_SC_VPORT_SCISSOR_9_TL\0" /* 51649 */ + "PA_SC_VPORT_SCISSOR_9_BR\0" /* 51674 */ + "PA_SC_VPORT_SCISSOR_10_TL\0" /* 51699 */ + "PA_SC_VPORT_SCISSOR_10_BR\0" /* 51725 */ + "PA_SC_VPORT_SCISSOR_11_TL\0" /* 51751 */ + "PA_SC_VPORT_SCISSOR_11_BR\0" /* 51777 */ + "PA_SC_VPORT_SCISSOR_12_TL\0" /* 51803 */ + "PA_SC_VPORT_SCISSOR_12_BR\0" /* 51829 */ + "PA_SC_VPORT_SCISSOR_13_TL\0" /* 51855 */ + "PA_SC_VPORT_SCISSOR_13_BR\0" /* 51881 */ + "PA_SC_VPORT_SCISSOR_14_TL\0" /* 51907 */ + "PA_SC_VPORT_SCISSOR_14_BR\0" /* 51933 */ + "PA_SC_VPORT_SCISSOR_15_TL\0" /* 51959 */ + "PA_SC_VPORT_SCISSOR_15_BR\0" /* 51985 */ + "PA_SC_VPORT_ZMIN_0\0" /* 52011 */ + "PA_SC_VPORT_ZMAX_0\0" /* 52030 */ + "PA_SC_VPORT_ZMIN_1\0" /* 52049 */ + "PA_SC_VPORT_ZMAX_1\0" /* 52068 */ + "PA_SC_VPORT_ZMIN_2\0" /* 52087 */ + "PA_SC_VPORT_ZMAX_2\0" /* 52106 */ + "PA_SC_VPORT_ZMIN_3\0" /* 52125 */ + "PA_SC_VPORT_ZMAX_3\0" /* 52144 */ + "PA_SC_VPORT_ZMIN_4\0" /* 52163 */ + "PA_SC_VPORT_ZMAX_4\0" /* 52182 */ + "PA_SC_VPORT_ZMIN_5\0" /* 52201 */ + "PA_SC_VPORT_ZMAX_5\0" /* 52220 */ + "PA_SC_VPORT_ZMIN_6\0" /* 52239 */ + "PA_SC_VPORT_ZMAX_6\0" /* 52258 */ + "PA_SC_VPORT_ZMIN_7\0" /* 52277 */ + "PA_SC_VPORT_ZMAX_7\0" /* 52296 */ + "PA_SC_VPORT_ZMIN_8\0" /* 52315 */ + "PA_SC_VPORT_ZMAX_8\0" /* 52334 */ + "PA_SC_VPORT_ZMIN_9\0" /* 52353 */ + "PA_SC_VPORT_ZMAX_9\0" /* 52372 */ + "PA_SC_VPORT_ZMIN_10\0" /* 52391 */ + "PA_SC_VPORT_ZMAX_10\0" /* 52411 */ + "PA_SC_VPORT_ZMIN_11\0" /* 52431 */ + "PA_SC_VPORT_ZMAX_11\0" /* 52451 */ + "PA_SC_VPORT_ZMIN_12\0" /* 52471 */ + "PA_SC_VPORT_ZMAX_12\0" /* 52491 */ + "PA_SC_VPORT_ZMIN_13\0" /* 52511 */ + "PA_SC_VPORT_ZMAX_13\0" /* 52531 */ + "PA_SC_VPORT_ZMIN_14\0" /* 52551 */ + "PA_SC_VPORT_ZMAX_14\0" /* 52571 */ + "PA_SC_VPORT_ZMIN_15\0" /* 52591 */ + "PA_SC_VPORT_ZMAX_15\0" /* 52611 */ + "PA_SC_RASTER_CONFIG\0" /* 52631 */ + "PA_SC_RASTER_CONFIG_1\0" /* 52651 */ + "PA_SC_SCREEN_EXTENT_CONTROL\0" /* 52673 */ + "VGT_MAX_VTX_INDX\0" /* 52701 */ + "VGT_MIN_VTX_INDX\0" /* 52718 */ + "VGT_INDX_OFFSET\0" /* 52735 */ + "VGT_MULTI_PRIM_IB_RESET_INDX\0" /* 52751 */ + "CB_BLEND_RED\0" /* 52780 */ + "CB_BLEND_GREEN\0" /* 52793 */ + "CB_BLEND_BLUE\0" /* 52808 */ + "CB_BLEND_ALPHA\0" /* 52822 */ + "CB_DCC_CONTROL\0" /* 52837 */ + "DB_STENCIL_CONTROL\0" /* 52852 */ + "DB_STENCILREFMASK\0" /* 52871 */ + "DB_STENCILREFMASK_BF\0" /* 52889 */ + "PA_CL_VPORT_XSCALE\0" /* 52910 */ + "PA_CL_VPORT_XOFFSET\0" /* 52929 */ + "PA_CL_VPORT_YSCALE\0" /* 52949 */ + "PA_CL_VPORT_YOFFSET\0" /* 52968 */ + "PA_CL_VPORT_ZSCALE\0" /* 52988 */ + "PA_CL_VPORT_ZOFFSET\0" /* 53007 */ + "PA_CL_VPORT_XSCALE_1\0" /* 53027 */ + "PA_CL_VPORT_XOFFSET_1\0" /* 53048 */ + "PA_CL_VPORT_YSCALE_1\0" /* 53070 */ + "PA_CL_VPORT_YOFFSET_1\0" /* 53091 */ + "PA_CL_VPORT_ZSCALE_1\0" /* 53113 */ + "PA_CL_VPORT_ZOFFSET_1\0" /* 53134 */ + "PA_CL_VPORT_XSCALE_2\0" /* 53156 */ + "PA_CL_VPORT_XOFFSET_2\0" /* 53177 */ + "PA_CL_VPORT_YSCALE_2\0" /* 53199 */ + "PA_CL_VPORT_YOFFSET_2\0" /* 53220 */ + "PA_CL_VPORT_ZSCALE_2\0" /* 53242 */ + "PA_CL_VPORT_ZOFFSET_2\0" /* 53263 */ + "PA_CL_VPORT_XSCALE_3\0" /* 53285 */ + "PA_CL_VPORT_XOFFSET_3\0" /* 53306 */ + "PA_CL_VPORT_YSCALE_3\0" /* 53328 */ + "PA_CL_VPORT_YOFFSET_3\0" /* 53349 */ + "PA_CL_VPORT_ZSCALE_3\0" /* 53371 */ + "PA_CL_VPORT_ZOFFSET_3\0" /* 53392 */ + "PA_CL_VPORT_XSCALE_4\0" /* 53414 */ + "PA_CL_VPORT_XOFFSET_4\0" /* 53435 */ + "PA_CL_VPORT_YSCALE_4\0" /* 53457 */ + "PA_CL_VPORT_YOFFSET_4\0" /* 53478 */ + "PA_CL_VPORT_ZSCALE_4\0" /* 53500 */ + "PA_CL_VPORT_ZOFFSET_4\0" /* 53521 */ + "PA_CL_VPORT_XSCALE_5\0" /* 53543 */ + "PA_CL_VPORT_XOFFSET_5\0" /* 53564 */ + "PA_CL_VPORT_YSCALE_5\0" /* 53586 */ + "PA_CL_VPORT_YOFFSET_5\0" /* 53607 */ + "PA_CL_VPORT_ZSCALE_5\0" /* 53629 */ + "PA_CL_VPORT_ZOFFSET_5\0" /* 53650 */ + "PA_CL_VPORT_XSCALE_6\0" /* 53672 */ + "PA_CL_VPORT_XOFFSET_6\0" /* 53693 */ + "PA_CL_VPORT_YSCALE_6\0" /* 53715 */ + "PA_CL_VPORT_YOFFSET_6\0" /* 53736 */ + "PA_CL_VPORT_ZSCALE_6\0" /* 53758 */ + "PA_CL_VPORT_ZOFFSET_6\0" /* 53779 */ + "PA_CL_VPORT_XSCALE_7\0" /* 53801 */ + "PA_CL_VPORT_XOFFSET_7\0" /* 53822 */ + "PA_CL_VPORT_YSCALE_7\0" /* 53844 */ + "PA_CL_VPORT_YOFFSET_7\0" /* 53865 */ + "PA_CL_VPORT_ZSCALE_7\0" /* 53887 */ + "PA_CL_VPORT_ZOFFSET_7\0" /* 53908 */ + "PA_CL_VPORT_XSCALE_8\0" /* 53930 */ + "PA_CL_VPORT_XOFFSET_8\0" /* 53951 */ + "PA_CL_VPORT_YSCALE_8\0" /* 53973 */ + "PA_CL_VPORT_YOFFSET_8\0" /* 53994 */ + "PA_CL_VPORT_ZSCALE_8\0" /* 54016 */ + "PA_CL_VPORT_ZOFFSET_8\0" /* 54037 */ + "PA_CL_VPORT_XSCALE_9\0" /* 54059 */ + "PA_CL_VPORT_XOFFSET_9\0" /* 54080 */ + "PA_CL_VPORT_YSCALE_9\0" /* 54102 */ + "PA_CL_VPORT_YOFFSET_9\0" /* 54123 */ + "PA_CL_VPORT_ZSCALE_9\0" /* 54145 */ + "PA_CL_VPORT_ZOFFSET_9\0" /* 54166 */ + "PA_CL_VPORT_XSCALE_10\0" /* 54188 */ + "PA_CL_VPORT_XOFFSET_10\0" /* 54210 */ + "PA_CL_VPORT_YSCALE_10\0" /* 54233 */ + "PA_CL_VPORT_YOFFSET_10\0" /* 54255 */ + "PA_CL_VPORT_ZSCALE_10\0" /* 54278 */ + "PA_CL_VPORT_ZOFFSET_10\0" /* 54300 */ + "PA_CL_VPORT_XSCALE_11\0" /* 54323 */ + "PA_CL_VPORT_XOFFSET_11\0" /* 54345 */ + "PA_CL_VPORT_YSCALE_11\0" /* 54368 */ + "PA_CL_VPORT_YOFFSET_11\0" /* 54390 */ + "PA_CL_VPORT_ZSCALE_11\0" /* 54413 */ + "PA_CL_VPORT_ZOFFSET_11\0" /* 54435 */ + "PA_CL_VPORT_XSCALE_12\0" /* 54458 */ + "PA_CL_VPORT_XOFFSET_12\0" /* 54480 */ + "PA_CL_VPORT_YSCALE_12\0" /* 54503 */ + "PA_CL_VPORT_YOFFSET_12\0" /* 54525 */ + "PA_CL_VPORT_ZSCALE_12\0" /* 54548 */ + "PA_CL_VPORT_ZOFFSET_12\0" /* 54570 */ + "PA_CL_VPORT_XSCALE_13\0" /* 54593 */ + "PA_CL_VPORT_XOFFSET_13\0" /* 54615 */ + "PA_CL_VPORT_YSCALE_13\0" /* 54638 */ + "PA_CL_VPORT_YOFFSET_13\0" /* 54660 */ + "PA_CL_VPORT_ZSCALE_13\0" /* 54683 */ + "PA_CL_VPORT_ZOFFSET_13\0" /* 54705 */ + "PA_CL_VPORT_XSCALE_14\0" /* 54728 */ + "PA_CL_VPORT_XOFFSET_14\0" /* 54750 */ + "PA_CL_VPORT_YSCALE_14\0" /* 54773 */ + "PA_CL_VPORT_YOFFSET_14\0" /* 54795 */ + "PA_CL_VPORT_ZSCALE_14\0" /* 54818 */ + "PA_CL_VPORT_ZOFFSET_14\0" /* 54840 */ + "PA_CL_VPORT_XSCALE_15\0" /* 54863 */ + "PA_CL_VPORT_XOFFSET_15\0" /* 54885 */ + "PA_CL_VPORT_YSCALE_15\0" /* 54908 */ + "PA_CL_VPORT_YOFFSET_15\0" /* 54930 */ + "PA_CL_VPORT_ZSCALE_15\0" /* 54953 */ + "PA_CL_VPORT_ZOFFSET_15\0" /* 54975 */ + "PA_CL_UCP_0_X\0" /* 54998 */ + "PA_CL_UCP_0_Y\0" /* 55012 */ + "PA_CL_UCP_0_Z\0" /* 55026 */ + "PA_CL_UCP_0_W\0" /* 55040 */ + "PA_CL_UCP_1_X\0" /* 55054 */ + "PA_CL_UCP_1_Y\0" /* 55068 */ + "PA_CL_UCP_1_Z\0" /* 55082 */ + "PA_CL_UCP_1_W\0" /* 55096 */ + "PA_CL_UCP_2_X\0" /* 55110 */ + "PA_CL_UCP_2_Y\0" /* 55124 */ + "PA_CL_UCP_2_Z\0" /* 55138 */ + "PA_CL_UCP_2_W\0" /* 55152 */ + "PA_CL_UCP_3_X\0" /* 55166 */ + "PA_CL_UCP_3_Y\0" /* 55180 */ + "PA_CL_UCP_3_Z\0" /* 55194 */ + "PA_CL_UCP_3_W\0" /* 55208 */ + "PA_CL_UCP_4_X\0" /* 55222 */ + "PA_CL_UCP_4_Y\0" /* 55236 */ + "PA_CL_UCP_4_Z\0" /* 55250 */ + "PA_CL_UCP_4_W\0" /* 55264 */ + "PA_CL_UCP_5_X\0" /* 55278 */ + "PA_CL_UCP_5_Y\0" /* 55292 */ + "PA_CL_UCP_5_Z\0" /* 55306 */ + "PA_CL_UCP_5_W\0" /* 55320 */ + "SPI_PS_INPUT_CNTL_0\0" /* 55334 */ + "SPI_PS_INPUT_CNTL_1\0" /* 55354 */ + "SPI_PS_INPUT_CNTL_2\0" /* 55374 */ + "SPI_PS_INPUT_CNTL_3\0" /* 55394 */ + "SPI_PS_INPUT_CNTL_4\0" /* 55414 */ + "SPI_PS_INPUT_CNTL_5\0" /* 55434 */ + "SPI_PS_INPUT_CNTL_6\0" /* 55454 */ + "SPI_PS_INPUT_CNTL_7\0" /* 55474 */ + "SPI_PS_INPUT_CNTL_8\0" /* 55494 */ + "SPI_PS_INPUT_CNTL_9\0" /* 55514 */ + "SPI_PS_INPUT_CNTL_10\0" /* 55534 */ + "SPI_PS_INPUT_CNTL_11\0" /* 55555 */ + "SPI_PS_INPUT_CNTL_12\0" /* 55576 */ + "SPI_PS_INPUT_CNTL_13\0" /* 55597 */ + "SPI_PS_INPUT_CNTL_14\0" /* 55618 */ + "SPI_PS_INPUT_CNTL_15\0" /* 55639 */ + "SPI_PS_INPUT_CNTL_16\0" /* 55660 */ + "SPI_PS_INPUT_CNTL_17\0" /* 55681 */ + "SPI_PS_INPUT_CNTL_18\0" /* 55702 */ + "SPI_PS_INPUT_CNTL_19\0" /* 55723 */ + "SPI_PS_INPUT_CNTL_20\0" /* 55744 */ + "SPI_PS_INPUT_CNTL_21\0" /* 55765 */ + "SPI_PS_INPUT_CNTL_22\0" /* 55786 */ + "SPI_PS_INPUT_CNTL_23\0" /* 55807 */ + "SPI_PS_INPUT_CNTL_24\0" /* 55828 */ + "SPI_PS_INPUT_CNTL_25\0" /* 55849 */ + "SPI_PS_INPUT_CNTL_26\0" /* 55870 */ + "SPI_PS_INPUT_CNTL_27\0" /* 55891 */ + "SPI_PS_INPUT_CNTL_28\0" /* 55912 */ + "SPI_PS_INPUT_CNTL_29\0" /* 55933 */ + "SPI_PS_INPUT_CNTL_30\0" /* 55954 */ + "SPI_PS_INPUT_CNTL_31\0" /* 55975 */ + "SPI_VS_OUT_CONFIG\0" /* 55996 */ + "SPI_PS_INPUT_ENA\0" /* 56014 */ + "SPI_PS_INPUT_ADDR\0" /* 56031 */ + "SPI_INTERP_CONTROL_0\0" /* 56049 */ + "SPI_PS_IN_CONTROL\0" /* 56070 */ + "SPI_BARYC_CNTL\0" /* 56088 */ + "SPI_TMPRING_SIZE\0" /* 56103 */ + "SPI_WAVE_MGMT_1\0" /* 56120 */ + "SPI_WAVE_MGMT_2\0" /* 56136 */ + "SPI_SHADER_POS_FORMAT\0" /* 56152 */ + "SPI_SHADER_Z_FORMAT\0" /* 56174 */ + "SPI_SHADER_COL_FORMAT\0" /* 56194 */ + "SX_PS_DOWNCONVERT\0" /* 56216 */ + "SX_BLEND_OPT_EPSILON\0" /* 56234 */ + "SX_BLEND_OPT_CONTROL\0" /* 56255 */ + "SX_MRT0_BLEND_OPT\0" /* 56276 */ + "SX_MRT1_BLEND_OPT\0" /* 56294 */ + "SX_MRT2_BLEND_OPT\0" /* 56312 */ + "SX_MRT3_BLEND_OPT\0" /* 56330 */ + "SX_MRT4_BLEND_OPT\0" /* 56348 */ + "SX_MRT5_BLEND_OPT\0" /* 56366 */ + "SX_MRT6_BLEND_OPT\0" /* 56384 */ + "SX_MRT7_BLEND_OPT\0" /* 56402 */ + "CB_BLEND0_CONTROL\0" /* 56420 */ + "CB_BLEND1_CONTROL\0" /* 56438 */ + "CB_BLEND2_CONTROL\0" /* 56456 */ + "CB_BLEND3_CONTROL\0" /* 56474 */ + "CB_BLEND4_CONTROL\0" /* 56492 */ + "CB_BLEND5_CONTROL\0" /* 56510 */ + "CB_BLEND6_CONTROL\0" /* 56528 */ + "CB_BLEND7_CONTROL\0" /* 56546 */ + "CS_COPY_STATE\0" /* 56564 */ + "PA_CL_POINT_X_RAD\0" /* 56578 */ + "PA_CL_POINT_Y_RAD\0" /* 56596 */ + "PA_CL_POINT_SIZE\0" /* 56614 */ + "PA_CL_POINT_CULL_RAD\0" /* 56631 */ + "VGT_DMA_BASE_HI\0" /* 56652 */ + "VGT_DMA_BASE\0" /* 56668 */ + "VGT_DRAW_INITIATOR\0" /* 56681 */ + "VGT_IMMED_DATA\0" /* 56700 */ + "VGT_EVENT_ADDRESS_REG\0" /* 56715 */ + "DB_DEPTH_CONTROL\0" /* 56737 */ + "DB_EQAA\0" /* 56754 */ + "CB_COLOR_CONTROL\0" /* 56762 */ + "DB_SHADER_CONTROL\0" /* 56779 */ + "PA_CL_CLIP_CNTL\0" /* 56797 */ + "PA_SU_SC_MODE_CNTL\0" /* 56813 */ + "PA_CL_VTE_CNTL\0" /* 56832 */ + "PA_CL_VS_OUT_CNTL\0" /* 56847 */ + "PA_CL_NANINF_CNTL\0" /* 56865 */ + "PA_SU_LINE_STIPPLE_CNTL\0" /* 56883 */ + "PA_SU_LINE_STIPPLE_SCALE\0" /* 56907 */ + "PA_SU_PRIM_FILTER_CNTL\0" /* 56932 */ + "PA_SU_SMALL_PRIM_FILTER_CNTL\0" /* 56955 */ + "PA_SU_POINT_SIZE\0" /* 56984 */ + "PA_SU_POINT_MINMAX\0" /* 57001 */ + "PA_SU_LINE_CNTL\0" /* 57020 */ + "PA_SC_LINE_STIPPLE\0" /* 57036 */ + "VGT_OUTPUT_PATH_CNTL\0" /* 57055 */ + "VGT_HOS_CNTL\0" /* 57076 */ + "VGT_HOS_MAX_TESS_LEVEL\0" /* 57089 */ + "VGT_HOS_MIN_TESS_LEVEL\0" /* 57112 */ + "VGT_HOS_REUSE_DEPTH\0" /* 57135 */ + "VGT_GROUP_PRIM_TYPE\0" /* 57155 */ + "VGT_GROUP_FIRST_DECR\0" /* 57175 */ + "VGT_GROUP_DECR\0" /* 57196 */ + "VGT_GROUP_VECT_0_CNTL\0" /* 57211 */ + "VGT_GROUP_VECT_1_CNTL\0" /* 57233 */ + "VGT_GROUP_VECT_0_FMT_CNTL\0" /* 57255 */ + "VGT_GROUP_VECT_1_FMT_CNTL\0" /* 57281 */ + "VGT_GS_MODE\0" /* 57307 */ + "VGT_GS_ONCHIP_CNTL\0" /* 57319 */ + "PA_SC_MODE_CNTL_0\0" /* 57338 */ + "PA_SC_MODE_CNTL_1\0" /* 57356 */ + "VGT_ENHANCE\0" /* 57374 */ + "VGT_GS_PER_ES\0" /* 57386 */ + "VGT_ES_PER_GS\0" /* 57400 */ + "VGT_GS_PER_VS\0" /* 57414 */ + "VGT_GSVS_RING_OFFSET_1\0" /* 57428 */ + "VGT_GSVS_RING_OFFSET_2\0" /* 57451 */ + "VGT_GSVS_RING_OFFSET_3\0" /* 57474 */ + "VGT_GS_OUT_PRIM_TYPE\0" /* 57497 */ + "IA_ENHANCE\0" /* 57518 */ + "VGT_DMA_SIZE\0" /* 57529 */ + "VGT_DMA_MAX_SIZE\0" /* 57542 */ + "VGT_DMA_INDEX_TYPE\0" /* 57559 */ + "WD_ENHANCE\0" /* 57578 */ + "VGT_PRIMITIVEID_EN\0" /* 57589 */ + "VGT_DMA_NUM_INSTANCES\0" /* 57608 */ + "VGT_PRIMITIVEID_RESET\0" /* 57630 */ + "VGT_EVENT_INITIATOR\0" /* 57652 */ + "VGT_MULTI_PRIM_IB_RESET_EN\0" /* 57672 */ + "VGT_INSTANCE_STEP_RATE_0\0" /* 57699 */ + "VGT_INSTANCE_STEP_RATE_1\0" /* 57724 */ + "IA_MULTI_VGT_PARAM\0" /* 57749 */ + "VGT_ESGS_RING_ITEMSIZE\0" /* 57768 */ + "VGT_GSVS_RING_ITEMSIZE\0" /* 57791 */ + "VGT_REUSE_OFF\0" /* 57814 */ + "VGT_VTX_CNT_EN\0" /* 57828 */ + "DB_HTILE_SURFACE\0" /* 57843 */ + "DB_SRESULTS_COMPARE_STATE0\0" /* 57860 */ + "DB_SRESULTS_COMPARE_STATE1\0" /* 57887 */ + "DB_PRELOAD_CONTROL\0" /* 57914 */ + "VGT_STRMOUT_BUFFER_SIZE_0\0" /* 57933 */ + "VGT_STRMOUT_VTX_STRIDE_0\0" /* 57959 */ + "VGT_STRMOUT_BUFFER_OFFSET_0\0" /* 57984 */ + "VGT_STRMOUT_BUFFER_SIZE_1\0" /* 58012 */ + "VGT_STRMOUT_VTX_STRIDE_1\0" /* 58038 */ + "VGT_STRMOUT_BUFFER_OFFSET_1\0" /* 58063 */ + "VGT_STRMOUT_BUFFER_SIZE_2\0" /* 58091 */ + "VGT_STRMOUT_VTX_STRIDE_2\0" /* 58117 */ + "VGT_STRMOUT_BUFFER_OFFSET_2\0" /* 58142 */ + "VGT_STRMOUT_BUFFER_SIZE_3\0" /* 58170 */ + "VGT_STRMOUT_VTX_STRIDE_3\0" /* 58196 */ + "VGT_STRMOUT_BUFFER_OFFSET_3\0" /* 58221 */ + "VGT_STRMOUT_DRAW_OPAQUE_OFFSET\0" /* 58249 */ + "VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE\0" /* 58280 */ + "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE\0" /* 58323 */ + "VGT_GS_MAX_VERT_OUT\0" /* 58361 */ + "VGT_TESS_DISTRIBUTION\0" /* 58381 */ + "VGT_SHADER_STAGES_EN\0" /* 58403 */ + "VGT_LS_HS_CONFIG\0" /* 58424 */ + "VGT_GS_VERT_ITEMSIZE\0" /* 58441 */ + "VGT_GS_VERT_ITEMSIZE_1\0" /* 58462 */ + "VGT_GS_VERT_ITEMSIZE_2\0" /* 58485 */ + "VGT_GS_VERT_ITEMSIZE_3\0" /* 58508 */ + "VGT_TF_PARAM\0" /* 58531 */ + "DB_ALPHA_TO_MASK\0" /* 58544 */ + "VGT_DISPATCH_DRAW_INDEX\0" /* 58561 */ + "PA_SU_POLY_OFFSET_DB_FMT_CNTL\0" /* 58585 */ + "PA_SU_POLY_OFFSET_CLAMP\0" /* 58615 */ + "PA_SU_POLY_OFFSET_FRONT_SCALE\0" /* 58639 */ + "PA_SU_POLY_OFFSET_FRONT_OFFSET\0" /* 58669 */ + "PA_SU_POLY_OFFSET_BACK_SCALE\0" /* 58700 */ + "PA_SU_POLY_OFFSET_BACK_OFFSET\0" /* 58729 */ + "VGT_GS_INSTANCE_CNT\0" /* 58759 */ + "VGT_STRMOUT_CONFIG\0" /* 58779 */ + "VGT_STRMOUT_BUFFER_CONFIG\0" /* 58798 */ + "PA_SC_CENTROID_PRIORITY_0\0" /* 58824 */ + "PA_SC_CENTROID_PRIORITY_1\0" /* 58850 */ + "PA_SC_LINE_CNTL\0" /* 58876 */ + "PA_SC_AA_CONFIG\0" /* 58892 */ + "PA_SU_VTX_CNTL\0" /* 58908 */ + "PA_CL_GB_VERT_CLIP_ADJ\0" /* 58923 */ + "PA_CL_GB_VERT_DISC_ADJ\0" /* 58946 */ + "PA_CL_GB_HORZ_CLIP_ADJ\0" /* 58969 */ + "PA_CL_GB_HORZ_DISC_ADJ\0" /* 58992 */ + "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0\0" /* 59015 */ + "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1\0" /* 59049 */ + "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2\0" /* 59083 */ + "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3\0" /* 59117 */ + "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0\0" /* 59151 */ + "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1\0" /* 59185 */ + "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2\0" /* 59219 */ + "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3\0" /* 59253 */ + "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0\0" /* 59287 */ + "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1\0" /* 59321 */ + "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2\0" /* 59355 */ + "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3\0" /* 59389 */ + "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0\0" /* 59423 */ + "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1\0" /* 59457 */ + "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2\0" /* 59491 */ + "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3\0" /* 59525 */ + "PA_SC_AA_MASK_X0Y0_X1Y0\0" /* 59559 */ + "PA_SC_AA_MASK_X0Y1_X1Y1\0" /* 59583 */ + "PA_SC_SHADER_CONTROL\0" /* 59607 */ + "VGT_VERTEX_REUSE_BLOCK_CNTL\0" /* 59628 */ + "VGT_OUT_DEALLOC_CNTL\0" /* 59656 */ + "CB_COLOR0_BASE\0" /* 59677 */ + "CB_COLOR0_PITCH\0" /* 59692 */ + "CB_COLOR0_SLICE\0" /* 59708 */ + "CB_COLOR0_VIEW\0" /* 59724 */ + "CB_COLOR0_INFO\0" /* 59739 */ + "CB_COLOR0_ATTRIB\0" /* 59754 */ + "CB_COLOR0_DCC_CONTROL\0" /* 59771 */ + "CB_COLOR0_CMASK\0" /* 59793 */ + "CB_COLOR0_CMASK_SLICE\0" /* 59809 */ + "CB_COLOR0_FMASK\0" /* 59831 */ + "CB_COLOR0_FMASK_SLICE\0" /* 59847 */ + "CB_COLOR0_CLEAR_WORD0\0" /* 59869 */ + "CB_COLOR0_CLEAR_WORD1\0" /* 59891 */ + "CB_COLOR0_DCC_BASE\0" /* 59913 */ + "CB_COLOR1_BASE\0" /* 59932 */ + "CB_COLOR1_PITCH\0" /* 59947 */ + "CB_COLOR1_SLICE\0" /* 59963 */ + "CB_COLOR1_VIEW\0" /* 59979 */ + "CB_COLOR1_INFO\0" /* 59994 */ + "CB_COLOR1_ATTRIB\0" /* 60009 */ + "CB_COLOR1_DCC_CONTROL\0" /* 60026 */ + "CB_COLOR1_CMASK\0" /* 60048 */ + "CB_COLOR1_CMASK_SLICE\0" /* 60064 */ + "CB_COLOR1_FMASK\0" /* 60086 */ + "CB_COLOR1_FMASK_SLICE\0" /* 60102 */ + "CB_COLOR1_CLEAR_WORD0\0" /* 60124 */ + "CB_COLOR1_CLEAR_WORD1\0" /* 60146 */ + "CB_COLOR1_DCC_BASE\0" /* 60168 */ + "CB_COLOR2_BASE\0" /* 60187 */ + "CB_COLOR2_PITCH\0" /* 60202 */ + "CB_COLOR2_SLICE\0" /* 60218 */ + "CB_COLOR2_VIEW\0" /* 60234 */ + "CB_COLOR2_INFO\0" /* 60249 */ + "CB_COLOR2_ATTRIB\0" /* 60264 */ + "CB_COLOR2_DCC_CONTROL\0" /* 60281 */ + "CB_COLOR2_CMASK\0" /* 60303 */ + "CB_COLOR2_CMASK_SLICE\0" /* 60319 */ + "CB_COLOR2_FMASK\0" /* 60341 */ + "CB_COLOR2_FMASK_SLICE\0" /* 60357 */ + "CB_COLOR2_CLEAR_WORD0\0" /* 60379 */ + "CB_COLOR2_CLEAR_WORD1\0" /* 60401 */ + "CB_COLOR2_DCC_BASE\0" /* 60423 */ + "CB_COLOR3_BASE\0" /* 60442 */ + "CB_COLOR3_PITCH\0" /* 60457 */ + "CB_COLOR3_SLICE\0" /* 60473 */ + "CB_COLOR3_VIEW\0" /* 60489 */ + "CB_COLOR3_INFO\0" /* 60504 */ + "CB_COLOR3_ATTRIB\0" /* 60519 */ + "CB_COLOR3_DCC_CONTROL\0" /* 60536 */ + "CB_COLOR3_CMASK\0" /* 60558 */ + "CB_COLOR3_CMASK_SLICE\0" /* 60574 */ + "CB_COLOR3_FMASK\0" /* 60596 */ + "CB_COLOR3_FMASK_SLICE\0" /* 60612 */ + "CB_COLOR3_CLEAR_WORD0\0" /* 60634 */ + "CB_COLOR3_CLEAR_WORD1\0" /* 60656 */ + "CB_COLOR3_DCC_BASE\0" /* 60678 */ + "CB_COLOR4_BASE\0" /* 60697 */ + "CB_COLOR4_PITCH\0" /* 60712 */ + "CB_COLOR4_SLICE\0" /* 60728 */ + "CB_COLOR4_VIEW\0" /* 60744 */ + "CB_COLOR4_INFO\0" /* 60759 */ + "CB_COLOR4_ATTRIB\0" /* 60774 */ + "CB_COLOR4_DCC_CONTROL\0" /* 60791 */ + "CB_COLOR4_CMASK\0" /* 60813 */ + "CB_COLOR4_CMASK_SLICE\0" /* 60829 */ + "CB_COLOR4_FMASK\0" /* 60851 */ + "CB_COLOR4_FMASK_SLICE\0" /* 60867 */ + "CB_COLOR4_CLEAR_WORD0\0" /* 60889 */ + "CB_COLOR4_CLEAR_WORD1\0" /* 60911 */ + "CB_COLOR4_DCC_BASE\0" /* 60933 */ + "CB_COLOR5_BASE\0" /* 60952 */ + "CB_COLOR5_PITCH\0" /* 60967 */ + "CB_COLOR5_SLICE\0" /* 60983 */ + "CB_COLOR5_VIEW\0" /* 60999 */ + "CB_COLOR5_INFO\0" /* 61014 */ + "CB_COLOR5_ATTRIB\0" /* 61029 */ + "CB_COLOR5_DCC_CONTROL\0" /* 61046 */ + "CB_COLOR5_CMASK\0" /* 61068 */ + "CB_COLOR5_CMASK_SLICE\0" /* 61084 */ + "CB_COLOR5_FMASK\0" /* 61106 */ + "CB_COLOR5_FMASK_SLICE\0" /* 61122 */ + "CB_COLOR5_CLEAR_WORD0\0" /* 61144 */ + "CB_COLOR5_CLEAR_WORD1\0" /* 61166 */ + "CB_COLOR5_DCC_BASE\0" /* 61188 */ + "CB_COLOR6_BASE\0" /* 61207 */ + "CB_COLOR6_PITCH\0" /* 61222 */ + "CB_COLOR6_SLICE\0" /* 61238 */ + "CB_COLOR6_VIEW\0" /* 61254 */ + "CB_COLOR6_INFO\0" /* 61269 */ + "CB_COLOR6_ATTRIB\0" /* 61284 */ + "CB_COLOR6_DCC_CONTROL\0" /* 61301 */ + "CB_COLOR6_CMASK\0" /* 61323 */ + "CB_COLOR6_CMASK_SLICE\0" /* 61339 */ + "CB_COLOR6_FMASK\0" /* 61361 */ + "CB_COLOR6_FMASK_SLICE\0" /* 61377 */ + "CB_COLOR6_CLEAR_WORD0\0" /* 61399 */ + "CB_COLOR6_CLEAR_WORD1\0" /* 61421 */ + "CB_COLOR6_DCC_BASE\0" /* 61443 */ + "CB_COLOR7_BASE\0" /* 61462 */ + "CB_COLOR7_PITCH\0" /* 61477 */ + "CB_COLOR7_SLICE\0" /* 61493 */ + "CB_COLOR7_VIEW\0" /* 61509 */ + "CB_COLOR7_INFO\0" /* 61524 */ + "CB_COLOR7_ATTRIB\0" /* 61539 */ + "CB_COLOR7_DCC_CONTROL\0" /* 61556 */ + "CB_COLOR7_CMASK\0" /* 61578 */ + "CB_COLOR7_CMASK_SLICE\0" /* 61594 */ + "CB_COLOR7_FMASK\0" /* 61616 */ + "CB_COLOR7_FMASK_SLICE\0" /* 61632 */ + "CB_COLOR7_CLEAR_WORD0\0" /* 61654 */ + "CB_COLOR7_CLEAR_WORD1\0" /* 61676 */ + "CB_COLOR7_DCC_BASE\0" /* 61698 */; + +static const int sid_strings_offsets[] = { + /* 0 */ 509, 867, 871, 874, + /* 4 */ 911, 931, 943, 949, 953, 962, + /* 10 */ 1020, 949, 391, 1029, + /* 14 */ 1059, 949, -1, 1068, + /* 18 */ 1157, 1162, 1170, 1178, + /* 22 */ 1204, 922, + /* 24 */ 1219, 1229, + /* 26 */ 5448, 5459, 5475, 5490, 5506, 5520, 5533, 5548, 5563, 5578, 5590, 5609, 5629, 5647, 5666, 5681, 5696, 5718, 5733, 5748, 5763, 5779, 5793, 5820, 5847, 5874, 5901, 5925, 5945, + /* 55 */ 5974, 5995, + /* 57 */ 5448, 5459, 5475, 5490, 5506, 5520, 5533, -1, -1, 5578, 5590, 5609, 5629, 5647, -1, -1, 5696, 5718, 5733, 5748, 5763, 5779, 5793, 5820, 5847, 5874, 5901, 5925, 5945, + /* 86 */ 7955, 7967, 7979, 7991, + /* 90 */ 8339, -1, -1, -1, -1, -1, -1, -1, 8350, 8362, -1, -1, 8374, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 8385, + /* 123 */ -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 8411, + /* 186 */ 8506, 8515, 8524, 8542, 8560, 8569, 8578, 8587, + /* 194 */ 8636, 8657, 8678, 8701, 8724, 8744, 8764, 8789, + /* 202 */ 8821, 8845, 8863, 8882, 8902, 8921, 8943, 8968, 8993, 9020, 9047, 9071, 9093, 9121, 9146, 9174, + /* 218 */ 9282, 9294, 9313, 9332, + /* 222 */ 9359, 9383, 9401, 9420, 9440, 9459, 9481, 9506, 9531, 9558, 9585, 9609, 9631, 9659, 9684, 9712, 9740, 9762, 9786, 9810, 9834, 9855, 9876, 9901, 9930, 9955, 9981, 10004, 10028, 10055, 10083, 10111, 10139, 10161, 10183, 10207, 10227, 10247, 10267, 10287, 10307, 10327, 10347, 10381, 10415, 10444, 10473, 10502, 10531, 10560, 10589, 10620, 10650, 10681, 10711, 10741, 10772, 10803, 10823, 10845, 10863, 10890, 10914, 10940, + /* 286 */ 10974, 10995, 11016, 11039, 11062, 11082, 11102, 11127, 11148, 11174, 11194, 11216, 11242, 11263, 11287, 11314, + /* 302 */ 11418, 11437, 11456, 11475, 11494, 11513, 11532, 11551, 11570, 11585, 11600, 11615, 11632, 11653, 11674, 11694, + /* 318 */ 11877, 11889, 11903, 11927, 11957, 11982, 12013, 12033, + /* 326 */ 12099, 12126, 12152, 12179, 12210, 12239, 12269, 12303, + /* 334 */ 12525, 12548, + /* 336 */ 12525, 12548, 12588, 12617, + /* 340 */ 12663, 12684, 12706, + /* 343 */ 12833, 12865, 12898, 12931, + /* 347 */ 13122, + /* 348 */ 13421, 13437, 13453, 13469, 13485, 13501, 13517, 13533, 13549, 13565, 13581, 13597, 13612, 13627, 13642, 13658, + /* 364 */ 14070, 14101, 14129, 14158, + /* 368 */ 14203, 14224, 14245, 14266, 14287, -1, -1, 14308, 14329, -1, -1, -1, 14351, 14372, 14393, 14415, + /* 384 */ 14443, 14456, 14479, 14502, 14525, 14545, 14566, 14587, 14608, 14634, 14660, 14686, 14713, 14740, 14767, + /* 399 */ 14806, 14831, 14857, 14883, 14909, 14934, 14959, + /* 406 */ 14995, 15018, 15041, 15064, + /* 410 */ 15098, 15122, 15146, 15170, + /* 414 */ 15206, 15231, 15256, 15281, + /* 418 */ 15324, 15341, 15358, 15375, + /* 422 */ 14070, 14101, 14129, 15403, + /* 426 */ -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 15518, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 15532, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 15546, + /* 667 */ 16476, 16494, 16509, + /* 670 */ 18046, 18056, 18069, 18083, + /* 674 */ 18380, 18395, 18411, 18427, + /* 678 */ 18592, 18602, 18620, 18630, + /* 682 */ 14203, 14224, 14245, -1, 14287, 19035, 19057, + /* 689 */ 14443, -1, -1, -1, 14525, 14545, 14566, 14587, 14608, 14634, 14660, 14686, 14713, 14740, 14767, -1, 19082, 19109, + /* 707 */ 19137, 19147, 19152, 19157, + /* 711 */ 19299, 19315, + /* 713 */ 19793, 19816, 19839, 19862, + /* 717 */ 19909, 19934, 19959, 19984, + /* 721 */ 20034, 20058, 20082, 20106, + /* 725 */ 20138, 20163, 20188, 20213, + /* 729 */ 20247, 20272, 20297, 20322, + /* 733 */ 20356, 20382, 20408, 20434, + /* 737 */ 20470, 20493, 20516, 20539, + /* 741 */ 20569, 20603, 20638, 20673, + /* 745 */ 20716, 20750, 20785, 20820, + /* 749 */ 20863, 20886, 20909, 20932, + /* 753 */ 20962, 20996, 21031, 21066, + /* 757 */ 21109, 21143, 21178, 21213, + /* 761 */ 21256, 21284, 21312, 21340, + /* 765 */ 21380, 21419, 21459, 21499, + /* 769 */ 21552, 21591, 21631, 21671, + /* 773 */ 21819, 21832, 21845, 21858, 21879, 21898, 21916, 21934, 21949, 21966, 21983, 21995, 22006, 22018, 22031, 22043, + /* 789 */ 22267, + /* 790 */ 22796, 22817, 22838, 22859, 22880, + /* 795 */ 23141, + /* 796 */ 23321, 23337, 23354, 23371, 23392, + /* 801 */ 23485, 23501, 23517, 23534, 23551, 23572, 23596, 23620, 23643, 23666, + /* 811 */ 23853, 23880, 23898, 23916, 23938, 23962, 23983, 24002, 24023, 24044, 24066, + /* 822 */ 24128, 24134, -1, 24147, -1, -1, -1, 24160, -1, -1, -1, 24172, -1, 24184, -1, 24196, + /* 838 */ 24703, 24738, 24773, 24805, 24837, 24869, 24901, 24935, + /* 846 */ 24999, 25013, 25026, 25044, 25057, 25070, 25091, 25115, + /* 854 */ 25191, 25202, 25212, 25228, 25254, 25270, 25296, 25312, 25338, 25354, 25380, -1, -1, 25405, 25426, 25457, 25474, 25495, 25512, 25533, 25554, + /* 875 */ 25600, 25618, 25637, 25654, 25671, + /* 880 */ 25794, 25809, 25830, 25852, + /* 884 */ 25886, 25902, + /* 886 */ 26010, 26021, 26031, 26042, 26054, 26067, 26081, 26093, + /* 894 */ 26121, 26131, 26140, 26150, 26161, 26173, 26186, 26197, + /* 902 */ 26618, 26629, 26639, 26663, -1, 26674, 26694, + /* 909 */ 26712, -1, -1, -1, -1, 26719, -1, -1, -1, -1, 26726, -1, -1, -1, -1, 26733, -1, 26740, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 26747, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 26754, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 26761, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 26768, -1, -1, -1, -1, 26775, -1, -1, -1, -1, 26782, -1, -1, -1, -1, 26789, -1, -1, -1, -1, -1, -1, 26796, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 26803, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 26810, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 26817, -1, -1, -1, -1, -1, -1, 26824, -1, -1, -1, -1, 26831, -1, -1, -1, -1, 26838, -1, -1, -1, -1, 26845, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 26852, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 26859, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 26866, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 26873, -1, 26880, -1, -1, -1, -1, 26887, -1, -1, -1, -1, 26894, -1, -1, -1, -1, 26901, + /* 1165 */ 26984, 26991, 27011, 27016, + /* 1169 */ 27162, 27175, 27194, 27216, + /* 1173 */ 27602, 27622, + /* 1175 */ 27634, 27648, 27661, + /* 1178 */ 29192, 29214, 29234, 29255, 29276, + /* 1183 */ 29331, 29348, 29364, 29379, 29395, 29411, 29435, 29459, 29483, 29507, 29528, 29544, 29559, 29583, 29606, 29630, 29650, 29669, + /* 1201 */ 29712, 29725, 29739, 29751, 29764, + /* 1206 */ 29848, 29865, 29882, 29898, 29914, 29930, 29946, 29963, 29981, + /* 1215 */ 30053, 30060, 30074, 30088, 30102, 30116, + /* 1221 */ 30126, 30138, 30149, 30160, + /* 1225 */ 30332, -1, -1, 30347, + /* 1229 */ 31016, 31039, 31062, + /* 1232 */ 31165, 31178, 31191, + /* 1235 */ 31203, 31221, 31241, 31261, + /* 1239 */ 31289, 31305, 31322, + /* 1242 */ 31349, 31364, + /* 1244 */ -1, 31456, 31479, 31502, 31525, 31540, 31553, 31565, 31582, -1, 31601, 31621, 31641, 31660, -1, 31672, 31689, 31706, 31722, -1, 31738, 31767, 31778, 31804, 31822, 31839, 31858, 31876, 31895, 31911, 31927, 31947, 31969, 31991, 32005, 32024, 32040, -1, -1, 32050, 32065, -1, 32083, 32106, 32131, 32153, 32178, 7592, 7619, 32200, -1, 32228, 32247, 32265, 32285, 32304, 32324, 32348, 32369, + /* 1303 */ 32878, 32891, 32903, + /* 1306 */ 32915, 32928, 32940, + /* 1309 */ 32954, 32968, 32980, + /* 1312 */ 33111, 33124, 33138, + /* 1315 */ 33148, 33161, 33171, 33185, + /* 1319 */ 33213, 33226, 33238, 33257, + /* 1323 */ 31349, 31364, 33354, + /* 1326 */ 33372, 33398, 33424, 33449, + /* 1330 */ 34228, 34239, 34247, 34263, + /* 1334 */ 34289, 34315, 34340, 34365, 34388, 34409, 34436, 34465, + /* 1342 */ 34802, 34814, 34827, 34840, + /* 1346 */ 34860, 34874, 34882, 34891, 34901, 34910, 34922, 34937, 34952, 34969, 34986, 35000, 35012, -1, 35030, -1, 35048, 35060, 35074, 35088, 35102, 35113, 35124, + /* 1369 */ 35145, 35158, -1, -1, 35171, 35183, 35195, 35207, + /* 1377 */ 35232, 35241, 35250, 35263, + /* 1381 */ 35340, 35355, 35373, 35401, 35431, 35462, 35490, +}; + +#endif diff -Nru mesa-12.0.6/src/amd/common/sid_tables.py mesa-17.0.7/src/amd/common/sid_tables.py --- mesa-12.0.6/src/amd/common/sid_tables.py 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/common/sid_tables.py 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,295 @@ +#!/usr/bin/env python + +CopyRight = ''' +/* + * Copyright 2015 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ +''' + +import sys +import re + + +class StringTable: + """ + A class for collecting multiple strings in a single larger string that is + used by indexing (to avoid relocations in the resulting binary) + """ + def __init__(self): + self.table = [] + self.length = 0 + + def add(self, string): + # We might get lucky with string being a suffix of a previously added string + for te in self.table: + if te[0].endswith(string): + idx = te[1] + len(te[0]) - len(string) + te[2].add(idx) + return idx + + idx = self.length + self.table.append((string, idx, set((idx,)))) + self.length += len(string) + 1 + + return idx + + def emit(self, filp, name, static=True): + """ + Write + [static] const char name[] = "..."; + to filp. + """ + fragments = [ + '"%s\\0" /* %s */' % ( + te[0].encode('string_escape'), + ', '.join(str(idx) for idx in te[2]) + ) + for te in self.table + ] + filp.write('%sconst char %s[] =\n%s;\n' % ( + 'static ' if static else '', + name, + '\n'.join('\t' + fragment for fragment in fragments) + )) + +class IntTable: + """ + A class for collecting multiple arrays of integers in a single big array + that is used by indexing (to avoid relocations in the resulting binary) + """ + def __init__(self, typename): + self.typename = typename + self.table = [] + self.idxs = set() + + def add(self, array): + # We might get lucky and find the array somewhere in the existing data + try: + idx = 0 + while True: + idx = self.table.index(array[0], idx, len(self.table) - len(array) + 1) + + for i in range(1, len(array)): + if array[i] != self.table[idx + i]: + break + else: + self.idxs.add(idx) + return idx + + idx += 1 + except ValueError: + pass + + idx = len(self.table) + self.table += array + self.idxs.add(idx) + return idx + + def emit(self, filp, name, static=True): + """ + Write + [static] const typename name[] = { ... }; + to filp. + """ + idxs = sorted(self.idxs) + [-1] + + fragments = [ + ('\t/* %s */ %s' % ( + idxs[i], + ' '.join((str(elt) + ',') for elt in self.table[idxs[i]:idxs[i+1]]) + )) + for i in range(len(idxs) - 1) + ] + + filp.write('%sconst %s %s[] = {\n%s\n};\n' % ( + 'static ' if static else '', + self.typename, name, + '\n'.join(fragments) + )) + +class Field: + def __init__(self, reg, s_name): + self.s_name = s_name + self.name = strip_prefix(s_name) + self.values = [] + self.varname_values = '%s__%s__values' % (reg.r_name.lower(), self.name.lower()) + +class Reg: + def __init__(self, r_name): + self.r_name = r_name + self.name = strip_prefix(r_name) + self.fields = [] + self.own_fields = True + + +def strip_prefix(s): + '''Strip prefix in the form ._.*_, e.g. R_001234_''' + return s[s[2:].find('_')+3:] + + +def parse(filename): + stream = open(filename) + regs = [] + packets = [] + + for line in stream: + if not line.startswith('#define '): + continue + + line = line[8:].strip() + + if line.startswith('R_'): + reg = Reg(line.split()[0]) + regs.append(reg) + + elif line.startswith('S_'): + field = Field(reg, line[:line.find('(')]) + reg.fields.append(field) + + elif line.startswith('V_'): + split = line.split() + field.values.append((split[0], int(split[1], 0))) + + elif line.startswith('PKT3_') and line.find('0x') != -1 and line.find('(') == -1: + packets.append(line.split()[0]) + + # Copy fields to indexed registers which have their fields only defined + # at register index 0. + # For example, copy fields from CB_COLOR0_INFO to CB_COLORn_INFO, n > 0. + match_number = re.compile('[0-9]+') + reg_dict = dict() + + # Create a dict of registers with fields and '0' in their name + for reg in regs: + if len(reg.fields) and reg.name.find('0') != -1: + reg_dict[reg.name] = reg + + # Assign fields + for reg in regs: + if not len(reg.fields): + reg0 = reg_dict.get(match_number.sub('0', reg.name)) + if reg0 != None: + reg.fields = reg0.fields + reg.fields_owner = reg0 + reg.own_fields = False + + return (regs, packets) + + +def write_tables(tables): + regs = tables[0] + packets = tables[1] + + strings = StringTable() + strings_offsets = IntTable("int") + + print '/* This file is autogenerated by sid_tables.py from sid.h. Do not edit directly. */' + print + print CopyRight.strip() + print ''' +#ifndef SID_TABLES_H +#define SID_TABLES_H + +struct si_field { + unsigned name_offset; + unsigned mask; + unsigned num_values; + unsigned values_offset; /* offset into sid_strings_offsets */ +}; + +struct si_reg { + unsigned name_offset; + unsigned offset; + unsigned num_fields; + unsigned fields_offset; +}; + +struct si_packet3 { + unsigned name_offset; + unsigned op; +}; +''' + + print 'static const struct si_packet3 packet3_table[] = {' + for pkt in packets: + print '\t{%s, %s},' % (strings.add(pkt[5:]), pkt) + print '};' + print + + print 'static const struct si_field sid_fields_table[] = {' + + fields_idx = 0 + for reg in regs: + if len(reg.fields) and reg.own_fields: + print '\t/* %s */' % (fields_idx) + + reg.fields_idx = fields_idx + + for field in reg.fields: + if len(field.values): + values_offsets = [] + for value in field.values: + while value[1] >= len(values_offsets): + values_offsets.append(-1) + values_offsets[value[1]] = strings.add(strip_prefix(value[0])) + print '\t{%s, %s(~0u), %s, %s},' % ( + strings.add(field.name), field.s_name, + len(values_offsets), strings_offsets.add(values_offsets)) + else: + print '\t{%s, %s(~0u)},' % (strings.add(field.name), field.s_name) + fields_idx += 1 + + print '};' + print + + print 'static const struct si_reg sid_reg_table[] = {' + for reg in regs: + if len(reg.fields): + print '\t{%s, %s, %s, %s},' % (strings.add(reg.name), reg.r_name, + len(reg.fields), reg.fields_idx if reg.own_fields else reg.fields_owner.fields_idx) + else: + print '\t{%s, %s},' % (strings.add(reg.name), reg.r_name) + print '};' + print + + strings.emit(sys.stdout, "sid_strings") + + print + + strings_offsets.emit(sys.stdout, "sid_strings_offsets") + + print + print '#endif' + + +def main(): + tables = [] + for arg in sys.argv[1:]: + tables.extend(parse(arg)) + write_tables(tables) + + +if __name__ == '__main__': + main() + +# kate: space-indent on; indent-width 4; replace-tabs on; diff -Nru mesa-12.0.6/src/amd/Makefile.addrlib.am mesa-17.0.7/src/amd/Makefile.addrlib.am --- mesa-12.0.6/src/amd/Makefile.addrlib.am 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/Makefile.addrlib.am 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,38 @@ +# Copyright 2016 Red Hat Inc. +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +# IN THE SOFTWARE. + +ADDRLIB_LIBS = addrlib/libamdgpu_addrlib.la + +addrlib_libamdgpu_addrlib_la_CPPFLAGS = \ + -I$(top_srcdir)/src/ \ + -I$(srcdir)/common \ + -I$(srcdir)/addrlib \ + -I$(srcdir)/addrlib/core \ + -I$(srcdir)/addrlib/inc/chip/r800 \ + -I$(srcdir)/addrlib/r800/chip \ + -DBRAHMA_BUILD=1 + +addrlib_libamdgpu_addrlib_la_CXXFLAGS = \ + $(VISIBILITY_CXXFLAGS) + +noinst_LTLIBRARIES += $(ADDRLIB_LIBS) + +addrlib_libamdgpu_addrlib_la_SOURCES = $(ADDRLIB_FILES) diff -Nru mesa-12.0.6/src/amd/Makefile.am mesa-17.0.7/src/amd/Makefile.am --- mesa-12.0.6/src/amd/Makefile.am 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,28 @@ +# Copyright © 2016 Red Hat. +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +# IN THE SOFTWARE. + +include Makefile.sources + +noinst_LTLIBRARIES = + +EXTRA_DIST = $(COMMON_HEADER_FILES) common/sid_tables.py +include Makefile.addrlib.am +include Makefile.common.am diff -Nru mesa-12.0.6/src/amd/Makefile.common.am mesa-17.0.7/src/amd/Makefile.common.am --- mesa-12.0.6/src/amd/Makefile.common.am 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/Makefile.common.am 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,72 @@ +# Copyright © 2016 Bas Nieuwenhuizen +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +# IN THE SOFTWARE. + +if NEED_RADEON_LLVM + +COMMON_LIBS = common/libamd_common.la + +# TODO cleanup these +common_libamd_common_la_CPPFLAGS = \ + $(VALGRIND_CFLAGS) \ + $(DEFINES) \ + -I$(top_srcdir)/include \ + -I$(top_builddir)/src \ + -I$(top_srcdir)/src \ + -I$(top_builddir)/src/amd/common \ + -I$(top_srcdir)/src/amd/common \ + -I$(top_builddir)/src/compiler \ + -I$(top_builddir)/src/compiler/nir \ + -I$(top_srcdir)/src/compiler \ + -I$(top_srcdir)/src/mapi \ + -I$(top_srcdir)/src/mesa \ + -I$(top_srcdir)/src/mesa/drivers/dri/common \ + -I$(top_srcdir)/src/gallium/auxiliary \ + -I$(top_srcdir)/src/gallium/include + +common_libamd_common_la_CFLAGS = \ + $(VISIBILITY_CFLAGS) \ + $(PTHREAD_CFLAGS) \ + $(LLVM_CFLAGS) \ + $(LIBELF_CFLAGS) + +common_libamd_common_la_CXXFLAGS = \ + $(VISIBILITY_CXXFLAGS) \ + $(LLVM_CXXFLAGS) + +noinst_LTLIBRARIES += $(COMMON_LIBS) + +common_libamd_common_la_SOURCES = \ + $(AMD_COMPILER_FILES) \ + $(AMD_DEBUG_FILES) \ + $(AMD_GENERATED_FILES) + +# nir_to_llvm requires LLVM 3.9, which is only required as a minimum when +# radv is built. +if HAVE_RADEON_VULKAN +common_libamd_common_la_SOURCES += $(AMD_NIR_FILES) +endif +endif + +common/sid_tables.h: $(srcdir)/common/sid_tables.py $(srcdir)/common/sid.h + $(AM_V_at)$(MKDIR_P) $(@D) + $(AM_V_GEN) $(PYTHON2) $(srcdir)/common/sid_tables.py $(srcdir)/common/sid.h > $@ + +BUILT_SOURCES = $(AMD_GENERATED_FILES) diff -Nru mesa-12.0.6/src/amd/Makefile.in mesa-17.0.7/src/amd/Makefile.in --- mesa-12.0.6/src/amd/Makefile.in 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/Makefile.in 2017-06-01 10:37:19.000000000 +0000 @@ -0,0 +1,1198 @@ +# Makefile.in generated by automake 1.15 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994-2014 Free Software Foundation, Inc. + +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +# PARTICULAR PURPOSE. + +@SET_MAKE@ + +# Copyright © 2016 Red Hat. +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 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@srcdir@ +sysconfdir = @sysconfdir@ +target = @target@ +target_alias = @target_alias@ +target_cpu = @target_cpu@ +target_os = @target_os@ +target_vendor = @target_vendor@ +top_build_prefix = @top_build_prefix@ +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ +COMMON_HEADER_FILES = \ + common/sid.h \ + common/r600d_common.h \ + common/amd_family.h \ + common/amd_kernel_code_t.h \ + common/amdgpu_id.h + +ADDRLIB_FILES = \ + addrlib/addrinterface.cpp \ + addrlib/addrinterface.h \ + addrlib/addrtypes.h \ + addrlib/core/addrcommon.h \ + addrlib/core/addrelemlib.cpp \ + addrlib/core/addrelemlib.h \ + addrlib/core/addrlib.cpp \ + addrlib/core/addrlib.h \ + addrlib/core/addrobject.cpp \ + addrlib/core/addrobject.h \ + addrlib/inc/chip/r800/si_gb_reg.h \ + addrlib/inc/lnx_common_defs.h \ + addrlib/r800/chip/si_ci_vi_merged_enum.h \ + addrlib/r800/ciaddrlib.cpp \ + addrlib/r800/ciaddrlib.h \ + addrlib/r800/egbaddrlib.cpp \ + addrlib/r800/egbaddrlib.h \ + addrlib/r800/siaddrlib.cpp \ + addrlib/r800/siaddrlib.h + +AMD_COMPILER_FILES = \ + common/ac_binary.c \ + common/ac_binary.h \ + common/ac_llvm_helper.cpp \ + common/ac_llvm_util.c \ + common/ac_llvm_util.h + +AMD_NIR_FILES = \ + common/ac_nir_to_llvm.c \ + common/ac_nir_to_llvm.h + +AMD_DEBUG_FILES = \ + common/ac_debug.c \ + common/ac_debug.h + +AMD_GENERATED_FILES = \ + common/sid_tables.h + +noinst_LTLIBRARIES = $(ADDRLIB_LIBS) $(am__append_1) +EXTRA_DIST = $(COMMON_HEADER_FILES) common/sid_tables.py +ADDRLIB_LIBS = addrlib/libamdgpu_addrlib.la +addrlib_libamdgpu_addrlib_la_CPPFLAGS = \ + -I$(top_srcdir)/src/ \ + -I$(srcdir)/common \ + -I$(srcdir)/addrlib \ + -I$(srcdir)/addrlib/core \ + -I$(srcdir)/addrlib/inc/chip/r800 \ + -I$(srcdir)/addrlib/r800/chip \ + -DBRAHMA_BUILD=1 + +addrlib_libamdgpu_addrlib_la_CXXFLAGS = \ + $(VISIBILITY_CXXFLAGS) + +addrlib_libamdgpu_addrlib_la_SOURCES = $(ADDRLIB_FILES) +@NEED_RADEON_LLVM_TRUE@COMMON_LIBS = common/libamd_common.la + +# TODO cleanup these +@NEED_RADEON_LLVM_TRUE@common_libamd_common_la_CPPFLAGS = \ +@NEED_RADEON_LLVM_TRUE@ $(VALGRIND_CFLAGS) \ +@NEED_RADEON_LLVM_TRUE@ $(DEFINES) \ +@NEED_RADEON_LLVM_TRUE@ -I$(top_srcdir)/include \ +@NEED_RADEON_LLVM_TRUE@ -I$(top_builddir)/src \ +@NEED_RADEON_LLVM_TRUE@ -I$(top_srcdir)/src \ +@NEED_RADEON_LLVM_TRUE@ -I$(top_builddir)/src/amd/common \ +@NEED_RADEON_LLVM_TRUE@ -I$(top_srcdir)/src/amd/common \ +@NEED_RADEON_LLVM_TRUE@ -I$(top_builddir)/src/compiler \ +@NEED_RADEON_LLVM_TRUE@ -I$(top_builddir)/src/compiler/nir \ +@NEED_RADEON_LLVM_TRUE@ -I$(top_srcdir)/src/compiler \ +@NEED_RADEON_LLVM_TRUE@ -I$(top_srcdir)/src/mapi \ +@NEED_RADEON_LLVM_TRUE@ -I$(top_srcdir)/src/mesa \ +@NEED_RADEON_LLVM_TRUE@ -I$(top_srcdir)/src/mesa/drivers/dri/common \ +@NEED_RADEON_LLVM_TRUE@ -I$(top_srcdir)/src/gallium/auxiliary \ +@NEED_RADEON_LLVM_TRUE@ -I$(top_srcdir)/src/gallium/include + +@NEED_RADEON_LLVM_TRUE@common_libamd_common_la_CFLAGS = \ +@NEED_RADEON_LLVM_TRUE@ $(VISIBILITY_CFLAGS) \ +@NEED_RADEON_LLVM_TRUE@ $(PTHREAD_CFLAGS) \ +@NEED_RADEON_LLVM_TRUE@ $(LLVM_CFLAGS) \ +@NEED_RADEON_LLVM_TRUE@ $(LIBELF_CFLAGS) + +@NEED_RADEON_LLVM_TRUE@common_libamd_common_la_CXXFLAGS = \ +@NEED_RADEON_LLVM_TRUE@ $(VISIBILITY_CXXFLAGS) \ +@NEED_RADEON_LLVM_TRUE@ $(LLVM_CXXFLAGS) + +@NEED_RADEON_LLVM_TRUE@common_libamd_common_la_SOURCES = \ +@NEED_RADEON_LLVM_TRUE@ $(AMD_COMPILER_FILES) \ +@NEED_RADEON_LLVM_TRUE@ $(AMD_DEBUG_FILES) \ +@NEED_RADEON_LLVM_TRUE@ $(AMD_GENERATED_FILES) $(am__append_2) +BUILT_SOURCES = $(AMD_GENERATED_FILES) +all: $(BUILT_SOURCES) + $(MAKE) $(AM_MAKEFLAGS) all-am + +.SUFFIXES: +.SUFFIXES: .c .cpp .lo .o .obj +$(srcdir)/Makefile.in: $(srcdir)/Makefile.am $(srcdir)/Makefile.sources $(srcdir)/Makefile.addrlib.am $(srcdir)/Makefile.common.am $(am__configure_deps) + @for dep in $?; do \ + case '$(am__configure_deps)' in \ + *$$dep*) \ + ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \ + && { if test -f $@; then exit 0; else break; fi; }; \ + exit 1;; \ + esac; \ + done; \ + echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign src/amd/Makefile'; \ + $(am__cd) $(top_srcdir) && \ + $(AUTOMAKE) --foreign src/amd/Makefile +Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status + @case '$?' in \ + *config.status*) \ + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \ + *) \ + echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \ + cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \ + esac; +$(srcdir)/Makefile.sources $(srcdir)/Makefile.addrlib.am $(srcdir)/Makefile.common.am $(am__empty): + +$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh + +$(top_srcdir)/configure: $(am__configure_deps) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh +$(ACLOCAL_M4): $(am__aclocal_m4_deps) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh +$(am__aclocal_m4_deps): + +clean-noinstLTLIBRARIES: + -test -z "$(noinst_LTLIBRARIES)" || rm -f $(noinst_LTLIBRARIES) + @list='$(noinst_LTLIBRARIES)'; \ + locs=`for p in $$list; do echo $$p; done | \ + sed 's|^[^/]*$$|.|; s|/[^/]*$$||; s|$$|/so_locations|' | \ + sort -u`; \ + test -z "$$locs" || { \ + echo rm -f $${locs}; \ + rm -f $${locs}; \ + } +addrlib/$(am__dirstamp): + @$(MKDIR_P) addrlib + @: > addrlib/$(am__dirstamp) +addrlib/$(DEPDIR)/$(am__dirstamp): + @$(MKDIR_P) addrlib/$(DEPDIR) + @: > addrlib/$(DEPDIR)/$(am__dirstamp) +addrlib/addrlib_libamdgpu_addrlib_la-addrinterface.lo: \ + addrlib/$(am__dirstamp) addrlib/$(DEPDIR)/$(am__dirstamp) +addrlib/core/$(am__dirstamp): + @$(MKDIR_P) addrlib/core + @: > addrlib/core/$(am__dirstamp) +addrlib/core/$(DEPDIR)/$(am__dirstamp): + @$(MKDIR_P) addrlib/core/$(DEPDIR) + @: > addrlib/core/$(DEPDIR)/$(am__dirstamp) +addrlib/core/addrlib_libamdgpu_addrlib_la-addrelemlib.lo: \ + addrlib/core/$(am__dirstamp) \ + addrlib/core/$(DEPDIR)/$(am__dirstamp) +addrlib/core/addrlib_libamdgpu_addrlib_la-addrlib.lo: \ + addrlib/core/$(am__dirstamp) \ + addrlib/core/$(DEPDIR)/$(am__dirstamp) +addrlib/core/addrlib_libamdgpu_addrlib_la-addrobject.lo: \ + addrlib/core/$(am__dirstamp) \ + addrlib/core/$(DEPDIR)/$(am__dirstamp) +addrlib/r800/$(am__dirstamp): + @$(MKDIR_P) addrlib/r800 + @: > addrlib/r800/$(am__dirstamp) +addrlib/r800/$(DEPDIR)/$(am__dirstamp): + @$(MKDIR_P) addrlib/r800/$(DEPDIR) + @: > addrlib/r800/$(DEPDIR)/$(am__dirstamp) +addrlib/r800/addrlib_libamdgpu_addrlib_la-ciaddrlib.lo: \ + addrlib/r800/$(am__dirstamp) \ + addrlib/r800/$(DEPDIR)/$(am__dirstamp) +addrlib/r800/addrlib_libamdgpu_addrlib_la-egbaddrlib.lo: \ + addrlib/r800/$(am__dirstamp) \ + addrlib/r800/$(DEPDIR)/$(am__dirstamp) +addrlib/r800/addrlib_libamdgpu_addrlib_la-siaddrlib.lo: \ + addrlib/r800/$(am__dirstamp) \ + addrlib/r800/$(DEPDIR)/$(am__dirstamp) + +addrlib/libamdgpu_addrlib.la: $(addrlib_libamdgpu_addrlib_la_OBJECTS) $(addrlib_libamdgpu_addrlib_la_DEPENDENCIES) $(EXTRA_addrlib_libamdgpu_addrlib_la_DEPENDENCIES) addrlib/$(am__dirstamp) + $(AM_V_CXXLD)$(addrlib_libamdgpu_addrlib_la_LINK) $(addrlib_libamdgpu_addrlib_la_OBJECTS) $(addrlib_libamdgpu_addrlib_la_LIBADD) $(LIBS) +common/$(am__dirstamp): + @$(MKDIR_P) common + @: > common/$(am__dirstamp) +common/$(DEPDIR)/$(am__dirstamp): + @$(MKDIR_P) common/$(DEPDIR) + @: > common/$(DEPDIR)/$(am__dirstamp) +common/common_libamd_common_la-ac_binary.lo: common/$(am__dirstamp) \ + common/$(DEPDIR)/$(am__dirstamp) +common/common_libamd_common_la-ac_llvm_helper.lo: \ + common/$(am__dirstamp) common/$(DEPDIR)/$(am__dirstamp) +common/common_libamd_common_la-ac_llvm_util.lo: \ + common/$(am__dirstamp) common/$(DEPDIR)/$(am__dirstamp) +common/common_libamd_common_la-ac_debug.lo: common/$(am__dirstamp) \ + common/$(DEPDIR)/$(am__dirstamp) +common/common_libamd_common_la-ac_nir_to_llvm.lo: \ + common/$(am__dirstamp) common/$(DEPDIR)/$(am__dirstamp) + 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2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,45 @@ +COMMON_HEADER_FILES = \ + common/sid.h \ + common/r600d_common.h \ + common/amd_family.h \ + common/amd_kernel_code_t.h \ + common/amdgpu_id.h + +ADDRLIB_FILES = \ + addrlib/addrinterface.cpp \ + addrlib/addrinterface.h \ + addrlib/addrtypes.h \ + addrlib/core/addrcommon.h \ + addrlib/core/addrelemlib.cpp \ + addrlib/core/addrelemlib.h \ + addrlib/core/addrlib.cpp \ + addrlib/core/addrlib.h \ + addrlib/core/addrobject.cpp \ + addrlib/core/addrobject.h \ + addrlib/inc/chip/r800/si_gb_reg.h \ + addrlib/inc/lnx_common_defs.h \ + addrlib/r800/chip/si_ci_vi_merged_enum.h \ + addrlib/r800/ciaddrlib.cpp \ + addrlib/r800/ciaddrlib.h \ + addrlib/r800/egbaddrlib.cpp \ + addrlib/r800/egbaddrlib.h \ + addrlib/r800/siaddrlib.cpp \ + addrlib/r800/siaddrlib.h + +AMD_COMPILER_FILES = \ + common/ac_binary.c \ + common/ac_binary.h \ + common/ac_llvm_helper.cpp \ + common/ac_llvm_util.c \ + common/ac_llvm_util.h + +AMD_NIR_FILES = \ + common/ac_nir_to_llvm.c \ + common/ac_nir_to_llvm.h + +AMD_DEBUG_FILES = \ + common/ac_debug.c \ + common/ac_debug.h + +AMD_GENERATED_FILES = \ + common/sid_tables.h diff -Nru mesa-12.0.6/src/amd/vulkan/dev_icd.json.in mesa-17.0.7/src/amd/vulkan/dev_icd.json.in --- mesa-12.0.6/src/amd/vulkan/dev_icd.json.in 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/dev_icd.json.in 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,7 @@ +{ + "file_format_version": "1.0.0", + "ICD": { + "library_path": "@build_libdir@/libvulkan_radeon.so", + "api_version": "1.0.3" + } +} diff -Nru mesa-12.0.6/src/amd/vulkan/Makefile.am mesa-17.0.7/src/amd/vulkan/Makefile.am --- mesa-12.0.6/src/amd/vulkan/Makefile.am 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,163 @@ +# Copyright © 2016 Red Hat +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +# IN THE SOFTWARE. + +include Makefile.sources + +noinst_HEADERS = \ + $(top_srcdir)/include/vulkan/vk_platform.h \ + $(top_srcdir)/include/vulkan/vulkan.h + +lib_LTLIBRARIES = libvulkan_radeon.la + +# The gallium includes are for the util/u_math.h include from main/macros.h + +AM_CPPFLAGS = \ + -I$(top_srcdir)/include \ + -I$(top_builddir)/src \ + -I$(top_srcdir)/src \ + -I$(top_srcdir)/src/vulkan/wsi \ + -I$(top_srcdir)/src/amd \ + -I$(top_srcdir)/src/amd/common \ + -I$(top_builddir)/src/compiler \ + -I$(top_builddir)/src/compiler/nir \ + -I$(top_srcdir)/src/compiler \ + -I$(top_srcdir)/src/mapi \ + -I$(top_srcdir)/src/mesa \ + -I$(top_srcdir)/src/mesa/drivers/dri/common \ + -I$(top_srcdir)/src/gallium/auxiliary \ + -I$(top_srcdir)/src/gallium/include \ + $(AMDGPU_CFLAGS) \ + $(VALGRIND_CFLAGS) \ + $(DEFINES) + +AM_CFLAGS = \ + $(VISIBILITY_CFLAGS) \ + $(PTHREAD_CFLAGS) \ + $(LLVM_CFLAGS) + +VULKAN_SOURCES = \ + $(VULKAN_GENERATED_FILES) \ + $(VULKAN_FILES) + +VULKAN_LIB_DEPS = \ + libvulkan_common.la \ + $(top_builddir)/src/vulkan/wsi/libvulkan_wsi.la \ + $(top_builddir)/src/amd/common/libamd_common.la \ + $(top_builddir)/src/amd/addrlib/libamdgpu_addrlib.la \ + $(top_builddir)/src/compiler/nir/libnir.la \ + $(top_builddir)/src/util/libmesautil.la \ + $(LLVM_LIBS) \ + $(LIBELF_LIBS) \ + $(PTHREAD_LIBS) \ + $(AMDGPU_LIBS) \ + $(LIBDRM_LIBS) \ + $(PTHREAD_LIBS) \ + $(DLOPEN_LIBS) \ + -lm + +if HAVE_PLATFORM_X11 +AM_CPPFLAGS += \ + $(XCB_DRI3_CFLAGS) \ + -DVK_USE_PLATFORM_XCB_KHR \ + -DVK_USE_PLATFORM_XLIB_KHR + +VULKAN_SOURCES += $(VULKAN_WSI_X11_FILES) + +# FIXME: Use pkg-config for X11-xcb ldflags. +VULKAN_LIB_DEPS += $(XCB_DRI3_LIBS) -lX11-xcb +endif + + +if HAVE_PLATFORM_WAYLAND +AM_CPPFLAGS += \ + -I$(top_builddir)/src/egl/wayland/wayland-drm \ + -I$(top_srcdir)/src/egl/wayland/wayland-drm \ + $(WAYLAND_CFLAGS) \ + -DVK_USE_PLATFORM_WAYLAND_KHR + +VULKAN_SOURCES += $(VULKAN_WSI_WAYLAND_FILES) + +VULKAN_LIB_DEPS += \ + $(top_builddir)/src/egl/wayland/wayland-drm/libwayland-drm.la \ + $(WAYLAND_LIBS) +endif + +noinst_LTLIBRARIES = libvulkan_common.la +libvulkan_common_la_SOURCES = $(VULKAN_SOURCES) + +nodist_EXTRA_libvulkan_radeon_la_SOURCES = dummy.cpp +libvulkan_radeon_la_SOURCES = $(VULKAN_GEM_FILES) + +vulkan_api_xml = $(top_srcdir)/src/vulkan/registry/vk.xml + +radv_entrypoints.h : radv_entrypoints_gen.py $(vulkan_api_xml) + $(AM_V_GEN) cat $(vulkan_api_xml) |\ + $(PYTHON2) $(srcdir)/radv_entrypoints_gen.py header > $@ + +radv_entrypoints.c : radv_entrypoints_gen.py $(vulkan_api_xml) + $(AM_V_GEN) cat $(vulkan_api_xml) |\ + $(PYTHON2) $(srcdir)/radv_entrypoints_gen.py code > $@ + +vk_format_table.c: vk_format_table.py \ + vk_format_parse.py \ + vk_format_layout.csv + $(PYTHON2) $(srcdir)/vk_format_table.py $(srcdir)/vk_format_layout.csv > $@ + +BUILT_SOURCES = $(VULKAN_GENERATED_FILES) +CLEANFILES = $(BUILT_SOURCES) dev_icd.json radeon_icd.@host_cpu@.json +EXTRA_DIST = \ + $(top_srcdir)/include/vulkan/vk_icd.h \ + dev_icd.json.in \ + radeon_icd.json.in \ + radv_entrypoints_gen.py \ + vk_format_layout.csv \ + vk_format_parse.py \ + vk_format_table.py + +libvulkan_radeon_la_LIBADD = $(VULKAN_LIB_DEPS) + +libvulkan_radeon_la_LDFLAGS = \ + -shared \ + -module \ + -no-undefined \ + -avoid-version \ + $(BSYMBOLIC) \ + $(LLVM_LDFLAGS) \ + $(GC_SECTIONS) \ + $(LD_NO_UNDEFINED) + + +icdconfdir = @VULKAN_ICD_INSTALL_DIR@ +icdconf_DATA = radeon_icd.@host_cpu@.json +# The following is used for development purposes, by setting VK_ICD_FILENAMES. +noinst_DATA = dev_icd.json + +dev_icd.json : dev_icd.json.in + $(AM_V_GEN) $(SED) \ + -e "s#@build_libdir@#${abs_top_builddir}/${LIB_DIR}#" \ + < $(srcdir)/dev_icd.json.in > $@ + +radeon_icd.@host_cpu@.json : radeon_icd.json.in + $(AM_V_GEN) $(SED) \ + -e "s#@install_libdir@#${libdir}#" \ + < $(srcdir)/radeon_icd.json.in > $@ + +include $(top_srcdir)/install-lib-links.mk diff -Nru mesa-12.0.6/src/amd/vulkan/Makefile.in mesa-17.0.7/src/amd/vulkan/Makefile.in --- mesa-12.0.6/src/amd/vulkan/Makefile.in 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/Makefile.in 2017-06-01 10:37:19.000000000 +0000 @@ -0,0 +1,1260 @@ +# Makefile.in generated by automake 1.15 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994-2014 Free Software Foundation, Inc. + +# This Makefile.in is free software; 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@SIMPENROSE_CFLAGS@ +SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ +SSE41_CFLAGS = @SSE41_CFLAGS@ +STRIP = @STRIP@ +SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ +SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ +SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ +VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ +VALGRIND_LIBS = @VALGRIND_LIBS@ +VA_CFLAGS = @VA_CFLAGS@ +VA_LIBS = @VA_LIBS@ +VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ +VA_MAJOR = @VA_MAJOR@ +VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ +VDPAU_CFLAGS = @VDPAU_CFLAGS@ +VDPAU_LIBS = @VDPAU_LIBS@ +VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ +VDPAU_MAJOR = @VDPAU_MAJOR@ +VDPAU_MINOR = @VDPAU_MINOR@ +VERSION = @VERSION@ +VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ +VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ +VL_CFLAGS = @VL_CFLAGS@ +VL_LIBS = @VL_LIBS@ +VULKAN_ICD_INSTALL_DIR = @VULKAN_ICD_INSTALL_DIR@ +WAYLAND_CFLAGS = @WAYLAND_CFLAGS@ +WAYLAND_LIBS = @WAYLAND_LIBS@ +WAYLAND_SCANNER = @WAYLAND_SCANNER@ +WAYLAND_SCANNER_CFLAGS = @WAYLAND_SCANNER_CFLAGS@ +WAYLAND_SCANNER_LIBS = @WAYLAND_SCANNER_LIBS@ +X11_INCLUDES = @X11_INCLUDES@ +XA_MAJOR = @XA_MAJOR@ +XA_MINOR = @XA_MINOR@ +XA_TINY = @XA_TINY@ +XA_VERSION = @XA_VERSION@ +XCB_DRI2_CFLAGS = @XCB_DRI2_CFLAGS@ +XCB_DRI2_LIBS = @XCB_DRI2_LIBS@ +XCB_DRI3_CFLAGS = @XCB_DRI3_CFLAGS@ +XCB_DRI3_LIBS = @XCB_DRI3_LIBS@ +XF86VIDMODE_CFLAGS = @XF86VIDMODE_CFLAGS@ +XF86VIDMODE_LIBS = @XF86VIDMODE_LIBS@ +XLIBGL_CFLAGS = @XLIBGL_CFLAGS@ +XLIBGL_LIBS = @XLIBGL_LIBS@ +XVMC_CFLAGS = @XVMC_CFLAGS@ +XVMC_LIBS = @XVMC_LIBS@ +XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ +XVMC_MAJOR = @XVMC_MAJOR@ +XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ +YACC = @YACC@ +YFLAGS = @YFLAGS@ +abs_builddir = @abs_builddir@ +abs_srcdir = @abs_srcdir@ +abs_top_builddir = @abs_top_builddir@ +abs_top_srcdir = @abs_top_srcdir@ +ac_ct_AR = @ac_ct_AR@ +ac_ct_CC = @ac_ct_CC@ +ac_ct_CXX = @ac_ct_CXX@ +ac_ct_DUMPBIN = @ac_ct_DUMPBIN@ +acv_mako_found = @acv_mako_found@ +am__include = @am__include@ +am__leading_dot = @am__leading_dot@ +am__quote = @am__quote@ +am__tar = @am__tar@ +am__untar = @am__untar@ +ax_pthread_config = @ax_pthread_config@ +bindir = @bindir@ +build = @build@ +build_alias = @build_alias@ +build_cpu = @build_cpu@ +build_os = @build_os@ +build_vendor = @build_vendor@ +builddir = @builddir@ +datadir = @datadir@ +datarootdir = @datarootdir@ +docdir = @docdir@ +dvidir = @dvidir@ +exec_prefix = @exec_prefix@ +host = @host@ +host_alias = @host_alias@ +host_cpu = @host_cpu@ +host_os = @host_os@ +host_vendor = @host_vendor@ +htmldir = @htmldir@ +ifGNUmake = @ifGNUmake@ +includedir = @includedir@ +infodir = @infodir@ +install_sh = @install_sh@ +libdir = @libdir@ +libexecdir = @libexecdir@ +localedir = @localedir@ +localstatedir = @localstatedir@ +mandir = @mandir@ +mkdir_p = @mkdir_p@ +oldincludedir = @oldincludedir@ +pdfdir = @pdfdir@ +prefix = @prefix@ +program_transform_name = @program_transform_name@ +psdir = @psdir@ +sbindir = @sbindir@ +sharedstatedir = @sharedstatedir@ +srcdir = @srcdir@ +sysconfdir = @sysconfdir@ +target = @target@ +target_alias = @target_alias@ +target_cpu = @target_cpu@ +target_os = @target_os@ +target_vendor = @target_vendor@ +top_build_prefix = @top_build_prefix@ +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ +RADV_WS_AMDGPU_FILES := \ + winsys/amdgpu/radv_amdgpu_bo.c \ + winsys/amdgpu/radv_amdgpu_bo.h \ + winsys/amdgpu/radv_amdgpu_cs.c \ + winsys/amdgpu/radv_amdgpu_cs.h \ + winsys/amdgpu/radv_amdgpu_surface.c \ + winsys/amdgpu/radv_amdgpu_surface.h \ + winsys/amdgpu/radv_amdgpu_winsys.c \ + winsys/amdgpu/radv_amdgpu_winsys.h \ + winsys/amdgpu/radv_amdgpu_winsys_public.h + +VULKAN_FILES := \ + radv_cmd_buffer.c \ + radv_cs.h \ + radv_device.c \ + radv_descriptor_set.c \ + radv_descriptor_set.h \ + radv_formats.c \ + radv_image.c \ + radv_meta.c \ + radv_meta.h \ + radv_meta_blit.c \ + radv_meta_blit2d.c \ + radv_meta_buffer.c \ + radv_meta_bufimage.c \ + radv_meta_clear.c \ + radv_meta_copy.c \ + radv_meta_decompress.c \ + radv_meta_fast_clear.c \ + radv_meta_resolve.c \ + radv_meta_resolve_cs.c \ + radv_pass.c \ + radv_pipeline.c \ + radv_pipeline_cache.c \ + radv_private.h \ + radv_radeon_winsys.h \ + radv_query.c \ + radv_util.c \ + radv_util.h \ + radv_wsi.c \ + si_cmd_buffer.c \ + vk_format_table.c \ + vk_format.h \ + $(RADV_WS_AMDGPU_FILES) + +VULKAN_WSI_WAYLAND_FILES := \ + radv_wsi_wayland.c + +VULKAN_WSI_X11_FILES := \ + radv_wsi_x11.c + +VULKAN_GENERATED_FILES := \ + radv_entrypoints.c \ + radv_entrypoints.h + +noinst_HEADERS = \ + $(top_srcdir)/include/vulkan/vk_platform.h \ + $(top_srcdir)/include/vulkan/vulkan.h + +lib_LTLIBRARIES = libvulkan_radeon.la + +# The gallium includes are for the util/u_math.h include from main/macros.h +AM_CPPFLAGS = -I$(top_srcdir)/include -I$(top_builddir)/src \ + -I$(top_srcdir)/src -I$(top_srcdir)/src/vulkan/wsi \ + -I$(top_srcdir)/src/amd -I$(top_srcdir)/src/amd/common \ + -I$(top_builddir)/src/compiler \ + -I$(top_builddir)/src/compiler/nir \ + -I$(top_srcdir)/src/compiler -I$(top_srcdir)/src/mapi \ + -I$(top_srcdir)/src/mesa \ + -I$(top_srcdir)/src/mesa/drivers/dri/common \ + -I$(top_srcdir)/src/gallium/auxiliary \ + -I$(top_srcdir)/src/gallium/include $(AMDGPU_CFLAGS) \ + $(VALGRIND_CFLAGS) $(DEFINES) $(am__append_1) $(am__append_4) +AM_CFLAGS = \ + $(VISIBILITY_CFLAGS) \ + $(PTHREAD_CFLAGS) \ + $(LLVM_CFLAGS) + +VULKAN_SOURCES = $(VULKAN_GENERATED_FILES) $(VULKAN_FILES) \ + $(am__append_2) $(am__append_5) +VULKAN_LIB_DEPS = libvulkan_common.la \ + $(top_builddir)/src/vulkan/wsi/libvulkan_wsi.la \ + $(top_builddir)/src/amd/common/libamd_common.la \ + $(top_builddir)/src/amd/addrlib/libamdgpu_addrlib.la \ + $(top_builddir)/src/compiler/nir/libnir.la \ + $(top_builddir)/src/util/libmesautil.la $(LLVM_LIBS) \ + $(LIBELF_LIBS) $(PTHREAD_LIBS) $(AMDGPU_LIBS) $(LIBDRM_LIBS) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) -lm $(am__append_3) \ + $(am__append_6) +noinst_LTLIBRARIES = libvulkan_common.la +libvulkan_common_la_SOURCES = $(VULKAN_SOURCES) +nodist_EXTRA_libvulkan_radeon_la_SOURCES = dummy.cpp +libvulkan_radeon_la_SOURCES = $(VULKAN_GEM_FILES) +vulkan_api_xml = $(top_srcdir)/src/vulkan/registry/vk.xml +BUILT_SOURCES = $(VULKAN_GENERATED_FILES) +CLEANFILES = $(BUILT_SOURCES) dev_icd.json radeon_icd.@host_cpu@.json +EXTRA_DIST = \ + $(top_srcdir)/include/vulkan/vk_icd.h \ + dev_icd.json.in \ + radeon_icd.json.in \ + radv_entrypoints_gen.py \ + vk_format_layout.csv \ + vk_format_parse.py \ + vk_format_table.py + +libvulkan_radeon_la_LIBADD = $(VULKAN_LIB_DEPS) +libvulkan_radeon_la_LDFLAGS = \ + -shared \ + -module \ + -no-undefined \ + -avoid-version \ + $(BSYMBOLIC) \ + $(LLVM_LDFLAGS) \ + $(GC_SECTIONS) \ + $(LD_NO_UNDEFINED) + +icdconfdir = @VULKAN_ICD_INSTALL_DIR@ +icdconf_DATA = radeon_icd.@host_cpu@.json +# The following is used for development purposes, by setting VK_ICD_FILENAMES. +noinst_DATA = dev_icd.json +all: $(BUILT_SOURCES) + $(MAKE) $(AM_MAKEFLAGS) all-am + +.SUFFIXES: +.SUFFIXES: .c .cpp .lo .o .obj +$(srcdir)/Makefile.in: $(srcdir)/Makefile.am $(srcdir)/Makefile.sources $(top_srcdir)/install-lib-links.mk $(am__configure_deps) + @for dep in $?; do \ + case '$(am__configure_deps)' in \ + *$$dep*) \ + ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \ + && { if test -f $@; then exit 0; else break; fi; }; \ + exit 1;; \ + esac; \ + done; \ + echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign src/amd/vulkan/Makefile'; \ + $(am__cd) $(top_srcdir) && \ + $(AUTOMAKE) --foreign src/amd/vulkan/Makefile +Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status + @case '$?' in \ + *config.status*) \ + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \ + *) \ + echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \ + cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \ + esac; +$(srcdir)/Makefile.sources $(top_srcdir)/install-lib-links.mk $(am__empty): + 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"$(DESTDIR)$(libdir)"; \ + } + +uninstall-libLTLIBRARIES: + @$(NORMAL_UNINSTALL) + @list='$(lib_LTLIBRARIES)'; test -n "$(libdir)" || list=; \ + for p in $$list; do \ + $(am__strip_dir) \ + echo " $(LIBTOOL) $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=uninstall rm -f '$(DESTDIR)$(libdir)/$$f'"; \ + $(LIBTOOL) $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=uninstall rm -f "$(DESTDIR)$(libdir)/$$f"; \ + done + +clean-libLTLIBRARIES: + -test -z "$(lib_LTLIBRARIES)" || rm -f $(lib_LTLIBRARIES) + @list='$(lib_LTLIBRARIES)'; \ + locs=`for p in $$list; do echo $$p; done | \ + sed 's|^[^/]*$$|.|; s|/[^/]*$$||; s|$$|/so_locations|' | \ + sort -u`; \ + test -z "$$locs" || { \ + echo rm -f $${locs}; \ + rm -f $${locs}; \ + } + +clean-noinstLTLIBRARIES: + -test -z "$(noinst_LTLIBRARIES)" || rm -f $(noinst_LTLIBRARIES) + @list='$(noinst_LTLIBRARIES)'; \ + locs=`for p in $$list; do echo $$p; done | \ + sed 's|^[^/]*$$|.|; s|/[^/]*$$||; s|$$|/so_locations|' | \ + sort -u`; \ + test -z "$$locs" || { \ + echo rm -f $${locs}; \ + rm -f $${locs}; \ + } +winsys/amdgpu/$(am__dirstamp): + @$(MKDIR_P) winsys/amdgpu + @: > winsys/amdgpu/$(am__dirstamp) +winsys/amdgpu/$(DEPDIR)/$(am__dirstamp): + @$(MKDIR_P) winsys/amdgpu/$(DEPDIR) + @: > winsys/amdgpu/$(DEPDIR)/$(am__dirstamp) +winsys/amdgpu/radv_amdgpu_bo.lo: winsys/amdgpu/$(am__dirstamp) \ + winsys/amdgpu/$(DEPDIR)/$(am__dirstamp) +winsys/amdgpu/radv_amdgpu_cs.lo: winsys/amdgpu/$(am__dirstamp) \ + winsys/amdgpu/$(DEPDIR)/$(am__dirstamp) +winsys/amdgpu/radv_amdgpu_surface.lo: winsys/amdgpu/$(am__dirstamp) \ + winsys/amdgpu/$(DEPDIR)/$(am__dirstamp) +winsys/amdgpu/radv_amdgpu_winsys.lo: winsys/amdgpu/$(am__dirstamp) \ + winsys/amdgpu/$(DEPDIR)/$(am__dirstamp) + +libvulkan_common.la: $(libvulkan_common_la_OBJECTS) $(libvulkan_common_la_DEPENDENCIES) $(EXTRA_libvulkan_common_la_DEPENDENCIES) + $(AM_V_CCLD)$(LINK) $(libvulkan_common_la_OBJECTS) $(libvulkan_common_la_LIBADD) $(LIBS) + +libvulkan_radeon.la: $(libvulkan_radeon_la_OBJECTS) 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mesa-17.0.7/src/amd/vulkan/Makefile.sources 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,76 @@ +# Copyright © 2016 Red Hat +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +# IN THE SOFTWARE. + +RADV_WS_AMDGPU_FILES := \ + winsys/amdgpu/radv_amdgpu_bo.c \ + winsys/amdgpu/radv_amdgpu_bo.h \ + winsys/amdgpu/radv_amdgpu_cs.c \ + winsys/amdgpu/radv_amdgpu_cs.h \ + winsys/amdgpu/radv_amdgpu_surface.c \ + winsys/amdgpu/radv_amdgpu_surface.h \ + winsys/amdgpu/radv_amdgpu_winsys.c \ + winsys/amdgpu/radv_amdgpu_winsys.h \ + winsys/amdgpu/radv_amdgpu_winsys_public.h + +VULKAN_FILES := \ + radv_cmd_buffer.c \ + radv_cs.h \ + radv_device.c \ + radv_descriptor_set.c \ + radv_descriptor_set.h \ + radv_formats.c \ + radv_image.c \ + radv_meta.c \ + radv_meta.h \ + radv_meta_blit.c \ + radv_meta_blit2d.c \ + radv_meta_buffer.c \ + radv_meta_bufimage.c \ + radv_meta_clear.c \ + radv_meta_copy.c \ + radv_meta_decompress.c \ + radv_meta_fast_clear.c \ + radv_meta_resolve.c \ + radv_meta_resolve_cs.c \ + radv_pass.c \ + radv_pipeline.c \ + radv_pipeline_cache.c \ + radv_private.h \ + radv_radeon_winsys.h \ + radv_query.c \ + radv_util.c \ + radv_util.h \ + radv_wsi.c \ + si_cmd_buffer.c \ + vk_format_table.c \ + vk_format.h \ + $(RADV_WS_AMDGPU_FILES) + +VULKAN_WSI_WAYLAND_FILES := \ + radv_wsi_wayland.c + +VULKAN_WSI_X11_FILES := \ + radv_wsi_x11.c + +VULKAN_GENERATED_FILES := \ + radv_entrypoints.c \ + radv_entrypoints.h + diff -Nru mesa-12.0.6/src/amd/vulkan/radeon_icd.json.in mesa-17.0.7/src/amd/vulkan/radeon_icd.json.in --- mesa-12.0.6/src/amd/vulkan/radeon_icd.json.in 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radeon_icd.json.in 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,7 @@ +{ + "file_format_version": "1.0.0", + "ICD": { + "library_path": "@install_libdir@/libvulkan_radeon.so", + "api_version": "1.0.3" + } +} diff -Nru mesa-12.0.6/src/amd/vulkan/radv_cmd_buffer.c mesa-17.0.7/src/amd/vulkan/radv_cmd_buffer.c --- mesa-12.0.6/src/amd/vulkan/radv_cmd_buffer.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_cmd_buffer.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,2743 @@ +/* + * Copyright © 2016 Red Hat. + * Copyright © 2016 Bas Nieuwenhuizen + * + * based in part on anv driver which is: + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "radv_private.h" +#include "radv_radeon_winsys.h" +#include "radv_cs.h" +#include "sid.h" +#include "vk_format.h" +#include "radv_meta.h" + +#include "ac_debug.h" + +static void radv_handle_image_transition(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *image, + VkImageLayout src_layout, + VkImageLayout dst_layout, + int src_family, + int dst_family, + VkImageSubresourceRange range, + VkImageAspectFlags pending_clears); + +const struct radv_dynamic_state default_dynamic_state = { + .viewport = { + .count = 0, + }, + .scissor = { + .count = 0, + }, + .line_width = 1.0f, + .depth_bias = { + .bias = 0.0f, + .clamp = 0.0f, + .slope = 0.0f, + }, + .blend_constants = { 0.0f, 0.0f, 0.0f, 0.0f }, + .depth_bounds = { + .min = 0.0f, + .max = 1.0f, + }, + .stencil_compare_mask = { + .front = ~0u, + .back = ~0u, + }, + .stencil_write_mask = { + .front = ~0u, + .back = ~0u, + }, + .stencil_reference = { + .front = 0u, + .back = 0u, + }, +}; + +void +radv_dynamic_state_copy(struct radv_dynamic_state *dest, + const struct radv_dynamic_state *src, + uint32_t copy_mask) +{ + if (copy_mask & (1 << VK_DYNAMIC_STATE_VIEWPORT)) { + dest->viewport.count = src->viewport.count; + typed_memcpy(dest->viewport.viewports, src->viewport.viewports, + src->viewport.count); + } + + if (copy_mask & (1 << VK_DYNAMIC_STATE_SCISSOR)) { + dest->scissor.count = src->scissor.count; + typed_memcpy(dest->scissor.scissors, src->scissor.scissors, + src->scissor.count); + } + + if (copy_mask & (1 << VK_DYNAMIC_STATE_LINE_WIDTH)) + dest->line_width = src->line_width; + + if (copy_mask & (1 << VK_DYNAMIC_STATE_DEPTH_BIAS)) + dest->depth_bias = src->depth_bias; + + if (copy_mask & (1 << VK_DYNAMIC_STATE_BLEND_CONSTANTS)) + typed_memcpy(dest->blend_constants, src->blend_constants, 4); + + if (copy_mask & (1 << VK_DYNAMIC_STATE_DEPTH_BOUNDS)) + dest->depth_bounds = src->depth_bounds; + + if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK)) + dest->stencil_compare_mask = src->stencil_compare_mask; + + if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_WRITE_MASK)) + dest->stencil_write_mask = src->stencil_write_mask; + + if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_REFERENCE)) + dest->stencil_reference = src->stencil_reference; +} + +bool radv_cmd_buffer_uses_mec(struct radv_cmd_buffer *cmd_buffer) +{ + return cmd_buffer->queue_family_index == RADV_QUEUE_COMPUTE && + cmd_buffer->device->physical_device->rad_info.chip_class >= CIK; +} + +enum ring_type radv_queue_family_to_ring(int f) { + switch (f) { + case RADV_QUEUE_GENERAL: + return RING_GFX; + case RADV_QUEUE_COMPUTE: + return RING_COMPUTE; + case RADV_QUEUE_TRANSFER: + return RING_DMA; + default: + unreachable("Unknown queue family"); + } +} + +static VkResult radv_create_cmd_buffer( + struct radv_device * device, + struct radv_cmd_pool * pool, + VkCommandBufferLevel level, + VkCommandBuffer* pCommandBuffer) +{ + struct radv_cmd_buffer *cmd_buffer; + VkResult result; + unsigned ring; + cmd_buffer = vk_alloc(&pool->alloc, sizeof(*cmd_buffer), 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (cmd_buffer == NULL) + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + + memset(cmd_buffer, 0, sizeof(*cmd_buffer)); + cmd_buffer->_loader_data.loaderMagic = ICD_LOADER_MAGIC; + cmd_buffer->device = device; + cmd_buffer->pool = pool; + cmd_buffer->level = level; + + if (pool) { + list_addtail(&cmd_buffer->pool_link, &pool->cmd_buffers); + cmd_buffer->queue_family_index = pool->queue_family_index; + + } else { + /* Init the pool_link so we can safefly call list_del when we destroy + * the command buffer + */ + list_inithead(&cmd_buffer->pool_link); + cmd_buffer->queue_family_index = RADV_QUEUE_GENERAL; + } + + ring = radv_queue_family_to_ring(cmd_buffer->queue_family_index); + + cmd_buffer->cs = device->ws->cs_create(device->ws, ring); + if (!cmd_buffer->cs) { + result = VK_ERROR_OUT_OF_HOST_MEMORY; + goto fail; + } + + *pCommandBuffer = radv_cmd_buffer_to_handle(cmd_buffer); + + cmd_buffer->upload.offset = 0; + cmd_buffer->upload.size = 0; + list_inithead(&cmd_buffer->upload.list); + + return VK_SUCCESS; + +fail: + vk_free(&cmd_buffer->pool->alloc, cmd_buffer); + + return result; +} + +static bool +radv_cmd_buffer_resize_upload_buf(struct radv_cmd_buffer *cmd_buffer, + uint64_t min_needed) +{ + uint64_t new_size; + struct radeon_winsys_bo *bo; + struct radv_cmd_buffer_upload *upload; + struct radv_device *device = cmd_buffer->device; + + new_size = MAX2(min_needed, 16 * 1024); + new_size = MAX2(new_size, 2 * cmd_buffer->upload.size); + + bo = device->ws->buffer_create(device->ws, + new_size, 4096, + RADEON_DOMAIN_GTT, + RADEON_FLAG_CPU_ACCESS); + + if (!bo) { + cmd_buffer->record_fail = true; + return false; + } + + device->ws->cs_add_buffer(cmd_buffer->cs, bo, 8); + if (cmd_buffer->upload.upload_bo) { + upload = malloc(sizeof(*upload)); + + if (!upload) { + cmd_buffer->record_fail = true; + device->ws->buffer_destroy(bo); + return false; + } + + memcpy(upload, &cmd_buffer->upload, sizeof(*upload)); + list_add(&upload->list, &cmd_buffer->upload.list); + } + + cmd_buffer->upload.upload_bo = bo; + cmd_buffer->upload.size = new_size; + cmd_buffer->upload.offset = 0; + cmd_buffer->upload.map = device->ws->buffer_map(cmd_buffer->upload.upload_bo); + + if (!cmd_buffer->upload.map) { + cmd_buffer->record_fail = true; + return false; + } + + return true; +} + +bool +radv_cmd_buffer_upload_alloc(struct radv_cmd_buffer *cmd_buffer, + unsigned size, + unsigned alignment, + unsigned *out_offset, + void **ptr) +{ + uint64_t offset = align(cmd_buffer->upload.offset, alignment); + if (offset + size > cmd_buffer->upload.size) { + if (!radv_cmd_buffer_resize_upload_buf(cmd_buffer, size)) + return false; + offset = 0; + } + + *out_offset = offset; + *ptr = cmd_buffer->upload.map + offset; + + cmd_buffer->upload.offset = offset + size; + return true; +} + +bool +radv_cmd_buffer_upload_data(struct radv_cmd_buffer *cmd_buffer, + unsigned size, unsigned alignment, + const void *data, unsigned *out_offset) +{ + uint8_t *ptr; + + if (!radv_cmd_buffer_upload_alloc(cmd_buffer, size, alignment, + out_offset, (void **)&ptr)) + return false; + + if (ptr) + memcpy(ptr, data, size); + + return true; +} + +void radv_cmd_buffer_trace_emit(struct radv_cmd_buffer *cmd_buffer) +{ + struct radv_device *device = cmd_buffer->device; + struct radeon_winsys_cs *cs = cmd_buffer->cs; + uint64_t va; + + if (!device->trace_bo) + return; + + va = device->ws->buffer_get_va(device->trace_bo); + + MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, cmd_buffer->cs, 7); + + ++cmd_buffer->state.trace_id; + device->ws->cs_add_buffer(cs, device->trace_bo, 8); + radeon_emit(cs, PKT3(PKT3_WRITE_DATA, 3, 0)); + radeon_emit(cs, S_370_DST_SEL(V_370_MEM_ASYNC) | + S_370_WR_CONFIRM(1) | + S_370_ENGINE_SEL(V_370_ME)); + radeon_emit(cs, va); + radeon_emit(cs, va >> 32); + radeon_emit(cs, cmd_buffer->state.trace_id); + radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); + radeon_emit(cs, AC_ENCODE_TRACE_POINT(cmd_buffer->state.trace_id)); +} + +static void +radv_emit_graphics_blend_state(struct radv_cmd_buffer *cmd_buffer, + struct radv_pipeline *pipeline) +{ + radeon_set_context_reg_seq(cmd_buffer->cs, R_028780_CB_BLEND0_CONTROL, 8); + radeon_emit_array(cmd_buffer->cs, pipeline->graphics.blend.cb_blend_control, + 8); + radeon_set_context_reg(cmd_buffer->cs, R_028808_CB_COLOR_CONTROL, pipeline->graphics.blend.cb_color_control); + radeon_set_context_reg(cmd_buffer->cs, R_028B70_DB_ALPHA_TO_MASK, pipeline->graphics.blend.db_alpha_to_mask); +} + +static void +radv_emit_graphics_depth_stencil_state(struct radv_cmd_buffer *cmd_buffer, + struct radv_pipeline *pipeline) +{ + struct radv_depth_stencil_state *ds = &pipeline->graphics.ds; + radeon_set_context_reg(cmd_buffer->cs, R_028800_DB_DEPTH_CONTROL, ds->db_depth_control); + radeon_set_context_reg(cmd_buffer->cs, R_02842C_DB_STENCIL_CONTROL, ds->db_stencil_control); + + radeon_set_context_reg(cmd_buffer->cs, R_028000_DB_RENDER_CONTROL, ds->db_render_control); + radeon_set_context_reg(cmd_buffer->cs, R_028010_DB_RENDER_OVERRIDE2, ds->db_render_override2); +} + +/* 12.4 fixed-point */ +static unsigned radv_pack_float_12p4(float x) +{ + return x <= 0 ? 0 : + x >= 4096 ? 0xffff : x * 16; +} + +static uint32_t +shader_stage_to_user_data_0(gl_shader_stage stage) +{ + switch (stage) { + case MESA_SHADER_FRAGMENT: + return R_00B030_SPI_SHADER_USER_DATA_PS_0; + case MESA_SHADER_VERTEX: + return R_00B130_SPI_SHADER_USER_DATA_VS_0; + case MESA_SHADER_COMPUTE: + return R_00B900_COMPUTE_USER_DATA_0; + default: + unreachable("unknown shader"); + } +} + +static struct ac_userdata_info * +radv_lookup_user_sgpr(struct radv_pipeline *pipeline, + gl_shader_stage stage, + int idx) +{ + return &pipeline->shaders[stage]->info.user_sgprs_locs.shader_data[idx]; +} + +static void +radv_emit_userdata_address(struct radv_cmd_buffer *cmd_buffer, + struct radv_pipeline *pipeline, + gl_shader_stage stage, + int idx, uint64_t va) +{ + struct ac_userdata_info *loc = radv_lookup_user_sgpr(pipeline, stage, idx); + uint32_t base_reg = shader_stage_to_user_data_0(stage); + if (loc->sgpr_idx == -1) + return; + assert(loc->num_sgprs == 2); + assert(!loc->indirect); + radeon_set_sh_reg_seq(cmd_buffer->cs, base_reg + loc->sgpr_idx * 4, 2); + radeon_emit(cmd_buffer->cs, va); + radeon_emit(cmd_buffer->cs, va >> 32); +} + +static void +radv_update_multisample_state(struct radv_cmd_buffer *cmd_buffer, + struct radv_pipeline *pipeline) +{ + int num_samples = pipeline->graphics.ms.num_samples; + struct radv_multisample_state *ms = &pipeline->graphics.ms; + struct radv_pipeline *old_pipeline = cmd_buffer->state.emitted_pipeline; + + radeon_set_context_reg_seq(cmd_buffer->cs, R_028C38_PA_SC_AA_MASK_X0Y0_X1Y0, 2); + radeon_emit(cmd_buffer->cs, ms->pa_sc_aa_mask[0]); + radeon_emit(cmd_buffer->cs, ms->pa_sc_aa_mask[1]); + + radeon_set_context_reg(cmd_buffer->cs, CM_R_028804_DB_EQAA, ms->db_eqaa); + radeon_set_context_reg(cmd_buffer->cs, EG_R_028A4C_PA_SC_MODE_CNTL_1, ms->pa_sc_mode_cntl_1); + + if (old_pipeline && num_samples == old_pipeline->graphics.ms.num_samples) + return; + + radeon_set_context_reg_seq(cmd_buffer->cs, CM_R_028BDC_PA_SC_LINE_CNTL, 2); + radeon_emit(cmd_buffer->cs, ms->pa_sc_line_cntl); + radeon_emit(cmd_buffer->cs, ms->pa_sc_aa_config); + + radv_cayman_emit_msaa_sample_locs(cmd_buffer->cs, num_samples); + + uint32_t samples_offset; + void *samples_ptr; + void *src; + radv_cmd_buffer_upload_alloc(cmd_buffer, num_samples * 4 * 2, 256, &samples_offset, + &samples_ptr); + switch (num_samples) { + case 1: + src = cmd_buffer->device->sample_locations_1x; + break; + case 2: + src = cmd_buffer->device->sample_locations_2x; + break; + case 4: + src = cmd_buffer->device->sample_locations_4x; + break; + case 8: + src = cmd_buffer->device->sample_locations_8x; + break; + case 16: + src = cmd_buffer->device->sample_locations_16x; + break; + } + memcpy(samples_ptr, src, num_samples * 4 * 2); + + uint64_t va = cmd_buffer->device->ws->buffer_get_va(cmd_buffer->upload.upload_bo); + va += samples_offset; + + radv_emit_userdata_address(cmd_buffer, pipeline, MESA_SHADER_FRAGMENT, + AC_UD_PS_SAMPLE_POS, va); +} + +static void +radv_emit_graphics_raster_state(struct radv_cmd_buffer *cmd_buffer, + struct radv_pipeline *pipeline) +{ + struct radv_raster_state *raster = &pipeline->graphics.raster; + + radeon_set_context_reg(cmd_buffer->cs, R_028810_PA_CL_CLIP_CNTL, + raster->pa_cl_clip_cntl); + + radeon_set_context_reg(cmd_buffer->cs, R_0286D4_SPI_INTERP_CONTROL_0, + raster->spi_interp_control); + + radeon_set_context_reg_seq(cmd_buffer->cs, R_028A00_PA_SU_POINT_SIZE, 2); + unsigned tmp = (unsigned)(1.0 * 8.0); + radeon_emit(cmd_buffer->cs, S_028A00_HEIGHT(tmp) | S_028A00_WIDTH(tmp)); + radeon_emit(cmd_buffer->cs, S_028A04_MIN_SIZE(radv_pack_float_12p4(0)) | + S_028A04_MAX_SIZE(radv_pack_float_12p4(8192/2))); /* R_028A04_PA_SU_POINT_MINMAX */ + + radeon_set_context_reg(cmd_buffer->cs, R_028BE4_PA_SU_VTX_CNTL, + raster->pa_su_vtx_cntl); + + radeon_set_context_reg(cmd_buffer->cs, R_028814_PA_SU_SC_MODE_CNTL, + raster->pa_su_sc_mode_cntl); +} + +static void +radv_emit_vertex_shader(struct radv_cmd_buffer *cmd_buffer, + struct radv_pipeline *pipeline) +{ + struct radeon_winsys *ws = cmd_buffer->device->ws; + struct radv_shader_variant *vs; + uint64_t va; + unsigned export_count; + unsigned clip_dist_mask, cull_dist_mask, total_mask; + + assert (pipeline->shaders[MESA_SHADER_VERTEX]); + + vs = pipeline->shaders[MESA_SHADER_VERTEX]; + va = ws->buffer_get_va(vs->bo); + ws->cs_add_buffer(cmd_buffer->cs, vs->bo, 8); + + clip_dist_mask = vs->info.vs.clip_dist_mask; + cull_dist_mask = vs->info.vs.cull_dist_mask; + total_mask = clip_dist_mask | cull_dist_mask; + radeon_set_context_reg(cmd_buffer->cs, R_028A40_VGT_GS_MODE, 0); + radeon_set_context_reg(cmd_buffer->cs, R_028A84_VGT_PRIMITIVEID_EN, 0); + + export_count = MAX2(1, vs->info.vs.param_exports); + radeon_set_context_reg(cmd_buffer->cs, R_0286C4_SPI_VS_OUT_CONFIG, + S_0286C4_VS_EXPORT_COUNT(export_count - 1)); + radeon_set_context_reg(cmd_buffer->cs, R_02870C_SPI_SHADER_POS_FORMAT, + S_02870C_POS0_EXPORT_FORMAT(V_02870C_SPI_SHADER_4COMP) | + S_02870C_POS1_EXPORT_FORMAT(vs->info.vs.pos_exports > 1 ? + V_02870C_SPI_SHADER_4COMP : + V_02870C_SPI_SHADER_NONE) | + S_02870C_POS2_EXPORT_FORMAT(vs->info.vs.pos_exports > 2 ? + V_02870C_SPI_SHADER_4COMP : + V_02870C_SPI_SHADER_NONE) | + S_02870C_POS3_EXPORT_FORMAT(vs->info.vs.pos_exports > 3 ? + V_02870C_SPI_SHADER_4COMP : + V_02870C_SPI_SHADER_NONE)); + + radeon_set_sh_reg_seq(cmd_buffer->cs, R_00B120_SPI_SHADER_PGM_LO_VS, 4); + radeon_emit(cmd_buffer->cs, va >> 8); + radeon_emit(cmd_buffer->cs, va >> 40); + radeon_emit(cmd_buffer->cs, vs->rsrc1); + radeon_emit(cmd_buffer->cs, vs->rsrc2); + + radeon_set_context_reg(cmd_buffer->cs, R_028818_PA_CL_VTE_CNTL, + S_028818_VTX_W0_FMT(1) | + S_028818_VPORT_X_SCALE_ENA(1) | S_028818_VPORT_X_OFFSET_ENA(1) | + S_028818_VPORT_Y_SCALE_ENA(1) | S_028818_VPORT_Y_OFFSET_ENA(1) | + S_028818_VPORT_Z_SCALE_ENA(1) | S_028818_VPORT_Z_OFFSET_ENA(1)); + + radeon_set_context_reg(cmd_buffer->cs, R_02881C_PA_CL_VS_OUT_CNTL, + S_02881C_USE_VTX_POINT_SIZE(vs->info.vs.writes_pointsize) | + S_02881C_USE_VTX_RENDER_TARGET_INDX(vs->info.vs.writes_layer) | + S_02881C_USE_VTX_VIEWPORT_INDX(vs->info.vs.writes_viewport_index) | + S_02881C_VS_OUT_MISC_VEC_ENA(vs->info.vs.writes_pointsize || + vs->info.vs.writes_layer || + vs->info.vs.writes_viewport_index) | + S_02881C_VS_OUT_CCDIST0_VEC_ENA((total_mask & 0x0f) != 0) | + S_02881C_VS_OUT_CCDIST1_VEC_ENA((total_mask & 0xf0) != 0) | + pipeline->graphics.raster.pa_cl_vs_out_cntl | + cull_dist_mask << 8 | + clip_dist_mask); + + radeon_set_context_reg(cmd_buffer->cs, R_028AB4_VGT_REUSE_OFF, + S_028AB4_REUSE_OFF(vs->info.vs.writes_viewport_index)); +} + + + +static void +radv_emit_fragment_shader(struct radv_cmd_buffer *cmd_buffer, + struct radv_pipeline *pipeline) +{ + struct radeon_winsys *ws = cmd_buffer->device->ws; + struct radv_shader_variant *ps, *vs; + uint64_t va; + unsigned spi_baryc_cntl = S_0286E0_FRONT_FACE_ALL_BITS(1); + struct radv_blend_state *blend = &pipeline->graphics.blend; + unsigned ps_offset = 0; + unsigned z_order; + assert (pipeline->shaders[MESA_SHADER_FRAGMENT]); + + ps = pipeline->shaders[MESA_SHADER_FRAGMENT]; + vs = pipeline->shaders[MESA_SHADER_VERTEX]; + va = ws->buffer_get_va(ps->bo); + ws->cs_add_buffer(cmd_buffer->cs, ps->bo, 8); + + radeon_set_sh_reg_seq(cmd_buffer->cs, R_00B020_SPI_SHADER_PGM_LO_PS, 4); + radeon_emit(cmd_buffer->cs, va >> 8); + radeon_emit(cmd_buffer->cs, va >> 40); + radeon_emit(cmd_buffer->cs, ps->rsrc1); + radeon_emit(cmd_buffer->cs, ps->rsrc2); + + if (ps->info.fs.early_fragment_test || !ps->info.fs.writes_memory) + z_order = V_02880C_EARLY_Z_THEN_LATE_Z; + else + z_order = V_02880C_LATE_Z; + + + radeon_set_context_reg(cmd_buffer->cs, R_02880C_DB_SHADER_CONTROL, + S_02880C_Z_EXPORT_ENABLE(ps->info.fs.writes_z) | + S_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE(ps->info.fs.writes_stencil) | + S_02880C_KILL_ENABLE(!!ps->info.fs.can_discard) | + S_02880C_Z_ORDER(z_order) | + S_02880C_DEPTH_BEFORE_SHADER(ps->info.fs.early_fragment_test) | + S_02880C_EXEC_ON_HIER_FAIL(ps->info.fs.writes_memory) | + S_02880C_EXEC_ON_NOOP(ps->info.fs.writes_memory)); + + radeon_set_context_reg(cmd_buffer->cs, R_0286CC_SPI_PS_INPUT_ENA, + ps->config.spi_ps_input_ena); + + radeon_set_context_reg(cmd_buffer->cs, R_0286D0_SPI_PS_INPUT_ADDR, + ps->config.spi_ps_input_addr); + + spi_baryc_cntl |= S_0286E0_POS_FLOAT_LOCATION(0); + radeon_set_context_reg(cmd_buffer->cs, R_0286D8_SPI_PS_IN_CONTROL, + S_0286D8_NUM_INTERP(ps->info.fs.num_interp)); + + radeon_set_context_reg(cmd_buffer->cs, R_0286E0_SPI_BARYC_CNTL, spi_baryc_cntl); + + radeon_set_context_reg(cmd_buffer->cs, R_028710_SPI_SHADER_Z_FORMAT, + ps->info.fs.writes_stencil ? V_028710_SPI_SHADER_32_GR : + ps->info.fs.writes_z ? V_028710_SPI_SHADER_32_R : + V_028710_SPI_SHADER_ZERO); + + radeon_set_context_reg(cmd_buffer->cs, R_028714_SPI_SHADER_COL_FORMAT, blend->spi_shader_col_format); + + radeon_set_context_reg(cmd_buffer->cs, R_028238_CB_TARGET_MASK, blend->cb_target_mask); + radeon_set_context_reg(cmd_buffer->cs, R_02823C_CB_SHADER_MASK, blend->cb_shader_mask); + + if (ps->info.fs.has_pcoord) { + unsigned val; + val = S_028644_PT_SPRITE_TEX(1) | S_028644_OFFSET(0x20); + radeon_set_context_reg(cmd_buffer->cs, R_028644_SPI_PS_INPUT_CNTL_0 + 4 * ps_offset, val); + ps_offset = 1; + } + + for (unsigned i = 0; i < 32 && (1u << i) <= ps->info.fs.input_mask; ++i) { + unsigned vs_offset, flat_shade; + unsigned val; + + if (!(ps->info.fs.input_mask & (1u << i))) + continue; + + + if (!(vs->info.vs.export_mask & (1u << i))) { + radeon_set_context_reg(cmd_buffer->cs, R_028644_SPI_PS_INPUT_CNTL_0 + 4 * ps_offset, + S_028644_OFFSET(0x20)); + ++ps_offset; + continue; + } + + vs_offset = util_bitcount(vs->info.vs.export_mask & ((1u << i) - 1)); + flat_shade = !!(ps->info.fs.flat_shaded_mask & (1u << ps_offset)); + + val = S_028644_OFFSET(vs_offset) | S_028644_FLAT_SHADE(flat_shade); + radeon_set_context_reg(cmd_buffer->cs, R_028644_SPI_PS_INPUT_CNTL_0 + 4 * ps_offset, val); + ++ps_offset; + } +} + +static void +radv_emit_graphics_pipeline(struct radv_cmd_buffer *cmd_buffer, + struct radv_pipeline *pipeline) +{ + if (!pipeline || cmd_buffer->state.emitted_pipeline == pipeline) + return; + + radv_emit_graphics_depth_stencil_state(cmd_buffer, pipeline); + radv_emit_graphics_blend_state(cmd_buffer, pipeline); + radv_emit_graphics_raster_state(cmd_buffer, pipeline); + radv_update_multisample_state(cmd_buffer, pipeline); + radv_emit_vertex_shader(cmd_buffer, pipeline); + radv_emit_fragment_shader(cmd_buffer, pipeline); + + radeon_set_context_reg(cmd_buffer->cs, R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, + pipeline->graphics.prim_restart_enable); + + cmd_buffer->state.emitted_pipeline = pipeline; +} + +static void +radv_emit_viewport(struct radv_cmd_buffer *cmd_buffer) +{ + si_write_viewport(cmd_buffer->cs, 0, cmd_buffer->state.dynamic.viewport.count, + cmd_buffer->state.dynamic.viewport.viewports); +} + +static void +radv_emit_scissor(struct radv_cmd_buffer *cmd_buffer) +{ + uint32_t count = cmd_buffer->state.dynamic.scissor.count; + si_write_scissors(cmd_buffer->cs, 0, count, + cmd_buffer->state.dynamic.scissor.scissors); + radeon_set_context_reg(cmd_buffer->cs, R_028A48_PA_SC_MODE_CNTL_0, + cmd_buffer->state.pipeline->graphics.ms.pa_sc_mode_cntl_0 | S_028A48_VPORT_SCISSOR_ENABLE(count ? 1 : 0)); +} + +static void +radv_emit_fb_color_state(struct radv_cmd_buffer *cmd_buffer, + int index, + struct radv_color_buffer_info *cb) +{ + bool is_vi = cmd_buffer->device->physical_device->rad_info.chip_class >= VI; + radeon_set_context_reg_seq(cmd_buffer->cs, R_028C60_CB_COLOR0_BASE + index * 0x3c, 11); + radeon_emit(cmd_buffer->cs, cb->cb_color_base); + radeon_emit(cmd_buffer->cs, cb->cb_color_pitch); + radeon_emit(cmd_buffer->cs, cb->cb_color_slice); + radeon_emit(cmd_buffer->cs, cb->cb_color_view); + radeon_emit(cmd_buffer->cs, cb->cb_color_info); + radeon_emit(cmd_buffer->cs, cb->cb_color_attrib); + radeon_emit(cmd_buffer->cs, cb->cb_dcc_control); + radeon_emit(cmd_buffer->cs, cb->cb_color_cmask); + radeon_emit(cmd_buffer->cs, cb->cb_color_cmask_slice); + radeon_emit(cmd_buffer->cs, cb->cb_color_fmask); + radeon_emit(cmd_buffer->cs, cb->cb_color_fmask_slice); + + if (is_vi) { /* DCC BASE */ + radeon_set_context_reg(cmd_buffer->cs, R_028C94_CB_COLOR0_DCC_BASE + index * 0x3c, cb->cb_dcc_base); + } +} + +static void +radv_emit_fb_ds_state(struct radv_cmd_buffer *cmd_buffer, + struct radv_ds_buffer_info *ds, + struct radv_image *image, + VkImageLayout layout) +{ + uint32_t db_z_info = ds->db_z_info; + + if (!radv_layout_has_htile(image, layout)) + db_z_info &= C_028040_TILE_SURFACE_ENABLE; + + if (!radv_layout_can_expclear(image, layout)) + db_z_info &= C_028040_ALLOW_EXPCLEAR & C_028044_ALLOW_EXPCLEAR; + + radeon_set_context_reg(cmd_buffer->cs, R_028008_DB_DEPTH_VIEW, ds->db_depth_view); + radeon_set_context_reg(cmd_buffer->cs, R_028014_DB_HTILE_DATA_BASE, ds->db_htile_data_base); + + radeon_set_context_reg_seq(cmd_buffer->cs, R_02803C_DB_DEPTH_INFO, 9); + radeon_emit(cmd_buffer->cs, ds->db_depth_info); /* R_02803C_DB_DEPTH_INFO */ + radeon_emit(cmd_buffer->cs, db_z_info); /* R_028040_DB_Z_INFO */ + radeon_emit(cmd_buffer->cs, ds->db_stencil_info); /* R_028044_DB_STENCIL_INFO */ + radeon_emit(cmd_buffer->cs, ds->db_z_read_base); /* R_028048_DB_Z_READ_BASE */ + radeon_emit(cmd_buffer->cs, ds->db_stencil_read_base); /* R_02804C_DB_STENCIL_READ_BASE */ + radeon_emit(cmd_buffer->cs, ds->db_z_write_base); /* R_028050_DB_Z_WRITE_BASE */ + radeon_emit(cmd_buffer->cs, ds->db_stencil_write_base); /* R_028054_DB_STENCIL_WRITE_BASE */ + radeon_emit(cmd_buffer->cs, ds->db_depth_size); /* R_028058_DB_DEPTH_SIZE */ + radeon_emit(cmd_buffer->cs, ds->db_depth_slice); /* R_02805C_DB_DEPTH_SLICE */ + + radeon_set_context_reg(cmd_buffer->cs, R_028ABC_DB_HTILE_SURFACE, ds->db_htile_surface); + radeon_set_context_reg(cmd_buffer->cs, R_028B78_PA_SU_POLY_OFFSET_DB_FMT_CNTL, + ds->pa_su_poly_offset_db_fmt_cntl); +} + +/* + * To hw resolve multisample images both src and dst need to have the same + * micro tiling mode. However we don't always know in advance when creating + * the images. This function gets called if we have a resolve attachment, + * and tests if the attachment image has the same tiling mode, then it + * checks if the generated framebuffer data has the same tiling mode, and + * updates it if not. + */ +static void radv_set_optimal_micro_tile_mode(struct radv_device *device, + struct radv_attachment_info *att, + uint32_t micro_tile_mode) +{ + struct radv_image *image = att->attachment->image; + uint32_t tile_mode_index; + if (image->surface.nsamples <= 1) + return; + + if (image->surface.micro_tile_mode != micro_tile_mode) { + radv_image_set_optimal_micro_tile_mode(device, image, micro_tile_mode); + } + + if (att->cb.micro_tile_mode != micro_tile_mode) { + tile_mode_index = image->surface.tiling_index[0]; + + att->cb.cb_color_attrib &= C_028C74_TILE_MODE_INDEX; + att->cb.cb_color_attrib |= S_028C74_TILE_MODE_INDEX(tile_mode_index); + att->cb.micro_tile_mode = micro_tile_mode; + } +} + +void +radv_set_depth_clear_regs(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *image, + VkClearDepthStencilValue ds_clear_value, + VkImageAspectFlags aspects) +{ + uint64_t va = cmd_buffer->device->ws->buffer_get_va(image->bo); + va += image->offset + image->clear_value_offset; + unsigned reg_offset = 0, reg_count = 0; + + if (!image->htile.size || !aspects) + return; + + if (aspects & VK_IMAGE_ASPECT_STENCIL_BIT) { + ++reg_count; + } else { + ++reg_offset; + va += 4; + } + if (aspects & VK_IMAGE_ASPECT_DEPTH_BIT) + ++reg_count; + + cmd_buffer->device->ws->cs_add_buffer(cmd_buffer->cs, image->bo, 8); + + radeon_emit(cmd_buffer->cs, PKT3(PKT3_WRITE_DATA, 2 + reg_count, 0)); + radeon_emit(cmd_buffer->cs, S_370_DST_SEL(V_370_MEM_ASYNC) | + S_370_WR_CONFIRM(1) | + S_370_ENGINE_SEL(V_370_PFP)); + radeon_emit(cmd_buffer->cs, va); + radeon_emit(cmd_buffer->cs, va >> 32); + if (aspects & VK_IMAGE_ASPECT_STENCIL_BIT) + radeon_emit(cmd_buffer->cs, ds_clear_value.stencil); + if (aspects & VK_IMAGE_ASPECT_DEPTH_BIT) + radeon_emit(cmd_buffer->cs, fui(ds_clear_value.depth)); + + radeon_set_context_reg_seq(cmd_buffer->cs, R_028028_DB_STENCIL_CLEAR + 4 * reg_offset, reg_count); + if (aspects & VK_IMAGE_ASPECT_STENCIL_BIT) + radeon_emit(cmd_buffer->cs, ds_clear_value.stencil); /* R_028028_DB_STENCIL_CLEAR */ + if (aspects & VK_IMAGE_ASPECT_DEPTH_BIT) + radeon_emit(cmd_buffer->cs, fui(ds_clear_value.depth)); /* R_02802C_DB_DEPTH_CLEAR */ +} + +static void +radv_load_depth_clear_regs(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *image) +{ + uint64_t va = cmd_buffer->device->ws->buffer_get_va(image->bo); + va += image->offset + image->clear_value_offset; + + if (!image->htile.size) + return; + + cmd_buffer->device->ws->cs_add_buffer(cmd_buffer->cs, image->bo, 8); + + radeon_emit(cmd_buffer->cs, PKT3(PKT3_COPY_DATA, 4, 0)); + radeon_emit(cmd_buffer->cs, COPY_DATA_SRC_SEL(COPY_DATA_MEM) | + COPY_DATA_DST_SEL(COPY_DATA_REG) | + COPY_DATA_COUNT_SEL); + radeon_emit(cmd_buffer->cs, va); + radeon_emit(cmd_buffer->cs, va >> 32); + radeon_emit(cmd_buffer->cs, R_028028_DB_STENCIL_CLEAR >> 2); + radeon_emit(cmd_buffer->cs, 0); + + radeon_emit(cmd_buffer->cs, PKT3(PKT3_PFP_SYNC_ME, 0, 0)); + radeon_emit(cmd_buffer->cs, 0); +} + +void +radv_set_color_clear_regs(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *image, + int idx, + uint32_t color_values[2]) +{ + uint64_t va = cmd_buffer->device->ws->buffer_get_va(image->bo); + va += image->offset + image->clear_value_offset; + + if (!image->cmask.size && !image->surface.dcc_size) + return; + + cmd_buffer->device->ws->cs_add_buffer(cmd_buffer->cs, image->bo, 8); + + radeon_emit(cmd_buffer->cs, PKT3(PKT3_WRITE_DATA, 4, 0)); + radeon_emit(cmd_buffer->cs, S_370_DST_SEL(V_370_MEM_ASYNC) | + S_370_WR_CONFIRM(1) | + S_370_ENGINE_SEL(V_370_PFP)); + radeon_emit(cmd_buffer->cs, va); + radeon_emit(cmd_buffer->cs, va >> 32); + radeon_emit(cmd_buffer->cs, color_values[0]); + radeon_emit(cmd_buffer->cs, color_values[1]); + + radeon_set_context_reg_seq(cmd_buffer->cs, R_028C8C_CB_COLOR0_CLEAR_WORD0 + idx * 0x3c, 2); + radeon_emit(cmd_buffer->cs, color_values[0]); + radeon_emit(cmd_buffer->cs, color_values[1]); +} + +static void +radv_load_color_clear_regs(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *image, + int idx) +{ + uint64_t va = cmd_buffer->device->ws->buffer_get_va(image->bo); + va += image->offset + image->clear_value_offset; + + if (!image->cmask.size && !image->surface.dcc_size) + return; + + uint32_t reg = R_028C8C_CB_COLOR0_CLEAR_WORD0 + idx * 0x3c; + cmd_buffer->device->ws->cs_add_buffer(cmd_buffer->cs, image->bo, 8); + + radeon_emit(cmd_buffer->cs, PKT3(PKT3_COPY_DATA, 4, 0)); + radeon_emit(cmd_buffer->cs, COPY_DATA_SRC_SEL(COPY_DATA_MEM) | + COPY_DATA_DST_SEL(COPY_DATA_REG) | + COPY_DATA_COUNT_SEL); + radeon_emit(cmd_buffer->cs, va); + radeon_emit(cmd_buffer->cs, va >> 32); + radeon_emit(cmd_buffer->cs, reg >> 2); + radeon_emit(cmd_buffer->cs, 0); + + radeon_emit(cmd_buffer->cs, PKT3(PKT3_PFP_SYNC_ME, 0, 0)); + radeon_emit(cmd_buffer->cs, 0); +} + +void +radv_emit_framebuffer_state(struct radv_cmd_buffer *cmd_buffer) +{ + int i; + struct radv_framebuffer *framebuffer = cmd_buffer->state.framebuffer; + const struct radv_subpass *subpass = cmd_buffer->state.subpass; + int dst_resolve_micro_tile_mode = -1; + + if (subpass->has_resolve) { + uint32_t a = subpass->resolve_attachments[0].attachment; + const struct radv_image *image = framebuffer->attachments[a].attachment->image; + dst_resolve_micro_tile_mode = image->surface.micro_tile_mode; + } + for (i = 0; i < subpass->color_count; ++i) { + int idx = subpass->color_attachments[i].attachment; + struct radv_attachment_info *att = &framebuffer->attachments[idx]; + + if (dst_resolve_micro_tile_mode != -1) { + radv_set_optimal_micro_tile_mode(cmd_buffer->device, + att, dst_resolve_micro_tile_mode); + } + cmd_buffer->device->ws->cs_add_buffer(cmd_buffer->cs, att->attachment->bo, 8); + + assert(att->attachment->aspect_mask & VK_IMAGE_ASPECT_COLOR_BIT); + radv_emit_fb_color_state(cmd_buffer, i, &att->cb); + + radv_load_color_clear_regs(cmd_buffer, att->attachment->image, i); + } + + for (i = subpass->color_count; i < 8; i++) + radeon_set_context_reg(cmd_buffer->cs, R_028C70_CB_COLOR0_INFO + i * 0x3C, + S_028C70_FORMAT(V_028C70_COLOR_INVALID)); + + if(subpass->depth_stencil_attachment.attachment != VK_ATTACHMENT_UNUSED) { + int idx = subpass->depth_stencil_attachment.attachment; + VkImageLayout layout = subpass->depth_stencil_attachment.layout; + struct radv_attachment_info *att = &framebuffer->attachments[idx]; + struct radv_image *image = att->attachment->image; + cmd_buffer->device->ws->cs_add_buffer(cmd_buffer->cs, att->attachment->bo, 8); + + radv_emit_fb_ds_state(cmd_buffer, &att->ds, image, layout); + + if (att->ds.offset_scale != cmd_buffer->state.offset_scale) { + cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS; + cmd_buffer->state.offset_scale = att->ds.offset_scale; + } + radv_load_depth_clear_regs(cmd_buffer, image); + } else { + radeon_set_context_reg_seq(cmd_buffer->cs, R_028040_DB_Z_INFO, 2); + radeon_emit(cmd_buffer->cs, S_028040_FORMAT(V_028040_Z_INVALID)); /* R_028040_DB_Z_INFO */ + radeon_emit(cmd_buffer->cs, S_028044_FORMAT(V_028044_STENCIL_INVALID)); /* R_028044_DB_STENCIL_INFO */ + } + radeon_set_context_reg(cmd_buffer->cs, R_028208_PA_SC_WINDOW_SCISSOR_BR, + S_028208_BR_X(framebuffer->width) | + S_028208_BR_Y(framebuffer->height)); +} + +void radv_set_db_count_control(struct radv_cmd_buffer *cmd_buffer) +{ + uint32_t db_count_control; + + if(!cmd_buffer->state.active_occlusion_queries) { + if (cmd_buffer->device->physical_device->rad_info.chip_class >= CIK) { + db_count_control = 0; + } else { + db_count_control = S_028004_ZPASS_INCREMENT_DISABLE(1); + } + } else { + if (cmd_buffer->device->physical_device->rad_info.chip_class >= CIK) { + db_count_control = S_028004_PERFECT_ZPASS_COUNTS(1) | + S_028004_SAMPLE_RATE(0) | /* TODO: set this to the number of samples of the current framebuffer */ + S_028004_ZPASS_ENABLE(1) | + S_028004_SLICE_EVEN_ENABLE(1) | + S_028004_SLICE_ODD_ENABLE(1); + } else { + db_count_control = S_028004_PERFECT_ZPASS_COUNTS(1) | + S_028004_SAMPLE_RATE(0); /* TODO: set this to the number of samples of the current framebuffer */ + } + } + + radeon_set_context_reg(cmd_buffer->cs, R_028004_DB_COUNT_CONTROL, db_count_control); +} + +static void +radv_cmd_buffer_flush_dynamic_state(struct radv_cmd_buffer *cmd_buffer) +{ + struct radv_dynamic_state *d = &cmd_buffer->state.dynamic; + + if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_DYNAMIC_LINE_WIDTH) { + unsigned width = cmd_buffer->state.dynamic.line_width * 8; + radeon_set_context_reg(cmd_buffer->cs, R_028A08_PA_SU_LINE_CNTL, + S_028A08_WIDTH(CLAMP(width, 0, 0xFFF))); + } + + if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS) { + radeon_set_context_reg_seq(cmd_buffer->cs, R_028414_CB_BLEND_RED, 4); + radeon_emit_array(cmd_buffer->cs, (uint32_t*)d->blend_constants, 4); + } + + if (cmd_buffer->state.dirty & (RADV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE | + RADV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK | + RADV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK)) { + radeon_set_context_reg_seq(cmd_buffer->cs, R_028430_DB_STENCILREFMASK, 2); + radeon_emit(cmd_buffer->cs, S_028430_STENCILTESTVAL(d->stencil_reference.front) | + S_028430_STENCILMASK(d->stencil_compare_mask.front) | + S_028430_STENCILWRITEMASK(d->stencil_write_mask.front) | + S_028430_STENCILOPVAL(1)); + radeon_emit(cmd_buffer->cs, S_028434_STENCILTESTVAL_BF(d->stencil_reference.back) | + S_028434_STENCILMASK_BF(d->stencil_compare_mask.back) | + S_028434_STENCILWRITEMASK_BF(d->stencil_write_mask.back) | + S_028434_STENCILOPVAL_BF(1)); + } + + if (cmd_buffer->state.dirty & (RADV_CMD_DIRTY_PIPELINE | + RADV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS)) { + radeon_set_context_reg(cmd_buffer->cs, R_028020_DB_DEPTH_BOUNDS_MIN, fui(d->depth_bounds.min)); + radeon_set_context_reg(cmd_buffer->cs, R_028024_DB_DEPTH_BOUNDS_MAX, fui(d->depth_bounds.max)); + } + + if (cmd_buffer->state.dirty & (RADV_CMD_DIRTY_PIPELINE | + RADV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS)) { + struct radv_raster_state *raster = &cmd_buffer->state.pipeline->graphics.raster; + unsigned slope = fui(d->depth_bias.slope * 16.0f); + unsigned bias = fui(d->depth_bias.bias * cmd_buffer->state.offset_scale); + + if (G_028814_POLY_OFFSET_FRONT_ENABLE(raster->pa_su_sc_mode_cntl)) { + radeon_set_context_reg_seq(cmd_buffer->cs, R_028B7C_PA_SU_POLY_OFFSET_CLAMP, 5); + radeon_emit(cmd_buffer->cs, fui(d->depth_bias.clamp)); /* CLAMP */ + radeon_emit(cmd_buffer->cs, slope); /* FRONT SCALE */ + radeon_emit(cmd_buffer->cs, bias); /* FRONT OFFSET */ + radeon_emit(cmd_buffer->cs, slope); /* BACK SCALE */ + radeon_emit(cmd_buffer->cs, bias); /* BACK OFFSET */ + } + } + + cmd_buffer->state.dirty = 0; +} + +static void +emit_stage_descriptor_set_userdata(struct radv_cmd_buffer *cmd_buffer, + struct radv_pipeline *pipeline, + int idx, + uint64_t va, + gl_shader_stage stage) +{ + struct ac_userdata_info *desc_set_loc = &pipeline->shaders[stage]->info.user_sgprs_locs.descriptor_sets[idx]; + uint32_t base_reg = shader_stage_to_user_data_0(stage); + + if (desc_set_loc->sgpr_idx == -1) + return; + + assert(!desc_set_loc->indirect); + assert(desc_set_loc->num_sgprs == 2); + radeon_set_sh_reg_seq(cmd_buffer->cs, + base_reg + desc_set_loc->sgpr_idx * 4, 2); + radeon_emit(cmd_buffer->cs, va); + radeon_emit(cmd_buffer->cs, va >> 32); +} + +static void +radv_emit_descriptor_set_userdata(struct radv_cmd_buffer *cmd_buffer, + struct radv_pipeline *pipeline, + VkShaderStageFlags stages, + struct radv_descriptor_set *set, + unsigned idx) +{ + if (stages & VK_SHADER_STAGE_FRAGMENT_BIT) + emit_stage_descriptor_set_userdata(cmd_buffer, pipeline, + idx, set->va, + MESA_SHADER_FRAGMENT); + + if (stages & VK_SHADER_STAGE_VERTEX_BIT) + emit_stage_descriptor_set_userdata(cmd_buffer, pipeline, + idx, set->va, + MESA_SHADER_VERTEX); + + if (stages & VK_SHADER_STAGE_COMPUTE_BIT) + emit_stage_descriptor_set_userdata(cmd_buffer, pipeline, + idx, set->va, + MESA_SHADER_COMPUTE); +} + +static void +radv_flush_descriptors(struct radv_cmd_buffer *cmd_buffer, + struct radv_pipeline *pipeline, + VkShaderStageFlags stages) +{ + unsigned i; + if (!cmd_buffer->state.descriptors_dirty) + return; + + for (i = 0; i < MAX_SETS; i++) { + if (!(cmd_buffer->state.descriptors_dirty & (1 << i))) + continue; + struct radv_descriptor_set *set = cmd_buffer->state.descriptors[i]; + if (!set) + continue; + + radv_emit_descriptor_set_userdata(cmd_buffer, pipeline, stages, set, i); + } + cmd_buffer->state.descriptors_dirty = 0; +} + +static void +radv_flush_constants(struct radv_cmd_buffer *cmd_buffer, + struct radv_pipeline *pipeline, + VkShaderStageFlags stages) +{ + struct radv_pipeline_layout *layout = pipeline->layout; + unsigned offset; + void *ptr; + uint64_t va; + + stages &= cmd_buffer->push_constant_stages; + if (!stages || !layout || (!layout->push_constant_size && !layout->dynamic_offset_count)) + return; + + radv_cmd_buffer_upload_alloc(cmd_buffer, layout->push_constant_size + + 16 * layout->dynamic_offset_count, + 256, &offset, &ptr); + + memcpy(ptr, cmd_buffer->push_constants, layout->push_constant_size); + memcpy((char*)ptr + layout->push_constant_size, cmd_buffer->dynamic_buffers, + 16 * layout->dynamic_offset_count); + + va = cmd_buffer->device->ws->buffer_get_va(cmd_buffer->upload.upload_bo); + va += offset; + + if (stages & VK_SHADER_STAGE_VERTEX_BIT) + radv_emit_userdata_address(cmd_buffer, pipeline, MESA_SHADER_VERTEX, + AC_UD_PUSH_CONSTANTS, va); + + if (stages & VK_SHADER_STAGE_FRAGMENT_BIT) + radv_emit_userdata_address(cmd_buffer, pipeline, MESA_SHADER_FRAGMENT, + AC_UD_PUSH_CONSTANTS, va); + + if (stages & VK_SHADER_STAGE_COMPUTE_BIT) + radv_emit_userdata_address(cmd_buffer, pipeline, MESA_SHADER_COMPUTE, + AC_UD_PUSH_CONSTANTS, va); + + cmd_buffer->push_constant_stages &= ~stages; +} + +static void +radv_cmd_buffer_flush_state(struct radv_cmd_buffer *cmd_buffer) +{ + struct radv_pipeline *pipeline = cmd_buffer->state.pipeline; + struct radv_device *device = cmd_buffer->device; + uint32_t ia_multi_vgt_param; + uint32_t ls_hs_config = 0; + + MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, + cmd_buffer->cs, 4096); + + if ((cmd_buffer->state.vertex_descriptors_dirty || cmd_buffer->state.vb_dirty) && + cmd_buffer->state.pipeline->num_vertex_attribs) { + unsigned vb_offset; + void *vb_ptr; + uint32_t i = 0; + uint32_t num_attribs = cmd_buffer->state.pipeline->num_vertex_attribs; + uint64_t va; + + /* allocate some descriptor state for vertex buffers */ + radv_cmd_buffer_upload_alloc(cmd_buffer, num_attribs * 16, 256, + &vb_offset, &vb_ptr); + + for (i = 0; i < num_attribs; i++) { + uint32_t *desc = &((uint32_t *)vb_ptr)[i * 4]; + uint32_t offset; + int vb = cmd_buffer->state.pipeline->va_binding[i]; + struct radv_buffer *buffer = cmd_buffer->state.vertex_bindings[vb].buffer; + uint32_t stride = cmd_buffer->state.pipeline->binding_stride[vb]; + + device->ws->cs_add_buffer(cmd_buffer->cs, buffer->bo, 8); + va = device->ws->buffer_get_va(buffer->bo); + + offset = cmd_buffer->state.vertex_bindings[vb].offset + cmd_buffer->state.pipeline->va_offset[i]; + va += offset + buffer->offset; + desc[0] = va; + desc[1] = S_008F04_BASE_ADDRESS_HI(va >> 32) | S_008F04_STRIDE(stride); + if (cmd_buffer->device->physical_device->rad_info.chip_class <= CIK && stride) + desc[2] = (buffer->size - offset - cmd_buffer->state.pipeline->va_format_size[i]) / stride + 1; + else + desc[2] = buffer->size - offset; + desc[3] = cmd_buffer->state.pipeline->va_rsrc_word3[i]; + } + + va = device->ws->buffer_get_va(cmd_buffer->upload.upload_bo); + va += vb_offset; + + radv_emit_userdata_address(cmd_buffer, pipeline, MESA_SHADER_VERTEX, + AC_UD_VS_VERTEX_BUFFERS, va); + } + + cmd_buffer->state.vertex_descriptors_dirty = false; + cmd_buffer->state.vb_dirty = 0; + if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_PIPELINE) + radv_emit_graphics_pipeline(cmd_buffer, pipeline); + + if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_RENDER_TARGETS) + radv_emit_framebuffer_state(cmd_buffer); + + if (cmd_buffer->state.dirty & (RADV_CMD_DIRTY_DYNAMIC_VIEWPORT)) + radv_emit_viewport(cmd_buffer); + + if (cmd_buffer->state.dirty & (RADV_CMD_DIRTY_DYNAMIC_SCISSOR)) + radv_emit_scissor(cmd_buffer); + + if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_PIPELINE) { + radeon_set_context_reg(cmd_buffer->cs, R_028B54_VGT_SHADER_STAGES_EN, 0); + ia_multi_vgt_param = si_get_ia_multi_vgt_param(cmd_buffer); + + if (cmd_buffer->device->physical_device->rad_info.chip_class >= CIK) { + radeon_set_context_reg_idx(cmd_buffer->cs, R_028AA8_IA_MULTI_VGT_PARAM, 1, ia_multi_vgt_param); + radeon_set_context_reg_idx(cmd_buffer->cs, R_028B58_VGT_LS_HS_CONFIG, 2, ls_hs_config); + radeon_set_uconfig_reg_idx(cmd_buffer->cs, R_030908_VGT_PRIMITIVE_TYPE, 1, cmd_buffer->state.pipeline->graphics.prim); + } else { + radeon_set_config_reg(cmd_buffer->cs, R_008958_VGT_PRIMITIVE_TYPE, cmd_buffer->state.pipeline->graphics.prim); + radeon_set_context_reg(cmd_buffer->cs, R_028AA8_IA_MULTI_VGT_PARAM, ia_multi_vgt_param); + radeon_set_context_reg(cmd_buffer->cs, R_028B58_VGT_LS_HS_CONFIG, ls_hs_config); + } + radeon_set_context_reg(cmd_buffer->cs, R_028A6C_VGT_GS_OUT_PRIM_TYPE, cmd_buffer->state.pipeline->graphics.gs_out); + } + + radv_cmd_buffer_flush_dynamic_state(cmd_buffer); + + radv_flush_descriptors(cmd_buffer, cmd_buffer->state.pipeline, + VK_SHADER_STAGE_ALL_GRAPHICS); + radv_flush_constants(cmd_buffer, cmd_buffer->state.pipeline, + VK_SHADER_STAGE_ALL_GRAPHICS); + + assert(cmd_buffer->cs->cdw <= cdw_max); + + si_emit_cache_flush(cmd_buffer); +} + +static void radv_stage_flush(struct radv_cmd_buffer *cmd_buffer, + VkPipelineStageFlags src_stage_mask) +{ + if (src_stage_mask & (VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT | + VK_PIPELINE_STAGE_TRANSFER_BIT | + VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT | + VK_PIPELINE_STAGE_ALL_COMMANDS_BIT)) { + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_CS_PARTIAL_FLUSH; + } + + if (src_stage_mask & (VK_PIPELINE_STAGE_TESSELLATION_CONTROL_SHADER_BIT | + VK_PIPELINE_STAGE_TESSELLATION_EVALUATION_SHADER_BIT | + VK_PIPELINE_STAGE_GEOMETRY_SHADER_BIT | + VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT | + VK_PIPELINE_STAGE_EARLY_FRAGMENT_TESTS_BIT | + VK_PIPELINE_STAGE_LATE_FRAGMENT_TESTS_BIT | + VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT | + VK_PIPELINE_STAGE_TRANSFER_BIT | + VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT | + VK_PIPELINE_STAGE_ALL_GRAPHICS_BIT | + VK_PIPELINE_STAGE_ALL_COMMANDS_BIT)) { + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_PS_PARTIAL_FLUSH; + } else if (src_stage_mask & (VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT | + VK_PIPELINE_STAGE_DRAW_INDIRECT_BIT | + VK_PIPELINE_STAGE_VERTEX_INPUT_BIT | + VK_PIPELINE_STAGE_VERTEX_SHADER_BIT)) { + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_VS_PARTIAL_FLUSH; + } +} + +static void radv_subpass_barrier(struct radv_cmd_buffer *cmd_buffer, const struct radv_subpass_barrier *barrier) +{ + radv_stage_flush(cmd_buffer, barrier->src_stage_mask); + + /* TODO: actual cache flushes */ +} + +static void radv_handle_subpass_image_transition(struct radv_cmd_buffer *cmd_buffer, + VkAttachmentReference att) +{ + unsigned idx = att.attachment; + struct radv_image_view *view = cmd_buffer->state.framebuffer->attachments[idx].attachment; + VkImageSubresourceRange range; + range.aspectMask = 0; + range.baseMipLevel = view->base_mip; + range.levelCount = 1; + range.baseArrayLayer = view->base_layer; + range.layerCount = cmd_buffer->state.framebuffer->layers; + + radv_handle_image_transition(cmd_buffer, + view->image, + cmd_buffer->state.attachments[idx].current_layout, + att.layout, 0, 0, range, + cmd_buffer->state.attachments[idx].pending_clear_aspects); + + cmd_buffer->state.attachments[idx].current_layout = att.layout; + + +} + +void +radv_cmd_buffer_set_subpass(struct radv_cmd_buffer *cmd_buffer, + const struct radv_subpass *subpass, bool transitions) +{ + if (transitions) { + radv_subpass_barrier(cmd_buffer, &subpass->start_barrier); + + for (unsigned i = 0; i < subpass->color_count; ++i) { + radv_handle_subpass_image_transition(cmd_buffer, + subpass->color_attachments[i]); + } + + for (unsigned i = 0; i < subpass->input_count; ++i) { + radv_handle_subpass_image_transition(cmd_buffer, + subpass->input_attachments[i]); + } + + if (subpass->depth_stencil_attachment.attachment != VK_ATTACHMENT_UNUSED) { + radv_handle_subpass_image_transition(cmd_buffer, + subpass->depth_stencil_attachment); + } + } + + cmd_buffer->state.subpass = subpass; + + cmd_buffer->state.dirty |= RADV_CMD_DIRTY_RENDER_TARGETS; +} + +static void +radv_cmd_state_setup_attachments(struct radv_cmd_buffer *cmd_buffer, + struct radv_render_pass *pass, + const VkRenderPassBeginInfo *info) +{ + struct radv_cmd_state *state = &cmd_buffer->state; + + if (pass->attachment_count == 0) { + state->attachments = NULL; + return; + } + + state->attachments = vk_alloc(&cmd_buffer->pool->alloc, + pass->attachment_count * + sizeof(state->attachments[0]), + 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (state->attachments == NULL) { + /* FIXME: Propagate VK_ERROR_OUT_OF_HOST_MEMORY to vkEndCommandBuffer */ + abort(); + } + + for (uint32_t i = 0; i < pass->attachment_count; ++i) { + struct radv_render_pass_attachment *att = &pass->attachments[i]; + VkImageAspectFlags att_aspects = vk_format_aspects(att->format); + VkImageAspectFlags clear_aspects = 0; + + if (att_aspects == VK_IMAGE_ASPECT_COLOR_BIT) { + /* color attachment */ + if (att->load_op == VK_ATTACHMENT_LOAD_OP_CLEAR) { + clear_aspects |= VK_IMAGE_ASPECT_COLOR_BIT; + } + } else { + /* depthstencil attachment */ + if ((att_aspects & VK_IMAGE_ASPECT_DEPTH_BIT) && + att->load_op == VK_ATTACHMENT_LOAD_OP_CLEAR) { + clear_aspects |= VK_IMAGE_ASPECT_DEPTH_BIT; + } + if ((att_aspects & VK_IMAGE_ASPECT_STENCIL_BIT) && + att->stencil_load_op == VK_ATTACHMENT_LOAD_OP_CLEAR) { + clear_aspects |= VK_IMAGE_ASPECT_STENCIL_BIT; + } + } + + state->attachments[i].pending_clear_aspects = clear_aspects; + if (clear_aspects && info) { + assert(info->clearValueCount > i); + state->attachments[i].clear_value = info->pClearValues[i]; + } + + state->attachments[i].current_layout = att->initial_layout; + } +} + +VkResult radv_AllocateCommandBuffers( + VkDevice _device, + const VkCommandBufferAllocateInfo *pAllocateInfo, + VkCommandBuffer *pCommandBuffers) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_cmd_pool, pool, pAllocateInfo->commandPool); + + VkResult result = VK_SUCCESS; + uint32_t i; + + for (i = 0; i < pAllocateInfo->commandBufferCount; i++) { + result = radv_create_cmd_buffer(device, pool, pAllocateInfo->level, + &pCommandBuffers[i]); + if (result != VK_SUCCESS) + break; + } + + if (result != VK_SUCCESS) + radv_FreeCommandBuffers(_device, pAllocateInfo->commandPool, + i, pCommandBuffers); + + return result; +} + +static void +radv_cmd_buffer_destroy(struct radv_cmd_buffer *cmd_buffer) +{ + list_del(&cmd_buffer->pool_link); + + list_for_each_entry_safe(struct radv_cmd_buffer_upload, up, + &cmd_buffer->upload.list, list) { + cmd_buffer->device->ws->buffer_destroy(up->upload_bo); + list_del(&up->list); + free(up); + } + + if (cmd_buffer->upload.upload_bo) + cmd_buffer->device->ws->buffer_destroy(cmd_buffer->upload.upload_bo); + cmd_buffer->device->ws->cs_destroy(cmd_buffer->cs); + vk_free(&cmd_buffer->pool->alloc, cmd_buffer); +} + +void radv_FreeCommandBuffers( + VkDevice device, + VkCommandPool commandPool, + uint32_t commandBufferCount, + const VkCommandBuffer *pCommandBuffers) +{ + for (uint32_t i = 0; i < commandBufferCount; i++) { + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, pCommandBuffers[i]); + + if (cmd_buffer) + radv_cmd_buffer_destroy(cmd_buffer); + } +} + +static void radv_reset_cmd_buffer(struct radv_cmd_buffer *cmd_buffer) +{ + + cmd_buffer->device->ws->cs_reset(cmd_buffer->cs); + + list_for_each_entry_safe(struct radv_cmd_buffer_upload, up, + &cmd_buffer->upload.list, list) { + cmd_buffer->device->ws->buffer_destroy(up->upload_bo); + list_del(&up->list); + free(up); + } + + if (cmd_buffer->upload.upload_bo) + cmd_buffer->device->ws->cs_add_buffer(cmd_buffer->cs, + cmd_buffer->upload.upload_bo, 8); + cmd_buffer->upload.offset = 0; + + cmd_buffer->record_fail = false; +} + +VkResult radv_ResetCommandBuffer( + VkCommandBuffer commandBuffer, + VkCommandBufferResetFlags flags) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + radv_reset_cmd_buffer(cmd_buffer); + return VK_SUCCESS; +} + +VkResult radv_BeginCommandBuffer( + VkCommandBuffer commandBuffer, + const VkCommandBufferBeginInfo *pBeginInfo) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + radv_reset_cmd_buffer(cmd_buffer); + + memset(&cmd_buffer->state, 0, sizeof(cmd_buffer->state)); + + /* setup initial configuration into command buffer */ + if (cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY) { + switch (cmd_buffer->queue_family_index) { + case RADV_QUEUE_GENERAL: + /* Flush read caches at the beginning of CS not flushed by the kernel. */ + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_INV_ICACHE | + RADV_CMD_FLAG_PS_PARTIAL_FLUSH | + RADV_CMD_FLAG_CS_PARTIAL_FLUSH | + RADV_CMD_FLAG_INV_VMEM_L1 | + RADV_CMD_FLAG_INV_SMEM_L1 | + RADV_CMD_FLUSH_AND_INV_FRAMEBUFFER | + RADV_CMD_FLAG_INV_GLOBAL_L2; + si_init_config(cmd_buffer->device->physical_device, cmd_buffer); + radv_set_db_count_control(cmd_buffer); + si_emit_cache_flush(cmd_buffer); + break; + case RADV_QUEUE_COMPUTE: + cmd_buffer->state.flush_bits = RADV_CMD_FLAG_INV_ICACHE | + RADV_CMD_FLAG_CS_PARTIAL_FLUSH | + RADV_CMD_FLAG_INV_VMEM_L1 | + RADV_CMD_FLAG_INV_SMEM_L1 | + RADV_CMD_FLAG_INV_GLOBAL_L2; + si_init_compute(cmd_buffer->device->physical_device, cmd_buffer); + si_emit_cache_flush(cmd_buffer); + break; + case RADV_QUEUE_TRANSFER: + default: + break; + } + } + + if (pBeginInfo->flags & VK_COMMAND_BUFFER_USAGE_RENDER_PASS_CONTINUE_BIT) { + cmd_buffer->state.framebuffer = radv_framebuffer_from_handle(pBeginInfo->pInheritanceInfo->framebuffer); + cmd_buffer->state.pass = radv_render_pass_from_handle(pBeginInfo->pInheritanceInfo->renderPass); + + struct radv_subpass *subpass = + &cmd_buffer->state.pass->subpasses[pBeginInfo->pInheritanceInfo->subpass]; + + radv_cmd_state_setup_attachments(cmd_buffer, cmd_buffer->state.pass, NULL); + radv_cmd_buffer_set_subpass(cmd_buffer, subpass, false); + } + + return VK_SUCCESS; +} + +void radv_CmdBindVertexBuffers( + VkCommandBuffer commandBuffer, + uint32_t firstBinding, + uint32_t bindingCount, + const VkBuffer* pBuffers, + const VkDeviceSize* pOffsets) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + struct radv_vertex_binding *vb = cmd_buffer->state.vertex_bindings; + + /* We have to defer setting up vertex buffer since we need the buffer + * stride from the pipeline. */ + + assert(firstBinding + bindingCount < MAX_VBS); + for (uint32_t i = 0; i < bindingCount; i++) { + vb[firstBinding + i].buffer = radv_buffer_from_handle(pBuffers[i]); + vb[firstBinding + i].offset = pOffsets[i]; + cmd_buffer->state.vb_dirty |= 1 << (firstBinding + i); + } +} + +void radv_CmdBindIndexBuffer( + VkCommandBuffer commandBuffer, + VkBuffer buffer, + VkDeviceSize offset, + VkIndexType indexType) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + + cmd_buffer->state.index_buffer = radv_buffer_from_handle(buffer); + cmd_buffer->state.index_offset = offset; + cmd_buffer->state.index_type = indexType; /* vk matches hw */ + cmd_buffer->state.dirty |= RADV_CMD_DIRTY_INDEX_BUFFER; + cmd_buffer->device->ws->cs_add_buffer(cmd_buffer->cs, cmd_buffer->state.index_buffer->bo, 8); +} + + +void radv_bind_descriptor_set(struct radv_cmd_buffer *cmd_buffer, + struct radv_descriptor_set *set, + unsigned idx) +{ + struct radeon_winsys *ws = cmd_buffer->device->ws; + + cmd_buffer->state.descriptors[idx] = set; + cmd_buffer->state.descriptors_dirty |= (1 << idx); + if (!set) + return; + + for (unsigned j = 0; j < set->layout->buffer_count; ++j) + if (set->descriptors[j]) + ws->cs_add_buffer(cmd_buffer->cs, set->descriptors[j], 7); + + if(set->bo) + ws->cs_add_buffer(cmd_buffer->cs, set->bo, 8); +} + +void radv_CmdBindDescriptorSets( + VkCommandBuffer commandBuffer, + VkPipelineBindPoint pipelineBindPoint, + VkPipelineLayout _layout, + uint32_t firstSet, + uint32_t descriptorSetCount, + const VkDescriptorSet* pDescriptorSets, + uint32_t dynamicOffsetCount, + const uint32_t* pDynamicOffsets) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + RADV_FROM_HANDLE(radv_pipeline_layout, layout, _layout); + unsigned dyn_idx = 0; + + MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, + cmd_buffer->cs, MAX_SETS * 4 * 6); + + for (unsigned i = 0; i < descriptorSetCount; ++i) { + unsigned idx = i + firstSet; + RADV_FROM_HANDLE(radv_descriptor_set, set, pDescriptorSets[i]); + radv_bind_descriptor_set(cmd_buffer, set, idx); + + for(unsigned j = 0; j < set->layout->dynamic_offset_count; ++j, ++dyn_idx) { + unsigned idx = j + layout->set[i + firstSet].dynamic_offset_start; + uint32_t *dst = cmd_buffer->dynamic_buffers + idx * 4; + assert(dyn_idx < dynamicOffsetCount); + + struct radv_descriptor_range *range = set->dynamic_descriptors + j; + uint64_t va = range->va + pDynamicOffsets[dyn_idx]; + dst[0] = va; + dst[1] = S_008F04_BASE_ADDRESS_HI(va >> 32); + dst[2] = range->size; + dst[3] = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) | + S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) | + S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) | + S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W) | + S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) | + S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32); + cmd_buffer->push_constant_stages |= + set->layout->dynamic_shader_stages; + } + } + + assert(cmd_buffer->cs->cdw <= cdw_max); +} + +void radv_CmdPushConstants(VkCommandBuffer commandBuffer, + VkPipelineLayout layout, + VkShaderStageFlags stageFlags, + uint32_t offset, + uint32_t size, + const void* pValues) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + memcpy(cmd_buffer->push_constants + offset, pValues, size); + cmd_buffer->push_constant_stages |= stageFlags; +} + +VkResult radv_EndCommandBuffer( + VkCommandBuffer commandBuffer) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + + if (cmd_buffer->queue_family_index != RADV_QUEUE_TRANSFER) + si_emit_cache_flush(cmd_buffer); + if (!cmd_buffer->device->ws->cs_finalize(cmd_buffer->cs) || + cmd_buffer->record_fail) + return VK_ERROR_OUT_OF_DEVICE_MEMORY; + return VK_SUCCESS; +} + +static void +radv_emit_compute_pipeline(struct radv_cmd_buffer *cmd_buffer) +{ + struct radeon_winsys *ws = cmd_buffer->device->ws; + struct radv_shader_variant *compute_shader; + struct radv_pipeline *pipeline = cmd_buffer->state.compute_pipeline; + uint64_t va; + + if (!pipeline || pipeline == cmd_buffer->state.emitted_compute_pipeline) + return; + + cmd_buffer->state.emitted_compute_pipeline = pipeline; + + compute_shader = pipeline->shaders[MESA_SHADER_COMPUTE]; + va = ws->buffer_get_va(compute_shader->bo); + + ws->cs_add_buffer(cmd_buffer->cs, compute_shader->bo, 8); + + MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, + cmd_buffer->cs, 16); + + radeon_set_sh_reg_seq(cmd_buffer->cs, R_00B830_COMPUTE_PGM_LO, 2); + radeon_emit(cmd_buffer->cs, va >> 8); + radeon_emit(cmd_buffer->cs, va >> 40); + + radeon_set_sh_reg_seq(cmd_buffer->cs, R_00B848_COMPUTE_PGM_RSRC1, 2); + radeon_emit(cmd_buffer->cs, compute_shader->rsrc1); + radeon_emit(cmd_buffer->cs, compute_shader->rsrc2); + + /* change these once we have scratch support */ + radeon_set_sh_reg(cmd_buffer->cs, R_00B860_COMPUTE_TMPRING_SIZE, + S_00B860_WAVES(32) | S_00B860_WAVESIZE(0)); + + radeon_set_sh_reg_seq(cmd_buffer->cs, R_00B81C_COMPUTE_NUM_THREAD_X, 3); + radeon_emit(cmd_buffer->cs, + S_00B81C_NUM_THREAD_FULL(compute_shader->info.cs.block_size[0])); + radeon_emit(cmd_buffer->cs, + S_00B81C_NUM_THREAD_FULL(compute_shader->info.cs.block_size[1])); + radeon_emit(cmd_buffer->cs, + S_00B81C_NUM_THREAD_FULL(compute_shader->info.cs.block_size[2])); + + assert(cmd_buffer->cs->cdw <= cdw_max); +} + + +void radv_CmdBindPipeline( + VkCommandBuffer commandBuffer, + VkPipelineBindPoint pipelineBindPoint, + VkPipeline _pipeline) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + RADV_FROM_HANDLE(radv_pipeline, pipeline, _pipeline); + + for (unsigned i = 0; i < MAX_SETS; i++) { + if (cmd_buffer->state.descriptors[i]) + cmd_buffer->state.descriptors_dirty |= (1 << i); + } + + switch (pipelineBindPoint) { + case VK_PIPELINE_BIND_POINT_COMPUTE: + cmd_buffer->state.compute_pipeline = pipeline; + cmd_buffer->push_constant_stages |= VK_SHADER_STAGE_COMPUTE_BIT; + break; + case VK_PIPELINE_BIND_POINT_GRAPHICS: + cmd_buffer->state.pipeline = pipeline; + cmd_buffer->state.vertex_descriptors_dirty = true; + cmd_buffer->state.dirty |= RADV_CMD_DIRTY_PIPELINE; + cmd_buffer->push_constant_stages |= pipeline->active_stages; + + /* Apply the dynamic state from the pipeline */ + cmd_buffer->state.dirty |= pipeline->dynamic_state_mask; + radv_dynamic_state_copy(&cmd_buffer->state.dynamic, + &pipeline->dynamic_state, + pipeline->dynamic_state_mask); + break; + default: + assert(!"invalid bind point"); + break; + } +} + +void radv_CmdSetViewport( + VkCommandBuffer commandBuffer, + uint32_t firstViewport, + uint32_t viewportCount, + const VkViewport* pViewports) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + + const uint32_t total_count = firstViewport + viewportCount; + if (cmd_buffer->state.dynamic.viewport.count < total_count) + cmd_buffer->state.dynamic.viewport.count = total_count; + + memcpy(cmd_buffer->state.dynamic.viewport.viewports + firstViewport, + pViewports, viewportCount * sizeof(*pViewports)); + + cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_VIEWPORT; +} + +void radv_CmdSetScissor( + VkCommandBuffer commandBuffer, + uint32_t firstScissor, + uint32_t scissorCount, + const VkRect2D* pScissors) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + + const uint32_t total_count = firstScissor + scissorCount; + if (cmd_buffer->state.dynamic.scissor.count < total_count) + cmd_buffer->state.dynamic.scissor.count = total_count; + + memcpy(cmd_buffer->state.dynamic.scissor.scissors + firstScissor, + pScissors, scissorCount * sizeof(*pScissors)); + cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_SCISSOR; +} + +void radv_CmdSetLineWidth( + VkCommandBuffer commandBuffer, + float lineWidth) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + cmd_buffer->state.dynamic.line_width = lineWidth; + cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_LINE_WIDTH; +} + +void radv_CmdSetDepthBias( + VkCommandBuffer commandBuffer, + float depthBiasConstantFactor, + float depthBiasClamp, + float depthBiasSlopeFactor) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + + cmd_buffer->state.dynamic.depth_bias.bias = depthBiasConstantFactor; + cmd_buffer->state.dynamic.depth_bias.clamp = depthBiasClamp; + cmd_buffer->state.dynamic.depth_bias.slope = depthBiasSlopeFactor; + + cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS; +} + +void radv_CmdSetBlendConstants( + VkCommandBuffer commandBuffer, + const float blendConstants[4]) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + + memcpy(cmd_buffer->state.dynamic.blend_constants, + blendConstants, sizeof(float) * 4); + + cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS; +} + +void radv_CmdSetDepthBounds( + VkCommandBuffer commandBuffer, + float minDepthBounds, + float maxDepthBounds) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + + cmd_buffer->state.dynamic.depth_bounds.min = minDepthBounds; + cmd_buffer->state.dynamic.depth_bounds.max = maxDepthBounds; + + cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS; +} + +void radv_CmdSetStencilCompareMask( + VkCommandBuffer commandBuffer, + VkStencilFaceFlags faceMask, + uint32_t compareMask) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + + if (faceMask & VK_STENCIL_FACE_FRONT_BIT) + cmd_buffer->state.dynamic.stencil_compare_mask.front = compareMask; + if (faceMask & VK_STENCIL_FACE_BACK_BIT) + cmd_buffer->state.dynamic.stencil_compare_mask.back = compareMask; + + cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK; +} + +void radv_CmdSetStencilWriteMask( + VkCommandBuffer commandBuffer, + VkStencilFaceFlags faceMask, + uint32_t writeMask) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + + if (faceMask & VK_STENCIL_FACE_FRONT_BIT) + cmd_buffer->state.dynamic.stencil_write_mask.front = writeMask; + if (faceMask & VK_STENCIL_FACE_BACK_BIT) + cmd_buffer->state.dynamic.stencil_write_mask.back = writeMask; + + cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK; +} + +void radv_CmdSetStencilReference( + VkCommandBuffer commandBuffer, + VkStencilFaceFlags faceMask, + uint32_t reference) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + + if (faceMask & VK_STENCIL_FACE_FRONT_BIT) + cmd_buffer->state.dynamic.stencil_reference.front = reference; + if (faceMask & VK_STENCIL_FACE_BACK_BIT) + cmd_buffer->state.dynamic.stencil_reference.back = reference; + + cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE; +} + + +void radv_CmdExecuteCommands( + VkCommandBuffer commandBuffer, + uint32_t commandBufferCount, + const VkCommandBuffer* pCmdBuffers) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, primary, commandBuffer); + + /* Emit pending flushes on primary prior to executing secondary */ + si_emit_cache_flush(primary); + + for (uint32_t i = 0; i < commandBufferCount; i++) { + RADV_FROM_HANDLE(radv_cmd_buffer, secondary, pCmdBuffers[i]); + + primary->device->ws->cs_execute_secondary(primary->cs, secondary->cs); + } + + /* if we execute secondary we need to re-emit out pipelines */ + if (commandBufferCount) { + primary->state.emitted_pipeline = NULL; + primary->state.emitted_compute_pipeline = NULL; + primary->state.dirty |= RADV_CMD_DIRTY_PIPELINE; + primary->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_ALL; + } +} + +VkResult radv_CreateCommandPool( + VkDevice _device, + const VkCommandPoolCreateInfo* pCreateInfo, + const VkAllocationCallbacks* pAllocator, + VkCommandPool* pCmdPool) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + struct radv_cmd_pool *pool; + + pool = vk_alloc2(&device->alloc, pAllocator, sizeof(*pool), 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (pool == NULL) + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + + if (pAllocator) + pool->alloc = *pAllocator; + else + pool->alloc = device->alloc; + + list_inithead(&pool->cmd_buffers); + + pool->queue_family_index = pCreateInfo->queueFamilyIndex; + + *pCmdPool = radv_cmd_pool_to_handle(pool); + + return VK_SUCCESS; + +} + +void radv_DestroyCommandPool( + VkDevice _device, + VkCommandPool commandPool, + const VkAllocationCallbacks* pAllocator) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_cmd_pool, pool, commandPool); + + if (!pool) + return; + + list_for_each_entry_safe(struct radv_cmd_buffer, cmd_buffer, + &pool->cmd_buffers, pool_link) { + radv_cmd_buffer_destroy(cmd_buffer); + } + + vk_free2(&device->alloc, pAllocator, pool); +} + +VkResult radv_ResetCommandPool( + VkDevice device, + VkCommandPool commandPool, + VkCommandPoolResetFlags flags) +{ + RADV_FROM_HANDLE(radv_cmd_pool, pool, commandPool); + + list_for_each_entry(struct radv_cmd_buffer, cmd_buffer, + &pool->cmd_buffers, pool_link) { + radv_reset_cmd_buffer(cmd_buffer); + } + + return VK_SUCCESS; +} + +void radv_CmdBeginRenderPass( + VkCommandBuffer commandBuffer, + const VkRenderPassBeginInfo* pRenderPassBegin, + VkSubpassContents contents) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + RADV_FROM_HANDLE(radv_render_pass, pass, pRenderPassBegin->renderPass); + RADV_FROM_HANDLE(radv_framebuffer, framebuffer, pRenderPassBegin->framebuffer); + + MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, + cmd_buffer->cs, 2048); + + cmd_buffer->state.framebuffer = framebuffer; + cmd_buffer->state.pass = pass; + cmd_buffer->state.render_area = pRenderPassBegin->renderArea; + radv_cmd_state_setup_attachments(cmd_buffer, pass, pRenderPassBegin); + + si_emit_cache_flush(cmd_buffer); + + radv_cmd_buffer_set_subpass(cmd_buffer, pass->subpasses, true); + assert(cmd_buffer->cs->cdw <= cdw_max); + + radv_cmd_buffer_clear_subpass(cmd_buffer); +} + +void radv_CmdNextSubpass( + VkCommandBuffer commandBuffer, + VkSubpassContents contents) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + + si_emit_cache_flush(cmd_buffer); + radv_cmd_buffer_resolve_subpass(cmd_buffer); + + radeon_check_space(cmd_buffer->device->ws, cmd_buffer->cs, + 2048); + + radv_cmd_buffer_set_subpass(cmd_buffer, cmd_buffer->state.subpass + 1, true); + radv_cmd_buffer_clear_subpass(cmd_buffer); +} + +void radv_CmdDraw( + VkCommandBuffer commandBuffer, + uint32_t vertexCount, + uint32_t instanceCount, + uint32_t firstVertex, + uint32_t firstInstance) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + radv_cmd_buffer_flush_state(cmd_buffer); + + MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, cmd_buffer->cs, 9); + + struct ac_userdata_info *loc = radv_lookup_user_sgpr(cmd_buffer->state.pipeline, MESA_SHADER_VERTEX, + AC_UD_VS_BASE_VERTEX_START_INSTANCE); + if (loc->sgpr_idx != -1) { + radeon_set_sh_reg_seq(cmd_buffer->cs, R_00B130_SPI_SHADER_USER_DATA_VS_0 + loc->sgpr_idx * 4, 2); + radeon_emit(cmd_buffer->cs, firstVertex); + radeon_emit(cmd_buffer->cs, firstInstance); + } + radeon_emit(cmd_buffer->cs, PKT3(PKT3_NUM_INSTANCES, 0, 0)); + radeon_emit(cmd_buffer->cs, instanceCount); + + radeon_emit(cmd_buffer->cs, PKT3(PKT3_DRAW_INDEX_AUTO, 1, 0)); + radeon_emit(cmd_buffer->cs, vertexCount); + radeon_emit(cmd_buffer->cs, V_0287F0_DI_SRC_SEL_AUTO_INDEX | + S_0287F0_USE_OPAQUE(0)); + + assert(cmd_buffer->cs->cdw <= cdw_max); + + radv_cmd_buffer_trace_emit(cmd_buffer); +} + +static void radv_emit_primitive_reset_index(struct radv_cmd_buffer *cmd_buffer) +{ + uint32_t primitive_reset_index = cmd_buffer->state.index_type ? 0xffffffffu : 0xffffu; + + if (cmd_buffer->state.pipeline->graphics.prim_restart_enable && + primitive_reset_index != cmd_buffer->state.last_primitive_reset_index) { + cmd_buffer->state.last_primitive_reset_index = primitive_reset_index; + radeon_set_context_reg(cmd_buffer->cs, R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX, + primitive_reset_index); + } +} + +void radv_CmdDrawIndexed( + VkCommandBuffer commandBuffer, + uint32_t indexCount, + uint32_t instanceCount, + uint32_t firstIndex, + int32_t vertexOffset, + uint32_t firstInstance) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + int index_size = cmd_buffer->state.index_type ? 4 : 2; + uint32_t index_max_size = (cmd_buffer->state.index_buffer->size - cmd_buffer->state.index_offset) / index_size; + uint64_t index_va; + + radv_cmd_buffer_flush_state(cmd_buffer); + radv_emit_primitive_reset_index(cmd_buffer); + + MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, cmd_buffer->cs, 14); + + radeon_emit(cmd_buffer->cs, PKT3(PKT3_INDEX_TYPE, 0, 0)); + radeon_emit(cmd_buffer->cs, cmd_buffer->state.index_type); + + struct ac_userdata_info *loc = radv_lookup_user_sgpr(cmd_buffer->state.pipeline, MESA_SHADER_VERTEX, + AC_UD_VS_BASE_VERTEX_START_INSTANCE); + if (loc->sgpr_idx != -1) { + radeon_set_sh_reg_seq(cmd_buffer->cs, R_00B130_SPI_SHADER_USER_DATA_VS_0 + loc->sgpr_idx * 4, 2); + radeon_emit(cmd_buffer->cs, vertexOffset); + radeon_emit(cmd_buffer->cs, firstInstance); + } + radeon_emit(cmd_buffer->cs, PKT3(PKT3_NUM_INSTANCES, 0, 0)); + radeon_emit(cmd_buffer->cs, instanceCount); + + index_va = cmd_buffer->device->ws->buffer_get_va(cmd_buffer->state.index_buffer->bo); + index_va += firstIndex * index_size + cmd_buffer->state.index_buffer->offset + cmd_buffer->state.index_offset; + radeon_emit(cmd_buffer->cs, PKT3(PKT3_DRAW_INDEX_2, 4, false)); + radeon_emit(cmd_buffer->cs, index_max_size); + radeon_emit(cmd_buffer->cs, index_va); + radeon_emit(cmd_buffer->cs, (index_va >> 32UL) & 0xFF); + radeon_emit(cmd_buffer->cs, indexCount); + radeon_emit(cmd_buffer->cs, V_0287F0_DI_SRC_SEL_DMA); + + assert(cmd_buffer->cs->cdw <= cdw_max); + radv_cmd_buffer_trace_emit(cmd_buffer); +} + +static void +radv_emit_indirect_draw(struct radv_cmd_buffer *cmd_buffer, + VkBuffer _buffer, + VkDeviceSize offset, + VkBuffer _count_buffer, + VkDeviceSize count_offset, + uint32_t draw_count, + uint32_t stride, + bool indexed) +{ + RADV_FROM_HANDLE(radv_buffer, buffer, _buffer); + RADV_FROM_HANDLE(radv_buffer, count_buffer, _count_buffer); + struct radeon_winsys_cs *cs = cmd_buffer->cs; + unsigned di_src_sel = indexed ? V_0287F0_DI_SRC_SEL_DMA + : V_0287F0_DI_SRC_SEL_AUTO_INDEX; + uint64_t indirect_va = cmd_buffer->device->ws->buffer_get_va(buffer->bo); + indirect_va += offset + buffer->offset; + uint64_t count_va = 0; + + if (count_buffer) { + count_va = cmd_buffer->device->ws->buffer_get_va(count_buffer->bo); + count_va += count_offset + count_buffer->offset; + } + + if (!draw_count) + return; + + cmd_buffer->device->ws->cs_add_buffer(cs, buffer->bo, 8); + + struct ac_userdata_info *loc = radv_lookup_user_sgpr(cmd_buffer->state.pipeline, MESA_SHADER_VERTEX, + AC_UD_VS_BASE_VERTEX_START_INSTANCE); + assert(loc->sgpr_idx != -1); + radeon_emit(cs, PKT3(PKT3_SET_BASE, 2, 0)); + radeon_emit(cs, 1); + radeon_emit(cs, indirect_va); + radeon_emit(cs, indirect_va >> 32); + + radeon_emit(cs, PKT3(indexed ? PKT3_DRAW_INDEX_INDIRECT_MULTI : + PKT3_DRAW_INDIRECT_MULTI, + 8, false)); + radeon_emit(cs, 0); + radeon_emit(cs, ((R_00B130_SPI_SHADER_USER_DATA_VS_0 + loc->sgpr_idx * 4) - SI_SH_REG_OFFSET) >> 2); + radeon_emit(cs, ((R_00B130_SPI_SHADER_USER_DATA_VS_0 + (loc->sgpr_idx + 1) * 4) - SI_SH_REG_OFFSET) >> 2); + radeon_emit(cs, S_2C3_COUNT_INDIRECT_ENABLE(!!count_va)); /* draw_index and count_indirect enable */ + radeon_emit(cs, draw_count); /* count */ + radeon_emit(cs, count_va); /* count_addr */ + radeon_emit(cs, count_va >> 32); + radeon_emit(cs, stride); /* stride */ + radeon_emit(cs, di_src_sel); + radv_cmd_buffer_trace_emit(cmd_buffer); +} + +static void +radv_cmd_draw_indirect_count(VkCommandBuffer commandBuffer, + VkBuffer buffer, + VkDeviceSize offset, + VkBuffer countBuffer, + VkDeviceSize countBufferOffset, + uint32_t maxDrawCount, + uint32_t stride) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + radv_cmd_buffer_flush_state(cmd_buffer); + + MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, + cmd_buffer->cs, 14); + + radv_emit_indirect_draw(cmd_buffer, buffer, offset, + countBuffer, countBufferOffset, maxDrawCount, stride, false); + + assert(cmd_buffer->cs->cdw <= cdw_max); +} + +static void +radv_cmd_draw_indexed_indirect_count( + VkCommandBuffer commandBuffer, + VkBuffer buffer, + VkDeviceSize offset, + VkBuffer countBuffer, + VkDeviceSize countBufferOffset, + uint32_t maxDrawCount, + uint32_t stride) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + int index_size = cmd_buffer->state.index_type ? 4 : 2; + uint32_t index_max_size = (cmd_buffer->state.index_buffer->size - cmd_buffer->state.index_offset) / index_size; + uint64_t index_va; + radv_cmd_buffer_flush_state(cmd_buffer); + radv_emit_primitive_reset_index(cmd_buffer); + + index_va = cmd_buffer->device->ws->buffer_get_va(cmd_buffer->state.index_buffer->bo); + index_va += cmd_buffer->state.index_buffer->offset + cmd_buffer->state.index_offset; + + MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, cmd_buffer->cs, 21); + + radeon_emit(cmd_buffer->cs, PKT3(PKT3_INDEX_TYPE, 0, 0)); + radeon_emit(cmd_buffer->cs, cmd_buffer->state.index_type); + + radeon_emit(cmd_buffer->cs, PKT3(PKT3_INDEX_BASE, 1, 0)); + radeon_emit(cmd_buffer->cs, index_va); + radeon_emit(cmd_buffer->cs, index_va >> 32); + + radeon_emit(cmd_buffer->cs, PKT3(PKT3_INDEX_BUFFER_SIZE, 0, 0)); + radeon_emit(cmd_buffer->cs, index_max_size); + + radv_emit_indirect_draw(cmd_buffer, buffer, offset, + countBuffer, countBufferOffset, maxDrawCount, stride, true); + + assert(cmd_buffer->cs->cdw <= cdw_max); +} + +void radv_CmdDrawIndirect( + VkCommandBuffer commandBuffer, + VkBuffer buffer, + VkDeviceSize offset, + uint32_t drawCount, + uint32_t stride) +{ + radv_cmd_draw_indirect_count(commandBuffer, buffer, offset, + VK_NULL_HANDLE, 0, drawCount, stride); +} + +void radv_CmdDrawIndexedIndirect( + VkCommandBuffer commandBuffer, + VkBuffer buffer, + VkDeviceSize offset, + uint32_t drawCount, + uint32_t stride) +{ + radv_cmd_draw_indexed_indirect_count(commandBuffer, buffer, offset, + VK_NULL_HANDLE, 0, drawCount, stride); +} + +void radv_CmdDrawIndirectCountAMD( + VkCommandBuffer commandBuffer, + VkBuffer buffer, + VkDeviceSize offset, + VkBuffer countBuffer, + VkDeviceSize countBufferOffset, + uint32_t maxDrawCount, + uint32_t stride) +{ + radv_cmd_draw_indirect_count(commandBuffer, buffer, offset, + countBuffer, countBufferOffset, + maxDrawCount, stride); +} + +void radv_CmdDrawIndexedIndirectCountAMD( + VkCommandBuffer commandBuffer, + VkBuffer buffer, + VkDeviceSize offset, + VkBuffer countBuffer, + VkDeviceSize countBufferOffset, + uint32_t maxDrawCount, + uint32_t stride) +{ + radv_cmd_draw_indexed_indirect_count(commandBuffer, buffer, offset, + countBuffer, countBufferOffset, + maxDrawCount, stride); +} + +static void +radv_flush_compute_state(struct radv_cmd_buffer *cmd_buffer) +{ + radv_emit_compute_pipeline(cmd_buffer); + radv_flush_descriptors(cmd_buffer, cmd_buffer->state.compute_pipeline, + VK_SHADER_STAGE_COMPUTE_BIT); + radv_flush_constants(cmd_buffer, cmd_buffer->state.compute_pipeline, + VK_SHADER_STAGE_COMPUTE_BIT); + si_emit_cache_flush(cmd_buffer); +} + +void radv_CmdDispatch( + VkCommandBuffer commandBuffer, + uint32_t x, + uint32_t y, + uint32_t z) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + + radv_flush_compute_state(cmd_buffer); + + MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, cmd_buffer->cs, 10); + + struct ac_userdata_info *loc = radv_lookup_user_sgpr(cmd_buffer->state.compute_pipeline, + MESA_SHADER_COMPUTE, AC_UD_CS_GRID_SIZE); + if (loc->sgpr_idx != -1) { + assert(!loc->indirect); + assert(loc->num_sgprs == 3); + radeon_set_sh_reg_seq(cmd_buffer->cs, R_00B900_COMPUTE_USER_DATA_0 + loc->sgpr_idx * 4, 3); + radeon_emit(cmd_buffer->cs, x); + radeon_emit(cmd_buffer->cs, y); + radeon_emit(cmd_buffer->cs, z); + } + + radeon_emit(cmd_buffer->cs, PKT3(PKT3_DISPATCH_DIRECT, 3, 0) | + PKT3_SHADER_TYPE_S(1)); + radeon_emit(cmd_buffer->cs, x); + radeon_emit(cmd_buffer->cs, y); + radeon_emit(cmd_buffer->cs, z); + radeon_emit(cmd_buffer->cs, 1); + + assert(cmd_buffer->cs->cdw <= cdw_max); + radv_cmd_buffer_trace_emit(cmd_buffer); +} + +void radv_CmdDispatchIndirect( + VkCommandBuffer commandBuffer, + VkBuffer _buffer, + VkDeviceSize offset) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + RADV_FROM_HANDLE(radv_buffer, buffer, _buffer); + uint64_t va = cmd_buffer->device->ws->buffer_get_va(buffer->bo); + va += buffer->offset + offset; + + cmd_buffer->device->ws->cs_add_buffer(cmd_buffer->cs, buffer->bo, 8); + + radv_flush_compute_state(cmd_buffer); + + MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, cmd_buffer->cs, 25); + struct ac_userdata_info *loc = radv_lookup_user_sgpr(cmd_buffer->state.compute_pipeline, + MESA_SHADER_COMPUTE, AC_UD_CS_GRID_SIZE); + if (loc->sgpr_idx != -1) { + for (unsigned i = 0; i < 3; ++i) { + radeon_emit(cmd_buffer->cs, PKT3(PKT3_COPY_DATA, 4, 0)); + radeon_emit(cmd_buffer->cs, COPY_DATA_SRC_SEL(COPY_DATA_MEM) | + COPY_DATA_DST_SEL(COPY_DATA_REG)); + radeon_emit(cmd_buffer->cs, (va + 4 * i)); + radeon_emit(cmd_buffer->cs, (va + 4 * i) >> 32); + radeon_emit(cmd_buffer->cs, ((R_00B900_COMPUTE_USER_DATA_0 + loc->sgpr_idx * 4) >> 2) + i); + radeon_emit(cmd_buffer->cs, 0); + } + } + + if (radv_cmd_buffer_uses_mec(cmd_buffer)) { + radeon_emit(cmd_buffer->cs, PKT3(PKT3_DISPATCH_INDIRECT, 2, 0) | + PKT3_SHADER_TYPE_S(1)); + radeon_emit(cmd_buffer->cs, va); + radeon_emit(cmd_buffer->cs, va >> 32); + radeon_emit(cmd_buffer->cs, 1); + } else { + radeon_emit(cmd_buffer->cs, PKT3(PKT3_SET_BASE, 2, 0) | + PKT3_SHADER_TYPE_S(1)); + radeon_emit(cmd_buffer->cs, 1); + radeon_emit(cmd_buffer->cs, va); + radeon_emit(cmd_buffer->cs, va >> 32); + + radeon_emit(cmd_buffer->cs, PKT3(PKT3_DISPATCH_INDIRECT, 1, 0) | + PKT3_SHADER_TYPE_S(1)); + radeon_emit(cmd_buffer->cs, 0); + radeon_emit(cmd_buffer->cs, 1); + } + + assert(cmd_buffer->cs->cdw <= cdw_max); + radv_cmd_buffer_trace_emit(cmd_buffer); +} + +void radv_unaligned_dispatch( + struct radv_cmd_buffer *cmd_buffer, + uint32_t x, + uint32_t y, + uint32_t z) +{ + struct radv_pipeline *pipeline = cmd_buffer->state.compute_pipeline; + struct radv_shader_variant *compute_shader = pipeline->shaders[MESA_SHADER_COMPUTE]; + uint32_t blocks[3], remainder[3]; + + blocks[0] = round_up_u32(x, compute_shader->info.cs.block_size[0]); + blocks[1] = round_up_u32(y, compute_shader->info.cs.block_size[1]); + blocks[2] = round_up_u32(z, compute_shader->info.cs.block_size[2]); + + /* If aligned, these should be an entire block size, not 0 */ + remainder[0] = x + compute_shader->info.cs.block_size[0] - align_u32_npot(x, compute_shader->info.cs.block_size[0]); + remainder[1] = y + compute_shader->info.cs.block_size[1] - align_u32_npot(y, compute_shader->info.cs.block_size[1]); + remainder[2] = z + compute_shader->info.cs.block_size[2] - align_u32_npot(z, compute_shader->info.cs.block_size[2]); + + radv_flush_compute_state(cmd_buffer); + + MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, cmd_buffer->cs, 15); + + radeon_set_sh_reg_seq(cmd_buffer->cs, R_00B81C_COMPUTE_NUM_THREAD_X, 3); + radeon_emit(cmd_buffer->cs, + S_00B81C_NUM_THREAD_FULL(compute_shader->info.cs.block_size[0]) | + S_00B81C_NUM_THREAD_PARTIAL(remainder[0])); + radeon_emit(cmd_buffer->cs, + S_00B81C_NUM_THREAD_FULL(compute_shader->info.cs.block_size[1]) | + S_00B81C_NUM_THREAD_PARTIAL(remainder[1])); + radeon_emit(cmd_buffer->cs, + S_00B81C_NUM_THREAD_FULL(compute_shader->info.cs.block_size[2]) | + S_00B81C_NUM_THREAD_PARTIAL(remainder[2])); + + struct ac_userdata_info *loc = radv_lookup_user_sgpr(cmd_buffer->state.compute_pipeline, + MESA_SHADER_COMPUTE, AC_UD_CS_GRID_SIZE); + if (loc->sgpr_idx != -1) { + radeon_set_sh_reg_seq(cmd_buffer->cs, R_00B900_COMPUTE_USER_DATA_0 + loc->sgpr_idx * 4, 3); + radeon_emit(cmd_buffer->cs, blocks[0]); + radeon_emit(cmd_buffer->cs, blocks[1]); + radeon_emit(cmd_buffer->cs, blocks[2]); + } + radeon_emit(cmd_buffer->cs, PKT3(PKT3_DISPATCH_DIRECT, 3, 0) | + PKT3_SHADER_TYPE_S(1)); + radeon_emit(cmd_buffer->cs, blocks[0]); + radeon_emit(cmd_buffer->cs, blocks[1]); + radeon_emit(cmd_buffer->cs, blocks[2]); + radeon_emit(cmd_buffer->cs, S_00B800_COMPUTE_SHADER_EN(1) | + S_00B800_PARTIAL_TG_EN(1)); + + assert(cmd_buffer->cs->cdw <= cdw_max); + radv_cmd_buffer_trace_emit(cmd_buffer); +} + +void radv_CmdEndRenderPass( + VkCommandBuffer commandBuffer) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + + radv_subpass_barrier(cmd_buffer, &cmd_buffer->state.pass->end_barrier); + + si_emit_cache_flush(cmd_buffer); + radv_cmd_buffer_resolve_subpass(cmd_buffer); + + for (unsigned i = 0; i < cmd_buffer->state.framebuffer->attachment_count; ++i) { + VkImageLayout layout = cmd_buffer->state.pass->attachments[i].final_layout; + radv_handle_subpass_image_transition(cmd_buffer, + (VkAttachmentReference){i, layout}); + } + + vk_free(&cmd_buffer->pool->alloc, cmd_buffer->state.attachments); + + cmd_buffer->state.pass = NULL; + cmd_buffer->state.subpass = NULL; + cmd_buffer->state.attachments = NULL; + cmd_buffer->state.framebuffer = NULL; +} + + +static void radv_initialize_htile(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *image) +{ + + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_DB | + RADV_CMD_FLAG_FLUSH_AND_INV_DB_META; + + radv_fill_buffer(cmd_buffer, image->bo, image->offset + image->htile.offset, + image->htile.size, 0xffffffff); + + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_DB_META | + RADV_CMD_FLAG_CS_PARTIAL_FLUSH | + RADV_CMD_FLAG_INV_VMEM_L1 | + RADV_CMD_FLAG_INV_GLOBAL_L2; +} + +static void radv_handle_depth_image_transition(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *image, + VkImageLayout src_layout, + VkImageLayout dst_layout, + VkImageSubresourceRange range, + VkImageAspectFlags pending_clears) +{ + if (dst_layout == VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL && + (pending_clears & vk_format_aspects(image->vk_format)) == vk_format_aspects(image->vk_format) && + cmd_buffer->state.render_area.offset.x == 0 && cmd_buffer->state.render_area.offset.y == 0 && + cmd_buffer->state.render_area.extent.width == image->extent.width && + cmd_buffer->state.render_area.extent.height == image->extent.height) { + /* The clear will initialize htile. */ + return; + } else if (src_layout == VK_IMAGE_LAYOUT_UNDEFINED && + radv_layout_has_htile(image, dst_layout)) { + /* TODO: merge with the clear if applicable */ + radv_initialize_htile(cmd_buffer, image); + } else if (!radv_layout_has_htile(image, src_layout) && + radv_layout_has_htile(image, dst_layout)) { + radv_initialize_htile(cmd_buffer, image); + } else if ((radv_layout_has_htile(image, src_layout) && + !radv_layout_has_htile(image, dst_layout)) || + (radv_layout_is_htile_compressed(image, src_layout) && + !radv_layout_is_htile_compressed(image, dst_layout))) { + + range.aspectMask = VK_IMAGE_ASPECT_DEPTH_BIT; + range.baseMipLevel = 0; + range.levelCount = 1; + + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_DB | + RADV_CMD_FLAG_FLUSH_AND_INV_DB_META; + + radv_decompress_depth_image_inplace(cmd_buffer, image, &range); + + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_DB | + RADV_CMD_FLAG_FLUSH_AND_INV_DB_META; + } +} + +void radv_initialise_cmask(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *image, uint32_t value) +{ + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB | + RADV_CMD_FLAG_FLUSH_AND_INV_CB_META; + + radv_fill_buffer(cmd_buffer, image->bo, image->offset + image->cmask.offset, + image->cmask.size, value); + + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB_META | + RADV_CMD_FLAG_CS_PARTIAL_FLUSH | + RADV_CMD_FLAG_INV_VMEM_L1 | + RADV_CMD_FLAG_INV_GLOBAL_L2; +} + +static void radv_handle_cmask_image_transition(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *image, + VkImageLayout src_layout, + VkImageLayout dst_layout, + unsigned src_queue_mask, + unsigned dst_queue_mask, + VkImageSubresourceRange range, + VkImageAspectFlags pending_clears) +{ + if (src_layout == VK_IMAGE_LAYOUT_UNDEFINED) { + if (image->fmask.size) + radv_initialise_cmask(cmd_buffer, image, 0xccccccccu); + else + radv_initialise_cmask(cmd_buffer, image, 0xffffffffu); + } else if (radv_layout_can_fast_clear(image, src_layout, src_queue_mask) && + !radv_layout_can_fast_clear(image, dst_layout, dst_queue_mask)) { + radv_fast_clear_flush_image_inplace(cmd_buffer, image); + } +} + +void radv_initialize_dcc(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *image, uint32_t value) +{ + + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB | + RADV_CMD_FLAG_FLUSH_AND_INV_CB_META; + + radv_fill_buffer(cmd_buffer, image->bo, image->offset + image->dcc_offset, + image->surface.dcc_size, value); + + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB | + RADV_CMD_FLAG_FLUSH_AND_INV_CB_META | + RADV_CMD_FLAG_CS_PARTIAL_FLUSH | + RADV_CMD_FLAG_INV_VMEM_L1 | + RADV_CMD_FLAG_INV_GLOBAL_L2; +} + +static void radv_handle_dcc_image_transition(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *image, + VkImageLayout src_layout, + VkImageLayout dst_layout, + unsigned src_queue_mask, + unsigned dst_queue_mask, + VkImageSubresourceRange range, + VkImageAspectFlags pending_clears) +{ + if (src_layout == VK_IMAGE_LAYOUT_UNDEFINED) { + radv_initialize_dcc(cmd_buffer, image, 0x20202020u); + } else if (radv_layout_can_fast_clear(image, src_layout, src_queue_mask) && + !radv_layout_can_fast_clear(image, dst_layout, dst_queue_mask)) { + radv_fast_clear_flush_image_inplace(cmd_buffer, image); + } +} + +static void radv_handle_image_transition(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *image, + VkImageLayout src_layout, + VkImageLayout dst_layout, + int src_family, + int dst_family, + VkImageSubresourceRange range, + VkImageAspectFlags pending_clears) +{ + if (image->exclusive && src_family != dst_family) { + /* This is an acquire or a release operation and there will be + * a corresponding release/acquire. Do the transition in the + * most flexible queue. */ + + assert(src_family == cmd_buffer->queue_family_index || + dst_family == cmd_buffer->queue_family_index); + + if (cmd_buffer->queue_family_index == RADV_QUEUE_TRANSFER) + return; + + if (cmd_buffer->queue_family_index == RADV_QUEUE_COMPUTE && + (src_family == RADV_QUEUE_GENERAL || + dst_family == RADV_QUEUE_GENERAL)) + return; + } + + unsigned src_queue_mask = radv_image_queue_family_mask(image, src_family); + unsigned dst_queue_mask = radv_image_queue_family_mask(image, dst_family); + + if (image->htile.size) + radv_handle_depth_image_transition(cmd_buffer, image, src_layout, + dst_layout, range, pending_clears); + + if (image->cmask.size) + radv_handle_cmask_image_transition(cmd_buffer, image, src_layout, + dst_layout, src_queue_mask, + dst_queue_mask, range, + pending_clears); + + if (image->surface.dcc_size) + radv_handle_dcc_image_transition(cmd_buffer, image, src_layout, + dst_layout, src_queue_mask, + dst_queue_mask, range, + pending_clears); +} + +void radv_CmdPipelineBarrier( + VkCommandBuffer commandBuffer, + VkPipelineStageFlags srcStageMask, + VkPipelineStageFlags destStageMask, + VkBool32 byRegion, + uint32_t memoryBarrierCount, + const VkMemoryBarrier* pMemoryBarriers, + uint32_t bufferMemoryBarrierCount, + const VkBufferMemoryBarrier* pBufferMemoryBarriers, + uint32_t imageMemoryBarrierCount, + const VkImageMemoryBarrier* pImageMemoryBarriers) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + VkAccessFlags src_flags = 0; + VkAccessFlags dst_flags = 0; + uint32_t b; + for (uint32_t i = 0; i < memoryBarrierCount; i++) { + src_flags |= pMemoryBarriers[i].srcAccessMask; + dst_flags |= pMemoryBarriers[i].dstAccessMask; + } + + for (uint32_t i = 0; i < bufferMemoryBarrierCount; i++) { + src_flags |= pBufferMemoryBarriers[i].srcAccessMask; + dst_flags |= pBufferMemoryBarriers[i].dstAccessMask; + } + + for (uint32_t i = 0; i < imageMemoryBarrierCount; i++) { + src_flags |= pImageMemoryBarriers[i].srcAccessMask; + dst_flags |= pImageMemoryBarriers[i].dstAccessMask; + } + + enum radv_cmd_flush_bits flush_bits = 0; + for_each_bit(b, src_flags) { + switch ((VkAccessFlagBits)(1 << b)) { + case VK_ACCESS_SHADER_WRITE_BIT: + flush_bits |= RADV_CMD_FLAG_INV_GLOBAL_L2; + break; + case VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT: + flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB; + break; + case VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT: + flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_DB; + break; + case VK_ACCESS_TRANSFER_WRITE_BIT: + flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB | + RADV_CMD_FLAG_INV_GLOBAL_L2; + break; + default: + break; + } + } + cmd_buffer->state.flush_bits |= flush_bits; + + for (uint32_t i = 0; i < imageMemoryBarrierCount; i++) { + RADV_FROM_HANDLE(radv_image, image, pImageMemoryBarriers[i].image); + radv_handle_image_transition(cmd_buffer, image, + pImageMemoryBarriers[i].oldLayout, + pImageMemoryBarriers[i].newLayout, + pImageMemoryBarriers[i].srcQueueFamilyIndex, + pImageMemoryBarriers[i].dstQueueFamilyIndex, + pImageMemoryBarriers[i].subresourceRange, + 0); + } + + flush_bits = 0; + + for_each_bit(b, dst_flags) { + switch ((VkAccessFlagBits)(1 << b)) { + case VK_ACCESS_INDIRECT_COMMAND_READ_BIT: + case VK_ACCESS_INDEX_READ_BIT: + case VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT: + flush_bits |= RADV_CMD_FLAG_INV_VMEM_L1; + break; + case VK_ACCESS_UNIFORM_READ_BIT: + flush_bits |= RADV_CMD_FLAG_INV_VMEM_L1 | RADV_CMD_FLAG_INV_SMEM_L1; + break; + case VK_ACCESS_SHADER_READ_BIT: + flush_bits |= RADV_CMD_FLAG_INV_GLOBAL_L2; + break; + case VK_ACCESS_COLOR_ATTACHMENT_READ_BIT: + case VK_ACCESS_TRANSFER_READ_BIT: + case VK_ACCESS_TRANSFER_WRITE_BIT: + case VK_ACCESS_INPUT_ATTACHMENT_READ_BIT: + flush_bits |= RADV_CMD_FLUSH_AND_INV_FRAMEBUFFER | RADV_CMD_FLAG_INV_GLOBAL_L2; + default: + break; + } + } + + flush_bits |= RADV_CMD_FLAG_CS_PARTIAL_FLUSH | + RADV_CMD_FLAG_PS_PARTIAL_FLUSH; + + cmd_buffer->state.flush_bits |= flush_bits; +} + + +static void write_event(struct radv_cmd_buffer *cmd_buffer, + struct radv_event *event, + VkPipelineStageFlags stageMask, + unsigned value) +{ + struct radeon_winsys_cs *cs = cmd_buffer->cs; + uint64_t va = cmd_buffer->device->ws->buffer_get_va(event->bo); + + cmd_buffer->device->ws->cs_add_buffer(cs, event->bo, 8); + + MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, cs, 12); + + /* TODO: this is overkill. Probably should figure something out from + * the stage mask. */ + + if (cmd_buffer->device->physical_device->rad_info.chip_class == CIK) { + radeon_emit(cs, PKT3(PKT3_EVENT_WRITE_EOP, 4, 0)); + radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_BOTTOM_OF_PIPE_TS) | + EVENT_INDEX(5)); + radeon_emit(cs, va); + radeon_emit(cs, (va >> 32) | EOP_DATA_SEL(1)); + radeon_emit(cs, 2); + radeon_emit(cs, 0); + } + + radeon_emit(cs, PKT3(PKT3_EVENT_WRITE_EOP, 4, 0)); + radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_BOTTOM_OF_PIPE_TS) | + EVENT_INDEX(5)); + radeon_emit(cs, va); + radeon_emit(cs, (va >> 32) | EOP_DATA_SEL(1)); + radeon_emit(cs, value); + radeon_emit(cs, 0); + + assert(cmd_buffer->cs->cdw <= cdw_max); +} + +void radv_CmdSetEvent(VkCommandBuffer commandBuffer, + VkEvent _event, + VkPipelineStageFlags stageMask) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + RADV_FROM_HANDLE(radv_event, event, _event); + + write_event(cmd_buffer, event, stageMask, 1); +} + +void radv_CmdResetEvent(VkCommandBuffer commandBuffer, + VkEvent _event, + VkPipelineStageFlags stageMask) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + RADV_FROM_HANDLE(radv_event, event, _event); + + write_event(cmd_buffer, event, stageMask, 0); +} + +void radv_CmdWaitEvents(VkCommandBuffer commandBuffer, + uint32_t eventCount, + const VkEvent* pEvents, + VkPipelineStageFlags srcStageMask, + VkPipelineStageFlags dstStageMask, + uint32_t memoryBarrierCount, + const VkMemoryBarrier* pMemoryBarriers, + uint32_t bufferMemoryBarrierCount, + const VkBufferMemoryBarrier* pBufferMemoryBarriers, + uint32_t imageMemoryBarrierCount, + const VkImageMemoryBarrier* pImageMemoryBarriers) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + struct radeon_winsys_cs *cs = cmd_buffer->cs; + + for (unsigned i = 0; i < eventCount; ++i) { + RADV_FROM_HANDLE(radv_event, event, pEvents[i]); + uint64_t va = cmd_buffer->device->ws->buffer_get_va(event->bo); + + cmd_buffer->device->ws->cs_add_buffer(cs, event->bo, 8); + + MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, cs, 7); + + radeon_emit(cs, PKT3(PKT3_WAIT_REG_MEM, 5, 0)); + radeon_emit(cs, WAIT_REG_MEM_EQUAL | WAIT_REG_MEM_MEM_SPACE(1)); + radeon_emit(cs, va); + radeon_emit(cs, va >> 32); + radeon_emit(cs, 1); /* reference value */ + radeon_emit(cs, 0xffffffff); /* mask */ + radeon_emit(cs, 4); /* poll interval */ + + assert(cmd_buffer->cs->cdw <= cdw_max); + } + + + for (uint32_t i = 0; i < imageMemoryBarrierCount; i++) { + RADV_FROM_HANDLE(radv_image, image, pImageMemoryBarriers[i].image); + + radv_handle_image_transition(cmd_buffer, image, + pImageMemoryBarriers[i].oldLayout, + pImageMemoryBarriers[i].newLayout, + pImageMemoryBarriers[i].srcQueueFamilyIndex, + pImageMemoryBarriers[i].dstQueueFamilyIndex, + pImageMemoryBarriers[i].subresourceRange, + 0); + } + + /* TODO: figure out how to do memory barriers without waiting */ + cmd_buffer->state.flush_bits |= RADV_CMD_FLUSH_AND_INV_FRAMEBUFFER | + RADV_CMD_FLAG_INV_GLOBAL_L2 | + RADV_CMD_FLAG_INV_VMEM_L1 | + RADV_CMD_FLAG_INV_SMEM_L1; +} diff -Nru mesa-12.0.6/src/amd/vulkan/radv_cs.h mesa-17.0.7/src/amd/vulkan/radv_cs.h --- mesa-12.0.6/src/amd/vulkan/radv_cs.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_cs.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,121 @@ +/* + * Copyright © 2016 Red Hat. + * Copyright © 2016 Bas Nieuwenhuizen + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef RADV_CS_H +#define RADV_CS_H + +#include +#include +#include +#include "r600d_common.h" + +static inline unsigned radeon_check_space(struct radeon_winsys *ws, + struct radeon_winsys_cs *cs, + unsigned needed) +{ + if (cs->max_dw - cs->cdw < needed) + ws->cs_grow(cs, needed); + return cs->cdw + needed; +} + +static inline void radeon_set_config_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num) +{ + assert(reg < R600_CONTEXT_REG_OFFSET); + assert(cs->cdw + 2 + num <= cs->max_dw); + radeon_emit(cs, PKT3(PKT3_SET_CONFIG_REG, num, 0)); + radeon_emit(cs, (reg - R600_CONFIG_REG_OFFSET) >> 2); +} + +static inline void radeon_set_config_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) +{ + radeon_set_config_reg_seq(cs, reg, 1); + radeon_emit(cs, value); +} + +static inline void radeon_set_context_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num) +{ + assert(reg >= R600_CONTEXT_REG_OFFSET); + assert(cs->cdw + 2 + num <= cs->max_dw); + radeon_emit(cs, PKT3(PKT3_SET_CONTEXT_REG, num, 0)); + radeon_emit(cs, (reg - R600_CONTEXT_REG_OFFSET) >> 2); +} + +static inline void radeon_set_context_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) +{ + radeon_set_context_reg_seq(cs, reg, 1); + radeon_emit(cs, value); +} + + +static inline void radeon_set_context_reg_idx(struct radeon_winsys_cs *cs, + unsigned reg, unsigned idx, + unsigned value) +{ + assert(reg >= R600_CONTEXT_REG_OFFSET); + assert(cs->cdw + 3 <= cs->max_dw); + radeon_emit(cs, PKT3(PKT3_SET_CONTEXT_REG, 1, 0)); + radeon_emit(cs, (reg - R600_CONTEXT_REG_OFFSET) >> 2 | (idx << 28)); + radeon_emit(cs, value); +} + +static inline void radeon_set_sh_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num) +{ + assert(reg >= SI_SH_REG_OFFSET && reg < SI_SH_REG_END); + assert(cs->cdw + 2 + num <= cs->max_dw); + radeon_emit(cs, PKT3(PKT3_SET_SH_REG, num, 0)); + radeon_emit(cs, (reg - SI_SH_REG_OFFSET) >> 2); +} + +static inline void radeon_set_sh_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) +{ + radeon_set_sh_reg_seq(cs, reg, 1); + radeon_emit(cs, value); +} + +static inline void radeon_set_uconfig_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num) +{ + assert(reg >= CIK_UCONFIG_REG_OFFSET && reg < CIK_UCONFIG_REG_END); + assert(cs->cdw + 2 + num <= cs->max_dw); + radeon_emit(cs, PKT3(PKT3_SET_UCONFIG_REG, num, 0)); + radeon_emit(cs, (reg - CIK_UCONFIG_REG_OFFSET) >> 2); +} + +static inline void radeon_set_uconfig_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) +{ + radeon_set_uconfig_reg_seq(cs, reg, 1); + radeon_emit(cs, value); +} + +static inline void radeon_set_uconfig_reg_idx(struct radeon_winsys_cs *cs, + unsigned reg, unsigned idx, + unsigned value) +{ + assert(reg >= CIK_UCONFIG_REG_OFFSET && reg < CIK_UCONFIG_REG_END); + assert(cs->cdw + 3 <= cs->max_dw); + radeon_emit(cs, PKT3(PKT3_SET_UCONFIG_REG, 1, 0)); + radeon_emit(cs, (reg - CIK_UCONFIG_REG_OFFSET) >> 2 | (idx << 28)); + radeon_emit(cs, value); +} + +#endif /* RADV_CS_H */ diff -Nru mesa-12.0.6/src/amd/vulkan/radv_descriptor_set.c mesa-17.0.7/src/amd/vulkan/radv_descriptor_set.c --- mesa-12.0.6/src/amd/vulkan/radv_descriptor_set.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_descriptor_set.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,720 @@ +/* + * Copyright © 2016 Red Hat. + * Copyright © 2016 Bas Nieuwenhuizen + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ +#include +#include +#include +#include +#include + +#include "util/mesa-sha1.h" +#include "radv_private.h" +#include "sid.h" + +VkResult radv_CreateDescriptorSetLayout( + VkDevice _device, + const VkDescriptorSetLayoutCreateInfo* pCreateInfo, + const VkAllocationCallbacks* pAllocator, + VkDescriptorSetLayout* pSetLayout) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + struct radv_descriptor_set_layout *set_layout; + + assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO); + + uint32_t max_binding = 0; + uint32_t immutable_sampler_count = 0; + for (uint32_t j = 0; j < pCreateInfo->bindingCount; j++) { + max_binding = MAX2(max_binding, pCreateInfo->pBindings[j].binding); + if (pCreateInfo->pBindings[j].pImmutableSamplers) + immutable_sampler_count += pCreateInfo->pBindings[j].descriptorCount; + } + + size_t size = sizeof(struct radv_descriptor_set_layout) + + (max_binding + 1) * sizeof(set_layout->binding[0]) + + immutable_sampler_count * sizeof(struct radv_sampler *); + + set_layout = vk_alloc2(&device->alloc, pAllocator, size, 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (!set_layout) + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + + /* We just allocate all the samplers at the end of the struct */ + struct radv_sampler **samplers = + (struct radv_sampler **)&set_layout->binding[max_binding + 1]; + + set_layout->binding_count = max_binding + 1; + set_layout->shader_stages = 0; + set_layout->size = 0; + + memset(set_layout->binding, 0, size - sizeof(struct radv_descriptor_set_layout)); + + uint32_t buffer_count = 0; + uint32_t dynamic_offset_count = 0; + + for (uint32_t j = 0; j < pCreateInfo->bindingCount; j++) { + const VkDescriptorSetLayoutBinding *binding = &pCreateInfo->pBindings[j]; + uint32_t b = binding->binding; + uint32_t alignment; + + switch (binding->descriptorType) { + case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC: + case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC: + set_layout->binding[b].dynamic_offset_count = 1; + set_layout->dynamic_shader_stages |= binding->stageFlags; + set_layout->binding[b].size = 0; + set_layout->binding[b].buffer_count = 1; + alignment = 1; + break; + case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER: + case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER: + case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER: + case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER: + set_layout->binding[b].size = 16; + set_layout->binding[b].buffer_count = 1; + alignment = 16; + break; + case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE: + case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE: + case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT: + /* main descriptor + fmask descriptor */ + set_layout->binding[b].size = 64; + set_layout->binding[b].buffer_count = 1; + alignment = 32; + break; + case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER: + /* main descriptor + fmask descriptor + sampler */ + set_layout->binding[b].size = 96; + set_layout->binding[b].buffer_count = 1; + alignment = 32; + break; + case VK_DESCRIPTOR_TYPE_SAMPLER: + set_layout->binding[b].size = 16; + alignment = 16; + break; + default: + unreachable("unknown descriptor type\n"); + break; + } + + set_layout->size = align(set_layout->size, alignment); + assert(binding->descriptorCount > 0); + set_layout->binding[b].type = binding->descriptorType; + set_layout->binding[b].array_size = binding->descriptorCount; + set_layout->binding[b].offset = set_layout->size; + set_layout->binding[b].buffer_offset = buffer_count; + set_layout->binding[b].dynamic_offset_offset = dynamic_offset_count; + + set_layout->size += binding->descriptorCount * set_layout->binding[b].size; + buffer_count += binding->descriptorCount * set_layout->binding[b].buffer_count; + dynamic_offset_count += binding->descriptorCount * + set_layout->binding[b].dynamic_offset_count; + + + if (binding->pImmutableSamplers) { + set_layout->binding[b].immutable_samplers = samplers; + samplers += binding->descriptorCount; + + for (uint32_t i = 0; i < binding->descriptorCount; i++) + set_layout->binding[b].immutable_samplers[i] = + radv_sampler_from_handle(binding->pImmutableSamplers[i]); + } else { + set_layout->binding[b].immutable_samplers = NULL; + } + + set_layout->shader_stages |= binding->stageFlags; + } + + set_layout->buffer_count = buffer_count; + set_layout->dynamic_offset_count = dynamic_offset_count; + + *pSetLayout = radv_descriptor_set_layout_to_handle(set_layout); + + return VK_SUCCESS; +} + +void radv_DestroyDescriptorSetLayout( + VkDevice _device, + VkDescriptorSetLayout _set_layout, + const VkAllocationCallbacks* pAllocator) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_descriptor_set_layout, set_layout, _set_layout); + + if (!set_layout) + return; + + vk_free2(&device->alloc, pAllocator, set_layout); +} + +/* + * Pipeline layouts. These have nothing to do with the pipeline. They are + * just muttiple descriptor set layouts pasted together + */ + +VkResult radv_CreatePipelineLayout( + VkDevice _device, + const VkPipelineLayoutCreateInfo* pCreateInfo, + const VkAllocationCallbacks* pAllocator, + VkPipelineLayout* pPipelineLayout) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + struct radv_pipeline_layout *layout; + struct mesa_sha1 *ctx; + + assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO); + + layout = vk_alloc2(&device->alloc, pAllocator, sizeof(*layout), 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (layout == NULL) + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + + layout->num_sets = pCreateInfo->setLayoutCount; + + unsigned dynamic_offset_count = 0; + + + ctx = _mesa_sha1_init(); + for (uint32_t set = 0; set < pCreateInfo->setLayoutCount; set++) { + RADV_FROM_HANDLE(radv_descriptor_set_layout, set_layout, + pCreateInfo->pSetLayouts[set]); + layout->set[set].layout = set_layout; + + layout->set[set].dynamic_offset_start = dynamic_offset_count; + for (uint32_t b = 0; b < set_layout->binding_count; b++) { + dynamic_offset_count += set_layout->binding[b].array_size * set_layout->binding[b].dynamic_offset_count; + } + _mesa_sha1_update(ctx, set_layout->binding, + sizeof(set_layout->binding[0]) * set_layout->binding_count); + } + + layout->dynamic_offset_count = dynamic_offset_count; + layout->push_constant_size = 0; + for (unsigned i = 0; i < pCreateInfo->pushConstantRangeCount; ++i) { + const VkPushConstantRange *range = pCreateInfo->pPushConstantRanges + i; + layout->push_constant_size = MAX2(layout->push_constant_size, + range->offset + range->size); + } + + layout->push_constant_size = align(layout->push_constant_size, 16); + _mesa_sha1_update(ctx, &layout->push_constant_size, + sizeof(layout->push_constant_size)); + _mesa_sha1_final(ctx, layout->sha1); + *pPipelineLayout = radv_pipeline_layout_to_handle(layout); + + return VK_SUCCESS; +} + +void radv_DestroyPipelineLayout( + VkDevice _device, + VkPipelineLayout _pipelineLayout, + const VkAllocationCallbacks* pAllocator) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_pipeline_layout, pipeline_layout, _pipelineLayout); + + if (!pipeline_layout) + return; + vk_free2(&device->alloc, pAllocator, pipeline_layout); +} + +#define EMPTY 1 + +static VkResult +radv_descriptor_set_create(struct radv_device *device, + struct radv_descriptor_pool *pool, + struct radv_cmd_buffer *cmd_buffer, + const struct radv_descriptor_set_layout *layout, + struct radv_descriptor_set **out_set) +{ + struct radv_descriptor_set *set; + unsigned mem_size = sizeof(struct radv_descriptor_set) + + sizeof(struct radeon_winsys_bo *) * layout->buffer_count; + set = vk_alloc2(&device->alloc, NULL, mem_size, 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + + if (!set) + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + + memset(set, 0, mem_size); + + if (layout->dynamic_offset_count) { + unsigned size = sizeof(struct radv_descriptor_range) * + layout->dynamic_offset_count; + set->dynamic_descriptors = vk_alloc2(&device->alloc, NULL, size, 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + + if (!set->dynamic_descriptors) { + vk_free2(&device->alloc, NULL, set); + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + } + } + + set->layout = layout; + if (layout->size) { + uint32_t layout_size = align_u32(layout->size, 32); + set->size = layout->size; + if (!cmd_buffer) { + if (pool->current_offset + layout_size <= pool->size && + pool->allocated_sets < pool->max_sets) { + set->bo = pool->bo; + set->mapped_ptr = (uint32_t*)(pool->mapped_ptr + pool->current_offset); + set->va = device->ws->buffer_get_va(set->bo) + pool->current_offset; + pool->current_offset += layout_size; + ++pool->allocated_sets; + } else { + int entry = pool->free_list, prev_entry = -1; + uint32_t offset; + while (entry >= 0) { + if (pool->free_nodes[entry].size >= layout_size) { + if (prev_entry >= 0) + pool->free_nodes[prev_entry].next = pool->free_nodes[entry].next; + else + pool->free_list = pool->free_nodes[entry].next; + break; + } + prev_entry = entry; + entry = pool->free_nodes[entry].next; + } + + if (entry < 0) { + vk_free2(&device->alloc, NULL, set); + return vk_error(VK_ERROR_OUT_OF_DEVICE_MEMORY); + } + offset = pool->free_nodes[entry].offset; + pool->free_nodes[entry].next = pool->full_list; + pool->full_list = entry; + + set->bo = pool->bo; + set->mapped_ptr = (uint32_t*)(pool->mapped_ptr + offset); + set->va = device->ws->buffer_get_va(set->bo) + offset; + } + } else { + unsigned bo_offset; + if (!radv_cmd_buffer_upload_alloc(cmd_buffer, set->size, 32, + &bo_offset, + (void**)&set->mapped_ptr)) { + vk_free2(&device->alloc, NULL, set->dynamic_descriptors); + vk_free2(&device->alloc, NULL, set); + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + } + + set->va = device->ws->buffer_get_va(cmd_buffer->upload.upload_bo); + set->va += bo_offset; + } + } + + if (pool) + list_add(&set->descriptor_pool, &pool->descriptor_sets); + else + list_inithead(&set->descriptor_pool); + + for (unsigned i = 0; i < layout->binding_count; ++i) { + if (!layout->binding[i].immutable_samplers) + continue; + + unsigned offset = layout->binding[i].offset / 4; + if (layout->binding[i].type == VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER) + offset += 16; + + for (unsigned j = 0; j < layout->binding[i].array_size; ++j) { + struct radv_sampler* sampler = layout->binding[i].immutable_samplers[j]; + + memcpy(set->mapped_ptr + offset, &sampler->state, 16); + offset += layout->binding[i].size / 4; + } + + } + *out_set = set; + return VK_SUCCESS; +} + +static void +radv_descriptor_set_destroy(struct radv_device *device, + struct radv_descriptor_pool *pool, + struct radv_descriptor_set *set, + bool free_bo) +{ + if (free_bo && set->size) { + assert(pool->full_list >= 0); + int next = pool->free_nodes[pool->full_list].next; + pool->free_nodes[pool->full_list].next = pool->free_list; + pool->free_nodes[pool->full_list].offset = (uint8_t*)set->mapped_ptr - pool->mapped_ptr; + pool->free_nodes[pool->full_list].size = align_u32(set->size, 32); + pool->free_list = pool->full_list; + pool->full_list = next; + } + if (set->dynamic_descriptors) + vk_free2(&device->alloc, NULL, set->dynamic_descriptors); + if (!list_empty(&set->descriptor_pool)) + list_del(&set->descriptor_pool); + vk_free2(&device->alloc, NULL, set); +} + +VkResult +radv_temp_descriptor_set_create(struct radv_device *device, + struct radv_cmd_buffer *cmd_buffer, + VkDescriptorSetLayout _layout, + VkDescriptorSet *_set) +{ + RADV_FROM_HANDLE(radv_descriptor_set_layout, layout, _layout); + struct radv_descriptor_set *set; + VkResult ret; + + ret = radv_descriptor_set_create(device, NULL, cmd_buffer, layout, &set); + *_set = radv_descriptor_set_to_handle(set); + return ret; +} + +void +radv_temp_descriptor_set_destroy(struct radv_device *device, + VkDescriptorSet _set) +{ + RADV_FROM_HANDLE(radv_descriptor_set, set, _set); + + radv_descriptor_set_destroy(device, NULL, set, false); +} + +VkResult radv_CreateDescriptorPool( + VkDevice _device, + const VkDescriptorPoolCreateInfo* pCreateInfo, + const VkAllocationCallbacks* pAllocator, + VkDescriptorPool* pDescriptorPool) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + struct radv_descriptor_pool *pool; + unsigned max_sets = pCreateInfo->maxSets * 2; + int size = sizeof(struct radv_descriptor_pool) + + max_sets * sizeof(struct radv_descriptor_pool_free_node); + uint64_t bo_size = 0; + pool = vk_alloc2(&device->alloc, pAllocator, size, 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (!pool) + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + + memset(pool, 0, sizeof(*pool)); + + pool->free_list = -1; + pool->full_list = 0; + pool->free_nodes[max_sets - 1].next = -1; + pool->max_sets = max_sets; + pool->allocated_sets = 0; + + for (int i = 0; i + 1 < max_sets; ++i) + pool->free_nodes[i].next = i + 1; + + for (unsigned i = 0; i < pCreateInfo->poolSizeCount; ++i) { + switch(pCreateInfo->pPoolSizes[i].type) { + case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC: + case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC: + break; + case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER: + case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER: + case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER: + case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER: + case VK_DESCRIPTOR_TYPE_SAMPLER: + /* 32 as we may need to align for images */ + bo_size += 32 * pCreateInfo->pPoolSizes[i].descriptorCount; + break; + case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE: + case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE: + case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT: + bo_size += 64 * pCreateInfo->pPoolSizes[i].descriptorCount; + break; + case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER: + bo_size += 96 * pCreateInfo->pPoolSizes[i].descriptorCount; + break; + default: + unreachable("unknown descriptor type\n"); + break; + } + } + + if (bo_size) { + pool->bo = device->ws->buffer_create(device->ws, bo_size, + 32, RADEON_DOMAIN_VRAM, 0); + pool->mapped_ptr = (uint8_t*)device->ws->buffer_map(pool->bo); + } + pool->size = bo_size; + + list_inithead(&pool->descriptor_sets); + *pDescriptorPool = radv_descriptor_pool_to_handle(pool); + return VK_SUCCESS; +} + +void radv_DestroyDescriptorPool( + VkDevice _device, + VkDescriptorPool _pool, + const VkAllocationCallbacks* pAllocator) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_descriptor_pool, pool, _pool); + + if (!pool) + return; + + list_for_each_entry_safe(struct radv_descriptor_set, set, + &pool->descriptor_sets, descriptor_pool) { + radv_descriptor_set_destroy(device, pool, set, false); + } + + if (pool->bo) + device->ws->buffer_destroy(pool->bo); + vk_free2(&device->alloc, pAllocator, pool); +} + +VkResult radv_ResetDescriptorPool( + VkDevice _device, + VkDescriptorPool descriptorPool, + VkDescriptorPoolResetFlags flags) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_descriptor_pool, pool, descriptorPool); + + list_for_each_entry_safe(struct radv_descriptor_set, set, + &pool->descriptor_sets, descriptor_pool) { + radv_descriptor_set_destroy(device, pool, set, false); + } + + pool->allocated_sets = 0; + pool->current_offset = 0; + pool->free_list = -1; + pool->full_list = 0; + pool->free_nodes[pool->max_sets - 1].next = -1; + + for (int i = 0; i + 1 < pool->max_sets; ++i) + pool->free_nodes[i].next = i + 1; + + return VK_SUCCESS; +} + +VkResult radv_AllocateDescriptorSets( + VkDevice _device, + const VkDescriptorSetAllocateInfo* pAllocateInfo, + VkDescriptorSet* pDescriptorSets) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_descriptor_pool, pool, pAllocateInfo->descriptorPool); + + VkResult result = VK_SUCCESS; + uint32_t i; + struct radv_descriptor_set *set; + + /* allocate a set of buffers for each shader to contain descriptors */ + for (i = 0; i < pAllocateInfo->descriptorSetCount; i++) { + RADV_FROM_HANDLE(radv_descriptor_set_layout, layout, + pAllocateInfo->pSetLayouts[i]); + + result = radv_descriptor_set_create(device, pool, NULL, layout, &set); + if (result != VK_SUCCESS) + break; + + pDescriptorSets[i] = radv_descriptor_set_to_handle(set); + } + + if (result != VK_SUCCESS) + radv_FreeDescriptorSets(_device, pAllocateInfo->descriptorPool, + i, pDescriptorSets); + return result; +} + +VkResult radv_FreeDescriptorSets( + VkDevice _device, + VkDescriptorPool descriptorPool, + uint32_t count, + const VkDescriptorSet* pDescriptorSets) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_descriptor_pool, pool, descriptorPool); + + for (uint32_t i = 0; i < count; i++) { + RADV_FROM_HANDLE(radv_descriptor_set, set, pDescriptorSets[i]); + + if (set) + radv_descriptor_set_destroy(device, pool, set, true); + } + return VK_SUCCESS; +} + +static void write_texel_buffer_descriptor(struct radv_device *device, + unsigned *dst, + struct radeon_winsys_bo **buffer_list, + const VkBufferView _buffer_view) +{ + RADV_FROM_HANDLE(radv_buffer_view, buffer_view, _buffer_view); + + memcpy(dst, buffer_view->state, 4 * 4); + *buffer_list = buffer_view->bo; +} + +static void write_buffer_descriptor(struct radv_device *device, + unsigned *dst, + struct radeon_winsys_bo **buffer_list, + const VkDescriptorBufferInfo *buffer_info) +{ + RADV_FROM_HANDLE(radv_buffer, buffer, buffer_info->buffer); + uint64_t va = device->ws->buffer_get_va(buffer->bo); + uint32_t range = buffer_info->range; + + if (buffer_info->range == VK_WHOLE_SIZE) + range = buffer->size - buffer_info->offset; + + va += buffer_info->offset + buffer->offset; + dst[0] = va; + dst[1] = S_008F04_BASE_ADDRESS_HI(va >> 32); + dst[2] = range; + dst[3] = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) | + S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) | + S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) | + S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W) | + S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) | + S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32); + + *buffer_list = buffer->bo; +} + +static void write_dynamic_buffer_descriptor(struct radv_device *device, + struct radv_descriptor_range *range, + struct radeon_winsys_bo **buffer_list, + const VkDescriptorBufferInfo *buffer_info) +{ + RADV_FROM_HANDLE(radv_buffer, buffer, buffer_info->buffer); + uint64_t va = device->ws->buffer_get_va(buffer->bo); + unsigned size = buffer_info->range; + + if (buffer_info->range == VK_WHOLE_SIZE) + size = buffer->size - buffer_info->offset; + + va += buffer_info->offset + buffer->offset; + range->va = va; + range->size = size; + + *buffer_list = buffer->bo; +} + +static void +write_image_descriptor(struct radv_device *device, + unsigned *dst, + struct radeon_winsys_bo **buffer_list, + const VkDescriptorImageInfo *image_info) +{ + RADV_FROM_HANDLE(radv_image_view, iview, image_info->imageView); + memcpy(dst, iview->descriptor, 8 * 4); + memcpy(dst + 8, iview->fmask_descriptor, 8 * 4); + *buffer_list = iview->bo; +} + +static void +write_combined_image_sampler_descriptor(struct radv_device *device, + unsigned *dst, + struct radeon_winsys_bo **buffer_list, + const VkDescriptorImageInfo *image_info, + bool has_sampler) +{ + RADV_FROM_HANDLE(radv_sampler, sampler, image_info->sampler); + + write_image_descriptor(device, dst, buffer_list, image_info); + /* copy over sampler state */ + if (has_sampler) + memcpy(dst + 16, sampler->state, 16); +} + +static void +write_sampler_descriptor(struct radv_device *device, + unsigned *dst, + const VkDescriptorImageInfo *image_info) +{ + RADV_FROM_HANDLE(radv_sampler, sampler, image_info->sampler); + + memcpy(dst, sampler->state, 16); +} + +void radv_UpdateDescriptorSets( + VkDevice _device, + uint32_t descriptorWriteCount, + const VkWriteDescriptorSet* pDescriptorWrites, + uint32_t descriptorCopyCount, + const VkCopyDescriptorSet* pDescriptorCopies) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + uint32_t i, j; + for (i = 0; i < descriptorWriteCount; i++) { + const VkWriteDescriptorSet *writeset = &pDescriptorWrites[i]; + RADV_FROM_HANDLE(radv_descriptor_set, set, writeset->dstSet); + const struct radv_descriptor_set_binding_layout *binding_layout = + set->layout->binding + writeset->dstBinding; + uint32_t *ptr = set->mapped_ptr; + struct radeon_winsys_bo **buffer_list = set->descriptors; + + ptr += binding_layout->offset / 4; + ptr += binding_layout->size * writeset->dstArrayElement / 4; + buffer_list += binding_layout->buffer_offset; + buffer_list += binding_layout->buffer_count * writeset->dstArrayElement; + for (j = 0; j < writeset->descriptorCount; ++j) { + switch(writeset->descriptorType) { + case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC: + case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC: { + unsigned idx = writeset->dstArrayElement + j; + idx += binding_layout->dynamic_offset_offset; + write_dynamic_buffer_descriptor(device, set->dynamic_descriptors + idx, + buffer_list, writeset->pBufferInfo + j); + break; + } + case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER: + case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER: + write_buffer_descriptor(device, ptr, buffer_list, + writeset->pBufferInfo + j); + break; + case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER: + case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER: + write_texel_buffer_descriptor(device, ptr, buffer_list, + writeset->pTexelBufferView[j]); + break; + case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE: + case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE: + case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT: + write_image_descriptor(device, ptr, buffer_list, + writeset->pImageInfo + j); + break; + case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER: + write_combined_image_sampler_descriptor(device, ptr, buffer_list, + writeset->pImageInfo + j, + !binding_layout->immutable_samplers); + break; + case VK_DESCRIPTOR_TYPE_SAMPLER: + assert(!binding_layout->immutable_samplers); + write_sampler_descriptor(device, ptr, + writeset->pImageInfo + j); + break; + default: + unreachable("unimplemented descriptor type"); + break; + } + ptr += binding_layout->size / 4; + buffer_list += binding_layout->buffer_count; + } + + } + if (descriptorCopyCount) + radv_finishme("copy descriptors"); +} diff -Nru mesa-12.0.6/src/amd/vulkan/radv_descriptor_set.h mesa-17.0.7/src/amd/vulkan/radv_descriptor_set.h --- mesa-12.0.6/src/amd/vulkan/radv_descriptor_set.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_descriptor_set.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,85 @@ +/* + * Copyright © 2016 Bas Nieuwenhuizen + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef RADV_DESCRIPTOR_SET_H +#define RADV_DESCRIPTOR_SET_H + +#include + +#define MAX_SETS 8 + +struct radv_descriptor_set_binding_layout { + VkDescriptorType type; + + /* Number of array elements in this binding */ + uint16_t array_size; + + uint16_t offset; + uint16_t buffer_offset; + uint16_t dynamic_offset_offset; + + /* redundant with the type, each for a single array element */ + uint16_t size; + uint16_t buffer_count; + uint16_t dynamic_offset_count; + + /* Immutable samplers (or NULL if no immutable samplers) */ + struct radv_sampler **immutable_samplers; +}; + +struct radv_descriptor_set_layout { + /* Number of bindings in this descriptor set */ + uint16_t binding_count; + + /* Total size of the descriptor set with room for all array entries */ + uint16_t size; + + /* Shader stages affected by this descriptor set */ + uint16_t shader_stages; + uint16_t dynamic_shader_stages; + + /* Number of buffers in this descriptor set */ + uint16_t buffer_count; + + /* Number of dynamic offsets used by this descriptor set */ + uint16_t dynamic_offset_count; + + /* Bindings in this descriptor set */ + struct radv_descriptor_set_binding_layout binding[0]; +}; + +struct radv_pipeline_layout { + struct { + struct radv_descriptor_set_layout *layout; + uint32_t size; + uint32_t dynamic_offset_start; + } set[MAX_SETS]; + + uint32_t num_sets; + uint32_t push_constant_size; + uint32_t dynamic_offset_count; + + unsigned char sha1[20]; +}; + +#endif /* RADV_DESCRIPTOR_SET_H */ diff -Nru mesa-12.0.6/src/amd/vulkan/radv_device.c mesa-17.0.7/src/amd/vulkan/radv_device.c --- mesa-12.0.6/src/amd/vulkan/radv_device.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_device.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,2113 @@ +/* + * Copyright © 2016 Red Hat. + * Copyright © 2016 Bas Nieuwenhuizen + * + * based in part on anv driver which is: + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include +#include +#include +#include +#include +#include +#include "radv_private.h" +#include "util/strtod.h" + +#include +#include +#include +#include "amdgpu_id.h" +#include "winsys/amdgpu/radv_amdgpu_winsys_public.h" +#include "ac_llvm_util.h" +#include "vk_format.h" +#include "sid.h" +#include "util/debug.h" +struct radv_dispatch_table dtable; + +static int +radv_get_function_timestamp(void *ptr, uint32_t* timestamp) +{ + Dl_info info; + struct stat st; + if (!dladdr(ptr, &info) || !info.dli_fname) { + return -1; + } + if (stat(info.dli_fname, &st)) { + return -1; + } + *timestamp = st.st_mtim.tv_sec; + return 0; +} + +static int +radv_device_get_cache_uuid(enum radeon_family family, void *uuid) +{ + uint32_t mesa_timestamp, llvm_timestamp; + uint16_t f = family; + memset(uuid, 0, VK_UUID_SIZE); + if (radv_get_function_timestamp(radv_device_get_cache_uuid, &mesa_timestamp) || + radv_get_function_timestamp(LLVMInitializeAMDGPUTargetInfo, &llvm_timestamp)) + return -1; + + memcpy(uuid, &mesa_timestamp, 4); + memcpy((char*)uuid + 4, &llvm_timestamp, 4); + memcpy((char*)uuid + 8, &f, 2); + snprintf((char*)uuid + 10, VK_UUID_SIZE - 10, "radv"); + return 0; +} + +static const VkExtensionProperties instance_extensions[] = { + { + .extensionName = VK_KHR_SURFACE_EXTENSION_NAME, + .specVersion = 25, + }, +#ifdef VK_USE_PLATFORM_XCB_KHR + { + .extensionName = VK_KHR_XCB_SURFACE_EXTENSION_NAME, + .specVersion = 6, + }, +#endif +#ifdef VK_USE_PLATFORM_XLIB_KHR + { + .extensionName = VK_KHR_XLIB_SURFACE_EXTENSION_NAME, + .specVersion = 6, + }, +#endif +#ifdef VK_USE_PLATFORM_WAYLAND_KHR + { + .extensionName = VK_KHR_WAYLAND_SURFACE_EXTENSION_NAME, + .specVersion = 5, + }, +#endif +}; + +static const VkExtensionProperties common_device_extensions[] = { + { + .extensionName = VK_KHR_SAMPLER_MIRROR_CLAMP_TO_EDGE_EXTENSION_NAME, + .specVersion = 1, + }, + { + .extensionName = VK_KHR_SWAPCHAIN_EXTENSION_NAME, + .specVersion = 68, + }, + { + .extensionName = VK_AMD_DRAW_INDIRECT_COUNT_EXTENSION_NAME, + .specVersion = 1, + }, + { + .extensionName = VK_AMD_NEGATIVE_VIEWPORT_HEIGHT_EXTENSION_NAME, + .specVersion = 1, + }, +}; + +static VkResult +radv_extensions_register(struct radv_instance *instance, + struct radv_extensions *extensions, + const VkExtensionProperties *new_ext, + uint32_t num_ext) +{ + size_t new_size; + VkExtensionProperties *new_ptr; + + assert(new_ext && num_ext > 0); + + if (!new_ext) + return VK_ERROR_INITIALIZATION_FAILED; + + new_size = (extensions->num_ext + num_ext) * sizeof(VkExtensionProperties); + new_ptr = vk_realloc(&instance->alloc, extensions->ext_array, + new_size, 8, VK_SYSTEM_ALLOCATION_SCOPE_INSTANCE); + + /* Old array continues to be valid, update nothing */ + if (!new_ptr) + return VK_ERROR_OUT_OF_HOST_MEMORY; + + memcpy(&new_ptr[extensions->num_ext], new_ext, + num_ext * sizeof(VkExtensionProperties)); + extensions->ext_array = new_ptr; + extensions->num_ext += num_ext; + + return VK_SUCCESS; +} + +static void +radv_extensions_finish(struct radv_instance *instance, + struct radv_extensions *extensions) +{ + assert(extensions); + + if (!extensions) + radv_loge("Attemted to free invalid extension struct\n"); + + if (extensions->ext_array) + vk_free(&instance->alloc, extensions->ext_array); +} + +static bool +is_extension_enabled(const VkExtensionProperties *extensions, + size_t num_ext, + const char *name) +{ + assert(extensions && name); + + for (uint32_t i = 0; i < num_ext; i++) { + if (strcmp(name, extensions[i].extensionName) == 0) + return true; + } + + return false; +} + +static VkResult +radv_physical_device_init(struct radv_physical_device *device, + struct radv_instance *instance, + const char *path) +{ + VkResult result; + drmVersionPtr version; + int fd; + + fd = open(path, O_RDWR | O_CLOEXEC); + if (fd < 0) + return VK_ERROR_INCOMPATIBLE_DRIVER; + + version = drmGetVersion(fd); + if (!version) { + close(fd); + return vk_errorf(VK_ERROR_INCOMPATIBLE_DRIVER, + "failed to get version %s: %m", path); + } + + if (strcmp(version->name, "amdgpu")) { + drmFreeVersion(version); + close(fd); + return VK_ERROR_INCOMPATIBLE_DRIVER; + } + drmFreeVersion(version); + + device->_loader_data.loaderMagic = ICD_LOADER_MAGIC; + device->instance = instance; + assert(strlen(path) < ARRAY_SIZE(device->path)); + strncpy(device->path, path, ARRAY_SIZE(device->path)); + + device->ws = radv_amdgpu_winsys_create(fd); + if (!device->ws) { + result = VK_ERROR_INCOMPATIBLE_DRIVER; + goto fail; + } + device->ws->query_info(device->ws, &device->rad_info); + result = radv_init_wsi(device); + if (result != VK_SUCCESS) { + device->ws->destroy(device->ws); + goto fail; + } + + if (radv_device_get_cache_uuid(device->rad_info.family, device->uuid)) { + radv_finish_wsi(device); + device->ws->destroy(device->ws); + result = vk_errorf(VK_ERROR_INITIALIZATION_FAILED, + "cannot generate UUID"); + goto fail; + } + + result = radv_extensions_register(instance, + &device->extensions, + common_device_extensions, + ARRAY_SIZE(common_device_extensions)); + if (result != VK_SUCCESS) + goto fail; + + fprintf(stderr, "WARNING: radv is not a conformant vulkan implementation, testing use only.\n"); + device->name = device->rad_info.name; + close(fd); + return VK_SUCCESS; + +fail: + close(fd); + return result; +} + +static void +radv_physical_device_finish(struct radv_physical_device *device) +{ + radv_extensions_finish(device->instance, &device->extensions); + radv_finish_wsi(device); + device->ws->destroy(device->ws); +} + + +static void * +default_alloc_func(void *pUserData, size_t size, size_t align, + VkSystemAllocationScope allocationScope) +{ + return malloc(size); +} + +static void * +default_realloc_func(void *pUserData, void *pOriginal, size_t size, + size_t align, VkSystemAllocationScope allocationScope) +{ + return realloc(pOriginal, size); +} + +static void +default_free_func(void *pUserData, void *pMemory) +{ + free(pMemory); +} + +static const VkAllocationCallbacks default_alloc = { + .pUserData = NULL, + .pfnAllocation = default_alloc_func, + .pfnReallocation = default_realloc_func, + .pfnFree = default_free_func, +}; + +static const struct debug_control radv_debug_options[] = { + {"fastclears", RADV_DEBUG_FAST_CLEARS}, + {"nodcc", RADV_DEBUG_NO_DCC}, + {"shaders", RADV_DEBUG_DUMP_SHADERS}, + {"nocache", RADV_DEBUG_NO_CACHE}, + {"shaderstats", RADV_DEBUG_DUMP_SHADER_STATS}, + {"nohiz", RADV_DEBUG_NO_HIZ}, + {"nocompute", RADV_DEBUG_NO_COMPUTE_QUEUE}, + {"unsafemath", RADV_DEBUG_UNSAFE_MATH}, + {NULL, 0} +}; + +VkResult radv_CreateInstance( + const VkInstanceCreateInfo* pCreateInfo, + const VkAllocationCallbacks* pAllocator, + VkInstance* pInstance) +{ + struct radv_instance *instance; + + assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_INSTANCE_CREATE_INFO); + + uint32_t client_version; + if (pCreateInfo->pApplicationInfo && + pCreateInfo->pApplicationInfo->apiVersion != 0) { + client_version = pCreateInfo->pApplicationInfo->apiVersion; + } else { + client_version = VK_MAKE_VERSION(1, 0, 0); + } + + if (VK_MAKE_VERSION(1, 0, 0) > client_version || + client_version > VK_MAKE_VERSION(1, 0, 0xfff)) { + return vk_errorf(VK_ERROR_INCOMPATIBLE_DRIVER, + "Client requested version %d.%d.%d", + VK_VERSION_MAJOR(client_version), + VK_VERSION_MINOR(client_version), + VK_VERSION_PATCH(client_version)); + } + + for (uint32_t i = 0; i < pCreateInfo->enabledExtensionCount; i++) { + if (!is_extension_enabled(instance_extensions, + ARRAY_SIZE(instance_extensions), + pCreateInfo->ppEnabledExtensionNames[i])) + return vk_error(VK_ERROR_EXTENSION_NOT_PRESENT); + } + + instance = vk_alloc2(&default_alloc, pAllocator, sizeof(*instance), 8, + VK_SYSTEM_ALLOCATION_SCOPE_INSTANCE); + if (!instance) + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + + memset(instance, 0, sizeof(*instance)); + + instance->_loader_data.loaderMagic = ICD_LOADER_MAGIC; + + if (pAllocator) + instance->alloc = *pAllocator; + else + instance->alloc = default_alloc; + + instance->apiVersion = client_version; + instance->physicalDeviceCount = -1; + + _mesa_locale_init(); + + VG(VALGRIND_CREATE_MEMPOOL(instance, 0, false)); + + instance->debug_flags = parse_debug_string(getenv("RADV_DEBUG"), + radv_debug_options); + + *pInstance = radv_instance_to_handle(instance); + + return VK_SUCCESS; +} + +void radv_DestroyInstance( + VkInstance _instance, + const VkAllocationCallbacks* pAllocator) +{ + RADV_FROM_HANDLE(radv_instance, instance, _instance); + + for (int i = 0; i < instance->physicalDeviceCount; ++i) { + radv_physical_device_finish(instance->physicalDevices + i); + } + + VG(VALGRIND_DESTROY_MEMPOOL(instance)); + + _mesa_locale_fini(); + + vk_free(&instance->alloc, instance); +} + +VkResult radv_EnumeratePhysicalDevices( + VkInstance _instance, + uint32_t* pPhysicalDeviceCount, + VkPhysicalDevice* pPhysicalDevices) +{ + RADV_FROM_HANDLE(radv_instance, instance, _instance); + VkResult result; + + if (instance->physicalDeviceCount < 0) { + char path[20]; + instance->physicalDeviceCount = 0; + for (unsigned i = 0; i < RADV_MAX_DRM_DEVICES; i++) { + snprintf(path, sizeof(path), "/dev/dri/renderD%d", 128 + i); + result = radv_physical_device_init(instance->physicalDevices + + instance->physicalDeviceCount, + instance, path); + if (result == VK_SUCCESS) + ++instance->physicalDeviceCount; + else if (result != VK_ERROR_INCOMPATIBLE_DRIVER) + return result; + } + } + + if (!pPhysicalDevices) { + *pPhysicalDeviceCount = instance->physicalDeviceCount; + } else { + *pPhysicalDeviceCount = MIN2(*pPhysicalDeviceCount, instance->physicalDeviceCount); + for (unsigned i = 0; i < *pPhysicalDeviceCount; ++i) + pPhysicalDevices[i] = radv_physical_device_to_handle(instance->physicalDevices + i); + } + + return *pPhysicalDeviceCount < instance->physicalDeviceCount ? VK_INCOMPLETE + : VK_SUCCESS; +} + +void radv_GetPhysicalDeviceFeatures( + VkPhysicalDevice physicalDevice, + VkPhysicalDeviceFeatures* pFeatures) +{ + // RADV_FROM_HANDLE(radv_physical_device, pdevice, physicalDevice); + + memset(pFeatures, 0, sizeof(*pFeatures)); + + *pFeatures = (VkPhysicalDeviceFeatures) { + .robustBufferAccess = true, + .fullDrawIndexUint32 = true, + .imageCubeArray = true, + .independentBlend = true, + .geometryShader = false, + .tessellationShader = false, + .sampleRateShading = false, + .dualSrcBlend = true, + .logicOp = true, + .multiDrawIndirect = true, + .drawIndirectFirstInstance = true, + .depthClamp = true, + .depthBiasClamp = true, + .fillModeNonSolid = true, + .depthBounds = true, + .wideLines = true, + .largePoints = true, + .alphaToOne = true, + .multiViewport = false, + .samplerAnisotropy = true, + .textureCompressionETC2 = false, + .textureCompressionASTC_LDR = false, + .textureCompressionBC = true, + .occlusionQueryPrecise = true, + .pipelineStatisticsQuery = false, + .vertexPipelineStoresAndAtomics = true, + .fragmentStoresAndAtomics = true, + .shaderTessellationAndGeometryPointSize = true, + .shaderImageGatherExtended = true, + .shaderStorageImageExtendedFormats = true, + .shaderStorageImageMultisample = false, + .shaderUniformBufferArrayDynamicIndexing = true, + .shaderSampledImageArrayDynamicIndexing = true, + .shaderStorageBufferArrayDynamicIndexing = true, + .shaderStorageImageArrayDynamicIndexing = true, + .shaderStorageImageReadWithoutFormat = false, + .shaderStorageImageWriteWithoutFormat = false, + .shaderClipDistance = true, + .shaderCullDistance = true, + .shaderFloat64 = false, + .shaderInt64 = false, + .shaderInt16 = false, + .alphaToOne = true, + .variableMultisampleRate = false, + .inheritedQueries = false, + }; +} + +void radv_GetPhysicalDeviceProperties( + VkPhysicalDevice physicalDevice, + VkPhysicalDeviceProperties* pProperties) +{ + RADV_FROM_HANDLE(radv_physical_device, pdevice, physicalDevice); + VkSampleCountFlags sample_counts = 0xf; + VkPhysicalDeviceLimits limits = { + .maxImageDimension1D = (1 << 14), + .maxImageDimension2D = (1 << 14), + .maxImageDimension3D = (1 << 11), + .maxImageDimensionCube = (1 << 14), + .maxImageArrayLayers = (1 << 11), + .maxTexelBufferElements = 128 * 1024 * 1024, + .maxUniformBufferRange = UINT32_MAX, + .maxStorageBufferRange = UINT32_MAX, + .maxPushConstantsSize = MAX_PUSH_CONSTANTS_SIZE, + .maxMemoryAllocationCount = UINT32_MAX, + .maxSamplerAllocationCount = 64 * 1024, + .bufferImageGranularity = 64, /* A cache line */ + .sparseAddressSpaceSize = 0, + .maxBoundDescriptorSets = MAX_SETS, + .maxPerStageDescriptorSamplers = 64, + .maxPerStageDescriptorUniformBuffers = 64, + .maxPerStageDescriptorStorageBuffers = 64, + .maxPerStageDescriptorSampledImages = 64, + .maxPerStageDescriptorStorageImages = 64, + .maxPerStageDescriptorInputAttachments = 64, + .maxPerStageResources = 128, + .maxDescriptorSetSamplers = 256, + .maxDescriptorSetUniformBuffers = 256, + .maxDescriptorSetUniformBuffersDynamic = 256, + .maxDescriptorSetStorageBuffers = 256, + .maxDescriptorSetStorageBuffersDynamic = 256, + .maxDescriptorSetSampledImages = 256, + .maxDescriptorSetStorageImages = 256, + .maxDescriptorSetInputAttachments = 256, + .maxVertexInputAttributes = 32, + .maxVertexInputBindings = 32, + .maxVertexInputAttributeOffset = 2047, + .maxVertexInputBindingStride = 2048, + .maxVertexOutputComponents = 128, + .maxTessellationGenerationLevel = 0, + .maxTessellationPatchSize = 0, + .maxTessellationControlPerVertexInputComponents = 0, + .maxTessellationControlPerVertexOutputComponents = 0, + .maxTessellationControlPerPatchOutputComponents = 0, + .maxTessellationControlTotalOutputComponents = 0, + .maxTessellationEvaluationInputComponents = 0, + .maxTessellationEvaluationOutputComponents = 0, + .maxGeometryShaderInvocations = 32, + .maxGeometryInputComponents = 64, + .maxGeometryOutputComponents = 128, + .maxGeometryOutputVertices = 256, + .maxGeometryTotalOutputComponents = 1024, + .maxFragmentInputComponents = 128, + .maxFragmentOutputAttachments = 8, + .maxFragmentDualSrcAttachments = 1, + .maxFragmentCombinedOutputResources = 8, + .maxComputeSharedMemorySize = 32768, + .maxComputeWorkGroupCount = { 65535, 65535, 65535 }, + .maxComputeWorkGroupInvocations = 2048, + .maxComputeWorkGroupSize = { + 2048, + 2048, + 2048 + }, + .subPixelPrecisionBits = 4 /* FIXME */, + .subTexelPrecisionBits = 4 /* FIXME */, + .mipmapPrecisionBits = 4 /* FIXME */, + .maxDrawIndexedIndexValue = UINT32_MAX, + .maxDrawIndirectCount = UINT32_MAX, + .maxSamplerLodBias = 16, + .maxSamplerAnisotropy = 16, + .maxViewports = MAX_VIEWPORTS, + .maxViewportDimensions = { (1 << 14), (1 << 14) }, + .viewportBoundsRange = { INT16_MIN, INT16_MAX }, + .viewportSubPixelBits = 13, /* We take a float? */ + .minMemoryMapAlignment = 4096, /* A page */ + .minTexelBufferOffsetAlignment = 1, + .minUniformBufferOffsetAlignment = 4, + .minStorageBufferOffsetAlignment = 4, + .minTexelOffset = -32, + .maxTexelOffset = 31, + .minTexelGatherOffset = -32, + .maxTexelGatherOffset = 31, + .minInterpolationOffset = -2, + .maxInterpolationOffset = 2, + .subPixelInterpolationOffsetBits = 8, + .maxFramebufferWidth = (1 << 14), + .maxFramebufferHeight = (1 << 14), + .maxFramebufferLayers = (1 << 10), + .framebufferColorSampleCounts = sample_counts, + .framebufferDepthSampleCounts = sample_counts, + .framebufferStencilSampleCounts = sample_counts, + .framebufferNoAttachmentsSampleCounts = sample_counts, + .maxColorAttachments = MAX_RTS, + .sampledImageColorSampleCounts = sample_counts, + .sampledImageIntegerSampleCounts = VK_SAMPLE_COUNT_1_BIT, + .sampledImageDepthSampleCounts = sample_counts, + .sampledImageStencilSampleCounts = sample_counts, + .storageImageSampleCounts = VK_SAMPLE_COUNT_1_BIT, + .maxSampleMaskWords = 1, + .timestampComputeAndGraphics = false, + .timestampPeriod = 1000000.0 / pdevice->rad_info.clock_crystal_freq, + .maxClipDistances = 8, + .maxCullDistances = 8, + .maxCombinedClipAndCullDistances = 8, + .discreteQueuePriorities = 1, + .pointSizeRange = { 0.125, 255.875 }, + .lineWidthRange = { 0.0, 7.9921875 }, + .pointSizeGranularity = (1.0 / 8.0), + .lineWidthGranularity = (1.0 / 128.0), + .strictLines = false, /* FINISHME */ + .standardSampleLocations = true, + .optimalBufferCopyOffsetAlignment = 128, + .optimalBufferCopyRowPitchAlignment = 128, + .nonCoherentAtomSize = 64, + }; + + *pProperties = (VkPhysicalDeviceProperties) { + .apiVersion = VK_MAKE_VERSION(1, 0, 5), + .driverVersion = 1, + .vendorID = 0x1002, + .deviceID = pdevice->rad_info.pci_id, + .deviceType = VK_PHYSICAL_DEVICE_TYPE_DISCRETE_GPU, + .limits = limits, + .sparseProperties = {0}, /* Broadwell doesn't do sparse. */ + }; + + strcpy(pProperties->deviceName, pdevice->name); + memcpy(pProperties->pipelineCacheUUID, pdevice->uuid, VK_UUID_SIZE); +} + +void radv_GetPhysicalDeviceQueueFamilyProperties( + VkPhysicalDevice physicalDevice, + uint32_t* pCount, + VkQueueFamilyProperties* pQueueFamilyProperties) +{ + RADV_FROM_HANDLE(radv_physical_device, pdevice, physicalDevice); + int num_queue_families = 1; + int idx; + if (pdevice->rad_info.compute_rings > 0 && + pdevice->rad_info.chip_class >= CIK && + !(pdevice->instance->debug_flags & RADV_DEBUG_NO_COMPUTE_QUEUE)) + num_queue_families++; + + if (pQueueFamilyProperties == NULL) { + *pCount = num_queue_families; + return; + } + + if (!*pCount) + return; + + idx = 0; + if (*pCount >= 1) { + pQueueFamilyProperties[idx] = (VkQueueFamilyProperties) { + .queueFlags = VK_QUEUE_GRAPHICS_BIT | + VK_QUEUE_COMPUTE_BIT | + VK_QUEUE_TRANSFER_BIT, + .queueCount = 1, + .timestampValidBits = 64, + .minImageTransferGranularity = (VkExtent3D) { 1, 1, 1 }, + }; + idx++; + } + + if (pdevice->rad_info.compute_rings > 0 && + pdevice->rad_info.chip_class >= CIK && + !(pdevice->instance->debug_flags & RADV_DEBUG_NO_COMPUTE_QUEUE)) { + if (*pCount > idx) { + pQueueFamilyProperties[idx] = (VkQueueFamilyProperties) { + .queueFlags = VK_QUEUE_COMPUTE_BIT | VK_QUEUE_TRANSFER_BIT, + .queueCount = pdevice->rad_info.compute_rings, + .timestampValidBits = 64, + .minImageTransferGranularity = (VkExtent3D) { 1, 1, 1 }, + }; + idx++; + } + } + *pCount = idx; +} + +void radv_GetPhysicalDeviceMemoryProperties( + VkPhysicalDevice physicalDevice, + VkPhysicalDeviceMemoryProperties* pMemoryProperties) +{ + RADV_FROM_HANDLE(radv_physical_device, physical_device, physicalDevice); + + STATIC_ASSERT(RADV_MEM_TYPE_COUNT <= VK_MAX_MEMORY_TYPES); + + pMemoryProperties->memoryTypeCount = RADV_MEM_TYPE_COUNT; + pMemoryProperties->memoryTypes[RADV_MEM_TYPE_VRAM] = (VkMemoryType) { + .propertyFlags = VK_MEMORY_PROPERTY_DEVICE_LOCAL_BIT, + .heapIndex = RADV_MEM_HEAP_VRAM, + }; + pMemoryProperties->memoryTypes[RADV_MEM_TYPE_GTT_WRITE_COMBINE] = (VkMemoryType) { + .propertyFlags = VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT | + VK_MEMORY_PROPERTY_HOST_COHERENT_BIT, + .heapIndex = RADV_MEM_HEAP_GTT, + }; + pMemoryProperties->memoryTypes[RADV_MEM_TYPE_VRAM_CPU_ACCESS] = (VkMemoryType) { + .propertyFlags = VK_MEMORY_PROPERTY_DEVICE_LOCAL_BIT | + VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT | + VK_MEMORY_PROPERTY_HOST_COHERENT_BIT, + .heapIndex = RADV_MEM_HEAP_VRAM_CPU_ACCESS, + }; + pMemoryProperties->memoryTypes[RADV_MEM_TYPE_GTT_CACHED] = (VkMemoryType) { + .propertyFlags = VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT | + VK_MEMORY_PROPERTY_HOST_COHERENT_BIT | + VK_MEMORY_PROPERTY_HOST_CACHED_BIT, + .heapIndex = RADV_MEM_HEAP_GTT, + }; + + STATIC_ASSERT(RADV_MEM_HEAP_COUNT <= VK_MAX_MEMORY_HEAPS); + + pMemoryProperties->memoryHeapCount = RADV_MEM_HEAP_COUNT; + pMemoryProperties->memoryHeaps[RADV_MEM_HEAP_VRAM] = (VkMemoryHeap) { + .size = physical_device->rad_info.vram_size - + physical_device->rad_info.visible_vram_size, + .flags = VK_MEMORY_HEAP_DEVICE_LOCAL_BIT, + }; + pMemoryProperties->memoryHeaps[RADV_MEM_HEAP_VRAM_CPU_ACCESS] = (VkMemoryHeap) { + .size = physical_device->rad_info.visible_vram_size, + .flags = VK_MEMORY_HEAP_DEVICE_LOCAL_BIT, + }; + pMemoryProperties->memoryHeaps[RADV_MEM_HEAP_GTT] = (VkMemoryHeap) { + .size = physical_device->rad_info.gart_size, + .flags = 0, + }; +} + +static int +radv_queue_init(struct radv_device *device, struct radv_queue *queue, + int queue_family_index, int idx) +{ + queue->_loader_data.loaderMagic = ICD_LOADER_MAGIC; + queue->device = device; + queue->queue_family_index = queue_family_index; + queue->queue_idx = idx; + + queue->hw_ctx = device->ws->ctx_create(device->ws); + if (!queue->hw_ctx) + return VK_ERROR_OUT_OF_HOST_MEMORY; + + return VK_SUCCESS; +} + +static void +radv_queue_finish(struct radv_queue *queue) +{ + if (queue->hw_ctx) + queue->device->ws->ctx_destroy(queue->hw_ctx); +} + +VkResult radv_CreateDevice( + VkPhysicalDevice physicalDevice, + const VkDeviceCreateInfo* pCreateInfo, + const VkAllocationCallbacks* pAllocator, + VkDevice* pDevice) +{ + RADV_FROM_HANDLE(radv_physical_device, physical_device, physicalDevice); + VkResult result; + struct radv_device *device; + + for (uint32_t i = 0; i < pCreateInfo->enabledExtensionCount; i++) { + if (!is_extension_enabled(physical_device->extensions.ext_array, + physical_device->extensions.num_ext, + pCreateInfo->ppEnabledExtensionNames[i])) + return vk_error(VK_ERROR_EXTENSION_NOT_PRESENT); + } + + device = vk_alloc2(&physical_device->instance->alloc, pAllocator, + sizeof(*device), 8, + VK_SYSTEM_ALLOCATION_SCOPE_DEVICE); + if (!device) + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + + memset(device, 0, sizeof(*device)); + + device->_loader_data.loaderMagic = ICD_LOADER_MAGIC; + device->instance = physical_device->instance; + device->physical_device = physical_device; + + device->debug_flags = device->instance->debug_flags; + + device->ws = physical_device->ws; + if (pAllocator) + device->alloc = *pAllocator; + else + device->alloc = physical_device->instance->alloc; + + for (unsigned i = 0; i < pCreateInfo->queueCreateInfoCount; i++) { + const VkDeviceQueueCreateInfo *queue_create = &pCreateInfo->pQueueCreateInfos[i]; + uint32_t qfi = queue_create->queueFamilyIndex; + + device->queues[qfi] = vk_alloc(&device->alloc, + queue_create->queueCount * sizeof(struct radv_queue), 8, VK_SYSTEM_ALLOCATION_SCOPE_DEVICE); + if (!device->queues[qfi]) { + result = VK_ERROR_OUT_OF_HOST_MEMORY; + goto fail; + } + + memset(device->queues[qfi], 0, queue_create->queueCount * sizeof(struct radv_queue)); + + device->queue_count[qfi] = queue_create->queueCount; + + for (unsigned q = 0; q < queue_create->queueCount; q++) { + result = radv_queue_init(device, &device->queues[qfi][q], qfi, q); + if (result != VK_SUCCESS) + goto fail; + } + } + + result = radv_device_init_meta(device); + if (result != VK_SUCCESS) + goto fail; + + radv_device_init_msaa(device); + + for (int family = 0; family < RADV_MAX_QUEUE_FAMILIES; ++family) { + device->empty_cs[family] = device->ws->cs_create(device->ws, family); + switch (family) { + case RADV_QUEUE_GENERAL: + radeon_emit(device->empty_cs[family], PKT3(PKT3_CONTEXT_CONTROL, 1, 0)); + radeon_emit(device->empty_cs[family], CONTEXT_CONTROL_LOAD_ENABLE(1)); + radeon_emit(device->empty_cs[family], CONTEXT_CONTROL_SHADOW_ENABLE(1)); + break; + case RADV_QUEUE_COMPUTE: + radeon_emit(device->empty_cs[family], PKT3(PKT3_NOP, 0, 0)); + radeon_emit(device->empty_cs[family], 0); + break; + } + device->ws->cs_finalize(device->empty_cs[family]); + } + + if (getenv("RADV_TRACE_FILE")) { + device->trace_bo = device->ws->buffer_create(device->ws, 4096, 8, + RADEON_DOMAIN_VRAM, RADEON_FLAG_CPU_ACCESS); + if (!device->trace_bo) + goto fail; + + device->trace_id_ptr = device->ws->buffer_map(device->trace_bo); + if (!device->trace_id_ptr) + goto fail; + } + + *pDevice = radv_device_to_handle(device); + return VK_SUCCESS; + +fail: + if (device->trace_bo) + device->ws->buffer_destroy(device->trace_bo); + + for (unsigned i = 0; i < RADV_MAX_QUEUE_FAMILIES; i++) { + for (unsigned q = 0; q < device->queue_count[i]; q++) + radv_queue_finish(&device->queues[i][q]); + if (device->queue_count[i]) + vk_free(&device->alloc, device->queues[i]); + } + + vk_free(&device->alloc, device); + return result; +} + +void radv_DestroyDevice( + VkDevice _device, + const VkAllocationCallbacks* pAllocator) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + + if (device->trace_bo) + device->ws->buffer_destroy(device->trace_bo); + + for (unsigned i = 0; i < RADV_MAX_QUEUE_FAMILIES; i++) { + for (unsigned q = 0; q < device->queue_count[i]; q++) + radv_queue_finish(&device->queues[i][q]); + if (device->queue_count[i]) + vk_free(&device->alloc, device->queues[i]); + } + radv_device_finish_meta(device); + + vk_free(&device->alloc, device); +} + +VkResult radv_EnumerateInstanceExtensionProperties( + const char* pLayerName, + uint32_t* pPropertyCount, + VkExtensionProperties* pProperties) +{ + if (pProperties == NULL) { + *pPropertyCount = ARRAY_SIZE(instance_extensions); + return VK_SUCCESS; + } + + *pPropertyCount = MIN2(*pPropertyCount, ARRAY_SIZE(instance_extensions)); + typed_memcpy(pProperties, instance_extensions, *pPropertyCount); + + if (*pPropertyCount < ARRAY_SIZE(instance_extensions)) + return VK_INCOMPLETE; + + return VK_SUCCESS; +} + +VkResult radv_EnumerateDeviceExtensionProperties( + VkPhysicalDevice physicalDevice, + const char* pLayerName, + uint32_t* pPropertyCount, + VkExtensionProperties* pProperties) +{ + RADV_FROM_HANDLE(radv_physical_device, pdevice, physicalDevice); + + if (pProperties == NULL) { + *pPropertyCount = pdevice->extensions.num_ext; + return VK_SUCCESS; + } + + *pPropertyCount = MIN2(*pPropertyCount, pdevice->extensions.num_ext); + typed_memcpy(pProperties, pdevice->extensions.ext_array, *pPropertyCount); + + if (*pPropertyCount < pdevice->extensions.num_ext) + return VK_INCOMPLETE; + + return VK_SUCCESS; +} + +VkResult radv_EnumerateInstanceLayerProperties( + uint32_t* pPropertyCount, + VkLayerProperties* pProperties) +{ + if (pProperties == NULL) { + *pPropertyCount = 0; + return VK_SUCCESS; + } + + /* None supported at this time */ + return vk_error(VK_ERROR_LAYER_NOT_PRESENT); +} + +VkResult radv_EnumerateDeviceLayerProperties( + VkPhysicalDevice physicalDevice, + uint32_t* pPropertyCount, + VkLayerProperties* pProperties) +{ + if (pProperties == NULL) { + *pPropertyCount = 0; + return VK_SUCCESS; + } + + /* None supported at this time */ + return vk_error(VK_ERROR_LAYER_NOT_PRESENT); +} + +void radv_GetDeviceQueue( + VkDevice _device, + uint32_t queueFamilyIndex, + uint32_t queueIndex, + VkQueue* pQueue) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + + *pQueue = radv_queue_to_handle(&device->queues[queueFamilyIndex][queueIndex]); +} + +static void radv_dump_trace(struct radv_device *device, + struct radeon_winsys_cs *cs) +{ + const char *filename = getenv("RADV_TRACE_FILE"); + FILE *f = fopen(filename, "w"); + if (!f) { + fprintf(stderr, "Failed to write trace dump to %s\n", filename); + return; + } + + fprintf(f, "Trace ID: %x\n", *device->trace_id_ptr); + device->ws->cs_dump(cs, f, *device->trace_id_ptr); + fclose(f); +} + +VkResult radv_QueueSubmit( + VkQueue _queue, + uint32_t submitCount, + const VkSubmitInfo* pSubmits, + VkFence _fence) +{ + RADV_FROM_HANDLE(radv_queue, queue, _queue); + RADV_FROM_HANDLE(radv_fence, fence, _fence); + struct radeon_winsys_fence *base_fence = fence ? fence->fence : NULL; + struct radeon_winsys_ctx *ctx = queue->hw_ctx; + int ret; + uint32_t max_cs_submission = queue->device->trace_bo ? 1 : UINT32_MAX; + + for (uint32_t i = 0; i < submitCount; i++) { + struct radeon_winsys_cs **cs_array; + bool can_patch = true; + uint32_t advance; + + if (!pSubmits[i].commandBufferCount) + continue; + + cs_array = malloc(sizeof(struct radeon_winsys_cs *) * + pSubmits[i].commandBufferCount); + + for (uint32_t j = 0; j < pSubmits[i].commandBufferCount; j++) { + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, + pSubmits[i].pCommandBuffers[j]); + assert(cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY); + + cs_array[j] = cmd_buffer->cs; + if ((cmd_buffer->usage_flags & VK_COMMAND_BUFFER_USAGE_SIMULTANEOUS_USE_BIT)) + can_patch = false; + } + + for (uint32_t j = 0; j < pSubmits[i].commandBufferCount; j += advance) { + advance = MIN2(max_cs_submission, + pSubmits[i].commandBufferCount - j); + bool b = j == 0; + bool e = j + advance == pSubmits[i].commandBufferCount; + + if (queue->device->trace_bo) + *queue->device->trace_id_ptr = 0; + + ret = queue->device->ws->cs_submit(ctx, queue->queue_idx, cs_array + j, advance, + (struct radeon_winsys_sem **)pSubmits[i].pWaitSemaphores, + b ? pSubmits[i].waitSemaphoreCount : 0, + (struct radeon_winsys_sem **)pSubmits[i].pSignalSemaphores, + e ? pSubmits[i].signalSemaphoreCount : 0, + can_patch, base_fence); + + if (ret) { + radv_loge("failed to submit CS %d\n", i); + abort(); + } + if (queue->device->trace_bo) { + bool success = queue->device->ws->ctx_wait_idle( + queue->hw_ctx, + radv_queue_family_to_ring( + queue->queue_family_index), + queue->queue_idx); + + if (!success) { /* Hang */ + radv_dump_trace(queue->device, cs_array[j]); + abort(); + } + } + } + free(cs_array); + } + + if (fence) { + if (!submitCount) + ret = queue->device->ws->cs_submit(ctx, queue->queue_idx, + &queue->device->empty_cs[queue->queue_family_index], + 1, NULL, 0, NULL, 0, false, base_fence); + + fence->submitted = true; + } + + return VK_SUCCESS; +} + +VkResult radv_QueueWaitIdle( + VkQueue _queue) +{ + RADV_FROM_HANDLE(radv_queue, queue, _queue); + + queue->device->ws->ctx_wait_idle(queue->hw_ctx, + radv_queue_family_to_ring(queue->queue_family_index), + queue->queue_idx); + return VK_SUCCESS; +} + +VkResult radv_DeviceWaitIdle( + VkDevice _device) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + + for (unsigned i = 0; i < RADV_MAX_QUEUE_FAMILIES; i++) { + for (unsigned q = 0; q < device->queue_count[i]; q++) { + radv_QueueWaitIdle(radv_queue_to_handle(&device->queues[i][q])); + } + } + return VK_SUCCESS; +} + +PFN_vkVoidFunction radv_GetInstanceProcAddr( + VkInstance instance, + const char* pName) +{ + return radv_lookup_entrypoint(pName); +} + +/* The loader wants us to expose a second GetInstanceProcAddr function + * to work around certain LD_PRELOAD issues seen in apps. + */ +PUBLIC +VKAPI_ATTR PFN_vkVoidFunction VKAPI_CALL vk_icdGetInstanceProcAddr( + VkInstance instance, + const char* pName); + +PUBLIC +VKAPI_ATTR PFN_vkVoidFunction VKAPI_CALL vk_icdGetInstanceProcAddr( + VkInstance instance, + const char* pName) +{ + return radv_GetInstanceProcAddr(instance, pName); +} + +PFN_vkVoidFunction radv_GetDeviceProcAddr( + VkDevice device, + const char* pName) +{ + return radv_lookup_entrypoint(pName); +} + +VkResult radv_AllocateMemory( + VkDevice _device, + const VkMemoryAllocateInfo* pAllocateInfo, + const VkAllocationCallbacks* pAllocator, + VkDeviceMemory* pMem) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + struct radv_device_memory *mem; + VkResult result; + enum radeon_bo_domain domain; + uint32_t flags = 0; + assert(pAllocateInfo->sType == VK_STRUCTURE_TYPE_MEMORY_ALLOCATE_INFO); + + if (pAllocateInfo->allocationSize == 0) { + /* Apparently, this is allowed */ + *pMem = VK_NULL_HANDLE; + return VK_SUCCESS; + } + + mem = vk_alloc2(&device->alloc, pAllocator, sizeof(*mem), 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (mem == NULL) + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + + uint64_t alloc_size = align_u64(pAllocateInfo->allocationSize, 4096); + if (pAllocateInfo->memoryTypeIndex == RADV_MEM_TYPE_GTT_WRITE_COMBINE || + pAllocateInfo->memoryTypeIndex == RADV_MEM_TYPE_GTT_CACHED) + domain = RADEON_DOMAIN_GTT; + else + domain = RADEON_DOMAIN_VRAM; + + if (pAllocateInfo->memoryTypeIndex == RADV_MEM_TYPE_VRAM) + flags |= RADEON_FLAG_NO_CPU_ACCESS; + else + flags |= RADEON_FLAG_CPU_ACCESS; + + if (pAllocateInfo->memoryTypeIndex == RADV_MEM_TYPE_GTT_WRITE_COMBINE) + flags |= RADEON_FLAG_GTT_WC; + + mem->bo = device->ws->buffer_create(device->ws, alloc_size, 65536, + domain, flags); + + if (!mem->bo) { + result = VK_ERROR_OUT_OF_DEVICE_MEMORY; + goto fail; + } + mem->type_index = pAllocateInfo->memoryTypeIndex; + + *pMem = radv_device_memory_to_handle(mem); + + return VK_SUCCESS; + +fail: + vk_free2(&device->alloc, pAllocator, mem); + + return result; +} + +void radv_FreeMemory( + VkDevice _device, + VkDeviceMemory _mem, + const VkAllocationCallbacks* pAllocator) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_device_memory, mem, _mem); + + if (mem == NULL) + return; + + device->ws->buffer_destroy(mem->bo); + mem->bo = NULL; + + vk_free2(&device->alloc, pAllocator, mem); +} + +VkResult radv_MapMemory( + VkDevice _device, + VkDeviceMemory _memory, + VkDeviceSize offset, + VkDeviceSize size, + VkMemoryMapFlags flags, + void** ppData) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_device_memory, mem, _memory); + + if (mem == NULL) { + *ppData = NULL; + return VK_SUCCESS; + } + + *ppData = device->ws->buffer_map(mem->bo); + if (*ppData) { + *ppData += offset; + return VK_SUCCESS; + } + + return VK_ERROR_MEMORY_MAP_FAILED; +} + +void radv_UnmapMemory( + VkDevice _device, + VkDeviceMemory _memory) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_device_memory, mem, _memory); + + if (mem == NULL) + return; + + device->ws->buffer_unmap(mem->bo); +} + +VkResult radv_FlushMappedMemoryRanges( + VkDevice _device, + uint32_t memoryRangeCount, + const VkMappedMemoryRange* pMemoryRanges) +{ + return VK_SUCCESS; +} + +VkResult radv_InvalidateMappedMemoryRanges( + VkDevice _device, + uint32_t memoryRangeCount, + const VkMappedMemoryRange* pMemoryRanges) +{ + return VK_SUCCESS; +} + +void radv_GetBufferMemoryRequirements( + VkDevice device, + VkBuffer _buffer, + VkMemoryRequirements* pMemoryRequirements) +{ + RADV_FROM_HANDLE(radv_buffer, buffer, _buffer); + + pMemoryRequirements->memoryTypeBits = (1u << RADV_MEM_TYPE_COUNT) - 1; + + pMemoryRequirements->size = buffer->size; + pMemoryRequirements->alignment = 16; +} + +void radv_GetImageMemoryRequirements( + VkDevice device, + VkImage _image, + VkMemoryRequirements* pMemoryRequirements) +{ + RADV_FROM_HANDLE(radv_image, image, _image); + + pMemoryRequirements->memoryTypeBits = (1u << RADV_MEM_TYPE_COUNT) - 1; + + pMemoryRequirements->size = image->size; + pMemoryRequirements->alignment = image->alignment; +} + +void radv_GetImageSparseMemoryRequirements( + VkDevice device, + VkImage image, + uint32_t* pSparseMemoryRequirementCount, + VkSparseImageMemoryRequirements* pSparseMemoryRequirements) +{ + stub(); +} + +void radv_GetDeviceMemoryCommitment( + VkDevice device, + VkDeviceMemory memory, + VkDeviceSize* pCommittedMemoryInBytes) +{ + *pCommittedMemoryInBytes = 0; +} + +VkResult radv_BindBufferMemory( + VkDevice device, + VkBuffer _buffer, + VkDeviceMemory _memory, + VkDeviceSize memoryOffset) +{ + RADV_FROM_HANDLE(radv_device_memory, mem, _memory); + RADV_FROM_HANDLE(radv_buffer, buffer, _buffer); + + if (mem) { + buffer->bo = mem->bo; + buffer->offset = memoryOffset; + } else { + buffer->bo = NULL; + buffer->offset = 0; + } + + return VK_SUCCESS; +} + +VkResult radv_BindImageMemory( + VkDevice device, + VkImage _image, + VkDeviceMemory _memory, + VkDeviceSize memoryOffset) +{ + RADV_FROM_HANDLE(radv_device_memory, mem, _memory); + RADV_FROM_HANDLE(radv_image, image, _image); + + if (mem) { + image->bo = mem->bo; + image->offset = memoryOffset; + } else { + image->bo = NULL; + image->offset = 0; + } + + return VK_SUCCESS; +} + +VkResult radv_QueueBindSparse( + VkQueue queue, + uint32_t bindInfoCount, + const VkBindSparseInfo* pBindInfo, + VkFence fence) +{ + stub_return(VK_ERROR_INCOMPATIBLE_DRIVER); +} + +VkResult radv_CreateFence( + VkDevice _device, + const VkFenceCreateInfo* pCreateInfo, + const VkAllocationCallbacks* pAllocator, + VkFence* pFence) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + struct radv_fence *fence = vk_alloc2(&device->alloc, pAllocator, + sizeof(*fence), 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + + if (!fence) + return VK_ERROR_OUT_OF_HOST_MEMORY; + + memset(fence, 0, sizeof(*fence)); + fence->submitted = false; + fence->signalled = !!(pCreateInfo->flags & VK_FENCE_CREATE_SIGNALED_BIT); + fence->fence = device->ws->create_fence(); + if (!fence->fence) { + vk_free2(&device->alloc, pAllocator, fence); + return VK_ERROR_OUT_OF_HOST_MEMORY; + } + + *pFence = radv_fence_to_handle(fence); + + return VK_SUCCESS; +} + +void radv_DestroyFence( + VkDevice _device, + VkFence _fence, + const VkAllocationCallbacks* pAllocator) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_fence, fence, _fence); + + if (!fence) + return; + device->ws->destroy_fence(fence->fence); + vk_free2(&device->alloc, pAllocator, fence); +} + +static uint64_t radv_get_absolute_timeout(uint64_t timeout) +{ + uint64_t current_time; + struct timespec tv; + + clock_gettime(CLOCK_MONOTONIC, &tv); + current_time = tv.tv_nsec + tv.tv_sec*1000000000ull; + + timeout = MIN2(UINT64_MAX - current_time, timeout); + + return current_time + timeout; +} + +VkResult radv_WaitForFences( + VkDevice _device, + uint32_t fenceCount, + const VkFence* pFences, + VkBool32 waitAll, + uint64_t timeout) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + timeout = radv_get_absolute_timeout(timeout); + + if (!waitAll && fenceCount > 1) { + fprintf(stderr, "radv: WaitForFences without waitAll not implemented yet\n"); + } + + for (uint32_t i = 0; i < fenceCount; ++i) { + RADV_FROM_HANDLE(radv_fence, fence, pFences[i]); + bool expired = false; + + if (fence->signalled) + continue; + + if (!fence->submitted) + return VK_TIMEOUT; + + expired = device->ws->fence_wait(device->ws, fence->fence, true, timeout); + if (!expired) + return VK_TIMEOUT; + + fence->signalled = true; + } + + return VK_SUCCESS; +} + +VkResult radv_ResetFences(VkDevice device, + uint32_t fenceCount, + const VkFence *pFences) +{ + for (unsigned i = 0; i < fenceCount; ++i) { + RADV_FROM_HANDLE(radv_fence, fence, pFences[i]); + fence->submitted = fence->signalled = false; + } + + return VK_SUCCESS; +} + +VkResult radv_GetFenceStatus(VkDevice _device, VkFence _fence) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_fence, fence, _fence); + + if (fence->signalled) + return VK_SUCCESS; + if (!fence->submitted) + return VK_NOT_READY; + + if (!device->ws->fence_wait(device->ws, fence->fence, false, 0)) + return VK_NOT_READY; + + return VK_SUCCESS; +} + + +// Queue semaphore functions + +VkResult radv_CreateSemaphore( + VkDevice _device, + const VkSemaphoreCreateInfo* pCreateInfo, + const VkAllocationCallbacks* pAllocator, + VkSemaphore* pSemaphore) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + struct radeon_winsys_sem *sem; + + sem = device->ws->create_sem(device->ws); + if (!sem) + return VK_ERROR_OUT_OF_HOST_MEMORY; + + *pSemaphore = (VkSemaphore)sem; + return VK_SUCCESS; +} + +void radv_DestroySemaphore( + VkDevice _device, + VkSemaphore _semaphore, + const VkAllocationCallbacks* pAllocator) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + struct radeon_winsys_sem *sem; + if (!_semaphore) + return; + + sem = (struct radeon_winsys_sem *)_semaphore; + device->ws->destroy_sem(sem); +} + +VkResult radv_CreateEvent( + VkDevice _device, + const VkEventCreateInfo* pCreateInfo, + const VkAllocationCallbacks* pAllocator, + VkEvent* pEvent) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + struct radv_event *event = vk_alloc2(&device->alloc, pAllocator, + sizeof(*event), 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + + if (!event) + return VK_ERROR_OUT_OF_HOST_MEMORY; + + event->bo = device->ws->buffer_create(device->ws, 8, 8, + RADEON_DOMAIN_GTT, + RADEON_FLAG_CPU_ACCESS); + if (!event->bo) { + vk_free2(&device->alloc, pAllocator, event); + return VK_ERROR_OUT_OF_DEVICE_MEMORY; + } + + event->map = (uint64_t*)device->ws->buffer_map(event->bo); + + *pEvent = radv_event_to_handle(event); + + return VK_SUCCESS; +} + +void radv_DestroyEvent( + VkDevice _device, + VkEvent _event, + const VkAllocationCallbacks* pAllocator) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_event, event, _event); + + if (!event) + return; + device->ws->buffer_destroy(event->bo); + vk_free2(&device->alloc, pAllocator, event); +} + +VkResult radv_GetEventStatus( + VkDevice _device, + VkEvent _event) +{ + RADV_FROM_HANDLE(radv_event, event, _event); + + if (*event->map == 1) + return VK_EVENT_SET; + return VK_EVENT_RESET; +} + +VkResult radv_SetEvent( + VkDevice _device, + VkEvent _event) +{ + RADV_FROM_HANDLE(radv_event, event, _event); + *event->map = 1; + + return VK_SUCCESS; +} + +VkResult radv_ResetEvent( + VkDevice _device, + VkEvent _event) +{ + RADV_FROM_HANDLE(radv_event, event, _event); + *event->map = 0; + + return VK_SUCCESS; +} + +VkResult radv_CreateBuffer( + VkDevice _device, + const VkBufferCreateInfo* pCreateInfo, + const VkAllocationCallbacks* pAllocator, + VkBuffer* pBuffer) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + struct radv_buffer *buffer; + + assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_BUFFER_CREATE_INFO); + + buffer = vk_alloc2(&device->alloc, pAllocator, sizeof(*buffer), 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (buffer == NULL) + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + + buffer->size = pCreateInfo->size; + buffer->usage = pCreateInfo->usage; + buffer->bo = NULL; + buffer->offset = 0; + + *pBuffer = radv_buffer_to_handle(buffer); + + return VK_SUCCESS; +} + +void radv_DestroyBuffer( + VkDevice _device, + VkBuffer _buffer, + const VkAllocationCallbacks* pAllocator) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_buffer, buffer, _buffer); + + if (!buffer) + return; + + vk_free2(&device->alloc, pAllocator, buffer); +} + +static inline unsigned +si_tile_mode_index(const struct radv_image *image, unsigned level, bool stencil) +{ + if (stencil) + return image->surface.stencil_tiling_index[level]; + else + return image->surface.tiling_index[level]; +} + +static void +radv_initialise_color_surface(struct radv_device *device, + struct radv_color_buffer_info *cb, + struct radv_image_view *iview) +{ + const struct vk_format_description *desc; + unsigned ntype, format, swap, endian; + unsigned blend_clamp = 0, blend_bypass = 0; + unsigned pitch_tile_max, slice_tile_max, tile_mode_index; + uint64_t va; + const struct radeon_surf *surf = &iview->image->surface; + const struct radeon_surf_level *level_info = &surf->level[iview->base_mip]; + + desc = vk_format_description(iview->vk_format); + + memset(cb, 0, sizeof(*cb)); + + va = device->ws->buffer_get_va(iview->bo) + iview->image->offset; + va += level_info->offset; + cb->cb_color_base = va >> 8; + + /* CMASK variables */ + va = device->ws->buffer_get_va(iview->bo) + iview->image->offset; + va += iview->image->cmask.offset; + cb->cb_color_cmask = va >> 8; + cb->cb_color_cmask_slice = iview->image->cmask.slice_tile_max; + + va = device->ws->buffer_get_va(iview->bo) + iview->image->offset; + va += iview->image->dcc_offset; + cb->cb_dcc_base = va >> 8; + + cb->cb_color_view = S_028C6C_SLICE_START(iview->base_layer) | + S_028C6C_SLICE_MAX(iview->base_layer + iview->extent.depth - 1); + + cb->micro_tile_mode = iview->image->surface.micro_tile_mode; + pitch_tile_max = level_info->nblk_x / 8 - 1; + slice_tile_max = (level_info->nblk_x * level_info->nblk_y) / 64 - 1; + tile_mode_index = si_tile_mode_index(iview->image, iview->base_mip, false); + + cb->cb_color_pitch = S_028C64_TILE_MAX(pitch_tile_max); + cb->cb_color_slice = S_028C68_TILE_MAX(slice_tile_max); + + /* Intensity is implemented as Red, so treat it that way. */ + cb->cb_color_attrib = S_028C74_FORCE_DST_ALPHA_1(desc->swizzle[3] == VK_SWIZZLE_1) | + S_028C74_TILE_MODE_INDEX(tile_mode_index); + + if (iview->image->samples > 1) { + unsigned log_samples = util_logbase2(iview->image->samples); + + cb->cb_color_attrib |= S_028C74_NUM_SAMPLES(log_samples) | + S_028C74_NUM_FRAGMENTS(log_samples); + } + + if (iview->image->fmask.size) { + va = device->ws->buffer_get_va(iview->bo) + iview->image->offset + iview->image->fmask.offset; + if (device->physical_device->rad_info.chip_class >= CIK) + cb->cb_color_pitch |= S_028C64_FMASK_TILE_MAX(iview->image->fmask.pitch_in_pixels / 8 - 1); + cb->cb_color_attrib |= S_028C74_FMASK_TILE_MODE_INDEX(iview->image->fmask.tile_mode_index); + cb->cb_color_fmask = va >> 8; + cb->cb_color_fmask_slice = S_028C88_TILE_MAX(iview->image->fmask.slice_tile_max); + } else { + /* This must be set for fast clear to work without FMASK. */ + if (device->physical_device->rad_info.chip_class >= CIK) + cb->cb_color_pitch |= S_028C64_FMASK_TILE_MAX(pitch_tile_max); + cb->cb_color_attrib |= S_028C74_FMASK_TILE_MODE_INDEX(tile_mode_index); + cb->cb_color_fmask = cb->cb_color_base; + cb->cb_color_fmask_slice = S_028C88_TILE_MAX(slice_tile_max); + } + + ntype = radv_translate_color_numformat(iview->vk_format, + desc, + vk_format_get_first_non_void_channel(iview->vk_format)); + format = radv_translate_colorformat(iview->vk_format); + if (format == V_028C70_COLOR_INVALID || ntype == ~0u) + radv_finishme("Illegal color\n"); + swap = radv_translate_colorswap(iview->vk_format, FALSE); + endian = radv_colorformat_endian_swap(format); + + /* blend clamp should be set for all NORM/SRGB types */ + if (ntype == V_028C70_NUMBER_UNORM || + ntype == V_028C70_NUMBER_SNORM || + ntype == V_028C70_NUMBER_SRGB) + blend_clamp = 1; + + /* set blend bypass according to docs if SINT/UINT or + 8/24 COLOR variants */ + if (ntype == V_028C70_NUMBER_UINT || ntype == V_028C70_NUMBER_SINT || + format == V_028C70_COLOR_8_24 || format == V_028C70_COLOR_24_8 || + format == V_028C70_COLOR_X24_8_32_FLOAT) { + blend_clamp = 0; + blend_bypass = 1; + } +#if 0 + if ((ntype == V_028C70_NUMBER_UINT || ntype == V_028C70_NUMBER_SINT) && + (format == V_028C70_COLOR_8 || + format == V_028C70_COLOR_8_8 || + format == V_028C70_COLOR_8_8_8_8)) + ->color_is_int8 = true; +#endif + cb->cb_color_info = S_028C70_FORMAT(format) | + S_028C70_COMP_SWAP(swap) | + S_028C70_BLEND_CLAMP(blend_clamp) | + S_028C70_BLEND_BYPASS(blend_bypass) | + S_028C70_SIMPLE_FLOAT(1) | + S_028C70_ROUND_MODE(ntype != V_028C70_NUMBER_UNORM && + ntype != V_028C70_NUMBER_SNORM && + ntype != V_028C70_NUMBER_SRGB && + format != V_028C70_COLOR_8_24 && + format != V_028C70_COLOR_24_8) | + S_028C70_NUMBER_TYPE(ntype) | + S_028C70_ENDIAN(endian); + if (iview->image->samples > 1) + if (iview->image->fmask.size) + cb->cb_color_info |= S_028C70_COMPRESSION(1); + + if (iview->image->cmask.size && + (device->debug_flags & RADV_DEBUG_FAST_CLEARS)) + cb->cb_color_info |= S_028C70_FAST_CLEAR(1); + + if (iview->image->surface.dcc_size && level_info->dcc_enabled) + cb->cb_color_info |= S_028C70_DCC_ENABLE(1); + + if (device->physical_device->rad_info.chip_class >= VI) { + unsigned max_uncompressed_block_size = 2; + if (iview->image->samples > 1) { + if (iview->image->surface.bpe == 1) + max_uncompressed_block_size = 0; + else if (iview->image->surface.bpe == 2) + max_uncompressed_block_size = 1; + } + + cb->cb_dcc_control = S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(max_uncompressed_block_size) | + S_028C78_INDEPENDENT_64B_BLOCKS(1); + } + + /* This must be set for fast clear to work without FMASK. */ + if (!iview->image->fmask.size && + device->physical_device->rad_info.chip_class == SI) { + unsigned bankh = util_logbase2(iview->image->surface.bankh); + cb->cb_color_attrib |= S_028C74_FMASK_BANK_HEIGHT(bankh); + } +} + +static void +radv_initialise_ds_surface(struct radv_device *device, + struct radv_ds_buffer_info *ds, + struct radv_image_view *iview) +{ + unsigned level = iview->base_mip; + unsigned format; + uint64_t va, s_offs, z_offs; + const struct radeon_surf_level *level_info = &iview->image->surface.level[level]; + memset(ds, 0, sizeof(*ds)); + switch (iview->vk_format) { + case VK_FORMAT_D24_UNORM_S8_UINT: + case VK_FORMAT_X8_D24_UNORM_PACK32: + ds->pa_su_poly_offset_db_fmt_cntl = S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-24); + ds->offset_scale = 2.0f; + break; + case VK_FORMAT_D16_UNORM: + case VK_FORMAT_D16_UNORM_S8_UINT: + ds->pa_su_poly_offset_db_fmt_cntl = S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-16); + ds->offset_scale = 4.0f; + break; + case VK_FORMAT_D32_SFLOAT: + case VK_FORMAT_D32_SFLOAT_S8_UINT: + ds->pa_su_poly_offset_db_fmt_cntl = S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-23) | + S_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(1); + ds->offset_scale = 1.0f; + break; + default: + break; + } + + format = radv_translate_dbformat(iview->vk_format); + if (format == V_028040_Z_INVALID) { + fprintf(stderr, "Invalid DB format: %d, disabling DB.\n", iview->vk_format); + } + + va = device->ws->buffer_get_va(iview->bo) + iview->image->offset; + s_offs = z_offs = va; + z_offs += iview->image->surface.level[level].offset; + s_offs += iview->image->surface.stencil_level[level].offset; + + ds->db_depth_view = S_028008_SLICE_START(iview->base_layer) | + S_028008_SLICE_MAX(iview->base_layer + iview->extent.depth - 1); + ds->db_depth_info = S_02803C_ADDR5_SWIZZLE_MASK(1); + ds->db_z_info = S_028040_FORMAT(format) | S_028040_ZRANGE_PRECISION(1); + + if (iview->image->samples > 1) + ds->db_z_info |= S_028040_NUM_SAMPLES(util_logbase2(iview->image->samples)); + + if (iview->image->surface.flags & RADEON_SURF_SBUFFER) + ds->db_stencil_info = S_028044_FORMAT(V_028044_STENCIL_8); + else + ds->db_stencil_info = S_028044_FORMAT(V_028044_STENCIL_INVALID); + + if (device->physical_device->rad_info.chip_class >= CIK) { + struct radeon_info *info = &device->physical_device->rad_info; + unsigned tiling_index = iview->image->surface.tiling_index[level]; + unsigned stencil_index = iview->image->surface.stencil_tiling_index[level]; + unsigned macro_index = iview->image->surface.macro_tile_index; + unsigned tile_mode = info->si_tile_mode_array[tiling_index]; + unsigned stencil_tile_mode = info->si_tile_mode_array[stencil_index]; + unsigned macro_mode = info->cik_macrotile_mode_array[macro_index]; + + ds->db_depth_info |= + S_02803C_ARRAY_MODE(G_009910_ARRAY_MODE(tile_mode)) | + S_02803C_PIPE_CONFIG(G_009910_PIPE_CONFIG(tile_mode)) | + S_02803C_BANK_WIDTH(G_009990_BANK_WIDTH(macro_mode)) | + S_02803C_BANK_HEIGHT(G_009990_BANK_HEIGHT(macro_mode)) | + S_02803C_MACRO_TILE_ASPECT(G_009990_MACRO_TILE_ASPECT(macro_mode)) | + S_02803C_NUM_BANKS(G_009990_NUM_BANKS(macro_mode)); + ds->db_z_info |= S_028040_TILE_SPLIT(G_009910_TILE_SPLIT(tile_mode)); + ds->db_stencil_info |= S_028044_TILE_SPLIT(G_009910_TILE_SPLIT(stencil_tile_mode)); + } else { + unsigned tile_mode_index = si_tile_mode_index(iview->image, level, false); + ds->db_z_info |= S_028040_TILE_MODE_INDEX(tile_mode_index); + tile_mode_index = si_tile_mode_index(iview->image, level, true); + ds->db_stencil_info |= S_028044_TILE_MODE_INDEX(tile_mode_index); + } + + if (iview->image->htile.size && !level) { + ds->db_z_info |= S_028040_TILE_SURFACE_ENABLE(1) | + S_028040_ALLOW_EXPCLEAR(1); + + if (iview->image->surface.flags & RADEON_SURF_SBUFFER) { + /* Workaround: For a not yet understood reason, the + * combination of MSAA, fast stencil clear and stencil + * decompress messes with subsequent stencil buffer + * uses. Problem was reproduced on Verde, Bonaire, + * Tonga, and Carrizo. + * + * Disabling EXPCLEAR works around the problem. + * + * Check piglit's arb_texture_multisample-stencil-clear + * test if you want to try changing this. + */ + if (iview->image->samples <= 1) + ds->db_stencil_info |= S_028044_ALLOW_EXPCLEAR(1); + } else + /* Use all of the htile_buffer for depth if there's no stencil. */ + ds->db_stencil_info |= S_028044_TILE_STENCIL_DISABLE(1); + + va = device->ws->buffer_get_va(iview->bo) + iview->image->offset + + iview->image->htile.offset; + ds->db_htile_data_base = va >> 8; + ds->db_htile_surface = S_028ABC_FULL_CACHE(1); + } else { + ds->db_htile_data_base = 0; + ds->db_htile_surface = 0; + } + + ds->db_z_read_base = ds->db_z_write_base = z_offs >> 8; + ds->db_stencil_read_base = ds->db_stencil_write_base = s_offs >> 8; + + ds->db_depth_size = S_028058_PITCH_TILE_MAX((level_info->nblk_x / 8) - 1) | + S_028058_HEIGHT_TILE_MAX((level_info->nblk_y / 8) - 1); + ds->db_depth_slice = S_02805C_SLICE_TILE_MAX((level_info->nblk_x * level_info->nblk_y) / 64 - 1); +} + +VkResult radv_CreateFramebuffer( + VkDevice _device, + const VkFramebufferCreateInfo* pCreateInfo, + const VkAllocationCallbacks* pAllocator, + VkFramebuffer* pFramebuffer) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + struct radv_framebuffer *framebuffer; + + assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO); + + size_t size = sizeof(*framebuffer) + + sizeof(struct radv_attachment_info) * pCreateInfo->attachmentCount; + framebuffer = vk_alloc2(&device->alloc, pAllocator, size, 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (framebuffer == NULL) + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + + framebuffer->attachment_count = pCreateInfo->attachmentCount; + for (uint32_t i = 0; i < pCreateInfo->attachmentCount; i++) { + VkImageView _iview = pCreateInfo->pAttachments[i]; + struct radv_image_view *iview = radv_image_view_from_handle(_iview); + framebuffer->attachments[i].attachment = iview; + if (iview->aspect_mask & VK_IMAGE_ASPECT_COLOR_BIT) { + radv_initialise_color_surface(device, &framebuffer->attachments[i].cb, iview); + } else if (iview->aspect_mask & (VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT)) { + radv_initialise_ds_surface(device, &framebuffer->attachments[i].ds, iview); + } + } + + framebuffer->width = pCreateInfo->width; + framebuffer->height = pCreateInfo->height; + framebuffer->layers = pCreateInfo->layers; + + *pFramebuffer = radv_framebuffer_to_handle(framebuffer); + return VK_SUCCESS; +} + +void radv_DestroyFramebuffer( + VkDevice _device, + VkFramebuffer _fb, + const VkAllocationCallbacks* pAllocator) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_framebuffer, fb, _fb); + + if (!fb) + return; + vk_free2(&device->alloc, pAllocator, fb); +} + +static unsigned radv_tex_wrap(VkSamplerAddressMode address_mode) +{ + switch (address_mode) { + case VK_SAMPLER_ADDRESS_MODE_REPEAT: + return V_008F30_SQ_TEX_WRAP; + case VK_SAMPLER_ADDRESS_MODE_MIRRORED_REPEAT: + return V_008F30_SQ_TEX_MIRROR; + case VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE: + return V_008F30_SQ_TEX_CLAMP_LAST_TEXEL; + case VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_BORDER: + return V_008F30_SQ_TEX_CLAMP_BORDER; + case VK_SAMPLER_ADDRESS_MODE_MIRROR_CLAMP_TO_EDGE: + return V_008F30_SQ_TEX_MIRROR_ONCE_LAST_TEXEL; + default: + unreachable("illegal tex wrap mode"); + break; + } +} + +static unsigned +radv_tex_compare(VkCompareOp op) +{ + switch (op) { + case VK_COMPARE_OP_NEVER: + return V_008F30_SQ_TEX_DEPTH_COMPARE_NEVER; + case VK_COMPARE_OP_LESS: + return V_008F30_SQ_TEX_DEPTH_COMPARE_LESS; + case VK_COMPARE_OP_EQUAL: + return V_008F30_SQ_TEX_DEPTH_COMPARE_EQUAL; + case VK_COMPARE_OP_LESS_OR_EQUAL: + return V_008F30_SQ_TEX_DEPTH_COMPARE_LESSEQUAL; + case VK_COMPARE_OP_GREATER: + return V_008F30_SQ_TEX_DEPTH_COMPARE_GREATER; + case VK_COMPARE_OP_NOT_EQUAL: + return V_008F30_SQ_TEX_DEPTH_COMPARE_NOTEQUAL; + case VK_COMPARE_OP_GREATER_OR_EQUAL: + return V_008F30_SQ_TEX_DEPTH_COMPARE_GREATEREQUAL; + case VK_COMPARE_OP_ALWAYS: + return V_008F30_SQ_TEX_DEPTH_COMPARE_ALWAYS; + default: + unreachable("illegal compare mode"); + break; + } +} + +static unsigned +radv_tex_filter(VkFilter filter, unsigned max_ansio) +{ + switch (filter) { + case VK_FILTER_NEAREST: + return (max_ansio > 1 ? V_008F38_SQ_TEX_XY_FILTER_ANISO_POINT : + V_008F38_SQ_TEX_XY_FILTER_POINT); + case VK_FILTER_LINEAR: + return (max_ansio > 1 ? V_008F38_SQ_TEX_XY_FILTER_ANISO_BILINEAR : + V_008F38_SQ_TEX_XY_FILTER_BILINEAR); + case VK_FILTER_CUBIC_IMG: + default: + fprintf(stderr, "illegal texture filter"); + return 0; + } +} + +static unsigned +radv_tex_mipfilter(VkSamplerMipmapMode mode) +{ + switch (mode) { + case VK_SAMPLER_MIPMAP_MODE_NEAREST: + return V_008F38_SQ_TEX_Z_FILTER_POINT; + case VK_SAMPLER_MIPMAP_MODE_LINEAR: + return V_008F38_SQ_TEX_Z_FILTER_LINEAR; + default: + return V_008F38_SQ_TEX_Z_FILTER_NONE; + } +} + +static unsigned +radv_tex_bordercolor(VkBorderColor bcolor) +{ + switch (bcolor) { + case VK_BORDER_COLOR_FLOAT_TRANSPARENT_BLACK: + case VK_BORDER_COLOR_INT_TRANSPARENT_BLACK: + return V_008F3C_SQ_TEX_BORDER_COLOR_TRANS_BLACK; + case VK_BORDER_COLOR_FLOAT_OPAQUE_BLACK: + case VK_BORDER_COLOR_INT_OPAQUE_BLACK: + return V_008F3C_SQ_TEX_BORDER_COLOR_OPAQUE_BLACK; + case VK_BORDER_COLOR_FLOAT_OPAQUE_WHITE: + case VK_BORDER_COLOR_INT_OPAQUE_WHITE: + return V_008F3C_SQ_TEX_BORDER_COLOR_OPAQUE_WHITE; + default: + break; + } + return 0; +} + +static unsigned +radv_tex_aniso_filter(unsigned filter) +{ + if (filter < 2) + return 0; + if (filter < 4) + return 1; + if (filter < 8) + return 2; + if (filter < 16) + return 3; + return 4; +} + +static void +radv_init_sampler(struct radv_device *device, + struct radv_sampler *sampler, + const VkSamplerCreateInfo *pCreateInfo) +{ + uint32_t max_aniso = pCreateInfo->anisotropyEnable && pCreateInfo->maxAnisotropy > 1.0 ? + (uint32_t) pCreateInfo->maxAnisotropy : 0; + uint32_t max_aniso_ratio = radv_tex_aniso_filter(max_aniso); + bool is_vi = (device->physical_device->rad_info.chip_class >= VI); + + sampler->state[0] = (S_008F30_CLAMP_X(radv_tex_wrap(pCreateInfo->addressModeU)) | + S_008F30_CLAMP_Y(radv_tex_wrap(pCreateInfo->addressModeV)) | + S_008F30_CLAMP_Z(radv_tex_wrap(pCreateInfo->addressModeW)) | + S_008F30_MAX_ANISO_RATIO(max_aniso_ratio) | + S_008F30_DEPTH_COMPARE_FUNC(radv_tex_compare(pCreateInfo->compareOp)) | + S_008F30_FORCE_UNNORMALIZED(pCreateInfo->unnormalizedCoordinates ? 1 : 0) | + S_008F30_ANISO_THRESHOLD(max_aniso_ratio >> 1) | + S_008F30_ANISO_BIAS(max_aniso_ratio) | + S_008F30_DISABLE_CUBE_WRAP(0) | + S_008F30_COMPAT_MODE(is_vi)); + sampler->state[1] = (S_008F34_MIN_LOD(S_FIXED(CLAMP(pCreateInfo->minLod, 0, 15), 8)) | + S_008F34_MAX_LOD(S_FIXED(CLAMP(pCreateInfo->maxLod, 0, 15), 8)) | + S_008F34_PERF_MIP(max_aniso_ratio ? max_aniso_ratio + 6 : 0)); + sampler->state[2] = (S_008F38_LOD_BIAS(S_FIXED(CLAMP(pCreateInfo->mipLodBias, -16, 16), 8)) | + S_008F38_XY_MAG_FILTER(radv_tex_filter(pCreateInfo->magFilter, max_aniso)) | + S_008F38_XY_MIN_FILTER(radv_tex_filter(pCreateInfo->minFilter, max_aniso)) | + S_008F38_MIP_FILTER(radv_tex_mipfilter(pCreateInfo->mipmapMode)) | + S_008F38_MIP_POINT_PRECLAMP(0) | + S_008F38_DISABLE_LSB_CEIL(1) | + S_008F38_FILTER_PREC_FIX(1) | + S_008F38_ANISO_OVERRIDE(is_vi)); + sampler->state[3] = (S_008F3C_BORDER_COLOR_PTR(0) | + S_008F3C_BORDER_COLOR_TYPE(radv_tex_bordercolor(pCreateInfo->borderColor))); +} + +VkResult radv_CreateSampler( + VkDevice _device, + const VkSamplerCreateInfo* pCreateInfo, + const VkAllocationCallbacks* pAllocator, + VkSampler* pSampler) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + struct radv_sampler *sampler; + + assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO); + + sampler = vk_alloc2(&device->alloc, pAllocator, sizeof(*sampler), 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (!sampler) + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + + radv_init_sampler(device, sampler, pCreateInfo); + *pSampler = radv_sampler_to_handle(sampler); + + return VK_SUCCESS; +} + +void radv_DestroySampler( + VkDevice _device, + VkSampler _sampler, + const VkAllocationCallbacks* pAllocator) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_sampler, sampler, _sampler); + + if (!sampler) + return; + vk_free2(&device->alloc, pAllocator, sampler); +} + + +/* vk_icd.h does not declare this function, so we declare it here to + * suppress Wmissing-prototypes. + */ +PUBLIC VKAPI_ATTR VkResult VKAPI_CALL +vk_icdNegotiateLoaderICDInterfaceVersion(uint32_t *pSupportedVersion); + +PUBLIC VKAPI_ATTR VkResult VKAPI_CALL +vk_icdNegotiateLoaderICDInterfaceVersion(uint32_t *pSupportedVersion) +{ + /* For the full details on loader interface versioning, see + * . + * What follows is a condensed summary, to help you navigate the large and + * confusing official doc. + * + * - Loader interface v0 is incompatible with later versions. We don't + * support it. + * + * - In loader interface v1: + * - The first ICD entrypoint called by the loader is + * vk_icdGetInstanceProcAddr(). The ICD must statically expose this + * entrypoint. + * - The ICD must statically expose no other Vulkan symbol unless it is + * linked with -Bsymbolic. + * - Each dispatchable Vulkan handle created by the ICD must be + * a pointer to a struct whose first member is VK_LOADER_DATA. The + * ICD must initialize VK_LOADER_DATA.loadMagic to ICD_LOADER_MAGIC. + * - The loader implements vkCreate{PLATFORM}SurfaceKHR() and + * vkDestroySurfaceKHR(). The ICD must be capable of working with + * such loader-managed surfaces. + * + * - Loader interface v2 differs from v1 in: + * - The first ICD entrypoint called by the loader is + * vk_icdNegotiateLoaderICDInterfaceVersion(). The ICD must + * statically expose this entrypoint. + * + * - Loader interface v3 differs from v2 in: + * - The ICD must implement vkCreate{PLATFORM}SurfaceKHR(), + * vkDestroySurfaceKHR(), and other API which uses VKSurfaceKHR, + * because the loader no longer does so. + */ + *pSupportedVersion = MIN2(*pSupportedVersion, 3u); + return VK_SUCCESS; +} diff -Nru mesa-12.0.6/src/amd/vulkan/radv_entrypoints.c mesa-17.0.7/src/amd/vulkan/radv_entrypoints.c --- mesa-12.0.6/src/amd/vulkan/radv_entrypoints.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_entrypoints.c 2017-06-01 10:38:06.000000000 +0000 @@ -0,0 +1,938 @@ +/* + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +/* DO NOT EDIT! This is a generated file. */ + +#include "radv_private.h" + +struct radv_entrypoint { + uint32_t name; + uint32_t hash; +}; + +/* We use a big string constant to avoid lots of reloctions from the entry + * point table to lots of little strings. The entries in the entry point table + * store the index into this big string. + */ + +static const char strings[] = + "vkCreateInstance\0" + "vkDestroyInstance\0" + "vkEnumeratePhysicalDevices\0" + "vkGetDeviceProcAddr\0" + "vkGetInstanceProcAddr\0" + "vkGetPhysicalDeviceProperties\0" + "vkGetPhysicalDeviceQueueFamilyProperties\0" + "vkGetPhysicalDeviceMemoryProperties\0" + "vkGetPhysicalDeviceFeatures\0" + "vkGetPhysicalDeviceFormatProperties\0" + "vkGetPhysicalDeviceImageFormatProperties\0" + "vkCreateDevice\0" + "vkDestroyDevice\0" + "vkEnumerateInstanceLayerProperties\0" + "vkEnumerateInstanceExtensionProperties\0" + "vkEnumerateDeviceLayerProperties\0" + "vkEnumerateDeviceExtensionProperties\0" + "vkGetDeviceQueue\0" + "vkQueueSubmit\0" + "vkQueueWaitIdle\0" + "vkDeviceWaitIdle\0" + "vkAllocateMemory\0" + "vkFreeMemory\0" + "vkMapMemory\0" + "vkUnmapMemory\0" + "vkFlushMappedMemoryRanges\0" + "vkInvalidateMappedMemoryRanges\0" + "vkGetDeviceMemoryCommitment\0" + "vkGetBufferMemoryRequirements\0" + "vkBindBufferMemory\0" + "vkGetImageMemoryRequirements\0" + "vkBindImageMemory\0" + "vkGetImageSparseMemoryRequirements\0" + "vkGetPhysicalDeviceSparseImageFormatProperties\0" + "vkQueueBindSparse\0" + "vkCreateFence\0" + "vkDestroyFence\0" + "vkResetFences\0" + "vkGetFenceStatus\0" + "vkWaitForFences\0" + "vkCreateSemaphore\0" + "vkDestroySemaphore\0" + "vkCreateEvent\0" + "vkDestroyEvent\0" + "vkGetEventStatus\0" + "vkSetEvent\0" + "vkResetEvent\0" + "vkCreateQueryPool\0" + "vkDestroyQueryPool\0" + "vkGetQueryPoolResults\0" + "vkCreateBuffer\0" + "vkDestroyBuffer\0" + "vkCreateBufferView\0" + "vkDestroyBufferView\0" + "vkCreateImage\0" + "vkDestroyImage\0" + "vkGetImageSubresourceLayout\0" + "vkCreateImageView\0" + "vkDestroyImageView\0" + "vkCreateShaderModule\0" + "vkDestroyShaderModule\0" + "vkCreatePipelineCache\0" + "vkDestroyPipelineCache\0" + "vkGetPipelineCacheData\0" + "vkMergePipelineCaches\0" + "vkCreateGraphicsPipelines\0" + "vkCreateComputePipelines\0" + "vkDestroyPipeline\0" + "vkCreatePipelineLayout\0" + "vkDestroyPipelineLayout\0" + "vkCreateSampler\0" + "vkDestroySampler\0" + "vkCreateDescriptorSetLayout\0" + "vkDestroyDescriptorSetLayout\0" + "vkCreateDescriptorPool\0" + "vkDestroyDescriptorPool\0" + "vkResetDescriptorPool\0" + "vkAllocateDescriptorSets\0" + "vkFreeDescriptorSets\0" + "vkUpdateDescriptorSets\0" + "vkCreateFramebuffer\0" + "vkDestroyFramebuffer\0" + "vkCreateRenderPass\0" + "vkDestroyRenderPass\0" + "vkGetRenderAreaGranularity\0" + "vkCreateCommandPool\0" + "vkDestroyCommandPool\0" + "vkResetCommandPool\0" + "vkAllocateCommandBuffers\0" + "vkFreeCommandBuffers\0" + "vkBeginCommandBuffer\0" + "vkEndCommandBuffer\0" + "vkResetCommandBuffer\0" + "vkCmdBindPipeline\0" + "vkCmdSetViewport\0" + "vkCmdSetScissor\0" + "vkCmdSetLineWidth\0" + "vkCmdSetDepthBias\0" + "vkCmdSetBlendConstants\0" + "vkCmdSetDepthBounds\0" + "vkCmdSetStencilCompareMask\0" + "vkCmdSetStencilWriteMask\0" + "vkCmdSetStencilReference\0" + "vkCmdBindDescriptorSets\0" + "vkCmdBindIndexBuffer\0" + "vkCmdBindVertexBuffers\0" + "vkCmdDraw\0" + "vkCmdDrawIndexed\0" + "vkCmdDrawIndirect\0" + "vkCmdDrawIndexedIndirect\0" + "vkCmdDispatch\0" + "vkCmdDispatchIndirect\0" + "vkCmdCopyBuffer\0" + "vkCmdCopyImage\0" + "vkCmdBlitImage\0" + "vkCmdCopyBufferToImage\0" + "vkCmdCopyImageToBuffer\0" + "vkCmdUpdateBuffer\0" + "vkCmdFillBuffer\0" + "vkCmdClearColorImage\0" + "vkCmdClearDepthStencilImage\0" + "vkCmdClearAttachments\0" + "vkCmdResolveImage\0" + "vkCmdSetEvent\0" + "vkCmdResetEvent\0" + "vkCmdWaitEvents\0" + "vkCmdPipelineBarrier\0" + "vkCmdBeginQuery\0" + "vkCmdEndQuery\0" + "vkCmdResetQueryPool\0" + "vkCmdWriteTimestamp\0" + "vkCmdCopyQueryPoolResults\0" + "vkCmdPushConstants\0" + "vkCmdBeginRenderPass\0" + "vkCmdNextSubpass\0" + "vkCmdEndRenderPass\0" + "vkCmdExecuteCommands\0" + "vkCreateAndroidSurfaceKHR\0" + "vkGetPhysicalDeviceDisplayPropertiesKHR\0" + "vkGetPhysicalDeviceDisplayPlanePropertiesKHR\0" + "vkGetDisplayPlaneSupportedDisplaysKHR\0" + "vkGetDisplayModePropertiesKHR\0" + "vkCreateDisplayModeKHR\0" + "vkGetDisplayPlaneCapabilitiesKHR\0" + "vkCreateDisplayPlaneSurfaceKHR\0" + "vkCreateSharedSwapchainsKHR\0" + "vkCreateMirSurfaceKHR\0" + "vkGetPhysicalDeviceMirPresentationSupportKHR\0" + "vkDestroySurfaceKHR\0" + "vkGetPhysicalDeviceSurfaceSupportKHR\0" + "vkGetPhysicalDeviceSurfaceCapabilitiesKHR\0" + "vkGetPhysicalDeviceSurfaceFormatsKHR\0" + "vkGetPhysicalDeviceSurfacePresentModesKHR\0" + "vkCreateSwapchainKHR\0" + "vkDestroySwapchainKHR\0" + "vkGetSwapchainImagesKHR\0" + "vkAcquireNextImageKHR\0" + "vkQueuePresentKHR\0" + "vkCreateWaylandSurfaceKHR\0" + "vkGetPhysicalDeviceWaylandPresentationSupportKHR\0" + "vkCreateWin32SurfaceKHR\0" + "vkGetPhysicalDeviceWin32PresentationSupportKHR\0" + "vkCreateXlibSurfaceKHR\0" + "vkGetPhysicalDeviceXlibPresentationSupportKHR\0" + "vkCreateXcbSurfaceKHR\0" + "vkGetPhysicalDeviceXcbPresentationSupportKHR\0" + "vkCreateDebugReportCallbackEXT\0" + "vkDestroyDebugReportCallbackEXT\0" + "vkDebugReportMessageEXT\0" + "vkDebugMarkerSetObjectNameEXT\0" + "vkDebugMarkerSetObjectTagEXT\0" + "vkCmdDebugMarkerBeginEXT\0" + "vkCmdDebugMarkerEndEXT\0" + "vkCmdDebugMarkerInsertEXT\0" + "vkGetPhysicalDeviceExternalImageFormatPropertiesNV\0" + "vkGetMemoryWin32HandleNV\0" + "vkCmdDrawIndirectCountAMD\0" + "vkCmdDrawIndexedIndirectCountAMD\0" + "vkCmdProcessCommandsNVX\0" + "vkCmdReserveSpaceForCommandsNVX\0" + "vkCreateIndirectCommandsLayoutNVX\0" + "vkDestroyIndirectCommandsLayoutNVX\0" + "vkCreateObjectTableNVX\0" + "vkDestroyObjectTableNVX\0" + "vkRegisterObjectsNVX\0" + "vkUnregisterObjectsNVX\0" + "vkGetPhysicalDeviceGeneratedCommandsPropertiesNVX\0" + ; + +static const struct radv_entrypoint entrypoints[] = { + { 0, 0x38a581a6 }, + { 17, 0x9bd21af2 }, + { 35, 0x5787c327 }, + { 62, 0xba013486 }, + { 82, 0x3d2ae9ad }, + { 104, 0x52fe22c9 }, + { 134, 0x4e5fc88a }, + { 175, 0xa90da4da }, + { 211, 0x113e2f33 }, + { 239, 0x3e54b398 }, + { 275, 0xdd36a867 }, + { 316, 0x085ed23f }, + { 331, 0x1fbcc9cb }, + { 347, 0x081f69d8 }, + { 382, 0xeb27627e }, + { 421, 0x2f8566e7 }, + { 454, 0x5fd13eed }, + { 491, 0xcc920d9a }, + { 508, 0xfa4713ec }, + { 522, 0x6f8fc2a5 }, + { 538, 0xd46c5f24 }, + { 555, 0x522b85d3 }, + { 572, 0x8f6f838a }, + { 585, 0xcb977bd8 }, + { 597, 0x1a1a0e2f }, + { 611, 0xff52f051 }, + { 637, 0x1e115cca }, + { 668, 0x46e38db5 }, + { 696, 0xab98422a }, + { 726, 0x06bcbdcb }, + { 745, 0x916f1e63 }, + { 774, 0x5caaae4a }, + { 792, 0x15855f5b }, + { 827, 0x272ef8ef }, + { 874, 0xc3628a09 }, + { 892, 0x958af968 }, + { 906, 0xfc64ee3c }, + { 921, 0x684781dc }, + { 935, 0x5f391892 }, + { 952, 0x19d64c81 }, + { 968, 0xf2065e5b }, + { 986, 0xcaab1faf }, + { 1005, 0xe7188731 }, + { 1019, 0x4df27c05 }, + { 1034, 0x096d834b }, + { 1051, 0x592ae5f5 }, + { 1062, 0x6d373ba8 }, + { 1075, 0x5edcd92b }, + { 1093, 0x37819a7f }, + { 1112, 0xbf3f2cb3 }, + { 1134, 0x7d4282b9 }, + { 1149, 0x94a07a45 }, + { 1165, 0x925bd256 }, + { 1184, 0x98b27962 }, + { 1204, 0x652128c2 }, + { 1218, 0xcbfb1d96 }, + { 1233, 0x9163b686 }, + { 1261, 0xdce077ff }, + { 1279, 0xb5853953 }, + { 1298, 0xa0d3cea2 }, + { 1319, 0x2d77af6e }, + { 1341, 0xcbf6489f }, + { 1363, 0x4112a673 }, + { 1386, 0x2092a349 }, + { 1409, 0xc3499606 }, + { 1431, 0x4b59f96d }, + { 1457, 0xf70c85eb }, + { 1482, 0x6aac68af }, + { 1500, 0x451ef1ed }, + { 1523, 0x9146f879 }, + { 1547, 0x013cf03f }, + { 1563, 0x3b645153 }, + { 1580, 0x3c14cc74 }, + { 1608, 0xa4227b08 }, + { 1637, 0xfb95a8a4 }, + { 1660, 0x47bdaf30 }, + { 1684, 0x09bd85f5 }, + { 1706, 0x4c449d3a }, + { 1731, 0x7a1347b1 }, + { 1752, 0xbfd090ae }, + { 1775, 0x887a38c4 }, + { 1795, 0xdc428e58 }, + { 1816, 0x109a9c18 }, + { 1835, 0x16f14324 }, + { 1855, 0xa9820d22 }, + { 1882, 0x820fe476 }, + { 1902, 0xd5d83a0a }, + { 1923, 0x6da9f7fd }, + { 1942, 0x8c0c811a }, + { 1967, 0xb9db2b91 }, + { 1988, 0xc54f7327 }, + { 2009, 0xaffb5725 }, + { 2028, 0x847dc731 }, + { 2049, 0x3af9fd84 }, + { 2067, 0x053d6c2b }, + { 2084, 0x48f28c7f }, + { 2100, 0x32282165 }, + { 2118, 0x30f14d07 }, + { 2136, 0x1c989dfb }, + { 2159, 0x7b3a8a63 }, + { 2179, 0xa8f534e2 }, + { 2206, 0xe7c4b134 }, + { 2231, 0x83e2b024 }, + { 2256, 0x28c7a5da }, + { 2280, 0x4c22d870 }, + { 2301, 0xa9c83f1d }, + { 2324, 0x9912c1a1 }, + { 2334, 0xbe5a8058 }, + { 2351, 0xe9ac41bf }, + { 2369, 0x94e7ed36 }, + { 2394, 0xbd58e867 }, + { 2408, 0xd6353005 }, + { 2430, 0xc939a0da }, + { 2446, 0x278effa9 }, + { 2461, 0x331ebf89 }, + { 2476, 0x0929847e }, + { 2499, 0x68cddbac }, + { 2522, 0xd2986b5e }, + { 2540, 0x5bdd2ae0 }, + { 2556, 0xb4bc8d08 }, + { 2577, 0x4f88e4ba }, + { 2605, 0x93cb5cb8 }, + { 2627, 0x671bb594 }, + { 2645, 0xe257f075 }, + { 2659, 0x4fccce28 }, + { 2675, 0x3b9346b3 }, + { 2691, 0x97fccfe8 }, + { 2712, 0xf5064ea4 }, + { 2728, 0xd556fd22 }, + { 2742, 0x2f614082 }, + { 2762, 0xec4d324c }, + { 2782, 0xdee8c6d4 }, + { 2808, 0xb1c6b468 }, + { 2827, 0xcb7a58e3 }, + { 2848, 0x2eeec2f9 }, + { 2865, 0xdcdb0235 }, + { 2884, 0x9eaabe40 }, + { 2905, 0x03667f4e }, + { 2931, 0x0fa0cd2e }, + { 2971, 0xb9b8ddba }, + { 3016, 0xabef4889 }, + { 3054, 0x36b8a8de }, + { 3084, 0xcc0bde41 }, + { 3107, 0x4b60d48c }, + { 3140, 0x7ac4dacb }, + { 3171, 0x47655c4a }, + { 3199, 0x2ce93a55 }, + { 3221, 0xcf1e6028 }, + { 3266, 0xf204ce7d }, + { 3286, 0x1a687885 }, + { 3323, 0x77890558 }, + { 3365, 0xe32227c8 }, + { 3402, 0x31c3cbd1 }, + { 3444, 0xcdefcaa8 }, + { 3465, 0x5a93ab74 }, + { 3487, 0x57695f28 }, + { 3511, 0xc3fedb2e }, + { 3533, 0xfc5fb6ce }, + { 3551, 0x2b2a4b79 }, + { 3577, 0x84e085ac }, + { 3626, 0xfa2ba1e2 }, + { 3650, 0x80e72505 }, + { 3697, 0xa693bc66 }, + { 3720, 0x34a063ab }, + { 3766, 0xc5e5b106 }, + { 3788, 0x41782cb9 }, + { 3833, 0x0987ef56 }, + { 3864, 0x43d4c4e2 }, + { 3896, 0xa4e75334 }, + { 3920, 0xe206fb25 }, + { 3950, 0x30799448 }, + { 3979, 0xaec8bb10 }, + { 4004, 0xd6a1433e }, + { 4027, 0x0173d440 }, + { 4053, 0xc8420c4c }, + { 4104, 0x0c8795b9 }, + { 4129, 0xe5ad0a50 }, + { 4155, 0xc86e9287 }, + { 4188, 0x736675ae }, + { 4212, 0x016068ae }, + { 4244, 0xe619127f }, + { 4278, 0x1c3d25d3 }, + { 4313, 0x4948814a }, + { 4336, 0x957087d6 }, + { 4360, 0xe04e9f74 }, + { 4381, 0x5babdfe5 }, + { 4404, 0x93de8434 }, +}; + + + +/* Weak aliases for all potential implementations. These will resolve to + * NULL if they're not defined, which lets the resolve_entrypoint() function + * either pick the correct entry point. + */ + +VkResult radv_CreateInstance(const VkInstanceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkInstance* pInstance) __attribute__ ((weak)); +void radv_DestroyInstance(VkInstance instance, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult radv_EnumeratePhysicalDevices(VkInstance instance, uint32_t* pPhysicalDeviceCount, VkPhysicalDevice* pPhysicalDevices) __attribute__ ((weak)); +PFN_vkVoidFunction radv_GetDeviceProcAddr(VkDevice device, const char* pName) __attribute__ ((weak)); +PFN_vkVoidFunction radv_GetInstanceProcAddr(VkInstance instance, const char* pName) __attribute__ ((weak)); +void radv_GetPhysicalDeviceProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties* pProperties) __attribute__ ((weak)); +void radv_GetPhysicalDeviceQueueFamilyProperties(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties* pQueueFamilyProperties) __attribute__ ((weak)); +void radv_GetPhysicalDeviceMemoryProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties* pMemoryProperties) __attribute__ ((weak)); +void radv_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures) __attribute__ ((weak)); +void radv_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties) __attribute__ ((weak)); +VkResult radv_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties) __attribute__ ((weak)); +VkResult radv_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDevice* pDevice) __attribute__ ((weak)); +void radv_DestroyDevice(VkDevice device, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult radv_EnumerateInstanceLayerProperties(uint32_t* pPropertyCount, VkLayerProperties* pProperties) __attribute__ ((weak)); +VkResult radv_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak)); +VkResult radv_EnumerateDeviceLayerProperties(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkLayerProperties* pProperties) __attribute__ ((weak)); +VkResult radv_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak)); +void radv_GetDeviceQueue(VkDevice device, uint32_t queueFamilyIndex, uint32_t queueIndex, VkQueue* pQueue) __attribute__ ((weak)); +VkResult radv_QueueSubmit(VkQueue queue, uint32_t submitCount, const VkSubmitInfo* pSubmits, VkFence fence) __attribute__ ((weak)); +VkResult radv_QueueWaitIdle(VkQueue queue) __attribute__ ((weak)); +VkResult radv_DeviceWaitIdle(VkDevice device) __attribute__ ((weak)); +VkResult radv_AllocateMemory(VkDevice device, const VkMemoryAllocateInfo* pAllocateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMemory) __attribute__ ((weak)); +void radv_FreeMemory(VkDevice device, VkDeviceMemory memory, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult radv_MapMemory(VkDevice device, VkDeviceMemory memory, VkDeviceSize offset, VkDeviceSize size, VkMemoryMapFlags flags, void** ppData) __attribute__ ((weak)); +void radv_UnmapMemory(VkDevice device, VkDeviceMemory memory) __attribute__ ((weak)); +VkResult radv_FlushMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges) __attribute__ ((weak)); +VkResult radv_InvalidateMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges) __attribute__ ((weak)); +void radv_GetDeviceMemoryCommitment(VkDevice device, VkDeviceMemory memory, VkDeviceSize* pCommittedMemoryInBytes) __attribute__ ((weak)); +void radv_GetBufferMemoryRequirements(VkDevice device, VkBuffer buffer, VkMemoryRequirements* pMemoryRequirements) __attribute__ ((weak)); +VkResult radv_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak)); +void radv_GetImageMemoryRequirements(VkDevice device, VkImage image, VkMemoryRequirements* pMemoryRequirements) __attribute__ ((weak)); +VkResult radv_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak)); +void radv_GetImageSparseMemoryRequirements(VkDevice device, VkImage image, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements* pSparseMemoryRequirements) __attribute__ ((weak)); +void radv_GetPhysicalDeviceSparseImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkSampleCountFlagBits samples, VkImageUsageFlags usage, VkImageTiling tiling, uint32_t* pPropertyCount, VkSparseImageFormatProperties* pProperties) __attribute__ ((weak)); +VkResult radv_QueueBindSparse(VkQueue queue, uint32_t bindInfoCount, const VkBindSparseInfo* pBindInfo, VkFence fence) __attribute__ ((weak)); +VkResult radv_CreateFence(VkDevice device, const VkFenceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFence* pFence) __attribute__ ((weak)); +void radv_DestroyFence(VkDevice device, VkFence fence, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult radv_ResetFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences) __attribute__ ((weak)); +VkResult radv_GetFenceStatus(VkDevice device, VkFence fence) __attribute__ ((weak)); +VkResult radv_WaitForFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences, VkBool32 waitAll, uint64_t timeout) __attribute__ ((weak)); +VkResult radv_CreateSemaphore(VkDevice device, const VkSemaphoreCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSemaphore* pSemaphore) __attribute__ ((weak)); +void radv_DestroySemaphore(VkDevice device, VkSemaphore semaphore, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult radv_CreateEvent(VkDevice device, const VkEventCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkEvent* pEvent) __attribute__ ((weak)); +void radv_DestroyEvent(VkDevice device, VkEvent event, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult radv_GetEventStatus(VkDevice device, VkEvent event) __attribute__ ((weak)); +VkResult radv_SetEvent(VkDevice device, VkEvent event) __attribute__ ((weak)); +VkResult radv_ResetEvent(VkDevice device, VkEvent event) __attribute__ ((weak)); +VkResult radv_CreateQueryPool(VkDevice device, const VkQueryPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkQueryPool* pQueryPool) __attribute__ ((weak)); +void radv_DestroyQueryPool(VkDevice device, VkQueryPool queryPool, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult radv_GetQueryPoolResults(VkDevice device, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, size_t dataSize, void* pData, VkDeviceSize stride, VkQueryResultFlags flags) __attribute__ ((weak)); +VkResult radv_CreateBuffer(VkDevice device, const VkBufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBuffer* pBuffer) __attribute__ ((weak)); +void radv_DestroyBuffer(VkDevice device, VkBuffer buffer, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult radv_CreateBufferView(VkDevice device, const VkBufferViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBufferView* pView) __attribute__ ((weak)); +void radv_DestroyBufferView(VkDevice device, VkBufferView bufferView, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult radv_CreateImage(VkDevice device, const VkImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImage* pImage) __attribute__ ((weak)); +void radv_DestroyImage(VkDevice device, VkImage image, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +void radv_GetImageSubresourceLayout(VkDevice device, VkImage image, const VkImageSubresource* pSubresource, VkSubresourceLayout* pLayout) __attribute__ ((weak)); +VkResult radv_CreateImageView(VkDevice device, const VkImageViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImageView* pView) __attribute__ ((weak)); +void radv_DestroyImageView(VkDevice device, VkImageView imageView, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult radv_CreateShaderModule(VkDevice device, const VkShaderModuleCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkShaderModule* pShaderModule) __attribute__ ((weak)); +void radv_DestroyShaderModule(VkDevice device, VkShaderModule shaderModule, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult radv_CreatePipelineCache(VkDevice device, const VkPipelineCacheCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineCache* pPipelineCache) __attribute__ ((weak)); +void radv_DestroyPipelineCache(VkDevice device, VkPipelineCache pipelineCache, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult radv_GetPipelineCacheData(VkDevice device, VkPipelineCache pipelineCache, size_t* pDataSize, void* pData) __attribute__ ((weak)); +VkResult radv_MergePipelineCaches(VkDevice device, VkPipelineCache dstCache, uint32_t srcCacheCount, const VkPipelineCache* pSrcCaches) __attribute__ ((weak)); +VkResult radv_CreateGraphicsPipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkGraphicsPipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines) __attribute__ ((weak)); +VkResult radv_CreateComputePipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkComputePipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines) __attribute__ ((weak)); +void radv_DestroyPipeline(VkDevice device, VkPipeline pipeline, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult radv_CreatePipelineLayout(VkDevice device, const VkPipelineLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineLayout* pPipelineLayout) __attribute__ ((weak)); +void radv_DestroyPipelineLayout(VkDevice device, VkPipelineLayout pipelineLayout, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult radv_CreateSampler(VkDevice device, const VkSamplerCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSampler* pSampler) __attribute__ ((weak)); +void radv_DestroySampler(VkDevice device, VkSampler sampler, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult radv_CreateDescriptorSetLayout(VkDevice device, const VkDescriptorSetLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorSetLayout* pSetLayout) __attribute__ ((weak)); +void radv_DestroyDescriptorSetLayout(VkDevice device, VkDescriptorSetLayout descriptorSetLayout, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult radv_CreateDescriptorPool(VkDevice device, const VkDescriptorPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorPool* pDescriptorPool) __attribute__ ((weak)); +void radv_DestroyDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult radv_ResetDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, VkDescriptorPoolResetFlags flags) __attribute__ ((weak)); +VkResult radv_AllocateDescriptorSets(VkDevice device, const VkDescriptorSetAllocateInfo* pAllocateInfo, VkDescriptorSet* pDescriptorSets) __attribute__ ((weak)); +VkResult radv_FreeDescriptorSets(VkDevice device, VkDescriptorPool descriptorPool, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets) __attribute__ ((weak)); +void radv_UpdateDescriptorSets(VkDevice device, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites, uint32_t descriptorCopyCount, const VkCopyDescriptorSet* pDescriptorCopies) __attribute__ ((weak)); +VkResult radv_CreateFramebuffer(VkDevice device, const VkFramebufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFramebuffer* pFramebuffer) __attribute__ ((weak)); +void radv_DestroyFramebuffer(VkDevice device, VkFramebuffer framebuffer, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult radv_CreateRenderPass(VkDevice device, const VkRenderPassCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkRenderPass* pRenderPass) __attribute__ ((weak)); +void radv_DestroyRenderPass(VkDevice device, VkRenderPass renderPass, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +void radv_GetRenderAreaGranularity(VkDevice device, VkRenderPass renderPass, VkExtent2D* pGranularity) __attribute__ ((weak)); +VkResult radv_CreateCommandPool(VkDevice device, const VkCommandPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkCommandPool* pCommandPool) __attribute__ ((weak)); +void radv_DestroyCommandPool(VkDevice device, VkCommandPool commandPool, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult radv_ResetCommandPool(VkDevice device, VkCommandPool commandPool, VkCommandPoolResetFlags flags) __attribute__ ((weak)); +VkResult radv_AllocateCommandBuffers(VkDevice device, const VkCommandBufferAllocateInfo* pAllocateInfo, VkCommandBuffer* pCommandBuffers) __attribute__ ((weak)); +void radv_FreeCommandBuffers(VkDevice device, VkCommandPool commandPool, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers) __attribute__ ((weak)); +VkResult radv_BeginCommandBuffer(VkCommandBuffer commandBuffer, const VkCommandBufferBeginInfo* pBeginInfo) __attribute__ ((weak)); +VkResult radv_EndCommandBuffer(VkCommandBuffer commandBuffer) __attribute__ ((weak)); +VkResult radv_ResetCommandBuffer(VkCommandBuffer commandBuffer, VkCommandBufferResetFlags flags) __attribute__ ((weak)); +void radv_CmdBindPipeline(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipeline pipeline) __attribute__ ((weak)); +void radv_CmdSetViewport(VkCommandBuffer commandBuffer, uint32_t firstViewport, uint32_t viewportCount, const VkViewport* pViewports) __attribute__ ((weak)); +void radv_CmdSetScissor(VkCommandBuffer commandBuffer, uint32_t firstScissor, uint32_t scissorCount, const VkRect2D* pScissors) __attribute__ ((weak)); +void radv_CmdSetLineWidth(VkCommandBuffer commandBuffer, float lineWidth) __attribute__ ((weak)); +void radv_CmdSetDepthBias(VkCommandBuffer commandBuffer, float depthBiasConstantFactor, float depthBiasClamp, float depthBiasSlopeFactor) __attribute__ ((weak)); +void radv_CmdSetBlendConstants(VkCommandBuffer commandBuffer, const float blendConstants[4]) __attribute__ ((weak)); +void radv_CmdSetDepthBounds(VkCommandBuffer commandBuffer, float minDepthBounds, float maxDepthBounds) __attribute__ ((weak)); +void radv_CmdSetStencilCompareMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t compareMask) __attribute__ ((weak)); +void radv_CmdSetStencilWriteMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t writeMask) __attribute__ ((weak)); +void radv_CmdSetStencilReference(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t reference) __attribute__ ((weak)); +void radv_CmdBindDescriptorSets(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t firstSet, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets, uint32_t dynamicOffsetCount, const uint32_t* pDynamicOffsets) __attribute__ ((weak)); +void radv_CmdBindIndexBuffer(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkIndexType indexType) __attribute__ ((weak)); +void radv_CmdBindVertexBuffers(VkCommandBuffer commandBuffer, uint32_t firstBinding, uint32_t bindingCount, const VkBuffer* pBuffers, const VkDeviceSize* pOffsets) __attribute__ ((weak)); +void radv_CmdDraw(VkCommandBuffer commandBuffer, uint32_t vertexCount, uint32_t instanceCount, uint32_t firstVertex, uint32_t firstInstance) __attribute__ ((weak)); +void radv_CmdDrawIndexed(VkCommandBuffer commandBuffer, uint32_t indexCount, uint32_t instanceCount, uint32_t firstIndex, int32_t vertexOffset, uint32_t firstInstance) __attribute__ ((weak)); +void radv_CmdDrawIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride) __attribute__ ((weak)); +void radv_CmdDrawIndexedIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride) __attribute__ ((weak)); +void radv_CmdDispatch(VkCommandBuffer commandBuffer, uint32_t x, uint32_t y, uint32_t z) __attribute__ ((weak)); +void radv_CmdDispatchIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset) __attribute__ ((weak)); +void radv_CmdCopyBuffer(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferCopy* pRegions) __attribute__ ((weak)); +void radv_CmdCopyImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageCopy* pRegions) __attribute__ ((weak)); +void radv_CmdBlitImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageBlit* pRegions, VkFilter filter) __attribute__ ((weak)); +void radv_CmdCopyBufferToImage(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkBufferImageCopy* pRegions) __attribute__ ((weak)); +void radv_CmdCopyImageToBuffer(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferImageCopy* pRegions) __attribute__ ((weak)); +void radv_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const void* pData) __attribute__ ((weak)); +void radv_CmdFillBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize size, uint32_t data) __attribute__ ((weak)); +void radv_CmdClearColorImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearColorValue* pColor, uint32_t rangeCount, const VkImageSubresourceRange* pRanges) __attribute__ ((weak)); +void radv_CmdClearDepthStencilImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearDepthStencilValue* pDepthStencil, uint32_t rangeCount, const VkImageSubresourceRange* pRanges) __attribute__ ((weak)); +void radv_CmdClearAttachments(VkCommandBuffer commandBuffer, uint32_t attachmentCount, const VkClearAttachment* pAttachments, uint32_t rectCount, const VkClearRect* pRects) __attribute__ ((weak)); +void radv_CmdResolveImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageResolve* pRegions) __attribute__ ((weak)); +void radv_CmdSetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask) __attribute__ ((weak)); +void radv_CmdResetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask) __attribute__ ((weak)); +void radv_CmdWaitEvents(VkCommandBuffer commandBuffer, uint32_t eventCount, const VkEvent* pEvents, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers) __attribute__ ((weak)); +void radv_CmdPipelineBarrier(VkCommandBuffer commandBuffer, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, VkDependencyFlags dependencyFlags, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers) __attribute__ ((weak)); +void radv_CmdBeginQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query, VkQueryControlFlags flags) __attribute__ ((weak)); +void radv_CmdEndQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query) __attribute__ ((weak)); +void radv_CmdResetQueryPool(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount) __attribute__ ((weak)); +void radv_CmdWriteTimestamp(VkCommandBuffer commandBuffer, VkPipelineStageFlagBits pipelineStage, VkQueryPool queryPool, uint32_t query) __attribute__ ((weak)); +void radv_CmdCopyQueryPoolResults(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize stride, VkQueryResultFlags flags) __attribute__ ((weak)); +void radv_CmdPushConstants(VkCommandBuffer commandBuffer, VkPipelineLayout layout, VkShaderStageFlags stageFlags, uint32_t offset, uint32_t size, const void* pValues) __attribute__ ((weak)); +void radv_CmdBeginRenderPass(VkCommandBuffer commandBuffer, const VkRenderPassBeginInfo* pRenderPassBegin, VkSubpassContents contents) __attribute__ ((weak)); +void radv_CmdNextSubpass(VkCommandBuffer commandBuffer, VkSubpassContents contents) __attribute__ ((weak)); +void radv_CmdEndRenderPass(VkCommandBuffer commandBuffer) __attribute__ ((weak)); +void radv_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers) __attribute__ ((weak)); +#ifdef VK_USE_PLATFORM_ANDROID_KHR +VkResult radv_CreateAndroidSurfaceKHR(VkInstance instance, const VkAndroidSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_ANDROID_KHR +VkResult radv_GetPhysicalDeviceDisplayPropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPropertiesKHR* pProperties) __attribute__ ((weak)); +VkResult radv_GetPhysicalDeviceDisplayPlanePropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPlanePropertiesKHR* pProperties) __attribute__ ((weak)); +VkResult radv_GetDisplayPlaneSupportedDisplaysKHR(VkPhysicalDevice physicalDevice, uint32_t planeIndex, uint32_t* pDisplayCount, VkDisplayKHR* pDisplays) __attribute__ ((weak)); +VkResult radv_GetDisplayModePropertiesKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, uint32_t* pPropertyCount, VkDisplayModePropertiesKHR* pProperties) __attribute__ ((weak)); +VkResult radv_CreateDisplayModeKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, const VkDisplayModeCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDisplayModeKHR* pMode) __attribute__ ((weak)); +VkResult radv_GetDisplayPlaneCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkDisplayModeKHR mode, uint32_t planeIndex, VkDisplayPlaneCapabilitiesKHR* pCapabilities) __attribute__ ((weak)); +VkResult radv_CreateDisplayPlaneSurfaceKHR(VkInstance instance, const VkDisplaySurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +VkResult radv_CreateSharedSwapchainsKHR(VkDevice device, uint32_t swapchainCount, const VkSwapchainCreateInfoKHR* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchains) __attribute__ ((weak)); +#ifdef VK_USE_PLATFORM_MIR_KHR +VkResult radv_CreateMirSurfaceKHR(VkInstance instance, const VkMirSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_MIR_KHR +#ifdef VK_USE_PLATFORM_MIR_KHR +VkBool32 radv_GetPhysicalDeviceMirPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, MirConnection* connection) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_MIR_KHR +void radv_DestroySurfaceKHR(VkInstance instance, VkSurfaceKHR surface, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult radv_GetPhysicalDeviceSurfaceSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, VkSurfaceKHR surface, VkBool32* pSupported) __attribute__ ((weak)); +VkResult radv_GetPhysicalDeviceSurfaceCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, VkSurfaceCapabilitiesKHR* pSurfaceCapabilities) __attribute__ ((weak)); +VkResult radv_GetPhysicalDeviceSurfaceFormatsKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pSurfaceFormatCount, VkSurfaceFormatKHR* pSurfaceFormats) __attribute__ ((weak)); +VkResult radv_GetPhysicalDeviceSurfacePresentModesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pPresentModeCount, VkPresentModeKHR* pPresentModes) __attribute__ ((weak)); +VkResult radv_CreateSwapchainKHR(VkDevice device, const VkSwapchainCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchain) __attribute__ ((weak)); +void radv_DestroySwapchainKHR(VkDevice device, VkSwapchainKHR swapchain, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult radv_GetSwapchainImagesKHR(VkDevice device, VkSwapchainKHR swapchain, uint32_t* pSwapchainImageCount, VkImage* pSwapchainImages) __attribute__ ((weak)); +VkResult radv_AcquireNextImageKHR(VkDevice device, VkSwapchainKHR swapchain, uint64_t timeout, VkSemaphore semaphore, VkFence fence, uint32_t* pImageIndex) __attribute__ ((weak)); +VkResult radv_QueuePresentKHR(VkQueue queue, const VkPresentInfoKHR* pPresentInfo) __attribute__ ((weak)); +#ifdef VK_USE_PLATFORM_WAYLAND_KHR +VkResult radv_CreateWaylandSurfaceKHR(VkInstance instance, const VkWaylandSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_WAYLAND_KHR +#ifdef VK_USE_PLATFORM_WAYLAND_KHR +VkBool32 radv_GetPhysicalDeviceWaylandPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, struct wl_display* display) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_WAYLAND_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR +VkResult radv_CreateWin32SurfaceKHR(VkInstance instance, const VkWin32SurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR +VkBool32 radv_GetPhysicalDeviceWin32PresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR +VkResult radv_CreateXlibSurfaceKHR(VkInstance instance, const VkXlibSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR +VkBool32 radv_GetPhysicalDeviceXlibPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, Display* dpy, VisualID visualID) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR +VkResult radv_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_XCB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR +VkBool32 radv_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_XCB_KHR +VkResult radv_CreateDebugReportCallbackEXT(VkInstance instance, const VkDebugReportCallbackCreateInfoEXT* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDebugReportCallbackEXT* pCallback) __attribute__ ((weak)); +void radv_DestroyDebugReportCallbackEXT(VkInstance instance, VkDebugReportCallbackEXT callback, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +void radv_DebugReportMessageEXT(VkInstance instance, VkDebugReportFlagsEXT flags, VkDebugReportObjectTypeEXT objectType, uint64_t object, size_t location, int32_t messageCode, const char* pLayerPrefix, const char* pMessage) __attribute__ ((weak)); +VkResult radv_DebugMarkerSetObjectNameEXT(VkDevice device, VkDebugMarkerObjectNameInfoEXT* pNameInfo) __attribute__ ((weak)); +VkResult radv_DebugMarkerSetObjectTagEXT(VkDevice device, VkDebugMarkerObjectTagInfoEXT* pTagInfo) __attribute__ ((weak)); +void radv_CmdDebugMarkerBeginEXT(VkCommandBuffer commandBuffer, VkDebugMarkerMarkerInfoEXT* pMarkerInfo) __attribute__ ((weak)); +void radv_CmdDebugMarkerEndEXT(VkCommandBuffer commandBuffer) __attribute__ ((weak)); +void radv_CmdDebugMarkerInsertEXT(VkCommandBuffer commandBuffer, VkDebugMarkerMarkerInfoEXT* pMarkerInfo) __attribute__ ((weak)); +VkResult radv_GetPhysicalDeviceExternalImageFormatPropertiesNV(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkExternalMemoryHandleTypeFlagsNV externalHandleType, VkExternalImageFormatPropertiesNV* pExternalImageFormatProperties) __attribute__ ((weak)); +#ifdef VK_USE_PLATFORM_WIN32_KHR +VkResult radv_GetMemoryWin32HandleNV(VkDevice device, VkDeviceMemory memory, VkExternalMemoryHandleTypeFlagsNV handleType, HANDLE* pHandle) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_WIN32_KHR +void radv_CmdDrawIndirectCountAMD(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkBuffer countBuffer, VkDeviceSize countBufferOffset, uint32_t maxDrawCount, uint32_t stride) __attribute__ ((weak)); +void radv_CmdDrawIndexedIndirectCountAMD(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkBuffer countBuffer, VkDeviceSize countBufferOffset, uint32_t maxDrawCount, uint32_t stride) __attribute__ ((weak)); +void radv_CmdProcessCommandsNVX(VkCommandBuffer commandBuffer, const VkCmdProcessCommandsInfoNVX* pProcessCommandsInfo) __attribute__ ((weak)); +void radv_CmdReserveSpaceForCommandsNVX(VkCommandBuffer commandBuffer, const VkCmdReserveSpaceForCommandsInfoNVX* pReserveSpaceInfo) __attribute__ ((weak)); +VkResult radv_CreateIndirectCommandsLayoutNVX(VkDevice device, const VkIndirectCommandsLayoutCreateInfoNVX* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkIndirectCommandsLayoutNVX* pIndirectCommandsLayout) __attribute__ ((weak)); +void radv_DestroyIndirectCommandsLayoutNVX(VkDevice device, VkIndirectCommandsLayoutNVX indirectCommandsLayout, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult radv_CreateObjectTableNVX(VkDevice device, const VkObjectTableCreateInfoNVX* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkObjectTableNVX* pObjectTable) __attribute__ ((weak)); +void radv_DestroyObjectTableNVX(VkDevice device, VkObjectTableNVX objectTable, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult radv_RegisterObjectsNVX(VkDevice device, VkObjectTableNVX objectTable, uint32_t objectCount, const VkObjectTableEntryNVX* const* ppObjectTableEntries, const uint32_t* pObjectIndices) __attribute__ ((weak)); +VkResult radv_UnregisterObjectsNVX(VkDevice device, VkObjectTableNVX objectTable, uint32_t objectCount, const VkObjectEntryTypeNVX* pObjectEntryTypes, const uint32_t* pObjectIndices) __attribute__ ((weak)); +void radv_GetPhysicalDeviceGeneratedCommandsPropertiesNVX(VkPhysicalDevice physicalDevice, VkDeviceGeneratedCommandsFeaturesNVX* pFeatures, VkDeviceGeneratedCommandsLimitsNVX* pLimits) __attribute__ ((weak)); + +const struct radv_dispatch_table radv_layer = { + .CreateInstance = radv_CreateInstance, + .DestroyInstance = radv_DestroyInstance, + .EnumeratePhysicalDevices = radv_EnumeratePhysicalDevices, + .GetDeviceProcAddr = radv_GetDeviceProcAddr, + .GetInstanceProcAddr = radv_GetInstanceProcAddr, + .GetPhysicalDeviceProperties = radv_GetPhysicalDeviceProperties, + .GetPhysicalDeviceQueueFamilyProperties = radv_GetPhysicalDeviceQueueFamilyProperties, + .GetPhysicalDeviceMemoryProperties = radv_GetPhysicalDeviceMemoryProperties, + .GetPhysicalDeviceFeatures = radv_GetPhysicalDeviceFeatures, + .GetPhysicalDeviceFormatProperties = radv_GetPhysicalDeviceFormatProperties, + .GetPhysicalDeviceImageFormatProperties = radv_GetPhysicalDeviceImageFormatProperties, + .CreateDevice = radv_CreateDevice, + .DestroyDevice = radv_DestroyDevice, + .EnumerateInstanceLayerProperties = radv_EnumerateInstanceLayerProperties, + .EnumerateInstanceExtensionProperties = radv_EnumerateInstanceExtensionProperties, + .EnumerateDeviceLayerProperties = radv_EnumerateDeviceLayerProperties, + .EnumerateDeviceExtensionProperties = radv_EnumerateDeviceExtensionProperties, + .GetDeviceQueue = radv_GetDeviceQueue, + .QueueSubmit = radv_QueueSubmit, + .QueueWaitIdle = radv_QueueWaitIdle, + .DeviceWaitIdle = radv_DeviceWaitIdle, + .AllocateMemory = radv_AllocateMemory, + .FreeMemory = radv_FreeMemory, + .MapMemory = radv_MapMemory, + .UnmapMemory = radv_UnmapMemory, + .FlushMappedMemoryRanges = radv_FlushMappedMemoryRanges, + .InvalidateMappedMemoryRanges = radv_InvalidateMappedMemoryRanges, + .GetDeviceMemoryCommitment = radv_GetDeviceMemoryCommitment, + .GetBufferMemoryRequirements = radv_GetBufferMemoryRequirements, + .BindBufferMemory = radv_BindBufferMemory, + .GetImageMemoryRequirements = radv_GetImageMemoryRequirements, + .BindImageMemory = radv_BindImageMemory, + .GetImageSparseMemoryRequirements = radv_GetImageSparseMemoryRequirements, + .GetPhysicalDeviceSparseImageFormatProperties = radv_GetPhysicalDeviceSparseImageFormatProperties, + .QueueBindSparse = radv_QueueBindSparse, + .CreateFence = radv_CreateFence, + .DestroyFence = radv_DestroyFence, + .ResetFences = radv_ResetFences, + .GetFenceStatus = radv_GetFenceStatus, + .WaitForFences = radv_WaitForFences, + .CreateSemaphore = radv_CreateSemaphore, + .DestroySemaphore = radv_DestroySemaphore, + .CreateEvent = radv_CreateEvent, + .DestroyEvent = radv_DestroyEvent, + .GetEventStatus = radv_GetEventStatus, + .SetEvent = radv_SetEvent, + .ResetEvent = radv_ResetEvent, + .CreateQueryPool = radv_CreateQueryPool, + .DestroyQueryPool = radv_DestroyQueryPool, + .GetQueryPoolResults = radv_GetQueryPoolResults, + .CreateBuffer = radv_CreateBuffer, + .DestroyBuffer = radv_DestroyBuffer, + .CreateBufferView = radv_CreateBufferView, + .DestroyBufferView = radv_DestroyBufferView, + .CreateImage = radv_CreateImage, + .DestroyImage = radv_DestroyImage, + .GetImageSubresourceLayout = radv_GetImageSubresourceLayout, + .CreateImageView = radv_CreateImageView, + .DestroyImageView = radv_DestroyImageView, + .CreateShaderModule = radv_CreateShaderModule, + .DestroyShaderModule = radv_DestroyShaderModule, + .CreatePipelineCache = radv_CreatePipelineCache, + .DestroyPipelineCache = radv_DestroyPipelineCache, + .GetPipelineCacheData = radv_GetPipelineCacheData, + .MergePipelineCaches = radv_MergePipelineCaches, + .CreateGraphicsPipelines = radv_CreateGraphicsPipelines, + .CreateComputePipelines = radv_CreateComputePipelines, + .DestroyPipeline = radv_DestroyPipeline, + .CreatePipelineLayout = radv_CreatePipelineLayout, + .DestroyPipelineLayout = radv_DestroyPipelineLayout, + .CreateSampler = radv_CreateSampler, + .DestroySampler = radv_DestroySampler, + .CreateDescriptorSetLayout = radv_CreateDescriptorSetLayout, + .DestroyDescriptorSetLayout = radv_DestroyDescriptorSetLayout, + .CreateDescriptorPool = radv_CreateDescriptorPool, + .DestroyDescriptorPool = radv_DestroyDescriptorPool, + .ResetDescriptorPool = radv_ResetDescriptorPool, + .AllocateDescriptorSets = radv_AllocateDescriptorSets, + .FreeDescriptorSets = radv_FreeDescriptorSets, + .UpdateDescriptorSets = radv_UpdateDescriptorSets, + .CreateFramebuffer = radv_CreateFramebuffer, + .DestroyFramebuffer = radv_DestroyFramebuffer, + .CreateRenderPass = radv_CreateRenderPass, + .DestroyRenderPass = radv_DestroyRenderPass, + .GetRenderAreaGranularity = radv_GetRenderAreaGranularity, + .CreateCommandPool = radv_CreateCommandPool, + .DestroyCommandPool = radv_DestroyCommandPool, + .ResetCommandPool = radv_ResetCommandPool, + .AllocateCommandBuffers = radv_AllocateCommandBuffers, + .FreeCommandBuffers = radv_FreeCommandBuffers, + .BeginCommandBuffer = radv_BeginCommandBuffer, + .EndCommandBuffer = radv_EndCommandBuffer, + .ResetCommandBuffer = radv_ResetCommandBuffer, + .CmdBindPipeline = radv_CmdBindPipeline, + .CmdSetViewport = radv_CmdSetViewport, + .CmdSetScissor = radv_CmdSetScissor, + .CmdSetLineWidth = radv_CmdSetLineWidth, + .CmdSetDepthBias = radv_CmdSetDepthBias, + .CmdSetBlendConstants = radv_CmdSetBlendConstants, + .CmdSetDepthBounds = radv_CmdSetDepthBounds, + .CmdSetStencilCompareMask = radv_CmdSetStencilCompareMask, + .CmdSetStencilWriteMask = radv_CmdSetStencilWriteMask, + .CmdSetStencilReference = radv_CmdSetStencilReference, + .CmdBindDescriptorSets = radv_CmdBindDescriptorSets, + .CmdBindIndexBuffer = radv_CmdBindIndexBuffer, + .CmdBindVertexBuffers = radv_CmdBindVertexBuffers, + .CmdDraw = radv_CmdDraw, + .CmdDrawIndexed = radv_CmdDrawIndexed, + .CmdDrawIndirect = radv_CmdDrawIndirect, + .CmdDrawIndexedIndirect = radv_CmdDrawIndexedIndirect, + .CmdDispatch = radv_CmdDispatch, + .CmdDispatchIndirect = radv_CmdDispatchIndirect, + .CmdCopyBuffer = radv_CmdCopyBuffer, + .CmdCopyImage = radv_CmdCopyImage, + .CmdBlitImage = radv_CmdBlitImage, + .CmdCopyBufferToImage = radv_CmdCopyBufferToImage, + .CmdCopyImageToBuffer = radv_CmdCopyImageToBuffer, + .CmdUpdateBuffer = radv_CmdUpdateBuffer, + .CmdFillBuffer = radv_CmdFillBuffer, + .CmdClearColorImage = radv_CmdClearColorImage, + .CmdClearDepthStencilImage = radv_CmdClearDepthStencilImage, + .CmdClearAttachments = radv_CmdClearAttachments, + .CmdResolveImage = radv_CmdResolveImage, + .CmdSetEvent = radv_CmdSetEvent, + .CmdResetEvent = radv_CmdResetEvent, + .CmdWaitEvents = radv_CmdWaitEvents, + .CmdPipelineBarrier = radv_CmdPipelineBarrier, + .CmdBeginQuery = radv_CmdBeginQuery, + .CmdEndQuery = radv_CmdEndQuery, + .CmdResetQueryPool = radv_CmdResetQueryPool, + .CmdWriteTimestamp = radv_CmdWriteTimestamp, + .CmdCopyQueryPoolResults = radv_CmdCopyQueryPoolResults, + .CmdPushConstants = radv_CmdPushConstants, + .CmdBeginRenderPass = radv_CmdBeginRenderPass, + .CmdNextSubpass = radv_CmdNextSubpass, + .CmdEndRenderPass = radv_CmdEndRenderPass, + .CmdExecuteCommands = radv_CmdExecuteCommands, +#ifdef VK_USE_PLATFORM_ANDROID_KHR + .CreateAndroidSurfaceKHR = radv_CreateAndroidSurfaceKHR, +#endif // VK_USE_PLATFORM_ANDROID_KHR + .GetPhysicalDeviceDisplayPropertiesKHR = radv_GetPhysicalDeviceDisplayPropertiesKHR, + .GetPhysicalDeviceDisplayPlanePropertiesKHR = radv_GetPhysicalDeviceDisplayPlanePropertiesKHR, + .GetDisplayPlaneSupportedDisplaysKHR = radv_GetDisplayPlaneSupportedDisplaysKHR, + .GetDisplayModePropertiesKHR = radv_GetDisplayModePropertiesKHR, + .CreateDisplayModeKHR = radv_CreateDisplayModeKHR, + .GetDisplayPlaneCapabilitiesKHR = radv_GetDisplayPlaneCapabilitiesKHR, + .CreateDisplayPlaneSurfaceKHR = radv_CreateDisplayPlaneSurfaceKHR, + .CreateSharedSwapchainsKHR = radv_CreateSharedSwapchainsKHR, +#ifdef VK_USE_PLATFORM_MIR_KHR + .CreateMirSurfaceKHR = radv_CreateMirSurfaceKHR, +#endif // VK_USE_PLATFORM_MIR_KHR +#ifdef VK_USE_PLATFORM_MIR_KHR + .GetPhysicalDeviceMirPresentationSupportKHR = radv_GetPhysicalDeviceMirPresentationSupportKHR, +#endif // VK_USE_PLATFORM_MIR_KHR + .DestroySurfaceKHR = radv_DestroySurfaceKHR, + .GetPhysicalDeviceSurfaceSupportKHR = radv_GetPhysicalDeviceSurfaceSupportKHR, + .GetPhysicalDeviceSurfaceCapabilitiesKHR = radv_GetPhysicalDeviceSurfaceCapabilitiesKHR, + .GetPhysicalDeviceSurfaceFormatsKHR = radv_GetPhysicalDeviceSurfaceFormatsKHR, + .GetPhysicalDeviceSurfacePresentModesKHR = radv_GetPhysicalDeviceSurfacePresentModesKHR, + .CreateSwapchainKHR = radv_CreateSwapchainKHR, + .DestroySwapchainKHR = radv_DestroySwapchainKHR, + .GetSwapchainImagesKHR = radv_GetSwapchainImagesKHR, + .AcquireNextImageKHR = radv_AcquireNextImageKHR, + .QueuePresentKHR = radv_QueuePresentKHR, +#ifdef VK_USE_PLATFORM_WAYLAND_KHR + .CreateWaylandSurfaceKHR = radv_CreateWaylandSurfaceKHR, +#endif // VK_USE_PLATFORM_WAYLAND_KHR +#ifdef VK_USE_PLATFORM_WAYLAND_KHR + .GetPhysicalDeviceWaylandPresentationSupportKHR = radv_GetPhysicalDeviceWaylandPresentationSupportKHR, +#endif // VK_USE_PLATFORM_WAYLAND_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR + .CreateWin32SurfaceKHR = radv_CreateWin32SurfaceKHR, +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR + .GetPhysicalDeviceWin32PresentationSupportKHR = radv_GetPhysicalDeviceWin32PresentationSupportKHR, +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR + .CreateXlibSurfaceKHR = radv_CreateXlibSurfaceKHR, +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR + .GetPhysicalDeviceXlibPresentationSupportKHR = radv_GetPhysicalDeviceXlibPresentationSupportKHR, +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR + .CreateXcbSurfaceKHR = radv_CreateXcbSurfaceKHR, +#endif // VK_USE_PLATFORM_XCB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR + .GetPhysicalDeviceXcbPresentationSupportKHR = radv_GetPhysicalDeviceXcbPresentationSupportKHR, +#endif // VK_USE_PLATFORM_XCB_KHR + .CreateDebugReportCallbackEXT = radv_CreateDebugReportCallbackEXT, + .DestroyDebugReportCallbackEXT = radv_DestroyDebugReportCallbackEXT, + .DebugReportMessageEXT = radv_DebugReportMessageEXT, + .DebugMarkerSetObjectNameEXT = radv_DebugMarkerSetObjectNameEXT, + .DebugMarkerSetObjectTagEXT = radv_DebugMarkerSetObjectTagEXT, + .CmdDebugMarkerBeginEXT = radv_CmdDebugMarkerBeginEXT, + .CmdDebugMarkerEndEXT = radv_CmdDebugMarkerEndEXT, + .CmdDebugMarkerInsertEXT = radv_CmdDebugMarkerInsertEXT, + .GetPhysicalDeviceExternalImageFormatPropertiesNV = radv_GetPhysicalDeviceExternalImageFormatPropertiesNV, +#ifdef VK_USE_PLATFORM_WIN32_KHR + .GetMemoryWin32HandleNV = radv_GetMemoryWin32HandleNV, +#endif // VK_USE_PLATFORM_WIN32_KHR + .CmdDrawIndirectCountAMD = radv_CmdDrawIndirectCountAMD, + .CmdDrawIndexedIndirectCountAMD = radv_CmdDrawIndexedIndirectCountAMD, + .CmdProcessCommandsNVX = radv_CmdProcessCommandsNVX, + .CmdReserveSpaceForCommandsNVX = radv_CmdReserveSpaceForCommandsNVX, + .CreateIndirectCommandsLayoutNVX = radv_CreateIndirectCommandsLayoutNVX, + .DestroyIndirectCommandsLayoutNVX = radv_DestroyIndirectCommandsLayoutNVX, + .CreateObjectTableNVX = radv_CreateObjectTableNVX, + .DestroyObjectTableNVX = radv_DestroyObjectTableNVX, + .RegisterObjectsNVX = radv_RegisterObjectsNVX, + .UnregisterObjectsNVX = radv_UnregisterObjectsNVX, + .GetPhysicalDeviceGeneratedCommandsPropertiesNVX = radv_GetPhysicalDeviceGeneratedCommandsPropertiesNVX, +}; + + + +void * __attribute__ ((noinline)) +radv_resolve_entrypoint(uint32_t index) +{ + return radv_layer.entrypoints[index]; +} + +/* Hash table stats: + * size 256 entries + * collisions entries + * 0 116 + * 1 34 + * 2 10 + * 3 10 + * 4 3 + * 5 3 + * 6 3 + * 7 1 + * 8 2 + * 9+ 5 + */ + +#define none 0xffff + +static const uint16_t map[] = { + 0x0044, none, none, none, 0x008d, 0x002b, 0x0040, 0x0061, + 0x0049, 0x0022, 0x0056, none, 0x00b8, none, 0x008c, none, + 0x00ab, 0x00ad, none, 0x0067, none, none, none, 0x0090, + 0x0052, 0x00a4, 0x0058, 0x004c, none, 0x0069, none, none, + none, none, 0x0054, none, 0x0014, 0x005b, 0x0070, 0x0002, + 0x007c, none, 0x001c, 0x002f, none, none, 0x0077, 0x0018, + 0x004b, 0x002a, none, 0x0008, 0x0065, 0x0080, 0x006d, 0x0053, + 0x00a9, none, 0x004d, 0x0093, 0x0024, 0x00b4, 0x005e, 0x000b, + 0x0088, 0x008a, none, none, 0x005c, 0x0033, none, 0x00a8, + 0x0087, 0x003f, 0x001f, 0x002c, 0x0082, 0x005a, 0x0089, none, + 0x00b0, 0x0019, 0x0046, 0x003a, 0x008e, 0x0092, 0x0034, none, + 0x0051, none, 0x00ba, 0x0020, none, 0x0066, 0x0075, 0x00ae, + none, 0x009b, 0x0035, 0x001e, 0x006f, 0x0060, 0x0047, 0x000a, + 0x0023, 0x00a6, none, 0x006b, none, 0x0041, 0x0028, none, + 0x0068, none, none, 0x003e, 0x0048, 0x007b, 0x0055, 0x00a1, + none, 0x0045, 0x006e, 0x0084, none, 0x0094, 0x000e, 0x0030, + none, 0x0027, 0x0081, 0x0091, 0x005d, 0x0095, 0x0003, 0x009a, + none, 0x0063, 0x0006, none, 0x008f, 0x009c, none, none, + none, 0x0059, 0x0026, none, 0x003c, none, 0x0037, none, + 0x0009, 0x0038, 0x0011, none, 0x0072, 0x0016, none, 0x003d, + 0x00a0, 0x006a, 0x003b, none, 0x004a, 0x0013, 0x0000, 0x007a, + 0x002e, 0x0071, none, 0x00a3, 0x0074, 0x0004, 0x004f, 0x0029, + 0x00ac, 0x004e, 0x009e, 0x0031, none, 0x001b, none, 0x0073, + 0x005f, 0x0032, 0x0078, 0x0099, 0x00b6, none, none, 0x006c, + 0x00b1, 0x00b2, 0x0036, none, 0x0050, 0x00a2, 0x007d, none, + 0x0097, 0x0005, 0x001a, 0x000c, 0x00a5, 0x008b, 0x009d, none, + none, 0x0098, 0x009f, 0x0015, 0x0083, 0x0043, 0x00b7, none, + 0x000d, 0x00a7, 0x0007, none, 0x0025, 0x007f, 0x001d, 0x00af, + 0x0076, none, 0x0064, 0x0085, none, 0x00b9, 0x00b5, 0x000f, + 0x007e, none, none, 0x0017, 0x0012, 0x0010, none, 0x0021, + 0x0096, 0x0079, 0x0001, 0x00aa, none, 0x002d, none, none, + none, 0x0086, 0x00b3, 0x0062, none, 0x0057, 0x0042, 0x0039, +}; + +void * +radv_lookup_entrypoint(const char *name) +{ + static const uint32_t prime_factor = 5024183; + static const uint32_t prime_step = 19; + const struct radv_entrypoint *e; + uint32_t hash, h, i; + const char *p; + + hash = 0; + for (p = name; *p; p++) + hash = hash * prime_factor + *p; + + h = hash; + do { + i = map[h & 255]; + if (i == none) + return NULL; + e = &entrypoints[i]; + h += prime_step; + } while (e->hash != hash); + + if (strcmp(name, strings + e->name) != 0) + return NULL; + + return radv_resolve_entrypoint(i); +} + diff -Nru mesa-12.0.6/src/amd/vulkan/radv_entrypoints_gen.py mesa-17.0.7/src/amd/vulkan/radv_entrypoints_gen.py --- mesa-12.0.6/src/amd/vulkan/radv_entrypoints_gen.py 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_entrypoints_gen.py 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,287 @@ +# coding=utf-8 +# +# Copyright © 2015 Intel Corporation +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +# IN THE SOFTWARE. +# + +import sys +import xml.etree.ElementTree as ET + +# We generate a static hash table for entry point lookup +# (vkGetProcAddress). We use a linear congruential generator for our hash +# function and a power-of-two size table. The prime numbers are determined +# experimentally. + +none = 0xffff +hash_size = 256 +u32_mask = 2**32 - 1 +hash_mask = hash_size - 1 + +prime_factor = 5024183 +prime_step = 19 + +def hash(name): + h = 0; + for c in name: + h = (h * prime_factor + ord(c)) & u32_mask + + return h + +def print_guard_start(guard): + if guard is not None: + print "#ifdef {0}".format(guard) + +def print_guard_end(guard): + if guard is not None: + print "#endif // {0}".format(guard) + +opt_header = False +opt_code = False + +if (sys.argv[1] == "header"): + opt_header = True + sys.argv.pop() +elif (sys.argv[1] == "code"): + opt_code = True + sys.argv.pop() + +# Extract the entry points from the registry +def get_entrypoints(doc, entrypoints_to_defines): + entrypoints = [] + commands = doc.findall('./commands/command') + for i, command in enumerate(commands): + type = command.find('./proto/type').text + fullname = command.find('./proto/name').text + shortname = fullname[2:] + params = map(lambda p: "".join(p.itertext()), command.findall('./param')) + params = ', '.join(params) + if fullname in entrypoints_to_defines: + guard = entrypoints_to_defines[fullname] + else: + guard = None + entrypoints.append((type, shortname, params, i, hash(fullname), guard)) + return entrypoints + +# Maps entry points to extension defines +def get_entrypoints_defines(doc): + entrypoints_to_defines = {} + extensions = doc.findall('./extensions/extension') + for extension in extensions: + define = extension.get('protect') + entrypoints = extension.findall('./require/command') + for entrypoint in entrypoints: + fullname = entrypoint.get('name') + entrypoints_to_defines[fullname] = define + return entrypoints_to_defines + +doc = ET.parse(sys.stdin) +entrypoints = get_entrypoints(doc, get_entrypoints_defines(doc)) + +# For outputting entrypoints.h we generate a radv_EntryPoint() prototype +# per entry point. + +if opt_header: + print "/* This file generated from vk_gen.py, don't edit directly. */\n" + + print "struct radv_dispatch_table {" + print " union {" + print " void *entrypoints[%d];" % len(entrypoints) + print " struct {" + + for type, name, args, num, h, guard in entrypoints: + if guard is not None: + print "#ifdef {0}".format(guard) + print " PFN_vk{0} {0};".format(name) + print "#else" + print " void *{0};".format(name) + print "#endif" + else: + print " PFN_vk{0} {0};".format(name) + print " };\n" + print " };\n" + print "};\n" + + for type, name, args, num, h, guard in entrypoints: + print_guard_start(guard) + print "%s radv_%s(%s);" % (type, name, args) + print_guard_end(guard) + exit() + + + +print """/* + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +/* DO NOT EDIT! This is a generated file. */ + +#include "radv_private.h" + +struct radv_entrypoint { + uint32_t name; + uint32_t hash; +}; + +/* We use a big string constant to avoid lots of reloctions from the entry + * point table to lots of little strings. The entries in the entry point table + * store the index into this big string. + */ + +static const char strings[] =""" + +offsets = [] +i = 0; +for type, name, args, num, h, guard in entrypoints: + print " \"vk%s\\0\"" % name + offsets.append(i) + i += 2 + len(name) + 1 +print " ;" + +# Now generate the table of all entry points + +print "\nstatic const struct radv_entrypoint entrypoints[] = {" +for type, name, args, num, h, guard in entrypoints: + print " { %5d, 0x%08x }," % (offsets[num], h) +print "};\n" + +print """ + +/* Weak aliases for all potential implementations. These will resolve to + * NULL if they're not defined, which lets the resolve_entrypoint() function + * either pick the correct entry point. + */ +""" + +for layer in [ "radv" ]: + for type, name, args, num, h, guard in entrypoints: + print_guard_start(guard) + print "%s %s_%s(%s) __attribute__ ((weak));" % (type, layer, name, args) + print_guard_end(guard) + print "\nconst struct radv_dispatch_table %s_layer = {" % layer + for type, name, args, num, h, guard in entrypoints: + print_guard_start(guard) + print " .%s = %s_%s," % (name, layer, name) + print_guard_end(guard) + print "};\n" + +print """ + +void * __attribute__ ((noinline)) +radv_resolve_entrypoint(uint32_t index) +{ + return radv_layer.entrypoints[index]; +} +""" + +# Now generate the hash table used for entry point look up. This is a +# uint16_t table of entry point indices. We use 0xffff to indicate an entry +# in the hash table is empty. + +map = [none for f in xrange(hash_size)] +collisions = [0 for f in xrange(10)] +for type, name, args, num, h, guard in entrypoints: + level = 0 + while map[h & hash_mask] != none: + h = h + prime_step + level = level + 1 + if level > 9: + collisions[9] += 1 + else: + collisions[level] += 1 + map[h & hash_mask] = num + +print "/* Hash table stats:" +print " * size %d entries" % hash_size +print " * collisions entries" +for i in xrange(10): + if (i == 9): + plus = "+" + else: + plus = " " + + print " * %2d%s %4d" % (i, plus, collisions[i]) +print " */\n" + +print "#define none 0x%04x\n" % none + +print "static const uint16_t map[] = {" +for i in xrange(0, hash_size, 8): + print " ", + for j in xrange(i, i + 8): + if map[j] & 0xffff == 0xffff: + print " none,", + else: + print "0x%04x," % (map[j] & 0xffff), + print + +print "};" + +# Finally we generate the hash table lookup function. The hash function and +# linear probing algorithm matches the hash table generated above. + +print """ +void * +radv_lookup_entrypoint(const char *name) +{ + static const uint32_t prime_factor = %d; + static const uint32_t prime_step = %d; + const struct radv_entrypoint *e; + uint32_t hash, h, i; + const char *p; + + hash = 0; + for (p = name; *p; p++) + hash = hash * prime_factor + *p; + + h = hash; + do { + i = map[h & %d]; + if (i == none) + return NULL; + e = &entrypoints[i]; + h += prime_step; + } while (e->hash != hash); + + if (strcmp(name, strings + e->name) != 0) + return NULL; + + return radv_resolve_entrypoint(i); +} +""" % (prime_factor, prime_step, hash_mask) diff -Nru mesa-12.0.6/src/amd/vulkan/radv_entrypoints.h mesa-17.0.7/src/amd/vulkan/radv_entrypoints.h --- mesa-12.0.6/src/amd/vulkan/radv_entrypoints.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_entrypoints.h 2017-06-01 10:38:06.000000000 +0000 @@ -0,0 +1,458 @@ +/* This file generated from vk_gen.py, don't edit directly. */ + +struct radv_dispatch_table { + union { + void *entrypoints[187]; + struct { + PFN_vkCreateInstance CreateInstance; + PFN_vkDestroyInstance DestroyInstance; + PFN_vkEnumeratePhysicalDevices EnumeratePhysicalDevices; + PFN_vkGetDeviceProcAddr GetDeviceProcAddr; + PFN_vkGetInstanceProcAddr GetInstanceProcAddr; + PFN_vkGetPhysicalDeviceProperties GetPhysicalDeviceProperties; + PFN_vkGetPhysicalDeviceQueueFamilyProperties GetPhysicalDeviceQueueFamilyProperties; + PFN_vkGetPhysicalDeviceMemoryProperties GetPhysicalDeviceMemoryProperties; + PFN_vkGetPhysicalDeviceFeatures GetPhysicalDeviceFeatures; + PFN_vkGetPhysicalDeviceFormatProperties GetPhysicalDeviceFormatProperties; + PFN_vkGetPhysicalDeviceImageFormatProperties GetPhysicalDeviceImageFormatProperties; + PFN_vkCreateDevice CreateDevice; + PFN_vkDestroyDevice DestroyDevice; + PFN_vkEnumerateInstanceLayerProperties EnumerateInstanceLayerProperties; + PFN_vkEnumerateInstanceExtensionProperties EnumerateInstanceExtensionProperties; + PFN_vkEnumerateDeviceLayerProperties EnumerateDeviceLayerProperties; + PFN_vkEnumerateDeviceExtensionProperties EnumerateDeviceExtensionProperties; + PFN_vkGetDeviceQueue GetDeviceQueue; + PFN_vkQueueSubmit QueueSubmit; + PFN_vkQueueWaitIdle QueueWaitIdle; + PFN_vkDeviceWaitIdle DeviceWaitIdle; + PFN_vkAllocateMemory AllocateMemory; + PFN_vkFreeMemory FreeMemory; + PFN_vkMapMemory MapMemory; + PFN_vkUnmapMemory UnmapMemory; + PFN_vkFlushMappedMemoryRanges FlushMappedMemoryRanges; + PFN_vkInvalidateMappedMemoryRanges InvalidateMappedMemoryRanges; + PFN_vkGetDeviceMemoryCommitment GetDeviceMemoryCommitment; + PFN_vkGetBufferMemoryRequirements GetBufferMemoryRequirements; + PFN_vkBindBufferMemory BindBufferMemory; + PFN_vkGetImageMemoryRequirements GetImageMemoryRequirements; + PFN_vkBindImageMemory BindImageMemory; + PFN_vkGetImageSparseMemoryRequirements GetImageSparseMemoryRequirements; + PFN_vkGetPhysicalDeviceSparseImageFormatProperties GetPhysicalDeviceSparseImageFormatProperties; + PFN_vkQueueBindSparse QueueBindSparse; + PFN_vkCreateFence CreateFence; + PFN_vkDestroyFence DestroyFence; + PFN_vkResetFences ResetFences; + PFN_vkGetFenceStatus GetFenceStatus; + PFN_vkWaitForFences WaitForFences; + PFN_vkCreateSemaphore CreateSemaphore; + PFN_vkDestroySemaphore DestroySemaphore; + PFN_vkCreateEvent CreateEvent; + PFN_vkDestroyEvent DestroyEvent; + PFN_vkGetEventStatus GetEventStatus; + PFN_vkSetEvent SetEvent; + PFN_vkResetEvent ResetEvent; + PFN_vkCreateQueryPool CreateQueryPool; + PFN_vkDestroyQueryPool DestroyQueryPool; + PFN_vkGetQueryPoolResults GetQueryPoolResults; + PFN_vkCreateBuffer CreateBuffer; + PFN_vkDestroyBuffer DestroyBuffer; + PFN_vkCreateBufferView CreateBufferView; + PFN_vkDestroyBufferView DestroyBufferView; + PFN_vkCreateImage CreateImage; + PFN_vkDestroyImage DestroyImage; + PFN_vkGetImageSubresourceLayout GetImageSubresourceLayout; + PFN_vkCreateImageView CreateImageView; + PFN_vkDestroyImageView DestroyImageView; + PFN_vkCreateShaderModule CreateShaderModule; + PFN_vkDestroyShaderModule DestroyShaderModule; + PFN_vkCreatePipelineCache CreatePipelineCache; + PFN_vkDestroyPipelineCache DestroyPipelineCache; + PFN_vkGetPipelineCacheData GetPipelineCacheData; + PFN_vkMergePipelineCaches MergePipelineCaches; + PFN_vkCreateGraphicsPipelines CreateGraphicsPipelines; + PFN_vkCreateComputePipelines CreateComputePipelines; + PFN_vkDestroyPipeline DestroyPipeline; + PFN_vkCreatePipelineLayout CreatePipelineLayout; + PFN_vkDestroyPipelineLayout DestroyPipelineLayout; + PFN_vkCreateSampler CreateSampler; + PFN_vkDestroySampler DestroySampler; + PFN_vkCreateDescriptorSetLayout CreateDescriptorSetLayout; + PFN_vkDestroyDescriptorSetLayout DestroyDescriptorSetLayout; + PFN_vkCreateDescriptorPool CreateDescriptorPool; + PFN_vkDestroyDescriptorPool DestroyDescriptorPool; + PFN_vkResetDescriptorPool ResetDescriptorPool; + PFN_vkAllocateDescriptorSets AllocateDescriptorSets; + PFN_vkFreeDescriptorSets FreeDescriptorSets; + PFN_vkUpdateDescriptorSets UpdateDescriptorSets; + PFN_vkCreateFramebuffer CreateFramebuffer; + PFN_vkDestroyFramebuffer DestroyFramebuffer; + PFN_vkCreateRenderPass CreateRenderPass; + PFN_vkDestroyRenderPass DestroyRenderPass; + PFN_vkGetRenderAreaGranularity GetRenderAreaGranularity; + PFN_vkCreateCommandPool CreateCommandPool; + PFN_vkDestroyCommandPool DestroyCommandPool; + PFN_vkResetCommandPool ResetCommandPool; + PFN_vkAllocateCommandBuffers AllocateCommandBuffers; + PFN_vkFreeCommandBuffers FreeCommandBuffers; + PFN_vkBeginCommandBuffer BeginCommandBuffer; + PFN_vkEndCommandBuffer EndCommandBuffer; + PFN_vkResetCommandBuffer ResetCommandBuffer; + PFN_vkCmdBindPipeline CmdBindPipeline; + PFN_vkCmdSetViewport CmdSetViewport; + PFN_vkCmdSetScissor CmdSetScissor; + PFN_vkCmdSetLineWidth CmdSetLineWidth; + PFN_vkCmdSetDepthBias CmdSetDepthBias; + PFN_vkCmdSetBlendConstants CmdSetBlendConstants; + PFN_vkCmdSetDepthBounds CmdSetDepthBounds; + PFN_vkCmdSetStencilCompareMask CmdSetStencilCompareMask; + PFN_vkCmdSetStencilWriteMask CmdSetStencilWriteMask; + PFN_vkCmdSetStencilReference CmdSetStencilReference; + PFN_vkCmdBindDescriptorSets CmdBindDescriptorSets; + PFN_vkCmdBindIndexBuffer CmdBindIndexBuffer; + PFN_vkCmdBindVertexBuffers CmdBindVertexBuffers; + PFN_vkCmdDraw CmdDraw; + PFN_vkCmdDrawIndexed CmdDrawIndexed; + PFN_vkCmdDrawIndirect CmdDrawIndirect; + PFN_vkCmdDrawIndexedIndirect CmdDrawIndexedIndirect; + PFN_vkCmdDispatch CmdDispatch; + PFN_vkCmdDispatchIndirect CmdDispatchIndirect; + PFN_vkCmdCopyBuffer CmdCopyBuffer; + PFN_vkCmdCopyImage CmdCopyImage; + PFN_vkCmdBlitImage CmdBlitImage; + PFN_vkCmdCopyBufferToImage CmdCopyBufferToImage; + PFN_vkCmdCopyImageToBuffer CmdCopyImageToBuffer; + PFN_vkCmdUpdateBuffer CmdUpdateBuffer; + PFN_vkCmdFillBuffer CmdFillBuffer; + PFN_vkCmdClearColorImage CmdClearColorImage; + PFN_vkCmdClearDepthStencilImage CmdClearDepthStencilImage; + PFN_vkCmdClearAttachments CmdClearAttachments; + PFN_vkCmdResolveImage CmdResolveImage; + PFN_vkCmdSetEvent CmdSetEvent; + PFN_vkCmdResetEvent CmdResetEvent; + PFN_vkCmdWaitEvents CmdWaitEvents; + PFN_vkCmdPipelineBarrier CmdPipelineBarrier; + PFN_vkCmdBeginQuery CmdBeginQuery; + PFN_vkCmdEndQuery CmdEndQuery; + PFN_vkCmdResetQueryPool CmdResetQueryPool; + PFN_vkCmdWriteTimestamp CmdWriteTimestamp; + PFN_vkCmdCopyQueryPoolResults CmdCopyQueryPoolResults; + PFN_vkCmdPushConstants CmdPushConstants; + PFN_vkCmdBeginRenderPass CmdBeginRenderPass; + PFN_vkCmdNextSubpass CmdNextSubpass; + PFN_vkCmdEndRenderPass CmdEndRenderPass; + PFN_vkCmdExecuteCommands CmdExecuteCommands; +#ifdef VK_USE_PLATFORM_ANDROID_KHR + PFN_vkCreateAndroidSurfaceKHR CreateAndroidSurfaceKHR; +#else + void *CreateAndroidSurfaceKHR; +#endif + PFN_vkGetPhysicalDeviceDisplayPropertiesKHR GetPhysicalDeviceDisplayPropertiesKHR; + PFN_vkGetPhysicalDeviceDisplayPlanePropertiesKHR GetPhysicalDeviceDisplayPlanePropertiesKHR; + PFN_vkGetDisplayPlaneSupportedDisplaysKHR GetDisplayPlaneSupportedDisplaysKHR; + PFN_vkGetDisplayModePropertiesKHR GetDisplayModePropertiesKHR; + PFN_vkCreateDisplayModeKHR CreateDisplayModeKHR; + PFN_vkGetDisplayPlaneCapabilitiesKHR GetDisplayPlaneCapabilitiesKHR; + PFN_vkCreateDisplayPlaneSurfaceKHR CreateDisplayPlaneSurfaceKHR; + PFN_vkCreateSharedSwapchainsKHR CreateSharedSwapchainsKHR; +#ifdef VK_USE_PLATFORM_MIR_KHR + PFN_vkCreateMirSurfaceKHR CreateMirSurfaceKHR; +#else + void *CreateMirSurfaceKHR; +#endif +#ifdef VK_USE_PLATFORM_MIR_KHR + PFN_vkGetPhysicalDeviceMirPresentationSupportKHR GetPhysicalDeviceMirPresentationSupportKHR; +#else + void *GetPhysicalDeviceMirPresentationSupportKHR; +#endif + PFN_vkDestroySurfaceKHR DestroySurfaceKHR; + PFN_vkGetPhysicalDeviceSurfaceSupportKHR GetPhysicalDeviceSurfaceSupportKHR; + PFN_vkGetPhysicalDeviceSurfaceCapabilitiesKHR GetPhysicalDeviceSurfaceCapabilitiesKHR; + PFN_vkGetPhysicalDeviceSurfaceFormatsKHR GetPhysicalDeviceSurfaceFormatsKHR; + PFN_vkGetPhysicalDeviceSurfacePresentModesKHR GetPhysicalDeviceSurfacePresentModesKHR; + PFN_vkCreateSwapchainKHR CreateSwapchainKHR; + PFN_vkDestroySwapchainKHR DestroySwapchainKHR; + PFN_vkGetSwapchainImagesKHR GetSwapchainImagesKHR; + PFN_vkAcquireNextImageKHR AcquireNextImageKHR; + PFN_vkQueuePresentKHR QueuePresentKHR; +#ifdef VK_USE_PLATFORM_WAYLAND_KHR + PFN_vkCreateWaylandSurfaceKHR CreateWaylandSurfaceKHR; +#else + void *CreateWaylandSurfaceKHR; +#endif +#ifdef VK_USE_PLATFORM_WAYLAND_KHR + PFN_vkGetPhysicalDeviceWaylandPresentationSupportKHR GetPhysicalDeviceWaylandPresentationSupportKHR; +#else + void *GetPhysicalDeviceWaylandPresentationSupportKHR; +#endif +#ifdef VK_USE_PLATFORM_WIN32_KHR + PFN_vkCreateWin32SurfaceKHR CreateWin32SurfaceKHR; +#else + void *CreateWin32SurfaceKHR; +#endif +#ifdef VK_USE_PLATFORM_WIN32_KHR + PFN_vkGetPhysicalDeviceWin32PresentationSupportKHR GetPhysicalDeviceWin32PresentationSupportKHR; +#else + void *GetPhysicalDeviceWin32PresentationSupportKHR; +#endif +#ifdef VK_USE_PLATFORM_XLIB_KHR + PFN_vkCreateXlibSurfaceKHR CreateXlibSurfaceKHR; +#else + void *CreateXlibSurfaceKHR; +#endif +#ifdef VK_USE_PLATFORM_XLIB_KHR + PFN_vkGetPhysicalDeviceXlibPresentationSupportKHR GetPhysicalDeviceXlibPresentationSupportKHR; +#else + void *GetPhysicalDeviceXlibPresentationSupportKHR; +#endif +#ifdef VK_USE_PLATFORM_XCB_KHR + PFN_vkCreateXcbSurfaceKHR CreateXcbSurfaceKHR; +#else + void *CreateXcbSurfaceKHR; +#endif +#ifdef VK_USE_PLATFORM_XCB_KHR + PFN_vkGetPhysicalDeviceXcbPresentationSupportKHR GetPhysicalDeviceXcbPresentationSupportKHR; +#else + void *GetPhysicalDeviceXcbPresentationSupportKHR; +#endif + PFN_vkCreateDebugReportCallbackEXT CreateDebugReportCallbackEXT; + PFN_vkDestroyDebugReportCallbackEXT DestroyDebugReportCallbackEXT; + PFN_vkDebugReportMessageEXT DebugReportMessageEXT; + PFN_vkDebugMarkerSetObjectNameEXT DebugMarkerSetObjectNameEXT; + PFN_vkDebugMarkerSetObjectTagEXT DebugMarkerSetObjectTagEXT; + PFN_vkCmdDebugMarkerBeginEXT CmdDebugMarkerBeginEXT; + PFN_vkCmdDebugMarkerEndEXT CmdDebugMarkerEndEXT; + PFN_vkCmdDebugMarkerInsertEXT CmdDebugMarkerInsertEXT; + PFN_vkGetPhysicalDeviceExternalImageFormatPropertiesNV GetPhysicalDeviceExternalImageFormatPropertiesNV; +#ifdef VK_USE_PLATFORM_WIN32_KHR + PFN_vkGetMemoryWin32HandleNV GetMemoryWin32HandleNV; +#else + void *GetMemoryWin32HandleNV; +#endif + PFN_vkCmdDrawIndirectCountAMD CmdDrawIndirectCountAMD; + PFN_vkCmdDrawIndexedIndirectCountAMD CmdDrawIndexedIndirectCountAMD; + PFN_vkCmdProcessCommandsNVX CmdProcessCommandsNVX; + PFN_vkCmdReserveSpaceForCommandsNVX CmdReserveSpaceForCommandsNVX; + PFN_vkCreateIndirectCommandsLayoutNVX CreateIndirectCommandsLayoutNVX; + PFN_vkDestroyIndirectCommandsLayoutNVX DestroyIndirectCommandsLayoutNVX; + PFN_vkCreateObjectTableNVX CreateObjectTableNVX; + PFN_vkDestroyObjectTableNVX DestroyObjectTableNVX; + PFN_vkRegisterObjectsNVX RegisterObjectsNVX; + PFN_vkUnregisterObjectsNVX UnregisterObjectsNVX; + PFN_vkGetPhysicalDeviceGeneratedCommandsPropertiesNVX GetPhysicalDeviceGeneratedCommandsPropertiesNVX; + }; + + }; + +}; + +VkResult radv_CreateInstance(const VkInstanceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkInstance* pInstance); +void radv_DestroyInstance(VkInstance instance, const VkAllocationCallbacks* pAllocator); +VkResult radv_EnumeratePhysicalDevices(VkInstance instance, uint32_t* pPhysicalDeviceCount, VkPhysicalDevice* pPhysicalDevices); +PFN_vkVoidFunction radv_GetDeviceProcAddr(VkDevice device, const char* pName); +PFN_vkVoidFunction radv_GetInstanceProcAddr(VkInstance instance, const char* pName); +void radv_GetPhysicalDeviceProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties* pProperties); +void radv_GetPhysicalDeviceQueueFamilyProperties(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties* pQueueFamilyProperties); +void radv_GetPhysicalDeviceMemoryProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties* pMemoryProperties); +void radv_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures); +void radv_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties); +VkResult radv_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties); +VkResult radv_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDevice* pDevice); +void radv_DestroyDevice(VkDevice device, const VkAllocationCallbacks* pAllocator); +VkResult radv_EnumerateInstanceLayerProperties(uint32_t* pPropertyCount, VkLayerProperties* pProperties); +VkResult radv_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties); +VkResult radv_EnumerateDeviceLayerProperties(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkLayerProperties* pProperties); +VkResult radv_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties); +void radv_GetDeviceQueue(VkDevice device, uint32_t queueFamilyIndex, uint32_t queueIndex, VkQueue* pQueue); +VkResult radv_QueueSubmit(VkQueue queue, uint32_t submitCount, const VkSubmitInfo* pSubmits, VkFence fence); +VkResult radv_QueueWaitIdle(VkQueue queue); +VkResult radv_DeviceWaitIdle(VkDevice device); +VkResult radv_AllocateMemory(VkDevice device, const VkMemoryAllocateInfo* pAllocateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMemory); +void radv_FreeMemory(VkDevice device, VkDeviceMemory memory, const VkAllocationCallbacks* pAllocator); +VkResult radv_MapMemory(VkDevice device, VkDeviceMemory memory, VkDeviceSize offset, VkDeviceSize size, VkMemoryMapFlags flags, void** ppData); +void radv_UnmapMemory(VkDevice device, VkDeviceMemory memory); +VkResult radv_FlushMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges); +VkResult radv_InvalidateMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges); +void radv_GetDeviceMemoryCommitment(VkDevice device, VkDeviceMemory memory, VkDeviceSize* pCommittedMemoryInBytes); +void radv_GetBufferMemoryRequirements(VkDevice device, VkBuffer buffer, VkMemoryRequirements* pMemoryRequirements); +VkResult radv_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset); +void radv_GetImageMemoryRequirements(VkDevice device, VkImage image, VkMemoryRequirements* pMemoryRequirements); +VkResult radv_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset); +void radv_GetImageSparseMemoryRequirements(VkDevice device, VkImage image, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements* pSparseMemoryRequirements); +void radv_GetPhysicalDeviceSparseImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkSampleCountFlagBits samples, VkImageUsageFlags usage, VkImageTiling tiling, uint32_t* pPropertyCount, VkSparseImageFormatProperties* pProperties); +VkResult radv_QueueBindSparse(VkQueue queue, uint32_t bindInfoCount, const VkBindSparseInfo* pBindInfo, VkFence fence); +VkResult radv_CreateFence(VkDevice device, const VkFenceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFence* pFence); +void radv_DestroyFence(VkDevice device, VkFence fence, const VkAllocationCallbacks* pAllocator); +VkResult radv_ResetFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences); +VkResult radv_GetFenceStatus(VkDevice device, VkFence fence); +VkResult radv_WaitForFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences, VkBool32 waitAll, uint64_t timeout); +VkResult radv_CreateSemaphore(VkDevice device, const VkSemaphoreCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSemaphore* pSemaphore); +void radv_DestroySemaphore(VkDevice device, VkSemaphore semaphore, const VkAllocationCallbacks* pAllocator); +VkResult radv_CreateEvent(VkDevice device, const VkEventCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkEvent* pEvent); +void radv_DestroyEvent(VkDevice device, VkEvent event, const VkAllocationCallbacks* pAllocator); +VkResult radv_GetEventStatus(VkDevice device, VkEvent event); +VkResult radv_SetEvent(VkDevice device, VkEvent event); +VkResult radv_ResetEvent(VkDevice device, VkEvent event); +VkResult radv_CreateQueryPool(VkDevice device, const VkQueryPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkQueryPool* pQueryPool); +void radv_DestroyQueryPool(VkDevice device, VkQueryPool queryPool, const VkAllocationCallbacks* pAllocator); +VkResult radv_GetQueryPoolResults(VkDevice device, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, size_t dataSize, void* pData, VkDeviceSize stride, VkQueryResultFlags flags); +VkResult radv_CreateBuffer(VkDevice device, const VkBufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBuffer* pBuffer); +void radv_DestroyBuffer(VkDevice device, VkBuffer buffer, const VkAllocationCallbacks* pAllocator); +VkResult radv_CreateBufferView(VkDevice device, const VkBufferViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBufferView* pView); +void radv_DestroyBufferView(VkDevice device, VkBufferView bufferView, const VkAllocationCallbacks* pAllocator); +VkResult radv_CreateImage(VkDevice device, const VkImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImage* pImage); +void radv_DestroyImage(VkDevice device, VkImage image, const VkAllocationCallbacks* pAllocator); +void radv_GetImageSubresourceLayout(VkDevice device, VkImage image, const VkImageSubresource* pSubresource, VkSubresourceLayout* pLayout); +VkResult radv_CreateImageView(VkDevice device, const VkImageViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImageView* pView); +void radv_DestroyImageView(VkDevice device, VkImageView imageView, const VkAllocationCallbacks* pAllocator); +VkResult radv_CreateShaderModule(VkDevice device, const VkShaderModuleCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkShaderModule* pShaderModule); +void radv_DestroyShaderModule(VkDevice device, VkShaderModule shaderModule, const VkAllocationCallbacks* pAllocator); +VkResult radv_CreatePipelineCache(VkDevice device, const VkPipelineCacheCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineCache* pPipelineCache); +void radv_DestroyPipelineCache(VkDevice device, VkPipelineCache pipelineCache, const VkAllocationCallbacks* pAllocator); +VkResult radv_GetPipelineCacheData(VkDevice device, VkPipelineCache pipelineCache, size_t* pDataSize, void* pData); +VkResult radv_MergePipelineCaches(VkDevice device, VkPipelineCache dstCache, uint32_t srcCacheCount, const VkPipelineCache* pSrcCaches); +VkResult radv_CreateGraphicsPipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkGraphicsPipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines); +VkResult radv_CreateComputePipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkComputePipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines); +void radv_DestroyPipeline(VkDevice device, VkPipeline pipeline, const VkAllocationCallbacks* pAllocator); +VkResult radv_CreatePipelineLayout(VkDevice device, const VkPipelineLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineLayout* pPipelineLayout); +void radv_DestroyPipelineLayout(VkDevice device, VkPipelineLayout pipelineLayout, const VkAllocationCallbacks* pAllocator); +VkResult radv_CreateSampler(VkDevice device, const VkSamplerCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSampler* pSampler); +void radv_DestroySampler(VkDevice device, VkSampler sampler, const VkAllocationCallbacks* pAllocator); +VkResult radv_CreateDescriptorSetLayout(VkDevice device, const VkDescriptorSetLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorSetLayout* pSetLayout); +void radv_DestroyDescriptorSetLayout(VkDevice device, VkDescriptorSetLayout descriptorSetLayout, const VkAllocationCallbacks* pAllocator); +VkResult radv_CreateDescriptorPool(VkDevice device, const VkDescriptorPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorPool* pDescriptorPool); +void radv_DestroyDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, const VkAllocationCallbacks* pAllocator); +VkResult radv_ResetDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, VkDescriptorPoolResetFlags flags); +VkResult radv_AllocateDescriptorSets(VkDevice device, const VkDescriptorSetAllocateInfo* pAllocateInfo, VkDescriptorSet* pDescriptorSets); +VkResult radv_FreeDescriptorSets(VkDevice device, VkDescriptorPool descriptorPool, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets); +void radv_UpdateDescriptorSets(VkDevice device, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites, uint32_t descriptorCopyCount, const VkCopyDescriptorSet* pDescriptorCopies); +VkResult radv_CreateFramebuffer(VkDevice device, const VkFramebufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFramebuffer* pFramebuffer); +void radv_DestroyFramebuffer(VkDevice device, VkFramebuffer framebuffer, const VkAllocationCallbacks* pAllocator); +VkResult radv_CreateRenderPass(VkDevice device, const VkRenderPassCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkRenderPass* pRenderPass); +void radv_DestroyRenderPass(VkDevice device, VkRenderPass renderPass, const VkAllocationCallbacks* pAllocator); +void radv_GetRenderAreaGranularity(VkDevice device, VkRenderPass renderPass, VkExtent2D* pGranularity); +VkResult radv_CreateCommandPool(VkDevice device, const VkCommandPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkCommandPool* pCommandPool); +void radv_DestroyCommandPool(VkDevice device, VkCommandPool commandPool, const VkAllocationCallbacks* pAllocator); +VkResult radv_ResetCommandPool(VkDevice device, VkCommandPool commandPool, VkCommandPoolResetFlags flags); +VkResult radv_AllocateCommandBuffers(VkDevice device, const VkCommandBufferAllocateInfo* pAllocateInfo, VkCommandBuffer* pCommandBuffers); +void radv_FreeCommandBuffers(VkDevice device, VkCommandPool commandPool, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers); +VkResult radv_BeginCommandBuffer(VkCommandBuffer commandBuffer, const VkCommandBufferBeginInfo* pBeginInfo); +VkResult radv_EndCommandBuffer(VkCommandBuffer commandBuffer); +VkResult radv_ResetCommandBuffer(VkCommandBuffer commandBuffer, VkCommandBufferResetFlags flags); +void radv_CmdBindPipeline(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipeline pipeline); +void radv_CmdSetViewport(VkCommandBuffer commandBuffer, uint32_t firstViewport, uint32_t viewportCount, const VkViewport* pViewports); +void radv_CmdSetScissor(VkCommandBuffer commandBuffer, uint32_t firstScissor, uint32_t scissorCount, const VkRect2D* pScissors); +void radv_CmdSetLineWidth(VkCommandBuffer commandBuffer, float lineWidth); +void radv_CmdSetDepthBias(VkCommandBuffer commandBuffer, float depthBiasConstantFactor, float depthBiasClamp, float depthBiasSlopeFactor); +void radv_CmdSetBlendConstants(VkCommandBuffer commandBuffer, const float blendConstants[4]); +void radv_CmdSetDepthBounds(VkCommandBuffer commandBuffer, float minDepthBounds, float maxDepthBounds); +void radv_CmdSetStencilCompareMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t compareMask); +void radv_CmdSetStencilWriteMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t writeMask); +void radv_CmdSetStencilReference(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t reference); +void radv_CmdBindDescriptorSets(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t firstSet, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets, uint32_t dynamicOffsetCount, const uint32_t* pDynamicOffsets); +void radv_CmdBindIndexBuffer(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkIndexType indexType); +void radv_CmdBindVertexBuffers(VkCommandBuffer commandBuffer, uint32_t firstBinding, uint32_t bindingCount, const VkBuffer* pBuffers, const VkDeviceSize* pOffsets); +void radv_CmdDraw(VkCommandBuffer commandBuffer, uint32_t vertexCount, uint32_t instanceCount, uint32_t firstVertex, uint32_t firstInstance); +void radv_CmdDrawIndexed(VkCommandBuffer commandBuffer, uint32_t indexCount, uint32_t instanceCount, uint32_t firstIndex, int32_t vertexOffset, uint32_t firstInstance); +void radv_CmdDrawIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride); +void radv_CmdDrawIndexedIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride); +void radv_CmdDispatch(VkCommandBuffer commandBuffer, uint32_t x, uint32_t y, uint32_t z); +void radv_CmdDispatchIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset); +void radv_CmdCopyBuffer(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferCopy* pRegions); +void radv_CmdCopyImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageCopy* pRegions); +void radv_CmdBlitImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageBlit* pRegions, VkFilter filter); +void radv_CmdCopyBufferToImage(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkBufferImageCopy* pRegions); +void radv_CmdCopyImageToBuffer(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferImageCopy* pRegions); +void radv_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const void* pData); +void radv_CmdFillBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize size, uint32_t data); +void radv_CmdClearColorImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearColorValue* pColor, uint32_t rangeCount, const VkImageSubresourceRange* pRanges); +void radv_CmdClearDepthStencilImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearDepthStencilValue* pDepthStencil, uint32_t rangeCount, const VkImageSubresourceRange* pRanges); +void radv_CmdClearAttachments(VkCommandBuffer commandBuffer, uint32_t attachmentCount, const VkClearAttachment* pAttachments, uint32_t rectCount, const VkClearRect* pRects); +void radv_CmdResolveImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageResolve* pRegions); +void radv_CmdSetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask); +void radv_CmdResetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask); +void radv_CmdWaitEvents(VkCommandBuffer commandBuffer, uint32_t eventCount, const VkEvent* pEvents, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers); +void radv_CmdPipelineBarrier(VkCommandBuffer commandBuffer, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, VkDependencyFlags dependencyFlags, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers); +void radv_CmdBeginQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query, VkQueryControlFlags flags); +void radv_CmdEndQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query); +void radv_CmdResetQueryPool(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount); +void radv_CmdWriteTimestamp(VkCommandBuffer commandBuffer, VkPipelineStageFlagBits pipelineStage, VkQueryPool queryPool, uint32_t query); +void radv_CmdCopyQueryPoolResults(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize stride, VkQueryResultFlags flags); +void radv_CmdPushConstants(VkCommandBuffer commandBuffer, VkPipelineLayout layout, VkShaderStageFlags stageFlags, uint32_t offset, uint32_t size, const void* pValues); +void radv_CmdBeginRenderPass(VkCommandBuffer commandBuffer, const VkRenderPassBeginInfo* pRenderPassBegin, VkSubpassContents contents); +void radv_CmdNextSubpass(VkCommandBuffer commandBuffer, VkSubpassContents contents); +void radv_CmdEndRenderPass(VkCommandBuffer commandBuffer); +void radv_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers); +#ifdef VK_USE_PLATFORM_ANDROID_KHR +VkResult radv_CreateAndroidSurfaceKHR(VkInstance instance, const VkAndroidSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +#endif // VK_USE_PLATFORM_ANDROID_KHR +VkResult radv_GetPhysicalDeviceDisplayPropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPropertiesKHR* pProperties); +VkResult radv_GetPhysicalDeviceDisplayPlanePropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPlanePropertiesKHR* pProperties); +VkResult radv_GetDisplayPlaneSupportedDisplaysKHR(VkPhysicalDevice physicalDevice, uint32_t planeIndex, uint32_t* pDisplayCount, VkDisplayKHR* pDisplays); +VkResult radv_GetDisplayModePropertiesKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, uint32_t* pPropertyCount, VkDisplayModePropertiesKHR* pProperties); +VkResult radv_CreateDisplayModeKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, const VkDisplayModeCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDisplayModeKHR* pMode); +VkResult radv_GetDisplayPlaneCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkDisplayModeKHR mode, uint32_t planeIndex, VkDisplayPlaneCapabilitiesKHR* pCapabilities); +VkResult radv_CreateDisplayPlaneSurfaceKHR(VkInstance instance, const VkDisplaySurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +VkResult radv_CreateSharedSwapchainsKHR(VkDevice device, uint32_t swapchainCount, const VkSwapchainCreateInfoKHR* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchains); +#ifdef VK_USE_PLATFORM_MIR_KHR +VkResult radv_CreateMirSurfaceKHR(VkInstance instance, const VkMirSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +#endif // VK_USE_PLATFORM_MIR_KHR +#ifdef VK_USE_PLATFORM_MIR_KHR +VkBool32 radv_GetPhysicalDeviceMirPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, MirConnection* connection); +#endif // VK_USE_PLATFORM_MIR_KHR +void radv_DestroySurfaceKHR(VkInstance instance, VkSurfaceKHR surface, const VkAllocationCallbacks* pAllocator); +VkResult radv_GetPhysicalDeviceSurfaceSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, VkSurfaceKHR surface, VkBool32* pSupported); +VkResult radv_GetPhysicalDeviceSurfaceCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, VkSurfaceCapabilitiesKHR* pSurfaceCapabilities); +VkResult radv_GetPhysicalDeviceSurfaceFormatsKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pSurfaceFormatCount, VkSurfaceFormatKHR* pSurfaceFormats); +VkResult radv_GetPhysicalDeviceSurfacePresentModesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pPresentModeCount, VkPresentModeKHR* pPresentModes); +VkResult radv_CreateSwapchainKHR(VkDevice device, const VkSwapchainCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchain); +void radv_DestroySwapchainKHR(VkDevice device, VkSwapchainKHR swapchain, const VkAllocationCallbacks* pAllocator); +VkResult radv_GetSwapchainImagesKHR(VkDevice device, VkSwapchainKHR swapchain, uint32_t* pSwapchainImageCount, VkImage* pSwapchainImages); +VkResult radv_AcquireNextImageKHR(VkDevice device, VkSwapchainKHR swapchain, uint64_t timeout, VkSemaphore semaphore, VkFence fence, uint32_t* pImageIndex); +VkResult radv_QueuePresentKHR(VkQueue queue, const VkPresentInfoKHR* pPresentInfo); +#ifdef VK_USE_PLATFORM_WAYLAND_KHR +VkResult radv_CreateWaylandSurfaceKHR(VkInstance instance, const VkWaylandSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +#endif // VK_USE_PLATFORM_WAYLAND_KHR +#ifdef VK_USE_PLATFORM_WAYLAND_KHR +VkBool32 radv_GetPhysicalDeviceWaylandPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, struct wl_display* display); +#endif // VK_USE_PLATFORM_WAYLAND_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR +VkResult radv_CreateWin32SurfaceKHR(VkInstance instance, const VkWin32SurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR +VkBool32 radv_GetPhysicalDeviceWin32PresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex); +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR +VkResult radv_CreateXlibSurfaceKHR(VkInstance instance, const VkXlibSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR +VkBool32 radv_GetPhysicalDeviceXlibPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, Display* dpy, VisualID visualID); +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR +VkResult radv_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +#endif // VK_USE_PLATFORM_XCB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR +VkBool32 radv_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id); +#endif // VK_USE_PLATFORM_XCB_KHR +VkResult radv_CreateDebugReportCallbackEXT(VkInstance instance, const VkDebugReportCallbackCreateInfoEXT* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDebugReportCallbackEXT* pCallback); +void radv_DestroyDebugReportCallbackEXT(VkInstance instance, VkDebugReportCallbackEXT callback, const VkAllocationCallbacks* pAllocator); +void radv_DebugReportMessageEXT(VkInstance instance, VkDebugReportFlagsEXT flags, VkDebugReportObjectTypeEXT objectType, uint64_t object, size_t location, int32_t messageCode, const char* pLayerPrefix, const char* pMessage); +VkResult radv_DebugMarkerSetObjectNameEXT(VkDevice device, VkDebugMarkerObjectNameInfoEXT* pNameInfo); +VkResult radv_DebugMarkerSetObjectTagEXT(VkDevice device, VkDebugMarkerObjectTagInfoEXT* pTagInfo); +void radv_CmdDebugMarkerBeginEXT(VkCommandBuffer commandBuffer, VkDebugMarkerMarkerInfoEXT* pMarkerInfo); +void radv_CmdDebugMarkerEndEXT(VkCommandBuffer commandBuffer); +void radv_CmdDebugMarkerInsertEXT(VkCommandBuffer commandBuffer, VkDebugMarkerMarkerInfoEXT* pMarkerInfo); +VkResult radv_GetPhysicalDeviceExternalImageFormatPropertiesNV(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkExternalMemoryHandleTypeFlagsNV externalHandleType, VkExternalImageFormatPropertiesNV* pExternalImageFormatProperties); +#ifdef VK_USE_PLATFORM_WIN32_KHR +VkResult radv_GetMemoryWin32HandleNV(VkDevice device, VkDeviceMemory memory, VkExternalMemoryHandleTypeFlagsNV handleType, HANDLE* pHandle); +#endif // VK_USE_PLATFORM_WIN32_KHR +void radv_CmdDrawIndirectCountAMD(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkBuffer countBuffer, VkDeviceSize countBufferOffset, uint32_t maxDrawCount, uint32_t stride); +void radv_CmdDrawIndexedIndirectCountAMD(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkBuffer countBuffer, VkDeviceSize countBufferOffset, uint32_t maxDrawCount, uint32_t stride); +void radv_CmdProcessCommandsNVX(VkCommandBuffer commandBuffer, const VkCmdProcessCommandsInfoNVX* pProcessCommandsInfo); +void radv_CmdReserveSpaceForCommandsNVX(VkCommandBuffer commandBuffer, const VkCmdReserveSpaceForCommandsInfoNVX* pReserveSpaceInfo); +VkResult radv_CreateIndirectCommandsLayoutNVX(VkDevice device, const VkIndirectCommandsLayoutCreateInfoNVX* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkIndirectCommandsLayoutNVX* pIndirectCommandsLayout); +void radv_DestroyIndirectCommandsLayoutNVX(VkDevice device, VkIndirectCommandsLayoutNVX indirectCommandsLayout, const VkAllocationCallbacks* pAllocator); +VkResult radv_CreateObjectTableNVX(VkDevice device, const VkObjectTableCreateInfoNVX* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkObjectTableNVX* pObjectTable); +void radv_DestroyObjectTableNVX(VkDevice device, VkObjectTableNVX objectTable, const VkAllocationCallbacks* pAllocator); +VkResult radv_RegisterObjectsNVX(VkDevice device, VkObjectTableNVX objectTable, uint32_t objectCount, const VkObjectTableEntryNVX* const* ppObjectTableEntries, const uint32_t* pObjectIndices); +VkResult radv_UnregisterObjectsNVX(VkDevice device, VkObjectTableNVX objectTable, uint32_t objectCount, const VkObjectEntryTypeNVX* pObjectEntryTypes, const uint32_t* pObjectIndices); +void radv_GetPhysicalDeviceGeneratedCommandsPropertiesNVX(VkPhysicalDevice physicalDevice, VkDeviceGeneratedCommandsFeaturesNVX* pFeatures, VkDeviceGeneratedCommandsLimitsNVX* pLimits); diff -Nru mesa-12.0.6/src/amd/vulkan/radv_formats.c mesa-17.0.7/src/amd/vulkan/radv_formats.c --- mesa-12.0.6/src/amd/vulkan/radv_formats.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_formats.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,1083 @@ +/* + * Copyright © 2016 Red Hat. + * Copyright © 2016 Bas Nieuwenhuizen + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "radv_private.h" + +#include "vk_format.h" +#include "sid.h" +#include "r600d_common.h" + +#include "util/u_half.h" +#include "util/format_srgb.h" + +uint32_t radv_translate_buffer_dataformat(const struct vk_format_description *desc, + int first_non_void) +{ + unsigned type; + int i; + + if (desc->format == VK_FORMAT_B10G11R11_UFLOAT_PACK32) + return V_008F0C_BUF_DATA_FORMAT_10_11_11; + + if (first_non_void < 0) + return V_008F0C_BUF_DATA_FORMAT_INVALID; + type = desc->channel[first_non_void].type; + + if (type == VK_FORMAT_TYPE_FIXED) + return V_008F0C_BUF_DATA_FORMAT_INVALID; + if (desc->nr_channels == 4 && + desc->channel[0].size == 10 && + desc->channel[1].size == 10 && + desc->channel[2].size == 10 && + desc->channel[3].size == 2) + return V_008F0C_BUF_DATA_FORMAT_2_10_10_10; + + /* See whether the components are of the same size. */ + for (i = 0; i < desc->nr_channels; i++) { + if (desc->channel[first_non_void].size != desc->channel[i].size) + return V_008F0C_BUF_DATA_FORMAT_INVALID; + } + + switch (desc->channel[first_non_void].size) { + case 8: + switch (desc->nr_channels) { + case 1: + return V_008F0C_BUF_DATA_FORMAT_8; + case 2: + return V_008F0C_BUF_DATA_FORMAT_8_8; + case 4: + return V_008F0C_BUF_DATA_FORMAT_8_8_8_8; + } + break; + case 16: + switch (desc->nr_channels) { + case 1: + return V_008F0C_BUF_DATA_FORMAT_16; + case 2: + return V_008F0C_BUF_DATA_FORMAT_16_16; + case 4: + return V_008F0C_BUF_DATA_FORMAT_16_16_16_16; + } + break; + case 32: + /* From the Southern Islands ISA documentation about MTBUF: + * 'Memory reads of data in memory that is 32 or 64 bits do not + * undergo any format conversion.' + */ + if (type != VK_FORMAT_TYPE_FLOAT && + !desc->channel[first_non_void].pure_integer) + return V_008F0C_BUF_DATA_FORMAT_INVALID; + + switch (desc->nr_channels) { + case 1: + return V_008F0C_BUF_DATA_FORMAT_32; + case 2: + return V_008F0C_BUF_DATA_FORMAT_32_32; + case 3: + return V_008F0C_BUF_DATA_FORMAT_32_32_32; + case 4: + return V_008F0C_BUF_DATA_FORMAT_32_32_32_32; + } + break; + } + + return V_008F0C_BUF_DATA_FORMAT_INVALID; +} + +uint32_t radv_translate_buffer_numformat(const struct vk_format_description *desc, + int first_non_void) +{ + if (desc->format == VK_FORMAT_B10G11R11_UFLOAT_PACK32) + return V_008F0C_BUF_NUM_FORMAT_FLOAT; + + if (first_non_void < 0) + return ~0; + + switch (desc->channel[first_non_void].type) { + case VK_FORMAT_TYPE_SIGNED: + if (desc->channel[first_non_void].normalized) + return V_008F0C_BUF_NUM_FORMAT_SNORM; + else if (desc->channel[first_non_void].pure_integer) + return V_008F0C_BUF_NUM_FORMAT_SINT; + else + return V_008F0C_BUF_NUM_FORMAT_SSCALED; + break; + case VK_FORMAT_TYPE_UNSIGNED: + if (desc->channel[first_non_void].normalized) + return V_008F0C_BUF_NUM_FORMAT_UNORM; + else if (desc->channel[first_non_void].pure_integer) + return V_008F0C_BUF_NUM_FORMAT_UINT; + else + return V_008F0C_BUF_NUM_FORMAT_USCALED; + break; + case VK_FORMAT_TYPE_FLOAT: + default: + return V_008F0C_BUF_NUM_FORMAT_FLOAT; + } +} + +uint32_t radv_translate_tex_dataformat(VkFormat format, + const struct vk_format_description *desc, + int first_non_void) +{ + bool uniform = true; + int i; + + if (!desc) + return ~0; + /* Colorspace (return non-RGB formats directly). */ + switch (desc->colorspace) { + /* Depth stencil formats */ + case VK_FORMAT_COLORSPACE_ZS: + switch (format) { + case VK_FORMAT_D16_UNORM: + return V_008F14_IMG_DATA_FORMAT_16; + case VK_FORMAT_D24_UNORM_S8_UINT: + case VK_FORMAT_X8_D24_UNORM_PACK32: + return V_008F14_IMG_DATA_FORMAT_8_24; + case VK_FORMAT_S8_UINT: + return V_008F14_IMG_DATA_FORMAT_8; + case VK_FORMAT_D32_SFLOAT: + return V_008F14_IMG_DATA_FORMAT_32; + case VK_FORMAT_D32_SFLOAT_S8_UINT: + return V_008F14_IMG_DATA_FORMAT_X24_8_32; + default: + goto out_unknown; + } + + case VK_FORMAT_COLORSPACE_YUV: + goto out_unknown; /* TODO */ + + case VK_FORMAT_COLORSPACE_SRGB: + if (desc->nr_channels != 4 && desc->nr_channels != 1) + goto out_unknown; + break; + + default: + break; + } + + if (desc->layout == VK_FORMAT_LAYOUT_RGTC) { + switch(format) { + case VK_FORMAT_BC4_UNORM_BLOCK: + case VK_FORMAT_BC4_SNORM_BLOCK: + return V_008F14_IMG_DATA_FORMAT_BC4; + case VK_FORMAT_BC5_UNORM_BLOCK: + case VK_FORMAT_BC5_SNORM_BLOCK: + return V_008F14_IMG_DATA_FORMAT_BC5; + default: + break; + } + } + + if (desc->layout == VK_FORMAT_LAYOUT_S3TC) { + switch(format) { + case VK_FORMAT_BC1_RGB_UNORM_BLOCK: + case VK_FORMAT_BC1_RGB_SRGB_BLOCK: + case VK_FORMAT_BC1_RGBA_UNORM_BLOCK: + case VK_FORMAT_BC1_RGBA_SRGB_BLOCK: + return V_008F14_IMG_DATA_FORMAT_BC1; + case VK_FORMAT_BC2_UNORM_BLOCK: + case VK_FORMAT_BC2_SRGB_BLOCK: + return V_008F14_IMG_DATA_FORMAT_BC2; + case VK_FORMAT_BC3_UNORM_BLOCK: + case VK_FORMAT_BC3_SRGB_BLOCK: + return V_008F14_IMG_DATA_FORMAT_BC3; + default: + break; + } + } + + if (desc->layout == VK_FORMAT_LAYOUT_BPTC) { + switch(format) { + case VK_FORMAT_BC6H_UFLOAT_BLOCK: + case VK_FORMAT_BC6H_SFLOAT_BLOCK: + return V_008F14_IMG_DATA_FORMAT_BC6; + case VK_FORMAT_BC7_UNORM_BLOCK: + case VK_FORMAT_BC7_SRGB_BLOCK: + return V_008F14_IMG_DATA_FORMAT_BC7; + default: + break; + } + } + + if (format == VK_FORMAT_E5B9G9R9_UFLOAT_PACK32) { + return V_008F14_IMG_DATA_FORMAT_5_9_9_9; + } else if (format == VK_FORMAT_B10G11R11_UFLOAT_PACK32) { + return V_008F14_IMG_DATA_FORMAT_10_11_11; + } + + /* R8G8Bx_SNORM - TODO CxV8U8 */ + + /* hw cannot support mixed formats (except depth/stencil, since only + * depth is read).*/ + if (desc->is_mixed && desc->colorspace != VK_FORMAT_COLORSPACE_ZS) + goto out_unknown; + + /* See whether the components are of the same size. */ + for (i = 1; i < desc->nr_channels; i++) { + uniform = uniform && desc->channel[0].size == desc->channel[i].size; + } + + /* Non-uniform formats. */ + if (!uniform) { + switch(desc->nr_channels) { + case 3: + if (desc->channel[0].size == 5 && + desc->channel[1].size == 6 && + desc->channel[2].size == 5) { + return V_008F14_IMG_DATA_FORMAT_5_6_5; + } + goto out_unknown; + case 4: + if (desc->channel[0].size == 5 && + desc->channel[1].size == 5 && + desc->channel[2].size == 5 && + desc->channel[3].size == 1) { + return V_008F14_IMG_DATA_FORMAT_1_5_5_5; + } + if (desc->channel[0].size == 1 && + desc->channel[1].size == 5 && + desc->channel[2].size == 5 && + desc->channel[3].size == 5) { + return V_008F14_IMG_DATA_FORMAT_5_5_5_1; + } + if (desc->channel[0].size == 10 && + desc->channel[1].size == 10 && + desc->channel[2].size == 10 && + desc->channel[3].size == 2) { + /* Closed VK driver does this also no 2/10/10/10 snorm */ + if (desc->channel[0].type == VK_FORMAT_TYPE_SIGNED && + desc->channel[0].normalized) + goto out_unknown; + return V_008F14_IMG_DATA_FORMAT_2_10_10_10; + } + goto out_unknown; + } + goto out_unknown; + } + + if (first_non_void < 0 || first_non_void > 3) + goto out_unknown; + + /* uniform formats */ + switch (desc->channel[first_non_void].size) { + case 4: + switch (desc->nr_channels) { +#if 0 /* Not supported for render targets */ + case 2: + return V_008F14_IMG_DATA_FORMAT_4_4; +#endif + case 4: + return V_008F14_IMG_DATA_FORMAT_4_4_4_4; + } + break; + case 8: + switch (desc->nr_channels) { + case 1: + return V_008F14_IMG_DATA_FORMAT_8; + case 2: + return V_008F14_IMG_DATA_FORMAT_8_8; + case 4: + return V_008F14_IMG_DATA_FORMAT_8_8_8_8; + } + break; + case 16: + switch (desc->nr_channels) { + case 1: + return V_008F14_IMG_DATA_FORMAT_16; + case 2: + return V_008F14_IMG_DATA_FORMAT_16_16; + case 4: + return V_008F14_IMG_DATA_FORMAT_16_16_16_16; + } + break; + case 32: + switch (desc->nr_channels) { + case 1: + return V_008F14_IMG_DATA_FORMAT_32; + case 2: + return V_008F14_IMG_DATA_FORMAT_32_32; +#if 0 /* Not supported for render targets */ + case 3: + return V_008F14_IMG_DATA_FORMAT_32_32_32; +#endif + case 4: + return V_008F14_IMG_DATA_FORMAT_32_32_32_32; + } + } + +out_unknown: + /* R600_ERR("Unable to handle texformat %d %s\n", format, vk_format_name(format)); */ + return ~0; +} + +uint32_t radv_translate_tex_numformat(VkFormat format, + const struct vk_format_description *desc, + int first_non_void) +{ + switch (format) { + case VK_FORMAT_D24_UNORM_S8_UINT: + return V_008F14_IMG_NUM_FORMAT_UNORM; + default: + if (first_non_void < 0) { + if (vk_format_is_compressed(format)) { + switch (format) { + case VK_FORMAT_BC1_RGB_SRGB_BLOCK: + case VK_FORMAT_BC1_RGBA_SRGB_BLOCK: + case VK_FORMAT_BC2_SRGB_BLOCK: + case VK_FORMAT_BC3_SRGB_BLOCK: + case VK_FORMAT_BC7_SRGB_BLOCK: + return V_008F14_IMG_NUM_FORMAT_SRGB; + case VK_FORMAT_BC4_SNORM_BLOCK: + case VK_FORMAT_BC5_SNORM_BLOCK: + case VK_FORMAT_BC6H_SFLOAT_BLOCK: + return V_008F14_IMG_NUM_FORMAT_SNORM; + default: + return V_008F14_IMG_NUM_FORMAT_UNORM; + } + } else if (desc->layout == VK_FORMAT_LAYOUT_SUBSAMPLED) { + return V_008F14_IMG_NUM_FORMAT_UNORM; + } else { + return V_008F14_IMG_NUM_FORMAT_FLOAT; + } + } else if (desc->colorspace == VK_FORMAT_COLORSPACE_SRGB) { + return V_008F14_IMG_NUM_FORMAT_SRGB; + } else { + switch (desc->channel[first_non_void].type) { + case VK_FORMAT_TYPE_FLOAT: + return V_008F14_IMG_NUM_FORMAT_FLOAT; + case VK_FORMAT_TYPE_SIGNED: + if (desc->channel[first_non_void].normalized) + return V_008F14_IMG_NUM_FORMAT_SNORM; + else if (desc->channel[first_non_void].pure_integer) + return V_008F14_IMG_NUM_FORMAT_SINT; + else + return V_008F14_IMG_NUM_FORMAT_SSCALED; + case VK_FORMAT_TYPE_UNSIGNED: + if (desc->channel[first_non_void].normalized) + return V_008F14_IMG_NUM_FORMAT_UNORM; + else if (desc->channel[first_non_void].pure_integer) + return V_008F14_IMG_NUM_FORMAT_UINT; + else + return V_008F14_IMG_NUM_FORMAT_USCALED; + default: + return V_008F14_IMG_NUM_FORMAT_UNORM; + } + } + } +} + +uint32_t radv_translate_color_numformat(VkFormat format, + const struct vk_format_description *desc, + int first_non_void) +{ + unsigned ntype; + if (first_non_void == -1 || desc->channel[first_non_void].type == VK_FORMAT_TYPE_FLOAT) + ntype = V_028C70_NUMBER_FLOAT; + else { + ntype = V_028C70_NUMBER_UNORM; + if (desc->colorspace == VK_FORMAT_COLORSPACE_SRGB) + ntype = V_028C70_NUMBER_SRGB; + else if (desc->channel[first_non_void].type == VK_FORMAT_TYPE_SIGNED) { + if (desc->channel[first_non_void].pure_integer) { + ntype = V_028C70_NUMBER_SINT; + } else if (desc->channel[first_non_void].normalized) { + ntype = V_028C70_NUMBER_SNORM; + } else + ntype = ~0u; + } else if (desc->channel[first_non_void].type == VK_FORMAT_TYPE_UNSIGNED) { + if (desc->channel[first_non_void].pure_integer) { + ntype = V_028C70_NUMBER_UINT; + } else if (desc->channel[first_non_void].normalized) { + ntype = V_028C70_NUMBER_UNORM; + } else + ntype = ~0u; + } + } + return ntype; +} + +static bool radv_is_sampler_format_supported(VkFormat format, bool *linear_sampling) +{ + const struct vk_format_description *desc = vk_format_description(format); + uint32_t num_format; + if (!desc || format == VK_FORMAT_UNDEFINED) + return false; + num_format = radv_translate_tex_numformat(format, desc, + vk_format_get_first_non_void_channel(format)); + + if (num_format == V_008F14_IMG_NUM_FORMAT_USCALED || + num_format == V_008F14_IMG_NUM_FORMAT_SSCALED) + return false; + + if (num_format == V_008F14_IMG_NUM_FORMAT_UNORM || + num_format == V_008F14_IMG_NUM_FORMAT_SNORM || + num_format == V_008F14_IMG_NUM_FORMAT_FLOAT || + num_format == V_008F14_IMG_NUM_FORMAT_SRGB) + *linear_sampling = true; + else + *linear_sampling = false; + return radv_translate_tex_dataformat(format, vk_format_description(format), + vk_format_get_first_non_void_channel(format)) != ~0U; +} + + +static bool radv_is_storage_image_format_supported(struct radv_physical_device *physical_device, + VkFormat format) +{ + const struct vk_format_description *desc = vk_format_description(format); + unsigned data_format, num_format; + if (!desc || format == VK_FORMAT_UNDEFINED) + return false; + + data_format = radv_translate_tex_dataformat(format, desc, + vk_format_get_first_non_void_channel(format)); + num_format = radv_translate_tex_numformat(format, desc, + vk_format_get_first_non_void_channel(format)); + + if(data_format == ~0 || num_format == ~0) + return false; + + /* Extracted from the GCN3 ISA document. */ + switch(num_format) { + case V_008F14_IMG_NUM_FORMAT_UNORM: + case V_008F14_IMG_NUM_FORMAT_SNORM: + case V_008F14_IMG_NUM_FORMAT_UINT: + case V_008F14_IMG_NUM_FORMAT_SINT: + case V_008F14_IMG_NUM_FORMAT_FLOAT: + break; + default: + return false; + } + + switch(data_format) { + case V_008F14_IMG_DATA_FORMAT_8: + case V_008F14_IMG_DATA_FORMAT_16: + case V_008F14_IMG_DATA_FORMAT_8_8: + case V_008F14_IMG_DATA_FORMAT_32: + case V_008F14_IMG_DATA_FORMAT_16_16: + case V_008F14_IMG_DATA_FORMAT_10_11_11: + case V_008F14_IMG_DATA_FORMAT_11_11_10: + case V_008F14_IMG_DATA_FORMAT_10_10_10_2: + case V_008F14_IMG_DATA_FORMAT_2_10_10_10: + case V_008F14_IMG_DATA_FORMAT_8_8_8_8: + case V_008F14_IMG_DATA_FORMAT_32_32: + case V_008F14_IMG_DATA_FORMAT_16_16_16_16: + case V_008F14_IMG_DATA_FORMAT_32_32_32_32: + case V_008F14_IMG_DATA_FORMAT_5_6_5: + case V_008F14_IMG_DATA_FORMAT_1_5_5_5: + case V_008F14_IMG_DATA_FORMAT_5_5_5_1: + case V_008F14_IMG_DATA_FORMAT_4_4_4_4: + /* TODO: FMASK formats. */ + return true; + default: + return false; + } +} + +static bool radv_is_buffer_format_supported(VkFormat format) +{ + const struct vk_format_description *desc = vk_format_description(format); + unsigned data_format, num_format; + if (!desc || format == VK_FORMAT_UNDEFINED) + return false; + + data_format = radv_translate_buffer_dataformat(desc, + vk_format_get_first_non_void_channel(format)); + num_format = radv_translate_buffer_numformat(desc, + vk_format_get_first_non_void_channel(format)); + + return data_format != V_008F0C_BUF_DATA_FORMAT_INVALID && + num_format != ~0; +} + +bool radv_is_colorbuffer_format_supported(VkFormat format, bool *blendable) +{ + const struct vk_format_description *desc = vk_format_description(format); + uint32_t color_format = radv_translate_colorformat(format); + uint32_t color_swap = radv_translate_colorswap(format, false); + uint32_t color_num_format = radv_translate_color_numformat(format, + desc, + vk_format_get_first_non_void_channel(format)); + + if (color_num_format == V_028C70_NUMBER_UINT || color_num_format == V_028C70_NUMBER_SINT || + color_format == V_028C70_COLOR_8_24 || color_format == V_028C70_COLOR_24_8 || + color_format == V_028C70_COLOR_X24_8_32_FLOAT) { + *blendable = false; + } else + *blendable = true; + return color_format != V_028C70_COLOR_INVALID && + color_swap != ~0U && + color_num_format != ~0; +} + +static bool radv_is_zs_format_supported(VkFormat format) +{ + return radv_translate_dbformat(format) != V_028040_Z_INVALID; +} + +static void +radv_physical_device_get_format_properties(struct radv_physical_device *physical_device, + VkFormat format, + VkFormatProperties *out_properties) +{ + VkFormatFeatureFlags linear = 0, tiled = 0, buffer = 0; + const struct vk_format_description *desc = vk_format_description(format); + bool blendable; + if (!desc) { + out_properties->linearTilingFeatures = linear; + out_properties->optimalTilingFeatures = tiled; + out_properties->bufferFeatures = buffer; + return; + } + + if (radv_is_storage_image_format_supported(physical_device, format)) { + tiled |= VK_FORMAT_FEATURE_STORAGE_IMAGE_BIT; + linear |= VK_FORMAT_FEATURE_STORAGE_IMAGE_BIT; + } + + if (radv_is_buffer_format_supported(format)) { + buffer |= VK_FORMAT_FEATURE_VERTEX_BUFFER_BIT | + VK_FORMAT_FEATURE_UNIFORM_TEXEL_BUFFER_BIT | + VK_FORMAT_FEATURE_STORAGE_TEXEL_BUFFER_BIT; + } + + if (vk_format_is_depth_or_stencil(format)) { + if (radv_is_zs_format_supported(format)) + tiled |= VK_FORMAT_FEATURE_DEPTH_STENCIL_ATTACHMENT_BIT; + tiled |= VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT; + tiled |= VK_FORMAT_FEATURE_BLIT_SRC_BIT | + VK_FORMAT_FEATURE_BLIT_DST_BIT; + } else { + bool linear_sampling; + if (radv_is_sampler_format_supported(format, &linear_sampling)) { + linear |= VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT | + VK_FORMAT_FEATURE_BLIT_SRC_BIT; + tiled |= VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT | + VK_FORMAT_FEATURE_BLIT_SRC_BIT; + if (linear_sampling) { + linear |= VK_FORMAT_FEATURE_SAMPLED_IMAGE_FILTER_LINEAR_BIT; + tiled |= VK_FORMAT_FEATURE_SAMPLED_IMAGE_FILTER_LINEAR_BIT; + } + } + if (radv_is_colorbuffer_format_supported(format, &blendable)) { + linear |= VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BIT | VK_FORMAT_FEATURE_BLIT_DST_BIT; + tiled |= VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BIT | VK_FORMAT_FEATURE_BLIT_DST_BIT; + if (blendable) { + linear |= VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BLEND_BIT; + tiled |= VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BLEND_BIT; + } + } + } + + if (format == VK_FORMAT_R32_UINT || format == VK_FORMAT_R32_SINT) { + buffer |= VK_FORMAT_FEATURE_STORAGE_TEXEL_BUFFER_ATOMIC_BIT; + linear |= VK_FORMAT_FEATURE_STORAGE_IMAGE_ATOMIC_BIT; + tiled |= VK_FORMAT_FEATURE_STORAGE_IMAGE_ATOMIC_BIT; + } + + out_properties->linearTilingFeatures = linear; + out_properties->optimalTilingFeatures = tiled; + out_properties->bufferFeatures = buffer; +} + +uint32_t radv_translate_colorformat(VkFormat format) +{ + const struct vk_format_description *desc = vk_format_description(format); + +#define HAS_SIZE(x,y,z,w) \ + (desc->channel[0].size == (x) && desc->channel[1].size == (y) && \ + desc->channel[2].size == (z) && desc->channel[3].size == (w)) + + if (format == VK_FORMAT_B10G11R11_UFLOAT_PACK32) /* isn't plain */ + return V_028C70_COLOR_10_11_11; + + if (desc->layout != VK_FORMAT_LAYOUT_PLAIN) + return V_028C70_COLOR_INVALID; + + /* hw cannot support mixed formats (except depth/stencil, since + * stencil is not written to). */ + if (desc->is_mixed && desc->colorspace != VK_FORMAT_COLORSPACE_ZS) + return V_028C70_COLOR_INVALID; + + switch (desc->nr_channels) { + case 1: + switch (desc->channel[0].size) { + case 8: + return V_028C70_COLOR_8; + case 16: + return V_028C70_COLOR_16; + case 32: + return V_028C70_COLOR_32; + } + break; + case 2: + if (desc->channel[0].size == desc->channel[1].size) { + switch (desc->channel[0].size) { + case 8: + return V_028C70_COLOR_8_8; + case 16: + return V_028C70_COLOR_16_16; + case 32: + return V_028C70_COLOR_32_32; + } + } else if (HAS_SIZE(8,24,0,0)) { + return V_028C70_COLOR_24_8; + } else if (HAS_SIZE(24,8,0,0)) { + return V_028C70_COLOR_8_24; + } + break; + case 3: + if (HAS_SIZE(5,6,5,0)) { + return V_028C70_COLOR_5_6_5; + } else if (HAS_SIZE(32,8,24,0)) { + return V_028C70_COLOR_X24_8_32_FLOAT; + } + break; + case 4: + if (desc->channel[0].size == desc->channel[1].size && + desc->channel[0].size == desc->channel[2].size && + desc->channel[0].size == desc->channel[3].size) { + switch (desc->channel[0].size) { + case 4: + return V_028C70_COLOR_4_4_4_4; + case 8: + return V_028C70_COLOR_8_8_8_8; + case 16: + return V_028C70_COLOR_16_16_16_16; + case 32: + return V_028C70_COLOR_32_32_32_32; + } + } else if (HAS_SIZE(5,5,5,1)) { + return V_028C70_COLOR_1_5_5_5; + } else if (HAS_SIZE(1,5,5,5)) { + return V_028C70_COLOR_5_5_5_1; + } else if (HAS_SIZE(10,10,10,2)) { + return V_028C70_COLOR_2_10_10_10; + } + break; + } + return V_028C70_COLOR_INVALID; +} + +uint32_t radv_colorformat_endian_swap(uint32_t colorformat) +{ + if (0/*SI_BIG_ENDIAN*/) { + switch(colorformat) { + /* 8-bit buffers. */ + case V_028C70_COLOR_8: + return V_028C70_ENDIAN_NONE; + + /* 16-bit buffers. */ + case V_028C70_COLOR_5_6_5: + case V_028C70_COLOR_1_5_5_5: + case V_028C70_COLOR_4_4_4_4: + case V_028C70_COLOR_16: + case V_028C70_COLOR_8_8: + return V_028C70_ENDIAN_8IN16; + + /* 32-bit buffers. */ + case V_028C70_COLOR_8_8_8_8: + case V_028C70_COLOR_2_10_10_10: + case V_028C70_COLOR_8_24: + case V_028C70_COLOR_24_8: + case V_028C70_COLOR_16_16: + return V_028C70_ENDIAN_8IN32; + + /* 64-bit buffers. */ + case V_028C70_COLOR_16_16_16_16: + return V_028C70_ENDIAN_8IN16; + + case V_028C70_COLOR_32_32: + return V_028C70_ENDIAN_8IN32; + + /* 128-bit buffers. */ + case V_028C70_COLOR_32_32_32_32: + return V_028C70_ENDIAN_8IN32; + default: + return V_028C70_ENDIAN_NONE; /* Unsupported. */ + } + } else { + return V_028C70_ENDIAN_NONE; + } +} + +uint32_t radv_translate_dbformat(VkFormat format) +{ + switch (format) { + case VK_FORMAT_D16_UNORM: + case VK_FORMAT_D16_UNORM_S8_UINT: + return V_028040_Z_16; + case VK_FORMAT_D32_SFLOAT: + case VK_FORMAT_D32_SFLOAT_S8_UINT: + return V_028040_Z_32_FLOAT; + default: + return V_028040_Z_INVALID; + } +} + +unsigned radv_translate_colorswap(VkFormat format, bool do_endian_swap) +{ + const struct vk_format_description *desc = vk_format_description(format); + +#define HAS_SWIZZLE(chan,swz) (desc->swizzle[chan] == VK_SWIZZLE_##swz) + + if (format == VK_FORMAT_B10G11R11_UFLOAT_PACK32) + return V_0280A0_SWAP_STD; + + if (desc->layout != VK_FORMAT_LAYOUT_PLAIN) + return ~0U; + + switch (desc->nr_channels) { + case 1: + if (HAS_SWIZZLE(0,X)) + return V_0280A0_SWAP_STD; /* X___ */ + else if (HAS_SWIZZLE(3,X)) + return V_0280A0_SWAP_ALT_REV; /* ___X */ + break; + case 2: + if ((HAS_SWIZZLE(0,X) && HAS_SWIZZLE(1,Y)) || + (HAS_SWIZZLE(0,X) && HAS_SWIZZLE(1,NONE)) || + (HAS_SWIZZLE(0,NONE) && HAS_SWIZZLE(1,Y))) + return V_0280A0_SWAP_STD; /* XY__ */ + else if ((HAS_SWIZZLE(0,Y) && HAS_SWIZZLE(1,X)) || + (HAS_SWIZZLE(0,Y) && HAS_SWIZZLE(1,NONE)) || + (HAS_SWIZZLE(0,NONE) && HAS_SWIZZLE(1,X))) + /* YX__ */ + return (do_endian_swap ? V_0280A0_SWAP_STD : V_0280A0_SWAP_STD_REV); + else if (HAS_SWIZZLE(0,X) && HAS_SWIZZLE(3,Y)) + return V_0280A0_SWAP_ALT; /* X__Y */ + else if (HAS_SWIZZLE(0,Y) && HAS_SWIZZLE(3,X)) + return V_0280A0_SWAP_ALT_REV; /* Y__X */ + break; + case 3: + if (HAS_SWIZZLE(0,X)) + return (do_endian_swap ? V_0280A0_SWAP_STD_REV : V_0280A0_SWAP_STD); + else if (HAS_SWIZZLE(0,Z)) + return V_0280A0_SWAP_STD_REV; /* ZYX */ + break; + case 4: + /* check the middle channels, the 1st and 4th channel can be NONE */ + if (HAS_SWIZZLE(1,Y) && HAS_SWIZZLE(2,Z)) { + return V_0280A0_SWAP_STD; /* XYZW */ + } else if (HAS_SWIZZLE(1,Z) && HAS_SWIZZLE(2,Y)) { + return V_0280A0_SWAP_STD_REV; /* WZYX */ + } else if (HAS_SWIZZLE(1,Y) && HAS_SWIZZLE(2,X)) { + return V_0280A0_SWAP_ALT; /* ZYXW */ + } else if (HAS_SWIZZLE(1,Z) && HAS_SWIZZLE(2,W)) { + /* YZWX */ + if (desc->is_array) + return V_0280A0_SWAP_ALT_REV; + else + return (do_endian_swap ? V_0280A0_SWAP_ALT : V_0280A0_SWAP_ALT_REV); + } + break; + } + return ~0U; +} + +bool radv_format_pack_clear_color(VkFormat format, + uint32_t clear_vals[2], + VkClearColorValue *value) +{ + uint8_t r = 0, g = 0, b = 0, a = 0; + const struct vk_format_description *desc = vk_format_description(format); + + if (vk_format_get_component_bits(format, VK_FORMAT_COLORSPACE_RGB, 0) <= 8) { + if (desc->colorspace == VK_FORMAT_COLORSPACE_RGB) { + r = float_to_ubyte(value->float32[0]); + g = float_to_ubyte(value->float32[1]); + b = float_to_ubyte(value->float32[2]); + a = float_to_ubyte(value->float32[3]); + } else if (desc->colorspace == VK_FORMAT_COLORSPACE_SRGB) { + r = util_format_linear_float_to_srgb_8unorm(value->float32[0]); + g = util_format_linear_float_to_srgb_8unorm(value->float32[1]); + b = util_format_linear_float_to_srgb_8unorm(value->float32[2]); + a = float_to_ubyte(value->float32[3]); + } + } + switch (format) { + case VK_FORMAT_R8_UNORM: + case VK_FORMAT_R8_SRGB: + clear_vals[0] = r; + clear_vals[1] = 0; + break; + case VK_FORMAT_R8G8_UNORM: + case VK_FORMAT_R8G8_SRGB: + clear_vals[0] = r | g << 8; + clear_vals[1] = 0; + break; + case VK_FORMAT_R8G8B8A8_SRGB: + case VK_FORMAT_R8G8B8A8_UNORM: + clear_vals[0] = r | g << 8 | b << 16 | a << 24; + clear_vals[1] = 0; + break; + case VK_FORMAT_B8G8R8A8_SRGB: + case VK_FORMAT_B8G8R8A8_UNORM: + clear_vals[0] = b | g << 8 | r << 16 | a << 24; + clear_vals[1] = 0; + break; + case VK_FORMAT_A8B8G8R8_UNORM_PACK32: + case VK_FORMAT_A8B8G8R8_SRGB_PACK32: + clear_vals[0] = r | g << 8 | b << 16 | a << 24; + clear_vals[1] = 0; + break; + case VK_FORMAT_R8_UINT: + clear_vals[0] = value->uint32[0] & 0xff; + clear_vals[1] = 0; + break; + case VK_FORMAT_R16_UINT: + clear_vals[0] = value->uint32[0] & 0xffff; + clear_vals[1] = 0; + break; + case VK_FORMAT_R8G8_UINT: + clear_vals[0] = value->uint32[0] & 0xff; + clear_vals[0] |= (value->uint32[1] & 0xff) << 8; + clear_vals[1] = 0; + break; + case VK_FORMAT_R8G8B8A8_UINT: + clear_vals[0] = value->uint32[0] & 0xff; + clear_vals[0] |= (value->uint32[1] & 0xff) << 8; + clear_vals[0] |= (value->uint32[2] & 0xff) << 16; + clear_vals[0] |= (value->uint32[3] & 0xff) << 24; + clear_vals[1] = 0; + break; + case VK_FORMAT_A8B8G8R8_UINT_PACK32: + clear_vals[0] = value->uint32[0] & 0xff; + clear_vals[0] |= (value->uint32[1] & 0xff) << 8; + clear_vals[0] |= (value->uint32[2] & 0xff) << 16; + clear_vals[0] |= (value->uint32[3] & 0xff) << 24; + clear_vals[1] = 0; + break; + case VK_FORMAT_R16G16_UINT: + clear_vals[0] = value->uint32[0] & 0xffff; + clear_vals[0] |= (value->uint32[1] & 0xffff) << 16; + clear_vals[1] = 0; + break; + case VK_FORMAT_R16G16B16A16_UINT: + clear_vals[0] = value->uint32[0] & 0xffff; + clear_vals[0] |= (value->uint32[1] & 0xffff) << 16; + clear_vals[1] = value->uint32[2] & 0xffff; + clear_vals[1] |= (value->uint32[3] & 0xffff) << 16; + break; + case VK_FORMAT_R32_UINT: + clear_vals[0] = value->uint32[0]; + clear_vals[1] = 0; + break; + case VK_FORMAT_R32G32_UINT: + clear_vals[0] = value->uint32[0]; + clear_vals[1] = value->uint32[1]; + break; + case VK_FORMAT_R32_SINT: + clear_vals[0] = value->int32[0]; + clear_vals[1] = 0; + break; + case VK_FORMAT_R16_SFLOAT: + clear_vals[0] = util_float_to_half(value->float32[0]); + clear_vals[1] = 0; + break; + case VK_FORMAT_R16G16_SFLOAT: + clear_vals[0] = util_float_to_half(value->float32[0]); + clear_vals[0] |= (uint32_t)util_float_to_half(value->float32[1]) << 16; + clear_vals[1] = 0; + break; + case VK_FORMAT_R16G16B16A16_SFLOAT: + clear_vals[0] = util_float_to_half(value->float32[0]); + clear_vals[0] |= (uint32_t)util_float_to_half(value->float32[1]) << 16; + clear_vals[1] = util_float_to_half(value->float32[2]); + clear_vals[1] |= (uint32_t)util_float_to_half(value->float32[3]) << 16; + break; + case VK_FORMAT_R16_UNORM: + clear_vals[0] = ((uint16_t)util_iround(CLAMP(value->float32[0], 0.0f, 1.0f) * 0xffff)) & 0xffff; + clear_vals[1] = 0; + break; + case VK_FORMAT_R16G16_UNORM: + clear_vals[0] = ((uint16_t)util_iround(CLAMP(value->float32[0], 0.0f, 1.0f) * 0xffff)) & 0xffff; + clear_vals[0] |= ((uint16_t)util_iround(CLAMP(value->float32[1], 0.0f, 1.0f) * 0xffff)) << 16; + clear_vals[1] = 0; + break; + case VK_FORMAT_R16G16B16A16_UNORM: + clear_vals[0] = ((uint16_t)util_iround(CLAMP(value->float32[0], 0.0f, 1.0f) * 0xffff)) & 0xffff; + clear_vals[0] |= ((uint16_t)util_iround(CLAMP(value->float32[1], 0.0f, 1.0f) * 0xffff)) << 16; + clear_vals[1] = ((uint16_t)util_iround(CLAMP(value->float32[2], 0.0f, 1.0f) * 0xffff)) & 0xffff; + clear_vals[1] |= ((uint16_t)util_iround(CLAMP(value->float32[3], 0.0f, 1.0f) * 0xffff)) << 16; + break; + case VK_FORMAT_A2B10G10R10_UNORM_PACK32: + /* TODO */ + return false; + case VK_FORMAT_R32G32_SFLOAT: + clear_vals[0] = fui(value->float32[0]); + clear_vals[1] = fui(value->float32[1]); + break; + case VK_FORMAT_R32_SFLOAT: + clear_vals[1] = 0; + clear_vals[0] = fui(value->float32[0]); + break; + default: + fprintf(stderr, "failed to fast clear %d\n", format); + return false; + } + return true; +} + +void radv_GetPhysicalDeviceFormatProperties( + VkPhysicalDevice physicalDevice, + VkFormat format, + VkFormatProperties* pFormatProperties) +{ + RADV_FROM_HANDLE(radv_physical_device, physical_device, physicalDevice); + + radv_physical_device_get_format_properties(physical_device, + format, + pFormatProperties); +} + +VkResult radv_GetPhysicalDeviceImageFormatProperties( + VkPhysicalDevice physicalDevice, + VkFormat format, + VkImageType type, + VkImageTiling tiling, + VkImageUsageFlags usage, + VkImageCreateFlags createFlags, + VkImageFormatProperties* pImageFormatProperties) +{ + RADV_FROM_HANDLE(radv_physical_device, physical_device, physicalDevice); + VkFormatProperties format_props; + VkFormatFeatureFlags format_feature_flags; + VkExtent3D maxExtent; + uint32_t maxMipLevels; + uint32_t maxArraySize; + VkSampleCountFlags sampleCounts = VK_SAMPLE_COUNT_1_BIT; + + radv_physical_device_get_format_properties(physical_device, format, + &format_props); + if (tiling == VK_IMAGE_TILING_LINEAR) { + format_feature_flags = format_props.linearTilingFeatures; + } else if (tiling == VK_IMAGE_TILING_OPTIMAL) { + format_feature_flags = format_props.optimalTilingFeatures; + } else { + unreachable("bad VkImageTiling"); + } + + if (format_feature_flags == 0) + goto unsupported; + + switch (type) { + default: + unreachable("bad vkimage type\n"); + case VK_IMAGE_TYPE_1D: + maxExtent.width = 16384; + maxExtent.height = 1; + maxExtent.depth = 1; + maxMipLevels = 15; /* log2(maxWidth) + 1 */ + maxArraySize = 2048; + break; + case VK_IMAGE_TYPE_2D: + maxExtent.width = 16384; + maxExtent.height = 16384; + maxExtent.depth = 1; + maxMipLevels = 15; /* log2(maxWidth) + 1 */ + maxArraySize = 2048; + break; + case VK_IMAGE_TYPE_3D: + maxExtent.width = 2048; + maxExtent.height = 2048; + maxExtent.depth = 2048; + maxMipLevels = 12; /* log2(maxWidth) + 1 */ + maxArraySize = 1; + break; + } + + if (tiling == VK_IMAGE_TILING_OPTIMAL && + type == VK_IMAGE_TYPE_2D && + (format_feature_flags & (VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BIT | + VK_FORMAT_FEATURE_DEPTH_STENCIL_ATTACHMENT_BIT)) && + !(createFlags & VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT) && + !(usage & VK_IMAGE_USAGE_STORAGE_BIT)) { + sampleCounts |= VK_SAMPLE_COUNT_2_BIT | VK_SAMPLE_COUNT_4_BIT | VK_SAMPLE_COUNT_8_BIT; + } + + if (usage & VK_IMAGE_USAGE_SAMPLED_BIT) { + if (!(format_feature_flags & VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT)) { + goto unsupported; + } + } + + if (usage & VK_IMAGE_USAGE_STORAGE_BIT) { + if (!(format_feature_flags & VK_FORMAT_FEATURE_STORAGE_IMAGE_BIT)) { + goto unsupported; + } + } + + if (usage & VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT) { + if (!(format_feature_flags & VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BIT)) { + goto unsupported; + } + } + + if (usage & VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT) { + if (!(format_feature_flags & VK_FORMAT_FEATURE_DEPTH_STENCIL_ATTACHMENT_BIT)) { + goto unsupported; + } + } + + *pImageFormatProperties = (VkImageFormatProperties) { + .maxExtent = maxExtent, + .maxMipLevels = maxMipLevels, + .maxArrayLayers = maxArraySize, + .sampleCounts = sampleCounts, + + /* FINISHME: Accurately calculate + * VkImageFormatProperties::maxResourceSize. + */ + .maxResourceSize = UINT32_MAX, + }; + + return VK_SUCCESS; +unsupported: + *pImageFormatProperties = (VkImageFormatProperties) { + .maxExtent = { 0, 0, 0 }, + .maxMipLevels = 0, + .maxArrayLayers = 0, + .sampleCounts = 0, + .maxResourceSize = 0, + }; + + return VK_ERROR_FORMAT_NOT_SUPPORTED; +} + +void radv_GetPhysicalDeviceSparseImageFormatProperties( + VkPhysicalDevice physicalDevice, + VkFormat format, + VkImageType type, + uint32_t samples, + VkImageUsageFlags usage, + VkImageTiling tiling, + uint32_t* pNumProperties, + VkSparseImageFormatProperties* pProperties) +{ + /* Sparse images are not yet supported. */ + *pNumProperties = 0; +} diff -Nru mesa-12.0.6/src/amd/vulkan/radv_image.c mesa-17.0.7/src/amd/vulkan/radv_image.c --- mesa-12.0.6/src/amd/vulkan/radv_image.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_image.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,1048 @@ +/* + * Copyright © 2016 Red Hat. + * Copyright © 2016 Bas Nieuwenhuizen + * + * based in part on anv driver which is: + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "radv_private.h" +#include "vk_format.h" +#include "radv_radeon_winsys.h" +#include "sid.h" +#include "util/debug.h" +static unsigned +radv_choose_tiling(struct radv_device *Device, + const struct radv_image_create_info *create_info) +{ + const VkImageCreateInfo *pCreateInfo = create_info->vk_info; + + if (pCreateInfo->tiling == VK_IMAGE_TILING_LINEAR) { + assert(pCreateInfo->samples <= 1); + return RADEON_SURF_MODE_LINEAR_ALIGNED; + } + + /* MSAA resources must be 2D tiled. */ + if (pCreateInfo->samples > 1) + return RADEON_SURF_MODE_2D; + + return RADEON_SURF_MODE_2D; +} +static int +radv_init_surface(struct radv_device *device, + struct radeon_surf *surface, + const struct radv_image_create_info *create_info) +{ + const VkImageCreateInfo *pCreateInfo = create_info->vk_info; + unsigned array_mode = radv_choose_tiling(device, create_info); + const struct vk_format_description *desc = + vk_format_description(pCreateInfo->format); + bool is_depth, is_stencil, blendable; + + is_depth = vk_format_has_depth(desc); + is_stencil = vk_format_has_stencil(desc); + surface->npix_x = pCreateInfo->extent.width; + surface->npix_y = pCreateInfo->extent.height; + surface->npix_z = pCreateInfo->extent.depth; + + surface->blk_w = vk_format_get_blockwidth(pCreateInfo->format); + surface->blk_h = vk_format_get_blockheight(pCreateInfo->format); + surface->blk_d = 1; + surface->array_size = pCreateInfo->arrayLayers; + surface->last_level = pCreateInfo->mipLevels - 1; + + surface->bpe = vk_format_get_blocksize(pCreateInfo->format); + /* align byte per element on dword */ + if (surface->bpe == 3) { + surface->bpe = 4; + } + surface->nsamples = pCreateInfo->samples ? pCreateInfo->samples : 1; + surface->flags = RADEON_SURF_SET(array_mode, MODE); + + switch (pCreateInfo->imageType){ + case VK_IMAGE_TYPE_1D: + if (pCreateInfo->arrayLayers > 1) + surface->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_1D_ARRAY, TYPE); + else + surface->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_1D, TYPE); + break; + case VK_IMAGE_TYPE_2D: + if (pCreateInfo->arrayLayers > 1) + surface->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_2D_ARRAY, TYPE); + else + surface->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_2D, TYPE); + break; + case VK_IMAGE_TYPE_3D: + surface->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_3D, TYPE); + break; + default: + unreachable("unhandled image type"); + } + + if (is_depth) { + surface->flags |= RADEON_SURF_ZBUFFER; + } + + if (is_stencil) + surface->flags |= RADEON_SURF_SBUFFER | + RADEON_SURF_HAS_SBUFFER_MIPTREE; + + surface->flags |= RADEON_SURF_HAS_TILE_MODE_INDEX; + + if ((pCreateInfo->usage & (VK_IMAGE_USAGE_TRANSFER_SRC_BIT | + VK_IMAGE_USAGE_STORAGE_BIT)) || + (pCreateInfo->flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT) || + (pCreateInfo->tiling == VK_IMAGE_TILING_LINEAR) || + device->physical_device->rad_info.chip_class < VI || + create_info->scanout || (device->debug_flags & RADV_DEBUG_NO_DCC) || + !radv_is_colorbuffer_format_supported(pCreateInfo->format, &blendable)) + surface->flags |= RADEON_SURF_DISABLE_DCC; + if (create_info->scanout) + surface->flags |= RADEON_SURF_SCANOUT; + return 0; +} +#define ATI_VENDOR_ID 0x1002 +static uint32_t si_get_bo_metadata_word1(struct radv_device *device) +{ + return (ATI_VENDOR_ID << 16) | device->physical_device->rad_info.pci_id; +} + +static inline unsigned +si_tile_mode_index(const struct radv_image *image, unsigned level, bool stencil) +{ + if (stencil) + return image->surface.stencil_tiling_index[level]; + else + return image->surface.tiling_index[level]; +} + +static unsigned radv_map_swizzle(unsigned swizzle) +{ + switch (swizzle) { + case VK_SWIZZLE_Y: + return V_008F0C_SQ_SEL_Y; + case VK_SWIZZLE_Z: + return V_008F0C_SQ_SEL_Z; + case VK_SWIZZLE_W: + return V_008F0C_SQ_SEL_W; + case VK_SWIZZLE_0: + return V_008F0C_SQ_SEL_0; + case VK_SWIZZLE_1: + return V_008F0C_SQ_SEL_1; + default: /* VK_SWIZZLE_X */ + return V_008F0C_SQ_SEL_X; + } +} + +static void +radv_make_buffer_descriptor(struct radv_device *device, + struct radv_buffer *buffer, + VkFormat vk_format, + unsigned offset, + unsigned range, + uint32_t *state) +{ + const struct vk_format_description *desc; + unsigned stride; + uint64_t gpu_address = device->ws->buffer_get_va(buffer->bo); + uint64_t va = gpu_address + buffer->offset; + unsigned num_format, data_format; + int first_non_void; + desc = vk_format_description(vk_format); + first_non_void = vk_format_get_first_non_void_channel(vk_format); + stride = desc->block.bits / 8; + + num_format = radv_translate_buffer_numformat(desc, first_non_void); + data_format = radv_translate_buffer_dataformat(desc, first_non_void); + + va += offset; + state[0] = va; + state[1] = S_008F04_BASE_ADDRESS_HI(va >> 32) | + S_008F04_STRIDE(stride); + state[2] = range; + state[3] = S_008F0C_DST_SEL_X(radv_map_swizzle(desc->swizzle[0])) | + S_008F0C_DST_SEL_Y(radv_map_swizzle(desc->swizzle[1])) | + S_008F0C_DST_SEL_Z(radv_map_swizzle(desc->swizzle[2])) | + S_008F0C_DST_SEL_W(radv_map_swizzle(desc->swizzle[3])) | + S_008F0C_NUM_FORMAT(num_format) | + S_008F0C_DATA_FORMAT(data_format); +} + +static void +si_set_mutable_tex_desc_fields(struct radv_device *device, + struct radv_image *image, + const struct radeon_surf_level *base_level_info, + unsigned base_level, unsigned first_level, + unsigned block_width, bool is_stencil, + uint32_t *state) +{ + uint64_t gpu_address = device->ws->buffer_get_va(image->bo) + image->offset; + uint64_t va = gpu_address + base_level_info->offset; + unsigned pitch = base_level_info->nblk_x * block_width; + + state[1] &= C_008F14_BASE_ADDRESS_HI; + state[3] &= C_008F1C_TILING_INDEX; + state[4] &= C_008F20_PITCH; + state[6] &= C_008F28_COMPRESSION_EN; + + assert(!(va & 255)); + + state[0] = va >> 8; + state[1] |= S_008F14_BASE_ADDRESS_HI(va >> 40); + state[3] |= S_008F1C_TILING_INDEX(si_tile_mode_index(image, base_level, + is_stencil)); + state[4] |= S_008F20_PITCH(pitch - 1); + + if (image->surface.dcc_size && image->surface.level[first_level].dcc_enabled) { + state[6] |= S_008F28_COMPRESSION_EN(1); + state[7] = (gpu_address + + image->dcc_offset + + base_level_info->dcc_offset) >> 8; + } +} + +static unsigned radv_tex_dim(VkImageType image_type, VkImageViewType view_type, + unsigned nr_layers, unsigned nr_samples, bool is_storage_image) +{ + if (view_type == VK_IMAGE_VIEW_TYPE_CUBE || view_type == VK_IMAGE_VIEW_TYPE_CUBE_ARRAY) + return is_storage_image ? V_008F1C_SQ_RSRC_IMG_2D_ARRAY : V_008F1C_SQ_RSRC_IMG_CUBE; + switch (image_type) { + case VK_IMAGE_TYPE_1D: + return nr_layers > 1 ? V_008F1C_SQ_RSRC_IMG_1D_ARRAY : V_008F1C_SQ_RSRC_IMG_1D; + case VK_IMAGE_TYPE_2D: + if (nr_samples > 1) + return nr_layers > 1 ? V_008F1C_SQ_RSRC_IMG_2D_MSAA_ARRAY : V_008F1C_SQ_RSRC_IMG_2D_MSAA; + else + return nr_layers > 1 ? V_008F1C_SQ_RSRC_IMG_2D_ARRAY : V_008F1C_SQ_RSRC_IMG_2D; + case VK_IMAGE_TYPE_3D: + if (view_type == VK_IMAGE_VIEW_TYPE_3D) + return V_008F1C_SQ_RSRC_IMG_3D; + else + return V_008F1C_SQ_RSRC_IMG_2D_ARRAY; + default: + unreachable("illegale image type"); + } +} +/** + * Build the sampler view descriptor for a texture. + */ +static void +si_make_texture_descriptor(struct radv_device *device, + struct radv_image *image, + bool sampler, + VkImageViewType view_type, + VkFormat vk_format, + const VkComponentMapping *mapping, + unsigned first_level, unsigned last_level, + unsigned first_layer, unsigned last_layer, + unsigned width, unsigned height, unsigned depth, + uint32_t *state, + uint32_t *fmask_state) +{ + const struct vk_format_description *desc; + enum vk_swizzle swizzle[4]; + int first_non_void; + unsigned num_format, data_format, type; + + desc = vk_format_description(vk_format); + + if (desc->colorspace == VK_FORMAT_COLORSPACE_ZS) { + const unsigned char swizzle_xxxx[4] = {0, 0, 0, 0}; + vk_format_compose_swizzles(mapping, swizzle_xxxx, swizzle); + } else { + vk_format_compose_swizzles(mapping, desc->swizzle, swizzle); + } + + first_non_void = vk_format_get_first_non_void_channel(vk_format); + + num_format = radv_translate_tex_numformat(vk_format, desc, first_non_void); + if (num_format == ~0) { + num_format = 0; + } + + data_format = radv_translate_tex_dataformat(vk_format, desc, first_non_void); + if (data_format == ~0) { + data_format = 0; + } + + type = radv_tex_dim(image->type, view_type, image->array_size, image->samples, + (image->usage & VK_IMAGE_USAGE_STORAGE_BIT)); + if (type == V_008F1C_SQ_RSRC_IMG_1D_ARRAY) { + height = 1; + depth = image->array_size; + } else if (type == V_008F1C_SQ_RSRC_IMG_2D_ARRAY || + type == V_008F1C_SQ_RSRC_IMG_2D_MSAA_ARRAY) { + if (view_type != VK_IMAGE_VIEW_TYPE_3D) + depth = image->array_size; + } else if (type == V_008F1C_SQ_RSRC_IMG_CUBE) + depth = image->array_size / 6; + + state[0] = 0; + state[1] = (S_008F14_DATA_FORMAT(data_format) | + S_008F14_NUM_FORMAT(num_format)); + state[2] = (S_008F18_WIDTH(width - 1) | + S_008F18_HEIGHT(height - 1)); + state[3] = (S_008F1C_DST_SEL_X(radv_map_swizzle(swizzle[0])) | + S_008F1C_DST_SEL_Y(radv_map_swizzle(swizzle[1])) | + S_008F1C_DST_SEL_Z(radv_map_swizzle(swizzle[2])) | + S_008F1C_DST_SEL_W(radv_map_swizzle(swizzle[3])) | + S_008F1C_BASE_LEVEL(image->samples > 1 ? + 0 : first_level) | + S_008F1C_LAST_LEVEL(image->samples > 1 ? + util_logbase2(image->samples) : + last_level) | + S_008F1C_POW2_PAD(image->levels > 1) | + S_008F1C_TYPE(type)); + state[4] = S_008F20_DEPTH(depth - 1); + state[5] = (S_008F24_BASE_ARRAY(first_layer) | + S_008F24_LAST_ARRAY(last_layer)); + state[6] = 0; + state[7] = 0; + + if (image->dcc_offset) { + unsigned swap = radv_translate_colorswap(vk_format, FALSE); + + state[6] = S_008F28_ALPHA_IS_ON_MSB(swap <= 1); + } else { + /* The last dword is unused by hw. The shader uses it to clear + * bits in the first dword of sampler state. + */ + if (device->physical_device->rad_info.chip_class <= CIK && image->samples <= 1) { + if (first_level == last_level) + state[7] = C_008F30_MAX_ANISO_RATIO; + else + state[7] = 0xffffffff; + } + } + + /* Initialize the sampler view for FMASK. */ + if (image->fmask.size) { + uint32_t fmask_format; + uint64_t gpu_address = device->ws->buffer_get_va(image->bo); + uint64_t va; + + va = gpu_address + image->offset + image->fmask.offset; + + switch (image->samples) { + case 2: + fmask_format = V_008F14_IMG_DATA_FORMAT_FMASK8_S2_F2; + break; + case 4: + fmask_format = V_008F14_IMG_DATA_FORMAT_FMASK8_S4_F4; + break; + case 8: + fmask_format = V_008F14_IMG_DATA_FORMAT_FMASK32_S8_F8; + break; + default: + assert(0); + fmask_format = V_008F14_IMG_DATA_FORMAT_INVALID; + } + + fmask_state[0] = va >> 8; + fmask_state[1] = S_008F14_BASE_ADDRESS_HI(va >> 40) | + S_008F14_DATA_FORMAT(fmask_format) | + S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_UINT); + fmask_state[2] = S_008F18_WIDTH(width - 1) | + S_008F18_HEIGHT(height - 1); + fmask_state[3] = S_008F1C_DST_SEL_X(V_008F1C_SQ_SEL_X) | + S_008F1C_DST_SEL_Y(V_008F1C_SQ_SEL_X) | + S_008F1C_DST_SEL_Z(V_008F1C_SQ_SEL_X) | + S_008F1C_DST_SEL_W(V_008F1C_SQ_SEL_X) | + S_008F1C_TILING_INDEX(image->fmask.tile_mode_index) | + S_008F1C_TYPE(radv_tex_dim(image->type, view_type, 1, 0, false)); + fmask_state[4] = S_008F20_DEPTH(depth - 1) | + S_008F20_PITCH(image->fmask.pitch_in_pixels - 1); + fmask_state[5] = S_008F24_BASE_ARRAY(first_layer) | + S_008F24_LAST_ARRAY(last_layer); + fmask_state[6] = 0; + fmask_state[7] = 0; + } +} + +static void +radv_query_opaque_metadata(struct radv_device *device, + struct radv_image *image, + struct radeon_bo_metadata *md) +{ + static const VkComponentMapping fixedmapping; + uint32_t desc[8], i; + + /* Metadata image format format version 1: + * [0] = 1 (metadata format identifier) + * [1] = (VENDOR_ID << 16) | PCI_ID + * [2:9] = image descriptor for the whole resource + * [2] is always 0, because the base address is cleared + * [9] is the DCC offset bits [39:8] from the beginning of + * the buffer + * [10:10+LAST_LEVEL] = mipmap level offset bits [39:8] for each level + */ + md->metadata[0] = 1; /* metadata image format version 1 */ + + /* TILE_MODE_INDEX is ambiguous without a PCI ID. */ + md->metadata[1] = si_get_bo_metadata_word1(device); + + + si_make_texture_descriptor(device, image, true, + (VkImageViewType)image->type, image->vk_format, + &fixedmapping, 0, image->levels - 1, 0, + image->array_size, + image->extent.width, image->extent.height, + image->extent.depth, + desc, NULL); + + si_set_mutable_tex_desc_fields(device, image, &image->surface.level[0], 0, 0, + image->surface.blk_w, false, desc); + + /* Clear the base address and set the relative DCC offset. */ + desc[0] = 0; + desc[1] &= C_008F14_BASE_ADDRESS_HI; + desc[7] = image->dcc_offset >> 8; + + /* Dwords [2:9] contain the image descriptor. */ + memcpy(&md->metadata[2], desc, sizeof(desc)); + + /* Dwords [10:..] contain the mipmap level offsets. */ + for (i = 0; i <= image->levels - 1; i++) + md->metadata[10+i] = image->surface.level[i].offset >> 8; + + md->size_metadata = (11 + image->levels - 1) * 4; +} + +void +radv_init_metadata(struct radv_device *device, + struct radv_image *image, + struct radeon_bo_metadata *metadata) +{ + struct radeon_surf *surface = &image->surface; + + memset(metadata, 0, sizeof(*metadata)); + metadata->microtile = surface->level[0].mode >= RADEON_SURF_MODE_1D ? + RADEON_LAYOUT_TILED : RADEON_LAYOUT_LINEAR; + metadata->macrotile = surface->level[0].mode >= RADEON_SURF_MODE_2D ? + RADEON_LAYOUT_TILED : RADEON_LAYOUT_LINEAR; + metadata->pipe_config = surface->pipe_config; + metadata->bankw = surface->bankw; + metadata->bankh = surface->bankh; + metadata->tile_split = surface->tile_split; + metadata->mtilea = surface->mtilea; + metadata->num_banks = surface->num_banks; + metadata->stride = surface->level[0].pitch_bytes; + metadata->scanout = (surface->flags & RADEON_SURF_SCANOUT) != 0; + + radv_query_opaque_metadata(device, image, metadata); +} + +/* The number of samples can be specified independently of the texture. */ +static void +radv_image_get_fmask_info(struct radv_device *device, + struct radv_image *image, + unsigned nr_samples, + struct radv_fmask_info *out) +{ + /* FMASK is allocated like an ordinary texture. */ + struct radeon_surf fmask = image->surface; + + memset(out, 0, sizeof(*out)); + + fmask.bo_alignment = 0; + fmask.bo_size = 0; + fmask.nsamples = 1; + fmask.flags |= RADEON_SURF_FMASK; + + /* Force 2D tiling if it wasn't set. This may occur when creating + * FMASK for MSAA resolve on R6xx. On R6xx, the single-sample + * destination buffer must have an FMASK too. */ + fmask.flags = RADEON_SURF_CLR(fmask.flags, MODE); + fmask.flags |= RADEON_SURF_SET(RADEON_SURF_MODE_2D, MODE); + + fmask.flags |= RADEON_SURF_HAS_TILE_MODE_INDEX; + + switch (nr_samples) { + case 2: + case 4: + fmask.bpe = 1; + break; + case 8: + fmask.bpe = 4; + break; + default: + return; + } + + device->ws->surface_init(device->ws, &fmask); + assert(fmask.level[0].mode == RADEON_SURF_MODE_2D); + + out->slice_tile_max = (fmask.level[0].nblk_x * fmask.level[0].nblk_y) / 64; + if (out->slice_tile_max) + out->slice_tile_max -= 1; + + out->tile_mode_index = fmask.tiling_index[0]; + out->pitch_in_pixels = fmask.level[0].nblk_x; + out->bank_height = fmask.bankh; + out->alignment = MAX2(256, fmask.bo_alignment); + out->size = fmask.bo_size; +} + +static void +radv_image_alloc_fmask(struct radv_device *device, + struct radv_image *image) +{ + radv_image_get_fmask_info(device, image, image->samples, &image->fmask); + + image->fmask.offset = align64(image->size, image->fmask.alignment); + image->size = image->fmask.offset + image->fmask.size; + image->alignment = MAX2(image->alignment, image->fmask.alignment); +} + +static void +radv_image_get_cmask_info(struct radv_device *device, + struct radv_image *image, + struct radv_cmask_info *out) +{ + unsigned pipe_interleave_bytes = device->physical_device->rad_info.pipe_interleave_bytes; + unsigned num_pipes = device->physical_device->rad_info.num_tile_pipes; + unsigned cl_width, cl_height; + + switch (num_pipes) { + case 2: + cl_width = 32; + cl_height = 16; + break; + case 4: + cl_width = 32; + cl_height = 32; + break; + case 8: + cl_width = 64; + cl_height = 32; + break; + case 16: /* Hawaii */ + cl_width = 64; + cl_height = 64; + break; + default: + assert(0); + return; + } + + unsigned base_align = num_pipes * pipe_interleave_bytes; + + unsigned width = align(image->surface.npix_x, cl_width*8); + unsigned height = align(image->surface.npix_y, cl_height*8); + unsigned slice_elements = (width * height) / (8*8); + + /* Each element of CMASK is a nibble. */ + unsigned slice_bytes = slice_elements / 2; + + out->slice_tile_max = (width * height) / (128*128); + if (out->slice_tile_max) + out->slice_tile_max -= 1; + + out->alignment = MAX2(256, base_align); + out->size = (image->type == VK_IMAGE_TYPE_3D ? image->extent.depth : image->array_size) * + align(slice_bytes, base_align); +} + +static void +radv_image_alloc_cmask(struct radv_device *device, + struct radv_image *image) +{ + radv_image_get_cmask_info(device, image, &image->cmask); + + image->cmask.offset = align64(image->size, image->cmask.alignment); + /* + 8 for storing the clear values */ + image->clear_value_offset = image->cmask.offset + image->cmask.size; + image->size = image->cmask.offset + image->cmask.size + 8; + image->alignment = MAX2(image->alignment, image->cmask.alignment); +} + +static void +radv_image_alloc_dcc(struct radv_device *device, + struct radv_image *image) +{ + image->dcc_offset = align64(image->size, image->surface.dcc_alignment); + /* + 8 for storing the clear values */ + image->clear_value_offset = image->dcc_offset + image->surface.dcc_size; + image->size = image->dcc_offset + image->surface.dcc_size + 8; + image->alignment = MAX2(image->alignment, image->surface.dcc_alignment); +} + +static unsigned +radv_image_get_htile_size(struct radv_device *device, + struct radv_image *image) +{ + unsigned cl_width, cl_height, width, height; + unsigned slice_elements, slice_bytes, base_align; + unsigned num_pipes = device->physical_device->rad_info.num_tile_pipes; + unsigned pipe_interleave_bytes = device->physical_device->rad_info.pipe_interleave_bytes; + + /* Overalign HTILE on P2 configs to work around GPU hangs in + * piglit/depthstencil-render-miplevels 585. + * + * This has been confirmed to help Kabini & Stoney, where the hangs + * are always reproducible. I think I have seen the test hang + * on Carrizo too, though it was very rare there. + */ + if (device->physical_device->rad_info.chip_class >= CIK && num_pipes < 4) + num_pipes = 4; + + switch (num_pipes) { + case 1: + cl_width = 32; + cl_height = 16; + break; + case 2: + cl_width = 32; + cl_height = 32; + break; + case 4: + cl_width = 64; + cl_height = 32; + break; + case 8: + cl_width = 64; + cl_height = 64; + break; + case 16: + cl_width = 128; + cl_height = 64; + break; + default: + assert(0); + return 0; + } + + width = align(image->surface.npix_x, cl_width * 8); + height = align(image->surface.npix_y, cl_height * 8); + + slice_elements = (width * height) / (8 * 8); + slice_bytes = slice_elements * 4; + + base_align = num_pipes * pipe_interleave_bytes; + + image->htile.pitch = width; + image->htile.height = height; + image->htile.xalign = cl_width * 8; + image->htile.yalign = cl_height * 8; + + return image->array_size * + align(slice_bytes, base_align); +} + +static void +radv_image_alloc_htile(struct radv_device *device, + struct radv_image *image) +{ + if (device->debug_flags & RADV_DEBUG_NO_HIZ) + return; + + if (image->array_size > 1 || image->levels > 1) + return; + + image->htile.size = radv_image_get_htile_size(device, image); + + if (!image->htile.size) + return; + + image->htile.offset = align64(image->size, 32768); + + /* + 8 for storing the clear values */ + image->clear_value_offset = image->htile.offset + image->htile.size; + image->size = image->htile.offset + image->htile.size + 8; + image->alignment = align64(image->alignment, 32768); +} + +VkResult +radv_image_create(VkDevice _device, + const struct radv_image_create_info *create_info, + const VkAllocationCallbacks* alloc, + VkImage *pImage) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + const VkImageCreateInfo *pCreateInfo = create_info->vk_info; + struct radv_image *image = NULL; + bool can_cmask_dcc = false; + assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO); + + radv_assert(pCreateInfo->mipLevels > 0); + radv_assert(pCreateInfo->arrayLayers > 0); + radv_assert(pCreateInfo->samples > 0); + radv_assert(pCreateInfo->extent.width > 0); + radv_assert(pCreateInfo->extent.height > 0); + radv_assert(pCreateInfo->extent.depth > 0); + + image = vk_alloc2(&device->alloc, alloc, sizeof(*image), 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (!image) + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + + memset(image, 0, sizeof(*image)); + image->type = pCreateInfo->imageType; + image->extent = pCreateInfo->extent; + image->vk_format = pCreateInfo->format; + image->levels = pCreateInfo->mipLevels; + image->array_size = pCreateInfo->arrayLayers; + image->samples = pCreateInfo->samples; + image->tiling = pCreateInfo->tiling; + image->usage = pCreateInfo->usage; + + image->exclusive = pCreateInfo->sharingMode == VK_SHARING_MODE_EXCLUSIVE; + if (pCreateInfo->sharingMode == VK_SHARING_MODE_CONCURRENT) { + for (uint32_t i = 0; i < pCreateInfo->queueFamilyIndexCount; ++i) + image->queue_family_mask |= 1u << pCreateInfo->pQueueFamilyIndices[i]; + } + + radv_init_surface(device, &image->surface, create_info); + + device->ws->surface_init(device->ws, &image->surface); + + image->size = image->surface.bo_size; + image->alignment = image->surface.bo_alignment; + + if (image->exclusive || image->queue_family_mask == 1) + can_cmask_dcc = true; + + if ((pCreateInfo->usage & VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT) && + image->surface.dcc_size && can_cmask_dcc) + radv_image_alloc_dcc(device, image); + else + image->surface.dcc_size = 0; + + if ((pCreateInfo->usage & VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT) && + pCreateInfo->mipLevels == 1 && + !image->surface.dcc_size && image->extent.depth == 1 && can_cmask_dcc) + radv_image_alloc_cmask(device, image); + if (image->samples > 1 && vk_format_is_color(pCreateInfo->format)) { + radv_image_alloc_fmask(device, image); + } else if (vk_format_is_depth(pCreateInfo->format)) { + + radv_image_alloc_htile(device, image); + } + + + if (create_info->stride && create_info->stride != image->surface.level[0].pitch_bytes) { + image->surface.level[0].nblk_x = create_info->stride / image->surface.bpe; + image->surface.level[0].pitch_bytes = create_info->stride; + image->surface.level[0].slice_size = create_info->stride * image->surface.level[0].nblk_y; + } + *pImage = radv_image_to_handle(image); + + return VK_SUCCESS; +} + +void +radv_image_view_init(struct radv_image_view *iview, + struct radv_device *device, + const VkImageViewCreateInfo* pCreateInfo, + struct radv_cmd_buffer *cmd_buffer, + VkImageUsageFlags usage_mask) +{ + RADV_FROM_HANDLE(radv_image, image, pCreateInfo->image); + const VkImageSubresourceRange *range = &pCreateInfo->subresourceRange; + uint32_t blk_w; + bool is_stencil = false; + switch (image->type) { + case VK_IMAGE_TYPE_1D: + case VK_IMAGE_TYPE_2D: + assert(range->baseArrayLayer + radv_get_layerCount(image, range) - 1 <= image->array_size); + break; + case VK_IMAGE_TYPE_3D: + assert(range->baseArrayLayer + radv_get_layerCount(image, range) - 1 + <= radv_minify(image->extent.depth, range->baseMipLevel)); + break; + default: + unreachable("bad VkImageType"); + } + iview->image = image; + iview->bo = image->bo; + iview->type = pCreateInfo->viewType; + iview->vk_format = pCreateInfo->format; + iview->aspect_mask = pCreateInfo->subresourceRange.aspectMask; + + if (iview->aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT) { + is_stencil = true; + iview->vk_format = vk_format_stencil_only(iview->vk_format); + } else if (iview->aspect_mask == VK_IMAGE_ASPECT_DEPTH_BIT) { + iview->vk_format = vk_format_depth_only(iview->vk_format); + } + + iview->extent = (VkExtent3D) { + .width = radv_minify(image->extent.width , range->baseMipLevel), + .height = radv_minify(image->extent.height, range->baseMipLevel), + .depth = radv_minify(image->extent.depth , range->baseMipLevel), + }; + + iview->extent.width = round_up_u32(iview->extent.width * vk_format_get_blockwidth(iview->vk_format), + vk_format_get_blockwidth(image->vk_format)); + iview->extent.height = round_up_u32(iview->extent.height * vk_format_get_blockheight(iview->vk_format), + vk_format_get_blockheight(image->vk_format)); + + assert(image->surface.blk_w % vk_format_get_blockwidth(image->vk_format) == 0); + blk_w = image->surface.blk_w / vk_format_get_blockwidth(image->vk_format) * vk_format_get_blockwidth(iview->vk_format); + iview->base_layer = range->baseArrayLayer; + iview->layer_count = radv_get_layerCount(image, range); + iview->base_mip = range->baseMipLevel; + + si_make_texture_descriptor(device, image, false, + iview->type, + iview->vk_format, + &pCreateInfo->components, + 0, radv_get_levelCount(image, range) - 1, + range->baseArrayLayer, + range->baseArrayLayer + radv_get_layerCount(image, range) - 1, + iview->extent.width, + iview->extent.height, + iview->extent.depth, + iview->descriptor, + iview->fmask_descriptor); + si_set_mutable_tex_desc_fields(device, image, + is_stencil ? &image->surface.stencil_level[range->baseMipLevel] : &image->surface.level[range->baseMipLevel], range->baseMipLevel, + range->baseMipLevel, + blk_w, is_stencil, iview->descriptor); +} + +void radv_image_set_optimal_micro_tile_mode(struct radv_device *device, + struct radv_image *image, uint32_t micro_tile_mode) +{ + /* These magic numbers were copied from addrlib. It doesn't use any + * definitions for them either. They are all 2D_TILED_THIN1 modes with + * different bpp and micro tile mode. + */ + if (device->physical_device->rad_info.chip_class >= CIK) { + switch (micro_tile_mode) { + case 0: /* displayable */ + image->surface.tiling_index[0] = 10; + break; + case 1: /* thin */ + image->surface.tiling_index[0] = 14; + break; + case 3: /* rotated */ + image->surface.tiling_index[0] = 28; + break; + default: /* depth, thick */ + assert(!"unexpected micro mode"); + return; + } + } else { /* SI */ + switch (micro_tile_mode) { + case 0: /* displayable */ + switch (image->surface.bpe) { + case 1: + image->surface.tiling_index[0] = 10; + break; + case 2: + image->surface.tiling_index[0] = 11; + break; + default: /* 4, 8 */ + image->surface.tiling_index[0] = 12; + break; + } + break; + case 1: /* thin */ + switch (image->surface.bpe) { + case 1: + image->surface.tiling_index[0] = 14; + break; + case 2: + image->surface.tiling_index[0] = 15; + break; + case 4: + image->surface.tiling_index[0] = 16; + break; + default: /* 8, 16 */ + image->surface.tiling_index[0] = 17; + break; + } + break; + default: /* depth, thick */ + assert(!"unexpected micro mode"); + return; + } + } + + image->surface.micro_tile_mode = micro_tile_mode; +} + +bool radv_layout_has_htile(const struct radv_image *image, + VkImageLayout layout) +{ + return (layout == VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL || + layout == VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL); +} + +bool radv_layout_is_htile_compressed(const struct radv_image *image, + VkImageLayout layout) +{ + return layout == VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL; +} + +bool radv_layout_can_expclear(const struct radv_image *image, + VkImageLayout layout) +{ + return (layout == VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL || + layout == VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL); +} + +bool radv_layout_can_fast_clear(const struct radv_image *image, + VkImageLayout layout, + unsigned queue_mask) +{ + return layout == VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL && + queue_mask == (1u << RADV_QUEUE_GENERAL); +} + + +unsigned radv_image_queue_family_mask(const struct radv_image *image, int family) { + if (image->exclusive) + return 1u <queue_family_mask; +} + +VkResult +radv_CreateImage(VkDevice device, + const VkImageCreateInfo *pCreateInfo, + const VkAllocationCallbacks *pAllocator, + VkImage *pImage) +{ + return radv_image_create(device, + &(struct radv_image_create_info) { + .vk_info = pCreateInfo, + .scanout = false, + }, + pAllocator, + pImage); +} + +void +radv_DestroyImage(VkDevice _device, VkImage _image, + const VkAllocationCallbacks *pAllocator) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + + if (!_image) + return; + + vk_free2(&device->alloc, pAllocator, radv_image_from_handle(_image)); +} + +void radv_GetImageSubresourceLayout( + VkDevice device, + VkImage _image, + const VkImageSubresource* pSubresource, + VkSubresourceLayout* pLayout) +{ + RADV_FROM_HANDLE(radv_image, image, _image); + int level = pSubresource->mipLevel; + int layer = pSubresource->arrayLayer; + + pLayout->offset = image->surface.level[level].offset + image->surface.level[level].slice_size * layer; + pLayout->rowPitch = image->surface.level[level].pitch_bytes; + pLayout->arrayPitch = image->surface.level[level].slice_size; + pLayout->depthPitch = image->surface.level[level].slice_size; + pLayout->size = image->surface.level[level].slice_size; + if (image->type == VK_IMAGE_TYPE_3D) + pLayout->size *= image->surface.level[level].nblk_z; +} + + +VkResult +radv_CreateImageView(VkDevice _device, + const VkImageViewCreateInfo *pCreateInfo, + const VkAllocationCallbacks *pAllocator, + VkImageView *pView) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + struct radv_image_view *view; + + view = vk_alloc2(&device->alloc, pAllocator, sizeof(*view), 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (view == NULL) + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + + radv_image_view_init(view, device, pCreateInfo, NULL, ~0); + + *pView = radv_image_view_to_handle(view); + + return VK_SUCCESS; +} + +void +radv_DestroyImageView(VkDevice _device, VkImageView _iview, + const VkAllocationCallbacks *pAllocator) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_image_view, iview, _iview); + + if (!iview) + return; + vk_free2(&device->alloc, pAllocator, iview); +} + +void radv_buffer_view_init(struct radv_buffer_view *view, + struct radv_device *device, + const VkBufferViewCreateInfo* pCreateInfo, + struct radv_cmd_buffer *cmd_buffer) +{ + RADV_FROM_HANDLE(radv_buffer, buffer, pCreateInfo->buffer); + + view->bo = buffer->bo; + view->range = pCreateInfo->range == VK_WHOLE_SIZE ? + buffer->size - pCreateInfo->offset : pCreateInfo->range; + view->vk_format = pCreateInfo->format; + + radv_make_buffer_descriptor(device, buffer, view->vk_format, + pCreateInfo->offset, view->range, view->state); +} + +VkResult +radv_CreateBufferView(VkDevice _device, + const VkBufferViewCreateInfo *pCreateInfo, + const VkAllocationCallbacks *pAllocator, + VkBufferView *pView) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + struct radv_buffer_view *view; + + view = vk_alloc2(&device->alloc, pAllocator, sizeof(*view), 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (!view) + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + + radv_buffer_view_init(view, device, pCreateInfo, NULL); + + *pView = radv_buffer_view_to_handle(view); + + return VK_SUCCESS; +} + +void +radv_DestroyBufferView(VkDevice _device, VkBufferView bufferView, + const VkAllocationCallbacks *pAllocator) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_buffer_view, view, bufferView); + + if (!view) + return; + + vk_free2(&device->alloc, pAllocator, view); +} diff -Nru mesa-12.0.6/src/amd/vulkan/radv_meta_blit2d.c mesa-17.0.7/src/amd/vulkan/radv_meta_blit2d.c --- mesa-12.0.6/src/amd/vulkan/radv_meta_blit2d.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_meta_blit2d.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,1284 @@ +/* + * Copyright © 2016 Red Hat + * + * based on anv driver: + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "radv_meta.h" +#include "nir/nir_builder.h" +#include "vk_format.h" + +enum blit2d_dst_type { + /* We can bind this destination as a "normal" render target and render + * to it just like you would anywhere else. + */ + BLIT2D_DST_TYPE_NORMAL, + + /* The destination has a 3-channel RGB format. Since we can't render to + * non-power-of-two textures, we have to bind it as a red texture and + * select the correct component for the given red pixel in the shader. + */ + BLIT2D_DST_TYPE_RGB, + + BLIT2D_NUM_DST_TYPES, +}; + + +enum blit2d_src_type { + BLIT2D_SRC_TYPE_IMAGE, + BLIT2D_SRC_TYPE_BUFFER, + BLIT2D_NUM_SRC_TYPES, +}; + +static void +create_iview(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_blit2d_surf *surf, + VkImageUsageFlags usage, + struct radv_image_view *iview, VkFormat depth_format) +{ + VkFormat format; + + if (depth_format) + format = depth_format; + else + format = surf->format; + + radv_image_view_init(iview, cmd_buffer->device, + &(VkImageViewCreateInfo) { + .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO, + .image = radv_image_to_handle(surf->image), + .viewType = VK_IMAGE_VIEW_TYPE_2D, + .format = format, + .subresourceRange = { + .aspectMask = surf->aspect_mask, + .baseMipLevel = surf->level, + .levelCount = 1, + .baseArrayLayer = surf->layer, + .layerCount = 1 + }, + }, cmd_buffer, usage); +} + +static void +create_bview(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_blit2d_buffer *src, + struct radv_buffer_view *bview, VkFormat depth_format) +{ + VkFormat format; + + if (depth_format) + format = depth_format; + else + format = src->format; + radv_buffer_view_init(bview, cmd_buffer->device, + &(VkBufferViewCreateInfo) { + .sType = VK_STRUCTURE_TYPE_BUFFER_VIEW_CREATE_INFO, + .flags = 0, + .buffer = radv_buffer_to_handle(src->buffer), + .format = format, + .offset = src->offset, + .range = VK_WHOLE_SIZE, + }, cmd_buffer); + +} + +struct blit2d_src_temps { + struct radv_image_view iview; + + VkDescriptorSet set; + struct radv_buffer_view bview; +}; + +static void +blit2d_bind_src(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_blit2d_surf *src_img, + struct radv_meta_blit2d_buffer *src_buf, + struct blit2d_src_temps *tmp, + enum blit2d_src_type src_type, VkFormat depth_format) +{ + struct radv_device *device = cmd_buffer->device; + VkDevice vk_device = radv_device_to_handle(cmd_buffer->device); + + if (src_type == BLIT2D_SRC_TYPE_BUFFER) { + create_bview(cmd_buffer, src_buf, &tmp->bview, depth_format); + + radv_temp_descriptor_set_create(cmd_buffer->device, cmd_buffer, + device->meta_state.blit2d.ds_layouts[src_type], + &tmp->set); + + radv_UpdateDescriptorSets(vk_device, + 1, /* writeCount */ + (VkWriteDescriptorSet[]) { + { + .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, + .dstSet = tmp->set, + .dstBinding = 0, + .dstArrayElement = 0, + .descriptorCount = 1, + .descriptorType = VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER, + .pTexelBufferView = (VkBufferView[]) { radv_buffer_view_to_handle(&tmp->bview) } + } + }, 0, NULL); + + radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer), + device->meta_state.blit2d.p_layouts[src_type], + VK_SHADER_STAGE_FRAGMENT_BIT, 0, 4, + &src_buf->pitch); + } else { + create_iview(cmd_buffer, src_img, VK_IMAGE_USAGE_SAMPLED_BIT, &tmp->iview, + depth_format); + + radv_temp_descriptor_set_create(cmd_buffer->device, cmd_buffer, + device->meta_state.blit2d.ds_layouts[src_type], + &tmp->set); + + radv_UpdateDescriptorSets(vk_device, + 1, /* writeCount */ + (VkWriteDescriptorSet[]) { + { + .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, + .dstSet = tmp->set, + .dstBinding = 0, + .dstArrayElement = 0, + .descriptorCount = 1, + .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, + .pImageInfo = (VkDescriptorImageInfo[]) { + { + .sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(&tmp->iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + } + } + }, 0, NULL); + + } + + radv_CmdBindDescriptorSets(radv_cmd_buffer_to_handle(cmd_buffer), + VK_PIPELINE_BIND_POINT_GRAPHICS, + device->meta_state.blit2d.p_layouts[src_type], 0, 1, + &tmp->set, 0, NULL); +} + +static void +blit2d_unbind_src(struct radv_cmd_buffer *cmd_buffer, + struct blit2d_src_temps *tmp, + enum blit2d_src_type src_type) +{ + radv_temp_descriptor_set_destroy(cmd_buffer->device, tmp->set); +} + +struct blit2d_dst_temps { + VkImage image; + struct radv_image_view iview; + VkFramebuffer fb; +}; + +static void +blit2d_bind_dst(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_blit2d_surf *dst, + uint32_t width, + uint32_t height, + VkFormat depth_format, + struct blit2d_dst_temps *tmp) +{ + VkImageUsageFlagBits bits; + + if (dst->aspect_mask == VK_IMAGE_ASPECT_COLOR_BIT) + bits = VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT; + else + bits = VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT; + + create_iview(cmd_buffer, dst, bits, + &tmp->iview, depth_format); + + radv_CreateFramebuffer(radv_device_to_handle(cmd_buffer->device), + &(VkFramebufferCreateInfo) { + .sType = VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO, + .attachmentCount = 1, + .pAttachments = (VkImageView[]) { + radv_image_view_to_handle(&tmp->iview), + }, + .width = width, + .height = height, + .layers = 1 + }, &cmd_buffer->pool->alloc, &tmp->fb); +} + +static void +blit2d_unbind_dst(struct radv_cmd_buffer *cmd_buffer, + struct blit2d_dst_temps *tmp) +{ + VkDevice vk_device = radv_device_to_handle(cmd_buffer->device); + radv_DestroyFramebuffer(vk_device, tmp->fb, &cmd_buffer->pool->alloc); +} + +static void +bind_pipeline(struct radv_cmd_buffer *cmd_buffer, + enum blit2d_src_type src_type, unsigned fs_key) +{ + VkPipeline pipeline = + cmd_buffer->device->meta_state.blit2d.pipelines[src_type][fs_key]; + + if (cmd_buffer->state.pipeline != radv_pipeline_from_handle(pipeline)) { + radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), + VK_PIPELINE_BIND_POINT_GRAPHICS, pipeline); + } +} + +static void +bind_depth_pipeline(struct radv_cmd_buffer *cmd_buffer, + enum blit2d_src_type src_type) +{ + VkPipeline pipeline = + cmd_buffer->device->meta_state.blit2d.depth_only_pipeline[src_type]; + + if (cmd_buffer->state.pipeline != radv_pipeline_from_handle(pipeline)) { + radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), + VK_PIPELINE_BIND_POINT_GRAPHICS, pipeline); + } +} + +static void +bind_stencil_pipeline(struct radv_cmd_buffer *cmd_buffer, + enum blit2d_src_type src_type) +{ + VkPipeline pipeline = + cmd_buffer->device->meta_state.blit2d.stencil_only_pipeline[src_type]; + + if (cmd_buffer->state.pipeline != radv_pipeline_from_handle(pipeline)) { + radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), + VK_PIPELINE_BIND_POINT_GRAPHICS, pipeline); + } +} + +static void +radv_meta_blit2d_normal_dst(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_blit2d_surf *src_img, + struct radv_meta_blit2d_buffer *src_buf, + struct radv_meta_blit2d_surf *dst, + unsigned num_rects, + struct radv_meta_blit2d_rect *rects, enum blit2d_src_type src_type) +{ + struct radv_device *device = cmd_buffer->device; + + for (unsigned r = 0; r < num_rects; ++r) { + VkFormat depth_format = 0; + if (dst->aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT) + depth_format = vk_format_stencil_only(dst->image->vk_format); + else if (dst->aspect_mask == VK_IMAGE_ASPECT_DEPTH_BIT) + depth_format = vk_format_depth_only(dst->image->vk_format); + struct blit2d_src_temps src_temps; + blit2d_bind_src(cmd_buffer, src_img, src_buf, &src_temps, src_type, depth_format); + + uint32_t offset = 0; + struct blit2d_dst_temps dst_temps; + blit2d_bind_dst(cmd_buffer, dst, rects[r].dst_x + rects[r].width, + rects[r].dst_y + rects[r].height, depth_format, &dst_temps); + + struct blit_vb_data { + float pos[2]; + float tex_coord[2]; + } vb_data[3]; + + unsigned vb_size = 3 * sizeof(*vb_data); + + vb_data[0] = (struct blit_vb_data) { + .pos = { + rects[r].dst_x, + rects[r].dst_y, + }, + .tex_coord = { + rects[r].src_x, + rects[r].src_y, + }, + }; + + vb_data[1] = (struct blit_vb_data) { + .pos = { + rects[r].dst_x, + rects[r].dst_y + rects[r].height, + }, + .tex_coord = { + rects[r].src_x, + rects[r].src_y + rects[r].height, + }, + }; + + vb_data[2] = (struct blit_vb_data) { + .pos = { + rects[r].dst_x + rects[r].width, + rects[r].dst_y, + }, + .tex_coord = { + rects[r].src_x + rects[r].width, + rects[r].src_y, + }, + }; + + + radv_cmd_buffer_upload_data(cmd_buffer, vb_size, 16, vb_data, &offset); + + struct radv_buffer vertex_buffer = { + .device = device, + .size = vb_size, + .bo = cmd_buffer->upload.upload_bo, + .offset = offset, + }; + + radv_CmdBindVertexBuffers(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1, + (VkBuffer[]) { + radv_buffer_to_handle(&vertex_buffer), + }, + (VkDeviceSize[]) { + 0, + }); + + + if (dst->aspect_mask == VK_IMAGE_ASPECT_COLOR_BIT) { + unsigned fs_key = radv_format_meta_fs_key(dst_temps.iview.vk_format); + + radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer), + &(VkRenderPassBeginInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, + .renderPass = device->meta_state.blit2d.render_passes[fs_key], + .framebuffer = dst_temps.fb, + .renderArea = { + .offset = { rects[r].dst_x, rects[r].dst_y, }, + .extent = { rects[r].width, rects[r].height }, + }, + .clearValueCount = 0, + .pClearValues = NULL, + }, VK_SUBPASS_CONTENTS_INLINE); + + + bind_pipeline(cmd_buffer, src_type, fs_key); + } else if (dst->aspect_mask == VK_IMAGE_ASPECT_DEPTH_BIT) { + radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer), + &(VkRenderPassBeginInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, + .renderPass = device->meta_state.blit2d.depth_only_rp, + .framebuffer = dst_temps.fb, + .renderArea = { + .offset = { rects[r].dst_x, rects[r].dst_y, }, + .extent = { rects[r].width, rects[r].height }, + }, + .clearValueCount = 0, + .pClearValues = NULL, + }, VK_SUBPASS_CONTENTS_INLINE); + + + bind_depth_pipeline(cmd_buffer, src_type); + + } else if (dst->aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT) { + radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer), + &(VkRenderPassBeginInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, + .renderPass = device->meta_state.blit2d.stencil_only_rp, + .framebuffer = dst_temps.fb, + .renderArea = { + .offset = { rects[r].dst_x, rects[r].dst_y, }, + .extent = { rects[r].width, rects[r].height }, + }, + .clearValueCount = 0, + .pClearValues = NULL, + }, VK_SUBPASS_CONTENTS_INLINE); + + + bind_stencil_pipeline(cmd_buffer, src_type); + } + + radv_CmdDraw(radv_cmd_buffer_to_handle(cmd_buffer), 3, 1, 0, 0); + radv_CmdEndRenderPass(radv_cmd_buffer_to_handle(cmd_buffer)); + + /* At the point where we emit the draw call, all data from the + * descriptor sets, etc. has been used. We are free to delete it. + */ + blit2d_unbind_src(cmd_buffer, &src_temps, src_type); + blit2d_unbind_dst(cmd_buffer, &dst_temps); + } +} + +void +radv_meta_blit2d(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_blit2d_surf *src_img, + struct radv_meta_blit2d_buffer *src_buf, + struct radv_meta_blit2d_surf *dst, + unsigned num_rects, + struct radv_meta_blit2d_rect *rects) +{ + enum blit2d_src_type src_type = src_buf ? BLIT2D_SRC_TYPE_BUFFER : + BLIT2D_SRC_TYPE_IMAGE; + radv_meta_blit2d_normal_dst(cmd_buffer, src_img, src_buf, dst, + num_rects, rects, src_type); +} + +static nir_shader * +build_nir_vertex_shader(void) +{ + const struct glsl_type *vec4 = glsl_vec4_type(); + const struct glsl_type *vec2 = glsl_vector_type(GLSL_TYPE_FLOAT, 2); + nir_builder b; + + nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_VERTEX, NULL); + b.shader->info->name = ralloc_strdup(b.shader, "meta_blit_vs"); + + nir_variable *pos_in = nir_variable_create(b.shader, nir_var_shader_in, + vec4, "a_pos"); + pos_in->data.location = VERT_ATTRIB_GENERIC0; + nir_variable *pos_out = nir_variable_create(b.shader, nir_var_shader_out, + vec4, "gl_Position"); + pos_out->data.location = VARYING_SLOT_POS; + nir_copy_var(&b, pos_out, pos_in); + + nir_variable *tex_pos_in = nir_variable_create(b.shader, nir_var_shader_in, + vec2, "a_tex_pos"); + tex_pos_in->data.location = VERT_ATTRIB_GENERIC1; + nir_variable *tex_pos_out = nir_variable_create(b.shader, nir_var_shader_out, + vec2, "v_tex_pos"); + tex_pos_out->data.location = VARYING_SLOT_VAR0; + tex_pos_out->data.interpolation = INTERP_MODE_SMOOTH; + nir_copy_var(&b, tex_pos_out, tex_pos_in); + + return b.shader; +} + +typedef nir_ssa_def* (*texel_fetch_build_func)(struct nir_builder *, + struct radv_device *, + nir_ssa_def *); + +static nir_ssa_def * +build_nir_texel_fetch(struct nir_builder *b, struct radv_device *device, + nir_ssa_def *tex_pos) +{ + const struct glsl_type *sampler_type = + glsl_sampler_type(GLSL_SAMPLER_DIM_2D, false, false, GLSL_TYPE_UINT); + nir_variable *sampler = nir_variable_create(b->shader, nir_var_uniform, + sampler_type, "s_tex"); + sampler->data.descriptor_set = 0; + sampler->data.binding = 0; + + nir_tex_instr *tex = nir_tex_instr_create(b->shader, 2); + tex->sampler_dim = GLSL_SAMPLER_DIM_2D; + tex->op = nir_texop_txf; + tex->src[0].src_type = nir_tex_src_coord; + tex->src[0].src = nir_src_for_ssa(tex_pos); + tex->src[1].src_type = nir_tex_src_lod; + tex->src[1].src = nir_src_for_ssa(nir_imm_int(b, 0)); + tex->dest_type = nir_type_uint; + tex->is_array = false; + tex->coord_components = 2; + tex->texture = nir_deref_var_create(tex, sampler); + tex->sampler = NULL; + + nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex"); + nir_builder_instr_insert(b, &tex->instr); + + return &tex->dest.ssa; +} + + +static nir_ssa_def * +build_nir_buffer_fetch(struct nir_builder *b, struct radv_device *device, + nir_ssa_def *tex_pos) +{ + const struct glsl_type *sampler_type = + glsl_sampler_type(GLSL_SAMPLER_DIM_BUF, false, false, GLSL_TYPE_UINT); + nir_variable *sampler = nir_variable_create(b->shader, nir_var_uniform, + sampler_type, "s_tex"); + sampler->data.descriptor_set = 0; + sampler->data.binding = 0; + + nir_intrinsic_instr *width = nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_push_constant); + width->src[0] = nir_src_for_ssa(nir_imm_int(b, 0)); + width->num_components = 1; + nir_ssa_dest_init(&width->instr, &width->dest, 1, 32, "width"); + nir_builder_instr_insert(b, &width->instr); + + nir_ssa_def *pos_x = nir_channel(b, tex_pos, 0); + nir_ssa_def *pos_y = nir_channel(b, tex_pos, 1); + pos_y = nir_imul(b, pos_y, &width->dest.ssa); + pos_x = nir_iadd(b, pos_x, pos_y); + //pos_x = nir_iadd(b, pos_x, nir_imm_int(b, 100000)); + + nir_tex_instr *tex = nir_tex_instr_create(b->shader, 1); + tex->sampler_dim = GLSL_SAMPLER_DIM_BUF; + tex->op = nir_texop_txf; + tex->src[0].src_type = nir_tex_src_coord; + tex->src[0].src = nir_src_for_ssa(pos_x); + tex->dest_type = nir_type_uint; + tex->is_array = false; + tex->coord_components = 1; + tex->texture = nir_deref_var_create(tex, sampler); + tex->sampler = NULL; + + nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex"); + nir_builder_instr_insert(b, &tex->instr); + + return &tex->dest.ssa; +} + +static const VkPipelineVertexInputStateCreateInfo normal_vi_create_info = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO, + .vertexBindingDescriptionCount = 1, + .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) { + { + .binding = 0, + .stride = 4 * sizeof(float), + .inputRate = VK_VERTEX_INPUT_RATE_VERTEX + }, + }, + .vertexAttributeDescriptionCount = 2, + .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) { + { + /* Position */ + .location = 0, + .binding = 0, + .format = VK_FORMAT_R32G32_SFLOAT, + .offset = 0 + }, + { + /* Texture Coordinate */ + .location = 1, + .binding = 0, + .format = VK_FORMAT_R32G32_SFLOAT, + .offset = 8 + }, + }, +}; + +static nir_shader * +build_nir_copy_fragment_shader(struct radv_device *device, + texel_fetch_build_func txf_func, const char* name) +{ + const struct glsl_type *vec4 = glsl_vec4_type(); + const struct glsl_type *vec2 = glsl_vector_type(GLSL_TYPE_FLOAT, 2); + nir_builder b; + + nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL); + b.shader->info->name = ralloc_strdup(b.shader, name); + + nir_variable *tex_pos_in = nir_variable_create(b.shader, nir_var_shader_in, + vec2, "v_tex_pos"); + tex_pos_in->data.location = VARYING_SLOT_VAR0; + + nir_variable *color_out = nir_variable_create(b.shader, nir_var_shader_out, + vec4, "f_color"); + color_out->data.location = FRAG_RESULT_DATA0; + + nir_ssa_def *pos_int = nir_f2i(&b, nir_load_var(&b, tex_pos_in)); + unsigned swiz[4] = { 0, 1 }; + nir_ssa_def *tex_pos = nir_swizzle(&b, pos_int, swiz, 2, false); + + nir_ssa_def *color = txf_func(&b, device, tex_pos); + nir_store_var(&b, color_out, color, 0xf); + + return b.shader; +} + +static nir_shader * +build_nir_copy_fragment_shader_depth(struct radv_device *device, + texel_fetch_build_func txf_func, const char* name) +{ + const struct glsl_type *vec4 = glsl_vec4_type(); + const struct glsl_type *vec2 = glsl_vector_type(GLSL_TYPE_FLOAT, 2); + nir_builder b; + + nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL); + b.shader->info->name = ralloc_strdup(b.shader, name); + + nir_variable *tex_pos_in = nir_variable_create(b.shader, nir_var_shader_in, + vec2, "v_tex_pos"); + tex_pos_in->data.location = VARYING_SLOT_VAR0; + + nir_variable *color_out = nir_variable_create(b.shader, nir_var_shader_out, + vec4, "f_color"); + color_out->data.location = FRAG_RESULT_DEPTH; + + nir_ssa_def *pos_int = nir_f2i(&b, nir_load_var(&b, tex_pos_in)); + unsigned swiz[4] = { 0, 1 }; + nir_ssa_def *tex_pos = nir_swizzle(&b, pos_int, swiz, 2, false); + + nir_ssa_def *color = txf_func(&b, device, tex_pos); + nir_store_var(&b, color_out, color, 0x1); + + return b.shader; +} + +static nir_shader * +build_nir_copy_fragment_shader_stencil(struct radv_device *device, + texel_fetch_build_func txf_func, const char* name) +{ + const struct glsl_type *vec4 = glsl_vec4_type(); + const struct glsl_type *vec2 = glsl_vector_type(GLSL_TYPE_FLOAT, 2); + nir_builder b; + + nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL); + b.shader->info->name = ralloc_strdup(b.shader, name); + + nir_variable *tex_pos_in = nir_variable_create(b.shader, nir_var_shader_in, + vec2, "v_tex_pos"); + tex_pos_in->data.location = VARYING_SLOT_VAR0; + + nir_variable *color_out = nir_variable_create(b.shader, nir_var_shader_out, + vec4, "f_color"); + color_out->data.location = FRAG_RESULT_STENCIL; + + nir_ssa_def *pos_int = nir_f2i(&b, nir_load_var(&b, tex_pos_in)); + unsigned swiz[4] = { 0, 1 }; + nir_ssa_def *tex_pos = nir_swizzle(&b, pos_int, swiz, 2, false); + + nir_ssa_def *color = txf_func(&b, device, tex_pos); + nir_store_var(&b, color_out, color, 0x1); + + return b.shader; +} + +void +radv_device_finish_meta_blit2d_state(struct radv_device *device) +{ + for(unsigned j = 0; j < NUM_META_FS_KEYS; ++j) { + if (device->meta_state.blit2d.render_passes[j]) { + radv_DestroyRenderPass(radv_device_to_handle(device), + device->meta_state.blit2d.render_passes[j], + &device->meta_state.alloc); + } + } + + radv_DestroyRenderPass(radv_device_to_handle(device), + device->meta_state.blit2d.depth_only_rp, + &device->meta_state.alloc); + radv_DestroyRenderPass(radv_device_to_handle(device), + device->meta_state.blit2d.stencil_only_rp, + &device->meta_state.alloc); + + for (unsigned src = 0; src < BLIT2D_NUM_SRC_TYPES; src++) { + if (device->meta_state.blit2d.p_layouts[src]) { + radv_DestroyPipelineLayout(radv_device_to_handle(device), + device->meta_state.blit2d.p_layouts[src], + &device->meta_state.alloc); + } + + if (device->meta_state.blit2d.ds_layouts[src]) { + radv_DestroyDescriptorSetLayout(radv_device_to_handle(device), + device->meta_state.blit2d.ds_layouts[src], + &device->meta_state.alloc); + } + + for (unsigned j = 0; j < NUM_META_FS_KEYS; ++j) { + if (device->meta_state.blit2d.pipelines[src][j]) { + radv_DestroyPipeline(radv_device_to_handle(device), + device->meta_state.blit2d.pipelines[src][j], + &device->meta_state.alloc); + } + } + + radv_DestroyPipeline(radv_device_to_handle(device), + device->meta_state.blit2d.depth_only_pipeline[src], + &device->meta_state.alloc); + radv_DestroyPipeline(radv_device_to_handle(device), + device->meta_state.blit2d.stencil_only_pipeline[src], + &device->meta_state.alloc); + } +} + +static VkResult +blit2d_init_color_pipeline(struct radv_device *device, + enum blit2d_src_type src_type, + VkFormat format) +{ + VkResult result; + unsigned fs_key = radv_format_meta_fs_key(format); + const char *name; + + texel_fetch_build_func src_func; + switch(src_type) { + case BLIT2D_SRC_TYPE_IMAGE: + src_func = build_nir_texel_fetch; + name = "meta_blit2d_image_fs"; + break; + case BLIT2D_SRC_TYPE_BUFFER: + src_func = build_nir_buffer_fetch; + name = "meta_blit2d_buffer_fs"; + break; + default: + unreachable("unknown blit src type\n"); + break; + } + + const VkPipelineVertexInputStateCreateInfo *vi_create_info; + struct radv_shader_module fs = { .nir = NULL }; + + + fs.nir = build_nir_copy_fragment_shader(device, src_func, name); + vi_create_info = &normal_vi_create_info; + + struct radv_shader_module vs = { + .nir = build_nir_vertex_shader(), + }; + + VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = { + { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_VERTEX_BIT, + .module = radv_shader_module_to_handle(&vs), + .pName = "main", + .pSpecializationInfo = NULL + }, { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_FRAGMENT_BIT, + .module = radv_shader_module_to_handle(&fs), + .pName = "main", + .pSpecializationInfo = NULL + }, + }; + + if (!device->meta_state.blit2d.render_passes[fs_key]) { + result = radv_CreateRenderPass(radv_device_to_handle(device), + &(VkRenderPassCreateInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO, + .attachmentCount = 1, + .pAttachments = &(VkAttachmentDescription) { + .format = format, + .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD, + .storeOp = VK_ATTACHMENT_STORE_OP_STORE, + .initialLayout = VK_IMAGE_LAYOUT_GENERAL, + .finalLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + .subpassCount = 1, + .pSubpasses = &(VkSubpassDescription) { + .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS, + .inputAttachmentCount = 0, + .colorAttachmentCount = 1, + .pColorAttachments = &(VkAttachmentReference) { + .attachment = 0, + .layout = VK_IMAGE_LAYOUT_GENERAL, + }, + .pResolveAttachments = NULL, + .pDepthStencilAttachment = &(VkAttachmentReference) { + .attachment = VK_ATTACHMENT_UNUSED, + .layout = VK_IMAGE_LAYOUT_GENERAL, + }, + .preserveAttachmentCount = 1, + .pPreserveAttachments = (uint32_t[]) { 0 }, + }, + .dependencyCount = 0, + }, &device->meta_state.alloc, &device->meta_state.blit2d.render_passes[fs_key]); + } + + const VkGraphicsPipelineCreateInfo vk_pipeline_info = { + .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO, + .stageCount = ARRAY_SIZE(pipeline_shader_stages), + .pStages = pipeline_shader_stages, + .pVertexInputState = vi_create_info, + .pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO, + .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP, + .primitiveRestartEnable = false, + }, + .pViewportState = &(VkPipelineViewportStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO, + .viewportCount = 0, + .scissorCount = 0, + }, + .pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO, + .rasterizerDiscardEnable = false, + .polygonMode = VK_POLYGON_MODE_FILL, + .cullMode = VK_CULL_MODE_NONE, + .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE + }, + .pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO, + .rasterizationSamples = 1, + .sampleShadingEnable = false, + .pSampleMask = (VkSampleMask[]) { UINT32_MAX }, + }, + .pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO, + .attachmentCount = 1, + .pAttachments = (VkPipelineColorBlendAttachmentState []) { + { .colorWriteMask = + VK_COLOR_COMPONENT_A_BIT | + VK_COLOR_COMPONENT_R_BIT | + VK_COLOR_COMPONENT_G_BIT | + VK_COLOR_COMPONENT_B_BIT }, + } + }, + .pDynamicState = &(VkPipelineDynamicStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO, + .dynamicStateCount = 7, + .pDynamicStates = (VkDynamicState[]) { + VK_DYNAMIC_STATE_LINE_WIDTH, + VK_DYNAMIC_STATE_DEPTH_BIAS, + VK_DYNAMIC_STATE_BLEND_CONSTANTS, + VK_DYNAMIC_STATE_DEPTH_BOUNDS, + VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK, + VK_DYNAMIC_STATE_STENCIL_WRITE_MASK, + VK_DYNAMIC_STATE_STENCIL_REFERENCE, + }, + }, + .flags = 0, + .layout = device->meta_state.blit2d.p_layouts[src_type], + .renderPass = device->meta_state.blit2d.render_passes[fs_key], + .subpass = 0, + }; + + const struct radv_graphics_pipeline_create_info radv_pipeline_info = { + .use_rectlist = true + }; + + result = radv_graphics_pipeline_create(radv_device_to_handle(device), + radv_pipeline_cache_to_handle(&device->meta_state.cache), + &vk_pipeline_info, &radv_pipeline_info, + &device->meta_state.alloc, + &device->meta_state.blit2d.pipelines[src_type][fs_key]); + + + ralloc_free(vs.nir); + ralloc_free(fs.nir); + + return result; +} + +static VkResult +blit2d_init_depth_only_pipeline(struct radv_device *device, + enum blit2d_src_type src_type) +{ + VkResult result; + const char *name; + + texel_fetch_build_func src_func; + switch(src_type) { + case BLIT2D_SRC_TYPE_IMAGE: + src_func = build_nir_texel_fetch; + name = "meta_blit2d_depth_image_fs"; + break; + case BLIT2D_SRC_TYPE_BUFFER: + src_func = build_nir_buffer_fetch; + name = "meta_blit2d_depth_buffer_fs"; + break; + default: + unreachable("unknown blit src type\n"); + break; + } + + const VkPipelineVertexInputStateCreateInfo *vi_create_info; + struct radv_shader_module fs = { .nir = NULL }; + + fs.nir = build_nir_copy_fragment_shader_depth(device, src_func, name); + vi_create_info = &normal_vi_create_info; + + struct radv_shader_module vs = { + .nir = build_nir_vertex_shader(), + }; + + VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = { + { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_VERTEX_BIT, + .module = radv_shader_module_to_handle(&vs), + .pName = "main", + .pSpecializationInfo = NULL + }, { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_FRAGMENT_BIT, + .module = radv_shader_module_to_handle(&fs), + .pName = "main", + .pSpecializationInfo = NULL + }, + }; + + if (!device->meta_state.blit2d.depth_only_rp) { + result = radv_CreateRenderPass(radv_device_to_handle(device), + &(VkRenderPassCreateInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO, + .attachmentCount = 1, + .pAttachments = &(VkAttachmentDescription) { + .format = 0, + .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD, + .storeOp = VK_ATTACHMENT_STORE_OP_STORE, + .initialLayout = VK_IMAGE_LAYOUT_GENERAL, + .finalLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + .subpassCount = 1, + .pSubpasses = &(VkSubpassDescription) { + .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS, + .inputAttachmentCount = 0, + .colorAttachmentCount = 0, + .pColorAttachments = NULL, + .pResolveAttachments = NULL, + .pDepthStencilAttachment = &(VkAttachmentReference) { + .attachment = 0, + .layout = VK_IMAGE_LAYOUT_GENERAL, + }, + .preserveAttachmentCount = 1, + .pPreserveAttachments = (uint32_t[]) { 0 }, + }, + .dependencyCount = 0, + }, &device->meta_state.alloc, &device->meta_state.blit2d.depth_only_rp); + } + + const VkGraphicsPipelineCreateInfo vk_pipeline_info = { + .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO, + .stageCount = ARRAY_SIZE(pipeline_shader_stages), + .pStages = pipeline_shader_stages, + .pVertexInputState = vi_create_info, + .pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO, + .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP, + .primitiveRestartEnable = false, + }, + .pViewportState = &(VkPipelineViewportStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO, + .viewportCount = 0, + .scissorCount = 0, + }, + .pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO, + .rasterizerDiscardEnable = false, + .polygonMode = VK_POLYGON_MODE_FILL, + .cullMode = VK_CULL_MODE_NONE, + .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE + }, + .pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO, + .rasterizationSamples = 1, + .sampleShadingEnable = false, + .pSampleMask = (VkSampleMask[]) { UINT32_MAX }, + }, + .pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO, + .attachmentCount = 0, + .pAttachments = NULL, + }, + .pDepthStencilState = &(VkPipelineDepthStencilStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO, + .depthTestEnable = true, + .depthWriteEnable = true, + .depthCompareOp = VK_COMPARE_OP_ALWAYS, + }, + .pDynamicState = &(VkPipelineDynamicStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO, + .dynamicStateCount = 7, + .pDynamicStates = (VkDynamicState[]) { + VK_DYNAMIC_STATE_LINE_WIDTH, + VK_DYNAMIC_STATE_DEPTH_BIAS, + VK_DYNAMIC_STATE_BLEND_CONSTANTS, + VK_DYNAMIC_STATE_DEPTH_BOUNDS, + VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK, + VK_DYNAMIC_STATE_STENCIL_WRITE_MASK, + VK_DYNAMIC_STATE_STENCIL_REFERENCE, + }, + }, + .flags = 0, + .layout = device->meta_state.blit2d.p_layouts[src_type], + .renderPass = device->meta_state.blit2d.depth_only_rp, + .subpass = 0, + }; + + const struct radv_graphics_pipeline_create_info radv_pipeline_info = { + .use_rectlist = true + }; + + result = radv_graphics_pipeline_create(radv_device_to_handle(device), + radv_pipeline_cache_to_handle(&device->meta_state.cache), + &vk_pipeline_info, &radv_pipeline_info, + &device->meta_state.alloc, + &device->meta_state.blit2d.depth_only_pipeline[src_type]); + + + ralloc_free(vs.nir); + ralloc_free(fs.nir); + + return result; +} + +static VkResult +blit2d_init_stencil_only_pipeline(struct radv_device *device, + enum blit2d_src_type src_type) +{ + VkResult result; + const char *name; + + texel_fetch_build_func src_func; + switch(src_type) { + case BLIT2D_SRC_TYPE_IMAGE: + src_func = build_nir_texel_fetch; + name = "meta_blit2d_stencil_image_fs"; + break; + case BLIT2D_SRC_TYPE_BUFFER: + src_func = build_nir_buffer_fetch; + name = "meta_blit2d_stencil_buffer_fs"; + break; + default: + unreachable("unknown blit src type\n"); + break; + } + + const VkPipelineVertexInputStateCreateInfo *vi_create_info; + struct radv_shader_module fs = { .nir = NULL }; + + fs.nir = build_nir_copy_fragment_shader_stencil(device, src_func, name); + vi_create_info = &normal_vi_create_info; + + struct radv_shader_module vs = { + .nir = build_nir_vertex_shader(), + }; + + VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = { + { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_VERTEX_BIT, + .module = radv_shader_module_to_handle(&vs), + .pName = "main", + .pSpecializationInfo = NULL + }, { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_FRAGMENT_BIT, + .module = radv_shader_module_to_handle(&fs), + .pName = "main", + .pSpecializationInfo = NULL + }, + }; + + if (!device->meta_state.blit2d.stencil_only_rp) { + result = radv_CreateRenderPass(radv_device_to_handle(device), + &(VkRenderPassCreateInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO, + .attachmentCount = 1, + .pAttachments = &(VkAttachmentDescription) { + .format = 0, + .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD, + .storeOp = VK_ATTACHMENT_STORE_OP_STORE, + .initialLayout = VK_IMAGE_LAYOUT_GENERAL, + .finalLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + .subpassCount = 1, + .pSubpasses = &(VkSubpassDescription) { + .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS, + .inputAttachmentCount = 0, + .colorAttachmentCount = 0, + .pColorAttachments = NULL, + .pResolveAttachments = NULL, + .pDepthStencilAttachment = &(VkAttachmentReference) { + .attachment = 0, + .layout = VK_IMAGE_LAYOUT_GENERAL, + }, + .preserveAttachmentCount = 1, + .pPreserveAttachments = (uint32_t[]) { 0 }, + }, + .dependencyCount = 0, + }, &device->meta_state.alloc, &device->meta_state.blit2d.stencil_only_rp); + } + + const VkGraphicsPipelineCreateInfo vk_pipeline_info = { + .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO, + .stageCount = ARRAY_SIZE(pipeline_shader_stages), + .pStages = pipeline_shader_stages, + .pVertexInputState = vi_create_info, + .pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO, + .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP, + .primitiveRestartEnable = false, + }, + .pViewportState = &(VkPipelineViewportStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO, + .viewportCount = 0, + .scissorCount = 0, + }, + .pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO, + .rasterizerDiscardEnable = false, + .polygonMode = VK_POLYGON_MODE_FILL, + .cullMode = VK_CULL_MODE_NONE, + .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE + }, + .pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO, + .rasterizationSamples = 1, + .sampleShadingEnable = false, + .pSampleMask = (VkSampleMask[]) { UINT32_MAX }, + }, + .pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO, + .attachmentCount = 0, + .pAttachments = NULL, + }, + .pDepthStencilState = &(VkPipelineDepthStencilStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO, + .depthTestEnable = false, + .depthWriteEnable = false, + .stencilTestEnable = true, + .front = { + .failOp = VK_STENCIL_OP_REPLACE, + .passOp = VK_STENCIL_OP_REPLACE, + .depthFailOp = VK_STENCIL_OP_REPLACE, + .compareOp = VK_COMPARE_OP_ALWAYS, + .compareMask = 0xff, + .writeMask = 0xff, + .reference = 0 + }, + .back = { + .failOp = VK_STENCIL_OP_REPLACE, + .passOp = VK_STENCIL_OP_REPLACE, + .depthFailOp = VK_STENCIL_OP_REPLACE, + .compareOp = VK_COMPARE_OP_ALWAYS, + .compareMask = 0xff, + .writeMask = 0xff, + .reference = 0 + }, + .depthCompareOp = VK_COMPARE_OP_ALWAYS, + }, + .pDynamicState = &(VkPipelineDynamicStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO, + .dynamicStateCount = 4, + .pDynamicStates = (VkDynamicState[]) { + VK_DYNAMIC_STATE_LINE_WIDTH, + VK_DYNAMIC_STATE_DEPTH_BIAS, + VK_DYNAMIC_STATE_BLEND_CONSTANTS, + VK_DYNAMIC_STATE_DEPTH_BOUNDS, + }, + }, + .flags = 0, + .layout = device->meta_state.blit2d.p_layouts[src_type], + .renderPass = device->meta_state.blit2d.stencil_only_rp, + .subpass = 0, + }; + + const struct radv_graphics_pipeline_create_info radv_pipeline_info = { + .use_rectlist = true + }; + + result = radv_graphics_pipeline_create(radv_device_to_handle(device), + radv_pipeline_cache_to_handle(&device->meta_state.cache), + &vk_pipeline_info, &radv_pipeline_info, + &device->meta_state.alloc, + &device->meta_state.blit2d.stencil_only_pipeline[src_type]); + + + ralloc_free(vs.nir); + ralloc_free(fs.nir); + + return result; +} + +static VkFormat pipeline_formats[] = { + VK_FORMAT_R8G8B8A8_UNORM, + VK_FORMAT_R8G8B8A8_UINT, + VK_FORMAT_R8G8B8A8_SINT, + VK_FORMAT_R16G16B16A16_UNORM, + VK_FORMAT_R16G16B16A16_SNORM, + VK_FORMAT_R16G16B16A16_UINT, + VK_FORMAT_R16G16B16A16_SINT, + VK_FORMAT_R32_SFLOAT, + VK_FORMAT_R32G32_SFLOAT, + VK_FORMAT_R32G32B32A32_SFLOAT +}; + +VkResult +radv_device_init_meta_blit2d_state(struct radv_device *device) +{ + VkResult result; + + zero(device->meta_state.blit2d); + + result = radv_CreateDescriptorSetLayout(radv_device_to_handle(device), + &(VkDescriptorSetLayoutCreateInfo) { + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO, + .bindingCount = 1, + .pBindings = (VkDescriptorSetLayoutBinding[]) { + { + .binding = 0, + .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, + .descriptorCount = 1, + .stageFlags = VK_SHADER_STAGE_FRAGMENT_BIT, + .pImmutableSamplers = NULL + }, + } + }, &device->meta_state.alloc, &device->meta_state.blit2d.ds_layouts[BLIT2D_SRC_TYPE_IMAGE]); + if (result != VK_SUCCESS) + goto fail; + + result = radv_CreatePipelineLayout(radv_device_to_handle(device), + &(VkPipelineLayoutCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO, + .setLayoutCount = 1, + .pSetLayouts = &device->meta_state.blit2d.ds_layouts[BLIT2D_SRC_TYPE_IMAGE], + }, + &device->meta_state.alloc, &device->meta_state.blit2d.p_layouts[BLIT2D_SRC_TYPE_IMAGE]); + if (result != VK_SUCCESS) + goto fail; + + result = radv_CreateDescriptorSetLayout(radv_device_to_handle(device), + &(VkDescriptorSetLayoutCreateInfo) { + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO, + .bindingCount = 1, + .pBindings = (VkDescriptorSetLayoutBinding[]) { + { + .binding = 0, + .descriptorType = VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER, + .descriptorCount = 1, + .stageFlags = VK_SHADER_STAGE_FRAGMENT_BIT, + .pImmutableSamplers = NULL + }, + } + }, &device->meta_state.alloc, &device->meta_state.blit2d.ds_layouts[BLIT2D_SRC_TYPE_BUFFER]); + if (result != VK_SUCCESS) + goto fail; + + const VkPushConstantRange push_constant_range = {VK_SHADER_STAGE_FRAGMENT_BIT, 0, 4}; + result = radv_CreatePipelineLayout(radv_device_to_handle(device), + &(VkPipelineLayoutCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO, + .setLayoutCount = 1, + .pSetLayouts = &device->meta_state.blit2d.ds_layouts[BLIT2D_SRC_TYPE_BUFFER], + .pushConstantRangeCount = 1, + .pPushConstantRanges = &push_constant_range, + }, + &device->meta_state.alloc, &device->meta_state.blit2d.p_layouts[BLIT2D_SRC_TYPE_BUFFER]); + if (result != VK_SUCCESS) + goto fail; + + for (unsigned src = 0; src < BLIT2D_NUM_SRC_TYPES; src++) { + for (unsigned j = 0; j < ARRAY_SIZE(pipeline_formats); ++j) { + result = blit2d_init_color_pipeline(device, src, pipeline_formats[j]); + if (result != VK_SUCCESS) + goto fail; + } + + result = blit2d_init_depth_only_pipeline(device, src); + if (result != VK_SUCCESS) + goto fail; + + result = blit2d_init_stencil_only_pipeline(device, src); + if (result != VK_SUCCESS) + goto fail; + } + + return VK_SUCCESS; + +fail: + radv_device_finish_meta_blit2d_state(device); + return result; +} diff -Nru mesa-12.0.6/src/amd/vulkan/radv_meta_blit.c mesa-17.0.7/src/amd/vulkan/radv_meta_blit.c --- mesa-12.0.6/src/amd/vulkan/radv_meta_blit.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_meta_blit.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,1326 @@ +/* + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "radv_meta.h" +#include "nir/nir_builder.h" + +struct blit_region { + VkOffset3D src_offset; + VkExtent3D src_extent; + VkOffset3D dest_offset; + VkExtent3D dest_extent; +}; + +static nir_shader * +build_nir_vertex_shader(void) +{ + const struct glsl_type *vec4 = glsl_vec4_type(); + nir_builder b; + + nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_VERTEX, NULL); + b.shader->info->name = ralloc_strdup(b.shader, "meta_blit_vs"); + + nir_variable *pos_in = nir_variable_create(b.shader, nir_var_shader_in, + vec4, "a_pos"); + pos_in->data.location = VERT_ATTRIB_GENERIC0; + nir_variable *pos_out = nir_variable_create(b.shader, nir_var_shader_out, + vec4, "gl_Position"); + pos_out->data.location = VARYING_SLOT_POS; + nir_copy_var(&b, pos_out, pos_in); + + nir_variable *tex_pos_in = nir_variable_create(b.shader, nir_var_shader_in, + vec4, "a_tex_pos"); + tex_pos_in->data.location = VERT_ATTRIB_GENERIC1; + nir_variable *tex_pos_out = nir_variable_create(b.shader, nir_var_shader_out, + vec4, "v_tex_pos"); + tex_pos_out->data.location = VARYING_SLOT_VAR0; + tex_pos_out->data.interpolation = INTERP_MODE_SMOOTH; + nir_copy_var(&b, tex_pos_out, tex_pos_in); + + return b.shader; +} + +static nir_shader * +build_nir_copy_fragment_shader(enum glsl_sampler_dim tex_dim) +{ + char shader_name[64]; + const struct glsl_type *vec4 = glsl_vec4_type(); + nir_builder b; + + nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL); + + sprintf(shader_name, "meta_blit_fs.%d", tex_dim); + b.shader->info->name = ralloc_strdup(b.shader, shader_name); + + nir_variable *tex_pos_in = nir_variable_create(b.shader, nir_var_shader_in, + vec4, "v_tex_pos"); + tex_pos_in->data.location = VARYING_SLOT_VAR0; + + /* Swizzle the array index which comes in as Z coordinate into the right + * position. + */ + unsigned swz[] = { 0, (tex_dim == GLSL_SAMPLER_DIM_1D ? 2 : 1), 2 }; + nir_ssa_def *const tex_pos = + nir_swizzle(&b, nir_load_var(&b, tex_pos_in), swz, + (tex_dim == GLSL_SAMPLER_DIM_1D ? 2 : 3), false); + + const struct glsl_type *sampler_type = + glsl_sampler_type(tex_dim, false, tex_dim != GLSL_SAMPLER_DIM_3D, + glsl_get_base_type(vec4)); + nir_variable *sampler = nir_variable_create(b.shader, nir_var_uniform, + sampler_type, "s_tex"); + sampler->data.descriptor_set = 0; + sampler->data.binding = 0; + + nir_tex_instr *tex = nir_tex_instr_create(b.shader, 1); + tex->sampler_dim = tex_dim; + tex->op = nir_texop_tex; + tex->src[0].src_type = nir_tex_src_coord; + tex->src[0].src = nir_src_for_ssa(tex_pos); + tex->dest_type = nir_type_float; /* TODO */ + tex->is_array = glsl_sampler_type_is_array(sampler_type); + tex->coord_components = tex_pos->num_components; + tex->texture = nir_deref_var_create(tex, sampler); + tex->sampler = nir_deref_var_create(tex, sampler); + + nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex"); + nir_builder_instr_insert(&b, &tex->instr); + + nir_variable *color_out = nir_variable_create(b.shader, nir_var_shader_out, + vec4, "f_color"); + color_out->data.location = FRAG_RESULT_DATA0; + nir_store_var(&b, color_out, &tex->dest.ssa, 0xf); + + return b.shader; +} + +static nir_shader * +build_nir_copy_fragment_shader_depth(enum glsl_sampler_dim tex_dim) +{ + char shader_name[64]; + const struct glsl_type *vec4 = glsl_vec4_type(); + nir_builder b; + + nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL); + + sprintf(shader_name, "meta_blit_depth_fs.%d", tex_dim); + b.shader->info->name = ralloc_strdup(b.shader, shader_name); + + nir_variable *tex_pos_in = nir_variable_create(b.shader, nir_var_shader_in, + vec4, "v_tex_pos"); + tex_pos_in->data.location = VARYING_SLOT_VAR0; + + /* Swizzle the array index which comes in as Z coordinate into the right + * position. + */ + unsigned swz[] = { 0, (tex_dim == GLSL_SAMPLER_DIM_1D ? 2 : 1), 2 }; + nir_ssa_def *const tex_pos = + nir_swizzle(&b, nir_load_var(&b, tex_pos_in), swz, + (tex_dim == GLSL_SAMPLER_DIM_1D ? 2 : 3), false); + + const struct glsl_type *sampler_type = + glsl_sampler_type(tex_dim, false, tex_dim != GLSL_SAMPLER_DIM_3D, + glsl_get_base_type(vec4)); + nir_variable *sampler = nir_variable_create(b.shader, nir_var_uniform, + sampler_type, "s_tex"); + sampler->data.descriptor_set = 0; + sampler->data.binding = 0; + + nir_tex_instr *tex = nir_tex_instr_create(b.shader, 1); + tex->sampler_dim = tex_dim; + tex->op = nir_texop_tex; + tex->src[0].src_type = nir_tex_src_coord; + tex->src[0].src = nir_src_for_ssa(tex_pos); + tex->dest_type = nir_type_float; /* TODO */ + tex->is_array = glsl_sampler_type_is_array(sampler_type); + tex->coord_components = tex_pos->num_components; + tex->texture = nir_deref_var_create(tex, sampler); + tex->sampler = nir_deref_var_create(tex, sampler); + + nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex"); + nir_builder_instr_insert(&b, &tex->instr); + + nir_variable *color_out = nir_variable_create(b.shader, nir_var_shader_out, + vec4, "f_color"); + color_out->data.location = FRAG_RESULT_DEPTH; + nir_store_var(&b, color_out, &tex->dest.ssa, 0x1); + + return b.shader; +} + +static nir_shader * +build_nir_copy_fragment_shader_stencil(enum glsl_sampler_dim tex_dim) +{ + char shader_name[64]; + const struct glsl_type *vec4 = glsl_vec4_type(); + nir_builder b; + + nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL); + + sprintf(shader_name, "meta_blit_stencil_fs.%d", tex_dim); + b.shader->info->name = ralloc_strdup(b.shader, shader_name); + + nir_variable *tex_pos_in = nir_variable_create(b.shader, nir_var_shader_in, + vec4, "v_tex_pos"); + tex_pos_in->data.location = VARYING_SLOT_VAR0; + + /* Swizzle the array index which comes in as Z coordinate into the right + * position. + */ + unsigned swz[] = { 0, (tex_dim == GLSL_SAMPLER_DIM_1D ? 2 : 1), 2 }; + nir_ssa_def *const tex_pos = + nir_swizzle(&b, nir_load_var(&b, tex_pos_in), swz, + (tex_dim == GLSL_SAMPLER_DIM_1D ? 2 : 3), false); + + const struct glsl_type *sampler_type = + glsl_sampler_type(tex_dim, false, tex_dim != GLSL_SAMPLER_DIM_3D, + glsl_get_base_type(vec4)); + nir_variable *sampler = nir_variable_create(b.shader, nir_var_uniform, + sampler_type, "s_tex"); + sampler->data.descriptor_set = 0; + sampler->data.binding = 0; + + nir_tex_instr *tex = nir_tex_instr_create(b.shader, 1); + tex->sampler_dim = tex_dim; + tex->op = nir_texop_tex; + tex->src[0].src_type = nir_tex_src_coord; + tex->src[0].src = nir_src_for_ssa(tex_pos); + tex->dest_type = nir_type_float; /* TODO */ + tex->is_array = glsl_sampler_type_is_array(sampler_type); + tex->coord_components = tex_pos->num_components; + tex->texture = nir_deref_var_create(tex, sampler); + tex->sampler = nir_deref_var_create(tex, sampler); + + nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex"); + nir_builder_instr_insert(&b, &tex->instr); + + nir_variable *color_out = nir_variable_create(b.shader, nir_var_shader_out, + vec4, "f_color"); + color_out->data.location = FRAG_RESULT_STENCIL; + nir_store_var(&b, color_out, &tex->dest.ssa, 0x1); + + return b.shader; +} + +static void +meta_emit_blit(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *src_image, + struct radv_image_view *src_iview, + VkOffset3D src_offset_0, + VkOffset3D src_offset_1, + struct radv_image *dest_image, + struct radv_image_view *dest_iview, + VkOffset3D dest_offset_0, + VkOffset3D dest_offset_1, + VkRect2D dest_box, + VkFilter blit_filter) +{ + struct radv_device *device = cmd_buffer->device; + unsigned offset = 0; + struct blit_vb_data { + float pos[2]; + float tex_coord[3]; + } vb_data[3]; + + assert(src_image->samples == dest_image->samples); + unsigned vb_size = 3 * sizeof(*vb_data); + vb_data[0] = (struct blit_vb_data) { + .pos = { + dest_offset_0.x, + dest_offset_0.y, + }, + .tex_coord = { + (float)src_offset_0.x / (float)src_iview->extent.width, + (float)src_offset_0.y / (float)src_iview->extent.height, + (float)src_offset_0.z / (float)src_iview->extent.depth, + }, + }; + + vb_data[1] = (struct blit_vb_data) { + .pos = { + dest_offset_0.x, + dest_offset_1.y, + }, + .tex_coord = { + (float)src_offset_0.x / (float)src_iview->extent.width, + (float)src_offset_1.y / (float)src_iview->extent.height, + (float)src_offset_0.z / (float)src_iview->extent.depth, + }, + }; + + vb_data[2] = (struct blit_vb_data) { + .pos = { + dest_offset_1.x, + dest_offset_0.y, + }, + .tex_coord = { + (float)src_offset_1.x / (float)src_iview->extent.width, + (float)src_offset_0.y / (float)src_iview->extent.height, + (float)src_offset_0.z / (float)src_iview->extent.depth, + }, + }; + radv_cmd_buffer_upload_data(cmd_buffer, vb_size, 16, vb_data, &offset); + + struct radv_buffer vertex_buffer = { + .device = device, + .size = vb_size, + .bo = cmd_buffer->upload.upload_bo, + .offset = offset, + }; + + radv_CmdBindVertexBuffers(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1, + (VkBuffer[]) { + radv_buffer_to_handle(&vertex_buffer) + }, + (VkDeviceSize[]) { + 0, + }); + + VkSampler sampler; + radv_CreateSampler(radv_device_to_handle(device), + &(VkSamplerCreateInfo) { + .sType = VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO, + .magFilter = blit_filter, + .minFilter = blit_filter, + .addressModeU = VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE, + .addressModeV = VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE, + .addressModeW = VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE, + }, &cmd_buffer->pool->alloc, &sampler); + + VkDescriptorSet set; + radv_temp_descriptor_set_create(cmd_buffer->device, cmd_buffer, + device->meta_state.blit.ds_layout, + &set); + + radv_UpdateDescriptorSets(radv_device_to_handle(device), + 1, /* writeCount */ + (VkWriteDescriptorSet[]) { + { + .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, + .dstSet = set, + .dstBinding = 0, + .dstArrayElement = 0, + .descriptorCount = 1, + .descriptorType = VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER, + .pImageInfo = (VkDescriptorImageInfo[]) { + { + .sampler = sampler, + .imageView = radv_image_view_to_handle(src_iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + } + } + }, 0, NULL); + + VkFramebuffer fb; + radv_CreateFramebuffer(radv_device_to_handle(device), + &(VkFramebufferCreateInfo) { + .sType = VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO, + .attachmentCount = 1, + .pAttachments = (VkImageView[]) { + radv_image_view_to_handle(dest_iview), + }, + .width = dest_iview->extent.width, + .height = dest_iview->extent.height, + .layers = 1, + }, &cmd_buffer->pool->alloc, &fb); + VkPipeline pipeline; + switch (src_iview->aspect_mask) { + case VK_IMAGE_ASPECT_COLOR_BIT: { + unsigned fs_key = radv_format_meta_fs_key(dest_image->vk_format); + + radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer), + &(VkRenderPassBeginInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, + .renderPass = device->meta_state.blit.render_pass[fs_key], + .framebuffer = fb, + .renderArea = { + .offset = { dest_box.offset.x, dest_box.offset.y }, + .extent = { dest_box.extent.width, dest_box.extent.height }, + }, + .clearValueCount = 0, + .pClearValues = NULL, + }, VK_SUBPASS_CONTENTS_INLINE); + switch (src_image->type) { + case VK_IMAGE_TYPE_1D: + pipeline = device->meta_state.blit.pipeline_1d_src[fs_key]; + break; + case VK_IMAGE_TYPE_2D: + pipeline = device->meta_state.blit.pipeline_2d_src[fs_key]; + break; + case VK_IMAGE_TYPE_3D: + pipeline = device->meta_state.blit.pipeline_3d_src[fs_key]; + break; + default: + unreachable(!"bad VkImageType"); + } + break; + } + case VK_IMAGE_ASPECT_DEPTH_BIT: + radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer), + &(VkRenderPassBeginInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, + .renderPass = device->meta_state.blit.depth_only_rp, + .framebuffer = fb, + .renderArea = { + .offset = { dest_box.offset.x, dest_box.offset.y }, + .extent = { dest_box.extent.width, dest_box.extent.height }, + }, + .clearValueCount = 0, + .pClearValues = NULL, + }, VK_SUBPASS_CONTENTS_INLINE); + switch (src_image->type) { + case VK_IMAGE_TYPE_1D: + pipeline = device->meta_state.blit.depth_only_1d_pipeline; + break; + case VK_IMAGE_TYPE_2D: + pipeline = device->meta_state.blit.depth_only_2d_pipeline; + break; + case VK_IMAGE_TYPE_3D: + pipeline = device->meta_state.blit.depth_only_3d_pipeline; + break; + default: + unreachable(!"bad VkImageType"); + } + break; + case VK_IMAGE_ASPECT_STENCIL_BIT: + radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer), + &(VkRenderPassBeginInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, + .renderPass = device->meta_state.blit.stencil_only_rp, + .framebuffer = fb, + .renderArea = { + .offset = { dest_box.offset.x, dest_box.offset.y }, + .extent = { dest_box.extent.width, dest_box.extent.height }, + }, + .clearValueCount = 0, + .pClearValues = NULL, + }, VK_SUBPASS_CONTENTS_INLINE); + switch (src_image->type) { + case VK_IMAGE_TYPE_1D: + pipeline = device->meta_state.blit.stencil_only_1d_pipeline; + break; + case VK_IMAGE_TYPE_2D: + pipeline = device->meta_state.blit.stencil_only_2d_pipeline; + break; + case VK_IMAGE_TYPE_3D: + pipeline = device->meta_state.blit.stencil_only_3d_pipeline; + break; + default: + unreachable(!"bad VkImageType"); + } + break; + default: + unreachable(!"bad VkImageType"); + } + + if (cmd_buffer->state.pipeline != radv_pipeline_from_handle(pipeline)) { + radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), + VK_PIPELINE_BIND_POINT_GRAPHICS, pipeline); + } + + radv_CmdBindDescriptorSets(radv_cmd_buffer_to_handle(cmd_buffer), + VK_PIPELINE_BIND_POINT_GRAPHICS, + device->meta_state.blit.pipeline_layout, 0, 1, + &set, 0, NULL); + + radv_CmdDraw(radv_cmd_buffer_to_handle(cmd_buffer), 3, 1, 0, 0); + + radv_CmdEndRenderPass(radv_cmd_buffer_to_handle(cmd_buffer)); + + /* At the point where we emit the draw call, all data from the + * descriptor sets, etc. has been used. We are free to delete it. + */ + /* TODO: above comment is not valid for at least descriptor sets/pools, + * as we may not free them till after execution finishes. Check others. */ + + radv_temp_descriptor_set_destroy(cmd_buffer->device, set); + radv_DestroySampler(radv_device_to_handle(device), sampler, + &cmd_buffer->pool->alloc); + radv_DestroyFramebuffer(radv_device_to_handle(device), fb, + &cmd_buffer->pool->alloc); +} + +static bool +flip_coords(unsigned *src0, unsigned *src1, unsigned *dst0, unsigned *dst1) +{ + bool flip = false; + if (*src0 > *src1) { + unsigned tmp = *src0; + *src0 = *src1; + *src1 = tmp; + flip = !flip; + } + + if (*dst0 > *dst1) { + unsigned tmp = *dst0; + *dst0 = *dst1; + *dst1 = tmp; + flip = !flip; + } + return flip; +} + +void radv_CmdBlitImage( + VkCommandBuffer commandBuffer, + VkImage srcImage, + VkImageLayout srcImageLayout, + VkImage destImage, + VkImageLayout destImageLayout, + uint32_t regionCount, + const VkImageBlit* pRegions, + VkFilter filter) + +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + RADV_FROM_HANDLE(radv_image, src_image, srcImage); + RADV_FROM_HANDLE(radv_image, dest_image, destImage); + struct radv_meta_saved_state saved_state; + + /* From the Vulkan 1.0 spec: + * + * vkCmdBlitImage must not be used for multisampled source or + * destination images. Use vkCmdResolveImage for this purpose. + */ + assert(src_image->samples == 1); + assert(dest_image->samples == 1); + + radv_meta_save_graphics_reset_vport_scissor(&saved_state, cmd_buffer); + + for (unsigned r = 0; r < regionCount; r++) { + const VkImageSubresourceLayers *src_res = &pRegions[r].srcSubresource; + const VkImageSubresourceLayers *dst_res = &pRegions[r].dstSubresource; + struct radv_image_view src_iview; + radv_image_view_init(&src_iview, cmd_buffer->device, + &(VkImageViewCreateInfo) { + .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO, + .image = srcImage, + .viewType = radv_meta_get_view_type(src_image), + .format = src_image->vk_format, + .subresourceRange = { + .aspectMask = src_res->aspectMask, + .baseMipLevel = src_res->mipLevel, + .levelCount = 1, + .baseArrayLayer = src_res->baseArrayLayer, + .layerCount = 1 + }, + }, + cmd_buffer, VK_IMAGE_USAGE_SAMPLED_BIT); + + unsigned dst_start, dst_end; + if (dest_image->type == VK_IMAGE_TYPE_3D) { + assert(dst_res->baseArrayLayer == 0); + dst_start = pRegions[r].dstOffsets[0].z; + dst_end = pRegions[r].dstOffsets[1].z; + } else { + dst_start = dst_res->baseArrayLayer; + dst_end = dst_start + dst_res->layerCount; + } + + unsigned src_start, src_end; + if (src_image->type == VK_IMAGE_TYPE_3D) { + assert(src_res->baseArrayLayer == 0); + src_start = pRegions[r].srcOffsets[0].z; + src_end = pRegions[r].srcOffsets[1].z; + } else { + src_start = src_res->baseArrayLayer; + src_end = src_start + src_res->layerCount; + } + + bool flip_z = flip_coords(&src_start, &src_end, &dst_start, &dst_end); + float src_z_step = (float)(src_end + 1 - src_start) / + (float)(dst_end + 1 - dst_start); + + if (flip_z) { + src_start = src_end; + src_z_step *= -1; + } + + unsigned src_x0 = pRegions[r].srcOffsets[0].x; + unsigned src_x1 = pRegions[r].srcOffsets[1].x; + unsigned dst_x0 = pRegions[r].dstOffsets[0].x; + unsigned dst_x1 = pRegions[r].dstOffsets[1].x; + + unsigned src_y0 = pRegions[r].srcOffsets[0].y; + unsigned src_y1 = pRegions[r].srcOffsets[1].y; + unsigned dst_y0 = pRegions[r].dstOffsets[0].y; + unsigned dst_y1 = pRegions[r].dstOffsets[1].y; + + VkRect2D dest_box; + dest_box.offset.x = MIN2(dst_x0, dst_x1); + dest_box.offset.y = MIN2(dst_y0, dst_y1); + dest_box.extent.width = abs(dst_x1 - dst_x0); + dest_box.extent.height = abs(dst_y1 - dst_y0); + + struct radv_image_view dest_iview; + unsigned usage; + if (dst_res->aspectMask == VK_IMAGE_ASPECT_COLOR_BIT) + usage = VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT; + else + usage = VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT; + + const unsigned num_layers = dst_end - dst_start; + for (unsigned i = 0; i < num_layers; i++) { + const VkOffset3D dest_offset_0 = { + .x = dst_x0, + .y = dst_y0, + .z = dst_start + i , + }; + const VkOffset3D dest_offset_1 = { + .x = dst_x1, + .y = dst_y1, + .z = dst_start + i , + }; + VkOffset3D src_offset_0 = { + .x = src_x0, + .y = src_y0, + .z = src_start + i * src_z_step, + }; + VkOffset3D src_offset_1 = { + .x = src_x1, + .y = src_y1, + .z = src_start + i * src_z_step, + }; + const uint32_t dest_array_slice = + radv_meta_get_iview_layer(dest_image, dst_res, + &dest_offset_0); + + radv_image_view_init(&dest_iview, cmd_buffer->device, + &(VkImageViewCreateInfo) { + .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO, + .image = destImage, + .viewType = radv_meta_get_view_type(dest_image), + .format = dest_image->vk_format, + .subresourceRange = { + .aspectMask = dst_res->aspectMask, + .baseMipLevel = dst_res->mipLevel, + .levelCount = 1, + .baseArrayLayer = dest_array_slice, + .layerCount = 1 + }, + }, + cmd_buffer, usage); + meta_emit_blit(cmd_buffer, + src_image, &src_iview, + src_offset_0, src_offset_1, + dest_image, &dest_iview, + dest_offset_0, dest_offset_1, + dest_box, + filter); + } + } + + radv_meta_restore(&saved_state, cmd_buffer); +} + +void +radv_device_finish_meta_blit_state(struct radv_device *device) +{ + for (unsigned i = 0; i < NUM_META_FS_KEYS; ++i) { + if (device->meta_state.blit.render_pass[i]) + radv_DestroyRenderPass(radv_device_to_handle(device), + device->meta_state.blit.render_pass[i], + &device->meta_state.alloc); + if (device->meta_state.blit.pipeline_1d_src[i]) + radv_DestroyPipeline(radv_device_to_handle(device), + device->meta_state.blit.pipeline_1d_src[i], + &device->meta_state.alloc); + if (device->meta_state.blit.pipeline_2d_src[i]) + radv_DestroyPipeline(radv_device_to_handle(device), + device->meta_state.blit.pipeline_2d_src[i], + &device->meta_state.alloc); + if (device->meta_state.blit.pipeline_3d_src[i]) + radv_DestroyPipeline(radv_device_to_handle(device), + device->meta_state.blit.pipeline_3d_src[i], + &device->meta_state.alloc); + } + + if (device->meta_state.blit.depth_only_rp) + radv_DestroyRenderPass(radv_device_to_handle(device), + device->meta_state.blit.depth_only_rp, + &device->meta_state.alloc); + if (device->meta_state.blit.depth_only_1d_pipeline) + radv_DestroyPipeline(radv_device_to_handle(device), + device->meta_state.blit.depth_only_1d_pipeline, + &device->meta_state.alloc); + if (device->meta_state.blit.depth_only_2d_pipeline) + radv_DestroyPipeline(radv_device_to_handle(device), + device->meta_state.blit.depth_only_2d_pipeline, + &device->meta_state.alloc); + if (device->meta_state.blit.depth_only_3d_pipeline) + radv_DestroyPipeline(radv_device_to_handle(device), + device->meta_state.blit.depth_only_3d_pipeline, + &device->meta_state.alloc); + if (device->meta_state.blit.stencil_only_rp) + radv_DestroyRenderPass(radv_device_to_handle(device), + device->meta_state.blit.stencil_only_rp, + &device->meta_state.alloc); + if (device->meta_state.blit.stencil_only_1d_pipeline) + radv_DestroyPipeline(radv_device_to_handle(device), + device->meta_state.blit.stencil_only_1d_pipeline, + &device->meta_state.alloc); + if (device->meta_state.blit.stencil_only_2d_pipeline) + radv_DestroyPipeline(radv_device_to_handle(device), + device->meta_state.blit.stencil_only_2d_pipeline, + &device->meta_state.alloc); + if (device->meta_state.blit.stencil_only_3d_pipeline) + radv_DestroyPipeline(radv_device_to_handle(device), + device->meta_state.blit.stencil_only_3d_pipeline, + &device->meta_state.alloc); + if (device->meta_state.blit.pipeline_layout) + radv_DestroyPipelineLayout(radv_device_to_handle(device), + device->meta_state.blit.pipeline_layout, + &device->meta_state.alloc); + if (device->meta_state.blit.ds_layout) + radv_DestroyDescriptorSetLayout(radv_device_to_handle(device), + device->meta_state.blit.ds_layout, + &device->meta_state.alloc); +} + +static VkFormat pipeline_formats[] = { + VK_FORMAT_R8G8B8A8_UNORM, + VK_FORMAT_R8G8B8A8_UINT, + VK_FORMAT_R8G8B8A8_SINT, + VK_FORMAT_R16G16B16A16_UNORM, + VK_FORMAT_R16G16B16A16_SNORM, + VK_FORMAT_R16G16B16A16_UINT, + VK_FORMAT_R16G16B16A16_SINT, + VK_FORMAT_R32_SFLOAT, + VK_FORMAT_R32G32_SFLOAT, + VK_FORMAT_R32G32B32A32_SFLOAT +}; + +static VkResult +radv_device_init_meta_blit_color(struct radv_device *device, + struct radv_shader_module *vs) +{ + struct radv_shader_module fs_1d = {0}, fs_2d = {0}, fs_3d = {0}; + VkResult result; + + fs_1d.nir = build_nir_copy_fragment_shader(GLSL_SAMPLER_DIM_1D); + fs_2d.nir = build_nir_copy_fragment_shader(GLSL_SAMPLER_DIM_2D); + fs_3d.nir = build_nir_copy_fragment_shader(GLSL_SAMPLER_DIM_3D); + + for (unsigned i = 0; i < ARRAY_SIZE(pipeline_formats); ++i) { + unsigned key = radv_format_meta_fs_key(pipeline_formats[i]); + result = radv_CreateRenderPass(radv_device_to_handle(device), + &(VkRenderPassCreateInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO, + .attachmentCount = 1, + .pAttachments = &(VkAttachmentDescription) { + .format = pipeline_formats[i], + .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD, + .storeOp = VK_ATTACHMENT_STORE_OP_STORE, + .initialLayout = VK_IMAGE_LAYOUT_GENERAL, + .finalLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + .subpassCount = 1, + .pSubpasses = &(VkSubpassDescription) { + .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS, + .inputAttachmentCount = 0, + .colorAttachmentCount = 1, + .pColorAttachments = &(VkAttachmentReference) { + .attachment = 0, + .layout = VK_IMAGE_LAYOUT_GENERAL, + }, + .pResolveAttachments = NULL, + .pDepthStencilAttachment = &(VkAttachmentReference) { + .attachment = VK_ATTACHMENT_UNUSED, + .layout = VK_IMAGE_LAYOUT_GENERAL, + }, + .preserveAttachmentCount = 1, + .pPreserveAttachments = (uint32_t[]) { 0 }, + }, + .dependencyCount = 0, + }, &device->meta_state.alloc, &device->meta_state.blit.render_pass[key]); + if (result != VK_SUCCESS) + goto fail; + + VkPipelineVertexInputStateCreateInfo vi_create_info = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO, + .vertexBindingDescriptionCount = 1, + .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) { + { + .binding = 0, + .stride = 5 * sizeof(float), + .inputRate = VK_VERTEX_INPUT_RATE_VERTEX + }, + }, + .vertexAttributeDescriptionCount = 2, + .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) { + { + /* Position */ + .location = 0, + .binding = 0, + .format = VK_FORMAT_R32G32_SFLOAT, + .offset = 0 + }, + { + /* Texture Coordinate */ + .location = 1, + .binding = 0, + .format = VK_FORMAT_R32G32B32_SFLOAT, + .offset = 8 + } + } + }; + + VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = { + { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_VERTEX_BIT, + .module = radv_shader_module_to_handle(vs), + .pName = "main", + .pSpecializationInfo = NULL + }, { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_FRAGMENT_BIT, + .module = VK_NULL_HANDLE, /* TEMPLATE VALUE! FILL ME IN! */ + .pName = "main", + .pSpecializationInfo = NULL + }, + }; + + const VkGraphicsPipelineCreateInfo vk_pipeline_info = { + .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO, + .stageCount = ARRAY_SIZE(pipeline_shader_stages), + .pStages = pipeline_shader_stages, + .pVertexInputState = &vi_create_info, + .pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO, + .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP, + .primitiveRestartEnable = false, + }, + .pViewportState = &(VkPipelineViewportStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO, + .viewportCount = 0, + .scissorCount = 0, + }, + .pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO, + .rasterizerDiscardEnable = false, + .polygonMode = VK_POLYGON_MODE_FILL, + .cullMode = VK_CULL_MODE_NONE, + .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE + }, + .pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO, + .rasterizationSamples = 1, + .sampleShadingEnable = false, + .pSampleMask = (VkSampleMask[]) { UINT32_MAX }, + }, + .pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO, + .attachmentCount = 1, + .pAttachments = (VkPipelineColorBlendAttachmentState []) { + { .colorWriteMask = + VK_COLOR_COMPONENT_A_BIT | + VK_COLOR_COMPONENT_R_BIT | + VK_COLOR_COMPONENT_G_BIT | + VK_COLOR_COMPONENT_B_BIT }, + } + }, + .pDynamicState = &(VkPipelineDynamicStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO, + .dynamicStateCount = 2, + .pDynamicStates = (VkDynamicState[]) { + VK_DYNAMIC_STATE_LINE_WIDTH, + VK_DYNAMIC_STATE_BLEND_CONSTANTS, + }, + }, + .flags = 0, + .layout = device->meta_state.blit.pipeline_layout, + .renderPass = device->meta_state.blit.render_pass[key], + .subpass = 0, + }; + + const struct radv_graphics_pipeline_create_info radv_pipeline_info = { + .use_rectlist = true + }; + + pipeline_shader_stages[1].module = radv_shader_module_to_handle(&fs_1d); + result = radv_graphics_pipeline_create(radv_device_to_handle(device), + radv_pipeline_cache_to_handle(&device->meta_state.cache), + &vk_pipeline_info, &radv_pipeline_info, + &device->meta_state.alloc, &device->meta_state.blit.pipeline_1d_src[key]); + if (result != VK_SUCCESS) + goto fail; + + pipeline_shader_stages[1].module = radv_shader_module_to_handle(&fs_2d); + result = radv_graphics_pipeline_create(radv_device_to_handle(device), + radv_pipeline_cache_to_handle(&device->meta_state.cache), + &vk_pipeline_info, &radv_pipeline_info, + &device->meta_state.alloc, &device->meta_state.blit.pipeline_2d_src[key]); + if (result != VK_SUCCESS) + goto fail; + + pipeline_shader_stages[1].module = radv_shader_module_to_handle(&fs_3d); + result = radv_graphics_pipeline_create(radv_device_to_handle(device), + radv_pipeline_cache_to_handle(&device->meta_state.cache), + &vk_pipeline_info, &radv_pipeline_info, + &device->meta_state.alloc, &device->meta_state.blit.pipeline_3d_src[key]); + if (result != VK_SUCCESS) + goto fail; + + } + + result = VK_SUCCESS; +fail: + ralloc_free(fs_1d.nir); + ralloc_free(fs_2d.nir); + ralloc_free(fs_3d.nir); + return result; +} + +static VkResult +radv_device_init_meta_blit_depth(struct radv_device *device, + struct radv_shader_module *vs) +{ + struct radv_shader_module fs_1d = {0}, fs_2d = {0}, fs_3d = {0}; + VkResult result; + + fs_1d.nir = build_nir_copy_fragment_shader_depth(GLSL_SAMPLER_DIM_1D); + fs_2d.nir = build_nir_copy_fragment_shader_depth(GLSL_SAMPLER_DIM_2D); + fs_3d.nir = build_nir_copy_fragment_shader_depth(GLSL_SAMPLER_DIM_3D); + + result = radv_CreateRenderPass(radv_device_to_handle(device), + &(VkRenderPassCreateInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO, + .attachmentCount = 1, + .pAttachments = &(VkAttachmentDescription) { + .format = 0, + .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD, + .storeOp = VK_ATTACHMENT_STORE_OP_STORE, + .initialLayout = VK_IMAGE_LAYOUT_GENERAL, + .finalLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + .subpassCount = 1, + .pSubpasses = &(VkSubpassDescription) { + .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS, + .inputAttachmentCount = 0, + .colorAttachmentCount = 0, + .pColorAttachments = NULL, + .pResolveAttachments = NULL, + .pDepthStencilAttachment = &(VkAttachmentReference) { + .attachment = 0, + .layout = VK_IMAGE_LAYOUT_GENERAL, + }, + .preserveAttachmentCount = 1, + .pPreserveAttachments = (uint32_t[]) { 0 }, + }, + .dependencyCount = 0, + }, &device->meta_state.alloc, &device->meta_state.blit.depth_only_rp); + if (result != VK_SUCCESS) + goto fail; + + VkPipelineVertexInputStateCreateInfo vi_create_info = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO, + .vertexBindingDescriptionCount = 1, + .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) { + { + .binding = 0, + .stride = 5 * sizeof(float), + .inputRate = VK_VERTEX_INPUT_RATE_VERTEX + }, + }, + .vertexAttributeDescriptionCount = 2, + .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) { + { + /* Position */ + .location = 0, + .binding = 0, + .format = VK_FORMAT_R32G32_SFLOAT, + .offset = 0 + }, + { + /* Texture Coordinate */ + .location = 1, + .binding = 0, + .format = VK_FORMAT_R32G32B32_SFLOAT, + .offset = 8 + } + } + }; + + VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = { + { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_VERTEX_BIT, + .module = radv_shader_module_to_handle(vs), + .pName = "main", + .pSpecializationInfo = NULL + }, { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_FRAGMENT_BIT, + .module = VK_NULL_HANDLE, /* TEMPLATE VALUE! FILL ME IN! */ + .pName = "main", + .pSpecializationInfo = NULL + }, + }; + + const VkGraphicsPipelineCreateInfo vk_pipeline_info = { + .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO, + .stageCount = ARRAY_SIZE(pipeline_shader_stages), + .pStages = pipeline_shader_stages, + .pVertexInputState = &vi_create_info, + .pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO, + .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP, + .primitiveRestartEnable = false, + }, + .pViewportState = &(VkPipelineViewportStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO, + .viewportCount = 0, + .scissorCount = 0, + }, + .pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO, + .rasterizerDiscardEnable = false, + .polygonMode = VK_POLYGON_MODE_FILL, + .cullMode = VK_CULL_MODE_NONE, + .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE + }, + .pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO, + .rasterizationSamples = 1, + .sampleShadingEnable = false, + .pSampleMask = (VkSampleMask[]) { UINT32_MAX }, + }, + .pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO, + .attachmentCount = 0, + .pAttachments = NULL, + }, + .pDepthStencilState = &(VkPipelineDepthStencilStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO, + .depthTestEnable = true, + .depthWriteEnable = true, + .depthCompareOp = VK_COMPARE_OP_ALWAYS, + }, + .pDynamicState = &(VkPipelineDynamicStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO, + .dynamicStateCount = 7, + .pDynamicStates = (VkDynamicState[]) { + VK_DYNAMIC_STATE_LINE_WIDTH, + VK_DYNAMIC_STATE_DEPTH_BIAS, + VK_DYNAMIC_STATE_BLEND_CONSTANTS, + VK_DYNAMIC_STATE_DEPTH_BOUNDS, + VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK, + VK_DYNAMIC_STATE_STENCIL_WRITE_MASK, + VK_DYNAMIC_STATE_STENCIL_REFERENCE, + }, + }, + .flags = 0, + .layout = device->meta_state.blit.pipeline_layout, + .renderPass = device->meta_state.blit.depth_only_rp, + .subpass = 0, + }; + + const struct radv_graphics_pipeline_create_info radv_pipeline_info = { + .use_rectlist = true + }; + + pipeline_shader_stages[1].module = radv_shader_module_to_handle(&fs_1d); + result = radv_graphics_pipeline_create(radv_device_to_handle(device), + radv_pipeline_cache_to_handle(&device->meta_state.cache), + &vk_pipeline_info, &radv_pipeline_info, + &device->meta_state.alloc, &device->meta_state.blit.depth_only_1d_pipeline); + if (result != VK_SUCCESS) + goto fail; + + pipeline_shader_stages[1].module = radv_shader_module_to_handle(&fs_2d); + result = radv_graphics_pipeline_create(radv_device_to_handle(device), + radv_pipeline_cache_to_handle(&device->meta_state.cache), + &vk_pipeline_info, &radv_pipeline_info, + &device->meta_state.alloc, &device->meta_state.blit.depth_only_2d_pipeline); + if (result != VK_SUCCESS) + goto fail; + + pipeline_shader_stages[1].module = radv_shader_module_to_handle(&fs_3d); + result = radv_graphics_pipeline_create(radv_device_to_handle(device), + radv_pipeline_cache_to_handle(&device->meta_state.cache), + &vk_pipeline_info, &radv_pipeline_info, + &device->meta_state.alloc, &device->meta_state.blit.depth_only_3d_pipeline); + if (result != VK_SUCCESS) + goto fail; + +fail: + ralloc_free(fs_1d.nir); + ralloc_free(fs_2d.nir); + ralloc_free(fs_3d.nir); + return result; +} + +static VkResult +radv_device_init_meta_blit_stencil(struct radv_device *device, + struct radv_shader_module *vs) +{ + struct radv_shader_module fs_1d = {0}, fs_2d = {0}, fs_3d = {0}; + VkResult result; + + fs_1d.nir = build_nir_copy_fragment_shader_stencil(GLSL_SAMPLER_DIM_1D); + fs_2d.nir = build_nir_copy_fragment_shader_stencil(GLSL_SAMPLER_DIM_2D); + fs_3d.nir = build_nir_copy_fragment_shader_stencil(GLSL_SAMPLER_DIM_3D); + + result = radv_CreateRenderPass(radv_device_to_handle(device), + &(VkRenderPassCreateInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO, + .attachmentCount = 1, + .pAttachments = &(VkAttachmentDescription) { + .format = 0, + .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD, + .storeOp = VK_ATTACHMENT_STORE_OP_STORE, + .initialLayout = VK_IMAGE_LAYOUT_GENERAL, + .finalLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + .subpassCount = 1, + .pSubpasses = &(VkSubpassDescription) { + .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS, + .inputAttachmentCount = 0, + .colorAttachmentCount = 0, + .pColorAttachments = NULL, + .pResolveAttachments = NULL, + .pDepthStencilAttachment = &(VkAttachmentReference) { + .attachment = 0, + .layout = VK_IMAGE_LAYOUT_GENERAL, + }, + .preserveAttachmentCount = 1, + .pPreserveAttachments = (uint32_t[]) { 0 }, + }, + .dependencyCount = 0, + }, &device->meta_state.alloc, &device->meta_state.blit.stencil_only_rp); + if (result != VK_SUCCESS) + goto fail; + + VkPipelineVertexInputStateCreateInfo vi_create_info = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO, + .vertexBindingDescriptionCount = 1, + .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) { + { + .binding = 0, + .stride = 5 * sizeof(float), + .inputRate = VK_VERTEX_INPUT_RATE_VERTEX + }, + }, + .vertexAttributeDescriptionCount = 2, + .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) { + { + /* Position */ + .location = 0, + .binding = 0, + .format = VK_FORMAT_R32G32_SFLOAT, + .offset = 0 + }, + { + /* Texture Coordinate */ + .location = 1, + .binding = 0, + .format = VK_FORMAT_R32G32B32_SFLOAT, + .offset = 8 + } + } + }; + + VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = { + { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_VERTEX_BIT, + .module = radv_shader_module_to_handle(vs), + .pName = "main", + .pSpecializationInfo = NULL + }, { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_FRAGMENT_BIT, + .module = VK_NULL_HANDLE, /* TEMPLATE VALUE! FILL ME IN! */ + .pName = "main", + .pSpecializationInfo = NULL + }, + }; + + const VkGraphicsPipelineCreateInfo vk_pipeline_info = { + .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO, + .stageCount = ARRAY_SIZE(pipeline_shader_stages), + .pStages = pipeline_shader_stages, + .pVertexInputState = &vi_create_info, + .pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO, + .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP, + .primitiveRestartEnable = false, + }, + .pViewportState = &(VkPipelineViewportStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO, + .viewportCount = 0, + .scissorCount = 0, + }, + .pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO, + .rasterizerDiscardEnable = false, + .polygonMode = VK_POLYGON_MODE_FILL, + .cullMode = VK_CULL_MODE_NONE, + .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE + }, + .pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO, + .rasterizationSamples = 1, + .sampleShadingEnable = false, + .pSampleMask = (VkSampleMask[]) { UINT32_MAX }, + }, + .pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO, + .attachmentCount = 0, + .pAttachments = NULL, + }, + .pDepthStencilState = &(VkPipelineDepthStencilStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO, + .depthTestEnable = false, + .depthWriteEnable = false, + .stencilTestEnable = true, + .front = { + .failOp = VK_STENCIL_OP_REPLACE, + .passOp = VK_STENCIL_OP_REPLACE, + .depthFailOp = VK_STENCIL_OP_REPLACE, + .compareOp = VK_COMPARE_OP_ALWAYS, + .compareMask = 0xff, + .writeMask = 0xff, + .reference = 0 + }, + .back = { + .failOp = VK_STENCIL_OP_REPLACE, + .passOp = VK_STENCIL_OP_REPLACE, + .depthFailOp = VK_STENCIL_OP_REPLACE, + .compareOp = VK_COMPARE_OP_ALWAYS, + .compareMask = 0xff, + .writeMask = 0xff, + .reference = 0 + }, + .depthCompareOp = VK_COMPARE_OP_ALWAYS, + }, + + .pDynamicState = &(VkPipelineDynamicStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO, + .dynamicStateCount = 4, + .pDynamicStates = (VkDynamicState[]) { + VK_DYNAMIC_STATE_LINE_WIDTH, + VK_DYNAMIC_STATE_DEPTH_BIAS, + VK_DYNAMIC_STATE_BLEND_CONSTANTS, + VK_DYNAMIC_STATE_DEPTH_BOUNDS, + }, + }, + .flags = 0, + .layout = device->meta_state.blit.pipeline_layout, + .renderPass = device->meta_state.blit.stencil_only_rp, + .subpass = 0, + }; + + const struct radv_graphics_pipeline_create_info radv_pipeline_info = { + .use_rectlist = true + }; + + pipeline_shader_stages[1].module = radv_shader_module_to_handle(&fs_1d); + result = radv_graphics_pipeline_create(radv_device_to_handle(device), + radv_pipeline_cache_to_handle(&device->meta_state.cache), + &vk_pipeline_info, &radv_pipeline_info, + &device->meta_state.alloc, &device->meta_state.blit.stencil_only_1d_pipeline); + if (result != VK_SUCCESS) + goto fail; + + pipeline_shader_stages[1].module = radv_shader_module_to_handle(&fs_2d); + result = radv_graphics_pipeline_create(radv_device_to_handle(device), + radv_pipeline_cache_to_handle(&device->meta_state.cache), + &vk_pipeline_info, &radv_pipeline_info, + &device->meta_state.alloc, &device->meta_state.blit.stencil_only_2d_pipeline); + if (result != VK_SUCCESS) + goto fail; + + pipeline_shader_stages[1].module = radv_shader_module_to_handle(&fs_3d); + result = radv_graphics_pipeline_create(radv_device_to_handle(device), + radv_pipeline_cache_to_handle(&device->meta_state.cache), + &vk_pipeline_info, &radv_pipeline_info, + &device->meta_state.alloc, &device->meta_state.blit.stencil_only_3d_pipeline); + if (result != VK_SUCCESS) + goto fail; + +fail: + ralloc_free(fs_1d.nir); + ralloc_free(fs_2d.nir); + ralloc_free(fs_3d.nir); + return result; +} + +VkResult +radv_device_init_meta_blit_state(struct radv_device *device) +{ + VkResult result; + struct radv_shader_module vs = {0}; + zero(device->meta_state.blit); + + VkDescriptorSetLayoutCreateInfo ds_layout_info = { + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO, + .bindingCount = 1, + .pBindings = (VkDescriptorSetLayoutBinding[]) { + { + .binding = 0, + .descriptorType = VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER, + .descriptorCount = 1, + .stageFlags = VK_SHADER_STAGE_FRAGMENT_BIT, + .pImmutableSamplers = NULL + }, + } + }; + result = radv_CreateDescriptorSetLayout(radv_device_to_handle(device), + &ds_layout_info, + &device->meta_state.alloc, + &device->meta_state.blit.ds_layout); + if (result != VK_SUCCESS) + goto fail; + + result = radv_CreatePipelineLayout(radv_device_to_handle(device), + &(VkPipelineLayoutCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO, + .setLayoutCount = 1, + .pSetLayouts = &device->meta_state.blit.ds_layout, + }, + &device->meta_state.alloc, &device->meta_state.blit.pipeline_layout); + if (result != VK_SUCCESS) + goto fail; + + vs.nir = build_nir_vertex_shader(); + + result = radv_device_init_meta_blit_color(device, &vs); + if (result != VK_SUCCESS) + goto fail; + + result = radv_device_init_meta_blit_depth(device, &vs); + if (result != VK_SUCCESS) + goto fail; + + result = radv_device_init_meta_blit_stencil(device, &vs); + if (result != VK_SUCCESS) + goto fail; + return VK_SUCCESS; + +fail: + ralloc_free(vs.nir); + radv_device_finish_meta_blit_state(device); + return result; +} diff -Nru mesa-12.0.6/src/amd/vulkan/radv_meta_buffer.c mesa-17.0.7/src/amd/vulkan/radv_meta_buffer.c --- mesa-12.0.6/src/amd/vulkan/radv_meta_buffer.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_meta_buffer.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,547 @@ +#include "radv_meta.h" +#include "nir/nir_builder.h" + +#include "sid.h" +#include "radv_cs.h" + +static nir_shader * +build_buffer_fill_shader(struct radv_device *dev) +{ + nir_builder b; + + nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_COMPUTE, NULL); + b.shader->info->name = ralloc_strdup(b.shader, "meta_buffer_fill"); + b.shader->info->cs.local_size[0] = 64; + b.shader->info->cs.local_size[1] = 1; + b.shader->info->cs.local_size[2] = 1; + + nir_ssa_def *invoc_id = nir_load_system_value(&b, nir_intrinsic_load_local_invocation_id, 0); + nir_ssa_def *wg_id = nir_load_system_value(&b, nir_intrinsic_load_work_group_id, 0); + nir_ssa_def *block_size = nir_imm_ivec4(&b, + b.shader->info->cs.local_size[0], + b.shader->info->cs.local_size[1], + b.shader->info->cs.local_size[2], 0); + + nir_ssa_def *global_id = nir_iadd(&b, nir_imul(&b, wg_id, block_size), invoc_id); + + nir_ssa_def *offset = nir_imul(&b, global_id, nir_imm_int(&b, 16)); + offset = nir_swizzle(&b, offset, (unsigned[]) {0, 0, 0, 0}, 1, false); + + nir_intrinsic_instr *dst_buf = nir_intrinsic_instr_create(b.shader, + nir_intrinsic_vulkan_resource_index); + dst_buf->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0)); + nir_intrinsic_set_desc_set(dst_buf, 0); + nir_intrinsic_set_binding(dst_buf, 0); + nir_ssa_dest_init(&dst_buf->instr, &dst_buf->dest, 1, 32, NULL); + nir_builder_instr_insert(&b, &dst_buf->instr); + + nir_intrinsic_instr *load = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant); + load->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0)); + load->num_components = 1; + nir_ssa_dest_init(&load->instr, &load->dest, 1, 32, "fill_value"); + nir_builder_instr_insert(&b, &load->instr); + + nir_ssa_def *swizzled_load = nir_swizzle(&b, &load->dest.ssa, (unsigned[]) { 0, 0, 0, 0}, 4, false); + + nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_store_ssbo); + store->src[0] = nir_src_for_ssa(swizzled_load); + store->src[1] = nir_src_for_ssa(&dst_buf->dest.ssa); + store->src[2] = nir_src_for_ssa(offset); + nir_intrinsic_set_write_mask(store, 0xf); + store->num_components = 4; + nir_builder_instr_insert(&b, &store->instr); + + return b.shader; +} + +static nir_shader * +build_buffer_copy_shader(struct radv_device *dev) +{ + nir_builder b; + + nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_COMPUTE, NULL); + b.shader->info->name = ralloc_strdup(b.shader, "meta_buffer_copy"); + b.shader->info->cs.local_size[0] = 64; + b.shader->info->cs.local_size[1] = 1; + b.shader->info->cs.local_size[2] = 1; + + nir_ssa_def *invoc_id = nir_load_system_value(&b, nir_intrinsic_load_local_invocation_id, 0); + nir_ssa_def *wg_id = nir_load_system_value(&b, nir_intrinsic_load_work_group_id, 0); + nir_ssa_def *block_size = nir_imm_ivec4(&b, + b.shader->info->cs.local_size[0], + b.shader->info->cs.local_size[1], + b.shader->info->cs.local_size[2], 0); + + nir_ssa_def *global_id = nir_iadd(&b, nir_imul(&b, wg_id, block_size), invoc_id); + + nir_ssa_def *offset = nir_imul(&b, global_id, nir_imm_int(&b, 16)); + offset = nir_swizzle(&b, offset, (unsigned[]) {0, 0, 0, 0}, 1, false); + + nir_intrinsic_instr *dst_buf = nir_intrinsic_instr_create(b.shader, + nir_intrinsic_vulkan_resource_index); + dst_buf->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0)); + nir_intrinsic_set_desc_set(dst_buf, 0); + nir_intrinsic_set_binding(dst_buf, 0); + nir_ssa_dest_init(&dst_buf->instr, &dst_buf->dest, 1, 32, NULL); + nir_builder_instr_insert(&b, &dst_buf->instr); + + nir_intrinsic_instr *src_buf = nir_intrinsic_instr_create(b.shader, + nir_intrinsic_vulkan_resource_index); + src_buf->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0)); + nir_intrinsic_set_desc_set(src_buf, 0); + nir_intrinsic_set_binding(src_buf, 1); + nir_ssa_dest_init(&src_buf->instr, &src_buf->dest, 1, 32, NULL); + nir_builder_instr_insert(&b, &src_buf->instr); + + nir_intrinsic_instr *load = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_ssbo); + load->src[0] = nir_src_for_ssa(&src_buf->dest.ssa); + load->src[1] = nir_src_for_ssa(offset); + nir_ssa_dest_init(&load->instr, &load->dest, 4, 32, NULL); + load->num_components = 4; + nir_builder_instr_insert(&b, &load->instr); + + nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_store_ssbo); + store->src[0] = nir_src_for_ssa(&load->dest.ssa); + store->src[1] = nir_src_for_ssa(&dst_buf->dest.ssa); + store->src[2] = nir_src_for_ssa(offset); + nir_intrinsic_set_write_mask(store, 0xf); + store->num_components = 4; + nir_builder_instr_insert(&b, &store->instr); + + return b.shader; +} + + + +VkResult radv_device_init_meta_buffer_state(struct radv_device *device) +{ + VkResult result; + struct radv_shader_module fill_cs = { .nir = NULL }; + struct radv_shader_module copy_cs = { .nir = NULL }; + + zero(device->meta_state.buffer); + + fill_cs.nir = build_buffer_fill_shader(device); + copy_cs.nir = build_buffer_copy_shader(device); + + VkDescriptorSetLayoutCreateInfo fill_ds_create_info = { + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO, + .bindingCount = 1, + .pBindings = (VkDescriptorSetLayoutBinding[]) { + { + .binding = 0, + .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_BUFFER, + .descriptorCount = 1, + .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT, + .pImmutableSamplers = NULL + }, + } + }; + + result = radv_CreateDescriptorSetLayout(radv_device_to_handle(device), + &fill_ds_create_info, + &device->meta_state.alloc, + &device->meta_state.buffer.fill_ds_layout); + if (result != VK_SUCCESS) + goto fail; + + VkDescriptorSetLayoutCreateInfo copy_ds_create_info = { + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO, + .bindingCount = 2, + .pBindings = (VkDescriptorSetLayoutBinding[]) { + { + .binding = 0, + .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_BUFFER, + .descriptorCount = 1, + .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT, + .pImmutableSamplers = NULL + }, + { + .binding = 1, + .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_BUFFER, + .descriptorCount = 1, + .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT, + .pImmutableSamplers = NULL + }, + } + }; + + result = radv_CreateDescriptorSetLayout(radv_device_to_handle(device), + ©_ds_create_info, + &device->meta_state.alloc, + &device->meta_state.buffer.copy_ds_layout); + if (result != VK_SUCCESS) + goto fail; + + + VkPipelineLayoutCreateInfo fill_pl_create_info = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO, + .setLayoutCount = 1, + .pSetLayouts = &device->meta_state.buffer.fill_ds_layout, + .pushConstantRangeCount = 1, + .pPushConstantRanges = &(VkPushConstantRange){VK_SHADER_STAGE_COMPUTE_BIT, 0, 4}, + }; + + result = radv_CreatePipelineLayout(radv_device_to_handle(device), + &fill_pl_create_info, + &device->meta_state.alloc, + &device->meta_state.buffer.fill_p_layout); + if (result != VK_SUCCESS) + goto fail; + + VkPipelineLayoutCreateInfo copy_pl_create_info = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO, + .setLayoutCount = 1, + .pSetLayouts = &device->meta_state.buffer.copy_ds_layout, + .pushConstantRangeCount = 0, + }; + + result = radv_CreatePipelineLayout(radv_device_to_handle(device), + ©_pl_create_info, + &device->meta_state.alloc, + &device->meta_state.buffer.copy_p_layout); + if (result != VK_SUCCESS) + goto fail; + + VkPipelineShaderStageCreateInfo fill_pipeline_shader_stage = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_COMPUTE_BIT, + .module = radv_shader_module_to_handle(&fill_cs), + .pName = "main", + .pSpecializationInfo = NULL, + }; + + VkComputePipelineCreateInfo fill_vk_pipeline_info = { + .sType = VK_STRUCTURE_TYPE_COMPUTE_PIPELINE_CREATE_INFO, + .stage = fill_pipeline_shader_stage, + .flags = 0, + .layout = device->meta_state.buffer.fill_p_layout, + }; + + result = radv_CreateComputePipelines(radv_device_to_handle(device), + radv_pipeline_cache_to_handle(&device->meta_state.cache), + 1, &fill_vk_pipeline_info, NULL, + &device->meta_state.buffer.fill_pipeline); + if (result != VK_SUCCESS) + goto fail; + + VkPipelineShaderStageCreateInfo copy_pipeline_shader_stage = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_COMPUTE_BIT, + .module = radv_shader_module_to_handle(©_cs), + .pName = "main", + .pSpecializationInfo = NULL, + }; + + VkComputePipelineCreateInfo copy_vk_pipeline_info = { + .sType = VK_STRUCTURE_TYPE_COMPUTE_PIPELINE_CREATE_INFO, + .stage = copy_pipeline_shader_stage, + .flags = 0, + .layout = device->meta_state.buffer.copy_p_layout, + }; + + result = radv_CreateComputePipelines(radv_device_to_handle(device), + radv_pipeline_cache_to_handle(&device->meta_state.cache), + 1, ©_vk_pipeline_info, NULL, + &device->meta_state.buffer.copy_pipeline); + if (result != VK_SUCCESS) + goto fail; + + ralloc_free(fill_cs.nir); + ralloc_free(copy_cs.nir); + return VK_SUCCESS; +fail: + radv_device_finish_meta_buffer_state(device); + ralloc_free(fill_cs.nir); + ralloc_free(copy_cs.nir); + return result; +} + +void radv_device_finish_meta_buffer_state(struct radv_device *device) +{ + if (device->meta_state.buffer.copy_pipeline) + radv_DestroyPipeline(radv_device_to_handle(device), + device->meta_state.buffer.copy_pipeline, + &device->meta_state.alloc); + + if (device->meta_state.buffer.fill_pipeline) + radv_DestroyPipeline(radv_device_to_handle(device), + device->meta_state.buffer.fill_pipeline, + &device->meta_state.alloc); + + if (device->meta_state.buffer.copy_p_layout) + radv_DestroyPipelineLayout(radv_device_to_handle(device), + device->meta_state.buffer.copy_p_layout, + &device->meta_state.alloc); + + if (device->meta_state.buffer.fill_p_layout) + radv_DestroyPipelineLayout(radv_device_to_handle(device), + device->meta_state.buffer.fill_p_layout, + &device->meta_state.alloc); + + if (device->meta_state.buffer.copy_ds_layout) + radv_DestroyDescriptorSetLayout(radv_device_to_handle(device), + device->meta_state.buffer.copy_ds_layout, + &device->meta_state.alloc); + + if (device->meta_state.buffer.fill_ds_layout) + radv_DestroyDescriptorSetLayout(radv_device_to_handle(device), + device->meta_state.buffer.fill_ds_layout, + &device->meta_state.alloc); +} + +static void fill_buffer_shader(struct radv_cmd_buffer *cmd_buffer, + struct radeon_winsys_bo *bo, + uint64_t offset, uint64_t size, uint32_t value) +{ + struct radv_device *device = cmd_buffer->device; + uint64_t block_count = round_up_u64(size, 1024); + struct radv_meta_saved_compute_state saved_state; + VkDescriptorSet ds; + + radv_meta_save_compute(&saved_state, cmd_buffer, 4); + + radv_temp_descriptor_set_create(device, cmd_buffer, + device->meta_state.buffer.fill_ds_layout, + &ds); + + struct radv_buffer dst_buffer = { + .bo = bo, + .offset = offset, + .size = size + }; + + radv_UpdateDescriptorSets(radv_device_to_handle(device), + 1, /* writeCount */ + (VkWriteDescriptorSet[]) { + { + .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, + .dstSet = ds, + .dstBinding = 0, + .dstArrayElement = 0, + .descriptorCount = 1, + .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_BUFFER, + .pBufferInfo = &(VkDescriptorBufferInfo) { + .buffer = radv_buffer_to_handle(&dst_buffer), + .offset = 0, + .range = size + } + } + }, 0, NULL); + + radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), + VK_PIPELINE_BIND_POINT_COMPUTE, + device->meta_state.buffer.fill_pipeline); + + radv_CmdBindDescriptorSets(radv_cmd_buffer_to_handle(cmd_buffer), + VK_PIPELINE_BIND_POINT_COMPUTE, + device->meta_state.buffer.fill_p_layout, 0, 1, + &ds, 0, NULL); + + radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer), + device->meta_state.buffer.fill_p_layout, + VK_SHADER_STAGE_COMPUTE_BIT, 0, 4, + &value); + + radv_CmdDispatch(radv_cmd_buffer_to_handle(cmd_buffer), block_count, 1, 1); + + radv_temp_descriptor_set_destroy(device, ds); + + radv_meta_restore_compute(&saved_state, cmd_buffer, 4); +} + +static void copy_buffer_shader(struct radv_cmd_buffer *cmd_buffer, + struct radeon_winsys_bo *src_bo, + struct radeon_winsys_bo *dst_bo, + uint64_t src_offset, uint64_t dst_offset, + uint64_t size) +{ + struct radv_device *device = cmd_buffer->device; + uint64_t block_count = round_up_u64(size, 1024); + struct radv_meta_saved_compute_state saved_state; + VkDescriptorSet ds; + + radv_meta_save_compute(&saved_state, cmd_buffer, 0); + + radv_temp_descriptor_set_create(device, cmd_buffer, + device->meta_state.buffer.copy_ds_layout, + &ds); + + struct radv_buffer dst_buffer = { + .bo = dst_bo, + .offset = dst_offset, + .size = size + }; + + struct radv_buffer src_buffer = { + .bo = src_bo, + .offset = src_offset, + .size = size + }; + + radv_UpdateDescriptorSets(radv_device_to_handle(device), + 2, /* writeCount */ + (VkWriteDescriptorSet[]) { + { + .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, + .dstSet = ds, + .dstBinding = 0, + .dstArrayElement = 0, + .descriptorCount = 1, + .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_BUFFER, + .pBufferInfo = &(VkDescriptorBufferInfo) { + .buffer = radv_buffer_to_handle(&dst_buffer), + .offset = 0, + .range = size + } + }, + { + .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, + .dstSet = ds, + .dstBinding = 1, + .dstArrayElement = 0, + .descriptorCount = 1, + .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_BUFFER, + .pBufferInfo = &(VkDescriptorBufferInfo) { + .buffer = radv_buffer_to_handle(&src_buffer), + .offset = 0, + .range = size + } + } + }, 0, NULL); + + radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), + VK_PIPELINE_BIND_POINT_COMPUTE, + device->meta_state.buffer.copy_pipeline); + + radv_CmdBindDescriptorSets(radv_cmd_buffer_to_handle(cmd_buffer), + VK_PIPELINE_BIND_POINT_COMPUTE, + device->meta_state.buffer.copy_p_layout, 0, 1, + &ds, 0, NULL); + + + radv_CmdDispatch(radv_cmd_buffer_to_handle(cmd_buffer), block_count, 1, 1); + + radv_temp_descriptor_set_destroy(device, ds); + + radv_meta_restore_compute(&saved_state, cmd_buffer, 0); +} + + +void radv_fill_buffer(struct radv_cmd_buffer *cmd_buffer, + struct radeon_winsys_bo *bo, + uint64_t offset, uint64_t size, uint32_t value) +{ + assert(!(offset & 3)); + assert(!(size & 3)); + + if (size >= 4096) + fill_buffer_shader(cmd_buffer, bo, offset, size, value); + else if (size) { + uint64_t va = cmd_buffer->device->ws->buffer_get_va(bo); + va += offset; + cmd_buffer->device->ws->cs_add_buffer(cmd_buffer->cs, bo, 8); + si_cp_dma_clear_buffer(cmd_buffer, va, size, value); + } +} + +static +void radv_copy_buffer(struct radv_cmd_buffer *cmd_buffer, + struct radeon_winsys_bo *src_bo, + struct radeon_winsys_bo *dst_bo, + uint64_t src_offset, uint64_t dst_offset, + uint64_t size) +{ + if (size >= 4096 && !(size & 3) && !(src_offset & 3) && !(dst_offset & 3)) + copy_buffer_shader(cmd_buffer, src_bo, dst_bo, + src_offset, dst_offset, size); + else if (size) { + uint64_t src_va = cmd_buffer->device->ws->buffer_get_va(src_bo); + uint64_t dst_va = cmd_buffer->device->ws->buffer_get_va(dst_bo); + src_va += src_offset; + dst_va += dst_offset; + + cmd_buffer->device->ws->cs_add_buffer(cmd_buffer->cs, src_bo, 8); + cmd_buffer->device->ws->cs_add_buffer(cmd_buffer->cs, dst_bo, 8); + + si_cp_dma_buffer_copy(cmd_buffer, src_va, dst_va, size); + } +} + +void radv_CmdFillBuffer( + VkCommandBuffer commandBuffer, + VkBuffer dstBuffer, + VkDeviceSize dstOffset, + VkDeviceSize fillSize, + uint32_t data) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + RADV_FROM_HANDLE(radv_buffer, dst_buffer, dstBuffer); + + if (fillSize == VK_WHOLE_SIZE) + fillSize = (dst_buffer->size - dstOffset) & ~3ull; + + radv_fill_buffer(cmd_buffer, dst_buffer->bo, dst_buffer->offset + dstOffset, + fillSize, data); +} + +void radv_CmdCopyBuffer( + VkCommandBuffer commandBuffer, + VkBuffer srcBuffer, + VkBuffer destBuffer, + uint32_t regionCount, + const VkBufferCopy* pRegions) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + RADV_FROM_HANDLE(radv_buffer, src_buffer, srcBuffer); + RADV_FROM_HANDLE(radv_buffer, dest_buffer, destBuffer); + + for (unsigned r = 0; r < regionCount; r++) { + uint64_t src_offset = src_buffer->offset + pRegions[r].srcOffset; + uint64_t dest_offset = dest_buffer->offset + pRegions[r].dstOffset; + uint64_t copy_size = pRegions[r].size; + + radv_copy_buffer(cmd_buffer, src_buffer->bo, dest_buffer->bo, + src_offset, dest_offset, copy_size); + } +} + +void radv_CmdUpdateBuffer( + VkCommandBuffer commandBuffer, + VkBuffer dstBuffer, + VkDeviceSize dstOffset, + VkDeviceSize dataSize, + const void* pData) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + RADV_FROM_HANDLE(radv_buffer, dst_buffer, dstBuffer); + bool mec = radv_cmd_buffer_uses_mec(cmd_buffer); + uint64_t words = dataSize / 4; + uint64_t va = cmd_buffer->device->ws->buffer_get_va(dst_buffer->bo); + va += dstOffset + dst_buffer->offset; + + assert(!(dataSize & 3)); + assert(!(va & 3)); + + if (dataSize < 4096) { + si_emit_cache_flush(cmd_buffer); + + cmd_buffer->device->ws->cs_add_buffer(cmd_buffer->cs, dst_buffer->bo, 8); + + radeon_check_space(cmd_buffer->device->ws, cmd_buffer->cs, words + 4); + + radeon_emit(cmd_buffer->cs, PKT3(PKT3_WRITE_DATA, 2 + words, 0)); + radeon_emit(cmd_buffer->cs, S_370_DST_SEL(mec ? + V_370_MEM_ASYNC : V_370_MEMORY_SYNC) | + S_370_WR_CONFIRM(1) | + S_370_ENGINE_SEL(V_370_ME)); + radeon_emit(cmd_buffer->cs, va); + radeon_emit(cmd_buffer->cs, va >> 32); + radeon_emit_array(cmd_buffer->cs, pData, words); + } else { + uint32_t buf_offset; + radv_cmd_buffer_upload_data(cmd_buffer, dataSize, 32, pData, &buf_offset); + radv_copy_buffer(cmd_buffer, cmd_buffer->upload.upload_bo, dst_buffer->bo, + buf_offset, dstOffset + dst_buffer->offset, dataSize); + } +} diff -Nru mesa-12.0.6/src/amd/vulkan/radv_meta_bufimage.c mesa-17.0.7/src/amd/vulkan/radv_meta_bufimage.c --- mesa-12.0.6/src/amd/vulkan/radv_meta_bufimage.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_meta_bufimage.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,1260 @@ +/* + * Copyright © 2016 Red Hat. + * Copyright © 2016 Bas Nieuwenhuizen + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ +#include "radv_meta.h" +#include "nir/nir_builder.h" + +/* + * GFX queue: Compute shader implementation of image->buffer copy + * Compute queue: implementation also of buffer->image, image->image, and image clear. + */ + +static nir_shader * +build_nir_itob_compute_shader(struct radv_device *dev) +{ + nir_builder b; + const struct glsl_type *sampler_type = glsl_sampler_type(GLSL_SAMPLER_DIM_2D, + false, + false, + GLSL_TYPE_FLOAT); + const struct glsl_type *img_type = glsl_sampler_type(GLSL_SAMPLER_DIM_BUF, + false, + false, + GLSL_TYPE_FLOAT); + nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_COMPUTE, NULL); + b.shader->info->name = ralloc_strdup(b.shader, "meta_itob_cs"); + b.shader->info->cs.local_size[0] = 16; + b.shader->info->cs.local_size[1] = 16; + b.shader->info->cs.local_size[2] = 1; + nir_variable *input_img = nir_variable_create(b.shader, nir_var_uniform, + sampler_type, "s_tex"); + input_img->data.descriptor_set = 0; + input_img->data.binding = 0; + + nir_variable *output_img = nir_variable_create(b.shader, nir_var_uniform, + img_type, "out_img"); + output_img->data.descriptor_set = 0; + output_img->data.binding = 1; + + nir_ssa_def *invoc_id = nir_load_system_value(&b, nir_intrinsic_load_local_invocation_id, 0); + nir_ssa_def *wg_id = nir_load_system_value(&b, nir_intrinsic_load_work_group_id, 0); + nir_ssa_def *block_size = nir_imm_ivec4(&b, + b.shader->info->cs.local_size[0], + b.shader->info->cs.local_size[1], + b.shader->info->cs.local_size[2], 0); + + nir_ssa_def *global_id = nir_iadd(&b, nir_imul(&b, wg_id, block_size), invoc_id); + + + + nir_intrinsic_instr *offset = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant); + offset->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0)); + offset->num_components = 2; + nir_ssa_dest_init(&offset->instr, &offset->dest, 2, 32, "offset"); + nir_builder_instr_insert(&b, &offset->instr); + + nir_intrinsic_instr *stride = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant); + stride->src[0] = nir_src_for_ssa(nir_imm_int(&b, 8)); + stride->num_components = 1; + nir_ssa_dest_init(&stride->instr, &stride->dest, 1, 32, "stride"); + nir_builder_instr_insert(&b, &stride->instr); + + nir_ssa_def *img_coord = nir_iadd(&b, global_id, &offset->dest.ssa); + + nir_tex_instr *tex = nir_tex_instr_create(b.shader, 2); + tex->sampler_dim = GLSL_SAMPLER_DIM_2D; + tex->op = nir_texop_txf; + tex->src[0].src_type = nir_tex_src_coord; + tex->src[0].src = nir_src_for_ssa(img_coord); + tex->src[1].src_type = nir_tex_src_lod; + tex->src[1].src = nir_src_for_ssa(nir_imm_int(&b, 0)); + tex->dest_type = nir_type_float; + tex->is_array = false; + tex->coord_components = 2; + tex->texture = nir_deref_var_create(tex, input_img); + tex->sampler = NULL; + + nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex"); + nir_builder_instr_insert(&b, &tex->instr); + + nir_ssa_def *pos_x = nir_channel(&b, global_id, 0); + nir_ssa_def *pos_y = nir_channel(&b, global_id, 1); + + nir_ssa_def *tmp = nir_imul(&b, pos_y, &stride->dest.ssa); + tmp = nir_iadd(&b, tmp, pos_x); + + nir_ssa_def *coord = nir_vec4(&b, tmp, tmp, tmp, tmp); + + nir_ssa_def *outval = &tex->dest.ssa; + nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_store); + store->src[0] = nir_src_for_ssa(coord); + store->src[1] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32)); + store->src[2] = nir_src_for_ssa(outval); + store->variables[0] = nir_deref_var_create(store, output_img); + + nir_builder_instr_insert(&b, &store->instr); + return b.shader; +} + +/* Image to buffer - don't write use image accessors */ +static VkResult +radv_device_init_meta_itob_state(struct radv_device *device) +{ + VkResult result; + struct radv_shader_module cs = { .nir = NULL }; + + zero(device->meta_state.itob); + + cs.nir = build_nir_itob_compute_shader(device); + + /* + * two descriptors one for the image being sampled + * one for the buffer being written. + */ + VkDescriptorSetLayoutCreateInfo ds_create_info = { + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO, + .bindingCount = 2, + .pBindings = (VkDescriptorSetLayoutBinding[]) { + { + .binding = 0, + .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, + .descriptorCount = 1, + .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT, + .pImmutableSamplers = NULL + }, + { + .binding = 1, + .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER, + .descriptorCount = 1, + .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT, + .pImmutableSamplers = NULL + }, + } + }; + + result = radv_CreateDescriptorSetLayout(radv_device_to_handle(device), + &ds_create_info, + &device->meta_state.alloc, + &device->meta_state.itob.img_ds_layout); + if (result != VK_SUCCESS) + goto fail; + + + VkPipelineLayoutCreateInfo pl_create_info = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO, + .setLayoutCount = 1, + .pSetLayouts = &device->meta_state.itob.img_ds_layout, + .pushConstantRangeCount = 1, + .pPushConstantRanges = &(VkPushConstantRange){VK_SHADER_STAGE_COMPUTE_BIT, 0, 12}, + }; + + result = radv_CreatePipelineLayout(radv_device_to_handle(device), + &pl_create_info, + &device->meta_state.alloc, + &device->meta_state.itob.img_p_layout); + if (result != VK_SUCCESS) + goto fail; + + /* compute shader */ + + VkPipelineShaderStageCreateInfo pipeline_shader_stage = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_COMPUTE_BIT, + .module = radv_shader_module_to_handle(&cs), + .pName = "main", + .pSpecializationInfo = NULL, + }; + + VkComputePipelineCreateInfo vk_pipeline_info = { + .sType = VK_STRUCTURE_TYPE_COMPUTE_PIPELINE_CREATE_INFO, + .stage = pipeline_shader_stage, + .flags = 0, + .layout = device->meta_state.itob.img_p_layout, + }; + + result = radv_CreateComputePipelines(radv_device_to_handle(device), + radv_pipeline_cache_to_handle(&device->meta_state.cache), + 1, &vk_pipeline_info, NULL, + &device->meta_state.itob.pipeline); + if (result != VK_SUCCESS) + goto fail; + + ralloc_free(cs.nir); + return VK_SUCCESS; +fail: + ralloc_free(cs.nir); + return result; +} + +static void +radv_device_finish_meta_itob_state(struct radv_device *device) +{ + if (device->meta_state.itob.img_p_layout) { + radv_DestroyPipelineLayout(radv_device_to_handle(device), + device->meta_state.itob.img_p_layout, + &device->meta_state.alloc); + } + if (device->meta_state.itob.img_ds_layout) { + radv_DestroyDescriptorSetLayout(radv_device_to_handle(device), + device->meta_state.itob.img_ds_layout, + &device->meta_state.alloc); + } + if (device->meta_state.itob.pipeline) { + radv_DestroyPipeline(radv_device_to_handle(device), + device->meta_state.itob.pipeline, + &device->meta_state.alloc); + } +} + +static nir_shader * +build_nir_btoi_compute_shader(struct radv_device *dev) +{ + nir_builder b; + const struct glsl_type *buf_type = glsl_sampler_type(GLSL_SAMPLER_DIM_BUF, + false, + false, + GLSL_TYPE_FLOAT); + const struct glsl_type *img_type = glsl_sampler_type(GLSL_SAMPLER_DIM_2D, + false, + false, + GLSL_TYPE_FLOAT); + nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_COMPUTE, NULL); + b.shader->info->name = ralloc_strdup(b.shader, "meta_btoi_cs"); + b.shader->info->cs.local_size[0] = 16; + b.shader->info->cs.local_size[1] = 16; + b.shader->info->cs.local_size[2] = 1; + nir_variable *input_img = nir_variable_create(b.shader, nir_var_uniform, + buf_type, "s_tex"); + input_img->data.descriptor_set = 0; + input_img->data.binding = 0; + + nir_variable *output_img = nir_variable_create(b.shader, nir_var_uniform, + img_type, "out_img"); + output_img->data.descriptor_set = 0; + output_img->data.binding = 1; + + nir_ssa_def *invoc_id = nir_load_system_value(&b, nir_intrinsic_load_local_invocation_id, 0); + nir_ssa_def *wg_id = nir_load_system_value(&b, nir_intrinsic_load_work_group_id, 0); + nir_ssa_def *block_size = nir_imm_ivec4(&b, + b.shader->info->cs.local_size[0], + b.shader->info->cs.local_size[1], + b.shader->info->cs.local_size[2], 0); + + nir_ssa_def *global_id = nir_iadd(&b, nir_imul(&b, wg_id, block_size), invoc_id); + + nir_intrinsic_instr *offset = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant); + offset->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0)); + offset->num_components = 2; + nir_ssa_dest_init(&offset->instr, &offset->dest, 2, 32, "offset"); + nir_builder_instr_insert(&b, &offset->instr); + + nir_intrinsic_instr *stride = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant); + stride->src[0] = nir_src_for_ssa(nir_imm_int(&b, 8)); + stride->num_components = 1; + nir_ssa_dest_init(&stride->instr, &stride->dest, 1, 32, "stride"); + nir_builder_instr_insert(&b, &stride->instr); + + nir_ssa_def *pos_x = nir_channel(&b, global_id, 0); + nir_ssa_def *pos_y = nir_channel(&b, global_id, 1); + + nir_ssa_def *tmp = nir_imul(&b, pos_y, &stride->dest.ssa); + tmp = nir_iadd(&b, tmp, pos_x); + + nir_ssa_def *buf_coord = nir_vec4(&b, tmp, tmp, tmp, tmp); + + nir_ssa_def *img_coord = nir_iadd(&b, global_id, &offset->dest.ssa); + + nir_tex_instr *tex = nir_tex_instr_create(b.shader, 2); + tex->sampler_dim = GLSL_SAMPLER_DIM_BUF; + tex->op = nir_texop_txf; + tex->src[0].src_type = nir_tex_src_coord; + tex->src[0].src = nir_src_for_ssa(buf_coord); + tex->src[1].src_type = nir_tex_src_lod; + tex->src[1].src = nir_src_for_ssa(nir_imm_int(&b, 0)); + tex->dest_type = nir_type_float; + tex->is_array = false; + tex->coord_components = 1; + tex->texture = nir_deref_var_create(tex, input_img); + tex->sampler = NULL; + + nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex"); + nir_builder_instr_insert(&b, &tex->instr); + + nir_ssa_def *outval = &tex->dest.ssa; + nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_store); + store->src[0] = nir_src_for_ssa(img_coord); + store->src[1] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32)); + store->src[2] = nir_src_for_ssa(outval); + store->variables[0] = nir_deref_var_create(store, output_img); + + nir_builder_instr_insert(&b, &store->instr); + return b.shader; +} + +/* Buffer to image - don't write use image accessors */ +static VkResult +radv_device_init_meta_btoi_state(struct radv_device *device) +{ + VkResult result; + struct radv_shader_module cs = { .nir = NULL }; + + zero(device->meta_state.btoi); + + cs.nir = build_nir_btoi_compute_shader(device); + + /* + * two descriptors one for the image being sampled + * one for the buffer being written. + */ + VkDescriptorSetLayoutCreateInfo ds_create_info = { + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO, + .bindingCount = 2, + .pBindings = (VkDescriptorSetLayoutBinding[]) { + { + .binding = 0, + .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER, + .descriptorCount = 1, + .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT, + .pImmutableSamplers = NULL + }, + { + .binding = 1, + .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, + .descriptorCount = 1, + .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT, + .pImmutableSamplers = NULL + }, + } + }; + + result = radv_CreateDescriptorSetLayout(radv_device_to_handle(device), + &ds_create_info, + &device->meta_state.alloc, + &device->meta_state.btoi.img_ds_layout); + if (result != VK_SUCCESS) + goto fail; + + + VkPipelineLayoutCreateInfo pl_create_info = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO, + .setLayoutCount = 1, + .pSetLayouts = &device->meta_state.btoi.img_ds_layout, + .pushConstantRangeCount = 1, + .pPushConstantRanges = &(VkPushConstantRange){VK_SHADER_STAGE_COMPUTE_BIT, 0, 12}, + }; + + result = radv_CreatePipelineLayout(radv_device_to_handle(device), + &pl_create_info, + &device->meta_state.alloc, + &device->meta_state.btoi.img_p_layout); + if (result != VK_SUCCESS) + goto fail; + + /* compute shader */ + + VkPipelineShaderStageCreateInfo pipeline_shader_stage = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_COMPUTE_BIT, + .module = radv_shader_module_to_handle(&cs), + .pName = "main", + .pSpecializationInfo = NULL, + }; + + VkComputePipelineCreateInfo vk_pipeline_info = { + .sType = VK_STRUCTURE_TYPE_COMPUTE_PIPELINE_CREATE_INFO, + .stage = pipeline_shader_stage, + .flags = 0, + .layout = device->meta_state.btoi.img_p_layout, + }; + + result = radv_CreateComputePipelines(radv_device_to_handle(device), + radv_pipeline_cache_to_handle(&device->meta_state.cache), + 1, &vk_pipeline_info, NULL, + &device->meta_state.btoi.pipeline); + if (result != VK_SUCCESS) + goto fail; + + ralloc_free(cs.nir); + return VK_SUCCESS; +fail: + ralloc_free(cs.nir); + return result; +} + +static void +radv_device_finish_meta_btoi_state(struct radv_device *device) +{ + if (device->meta_state.btoi.img_p_layout) { + radv_DestroyPipelineLayout(radv_device_to_handle(device), + device->meta_state.btoi.img_p_layout, + &device->meta_state.alloc); + } + if (device->meta_state.btoi.img_ds_layout) { + radv_DestroyDescriptorSetLayout(radv_device_to_handle(device), + device->meta_state.btoi.img_ds_layout, + &device->meta_state.alloc); + } + if (device->meta_state.btoi.pipeline) { + radv_DestroyPipeline(radv_device_to_handle(device), + device->meta_state.btoi.pipeline, + &device->meta_state.alloc); + } +} + +static nir_shader * +build_nir_itoi_compute_shader(struct radv_device *dev) +{ + nir_builder b; + const struct glsl_type *buf_type = glsl_sampler_type(GLSL_SAMPLER_DIM_2D, + false, + false, + GLSL_TYPE_FLOAT); + const struct glsl_type *img_type = glsl_sampler_type(GLSL_SAMPLER_DIM_2D, + false, + false, + GLSL_TYPE_FLOAT); + nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_COMPUTE, NULL); + b.shader->info->name = ralloc_strdup(b.shader, "meta_itoi_cs"); + b.shader->info->cs.local_size[0] = 16; + b.shader->info->cs.local_size[1] = 16; + b.shader->info->cs.local_size[2] = 1; + nir_variable *input_img = nir_variable_create(b.shader, nir_var_uniform, + buf_type, "s_tex"); + input_img->data.descriptor_set = 0; + input_img->data.binding = 0; + + nir_variable *output_img = nir_variable_create(b.shader, nir_var_uniform, + img_type, "out_img"); + output_img->data.descriptor_set = 0; + output_img->data.binding = 1; + + nir_ssa_def *invoc_id = nir_load_system_value(&b, nir_intrinsic_load_local_invocation_id, 0); + nir_ssa_def *wg_id = nir_load_system_value(&b, nir_intrinsic_load_work_group_id, 0); + nir_ssa_def *block_size = nir_imm_ivec4(&b, + b.shader->info->cs.local_size[0], + b.shader->info->cs.local_size[1], + b.shader->info->cs.local_size[2], 0); + + nir_ssa_def *global_id = nir_iadd(&b, nir_imul(&b, wg_id, block_size), invoc_id); + + nir_intrinsic_instr *src_offset = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant); + src_offset->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0)); + src_offset->num_components = 2; + nir_ssa_dest_init(&src_offset->instr, &src_offset->dest, 2, 32, "src_offset"); + nir_builder_instr_insert(&b, &src_offset->instr); + + nir_intrinsic_instr *dst_offset = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant); + dst_offset->src[0] = nir_src_for_ssa(nir_imm_int(&b, 8)); + dst_offset->num_components = 2; + nir_ssa_dest_init(&dst_offset->instr, &dst_offset->dest, 2, 32, "dst_offset"); + nir_builder_instr_insert(&b, &dst_offset->instr); + + nir_ssa_def *src_coord = nir_iadd(&b, global_id, &src_offset->dest.ssa); + + nir_ssa_def *dst_coord = nir_iadd(&b, global_id, &dst_offset->dest.ssa); + + nir_tex_instr *tex = nir_tex_instr_create(b.shader, 2); + tex->sampler_dim = GLSL_SAMPLER_DIM_2D; + tex->op = nir_texop_txf; + tex->src[0].src_type = nir_tex_src_coord; + tex->src[0].src = nir_src_for_ssa(src_coord); + tex->src[1].src_type = nir_tex_src_lod; + tex->src[1].src = nir_src_for_ssa(nir_imm_int(&b, 0)); + tex->dest_type = nir_type_float; + tex->is_array = false; + tex->coord_components = 2; + tex->texture = nir_deref_var_create(tex, input_img); + tex->sampler = NULL; + + nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex"); + nir_builder_instr_insert(&b, &tex->instr); + + nir_ssa_def *outval = &tex->dest.ssa; + nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_store); + store->src[0] = nir_src_for_ssa(dst_coord); + store->src[1] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32)); + store->src[2] = nir_src_for_ssa(outval); + store->variables[0] = nir_deref_var_create(store, output_img); + + nir_builder_instr_insert(&b, &store->instr); + return b.shader; +} + +/* image to image - don't write use image accessors */ +static VkResult +radv_device_init_meta_itoi_state(struct radv_device *device) +{ + VkResult result; + struct radv_shader_module cs = { .nir = NULL }; + + zero(device->meta_state.itoi); + + cs.nir = build_nir_itoi_compute_shader(device); + + /* + * two descriptors one for the image being sampled + * one for the buffer being written. + */ + VkDescriptorSetLayoutCreateInfo ds_create_info = { + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO, + .bindingCount = 2, + .pBindings = (VkDescriptorSetLayoutBinding[]) { + { + .binding = 0, + .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, + .descriptorCount = 1, + .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT, + .pImmutableSamplers = NULL + }, + { + .binding = 1, + .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, + .descriptorCount = 1, + .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT, + .pImmutableSamplers = NULL + }, + } + }; + + result = radv_CreateDescriptorSetLayout(radv_device_to_handle(device), + &ds_create_info, + &device->meta_state.alloc, + &device->meta_state.itoi.img_ds_layout); + if (result != VK_SUCCESS) + goto fail; + + + VkPipelineLayoutCreateInfo pl_create_info = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO, + .setLayoutCount = 1, + .pSetLayouts = &device->meta_state.itoi.img_ds_layout, + .pushConstantRangeCount = 1, + .pPushConstantRanges = &(VkPushConstantRange){VK_SHADER_STAGE_COMPUTE_BIT, 0, 16}, + }; + + result = radv_CreatePipelineLayout(radv_device_to_handle(device), + &pl_create_info, + &device->meta_state.alloc, + &device->meta_state.itoi.img_p_layout); + if (result != VK_SUCCESS) + goto fail; + + /* compute shader */ + + VkPipelineShaderStageCreateInfo pipeline_shader_stage = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_COMPUTE_BIT, + .module = radv_shader_module_to_handle(&cs), + .pName = "main", + .pSpecializationInfo = NULL, + }; + + VkComputePipelineCreateInfo vk_pipeline_info = { + .sType = VK_STRUCTURE_TYPE_COMPUTE_PIPELINE_CREATE_INFO, + .stage = pipeline_shader_stage, + .flags = 0, + .layout = device->meta_state.itoi.img_p_layout, + }; + + result = radv_CreateComputePipelines(radv_device_to_handle(device), + radv_pipeline_cache_to_handle(&device->meta_state.cache), + 1, &vk_pipeline_info, NULL, + &device->meta_state.itoi.pipeline); + if (result != VK_SUCCESS) + goto fail; + + ralloc_free(cs.nir); + return VK_SUCCESS; +fail: + ralloc_free(cs.nir); + return result; +} + +static void +radv_device_finish_meta_itoi_state(struct radv_device *device) +{ + if (device->meta_state.itoi.img_p_layout) { + radv_DestroyPipelineLayout(radv_device_to_handle(device), + device->meta_state.itoi.img_p_layout, + &device->meta_state.alloc); + } + if (device->meta_state.itoi.img_ds_layout) { + radv_DestroyDescriptorSetLayout(radv_device_to_handle(device), + device->meta_state.itoi.img_ds_layout, + &device->meta_state.alloc); + } + if (device->meta_state.itoi.pipeline) { + radv_DestroyPipeline(radv_device_to_handle(device), + device->meta_state.itoi.pipeline, + &device->meta_state.alloc); + } +} + +static nir_shader * +build_nir_cleari_compute_shader(struct radv_device *dev) +{ + nir_builder b; + const struct glsl_type *img_type = glsl_sampler_type(GLSL_SAMPLER_DIM_2D, + false, + false, + GLSL_TYPE_FLOAT); + nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_COMPUTE, NULL); + b.shader->info->name = ralloc_strdup(b.shader, "meta_cleari_cs"); + b.shader->info->cs.local_size[0] = 16; + b.shader->info->cs.local_size[1] = 16; + b.shader->info->cs.local_size[2] = 1; + + nir_variable *output_img = nir_variable_create(b.shader, nir_var_uniform, + img_type, "out_img"); + output_img->data.descriptor_set = 0; + output_img->data.binding = 0; + + nir_ssa_def *invoc_id = nir_load_system_value(&b, nir_intrinsic_load_local_invocation_id, 0); + nir_ssa_def *wg_id = nir_load_system_value(&b, nir_intrinsic_load_work_group_id, 0); + nir_ssa_def *block_size = nir_imm_ivec4(&b, + b.shader->info->cs.local_size[0], + b.shader->info->cs.local_size[1], + b.shader->info->cs.local_size[2], 0); + + nir_ssa_def *global_id = nir_iadd(&b, nir_imul(&b, wg_id, block_size), invoc_id); + + nir_intrinsic_instr *clear_val = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant); + clear_val->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0)); + clear_val->num_components = 4; + nir_ssa_dest_init(&clear_val->instr, &clear_val->dest, 4, 32, "clear_value"); + nir_builder_instr_insert(&b, &clear_val->instr); + + nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_store); + store->src[0] = nir_src_for_ssa(global_id); + store->src[1] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32)); + store->src[2] = nir_src_for_ssa(&clear_val->dest.ssa); + store->variables[0] = nir_deref_var_create(store, output_img); + + nir_builder_instr_insert(&b, &store->instr); + return b.shader; +} + +static VkResult +radv_device_init_meta_cleari_state(struct radv_device *device) +{ + VkResult result; + struct radv_shader_module cs = { .nir = NULL }; + + zero(device->meta_state.cleari); + + cs.nir = build_nir_cleari_compute_shader(device); + + /* + * two descriptors one for the image being sampled + * one for the buffer being written. + */ + VkDescriptorSetLayoutCreateInfo ds_create_info = { + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO, + .bindingCount = 1, + .pBindings = (VkDescriptorSetLayoutBinding[]) { + { + .binding = 0, + .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, + .descriptorCount = 1, + .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT, + .pImmutableSamplers = NULL + }, + } + }; + + result = radv_CreateDescriptorSetLayout(radv_device_to_handle(device), + &ds_create_info, + &device->meta_state.alloc, + &device->meta_state.cleari.img_ds_layout); + if (result != VK_SUCCESS) + goto fail; + + + VkPipelineLayoutCreateInfo pl_create_info = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO, + .setLayoutCount = 1, + .pSetLayouts = &device->meta_state.cleari.img_ds_layout, + .pushConstantRangeCount = 1, + .pPushConstantRanges = &(VkPushConstantRange){VK_SHADER_STAGE_COMPUTE_BIT, 0, 16}, + }; + + result = radv_CreatePipelineLayout(radv_device_to_handle(device), + &pl_create_info, + &device->meta_state.alloc, + &device->meta_state.cleari.img_p_layout); + if (result != VK_SUCCESS) + goto fail; + + /* compute shader */ + + VkPipelineShaderStageCreateInfo pipeline_shader_stage = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_COMPUTE_BIT, + .module = radv_shader_module_to_handle(&cs), + .pName = "main", + .pSpecializationInfo = NULL, + }; + + VkComputePipelineCreateInfo vk_pipeline_info = { + .sType = VK_STRUCTURE_TYPE_COMPUTE_PIPELINE_CREATE_INFO, + .stage = pipeline_shader_stage, + .flags = 0, + .layout = device->meta_state.cleari.img_p_layout, + }; + + result = radv_CreateComputePipelines(radv_device_to_handle(device), + radv_pipeline_cache_to_handle(&device->meta_state.cache), + 1, &vk_pipeline_info, NULL, + &device->meta_state.cleari.pipeline); + if (result != VK_SUCCESS) + goto fail; + + ralloc_free(cs.nir); + return VK_SUCCESS; +fail: + ralloc_free(cs.nir); + return result; +} + +static void +radv_device_finish_meta_cleari_state(struct radv_device *device) +{ + if (device->meta_state.cleari.img_p_layout) { + radv_DestroyPipelineLayout(radv_device_to_handle(device), + device->meta_state.cleari.img_p_layout, + &device->meta_state.alloc); + } + if (device->meta_state.cleari.img_ds_layout) { + radv_DestroyDescriptorSetLayout(radv_device_to_handle(device), + device->meta_state.cleari.img_ds_layout, + &device->meta_state.alloc); + } + if (device->meta_state.cleari.pipeline) { + radv_DestroyPipeline(radv_device_to_handle(device), + device->meta_state.cleari.pipeline, + &device->meta_state.alloc); + } +} + +void +radv_device_finish_meta_bufimage_state(struct radv_device *device) +{ + radv_device_finish_meta_itob_state(device); + radv_device_finish_meta_btoi_state(device); + radv_device_finish_meta_itoi_state(device); + radv_device_finish_meta_cleari_state(device); +} + +VkResult +radv_device_init_meta_bufimage_state(struct radv_device *device) +{ + VkResult result; + + result = radv_device_init_meta_itob_state(device); + if (result != VK_SUCCESS) + return result; + + result = radv_device_init_meta_btoi_state(device); + if (result != VK_SUCCESS) + goto fail_itob; + + result = radv_device_init_meta_itoi_state(device); + if (result != VK_SUCCESS) + goto fail_btoi; + + result = radv_device_init_meta_cleari_state(device); + if (result != VK_SUCCESS) + goto fail_itoi; + + return VK_SUCCESS; +fail_itoi: + radv_device_finish_meta_itoi_state(device); +fail_btoi: + radv_device_finish_meta_btoi_state(device); +fail_itob: + radv_device_finish_meta_itob_state(device); + return result; +} + +void +radv_meta_begin_itoi(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_saved_compute_state *save) +{ + radv_meta_save_compute(save, cmd_buffer, 16); +} + +void +radv_meta_end_itoi(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_saved_compute_state *save) +{ + radv_meta_restore_compute(save, cmd_buffer, 16); +} + +void +radv_meta_begin_bufimage(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_saved_compute_state *save) +{ + radv_meta_save_compute(save, cmd_buffer, 12); +} + +void +radv_meta_end_bufimage(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_saved_compute_state *save) +{ + radv_meta_restore_compute(save, cmd_buffer, 12); +} + +void +radv_meta_begin_cleari(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_saved_compute_state *save) +{ + radv_meta_save_compute(save, cmd_buffer, 16); +} + +void +radv_meta_end_cleari(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_saved_compute_state *save) +{ + radv_meta_restore_compute(save, cmd_buffer, 16); +} + +static void +create_iview(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_blit2d_surf *surf, + VkImageUsageFlags usage, + struct radv_image_view *iview) +{ + + radv_image_view_init(iview, cmd_buffer->device, + &(VkImageViewCreateInfo) { + .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO, + .image = radv_image_to_handle(surf->image), + .viewType = VK_IMAGE_VIEW_TYPE_2D, + .format = surf->format, + .subresourceRange = { + .aspectMask = surf->aspect_mask, + .baseMipLevel = surf->level, + .levelCount = 1, + .baseArrayLayer = surf->layer, + .layerCount = 1 + }, + }, cmd_buffer, usage); +} + +static void +create_bview(struct radv_cmd_buffer *cmd_buffer, + struct radv_buffer *buffer, + unsigned offset, + VkFormat format, + struct radv_buffer_view *bview) +{ + radv_buffer_view_init(bview, cmd_buffer->device, + &(VkBufferViewCreateInfo) { + .sType = VK_STRUCTURE_TYPE_BUFFER_VIEW_CREATE_INFO, + .flags = 0, + .buffer = radv_buffer_to_handle(buffer), + .format = format, + .offset = offset, + .range = VK_WHOLE_SIZE, + }, cmd_buffer); + +} + +struct itob_temps { + struct radv_image_view src_iview; + struct radv_buffer_view dst_bview; + VkDescriptorSet set; +}; + +static void +itob_bind_descriptors(struct radv_cmd_buffer *cmd_buffer, + struct itob_temps *tmp) +{ + struct radv_device *device = cmd_buffer->device; + VkDevice vk_device = radv_device_to_handle(cmd_buffer->device); + + radv_temp_descriptor_set_create(device, cmd_buffer, + device->meta_state.itob.img_ds_layout, + &tmp->set); + + radv_UpdateDescriptorSets(vk_device, + 2, /* writeCount */ + (VkWriteDescriptorSet[]) { + { + .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, + .dstSet = tmp->set, + .dstBinding = 0, + .dstArrayElement = 0, + .descriptorCount = 1, + .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, + .pImageInfo = (VkDescriptorImageInfo[]) { + { + .sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(&tmp->src_iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + } + }, + { + .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, + .dstSet = tmp->set, + .dstBinding = 1, + .dstArrayElement = 0, + .descriptorCount = 1, + .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER, + .pTexelBufferView = (VkBufferView[]) { radv_buffer_view_to_handle(&tmp->dst_bview) }, + } + }, 0, NULL); + + radv_CmdBindDescriptorSets(radv_cmd_buffer_to_handle(cmd_buffer), + VK_PIPELINE_BIND_POINT_COMPUTE, + device->meta_state.itob.img_p_layout, 0, 1, + &tmp->set, 0, NULL); +} + +static void +itob_bind_pipeline(struct radv_cmd_buffer *cmd_buffer) +{ + VkPipeline pipeline = + cmd_buffer->device->meta_state.itob.pipeline; + + if (cmd_buffer->state.compute_pipeline != radv_pipeline_from_handle(pipeline)) { + radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), + VK_PIPELINE_BIND_POINT_COMPUTE, pipeline); + } +} + +void +radv_meta_image_to_buffer(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_blit2d_surf *src, + struct radv_meta_blit2d_buffer *dst, + unsigned num_rects, + struct radv_meta_blit2d_rect *rects) +{ + struct radv_device *device = cmd_buffer->device; + struct itob_temps temps; + + create_iview(cmd_buffer, src, VK_IMAGE_USAGE_SAMPLED_BIT, &temps.src_iview); + create_bview(cmd_buffer, dst->buffer, dst->offset, dst->format, &temps.dst_bview); + itob_bind_descriptors(cmd_buffer, &temps); + + itob_bind_pipeline(cmd_buffer); + + for (unsigned r = 0; r < num_rects; ++r) { + unsigned push_constants[3] = { + rects[r].src_x, + rects[r].src_y, + dst->pitch + }; + radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer), + device->meta_state.itob.img_p_layout, + VK_SHADER_STAGE_COMPUTE_BIT, 0, 12, + push_constants); + + radv_unaligned_dispatch(cmd_buffer, rects[r].width, rects[r].height, 1); + } + radv_temp_descriptor_set_destroy(cmd_buffer->device, temps.set); +} + +struct btoi_temps { + struct radv_buffer_view src_bview; + struct radv_image_view dst_iview; + VkDescriptorSet set; +}; + +static void +btoi_bind_descriptors(struct radv_cmd_buffer *cmd_buffer, + struct btoi_temps *tmp) +{ + struct radv_device *device = cmd_buffer->device; + VkDevice vk_device = radv_device_to_handle(cmd_buffer->device); + + radv_temp_descriptor_set_create(device, cmd_buffer, + device->meta_state.btoi.img_ds_layout, + &tmp->set); + + radv_UpdateDescriptorSets(vk_device, + 2, /* writeCount */ + (VkWriteDescriptorSet[]) { + { + .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, + .dstSet = tmp->set, + .dstBinding = 0, + .dstArrayElement = 0, + .descriptorCount = 1, + .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER, + .pTexelBufferView = (VkBufferView[]) { radv_buffer_view_to_handle(&tmp->src_bview) }, + }, + { + .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, + .dstSet = tmp->set, + .dstBinding = 1, + .dstArrayElement = 0, + .descriptorCount = 1, + .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, + .pImageInfo = (VkDescriptorImageInfo[]) { + { + .sampler = NULL, + .imageView = radv_image_view_to_handle(&tmp->dst_iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + } + } + }, 0, NULL); + + radv_CmdBindDescriptorSets(radv_cmd_buffer_to_handle(cmd_buffer), + VK_PIPELINE_BIND_POINT_COMPUTE, + device->meta_state.btoi.img_p_layout, 0, 1, + &tmp->set, 0, NULL); +} + +static void +btoi_bind_pipeline(struct radv_cmd_buffer *cmd_buffer) +{ + VkPipeline pipeline = + cmd_buffer->device->meta_state.btoi.pipeline; + + if (cmd_buffer->state.compute_pipeline != radv_pipeline_from_handle(pipeline)) { + radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), + VK_PIPELINE_BIND_POINT_COMPUTE, pipeline); + } +} + +void +radv_meta_buffer_to_image_cs(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_blit2d_buffer *src, + struct radv_meta_blit2d_surf *dst, + unsigned num_rects, + struct radv_meta_blit2d_rect *rects) +{ + struct radv_device *device = cmd_buffer->device; + struct btoi_temps temps; + + create_bview(cmd_buffer, src->buffer, src->offset, src->format, &temps.src_bview); + create_iview(cmd_buffer, dst, VK_IMAGE_USAGE_STORAGE_BIT, &temps.dst_iview); + btoi_bind_descriptors(cmd_buffer, &temps); + + btoi_bind_pipeline(cmd_buffer); + + for (unsigned r = 0; r < num_rects; ++r) { + unsigned push_constants[3] = { + rects[r].dst_x, + rects[r].dst_y, + src->pitch + }; + radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer), + device->meta_state.btoi.img_p_layout, + VK_SHADER_STAGE_COMPUTE_BIT, 0, 12, + push_constants); + + radv_unaligned_dispatch(cmd_buffer, rects[r].width, rects[r].height, 1); + } + radv_temp_descriptor_set_destroy(cmd_buffer->device, temps.set); +} + +struct itoi_temps { + struct radv_image_view src_iview; + struct radv_image_view dst_iview; + VkDescriptorSet set; +}; + +static void +itoi_bind_descriptors(struct radv_cmd_buffer *cmd_buffer, + struct itoi_temps *tmp) +{ + struct radv_device *device = cmd_buffer->device; + VkDevice vk_device = radv_device_to_handle(cmd_buffer->device); + + radv_temp_descriptor_set_create(device, cmd_buffer, + device->meta_state.itoi.img_ds_layout, + &tmp->set); + + radv_UpdateDescriptorSets(vk_device, + 2, /* writeCount */ + (VkWriteDescriptorSet[]) { + { + .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, + .dstSet = tmp->set, + .dstBinding = 0, + .dstArrayElement = 0, + .descriptorCount = 1, + .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, + .pImageInfo = (VkDescriptorImageInfo[]) { + { + .sampler = NULL, + .imageView = radv_image_view_to_handle(&tmp->src_iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + } + }, + { + .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, + .dstSet = tmp->set, + .dstBinding = 1, + .dstArrayElement = 0, + .descriptorCount = 1, + .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, + .pImageInfo = (VkDescriptorImageInfo[]) { + { + .sampler = NULL, + .imageView = radv_image_view_to_handle(&tmp->dst_iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + } + } + }, 0, NULL); + + radv_CmdBindDescriptorSets(radv_cmd_buffer_to_handle(cmd_buffer), + VK_PIPELINE_BIND_POINT_COMPUTE, + device->meta_state.itoi.img_p_layout, 0, 1, + &tmp->set, 0, NULL); +} + +static void +itoi_bind_pipeline(struct radv_cmd_buffer *cmd_buffer) +{ + VkPipeline pipeline = + cmd_buffer->device->meta_state.itoi.pipeline; + + if (cmd_buffer->state.compute_pipeline != radv_pipeline_from_handle(pipeline)) { + radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), + VK_PIPELINE_BIND_POINT_COMPUTE, pipeline); + } +} + +void +radv_meta_image_to_image_cs(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_blit2d_surf *src, + struct radv_meta_blit2d_surf *dst, + unsigned num_rects, + struct radv_meta_blit2d_rect *rects) +{ + struct radv_device *device = cmd_buffer->device; + struct itoi_temps temps; + + create_iview(cmd_buffer, src, VK_IMAGE_USAGE_SAMPLED_BIT, &temps.src_iview); + create_iview(cmd_buffer, dst, VK_IMAGE_USAGE_STORAGE_BIT, &temps.dst_iview); + + itoi_bind_descriptors(cmd_buffer, &temps); + + itoi_bind_pipeline(cmd_buffer); + + for (unsigned r = 0; r < num_rects; ++r) { + unsigned push_constants[4] = { + rects[r].src_x, + rects[r].src_y, + rects[r].dst_x, + rects[r].dst_y, + }; + radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer), + device->meta_state.itoi.img_p_layout, + VK_SHADER_STAGE_COMPUTE_BIT, 0, 16, + push_constants); + + radv_unaligned_dispatch(cmd_buffer, rects[r].width, rects[r].height, 1); + } + radv_temp_descriptor_set_destroy(cmd_buffer->device, temps.set); +} + +struct cleari_temps { + struct radv_image_view dst_iview; + VkDescriptorSet set; +}; + +static void +cleari_bind_descriptors(struct radv_cmd_buffer *cmd_buffer, + struct cleari_temps *tmp) +{ + struct radv_device *device = cmd_buffer->device; + VkDevice vk_device = radv_device_to_handle(cmd_buffer->device); + + radv_temp_descriptor_set_create(device, cmd_buffer, + device->meta_state.cleari.img_ds_layout, + &tmp->set); + + radv_UpdateDescriptorSets(vk_device, + 1, /* writeCount */ + (VkWriteDescriptorSet[]) { + { + .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, + .dstSet = tmp->set, + .dstBinding = 0, + .dstArrayElement = 0, + .descriptorCount = 1, + .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, + .pImageInfo = (VkDescriptorImageInfo[]) { + { + .sampler = NULL, + .imageView = radv_image_view_to_handle(&tmp->dst_iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + } + }, + }, 0, NULL); + + radv_CmdBindDescriptorSets(radv_cmd_buffer_to_handle(cmd_buffer), + VK_PIPELINE_BIND_POINT_COMPUTE, + device->meta_state.cleari.img_p_layout, 0, 1, + &tmp->set, 0, NULL); +} + +static void +cleari_bind_pipeline(struct radv_cmd_buffer *cmd_buffer) +{ + VkPipeline pipeline = + cmd_buffer->device->meta_state.cleari.pipeline; + + if (cmd_buffer->state.compute_pipeline != radv_pipeline_from_handle(pipeline)) { + radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), + VK_PIPELINE_BIND_POINT_COMPUTE, pipeline); + } +} + +void +radv_meta_clear_image_cs(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_blit2d_surf *dst, + const VkClearColorValue *clear_color) +{ + struct radv_device *device = cmd_buffer->device; + struct cleari_temps temps; + + create_iview(cmd_buffer, dst, VK_IMAGE_USAGE_STORAGE_BIT, &temps.dst_iview); + cleari_bind_descriptors(cmd_buffer, &temps); + + cleari_bind_pipeline(cmd_buffer); + + unsigned push_constants[4] = { + clear_color->uint32[0], + clear_color->uint32[1], + clear_color->uint32[2], + clear_color->uint32[3], + }; + + radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer), + device->meta_state.cleari.img_p_layout, + VK_SHADER_STAGE_COMPUTE_BIT, 0, 16, + push_constants); + + radv_unaligned_dispatch(cmd_buffer, dst->image->extent.width, dst->image->extent.height, 1); + radv_temp_descriptor_set_destroy(cmd_buffer->device, temps.set); +} diff -Nru mesa-12.0.6/src/amd/vulkan/radv_meta.c mesa-17.0.7/src/amd/vulkan/radv_meta.c --- mesa-12.0.6/src/amd/vulkan/radv_meta.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_meta.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,388 @@ +/* + * Copyright © 2016 Red Hat + * based on intel anv code: + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "radv_meta.h" + +#include +#include +#include +#include + +void +radv_meta_save(struct radv_meta_saved_state *state, + const struct radv_cmd_buffer *cmd_buffer, + uint32_t dynamic_mask) +{ + state->old_pipeline = cmd_buffer->state.pipeline; + state->old_descriptor_set0 = cmd_buffer->state.descriptors[0]; + memcpy(state->old_vertex_bindings, cmd_buffer->state.vertex_bindings, + sizeof(state->old_vertex_bindings)); + + state->dynamic_mask = dynamic_mask; + radv_dynamic_state_copy(&state->dynamic, &cmd_buffer->state.dynamic, + dynamic_mask); + + memcpy(state->push_constants, cmd_buffer->push_constants, MAX_PUSH_CONSTANTS_SIZE); +} + +void +radv_meta_restore(const struct radv_meta_saved_state *state, + struct radv_cmd_buffer *cmd_buffer) +{ + cmd_buffer->state.pipeline = state->old_pipeline; + radv_bind_descriptor_set(cmd_buffer, state->old_descriptor_set0, 0); + memcpy(cmd_buffer->state.vertex_bindings, state->old_vertex_bindings, + sizeof(state->old_vertex_bindings)); + + cmd_buffer->state.vb_dirty |= (1 << RADV_META_VERTEX_BINDING_COUNT) - 1; + cmd_buffer->state.dirty |= RADV_CMD_DIRTY_PIPELINE; + + radv_dynamic_state_copy(&cmd_buffer->state.dynamic, &state->dynamic, + state->dynamic_mask); + cmd_buffer->state.dirty |= state->dynamic_mask; + + memcpy(cmd_buffer->push_constants, state->push_constants, MAX_PUSH_CONSTANTS_SIZE); + cmd_buffer->push_constant_stages |= VK_SHADER_STAGE_ALL_GRAPHICS | VK_SHADER_STAGE_COMPUTE_BIT; +} + +void +radv_meta_save_pass(struct radv_meta_saved_pass_state *state, + const struct radv_cmd_buffer *cmd_buffer) +{ + state->pass = cmd_buffer->state.pass; + state->subpass = cmd_buffer->state.subpass; + state->framebuffer = cmd_buffer->state.framebuffer; + state->attachments = cmd_buffer->state.attachments; + state->render_area = cmd_buffer->state.render_area; +} + +void +radv_meta_restore_pass(const struct radv_meta_saved_pass_state *state, + struct radv_cmd_buffer *cmd_buffer) +{ + cmd_buffer->state.pass = state->pass; + cmd_buffer->state.subpass = state->subpass; + cmd_buffer->state.framebuffer = state->framebuffer; + cmd_buffer->state.attachments = state->attachments; + cmd_buffer->state.render_area = state->render_area; + if (state->subpass) + radv_emit_framebuffer_state(cmd_buffer); +} + +void +radv_meta_save_compute(struct radv_meta_saved_compute_state *state, + const struct radv_cmd_buffer *cmd_buffer, + unsigned push_constant_size) +{ + state->old_pipeline = cmd_buffer->state.compute_pipeline; + state->old_descriptor_set0 = cmd_buffer->state.descriptors[0]; + + if (push_constant_size) + memcpy(state->push_constants, cmd_buffer->push_constants, push_constant_size); +} + +void +radv_meta_restore_compute(const struct radv_meta_saved_compute_state *state, + struct radv_cmd_buffer *cmd_buffer, + unsigned push_constant_size) +{ + radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_COMPUTE, + radv_pipeline_to_handle(state->old_pipeline)); + radv_bind_descriptor_set(cmd_buffer, state->old_descriptor_set0, 0); + + if (push_constant_size) { + memcpy(cmd_buffer->push_constants, state->push_constants, push_constant_size); + cmd_buffer->push_constant_stages |= VK_SHADER_STAGE_COMPUTE_BIT; + } +} + +VkImageViewType +radv_meta_get_view_type(const struct radv_image *image) +{ + switch (image->type) { + case VK_IMAGE_TYPE_1D: return VK_IMAGE_VIEW_TYPE_1D; + case VK_IMAGE_TYPE_2D: return VK_IMAGE_VIEW_TYPE_2D; + case VK_IMAGE_TYPE_3D: return VK_IMAGE_VIEW_TYPE_3D; + default: + unreachable("bad VkImageViewType"); + } +} + +/** + * When creating a destination VkImageView, this function provides the needed + * VkImageViewCreateInfo::subresourceRange::baseArrayLayer. + */ +uint32_t +radv_meta_get_iview_layer(const struct radv_image *dest_image, + const VkImageSubresourceLayers *dest_subresource, + const VkOffset3D *dest_offset) +{ + switch (dest_image->type) { + case VK_IMAGE_TYPE_1D: + case VK_IMAGE_TYPE_2D: + return dest_subresource->baseArrayLayer; + case VK_IMAGE_TYPE_3D: + /* HACK: Vulkan does not allow attaching a 3D image to a framebuffer, + * but meta does it anyway. When doing so, we translate the + * destination's z offset into an array offset. + */ + return dest_offset->z; + default: + assert(!"bad VkImageType"); + return 0; + } +} + +static void * +meta_alloc(void* _device, size_t size, size_t alignment, + VkSystemAllocationScope allocationScope) +{ + struct radv_device *device = _device; + return device->alloc.pfnAllocation(device->alloc.pUserData, size, alignment, + VK_SYSTEM_ALLOCATION_SCOPE_DEVICE); +} + +static void * +meta_realloc(void* _device, void *original, size_t size, size_t alignment, + VkSystemAllocationScope allocationScope) +{ + struct radv_device *device = _device; + return device->alloc.pfnReallocation(device->alloc.pUserData, original, + size, alignment, + VK_SYSTEM_ALLOCATION_SCOPE_DEVICE); +} + +static void +meta_free(void* _device, void *data) +{ + struct radv_device *device = _device; + return device->alloc.pfnFree(device->alloc.pUserData, data); +} + +static bool +radv_builtin_cache_path(char *path) +{ + char *xdg_cache_home = getenv("XDG_CACHE_HOME"); + const char *suffix = "/radv_builtin_shaders"; + const char *suffix2 = "/.cache/radv_builtin_shaders"; + struct passwd pwd, *result; + char path2[PATH_MAX + 1]; /* PATH_MAX is not a real max,but suffices here. */ + + if (xdg_cache_home) { + + if (strlen(xdg_cache_home) + strlen(suffix) > PATH_MAX) + return false; + + strcpy(path, xdg_cache_home); + strcat(path, suffix); + return true; + } + + getpwuid_r(getuid(), &pwd, path2, PATH_MAX - strlen(suffix2), &result); + if (!result) + return false; + + strcpy(path, pwd.pw_dir); + strcat(path, "/.cache"); + mkdir(path, 0755); + + strcat(path, suffix); + return true; +} + +static void +radv_load_meta_pipeline(struct radv_device *device) +{ + char path[PATH_MAX + 1]; + struct stat st; + void *data = NULL; + + if (!radv_builtin_cache_path(path)) + return; + + int fd = open(path, O_RDONLY); + if (fd < 0) + return; + if (fstat(fd, &st)) + goto fail; + data = malloc(st.st_size); + if (!data) + goto fail; + if(read(fd, data, st.st_size) == -1) + goto fail; + + radv_pipeline_cache_load(&device->meta_state.cache, data, st.st_size); +fail: + free(data); + close(fd); +} + +static void +radv_store_meta_pipeline(struct radv_device *device) +{ + char path[PATH_MAX + 1], path2[PATH_MAX + 7]; + size_t size; + void *data = NULL; + + if (!device->meta_state.cache.modified) + return; + + if (radv_GetPipelineCacheData(radv_device_to_handle(device), + radv_pipeline_cache_to_handle(&device->meta_state.cache), + &size, NULL)) + return; + + if (!radv_builtin_cache_path(path)) + return; + + strcpy(path2, path); + strcat(path2, "XXXXXX"); + int fd = mkstemp(path2);//open(path, O_WRONLY | O_CREAT, 0600); + if (fd < 0) + return; + data = malloc(size); + if (!data) + goto fail; + + if (radv_GetPipelineCacheData(radv_device_to_handle(device), + radv_pipeline_cache_to_handle(&device->meta_state.cache), + &size, data)) + goto fail; + if(write(fd, data, size) == -1) + goto fail; + + rename(path2, path); +fail: + free(data); + close(fd); + unlink(path2); +} + +VkResult +radv_device_init_meta(struct radv_device *device) +{ + VkResult result; + + device->meta_state.alloc = (VkAllocationCallbacks) { + .pUserData = device, + .pfnAllocation = meta_alloc, + .pfnReallocation = meta_realloc, + .pfnFree = meta_free, + }; + + device->meta_state.cache.alloc = device->meta_state.alloc; + radv_pipeline_cache_init(&device->meta_state.cache, device); + radv_load_meta_pipeline(device); + + result = radv_device_init_meta_clear_state(device); + if (result != VK_SUCCESS) + goto fail_clear; + + result = radv_device_init_meta_resolve_state(device); + if (result != VK_SUCCESS) + goto fail_resolve; + + result = radv_device_init_meta_blit_state(device); + if (result != VK_SUCCESS) + goto fail_blit; + + result = radv_device_init_meta_blit2d_state(device); + if (result != VK_SUCCESS) + goto fail_blit2d; + + result = radv_device_init_meta_bufimage_state(device); + if (result != VK_SUCCESS) + goto fail_bufimage; + + result = radv_device_init_meta_depth_decomp_state(device); + if (result != VK_SUCCESS) + goto fail_depth_decomp; + + result = radv_device_init_meta_buffer_state(device); + if (result != VK_SUCCESS) + goto fail_buffer; + + result = radv_device_init_meta_fast_clear_flush_state(device); + if (result != VK_SUCCESS) + goto fail_fast_clear; + + result = radv_device_init_meta_resolve_compute_state(device); + if (result != VK_SUCCESS) + goto fail_resolve_compute; + return VK_SUCCESS; + +fail_resolve_compute: + radv_device_finish_meta_fast_clear_flush_state(device); +fail_fast_clear: + radv_device_finish_meta_buffer_state(device); +fail_buffer: + radv_device_finish_meta_depth_decomp_state(device); +fail_depth_decomp: + radv_device_finish_meta_bufimage_state(device); +fail_bufimage: + radv_device_finish_meta_blit2d_state(device); +fail_blit2d: + radv_device_finish_meta_blit_state(device); +fail_blit: + radv_device_finish_meta_resolve_state(device); +fail_resolve: + radv_device_finish_meta_clear_state(device); +fail_clear: + radv_pipeline_cache_finish(&device->meta_state.cache); + return result; +} + +void +radv_device_finish_meta(struct radv_device *device) +{ + radv_device_finish_meta_clear_state(device); + radv_device_finish_meta_resolve_state(device); + radv_device_finish_meta_blit_state(device); + radv_device_finish_meta_blit2d_state(device); + radv_device_finish_meta_bufimage_state(device); + radv_device_finish_meta_depth_decomp_state(device); + radv_device_finish_meta_buffer_state(device); + radv_device_finish_meta_fast_clear_flush_state(device); + radv_device_finish_meta_resolve_compute_state(device); + + radv_store_meta_pipeline(device); + radv_pipeline_cache_finish(&device->meta_state.cache); +} + +/* + * The most common meta operations all want to have the viewport + * reset and any scissors disabled. The rest of the dynamic state + * should have no effect. + */ +void +radv_meta_save_graphics_reset_vport_scissor(struct radv_meta_saved_state *saved_state, + struct radv_cmd_buffer *cmd_buffer) +{ + uint32_t dirty_state = (1 << VK_DYNAMIC_STATE_VIEWPORT) | (1 << VK_DYNAMIC_STATE_SCISSOR); + radv_meta_save(saved_state, cmd_buffer, dirty_state); + cmd_buffer->state.dynamic.viewport.count = 0; + cmd_buffer->state.dynamic.scissor.count = 0; + cmd_buffer->state.dirty |= dirty_state; +} diff -Nru mesa-12.0.6/src/amd/vulkan/radv_meta_clear.c mesa-17.0.7/src/amd/vulkan/radv_meta_clear.c --- mesa-12.0.6/src/amd/vulkan/radv_meta_clear.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_meta_clear.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,1264 @@ +/* + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "radv_meta.h" +#include "radv_private.h" +#include "nir/nir_builder.h" + +#include "util/format_rgb9e5.h" +#include "vk_format.h" +/** Vertex attributes for color clears. */ +struct color_clear_vattrs { + float position[2]; + VkClearColorValue color; +}; + +/** Vertex attributes for depthstencil clears. */ +struct depthstencil_clear_vattrs { + float position[2]; + float depth_clear; +}; + +enum { + DEPTH_CLEAR_SLOW, + DEPTH_CLEAR_FAST_EXPCLEAR, + DEPTH_CLEAR_FAST_NO_EXPCLEAR +}; + +static void +build_color_shaders(struct nir_shader **out_vs, + struct nir_shader **out_fs, + uint32_t frag_output) +{ + nir_builder vs_b; + nir_builder fs_b; + + nir_builder_init_simple_shader(&vs_b, NULL, MESA_SHADER_VERTEX, NULL); + nir_builder_init_simple_shader(&fs_b, NULL, MESA_SHADER_FRAGMENT, NULL); + + vs_b.shader->info->name = ralloc_strdup(vs_b.shader, "meta_clear_color_vs"); + fs_b.shader->info->name = ralloc_strdup(fs_b.shader, "meta_clear_color_fs"); + + const struct glsl_type *position_type = glsl_vec4_type(); + const struct glsl_type *color_type = glsl_vec4_type(); + + nir_variable *vs_in_pos = + nir_variable_create(vs_b.shader, nir_var_shader_in, position_type, + "a_position"); + vs_in_pos->data.location = VERT_ATTRIB_GENERIC0; + + nir_variable *vs_out_pos = + nir_variable_create(vs_b.shader, nir_var_shader_out, position_type, + "gl_Position"); + vs_out_pos->data.location = VARYING_SLOT_POS; + + nir_variable *vs_in_color = + nir_variable_create(vs_b.shader, nir_var_shader_in, color_type, + "a_color"); + vs_in_color->data.location = VERT_ATTRIB_GENERIC1; + + nir_variable *vs_out_color = + nir_variable_create(vs_b.shader, nir_var_shader_out, color_type, + "v_color"); + vs_out_color->data.location = VARYING_SLOT_VAR0; + vs_out_color->data.interpolation = INTERP_MODE_FLAT; + + nir_variable *fs_in_color = + nir_variable_create(fs_b.shader, nir_var_shader_in, color_type, + "v_color"); + fs_in_color->data.location = vs_out_color->data.location; + fs_in_color->data.interpolation = vs_out_color->data.interpolation; + + nir_variable *fs_out_color = + nir_variable_create(fs_b.shader, nir_var_shader_out, color_type, + "f_color"); + fs_out_color->data.location = FRAG_RESULT_DATA0 + frag_output; + + nir_copy_var(&vs_b, vs_out_pos, vs_in_pos); + nir_copy_var(&vs_b, vs_out_color, vs_in_color); + nir_copy_var(&fs_b, fs_out_color, fs_in_color); + + const struct glsl_type *layer_type = glsl_int_type(); + nir_variable *vs_out_layer = + nir_variable_create(vs_b.shader, nir_var_shader_out, layer_type, + "v_layer"); + vs_out_layer->data.location = VARYING_SLOT_LAYER; + vs_out_layer->data.interpolation = INTERP_MODE_FLAT; + nir_ssa_def *inst_id = nir_load_system_value(&vs_b, nir_intrinsic_load_instance_id, 0); + + nir_store_var(&vs_b, vs_out_layer, inst_id, 0x1); + + *out_vs = vs_b.shader; + *out_fs = fs_b.shader; +} + +static VkResult +create_pipeline(struct radv_device *device, + struct radv_render_pass *render_pass, + uint32_t samples, + struct nir_shader *vs_nir, + struct nir_shader *fs_nir, + const VkPipelineVertexInputStateCreateInfo *vi_state, + const VkPipelineDepthStencilStateCreateInfo *ds_state, + const VkPipelineColorBlendStateCreateInfo *cb_state, + const struct radv_graphics_pipeline_create_info *extra, + const VkAllocationCallbacks *alloc, + struct radv_pipeline **pipeline) +{ + VkDevice device_h = radv_device_to_handle(device); + VkResult result; + + struct radv_shader_module vs_m = { .nir = vs_nir }; + struct radv_shader_module fs_m = { .nir = fs_nir }; + + VkPipeline pipeline_h = VK_NULL_HANDLE; + result = radv_graphics_pipeline_create(device_h, + radv_pipeline_cache_to_handle(&device->meta_state.cache), + &(VkGraphicsPipelineCreateInfo) { + .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO, + .stageCount = fs_nir ? 2 : 1, + .pStages = (VkPipelineShaderStageCreateInfo[]) { + { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_VERTEX_BIT, + .module = radv_shader_module_to_handle(&vs_m), + .pName = "main", + }, + { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_FRAGMENT_BIT, + .module = radv_shader_module_to_handle(&fs_m), + .pName = "main", + }, + }, + .pVertexInputState = vi_state, + .pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO, + .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP, + .primitiveRestartEnable = false, + }, + .pViewportState = &(VkPipelineViewportStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO, + .viewportCount = 0, + .scissorCount = 0, + }, + .pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO, + .rasterizerDiscardEnable = false, + .polygonMode = VK_POLYGON_MODE_FILL, + .cullMode = VK_CULL_MODE_NONE, + .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE, + .depthBiasEnable = false, + }, + .pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO, + .rasterizationSamples = samples, + .sampleShadingEnable = false, + .pSampleMask = NULL, + .alphaToCoverageEnable = false, + .alphaToOneEnable = false, + }, + .pDepthStencilState = ds_state, + .pColorBlendState = cb_state, + .pDynamicState = &(VkPipelineDynamicStateCreateInfo) { + /* The meta clear pipeline declares all state as dynamic. + * As a consequence, vkCmdBindPipeline writes no dynamic state + * to the cmd buffer. Therefore, at the end of the meta clear, + * we need only restore dynamic state was vkCmdSet. + */ + .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO, + .dynamicStateCount = 6, + .pDynamicStates = (VkDynamicState[]) { + /* Everything except stencil write mask */ + VK_DYNAMIC_STATE_LINE_WIDTH, + VK_DYNAMIC_STATE_DEPTH_BIAS, + VK_DYNAMIC_STATE_BLEND_CONSTANTS, + VK_DYNAMIC_STATE_DEPTH_BOUNDS, + VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK, + VK_DYNAMIC_STATE_STENCIL_REFERENCE, + }, + }, + .flags = 0, + .renderPass = radv_render_pass_to_handle(render_pass), + .subpass = 0, + }, + extra, + alloc, + &pipeline_h); + + ralloc_free(vs_nir); + ralloc_free(fs_nir); + + *pipeline = radv_pipeline_from_handle(pipeline_h); + + return result; +} + +static VkResult +create_color_renderpass(struct radv_device *device, + VkFormat vk_format, + uint32_t samples, + VkRenderPass *pass) +{ + return radv_CreateRenderPass(radv_device_to_handle(device), + &(VkRenderPassCreateInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO, + .attachmentCount = 1, + .pAttachments = &(VkAttachmentDescription) { + .format = vk_format, + .samples = samples, + .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD, + .storeOp = VK_ATTACHMENT_STORE_OP_STORE, + .initialLayout = VK_IMAGE_LAYOUT_GENERAL, + .finalLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + .subpassCount = 1, + .pSubpasses = &(VkSubpassDescription) { + .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS, + .inputAttachmentCount = 0, + .colorAttachmentCount = 1, + .pColorAttachments = &(VkAttachmentReference) { + .attachment = 0, + .layout = VK_IMAGE_LAYOUT_GENERAL, + }, + .pResolveAttachments = NULL, + .pDepthStencilAttachment = &(VkAttachmentReference) { + .attachment = VK_ATTACHMENT_UNUSED, + .layout = VK_IMAGE_LAYOUT_GENERAL, + }, + .preserveAttachmentCount = 1, + .pPreserveAttachments = (uint32_t[]) { 0 }, + }, + .dependencyCount = 0, + }, &device->meta_state.alloc, pass); +} + +static VkResult +create_color_pipeline(struct radv_device *device, + uint32_t samples, + uint32_t frag_output, + struct radv_pipeline **pipeline, + VkRenderPass pass) +{ + struct nir_shader *vs_nir; + struct nir_shader *fs_nir; + VkResult result; + build_color_shaders(&vs_nir, &fs_nir, frag_output); + + const VkPipelineVertexInputStateCreateInfo vi_state = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO, + .vertexBindingDescriptionCount = 1, + .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) { + { + .binding = 0, + .stride = sizeof(struct color_clear_vattrs), + .inputRate = VK_VERTEX_INPUT_RATE_VERTEX + }, + }, + .vertexAttributeDescriptionCount = 2, + .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) { + { + /* Position */ + .location = 0, + .binding = 0, + .format = VK_FORMAT_R32G32_SFLOAT, + .offset = offsetof(struct color_clear_vattrs, position), + }, + { + /* Color */ + .location = 1, + .binding = 0, + .format = VK_FORMAT_R32G32B32A32_SFLOAT, + .offset = offsetof(struct color_clear_vattrs, color), + }, + }, + }; + + const VkPipelineDepthStencilStateCreateInfo ds_state = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO, + .depthTestEnable = false, + .depthWriteEnable = false, + .depthBoundsTestEnable = false, + .stencilTestEnable = false, + }; + + VkPipelineColorBlendAttachmentState blend_attachment_state[MAX_RTS] = { 0 }; + blend_attachment_state[frag_output] = (VkPipelineColorBlendAttachmentState) { + .blendEnable = false, + .colorWriteMask = VK_COLOR_COMPONENT_A_BIT | + VK_COLOR_COMPONENT_R_BIT | + VK_COLOR_COMPONENT_G_BIT | + VK_COLOR_COMPONENT_B_BIT, + }; + + const VkPipelineColorBlendStateCreateInfo cb_state = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO, + .logicOpEnable = false, + .attachmentCount = MAX_RTS, + .pAttachments = blend_attachment_state + }; + + + struct radv_graphics_pipeline_create_info extra = { + .use_rectlist = true, + }; + result = create_pipeline(device, radv_render_pass_from_handle(pass), + samples, vs_nir, fs_nir, &vi_state, &ds_state, &cb_state, + &extra, &device->meta_state.alloc, pipeline); + + return result; +} + +static void +destroy_pipeline(struct radv_device *device, struct radv_pipeline *pipeline) +{ + if (!pipeline) + return; + + radv_DestroyPipeline(radv_device_to_handle(device), + radv_pipeline_to_handle(pipeline), + &device->meta_state.alloc); + +} + +static void +destroy_render_pass(struct radv_device *device, VkRenderPass renderpass) +{ + radv_DestroyRenderPass(radv_device_to_handle(device), renderpass, + &device->meta_state.alloc); +} + +void +radv_device_finish_meta_clear_state(struct radv_device *device) +{ + struct radv_meta_state *state = &device->meta_state; + + for (uint32_t i = 0; i < ARRAY_SIZE(state->clear); ++i) { + for (uint32_t j = 0; j < ARRAY_SIZE(state->clear[i].color_pipelines); ++j) { + destroy_pipeline(device, state->clear[i].color_pipelines[j]); + destroy_render_pass(device, state->clear[i].render_pass[j]); + } + + for (uint32_t j = 0; j < NUM_DEPTH_CLEAR_PIPELINES; j++) { + destroy_pipeline(device, state->clear[i].depth_only_pipeline[j]); + destroy_pipeline(device, state->clear[i].stencil_only_pipeline[j]); + destroy_pipeline(device, state->clear[i].depthstencil_pipeline[j]); + } + destroy_render_pass(device, state->clear[i].depthstencil_rp); + } + +} + +static void +emit_color_clear(struct radv_cmd_buffer *cmd_buffer, + const VkClearAttachment *clear_att, + const VkClearRect *clear_rect) +{ + struct radv_device *device = cmd_buffer->device; + const struct radv_subpass *subpass = cmd_buffer->state.subpass; + const struct radv_framebuffer *fb = cmd_buffer->state.framebuffer; + const uint32_t subpass_att = clear_att->colorAttachment; + const uint32_t pass_att = subpass->color_attachments[subpass_att].attachment; + const struct radv_image_view *iview = fb->attachments[pass_att].attachment; + const uint32_t samples = iview->image->samples; + const uint32_t samples_log2 = ffs(samples) - 1; + unsigned fs_key = radv_format_meta_fs_key(iview->vk_format); + struct radv_pipeline *pipeline; + VkClearColorValue clear_value = clear_att->clearValue.color; + VkCommandBuffer cmd_buffer_h = radv_cmd_buffer_to_handle(cmd_buffer); + VkPipeline pipeline_h; + uint32_t offset; + + if (fs_key == -1) { + radv_finishme("color clears incomplete"); + return; + } + pipeline = device->meta_state.clear[samples_log2].color_pipelines[fs_key]; + pipeline_h = radv_pipeline_to_handle(pipeline); + + if (!pipeline) { + radv_finishme("color clears incomplete"); + return; + } + assert(samples_log2 < ARRAY_SIZE(device->meta_state.clear)); + assert(pipeline); + assert(clear_att->aspectMask == VK_IMAGE_ASPECT_COLOR_BIT); + assert(clear_att->colorAttachment < subpass->color_count); + + const struct color_clear_vattrs vertex_data[3] = { + { + .position = { + clear_rect->rect.offset.x, + clear_rect->rect.offset.y, + }, + .color = clear_value, + }, + { + .position = { + clear_rect->rect.offset.x, + clear_rect->rect.offset.y + clear_rect->rect.extent.height, + }, + .color = clear_value, + }, + { + .position = { + clear_rect->rect.offset.x + clear_rect->rect.extent.width, + clear_rect->rect.offset.y, + }, + .color = clear_value, + }, + }; + + struct radv_subpass clear_subpass = { + .color_count = 1, + .color_attachments = (VkAttachmentReference[]) { + subpass->color_attachments[clear_att->colorAttachment] + }, + .depth_stencil_attachment = (VkAttachmentReference) { VK_ATTACHMENT_UNUSED, VK_IMAGE_LAYOUT_UNDEFINED } + }; + + radv_cmd_buffer_set_subpass(cmd_buffer, &clear_subpass, false); + + radv_cmd_buffer_upload_data(cmd_buffer, sizeof(vertex_data), 16, vertex_data, &offset); + struct radv_buffer vertex_buffer = { + .device = device, + .size = sizeof(vertex_data), + .bo = cmd_buffer->upload.upload_bo, + .offset = offset, + }; + + + radv_CmdBindVertexBuffers(cmd_buffer_h, 0, 1, + (VkBuffer[]) { radv_buffer_to_handle(&vertex_buffer) }, + (VkDeviceSize[]) { 0 }); + + if (cmd_buffer->state.pipeline != pipeline) { + radv_CmdBindPipeline(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS, + pipeline_h); + } + + radv_CmdDraw(cmd_buffer_h, 3, clear_rect->layerCount, 0, 0); + + radv_cmd_buffer_set_subpass(cmd_buffer, subpass, false); +} + + +static void +build_depthstencil_shader(struct nir_shader **out_vs, struct nir_shader **out_fs) +{ + nir_builder vs_b, fs_b; + + nir_builder_init_simple_shader(&vs_b, NULL, MESA_SHADER_VERTEX, NULL); + nir_builder_init_simple_shader(&fs_b, NULL, MESA_SHADER_FRAGMENT, NULL); + + vs_b.shader->info->name = ralloc_strdup(vs_b.shader, "meta_clear_depthstencil_vs"); + fs_b.shader->info->name = ralloc_strdup(fs_b.shader, "meta_clear_depthstencil_fs"); + const struct glsl_type *position_type = glsl_vec4_type(); + + nir_variable *vs_in_pos = + nir_variable_create(vs_b.shader, nir_var_shader_in, position_type, + "a_position"); + vs_in_pos->data.location = VERT_ATTRIB_GENERIC0; + + nir_variable *vs_out_pos = + nir_variable_create(vs_b.shader, nir_var_shader_out, position_type, + "gl_Position"); + vs_out_pos->data.location = VARYING_SLOT_POS; + + nir_copy_var(&vs_b, vs_out_pos, vs_in_pos); + + const struct glsl_type *layer_type = glsl_int_type(); + nir_variable *vs_out_layer = + nir_variable_create(vs_b.shader, nir_var_shader_out, layer_type, + "v_layer"); + vs_out_layer->data.location = VARYING_SLOT_LAYER; + vs_out_layer->data.interpolation = INTERP_MODE_FLAT; + nir_ssa_def *inst_id = nir_load_system_value(&vs_b, nir_intrinsic_load_instance_id, 0); + nir_store_var(&vs_b, vs_out_layer, inst_id, 0x1); + + *out_vs = vs_b.shader; + *out_fs = fs_b.shader; +} + +static VkResult +create_depthstencil_renderpass(struct radv_device *device, + uint32_t samples, + VkRenderPass *render_pass) +{ + return radv_CreateRenderPass(radv_device_to_handle(device), + &(VkRenderPassCreateInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO, + .attachmentCount = 1, + .pAttachments = &(VkAttachmentDescription) { + .format = VK_FORMAT_UNDEFINED, + .samples = samples, + .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD, + .storeOp = VK_ATTACHMENT_STORE_OP_STORE, + .initialLayout = VK_IMAGE_LAYOUT_GENERAL, + .finalLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + .subpassCount = 1, + .pSubpasses = &(VkSubpassDescription) { + .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS, + .inputAttachmentCount = 0, + .colorAttachmentCount = 0, + .pColorAttachments = NULL, + .pResolveAttachments = NULL, + .pDepthStencilAttachment = &(VkAttachmentReference) { + .attachment = 0, + .layout = VK_IMAGE_LAYOUT_GENERAL, + }, + .preserveAttachmentCount = 1, + .pPreserveAttachments = (uint32_t[]) { 0 }, + }, + .dependencyCount = 0, + }, &device->meta_state.alloc, render_pass); +} + +static VkResult +create_depthstencil_pipeline(struct radv_device *device, + VkImageAspectFlags aspects, + uint32_t samples, + int index, + struct radv_pipeline **pipeline, + VkRenderPass render_pass) +{ + struct nir_shader *vs_nir, *fs_nir; + VkResult result; + build_depthstencil_shader(&vs_nir, &fs_nir); + + const VkPipelineVertexInputStateCreateInfo vi_state = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO, + .vertexBindingDescriptionCount = 1, + .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) { + { + .binding = 0, + .stride = sizeof(struct depthstencil_clear_vattrs), + .inputRate = VK_VERTEX_INPUT_RATE_VERTEX + }, + }, + .vertexAttributeDescriptionCount = 1, + .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) { + { + /* Position */ + .location = 0, + .binding = 0, + .format = VK_FORMAT_R32G32B32_SFLOAT, + .offset = offsetof(struct depthstencil_clear_vattrs, position), + }, + }, + }; + + const VkPipelineDepthStencilStateCreateInfo ds_state = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO, + .depthTestEnable = (aspects & VK_IMAGE_ASPECT_DEPTH_BIT), + .depthCompareOp = VK_COMPARE_OP_ALWAYS, + .depthWriteEnable = (aspects & VK_IMAGE_ASPECT_DEPTH_BIT), + .depthBoundsTestEnable = false, + .stencilTestEnable = (aspects & VK_IMAGE_ASPECT_STENCIL_BIT), + .front = { + .passOp = VK_STENCIL_OP_REPLACE, + .compareOp = VK_COMPARE_OP_ALWAYS, + .writeMask = UINT32_MAX, + .reference = 0, /* dynamic */ + }, + .back = { 0 /* dont care */ }, + }; + + const VkPipelineColorBlendStateCreateInfo cb_state = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO, + .logicOpEnable = false, + .attachmentCount = 0, + .pAttachments = NULL, + }; + + struct radv_graphics_pipeline_create_info extra = { + .use_rectlist = true, + }; + + if (aspects & VK_IMAGE_ASPECT_DEPTH_BIT) { + extra.db_depth_clear = index == DEPTH_CLEAR_SLOW ? false : true; + extra.db_depth_disable_expclear = index == DEPTH_CLEAR_FAST_NO_EXPCLEAR ? true : false; + } + if (aspects & VK_IMAGE_ASPECT_STENCIL_BIT) { + extra.db_stencil_clear = index == DEPTH_CLEAR_SLOW ? false : true; + extra.db_stencil_disable_expclear = index == DEPTH_CLEAR_FAST_NO_EXPCLEAR ? true : false; + } + result = create_pipeline(device, radv_render_pass_from_handle(render_pass), + samples, vs_nir, fs_nir, &vi_state, &ds_state, &cb_state, + &extra, &device->meta_state.alloc, pipeline); + return result; +} + +static bool depth_view_can_fast_clear(const struct radv_image_view *iview, + VkImageLayout layout, + const VkClearRect *clear_rect) +{ + if (clear_rect->rect.offset.x || clear_rect->rect.offset.y || + clear_rect->rect.extent.width != iview->extent.width || + clear_rect->rect.extent.height != iview->extent.height) + return false; + if (iview->image->htile.size && + iview->base_mip == 0 && + iview->base_layer == 0 && + radv_layout_can_expclear(iview->image, layout) && + memcmp(&iview->extent, &iview->image->extent, sizeof(iview->extent)) == 0) + return true; + return false; +} + +static struct radv_pipeline * +pick_depthstencil_pipeline(struct radv_meta_state *meta_state, + const struct radv_image_view *iview, + int samples_log2, + VkImageAspectFlags aspects, + VkImageLayout layout, + const VkClearRect *clear_rect, + VkClearDepthStencilValue clear_value) +{ + bool fast = depth_view_can_fast_clear(iview, layout, clear_rect); + int index = DEPTH_CLEAR_SLOW; + + if (fast) { + /* we don't know the previous clear values, so we always have + * the NO_EXPCLEAR path */ + index = DEPTH_CLEAR_FAST_NO_EXPCLEAR; + } + + switch (aspects) { + case VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT: + return meta_state->clear[samples_log2].depthstencil_pipeline[index]; + case VK_IMAGE_ASPECT_DEPTH_BIT: + return meta_state->clear[samples_log2].depth_only_pipeline[index]; + case VK_IMAGE_ASPECT_STENCIL_BIT: + return meta_state->clear[samples_log2].stencil_only_pipeline[index]; + } + unreachable("expected depth or stencil aspect"); +} + +static void +emit_depthstencil_clear(struct radv_cmd_buffer *cmd_buffer, + const VkClearAttachment *clear_att, + const VkClearRect *clear_rect) +{ + struct radv_device *device = cmd_buffer->device; + struct radv_meta_state *meta_state = &device->meta_state; + const struct radv_subpass *subpass = cmd_buffer->state.subpass; + const struct radv_framebuffer *fb = cmd_buffer->state.framebuffer; + const uint32_t pass_att = subpass->depth_stencil_attachment.attachment; + VkClearDepthStencilValue clear_value = clear_att->clearValue.depthStencil; + VkImageAspectFlags aspects = clear_att->aspectMask; + const struct radv_image_view *iview = fb->attachments[pass_att].attachment; + const uint32_t samples = iview->image->samples; + const uint32_t samples_log2 = ffs(samples) - 1; + VkCommandBuffer cmd_buffer_h = radv_cmd_buffer_to_handle(cmd_buffer); + uint32_t offset; + + assert(aspects == VK_IMAGE_ASPECT_DEPTH_BIT || + aspects == VK_IMAGE_ASPECT_STENCIL_BIT || + aspects == (VK_IMAGE_ASPECT_DEPTH_BIT | + VK_IMAGE_ASPECT_STENCIL_BIT)); + assert(pass_att != VK_ATTACHMENT_UNUSED); + + const struct depthstencil_clear_vattrs vertex_data[3] = { + { + .position = { + clear_rect->rect.offset.x, + clear_rect->rect.offset.y, + }, + .depth_clear = clear_value.depth, + }, + { + .position = { + clear_rect->rect.offset.x, + clear_rect->rect.offset.y + clear_rect->rect.extent.height, + }, + .depth_clear = clear_value.depth, + }, + { + .position = { + clear_rect->rect.offset.x + clear_rect->rect.extent.width, + clear_rect->rect.offset.y, + }, + .depth_clear = clear_value.depth, + }, + }; + + radv_cmd_buffer_upload_data(cmd_buffer, sizeof(vertex_data), 16, vertex_data, &offset); + struct radv_buffer vertex_buffer = { + .device = device, + .size = sizeof(vertex_data), + .bo = cmd_buffer->upload.upload_bo, + .offset = offset, + }; + + if (aspects & VK_IMAGE_ASPECT_STENCIL_BIT) { + radv_CmdSetStencilReference(cmd_buffer_h, VK_STENCIL_FACE_FRONT_BIT, + clear_value.stencil); + } + + radv_CmdBindVertexBuffers(cmd_buffer_h, 0, 1, + (VkBuffer[]) { radv_buffer_to_handle(&vertex_buffer) }, + (VkDeviceSize[]) { 0 }); + + struct radv_pipeline *pipeline = pick_depthstencil_pipeline(meta_state, + iview, + samples_log2, + aspects, + subpass->depth_stencil_attachment.layout, + clear_rect, + clear_value); + if (cmd_buffer->state.pipeline != pipeline) { + radv_CmdBindPipeline(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS, + radv_pipeline_to_handle(pipeline)); + } + + if (depth_view_can_fast_clear(iview, subpass->depth_stencil_attachment.layout, clear_rect)) + radv_set_depth_clear_regs(cmd_buffer, iview->image, clear_value, aspects); + + radv_CmdDraw(cmd_buffer_h, 3, clear_rect->layerCount, 0, 0); +} + + +static VkFormat pipeline_formats[] = { + VK_FORMAT_R8G8B8A8_UNORM, + VK_FORMAT_R8G8B8A8_UINT, + VK_FORMAT_R8G8B8A8_SINT, + VK_FORMAT_R16G16B16A16_UNORM, + VK_FORMAT_R16G16B16A16_SNORM, + VK_FORMAT_R16G16B16A16_UINT, + VK_FORMAT_R16G16B16A16_SINT, + VK_FORMAT_R32_SFLOAT, + VK_FORMAT_R32G32_SFLOAT, + VK_FORMAT_R32G32B32A32_SFLOAT +}; + +VkResult +radv_device_init_meta_clear_state(struct radv_device *device) +{ + VkResult res; + struct radv_meta_state *state = &device->meta_state; + + memset(&device->meta_state.clear, 0, sizeof(device->meta_state.clear)); + + for (uint32_t i = 0; i < ARRAY_SIZE(state->clear); ++i) { + uint32_t samples = 1 << i; + for (uint32_t j = 0; j < ARRAY_SIZE(pipeline_formats); ++j) { + VkFormat format = pipeline_formats[j]; + unsigned fs_key = radv_format_meta_fs_key(format); + assert(!state->clear[i].color_pipelines[fs_key]); + + res = create_color_renderpass(device, format, samples, + &state->clear[i].render_pass[fs_key]); + if (res != VK_SUCCESS) + goto fail; + + res = create_color_pipeline(device, samples, 0, &state->clear[i].color_pipelines[fs_key], + state->clear[i].render_pass[fs_key]); + if (res != VK_SUCCESS) + goto fail; + + } + + res = create_depthstencil_renderpass(device, + samples, + &state->clear[i].depthstencil_rp); + if (res != VK_SUCCESS) + goto fail; + + for (uint32_t j = 0; j < NUM_DEPTH_CLEAR_PIPELINES; j++) { + res = create_depthstencil_pipeline(device, + VK_IMAGE_ASPECT_DEPTH_BIT, + samples, + j, + &state->clear[i].depth_only_pipeline[j], + state->clear[i].depthstencil_rp); + if (res != VK_SUCCESS) + goto fail; + + res = create_depthstencil_pipeline(device, + VK_IMAGE_ASPECT_STENCIL_BIT, + samples, + j, + &state->clear[i].stencil_only_pipeline[j], + state->clear[i].depthstencil_rp); + if (res != VK_SUCCESS) + goto fail; + + res = create_depthstencil_pipeline(device, + VK_IMAGE_ASPECT_DEPTH_BIT | + VK_IMAGE_ASPECT_STENCIL_BIT, + samples, + j, + &state->clear[i].depthstencil_pipeline[j], + state->clear[i].depthstencil_rp); + if (res != VK_SUCCESS) + goto fail; + } + } + return VK_SUCCESS; + +fail: + radv_device_finish_meta_clear_state(device); + return res; +} + +static bool +emit_fast_color_clear(struct radv_cmd_buffer *cmd_buffer, + const VkClearAttachment *clear_att, + const VkClearRect *clear_rect) +{ + const struct radv_subpass *subpass = cmd_buffer->state.subpass; + const uint32_t subpass_att = clear_att->colorAttachment; + const uint32_t pass_att = subpass->color_attachments[subpass_att].attachment; + VkImageLayout image_layout = subpass->color_attachments[subpass_att].layout; + const struct radv_framebuffer *fb = cmd_buffer->state.framebuffer; + const struct radv_image_view *iview = fb->attachments[pass_att].attachment; + VkClearColorValue clear_value = clear_att->clearValue.color; + uint32_t clear_color[2]; + bool ret; + + if (!iview->image->cmask.size && !iview->image->surface.dcc_size) + return false; + + if (!(cmd_buffer->device->debug_flags & RADV_DEBUG_FAST_CLEARS)) + return false; + + if (!radv_layout_can_fast_clear(iview->image, image_layout, radv_image_queue_family_mask(iview->image, cmd_buffer->queue_family_index))) + goto fail; + if (vk_format_get_blocksizebits(iview->image->vk_format) > 64) + goto fail; + + /* don't fast clear 3D */ + if (iview->image->type == VK_IMAGE_TYPE_3D) + goto fail; + + /* all layers are bound */ + if (iview->base_layer > 0) + goto fail; + if (iview->image->array_size != iview->layer_count) + goto fail; + + if (iview->image->levels > 1) + goto fail; + + if (iview->image->surface.level[0].mode < RADEON_SURF_MODE_1D) + goto fail; + + if (memcmp(&iview->extent, &iview->image->extent, sizeof(iview->extent))) + goto fail; + + if (clear_rect->rect.offset.x || clear_rect->rect.offset.y || + clear_rect->rect.extent.width != iview->image->extent.width || + clear_rect->rect.extent.height != iview->image->extent.height) + goto fail; + + if (clear_rect->baseArrayLayer != 0) + goto fail; + if (clear_rect->layerCount != iview->image->array_size) + goto fail; + + /* DCC */ + ret = radv_format_pack_clear_color(iview->image->vk_format, + clear_color, &clear_value); + if (ret == false) + goto fail; + + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB | + RADV_CMD_FLAG_FLUSH_AND_INV_CB_META; + si_emit_cache_flush(cmd_buffer); + /* clear cmask buffer */ + if (iview->image->surface.dcc_size) { + radv_fill_buffer(cmd_buffer, iview->image->bo, + iview->image->offset + iview->image->dcc_offset, + iview->image->surface.dcc_size, 0x20202020); + } else { + radv_fill_buffer(cmd_buffer, iview->image->bo, + iview->image->offset + iview->image->cmask.offset, + iview->image->cmask.size, 0); + } + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_CS_PARTIAL_FLUSH | + RADV_CMD_FLAG_INV_VMEM_L1 | + RADV_CMD_FLAG_INV_GLOBAL_L2; + + radv_set_color_clear_regs(cmd_buffer, iview->image, subpass_att, clear_color); + + return true; +fail: + return false; +} + +/** + * The parameters mean that same as those in vkCmdClearAttachments. + */ +static void +emit_clear(struct radv_cmd_buffer *cmd_buffer, + const VkClearAttachment *clear_att, + const VkClearRect *clear_rect) +{ + if (clear_att->aspectMask & VK_IMAGE_ASPECT_COLOR_BIT) { + + if (!emit_fast_color_clear(cmd_buffer, clear_att, clear_rect)) + emit_color_clear(cmd_buffer, clear_att, clear_rect); + } else { + assert(clear_att->aspectMask & (VK_IMAGE_ASPECT_DEPTH_BIT | + VK_IMAGE_ASPECT_STENCIL_BIT)); + emit_depthstencil_clear(cmd_buffer, clear_att, clear_rect); + } +} + +static bool +subpass_needs_clear(const struct radv_cmd_buffer *cmd_buffer) +{ + const struct radv_cmd_state *cmd_state = &cmd_buffer->state; + uint32_t ds; + + if (!cmd_state->subpass) + return false; + ds = cmd_state->subpass->depth_stencil_attachment.attachment; + for (uint32_t i = 0; i < cmd_state->subpass->color_count; ++i) { + uint32_t a = cmd_state->subpass->color_attachments[i].attachment; + if (cmd_state->attachments[a].pending_clear_aspects) { + return true; + } + } + + if (ds != VK_ATTACHMENT_UNUSED && + cmd_state->attachments[ds].pending_clear_aspects) { + return true; + } + + return false; +} + +/** + * Emit any pending attachment clears for the current subpass. + * + * @see radv_attachment_state::pending_clear_aspects + */ +void +radv_cmd_buffer_clear_subpass(struct radv_cmd_buffer *cmd_buffer) +{ + struct radv_cmd_state *cmd_state = &cmd_buffer->state; + struct radv_meta_saved_state saved_state; + + if (!subpass_needs_clear(cmd_buffer)) + return; + + radv_meta_save_graphics_reset_vport_scissor(&saved_state, cmd_buffer); + + VkClearRect clear_rect = { + .rect = cmd_state->render_area, + .baseArrayLayer = 0, + .layerCount = cmd_state->framebuffer->layers, + }; + + for (uint32_t i = 0; i < cmd_state->subpass->color_count; ++i) { + uint32_t a = cmd_state->subpass->color_attachments[i].attachment; + + if (!cmd_state->attachments[a].pending_clear_aspects) + continue; + + assert(cmd_state->attachments[a].pending_clear_aspects == + VK_IMAGE_ASPECT_COLOR_BIT); + + VkClearAttachment clear_att = { + .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT, + .colorAttachment = i, /* Use attachment index relative to subpass */ + .clearValue = cmd_state->attachments[a].clear_value, + }; + + emit_clear(cmd_buffer, &clear_att, &clear_rect); + cmd_state->attachments[a].pending_clear_aspects = 0; + } + + uint32_t ds = cmd_state->subpass->depth_stencil_attachment.attachment; + + if (ds != VK_ATTACHMENT_UNUSED) { + + if (cmd_state->attachments[ds].pending_clear_aspects) { + + VkClearAttachment clear_att = { + .aspectMask = cmd_state->attachments[ds].pending_clear_aspects, + .clearValue = cmd_state->attachments[ds].clear_value, + }; + + emit_clear(cmd_buffer, &clear_att, &clear_rect); + cmd_state->attachments[ds].pending_clear_aspects = 0; + } + } + + radv_meta_restore(&saved_state, cmd_buffer); +} + +static void +radv_clear_image_layer(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *image, + VkImageLayout image_layout, + const VkImageSubresourceRange *range, + VkFormat format, int level, int layer, + const VkClearValue *clear_val) +{ + VkDevice device_h = radv_device_to_handle(cmd_buffer->device); + struct radv_image_view iview; + radv_image_view_init(&iview, cmd_buffer->device, + &(VkImageViewCreateInfo) { + .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO, + .image = radv_image_to_handle(image), + .viewType = radv_meta_get_view_type(image), + .format = format, + .subresourceRange = { + .aspectMask = range->aspectMask, + .baseMipLevel = range->baseMipLevel + level, + .levelCount = 1, + .baseArrayLayer = range->baseArrayLayer + layer, + .layerCount = 1 + }, + }, + cmd_buffer, VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT); + + VkFramebuffer fb; + radv_CreateFramebuffer(device_h, + &(VkFramebufferCreateInfo) { + .sType = VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO, + .attachmentCount = 1, + .pAttachments = (VkImageView[]) { + radv_image_view_to_handle(&iview), + }, + .width = iview.extent.width, + .height = iview.extent.height, + .layers = 1 + }, + &cmd_buffer->pool->alloc, + &fb); + + VkAttachmentDescription att_desc = { + .format = iview.vk_format, + .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD, + .storeOp = VK_ATTACHMENT_STORE_OP_STORE, + .stencilLoadOp = VK_ATTACHMENT_LOAD_OP_LOAD, + .stencilStoreOp = VK_ATTACHMENT_STORE_OP_STORE, + .initialLayout = image_layout, + .finalLayout = image_layout, + }; + + VkSubpassDescription subpass_desc = { + .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS, + .inputAttachmentCount = 0, + .colorAttachmentCount = 0, + .pColorAttachments = NULL, + .pResolveAttachments = NULL, + .pDepthStencilAttachment = NULL, + .preserveAttachmentCount = 0, + .pPreserveAttachments = NULL, + }; + + const VkAttachmentReference att_ref = { + .attachment = 0, + .layout = image_layout, + }; + + if (range->aspectMask & VK_IMAGE_ASPECT_COLOR_BIT) { + subpass_desc.colorAttachmentCount = 1; + subpass_desc.pColorAttachments = &att_ref; + } else { + subpass_desc.pDepthStencilAttachment = &att_ref; + } + + VkRenderPass pass; + radv_CreateRenderPass(device_h, + &(VkRenderPassCreateInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO, + .attachmentCount = 1, + .pAttachments = &att_desc, + .subpassCount = 1, + .pSubpasses = &subpass_desc, + }, + &cmd_buffer->pool->alloc, + &pass); + + radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer), + &(VkRenderPassBeginInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, + .renderArea = { + .offset = { 0, 0, }, + .extent = { + .width = iview.extent.width, + .height = iview.extent.height, + }, + }, + .renderPass = pass, + .framebuffer = fb, + .clearValueCount = 0, + .pClearValues = NULL, + }, + VK_SUBPASS_CONTENTS_INLINE); + + VkClearAttachment clear_att = { + .aspectMask = range->aspectMask, + .colorAttachment = 0, + .clearValue = *clear_val, + }; + + VkClearRect clear_rect = { + .rect = { + .offset = { 0, 0 }, + .extent = { iview.extent.width, iview.extent.height }, + }, + .baseArrayLayer = range->baseArrayLayer, + .layerCount = 1, /* FINISHME: clear multi-layer framebuffer */ + }; + + emit_clear(cmd_buffer, &clear_att, &clear_rect); + + radv_CmdEndRenderPass(radv_cmd_buffer_to_handle(cmd_buffer)); + radv_DestroyRenderPass(device_h, pass, + &cmd_buffer->pool->alloc); + radv_DestroyFramebuffer(device_h, fb, + &cmd_buffer->pool->alloc); +} +static void +radv_cmd_clear_image(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *image, + VkImageLayout image_layout, + const VkClearValue *clear_value, + uint32_t range_count, + const VkImageSubresourceRange *ranges, + bool cs) +{ + VkFormat format = image->vk_format; + VkClearValue internal_clear_value = *clear_value; + + if (format == VK_FORMAT_E5B9G9R9_UFLOAT_PACK32) { + uint32_t value; + format = VK_FORMAT_R32_UINT; + value = float3_to_rgb9e5(clear_value->color.float32); + internal_clear_value.color.uint32[0] = value; + } + + for (uint32_t r = 0; r < range_count; r++) { + const VkImageSubresourceRange *range = &ranges[r]; + for (uint32_t l = 0; l < radv_get_levelCount(image, range); ++l) { + const uint32_t layer_count = image->type == VK_IMAGE_TYPE_3D ? + radv_minify(image->extent.depth, range->baseMipLevel + l) : + radv_get_layerCount(image, range); + for (uint32_t s = 0; s < layer_count; ++s) { + + if (cs) { + struct radv_meta_blit2d_surf surf; + surf.format = format; + surf.image = image; + surf.level = range->baseMipLevel + l; + surf.layer = range->baseArrayLayer + s; + surf.aspect_mask = range->aspectMask; + radv_meta_clear_image_cs(cmd_buffer, &surf, + &internal_clear_value.color); + } else { + radv_clear_image_layer(cmd_buffer, image, image_layout, + range, format, l, s, &internal_clear_value); + } + } + } + } +} + +union meta_saved_state { + struct radv_meta_saved_state gfx; + struct radv_meta_saved_compute_state compute; +}; + +void radv_CmdClearColorImage( + VkCommandBuffer commandBuffer, + VkImage image_h, + VkImageLayout imageLayout, + const VkClearColorValue* pColor, + uint32_t rangeCount, + const VkImageSubresourceRange* pRanges) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + RADV_FROM_HANDLE(radv_image, image, image_h); + union meta_saved_state saved_state; + bool cs = cmd_buffer->queue_family_index == RADV_QUEUE_COMPUTE; + + if (cs) + radv_meta_begin_cleari(cmd_buffer, &saved_state.compute); + else + radv_meta_save_graphics_reset_vport_scissor(&saved_state.gfx, cmd_buffer); + + radv_cmd_clear_image(cmd_buffer, image, imageLayout, + (const VkClearValue *) pColor, + rangeCount, pRanges, cs); + + if (cs) + radv_meta_end_cleari(cmd_buffer, &saved_state.compute); + else + radv_meta_restore(&saved_state.gfx, cmd_buffer); +} + +void radv_CmdClearDepthStencilImage( + VkCommandBuffer commandBuffer, + VkImage image_h, + VkImageLayout imageLayout, + const VkClearDepthStencilValue* pDepthStencil, + uint32_t rangeCount, + const VkImageSubresourceRange* pRanges) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + RADV_FROM_HANDLE(radv_image, image, image_h); + struct radv_meta_saved_state saved_state; + + radv_meta_save_graphics_reset_vport_scissor(&saved_state, cmd_buffer); + + radv_cmd_clear_image(cmd_buffer, image, imageLayout, + (const VkClearValue *) pDepthStencil, + rangeCount, pRanges, false); + + radv_meta_restore(&saved_state, cmd_buffer); +} + +void radv_CmdClearAttachments( + VkCommandBuffer commandBuffer, + uint32_t attachmentCount, + const VkClearAttachment* pAttachments, + uint32_t rectCount, + const VkClearRect* pRects) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + struct radv_meta_saved_state saved_state; + + if (!cmd_buffer->state.subpass) + return; + + radv_meta_save_graphics_reset_vport_scissor(&saved_state, cmd_buffer); + + /* FINISHME: We can do better than this dumb loop. It thrashes too much + * state. + */ + for (uint32_t a = 0; a < attachmentCount; ++a) { + for (uint32_t r = 0; r < rectCount; ++r) { + emit_clear(cmd_buffer, &pAttachments[a], &pRects[r]); + } + } + + radv_meta_restore(&saved_state, cmd_buffer); +} diff -Nru mesa-12.0.6/src/amd/vulkan/radv_meta_copy.c mesa-17.0.7/src/amd/vulkan/radv_meta_copy.c --- mesa-12.0.6/src/amd/vulkan/radv_meta_copy.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_meta_copy.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,429 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "radv_meta.h" +#include "vk_format.h" + +static VkExtent3D +meta_image_block_size(const struct radv_image *image) +{ + const struct vk_format_description *desc = vk_format_description(image->vk_format); + return (VkExtent3D) { desc->block.width, desc->block.height, 1 }; +} + +/* Returns the user-provided VkBufferImageCopy::imageExtent in units of + * elements rather than texels. One element equals one texel or one block + * if Image is uncompressed or compressed, respectively. + */ +static struct VkExtent3D +meta_region_extent_el(const struct radv_image *image, + const struct VkExtent3D *extent) +{ + const VkExtent3D block = meta_image_block_size(image); + return radv_sanitize_image_extent(image->type, (VkExtent3D) { + .width = DIV_ROUND_UP(extent->width , block.width), + .height = DIV_ROUND_UP(extent->height, block.height), + .depth = DIV_ROUND_UP(extent->depth , block.depth), + }); +} + +/* Returns the user-provided VkBufferImageCopy::imageOffset in units of + * elements rather than texels. One element equals one texel or one block + * if Image is uncompressed or compressed, respectively. + */ +static struct VkOffset3D +meta_region_offset_el(const struct radv_image *image, + const struct VkOffset3D *offset) +{ + const VkExtent3D block = meta_image_block_size(image); + return radv_sanitize_image_offset(image->type, (VkOffset3D) { + .x = offset->x / block.width, + .y = offset->y / block.height, + .z = offset->z / block.depth, + }); +} + +static VkFormat +vk_format_for_size(int bs) +{ + switch (bs) { + case 1: return VK_FORMAT_R8_UINT; + case 2: return VK_FORMAT_R8G8_UINT; + case 4: return VK_FORMAT_R8G8B8A8_UINT; + case 8: return VK_FORMAT_R16G16B16A16_UINT; + case 16: return VK_FORMAT_R32G32B32A32_UINT; + default: + unreachable("Invalid format block size"); + } +} + +static struct radv_meta_blit2d_surf +blit_surf_for_image_level_layer(struct radv_image *image, + const VkImageSubresourceLayers *subres) +{ + VkFormat format = image->vk_format; + if (subres->aspectMask & VK_IMAGE_ASPECT_DEPTH_BIT) + format = vk_format_depth_only(format); + else if (subres->aspectMask & VK_IMAGE_ASPECT_STENCIL_BIT) + format = vk_format_stencil_only(format); + + if (!image->surface.dcc_size) + format = vk_format_for_size(vk_format_get_blocksize(format)); + + return (struct radv_meta_blit2d_surf) { + .format = format, + .bs = vk_format_get_blocksize(format), + .level = subres->mipLevel, + .layer = subres->baseArrayLayer, + .image = image, + .aspect_mask = subres->aspectMask, + }; +} + +union meta_saved_state { + struct radv_meta_saved_state gfx; + struct radv_meta_saved_compute_state compute; +}; + +static void +meta_copy_buffer_to_image(struct radv_cmd_buffer *cmd_buffer, + struct radv_buffer* buffer, + struct radv_image* image, + uint32_t regionCount, + const VkBufferImageCopy* pRegions) +{ + bool cs = cmd_buffer->queue_family_index == RADV_QUEUE_COMPUTE; + union meta_saved_state saved_state; + + /* The Vulkan 1.0 spec says "dstImage must have a sample count equal to + * VK_SAMPLE_COUNT_1_BIT." + */ + assert(image->samples == 1); + + if (cs) + radv_meta_begin_bufimage(cmd_buffer, &saved_state.compute); + else + radv_meta_save_graphics_reset_vport_scissor(&saved_state.gfx, cmd_buffer); + + for (unsigned r = 0; r < regionCount; r++) { + + /** + * From the Vulkan 1.0.6 spec: 18.3 Copying Data Between Images + * extent is the size in texels of the source image to copy in width, + * height and depth. 1D images use only x and width. 2D images use x, y, + * width and height. 3D images use x, y, z, width, height and depth. + * + * + * Also, convert the offsets and extent from units of texels to units of + * blocks - which is the highest resolution accessible in this command. + */ + const VkOffset3D img_offset_el = + meta_region_offset_el(image, &pRegions[r].imageOffset); + const VkExtent3D bufferExtent = { + .width = pRegions[r].bufferRowLength ? + pRegions[r].bufferRowLength : pRegions[r].imageExtent.width, + .height = pRegions[r].bufferImageHeight ? + pRegions[r].bufferImageHeight : pRegions[r].imageExtent.height, + }; + const VkExtent3D buf_extent_el = + meta_region_extent_el(image, &bufferExtent); + + /* Start creating blit rect */ + const VkExtent3D img_extent_el = + meta_region_extent_el(image, &pRegions[r].imageExtent); + struct radv_meta_blit2d_rect rect = { + .width = img_extent_el.width, + .height = img_extent_el.height, + }; + + /* Create blit surfaces */ + struct radv_meta_blit2d_surf img_bsurf = + blit_surf_for_image_level_layer(image, + &pRegions[r].imageSubresource); + + struct radv_meta_blit2d_buffer buf_bsurf = { + .bs = img_bsurf.bs, + .format = img_bsurf.format, + .buffer = buffer, + .offset = pRegions[r].bufferOffset, + .pitch = buf_extent_el.width, + }; + + /* Loop through each 3D or array slice */ + unsigned num_slices_3d = img_extent_el.depth; + unsigned num_slices_array = pRegions[r].imageSubresource.layerCount; + unsigned slice_3d = 0; + unsigned slice_array = 0; + while (slice_3d < num_slices_3d && slice_array < num_slices_array) { + + rect.dst_x = img_offset_el.x; + rect.dst_y = img_offset_el.y; + + + /* Perform Blit */ + if (cs) + radv_meta_buffer_to_image_cs(cmd_buffer, &buf_bsurf, &img_bsurf, 1, &rect); + else + radv_meta_blit2d(cmd_buffer, NULL, &buf_bsurf, &img_bsurf, 1, &rect); + + /* Once we've done the blit, all of the actual information about + * the image is embedded in the command buffer so we can just + * increment the offset directly in the image effectively + * re-binding it to different backing memory. + */ + buf_bsurf.offset += buf_extent_el.width * + buf_extent_el.height * buf_bsurf.bs; + img_bsurf.layer++; + if (image->type == VK_IMAGE_TYPE_3D) + slice_3d++; + else + slice_array++; + } + } + if (cs) + radv_meta_end_bufimage(cmd_buffer, &saved_state.compute); + else + radv_meta_restore(&saved_state.gfx, cmd_buffer); +} + +void radv_CmdCopyBufferToImage( + VkCommandBuffer commandBuffer, + VkBuffer srcBuffer, + VkImage destImage, + VkImageLayout destImageLayout, + uint32_t regionCount, + const VkBufferImageCopy* pRegions) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + RADV_FROM_HANDLE(radv_image, dest_image, destImage); + RADV_FROM_HANDLE(radv_buffer, src_buffer, srcBuffer); + + meta_copy_buffer_to_image(cmd_buffer, src_buffer, dest_image, + regionCount, pRegions); +} + +static void +meta_copy_image_to_buffer(struct radv_cmd_buffer *cmd_buffer, + struct radv_buffer* buffer, + struct radv_image* image, + uint32_t regionCount, + const VkBufferImageCopy* pRegions) +{ + struct radv_meta_saved_compute_state saved_state; + + radv_meta_begin_bufimage(cmd_buffer, &saved_state); + for (unsigned r = 0; r < regionCount; r++) { + + /** + * From the Vulkan 1.0.6 spec: 18.3 Copying Data Between Images + * extent is the size in texels of the source image to copy in width, + * height and depth. 1D images use only x and width. 2D images use x, y, + * width and height. 3D images use x, y, z, width, height and depth. + * + * + * Also, convert the offsets and extent from units of texels to units of + * blocks - which is the highest resolution accessible in this command. + */ + const VkOffset3D img_offset_el = + meta_region_offset_el(image, &pRegions[r].imageOffset); + const VkExtent3D bufferExtent = { + .width = pRegions[r].bufferRowLength ? + pRegions[r].bufferRowLength : pRegions[r].imageExtent.width, + .height = pRegions[r].bufferImageHeight ? + pRegions[r].bufferImageHeight : pRegions[r].imageExtent.height, + }; + const VkExtent3D buf_extent_el = + meta_region_extent_el(image, &bufferExtent); + + /* Start creating blit rect */ + const VkExtent3D img_extent_el = + meta_region_extent_el(image, &pRegions[r].imageExtent); + struct radv_meta_blit2d_rect rect = { + .width = img_extent_el.width, + .height = img_extent_el.height, + }; + + /* Create blit surfaces */ + struct radv_meta_blit2d_surf img_info = + blit_surf_for_image_level_layer(image, + &pRegions[r].imageSubresource); + + struct radv_meta_blit2d_buffer buf_info = { + .bs = img_info.bs, + .format = img_info.format, + .buffer = buffer, + .offset = pRegions[r].bufferOffset, + .pitch = buf_extent_el.width, + }; + + /* Loop through each 3D or array slice */ + unsigned num_slices_3d = img_extent_el.depth; + unsigned num_slices_array = pRegions[r].imageSubresource.layerCount; + unsigned slice_3d = 0; + unsigned slice_array = 0; + while (slice_3d < num_slices_3d && slice_array < num_slices_array) { + + rect.src_x = img_offset_el.x; + rect.src_y = img_offset_el.y; + + + /* Perform Blit */ + radv_meta_image_to_buffer(cmd_buffer, &img_info, &buf_info, 1, &rect); + + buf_info.offset += buf_extent_el.width * + buf_extent_el.height * buf_info.bs; + img_info.layer++; + if (image->type == VK_IMAGE_TYPE_3D) + slice_3d++; + else + slice_array++; + } + } + radv_meta_end_bufimage(cmd_buffer, &saved_state); +} + +void radv_CmdCopyImageToBuffer( + VkCommandBuffer commandBuffer, + VkImage srcImage, + VkImageLayout srcImageLayout, + VkBuffer destBuffer, + uint32_t regionCount, + const VkBufferImageCopy* pRegions) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + RADV_FROM_HANDLE(radv_image, src_image, srcImage); + RADV_FROM_HANDLE(radv_buffer, dst_buffer, destBuffer); + + meta_copy_image_to_buffer(cmd_buffer, dst_buffer, src_image, + regionCount, pRegions); +} + +static void +meta_copy_image(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *src_image, + struct radv_image *dest_image, + uint32_t regionCount, + const VkImageCopy *pRegions) +{ + bool cs = cmd_buffer->queue_family_index == RADV_QUEUE_COMPUTE; + union meta_saved_state saved_state; + + /* From the Vulkan 1.0 spec: + * + * vkCmdCopyImage can be used to copy image data between multisample + * images, but both images must have the same number of samples. + */ + assert(src_image->samples == dest_image->samples); + if (cs) + radv_meta_begin_itoi(cmd_buffer, &saved_state.compute); + else + radv_meta_save_graphics_reset_vport_scissor(&saved_state.gfx, cmd_buffer); + + for (unsigned r = 0; r < regionCount; r++) { + assert(pRegions[r].srcSubresource.aspectMask == + pRegions[r].dstSubresource.aspectMask); + + /* Create blit surfaces */ + struct radv_meta_blit2d_surf b_src = + blit_surf_for_image_level_layer(src_image, + &pRegions[r].srcSubresource); + + struct radv_meta_blit2d_surf b_dst = + blit_surf_for_image_level_layer(dest_image, + &pRegions[r].dstSubresource); + + /* for DCC */ + b_src.format = b_dst.format; + + /** + * From the Vulkan 1.0.6 spec: 18.4 Copying Data Between Buffers and Images + * imageExtent is the size in texels of the image to copy in width, height + * and depth. 1D images use only x and width. 2D images use x, y, width + * and height. 3D images use x, y, z, width, height and depth. + * + * Also, convert the offsets and extent from units of texels to units of + * blocks - which is the highest resolution accessible in this command. + */ + const VkOffset3D dst_offset_el = + meta_region_offset_el(dest_image, &pRegions[r].dstOffset); + const VkOffset3D src_offset_el = + meta_region_offset_el(src_image, &pRegions[r].srcOffset); + const VkExtent3D img_extent_el = + meta_region_extent_el(src_image, &pRegions[r].extent); + + /* Start creating blit rect */ + struct radv_meta_blit2d_rect rect = { + .width = img_extent_el.width, + .height = img_extent_el.height, + }; + + /* Loop through each 3D or array slice */ + unsigned num_slices_3d = img_extent_el.depth; + unsigned num_slices_array = pRegions[r].dstSubresource.layerCount; + unsigned slice_3d = 0; + unsigned slice_array = 0; + while (slice_3d < num_slices_3d && slice_array < num_slices_array) { + + /* Finish creating blit rect */ + rect.dst_x = dst_offset_el.x; + rect.dst_y = dst_offset_el.y; + rect.src_x = src_offset_el.x; + rect.src_y = src_offset_el.y; + + /* Perform Blit */ + if (cs) + radv_meta_image_to_image_cs(cmd_buffer, &b_src, &b_dst, 1, &rect); + else + radv_meta_blit2d(cmd_buffer, &b_src, NULL, &b_dst, 1, &rect); + + b_src.layer++; + b_dst.layer++; + if (dest_image->type == VK_IMAGE_TYPE_3D) + slice_3d++; + else + slice_array++; + } + } + + if (cs) + radv_meta_end_itoi(cmd_buffer, &saved_state.compute); + else + radv_meta_restore(&saved_state.gfx, cmd_buffer); +} + +void radv_CmdCopyImage( + VkCommandBuffer commandBuffer, + VkImage srcImage, + VkImageLayout srcImageLayout, + VkImage destImage, + VkImageLayout destImageLayout, + uint32_t regionCount, + const VkImageCopy* pRegions) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + RADV_FROM_HANDLE(radv_image, src_image, srcImage); + RADV_FROM_HANDLE(radv_image, dest_image, destImage); + + meta_copy_image(cmd_buffer, src_image, dest_image, + regionCount, pRegions); +} diff -Nru mesa-12.0.6/src/amd/vulkan/radv_meta_decompress.c mesa-17.0.7/src/amd/vulkan/radv_meta_decompress.c --- mesa-12.0.6/src/amd/vulkan/radv_meta_decompress.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_meta_decompress.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,465 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include +#include + +#include "radv_meta.h" +#include "radv_private.h" +#include "nir/nir_builder.h" +#include "sid.h" +/** + * Vertex attributes used by all pipelines. + */ +struct vertex_attrs { + float position[2]; /**< 3DPRIM_RECTLIST */ +}; + +/* passthrough vertex shader */ +static nir_shader * +build_nir_vs(void) +{ + const struct glsl_type *vec4 = glsl_vec4_type(); + + nir_builder b; + nir_variable *a_position; + nir_variable *v_position; + + nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_VERTEX, NULL); + b.shader->info->name = ralloc_strdup(b.shader, "meta_depth_decomp_vs"); + + a_position = nir_variable_create(b.shader, nir_var_shader_in, vec4, + "a_position"); + a_position->data.location = VERT_ATTRIB_GENERIC0; + + v_position = nir_variable_create(b.shader, nir_var_shader_out, vec4, + "gl_Position"); + v_position->data.location = VARYING_SLOT_POS; + + nir_copy_var(&b, v_position, a_position); + + return b.shader; +} + +/* simple passthrough shader */ +static nir_shader * +build_nir_fs(void) +{ + nir_builder b; + + nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL); + b.shader->info->name = ralloc_asprintf(b.shader, + "meta_depth_decomp_noop_fs"); + + return b.shader; +} + +static VkResult +create_pass(struct radv_device *device) +{ + VkResult result; + VkDevice device_h = radv_device_to_handle(device); + const VkAllocationCallbacks *alloc = &device->meta_state.alloc; + VkAttachmentDescription attachment; + + attachment.format = VK_FORMAT_UNDEFINED; + attachment.samples = 1; + attachment.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD; + attachment.storeOp = VK_ATTACHMENT_STORE_OP_STORE; + attachment.initialLayout = VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL; + attachment.finalLayout = VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL; + + result = radv_CreateRenderPass(device_h, + &(VkRenderPassCreateInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO, + .attachmentCount = 1, + .pAttachments = &attachment, + .subpassCount = 1, + .pSubpasses = &(VkSubpassDescription) { + .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS, + .inputAttachmentCount = 0, + .colorAttachmentCount = 0, + .pColorAttachments = NULL, + .pResolveAttachments = NULL, + .pDepthStencilAttachment = &(VkAttachmentReference) { + .attachment = 0, + .layout = VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL, + }, + .preserveAttachmentCount = 0, + .pPreserveAttachments = NULL, + }, + .dependencyCount = 0, + }, + alloc, + &device->meta_state.depth_decomp.pass); + + return result; +} + +static VkResult +create_pipeline(struct radv_device *device, + VkShaderModule vs_module_h) +{ + VkResult result; + VkDevice device_h = radv_device_to_handle(device); + + struct radv_shader_module fs_module = { + .nir = build_nir_fs(), + }; + + if (!fs_module.nir) { + /* XXX: Need more accurate error */ + result = VK_ERROR_OUT_OF_HOST_MEMORY; + goto cleanup; + } + + const VkGraphicsPipelineCreateInfo pipeline_create_info = { + .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO, + .stageCount = 2, + .pStages = (VkPipelineShaderStageCreateInfo[]) { + { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_VERTEX_BIT, + .module = vs_module_h, + .pName = "main", + }, + { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_FRAGMENT_BIT, + .module = radv_shader_module_to_handle(&fs_module), + .pName = "main", + }, + }, + .pVertexInputState = &(VkPipelineVertexInputStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO, + .vertexBindingDescriptionCount = 1, + .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) { + { + .binding = 0, + .stride = sizeof(struct vertex_attrs), + .inputRate = VK_VERTEX_INPUT_RATE_VERTEX + }, + }, + .vertexAttributeDescriptionCount = 1, + .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) { + { + /* Position */ + .location = 0, + .binding = 0, + .format = VK_FORMAT_R32G32_SFLOAT, + .offset = offsetof(struct vertex_attrs, position), + }, + }, + }, + .pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO, + .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP, + .primitiveRestartEnable = false, + }, + .pViewportState = &(VkPipelineViewportStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO, + .viewportCount = 0, + .scissorCount = 0, + }, + .pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO, + .depthClampEnable = false, + .rasterizerDiscardEnable = false, + .polygonMode = VK_POLYGON_MODE_FILL, + .cullMode = VK_CULL_MODE_NONE, + .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE, + }, + .pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO, + .rasterizationSamples = 1, + .sampleShadingEnable = false, + .pSampleMask = NULL, + .alphaToCoverageEnable = false, + .alphaToOneEnable = false, + }, + .pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO, + .logicOpEnable = false, + .attachmentCount = 0, + .pAttachments = NULL, + }, + .pDepthStencilState = &(VkPipelineDepthStencilStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO, + .depthTestEnable = false, + .depthWriteEnable = false, + .depthBoundsTestEnable = false, + .stencilTestEnable = false, + }, + .pDynamicState = NULL, + .renderPass = device->meta_state.depth_decomp.pass, + .subpass = 0, + }; + + result = radv_graphics_pipeline_create(device_h, + radv_pipeline_cache_to_handle(&device->meta_state.cache), + &pipeline_create_info, + &(struct radv_graphics_pipeline_create_info) { + .use_rectlist = true, + .db_flush_depth_inplace = true, + .db_flush_stencil_inplace = true, + }, + &device->meta_state.alloc, + &device->meta_state.depth_decomp.decompress_pipeline); + if (result != VK_SUCCESS) + goto cleanup; + + result = radv_graphics_pipeline_create(device_h, + radv_pipeline_cache_to_handle(&device->meta_state.cache), + &pipeline_create_info, + &(struct radv_graphics_pipeline_create_info) { + .use_rectlist = true, + .db_flush_depth_inplace = true, + .db_flush_stencil_inplace = true, + .db_resummarize = true, + }, + &device->meta_state.alloc, + &device->meta_state.depth_decomp.resummarize_pipeline); + if (result != VK_SUCCESS) + goto cleanup; + + goto cleanup; + +cleanup: + ralloc_free(fs_module.nir); + return result; +} + +void +radv_device_finish_meta_depth_decomp_state(struct radv_device *device) +{ + struct radv_meta_state *state = &device->meta_state; + VkDevice device_h = radv_device_to_handle(device); + VkRenderPass pass_h = device->meta_state.depth_decomp.pass; + const VkAllocationCallbacks *alloc = &device->meta_state.alloc; + + if (pass_h) + radv_DestroyRenderPass(device_h, pass_h, + &device->meta_state.alloc); + + VkPipeline pipeline_h = state->depth_decomp.decompress_pipeline; + if (pipeline_h) { + radv_DestroyPipeline(device_h, pipeline_h, alloc); + } + pipeline_h = state->depth_decomp.resummarize_pipeline; + if (pipeline_h) { + radv_DestroyPipeline(device_h, pipeline_h, alloc); + } +} + +VkResult +radv_device_init_meta_depth_decomp_state(struct radv_device *device) +{ + VkResult res = VK_SUCCESS; + + zero(device->meta_state.depth_decomp); + + struct radv_shader_module vs_module = { .nir = build_nir_vs() }; + if (!vs_module.nir) { + /* XXX: Need more accurate error */ + res = VK_ERROR_OUT_OF_HOST_MEMORY; + goto fail; + } + + res = create_pass(device); + if (res != VK_SUCCESS) + goto fail; + + VkShaderModule vs_module_h = radv_shader_module_to_handle(&vs_module); + res = create_pipeline(device, vs_module_h); + if (res != VK_SUCCESS) + goto fail; + + goto cleanup; + +fail: + radv_device_finish_meta_depth_decomp_state(device); + +cleanup: + ralloc_free(vs_module.nir); + + return res; +} + +static void +emit_depth_decomp(struct radv_cmd_buffer *cmd_buffer, + const VkOffset2D *dest_offset, + const VkExtent2D *depth_decomp_extent, + VkPipeline pipeline_h) +{ + struct radv_device *device = cmd_buffer->device; + VkCommandBuffer cmd_buffer_h = radv_cmd_buffer_to_handle(cmd_buffer); + uint32_t offset; + const struct vertex_attrs vertex_data[3] = { + { + .position = { + dest_offset->x, + dest_offset->y, + }, + }, + { + .position = { + dest_offset->x, + dest_offset->y + depth_decomp_extent->height, + }, + }, + { + .position = { + dest_offset->x + depth_decomp_extent->width, + dest_offset->y, + }, + }, + }; + + radv_cmd_buffer_upload_data(cmd_buffer, sizeof(vertex_data), 16, vertex_data, &offset); + struct radv_buffer vertex_buffer = { + .device = device, + .size = sizeof(vertex_data), + .bo = cmd_buffer->upload.upload_bo, + .offset = offset, + }; + + VkBuffer vertex_buffer_h = radv_buffer_to_handle(&vertex_buffer); + + radv_CmdBindVertexBuffers(cmd_buffer_h, + /*firstBinding*/ 0, + /*bindingCount*/ 1, + (VkBuffer[]) { vertex_buffer_h }, + (VkDeviceSize[]) { 0 }); + + RADV_FROM_HANDLE(radv_pipeline, pipeline, pipeline_h); + + if (cmd_buffer->state.pipeline != pipeline) { + radv_CmdBindPipeline(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS, + pipeline_h); + } + + radv_CmdDraw(cmd_buffer_h, 3, 1, 0, 0); +} + + +static void radv_process_depth_image_inplace(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *image, + VkImageSubresourceRange *subresourceRange, + VkPipeline pipeline_h) +{ + struct radv_meta_saved_state saved_state; + struct radv_meta_saved_pass_state saved_pass_state; + VkDevice device_h = radv_device_to_handle(cmd_buffer->device); + VkCommandBuffer cmd_buffer_h = radv_cmd_buffer_to_handle(cmd_buffer); + uint32_t width = radv_minify(image->extent.width, + subresourceRange->baseMipLevel); + uint32_t height = radv_minify(image->extent.height, + subresourceRange->baseMipLevel); + + if (!image->htile.size) + return; + radv_meta_save_pass(&saved_pass_state, cmd_buffer); + + radv_meta_save_graphics_reset_vport_scissor(&saved_state, cmd_buffer); + + for (uint32_t layer = 0; layer < radv_get_layerCount(image, subresourceRange); layer++) { + struct radv_image_view iview; + + radv_image_view_init(&iview, cmd_buffer->device, + &(VkImageViewCreateInfo) { + .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO, + .image = radv_image_to_handle(image), + .format = image->vk_format, + .subresourceRange = { + .aspectMask = VK_IMAGE_ASPECT_DEPTH_BIT, + .baseMipLevel = subresourceRange->baseMipLevel, + .levelCount = 1, + .baseArrayLayer = subresourceRange->baseArrayLayer + layer, + .layerCount = 1, + }, + }, + cmd_buffer, VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT); + + + VkFramebuffer fb_h; + radv_CreateFramebuffer(device_h, + &(VkFramebufferCreateInfo) { + .sType = VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO, + .attachmentCount = 1, + .pAttachments = (VkImageView[]) { + radv_image_view_to_handle(&iview) + }, + .width = width, + .height = height, + .layers = 1 + }, + &cmd_buffer->pool->alloc, + &fb_h); + + radv_CmdBeginRenderPass(cmd_buffer_h, + &(VkRenderPassBeginInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, + .renderPass = cmd_buffer->device->meta_state.depth_decomp.pass, + .framebuffer = fb_h, + .renderArea = { + .offset = { + 0, + 0, + }, + .extent = { + width, + height, + } + }, + .clearValueCount = 0, + .pClearValues = NULL, + }, + VK_SUBPASS_CONTENTS_INLINE); + + emit_depth_decomp(cmd_buffer, &(VkOffset2D){0, 0 }, &(VkExtent2D){width, height}, pipeline_h); + radv_CmdEndRenderPass(cmd_buffer_h); + + radv_DestroyFramebuffer(device_h, fb_h, + &cmd_buffer->pool->alloc); + } + radv_meta_restore(&saved_state, cmd_buffer); + radv_meta_restore_pass(&saved_pass_state, cmd_buffer); +} + +void radv_decompress_depth_image_inplace(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *image, + VkImageSubresourceRange *subresourceRange) +{ + assert(cmd_buffer->queue_family_index == RADV_QUEUE_GENERAL); + radv_process_depth_image_inplace(cmd_buffer, image, subresourceRange, + cmd_buffer->device->meta_state.depth_decomp.decompress_pipeline); +} + +void radv_resummarize_depth_image_inplace(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *image, + VkImageSubresourceRange *subresourceRange) +{ + assert(cmd_buffer->queue_family_index == RADV_QUEUE_GENERAL); + radv_process_depth_image_inplace(cmd_buffer, image, subresourceRange, + cmd_buffer->device->meta_state.depth_decomp.resummarize_pipeline); +} diff -Nru mesa-12.0.6/src/amd/vulkan/radv_meta_fast_clear.c mesa-17.0.7/src/amd/vulkan/radv_meta_fast_clear.c --- mesa-12.0.6/src/amd/vulkan/radv_meta_fast_clear.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_meta_fast_clear.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,487 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include +#include + +#include "radv_meta.h" +#include "radv_private.h" +#include "nir/nir_builder.h" +#include "sid.h" +/** + * Vertex attributes used by all pipelines. + */ +struct vertex_attrs { + float position[2]; /**< 3DPRIM_RECTLIST */ +}; + +/* passthrough vertex shader */ +static nir_shader * +build_nir_vs(void) +{ + const struct glsl_type *vec4 = glsl_vec4_type(); + + nir_builder b; + nir_variable *a_position; + nir_variable *v_position; + + nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_VERTEX, NULL); + b.shader->info->name = ralloc_strdup(b.shader, "meta_fast_clear_vs"); + + a_position = nir_variable_create(b.shader, nir_var_shader_in, vec4, + "a_position"); + a_position->data.location = VERT_ATTRIB_GENERIC0; + + v_position = nir_variable_create(b.shader, nir_var_shader_out, vec4, + "gl_Position"); + v_position->data.location = VARYING_SLOT_POS; + + nir_copy_var(&b, v_position, a_position); + + return b.shader; +} + +/* simple passthrough shader */ +static nir_shader * +build_nir_fs(void) +{ + nir_builder b; + + nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL); + b.shader->info->name = ralloc_asprintf(b.shader, + "meta_fast_clear_noop_fs"); + + return b.shader; +} + +static VkResult +create_pass(struct radv_device *device) +{ + VkResult result; + VkDevice device_h = radv_device_to_handle(device); + const VkAllocationCallbacks *alloc = &device->meta_state.alloc; + VkAttachmentDescription attachment; + + attachment.format = VK_FORMAT_UNDEFINED; + attachment.samples = 1; + attachment.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD; + attachment.storeOp = VK_ATTACHMENT_STORE_OP_STORE; + attachment.initialLayout = VK_IMAGE_LAYOUT_GENERAL; + attachment.finalLayout = VK_IMAGE_LAYOUT_GENERAL; + + result = radv_CreateRenderPass(device_h, + &(VkRenderPassCreateInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO, + .attachmentCount = 1, + .pAttachments = &attachment, + .subpassCount = 1, + .pSubpasses = &(VkSubpassDescription) { + .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS, + .inputAttachmentCount = 0, + .colorAttachmentCount = 1, + .pColorAttachments = (VkAttachmentReference[]) { + { + .attachment = 0, + .layout = VK_IMAGE_LAYOUT_GENERAL, + }, + }, + .pResolveAttachments = NULL, + .pDepthStencilAttachment = &(VkAttachmentReference) { + .attachment = VK_ATTACHMENT_UNUSED, + }, + .preserveAttachmentCount = 0, + .pPreserveAttachments = NULL, + }, + .dependencyCount = 0, + }, + alloc, + &device->meta_state.fast_clear_flush.pass); + + return result; +} + +static VkResult +create_pipeline(struct radv_device *device, + VkShaderModule vs_module_h) +{ + VkResult result; + VkDevice device_h = radv_device_to_handle(device); + + struct radv_shader_module fs_module = { + .nir = build_nir_fs(), + }; + + if (!fs_module.nir) { + /* XXX: Need more accurate error */ + result = VK_ERROR_OUT_OF_HOST_MEMORY; + goto cleanup; + } + + const VkPipelineShaderStageCreateInfo stages[2] = { + { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_VERTEX_BIT, + .module = vs_module_h, + .pName = "main", + }, + { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_FRAGMENT_BIT, + .module = radv_shader_module_to_handle(&fs_module), + .pName = "main", + }, + }; + + const VkPipelineVertexInputStateCreateInfo vi_state = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO, + .vertexBindingDescriptionCount = 1, + .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) { + { + .binding = 0, + .stride = sizeof(struct vertex_attrs), + .inputRate = VK_VERTEX_INPUT_RATE_VERTEX + }, + }, + .vertexAttributeDescriptionCount = 1, + .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) { + { + /* Position */ + .location = 0, + .binding = 0, + .format = VK_FORMAT_R32G32_SFLOAT, + .offset = offsetof(struct vertex_attrs, position), + }, + } + }; + + const VkPipelineInputAssemblyStateCreateInfo ia_state = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO, + .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP, + .primitiveRestartEnable = false, + }; + + const VkPipelineColorBlendStateCreateInfo blend_state = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO, + .logicOpEnable = false, + .attachmentCount = 1, + .pAttachments = (VkPipelineColorBlendAttachmentState []) { + { + .colorWriteMask = VK_COLOR_COMPONENT_R_BIT | + VK_COLOR_COMPONENT_G_BIT | + VK_COLOR_COMPONENT_B_BIT | + VK_COLOR_COMPONENT_A_BIT, + }, + } + }; + const VkPipelineRasterizationStateCreateInfo rs_state = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO, + .depthClampEnable = false, + .rasterizerDiscardEnable = false, + .polygonMode = VK_POLYGON_MODE_FILL, + .cullMode = VK_CULL_MODE_NONE, + .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE, + }; + + result = radv_graphics_pipeline_create(device_h, + radv_pipeline_cache_to_handle(&device->meta_state.cache), + &(VkGraphicsPipelineCreateInfo) { + .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO, + .stageCount = 2, + .pStages = stages, + + .pVertexInputState = &vi_state, + .pInputAssemblyState = &ia_state, + + .pViewportState = &(VkPipelineViewportStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO, + .viewportCount = 0, + .scissorCount = 0, + }, + .pRasterizationState = &rs_state, + .pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO, + .rasterizationSamples = 1, + .sampleShadingEnable = false, + .pSampleMask = NULL, + .alphaToCoverageEnable = false, + .alphaToOneEnable = false, + }, + .pColorBlendState = &blend_state, + .pDynamicState = NULL, + .renderPass = device->meta_state.fast_clear_flush.pass, + .subpass = 0, + }, + &(struct radv_graphics_pipeline_create_info) { + .use_rectlist = true, + .custom_blend_mode = V_028808_CB_ELIMINATE_FAST_CLEAR, + }, + &device->meta_state.alloc, + &device->meta_state.fast_clear_flush.cmask_eliminate_pipeline); + if (result != VK_SUCCESS) + goto cleanup; + + result = radv_graphics_pipeline_create(device_h, + radv_pipeline_cache_to_handle(&device->meta_state.cache), + &(VkGraphicsPipelineCreateInfo) { + .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO, + .stageCount = 2, + .pStages = stages, + + .pVertexInputState = &vi_state, + .pInputAssemblyState = &ia_state, + + .pViewportState = &(VkPipelineViewportStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO, + .viewportCount = 0, + .scissorCount = 0, + }, + .pRasterizationState = &rs_state, + .pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO, + .rasterizationSamples = 1, + .sampleShadingEnable = false, + .pSampleMask = NULL, + .alphaToCoverageEnable = false, + .alphaToOneEnable = false, + }, + .pColorBlendState = &blend_state, + .pDynamicState = NULL, + .renderPass = device->meta_state.fast_clear_flush.pass, + .subpass = 0, + }, + &(struct radv_graphics_pipeline_create_info) { + .use_rectlist = true, + .custom_blend_mode = V_028808_CB_FMASK_DECOMPRESS, + }, + &device->meta_state.alloc, + &device->meta_state.fast_clear_flush.fmask_decompress_pipeline); + if (result != VK_SUCCESS) + goto cleanup_cmask; + + goto cleanup; +cleanup_cmask: + radv_DestroyPipeline(device_h, device->meta_state.fast_clear_flush.cmask_eliminate_pipeline, &device->meta_state.alloc); +cleanup: + ralloc_free(fs_module.nir); + return result; +} + +void +radv_device_finish_meta_fast_clear_flush_state(struct radv_device *device) +{ + struct radv_meta_state *state = &device->meta_state; + VkDevice device_h = radv_device_to_handle(device); + VkRenderPass pass_h = device->meta_state.fast_clear_flush.pass; + const VkAllocationCallbacks *alloc = &device->meta_state.alloc; + + if (pass_h) + radv_DestroyRenderPass(device_h, pass_h, + &device->meta_state.alloc); + + VkPipeline pipeline_h = state->fast_clear_flush.cmask_eliminate_pipeline; + if (pipeline_h) { + radv_DestroyPipeline(device_h, pipeline_h, alloc); + } + + pipeline_h = state->fast_clear_flush.fmask_decompress_pipeline; + if (pipeline_h) { + radv_DestroyPipeline(device_h, pipeline_h, alloc); + } +} + +VkResult +radv_device_init_meta_fast_clear_flush_state(struct radv_device *device) +{ + VkResult res = VK_SUCCESS; + + zero(device->meta_state.fast_clear_flush); + + struct radv_shader_module vs_module = { .nir = build_nir_vs() }; + if (!vs_module.nir) { + /* XXX: Need more accurate error */ + res = VK_ERROR_OUT_OF_HOST_MEMORY; + goto fail; + } + + res = create_pass(device); + if (res != VK_SUCCESS) + goto fail; + + VkShaderModule vs_module_h = radv_shader_module_to_handle(&vs_module); + res = create_pipeline(device, vs_module_h); + if (res != VK_SUCCESS) + goto fail; + + goto cleanup; + +fail: + radv_device_finish_meta_fast_clear_flush_state(device); + +cleanup: + ralloc_free(vs_module.nir); + + return res; +} + +static void +emit_fast_clear_flush(struct radv_cmd_buffer *cmd_buffer, + const VkExtent2D *resolve_extent, + bool fmask_decompress) +{ + struct radv_device *device = cmd_buffer->device; + VkCommandBuffer cmd_buffer_h = radv_cmd_buffer_to_handle(cmd_buffer); + uint32_t offset; + const struct vertex_attrs vertex_data[3] = { + { + .position = { + 0, + 0, + }, + }, + { + .position = { + 0, + resolve_extent->height, + }, + }, + { + .position = { + resolve_extent->width, + 0, + }, + }, + }; + + cmd_buffer->state.flush_bits |= (RADV_CMD_FLAG_FLUSH_AND_INV_CB | + RADV_CMD_FLAG_FLUSH_AND_INV_CB_META); + radv_cmd_buffer_upload_data(cmd_buffer, sizeof(vertex_data), 16, vertex_data, &offset); + struct radv_buffer vertex_buffer = { + .device = device, + .size = sizeof(vertex_data), + .bo = cmd_buffer->upload.upload_bo, + .offset = offset, + }; + + VkBuffer vertex_buffer_h = radv_buffer_to_handle(&vertex_buffer); + + radv_CmdBindVertexBuffers(cmd_buffer_h, + /*firstBinding*/ 0, + /*bindingCount*/ 1, + (VkBuffer[]) { vertex_buffer_h }, + (VkDeviceSize[]) { 0 }); + + VkPipeline pipeline_h; + if (fmask_decompress) + pipeline_h = device->meta_state.fast_clear_flush.fmask_decompress_pipeline; + else + pipeline_h = device->meta_state.fast_clear_flush.cmask_eliminate_pipeline; + RADV_FROM_HANDLE(radv_pipeline, pipeline, pipeline_h); + + if (cmd_buffer->state.pipeline != pipeline) { + radv_CmdBindPipeline(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS, + pipeline_h); + } + + radv_CmdDraw(cmd_buffer_h, 3, 1, 0, 0); + cmd_buffer->state.flush_bits |= (RADV_CMD_FLAG_FLUSH_AND_INV_CB | + RADV_CMD_FLAG_FLUSH_AND_INV_CB_META); + si_emit_cache_flush(cmd_buffer); +} + +/** + */ +void +radv_fast_clear_flush_image_inplace(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *image) +{ + struct radv_meta_saved_state saved_state; + struct radv_meta_saved_pass_state saved_pass_state; + VkDevice device_h = radv_device_to_handle(cmd_buffer->device); + VkCommandBuffer cmd_buffer_h = radv_cmd_buffer_to_handle(cmd_buffer); + + assert(cmd_buffer->queue_family_index == RADV_QUEUE_GENERAL); + radv_meta_save_pass(&saved_pass_state, cmd_buffer); + radv_meta_save_graphics_reset_vport_scissor(&saved_state, cmd_buffer); + + struct radv_image_view iview; + radv_image_view_init(&iview, cmd_buffer->device, + &(VkImageViewCreateInfo) { + .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO, + .image = radv_image_to_handle(image), + .format = image->vk_format, + .subresourceRange = { + .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT, + .baseMipLevel = 0, + .levelCount = 1, + .baseArrayLayer = 0, + .layerCount = 1, + }, + }, + cmd_buffer, VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT); + + VkFramebuffer fb_h; + radv_CreateFramebuffer(device_h, + &(VkFramebufferCreateInfo) { + .sType = VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO, + .attachmentCount = 1, + .pAttachments = (VkImageView[]) { + radv_image_view_to_handle(&iview) + }, + .width = image->extent.width, + .height = image->extent.height, + .layers = 1 + }, + &cmd_buffer->pool->alloc, + &fb_h); + + radv_CmdBeginRenderPass(cmd_buffer_h, + &(VkRenderPassBeginInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, + .renderPass = cmd_buffer->device->meta_state.fast_clear_flush.pass, + .framebuffer = fb_h, + .renderArea = { + .offset = { + 0, + 0, + }, + .extent = { + image->extent.width, + image->extent.height, + } + }, + .clearValueCount = 0, + .pClearValues = NULL, + }, + VK_SUBPASS_CONTENTS_INLINE); + + emit_fast_clear_flush(cmd_buffer, + &(VkExtent2D) { image->extent.width, image->extent.height }, + image->fmask.size > 0); + radv_CmdEndRenderPass(cmd_buffer_h); + + radv_DestroyFramebuffer(device_h, fb_h, + &cmd_buffer->pool->alloc); + + radv_meta_restore(&saved_state, cmd_buffer); + radv_meta_restore_pass(&saved_pass_state, cmd_buffer); +} diff -Nru mesa-12.0.6/src/amd/vulkan/radv_meta.h mesa-17.0.7/src/amd/vulkan/radv_meta.h --- mesa-12.0.6/src/amd/vulkan/radv_meta.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_meta.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,214 @@ +/* + * Copyright © 2016 Red Hat + * based on intel anv code: + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef RADV_META_H +#define RADV_META_H + +#include "radv_private.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define RADV_META_VERTEX_BINDING_COUNT 2 + +struct radv_meta_saved_state { + struct radv_vertex_binding old_vertex_bindings[RADV_META_VERTEX_BINDING_COUNT]; + struct radv_descriptor_set *old_descriptor_set0; + struct radv_pipeline *old_pipeline; + + /** + * Bitmask of (1 << VK_DYNAMIC_STATE_*). Defines the set of saved dynamic + * state. + */ + uint32_t dynamic_mask; + struct radv_dynamic_state dynamic; + + char push_constants[128]; +}; + +struct radv_meta_saved_pass_state { + struct radv_render_pass *pass; + const struct radv_subpass *subpass; + struct radv_attachment_state *attachments; + struct radv_framebuffer *framebuffer; + VkRect2D render_area; +}; + +struct radv_meta_saved_compute_state { + struct radv_descriptor_set *old_descriptor_set0; + struct radv_pipeline *old_pipeline; + + char push_constants[128]; +}; + +VkResult radv_device_init_meta_clear_state(struct radv_device *device); +void radv_device_finish_meta_clear_state(struct radv_device *device); + +VkResult radv_device_init_meta_resolve_state(struct radv_device *device); +void radv_device_finish_meta_resolve_state(struct radv_device *device); + +VkResult radv_device_init_meta_depth_decomp_state(struct radv_device *device); +void radv_device_finish_meta_depth_decomp_state(struct radv_device *device); + +VkResult radv_device_init_meta_fast_clear_flush_state(struct radv_device *device); +void radv_device_finish_meta_fast_clear_flush_state(struct radv_device *device); + +VkResult radv_device_init_meta_blit_state(struct radv_device *device); +void radv_device_finish_meta_blit_state(struct radv_device *device); + +VkResult radv_device_init_meta_blit2d_state(struct radv_device *device); +void radv_device_finish_meta_blit2d_state(struct radv_device *device); + +VkResult radv_device_init_meta_buffer_state(struct radv_device *device); +void radv_device_finish_meta_buffer_state(struct radv_device *device); + +VkResult radv_device_init_meta_resolve_compute_state(struct radv_device *device); +void radv_device_finish_meta_resolve_compute_state(struct radv_device *device); +void radv_meta_save(struct radv_meta_saved_state *state, + const struct radv_cmd_buffer *cmd_buffer, + uint32_t dynamic_mask); + +void radv_meta_restore(const struct radv_meta_saved_state *state, + struct radv_cmd_buffer *cmd_buffer); + +void radv_meta_save_pass(struct radv_meta_saved_pass_state *state, + const struct radv_cmd_buffer *cmd_buffer); + +void radv_meta_restore_pass(const struct radv_meta_saved_pass_state *state, + struct radv_cmd_buffer *cmd_buffer); + +void radv_meta_save_compute(struct radv_meta_saved_compute_state *state, + const struct radv_cmd_buffer *cmd_buffer, + unsigned push_constant_size); + +void radv_meta_restore_compute(const struct radv_meta_saved_compute_state *state, + struct radv_cmd_buffer *cmd_buffer, + unsigned push_constant_size); + +VkImageViewType radv_meta_get_view_type(const struct radv_image *image); + +uint32_t radv_meta_get_iview_layer(const struct radv_image *dest_image, + const VkImageSubresourceLayers *dest_subresource, + const VkOffset3D *dest_offset); + +struct radv_meta_blit2d_surf { + /** The size of an element in bytes. */ + uint8_t bs; + VkFormat format; + + struct radv_image *image; + unsigned level; + unsigned layer; + VkImageAspectFlags aspect_mask; +}; + +struct radv_meta_blit2d_buffer { + struct radv_buffer *buffer; + uint32_t offset; + uint32_t pitch; + uint8_t bs; + VkFormat format; +}; + +struct radv_meta_blit2d_rect { + uint32_t src_x, src_y; + uint32_t dst_x, dst_y; + uint32_t width, height; +}; + +void radv_meta_begin_blit2d(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_saved_state *save); + +void radv_meta_blit2d(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_blit2d_surf *src_img, + struct radv_meta_blit2d_buffer *src_buf, + struct radv_meta_blit2d_surf *dst, + unsigned num_rects, + struct radv_meta_blit2d_rect *rects); + +void radv_meta_end_blit2d(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_saved_state *save); + + +VkResult radv_device_init_meta_bufimage_state(struct radv_device *device); +void radv_device_finish_meta_bufimage_state(struct radv_device *device); +void radv_meta_begin_bufimage(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_saved_compute_state *save); +void radv_meta_end_bufimage(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_saved_compute_state *save); +void radv_meta_begin_itoi(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_saved_compute_state *save); +void radv_meta_end_itoi(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_saved_compute_state *save); +void radv_meta_begin_cleari(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_saved_compute_state *save); +void radv_meta_end_cleari(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_saved_compute_state *save); +void radv_meta_image_to_buffer(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_blit2d_surf *src, + struct radv_meta_blit2d_buffer *dst, + unsigned num_rects, + struct radv_meta_blit2d_rect *rects); + +void radv_meta_buffer_to_image_cs(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_blit2d_buffer *src, + struct radv_meta_blit2d_surf *dst, + unsigned num_rects, + struct radv_meta_blit2d_rect *rects); +void radv_meta_image_to_image_cs(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_blit2d_surf *src, + struct radv_meta_blit2d_surf *dst, + unsigned num_rects, + struct radv_meta_blit2d_rect *rects); +void radv_meta_clear_image_cs(struct radv_cmd_buffer *cmd_buffer, + struct radv_meta_blit2d_surf *dst, + const VkClearColorValue *clear_color); + +void radv_decompress_depth_image_inplace(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *image, + VkImageSubresourceRange *subresourceRange); +void radv_resummarize_depth_image_inplace(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *image, + VkImageSubresourceRange *subresourceRange); +void radv_fast_clear_flush_image_inplace(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *image); + +void radv_meta_save_graphics_reset_vport_scissor(struct radv_meta_saved_state *saved_state, + struct radv_cmd_buffer *cmd_buffer); + +void radv_meta_resolve_compute_image(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *src_image, + VkImageLayout src_image_layout, + struct radv_image *dest_image, + VkImageLayout dest_image_layout, + uint32_t region_count, + const VkImageResolve *regions); + +#ifdef __cplusplus +} +#endif + +#endif /* RADV_META_H */ diff -Nru mesa-12.0.6/src/amd/vulkan/radv_meta_resolve.c mesa-17.0.7/src/amd/vulkan/radv_meta_resolve.c --- mesa-12.0.6/src/amd/vulkan/radv_meta_resolve.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_meta_resolve.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,627 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include +#include + +#include "radv_meta.h" +#include "radv_private.h" +#include "nir/nir_builder.h" +#include "sid.h" +/** + * Vertex attributes used by all pipelines. + */ +struct vertex_attrs { + float position[2]; /**< 3DPRIM_RECTLIST */ +}; + +/* passthrough vertex shader */ +static nir_shader * +build_nir_vs(void) +{ + const struct glsl_type *vec4 = glsl_vec4_type(); + + nir_builder b; + nir_variable *a_position; + nir_variable *v_position; + + nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_VERTEX, NULL); + b.shader->info->name = ralloc_strdup(b.shader, "meta_resolve_vs"); + + a_position = nir_variable_create(b.shader, nir_var_shader_in, vec4, + "a_position"); + a_position->data.location = VERT_ATTRIB_GENERIC0; + + v_position = nir_variable_create(b.shader, nir_var_shader_out, vec4, + "gl_Position"); + v_position->data.location = VARYING_SLOT_POS; + + nir_copy_var(&b, v_position, a_position); + + return b.shader; +} + +/* simple passthrough shader */ +static nir_shader * +build_nir_fs(void) +{ + const struct glsl_type *vec4 = glsl_vec4_type(); + nir_builder b; + nir_variable *f_color; /* vec4, fragment output color */ + + nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL); + b.shader->info->name = ralloc_asprintf(b.shader, + "meta_resolve_fs"); + + f_color = nir_variable_create(b.shader, nir_var_shader_out, vec4, + "f_color"); + f_color->data.location = FRAG_RESULT_DATA0; + nir_store_var(&b, f_color, nir_imm_vec4(&b, 0.0, 0.0, 0.0, 1.0), 0xf); + + return b.shader; +} + +static VkResult +create_pass(struct radv_device *device) +{ + VkResult result; + VkDevice device_h = radv_device_to_handle(device); + const VkAllocationCallbacks *alloc = &device->meta_state.alloc; + VkAttachmentDescription attachments[2]; + int i; + + for (i = 0; i < 2; i++) { + attachments[i].format = VK_FORMAT_UNDEFINED; + attachments[i].samples = 1; + attachments[i].loadOp = VK_ATTACHMENT_LOAD_OP_LOAD; + attachments[i].storeOp = VK_ATTACHMENT_STORE_OP_STORE; + attachments[i].initialLayout = VK_IMAGE_LAYOUT_GENERAL; + attachments[i].finalLayout = VK_IMAGE_LAYOUT_GENERAL; + } + + result = radv_CreateRenderPass(device_h, + &(VkRenderPassCreateInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO, + .attachmentCount = 2, + .pAttachments = attachments, + .subpassCount = 1, + .pSubpasses = &(VkSubpassDescription) { + .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS, + .inputAttachmentCount = 0, + .colorAttachmentCount = 2, + .pColorAttachments = (VkAttachmentReference[]) { + { + .attachment = 0, + .layout = VK_IMAGE_LAYOUT_GENERAL, + }, + { + .attachment = 1, + .layout = VK_IMAGE_LAYOUT_GENERAL, + }, + }, + .pResolveAttachments = NULL, + .pDepthStencilAttachment = &(VkAttachmentReference) { + .attachment = VK_ATTACHMENT_UNUSED, + }, + .preserveAttachmentCount = 0, + .pPreserveAttachments = NULL, + }, + .dependencyCount = 0, + }, + alloc, + &device->meta_state.resolve.pass); + + return result; +} + +static VkResult +create_pipeline(struct radv_device *device, + VkShaderModule vs_module_h) +{ + VkResult result; + VkDevice device_h = radv_device_to_handle(device); + + struct radv_shader_module fs_module = { + .nir = build_nir_fs(), + }; + + if (!fs_module.nir) { + /* XXX: Need more accurate error */ + result = VK_ERROR_OUT_OF_HOST_MEMORY; + goto cleanup; + } + + result = radv_graphics_pipeline_create(device_h, + radv_pipeline_cache_to_handle(&device->meta_state.cache), + &(VkGraphicsPipelineCreateInfo) { + .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO, + .stageCount = 2, + .pStages = (VkPipelineShaderStageCreateInfo[]) { + { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_VERTEX_BIT, + .module = vs_module_h, + .pName = "main", + }, + { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_FRAGMENT_BIT, + .module = radv_shader_module_to_handle(&fs_module), + .pName = "main", + }, + }, + .pVertexInputState = &(VkPipelineVertexInputStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO, + .vertexBindingDescriptionCount = 1, + .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) { + { + .binding = 0, + .stride = sizeof(struct vertex_attrs), + .inputRate = VK_VERTEX_INPUT_RATE_VERTEX + }, + }, + .vertexAttributeDescriptionCount = 1, + .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) { + { + /* Position */ + .location = 0, + .binding = 0, + .format = VK_FORMAT_R32G32_SFLOAT, + .offset = offsetof(struct vertex_attrs, position), + }, + }, + }, + .pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO, + .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP, + .primitiveRestartEnable = false, + }, + .pViewportState = &(VkPipelineViewportStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO, + .viewportCount = 0, + .scissorCount = 0, + }, + .pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO, + .depthClampEnable = false, + .rasterizerDiscardEnable = false, + .polygonMode = VK_POLYGON_MODE_FILL, + .cullMode = VK_CULL_MODE_NONE, + .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE, + }, + .pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO, + .rasterizationSamples = 1, + .sampleShadingEnable = false, + .pSampleMask = NULL, + .alphaToCoverageEnable = false, + .alphaToOneEnable = false, + }, + .pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) { + .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO, + .logicOpEnable = false, + .attachmentCount = 2, + .pAttachments = (VkPipelineColorBlendAttachmentState []) { + { + .colorWriteMask = VK_COLOR_COMPONENT_R_BIT | + VK_COLOR_COMPONENT_G_BIT | + VK_COLOR_COMPONENT_B_BIT | + VK_COLOR_COMPONENT_A_BIT, + }, + { + .colorWriteMask = 0, + + } + }, + }, + .pDynamicState = NULL, + .renderPass = device->meta_state.resolve.pass, + .subpass = 0, + }, + &(struct radv_graphics_pipeline_create_info) { + .use_rectlist = true, + .custom_blend_mode = V_028808_CB_RESOLVE, + }, + &device->meta_state.alloc, + &device->meta_state.resolve.pipeline); + if (result != VK_SUCCESS) + goto cleanup; + + goto cleanup; + +cleanup: + ralloc_free(fs_module.nir); + return result; +} + +void +radv_device_finish_meta_resolve_state(struct radv_device *device) +{ + struct radv_meta_state *state = &device->meta_state; + VkDevice device_h = radv_device_to_handle(device); + VkRenderPass pass_h = device->meta_state.resolve.pass; + const VkAllocationCallbacks *alloc = &device->meta_state.alloc; + + if (pass_h) + radv_DestroyRenderPass(device_h, pass_h, + &device->meta_state.alloc); + + VkPipeline pipeline_h = state->resolve.pipeline; + if (pipeline_h) { + radv_DestroyPipeline(device_h, pipeline_h, alloc); + } +} + +VkResult +radv_device_init_meta_resolve_state(struct radv_device *device) +{ + VkResult res = VK_SUCCESS; + + zero(device->meta_state.resolve); + + struct radv_shader_module vs_module = { .nir = build_nir_vs() }; + if (!vs_module.nir) { + /* XXX: Need more accurate error */ + res = VK_ERROR_OUT_OF_HOST_MEMORY; + goto fail; + } + + res = create_pass(device); + if (res != VK_SUCCESS) + goto fail; + + VkShaderModule vs_module_h = radv_shader_module_to_handle(&vs_module); + res = create_pipeline(device, vs_module_h); + if (res != VK_SUCCESS) + goto fail; + + goto cleanup; + +fail: + radv_device_finish_meta_resolve_state(device); + +cleanup: + ralloc_free(vs_module.nir); + + return res; +} + +static void +emit_resolve(struct radv_cmd_buffer *cmd_buffer, + const VkOffset2D *dest_offset, + const VkExtent2D *resolve_extent) +{ + struct radv_device *device = cmd_buffer->device; + VkCommandBuffer cmd_buffer_h = radv_cmd_buffer_to_handle(cmd_buffer); + uint32_t offset; + const struct vertex_attrs vertex_data[3] = { + { + .position = { + dest_offset->x, + dest_offset->y, + }, + }, + { + .position = { + dest_offset->x, + dest_offset->y + resolve_extent->height, + }, + }, + { + .position = { + dest_offset->x + resolve_extent->width, + dest_offset->y, + }, + }, + }; + + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB; + radv_cmd_buffer_upload_data(cmd_buffer, sizeof(vertex_data), 16, vertex_data, &offset); + struct radv_buffer vertex_buffer = { + .device = device, + .size = sizeof(vertex_data), + .bo = cmd_buffer->upload.upload_bo, + .offset = offset, + }; + + VkBuffer vertex_buffer_h = radv_buffer_to_handle(&vertex_buffer); + + radv_CmdBindVertexBuffers(cmd_buffer_h, + /*firstBinding*/ 0, + /*bindingCount*/ 1, + (VkBuffer[]) { vertex_buffer_h }, + (VkDeviceSize[]) { 0 }); + + VkPipeline pipeline_h = device->meta_state.resolve.pipeline; + RADV_FROM_HANDLE(radv_pipeline, pipeline, pipeline_h); + + if (cmd_buffer->state.pipeline != pipeline) { + radv_CmdBindPipeline(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS, + pipeline_h); + } + + radv_CmdDraw(cmd_buffer_h, 3, 1, 0, 0); + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB; + si_emit_cache_flush(cmd_buffer); +} + +void radv_CmdResolveImage( + VkCommandBuffer cmd_buffer_h, + VkImage src_image_h, + VkImageLayout src_image_layout, + VkImage dest_image_h, + VkImageLayout dest_image_layout, + uint32_t region_count, + const VkImageResolve* regions) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, cmd_buffer_h); + RADV_FROM_HANDLE(radv_image, src_image, src_image_h); + RADV_FROM_HANDLE(radv_image, dest_image, dest_image_h); + struct radv_device *device = cmd_buffer->device; + struct radv_meta_saved_state saved_state; + VkDevice device_h = radv_device_to_handle(device); + bool use_compute_resolve = false; + + /* we can use the hw resolve only for single full resolves */ + if (region_count == 1) { + if (regions[0].srcOffset.x || + regions[0].srcOffset.y || + regions[0].srcOffset.z) + use_compute_resolve = true; + if (regions[0].dstOffset.x || + regions[0].dstOffset.y || + regions[0].dstOffset.z) + use_compute_resolve = true; + + if (regions[0].extent.width != src_image->extent.width || + regions[0].extent.height != src_image->extent.height || + regions[0].extent.depth != src_image->extent.depth) + use_compute_resolve = true; + } else + use_compute_resolve = true; + + if (use_compute_resolve) { + + radv_fast_clear_flush_image_inplace(cmd_buffer, src_image); + radv_meta_resolve_compute_image(cmd_buffer, + src_image, + src_image_layout, + dest_image, + dest_image_layout, + region_count, regions); + return; + } + + radv_meta_save_graphics_reset_vport_scissor(&saved_state, cmd_buffer); + + assert(src_image->samples > 1); + assert(dest_image->samples == 1); + + if (src_image->samples >= 16) { + /* See commit aa3f9aaf31e9056a255f9e0472ebdfdaa60abe54 for the + * glBlitFramebuffer workaround for samples >= 16. + */ + radv_finishme("vkCmdResolveImage: need interpolation workaround when " + "samples >= 16"); + } + + if (src_image->array_size > 1) + radv_finishme("vkCmdResolveImage: multisample array images"); + + for (uint32_t r = 0; r < region_count; ++r) { + const VkImageResolve *region = ®ions[r]; + + /* From the Vulkan 1.0 spec: + * + * - The aspectMask member of srcSubresource and dstSubresource must + * only contain VK_IMAGE_ASPECT_COLOR_BIT + * + * - The layerCount member of srcSubresource and dstSubresource must + * match + */ + assert(region->srcSubresource.aspectMask == VK_IMAGE_ASPECT_COLOR_BIT); + assert(region->dstSubresource.aspectMask == VK_IMAGE_ASPECT_COLOR_BIT); + assert(region->srcSubresource.layerCount == + region->dstSubresource.layerCount); + + const uint32_t src_base_layer = + radv_meta_get_iview_layer(src_image, ®ion->srcSubresource, + ®ion->srcOffset); + + const uint32_t dest_base_layer = + radv_meta_get_iview_layer(dest_image, ®ion->dstSubresource, + ®ion->dstOffset); + + /** + * From Vulkan 1.0.6 spec: 18.6 Resolving Multisample Images + * + * extent is the size in texels of the source image to resolve in width, + * height and depth. 1D images use only x and width. 2D images use x, y, + * width and height. 3D images use x, y, z, width, height and depth. + * + * srcOffset and dstOffset select the initial x, y, and z offsets in + * texels of the sub-regions of the source and destination image data. + * extent is the size in texels of the source image to resolve in width, + * height and depth. 1D images use only x and width. 2D images use x, y, + * width and height. 3D images use x, y, z, width, height and depth. + */ + const struct VkExtent3D extent = + radv_sanitize_image_extent(src_image->type, region->extent); + const struct VkOffset3D dstOffset = + radv_sanitize_image_offset(dest_image->type, region->dstOffset); + + + for (uint32_t layer = 0; layer < region->srcSubresource.layerCount; + ++layer) { + + struct radv_image_view src_iview; + radv_image_view_init(&src_iview, cmd_buffer->device, + &(VkImageViewCreateInfo) { + .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO, + .image = src_image_h, + .viewType = radv_meta_get_view_type(src_image), + .format = src_image->vk_format, + .subresourceRange = { + .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT, + .baseMipLevel = region->srcSubresource.mipLevel, + .levelCount = 1, + .baseArrayLayer = src_base_layer + layer, + .layerCount = 1, + }, + }, + cmd_buffer, VK_IMAGE_USAGE_SAMPLED_BIT); + + struct radv_image_view dest_iview; + radv_image_view_init(&dest_iview, cmd_buffer->device, + &(VkImageViewCreateInfo) { + .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO, + .image = dest_image_h, + .viewType = radv_meta_get_view_type(dest_image), + .format = dest_image->vk_format, + .subresourceRange = { + .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT, + .baseMipLevel = region->dstSubresource.mipLevel, + .levelCount = 1, + .baseArrayLayer = dest_base_layer + layer, + .layerCount = 1, + }, + }, + cmd_buffer, VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT); + + VkFramebuffer fb_h; + radv_CreateFramebuffer(device_h, + &(VkFramebufferCreateInfo) { + .sType = VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO, + .attachmentCount = 2, + .pAttachments = (VkImageView[]) { + radv_image_view_to_handle(&src_iview), + radv_image_view_to_handle(&dest_iview), + }, + .width = radv_minify(dest_image->extent.width, + region->dstSubresource.mipLevel), + .height = radv_minify(dest_image->extent.height, + region->dstSubresource.mipLevel), + .layers = 1 + }, + &cmd_buffer->pool->alloc, + &fb_h); + + radv_CmdBeginRenderPass(cmd_buffer_h, + &(VkRenderPassBeginInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, + .renderPass = device->meta_state.resolve.pass, + .framebuffer = fb_h, + .renderArea = { + .offset = { + dstOffset.x, + dstOffset.y, + }, + .extent = { + extent.width, + extent.height, + } + }, + .clearValueCount = 0, + .pClearValues = NULL, + }, + VK_SUBPASS_CONTENTS_INLINE); + + emit_resolve(cmd_buffer, + &(VkOffset2D) { + .x = dstOffset.x, + .y = dstOffset.y, + }, + &(VkExtent2D) { + .width = extent.width, + .height = extent.height, + }); + + radv_CmdEndRenderPass(cmd_buffer_h); + + radv_DestroyFramebuffer(device_h, fb_h, + &cmd_buffer->pool->alloc); + } + } + + radv_meta_restore(&saved_state, cmd_buffer); +} + +/** + * Emit any needed resolves for the current subpass. + */ +void +radv_cmd_buffer_resolve_subpass(struct radv_cmd_buffer *cmd_buffer) +{ + struct radv_framebuffer *fb = cmd_buffer->state.framebuffer; + const struct radv_subpass *subpass = cmd_buffer->state.subpass; + struct radv_meta_saved_state saved_state; + + /* FINISHME(perf): Skip clears for resolve attachments. + * + * From the Vulkan 1.0 spec: + * + * If the first use of an attachment in a render pass is as a resolve + * attachment, then the loadOp is effectively ignored as the resolve is + * guaranteed to overwrite all pixels in the render area. + */ + + if (!subpass->has_resolve) + return; + + radv_meta_save_graphics_reset_vport_scissor(&saved_state, cmd_buffer); + + for (uint32_t i = 0; i < subpass->color_count; ++i) { + VkAttachmentReference src_att = subpass->color_attachments[i]; + VkAttachmentReference dest_att = subpass->resolve_attachments[i]; + struct radv_image *dst_img = cmd_buffer->state.framebuffer->attachments[dest_att.attachment].attachment->image; + if (dest_att.attachment == VK_ATTACHMENT_UNUSED) + continue; + + if (dst_img->surface.dcc_size) { + radv_initialize_dcc(cmd_buffer, dst_img, 0xffffffff); + cmd_buffer->state.attachments[dest_att.attachment].current_layout = VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL; + } + + struct radv_subpass resolve_subpass = { + .color_count = 2, + .color_attachments = (VkAttachmentReference[]) { src_att, dest_att }, + .depth_stencil_attachment = { .attachment = VK_ATTACHMENT_UNUSED }, + }; + + radv_cmd_buffer_set_subpass(cmd_buffer, &resolve_subpass, false); + + /* Subpass resolves must respect the render area. We can ignore the + * render area here because vkCmdBeginRenderPass set the render area + * with 3DSTATE_DRAWING_RECTANGLE. + * + * XXX(chadv): Does the hardware really respect + * 3DSTATE_DRAWING_RECTANGLE when draing a 3DPRIM_RECTLIST? + */ + emit_resolve(cmd_buffer, + &(VkOffset2D) { 0, 0 }, + &(VkExtent2D) { fb->width, fb->height }); + } + + cmd_buffer->state.subpass = subpass; + radv_meta_restore(&saved_state, cmd_buffer); +} diff -Nru mesa-12.0.6/src/amd/vulkan/radv_meta_resolve_cs.c mesa-17.0.7/src/amd/vulkan/radv_meta_resolve_cs.c --- mesa-12.0.6/src/amd/vulkan/radv_meta_resolve_cs.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_meta_resolve_cs.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,461 @@ +/* + * Copyright © 2016 Dave Airlie + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + + +#include +#include + +#include "radv_meta.h" +#include "radv_private.h" +#include "nir/nir_builder.h" +#include "sid.h" +#include "vk_format.h" + +static nir_shader * +build_resolve_compute_shader(struct radv_device *dev, bool is_integer, int samples) +{ + nir_builder b; + char name[64]; + nir_if *outer_if = NULL; + const struct glsl_type *sampler_type = glsl_sampler_type(GLSL_SAMPLER_DIM_MS, + false, + false, + GLSL_TYPE_FLOAT); + const struct glsl_type *img_type = glsl_sampler_type(GLSL_SAMPLER_DIM_2D, + false, + false, + GLSL_TYPE_FLOAT); + snprintf(name, 64, "meta_resolve_cs-%d-%s", samples, is_integer ? "int" : "float"); + nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_COMPUTE, NULL); + b.shader->info->name = ralloc_strdup(b.shader, name); + b.shader->info->cs.local_size[0] = 16; + b.shader->info->cs.local_size[1] = 16; + b.shader->info->cs.local_size[2] = 1; + + nir_variable *input_img = nir_variable_create(b.shader, nir_var_uniform, + sampler_type, "s_tex"); + input_img->data.descriptor_set = 0; + input_img->data.binding = 0; + + nir_variable *output_img = nir_variable_create(b.shader, nir_var_uniform, + img_type, "out_img"); + output_img->data.descriptor_set = 0; + output_img->data.binding = 1; + nir_ssa_def *invoc_id = nir_load_system_value(&b, nir_intrinsic_load_local_invocation_id, 0); + nir_ssa_def *wg_id = nir_load_system_value(&b, nir_intrinsic_load_work_group_id, 0); + nir_ssa_def *block_size = nir_imm_ivec4(&b, + b.shader->info->cs.local_size[0], + b.shader->info->cs.local_size[1], + b.shader->info->cs.local_size[2], 0); + + nir_ssa_def *global_id = nir_iadd(&b, nir_imul(&b, wg_id, block_size), invoc_id); + + nir_intrinsic_instr *src_offset = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant); + src_offset->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0)); + src_offset->num_components = 2; + nir_ssa_dest_init(&src_offset->instr, &src_offset->dest, 2, 32, "src_offset"); + nir_builder_instr_insert(&b, &src_offset->instr); + + nir_intrinsic_instr *dst_offset = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant); + dst_offset->src[0] = nir_src_for_ssa(nir_imm_int(&b, 8)); + dst_offset->num_components = 2; + nir_ssa_dest_init(&dst_offset->instr, &dst_offset->dest, 2, 32, "dst_offset"); + nir_builder_instr_insert(&b, &dst_offset->instr); + + nir_ssa_def *img_coord = nir_iadd(&b, global_id, &src_offset->dest.ssa); + /* do a txf_ms on each sample */ + nir_ssa_def *tmp; + + nir_tex_instr *tex = nir_tex_instr_create(b.shader, 2); + tex->sampler_dim = GLSL_SAMPLER_DIM_MS; + tex->op = nir_texop_txf_ms; + tex->src[0].src_type = nir_tex_src_coord; + tex->src[0].src = nir_src_for_ssa(img_coord); + tex->src[1].src_type = nir_tex_src_ms_index; + tex->src[1].src = nir_src_for_ssa(nir_imm_int(&b, 0)); + tex->dest_type = nir_type_float; + tex->is_array = false; + tex->coord_components = 2; + tex->texture = nir_deref_var_create(tex, input_img); + tex->sampler = NULL; + + nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex"); + nir_builder_instr_insert(&b, &tex->instr); + + tmp = &tex->dest.ssa; + nir_variable *color = + nir_local_variable_create(b.impl, glsl_vec4_type(), "color"); + + if (!is_integer && samples > 1) { + nir_tex_instr *tex_all_same = nir_tex_instr_create(b.shader, 1); + tex_all_same->sampler_dim = GLSL_SAMPLER_DIM_MS; + tex_all_same->op = nir_texop_samples_identical; + tex_all_same->src[0].src_type = nir_tex_src_coord; + tex_all_same->src[0].src = nir_src_for_ssa(img_coord); + tex_all_same->dest_type = nir_type_float; + tex_all_same->is_array = false; + tex_all_same->coord_components = 2; + tex_all_same->texture = nir_deref_var_create(tex_all_same, input_img); + tex_all_same->sampler = NULL; + + nir_ssa_dest_init(&tex_all_same->instr, &tex_all_same->dest, 1, 32, "tex"); + nir_builder_instr_insert(&b, &tex_all_same->instr); + + nir_ssa_def *all_same = nir_ine(&b, &tex_all_same->dest.ssa, nir_imm_int(&b, 0)); + nir_if *if_stmt = nir_if_create(b.shader); + if_stmt->condition = nir_src_for_ssa(all_same); + nir_cf_node_insert(b.cursor, &if_stmt->cf_node); + + b.cursor = nir_after_cf_list(&if_stmt->then_list); + for (int i = 1; i < samples; i++) { + nir_tex_instr *tex_add = nir_tex_instr_create(b.shader, 2); + tex_add->sampler_dim = GLSL_SAMPLER_DIM_MS; + tex_add->op = nir_texop_txf_ms; + tex_add->src[0].src_type = nir_tex_src_coord; + tex_add->src[0].src = nir_src_for_ssa(img_coord); + tex_add->src[1].src_type = nir_tex_src_ms_index; + tex_add->src[1].src = nir_src_for_ssa(nir_imm_int(&b, i)); + tex_add->dest_type = nir_type_float; + tex_add->is_array = false; + tex_add->coord_components = 2; + tex_add->texture = nir_deref_var_create(tex_add, input_img); + tex_add->sampler = NULL; + + nir_ssa_dest_init(&tex_add->instr, &tex_add->dest, 4, 32, "tex"); + nir_builder_instr_insert(&b, &tex_add->instr); + + tmp = nir_fadd(&b, tmp, &tex_add->dest.ssa); + } + + tmp = nir_fdiv(&b, tmp, nir_imm_float(&b, samples)); + nir_store_var(&b, color, tmp, 0xf); + b.cursor = nir_after_cf_list(&if_stmt->else_list); + outer_if = if_stmt; + } + nir_store_var(&b, color, &tex->dest.ssa, 0xf); + + if (outer_if) + b.cursor = nir_after_cf_node(&outer_if->cf_node); + + nir_ssa_def *newv = nir_load_var(&b, color); + nir_ssa_def *coord = nir_iadd(&b, global_id, &dst_offset->dest.ssa); + nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_store); + store->src[0] = nir_src_for_ssa(coord); + store->src[1] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32)); + store->src[2] = nir_src_for_ssa(newv); + store->variables[0] = nir_deref_var_create(store, output_img); + nir_builder_instr_insert(&b, &store->instr); + return b.shader; +} + + +static VkResult +create_layout(struct radv_device *device) +{ + VkResult result; + /* + * two descriptors one for the image being sampled + * one for the buffer being written. + */ + VkDescriptorSetLayoutCreateInfo ds_create_info = { + .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO, + .bindingCount = 2, + .pBindings = (VkDescriptorSetLayoutBinding[]) { + { + .binding = 0, + .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, + .descriptorCount = 1, + .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT, + .pImmutableSamplers = NULL + }, + { + .binding = 1, + .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, + .descriptorCount = 1, + .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT, + .pImmutableSamplers = NULL + }, + } + }; + + result = radv_CreateDescriptorSetLayout(radv_device_to_handle(device), + &ds_create_info, + &device->meta_state.alloc, + &device->meta_state.resolve_compute.ds_layout); + if (result != VK_SUCCESS) + goto fail; + + + VkPipelineLayoutCreateInfo pl_create_info = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO, + .setLayoutCount = 1, + .pSetLayouts = &device->meta_state.resolve_compute.ds_layout, + .pushConstantRangeCount = 1, + .pPushConstantRanges = &(VkPushConstantRange){VK_SHADER_STAGE_COMPUTE_BIT, 0, 16}, + }; + + result = radv_CreatePipelineLayout(radv_device_to_handle(device), + &pl_create_info, + &device->meta_state.alloc, + &device->meta_state.resolve_compute.p_layout); + if (result != VK_SUCCESS) + goto fail; + return VK_SUCCESS; +fail: + return result; +} + +static VkResult +create_resolve_pipeline(struct radv_device *device, + int samples, + bool is_integer, + VkPipeline *pipeline) +{ + VkResult result; + struct radv_shader_module cs = { .nir = NULL }; + + cs.nir = build_resolve_compute_shader(device, is_integer, samples); + + /* compute shader */ + + VkPipelineShaderStageCreateInfo pipeline_shader_stage = { + .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, + .stage = VK_SHADER_STAGE_COMPUTE_BIT, + .module = radv_shader_module_to_handle(&cs), + .pName = "main", + .pSpecializationInfo = NULL, + }; + + VkComputePipelineCreateInfo vk_pipeline_info = { + .sType = VK_STRUCTURE_TYPE_COMPUTE_PIPELINE_CREATE_INFO, + .stage = pipeline_shader_stage, + .flags = 0, + .layout = device->meta_state.resolve_compute.p_layout, + }; + + result = radv_CreateComputePipelines(radv_device_to_handle(device), + radv_pipeline_cache_to_handle(&device->meta_state.cache), + 1, &vk_pipeline_info, NULL, + pipeline); + if (result != VK_SUCCESS) + goto fail; + + ralloc_free(cs.nir); + return VK_SUCCESS; +fail: + ralloc_free(cs.nir); + return result; +} + +VkResult +radv_device_init_meta_resolve_compute_state(struct radv_device *device) +{ + struct radv_meta_state *state = &device->meta_state; + VkResult res; + memset(&device->meta_state.resolve_compute, 0, sizeof(device->meta_state.resolve_compute)); + + res = create_layout(device); + if (res != VK_SUCCESS) + return res; + + for (uint32_t i = 0; i < MAX_SAMPLES_LOG2; ++i) { + uint32_t samples = 1 << i; + + res = create_resolve_pipeline(device, samples, false, + &state->resolve_compute.rc[i].pipeline); + + res = create_resolve_pipeline(device, samples, true, + &state->resolve_compute.rc[i].i_pipeline); + + } + + return res; +} + +void +radv_device_finish_meta_resolve_compute_state(struct radv_device *device) +{ + struct radv_meta_state *state = &device->meta_state; + for (uint32_t i = 0; i < MAX_SAMPLES_LOG2; ++i) { + radv_DestroyPipeline(radv_device_to_handle(device), + state->resolve_compute.rc[i].pipeline, + &state->alloc); + + radv_DestroyPipeline(radv_device_to_handle(device), + state->resolve_compute.rc[i].i_pipeline, + &state->alloc); + } + + radv_DestroyDescriptorSetLayout(radv_device_to_handle(device), + state->resolve_compute.ds_layout, + &state->alloc); + radv_DestroyPipelineLayout(radv_device_to_handle(device), + state->resolve_compute.p_layout, + &state->alloc); +} + +void radv_meta_resolve_compute_image(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *src_image, + VkImageLayout src_image_layout, + struct radv_image *dest_image, + VkImageLayout dest_image_layout, + uint32_t region_count, + const VkImageResolve *regions) +{ + struct radv_device *device = cmd_buffer->device; + struct radv_meta_saved_compute_state saved_state; + const uint32_t samples = src_image->samples; + const uint32_t samples_log2 = ffs(samples) - 1; + radv_meta_save_compute(&saved_state, cmd_buffer, 16); + + for (uint32_t r = 0; r < region_count; ++r) { + const VkImageResolve *region = ®ions[r]; + + assert(region->srcSubresource.aspectMask == VK_IMAGE_ASPECT_COLOR_BIT); + assert(region->dstSubresource.aspectMask == VK_IMAGE_ASPECT_COLOR_BIT); + assert(region->srcSubresource.layerCount == region->dstSubresource.layerCount); + + const uint32_t src_base_layer = + radv_meta_get_iview_layer(src_image, ®ion->srcSubresource, + ®ion->srcOffset); + + const uint32_t dest_base_layer = + radv_meta_get_iview_layer(dest_image, ®ion->dstSubresource, + ®ion->dstOffset); + + const struct VkExtent3D extent = + radv_sanitize_image_extent(src_image->type, region->extent); + const struct VkOffset3D srcOffset = + radv_sanitize_image_offset(src_image->type, region->srcOffset); + const struct VkOffset3D dstOffset = + radv_sanitize_image_offset(dest_image->type, region->dstOffset); + + for (uint32_t layer = 0; layer < region->srcSubresource.layerCount; + ++layer) { + + struct radv_image_view src_iview; + VkDescriptorSet set; + radv_image_view_init(&src_iview, cmd_buffer->device, + &(VkImageViewCreateInfo) { + .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO, + .image = radv_image_to_handle(src_image), + .viewType = radv_meta_get_view_type(src_image), + .format = src_image->vk_format, + .subresourceRange = { + .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT, + .baseMipLevel = region->srcSubresource.mipLevel, + .levelCount = 1, + .baseArrayLayer = src_base_layer + layer, + .layerCount = 1, + }, + }, + cmd_buffer, VK_IMAGE_USAGE_SAMPLED_BIT); + + struct radv_image_view dest_iview; + radv_image_view_init(&dest_iview, cmd_buffer->device, + &(VkImageViewCreateInfo) { + .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO, + .image = radv_image_to_handle(dest_image), + .viewType = radv_meta_get_view_type(dest_image), + .format = dest_image->vk_format, + .subresourceRange = { + .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT, + .baseMipLevel = region->dstSubresource.mipLevel, + .levelCount = 1, + .baseArrayLayer = dest_base_layer + layer, + .layerCount = 1, + }, + }, + cmd_buffer, VK_IMAGE_USAGE_STORAGE_BIT); + + + radv_temp_descriptor_set_create(device, cmd_buffer, + device->meta_state.resolve_compute.ds_layout, + &set); + + radv_UpdateDescriptorSets(radv_device_to_handle(device), + 2, /* writeCount */ + (VkWriteDescriptorSet[]) { + { + .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, + .dstSet = set, + .dstBinding = 0, + .dstArrayElement = 0, + .descriptorCount = 1, + .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, + .pImageInfo = (VkDescriptorImageInfo[]) { + { + .sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(&src_iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + } + }, + { + .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, + .dstSet = set, + .dstBinding = 1, + .dstArrayElement = 0, + .descriptorCount = 1, + .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, + .pImageInfo = (VkDescriptorImageInfo[]) { + { + .sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(&dest_iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + } + } + }, 0, NULL); + + radv_CmdBindDescriptorSets(radv_cmd_buffer_to_handle(cmd_buffer), + VK_PIPELINE_BIND_POINT_COMPUTE, + device->meta_state.resolve_compute.p_layout, 0, 1, + &set, 0, NULL); + + VkPipeline pipeline; + if (vk_format_is_int(src_image->vk_format)) + pipeline = device->meta_state.resolve_compute.rc[samples_log2].i_pipeline; + else + pipeline = device->meta_state.resolve_compute.rc[samples_log2].pipeline; + if (cmd_buffer->state.compute_pipeline != radv_pipeline_from_handle(pipeline)) { + radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), + VK_PIPELINE_BIND_POINT_COMPUTE, pipeline); + } + + unsigned push_constants[4] = { + srcOffset.x, + srcOffset.y, + dstOffset.x, + dstOffset.y, + }; + radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer), + device->meta_state.resolve_compute.p_layout, + VK_SHADER_STAGE_COMPUTE_BIT, 0, 16, + push_constants); + radv_unaligned_dispatch(cmd_buffer, extent.width, extent.height, 1); + radv_temp_descriptor_set_destroy(cmd_buffer->device, set); + } + } + radv_meta_restore_compute(&saved_state, cmd_buffer, 16); +} diff -Nru mesa-12.0.6/src/amd/vulkan/radv_pass.c mesa-17.0.7/src/amd/vulkan/radv_pass.c --- mesa-12.0.6/src/amd/vulkan/radv_pass.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_pass.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,183 @@ +/* + * Copyright © 2016 Red Hat. + * Copyright © 2016 Bas Nieuwenhuizen + * + * based in part on anv driver which is: + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ +#include "radv_private.h" + +VkResult radv_CreateRenderPass( + VkDevice _device, + const VkRenderPassCreateInfo* pCreateInfo, + const VkAllocationCallbacks* pAllocator, + VkRenderPass* pRenderPass) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + struct radv_render_pass *pass; + size_t size; + size_t attachments_offset; + + assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO); + + size = sizeof(*pass); + size += pCreateInfo->subpassCount * sizeof(pass->subpasses[0]); + attachments_offset = size; + size += pCreateInfo->attachmentCount * sizeof(pass->attachments[0]); + + pass = vk_alloc2(&device->alloc, pAllocator, size, 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (pass == NULL) + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + + memset(pass, 0, size); + pass->attachment_count = pCreateInfo->attachmentCount; + pass->subpass_count = pCreateInfo->subpassCount; + pass->attachments = (void *) pass + attachments_offset; + + for (uint32_t i = 0; i < pCreateInfo->attachmentCount; i++) { + struct radv_render_pass_attachment *att = &pass->attachments[i]; + + att->format = pCreateInfo->pAttachments[i].format; + att->samples = pCreateInfo->pAttachments[i].samples; + att->load_op = pCreateInfo->pAttachments[i].loadOp; + att->stencil_load_op = pCreateInfo->pAttachments[i].stencilLoadOp; + att->initial_layout = pCreateInfo->pAttachments[i].initialLayout; + att->final_layout = pCreateInfo->pAttachments[i].finalLayout; + // att->store_op = pCreateInfo->pAttachments[i].storeOp; + // att->stencil_store_op = pCreateInfo->pAttachments[i].stencilStoreOp; + } + uint32_t subpass_attachment_count = 0; + VkAttachmentReference *p; + for (uint32_t i = 0; i < pCreateInfo->subpassCount; i++) { + const VkSubpassDescription *desc = &pCreateInfo->pSubpasses[i]; + + subpass_attachment_count += + desc->inputAttachmentCount + + desc->colorAttachmentCount + + /* Count colorAttachmentCount again for resolve_attachments */ + desc->colorAttachmentCount; + } + + if (subpass_attachment_count) { + pass->subpass_attachments = + vk_alloc2(&device->alloc, pAllocator, + subpass_attachment_count * sizeof(VkAttachmentReference), 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (pass->subpass_attachments == NULL) { + vk_free2(&device->alloc, pAllocator, pass); + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + } + } else + pass->subpass_attachments = NULL; + + p = pass->subpass_attachments; + for (uint32_t i = 0; i < pCreateInfo->subpassCount; i++) { + const VkSubpassDescription *desc = &pCreateInfo->pSubpasses[i]; + struct radv_subpass *subpass = &pass->subpasses[i]; + + subpass->input_count = desc->inputAttachmentCount; + subpass->color_count = desc->colorAttachmentCount; + + if (desc->inputAttachmentCount > 0) { + subpass->input_attachments = p; + p += desc->inputAttachmentCount; + + for (uint32_t j = 0; j < desc->inputAttachmentCount; j++) { + subpass->input_attachments[j] + = desc->pInputAttachments[j]; + } + } + + if (desc->colorAttachmentCount > 0) { + subpass->color_attachments = p; + p += desc->colorAttachmentCount; + + for (uint32_t j = 0; j < desc->colorAttachmentCount; j++) { + subpass->color_attachments[j] + = desc->pColorAttachments[j]; + } + } + + subpass->has_resolve = false; + if (desc->pResolveAttachments) { + subpass->resolve_attachments = p; + p += desc->colorAttachmentCount; + + for (uint32_t j = 0; j < desc->colorAttachmentCount; j++) { + uint32_t a = desc->pResolveAttachments[j].attachment; + subpass->resolve_attachments[j] + = desc->pResolveAttachments[j]; + if (a != VK_ATTACHMENT_UNUSED) + subpass->has_resolve = true; + } + } + + if (desc->pDepthStencilAttachment) { + subpass->depth_stencil_attachment = + *desc->pDepthStencilAttachment; + } else { + subpass->depth_stencil_attachment.attachment = VK_ATTACHMENT_UNUSED; + } + } + + for (unsigned i = 0; i < pCreateInfo->dependencyCount; ++i) { + uint32_t dst = pCreateInfo->pDependencies[i].dstSubpass; + if (dst == VK_SUBPASS_EXTERNAL) { + pass->end_barrier.src_stage_mask = pCreateInfo->pDependencies[i].srcStageMask; + pass->end_barrier.src_access_mask = pCreateInfo->pDependencies[i].srcAccessMask; + pass->end_barrier.dst_access_mask = pCreateInfo->pDependencies[i].dstAccessMask; + } else { + pass->subpasses[dst].start_barrier.src_stage_mask = pCreateInfo->pDependencies[i].srcStageMask; + pass->subpasses[dst].start_barrier.src_access_mask = pCreateInfo->pDependencies[i].srcAccessMask; + pass->subpasses[dst].start_barrier.dst_access_mask = pCreateInfo->pDependencies[i].dstAccessMask; + } + } + + *pRenderPass = radv_render_pass_to_handle(pass); + + return VK_SUCCESS; +} + +void radv_DestroyRenderPass( + VkDevice _device, + VkRenderPass _pass, + const VkAllocationCallbacks* pAllocator) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_render_pass, pass, _pass); + + if (!_pass) + return; + vk_free2(&device->alloc, pAllocator, pass->subpass_attachments); + vk_free2(&device->alloc, pAllocator, pass); +} + +void radv_GetRenderAreaGranularity( + VkDevice device, + VkRenderPass renderPass, + VkExtent2D* pGranularity) +{ + pGranularity->width = 1; + pGranularity->height = 1; +} + diff -Nru mesa-12.0.6/src/amd/vulkan/radv_pipeline.c mesa-17.0.7/src/amd/vulkan/radv_pipeline.c --- mesa-12.0.6/src/amd/vulkan/radv_pipeline.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_pipeline.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,1542 @@ +/* + * Copyright © 2016 Red Hat. + * Copyright © 2016 Bas Nieuwenhuizen + * + * based in part on anv driver which is: + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "util/mesa-sha1.h" +#include "radv_private.h" +#include "nir/nir.h" +#include "nir/nir_builder.h" +#include "spirv/nir_spirv.h" + +#include +#include + +#include "sid.h" +#include "r600d_common.h" +#include "ac_binary.h" +#include "ac_llvm_util.h" +#include "ac_nir_to_llvm.h" +#include "vk_format.h" +#include "util/debug.h" +void radv_shader_variant_destroy(struct radv_device *device, + struct radv_shader_variant *variant); + +static const struct nir_shader_compiler_options nir_options = { + .vertex_id_zero_based = true, + .lower_scmp = true, + .lower_flrp32 = true, + .lower_fsat = true, + .lower_pack_snorm_2x16 = true, + .lower_pack_snorm_4x8 = true, + .lower_pack_unorm_2x16 = true, + .lower_pack_unorm_4x8 = true, + .lower_unpack_snorm_2x16 = true, + .lower_unpack_snorm_4x8 = true, + .lower_unpack_unorm_2x16 = true, + .lower_unpack_unorm_4x8 = true, + .lower_extract_byte = true, + .lower_extract_word = true, +}; + +VkResult radv_CreateShaderModule( + VkDevice _device, + const VkShaderModuleCreateInfo* pCreateInfo, + const VkAllocationCallbacks* pAllocator, + VkShaderModule* pShaderModule) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + struct radv_shader_module *module; + + assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SHADER_MODULE_CREATE_INFO); + assert(pCreateInfo->flags == 0); + + module = vk_alloc2(&device->alloc, pAllocator, + sizeof(*module) + pCreateInfo->codeSize, 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (module == NULL) + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + + module->nir = NULL; + module->size = pCreateInfo->codeSize; + memcpy(module->data, pCreateInfo->pCode, module->size); + + _mesa_sha1_compute(module->data, module->size, module->sha1); + + *pShaderModule = radv_shader_module_to_handle(module); + + return VK_SUCCESS; +} + +void radv_DestroyShaderModule( + VkDevice _device, + VkShaderModule _module, + const VkAllocationCallbacks* pAllocator) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_shader_module, module, _module); + + if (!module) + return; + + vk_free2(&device->alloc, pAllocator, module); +} + +void radv_DestroyPipeline( + VkDevice _device, + VkPipeline _pipeline, + const VkAllocationCallbacks* pAllocator) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_pipeline, pipeline, _pipeline); + + if (!_pipeline) + return; + + for (unsigned i = 0; i < MESA_SHADER_STAGES; ++i) + if (pipeline->shaders[i]) + radv_shader_variant_destroy(device, pipeline->shaders[i]); + + vk_free2(&device->alloc, pAllocator, pipeline); +} + + +static void +radv_optimize_nir(struct nir_shader *shader) +{ + bool progress; + + do { + progress = false; + + NIR_PASS_V(shader, nir_lower_vars_to_ssa); + NIR_PASS_V(shader, nir_lower_alu_to_scalar); + NIR_PASS_V(shader, nir_lower_phis_to_scalar); + + NIR_PASS(progress, shader, nir_copy_prop); + NIR_PASS(progress, shader, nir_opt_remove_phis); + NIR_PASS(progress, shader, nir_opt_dce); + NIR_PASS(progress, shader, nir_opt_dead_cf); + NIR_PASS(progress, shader, nir_opt_cse); + NIR_PASS(progress, shader, nir_opt_peephole_select, 8); + NIR_PASS(progress, shader, nir_opt_algebraic); + NIR_PASS(progress, shader, nir_opt_constant_folding); + NIR_PASS(progress, shader, nir_opt_undef); + NIR_PASS(progress, shader, nir_opt_conditional_discard); + } while (progress); +} + +static nir_shader * +radv_shader_compile_to_nir(struct radv_device *device, + struct radv_shader_module *module, + const char *entrypoint_name, + gl_shader_stage stage, + const VkSpecializationInfo *spec_info, + bool dump) +{ + if (strcmp(entrypoint_name, "main") != 0) { + radv_finishme("Multiple shaders per module not really supported"); + } + + nir_shader *nir; + nir_function *entry_point; + if (module->nir) { + /* Some things such as our meta clear/blit code will give us a NIR + * shader directly. In that case, we just ignore the SPIR-V entirely + * and just use the NIR shader */ + nir = module->nir; + nir->options = &nir_options; + nir_validate_shader(nir); + + assert(exec_list_length(&nir->functions) == 1); + struct exec_node *node = exec_list_get_head(&nir->functions); + entry_point = exec_node_data(nir_function, node, node); + } else { + uint32_t *spirv = (uint32_t *) module->data; + assert(module->size % 4 == 0); + + uint32_t num_spec_entries = 0; + struct nir_spirv_specialization *spec_entries = NULL; + if (spec_info && spec_info->mapEntryCount > 0) { + num_spec_entries = spec_info->mapEntryCount; + spec_entries = malloc(num_spec_entries * sizeof(*spec_entries)); + for (uint32_t i = 0; i < num_spec_entries; i++) { + VkSpecializationMapEntry entry = spec_info->pMapEntries[i]; + const void *data = spec_info->pData + entry.offset; + assert(data + entry.size <= spec_info->pData + spec_info->dataSize); + + spec_entries[i].id = spec_info->pMapEntries[i].constantID; + if (spec_info->dataSize == 8) + spec_entries[i].data64 = *(const uint64_t *)data; + else + spec_entries[i].data32 = *(const uint32_t *)data; + } + } + const struct nir_spirv_supported_extensions supported_ext = { + }; + entry_point = spirv_to_nir(spirv, module->size / 4, + spec_entries, num_spec_entries, + stage, entrypoint_name, &supported_ext, &nir_options); + nir = entry_point->shader; + assert(nir->stage == stage); + nir_validate_shader(nir); + + free(spec_entries); + + /* We have to lower away local constant initializers right before we + * inline functions. That way they get properly initialized at the top + * of the function and not at the top of its caller. + */ + NIR_PASS_V(nir, nir_lower_constant_initializers, nir_var_local); + NIR_PASS_V(nir, nir_lower_returns); + NIR_PASS_V(nir, nir_inline_functions); + + /* Pick off the single entrypoint that we want */ + foreach_list_typed_safe(nir_function, func, node, &nir->functions) { + if (func != entry_point) + exec_node_remove(&func->node); + } + assert(exec_list_length(&nir->functions) == 1); + entry_point->name = ralloc_strdup(entry_point, "main"); + + NIR_PASS_V(nir, nir_remove_dead_variables, + nir_var_shader_in | nir_var_shader_out | nir_var_system_value); + + /* Now that we've deleted all but the main function, we can go ahead and + * lower the rest of the constant initializers. + */ + NIR_PASS_V(nir, nir_lower_constant_initializers, ~0); + NIR_PASS_V(nir, nir_lower_system_values); + } + + /* Vulkan uses the separate-shader linking model */ + nir->info->separate_shader = true; + + // nir = brw_preprocess_nir(compiler, nir); + + nir_shader_gather_info(nir, entry_point->impl); + + nir_variable_mode indirect_mask = 0; + // if (compiler->glsl_compiler_options[stage].EmitNoIndirectInput) + indirect_mask |= nir_var_shader_in; + // if (compiler->glsl_compiler_options[stage].EmitNoIndirectTemp) + indirect_mask |= nir_var_local; + + nir_lower_indirect_derefs(nir, indirect_mask); + + static const nir_lower_tex_options tex_options = { + .lower_txp = ~0, + }; + + nir_lower_tex(nir, &tex_options); + + nir_lower_vars_to_ssa(nir); + nir_lower_var_copies(nir); + nir_lower_global_vars_to_local(nir); + nir_remove_dead_variables(nir, nir_var_local); + radv_optimize_nir(nir); + + if (dump) + nir_print_shader(nir, stderr); + + return nir; +} + +static const char *radv_get_shader_name(struct radv_shader_variant *var, + gl_shader_stage stage) +{ + switch (stage) { + case MESA_SHADER_VERTEX: return "Vertex Shader as VS"; + case MESA_SHADER_FRAGMENT: return "Pixel Shader"; + case MESA_SHADER_COMPUTE: return "Compute Shader"; + default: + return "Unknown shader"; + }; + +} +static void radv_dump_pipeline_stats(struct radv_device *device, struct radv_pipeline *pipeline) +{ + unsigned lds_increment = device->physical_device->rad_info.chip_class >= CIK ? 512 : 256; + struct radv_shader_variant *var; + struct ac_shader_config *conf; + int i; + FILE *file = stderr; + unsigned max_simd_waves = 10; + unsigned lds_per_wave = 0; + + for (i = 0; i < MESA_SHADER_STAGES; i++) { + if (!pipeline->shaders[i]) + continue; + var = pipeline->shaders[i]; + + conf = &var->config; + + if (i == MESA_SHADER_FRAGMENT) { + lds_per_wave = conf->lds_size * lds_increment + + align(var->info.fs.num_interp * 48, lds_increment); + } + + if (conf->num_sgprs) { + if (device->physical_device->rad_info.chip_class >= VI) + max_simd_waves = MIN2(max_simd_waves, 800 / conf->num_sgprs); + else + max_simd_waves = MIN2(max_simd_waves, 512 / conf->num_sgprs); + } + + if (conf->num_vgprs) + max_simd_waves = MIN2(max_simd_waves, 256 / conf->num_vgprs); + + /* LDS is 64KB per CU (4 SIMDs), divided into 16KB blocks per SIMD + * that PS can use. + */ + if (lds_per_wave) + max_simd_waves = MIN2(max_simd_waves, 16384 / lds_per_wave); + + fprintf(file, "\n%s:\n", + radv_get_shader_name(var, i)); + if (i == MESA_SHADER_FRAGMENT) { + fprintf(file, "*** SHADER CONFIG ***\n" + "SPI_PS_INPUT_ADDR = 0x%04x\n" + "SPI_PS_INPUT_ENA = 0x%04x\n", + conf->spi_ps_input_addr, conf->spi_ps_input_ena); + } + fprintf(file, "*** SHADER STATS ***\n" + "SGPRS: %d\n" + "VGPRS: %d\n" + "Spilled SGPRs: %d\n" + "Spilled VGPRs: %d\n" + "Code Size: %d bytes\n" + "LDS: %d blocks\n" + "Scratch: %d bytes per wave\n" + "Max Waves: %d\n" + "********************\n\n\n", + conf->num_sgprs, conf->num_vgprs, + conf->spilled_sgprs, conf->spilled_vgprs, var->code_size, + conf->lds_size, conf->scratch_bytes_per_wave, + max_simd_waves); + } +} + +void radv_shader_variant_destroy(struct radv_device *device, + struct radv_shader_variant *variant) +{ + if (__sync_fetch_and_sub(&variant->ref_count, 1) != 1) + return; + + device->ws->buffer_destroy(variant->bo); + free(variant); +} + +static void radv_fill_shader_variant(struct radv_device *device, + struct radv_shader_variant *variant, + struct ac_shader_binary *binary, + gl_shader_stage stage) +{ + variant->code_size = binary->code_size; + bool scratch_enabled = variant->config.scratch_bytes_per_wave > 0; + unsigned vgpr_comp_cnt = 0; + + if (scratch_enabled) + radv_finishme("shader scratch space"); + + switch (stage) { + case MESA_SHADER_VERTEX: + variant->rsrc2 = S_00B12C_USER_SGPR(variant->info.num_user_sgprs) | + S_00B12C_SCRATCH_EN(scratch_enabled); + vgpr_comp_cnt = variant->info.vs.vgpr_comp_cnt; + break; + case MESA_SHADER_FRAGMENT: + variant->rsrc2 = S_00B12C_USER_SGPR(variant->info.num_user_sgprs) | + S_00B12C_SCRATCH_EN(scratch_enabled); + break; + case MESA_SHADER_COMPUTE: + variant->rsrc2 = S_00B84C_USER_SGPR(variant->info.num_user_sgprs) | + S_00B84C_SCRATCH_EN(scratch_enabled) | + S_00B84C_TGID_X_EN(1) | S_00B84C_TGID_Y_EN(1) | + S_00B84C_TGID_Z_EN(1) | S_00B84C_TIDIG_COMP_CNT(2) | + S_00B84C_TG_SIZE_EN(1) | + S_00B84C_LDS_SIZE(variant->config.lds_size); + break; + default: + unreachable("unsupported shader type"); + break; + } + + variant->rsrc1 = S_00B848_VGPRS((variant->config.num_vgprs - 1) / 4) | + S_00B848_SGPRS((variant->config.num_sgprs - 1) / 8) | + S_00B128_VGPR_COMP_CNT(vgpr_comp_cnt) | + S_00B848_DX10_CLAMP(1) | + S_00B848_FLOAT_MODE(variant->config.float_mode); + + variant->bo = device->ws->buffer_create(device->ws, binary->code_size, 256, + RADEON_DOMAIN_GTT, RADEON_FLAG_CPU_ACCESS); + + void *ptr = device->ws->buffer_map(variant->bo); + memcpy(ptr, binary->code, binary->code_size); + device->ws->buffer_unmap(variant->bo); + + +} + +static struct radv_shader_variant *radv_shader_variant_create(struct radv_device *device, + struct nir_shader *shader, + struct radv_pipeline_layout *layout, + const union ac_shader_variant_key *key, + void** code_out, + unsigned *code_size_out, + bool dump) +{ + struct radv_shader_variant *variant = calloc(1, sizeof(struct radv_shader_variant)); + enum radeon_family chip_family = device->physical_device->rad_info.family; + LLVMTargetMachineRef tm; + if (!variant) + return NULL; + + struct ac_nir_compiler_options options = {0}; + options.layout = layout; + if (key) + options.key = *key; + + struct ac_shader_binary binary; + + options.unsafe_math = !!(device->debug_flags & RADV_DEBUG_UNSAFE_MATH); + options.family = chip_family; + options.chip_class = device->physical_device->rad_info.chip_class; + tm = ac_create_target_machine(chip_family); + ac_compile_nir_shader(tm, &binary, &variant->config, + &variant->info, shader, &options, dump); + LLVMDisposeTargetMachine(tm); + + radv_fill_shader_variant(device, variant, &binary, shader->stage); + + if (code_out) { + *code_out = binary.code; + *code_size_out = binary.code_size; + } else + free(binary.code); + free(binary.config); + free(binary.rodata); + free(binary.global_symbol_offsets); + free(binary.relocs); + free(binary.disasm_string); + variant->ref_count = 1; + return variant; +} + + +static struct radv_shader_variant * +radv_pipeline_compile(struct radv_pipeline *pipeline, + struct radv_pipeline_cache *cache, + struct radv_shader_module *module, + const char *entrypoint, + gl_shader_stage stage, + const VkSpecializationInfo *spec_info, + struct radv_pipeline_layout *layout, + const union ac_shader_variant_key *key) +{ + unsigned char sha1[20]; + struct radv_shader_variant *variant; + nir_shader *nir; + void *code = NULL; + unsigned code_size = 0; + bool dump = (pipeline->device->debug_flags & RADV_DEBUG_DUMP_SHADERS); + + if (module->nir) + _mesa_sha1_compute(module->nir->info->name, + strlen(module->nir->info->name), + module->sha1); + + radv_hash_shader(sha1, module, entrypoint, spec_info, layout, key); + + if (cache) { + variant = radv_create_shader_variant_from_pipeline_cache(pipeline->device, + cache, + sha1); + if (variant) + return variant; + } + + nir = radv_shader_compile_to_nir(pipeline->device, + module, entrypoint, stage, + spec_info, dump); + if (nir == NULL) + return NULL; + + variant = radv_shader_variant_create(pipeline->device, nir, layout, key, + &code, &code_size, dump); + if (!module->nir) + ralloc_free(nir); + + if (variant && cache) + variant = radv_pipeline_cache_insert_shader(cache, sha1, variant, + code, code_size); + + if (code) + free(code); + return variant; +} + +static uint32_t si_translate_blend_function(VkBlendOp op) +{ + switch (op) { + case VK_BLEND_OP_ADD: + return V_028780_COMB_DST_PLUS_SRC; + case VK_BLEND_OP_SUBTRACT: + return V_028780_COMB_SRC_MINUS_DST; + case VK_BLEND_OP_REVERSE_SUBTRACT: + return V_028780_COMB_DST_MINUS_SRC; + case VK_BLEND_OP_MIN: + return V_028780_COMB_MIN_DST_SRC; + case VK_BLEND_OP_MAX: + return V_028780_COMB_MAX_DST_SRC; + default: + return 0; + } +} + +static uint32_t si_translate_blend_factor(VkBlendFactor factor) +{ + switch (factor) { + case VK_BLEND_FACTOR_ZERO: + return V_028780_BLEND_ZERO; + case VK_BLEND_FACTOR_ONE: + return V_028780_BLEND_ONE; + case VK_BLEND_FACTOR_SRC_COLOR: + return V_028780_BLEND_SRC_COLOR; + case VK_BLEND_FACTOR_ONE_MINUS_SRC_COLOR: + return V_028780_BLEND_ONE_MINUS_SRC_COLOR; + case VK_BLEND_FACTOR_DST_COLOR: + return V_028780_BLEND_DST_COLOR; + case VK_BLEND_FACTOR_ONE_MINUS_DST_COLOR: + return V_028780_BLEND_ONE_MINUS_DST_COLOR; + case VK_BLEND_FACTOR_SRC_ALPHA: + return V_028780_BLEND_SRC_ALPHA; + case VK_BLEND_FACTOR_ONE_MINUS_SRC_ALPHA: + return V_028780_BLEND_ONE_MINUS_SRC_ALPHA; + case VK_BLEND_FACTOR_DST_ALPHA: + return V_028780_BLEND_DST_ALPHA; + case VK_BLEND_FACTOR_ONE_MINUS_DST_ALPHA: + return V_028780_BLEND_ONE_MINUS_DST_ALPHA; + case VK_BLEND_FACTOR_CONSTANT_COLOR: + return V_028780_BLEND_CONSTANT_COLOR; + case VK_BLEND_FACTOR_ONE_MINUS_CONSTANT_COLOR: + return V_028780_BLEND_ONE_MINUS_CONSTANT_COLOR; + case VK_BLEND_FACTOR_CONSTANT_ALPHA: + return V_028780_BLEND_CONSTANT_ALPHA; + case VK_BLEND_FACTOR_ONE_MINUS_CONSTANT_ALPHA: + return V_028780_BLEND_ONE_MINUS_CONSTANT_ALPHA; + case VK_BLEND_FACTOR_SRC_ALPHA_SATURATE: + return V_028780_BLEND_SRC_ALPHA_SATURATE; + case VK_BLEND_FACTOR_SRC1_COLOR: + return V_028780_BLEND_SRC1_COLOR; + case VK_BLEND_FACTOR_ONE_MINUS_SRC1_COLOR: + return V_028780_BLEND_INV_SRC1_COLOR; + case VK_BLEND_FACTOR_SRC1_ALPHA: + return V_028780_BLEND_SRC1_ALPHA; + case VK_BLEND_FACTOR_ONE_MINUS_SRC1_ALPHA: + return V_028780_BLEND_INV_SRC1_ALPHA; + default: + return 0; + } +} + +static bool is_dual_src(VkBlendFactor factor) +{ + switch (factor) { + case VK_BLEND_FACTOR_SRC1_COLOR: + case VK_BLEND_FACTOR_ONE_MINUS_SRC1_COLOR: + case VK_BLEND_FACTOR_SRC1_ALPHA: + case VK_BLEND_FACTOR_ONE_MINUS_SRC1_ALPHA: + return true; + default: + return false; + } +} + +static unsigned si_choose_spi_color_format(VkFormat vk_format, + bool blend_enable, + bool blend_need_alpha) +{ + const struct vk_format_description *desc = vk_format_description(vk_format); + unsigned format, ntype, swap; + + /* Alpha is needed for alpha-to-coverage. + * Blending may be with or without alpha. + */ + unsigned normal = 0; /* most optimal, may not support blending or export alpha */ + unsigned alpha = 0; /* exports alpha, but may not support blending */ + unsigned blend = 0; /* supports blending, but may not export alpha */ + unsigned blend_alpha = 0; /* least optimal, supports blending and exports alpha */ + + format = radv_translate_colorformat(vk_format); + ntype = radv_translate_color_numformat(vk_format, desc, + vk_format_get_first_non_void_channel(vk_format)); + swap = radv_translate_colorswap(vk_format, false); + + /* Choose the SPI color formats. These are required values for Stoney/RB+. + * Other chips have multiple choices, though they are not necessarily better. + */ + switch (format) { + case V_028C70_COLOR_5_6_5: + case V_028C70_COLOR_1_5_5_5: + case V_028C70_COLOR_5_5_5_1: + case V_028C70_COLOR_4_4_4_4: + case V_028C70_COLOR_10_11_11: + case V_028C70_COLOR_11_11_10: + case V_028C70_COLOR_8: + case V_028C70_COLOR_8_8: + case V_028C70_COLOR_8_8_8_8: + case V_028C70_COLOR_10_10_10_2: + case V_028C70_COLOR_2_10_10_10: + if (ntype == V_028C70_NUMBER_UINT) + alpha = blend = blend_alpha = normal = V_028714_SPI_SHADER_UINT16_ABGR; + else if (ntype == V_028C70_NUMBER_SINT) + alpha = blend = blend_alpha = normal = V_028714_SPI_SHADER_SINT16_ABGR; + else + alpha = blend = blend_alpha = normal = V_028714_SPI_SHADER_FP16_ABGR; + break; + + case V_028C70_COLOR_16: + case V_028C70_COLOR_16_16: + case V_028C70_COLOR_16_16_16_16: + if (ntype == V_028C70_NUMBER_UNORM || + ntype == V_028C70_NUMBER_SNORM) { + /* UNORM16 and SNORM16 don't support blending */ + if (ntype == V_028C70_NUMBER_UNORM) + normal = alpha = V_028714_SPI_SHADER_UNORM16_ABGR; + else + normal = alpha = V_028714_SPI_SHADER_SNORM16_ABGR; + + /* Use 32 bits per channel for blending. */ + if (format == V_028C70_COLOR_16) { + if (swap == V_028C70_SWAP_STD) { /* R */ + blend = V_028714_SPI_SHADER_32_R; + blend_alpha = V_028714_SPI_SHADER_32_AR; + } else if (swap == V_028C70_SWAP_ALT_REV) /* A */ + blend = blend_alpha = V_028714_SPI_SHADER_32_AR; + else + assert(0); + } else if (format == V_028C70_COLOR_16_16) { + if (swap == V_028C70_SWAP_STD) { /* RG */ + blend = V_028714_SPI_SHADER_32_GR; + blend_alpha = V_028714_SPI_SHADER_32_ABGR; + } else if (swap == V_028C70_SWAP_ALT) /* RA */ + blend = blend_alpha = V_028714_SPI_SHADER_32_AR; + else + assert(0); + } else /* 16_16_16_16 */ + blend = blend_alpha = V_028714_SPI_SHADER_32_ABGR; + } else if (ntype == V_028C70_NUMBER_UINT) + alpha = blend = blend_alpha = normal = V_028714_SPI_SHADER_UINT16_ABGR; + else if (ntype == V_028C70_NUMBER_SINT) + alpha = blend = blend_alpha = normal = V_028714_SPI_SHADER_SINT16_ABGR; + else if (ntype == V_028C70_NUMBER_FLOAT) + alpha = blend = blend_alpha = normal = V_028714_SPI_SHADER_FP16_ABGR; + else + assert(0); + break; + + case V_028C70_COLOR_32: + if (swap == V_028C70_SWAP_STD) { /* R */ + blend = normal = V_028714_SPI_SHADER_32_R; + alpha = blend_alpha = V_028714_SPI_SHADER_32_AR; + } else if (swap == V_028C70_SWAP_ALT_REV) /* A */ + alpha = blend = blend_alpha = normal = V_028714_SPI_SHADER_32_AR; + else + assert(0); + break; + + case V_028C70_COLOR_32_32: + if (swap == V_028C70_SWAP_STD) { /* RG */ + blend = normal = V_028714_SPI_SHADER_32_GR; + alpha = blend_alpha = V_028714_SPI_SHADER_32_ABGR; + } else if (swap == V_028C70_SWAP_ALT) /* RA */ + alpha = blend = blend_alpha = normal = V_028714_SPI_SHADER_32_AR; + else + assert(0); + break; + + case V_028C70_COLOR_32_32_32_32: + case V_028C70_COLOR_8_24: + case V_028C70_COLOR_24_8: + case V_028C70_COLOR_X24_8_32_FLOAT: + alpha = blend = blend_alpha = normal = V_028714_SPI_SHADER_32_ABGR; + break; + + default: + unreachable("unhandled blend format"); + } + + if (blend_enable && blend_need_alpha) + return blend_alpha; + else if(blend_need_alpha) + return alpha; + else if(blend_enable) + return blend; + else + return normal; +} + +static unsigned si_get_cb_shader_mask(unsigned spi_shader_col_format) +{ + unsigned i, cb_shader_mask = 0; + + for (i = 0; i < 8; i++) { + switch ((spi_shader_col_format >> (i * 4)) & 0xf) { + case V_028714_SPI_SHADER_ZERO: + break; + case V_028714_SPI_SHADER_32_R: + cb_shader_mask |= 0x1 << (i * 4); + break; + case V_028714_SPI_SHADER_32_GR: + cb_shader_mask |= 0x3 << (i * 4); + break; + case V_028714_SPI_SHADER_32_AR: + cb_shader_mask |= 0x9 << (i * 4); + break; + case V_028714_SPI_SHADER_FP16_ABGR: + case V_028714_SPI_SHADER_UNORM16_ABGR: + case V_028714_SPI_SHADER_SNORM16_ABGR: + case V_028714_SPI_SHADER_UINT16_ABGR: + case V_028714_SPI_SHADER_SINT16_ABGR: + case V_028714_SPI_SHADER_32_ABGR: + cb_shader_mask |= 0xf << (i * 4); + break; + default: + assert(0); + } + } + return cb_shader_mask; +} + +static void +radv_pipeline_compute_spi_color_formats(struct radv_pipeline *pipeline, + const VkGraphicsPipelineCreateInfo *pCreateInfo, + uint32_t blend_enable, + uint32_t blend_need_alpha, + bool single_cb_enable, + bool blend_mrt0_is_dual_src) +{ + RADV_FROM_HANDLE(radv_render_pass, pass, pCreateInfo->renderPass); + struct radv_subpass *subpass = pass->subpasses + pCreateInfo->subpass; + struct radv_blend_state *blend = &pipeline->graphics.blend; + unsigned col_format = 0; + + for (unsigned i = 0; i < (single_cb_enable ? 1 : subpass->color_count); ++i) { + struct radv_render_pass_attachment *attachment; + unsigned cf; + + attachment = pass->attachments + subpass->color_attachments[i].attachment; + + cf = si_choose_spi_color_format(attachment->format, + blend_enable & (1 << i), + blend_need_alpha & (1 << i)); + + col_format |= cf << (4 * i); + } + + blend->cb_shader_mask = si_get_cb_shader_mask(col_format); + + if (blend_mrt0_is_dual_src) + col_format |= (col_format & 0xf) << 4; + if (!col_format) + col_format |= V_028714_SPI_SHADER_32_R; + blend->spi_shader_col_format = col_format; +} + +static bool +format_is_int8(VkFormat format) +{ + const struct vk_format_description *desc = vk_format_description(format); + int channel = vk_format_get_first_non_void_channel(format); + + return channel >= 0 && desc->channel[channel].pure_integer && + desc->channel[channel].size == 8; +} + +unsigned radv_format_meta_fs_key(VkFormat format) +{ + unsigned col_format = si_choose_spi_color_format(format, false, false) - 1; + bool is_int8 = format_is_int8(format); + + return col_format + (is_int8 ? 3 : 0); +} + +static unsigned +radv_pipeline_compute_is_int8(const VkGraphicsPipelineCreateInfo *pCreateInfo) +{ + RADV_FROM_HANDLE(radv_render_pass, pass, pCreateInfo->renderPass); + struct radv_subpass *subpass = pass->subpasses + pCreateInfo->subpass; + unsigned is_int8 = 0; + + for (unsigned i = 0; i < subpass->color_count; ++i) { + struct radv_render_pass_attachment *attachment; + + attachment = pass->attachments + subpass->color_attachments[i].attachment; + + if (format_is_int8(attachment->format)) + is_int8 |= 1 << i; + } + + return is_int8; +} + +static void +radv_pipeline_init_blend_state(struct radv_pipeline *pipeline, + const VkGraphicsPipelineCreateInfo *pCreateInfo, + const struct radv_graphics_pipeline_create_info *extra) +{ + const VkPipelineColorBlendStateCreateInfo *vkblend = pCreateInfo->pColorBlendState; + struct radv_blend_state *blend = &pipeline->graphics.blend; + unsigned mode = V_028808_CB_NORMAL; + uint32_t blend_enable = 0, blend_need_alpha = 0; + bool blend_mrt0_is_dual_src = false; + int i; + bool single_cb_enable = false; + + if (!vkblend) + return; + + if (extra && extra->custom_blend_mode) { + single_cb_enable = true; + mode = extra->custom_blend_mode; + } + blend->cb_color_control = 0; + if (vkblend->logicOpEnable) + blend->cb_color_control |= S_028808_ROP3(vkblend->logicOp | (vkblend->logicOp << 4)); + else + blend->cb_color_control |= S_028808_ROP3(0xcc); + + blend->db_alpha_to_mask = S_028B70_ALPHA_TO_MASK_OFFSET0(2) | + S_028B70_ALPHA_TO_MASK_OFFSET1(2) | + S_028B70_ALPHA_TO_MASK_OFFSET2(2) | + S_028B70_ALPHA_TO_MASK_OFFSET3(2); + + blend->cb_target_mask = 0; + for (i = 0; i < vkblend->attachmentCount; i++) { + const VkPipelineColorBlendAttachmentState *att = &vkblend->pAttachments[i]; + unsigned blend_cntl = 0; + VkBlendOp eqRGB = att->colorBlendOp; + VkBlendFactor srcRGB = att->srcColorBlendFactor; + VkBlendFactor dstRGB = att->dstColorBlendFactor; + VkBlendOp eqA = att->alphaBlendOp; + VkBlendFactor srcA = att->srcAlphaBlendFactor; + VkBlendFactor dstA = att->dstAlphaBlendFactor; + + blend->sx_mrt0_blend_opt[i] = S_028760_COLOR_COMB_FCN(V_028760_OPT_COMB_BLEND_DISABLED) | S_028760_ALPHA_COMB_FCN(V_028760_OPT_COMB_BLEND_DISABLED); + + if (!att->colorWriteMask) + continue; + + blend->cb_target_mask |= (unsigned)att->colorWriteMask << (4 * i); + if (!att->blendEnable) { + blend->cb_blend_control[i] = blend_cntl; + continue; + } + + if (is_dual_src(srcRGB) || is_dual_src(dstRGB) || is_dual_src(srcA) || is_dual_src(dstA)) + if (i == 0) + blend_mrt0_is_dual_src = true; + + if (eqRGB == VK_BLEND_OP_MIN || eqRGB == VK_BLEND_OP_MAX) { + srcRGB = VK_BLEND_FACTOR_ONE; + dstRGB = VK_BLEND_FACTOR_ONE; + } + if (eqA == VK_BLEND_OP_MIN || eqA == VK_BLEND_OP_MAX) { + srcA = VK_BLEND_FACTOR_ONE; + dstA = VK_BLEND_FACTOR_ONE; + } + + blend_cntl |= S_028780_ENABLE(1); + + blend_cntl |= S_028780_COLOR_COMB_FCN(si_translate_blend_function(eqRGB)); + blend_cntl |= S_028780_COLOR_SRCBLEND(si_translate_blend_factor(srcRGB)); + blend_cntl |= S_028780_COLOR_DESTBLEND(si_translate_blend_factor(dstRGB)); + if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) { + blend_cntl |= S_028780_SEPARATE_ALPHA_BLEND(1); + blend_cntl |= S_028780_ALPHA_COMB_FCN(si_translate_blend_function(eqA)); + blend_cntl |= S_028780_ALPHA_SRCBLEND(si_translate_blend_factor(srcA)); + blend_cntl |= S_028780_ALPHA_DESTBLEND(si_translate_blend_factor(dstA)); + } + blend->cb_blend_control[i] = blend_cntl; + + blend_enable |= 1 << i; + + if (srcRGB == VK_BLEND_FACTOR_SRC_ALPHA || + dstRGB == VK_BLEND_FACTOR_SRC_ALPHA || + srcRGB == VK_BLEND_FACTOR_SRC_ALPHA_SATURATE || + dstRGB == VK_BLEND_FACTOR_SRC_ALPHA_SATURATE || + srcRGB == VK_BLEND_FACTOR_ONE_MINUS_SRC_ALPHA || + dstRGB == VK_BLEND_FACTOR_ONE_MINUS_SRC_ALPHA) + blend_need_alpha |= 1 << i; + } + for (i = vkblend->attachmentCount; i < 8; i++) + blend->cb_blend_control[i] = 0; + + if (blend->cb_target_mask) + blend->cb_color_control |= S_028808_MODE(mode); + else + blend->cb_color_control |= S_028808_MODE(V_028808_CB_DISABLE); + + radv_pipeline_compute_spi_color_formats(pipeline, pCreateInfo, + blend_enable, blend_need_alpha, single_cb_enable, blend_mrt0_is_dual_src); +} + +static uint32_t si_translate_stencil_op(enum VkStencilOp op) +{ + switch (op) { + case VK_STENCIL_OP_KEEP: + return V_02842C_STENCIL_KEEP; + case VK_STENCIL_OP_ZERO: + return V_02842C_STENCIL_ZERO; + case VK_STENCIL_OP_REPLACE: + return V_02842C_STENCIL_REPLACE_TEST; + case VK_STENCIL_OP_INCREMENT_AND_CLAMP: + return V_02842C_STENCIL_ADD_CLAMP; + case VK_STENCIL_OP_DECREMENT_AND_CLAMP: + return V_02842C_STENCIL_SUB_CLAMP; + case VK_STENCIL_OP_INVERT: + return V_02842C_STENCIL_INVERT; + case VK_STENCIL_OP_INCREMENT_AND_WRAP: + return V_02842C_STENCIL_ADD_WRAP; + case VK_STENCIL_OP_DECREMENT_AND_WRAP: + return V_02842C_STENCIL_SUB_WRAP; + default: + return 0; + } +} +static void +radv_pipeline_init_depth_stencil_state(struct radv_pipeline *pipeline, + const VkGraphicsPipelineCreateInfo *pCreateInfo, + const struct radv_graphics_pipeline_create_info *extra) +{ + const VkPipelineDepthStencilStateCreateInfo *vkds = pCreateInfo->pDepthStencilState; + struct radv_depth_stencil_state *ds = &pipeline->graphics.ds; + + memset(ds, 0, sizeof(*ds)); + if (!vkds) + return; + ds->db_depth_control = S_028800_Z_ENABLE(vkds->depthTestEnable ? 1 : 0) | + S_028800_Z_WRITE_ENABLE(vkds->depthWriteEnable ? 1 : 0) | + S_028800_ZFUNC(vkds->depthCompareOp) | + S_028800_DEPTH_BOUNDS_ENABLE(vkds->depthBoundsTestEnable ? 1 : 0); + + if (vkds->stencilTestEnable) { + ds->db_depth_control |= S_028800_STENCIL_ENABLE(1) | S_028800_BACKFACE_ENABLE(1); + ds->db_depth_control |= S_028800_STENCILFUNC(vkds->front.compareOp); + ds->db_stencil_control |= S_02842C_STENCILFAIL(si_translate_stencil_op(vkds->front.failOp)); + ds->db_stencil_control |= S_02842C_STENCILZPASS(si_translate_stencil_op(vkds->front.passOp)); + ds->db_stencil_control |= S_02842C_STENCILZFAIL(si_translate_stencil_op(vkds->front.depthFailOp)); + + ds->db_depth_control |= S_028800_STENCILFUNC_BF(vkds->back.compareOp); + ds->db_stencil_control |= S_02842C_STENCILFAIL_BF(si_translate_stencil_op(vkds->back.failOp)); + ds->db_stencil_control |= S_02842C_STENCILZPASS_BF(si_translate_stencil_op(vkds->back.passOp)); + ds->db_stencil_control |= S_02842C_STENCILZFAIL_BF(si_translate_stencil_op(vkds->back.depthFailOp)); + } + + if (extra) { + + ds->db_render_control |= S_028000_DEPTH_CLEAR_ENABLE(extra->db_depth_clear); + ds->db_render_control |= S_028000_STENCIL_CLEAR_ENABLE(extra->db_stencil_clear); + + ds->db_render_control |= S_028000_RESUMMARIZE_ENABLE(extra->db_resummarize); + ds->db_render_control |= S_028000_DEPTH_COMPRESS_DISABLE(extra->db_flush_depth_inplace); + ds->db_render_control |= S_028000_STENCIL_COMPRESS_DISABLE(extra->db_flush_stencil_inplace); + ds->db_render_override2 |= S_028010_DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION(extra->db_depth_disable_expclear); + ds->db_render_override2 |= S_028010_DISABLE_SMEM_EXPCLEAR_OPTIMIZATION(extra->db_stencil_disable_expclear); + } +} + +static uint32_t si_translate_fill(VkPolygonMode func) +{ + switch(func) { + case VK_POLYGON_MODE_FILL: + return V_028814_X_DRAW_TRIANGLES; + case VK_POLYGON_MODE_LINE: + return V_028814_X_DRAW_LINES; + case VK_POLYGON_MODE_POINT: + return V_028814_X_DRAW_POINTS; + default: + assert(0); + return V_028814_X_DRAW_POINTS; + } +} +static void +radv_pipeline_init_raster_state(struct radv_pipeline *pipeline, + const VkGraphicsPipelineCreateInfo *pCreateInfo) +{ + const VkPipelineRasterizationStateCreateInfo *vkraster = pCreateInfo->pRasterizationState; + struct radv_raster_state *raster = &pipeline->graphics.raster; + + memset(raster, 0, sizeof(*raster)); + + raster->spi_interp_control = + S_0286D4_FLAT_SHADE_ENA(1) | + S_0286D4_PNT_SPRITE_ENA(1) | + S_0286D4_PNT_SPRITE_OVRD_X(V_0286D4_SPI_PNT_SPRITE_SEL_S) | + S_0286D4_PNT_SPRITE_OVRD_Y(V_0286D4_SPI_PNT_SPRITE_SEL_T) | + S_0286D4_PNT_SPRITE_OVRD_Z(V_0286D4_SPI_PNT_SPRITE_SEL_0) | + S_0286D4_PNT_SPRITE_OVRD_W(V_0286D4_SPI_PNT_SPRITE_SEL_1) | + S_0286D4_PNT_SPRITE_TOP_1(0); // vulkan is top to bottom - 1.0 at bottom + + raster->pa_cl_vs_out_cntl = S_02881C_VS_OUT_MISC_SIDE_BUS_ENA(1); + raster->pa_cl_clip_cntl = S_028810_PS_UCP_MODE(3) | + S_028810_DX_CLIP_SPACE_DEF(1) | // vulkan uses DX conventions. + S_028810_ZCLIP_NEAR_DISABLE(vkraster->depthClampEnable ? 1 : 0) | + S_028810_ZCLIP_FAR_DISABLE(vkraster->depthClampEnable ? 1 : 0) | + S_028810_DX_RASTERIZATION_KILL(vkraster->rasterizerDiscardEnable ? 1 : 0) | + S_028810_DX_LINEAR_ATTR_CLIP_ENA(1); + + raster->pa_su_vtx_cntl = + S_028BE4_PIX_CENTER(1) | // TODO verify + S_028BE4_ROUND_MODE(V_028BE4_X_ROUND_TO_EVEN) | + S_028BE4_QUANT_MODE(V_028BE4_X_16_8_FIXED_POINT_1_256TH); + + raster->pa_su_sc_mode_cntl = + S_028814_FACE(vkraster->frontFace) | + S_028814_CULL_FRONT(!!(vkraster->cullMode & VK_CULL_MODE_FRONT_BIT)) | + S_028814_CULL_BACK(!!(vkraster->cullMode & VK_CULL_MODE_BACK_BIT)) | + S_028814_POLY_MODE(vkraster->polygonMode != VK_POLYGON_MODE_FILL) | + S_028814_POLYMODE_FRONT_PTYPE(si_translate_fill(vkraster->polygonMode)) | + S_028814_POLYMODE_BACK_PTYPE(si_translate_fill(vkraster->polygonMode)) | + S_028814_POLY_OFFSET_FRONT_ENABLE(vkraster->depthBiasEnable ? 1 : 0) | + S_028814_POLY_OFFSET_BACK_ENABLE(vkraster->depthBiasEnable ? 1 : 0) | + S_028814_POLY_OFFSET_PARA_ENABLE(vkraster->depthBiasEnable ? 1 : 0); + +} + +static void +radv_pipeline_init_multisample_state(struct radv_pipeline *pipeline, + const VkGraphicsPipelineCreateInfo *pCreateInfo) +{ + const VkPipelineMultisampleStateCreateInfo *vkms = pCreateInfo->pMultisampleState; + struct radv_blend_state *blend = &pipeline->graphics.blend; + struct radv_multisample_state *ms = &pipeline->graphics.ms; + unsigned num_tile_pipes = pipeline->device->physical_device->rad_info.num_tile_pipes; + int ps_iter_samples = 1; + uint32_t mask = 0xffff; + + ms->num_samples = vkms->rasterizationSamples; + + if (pipeline->shaders[MESA_SHADER_FRAGMENT]->info.fs.force_persample) { + ps_iter_samples = vkms->rasterizationSamples; + } + + ms->pa_sc_line_cntl = S_028BDC_DX10_DIAMOND_TEST_ENA(1); + ms->pa_sc_aa_config = 0; + ms->db_eqaa = S_028804_HIGH_QUALITY_INTERSECTIONS(1) | + S_028804_STATIC_ANCHOR_ASSOCIATIONS(1); + ms->pa_sc_mode_cntl_1 = + S_028A4C_WALK_FENCE_ENABLE(1) | //TODO linear dst fixes + S_028A4C_WALK_FENCE_SIZE(num_tile_pipes == 2 ? 2 : 3) | + /* always 1: */ + S_028A4C_WALK_ALIGN8_PRIM_FITS_ST(1) | + S_028A4C_SUPERTILE_WALK_ORDER_ENABLE(1) | + S_028A4C_TILE_WALK_ORDER_ENABLE(1) | + S_028A4C_MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE(1) | + EG_S_028A4C_FORCE_EOV_CNTDWN_ENABLE(1) | + EG_S_028A4C_FORCE_EOV_REZ_ENABLE(1); + + if (vkms->rasterizationSamples > 1) { + unsigned log_samples = util_logbase2(vkms->rasterizationSamples); + unsigned log_ps_iter_samples = util_logbase2(util_next_power_of_two(ps_iter_samples)); + ms->pa_sc_mode_cntl_0 = S_028A48_MSAA_ENABLE(1); + ms->pa_sc_line_cntl |= S_028BDC_EXPAND_LINE_WIDTH(1); /* CM_R_028BDC_PA_SC_LINE_CNTL */ + ms->db_eqaa |= S_028804_MAX_ANCHOR_SAMPLES(log_samples) | + S_028804_PS_ITER_SAMPLES(log_ps_iter_samples) | + S_028804_MASK_EXPORT_NUM_SAMPLES(log_samples) | + S_028804_ALPHA_TO_MASK_NUM_SAMPLES(log_samples); + ms->pa_sc_aa_config |= S_028BE0_MSAA_NUM_SAMPLES(log_samples) | + S_028BE0_MAX_SAMPLE_DIST(radv_cayman_get_maxdist(log_samples)) | + S_028BE0_MSAA_EXPOSED_SAMPLES(log_samples); /* CM_R_028BE0_PA_SC_AA_CONFIG */ + ms->pa_sc_mode_cntl_1 |= EG_S_028A4C_PS_ITER_SAMPLE(ps_iter_samples > 1); + } + + if (vkms->alphaToCoverageEnable) + blend->db_alpha_to_mask |= S_028B70_ALPHA_TO_MASK_ENABLE(1); + + if (vkms->pSampleMask) { + mask = vkms->pSampleMask[0] & 0xffff; + } + + ms->pa_sc_aa_mask[0] = mask | (mask << 16); + ms->pa_sc_aa_mask[1] = mask | (mask << 16); +} + +static uint32_t +si_translate_prim(enum VkPrimitiveTopology topology) +{ + switch (topology) { + case VK_PRIMITIVE_TOPOLOGY_POINT_LIST: + return V_008958_DI_PT_POINTLIST; + case VK_PRIMITIVE_TOPOLOGY_LINE_LIST: + return V_008958_DI_PT_LINELIST; + case VK_PRIMITIVE_TOPOLOGY_LINE_STRIP: + return V_008958_DI_PT_LINESTRIP; + case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST: + return V_008958_DI_PT_TRILIST; + case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP: + return V_008958_DI_PT_TRISTRIP; + case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_FAN: + return V_008958_DI_PT_TRIFAN; + case VK_PRIMITIVE_TOPOLOGY_LINE_LIST_WITH_ADJACENCY: + return V_008958_DI_PT_LINELIST_ADJ; + case VK_PRIMITIVE_TOPOLOGY_LINE_STRIP_WITH_ADJACENCY: + return V_008958_DI_PT_LINESTRIP_ADJ; + case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST_WITH_ADJACENCY: + return V_008958_DI_PT_TRILIST_ADJ; + case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP_WITH_ADJACENCY: + return V_008958_DI_PT_TRISTRIP_ADJ; + case VK_PRIMITIVE_TOPOLOGY_PATCH_LIST: + return V_008958_DI_PT_PATCH; + default: + assert(0); + return 0; + } +} + +static uint32_t +si_conv_prim_to_gs_out(enum VkPrimitiveTopology topology) +{ + switch (topology) { + case VK_PRIMITIVE_TOPOLOGY_POINT_LIST: + case VK_PRIMITIVE_TOPOLOGY_PATCH_LIST: + return V_028A6C_OUTPRIM_TYPE_POINTLIST; + case VK_PRIMITIVE_TOPOLOGY_LINE_LIST: + case VK_PRIMITIVE_TOPOLOGY_LINE_STRIP: + case VK_PRIMITIVE_TOPOLOGY_LINE_LIST_WITH_ADJACENCY: + case VK_PRIMITIVE_TOPOLOGY_LINE_STRIP_WITH_ADJACENCY: + return V_028A6C_OUTPRIM_TYPE_LINESTRIP; + case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST: + case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP: + case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_FAN: + case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST_WITH_ADJACENCY: + case VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP_WITH_ADJACENCY: + return V_028A6C_OUTPRIM_TYPE_TRISTRIP; + default: + assert(0); + return 0; + } +} + +static unsigned si_map_swizzle(unsigned swizzle) +{ + switch (swizzle) { + case VK_SWIZZLE_Y: + return V_008F0C_SQ_SEL_Y; + case VK_SWIZZLE_Z: + return V_008F0C_SQ_SEL_Z; + case VK_SWIZZLE_W: + return V_008F0C_SQ_SEL_W; + case VK_SWIZZLE_0: + return V_008F0C_SQ_SEL_0; + case VK_SWIZZLE_1: + return V_008F0C_SQ_SEL_1; + default: /* VK_SWIZZLE_X */ + return V_008F0C_SQ_SEL_X; + } +} + +static void +radv_pipeline_init_dynamic_state(struct radv_pipeline *pipeline, + const VkGraphicsPipelineCreateInfo *pCreateInfo) +{ + radv_cmd_dirty_mask_t states = RADV_CMD_DIRTY_DYNAMIC_ALL; + RADV_FROM_HANDLE(radv_render_pass, pass, pCreateInfo->renderPass); + struct radv_subpass *subpass = &pass->subpasses[pCreateInfo->subpass]; + + pipeline->dynamic_state = default_dynamic_state; + + if (pCreateInfo->pDynamicState) { + /* Remove all of the states that are marked as dynamic */ + uint32_t count = pCreateInfo->pDynamicState->dynamicStateCount; + for (uint32_t s = 0; s < count; s++) + states &= ~(1 << pCreateInfo->pDynamicState->pDynamicStates[s]); + } + + struct radv_dynamic_state *dynamic = &pipeline->dynamic_state; + + /* Section 9.2 of the Vulkan 1.0.15 spec says: + * + * pViewportState is [...] NULL if the pipeline + * has rasterization disabled. + */ + if (!pCreateInfo->pRasterizationState->rasterizerDiscardEnable) { + assert(pCreateInfo->pViewportState); + + dynamic->viewport.count = pCreateInfo->pViewportState->viewportCount; + if (states & (1 << VK_DYNAMIC_STATE_VIEWPORT)) { + typed_memcpy(dynamic->viewport.viewports, + pCreateInfo->pViewportState->pViewports, + pCreateInfo->pViewportState->viewportCount); + } + + dynamic->scissor.count = pCreateInfo->pViewportState->scissorCount; + if (states & (1 << VK_DYNAMIC_STATE_SCISSOR)) { + typed_memcpy(dynamic->scissor.scissors, + pCreateInfo->pViewportState->pScissors, + pCreateInfo->pViewportState->scissorCount); + } + } + + if (states & (1 << VK_DYNAMIC_STATE_LINE_WIDTH)) { + assert(pCreateInfo->pRasterizationState); + dynamic->line_width = pCreateInfo->pRasterizationState->lineWidth; + } + + if (states & (1 << VK_DYNAMIC_STATE_DEPTH_BIAS)) { + assert(pCreateInfo->pRasterizationState); + dynamic->depth_bias.bias = + pCreateInfo->pRasterizationState->depthBiasConstantFactor; + dynamic->depth_bias.clamp = + pCreateInfo->pRasterizationState->depthBiasClamp; + dynamic->depth_bias.slope = + pCreateInfo->pRasterizationState->depthBiasSlopeFactor; + } + + /* Section 9.2 of the Vulkan 1.0.15 spec says: + * + * pColorBlendState is [...] NULL if the pipeline has rasterization + * disabled or if the subpass of the render pass the pipeline is + * created against does not use any color attachments. + */ + bool uses_color_att = false; + for (unsigned i = 0; i < subpass->color_count; ++i) { + if (subpass->color_attachments[i].attachment != VK_ATTACHMENT_UNUSED) { + uses_color_att = true; + break; + } + } + + if (uses_color_att && states & (1 << VK_DYNAMIC_STATE_BLEND_CONSTANTS)) { + assert(pCreateInfo->pColorBlendState); + typed_memcpy(dynamic->blend_constants, + pCreateInfo->pColorBlendState->blendConstants, 4); + } + + /* If there is no depthstencil attachment, then don't read + * pDepthStencilState. The Vulkan spec states that pDepthStencilState may + * be NULL in this case. Even if pDepthStencilState is non-NULL, there is + * no need to override the depthstencil defaults in + * radv_pipeline::dynamic_state when there is no depthstencil attachment. + * + * Section 9.2 of the Vulkan 1.0.15 spec says: + * + * pDepthStencilState is [...] NULL if the pipeline has rasterization + * disabled or if the subpass of the render pass the pipeline is created + * against does not use a depth/stencil attachment. + */ + if (!pCreateInfo->pRasterizationState->rasterizerDiscardEnable && + subpass->depth_stencil_attachment.attachment != VK_ATTACHMENT_UNUSED) { + assert(pCreateInfo->pDepthStencilState); + + if (states & (1 << VK_DYNAMIC_STATE_DEPTH_BOUNDS)) { + dynamic->depth_bounds.min = + pCreateInfo->pDepthStencilState->minDepthBounds; + dynamic->depth_bounds.max = + pCreateInfo->pDepthStencilState->maxDepthBounds; + } + + if (states & (1 << VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK)) { + dynamic->stencil_compare_mask.front = + pCreateInfo->pDepthStencilState->front.compareMask; + dynamic->stencil_compare_mask.back = + pCreateInfo->pDepthStencilState->back.compareMask; + } + + if (states & (1 << VK_DYNAMIC_STATE_STENCIL_WRITE_MASK)) { + dynamic->stencil_write_mask.front = + pCreateInfo->pDepthStencilState->front.writeMask; + dynamic->stencil_write_mask.back = + pCreateInfo->pDepthStencilState->back.writeMask; + } + + if (states & (1 << VK_DYNAMIC_STATE_STENCIL_REFERENCE)) { + dynamic->stencil_reference.front = + pCreateInfo->pDepthStencilState->front.reference; + dynamic->stencil_reference.back = + pCreateInfo->pDepthStencilState->back.reference; + } + } + + pipeline->dynamic_state_mask = states; +} + +static union ac_shader_variant_key +radv_compute_vs_key(const VkGraphicsPipelineCreateInfo *pCreateInfo) +{ + union ac_shader_variant_key key; + const VkPipelineVertexInputStateCreateInfo *input_state = + pCreateInfo->pVertexInputState; + + memset(&key, 0, sizeof(key)); + key.vs.instance_rate_inputs = 0; + + for (unsigned i = 0; i < input_state->vertexAttributeDescriptionCount; ++i) { + unsigned binding; + binding = input_state->pVertexAttributeDescriptions[i].binding; + if (input_state->pVertexBindingDescriptions[binding].inputRate) + key.vs.instance_rate_inputs |= 1u << input_state->pVertexAttributeDescriptions[i].location; + } + return key; +} + +VkResult +radv_pipeline_init(struct radv_pipeline *pipeline, + struct radv_device *device, + struct radv_pipeline_cache *cache, + const VkGraphicsPipelineCreateInfo *pCreateInfo, + const struct radv_graphics_pipeline_create_info *extra, + const VkAllocationCallbacks *alloc) +{ + struct radv_shader_module fs_m = {0}; + + if (alloc == NULL) + alloc = &device->alloc; + + pipeline->device = device; + pipeline->layout = radv_pipeline_layout_from_handle(pCreateInfo->layout); + + radv_pipeline_init_dynamic_state(pipeline, pCreateInfo); + const VkPipelineShaderStageCreateInfo *pStages[MESA_SHADER_STAGES] = { 0, }; + struct radv_shader_module *modules[MESA_SHADER_STAGES] = { 0, }; + for (uint32_t i = 0; i < pCreateInfo->stageCount; i++) { + gl_shader_stage stage = ffs(pCreateInfo->pStages[i].stage) - 1; + pStages[stage] = &pCreateInfo->pStages[i]; + modules[stage] = radv_shader_module_from_handle(pStages[stage]->module); + } + + radv_pipeline_init_blend_state(pipeline, pCreateInfo, extra); + + /* */ + if (modules[MESA_SHADER_VERTEX]) { + union ac_shader_variant_key key = radv_compute_vs_key(pCreateInfo); + + pipeline->shaders[MESA_SHADER_VERTEX] = + radv_pipeline_compile(pipeline, cache, modules[MESA_SHADER_VERTEX], + pStages[MESA_SHADER_VERTEX]->pName, + MESA_SHADER_VERTEX, + pStages[MESA_SHADER_VERTEX]->pSpecializationInfo, + pipeline->layout, &key); + + pipeline->active_stages |= mesa_to_vk_shader_stage(MESA_SHADER_VERTEX); + } + + if (!modules[MESA_SHADER_FRAGMENT]) { + nir_builder fs_b; + nir_builder_init_simple_shader(&fs_b, NULL, MESA_SHADER_FRAGMENT, NULL); + fs_b.shader->info->name = ralloc_strdup(fs_b.shader, "noop_fs"); + fs_m.nir = fs_b.shader; + modules[MESA_SHADER_FRAGMENT] = &fs_m; + } + + if (modules[MESA_SHADER_FRAGMENT]) { + union ac_shader_variant_key key; + key.fs.col_format = pipeline->graphics.blend.spi_shader_col_format; + key.fs.is_int8 = radv_pipeline_compute_is_int8(pCreateInfo); + + const VkPipelineShaderStageCreateInfo *stage = pStages[MESA_SHADER_FRAGMENT]; + + pipeline->shaders[MESA_SHADER_FRAGMENT] = + radv_pipeline_compile(pipeline, cache, modules[MESA_SHADER_FRAGMENT], + stage ? stage->pName : "main", + MESA_SHADER_FRAGMENT, + stage ? stage->pSpecializationInfo : NULL, + pipeline->layout, &key); + pipeline->active_stages |= mesa_to_vk_shader_stage(MESA_SHADER_FRAGMENT); + } + + if (fs_m.nir) + ralloc_free(fs_m.nir); + + radv_pipeline_init_depth_stencil_state(pipeline, pCreateInfo, extra); + radv_pipeline_init_raster_state(pipeline, pCreateInfo); + radv_pipeline_init_multisample_state(pipeline, pCreateInfo); + pipeline->graphics.prim = si_translate_prim(pCreateInfo->pInputAssemblyState->topology); + pipeline->graphics.gs_out = si_conv_prim_to_gs_out(pCreateInfo->pInputAssemblyState->topology); + if (extra && extra->use_rectlist) { + pipeline->graphics.prim = V_008958_DI_PT_RECTLIST; + pipeline->graphics.gs_out = V_028A6C_OUTPRIM_TYPE_TRISTRIP; + } + pipeline->graphics.prim_restart_enable = !!pCreateInfo->pInputAssemblyState->primitiveRestartEnable; + + const VkPipelineVertexInputStateCreateInfo *vi_info = + pCreateInfo->pVertexInputState; + for (uint32_t i = 0; i < vi_info->vertexAttributeDescriptionCount; i++) { + const VkVertexInputAttributeDescription *desc = + &vi_info->pVertexAttributeDescriptions[i]; + unsigned loc = desc->location; + const struct vk_format_description *format_desc; + int first_non_void; + uint32_t num_format, data_format; + format_desc = vk_format_description(desc->format); + first_non_void = vk_format_get_first_non_void_channel(desc->format); + + num_format = radv_translate_buffer_numformat(format_desc, first_non_void); + data_format = radv_translate_buffer_dataformat(format_desc, first_non_void); + + pipeline->va_rsrc_word3[loc] = S_008F0C_DST_SEL_X(si_map_swizzle(format_desc->swizzle[0])) | + S_008F0C_DST_SEL_Y(si_map_swizzle(format_desc->swizzle[1])) | + S_008F0C_DST_SEL_Z(si_map_swizzle(format_desc->swizzle[2])) | + S_008F0C_DST_SEL_W(si_map_swizzle(format_desc->swizzle[3])) | + S_008F0C_NUM_FORMAT(num_format) | + S_008F0C_DATA_FORMAT(data_format); + pipeline->va_format_size[loc] = format_desc->block.bits / 8; + pipeline->va_offset[loc] = desc->offset; + pipeline->va_binding[loc] = desc->binding; + pipeline->num_vertex_attribs = MAX2(pipeline->num_vertex_attribs, loc + 1); + } + + for (uint32_t i = 0; i < vi_info->vertexBindingDescriptionCount; i++) { + const VkVertexInputBindingDescription *desc = + &vi_info->pVertexBindingDescriptions[i]; + + pipeline->binding_stride[desc->binding] = desc->stride; + } + + if (device->debug_flags & RADV_DEBUG_DUMP_SHADER_STATS) { + radv_dump_pipeline_stats(device, pipeline); + } + + return VK_SUCCESS; +} + +VkResult +radv_graphics_pipeline_create( + VkDevice _device, + VkPipelineCache _cache, + const VkGraphicsPipelineCreateInfo *pCreateInfo, + const struct radv_graphics_pipeline_create_info *extra, + const VkAllocationCallbacks *pAllocator, + VkPipeline *pPipeline) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_pipeline_cache, cache, _cache); + struct radv_pipeline *pipeline; + VkResult result; + + pipeline = vk_alloc2(&device->alloc, pAllocator, sizeof(*pipeline), 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (pipeline == NULL) + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + + memset(pipeline, 0, sizeof(*pipeline)); + result = radv_pipeline_init(pipeline, device, cache, + pCreateInfo, extra, pAllocator); + if (result != VK_SUCCESS) { + vk_free2(&device->alloc, pAllocator, pipeline); + return result; + } + + *pPipeline = radv_pipeline_to_handle(pipeline); + + return VK_SUCCESS; +} + +VkResult radv_CreateGraphicsPipelines( + VkDevice _device, + VkPipelineCache pipelineCache, + uint32_t count, + const VkGraphicsPipelineCreateInfo* pCreateInfos, + const VkAllocationCallbacks* pAllocator, + VkPipeline* pPipelines) +{ + VkResult result = VK_SUCCESS; + unsigned i = 0; + + for (; i < count; i++) { + VkResult r; + r = radv_graphics_pipeline_create(_device, + pipelineCache, + &pCreateInfos[i], + NULL, pAllocator, &pPipelines[i]); + if (r != VK_SUCCESS) { + result = r; + pPipelines[i] = VK_NULL_HANDLE; + } + } + + return result; +} + +static VkResult radv_compute_pipeline_create( + VkDevice _device, + VkPipelineCache _cache, + const VkComputePipelineCreateInfo* pCreateInfo, + const VkAllocationCallbacks* pAllocator, + VkPipeline* pPipeline) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_pipeline_cache, cache, _cache); + RADV_FROM_HANDLE(radv_shader_module, module, pCreateInfo->stage.module); + struct radv_pipeline *pipeline; + + pipeline = vk_alloc2(&device->alloc, pAllocator, sizeof(*pipeline), 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (pipeline == NULL) + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + + memset(pipeline, 0, sizeof(*pipeline)); + pipeline->device = device; + pipeline->layout = radv_pipeline_layout_from_handle(pCreateInfo->layout); + + pipeline->shaders[MESA_SHADER_COMPUTE] = + radv_pipeline_compile(pipeline, cache, module, + pCreateInfo->stage.pName, + MESA_SHADER_COMPUTE, + pCreateInfo->stage.pSpecializationInfo, + pipeline->layout, NULL); + + *pPipeline = radv_pipeline_to_handle(pipeline); + + if (device->debug_flags & RADV_DEBUG_DUMP_SHADER_STATS) { + radv_dump_pipeline_stats(device, pipeline); + } + return VK_SUCCESS; +} +VkResult radv_CreateComputePipelines( + VkDevice _device, + VkPipelineCache pipelineCache, + uint32_t count, + const VkComputePipelineCreateInfo* pCreateInfos, + const VkAllocationCallbacks* pAllocator, + VkPipeline* pPipelines) +{ + VkResult result = VK_SUCCESS; + + unsigned i = 0; + for (; i < count; i++) { + VkResult r; + r = radv_compute_pipeline_create(_device, pipelineCache, + &pCreateInfos[i], + pAllocator, &pPipelines[i]); + if (r != VK_SUCCESS) { + result = r; + pPipelines[i] = VK_NULL_HANDLE; + } + } + + return result; +} diff -Nru mesa-12.0.6/src/amd/vulkan/radv_pipeline_cache.c mesa-17.0.7/src/amd/vulkan/radv_pipeline_cache.c --- mesa-12.0.6/src/amd/vulkan/radv_pipeline_cache.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_pipeline_cache.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,476 @@ +/* + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "util/mesa-sha1.h" +#include "util/debug.h" +#include "radv_private.h" + +#include "ac_nir_to_llvm.h" + +struct cache_entry { + union { + unsigned char sha1[20]; + uint32_t sha1_dw[5]; + }; + uint32_t code_size; + struct ac_shader_variant_info variant_info; + struct ac_shader_config config; + uint32_t rsrc1, rsrc2; + struct radv_shader_variant *variant; + uint32_t code[0]; +}; + +void +radv_pipeline_cache_init(struct radv_pipeline_cache *cache, + struct radv_device *device) +{ + cache->device = device; + pthread_mutex_init(&cache->mutex, NULL); + + cache->modified = false; + cache->kernel_count = 0; + cache->total_size = 0; + cache->table_size = 1024; + const size_t byte_size = cache->table_size * sizeof(cache->hash_table[0]); + cache->hash_table = malloc(byte_size); + + /* We don't consider allocation failure fatal, we just start with a 0-sized + * cache. */ + if (cache->hash_table == NULL || + (device->debug_flags & RADV_DEBUG_NO_CACHE)) + cache->table_size = 0; + else + memset(cache->hash_table, 0, byte_size); +} + +void +radv_pipeline_cache_finish(struct radv_pipeline_cache *cache) +{ + for (unsigned i = 0; i < cache->table_size; ++i) + if (cache->hash_table[i]) { + if (cache->hash_table[i]->variant) + radv_shader_variant_destroy(cache->device, + cache->hash_table[i]->variant); + vk_free(&cache->alloc, cache->hash_table[i]); + } + pthread_mutex_destroy(&cache->mutex); + free(cache->hash_table); +} + +static uint32_t +entry_size(struct cache_entry *entry) +{ + return sizeof(*entry) + entry->code_size; +} + +void +radv_hash_shader(unsigned char *hash, struct radv_shader_module *module, + const char *entrypoint, + const VkSpecializationInfo *spec_info, + const struct radv_pipeline_layout *layout, + const union ac_shader_variant_key *key) +{ + struct mesa_sha1 *ctx; + + ctx = _mesa_sha1_init(); + if (key) + _mesa_sha1_update(ctx, key, sizeof(*key)); + _mesa_sha1_update(ctx, module->sha1, sizeof(module->sha1)); + _mesa_sha1_update(ctx, entrypoint, strlen(entrypoint)); + if (layout) + _mesa_sha1_update(ctx, layout->sha1, sizeof(layout->sha1)); + if (spec_info) { + _mesa_sha1_update(ctx, spec_info->pMapEntries, + spec_info->mapEntryCount * sizeof spec_info->pMapEntries[0]); + _mesa_sha1_update(ctx, spec_info->pData, spec_info->dataSize); + } + _mesa_sha1_final(ctx, hash); +} + + +static struct cache_entry * +radv_pipeline_cache_search_unlocked(struct radv_pipeline_cache *cache, + const unsigned char *sha1) +{ + const uint32_t mask = cache->table_size - 1; + const uint32_t start = (*(uint32_t *) sha1); + + for (uint32_t i = 0; i < cache->table_size; i++) { + const uint32_t index = (start + i) & mask; + struct cache_entry *entry = cache->hash_table[index]; + + if (!entry) + return NULL; + + if (memcmp(entry->sha1, sha1, sizeof(entry->sha1)) == 0) { + return entry; + } + } + + unreachable("hash table should never be full"); +} + +static struct cache_entry * +radv_pipeline_cache_search(struct radv_pipeline_cache *cache, + const unsigned char *sha1) +{ + struct cache_entry *entry; + + pthread_mutex_lock(&cache->mutex); + + entry = radv_pipeline_cache_search_unlocked(cache, sha1); + + pthread_mutex_unlock(&cache->mutex); + + return entry; +} + +struct radv_shader_variant * +radv_create_shader_variant_from_pipeline_cache(struct radv_device *device, + struct radv_pipeline_cache *cache, + const unsigned char *sha1) +{ + struct cache_entry *entry = radv_pipeline_cache_search(cache, sha1); + + if (!entry) + return NULL; + + if (!entry->variant) { + struct radv_shader_variant *variant; + + variant = calloc(1, sizeof(struct radv_shader_variant)); + if (!variant) + return NULL; + + variant->config = entry->config; + variant->info = entry->variant_info; + variant->rsrc1 = entry->rsrc1; + variant->rsrc2 = entry->rsrc2; + variant->ref_count = 1; + + variant->bo = device->ws->buffer_create(device->ws, entry->code_size, 256, + RADEON_DOMAIN_GTT, RADEON_FLAG_CPU_ACCESS); + + void *ptr = device->ws->buffer_map(variant->bo); + memcpy(ptr, entry->code, entry->code_size); + device->ws->buffer_unmap(variant->bo); + + entry->variant = variant; + } + + __sync_fetch_and_add(&entry->variant->ref_count, 1); + return entry->variant; +} + + +static void +radv_pipeline_cache_set_entry(struct radv_pipeline_cache *cache, + struct cache_entry *entry) +{ + const uint32_t mask = cache->table_size - 1; + const uint32_t start = entry->sha1_dw[0]; + + /* We'll always be able to insert when we get here. */ + assert(cache->kernel_count < cache->table_size / 2); + + for (uint32_t i = 0; i < cache->table_size; i++) { + const uint32_t index = (start + i) & mask; + if (!cache->hash_table[index]) { + cache->hash_table[index] = entry; + break; + } + } + + cache->total_size += entry_size(entry); + cache->kernel_count++; +} + + +static VkResult +radv_pipeline_cache_grow(struct radv_pipeline_cache *cache) +{ + const uint32_t table_size = cache->table_size * 2; + const uint32_t old_table_size = cache->table_size; + const size_t byte_size = table_size * sizeof(cache->hash_table[0]); + struct cache_entry **table; + struct cache_entry **old_table = cache->hash_table; + + table = malloc(byte_size); + if (table == NULL) + return VK_ERROR_OUT_OF_HOST_MEMORY; + + cache->hash_table = table; + cache->table_size = table_size; + cache->kernel_count = 0; + cache->total_size = 0; + + memset(cache->hash_table, 0, byte_size); + for (uint32_t i = 0; i < old_table_size; i++) { + struct cache_entry *entry = old_table[i]; + if (!entry) + continue; + + radv_pipeline_cache_set_entry(cache, entry); + } + + free(old_table); + + return VK_SUCCESS; +} + +static void +radv_pipeline_cache_add_entry(struct radv_pipeline_cache *cache, + struct cache_entry *entry) +{ + if (cache->kernel_count == cache->table_size / 2) + radv_pipeline_cache_grow(cache); + + /* Failing to grow that hash table isn't fatal, but may mean we don't + * have enough space to add this new kernel. Only add it if there's room. + */ + if (cache->kernel_count < cache->table_size / 2) + radv_pipeline_cache_set_entry(cache, entry); +} + +struct radv_shader_variant * +radv_pipeline_cache_insert_shader(struct radv_pipeline_cache *cache, + const unsigned char *sha1, + struct radv_shader_variant *variant, + const void *code, unsigned code_size) +{ + pthread_mutex_lock(&cache->mutex); + struct cache_entry *entry = radv_pipeline_cache_search_unlocked(cache, sha1); + if (entry) { + if (entry->variant) { + radv_shader_variant_destroy(cache->device, variant); + variant = entry->variant; + } else { + entry->variant = variant; + } + __sync_fetch_and_add(&variant->ref_count, 1); + pthread_mutex_unlock(&cache->mutex); + return variant; + } + + entry = vk_alloc(&cache->alloc, sizeof(*entry) + code_size, 8, + VK_SYSTEM_ALLOCATION_SCOPE_CACHE); + if (!entry) { + pthread_mutex_unlock(&cache->mutex); + return variant; + } + + memcpy(entry->sha1, sha1, 20); + memcpy(entry->code, code, code_size); + entry->config = variant->config; + entry->variant_info = variant->info; + entry->rsrc1 = variant->rsrc1; + entry->rsrc2 = variant->rsrc2; + entry->code_size = code_size; + entry->variant = variant; + __sync_fetch_and_add(&variant->ref_count, 1); + + radv_pipeline_cache_add_entry(cache, entry); + + cache->modified = true; + pthread_mutex_unlock(&cache->mutex); + return variant; +} + +struct cache_header { + uint32_t header_size; + uint32_t header_version; + uint32_t vendor_id; + uint32_t device_id; + uint8_t uuid[VK_UUID_SIZE]; +}; +void +radv_pipeline_cache_load(struct radv_pipeline_cache *cache, + const void *data, size_t size) +{ + struct radv_device *device = cache->device; + struct cache_header header; + + if (size < sizeof(header)) + return; + memcpy(&header, data, sizeof(header)); + if (header.header_size < sizeof(header)) + return; + if (header.header_version != VK_PIPELINE_CACHE_HEADER_VERSION_ONE) + return; + if (header.vendor_id != 0x1002) + return; + if (header.device_id != device->physical_device->rad_info.pci_id) + return; + if (memcmp(header.uuid, device->physical_device->uuid, VK_UUID_SIZE) != 0) + return; + + char *end = (void *) data + size; + char *p = (void *) data + header.header_size; + + while (end - p >= sizeof(struct cache_entry)) { + struct cache_entry *entry = (struct cache_entry*)p; + struct cache_entry *dest_entry; + if(end - p < sizeof(*entry) + entry->code_size) + break; + + dest_entry = vk_alloc(&cache->alloc, sizeof(*entry) + entry->code_size, + 8, VK_SYSTEM_ALLOCATION_SCOPE_CACHE); + if (dest_entry) { + memcpy(dest_entry, entry, sizeof(*entry) + entry->code_size); + dest_entry->variant = NULL; + radv_pipeline_cache_add_entry(cache, dest_entry); + } + p += sizeof (*entry) + entry->code_size; + } +} + +VkResult radv_CreatePipelineCache( + VkDevice _device, + const VkPipelineCacheCreateInfo* pCreateInfo, + const VkAllocationCallbacks* pAllocator, + VkPipelineCache* pPipelineCache) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + struct radv_pipeline_cache *cache; + + assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_PIPELINE_CACHE_CREATE_INFO); + assert(pCreateInfo->flags == 0); + + cache = vk_alloc2(&device->alloc, pAllocator, + sizeof(*cache), 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (cache == NULL) + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + + if (pAllocator) + cache->alloc = *pAllocator; + else + cache->alloc = device->alloc; + + radv_pipeline_cache_init(cache, device); + + if (pCreateInfo->initialDataSize > 0) { + radv_pipeline_cache_load(cache, + pCreateInfo->pInitialData, + pCreateInfo->initialDataSize); + } + + *pPipelineCache = radv_pipeline_cache_to_handle(cache); + + return VK_SUCCESS; +} + +void radv_DestroyPipelineCache( + VkDevice _device, + VkPipelineCache _cache, + const VkAllocationCallbacks* pAllocator) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_pipeline_cache, cache, _cache); + + if (!cache) + return; + radv_pipeline_cache_finish(cache); + + vk_free2(&device->alloc, pAllocator, cache); +} + +VkResult radv_GetPipelineCacheData( + VkDevice _device, + VkPipelineCache _cache, + size_t* pDataSize, + void* pData) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_pipeline_cache, cache, _cache); + struct cache_header *header; + VkResult result = VK_SUCCESS; + const size_t size = sizeof(*header) + cache->total_size; + if (pData == NULL) { + *pDataSize = size; + return VK_SUCCESS; + } + if (*pDataSize < sizeof(*header)) { + *pDataSize = 0; + return VK_INCOMPLETE; + } + void *p = pData, *end = pData + *pDataSize; + header = p; + header->header_size = sizeof(*header); + header->header_version = VK_PIPELINE_CACHE_HEADER_VERSION_ONE; + header->vendor_id = 0x1002; + header->device_id = device->physical_device->rad_info.pci_id; + memcpy(header->uuid, device->physical_device->uuid, VK_UUID_SIZE); + p += header->header_size; + + struct cache_entry *entry; + for (uint32_t i = 0; i < cache->table_size; i++) { + if (!cache->hash_table[i]) + continue; + entry = cache->hash_table[i]; + const uint32_t size = entry_size(entry); + if (end < p + size) { + result = VK_INCOMPLETE; + break; + } + + memcpy(p, entry, size); + ((struct cache_entry*)p)->variant = NULL; + p += size; + } + *pDataSize = p - pData; + + return result; +} + +static void +radv_pipeline_cache_merge(struct radv_pipeline_cache *dst, + struct radv_pipeline_cache *src) +{ + for (uint32_t i = 0; i < src->table_size; i++) { + struct cache_entry *entry = src->hash_table[i]; + if (!entry || radv_pipeline_cache_search(dst, entry->sha1)) + continue; + + radv_pipeline_cache_add_entry(dst, entry); + + src->hash_table[i] = NULL; + } +} + +VkResult radv_MergePipelineCaches( + VkDevice _device, + VkPipelineCache destCache, + uint32_t srcCacheCount, + const VkPipelineCache* pSrcCaches) +{ + RADV_FROM_HANDLE(radv_pipeline_cache, dst, destCache); + + for (uint32_t i = 0; i < srcCacheCount; i++) { + RADV_FROM_HANDLE(radv_pipeline_cache, src, pSrcCaches[i]); + + radv_pipeline_cache_merge(dst, src); + } + + return VK_SUCCESS; +} diff -Nru mesa-12.0.6/src/amd/vulkan/radv_private.h mesa-17.0.7/src/amd/vulkan/radv_private.h --- mesa-12.0.6/src/amd/vulkan/radv_private.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_private.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,1334 @@ +/* + * Copyright © 2016 Red Hat. + * Copyright © 2016 Bas Nieuwenhuizen + * + * based in part on anv driver which is: + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef RADV_PRIVATE_H +#define RADV_PRIVATE_H + +#include +#include +#include +#include +#include +#include +#include +#ifdef HAVE_VALGRIND +#include +#include +#define VG(x) x +#else +#define VG(x) +#endif + +#include +#include "compiler/shader_enums.h" +#include "util/macros.h" +#include "util/list.h" +#include "util/vk_alloc.h" +#include "main/macros.h" + +#include "radv_radeon_winsys.h" +#include "ac_binary.h" +#include "ac_nir_to_llvm.h" +#include "radv_descriptor_set.h" + +#include + +/* Pre-declarations needed for WSI entrypoints */ +struct wl_surface; +struct wl_display; +typedef struct xcb_connection_t xcb_connection_t; +typedef uint32_t xcb_visualid_t; +typedef uint32_t xcb_window_t; + +#include +#include +#include + +#include "radv_entrypoints.h" + +#include "wsi_common.h" + +#define MAX_VBS 32 +#define MAX_VERTEX_ATTRIBS 32 +#define MAX_RTS 8 +#define MAX_VIEWPORTS 16 +#define MAX_SCISSORS 16 +#define MAX_PUSH_CONSTANTS_SIZE 128 +#define MAX_DYNAMIC_BUFFERS 16 +#define MAX_SAMPLES_LOG2 4 +#define NUM_META_FS_KEYS 11 +#define RADV_MAX_DRM_DEVICES 8 + +#define NUM_DEPTH_CLEAR_PIPELINES 3 + +enum radv_mem_heap { + RADV_MEM_HEAP_VRAM, + RADV_MEM_HEAP_VRAM_CPU_ACCESS, + RADV_MEM_HEAP_GTT, + RADV_MEM_HEAP_COUNT +}; + +enum radv_mem_type { + RADV_MEM_TYPE_VRAM, + RADV_MEM_TYPE_GTT_WRITE_COMBINE, + RADV_MEM_TYPE_VRAM_CPU_ACCESS, + RADV_MEM_TYPE_GTT_CACHED, + RADV_MEM_TYPE_COUNT +}; + + +enum { + RADV_DEBUG_FAST_CLEARS = 0x1, + RADV_DEBUG_NO_DCC = 0x2, + RADV_DEBUG_DUMP_SHADERS = 0x4, + RADV_DEBUG_NO_CACHE = 0x8, + RADV_DEBUG_DUMP_SHADER_STATS = 0x10, + RADV_DEBUG_NO_HIZ = 0x20, + RADV_DEBUG_NO_COMPUTE_QUEUE = 0x40, + RADV_DEBUG_UNSAFE_MATH = 0x80, +}; + +#define radv_printflike(a, b) __attribute__((__format__(__printf__, a, b))) + +static inline uint32_t +align_u32(uint32_t v, uint32_t a) +{ + assert(a != 0 && a == (a & -a)); + return (v + a - 1) & ~(a - 1); +} + +static inline uint32_t +align_u32_npot(uint32_t v, uint32_t a) +{ + return (v + a - 1) / a * a; +} + +static inline uint64_t +align_u64(uint64_t v, uint64_t a) +{ + assert(a != 0 && a == (a & -a)); + return (v + a - 1) & ~(a - 1); +} + +static inline int32_t +align_i32(int32_t v, int32_t a) +{ + assert(a != 0 && a == (a & -a)); + return (v + a - 1) & ~(a - 1); +} + +/** Alignment must be a power of 2. */ +static inline bool +radv_is_aligned(uintmax_t n, uintmax_t a) +{ + assert(a == (a & -a)); + return (n & (a - 1)) == 0; +} + +static inline uint32_t +round_up_u32(uint32_t v, uint32_t a) +{ + return (v + a - 1) / a; +} + +static inline uint64_t +round_up_u64(uint64_t v, uint64_t a) +{ + return (v + a - 1) / a; +} + +static inline uint32_t +radv_minify(uint32_t n, uint32_t levels) +{ + if (unlikely(n == 0)) + return 0; + else + return MAX2(n >> levels, 1); +} +static inline float +radv_clamp_f(float f, float min, float max) +{ + assert(min < max); + + if (f > max) + return max; + else if (f < min) + return min; + else + return f; +} + +static inline bool +radv_clear_mask(uint32_t *inout_mask, uint32_t clear_mask) +{ + if (*inout_mask & clear_mask) { + *inout_mask &= ~clear_mask; + return true; + } else { + return false; + } +} + +#define for_each_bit(b, dword) \ + for (uint32_t __dword = (dword); \ + (b) = __builtin_ffs(__dword) - 1, __dword; \ + __dword &= ~(1 << (b))) + +#define typed_memcpy(dest, src, count) ({ \ + STATIC_ASSERT(sizeof(*src) == sizeof(*dest)); \ + memcpy((dest), (src), (count) * sizeof(*(src))); \ + }) + +#define zero(x) (memset(&(x), 0, sizeof(x))) + +/* Whenever we generate an error, pass it through this function. Useful for + * debugging, where we can break on it. Only call at error site, not when + * propagating errors. Might be useful to plug in a stack trace here. + */ + +VkResult __vk_errorf(VkResult error, const char *file, int line, const char *format, ...); + +#ifdef DEBUG +#define vk_error(error) __vk_errorf(error, __FILE__, __LINE__, NULL); +#define vk_errorf(error, format, ...) __vk_errorf(error, __FILE__, __LINE__, format, ## __VA_ARGS__); +#else +#define vk_error(error) error +#define vk_errorf(error, format, ...) error +#endif + +void __radv_finishme(const char *file, int line, const char *format, ...) + radv_printflike(3, 4); +void radv_loge(const char *format, ...) radv_printflike(1, 2); +void radv_loge_v(const char *format, va_list va); + +/** + * Print a FINISHME message, including its source location. + */ +#define radv_finishme(format, ...) \ + do { \ + static bool reported = false; \ + if (!reported) { \ + __radv_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__); \ + reported = true; \ + } \ + } while (0) + +/* A non-fatal assert. Useful for debugging. */ +#ifdef DEBUG +#define radv_assert(x) ({ \ + if (unlikely(!(x))) \ + fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \ + }) +#else +#define radv_assert(x) +#endif + +#define stub_return(v) \ + do { \ + radv_finishme("stub %s", __func__); \ + return (v); \ + } while (0) + +#define stub() \ + do { \ + radv_finishme("stub %s", __func__); \ + return; \ + } while (0) + +void *radv_resolve_entrypoint(uint32_t index); +void *radv_lookup_entrypoint(const char *name); + +extern struct radv_dispatch_table dtable; + +struct radv_extensions { + VkExtensionProperties *ext_array; + uint32_t num_ext; +}; + +struct radv_physical_device { + VK_LOADER_DATA _loader_data; + + struct radv_instance * instance; + + struct radeon_winsys *ws; + struct radeon_info rad_info; + char path[20]; + const char * name; + uint8_t uuid[VK_UUID_SIZE]; + + struct wsi_device wsi_device; + struct radv_extensions extensions; +}; + +struct radv_instance { + VK_LOADER_DATA _loader_data; + + VkAllocationCallbacks alloc; + + uint32_t apiVersion; + int physicalDeviceCount; + struct radv_physical_device physicalDevices[RADV_MAX_DRM_DEVICES]; + + uint64_t debug_flags; +}; + +VkResult radv_init_wsi(struct radv_physical_device *physical_device); +void radv_finish_wsi(struct radv_physical_device *physical_device); + +struct cache_entry; + +struct radv_pipeline_cache { + struct radv_device * device; + pthread_mutex_t mutex; + + uint32_t total_size; + uint32_t table_size; + uint32_t kernel_count; + struct cache_entry ** hash_table; + bool modified; + + VkAllocationCallbacks alloc; +}; + +void +radv_pipeline_cache_init(struct radv_pipeline_cache *cache, + struct radv_device *device); +void +radv_pipeline_cache_finish(struct radv_pipeline_cache *cache); +void +radv_pipeline_cache_load(struct radv_pipeline_cache *cache, + const void *data, size_t size); + +struct radv_shader_variant * +radv_create_shader_variant_from_pipeline_cache(struct radv_device *device, + struct radv_pipeline_cache *cache, + const unsigned char *sha1); + +struct radv_shader_variant * +radv_pipeline_cache_insert_shader(struct radv_pipeline_cache *cache, + const unsigned char *sha1, + struct radv_shader_variant *variant, + const void *code, unsigned code_size); + +void radv_shader_variant_destroy(struct radv_device *device, + struct radv_shader_variant *variant); + +struct radv_meta_state { + VkAllocationCallbacks alloc; + + struct radv_pipeline_cache cache; + + /** + * Use array element `i` for images with `2^i` samples. + */ + struct { + VkRenderPass render_pass[NUM_META_FS_KEYS]; + struct radv_pipeline *color_pipelines[NUM_META_FS_KEYS]; + + VkRenderPass depthstencil_rp; + struct radv_pipeline *depth_only_pipeline[NUM_DEPTH_CLEAR_PIPELINES]; + struct radv_pipeline *stencil_only_pipeline[NUM_DEPTH_CLEAR_PIPELINES]; + struct radv_pipeline *depthstencil_pipeline[NUM_DEPTH_CLEAR_PIPELINES]; + } clear[1 + MAX_SAMPLES_LOG2]; + + struct { + VkRenderPass render_pass[NUM_META_FS_KEYS]; + + /** Pipeline that blits from a 1D image. */ + VkPipeline pipeline_1d_src[NUM_META_FS_KEYS]; + + /** Pipeline that blits from a 2D image. */ + VkPipeline pipeline_2d_src[NUM_META_FS_KEYS]; + + /** Pipeline that blits from a 3D image. */ + VkPipeline pipeline_3d_src[NUM_META_FS_KEYS]; + + VkRenderPass depth_only_rp; + VkPipeline depth_only_1d_pipeline; + VkPipeline depth_only_2d_pipeline; + VkPipeline depth_only_3d_pipeline; + + VkRenderPass stencil_only_rp; + VkPipeline stencil_only_1d_pipeline; + VkPipeline stencil_only_2d_pipeline; + VkPipeline stencil_only_3d_pipeline; + VkPipelineLayout pipeline_layout; + VkDescriptorSetLayout ds_layout; + } blit; + + struct { + VkRenderPass render_passes[NUM_META_FS_KEYS]; + + VkPipelineLayout p_layouts[2]; + VkDescriptorSetLayout ds_layouts[2]; + VkPipeline pipelines[2][NUM_META_FS_KEYS]; + + VkRenderPass depth_only_rp; + VkPipeline depth_only_pipeline[2]; + + VkRenderPass stencil_only_rp; + VkPipeline stencil_only_pipeline[2]; + } blit2d; + + struct { + VkPipelineLayout img_p_layout; + VkDescriptorSetLayout img_ds_layout; + VkPipeline pipeline; + } itob; + struct { + VkRenderPass render_pass; + VkPipelineLayout img_p_layout; + VkDescriptorSetLayout img_ds_layout; + VkPipeline pipeline; + } btoi; + struct { + VkPipelineLayout img_p_layout; + VkDescriptorSetLayout img_ds_layout; + VkPipeline pipeline; + } itoi; + struct { + VkPipelineLayout img_p_layout; + VkDescriptorSetLayout img_ds_layout; + VkPipeline pipeline; + } cleari; + + struct { + VkPipeline pipeline; + VkRenderPass pass; + } resolve; + + struct { + VkDescriptorSetLayout ds_layout; + VkPipelineLayout p_layout; + struct { + VkPipeline pipeline; + VkPipeline i_pipeline; + } rc[MAX_SAMPLES_LOG2]; + } resolve_compute; + + struct { + VkPipeline decompress_pipeline; + VkPipeline resummarize_pipeline; + VkRenderPass pass; + } depth_decomp; + + struct { + VkPipeline cmask_eliminate_pipeline; + VkPipeline fmask_decompress_pipeline; + VkRenderPass pass; + } fast_clear_flush; + + struct { + VkPipelineLayout fill_p_layout; + VkPipelineLayout copy_p_layout; + VkDescriptorSetLayout fill_ds_layout; + VkDescriptorSetLayout copy_ds_layout; + VkPipeline fill_pipeline; + VkPipeline copy_pipeline; + } buffer; +}; + +/* queue types */ +#define RADV_QUEUE_GENERAL 0 +#define RADV_QUEUE_COMPUTE 1 +#define RADV_QUEUE_TRANSFER 2 + +#define RADV_MAX_QUEUE_FAMILIES 3 + +enum ring_type radv_queue_family_to_ring(int f); + +struct radv_queue { + VK_LOADER_DATA _loader_data; + struct radv_device * device; + struct radeon_winsys_ctx *hw_ctx; + int queue_family_index; + int queue_idx; +}; + +struct radv_device { + VK_LOADER_DATA _loader_data; + + VkAllocationCallbacks alloc; + + struct radv_instance * instance; + struct radeon_winsys *ws; + + struct radv_meta_state meta_state; + + struct radv_queue *queues[RADV_MAX_QUEUE_FAMILIES]; + int queue_count[RADV_MAX_QUEUE_FAMILIES]; + struct radeon_winsys_cs *empty_cs[RADV_MAX_QUEUE_FAMILIES]; + + uint64_t debug_flags; + + /* MSAA sample locations. + * The first index is the sample index. + * The second index is the coordinate: X, Y. */ + float sample_locations_1x[1][2]; + float sample_locations_2x[2][2]; + float sample_locations_4x[4][2]; + float sample_locations_8x[8][2]; + float sample_locations_16x[16][2]; + + struct radeon_winsys_bo *trace_bo; + uint32_t *trace_id_ptr; + + struct radv_physical_device *physical_device; +}; + +struct radv_device_memory { + struct radeon_winsys_bo *bo; + uint32_t type_index; + VkDeviceSize map_size; + void * map; +}; + + +struct radv_descriptor_range { + uint64_t va; + uint32_t size; +}; + +struct radv_descriptor_set { + const struct radv_descriptor_set_layout *layout; + struct list_head descriptor_pool; + uint32_t size; + + struct radv_buffer_view *buffer_views; + struct radeon_winsys_bo *bo; + uint64_t va; + uint32_t *mapped_ptr; + struct radv_descriptor_range *dynamic_descriptors; + struct radeon_winsys_bo *descriptors[0]; +}; + +struct radv_descriptor_pool_free_node { + int next; + uint32_t offset; + uint32_t size; +}; + +struct radv_descriptor_pool { + struct list_head descriptor_sets; + + struct radeon_winsys_bo *bo; + uint8_t *mapped_ptr; + uint64_t current_offset; + uint64_t size; + + int free_list; + int full_list; + uint32_t max_sets; + uint32_t allocated_sets; + struct radv_descriptor_pool_free_node free_nodes[]; +}; + +struct radv_buffer { + struct radv_device * device; + VkDeviceSize size; + + VkBufferUsageFlags usage; + + /* Set when bound */ + struct radeon_winsys_bo * bo; + VkDeviceSize offset; +}; + + +enum radv_cmd_dirty_bits { + RADV_CMD_DIRTY_DYNAMIC_VIEWPORT = 1 << 0, /* VK_DYNAMIC_STATE_VIEWPORT */ + RADV_CMD_DIRTY_DYNAMIC_SCISSOR = 1 << 1, /* VK_DYNAMIC_STATE_SCISSOR */ + RADV_CMD_DIRTY_DYNAMIC_LINE_WIDTH = 1 << 2, /* VK_DYNAMIC_STATE_LINE_WIDTH */ + RADV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS = 1 << 3, /* VK_DYNAMIC_STATE_DEPTH_BIAS */ + RADV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS = 1 << 4, /* VK_DYNAMIC_STATE_BLEND_CONSTANTS */ + RADV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS = 1 << 5, /* VK_DYNAMIC_STATE_DEPTH_BOUNDS */ + RADV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6, /* VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK */ + RADV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7, /* VK_DYNAMIC_STATE_STENCIL_WRITE_MASK */ + RADV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE = 1 << 8, /* VK_DYNAMIC_STATE_STENCIL_REFERENCE */ + RADV_CMD_DIRTY_DYNAMIC_ALL = (1 << 9) - 1, + RADV_CMD_DIRTY_PIPELINE = 1 << 9, + RADV_CMD_DIRTY_INDEX_BUFFER = 1 << 10, + RADV_CMD_DIRTY_RENDER_TARGETS = 1 << 11, +}; +typedef uint32_t radv_cmd_dirty_mask_t; + +enum radv_cmd_flush_bits { + RADV_CMD_FLAG_INV_ICACHE = 1 << 0, + /* SMEM L1, other names: KCACHE, constant cache, DCACHE, data cache */ + RADV_CMD_FLAG_INV_SMEM_L1 = 1 << 1, + /* VMEM L1 can optionally be bypassed (GLC=1). Other names: TC L1 */ + RADV_CMD_FLAG_INV_VMEM_L1 = 1 << 2, + /* Used by everything except CB/DB, can be bypassed (SLC=1). Other names: TC L2 */ + RADV_CMD_FLAG_INV_GLOBAL_L2 = 1 << 3, + /* Framebuffer caches */ + RADV_CMD_FLAG_FLUSH_AND_INV_CB_META = 1 << 4, + RADV_CMD_FLAG_FLUSH_AND_INV_DB_META = 1 << 5, + RADV_CMD_FLAG_FLUSH_AND_INV_DB = 1 << 6, + RADV_CMD_FLAG_FLUSH_AND_INV_CB = 1 << 7, + /* Engine synchronization. */ + RADV_CMD_FLAG_VS_PARTIAL_FLUSH = 1 << 8, + RADV_CMD_FLAG_PS_PARTIAL_FLUSH = 1 << 9, + RADV_CMD_FLAG_CS_PARTIAL_FLUSH = 1 << 10, + RADV_CMD_FLAG_VGT_FLUSH = 1 << 11, + + RADV_CMD_FLUSH_AND_INV_FRAMEBUFFER = (RADV_CMD_FLAG_FLUSH_AND_INV_CB | + RADV_CMD_FLAG_FLUSH_AND_INV_CB_META | + RADV_CMD_FLAG_FLUSH_AND_INV_DB | + RADV_CMD_FLAG_FLUSH_AND_INV_DB_META) +}; + +struct radv_vertex_binding { + struct radv_buffer * buffer; + VkDeviceSize offset; +}; + +struct radv_dynamic_state { + struct { + uint32_t count; + VkViewport viewports[MAX_VIEWPORTS]; + } viewport; + + struct { + uint32_t count; + VkRect2D scissors[MAX_SCISSORS]; + } scissor; + + float line_width; + + struct { + float bias; + float clamp; + float slope; + } depth_bias; + + float blend_constants[4]; + + struct { + float min; + float max; + } depth_bounds; + + struct { + uint32_t front; + uint32_t back; + } stencil_compare_mask; + + struct { + uint32_t front; + uint32_t back; + } stencil_write_mask; + + struct { + uint32_t front; + uint32_t back; + } stencil_reference; +}; + +extern const struct radv_dynamic_state default_dynamic_state; + +void radv_dynamic_state_copy(struct radv_dynamic_state *dest, + const struct radv_dynamic_state *src, + uint32_t copy_mask); +/** + * Attachment state when recording a renderpass instance. + * + * The clear value is valid only if there exists a pending clear. + */ +struct radv_attachment_state { + VkImageAspectFlags pending_clear_aspects; + VkClearValue clear_value; + VkImageLayout current_layout; +}; + +struct radv_cmd_state { + uint32_t vb_dirty; + bool vertex_descriptors_dirty; + radv_cmd_dirty_mask_t dirty; + + struct radv_pipeline * pipeline; + struct radv_pipeline * emitted_pipeline; + struct radv_pipeline * compute_pipeline; + struct radv_pipeline * emitted_compute_pipeline; + struct radv_framebuffer * framebuffer; + struct radv_render_pass * pass; + const struct radv_subpass * subpass; + struct radv_dynamic_state dynamic; + struct radv_vertex_binding vertex_bindings[MAX_VBS]; + struct radv_descriptor_set * descriptors[MAX_SETS]; + struct radv_attachment_state * attachments; + VkRect2D render_area; + struct radv_buffer * index_buffer; + uint32_t index_type; + uint32_t index_offset; + uint32_t last_primitive_reset_index; + enum radv_cmd_flush_bits flush_bits; + unsigned active_occlusion_queries; + float offset_scale; + uint32_t descriptors_dirty; + uint32_t trace_id; +}; + +struct radv_cmd_pool { + VkAllocationCallbacks alloc; + struct list_head cmd_buffers; + uint32_t queue_family_index; +}; + +struct radv_cmd_buffer_upload { + uint8_t *map; + unsigned offset; + uint64_t size; + struct radeon_winsys_bo *upload_bo; + struct list_head list; +}; + +struct radv_cmd_buffer { + VK_LOADER_DATA _loader_data; + + struct radv_device * device; + + struct radv_cmd_pool * pool; + struct list_head pool_link; + + VkCommandBufferUsageFlags usage_flags; + VkCommandBufferLevel level; + struct radeon_winsys_cs *cs; + struct radv_cmd_state state; + uint32_t queue_family_index; + + uint8_t push_constants[MAX_PUSH_CONSTANTS_SIZE]; + uint32_t dynamic_buffers[16 * MAX_DYNAMIC_BUFFERS]; + VkShaderStageFlags push_constant_stages; + + struct radv_cmd_buffer_upload upload; + + bool record_fail; +}; + +struct radv_image; + +bool radv_cmd_buffer_uses_mec(struct radv_cmd_buffer *cmd_buffer); + +void si_init_compute(struct radv_physical_device *physical_device, + struct radv_cmd_buffer *cmd_buffer); +void si_init_config(struct radv_physical_device *physical_device, + struct radv_cmd_buffer *cmd_buffer); +void si_write_viewport(struct radeon_winsys_cs *cs, int first_vp, + int count, const VkViewport *viewports); +void si_write_scissors(struct radeon_winsys_cs *cs, int first, + int count, const VkRect2D *scissors); +uint32_t si_get_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer); +void si_emit_cache_flush(struct radv_cmd_buffer *cmd_buffer); +void si_cp_dma_buffer_copy(struct radv_cmd_buffer *cmd_buffer, + uint64_t src_va, uint64_t dest_va, + uint64_t size); +void si_cp_dma_clear_buffer(struct radv_cmd_buffer *cmd_buffer, uint64_t va, + uint64_t size, unsigned value); +void radv_set_db_count_control(struct radv_cmd_buffer *cmd_buffer); +void radv_bind_descriptor_set(struct radv_cmd_buffer *cmd_buffer, + struct radv_descriptor_set *set, + unsigned idx); +bool +radv_cmd_buffer_upload_alloc(struct radv_cmd_buffer *cmd_buffer, + unsigned size, + unsigned alignment, + unsigned *out_offset, + void **ptr); +void +radv_cmd_buffer_set_subpass(struct radv_cmd_buffer *cmd_buffer, + const struct radv_subpass *subpass, + bool transitions); +bool +radv_cmd_buffer_upload_data(struct radv_cmd_buffer *cmd_buffer, + unsigned size, unsigned alignmnet, + const void *data, unsigned *out_offset); +void +radv_emit_framebuffer_state(struct radv_cmd_buffer *cmd_buffer); +void radv_cmd_buffer_clear_subpass(struct radv_cmd_buffer *cmd_buffer); +void radv_cmd_buffer_resolve_subpass(struct radv_cmd_buffer *cmd_buffer); +void radv_cayman_emit_msaa_sample_locs(struct radeon_winsys_cs *cs, int nr_samples); +unsigned radv_cayman_get_maxdist(int log_samples); +void radv_device_init_msaa(struct radv_device *device); +void radv_set_depth_clear_regs(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *image, + VkClearDepthStencilValue ds_clear_value, + VkImageAspectFlags aspects); +void radv_set_color_clear_regs(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *image, + int idx, + uint32_t color_values[2]); +void radv_fill_buffer(struct radv_cmd_buffer *cmd_buffer, + struct radeon_winsys_bo *bo, + uint64_t offset, uint64_t size, uint32_t value); +void radv_cmd_buffer_trace_emit(struct radv_cmd_buffer *cmd_buffer); + +/* + * Takes x,y,z as exact numbers of invocations, instead of blocks. + * + * Limitations: Can't call normal dispatch functions without binding or rebinding + * the compute pipeline. + */ +void radv_unaligned_dispatch( + struct radv_cmd_buffer *cmd_buffer, + uint32_t x, + uint32_t y, + uint32_t z); + +struct radv_event { + struct radeon_winsys_bo *bo; + uint64_t *map; +}; + +struct nir_shader; + +struct radv_shader_module { + struct nir_shader * nir; + unsigned char sha1[20]; + uint32_t size; + char data[0]; +}; + +union ac_shader_variant_key; + +void +radv_hash_shader(unsigned char *hash, struct radv_shader_module *module, + const char *entrypoint, + const VkSpecializationInfo *spec_info, + const struct radv_pipeline_layout *layout, + const union ac_shader_variant_key *key); + +static inline gl_shader_stage +vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage) +{ + assert(__builtin_popcount(vk_stage) == 1); + return ffs(vk_stage) - 1; +} + +static inline VkShaderStageFlagBits +mesa_to_vk_shader_stage(gl_shader_stage mesa_stage) +{ + return (1 << mesa_stage); +} + +#define RADV_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1) + +#define radv_foreach_stage(stage, stage_bits) \ + for (gl_shader_stage stage, \ + __tmp = (gl_shader_stage)((stage_bits) & RADV_STAGE_MASK); \ + stage = __builtin_ffs(__tmp) - 1, __tmp; \ + __tmp &= ~(1 << (stage))) + +struct radv_shader_variant { + uint32_t ref_count; + + struct radeon_winsys_bo *bo; + struct ac_shader_config config; + struct ac_shader_variant_info info; + unsigned rsrc1; + unsigned rsrc2; + uint32_t code_size; +}; + +struct radv_depth_stencil_state { + uint32_t db_depth_control; + uint32_t db_stencil_control; + uint32_t db_render_control; + uint32_t db_render_override2; +}; + +struct radv_blend_state { + uint32_t cb_color_control; + uint32_t cb_target_mask; + uint32_t sx_mrt0_blend_opt[8]; + uint32_t cb_blend_control[8]; + + uint32_t spi_shader_col_format; + uint32_t cb_shader_mask; + uint32_t db_alpha_to_mask; +}; + +unsigned radv_format_meta_fs_key(VkFormat format); + +struct radv_raster_state { + uint32_t pa_cl_clip_cntl; + uint32_t pa_cl_vs_out_cntl; + uint32_t spi_interp_control; + uint32_t pa_su_point_size; + uint32_t pa_su_point_minmax; + uint32_t pa_su_line_cntl; + uint32_t pa_su_vtx_cntl; + uint32_t pa_su_sc_mode_cntl; +}; + +struct radv_multisample_state { + uint32_t db_eqaa; + uint32_t pa_sc_line_cntl; + uint32_t pa_sc_mode_cntl_0; + uint32_t pa_sc_mode_cntl_1; + uint32_t pa_sc_aa_config; + uint32_t pa_sc_aa_mask[2]; + unsigned num_samples; +}; + +struct radv_pipeline { + struct radv_device * device; + uint32_t dynamic_state_mask; + struct radv_dynamic_state dynamic_state; + + struct radv_pipeline_layout * layout; + + bool needs_data_cache; + + struct radv_shader_variant * shaders[MESA_SHADER_STAGES]; + VkShaderStageFlags active_stages; + + uint32_t va_rsrc_word3[MAX_VERTEX_ATTRIBS]; + uint32_t va_format_size[MAX_VERTEX_ATTRIBS]; + uint32_t va_binding[MAX_VERTEX_ATTRIBS]; + uint32_t va_offset[MAX_VERTEX_ATTRIBS]; + uint32_t num_vertex_attribs; + uint32_t binding_stride[MAX_VBS]; + + union { + struct { + struct radv_blend_state blend; + struct radv_depth_stencil_state ds; + struct radv_raster_state raster; + struct radv_multisample_state ms; + unsigned prim; + unsigned gs_out; + bool prim_restart_enable; + } graphics; + }; +}; + +struct radv_graphics_pipeline_create_info { + bool use_rectlist; + bool db_depth_clear; + bool db_stencil_clear; + bool db_depth_disable_expclear; + bool db_stencil_disable_expclear; + bool db_flush_depth_inplace; + bool db_flush_stencil_inplace; + bool db_resummarize; + uint32_t custom_blend_mode; +}; + +VkResult +radv_pipeline_init(struct radv_pipeline *pipeline, struct radv_device *device, + struct radv_pipeline_cache *cache, + const VkGraphicsPipelineCreateInfo *pCreateInfo, + const struct radv_graphics_pipeline_create_info *extra, + const VkAllocationCallbacks *alloc); + +VkResult +radv_graphics_pipeline_create(VkDevice device, + VkPipelineCache cache, + const VkGraphicsPipelineCreateInfo *pCreateInfo, + const struct radv_graphics_pipeline_create_info *extra, + const VkAllocationCallbacks *alloc, + VkPipeline *pPipeline); + +struct vk_format_description; +uint32_t radv_translate_buffer_dataformat(const struct vk_format_description *desc, + int first_non_void); +uint32_t radv_translate_buffer_numformat(const struct vk_format_description *desc, + int first_non_void); +uint32_t radv_translate_colorformat(VkFormat format); +uint32_t radv_translate_color_numformat(VkFormat format, + const struct vk_format_description *desc, + int first_non_void); +uint32_t radv_colorformat_endian_swap(uint32_t colorformat); +unsigned radv_translate_colorswap(VkFormat format, bool do_endian_swap); +uint32_t radv_translate_dbformat(VkFormat format); +uint32_t radv_translate_tex_dataformat(VkFormat format, + const struct vk_format_description *desc, + int first_non_void); +uint32_t radv_translate_tex_numformat(VkFormat format, + const struct vk_format_description *desc, + int first_non_void); +bool radv_format_pack_clear_color(VkFormat format, + uint32_t clear_vals[2], + VkClearColorValue *value); +bool radv_is_colorbuffer_format_supported(VkFormat format, bool *blendable); + +struct radv_fmask_info { + uint64_t offset; + uint64_t size; + unsigned alignment; + unsigned pitch_in_pixels; + unsigned bank_height; + unsigned slice_tile_max; + unsigned tile_mode_index; +}; + +struct radv_cmask_info { + uint64_t offset; + uint64_t size; + unsigned alignment; + unsigned slice_tile_max; + unsigned base_address_reg; +}; + +struct r600_htile_info { + uint64_t offset; + uint64_t size; + unsigned pitch; + unsigned height; + unsigned xalign; + unsigned yalign; +}; + +struct radv_image { + VkImageType type; + /* The original VkFormat provided by the client. This may not match any + * of the actual surface formats. + */ + VkFormat vk_format; + VkImageAspectFlags aspects; + VkExtent3D extent; + uint32_t levels; + uint32_t array_size; + uint32_t samples; /**< VkImageCreateInfo::samples */ + VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */ + VkImageTiling tiling; /** VkImageCreateInfo::tiling */ + + VkDeviceSize size; + uint32_t alignment; + + bool exclusive; + unsigned queue_family_mask; + + /* Set when bound */ + struct radeon_winsys_bo *bo; + VkDeviceSize offset; + uint32_t dcc_offset; + struct radeon_surf surface; + + struct radv_fmask_info fmask; + struct radv_cmask_info cmask; + uint32_t clear_value_offset; + + /* Depth buffer compression and fast clear. */ + struct r600_htile_info htile; +}; + +bool radv_layout_has_htile(const struct radv_image *image, + VkImageLayout layout); +bool radv_layout_is_htile_compressed(const struct radv_image *image, + VkImageLayout layout); +bool radv_layout_can_expclear(const struct radv_image *image, + VkImageLayout layout); +bool radv_layout_can_fast_clear(const struct radv_image *image, + VkImageLayout layout, + unsigned queue_mask); + + +unsigned radv_image_queue_family_mask(const struct radv_image *image, int family); + +static inline uint32_t +radv_get_layerCount(const struct radv_image *image, + const VkImageSubresourceRange *range) +{ + return range->layerCount == VK_REMAINING_ARRAY_LAYERS ? + image->array_size - range->baseArrayLayer : range->layerCount; +} + +static inline uint32_t +radv_get_levelCount(const struct radv_image *image, + const VkImageSubresourceRange *range) +{ + return range->levelCount == VK_REMAINING_MIP_LEVELS ? + image->levels - range->baseMipLevel : range->levelCount; +} + +struct radeon_bo_metadata; +void +radv_init_metadata(struct radv_device *device, + struct radv_image *image, + struct radeon_bo_metadata *metadata); + +struct radv_image_view { + struct radv_image *image; /**< VkImageViewCreateInfo::image */ + struct radeon_winsys_bo *bo; + + VkImageViewType type; + VkImageAspectFlags aspect_mask; + VkFormat vk_format; + uint32_t base_layer; + uint32_t layer_count; + uint32_t base_mip; + VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */ + + uint32_t descriptor[8]; + uint32_t fmask_descriptor[8]; +}; + +struct radv_image_create_info { + const VkImageCreateInfo *vk_info; + uint32_t stride; + bool scanout; +}; + +VkResult radv_image_create(VkDevice _device, + const struct radv_image_create_info *info, + const VkAllocationCallbacks* alloc, + VkImage *pImage); + +void radv_image_view_init(struct radv_image_view *view, + struct radv_device *device, + const VkImageViewCreateInfo* pCreateInfo, + struct radv_cmd_buffer *cmd_buffer, + VkImageUsageFlags usage_mask); +void radv_image_set_optimal_micro_tile_mode(struct radv_device *device, + struct radv_image *image, uint32_t micro_tile_mode); +struct radv_buffer_view { + struct radeon_winsys_bo *bo; + VkFormat vk_format; + uint64_t range; /**< VkBufferViewCreateInfo::range */ + uint32_t state[4]; +}; +void radv_buffer_view_init(struct radv_buffer_view *view, + struct radv_device *device, + const VkBufferViewCreateInfo* pCreateInfo, + struct radv_cmd_buffer *cmd_buffer); + +static inline struct VkExtent3D +radv_sanitize_image_extent(const VkImageType imageType, + const struct VkExtent3D imageExtent) +{ + switch (imageType) { + case VK_IMAGE_TYPE_1D: + return (VkExtent3D) { imageExtent.width, 1, 1 }; + case VK_IMAGE_TYPE_2D: + return (VkExtent3D) { imageExtent.width, imageExtent.height, 1 }; + case VK_IMAGE_TYPE_3D: + return imageExtent; + default: + unreachable("invalid image type"); + } +} + +static inline struct VkOffset3D +radv_sanitize_image_offset(const VkImageType imageType, + const struct VkOffset3D imageOffset) +{ + switch (imageType) { + case VK_IMAGE_TYPE_1D: + return (VkOffset3D) { imageOffset.x, 0, 0 }; + case VK_IMAGE_TYPE_2D: + return (VkOffset3D) { imageOffset.x, imageOffset.y, 0 }; + case VK_IMAGE_TYPE_3D: + return imageOffset; + default: + unreachable("invalid image type"); + } +} + +struct radv_sampler { + uint32_t state[4]; +}; + +struct radv_color_buffer_info { + uint32_t cb_color_base; + uint32_t cb_color_pitch; + uint32_t cb_color_slice; + uint32_t cb_color_view; + uint32_t cb_color_info; + uint32_t cb_color_attrib; + uint32_t cb_dcc_control; + uint32_t cb_color_cmask; + uint32_t cb_color_cmask_slice; + uint32_t cb_color_fmask; + uint32_t cb_color_fmask_slice; + uint32_t cb_clear_value0; + uint32_t cb_clear_value1; + uint32_t cb_dcc_base; + uint32_t micro_tile_mode; +}; + +struct radv_ds_buffer_info { + uint32_t db_depth_info; + uint32_t db_z_info; + uint32_t db_stencil_info; + uint32_t db_z_read_base; + uint32_t db_stencil_read_base; + uint32_t db_z_write_base; + uint32_t db_stencil_write_base; + uint32_t db_depth_view; + uint32_t db_depth_size; + uint32_t db_depth_slice; + uint32_t db_htile_surface; + uint32_t db_htile_data_base; + uint32_t pa_su_poly_offset_db_fmt_cntl; + float offset_scale; +}; + +struct radv_attachment_info { + union { + struct radv_color_buffer_info cb; + struct radv_ds_buffer_info ds; + }; + struct radv_image_view *attachment; +}; + +struct radv_framebuffer { + uint32_t width; + uint32_t height; + uint32_t layers; + + uint32_t attachment_count; + struct radv_attachment_info attachments[0]; +}; + +struct radv_subpass_barrier { + VkPipelineStageFlags src_stage_mask; + VkAccessFlags src_access_mask; + VkAccessFlags dst_access_mask; +}; + +struct radv_subpass { + uint32_t input_count; + VkAttachmentReference * input_attachments; + uint32_t color_count; + VkAttachmentReference * color_attachments; + VkAttachmentReference * resolve_attachments; + VkAttachmentReference depth_stencil_attachment; + + /** Subpass has at least one resolve attachment */ + bool has_resolve; + + struct radv_subpass_barrier start_barrier; +}; + +struct radv_render_pass_attachment { + VkFormat format; + uint32_t samples; + VkAttachmentLoadOp load_op; + VkAttachmentLoadOp stencil_load_op; + VkImageLayout initial_layout; + VkImageLayout final_layout; +}; + +struct radv_render_pass { + uint32_t attachment_count; + uint32_t subpass_count; + VkAttachmentReference * subpass_attachments; + struct radv_render_pass_attachment * attachments; + struct radv_subpass_barrier end_barrier; + struct radv_subpass subpasses[0]; +}; + +VkResult radv_device_init_meta(struct radv_device *device); +void radv_device_finish_meta(struct radv_device *device); + +struct radv_query_pool { + struct radeon_winsys_bo *bo; + uint32_t stride; + uint32_t availability_offset; + char *ptr; + VkQueryType type; +}; + +VkResult +radv_temp_descriptor_set_create(struct radv_device *device, + struct radv_cmd_buffer *cmd_buffer, + VkDescriptorSetLayout _layout, + VkDescriptorSet *_set); + +void +radv_temp_descriptor_set_destroy(struct radv_device *device, + VkDescriptorSet _set); +void radv_initialise_cmask(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *image, uint32_t value); +void radv_initialize_dcc(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *image, uint32_t value); + +struct radv_fence { + struct radeon_winsys_fence *fence; + bool submitted; + bool signalled; +}; + +#define RADV_DEFINE_HANDLE_CASTS(__radv_type, __VkType) \ + \ + static inline struct __radv_type * \ + __radv_type ## _from_handle(__VkType _handle) \ + { \ + return (struct __radv_type *) _handle; \ + } \ + \ + static inline __VkType \ + __radv_type ## _to_handle(struct __radv_type *_obj) \ + { \ + return (__VkType) _obj; \ + } + +#define RADV_DEFINE_NONDISP_HANDLE_CASTS(__radv_type, __VkType) \ + \ + static inline struct __radv_type * \ + __radv_type ## _from_handle(__VkType _handle) \ + { \ + return (struct __radv_type *)(uintptr_t) _handle; \ + } \ + \ + static inline __VkType \ + __radv_type ## _to_handle(struct __radv_type *_obj) \ + { \ + return (__VkType)(uintptr_t) _obj; \ + } + +#define RADV_FROM_HANDLE(__radv_type, __name, __handle) \ + struct __radv_type *__name = __radv_type ## _from_handle(__handle) + +RADV_DEFINE_HANDLE_CASTS(radv_cmd_buffer, VkCommandBuffer) +RADV_DEFINE_HANDLE_CASTS(radv_device, VkDevice) +RADV_DEFINE_HANDLE_CASTS(radv_instance, VkInstance) +RADV_DEFINE_HANDLE_CASTS(radv_physical_device, VkPhysicalDevice) +RADV_DEFINE_HANDLE_CASTS(radv_queue, VkQueue) + +RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_cmd_pool, VkCommandPool) +RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_buffer, VkBuffer) +RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_buffer_view, VkBufferView) +RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_descriptor_pool, VkDescriptorPool) +RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_descriptor_set, VkDescriptorSet) +RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_descriptor_set_layout, VkDescriptorSetLayout) +RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_device_memory, VkDeviceMemory) +RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_fence, VkFence) +RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_event, VkEvent) +RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_framebuffer, VkFramebuffer) +RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_image, VkImage) +RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_image_view, VkImageView); +RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_pipeline_cache, VkPipelineCache) +RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_pipeline, VkPipeline) +RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_pipeline_layout, VkPipelineLayout) +RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_query_pool, VkQueryPool) +RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_render_pass, VkRenderPass) +RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_sampler, VkSampler) +RADV_DEFINE_NONDISP_HANDLE_CASTS(radv_shader_module, VkShaderModule) + +#endif /* RADV_PRIVATE_H */ diff -Nru mesa-12.0.6/src/amd/vulkan/radv_query.c mesa-17.0.7/src/amd/vulkan/radv_query.c --- mesa-12.0.6/src/amd/vulkan/radv_query.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_query.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,454 @@ +/* + * Copyrigh 2016 Red Hat Inc. + * Based on anv: + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include +#include +#include +#include +#include + +#include "radv_private.h" +#include "radv_cs.h" +#include "sid.h" + +static unsigned get_max_db(struct radv_device *device) +{ + unsigned num_db = device->physical_device->rad_info.num_render_backends; + MAYBE_UNUSED unsigned rb_mask = device->physical_device->rad_info.enabled_rb_mask; + + if (device->physical_device->rad_info.chip_class == SI) + num_db = 8; + else + num_db = MAX2(8, num_db); + + /* Otherwise we need to change the query reset procedure */ + assert(rb_mask == ((1ull << num_db) - 1)); + + return num_db; +} + +VkResult radv_CreateQueryPool( + VkDevice _device, + const VkQueryPoolCreateInfo* pCreateInfo, + const VkAllocationCallbacks* pAllocator, + VkQueryPool* pQueryPool) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + uint64_t size; + struct radv_query_pool *pool = vk_alloc2(&device->alloc, pAllocator, + sizeof(*pool), 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + + if (!pool) + return VK_ERROR_OUT_OF_HOST_MEMORY; + + + switch(pCreateInfo->queryType) { + case VK_QUERY_TYPE_OCCLUSION: + /* 16 bytes tmp. buffer as the compute packet writes 64 bits, but + * the app. may have 32 bits of space. */ + pool->stride = 16 * get_max_db(device) + 16; + break; + case VK_QUERY_TYPE_PIPELINE_STATISTICS: + pool->stride = 16 * 11; + break; + case VK_QUERY_TYPE_TIMESTAMP: + pool->stride = 8; + break; + default: + unreachable("creating unhandled query type"); + } + + pool->type = pCreateInfo->queryType; + pool->availability_offset = pool->stride * pCreateInfo->queryCount; + size = pool->availability_offset + 4 * pCreateInfo->queryCount; + + pool->bo = device->ws->buffer_create(device->ws, size, + 64, RADEON_DOMAIN_GTT, 0); + + if (!pool->bo) { + vk_free2(&device->alloc, pAllocator, pool); + return VK_ERROR_OUT_OF_DEVICE_MEMORY; + } + + pool->ptr = device->ws->buffer_map(pool->bo); + + if (!pool->ptr) { + device->ws->buffer_destroy(pool->bo); + vk_free2(&device->alloc, pAllocator, pool); + return VK_ERROR_OUT_OF_DEVICE_MEMORY; + } + memset(pool->ptr, 0, size); + + *pQueryPool = radv_query_pool_to_handle(pool); + return VK_SUCCESS; +} + +void radv_DestroyQueryPool( + VkDevice _device, + VkQueryPool _pool, + const VkAllocationCallbacks* pAllocator) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_query_pool, pool, _pool); + + if (!pool) + return; + + device->ws->buffer_destroy(pool->bo); + vk_free2(&device->alloc, pAllocator, pool); +} + +VkResult radv_GetQueryPoolResults( + VkDevice _device, + VkQueryPool queryPool, + uint32_t firstQuery, + uint32_t queryCount, + size_t dataSize, + void* pData, + VkDeviceSize stride, + VkQueryResultFlags flags) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(radv_query_pool, pool, queryPool); + char *data = pData; + VkResult result = VK_SUCCESS; + + for(unsigned i = 0; i < queryCount; ++i, data += stride) { + char *dest = data; + unsigned query = firstQuery + i; + char *src = pool->ptr + query * pool->stride; + uint32_t available; + + switch (pool->type) { + case VK_QUERY_TYPE_TIMESTAMP: { + if (flags & VK_QUERY_RESULT_WAIT_BIT) { + while(!*(volatile uint32_t*)(pool->ptr + pool->availability_offset + 4 * query)) + ; + } + + available = *(uint32_t*)(pool->ptr + pool->availability_offset + 4 * query); + if (!available && !(flags & VK_QUERY_RESULT_PARTIAL_BIT)) { + result = VK_NOT_READY; + break; + + } + + if (flags & VK_QUERY_RESULT_64_BIT) { + *(uint64_t*)dest = *(uint64_t*)src; + dest += 8; + } else { + *(uint32_t*)dest = *(uint32_t*)src; + dest += 4; + } + break; + } + case VK_QUERY_TYPE_OCCLUSION: { + volatile uint64_t const *src64 = (volatile uint64_t const *)src; + uint64_t result = 0; + int db_count = get_max_db(device); + available = 1; + + for (int i = 0; i < db_count; ++i) { + uint64_t start, end; + do { + start = src64[2 * i]; + end = src64[2 * i + 1]; + } while ((!(start & (1ull << 63)) || !(end & (1ull << 63))) && (flags & VK_QUERY_RESULT_WAIT_BIT)); + + if (!(start & (1ull << 63)) || !(end & (1ull << 63))) + available = 0; + else { + result += end - start; + } + } + + if (!available && !(flags & VK_QUERY_RESULT_PARTIAL_BIT)) { + result = VK_NOT_READY; + break; + + } + + if (flags & VK_QUERY_RESULT_64_BIT) { + *(uint64_t*)dest = result; + dest += 8; + } else { + *(uint32_t*)dest = result; + dest += 4; + } + break; + default: + unreachable("trying to get results of unhandled query type"); + } + } + + if (flags & VK_QUERY_RESULT_WITH_AVAILABILITY_BIT) { + if (flags & VK_QUERY_RESULT_64_BIT) { + *(uint64_t*)dest = available; + } else { + *(uint32_t*)dest = available; + } + } + } + + return result; +} + +void radv_CmdCopyQueryPoolResults( + VkCommandBuffer commandBuffer, + VkQueryPool queryPool, + uint32_t firstQuery, + uint32_t queryCount, + VkBuffer dstBuffer, + VkDeviceSize dstOffset, + VkDeviceSize stride, + VkQueryResultFlags flags) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + RADV_FROM_HANDLE(radv_query_pool, pool, queryPool); + RADV_FROM_HANDLE(radv_buffer, dst_buffer, dstBuffer); + struct radeon_winsys_cs *cs = cmd_buffer->cs; + uint64_t va = cmd_buffer->device->ws->buffer_get_va(pool->bo); + uint64_t dest_va = cmd_buffer->device->ws->buffer_get_va(dst_buffer->bo); + dest_va += dst_buffer->offset + dstOffset; + + cmd_buffer->device->ws->cs_add_buffer(cmd_buffer->cs, pool->bo, 8); + cmd_buffer->device->ws->cs_add_buffer(cmd_buffer->cs, dst_buffer->bo, 8); + + for(unsigned i = 0; i < queryCount; ++i, dest_va += stride) { + unsigned query = firstQuery + i; + uint64_t local_src_va = va + query * pool->stride; + unsigned elem_size = (flags & VK_QUERY_RESULT_64_BIT) ? 8 : 4; + + MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, cs, 26); + + if (flags & VK_QUERY_RESULT_WAIT_BIT) { + /* TODO, not sure if there is any case where we won't always be ready yet */ + uint64_t avail_va = va + pool->availability_offset + 4 * query; + + + /* This waits on the ME. All copies below are done on the ME */ + radeon_emit(cs, PKT3(PKT3_WAIT_REG_MEM, 5, 0)); + radeon_emit(cs, WAIT_REG_MEM_EQUAL | WAIT_REG_MEM_MEM_SPACE(1)); + radeon_emit(cs, avail_va); + radeon_emit(cs, avail_va >> 32); + radeon_emit(cs, 1); /* reference value */ + radeon_emit(cs, 0xffffffff); /* mask */ + radeon_emit(cs, 4); /* poll interval */ + } + + switch (pool->type) { + case VK_QUERY_TYPE_OCCLUSION: + local_src_va += pool->stride - 16; + + case VK_QUERY_TYPE_TIMESTAMP: + radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0)); + radeon_emit(cs, COPY_DATA_SRC_SEL(COPY_DATA_MEM) | + COPY_DATA_DST_SEL(COPY_DATA_MEM) | + ((flags & VK_QUERY_RESULT_64_BIT) ? COPY_DATA_COUNT_SEL : 0)); + radeon_emit(cs, local_src_va); + radeon_emit(cs, local_src_va >> 32); + radeon_emit(cs, dest_va); + radeon_emit(cs, dest_va >> 32); + break; + default: + unreachable("trying to get results of unhandled query type"); + } + + /* The flag could be still changed while the data copy is busy and we + * then might have invalid data, but a ready flag. However, the availability + * writes happen on the ME too, so they should be synchronized. Might need to + * revisit this with multiple queues. + */ + if (flags & VK_QUERY_RESULT_WITH_AVAILABILITY_BIT) { + uint64_t avail_va = va + pool->availability_offset + 4 * query; + uint64_t avail_dest_va = dest_va; + if (pool->type != VK_QUERY_TYPE_PIPELINE_STATISTICS) + avail_dest_va += elem_size; + else + abort(); + + radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0)); + radeon_emit(cs, COPY_DATA_SRC_SEL(COPY_DATA_MEM) | + COPY_DATA_DST_SEL(COPY_DATA_MEM)); + radeon_emit(cs, avail_va); + radeon_emit(cs, avail_va >> 32); + radeon_emit(cs, avail_dest_va); + radeon_emit(cs, avail_dest_va >> 32); + } + + assert(cs->cdw <= cdw_max); + } + +} + +void radv_CmdResetQueryPool( + VkCommandBuffer commandBuffer, + VkQueryPool queryPool, + uint32_t firstQuery, + uint32_t queryCount) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + RADV_FROM_HANDLE(radv_query_pool, pool, queryPool); + uint64_t va = cmd_buffer->device->ws->buffer_get_va(pool->bo); + + cmd_buffer->device->ws->cs_add_buffer(cmd_buffer->cs, pool->bo, 8); + + si_cp_dma_clear_buffer(cmd_buffer, va + firstQuery * pool->stride, + queryCount * pool->stride, 0); + si_cp_dma_clear_buffer(cmd_buffer, va + pool->availability_offset + firstQuery * 4, + queryCount * 4, 0); +} + +void radv_CmdBeginQuery( + VkCommandBuffer commandBuffer, + VkQueryPool queryPool, + uint32_t query, + VkQueryControlFlags flags) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + RADV_FROM_HANDLE(radv_query_pool, pool, queryPool); + struct radeon_winsys_cs *cs = cmd_buffer->cs; + uint64_t va = cmd_buffer->device->ws->buffer_get_va(pool->bo); + va += pool->stride * query; + + cmd_buffer->device->ws->cs_add_buffer(cs, pool->bo, 8); + + switch (pool->type) { + case VK_QUERY_TYPE_OCCLUSION: + radeon_check_space(cmd_buffer->device->ws, cs, 7); + + ++cmd_buffer->state.active_occlusion_queries; + if (cmd_buffer->state.active_occlusion_queries == 1) + radv_set_db_count_control(cmd_buffer); + + radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0)); + radeon_emit(cs, EVENT_TYPE(V_028A90_ZPASS_DONE) | EVENT_INDEX(1)); + radeon_emit(cs, va); + radeon_emit(cs, va >> 32); + break; + default: + unreachable("beginning unhandled query type"); + } +} + + +void radv_CmdEndQuery( + VkCommandBuffer commandBuffer, + VkQueryPool queryPool, + uint32_t query) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + RADV_FROM_HANDLE(radv_query_pool, pool, queryPool); + struct radeon_winsys_cs *cs = cmd_buffer->cs; + uint64_t va = cmd_buffer->device->ws->buffer_get_va(pool->bo); + uint64_t avail_va = va + pool->availability_offset + 4 * query; + va += pool->stride * query; + + cmd_buffer->device->ws->cs_add_buffer(cs, pool->bo, 8); + + switch (pool->type) { + case VK_QUERY_TYPE_OCCLUSION: + radeon_check_space(cmd_buffer->device->ws, cs, 14); + + cmd_buffer->state.active_occlusion_queries--; + if (cmd_buffer->state.active_occlusion_queries == 0) + radv_set_db_count_control(cmd_buffer); + + radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0)); + radeon_emit(cs, EVENT_TYPE(V_028A90_ZPASS_DONE) | EVENT_INDEX(1)); + radeon_emit(cs, va + 8); + radeon_emit(cs, (va + 8) >> 32); + + /* hangs for VK_COMMAND_BUFFER_LEVEL_SECONDARY. */ + if (cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY) { + radeon_emit(cs, PKT3(PKT3_OCCLUSION_QUERY, 3, 0)); + radeon_emit(cs, va); + radeon_emit(cs, va >> 32); + radeon_emit(cs, va + pool->stride - 16); + radeon_emit(cs, (va + pool->stride - 16) >> 32); + } + + break; + default: + unreachable("ending unhandled query type"); + } + + radeon_check_space(cmd_buffer->device->ws, cs, 5); + + radeon_emit(cs, PKT3(PKT3_WRITE_DATA, 3, 0)); + radeon_emit(cs, S_370_DST_SEL(V_370_MEMORY_SYNC) | + S_370_WR_CONFIRM(1) | + S_370_ENGINE_SEL(V_370_ME)); + radeon_emit(cs, avail_va); + radeon_emit(cs, avail_va >> 32); + radeon_emit(cs, 1); +} + +void radv_CmdWriteTimestamp( + VkCommandBuffer commandBuffer, + VkPipelineStageFlagBits pipelineStage, + VkQueryPool queryPool, + uint32_t query) +{ + RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + RADV_FROM_HANDLE(radv_query_pool, pool, queryPool); + bool mec = radv_cmd_buffer_uses_mec(cmd_buffer); + struct radeon_winsys_cs *cs = cmd_buffer->cs; + uint64_t va = cmd_buffer->device->ws->buffer_get_va(pool->bo); + uint64_t avail_va = va + pool->availability_offset + 4 * query; + uint64_t query_va = va + pool->stride * query; + + cmd_buffer->device->ws->cs_add_buffer(cs, pool->bo, 5); + + MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, cs, 12); + + if (mec) { + radeon_emit(cs, PKT3(PKT3_RELEASE_MEM, 5, 0)); + radeon_emit(cs, EVENT_TYPE(V_028A90_BOTTOM_OF_PIPE_TS) | EVENT_INDEX(5)); + radeon_emit(cs, 3 << 29); + radeon_emit(cs, query_va); + radeon_emit(cs, query_va >> 32); + radeon_emit(cs, 0); + radeon_emit(cs, 0); + } else { + radeon_emit(cs, PKT3(PKT3_EVENT_WRITE_EOP, 4, 0)); + radeon_emit(cs, EVENT_TYPE(V_028A90_BOTTOM_OF_PIPE_TS) | EVENT_INDEX(5)); + radeon_emit(cs, query_va); + radeon_emit(cs, (3 << 29) | ((query_va >> 32) & 0xFFFF)); + radeon_emit(cs, 0); + radeon_emit(cs, 0); + } + + radeon_emit(cs, PKT3(PKT3_WRITE_DATA, 3, 0)); + radeon_emit(cs, S_370_DST_SEL(mec ? V_370_MEM_ASYNC : V_370_MEMORY_SYNC) | + S_370_WR_CONFIRM(1) | + S_370_ENGINE_SEL(V_370_ME)); + radeon_emit(cs, avail_va); + radeon_emit(cs, avail_va >> 32); + radeon_emit(cs, 1); + + assert(cmd_buffer->cs->cdw <= cdw_max); +} diff -Nru mesa-12.0.6/src/amd/vulkan/radv_radeon_winsys.h mesa-17.0.7/src/amd/vulkan/radv_radeon_winsys.h --- mesa-12.0.6/src/amd/vulkan/radv_radeon_winsys.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_radeon_winsys.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,354 @@ +/* + * Copyright © 2016 Red Hat. + * Copyright © 2016 Bas Nieuwenhuizen + * + * Based on radeon_winsys.h which is: + * Copyright 2008 Corbin Simpson + * Copyright 2010 Marek Olšák + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef RADV_RADEON_WINSYS_H +#define RADV_RADEON_WINSYS_H + +#include +#include +#include +#include "main/macros.h" +#include "amd_family.h" + +#define FREE(x) free(x) + +enum radeon_bo_domain { /* bitfield */ + RADEON_DOMAIN_GTT = 2, + RADEON_DOMAIN_VRAM = 4, + RADEON_DOMAIN_VRAM_GTT = RADEON_DOMAIN_VRAM | RADEON_DOMAIN_GTT +}; + +enum radeon_bo_flag { /* bitfield */ + RADEON_FLAG_GTT_WC = (1 << 0), + RADEON_FLAG_CPU_ACCESS = (1 << 1), + RADEON_FLAG_NO_CPU_ACCESS = (1 << 2), +}; + +enum radeon_bo_usage { /* bitfield */ + RADEON_USAGE_READ = 2, + RADEON_USAGE_WRITE = 4, + RADEON_USAGE_READWRITE = RADEON_USAGE_READ | RADEON_USAGE_WRITE +}; + +enum ring_type { + RING_GFX = 0, + RING_COMPUTE, + RING_DMA, + RING_UVD, + RING_VCE, + RING_LAST, +}; + +struct radeon_winsys_cs { + unsigned cdw; /* Number of used dwords. */ + unsigned max_dw; /* Maximum number of dwords. */ + uint32_t *buf; /* The base pointer of the chunk. */ +}; + +struct radeon_info { + /* PCI info: domain:bus:dev:func */ + uint32_t pci_domain; + uint32_t pci_bus; + uint32_t pci_dev; + uint32_t pci_func; + + /* Device info. */ + uint32_t pci_id; + enum radeon_family family; + const char *name; + enum chip_class chip_class; + uint32_t gart_page_size; + uint64_t gart_size; + uint64_t vram_size; + uint64_t visible_vram_size; + bool has_dedicated_vram; + bool has_virtual_memory; + bool gfx_ib_pad_with_type2; + bool has_uvd; + uint32_t sdma_rings; + uint32_t compute_rings; + uint32_t vce_fw_version; + uint32_t vce_harvest_config; + uint32_t clock_crystal_freq; /* in kHz */ + + /* Kernel info. */ + uint32_t drm_major; /* version */ + uint32_t drm_minor; + uint32_t drm_patchlevel; + bool has_userptr; + + /* Shader cores. */ + uint32_t r600_max_quad_pipes; /* wave size / 16 */ + uint32_t max_shader_clock; + uint32_t num_good_compute_units; + uint32_t max_se; /* shader engines */ + uint32_t max_sh_per_se; /* shader arrays per shader engine */ + + /* Render backends (color + depth blocks). */ + uint32_t r300_num_gb_pipes; + uint32_t r300_num_z_pipes; + uint32_t r600_gb_backend_map; /* R600 harvest config */ + bool r600_gb_backend_map_valid; + uint32_t r600_num_banks; + uint32_t num_render_backends; + uint32_t num_tile_pipes; /* pipe count from PIPE_CONFIG */ + uint32_t pipe_interleave_bytes; + uint32_t enabled_rb_mask; /* GCN harvest config */ + + /* Tile modes. */ + uint32_t si_tile_mode_array[32]; + uint32_t cik_macrotile_mode_array[16]; +}; + +#define RADEON_SURF_MAX_LEVEL 32 + +#define RADEON_SURF_TYPE_MASK 0xFF +#define RADEON_SURF_TYPE_SHIFT 0 +#define RADEON_SURF_TYPE_1D 0 +#define RADEON_SURF_TYPE_2D 1 +#define RADEON_SURF_TYPE_3D 2 +#define RADEON_SURF_TYPE_CUBEMAP 3 +#define RADEON_SURF_TYPE_1D_ARRAY 4 +#define RADEON_SURF_TYPE_2D_ARRAY 5 +#define RADEON_SURF_MODE_MASK 0xFF +#define RADEON_SURF_MODE_SHIFT 8 +#define RADEON_SURF_MODE_LINEAR_ALIGNED 1 +#define RADEON_SURF_MODE_1D 2 +#define RADEON_SURF_MODE_2D 3 +#define RADEON_SURF_SCANOUT (1 << 16) +#define RADEON_SURF_ZBUFFER (1 << 17) +#define RADEON_SURF_SBUFFER (1 << 18) +#define RADEON_SURF_Z_OR_SBUFFER (RADEON_SURF_ZBUFFER | RADEON_SURF_SBUFFER) +#define RADEON_SURF_HAS_SBUFFER_MIPTREE (1 << 19) +#define RADEON_SURF_HAS_TILE_MODE_INDEX (1 << 20) +#define RADEON_SURF_FMASK (1 << 21) +#define RADEON_SURF_DISABLE_DCC (1 << 22) + +#define RADEON_SURF_GET(v, field) (((v) >> RADEON_SURF_ ## field ## _SHIFT) & RADEON_SURF_ ## field ## _MASK) +#define RADEON_SURF_SET(v, field) (((v) & RADEON_SURF_ ## field ## _MASK) << RADEON_SURF_ ## field ## _SHIFT) +#define RADEON_SURF_CLR(v, field) ((v) & ~(RADEON_SURF_ ## field ## _MASK << RADEON_SURF_ ## field ## _SHIFT)) + +struct radeon_surf_level { + uint64_t offset; + uint64_t slice_size; + uint32_t npix_x; + uint32_t npix_y; + uint32_t npix_z; + uint32_t nblk_x; + uint32_t nblk_y; + uint32_t nblk_z; + uint32_t pitch_bytes; + uint32_t mode; + uint64_t dcc_offset; + uint64_t dcc_fast_clear_size; + bool dcc_enabled; +}; + + +/* surface defintions from the winsys */ +struct radeon_surf { + /* These are inputs to the calculator. */ + uint32_t npix_x; + uint32_t npix_y; + uint32_t npix_z; + uint32_t blk_w; + uint32_t blk_h; + uint32_t blk_d; + uint32_t array_size; + uint32_t last_level; + uint32_t bpe; + uint32_t nsamples; + uint32_t flags; + + /* These are return values. Some of them can be set by the caller, but + * they will be treated as hints (e.g. bankw, bankh) and might be + * changed by the calculator. + */ + uint64_t bo_size; + uint64_t bo_alignment; + /* This applies to EG and later. */ + uint32_t bankw; + uint32_t bankh; + uint32_t mtilea; + uint32_t tile_split; + uint32_t stencil_tile_split; + uint64_t stencil_offset; + struct radeon_surf_level level[RADEON_SURF_MAX_LEVEL]; + struct radeon_surf_level stencil_level[RADEON_SURF_MAX_LEVEL]; + uint32_t tiling_index[RADEON_SURF_MAX_LEVEL]; + uint32_t stencil_tiling_index[RADEON_SURF_MAX_LEVEL]; + uint32_t pipe_config; + uint32_t num_banks; + uint32_t macro_tile_index; + uint32_t micro_tile_mode; /* displayable, thin, depth, rotated */ + + /* Whether the depth miptree or stencil miptree as used by the DB are + * adjusted from their TC compatible form to ensure depth/stencil + * compatibility. If either is true, the corresponding plane cannot be + * sampled from. + */ + bool depth_adjusted; + bool stencil_adjusted; + + uint64_t dcc_size; + uint64_t dcc_alignment; +}; + +enum radeon_bo_layout { + RADEON_LAYOUT_LINEAR = 0, + RADEON_LAYOUT_TILED, + RADEON_LAYOUT_SQUARETILED, + + RADEON_LAYOUT_UNKNOWN +}; + +/* Tiling info for display code, DRI sharing, and other data. */ +struct radeon_bo_metadata { + /* Tiling flags describing the texture layout for display code + * and DRI sharing. + */ + enum radeon_bo_layout microtile; + enum radeon_bo_layout macrotile; + unsigned pipe_config; + unsigned bankw; + unsigned bankh; + unsigned tile_split; + unsigned mtilea; + unsigned num_banks; + unsigned stride; + bool scanout; + + /* Additional metadata associated with the buffer, in bytes. + * The maximum size is 64 * 4. This is opaque for the winsys & kernel. + * Supported by amdgpu only. + */ + uint32_t size_metadata; + uint32_t metadata[64]; +}; + +struct radeon_winsys_bo; +struct radeon_winsys_fence; +struct radeon_winsys_sem; + +struct radeon_winsys { + void (*destroy)(struct radeon_winsys *ws); + + void (*query_info)(struct radeon_winsys *ws, + struct radeon_info *info); + + struct radeon_winsys_bo *(*buffer_create)(struct radeon_winsys *ws, + uint64_t size, + unsigned alignment, + enum radeon_bo_domain domain, + enum radeon_bo_flag flags); + + void (*buffer_destroy)(struct radeon_winsys_bo *bo); + void *(*buffer_map)(struct radeon_winsys_bo *bo); + + struct radeon_winsys_bo *(*buffer_from_fd)(struct radeon_winsys *ws, + int fd, + unsigned *stride, unsigned *offset); + + bool (*buffer_get_fd)(struct radeon_winsys *ws, + struct radeon_winsys_bo *bo, + int *fd); + + void (*buffer_unmap)(struct radeon_winsys_bo *bo); + + uint64_t (*buffer_get_va)(struct radeon_winsys_bo *bo); + + void (*buffer_set_metadata)(struct radeon_winsys_bo *bo, + struct radeon_bo_metadata *md); + struct radeon_winsys_ctx *(*ctx_create)(struct radeon_winsys *ws); + void (*ctx_destroy)(struct radeon_winsys_ctx *ctx); + + bool (*ctx_wait_idle)(struct radeon_winsys_ctx *ctx, + enum ring_type ring_type, int ring_index); + + struct radeon_winsys_cs *(*cs_create)(struct radeon_winsys *ws, + enum ring_type ring_type); + + void (*cs_destroy)(struct radeon_winsys_cs *cs); + + void (*cs_reset)(struct radeon_winsys_cs *cs); + + bool (*cs_finalize)(struct radeon_winsys_cs *cs); + + void (*cs_grow)(struct radeon_winsys_cs * cs, size_t min_size); + + int (*cs_submit)(struct radeon_winsys_ctx *ctx, + int queue_index, + struct radeon_winsys_cs **cs_array, + unsigned cs_count, + struct radeon_winsys_sem **wait_sem, + unsigned wait_sem_count, + struct radeon_winsys_sem **signal_sem, + unsigned signal_sem_count, + bool can_patch, + struct radeon_winsys_fence *fence); + + void (*cs_add_buffer)(struct radeon_winsys_cs *cs, + struct radeon_winsys_bo *bo, + uint8_t priority); + + void (*cs_execute_secondary)(struct radeon_winsys_cs *parent, + struct radeon_winsys_cs *child); + + void (*cs_dump)(struct radeon_winsys_cs *cs, FILE* file, uint32_t trace_id); + + int (*surface_init)(struct radeon_winsys *ws, + struct radeon_surf *surf); + + int (*surface_best)(struct radeon_winsys *ws, + struct radeon_surf *surf); + + struct radeon_winsys_fence *(*create_fence)(); + void (*destroy_fence)(struct radeon_winsys_fence *fence); + bool (*fence_wait)(struct radeon_winsys *ws, + struct radeon_winsys_fence *fence, + bool absolute, + uint64_t timeout); + + struct radeon_winsys_sem *(*create_sem)(struct radeon_winsys *ws); + void (*destroy_sem)(struct radeon_winsys_sem *sem); + +}; + +static inline void radeon_emit(struct radeon_winsys_cs *cs, uint32_t value) +{ + cs->buf[cs->cdw++] = value; +} + +static inline void radeon_emit_array(struct radeon_winsys_cs *cs, + const uint32_t *values, unsigned count) +{ + memcpy(cs->buf + cs->cdw, values, count * 4); + cs->cdw += count; +} + +#endif /* RADV_RADEON_WINSYS_H */ diff -Nru mesa-12.0.6/src/amd/vulkan/radv_util.c mesa-17.0.7/src/amd/vulkan/radv_util.c --- mesa-12.0.6/src/amd/vulkan/radv_util.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_util.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,111 @@ +/* + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include +#include +#include +#include +#include +#include + +#include "radv_private.h" + +#include "util/u_math.h" + +/** Log an error message. */ +void radv_printflike(1, 2) + radv_loge(const char *format, ...) +{ + va_list va; + + va_start(va, format); + radv_loge_v(format, va); + va_end(va); +} + +/** \see radv_loge() */ +void +radv_loge_v(const char *format, va_list va) +{ + fprintf(stderr, "vk: error: "); + vfprintf(stderr, format, va); + fprintf(stderr, "\n"); +} + +void radv_printflike(3, 4) + __radv_finishme(const char *file, int line, const char *format, ...) +{ + va_list ap; + char buffer[256]; + + va_start(ap, format); + vsnprintf(buffer, sizeof(buffer), format, ap); + va_end(ap); + + fprintf(stderr, "%s:%d: FINISHME: %s\n", file, line, buffer); +} + +VkResult +__vk_errorf(VkResult error, const char *file, int line, const char *format, ...) +{ + va_list ap; + char buffer[256]; + +#define ERROR_CASE(error) case error: error_str = #error; break; + + const char *error_str; + switch ((int32_t)error) { + + /* Core errors */ + ERROR_CASE(VK_ERROR_OUT_OF_HOST_MEMORY) + ERROR_CASE(VK_ERROR_OUT_OF_DEVICE_MEMORY) + ERROR_CASE(VK_ERROR_INITIALIZATION_FAILED) + ERROR_CASE(VK_ERROR_DEVICE_LOST) + ERROR_CASE(VK_ERROR_MEMORY_MAP_FAILED) + ERROR_CASE(VK_ERROR_LAYER_NOT_PRESENT) + ERROR_CASE(VK_ERROR_EXTENSION_NOT_PRESENT) + ERROR_CASE(VK_ERROR_INCOMPATIBLE_DRIVER) + + /* Extension errors */ + ERROR_CASE(VK_ERROR_OUT_OF_DATE_KHR) + + default: + assert(!"Unknown error"); + error_str = "unknown error"; + } + +#undef ERROR_CASE + + if (format) { + va_start(ap, format); + vsnprintf(buffer, sizeof(buffer), format, ap); + va_end(ap); + + fprintf(stderr, "%s:%d: %s (%s)\n", file, line, buffer, error_str); + } else { + fprintf(stderr, "%s:%d: %s\n", file, line, error_str); + } + + return error; +} + diff -Nru mesa-12.0.6/src/amd/vulkan/radv_util.h mesa-17.0.7/src/amd/vulkan/radv_util.h --- mesa-12.0.6/src/amd/vulkan/radv_util.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_util.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,11 @@ +#ifndef RADV_UTIL_H +#define RADV_UTIL_H + +#ifdef HAVE___BUILTIN_POPCOUNT +#define util_bitcount(i) __builtin_popcount(i) +#else +extern unsigned int +util_bitcount(unsigned int n); +#endif + +#endif /* RADV_UTIL_H */ diff -Nru mesa-12.0.6/src/amd/vulkan/radv_wsi.c mesa-17.0.7/src/amd/vulkan/radv_wsi.c --- mesa-12.0.6/src/amd/vulkan/radv_wsi.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_wsi.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,401 @@ +/* + * Copyright © 2016 Red Hat + * based on intel anv code: + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "radv_private.h" +#include "wsi_common.h" + +static const struct wsi_callbacks wsi_cbs = { + .get_phys_device_format_properties = radv_GetPhysicalDeviceFormatProperties, +}; + +VkResult +radv_init_wsi(struct radv_physical_device *physical_device) +{ + VkResult result; + + memset(physical_device->wsi_device.wsi, 0, sizeof(physical_device->wsi_device.wsi)); + +#ifdef VK_USE_PLATFORM_XCB_KHR + result = wsi_x11_init_wsi(&physical_device->wsi_device, &physical_device->instance->alloc); + if (result != VK_SUCCESS) + return result; +#endif + +#ifdef VK_USE_PLATFORM_WAYLAND_KHR + result = wsi_wl_init_wsi(&physical_device->wsi_device, &physical_device->instance->alloc, + radv_physical_device_to_handle(physical_device), + &wsi_cbs); + if (result != VK_SUCCESS) { +#ifdef VK_USE_PLATFORM_XCB_KHR + wsi_x11_finish_wsi(&physical_device->wsi_device, &physical_device->instance->alloc); +#endif + return result; + } +#endif + + return VK_SUCCESS; +} + +void +radv_finish_wsi(struct radv_physical_device *physical_device) +{ +#ifdef VK_USE_PLATFORM_WAYLAND_KHR + wsi_wl_finish_wsi(&physical_device->wsi_device, &physical_device->instance->alloc); +#endif +#ifdef VK_USE_PLATFORM_XCB_KHR + wsi_x11_finish_wsi(&physical_device->wsi_device, &physical_device->instance->alloc); +#endif +} + +void radv_DestroySurfaceKHR( + VkInstance _instance, + VkSurfaceKHR _surface, + const VkAllocationCallbacks* pAllocator) +{ + RADV_FROM_HANDLE(radv_instance, instance, _instance); + ICD_FROM_HANDLE(VkIcdSurfaceBase, surface, _surface); + + vk_free2(&instance->alloc, pAllocator, surface); +} + +VkResult radv_GetPhysicalDeviceSurfaceSupportKHR( + VkPhysicalDevice physicalDevice, + uint32_t queueFamilyIndex, + VkSurfaceKHR _surface, + VkBool32* pSupported) +{ + RADV_FROM_HANDLE(radv_physical_device, device, physicalDevice); + ICD_FROM_HANDLE(VkIcdSurfaceBase, surface, _surface); + struct wsi_interface *iface = device->wsi_device.wsi[surface->platform]; + + return iface->get_support(surface, &device->wsi_device, + &device->instance->alloc, + queueFamilyIndex, pSupported); +} + +VkResult radv_GetPhysicalDeviceSurfaceCapabilitiesKHR( + VkPhysicalDevice physicalDevice, + VkSurfaceKHR _surface, + VkSurfaceCapabilitiesKHR* pSurfaceCapabilities) +{ + RADV_FROM_HANDLE(radv_physical_device, device, physicalDevice); + ICD_FROM_HANDLE(VkIcdSurfaceBase, surface, _surface); + struct wsi_interface *iface = device->wsi_device.wsi[surface->platform]; + + return iface->get_capabilities(surface, pSurfaceCapabilities); +} + +VkResult radv_GetPhysicalDeviceSurfaceFormatsKHR( + VkPhysicalDevice physicalDevice, + VkSurfaceKHR _surface, + uint32_t* pSurfaceFormatCount, + VkSurfaceFormatKHR* pSurfaceFormats) +{ + RADV_FROM_HANDLE(radv_physical_device, device, physicalDevice); + ICD_FROM_HANDLE(VkIcdSurfaceBase, surface, _surface); + struct wsi_interface *iface = device->wsi_device.wsi[surface->platform]; + + return iface->get_formats(surface, &device->wsi_device, pSurfaceFormatCount, + pSurfaceFormats); +} + +VkResult radv_GetPhysicalDeviceSurfacePresentModesKHR( + VkPhysicalDevice physicalDevice, + VkSurfaceKHR _surface, + uint32_t* pPresentModeCount, + VkPresentModeKHR* pPresentModes) +{ + RADV_FROM_HANDLE(radv_physical_device, device, physicalDevice); + ICD_FROM_HANDLE(VkIcdSurfaceBase, surface, _surface); + struct wsi_interface *iface = device->wsi_device.wsi[surface->platform]; + + return iface->get_present_modes(surface, pPresentModeCount, + pPresentModes); +} + +static VkResult +radv_wsi_image_create(VkDevice device_h, + const VkSwapchainCreateInfoKHR *pCreateInfo, + const VkAllocationCallbacks* pAllocator, + VkImage *image_p, + VkDeviceMemory *memory_p, + uint32_t *size, + uint32_t *offset, + uint32_t *row_pitch, int *fd_p) +{ + struct radv_device *device = radv_device_from_handle(device_h); + VkResult result = VK_SUCCESS; + struct radeon_surf *surface; + VkImage image_h; + struct radv_image *image; + bool bret; + int fd; + + result = radv_image_create(device_h, + &(struct radv_image_create_info) { + .vk_info = + &(VkImageCreateInfo) { + .sType = VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO, + .imageType = VK_IMAGE_TYPE_2D, + .format = pCreateInfo->imageFormat, + .extent = { + .width = pCreateInfo->imageExtent.width, + .height = pCreateInfo->imageExtent.height, + .depth = 1 + }, + .mipLevels = 1, + .arrayLayers = 1, + .samples = 1, + /* FIXME: Need a way to use X tiling to allow scanout */ + .tiling = VK_IMAGE_TILING_OPTIMAL, + .usage = VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT, + .flags = 0, + }, + .scanout = true}, + NULL, + &image_h); + if (result != VK_SUCCESS) + return result; + + image = radv_image_from_handle(image_h); + + VkDeviceMemory memory_h; + struct radv_device_memory *memory; + result = radv_AllocateMemory(device_h, + &(VkMemoryAllocateInfo) { + .sType = VK_STRUCTURE_TYPE_MEMORY_ALLOCATE_INFO, + .allocationSize = image->size, + .memoryTypeIndex = 0, + }, + NULL /* XXX: pAllocator */, + &memory_h); + if (result != VK_SUCCESS) + goto fail_create_image; + + memory = radv_device_memory_from_handle(memory_h); + + radv_BindImageMemory(VK_NULL_HANDLE, image_h, memory_h, 0); + + bret = device->ws->buffer_get_fd(device->ws, + memory->bo, &fd); + if (bret == false) + goto fail_alloc_memory; + + { + struct radeon_bo_metadata metadata; + radv_init_metadata(device, image, &metadata); + device->ws->buffer_set_metadata(memory->bo, &metadata); + } + surface = &image->surface; + + *image_p = image_h; + *memory_p = memory_h; + *fd_p = fd; + *size = image->size; + *offset = image->offset; + *row_pitch = surface->level[0].pitch_bytes; + return VK_SUCCESS; + fail_alloc_memory: + radv_FreeMemory(device_h, memory_h, pAllocator); + +fail_create_image: + radv_DestroyImage(device_h, image_h, pAllocator); + + return result; +} + +static void +radv_wsi_image_free(VkDevice device, + const VkAllocationCallbacks* pAllocator, + VkImage image_h, + VkDeviceMemory memory_h) +{ + radv_DestroyImage(device, image_h, pAllocator); + + radv_FreeMemory(device, memory_h, pAllocator); +} + +static const struct wsi_image_fns radv_wsi_image_fns = { + .create_wsi_image = radv_wsi_image_create, + .free_wsi_image = radv_wsi_image_free, +}; + +VkResult radv_CreateSwapchainKHR( + VkDevice _device, + const VkSwapchainCreateInfoKHR* pCreateInfo, + const VkAllocationCallbacks* pAllocator, + VkSwapchainKHR* pSwapchain) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + ICD_FROM_HANDLE(VkIcdSurfaceBase, surface, pCreateInfo->surface); + struct wsi_interface *iface = + device->physical_device->wsi_device.wsi[surface->platform]; + struct wsi_swapchain *swapchain; + const VkAllocationCallbacks *alloc; + if (pAllocator) + alloc = pAllocator; + else + alloc = &device->alloc; + VkResult result = iface->create_swapchain(surface, _device, + &device->physical_device->wsi_device, + pCreateInfo, + alloc, &radv_wsi_image_fns, + &swapchain); + if (result != VK_SUCCESS) + return result; + + if (pAllocator) + swapchain->alloc = *pAllocator; + else + swapchain->alloc = device->alloc; + + for (unsigned i = 0; i < ARRAY_SIZE(swapchain->fences); i++) + swapchain->fences[i] = VK_NULL_HANDLE; + + *pSwapchain = wsi_swapchain_to_handle(swapchain); + + return VK_SUCCESS; +} + +void radv_DestroySwapchainKHR( + VkDevice _device, + VkSwapchainKHR _swapchain, + const VkAllocationCallbacks* pAllocator) +{ + RADV_FROM_HANDLE(radv_device, device, _device); + RADV_FROM_HANDLE(wsi_swapchain, swapchain, _swapchain); + const VkAllocationCallbacks *alloc; + + if (!_swapchain) + return; + + if (pAllocator) + alloc = pAllocator; + else + alloc = &device->alloc; + + for (unsigned i = 0; i < ARRAY_SIZE(swapchain->fences); i++) { + if (swapchain->fences[i] != VK_NULL_HANDLE) + radv_DestroyFence(_device, swapchain->fences[i], pAllocator); + } + + swapchain->destroy(swapchain, alloc); +} + +VkResult radv_GetSwapchainImagesKHR( + VkDevice device, + VkSwapchainKHR _swapchain, + uint32_t* pSwapchainImageCount, + VkImage* pSwapchainImages) +{ + RADV_FROM_HANDLE(wsi_swapchain, swapchain, _swapchain); + + return swapchain->get_images(swapchain, pSwapchainImageCount, + pSwapchainImages); +} + +VkResult radv_AcquireNextImageKHR( + VkDevice device, + VkSwapchainKHR _swapchain, + uint64_t timeout, + VkSemaphore semaphore, + VkFence _fence, + uint32_t* pImageIndex) +{ + RADV_FROM_HANDLE(wsi_swapchain, swapchain, _swapchain); + RADV_FROM_HANDLE(radv_fence, fence, _fence); + + VkResult result = swapchain->acquire_next_image(swapchain, timeout, semaphore, + pImageIndex); + + if (fence && result == VK_SUCCESS) { + fence->submitted = true; + fence->signalled = true; + } + + return result; +} + +VkResult radv_QueuePresentKHR( + VkQueue _queue, + const VkPresentInfoKHR* pPresentInfo) +{ + RADV_FROM_HANDLE(radv_queue, queue, _queue); + VkResult result = VK_SUCCESS; + + for (uint32_t i = 0; i < pPresentInfo->swapchainCount; i++) { + RADV_FROM_HANDLE(wsi_swapchain, swapchain, pPresentInfo->pSwapchains[i]); + VkResult item_result; + + assert(radv_device_from_handle(swapchain->device) == queue->device); + if (swapchain->fences[0] == VK_NULL_HANDLE) { + item_result = radv_CreateFence(radv_device_to_handle(queue->device), + &(VkFenceCreateInfo) { + .sType = VK_STRUCTURE_TYPE_FENCE_CREATE_INFO, + .flags = 0, + }, &swapchain->alloc, &swapchain->fences[0]); + if (pPresentInfo->pResults != NULL) + pPresentInfo->pResults[i] = item_result; + result = result == VK_SUCCESS ? item_result : result; + if (item_result != VK_SUCCESS) + continue; + } else { + radv_ResetFences(radv_device_to_handle(queue->device), + 1, &swapchain->fences[0]); + } + + RADV_FROM_HANDLE(radv_fence, fence, swapchain->fences[0]); + struct radeon_winsys_fence *base_fence = fence->fence; + struct radeon_winsys_ctx *ctx = queue->hw_ctx; + queue->device->ws->cs_submit(ctx, queue->queue_idx, + &queue->device->empty_cs[queue->queue_family_index], + 1, + (struct radeon_winsys_sem **)pPresentInfo->pWaitSemaphores, + pPresentInfo->waitSemaphoreCount, NULL, 0, false, base_fence); + fence->submitted = true; + + item_result = swapchain->queue_present(swapchain, + pPresentInfo->pImageIndices[i]); + /* TODO: What if one of them returns OUT_OF_DATE? */ + if (pPresentInfo->pResults != NULL) + pPresentInfo->pResults[i] = item_result; + result = result == VK_SUCCESS ? item_result : result; + if (item_result != VK_SUCCESS) + continue; + + VkFence last = swapchain->fences[2]; + swapchain->fences[2] = swapchain->fences[1]; + swapchain->fences[1] = swapchain->fences[0]; + swapchain->fences[0] = last; + + if (last != VK_NULL_HANDLE) { + radv_WaitForFences(radv_device_to_handle(queue->device), + 1, &last, true, 1); + } + + } + + return VK_SUCCESS; +} diff -Nru mesa-12.0.6/src/amd/vulkan/radv_wsi_wayland.c mesa-17.0.7/src/amd/vulkan/radv_wsi_wayland.c --- mesa-12.0.6/src/amd/vulkan/radv_wsi_wayland.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_wsi_wayland.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,58 @@ +/* + * Copyright © 2016 Red Hat + * based on intel anv code: + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include +#include + +#include "wsi_common_wayland.h" +#include "radv_private.h" + +VkBool32 radv_GetPhysicalDeviceWaylandPresentationSupportKHR( + VkPhysicalDevice physicalDevice, + uint32_t queueFamilyIndex, + struct wl_display* display) +{ + RADV_FROM_HANDLE(radv_physical_device, physical_device, physicalDevice); + + return wsi_wl_get_presentation_support(&physical_device->wsi_device, display); +} + +VkResult radv_CreateWaylandSurfaceKHR( + VkInstance _instance, + const VkWaylandSurfaceCreateInfoKHR* pCreateInfo, + const VkAllocationCallbacks* pAllocator, + VkSurfaceKHR* pSurface) +{ + RADV_FROM_HANDLE(radv_instance, instance, _instance); + const VkAllocationCallbacks *alloc; + assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_WAYLAND_SURFACE_CREATE_INFO_KHR); + + if (pAllocator) + alloc = pAllocator; + else + alloc = &instance->alloc; + + return wsi_create_wl_surface(alloc, pCreateInfo, pSurface); +} diff -Nru mesa-12.0.6/src/amd/vulkan/radv_wsi_x11.c mesa-17.0.7/src/amd/vulkan/radv_wsi_x11.c --- mesa-12.0.6/src/amd/vulkan/radv_wsi_x11.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/radv_wsi_x11.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,100 @@ +/* + * Copyright © 2016 Red Hat. + * Copyright © 2016 Bas Nieuwenhuizen + * + * based mostly on anv driver which is: + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include +#include +#include +#include +#include + +#include "wsi_common_x11.h" +#include "radv_private.h" + +VkBool32 radv_GetPhysicalDeviceXcbPresentationSupportKHR( + VkPhysicalDevice physicalDevice, + uint32_t queueFamilyIndex, + xcb_connection_t* connection, + xcb_visualid_t visual_id) +{ + RADV_FROM_HANDLE(radv_physical_device, device, physicalDevice); + + return wsi_get_physical_device_xcb_presentation_support( + &device->wsi_device, + &device->instance->alloc, + queueFamilyIndex, connection, visual_id); +} + +VkBool32 radv_GetPhysicalDeviceXlibPresentationSupportKHR( + VkPhysicalDevice physicalDevice, + uint32_t queueFamilyIndex, + Display* dpy, + VisualID visualID) +{ + RADV_FROM_HANDLE(radv_physical_device, device, physicalDevice); + + return wsi_get_physical_device_xcb_presentation_support( + &device->wsi_device, + &device->instance->alloc, + queueFamilyIndex, XGetXCBConnection(dpy), visualID); +} + +VkResult radv_CreateXcbSurfaceKHR( + VkInstance _instance, + const VkXcbSurfaceCreateInfoKHR* pCreateInfo, + const VkAllocationCallbacks* pAllocator, + VkSurfaceKHR* pSurface) +{ + RADV_FROM_HANDLE(radv_instance, instance, _instance); + const VkAllocationCallbacks *alloc; + assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_XCB_SURFACE_CREATE_INFO_KHR); + + if (pAllocator) + alloc = pAllocator; + else + alloc = &instance->alloc; + + return wsi_create_xcb_surface(alloc, pCreateInfo, pSurface); +} + +VkResult radv_CreateXlibSurfaceKHR( + VkInstance _instance, + const VkXlibSurfaceCreateInfoKHR* pCreateInfo, + const VkAllocationCallbacks* pAllocator, + VkSurfaceKHR* pSurface) +{ + RADV_FROM_HANDLE(radv_instance, instance, _instance); + const VkAllocationCallbacks *alloc; + + assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_XLIB_SURFACE_CREATE_INFO_KHR); + + if (pAllocator) + alloc = pAllocator; + else + alloc = &instance->alloc; + + return wsi_create_xlib_surface(alloc, pCreateInfo, pSurface); +} diff -Nru mesa-12.0.6/src/amd/vulkan/si_cmd_buffer.c mesa-17.0.7/src/amd/vulkan/si_cmd_buffer.c --- mesa-12.0.6/src/amd/vulkan/si_cmd_buffer.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/si_cmd_buffer.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,1155 @@ +/* + * Copyright © 2016 Red Hat. + * Copyright © 2016 Bas Nieuwenhuizen + * + * based on si_state.c + * Copyright © 2015 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +/* command buffer handling for SI */ + +#include "radv_private.h" +#include "radv_cs.h" +#include "sid.h" +#include "radv_util.h" +#include "main/macros.h" + +#define SI_GS_PER_ES 128 + +static void +si_write_harvested_raster_configs(struct radv_physical_device *physical_device, + struct radeon_winsys_cs *cs, + unsigned raster_config, + unsigned raster_config_1) +{ + unsigned sh_per_se = MAX2(physical_device->rad_info.max_sh_per_se, 1); + unsigned num_se = MAX2(physical_device->rad_info.max_se, 1); + unsigned rb_mask = physical_device->rad_info.enabled_rb_mask; + unsigned num_rb = MIN2(physical_device->rad_info.num_render_backends, 16); + unsigned rb_per_pkr = MIN2(num_rb / num_se / sh_per_se, 2); + unsigned rb_per_se = num_rb / num_se; + unsigned se_mask[4]; + unsigned se; + + se_mask[0] = ((1 << rb_per_se) - 1) & rb_mask; + se_mask[1] = (se_mask[0] << rb_per_se) & rb_mask; + se_mask[2] = (se_mask[1] << rb_per_se) & rb_mask; + se_mask[3] = (se_mask[2] << rb_per_se) & rb_mask; + + assert(num_se == 1 || num_se == 2 || num_se == 4); + assert(sh_per_se == 1 || sh_per_se == 2); + assert(rb_per_pkr == 1 || rb_per_pkr == 2); + + /* XXX: I can't figure out what the *_XSEL and *_YSEL + * fields are for, so I'm leaving them as their default + * values. */ + + if ((num_se > 2) && ((!se_mask[0] && !se_mask[1]) || + (!se_mask[2] && !se_mask[3]))) { + raster_config_1 &= C_028354_SE_PAIR_MAP; + + if (!se_mask[0] && !se_mask[1]) { + raster_config_1 |= + S_028354_SE_PAIR_MAP(V_028354_RASTER_CONFIG_SE_PAIR_MAP_3); + } else { + raster_config_1 |= + S_028354_SE_PAIR_MAP(V_028354_RASTER_CONFIG_SE_PAIR_MAP_0); + } + } + + for (se = 0; se < num_se; se++) { + unsigned raster_config_se = raster_config; + unsigned pkr0_mask = ((1 << rb_per_pkr) - 1) << (se * rb_per_se); + unsigned pkr1_mask = pkr0_mask << rb_per_pkr; + int idx = (se / 2) * 2; + + if ((num_se > 1) && (!se_mask[idx] || !se_mask[idx + 1])) { + raster_config_se &= C_028350_SE_MAP; + + if (!se_mask[idx]) { + raster_config_se |= + S_028350_SE_MAP(V_028350_RASTER_CONFIG_SE_MAP_3); + } else { + raster_config_se |= + S_028350_SE_MAP(V_028350_RASTER_CONFIG_SE_MAP_0); + } + } + + pkr0_mask &= rb_mask; + pkr1_mask &= rb_mask; + if (rb_per_se > 2 && (!pkr0_mask || !pkr1_mask)) { + raster_config_se &= C_028350_PKR_MAP; + + if (!pkr0_mask) { + raster_config_se |= + S_028350_PKR_MAP(V_028350_RASTER_CONFIG_PKR_MAP_3); + } else { + raster_config_se |= + S_028350_PKR_MAP(V_028350_RASTER_CONFIG_PKR_MAP_0); + } + } + + if (rb_per_se >= 2) { + unsigned rb0_mask = 1 << (se * rb_per_se); + unsigned rb1_mask = rb0_mask << 1; + + rb0_mask &= rb_mask; + rb1_mask &= rb_mask; + if (!rb0_mask || !rb1_mask) { + raster_config_se &= C_028350_RB_MAP_PKR0; + + if (!rb0_mask) { + raster_config_se |= + S_028350_RB_MAP_PKR0(V_028350_RASTER_CONFIG_RB_MAP_3); + } else { + raster_config_se |= + S_028350_RB_MAP_PKR0(V_028350_RASTER_CONFIG_RB_MAP_0); + } + } + + if (rb_per_se > 2) { + rb0_mask = 1 << (se * rb_per_se + rb_per_pkr); + rb1_mask = rb0_mask << 1; + rb0_mask &= rb_mask; + rb1_mask &= rb_mask; + if (!rb0_mask || !rb1_mask) { + raster_config_se &= C_028350_RB_MAP_PKR1; + + if (!rb0_mask) { + raster_config_se |= + S_028350_RB_MAP_PKR1(V_028350_RASTER_CONFIG_RB_MAP_3); + } else { + raster_config_se |= + S_028350_RB_MAP_PKR1(V_028350_RASTER_CONFIG_RB_MAP_0); + } + } + } + } + + /* GRBM_GFX_INDEX has a different offset on SI and CI+ */ + if (physical_device->rad_info.chip_class < CIK) + radeon_set_config_reg(cs, GRBM_GFX_INDEX, + SE_INDEX(se) | SH_BROADCAST_WRITES | + INSTANCE_BROADCAST_WRITES); + else + radeon_set_uconfig_reg(cs, R_030800_GRBM_GFX_INDEX, + S_030800_SE_INDEX(se) | S_030800_SH_BROADCAST_WRITES(1) | + S_030800_INSTANCE_BROADCAST_WRITES(1)); + radeon_set_context_reg(cs, R_028350_PA_SC_RASTER_CONFIG, raster_config_se); + if (physical_device->rad_info.chip_class >= CIK) + radeon_set_context_reg(cs, R_028354_PA_SC_RASTER_CONFIG_1, raster_config_1); + } + + /* GRBM_GFX_INDEX has a different offset on SI and CI+ */ + if (physical_device->rad_info.chip_class < CIK) + radeon_set_config_reg(cs, GRBM_GFX_INDEX, + SE_BROADCAST_WRITES | SH_BROADCAST_WRITES | + INSTANCE_BROADCAST_WRITES); + else + radeon_set_uconfig_reg(cs, R_030800_GRBM_GFX_INDEX, + S_030800_SE_BROADCAST_WRITES(1) | S_030800_SH_BROADCAST_WRITES(1) | + S_030800_INSTANCE_BROADCAST_WRITES(1)); +} + +void +si_init_compute(struct radv_physical_device *physical_device, + struct radv_cmd_buffer *cmd_buffer) +{ + struct radeon_winsys_cs *cs = cmd_buffer->cs; + radeon_set_sh_reg_seq(cs, R_00B810_COMPUTE_START_X, 3); + radeon_emit(cs, 0); + radeon_emit(cs, 0); + radeon_emit(cs, 0); + + radeon_set_sh_reg_seq(cs, R_00B854_COMPUTE_RESOURCE_LIMITS, 3); + radeon_emit(cs, 0); + /* R_00B858_COMPUTE_STATIC_THREAD_MGMT_SE0 / SE1 */ + radeon_emit(cs, S_00B858_SH0_CU_EN(0xffff) | S_00B858_SH1_CU_EN(0xffff)); + radeon_emit(cs, S_00B85C_SH0_CU_EN(0xffff) | S_00B85C_SH1_CU_EN(0xffff)); + + if (physical_device->rad_info.chip_class >= CIK) { + /* Also set R_00B858_COMPUTE_STATIC_THREAD_MGMT_SE2 / SE3 */ + radeon_set_sh_reg_seq(cs, + R_00B864_COMPUTE_STATIC_THREAD_MGMT_SE2, 2); + radeon_emit(cs, S_00B864_SH0_CU_EN(0xffff) | + S_00B864_SH1_CU_EN(0xffff)); + radeon_emit(cs, S_00B868_SH0_CU_EN(0xffff) | + S_00B868_SH1_CU_EN(0xffff)); + } + + /* This register has been moved to R_00CD20_COMPUTE_MAX_WAVE_ID + * and is now per pipe, so it should be handled in the + * kernel if we want to use something other than the default value, + * which is now 0x22f. + */ + if (physical_device->rad_info.chip_class <= SI) { + /* XXX: This should be: + * (number of compute units) * 4 * (waves per simd) - 1 */ + + radeon_set_sh_reg(cs, R_00B82C_COMPUTE_MAX_WAVE_ID, + 0x190 /* Default value */); + } +} + + +void si_init_config(struct radv_physical_device *physical_device, + struct radv_cmd_buffer *cmd_buffer) +{ + unsigned num_rb = MIN2(physical_device->rad_info.num_render_backends, 16); + unsigned rb_mask = physical_device->rad_info.enabled_rb_mask; + unsigned raster_config, raster_config_1; + int i; + struct radeon_winsys_cs *cs = cmd_buffer->cs; + radeon_emit(cs, PKT3(PKT3_CONTEXT_CONTROL, 1, 0)); + radeon_emit(cs, CONTEXT_CONTROL_LOAD_ENABLE(1)); + radeon_emit(cs, CONTEXT_CONTROL_SHADOW_ENABLE(1)); + + radeon_set_context_reg(cs, R_028A18_VGT_HOS_MAX_TESS_LEVEL, fui(64)); + radeon_set_context_reg(cs, R_028A1C_VGT_HOS_MIN_TESS_LEVEL, fui(0)); + + /* FIXME calculate these values somehow ??? */ + radeon_set_context_reg(cs, R_028A54_VGT_GS_PER_ES, SI_GS_PER_ES); + radeon_set_context_reg(cs, R_028A58_VGT_ES_PER_GS, 0x40); + radeon_set_context_reg(cs, R_028A5C_VGT_GS_PER_VS, 0x2); + + radeon_set_context_reg(cs, R_028A8C_VGT_PRIMITIVEID_RESET, 0x0); + radeon_set_context_reg(cs, R_028B28_VGT_STRMOUT_DRAW_OPAQUE_OFFSET, 0); + + radeon_set_context_reg(cs, R_028B98_VGT_STRMOUT_BUFFER_CONFIG, 0x0); + radeon_set_context_reg(cs, R_028AB8_VGT_VTX_CNT_EN, 0x0); + if (physical_device->rad_info.chip_class < CIK) + radeon_set_config_reg(cs, R_008A14_PA_CL_ENHANCE, S_008A14_NUM_CLIP_SEQ(3) | + S_008A14_CLIP_VTX_REORDER_ENA(1)); + + radeon_set_context_reg(cs, R_028BD4_PA_SC_CENTROID_PRIORITY_0, 0x76543210); + radeon_set_context_reg(cs, R_028BD8_PA_SC_CENTROID_PRIORITY_1, 0xfedcba98); + + radeon_set_context_reg(cs, R_02882C_PA_SU_PRIM_FILTER_CNTL, 0); + + for (i = 0; i < 16; i++) { + radeon_set_context_reg(cs, R_0282D0_PA_SC_VPORT_ZMIN_0 + i*8, 0); + radeon_set_context_reg(cs, R_0282D4_PA_SC_VPORT_ZMAX_0 + i*8, fui(1.0)); + } + + switch (physical_device->rad_info.family) { + case CHIP_TAHITI: + case CHIP_PITCAIRN: + raster_config = 0x2a00126a; + raster_config_1 = 0x00000000; + break; + case CHIP_VERDE: + raster_config = 0x0000124a; + raster_config_1 = 0x00000000; + break; + case CHIP_OLAND: + raster_config = 0x00000082; + raster_config_1 = 0x00000000; + break; + case CHIP_HAINAN: + raster_config = 0x00000000; + raster_config_1 = 0x00000000; + break; + case CHIP_BONAIRE: + raster_config = 0x16000012; + raster_config_1 = 0x00000000; + break; + case CHIP_HAWAII: + raster_config = 0x3a00161a; + raster_config_1 = 0x0000002e; + break; + case CHIP_FIJI: + if (physical_device->rad_info.cik_macrotile_mode_array[0] == 0x000000e8) { + /* old kernels with old tiling config */ + raster_config = 0x16000012; + raster_config_1 = 0x0000002a; + } else { + raster_config = 0x3a00161a; + raster_config_1 = 0x0000002e; + } + break; + case CHIP_POLARIS10: + raster_config = 0x16000012; + raster_config_1 = 0x0000002a; + break; + case CHIP_POLARIS11: + case CHIP_POLARIS12: + raster_config = 0x16000012; + raster_config_1 = 0x00000000; + break; + case CHIP_TONGA: + raster_config = 0x16000012; + raster_config_1 = 0x0000002a; + break; + case CHIP_ICELAND: + if (num_rb == 1) + raster_config = 0x00000000; + else + raster_config = 0x00000002; + raster_config_1 = 0x00000000; + break; + case CHIP_CARRIZO: + raster_config = 0x00000002; + raster_config_1 = 0x00000000; + break; + case CHIP_KAVERI: + /* KV should be 0x00000002, but that causes problems with radeon */ + raster_config = 0x00000000; /* 0x00000002 */ + raster_config_1 = 0x00000000; + break; + case CHIP_KABINI: + case CHIP_MULLINS: + case CHIP_STONEY: + raster_config = 0x00000000; + raster_config_1 = 0x00000000; + break; + default: + fprintf(stderr, + "radeonsi: Unknown GPU, using 0 for raster_config\n"); + raster_config = 0x00000000; + raster_config_1 = 0x00000000; + break; + } + + /* Always use the default config when all backends are enabled + * (or when we failed to determine the enabled backends). + */ + if (!rb_mask || util_bitcount(rb_mask) >= num_rb) { + radeon_set_context_reg(cs, R_028350_PA_SC_RASTER_CONFIG, + raster_config); + if (physical_device->rad_info.chip_class >= CIK) + radeon_set_context_reg(cs, R_028354_PA_SC_RASTER_CONFIG_1, + raster_config_1); + } else { + si_write_harvested_raster_configs(physical_device, cs, raster_config, raster_config_1); + } + + radeon_set_context_reg(cs, R_028204_PA_SC_WINDOW_SCISSOR_TL, S_028204_WINDOW_OFFSET_DISABLE(1)); + radeon_set_context_reg(cs, R_028240_PA_SC_GENERIC_SCISSOR_TL, S_028240_WINDOW_OFFSET_DISABLE(1)); + radeon_set_context_reg(cs, R_028244_PA_SC_GENERIC_SCISSOR_BR, + S_028244_BR_X(16384) | S_028244_BR_Y(16384)); + radeon_set_context_reg(cs, R_028030_PA_SC_SCREEN_SCISSOR_TL, 0); + radeon_set_context_reg(cs, R_028034_PA_SC_SCREEN_SCISSOR_BR, + S_028034_BR_X(16384) | S_028034_BR_Y(16384)); + + radeon_set_context_reg(cs, R_02820C_PA_SC_CLIPRECT_RULE, 0xFFFF); + radeon_set_context_reg(cs, R_028230_PA_SC_EDGERULE, 0xAAAAAAAA); + /* PA_SU_HARDWARE_SCREEN_OFFSET must be 0 due to hw bug on SI */ + radeon_set_context_reg(cs, R_028234_PA_SU_HARDWARE_SCREEN_OFFSET, 0); + radeon_set_context_reg(cs, R_028820_PA_CL_NANINF_CNTL, 0); + + radeon_set_context_reg(cs, R_028BE8_PA_CL_GB_VERT_CLIP_ADJ, fui(1.0)); + radeon_set_context_reg(cs, R_028BEC_PA_CL_GB_VERT_DISC_ADJ, fui(1.0)); + radeon_set_context_reg(cs, R_028BF0_PA_CL_GB_HORZ_CLIP_ADJ, fui(1.0)); + radeon_set_context_reg(cs, R_028BF4_PA_CL_GB_HORZ_DISC_ADJ, fui(1.0)); + + radeon_set_context_reg(cs, R_028AC0_DB_SRESULTS_COMPARE_STATE0, 0x0); + radeon_set_context_reg(cs, R_028AC4_DB_SRESULTS_COMPARE_STATE1, 0x0); + radeon_set_context_reg(cs, R_028AC8_DB_PRELOAD_CONTROL, 0x0); + radeon_set_context_reg(cs, R_02800C_DB_RENDER_OVERRIDE, + S_02800C_FORCE_HIS_ENABLE0(V_02800C_FORCE_DISABLE) | + S_02800C_FORCE_HIS_ENABLE1(V_02800C_FORCE_DISABLE)); + + radeon_set_context_reg(cs, R_028400_VGT_MAX_VTX_INDX, ~0); + radeon_set_context_reg(cs, R_028404_VGT_MIN_VTX_INDX, 0); + radeon_set_context_reg(cs, R_028408_VGT_INDX_OFFSET, 0); + + if (physical_device->rad_info.chip_class >= CIK) { + /* If this is 0, Bonaire can hang even if GS isn't being used. + * Other chips are unaffected. These are suboptimal values, + * but we don't use on-chip GS. + */ + radeon_set_context_reg(cs, R_028A44_VGT_GS_ONCHIP_CNTL, + S_028A44_ES_VERTS_PER_SUBGRP(64) | + S_028A44_GS_PRIMS_PER_SUBGRP(4)); + + radeon_set_sh_reg(cs, R_00B51C_SPI_SHADER_PGM_RSRC3_LS, S_00B51C_CU_EN(0xffff)); + radeon_set_sh_reg(cs, R_00B41C_SPI_SHADER_PGM_RSRC3_HS, 0); + radeon_set_sh_reg(cs, R_00B31C_SPI_SHADER_PGM_RSRC3_ES, S_00B31C_CU_EN(0xffff)); + radeon_set_sh_reg(cs, R_00B21C_SPI_SHADER_PGM_RSRC3_GS, S_00B21C_CU_EN(0xffff)); + + if (physical_device->rad_info.num_good_compute_units / + (physical_device->rad_info.max_se * physical_device->rad_info.max_sh_per_se) <= 4) { + /* Too few available compute units per SH. Disallowing + * VS to run on CU0 could hurt us more than late VS + * allocation would help. + * + * LATE_ALLOC_VS = 2 is the highest safe number. + */ + radeon_set_sh_reg(cs, R_00B118_SPI_SHADER_PGM_RSRC3_VS, S_00B118_CU_EN(0xffff)); + radeon_set_sh_reg(cs, R_00B11C_SPI_SHADER_LATE_ALLOC_VS, S_00B11C_LIMIT(2)); + } else { + /* Set LATE_ALLOC_VS == 31. It should be less than + * the number of scratch waves. Limitations: + * - VS can't execute on CU0. + * - If HS writes outputs to LDS, LS can't execute on CU0. + */ + radeon_set_sh_reg(cs, R_00B118_SPI_SHADER_PGM_RSRC3_VS, S_00B118_CU_EN(0xfffe)); + radeon_set_sh_reg(cs, R_00B11C_SPI_SHADER_LATE_ALLOC_VS, S_00B11C_LIMIT(31)); + } + + radeon_set_sh_reg(cs, R_00B01C_SPI_SHADER_PGM_RSRC3_PS, S_00B01C_CU_EN(0xffff)); + } + + if (physical_device->rad_info.chip_class >= VI) { + radeon_set_context_reg(cs, R_028424_CB_DCC_CONTROL, + S_028424_OVERWRITE_COMBINER_MRT_SHARING_DISABLE(1) | + S_028424_OVERWRITE_COMBINER_WATERMARK(4)); + radeon_set_context_reg(cs, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, 30); + radeon_set_context_reg(cs, R_028C5C_VGT_OUT_DEALLOC_CNTL, 32); + radeon_set_context_reg(cs, R_028B50_VGT_TESS_DISTRIBUTION, + S_028B50_ACCUM_ISOLINE(32) | + S_028B50_ACCUM_TRI(11) | + S_028B50_ACCUM_QUAD(11) | + S_028B50_DONUT_SPLIT(16)); + } else { + radeon_set_context_reg(cs, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, 14); + radeon_set_context_reg(cs, R_028C5C_VGT_OUT_DEALLOC_CNTL, 16); + } + + if (physical_device->rad_info.family == CHIP_STONEY) + radeon_set_context_reg(cs, R_028C40_PA_SC_SHADER_CONTROL, 0); + + si_init_compute(physical_device, cmd_buffer); +} + +static void +get_viewport_xform(const VkViewport *viewport, + float scale[3], float translate[3]) +{ + float x = viewport->x; + float y = viewport->y; + float half_width = 0.5f * viewport->width; + float half_height = 0.5f * viewport->height; + double n = viewport->minDepth; + double f = viewport->maxDepth; + + scale[0] = half_width; + translate[0] = half_width + x; + scale[1] = half_height; + translate[1] = half_height + y; + + scale[2] = (f - n); + translate[2] = n; +} + +void +si_write_viewport(struct radeon_winsys_cs *cs, int first_vp, + int count, const VkViewport *viewports) +{ + int i; + + if (count == 0) { + radeon_set_context_reg_seq(cs, R_02843C_PA_CL_VPORT_XSCALE, 6); + radeon_emit(cs, fui(1.0)); + radeon_emit(cs, fui(0.0)); + radeon_emit(cs, fui(1.0)); + radeon_emit(cs, fui(0.0)); + radeon_emit(cs, fui(1.0)); + radeon_emit(cs, fui(0.0)); + + radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0, 2); + radeon_emit(cs, fui(0.0)); + radeon_emit(cs, fui(1.0)); + + return; + } + radeon_set_context_reg_seq(cs, R_02843C_PA_CL_VPORT_XSCALE + + first_vp * 4 * 6, count * 6); + + for (i = 0; i < count; i++) { + float scale[3], translate[3]; + + + get_viewport_xform(&viewports[i], scale, translate); + radeon_emit(cs, fui(scale[0])); + radeon_emit(cs, fui(translate[0])); + radeon_emit(cs, fui(scale[1])); + radeon_emit(cs, fui(translate[1])); + radeon_emit(cs, fui(scale[2])); + radeon_emit(cs, fui(translate[2])); + } + + radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0 + + first_vp * 4 * 2, count * 2); + for (i = 0; i < count; i++) { + float zmin = MIN2(viewports[i].minDepth, viewports[i].maxDepth); + float zmax = MAX2(viewports[i].minDepth, viewports[i].maxDepth); + radeon_emit(cs, fui(zmin)); + radeon_emit(cs, fui(zmax)); + } +} + +void +si_write_scissors(struct radeon_winsys_cs *cs, int first, + int count, const VkRect2D *scissors) +{ + int i; + if (count == 0) + return; + + radeon_set_context_reg_seq(cs, R_028250_PA_SC_VPORT_SCISSOR_0_TL + first * 4 * 2, count * 2); + for (i = 0; i < count; i++) { + radeon_emit(cs, S_028250_TL_X(scissors[i].offset.x) | + S_028250_TL_Y(scissors[i].offset.y) | + S_028250_WINDOW_OFFSET_DISABLE(1)); + radeon_emit(cs, S_028254_BR_X(scissors[i].offset.x + scissors[i].extent.width) | + S_028254_BR_Y(scissors[i].offset.y + scissors[i].extent.height)); + } +} + +uint32_t +si_get_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer) +{ + enum chip_class chip_class = cmd_buffer->device->physical_device->rad_info.chip_class; + struct radeon_info *info = &cmd_buffer->device->physical_device->rad_info; + unsigned prim = cmd_buffer->state.pipeline->graphics.prim; + unsigned primgroup_size = 128; /* recommended without a GS */ + unsigned max_primgroup_in_wave = 2; + /* SWITCH_ON_EOP(0) is always preferable. */ + bool wd_switch_on_eop = false; + bool ia_switch_on_eop = false; + bool ia_switch_on_eoi = false; + bool partial_vs_wave = false; + bool partial_es_wave = false; + + /* TODO GS */ + + /* TODO TES */ + + /* TODO linestipple */ + + if (chip_class >= CIK) { + /* WD_SWITCH_ON_EOP has no effect on GPUs with less than + * 4 shader engines. Set 1 to pass the assertion below. + * The other cases are hardware requirements. */ + if (info->max_se < 4 || + prim == V_008958_DI_PT_POLYGON || + prim == V_008958_DI_PT_LINELOOP || + prim == V_008958_DI_PT_TRIFAN || + prim == V_008958_DI_PT_TRISTRIP_ADJ) + // info->primitive_restart || + // info->count_from_stream_output) + wd_switch_on_eop = true; + + /* TODO HAWAII */ + + /* Required on CIK and later. */ + if (info->max_se > 2 && !wd_switch_on_eop) + ia_switch_on_eoi = true; + + /* Required by Hawaii and, for some special cases, by VI. */ +#if 0 + if (ia_switch_on_eoi && + (sctx->b.family == CHIP_HAWAII || + (sctx->b.chip_class == VI && + (sctx->gs_shader.cso || max_primgroup_in_wave != 2)))) + partial_vs_wave = true; +#endif + +#if 0 + /* Instancing bug on Bonaire. */ + if (sctx->b.family == CHIP_BONAIRE && ia_switch_on_eoi && + (info->indirect || info->instance_count > 1)) + partial_vs_wave = true; +#endif + /* If the WD switch is false, the IA switch must be false too. */ + assert(wd_switch_on_eop || !ia_switch_on_eop); + } + /* If SWITCH_ON_EOI is set, PARTIAL_ES_WAVE must be set too. */ + if (ia_switch_on_eoi) + partial_es_wave = true; + + /* GS requirement. */ +#if 0 + if (SI_GS_PER_ES / primgroup_size >= sctx->screen->gs_table_depth - 3) + partial_es_wave = true; +#endif + + /* Hw bug with single-primitive instances and SWITCH_ON_EOI + * on multi-SE chips. */ +#if 0 + if (sctx->b.screen->info.max_se >= 2 && ia_switch_on_eoi && + (info->indirect || + (info->instance_count > 1 && + si_num_prims_for_vertices(info) <= 1))) + sctx->b.flags |= SI_CONTEXT_VGT_FLUSH; +#endif + return S_028AA8_SWITCH_ON_EOP(ia_switch_on_eop) | + S_028AA8_SWITCH_ON_EOI(ia_switch_on_eoi) | + S_028AA8_PARTIAL_VS_WAVE_ON(partial_vs_wave) | + S_028AA8_PARTIAL_ES_WAVE_ON(partial_es_wave) | + S_028AA8_PRIMGROUP_SIZE(primgroup_size - 1) | + S_028AA8_WD_SWITCH_ON_EOP(chip_class >= CIK ? wd_switch_on_eop : 0) | + S_028AA8_MAX_PRIMGRP_IN_WAVE(chip_class >= VI ? + max_primgroup_in_wave : 0); + +} + +void +si_emit_cache_flush(struct radv_cmd_buffer *cmd_buffer) +{ + enum chip_class chip_class = cmd_buffer->device->physical_device->rad_info.chip_class; + unsigned cp_coher_cntl = 0; + bool is_compute = cmd_buffer->queue_family_index == RADV_QUEUE_COMPUTE; + + if (is_compute) + cmd_buffer->state.flush_bits &= ~(RADV_CMD_FLAG_FLUSH_AND_INV_CB | + RADV_CMD_FLAG_FLUSH_AND_INV_CB_META | + RADV_CMD_FLAG_FLUSH_AND_INV_DB | + RADV_CMD_FLAG_FLUSH_AND_INV_DB_META | + RADV_CMD_FLAG_PS_PARTIAL_FLUSH | + RADV_CMD_FLAG_VS_PARTIAL_FLUSH | + RADV_CMD_FLAG_VGT_FLUSH); + + radeon_check_space(cmd_buffer->device->ws, cmd_buffer->cs, 128); + + if (cmd_buffer->state.flush_bits & RADV_CMD_FLAG_INV_ICACHE) + cp_coher_cntl |= S_0085F0_SH_ICACHE_ACTION_ENA(1); + if (cmd_buffer->state.flush_bits & RADV_CMD_FLAG_INV_SMEM_L1) + cp_coher_cntl |= S_0085F0_SH_KCACHE_ACTION_ENA(1); + if (cmd_buffer->state.flush_bits & RADV_CMD_FLAG_INV_VMEM_L1) + cp_coher_cntl |= S_0085F0_TCL1_ACTION_ENA(1); + if (cmd_buffer->state.flush_bits & RADV_CMD_FLAG_INV_GLOBAL_L2) { + cp_coher_cntl |= S_0085F0_TC_ACTION_ENA(1); + if (chip_class >= VI) + cp_coher_cntl |= S_0301F0_TC_WB_ACTION_ENA(1); + } + + if (cmd_buffer->state.flush_bits & RADV_CMD_FLAG_FLUSH_AND_INV_CB) { + cp_coher_cntl |= S_0085F0_CB_ACTION_ENA(1) | + S_0085F0_CB0_DEST_BASE_ENA(1) | + S_0085F0_CB1_DEST_BASE_ENA(1) | + S_0085F0_CB2_DEST_BASE_ENA(1) | + S_0085F0_CB3_DEST_BASE_ENA(1) | + S_0085F0_CB4_DEST_BASE_ENA(1) | + S_0085F0_CB5_DEST_BASE_ENA(1) | + S_0085F0_CB6_DEST_BASE_ENA(1) | + S_0085F0_CB7_DEST_BASE_ENA(1); + + /* Necessary for DCC */ + if (cmd_buffer->device->physical_device->rad_info.chip_class >= VI) { + radeon_emit(cmd_buffer->cs, PKT3(PKT3_EVENT_WRITE_EOP, 4, 0)); + radeon_emit(cmd_buffer->cs, EVENT_TYPE(V_028A90_FLUSH_AND_INV_CB_DATA_TS) | + EVENT_INDEX(5)); + radeon_emit(cmd_buffer->cs, 0); + radeon_emit(cmd_buffer->cs, 0); + radeon_emit(cmd_buffer->cs, 0); + radeon_emit(cmd_buffer->cs, 0); + } + } + + if (cmd_buffer->state.flush_bits & RADV_CMD_FLAG_FLUSH_AND_INV_DB) { + cp_coher_cntl |= S_0085F0_DB_ACTION_ENA(1) | + S_0085F0_DB_DEST_BASE_ENA(1); + } + + if (cmd_buffer->state.flush_bits & RADV_CMD_FLAG_FLUSH_AND_INV_CB_META) { + radeon_emit(cmd_buffer->cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); + radeon_emit(cmd_buffer->cs, EVENT_TYPE(V_028A90_FLUSH_AND_INV_CB_META) | EVENT_INDEX(0)); + } + + if (cmd_buffer->state.flush_bits & RADV_CMD_FLAG_FLUSH_AND_INV_DB_META) { + radeon_emit(cmd_buffer->cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); + radeon_emit(cmd_buffer->cs, EVENT_TYPE(V_028A90_FLUSH_AND_INV_DB_META) | EVENT_INDEX(0)); + } + + if (!(cmd_buffer->state.flush_bits & (RADV_CMD_FLAG_FLUSH_AND_INV_CB | + RADV_CMD_FLAG_FLUSH_AND_INV_DB))) { + if (cmd_buffer->state.flush_bits & RADV_CMD_FLAG_PS_PARTIAL_FLUSH) { + radeon_emit(cmd_buffer->cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); + radeon_emit(cmd_buffer->cs, EVENT_TYPE(V_028A90_PS_PARTIAL_FLUSH) | EVENT_INDEX(4)); + } else if (cmd_buffer->state.flush_bits & RADV_CMD_FLAG_VS_PARTIAL_FLUSH) { + radeon_emit(cmd_buffer->cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); + radeon_emit(cmd_buffer->cs, EVENT_TYPE(V_028A90_VS_PARTIAL_FLUSH) | EVENT_INDEX(4)); + } + } + + if (cmd_buffer->state.flush_bits & RADV_CMD_FLAG_CS_PARTIAL_FLUSH) { + radeon_emit(cmd_buffer->cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); + radeon_emit(cmd_buffer->cs, EVENT_TYPE(V_028A90_CS_PARTIAL_FLUSH) | EVENT_INDEX(4)); + } + + /* VGT state sync */ + if (cmd_buffer->state.flush_bits & RADV_CMD_FLAG_VGT_FLUSH) { + radeon_emit(cmd_buffer->cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); + radeon_emit(cmd_buffer->cs, EVENT_TYPE(V_028A90_VGT_FLUSH) | EVENT_INDEX(0)); + } + + /* Make sure ME is idle (it executes most packets) before continuing. + * This prevents read-after-write hazards between PFP and ME. + */ + if ((cp_coher_cntl || (cmd_buffer->state.flush_bits & RADV_CMD_FLAG_CS_PARTIAL_FLUSH)) && + !radv_cmd_buffer_uses_mec(cmd_buffer)) { + radeon_emit(cmd_buffer->cs, PKT3(PKT3_PFP_SYNC_ME, 0, 0)); + radeon_emit(cmd_buffer->cs, 0); + } + + /* When one of the DEST_BASE flags is set, SURFACE_SYNC waits for idle. + * Therefore, it should be last. Done in PFP. + */ + if (cp_coher_cntl) { + if (radv_cmd_buffer_uses_mec(cmd_buffer)) { + radeon_emit(cmd_buffer->cs, PKT3(PKT3_ACQUIRE_MEM, 5, 0) | + PKT3_SHADER_TYPE_S(1)); + radeon_emit(cmd_buffer->cs, cp_coher_cntl); /* CP_COHER_CNTL */ + radeon_emit(cmd_buffer->cs, 0xffffffff); /* CP_COHER_SIZE */ + radeon_emit(cmd_buffer->cs, 0xff); /* CP_COHER_SIZE_HI */ + radeon_emit(cmd_buffer->cs, 0); /* CP_COHER_BASE */ + radeon_emit(cmd_buffer->cs, 0); /* CP_COHER_BASE_HI */ + radeon_emit(cmd_buffer->cs, 0x0000000A); /* POLL_INTERVAL */ + } else { + /* ACQUIRE_MEM is only required on a compute ring. */ + radeon_emit(cmd_buffer->cs, PKT3(PKT3_SURFACE_SYNC, 3, 0)); + radeon_emit(cmd_buffer->cs, cp_coher_cntl); /* CP_COHER_CNTL */ + radeon_emit(cmd_buffer->cs, 0xffffffff); /* CP_COHER_SIZE */ + radeon_emit(cmd_buffer->cs, 0); /* CP_COHER_BASE */ + radeon_emit(cmd_buffer->cs, 0x0000000A); /* POLL_INTERVAL */ + } + } + + if (cmd_buffer->state.flush_bits) + radv_cmd_buffer_trace_emit(cmd_buffer); + cmd_buffer->state.flush_bits = 0; +} + + +/* Set this if you want the 3D engine to wait until CP DMA is done. + * It should be set on the last CP DMA packet. */ +#define R600_CP_DMA_SYNC (1 << 0) /* R600+ */ + +/* Set this if the source data was used as a destination in a previous CP DMA + * packet. It's for preventing a read-after-write (RAW) hazard between two + * CP DMA packets. */ +#define SI_CP_DMA_RAW_WAIT (1 << 1) /* SI+ */ +#define CIK_CP_DMA_USE_L2 (1 << 2) + +/* Alignment for optimal performance. */ +#define CP_DMA_ALIGNMENT 32 +/* The max number of bytes to copy per packet. */ +#define CP_DMA_MAX_BYTE_COUNT ((1 << 21) - CP_DMA_ALIGNMENT) + +static void si_emit_cp_dma_copy_buffer(struct radv_cmd_buffer *cmd_buffer, + uint64_t dst_va, uint64_t src_va, + unsigned size, unsigned flags) +{ + struct radeon_winsys_cs *cs = cmd_buffer->cs; + uint32_t sync_flag = flags & R600_CP_DMA_SYNC ? S_411_CP_SYNC(1) : 0; + uint32_t wr_confirm = !(flags & R600_CP_DMA_SYNC) ? S_414_DISABLE_WR_CONFIRM(1) : 0; + uint32_t raw_wait = flags & SI_CP_DMA_RAW_WAIT ? S_414_RAW_WAIT(1) : 0; + uint32_t sel = flags & CIK_CP_DMA_USE_L2 ? + S_411_SRC_SEL(V_411_SRC_ADDR_TC_L2) | + S_411_DSL_SEL(V_411_DST_ADDR_TC_L2) : 0; + + assert(size); + assert((size & ((1<<21)-1)) == size); + + radeon_check_space(cmd_buffer->device->ws, cmd_buffer->cs, 9); + + if (cmd_buffer->device->physical_device->rad_info.chip_class >= CIK) { + radeon_emit(cs, PKT3(PKT3_DMA_DATA, 5, 0)); + radeon_emit(cs, sync_flag | sel); /* CP_SYNC [31] */ + radeon_emit(cs, src_va); /* SRC_ADDR_LO [31:0] */ + radeon_emit(cs, src_va >> 32); /* SRC_ADDR_HI [31:0] */ + radeon_emit(cs, dst_va); /* DST_ADDR_LO [31:0] */ + radeon_emit(cs, dst_va >> 32); /* DST_ADDR_HI [31:0] */ + radeon_emit(cs, size | wr_confirm | raw_wait); /* COMMAND [29:22] | BYTE_COUNT [20:0] */ + } else { + radeon_emit(cs, PKT3(PKT3_CP_DMA, 4, 0)); + radeon_emit(cs, src_va); /* SRC_ADDR_LO [31:0] */ + radeon_emit(cs, sync_flag | ((src_va >> 32) & 0xffff)); /* CP_SYNC [31] | SRC_ADDR_HI [15:0] */ + radeon_emit(cs, dst_va); /* DST_ADDR_LO [31:0] */ + radeon_emit(cs, (dst_va >> 32) & 0xffff); /* DST_ADDR_HI [15:0] */ + radeon_emit(cs, size | wr_confirm | raw_wait); /* COMMAND [29:22] | BYTE_COUNT [20:0] */ + } + + /* CP DMA is executed in ME, but index buffers are read by PFP. + * This ensures that ME (CP DMA) is idle before PFP starts fetching + * indices. If we wanted to execute CP DMA in PFP, this packet + * should precede it. + */ + if (sync_flag && cmd_buffer->queue_family_index == RADV_QUEUE_GENERAL) { + radeon_emit(cs, PKT3(PKT3_PFP_SYNC_ME, 0, 0)); + radeon_emit(cs, 0); + } + + radv_cmd_buffer_trace_emit(cmd_buffer); +} + +/* Emit a CP DMA packet to clear a buffer. The size must fit in bits [20:0]. */ +static void si_emit_cp_dma_clear_buffer(struct radv_cmd_buffer *cmd_buffer, + uint64_t dst_va, unsigned size, + uint32_t clear_value, unsigned flags) +{ + struct radeon_winsys_cs *cs = cmd_buffer->cs; + uint32_t sync_flag = flags & R600_CP_DMA_SYNC ? S_411_CP_SYNC(1) : 0; + uint32_t wr_confirm = !(flags & R600_CP_DMA_SYNC) ? S_414_DISABLE_WR_CONFIRM(1) : 0; + uint32_t raw_wait = flags & SI_CP_DMA_RAW_WAIT ? S_414_RAW_WAIT(1) : 0; + uint32_t dst_sel = flags & CIK_CP_DMA_USE_L2 ? S_411_DSL_SEL(V_411_DST_ADDR_TC_L2) : 0; + + assert(size); + assert((size & ((1<<21)-1)) == size); + + radeon_check_space(cmd_buffer->device->ws, cmd_buffer->cs, 9); + + if (cmd_buffer->device->physical_device->rad_info.chip_class >= CIK) { + radeon_emit(cs, PKT3(PKT3_DMA_DATA, 5, 0)); + radeon_emit(cs, sync_flag | dst_sel | S_411_SRC_SEL(V_411_DATA)); /* CP_SYNC [31] | SRC_SEL[30:29] */ + radeon_emit(cs, clear_value); /* DATA [31:0] */ + radeon_emit(cs, 0); + radeon_emit(cs, dst_va); /* DST_ADDR_LO [31:0] */ + radeon_emit(cs, dst_va >> 32); /* DST_ADDR_HI [15:0] */ + radeon_emit(cs, size | wr_confirm | raw_wait); /* COMMAND [29:22] | BYTE_COUNT [20:0] */ + } else { + radeon_emit(cs, PKT3(PKT3_CP_DMA, 4, 0)); + radeon_emit(cs, clear_value); /* DATA [31:0] */ + radeon_emit(cs, sync_flag | S_411_SRC_SEL(V_411_DATA)); /* CP_SYNC [31] | SRC_SEL[30:29] */ + radeon_emit(cs, dst_va); /* DST_ADDR_LO [31:0] */ + radeon_emit(cs, (dst_va >> 32) & 0xffff); /* DST_ADDR_HI [15:0] */ + radeon_emit(cs, size | wr_confirm | raw_wait); /* COMMAND [29:22] | BYTE_COUNT [20:0] */ + } + + /* See "copy_buffer" for explanation. */ + if (sync_flag && cmd_buffer->queue_family_index == RADV_QUEUE_GENERAL) { + radeon_emit(cs, PKT3(PKT3_PFP_SYNC_ME, 0, 0)); + radeon_emit(cs, 0); + } + radv_cmd_buffer_trace_emit(cmd_buffer); +} + +static void si_cp_dma_prepare(struct radv_cmd_buffer *cmd_buffer, uint64_t byte_count, + uint64_t remaining_size, unsigned *flags) +{ + + /* Flush the caches for the first copy only. + * Also wait for the previous CP DMA operations. + */ + if (cmd_buffer->state.flush_bits) { + si_emit_cache_flush(cmd_buffer); + *flags |= SI_CP_DMA_RAW_WAIT; + } + + /* Do the synchronization after the last dma, so that all data + * is written to memory. + */ + if (byte_count == remaining_size) + *flags |= R600_CP_DMA_SYNC; +} + +static void si_cp_dma_realign_engine(struct radv_cmd_buffer *cmd_buffer, unsigned size) +{ + uint64_t va; + uint32_t offset; + unsigned dma_flags = 0; + unsigned buf_size = CP_DMA_ALIGNMENT * 2; + void *ptr; + + assert(size < CP_DMA_ALIGNMENT); + + radv_cmd_buffer_upload_alloc(cmd_buffer, buf_size, CP_DMA_ALIGNMENT, &offset, &ptr); + + va = cmd_buffer->device->ws->buffer_get_va(cmd_buffer->upload.upload_bo); + va += offset; + + si_cp_dma_prepare(cmd_buffer, size, size, &dma_flags); + + si_emit_cp_dma_copy_buffer(cmd_buffer, va, va + CP_DMA_ALIGNMENT, size, + dma_flags); +} + +void si_cp_dma_buffer_copy(struct radv_cmd_buffer *cmd_buffer, + uint64_t src_va, uint64_t dest_va, + uint64_t size) +{ + uint64_t main_src_va, main_dest_va; + uint64_t skipped_size = 0, realign_size = 0; + + + if (cmd_buffer->device->physical_device->rad_info.family <= CHIP_CARRIZO || + cmd_buffer->device->physical_device->rad_info.family == CHIP_STONEY) { + /* If the size is not aligned, we must add a dummy copy at the end + * just to align the internal counter. Otherwise, the DMA engine + * would slow down by an order of magnitude for following copies. + */ + if (size % CP_DMA_ALIGNMENT) + realign_size = CP_DMA_ALIGNMENT - (size % CP_DMA_ALIGNMENT); + + /* If the copy begins unaligned, we must start copying from the next + * aligned block and the skipped part should be copied after everything + * else has been copied. Only the src alignment matters, not dst. + */ + if (src_va % CP_DMA_ALIGNMENT) { + skipped_size = CP_DMA_ALIGNMENT - (src_va % CP_DMA_ALIGNMENT); + /* The main part will be skipped if the size is too small. */ + skipped_size = MIN2(skipped_size, size); + size -= skipped_size; + } + } + main_src_va = src_va + skipped_size; + main_dest_va = dest_va + skipped_size; + + while (size) { + unsigned dma_flags = 0; + unsigned byte_count = MIN2(size, CP_DMA_MAX_BYTE_COUNT); + + si_cp_dma_prepare(cmd_buffer, byte_count, + size + skipped_size + realign_size, + &dma_flags); + + si_emit_cp_dma_copy_buffer(cmd_buffer, main_dest_va, main_src_va, + byte_count, dma_flags); + + size -= byte_count; + main_src_va += byte_count; + main_dest_va += byte_count; + } + + if (skipped_size) { + unsigned dma_flags = 0; + + si_cp_dma_prepare(cmd_buffer, skipped_size, + size + skipped_size + realign_size, + &dma_flags); + + si_emit_cp_dma_copy_buffer(cmd_buffer, dest_va, src_va, + skipped_size, dma_flags); + } + if (realign_size) + si_cp_dma_realign_engine(cmd_buffer, realign_size); +} + +void si_cp_dma_clear_buffer(struct radv_cmd_buffer *cmd_buffer, uint64_t va, + uint64_t size, unsigned value) +{ + + if (!size) + return; + + assert(va % 4 == 0 && size % 4 == 0); + + while (size) { + unsigned byte_count = MIN2(size, CP_DMA_MAX_BYTE_COUNT); + unsigned dma_flags = 0; + + si_cp_dma_prepare(cmd_buffer, byte_count, size, &dma_flags); + + /* Emit the clear packet. */ + si_emit_cp_dma_clear_buffer(cmd_buffer, va, byte_count, value, + dma_flags); + + size -= byte_count; + va += byte_count; + } +} + +/* For MSAA sample positions. */ +#define FILL_SREG(s0x, s0y, s1x, s1y, s2x, s2y, s3x, s3y) \ + (((s0x) & 0xf) | (((unsigned)(s0y) & 0xf) << 4) | \ + (((unsigned)(s1x) & 0xf) << 8) | (((unsigned)(s1y) & 0xf) << 12) | \ + (((unsigned)(s2x) & 0xf) << 16) | (((unsigned)(s2y) & 0xf) << 20) | \ + (((unsigned)(s3x) & 0xf) << 24) | (((unsigned)(s3y) & 0xf) << 28)) + + +/* 2xMSAA + * There are two locations (4, 4), (-4, -4). */ +const uint32_t eg_sample_locs_2x[4] = { + FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4), + FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4), + FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4), + FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4), +}; +const unsigned eg_max_dist_2x = 4; +/* 4xMSAA + * There are 4 locations: (-2, 6), (6, -2), (-6, 2), (2, 6). */ +const uint32_t eg_sample_locs_4x[4] = { + FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6), + FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6), + FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6), + FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6), +}; +const unsigned eg_max_dist_4x = 6; + +/* Cayman 8xMSAA */ +static const uint32_t cm_sample_locs_8x[] = { + FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5), + FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5), + FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5), + FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5), + FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7), + FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7), + FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7), + FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7), +}; +static const unsigned cm_max_dist_8x = 8; +/* Cayman 16xMSAA */ +static const uint32_t cm_sample_locs_16x[] = { + FILL_SREG( 1, 1, -1, -3, -3, 2, 4, -1), + FILL_SREG( 1, 1, -1, -3, -3, 2, 4, -1), + FILL_SREG( 1, 1, -1, -3, -3, 2, 4, -1), + FILL_SREG( 1, 1, -1, -3, -3, 2, 4, -1), + FILL_SREG(-5, -2, 2, 5, 5, 3, 3, -5), + FILL_SREG(-5, -2, 2, 5, 5, 3, 3, -5), + FILL_SREG(-5, -2, 2, 5, 5, 3, 3, -5), + FILL_SREG(-5, -2, 2, 5, 5, 3, 3, -5), + FILL_SREG(-2, 6, 0, -7, -4, -6, -6, 4), + FILL_SREG(-2, 6, 0, -7, -4, -6, -6, 4), + FILL_SREG(-2, 6, 0, -7, -4, -6, -6, 4), + FILL_SREG(-2, 6, 0, -7, -4, -6, -6, 4), + FILL_SREG(-8, 0, 7, -4, 6, 7, -7, -8), + FILL_SREG(-8, 0, 7, -4, 6, 7, -7, -8), + FILL_SREG(-8, 0, 7, -4, 6, 7, -7, -8), + FILL_SREG(-8, 0, 7, -4, 6, 7, -7, -8), +}; +static const unsigned cm_max_dist_16x = 8; + +unsigned radv_cayman_get_maxdist(int log_samples) +{ + unsigned max_dist[] = { + 0, + eg_max_dist_2x, + eg_max_dist_4x, + cm_max_dist_8x, + cm_max_dist_16x + }; + return max_dist[log_samples]; +} + +void radv_cayman_emit_msaa_sample_locs(struct radeon_winsys_cs *cs, int nr_samples) +{ + switch (nr_samples) { + default: + case 1: + radeon_set_context_reg(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 0); + radeon_set_context_reg(cs, CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, 0); + radeon_set_context_reg(cs, CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, 0); + radeon_set_context_reg(cs, CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, 0); + break; + case 2: + radeon_set_context_reg(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, eg_sample_locs_2x[0]); + radeon_set_context_reg(cs, CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, eg_sample_locs_2x[1]); + radeon_set_context_reg(cs, CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, eg_sample_locs_2x[2]); + radeon_set_context_reg(cs, CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, eg_sample_locs_2x[3]); + break; + case 4: + radeon_set_context_reg(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, eg_sample_locs_4x[0]); + radeon_set_context_reg(cs, CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, eg_sample_locs_4x[1]); + radeon_set_context_reg(cs, CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, eg_sample_locs_4x[2]); + radeon_set_context_reg(cs, CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, eg_sample_locs_4x[3]); + break; + case 8: + radeon_set_context_reg_seq(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 14); + radeon_emit(cs, cm_sample_locs_8x[0]); + radeon_emit(cs, cm_sample_locs_8x[4]); + radeon_emit(cs, 0); + radeon_emit(cs, 0); + radeon_emit(cs, cm_sample_locs_8x[1]); + radeon_emit(cs, cm_sample_locs_8x[5]); + radeon_emit(cs, 0); + radeon_emit(cs, 0); + radeon_emit(cs, cm_sample_locs_8x[2]); + radeon_emit(cs, cm_sample_locs_8x[6]); + radeon_emit(cs, 0); + radeon_emit(cs, 0); + radeon_emit(cs, cm_sample_locs_8x[3]); + radeon_emit(cs, cm_sample_locs_8x[7]); + break; + case 16: + radeon_set_context_reg_seq(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 16); + radeon_emit(cs, cm_sample_locs_16x[0]); + radeon_emit(cs, cm_sample_locs_16x[4]); + radeon_emit(cs, cm_sample_locs_16x[8]); + radeon_emit(cs, cm_sample_locs_16x[12]); + radeon_emit(cs, cm_sample_locs_16x[1]); + radeon_emit(cs, cm_sample_locs_16x[5]); + radeon_emit(cs, cm_sample_locs_16x[9]); + radeon_emit(cs, cm_sample_locs_16x[13]); + radeon_emit(cs, cm_sample_locs_16x[2]); + radeon_emit(cs, cm_sample_locs_16x[6]); + radeon_emit(cs, cm_sample_locs_16x[10]); + radeon_emit(cs, cm_sample_locs_16x[14]); + radeon_emit(cs, cm_sample_locs_16x[3]); + radeon_emit(cs, cm_sample_locs_16x[7]); + radeon_emit(cs, cm_sample_locs_16x[11]); + radeon_emit(cs, cm_sample_locs_16x[15]); + break; + } +} + +static void radv_cayman_get_sample_position(struct radv_device *device, + unsigned sample_count, + unsigned sample_index, float *out_value) +{ + int offset, index; + struct { + int idx:4; + } val; + switch (sample_count) { + case 1: + default: + out_value[0] = out_value[1] = 0.5; + break; + case 2: + offset = 4 * (sample_index * 2); + val.idx = (eg_sample_locs_2x[0] >> offset) & 0xf; + out_value[0] = (float)(val.idx + 8) / 16.0f; + val.idx = (eg_sample_locs_2x[0] >> (offset + 4)) & 0xf; + out_value[1] = (float)(val.idx + 8) / 16.0f; + break; + case 4: + offset = 4 * (sample_index * 2); + val.idx = (eg_sample_locs_4x[0] >> offset) & 0xf; + out_value[0] = (float)(val.idx + 8) / 16.0f; + val.idx = (eg_sample_locs_4x[0] >> (offset + 4)) & 0xf; + out_value[1] = (float)(val.idx + 8) / 16.0f; + break; + case 8: + offset = 4 * (sample_index % 4 * 2); + index = (sample_index / 4) * 4; + val.idx = (cm_sample_locs_8x[index] >> offset) & 0xf; + out_value[0] = (float)(val.idx + 8) / 16.0f; + val.idx = (cm_sample_locs_8x[index] >> (offset + 4)) & 0xf; + out_value[1] = (float)(val.idx + 8) / 16.0f; + break; + case 16: + offset = 4 * (sample_index % 4 * 2); + index = (sample_index / 4) * 4; + val.idx = (cm_sample_locs_16x[index] >> offset) & 0xf; + out_value[0] = (float)(val.idx + 8) / 16.0f; + val.idx = (cm_sample_locs_16x[index] >> (offset + 4)) & 0xf; + out_value[1] = (float)(val.idx + 8) / 16.0f; + break; + } +} + +void radv_device_init_msaa(struct radv_device *device) +{ + int i; + radv_cayman_get_sample_position(device, 1, 0, device->sample_locations_1x[0]); + + for (i = 0; i < 2; i++) + radv_cayman_get_sample_position(device, 2, i, device->sample_locations_2x[i]); + for (i = 0; i < 4; i++) + radv_cayman_get_sample_position(device, 4, i, device->sample_locations_4x[i]); + for (i = 0; i < 8; i++) + radv_cayman_get_sample_position(device, 8, i, device->sample_locations_8x[i]); + for (i = 0; i < 16; i++) + radv_cayman_get_sample_position(device, 16, i, device->sample_locations_16x[i]); +} diff -Nru mesa-12.0.6/src/amd/vulkan/vk_format.h mesa-17.0.7/src/amd/vulkan/vk_format.h --- mesa-12.0.6/src/amd/vulkan/vk_format.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/vk_format.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,451 @@ +/* + * Copyright © 2016 Red Hat. + * Copyright © 2016 Bas Nieuwenhuizen + * + * Based on u_format.h which is: + * Copyright 2009-2010 Vmware, Inc. + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#pragma once + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#include +enum vk_format_layout { + /** + * Formats with vk_format_block::width == vk_format_block::height == 1 + * that can be described as an ordinary data structure. + */ + VK_FORMAT_LAYOUT_PLAIN = 0, + + /** + * Formats with sub-sampled channels. + * + * This is for formats like YVYU where there is less than one sample per + * pixel. + */ + VK_FORMAT_LAYOUT_SUBSAMPLED = 3, + + /** + * S3 Texture Compression formats. + */ + VK_FORMAT_LAYOUT_S3TC = 4, + + /** + * Red-Green Texture Compression formats. + */ + VK_FORMAT_LAYOUT_RGTC = 5, + + /** + * Ericsson Texture Compression + */ + VK_FORMAT_LAYOUT_ETC = 6, + + /** + * BC6/7 Texture Compression + */ + VK_FORMAT_LAYOUT_BPTC = 7, + + /** + * ASTC + */ + VK_FORMAT_LAYOUT_ASTC = 8, + + /** + * Everything else that doesn't fit in any of the above layouts. + */ + VK_FORMAT_LAYOUT_OTHER = 9 +}; + +struct vk_format_block +{ + /** Block width in pixels */ + unsigned width; + + /** Block height in pixels */ + unsigned height; + + /** Block size in bits */ + unsigned bits; +}; + +enum vk_format_type { + VK_FORMAT_TYPE_VOID = 0, + VK_FORMAT_TYPE_UNSIGNED = 1, + VK_FORMAT_TYPE_SIGNED = 2, + VK_FORMAT_TYPE_FIXED = 3, + VK_FORMAT_TYPE_FLOAT = 4 +}; + + +enum vk_format_colorspace { + VK_FORMAT_COLORSPACE_RGB = 0, + VK_FORMAT_COLORSPACE_SRGB = 1, + VK_FORMAT_COLORSPACE_YUV = 2, + VK_FORMAT_COLORSPACE_ZS = 3 +}; + +struct vk_format_channel_description { + unsigned type:5; + unsigned normalized:1; + unsigned pure_integer:1; + unsigned scaled:1; + unsigned size:8; + unsigned shift:16; +}; + +struct vk_format_description +{ + VkFormat format; + const char *name; + const char *short_name; + + struct vk_format_block block; + enum vk_format_layout layout; + + unsigned nr_channels:3; + unsigned is_array:1; + unsigned is_bitmask:1; + unsigned is_mixed:1; + + struct vk_format_channel_description channel[4]; + + unsigned char swizzle[4]; + + enum vk_format_colorspace colorspace; +}; + +extern const struct vk_format_description vk_format_description_table[]; + +const struct vk_format_description *vk_format_description(VkFormat format); + +/** + * Return total bits needed for the pixel format per block. + */ +static inline unsigned +vk_format_get_blocksizebits(VkFormat format) +{ + const struct vk_format_description *desc = vk_format_description(format); + + assert(desc); + if (!desc) { + return 0; + } + + return desc->block.bits; +} + +/** + * Return bytes per block (not pixel) for the given format. + */ +static inline unsigned +vk_format_get_blocksize(VkFormat format) +{ + unsigned bits = vk_format_get_blocksizebits(format); + unsigned bytes = bits / 8; + + assert(bits % 8 == 0); + assert(bytes > 0); + if (bytes == 0) { + bytes = 1; + } + + return bytes; +} + +static inline unsigned +vk_format_get_blockwidth(VkFormat format) +{ + const struct vk_format_description *desc = vk_format_description(format); + + assert(desc); + if (!desc) { + return 1; + } + + return desc->block.width; +} + +static inline unsigned +vk_format_get_blockheight(VkFormat format) +{ + const struct vk_format_description *desc = vk_format_description(format); + + assert(desc); + if (!desc) { + return 1; + } + + return desc->block.height; +} + +/** + * Return the index of the first non-void channel + * -1 if no non-void channels + */ +static inline int +vk_format_get_first_non_void_channel(VkFormat format) +{ + const struct vk_format_description *desc = vk_format_description(format); + int i; + + for (i = 0; i < 4; i++) + if (desc->channel[i].type != VK_FORMAT_TYPE_VOID) + break; + + if (i == 4) + return -1; + + return i; +} + +enum vk_swizzle { + VK_SWIZZLE_X, + VK_SWIZZLE_Y, + VK_SWIZZLE_Z, + VK_SWIZZLE_W, + VK_SWIZZLE_0, + VK_SWIZZLE_1, + VK_SWIZZLE_NONE, + VK_SWIZZLE_MAX, /**< Number of enums counter (must be last) */ +}; + +static inline VkImageAspectFlags +vk_format_aspects(VkFormat format) +{ + switch (format) { + case VK_FORMAT_UNDEFINED: + return 0; + + case VK_FORMAT_S8_UINT: + return VK_IMAGE_ASPECT_STENCIL_BIT; + + case VK_FORMAT_D16_UNORM_S8_UINT: + case VK_FORMAT_D24_UNORM_S8_UINT: + case VK_FORMAT_D32_SFLOAT_S8_UINT: + return VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT; + + case VK_FORMAT_D16_UNORM: + case VK_FORMAT_X8_D24_UNORM_PACK32: + case VK_FORMAT_D32_SFLOAT: + return VK_IMAGE_ASPECT_DEPTH_BIT; + + default: + return VK_IMAGE_ASPECT_COLOR_BIT; + } +} + +static inline enum vk_swizzle +radv_swizzle_conv(VkComponentSwizzle component, const unsigned char chan[4], VkComponentSwizzle vk_swiz) +{ + int x; + + if (vk_swiz == VK_COMPONENT_SWIZZLE_IDENTITY) + vk_swiz = component; + switch (vk_swiz) { + case VK_COMPONENT_SWIZZLE_ZERO: + return VK_SWIZZLE_0; + case VK_COMPONENT_SWIZZLE_ONE: + return VK_SWIZZLE_1; + case VK_COMPONENT_SWIZZLE_R: + for (x = 0; x < 4; x++) + if (chan[x] == 0) + return x; + return VK_SWIZZLE_0; + case VK_COMPONENT_SWIZZLE_G: + for (x = 0; x < 4; x++) + if (chan[x] == 1) + return x; + return VK_SWIZZLE_0; + case VK_COMPONENT_SWIZZLE_B: + for (x = 0; x < 4; x++) + if (chan[x] == 2) + return x; + return VK_SWIZZLE_0; + case VK_COMPONENT_SWIZZLE_A: + for (x = 0; x < 4; x++) + if (chan[x] == 3) + return x; + return VK_SWIZZLE_1; + default: + unreachable("Illegal swizzle"); + } +} + +static inline void vk_format_compose_swizzles(const VkComponentMapping *mapping, + const unsigned char swz[4], + enum vk_swizzle dst[4]) +{ + dst[0] = radv_swizzle_conv(VK_COMPONENT_SWIZZLE_R, swz, mapping->r); + dst[1] = radv_swizzle_conv(VK_COMPONENT_SWIZZLE_G, swz, mapping->g); + dst[2] = radv_swizzle_conv(VK_COMPONENT_SWIZZLE_B, swz, mapping->b); + dst[3] = radv_swizzle_conv(VK_COMPONENT_SWIZZLE_A, swz, mapping->a); +} + +static inline bool +vk_format_is_compressed(VkFormat format) +{ + const struct vk_format_description *desc = vk_format_description(format); + + assert(desc); + if (!desc) { + return false; + } + + switch (desc->layout) { + case VK_FORMAT_LAYOUT_S3TC: + case VK_FORMAT_LAYOUT_RGTC: + case VK_FORMAT_LAYOUT_ETC: + case VK_FORMAT_LAYOUT_BPTC: + case VK_FORMAT_LAYOUT_ASTC: + /* XXX add other formats in the future */ + return true; + default: + return false; + } +} + +static inline bool +vk_format_has_depth(const struct vk_format_description *desc) +{ + return desc->colorspace == VK_FORMAT_COLORSPACE_ZS && + desc->swizzle[0] != VK_SWIZZLE_NONE; +} + +static inline bool +vk_format_has_stencil(const struct vk_format_description *desc) +{ + return desc->colorspace == VK_FORMAT_COLORSPACE_ZS && + desc->swizzle[1] != VK_SWIZZLE_NONE; +} + +static inline bool +vk_format_is_depth_or_stencil(VkFormat format) +{ + const struct vk_format_description *desc = vk_format_description(format); + + assert(desc); + if (!desc) { + return false; + } + + return vk_format_has_depth(desc) || + vk_format_has_stencil(desc); +} + +static inline bool +vk_format_is_depth(VkFormat format) +{ + const struct vk_format_description *desc = vk_format_description(format); + + assert(desc); + if (!desc) { + return false; + } + + return vk_format_has_depth(desc); +} + +static inline bool +vk_format_is_color(VkFormat format) +{ + return !vk_format_is_depth_or_stencil(format); +} + +static inline VkFormat +vk_format_depth_only(VkFormat format) +{ + switch (format) { + case VK_FORMAT_D16_UNORM_S8_UINT: + return VK_FORMAT_D16_UNORM; + case VK_FORMAT_D24_UNORM_S8_UINT: + return VK_FORMAT_X8_D24_UNORM_PACK32; + case VK_FORMAT_D32_SFLOAT_S8_UINT: + return VK_FORMAT_D32_SFLOAT; + default: + return format; + } +} + +static inline bool +vk_format_is_int(VkFormat format) +{ + const struct vk_format_description *desc = vk_format_description(format); + int channel = vk_format_get_first_non_void_channel(format); + + return channel >= 0 && desc->channel[channel].pure_integer; +} + +static inline VkFormat +vk_format_stencil_only(VkFormat format) +{ + return VK_FORMAT_S8_UINT; +} + +static inline unsigned +vk_format_get_component_bits(VkFormat format, + enum vk_format_colorspace colorspace, + unsigned component) +{ + const struct vk_format_description *desc = vk_format_description(format); + enum vk_format_colorspace desc_colorspace; + + assert(format); + if (!format) { + return 0; + } + + assert(component < 4); + + /* Treat RGB and SRGB as equivalent. */ + if (colorspace == VK_FORMAT_COLORSPACE_SRGB) { + colorspace = VK_FORMAT_COLORSPACE_RGB; + } + if (desc->colorspace == VK_FORMAT_COLORSPACE_SRGB) { + desc_colorspace = VK_FORMAT_COLORSPACE_RGB; + } else { + desc_colorspace = desc->colorspace; + } + + if (desc_colorspace != colorspace) { + return 0; + } + + switch (desc->swizzle[component]) { + case VK_SWIZZLE_X: + return desc->channel[0].size; + case VK_SWIZZLE_Y: + return desc->channel[1].size; + case VK_SWIZZLE_Z: + return desc->channel[2].size; + case VK_SWIZZLE_W: + return desc->channel[3].size; + default: + return 0; + } +} +#ifdef __cplusplus +} // extern "C" { +#endif diff -Nru mesa-12.0.6/src/amd/vulkan/vk_format_layout.csv mesa-17.0.7/src/amd/vulkan/vk_format_layout.csv --- mesa-12.0.6/src/amd/vulkan/vk_format_layout.csv 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/vk_format_layout.csv 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,188 @@ +/* this is pretty much taken from the gallium one. */ + + +VK_FORMAT_UNDEFINED , plain, 1, 1, u8 , , , , x001, rgb +VK_FORMAT_R4G4_UNORM_PACK8 , plain, 1, 1, un4 , un4 , , , xy01, rgb +VK_FORMAT_R4G4B4A4_UNORM_PACK16 , plain, 1, 1, un4 , un4 , un4 , un4 , wzyx, rgb +VK_FORMAT_B4G4R4A4_UNORM_PACK16 , plain, 1, 1, un4 , un4 , un4 , un4 , wxyz, rgb +VK_FORMAT_R5G6B5_UNORM_PACK16 , plain, 1, 1, un5 , un6 , un5 , , zyx1, rgb +VK_FORMAT_B5G6R5_UNORM_PACK16 , plain, 1, 1, un5 , un6 , un5 , , xyz1, rgb +VK_FORMAT_R5G5B5A1_UNORM_PACK16 , plain, 1, 1, un1 , un5 , un5 , un5 , wzyx, rgb +VK_FORMAT_B5G5R5A1_UNORM_PACK16 , plain, 1, 1, un1 , un5 , un5 , un5 , wxyz, rgb +VK_FORMAT_A1R5G5B5_UNORM_PACK16 , plain, 1, 1, un5 , un5 , un5 , un1 , zyxw, rgb +VK_FORMAT_R8_UNORM , plain, 1, 1, un8 , , , , x001, rgb +VK_FORMAT_R8_SNORM , plain, 1, 1, sn8 , , , , x001, rgb +VK_FORMAT_R8_USCALED , plain, 1, 1, us8 , , , , x001, rgb +VK_FORMAT_R8_SSCALED , plain, 1, 1, ss8 , , , , x001, rgb +VK_FORMAT_R8_UINT , plain, 1, 1, up8 , , , , x001, rgb +VK_FORMAT_R8_SINT , plain, 1, 1, sp8 , , , , x001, rgb +VK_FORMAT_R8_SRGB , plain, 1, 1, un8 , , , , x001, srgb +VK_FORMAT_R8G8_UNORM , plain, 1, 1, un8 , un8 , , , xy01, rgb +VK_FORMAT_R8G8_SNORM , plain, 1, 1, sn8 , sn8 , , , xy01, rgb +VK_FORMAT_R8G8_USCALED , plain, 1, 1, us8 , us8 , , , xy01, rgb +VK_FORMAT_R8G8_SSCALED , plain, 1, 1, ss8 , ss8 , , , xy01, rgb +VK_FORMAT_R8G8_UINT , plain, 1, 1, up8 , up8 , , , xy01, rgb +VK_FORMAT_R8G8_SINT , plain, 1, 1, sp8 , sp8 , , , xy01, rgb +VK_FORMAT_R8G8_SRGB , plain, 1, 1, un8 , un8 , , , xy01, srgb +VK_FORMAT_R8G8B8_UNORM , plain, 1, 1, un8 , un8 , un8 , , xyz1, rgb +VK_FORMAT_R8G8B8_SNORM , plain, 1, 1, sn8 , sn8 , sn8 , , xyz1, rgb +VK_FORMAT_R8G8B8_USCALED , plain, 1, 1, us8 , us8 , us8 , , xyz1, rgb +VK_FORMAT_R8G8B8_SSCALED , plain, 1, 1, ss8 , ss8 , ss8 , , xyz1, rgb +VK_FORMAT_R8G8B8_UINT , plain, 1, 1, up8 , up8 , up8 , , xyz1, rgb +VK_FORMAT_R8G8B8_SINT , plain, 1, 1, sp8 , sp8 , sp8 , , xyz1, rgb +VK_FORMAT_R8G8B8_SRGB , plain, 1, 1, un8 , un8 , un8 , , xyz1, srgb +VK_FORMAT_B8G8R8_UNORM , plain, 1, 1, un8 , un8 , un8 , , zyx1, rgb +VK_FORMAT_B8G8R8_SNORM , plain, 1, 1, sn8 , sn8 , sn8 , , zyx1, rgb +VK_FORMAT_B8G8R8_USCALED , plain, 1, 1, us8 , us8 , us8 , , zyx1, rgb +VK_FORMAT_B8G8R8_SSCALED , plain, 1, 1, ss8 , ss8 , ss8 , , zyx1, rgb +VK_FORMAT_B8G8R8_UINT , plain, 1, 1, up8 , up8 , up8 , , zyx1, rgb +VK_FORMAT_B8G8R8_SINT , plain, 1, 1, sp8 , sp8 , sp8 , , zyx1, rgb +VK_FORMAT_B8G8R8_SRGB , plain, 1, 1, un8 , un8 , un8 , , zyx1, srgb +VK_FORMAT_R8G8B8A8_UNORM , plain, 1, 1, un8 , un8 , un8 , un8 , xyzw, rgb +VK_FORMAT_R8G8B8A8_SNORM , plain, 1, 1, sn8 , sn8 , sn8 , sn8 , xyzw, rgb +VK_FORMAT_R8G8B8A8_USCALED , plain, 1, 1, us8 , us8 , us8 , us8 , xyzw, rgb +VK_FORMAT_R8G8B8A8_SSCALED , plain, 1, 1, ss8 , ss8 , ss8 , ss8 , xyzw, rgb +VK_FORMAT_R8G8B8A8_UINT , plain, 1, 1, up8 , up8 , up8 , up8 , xyzw, rgb +VK_FORMAT_R8G8B8A8_SINT , plain, 1, 1, sp8 , sp8 , sp8 , sp8 , xyzw, rgb +VK_FORMAT_R8G8B8A8_SRGB , plain, 1, 1, un8 , un8 , un8 , un8 , xyzw, srgb +VK_FORMAT_B8G8R8A8_UNORM , plain, 1, 1, un8 , un8 , un8 , un8 , zyxw, rgb +VK_FORMAT_B8G8R8A8_SNORM , plain, 1, 1, sn8 , sn8 , sn8 , sn8 , zyxw, rgb +VK_FORMAT_B8G8R8A8_USCALED , plain, 1, 1, us8 , us8 , us8 , us8 , zyxw, rgb +VK_FORMAT_B8G8R8A8_SSCALED , plain, 1, 1, ss8 , ss8 , ss8 , ss8 , zyxw, rgb +VK_FORMAT_B8G8R8A8_UINT , plain, 1, 1, up8 , up8 , up8 , up8 , zyxw, rgb +VK_FORMAT_B8G8R8A8_SINT , plain, 1, 1, sp8 , sp8 , sp8 , sp8 , zyxw, rgb +VK_FORMAT_B8G8R8A8_SRGB , plain, 1, 1, un8 , un8 , un8 , un8 , zyxw, srgb +VK_FORMAT_A8B8G8R8_UNORM_PACK32 , plain, 1, 1, un8 , un8 , un8 , un8 , xyzw, rgb +VK_FORMAT_A8B8G8R8_SNORM_PACK32 , plain, 1, 1, sn8 , sn8 , sn8 , sn8 , xyzw, rgb +VK_FORMAT_A8B8G8R8_USCALED_PACK32 , plain, 1, 1, us8 , us8 , us8 , us8 , xyzw, rgb +VK_FORMAT_A8B8G8R8_SSCALED_PACK32 , plain, 1, 1, ss8 , ss8 , ss8 , ss8 , xyzw, rgb +VK_FORMAT_A8B8G8R8_UINT_PACK32 , plain, 1, 1, up8 , up8 , up8 , up8 , xyzw, rgb +VK_FORMAT_A8B8G8R8_SINT_PACK32 , plain, 1, 1, sp8 , sp8 , sp8 , sp8 , xyzw, rgb +VK_FORMAT_A8B8G8R8_SRGB_PACK32 , plain, 1, 1, un8 , un8 , un8 , un8 , xyzw, srgb +VK_FORMAT_A2R10G10B10_UNORM_PACK32 , plain, 1, 1, un10, un10, un10, un2 , zyxw, rgb +VK_FORMAT_A2R10G10B10_SNORM_PACK32 , plain, 1, 1, sn10, sn10, sn10, sn2 , zyxw, rgb +VK_FORMAT_A2R10G10B10_USCALED_PACK32 , plain, 1, 1, us10, us10, us10, us2 , zyxw, rgb +VK_FORMAT_A2R10G10B10_SSCALED_PACK32 , plain, 1, 1, ss10, ss10, ss10, ss2 , zyxw, rgb +VK_FORMAT_A2R10G10B10_UINT_PACK32 , plain, 1, 1, up10, up10, up10, up2 , zyxw, rgb +VK_FORMAT_A2R10G10B10_SINT_PACK32 , plain, 1, 1, sp10, sp10, sp10, sp2 , zyxw, rgb +VK_FORMAT_A2B10G10R10_UNORM_PACK32 , plain, 1, 1, un10, un10, un10, un2 , xyzw, rgb +VK_FORMAT_A2B10G10R10_SNORM_PACK32 , plain, 1, 1, sn10, sn10, sn10, sn2 , xyzw, rgb +VK_FORMAT_A2B10G10R10_USCALED_PACK32 , plain, 1, 1, us10, us10, us10, us2 , xyzw, rgb +VK_FORMAT_A2B10G10R10_SSCALED_PACK32 , plain, 1, 1, ss10, ss10, ss10, ss2 , xyzw, rgb +VK_FORMAT_A2B10G10R10_UINT_PACK32 , plain, 1, 1, up10, up10, up10, up2 , xyzw, rgb +VK_FORMAT_A2B10G10R10_SINT_PACK32 , plain, 1, 1, sp10, sp10, sp10, sp2 , xyzw, rgb +VK_FORMAT_R16_UNORM , plain, 1, 1, un16, , , , x001, rgb +VK_FORMAT_R16_SNORM , plain, 1, 1, sn16, , , , x001, rgb +VK_FORMAT_R16_USCALED , plain, 1, 1, us16, , , , x001, rgb +VK_FORMAT_R16_SSCALED , plain, 1, 1, ss16, , , , x001, rgb +VK_FORMAT_R16_UINT , plain, 1, 1, up16, , , , x001, rgb +VK_FORMAT_R16_SINT , plain, 1, 1, sp16, , , , x001, rgb +VK_FORMAT_R16_SFLOAT , plain, 1, 1, f16 , , , , x001, rgb +VK_FORMAT_R16G16_UNORM , plain, 1, 1, un16, un16, , , xy01, rgb +VK_FORMAT_R16G16_SNORM , plain, 1, 1, sn16, sn16, , , xy01, rgb +VK_FORMAT_R16G16_USCALED , plain, 1, 1, us16, us16, , , xy01, rgb +VK_FORMAT_R16G16_SSCALED , plain, 1, 1, ss16, ss16, , , xy01, rgb +VK_FORMAT_R16G16_UINT , plain, 1, 1, up16, up16, , , xy01, rgb +VK_FORMAT_R16G16_SINT , plain, 1, 1, sp16, sp16, , , xy01, rgb +VK_FORMAT_R16G16_SFLOAT , plain, 1, 1, f16 , f16 , , , xy01, rgb +VK_FORMAT_R16G16B16_UNORM , plain, 1, 1, un16, un16, un16, , xyz1, rgb +VK_FORMAT_R16G16B16_SNORM , plain, 1, 1, sn16, sn16, sn16, , xyz1, rgb +VK_FORMAT_R16G16B16_USCALED , plain, 1, 1, us16, us16, us16, , xyz1, rgb +VK_FORMAT_R16G16B16_SSCALED , plain, 1, 1, ss16, ss16, ss16, , xyz1, rgb +VK_FORMAT_R16G16B16_UINT , plain, 1, 1, up16, up16, up16, , xyz1, rgb +VK_FORMAT_R16G16B16_SINT , plain, 1, 1, sp16, sp16, sp16, , xyz1, rgb +VK_FORMAT_R16G16B16_SFLOAT , plain, 1, 1, f16 , f16 , f16 , , xyz1, rgb +VK_FORMAT_R16G16B16A16_UNORM , plain, 1, 1, un16, un16, un16, un16, xyzw, rgb +VK_FORMAT_R16G16B16A16_SNORM , plain, 1, 1, sn16, sn16, sn16, sn16, xyzw, rgb +VK_FORMAT_R16G16B16A16_USCALED , plain, 1, 1, us16, us16, us16, us16, xyzw, rgb +VK_FORMAT_R16G16B16A16_SSCALED , plain, 1, 1, ss16, ss16, ss16, ss16, xyzw, rgb +VK_FORMAT_R16G16B16A16_UINT , plain, 1, 1, up16, up16, up16, up16, xyzw, rgb +VK_FORMAT_R16G16B16A16_SINT , plain, 1, 1, sp16, sp16, sp16, sp16, xyzw, rgb +VK_FORMAT_R16G16B16A16_SFLOAT , plain, 1, 1, f16 , f16 , f16 , f16 , xyzw, rgb +VK_FORMAT_R32_UINT , plain, 1, 1, up32, , , , x001, rgb +VK_FORMAT_R32_SINT , plain, 1, 1, sp32, , , , x001, rgb +VK_FORMAT_R32_SFLOAT , plain, 1, 1, f32 , , , , x001, rgb +VK_FORMAT_R32G32_UINT , plain, 1, 1, up32, up32, , , xy01, rgb +VK_FORMAT_R32G32_SINT , plain, 1, 1, sp32, sp32, , , xy01, rgb +VK_FORMAT_R32G32_SFLOAT , plain, 1, 1, f32 , f32 , , , xy01, rgb +VK_FORMAT_R32G32B32_UINT , plain, 1, 1, up32, up32, up32, , xyz1, rgb +VK_FORMAT_R32G32B32_SINT , plain, 1, 1, sp32, sp32, sp32, , xyz1, rgb +VK_FORMAT_R32G32B32_SFLOAT , plain, 1, 1, f32 , f32 , f32 , , xyz1, rgb +VK_FORMAT_R32G32B32A32_UINT , plain, 1, 1, up32, up32, up32, up32, xyzw, rgb +VK_FORMAT_R32G32B32A32_SINT , plain, 1, 1, sp32, sp32, sp32, sp32, xyzw, rgb +VK_FORMAT_R32G32B32A32_SFLOAT , plain, 1, 1, f32 , f32 , f32 , f32 , xyzw, rgb +VK_FORMAT_R64_UINT , plain, 1, 1, up64, , , , x001, rgb +VK_FORMAT_R64_SINT , plain, 1, 1, sp64, , , , x001, rgb +VK_FORMAT_R64_SFLOAT , plain, 1, 1, f64 , , , , x001, rgb +VK_FORMAT_R64G64_UINT , plain, 1, 1, up64, up64, , , xy01, rgb +VK_FORMAT_R64G64_SINT , plain, 1, 1, sp64, sp64, , , xy01, rgb +VK_FORMAT_R64G64_SFLOAT , plain, 1, 1, f64 , f64 , , , xy01, rgb +VK_FORMAT_R64G64B64_UINT , plain, 1, 1, up64, up64, up64, , xyz1, rgb +VK_FORMAT_R64G64B64_SINT , plain, 1, 1, sp64, sp64, sp64, , xyz1, rgb +VK_FORMAT_R64G64B64_SFLOAT , plain, 1, 1, f64 , f64 , f64 , , xyz1, rgb +VK_FORMAT_R64G64B64A64_UINT , plain, 1, 1, up64, up64, up64, up64, xyzw, rgb +VK_FORMAT_R64G64B64A64_SINT , plain, 1, 1, sp64, sp64, sp64, sp64, xyzw, rgb +VK_FORMAT_R64G64B64A64_SFLOAT , plain, 1, 1, f64 , f64 , f64 , f64 , xyzw, rgb +VK_FORMAT_B10G11R11_UFLOAT_PACK32 , other, 1, 1, x32 , , , , xyz1, rgb +VK_FORMAT_E5B9G9R9_UFLOAT_PACK32 , other, 1, 1, x32 , , , , xyz1, rgb +VK_FORMAT_D16_UNORM , plain, 1, 1, un16, , , , x___, zs +VK_FORMAT_X8_D24_UNORM_PACK32 , plain, 1, 1, un24, x8 , , , x___, zs +VK_FORMAT_D32_SFLOAT , plain, 1, 1, f32 , , , , x___, zs +VK_FORMAT_S8_UINT , plain, 1, 1, up8 , , , , _x__, zs +VK_FORMAT_D16_UNORM_S8_UINT , plain, 1, 1, un16, up8 , , , xy__, zs +VK_FORMAT_D24_UNORM_S8_UINT , plain, 1, 1, un24, up8 , , , xy__, zs +VK_FORMAT_D32_SFLOAT_S8_UINT , plain, 1, 1, f32 , up8 , , , xy__, zs +VK_FORMAT_BC1_RGB_UNORM_BLOCK , s3tc, 4, 4, x64 , , , , xyz1, rgb +VK_FORMAT_BC1_RGB_SRGB_BLOCK , s3tc, 4, 4, x64 , , , , xyz1, srgb +VK_FORMAT_BC1_RGBA_UNORM_BLOCK , s3tc, 4, 4, x64 , , , , xyzw, rgb +VK_FORMAT_BC1_RGBA_SRGB_BLOCK , s3tc, 4, 4, x64 , , , , xyzw, srgb +VK_FORMAT_BC2_UNORM_BLOCK , s3tc, 4, 4, x128, , , , xyzw, rgb +VK_FORMAT_BC2_SRGB_BLOCK , s3tc, 4, 4, x128, , , , xyzw, srgb +VK_FORMAT_BC3_UNORM_BLOCK , s3tc, 4, 4, x128, , , , xyzw, rgb +VK_FORMAT_BC3_SRGB_BLOCK , s3tc, 4, 4, x128, , , , xyzw, srgb +VK_FORMAT_BC4_UNORM_BLOCK , rgtc, 4, 4, x64, , , , x001, rgb +VK_FORMAT_BC4_SNORM_BLOCK , rgtc, 4, 4, x64, , , , x001, rgb +VK_FORMAT_BC5_UNORM_BLOCK , rgtc, 4, 4, x128, , , , xy01, rgb +VK_FORMAT_BC5_SNORM_BLOCK , rgtc, 4, 4, x128, , , , xy01, rgb +VK_FORMAT_BC6H_UFLOAT_BLOCK , bptc, 4, 4, x128, , , , xyz1, rgb +VK_FORMAT_BC6H_SFLOAT_BLOCK , bptc, 4, 4, x128, , , , xyz1, rgb +VK_FORMAT_BC7_UNORM_BLOCK , bptc, 4, 4, x128, , , , xyzw, rgb +VK_FORMAT_BC7_SRGB_BLOCK , bptc, 4, 4, x128, , , , xyzw, srgb +VK_FORMAT_ETC2_R8G8B8_UNORM_BLOCK, +VK_FORMAT_ETC2_R8G8B8_SRGB_BLOCK, +VK_FORMAT_ETC2_R8G8B8A1_UNORM_BLOCK, +VK_FORMAT_ETC2_R8G8B8A1_SRGB_BLOCK, +VK_FORMAT_ETC2_R8G8B8A8_UNORM_BLOCK, +VK_FORMAT_ETC2_R8G8B8A8_SRGB_BLOCK, +VK_FORMAT_EAC_R11_UNORM_BLOCK, +VK_FORMAT_EAC_R11_SNORM_BLOCK, +VK_FORMAT_EAC_R11G11_UNORM_BLOCK, +VK_FORMAT_EAC_R11G11_SNORM_BLOCK, +VK_FORMAT_ASTC_4x4_UNORM_BLOCK, +VK_FORMAT_ASTC_4x4_SRGB_BLOCK, +VK_FORMAT_ASTC_5x4_UNORM_BLOCK, +VK_FORMAT_ASTC_5x4_SRGB_BLOCK, +VK_FORMAT_ASTC_5x5_UNORM_BLOCK, +VK_FORMAT_ASTC_5x5_SRGB_BLOCK, +VK_FORMAT_ASTC_6x5_UNORM_BLOCK, +VK_FORMAT_ASTC_6x5_SRGB_BLOCK, +VK_FORMAT_ASTC_6x6_UNORM_BLOCK, +VK_FORMAT_ASTC_6x6_SRGB_BLOCK, +VK_FORMAT_ASTC_8x5_UNORM_BLOCK, +VK_FORMAT_ASTC_8x5_SRGB_BLOCK, +VK_FORMAT_ASTC_8x6_UNORM_BLOCK, +VK_FORMAT_ASTC_8x6_SRGB_BLOCK, +VK_FORMAT_ASTC_8x8_UNORM_BLOCK, +VK_FORMAT_ASTC_8x8_SRGB_BLOCK, +VK_FORMAT_ASTC_10x5_UNORM_BLOCK, +VK_FORMAT_ASTC_10x5_SRGB_BLOCK, +VK_FORMAT_ASTC_10x6_UNORM_BLOCK, +VK_FORMAT_ASTC_10x6_SRGB_BLOCK, +VK_FORMAT_ASTC_10x8_UNORM_BLOCK, +VK_FORMAT_ASTC_10x8_SRGB_BLOCK, +VK_FORMAT_ASTC_10x10_UNORM_BLOCK, +VK_FORMAT_ASTC_10x10_SRGB_BLOCK, +VK_FORMAT_ASTC_12x10_UNORM_BLOCK, +VK_FORMAT_ASTC_12x10_SRGB_BLOCK, +VK_FORMAT_ASTC_12x12_UNORM_BLOCK, +VK_FORMAT_ASTC_12x12_SRGB_BLOCK, diff -Nru mesa-12.0.6/src/amd/vulkan/vk_format_parse.py mesa-17.0.7/src/amd/vulkan/vk_format_parse.py --- mesa-12.0.6/src/amd/vulkan/vk_format_parse.py 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/vk_format_parse.py 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,384 @@ +#!/usr/bin/env python + +''' +/************************************************************************** + * + * Copyright 2009 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ +''' + + +VOID, UNSIGNED, SIGNED, FIXED, FLOAT = range(5) + +SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W, SWIZZLE_0, SWIZZLE_1, SWIZZLE_NONE, = range(7) + +PLAIN = 'plain' +SCALED = 'scaled' + +RGB = 'rgb' +SRGB = 'srgb' +YUV = 'yuv' +ZS = 'zs' + + +def is_pot(x): + return (x & (x - 1)) == 0 + + +VERY_LARGE = 99999999999999999999999 + + +class Channel: + '''Describe the channel of a color channel.''' + + def __init__(self, type, norm, pure, scaled, size, name = ''): + self.type = type + self.norm = norm + self.pure = pure + self.size = size + self.scaled = scaled + self.sign = type in (SIGNED, FIXED, FLOAT) + self.name = name + + def __str__(self): + s = str(self.type) + if self.norm: + s += 'n' + if self.pure: + s += 'p' + if self.scaled: + s += 's' + s += str(self.size) + return s + + def __eq__(self, other): + return self.type == other.type and self.norm == other.norm and self.pure == other.pure and self.size == other.size and self.scaled == other.scaled + + def max(self): + '''Maximum representable number.''' + if self.type == FLOAT: + return VERY_LARGE + if self.type == FIXED: + return (1 << (self.size/2)) - 1 + if self.norm: + return 1 + if self.type == UNSIGNED: + return (1 << self.size) - 1 + if self.type == SIGNED: + return (1 << (self.size - 1)) - 1 + assert False + + def min(self): + '''Minimum representable number.''' + if self.type == FLOAT: + return -VERY_LARGE + if self.type == FIXED: + return -(1 << (self.size/2)) + if self.type == UNSIGNED: + return 0 + if self.norm: + return -1 + if self.type == SIGNED: + return -(1 << (self.size - 1)) + assert False + + +class Format: + '''Describe a pixel format.''' + + def __init__(self, name, layout, block_width, block_height, le_channels, le_swizzles, be_channels, be_swizzles, colorspace): + self.name = name + self.layout = layout + self.block_width = block_width + self.block_height = block_height + self.le_channels = le_channels + self.le_swizzles = le_swizzles + self.be_channels = be_channels + self.be_swizzles = be_swizzles + self.name = name + self.colorspace = colorspace + + def __str__(self): + return self.name + + def short_name(self): + '''Make up a short norm for a format, suitable to be used as suffix in + function names.''' + + name = self.name + if name.startswith('VK_FORMAT_'): + name = name[len('VK_FORMAT_'):] + name = name.lower() + return name + + def block_size(self): + size = 0 + for channel in self.le_channels: + size += channel.size + return size + + def nr_channels(self): + nr_channels = 0 + for channel in self.le_channels: + if channel.size: + nr_channels += 1 + return nr_channels + + def array_element(self): + if self.layout != PLAIN: + return None + ref_channel = self.le_channels[0] + if ref_channel.type == VOID: + ref_channel = self.le_channels[1] + for channel in self.le_channels: + if channel.size and (channel.size != ref_channel.size or channel.size % 8): + return None + if channel.type != VOID: + if channel.type != ref_channel.type: + return None + if channel.norm != ref_channel.norm: + return None + if channel.pure != ref_channel.pure: + return None + if channel.scaled != ref_channel.scaled: + return None + return ref_channel + + def is_array(self): + return self.array_element() != None + + def is_mixed(self): + if self.layout != PLAIN: + return False + ref_channel = self.le_channels[0] + if ref_channel.type == VOID: + ref_channel = self.le_channels[1] + for channel in self.le_channels[1:]: + if channel.type != VOID: + if channel.type != ref_channel.type: + return True + if channel.norm != ref_channel.norm: + return True + if channel.pure != ref_channel.pure: + return True + if channel.scaled != ref_channel.scaled: + return True + return False + + def is_pot(self): + return is_pot(self.block_size()) + + def is_int(self): + if self.layout != PLAIN: + return False + for channel in self.le_channels: + if channel.type not in (VOID, UNSIGNED, SIGNED): + return False + return True + + def is_float(self): + if self.layout != PLAIN: + return False + for channel in self.le_channels: + if channel.type not in (VOID, FLOAT): + return False + return True + + def is_bitmask(self): + if self.layout != PLAIN: + return False + if self.block_size() not in (8, 16, 32): + return False + for channel in self.le_channels: + if channel.type not in (VOID, UNSIGNED, SIGNED): + return False + return True + + def is_pure_color(self): + if self.layout != PLAIN or self.colorspace == ZS: + return False + pures = [channel.pure + for channel in self.le_channels + if channel.type != VOID] + for x in pures: + assert x == pures[0] + return pures[0] + + def channel_type(self): + types = [channel.type + for channel in self.le_channels + if channel.type != VOID] + for x in types: + assert x == types[0] + return types[0] + + def is_pure_signed(self): + return self.is_pure_color() and self.channel_type() == SIGNED + + def is_pure_unsigned(self): + return self.is_pure_color() and self.channel_type() == UNSIGNED + + def has_channel(self, id): + return self.le_swizzles[id] != SWIZZLE_NONE + + def has_depth(self): + return self.colorspace == ZS and self.has_channel(0) + + def has_stencil(self): + return self.colorspace == ZS and self.has_channel(1) + + def stride(self): + return self.block_size()/8 + + +_type_parse_map = { + '': VOID, + 'x': VOID, + 'u': UNSIGNED, + 's': SIGNED, + 'h': FIXED, + 'f': FLOAT, +} + +_swizzle_parse_map = { + 'x': SWIZZLE_X, + 'y': SWIZZLE_Y, + 'z': SWIZZLE_Z, + 'w': SWIZZLE_W, + '0': SWIZZLE_0, + '1': SWIZZLE_1, + '_': SWIZZLE_NONE, +} + +def _parse_channels(fields, layout, colorspace, swizzles): + if layout == PLAIN: + names = ['']*4 + if colorspace in (RGB, SRGB): + for i in range(4): + swizzle = swizzles[i] + if swizzle < 4: + names[swizzle] += 'rgba'[i] + elif colorspace == ZS: + for i in range(4): + swizzle = swizzles[i] + if swizzle < 4: + names[swizzle] += 'zs'[i] + else: + assert False + for i in range(4): + if names[i] == '': + names[i] = 'x' + else: + names = ['x', 'y', 'z', 'w'] + + channels = [] + for i in range(0, 4): + field = fields[i] + if field: + type = _type_parse_map[field[0]] + if field[1] == 'n': + norm = True + pure = False + scaled = False + size = int(field[2:]) + elif field[1] == 'p': + pure = True + norm = False + scaled = False + size = int(field[2:]) + elif field[1] == 's': + pure = False + norm = False + scaled = True + size = int(field[2:]) + else: + norm = False + pure = False + scaled = False + size = int(field[1:]) + else: + type = VOID + norm = False + pure = False + scaled = False + size = 0 + channel = Channel(type, norm, pure, scaled, size, names[i]) + channels.append(channel) + + return channels + +def parse(filename): + '''Parse the format description in CSV format in terms of the + Channel and Format classes above.''' + + stream = open(filename) + formats = [] + for line in stream: + try: + comment = line.index('#') + except ValueError: + pass + else: + line = line[:comment] + line = line.strip() + if not line: + continue + + fields = [field.strip() for field in line.split(',')] + if len (fields) < 10: + continue + if len (fields) == 10: + fields += fields[4:9] + assert len (fields) == 15 + + name = fields[0] + layout = fields[1] + block_width, block_height = map(int, fields[2:4]) + colorspace = fields[9] + + le_swizzles = [_swizzle_parse_map[swizzle] for swizzle in fields[8]] + le_channels = _parse_channels(fields[4:8], layout, colorspace, le_swizzles) + + be_swizzles = [_swizzle_parse_map[swizzle] for swizzle in fields[14]] + be_channels = _parse_channels(fields[10:14], layout, colorspace, be_swizzles) + + le_shift = 0 + for channel in le_channels: + channel.shift = le_shift + le_shift += channel.size + + be_shift = 0 + for channel in be_channels[3::-1]: + channel.shift = be_shift + be_shift += channel.size + + assert le_shift == be_shift + for i in range(4): + assert (le_swizzles[i] != SWIZZLE_NONE) == (be_swizzles[i] != SWIZZLE_NONE) + + format = Format(name, layout, block_width, block_height, le_channels, le_swizzles, be_channels, be_swizzles, colorspace) + formats.append(format) + return formats + diff -Nru mesa-12.0.6/src/amd/vulkan/vk_format_table.c mesa-17.0.7/src/amd/vulkan/vk_format_table.c --- mesa-12.0.6/src/amd/vulkan/vk_format_table.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/vk_format_table.c 2017-06-01 10:38:06.000000000 +0000 @@ -0,0 +1,6051 @@ +/* This file is autogenerated by u_format_table.py from u_format.csv. Do not edit directly. */ + +/************************************************************************** + * + * Copyright 2010 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#include "stdbool.h" +#include "vk_format.h" + +const struct vk_format_description +vk_format_undefined_description = { + VK_FORMAT_UNDEFINED, + "VK_FORMAT_UNDEFINED", + "undefined", + {1, 1, 8}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 1, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_UNSIGNED, false, false, false, 8, 0}, /* x = r */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_0, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r4g4_unorm_pack8_description = { + VK_FORMAT_R4G4_UNORM_PACK8, + "VK_FORMAT_R4G4_UNORM_PACK8", + "r4g4_unorm_pack8", + {1, 1, 8}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 2, /* nr_channels */ + false, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 4, 4}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 4, 0}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 4, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 4, 4}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r4g4b4a4_unorm_pack16_description = { + VK_FORMAT_R4G4B4A4_UNORM_PACK16, + "VK_FORMAT_R4G4B4A4_UNORM_PACK16", + "r4g4b4a4_unorm_pack16", + {1, 1, 16}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + false, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 4, 12}, /* x = a */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 4, 8}, /* y = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 4, 4}, /* z = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 4, 0} /* w = r */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 4, 0}, /* x = a */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 4, 4}, /* y = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 4, 8}, /* z = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 4, 12} /* w = r */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_W, /* r */ + VK_SWIZZLE_Z, /* g */ + VK_SWIZZLE_Y, /* b */ + VK_SWIZZLE_X /* a */ + }, +#else + { + VK_SWIZZLE_W, /* r */ + VK_SWIZZLE_Z, /* g */ + VK_SWIZZLE_Y, /* b */ + VK_SWIZZLE_X /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_b4g4r4a4_unorm_pack16_description = { + VK_FORMAT_B4G4R4A4_UNORM_PACK16, + "VK_FORMAT_B4G4R4A4_UNORM_PACK16", + "b4g4r4a4_unorm_pack16", + {1, 1, 16}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + false, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 4, 12}, /* x = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 4, 8}, /* y = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 4, 4}, /* z = a */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 4, 0} /* w = r */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 4, 0}, /* x = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 4, 4}, /* y = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 4, 8}, /* z = a */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 4, 12} /* w = r */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_W, /* r */ + VK_SWIZZLE_X, /* g */ + VK_SWIZZLE_Y, /* b */ + VK_SWIZZLE_Z /* a */ + }, +#else + { + VK_SWIZZLE_W, /* r */ + VK_SWIZZLE_X, /* g */ + VK_SWIZZLE_Y, /* b */ + VK_SWIZZLE_Z /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r5g6b5_unorm_pack16_description = { + VK_FORMAT_R5G6B5_UNORM_PACK16, + "VK_FORMAT_R5G6B5_UNORM_PACK16", + "r5g6b5_unorm_pack16", + {1, 1, 16}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + false, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 5, 11}, /* x = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 6, 5}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 5, 0}, /* z = r */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 5, 0}, /* x = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 6, 5}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 5, 11}, /* z = r */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_b5g6r5_unorm_pack16_description = { + VK_FORMAT_B5G6R5_UNORM_PACK16, + "VK_FORMAT_B5G6R5_UNORM_PACK16", + "b5g6r5_unorm_pack16", + {1, 1, 16}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + false, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 5, 11}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 6, 5}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 5, 0}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 5, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 6, 5}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 5, 11}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r5g5b5a1_unorm_pack16_description = { + VK_FORMAT_R5G5B5A1_UNORM_PACK16, + "VK_FORMAT_R5G5B5A1_UNORM_PACK16", + "r5g5b5a1_unorm_pack16", + {1, 1, 16}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + false, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 1, 15}, /* x = a */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 5, 10}, /* y = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 5, 5}, /* z = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 5, 0} /* w = r */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 1, 0}, /* x = a */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 5, 1}, /* y = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 5, 6}, /* z = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 5, 11} /* w = r */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_W, /* r */ + VK_SWIZZLE_Z, /* g */ + VK_SWIZZLE_Y, /* b */ + VK_SWIZZLE_X /* a */ + }, +#else + { + VK_SWIZZLE_W, /* r */ + VK_SWIZZLE_Z, /* g */ + VK_SWIZZLE_Y, /* b */ + VK_SWIZZLE_X /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_b5g5r5a1_unorm_pack16_description = { + VK_FORMAT_B5G5R5A1_UNORM_PACK16, + "VK_FORMAT_B5G5R5A1_UNORM_PACK16", + "b5g5r5a1_unorm_pack16", + {1, 1, 16}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + false, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 1, 15}, /* x = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 5, 10}, /* y = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 5, 5}, /* z = a */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 5, 0} /* w = r */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 1, 0}, /* x = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 5, 1}, /* y = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 5, 6}, /* z = a */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 5, 11} /* w = r */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_W, /* r */ + VK_SWIZZLE_X, /* g */ + VK_SWIZZLE_Y, /* b */ + VK_SWIZZLE_Z /* a */ + }, +#else + { + VK_SWIZZLE_W, /* r */ + VK_SWIZZLE_X, /* g */ + VK_SWIZZLE_Y, /* b */ + VK_SWIZZLE_Z /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_a1r5g5b5_unorm_pack16_description = { + VK_FORMAT_A1R5G5B5_UNORM_PACK16, + "VK_FORMAT_A1R5G5B5_UNORM_PACK16", + "a1r5g5b5_unorm_pack16", + {1, 1, 16}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + false, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 5, 11}, /* x = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 5, 6}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 5, 1}, /* z = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 1, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 5, 0}, /* x = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 5, 5}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 5, 10}, /* z = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 1, 15} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r8_unorm_description = { + VK_FORMAT_R8_UNORM, + "VK_FORMAT_R8_UNORM", + "r8_unorm", + {1, 1, 8}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 1, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 0}, /* x = r */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_0, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r8_snorm_description = { + VK_FORMAT_R8_SNORM, + "VK_FORMAT_R8_SNORM", + "r8_snorm", + {1, 1, 8}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 1, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 0}, /* x = r */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_0, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r8_uscaled_description = { + VK_FORMAT_R8_USCALED, + "VK_FORMAT_R8_USCALED", + "r8_uscaled", + {1, 1, 8}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 1, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 0}, /* x = r */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_0, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r8_sscaled_description = { + VK_FORMAT_R8_SSCALED, + "VK_FORMAT_R8_SSCALED", + "r8_sscaled", + {1, 1, 8}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 1, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 0}, /* x = r */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_0, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r8_uint_description = { + VK_FORMAT_R8_UINT, + "VK_FORMAT_R8_UINT", + "r8_uint", + {1, 1, 8}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 1, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 0}, /* x = r */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_0, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r8_sint_description = { + VK_FORMAT_R8_SINT, + "VK_FORMAT_R8_SINT", + "r8_sint", + {1, 1, 8}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 1, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 0}, /* x = r */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_0, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r8_srgb_description = { + VK_FORMAT_R8_SRGB, + "VK_FORMAT_R8_SRGB", + "r8_srgb", + {1, 1, 8}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 1, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 0}, /* x = r */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* sr */ + VK_SWIZZLE_0, /* sg */ + VK_SWIZZLE_0, /* sb */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_SRGB, +}; + +const struct vk_format_description +vk_format_r8g8_unorm_description = { + VK_FORMAT_R8G8_UNORM, + "VK_FORMAT_R8G8_UNORM", + "r8g8_unorm", + {1, 1, 16}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 2, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 8}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 0}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 8}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r8g8_snorm_description = { + VK_FORMAT_R8G8_SNORM, + "VK_FORMAT_R8G8_SNORM", + "r8g8_snorm", + {1, 1, 16}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 2, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 8}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 0}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 8}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r8g8_uscaled_description = { + VK_FORMAT_R8G8_USCALED, + "VK_FORMAT_R8G8_USCALED", + "r8g8_uscaled", + {1, 1, 16}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 2, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 8}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 0}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 8}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r8g8_sscaled_description = { + VK_FORMAT_R8G8_SSCALED, + "VK_FORMAT_R8G8_SSCALED", + "r8g8_sscaled", + {1, 1, 16}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 2, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 8}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 0}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 8}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r8g8_uint_description = { + VK_FORMAT_R8G8_UINT, + "VK_FORMAT_R8G8_UINT", + "r8g8_uint", + {1, 1, 16}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 2, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 8}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 0}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 8}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r8g8_sint_description = { + VK_FORMAT_R8G8_SINT, + "VK_FORMAT_R8G8_SINT", + "r8g8_sint", + {1, 1, 16}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 2, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 8}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 0}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 8}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r8g8_srgb_description = { + VK_FORMAT_R8G8_SRGB, + "VK_FORMAT_R8G8_SRGB", + "r8g8_srgb", + {1, 1, 16}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 2, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 8}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 0}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 8}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* sr */ + VK_SWIZZLE_Y, /* sg */ + VK_SWIZZLE_0, /* sb */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* sr */ + VK_SWIZZLE_Y, /* sg */ + VK_SWIZZLE_0, /* sb */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_SRGB, +}; + +const struct vk_format_description +vk_format_r8g8b8_unorm_description = { + VK_FORMAT_R8G8B8_UNORM, + "VK_FORMAT_R8G8B8_UNORM", + "r8g8b8_unorm", + {1, 1, 24}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 16}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 0}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 16}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r8g8b8_snorm_description = { + VK_FORMAT_R8G8B8_SNORM, + "VK_FORMAT_R8G8B8_SNORM", + "r8g8b8_snorm", + {1, 1, 24}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 16}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 0}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 16}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r8g8b8_uscaled_description = { + VK_FORMAT_R8G8B8_USCALED, + "VK_FORMAT_R8G8B8_USCALED", + "r8g8b8_uscaled", + {1, 1, 24}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 16}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 0}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 16}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r8g8b8_sscaled_description = { + VK_FORMAT_R8G8B8_SSCALED, + "VK_FORMAT_R8G8B8_SSCALED", + "r8g8b8_sscaled", + {1, 1, 24}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 16}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 0}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 16}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r8g8b8_uint_description = { + VK_FORMAT_R8G8B8_UINT, + "VK_FORMAT_R8G8B8_UINT", + "r8g8b8_uint", + {1, 1, 24}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 16}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 0}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 16}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r8g8b8_sint_description = { + VK_FORMAT_R8G8B8_SINT, + "VK_FORMAT_R8G8B8_SINT", + "r8g8b8_sint", + {1, 1, 24}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 16}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 0}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 16}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r8g8b8_srgb_description = { + VK_FORMAT_R8G8B8_SRGB, + "VK_FORMAT_R8G8B8_SRGB", + "r8g8b8_srgb", + {1, 1, 24}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 16}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 0}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 16}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* sr */ + VK_SWIZZLE_Y, /* sg */ + VK_SWIZZLE_Z, /* sb */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* sr */ + VK_SWIZZLE_Y, /* sg */ + VK_SWIZZLE_Z, /* sb */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_SRGB, +}; + +const struct vk_format_description +vk_format_b8g8r8_unorm_description = { + VK_FORMAT_B8G8R8_UNORM, + "VK_FORMAT_B8G8R8_UNORM", + "b8g8r8_unorm", + {1, 1, 24}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 16}, /* x = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 0}, /* z = r */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 0}, /* x = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 16}, /* z = r */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_b8g8r8_snorm_description = { + VK_FORMAT_B8G8R8_SNORM, + "VK_FORMAT_B8G8R8_SNORM", + "b8g8r8_snorm", + {1, 1, 24}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 16}, /* x = b */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 0}, /* z = r */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 0}, /* x = b */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 16}, /* z = r */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_b8g8r8_uscaled_description = { + VK_FORMAT_B8G8R8_USCALED, + "VK_FORMAT_B8G8R8_USCALED", + "b8g8r8_uscaled", + {1, 1, 24}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 16}, /* x = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 0}, /* z = r */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 0}, /* x = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 16}, /* z = r */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_b8g8r8_sscaled_description = { + VK_FORMAT_B8G8R8_SSCALED, + "VK_FORMAT_B8G8R8_SSCALED", + "b8g8r8_sscaled", + {1, 1, 24}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 16}, /* x = b */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 0}, /* z = r */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 0}, /* x = b */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 16}, /* z = r */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_b8g8r8_uint_description = { + VK_FORMAT_B8G8R8_UINT, + "VK_FORMAT_B8G8R8_UINT", + "b8g8r8_uint", + {1, 1, 24}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 16}, /* x = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 0}, /* z = r */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 0}, /* x = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 16}, /* z = r */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_b8g8r8_sint_description = { + VK_FORMAT_B8G8R8_SINT, + "VK_FORMAT_B8G8R8_SINT", + "b8g8r8_sint", + {1, 1, 24}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 16}, /* x = b */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 0}, /* z = r */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 0}, /* x = b */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 16}, /* z = r */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_b8g8r8_srgb_description = { + VK_FORMAT_B8G8R8_SRGB, + "VK_FORMAT_B8G8R8_SRGB", + "b8g8r8_srgb", + {1, 1, 24}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 16}, /* x = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 0}, /* z = r */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 0}, /* x = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 16}, /* z = r */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_Z, /* sr */ + VK_SWIZZLE_Y, /* sg */ + VK_SWIZZLE_X, /* sb */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_Z, /* sr */ + VK_SWIZZLE_Y, /* sg */ + VK_SWIZZLE_X, /* sb */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_SRGB, +}; + +const struct vk_format_description +vk_format_r8g8b8a8_unorm_description = { + VK_FORMAT_R8G8B8A8_UNORM, + "VK_FORMAT_R8G8B8A8_UNORM", + "r8g8b8a8_unorm", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 24}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 16}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 8}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 16}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 24} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r8g8b8a8_snorm_description = { + VK_FORMAT_R8G8B8A8_SNORM, + "VK_FORMAT_R8G8B8A8_SNORM", + "r8g8b8a8_snorm", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 24}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 16}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 8}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 16}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 24} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r8g8b8a8_uscaled_description = { + VK_FORMAT_R8G8B8A8_USCALED, + "VK_FORMAT_R8G8B8A8_USCALED", + "r8g8b8a8_uscaled", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 24}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 16}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 8}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 16}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 24} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r8g8b8a8_sscaled_description = { + VK_FORMAT_R8G8B8A8_SSCALED, + "VK_FORMAT_R8G8B8A8_SSCALED", + "r8g8b8a8_sscaled", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 24}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 16}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 8}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 16}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 24} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r8g8b8a8_uint_description = { + VK_FORMAT_R8G8B8A8_UINT, + "VK_FORMAT_R8G8B8A8_UINT", + "r8g8b8a8_uint", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 24}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 16}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 8}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 16}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 24} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r8g8b8a8_sint_description = { + VK_FORMAT_R8G8B8A8_SINT, + "VK_FORMAT_R8G8B8A8_SINT", + "r8g8b8a8_sint", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 24}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 16}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 8}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 16}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 24} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r8g8b8a8_srgb_description = { + VK_FORMAT_R8G8B8A8_SRGB, + "VK_FORMAT_R8G8B8A8_SRGB", + "r8g8b8a8_srgb", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 24}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 16}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 8}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 16}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 24} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* sr */ + VK_SWIZZLE_Y, /* sg */ + VK_SWIZZLE_Z, /* sb */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* sr */ + VK_SWIZZLE_Y, /* sg */ + VK_SWIZZLE_Z, /* sb */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_SRGB, +}; + +const struct vk_format_description +vk_format_b8g8r8a8_unorm_description = { + VK_FORMAT_B8G8R8A8_UNORM, + "VK_FORMAT_B8G8R8A8_UNORM", + "b8g8r8a8_unorm", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 24}, /* x = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 16}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 8}, /* z = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 0}, /* x = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 16}, /* z = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 24} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_b8g8r8a8_snorm_description = { + VK_FORMAT_B8G8R8A8_SNORM, + "VK_FORMAT_B8G8R8A8_SNORM", + "b8g8r8a8_snorm", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 24}, /* x = b */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 16}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 8}, /* z = r */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 0}, /* x = b */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 16}, /* z = r */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 24} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_b8g8r8a8_uscaled_description = { + VK_FORMAT_B8G8R8A8_USCALED, + "VK_FORMAT_B8G8R8A8_USCALED", + "b8g8r8a8_uscaled", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 24}, /* x = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 16}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 8}, /* z = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 0}, /* x = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 16}, /* z = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 24} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_b8g8r8a8_sscaled_description = { + VK_FORMAT_B8G8R8A8_SSCALED, + "VK_FORMAT_B8G8R8A8_SSCALED", + "b8g8r8a8_sscaled", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 24}, /* x = b */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 16}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 8}, /* z = r */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 0}, /* x = b */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 16}, /* z = r */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 24} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_b8g8r8a8_uint_description = { + VK_FORMAT_B8G8R8A8_UINT, + "VK_FORMAT_B8G8R8A8_UINT", + "b8g8r8a8_uint", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 24}, /* x = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 16}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 8}, /* z = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 0}, /* x = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 16}, /* z = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 24} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_b8g8r8a8_sint_description = { + VK_FORMAT_B8G8R8A8_SINT, + "VK_FORMAT_B8G8R8A8_SINT", + "b8g8r8a8_sint", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 24}, /* x = b */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 16}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 8}, /* z = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 0}, /* x = b */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 16}, /* z = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 24} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_b8g8r8a8_srgb_description = { + VK_FORMAT_B8G8R8A8_SRGB, + "VK_FORMAT_B8G8R8A8_SRGB", + "b8g8r8a8_srgb", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 24}, /* x = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 16}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 8}, /* z = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 0}, /* x = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 16}, /* z = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 24} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_Z, /* sr */ + VK_SWIZZLE_Y, /* sg */ + VK_SWIZZLE_X, /* sb */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_Z, /* sr */ + VK_SWIZZLE_Y, /* sg */ + VK_SWIZZLE_X, /* sb */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_SRGB, +}; + +const struct vk_format_description +vk_format_a8b8g8r8_unorm_pack32_description = { + VK_FORMAT_A8B8G8R8_UNORM_PACK32, + "VK_FORMAT_A8B8G8R8_UNORM_PACK32", + "a8b8g8r8_unorm_pack32", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 24}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 16}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 8}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 16}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 24} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_a8b8g8r8_snorm_pack32_description = { + VK_FORMAT_A8B8G8R8_SNORM_PACK32, + "VK_FORMAT_A8B8G8R8_SNORM_PACK32", + "a8b8g8r8_snorm_pack32", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 24}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 16}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 8}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 16}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 8, 24} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_a8b8g8r8_uscaled_pack32_description = { + VK_FORMAT_A8B8G8R8_USCALED_PACK32, + "VK_FORMAT_A8B8G8R8_USCALED_PACK32", + "a8b8g8r8_uscaled_pack32", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 24}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 16}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 8}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 16}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 8, 24} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_a8b8g8r8_sscaled_pack32_description = { + VK_FORMAT_A8B8G8R8_SSCALED_PACK32, + "VK_FORMAT_A8B8G8R8_SSCALED_PACK32", + "a8b8g8r8_sscaled_pack32", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 24}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 16}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 8}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 16}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 8, 24} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_a8b8g8r8_uint_pack32_description = { + VK_FORMAT_A8B8G8R8_UINT_PACK32, + "VK_FORMAT_A8B8G8R8_UINT_PACK32", + "a8b8g8r8_uint_pack32", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 24}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 16}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 8}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 16}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 24} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_a8b8g8r8_sint_pack32_description = { + VK_FORMAT_A8B8G8R8_SINT_PACK32, + "VK_FORMAT_A8B8G8R8_SINT_PACK32", + "a8b8g8r8_sint_pack32", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 24}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 16}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 8}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 16}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 8, 24} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_a8b8g8r8_srgb_pack32_description = { + VK_FORMAT_A8B8G8R8_SRGB_PACK32, + "VK_FORMAT_A8B8G8R8_SRGB_PACK32", + "a8b8g8r8_srgb_pack32", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 24}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 16}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 8}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 8}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 16}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 8, 24} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* sr */ + VK_SWIZZLE_Y, /* sg */ + VK_SWIZZLE_Z, /* sb */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* sr */ + VK_SWIZZLE_Y, /* sg */ + VK_SWIZZLE_Z, /* sb */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_SRGB, +}; + +const struct vk_format_description +vk_format_a2r10g10b10_unorm_pack32_description = { + VK_FORMAT_A2R10G10B10_UNORM_PACK32, + "VK_FORMAT_A2R10G10B10_UNORM_PACK32", + "a2r10g10b10_unorm_pack32", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + false, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 10, 22}, /* x = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 10, 12}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 10, 2}, /* z = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 2, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 10, 0}, /* x = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 10, 10}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 10, 20}, /* z = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 2, 30} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_a2r10g10b10_snorm_pack32_description = { + VK_FORMAT_A2R10G10B10_SNORM_PACK32, + "VK_FORMAT_A2R10G10B10_SNORM_PACK32", + "a2r10g10b10_snorm_pack32", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + false, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, true, false, false, 10, 22}, /* x = b */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 10, 12}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 10, 2}, /* z = r */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 2, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, true, false, false, 10, 0}, /* x = b */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 10, 10}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 10, 20}, /* z = r */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 2, 30} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_a2r10g10b10_uscaled_pack32_description = { + VK_FORMAT_A2R10G10B10_USCALED_PACK32, + "VK_FORMAT_A2R10G10B10_USCALED_PACK32", + "a2r10g10b10_uscaled_pack32", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + false, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 10, 22}, /* x = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 10, 12}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 10, 2}, /* z = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 2, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 10, 0}, /* x = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 10, 10}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 10, 20}, /* z = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 2, 30} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_a2r10g10b10_sscaled_pack32_description = { + VK_FORMAT_A2R10G10B10_SSCALED_PACK32, + "VK_FORMAT_A2R10G10B10_SSCALED_PACK32", + "a2r10g10b10_sscaled_pack32", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + false, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, false, true, 10, 22}, /* x = b */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 10, 12}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 10, 2}, /* z = r */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 2, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, false, true, 10, 0}, /* x = b */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 10, 10}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 10, 20}, /* z = r */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 2, 30} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_a2r10g10b10_uint_pack32_description = { + VK_FORMAT_A2R10G10B10_UINT_PACK32, + "VK_FORMAT_A2R10G10B10_UINT_PACK32", + "a2r10g10b10_uint_pack32", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + false, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 10, 22}, /* x = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 10, 12}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 10, 2}, /* z = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 2, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 10, 0}, /* x = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 10, 10}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 10, 20}, /* z = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 2, 30} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_a2r10g10b10_sint_pack32_description = { + VK_FORMAT_A2R10G10B10_SINT_PACK32, + "VK_FORMAT_A2R10G10B10_SINT_PACK32", + "a2r10g10b10_sint_pack32", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + false, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 10, 22}, /* x = b */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 10, 12}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 10, 2}, /* z = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 2, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 10, 0}, /* x = b */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 10, 10}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 10, 20}, /* z = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 2, 30} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_Z, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_X, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_a2b10g10r10_unorm_pack32_description = { + VK_FORMAT_A2B10G10R10_UNORM_PACK32, + "VK_FORMAT_A2B10G10R10_UNORM_PACK32", + "a2b10g10r10_unorm_pack32", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + false, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 10, 22}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 10, 12}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 10, 2}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 2, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 10, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 10, 10}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 10, 20}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 2, 30} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_a2b10g10r10_snorm_pack32_description = { + VK_FORMAT_A2B10G10R10_SNORM_PACK32, + "VK_FORMAT_A2B10G10R10_SNORM_PACK32", + "a2b10g10r10_snorm_pack32", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + false, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, true, false, false, 10, 22}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 10, 12}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 10, 2}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 2, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, true, false, false, 10, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 10, 10}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 10, 20}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 2, 30} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_a2b10g10r10_uscaled_pack32_description = { + VK_FORMAT_A2B10G10R10_USCALED_PACK32, + "VK_FORMAT_A2B10G10R10_USCALED_PACK32", + "a2b10g10r10_uscaled_pack32", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + false, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 10, 22}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 10, 12}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 10, 2}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 2, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 10, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 10, 10}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 10, 20}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 2, 30} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_a2b10g10r10_sscaled_pack32_description = { + VK_FORMAT_A2B10G10R10_SSCALED_PACK32, + "VK_FORMAT_A2B10G10R10_SSCALED_PACK32", + "a2b10g10r10_sscaled_pack32", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + false, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, false, true, 10, 22}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 10, 12}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 10, 2}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 2, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, false, true, 10, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 10, 10}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 10, 20}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 2, 30} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_a2b10g10r10_uint_pack32_description = { + VK_FORMAT_A2B10G10R10_UINT_PACK32, + "VK_FORMAT_A2B10G10R10_UINT_PACK32", + "a2b10g10r10_uint_pack32", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + false, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 10, 22}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 10, 12}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 10, 2}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 2, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 10, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 10, 10}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 10, 20}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 2, 30} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_a2b10g10r10_sint_pack32_description = { + VK_FORMAT_A2B10G10R10_SINT_PACK32, + "VK_FORMAT_A2B10G10R10_SINT_PACK32", + "a2b10g10r10_sint_pack32", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + false, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 10, 22}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 10, 12}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 10, 2}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 2, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 10, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 10, 10}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 10, 20}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 2, 30} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16_unorm_description = { + VK_FORMAT_R16_UNORM, + "VK_FORMAT_R16_UNORM", + "r16_unorm", + {1, 1, 16}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 1, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 16, 0}, /* x = r */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_0, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16_snorm_description = { + VK_FORMAT_R16_SNORM, + "VK_FORMAT_R16_SNORM", + "r16_snorm", + {1, 1, 16}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 1, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_SIGNED, true, false, false, 16, 0}, /* x = r */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_0, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16_uscaled_description = { + VK_FORMAT_R16_USCALED, + "VK_FORMAT_R16_USCALED", + "r16_uscaled", + {1, 1, 16}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 1, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 16, 0}, /* x = r */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_0, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16_sscaled_description = { + VK_FORMAT_R16_SSCALED, + "VK_FORMAT_R16_SSCALED", + "r16_sscaled", + {1, 1, 16}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 1, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_SIGNED, false, false, true, 16, 0}, /* x = r */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_0, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16_uint_description = { + VK_FORMAT_R16_UINT, + "VK_FORMAT_R16_UINT", + "r16_uint", + {1, 1, 16}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 1, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 16, 0}, /* x = r */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_0, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16_sint_description = { + VK_FORMAT_R16_SINT, + "VK_FORMAT_R16_SINT", + "r16_sint", + {1, 1, 16}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 1, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 16, 0}, /* x = r */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_0, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16_sfloat_description = { + VK_FORMAT_R16_SFLOAT, + "VK_FORMAT_R16_SFLOAT", + "r16_sfloat", + {1, 1, 16}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 1, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_FLOAT, false, false, false, 16, 0}, /* x = r */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_0, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16g16_unorm_description = { + VK_FORMAT_R16G16_UNORM, + "VK_FORMAT_R16G16_UNORM", + "r16g16_unorm", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 2, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 16, 16}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 16, 0}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 16, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 16, 16}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16g16_snorm_description = { + VK_FORMAT_R16G16_SNORM, + "VK_FORMAT_R16G16_SNORM", + "r16g16_snorm", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 2, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, true, false, false, 16, 16}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 16, 0}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, true, false, false, 16, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 16, 16}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16g16_uscaled_description = { + VK_FORMAT_R16G16_USCALED, + "VK_FORMAT_R16G16_USCALED", + "r16g16_uscaled", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 2, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 16, 16}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 16, 0}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 16, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 16, 16}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16g16_sscaled_description = { + VK_FORMAT_R16G16_SSCALED, + "VK_FORMAT_R16G16_SSCALED", + "r16g16_sscaled", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 2, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, false, true, 16, 16}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 16, 0}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, false, true, 16, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 16, 16}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16g16_uint_description = { + VK_FORMAT_R16G16_UINT, + "VK_FORMAT_R16G16_UINT", + "r16g16_uint", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 2, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 16, 16}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 16, 0}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 16, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 16, 16}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16g16_sint_description = { + VK_FORMAT_R16G16_SINT, + "VK_FORMAT_R16G16_SINT", + "r16g16_sint", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 2, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 16, 16}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 16, 0}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 16, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 16, 16}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16g16_sfloat_description = { + VK_FORMAT_R16G16_SFLOAT, + "VK_FORMAT_R16G16_SFLOAT", + "r16g16_sfloat", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 2, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_FLOAT, false, false, false, 16, 16}, /* x = r */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 16, 0}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_FLOAT, false, false, false, 16, 0}, /* x = r */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 16, 16}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16g16b16_unorm_description = { + VK_FORMAT_R16G16B16_UNORM, + "VK_FORMAT_R16G16B16_UNORM", + "r16g16b16_unorm", + {1, 1, 48}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 16, 32}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 16, 16}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 16, 0}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 16, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 16, 16}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 16, 32}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16g16b16_snorm_description = { + VK_FORMAT_R16G16B16_SNORM, + "VK_FORMAT_R16G16B16_SNORM", + "r16g16b16_snorm", + {1, 1, 48}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, true, false, false, 16, 32}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 16, 16}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 16, 0}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, true, false, false, 16, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 16, 16}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 16, 32}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16g16b16_uscaled_description = { + VK_FORMAT_R16G16B16_USCALED, + "VK_FORMAT_R16G16B16_USCALED", + "r16g16b16_uscaled", + {1, 1, 48}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 16, 32}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 16, 16}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 16, 0}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 16, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 16, 16}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 16, 32}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16g16b16_sscaled_description = { + VK_FORMAT_R16G16B16_SSCALED, + "VK_FORMAT_R16G16B16_SSCALED", + "r16g16b16_sscaled", + {1, 1, 48}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, false, true, 16, 32}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 16, 16}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 16, 0}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, false, true, 16, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 16, 16}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 16, 32}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16g16b16_uint_description = { + VK_FORMAT_R16G16B16_UINT, + "VK_FORMAT_R16G16B16_UINT", + "r16g16b16_uint", + {1, 1, 48}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 16, 32}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 16, 16}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 16, 0}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 16, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 16, 16}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 16, 32}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16g16b16_sint_description = { + VK_FORMAT_R16G16B16_SINT, + "VK_FORMAT_R16G16B16_SINT", + "r16g16b16_sint", + {1, 1, 48}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 16, 32}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 16, 16}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 16, 0}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 16, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 16, 16}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 16, 32}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16g16b16_sfloat_description = { + VK_FORMAT_R16G16B16_SFLOAT, + "VK_FORMAT_R16G16B16_SFLOAT", + "r16g16b16_sfloat", + {1, 1, 48}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_FLOAT, false, false, false, 16, 32}, /* x = r */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 16, 16}, /* y = g */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 16, 0}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_FLOAT, false, false, false, 16, 0}, /* x = r */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 16, 16}, /* y = g */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 16, 32}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16g16b16a16_unorm_description = { + VK_FORMAT_R16G16B16A16_UNORM, + "VK_FORMAT_R16G16B16A16_UNORM", + "r16g16b16a16_unorm", + {1, 1, 64}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 16, 48}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 16, 32}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 16, 16}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 16, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 16, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 16, 16}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 16, 32}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 16, 48} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16g16b16a16_snorm_description = { + VK_FORMAT_R16G16B16A16_SNORM, + "VK_FORMAT_R16G16B16A16_SNORM", + "r16g16b16a16_snorm", + {1, 1, 64}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, true, false, false, 16, 48}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 16, 32}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 16, 16}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 16, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, true, false, false, 16, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 16, 16}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 16, 32}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, true, false, false, 16, 48} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16g16b16a16_uscaled_description = { + VK_FORMAT_R16G16B16A16_USCALED, + "VK_FORMAT_R16G16B16A16_USCALED", + "r16g16b16a16_uscaled", + {1, 1, 64}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 16, 48}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 16, 32}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 16, 16}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 16, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 16, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 16, 16}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 16, 32}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, false, true, 16, 48} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16g16b16a16_sscaled_description = { + VK_FORMAT_R16G16B16A16_SSCALED, + "VK_FORMAT_R16G16B16A16_SSCALED", + "r16g16b16a16_sscaled", + {1, 1, 64}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, false, true, 16, 48}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 16, 32}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 16, 16}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 16, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, false, true, 16, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 16, 16}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 16, 32}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, false, false, true, 16, 48} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16g16b16a16_uint_description = { + VK_FORMAT_R16G16B16A16_UINT, + "VK_FORMAT_R16G16B16A16_UINT", + "r16g16b16a16_uint", + {1, 1, 64}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 16, 48}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 16, 32}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 16, 16}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 16, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 16, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 16, 16}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 16, 32}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 16, 48} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16g16b16a16_sint_description = { + VK_FORMAT_R16G16B16A16_SINT, + "VK_FORMAT_R16G16B16A16_SINT", + "r16g16b16a16_sint", + {1, 1, 64}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 16, 48}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 16, 32}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 16, 16}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 16, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 16, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 16, 16}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 16, 32}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 16, 48} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r16g16b16a16_sfloat_description = { + VK_FORMAT_R16G16B16A16_SFLOAT, + "VK_FORMAT_R16G16B16A16_SFLOAT", + "r16g16b16a16_sfloat", + {1, 1, 64}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_FLOAT, false, false, false, 16, 48}, /* x = r */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 16, 32}, /* y = g */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 16, 16}, /* z = b */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 16, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_FLOAT, false, false, false, 16, 0}, /* x = r */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 16, 16}, /* y = g */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 16, 32}, /* z = b */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 16, 48} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r32_uint_description = { + VK_FORMAT_R32_UINT, + "VK_FORMAT_R32_UINT", + "r32_uint", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 1, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 32, 0}, /* x = r */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_0, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r32_sint_description = { + VK_FORMAT_R32_SINT, + "VK_FORMAT_R32_SINT", + "r32_sint", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 1, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 32, 0}, /* x = r */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_0, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r32_sfloat_description = { + VK_FORMAT_R32_SFLOAT, + "VK_FORMAT_R32_SFLOAT", + "r32_sfloat", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 1, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_FLOAT, false, false, false, 32, 0}, /* x = r */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_0, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r32g32_uint_description = { + VK_FORMAT_R32G32_UINT, + "VK_FORMAT_R32G32_UINT", + "r32g32_uint", + {1, 1, 64}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 2, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 32, 32}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 32, 0}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 32, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 32, 32}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r32g32_sint_description = { + VK_FORMAT_R32G32_SINT, + "VK_FORMAT_R32G32_SINT", + "r32g32_sint", + {1, 1, 64}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 2, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 32, 32}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 32, 0}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 32, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 32, 32}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r32g32_sfloat_description = { + VK_FORMAT_R32G32_SFLOAT, + "VK_FORMAT_R32G32_SFLOAT", + "r32g32_sfloat", + {1, 1, 64}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 2, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_FLOAT, false, false, false, 32, 32}, /* x = r */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 32, 0}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_FLOAT, false, false, false, 32, 0}, /* x = r */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 32, 32}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r32g32b32_uint_description = { + VK_FORMAT_R32G32B32_UINT, + "VK_FORMAT_R32G32B32_UINT", + "r32g32b32_uint", + {1, 1, 96}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 32, 64}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 32, 32}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 32, 0}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 32, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 32, 32}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 32, 64}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r32g32b32_sint_description = { + VK_FORMAT_R32G32B32_SINT, + "VK_FORMAT_R32G32B32_SINT", + "r32g32b32_sint", + {1, 1, 96}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 32, 64}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 32, 32}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 32, 0}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 32, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 32, 32}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 32, 64}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r32g32b32_sfloat_description = { + VK_FORMAT_R32G32B32_SFLOAT, + "VK_FORMAT_R32G32B32_SFLOAT", + "r32g32b32_sfloat", + {1, 1, 96}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_FLOAT, false, false, false, 32, 64}, /* x = r */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 32, 32}, /* y = g */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 32, 0}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_FLOAT, false, false, false, 32, 0}, /* x = r */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 32, 32}, /* y = g */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 32, 64}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r32g32b32a32_uint_description = { + VK_FORMAT_R32G32B32A32_UINT, + "VK_FORMAT_R32G32B32A32_UINT", + "r32g32b32a32_uint", + {1, 1, 128}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 32, 96}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 32, 64}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 32, 32}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 32, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 32, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 32, 32}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 32, 64}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 32, 96} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r32g32b32a32_sint_description = { + VK_FORMAT_R32G32B32A32_SINT, + "VK_FORMAT_R32G32B32A32_SINT", + "r32g32b32a32_sint", + {1, 1, 128}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 32, 96}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 32, 64}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 32, 32}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 32, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 32, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 32, 32}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 32, 64}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 32, 96} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r32g32b32a32_sfloat_description = { + VK_FORMAT_R32G32B32A32_SFLOAT, + "VK_FORMAT_R32G32B32A32_SFLOAT", + "r32g32b32a32_sfloat", + {1, 1, 128}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_FLOAT, false, false, false, 32, 96}, /* x = r */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 32, 64}, /* y = g */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 32, 32}, /* z = b */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 32, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_FLOAT, false, false, false, 32, 0}, /* x = r */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 32, 32}, /* y = g */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 32, 64}, /* z = b */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 32, 96} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r64_uint_description = { + VK_FORMAT_R64_UINT, + "VK_FORMAT_R64_UINT", + "r64_uint", + {1, 1, 64}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 1, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 64, 0}, /* x = r */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_0, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r64_sint_description = { + VK_FORMAT_R64_SINT, + "VK_FORMAT_R64_SINT", + "r64_sint", + {1, 1, 64}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 1, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 64, 0}, /* x = r */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_0, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r64_sfloat_description = { + VK_FORMAT_R64_SFLOAT, + "VK_FORMAT_R64_SFLOAT", + "r64_sfloat", + {1, 1, 64}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 1, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_FLOAT, false, false, false, 64, 0}, /* x = r */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_0, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r64g64_uint_description = { + VK_FORMAT_R64G64_UINT, + "VK_FORMAT_R64G64_UINT", + "r64g64_uint", + {1, 1, 128}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 2, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 64, 64}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 64, 0}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 64, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 64, 64}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r64g64_sint_description = { + VK_FORMAT_R64G64_SINT, + "VK_FORMAT_R64G64_SINT", + "r64g64_sint", + {1, 1, 128}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 2, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 64, 64}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 64, 0}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 64, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 64, 64}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r64g64_sfloat_description = { + VK_FORMAT_R64G64_SFLOAT, + "VK_FORMAT_R64G64_SFLOAT", + "r64g64_sfloat", + {1, 1, 128}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 2, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_FLOAT, false, false, false, 64, 64}, /* x = r */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 64, 0}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_FLOAT, false, false, false, 64, 0}, /* x = r */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 64, 64}, /* y = g */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r64g64b64_uint_description = { + VK_FORMAT_R64G64B64_UINT, + "VK_FORMAT_R64G64B64_UINT", + "r64g64b64_uint", + {1, 1, 192}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 64, 128}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 64, 64}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 64, 0}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 64, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 64, 64}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 64, 128}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r64g64b64_sint_description = { + VK_FORMAT_R64G64B64_SINT, + "VK_FORMAT_R64G64B64_SINT", + "r64g64b64_sint", + {1, 1, 192}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 64, 128}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 64, 64}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 64, 0}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 64, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 64, 64}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 64, 128}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r64g64b64_sfloat_description = { + VK_FORMAT_R64G64B64_SFLOAT, + "VK_FORMAT_R64G64B64_SFLOAT", + "r64g64b64_sfloat", + {1, 1, 192}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 3, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_FLOAT, false, false, false, 64, 128}, /* x = r */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 64, 64}, /* y = g */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 64, 0}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_FLOAT, false, false, false, 64, 0}, /* x = r */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 64, 64}, /* y = g */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 64, 128}, /* z = b */ + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r64g64b64a64_uint_description = { + VK_FORMAT_R64G64B64A64_UINT, + "VK_FORMAT_R64G64B64A64_UINT", + "r64g64b64a64_uint", + {1, 1, 256}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 64, 192}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 64, 128}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 64, 64}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 64, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 64, 0}, /* x = r */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 64, 64}, /* y = g */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 64, 128}, /* z = b */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 64, 192} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r64g64b64a64_sint_description = { + VK_FORMAT_R64G64B64A64_SINT, + "VK_FORMAT_R64G64B64A64_SINT", + "r64g64b64a64_sint", + {1, 1, 256}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 64, 192}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 64, 128}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 64, 64}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 64, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_SIGNED, false, true, false, 64, 0}, /* x = r */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 64, 64}, /* y = g */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 64, 128}, /* z = b */ + {VK_FORMAT_TYPE_SIGNED, false, true, false, 64, 192} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_r64g64b64a64_sfloat_description = { + VK_FORMAT_R64G64B64A64_SFLOAT, + "VK_FORMAT_R64G64B64A64_SFLOAT", + "r64g64b64a64_sfloat", + {1, 1, 256}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 4, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_FLOAT, false, false, false, 64, 192}, /* x = r */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 64, 128}, /* y = g */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 64, 64}, /* z = b */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 64, 0} /* w = a */ + }, +#else + { + {VK_FORMAT_TYPE_FLOAT, false, false, false, 64, 0}, /* x = r */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 64, 64}, /* y = g */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 64, 128}, /* z = b */ + {VK_FORMAT_TYPE_FLOAT, false, false, false, 64, 192} /* w = a */ + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#else + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, +#endif + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_b10g11r11_ufloat_pack32_description = { + VK_FORMAT_B10G11R11_UFLOAT_PACK32, + "VK_FORMAT_B10G11R11_UFLOAT_PACK32", + "b10g11r11_ufloat_pack32", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_OTHER, + 1, /* nr_channels */ + false, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_VOID, false, false, false, 32, 0}, /* x = x */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_e5b9g9r9_ufloat_pack32_description = { + VK_FORMAT_E5B9G9R9_UFLOAT_PACK32, + "VK_FORMAT_E5B9G9R9_UFLOAT_PACK32", + "e5b9g9r9_ufloat_pack32", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_OTHER, + 1, /* nr_channels */ + false, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_VOID, false, false, false, 32, 0}, /* x = x */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_d16_unorm_description = { + VK_FORMAT_D16_UNORM, + "VK_FORMAT_D16_UNORM", + "d16_unorm", + {1, 1, 16}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 1, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 16, 0}, /* x = z */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* z */ + VK_SWIZZLE_NONE, /* s */ + VK_SWIZZLE_NONE, /* ignored */ + VK_SWIZZLE_NONE /* ignored */ + }, + VK_FORMAT_COLORSPACE_ZS, +}; + +const struct vk_format_description +vk_format_x8_d24_unorm_pack32_description = { + VK_FORMAT_X8_D24_UNORM_PACK32, + "VK_FORMAT_X8_D24_UNORM_PACK32", + "x8_d24_unorm_pack32", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 2, /* nr_channels */ + false, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 24, 8}, /* x = z */ + {VK_FORMAT_TYPE_VOID, false, false, false, 8, 0}, /* y = x */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 24, 0}, /* x = z */ + {VK_FORMAT_TYPE_VOID, false, false, false, 8, 24}, /* y = x */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* z */ + VK_SWIZZLE_NONE, /* s */ + VK_SWIZZLE_NONE, /* ignored */ + VK_SWIZZLE_NONE /* ignored */ + }, +#else + { + VK_SWIZZLE_X, /* z */ + VK_SWIZZLE_NONE, /* s */ + VK_SWIZZLE_NONE, /* ignored */ + VK_SWIZZLE_NONE /* ignored */ + }, +#endif + VK_FORMAT_COLORSPACE_ZS, +}; + +const struct vk_format_description +vk_format_d32_sfloat_description = { + VK_FORMAT_D32_SFLOAT, + "VK_FORMAT_D32_SFLOAT", + "d32_sfloat", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 1, /* nr_channels */ + true, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_FLOAT, false, false, false, 32, 0}, /* x = z */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* z */ + VK_SWIZZLE_NONE, /* s */ + VK_SWIZZLE_NONE, /* ignored */ + VK_SWIZZLE_NONE /* ignored */ + }, + VK_FORMAT_COLORSPACE_ZS, +}; + +const struct vk_format_description +vk_format_s8_uint_description = { + VK_FORMAT_S8_UINT, + "VK_FORMAT_S8_UINT", + "s8_uint", + {1, 1, 8}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 1, /* nr_channels */ + true, /* is_array */ + true, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 0}, /* x = s */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_NONE, /* z */ + VK_SWIZZLE_X, /* s */ + VK_SWIZZLE_NONE, /* ignored */ + VK_SWIZZLE_NONE /* ignored */ + }, + VK_FORMAT_COLORSPACE_ZS, +}; + +const struct vk_format_description +vk_format_d16_unorm_s8_uint_description = { + VK_FORMAT_D16_UNORM_S8_UINT, + "VK_FORMAT_D16_UNORM_S8_UINT", + "d16_unorm_s8_uint", + {1, 1, 24}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 2, /* nr_channels */ + false, /* is_array */ + false, /* is_bitmask */ + true, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 16, 8}, /* x = z */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 0}, /* y = s */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 16, 0}, /* x = z */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 16}, /* y = s */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* z */ + VK_SWIZZLE_Y, /* s */ + VK_SWIZZLE_NONE, /* ignored */ + VK_SWIZZLE_NONE /* ignored */ + }, +#else + { + VK_SWIZZLE_X, /* z */ + VK_SWIZZLE_Y, /* s */ + VK_SWIZZLE_NONE, /* ignored */ + VK_SWIZZLE_NONE /* ignored */ + }, +#endif + VK_FORMAT_COLORSPACE_ZS, +}; + +const struct vk_format_description +vk_format_d24_unorm_s8_uint_description = { + VK_FORMAT_D24_UNORM_S8_UINT, + "VK_FORMAT_D24_UNORM_S8_UINT", + "d24_unorm_s8_uint", + {1, 1, 32}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 2, /* nr_channels */ + false, /* is_array */ + true, /* is_bitmask */ + true, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 24, 8}, /* x = z */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 0}, /* y = s */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_UNSIGNED, true, false, false, 24, 0}, /* x = z */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 24}, /* y = s */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* z */ + VK_SWIZZLE_Y, /* s */ + VK_SWIZZLE_NONE, /* ignored */ + VK_SWIZZLE_NONE /* ignored */ + }, +#else + { + VK_SWIZZLE_X, /* z */ + VK_SWIZZLE_Y, /* s */ + VK_SWIZZLE_NONE, /* ignored */ + VK_SWIZZLE_NONE /* ignored */ + }, +#endif + VK_FORMAT_COLORSPACE_ZS, +}; + +const struct vk_format_description +vk_format_d32_sfloat_s8_uint_description = { + VK_FORMAT_D32_SFLOAT_S8_UINT, + "VK_FORMAT_D32_SFLOAT_S8_UINT", + "d32_sfloat_s8_uint", + {1, 1, 40}, /* block */ + VK_FORMAT_LAYOUT_PLAIN, + 2, /* nr_channels */ + false, /* is_array */ + false, /* is_bitmask */ + true, /* is_mixed */ +#ifdef PIPE_ARCH_BIG_ENDIAN + { + {VK_FORMAT_TYPE_FLOAT, false, false, false, 32, 8}, /* x = z */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 0}, /* y = s */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#else + { + {VK_FORMAT_TYPE_FLOAT, false, false, false, 32, 0}, /* x = z */ + {VK_FORMAT_TYPE_UNSIGNED, false, true, false, 8, 32}, /* y = s */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, +#endif +#ifdef PIPE_ARCH_BIG_ENDIAN + { + VK_SWIZZLE_X, /* z */ + VK_SWIZZLE_Y, /* s */ + VK_SWIZZLE_NONE, /* ignored */ + VK_SWIZZLE_NONE /* ignored */ + }, +#else + { + VK_SWIZZLE_X, /* z */ + VK_SWIZZLE_Y, /* s */ + VK_SWIZZLE_NONE, /* ignored */ + VK_SWIZZLE_NONE /* ignored */ + }, +#endif + VK_FORMAT_COLORSPACE_ZS, +}; + +const struct vk_format_description +vk_format_bc1_rgb_unorm_block_description = { + VK_FORMAT_BC1_RGB_UNORM_BLOCK, + "VK_FORMAT_BC1_RGB_UNORM_BLOCK", + "bc1_rgb_unorm_block", + {4, 4, 64}, /* block */ + VK_FORMAT_LAYOUT_S3TC, + 1, /* nr_channels */ + false, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_VOID, false, false, false, 64, 0}, /* x = x */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_bc1_rgb_srgb_block_description = { + VK_FORMAT_BC1_RGB_SRGB_BLOCK, + "VK_FORMAT_BC1_RGB_SRGB_BLOCK", + "bc1_rgb_srgb_block", + {4, 4, 64}, /* block */ + VK_FORMAT_LAYOUT_S3TC, + 1, /* nr_channels */ + false, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_VOID, false, false, false, 64, 0}, /* x = x */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* sr */ + VK_SWIZZLE_Y, /* sg */ + VK_SWIZZLE_Z, /* sb */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_SRGB, +}; + +const struct vk_format_description +vk_format_bc1_rgba_unorm_block_description = { + VK_FORMAT_BC1_RGBA_UNORM_BLOCK, + "VK_FORMAT_BC1_RGBA_UNORM_BLOCK", + "bc1_rgba_unorm_block", + {4, 4, 64}, /* block */ + VK_FORMAT_LAYOUT_S3TC, + 1, /* nr_channels */ + false, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_VOID, false, false, false, 64, 0}, /* x = x */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_bc1_rgba_srgb_block_description = { + VK_FORMAT_BC1_RGBA_SRGB_BLOCK, + "VK_FORMAT_BC1_RGBA_SRGB_BLOCK", + "bc1_rgba_srgb_block", + {4, 4, 64}, /* block */ + VK_FORMAT_LAYOUT_S3TC, + 1, /* nr_channels */ + false, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_VOID, false, false, false, 64, 0}, /* x = x */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* sr */ + VK_SWIZZLE_Y, /* sg */ + VK_SWIZZLE_Z, /* sb */ + VK_SWIZZLE_W /* a */ + }, + VK_FORMAT_COLORSPACE_SRGB, +}; + +const struct vk_format_description +vk_format_bc2_unorm_block_description = { + VK_FORMAT_BC2_UNORM_BLOCK, + "VK_FORMAT_BC2_UNORM_BLOCK", + "bc2_unorm_block", + {4, 4, 128}, /* block */ + VK_FORMAT_LAYOUT_S3TC, + 1, /* nr_channels */ + false, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_VOID, false, false, false, 128, 0}, /* x = x */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_bc2_srgb_block_description = { + VK_FORMAT_BC2_SRGB_BLOCK, + "VK_FORMAT_BC2_SRGB_BLOCK", + "bc2_srgb_block", + {4, 4, 128}, /* block */ + VK_FORMAT_LAYOUT_S3TC, + 1, /* nr_channels */ + false, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_VOID, false, false, false, 128, 0}, /* x = x */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* sr */ + VK_SWIZZLE_Y, /* sg */ + VK_SWIZZLE_Z, /* sb */ + VK_SWIZZLE_W /* a */ + }, + VK_FORMAT_COLORSPACE_SRGB, +}; + +const struct vk_format_description +vk_format_bc3_unorm_block_description = { + VK_FORMAT_BC3_UNORM_BLOCK, + "VK_FORMAT_BC3_UNORM_BLOCK", + "bc3_unorm_block", + {4, 4, 128}, /* block */ + VK_FORMAT_LAYOUT_S3TC, + 1, /* nr_channels */ + false, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_VOID, false, false, false, 128, 0}, /* x = x */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_bc3_srgb_block_description = { + VK_FORMAT_BC3_SRGB_BLOCK, + "VK_FORMAT_BC3_SRGB_BLOCK", + "bc3_srgb_block", + {4, 4, 128}, /* block */ + VK_FORMAT_LAYOUT_S3TC, + 1, /* nr_channels */ + false, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_VOID, false, false, false, 128, 0}, /* x = x */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* sr */ + VK_SWIZZLE_Y, /* sg */ + VK_SWIZZLE_Z, /* sb */ + VK_SWIZZLE_W /* a */ + }, + VK_FORMAT_COLORSPACE_SRGB, +}; + +const struct vk_format_description +vk_format_bc4_unorm_block_description = { + VK_FORMAT_BC4_UNORM_BLOCK, + "VK_FORMAT_BC4_UNORM_BLOCK", + "bc4_unorm_block", + {4, 4, 64}, /* block */ + VK_FORMAT_LAYOUT_RGTC, + 1, /* nr_channels */ + false, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_VOID, false, false, false, 64, 0}, /* x = x */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_0, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_bc4_snorm_block_description = { + VK_FORMAT_BC4_SNORM_BLOCK, + "VK_FORMAT_BC4_SNORM_BLOCK", + "bc4_snorm_block", + {4, 4, 64}, /* block */ + VK_FORMAT_LAYOUT_RGTC, + 1, /* nr_channels */ + false, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_VOID, false, false, false, 64, 0}, /* x = x */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_0, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_bc5_unorm_block_description = { + VK_FORMAT_BC5_UNORM_BLOCK, + "VK_FORMAT_BC5_UNORM_BLOCK", + "bc5_unorm_block", + {4, 4, 128}, /* block */ + VK_FORMAT_LAYOUT_RGTC, + 1, /* nr_channels */ + false, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_VOID, false, false, false, 128, 0}, /* x = x */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_bc5_snorm_block_description = { + VK_FORMAT_BC5_SNORM_BLOCK, + "VK_FORMAT_BC5_SNORM_BLOCK", + "bc5_snorm_block", + {4, 4, 128}, /* block */ + VK_FORMAT_LAYOUT_RGTC, + 1, /* nr_channels */ + false, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_VOID, false, false, false, 128, 0}, /* x = x */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_0, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_bc6h_ufloat_block_description = { + VK_FORMAT_BC6H_UFLOAT_BLOCK, + "VK_FORMAT_BC6H_UFLOAT_BLOCK", + "bc6h_ufloat_block", + {4, 4, 128}, /* block */ + VK_FORMAT_LAYOUT_BPTC, + 1, /* nr_channels */ + false, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_VOID, false, false, false, 128, 0}, /* x = x */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_bc6h_sfloat_block_description = { + VK_FORMAT_BC6H_SFLOAT_BLOCK, + "VK_FORMAT_BC6H_SFLOAT_BLOCK", + "bc6h_sfloat_block", + {4, 4, 128}, /* block */ + VK_FORMAT_LAYOUT_BPTC, + 1, /* nr_channels */ + false, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_VOID, false, false, false, 128, 0}, /* x = x */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_1 /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_bc7_unorm_block_description = { + VK_FORMAT_BC7_UNORM_BLOCK, + "VK_FORMAT_BC7_UNORM_BLOCK", + "bc7_unorm_block", + {4, 4, 128}, /* block */ + VK_FORMAT_LAYOUT_BPTC, + 1, /* nr_channels */ + false, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_VOID, false, false, false, 128, 0}, /* x = x */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* r */ + VK_SWIZZLE_Y, /* g */ + VK_SWIZZLE_Z, /* b */ + VK_SWIZZLE_W /* a */ + }, + VK_FORMAT_COLORSPACE_RGB, +}; + +const struct vk_format_description +vk_format_bc7_srgb_block_description = { + VK_FORMAT_BC7_SRGB_BLOCK, + "VK_FORMAT_BC7_SRGB_BLOCK", + "bc7_srgb_block", + {4, 4, 128}, /* block */ + VK_FORMAT_LAYOUT_BPTC, + 1, /* nr_channels */ + false, /* is_array */ + false, /* is_bitmask */ + false, /* is_mixed */ + { + {VK_FORMAT_TYPE_VOID, false, false, false, 128, 0}, /* x = x */ + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0}, + {0, 0, 0, 0, 0} + }, + { + VK_SWIZZLE_X, /* sr */ + VK_SWIZZLE_Y, /* sg */ + VK_SWIZZLE_Z, /* sb */ + VK_SWIZZLE_W /* a */ + }, + VK_FORMAT_COLORSPACE_SRGB, +}; + +const struct vk_format_description * +vk_format_description(VkFormat format) +{ + if (format > VK_FORMAT_END_RANGE) { + return NULL; + } + + switch (format) { + case VK_FORMAT_UNDEFINED: + return &vk_format_undefined_description; + case VK_FORMAT_R4G4_UNORM_PACK8: + return &vk_format_r4g4_unorm_pack8_description; + case VK_FORMAT_R4G4B4A4_UNORM_PACK16: + return &vk_format_r4g4b4a4_unorm_pack16_description; + case VK_FORMAT_B4G4R4A4_UNORM_PACK16: + return &vk_format_b4g4r4a4_unorm_pack16_description; + case VK_FORMAT_R5G6B5_UNORM_PACK16: + return &vk_format_r5g6b5_unorm_pack16_description; + case VK_FORMAT_B5G6R5_UNORM_PACK16: + return &vk_format_b5g6r5_unorm_pack16_description; + case VK_FORMAT_R5G5B5A1_UNORM_PACK16: + return &vk_format_r5g5b5a1_unorm_pack16_description; + case VK_FORMAT_B5G5R5A1_UNORM_PACK16: + return &vk_format_b5g5r5a1_unorm_pack16_description; + case VK_FORMAT_A1R5G5B5_UNORM_PACK16: + return &vk_format_a1r5g5b5_unorm_pack16_description; + case VK_FORMAT_R8_UNORM: + return &vk_format_r8_unorm_description; + case VK_FORMAT_R8_SNORM: + return &vk_format_r8_snorm_description; + case VK_FORMAT_R8_USCALED: + return &vk_format_r8_uscaled_description; + case VK_FORMAT_R8_SSCALED: + return &vk_format_r8_sscaled_description; + case VK_FORMAT_R8_UINT: + return &vk_format_r8_uint_description; + case VK_FORMAT_R8_SINT: + return &vk_format_r8_sint_description; + case VK_FORMAT_R8_SRGB: + return &vk_format_r8_srgb_description; + case VK_FORMAT_R8G8_UNORM: + return &vk_format_r8g8_unorm_description; + case VK_FORMAT_R8G8_SNORM: + return &vk_format_r8g8_snorm_description; + case VK_FORMAT_R8G8_USCALED: + return &vk_format_r8g8_uscaled_description; + case VK_FORMAT_R8G8_SSCALED: + return &vk_format_r8g8_sscaled_description; + case VK_FORMAT_R8G8_UINT: + return &vk_format_r8g8_uint_description; + case VK_FORMAT_R8G8_SINT: + return &vk_format_r8g8_sint_description; + case VK_FORMAT_R8G8_SRGB: + return &vk_format_r8g8_srgb_description; + case VK_FORMAT_R8G8B8_UNORM: + return &vk_format_r8g8b8_unorm_description; + case VK_FORMAT_R8G8B8_SNORM: + return &vk_format_r8g8b8_snorm_description; + case VK_FORMAT_R8G8B8_USCALED: + return &vk_format_r8g8b8_uscaled_description; + case VK_FORMAT_R8G8B8_SSCALED: + return &vk_format_r8g8b8_sscaled_description; + case VK_FORMAT_R8G8B8_UINT: + return &vk_format_r8g8b8_uint_description; + case VK_FORMAT_R8G8B8_SINT: + return &vk_format_r8g8b8_sint_description; + case VK_FORMAT_R8G8B8_SRGB: + return &vk_format_r8g8b8_srgb_description; + case VK_FORMAT_B8G8R8_UNORM: + return &vk_format_b8g8r8_unorm_description; + case VK_FORMAT_B8G8R8_SNORM: + return &vk_format_b8g8r8_snorm_description; + case VK_FORMAT_B8G8R8_USCALED: + return &vk_format_b8g8r8_uscaled_description; + case VK_FORMAT_B8G8R8_SSCALED: + return &vk_format_b8g8r8_sscaled_description; + case VK_FORMAT_B8G8R8_UINT: + return &vk_format_b8g8r8_uint_description; + case VK_FORMAT_B8G8R8_SINT: + return &vk_format_b8g8r8_sint_description; + case VK_FORMAT_B8G8R8_SRGB: + return &vk_format_b8g8r8_srgb_description; + case VK_FORMAT_R8G8B8A8_UNORM: + return &vk_format_r8g8b8a8_unorm_description; + case VK_FORMAT_R8G8B8A8_SNORM: + return &vk_format_r8g8b8a8_snorm_description; + case VK_FORMAT_R8G8B8A8_USCALED: + return &vk_format_r8g8b8a8_uscaled_description; + case VK_FORMAT_R8G8B8A8_SSCALED: + return &vk_format_r8g8b8a8_sscaled_description; + case VK_FORMAT_R8G8B8A8_UINT: + return &vk_format_r8g8b8a8_uint_description; + case VK_FORMAT_R8G8B8A8_SINT: + return &vk_format_r8g8b8a8_sint_description; + case VK_FORMAT_R8G8B8A8_SRGB: + return &vk_format_r8g8b8a8_srgb_description; + case VK_FORMAT_B8G8R8A8_UNORM: + return &vk_format_b8g8r8a8_unorm_description; + case VK_FORMAT_B8G8R8A8_SNORM: + return &vk_format_b8g8r8a8_snorm_description; + case VK_FORMAT_B8G8R8A8_USCALED: + return &vk_format_b8g8r8a8_uscaled_description; + case VK_FORMAT_B8G8R8A8_SSCALED: + return &vk_format_b8g8r8a8_sscaled_description; + case VK_FORMAT_B8G8R8A8_UINT: + return &vk_format_b8g8r8a8_uint_description; + case VK_FORMAT_B8G8R8A8_SINT: + return &vk_format_b8g8r8a8_sint_description; + case VK_FORMAT_B8G8R8A8_SRGB: + return &vk_format_b8g8r8a8_srgb_description; + case VK_FORMAT_A8B8G8R8_UNORM_PACK32: + return &vk_format_a8b8g8r8_unorm_pack32_description; + case VK_FORMAT_A8B8G8R8_SNORM_PACK32: + return &vk_format_a8b8g8r8_snorm_pack32_description; + case VK_FORMAT_A8B8G8R8_USCALED_PACK32: + return &vk_format_a8b8g8r8_uscaled_pack32_description; + case VK_FORMAT_A8B8G8R8_SSCALED_PACK32: + return &vk_format_a8b8g8r8_sscaled_pack32_description; + case VK_FORMAT_A8B8G8R8_UINT_PACK32: + return &vk_format_a8b8g8r8_uint_pack32_description; + case VK_FORMAT_A8B8G8R8_SINT_PACK32: + return &vk_format_a8b8g8r8_sint_pack32_description; + case VK_FORMAT_A8B8G8R8_SRGB_PACK32: + return &vk_format_a8b8g8r8_srgb_pack32_description; + case VK_FORMAT_A2R10G10B10_UNORM_PACK32: + return &vk_format_a2r10g10b10_unorm_pack32_description; + case VK_FORMAT_A2R10G10B10_SNORM_PACK32: + return &vk_format_a2r10g10b10_snorm_pack32_description; + case VK_FORMAT_A2R10G10B10_USCALED_PACK32: + return &vk_format_a2r10g10b10_uscaled_pack32_description; + case VK_FORMAT_A2R10G10B10_SSCALED_PACK32: + return &vk_format_a2r10g10b10_sscaled_pack32_description; + case VK_FORMAT_A2R10G10B10_UINT_PACK32: + return &vk_format_a2r10g10b10_uint_pack32_description; + case VK_FORMAT_A2R10G10B10_SINT_PACK32: + return &vk_format_a2r10g10b10_sint_pack32_description; + case VK_FORMAT_A2B10G10R10_UNORM_PACK32: + return &vk_format_a2b10g10r10_unorm_pack32_description; + case VK_FORMAT_A2B10G10R10_SNORM_PACK32: + return &vk_format_a2b10g10r10_snorm_pack32_description; + case VK_FORMAT_A2B10G10R10_USCALED_PACK32: + return &vk_format_a2b10g10r10_uscaled_pack32_description; + case VK_FORMAT_A2B10G10R10_SSCALED_PACK32: + return &vk_format_a2b10g10r10_sscaled_pack32_description; + case VK_FORMAT_A2B10G10R10_UINT_PACK32: + return &vk_format_a2b10g10r10_uint_pack32_description; + case VK_FORMAT_A2B10G10R10_SINT_PACK32: + return &vk_format_a2b10g10r10_sint_pack32_description; + case VK_FORMAT_R16_UNORM: + return &vk_format_r16_unorm_description; + case VK_FORMAT_R16_SNORM: + return &vk_format_r16_snorm_description; + case VK_FORMAT_R16_USCALED: + return &vk_format_r16_uscaled_description; + case VK_FORMAT_R16_SSCALED: + return &vk_format_r16_sscaled_description; + case VK_FORMAT_R16_UINT: + return &vk_format_r16_uint_description; + case VK_FORMAT_R16_SINT: + return &vk_format_r16_sint_description; + case VK_FORMAT_R16_SFLOAT: + return &vk_format_r16_sfloat_description; + case VK_FORMAT_R16G16_UNORM: + return &vk_format_r16g16_unorm_description; + case VK_FORMAT_R16G16_SNORM: + return &vk_format_r16g16_snorm_description; + case VK_FORMAT_R16G16_USCALED: + return &vk_format_r16g16_uscaled_description; + case VK_FORMAT_R16G16_SSCALED: + return &vk_format_r16g16_sscaled_description; + case VK_FORMAT_R16G16_UINT: + return &vk_format_r16g16_uint_description; + case VK_FORMAT_R16G16_SINT: + return &vk_format_r16g16_sint_description; + case VK_FORMAT_R16G16_SFLOAT: + return &vk_format_r16g16_sfloat_description; + case VK_FORMAT_R16G16B16_UNORM: + return &vk_format_r16g16b16_unorm_description; + case VK_FORMAT_R16G16B16_SNORM: + return &vk_format_r16g16b16_snorm_description; + case VK_FORMAT_R16G16B16_USCALED: + return &vk_format_r16g16b16_uscaled_description; + case VK_FORMAT_R16G16B16_SSCALED: + return &vk_format_r16g16b16_sscaled_description; + case VK_FORMAT_R16G16B16_UINT: + return &vk_format_r16g16b16_uint_description; + case VK_FORMAT_R16G16B16_SINT: + return &vk_format_r16g16b16_sint_description; + case VK_FORMAT_R16G16B16_SFLOAT: + return &vk_format_r16g16b16_sfloat_description; + case VK_FORMAT_R16G16B16A16_UNORM: + return &vk_format_r16g16b16a16_unorm_description; + case VK_FORMAT_R16G16B16A16_SNORM: + return &vk_format_r16g16b16a16_snorm_description; + case VK_FORMAT_R16G16B16A16_USCALED: + return &vk_format_r16g16b16a16_uscaled_description; + case VK_FORMAT_R16G16B16A16_SSCALED: + return &vk_format_r16g16b16a16_sscaled_description; + case VK_FORMAT_R16G16B16A16_UINT: + return &vk_format_r16g16b16a16_uint_description; + case VK_FORMAT_R16G16B16A16_SINT: + return &vk_format_r16g16b16a16_sint_description; + case VK_FORMAT_R16G16B16A16_SFLOAT: + return &vk_format_r16g16b16a16_sfloat_description; + case VK_FORMAT_R32_UINT: + return &vk_format_r32_uint_description; + case VK_FORMAT_R32_SINT: + return &vk_format_r32_sint_description; + case VK_FORMAT_R32_SFLOAT: + return &vk_format_r32_sfloat_description; + case VK_FORMAT_R32G32_UINT: + return &vk_format_r32g32_uint_description; + case VK_FORMAT_R32G32_SINT: + return &vk_format_r32g32_sint_description; + case VK_FORMAT_R32G32_SFLOAT: + return &vk_format_r32g32_sfloat_description; + case VK_FORMAT_R32G32B32_UINT: + return &vk_format_r32g32b32_uint_description; + case VK_FORMAT_R32G32B32_SINT: + return &vk_format_r32g32b32_sint_description; + case VK_FORMAT_R32G32B32_SFLOAT: + return &vk_format_r32g32b32_sfloat_description; + case VK_FORMAT_R32G32B32A32_UINT: + return &vk_format_r32g32b32a32_uint_description; + case VK_FORMAT_R32G32B32A32_SINT: + return &vk_format_r32g32b32a32_sint_description; + case VK_FORMAT_R32G32B32A32_SFLOAT: + return &vk_format_r32g32b32a32_sfloat_description; + case VK_FORMAT_R64_UINT: + return &vk_format_r64_uint_description; + case VK_FORMAT_R64_SINT: + return &vk_format_r64_sint_description; + case VK_FORMAT_R64_SFLOAT: + return &vk_format_r64_sfloat_description; + case VK_FORMAT_R64G64_UINT: + return &vk_format_r64g64_uint_description; + case VK_FORMAT_R64G64_SINT: + return &vk_format_r64g64_sint_description; + case VK_FORMAT_R64G64_SFLOAT: + return &vk_format_r64g64_sfloat_description; + case VK_FORMAT_R64G64B64_UINT: + return &vk_format_r64g64b64_uint_description; + case VK_FORMAT_R64G64B64_SINT: + return &vk_format_r64g64b64_sint_description; + case VK_FORMAT_R64G64B64_SFLOAT: + return &vk_format_r64g64b64_sfloat_description; + case VK_FORMAT_R64G64B64A64_UINT: + return &vk_format_r64g64b64a64_uint_description; + case VK_FORMAT_R64G64B64A64_SINT: + return &vk_format_r64g64b64a64_sint_description; + case VK_FORMAT_R64G64B64A64_SFLOAT: + return &vk_format_r64g64b64a64_sfloat_description; + case VK_FORMAT_B10G11R11_UFLOAT_PACK32: + return &vk_format_b10g11r11_ufloat_pack32_description; + case VK_FORMAT_E5B9G9R9_UFLOAT_PACK32: + return &vk_format_e5b9g9r9_ufloat_pack32_description; + case VK_FORMAT_D16_UNORM: + return &vk_format_d16_unorm_description; + case VK_FORMAT_X8_D24_UNORM_PACK32: + return &vk_format_x8_d24_unorm_pack32_description; + case VK_FORMAT_D32_SFLOAT: + return &vk_format_d32_sfloat_description; + case VK_FORMAT_S8_UINT: + return &vk_format_s8_uint_description; + case VK_FORMAT_D16_UNORM_S8_UINT: + return &vk_format_d16_unorm_s8_uint_description; + case VK_FORMAT_D24_UNORM_S8_UINT: + return &vk_format_d24_unorm_s8_uint_description; + case VK_FORMAT_D32_SFLOAT_S8_UINT: + return &vk_format_d32_sfloat_s8_uint_description; + case VK_FORMAT_BC1_RGB_UNORM_BLOCK: + return &vk_format_bc1_rgb_unorm_block_description; + case VK_FORMAT_BC1_RGB_SRGB_BLOCK: + return &vk_format_bc1_rgb_srgb_block_description; + case VK_FORMAT_BC1_RGBA_UNORM_BLOCK: + return &vk_format_bc1_rgba_unorm_block_description; + case VK_FORMAT_BC1_RGBA_SRGB_BLOCK: + return &vk_format_bc1_rgba_srgb_block_description; + case VK_FORMAT_BC2_UNORM_BLOCK: + return &vk_format_bc2_unorm_block_description; + case VK_FORMAT_BC2_SRGB_BLOCK: + return &vk_format_bc2_srgb_block_description; + case VK_FORMAT_BC3_UNORM_BLOCK: + return &vk_format_bc3_unorm_block_description; + case VK_FORMAT_BC3_SRGB_BLOCK: + return &vk_format_bc3_srgb_block_description; + case VK_FORMAT_BC4_UNORM_BLOCK: + return &vk_format_bc4_unorm_block_description; + case VK_FORMAT_BC4_SNORM_BLOCK: + return &vk_format_bc4_snorm_block_description; + case VK_FORMAT_BC5_UNORM_BLOCK: + return &vk_format_bc5_unorm_block_description; + case VK_FORMAT_BC5_SNORM_BLOCK: + return &vk_format_bc5_snorm_block_description; + case VK_FORMAT_BC6H_UFLOAT_BLOCK: + return &vk_format_bc6h_ufloat_block_description; + case VK_FORMAT_BC6H_SFLOAT_BLOCK: + return &vk_format_bc6h_sfloat_block_description; + case VK_FORMAT_BC7_UNORM_BLOCK: + return &vk_format_bc7_unorm_block_description; + case VK_FORMAT_BC7_SRGB_BLOCK: + return &vk_format_bc7_srgb_block_description; + default: + return NULL; + } +} + diff -Nru mesa-12.0.6/src/amd/vulkan/vk_format_table.py mesa-17.0.7/src/amd/vulkan/vk_format_table.py --- mesa-12.0.6/src/amd/vulkan/vk_format_table.py 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/vk_format_table.py 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,173 @@ +#!/usr/bin/env python + +CopyRight = ''' +/************************************************************************** + * + * Copyright 2010 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ +''' + + +import sys + +from vk_format_parse import * + +def layout_map(layout): + return 'VK_FORMAT_LAYOUT_' + str(layout).upper() + + +def colorspace_map(colorspace): + return 'VK_FORMAT_COLORSPACE_' + str(colorspace).upper() + + +colorspace_channels_map = { + 'rgb': ['r', 'g', 'b', 'a'], + 'srgb': ['sr', 'sg', 'sb', 'a'], + 'zs': ['z', 's'], + 'yuv': ['y', 'u', 'v'], +} + + +type_map = { + VOID: "VK_FORMAT_TYPE_VOID", + UNSIGNED: "VK_FORMAT_TYPE_UNSIGNED", + SIGNED: "VK_FORMAT_TYPE_SIGNED", + FIXED: "VK_FORMAT_TYPE_FIXED", + FLOAT: "VK_FORMAT_TYPE_FLOAT", +} + + +def bool_map(value): + if value: + return "true" + else: + return "false" + + +swizzle_map = { + SWIZZLE_X: "VK_SWIZZLE_X", + SWIZZLE_Y: "VK_SWIZZLE_Y", + SWIZZLE_Z: "VK_SWIZZLE_Z", + SWIZZLE_W: "VK_SWIZZLE_W", + SWIZZLE_0: "VK_SWIZZLE_0", + SWIZZLE_1: "VK_SWIZZLE_1", + SWIZZLE_NONE: "VK_SWIZZLE_NONE", +} + +def print_channels(format, func): + if format.nr_channels() <= 1: + func(format.le_channels, format.le_swizzles) + else: + print '#ifdef PIPE_ARCH_BIG_ENDIAN' + func(format.be_channels, format.be_swizzles) + print '#else' + func(format.le_channels, format.le_swizzles) + print '#endif' + +def write_format_table(formats): + print '/* This file is autogenerated by u_format_table.py from u_format.csv. Do not edit directly. */' + print + # This will print the copyright message on the top of this file + print CopyRight.strip() + print + print '#include "stdbool.h"' + print '#include "vk_format.h"' + print + + def do_channel_array(channels, swizzles): + print " {" + for i in range(4): + channel = channels[i] + if i < 3: + sep = "," + else: + sep = "" + if channel.size: + print " {%s, %s, %s, %s, %u, %u}%s\t/* %s = %s */" % (type_map[channel.type], bool_map(channel.norm), bool_map(channel.pure), bool_map(channel.scaled), channel.size, channel.shift, sep, "xyzw"[i], channel.name) + else: + print " {0, 0, 0, 0, 0}%s" % (sep,) + print " }," + + def do_swizzle_array(channels, swizzles): + print " {" + for i in range(4): + swizzle = swizzles[i] + if i < 3: + sep = "," + else: + sep = "" + try: + comment = colorspace_channels_map[format.colorspace][i] + except (KeyError, IndexError): + comment = 'ignored' + print " %s%s\t/* %s */" % (swizzle_map[swizzle], sep, comment) + print " }," + + for format in formats: + print 'const struct vk_format_description' + print 'vk_format_%s_description = {' % (format.short_name(),) + print " %s," % (format.name,) + print " \"%s\"," % (format.name,) + print " \"%s\"," % (format.short_name(),) + print " {%u, %u, %u},\t/* block */" % (format.block_width, format.block_height, format.block_size()) + print " %s," % (layout_map(format.layout),) + print " %u,\t/* nr_channels */" % (format.nr_channels(),) + print " %s,\t/* is_array */" % (bool_map(format.is_array()),) + print " %s,\t/* is_bitmask */" % (bool_map(format.is_bitmask()),) + print " %s,\t/* is_mixed */" % (bool_map(format.is_mixed()),) + print_channels(format, do_channel_array) + print_channels(format, do_swizzle_array) + print " %s," % (colorspace_map(format.colorspace),) + print "};" + print + + print "const struct vk_format_description *" + print "vk_format_description(VkFormat format)" + print "{" + print " if (format > VK_FORMAT_END_RANGE) {" + print " return NULL;" + print " }" + print + print " switch (format) {" + for format in formats: + print " case %s:" % format.name + print " return &vk_format_%s_description;" % (format.short_name(),) + print " default:" + print " return NULL;" + print " }" + print "}" + print + + +def main(): + + formats = [] + for arg in sys.argv[1:]: + formats.extend(parse(arg)) + write_format_table(formats) + + +if __name__ == '__main__': + main() diff -Nru mesa-12.0.6/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c mesa-17.0.7/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c --- mesa-12.0.6/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,297 @@ +/* + * Copyright © 2016 Red Hat. + * Copyright © 2016 Bas Nieuwenhuizen + * + * based on amdgpu winsys. + * Copyright © 2011 Marek Olšák + * Copyright © 2015 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include + +#include "radv_amdgpu_bo.h" + +#include +#include +#include + +static void radv_amdgpu_winsys_bo_destroy(struct radeon_winsys_bo *_bo) +{ + struct radv_amdgpu_winsys_bo *bo = radv_amdgpu_winsys_bo(_bo); + + if (bo->ws->debug_all_bos) { + pthread_mutex_lock(&bo->ws->global_bo_list_lock); + LIST_DEL(&bo->global_list_item); + bo->ws->num_buffers--; + pthread_mutex_unlock(&bo->ws->global_bo_list_lock); + } + amdgpu_bo_va_op(bo->bo, 0, bo->size, bo->va, 0, AMDGPU_VA_OP_UNMAP); + amdgpu_va_range_free(bo->va_handle); + amdgpu_bo_free(bo->bo); + FREE(bo); +} + +static void radv_amdgpu_add_buffer_to_global_list(struct radv_amdgpu_winsys_bo *bo) +{ + struct radv_amdgpu_winsys *ws = bo->ws; + + if (bo->ws->debug_all_bos) { + pthread_mutex_lock(&ws->global_bo_list_lock); + LIST_ADDTAIL(&bo->global_list_item, &ws->global_bo_list); + ws->num_buffers++; + pthread_mutex_unlock(&ws->global_bo_list_lock); + } +} + +static struct radeon_winsys_bo * +radv_amdgpu_winsys_bo_create(struct radeon_winsys *_ws, + uint64_t size, + unsigned alignment, + enum radeon_bo_domain initial_domain, + unsigned flags) +{ + struct radv_amdgpu_winsys *ws = radv_amdgpu_winsys(_ws); + struct radv_amdgpu_winsys_bo *bo; + struct amdgpu_bo_alloc_request request = {0}; + amdgpu_bo_handle buf_handle; + uint64_t va = 0; + amdgpu_va_handle va_handle; + int r; + bo = CALLOC_STRUCT(radv_amdgpu_winsys_bo); + if (!bo) { + return NULL; + } + + request.alloc_size = size; + request.phys_alignment = alignment; + + if (initial_domain & RADEON_DOMAIN_VRAM) + request.preferred_heap |= AMDGPU_GEM_DOMAIN_VRAM; + if (initial_domain & RADEON_DOMAIN_GTT) + request.preferred_heap |= AMDGPU_GEM_DOMAIN_GTT; + + if (flags & RADEON_FLAG_CPU_ACCESS) + request.flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED; + if (flags & RADEON_FLAG_NO_CPU_ACCESS) + request.flags |= AMDGPU_GEM_CREATE_NO_CPU_ACCESS; + if (flags & RADEON_FLAG_GTT_WC) + request.flags |= AMDGPU_GEM_CREATE_CPU_GTT_USWC; + + r = amdgpu_bo_alloc(ws->dev, &request, &buf_handle); + if (r) { + fprintf(stderr, "amdgpu: Failed to allocate a buffer:\n"); + fprintf(stderr, "amdgpu: size : %"PRIu64" bytes\n", size); + fprintf(stderr, "amdgpu: alignment : %u bytes\n", alignment); + fprintf(stderr, "amdgpu: domains : %u\n", initial_domain); + goto error_bo_alloc; + } + + r = amdgpu_va_range_alloc(ws->dev, amdgpu_gpu_va_range_general, + size, alignment, 0, &va, &va_handle, 0); + if (r) + goto error_va_alloc; + + r = amdgpu_bo_va_op(buf_handle, 0, size, va, 0, AMDGPU_VA_OP_MAP); + if (r) + goto error_va_map; + + bo->bo = buf_handle; + bo->va = va; + bo->va_handle = va_handle; + bo->initial_domain = initial_domain; + bo->size = size; + bo->is_shared = false; + bo->ws = ws; + radv_amdgpu_add_buffer_to_global_list(bo); + return (struct radeon_winsys_bo *)bo; +error_va_map: + amdgpu_va_range_free(va_handle); + +error_va_alloc: + amdgpu_bo_free(buf_handle); + +error_bo_alloc: + FREE(bo); + return NULL; +} + +static uint64_t radv_amdgpu_winsys_bo_get_va(struct radeon_winsys_bo *_bo) +{ + struct radv_amdgpu_winsys_bo *bo = radv_amdgpu_winsys_bo(_bo); + return bo->va; +} + +static void * +radv_amdgpu_winsys_bo_map(struct radeon_winsys_bo *_bo) +{ + struct radv_amdgpu_winsys_bo *bo = radv_amdgpu_winsys_bo(_bo); + int ret; + void *data; + ret = amdgpu_bo_cpu_map(bo->bo, &data); + if (ret) + return NULL; + return data; +} + +static void +radv_amdgpu_winsys_bo_unmap(struct radeon_winsys_bo *_bo) +{ + struct radv_amdgpu_winsys_bo *bo = radv_amdgpu_winsys_bo(_bo); + amdgpu_bo_cpu_unmap(bo->bo); +} + +static struct radeon_winsys_bo * +radv_amdgpu_winsys_bo_from_fd(struct radeon_winsys *_ws, + int fd, unsigned *stride, + unsigned *offset) +{ + struct radv_amdgpu_winsys *ws = radv_amdgpu_winsys(_ws); + struct radv_amdgpu_winsys_bo *bo; + uint64_t va; + amdgpu_va_handle va_handle; + enum amdgpu_bo_handle_type type = amdgpu_bo_handle_type_dma_buf_fd; + struct amdgpu_bo_import_result result = {0}; + struct amdgpu_bo_info info = {0}; + enum radeon_bo_domain initial = 0; + int r; + bo = CALLOC_STRUCT(radv_amdgpu_winsys_bo); + if (!bo) + return NULL; + + r = amdgpu_bo_import(ws->dev, type, fd, &result); + if (r) + goto error; + + r = amdgpu_bo_query_info(result.buf_handle, &info); + if (r) + goto error_query; + + r = amdgpu_va_range_alloc(ws->dev, amdgpu_gpu_va_range_general, + result.alloc_size, 1 << 20, 0, &va, &va_handle, 0); + if (r) + goto error_query; + + r = amdgpu_bo_va_op(result.buf_handle, 0, result.alloc_size, va, 0, AMDGPU_VA_OP_MAP); + if (r) + goto error_va_map; + + if (info.preferred_heap & AMDGPU_GEM_DOMAIN_VRAM) + initial |= RADEON_DOMAIN_VRAM; + if (info.preferred_heap & AMDGPU_GEM_DOMAIN_GTT) + initial |= RADEON_DOMAIN_GTT; + + bo->bo = result.buf_handle; + bo->va = va; + bo->va_handle = va_handle; + bo->initial_domain = initial; + bo->size = result.alloc_size; + bo->is_shared = true; + return (struct radeon_winsys_bo *)bo; +error_va_map: + amdgpu_va_range_free(va_handle); + +error_query: + amdgpu_bo_free(result.buf_handle); + +error: + FREE(bo); + return NULL; +} + +static bool +radv_amdgpu_winsys_get_fd(struct radeon_winsys *_ws, + struct radeon_winsys_bo *_bo, + int *fd) +{ + struct radv_amdgpu_winsys_bo *bo = radv_amdgpu_winsys_bo(_bo); + enum amdgpu_bo_handle_type type = amdgpu_bo_handle_type_dma_buf_fd; + int r; + unsigned handle; + r = amdgpu_bo_export(bo->bo, type, &handle); + if (r) + return false; + + *fd = (int)handle; + bo->is_shared = true; + return true; +} + +static unsigned radv_eg_tile_split_rev(unsigned eg_tile_split) +{ + switch (eg_tile_split) { + case 64: return 0; + case 128: return 1; + case 256: return 2; + case 512: return 3; + default: + case 1024: return 4; + case 2048: return 5; + case 4096: return 6; + } +} + +static void +radv_amdgpu_winsys_bo_set_metadata(struct radeon_winsys_bo *_bo, + struct radeon_bo_metadata *md) +{ + struct radv_amdgpu_winsys_bo *bo = radv_amdgpu_winsys_bo(_bo); + struct amdgpu_bo_metadata metadata = {0}; + uint32_t tiling_flags = 0; + + if (md->macrotile == RADEON_LAYOUT_TILED) + tiling_flags |= AMDGPU_TILING_SET(ARRAY_MODE, 4); /* 2D_TILED_THIN1 */ + else if (md->microtile == RADEON_LAYOUT_TILED) + tiling_flags |= AMDGPU_TILING_SET(ARRAY_MODE, 2); /* 1D_TILED_THIN1 */ + else + tiling_flags |= AMDGPU_TILING_SET(ARRAY_MODE, 1); /* LINEAR_ALIGNED */ + + tiling_flags |= AMDGPU_TILING_SET(PIPE_CONFIG, md->pipe_config); + tiling_flags |= AMDGPU_TILING_SET(BANK_WIDTH, util_logbase2(md->bankw)); + tiling_flags |= AMDGPU_TILING_SET(BANK_HEIGHT, util_logbase2(md->bankh)); + if (md->tile_split) + tiling_flags |= AMDGPU_TILING_SET(TILE_SPLIT, radv_eg_tile_split_rev(md->tile_split)); + tiling_flags |= AMDGPU_TILING_SET(MACRO_TILE_ASPECT, util_logbase2(md->mtilea)); + tiling_flags |= AMDGPU_TILING_SET(NUM_BANKS, util_logbase2(md->num_banks)-1); + + if (md->scanout) + tiling_flags |= AMDGPU_TILING_SET(MICRO_TILE_MODE, 0); /* DISPLAY_MICRO_TILING */ + else + tiling_flags |= AMDGPU_TILING_SET(MICRO_TILE_MODE, 1); /* THIN_MICRO_TILING */ + + metadata.tiling_info = tiling_flags; + metadata.size_metadata = md->size_metadata; + memcpy(metadata.umd_metadata, md->metadata, sizeof(md->metadata)); + + amdgpu_bo_set_metadata(bo->bo, &metadata); +} + +void radv_amdgpu_bo_init_functions(struct radv_amdgpu_winsys *ws) +{ + ws->base.buffer_create = radv_amdgpu_winsys_bo_create; + ws->base.buffer_destroy = radv_amdgpu_winsys_bo_destroy; + ws->base.buffer_get_va = radv_amdgpu_winsys_bo_get_va; + ws->base.buffer_map = radv_amdgpu_winsys_bo_map; + ws->base.buffer_unmap = radv_amdgpu_winsys_bo_unmap; + ws->base.buffer_from_fd = radv_amdgpu_winsys_bo_from_fd; + ws->base.buffer_get_fd = radv_amdgpu_winsys_get_fd; + ws->base.buffer_set_metadata = radv_amdgpu_winsys_bo_set_metadata; +} diff -Nru mesa-12.0.6/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.h mesa-17.0.7/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.h --- mesa-12.0.6/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,55 @@ +/* + * Copyright © 2016 Red Hat. + * Copyright © 2016 Bas Nieuwenhuizen + * + * based on amdgpu winsys. + * Copyright © 2011 Marek Olšák + * Copyright © 2015 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef RADV_AMDGPU_BO_H +#define RADV_AMDGPU_BO_H + +#include "radv_amdgpu_winsys.h" + +struct radv_amdgpu_winsys_bo { + amdgpu_bo_handle bo; + amdgpu_va_handle va_handle; + + uint64_t va; + enum radeon_bo_domain initial_domain; + uint64_t size; + bool is_shared; + + struct radv_amdgpu_winsys *ws; + struct list_head global_list_item; +}; + +static inline +struct radv_amdgpu_winsys_bo *radv_amdgpu_winsys_bo(struct radeon_winsys_bo *bo) +{ + return (struct radv_amdgpu_winsys_bo *)bo; +} + +void radv_amdgpu_bo_init_functions(struct radv_amdgpu_winsys *ws); + +#endif /* RADV_AMDGPU_BO_H */ diff -Nru mesa-12.0.6/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c mesa-17.0.7/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c --- mesa-12.0.6/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,890 @@ +/* + * Copyright © 2016 Red Hat. + * Copyright © 2016 Bas Nieuwenhuizen + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include +#include +#include +#include + +#include "ac_debug.h" +#include "amdgpu_id.h" +#include "radv_radeon_winsys.h" +#include "radv_amdgpu_cs.h" +#include "radv_amdgpu_bo.h" +#include "sid.h" + +struct radv_amdgpu_cs { + struct radeon_winsys_cs base; + struct radv_amdgpu_winsys *ws; + + struct amdgpu_cs_ib_info ib; + + struct radeon_winsys_bo *ib_buffer; + uint8_t *ib_mapped; + unsigned max_num_buffers; + unsigned num_buffers; + amdgpu_bo_handle *handles; + uint8_t *priorities; + + struct radeon_winsys_bo **old_ib_buffers; + unsigned num_old_ib_buffers; + unsigned max_num_old_ib_buffers; + unsigned *ib_size_ptr; + bool failed; + bool is_chained; + + int buffer_hash_table[1024]; + unsigned hw_ip; +}; + +static inline struct radv_amdgpu_cs * +radv_amdgpu_cs(struct radeon_winsys_cs *base) +{ + return (struct radv_amdgpu_cs*)base; +} + +static int ring_to_hw_ip(enum ring_type ring) +{ + switch (ring) { + case RING_GFX: + return AMDGPU_HW_IP_GFX; + case RING_DMA: + return AMDGPU_HW_IP_DMA; + case RING_COMPUTE: + return AMDGPU_HW_IP_COMPUTE; + default: + unreachable("unsupported ring"); + } +} + +static void radv_amdgpu_request_to_fence(struct radv_amdgpu_ctx *ctx, + struct amdgpu_cs_fence *fence, + struct amdgpu_cs_request *req) +{ + fence->context = ctx->ctx; + fence->ip_type = req->ip_type; + fence->ip_instance = req->ip_instance; + fence->ring = req->ring; + fence->fence = req->seq_no; +} + +static struct radeon_winsys_fence *radv_amdgpu_create_fence() +{ + struct radv_amdgpu_cs_fence *fence = calloc(1, sizeof(struct amdgpu_cs_fence)); + return (struct radeon_winsys_fence*)fence; +} + +static void radv_amdgpu_destroy_fence(struct radeon_winsys_fence *_fence) +{ + struct amdgpu_cs_fence *fence = (struct amdgpu_cs_fence *)_fence; + free(fence); +} + +static bool radv_amdgpu_fence_wait(struct radeon_winsys *_ws, + struct radeon_winsys_fence *_fence, + bool absolute, + uint64_t timeout) +{ + struct amdgpu_cs_fence *fence = (struct amdgpu_cs_fence *)_fence; + unsigned flags = absolute ? AMDGPU_QUERY_FENCE_TIMEOUT_IS_ABSOLUTE : 0; + int r; + uint32_t expired = 0; + + /* Now use the libdrm query. */ + r = amdgpu_cs_query_fence_status(fence, + timeout, + flags, + &expired); + + if (r) { + fprintf(stderr, "amdgpu: radv_amdgpu_cs_query_fence_status failed.\n"); + return false; + } + + if (expired) + return true; + + return false; +} + +static void radv_amdgpu_cs_destroy(struct radeon_winsys_cs *rcs) +{ + struct radv_amdgpu_cs *cs = radv_amdgpu_cs(rcs); + + if (cs->ib_buffer) + cs->ws->base.buffer_destroy(cs->ib_buffer); + else + free(cs->base.buf); + + for (unsigned i = 0; i < cs->num_old_ib_buffers; ++i) + cs->ws->base.buffer_destroy(cs->old_ib_buffers[i]); + + free(cs->old_ib_buffers); + free(cs->handles); + free(cs->priorities); + free(cs); +} + +static boolean radv_amdgpu_init_cs(struct radv_amdgpu_cs *cs, + enum ring_type ring_type) +{ + for (int i = 0; i < ARRAY_SIZE(cs->buffer_hash_table); ++i) + cs->buffer_hash_table[i] = -1; + + cs->hw_ip = ring_to_hw_ip(ring_type); + return true; +} + +static struct radeon_winsys_cs * +radv_amdgpu_cs_create(struct radeon_winsys *ws, + enum ring_type ring_type) +{ + struct radv_amdgpu_cs *cs; + uint32_t ib_size = 20 * 1024 * 4; + cs = calloc(1, sizeof(struct radv_amdgpu_cs)); + if (!cs) + return NULL; + + cs->ws = radv_amdgpu_winsys(ws); + radv_amdgpu_init_cs(cs, ring_type); + + if (cs->ws->use_ib_bos) { + cs->ib_buffer = ws->buffer_create(ws, ib_size, 0, + RADEON_DOMAIN_GTT, + RADEON_FLAG_CPU_ACCESS); + if (!cs->ib_buffer) { + free(cs); + return NULL; + } + + cs->ib_mapped = ws->buffer_map(cs->ib_buffer); + if (!cs->ib_mapped) { + ws->buffer_destroy(cs->ib_buffer); + free(cs); + return NULL; + } + + cs->ib.ib_mc_address = radv_amdgpu_winsys_bo(cs->ib_buffer)->va; + cs->base.buf = (uint32_t *)cs->ib_mapped; + cs->base.max_dw = ib_size / 4 - 4; + cs->ib_size_ptr = &cs->ib.size; + cs->ib.size = 0; + + ws->cs_add_buffer(&cs->base, cs->ib_buffer, 8); + } else { + cs->base.buf = malloc(16384); + cs->base.max_dw = 4096; + if (!cs->base.buf) { + free(cs); + return NULL; + } + } + + return &cs->base; +} + +static void radv_amdgpu_cs_grow(struct radeon_winsys_cs *_cs, size_t min_size) +{ + struct radv_amdgpu_cs *cs = radv_amdgpu_cs(_cs); + + if (cs->failed) { + cs->base.cdw = 0; + return; + } + + if (!cs->ws->use_ib_bos) { + const uint64_t limit_dws = 0xffff8; + uint64_t ib_dws = MAX2(cs->base.cdw + min_size, + MIN2(cs->base.max_dw * 2, limit_dws)); + + /* The total ib size cannot exceed limit_dws dwords. */ + if (ib_dws > limit_dws) + { + cs->failed = true; + cs->base.cdw = 0; + return; + } + + uint32_t *new_buf = realloc(cs->base.buf, ib_dws * 4); + if (new_buf) { + cs->base.buf = new_buf; + cs->base.max_dw = ib_dws; + } else { + cs->failed = true; + cs->base.cdw = 0; + } + return; + } + + uint64_t ib_size = MAX2(min_size * 4 + 16, cs->base.max_dw * 4 * 2); + + /* max that fits in the chain size field. */ + ib_size = MIN2(ib_size, 0xfffff); + + while (!cs->base.cdw || (cs->base.cdw & 7) != 4) + cs->base.buf[cs->base.cdw++] = 0xffff1000; + + *cs->ib_size_ptr |= cs->base.cdw + 4; + + if (cs->num_old_ib_buffers == cs->max_num_old_ib_buffers) { + cs->max_num_old_ib_buffers = MAX2(1, cs->max_num_old_ib_buffers * 2); + cs->old_ib_buffers = realloc(cs->old_ib_buffers, + cs->max_num_old_ib_buffers * sizeof(void*)); + } + + cs->old_ib_buffers[cs->num_old_ib_buffers++] = cs->ib_buffer; + + cs->ib_buffer = cs->ws->base.buffer_create(&cs->ws->base, ib_size, 0, + RADEON_DOMAIN_GTT, + RADEON_FLAG_CPU_ACCESS); + + if (!cs->ib_buffer) { + cs->base.cdw = 0; + cs->failed = true; + cs->ib_buffer = cs->old_ib_buffers[--cs->num_old_ib_buffers]; + } + + cs->ib_mapped = cs->ws->base.buffer_map(cs->ib_buffer); + if (!cs->ib_mapped) { + cs->ws->base.buffer_destroy(cs->ib_buffer); + cs->base.cdw = 0; + cs->failed = true; + cs->ib_buffer = cs->old_ib_buffers[--cs->num_old_ib_buffers]; + } + + cs->ws->base.cs_add_buffer(&cs->base, cs->ib_buffer, 8); + + cs->base.buf[cs->base.cdw++] = PKT3(PKT3_INDIRECT_BUFFER_CIK, 2, 0); + cs->base.buf[cs->base.cdw++] = radv_amdgpu_winsys_bo(cs->ib_buffer)->va; + cs->base.buf[cs->base.cdw++] = radv_amdgpu_winsys_bo(cs->ib_buffer)->va >> 32; + cs->ib_size_ptr = cs->base.buf + cs->base.cdw; + cs->base.buf[cs->base.cdw++] = S_3F2_CHAIN(1) | S_3F2_VALID(1); + + cs->base.buf = (uint32_t *)cs->ib_mapped; + cs->base.cdw = 0; + cs->base.max_dw = ib_size / 4 - 4; + +} + +static bool radv_amdgpu_cs_finalize(struct radeon_winsys_cs *_cs) +{ + struct radv_amdgpu_cs *cs = radv_amdgpu_cs(_cs); + + if (cs->ws->use_ib_bos) { + while (!cs->base.cdw || (cs->base.cdw & 7) != 0) + cs->base.buf[cs->base.cdw++] = 0xffff1000; + + *cs->ib_size_ptr |= cs->base.cdw; + + cs->is_chained = false; + } + + return !cs->failed; +} + +static void radv_amdgpu_cs_reset(struct radeon_winsys_cs *_cs) +{ + struct radv_amdgpu_cs *cs = radv_amdgpu_cs(_cs); + cs->base.cdw = 0; + cs->failed = false; + + for (unsigned i = 0; i < cs->num_buffers; ++i) { + unsigned hash = ((uintptr_t)cs->handles[i] >> 6) & + (ARRAY_SIZE(cs->buffer_hash_table) - 1); + cs->buffer_hash_table[hash] = -1; + } + + cs->num_buffers = 0; + + if (cs->ws->use_ib_bos) { + cs->ws->base.cs_add_buffer(&cs->base, cs->ib_buffer, 8); + + for (unsigned i = 0; i < cs->num_old_ib_buffers; ++i) + cs->ws->base.buffer_destroy(cs->old_ib_buffers[i]); + + cs->num_old_ib_buffers = 0; + cs->ib.ib_mc_address = radv_amdgpu_winsys_bo(cs->ib_buffer)->va; + cs->ib_size_ptr = &cs->ib.size; + cs->ib.size = 0; + } +} + +static int radv_amdgpu_cs_find_buffer(struct radv_amdgpu_cs *cs, + amdgpu_bo_handle bo) +{ + unsigned hash = ((uintptr_t)bo >> 6) & (ARRAY_SIZE(cs->buffer_hash_table) - 1); + int index = cs->buffer_hash_table[hash]; + + if (index == -1) + return -1; + + if (cs->handles[index] == bo) + return index; + + for (unsigned i = 0; i < cs->num_buffers; ++i) { + if (cs->handles[i] == bo) { + cs->buffer_hash_table[hash] = i; + return i; + } + } + + return -1; +} + +static void radv_amdgpu_cs_add_buffer_internal(struct radv_amdgpu_cs *cs, + amdgpu_bo_handle bo, + uint8_t priority) +{ + unsigned hash; + int index = radv_amdgpu_cs_find_buffer(cs, bo); + + if (index != -1) { + cs->priorities[index] = MAX2(cs->priorities[index], priority); + return; + } + + if (cs->num_buffers == cs->max_num_buffers) { + unsigned new_count = MAX2(1, cs->max_num_buffers * 2); + cs->handles = realloc(cs->handles, new_count * sizeof(amdgpu_bo_handle)); + cs->priorities = realloc(cs->priorities, new_count * sizeof(uint8_t)); + cs->max_num_buffers = new_count; + } + + cs->handles[cs->num_buffers] = bo; + cs->priorities[cs->num_buffers] = priority; + + hash = ((uintptr_t)bo >> 6) & (ARRAY_SIZE(cs->buffer_hash_table) - 1); + cs->buffer_hash_table[hash] = cs->num_buffers; + + ++cs->num_buffers; +} + +static void radv_amdgpu_cs_add_buffer(struct radeon_winsys_cs *_cs, + struct radeon_winsys_bo *_bo, + uint8_t priority) +{ + struct radv_amdgpu_cs *cs = radv_amdgpu_cs(_cs); + struct radv_amdgpu_winsys_bo *bo = radv_amdgpu_winsys_bo(_bo); + + radv_amdgpu_cs_add_buffer_internal(cs, bo->bo, priority); +} + +static void radv_amdgpu_cs_execute_secondary(struct radeon_winsys_cs *_parent, + struct radeon_winsys_cs *_child) +{ + struct radv_amdgpu_cs *parent = radv_amdgpu_cs(_parent); + struct radv_amdgpu_cs *child = radv_amdgpu_cs(_child); + + for (unsigned i = 0; i < child->num_buffers; ++i) { + radv_amdgpu_cs_add_buffer_internal(parent, child->handles[i], + child->priorities[i]); + } + + if (parent->ws->use_ib_bos) { + if (parent->base.cdw + 4 > parent->base.max_dw) + radv_amdgpu_cs_grow(&parent->base, 4); + + parent->base.buf[parent->base.cdw++] = PKT3(PKT3_INDIRECT_BUFFER_CIK, 2, 0); + parent->base.buf[parent->base.cdw++] = child->ib.ib_mc_address; + parent->base.buf[parent->base.cdw++] = child->ib.ib_mc_address >> 32; + parent->base.buf[parent->base.cdw++] = child->ib.size; + } else { + if (parent->base.cdw + child->base.cdw > parent->base.max_dw) + radv_amdgpu_cs_grow(&parent->base, child->base.cdw); + + memcpy(parent->base.buf + parent->base.cdw, child->base.buf, 4 * child->base.cdw); + parent->base.cdw += child->base.cdw; + } +} + +static int radv_amdgpu_create_bo_list(struct radv_amdgpu_winsys *ws, + struct radeon_winsys_cs **cs_array, + unsigned count, + struct radv_amdgpu_winsys_bo *extra_bo, + amdgpu_bo_list_handle *bo_list) +{ + int r; + if (ws->debug_all_bos) { + struct radv_amdgpu_winsys_bo *bo; + amdgpu_bo_handle *handles; + unsigned num = 0; + + pthread_mutex_lock(&ws->global_bo_list_lock); + + handles = malloc(sizeof(handles[0]) * ws->num_buffers); + if (!handles) { + pthread_mutex_unlock(&ws->global_bo_list_lock); + return -ENOMEM; + } + + LIST_FOR_EACH_ENTRY(bo, &ws->global_bo_list, global_list_item) { + assert(num < ws->num_buffers); + handles[num++] = bo->bo; + } + + r = amdgpu_bo_list_create(ws->dev, ws->num_buffers, + handles, NULL, + bo_list); + free(handles); + pthread_mutex_unlock(&ws->global_bo_list_lock); + } else if (count == 1 && !extra_bo) { + struct radv_amdgpu_cs *cs = (struct radv_amdgpu_cs*)cs_array[0]; + r = amdgpu_bo_list_create(ws->dev, cs->num_buffers, cs->handles, + cs->priorities, bo_list); + } else { + unsigned total_buffer_count = !!extra_bo; + unsigned unique_bo_count = !!extra_bo; + for (unsigned i = 0; i < count; ++i) { + struct radv_amdgpu_cs *cs = (struct radv_amdgpu_cs*)cs_array[i]; + total_buffer_count += cs->num_buffers; + } + + amdgpu_bo_handle *handles = malloc(sizeof(amdgpu_bo_handle) * total_buffer_count); + uint8_t *priorities = malloc(sizeof(uint8_t) * total_buffer_count); + if (!handles || !priorities) { + free(handles); + free(priorities); + return -ENOMEM; + } + + if (extra_bo) { + handles[0] = extra_bo->bo; + priorities[0] = 8; + } + + for (unsigned i = 0; i < count; ++i) { + struct radv_amdgpu_cs *cs = (struct radv_amdgpu_cs*)cs_array[i]; + for (unsigned j = 0; j < cs->num_buffers; ++j) { + bool found = false; + for (unsigned k = 0; k < unique_bo_count; ++k) { + if (handles[k] == cs->handles[j]) { + found = true; + priorities[k] = MAX2(priorities[k], + cs->priorities[j]); + break; + } + } + if (!found) { + handles[unique_bo_count] = cs->handles[j]; + priorities[unique_bo_count] = cs->priorities[j]; + ++unique_bo_count; + } + } + } + r = amdgpu_bo_list_create(ws->dev, unique_bo_count, handles, + priorities, bo_list); + + free(handles); + free(priorities); + } + + return r; +} + +static void radv_assign_last_submit(struct radv_amdgpu_ctx *ctx, + struct amdgpu_cs_request *request) +{ + radv_amdgpu_request_to_fence(ctx, + &ctx->last_submission[request->ip_type][request->ring], + request); +} + +static int radv_amdgpu_winsys_cs_submit_chained(struct radeon_winsys_ctx *_ctx, + int queue_idx, + struct radeon_winsys_cs **cs_array, + unsigned cs_count, + struct radeon_winsys_fence *_fence) +{ + int r; + struct radv_amdgpu_ctx *ctx = radv_amdgpu_ctx(_ctx); + struct amdgpu_cs_fence *fence = (struct amdgpu_cs_fence *)_fence; + struct radv_amdgpu_cs *cs0 = radv_amdgpu_cs(cs_array[0]); + amdgpu_bo_list_handle bo_list; + struct amdgpu_cs_request request = {0}; + + for (unsigned i = cs_count; i--;) { + struct radv_amdgpu_cs *cs = radv_amdgpu_cs(cs_array[i]); + + if (cs->is_chained) { + *cs->ib_size_ptr -= 4; + cs->is_chained = false; + } + + if (i + 1 < cs_count) { + struct radv_amdgpu_cs *next = radv_amdgpu_cs(cs_array[i + 1]); + assert(cs->base.cdw + 4 <= cs->base.max_dw); + + cs->is_chained = true; + *cs->ib_size_ptr += 4; + + cs->base.buf[cs->base.cdw + 0] = PKT3(PKT3_INDIRECT_BUFFER_CIK, 2, 0); + cs->base.buf[cs->base.cdw + 1] = next->ib.ib_mc_address; + cs->base.buf[cs->base.cdw + 2] = next->ib.ib_mc_address >> 32; + cs->base.buf[cs->base.cdw + 3] = S_3F2_CHAIN(1) | S_3F2_VALID(1) | next->ib.size; + } + } + + r = radv_amdgpu_create_bo_list(cs0->ws, cs_array, cs_count, NULL, &bo_list); + if (r) { + fprintf(stderr, "amdgpu: Failed to created the BO list for submission\n"); + return r; + } + + request.ip_type = cs0->hw_ip; + request.ring = queue_idx; + request.number_of_ibs = 1; + request.ibs = &cs0->ib; + request.resources = bo_list; + + r = amdgpu_cs_submit(ctx->ctx, 0, &request, 1); + if (r) { + if (r == -ENOMEM) + fprintf(stderr, "amdgpu: Not enough memory for command submission.\n"); + else + fprintf(stderr, "amdgpu: The CS has been rejected, " + "see dmesg for more information.\n"); + } + + amdgpu_bo_list_destroy(bo_list); + + if (fence) + radv_amdgpu_request_to_fence(ctx, fence, &request); + + radv_assign_last_submit(ctx, &request); + + return r; +} + +static int radv_amdgpu_winsys_cs_submit_fallback(struct radeon_winsys_ctx *_ctx, + int queue_idx, + struct radeon_winsys_cs **cs_array, + unsigned cs_count, + struct radeon_winsys_fence *_fence) +{ + int r; + struct radv_amdgpu_ctx *ctx = radv_amdgpu_ctx(_ctx); + struct amdgpu_cs_fence *fence = (struct amdgpu_cs_fence *)_fence; + amdgpu_bo_list_handle bo_list; + struct amdgpu_cs_request request; + + assert(cs_count); + + for (unsigned i = 0; i < cs_count;) { + struct radv_amdgpu_cs *cs0 = radv_amdgpu_cs(cs_array[i]); + struct amdgpu_cs_ib_info ibs[AMDGPU_CS_MAX_IBS_PER_SUBMIT]; + unsigned cnt = MIN2(AMDGPU_CS_MAX_IBS_PER_SUBMIT, cs_count - i); + + memset(&request, 0, sizeof(request)); + + r = radv_amdgpu_create_bo_list(cs0->ws, &cs_array[i], cnt, NULL, &bo_list); + if (r) { + fprintf(stderr, "amdgpu: Failed to created the BO list for submission\n"); + return r; + } + + request.ip_type = cs0->hw_ip; + request.ring = queue_idx; + request.resources = bo_list; + request.number_of_ibs = cnt; + request.ibs = ibs; + + for (unsigned j = 0; j < cnt; ++j) { + struct radv_amdgpu_cs *cs = radv_amdgpu_cs(cs_array[i + j]); + ibs[j] = cs->ib; + + if (cs->is_chained) { + *cs->ib_size_ptr -= 4; + cs->is_chained = false; + } + } + + r = amdgpu_cs_submit(ctx->ctx, 0, &request, 1); + if (r) { + if (r == -ENOMEM) + fprintf(stderr, "amdgpu: Not enough memory for command submission.\n"); + else + fprintf(stderr, "amdgpu: The CS has been rejected, " + "see dmesg for more information.\n"); + } + + amdgpu_bo_list_destroy(bo_list); + + if (r) + return r; + + i += cnt; + } + if (fence) + radv_amdgpu_request_to_fence(ctx, fence, &request); + + radv_assign_last_submit(ctx, &request); + + return 0; +} + +static int radv_amdgpu_winsys_cs_submit_sysmem(struct radeon_winsys_ctx *_ctx, + int queue_idx, + struct radeon_winsys_cs **cs_array, + unsigned cs_count, + struct radeon_winsys_fence *_fence) +{ + int r; + struct radv_amdgpu_ctx *ctx = radv_amdgpu_ctx(_ctx); + struct amdgpu_cs_fence *fence = (struct amdgpu_cs_fence *)_fence; + struct radv_amdgpu_cs *cs0 = radv_amdgpu_cs(cs_array[0]); + struct radeon_winsys *ws = (struct radeon_winsys*)cs0->ws; + amdgpu_bo_list_handle bo_list; + struct amdgpu_cs_request request; + uint32_t pad_word = 0xffff1000U; + + if (radv_amdgpu_winsys(ws)->family == FAMILY_SI) + pad_word = 0x80000000; + + assert(cs_count); + + for (unsigned i = 0; i < cs_count;) { + struct amdgpu_cs_ib_info ib = {0}; + struct radeon_winsys_bo *bo = NULL; + uint32_t *ptr; + unsigned cnt = 0; + unsigned size = 0; + + while (i + cnt < cs_count && 0xffff8 - size >= radv_amdgpu_cs(cs_array[i + cnt])->base.cdw) { + size += radv_amdgpu_cs(cs_array[i + cnt])->base.cdw; + ++cnt; + } + + assert(cnt); + + bo = ws->buffer_create(ws, 4 * size, 4096, RADEON_DOMAIN_GTT, RADEON_FLAG_CPU_ACCESS); + ptr = ws->buffer_map(bo); + + for (unsigned j = 0; j < cnt; ++j) { + struct radv_amdgpu_cs *cs = radv_amdgpu_cs(cs_array[i + j]); + memcpy(ptr, cs->base.buf, 4 * cs->base.cdw); + ptr += cs->base.cdw; + + } + + while(!size || (size & 7)) { + *ptr++ = pad_word; + ++size; + } + + memset(&request, 0, sizeof(request)); + + + r = radv_amdgpu_create_bo_list(cs0->ws, &cs_array[i], cnt, + (struct radv_amdgpu_winsys_bo*)bo, &bo_list); + if (r) { + fprintf(stderr, "amdgpu: Failed to created the BO list for submission\n"); + return r; + } + + ib.size = size; + ib.ib_mc_address = ws->buffer_get_va(bo); + + request.ip_type = cs0->hw_ip; + request.ring = queue_idx; + request.resources = bo_list; + request.number_of_ibs = 1; + request.ibs = &ib; + + r = amdgpu_cs_submit(ctx->ctx, 0, &request, 1); + if (r) { + if (r == -ENOMEM) + fprintf(stderr, "amdgpu: Not enough memory for command submission.\n"); + else + fprintf(stderr, "amdgpu: The CS has been rejected, " + "see dmesg for more information.\n"); + } + + amdgpu_bo_list_destroy(bo_list); + + ws->buffer_destroy(bo); + if (r) + return r; + + i += cnt; + } + if (fence) + radv_amdgpu_request_to_fence(ctx, fence, &request); + + radv_assign_last_submit(ctx, &request); + + return 0; +} + +static int radv_amdgpu_winsys_cs_submit(struct radeon_winsys_ctx *_ctx, + int queue_idx, + struct radeon_winsys_cs **cs_array, + unsigned cs_count, + struct radeon_winsys_sem **wait_sem, + unsigned wait_sem_count, + struct radeon_winsys_sem **signal_sem, + unsigned signal_sem_count, + bool can_patch, + struct radeon_winsys_fence *_fence) +{ + struct radv_amdgpu_cs *cs = radv_amdgpu_cs(cs_array[0]); + struct radv_amdgpu_ctx *ctx = radv_amdgpu_ctx(_ctx); + int ret; + int i; + + for (i = 0; i < wait_sem_count; i++) { + amdgpu_semaphore_handle sem = (amdgpu_semaphore_handle)wait_sem[i]; + amdgpu_cs_wait_semaphore(ctx->ctx, cs->hw_ip, 0, queue_idx, + sem); + } + if (!cs->ws->use_ib_bos) { + ret = radv_amdgpu_winsys_cs_submit_sysmem(_ctx, queue_idx, cs_array, + cs_count, _fence); + } else if (can_patch && cs_count > AMDGPU_CS_MAX_IBS_PER_SUBMIT && false) { + ret = radv_amdgpu_winsys_cs_submit_chained(_ctx, queue_idx, cs_array, + cs_count, _fence); + } else { + ret = radv_amdgpu_winsys_cs_submit_fallback(_ctx, queue_idx, cs_array, + cs_count, _fence); + } + + for (i = 0; i < signal_sem_count; i++) { + amdgpu_semaphore_handle sem = (amdgpu_semaphore_handle)signal_sem[i]; + amdgpu_cs_signal_semaphore(ctx->ctx, cs->hw_ip, 0, queue_idx, + sem); + } + return ret; +} + + +static void *radv_amdgpu_winsys_get_cpu_addr(void *_cs, uint64_t addr) +{ + struct radv_amdgpu_cs *cs = (struct radv_amdgpu_cs *)_cs; + void *ret = NULL; + for (unsigned i = 0; i <= cs->num_old_ib_buffers; ++i) { + struct radv_amdgpu_winsys_bo *bo; + + bo = (struct radv_amdgpu_winsys_bo*) + (i == cs->num_old_ib_buffers ? cs->ib_buffer : cs->old_ib_buffers[i]); + if (addr >= bo->va && addr - bo->va < bo->size) { + if (amdgpu_bo_cpu_map(bo->bo, &ret) == 0) + return (char *)ret + (addr - bo->va); + } + } + return ret; +} + +static void radv_amdgpu_winsys_cs_dump(struct radeon_winsys_cs *_cs, + FILE* file, + uint32_t trace_id) +{ + struct radv_amdgpu_cs *cs = (struct radv_amdgpu_cs *)_cs; + + ac_parse_ib(file, + radv_amdgpu_winsys_get_cpu_addr(cs, cs->ib.ib_mc_address), + cs->ib.size, trace_id, "main IB", cs->ws->info.chip_class, + radv_amdgpu_winsys_get_cpu_addr, cs); +} + +static struct radeon_winsys_ctx *radv_amdgpu_ctx_create(struct radeon_winsys *_ws) +{ + struct radv_amdgpu_winsys *ws = radv_amdgpu_winsys(_ws); + struct radv_amdgpu_ctx *ctx = CALLOC_STRUCT(radv_amdgpu_ctx); + int r; + + if (!ctx) + return NULL; + r = amdgpu_cs_ctx_create(ws->dev, &ctx->ctx); + if (r) { + fprintf(stderr, "amdgpu: radv_amdgpu_cs_ctx_create failed. (%i)\n", r); + goto error_create; + } + ctx->ws = ws; + return (struct radeon_winsys_ctx *)ctx; +error_create: + FREE(ctx); + return NULL; +} + +static void radv_amdgpu_ctx_destroy(struct radeon_winsys_ctx *rwctx) +{ + struct radv_amdgpu_ctx *ctx = (struct radv_amdgpu_ctx *)rwctx; + amdgpu_cs_ctx_free(ctx->ctx); + FREE(ctx); +} + +static bool radv_amdgpu_ctx_wait_idle(struct radeon_winsys_ctx *rwctx, + enum ring_type ring_type, int ring_index) +{ + struct radv_amdgpu_ctx *ctx = (struct radv_amdgpu_ctx *)rwctx; + int ip_type = ring_to_hw_ip(ring_type); + + if (ctx->last_submission[ip_type][ring_index].fence) { + uint32_t expired; + int ret = amdgpu_cs_query_fence_status(&ctx->last_submission[ip_type][ring_index], + 1000000000ull, 0, &expired); + + if (ret || !expired) + return false; + } + + return true; +} + +static struct radeon_winsys_sem *radv_amdgpu_create_sem(struct radeon_winsys *_ws) +{ + int ret; + amdgpu_semaphore_handle sem; + + ret = amdgpu_cs_create_semaphore(&sem); + if (ret) + return NULL; + return (struct radeon_winsys_sem *)sem; +} + +static void radv_amdgpu_destroy_sem(struct radeon_winsys_sem *_sem) +{ + amdgpu_semaphore_handle sem = (amdgpu_semaphore_handle)_sem; + amdgpu_cs_destroy_semaphore(sem); +} + +void radv_amdgpu_cs_init_functions(struct radv_amdgpu_winsys *ws) +{ + ws->base.ctx_create = radv_amdgpu_ctx_create; + ws->base.ctx_destroy = radv_amdgpu_ctx_destroy; + ws->base.ctx_wait_idle = radv_amdgpu_ctx_wait_idle; + ws->base.cs_create = radv_amdgpu_cs_create; + ws->base.cs_destroy = radv_amdgpu_cs_destroy; + ws->base.cs_grow = radv_amdgpu_cs_grow; + ws->base.cs_finalize = radv_amdgpu_cs_finalize; + ws->base.cs_reset = radv_amdgpu_cs_reset; + ws->base.cs_add_buffer = radv_amdgpu_cs_add_buffer; + ws->base.cs_execute_secondary = radv_amdgpu_cs_execute_secondary; + ws->base.cs_submit = radv_amdgpu_winsys_cs_submit; + ws->base.cs_dump = radv_amdgpu_winsys_cs_dump; + ws->base.create_fence = radv_amdgpu_create_fence; + ws->base.destroy_fence = radv_amdgpu_destroy_fence; + ws->base.create_sem = radv_amdgpu_create_sem; + ws->base.destroy_sem = radv_amdgpu_destroy_sem; + ws->base.fence_wait = radv_amdgpu_fence_wait; +} diff -Nru mesa-12.0.6/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.h mesa-17.0.7/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.h --- mesa-12.0.6/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,59 @@ +/* + * Copyright © 2016 Red Hat. + * Copyright © 2016 Bas Nieuwenhuizen + * + * based on amdgpu winsys. + * Copyright © 2011 Marek Olšák + * Copyright © 2015 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef RADV_AMDGPU_CS_H +#define RADV_AMDGPU_CS_H + +#include +#include +#include +#include "r600d_common.h" +#include + +#include "radv_radeon_winsys.h" +#include "radv_amdgpu_winsys.h" + +enum { + MAX_RINGS_PER_TYPE = 8 +}; + +struct radv_amdgpu_ctx { + struct radv_amdgpu_winsys *ws; + amdgpu_context_handle ctx; + struct amdgpu_cs_fence last_submission[AMDGPU_HW_IP_DMA + 1][MAX_RINGS_PER_TYPE]; +}; + +static inline struct radv_amdgpu_ctx * +radv_amdgpu_ctx(struct radeon_winsys_ctx *base) +{ + return (struct radv_amdgpu_ctx *)base; +} + +void radv_amdgpu_cs_init_functions(struct radv_amdgpu_winsys *ws); + +#endif /* RADV_AMDGPU_CS_H */ diff -Nru mesa-12.0.6/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c mesa-17.0.7/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c --- mesa-12.0.6/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,537 @@ +/* + * Copyright © 2016 Red Hat. + * Copyright © 2016 Bas Nieuwenhuizen + * + * based on amdgpu winsys. + * Copyright © 2011 Marek Olšák + * Copyright © 2015 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include + +#include "radv_private.h" +#include "addrlib/addrinterface.h" +#include "util/bitset.h" +#include "radv_amdgpu_winsys.h" +#include "radv_amdgpu_surface.h" +#include "sid.h" + +#ifndef NO_ENTRIES +#define NO_ENTRIES 32 +#endif + +#ifndef NO_MACRO_ENTRIES +#define NO_MACRO_ENTRIES 16 +#endif + +#ifndef CIASICIDGFXENGINE_SOUTHERNISLAND +#define CIASICIDGFXENGINE_SOUTHERNISLAND 0x0000000A +#endif + +static int radv_amdgpu_surface_sanity(const struct radeon_surf *surf) +{ + unsigned type = RADEON_SURF_GET(surf->flags, TYPE); + + if (!(surf->flags & RADEON_SURF_HAS_TILE_MODE_INDEX)) + return -EINVAL; + + /* all dimension must be at least 1 ! */ + if (!surf->npix_x || !surf->npix_y || !surf->npix_z || + !surf->array_size) + return -EINVAL; + + if (!surf->blk_w || !surf->blk_h || !surf->blk_d) + return -EINVAL; + + switch (surf->nsamples) { + case 1: + case 2: + case 4: + case 8: + break; + default: + return -EINVAL; + } + + switch (type) { + case RADEON_SURF_TYPE_1D: + if (surf->npix_y > 1) + return -EINVAL; + /* fall through */ + case RADEON_SURF_TYPE_2D: + case RADEON_SURF_TYPE_CUBEMAP: + if (surf->npix_z > 1 || surf->array_size > 1) + return -EINVAL; + break; + case RADEON_SURF_TYPE_3D: + if (surf->array_size > 1) + return -EINVAL; + break; + case RADEON_SURF_TYPE_1D_ARRAY: + if (surf->npix_y > 1) + return -EINVAL; + /* fall through */ + case RADEON_SURF_TYPE_2D_ARRAY: + if (surf->npix_z > 1) + return -EINVAL; + break; + default: + return -EINVAL; + } + return 0; +} + +static void *ADDR_API radv_allocSysMem(const ADDR_ALLOCSYSMEM_INPUT * pInput) +{ + return malloc(pInput->sizeInBytes); +} + +static ADDR_E_RETURNCODE ADDR_API radv_freeSysMem(const ADDR_FREESYSMEM_INPUT * pInput) +{ + free(pInput->pVirtAddr); + return ADDR_OK; +} + +ADDR_HANDLE radv_amdgpu_addr_create(struct amdgpu_gpu_info *amdinfo, int family, int rev_id, + enum chip_class chip_class) +{ + ADDR_CREATE_INPUT addrCreateInput = {0}; + ADDR_CREATE_OUTPUT addrCreateOutput = {0}; + ADDR_REGISTER_VALUE regValue = {0}; + ADDR_CREATE_FLAGS createFlags = {{0}}; + ADDR_E_RETURNCODE addrRet; + + addrCreateInput.size = sizeof(ADDR_CREATE_INPUT); + addrCreateOutput.size = sizeof(ADDR_CREATE_OUTPUT); + + regValue.noOfBanks = amdinfo->mc_arb_ramcfg & 0x3; + regValue.gbAddrConfig = amdinfo->gb_addr_cfg; + regValue.noOfRanks = (amdinfo->mc_arb_ramcfg & 0x4) >> 2; + + regValue.backendDisables = amdinfo->backend_disable[0]; + regValue.pTileConfig = amdinfo->gb_tile_mode; + regValue.noOfEntries = ARRAY_SIZE(amdinfo->gb_tile_mode); + if (chip_class == SI) { + regValue.pMacroTileConfig = NULL; + regValue.noOfMacroEntries = 0; + } else { + regValue.pMacroTileConfig = amdinfo->gb_macro_tile_mode; + regValue.noOfMacroEntries = ARRAY_SIZE(amdinfo->gb_macro_tile_mode); + } + + createFlags.value = 0; + createFlags.useTileIndex = 1; + createFlags.degradeBaseLevel = 1; + + addrCreateInput.chipEngine = CIASICIDGFXENGINE_SOUTHERNISLAND; + addrCreateInput.chipFamily = family; + addrCreateInput.chipRevision = rev_id; + addrCreateInput.createFlags = createFlags; + addrCreateInput.callbacks.allocSysMem = radv_allocSysMem; + addrCreateInput.callbacks.freeSysMem = radv_freeSysMem; + addrCreateInput.callbacks.debugPrint = 0; + addrCreateInput.regValue = regValue; + + addrRet = AddrCreate(&addrCreateInput, &addrCreateOutput); + if (addrRet != ADDR_OK) + return NULL; + + return addrCreateOutput.hLib; +} + +static int radv_compute_level(ADDR_HANDLE addrlib, + struct radeon_surf *surf, bool is_stencil, + unsigned level, unsigned type, bool compressed, + ADDR_COMPUTE_SURFACE_INFO_INPUT *AddrSurfInfoIn, + ADDR_COMPUTE_SURFACE_INFO_OUTPUT *AddrSurfInfoOut, + ADDR_COMPUTE_DCCINFO_INPUT *AddrDccIn, + ADDR_COMPUTE_DCCINFO_OUTPUT *AddrDccOut) +{ + struct radeon_surf_level *surf_level; + ADDR_E_RETURNCODE ret; + + AddrSurfInfoIn->mipLevel = level; + AddrSurfInfoIn->width = u_minify(surf->npix_x, level); + AddrSurfInfoIn->height = u_minify(surf->npix_y, level); + + if (type == RADEON_SURF_TYPE_3D) + AddrSurfInfoIn->numSlices = u_minify(surf->npix_z, level); + else if (type == RADEON_SURF_TYPE_CUBEMAP) + AddrSurfInfoIn->numSlices = 6; + else + AddrSurfInfoIn->numSlices = surf->array_size; + + if (level > 0) { + /* Set the base level pitch. This is needed for calculation + * of non-zero levels. */ + if (is_stencil) + AddrSurfInfoIn->basePitch = surf->stencil_level[0].nblk_x; + else + AddrSurfInfoIn->basePitch = surf->level[0].nblk_x; + + /* Convert blocks to pixels for compressed formats. */ + if (compressed) + AddrSurfInfoIn->basePitch *= surf->blk_w; + } + + ret = AddrComputeSurfaceInfo(addrlib, + AddrSurfInfoIn, + AddrSurfInfoOut); + if (ret != ADDR_OK) + return ret; + + surf_level = is_stencil ? &surf->stencil_level[level] : &surf->level[level]; + surf_level->offset = align64(surf->bo_size, AddrSurfInfoOut->baseAlign); + surf_level->slice_size = AddrSurfInfoOut->sliceSize; + surf_level->pitch_bytes = AddrSurfInfoOut->pitch * (is_stencil ? 1 : surf->bpe); + surf_level->npix_x = u_minify(surf->npix_x, level); + surf_level->npix_y = u_minify(surf->npix_y, level); + surf_level->npix_z = u_minify(surf->npix_z, level); + surf_level->nblk_x = AddrSurfInfoOut->pitch; + surf_level->nblk_y = AddrSurfInfoOut->height; + if (type == RADEON_SURF_TYPE_3D) + surf_level->nblk_z = AddrSurfInfoOut->depth; + else + surf_level->nblk_z = 1; + + switch (AddrSurfInfoOut->tileMode) { + case ADDR_TM_LINEAR_ALIGNED: + surf_level->mode = RADEON_SURF_MODE_LINEAR_ALIGNED; + break; + case ADDR_TM_1D_TILED_THIN1: + surf_level->mode = RADEON_SURF_MODE_1D; + break; + case ADDR_TM_2D_TILED_THIN1: + surf_level->mode = RADEON_SURF_MODE_2D; + break; + default: + assert(0); + } + + if (is_stencil) + surf->stencil_tiling_index[level] = AddrSurfInfoOut->tileIndex; + else + surf->tiling_index[level] = AddrSurfInfoOut->tileIndex; + + surf->bo_size = surf_level->offset + AddrSurfInfoOut->surfSize; + + /* Clear DCC fields at the beginning. */ + surf_level->dcc_offset = 0; + surf_level->dcc_enabled = false; + + /* The previous level's flag tells us if we can use DCC for this level. */ + if (AddrSurfInfoIn->flags.dccCompatible && + (level == 0 || AddrDccOut->subLvlCompressible)) { + AddrDccIn->colorSurfSize = AddrSurfInfoOut->surfSize; + AddrDccIn->tileMode = AddrSurfInfoOut->tileMode; + AddrDccIn->tileInfo = *AddrSurfInfoOut->pTileInfo; + AddrDccIn->tileIndex = AddrSurfInfoOut->tileIndex; + AddrDccIn->macroModeIndex = AddrSurfInfoOut->macroModeIndex; + + ret = AddrComputeDccInfo(addrlib, + AddrDccIn, + AddrDccOut); + + if (ret == ADDR_OK) { + surf_level->dcc_offset = surf->dcc_size; + surf_level->dcc_fast_clear_size = AddrDccOut->dccFastClearSize; + surf_level->dcc_enabled = true; + surf->dcc_size = surf_level->dcc_offset + AddrDccOut->dccRamSize; + surf->dcc_alignment = MAX2(surf->dcc_alignment, AddrDccOut->dccRamBaseAlign); + } + } + + return 0; +} + +static void radv_set_micro_tile_mode(struct radeon_surf *surf, + struct radeon_info *info) +{ + uint32_t tile_mode = info->si_tile_mode_array[surf->tiling_index[0]]; + + if (info->chip_class >= CIK) + surf->micro_tile_mode = G_009910_MICRO_TILE_MODE_NEW(tile_mode); + else + surf->micro_tile_mode = G_009910_MICRO_TILE_MODE(tile_mode); +} + +static unsigned cik_get_macro_tile_index(struct radeon_surf *surf) +{ + unsigned index, tileb; + + tileb = 8 * 8 * surf->bpe; + tileb = MIN2(surf->tile_split, tileb); + + for (index = 0; tileb > 64; index++) + tileb >>= 1; + + assert(index < 16); + return index; +} + +static int radv_amdgpu_winsys_surface_init(struct radeon_winsys *_ws, + struct radeon_surf *surf) +{ + struct radv_amdgpu_winsys *ws = radv_amdgpu_winsys(_ws); + unsigned level, mode, type; + bool compressed; + ADDR_COMPUTE_SURFACE_INFO_INPUT AddrSurfInfoIn = {0}; + ADDR_COMPUTE_SURFACE_INFO_OUTPUT AddrSurfInfoOut = {0}; + ADDR_COMPUTE_DCCINFO_INPUT AddrDccIn = {0}; + ADDR_COMPUTE_DCCINFO_OUTPUT AddrDccOut = {0}; + ADDR_TILEINFO AddrTileInfoIn = {0}; + ADDR_TILEINFO AddrTileInfoOut = {0}; + int r; + + r = radv_amdgpu_surface_sanity(surf); + if (r) + return r; + + AddrSurfInfoIn.size = sizeof(ADDR_COMPUTE_SURFACE_INFO_INPUT); + AddrSurfInfoOut.size = sizeof(ADDR_COMPUTE_SURFACE_INFO_OUTPUT); + AddrDccIn.size = sizeof(ADDR_COMPUTE_DCCINFO_INPUT); + AddrDccOut.size = sizeof(ADDR_COMPUTE_DCCINFO_OUTPUT); + AddrSurfInfoOut.pTileInfo = &AddrTileInfoOut; + + type = RADEON_SURF_GET(surf->flags, TYPE); + mode = RADEON_SURF_GET(surf->flags, MODE); + compressed = surf->blk_w == 4 && surf->blk_h == 4; + + /* MSAA and FMASK require 2D tiling. */ + if (surf->nsamples > 1 || + (surf->flags & RADEON_SURF_FMASK)) + mode = RADEON_SURF_MODE_2D; + + /* DB doesn't support linear layouts. */ + if (surf->flags & (RADEON_SURF_Z_OR_SBUFFER) && + mode < RADEON_SURF_MODE_1D) + mode = RADEON_SURF_MODE_1D; + + /* Set the requested tiling mode. */ + switch (mode) { + case RADEON_SURF_MODE_LINEAR_ALIGNED: + AddrSurfInfoIn.tileMode = ADDR_TM_LINEAR_ALIGNED; + break; + case RADEON_SURF_MODE_1D: + AddrSurfInfoIn.tileMode = ADDR_TM_1D_TILED_THIN1; + break; + case RADEON_SURF_MODE_2D: + AddrSurfInfoIn.tileMode = ADDR_TM_2D_TILED_THIN1; + break; + default: + assert(0); + } + + /* The format must be set correctly for the allocation of compressed + * textures to work. In other cases, setting the bpp is sufficient. */ + if (compressed) { + switch (surf->bpe) { + case 8: + AddrSurfInfoIn.format = ADDR_FMT_BC1; + break; + case 16: + AddrSurfInfoIn.format = ADDR_FMT_BC3; + break; + default: + assert(0); + } + } else { + AddrDccIn.bpp = AddrSurfInfoIn.bpp = surf->bpe * 8; + } + + AddrDccIn.numSamples = AddrSurfInfoIn.numSamples = surf->nsamples; + AddrSurfInfoIn.tileIndex = -1; + + /* Set the micro tile type. */ + if (surf->flags & RADEON_SURF_SCANOUT) + AddrSurfInfoIn.tileType = ADDR_DISPLAYABLE; + else if (surf->flags & RADEON_SURF_Z_OR_SBUFFER) + AddrSurfInfoIn.tileType = ADDR_DEPTH_SAMPLE_ORDER; + else + AddrSurfInfoIn.tileType = ADDR_NON_DISPLAYABLE; + + AddrSurfInfoIn.flags.color = !(surf->flags & RADEON_SURF_Z_OR_SBUFFER); + AddrSurfInfoIn.flags.depth = (surf->flags & RADEON_SURF_ZBUFFER) != 0; + AddrSurfInfoIn.flags.cube = type == RADEON_SURF_TYPE_CUBEMAP; + AddrSurfInfoIn.flags.display = (surf->flags & RADEON_SURF_SCANOUT) != 0; + AddrSurfInfoIn.flags.pow2Pad = surf->last_level > 0; + AddrSurfInfoIn.flags.degrade4Space = 1; + + /* DCC notes: + * - If we add MSAA support, keep in mind that CB can't decompress 8bpp + * with samples >= 4. + * - Mipmapped array textures have low performance (discovered by a closed + * driver team). + */ + AddrSurfInfoIn.flags.dccCompatible = !(surf->flags & RADEON_SURF_Z_OR_SBUFFER) && + !(surf->flags & RADEON_SURF_DISABLE_DCC) && + !compressed && AddrDccIn.numSamples <= 1 && + ((surf->array_size == 1 && surf->npix_z == 1) || + surf->last_level == 0); + + AddrSurfInfoIn.flags.noStencil = (surf->flags & RADEON_SURF_SBUFFER) == 0; + AddrSurfInfoIn.flags.compressZ = AddrSurfInfoIn.flags.depth; + + /* noStencil = 0 can result in a depth part that is incompatible with + * mipmapped texturing. So set noStencil = 1 when mipmaps are requested (in + * this case, we may end up setting stencil_adjusted). + * + * TODO: update addrlib to a newer version, remove this, and + * use flags.matchStencilTileCfg = 1 as an alternative fix. + */ + if (surf->last_level > 0) + AddrSurfInfoIn.flags.noStencil = 1; + + /* Set preferred macrotile parameters. This is usually required + * for shared resources. This is for 2D tiling only. */ + if (AddrSurfInfoIn.tileMode >= ADDR_TM_2D_TILED_THIN1 && + surf->bankw && surf->bankh && surf->mtilea && surf->tile_split) { + /* If any of these parameters are incorrect, the calculation + * will fail. */ + AddrTileInfoIn.banks = surf->num_banks; + AddrTileInfoIn.bankWidth = surf->bankw; + AddrTileInfoIn.bankHeight = surf->bankh; + AddrTileInfoIn.macroAspectRatio = surf->mtilea; + AddrTileInfoIn.tileSplitBytes = surf->tile_split; + AddrTileInfoIn.pipeConfig = surf->pipe_config + 1; /* +1 compared to GB_TILE_MODE */ + AddrSurfInfoIn.flags.degrade4Space = 0; + AddrSurfInfoIn.pTileInfo = &AddrTileInfoIn; + + /* If AddrSurfInfoIn.pTileInfo is set, Addrlib doesn't set + * the tile index, because we are expected to know it if + * we know the other parameters. + * + * This is something that can easily be fixed in Addrlib. + * For now, just figure it out here. + * Note that only 2D_TILE_THIN1 is handled here. + */ + assert(!(surf->flags & RADEON_SURF_Z_OR_SBUFFER)); + assert(AddrSurfInfoIn.tileMode == ADDR_TM_2D_TILED_THIN1); + + if (ws->info.chip_class == SI) { + if (AddrSurfInfoIn.tileType == ADDR_DISPLAYABLE) { + if (surf->bpe == 2) + AddrSurfInfoIn.tileIndex = 11; /* 16bpp */ + else + AddrSurfInfoIn.tileIndex = 12; /* 32bpp */ + } else { + if (surf->bpe == 1) + AddrSurfInfoIn.tileIndex = 14; /* 8bpp */ + else if (surf->bpe == 2) + AddrSurfInfoIn.tileIndex = 15; /* 16bpp */ + else if (surf->bpe == 4) + AddrSurfInfoIn.tileIndex = 16; /* 32bpp */ + else + AddrSurfInfoIn.tileIndex = 17; /* 64bpp (and 128bpp) */ + } + } else { + if (AddrSurfInfoIn.tileType == ADDR_DISPLAYABLE) + AddrSurfInfoIn.tileIndex = 10; /* 2D displayable */ + else + AddrSurfInfoIn.tileIndex = 14; /* 2D non-displayable */ + AddrSurfInfoOut.macroModeIndex = cik_get_macro_tile_index(surf); + } + } + + surf->bo_size = 0; + surf->dcc_size = 0; + surf->dcc_alignment = 1; + + /* Calculate texture layout information. */ + for (level = 0; level <= surf->last_level; level++) { + r = radv_compute_level(ws->addrlib, surf, false, level, type, compressed, + &AddrSurfInfoIn, &AddrSurfInfoOut, &AddrDccIn, &AddrDccOut); + if (r) + return r; + + if (level == 0) { + surf->bo_alignment = AddrSurfInfoOut.baseAlign; + surf->pipe_config = AddrSurfInfoOut.pTileInfo->pipeConfig - 1; + radv_set_micro_tile_mode(surf, &ws->info); + + /* For 2D modes only. */ + if (AddrSurfInfoOut.tileMode >= ADDR_TM_2D_TILED_THIN1) { + surf->bankw = AddrSurfInfoOut.pTileInfo->bankWidth; + surf->bankh = AddrSurfInfoOut.pTileInfo->bankHeight; + surf->mtilea = AddrSurfInfoOut.pTileInfo->macroAspectRatio; + surf->tile_split = AddrSurfInfoOut.pTileInfo->tileSplitBytes; + surf->num_banks = AddrSurfInfoOut.pTileInfo->banks; + surf->macro_tile_index = AddrSurfInfoOut.macroModeIndex; + } else { + surf->macro_tile_index = 0; + } + } + } + + /* Calculate texture layout information for stencil. */ + if (surf->flags & RADEON_SURF_SBUFFER) { + AddrSurfInfoIn.bpp = 8; + AddrSurfInfoIn.flags.depth = 0; + AddrSurfInfoIn.flags.stencil = 1; + /* This will be ignored if AddrSurfInfoIn.pTileInfo is NULL. */ + AddrTileInfoIn.tileSplitBytes = surf->stencil_tile_split; + + for (level = 0; level <= surf->last_level; level++) { + r = radv_compute_level(ws->addrlib, surf, true, level, type, compressed, + &AddrSurfInfoIn, &AddrSurfInfoOut, &AddrDccIn, &AddrDccOut); + if (r) + return r; + + /* DB uses the depth pitch for both stencil and depth. */ + if (surf->stencil_level[level].nblk_x != surf->level[level].nblk_x) + surf->stencil_adjusted = true; + + if (level == 0) { + /* For 2D modes only. */ + if (AddrSurfInfoOut.tileMode >= ADDR_TM_2D_TILED_THIN1) { + surf->stencil_tile_split = + AddrSurfInfoOut.pTileInfo->tileSplitBytes; + } + } + } + } + + /* Recalculate the whole DCC miptree size including disabled levels. + * This is what addrlib does, but calling addrlib would be a lot more + * complicated. + */ +#if 0 + if (surf->dcc_size && surf->last_level > 0) { + surf->dcc_size = align64(surf->bo_size >> 8, + ws->info.pipe_interleave_bytes * + ws->info.num_tile_pipes); + } +#endif + return 0; +} + +static int radv_amdgpu_winsys_surface_best(struct radeon_winsys *rws, + struct radeon_surf *surf) +{ + return 0; +} + +void radv_amdgpu_surface_init_functions(struct radv_amdgpu_winsys *ws) +{ + ws->base.surface_init = radv_amdgpu_winsys_surface_init; + ws->base.surface_best = radv_amdgpu_winsys_surface_best; +} diff -Nru mesa-12.0.6/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.h mesa-17.0.7/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.h --- mesa-12.0.6/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,33 @@ +/* + * Copyright © 2016 Red Hat. + * Copyright © 2016 Bas Nieuwenhuizen + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef RADV_AMDGPU_SURFACE_H +#define RADV_AMDGPU_SURFACE_H + +#include + +void radv_amdgpu_surface_init_functions(struct radv_amdgpu_winsys *ws); +ADDR_HANDLE radv_amdgpu_addr_create(struct amdgpu_gpu_info *amdinfo, int family, int rev_id, enum chip_class chip_class); + +#endif /* RADV_AMDGPU_SURFACE_H */ diff -Nru mesa-12.0.6/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c mesa-17.0.7/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c --- mesa-12.0.6/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,391 @@ +/* + * Copyright © 2016 Red Hat. + * Copyright © 2016 Bas Nieuwenhuizen + * based on amdgpu winsys. + * Copyright © 2011 Marek Olšák + * Copyright © 2015 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ +#include "radv_amdgpu_winsys.h" +#include "radv_amdgpu_winsys_public.h" +#include "radv_amdgpu_surface.h" +#include "amdgpu_id.h" +#include "xf86drm.h" +#include +#include +#include +#include +#include +#include "radv_amdgpu_cs.h" +#include "radv_amdgpu_bo.h" +#include "radv_amdgpu_surface.h" + +#define CIK_TILE_MODE_COLOR_2D 14 + +#define CIK__GB_TILE_MODE__PIPE_CONFIG(x) (((x) >> 6) & 0x1f) +#define CIK__PIPE_CONFIG__ADDR_SURF_P2 0 +#define CIK__PIPE_CONFIG__ADDR_SURF_P4_8x16 4 +#define CIK__PIPE_CONFIG__ADDR_SURF_P4_16x16 5 +#define CIK__PIPE_CONFIG__ADDR_SURF_P4_16x32 6 +#define CIK__PIPE_CONFIG__ADDR_SURF_P4_32x32 7 +#define CIK__PIPE_CONFIG__ADDR_SURF_P8_16x16_8x16 8 +#define CIK__PIPE_CONFIG__ADDR_SURF_P8_16x32_8x16 9 +#define CIK__PIPE_CONFIG__ADDR_SURF_P8_32x32_8x16 10 +#define CIK__PIPE_CONFIG__ADDR_SURF_P8_16x32_16x16 11 +#define CIK__PIPE_CONFIG__ADDR_SURF_P8_32x32_16x16 12 +#define CIK__PIPE_CONFIG__ADDR_SURF_P8_32x32_16x32 13 +#define CIK__PIPE_CONFIG__ADDR_SURF_P8_32x64_32x32 14 +#define CIK__PIPE_CONFIG__ADDR_SURF_P16_32X32_8X16 16 +#define CIK__PIPE_CONFIG__ADDR_SURF_P16_32X32_16X16 17 + +static unsigned radv_cik_get_num_tile_pipes(struct amdgpu_gpu_info *info) +{ + unsigned mode2d = info->gb_tile_mode[CIK_TILE_MODE_COLOR_2D]; + + switch (CIK__GB_TILE_MODE__PIPE_CONFIG(mode2d)) { + case CIK__PIPE_CONFIG__ADDR_SURF_P2: + return 2; + case CIK__PIPE_CONFIG__ADDR_SURF_P4_8x16: + case CIK__PIPE_CONFIG__ADDR_SURF_P4_16x16: + case CIK__PIPE_CONFIG__ADDR_SURF_P4_16x32: + case CIK__PIPE_CONFIG__ADDR_SURF_P4_32x32: + return 4; + case CIK__PIPE_CONFIG__ADDR_SURF_P8_16x16_8x16: + case CIK__PIPE_CONFIG__ADDR_SURF_P8_16x32_8x16: + case CIK__PIPE_CONFIG__ADDR_SURF_P8_32x32_8x16: + case CIK__PIPE_CONFIG__ADDR_SURF_P8_16x32_16x16: + case CIK__PIPE_CONFIG__ADDR_SURF_P8_32x32_16x16: + case CIK__PIPE_CONFIG__ADDR_SURF_P8_32x32_16x32: + case CIK__PIPE_CONFIG__ADDR_SURF_P8_32x64_32x32: + return 8; + case CIK__PIPE_CONFIG__ADDR_SURF_P16_32X32_8X16: + case CIK__PIPE_CONFIG__ADDR_SURF_P16_32X32_16X16: + return 16; + default: + fprintf(stderr, "Invalid CIK pipe configuration, assuming P2\n"); + assert(!"this should never occur"); + return 2; + } +} + +static const char * +get_chip_name(enum radeon_family family) +{ + switch (family) { + case CHIP_TAHITI: return "AMD RADV TAHITI"; + case CHIP_PITCAIRN: return "AMD RADV PITCAIRN"; + case CHIP_VERDE: return "AMD RADV CAPE VERDE"; + case CHIP_OLAND: return "AMD RADV OLAND"; + case CHIP_HAINAN: return "AMD RADV HAINAN"; + case CHIP_BONAIRE: return "AMD RADV BONAIRE"; + case CHIP_KAVERI: return "AMD RADV KAVERI"; + case CHIP_KABINI: return "AMD RADV KABINI"; + case CHIP_HAWAII: return "AMD RADV HAWAII"; + case CHIP_MULLINS: return "AMD RADV MULLINS"; + case CHIP_TONGA: return "AMD RADV TONGA"; + case CHIP_ICELAND: return "AMD RADV ICELAND"; + case CHIP_CARRIZO: return "AMD RADV CARRIZO"; + case CHIP_FIJI: return "AMD RADV FIJI"; + case CHIP_POLARIS10: return "AMD RADV POLARIS10"; + case CHIP_POLARIS11: return "AMD RADV POLARIS11"; + case CHIP_POLARIS12: return "AMD RADV POLARIS12"; + case CHIP_STONEY: return "AMD RADV STONEY"; + default: return "AMD RADV unknown"; + } +} + + +static bool +do_winsys_init(struct radv_amdgpu_winsys *ws, int fd) +{ + struct amdgpu_buffer_size_alignments alignment_info = {}; + struct amdgpu_heap_info vram, visible_vram, gtt; + struct drm_amdgpu_info_hw_ip dma = {}; + struct drm_amdgpu_info_hw_ip compute = {}; + drmDevicePtr devinfo; + int r; + int i, j; + /* Get PCI info. */ + r = drmGetDevice(fd, &devinfo); + if (r) { + fprintf(stderr, "amdgpu: drmGetDevice failed.\n"); + goto fail; + } + ws->info.pci_domain = devinfo->businfo.pci->domain; + ws->info.pci_bus = devinfo->businfo.pci->bus; + ws->info.pci_dev = devinfo->businfo.pci->dev; + ws->info.pci_func = devinfo->businfo.pci->func; + drmFreeDevice(&devinfo); + + /* Query hardware and driver information. */ + r = amdgpu_query_gpu_info(ws->dev, &ws->amdinfo); + if (r) { + fprintf(stderr, "amdgpu: amdgpu_query_gpu_info failed.\n"); + goto fail; + } + + r = amdgpu_query_buffer_size_alignment(ws->dev, &alignment_info); + if (r) { + fprintf(stderr, "amdgpu: amdgpu_query_buffer_size_alignment failed.\n"); + goto fail; + } + + r = amdgpu_query_heap_info(ws->dev, AMDGPU_GEM_DOMAIN_VRAM, 0, &vram); + if (r) { + fprintf(stderr, "amdgpu: amdgpu_query_heap_info(vram) failed.\n"); + goto fail; + } + + r = amdgpu_query_heap_info(ws->dev, AMDGPU_GEM_DOMAIN_VRAM, + AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED, &visible_vram); + if (r) { + fprintf(stderr, "amdgpu: amdgpu_query_heap_info(visible_vram) failed.\n"); + goto fail; + } + + r = amdgpu_query_heap_info(ws->dev, AMDGPU_GEM_DOMAIN_GTT, 0, >t); + if (r) { + fprintf(stderr, "amdgpu: amdgpu_query_heap_info(gtt) failed.\n"); + goto fail; + } + + r = amdgpu_query_hw_ip_info(ws->dev, AMDGPU_HW_IP_DMA, 0, &dma); + if (r) { + fprintf(stderr, "amdgpu: amdgpu_query_hw_ip_info(dma) failed.\n"); + goto fail; + } + + r = amdgpu_query_hw_ip_info(ws->dev, AMDGPU_HW_IP_COMPUTE, 0, &compute); + if (r) { + fprintf(stderr, "amdgpu: amdgpu_query_hw_ip_info(compute) failed.\n"); + goto fail; + } + ws->info.pci_id = ws->amdinfo.asic_id; /* TODO: is this correct? */ + ws->info.vce_harvest_config = ws->amdinfo.vce_harvest_config; + + switch (ws->info.pci_id) { +#define CHIPSET(pci_id, name, cfamily) case pci_id: ws->info.family = CHIP_##cfamily; break; +#include "pci_ids/radeonsi_pci_ids.h" +#undef CHIPSET + default: + fprintf(stderr, "amdgpu: Invalid PCI ID.\n"); + goto fail; + } + + if (ws->info.family >= CHIP_TONGA) + ws->info.chip_class = VI; + else if (ws->info.family >= CHIP_BONAIRE) + ws->info.chip_class = CIK; + else if (ws->info.family >= CHIP_TAHITI) + ws->info.chip_class = SI; + else { + fprintf(stderr, "amdgpu: Unknown family.\n"); + goto fail; + } + + /* family and rev_id are for addrlib */ + switch (ws->info.family) { + case CHIP_TAHITI: + ws->family = FAMILY_SI; + ws->rev_id = SI_TAHITI_P_A0; + break; + case CHIP_PITCAIRN: + ws->family = FAMILY_SI; + ws->rev_id = SI_PITCAIRN_PM_A0; + break; + case CHIP_VERDE: + ws->family = FAMILY_SI; + ws->rev_id = SI_CAPEVERDE_M_A0; + break; + case CHIP_OLAND: + ws->family = FAMILY_SI; + ws->rev_id = SI_OLAND_M_A0; + break; + case CHIP_HAINAN: + ws->family = FAMILY_SI; + ws->rev_id = SI_HAINAN_V_A0; + break; + case CHIP_BONAIRE: + ws->family = FAMILY_CI; + ws->rev_id = CI_BONAIRE_M_A0; + break; + case CHIP_KAVERI: + ws->family = FAMILY_KV; + ws->rev_id = KV_SPECTRE_A0; + break; + case CHIP_KABINI: + ws->family = FAMILY_KV; + ws->rev_id = KB_KALINDI_A0; + break; + case CHIP_HAWAII: + ws->family = FAMILY_CI; + ws->rev_id = CI_HAWAII_P_A0; + break; + case CHIP_MULLINS: + ws->family = FAMILY_KV; + ws->rev_id = ML_GODAVARI_A0; + break; + case CHIP_TONGA: + ws->family = FAMILY_VI; + ws->rev_id = VI_TONGA_P_A0; + break; + case CHIP_ICELAND: + ws->family = FAMILY_VI; + ws->rev_id = VI_ICELAND_M_A0; + break; + case CHIP_CARRIZO: + ws->family = FAMILY_CZ; + ws->rev_id = CARRIZO_A0; + break; + case CHIP_STONEY: + ws->family = FAMILY_CZ; + ws->rev_id = STONEY_A0; + break; + case CHIP_FIJI: + ws->family = FAMILY_VI; + ws->rev_id = VI_FIJI_P_A0; + break; + case CHIP_POLARIS10: + ws->family = FAMILY_VI; + ws->rev_id = VI_POLARIS10_P_A0; + break; + case CHIP_POLARIS11: + ws->family = FAMILY_VI; + ws->rev_id = VI_POLARIS11_M_A0; + break; + case CHIP_POLARIS12: + ws->family = FAMILY_VI; + ws->rev_id = VI_POLARIS12_V_A0; + break; + default: + fprintf(stderr, "amdgpu: Unknown family.\n"); + goto fail; + } + + ws->addrlib = radv_amdgpu_addr_create(&ws->amdinfo, ws->family, ws->rev_id, ws->info.chip_class); + if (!ws->addrlib) { + fprintf(stderr, "amdgpu: Cannot create addrlib.\n"); + goto fail; + } + + assert(util_is_power_of_two(dma.available_rings + 1)); + assert(util_is_power_of_two(compute.available_rings + 1)); + + /* Set hardware information. */ + ws->info.name = get_chip_name(ws->info.family); + ws->info.gart_size = gtt.heap_size; + ws->info.vram_size = vram.heap_size; + ws->info.visible_vram_size = visible_vram.heap_size; + /* convert the shader clock from KHz to MHz */ + ws->info.max_shader_clock = ws->amdinfo.max_engine_clk / 1000; + ws->info.max_se = ws->amdinfo.num_shader_engines; + ws->info.max_sh_per_se = ws->amdinfo.num_shader_arrays_per_engine; + ws->info.has_uvd = 0; + ws->info.vce_fw_version = 0; + ws->info.has_userptr = TRUE; + ws->info.num_render_backends = ws->amdinfo.rb_pipes; + ws->info.clock_crystal_freq = ws->amdinfo.gpu_counter_freq; + ws->info.num_tile_pipes = radv_cik_get_num_tile_pipes(&ws->amdinfo); + ws->info.pipe_interleave_bytes = 256 << ((ws->amdinfo.gb_addr_cfg >> 4) & 0x7); + ws->info.has_virtual_memory = TRUE; + ws->info.sdma_rings = MIN2(util_bitcount(dma.available_rings), + MAX_RINGS_PER_TYPE); + ws->info.compute_rings = MIN2(util_bitcount(compute.available_rings), + MAX_RINGS_PER_TYPE); + + /* Get the number of good compute units. */ + ws->info.num_good_compute_units = 0; + for (i = 0; i < ws->info.max_se; i++) + for (j = 0; j < ws->info.max_sh_per_se; j++) + ws->info.num_good_compute_units += + util_bitcount(ws->amdinfo.cu_bitmap[i][j]); + + memcpy(ws->info.si_tile_mode_array, ws->amdinfo.gb_tile_mode, + sizeof(ws->amdinfo.gb_tile_mode)); + ws->info.enabled_rb_mask = ws->amdinfo.enabled_rb_pipes_mask; + + memcpy(ws->info.cik_macrotile_mode_array, ws->amdinfo.gb_macro_tile_mode, + sizeof(ws->amdinfo.gb_macro_tile_mode)); + + ws->info.gart_page_size = alignment_info.size_remote; + + if (ws->info.chip_class == SI) + ws->info.gfx_ib_pad_with_type2 = TRUE; + + ws->use_ib_bos = ws->family >= FAMILY_CI; + return true; +fail: + return false; +} + +static void radv_amdgpu_winsys_query_info(struct radeon_winsys *rws, + struct radeon_info *info) +{ + *info = ((struct radv_amdgpu_winsys *)rws)->info; +} + +static void radv_amdgpu_winsys_destroy(struct radeon_winsys *rws) +{ + struct radv_amdgpu_winsys *ws = (struct radv_amdgpu_winsys*)rws; + + AddrDestroy(ws->addrlib); + amdgpu_device_deinitialize(ws->dev); + FREE(rws); +} + +struct radeon_winsys * +radv_amdgpu_winsys_create(int fd) +{ + uint32_t drm_major, drm_minor, r; + amdgpu_device_handle dev; + struct radv_amdgpu_winsys *ws; + + r = amdgpu_device_initialize(fd, &drm_major, &drm_minor, &dev); + if (r) + return NULL; + + ws = calloc(1, sizeof(struct radv_amdgpu_winsys)); + if (!ws) + goto fail; + + ws->dev = dev; + ws->info.drm_major = drm_major; + ws->info.drm_minor = drm_minor; + if (!do_winsys_init(ws, fd)) + goto winsys_fail; + + ws->debug_all_bos = getenv("RADV_DEBUG_ALL_BOS") ? true : false; + LIST_INITHEAD(&ws->global_bo_list); + pthread_mutex_init(&ws->global_bo_list_lock, NULL); + ws->base.query_info = radv_amdgpu_winsys_query_info; + ws->base.destroy = radv_amdgpu_winsys_destroy; + radv_amdgpu_bo_init_functions(ws); + radv_amdgpu_cs_init_functions(ws); + radv_amdgpu_surface_init_functions(ws); + + return &ws->base; + +winsys_fail: + free(ws); +fail: + amdgpu_device_deinitialize(dev); + return NULL; +} diff -Nru mesa-12.0.6/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.h mesa-17.0.7/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.h --- mesa-12.0.6/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,61 @@ +/* + * Copyright © 2016 Red Hat. + * Copyright © 2016 Bas Nieuwenhuizen + * based on amdgpu winsys. + * Copyright © 2011 Marek Olšák + * Copyright © 2015 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef RADV_AMDGPU_WINSYS_H +#define RADV_AMDGPU_WINSYS_H + +#include "radv_radeon_winsys.h" +#include "addrlib/addrinterface.h" +#include +#include "util/list.h" + +struct radv_amdgpu_winsys { + struct radeon_winsys base; + amdgpu_device_handle dev; + + struct radeon_info info; + struct amdgpu_gpu_info amdinfo; + ADDR_HANDLE addrlib; + + uint32_t rev_id; + unsigned family; + + bool debug_all_bos; + pthread_mutex_t global_bo_list_lock; + struct list_head global_bo_list; + unsigned num_buffers; + + bool use_ib_bos; +}; + +static inline struct radv_amdgpu_winsys * +radv_amdgpu_winsys(struct radeon_winsys *base) +{ + return (struct radv_amdgpu_winsys*)base; +} + +#endif /* RADV_AMDGPU_WINSYS_H */ diff -Nru mesa-12.0.6/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys_public.h mesa-17.0.7/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys_public.h --- mesa-12.0.6/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys_public.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys_public.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,34 @@ +/* + * Copyright © 2016 Red Hat. + * Copyright © 2016 Bas Nieuwenhuizen + * + * based on amdgpu winsys. + * Copyright © 2011 Marek Olšák + * Copyright © 2015 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef RADV_AMDGPU_WINSYS_PUBLIC_H +#define RADV_AMDGPU_WINSYS_PUBLIC_H + +struct radeon_winsys *radv_amdgpu_winsys_create(int fd); + +#endif /* RADV_AMDGPU_WINSYS_PUBLIC_H */ diff -Nru mesa-12.0.6/src/compiler/builtin_type_macros.h mesa-17.0.7/src/compiler/builtin_type_macros.h --- mesa-12.0.6/src/compiler/builtin_type_macros.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/builtin_type_macros.h 2017-06-01 10:37:10.000000000 +0000 @@ -159,6 +159,13 @@ DECL_TYPE(uimage2DMS, GL_UNSIGNED_INT_IMAGE_2D_MULTISAMPLE, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_MS, 0, 0, GLSL_TYPE_UINT) DECL_TYPE(uimage2DMSArray, GL_UNSIGNED_INT_IMAGE_2D_MULTISAMPLE_ARRAY, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_MS, 0, 1, GLSL_TYPE_UINT) +DECL_TYPE(subpassInput, 0, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_SUBPASS, 0, 0, GLSL_TYPE_FLOAT) +DECL_TYPE(subpassInputMS, 0, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_SUBPASS_MS, 0, 0, GLSL_TYPE_FLOAT) +DECL_TYPE(isubpassInput, 0, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_SUBPASS, 0, 0, GLSL_TYPE_INT) +DECL_TYPE(isubpassInputMS, 0, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_SUBPASS_MS, 0, 0, GLSL_TYPE_INT) +DECL_TYPE(usubpassInput, 0, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_SUBPASS, 0, 0, GLSL_TYPE_UINT) +DECL_TYPE(usubpassInputMS, 0, GLSL_TYPE_IMAGE, GLSL_SAMPLER_DIM_SUBPASS_MS, 0, 0, GLSL_TYPE_UINT) + DECL_TYPE(atomic_uint, GL_UNSIGNED_INT_ATOMIC_COUNTER, GLSL_TYPE_ATOMIC_UINT, 1, 1) STRUCT_TYPE(gl_DepthRangeParameters) diff -Nru mesa-12.0.6/src/compiler/glsl/ast_array_index.cpp mesa-17.0.7/src/compiler/glsl/ast_array_index.cpp --- mesa-12.0.6/src/compiler/glsl/ast_array_index.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ast_array_index.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -141,24 +141,24 @@ ir_rvalue * _mesa_ast_array_index_to_hir(void *mem_ctx, - struct _mesa_glsl_parse_state *state, - ir_rvalue *array, ir_rvalue *idx, - YYLTYPE &loc, YYLTYPE &idx_loc) + struct _mesa_glsl_parse_state *state, + ir_rvalue *array, ir_rvalue *idx, + YYLTYPE &loc, YYLTYPE &idx_loc) { if (!array->type->is_error() && !array->type->is_array() && !array->type->is_matrix() && !array->type->is_vector()) { _mesa_glsl_error(& idx_loc, state, - "cannot dereference non-array / non-matrix / " - "non-vector"); + "cannot dereference non-array / non-matrix / " + "non-vector"); } if (!idx->type->is_error()) { if (!idx->type->is_integer()) { - _mesa_glsl_error(& idx_loc, state, "array index must be integer type"); + _mesa_glsl_error(& idx_loc, state, "array index must be integer type"); } else if (!idx->type->is_scalar()) { - _mesa_glsl_error(& idx_loc, state, "array index must be scalar"); + _mesa_glsl_error(& idx_loc, state, "array index must be scalar"); } } @@ -182,33 +182,32 @@ * negative constant expression." */ if (array->type->is_matrix()) { - if (array->type->row_type()->vector_elements <= idx) { - type_name = "matrix"; - bound = array->type->row_type()->vector_elements; - } + if (array->type->row_type()->vector_elements <= idx) { + type_name = "matrix"; + bound = array->type->row_type()->vector_elements; + } } else if (array->type->is_vector()) { - if (array->type->vector_elements <= idx) { - type_name = "vector"; - bound = array->type->vector_elements; - } + if (array->type->vector_elements <= idx) { + type_name = "vector"; + bound = array->type->vector_elements; + } } else { - /* glsl_type::array_size() returns -1 for non-array types. This means - * that we don't need to verify that the type is an array before - * doing the bounds checking. - */ - if ((array->type->array_size() > 0) - && (array->type->array_size() <= idx)) { - type_name = "array"; - bound = array->type->array_size(); - } + /* glsl_type::array_size() returns -1 for non-array types. This means + * that we don't need to verify that the type is an array before + * doing the bounds checking. + */ + if ((array->type->array_size() > 0) + && (array->type->array_size() <= idx)) { + type_name = "array"; + bound = array->type->array_size(); + } } if (bound > 0) { - _mesa_glsl_error(& loc, state, "%s index must be < %u", - type_name, bound); + _mesa_glsl_error(& loc, state, "%s index must be < %u", + type_name, bound); } else if (idx < 0) { - _mesa_glsl_error(& loc, state, "%s index must be >= 0", - type_name); + _mesa_glsl_error(& loc, state, "%s index must be >= 0", type_name); } if (array->type->is_array()) @@ -234,6 +233,20 @@ else if (array->variable_referenced()->data.mode != ir_var_shader_storage) { _mesa_glsl_error(&loc, state, "unsized array index must be constant"); + } else { + /* Unsized array non-constant indexing on SSBO is allowed only for + * the last member of the SSBO definition. + */ + ir_variable *var = array->variable_referenced(); + const glsl_type *iface_type = var->get_interface_type(); + int field_index = iface_type->field_index(var->name); + /* Field index can be < 0 for instance arrays */ + if (field_index >= 0 && + field_index != (int) iface_type->length - 1) { + _mesa_glsl_error(&loc, state, "Indirect access on unsized " + "array is limited to the last member of " + "SSBO."); + } } } else if (array->type->without_array()->is_interface() && ((array->variable_referenced()->data.mode == ir_var_uniform @@ -253,18 +266,18 @@ * on uniform blocks but not shader storage blocks. * */ - _mesa_glsl_error(&loc, state, "%s block array index must be constant", + _mesa_glsl_error(&loc, state, "%s block array index must be constant", array->variable_referenced()->data.mode == ir_var_uniform ? "uniform" : "shader storage"); } else { - /* whole_variable_referenced can return NULL if the array is a - * member of a structure. In this case it is safe to not update - * the max_array_access field because it is never used for fields - * of structures. - */ - ir_variable *v = array->whole_variable_referenced(); - if (v != NULL) - v->data.max_array_access = array->type->array_size() - 1; + /* whole_variable_referenced can return NULL if the array is a + * member of a structure. In this case it is safe to not update + * the max_array_access field because it is never used for fields + * of structures. + */ + ir_variable *v = array->whole_variable_referenced(); + if (v != NULL) + v->data.max_array_access = array->type->array_size() - 1; } /* From page 23 (29 of the PDF) of the GLSL 1.30 spec: diff -Nru mesa-12.0.6/src/compiler/glsl/ast_expr.cpp mesa-17.0.7/src/compiler/glsl/ast_expr.cpp --- mesa-12.0.6/src/compiler/glsl/ast_expr.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ast_expr.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -79,7 +79,7 @@ ast_expression_bin::ast_expression_bin(int oper, ast_expression *ex0, - ast_expression *ex1) : + ast_expression *ex1) : ast_expression(oper, ex0, ex1, NULL) { assert((oper >= ast_plus) && (oper <= ast_logic_not)); diff -Nru mesa-12.0.6/src/compiler/glsl/ast_function.cpp mesa-17.0.7/src/compiler/glsl/ast_function.cpp --- mesa-12.0.6/src/compiler/glsl/ast_function.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ast_function.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -31,14 +31,10 @@ static ir_rvalue * convert_component(ir_rvalue *src, const glsl_type *desired_type); -bool -apply_implicit_conversion(const glsl_type *to, ir_rvalue * &from, - struct _mesa_glsl_parse_state *state); - static unsigned process_parameters(exec_list *instructions, exec_list *actual_parameters, - exec_list *parameters, - struct _mesa_glsl_parse_state *state) + exec_list *parameters, + struct _mesa_glsl_parse_state *state) { unsigned count = 0; @@ -53,7 +49,7 @@ ir_constant *const constant = result->constant_expression_value(); if (constant != NULL) - result = constant; + result = constant; actual_parameters->push_tail(result); count++; @@ -78,7 +74,7 @@ */ char * prototype_string(const glsl_type *return_type, const char *name, - exec_list *parameters) + exec_list *parameters) { char *str = NULL; @@ -150,7 +146,7 @@ static bool verify_first_atomic_parameter(YYLTYPE *loc, _mesa_glsl_parse_state *state, - ir_variable *var) + ir_variable *var) { if (!var || (!var->is_in_shader_storage_block() && @@ -182,12 +178,12 @@ */ static bool verify_parameter_modes(_mesa_glsl_parse_state *state, - ir_function_signature *sig, - exec_list &actual_ir_parameters, - exec_list &actual_ast_parameters) + ir_function_signature *sig, + exec_list &actual_ir_parameters, + exec_list &actual_ast_parameters) { - exec_node *actual_ir_node = actual_ir_parameters.head; - exec_node *actual_ast_node = actual_ast_parameters.head; + exec_node *actual_ir_node = actual_ir_parameters.get_head_raw(); + exec_node *actual_ast_node = actual_ast_parameters.get_head_raw(); foreach_in_list(const ir_variable, formal, &sig->parameters) { /* The lists must be the same length. */ @@ -196,7 +192,7 @@ const ir_rvalue *const actual = (ir_rvalue *) actual_ir_node; const ast_expression *const actual_ast = - exec_node_data(ast_expression, actual_ast_node, link); + exec_node_data(ast_expression, actual_ast_node, link); /* FIXME: 'loc' is incorrect (as of 2011-01-21). It is always * FIXME: 0:0(0). @@ -205,18 +201,18 @@ /* Verify that 'const_in' parameters are ir_constants. */ if (formal->data.mode == ir_var_const_in && - actual->ir_type != ir_type_constant) { - _mesa_glsl_error(&loc, state, - "parameter `in %s' must be a constant expression", - formal->name); - return false; + actual->ir_type != ir_type_constant) { + _mesa_glsl_error(&loc, state, + "parameter `in %s' must be a constant expression", + formal->name); + return false; } /* Verify that shader_in parameters are shader inputs */ if (formal->data.must_be_shader_input) { const ir_rvalue *val = actual; - // GLSL 4.40 allows swizzles, while earlier GLSL versions do not. + /* GLSL 4.40 allows swizzles, while earlier GLSL versions do not. */ if (val->ir_type == ir_type_swizzle) { if (!state->is_version(440, 0)) { _mesa_glsl_error(&loc, state, @@ -243,29 +239,30 @@ /* Verify that 'out' and 'inout' actual parameters are lvalues. */ if (formal->data.mode == ir_var_function_out || formal->data.mode == ir_var_function_inout) { - const char *mode = NULL; - switch (formal->data.mode) { - case ir_var_function_out: mode = "out"; break; - case ir_var_function_inout: mode = "inout"; break; - default: assert(false); break; - } - - /* This AST-based check catches errors like f(i++). The IR-based - * is_lvalue() is insufficient because the actual parameter at the - * IR-level is just a temporary value, which is an l-value. - */ - if (actual_ast->non_lvalue_description != NULL) { - _mesa_glsl_error(&loc, state, - "function parameter '%s %s' references a %s", - mode, formal->name, - actual_ast->non_lvalue_description); - return false; - } + const char *mode = NULL; + switch (formal->data.mode) { + case ir_var_function_out: mode = "out"; break; + case ir_var_function_inout: mode = "inout"; break; + default: assert(false); break; + } - ir_variable *var = actual->variable_referenced(); + /* This AST-based check catches errors like f(i++). The IR-based + * is_lvalue() is insufficient because the actual parameter at the + * IR-level is just a temporary value, which is an l-value. + */ + if (actual_ast->non_lvalue_description != NULL) { + _mesa_glsl_error(&loc, state, + "function parameter '%s %s' references a %s", + mode, formal->name, + actual_ast->non_lvalue_description); + return false; + } + + ir_variable *var = actual->variable_referenced(); if (var && formal->data.mode == ir_var_function_inout) { - if ((var->data.mode == ir_var_auto || var->data.mode == ir_var_shader_out) && + if ((var->data.mode == ir_var_auto || + var->data.mode == ir_var_shader_out) && !var->data.assigned && !is_gl_identifier(var->name)) { _mesa_glsl_warning(&loc, state, "`%s' used uninitialized", @@ -273,28 +270,29 @@ } } - if (var) - var->data.assigned = true; + if (var) + var->data.assigned = true; - if (var && var->data.read_only) { - _mesa_glsl_error(&loc, state, - "function parameter '%s %s' references the " - "read-only variable '%s'", - mode, formal->name, - actual->variable_referenced()->name); - return false; - } else if (!actual->is_lvalue()) { + if (var && var->data.read_only) { + _mesa_glsl_error(&loc, state, + "function parameter '%s %s' references the " + "read-only variable '%s'", + mode, formal->name, + actual->variable_referenced()->name); + return false; + } else if (!actual->is_lvalue()) { _mesa_glsl_error(&loc, state, "function parameter '%s %s' is not an lvalue", mode, formal->name); return false; - } + } } else { assert(formal->data.mode == ir_var_function_in || formal->data.mode == ir_var_const_in); ir_variable *var = actual->variable_referenced(); if (var) { - if ((var->data.mode == ir_var_auto || var->data.mode == ir_var_shader_out) && + if ((var->data.mode == ir_var_auto || + var->data.mode == ir_var_shader_out) && !var->data.assigned && !is_gl_identifier(var->name)) { _mesa_glsl_warning(&loc, state, "`%s' used uninitialized", @@ -318,10 +316,12 @@ const char *func_name = sig->function_name(); bool is_atomic = is_atomic_function(func_name); if (is_atomic) { - const ir_rvalue *const actual = (ir_rvalue *) actual_ir_parameters.head; + const ir_rvalue *const actual = + (ir_rvalue *) actual_ir_parameters.get_head_raw(); const ast_expression *const actual_ast = - exec_node_data(ast_expression, actual_ast_parameters.head, link); + exec_node_data(ast_expression, + actual_ast_parameters.get_head_raw(), link); YYLTYPE loc = actual_ast->get_location(); if (!verify_first_atomic_parameter(&loc, state, @@ -408,8 +408,10 @@ ir_rvalue *lhs = actual; if (expr != NULL && expr->operation == ir_binop_vector_extract) { - lhs = new(mem_ctx) ir_dereference_array(expr->operands[0]->clone(mem_ctx, NULL), - expr->operands[1]->clone(mem_ctx, NULL)); + lhs = new(mem_ctx) ir_dereference_array(expr->operands[0]->clone(mem_ctx, + NULL), + expr->operands[1]->clone(mem_ctx, + NULL)); } ir_assignment *const assignment_2 = new(mem_ctx) ir_assignment(lhs, rhs); @@ -419,16 +421,17 @@ /** * Generate a function call. * - * For non-void functions, this returns a dereference of the temporary variable - * which stores the return value for the call. For void functions, this returns - * NULL. + * For non-void functions, this returns a dereference of the temporary + * variable which stores the return value for the call. For void functions, + * this returns NULL. */ static ir_rvalue * generate_call(exec_list *instructions, ir_function_signature *sig, - exec_list *actual_parameters, + exec_list *actual_parameters, ir_variable *sub_var, - ir_rvalue *array_idx, - struct _mesa_glsl_parse_state *state) + ir_rvalue *array_idx, + struct _mesa_glsl_parse_state *state, + bool inline_immediately) { void *ctx = state; exec_list post_call_conversions; @@ -444,24 +447,24 @@ ir_variable *formal = (ir_variable *) formal_node; if (formal->type->is_numeric() || formal->type->is_boolean()) { - switch (formal->data.mode) { - case ir_var_const_in: - case ir_var_function_in: { - ir_rvalue *converted - = convert_component(actual, formal->type); - actual->replace_with(converted); - break; - } - case ir_var_function_out: - case ir_var_function_inout: + switch (formal->data.mode) { + case ir_var_const_in: + case ir_var_function_in: { + ir_rvalue *converted + = convert_component(actual, formal->type); + actual->replace_with(converted); + break; + } + case ir_var_function_out: + case ir_var_function_inout: fix_parameter(ctx, actual, formal->type, instructions, &post_call_conversions, formal->data.mode == ir_var_function_inout); - break; - default: - assert (!"Illegal formal parameter mode"); - break; - } + break; + default: + assert (!"Illegal formal parameter mode"); + break; + } } } @@ -513,9 +516,10 @@ * instructions; just generate an ir_constant. */ if (state->is_version(120, 100)) { - ir_constant *value = sig->constant_expression_value(actual_parameters, NULL); + ir_constant *value = sig->constant_expression_value(actual_parameters, + NULL); if (value != NULL) { - return value; + return value; } } @@ -536,8 +540,13 @@ deref = new(ctx) ir_dereference_variable(var); } - ir_call *call = new(ctx) ir_call(sig, deref, actual_parameters, sub_var, array_idx); + ir_call *call = new(ctx) ir_call(sig, deref, + actual_parameters, sub_var, array_idx); instructions->push_tail(call); + if (inline_immediately) { + call->generate_inline(call); + call->remove(); + } /* Also emit any necessary out-parameter conversions. */ instructions->append_list(&post_call_conversions); @@ -550,22 +559,21 @@ */ static ir_function_signature * match_function_by_name(const char *name, - exec_list *actual_parameters, - struct _mesa_glsl_parse_state *state) + exec_list *actual_parameters, + struct _mesa_glsl_parse_state *state) { - void *ctx = state; ir_function *f = state->symbols->get_function(name); ir_function_signature *local_sig = NULL; ir_function_signature *sig = NULL; /* Is the function hidden by a record type constructor? */ if (state->symbols->get_type(name)) - goto done; /* no match */ + return sig; /* no match */ /* Is the function hidden by a variable (impossible in 1.10)? */ if (!state->symbols->separate_function_namespace && state->symbols->get_variable(name)) - goto done; /* no match */ + return sig; /* no match */ if (f != NULL) { /* In desktop GL, the presence of a user-defined signature hides any @@ -579,29 +587,15 @@ sig = local_sig = f->matching_signature(state, actual_parameters, allow_builtins, &is_exact); if (is_exact) - goto done; + return sig; if (!allow_builtins) - goto done; + return sig; } /* Local shader has no exact candidates; check the built-ins. */ _mesa_glsl_initialize_builtin_functions(); sig = _mesa_glsl_find_builtin_function(state, name, actual_parameters); - -done: - if (sig != NULL) { - /* If the match is from a linked built-in shader, import the prototype. */ - if (sig != local_sig) { - if (f == NULL) { - f = new(ctx) ir_function(name); - state->symbols->add_global_function(f); - emit_function(state, f); - } - sig = sig->clone_prototype(f, NULL); - f->add_signature(sig); - } - } return sig; } @@ -618,7 +612,10 @@ ir_variable *var; bool is_exact = false; - new_name = ralloc_asprintf(ctx, "%s_%s", _mesa_shader_stage_to_subroutine_prefix(state->stage), name); + new_name = + ralloc_asprintf(ctx, "%s_%s", + _mesa_shader_stage_to_subroutine_prefix(state->stage), + name); var = state->symbols->get_variable(new_name); if (!var) return NULL; @@ -635,7 +632,7 @@ return NULL; *var_r = var; sig = found->matching_signature(state, actual_parameters, - false, &is_exact); + false, &is_exact); return sig; } @@ -651,7 +648,8 @@ state, loc, array->subexpressions[0], array->subexpressions[1], - function_name, actual_parameters); + function_name, + actual_parameters); ir_rvalue *outer_array_idx = idx->hir(instructions, state); YYLTYPE index_loc = idx->get_location(); @@ -681,7 +679,8 @@ if (sig->is_builtin() && !sig->is_builtin_available(state)) continue; - char *str = prototype_string(sig->return_type, f->name, &sig->parameters); + char *str = prototype_string(sig->return_type, f->name, + &sig->parameters); _mesa_glsl_error(loc, state, " %s", str); ralloc_free(str); } @@ -693,27 +692,30 @@ */ static void no_matching_function_error(const char *name, - YYLTYPE *loc, - exec_list *actual_parameters, - _mesa_glsl_parse_state *state) + YYLTYPE *loc, + exec_list *actual_parameters, + _mesa_glsl_parse_state *state) { gl_shader *sh = _mesa_glsl_get_builtin_function_shader(); if (state->symbols->get_function(name) == NULL - && (!state->uses_builtin_functions - || sh->symbols->get_function(name) == NULL)) { + && (!state->uses_builtin_functions + || sh->symbols->get_function(name) == NULL)) { _mesa_glsl_error(loc, state, "no function with name '%s'", name); } else { char *str = prototype_string(NULL, name, actual_parameters); _mesa_glsl_error(loc, state, - "no matching function for call to `%s'; candidates are:", + "no matching function for call to `%s';" + " candidates are:", str); ralloc_free(str); - print_function_prototypes(state, loc, state->symbols->get_function(name)); + print_function_prototypes(state, loc, + state->symbols->get_function(name)); if (state->uses_builtin_functions) { - print_function_prototypes(state, loc, sh->symbols->get_function(name)); + print_function_prototypes(state, loc, + sh->symbols->get_function(name)); } } } @@ -745,64 +747,66 @@ case GLSL_TYPE_UINT: switch (b) { case GLSL_TYPE_INT: - result = new(ctx) ir_expression(ir_unop_i2u, src); - break; + result = new(ctx) ir_expression(ir_unop_i2u, src); + break; case GLSL_TYPE_FLOAT: - result = new(ctx) ir_expression(ir_unop_f2u, src); - break; + result = new(ctx) ir_expression(ir_unop_f2u, src); + break; case GLSL_TYPE_BOOL: - result = new(ctx) ir_expression(ir_unop_i2u, - new(ctx) ir_expression(ir_unop_b2i, src)); - break; + result = new(ctx) ir_expression(ir_unop_i2u, + new(ctx) ir_expression(ir_unop_b2i, + src)); + break; case GLSL_TYPE_DOUBLE: - result = new(ctx) ir_expression(ir_unop_d2u, src); - break; + result = new(ctx) ir_expression(ir_unop_d2u, src); + break; } break; case GLSL_TYPE_INT: switch (b) { case GLSL_TYPE_UINT: - result = new(ctx) ir_expression(ir_unop_u2i, src); - break; + result = new(ctx) ir_expression(ir_unop_u2i, src); + break; case GLSL_TYPE_FLOAT: - result = new(ctx) ir_expression(ir_unop_f2i, src); - break; + result = new(ctx) ir_expression(ir_unop_f2i, src); + break; case GLSL_TYPE_BOOL: - result = new(ctx) ir_expression(ir_unop_b2i, src); - break; + result = new(ctx) ir_expression(ir_unop_b2i, src); + break; case GLSL_TYPE_DOUBLE: - result = new(ctx) ir_expression(ir_unop_d2i, src); - break; + result = new(ctx) ir_expression(ir_unop_d2i, src); + break; } break; case GLSL_TYPE_FLOAT: switch (b) { case GLSL_TYPE_UINT: - result = new(ctx) ir_expression(ir_unop_u2f, desired_type, src, NULL); - break; + result = new(ctx) ir_expression(ir_unop_u2f, desired_type, src, NULL); + break; case GLSL_TYPE_INT: - result = new(ctx) ir_expression(ir_unop_i2f, desired_type, src, NULL); - break; + result = new(ctx) ir_expression(ir_unop_i2f, desired_type, src, NULL); + break; case GLSL_TYPE_BOOL: - result = new(ctx) ir_expression(ir_unop_b2f, desired_type, src, NULL); - break; + result = new(ctx) ir_expression(ir_unop_b2f, desired_type, src, NULL); + break; case GLSL_TYPE_DOUBLE: - result = new(ctx) ir_expression(ir_unop_d2f, desired_type, src, NULL); - break; + result = new(ctx) ir_expression(ir_unop_d2f, desired_type, src, NULL); + break; } break; case GLSL_TYPE_BOOL: switch (b) { case GLSL_TYPE_UINT: - result = new(ctx) ir_expression(ir_unop_i2b, - new(ctx) ir_expression(ir_unop_u2i, src)); - break; + result = new(ctx) ir_expression(ir_unop_i2b, + new(ctx) ir_expression(ir_unop_u2i, + src)); + break; case GLSL_TYPE_INT: - result = new(ctx) ir_expression(ir_unop_i2b, desired_type, src, NULL); - break; + result = new(ctx) ir_expression(ir_unop_i2b, desired_type, src, NULL); + break; case GLSL_TYPE_FLOAT: - result = new(ctx) ir_expression(ir_unop_f2b, desired_type, src, NULL); - break; + result = new(ctx) ir_expression(ir_unop_f2b, desired_type, src, NULL); + break; case GLSL_TYPE_DOUBLE: result = new(ctx) ir_expression(ir_unop_d2b, desired_type, src, NULL); break; @@ -818,7 +822,8 @@ break; case GLSL_TYPE_BOOL: result = new(ctx) ir_expression(ir_unop_f2d, - new(ctx) ir_expression(ir_unop_b2f, src)); + new(ctx) ir_expression(ir_unop_b2f, + src)); break; case GLSL_TYPE_FLOAT: result = new(ctx) ir_expression(ir_unop_f2d, desired_type, src, NULL); @@ -834,6 +839,62 @@ return (constant != NULL) ? (ir_rvalue *) constant : (ir_rvalue *) result; } + +/** + * Perform automatic type and constant conversion of constructor parameters + * + * This implements the rules in the "Implicit Conversions" rules, not the + * "Conversion and Scalar Constructors". + * + * After attempting the implicit conversion, an attempt to convert into a + * constant valued expression is also done. + * + * The \c from \c ir_rvalue is converted "in place". + * + * \param from Operand that is being converted + * \param to Base type the operand will be converted to + * \param state GLSL compiler state + * + * \return + * If the attempt to convert into a constant expression succeeds, \c true is + * returned. Otherwise \c false is returned. + */ +static bool +implicitly_convert_component(ir_rvalue * &from, const glsl_base_type to, + struct _mesa_glsl_parse_state *state) +{ + ir_rvalue *result = from; + + if (to != from->type->base_type) { + const glsl_type *desired_type = + glsl_type::get_instance(to, + from->type->vector_elements, + from->type->matrix_columns); + + if (from->type->can_implicitly_convert_to(desired_type, state)) { + /* Even though convert_component() implements the constructor + * conversion rules (not the implicit conversion rules), its safe + * to use it here because we already checked that the implicit + * conversion is legal. + */ + result = convert_component(from, desired_type); + } + } + + ir_rvalue *const constant = result->constant_expression_value(); + + if (constant != NULL) + result = constant; + + if (from != result) { + from->replace_with(result); + from = result; + } + + return constant != NULL; +} + + /** * Dereference a specific component from a scalar, vector, or matrix */ @@ -863,7 +924,8 @@ const int c = component / src->type->column_type()->vector_elements; const int r = component % src->type->column_type()->vector_elements; ir_constant *const col_index = new(ctx) ir_constant(c); - ir_dereference *const col = new(ctx) ir_dereference_array(src, col_index); + ir_dereference *const col = new(ctx) ir_dereference_array(src, + col_index); col->type = src->type->column_type(); @@ -916,53 +978,30 @@ /* Type cast each parameter and, if possible, fold constants. */ foreach_in_list_safe(ir_rvalue, ir, &actual_parameters) { - ir_rvalue *result = ir; - - /* Apply implicit conversions (not the scalar constructor rules!). See - * the spec quote above. */ - if (constructor_type->base_type != result->type->base_type) { - const glsl_type *desired_type = - glsl_type::get_instance(constructor_type->base_type, - ir->type->vector_elements, - ir->type->matrix_columns); - if (result->type->can_implicitly_convert_to(desired_type, state)) { - /* Even though convert_component() implements the constructor - * conversion rules (not the implicit conversion rules), its safe - * to use it here because we already checked that the implicit - * conversion is legal. - */ - result = convert_component(ir, desired_type); - } - } + /* Apply implicit conversions (not the scalar constructor rules, see the + * spec quote above!) and attempt to convert the parameter to a constant + * valued expression. After doing so, track whether or not all the + * parameters to the constructor are trivially constant valued + * expressions. + */ + all_parameters_are_constant &= + implicitly_convert_component(ir, constructor_type->base_type, state); if (constructor_type->is_matrix()) { - if (result->type != constructor_type->column_type()) { + if (ir->type != constructor_type->column_type()) { _mesa_glsl_error(loc, state, "type error in matrix constructor: " "expected: %s, found %s", constructor_type->column_type()->name, - result->type->name); + ir->type->name); return ir_rvalue::error_value(ctx); } - } else if (result->type != constructor_type->get_scalar_type()) { + } else if (ir->type != constructor_type->get_scalar_type()) { _mesa_glsl_error(loc, state, "type error in vector constructor: " "expected: %s, found %s", constructor_type->get_scalar_type()->name, - result->type->name); + ir->type->name); return ir_rvalue::error_value(ctx); } - - /* Attempt to convert the parameter to a constant valued expression. - * After doing so, track whether or not all the parameters to the - * constructor are trivially constant valued expressions. - */ - ir_rvalue *const constant = result->constant_expression_value(); - - if (constant != NULL) - result = constant; - else - all_parameters_are_constant = false; - - ir->replace_with(result); } if (all_parameters_are_constant) @@ -978,15 +1017,16 @@ ir_instruction *assignment = NULL; if (var->type->is_matrix()) { - ir_rvalue *lhs = new(ctx) ir_dereference_array(var, - new(ctx) ir_constant(i)); + ir_rvalue *lhs = + new(ctx) ir_dereference_array(var, new(ctx) ir_constant(i)); assignment = new(ctx) ir_assignment(lhs, rhs, NULL); } else { /* use writemask rather than index for vector */ assert(var->type->is_vector()); assert(i < 4); ir_dereference *lhs = new(ctx) ir_dereference_variable(var); - assignment = new(ctx) ir_assignment(lhs, rhs, NULL, (unsigned)(1 << i)); + assignment = new(ctx) ir_assignment(lhs, rhs, NULL, + (unsigned)(1 << i)); } instructions->push_tail(assignment); @@ -1000,9 +1040,9 @@ static ir_rvalue * process_array_constructor(exec_list *instructions, - const glsl_type *constructor_type, - YYLTYPE *loc, exec_list *parameters, - struct _mesa_glsl_parse_state *state) + const glsl_type *constructor_type, + YYLTYPE *loc, exec_list *parameters, + struct _mesa_glsl_parse_state *state) { void *ctx = state; /* Array constructors come in two forms: sized and unsized. Sized array @@ -1036,16 +1076,16 @@ ? 1 : constructor_type->length; _mesa_glsl_error(loc, state, "array constructor must have %s %u " - "parameter%s", - is_unsized_array ? "at least" : "exactly", - min_param, (min_param <= 1) ? "" : "s"); + "parameter%s", + is_unsized_array ? "at least" : "exactly", + min_param, (min_param <= 1) ? "" : "s"); return ir_rvalue::error_value(ctx); } if (is_unsized_array) { constructor_type = - glsl_type::get_array_instance(constructor_type->fields.array, - parameter_count); + glsl_type::get_array_instance(constructor_type->fields.array, + parameter_count); assert(constructor_type != NULL); assert(constructor_type->length == parameter_count); } @@ -1055,28 +1095,14 @@ /* Type cast each parameter and, if possible, fold constants. */ foreach_in_list_safe(ir_rvalue, ir, &actual_parameters) { - ir_rvalue *result = ir; - - const glsl_base_type element_base_type = - constructor_type->fields.array->base_type; - - /* Apply implicit conversions (not the scalar constructor rules!). See - * the spec quote above. */ - if (element_base_type != result->type->base_type) { - const glsl_type *desired_type = - glsl_type::get_instance(element_base_type, - ir->type->vector_elements, - ir->type->matrix_columns); - - if (result->type->can_implicitly_convert_to(desired_type, state)) { - /* Even though convert_component() implements the constructor - * conversion rules (not the implicit conversion rules), its safe - * to use it here because we already checked that the implicit - * conversion is legal. - */ - result = convert_component(ir, desired_type); - } - } + /* Apply implicit conversions (not the scalar constructor rules, see the + * spec quote above!) and attempt to convert the parameter to a constant + * valued expression. After doing so, track whether or not all the + * parameters to the constructor are trivially constant valued + * expressions. + */ + all_parameters_are_constant &= + implicitly_convert_component(ir, element_type->base_type, state); if (constructor_type->fields.array->is_unsized_array()) { /* As the inner parameters of the constructor are created without @@ -1089,43 +1115,30 @@ * vec4[](vec4(0.0), vec4(1.0))); */ if (element_type->is_unsized_array()) { - /* This is the first parameter so just get the type */ - element_type = result->type; - } else if (element_type != result->type) { + /* This is the first parameter so just get the type */ + element_type = ir->type; + } else if (element_type != ir->type) { _mesa_glsl_error(loc, state, "type error in array constructor: " "expected: %s, found %s", element_type->name, - result->type->name); + ir->type->name); return ir_rvalue::error_value(ctx); } - } else if (result->type != constructor_type->fields.array) { - _mesa_glsl_error(loc, state, "type error in array constructor: " - "expected: %s, found %s", - constructor_type->fields.array->name, - result->type->name); + } else if (ir->type != constructor_type->fields.array) { + _mesa_glsl_error(loc, state, "type error in array constructor: " + "expected: %s, found %s", + constructor_type->fields.array->name, + ir->type->name); return ir_rvalue::error_value(ctx); } else { - element_type = result->type; + element_type = ir->type; } - - /* Attempt to convert the parameter to a constant valued expression. - * After doing so, track whether or not all the parameters to the - * constructor are trivially constant valued expressions. - */ - ir_rvalue *const constant = result->constant_expression_value(); - - if (constant != NULL) - result = constant; - else - all_parameters_are_constant = false; - - ir->replace_with(result); } if (constructor_type->fields.array->is_unsized_array()) { constructor_type = - glsl_type::get_array_instance(element_type, - parameter_count); + glsl_type::get_array_instance(element_type, + parameter_count); assert(constructor_type != NULL); assert(constructor_type->length == parameter_count); } @@ -1134,13 +1147,13 @@ return new(ctx) ir_constant(constructor_type, &actual_parameters); ir_variable *var = new(ctx) ir_variable(constructor_type, "array_ctor", - ir_var_temporary); + ir_var_temporary); instructions->push_tail(var); int i = 0; foreach_in_list(ir_rvalue, rhs, &actual_parameters) { ir_rvalue *lhs = new(ctx) ir_dereference_array(var, - new(ctx) ir_constant(i)); + new(ctx) ir_constant(i)); ir_instruction *assignment = new(ctx) ir_assignment(lhs, rhs, NULL); instructions->push_tail(assignment); @@ -1153,30 +1166,12 @@ /** - * Try to convert a record constructor to a constant expression - */ -static ir_constant * -constant_record_constructor(const glsl_type *constructor_type, - exec_list *parameters, void *mem_ctx) -{ - foreach_in_list(ir_instruction, node, parameters) { - ir_constant *constant = node->as_constant(); - if (constant == NULL) - return NULL; - node->replace_with(constant); - } - - return new(mem_ctx) ir_constant(constructor_type, parameters); -} - - -/** * Determine if a list consists of a single scalar r-value */ bool single_scalar_parameter(exec_list *parameters) { - const ir_rvalue *const p = (ir_rvalue *) parameters->head; + const ir_rvalue *const p = (ir_rvalue *) parameters->get_head_raw(); assert(((ir_rvalue *)p)->as_rvalue() != NULL); return (p->type->is_scalar() && p->next->is_tail_sentinel()); @@ -1196,9 +1191,9 @@ */ ir_rvalue * emit_inline_vector_constructor(const glsl_type *type, - exec_list *instructions, - exec_list *parameters, - void *ctx) + exec_list *instructions, + exec_list *parameters, + void *ctx) { assert(!parameters->is_empty()); @@ -1220,9 +1215,9 @@ */ const unsigned lhs_components = type->components(); if (single_scalar_parameter(parameters)) { - ir_rvalue *first_param = (ir_rvalue *)parameters->head; + ir_rvalue *first_param = (ir_rvalue *)parameters->get_head_raw(); ir_rvalue *rhs = new(ctx) ir_swizzle(first_param, 0, 0, 0, 0, - lhs_components); + lhs_components); ir_dereference_variable *lhs = new(ctx) ir_dereference_variable(var); const unsigned mask = (1U << lhs_components) - 1; @@ -1239,105 +1234,102 @@ memset(&data, 0, sizeof(data)); foreach_in_list(ir_rvalue, param, parameters) { - unsigned rhs_components = param->type->components(); + unsigned rhs_components = param->type->components(); + + /* Do not try to assign more components to the vector than it has! */ + if ((rhs_components + base_lhs_component) > lhs_components) { + rhs_components = lhs_components - base_lhs_component; + } + + const ir_constant *const c = param->as_constant(); + if (c != NULL) { + for (unsigned i = 0; i < rhs_components; i++) { + switch (c->type->base_type) { + case GLSL_TYPE_UINT: + data.u[i + base_component] = c->get_uint_component(i); + break; + case GLSL_TYPE_INT: + data.i[i + base_component] = c->get_int_component(i); + break; + case GLSL_TYPE_FLOAT: + data.f[i + base_component] = c->get_float_component(i); + break; + case GLSL_TYPE_DOUBLE: + data.d[i + base_component] = c->get_double_component(i); + break; + case GLSL_TYPE_BOOL: + data.b[i + base_component] = c->get_bool_component(i); + break; + default: + assert(!"Should not get here."); + break; + } + } + + /* Mask of fields to be written in the assignment. */ + constant_mask |= + ((1U << rhs_components) - 1) << base_lhs_component; + constant_components += rhs_components; - /* Do not try to assign more components to the vector than it has! - */ - if ((rhs_components + base_lhs_component) > lhs_components) { - rhs_components = lhs_components - base_lhs_component; - } - - const ir_constant *const c = param->as_constant(); - if (c != NULL) { - for (unsigned i = 0; i < rhs_components; i++) { - switch (c->type->base_type) { - case GLSL_TYPE_UINT: - data.u[i + base_component] = c->get_uint_component(i); - break; - case GLSL_TYPE_INT: - data.i[i + base_component] = c->get_int_component(i); - break; - case GLSL_TYPE_FLOAT: - data.f[i + base_component] = c->get_float_component(i); - break; - case GLSL_TYPE_DOUBLE: - data.d[i + base_component] = c->get_double_component(i); - break; - case GLSL_TYPE_BOOL: - data.b[i + base_component] = c->get_bool_component(i); - break; - default: - assert(!"Should not get here."); - break; - } - } - - /* Mask of fields to be written in the assignment. - */ - constant_mask |= ((1U << rhs_components) - 1) << base_lhs_component; - constant_components += rhs_components; - - base_component += rhs_components; - } - /* Advance the component index by the number of components - * that were just assigned. - */ - base_lhs_component += rhs_components; + base_component += rhs_components; + } + /* Advance the component index by the number of components + * that were just assigned. + */ + base_lhs_component += rhs_components; } if (constant_mask != 0) { - ir_dereference *lhs = new(ctx) ir_dereference_variable(var); - const glsl_type *rhs_type = glsl_type::get_instance(var->type->base_type, - constant_components, - 1); - ir_rvalue *rhs = new(ctx) ir_constant(rhs_type, &data); - - ir_instruction *inst = - new(ctx) ir_assignment(lhs, rhs, NULL, constant_mask); - instructions->push_tail(inst); + ir_dereference *lhs = new(ctx) ir_dereference_variable(var); + const glsl_type *rhs_type = + glsl_type::get_instance(var->type->base_type, + constant_components, + 1); + ir_rvalue *rhs = new(ctx) ir_constant(rhs_type, &data); + + ir_instruction *inst = + new(ctx) ir_assignment(lhs, rhs, NULL, constant_mask); + instructions->push_tail(inst); } base_component = 0; foreach_in_list(ir_rvalue, param, parameters) { - unsigned rhs_components = param->type->components(); + unsigned rhs_components = param->type->components(); - /* Do not try to assign more components to the vector than it has! - */ - if ((rhs_components + base_component) > lhs_components) { - rhs_components = lhs_components - base_component; - } - - /* If we do not have any components left to copy, break out of the - * loop. This can happen when initializing a vec4 with a mat3 as the - * mat3 would have been broken into a series of column vectors. - */ - if (rhs_components == 0) { - break; - } - - const ir_constant *const c = param->as_constant(); - if (c == NULL) { - /* Mask of fields to be written in the assignment. - */ - const unsigned write_mask = ((1U << rhs_components) - 1) - << base_component; - - ir_dereference *lhs = new(ctx) ir_dereference_variable(var); - - /* Generate a swizzle so that LHS and RHS sizes match. - */ - ir_rvalue *rhs = - new(ctx) ir_swizzle(param, 0, 1, 2, 3, rhs_components); - - ir_instruction *inst = - new(ctx) ir_assignment(lhs, rhs, NULL, write_mask); - instructions->push_tail(inst); - } - - /* Advance the component index by the number of components that were - * just assigned. - */ - base_component += rhs_components; + /* Do not try to assign more components to the vector than it has! */ + if ((rhs_components + base_component) > lhs_components) { + rhs_components = lhs_components - base_component; + } + + /* If we do not have any components left to copy, break out of the + * loop. This can happen when initializing a vec4 with a mat3 as the + * mat3 would have been broken into a series of column vectors. + */ + if (rhs_components == 0) { + break; + } + + const ir_constant *const c = param->as_constant(); + if (c == NULL) { + /* Mask of fields to be written in the assignment. */ + const unsigned write_mask = ((1U << rhs_components) - 1) + << base_component; + + ir_dereference *lhs = new(ctx) ir_dereference_variable(var); + + /* Generate a swizzle so that LHS and RHS sizes match. */ + ir_rvalue *rhs = + new(ctx) ir_swizzle(param, 0, 1, 2, 3, rhs_components); + + ir_instruction *inst = + new(ctx) ir_assignment(lhs, rhs, NULL, write_mask); + instructions->push_tail(inst); + } + + /* Advance the component index by the number of components that were + * just assigned. + */ + base_component += rhs_components; } } return new(ctx) ir_dereference_variable(var); @@ -1353,16 +1345,17 @@ * \param count Number of components to be assigned * * \note - * \c src_base + \c count must be less than or equal to the number of components - * in the source vector. + * \c src_base + \c count must be less than or equal to the number of + * components in the source vector. */ ir_instruction * assign_to_matrix_column(ir_variable *var, unsigned column, unsigned row_base, - ir_rvalue *src, unsigned src_base, unsigned count, - void *mem_ctx) + ir_rvalue *src, unsigned src_base, unsigned count, + void *mem_ctx) { ir_constant *col_idx = new(mem_ctx) ir_constant(column); - ir_dereference *column_ref = new(mem_ctx) ir_dereference_array(var, col_idx); + ir_dereference *column_ref = new(mem_ctx) ir_dereference_array(var, + col_idx); assert(column_ref->type->components() >= (row_base + count)); assert(src->type->components() >= (src_base + count)); @@ -1372,13 +1365,12 @@ */ if (count < src->type->vector_elements) { src = new(mem_ctx) ir_swizzle(src, - src_base + 0, src_base + 1, - src_base + 2, src_base + 3, - count); + src_base + 0, src_base + 1, + src_base + 2, src_base + 3, + count); } - /* Mask of fields to be written in the assignment. - */ + /* Mask of fields to be written in the assignment. */ const unsigned write_mask = ((1U << count) - 1) << row_base; return new(mem_ctx) ir_assignment(column_ref, src, NULL, write_mask); @@ -1398,9 +1390,9 @@ */ ir_rvalue * emit_inline_matrix_constructor(const glsl_type *type, - exec_list *instructions, - exec_list *parameters, - void *ctx) + exec_list *instructions, + exec_list *parameters, + void *ctx) { assert(!parameters->is_empty()); @@ -1421,7 +1413,7 @@ * to the upper left portion of the constructed matrix, and the remaining * elements take values from the identity matrix. */ - ir_rvalue *const first_param = (ir_rvalue *) parameters->head; + ir_rvalue *const first_param = (ir_rvalue *) parameters->get_head_raw(); if (single_scalar_parameter(parameters)) { /* Assign the scalar to the X component of a vec4, and fill the remaining * components with zero. @@ -1448,7 +1440,8 @@ NULL); instructions->push_tail(inst); - ir_dereference *const rhs_ref = new(ctx) ir_dereference_variable(rhs_var); + ir_dereference *const rhs_ref = + new(ctx) ir_dereference_variable(rhs_var); inst = new(ctx) ir_assignment(rhs_ref, first_param, NULL, 0x01); instructions->push_tail(inst); @@ -1470,7 +1463,8 @@ type->vector_elements); for (unsigned i = 0; i < cols_to_init; i++) { ir_constant *const col_idx = new(ctx) ir_constant(i); - ir_rvalue *const col_ref = new(ctx) ir_dereference_array(var, col_idx); + ir_rvalue *const col_ref = new(ctx) ir_dereference_array(var, + col_idx); ir_rvalue *const rhs_ref = new(ctx) ir_dereference_variable(rhs_var); ir_rvalue *const rhs = new(ctx) ir_swizzle(rhs_ref, rhs_swiz[i], @@ -1482,7 +1476,8 @@ for (unsigned i = cols_to_init; i < type->matrix_columns; i++) { ir_constant *const col_idx = new(ctx) ir_constant(i); - ir_rvalue *const col_ref = new(ctx) ir_dereference_array(var, col_idx); + ir_rvalue *const col_ref = new(ctx) ir_dereference_array(var, + col_idx); ir_rvalue *const rhs_ref = new(ctx) ir_dereference_variable(rhs_var); ir_rvalue *const rhs = new(ctx) ir_swizzle(rhs_ref, 1, 1, 1, 1, @@ -1510,9 +1505,10 @@ if ((src_matrix->type->matrix_columns < var->type->matrix_columns) || (src_matrix->type->vector_elements < var->type->vector_elements)) { - /* If the source matrix has fewer rows, every column of the destination - * must be initialized. Otherwise only the columns in the destination - * that do not exist in the source must be initialized. + /* If the source matrix has fewer rows, every column of the + * destination must be initialized. Otherwise only the columns in + * the destination that do not exist in the source must be + * initialized. */ unsigned col = (src_matrix->type->vector_elements < var->type->vector_elements) @@ -1585,7 +1581,8 @@ * therefore have the same type). * * It would be perfectly valid to unconditionally generate the - * swizzles, this this will typically result in a more compact IR tree. + * swizzles, this this will typically result in a more compact IR + * tree. */ ir_rvalue *rhs; if (lhs->type->vector_elements != rhs_col->type->vector_elements) { @@ -1636,10 +1633,10 @@ rhs_var_ref = new(ctx) ir_dereference_variable(rhs_var); ir_instruction *inst = assign_to_matrix_column(var, col_idx, - row_idx, - rhs_var_ref, - rhs_base, - count, ctx); + row_idx, + rhs_var_ref, + rhs_base, + count, ctx); instructions->push_tail(inst); rhs_base += count; row_idx += count; @@ -1663,28 +1660,30 @@ ir_rvalue * emit_inline_record_constructor(const glsl_type *type, - exec_list *instructions, - exec_list *parameters, - void *mem_ctx) + exec_list *instructions, + exec_list *parameters, + void *mem_ctx) { ir_variable *const var = new(mem_ctx) ir_variable(type, "record_ctor", ir_var_temporary); - ir_dereference_variable *const d = new(mem_ctx) ir_dereference_variable(var); + ir_dereference_variable *const d = + new(mem_ctx) ir_dereference_variable(var); instructions->push_tail(var); - exec_node *node = parameters->head; + exec_node *node = parameters->get_head_raw(); for (unsigned i = 0; i < type->length; i++) { assert(!node->is_tail_sentinel()); ir_dereference *const lhs = - new(mem_ctx) ir_dereference_record(d->clone(mem_ctx, NULL), - type->fields.structure[i].name); + new(mem_ctx) ir_dereference_record(d->clone(mem_ctx, NULL), + type->fields.structure[i].name); ir_rvalue *const rhs = ((ir_instruction *) node)->as_rvalue(); assert(rhs != NULL); - ir_instruction *const assign = new(mem_ctx) ir_assignment(lhs, rhs, NULL); + ir_instruction *const assign = + new(mem_ctx) ir_assignment(lhs, rhs, NULL); instructions->push_tail(assign); node = node->next; @@ -1701,53 +1700,77 @@ struct _mesa_glsl_parse_state *state) { void *ctx = state; + /* From page 32 (page 38 of the PDF) of the GLSL 1.20 spec: + * + * "The arguments to the constructor will be used to set the structure's + * fields, in order, using one argument per field. Each argument must + * be the same type as the field it sets, or be a type that can be + * converted to the field's type according to Section 4.1.10 “Implicit + * Conversions.”" + * + * From page 35 (page 41 of the PDF) of the GLSL 4.20 spec: + * + * "In all cases, the innermost initializer (i.e., not a list of + * initializers enclosed in curly braces) applied to an object must + * have the same type as the object being initialized or be a type that + * can be converted to the object's type according to section 4.1.10 + * "Implicit Conversions". In the latter case, an implicit conversion + * will be done on the initializer before the assignment is done." + */ exec_list actual_parameters; - process_parameters(instructions, &actual_parameters, - parameters, state); + const unsigned parameter_count = + process_parameters(instructions, &actual_parameters, parameters, + state); - exec_node *node = actual_parameters.head; - for (unsigned i = 0; i < constructor_type->length; i++) { - ir_rvalue *ir = (ir_rvalue *) node; + if (parameter_count != constructor_type->length) { + _mesa_glsl_error(loc, state, + "%s parameters in constructor for `%s'", + parameter_count > constructor_type->length + ? "too many": "insufficient", + constructor_type->name); + return ir_rvalue::error_value(ctx); + } - if (node->is_tail_sentinel()) { - _mesa_glsl_error(loc, state, - "insufficient parameters to constructor for `%s'", - constructor_type->name); - return ir_rvalue::error_value(ctx); - } + bool all_parameters_are_constant = true; - if (apply_implicit_conversion(constructor_type->fields.structure[i].type, - ir, state)) { - node->replace_with(ir); - } else { + int i = 0; + /* Type cast each parameter and, if possible, fold constants. */ + foreach_in_list_safe(ir_rvalue, ir, &actual_parameters) { + + const glsl_struct_field *struct_field = + &constructor_type->fields.structure[i]; + + /* Apply implicit conversions (not the scalar constructor rules, see the + * spec quote above!) and attempt to convert the parameter to a constant + * valued expression. After doing so, track whether or not all the + * parameters to the constructor are trivially constant valued + * expressions. + */ + all_parameters_are_constant &= + implicitly_convert_component(ir, struct_field->type->base_type, + state); + + if (ir->type != struct_field->type) { _mesa_glsl_error(loc, state, "parameter type mismatch in constructor for `%s.%s' " "(%s vs %s)", constructor_type->name, - constructor_type->fields.structure[i].name, + struct_field->name, ir->type->name, - constructor_type->fields.structure[i].type->name); + struct_field->type->name); return ir_rvalue::error_value(ctx); } - node = node->next; + i++; } - if (!node->is_tail_sentinel()) { - _mesa_glsl_error(loc, state, "too many parameters in constructor " - "for `%s'", constructor_type->name); - return ir_rvalue::error_value(ctx); + if (all_parameters_are_constant) { + return new(ctx) ir_constant(constructor_type, &actual_parameters); + } else { + return emit_inline_record_constructor(constructor_type, instructions, + &actual_parameters, state); } - - ir_rvalue *const constant = - constant_record_constructor(constructor_type, &actual_parameters, - state); - - return (constant != NULL) - ? constant - : emit_inline_record_constructor(constructor_type, instructions, - &actual_parameters, state); } ir_rvalue * @@ -1779,12 +1802,14 @@ if (op->type->is_array()) { if (op->type->is_unsized_array()) { if (!state->has_shader_storage_buffer_objects()) { - _mesa_glsl_error(&loc, state, "length called on unsized array" - " only available with " - "ARB_shader_storage_buffer_object"); + _mesa_glsl_error(&loc, state, + "length called on unsized array" + " only available with" + " ARB_shader_storage_buffer_object"); } /* Calculate length of an unsized array in run-time */ - result = new(ctx) ir_expression(ir_unop_ssbo_unsized_array_length, op); + result = new(ctx) ir_expression(ir_unop_ssbo_unsized_array_length, + op); } else { result = new(ctx) ir_constant(op->type->array_size()); } @@ -1793,8 +1818,8 @@ /* .length() returns int. */ result = new(ctx) ir_constant((int) op->type->vector_elements); } else { - _mesa_glsl_error(&loc, state, "length method on matrix only available" - "with ARB_shading_language_420pack"); + _mesa_glsl_error(&loc, state, "length method on matrix only" + " available with ARB_shading_language_420pack"); goto fail; } } else if (op->type->is_matrix()) { @@ -1802,8 +1827,8 @@ /* .length() returns int. */ result = new(ctx) ir_constant((int) op->type->matrix_columns); } else { - _mesa_glsl_error(&loc, state, "length method on matrix only available" - "with ARB_shading_language_420pack"); + _mesa_glsl_error(&loc, state, "length method on matrix only" + " available with ARB_shading_language_420pack"); goto fail; } } else { @@ -1811,17 +1836,17 @@ goto fail; } } else { - _mesa_glsl_error(&loc, state, "unknown method: `%s'", method); - goto fail; + _mesa_glsl_error(&loc, state, "unknown method: `%s'", method); + goto fail; } return result; -fail: + fail: return ir_rvalue::error_value(ctx); } ir_rvalue * ast_function_expression::hir(exec_list *instructions, - struct _mesa_glsl_parse_state *state) + struct _mesa_glsl_parse_state *state) { void *ctx = state; /* There are three sorts of function calls. @@ -1832,7 +1857,8 @@ * */ if (is_constructor()) { - const ast_type_specifier *type = (ast_type_specifier *) subexpressions[0]; + const ast_type_specifier *type = + (ast_type_specifier *) subexpressions[0]; YYLTYPE loc = type->get_location(); const char *name; @@ -1842,35 +1868,36 @@ * structure has come into scope. */ if (constructor_type == NULL) { - _mesa_glsl_error(& loc, state, "unknown type `%s' (structure name " - "may be shadowed by a variable with the same name)", - type->type_name); - return ir_rvalue::error_value(ctx); + _mesa_glsl_error(& loc, state, "unknown type `%s' (structure name " + "may be shadowed by a variable with the same name)", + type->type_name); + return ir_rvalue::error_value(ctx); } /* Constructors for opaque types are illegal. */ if (constructor_type->contains_opaque()) { - _mesa_glsl_error(& loc, state, "cannot construct opaque type `%s'", - constructor_type->name); - return ir_rvalue::error_value(ctx); + _mesa_glsl_error(& loc, state, "cannot construct opaque type `%s'", + constructor_type->name); + return ir_rvalue::error_value(ctx); } if (constructor_type->is_subroutine()) { - _mesa_glsl_error(& loc, state, "subroutine name cannot be a constructor `%s'", + _mesa_glsl_error(& loc, state, + "subroutine name cannot be a constructor `%s'", constructor_type->name); - return ir_rvalue::error_value(ctx); + return ir_rvalue::error_value(ctx); } if (constructor_type->is_array()) { if (!state->check_version(120, 300, &loc, "array constructors forbidden")) { - return ir_rvalue::error_value(ctx); - } + return ir_rvalue::error_value(ctx); + } - return process_array_constructor(instructions, constructor_type, - & loc, &this->expressions, state); + return process_array_constructor(instructions, constructor_type, + & loc, &this->expressions, state); } @@ -1895,7 +1922,7 @@ } if (!constructor_type->is_numeric() && !constructor_type->is_boolean()) - return ir_rvalue::error_value(ctx); + return ir_rvalue::error_value(ctx); /* Total number of components of the type being constructed. */ const unsigned type_components = constructor_type->components(); @@ -1910,37 +1937,37 @@ exec_list actual_parameters; foreach_list_typed(ast_node, ast, link, &this->expressions) { - ir_rvalue *result = ast->hir(instructions, state); + ir_rvalue *result = ast->hir(instructions, state); - /* From page 50 (page 56 of the PDF) of the GLSL 1.50 spec: - * - * "It is an error to provide extra arguments beyond this - * last used argument." - */ - if (components_used >= type_components) { - _mesa_glsl_error(& loc, state, "too many parameters to `%s' " - "constructor", - constructor_type->name); - return ir_rvalue::error_value(ctx); - } - - if (!result->type->is_numeric() && !result->type->is_boolean()) { - _mesa_glsl_error(& loc, state, "cannot construct `%s' from a " - "non-numeric data type", - constructor_type->name); - return ir_rvalue::error_value(ctx); - } - - /* Count the number of matrix and nonmatrix parameters. This - * is used below to enforce some of the constructor rules. - */ - if (result->type->is_matrix()) - matrix_parameters++; - else - nonmatrix_parameters++; + /* From page 50 (page 56 of the PDF) of the GLSL 1.50 spec: + * + * "It is an error to provide extra arguments beyond this + * last used argument." + */ + if (components_used >= type_components) { + _mesa_glsl_error(& loc, state, "too many parameters to `%s' " + "constructor", + constructor_type->name); + return ir_rvalue::error_value(ctx); + } - actual_parameters.push_tail(result); - components_used += result->type->components(); + if (!result->type->is_numeric() && !result->type->is_boolean()) { + _mesa_glsl_error(& loc, state, "cannot construct `%s' from a " + "non-numeric data type", + constructor_type->name); + return ir_rvalue::error_value(ctx); + } + + /* Count the number of matrix and nonmatrix parameters. This + * is used below to enforce some of the constructor rules. + */ + if (result->type->is_matrix()) + matrix_parameters++; + else + nonmatrix_parameters++; + + actual_parameters.push_tail(result); + components_used += result->type->components(); } /* From page 28 (page 34 of the PDF) of the GLSL 1.10 spec: @@ -1953,7 +1980,7 @@ && !state->check_version(120, 100, &loc, "cannot construct `%s' from a matrix", constructor_type->name)) { - return ir_rvalue::error_value(ctx); + return ir_rvalue::error_value(ctx); } /* From page 50 (page 56 of the PDF) of the GLSL 1.50 spec: @@ -1962,12 +1989,12 @@ * an error to have any other arguments." */ if ((matrix_parameters > 0) - && ((matrix_parameters + nonmatrix_parameters) > 1) - && constructor_type->is_matrix()) { - _mesa_glsl_error(& loc, state, "for matrix `%s' constructor, " - "matrix must be only parameter", - constructor_type->name); - return ir_rvalue::error_value(ctx); + && ((matrix_parameters + nonmatrix_parameters) > 1) + && constructor_type->is_matrix()) { + _mesa_glsl_error(& loc, state, "for matrix `%s' constructor, " + "matrix must be only parameter", + constructor_type->name); + return ir_rvalue::error_value(ctx); } /* From page 28 (page 34 of the PDF) of the GLSL 1.10 spec: @@ -1977,11 +2004,11 @@ * constructed value." */ if (components_used < type_components && components_used != 1 - && matrix_parameters == 0) { - _mesa_glsl_error(& loc, state, "too few components to construct " - "`%s'", - constructor_type->name); - return ir_rvalue::error_value(ctx); + && matrix_parameters == 0) { + _mesa_glsl_error(& loc, state, "too few components to construct " + "`%s'", + constructor_type->name); + return ir_rvalue::error_value(ctx); } /* Matrices can never be consumed as is by any constructor but matrix @@ -1989,93 +2016,98 @@ * matrix up into a series of column vectors. */ if (!constructor_type->is_matrix()) { - foreach_in_list_safe(ir_rvalue, matrix, &actual_parameters) { - if (!matrix->type->is_matrix()) - continue; - - /* Create a temporary containing the matrix. */ - ir_variable *var = new(ctx) ir_variable(matrix->type, "matrix_tmp", - ir_var_temporary); - instructions->push_tail(var); - instructions->push_tail(new(ctx) ir_assignment(new(ctx) - ir_dereference_variable(var), matrix, NULL)); - var->constant_value = matrix->constant_expression_value(); - - /* Replace the matrix with dereferences of its columns. */ - for (int i = 0; i < matrix->type->matrix_columns; i++) { - matrix->insert_before(new (ctx) ir_dereference_array(var, - new(ctx) ir_constant(i))); - } - matrix->remove(); - } + foreach_in_list_safe(ir_rvalue, matrix, &actual_parameters) { + if (!matrix->type->is_matrix()) + continue; + + /* Create a temporary containing the matrix. */ + ir_variable *var = new(ctx) ir_variable(matrix->type, "matrix_tmp", + ir_var_temporary); + instructions->push_tail(var); + instructions->push_tail( + new(ctx) ir_assignment(new(ctx) ir_dereference_variable(var), + matrix, NULL)); + var->constant_value = matrix->constant_expression_value(); + + /* Replace the matrix with dereferences of its columns. */ + for (int i = 0; i < matrix->type->matrix_columns; i++) { + matrix->insert_before( + new (ctx) ir_dereference_array(var, + new(ctx) ir_constant(i))); + } + matrix->remove(); + } } bool all_parameters_are_constant = true; /* Type cast each parameter and, if possible, fold constants.*/ foreach_in_list_safe(ir_rvalue, ir, &actual_parameters) { - const glsl_type *desired_type = - glsl_type::get_instance(constructor_type->base_type, - ir->type->vector_elements, - ir->type->matrix_columns); - ir_rvalue *result = convert_component(ir, desired_type); - - /* Attempt to convert the parameter to a constant valued expression. - * After doing so, track whether or not all the parameters to the - * constructor are trivially constant valued expressions. - */ - ir_rvalue *const constant = result->constant_expression_value(); - - if (constant != NULL) - result = constant; - else - all_parameters_are_constant = false; - - if (result != ir) { - ir->replace_with(result); - } + const glsl_type *desired_type = + glsl_type::get_instance(constructor_type->base_type, + ir->type->vector_elements, + ir->type->matrix_columns); + ir_rvalue *result = convert_component(ir, desired_type); + + /* Attempt to convert the parameter to a constant valued expression. + * After doing so, track whether or not all the parameters to the + * constructor are trivially constant valued expressions. + */ + ir_rvalue *const constant = result->constant_expression_value(); + + if (constant != NULL) + result = constant; + else + all_parameters_are_constant = false; + + if (result != ir) { + ir->replace_with(result); + } } /* If all of the parameters are trivially constant, create a * constant representing the complete collection of parameters. */ if (all_parameters_are_constant) { - return new(ctx) ir_constant(constructor_type, &actual_parameters); + return new(ctx) ir_constant(constructor_type, &actual_parameters); } else if (constructor_type->is_scalar()) { - return dereference_component((ir_rvalue *) actual_parameters.head, - 0); + return dereference_component((ir_rvalue *) + actual_parameters.get_head_raw(), + 0); } else if (constructor_type->is_vector()) { - return emit_inline_vector_constructor(constructor_type, - instructions, - &actual_parameters, - ctx); + return emit_inline_vector_constructor(constructor_type, + instructions, + &actual_parameters, + ctx); } else { - assert(constructor_type->is_matrix()); - return emit_inline_matrix_constructor(constructor_type, - instructions, - &actual_parameters, - ctx); + assert(constructor_type->is_matrix()); + return emit_inline_matrix_constructor(constructor_type, + instructions, + &actual_parameters, + ctx); } } else if (subexpressions[0]->oper == ast_field_selection) { return handle_method(instructions, state); } else { const ast_expression *id = subexpressions[0]; - const char *func_name; + const char *func_name = NULL; YYLTYPE loc = get_location(); exec_list actual_parameters; ir_variable *sub_var = NULL; ir_rvalue *array_idx = NULL; process_parameters(instructions, &actual_parameters, &this->expressions, - state); + state); if (id->oper == ast_array_index) { array_idx = generate_array_index(ctx, instructions, state, loc, id->subexpressions[0], id->subexpressions[1], &func_name, &actual_parameters); - } else { + } else if (id->oper == ast_identifier) { func_name = id->primary_expression.identifier; + } else { + _mesa_glsl_error(&loc, state, "function name is not an identifier"); } /* an error was emitted earlier */ @@ -2083,21 +2115,55 @@ return ir_rvalue::error_value(ctx); ir_function_signature *sig = - match_function_by_name(func_name, &actual_parameters, state); + match_function_by_name(func_name, &actual_parameters, state); ir_rvalue *value = NULL; if (sig == NULL) { - sig = match_subroutine_by_name(func_name, &actual_parameters, state, &sub_var); + sig = match_subroutine_by_name(func_name, &actual_parameters, + state, &sub_var); } if (sig == NULL) { - no_matching_function_error(func_name, &loc, &actual_parameters, state); - value = ir_rvalue::error_value(ctx); - } else if (!verify_parameter_modes(state, sig, actual_parameters, this->expressions)) { - /* an error has already been emitted */ - value = ir_rvalue::error_value(ctx); + no_matching_function_error(func_name, &loc, + &actual_parameters, state); + value = ir_rvalue::error_value(ctx); + } else if (!verify_parameter_modes(state, sig, + actual_parameters, + this->expressions)) { + /* an error has already been emitted */ + value = ir_rvalue::error_value(ctx); + } else if (sig->is_builtin() && strcmp(func_name, "ftransform") == 0) { + /* ftransform refers to global variables, and we don't have any code + * for remapping the variable references in the built-in shader. + */ + ir_variable *mvp = + state->symbols->get_variable("gl_ModelViewProjectionMatrix"); + ir_variable *vtx = state->symbols->get_variable("gl_Vertex"); + value = new(ctx) ir_expression(ir_binop_mul, glsl_type::vec4_type, + new(ctx) ir_dereference_variable(mvp), + new(ctx) ir_dereference_variable(vtx)); } else { - value = generate_call(instructions, sig, &actual_parameters, sub_var, array_idx, state); + if (state->stage == MESA_SHADER_TESS_CTRL && + sig->is_builtin() && strcmp(func_name, "barrier") == 0) { + if (state->current_function == NULL || + strcmp(state->current_function->function_name(), "main") != 0) { + _mesa_glsl_error(&loc, state, + "barrier() may only be used in main()"); + } + + if (state->found_return) { + _mesa_glsl_error(&loc, state, + "barrier() may not be used after return"); + } + + if (instructions != &state->current_function->body) { + _mesa_glsl_error(&loc, state, + "barrier() may not be used in control flow"); + } + } + + value = generate_call(instructions, sig, &actual_parameters, sub_var, + array_idx, state, sig->is_builtin()); if (!value) { ir_variable *const tmp = new(ctx) ir_variable(glsl_type::void_type, "void_var", diff -Nru mesa-12.0.6/src/compiler/glsl/ast.h mesa-17.0.7/src/compiler/glsl/ast.h --- mesa-12.0.6/src/compiler/glsl/ast.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ast.h 2017-06-01 10:37:10.000000000 +0000 @@ -49,7 +49,7 @@ */ class ast_node { public: - DECLARE_RALLOC_CXX_OPERATORS(ast_node); + DECLARE_LINEAR_ZALLOC_CXX_OPERATORS(ast_node); /** * Print an AST node in something approximating the original GLSL code @@ -198,6 +198,15 @@ ast_sequence, ast_aggregate + + /** + * Number of possible operators for an ast_expression + * + * This is done as a define instead of as an additional value in the enum so + * that the compiler won't generate spurious messages like "warning: + * enumeration value ‘ast_num_operators’ not handled in switch" + */ + #define AST_NUM_OPERATORS (ast_aggregate + 1) }; /** @@ -346,8 +355,8 @@ bool is_single_dimension() const { - return this->array_dimensions.tail_pred->prev != NULL && - this->array_dimensions.tail_pred->prev->is_head_sentinel(); + return this->array_dimensions.get_tail_raw()->prev != NULL && + this->array_dimensions.get_tail_raw()->prev->is_head_sentinel(); } virtual void print(void) const; @@ -368,8 +377,7 @@ bool process_qualifier_constant(struct _mesa_glsl_parse_state *state, const char *qual_indentifier, - unsigned *value, bool can_be_zero, - bool must_match = false); + unsigned *value, bool can_be_zero); void merge_qualifier(ast_layout_expression *l_expr) { @@ -416,15 +424,6 @@ struct _mesa_glsl_parse_state *state); }; -/** - * Number of possible operators for an ast_expression - * - * This is done as a define instead of as an additional value in the enum so - * that the compiler won't generate spurious messages like "warning: - * enumeration value ‘ast_num_operators’ not handled in switch" - */ -#define AST_NUM_OPERATORS (ast_sequence + 1) - class ast_compound_statement : public ast_node { public: @@ -553,6 +552,11 @@ */ unsigned local_size:3; + /** \name Layout qualifiers for ARB_compute_variable_group_size. */ + /** \{ */ + unsigned local_size_variable:1; + /** \} */ + /** \name Layout and memory qualifiers for ARB_shader_image_load_store. */ /** \{ */ unsigned early_fragment_tests:1; @@ -596,6 +600,21 @@ unsigned subroutine:1; /**< Is this marked 'subroutine' */ unsigned subroutine_def:1; /**< Is this marked 'subroutine' with a list of types */ /** \} */ + + /** \name Qualifiers for GL_KHR_blend_equation_advanced */ + /** \{ */ + unsigned blend_support:1; /**< Are there any blend_support_ qualifiers */ + /** \} */ + + /** + * Flag set if GL_ARB_post_depth_coverage layout qualifier is used. + */ + unsigned post_depth_coverage:1; + /** + * Flag set if GL_INTEL_conservartive_rasterization layout qualifier + * is used. + */ + unsigned inner_coverage:1; } /** \brief Set of flags, accessed by name. */ q; @@ -685,7 +704,7 @@ ast_layout_expression *local_size[3]; /** Tessellation evaluation shader: vertex spacing (equal, fractional even/odd) */ - GLenum vertex_spacing; + enum gl_tess_spacing vertex_spacing; /** Tessellation evaluation shader: vertex ordering (CW or CCW) */ GLenum ordering; @@ -715,9 +734,6 @@ */ glsl_base_type image_base_type; - /** Flag to know if this represents a default value for a qualifier */ - bool is_default_qualifier; - /** * Return true if and only if an interpolation qualifier is present. */ @@ -738,25 +754,53 @@ */ bool has_auxiliary_storage() const; + /** + * Return true if and only if a memory qualifier is present. + */ + bool has_memory() const; + bool merge_qualifier(YYLTYPE *loc, _mesa_glsl_parse_state *state, const ast_type_qualifier &q, - bool is_single_layout_merge); + bool is_single_layout_merge, + bool is_multiple_layouts_merge = false); + + /** + * Validate current qualifier against the global out one. + */ + bool validate_out_qualifier(YYLTYPE *loc, + _mesa_glsl_parse_state *state); + + /** + * Merge current qualifier into the global out one. + */ + bool merge_into_out_qualifier(YYLTYPE *loc, + _mesa_glsl_parse_state *state, + ast_node* &node); - bool merge_out_qualifier(YYLTYPE *loc, - _mesa_glsl_parse_state *state, - const ast_type_qualifier &q, - ast_node* &node, bool create_node); - - bool merge_in_qualifier(YYLTYPE *loc, - _mesa_glsl_parse_state *state, - const ast_type_qualifier &q, - ast_node* &node, bool create_node); + /** + * Validate current qualifier against the global in one. + */ + bool validate_in_qualifier(YYLTYPE *loc, + _mesa_glsl_parse_state *state); + + /** + * Merge current qualifier into the global in one. + */ + bool merge_into_in_qualifier(YYLTYPE *loc, + _mesa_glsl_parse_state *state, + ast_node* &node); + + /** + * Push pending layout qualifiers to the global values. + */ + bool push_to_global(YYLTYPE *loc, + _mesa_glsl_parse_state *state); bool validate_flags(YYLTYPE *loc, _mesa_glsl_parse_state *state, - const char *message, - const ast_type_qualifier &allowed_flags); + const ast_type_qualifier &allowed_flags, + const char *message, const char *name); ast_subroutine_list *subroutine_list; }; @@ -765,7 +809,7 @@ class ast_struct_specifier : public ast_node { public: - ast_struct_specifier(const char *identifier, + ast_struct_specifier(void *lin_ctx, const char *identifier, ast_declarator_list *declarator_list); virtual void print(void) const; @@ -1129,6 +1173,7 @@ virtual ir_rvalue *hir(exec_list *instructions, struct _mesa_glsl_parse_state *state); + ast_type_qualifier default_layout; ast_type_qualifier layout; const char *block_name; diff -Nru mesa-12.0.6/src/compiler/glsl/ast_to_hir.cpp mesa-17.0.7/src/compiler/glsl/ast_to_hir.cpp --- mesa-12.0.6/src/compiler/glsl/ast_to_hir.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ast_to_hir.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -53,7 +53,7 @@ #include "glsl_parser_extras.h" #include "ast.h" #include "compiler/glsl_types.h" -#include "program/hash_table.h" +#include "util/hash_table.h" #include "main/macros.h" #include "main/shaderobj.h" #include "ir.h" @@ -63,7 +63,7 @@ static void detect_conflicting_assignments(struct _mesa_glsl_parse_state *state, - exec_list *instructions); + exec_list *instructions); static void remove_per_vertex_blocks(exec_list *instructions, _mesa_glsl_parse_state *state, ir_variable_mode mode); @@ -244,7 +244,8 @@ } case GLSL_TYPE_UINT: - if (!state->is_version(400, 0) && !state->ARB_gpu_shader5_enable) + if (!state->is_version(400, 0) && !state->ARB_gpu_shader5_enable + && !state->MESA_shader_integer_functions_enable) return (ir_expression_operation)0; switch (from->base_type) { case GLSL_TYPE_INT: return ir_unop_i2u; @@ -279,7 +280,7 @@ * If a conversion is possible (or unnecessary), \c true is returned. * Otherwise \c false is returned. */ -bool +static bool apply_implicit_conversion(const glsl_type *to, ir_rvalue * &from, struct _mesa_glsl_parse_state *state) { @@ -882,7 +883,7 @@ /* Check for implicit conversion in GLSL 1.20 */ if (apply_implicit_conversion(lhs->type, rhs, state)) { if (rhs->type == lhs->type) - return rhs; + return rhs; } _mesa_glsl_error(&loc, state, @@ -1000,17 +1001,20 @@ * i = j += 1; */ if (needs_rvalue) { - ir_variable *var = new(ctx) ir_variable(rhs->type, "assignment_tmp", - ir_var_temporary); - instructions->push_tail(var); - instructions->push_tail(assign(var, rhs)); - + ir_rvalue *rvalue; if (!error_emitted) { - ir_dereference_variable *deref_var = new(ctx) ir_dereference_variable(var); + ir_variable *var = new(ctx) ir_variable(rhs->type, "assignment_tmp", + ir_var_temporary); + instructions->push_tail(var); + instructions->push_tail(assign(var, rhs)); + + ir_dereference_variable *deref_var = + new(ctx) ir_dereference_variable(var); instructions->push_tail(new(ctx) ir_assignment(lhs, deref_var)); + rvalue = new(ctx) ir_dereference_variable(var); + } else { + rvalue = ir_rvalue::error_value(ctx); } - ir_rvalue *rvalue = new(ctx) ir_dereference_variable(var); - *out_rvalue = rvalue; } else { if (!error_emitted) @@ -1028,11 +1032,11 @@ ir_variable *var; var = new(ctx) ir_variable(lvalue->type, "_post_incdec_tmp", - ir_var_temporary); + ir_var_temporary); instructions->push_tail(var); instructions->push_tail(new(ctx) ir_assignment(new(ctx) ir_dereference_variable(var), - lvalue)); + lvalue)); return new(ctx) ir_dereference_variable(var); } @@ -1159,11 +1163,11 @@ */ ir_rvalue * get_scalar_boolean_operand(exec_list *instructions, - struct _mesa_glsl_parse_state *state, - ast_expression *parent_expr, - int operand, - const char *operand_name, - bool *error_emitted) + struct _mesa_glsl_parse_state *state, + ast_expression *parent_expr, + int operand, + const char *operand_name, + bool *error_emitted) { ast_expression *expr = parent_expr->subexpressions[operand]; void *ctx = state; @@ -1276,7 +1280,7 @@ ast_expression::set_is_lhs(bool new_value) { /* is_lhs is tracked only to print "variable used uninitialized" warnings, - * if we lack a identifier we can just skip it. + * if we lack an identifier we can just skip it. */ if (this->primary_expression.identifier == NULL) return; @@ -1350,10 +1354,11 @@ -1, /* ast_float_constant doesn't conv to ir_expression. */ -1, /* ast_bool_constant doesn't conv to ir_expression. */ -1, /* ast_sequence doesn't convert to ir_expression. */ + -1, /* ast_aggregate shouldn't ever even get here. */ }; ir_rvalue *result = NULL; ir_rvalue *op[3]; - const struct glsl_type *type; /* a temporary variable for switch cases */ + const struct glsl_type *type, *orig_type; bool error_emitted = false; YYLTYPE loc; @@ -1455,8 +1460,8 @@ * in a scalar boolean. See page 57 of the GLSL 1.50 spec. */ assert(type->is_error() - || ((type->base_type == GLSL_TYPE_BOOL) - && type->is_scalar())); + || ((type->base_type == GLSL_TYPE_BOOL) + && type->is_scalar())); result = new(ctx) ir_expression(operations[this->oper], type, op[0], op[1]); @@ -1494,6 +1499,10 @@ !state->check_version(120, 300, &loc, "array comparisons forbidden")) { error_emitted = true; + } else if ((op[0]->type->contains_subroutine() || + op[1]->type->contains_subroutine())) { + _mesa_glsl_error(&loc, state, "subroutine comparisons forbidden"); + error_emitted = true; } else if ((op[0]->type->contains_opaque() || op[1]->type->contains_opaque())) { _mesa_glsl_error(&loc, state, "opaque type comparisons forbidden"); @@ -1639,10 +1648,18 @@ op[0] = this->subexpressions[0]->hir(instructions, state); op[1] = this->subexpressions[1]->hir(instructions, state); + orig_type = op[0]->type; type = arithmetic_result_type(op[0], op[1], (this->oper == ast_mul_assign), state, & loc); + if (type != orig_type) { + _mesa_glsl_error(& loc, state, + "could not implicitly convert " + "%s to %s", type->name, orig_type->name); + type = glsl_type::error_type; + } + ir_rvalue *temp_rhs = new(ctx) ir_expression(operations[this->oper], type, op[0], op[1]); @@ -1666,8 +1683,16 @@ op[0] = this->subexpressions[0]->hir(instructions, state); op[1] = this->subexpressions[1]->hir(instructions, state); + orig_type = op[0]->type; type = modulus_result_type(op[0], op[1], state, &loc); + if (type != orig_type) { + _mesa_glsl_error(& loc, state, + "could not implicitly convert " + "%s to %s", type->name, orig_type->name); + type = glsl_type::error_type; + } + assert(operations[this->oper] == ir_binop_mod); ir_rvalue *temp_rhs; @@ -1707,7 +1732,17 @@ this->subexpressions[0]->set_is_lhs(true); op[0] = this->subexpressions[0]->hir(instructions, state); op[1] = this->subexpressions[1]->hir(instructions, state); + + orig_type = op[0]->type; type = bit_logic_result_type(op[0], op[1], this->oper, state, &loc); + + if (type != orig_type) { + _mesa_glsl_error(& loc, state, + "could not implicitly convert " + "%s to %s", type->name, orig_type->name); + type = glsl_type::error_type; + } + ir_rvalue *temp_rhs = new(ctx) ir_expression(operations[this->oper], type, op[0], op[1]); error_emitted = @@ -1982,16 +2017,16 @@ * therefore add instructions to the instruction list), they get dropped * on the floor. */ - exec_node *previous_tail_pred = NULL; + exec_node *previous_tail = NULL; YYLTYPE previous_operand_loc = loc; foreach_list_typed (ast_node, ast, link, &this->expressions) { /* If one of the operands of comma operator does not generate any * code, we want to emit a warning. At each pass through the loop - * previous_tail_pred will point to the last instruction in the - * stream *before* processing the previous operand. Naturally, - * instructions->tail_pred will point to the last instruction in the - * stream *after* processing the previous operand. If the two + * previous_tail will point to the last instruction in the stream + * *before* processing the previous operand. Naturally, + * instructions->get_tail_raw() will point to the last instruction in + * the stream *after* processing the previous operand. If the two * pointers match, then the previous operand had no effect. * * The warning behavior here differs slightly from GCC. GCC will @@ -2002,18 +2037,18 @@ * effect, but I don't think these cases exist in GLSL. Either way, * it would be a giant hassle to replicate that behavior. */ - if (previous_tail_pred == instructions->tail_pred) { + if (previous_tail == instructions->get_tail_raw()) { _mesa_glsl_warning(&previous_operand_loc, state, "left-hand operand of comma expression has " "no effect"); } - /* tail_pred is directly accessed instead of using the get_tail() + /* The tail is directly accessed instead of using the get_tail() * method for performance reasons. get_tail() has extra code to * return NULL when the list is empty. We don't care about that - * here, so using tail_pred directly is fine. + * here, so using get_tail_raw() is fine. */ - previous_tail_pred = instructions->tail_pred; + previous_tail = instructions->get_tail_raw(); previous_operand_loc = ast->get_location(); result = ast->hir(instructions, state); @@ -2238,7 +2273,7 @@ } } - for (exec_node *node = array_specifier->array_dimensions.tail_pred; + for (exec_node *node = array_specifier->array_dimensions.get_tail_raw(); !node->is_head_sentinel(); node = node->prev) { unsigned array_size = process_array_size(node, state); array_type = glsl_type::get_array_instance(array_type, array_size); @@ -2553,6 +2588,20 @@ type->name); } } + + + /* Section 4.1.7.3 (Atomic Counters) of the GLSL ES 3.10 spec says: + * + * "The default precision of all atomic types is highp. It is an error to + * declare an atomic type with a different precision or to specify the + * default precision for an atomic type to be lowp or mediump." + */ + if (type->base_type == GLSL_TYPE_ATOMIC_UINT && + precision != ast_precision_high) { + _mesa_glsl_error(loc, state, + "atomic_uint can only have highp precision qualifier"); + } + return precision; } @@ -2585,6 +2634,28 @@ } } +static bool +is_allowed_invariant(ir_variable *var, struct _mesa_glsl_parse_state *state) +{ + if (is_varying_var(var, state->stage)) + return true; + + /* From Section 4.6.1 ("The Invariant Qualifier") GLSL 1.20 spec: + * "Only variables output from a vertex shader can be candidates + * for invariance". + */ + if (!state->is_version(130, 0)) + return false; + + /* + * Later specs remove this language - so allowed invariant + * on fragment shader outputs as well. + */ + if (state->stage == MESA_SHADER_FRAGMENT && + var->data.mode == ir_var_shader_out) + return true; + return false; +} /** * Matrix layout qualifiers are only allowed on certain types @@ -2826,7 +2897,7 @@ static void validate_interpolation_qualifier(struct _mesa_glsl_parse_state *state, YYLTYPE *loc, - const glsl_interp_qualifier interpolation, + const glsl_interp_mode interpolation, const struct ast_type_qualifier *qual, const struct glsl_type *var_type, ir_variable_mode mode) @@ -2855,7 +2926,7 @@ * fragment shader." */ if (state->is_version(130, 300) - && interpolation != INTERP_QUALIFIER_NONE) { + && interpolation != INTERP_MODE_NONE) { const char *i = interpolation_string(interpolation); if (mode != ir_var_shader_in && mode != ir_var_shader_out) _mesa_glsl_error(loc, state, @@ -2893,7 +2964,7 @@ * These deprecated storage qualifiers do not exist in GLSL ES 3.00. */ if (state->is_version(130, 0) - && interpolation != INTERP_QUALIFIER_NONE + && interpolation != INTERP_MODE_NONE && qual->flags.q.varying) { const char *i = interpolation_string(interpolation); @@ -2939,15 +3010,11 @@ */ if (state->is_version(130, 300) && var_type->contains_integer() - && interpolation != INTERP_QUALIFIER_FLAT - && ((state->stage == MESA_SHADER_FRAGMENT && mode == ir_var_shader_in) - || (state->stage == MESA_SHADER_VERTEX && mode == ir_var_shader_out - && state->es_shader))) { - const char *shader_var_type = (state->stage == MESA_SHADER_VERTEX) ? - "vertex output" : "fragment input"; - _mesa_glsl_error(loc, state, "if a %s is (or contains) " - "an integer, then it must be qualified with 'flat'", - shader_var_type); + && interpolation != INTERP_MODE_FLAT + && state->stage == MESA_SHADER_FRAGMENT + && mode == ir_var_shader_in) { + _mesa_glsl_error(loc, state, "if a fragment input is (or contains) " + "an integer, then it must be qualified with 'flat'"); } /* Double fragment inputs must be qualified with 'flat'. @@ -2969,7 +3036,7 @@ */ if (state->has_double() && var_type->contains_double() - && interpolation != INTERP_QUALIFIER_FLAT + && interpolation != INTERP_MODE_FLAT && state->stage == MESA_SHADER_FRAGMENT && mode == ir_var_shader_in) { _mesa_glsl_error(loc, state, "if a fragment input is (or contains) " @@ -2977,20 +3044,20 @@ } } -static glsl_interp_qualifier +static glsl_interp_mode interpret_interpolation_qualifier(const struct ast_type_qualifier *qual, const struct glsl_type *var_type, ir_variable_mode mode, struct _mesa_glsl_parse_state *state, YYLTYPE *loc) { - glsl_interp_qualifier interpolation; + glsl_interp_mode interpolation; if (qual->flags.q.flat) - interpolation = INTERP_QUALIFIER_FLAT; + interpolation = INTERP_MODE_FLAT; else if (qual->flags.q.noperspective) - interpolation = INTERP_QUALIFIER_NOPERSPECTIVE; + interpolation = INTERP_MODE_NOPERSPECTIVE; else if (qual->flags.q.smooth) - interpolation = INTERP_QUALIFIER_SMOOTH; + interpolation = INTERP_MODE_SMOOTH; else if (state->es_shader && ((mode == ir_var_shader_in && state->stage != MESA_SHADER_VERTEX) || @@ -3001,9 +3068,9 @@ * "When no interpolation qualifier is present, smooth interpolation * is used." */ - interpolation = INTERP_QUALIFIER_SMOOTH; + interpolation = INTERP_MODE_SMOOTH; else - interpolation = INTERP_QUALIFIER_NONE; + interpolation = INTERP_MODE_NONE; validate_interpolation_qualifier(state, loc, interpolation, @@ -3369,9 +3436,9 @@ ? "origin_upper_left" : "pixel_center_integer"; _mesa_glsl_error(loc, state, - "layout qualifier `%s' can only be applied to " - "fragment shader input `gl_FragCoord'", - qual_string); + "layout qualifier `%s' can only be applied to " + "fragment shader input `gl_FragCoord'", + qual_string); } if (qual->flags.q.explicit_location) { @@ -3393,7 +3460,7 @@ (qual_component + components - 1) > 3) { _mesa_glsl_error(loc, state, "component overflow (%u > 3)", (qual_component + components - 1)); - } else if (qual_component == 1 && type->is_double()) { + } else if (qual_component == 1 && type->is_64bit()) { /* We don't bother checking for 3 as it should be caught by the * overflow check above. */ @@ -3587,6 +3654,16 @@ _mesa_glsl_error(loc, state, "early_fragment_tests layout qualifier only " "valid in fragment shader input layout declaration."); } + + if (qual->flags.q.inner_coverage) { + _mesa_glsl_error(loc, state, "inner_coverage layout qualifier only " + "valid in fragment shader input layout declaration."); + } + + if (qual->flags.q.post_depth_coverage) { + _mesa_glsl_error(loc, state, "post_depth_coverage layout qualifier only " + "valid in fragment shader input layout declaration."); + } } static void @@ -3681,11 +3758,11 @@ */ assert(var->data.mode != ir_var_temporary); if (qual->flags.q.in && qual->flags.q.out) - var->data.mode = ir_var_function_inout; + var->data.mode = is_parameter ? ir_var_function_inout : ir_var_shader_out; else if (qual->flags.q.in) var->data.mode = is_parameter ? ir_var_function_in : ir_var_shader_in; else if (qual->flags.q.attribute - || (qual->flags.q.varying && (state->stage == MESA_SHADER_FRAGMENT))) + || (qual->flags.q.varying && (state->stage == MESA_SHADER_FRAGMENT))) var->data.mode = ir_var_shader_in; else if (qual->flags.q.out) var->data.mode = is_parameter ? ir_var_function_out : ir_var_shader_out; @@ -3698,6 +3775,9 @@ else if (qual->flags.q.shared_storage) var->data.mode = ir_var_shader_shared; + var->data.fb_fetch_output = state->stage == MESA_SHADER_FRAGMENT && + qual->flags.q.in && qual->flags.q.out; + if (!is_parameter && is_varying_var(var, state->stage)) { /* User-defined ins/outs are not permitted in compute shaders. */ if (state->stage == MESA_SHADER_COMPUTE) { @@ -3944,6 +4024,18 @@ earlier->data.depth_layout = var->data.depth_layout; + } else if (state->has_framebuffer_fetch() && + strcmp(var->name, "gl_LastFragData") == 0 && + var->type == earlier->type && + var->data.mode == ir_var_auto) { + /* According to the EXT_shader_framebuffer_fetch spec: + * + * "By default, gl_LastFragData is declared with the mediump precision + * qualifier. This can be changed by redeclaring the corresponding + * variables with the desired precision qualifier." + */ + earlier->data.precision = var->data.precision; + } else if (allow_all_redeclarations) { if (earlier->data.mode != var->data.mode) { _mesa_glsl_error(&loc, state, @@ -3966,9 +4058,9 @@ */ ir_rvalue * process_initializer(ir_variable *var, ast_declaration *decl, - ast_fully_specified_type *type, - exec_list *initializer_instructions, - struct _mesa_glsl_parse_state *state) + ast_fully_specified_type *type, + exec_list *initializer_instructions, + struct _mesa_glsl_parse_state *state) { ir_rvalue *result = NULL; @@ -4273,6 +4365,8 @@ if (var->data.patch) return; + var->data.tess_varying_implicit_sized_array = var->type->is_unsized_array(); + validate_layout_qualifier_vertex_count(state, loc, var, num_vertices, &state->tcs_output_size, "tessellation control shader output"); @@ -4297,10 +4391,24 @@ if (var->data.patch) return; - /* Unsized arrays are implicitly sized to gl_MaxPatchVertices. */ + /* The ARB_tessellation_shader spec says: + * + * "Declaring an array size is optional. If no size is specified, it + * will be taken from the implementation-dependent maximum patch size + * (gl_MaxPatchVertices). If a size is specified, it must match the + * maximum patch size; otherwise, a compile or link error will occur." + * + * This text appears twice, once for TCS inputs, and again for TES inputs. + */ if (var->type->is_unsized_array()) { var->type = glsl_type::get_array_instance(var->type->fields.array, state->Const.MaxPatchVertices); + var->data.tess_varying_implicit_sized_array = true; + } else if (var->type->length != state->Const.MaxPatchVertices) { + _mesa_glsl_error(&loc, state, + "per-vertex tessellation shader input arrays must be " + "sized to gl_MaxPatchVertices (%d).", + state->Const.MaxPatchVertices); } } @@ -4409,7 +4517,7 @@ _mesa_glsl_error(& loc, state, "undeclared variable `%s' cannot be marked " "invariant", decl->identifier); - } else if (!is_varying_var(earlier, state->stage)) { + } else if (!is_allowed_invariant(earlier, state)) { _mesa_glsl_error(&loc, state, "`%s' cannot be marked invariant; interfaces between " "shader stages only.", decl->identifier); @@ -4512,10 +4620,9 @@ allowed_atomic_qual_mask.flags.q.explicit_offset = 1; allowed_atomic_qual_mask.flags.q.uniform = 1; - type->qualifier.validate_flags(&loc, state, - "invalid layout qualifier for " - "atomic_uint", - allowed_atomic_qual_mask); + type->qualifier.validate_flags(&loc, state, allowed_atomic_qual_mask, + "invalid layout qualifier for", + "atomic_uint"); } if (this->declarations.is_empty()) { @@ -4541,7 +4648,7 @@ * confusing error. */ assert(this->type->specifier->structure == NULL || decl_type != NULL - || state->error); + || state->error); if (decl_type == NULL) { _mesa_glsl_error(&loc, state, @@ -4693,7 +4800,7 @@ } apply_type_qualifier_to_variable(& this->type->qualifier, var, state, - & loc, false); + & loc, false); apply_layout_qualifier_to_variable(&this->type->qualifier, var, state, &loc); @@ -4706,7 +4813,7 @@ } if (this->type->qualifier.flags.q.invariant) { - if (!is_varying_var(var, state->stage)) { + if (!is_allowed_invariant(var, state)) { _mesa_glsl_error(&loc, state, "`%s' cannot be marked invariant; interfaces between " "shader stages only", var->name); @@ -4932,6 +5039,24 @@ * * A matrix * * A structure * * An array of array + * + * ES 3.20 updates this to apply to tessellation and geometry shaders + * as well. Because there are per-vertex arrays in the new stages, + * it strikes the "array of..." rules and replaces them with these: + * + * * For per-vertex-arrayed variables (applies to tessellation + * control, tessellation evaluation and geometry shaders): + * + * * Per-vertex-arrayed arrays of arrays + * * Per-vertex-arrayed arrays of structures + * + * * For non-per-vertex-arrayed variables: + * + * * An array of arrays + * * An array of structures + * + * which basically says to unwrap the per-vertex aspect and apply + * the old rules. */ if (state->es_shader) { if (var->type->is_array() && @@ -4941,21 +5066,29 @@ "cannot have an array of arrays", _mesa_shader_stage_to_string(state->stage)); } - if (state->stage == MESA_SHADER_VERTEX) { - if (var->type->is_array() && - var->type->fields.array->is_record()) { + if (state->stage <= MESA_SHADER_GEOMETRY) { + const glsl_type *type = var->type; + + if (state->stage == MESA_SHADER_TESS_CTRL && + !var->data.patch && var->type->is_array()) { + type = var->type->fields.array; + } + + if (type->is_array() && type->fields.array->is_record()) { _mesa_glsl_error(&loc, state, - "vertex shader output " - "cannot have an array of structs"); + "%s shader output cannot have " + "an array of structs", + _mesa_shader_stage_to_string(state->stage)); } - if (var->type->is_record()) { - for (unsigned i = 0; i < var->type->length; i++) { - if (var->type->fields.structure[i].type->is_array() || - var->type->fields.structure[i].type->is_record()) + if (type->is_record()) { + for (unsigned i = 0; i < type->length; i++) { + if (type->fields.structure[i].type->is_array() || + type->fields.structure[i].type->is_record()) _mesa_glsl_error(&loc, state, - "vertex shader output cannot have a " + "%s shader output cannot have a " "struct that contains an " - "array or struct"); + "array or struct", + _mesa_shader_stage_to_string(state->stage)); } } } @@ -5068,7 +5201,35 @@ const glsl_type *const t = (earlier == NULL) ? var->type : earlier->type; - if (t->is_unsized_array()) + /* Skip the unsized array check for TCS/TES/GS inputs & TCS outputs. + * + * The GL_OES_tessellation_shader spec says about inputs: + * + * "Declaring an array size is optional. If no size is specified, + * it will be taken from the implementation-dependent maximum + * patch size (gl_MaxPatchVertices)." + * + * and about TCS outputs: + * + * "If no size is specified, it will be taken from output patch + * size declared in the shader." + * + * The GL_OES_geometry_shader spec says: + * + * "All geometry shader input unsized array declarations will be + * sized by an earlier input primitive layout qualifier, when + * present, as per the following table." + */ + const enum ir_variable_mode mode = (const enum ir_variable_mode) + (earlier == NULL ? var->data.mode : earlier->data.mode); + const bool implicitly_sized = + (mode == ir_var_shader_in && + state->stage >= MESA_SHADER_TESS_CTRL && + state->stage <= MESA_SHADER_GEOMETRY) || + (mode == ir_var_shader_out && + state->stage == MESA_SHADER_TESS_CTRL); + + if (t->is_unsized_array() && !implicitly_sized) /* Section 10.17 of the GLSL ES 1.00 specification states that * unsized array declarations have been removed from the language. * Arrays that are sized using an initializer are still explicitly @@ -5333,8 +5494,8 @@ state->is_version(120, 100)) { YYLTYPE loc = this->get_location(); _mesa_glsl_error(&loc, state, - "declaration of function `%s' not allowed within " - "function body", name); + "declaration of function `%s' not allowed within " + "function body", name); } validate_identifier(name, this->get_location(), state); @@ -5862,6 +6023,26 @@ } +/* Used for detection of duplicate case values, compare + * given contents directly. + */ +static bool +compare_case_value(const void *a, const void *b) +{ + return *(unsigned *) a == *(unsigned *) b; +} + + +/* Used for detection of duplicate case values, just + * returns key contents as is. + */ +static unsigned +key_contents(const void *key) +{ + return *(unsigned *) key; +} + + ir_rvalue * ast_switch_statement::hir(exec_list *instructions, struct _mesa_glsl_parse_state *state) @@ -5892,8 +6073,9 @@ state->switch_state.is_switch_innermost = true; state->switch_state.switch_nesting_ast = this; - state->switch_state.labels_ht = hash_table_ctor(0, hash_table_pointer_hash, - hash_table_pointer_compare); + state->switch_state.labels_ht = + _mesa_hash_table_create(NULL, key_contents, + compare_case_value); state->switch_state.previous_default = NULL; /* Initalize is_fallthru state to false. @@ -5967,7 +6149,7 @@ instructions->push_tail(irif); } - hash_table_dtor(state->switch_state.labels_ht); + _mesa_hash_table_destroy(state->switch_state.labels_ht, NULL); state->switch_state = saved; @@ -5988,9 +6170,7 @@ */ test_expression->set_is_lhs(true); /* Cache value of test expression. */ - ir_rvalue *const test_val = - test_expression->hir(instructions, - state); + ir_rvalue *const test_val = test_expression->hir(instructions, state); state->switch_state.test_var = new(ctx) ir_variable(test_val->type, "switch_test_tmp", @@ -6149,20 +6329,21 @@ /* Stuff a dummy value in to allow processing to continue. */ label_const = new(ctx) ir_constant(0); } else { - ast_expression *previous_label = (ast_expression *) - hash_table_find(state->switch_state.labels_ht, - (void *)(uintptr_t)label_const->value.u[0]); + hash_entry *entry = + _mesa_hash_table_search(state->switch_state.labels_ht, + (void *)(uintptr_t)&label_const->value.u[0]); - if (previous_label) { + if (entry) { + ast_expression *previous_label = (ast_expression *) entry->data; YYLTYPE loc = this->test_value->get_location(); _mesa_glsl_error(& loc, state, "duplicate case value"); loc = previous_label->get_location(); _mesa_glsl_error(& loc, state, "this is the previous case label"); } else { - hash_table_insert(state->switch_state.labels_ht, - this->test_value, - (void *)(uintptr_t)label_const->value.u[0]); + _mesa_hash_table_insert(state->switch_state.labels_ht, + (void *)(uintptr_t)&label_const->value.u[0], + this->test_value); } } @@ -6521,8 +6702,8 @@ * the types to HIR. This ensures that structure definitions embedded in * other structure definitions or in interface blocks are processed. */ - glsl_struct_field *const fields = ralloc_array(state, glsl_struct_field, - decl_count); + glsl_struct_field *const fields = rzalloc_array(state, glsl_struct_field, + decl_count); bool first_member = true; bool first_member_has_explicit_location = false; @@ -6740,7 +6921,8 @@ unsigned qual_location; if (process_qualifier_constant(state, &loc, "location", qual->location, &qual_location)) { - fields[i].location = VARYING_SLOT_VAR0 + qual_location; + fields[i].location = qual_location + + (fields[i].patch ? VARYING_SLOT_PATCH0 : VARYING_SLOT_VAR0); expl_location = fields[i].location + fields[i].type->count_attribute_slots(false); } @@ -6846,7 +7028,7 @@ } } else { if (layout && layout->flags.q.explicit_xfb_offset) { - unsigned align = field_type->is_double() ? 8 : 4; + unsigned align = field_type->is_64bit() ? 8 : 4; fields[i].offset = glsl_align(block_xfb_offset, align); block_xfb_offset += MAX2(xfb_stride, (int) (4 * field_type->component_slots())); @@ -7050,13 +7232,81 @@ this->block_name); } - if (!this->layout.flags.q.buffer && - this->layout.flags.q.std430) { - _mesa_glsl_error(&loc, state, - "std430 storage block layout qualifier is supported " - "only for shader storage blocks"); + /* Validate qualifiers: + * + * - Layout Qualifiers as per the table in Section 4.4 + * ("Layout Qualifiers") of the GLSL 4.50 spec. + * + * - Memory Qualifiers as per Section 4.10 ("Memory Qualifiers") of the + * GLSL 4.50 spec: + * + * "Additionally, memory qualifiers may also be used in the declaration + * of shader storage blocks" + * + * Note the table in Section 4.4 says std430 is allowed on both uniform and + * buffer blocks however Section 4.4.5 (Uniform and Shader Storage Block + * Layout Qualifiers) of the GLSL 4.50 spec says: + * + * "The std430 qualifier is supported only for shader storage blocks; + * using std430 on a uniform block will result in a compile-time error." + */ + ast_type_qualifier allowed_blk_qualifiers; + allowed_blk_qualifiers.flags.i = 0; + if (this->layout.flags.q.buffer || this->layout.flags.q.uniform) { + allowed_blk_qualifiers.flags.q.shared = 1; + allowed_blk_qualifiers.flags.q.packed = 1; + allowed_blk_qualifiers.flags.q.std140 = 1; + allowed_blk_qualifiers.flags.q.row_major = 1; + allowed_blk_qualifiers.flags.q.column_major = 1; + allowed_blk_qualifiers.flags.q.explicit_align = 1; + allowed_blk_qualifiers.flags.q.explicit_binding = 1; + if (this->layout.flags.q.buffer) { + allowed_blk_qualifiers.flags.q.buffer = 1; + allowed_blk_qualifiers.flags.q.std430 = 1; + allowed_blk_qualifiers.flags.q.coherent = 1; + allowed_blk_qualifiers.flags.q._volatile = 1; + allowed_blk_qualifiers.flags.q.restrict_flag = 1; + allowed_blk_qualifiers.flags.q.read_only = 1; + allowed_blk_qualifiers.flags.q.write_only = 1; + } else { + allowed_blk_qualifiers.flags.q.uniform = 1; + } + } else { + /* Interface block */ + assert(this->layout.flags.q.in || this->layout.flags.q.out); + + allowed_blk_qualifiers.flags.q.explicit_location = 1; + if (this->layout.flags.q.out) { + allowed_blk_qualifiers.flags.q.out = 1; + if (state->stage == MESA_SHADER_GEOMETRY || + state->stage == MESA_SHADER_TESS_CTRL || + state->stage == MESA_SHADER_TESS_EVAL || + state->stage == MESA_SHADER_VERTEX ) { + allowed_blk_qualifiers.flags.q.explicit_xfb_offset = 1; + allowed_blk_qualifiers.flags.q.explicit_xfb_buffer = 1; + allowed_blk_qualifiers.flags.q.xfb_buffer = 1; + allowed_blk_qualifiers.flags.q.explicit_xfb_stride = 1; + allowed_blk_qualifiers.flags.q.xfb_stride = 1; + if (state->stage == MESA_SHADER_GEOMETRY) { + allowed_blk_qualifiers.flags.q.stream = 1; + allowed_blk_qualifiers.flags.q.explicit_stream = 1; + } + if (state->stage == MESA_SHADER_TESS_CTRL) { + allowed_blk_qualifiers.flags.q.patch = 1; + } + } + } else { + allowed_blk_qualifiers.flags.q.in = 1; + if (state->stage == MESA_SHADER_TESS_EVAL) { + allowed_blk_qualifiers.flags.q.patch = 1; + } + } } + this->layout.validate_flags(&loc, state, allowed_blk_qualifiers, + "invalid qualifier for block", + this->block_name); + /* The ast_interface_block has a list of ast_declarator_lists. We * need to turn those into ir_variables with an association * with this uniform block. @@ -7112,12 +7362,6 @@ "Interface block sets both readonly and writeonly"); } - if (this->layout.flags.q.explicit_component) { - _mesa_glsl_error(&loc, state, "component layout qualifier cannot be " - "applied to a matrix, a structure, a block, or an " - "array containing any of these."); - } - unsigned qual_stream; if (!process_qualifier_constant(state, &loc, "stream", this->layout.stream, &qual_stream) || @@ -7158,7 +7402,8 @@ layout.location, &expl_location)) { return NULL; } else { - expl_location = VARYING_SLOT_VAR0 + expl_location; + expl_location += this->layout.flags.q.patch ? VARYING_SLOT_PATCH0 + : VARYING_SLOT_VAR0; } } @@ -7337,6 +7582,8 @@ glsl_type::get_interface_instance(fields, num_variables, packing, + matrix_layout == + GLSL_MATRIX_LAYOUT_ROW_MAJOR, this->block_name); unsigned component_size = block_type->contains_double() ? 8 : 4; @@ -7370,10 +7617,12 @@ _mesa_glsl_error(&loc, state, "geometry shader inputs must be arrays"); } else if ((state->stage == MESA_SHADER_TESS_CTRL || state->stage == MESA_SHADER_TESS_EVAL) && + !this->layout.flags.q.patch && this->array_specifier == NULL && var_mode == ir_var_shader_in) { _mesa_glsl_error(&loc, state, "per-vertex tessellation shader inputs must be arrays"); } else if (state->stage == MESA_SHADER_TESS_CTRL && + !this->layout.flags.q.patch && this->array_specifier == NULL && var_mode == ir_var_shader_out) { _mesa_glsl_error(&loc, state, "tessellation control shader outputs must be arrays"); @@ -7489,6 +7738,8 @@ if (var_mode == ir_var_shader_in || var_mode == ir_var_uniform) var->data.read_only = true; + var->data.patch = this->layout.flags.q.patch; + if (state->stage == MESA_SHADER_GEOMETRY && var_mode == ir_var_shader_in) handle_geometry_shader_input_decl(state, loc, var); else if ((state->stage == MESA_SHADER_TESS_CTRL || @@ -7612,10 +7863,9 @@ } if (var->type->is_unsized_array()) { - if (var->is_in_shader_storage_block()) { - if (is_unsized_array_last_element(var)) { - var->data.from_ssbo_unsized_array = true; - } + if (var->is_in_shader_storage_block() && + is_unsized_array_last_element(var)) { + var->data.from_ssbo_unsized_array = true; } else { /* From GLSL ES 3.10 spec, section 4.1.9 "Arrays": * @@ -7623,6 +7873,10 @@ * block and the size is not specified at compile-time, it is * sized at run-time. In all other cases, arrays are sized only * at compile-time." + * + * In desktop GLSL it is allowed to have unsized-arrays that are + * not last, as long as we can determine that they are implicitly + * sized. */ if (state->es_shader) { _mesa_glsl_error(&loc, state, "unsized array `%s' " @@ -7683,7 +7937,7 @@ ir_rvalue * ast_tcs_output_layout::hir(exec_list *instructions, - struct _mesa_glsl_parse_state *state) + struct _mesa_glsl_parse_state *state) { YYLTYPE loc = this->get_location(); @@ -7701,10 +7955,10 @@ */ if (state->tcs_output_size != 0 && state->tcs_output_size != num_vertices) { _mesa_glsl_error(&loc, state, - "this tessellation control shader output layout " - "specifies %u vertices, but a previous output " - "is declared with size %u", - num_vertices, state->tcs_output_size); + "this tessellation control shader output layout " + "specifies %u vertices, but a previous output " + "is declared with size %u", + num_vertices, state->tcs_output_size); return NULL; } @@ -7716,21 +7970,21 @@ foreach_in_list (ir_instruction, node, instructions) { ir_variable *var = node->as_variable(); if (var == NULL || var->data.mode != ir_var_shader_out) - continue; + continue; /* Note: Not all tessellation control shader output are arrays. */ if (!var->type->is_unsized_array() || var->data.patch) continue; if (var->data.max_array_access >= (int)num_vertices) { - _mesa_glsl_error(&loc, state, - "this tessellation control shader output layout " - "specifies %u vertices, but an access to element " - "%u of output `%s' already exists", num_vertices, - var->data.max_array_access, var->name); + _mesa_glsl_error(&loc, state, + "this tessellation control shader output layout " + "specifies %u vertices, but an access to element " + "%u of output `%s' already exists", num_vertices, + var->data.max_array_access, var->name); } else { - var->type = glsl_type::get_array_instance(var->type->fields.array, - num_vertices); + var->type = glsl_type::get_array_instance(var->type->fields.array, + num_vertices); } } @@ -7744,16 +7998,9 @@ { YYLTYPE loc = this->get_location(); - /* If any geometry input layout declaration preceded this one, make sure it - * was consistent with this one. - */ - if (state->gs_input_prim_type_specified && - state->in_qualifier->prim_type != this->prim_type) { - _mesa_glsl_error(&loc, state, - "geometry shader input layout does not match" - " previous declaration"); - return NULL; - } + /* Should have been prevented by the parser. */ + assert(!state->gs_input_prim_type_specified + || state->in_qualifier->prim_type == this->prim_type); /* If any shader inputs occurred before this declaration and specified an * array size, make sure the size they specified is consistent with the @@ -7866,6 +8113,20 @@ } } + /* The ARB_compute_variable_group_size spec says: + * + * If a compute shader including a *local_size_variable* qualifier also + * declares a fixed local group size using the *local_size_x*, + * *local_size_y*, or *local_size_z* qualifiers, a compile-time error + * results + */ + if (state->cs_input_local_size_variable_specified) { + _mesa_glsl_error(&loc, state, + "compute shader can't include both a variable and a " + "fixed local group size"); + return NULL; + } + state->cs_input_local_size_specified = true; for (int i = 0; i < 3; i++) state->cs_input_local_size[i] = qual_local_size[i]; @@ -7918,9 +8179,9 @@ gl_FragColor_assigned = true; else if (strcmp(var->name, "gl_FragData") == 0) gl_FragData_assigned = true; - else if (strcmp(var->name, "gl_SecondaryFragColorEXT") == 0) + else if (strcmp(var->name, "gl_SecondaryFragColorEXT") == 0) gl_FragSecondaryColor_assigned = true; - else if (strcmp(var->name, "gl_SecondaryFragDataEXT") == 0) + else if (strcmp(var->name, "gl_SecondaryFragDataEXT") == 0) gl_FragSecondaryData_assigned = true; else if (!is_gl_identifier(var->name)) { if (state->stage == MESA_SHADER_FRAGMENT && diff -Nru mesa-12.0.6/src/compiler/glsl/ast_type.cpp mesa-17.0.7/src/compiler/glsl/ast_type.cpp --- mesa-12.0.6/src/compiler/glsl/ast_type.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ast_type.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -107,17 +107,97 @@ || this->flags.q.patch; } +bool ast_type_qualifier::has_memory() const +{ + return this->flags.q.coherent + || this->flags.q._volatile + || this->flags.q.restrict_flag + || this->flags.q.read_only + || this->flags.q.write_only; +} + +static bool +validate_prim_type(YYLTYPE *loc, + _mesa_glsl_parse_state *state, + const ast_type_qualifier &qualifier, + const ast_type_qualifier &new_qualifier) +{ + /* Input layout qualifiers can be specified multiple + * times in separate declarations, as long as they match. + */ + if (qualifier.flags.q.prim_type && new_qualifier.flags.q.prim_type + && qualifier.prim_type != new_qualifier.prim_type) { + _mesa_glsl_error(loc, state, + "conflicting input primitive %s specified", + state->stage == MESA_SHADER_GEOMETRY ? + "type" : "mode"); + return false; + } + + return true; +} + +static bool +validate_vertex_spacing(YYLTYPE *loc, + _mesa_glsl_parse_state *state, + const ast_type_qualifier &qualifier, + const ast_type_qualifier &new_qualifier) +{ + if (qualifier.flags.q.vertex_spacing && new_qualifier.flags.q.vertex_spacing + && qualifier.vertex_spacing != new_qualifier.vertex_spacing) { + _mesa_glsl_error(loc, state, + "conflicting vertex spacing specified"); + return false; + } + + return true; +} + +static bool +validate_ordering(YYLTYPE *loc, + _mesa_glsl_parse_state *state, + const ast_type_qualifier &qualifier, + const ast_type_qualifier &new_qualifier) +{ + if (qualifier.flags.q.ordering && new_qualifier.flags.q.ordering + && qualifier.ordering != new_qualifier.ordering) { + _mesa_glsl_error(loc, state, + "conflicting ordering specified"); + return false; + } + + return true; +} + +static bool +validate_point_mode(MAYBE_UNUSED const ast_type_qualifier &qualifier, + MAYBE_UNUSED const ast_type_qualifier &new_qualifier) +{ + /* Point mode can only be true if the flag is set. */ + assert (!qualifier.flags.q.point_mode || !new_qualifier.flags.q.point_mode + || (qualifier.point_mode && new_qualifier.point_mode)); + + return true; +} + /** - * This function merges both duplicate identifies within a single layout and - * multiple layout qualifiers on a single variable declaration. The - * is_single_layout_merge param is used differentiate between the two. + * This function merges duplicate layout identifiers. + * + * It deals with duplicates within a single layout qualifier, among multiple + * layout qualifiers on a single declaration and on several declarations for + * the same variable. + * + * The is_single_layout_merge and is_multiple_layouts_merge parameters are + * used to differentiate among them. */ bool ast_type_qualifier::merge_qualifier(YYLTYPE *loc, - _mesa_glsl_parse_state *state, + _mesa_glsl_parse_state *state, const ast_type_qualifier &q, - bool is_single_layout_merge) + bool is_single_layout_merge, + bool is_multiple_layouts_merge) { + bool r = true; ast_type_qualifier ubo_mat_mask; ubo_mat_mask.flags.i = 0; ubo_mat_mask.flags.q.row_major = 1; @@ -178,47 +258,51 @@ if (state->stage == MESA_SHADER_GEOMETRY) { allowed_duplicates_mask.flags.i |= stream_layout_mask.flags.i; - input_layout_mask.flags.i |= - stream_layout_mask.flags.i; } if (is_single_layout_merge && !state->has_enhanced_layouts() && (this->flags.i & q.flags.i & ~allowed_duplicates_mask.flags.i) != 0) { + _mesa_glsl_error(loc, state, "duplicate layout qualifiers used"); + return false; + } + + if (is_multiple_layouts_merge && !state->has_420pack_or_es31()) { _mesa_glsl_error(loc, state, - "duplicate layout qualifiers used"); + "duplicate layout(...) qualifiers"); return false; } if (q.flags.q.prim_type) { - if (this->flags.q.prim_type && this->prim_type != q.prim_type) { - _mesa_glsl_error(loc, state, - "conflicting primitive type qualifiers used"); - return false; - } + r &= validate_prim_type(loc, state, *this, q); + this->flags.q.prim_type = 1; this->prim_type = q.prim_type; } if (q.flags.q.max_vertices) { - if (this->max_vertices) { + if (this->flags.q.max_vertices + && !is_single_layout_merge && !is_multiple_layouts_merge) { this->max_vertices->merge_qualifier(q.max_vertices); } else { + this->flags.q.max_vertices = 1; this->max_vertices = q.max_vertices; } } if (q.flags.q.subroutine_def) { if (this->flags.q.subroutine_def) { - _mesa_glsl_error(loc, state, - "conflicting subroutine qualifiers used"); + _mesa_glsl_error(loc, state, + "conflicting subroutine qualifiers used"); } else { this->subroutine_list = q.subroutine_list; } } if (q.flags.q.invocations) { - if (this->invocations) { + if (this->flags.q.invocations + && !is_single_layout_merge && !is_multiple_layouts_merge) { this->invocations->merge_qualifier(q.invocations); } else { + this->flags.q.invocations = 1; this->invocations = q.invocations; } } @@ -229,7 +313,8 @@ if (q.flags.q.stream) { this->flags.q.stream = 1; this->stream = q.stream; - } else if (!this->flags.q.stream && this->flags.q.out) { + } else if (!this->flags.q.stream && this->flags.q.out && + !this->flags.q.in) { /* Assign default global stream value */ this->flags.q.stream = 1; this->stream = state->out_qualifier->stream; @@ -242,73 +327,52 @@ if (q.flags.q.xfb_buffer) { this->flags.q.xfb_buffer = 1; this->xfb_buffer = q.xfb_buffer; - } else if (!this->flags.q.xfb_buffer && this->flags.q.out) { + } else if (!this->flags.q.xfb_buffer && this->flags.q.out && + !this->flags.q.in) { /* Assign global xfb_buffer value */ this->flags.q.xfb_buffer = 1; this->xfb_buffer = state->out_qualifier->xfb_buffer; } } - if (q.flags.q.explicit_xfb_stride) + if (q.flags.q.explicit_xfb_stride) { + this->flags.q.xfb_stride = 1; + this->flags.q.explicit_xfb_stride = 1; this->xfb_stride = q.xfb_stride; - - /* Merge all we xfb_stride qualifiers into the global out */ - if (q.flags.q.explicit_xfb_stride || this->flags.q.xfb_stride) { - - /* Set xfb_stride flag to 0 to avoid adding duplicates every time - * there is a merge. - */ - this->flags.q.xfb_stride = 0; - - unsigned buff_idx; - if (process_qualifier_constant(state, loc, "xfb_buffer", - this->xfb_buffer, &buff_idx)) { - if (state->out_qualifier->out_xfb_stride[buff_idx]) { - state->out_qualifier->out_xfb_stride[buff_idx]->merge_qualifier( - new(state) ast_layout_expression(*loc, this->xfb_stride)); - } else { - state->out_qualifier->out_xfb_stride[buff_idx] = - new(state) ast_layout_expression(*loc, this->xfb_stride); - } - } } } if (q.flags.q.vertices) { - if (this->vertices) { + if (this->flags.q.vertices + && !is_single_layout_merge && !is_multiple_layouts_merge) { this->vertices->merge_qualifier(q.vertices); } else { + this->flags.q.vertices = 1; this->vertices = q.vertices; } } if (q.flags.q.vertex_spacing) { - if (this->flags.q.vertex_spacing && this->vertex_spacing != q.vertex_spacing) { - _mesa_glsl_error(loc, state, - "conflicting vertex spacing used"); - return false; - } + r &= validate_vertex_spacing(loc, state, *this, q); + this->flags.q.vertex_spacing = 1; this->vertex_spacing = q.vertex_spacing; } if (q.flags.q.ordering) { - if (this->flags.q.ordering && this->ordering != q.ordering) { - _mesa_glsl_error(loc, state, - "conflicting ordering used"); - return false; - } + r &= validate_ordering(loc, state, *this, q); + this->flags.q.ordering = 1; this->ordering = q.ordering; } if (q.flags.q.point_mode) { - if (this->flags.q.point_mode && this->point_mode != q.point_mode) { - _mesa_glsl_error(loc, state, - "conflicting point mode used"); - return false; - } + r &= validate_point_mode(*this, q); + this->flags.q.point_mode = 1; this->point_mode = q.point_mode; } + if (q.flags.q.early_fragment_tests) + this->flags.q.early_fragment_tests = true; + if ((q.flags.i & ubo_mat_mask.flags.i) != 0) this->flags.i &= ~ubo_mat_mask.flags.i; if ((q.flags.i & ubo_layout_mask.flags.i) != 0) @@ -316,7 +380,8 @@ for (int i = 0; i < 3; i++) { if (q.flags.q.local_size & (1 << i)) { - if (this->local_size[i]) { + if (this->local_size[i] + && !is_single_layout_merge && !is_multiple_layouts_merge) { this->local_size[i]->merge_qualifier(q.local_size[i]); } else { this->local_size[i] = q.local_size[i]; @@ -324,12 +389,14 @@ } } + if (q.flags.q.local_size_variable) + this->flags.q.local_size_variable = true; + this->flags.i |= q.flags.i; if (this->flags.q.in && (this->flags.i & ~input_layout_mask.flags.i) != 0) { - _mesa_glsl_error(loc, state, - "invalid input layout qualifier used"); + _mesa_glsl_error(loc, state, "invalid input layout qualifier used"); return false; } @@ -359,38 +426,34 @@ this->image_base_type = q.image_base_type; } - return true; + return r; } bool -ast_type_qualifier::merge_out_qualifier(YYLTYPE *loc, - _mesa_glsl_parse_state *state, - const ast_type_qualifier &q, - ast_node* &node, bool create_node) +ast_type_qualifier::validate_out_qualifier(YYLTYPE *loc, + _mesa_glsl_parse_state *state) { - void *mem_ctx = state; - const bool r = this->merge_qualifier(loc, state, q, false); + bool r = true; ast_type_qualifier valid_out_mask; valid_out_mask.flags.i = 0; - if (state->stage == MESA_SHADER_GEOMETRY) { - if (q.flags.q.prim_type) { + switch (state->stage) { + case MESA_SHADER_GEOMETRY: + if (this->flags.q.prim_type) { /* Make sure this is a valid output primitive type. */ - switch (q.prim_type) { + switch (this->prim_type) { case GL_POINTS: case GL_LINE_STRIP: case GL_TRIANGLE_STRIP: break; default: + r = false; _mesa_glsl_error(loc, state, "invalid geometry shader output " "primitive type"); break; } } - /* Allow future assigments of global out's stream id value */ - this->flags.q.explicit_stream = 0; - valid_out_mask.flags.q.stream = 1; valid_out_mask.flags.q.explicit_stream = 1; valid_out_mask.flags.q.explicit_xfb_buffer = 1; @@ -399,63 +462,86 @@ valid_out_mask.flags.q.xfb_stride = 1; valid_out_mask.flags.q.max_vertices = 1; valid_out_mask.flags.q.prim_type = 1; - } else if (state->stage == MESA_SHADER_TESS_CTRL) { - if (create_node) { - node = new(mem_ctx) ast_tcs_output_layout(*loc); - } + break; + case MESA_SHADER_TESS_CTRL: valid_out_mask.flags.q.vertices = 1; valid_out_mask.flags.q.explicit_xfb_buffer = 1; valid_out_mask.flags.q.xfb_buffer = 1; valid_out_mask.flags.q.explicit_xfb_stride = 1; valid_out_mask.flags.q.xfb_stride = 1; - } else if (state->stage == MESA_SHADER_TESS_EVAL || - state->stage == MESA_SHADER_VERTEX) { + break; + case MESA_SHADER_TESS_EVAL: + case MESA_SHADER_VERTEX: valid_out_mask.flags.q.explicit_xfb_buffer = 1; valid_out_mask.flags.q.xfb_buffer = 1; valid_out_mask.flags.q.explicit_xfb_stride = 1; valid_out_mask.flags.q.xfb_stride = 1; - } else { - _mesa_glsl_error(loc, state, "out layout qualifiers only valid in " - "geometry, tessellation and vertex shaders"); - return false; + break; + case MESA_SHADER_FRAGMENT: + valid_out_mask.flags.q.blend_support = 1; + break; + default: + r = false; + _mesa_glsl_error(loc, state, + "out layout qualifiers only valid in " + "geometry, tessellation, vertex and fragment shaders"); } - /* Allow future assigments of global out's */ - this->flags.q.explicit_xfb_buffer = 0; - this->flags.q.explicit_xfb_stride = 0; + /* Generate an error when invalid output layout qualifiers are used. */ + if ((this->flags.i & ~valid_out_mask.flags.i) != 0) { + r = false; + _mesa_glsl_error(loc, state, "invalid output layout qualifiers used"); + } - /* Generate an error when invalid input layout qualifiers are used. */ - if ((q.flags.i & ~valid_out_mask.flags.i) != 0) { - _mesa_glsl_error(loc, state, - "invalid output layout qualifiers used"); - return false; + return r; +} + +bool +ast_type_qualifier::merge_into_out_qualifier(YYLTYPE *loc, + _mesa_glsl_parse_state *state, + ast_node* &node) +{ + const bool r = state->out_qualifier->merge_qualifier(loc, state, + *this, false); + + switch (state->stage) { + case MESA_SHADER_GEOMETRY: + /* Allow future assignments of global out's stream id value */ + state->out_qualifier->flags.q.explicit_stream = 0; + break; + case MESA_SHADER_TESS_CTRL: + node = new(state->linalloc) ast_tcs_output_layout(*loc); + break; + default: + break; } + /* Allow future assignments of global out's */ + state->out_qualifier->flags.q.explicit_xfb_buffer = 0; + state->out_qualifier->flags.q.explicit_xfb_stride = 0; + return r; } bool -ast_type_qualifier::merge_in_qualifier(YYLTYPE *loc, - _mesa_glsl_parse_state *state, - const ast_type_qualifier &q, - ast_node* &node, bool create_node) -{ - void *mem_ctx = state; - bool create_gs_ast = false; - bool create_cs_ast = false; +ast_type_qualifier::validate_in_qualifier(YYLTYPE *loc, + _mesa_glsl_parse_state *state) +{ + bool r = true; ast_type_qualifier valid_in_mask; valid_in_mask.flags.i = 0; switch (state->stage) { case MESA_SHADER_TESS_EVAL: - if (q.flags.q.prim_type) { + if (this->flags.q.prim_type) { /* Make sure this is a valid input primitive type. */ - switch (q.prim_type) { + switch (this->prim_type) { case GL_TRIANGLES: case GL_QUADS: case GL_ISOLINES: break; default: + r = false; _mesa_glsl_error(loc, state, "invalid tessellation evaluation " "shader input primitive type"); @@ -469,9 +555,9 @@ valid_in_mask.flags.q.point_mode = 1; break; case MESA_SHADER_GEOMETRY: - if (q.flags.q.prim_type) { + if (this->flags.q.prim_type) { /* Make sure this is a valid input primitive type. */ - switch (q.prim_type) { + switch (this->prim_type) { case GL_POINTS: case GL_LINES: case GL_LINES_ADJACENCY: @@ -479,110 +565,130 @@ case GL_TRIANGLES_ADJACENCY: break; default: + r = false; _mesa_glsl_error(loc, state, "invalid geometry shader input primitive type"); break; } } - create_gs_ast |= - q.flags.q.prim_type && - !state->in_qualifier->flags.q.prim_type; - valid_in_mask.flags.q.prim_type = 1; valid_in_mask.flags.q.invocations = 1; break; case MESA_SHADER_FRAGMENT: valid_in_mask.flags.q.early_fragment_tests = 1; + valid_in_mask.flags.q.inner_coverage = 1; + valid_in_mask.flags.q.post_depth_coverage = 1; break; case MESA_SHADER_COMPUTE: - create_cs_ast |= - q.flags.q.local_size != 0 && - state->in_qualifier->flags.q.local_size == 0; - valid_in_mask.flags.q.local_size = 7; + valid_in_mask.flags.q.local_size_variable = 1; break; default: + r = false; _mesa_glsl_error(loc, state, "input layout qualifiers only valid in " - "geometry, fragment and compute shaders"); + "geometry, tessellation, fragment and compute shaders"); break; } /* Generate an error when invalid input layout qualifiers are used. */ - if ((q.flags.i & ~valid_in_mask.flags.i) != 0) { - _mesa_glsl_error(loc, state, - "invalid input layout qualifiers used"); - return false; + if ((this->flags.i & ~valid_in_mask.flags.i) != 0) { + r = false; + _mesa_glsl_error(loc, state, "invalid input layout qualifiers used"); } - /* Input layout qualifiers can be specified multiple - * times in separate declarations, as long as they match. + /* The checks below are also performed when merging but we want to spit an + * error against the default global input qualifier as soon as we can, with + * the closest error location in the shader. */ - if (this->flags.q.prim_type) { - if (q.flags.q.prim_type && - this->prim_type != q.prim_type) { - _mesa_glsl_error(loc, state, - "conflicting input primitive %s specified", - state->stage == MESA_SHADER_GEOMETRY ? - "type" : "mode"); - } - } else if (q.flags.q.prim_type) { - state->in_qualifier->flags.q.prim_type = 1; - state->in_qualifier->prim_type = q.prim_type; - } + r &= validate_prim_type(loc, state, *state->in_qualifier, *this); + r &= validate_vertex_spacing(loc, state, *state->in_qualifier, *this); + r &= validate_ordering(loc, state, *state->in_qualifier, *this); + r &= validate_point_mode(*state->in_qualifier, *this); - if (q.flags.q.invocations) { - this->flags.q.invocations = 1; - if (this->invocations) { - this->invocations->merge_qualifier(q.invocations); - } else { - this->invocations = q.invocations; - } + return r; +} + +bool +ast_type_qualifier::merge_into_in_qualifier(YYLTYPE *loc, + _mesa_glsl_parse_state *state, + ast_node* &node) +{ + bool r = true; + void *lin_ctx = state->linalloc; + + /* We create the gs_input_layout node before merging so, in the future, no + * more repeated nodes will be created as we will have the flag set. + */ + if (state->stage == MESA_SHADER_GEOMETRY + && this->flags.q.prim_type && !state->in_qualifier->flags.q.prim_type) { + node = new(lin_ctx) ast_gs_input_layout(*loc, this->prim_type); } - if (q.flags.q.early_fragment_tests) { + r = state->in_qualifier->merge_qualifier(loc, state, *this, false); + + if (state->in_qualifier->flags.q.early_fragment_tests) { state->fs_early_fragment_tests = true; + state->in_qualifier->flags.q.early_fragment_tests = false; } - if (this->flags.q.vertex_spacing) { - if (q.flags.q.vertex_spacing && - this->vertex_spacing != q.vertex_spacing) { - _mesa_glsl_error(loc, state, - "conflicting vertex spacing specified"); - } - } else if (q.flags.q.vertex_spacing) { - this->flags.q.vertex_spacing = 1; - this->vertex_spacing = q.vertex_spacing; + if (state->in_qualifier->flags.q.inner_coverage) { + state->fs_inner_coverage = true; + state->in_qualifier->flags.q.inner_coverage = false; } - if (this->flags.q.ordering) { - if (q.flags.q.ordering && - this->ordering != q.ordering) { - _mesa_glsl_error(loc, state, - "conflicting ordering specified"); - } - } else if (q.flags.q.ordering) { - this->flags.q.ordering = 1; - this->ordering = q.ordering; + if (state->in_qualifier->flags.q.post_depth_coverage) { + state->fs_post_depth_coverage = true; + state->in_qualifier->flags.q.post_depth_coverage = false; } - if (this->flags.q.point_mode) { - if (q.flags.q.point_mode && - this->point_mode != q.point_mode) { - _mesa_glsl_error(loc, state, - "conflicting point mode specified"); - } - } else if (q.flags.q.point_mode) { - this->flags.q.point_mode = 1; - this->point_mode = q.point_mode; + if (state->fs_inner_coverage && state->fs_post_depth_coverage) { + _mesa_glsl_error(loc, state, + "inner_coverage & post_depth_coverage layout qualifiers " + "are mutally exclusives"); + r = false; } - if (create_node) { - if (create_gs_ast) { - node = new(mem_ctx) ast_gs_input_layout(*loc, q.prim_type); - } else if (create_cs_ast) { - node = new(mem_ctx) ast_cs_input_layout(*loc, q.local_size); + /* We allow the creation of multiple cs_input_layout nodes. Coherence among + * all existing nodes is checked later, when the AST node is transformed + * into HIR. + */ + if (state->in_qualifier->flags.q.local_size) { + node = new(lin_ctx) ast_cs_input_layout(*loc, + state->in_qualifier->local_size); + state->in_qualifier->flags.q.local_size = 0; + for (int i = 0; i < 3; i++) + state->in_qualifier->local_size[i] = NULL; + } + + if (state->in_qualifier->flags.q.local_size_variable) { + state->cs_input_local_size_variable_specified = true; + state->in_qualifier->flags.q.local_size_variable = false; + } + + return r; +} + +bool +ast_type_qualifier::push_to_global(YYLTYPE *loc, + _mesa_glsl_parse_state *state) +{ + if (this->flags.q.xfb_stride) { + this->flags.q.xfb_stride = 0; + + unsigned buff_idx; + if (process_qualifier_constant(state, loc, "xfb_buffer", + this->xfb_buffer, &buff_idx)) { + if (state->out_qualifier->out_xfb_stride[buff_idx]) { + state->out_qualifier->out_xfb_stride[buff_idx]->merge_qualifier( + new(state->linalloc) ast_layout_expression(*loc, + this->xfb_stride)); + } else { + state->out_qualifier->out_xfb_stride[buff_idx] = + new(state->linalloc) ast_layout_expression(*loc, + this->xfb_stride); + } } } @@ -600,8 +706,8 @@ bool ast_type_qualifier::validate_flags(YYLTYPE *loc, _mesa_glsl_parse_state *state, - const char *message, - const ast_type_qualifier &allowed_flags) + const ast_type_qualifier &allowed_flags, + const char *message, const char *name) { ast_type_qualifier bad; bad.flags.i = this->flags.i & ~allowed_flags.flags.i; @@ -609,11 +715,11 @@ return true; _mesa_glsl_error(loc, state, - "%s:" + "%s '%s':" "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s" "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s" - "%s%s%s%s%s%s%s%s%s%s%s%s%s\n", - message, + "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", + message, name, bad.flags.q.invariant ? " invariant" : "", bad.flags.q.precise ? " precise" : "", bad.flags.q.constant ? " constant" : "", @@ -633,6 +739,7 @@ bad.flags.q.origin_upper_left ? " origin_upper_left" : "", bad.flags.q.pixel_center_integer ? " pixel_center_integer" : "", bad.flags.q.explicit_align ? " align" : "", + bad.flags.q.explicit_component ? " component" : "", bad.flags.q.explicit_location ? " location" : "", bad.flags.q.explicit_index ? " index" : "", bad.flags.q.explicit_binding ? " binding" : "", @@ -650,6 +757,7 @@ bad.flags.q.prim_type ? " prim_type" : "", bad.flags.q.max_vertices ? " max_vertices" : "", bad.flags.q.local_size ? " local_size" : "", + bad.flags.q.local_size_variable ? " local_size_variable" : "", bad.flags.q.early_fragment_tests ? " early_fragment_tests" : "", bad.flags.q.explicit_image_format ? " image_format" : "", bad.flags.q.coherent ? " coherent" : "", @@ -670,7 +778,9 @@ bad.flags.q.point_mode ? " point_mode" : "", bad.flags.q.vertices ? " vertices" : "", bad.flags.q.subroutine ? " subroutine" : "", - bad.flags.q.subroutine_def ? " subroutine_def" : ""); + bad.flags.q.subroutine_def ? " subroutine_def" : "", + bad.flags.q.inner_coverage ? " inner_coverage" : "", + bad.flags.q.post_depth_coverage ? " post_depth_coverage" : ""); return false; } @@ -678,8 +788,7 @@ ast_layout_expression::process_qualifier_constant(struct _mesa_glsl_parse_state *state, const char *qual_indentifier, unsigned *value, - bool can_be_zero, - bool must_match) + bool can_be_zero) { int min_value = 0; bool first_pass = true; @@ -688,8 +797,8 @@ if (!can_be_zero) min_value = 1; - for (exec_node *node = layout_const_expressions.head; - !node->is_tail_sentinel(); node = node->next) { + for (exec_node *node = layout_const_expressions.get_head_raw(); + !node->is_tail_sentinel(); node = node->next) { exec_list dummy_instructions; ast_node *const_expression = exec_node_data(ast_node, node, link); @@ -712,19 +821,12 @@ return false; } - /* From section 4.4 "Layout Qualifiers" of the GLSL 4.50 spec: - * "When the same layout-qualifier-name occurs multiple times, - * in a single declaration, the last occurrence overrides the - * former occurrence(s)." - */ - if (!first_pass) { - if ((must_match || !state->has_420pack()) && *value != const_int->value.u[0]) { - YYLTYPE loc = const_expression->get_location(); - _mesa_glsl_error(&loc, state, "%s layout qualifier does not " - "match previous declaration (%d vs %d)", - qual_indentifier, *value, const_int->value.i[0]); - return false; - } + if (!first_pass && *value != const_int->value.u[0]) { + YYLTYPE loc = const_expression->get_location(); + _mesa_glsl_error(&loc, state, "%s layout qualifier does not " + "match previous declaration (%d vs %d)", + qual_indentifier, *value, const_int->value.i[0]); + return false; } else { first_pass = false; *value = const_int->value.u[0]; diff -Nru mesa-12.0.6/src/compiler/glsl/blob.h mesa-17.0.7/src/compiler/glsl/blob.h --- mesa-12.0.6/src/compiler/glsl/blob.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/blob.h 2017-06-01 10:37:10.000000000 +0000 @@ -29,6 +29,8 @@ extern "C" { #endif +#include +#include #include /* The blob functions implement a simple, low-level API for serializing and diff -Nru mesa-12.0.6/src/compiler/glsl/builtin_functions.cpp mesa-17.0.7/src/compiler/glsl/builtin_functions.cpp --- mesa-12.0.6/src/compiler/glsl/builtin_functions.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/builtin_functions.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -123,6 +123,12 @@ } static bool +v130_desktop(const _mesa_glsl_parse_state *state) +{ + return state->is_version(130, 0); +} + +static bool v130_fs_only(const _mesa_glsl_parse_state *state) { return state->is_version(130, 300) && @@ -245,6 +251,15 @@ } static bool +gpu_shader5_or_OES_texture_cube_map_array(const _mesa_glsl_parse_state *state) +{ + return state->is_version(400, 320) || + state->ARB_gpu_shader5_enable || + state->EXT_texture_cube_map_array_enable || + state->OES_texture_cube_map_array_enable; +} + +static bool es31_not_gs5(const _mesa_glsl_parse_state *state) { return state->is_version(0, 310) && !gpu_shader5_es(state); @@ -265,6 +280,13 @@ } static bool +gpu_shader5_or_es31_or_integer_functions(const _mesa_glsl_parse_state *state) +{ + return gpu_shader5_or_es31(state) || + state->MESA_shader_integer_functions_enable; +} + +static bool fs_interpolate_at(const _mesa_glsl_parse_state *state) { return state->stage == MESA_SHADER_FRAGMENT && @@ -327,15 +349,13 @@ fs_texture_cube_map_array(const _mesa_glsl_parse_state *state) { return state->stage == MESA_SHADER_FRAGMENT && - (state->is_version(400, 0) || - state->ARB_texture_cube_map_array_enable); + state->has_texture_cube_map_array(); } static bool texture_cube_map_array(const _mesa_glsl_parse_state *state) { - return state->is_version(400, 0) || - state->ARB_texture_cube_map_array_enable; + return state->has_texture_cube_map_array(); } static bool @@ -353,11 +373,13 @@ } static bool -texture_gather(const _mesa_glsl_parse_state *state) +texture_gather_cube_map_array(const _mesa_glsl_parse_state *state) { - return state->is_version(400, 0) || + return state->is_version(400, 320) || state->ARB_texture_gather_enable || - state->ARB_gpu_shader5_enable; + state->ARB_gpu_shader5_enable || + state->EXT_texture_cube_map_array_enable || + state->OES_texture_cube_map_array_enable; } static bool @@ -516,6 +538,12 @@ } static bool +compute_shader_supported(const _mesa_glsl_parse_state *state) +{ + return state->has_compute_shader(); +} + +static bool buffer_atomics_supported(const _mesa_glsl_parse_state *state) { return compute_shader(state) || shader_storage_buffer_object(state); @@ -528,6 +556,12 @@ state->stage == MESA_SHADER_TESS_CTRL; } +static bool +vote(const _mesa_glsl_parse_state *state) +{ + return state->ARB_shader_group_vote_enable; +} + /** @} */ /******************************************************************************/ @@ -563,10 +597,6 @@ private: void *mem_ctx; - /** Global variables used by built-in functions. */ - ir_variable *gl_ModelViewProjectionMatrix; - ir_variable *gl_Vertex; - void create_shader(); void create_intrinsics(); void create_builtins(); @@ -616,7 +646,8 @@ const char *intrinsic_name, image_prototype_ctr prototype, unsigned num_arguments, - unsigned flags); + unsigned flags, + enum ir_intrinsic_id id); /** * Create new functions for all known image built-ins and types. @@ -803,9 +834,12 @@ B1(interpolateAtOffset) B1(interpolateAtSample) - ir_function_signature *_atomic_counter_intrinsic(builtin_available_predicate avail); - ir_function_signature *_atomic_counter_intrinsic1(builtin_available_predicate avail); - ir_function_signature *_atomic_counter_intrinsic2(builtin_available_predicate avail); + ir_function_signature *_atomic_counter_intrinsic(builtin_available_predicate avail, + enum ir_intrinsic_id id); + ir_function_signature *_atomic_counter_intrinsic1(builtin_available_predicate avail, + enum ir_intrinsic_id id); + ir_function_signature *_atomic_counter_intrinsic2(builtin_available_predicate avail, + enum ir_intrinsic_id id); ir_function_signature *_atomic_counter_op(const char *intrinsic, builtin_available_predicate avail); ir_function_signature *_atomic_counter_op1(const char *intrinsic, @@ -814,12 +848,14 @@ builtin_available_predicate avail); ir_function_signature *_atomic_intrinsic2(builtin_available_predicate avail, - const glsl_type *type); + const glsl_type *type, + enum ir_intrinsic_id id); ir_function_signature *_atomic_op2(const char *intrinsic, builtin_available_predicate avail, const glsl_type *type); ir_function_signature *_atomic_intrinsic3(builtin_available_predicate avail, - const glsl_type *type); + const glsl_type *type, + enum ir_intrinsic_id id); ir_function_signature *_atomic_op3(const char *intrinsic, builtin_available_predicate avail, const glsl_type *type); @@ -841,10 +877,12 @@ const glsl_type *image_type, const char *intrinsic_name, unsigned num_arguments, - unsigned flags); + unsigned flags, + enum ir_intrinsic_id id); ir_function_signature *_memory_barrier_intrinsic( - builtin_available_predicate avail); + builtin_available_predicate avail, + enum ir_intrinsic_id id); ir_function_signature *_memory_barrier(const char *intrinsic_name, builtin_available_predicate avail); @@ -853,6 +891,8 @@ ir_function_signature *_shader_clock(builtin_available_predicate avail, const glsl_type *type); + ir_function_signature *_vote(enum ir_expression_operation opcode); + #undef B0 #undef B1 #undef B2 @@ -881,9 +921,7 @@ * @{ */ builtin_builder::builtin_builder() - : shader(NULL), - gl_ModelViewProjectionMatrix(NULL), - gl_Vertex(NULL) + : shader(NULL) { mem_ctx = NULL; } @@ -948,18 +986,8 @@ * GLSL utility code that could be linked against any stage, so just * arbitrarily pick GL_VERTEX_SHADER. */ - shader = _mesa_new_shader(NULL, 0, GL_VERTEX_SHADER); + shader = _mesa_new_shader(0, MESA_SHADER_VERTEX); shader->symbols = new(mem_ctx) glsl_symbol_table; - - gl_ModelViewProjectionMatrix = - new(mem_ctx) ir_variable(glsl_type::mat4_type, - "gl_ModelViewProjectionMatrix", - ir_var_uniform); - - shader->symbols->add_variable(gl_ModelViewProjectionMatrix); - - gl_Vertex = in_var(glsl_type::vec4_type, "gl_Vertex"); - shader->symbols->add_variable(gl_Vertex); } /** @} */ @@ -972,94 +1000,124 @@ builtin_builder::create_intrinsics() { add_function("__intrinsic_atomic_read", - _atomic_counter_intrinsic(shader_atomic_counters), + _atomic_counter_intrinsic(shader_atomic_counters, + ir_intrinsic_atomic_counter_read), NULL); add_function("__intrinsic_atomic_increment", - _atomic_counter_intrinsic(shader_atomic_counters), + _atomic_counter_intrinsic(shader_atomic_counters, + ir_intrinsic_atomic_counter_increment), NULL); add_function("__intrinsic_atomic_predecrement", - _atomic_counter_intrinsic(shader_atomic_counters), + _atomic_counter_intrinsic(shader_atomic_counters, + ir_intrinsic_atomic_counter_predecrement), NULL); add_function("__intrinsic_atomic_add", _atomic_intrinsic2(buffer_atomics_supported, - glsl_type::uint_type), + glsl_type::uint_type, + ir_intrinsic_generic_atomic_add), _atomic_intrinsic2(buffer_atomics_supported, - glsl_type::int_type), - _atomic_counter_intrinsic1(shader_atomic_counter_ops), - NULL); - add_function("__intrinsic_atomic_sub", - _atomic_counter_intrinsic1(shader_atomic_counter_ops), + glsl_type::int_type, + ir_intrinsic_generic_atomic_add), + _atomic_counter_intrinsic1(shader_atomic_counter_ops, + ir_intrinsic_atomic_counter_add), NULL); add_function("__intrinsic_atomic_min", _atomic_intrinsic2(buffer_atomics_supported, - glsl_type::uint_type), + glsl_type::uint_type, + ir_intrinsic_generic_atomic_min), _atomic_intrinsic2(buffer_atomics_supported, - glsl_type::int_type), - _atomic_counter_intrinsic1(shader_atomic_counter_ops), + glsl_type::int_type, + ir_intrinsic_generic_atomic_min), + _atomic_counter_intrinsic1(shader_atomic_counter_ops, + ir_intrinsic_atomic_counter_min), NULL); add_function("__intrinsic_atomic_max", _atomic_intrinsic2(buffer_atomics_supported, - glsl_type::uint_type), + glsl_type::uint_type, + ir_intrinsic_generic_atomic_max), _atomic_intrinsic2(buffer_atomics_supported, - glsl_type::int_type), - _atomic_counter_intrinsic1(shader_atomic_counter_ops), + glsl_type::int_type, + ir_intrinsic_generic_atomic_max), + _atomic_counter_intrinsic1(shader_atomic_counter_ops, + ir_intrinsic_atomic_counter_max), NULL); add_function("__intrinsic_atomic_and", _atomic_intrinsic2(buffer_atomics_supported, - glsl_type::uint_type), + glsl_type::uint_type, + ir_intrinsic_generic_atomic_and), _atomic_intrinsic2(buffer_atomics_supported, - glsl_type::int_type), - _atomic_counter_intrinsic1(shader_atomic_counter_ops), + glsl_type::int_type, + ir_intrinsic_generic_atomic_and), + _atomic_counter_intrinsic1(shader_atomic_counter_ops, + ir_intrinsic_atomic_counter_and), NULL); add_function("__intrinsic_atomic_or", _atomic_intrinsic2(buffer_atomics_supported, - glsl_type::uint_type), + glsl_type::uint_type, + ir_intrinsic_generic_atomic_or), _atomic_intrinsic2(buffer_atomics_supported, - glsl_type::int_type), - _atomic_counter_intrinsic1(shader_atomic_counter_ops), + glsl_type::int_type, + ir_intrinsic_generic_atomic_or), + _atomic_counter_intrinsic1(shader_atomic_counter_ops, + ir_intrinsic_atomic_counter_or), NULL); add_function("__intrinsic_atomic_xor", _atomic_intrinsic2(buffer_atomics_supported, - glsl_type::uint_type), + glsl_type::uint_type, + ir_intrinsic_generic_atomic_xor), _atomic_intrinsic2(buffer_atomics_supported, - glsl_type::int_type), - _atomic_counter_intrinsic1(shader_atomic_counter_ops), + glsl_type::int_type, + ir_intrinsic_generic_atomic_xor), + _atomic_counter_intrinsic1(shader_atomic_counter_ops, + ir_intrinsic_atomic_counter_xor), NULL); add_function("__intrinsic_atomic_exchange", _atomic_intrinsic2(buffer_atomics_supported, - glsl_type::uint_type), + glsl_type::uint_type, + ir_intrinsic_generic_atomic_exchange), _atomic_intrinsic2(buffer_atomics_supported, - glsl_type::int_type), - _atomic_counter_intrinsic1(shader_atomic_counter_ops), + glsl_type::int_type, + ir_intrinsic_generic_atomic_exchange), + _atomic_counter_intrinsic1(shader_atomic_counter_ops, + ir_intrinsic_atomic_counter_exchange), NULL); add_function("__intrinsic_atomic_comp_swap", _atomic_intrinsic3(buffer_atomics_supported, - glsl_type::uint_type), + glsl_type::uint_type, + ir_intrinsic_generic_atomic_comp_swap), _atomic_intrinsic3(buffer_atomics_supported, - glsl_type::int_type), - _atomic_counter_intrinsic2(shader_atomic_counter_ops), + glsl_type::int_type, + ir_intrinsic_generic_atomic_comp_swap), + _atomic_counter_intrinsic2(shader_atomic_counter_ops, + ir_intrinsic_atomic_counter_comp_swap), NULL); add_image_functions(false); add_function("__intrinsic_memory_barrier", - _memory_barrier_intrinsic(shader_image_load_store), + _memory_barrier_intrinsic(shader_image_load_store, + ir_intrinsic_memory_barrier), NULL); add_function("__intrinsic_group_memory_barrier", - _memory_barrier_intrinsic(compute_shader), + _memory_barrier_intrinsic(compute_shader, + ir_intrinsic_group_memory_barrier), NULL); add_function("__intrinsic_memory_barrier_atomic_counter", - _memory_barrier_intrinsic(compute_shader), + _memory_barrier_intrinsic(compute_shader_supported, + ir_intrinsic_memory_barrier_atomic_counter), NULL); add_function("__intrinsic_memory_barrier_buffer", - _memory_barrier_intrinsic(compute_shader), + _memory_barrier_intrinsic(compute_shader_supported, + ir_intrinsic_memory_barrier_buffer), NULL); add_function("__intrinsic_memory_barrier_image", - _memory_barrier_intrinsic(compute_shader), + _memory_barrier_intrinsic(compute_shader_supported, + ir_intrinsic_memory_barrier_image), NULL); add_function("__intrinsic_memory_barrier_shared", - _memory_barrier_intrinsic(compute_shader), + _memory_barrier_intrinsic(compute_shader, + ir_intrinsic_memory_barrier_shared), NULL); add_function("__intrinsic_shader_clock", @@ -1148,23 +1206,19 @@ _##NAME(fp64, glsl_type::dvec4_type), \ NULL); -#define FIUD(NAME) \ +#define FIUD_VEC(NAME) \ add_function(#NAME, \ - _##NAME(always_available, glsl_type::float_type), \ _##NAME(always_available, glsl_type::vec2_type), \ _##NAME(always_available, glsl_type::vec3_type), \ _##NAME(always_available, glsl_type::vec4_type), \ \ - _##NAME(always_available, glsl_type::int_type), \ _##NAME(always_available, glsl_type::ivec2_type), \ _##NAME(always_available, glsl_type::ivec3_type), \ _##NAME(always_available, glsl_type::ivec4_type), \ \ - _##NAME(v130, glsl_type::uint_type), \ _##NAME(v130, glsl_type::uvec2_type), \ _##NAME(v130, glsl_type::uvec3_type), \ _##NAME(v130, glsl_type::uvec4_type), \ - _##NAME(fp64, glsl_type::double_type), \ _##NAME(fp64, glsl_type::dvec2_type), \ _##NAME(fp64, glsl_type::dvec3_type), \ _##NAME(fp64, glsl_type::dvec4_type), \ @@ -1183,29 +1237,24 @@ _##NAME(glsl_type::uvec4_type), \ NULL); -#define FIUBD(NAME) \ +#define FIUBD_VEC(NAME) \ add_function(#NAME, \ - _##NAME(always_available, glsl_type::float_type), \ _##NAME(always_available, glsl_type::vec2_type), \ _##NAME(always_available, glsl_type::vec3_type), \ _##NAME(always_available, glsl_type::vec4_type), \ \ - _##NAME(always_available, glsl_type::int_type), \ _##NAME(always_available, glsl_type::ivec2_type), \ _##NAME(always_available, glsl_type::ivec3_type), \ _##NAME(always_available, glsl_type::ivec4_type), \ \ - _##NAME(v130, glsl_type::uint_type), \ _##NAME(v130, glsl_type::uvec2_type), \ _##NAME(v130, glsl_type::uvec3_type), \ _##NAME(v130, glsl_type::uvec4_type), \ \ - _##NAME(always_available, glsl_type::bool_type), \ _##NAME(always_available, glsl_type::bvec2_type), \ _##NAME(always_available, glsl_type::bvec3_type), \ _##NAME(always_available, glsl_type::bvec4_type), \ \ - _##NAME(fp64, glsl_type::double_type), \ _##NAME(fp64, glsl_type::dvec2_type), \ _##NAME(fp64, glsl_type::dvec3_type), \ _##NAME(fp64, glsl_type::dvec4_type), \ @@ -1521,12 +1570,12 @@ _transpose(fp64, glsl_type::dmat4x2_type), _transpose(fp64, glsl_type::dmat4x3_type), NULL); - FIUD(lessThan) - FIUD(lessThanEqual) - FIUD(greaterThan) - FIUD(greaterThanEqual) - FIUBD(notEqual) - FIUBD(equal) + FIUD_VEC(lessThan) + FIUD_VEC(lessThanEqual) + FIUD_VEC(greaterThan) + FIUD_VEC(greaterThanEqual) + FIUBD_VEC(notEqual) + FIUBD_VEC(equal) add_function("any", _any(glsl_type::bvec2_type), @@ -1645,7 +1694,7 @@ _texture(ir_tex, v130, glsl_type::float_type, glsl_type::sampler1DArrayShadow_type, glsl_type::vec3_type), _texture(ir_tex, v130, glsl_type::float_type, glsl_type::sampler2DArrayShadow_type, glsl_type::vec4_type), /* samplerCubeArrayShadow is special; it has an extra parameter - * for the shadow comparitor since there is no vec5 type. + * for the shadow comparator since there is no vec5 type. */ _textureCubeArrayShadow(), @@ -1762,7 +1811,7 @@ * that it was intended to be included previously, so allow it * in 1.30. */ - _texture(ir_tex, v130, glsl_type::float_type, glsl_type::sampler2DArrayShadow_type, glsl_type::vec4_type, TEX_OFFSET), + _texture(ir_tex, v130_desktop, glsl_type::float_type, glsl_type::sampler2DArrayShadow_type, glsl_type::vec4_type, TEX_OFFSET), _texture(ir_txb, v130_fs_only, glsl_type::vec4_type, glsl_type::sampler1D_type, glsl_type::float_type, TEX_OFFSET), _texture(ir_txb, v130_fs_only, glsl_type::ivec4_type, glsl_type::isampler1D_type, glsl_type::float_type, TEX_OFFSET), @@ -2541,9 +2590,9 @@ _texture(ir_tg4, texture_gather_or_es31, glsl_type::ivec4_type, glsl_type::isamplerCube_type, glsl_type::vec3_type), _texture(ir_tg4, texture_gather_or_es31, glsl_type::uvec4_type, glsl_type::usamplerCube_type, glsl_type::vec3_type), - _texture(ir_tg4, texture_gather, glsl_type::vec4_type, glsl_type::samplerCubeArray_type, glsl_type::vec4_type), - _texture(ir_tg4, texture_gather, glsl_type::ivec4_type, glsl_type::isamplerCubeArray_type, glsl_type::vec4_type), - _texture(ir_tg4, texture_gather, glsl_type::uvec4_type, glsl_type::usamplerCubeArray_type, glsl_type::vec4_type), + _texture(ir_tg4, texture_gather_cube_map_array, glsl_type::vec4_type, glsl_type::samplerCubeArray_type, glsl_type::vec4_type), + _texture(ir_tg4, texture_gather_cube_map_array, glsl_type::ivec4_type, glsl_type::isamplerCubeArray_type, glsl_type::vec4_type), + _texture(ir_tg4, texture_gather_cube_map_array, glsl_type::uvec4_type, glsl_type::usamplerCubeArray_type, glsl_type::vec4_type), _texture(ir_tg4, gpu_shader5_or_es31, glsl_type::vec4_type, glsl_type::sampler2D_type, glsl_type::vec2_type, TEX_COMPONENT), _texture(ir_tg4, gpu_shader5_or_es31, glsl_type::ivec4_type, glsl_type::isampler2D_type, glsl_type::vec2_type, TEX_COMPONENT), @@ -2561,14 +2610,14 @@ _texture(ir_tg4, gpu_shader5_or_es31, glsl_type::ivec4_type, glsl_type::isamplerCube_type, glsl_type::vec3_type, TEX_COMPONENT), _texture(ir_tg4, gpu_shader5_or_es31, glsl_type::uvec4_type, glsl_type::usamplerCube_type, glsl_type::vec3_type, TEX_COMPONENT), - _texture(ir_tg4, gpu_shader5, glsl_type::vec4_type, glsl_type::samplerCubeArray_type, glsl_type::vec4_type, TEX_COMPONENT), - _texture(ir_tg4, gpu_shader5, glsl_type::ivec4_type, glsl_type::isamplerCubeArray_type, glsl_type::vec4_type, TEX_COMPONENT), - _texture(ir_tg4, gpu_shader5, glsl_type::uvec4_type, glsl_type::usamplerCubeArray_type, glsl_type::vec4_type, TEX_COMPONENT), + _texture(ir_tg4, gpu_shader5_or_OES_texture_cube_map_array, glsl_type::vec4_type, glsl_type::samplerCubeArray_type, glsl_type::vec4_type, TEX_COMPONENT), + _texture(ir_tg4, gpu_shader5_or_OES_texture_cube_map_array, glsl_type::ivec4_type, glsl_type::isamplerCubeArray_type, glsl_type::vec4_type, TEX_COMPONENT), + _texture(ir_tg4, gpu_shader5_or_OES_texture_cube_map_array, glsl_type::uvec4_type, glsl_type::usamplerCubeArray_type, glsl_type::vec4_type, TEX_COMPONENT), _texture(ir_tg4, gpu_shader5_or_es31, glsl_type::vec4_type, glsl_type::sampler2DShadow_type, glsl_type::vec2_type), _texture(ir_tg4, gpu_shader5_or_es31, glsl_type::vec4_type, glsl_type::sampler2DArrayShadow_type, glsl_type::vec3_type), _texture(ir_tg4, gpu_shader5_or_es31, glsl_type::vec4_type, glsl_type::samplerCubeShadow_type, glsl_type::vec3_type), - _texture(ir_tg4, gpu_shader5, glsl_type::vec4_type, glsl_type::samplerCubeArrayShadow_type, glsl_type::vec4_type), + _texture(ir_tg4, gpu_shader5_or_OES_texture_cube_map_array, glsl_type::vec4_type, glsl_type::samplerCubeArrayShadow_type, glsl_type::vec4_type), _texture(ir_tg4, gpu_shader5, glsl_type::vec4_type, glsl_type::sampler2DRectShadow_type, glsl_type::vec2_type), NULL); @@ -2915,15 +2964,15 @@ NULL); add_function("memoryBarrierAtomicCounter", _memory_barrier("__intrinsic_memory_barrier_atomic_counter", - compute_shader), + compute_shader_supported), NULL); add_function("memoryBarrierBuffer", _memory_barrier("__intrinsic_memory_barrier_buffer", - compute_shader), + compute_shader_supported), NULL); add_function("memoryBarrierImage", _memory_barrier("__intrinsic_memory_barrier_image", - compute_shader), + compute_shader_supported), NULL); add_function("memoryBarrierShared", _memory_barrier("__intrinsic_memory_barrier_shared", @@ -2935,10 +2984,14 @@ glsl_type::uvec2_type), NULL); + add_function("anyInvocationARB", _vote(ir_unop_vote_any), NULL); + add_function("allInvocationsARB", _vote(ir_unop_vote_all), NULL); + add_function("allInvocationsEqualARB", _vote(ir_unop_vote_eq), NULL); + #undef F #undef FI -#undef FIUD -#undef FIUBD +#undef FIUD_VEC +#undef FIUBD_VEC #undef FIU2_MIXED } @@ -2973,7 +3026,8 @@ const char *intrinsic_name, image_prototype_ctr prototype, unsigned num_arguments, - unsigned flags) + unsigned flags, + enum ir_intrinsic_id intrinsic_id) { static const glsl_type *const types[] = { glsl_type::image1D_type, @@ -3019,7 +3073,7 @@ (types[i]->sampler_dimensionality == GLSL_SAMPLER_DIM_MS || !(flags & IMAGE_FUNCTION_MS_ONLY))) f->add_signature(_image(prototype, types[i], intrinsic_name, - num_arguments, flags)); + num_arguments, flags, intrinsic_id)); } shader->symbols->add_function(f); @@ -3035,7 +3089,8 @@ &builtin_builder::_image_prototype, 0, (flags | IMAGE_FUNCTION_HAS_VECTOR_DATA_TYPE | IMAGE_FUNCTION_SUPPORTS_FLOAT_DATA_TYPE | - IMAGE_FUNCTION_READ_ONLY)); + IMAGE_FUNCTION_READ_ONLY), + ir_intrinsic_image_load); add_image_function(glsl ? "imageStore" : "__intrinsic_image_store", "__intrinsic_image_store", @@ -3043,56 +3098,67 @@ (flags | IMAGE_FUNCTION_RETURNS_VOID | IMAGE_FUNCTION_HAS_VECTOR_DATA_TYPE | IMAGE_FUNCTION_SUPPORTS_FLOAT_DATA_TYPE | - IMAGE_FUNCTION_WRITE_ONLY)); + IMAGE_FUNCTION_WRITE_ONLY), + ir_intrinsic_image_store); const unsigned atom_flags = flags | IMAGE_FUNCTION_AVAIL_ATOMIC; add_image_function(glsl ? "imageAtomicAdd" : "__intrinsic_image_atomic_add", "__intrinsic_image_atomic_add", - &builtin_builder::_image_prototype, 1, atom_flags); + &builtin_builder::_image_prototype, 1, atom_flags, + ir_intrinsic_image_atomic_add); add_image_function(glsl ? "imageAtomicMin" : "__intrinsic_image_atomic_min", "__intrinsic_image_atomic_min", - &builtin_builder::_image_prototype, 1, atom_flags); + &builtin_builder::_image_prototype, 1, atom_flags, + ir_intrinsic_image_atomic_min); add_image_function(glsl ? "imageAtomicMax" : "__intrinsic_image_atomic_max", "__intrinsic_image_atomic_max", - &builtin_builder::_image_prototype, 1, atom_flags); + &builtin_builder::_image_prototype, 1, atom_flags, + ir_intrinsic_image_atomic_max); add_image_function(glsl ? "imageAtomicAnd" : "__intrinsic_image_atomic_and", "__intrinsic_image_atomic_and", - &builtin_builder::_image_prototype, 1, atom_flags); + &builtin_builder::_image_prototype, 1, atom_flags, + ir_intrinsic_image_atomic_and); add_image_function(glsl ? "imageAtomicOr" : "__intrinsic_image_atomic_or", "__intrinsic_image_atomic_or", - &builtin_builder::_image_prototype, 1, atom_flags); + &builtin_builder::_image_prototype, 1, atom_flags, + ir_intrinsic_image_atomic_or); add_image_function(glsl ? "imageAtomicXor" : "__intrinsic_image_atomic_xor", "__intrinsic_image_atomic_xor", - &builtin_builder::_image_prototype, 1, atom_flags); + &builtin_builder::_image_prototype, 1, atom_flags, + ir_intrinsic_image_atomic_xor); add_image_function((glsl ? "imageAtomicExchange" : "__intrinsic_image_atomic_exchange"), "__intrinsic_image_atomic_exchange", &builtin_builder::_image_prototype, 1, (flags | IMAGE_FUNCTION_AVAIL_ATOMIC_EXCHANGE | - IMAGE_FUNCTION_SUPPORTS_FLOAT_DATA_TYPE)); + IMAGE_FUNCTION_SUPPORTS_FLOAT_DATA_TYPE), + ir_intrinsic_image_atomic_exchange); add_image_function((glsl ? "imageAtomicCompSwap" : "__intrinsic_image_atomic_comp_swap"), "__intrinsic_image_atomic_comp_swap", - &builtin_builder::_image_prototype, 2, atom_flags); + &builtin_builder::_image_prototype, 2, atom_flags, + ir_intrinsic_image_atomic_comp_swap); add_image_function(glsl ? "imageSize" : "__intrinsic_image_size", "__intrinsic_image_size", &builtin_builder::_image_size_prototype, 1, - flags | IMAGE_FUNCTION_SUPPORTS_FLOAT_DATA_TYPE); + flags | IMAGE_FUNCTION_SUPPORTS_FLOAT_DATA_TYPE, + ir_intrinsic_image_size); add_image_function(glsl ? "imageSamples" : "__intrinsic_image_samples", "__intrinsic_image_samples", &builtin_builder::_image_samples_prototype, 1, flags | IMAGE_FUNCTION_SUPPORTS_FLOAT_DATA_TYPE | - IMAGE_FUNCTION_MS_ONLY); + IMAGE_FUNCTION_MS_ONLY, + ir_intrinsic_image_samples); } ir_variable * @@ -3196,10 +3262,10 @@ ir_factory body(&sig->body, mem_ctx); \ sig->is_defined = true; -#define MAKE_INTRINSIC(return_type, avail, ...) \ +#define MAKE_INTRINSIC(return_type, id, avail, ...) \ ir_function_signature *sig = \ new_sig(return_type, avail, __VA_ARGS__); \ - sig->is_intrinsic = true; + sig->intrinsic_id = id; ir_function_signature * builtin_builder::unop(builtin_available_predicate avail, @@ -3298,13 +3364,29 @@ mul(abs(x), imm(p1)))))))))); } +/** + * Generate a ir_call to a function with a set of parameters + * + * The input \c params can either be a list of \c ir_variable or a list of + * \c ir_dereference_variable. In the latter case, all nodes will be removed + * from \c params and used directly as the parameters to the generated + * \c ir_call. + */ ir_call * builtin_builder::call(ir_function *f, ir_variable *ret, exec_list params) { exec_list actual_params; - foreach_in_list(ir_variable, var, ¶ms) { - actual_params.push_tail(var_ref(var)); + foreach_in_list_safe(ir_instruction, ir, ¶ms) { + ir_dereference_variable *d = ir->as_dereference_variable(); + if (d != NULL) { + d->remove(); + actual_params.push_tail(d); + } else { + ir_variable *var = ir->as_variable(); + assert(var != NULL); + actual_params.push_tail(var_ref(var)); + } } ir_function_signature *sig = @@ -3478,9 +3560,19 @@ ir_variable *x = in_var(type, "x"); MAKE_SIG(type, v130, 1, x); - /* (e^x - e^(-x)) / (e^x + e^(-x)) */ - body.emit(ret(div(sub(exp(x), exp(neg(x))), - add(exp(x), exp(neg(x)))))); + /* tanh(x) := (0.5 * (e^x - e^(-x))) / (0.5 * (e^x + e^(-x))) + * + * With a little algebra this reduces to (e^2x - 1) / (e^2x + 1) + * + * Clamp x to (-inf, +10] to avoid precision problems. When x > 10, e^2x + * is so much larger than 1.0 that 1.0 gets flushed to zero in the + * computation e^2x +/- 1 so it can be ignored. + */ + ir_variable *t = body.make_temp(type, "tmp"); + body.emit(assign(t, min2(x, imm(10.0f)))); + + body.emit(ret(div(sub(exp(mul(t, imm(2.0f))), imm(1.0f)), + add(exp(mul(t, imm(2.0f))), imm(1.0f))))); return sig; } @@ -3950,15 +4042,9 @@ { MAKE_SIG(glsl_type::vec4_type, compatibility_vs_only, 0); - body.emit(ret(new(mem_ctx) ir_expression(ir_binop_mul, - glsl_type::vec4_type, - var_ref(gl_ModelViewProjectionMatrix), - var_ref(gl_Vertex)))); - - /* FINISHME: Once the ir_expression() constructor handles type inference - * for matrix operations, we can simplify this to: - * - * body.emit(ret(mul(gl_ModelViewProjectionMatrix, gl_Vertex))); + /* ftransform() refers to global variables, and is always emitted + * directly by ast_function.cpp. Just emit a prototype here so we + * can recognize calls to it. */ return sig; } @@ -4570,7 +4656,7 @@ if (coord_size == coord_type->vector_elements) { tex->coordinate = var_ref(P); } else { - /* The incoming coordinate also has the projector or shadow comparitor, + /* The incoming coordinate also has the projector or shadow comparator, * so we need to swizzle those away. */ tex->coordinate = swizzle_for_size(P, coord_size); @@ -4587,12 +4673,12 @@ */ ir_variable *refz = in_var(glsl_type::float_type, "refz"); sig->parameters.push_tail(refz); - tex->shadow_comparitor = var_ref(refz); + tex->shadow_comparator = var_ref(refz); } else { - /* The shadow comparitor is normally in the Z component, but a few types + /* The shadow comparator is normally in the Z component, but a few types * have sufficiently large coordinates that it's in W. */ - tex->shadow_comparitor = swizzle(P, MAX2(coord_size, SWIZZLE_Z), 1); + tex->shadow_comparator = swizzle(P, MAX2(coord_size, SWIZZLE_Z), 1); } } @@ -4665,7 +4751,7 @@ tex->set_sampler(var_ref(s), glsl_type::float_type); tex->coordinate = var_ref(P); - tex->shadow_comparitor = var_ref(compare); + tex->shadow_comparator = var_ref(compare); body.emit(ret(tex)); @@ -4989,7 +5075,8 @@ ir_variable *value = in_var(type, "value"); ir_variable *offset = in_var(glsl_type::int_type, "offset"); ir_variable *bits = in_var(glsl_type::int_type, "bits"); - MAKE_SIG(type, gpu_shader5_or_es31, 3, value, offset, bits); + MAKE_SIG(type, gpu_shader5_or_es31_or_integer_functions, 3, value, offset, + bits); operand cast_offset = is_uint ? i2u(offset) : operand(offset); operand cast_bits = is_uint ? i2u(bits) : operand(bits); @@ -5009,7 +5096,8 @@ ir_variable *insert = in_var(type, "insert"); ir_variable *offset = in_var(glsl_type::int_type, "offset"); ir_variable *bits = in_var(glsl_type::int_type, "bits"); - MAKE_SIG(type, gpu_shader5_or_es31, 4, base, insert, offset, bits); + MAKE_SIG(type, gpu_shader5_or_es31_or_integer_functions, 4, base, insert, + offset, bits); operand cast_offset = is_uint ? i2u(offset) : operand(offset); operand cast_bits = is_uint ? i2u(bits) : operand(bits); @@ -5021,26 +5109,26 @@ return sig; } -UNOP(bitfieldReverse, ir_unop_bitfield_reverse, gpu_shader5_or_es31) +UNOP(bitfieldReverse, ir_unop_bitfield_reverse, gpu_shader5_or_es31_or_integer_functions) ir_function_signature * builtin_builder::_bitCount(const glsl_type *type) { - return unop(gpu_shader5_or_es31, ir_unop_bit_count, + return unop(gpu_shader5_or_es31_or_integer_functions, ir_unop_bit_count, glsl_type::ivec(type->vector_elements), type); } ir_function_signature * builtin_builder::_findLSB(const glsl_type *type) { - return unop(gpu_shader5_or_es31, ir_unop_find_lsb, + return unop(gpu_shader5_or_es31_or_integer_functions, ir_unop_find_lsb, glsl_type::ivec(type->vector_elements), type); } ir_function_signature * builtin_builder::_findMSB(const glsl_type *type) { - return unop(gpu_shader5_or_es31, ir_unop_find_msb, + return unop(gpu_shader5_or_es31_or_integer_functions, ir_unop_find_msb, glsl_type::ivec(type->vector_elements), type); } @@ -5060,7 +5148,7 @@ ir_function_signature * builtin_builder::_ldexp(const glsl_type *x_type, const glsl_type *exp_type) { - return binop(x_type->base_type == GLSL_TYPE_DOUBLE ? fp64 : gpu_shader5_or_es31, + return binop(x_type->base_type == GLSL_TYPE_DOUBLE ? fp64 : gpu_shader5_or_es31_or_integer_functions, ir_binop_ldexp, x_type, x_type, exp_type); } @@ -5082,7 +5170,7 @@ { ir_variable *x = in_var(x_type, "x"); ir_variable *exponent = out_var(exp_type, "exp"); - MAKE_SIG(x_type, gpu_shader5_or_es31, 2, x, exponent); + MAKE_SIG(x_type, gpu_shader5_or_es31_or_integer_functions, 2, x, exponent); const unsigned vec_elem = x_type->vector_elements; const glsl_type *bvec = glsl_type::get_instance(GLSL_TYPE_BOOL, vec_elem, 1); @@ -5131,7 +5219,7 @@ ir_variable *x = in_var(type, "x"); ir_variable *y = in_var(type, "y"); ir_variable *carry = out_var(type, "carry"); - MAKE_SIG(type, gpu_shader5_or_es31, 3, x, y, carry); + MAKE_SIG(type, gpu_shader5_or_es31_or_integer_functions, 3, x, y, carry); body.emit(assign(carry, ir_builder::carry(x, y))); body.emit(ret(add(x, y))); @@ -5145,7 +5233,7 @@ ir_variable *x = in_var(type, "x"); ir_variable *y = in_var(type, "y"); ir_variable *borrow = out_var(type, "borrow"); - MAKE_SIG(type, gpu_shader5_or_es31, 3, x, y, borrow); + MAKE_SIG(type, gpu_shader5_or_es31_or_integer_functions, 3, x, y, borrow); body.emit(assign(borrow, ir_builder::borrow(x, y))); body.emit(ret(sub(x, y))); @@ -5163,7 +5251,7 @@ ir_variable *y = in_var(type, "y"); ir_variable *msb = out_var(type, "msb"); ir_variable *lsb = out_var(type, "lsb"); - MAKE_SIG(glsl_type::void_type, gpu_shader5_or_es31, 4, x, y, msb, lsb); + MAKE_SIG(glsl_type::void_type, gpu_shader5_or_es31_or_integer_functions, 4, x, y, msb, lsb); body.emit(assign(msb, imul_high(x, y))); body.emit(assign(lsb, mul(x, y))); @@ -5210,50 +5298,55 @@ } ir_function_signature * -builtin_builder::_atomic_counter_intrinsic(builtin_available_predicate avail) +builtin_builder::_atomic_counter_intrinsic(builtin_available_predicate avail, + enum ir_intrinsic_id id) { ir_variable *counter = in_var(glsl_type::atomic_uint_type, "counter"); - MAKE_INTRINSIC(glsl_type::uint_type, avail, 1, counter); + MAKE_INTRINSIC(glsl_type::uint_type, id, avail, 1, counter); return sig; } ir_function_signature * -builtin_builder::_atomic_counter_intrinsic1(builtin_available_predicate avail) +builtin_builder::_atomic_counter_intrinsic1(builtin_available_predicate avail, + enum ir_intrinsic_id id) { ir_variable *counter = in_var(glsl_type::atomic_uint_type, "counter"); ir_variable *data = in_var(glsl_type::uint_type, "data"); - MAKE_INTRINSIC(glsl_type::uint_type, avail, 2, counter, data); + MAKE_INTRINSIC(glsl_type::uint_type, id, avail, 2, counter, data); return sig; } ir_function_signature * -builtin_builder::_atomic_counter_intrinsic2(builtin_available_predicate avail) +builtin_builder::_atomic_counter_intrinsic2(builtin_available_predicate avail, + enum ir_intrinsic_id id) { ir_variable *counter = in_var(glsl_type::atomic_uint_type, "counter"); ir_variable *compare = in_var(glsl_type::uint_type, "compare"); ir_variable *data = in_var(glsl_type::uint_type, "data"); - MAKE_INTRINSIC(glsl_type::uint_type, avail, 3, counter, compare, data); + MAKE_INTRINSIC(glsl_type::uint_type, id, avail, 3, counter, compare, data); return sig; } ir_function_signature * builtin_builder::_atomic_intrinsic2(builtin_available_predicate avail, - const glsl_type *type) + const glsl_type *type, + enum ir_intrinsic_id id) { ir_variable *atomic = in_var(type, "atomic"); ir_variable *data = in_var(type, "data"); - MAKE_INTRINSIC(type, avail, 2, atomic, data); + MAKE_INTRINSIC(type, id, avail, 2, atomic, data); return sig; } ir_function_signature * builtin_builder::_atomic_intrinsic3(builtin_available_predicate avail, - const glsl_type *type) + const glsl_type *type, + enum ir_intrinsic_id id) { ir_variable *atomic = in_var(type, "atomic"); ir_variable *data1 = in_var(type, "data1"); ir_variable *data2 = in_var(type, "data2"); - MAKE_INTRINSIC(type, avail, 3, atomic, data1, data2); + MAKE_INTRINSIC(type, id, avail, 3, atomic, data1, data2); return sig; } @@ -5280,8 +5373,34 @@ MAKE_SIG(glsl_type::uint_type, avail, 2, counter, data); ir_variable *retval = body.make_temp(glsl_type::uint_type, "atomic_retval"); - body.emit(call(shader->symbols->get_function(intrinsic), retval, - sig->parameters)); + + /* Instead of generating an __intrinsic_atomic_sub, generate an + * __intrinsic_atomic_add with the data parameter negated. + */ + if (strcmp("__intrinsic_atomic_sub", intrinsic) == 0) { + ir_variable *const neg_data = + body.make_temp(glsl_type::uint_type, "neg_data"); + + body.emit(assign(neg_data, neg(data))); + + exec_list parameters; + + parameters.push_tail(new(mem_ctx) ir_dereference_variable(counter)); + parameters.push_tail(new(mem_ctx) ir_dereference_variable(neg_data)); + + ir_function *const func = + shader->symbols->get_function("__intrinsic_atomic_add"); + ir_instruction *const c = call(func, retval, parameters); + + assert(c != NULL); + assert(parameters.is_empty()); + + body.emit(c); + } else { + body.emit(call(shader->symbols->get_function(intrinsic), retval, + sig->parameters)); + } + body.emit(ret(retval)); return sig; } @@ -5510,7 +5629,8 @@ const glsl_type *image_type, const char *intrinsic_name, unsigned num_arguments, - unsigned flags) + unsigned flags, + enum ir_intrinsic_id id) { ir_function_signature *sig = (this->*prototype)(image_type, num_arguments, flags); @@ -5531,16 +5651,17 @@ sig->is_defined = true; } else { - sig->is_intrinsic = true; + sig->intrinsic_id = id; } return sig; } ir_function_signature * -builtin_builder::_memory_barrier_intrinsic(builtin_available_predicate avail) +builtin_builder::_memory_barrier_intrinsic(builtin_available_predicate avail, + enum ir_intrinsic_id id) { - MAKE_INTRINSIC(glsl_type::void_type, avail, 0); + MAKE_INTRINSIC(glsl_type::void_type, id, avail, 0); return sig; } @@ -5558,7 +5679,7 @@ builtin_builder::_shader_clock_intrinsic(builtin_available_predicate avail, const glsl_type *type) { - MAKE_INTRINSIC(type, avail, 0); + MAKE_INTRINSIC(type, ir_intrinsic_shader_clock, avail, 0); return sig; } @@ -5576,6 +5697,16 @@ return sig; } +ir_function_signature * +builtin_builder::_vote(enum ir_expression_operation opcode) +{ + ir_variable *value = in_var(glsl_type::bool_type, "value"); + + MAKE_SIG(glsl_type::bool_type, vote, 1, value); + body.emit(ret(expr(opcode, value))); + return sig; +} + /** @} */ /******************************************************************************/ @@ -5636,9 +5767,9 @@ * Get the function signature for main from a shader */ ir_function_signature * -_mesa_get_main_function_signature(gl_shader *sh) +_mesa_get_main_function_signature(glsl_symbol_table *symbols) { - ir_function *const f = sh->symbols->get_function("main"); + ir_function *const f = symbols->get_function("main"); if (f != NULL) { exec_list void_parameters; diff -Nru mesa-12.0.6/src/compiler/glsl/builtin_types.cpp mesa-17.0.7/src/compiler/glsl/builtin_types.cpp --- mesa-12.0.6/src/compiler/glsl/builtin_types.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/builtin_types.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -177,7 +177,7 @@ T(samplerCube, 110, 100) T(sampler1DArray, 130, 999) T(sampler2DArray, 130, 300) - T(samplerCubeArray, 400, 999) + T(samplerCubeArray, 400, 320) T(sampler2DRect, 140, 999) T(samplerBuffer, 140, 320) T(sampler2DMS, 150, 310) @@ -189,7 +189,7 @@ T(isamplerCube, 130, 300) T(isampler1DArray, 130, 999) T(isampler2DArray, 130, 300) - T(isamplerCubeArray, 400, 999) + T(isamplerCubeArray, 400, 320) T(isampler2DRect, 140, 999) T(isamplerBuffer, 140, 320) T(isampler2DMS, 150, 310) @@ -201,7 +201,7 @@ T(usamplerCube, 130, 300) T(usampler1DArray, 130, 999) T(usampler2DArray, 130, 300) - T(usamplerCubeArray, 400, 999) + T(usamplerCubeArray, 400, 320) T(usampler2DRect, 140, 999) T(usamplerBuffer, 140, 320) T(usampler2DMS, 150, 310) @@ -212,7 +212,7 @@ T(samplerCubeShadow, 130, 300) T(sampler1DArrayShadow, 130, 999) T(sampler2DArrayShadow, 130, 300) - T(samplerCubeArrayShadow, 400, 999) + T(samplerCubeArrayShadow, 400, 320) T(sampler2DRectShadow, 140, 999) T(struct_gl_DepthRangeParameters, 110, 100) @@ -225,7 +225,7 @@ T(imageBuffer, 420, 320) T(image1DArray, 420, 999) T(image2DArray, 420, 310) - T(imageCubeArray, 420, 999) + T(imageCubeArray, 420, 320) T(image2DMS, 420, 999) T(image2DMSArray, 420, 999) T(iimage1D, 420, 999) @@ -236,7 +236,7 @@ T(iimageBuffer, 420, 320) T(iimage1DArray, 420, 999) T(iimage2DArray, 420, 310) - T(iimageCubeArray, 420, 999) + T(iimageCubeArray, 420, 320) T(iimage2DMS, 420, 999) T(iimage2DMSArray, 420, 999) T(uimage1D, 420, 999) @@ -247,7 +247,7 @@ T(uimageBuffer, 420, 320) T(uimage1DArray, 420, 999) T(uimage2DArray, 420, 310) - T(uimageCubeArray, 420, 999) + T(uimageCubeArray, 420, 320) T(uimage2DMS, 420, 999) T(uimage2DMSArray, 420, 999) @@ -298,7 +298,9 @@ * by the version-based loop, but attempting to add them a second time * is harmless. */ - if (state->ARB_texture_cube_map_array_enable) { + if (state->ARB_texture_cube_map_array_enable || + state->EXT_texture_cube_map_array_enable || + state->OES_texture_cube_map_array_enable) { add_type(symbols, glsl_type::samplerCubeArray_type); add_type(symbols, glsl_type::samplerCubeArrayShadow_type); add_type(symbols, glsl_type::isamplerCubeArray_type); @@ -337,6 +339,14 @@ add_type(symbols, glsl_type::sampler3D_type); } + if (state->ARB_shader_image_load_store_enable || + state->EXT_texture_cube_map_array_enable || + state->OES_texture_cube_map_array_enable) { + add_type(symbols, glsl_type::imageCubeArray_type); + add_type(symbols, glsl_type::iimageCubeArray_type); + add_type(symbols, glsl_type::uimageCubeArray_type); + } + if (state->ARB_shader_image_load_store_enable) { add_type(symbols, glsl_type::image1D_type); add_type(symbols, glsl_type::image2D_type); @@ -346,7 +356,6 @@ add_type(symbols, glsl_type::imageBuffer_type); add_type(symbols, glsl_type::image1DArray_type); add_type(symbols, glsl_type::image2DArray_type); - add_type(symbols, glsl_type::imageCubeArray_type); add_type(symbols, glsl_type::image2DMS_type); add_type(symbols, glsl_type::image2DMSArray_type); add_type(symbols, glsl_type::iimage1D_type); @@ -357,7 +366,6 @@ add_type(symbols, glsl_type::iimageBuffer_type); add_type(symbols, glsl_type::iimage1DArray_type); add_type(symbols, glsl_type::iimage2DArray_type); - add_type(symbols, glsl_type::iimageCubeArray_type); add_type(symbols, glsl_type::iimage2DMS_type); add_type(symbols, glsl_type::iimage2DMSArray_type); add_type(symbols, glsl_type::uimage1D_type); @@ -368,7 +376,6 @@ add_type(symbols, glsl_type::uimageBuffer_type); add_type(symbols, glsl_type::uimage1DArray_type); add_type(symbols, glsl_type::uimage2DArray_type); - add_type(symbols, glsl_type::uimageCubeArray_type); add_type(symbols, glsl_type::uimage2DMS_type); add_type(symbols, glsl_type::uimage2DMSArray_type); } diff -Nru mesa-12.0.6/src/compiler/glsl/builtin_variables.cpp mesa-17.0.7/src/compiler/glsl/builtin_variables.cpp --- mesa-12.0.6/src/compiler/glsl/builtin_variables.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/builtin_variables.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -330,7 +330,7 @@ this->fields[this->num_fields].matrix_layout = GLSL_MATRIX_LAYOUT_INHERITED; this->fields[this->num_fields].location = slot; this->fields[this->num_fields].offset = -1; - this->fields[this->num_fields].interpolation = INTERP_QUALIFIER_NONE; + this->fields[this->num_fields].interpolation = INTERP_MODE_NONE; this->fields[this->num_fields].centroid = 0; this->fields[this->num_fields].sample = 0; this->fields[this->num_fields].patch = 0; @@ -352,6 +352,7 @@ { return glsl_type::get_interface_instance(this->fields, this->num_fields, GLSL_INTERFACE_PACKING_STD140, + false, "gl_PerVertex"); } @@ -759,7 +760,7 @@ add_const("gl_MaxGeometryAtomicCounters", state->Const.MaxGeometryAtomicCounters); } - if (!state->es_shader) { + if (state->is_version(110, 320)) { add_const("gl_MaxTessControlAtomicCounters", state->Const.MaxTessControlAtomicCounters); add_const("gl_MaxTessEvaluationAtomicCounters", @@ -781,7 +782,7 @@ add_const("gl_MaxGeometryAtomicCounterBuffers", state->Const.MaxGeometryAtomicCounterBuffers); } - if (!state->es_shader) { + if (state->is_version(110, 320)) { add_const("gl_MaxTessControlAtomicCounterBuffers", state->Const.MaxTessControlAtomicCounterBuffers); add_const("gl_MaxTessEvaluationAtomicCounterBuffers", @@ -861,8 +862,7 @@ state->Const.MaxImageSamples); } - if (state->is_version(400, 0) || - state->ARB_tessellation_shader_enable) { + if (state->has_tessellation_shader()) { add_const("gl_MaxTessControlImageUniforms", state->Const.MaxTessControlImageUniforms); add_const("gl_MaxTessEvaluationImageUniforms", @@ -870,18 +870,18 @@ } } - if (state->is_version(450, 310) || + if (state->is_version(440, 310) || state->ARB_ES3_1_compatibility_enable) { add_const("gl_MaxCombinedShaderOutputResources", state->Const.MaxCombinedShaderOutputResources); } if (state->is_version(410, 0) || - state->ARB_viewport_array_enable) + state->ARB_viewport_array_enable || + state->OES_viewport_array_enable) add_const("gl_MaxViewports", state->Const.MaxViewports); - if (state->is_version(400, 0) || - state->ARB_tessellation_shader_enable) { + if (state->has_tessellation_shader()) { add_const("gl_MaxPatchVertices", state->Const.MaxPatchVertices); add_const("gl_MaxTessGenLevel", state->Const.MaxTessGenLevel); add_const("gl_MaxTessControlInputComponents", state->Const.MaxTessControlInputComponents); @@ -1002,13 +1002,15 @@ add_system_value(SYSTEM_VALUE_BASE_INSTANCE, int_t, "gl_BaseInstanceARB"); add_system_value(SYSTEM_VALUE_DRAW_ID, int_t, "gl_DrawIDARB"); } - if (state->AMD_vertex_shader_layer_enable) { + if (state->AMD_vertex_shader_layer_enable || + state->ARB_shader_viewport_layer_array_enable) { var = add_output(VARYING_SLOT_LAYER, int_t, "gl_Layer"); - var->data.interpolation = INTERP_QUALIFIER_FLAT; + var->data.interpolation = INTERP_MODE_FLAT; } - if (state->AMD_vertex_shader_viewport_index_enable) { + if (state->AMD_vertex_shader_viewport_index_enable || + state->ARB_shader_viewport_layer_array_enable) { var = add_output(VARYING_SLOT_VIEWPORT, int_t, "gl_ViewportIndex"); - var->data.interpolation = INTERP_QUALIFIER_FLAT; + var->data.interpolation = INTERP_MODE_FLAT; } if (compatibility) { add_input(VERT_ATTRIB_POS, vec4_t, "gl_Vertex"); @@ -1047,6 +1049,18 @@ "gl_TessLevelOuter")->data.patch = 1; add_output(VARYING_SLOT_TESS_LEVEL_INNER, array(float_t, 2), "gl_TessLevelInner")->data.patch = 1; + /* XXX What to do if multiple are flipped on? */ + int bbox_slot = state->ctx->Const.NoPrimitiveBoundingBoxOutput ? -1 : + VARYING_SLOT_BOUNDING_BOX0; + if (state->EXT_primitive_bounding_box_enable) + add_output(bbox_slot, array(vec4_t, 2), "gl_BoundingBoxEXT") + ->data.patch = 1; + if (state->OES_primitive_bounding_box_enable) + add_output(bbox_slot, array(vec4_t, 2), "gl_BoundingBoxOES") + ->data.patch = 1; + if (state->is_version(0, 320) || state->ARB_ES3_2_compatibility_enable) + add_output(bbox_slot, array(vec4_t, 2), "gl_BoundingBox") + ->data.patch = 1; } @@ -1056,13 +1070,28 @@ void builtin_variable_generator::generate_tes_special_vars() { + ir_variable *var; + add_system_value(SYSTEM_VALUE_PRIMITIVE_ID, int_t, "gl_PrimitiveID"); add_system_value(SYSTEM_VALUE_VERTICES_IN, int_t, "gl_PatchVerticesIn"); add_system_value(SYSTEM_VALUE_TESS_COORD, vec3_t, "gl_TessCoord"); - add_system_value(SYSTEM_VALUE_TESS_LEVEL_OUTER, array(float_t, 4), - "gl_TessLevelOuter"); - add_system_value(SYSTEM_VALUE_TESS_LEVEL_INNER, array(float_t, 2), - "gl_TessLevelInner"); + if (this->state->ctx->Const.GLSLTessLevelsAsInputs) { + add_input(VARYING_SLOT_TESS_LEVEL_OUTER, array(float_t, 4), + "gl_TessLevelOuter")->data.patch = 1; + add_input(VARYING_SLOT_TESS_LEVEL_INNER, array(float_t, 2), + "gl_TessLevelInner")->data.patch = 1; + } else { + add_system_value(SYSTEM_VALUE_TESS_LEVEL_OUTER, array(float_t, 4), + "gl_TessLevelOuter"); + add_system_value(SYSTEM_VALUE_TESS_LEVEL_INNER, array(float_t, 2), + "gl_TessLevelInner"); + } + if (state->ARB_shader_viewport_layer_array_enable) { + var = add_output(VARYING_SLOT_LAYER, int_t, "gl_Layer"); + var->data.interpolation = INTERP_MODE_FLAT; + var = add_output(VARYING_SLOT_VIEWPORT, int_t, "gl_ViewportIndex"); + var->data.interpolation = INTERP_MODE_FLAT; + } } @@ -1075,13 +1104,16 @@ ir_variable *var; var = add_output(VARYING_SLOT_LAYER, int_t, "gl_Layer"); - var->data.interpolation = INTERP_QUALIFIER_FLAT; - if (state->is_version(410, 0) || state->ARB_viewport_array_enable) { + var->data.interpolation = INTERP_MODE_FLAT; + if (state->is_version(410, 0) || state->ARB_viewport_array_enable || + state->OES_viewport_array_enable) { var = add_output(VARYING_SLOT_VIEWPORT, int_t, "gl_ViewportIndex"); - var->data.interpolation = INTERP_QUALIFIER_FLAT; + var->data.interpolation = INTERP_MODE_FLAT; } - if (state->is_version(400, 0) || state->ARB_gpu_shader5_enable) + if (state->is_version(400, 320) || state->ARB_gpu_shader5_enable || + state->OES_geometry_shader_enable || state->EXT_geometry_shader_enable) { add_system_value(SYSTEM_VALUE_INVOCATION_ID, int_t, "gl_InvocationID"); + } /* Although gl_PrimitiveID appears in tessellation control and tessellation * evaluation shaders, it has a different function there than it has in @@ -1094,9 +1126,9 @@ * gl_PrimitiveIDIn as an {ARB,EXT}_geometry_shader4-only variable. */ var = add_input(VARYING_SLOT_PRIMITIVE_ID, int_t, "gl_PrimitiveIDIn"); - var->data.interpolation = INTERP_QUALIFIER_FLAT; + var->data.interpolation = INTERP_MODE_FLAT; var = add_output(VARYING_SLOT_PRIMITIVE_ID, int_t, "gl_PrimitiveID"); - var->data.interpolation = INTERP_QUALIFIER_FLAT; + var->data.interpolation = INTERP_MODE_FLAT; } @@ -1123,7 +1155,7 @@ if (state->has_geometry_shader()) { var = add_input(VARYING_SLOT_PRIMITIVE_ID, int_t, "gl_PrimitiveID"); - var->data.interpolation = INTERP_QUALIFIER_FLAT; + var->data.interpolation = INTERP_MODE_FLAT; } /* gl_FragColor and gl_FragData were deprecated starting in desktop GLSL @@ -1136,14 +1168,19 @@ array(vec4_t, state->Const.MaxDrawBuffers), "gl_FragData"); } + if (state->has_framebuffer_fetch() && !state->is_version(130, 300)) { + ir_variable *const var = + add_output(FRAG_RESULT_DATA0, + array(vec4_t, state->Const.MaxDrawBuffers), + "gl_LastFragData"); + var->data.precision = GLSL_PRECISION_MEDIUM; + var->data.read_only = 1; + var->data.fb_fetch_output = 1; + } + if (state->es_shader && state->language_version == 100 && state->EXT_blend_func_extended_enable) { - /* We make an assumption here that there will only ever be one dual-source draw buffer - * In case this assumption is ever proven to be false, make sure to assert here - * since we don't handle this case. - * In practice, this issue will never arise since no hardware will support it. - */ - assert(state->Const.MaxDualSourceDrawBuffers <= 1); - add_index_output(FRAG_RESULT_DATA0, 1, vec4_t, "gl_SecondaryFragColorEXT"); + add_index_output(FRAG_RESULT_COLOR, 1, vec4_t, + "gl_SecondaryFragColorEXT"); add_index_output(FRAG_RESULT_DATA0, 1, array(vec4_t, state->Const.MaxDualSourceDrawBuffers), "gl_SecondaryFragDataEXT"); @@ -1190,11 +1227,19 @@ add_system_value(SYSTEM_VALUE_SAMPLE_MASK_IN, array(int_t, 1), "gl_SampleMaskIn"); } - if (state->is_version(430, 0) || state->ARB_fragment_layer_viewport_enable) { + if (state->is_version(430, 320) || + state->ARB_fragment_layer_viewport_enable || + state->OES_geometry_shader_enable || + state->EXT_geometry_shader_enable) { var = add_input(VARYING_SLOT_LAYER, int_t, "gl_Layer"); - var->data.interpolation = INTERP_QUALIFIER_FLAT; + var->data.interpolation = INTERP_MODE_FLAT; + } + + if (state->is_version(430, 0) || + state->ARB_fragment_layer_viewport_enable || + state->OES_viewport_array_enable) { var = add_input(VARYING_SLOT_VIEWPORT, int_t, "gl_ViewportIndex"); - var->data.interpolation = INTERP_QUALIFIER_FLAT; + var->data.interpolation = INTERP_MODE_FLAT; } if (state->is_version(450, 310) || state->ARB_ES3_1_compatibility_enable) @@ -1212,6 +1257,12 @@ "gl_LocalInvocationID"); add_system_value(SYSTEM_VALUE_WORK_GROUP_ID, uvec3_t, "gl_WorkGroupID"); add_system_value(SYSTEM_VALUE_NUM_WORK_GROUPS, uvec3_t, "gl_NumWorkGroups"); + + if (state->ARB_compute_variable_group_size_enable) { + add_system_value(SYSTEM_VALUE_LOCAL_GROUP_SIZE, + uvec3_t, "gl_LocalGroupSizeARB"); + } + if (state->ctx->Const.LowerCsDerivedVariables) { add_variable("gl_GlobalInvocationID", uvec3_t, ir_var_auto, 0); add_variable("gl_LocalInvocationIndex", uint_t, ir_var_auto, 0); @@ -1265,7 +1316,12 @@ if (!state->es_shader || state->stage == MESA_SHADER_VERTEX || (state->stage == MESA_SHADER_GEOMETRY && - state->OES_geometry_point_size_enable)) { + (state->OES_geometry_point_size_enable || + state->EXT_geometry_point_size_enable)) || + ((state->stage == MESA_SHADER_TESS_CTRL || + state->stage == MESA_SHADER_TESS_EVAL) && + (state->OES_tessellation_point_size_enable || + state->EXT_tessellation_point_size_enable))) { add_varying(VARYING_SLOT_PSIZ, float_t, "gl_PointSize"); } } @@ -1456,7 +1512,7 @@ if (shader->Stage == MESA_SHADER_COMPUTE && ctx->Const.LowerCsDerivedVariables) { ir_function_signature *const main_sig = - _mesa_get_main_function_signature(shader); + _mesa_get_main_function_signature(shader->symbols); if (main_sig != NULL) initialize_cs_derived_variables(shader, main_sig); diff -Nru mesa-12.0.6/src/compiler/glsl/glcpp/glcpp.c mesa-17.0.7/src/compiler/glsl/glcpp/glcpp.c --- mesa-12.0.6/src/compiler/glsl/glcpp/glcpp.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/glcpp/glcpp.c 2017-06-01 10:37:10.000000000 +0000 @@ -171,7 +171,7 @@ _mesa_locale_init(); - ret = glcpp_preprocess(ctx, &shader, &info_log, NULL, &gl_ctx); + ret = glcpp_preprocess(ctx, &shader, &info_log, NULL, NULL, &gl_ctx); printf("%s", shader); fprintf(stderr, "%s", info_log); diff -Nru mesa-12.0.6/src/compiler/glsl/glcpp/glcpp.h mesa-17.0.7/src/compiler/glsl/glcpp/glcpp.h --- mesa-12.0.6/src/compiler/glsl/glcpp/glcpp.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/glcpp/glcpp.h 2017-06-01 10:37:10.000000000 +0000 @@ -31,7 +31,7 @@ #include "util/ralloc.h" -#include "program/hash_table.h" +#include "util/hash_table.h" #define yyscan_t void* @@ -171,7 +171,17 @@ struct active_list *next; } active_list_t; +struct _mesa_glsl_parse_state; + +typedef void (*glcpp_extension_iterator)( + struct _mesa_glsl_parse_state *state, + void (*add_builtin_define)(glcpp_parser_t *, const char *, int), + glcpp_parser_t *data, + unsigned version, + bool es); + struct glcpp_parser { + void *linalloc; yyscan_t scanner; struct hash_table *defines; active_list_t *active; @@ -194,9 +204,19 @@ size_t output_length; size_t info_log_length; int error; - const struct gl_extensions *extensions; + glcpp_extension_iterator extensions; + void *state; gl_api api; unsigned version; + + /** + * Has the #version been set? + * + * A separate flag is used because any possible sentinel value in + * \c ::version could also be set by a #version line. + */ + bool version_set; + bool has_new_line_number; int new_line_number; bool has_new_source_number; @@ -204,10 +224,8 @@ bool is_gles; }; -struct gl_extensions; - glcpp_parser_t * -glcpp_parser_create (const struct gl_extensions *extensions, gl_api api); +glcpp_parser_create (glcpp_extension_iterator extensions, void *state, gl_api api); int glcpp_parser_parse (glcpp_parser_t *parser); @@ -220,7 +238,8 @@ int glcpp_preprocess(void *ralloc_ctx, const char **shader, char **info_log, - const struct gl_extensions *extensions, struct gl_context *g_ctx); + glcpp_extension_iterator extensions, void *state, + struct gl_context *g_ctx); /* Functions for writing to the info log */ diff -Nru mesa-12.0.6/src/compiler/glsl/glcpp/glcpp-lex.c mesa-17.0.7/src/compiler/glsl/glcpp/glcpp-lex.c --- mesa-12.0.6/src/compiler/glsl/glcpp/glcpp-lex.c 2017-01-24 01:43:15.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/glcpp/glcpp-lex.c 2017-06-01 10:37:58.000000000 +0000 @@ -1,6 +1,6 @@ -#line 2 "glsl/glcpp/glcpp-lex.c" +#line 1 "glsl/glcpp/glcpp-lex.c" -#line 4 "glsl/glcpp/glcpp-lex.c" +#line 3 "glsl/glcpp/glcpp-lex.c" #define YY_INT_ALIGNED short int @@ -9,11 +9,89 @@ #define FLEX_SCANNER #define YY_FLEX_MAJOR_VERSION 2 #define YY_FLEX_MINOR_VERSION 6 -#define YY_FLEX_SUBMINOR_VERSION 1 +#define YY_FLEX_SUBMINOR_VERSION 3 #if YY_FLEX_SUBMINOR_VERSION > 0 #define FLEX_BETA #endif + #define yy_create_buffer glcpp__create_buffer + + #define yy_delete_buffer glcpp__delete_buffer + + #define yy_scan_buffer glcpp__scan_buffer + + #define yy_scan_string glcpp__scan_string + + #define yy_scan_bytes glcpp__scan_bytes + + #define yy_init_buffer glcpp__init_buffer + + #define yy_flush_buffer glcpp__flush_buffer + + #define yy_load_buffer_state glcpp__load_buffer_state + + #define yy_switch_to_buffer glcpp__switch_to_buffer + + #define yypush_buffer_state glcpp_push_buffer_state + + #define yypop_buffer_state glcpp_pop_buffer_state + + #define yyensure_buffer_stack glcpp_ensure_buffer_stack + + #define yylex glcpp_lex + + #define yyrestart glcpp_restart + + #define yylex_init glcpp_lex_init + + #define yylex_init_extra glcpp_lex_init_extra + + #define yylex_destroy glcpp_lex_destroy + + #define yyget_debug glcpp_get_debug + + #define yyset_debug glcpp_set_debug + + #define yyget_extra glcpp_get_extra + + #define yyset_extra glcpp_set_extra + + #define yyget_in glcpp_get_in + + #define yyset_in glcpp_set_in + + #define yyget_out glcpp_get_out + + #define yyset_out glcpp_set_out + + #define yyget_leng glcpp_get_leng + + #define yyget_text glcpp_get_text + + #define yyget_lineno glcpp_get_lineno + + #define yyset_lineno glcpp_set_lineno + + #define yyget_column glcpp_get_column + + #define yyset_column glcpp_set_column + + #define yywrap glcpp_wrap + + #define yyget_lval glcpp_get_lval + + #define yyset_lval glcpp_set_lval + + #define yyget_lloc glcpp_get_lloc + + #define yyset_lloc glcpp_set_lloc + + #define yyalloc glcpp_alloc + + #define yyrealloc glcpp_realloc + + #define yyfree glcpp_free + /* First, we deal with platform-specific or compiler-specific issues. */ /* begin standard C headers. */ @@ -100,12 +178,10 @@ /* Returned upon end-of-file. */ #define YY_NULL 0 -/* Promotes a possibly negative, possibly signed char to an unsigned - * integer for use as an array index. If the signed char is negative, - * we want to instead treat it as an 8-bit unsigned char, hence the - * double cast. +/* Promotes a possibly negative, possibly signed char to an + * integer in range [0..255] for use as an array index. */ -#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c) +#define YY_SC_TO_UI(c) ((YY_CHAR) (c)) /* An opaque pointer. */ #ifndef YY_TYPEDEF_YY_SCANNER_T @@ -129,20 +205,16 @@ * definition of BEGIN. */ #define BEGIN yyg->yy_start = 1 + 2 * - /* Translate the current start state into a value that can be later handed * to BEGIN to return to the state. The YYSTATE alias is for lex * compatibility. */ #define YY_START ((yyg->yy_start - 1) / 2) #define YYSTATE YY_START - /* Action number for EOF rule of a given start state. */ #define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1) - /* Special action meaning "start processing a new file". */ #define YY_NEW_FILE glcpp_restart(yyin ,yyscanner ) - #define YY_END_OF_BUFFER_CHAR 0 /* Size of default input buffer. */ @@ -175,7 +247,7 @@ #define EOB_ACT_CONTINUE_SCAN 0 #define EOB_ACT_END_OF_FILE 1 #define EOB_ACT_LAST_MATCH 2 - + #define YY_LESS_LINENO(n) #define YY_LINENO_REWIND_TO(ptr) @@ -192,7 +264,6 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ \ } \ while ( 0 ) - #define unput(c) yyunput( c, yyg->yytext_ptr , yyscanner ) #ifndef YY_STRUCT_YY_BUFFER_STATE @@ -235,7 +306,7 @@ int yy_bs_lineno; /**< The line count. */ int yy_bs_column; /**< The column count. */ - + /* Whether to try to fill the input buffer when we reach the * end of it. */ @@ -269,36 +340,33 @@ #define YY_CURRENT_BUFFER ( yyg->yy_buffer_stack \ ? yyg->yy_buffer_stack[yyg->yy_buffer_stack_top] \ : NULL) - /* Same as previous macro, but useful when we know that the buffer stack is not * NULL or when we need an lvalue. For internal use only. */ #define YY_CURRENT_BUFFER_LVALUE yyg->yy_buffer_stack[yyg->yy_buffer_stack_top] -void glcpp_restart (FILE *input_file ,yyscan_t yyscanner ); -void glcpp__switch_to_buffer (YY_BUFFER_STATE new_buffer ,yyscan_t yyscanner ); -YY_BUFFER_STATE glcpp__create_buffer (FILE *file,int size ,yyscan_t yyscanner ); -void glcpp__delete_buffer (YY_BUFFER_STATE b ,yyscan_t yyscanner ); -void glcpp__flush_buffer (YY_BUFFER_STATE b ,yyscan_t yyscanner ); -void glcpp_push_buffer_state (YY_BUFFER_STATE new_buffer ,yyscan_t yyscanner ); -void glcpp_pop_buffer_state (yyscan_t yyscanner ); - -static void glcpp_ensure_buffer_stack (yyscan_t yyscanner ); -static void glcpp__load_buffer_state (yyscan_t yyscanner ); -static void glcpp__init_buffer (YY_BUFFER_STATE b,FILE *file ,yyscan_t yyscanner ); - +void glcpp_restart ( FILE *input_file , yyscan_t yyscanner ); +void glcpp__switch_to_buffer ( YY_BUFFER_STATE new_buffer , yyscan_t yyscanner ); +YY_BUFFER_STATE glcpp__create_buffer ( FILE *file, int size , yyscan_t yyscanner ); +void glcpp__delete_buffer ( YY_BUFFER_STATE b , yyscan_t yyscanner ); +void glcpp__flush_buffer ( YY_BUFFER_STATE b , yyscan_t yyscanner ); +void glcpp_push_buffer_state ( YY_BUFFER_STATE new_buffer , yyscan_t yyscanner ); +void glcpp_pop_buffer_state ( yyscan_t yyscanner ); + +static void glcpp_ensure_buffer_stack ( yyscan_t yyscanner ); +static void glcpp__load_buffer_state ( yyscan_t yyscanner ); +static void glcpp__init_buffer ( YY_BUFFER_STATE b, FILE *file , yyscan_t yyscanner ); #define YY_FLUSH_BUFFER glcpp__flush_buffer(YY_CURRENT_BUFFER ,yyscanner) -YY_BUFFER_STATE glcpp__scan_buffer (char *base,yy_size_t size ,yyscan_t yyscanner ); -YY_BUFFER_STATE glcpp__scan_string (yyconst char *yy_str ,yyscan_t yyscanner ); -YY_BUFFER_STATE glcpp__scan_bytes (yyconst char *bytes,int len ,yyscan_t yyscanner ); - -void *glcpp_alloc (yy_size_t ,yyscan_t yyscanner ); -void *glcpp_realloc (void *,yy_size_t ,yyscan_t yyscanner ); -void glcpp_free (void * ,yyscan_t yyscanner ); +YY_BUFFER_STATE glcpp__scan_buffer ( char *base, yy_size_t size , yyscan_t yyscanner ); +YY_BUFFER_STATE glcpp__scan_string ( const char *yy_str , yyscan_t yyscanner ); +YY_BUFFER_STATE glcpp__scan_bytes ( const char *bytes, int len , yyscan_t yyscanner ); + +void *glcpp_alloc ( yy_size_t , yyscan_t yyscanner ); +void *glcpp_realloc ( void *, yy_size_t , yyscan_t yyscanner ); +void glcpp_free ( void * , yyscan_t yyscanner ); #define yy_new_buffer glcpp__create_buffer - #define yy_set_interactive(is_interactive) \ { \ if ( ! YY_CURRENT_BUFFER ){ \ @@ -308,7 +376,6 @@ } \ YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \ } - #define yy_set_bol(at_bol) \ { \ if ( ! YY_CURRENT_BUFFER ){\ @@ -318,24 +385,22 @@ } \ YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \ } - #define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol) /* Begin user sect3 */ #define glcpp_wrap(yyscanner) (/*CONSTCOND*/1) #define YY_SKIP_YYWRAP - -typedef unsigned char YY_CHAR; +typedef flex_uint8_t YY_CHAR; typedef int yy_state_type; #define yytext_ptr yytext_r -static yy_state_type yy_get_previous_state (yyscan_t yyscanner ); -static yy_state_type yy_try_NUL_trans (yy_state_type current_state ,yyscan_t yyscanner); -static int yy_get_next_buffer (yyscan_t yyscanner ); -static void yynoreturn yy_fatal_error (yyconst char* msg ,yyscan_t yyscanner ); +static yy_state_type yy_get_previous_state ( yyscan_t yyscanner ); +static yy_state_type yy_try_NUL_trans ( yy_state_type current_state , yyscan_t yyscanner); +static int yy_get_next_buffer ( yyscan_t yyscanner ); +static void yynoreturn yy_fatal_error ( const char* msg , yyscan_t yyscanner ); /* Done after the current pattern has been matched and before the * corresponding action - sets up yytext. @@ -346,7 +411,6 @@ yyg->yy_hold_char = *yy_cp; \ *yy_cp = '\0'; \ yyg->yy_c_buf_p = yy_cp; - #define YY_NUM_RULES 52 #define YY_END_OF_BUFFER 53 /* This struct is not used in this scanner, @@ -356,13 +420,13 @@ flex_int32_t yy_verify; flex_int32_t yy_nxt; }; -static yyconst flex_int16_t yy_accept[174] = +static const flex_int16_t yy_accept[174] = { 0, 0, 0, 3, 3, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 53, 48, 49, 50, 51, 50, - 47, 8, 47, 47, 47, 47, 47, 47, 31, 30, - 47, 47, 47, 45, 45, 47, 3, 4, 4, 5, - 29, 27, 51, 26, 24, 23, 13, 13, 24, 24, + 0, 0, 0, 0, 53, 48, 49, 50, 50, 47, + 8, 47, 47, 47, 47, 47, 47, 31, 30, 47, + 47, 47, 45, 45, 47, 3, 4, 4, 5, 29, + 27, 51, 26, 51, 24, 23, 13, 13, 24, 24, 24, 24, 24, 24, 24, 24, 48, 50, 38, 43, 39, 41, 42, 46, 2, 1, 46, 31, 46, 31, 46, 30, 30, 33, 35, 37, 36, 34, 45, 45, @@ -379,22 +443,22 @@ 9, 11, 0 } ; -static yyconst YY_CHAR yy_ec[256] = +static const YY_CHAR yy_ec[256] = { 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 3, - 4, 4, 5, 1, 1, 1, 1, 1, 1, 1, + 2, 2, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 2, 6, 1, 7, 1, 8, 9, 1, 10, - 8, 11, 12, 8, 13, 14, 15, 16, 17, 17, - 17, 17, 17, 17, 17, 18, 18, 1, 8, 19, - 20, 21, 1, 1, 22, 22, 22, 22, 23, 22, - 24, 24, 24, 24, 24, 24, 24, 24, 24, 25, - 24, 24, 24, 24, 26, 24, 24, 27, 24, 24, - 8, 1, 8, 8, 24, 1, 28, 22, 22, 29, - - 30, 31, 32, 24, 33, 24, 24, 34, 35, 36, - 37, 38, 24, 39, 40, 41, 42, 43, 24, 44, - 24, 24, 8, 45, 8, 8, 1, 1, 1, 1, + 1, 2, 5, 1, 6, 1, 7, 8, 1, 9, + 7, 10, 11, 7, 12, 13, 14, 15, 16, 16, + 16, 16, 16, 16, 16, 17, 17, 1, 7, 18, + 19, 20, 1, 1, 21, 21, 21, 21, 22, 21, + 23, 23, 23, 23, 23, 23, 23, 23, 23, 24, + 23, 23, 23, 23, 25, 23, 23, 26, 23, 23, + 7, 1, 7, 7, 23, 1, 27, 21, 21, 28, + + 29, 30, 31, 23, 32, 23, 23, 33, 34, 35, + 36, 37, 23, 38, 39, 40, 41, 42, 23, 43, + 23, 23, 7, 44, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, @@ -411,49 +475,49 @@ 1, 1, 1, 1, 1 } ; -static yyconst YY_CHAR yy_meta[46] = +static const YY_CHAR yy_meta[45] = { 0, - 1, 2, 3, 2, 3, 1, 1, 1, 1, 4, - 5, 1, 1, 6, 1, 7, 7, 7, 1, 1, - 1, 7, 7, 7, 7, 7, 7, 7, 8, 7, - 7, 7, 7, 7, 7, 8, 7, 7, 7, 7, - 7, 7, 7, 7, 1 + 1, 2, 3, 3, 1, 1, 1, 1, 4, 5, + 1, 1, 6, 1, 7, 7, 7, 1, 1, 1, + 7, 7, 7, 7, 7, 7, 7, 8, 7, 7, + 7, 7, 7, 7, 8, 7, 7, 7, 7, 7, + 7, 7, 7, 1 } ; -static yyconst flex_uint16_t yy_base[191] = +static const flex_int16_t yy_base[191] = { 0, - 0, 0, 43, 44, 55, 0, 47, 48, 99, 141, - 102, 103, 106, 107, 435, 433, 436, 428, 436, 429, - 411, 423, 436, 420, 416, 414, 99, 107, 169, 198, - 100, 406, 103, 0, 395, 379, 122, 418, 419, 144, - 0, 419, 115, 410, 436, 417, 413, 414, 120, 386, - 114, 384, 381, 374, 376, 381, 409, 436, 436, 436, - 436, 436, 436, 138, 436, 0, 139, 164, 197, 126, - 229, 0, 139, 436, 436, 436, 436, 436, 0, 378, - 436, 131, 403, 404, 436, 186, 401, 402, 197, 436, - 0, 402, 0, 163, 436, 393, 400, 436, 370, 133, - - 371, 360, 357, 169, 361, 368, 366, 355, 0, 146, - 191, 360, 436, 436, 0, 227, 359, 360, 360, 356, - 351, 357, 436, 356, 356, 341, 329, 319, 301, 206, - 304, 297, 0, 436, 297, 288, 276, 280, 268, 261, - 220, 219, 216, 218, 214, 436, 436, 0, 203, 436, - 207, 232, 198, 436, 188, 164, 185, 0, 145, 436, - 251, 124, 0, 155, 117, 227, 259, 436, 138, 85, - 111, 234, 436, 264, 272, 280, 283, 285, 293, 301, - 309, 317, 322, 330, 338, 346, 354, 362, 368, 376 + 0, 0, 42, 44, 54, 0, 46, 96, 99, 140, + 101, 103, 105, 107, 429, 427, 430, 423, 423, 406, + 418, 430, 415, 411, 409, 99, 107, 168, 197, 100, + 401, 103, 0, 390, 374, 121, 413, 413, 135, 0, + 413, 116, 405, 430, 430, 411, 408, 408, 119, 381, + 113, 379, 376, 369, 371, 376, 403, 430, 430, 430, + 430, 430, 430, 128, 430, 0, 137, 163, 196, 123, + 228, 0, 151, 430, 430, 430, 430, 430, 0, 373, + 430, 167, 398, 398, 430, 192, 396, 396, 213, 430, + 0, 396, 0, 395, 430, 374, 371, 430, 331, 121, + + 325, 314, 305, 163, 305, 312, 296, 285, 0, 160, + 235, 278, 430, 430, 0, 273, 242, 243, 243, 239, + 234, 240, 430, 239, 239, 237, 234, 235, 224, 164, + 227, 226, 0, 430, 229, 216, 218, 222, 222, 246, + 208, 211, 200, 202, 195, 430, 430, 0, 176, 430, + 180, 201, 162, 430, 131, 136, 156, 0, 123, 430, + 226, 112, 0, 135, 84, 183, 233, 430, 110, 18, + 49, 196, 430, 276, 284, 292, 295, 297, 305, 313, + 321, 329, 334, 342, 350, 358, 366, 374, 380, 388 } ; -static yyconst flex_int16_t yy_def[191] = +static const flex_int16_t yy_def[191] = { 0, 173, 1, 174, 174, 173, 5, 175, 175, 176, 176, 175, 175, 175, 175, 173, 173, 173, 173, 173, 173, - 173, 173, 173, 173, 173, 173, 173, 173, 177, 177, - 173, 173, 173, 178, 178, 173, 179, 173, 173, 180, - 181, 173, 182, 183, 173, 173, 173, 173, 173, 173, + 173, 173, 173, 173, 173, 173, 173, 177, 177, 173, + 173, 173, 178, 178, 173, 179, 173, 173, 180, 181, + 173, 182, 183, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, - 173, 173, 173, 177, 173, 184, 177, 30, 177, 69, - 69, 30, 69, 173, 173, 173, 173, 173, 178, 178, + 173, 173, 173, 177, 173, 184, 177, 29, 177, 69, + 69, 29, 69, 173, 173, 173, 173, 173, 178, 178, 173, 179, 173, 173, 173, 180, 173, 173, 180, 173, 181, 173, 185, 186, 173, 183, 173, 173, 173, 173, @@ -468,118 +532,116 @@ 173, 173, 173, 173, 173, 173, 173, 173, 173, 173 } ; -static yyconst flex_uint16_t yy_nxt[482] = +static const flex_int16_t yy_nxt[475] = { 0, - 16, 17, 18, 19, 20, 21, 22, 23, 24, 23, - 23, 25, 26, 27, 28, 29, 30, 30, 31, 32, - 33, 34, 34, 34, 34, 34, 34, 34, 35, 34, - 34, 34, 34, 34, 34, 34, 34, 34, 34, 34, - 34, 34, 34, 34, 36, 38, 38, 39, 39, 18, - 18, 20, 20, 40, 40, 41, 42, 18, 19, 20, - 41, 41, 41, 41, 41, 41, 41, 41, 41, 43, - 41, 41, 41, 41, 41, 41, 44, 44, 44, 44, - 44, 44, 44, 44, 44, 44, 44, 44, 44, 44, - 44, 44, 44, 44, 44, 44, 44, 44, 44, 41, - - 46, 47, 19, 48, 18, 18, 20, 20, 18, 18, - 20, 20, 171, 49, 64, 64, 64, 65, 74, 75, - 172, 66, 77, 78, 83, 65, 84, 50, 51, 94, - 65, 52, 53, 83, 66, 84, 54, 173, 173, 171, - 55, 56, 46, 47, 19, 48, 87, 100, 88, 101, - 173, 173, 102, 170, 89, 49, 164, 103, 90, 169, - 69, 69, 69, 69, 109, 118, 109, 69, 69, 50, - 51, 130, 119, 52, 53, 69, 69, 165, 54, 68, - 68, 67, 55, 56, 68, 68, 164, 130, 87, 70, - 88, 69, 163, 69, 70, 71, 173, 124, 69, 87, - - 173, 88, 67, 67, 125, 70, 69, 89, 67, 67, - 70, 90, 71, 72, 72, 72, 130, 173, 173, 69, - 69, 69, 69, 73, 162, 161, 69, 69, 109, 173, - 109, 173, 130, 152, 69, 69, 173, 160, 173, 73, - 173, 173, 159, 157, 110, 110, 110, 156, 155, 154, - 110, 111, 167, 168, 153, 168, 110, 110, 111, 110, - 167, 168, 152, 168, 37, 37, 37, 37, 37, 37, - 37, 37, 19, 19, 19, 19, 19, 19, 19, 19, - 45, 45, 45, 45, 45, 45, 45, 45, 67, 67, - 67, 79, 79, 82, 82, 82, 82, 151, 82, 82, - - 82, 86, 86, 86, 86, 86, 86, 86, 86, 91, - 150, 149, 91, 91, 91, 91, 91, 93, 93, 93, - 93, 93, 93, 93, 93, 96, 148, 147, 96, 96, - 109, 109, 145, 109, 109, 109, 109, 109, 115, 144, - 143, 115, 115, 115, 115, 115, 116, 116, 142, 116, - 116, 116, 116, 116, 123, 123, 123, 123, 123, 123, - 141, 123, 146, 146, 146, 146, 146, 146, 158, 158, - 140, 158, 158, 158, 158, 158, 166, 166, 166, 166, - 166, 166, 166, 166, 139, 138, 137, 136, 135, 134, - 133, 132, 131, 129, 128, 127, 126, 122, 121, 120, - - 117, 97, 95, 92, 114, 114, 113, 113, 112, 57, - 108, 107, 106, 105, 104, 99, 98, 98, 97, 95, - 92, 85, 85, 81, 80, 76, 63, 62, 61, 60, - 59, 58, 58, 57, 173, 15, 173, 173, 173, 173, + 16, 17, 18, 19, 20, 21, 22, 23, 22, 22, + 24, 25, 26, 27, 28, 29, 29, 30, 31, 32, + 33, 33, 33, 33, 33, 33, 33, 34, 33, 33, + 33, 33, 33, 33, 33, 33, 33, 33, 33, 33, + 33, 33, 33, 35, 37, 38, 37, 38, 18, 19, + 171, 39, 172, 39, 40, 41, 18, 19, 40, 40, + 40, 40, 40, 40, 40, 40, 40, 42, 40, 40, + 40, 40, 40, 40, 43, 43, 43, 43, 43, 43, + 43, 43, 43, 43, 43, 43, 43, 43, 43, 43, + 43, 43, 43, 43, 43, 43, 43, 40, 18, 19, + + 46, 47, 48, 18, 19, 18, 19, 18, 19, 18, + 19, 171, 49, 64, 64, 64, 65, 74, 75, 170, + 66, 77, 78, 83, 84, 65, 50, 51, 65, 94, + 52, 53, 66, 173, 173, 54, 164, 87, 88, 55, + 56, 46, 47, 48, 89, 100, 169, 101, 90, 69, + 102, 69, 118, 49, 165, 103, 69, 164, 69, 119, + 69, 173, 173, 163, 69, 69, 162, 50, 51, 83, + 84, 52, 53, 69, 173, 173, 54, 68, 68, 67, + 55, 56, 68, 68, 130, 173, 173, 70, 161, 69, + 124, 69, 70, 71, 87, 88, 69, 125, 173, 173, + + 130, 173, 152, 70, 69, 173, 67, 67, 70, 160, + 71, 72, 72, 72, 159, 87, 88, 69, 69, 69, + 69, 73, 89, 157, 69, 69, 90, 167, 168, 168, + 156, 155, 69, 69, 167, 168, 168, 73, 173, 173, + 154, 153, 110, 110, 110, 67, 67, 152, 110, 111, + 151, 150, 149, 148, 110, 110, 111, 110, 147, 130, + 145, 144, 143, 142, 141, 140, 139, 138, 137, 136, + 135, 134, 133, 132, 109, 130, 36, 36, 36, 36, + 36, 36, 36, 36, 44, 44, 44, 44, 44, 44, + 44, 44, 45, 45, 45, 45, 45, 45, 45, 45, + + 67, 67, 67, 79, 79, 82, 82, 82, 82, 131, + 82, 82, 82, 86, 86, 86, 86, 86, 86, 86, + 86, 91, 129, 128, 91, 91, 91, 91, 91, 93, + 93, 93, 93, 93, 93, 93, 93, 96, 127, 126, + 96, 96, 109, 109, 122, 109, 109, 109, 109, 109, + 115, 121, 120, 115, 115, 115, 115, 115, 116, 116, + 117, 116, 116, 116, 116, 116, 123, 123, 123, 123, + 123, 123, 97, 123, 146, 146, 146, 146, 146, 146, + 158, 158, 95, 158, 158, 158, 158, 158, 166, 166, + 166, 166, 166, 166, 166, 166, 109, 92, 114, 114, + + 113, 113, 112, 57, 108, 107, 106, 105, 104, 99, + 98, 98, 97, 95, 92, 85, 85, 81, 80, 76, + 63, 62, 61, 60, 59, 58, 58, 57, 173, 15, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, - 173 + 173, 173, 173, 173 } ; -static yyconst flex_int16_t yy_chk[482] = +static const flex_int16_t yy_chk[475] = { 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 3, 4, 3, 4, 7, - 8, 7, 8, 3, 4, 5, 5, 5, 5, 5, - 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, + 1, 1, 1, 1, 3, 3, 4, 4, 7, 7, + 171, 3, 170, 4, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, + 5, 5, 5, 5, 5, 5, 5, 5, 8, 8, - 9, 9, 9, 9, 11, 12, 11, 12, 13, 14, - 13, 14, 171, 9, 27, 27, 27, 28, 31, 31, - 170, 28, 33, 33, 37, 43, 37, 9, 9, 43, - 49, 9, 9, 82, 49, 82, 9, 70, 70, 169, - 9, 9, 10, 10, 10, 10, 40, 51, 40, 51, - 73, 73, 51, 165, 40, 10, 164, 51, 40, 162, - 64, 67, 64, 67, 94, 100, 94, 64, 67, 10, - 10, 110, 100, 10, 10, 64, 67, 159, 10, 68, - 68, 68, 10, 10, 29, 29, 157, 110, 86, 68, - 86, 29, 156, 29, 29, 29, 86, 104, 29, 89, - - 86, 89, 111, 111, 104, 68, 29, 89, 69, 69, - 29, 89, 29, 30, 30, 30, 111, 130, 130, 69, - 30, 69, 30, 30, 155, 153, 69, 30, 116, 166, - 116, 166, 111, 152, 69, 30, 172, 151, 172, 30, - 71, 71, 149, 145, 71, 71, 71, 144, 143, 142, - 71, 71, 161, 161, 141, 161, 71, 71, 71, 71, - 167, 167, 140, 167, 174, 174, 174, 174, 174, 174, - 174, 174, 175, 175, 175, 175, 175, 175, 175, 175, - 176, 176, 176, 176, 176, 176, 176, 176, 177, 177, - 177, 178, 178, 179, 179, 179, 179, 139, 179, 179, - - 179, 180, 180, 180, 180, 180, 180, 180, 180, 181, - 138, 137, 181, 181, 181, 181, 181, 182, 182, 182, - 182, 182, 182, 182, 182, 183, 136, 135, 183, 183, - 184, 184, 132, 184, 184, 184, 184, 184, 185, 131, - 129, 185, 185, 185, 185, 185, 186, 186, 128, 186, - 186, 186, 186, 186, 187, 187, 187, 187, 187, 187, - 127, 187, 188, 188, 188, 188, 188, 188, 189, 189, - 126, 189, 189, 189, 189, 189, 190, 190, 190, 190, - 190, 190, 190, 190, 125, 124, 122, 121, 120, 119, - 118, 117, 112, 108, 107, 106, 105, 103, 102, 101, - - 99, 97, 96, 92, 88, 87, 84, 83, 80, 57, - 56, 55, 54, 53, 52, 50, 48, 47, 46, 44, - 42, 39, 38, 36, 35, 32, 26, 25, 24, 22, - 21, 20, 18, 16, 15, 173, 173, 173, 173, 173, + 9, 9, 9, 11, 11, 12, 12, 13, 13, 14, + 14, 169, 9, 26, 26, 26, 27, 30, 30, 165, + 27, 32, 32, 36, 36, 42, 9, 9, 49, 42, + 9, 9, 49, 70, 70, 9, 164, 39, 39, 9, + 9, 10, 10, 10, 39, 51, 162, 51, 39, 64, + 51, 64, 100, 10, 159, 51, 64, 157, 67, 100, + 67, 73, 73, 156, 64, 67, 155, 10, 10, 82, + 82, 10, 10, 67, 130, 130, 10, 68, 68, 68, + 10, 10, 28, 28, 110, 166, 166, 68, 153, 28, + 104, 28, 28, 28, 86, 86, 28, 104, 172, 172, + + 110, 86, 152, 68, 28, 86, 69, 69, 28, 151, + 28, 29, 29, 29, 149, 89, 89, 69, 29, 69, + 29, 29, 89, 145, 69, 29, 89, 161, 161, 161, + 144, 143, 69, 29, 167, 167, 167, 29, 71, 71, + 142, 141, 71, 71, 71, 111, 111, 140, 71, 71, + 139, 138, 137, 136, 71, 71, 71, 71, 135, 111, + 132, 131, 129, 128, 127, 126, 125, 124, 122, 121, + 120, 119, 118, 117, 116, 111, 174, 174, 174, 174, + 174, 174, 174, 174, 175, 175, 175, 175, 175, 175, + 175, 175, 176, 176, 176, 176, 176, 176, 176, 176, + + 177, 177, 177, 178, 178, 179, 179, 179, 179, 112, + 179, 179, 179, 180, 180, 180, 180, 180, 180, 180, + 180, 181, 108, 107, 181, 181, 181, 181, 181, 182, + 182, 182, 182, 182, 182, 182, 182, 183, 106, 105, + 183, 183, 184, 184, 103, 184, 184, 184, 184, 184, + 185, 102, 101, 185, 185, 185, 185, 185, 186, 186, + 99, 186, 186, 186, 186, 186, 187, 187, 187, 187, + 187, 187, 97, 187, 188, 188, 188, 188, 188, 188, + 189, 189, 96, 189, 189, 189, 189, 189, 190, 190, + 190, 190, 190, 190, 190, 190, 94, 92, 88, 87, + + 84, 83, 80, 57, 56, 55, 54, 53, 52, 50, + 48, 47, 46, 43, 41, 38, 37, 35, 34, 31, + 25, 24, 23, 21, 20, 19, 18, 16, 15, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, 173, - 173 + 173, 173, 173, 173 } ; /* The intent behind this definition is that it'll catch @@ -589,8 +651,8 @@ #define yymore() yymore_used_but_not_detected #define YY_MORE_ADJ 0 #define YY_RESTORE_YY_MORE_OFFSET -#line 1 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" -#line 2 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 1 "./glsl/glcpp/glcpp-lex.l" +#line 2 "./glsl/glcpp/glcpp-lex.l" /* * Copyright © 2010 Intel Corporation * @@ -693,7 +755,7 @@ #define RETURN_STRING_TOKEN(token) \ do { \ if (! parser->skipping) { \ - yylval->str = ralloc_strdup (yyextra, yytext); \ + yylval->str = linear_strdup(yyextra->linalloc, yytext); \ RETURN_TOKEN_NEVER_SKIP (token); \ } \ } while(0) @@ -750,9 +812,11 @@ } -/* Note: When adding any start conditions to this list, you must also -* update the "Internal compiler error" catch-all rule near the end of -* this file. */ +#line 815 "glsl/glcpp/glcpp-lex.c" +#line 171 "./glsl/glcpp/glcpp-lex.l" + /* Note: When adding any start conditions to this list, you must also + * update the "Internal compiler error" catch-all rule near the end of + * this file. */ /* The OTHER class is simply a catch-all for things that the CPP parser just doesn't care about. Since flex regular expressions that @@ -760,7 +824,7 @@ strings, we have to be careful to avoid OTHER matching and hiding something that CPP does care about. So we simply exclude all characters that appear in any other expressions. */ -#line 764 "glsl/glcpp/glcpp-lex.c" +#line 827 "glsl/glcpp/glcpp-lex.c" #define INITIAL 0 #define COMMENT 1 @@ -818,7 +882,7 @@ }; /* end struct yyguts_t */ -static int yy_init_globals (yyscan_t yyscanner ); +static int yy_init_globals ( yyscan_t yyscanner ); /* This must go here because YYSTYPE and YYLTYPE are included * from bison output in section 1.*/ @@ -828,48 +892,48 @@ int glcpp_lex_init (yyscan_t* scanner); -int glcpp_lex_init_extra (YY_EXTRA_TYPE user_defined,yyscan_t* scanner); +int glcpp_lex_init_extra ( YY_EXTRA_TYPE user_defined, yyscan_t* scanner); /* Accessor methods to globals. These are made visible to non-reentrant scanners for convenience. */ -int glcpp_lex_destroy (yyscan_t yyscanner ); +int glcpp_lex_destroy ( yyscan_t yyscanner ); -int glcpp_get_debug (yyscan_t yyscanner ); +int glcpp_get_debug ( yyscan_t yyscanner ); -void glcpp_set_debug (int debug_flag ,yyscan_t yyscanner ); +void glcpp_set_debug ( int debug_flag , yyscan_t yyscanner ); -YY_EXTRA_TYPE glcpp_get_extra (yyscan_t yyscanner ); +YY_EXTRA_TYPE glcpp_get_extra ( yyscan_t yyscanner ); -void glcpp_set_extra (YY_EXTRA_TYPE user_defined ,yyscan_t yyscanner ); +void glcpp_set_extra ( YY_EXTRA_TYPE user_defined , yyscan_t yyscanner ); -FILE *glcpp_get_in (yyscan_t yyscanner ); +FILE *glcpp_get_in ( yyscan_t yyscanner ); -void glcpp_set_in (FILE * _in_str ,yyscan_t yyscanner ); +void glcpp_set_in ( FILE * _in_str , yyscan_t yyscanner ); -FILE *glcpp_get_out (yyscan_t yyscanner ); +FILE *glcpp_get_out ( yyscan_t yyscanner ); -void glcpp_set_out (FILE * _out_str ,yyscan_t yyscanner ); +void glcpp_set_out ( FILE * _out_str , yyscan_t yyscanner ); - int glcpp_get_leng (yyscan_t yyscanner ); + int glcpp_get_leng ( yyscan_t yyscanner ); -char *glcpp_get_text (yyscan_t yyscanner ); +char *glcpp_get_text ( yyscan_t yyscanner ); -int glcpp_get_lineno (yyscan_t yyscanner ); +int glcpp_get_lineno ( yyscan_t yyscanner ); -void glcpp_set_lineno (int _line_number ,yyscan_t yyscanner ); +void glcpp_set_lineno ( int _line_number , yyscan_t yyscanner ); -int glcpp_get_column (yyscan_t yyscanner ); +int glcpp_get_column ( yyscan_t yyscanner ); -void glcpp_set_column (int _column_no ,yyscan_t yyscanner ); +void glcpp_set_column ( int _column_no , yyscan_t yyscanner ); -YYSTYPE * glcpp_get_lval (yyscan_t yyscanner ); +YYSTYPE * glcpp_get_lval ( yyscan_t yyscanner ); -void glcpp_set_lval (YYSTYPE * yylval_param ,yyscan_t yyscanner ); +void glcpp_set_lval ( YYSTYPE * yylval_param , yyscan_t yyscanner ); - YYLTYPE *glcpp_get_lloc (yyscan_t yyscanner ); + YYLTYPE *glcpp_get_lloc ( yyscan_t yyscanner ); - void glcpp_set_lloc (YYLTYPE * yylloc_param ,yyscan_t yyscanner ); + void glcpp_set_lloc ( YYLTYPE * yylloc_param , yyscan_t yyscanner ); /* Macros after this point can all be overridden by user definitions in * section 1. @@ -877,41 +941,40 @@ #ifndef YY_SKIP_YYWRAP #ifdef __cplusplus -extern "C" int glcpp_wrap (yyscan_t yyscanner ); +extern "C" int glcpp_wrap ( yyscan_t yyscanner ); #else -extern int glcpp_wrap (yyscan_t yyscanner ); +extern int glcpp_wrap ( yyscan_t yyscanner ); #endif #endif #ifndef YY_NO_UNPUT - static void yyunput (int c,char *buf_ptr ,yyscan_t yyscanner); + static void yyunput ( int c, char *buf_ptr , yyscan_t yyscanner); #endif #ifndef yytext_ptr -static void yy_flex_strncpy (char *,yyconst char *,int ,yyscan_t yyscanner); +static void yy_flex_strncpy ( char *, const char *, int , yyscan_t yyscanner); #endif #ifdef YY_NEED_STRLEN -static int yy_flex_strlen (yyconst char * ,yyscan_t yyscanner); +static int yy_flex_strlen ( const char * , yyscan_t yyscanner); #endif #ifndef YY_NO_INPUT - #ifdef __cplusplus -static int yyinput (yyscan_t yyscanner ); +static int yyinput ( yyscan_t yyscanner ); #else -static int input (yyscan_t yyscanner ); +static int input ( yyscan_t yyscanner ); #endif #endif - static void yy_push_state (int _new_state ,yyscan_t yyscanner); + static void yy_push_state ( int _new_state , yyscan_t yyscanner); - static void yy_pop_state (yyscan_t yyscanner ); + static void yy_pop_state ( yyscan_t yyscanner ); - static int yy_top_state (yyscan_t yyscanner ); + static int yy_top_state ( yyscan_t yyscanner ); /* Amount of stuff to slurp up with each read. */ #ifndef YY_READ_BUF_SIZE @@ -939,7 +1002,7 @@ if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \ { \ int c = '*'; \ - size_t n; \ + int n; \ for ( n = 0; n < max_size && \ (c = getc( yyin )) != EOF && c != '\n'; ++n ) \ buf[n] = (char) c; \ @@ -952,7 +1015,7 @@ else \ { \ errno=0; \ - while ( (result = (int) fread(buf, 1, max_size, yyin))==0 && ferror(yyin)) \ + while ( (result = (int) fread(buf, 1, (yy_size_t) max_size, yyin)) == 0 && ferror(yyin)) \ { \ if( errno != EINTR) \ { \ @@ -994,7 +1057,7 @@ #define YY_DECL_IS_OURS 1 extern int glcpp_lex \ - (YYSTYPE * yylval_param,YYLTYPE * yylloc_param ,yyscan_t yyscanner); + (YYSTYPE * yylval_param, YYLTYPE * yylloc_param , yyscan_t yyscanner); #define YY_DECL int glcpp_lex \ (YYSTYPE * yylval_param, YYLTYPE * yylloc_param , yyscan_t yyscanner) @@ -1055,7 +1118,7 @@ } { -#line 199 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 200 "./glsl/glcpp/glcpp-lex.l" glcpp_parser_t *parser = yyextra; @@ -1116,7 +1179,7 @@ } /* Single-line comments */ -#line 1120 "glsl/glcpp/glcpp-lex.c" +#line 1182 "glsl/glcpp/glcpp-lex.c" while ( /*CONSTCOND*/1 ) /* loops until end-of-file is reached */ { @@ -1144,9 +1207,9 @@ { yy_current_state = (int) yy_def[yy_current_state]; if ( yy_current_state >= 174 ) - yy_c = yy_meta[(unsigned int) yy_c]; + yy_c = yy_meta[yy_c]; } - yy_current_state = yy_nxt[yy_base[yy_current_state] + (flex_int16_t) yy_c]; + yy_current_state = yy_nxt[yy_base[yy_current_state] + yy_c]; ++yy_cp; } while ( yy_current_state != 173 ); @@ -1171,41 +1234,41 @@ case 1: YY_RULE_SETUP -#line 259 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 260 "./glsl/glcpp/glcpp-lex.l" { } YY_BREAK /* Multi-line comments */ case 2: YY_RULE_SETUP -#line 263 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 264 "./glsl/glcpp/glcpp-lex.l" { yy_push_state(COMMENT, yyscanner); } YY_BREAK case 3: YY_RULE_SETUP -#line 264 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 265 "./glsl/glcpp/glcpp-lex.l" YY_BREAK case 4: /* rule 4 can match eol */ YY_RULE_SETUP -#line 265 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 266 "./glsl/glcpp/glcpp-lex.l" { yylineno++; yycolumn = 0; parser->commented_newlines++; } YY_BREAK case 5: YY_RULE_SETUP -#line 266 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 267 "./glsl/glcpp/glcpp-lex.l" YY_BREAK case 6: /* rule 6 can match eol */ YY_RULE_SETUP -#line 267 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 268 "./glsl/glcpp/glcpp-lex.l" { yylineno++; yycolumn = 0; parser->commented_newlines++; } YY_BREAK case 7: YY_RULE_SETUP -#line 268 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 269 "./glsl/glcpp/glcpp-lex.l" { yy_pop_state(yyscanner); /* In the start condition, we don't want any SPACE token. */ @@ -1215,7 +1278,7 @@ YY_BREAK case 8: YY_RULE_SETUP -#line 275 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 276 "./glsl/glcpp/glcpp-lex.l" { /* If the '#' is the first non-whitespace, non-comment token on this @@ -1233,7 +1296,7 @@ YY_BREAK case 9: YY_RULE_SETUP -#line 290 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 291 "./glsl/glcpp/glcpp-lex.l" { BEGIN INITIAL; yyextra->space_tokens = 0; @@ -1256,7 +1319,7 @@ yyg->yy_c_buf_p = yy_cp -= 1; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 305 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 306 "./glsl/glcpp/glcpp-lex.l" { BEGIN INITIAL; } @@ -1265,7 +1328,7 @@ * Simply pass them through to the main compiler's lexer/parser. */ case 11: YY_RULE_SETUP -#line 311 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 312 "./glsl/glcpp/glcpp-lex.l" { BEGIN INITIAL; RETURN_STRING_TOKEN (PRAGMA); @@ -1273,7 +1336,7 @@ YY_BREAK case 12: YY_RULE_SETUP -#line 316 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 317 "./glsl/glcpp/glcpp-lex.l" { BEGIN INITIAL; RETURN_TOKEN (LINE); @@ -1282,7 +1345,7 @@ case 13: /* rule 13 can match eol */ YY_RULE_SETUP -#line 321 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 322 "./glsl/glcpp/glcpp-lex.l" { BEGIN INITIAL; yyextra->space_tokens = 0; @@ -1295,7 +1358,7 @@ * even when we are otherwise skipping. */ case 14: YY_RULE_SETUP -#line 331 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 332 "./glsl/glcpp/glcpp-lex.l" { BEGIN INITIAL; yyextra->lexing_directive = 1; @@ -1305,7 +1368,7 @@ YY_BREAK case 15: YY_RULE_SETUP -#line 338 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 339 "./glsl/glcpp/glcpp-lex.l" { BEGIN INITIAL; yyextra->lexing_directive = 1; @@ -1320,7 +1383,7 @@ yyg->yy_c_buf_p = yy_cp = yy_bp + 2; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 345 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 346 "./glsl/glcpp/glcpp-lex.l" { BEGIN INITIAL; yyextra->lexing_directive = 1; @@ -1335,7 +1398,7 @@ yyg->yy_c_buf_p = yy_cp = yy_bp + 4; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 352 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 353 "./glsl/glcpp/glcpp-lex.l" { BEGIN INITIAL; yyextra->lexing_directive = 1; @@ -1345,7 +1408,7 @@ YY_BREAK case 18: YY_RULE_SETUP -#line 359 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 360 "./glsl/glcpp/glcpp-lex.l" { BEGIN INITIAL; yyextra->space_tokens = 0; @@ -1354,7 +1417,7 @@ YY_BREAK case 19: YY_RULE_SETUP -#line 365 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 366 "./glsl/glcpp/glcpp-lex.l" { BEGIN INITIAL; yyextra->space_tokens = 0; @@ -1363,7 +1426,7 @@ YY_BREAK case 20: YY_RULE_SETUP -#line 371 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 372 "./glsl/glcpp/glcpp-lex.l" { BEGIN INITIAL; RETURN_STRING_TOKEN (ERROR_TOKEN); @@ -1389,7 +1452,7 @@ */ case 21: YY_RULE_SETUP -#line 394 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 395 "./glsl/glcpp/glcpp-lex.l" { if (! parser->skipping) { BEGIN DEFINE; @@ -1400,7 +1463,7 @@ YY_BREAK case 22: YY_RULE_SETUP -#line 402 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 403 "./glsl/glcpp/glcpp-lex.l" { BEGIN INITIAL; yyextra->space_tokens = 0; @@ -1409,7 +1472,7 @@ YY_BREAK case 23: YY_RULE_SETUP -#line 408 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 409 "./glsl/glcpp/glcpp-lex.l" { /* Nothing to do here. Importantly, don't leave the * start condition, since it's legal to have space between the @@ -1419,7 +1482,7 @@ /* This will catch any non-directive garbage after a HASH */ case 24: YY_RULE_SETUP -#line 415 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 416 "./glsl/glcpp/glcpp-lex.l" { BEGIN INITIAL; RETURN_TOKEN (GARBAGE); @@ -1431,7 +1494,7 @@ yyg->yy_c_buf_p = yy_cp -= 1; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 421 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 422 "./glsl/glcpp/glcpp-lex.l" { BEGIN INITIAL; RETURN_STRING_TOKEN (FUNC_IDENTIFIER); @@ -1440,7 +1503,7 @@ /* An identifier not immediately followed by '(' */ case 26: YY_RULE_SETUP -#line 427 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 428 "./glsl/glcpp/glcpp-lex.l" { BEGIN INITIAL; RETURN_STRING_TOKEN (OBJ_IDENTIFIER); @@ -1449,7 +1512,7 @@ /* Whitespace */ case 27: YY_RULE_SETUP -#line 433 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 434 "./glsl/glcpp/glcpp-lex.l" { /* Just ignore it. Nothing to do here. */ } @@ -1458,7 +1521,7 @@ case 28: /* rule 28 can match eol */ YY_RULE_SETUP -#line 438 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 439 "./glsl/glcpp/glcpp-lex.l" { BEGIN INITIAL; glcpp_error(yylloc, yyextra, "#define followed by a non-identifier: %s", yytext); @@ -1469,7 +1532,7 @@ * space. This is an error. */ case 29: YY_RULE_SETUP -#line 446 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 447 "./glsl/glcpp/glcpp-lex.l" { BEGIN INITIAL; glcpp_error(yylloc, yyextra, "#define followed by a non-identifier: %s", yytext); @@ -1478,98 +1541,98 @@ YY_BREAK case 30: YY_RULE_SETUP -#line 452 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 453 "./glsl/glcpp/glcpp-lex.l" { RETURN_STRING_TOKEN (INTEGER_STRING); } YY_BREAK case 31: YY_RULE_SETUP -#line 456 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 457 "./glsl/glcpp/glcpp-lex.l" { RETURN_STRING_TOKEN (INTEGER_STRING); } YY_BREAK case 32: YY_RULE_SETUP -#line 460 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 461 "./glsl/glcpp/glcpp-lex.l" { RETURN_STRING_TOKEN (INTEGER_STRING); } YY_BREAK case 33: YY_RULE_SETUP -#line 464 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 465 "./glsl/glcpp/glcpp-lex.l" { RETURN_TOKEN (LEFT_SHIFT); } YY_BREAK case 34: YY_RULE_SETUP -#line 468 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 469 "./glsl/glcpp/glcpp-lex.l" { RETURN_TOKEN (RIGHT_SHIFT); } YY_BREAK case 35: YY_RULE_SETUP -#line 472 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 473 "./glsl/glcpp/glcpp-lex.l" { RETURN_TOKEN (LESS_OR_EQUAL); } YY_BREAK case 36: YY_RULE_SETUP -#line 476 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 477 "./glsl/glcpp/glcpp-lex.l" { RETURN_TOKEN (GREATER_OR_EQUAL); } YY_BREAK case 37: YY_RULE_SETUP -#line 480 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 481 "./glsl/glcpp/glcpp-lex.l" { RETURN_TOKEN (EQUAL); } YY_BREAK case 38: YY_RULE_SETUP -#line 484 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 485 "./glsl/glcpp/glcpp-lex.l" { RETURN_TOKEN (NOT_EQUAL); } YY_BREAK case 39: YY_RULE_SETUP -#line 488 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 489 "./glsl/glcpp/glcpp-lex.l" { RETURN_TOKEN (AND); } YY_BREAK case 40: YY_RULE_SETUP -#line 492 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 493 "./glsl/glcpp/glcpp-lex.l" { RETURN_TOKEN (OR); } YY_BREAK case 41: YY_RULE_SETUP -#line 496 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 497 "./glsl/glcpp/glcpp-lex.l" { RETURN_TOKEN (PLUS_PLUS); } YY_BREAK case 42: YY_RULE_SETUP -#line 500 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 501 "./glsl/glcpp/glcpp-lex.l" { RETURN_TOKEN (MINUS_MINUS); } YY_BREAK case 43: YY_RULE_SETUP -#line 504 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 505 "./glsl/glcpp/glcpp-lex.l" { if (! parser->skipping) { if (parser->is_gles) @@ -1580,42 +1643,42 @@ YY_BREAK case 44: YY_RULE_SETUP -#line 512 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 513 "./glsl/glcpp/glcpp-lex.l" { RETURN_TOKEN (DEFINED); } YY_BREAK case 45: YY_RULE_SETUP -#line 516 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 517 "./glsl/glcpp/glcpp-lex.l" { RETURN_STRING_TOKEN (IDENTIFIER); } YY_BREAK case 46: YY_RULE_SETUP -#line 520 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 521 "./glsl/glcpp/glcpp-lex.l" { RETURN_STRING_TOKEN (OTHER); } YY_BREAK case 47: YY_RULE_SETUP -#line 524 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 525 "./glsl/glcpp/glcpp-lex.l" { RETURN_TOKEN (yytext[0]); } YY_BREAK case 48: YY_RULE_SETUP -#line 528 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 529 "./glsl/glcpp/glcpp-lex.l" { RETURN_STRING_TOKEN (OTHER); } YY_BREAK case 49: YY_RULE_SETUP -#line 532 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 533 "./glsl/glcpp/glcpp-lex.l" { if (yyextra->space_tokens) { RETURN_TOKEN (SPACE); @@ -1627,7 +1690,7 @@ case 50: /* rule 50 can match eol */ YY_RULE_SETUP -#line 540 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 541 "./glsl/glcpp/glcpp-lex.l" { if (parser->commented_newlines) { BEGIN NEWLINE_CATCHUP; @@ -1646,7 +1709,7 @@ case YY_STATE_EOF(COMMENT): case YY_STATE_EOF(DEFINE): case YY_STATE_EOF(HASH): -#line 554 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 555 "./glsl/glcpp/glcpp-lex.l" { if (YY_START == COMMENT) glcpp_error(yylloc, yyextra, "Unterminated comment"); @@ -1663,7 +1726,7 @@ * of the preceding patterns to match that input. */ case 51: YY_RULE_SETUP -#line 569 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 570 "./glsl/glcpp/glcpp-lex.l" { glcpp_error(yylloc, yyextra, "Internal compiler error: Unexpected character: %s", yytext); @@ -1679,10 +1742,10 @@ YY_BREAK case 52: YY_RULE_SETUP -#line 582 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" +#line 583 "./glsl/glcpp/glcpp-lex.l" YY_FATAL_ERROR( "flex scanner jammed" ); YY_BREAK -#line 1686 "glsl/glcpp/glcpp-lex.c" +#line 1748 "glsl/glcpp/glcpp-lex.c" case YY_STATE_EOF(DONE): case YY_STATE_EOF(NEWLINE_CATCHUP): case YY_STATE_EOF(UNREACHABLE): @@ -1831,7 +1894,7 @@ struct yyguts_t * yyg = (struct yyguts_t*)yyscanner; char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf; char *source = yyg->yytext_ptr; - yy_size_t number_to_move, i; + int number_to_move, i; int ret_val; if ( yyg->yy_c_buf_p > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[yyg->yy_n_chars + 1] ) @@ -1860,7 +1923,7 @@ /* Try to read more data. */ /* First move last chars to start of buffer. */ - number_to_move = (yy_size_t) (yyg->yy_c_buf_p - yyg->yytext_ptr) - 1; + number_to_move = (int) (yyg->yy_c_buf_p - yyg->yytext_ptr - 1); for ( i = 0; i < number_to_move; ++i ) *(dest++) = *(source++); @@ -1896,7 +1959,7 @@ b->yy_ch_buf = (char *) /* Include room in for 2 EOB chars. */ - glcpp_realloc((void *) b->yy_ch_buf,b->yy_buf_size + 2 ,yyscanner ); + glcpp_realloc((void *) b->yy_ch_buf,(yy_size_t) (b->yy_buf_size + 2) ,yyscanner ); } else /* Can't grow it, we don't own it. */ @@ -1942,10 +2005,10 @@ else ret_val = EOB_ACT_CONTINUE_SCAN; - if ((int) (yyg->yy_n_chars + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) { + if ((yyg->yy_n_chars + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) { /* Extend the array by 50%, plus the number we really need. */ int new_size = yyg->yy_n_chars + number_to_move + (yyg->yy_n_chars >> 1); - YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) glcpp_realloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size ,yyscanner ); + YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) glcpp_realloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,(yy_size_t) new_size ,yyscanner ); if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" ); } @@ -1981,9 +2044,9 @@ { yy_current_state = (int) yy_def[yy_current_state]; if ( yy_current_state >= 174 ) - yy_c = yy_meta[(unsigned int) yy_c]; + yy_c = yy_meta[yy_c]; } - yy_current_state = yy_nxt[yy_base[yy_current_state] + (flex_int16_t) yy_c]; + yy_current_state = yy_nxt[yy_base[yy_current_state] + yy_c]; } return yy_current_state; @@ -2010,9 +2073,9 @@ { yy_current_state = (int) yy_def[yy_current_state]; if ( yy_current_state >= 174 ) - yy_c = yy_meta[(unsigned int) yy_c]; + yy_c = yy_meta[yy_c]; } - yy_current_state = yy_nxt[yy_base[yy_current_state] + (flex_int16_t) yy_c]; + yy_current_state = yy_nxt[yy_base[yy_current_state] + yy_c]; yy_is_jam = (yy_current_state == 173); (void)yyg; @@ -2086,7 +2149,7 @@ else { /* need more input */ - int offset = yyg->yy_c_buf_p - yyg->yytext_ptr; + int offset = (int) (yyg->yy_c_buf_p - yyg->yytext_ptr); ++yyg->yy_c_buf_p; switch ( yy_get_next_buffer( yyscanner ) ) @@ -2214,12 +2277,12 @@ if ( ! b ) YY_FATAL_ERROR( "out of dynamic memory in glcpp__create_buffer()" ); - b->yy_buf_size = (yy_size_t)size; + b->yy_buf_size = size; /* yy_ch_buf has to be 2 characters longer than the size given because * we need to put in 2 end-of-buffer characters. */ - b->yy_ch_buf = (char *) glcpp_alloc(b->yy_buf_size + 2 ,yyscanner ); + b->yy_ch_buf = (char *) glcpp_alloc((yy_size_t) (b->yy_buf_size + 2) ,yyscanner ); if ( ! b->yy_ch_buf ) YY_FATAL_ERROR( "out of dynamic memory in glcpp__create_buffer()" ); @@ -2366,7 +2429,7 @@ */ static void glcpp_ensure_buffer_stack (yyscan_t yyscanner) { - int num_to_alloc; + yy_size_t num_to_alloc; struct yyguts_t * yyg = (struct yyguts_t*)yyscanner; if (!yyg->yy_buffer_stack) { @@ -2381,9 +2444,9 @@ , yyscanner); if ( ! yyg->yy_buffer_stack ) YY_FATAL_ERROR( "out of dynamic memory in glcpp_ensure_buffer_stack()" ); - + memset(yyg->yy_buffer_stack, 0, num_to_alloc * sizeof(struct yy_buffer_state*)); - + yyg->yy_buffer_stack_max = num_to_alloc; yyg->yy_buffer_stack_top = 0; return; @@ -2412,7 +2475,7 @@ * @param base the character buffer * @param size the size in bytes of the character buffer * @param yyscanner The scanner object. - * @return the newly allocated buffer state object. + * @return the newly allocated buffer state object. */ YY_BUFFER_STATE glcpp__scan_buffer (char * base, yy_size_t size , yyscan_t yyscanner) { @@ -2428,7 +2491,7 @@ if ( ! b ) YY_FATAL_ERROR( "out of dynamic memory in glcpp__scan_buffer()" ); - b->yy_buf_size = size - 2; /* "- 2" to take care of EOB's */ + b->yy_buf_size = (int) (size - 2); /* "- 2" to take care of EOB's */ b->yy_buf_pos = b->yy_ch_buf = base; b->yy_is_our_buffer = 0; b->yy_input_file = NULL; @@ -2451,7 +2514,7 @@ * @note If you want to scan bytes that may contain NUL values, then use * glcpp__scan_bytes() instead. */ -YY_BUFFER_STATE glcpp__scan_string (yyconst char * yystr , yyscan_t yyscanner) +YY_BUFFER_STATE glcpp__scan_string (const char * yystr , yyscan_t yyscanner) { return glcpp__scan_bytes(yystr,(int) strlen(yystr) ,yyscanner); @@ -2464,15 +2527,15 @@ * @param yyscanner The scanner object. * @return the newly allocated buffer state object. */ -YY_BUFFER_STATE glcpp__scan_bytes (yyconst char * yybytes, int _yybytes_len , yyscan_t yyscanner) +YY_BUFFER_STATE glcpp__scan_bytes (const char * yybytes, int _yybytes_len , yyscan_t yyscanner) { YY_BUFFER_STATE b; char *buf; yy_size_t n; - yy_size_t i; + int i; /* Get memory for full buffer, including space for trailing EOB's. */ - n = (yy_size_t) _yybytes_len + 2; + n = (yy_size_t) (_yybytes_len + 2); buf = (char *) glcpp_alloc(n ,yyscanner ); if ( ! buf ) YY_FATAL_ERROR( "out of dynamic memory in glcpp__scan_bytes()" ); @@ -2538,7 +2601,7 @@ #define YY_EXIT_FAILURE 2 #endif -static void yynoreturn yy_fatal_error (yyconst char* msg , yyscan_t yyscanner) +static void yynoreturn yy_fatal_error (const char* msg , yyscan_t yyscanner) { struct yyguts_t * yyg = (struct yyguts_t*)yyscanner; (void)yyg; @@ -2580,7 +2643,7 @@ int glcpp_get_lineno (yyscan_t yyscanner) { struct yyguts_t * yyg = (struct yyguts_t*)yyscanner; - + if (! YY_CURRENT_BUFFER) return 0; @@ -2593,7 +2656,7 @@ int glcpp_get_column (yyscan_t yyscanner) { struct yyguts_t * yyg = (struct yyguts_t*)yyscanner; - + if (! YY_CURRENT_BUFFER) return 0; @@ -2739,9 +2802,7 @@ * the ONLY reentrant function that doesn't take the scanner as the last argument. * That's why we explicitly handle the declaration, instead of using our macros. */ - int glcpp_lex_init(yyscan_t* ptr_yy_globals) - { if (ptr_yy_globals == NULL){ errno = EINVAL; @@ -2768,9 +2829,7 @@ * The user defined value in the first argument will be available to glcpp_alloc in * the yyextra field. */ - int glcpp_lex_init_extra(YY_EXTRA_TYPE yy_user_defined,yyscan_t* ptr_yy_globals ) - { struct yyguts_t dummy_yyguts; @@ -2780,20 +2839,20 @@ errno = EINVAL; return 1; } - + *ptr_yy_globals = (yyscan_t) glcpp_alloc ( sizeof( struct yyguts_t ), &dummy_yyguts ); - + if (*ptr_yy_globals == NULL){ errno = ENOMEM; return 1; } - + /* By setting to 0xAA, we expose bugs in yy_init_globals. Leave at 0x00 for releases. */ memset(*ptr_yy_globals,0x00,sizeof(struct yyguts_t)); - + glcpp_set_extra (yy_user_defined, *ptr_yy_globals); - + return yy_init_globals ( *ptr_yy_globals ); } @@ -2865,7 +2924,7 @@ */ #ifndef yytext_ptr -static void yy_flex_strncpy (char* s1, yyconst char * s2, int n , yyscan_t yyscanner) +static void yy_flex_strncpy (char* s1, const char * s2, int n , yyscan_t yyscanner) { struct yyguts_t * yyg = (struct yyguts_t*)yyscanner; (void)yyg; @@ -2877,7 +2936,7 @@ #endif #ifdef YY_NEED_STRLEN -static int yy_flex_strlen (yyconst char * s , yyscan_t yyscanner) +static int yy_flex_strlen (const char * s , yyscan_t yyscanner) { int n; for ( n = 0; s[n]; ++n ) @@ -2918,13 +2977,12 @@ #define YYTABLES_NAME "yytables" -#line 582 "../../../src/compiler/glsl/glcpp/glcpp-lex.l" - +#line 583 "./glsl/glcpp/glcpp-lex.l" void glcpp_lex_set_source_string(glcpp_parser_t *parser, const char *shader) { - glcpp__scan_string(shader,parser->scanner); + yy_scan_string(shader, parser->scanner); } diff -Nru mesa-12.0.6/src/compiler/glsl/glcpp/glcpp-lex.l mesa-17.0.7/src/compiler/glsl/glcpp/glcpp-lex.l --- mesa-12.0.6/src/compiler/glsl/glcpp/glcpp-lex.l 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/glcpp/glcpp-lex.l 2017-06-01 10:37:10.000000000 +0000 @@ -101,7 +101,7 @@ #define RETURN_STRING_TOKEN(token) \ do { \ if (! parser->skipping) { \ - yylval->str = ralloc_strdup (yyextra, yytext); \ + yylval->str = linear_strdup(yyextra->linalloc, yytext); \ RETURN_TOKEN_NEVER_SKIP (token); \ } \ } while(0) @@ -175,7 +175,7 @@ SPACE [[:space:]] NONSPACE [^[:space:]] -HSPACE [ \t] +HSPACE [ \t\v\f] HASH # NEWLINE (\r\n|\n\r|\r|\n) IDENTIFIER [_a-zA-Z][_a-zA-Z0-9]* diff -Nru mesa-12.0.6/src/compiler/glsl/glcpp/glcpp-parse.c mesa-17.0.7/src/compiler/glsl/glcpp/glcpp-parse.c --- mesa-12.0.6/src/compiler/glsl/glcpp/glcpp-parse.c 2017-01-24 01:43:16.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/glcpp/glcpp-parse.c 2017-06-01 10:37:59.000000000 +0000 @@ -68,7 +68,7 @@ /* Copy the first part of user declarations. */ -#line 1 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:339 */ +#line 1 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:339 */ /* * Copyright © 2010 Intel Corporation @@ -120,10 +120,11 @@ token_list_t *replacements); static string_list_t * -_string_list_create(void *ctx); +_string_list_create(glcpp_parser_t *parser); static void -_string_list_append_item(string_list_t *list, const char *str); +_string_list_append_item(glcpp_parser_t *parser, string_list_t *list, + const char *str); static int _string_list_contains(string_list_t *list, const char *member, int *index); @@ -138,10 +139,11 @@ _string_list_equal(string_list_t *a, string_list_t *b); static argument_list_t * -_argument_list_create(void *ctx); +_argument_list_create(glcpp_parser_t *parser); static void -_argument_list_append(argument_list_t *list, token_list_t *argument); +_argument_list_append(glcpp_parser_t *parser, argument_list_t *list, + token_list_t *argument); static int _argument_list_length(argument_list_t *list); @@ -149,18 +151,17 @@ static token_list_t * _argument_list_member_at(argument_list_t *list, int index); -/* Note: This function ralloc_steal()s the str pointer. */ static token_t * -_token_create_str(void *ctx, int type, char *str); +_token_create_str(glcpp_parser_t *parser, int type, char *str); static token_t * -_token_create_ival(void *ctx, int type, int ival); +_token_create_ival(glcpp_parser_t *parser, int type, int ival); static token_list_t * -_token_list_create(void *ctx); +_token_list_create(glcpp_parser_t *parser); static void -_token_list_append(token_list_t *list, token_t *token); +_token_list_append(glcpp_parser_t *parser, token_list_t *list, token_t *token); static void _token_list_append_list(token_list_t *list, token_list_t *tail); @@ -224,7 +225,7 @@ add_builtin_define(glcpp_parser_t *parser, const char *name, int value); -#line 228 "glsl/glcpp/glcpp-parse.c" /* yacc.c:339 */ +#line 229 "glsl/glcpp/glcpp-parse.c" /* yacc.c:339 */ # ifndef YY_NULLPTR # if defined __cplusplus && 201103L <= __cplusplus @@ -325,7 +326,7 @@ /* Copy the second part of user declarations. */ -#line 329 "glsl/glcpp/glcpp-parse.c" /* yacc.c:358 */ +#line 330 "glsl/glcpp/glcpp-parse.c" /* yacc.c:358 */ #ifdef short # undef short @@ -569,16 +570,16 @@ /* YYFINAL -- State number of the termination state. */ #define YYFINAL 2 /* YYLAST -- Last index in YYTABLE. */ -#define YYLAST 692 +#define YYLAST 707 /* YYNTOKENS -- Number of terminals. */ #define YYNTOKENS 64 /* YYNNTS -- Number of nonterminals. */ -#define YYNNTS 19 +#define YYNNTS 20 /* YYNRULES -- Number of rules. */ -#define YYNRULES 112 +#define YYNRULES 113 /* YYNSTATES -- Number of states. */ -#define YYNSTATES 179 +#define YYNSTATES 180 /* YYTRANSLATE[YYX] -- Symbol number corresponding to YYX as returned by yylex, with out-of-bounds checking. */ @@ -628,18 +629,18 @@ /* YYRLINE[YYN] -- Source line where rule number YYN was defined. */ static const yytype_uint16 yyrline[] = { - 0, 201, 201, 203, 207, 208, 209, 214, 218, 223, + 0, 202, 202, 204, 208, 209, 210, 214, 218, 223, 228, 236, 249, 252, 255, 261, 264, 265, 278, 279, - 319, 340, 350, 355, 360, 386, 406, 406, 419, 419, + 317, 338, 348, 354, 360, 386, 406, 406, 419, 419, 422, 428, 434, 437, 443, 446, 449, 455, 464, 469, - 473, 480, 491, 502, 509, 516, 523, 530, 537, 544, - 551, 558, 565, 572, 579, 586, 593, 605, 617, 624, - 628, 632, 636, 640, 646, 651, 659, 660, 664, 665, - 668, 670, 676, 681, 688, 692, 696, 700, 704, 708, - 715, 716, 717, 718, 719, 720, 721, 722, 723, 724, - 725, 726, 727, 728, 729, 730, 731, 732, 733, 734, - 735, 736, 737, 738, 739, 740, 741, 742, 743, 744, - 745, 746, 747 + 480, 484, 491, 502, 513, 520, 527, 534, 541, 548, + 555, 562, 569, 576, 583, 590, 597, 604, 616, 628, + 635, 639, 643, 647, 651, 657, 661, 668, 669, 673, + 674, 677, 679, 685, 690, 697, 701, 705, 709, 713, + 717, 724, 725, 726, 727, 728, 729, 730, 731, 732, + 733, 734, 735, 736, 737, 738, 739, 740, 741, 742, + 743, 744, 745, 746, 747, 748, 749, 750, 751, 752, + 753, 754, 755, 756 }; #endif @@ -659,9 +660,9 @@ "'/'", "'%'", "UNARY", "'('", "')'", "'!'", "'~'", "','", "'['", "']'", "'{'", "'}'", "'.'", "';'", "'='", "$accept", "input", "line", "expanded_line", "define", "control_line", "control_line_success", "$@1", - "$@2", "control_line_error", "integer_constant", "expression", - "identifier_list", "text_line", "replacement_list", "junk", "pp_tokens", - "preprocessing_token", "operator", YY_NULLPTR + "$@2", "control_line_error", "integer_constant", "version_constant", + "expression", "identifier_list", "text_line", "replacement_list", "junk", + "pp_tokens", "preprocessing_token", "operator", YY_NULLPTR }; #endif @@ -680,10 +681,10 @@ }; # endif -#define YYPACT_NINF -110 +#define YYPACT_NINF -135 #define yypact_value_is_default(Yystate) \ - (!!((Yystate) == (-110))) + (!!((Yystate) == (-135))) #define YYTABLE_NINF -1 @@ -694,24 +695,24 @@ STATE-NUM. */ static const yytype_int16 yypact[] = { - -110, 139, -110, -110, -19, 606, -110, -19, -110, -16, - -110, -110, 25, -110, -110, -110, -110, -110, -110, -110, - -110, -110, -110, -110, -110, -110, -110, -110, -110, -110, - -110, -110, -110, -110, -110, -110, -110, -110, -110, -110, - -110, -110, -110, -110, -110, -110, -110, -110, -110, -110, - -110, -110, 187, -110, -110, -110, -110, -110, -19, -19, - -19, -19, -19, -110, 6, 51, 235, -110, -110, 36, - 283, 39, 46, 523, 76, 52, -16, 523, -110, 561, - 75, -110, -110, -110, -110, -110, -110, -24, -110, -110, - -110, -19, -19, -19, -19, -19, -19, -19, -19, -19, - -19, -19, -19, -19, -19, -19, -19, -19, -19, 53, - 523, -110, -110, -110, 331, 77, 78, -110, -110, 379, - 523, 523, 427, -110, 92, 40, 475, -110, -110, 114, - -110, 599, 615, 109, 629, 642, 67, 67, 34, 34, - 34, 34, 47, 47, 37, 37, -110, -110, -110, -15, - 115, 523, -110, -110, -110, -110, 136, 523, 141, -110, - -110, 177, -110, -110, -110, -110, 523, -22, -110, -110, - -110, -110, 178, 523, 184, -110, 180, -110, -110 + -135, 103, -135, -135, -18, 595, -135, -18, -135, -15, + -135, -135, 30, -135, -135, -135, -135, -135, -135, -135, + -135, -135, -135, -135, -135, -135, -135, -135, -135, -135, + -135, -135, -135, -135, -135, -135, -135, -135, -135, -135, + -135, -135, -135, -135, -135, -135, -135, -135, -135, -135, + -135, -135, 151, -135, -135, -135, -135, -135, -18, -18, + -18, -18, -18, -135, 525, 24, 199, -135, -135, 12, + 247, 38, 39, 487, 37, 43, 44, 487, -135, 550, + 25, -135, -135, -135, -135, -135, -135, -23, -135, -135, + -135, -18, -18, -18, -18, -18, -18, -18, -18, -18, + -18, -18, -18, -18, -18, -18, -18, -18, -18, 15, + 487, -135, -135, -135, 295, 49, 51, -135, -135, 343, + 487, 487, 391, -135, 52, -135, 36, 439, -135, -135, + 79, -135, 588, 604, 619, 633, 646, 657, 657, -3, + -3, -3, -3, 34, 34, 63, 63, -135, -135, -135, + -14, 83, 487, -135, -135, -135, -135, 88, 487, 89, + -135, -135, 90, -135, -135, -135, -135, 487, 5, -135, + -135, -135, -135, 91, 487, 97, -135, 95, -135, -135 }; /* YYDEFACT[STATE-NUM] -- Default reduction number in state STATE-NUM. @@ -719,38 +720,38 @@ means the default is an error. */ static const yytype_uint8 yydefact[] = { - 2, 0, 1, 77, 0, 0, 74, 0, 75, 0, - 66, 78, 79, 111, 112, 110, 106, 105, 104, 103, - 87, 101, 102, 97, 98, 99, 100, 95, 96, 89, - 90, 88, 93, 94, 82, 83, 92, 91, 108, 80, - 81, 84, 85, 86, 107, 109, 3, 7, 4, 15, - 16, 6, 0, 72, 76, 40, 38, 37, 0, 0, - 0, 0, 0, 39, 0, 0, 0, 26, 28, 0, + 2, 0, 1, 78, 0, 0, 75, 0, 76, 0, + 67, 79, 80, 112, 113, 111, 107, 106, 105, 104, + 88, 102, 103, 98, 99, 100, 101, 96, 97, 90, + 91, 89, 94, 95, 83, 84, 93, 92, 109, 81, + 82, 85, 86, 87, 108, 110, 3, 7, 4, 15, + 16, 6, 0, 73, 77, 41, 38, 37, 0, 0, + 0, 0, 0, 40, 0, 0, 0, 26, 28, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, - 0, 5, 67, 79, 73, 62, 61, 0, 59, 60, + 0, 5, 68, 80, 74, 63, 62, 0, 60, 61, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 68, 35, 18, 25, 0, 0, 0, 34, 21, 0, - 70, 70, 0, 33, 0, 0, 0, 8, 10, 0, - 63, 41, 42, 43, 44, 45, 47, 46, 51, 50, - 49, 48, 53, 52, 55, 54, 58, 57, 56, 0, - 0, 69, 24, 27, 29, 20, 0, 71, 0, 17, - 19, 0, 30, 36, 11, 64, 68, 0, 12, 22, - 23, 31, 0, 68, 0, 13, 0, 65, 14 + 69, 35, 18, 25, 0, 0, 0, 34, 21, 0, + 71, 71, 0, 33, 0, 39, 0, 0, 8, 10, + 0, 64, 42, 43, 44, 45, 46, 48, 47, 52, + 51, 50, 49, 54, 53, 56, 55, 59, 58, 57, + 0, 0, 70, 24, 27, 29, 20, 0, 72, 0, + 17, 19, 0, 30, 36, 11, 65, 69, 0, 12, + 22, 23, 31, 0, 69, 0, 13, 0, 66, 14 }; /* YYPGOTO[NTERM-NUM]. */ static const yytype_int16 yypgoto[] = { - -110, -110, -110, -110, -110, 195, -110, -110, -110, -110, - -6, 30, -110, -110, -109, 88, -1, -51, -110 + -135, -135, -135, -135, -135, 58, -135, -135, -135, -135, + -7, -135, -6, -135, -135, -134, 1, -1, -48, -135 }; /* YYDEFGOTO[NTERM-NUM]. */ static const yytype_int16 yydefgoto[] = { -1, 1, 46, 47, 112, 48, 49, 115, 116, 50, - 63, 64, 167, 51, 150, 156, 151, 53, 54 + 63, 126, 64, 168, 51, 151, 157, 152, 53, 54 }; /* YYTABLE[YYPACT[STATE-NUM]] -- What to do in state STATE-NUM. If @@ -758,101 +759,108 @@ number is the opposite. If YYTABLE_NINF, syntax error. */ static const yytype_uint8 yytable[] = { - 52, 84, 55, 80, 56, 57, 165, 56, 57, 91, - 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, - 102, 103, 104, 105, 106, 107, 108, 58, 59, 130, - 5, 173, 90, 60, 174, 61, 62, 79, 166, 91, - 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, - 102, 103, 104, 105, 106, 107, 108, 172, 109, 110, - 120, 161, 117, 84, 176, 114, 162, 121, 84, 119, - 125, 84, 122, 124, 129, 84, 126, 111, 102, 103, - 104, 105, 106, 107, 108, 106, 107, 108, 85, 86, - 87, 88, 89, 104, 105, 106, 107, 108, 56, 57, - 84, 128, 123, 153, 154, 149, 84, 98, 99, 100, - 101, 102, 103, 104, 105, 106, 107, 108, 160, 157, - 157, 131, 132, 133, 134, 135, 136, 137, 138, 139, - 140, 141, 142, 143, 144, 145, 146, 147, 148, 2, - 164, 168, 3, 4, 5, 94, 95, 96, 97, 98, - 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, - 6, 7, 169, 8, 9, 10, 11, 170, 12, 13, + 52, 79, 80, 55, 84, 56, 57, 166, 56, 57, + 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, + 101, 102, 103, 104, 105, 106, 107, 108, 58, 59, + 131, 109, 110, 173, 60, 5, 61, 62, 117, 167, + 177, 102, 103, 104, 105, 106, 107, 108, 56, 57, + 111, 129, 85, 86, 87, 88, 89, 162, 174, 120, + 121, 175, 163, 123, 124, 114, 84, 150, 125, 119, + 81, 84, 122, 130, 84, 154, 127, 155, 161, 84, + 104, 105, 106, 107, 108, 132, 133, 134, 135, 136, + 137, 138, 139, 140, 141, 142, 143, 144, 145, 146, + 147, 148, 149, 2, 84, 165, 3, 4, 5, 169, + 84, 106, 107, 108, 170, 171, 172, 176, 178, 158, + 158, 179, 159, 0, 6, 7, 0, 8, 9, 10, + 11, 0, 12, 13, 14, 15, 16, 17, 18, 19, + 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, + 30, 31, 32, 33, 3, 34, 35, 36, 37, 38, + 39, 40, 41, 42, 43, 44, 45, 0, 0, 0, + 0, 0, 6, 0, 0, 8, 0, 82, 11, 0, + 83, 13, 14, 15, 16, 17, 18, 19, 20, 21, + 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, + 32, 33, 3, 34, 35, 36, 37, 38, 39, 40, + 41, 42, 43, 44, 45, 0, 0, 0, 0, 0, + 6, 0, 0, 8, 0, 113, 11, 0, 83, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 3, 34, 35, 36, 37, 38, 39, 40, 41, 42, - 43, 44, 45, 171, 175, 177, 178, 81, 6, 158, - 0, 8, 0, 82, 11, 0, 83, 13, 14, 15, + 43, 44, 45, 0, 0, 0, 0, 0, 6, 0, + 0, 8, 0, 118, 11, 0, 83, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 3, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 0, 0, 0, 0, 0, 6, 0, 0, 8, - 0, 113, 11, 0, 83, 13, 14, 15, 16, 17, + 0, 153, 11, 0, 83, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 3, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 0, - 0, 0, 0, 0, 6, 0, 0, 8, 0, 118, + 0, 0, 0, 0, 6, 0, 0, 8, 0, 156, 11, 0, 83, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 3, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 0, 0, 0, - 0, 0, 6, 0, 0, 8, 0, 152, 11, 0, + 0, 0, 6, 0, 0, 8, 0, 160, 11, 0, 83, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 3, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 0, 0, 0, 0, 0, - 6, 0, 0, 8, 0, 155, 11, 0, 83, 13, + 6, 0, 0, 8, 0, 164, 11, 0, 83, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 3, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 0, 0, 0, 0, 0, 6, 0, - 0, 8, 0, 159, 11, 0, 83, 13, 14, 15, + 0, 8, 0, 0, 11, 0, 83, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, - 26, 27, 28, 29, 30, 31, 32, 33, 3, 34, + 26, 27, 28, 29, 30, 31, 32, 33, 0, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, - 45, 0, 0, 0, 0, 0, 6, 0, 0, 8, - 0, 163, 11, 0, 83, 13, 14, 15, 16, 17, - 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, - 28, 29, 30, 31, 32, 33, 3, 34, 35, 36, - 37, 38, 39, 40, 41, 42, 43, 44, 45, 0, - 0, 0, 0, 0, 6, 0, 0, 8, 0, 0, - 11, 0, 83, 13, 14, 15, 16, 17, 18, 19, - 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, - 30, 31, 32, 33, 0, 34, 35, 36, 37, 38, - 39, 40, 41, 42, 43, 44, 45, 127, 0, 0, - 0, 0, 0, 0, 91, 92, 93, 94, 95, 96, - 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, - 107, 108, 65, 0, 0, 66, 67, 68, 69, 70, - 71, 72, 73, 74, 75, 76, 77, 0, 0, 0, - 0, 0, 78, 92, 93, 94, 95, 96, 97, 98, - 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, + 45, 90, 0, 0, 0, 0, 0, 0, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, - 103, 104, 105, 106, 107, 108, 95, 96, 97, 98, + 103, 104, 105, 106, 107, 108, 128, 0, 0, 0, + 0, 0, 0, 91, 92, 93, 94, 95, 96, 97, + 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, + 108, 65, 0, 0, 66, 67, 68, 69, 70, 71, + 72, 73, 74, 75, 76, 77, 0, 0, 0, 0, + 0, 78, 92, 93, 94, 95, 96, 97, 98, 99, + 100, 101, 102, 103, 104, 105, 106, 107, 108, 93, + 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, + 104, 105, 106, 107, 108, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, - 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, - 106, 107, 108 + 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, + 105, 106, 107, 108, 96, 97, 98, 99, 100, 101, + 102, 103, 104, 105, 106, 107, 108, 98, 99, 100, + 101, 102, 103, 104, 105, 106, 107, 108 }; static const yytype_int16 yycheck[] = { - 1, 52, 21, 9, 23, 24, 21, 23, 24, 33, - 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, - 44, 45, 46, 47, 48, 49, 50, 46, 47, 53, - 5, 53, 26, 52, 56, 54, 55, 7, 53, 33, - 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, - 44, 45, 46, 47, 48, 49, 50, 166, 7, 8, - 21, 21, 26, 114, 173, 66, 26, 21, 119, 70, - 76, 122, 73, 21, 80, 126, 77, 26, 44, 45, - 46, 47, 48, 49, 50, 48, 49, 50, 58, 59, - 60, 61, 62, 46, 47, 48, 49, 50, 23, 24, - 151, 26, 26, 26, 26, 52, 157, 40, 41, 42, - 43, 44, 45, 46, 47, 48, 49, 50, 26, 120, - 121, 91, 92, 93, 94, 95, 96, 97, 98, 99, - 100, 101, 102, 103, 104, 105, 106, 107, 108, 0, - 26, 26, 3, 4, 5, 36, 37, 38, 39, 40, - 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, - 21, 22, 26, 24, 25, 26, 27, 26, 29, 30, + 1, 7, 9, 21, 52, 23, 24, 21, 23, 24, + 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, + 43, 44, 45, 46, 47, 48, 49, 50, 46, 47, + 53, 7, 8, 167, 52, 5, 54, 55, 26, 53, + 174, 44, 45, 46, 47, 48, 49, 50, 23, 24, + 26, 26, 58, 59, 60, 61, 62, 21, 53, 21, + 21, 56, 26, 26, 21, 66, 114, 52, 24, 70, + 12, 119, 73, 80, 122, 26, 77, 26, 26, 127, + 46, 47, 48, 49, 50, 91, 92, 93, 94, 95, + 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, + 106, 107, 108, 0, 152, 26, 3, 4, 5, 26, + 158, 48, 49, 50, 26, 26, 26, 26, 21, 120, + 121, 26, 121, -1, 21, 22, -1, 24, 25, 26, + 27, -1, 29, 30, 31, 32, 33, 34, 35, 36, + 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, + 47, 48, 49, 50, 3, 52, 53, 54, 55, 56, + 57, 58, 59, 60, 61, 62, 63, -1, -1, -1, + -1, -1, 21, -1, -1, 24, -1, 26, 27, -1, + 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, + 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, + 49, 50, 3, 52, 53, 54, 55, 56, 57, 58, + 59, 60, 61, 62, 63, -1, -1, -1, -1, -1, + 21, -1, -1, 24, -1, 26, 27, -1, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 3, 52, 53, 54, 55, 56, 57, 58, 59, 60, - 61, 62, 63, 26, 26, 21, 26, 12, 21, 121, + 61, 62, 63, -1, -1, -1, -1, -1, 21, -1, -1, 24, -1, 26, 27, -1, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 3, 52, @@ -877,31 +885,26 @@ 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 3, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, -1, -1, -1, -1, -1, 21, -1, - -1, 24, -1, 26, 27, -1, 29, 30, 31, 32, + -1, 24, -1, -1, 27, -1, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, - 43, 44, 45, 46, 47, 48, 49, 50, 3, 52, + 43, 44, 45, 46, 47, 48, 49, 50, -1, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, - 63, -1, -1, -1, -1, -1, 21, -1, -1, 24, - -1, 26, 27, -1, 29, 30, 31, 32, 33, 34, - 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, - 45, 46, 47, 48, 49, 50, 3, 52, 53, 54, - 55, 56, 57, 58, 59, 60, 61, 62, 63, -1, - -1, -1, -1, -1, 21, -1, -1, 24, -1, -1, - 27, -1, 29, 30, 31, 32, 33, 34, 35, 36, - 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, - 47, 48, 49, 50, -1, 52, 53, 54, 55, 56, - 57, 58, 59, 60, 61, 62, 63, 26, -1, -1, - -1, -1, -1, -1, 33, 34, 35, 36, 37, 38, - 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, - 49, 50, 6, -1, -1, 9, 10, 11, 12, 13, - 14, 15, 16, 17, 18, 19, 20, -1, -1, -1, - -1, -1, 26, 34, 35, 36, 37, 38, 39, 40, - 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, + 63, 26, -1, -1, -1, -1, -1, -1, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, - 45, 46, 47, 48, 49, 50, 37, 38, 39, 40, + 45, 46, 47, 48, 49, 50, 26, -1, -1, -1, + -1, -1, -1, 33, 34, 35, 36, 37, 38, 39, + 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, + 50, 6, -1, -1, 9, 10, 11, 12, 13, 14, + 15, 16, 17, 18, 19, 20, -1, -1, -1, -1, + -1, 26, 34, 35, 36, 37, 38, 39, 40, 41, + 42, 43, 44, 45, 46, 47, 48, 49, 50, 35, + 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, + 46, 47, 48, 49, 50, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, - 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, - 48, 49, 50 + 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, + 47, 48, 49, 50, 38, 39, 40, 41, 42, 43, + 44, 45, 46, 47, 48, 49, 50, 40, 41, 42, + 43, 44, 45, 46, 47, 48, 49, 50 }; /* YYSTOS[STATE-NUM] -- The (internal number of the) accessing @@ -913,19 +916,19 @@ 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 66, 67, 69, 70, - 73, 77, 80, 81, 82, 21, 23, 24, 46, 47, - 52, 54, 55, 74, 75, 6, 9, 10, 11, 12, - 13, 14, 15, 16, 17, 18, 19, 20, 26, 75, - 74, 69, 26, 29, 81, 75, 75, 75, 75, 75, + 73, 78, 81, 82, 83, 21, 23, 24, 46, 47, + 52, 54, 55, 74, 76, 6, 9, 10, 11, 12, + 13, 14, 15, 16, 17, 18, 19, 20, 26, 76, + 74, 69, 26, 29, 82, 76, 76, 76, 76, 76, 26, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 7, - 8, 26, 68, 26, 80, 71, 72, 26, 26, 80, - 21, 21, 80, 26, 21, 74, 80, 26, 26, 74, - 53, 75, 75, 75, 75, 75, 75, 75, 75, 75, - 75, 75, 75, 75, 75, 75, 75, 75, 75, 52, - 78, 80, 26, 26, 26, 26, 79, 80, 79, 26, - 26, 21, 26, 26, 26, 21, 53, 76, 26, 26, - 26, 26, 78, 53, 56, 26, 78, 21, 26 + 8, 26, 68, 26, 81, 71, 72, 26, 26, 81, + 21, 21, 81, 26, 21, 24, 75, 81, 26, 26, + 74, 53, 76, 76, 76, 76, 76, 76, 76, 76, + 76, 76, 76, 76, 76, 76, 76, 76, 76, 76, + 52, 79, 81, 26, 26, 26, 26, 80, 81, 80, + 26, 26, 21, 26, 26, 26, 21, 53, 77, 26, + 26, 26, 26, 79, 53, 56, 26, 79, 21, 26 }; /* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ @@ -935,14 +938,14 @@ 67, 67, 68, 68, 68, 69, 69, 69, 70, 70, 70, 70, 70, 70, 70, 70, 71, 70, 72, 70, 70, 70, 70, 70, 73, 73, 73, 74, 74, 75, - 75, 75, 75, 75, 75, 75, 75, 75, 75, 75, - 75, 75, 75, 75, 75, 75, 75, 75, 75, 75, - 75, 75, 75, 75, 76, 76, 77, 77, 78, 78, - 79, 79, 80, 80, 81, 81, 81, 81, 81, 81, - 82, 82, 82, 82, 82, 82, 82, 82, 82, 82, - 82, 82, 82, 82, 82, 82, 82, 82, 82, 82, - 82, 82, 82, 82, 82, 82, 82, 82, 82, 82, - 82, 82, 82 + 76, 76, 76, 76, 76, 76, 76, 76, 76, 76, + 76, 76, 76, 76, 76, 76, 76, 76, 76, 76, + 76, 76, 76, 76, 76, 77, 77, 78, 78, 79, + 79, 80, 80, 81, 81, 82, 82, 82, 82, 82, + 82, 83, 83, 83, 83, 83, 83, 83, 83, 83, + 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, + 83, 83, 83, 83, 83, 83, 83, 83, 83, 83, + 83, 83, 83, 83 }; /* YYR2[YYN] -- Number of symbols on the right hand side of rule YYN. */ @@ -952,14 +955,14 @@ 3, 4, 3, 5, 6, 1, 1, 4, 3, 4, 4, 3, 5, 5, 4, 3, 0, 4, 0, 4, 4, 5, 2, 3, 3, 3, 4, 1, 1, 1, - 1, 3, 3, 3, 3, 3, 3, 3, 3, 3, - 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, - 2, 2, 2, 3, 1, 3, 1, 2, 0, 1, - 0, 1, 1, 2, 1, 1, 1, 1, 1, 1, + 1, 1, 3, 3, 3, 3, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, + 2, 2, 2, 2, 3, 1, 3, 1, 2, 0, + 1, 0, 1, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1 + 1, 1, 1, 1 }; @@ -1553,7 +1556,7 @@ yychar = YYEMPTY; /* Cause a token to be read. */ /* User initialization code. */ -#line 161 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1429 */ +#line 162 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1429 */ { yylloc.first_line = 1; yylloc.first_column = 1; @@ -1562,7 +1565,7 @@ yylloc.source = 0; } -#line 1566 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1429 */ +#line 1569 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1429 */ yylsp[0] = yylloc; goto yysetstate; @@ -1749,37 +1752,36 @@ switch (yyn) { case 6: -#line 209 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 210 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { _glcpp_parser_print_expanded_token_list (parser, (yyvsp[0].token_list)); ralloc_asprintf_rewrite_tail (&parser->output, &parser->output_length, "\n"); - ralloc_free ((yyvsp[0].token_list)); } -#line 1759 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 1761 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; case 8: -#line 218 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 218 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { if (parser->is_gles && (yyvsp[-1].expression_value).undefined_macro) glcpp_error(& (yylsp[-2]), parser, "undefined macro %s in expression (illegal in GLES)", (yyvsp[-1].expression_value).undefined_macro); _glcpp_parser_skip_stack_push_if (parser, & (yylsp[-2]), (yyvsp[-1].expression_value).value); } -#line 1769 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 1771 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; case 9: -#line 223 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 223 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { if (parser->is_gles && (yyvsp[-1].expression_value).undefined_macro) glcpp_error(& (yylsp[-2]), parser, "undefined macro %s in expression (illegal in GLES)", (yyvsp[-1].expression_value).undefined_macro); _glcpp_parser_skip_stack_change_if (parser, & (yylsp[-2]), "elif", (yyvsp[-1].expression_value).value); } -#line 1779 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 1781 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; case 10: -#line 228 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 228 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { parser->has_new_line_number = 1; parser->new_line_number = (yyvsp[-1].ival); @@ -1788,11 +1790,11 @@ "#line %" PRIiMAX "\n", (yyvsp[-1].ival)); } -#line 1792 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 1794 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; case 11: -#line 236 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 236 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { parser->has_new_line_number = 1; parser->new_line_number = (yyvsp[-2].ival); @@ -1803,43 +1805,43 @@ "#line %" PRIiMAX " %" PRIiMAX "\n", (yyvsp[-2].ival), (yyvsp[-1].ival)); } -#line 1807 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 1809 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; case 12: -#line 249 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 249 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { _define_object_macro (parser, & (yylsp[-2]), (yyvsp[-2].str), (yyvsp[-1].token_list)); } -#line 1815 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 1817 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; case 13: -#line 252 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 252 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { _define_function_macro (parser, & (yylsp[-4]), (yyvsp[-4].str), NULL, (yyvsp[-1].token_list)); } -#line 1823 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 1825 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; case 14: -#line 255 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 255 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { _define_function_macro (parser, & (yylsp[-5]), (yyvsp[-5].str), (yyvsp[-3].string_list), (yyvsp[-1].token_list)); } -#line 1831 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 1833 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; case 15: -#line 261 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 261 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { ralloc_asprintf_rewrite_tail (&parser->output, &parser->output_length, "\n"); } -#line 1839 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 1841 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; case 17: -#line 265 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 265 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { if (parser->skip_stack == NULL || @@ -1850,13 +1852,13 @@ EXPANSION_MODE_IGNORE_DEFINED); } } -#line 1854 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 1856 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; case 19: -#line 279 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 279 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { - macro_t *macro; + struct hash_entry *entry; /* Section 3.4 (Preprocessor) of the GLSL ES 3.00 spec says: * @@ -1888,18 +1890,16 @@ glcpp_error(& (yylsp[-3]), parser, "Built-in (pre-defined)" " macro names cannot be undefined."); - macro = hash_table_find (parser->defines, (yyvsp[-1].str)); - if (macro) { - hash_table_remove (parser->defines, (yyvsp[-1].str)); - ralloc_free (macro); + entry = _mesa_hash_table_search (parser->defines, (yyvsp[-1].str)); + if (entry) { + _mesa_hash_table_remove (parser->defines, entry); } - ralloc_free ((yyvsp[-1].str)); } #line 1899 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; case 20: -#line 319 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 317 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { /* Be careful to only evaluate the 'if' expression if * we are not skipping. When we are skipping, we @@ -1925,7 +1925,7 @@ break; case 21: -#line 340 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 338 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { /* #if without an expression is only an error if we * are not skipping */ @@ -1940,27 +1940,29 @@ break; case 22: -#line 350 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 348 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { - macro_t *macro = hash_table_find (parser->defines, (yyvsp[-2].str)); - ralloc_free ((yyvsp[-2].str)); + struct hash_entry *entry = + _mesa_hash_table_search(parser->defines, (yyvsp[-2].str)); + macro_t *macro = entry ? entry->data : NULL; _glcpp_parser_skip_stack_push_if (parser, & (yylsp[-4]), macro != NULL); } -#line 1950 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 1951 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; case 23: -#line 355 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 354 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { - macro_t *macro = hash_table_find (parser->defines, (yyvsp[-2].str)); - ralloc_free ((yyvsp[-2].str)); + struct hash_entry *entry = + _mesa_hash_table_search(parser->defines, (yyvsp[-2].str)); + macro_t *macro = entry ? entry->data : NULL; _glcpp_parser_skip_stack_push_if (parser, & (yylsp[-2]), macro == NULL); } -#line 1960 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 1962 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; case 24: -#line 360 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 360 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { /* Be careful to only evaluate the 'elif' expression * if we are not skipping. When we are skipping, we @@ -1987,11 +1989,11 @@ "elif", 0); } } -#line 1991 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 1993 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; case 25: -#line 386 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 386 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { /* #elif without an expression is an error unless we * are skipping. */ @@ -2012,17 +2014,17 @@ glcpp_warning(& (yylsp[-2]), parser, "ignoring illegal #elif without expression"); } } -#line 2016 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2018 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; case 26: -#line 406 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 406 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { parser->lexing_directive = 1; } -#line 2022 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2024 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; case 27: -#line 406 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 406 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { if (parser->skip_stack && parser->skip_stack->has_else) @@ -2036,81 +2038,81 @@ parser->skip_stack->has_else = true; } } -#line 2040 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2042 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; case 28: -#line 419 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 419 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { _glcpp_parser_skip_stack_pop (parser, & (yylsp[-1])); } -#line 2048 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2050 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; case 30: -#line 422 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 422 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { - if (parser->version != 0) { + if (parser->version_set) { glcpp_error(& (yylsp[-3]), parser, "#version must appear on the first line"); } _glcpp_parser_handle_version_declaration(parser, (yyvsp[-1].ival), NULL, true); } -#line 2059 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2061 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; case 31: -#line 428 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 428 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { - if (parser->version != 0) { + if (parser->version_set) { glcpp_error(& (yylsp[-4]), parser, "#version must appear on the first line"); } _glcpp_parser_handle_version_declaration(parser, (yyvsp[-2].ival), (yyvsp[-1].str), true); } -#line 2070 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2072 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; case 32: -#line 434 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 434 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { glcpp_parser_resolve_implicit_version(parser); } -#line 2078 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2080 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; case 33: -#line 437 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 437 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { ralloc_asprintf_rewrite_tail (&parser->output, &parser->output_length, "#%s", (yyvsp[-1].str)); } -#line 2086 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2088 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; case 34: -#line 443 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 443 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { glcpp_error(& (yylsp[-2]), parser, "#%s", (yyvsp[-1].str)); } -#line 2094 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2096 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; case 35: -#line 446 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 446 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { glcpp_error (& (yylsp[-2]), parser, "#define without macro name"); } -#line 2102 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2104 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; case 36: -#line 449 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 449 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { glcpp_error (& (yylsp[-3]), parser, "Illegal non-directive after #"); } -#line 2110 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2112 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; case 37: -#line 455 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 455 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { if (strlen ((yyvsp[0].str)) >= 3 && strncmp ((yyvsp[0].str), "0x", 2) == 0) { (yyval.ival) = strtoll ((yyvsp[0].str) + 2, NULL, 16); @@ -2120,40 +2122,54 @@ (yyval.ival) = strtoll ((yyvsp[0].str), NULL, 10); } } -#line 2124 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2126 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; case 38: -#line 464 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 464 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = (yyvsp[0].ival); } -#line 2132 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2134 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; case 39: -#line 469 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ +#line 469 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + { + /* Both octal and hexadecimal constants begin with 0. */ + if ((yyvsp[0].str)[0] == '0' && (yyvsp[0].str)[1] != '\0') { + glcpp_error(&(yylsp[0]), parser, "invalid #version \"%s\" (not a decimal constant)", (yyvsp[0].str)); + (yyval.ival) = 0; + } else { + (yyval.ival) = strtoll((yyvsp[0].str), NULL, 10); + } + } +#line 2148 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ + break; + + case 40: +#line 480 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.expression_value).value = (yyvsp[0].ival); (yyval.expression_value).undefined_macro = NULL; } -#line 2141 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2157 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 40: -#line 473 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 41: +#line 484 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.expression_value).value = 0; if (parser->is_gles) - (yyval.expression_value).undefined_macro = ralloc_strdup (parser, (yyvsp[0].str)); + (yyval.expression_value).undefined_macro = linear_strdup(parser->linalloc, (yyvsp[0].str)); else (yyval.expression_value).undefined_macro = NULL; } -#line 2153 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2169 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 41: -#line 480 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 42: +#line 491 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.expression_value).value = (yyvsp[-2].expression_value).value || (yyvsp[0].expression_value).value; @@ -2165,11 +2181,11 @@ else if (! (yyvsp[-2].expression_value).value) (yyval.expression_value).undefined_macro = (yyvsp[0].expression_value).undefined_macro; } -#line 2169 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2185 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 42: -#line 491 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 43: +#line 502 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.expression_value).value = (yyvsp[-2].expression_value).value && (yyvsp[0].expression_value).value; @@ -2181,11 +2197,11 @@ else if ((yyvsp[-2].expression_value).value) (yyval.expression_value).undefined_macro = (yyvsp[0].expression_value).undefined_macro; } -#line 2185 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2201 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 43: -#line 502 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 44: +#line 513 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.expression_value).value = (yyvsp[-2].expression_value).value | (yyvsp[0].expression_value).value; if ((yyvsp[-2].expression_value).undefined_macro) @@ -2193,11 +2209,11 @@ else (yyval.expression_value).undefined_macro = (yyvsp[0].expression_value).undefined_macro; } -#line 2197 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2213 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 44: -#line 509 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 45: +#line 520 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.expression_value).value = (yyvsp[-2].expression_value).value ^ (yyvsp[0].expression_value).value; if ((yyvsp[-2].expression_value).undefined_macro) @@ -2205,11 +2221,11 @@ else (yyval.expression_value).undefined_macro = (yyvsp[0].expression_value).undefined_macro; } -#line 2209 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2225 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 45: -#line 516 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 46: +#line 527 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.expression_value).value = (yyvsp[-2].expression_value).value & (yyvsp[0].expression_value).value; if ((yyvsp[-2].expression_value).undefined_macro) @@ -2217,11 +2233,11 @@ else (yyval.expression_value).undefined_macro = (yyvsp[0].expression_value).undefined_macro; } -#line 2221 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2237 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 46: -#line 523 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 47: +#line 534 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.expression_value).value = (yyvsp[-2].expression_value).value != (yyvsp[0].expression_value).value; if ((yyvsp[-2].expression_value).undefined_macro) @@ -2229,11 +2245,11 @@ else (yyval.expression_value).undefined_macro = (yyvsp[0].expression_value).undefined_macro; } -#line 2233 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2249 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 47: -#line 530 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 48: +#line 541 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.expression_value).value = (yyvsp[-2].expression_value).value == (yyvsp[0].expression_value).value; if ((yyvsp[-2].expression_value).undefined_macro) @@ -2241,11 +2257,11 @@ else (yyval.expression_value).undefined_macro = (yyvsp[0].expression_value).undefined_macro; } -#line 2245 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2261 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 48: -#line 537 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 49: +#line 548 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.expression_value).value = (yyvsp[-2].expression_value).value >= (yyvsp[0].expression_value).value; if ((yyvsp[-2].expression_value).undefined_macro) @@ -2253,11 +2269,11 @@ else (yyval.expression_value).undefined_macro = (yyvsp[0].expression_value).undefined_macro; } -#line 2257 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2273 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 49: -#line 544 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 50: +#line 555 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.expression_value).value = (yyvsp[-2].expression_value).value <= (yyvsp[0].expression_value).value; if ((yyvsp[-2].expression_value).undefined_macro) @@ -2265,11 +2281,11 @@ else (yyval.expression_value).undefined_macro = (yyvsp[0].expression_value).undefined_macro; } -#line 2269 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2285 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 50: -#line 551 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 51: +#line 562 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.expression_value).value = (yyvsp[-2].expression_value).value > (yyvsp[0].expression_value).value; if ((yyvsp[-2].expression_value).undefined_macro) @@ -2277,11 +2293,11 @@ else (yyval.expression_value).undefined_macro = (yyvsp[0].expression_value).undefined_macro; } -#line 2281 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2297 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 51: -#line 558 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 52: +#line 569 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.expression_value).value = (yyvsp[-2].expression_value).value < (yyvsp[0].expression_value).value; if ((yyvsp[-2].expression_value).undefined_macro) @@ -2289,11 +2305,11 @@ else (yyval.expression_value).undefined_macro = (yyvsp[0].expression_value).undefined_macro; } -#line 2293 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2309 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 52: -#line 565 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 53: +#line 576 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.expression_value).value = (yyvsp[-2].expression_value).value >> (yyvsp[0].expression_value).value; if ((yyvsp[-2].expression_value).undefined_macro) @@ -2301,11 +2317,11 @@ else (yyval.expression_value).undefined_macro = (yyvsp[0].expression_value).undefined_macro; } -#line 2305 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2321 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 53: -#line 572 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 54: +#line 583 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.expression_value).value = (yyvsp[-2].expression_value).value << (yyvsp[0].expression_value).value; if ((yyvsp[-2].expression_value).undefined_macro) @@ -2313,11 +2329,11 @@ else (yyval.expression_value).undefined_macro = (yyvsp[0].expression_value).undefined_macro; } -#line 2317 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2333 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 54: -#line 579 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 55: +#line 590 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.expression_value).value = (yyvsp[-2].expression_value).value - (yyvsp[0].expression_value).value; if ((yyvsp[-2].expression_value).undefined_macro) @@ -2325,11 +2341,11 @@ else (yyval.expression_value).undefined_macro = (yyvsp[0].expression_value).undefined_macro; } -#line 2329 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2345 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 55: -#line 586 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 56: +#line 597 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.expression_value).value = (yyvsp[-2].expression_value).value + (yyvsp[0].expression_value).value; if ((yyvsp[-2].expression_value).undefined_macro) @@ -2337,11 +2353,11 @@ else (yyval.expression_value).undefined_macro = (yyvsp[0].expression_value).undefined_macro; } -#line 2341 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2357 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 56: -#line 593 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 57: +#line 604 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { if ((yyvsp[0].expression_value).value == 0) { yyerror (& (yylsp[-2]), parser, @@ -2354,11 +2370,11 @@ else (yyval.expression_value).undefined_macro = (yyvsp[0].expression_value).undefined_macro; } -#line 2358 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2374 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 57: -#line 605 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 58: +#line 616 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { if ((yyvsp[0].expression_value).value == 0) { yyerror (& (yylsp[-2]), parser, @@ -2371,11 +2387,11 @@ else (yyval.expression_value).undefined_macro = (yyvsp[0].expression_value).undefined_macro; } -#line 2375 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2391 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 58: -#line 617 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 59: +#line 628 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.expression_value).value = (yyvsp[-2].expression_value).value * (yyvsp[0].expression_value).value; if ((yyvsp[-2].expression_value).undefined_macro) @@ -2383,366 +2399,364 @@ else (yyval.expression_value).undefined_macro = (yyvsp[0].expression_value).undefined_macro; } -#line 2387 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2403 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 59: -#line 624 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 60: +#line 635 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.expression_value).value = ! (yyvsp[0].expression_value).value; (yyval.expression_value).undefined_macro = (yyvsp[0].expression_value).undefined_macro; } -#line 2396 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2412 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 60: -#line 628 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 61: +#line 639 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.expression_value).value = ~ (yyvsp[0].expression_value).value; (yyval.expression_value).undefined_macro = (yyvsp[0].expression_value).undefined_macro; } -#line 2405 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2421 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 61: -#line 632 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 62: +#line 643 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.expression_value).value = - (yyvsp[0].expression_value).value; (yyval.expression_value).undefined_macro = (yyvsp[0].expression_value).undefined_macro; } -#line 2414 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2430 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 62: -#line 636 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 63: +#line 647 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.expression_value).value = + (yyvsp[0].expression_value).value; (yyval.expression_value).undefined_macro = (yyvsp[0].expression_value).undefined_macro; } -#line 2423 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2439 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 63: -#line 640 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 64: +#line 651 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.expression_value) = (yyvsp[-1].expression_value); } -#line 2431 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2447 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 64: -#line 646 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 65: +#line 657 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.string_list) = _string_list_create (parser); - _string_list_append_item ((yyval.string_list), (yyvsp[0].str)); - ralloc_steal ((yyval.string_list), (yyvsp[0].str)); + _string_list_append_item (parser, (yyval.string_list), (yyvsp[0].str)); } -#line 2441 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2456 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 65: -#line 651 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 66: +#line 661 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.string_list) = (yyvsp[-2].string_list); - _string_list_append_item ((yyval.string_list), (yyvsp[0].str)); - ralloc_steal ((yyval.string_list), (yyvsp[0].str)); + _string_list_append_item (parser, (yyval.string_list), (yyvsp[0].str)); } -#line 2451 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2465 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 66: -#line 659 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 67: +#line 668 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.token_list) = NULL; } -#line 2457 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2471 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 68: -#line 664 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 69: +#line 673 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.token_list) = NULL; } -#line 2463 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2477 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 71: -#line 670 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 72: +#line 679 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { glcpp_error(&(yylsp[0]), parser, "extra tokens at end of directive"); } -#line 2471 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2485 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 72: -#line 676 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 73: +#line 685 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { parser->space_tokens = 1; (yyval.token_list) = _token_list_create (parser); - _token_list_append ((yyval.token_list), (yyvsp[0].token)); + _token_list_append (parser, (yyval.token_list), (yyvsp[0].token)); } -#line 2481 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2495 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 73: -#line 681 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 74: +#line 690 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.token_list) = (yyvsp[-1].token_list); - _token_list_append ((yyval.token_list), (yyvsp[0].token)); + _token_list_append (parser, (yyval.token_list), (yyvsp[0].token)); } -#line 2490 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2504 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 74: -#line 688 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 75: +#line 697 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.token) = _token_create_str (parser, IDENTIFIER, (yyvsp[0].str)); (yyval.token)->location = yylloc; } -#line 2499 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2513 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 75: -#line 692 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 76: +#line 701 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.token) = _token_create_str (parser, INTEGER_STRING, (yyvsp[0].str)); (yyval.token)->location = yylloc; } -#line 2508 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2522 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 76: -#line 696 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 77: +#line 705 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.token) = _token_create_ival (parser, (yyvsp[0].ival), (yyvsp[0].ival)); (yyval.token)->location = yylloc; } -#line 2517 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2531 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 77: -#line 700 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 78: +#line 709 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.token) = _token_create_ival (parser, DEFINED, DEFINED); (yyval.token)->location = yylloc; } -#line 2526 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2540 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 78: -#line 704 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 79: +#line 713 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.token) = _token_create_str (parser, OTHER, (yyvsp[0].str)); (yyval.token)->location = yylloc; } -#line 2535 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2549 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 79: -#line 708 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 80: +#line 717 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.token) = _token_create_ival (parser, SPACE, SPACE); (yyval.token)->location = yylloc; } -#line 2544 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2558 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 80: -#line 715 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 81: +#line 724 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = '['; } -#line 2550 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2564 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 81: -#line 716 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 82: +#line 725 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = ']'; } -#line 2556 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2570 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 82: -#line 717 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 83: +#line 726 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = '('; } -#line 2562 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2576 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 83: -#line 718 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 84: +#line 727 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = ')'; } -#line 2568 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2582 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 84: -#line 719 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 85: +#line 728 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = '{'; } -#line 2574 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2588 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 85: -#line 720 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 86: +#line 729 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = '}'; } -#line 2580 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2594 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 86: -#line 721 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 87: +#line 730 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = '.'; } -#line 2586 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2600 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 87: -#line 722 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 88: +#line 731 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = '&'; } -#line 2592 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2606 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 88: -#line 723 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 89: +#line 732 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = '*'; } -#line 2598 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2612 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 89: -#line 724 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 90: +#line 733 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = '+'; } -#line 2604 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2618 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 90: -#line 725 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 91: +#line 734 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = '-'; } -#line 2610 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2624 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 91: -#line 726 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 92: +#line 735 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = '~'; } -#line 2616 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2630 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 92: -#line 727 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 93: +#line 736 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = '!'; } -#line 2622 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2636 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 93: -#line 728 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 94: +#line 737 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = '/'; } -#line 2628 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2642 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 94: -#line 729 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 95: +#line 738 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = '%'; } -#line 2634 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2648 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 95: -#line 730 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 96: +#line 739 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = LEFT_SHIFT; } -#line 2640 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2654 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 96: -#line 731 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 97: +#line 740 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = RIGHT_SHIFT; } -#line 2646 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2660 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 97: -#line 732 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 98: +#line 741 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = '<'; } -#line 2652 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2666 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 98: -#line 733 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 99: +#line 742 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = '>'; } -#line 2658 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2672 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 99: -#line 734 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 100: +#line 743 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = LESS_OR_EQUAL; } -#line 2664 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2678 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 100: -#line 735 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 101: +#line 744 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = GREATER_OR_EQUAL; } -#line 2670 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2684 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 101: -#line 736 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 102: +#line 745 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = EQUAL; } -#line 2676 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2690 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 102: -#line 737 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 103: +#line 746 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = NOT_EQUAL; } -#line 2682 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2696 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 103: -#line 738 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 104: +#line 747 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = '^'; } -#line 2688 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2702 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 104: -#line 739 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 105: +#line 748 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = '|'; } -#line 2694 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2708 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 105: -#line 740 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 106: +#line 749 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = AND; } -#line 2700 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2714 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 106: -#line 741 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 107: +#line 750 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = OR; } -#line 2706 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2720 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 107: -#line 742 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 108: +#line 751 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = ';'; } -#line 2712 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2726 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 108: -#line 743 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 109: +#line 752 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = ','; } -#line 2718 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2732 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 109: -#line 744 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 110: +#line 753 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = '='; } -#line 2724 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2738 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 110: -#line 745 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 111: +#line 754 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = PASTE; } -#line 2730 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2744 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 111: -#line 746 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 112: +#line 755 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = PLUS_PLUS; } -#line 2736 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2750 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; - case 112: -#line 747 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ + case 113: +#line 756 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1646 */ { (yyval.ival) = MINUS_MINUS; } -#line 2742 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2756 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ break; -#line 2746 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ +#line 2760 "glsl/glcpp/glcpp-parse.c" /* yacc.c:1646 */ default: break; } /* User semantic actions sometimes alter yychar, and that requires @@ -2977,15 +2991,15 @@ #endif return yyresult; } -#line 750 "../../../src/compiler/glsl/glcpp/glcpp-parse.y" /* yacc.c:1906 */ +#line 759 "./glsl/glcpp/glcpp-parse.y" /* yacc.c:1906 */ string_list_t * -_string_list_create(void *ctx) +_string_list_create(glcpp_parser_t *parser) { string_list_t *list; - list = ralloc (ctx, string_list_t); + list = linear_alloc_child(parser->linalloc, sizeof(string_list_t)); list->head = NULL; list->tail = NULL; @@ -2993,12 +3007,13 @@ } void -_string_list_append_item(string_list_t *list, const char *str) +_string_list_append_item(glcpp_parser_t *parser, string_list_t *list, + const char *str) { string_node_t *node; - node = ralloc (list, string_node_t); - node->str = ralloc_strdup (node, str); + node = linear_alloc_child(parser->linalloc, sizeof(string_node_t)); + node->str = linear_strdup(parser->linalloc, str); node->next = NULL; @@ -3091,11 +3106,11 @@ } argument_list_t * -_argument_list_create(void *ctx) +_argument_list_create(glcpp_parser_t *parser) { argument_list_t *list; - list = ralloc (ctx, argument_list_t); + list = linear_alloc_child(parser->linalloc, sizeof(argument_list_t)); list->head = NULL; list->tail = NULL; @@ -3103,11 +3118,12 @@ } void -_argument_list_append(argument_list_t *list, token_list_t *argument) +_argument_list_append(glcpp_parser_t *parser, + argument_list_t *list, token_list_t *argument) { argument_node_t *node; - node = ralloc (list, argument_node_t); + node = linear_alloc_child(parser->linalloc, sizeof(argument_node_t)); node->argument = argument; node->next = NULL; @@ -3158,27 +3174,24 @@ return NULL; } -/* Note: This function ralloc_steal()s the str pointer. */ token_t * -_token_create_str(void *ctx, int type, char *str) +_token_create_str(glcpp_parser_t *parser, int type, char *str) { token_t *token; - token = ralloc (ctx, token_t); + token = linear_alloc_child(parser->linalloc, sizeof(token_t)); token->type = type; token->value.str = str; - ralloc_steal (token, str); - return token; } token_t * -_token_create_ival(void *ctx, int type, int ival) +_token_create_ival(glcpp_parser_t *parser, int type, int ival) { token_t *token; - token = ralloc (ctx, token_t); + token = linear_alloc_child(parser->linalloc, sizeof(token_t)); token->type = type; token->value.ival = ival; @@ -3186,11 +3199,11 @@ } token_list_t * -_token_list_create(void *ctx) +_token_list_create(glcpp_parser_t *parser) { token_list_t *list; - list = ralloc (ctx, token_list_t); + list = linear_alloc_child(parser->linalloc, sizeof(token_list_t)); list->head = NULL; list->tail = NULL; list->non_space_tail = NULL; @@ -3199,11 +3212,11 @@ } void -_token_list_append(token_list_t *list, token_t *token) +_token_list_append(glcpp_parser_t *parser, token_list_t *list, token_t *token) { token_node_t *node; - node = ralloc (list, token_node_t); + node = linear_alloc_child(parser->linalloc, sizeof(token_node_t)); node->token = token; node->next = NULL; @@ -3235,7 +3248,7 @@ } static token_list_t * -_token_list_copy(void *ctx, token_list_t *other) +_token_list_copy(glcpp_parser_t *parser, token_list_t *other) { token_list_t *copy; token_node_t *node; @@ -3243,11 +3256,11 @@ if (other == NULL) return NULL; - copy = _token_list_create (ctx); + copy = _token_list_create (parser); for (node = other->head; node; node = node->next) { - token_t *new_token = ralloc (copy, token_t); + token_t *new_token = linear_alloc_child(parser->linalloc, sizeof(token_t)); *new_token = *node->token; - _token_list_append (copy, new_token); + _token_list_append (parser, copy, new_token); } return copy; @@ -3256,18 +3269,9 @@ static void _token_list_trim_trailing_space(token_list_t *list) { - token_node_t *tail, *next; - if (list->non_space_tail) { - tail = list->non_space_tail->next; list->non_space_tail->next = NULL; list->tail = list->non_space_tail; - - while (tail) { - next = tail->next; - ralloc_free (tail); - tail = next; - } } } @@ -3410,9 +3414,9 @@ } } -/* Return a new token (ralloc()ed off of 'token') formed by pasting - * 'token' and 'other'. Note that this function may return 'token' or - * 'other' directly rather than allocating anything new. +/* Return a new token formed by pasting 'token' and 'other'. Note that this + * function may return 'token' or 'other' directly rather than allocating + * anything new. * * Caution: Only very cursory error-checking is performed to see if * the final result is a valid single token. */ @@ -3434,31 +3438,31 @@ switch (token->type) { case '<': if (other->type == '<') - combined = _token_create_ival (token, LEFT_SHIFT, LEFT_SHIFT); + combined = _token_create_ival (parser, LEFT_SHIFT, LEFT_SHIFT); else if (other->type == '=') - combined = _token_create_ival (token, LESS_OR_EQUAL, LESS_OR_EQUAL); + combined = _token_create_ival (parser, LESS_OR_EQUAL, LESS_OR_EQUAL); break; case '>': if (other->type == '>') - combined = _token_create_ival (token, RIGHT_SHIFT, RIGHT_SHIFT); + combined = _token_create_ival (parser, RIGHT_SHIFT, RIGHT_SHIFT); else if (other->type == '=') - combined = _token_create_ival (token, GREATER_OR_EQUAL, GREATER_OR_EQUAL); + combined = _token_create_ival (parser, GREATER_OR_EQUAL, GREATER_OR_EQUAL); break; case '=': if (other->type == '=') - combined = _token_create_ival (token, EQUAL, EQUAL); + combined = _token_create_ival (parser, EQUAL, EQUAL); break; case '!': if (other->type == '=') - combined = _token_create_ival (token, NOT_EQUAL, NOT_EQUAL); + combined = _token_create_ival (parser, NOT_EQUAL, NOT_EQUAL); break; case '&': if (other->type == '&') - combined = _token_create_ival (token, AND, AND); + combined = _token_create_ival (parser, AND, AND); break; case '|': if (other->type == '|') - combined = _token_create_ival (token, OR, OR); + combined = _token_create_ival (parser, OR, OR); break; } @@ -3502,14 +3506,14 @@ } if (token->type == INTEGER) - str = ralloc_asprintf (token, "%" PRIiMAX, token->value.ival); + str = linear_asprintf(parser->linalloc, "%" PRIiMAX, token->value.ival); else - str = ralloc_strdup (token, token->value.str); + str = linear_strdup(parser->linalloc, token->value.str); if (other->type == INTEGER) - ralloc_asprintf_append (&str, "%" PRIiMAX, other->value.ival); + linear_asprintf_append(parser->linalloc, &str, "%" PRIiMAX, other->value.ival); else - ralloc_strcat (&str, other->value.str); + linear_strcat(parser->linalloc, &str, other->value.str); /* New token is same type as original token, unless we * started with an integer, in which case we will be @@ -3518,7 +3522,7 @@ if (combined_type == INTEGER) combined_type = INTEGER_STRING; - combined = _token_create_str (token, combined_type, str); + combined = _token_create_str (parser, combined_type, str); combined->location = token->location; return combined; } @@ -3561,22 +3565,24 @@ tok = _token_create_ival (parser, INTEGER, value); list = _token_list_create(parser); - _token_list_append(list, tok); + _token_list_append(parser, list, tok); _define_object_macro(parser, NULL, name, list); } glcpp_parser_t * -glcpp_parser_create(const struct gl_extensions *extensions, gl_api api) +glcpp_parser_create(glcpp_extension_iterator extensions, void *state, gl_api api) { glcpp_parser_t *parser; parser = ralloc (NULL, glcpp_parser_t); glcpp_lex_init_extra (parser, &parser->scanner); - parser->defines = hash_table_ctor(32, hash_table_string_hash, - hash_table_string_compare); + parser->defines = _mesa_hash_table_create(NULL, _mesa_key_hash_string, + _mesa_key_string_equal); + parser->linalloc = linear_alloc_parent(parser, 0); parser->active = NULL; parser->lexing_directive = 0; + parser->lexing_version_directive = 0; parser->space_tokens = 1; parser->last_token_was_newline = 0; parser->last_token_was_space = 0; @@ -3599,14 +3605,18 @@ parser->error = 0; parser->extensions = extensions; + parser->state = state; parser->api = api; parser->version = 0; + parser->version_set = false; parser->has_new_line_number = 0; parser->new_line_number = 1; parser->has_new_source_number = 0; parser->new_source_number = 0; + parser->is_gles = false; + return parser; } @@ -3614,7 +3624,7 @@ glcpp_parser_destroy(glcpp_parser_t *parser) { glcpp_lex_destroy (parser->scanner); - hash_table_dtor (parser->defines); + _mesa_hash_table_destroy(parser->defines, NULL); ralloc_free (parser); } @@ -3649,7 +3659,8 @@ * Macro name is not followed by a balanced set of parentheses. */ static function_status_t -_arguments_parse(argument_list_t *arguments, token_node_t *node, +_arguments_parse(glcpp_parser_t *parser, + argument_list_t *arguments, token_node_t *node, token_node_t **last) { token_list_t *argument; @@ -3666,8 +3677,8 @@ node = node->next; - argument = _token_list_create (arguments); - _argument_list_append (arguments, argument); + argument = _token_list_create (parser); + _argument_list_append (parser, arguments, argument); for (paren_count = 1; node; node = node->next) { if (node->token->type == '(') { @@ -3680,15 +3691,15 @@ if (node->token->type == ',' && paren_count == 1) { _token_list_trim_trailing_space (argument); - argument = _token_list_create (arguments); - _argument_list_append (arguments, argument); + argument = _token_list_create (parser); + _argument_list_append (parser, arguments, argument); } else { if (argument->head == NULL) { /* Don't treat initial whitespace as part of the argument. */ if (node->token->type == SPACE) continue; } - _token_list_append (argument, node->token); + _token_list_append(parser, argument, node->token); } } @@ -3701,28 +3712,28 @@ } static token_list_t * -_token_list_create_with_one_ival(void *ctx, int type, int ival) +_token_list_create_with_one_ival(glcpp_parser_t *parser, int type, int ival) { token_list_t *list; token_t *node; - list = _token_list_create(ctx); - node = _token_create_ival(list, type, ival); - _token_list_append(list, node); + list = _token_list_create(parser); + node = _token_create_ival(parser, type, ival); + _token_list_append(parser, list, node); return list; } static token_list_t * -_token_list_create_with_one_space(void *ctx) +_token_list_create_with_one_space(glcpp_parser_t *parser) { - return _token_list_create_with_one_ival(ctx, SPACE, SPACE); + return _token_list_create_with_one_ival(parser, SPACE, SPACE); } static token_list_t * -_token_list_create_with_one_integer(void *ctx, int ival) +_token_list_create_with_one_integer(glcpp_parser_t *parser, int ival) { - return _token_list_create_with_one_ival(ctx, INTEGER, ival); + return _token_list_create_with_one_ival(parser, INTEGER, ival); } /* Evaluate a DEFINED token node (based on subsequent tokens in the list). @@ -3793,8 +3804,8 @@ *last = node; - return hash_table_find(parser->defines, - argument->token->value.str) ? 1 : 0; + return _mesa_hash_table_search(parser->defines, + argument->token->value.str) ? 1 : 0; FAIL: glcpp_error (&defined->token->location, parser, @@ -3826,8 +3837,8 @@ if (value == -1) goto NEXT; - replacement = ralloc (list, token_node_t); - replacement->token = _token_create_ival (list, INTEGER, value); + replacement = linear_alloc_child(parser->linalloc, sizeof(token_node_t)); + replacement->token = _token_create_ival (parser, INTEGER, value); /* Splice replacement node into list, replacing from "node" * through "last". */ @@ -3864,7 +3875,7 @@ expanded = _token_list_create (parser); token = _token_create_ival (parser, head_token_type, head_token_type); - _token_list_append (expanded, token); + _token_list_append (parser, expanded, token); _glcpp_parser_expand_token_list (parser, list, mode); _token_list_append_list (expanded, list); glcpp_parser_lex_from (parser, expanded); @@ -3935,6 +3946,7 @@ _glcpp_parser_expand_function(glcpp_parser_t *parser, token_node_t *node, token_node_t **last, expansion_mode_t mode) { + struct hash_entry *entry; macro_t *macro; const char *identifier; argument_list_t *arguments; @@ -3944,12 +3956,13 @@ identifier = node->token->value.str; - macro = hash_table_find(parser->defines, identifier); + entry = _mesa_hash_table_search(parser->defines, identifier); + macro = entry ? entry->data : NULL; assert(macro->is_function); arguments = _argument_list_create(parser); - status = _arguments_parse(arguments, node, last); + status = _arguments_parse(parser, arguments, node, last); switch (status) { case FUNCTION_STATUS_SUCCESS: @@ -3963,7 +3976,6 @@ /* Replace a macro defined as empty with a SPACE token. */ if (macro->replacements == NULL) { - ralloc_free(arguments); return _token_list_create_with_one_space(parser); } @@ -3980,7 +3992,7 @@ } /* Perform argument substitution on the replacement list. */ - substituted = _token_list_create(arguments); + substituted = _token_list_create(parser); for (node = macro->replacements->head; node; node = node->next) { if (node->token->type == IDENTIFIER && @@ -3998,12 +4010,12 @@ } else { token_t *new_token; - new_token = _token_create_ival(substituted, PLACEHOLDER, + new_token = _token_create_ival(parser, PLACEHOLDER, PLACEHOLDER); - _token_list_append(substituted, new_token); + _token_list_append(parser, substituted, new_token); } } else { - _token_list_append(substituted, node->token); + _token_list_append(parser, substituted, node->token); } } @@ -4041,6 +4053,7 @@ { token_t *token = node->token; const char *identifier; + struct hash_entry *entry; macro_t *macro; /* We only expand identifiers */ @@ -4060,7 +4073,8 @@ return _token_list_create_with_one_integer(parser, node->token->location.source); /* Look up this identifier in the hash table. */ - macro = hash_table_find(parser->defines, identifier); + entry = _mesa_hash_table_search(parser->defines, identifier); + macro = entry ? entry->data : NULL; /* Not a macro, so no expansion needed. */ if (macro == NULL) @@ -4075,10 +4089,10 @@ token_list_t *expansion; token_t *final; - str = ralloc_strdup(parser, token->value.str); + str = linear_strdup(parser->linalloc, token->value.str); final = _token_create_str(parser, OTHER, str); expansion = _token_list_create(parser); - _token_list_append(expansion, final); + _token_list_append(parser, expansion, final); return expansion; } @@ -4110,8 +4124,8 @@ { active_list_t *node; - node = ralloc(parser->active, active_list_t); - node->identifier = ralloc_strdup(node, identifier); + node = linear_alloc_child(parser->linalloc, sizeof(active_list_t)); + node->identifier = linear_strdup(parser->linalloc, identifier); node->marker = marker; node->next = parser->active; @@ -4129,8 +4143,6 @@ } node = parser->active->next; - ralloc_free (parser->active); - parser->active = node; } @@ -4310,6 +4322,7 @@ const char *identifier, token_list_t *replacements) { macro_t *macro, *previous; + struct hash_entry *entry; /* We define pre-defined macros before we've started parsing the actual * file. So if there's no location defined yet, that's what were doing and @@ -4317,24 +4330,23 @@ if (loc != NULL) _check_for_reserved_macro_name(parser, loc, identifier); - macro = ralloc (parser, macro_t); + macro = linear_alloc_child(parser->linalloc, sizeof(macro_t)); macro->is_function = 0; macro->parameters = NULL; - macro->identifier = ralloc_strdup (macro, identifier); + macro->identifier = linear_strdup(parser->linalloc, identifier); macro->replacements = replacements; - ralloc_steal (macro, replacements); - previous = hash_table_find (parser->defines, identifier); + entry = _mesa_hash_table_search(parser->defines, identifier); + previous = entry ? entry->data : NULL; if (previous) { if (_macro_equal (macro, previous)) { - ralloc_free (macro); return; } glcpp_error (loc, parser, "Redefinition of macro %s\n", identifier); } - hash_table_insert (parser->defines, macro, identifier); + _mesa_hash_table_insert (parser->defines, identifier, macro); } void @@ -4343,6 +4355,7 @@ token_list_t *replacements) { macro_t *macro, *previous; + struct hash_entry *entry; const char *dup; _check_for_reserved_macro_name(parser, loc, identifier); @@ -4352,24 +4365,23 @@ glcpp_error (loc, parser, "Duplicate macro parameter \"%s\"", dup); } - macro = ralloc (parser, macro_t); - ralloc_steal (macro, parameters); - ralloc_steal (macro, replacements); + macro = linear_alloc_child(parser->linalloc, sizeof(macro_t)); macro->is_function = 1; macro->parameters = parameters; - macro->identifier = ralloc_strdup (macro, identifier); + macro->identifier = linear_strdup(parser->linalloc, identifier); macro->replacements = replacements; - previous = hash_table_find (parser->defines, identifier); + + entry = _mesa_hash_table_search(parser->defines, identifier); + previous = entry ? entry->data : NULL; if (previous) { if (_macro_equal (macro, previous)) { - ralloc_free (macro); return; } glcpp_error (loc, parser, "Redefinition of macro %s\n", identifier); } - hash_table_insert(parser->defines, macro, identifier); + _mesa_hash_table_insert(parser->defines, identifier, macro); } static int @@ -4415,9 +4427,9 @@ ret == ENDIF || ret == HASH_TOKEN) { parser->in_control_line = 1; } else if (ret == IDENTIFIER) { - macro_t *macro; - macro = hash_table_find (parser->defines, - yylval->str); + struct hash_entry *entry = _mesa_hash_table_search(parser->defines, + yylval->str); + macro_t *macro = entry ? entry->data : NULL; if (macro && macro->is_function) { parser->newline_as_space = 1; parser->paren_count = 0; @@ -4430,7 +4442,6 @@ node = parser->lex_from_node; if (node == NULL) { - ralloc_free (parser->lex_from_list); parser->lex_from_list = NULL; return NEWLINE; } @@ -4456,16 +4467,13 @@ for (node = list->head; node; node = node->next) { if (node->token->type == SPACE) continue; - _token_list_append (parser->lex_from_list, node->token); + _token_list_append (parser, parser->lex_from_list, node->token); } - ralloc_free (list); - parser->lex_from_node = parser->lex_from_list->head; /* It's possible the list consisted of nothing but whitespace. */ if (parser->lex_from_node == NULL) { - ralloc_free (parser->lex_from_list); parser->lex_from_list = NULL; } } @@ -4480,7 +4488,7 @@ if (parser->skip_stack) current = parser->skip_stack->type; - node = ralloc (parser, skip_node_t); + node = linear_alloc_child(parser->linalloc, sizeof(skip_node_t)); node->loc = *loc; if (current == SKIP_NO_SKIP) { @@ -4526,7 +4534,6 @@ node = parser->skip_stack; parser->skip_stack = node->next; - ralloc_free (node); } static void @@ -4534,12 +4541,11 @@ const char *es_identifier, bool explicitly_set) { - const struct gl_extensions *extensions = parser->extensions; - - if (parser->version != 0) + if (parser->version_set) return; parser->version = version; + parser->version_set = true; add_builtin_define (parser, "__VERSION__", version); @@ -4547,193 +4553,9 @@ (es_identifier && (strcmp(es_identifier, "es") == 0)); /* Add pre-defined macros. */ - if (parser->is_gles) { + if (parser->is_gles) add_builtin_define(parser, "GL_ES", 1); - add_builtin_define(parser, "GL_EXT_separate_shader_objects", 1); - add_builtin_define(parser, "GL_EXT_draw_buffers", 1); - - if (extensions != NULL) { - if (extensions->OES_EGL_image_external) - add_builtin_define(parser, "GL_OES_EGL_image_external", 1); - if (extensions->OES_sample_variables) { - add_builtin_define(parser, "GL_OES_sample_variables", 1); - add_builtin_define(parser, "GL_OES_shader_multisample_interpolation", 1); - } - if (extensions->OES_standard_derivatives) - add_builtin_define(parser, "GL_OES_standard_derivatives", 1); - if (extensions->ARB_texture_multisample) - add_builtin_define(parser, "GL_OES_texture_storage_multisample_2d_array", 1); - if (extensions->ARB_blend_func_extended) - add_builtin_define(parser, "GL_EXT_blend_func_extended", 1); - if (extensions->ARB_cull_distance) - add_builtin_define(parser, "GL_EXT_clip_cull_distance", 1); - - if (version >= 310) { - if (extensions->ARB_shader_image_load_store) - add_builtin_define(parser, "GL_OES_shader_image_atomic", 1); - - if (extensions->OES_geometry_shader) { - add_builtin_define(parser, "GL_OES_geometry_point_size", 1); - add_builtin_define(parser, "GL_OES_geometry_shader", 1); - } - if (extensions->ARB_gpu_shader5) { - add_builtin_define(parser, "GL_EXT_gpu_shader5", 1); - add_builtin_define(parser, "GL_OES_gpu_shader5", 1); - } - if (extensions->OES_texture_buffer) { - add_builtin_define(parser, "GL_EXT_texture_buffer", 1); - add_builtin_define(parser, "GL_OES_texture_buffer", 1); - } - - if (extensions->OES_shader_io_blocks) { - add_builtin_define(parser, "GL_EXT_shader_io_blocks", 1); - add_builtin_define(parser, "GL_OES_shader_io_blocks", 1); - } - } - } - } else { - add_builtin_define(parser, "GL_ARB_draw_buffers", 1); - add_builtin_define(parser, "GL_ARB_enhanced_layouts", 1); - add_builtin_define(parser, "GL_ARB_separate_shader_objects", 1); - add_builtin_define(parser, "GL_ARB_texture_rectangle", 1); - add_builtin_define(parser, "GL_AMD_shader_trinary_minmax", 1); - - if (extensions != NULL) { - if (extensions->EXT_texture_array) - add_builtin_define(parser, "GL_EXT_texture_array", 1); - - if (extensions->ARB_ES3_1_compatibility) - add_builtin_define(parser, "GL_ARB_ES3_1_compatibility", 1); - - if (extensions->ARB_arrays_of_arrays) - add_builtin_define(parser, "GL_ARB_arrays_of_arrays", 1); - - if (extensions->ARB_fragment_coord_conventions) { - add_builtin_define(parser, "GL_ARB_fragment_coord_conventions", - 1); - } - - if (extensions->ARB_fragment_layer_viewport) - add_builtin_define(parser, "GL_ARB_fragment_layer_viewport", 1); - - if (extensions->ARB_explicit_attrib_location) - add_builtin_define(parser, "GL_ARB_explicit_attrib_location", 1); - - if (extensions->ARB_explicit_uniform_location) - add_builtin_define(parser, "GL_ARB_explicit_uniform_location", 1); - - if (extensions->ARB_shader_texture_lod) - add_builtin_define(parser, "GL_ARB_shader_texture_lod", 1); - - if (extensions->ARB_draw_instanced) - add_builtin_define(parser, "GL_ARB_draw_instanced", 1); - - if (extensions->ARB_conservative_depth) { - add_builtin_define(parser, "GL_AMD_conservative_depth", 1); - add_builtin_define(parser, "GL_ARB_conservative_depth", 1); - } - - if (extensions->ARB_shader_bit_encoding) - add_builtin_define(parser, "GL_ARB_shader_bit_encoding", 1); - - if (extensions->ARB_shader_clock) - add_builtin_define(parser, "GL_ARB_shader_clock", 1); - - if (extensions->ARB_uniform_buffer_object) - add_builtin_define(parser, "GL_ARB_uniform_buffer_object", 1); - - if (extensions->ARB_texture_cube_map_array) - add_builtin_define(parser, "GL_ARB_texture_cube_map_array", 1); - - if (extensions->ARB_shading_language_packing) - add_builtin_define(parser, "GL_ARB_shading_language_packing", 1); - - if (extensions->ARB_texture_multisample) - add_builtin_define(parser, "GL_ARB_texture_multisample", 1); - - if (extensions->ARB_texture_query_levels) - add_builtin_define(parser, "GL_ARB_texture_query_levels", 1); - - if (extensions->ARB_texture_query_lod) - add_builtin_define(parser, "GL_ARB_texture_query_lod", 1); - - if (extensions->ARB_gpu_shader5) - add_builtin_define(parser, "GL_ARB_gpu_shader5", 1); - - if (extensions->ARB_gpu_shader_fp64) - add_builtin_define(parser, "GL_ARB_gpu_shader_fp64", 1); - - if (extensions->ARB_vertex_attrib_64bit) - add_builtin_define(parser, "GL_ARB_vertex_attrib_64bit", 1); - - if (extensions->AMD_vertex_shader_layer) - add_builtin_define(parser, "GL_AMD_vertex_shader_layer", 1); - - if (extensions->AMD_vertex_shader_viewport_index) - add_builtin_define(parser, "GL_AMD_vertex_shader_viewport_index", 1); - - if (extensions->ARB_shading_language_420pack) - add_builtin_define(parser, "GL_ARB_shading_language_420pack", 1); - - if (extensions->ARB_sample_shading) - add_builtin_define(parser, "GL_ARB_sample_shading", 1); - - if (extensions->ARB_texture_gather) - add_builtin_define(parser, "GL_ARB_texture_gather", 1); - - if (extensions->ARB_shader_atomic_counters) - add_builtin_define(parser, "GL_ARB_shader_atomic_counters", 1); - - if (extensions->ARB_shader_atomic_counter_ops) - add_builtin_define(parser, "GL_ARB_shader_atomic_counter_ops", 1); - - if (extensions->ARB_viewport_array) - add_builtin_define(parser, "GL_ARB_viewport_array", 1); - - if (extensions->ARB_compute_shader) - add_builtin_define(parser, "GL_ARB_compute_shader", 1); - - if (extensions->ARB_shader_image_load_store) - add_builtin_define(parser, "GL_ARB_shader_image_load_store", 1); - - if (extensions->ARB_shader_image_size) - add_builtin_define(parser, "GL_ARB_shader_image_size", 1); - - if (extensions->ARB_shader_texture_image_samples) - add_builtin_define(parser, "GL_ARB_shader_texture_image_samples", 1); - - if (extensions->ARB_derivative_control) - add_builtin_define(parser, "GL_ARB_derivative_control", 1); - - if (extensions->ARB_shader_precision) - add_builtin_define(parser, "GL_ARB_shader_precision", 1); - - if (extensions->ARB_shader_storage_buffer_object) - add_builtin_define(parser, "GL_ARB_shader_storage_buffer_object", 1); - - if (extensions->ARB_tessellation_shader) - add_builtin_define(parser, "GL_ARB_tessellation_shader", 1); - - if (extensions->ARB_shader_subroutine) - add_builtin_define(parser, "GL_ARB_shader_subroutine", 1); - - if (extensions->ARB_shader_draw_parameters) - add_builtin_define(parser, "GL_ARB_shader_draw_parameters", 1); - - if (extensions->ARB_cull_distance) - add_builtin_define(parser, "GL_ARB_cull_distance", 1); - } - } - - if (extensions != NULL) { - if (extensions->EXT_shader_integer_mix) - add_builtin_define(parser, "GL_EXT_shader_integer_mix", 1); - - if (extensions->EXT_shader_samples_identical) - add_builtin_define(parser, "GL_EXT_shader_samples_identical", 1); - } - - if (version >= 150) + else if (version >= 150) add_builtin_define(parser, "GL_core_profile", 1); /* Currently, all ES2/ES3 implementations support highp in the @@ -4744,6 +4566,11 @@ if (version >= 130 || parser->is_gles) add_builtin_define (parser, "GL_FRAGMENT_PRECISION_HIGH", 1); + /* Add all the extension macros available in this context */ + if (parser->extensions) + parser->extensions(parser->state, add_builtin_define, parser, + version, parser->is_gles); + if (explicitly_set) { ralloc_asprintf_rewrite_tail(&parser->output, &parser->output_length, "#version %" PRIiMAX "%s%s", version, diff -Nru mesa-12.0.6/src/compiler/glsl/glcpp/glcpp-parse.y mesa-17.0.7/src/compiler/glsl/glcpp/glcpp-parse.y --- mesa-12.0.6/src/compiler/glsl/glcpp/glcpp-parse.y 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/glcpp/glcpp-parse.y 2017-06-01 10:37:10.000000000 +0000 @@ -49,10 +49,11 @@ token_list_t *replacements); static string_list_t * -_string_list_create(void *ctx); +_string_list_create(glcpp_parser_t *parser); static void -_string_list_append_item(string_list_t *list, const char *str); +_string_list_append_item(glcpp_parser_t *parser, string_list_t *list, + const char *str); static int _string_list_contains(string_list_t *list, const char *member, int *index); @@ -67,10 +68,11 @@ _string_list_equal(string_list_t *a, string_list_t *b); static argument_list_t * -_argument_list_create(void *ctx); +_argument_list_create(glcpp_parser_t *parser); static void -_argument_list_append(argument_list_t *list, token_list_t *argument); +_argument_list_append(glcpp_parser_t *parser, argument_list_t *list, + token_list_t *argument); static int _argument_list_length(argument_list_t *list); @@ -78,18 +80,17 @@ static token_list_t * _argument_list_member_at(argument_list_t *list, int index); -/* Note: This function ralloc_steal()s the str pointer. */ static token_t * -_token_create_str(void *ctx, int type, char *str); +_token_create_str(glcpp_parser_t *parser, int type, char *str); static token_t * -_token_create_ival(void *ctx, int type, int ival); +_token_create_ival(glcpp_parser_t *parser, int type, int ival); static token_list_t * -_token_list_create(void *ctx); +_token_list_create(glcpp_parser_t *parser); static void -_token_list_append(token_list_t *list, token_t *token); +_token_list_append(glcpp_parser_t *parser, token_list_t *list, token_t *token); static void _token_list_append_list(token_list_t *list, token_list_t *tail); @@ -176,7 +177,7 @@ * (such as the and start conditions in the lexer). */ %token DEFINED ELIF_EXPANDED HASH_TOKEN DEFINE_TOKEN FUNC_IDENTIFIER OBJ_IDENTIFIER ELIF ELSE ENDIF ERROR_TOKEN IF IFDEF IFNDEF LINE PRAGMA UNDEF VERSION_TOKEN GARBAGE IDENTIFIER IF_EXPANDED INTEGER INTEGER_STRING LINE_EXPANDED NEWLINE OTHER PLACEHOLDER SPACE PLUS_PLUS MINUS_MINUS %token PASTE -%type INTEGER operator SPACE integer_constant +%type INTEGER operator SPACE integer_constant version_constant %type expression %type IDENTIFIER FUNC_IDENTIFIER OBJ_IDENTIFIER INTEGER_STRING OTHER ERROR_TOKEN PRAGMA %type identifier_list @@ -209,7 +210,6 @@ | text_line { _glcpp_parser_print_expanded_token_list (parser, $1); ralloc_asprintf_rewrite_tail (&parser->output, &parser->output_length, "\n"); - ralloc_free ($1); } | expanded_line ; @@ -277,7 +277,7 @@ control_line_success: HASH_TOKEN DEFINE_TOKEN define | HASH_TOKEN UNDEF IDENTIFIER NEWLINE { - macro_t *macro; + struct hash_entry *entry; /* Section 3.4 (Preprocessor) of the GLSL ES 3.00 spec says: * @@ -309,12 +309,10 @@ glcpp_error(& @1, parser, "Built-in (pre-defined)" " macro names cannot be undefined."); - macro = hash_table_find (parser->defines, $3); - if (macro) { - hash_table_remove (parser->defines, $3); - ralloc_free (macro); + entry = _mesa_hash_table_search (parser->defines, $3); + if (entry) { + _mesa_hash_table_remove (parser->defines, entry); } - ralloc_free ($3); } | HASH_TOKEN IF pp_tokens NEWLINE { /* Be careful to only evaluate the 'if' expression if @@ -348,13 +346,15 @@ _glcpp_parser_skip_stack_push_if (parser, & @1, 0); } | HASH_TOKEN IFDEF IDENTIFIER junk NEWLINE { - macro_t *macro = hash_table_find (parser->defines, $3); - ralloc_free ($3); + struct hash_entry *entry = + _mesa_hash_table_search(parser->defines, $3); + macro_t *macro = entry ? entry->data : NULL; _glcpp_parser_skip_stack_push_if (parser, & @1, macro != NULL); } | HASH_TOKEN IFNDEF IDENTIFIER junk NEWLINE { - macro_t *macro = hash_table_find (parser->defines, $3); - ralloc_free ($3); + struct hash_entry *entry = + _mesa_hash_table_search(parser->defines, $3); + macro_t *macro = entry ? entry->data : NULL; _glcpp_parser_skip_stack_push_if (parser, & @3, macro == NULL); } | HASH_TOKEN ELIF pp_tokens NEWLINE { @@ -419,14 +419,14 @@ | HASH_TOKEN ENDIF { _glcpp_parser_skip_stack_pop (parser, & @1); } NEWLINE -| HASH_TOKEN VERSION_TOKEN integer_constant NEWLINE { - if (parser->version != 0) { +| HASH_TOKEN VERSION_TOKEN version_constant NEWLINE { + if (parser->version_set) { glcpp_error(& @1, parser, "#version must appear on the first line"); } _glcpp_parser_handle_version_declaration(parser, $3, NULL, true); } -| HASH_TOKEN VERSION_TOKEN integer_constant IDENTIFIER NEWLINE { - if (parser->version != 0) { +| HASH_TOKEN VERSION_TOKEN version_constant IDENTIFIER NEWLINE { + if (parser->version_set) { glcpp_error(& @1, parser, "#version must appear on the first line"); } _glcpp_parser_handle_version_declaration(parser, $3, $4, true); @@ -465,6 +465,17 @@ $$ = $1; } +version_constant: + INTEGER_STRING { + /* Both octal and hexadecimal constants begin with 0. */ + if ($1[0] == '0' && $1[1] != '\0') { + glcpp_error(&@1, parser, "invalid #version \"%s\" (not a decimal constant)", $1); + $$ = 0; + } else { + $$ = strtoll($1, NULL, 10); + } + } + expression: integer_constant { $$.value = $1; @@ -473,7 +484,7 @@ | IDENTIFIER { $$.value = 0; if (parser->is_gles) - $$.undefined_macro = ralloc_strdup (parser, $1); + $$.undefined_macro = linear_strdup(parser->linalloc, $1); else $$.undefined_macro = NULL; } @@ -645,13 +656,11 @@ identifier_list: IDENTIFIER { $$ = _string_list_create (parser); - _string_list_append_item ($$, $1); - ralloc_steal ($$, $1); + _string_list_append_item (parser, $$, $1); } | identifier_list ',' IDENTIFIER { $$ = $1; - _string_list_append_item ($$, $3); - ralloc_steal ($$, $3); + _string_list_append_item (parser, $$, $3); } ; @@ -676,11 +685,11 @@ preprocessing_token { parser->space_tokens = 1; $$ = _token_list_create (parser); - _token_list_append ($$, $1); + _token_list_append (parser, $$, $1); } | pp_tokens preprocessing_token { $$ = $1; - _token_list_append ($$, $2); + _token_list_append (parser, $$, $2); } ; @@ -750,11 +759,11 @@ %% string_list_t * -_string_list_create(void *ctx) +_string_list_create(glcpp_parser_t *parser) { string_list_t *list; - list = ralloc (ctx, string_list_t); + list = linear_alloc_child(parser->linalloc, sizeof(string_list_t)); list->head = NULL; list->tail = NULL; @@ -762,12 +771,13 @@ } void -_string_list_append_item(string_list_t *list, const char *str) +_string_list_append_item(glcpp_parser_t *parser, string_list_t *list, + const char *str) { string_node_t *node; - node = ralloc (list, string_node_t); - node->str = ralloc_strdup (node, str); + node = linear_alloc_child(parser->linalloc, sizeof(string_node_t)); + node->str = linear_strdup(parser->linalloc, str); node->next = NULL; @@ -860,11 +870,11 @@ } argument_list_t * -_argument_list_create(void *ctx) +_argument_list_create(glcpp_parser_t *parser) { argument_list_t *list; - list = ralloc (ctx, argument_list_t); + list = linear_alloc_child(parser->linalloc, sizeof(argument_list_t)); list->head = NULL; list->tail = NULL; @@ -872,11 +882,12 @@ } void -_argument_list_append(argument_list_t *list, token_list_t *argument) +_argument_list_append(glcpp_parser_t *parser, + argument_list_t *list, token_list_t *argument) { argument_node_t *node; - node = ralloc (list, argument_node_t); + node = linear_alloc_child(parser->linalloc, sizeof(argument_node_t)); node->argument = argument; node->next = NULL; @@ -927,27 +938,24 @@ return NULL; } -/* Note: This function ralloc_steal()s the str pointer. */ token_t * -_token_create_str(void *ctx, int type, char *str) +_token_create_str(glcpp_parser_t *parser, int type, char *str) { token_t *token; - token = ralloc (ctx, token_t); + token = linear_alloc_child(parser->linalloc, sizeof(token_t)); token->type = type; token->value.str = str; - ralloc_steal (token, str); - return token; } token_t * -_token_create_ival(void *ctx, int type, int ival) +_token_create_ival(glcpp_parser_t *parser, int type, int ival) { token_t *token; - token = ralloc (ctx, token_t); + token = linear_alloc_child(parser->linalloc, sizeof(token_t)); token->type = type; token->value.ival = ival; @@ -955,11 +963,11 @@ } token_list_t * -_token_list_create(void *ctx) +_token_list_create(glcpp_parser_t *parser) { token_list_t *list; - list = ralloc (ctx, token_list_t); + list = linear_alloc_child(parser->linalloc, sizeof(token_list_t)); list->head = NULL; list->tail = NULL; list->non_space_tail = NULL; @@ -968,11 +976,11 @@ } void -_token_list_append(token_list_t *list, token_t *token) +_token_list_append(glcpp_parser_t *parser, token_list_t *list, token_t *token) { token_node_t *node; - node = ralloc (list, token_node_t); + node = linear_alloc_child(parser->linalloc, sizeof(token_node_t)); node->token = token; node->next = NULL; @@ -1004,7 +1012,7 @@ } static token_list_t * -_token_list_copy(void *ctx, token_list_t *other) +_token_list_copy(glcpp_parser_t *parser, token_list_t *other) { token_list_t *copy; token_node_t *node; @@ -1012,11 +1020,11 @@ if (other == NULL) return NULL; - copy = _token_list_create (ctx); + copy = _token_list_create (parser); for (node = other->head; node; node = node->next) { - token_t *new_token = ralloc (copy, token_t); + token_t *new_token = linear_alloc_child(parser->linalloc, sizeof(token_t)); *new_token = *node->token; - _token_list_append (copy, new_token); + _token_list_append (parser, copy, new_token); } return copy; @@ -1025,18 +1033,9 @@ static void _token_list_trim_trailing_space(token_list_t *list) { - token_node_t *tail, *next; - if (list->non_space_tail) { - tail = list->non_space_tail->next; list->non_space_tail->next = NULL; list->tail = list->non_space_tail; - - while (tail) { - next = tail->next; - ralloc_free (tail); - tail = next; - } } } @@ -1179,9 +1178,9 @@ } } -/* Return a new token (ralloc()ed off of 'token') formed by pasting - * 'token' and 'other'. Note that this function may return 'token' or - * 'other' directly rather than allocating anything new. +/* Return a new token formed by pasting 'token' and 'other'. Note that this + * function may return 'token' or 'other' directly rather than allocating + * anything new. * * Caution: Only very cursory error-checking is performed to see if * the final result is a valid single token. */ @@ -1203,31 +1202,31 @@ switch (token->type) { case '<': if (other->type == '<') - combined = _token_create_ival (token, LEFT_SHIFT, LEFT_SHIFT); + combined = _token_create_ival (parser, LEFT_SHIFT, LEFT_SHIFT); else if (other->type == '=') - combined = _token_create_ival (token, LESS_OR_EQUAL, LESS_OR_EQUAL); + combined = _token_create_ival (parser, LESS_OR_EQUAL, LESS_OR_EQUAL); break; case '>': if (other->type == '>') - combined = _token_create_ival (token, RIGHT_SHIFT, RIGHT_SHIFT); + combined = _token_create_ival (parser, RIGHT_SHIFT, RIGHT_SHIFT); else if (other->type == '=') - combined = _token_create_ival (token, GREATER_OR_EQUAL, GREATER_OR_EQUAL); + combined = _token_create_ival (parser, GREATER_OR_EQUAL, GREATER_OR_EQUAL); break; case '=': if (other->type == '=') - combined = _token_create_ival (token, EQUAL, EQUAL); + combined = _token_create_ival (parser, EQUAL, EQUAL); break; case '!': if (other->type == '=') - combined = _token_create_ival (token, NOT_EQUAL, NOT_EQUAL); + combined = _token_create_ival (parser, NOT_EQUAL, NOT_EQUAL); break; case '&': if (other->type == '&') - combined = _token_create_ival (token, AND, AND); + combined = _token_create_ival (parser, AND, AND); break; case '|': if (other->type == '|') - combined = _token_create_ival (token, OR, OR); + combined = _token_create_ival (parser, OR, OR); break; } @@ -1271,14 +1270,14 @@ } if (token->type == INTEGER) - str = ralloc_asprintf (token, "%" PRIiMAX, token->value.ival); + str = linear_asprintf(parser->linalloc, "%" PRIiMAX, token->value.ival); else - str = ralloc_strdup (token, token->value.str); + str = linear_strdup(parser->linalloc, token->value.str); if (other->type == INTEGER) - ralloc_asprintf_append (&str, "%" PRIiMAX, other->value.ival); + linear_asprintf_append(parser->linalloc, &str, "%" PRIiMAX, other->value.ival); else - ralloc_strcat (&str, other->value.str); + linear_strcat(parser->linalloc, &str, other->value.str); /* New token is same type as original token, unless we * started with an integer, in which case we will be @@ -1287,7 +1286,7 @@ if (combined_type == INTEGER) combined_type = INTEGER_STRING; - combined = _token_create_str (token, combined_type, str); + combined = _token_create_str (parser, combined_type, str); combined->location = token->location; return combined; } @@ -1330,22 +1329,24 @@ tok = _token_create_ival (parser, INTEGER, value); list = _token_list_create(parser); - _token_list_append(list, tok); + _token_list_append(parser, list, tok); _define_object_macro(parser, NULL, name, list); } glcpp_parser_t * -glcpp_parser_create(const struct gl_extensions *extensions, gl_api api) +glcpp_parser_create(glcpp_extension_iterator extensions, void *state, gl_api api) { glcpp_parser_t *parser; parser = ralloc (NULL, glcpp_parser_t); glcpp_lex_init_extra (parser, &parser->scanner); - parser->defines = hash_table_ctor(32, hash_table_string_hash, - hash_table_string_compare); + parser->defines = _mesa_hash_table_create(NULL, _mesa_key_hash_string, + _mesa_key_string_equal); + parser->linalloc = linear_alloc_parent(parser, 0); parser->active = NULL; parser->lexing_directive = 0; + parser->lexing_version_directive = 0; parser->space_tokens = 1; parser->last_token_was_newline = 0; parser->last_token_was_space = 0; @@ -1368,14 +1369,18 @@ parser->error = 0; parser->extensions = extensions; + parser->state = state; parser->api = api; parser->version = 0; + parser->version_set = false; parser->has_new_line_number = 0; parser->new_line_number = 1; parser->has_new_source_number = 0; parser->new_source_number = 0; + parser->is_gles = false; + return parser; } @@ -1383,7 +1388,7 @@ glcpp_parser_destroy(glcpp_parser_t *parser) { glcpp_lex_destroy (parser->scanner); - hash_table_dtor (parser->defines); + _mesa_hash_table_destroy(parser->defines, NULL); ralloc_free (parser); } @@ -1418,7 +1423,8 @@ * Macro name is not followed by a balanced set of parentheses. */ static function_status_t -_arguments_parse(argument_list_t *arguments, token_node_t *node, +_arguments_parse(glcpp_parser_t *parser, + argument_list_t *arguments, token_node_t *node, token_node_t **last) { token_list_t *argument; @@ -1435,8 +1441,8 @@ node = node->next; - argument = _token_list_create (arguments); - _argument_list_append (arguments, argument); + argument = _token_list_create (parser); + _argument_list_append (parser, arguments, argument); for (paren_count = 1; node; node = node->next) { if (node->token->type == '(') { @@ -1449,15 +1455,15 @@ if (node->token->type == ',' && paren_count == 1) { _token_list_trim_trailing_space (argument); - argument = _token_list_create (arguments); - _argument_list_append (arguments, argument); + argument = _token_list_create (parser); + _argument_list_append (parser, arguments, argument); } else { if (argument->head == NULL) { /* Don't treat initial whitespace as part of the argument. */ if (node->token->type == SPACE) continue; } - _token_list_append (argument, node->token); + _token_list_append(parser, argument, node->token); } } @@ -1470,28 +1476,28 @@ } static token_list_t * -_token_list_create_with_one_ival(void *ctx, int type, int ival) +_token_list_create_with_one_ival(glcpp_parser_t *parser, int type, int ival) { token_list_t *list; token_t *node; - list = _token_list_create(ctx); - node = _token_create_ival(list, type, ival); - _token_list_append(list, node); + list = _token_list_create(parser); + node = _token_create_ival(parser, type, ival); + _token_list_append(parser, list, node); return list; } static token_list_t * -_token_list_create_with_one_space(void *ctx) +_token_list_create_with_one_space(glcpp_parser_t *parser) { - return _token_list_create_with_one_ival(ctx, SPACE, SPACE); + return _token_list_create_with_one_ival(parser, SPACE, SPACE); } static token_list_t * -_token_list_create_with_one_integer(void *ctx, int ival) +_token_list_create_with_one_integer(glcpp_parser_t *parser, int ival) { - return _token_list_create_with_one_ival(ctx, INTEGER, ival); + return _token_list_create_with_one_ival(parser, INTEGER, ival); } /* Evaluate a DEFINED token node (based on subsequent tokens in the list). @@ -1562,8 +1568,8 @@ *last = node; - return hash_table_find(parser->defines, - argument->token->value.str) ? 1 : 0; + return _mesa_hash_table_search(parser->defines, + argument->token->value.str) ? 1 : 0; FAIL: glcpp_error (&defined->token->location, parser, @@ -1595,8 +1601,8 @@ if (value == -1) goto NEXT; - replacement = ralloc (list, token_node_t); - replacement->token = _token_create_ival (list, INTEGER, value); + replacement = linear_alloc_child(parser->linalloc, sizeof(token_node_t)); + replacement->token = _token_create_ival (parser, INTEGER, value); /* Splice replacement node into list, replacing from "node" * through "last". */ @@ -1633,7 +1639,7 @@ expanded = _token_list_create (parser); token = _token_create_ival (parser, head_token_type, head_token_type); - _token_list_append (expanded, token); + _token_list_append (parser, expanded, token); _glcpp_parser_expand_token_list (parser, list, mode); _token_list_append_list (expanded, list); glcpp_parser_lex_from (parser, expanded); @@ -1704,6 +1710,7 @@ _glcpp_parser_expand_function(glcpp_parser_t *parser, token_node_t *node, token_node_t **last, expansion_mode_t mode) { + struct hash_entry *entry; macro_t *macro; const char *identifier; argument_list_t *arguments; @@ -1713,12 +1720,13 @@ identifier = node->token->value.str; - macro = hash_table_find(parser->defines, identifier); + entry = _mesa_hash_table_search(parser->defines, identifier); + macro = entry ? entry->data : NULL; assert(macro->is_function); arguments = _argument_list_create(parser); - status = _arguments_parse(arguments, node, last); + status = _arguments_parse(parser, arguments, node, last); switch (status) { case FUNCTION_STATUS_SUCCESS: @@ -1732,7 +1740,6 @@ /* Replace a macro defined as empty with a SPACE token. */ if (macro->replacements == NULL) { - ralloc_free(arguments); return _token_list_create_with_one_space(parser); } @@ -1749,7 +1756,7 @@ } /* Perform argument substitution on the replacement list. */ - substituted = _token_list_create(arguments); + substituted = _token_list_create(parser); for (node = macro->replacements->head; node; node = node->next) { if (node->token->type == IDENTIFIER && @@ -1767,12 +1774,12 @@ } else { token_t *new_token; - new_token = _token_create_ival(substituted, PLACEHOLDER, + new_token = _token_create_ival(parser, PLACEHOLDER, PLACEHOLDER); - _token_list_append(substituted, new_token); + _token_list_append(parser, substituted, new_token); } } else { - _token_list_append(substituted, node->token); + _token_list_append(parser, substituted, node->token); } } @@ -1810,6 +1817,7 @@ { token_t *token = node->token; const char *identifier; + struct hash_entry *entry; macro_t *macro; /* We only expand identifiers */ @@ -1829,7 +1837,8 @@ return _token_list_create_with_one_integer(parser, node->token->location.source); /* Look up this identifier in the hash table. */ - macro = hash_table_find(parser->defines, identifier); + entry = _mesa_hash_table_search(parser->defines, identifier); + macro = entry ? entry->data : NULL; /* Not a macro, so no expansion needed. */ if (macro == NULL) @@ -1844,10 +1853,10 @@ token_list_t *expansion; token_t *final; - str = ralloc_strdup(parser, token->value.str); + str = linear_strdup(parser->linalloc, token->value.str); final = _token_create_str(parser, OTHER, str); expansion = _token_list_create(parser); - _token_list_append(expansion, final); + _token_list_append(parser, expansion, final); return expansion; } @@ -1879,8 +1888,8 @@ { active_list_t *node; - node = ralloc(parser->active, active_list_t); - node->identifier = ralloc_strdup(node, identifier); + node = linear_alloc_child(parser->linalloc, sizeof(active_list_t)); + node->identifier = linear_strdup(parser->linalloc, identifier); node->marker = marker; node->next = parser->active; @@ -1898,8 +1907,6 @@ } node = parser->active->next; - ralloc_free (parser->active); - parser->active = node; } @@ -2079,6 +2086,7 @@ const char *identifier, token_list_t *replacements) { macro_t *macro, *previous; + struct hash_entry *entry; /* We define pre-defined macros before we've started parsing the actual * file. So if there's no location defined yet, that's what were doing and @@ -2086,24 +2094,23 @@ if (loc != NULL) _check_for_reserved_macro_name(parser, loc, identifier); - macro = ralloc (parser, macro_t); + macro = linear_alloc_child(parser->linalloc, sizeof(macro_t)); macro->is_function = 0; macro->parameters = NULL; - macro->identifier = ralloc_strdup (macro, identifier); + macro->identifier = linear_strdup(parser->linalloc, identifier); macro->replacements = replacements; - ralloc_steal (macro, replacements); - previous = hash_table_find (parser->defines, identifier); + entry = _mesa_hash_table_search(parser->defines, identifier); + previous = entry ? entry->data : NULL; if (previous) { if (_macro_equal (macro, previous)) { - ralloc_free (macro); return; } glcpp_error (loc, parser, "Redefinition of macro %s\n", identifier); } - hash_table_insert (parser->defines, macro, identifier); + _mesa_hash_table_insert (parser->defines, identifier, macro); } void @@ -2112,6 +2119,7 @@ token_list_t *replacements) { macro_t *macro, *previous; + struct hash_entry *entry; const char *dup; _check_for_reserved_macro_name(parser, loc, identifier); @@ -2121,24 +2129,23 @@ glcpp_error (loc, parser, "Duplicate macro parameter \"%s\"", dup); } - macro = ralloc (parser, macro_t); - ralloc_steal (macro, parameters); - ralloc_steal (macro, replacements); + macro = linear_alloc_child(parser->linalloc, sizeof(macro_t)); macro->is_function = 1; macro->parameters = parameters; - macro->identifier = ralloc_strdup (macro, identifier); + macro->identifier = linear_strdup(parser->linalloc, identifier); macro->replacements = replacements; - previous = hash_table_find (parser->defines, identifier); + + entry = _mesa_hash_table_search(parser->defines, identifier); + previous = entry ? entry->data : NULL; if (previous) { if (_macro_equal (macro, previous)) { - ralloc_free (macro); return; } glcpp_error (loc, parser, "Redefinition of macro %s\n", identifier); } - hash_table_insert(parser->defines, macro, identifier); + _mesa_hash_table_insert(parser->defines, identifier, macro); } static int @@ -2184,9 +2191,9 @@ ret == ENDIF || ret == HASH_TOKEN) { parser->in_control_line = 1; } else if (ret == IDENTIFIER) { - macro_t *macro; - macro = hash_table_find (parser->defines, - yylval->str); + struct hash_entry *entry = _mesa_hash_table_search(parser->defines, + yylval->str); + macro_t *macro = entry ? entry->data : NULL; if (macro && macro->is_function) { parser->newline_as_space = 1; parser->paren_count = 0; @@ -2199,7 +2206,6 @@ node = parser->lex_from_node; if (node == NULL) { - ralloc_free (parser->lex_from_list); parser->lex_from_list = NULL; return NEWLINE; } @@ -2225,16 +2231,13 @@ for (node = list->head; node; node = node->next) { if (node->token->type == SPACE) continue; - _token_list_append (parser->lex_from_list, node->token); + _token_list_append (parser, parser->lex_from_list, node->token); } - ralloc_free (list); - parser->lex_from_node = parser->lex_from_list->head; /* It's possible the list consisted of nothing but whitespace. */ if (parser->lex_from_node == NULL) { - ralloc_free (parser->lex_from_list); parser->lex_from_list = NULL; } } @@ -2249,7 +2252,7 @@ if (parser->skip_stack) current = parser->skip_stack->type; - node = ralloc (parser, skip_node_t); + node = linear_alloc_child(parser->linalloc, sizeof(skip_node_t)); node->loc = *loc; if (current == SKIP_NO_SKIP) { @@ -2295,7 +2298,6 @@ node = parser->skip_stack; parser->skip_stack = node->next; - ralloc_free (node); } static void @@ -2303,12 +2305,11 @@ const char *es_identifier, bool explicitly_set) { - const struct gl_extensions *extensions = parser->extensions; - - if (parser->version != 0) + if (parser->version_set) return; parser->version = version; + parser->version_set = true; add_builtin_define (parser, "__VERSION__", version); @@ -2316,193 +2317,9 @@ (es_identifier && (strcmp(es_identifier, "es") == 0)); /* Add pre-defined macros. */ - if (parser->is_gles) { + if (parser->is_gles) add_builtin_define(parser, "GL_ES", 1); - add_builtin_define(parser, "GL_EXT_separate_shader_objects", 1); - add_builtin_define(parser, "GL_EXT_draw_buffers", 1); - - if (extensions != NULL) { - if (extensions->OES_EGL_image_external) - add_builtin_define(parser, "GL_OES_EGL_image_external", 1); - if (extensions->OES_sample_variables) { - add_builtin_define(parser, "GL_OES_sample_variables", 1); - add_builtin_define(parser, "GL_OES_shader_multisample_interpolation", 1); - } - if (extensions->OES_standard_derivatives) - add_builtin_define(parser, "GL_OES_standard_derivatives", 1); - if (extensions->ARB_texture_multisample) - add_builtin_define(parser, "GL_OES_texture_storage_multisample_2d_array", 1); - if (extensions->ARB_blend_func_extended) - add_builtin_define(parser, "GL_EXT_blend_func_extended", 1); - if (extensions->ARB_cull_distance) - add_builtin_define(parser, "GL_EXT_clip_cull_distance", 1); - - if (version >= 310) { - if (extensions->ARB_shader_image_load_store) - add_builtin_define(parser, "GL_OES_shader_image_atomic", 1); - - if (extensions->OES_geometry_shader) { - add_builtin_define(parser, "GL_OES_geometry_point_size", 1); - add_builtin_define(parser, "GL_OES_geometry_shader", 1); - } - if (extensions->ARB_gpu_shader5) { - add_builtin_define(parser, "GL_EXT_gpu_shader5", 1); - add_builtin_define(parser, "GL_OES_gpu_shader5", 1); - } - if (extensions->OES_texture_buffer) { - add_builtin_define(parser, "GL_EXT_texture_buffer", 1); - add_builtin_define(parser, "GL_OES_texture_buffer", 1); - } - - if (extensions->OES_shader_io_blocks) { - add_builtin_define(parser, "GL_EXT_shader_io_blocks", 1); - add_builtin_define(parser, "GL_OES_shader_io_blocks", 1); - } - } - } - } else { - add_builtin_define(parser, "GL_ARB_draw_buffers", 1); - add_builtin_define(parser, "GL_ARB_enhanced_layouts", 1); - add_builtin_define(parser, "GL_ARB_separate_shader_objects", 1); - add_builtin_define(parser, "GL_ARB_texture_rectangle", 1); - add_builtin_define(parser, "GL_AMD_shader_trinary_minmax", 1); - - if (extensions != NULL) { - if (extensions->EXT_texture_array) - add_builtin_define(parser, "GL_EXT_texture_array", 1); - - if (extensions->ARB_ES3_1_compatibility) - add_builtin_define(parser, "GL_ARB_ES3_1_compatibility", 1); - - if (extensions->ARB_arrays_of_arrays) - add_builtin_define(parser, "GL_ARB_arrays_of_arrays", 1); - - if (extensions->ARB_fragment_coord_conventions) { - add_builtin_define(parser, "GL_ARB_fragment_coord_conventions", - 1); - } - - if (extensions->ARB_fragment_layer_viewport) - add_builtin_define(parser, "GL_ARB_fragment_layer_viewport", 1); - - if (extensions->ARB_explicit_attrib_location) - add_builtin_define(parser, "GL_ARB_explicit_attrib_location", 1); - - if (extensions->ARB_explicit_uniform_location) - add_builtin_define(parser, "GL_ARB_explicit_uniform_location", 1); - - if (extensions->ARB_shader_texture_lod) - add_builtin_define(parser, "GL_ARB_shader_texture_lod", 1); - - if (extensions->ARB_draw_instanced) - add_builtin_define(parser, "GL_ARB_draw_instanced", 1); - - if (extensions->ARB_conservative_depth) { - add_builtin_define(parser, "GL_AMD_conservative_depth", 1); - add_builtin_define(parser, "GL_ARB_conservative_depth", 1); - } - - if (extensions->ARB_shader_bit_encoding) - add_builtin_define(parser, "GL_ARB_shader_bit_encoding", 1); - - if (extensions->ARB_shader_clock) - add_builtin_define(parser, "GL_ARB_shader_clock", 1); - - if (extensions->ARB_uniform_buffer_object) - add_builtin_define(parser, "GL_ARB_uniform_buffer_object", 1); - - if (extensions->ARB_texture_cube_map_array) - add_builtin_define(parser, "GL_ARB_texture_cube_map_array", 1); - - if (extensions->ARB_shading_language_packing) - add_builtin_define(parser, "GL_ARB_shading_language_packing", 1); - - if (extensions->ARB_texture_multisample) - add_builtin_define(parser, "GL_ARB_texture_multisample", 1); - - if (extensions->ARB_texture_query_levels) - add_builtin_define(parser, "GL_ARB_texture_query_levels", 1); - - if (extensions->ARB_texture_query_lod) - add_builtin_define(parser, "GL_ARB_texture_query_lod", 1); - - if (extensions->ARB_gpu_shader5) - add_builtin_define(parser, "GL_ARB_gpu_shader5", 1); - - if (extensions->ARB_gpu_shader_fp64) - add_builtin_define(parser, "GL_ARB_gpu_shader_fp64", 1); - - if (extensions->ARB_vertex_attrib_64bit) - add_builtin_define(parser, "GL_ARB_vertex_attrib_64bit", 1); - - if (extensions->AMD_vertex_shader_layer) - add_builtin_define(parser, "GL_AMD_vertex_shader_layer", 1); - - if (extensions->AMD_vertex_shader_viewport_index) - add_builtin_define(parser, "GL_AMD_vertex_shader_viewport_index", 1); - - if (extensions->ARB_shading_language_420pack) - add_builtin_define(parser, "GL_ARB_shading_language_420pack", 1); - - if (extensions->ARB_sample_shading) - add_builtin_define(parser, "GL_ARB_sample_shading", 1); - - if (extensions->ARB_texture_gather) - add_builtin_define(parser, "GL_ARB_texture_gather", 1); - - if (extensions->ARB_shader_atomic_counters) - add_builtin_define(parser, "GL_ARB_shader_atomic_counters", 1); - - if (extensions->ARB_shader_atomic_counter_ops) - add_builtin_define(parser, "GL_ARB_shader_atomic_counter_ops", 1); - - if (extensions->ARB_viewport_array) - add_builtin_define(parser, "GL_ARB_viewport_array", 1); - - if (extensions->ARB_compute_shader) - add_builtin_define(parser, "GL_ARB_compute_shader", 1); - - if (extensions->ARB_shader_image_load_store) - add_builtin_define(parser, "GL_ARB_shader_image_load_store", 1); - - if (extensions->ARB_shader_image_size) - add_builtin_define(parser, "GL_ARB_shader_image_size", 1); - - if (extensions->ARB_shader_texture_image_samples) - add_builtin_define(parser, "GL_ARB_shader_texture_image_samples", 1); - - if (extensions->ARB_derivative_control) - add_builtin_define(parser, "GL_ARB_derivative_control", 1); - - if (extensions->ARB_shader_precision) - add_builtin_define(parser, "GL_ARB_shader_precision", 1); - - if (extensions->ARB_shader_storage_buffer_object) - add_builtin_define(parser, "GL_ARB_shader_storage_buffer_object", 1); - - if (extensions->ARB_tessellation_shader) - add_builtin_define(parser, "GL_ARB_tessellation_shader", 1); - - if (extensions->ARB_shader_subroutine) - add_builtin_define(parser, "GL_ARB_shader_subroutine", 1); - - if (extensions->ARB_shader_draw_parameters) - add_builtin_define(parser, "GL_ARB_shader_draw_parameters", 1); - - if (extensions->ARB_cull_distance) - add_builtin_define(parser, "GL_ARB_cull_distance", 1); - } - } - - if (extensions != NULL) { - if (extensions->EXT_shader_integer_mix) - add_builtin_define(parser, "GL_EXT_shader_integer_mix", 1); - - if (extensions->EXT_shader_samples_identical) - add_builtin_define(parser, "GL_EXT_shader_samples_identical", 1); - } - - if (version >= 150) + else if (version >= 150) add_builtin_define(parser, "GL_core_profile", 1); /* Currently, all ES2/ES3 implementations support highp in the @@ -2513,6 +2330,11 @@ if (version >= 130 || parser->is_gles) add_builtin_define (parser, "GL_FRAGMENT_PRECISION_HIGH", 1); + /* Add all the extension macros available in this context */ + if (parser->extensions) + parser->extensions(parser->state, add_builtin_define, parser, + version, parser->is_gles); + if (explicitly_set) { ralloc_asprintf_rewrite_tail(&parser->output, &parser->output_length, "#version %" PRIiMAX "%s%s", version, diff -Nru mesa-12.0.6/src/compiler/glsl/glcpp/pp.c mesa-17.0.7/src/compiler/glsl/glcpp/pp.c --- mesa-12.0.6/src/compiler/glsl/glcpp/pp.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/glcpp/pp.c 2017-06-01 10:37:10.000000000 +0000 @@ -213,10 +213,12 @@ int glcpp_preprocess(void *ralloc_ctx, const char **shader, char **info_log, - const struct gl_extensions *extensions, struct gl_context *gl_ctx) + glcpp_extension_iterator extensions, void *state, + struct gl_context *gl_ctx) { int errors; - glcpp_parser_t *parser = glcpp_parser_create (extensions, gl_ctx->API); + glcpp_parser_t *parser = + glcpp_parser_create(extensions, state, gl_ctx->API); if (! gl_ctx->Const.DisableGLSLLineContinuations) *shader = remove_line_continuations(parser, *shader); diff -Nru mesa-12.0.6/src/compiler/glsl/glcpp/tests/082-invalid-paste.c mesa-17.0.7/src/compiler/glsl/glcpp/tests/082-invalid-paste.c --- mesa-12.0.6/src/compiler/glsl/glcpp/tests/082-invalid-paste.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/glcpp/tests/082-invalid-paste.c 2017-06-01 10:37:10.000000000 +0000 @@ -2,6 +2,6 @@ PASTE(<,>) PASTE(0,abc) PASTE(1,=) -PASTE(2,@) +PASTE(2,~) PASTE(3,-4) PASTE(4,+5.2) diff -Nru mesa-12.0.6/src/compiler/glsl/glcpp/tests/082-invalid-paste.c.expected mesa-17.0.7/src/compiler/glsl/glcpp/tests/082-invalid-paste.c.expected --- mesa-12.0.6/src/compiler/glsl/glcpp/tests/082-invalid-paste.c.expected 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/glcpp/tests/082-invalid-paste.c.expected 2017-06-01 10:37:10.000000000 +0000 @@ -5,7 +5,7 @@ 0:4(7): preprocessor error: Pasting "1" and "=" does not give a valid preprocessing token. 0:5(7): preprocessor error: -Pasting "2" and "@" does not give a valid preprocessing token. +Pasting "2" and "~" does not give a valid preprocessing token. 0:6(7): preprocessor error: Pasting "3" and "-" does not give a valid preprocessing token. 0:7(7): preprocessor error: diff -Nru mesa-12.0.6/src/compiler/glsl/glcpp/tests/113-line-and-file-macros.c mesa-17.0.7/src/compiler/glsl/glcpp/tests/113-line-and-file-macros.c --- mesa-12.0.6/src/compiler/glsl/glcpp/tests/113-line-and-file-macros.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/glcpp/tests/113-line-and-file-macros.c 2017-06-01 10:37:10.000000000 +0000 @@ -1,7 +1,7 @@ 1. Number of dalmations: __LINE__ __FILE__ __LINE__ 2. Nominal visual acuity: __LINE__ __FILE__ / __LINE__ __FILE__ 3. Battle of Thermopylae, as film: __LINE__ __FILE__ __FILE__ -4. HTTP code for "Not Found": __LINE__ __FILE__ __LINE__ +4. HTTP code for Not Found: __LINE__ __FILE__ __LINE__ 5. Hexadecimal for 20560: __LINE__ __FILE__ __LINE__ __FILE__ 6: Zip code for Nortonville, KS: __LINE__ __LINE__ __FILE__ __LINE__ __FILE__ 7. James Bond, as a number: __FILE__ __FILE__ __LINE__ diff -Nru mesa-12.0.6/src/compiler/glsl/glcpp/tests/113-line-and-file-macros.c.expected mesa-17.0.7/src/compiler/glsl/glcpp/tests/113-line-and-file-macros.c.expected --- mesa-12.0.6/src/compiler/glsl/glcpp/tests/113-line-and-file-macros.c.expected 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/glcpp/tests/113-line-and-file-macros.c.expected 2017-06-01 10:37:10.000000000 +0000 @@ -1,7 +1,7 @@ 1. Number of dalmations: 1 0 1 2. Nominal visual acuity: 2 0 / 2 0 3. Battle of Thermopylae, as film: 3 0 0 -4. HTTP code for "Not Found": 4 0 4 +4. HTTP code for Not Found: 4 0 4 5. Hexadecimal for 20560: 5 0 5 0 6: Zip code for Nortonville, KS: 6 6 0 6 0 7. James Bond, as a number: 0 0 7 diff -Nru mesa-12.0.6/src/compiler/glsl/glcpp/tests/114-paste-integer-tokens.c mesa-17.0.7/src/compiler/glsl/glcpp/tests/114-paste-integer-tokens.c --- mesa-12.0.6/src/compiler/glsl/glcpp/tests/114-paste-integer-tokens.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/glcpp/tests/114-paste-integer-tokens.c 2017-06-01 10:37:10.000000000 +0000 @@ -1,7 +1,7 @@ #define PASTE3(a,b,c) a ## b ## c #define PASTE4(a,b,c,d) a ## b ## c ## d #define PASTE5(a,b,c,d,e) a ## b ## c ## d ## e -4. HTTP code for "Not Found": PASTE3(__LINE__, __FILE__ , __LINE__) +4. HTTP code for Not Found: PASTE3(__LINE__, __FILE__ , __LINE__) 5. Hexadecimal for 20560: PASTE4(__LINE__, __FILE__, __LINE__, __FILE__) 6: Zip code for Nortonville, KS: PASTE5(__LINE__, __LINE__, __FILE__, __LINE__, __FILE__) 7. James Bond, as a number: PASTE3(__FILE__, __FILE__, __LINE__) diff -Nru mesa-12.0.6/src/compiler/glsl/glcpp/tests/114-paste-integer-tokens.c.expected mesa-17.0.7/src/compiler/glsl/glcpp/tests/114-paste-integer-tokens.c.expected --- mesa-12.0.6/src/compiler/glsl/glcpp/tests/114-paste-integer-tokens.c.expected 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/glcpp/tests/114-paste-integer-tokens.c.expected 2017-06-01 10:37:10.000000000 +0000 @@ -1,7 +1,7 @@ -4. HTTP code for "Not Found": 404 +4. HTTP code for Not Found: 404 5. Hexadecimal for 20560: 5050 6: Zip code for Nortonville, KS: 66060 7. James Bond, as a number: 007 diff -Nru mesa-12.0.6/src/compiler/glsl/glcpp/tests/147-define-macro-no-space.c mesa-17.0.7/src/compiler/glsl/glcpp/tests/147-define-macro-no-space.c --- mesa-12.0.6/src/compiler/glsl/glcpp/tests/147-define-macro-no-space.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/glcpp/tests/147-define-macro-no-space.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,58 @@ +/* The GLSL specification is not specific about how to handle a non-space + * character separating a macro identifier from the replacement list. It says + * only "as is standard for C++ preprocessors". GCC accepts these and warns of + * "missing whitespace". So we'll accept these, (though we don't warn). + * + * Note: 'O' is intentionally omitted to leave room for "octothorpe" if we + * decide it should be legal to use a hash here, (in fact, hash has no + * legal use as the first token in a macro replacement list, but one + * could argue that that could still be allowed if the macro were never + * instantiated). + */ +#define A& ampersand +#define B! bang +#define C, comma +#define D/ divider +#define E= equals +#define F. full stop +#define G> greater than +#define H- hyphen +#define I+ incrementor +#define J[ JSON array +#define K} kurly brace? +#define L< less than +#define M{ moustache +#define N^ nose +#define P) parenthesis (right) +#define Q? question mark +#define R% ratio indicator +#define S] square bracket (right) +#define T~ tilde +#define U: umlaut? +#define V| vertical bar +#define W; wink +#define X* X (as multiplication) +A +B +C +D +E +F +G +H +I +J +K +L +M +N +P +Q +R +S +T +U +V +W +X + diff -Nru mesa-12.0.6/src/compiler/glsl/glcpp/tests/147-define-macro-no-space.c.expected mesa-17.0.7/src/compiler/glsl/glcpp/tests/147-define-macro-no-space.c.expected --- mesa-12.0.6/src/compiler/glsl/glcpp/tests/147-define-macro-no-space.c.expected 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/glcpp/tests/147-define-macro-no-space.c.expected 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,58 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +& ampersand +! bang +, comma +/ divider += equals +. full stop +> greater than +- hyphen ++ incrementor +[ JSON array +} kurly brace? +< less than +{ moustache +^ nose +) parenthesis (right) +? question mark +% ratio indicator +] square bracket (right) +~ tilde +: umlaut? +| vertical bar +; wink +* X (as multiplication) + diff -Nru mesa-12.0.6/src/compiler/glsl/glcpp/tests/148-legal-characters.c mesa-17.0.7/src/compiler/glsl/glcpp/tests/148-legal-characters.c --- mesa-12.0.6/src/compiler/glsl/glcpp/tests/148-legal-characters.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/glcpp/tests/148-legal-characters.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,77 @@ +/* Legal characters in GLSL are: + * + * Identifier characters: + * + * Letters a-z + * Letters A-Z + * Underscore + * Numbers 0-9 + * + * Punctuation: + * + * Period, plus, dash, slash, asterisk, percent, angled brackets, + * square brackets, parentheses, braces, caret, vertical bar, + * ampersand, tilde, equals, exclamation point, colon, semicolon, + * comma, and question mark + * + * Special: + * + * Number sign (as used in preprocessor) + * + * Backslash just before newline as line continuation + * + * White space: + * + * Space, horizontal tab, vertical tab, form feed, carriage-return, + * and line-feed. + * + * [GLSL Language Specficiation 4.30.6, section 3.1] + * + * In this file, we test each of these in turn as follows: + * + * Identifier characters: All pass through unchanged + * Punctuation: All pass through unchanged + * Special: Empty directive replaced with blank line + * Line continuation merges two lines, then a blank line + * Whitespace: 4 horizontal space characters each replaced with space + * 2 newline characters each replaced with a newline + * + */ +abcdefghijklmnopqrstuvwxyz +ABCDEFGHIJKMLNOPQRSTUVWXYZ +_ +0123456789 +. ++ +- +/ +* +% +< +> +[ +] +( +) +{ +} +^ +| +& +~ += +! +: +; +, +? +# +.\ +. +. . +. . +. . +. . +.. +. +. diff -Nru mesa-12.0.6/src/compiler/glsl/glcpp/tests/148-legal-characters.c.expected mesa-17.0.7/src/compiler/glsl/glcpp/tests/148-legal-characters.c.expected --- mesa-12.0.6/src/compiler/glsl/glcpp/tests/148-legal-characters.c.expected 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/glcpp/tests/148-legal-characters.c.expected 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,77 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +abcdefghijklmnopqrstuvwxyz +ABCDEFGHIJKMLNOPQRSTUVWXYZ +_ +0123456789 +. ++ +- +/ +* +% +< +> +[ +] +( +) +{ +} +^ +| +& +~ += +! +: +; +, +? + +.. + +. . +. . +. . +. . +.. +. +. diff -Nru mesa-12.0.6/src/compiler/glsl/glsl_lexer.cpp mesa-17.0.7/src/compiler/glsl/glsl_lexer.cpp --- mesa-12.0.6/src/compiler/glsl/glsl_lexer.cpp 2017-01-24 01:43:16.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/glsl_lexer.cpp 2017-06-01 10:37:59.000000000 +0000 @@ -1,6 +1,6 @@ -#line 2 "glsl/glsl_lexer.cpp" +#line 1 "glsl/glsl_lexer.cpp" -#line 4 "glsl/glsl_lexer.cpp" +#line 3 "glsl/glsl_lexer.cpp" #define YY_INT_ALIGNED short int @@ -9,11 +9,89 @@ #define FLEX_SCANNER #define YY_FLEX_MAJOR_VERSION 2 #define YY_FLEX_MINOR_VERSION 6 -#define YY_FLEX_SUBMINOR_VERSION 1 +#define YY_FLEX_SUBMINOR_VERSION 3 #if YY_FLEX_SUBMINOR_VERSION > 0 #define FLEX_BETA #endif + #define yy_create_buffer _mesa_glsl_lexer__create_buffer + + #define yy_delete_buffer _mesa_glsl_lexer__delete_buffer + + #define yy_scan_buffer _mesa_glsl_lexer__scan_buffer + + #define yy_scan_string _mesa_glsl_lexer__scan_string + + #define yy_scan_bytes _mesa_glsl_lexer__scan_bytes + + #define yy_init_buffer _mesa_glsl_lexer__init_buffer + + #define yy_flush_buffer _mesa_glsl_lexer__flush_buffer + + #define yy_load_buffer_state _mesa_glsl_lexer__load_buffer_state + + #define yy_switch_to_buffer _mesa_glsl_lexer__switch_to_buffer + + #define yypush_buffer_state _mesa_glsl_lexer_push_buffer_state + + #define yypop_buffer_state _mesa_glsl_lexer_pop_buffer_state + + #define yyensure_buffer_stack _mesa_glsl_lexer_ensure_buffer_stack + + #define yylex _mesa_glsl_lexer_lex + + #define yyrestart _mesa_glsl_lexer_restart + + #define yylex_init _mesa_glsl_lexer_lex_init + + #define yylex_init_extra _mesa_glsl_lexer_lex_init_extra + + #define yylex_destroy _mesa_glsl_lexer_lex_destroy + + #define yyget_debug _mesa_glsl_lexer_get_debug + + #define yyset_debug _mesa_glsl_lexer_set_debug + + #define yyget_extra _mesa_glsl_lexer_get_extra + + #define yyset_extra _mesa_glsl_lexer_set_extra + + #define yyget_in _mesa_glsl_lexer_get_in + + #define yyset_in _mesa_glsl_lexer_set_in + + #define yyget_out _mesa_glsl_lexer_get_out + + #define yyset_out _mesa_glsl_lexer_set_out + + #define yyget_leng _mesa_glsl_lexer_get_leng + + #define yyget_text _mesa_glsl_lexer_get_text + + #define yyget_lineno _mesa_glsl_lexer_get_lineno + + #define yyset_lineno _mesa_glsl_lexer_set_lineno + + #define yyget_column _mesa_glsl_lexer_get_column + + #define yyset_column _mesa_glsl_lexer_set_column + + #define yywrap _mesa_glsl_lexer_wrap + + #define yyget_lval _mesa_glsl_lexer_get_lval + + #define yyset_lval _mesa_glsl_lexer_set_lval + + #define yyget_lloc _mesa_glsl_lexer_get_lloc + + #define yyset_lloc _mesa_glsl_lexer_set_lloc + + #define yyalloc _mesa_glsl_lexer_alloc + + #define yyrealloc _mesa_glsl_lexer_realloc + + #define yyfree _mesa_glsl_lexer_free + /* First, we deal with platform-specific or compiler-specific issues. */ /* begin standard C headers. */ @@ -100,12 +178,10 @@ /* Returned upon end-of-file. */ #define YY_NULL 0 -/* Promotes a possibly negative, possibly signed char to an unsigned - * integer for use as an array index. If the signed char is negative, - * we want to instead treat it as an 8-bit unsigned char, hence the - * double cast. +/* Promotes a possibly negative, possibly signed char to an + * integer in range [0..255] for use as an array index. */ -#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c) +#define YY_SC_TO_UI(c) ((YY_CHAR) (c)) /* An opaque pointer. */ #ifndef YY_TYPEDEF_YY_SCANNER_T @@ -129,20 +205,16 @@ * definition of BEGIN. */ #define BEGIN yyg->yy_start = 1 + 2 * - /* Translate the current start state into a value that can be later handed * to BEGIN to return to the state. The YYSTATE alias is for lex * compatibility. */ #define YY_START ((yyg->yy_start - 1) / 2) #define YYSTATE YY_START - /* Action number for EOF rule of a given start state. */ #define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1) - /* Special action meaning "start processing a new file". */ #define YY_NEW_FILE _mesa_glsl_lexer_restart(yyin ,yyscanner ) - #define YY_END_OF_BUFFER_CHAR 0 /* Size of default input buffer. */ @@ -175,7 +247,7 @@ #define EOB_ACT_CONTINUE_SCAN 0 #define EOB_ACT_END_OF_FILE 1 #define EOB_ACT_LAST_MATCH 2 - + #define YY_LESS_LINENO(n) #define YY_LINENO_REWIND_TO(ptr) @@ -192,7 +264,6 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ \ } \ while ( 0 ) - #define unput(c) yyunput( c, yyg->yytext_ptr , yyscanner ) #ifndef YY_STRUCT_YY_BUFFER_STATE @@ -235,7 +306,7 @@ int yy_bs_lineno; /**< The line count. */ int yy_bs_column; /**< The column count. */ - + /* Whether to try to fill the input buffer when we reach the * end of it. */ @@ -269,36 +340,33 @@ #define YY_CURRENT_BUFFER ( yyg->yy_buffer_stack \ ? yyg->yy_buffer_stack[yyg->yy_buffer_stack_top] \ : NULL) - /* Same as previous macro, but useful when we know that the buffer stack is not * NULL or when we need an lvalue. For internal use only. */ #define YY_CURRENT_BUFFER_LVALUE yyg->yy_buffer_stack[yyg->yy_buffer_stack_top] -void _mesa_glsl_lexer_restart (FILE *input_file ,yyscan_t yyscanner ); -void _mesa_glsl_lexer__switch_to_buffer (YY_BUFFER_STATE new_buffer ,yyscan_t yyscanner ); -YY_BUFFER_STATE _mesa_glsl_lexer__create_buffer (FILE *file,int size ,yyscan_t yyscanner ); -void _mesa_glsl_lexer__delete_buffer (YY_BUFFER_STATE b ,yyscan_t yyscanner ); -void _mesa_glsl_lexer__flush_buffer (YY_BUFFER_STATE b ,yyscan_t yyscanner ); -void _mesa_glsl_lexer_push_buffer_state (YY_BUFFER_STATE new_buffer ,yyscan_t yyscanner ); -void _mesa_glsl_lexer_pop_buffer_state (yyscan_t yyscanner ); - -static void _mesa_glsl_lexer_ensure_buffer_stack (yyscan_t yyscanner ); -static void _mesa_glsl_lexer__load_buffer_state (yyscan_t yyscanner ); -static void _mesa_glsl_lexer__init_buffer (YY_BUFFER_STATE b,FILE *file ,yyscan_t yyscanner ); - +void _mesa_glsl_lexer_restart ( FILE *input_file , yyscan_t yyscanner ); +void _mesa_glsl_lexer__switch_to_buffer ( YY_BUFFER_STATE new_buffer , yyscan_t yyscanner ); +YY_BUFFER_STATE _mesa_glsl_lexer__create_buffer ( FILE *file, int size , yyscan_t yyscanner ); +void _mesa_glsl_lexer__delete_buffer ( YY_BUFFER_STATE b , yyscan_t yyscanner ); +void _mesa_glsl_lexer__flush_buffer ( YY_BUFFER_STATE b , yyscan_t yyscanner ); +void _mesa_glsl_lexer_push_buffer_state ( YY_BUFFER_STATE new_buffer , yyscan_t yyscanner ); +void _mesa_glsl_lexer_pop_buffer_state ( yyscan_t yyscanner ); + +static void _mesa_glsl_lexer_ensure_buffer_stack ( yyscan_t yyscanner ); +static void _mesa_glsl_lexer__load_buffer_state ( yyscan_t yyscanner ); +static void _mesa_glsl_lexer__init_buffer ( YY_BUFFER_STATE b, FILE *file , yyscan_t yyscanner ); #define YY_FLUSH_BUFFER _mesa_glsl_lexer__flush_buffer(YY_CURRENT_BUFFER ,yyscanner) -YY_BUFFER_STATE _mesa_glsl_lexer__scan_buffer (char *base,yy_size_t size ,yyscan_t yyscanner ); -YY_BUFFER_STATE _mesa_glsl_lexer__scan_string (yyconst char *yy_str ,yyscan_t yyscanner ); -YY_BUFFER_STATE _mesa_glsl_lexer__scan_bytes (yyconst char *bytes,int len ,yyscan_t yyscanner ); - -void *_mesa_glsl_lexer_alloc (yy_size_t ,yyscan_t yyscanner ); -void *_mesa_glsl_lexer_realloc (void *,yy_size_t ,yyscan_t yyscanner ); -void _mesa_glsl_lexer_free (void * ,yyscan_t yyscanner ); +YY_BUFFER_STATE _mesa_glsl_lexer__scan_buffer ( char *base, yy_size_t size , yyscan_t yyscanner ); +YY_BUFFER_STATE _mesa_glsl_lexer__scan_string ( const char *yy_str , yyscan_t yyscanner ); +YY_BUFFER_STATE _mesa_glsl_lexer__scan_bytes ( const char *bytes, int len , yyscan_t yyscanner ); + +void *_mesa_glsl_lexer_alloc ( yy_size_t , yyscan_t yyscanner ); +void *_mesa_glsl_lexer_realloc ( void *, yy_size_t , yyscan_t yyscanner ); +void _mesa_glsl_lexer_free ( void * , yyscan_t yyscanner ); #define yy_new_buffer _mesa_glsl_lexer__create_buffer - #define yy_set_interactive(is_interactive) \ { \ if ( ! YY_CURRENT_BUFFER ){ \ @@ -308,7 +376,6 @@ } \ YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \ } - #define yy_set_bol(at_bol) \ { \ if ( ! YY_CURRENT_BUFFER ){\ @@ -318,24 +385,22 @@ } \ YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \ } - #define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol) /* Begin user sect3 */ #define _mesa_glsl_lexer_wrap(yyscanner) (/*CONSTCOND*/1) #define YY_SKIP_YYWRAP - -typedef unsigned char YY_CHAR; +typedef flex_uint8_t YY_CHAR; typedef int yy_state_type; #define yytext_ptr yytext_r -static yy_state_type yy_get_previous_state (yyscan_t yyscanner ); -static yy_state_type yy_try_NUL_trans (yy_state_type current_state ,yyscan_t yyscanner); -static int yy_get_next_buffer (yyscan_t yyscanner ); -static void yynoreturn yy_fatal_error (yyconst char* msg ,yyscan_t yyscanner ); +static yy_state_type yy_get_previous_state ( yyscan_t yyscanner ); +static yy_state_type yy_try_NUL_trans ( yy_state_type current_state , yyscan_t yyscanner); +static int yy_get_next_buffer ( yyscan_t yyscanner ); +static void yynoreturn yy_fatal_error ( const char* msg , yyscan_t yyscanner ); /* Done after the current pattern has been matched and before the * corresponding action - sets up yytext. @@ -346,9 +411,8 @@ yyg->yy_hold_char = *yy_cp; \ *yy_cp = '\0'; \ yyg->yy_c_buf_p = yy_cp; - -#define YY_NUM_RULES 266 -#define YY_END_OF_BUFFER 267 +#define YY_NUM_RULES 267 +#define YY_END_OF_BUFFER 268 /* This struct is not used in this scanner, but its presence is necessary. */ struct yy_trans_info @@ -356,126 +420,126 @@ flex_int32_t yy_verify; flex_int32_t yy_nxt; }; -static yyconst flex_int16_t yy_accept[1047] = +static const flex_int16_t yy_accept[1048] = { 0, - 0, 0, 16, 16, 0, 0, 267, 265, 1, 22, - 265, 265, 265, 265, 265, 265, 264, 265, 179, 177, - 265, 265, 265, 263, 265, 263, 263, 263, 263, 263, - 263, 263, 263, 263, 263, 263, 263, 263, 263, 263, - 263, 263, 263, 263, 263, 265, 1, 265, 21, 16, - 20, 21, 19, 17, 18, 14, 13, 1, 161, 170, - 162, 173, 167, 156, 169, 157, 176, 181, 168, 182, - 179, 0, 0, 179, 0, 177, 177, 165, 158, 160, - 159, 166, 263, 174, 164, 263, 263, 263, 263, 263, - 263, 263, 263, 263, 263, 263, 263, 263, 263, 31, - - 263, 263, 263, 263, 263, 263, 263, 263, 263, 263, - 263, 263, 263, 35, 263, 263, 62, 263, 263, 263, - 263, 263, 263, 263, 263, 263, 263, 263, 263, 263, - 263, 263, 263, 263, 263, 263, 263, 263, 263, 263, - 263, 263, 263, 263, 263, 263, 263, 263, 263, 263, - 263, 175, 163, 1, 0, 0, 2, 0, 0, 0, - 0, 16, 15, 19, 18, 0, 181, 0, 0, 180, - 0, 182, 0, 0, 0, 183, 178, 171, 172, 263, - 190, 263, 263, 263, 263, 263, 263, 263, 263, 263, - 263, 263, 263, 263, 263, 263, 263, 263, 263, 263, - - 263, 263, 263, 263, 263, 263, 34, 263, 263, 263, - 263, 263, 263, 263, 263, 263, 263, 27, 263, 263, - 263, 263, 263, 263, 263, 263, 263, 263, 263, 63, - 263, 263, 263, 263, 263, 263, 263, 263, 263, 263, - 263, 263, 263, 263, 263, 263, 263, 263, 263, 263, - 263, 263, 263, 263, 263, 263, 263, 263, 263, 263, - 263, 263, 263, 263, 263, 263, 0, 0, 0, 0, - 15, 0, 181, 185, 0, 180, 0, 0, 0, 182, - 186, 183, 0, 0, 178, 263, 263, 263, 25, 263, - 263, 263, 248, 241, 263, 263, 263, 263, 263, 263, - - 263, 263, 263, 263, 263, 33, 193, 263, 263, 263, - 263, 70, 263, 263, 198, 211, 263, 263, 263, 263, - 263, 263, 263, 263, 263, 263, 263, 263, 208, 244, - 50, 51, 52, 263, 263, 263, 263, 263, 263, 263, - 263, 263, 263, 263, 263, 263, 263, 263, 263, 263, - 263, 263, 263, 263, 263, 263, 263, 263, 263, 196, - 188, 263, 263, 28, 263, 263, 263, 263, 263, 263, - 263, 47, 48, 49, 154, 263, 263, 263, 0, 0, - 0, 0, 0, 180, 184, 187, 263, 263, 263, 29, - 263, 38, 39, 40, 263, 191, 263, 263, 24, 263, - - 263, 263, 222, 223, 224, 263, 219, 220, 221, 263, - 189, 263, 212, 26, 234, 235, 236, 246, 216, 217, - 218, 263, 263, 263, 64, 214, 263, 263, 263, 41, - 42, 43, 263, 263, 263, 263, 263, 263, 263, 263, - 263, 263, 263, 73, 263, 263, 263, 263, 263, 263, - 263, 263, 263, 209, 263, 263, 263, 263, 263, 263, - 263, 263, 263, 263, 263, 192, 263, 263, 243, 44, - 45, 46, 263, 263, 32, 263, 0, 0, 0, 0, - 251, 263, 263, 66, 263, 263, 249, 263, 263, 263, - 263, 263, 263, 210, 205, 254, 263, 263, 263, 263, - - 263, 263, 201, 263, 263, 263, 155, 53, 54, 55, - 56, 57, 58, 59, 60, 61, 263, 263, 263, 263, - 215, 197, 263, 263, 203, 263, 263, 263, 37, 263, - 261, 152, 240, 71, 204, 153, 263, 252, 199, 263, - 263, 263, 263, 263, 263, 263, 263, 263, 0, 0, - 0, 0, 263, 263, 263, 263, 263, 200, 36, 225, - 226, 227, 228, 229, 230, 231, 232, 233, 263, 263, - 263, 263, 263, 263, 109, 110, 111, 263, 263, 263, - 263, 263, 245, 263, 263, 263, 263, 108, 263, 263, - 263, 263, 263, 263, 263, 263, 194, 263, 263, 263, - - 263, 263, 65, 263, 263, 67, 263, 263, 0, 0, - 0, 0, 0, 263, 263, 68, 146, 30, 206, 120, - 121, 122, 263, 263, 263, 263, 263, 263, 263, 263, - 263, 263, 263, 263, 263, 263, 202, 263, 263, 263, - 149, 260, 148, 263, 263, 263, 263, 263, 263, 263, - 263, 195, 131, 132, 133, 263, 263, 213, 263, 147, - 263, 0, 0, 6, 0, 0, 0, 12, 3, 263, - 23, 263, 263, 263, 263, 263, 263, 263, 263, 263, - 118, 263, 263, 263, 113, 207, 69, 263, 263, 263, - 263, 263, 242, 263, 250, 247, 255, 74, 75, 76, - - 263, 263, 263, 263, 263, 263, 263, 263, 263, 263, - 263, 263, 263, 263, 263, 150, 0, 0, 0, 0, - 0, 0, 0, 263, 263, 263, 129, 263, 263, 124, - 263, 263, 263, 263, 263, 263, 263, 263, 85, 86, - 87, 263, 263, 263, 263, 263, 263, 263, 263, 263, - 263, 263, 263, 263, 262, 263, 263, 140, 263, 263, - 135, 91, 92, 93, 263, 263, 4, 0, 5, 0, - 0, 0, 0, 0, 0, 151, 263, 263, 263, 263, - 263, 263, 263, 263, 263, 263, 112, 263, 114, 263, - 263, 263, 263, 263, 263, 263, 263, 263, 263, 263, - - 97, 263, 263, 263, 263, 77, 263, 263, 263, 263, - 263, 263, 263, 263, 263, 263, 263, 263, 263, 0, - 0, 0, 0, 263, 263, 263, 123, 125, 263, 115, - 263, 116, 263, 263, 263, 263, 263, 98, 263, 263, - 88, 263, 263, 263, 263, 263, 263, 263, 263, 263, - 263, 263, 263, 263, 263, 263, 134, 136, 263, 263, - 263, 99, 263, 263, 94, 0, 0, 0, 126, 127, - 263, 263, 263, 142, 263, 263, 143, 263, 263, 263, - 263, 263, 263, 263, 72, 263, 263, 263, 263, 237, - 263, 238, 253, 263, 263, 263, 137, 138, 263, 263, - - 263, 263, 263, 263, 263, 263, 0, 0, 0, 263, - 263, 263, 263, 119, 117, 263, 263, 263, 256, 258, - 263, 78, 263, 79, 263, 263, 263, 263, 263, 263, - 263, 263, 263, 263, 263, 257, 259, 263, 0, 0, - 0, 0, 130, 128, 263, 263, 89, 90, 263, 263, - 263, 80, 263, 263, 263, 81, 263, 263, 263, 141, - 139, 95, 96, 263, 263, 0, 0, 0, 0, 263, - 263, 263, 263, 263, 263, 100, 263, 103, 263, 263, - 263, 263, 0, 0, 0, 0, 263, 263, 101, 104, - 263, 263, 263, 263, 82, 263, 102, 105, 0, 0, - - 0, 7, 0, 0, 144, 145, 263, 263, 263, 263, - 107, 0, 0, 8, 0, 0, 263, 263, 239, 263, - 0, 0, 0, 83, 84, 263, 0, 0, 0, 9, - 263, 0, 0, 10, 106, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 11, 0 + 0, 0, 16, 16, 0, 0, 268, 266, 1, 23, + 266, 266, 266, 266, 266, 266, 265, 266, 180, 178, + 266, 266, 266, 264, 266, 264, 264, 264, 264, 264, + 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, + 264, 264, 264, 264, 264, 266, 1, 266, 22, 16, + 21, 22, 20, 19, 17, 18, 14, 13, 1, 162, + 171, 163, 174, 168, 157, 170, 158, 177, 182, 169, + 183, 180, 0, 0, 180, 0, 178, 178, 166, 159, + 161, 160, 167, 264, 175, 165, 264, 264, 264, 264, + 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, + + 32, 264, 264, 264, 264, 264, 264, 264, 264, 264, + 264, 264, 264, 264, 36, 264, 264, 63, 264, 264, + 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, + 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, + 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, + 264, 264, 176, 164, 1, 0, 0, 2, 0, 0, + 0, 0, 16, 15, 19, 18, 0, 182, 0, 0, + 181, 0, 183, 0, 0, 0, 184, 179, 172, 173, + 264, 191, 264, 264, 264, 264, 264, 264, 264, 264, + 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, + + 264, 264, 264, 264, 264, 264, 264, 35, 264, 264, + 264, 264, 264, 264, 264, 264, 264, 264, 28, 264, + 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, + 64, 264, 264, 264, 264, 264, 264, 264, 264, 264, + 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, + 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, + 264, 264, 264, 264, 264, 264, 264, 0, 0, 0, + 0, 15, 0, 182, 186, 0, 181, 0, 0, 0, + 183, 187, 184, 0, 0, 179, 264, 264, 264, 26, + 264, 264, 264, 249, 242, 264, 264, 264, 264, 264, + + 264, 264, 264, 264, 264, 264, 34, 194, 264, 264, + 264, 264, 71, 264, 264, 199, 212, 264, 264, 264, + 264, 264, 264, 264, 264, 264, 264, 264, 264, 209, + 245, 51, 52, 53, 264, 264, 264, 264, 264, 264, + 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, + 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, + 197, 189, 264, 264, 29, 264, 264, 264, 264, 264, + 264, 264, 48, 49, 50, 155, 264, 264, 264, 0, + 0, 0, 0, 0, 181, 185, 188, 264, 264, 264, + 30, 264, 39, 40, 41, 264, 192, 264, 264, 25, + + 264, 264, 264, 223, 224, 225, 264, 220, 221, 222, + 264, 190, 264, 213, 27, 235, 236, 237, 247, 217, + 218, 219, 264, 264, 264, 65, 215, 264, 264, 264, + 42, 43, 44, 264, 264, 264, 264, 264, 264, 264, + 264, 264, 264, 264, 74, 264, 264, 264, 264, 264, + 264, 264, 264, 264, 210, 264, 264, 264, 264, 264, + 264, 264, 264, 264, 264, 264, 193, 264, 264, 244, + 45, 46, 47, 264, 264, 33, 264, 0, 0, 0, + 0, 252, 264, 264, 67, 264, 264, 250, 264, 264, + 264, 264, 264, 264, 211, 206, 255, 264, 264, 264, + + 264, 264, 264, 202, 264, 264, 264, 156, 54, 55, + 56, 57, 58, 59, 60, 61, 62, 264, 264, 264, + 264, 216, 198, 264, 264, 204, 264, 264, 264, 38, + 264, 262, 153, 241, 72, 205, 154, 264, 253, 200, + 264, 264, 264, 264, 264, 264, 264, 264, 264, 0, + 0, 0, 0, 264, 264, 264, 264, 264, 201, 37, + 226, 227, 228, 229, 230, 231, 232, 233, 234, 264, + 264, 264, 264, 264, 264, 110, 111, 112, 264, 264, + 264, 264, 264, 246, 264, 264, 264, 264, 109, 264, + 264, 264, 264, 264, 264, 264, 264, 195, 264, 264, + + 264, 264, 264, 66, 264, 264, 68, 264, 264, 0, + 0, 0, 0, 0, 264, 264, 69, 147, 31, 207, + 121, 122, 123, 264, 264, 264, 264, 264, 264, 264, + 264, 264, 264, 264, 264, 264, 264, 203, 264, 264, + 264, 150, 261, 149, 264, 264, 264, 264, 264, 264, + 264, 264, 196, 132, 133, 134, 264, 264, 214, 264, + 148, 264, 0, 0, 6, 0, 0, 0, 12, 3, + 264, 24, 264, 264, 264, 264, 264, 264, 264, 264, + 264, 119, 264, 264, 264, 114, 208, 70, 264, 264, + 264, 264, 264, 243, 264, 251, 248, 256, 75, 76, + + 77, 264, 264, 264, 264, 264, 264, 264, 264, 264, + 264, 264, 264, 264, 264, 264, 151, 0, 0, 0, + 0, 0, 0, 0, 264, 264, 264, 130, 264, 264, + 125, 264, 264, 264, 264, 264, 264, 264, 264, 86, + 87, 88, 264, 264, 264, 264, 264, 264, 264, 264, + 264, 264, 264, 264, 264, 263, 264, 264, 141, 264, + 264, 136, 92, 93, 94, 264, 264, 4, 0, 5, + 0, 0, 0, 0, 0, 0, 152, 264, 264, 264, + 264, 264, 264, 264, 264, 264, 264, 113, 264, 115, + 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, + + 264, 98, 264, 264, 264, 264, 78, 264, 264, 264, + 264, 264, 264, 264, 264, 264, 264, 264, 264, 264, + 0, 0, 0, 0, 264, 264, 264, 124, 126, 264, + 116, 264, 117, 264, 264, 264, 264, 264, 99, 264, + 264, 89, 264, 264, 264, 264, 264, 264, 264, 264, + 264, 264, 264, 264, 264, 264, 264, 135, 137, 264, + 264, 264, 100, 264, 264, 95, 0, 0, 0, 127, + 128, 264, 264, 264, 143, 264, 264, 144, 264, 264, + 264, 264, 264, 264, 264, 73, 264, 264, 264, 264, + 238, 264, 239, 254, 264, 264, 264, 138, 139, 264, + + 264, 264, 264, 264, 264, 264, 264, 0, 0, 0, + 264, 264, 264, 264, 120, 118, 264, 264, 264, 257, + 259, 264, 79, 264, 80, 264, 264, 264, 264, 264, + 264, 264, 264, 264, 264, 264, 258, 260, 264, 0, + 0, 0, 0, 131, 129, 264, 264, 90, 91, 264, + 264, 264, 81, 264, 264, 264, 82, 264, 264, 264, + 142, 140, 96, 97, 264, 264, 0, 0, 0, 0, + 264, 264, 264, 264, 264, 264, 101, 264, 104, 264, + 264, 264, 264, 0, 0, 0, 0, 264, 264, 102, + 105, 264, 264, 264, 264, 83, 264, 103, 106, 0, + + 0, 0, 7, 0, 0, 145, 146, 264, 264, 264, + 264, 108, 0, 0, 8, 0, 0, 264, 264, 240, + 264, 0, 0, 0, 84, 85, 264, 0, 0, 0, + 9, 264, 0, 0, 10, 107, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 11, 0 } ; -static yyconst YY_CHAR yy_ec[256] = +static const YY_CHAR yy_ec[256] = { 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 3, 1, 1, 4, 1, 1, 1, 1, 1, 1, 1, @@ -507,7 +571,7 @@ 1, 1, 1, 1, 1 } ; -static yyconst YY_CHAR yy_meta[71] = +static const YY_CHAR yy_meta[71] = { 0, 1, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 3, 3, 3, 3, 3, @@ -518,247 +582,247 @@ 5, 5, 5, 5, 5, 5, 5, 5, 5, 1 } ; -static yyconst flex_uint16_t yy_base[1059] = +static const flex_int16_t yy_base[1060] = { 0, 0, 69, 75, 145, 1418, 1417, 1419, 1422, 70, 1422, 1393, 1392, 94, 1391, 91, 92, 90, 1390, 202, 256, 89, 1389, 95, 0, 79, 68, 64, 127, 125, 68, 136, 1354, 132, 141, 82, 87, 128, 1348, 148, 84, 182, 179, 149, 151, 152, 109, 136, 234, 1422, 135, - 1422, 1396, 236, 1422, 0, 1422, 1422, 228, 1422, 1422, - 1422, 1422, 1422, 1422, 1422, 1422, 1422, 305, 1422, 346, - 138, 297, 331, 1422, 0, 0, 1422, 1385, 1422, 1422, - 1422, 1384, 0, 1422, 1422, 1345, 1350, 166, 1347, 1356, - 1354, 1354, 1340, 1343, 1355, 207, 1349, 1336, 1352, 1332, - - 1346, 1332, 1329, 1329, 1335, 182, 222, 1329, 1340, 1325, - 1331, 1335, 1336, 0, 1327, 1338, 226, 1337, 1332, 1312, - 184, 1316, 1330, 1320, 208, 1313, 232, 1326, 1328, 239, - 1307, 1315, 247, 1302, 1311, 235, 252, 1316, 1311, 1314, - 1302, 1305, 205, 155, 255, 1315, 1302, 1315, 251, 1308, - 1307, 1422, 1422, 327, 354, 356, 1422, 1292, 1305, 1296, - 1307, 328, 0, 353, 0, 367, 1422, 1323, 1304, 359, - 410, 1422, 1321, 1302, 417, 408, 335, 1422, 1422, 1298, - 0, 1293, 1288, 1292, 1302, 1296, 1298, 343, 1281, 1281, - 1293, 1284, 247, 1295, 1292, 1275, 1291, 1289, 1286, 1277, - - 1284, 1270, 1268, 1281, 1266, 1283, 0, 1280, 1267, 1275, - 1272, 1276, 1277, 1270, 1267, 1255, 1254, 1268, 1271, 1258, - 1267, 1254, 1261, 1251, 426, 1257, 1260, 1250, 1258, 1246, - 1250, 1241, 1256, 1255, 1245, 1252, 275, 1235, 1254, 1237, - 1235, 1234, 1245, 1234, 1229, 1227, 1229, 1240, 1225, 1227, - 1224, 1236, 1235, 1238, 1219, 348, 1228, 1223, 1221, 1231, - 1209, 429, 1228, 1230, 1218, 1210, 1209, 1213, 1225, 1208, - 0, 434, 425, 1422, 449, 1422, 1236, 1217, 466, 441, - 1422, 1422, 1234, 1215, 1422, 1199, 1210, 1209, 0, 1206, - 1211, 459, 0, 0, 1198, 1196, 1196, 1197, 1192, 1201, - - 1189, 1207, 474, 1195, 480, 0, 0, 1189, 1200, 1199, - 1199, 0, 1183, 483, 0, 0, 1185, 486, 1193, 1194, - 1184, 1178, 1177, 1178, 1177, 1177, 489, 1172, 0, 0, - 1168, 1167, 1166, 1168, 1169, 1174, 1168, 1164, 1178, 1173, - 1173, 1171, 1170, 1163, 1157, 1159, 1158, 1161, 1161, 1167, - 1152, 1155, 1150, 1159, 1164, 1151, 1148, 1161, 1151, 0, - 0, 1158, 1154, 0, 1145, 1145, 1151, 1141, 1149, 492, - 1146, 0, 0, 0, 0, 1135, 1148, 1147, 1146, 1145, - 1142, 1130, 497, 488, 1422, 1422, 1142, 1143, 1143, 0, - 1127, 0, 0, 0, 1128, 0, 1137, 1127, 0, 1126, - - 1127, 1121, 1114, 1113, 1112, 1129, 0, 0, 0, 1119, - 0, 1115, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 1126, 507, 1125, 0, 0, 1123, 1119, 1115, 0, - 0, 0, 1107, 509, 512, 521, 1112, 1108, 1114, 1104, - 1102, 1116, 1100, 0, 1100, 1114, 1102, 1098, 1105, 1099, - 1111, 1106, 1106, 0, 1103, 1100, 1104, 1087, 1085, 1088, - 1095, 1101, 1096, 1095, 1082, 0, 1084, 1085, 0, 0, - 0, 0, 1082, 1086, 0, 1079, 1079, 1134, 1078, 1081, - 0, 1089, 1068, 0, 1078, 1072, 0, 1065, 1065, 1079, - 527, 530, 533, 0, 1081, 0, 537, 1095, 1094, 1093, - - 1058, 1057, 0, 1075, 1074, 1069, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 1057, 1071, 1057, 1054, - 0, 0, 1060, 286, 0, 1056, 1064, 1063, 0, 1055, - 1047, 0, 0, 0, 0, 0, 1044, 0, 0, 1043, - 1055, 540, 1047, 1054, 1053, 1050, 1044, 1041, 1036, 558, - 1052, 1037, 1031, 1031, 1045, 1029, 1042, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 1034, 1059, - 1058, 1057, 1022, 1021, 374, 534, 0, 1034, 1037, 1035, - 1023, 1019, 0, 1032, 1029, 1028, 1017, 0, 1016, 1006, - 1024, 1009, 1012, 564, 1017, 1020, 0, 1038, 1037, 1036, - - 1001, 1000, 0, 1015, 1001, 0, 1012, 1004, 1006, 582, - 588, 1056, 999, 1003, 1006, 0, 0, 0, 0, 1027, - 436, 0, 1003, 1006, 990, 998, 988, 1009, 998, 994, - 995, 995, 994, 979, 594, 992, 0, 993, 981, 980, - 0, 0, 0, 976, 1006, 1005, 1004, 969, 968, 964, - 972, 0, 1002, 589, 0, 978, 981, 0, 600, 0, - 958, 966, 618, 1422, 639, 0, 645, 629, 1422, 966, - 0, 962, 961, 982, 971, 969, 969, 956, 971, 954, - 987, 966, 967, 962, 983, 0, 0, 979, 978, 977, - 942, 941, 0, 941, 0, 0, 0, 494, 642, 965, - - 952, 955, 937, 950, 937, 936, 957, 946, 944, 944, - 962, 961, 960, 925, 924, 0, 929, 673, 680, 339, - 946, 936, 924, 920, 921, 920, 953, 932, 929, 950, - 931, 927, 929, 912, 909, 923, 909, 908, 941, 616, - 0, 917, 920, 912, 903, 911, 901, 917, 906, 900, - 902, 898, 898, 895, 0, 882, 876, 884, 863, 860, - 881, 880, 668, 0, 856, 859, 1422, 415, 1422, 705, - 0, 711, 874, 857, 838, 0, 855, 854, 837, 834, - 835, 834, 826, 834, 824, 830, 0, 830, 0, 827, - 826, 825, 844, 833, 831, 831, 814, 817, 28, 83, - - 148, 179, 196, 213, 222, 495, 227, 258, 300, 299, - 319, 332, 336, 339, 343, 372, 371, 374, 376, 439, - 426, 416, 436, 422, 427, 435, 0, 0, 476, 503, - 477, 523, 518, 498, 522, 510, 525, 560, 541, 540, - 567, 547, 552, 566, 570, 565, 567, 584, 570, 583, - 584, 594, 592, 583, 585, 609, 0, 0, 610, 611, - 612, 647, 632, 635, 658, 651, 636, 646, 0, 0, - 660, 664, 658, 0, 659, 644, 0, 648, 672, 673, - 658, 657, 673, 674, 0, 668, 678, 670, 678, 702, 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1422, 794, 804, 861, 1422, 0, 801, 863, 866, 867, + 868, 817, 818, 874, 875, 1422, 1422, 913, 919, 923, + 927, 931, 935, 939, 943, 947, 951, 955, 957 } ; -static yyconst flex_int16_t yy_def[1059] = +static const flex_int16_t yy_def[1060] = { 0, - 1046, 1, 1047, 1047, 1048, 1048, 1046, 1046, 1046, 1046, - 1046, 1046, 1046, 1046, 1046, 1046, 1046, 1046, 1046, 1046, - 1046, 1046, 1046, 1049, 1046, 1049, 1049, 1049, 1049, 1049, - 1049, 1049, 1049, 1049, 1049, 1049, 1049, 1049, 1049, 1049, - 1049, 1049, 1049, 1049, 1049, 1046, 1046, 1046, 1046, 1046, - 1046, 1046, 1046, 1046, 1050, 1046, 1046, 1046, 1046, 1046, - 1046, 1046, 1046, 1046, 1046, 1046, 1046, 1046, 1046, 1046, - 19, 1046, 1046, 1046, 1051, 20, 1046, 1046, 1046, 1046, - 1046, 1046, 1049, 1046, 1046, 1049, 1049, 1049, 1049, 1049, - 1049, 1049, 1049, 1049, 1049, 1049, 1049, 1049, 1049, 1049, - - 1049, 1049, 1049, 1049, 1049, 1049, 1049, 1049, 1049, 1049, - 1049, 1049, 1049, 1049, 1049, 1049, 1049, 1049, 1049, 1049, - 1049, 1049, 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1047, 58, + 58, 7, 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, + 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, + 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, + 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, + 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, + 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, + 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, + 1047, 1047 } ; -static yyconst flex_int16_t yy_chk[1493] = +static const flex_int16_t yy_chk[1493] = { 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, @@ -936,7 +1000,7 @@ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 2, 9, 799, 9, 2, 3, 3, 3, 3, 3, + 2, 9, 800, 9, 2, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, @@ -944,155 +1008,155 @@ 17, 17, 21, 21, 26, 15, 16, 3, 13, 23, 23, 25, 27, 30, 27, 30, 35, 27, 27, 26, 26, 36, 40, 46, 30, 36, 50, 47, 50, 47, - 35, 47, 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531, 530, 528, - 527, 526, 523, 520, 519, 518, 517, 506, 505, 504, - 502, 501, 500, 499, 498, 495, 490, 489, 488, 486, - 485, 483, 482, 480, 479, 478, 477, 476, 474, 473, - 468, 467, 465, 464, 463, 462, 461, 460, 459, 458, - 457, 456, 455, 453, 452, 451, 450, 449, 448, 447, - 446, 445, 443, 442, 441, 440, 439, 438, 437, 433, - 429, 428, 427, 424, 422, 412, 410, 406, 405, 404, - 403, 402, 401, 400, 398, 397, 395, 391, 389, 388, - 387, 382, 381, 380, 379, 378, 377, 376, 371, 369, - - 368, 367, 366, 365, 363, 362, 359, 358, 357, 356, - 355, 354, 353, 352, 351, 350, 349, 348, 347, 346, - 345, 344, 343, 342, 341, 340, 339, 338, 337, 336, - 335, 334, 333, 332, 331, 328, 326, 325, 324, 323, - 322, 321, 320, 319, 317, 313, 311, 310, 309, 308, - 304, 302, 301, 300, 299, 298, 297, 296, 295, 291, - 290, 288, 287, 286, 284, 283, 278, 277, 270, 269, - 268, 267, 266, 265, 264, 263, 261, 260, 259, 258, - 257, 255, 254, 253, 252, 251, 250, 249, 248, 247, - 246, 245, 244, 243, 242, 241, 240, 239, 238, 236, - - 235, 234, 233, 232, 231, 230, 229, 228, 227, 226, - 224, 223, 222, 221, 220, 219, 218, 217, 216, 215, - 214, 213, 212, 211, 210, 209, 208, 206, 205, 204, - 203, 202, 201, 200, 199, 198, 197, 196, 195, 194, - 192, 191, 190, 189, 187, 186, 185, 184, 183, 182, - 180, 174, 173, 169, 168, 161, 160, 159, 158, 151, - 150, 148, 147, 146, 142, 141, 140, 139, 138, 135, - 134, 132, 131, 129, 128, 126, 124, 123, 122, 120, - 119, 118, 116, 115, 113, 112, 111, 110, 109, 108, - 105, 104, 103, 102, 101, 100, 99, 98, 97, 95, + 31, 43, 34, 45, 72, 34, 43, 145, 39, 44, + 43, 39, 45, 43, 4, 19, 145, 19, 19, 19, + 19, 19, 19, 19, 89, 803, 41, 42, 89, 59, + 42, 59, 19, 41, 41, 48, 48, 107, 41, 42, + 804, 122, 19, 19, 41, 41, 42, 41, 107, 122, + 19, 54, 54, 54, 54, 54, 54, 54, 97, 805, + 126, 144, 144, 97, 97, 19, 108, 126, 19, 20, + 806, 20, 20, 20, 20, 20, 20, 20, 128, 137, + 108, 118, 48, 131, 118, 118, 20, 808, 118, 48, + 118, 134, 128, 48, 128, 137, 20, 138, 48, 146, + + 131, 131, 809, 150, 20, 134, 150, 146, 194, 194, + 73, 138, 73, 73, 73, 73, 73, 73, 73, 20, + 69, 69, 69, 69, 69, 69, 69, 73, 155, 163, + 155, 163, 155, 238, 525, 69, 69, 238, 525, 69, + 721, 721, 74, 74, 810, 73, 74, 74, 74, 74, + 74, 74, 74, 69, 69, 156, 156, 157, 157, 811, + 69, 71, 71, 71, 71, 71, 71, 71, 165, 165, + 165, 165, 165, 165, 165, 178, 71, 71, 167, 167, + 71, 812, 167, 167, 167, 167, 167, 167, 167, 171, + 171, 189, 813, 171, 71, 71, 814, 257, 178, 815, + + 576, 71, 156, 816, 157, 189, 257, 171, 171, 156, + 817, 157, 576, 156, 171, 157, 769, 769, 156, 818, + 157, 172, 172, 819, 820, 172, 172, 172, 172, 172, + 172, 172, 176, 176, 176, 176, 176, 176, 176, 177, + 821, 821, 177, 226, 226, 226, 263, 263, 263, 273, + 273, 273, 273, 273, 273, 273, 274, 177, 822, 274, + 276, 276, 622, 177, 276, 276, 276, 276, 276, 276, + 276, 622, 281, 622, 274, 281, 293, 293, 293, 823, + 274, 280, 280, 280, 280, 280, 280, 280, 824, 825, + 281, 304, 304, 304, 826, 827, 281, 306, 306, 306, + + 315, 315, 315, 319, 319, 319, 328, 328, 328, 371, + 371, 371, 384, 384, 384, 384, 384, 384, 384, 385, + 699, 807, 385, 424, 424, 424, 435, 435, 435, 436, + 436, 436, 699, 807, 424, 424, 830, 385, 437, 437, + 437, 831, 832, 385, 492, 492, 492, 493, 493, 493, + 494, 494, 494, 498, 498, 498, 543, 543, 543, 551, + 577, 833, 834, 835, 498, 498, 836, 543, 543, 577, + 837, 577, 577, 551, 551, 551, 551, 551, 551, 551, + 595, 595, 595, 611, 611, 838, 839, 840, 841, 612, + 612, 595, 595, 842, 595, 843, 844, 611, 611, 611, + + 611, 611, 611, 612, 612, 612, 612, 612, 612, 612, + 636, 636, 636, 845, 846, 655, 660, 660, 660, 664, + 664, 636, 636, 611, 655, 847, 655, 660, 660, 848, + 669, 849, 850, 664, 664, 664, 664, 664, 664, 664, + 666, 666, 741, 851, 852, 853, 668, 668, 611, 854, + 855, 741, 856, 741, 666, 666, 666, 666, 666, 666, + 668, 668, 668, 668, 668, 668, 668, 669, 700, 857, + 860, 861, 862, 863, 719, 719, 669, 700, 864, 700, + 700, 720, 720, 865, 866, 867, 868, 669, 719, 719, + 719, 719, 719, 719, 764, 720, 720, 720, 720, 720, + + 720, 720, 869, 764, 872, 764, 771, 771, 873, 874, + 876, 877, 773, 773, 719, 879, 880, 881, 882, 883, + 771, 771, 771, 771, 771, 771, 773, 773, 773, 773, + 773, 773, 773, 884, 885, 887, 888, 889, 890, 719, + 891, 892, 895, 896, 897, 900, 901, 902, 903, 904, + 905, 906, 907, 908, 909, 910, 911, 912, 913, 914, + 917, 909, 918, 919, 922, 923, 924, 925, 926, 927, + 928, 929, 930, 931, 932, 933, 934, 935, 936, 939, + 940, 941, 942, 943, 946, 947, 950, 951, 941, 952, + 954, 955, 956, 958, 959, 960, 965, 966, 967, 968, + + 969, 970, 971, 972, 973, 974, 975, 976, 969, 978, + 979, 980, 981, 982, 983, 984, 985, 986, 988, 987, + 989, 992, 993, 994, 995, 986, 987, 997, 1000, 1001, + 1002, 940, 1005, 1004, 1008, 1009, 1010, 1001, 1002, 942, + 1004, 1011, 1013, 1014, 1016, 1017, 1018, 1019, 1021, 1022, + 1023, 1014, 1024, 1017, 1027, 1028, 968, 1029, 1030, 1032, + 1024, 1033, 1034, 1037, 1038, 1029, 1030, 1039, 1040, 1041, + 1034, 1038, 1042, 1043, 1039, 1044, 1045, 799, 798, 797, + 796, 795, 794, 1044, 1045, 793, 792, 791, 789, 1005, + 787, 786, 785, 784, 783, 782, 781, 780, 779, 778, + + 776, 1016, 775, 774, 767, 766, 763, 762, 761, 760, + 759, 1040, 1041, 1048, 1048, 1048, 1048, 1048, 1048, 1049, + 1049, 1049, 1049, 1049, 1049, 1050, 1050, 1050, 1050, 1051, + 1051, 1051, 1051, 1052, 1052, 1053, 758, 1053, 1053, 1053, + 1053, 1054, 757, 755, 1054, 1055, 754, 753, 1055, 1056, + 752, 751, 1056, 1057, 750, 749, 1057, 1058, 1058, 1059, + 1059, 748, 747, 746, 745, 744, 743, 740, 739, 738, + 737, 736, 735, 734, 733, 732, 731, 730, 729, 728, + 727, 726, 725, 724, 723, 722, 718, 716, 715, 714, + 713, 712, 711, 710, 709, 708, 707, 706, 705, 704, + + 703, 702, 701, 695, 693, 692, 691, 690, 689, 686, + 685, 684, 683, 682, 681, 680, 679, 678, 677, 676, + 675, 674, 673, 671, 663, 662, 658, 657, 654, 652, + 651, 650, 649, 648, 647, 646, 645, 641, 640, 639, + 637, 635, 634, 633, 632, 631, 630, 629, 628, 627, + 626, 625, 624, 621, 616, 615, 614, 613, 610, 609, + 608, 606, 605, 603, 602, 601, 600, 599, 597, 596, + 594, 593, 592, 591, 590, 588, 587, 586, 585, 583, + 582, 581, 580, 579, 575, 574, 573, 572, 571, 570, + 558, 557, 556, 555, 554, 553, 552, 550, 549, 548, + + 547, 546, 545, 544, 542, 541, 538, 532, 531, 529, + 528, 527, 524, 521, 520, 519, 518, 507, 506, 505, + 503, 502, 501, 500, 499, 496, 491, 490, 489, 487, + 486, 484, 483, 481, 480, 479, 478, 477, 475, 474, + 469, 468, 466, 465, 464, 463, 462, 461, 460, 459, + 458, 457, 456, 454, 453, 452, 451, 450, 449, 448, + 447, 446, 444, 443, 442, 441, 440, 439, 438, 434, + 430, 429, 428, 425, 423, 413, 411, 407, 406, 405, + 404, 403, 402, 401, 399, 398, 396, 392, 390, 389, + 388, 383, 382, 381, 380, 379, 378, 377, 372, 370, + + 369, 368, 367, 366, 364, 363, 360, 359, 358, 357, + 356, 355, 354, 353, 352, 351, 350, 349, 348, 347, + 346, 345, 344, 343, 342, 341, 340, 339, 338, 337, + 336, 335, 334, 333, 332, 329, 327, 326, 325, 324, + 323, 322, 321, 320, 318, 314, 312, 311, 310, 309, + 305, 303, 302, 301, 300, 299, 298, 297, 296, 292, + 291, 289, 288, 287, 285, 284, 279, 278, 271, 270, + 269, 268, 267, 266, 265, 264, 262, 261, 260, 259, + 258, 256, 255, 254, 253, 252, 251, 250, 249, 248, + 247, 246, 245, 244, 243, 242, 241, 240, 239, 237, + + 236, 235, 234, 233, 232, 231, 230, 229, 228, 227, + 225, 224, 223, 222, 221, 220, 219, 218, 217, 216, + 215, 214, 213, 212, 211, 210, 209, 207, 206, 205, + 204, 203, 202, 201, 200, 199, 198, 197, 196, 195, + 193, 192, 191, 190, 188, 187, 186, 185, 184, 183, + 181, 175, 174, 170, 169, 162, 161, 160, 159, 152, + 151, 149, 148, 147, 143, 142, 141, 140, 139, 136, + 135, 133, 132, 130, 129, 127, 125, 124, 123, 121, + 120, 119, 117, 116, 114, 113, 112, 111, 110, 109, + 106, 105, 104, 103, 102, 101, 100, 99, 98, 96, - 94, 93, 92, 91, 90, 89, 87, 86, 82, 78, + 95, 94, 93, 92, 91, 90, 88, 87, 83, 79, 52, 38, 32, 22, 18, 14, 12, 11, 7, 6, - 5, 1046, 1046, 1046, 1046, 1046, 1046, 1046, 1046, 1046, - 1046, 1046, 1046, 1046, 1046, 1046, 1046, 1046, 1046, 1046, - 1046, 1046, 1046, 1046, 1046, 1046, 1046, 1046, 1046, 1046, - 1046, 1046, 1046, 1046, 1046, 1046, 1046, 1046, 1046, 1046, - 1046, 1046, 1046, 1046, 1046, 1046, 1046, 1046, 1046, 1046, - 1046, 1046, 1046, 1046, 1046, 1046, 1046, 1046, 1046, 1046, - 1046, 1046, 1046, 1046, 1046, 1046, 1046, 1046, 1046, 1046, - 1046, 1046 + 5, 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, + 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, + 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, + 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, + 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, + 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, + 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, 1047, + 1047, 1047 } ; @@ -1103,8 +1167,8 @@ #define yymore() yymore_used_but_not_detected #define YY_MORE_ADJ 0 #define YY_RESTORE_YY_MORE_OFFSET -#line 1 "../../../src/compiler/glsl/glsl_lexer.ll" -#line 2 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 1 "./glsl/glsl_lexer.ll" +#line 2 "./glsl/glsl_lexer.ll" /* * Copyright © 2008, 2009 Intel Corporation * @@ -1186,8 +1250,8 @@ "illegal use of reserved word `%s'", yytext); \ return ERROR_TOK; \ } else { \ - void *mem_ctx = yyextra; \ - yylval->identifier = ralloc_strdup(mem_ctx, yytext); \ + void *mem_ctx = yyextra->linalloc; \ + yylval->identifier = linear_strdup(mem_ctx, yytext); \ return classify_identifier(yyextra, yytext); \ } \ } while (0) @@ -1247,11 +1311,13 @@ #define LITERAL_INTEGER(base) \ literal_integer(yytext, yyleng, yyextra, yylval, yylloc, base) -/* Note: When adding any start conditions to this list, you must also -* update the "Internal compiler error" catch-all rule near the end of -* this file. */ +#line 1314 "glsl/glsl_lexer.cpp" +#line 154 "./glsl/glsl_lexer.ll" + /* Note: When adding any start conditions to this list, you must also + * update the "Internal compiler error" catch-all rule near the end of + * this file. */ -#line 1255 "glsl/glsl_lexer.cpp" +#line 1320 "glsl/glsl_lexer.cpp" #define INITIAL 0 #define PP 1 @@ -1305,7 +1371,7 @@ }; /* end struct yyguts_t */ -static int yy_init_globals (yyscan_t yyscanner ); +static int yy_init_globals ( yyscan_t yyscanner ); /* This must go here because YYSTYPE and YYLTYPE are included * from bison output in section 1.*/ @@ -1315,48 +1381,48 @@ int _mesa_glsl_lexer_lex_init (yyscan_t* scanner); -int _mesa_glsl_lexer_lex_init_extra (YY_EXTRA_TYPE user_defined,yyscan_t* scanner); +int _mesa_glsl_lexer_lex_init_extra ( YY_EXTRA_TYPE user_defined, yyscan_t* scanner); /* Accessor methods to globals. These are made visible to non-reentrant scanners for convenience. */ -int _mesa_glsl_lexer_lex_destroy (yyscan_t yyscanner ); +int _mesa_glsl_lexer_lex_destroy ( yyscan_t yyscanner ); -int _mesa_glsl_lexer_get_debug (yyscan_t yyscanner ); +int _mesa_glsl_lexer_get_debug ( yyscan_t yyscanner ); -void _mesa_glsl_lexer_set_debug (int debug_flag ,yyscan_t yyscanner ); +void _mesa_glsl_lexer_set_debug ( int debug_flag , yyscan_t yyscanner ); -YY_EXTRA_TYPE _mesa_glsl_lexer_get_extra (yyscan_t yyscanner ); +YY_EXTRA_TYPE _mesa_glsl_lexer_get_extra ( yyscan_t yyscanner ); -void _mesa_glsl_lexer_set_extra (YY_EXTRA_TYPE user_defined ,yyscan_t yyscanner ); +void _mesa_glsl_lexer_set_extra ( YY_EXTRA_TYPE user_defined , yyscan_t yyscanner ); -FILE *_mesa_glsl_lexer_get_in (yyscan_t yyscanner ); +FILE *_mesa_glsl_lexer_get_in ( yyscan_t yyscanner ); -void _mesa_glsl_lexer_set_in (FILE * _in_str ,yyscan_t yyscanner ); +void _mesa_glsl_lexer_set_in ( FILE * _in_str , yyscan_t yyscanner ); -FILE *_mesa_glsl_lexer_get_out (yyscan_t yyscanner ); +FILE *_mesa_glsl_lexer_get_out ( yyscan_t yyscanner ); -void _mesa_glsl_lexer_set_out (FILE * _out_str ,yyscan_t yyscanner ); +void _mesa_glsl_lexer_set_out ( FILE * _out_str , yyscan_t yyscanner ); - int _mesa_glsl_lexer_get_leng (yyscan_t yyscanner ); + int _mesa_glsl_lexer_get_leng ( yyscan_t yyscanner ); -char *_mesa_glsl_lexer_get_text (yyscan_t yyscanner ); +char *_mesa_glsl_lexer_get_text ( yyscan_t yyscanner ); -int _mesa_glsl_lexer_get_lineno (yyscan_t yyscanner ); +int _mesa_glsl_lexer_get_lineno ( yyscan_t yyscanner ); -void _mesa_glsl_lexer_set_lineno (int _line_number ,yyscan_t yyscanner ); +void _mesa_glsl_lexer_set_lineno ( int _line_number , yyscan_t yyscanner ); -int _mesa_glsl_lexer_get_column (yyscan_t yyscanner ); +int _mesa_glsl_lexer_get_column ( yyscan_t yyscanner ); -void _mesa_glsl_lexer_set_column (int _column_no ,yyscan_t yyscanner ); +void _mesa_glsl_lexer_set_column ( int _column_no , yyscan_t yyscanner ); -YYSTYPE * _mesa_glsl_lexer_get_lval (yyscan_t yyscanner ); +YYSTYPE * _mesa_glsl_lexer_get_lval ( yyscan_t yyscanner ); -void _mesa_glsl_lexer_set_lval (YYSTYPE * yylval_param ,yyscan_t yyscanner ); +void _mesa_glsl_lexer_set_lval ( YYSTYPE * yylval_param , yyscan_t yyscanner ); - YYLTYPE *_mesa_glsl_lexer_get_lloc (yyscan_t yyscanner ); + YYLTYPE *_mesa_glsl_lexer_get_lloc ( yyscan_t yyscanner ); - void _mesa_glsl_lexer_set_lloc (YYLTYPE * yylloc_param ,yyscan_t yyscanner ); + void _mesa_glsl_lexer_set_lloc ( YYLTYPE * yylloc_param , yyscan_t yyscanner ); /* Macros after this point can all be overridden by user definitions in * section 1. @@ -1364,9 +1430,9 @@ #ifndef YY_SKIP_YYWRAP #ifdef __cplusplus -extern "C" int _mesa_glsl_lexer_wrap (yyscan_t yyscanner ); +extern "C" int _mesa_glsl_lexer_wrap ( yyscan_t yyscanner ); #else -extern int _mesa_glsl_lexer_wrap (yyscan_t yyscanner ); +extern int _mesa_glsl_lexer_wrap ( yyscan_t yyscanner ); #endif #endif @@ -1375,19 +1441,18 @@ #endif #ifndef yytext_ptr -static void yy_flex_strncpy (char *,yyconst char *,int ,yyscan_t yyscanner); +static void yy_flex_strncpy ( char *, const char *, int , yyscan_t yyscanner); #endif #ifdef YY_NEED_STRLEN -static int yy_flex_strlen (yyconst char * ,yyscan_t yyscanner); +static int yy_flex_strlen ( const char * , yyscan_t yyscanner); #endif #ifndef YY_NO_INPUT - #ifdef __cplusplus -static int yyinput (yyscan_t yyscanner ); +static int yyinput ( yyscan_t yyscanner ); #else -static int input (yyscan_t yyscanner ); +static int input ( yyscan_t yyscanner ); #endif #endif @@ -1418,7 +1483,7 @@ if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \ { \ int c = '*'; \ - size_t n; \ + int n; \ for ( n = 0; n < max_size && \ (c = getc( yyin )) != EOF && c != '\n'; ++n ) \ buf[n] = (char) c; \ @@ -1431,7 +1496,7 @@ else \ { \ errno=0; \ - while ( (result = (int) fread(buf, 1, max_size, yyin))==0 && ferror(yyin)) \ + while ( (result = (int) fread(buf, 1, (yy_size_t) max_size, yyin)) == 0 && ferror(yyin)) \ { \ if( errno != EINTR) \ { \ @@ -1473,7 +1538,7 @@ #define YY_DECL_IS_OURS 1 extern int _mesa_glsl_lexer_lex \ - (YYSTYPE * yylval_param,YYLTYPE * yylloc_param ,yyscan_t yyscanner); + (YYSTYPE * yylval_param, YYLTYPE * yylloc_param , yyscan_t yyscanner); #define YY_DECL int _mesa_glsl_lexer_lex \ (YYSTYPE * yylval_param, YYLTYPE * yylloc_param , yyscan_t yyscanner) @@ -1537,10 +1602,10 @@ } { -#line 165 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 166 "./glsl/glsl_lexer.ll" -#line 1544 "glsl/glsl_lexer.cpp" +#line 1608 "glsl/glsl_lexer.cpp" while ( /*CONSTCOND*/1 ) /* loops until end-of-file is reached */ { @@ -1568,13 +1633,13 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 1047 ) - yy_c = yy_meta[(unsigned int) yy_c]; + if ( yy_current_state >= 1048 ) + yy_c = yy_meta[yy_c]; } - yy_current_state = yy_nxt[yy_base[yy_current_state] + (flex_int16_t) yy_c]; + yy_current_state = yy_nxt[yy_base[yy_current_state] + yy_c]; ++yy_cp; } - while ( yy_current_state != 1046 ); + while ( yy_current_state != 1047 ); yy_cp = yyg->yy_last_accepting_cpos; yy_current_state = yyg->yy_last_accepting_state; @@ -1596,7 +1661,7 @@ case 1: YY_RULE_SETUP -#line 167 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 168 "./glsl/glsl_lexer.ll" ; YY_BREAK /* Preprocessor tokens. */ @@ -1605,17 +1670,17 @@ yyg->yy_c_buf_p = yy_cp -= 1; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 170 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 171 "./glsl/glsl_lexer.ll" ; YY_BREAK case 3: YY_RULE_SETUP -#line 171 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 172 "./glsl/glsl_lexer.ll" { BEGIN PP; return VERSION_TOK; } YY_BREAK case 4: YY_RULE_SETUP -#line 172 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 173 "./glsl/glsl_lexer.ll" { BEGIN PP; return EXTENSION; } YY_BREAK case 5: @@ -1623,7 +1688,7 @@ yyg->yy_c_buf_p = yy_cp -= 1; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 173 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 174 "./glsl/glsl_lexer.ll" { /* Eat characters until the first digit is * encountered @@ -1654,7 +1719,7 @@ yyg->yy_c_buf_p = yy_cp -= 1; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 197 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 198 "./glsl/glsl_lexer.ll" { /* Eat characters until the first digit is * encountered @@ -1680,7 +1745,7 @@ YY_BREAK case 7: YY_RULE_SETUP -#line 219 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 220 "./glsl/glsl_lexer.ll" { BEGIN PP; return PRAGMA_DEBUG_ON; @@ -1688,7 +1753,7 @@ YY_BREAK case 8: YY_RULE_SETUP -#line 223 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 224 "./glsl/glsl_lexer.ll" { BEGIN PP; return PRAGMA_DEBUG_OFF; @@ -1696,7 +1761,7 @@ YY_BREAK case 9: YY_RULE_SETUP -#line 227 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 228 "./glsl/glsl_lexer.ll" { BEGIN PP; return PRAGMA_OPTIMIZE_ON; @@ -1704,7 +1769,7 @@ YY_BREAK case 10: YY_RULE_SETUP -#line 231 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 232 "./glsl/glsl_lexer.ll" { BEGIN PP; return PRAGMA_OPTIMIZE_OFF; @@ -1712,7 +1777,7 @@ YY_BREAK case 11: YY_RULE_SETUP -#line 235 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 236 "./glsl/glsl_lexer.ll" { BEGIN PP; return PRAGMA_INVARIANT_ALL; @@ -1720,496 +1785,504 @@ YY_BREAK case 12: YY_RULE_SETUP -#line 239 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 240 "./glsl/glsl_lexer.ll" { BEGIN PRAGMA; } YY_BREAK case 13: /* rule 13 can match eol */ YY_RULE_SETUP -#line 241 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 242 "./glsl/glsl_lexer.ll" { BEGIN 0; yylineno++; yycolumn = 0; } YY_BREAK case 14: YY_RULE_SETUP -#line 242 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 243 "./glsl/glsl_lexer.ll" { } YY_BREAK case 15: YY_RULE_SETUP -#line 244 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 245 "./glsl/glsl_lexer.ll" { } YY_BREAK case 16: YY_RULE_SETUP -#line 245 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 246 "./glsl/glsl_lexer.ll" { } YY_BREAK case 17: YY_RULE_SETUP -#line 246 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 247 "./glsl/glsl_lexer.ll" return COLON; YY_BREAK case 18: YY_RULE_SETUP -#line 247 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 248 "./glsl/glsl_lexer.ll" { - void *mem_ctx = yyextra; - yylval->identifier = ralloc_strdup(mem_ctx, yytext); + void *mem_ctx = yyextra->linalloc; + yylval->identifier = linear_strdup(mem_ctx, yytext); return IDENTIFIER; } YY_BREAK case 19: YY_RULE_SETUP -#line 252 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 253 "./glsl/glsl_lexer.ll" { yylval->n = strtol(yytext, NULL, 10); return INTCONSTANT; } YY_BREAK case 20: -/* rule 20 can match eol */ YY_RULE_SETUP -#line 256 "../../../src/compiler/glsl/glsl_lexer.ll" -{ BEGIN 0; yylineno++; yycolumn = 0; return EOL; } +#line 257 "./glsl/glsl_lexer.ll" +{ + yylval->n = 0; + return INTCONSTANT; + } YY_BREAK case 21: +/* rule 21 can match eol */ YY_RULE_SETUP -#line 257 "../../../src/compiler/glsl/glsl_lexer.ll" -{ return yytext[0]; } +#line 261 "./glsl/glsl_lexer.ll" +{ BEGIN 0; yylineno++; yycolumn = 0; return EOL; } YY_BREAK case 22: -/* rule 22 can match eol */ YY_RULE_SETUP -#line 259 "../../../src/compiler/glsl/glsl_lexer.ll" -{ yylineno++; yycolumn = 0; } +#line 262 "./glsl/glsl_lexer.ll" +{ return yytext[0]; } YY_BREAK case 23: +/* rule 23 can match eol */ YY_RULE_SETUP -#line 261 "../../../src/compiler/glsl/glsl_lexer.ll" -DEPRECATED_ES_KEYWORD(ATTRIBUTE); +#line 264 "./glsl/glsl_lexer.ll" +{ yylineno++; yycolumn = 0; } YY_BREAK case 24: YY_RULE_SETUP -#line 262 "../../../src/compiler/glsl/glsl_lexer.ll" -return CONST_TOK; +#line 266 "./glsl/glsl_lexer.ll" +DEPRECATED_ES_KEYWORD(ATTRIBUTE); YY_BREAK case 25: YY_RULE_SETUP -#line 263 "../../../src/compiler/glsl/glsl_lexer.ll" -return BOOL_TOK; +#line 267 "./glsl/glsl_lexer.ll" +return CONST_TOK; YY_BREAK case 26: YY_RULE_SETUP -#line 264 "../../../src/compiler/glsl/glsl_lexer.ll" -return FLOAT_TOK; +#line 268 "./glsl/glsl_lexer.ll" +return BOOL_TOK; YY_BREAK case 27: YY_RULE_SETUP -#line 265 "../../../src/compiler/glsl/glsl_lexer.ll" -return INT_TOK; +#line 269 "./glsl/glsl_lexer.ll" +return FLOAT_TOK; YY_BREAK case 28: YY_RULE_SETUP -#line 266 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(130, 300, 130, 300, UINT_TOK); +#line 270 "./glsl/glsl_lexer.ll" +return INT_TOK; YY_BREAK case 29: YY_RULE_SETUP -#line 268 "../../../src/compiler/glsl/glsl_lexer.ll" -return BREAK; +#line 271 "./glsl/glsl_lexer.ll" +KEYWORD(130, 300, 130, 300, UINT_TOK); YY_BREAK case 30: YY_RULE_SETUP -#line 269 "../../../src/compiler/glsl/glsl_lexer.ll" -return CONTINUE; +#line 273 "./glsl/glsl_lexer.ll" +return BREAK; YY_BREAK case 31: YY_RULE_SETUP -#line 270 "../../../src/compiler/glsl/glsl_lexer.ll" -return DO; +#line 274 "./glsl/glsl_lexer.ll" +return CONTINUE; YY_BREAK case 32: YY_RULE_SETUP -#line 271 "../../../src/compiler/glsl/glsl_lexer.ll" -return WHILE; +#line 275 "./glsl/glsl_lexer.ll" +return DO; YY_BREAK case 33: YY_RULE_SETUP -#line 272 "../../../src/compiler/glsl/glsl_lexer.ll" -return ELSE; +#line 276 "./glsl/glsl_lexer.ll" +return WHILE; YY_BREAK case 34: YY_RULE_SETUP -#line 273 "../../../src/compiler/glsl/glsl_lexer.ll" -return FOR; +#line 277 "./glsl/glsl_lexer.ll" +return ELSE; YY_BREAK case 35: YY_RULE_SETUP -#line 274 "../../../src/compiler/glsl/glsl_lexer.ll" -return IF; +#line 278 "./glsl/glsl_lexer.ll" +return FOR; YY_BREAK case 36: YY_RULE_SETUP -#line 275 "../../../src/compiler/glsl/glsl_lexer.ll" -return DISCARD; +#line 279 "./glsl/glsl_lexer.ll" +return IF; YY_BREAK case 37: YY_RULE_SETUP -#line 276 "../../../src/compiler/glsl/glsl_lexer.ll" -return RETURN; +#line 280 "./glsl/glsl_lexer.ll" +return DISCARD; YY_BREAK case 38: YY_RULE_SETUP -#line 278 "../../../src/compiler/glsl/glsl_lexer.ll" -return BVEC2; +#line 281 "./glsl/glsl_lexer.ll" +return RETURN; YY_BREAK case 39: YY_RULE_SETUP -#line 279 "../../../src/compiler/glsl/glsl_lexer.ll" -return BVEC3; +#line 283 "./glsl/glsl_lexer.ll" +return BVEC2; YY_BREAK case 40: YY_RULE_SETUP -#line 280 "../../../src/compiler/glsl/glsl_lexer.ll" -return BVEC4; +#line 284 "./glsl/glsl_lexer.ll" +return BVEC3; YY_BREAK case 41: YY_RULE_SETUP -#line 281 "../../../src/compiler/glsl/glsl_lexer.ll" -return IVEC2; +#line 285 "./glsl/glsl_lexer.ll" +return BVEC4; YY_BREAK case 42: YY_RULE_SETUP -#line 282 "../../../src/compiler/glsl/glsl_lexer.ll" -return IVEC3; +#line 286 "./glsl/glsl_lexer.ll" +return IVEC2; YY_BREAK case 43: YY_RULE_SETUP -#line 283 "../../../src/compiler/glsl/glsl_lexer.ll" -return IVEC4; +#line 287 "./glsl/glsl_lexer.ll" +return IVEC3; YY_BREAK case 44: YY_RULE_SETUP -#line 284 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(130, 300, 130, 300, UVEC2); +#line 288 "./glsl/glsl_lexer.ll" +return IVEC4; YY_BREAK case 45: YY_RULE_SETUP -#line 285 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(130, 300, 130, 300, UVEC3); +#line 289 "./glsl/glsl_lexer.ll" +KEYWORD(130, 300, 130, 300, UVEC2); YY_BREAK case 46: YY_RULE_SETUP -#line 286 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(130, 300, 130, 300, UVEC4); +#line 290 "./glsl/glsl_lexer.ll" +KEYWORD(130, 300, 130, 300, UVEC3); YY_BREAK case 47: YY_RULE_SETUP -#line 287 "../../../src/compiler/glsl/glsl_lexer.ll" -return VEC2; +#line 291 "./glsl/glsl_lexer.ll" +KEYWORD(130, 300, 130, 300, UVEC4); YY_BREAK case 48: YY_RULE_SETUP -#line 288 "../../../src/compiler/glsl/glsl_lexer.ll" -return VEC3; +#line 292 "./glsl/glsl_lexer.ll" +return VEC2; YY_BREAK case 49: YY_RULE_SETUP -#line 289 "../../../src/compiler/glsl/glsl_lexer.ll" -return VEC4; +#line 293 "./glsl/glsl_lexer.ll" +return VEC3; YY_BREAK case 50: YY_RULE_SETUP -#line 290 "../../../src/compiler/glsl/glsl_lexer.ll" -return MAT2X2; +#line 294 "./glsl/glsl_lexer.ll" +return VEC4; YY_BREAK case 51: YY_RULE_SETUP -#line 291 "../../../src/compiler/glsl/glsl_lexer.ll" -return MAT3X3; +#line 295 "./glsl/glsl_lexer.ll" +return MAT2X2; YY_BREAK case 52: YY_RULE_SETUP -#line 292 "../../../src/compiler/glsl/glsl_lexer.ll" -return MAT4X4; +#line 296 "./glsl/glsl_lexer.ll" +return MAT3X3; YY_BREAK case 53: YY_RULE_SETUP -#line 293 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(120, 300, 120, 300, MAT2X2); +#line 297 "./glsl/glsl_lexer.ll" +return MAT4X4; YY_BREAK case 54: YY_RULE_SETUP -#line 294 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(120, 300, 120, 300, MAT2X3); +#line 298 "./glsl/glsl_lexer.ll" +KEYWORD(120, 300, 120, 300, MAT2X2); YY_BREAK case 55: YY_RULE_SETUP -#line 295 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(120, 300, 120, 300, MAT2X4); +#line 299 "./glsl/glsl_lexer.ll" +KEYWORD(120, 300, 120, 300, MAT2X3); YY_BREAK case 56: YY_RULE_SETUP -#line 296 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(120, 300, 120, 300, MAT3X2); +#line 300 "./glsl/glsl_lexer.ll" +KEYWORD(120, 300, 120, 300, MAT2X4); YY_BREAK case 57: YY_RULE_SETUP -#line 297 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(120, 300, 120, 300, MAT3X3); +#line 301 "./glsl/glsl_lexer.ll" +KEYWORD(120, 300, 120, 300, MAT3X2); YY_BREAK case 58: YY_RULE_SETUP -#line 298 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(120, 300, 120, 300, MAT3X4); +#line 302 "./glsl/glsl_lexer.ll" +KEYWORD(120, 300, 120, 300, MAT3X3); YY_BREAK case 59: YY_RULE_SETUP -#line 299 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(120, 300, 120, 300, MAT4X2); +#line 303 "./glsl/glsl_lexer.ll" +KEYWORD(120, 300, 120, 300, MAT3X4); YY_BREAK case 60: YY_RULE_SETUP -#line 300 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(120, 300, 120, 300, MAT4X3); +#line 304 "./glsl/glsl_lexer.ll" +KEYWORD(120, 300, 120, 300, MAT4X2); YY_BREAK case 61: YY_RULE_SETUP -#line 301 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(120, 300, 120, 300, MAT4X4); +#line 305 "./glsl/glsl_lexer.ll" +KEYWORD(120, 300, 120, 300, MAT4X3); YY_BREAK case 62: YY_RULE_SETUP -#line 303 "../../../src/compiler/glsl/glsl_lexer.ll" -return IN_TOK; +#line 306 "./glsl/glsl_lexer.ll" +KEYWORD(120, 300, 120, 300, MAT4X4); YY_BREAK case 63: YY_RULE_SETUP -#line 304 "../../../src/compiler/glsl/glsl_lexer.ll" -return OUT_TOK; +#line 308 "./glsl/glsl_lexer.ll" +return IN_TOK; YY_BREAK case 64: YY_RULE_SETUP -#line 305 "../../../src/compiler/glsl/glsl_lexer.ll" -return INOUT_TOK; +#line 309 "./glsl/glsl_lexer.ll" +return OUT_TOK; YY_BREAK case 65: YY_RULE_SETUP -#line 306 "../../../src/compiler/glsl/glsl_lexer.ll" -return UNIFORM; +#line 310 "./glsl/glsl_lexer.ll" +return INOUT_TOK; YY_BREAK case 66: YY_RULE_SETUP -#line 307 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(0, 0, 430, 310, yyextra->ARB_shader_storage_buffer_object_enable, BUFFER); +#line 311 "./glsl/glsl_lexer.ll" +return UNIFORM; YY_BREAK case 67: YY_RULE_SETUP -#line 308 "../../../src/compiler/glsl/glsl_lexer.ll" -DEPRECATED_ES_KEYWORD(VARYING); +#line 312 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(0, 0, 430, 310, yyextra->ARB_shader_storage_buffer_object_enable, BUFFER); YY_BREAK case 68: YY_RULE_SETUP -#line 309 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(120, 300, 120, 300, CENTROID); +#line 313 "./glsl/glsl_lexer.ll" +DEPRECATED_ES_KEYWORD(VARYING); YY_BREAK case 69: YY_RULE_SETUP -#line 310 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(120, 100, 120, 100, INVARIANT); +#line 314 "./glsl/glsl_lexer.ll" +KEYWORD(120, 300, 120, 300, CENTROID); YY_BREAK case 70: YY_RULE_SETUP -#line 311 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(130, 100, 130, 300, FLAT); +#line 315 "./glsl/glsl_lexer.ll" +KEYWORD(120, 100, 120, 100, INVARIANT); YY_BREAK case 71: YY_RULE_SETUP -#line 312 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(130, 300, 130, 300, SMOOTH); +#line 316 "./glsl/glsl_lexer.ll" +KEYWORD(130, 100, 130, 300, FLAT); YY_BREAK case 72: YY_RULE_SETUP -#line 313 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(130, 300, 130, 0, NOPERSPECTIVE); +#line 317 "./glsl/glsl_lexer.ll" +KEYWORD(130, 300, 130, 300, SMOOTH); YY_BREAK case 73: YY_RULE_SETUP -#line 314 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(0, 300, 400, 0, yyextra->ARB_tessellation_shader_enable, PATCH); +#line 318 "./glsl/glsl_lexer.ll" +KEYWORD(130, 300, 130, 0, NOPERSPECTIVE); YY_BREAK case 74: YY_RULE_SETUP -#line 316 "../../../src/compiler/glsl/glsl_lexer.ll" -DEPRECATED_ES_KEYWORD(SAMPLER1D); +#line 319 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(0, 300, 400, 320, yyextra->has_tessellation_shader(), PATCH); YY_BREAK case 75: YY_RULE_SETUP -#line 317 "../../../src/compiler/glsl/glsl_lexer.ll" -return SAMPLER2D; +#line 321 "./glsl/glsl_lexer.ll" +DEPRECATED_ES_KEYWORD(SAMPLER1D); YY_BREAK case 76: YY_RULE_SETUP -#line 318 "../../../src/compiler/glsl/glsl_lexer.ll" -return SAMPLER3D; +#line 322 "./glsl/glsl_lexer.ll" +return SAMPLER2D; YY_BREAK case 77: YY_RULE_SETUP -#line 319 "../../../src/compiler/glsl/glsl_lexer.ll" -return SAMPLERCUBE; +#line 323 "./glsl/glsl_lexer.ll" +return SAMPLER3D; YY_BREAK case 78: YY_RULE_SETUP -#line 320 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(130, 300, 130, 0, SAMPLER1DARRAY); +#line 324 "./glsl/glsl_lexer.ll" +return SAMPLERCUBE; YY_BREAK case 79: YY_RULE_SETUP -#line 321 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(130, 300, 130, 300, SAMPLER2DARRAY); +#line 325 "./glsl/glsl_lexer.ll" +KEYWORD(130, 300, 130, 0, SAMPLER1DARRAY); YY_BREAK case 80: YY_RULE_SETUP -#line 322 "../../../src/compiler/glsl/glsl_lexer.ll" -DEPRECATED_ES_KEYWORD(SAMPLER1DSHADOW); +#line 326 "./glsl/glsl_lexer.ll" +KEYWORD(130, 300, 130, 300, SAMPLER2DARRAY); YY_BREAK case 81: YY_RULE_SETUP -#line 323 "../../../src/compiler/glsl/glsl_lexer.ll" -return SAMPLER2DSHADOW; +#line 327 "./glsl/glsl_lexer.ll" +DEPRECATED_ES_KEYWORD(SAMPLER1DSHADOW); YY_BREAK case 82: YY_RULE_SETUP -#line 324 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(130, 300, 130, 300, SAMPLERCUBESHADOW); +#line 328 "./glsl/glsl_lexer.ll" +return SAMPLER2DSHADOW; YY_BREAK case 83: YY_RULE_SETUP -#line 325 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(130, 300, 130, 0, SAMPLER1DARRAYSHADOW); +#line 329 "./glsl/glsl_lexer.ll" +KEYWORD(130, 300, 130, 300, SAMPLERCUBESHADOW); YY_BREAK case 84: YY_RULE_SETUP -#line 326 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(130, 300, 130, 300, SAMPLER2DARRAYSHADOW); +#line 330 "./glsl/glsl_lexer.ll" +KEYWORD(130, 300, 130, 0, SAMPLER1DARRAYSHADOW); YY_BREAK case 85: YY_RULE_SETUP -#line 327 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(130, 300, 130, 0, ISAMPLER1D); +#line 331 "./glsl/glsl_lexer.ll" +KEYWORD(130, 300, 130, 300, SAMPLER2DARRAYSHADOW); YY_BREAK case 86: YY_RULE_SETUP -#line 328 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(130, 300, 130, 300, ISAMPLER2D); +#line 332 "./glsl/glsl_lexer.ll" +KEYWORD(130, 300, 130, 0, ISAMPLER1D); YY_BREAK case 87: YY_RULE_SETUP -#line 329 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(130, 300, 130, 300, ISAMPLER3D); +#line 333 "./glsl/glsl_lexer.ll" +KEYWORD(130, 300, 130, 300, ISAMPLER2D); YY_BREAK case 88: YY_RULE_SETUP -#line 330 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(130, 300, 130, 300, ISAMPLERCUBE); +#line 334 "./glsl/glsl_lexer.ll" +KEYWORD(130, 300, 130, 300, ISAMPLER3D); YY_BREAK case 89: YY_RULE_SETUP -#line 331 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(130, 300, 130, 0, ISAMPLER1DARRAY); +#line 335 "./glsl/glsl_lexer.ll" +KEYWORD(130, 300, 130, 300, ISAMPLERCUBE); YY_BREAK case 90: YY_RULE_SETUP -#line 332 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(130, 300, 130, 300, ISAMPLER2DARRAY); +#line 336 "./glsl/glsl_lexer.ll" +KEYWORD(130, 300, 130, 0, ISAMPLER1DARRAY); YY_BREAK case 91: YY_RULE_SETUP -#line 333 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(130, 300, 130, 0, USAMPLER1D); +#line 337 "./glsl/glsl_lexer.ll" +KEYWORD(130, 300, 130, 300, ISAMPLER2DARRAY); YY_BREAK case 92: YY_RULE_SETUP -#line 334 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(130, 300, 130, 300, USAMPLER2D); +#line 338 "./glsl/glsl_lexer.ll" +KEYWORD(130, 300, 130, 0, USAMPLER1D); YY_BREAK case 93: YY_RULE_SETUP -#line 335 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(130, 300, 130, 300, USAMPLER3D); +#line 339 "./glsl/glsl_lexer.ll" +KEYWORD(130, 300, 130, 300, USAMPLER2D); YY_BREAK case 94: YY_RULE_SETUP -#line 336 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(130, 300, 130, 300, USAMPLERCUBE); +#line 340 "./glsl/glsl_lexer.ll" +KEYWORD(130, 300, 130, 300, USAMPLER3D); YY_BREAK case 95: YY_RULE_SETUP -#line 337 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD(130, 300, 130, 0, USAMPLER1DARRAY); +#line 341 "./glsl/glsl_lexer.ll" +KEYWORD(130, 300, 130, 300, USAMPLERCUBE); YY_BREAK case 96: YY_RULE_SETUP -#line 338 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 342 "./glsl/glsl_lexer.ll" +KEYWORD(130, 300, 130, 0, USAMPLER1DARRAY); + YY_BREAK +case 97: +YY_RULE_SETUP +#line 343 "./glsl/glsl_lexer.ll" KEYWORD(130, 300, 130, 300, USAMPLER2DARRAY); YY_BREAK /* additional keywords in ARB_texture_multisample, included in GLSL 1.50 */ /* these are reserved but not defined in GLSL 3.00 */ /* [iu]sampler2DMS are defined in GLSL ES 3.10 */ -case 97: +case 98: YY_RULE_SETUP -#line 343 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 348 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(150, 300, 150, 310, yyextra->ARB_texture_multisample_enable, SAMPLER2DMS); YY_BREAK -case 98: +case 99: YY_RULE_SETUP -#line 344 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 349 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(150, 300, 150, 310, yyextra->ARB_texture_multisample_enable, ISAMPLER2DMS); YY_BREAK -case 99: +case 100: YY_RULE_SETUP -#line 345 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 350 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(150, 300, 150, 310, yyextra->ARB_texture_multisample_enable, USAMPLER2DMS); YY_BREAK -case 100: +case 101: YY_RULE_SETUP -#line 346 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 351 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(150, 300, 150, 320, yyextra->ARB_texture_multisample_enable || yyextra->OES_texture_storage_multisample_2d_array_enable, SAMPLER2DMSARRAY); YY_BREAK -case 101: +case 102: YY_RULE_SETUP -#line 347 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 352 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(150, 300, 150, 320, yyextra->ARB_texture_multisample_enable || yyextra->OES_texture_storage_multisample_2d_array_enable, ISAMPLER2DMSARRAY); YY_BREAK -case 102: +case 103: YY_RULE_SETUP -#line 348 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 353 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(150, 300, 150, 320, yyextra->ARB_texture_multisample_enable || yyextra->OES_texture_storage_multisample_2d_array_enable, USAMPLER2DMSARRAY); YY_BREAK /* keywords available with ARB_texture_cube_map_array_enable extension on desktop GLSL */ -case 103: -YY_RULE_SETUP -#line 351 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(400, 310, 400, 0, yyextra->ARB_texture_cube_map_array_enable, SAMPLERCUBEARRAY); - YY_BREAK case 104: YY_RULE_SETUP -#line 352 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(400, 310, 400, 0, yyextra->ARB_texture_cube_map_array_enable, ISAMPLERCUBEARRAY); +#line 356 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(400, 310, 400, 320, yyextra->ARB_texture_cube_map_array_enable || yyextra->OES_texture_cube_map_array_enable || yyextra->EXT_texture_cube_map_array_enable, SAMPLERCUBEARRAY); YY_BREAK case 105: YY_RULE_SETUP -#line 353 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(400, 310, 400, 0, yyextra->ARB_texture_cube_map_array_enable, USAMPLERCUBEARRAY); +#line 357 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(400, 310, 400, 320, yyextra->ARB_texture_cube_map_array_enable || yyextra->OES_texture_cube_map_array_enable || yyextra->EXT_texture_cube_map_array_enable, ISAMPLERCUBEARRAY); YY_BREAK case 106: YY_RULE_SETUP -#line 354 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(400, 310, 400, 0, yyextra->ARB_texture_cube_map_array_enable, SAMPLERCUBEARRAYSHADOW); +#line 358 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(400, 310, 400, 320, yyextra->ARB_texture_cube_map_array_enable || yyextra->OES_texture_cube_map_array_enable || yyextra->EXT_texture_cube_map_array_enable, USAMPLERCUBEARRAY); YY_BREAK case 107: YY_RULE_SETUP -#line 356 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 359 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(400, 310, 400, 320, yyextra->ARB_texture_cube_map_array_enable || yyextra->OES_texture_cube_map_array_enable || yyextra->EXT_texture_cube_map_array_enable, SAMPLERCUBEARRAYSHADOW); + YY_BREAK +case 108: +YY_RULE_SETUP +#line 361 "./glsl/glsl_lexer.ll" { if (yyextra->OES_EGL_image_external_enable) return SAMPLEREXTERNALOES; @@ -2218,245 +2291,245 @@ } YY_BREAK /* keywords available with ARB_gpu_shader5 */ -case 108: +case 109: YY_RULE_SETUP -#line 364 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 369 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(400, 310, 400, 320, yyextra->ARB_gpu_shader5_enable || yyextra->EXT_gpu_shader5_enable || yyextra->OES_gpu_shader5_enable, PRECISE); YY_BREAK /* keywords available with ARB_shader_image_load_store */ -case 109: -YY_RULE_SETUP -#line 367 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IMAGE1D); - YY_BREAK case 110: YY_RULE_SETUP -#line 368 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable, IMAGE2D); +#line 372 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IMAGE1D); YY_BREAK case 111: YY_RULE_SETUP -#line 369 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable, IMAGE3D); +#line 373 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable, IMAGE2D); YY_BREAK case 112: YY_RULE_SETUP -#line 370 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IMAGE2DRECT); +#line 374 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable, IMAGE3D); YY_BREAK case 113: YY_RULE_SETUP -#line 371 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable, IMAGECUBE); +#line 375 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IMAGE2DRECT); YY_BREAK case 114: YY_RULE_SETUP -#line 372 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 320, yyextra->ARB_shader_image_load_store_enable || yyextra->EXT_texture_buffer_enable || yyextra->OES_texture_buffer_enable, IMAGEBUFFER); +#line 376 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable, IMAGECUBE); YY_BREAK case 115: YY_RULE_SETUP -#line 373 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IMAGE1DARRAY); +#line 377 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 320, yyextra->ARB_shader_image_load_store_enable || yyextra->EXT_texture_buffer_enable || yyextra->OES_texture_buffer_enable, IMAGEBUFFER); YY_BREAK case 116: YY_RULE_SETUP -#line 374 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable, IMAGE2DARRAY); +#line 378 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IMAGE1DARRAY); YY_BREAK case 117: YY_RULE_SETUP -#line 375 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IMAGECUBEARRAY); +#line 379 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable, IMAGE2DARRAY); YY_BREAK case 118: YY_RULE_SETUP -#line 376 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IMAGE2DMS); +#line 380 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 320, yyextra->ARB_shader_image_load_store_enable || yyextra->OES_texture_cube_map_array_enable || yyextra->EXT_texture_cube_map_array_enable, IMAGECUBEARRAY); YY_BREAK case 119: YY_RULE_SETUP -#line 377 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IMAGE2DMSARRAY); +#line 381 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IMAGE2DMS); YY_BREAK case 120: YY_RULE_SETUP -#line 378 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IIMAGE1D); +#line 382 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IMAGE2DMSARRAY); YY_BREAK case 121: YY_RULE_SETUP -#line 379 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable, IIMAGE2D); +#line 383 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IIMAGE1D); YY_BREAK case 122: YY_RULE_SETUP -#line 380 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable, IIMAGE3D); +#line 384 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable, IIMAGE2D); YY_BREAK case 123: YY_RULE_SETUP -#line 381 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IIMAGE2DRECT); +#line 385 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable, IIMAGE3D); YY_BREAK case 124: YY_RULE_SETUP -#line 382 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable, IIMAGECUBE); +#line 386 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IIMAGE2DRECT); YY_BREAK case 125: YY_RULE_SETUP -#line 383 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 320, yyextra->ARB_shader_image_load_store_enable || yyextra->EXT_texture_buffer_enable || yyextra->OES_texture_buffer_enable, IIMAGEBUFFER); +#line 387 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable, IIMAGECUBE); YY_BREAK case 126: YY_RULE_SETUP -#line 384 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IIMAGE1DARRAY); +#line 388 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 320, yyextra->ARB_shader_image_load_store_enable || yyextra->EXT_texture_buffer_enable || yyextra->OES_texture_buffer_enable, IIMAGEBUFFER); YY_BREAK case 127: YY_RULE_SETUP -#line 385 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable, IIMAGE2DARRAY); +#line 389 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IIMAGE1DARRAY); YY_BREAK case 128: YY_RULE_SETUP -#line 386 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IIMAGECUBEARRAY); +#line 390 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable, IIMAGE2DARRAY); YY_BREAK case 129: YY_RULE_SETUP -#line 387 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IIMAGE2DMS); +#line 391 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 320, yyextra->ARB_shader_image_load_store_enable || yyextra->OES_texture_cube_map_array_enable || yyextra->EXT_texture_cube_map_array_enable, IIMAGECUBEARRAY); YY_BREAK case 130: YY_RULE_SETUP -#line 388 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IIMAGE2DMSARRAY); +#line 392 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IIMAGE2DMS); YY_BREAK case 131: YY_RULE_SETUP -#line 389 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, UIMAGE1D); +#line 393 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IIMAGE2DMSARRAY); YY_BREAK case 132: YY_RULE_SETUP -#line 390 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable, UIMAGE2D); +#line 394 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, UIMAGE1D); YY_BREAK case 133: YY_RULE_SETUP -#line 391 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable, UIMAGE3D); +#line 395 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable, UIMAGE2D); YY_BREAK case 134: YY_RULE_SETUP -#line 392 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, UIMAGE2DRECT); +#line 396 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable, UIMAGE3D); YY_BREAK case 135: YY_RULE_SETUP -#line 393 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable, UIMAGECUBE); +#line 397 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, UIMAGE2DRECT); YY_BREAK case 136: YY_RULE_SETUP -#line 394 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 320, yyextra->ARB_shader_image_load_store_enable || yyextra->EXT_texture_buffer_enable || yyextra->OES_texture_buffer_enable, UIMAGEBUFFER); +#line 398 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable, UIMAGECUBE); YY_BREAK case 137: YY_RULE_SETUP -#line 395 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, UIMAGE1DARRAY); +#line 399 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 320, yyextra->ARB_shader_image_load_store_enable || yyextra->EXT_texture_buffer_enable || yyextra->OES_texture_buffer_enable, UIMAGEBUFFER); YY_BREAK case 138: YY_RULE_SETUP -#line 396 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable, UIMAGE2DARRAY); +#line 400 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, UIMAGE1DARRAY); YY_BREAK case 139: YY_RULE_SETUP -#line 397 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, UIMAGECUBEARRAY); +#line 401 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable, UIMAGE2DARRAY); YY_BREAK case 140: YY_RULE_SETUP -#line 398 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, UIMAGE2DMS); +#line 402 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 320, yyextra->ARB_shader_image_load_store_enable || yyextra->OES_texture_cube_map_array_enable || yyextra->EXT_texture_cube_map_array_enable, UIMAGECUBEARRAY); YY_BREAK case 141: YY_RULE_SETUP -#line 399 "../../../src/compiler/glsl/glsl_lexer.ll" -KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, UIMAGE2DMSARRAY); +#line 403 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, UIMAGE2DMS); YY_BREAK case 142: YY_RULE_SETUP -#line 400 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 404 "./glsl/glsl_lexer.ll" +KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, UIMAGE2DMSARRAY); + YY_BREAK +case 143: +YY_RULE_SETUP +#line 405 "./glsl/glsl_lexer.ll" KEYWORD(130, 300, 0, 0, IMAGE1DSHADOW); YY_BREAK -case 143: +case 144: YY_RULE_SETUP -#line 401 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 406 "./glsl/glsl_lexer.ll" KEYWORD(130, 300, 0, 0, IMAGE2DSHADOW); YY_BREAK -case 144: +case 145: YY_RULE_SETUP -#line 402 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 407 "./glsl/glsl_lexer.ll" KEYWORD(130, 300, 0, 0, IMAGE1DARRAYSHADOW); YY_BREAK -case 145: +case 146: YY_RULE_SETUP -#line 403 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 408 "./glsl/glsl_lexer.ll" KEYWORD(130, 300, 0, 0, IMAGE2DARRAYSHADOW); YY_BREAK -case 146: +case 147: YY_RULE_SETUP -#line 405 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 410 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(420, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable || yyextra->ARB_shader_storage_buffer_object_enable, COHERENT); YY_BREAK -case 147: +case 148: YY_RULE_SETUP -#line 406 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 411 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(110, 100, 420, 310, yyextra->ARB_shader_image_load_store_enable || yyextra->ARB_shader_storage_buffer_object_enable, VOLATILE); YY_BREAK -case 148: +case 149: YY_RULE_SETUP -#line 407 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 412 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(420, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable || yyextra->ARB_shader_storage_buffer_object_enable, RESTRICT); YY_BREAK -case 149: +case 150: YY_RULE_SETUP -#line 408 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 413 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(420, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable || yyextra->ARB_shader_storage_buffer_object_enable, READONLY); YY_BREAK -case 150: +case 151: YY_RULE_SETUP -#line 409 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 414 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(420, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable || yyextra->ARB_shader_storage_buffer_object_enable, WRITEONLY); YY_BREAK -case 151: +case 152: YY_RULE_SETUP -#line 411 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 416 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(420, 300, 420, 310, yyextra->ARB_shader_atomic_counters_enable, ATOMIC_UINT); YY_BREAK -case 152: +case 153: YY_RULE_SETUP -#line 413 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 418 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(430, 310, 430, 310, yyextra->ARB_compute_shader_enable, SHARED); YY_BREAK -case 153: +case 154: YY_RULE_SETUP -#line 415 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 420 "./glsl/glsl_lexer.ll" return STRUCT; YY_BREAK -case 154: +case 155: YY_RULE_SETUP -#line 416 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 421 "./glsl/glsl_lexer.ll" return VOID_TOK; YY_BREAK -case 155: +case 156: YY_RULE_SETUP -#line 418 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 423 "./glsl/glsl_lexer.ll" { if ((yyextra->is_version(140, 300)) || yyextra->AMD_conservative_depth_enable @@ -2471,147 +2544,147 @@ || yyextra->ARB_tessellation_shader_enable) { return LAYOUT_TOK; } else { - void *mem_ctx = yyextra; - yylval->identifier = ralloc_strdup(mem_ctx, yytext); + void *mem_ctx = yyextra->linalloc; + yylval->identifier = linear_strdup(mem_ctx, yytext); return classify_identifier(yyextra, yytext); } } YY_BREAK -case 156: +case 157: YY_RULE_SETUP -#line 438 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 443 "./glsl/glsl_lexer.ll" return INC_OP; YY_BREAK -case 157: +case 158: YY_RULE_SETUP -#line 439 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 444 "./glsl/glsl_lexer.ll" return DEC_OP; YY_BREAK -case 158: +case 159: YY_RULE_SETUP -#line 440 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 445 "./glsl/glsl_lexer.ll" return LE_OP; YY_BREAK -case 159: +case 160: YY_RULE_SETUP -#line 441 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 446 "./glsl/glsl_lexer.ll" return GE_OP; YY_BREAK -case 160: +case 161: YY_RULE_SETUP -#line 442 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 447 "./glsl/glsl_lexer.ll" return EQ_OP; YY_BREAK -case 161: +case 162: YY_RULE_SETUP -#line 443 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 448 "./glsl/glsl_lexer.ll" return NE_OP; YY_BREAK -case 162: +case 163: YY_RULE_SETUP -#line 444 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 449 "./glsl/glsl_lexer.ll" return AND_OP; YY_BREAK -case 163: +case 164: YY_RULE_SETUP -#line 445 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 450 "./glsl/glsl_lexer.ll" return OR_OP; YY_BREAK -case 164: +case 165: YY_RULE_SETUP -#line 446 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 451 "./glsl/glsl_lexer.ll" return XOR_OP; YY_BREAK -case 165: +case 166: YY_RULE_SETUP -#line 447 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 452 "./glsl/glsl_lexer.ll" return LEFT_OP; YY_BREAK -case 166: +case 167: YY_RULE_SETUP -#line 448 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 453 "./glsl/glsl_lexer.ll" return RIGHT_OP; YY_BREAK -case 167: +case 168: YY_RULE_SETUP -#line 450 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 455 "./glsl/glsl_lexer.ll" return MUL_ASSIGN; YY_BREAK -case 168: +case 169: YY_RULE_SETUP -#line 451 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 456 "./glsl/glsl_lexer.ll" return DIV_ASSIGN; YY_BREAK -case 169: +case 170: YY_RULE_SETUP -#line 452 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 457 "./glsl/glsl_lexer.ll" return ADD_ASSIGN; YY_BREAK -case 170: +case 171: YY_RULE_SETUP -#line 453 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 458 "./glsl/glsl_lexer.ll" return MOD_ASSIGN; YY_BREAK -case 171: +case 172: YY_RULE_SETUP -#line 454 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 459 "./glsl/glsl_lexer.ll" return LEFT_ASSIGN; YY_BREAK -case 172: +case 173: YY_RULE_SETUP -#line 455 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 460 "./glsl/glsl_lexer.ll" return RIGHT_ASSIGN; YY_BREAK -case 173: +case 174: YY_RULE_SETUP -#line 456 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 461 "./glsl/glsl_lexer.ll" return AND_ASSIGN; YY_BREAK -case 174: +case 175: YY_RULE_SETUP -#line 457 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 462 "./glsl/glsl_lexer.ll" return XOR_ASSIGN; YY_BREAK -case 175: +case 176: YY_RULE_SETUP -#line 458 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 463 "./glsl/glsl_lexer.ll" return OR_ASSIGN; YY_BREAK -case 176: +case 177: YY_RULE_SETUP -#line 459 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 464 "./glsl/glsl_lexer.ll" return SUB_ASSIGN; YY_BREAK -case 177: +case 178: YY_RULE_SETUP -#line 461 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 466 "./glsl/glsl_lexer.ll" { return LITERAL_INTEGER(10); } YY_BREAK -case 178: +case 179: YY_RULE_SETUP -#line 464 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 469 "./glsl/glsl_lexer.ll" { return LITERAL_INTEGER(16); } YY_BREAK -case 179: +case 180: YY_RULE_SETUP -#line 467 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 472 "./glsl/glsl_lexer.ll" { return LITERAL_INTEGER(8); } YY_BREAK -case 180: -#line 472 "../../../src/compiler/glsl/glsl_lexer.ll" case 181: -#line 473 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 477 "./glsl/glsl_lexer.ll" case 182: -#line 474 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 478 "./glsl/glsl_lexer.ll" case 183: +#line 479 "./glsl/glsl_lexer.ll" +case 184: YY_RULE_SETUP -#line 474 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 479 "./glsl/glsl_lexer.ll" { struct _mesa_glsl_parse_state *state = yyextra; char suffix = yytext[strlen(yytext) - 1]; @@ -2624,15 +2697,15 @@ return FLOATCONSTANT; } YY_BREAK -case 184: -#line 487 "../../../src/compiler/glsl/glsl_lexer.ll" case 185: -#line 488 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 492 "./glsl/glsl_lexer.ll" case 186: -#line 489 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 493 "./glsl/glsl_lexer.ll" case 187: +#line 494 "./glsl/glsl_lexer.ll" +case 188: YY_RULE_SETUP -#line 489 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 494 "./glsl/glsl_lexer.ll" { if (!yyextra->is_version(400, 0) && !yyextra->ARB_gpu_shader_fp64_enable) @@ -2641,426 +2714,426 @@ return DOUBLECONSTANT; } YY_BREAK -case 188: +case 189: YY_RULE_SETUP -#line 497 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 502 "./glsl/glsl_lexer.ll" { yylval->n = 1; return BOOLCONSTANT; } YY_BREAK -case 189: +case 190: YY_RULE_SETUP -#line 501 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 506 "./glsl/glsl_lexer.ll" { yylval->n = 0; return BOOLCONSTANT; } YY_BREAK /* Reserved words in GLSL 1.10. */ -case 190: +case 191: YY_RULE_SETUP -#line 508 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 513 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, ASM); YY_BREAK -case 191: +case 192: YY_RULE_SETUP -#line 509 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 514 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, CLASS); YY_BREAK -case 192: +case 193: YY_RULE_SETUP -#line 510 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 515 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, UNION); YY_BREAK -case 193: +case 194: YY_RULE_SETUP -#line 511 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 516 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, ENUM); YY_BREAK -case 194: +case 195: YY_RULE_SETUP -#line 512 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 517 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, TYPEDEF); YY_BREAK -case 195: +case 196: YY_RULE_SETUP -#line 513 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 518 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, TEMPLATE); YY_BREAK -case 196: +case 197: YY_RULE_SETUP -#line 514 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 519 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, THIS); YY_BREAK -case 197: +case 198: YY_RULE_SETUP -#line 515 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 520 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(110, 100, 140, 300, yyextra->ARB_uniform_buffer_object_enable, PACKED_TOK); YY_BREAK -case 198: +case 199: YY_RULE_SETUP -#line 516 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 521 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, GOTO); YY_BREAK -case 199: +case 200: YY_RULE_SETUP -#line 517 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 522 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 130, 300, SWITCH); YY_BREAK -case 200: +case 201: YY_RULE_SETUP -#line 518 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 523 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 130, 300, DEFAULT); YY_BREAK -case 201: +case 202: YY_RULE_SETUP -#line 519 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 524 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, INLINE_TOK); YY_BREAK -case 202: +case 203: YY_RULE_SETUP -#line 520 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 525 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, NOINLINE); YY_BREAK -case 203: +case 204: YY_RULE_SETUP -#line 521 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 526 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, PUBLIC_TOK); YY_BREAK -case 204: +case 205: YY_RULE_SETUP -#line 522 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 527 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, STATIC); YY_BREAK -case 205: +case 206: YY_RULE_SETUP -#line 523 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 528 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, EXTERN); YY_BREAK -case 206: +case 207: YY_RULE_SETUP -#line 524 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 529 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, EXTERNAL); YY_BREAK -case 207: +case 208: YY_RULE_SETUP -#line 525 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 530 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, INTERFACE); YY_BREAK -case 208: +case 209: YY_RULE_SETUP -#line 526 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 531 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, LONG_TOK); YY_BREAK -case 209: +case 210: YY_RULE_SETUP -#line 527 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 532 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, SHORT_TOK); YY_BREAK -case 210: +case 211: YY_RULE_SETUP -#line 528 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 533 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(110, 100, 400, 0, yyextra->ARB_gpu_shader_fp64_enable, DOUBLE_TOK); YY_BREAK -case 211: +case 212: YY_RULE_SETUP -#line 529 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 534 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, HALF); YY_BREAK -case 212: +case 213: YY_RULE_SETUP -#line 530 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 535 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, FIXED_TOK); YY_BREAK -case 213: +case 214: YY_RULE_SETUP -#line 531 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 536 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, UNSIGNED); YY_BREAK -case 214: +case 215: YY_RULE_SETUP -#line 532 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 537 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, INPUT_TOK); YY_BREAK -case 215: +case 216: YY_RULE_SETUP -#line 533 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 538 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, OUTPUT); YY_BREAK -case 216: +case 217: YY_RULE_SETUP -#line 534 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 539 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, HVEC2); YY_BREAK -case 217: +case 218: YY_RULE_SETUP -#line 535 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 540 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, HVEC3); YY_BREAK -case 218: +case 219: YY_RULE_SETUP -#line 536 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 541 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, HVEC4); YY_BREAK -case 219: +case 220: YY_RULE_SETUP -#line 537 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 542 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(110, 100, 400, 0, yyextra->ARB_gpu_shader_fp64_enable, DVEC2); YY_BREAK -case 220: +case 221: YY_RULE_SETUP -#line 538 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 543 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(110, 100, 400, 0, yyextra->ARB_gpu_shader_fp64_enable, DVEC3); YY_BREAK -case 221: +case 222: YY_RULE_SETUP -#line 539 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 544 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(110, 100, 400, 0, yyextra->ARB_gpu_shader_fp64_enable, DVEC4); YY_BREAK -case 222: +case 223: YY_RULE_SETUP -#line 540 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 545 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(110, 100, 400, 0, yyextra->ARB_gpu_shader_fp64_enable, DMAT2X2); YY_BREAK -case 223: +case 224: YY_RULE_SETUP -#line 541 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 546 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(110, 100, 400, 0, yyextra->ARB_gpu_shader_fp64_enable, DMAT3X3); YY_BREAK -case 224: +case 225: YY_RULE_SETUP -#line 542 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 547 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(110, 100, 400, 0, yyextra->ARB_gpu_shader_fp64_enable, DMAT4X4); YY_BREAK -case 225: +case 226: YY_RULE_SETUP -#line 543 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 548 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(110, 100, 400, 0, yyextra->ARB_gpu_shader_fp64_enable, DMAT2X2); YY_BREAK -case 226: +case 227: YY_RULE_SETUP -#line 544 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 549 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(110, 100, 400, 0, yyextra->ARB_gpu_shader_fp64_enable, DMAT2X3); YY_BREAK -case 227: +case 228: YY_RULE_SETUP -#line 545 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 550 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(110, 100, 400, 0, yyextra->ARB_gpu_shader_fp64_enable, DMAT2X4); YY_BREAK -case 228: +case 229: YY_RULE_SETUP -#line 546 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 551 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(110, 100, 400, 0, yyextra->ARB_gpu_shader_fp64_enable, DMAT3X2); YY_BREAK -case 229: +case 230: YY_RULE_SETUP -#line 547 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 552 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(110, 100, 400, 0, yyextra->ARB_gpu_shader_fp64_enable, DMAT3X3); YY_BREAK -case 230: +case 231: YY_RULE_SETUP -#line 548 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 553 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(110, 100, 400, 0, yyextra->ARB_gpu_shader_fp64_enable, DMAT3X4); YY_BREAK -case 231: +case 232: YY_RULE_SETUP -#line 549 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 554 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(110, 100, 400, 0, yyextra->ARB_gpu_shader_fp64_enable, DMAT4X2); YY_BREAK -case 232: +case 233: YY_RULE_SETUP -#line 550 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 555 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(110, 100, 400, 0, yyextra->ARB_gpu_shader_fp64_enable, DMAT4X3); YY_BREAK -case 233: +case 234: YY_RULE_SETUP -#line 551 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 556 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(110, 100, 400, 0, yyextra->ARB_gpu_shader_fp64_enable, DMAT4X4); YY_BREAK -case 234: +case 235: YY_RULE_SETUP -#line 552 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 557 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, FVEC2); YY_BREAK -case 235: +case 236: YY_RULE_SETUP -#line 553 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 558 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, FVEC3); YY_BREAK -case 236: +case 237: YY_RULE_SETUP -#line 554 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 559 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, FVEC4); YY_BREAK -case 237: +case 238: YY_RULE_SETUP -#line 555 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 560 "./glsl/glsl_lexer.ll" DEPRECATED_ES_KEYWORD(SAMPLER2DRECT); YY_BREAK -case 238: +case 239: YY_RULE_SETUP -#line 556 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 561 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, SAMPLER3DRECT); YY_BREAK -case 239: +case 240: YY_RULE_SETUP -#line 557 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 562 "./glsl/glsl_lexer.ll" DEPRECATED_ES_KEYWORD(SAMPLER2DRECTSHADOW); YY_BREAK -case 240: +case 241: YY_RULE_SETUP -#line 558 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 563 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, SIZEOF); YY_BREAK -case 241: +case 242: YY_RULE_SETUP -#line 559 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 564 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, CAST); YY_BREAK -case 242: +case 243: YY_RULE_SETUP -#line 560 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 565 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, NAMESPACE); YY_BREAK -case 243: +case 244: YY_RULE_SETUP -#line 561 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 566 "./glsl/glsl_lexer.ll" KEYWORD(110, 100, 0, 0, USING); YY_BREAK /* Additional reserved words in GLSL 1.20. */ -case 244: +case 245: YY_RULE_SETUP -#line 564 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 569 "./glsl/glsl_lexer.ll" KEYWORD(120, 100, 130, 100, LOWP); YY_BREAK -case 245: +case 246: YY_RULE_SETUP -#line 565 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 570 "./glsl/glsl_lexer.ll" KEYWORD(120, 100, 130, 100, MEDIUMP); YY_BREAK -case 246: +case 247: YY_RULE_SETUP -#line 566 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 571 "./glsl/glsl_lexer.ll" KEYWORD(120, 100, 130, 100, HIGHP); YY_BREAK -case 247: +case 248: YY_RULE_SETUP -#line 567 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 572 "./glsl/glsl_lexer.ll" KEYWORD(120, 100, 130, 100, PRECISION); YY_BREAK /* Additional reserved words in GLSL 1.30. */ -case 248: +case 249: YY_RULE_SETUP -#line 570 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 575 "./glsl/glsl_lexer.ll" KEYWORD(130, 300, 130, 300, CASE); YY_BREAK -case 249: +case 250: YY_RULE_SETUP -#line 571 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 576 "./glsl/glsl_lexer.ll" KEYWORD(130, 300, 0, 0, COMMON); YY_BREAK -case 250: +case 251: YY_RULE_SETUP -#line 572 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 577 "./glsl/glsl_lexer.ll" KEYWORD(130, 300, 0, 0, PARTITION); YY_BREAK -case 251: +case 252: YY_RULE_SETUP -#line 573 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 578 "./glsl/glsl_lexer.ll" KEYWORD(130, 300, 0, 0, ACTIVE); YY_BREAK -case 252: +case 253: YY_RULE_SETUP -#line 574 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 579 "./glsl/glsl_lexer.ll" KEYWORD(130, 100, 0, 0, SUPERP); YY_BREAK -case 253: +case 254: YY_RULE_SETUP -#line 575 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 580 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(130, 300, 140, 320, yyextra->EXT_texture_buffer_enable || yyextra->OES_texture_buffer_enable, SAMPLERBUFFER); YY_BREAK -case 254: +case 255: YY_RULE_SETUP -#line 576 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 581 "./glsl/glsl_lexer.ll" KEYWORD(130, 300, 0, 0, FILTER); YY_BREAK -case 255: +case 256: YY_RULE_SETUP -#line 577 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 582 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(130, 0, 140, 0, yyextra->ARB_uniform_buffer_object_enable && !yyextra->es_shader, ROW_MAJOR); YY_BREAK /* Additional reserved words in GLSL 1.40 */ -case 256: +case 257: YY_RULE_SETUP -#line 580 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 585 "./glsl/glsl_lexer.ll" KEYWORD(140, 300, 140, 0, ISAMPLER2DRECT); YY_BREAK -case 257: +case 258: YY_RULE_SETUP -#line 581 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 586 "./glsl/glsl_lexer.ll" KEYWORD(140, 300, 140, 0, USAMPLER2DRECT); YY_BREAK -case 258: +case 259: YY_RULE_SETUP -#line 582 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 587 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(140, 300, 140, 320, yyextra->EXT_texture_buffer_enable || yyextra->OES_texture_buffer_enable, ISAMPLERBUFFER); YY_BREAK -case 259: +case 260: YY_RULE_SETUP -#line 583 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 588 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(140, 300, 140, 320, yyextra->EXT_texture_buffer_enable || yyextra->OES_texture_buffer_enable, USAMPLERBUFFER); YY_BREAK /* Additional reserved words in GLSL ES 3.00 */ -case 260: +case 261: YY_RULE_SETUP -#line 586 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 591 "./glsl/glsl_lexer.ll" KEYWORD(420, 300, 0, 0, RESOURCE); YY_BREAK -case 261: +case 262: YY_RULE_SETUP -#line 587 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 592 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(400, 300, 400, 320, yyextra->ARB_gpu_shader5_enable || yyextra->OES_shader_multisample_interpolation_enable, SAMPLE); YY_BREAK -case 262: +case 263: YY_RULE_SETUP -#line 588 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 593 "./glsl/glsl_lexer.ll" KEYWORD_WITH_ALT(400, 300, 400, 0, yyextra->ARB_shader_subroutine_enable, SUBROUTINE); YY_BREAK -case 263: +case 264: YY_RULE_SETUP -#line 591 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 596 "./glsl/glsl_lexer.ll" { struct _mesa_glsl_parse_state *state = yyextra; - void *ctx = state; + void *ctx = state->linalloc; if (state->es_shader && strlen(yytext) > 1024) { _mesa_glsl_error(yylloc, state, "Identifier `%s' exceeds 1024 characters", yytext); } else { - yylval->identifier = ralloc_strdup(ctx, yytext); + yylval->identifier = linear_strdup(ctx, yytext); } return classify_identifier(state, yytext); } YY_BREAK -case 264: +case 265: YY_RULE_SETUP -#line 604 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 609 "./glsl/glsl_lexer.ll" { struct _mesa_glsl_parse_state *state = yyextra; state->is_field = true; return DOT_TOK; } YY_BREAK -case 265: +case 266: YY_RULE_SETUP -#line 608 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 613 "./glsl/glsl_lexer.ll" { return yytext[0]; } YY_BREAK -case 266: +case 267: YY_RULE_SETUP -#line 610 "../../../src/compiler/glsl/glsl_lexer.ll" +#line 615 "./glsl/glsl_lexer.ll" YY_FATAL_ERROR( "flex scanner jammed" ); YY_BREAK -#line 3064 "glsl/glsl_lexer.cpp" +#line 3136 "glsl/glsl_lexer.cpp" case YY_STATE_EOF(INITIAL): case YY_STATE_EOF(PP): case YY_STATE_EOF(PRAGMA): @@ -3209,7 +3282,7 @@ struct yyguts_t * yyg = (struct yyguts_t*)yyscanner; char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf; char *source = yyg->yytext_ptr; - yy_size_t number_to_move, i; + int number_to_move, i; int ret_val; if ( yyg->yy_c_buf_p > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[yyg->yy_n_chars + 1] ) @@ -3238,7 +3311,7 @@ /* Try to read more data. */ /* First move last chars to start of buffer. */ - number_to_move = (yy_size_t) (yyg->yy_c_buf_p - yyg->yytext_ptr) - 1; + number_to_move = (int) (yyg->yy_c_buf_p - yyg->yytext_ptr - 1); for ( i = 0; i < number_to_move; ++i ) *(dest++) = *(source++); @@ -3274,7 +3347,7 @@ b->yy_ch_buf = (char *) /* Include room in for 2 EOB chars. */ - _mesa_glsl_lexer_realloc((void *) b->yy_ch_buf,b->yy_buf_size + 2 ,yyscanner ); + _mesa_glsl_lexer_realloc((void *) b->yy_ch_buf,(yy_size_t) (b->yy_buf_size + 2) ,yyscanner ); } else /* Can't grow it, we don't own it. */ @@ -3320,10 +3393,10 @@ else ret_val = EOB_ACT_CONTINUE_SCAN; - if ((int) (yyg->yy_n_chars + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) { + if ((yyg->yy_n_chars + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) { /* Extend the array by 50%, plus the number we really need. */ int new_size = yyg->yy_n_chars + number_to_move + (yyg->yy_n_chars >> 1); - YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) _mesa_glsl_lexer_realloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size ,yyscanner ); + YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) _mesa_glsl_lexer_realloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,(yy_size_t) new_size ,yyscanner ); if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" ); } @@ -3359,10 +3432,10 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 1047 ) - yy_c = yy_meta[(unsigned int) yy_c]; + if ( yy_current_state >= 1048 ) + yy_c = yy_meta[yy_c]; } - yy_current_state = yy_nxt[yy_base[yy_current_state] + (flex_int16_t) yy_c]; + yy_current_state = yy_nxt[yy_base[yy_current_state] + yy_c]; } return yy_current_state; @@ -3388,11 +3461,11 @@ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) { yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 1047 ) - yy_c = yy_meta[(unsigned int) yy_c]; + if ( yy_current_state >= 1048 ) + yy_c = yy_meta[yy_c]; } - yy_current_state = yy_nxt[yy_base[yy_current_state] + (flex_int16_t) yy_c]; - yy_is_jam = (yy_current_state == 1046); + yy_current_state = yy_nxt[yy_base[yy_current_state] + yy_c]; + yy_is_jam = (yy_current_state == 1047); (void)yyg; return yy_is_jam ? 0 : yy_current_state; @@ -3427,7 +3500,7 @@ else { /* need more input */ - int offset = yyg->yy_c_buf_p - yyg->yytext_ptr; + int offset = (int) (yyg->yy_c_buf_p - yyg->yytext_ptr); ++yyg->yy_c_buf_p; switch ( yy_get_next_buffer( yyscanner ) ) @@ -3557,12 +3630,12 @@ if ( ! b ) YY_FATAL_ERROR( "out of dynamic memory in _mesa_glsl_lexer__create_buffer()" ); - b->yy_buf_size = (yy_size_t)size; + b->yy_buf_size = size; /* yy_ch_buf has to be 2 characters longer than the size given because * we need to put in 2 end-of-buffer characters. */ - b->yy_ch_buf = (char *) _mesa_glsl_lexer_alloc(b->yy_buf_size + 2 ,yyscanner ); + b->yy_ch_buf = (char *) _mesa_glsl_lexer_alloc((yy_size_t) (b->yy_buf_size + 2) ,yyscanner ); if ( ! b->yy_ch_buf ) YY_FATAL_ERROR( "out of dynamic memory in _mesa_glsl_lexer__create_buffer()" ); @@ -3709,7 +3782,7 @@ */ static void _mesa_glsl_lexer_ensure_buffer_stack (yyscan_t yyscanner) { - int num_to_alloc; + yy_size_t num_to_alloc; struct yyguts_t * yyg = (struct yyguts_t*)yyscanner; if (!yyg->yy_buffer_stack) { @@ -3724,9 +3797,9 @@ , yyscanner); if ( ! yyg->yy_buffer_stack ) YY_FATAL_ERROR( "out of dynamic memory in _mesa_glsl_lexer_ensure_buffer_stack()" ); - + memset(yyg->yy_buffer_stack, 0, num_to_alloc * sizeof(struct yy_buffer_state*)); - + yyg->yy_buffer_stack_max = num_to_alloc; yyg->yy_buffer_stack_top = 0; return; @@ -3755,7 +3828,7 @@ * @param base the character buffer * @param size the size in bytes of the character buffer * @param yyscanner The scanner object. - * @return the newly allocated buffer state object. + * @return the newly allocated buffer state object. */ YY_BUFFER_STATE _mesa_glsl_lexer__scan_buffer (char * base, yy_size_t size , yyscan_t yyscanner) { @@ -3771,7 +3844,7 @@ if ( ! b ) YY_FATAL_ERROR( "out of dynamic memory in _mesa_glsl_lexer__scan_buffer()" ); - b->yy_buf_size = size - 2; /* "- 2" to take care of EOB's */ + b->yy_buf_size = (int) (size - 2); /* "- 2" to take care of EOB's */ b->yy_buf_pos = b->yy_ch_buf = base; b->yy_is_our_buffer = 0; b->yy_input_file = NULL; @@ -3794,7 +3867,7 @@ * @note If you want to scan bytes that may contain NUL values, then use * _mesa_glsl_lexer__scan_bytes() instead. */ -YY_BUFFER_STATE _mesa_glsl_lexer__scan_string (yyconst char * yystr , yyscan_t yyscanner) +YY_BUFFER_STATE _mesa_glsl_lexer__scan_string (const char * yystr , yyscan_t yyscanner) { return _mesa_glsl_lexer__scan_bytes(yystr,(int) strlen(yystr) ,yyscanner); @@ -3807,15 +3880,15 @@ * @param yyscanner The scanner object. * @return the newly allocated buffer state object. */ -YY_BUFFER_STATE _mesa_glsl_lexer__scan_bytes (yyconst char * yybytes, int _yybytes_len , yyscan_t yyscanner) +YY_BUFFER_STATE _mesa_glsl_lexer__scan_bytes (const char * yybytes, int _yybytes_len , yyscan_t yyscanner) { YY_BUFFER_STATE b; char *buf; yy_size_t n; - yy_size_t i; + int i; /* Get memory for full buffer, including space for trailing EOB's. */ - n = (yy_size_t) _yybytes_len + 2; + n = (yy_size_t) (_yybytes_len + 2); buf = (char *) _mesa_glsl_lexer_alloc(n ,yyscanner ); if ( ! buf ) YY_FATAL_ERROR( "out of dynamic memory in _mesa_glsl_lexer__scan_bytes()" ); @@ -3841,7 +3914,7 @@ #define YY_EXIT_FAILURE 2 #endif -static void yynoreturn yy_fatal_error (yyconst char* msg , yyscan_t yyscanner) +static void yynoreturn yy_fatal_error (const char* msg , yyscan_t yyscanner) { struct yyguts_t * yyg = (struct yyguts_t*)yyscanner; (void)yyg; @@ -3883,7 +3956,7 @@ int _mesa_glsl_lexer_get_lineno (yyscan_t yyscanner) { struct yyguts_t * yyg = (struct yyguts_t*)yyscanner; - + if (! YY_CURRENT_BUFFER) return 0; @@ -3896,7 +3969,7 @@ int _mesa_glsl_lexer_get_column (yyscan_t yyscanner) { struct yyguts_t * yyg = (struct yyguts_t*)yyscanner; - + if (! YY_CURRENT_BUFFER) return 0; @@ -4042,9 +4115,7 @@ * the ONLY reentrant function that doesn't take the scanner as the last argument. * That's why we explicitly handle the declaration, instead of using our macros. */ - int _mesa_glsl_lexer_lex_init(yyscan_t* ptr_yy_globals) - { if (ptr_yy_globals == NULL){ errno = EINVAL; @@ -4071,9 +4142,7 @@ * The user defined value in the first argument will be available to _mesa_glsl_lexer_alloc in * the yyextra field. */ - int _mesa_glsl_lexer_lex_init_extra(YY_EXTRA_TYPE yy_user_defined,yyscan_t* ptr_yy_globals ) - { struct yyguts_t dummy_yyguts; @@ -4083,20 +4152,20 @@ errno = EINVAL; return 1; } - + *ptr_yy_globals = (yyscan_t) _mesa_glsl_lexer_alloc ( sizeof( struct yyguts_t ), &dummy_yyguts ); - + if (*ptr_yy_globals == NULL){ errno = ENOMEM; return 1; } - + /* By setting to 0xAA, we expose bugs in yy_init_globals. Leave at 0x00 for releases. */ memset(*ptr_yy_globals,0x00,sizeof(struct yyguts_t)); - + _mesa_glsl_lexer_set_extra (yy_user_defined, *ptr_yy_globals); - + return yy_init_globals ( *ptr_yy_globals ); } @@ -4168,7 +4237,7 @@ */ #ifndef yytext_ptr -static void yy_flex_strncpy (char* s1, yyconst char * s2, int n , yyscan_t yyscanner) +static void yy_flex_strncpy (char* s1, const char * s2, int n , yyscan_t yyscanner) { struct yyguts_t * yyg = (struct yyguts_t*)yyscanner; (void)yyg; @@ -4180,7 +4249,7 @@ #endif #ifdef YY_NEED_STRLEN -static int yy_flex_strlen (yyconst char * s , yyscan_t yyscanner) +static int yy_flex_strlen (const char * s , yyscan_t yyscanner) { int n; for ( n = 0; s[n]; ++n ) @@ -4221,8 +4290,7 @@ #define YYTABLES_NAME "yytables" -#line 610 "../../../src/compiler/glsl/glsl_lexer.ll" - +#line 615 "./glsl/glsl_lexer.ll" int @@ -4243,13 +4311,13 @@ void _mesa_glsl_lexer_ctor(struct _mesa_glsl_parse_state *state, const char *string) { - _mesa_glsl_lexer_lex_init_extra(state,& state->scanner); - _mesa_glsl_lexer__scan_string(string,state->scanner); + yylex_init_extra(state, & state->scanner); + yy_scan_string(string, state->scanner); } void _mesa_glsl_lexer_dtor(struct _mesa_glsl_parse_state *state) { - _mesa_glsl_lexer_lex_destroy(state->scanner); + yylex_destroy(state->scanner); } diff -Nru mesa-12.0.6/src/compiler/glsl/glsl_lexer.ll mesa-17.0.7/src/compiler/glsl/glsl_lexer.ll --- mesa-12.0.6/src/compiler/glsl/glsl_lexer.ll 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/glsl_lexer.ll 2017-06-01 10:37:10.000000000 +0000 @@ -80,8 +80,8 @@ "illegal use of reserved word `%s'", yytext); \ return ERROR_TOK; \ } else { \ - void *mem_ctx = yyextra; \ - yylval->identifier = ralloc_strdup(mem_ctx, yytext); \ + void *mem_ctx = yyextra->linalloc; \ + yylval->identifier = linear_strdup(mem_ctx, yytext); \ return classify_identifier(yyextra, yytext); \ } \ } while (0) @@ -245,14 +245,18 @@ [ \t\r]* { } : return COLON; [_a-zA-Z][_a-zA-Z0-9]* { - void *mem_ctx = yyextra; - yylval->identifier = ralloc_strdup(mem_ctx, yytext); + void *mem_ctx = yyextra->linalloc; + yylval->identifier = linear_strdup(mem_ctx, yytext); return IDENTIFIER; } [1-9][0-9]* { yylval->n = strtol(yytext, NULL, 10); return INTCONSTANT; } +0 { + yylval->n = 0; + return INTCONSTANT; + } \n { BEGIN 0; yylineno++; yycolumn = 0; return EOL; } . { return yytext[0]; } @@ -311,7 +315,7 @@ flat KEYWORD(130, 100, 130, 300, FLAT); smooth KEYWORD(130, 300, 130, 300, SMOOTH); noperspective KEYWORD(130, 300, 130, 0, NOPERSPECTIVE); -patch KEYWORD_WITH_ALT(0, 300, 400, 0, yyextra->ARB_tessellation_shader_enable, PATCH); +patch KEYWORD_WITH_ALT(0, 300, 400, 320, yyextra->has_tessellation_shader(), PATCH); sampler1D DEPRECATED_ES_KEYWORD(SAMPLER1D); sampler2D return SAMPLER2D; @@ -348,10 +352,10 @@ usampler2DMSArray KEYWORD_WITH_ALT(150, 300, 150, 320, yyextra->ARB_texture_multisample_enable || yyextra->OES_texture_storage_multisample_2d_array_enable, USAMPLER2DMSARRAY); /* keywords available with ARB_texture_cube_map_array_enable extension on desktop GLSL */ -samplerCubeArray KEYWORD_WITH_ALT(400, 310, 400, 0, yyextra->ARB_texture_cube_map_array_enable, SAMPLERCUBEARRAY); -isamplerCubeArray KEYWORD_WITH_ALT(400, 310, 400, 0, yyextra->ARB_texture_cube_map_array_enable, ISAMPLERCUBEARRAY); -usamplerCubeArray KEYWORD_WITH_ALT(400, 310, 400, 0, yyextra->ARB_texture_cube_map_array_enable, USAMPLERCUBEARRAY); -samplerCubeArrayShadow KEYWORD_WITH_ALT(400, 310, 400, 0, yyextra->ARB_texture_cube_map_array_enable, SAMPLERCUBEARRAYSHADOW); +samplerCubeArray KEYWORD_WITH_ALT(400, 310, 400, 320, yyextra->ARB_texture_cube_map_array_enable || yyextra->OES_texture_cube_map_array_enable || yyextra->EXT_texture_cube_map_array_enable, SAMPLERCUBEARRAY); +isamplerCubeArray KEYWORD_WITH_ALT(400, 310, 400, 320, yyextra->ARB_texture_cube_map_array_enable || yyextra->OES_texture_cube_map_array_enable || yyextra->EXT_texture_cube_map_array_enable, ISAMPLERCUBEARRAY); +usamplerCubeArray KEYWORD_WITH_ALT(400, 310, 400, 320, yyextra->ARB_texture_cube_map_array_enable || yyextra->OES_texture_cube_map_array_enable || yyextra->EXT_texture_cube_map_array_enable, USAMPLERCUBEARRAY); +samplerCubeArrayShadow KEYWORD_WITH_ALT(400, 310, 400, 320, yyextra->ARB_texture_cube_map_array_enable || yyextra->OES_texture_cube_map_array_enable || yyextra->EXT_texture_cube_map_array_enable, SAMPLERCUBEARRAYSHADOW); samplerExternalOES { if (yyextra->OES_EGL_image_external_enable) @@ -372,7 +376,7 @@ imageBuffer KEYWORD_WITH_ALT(130, 300, 420, 320, yyextra->ARB_shader_image_load_store_enable || yyextra->EXT_texture_buffer_enable || yyextra->OES_texture_buffer_enable, IMAGEBUFFER); image1DArray KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IMAGE1DARRAY); image2DArray KEYWORD_WITH_ALT(130, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable, IMAGE2DARRAY); -imageCubeArray KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IMAGECUBEARRAY); +imageCubeArray KEYWORD_WITH_ALT(130, 300, 420, 320, yyextra->ARB_shader_image_load_store_enable || yyextra->OES_texture_cube_map_array_enable || yyextra->EXT_texture_cube_map_array_enable, IMAGECUBEARRAY); image2DMS KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IMAGE2DMS); image2DMSArray KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IMAGE2DMSARRAY); iimage1D KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IIMAGE1D); @@ -383,7 +387,7 @@ iimageBuffer KEYWORD_WITH_ALT(130, 300, 420, 320, yyextra->ARB_shader_image_load_store_enable || yyextra->EXT_texture_buffer_enable || yyextra->OES_texture_buffer_enable, IIMAGEBUFFER); iimage1DArray KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IIMAGE1DARRAY); iimage2DArray KEYWORD_WITH_ALT(130, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable, IIMAGE2DARRAY); -iimageCubeArray KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IIMAGECUBEARRAY); +iimageCubeArray KEYWORD_WITH_ALT(130, 300, 420, 320, yyextra->ARB_shader_image_load_store_enable || yyextra->OES_texture_cube_map_array_enable || yyextra->EXT_texture_cube_map_array_enable, IIMAGECUBEARRAY); iimage2DMS KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IIMAGE2DMS); iimage2DMSArray KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IIMAGE2DMSARRAY); uimage1D KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, UIMAGE1D); @@ -394,7 +398,7 @@ uimageBuffer KEYWORD_WITH_ALT(130, 300, 420, 320, yyextra->ARB_shader_image_load_store_enable || yyextra->EXT_texture_buffer_enable || yyextra->OES_texture_buffer_enable, UIMAGEBUFFER); uimage1DArray KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, UIMAGE1DARRAY); uimage2DArray KEYWORD_WITH_ALT(130, 300, 420, 310, yyextra->ARB_shader_image_load_store_enable, UIMAGE2DARRAY); -uimageCubeArray KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, UIMAGECUBEARRAY); +uimageCubeArray KEYWORD_WITH_ALT(130, 300, 420, 320, yyextra->ARB_shader_image_load_store_enable || yyextra->OES_texture_cube_map_array_enable || yyextra->EXT_texture_cube_map_array_enable, UIMAGECUBEARRAY); uimage2DMS KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, UIMAGE2DMS); uimage2DMSArray KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, UIMAGE2DMSARRAY); image1DShadow KEYWORD(130, 300, 0, 0, IMAGE1DSHADOW); @@ -429,8 +433,8 @@ || yyextra->ARB_tessellation_shader_enable) { return LAYOUT_TOK; } else { - void *mem_ctx = yyextra; - yylval->identifier = ralloc_strdup(mem_ctx, yytext); + void *mem_ctx = yyextra->linalloc; + yylval->identifier = linear_strdup(mem_ctx, yytext); return classify_identifier(yyextra, yytext); } } @@ -590,13 +594,13 @@ [_a-zA-Z][_a-zA-Z0-9]* { struct _mesa_glsl_parse_state *state = yyextra; - void *ctx = state; + void *ctx = state->linalloc; if (state->es_shader && strlen(yytext) > 1024) { _mesa_glsl_error(yylloc, state, "Identifier `%s' exceeds 1024 characters", yytext); } else { - yylval->identifier = ralloc_strdup(ctx, yytext); + yylval->identifier = linear_strdup(ctx, yytext); } return classify_identifier(state, yytext); } diff -Nru mesa-12.0.6/src/compiler/glsl/glsl_parser.cpp mesa-17.0.7/src/compiler/glsl/glsl_parser.cpp --- mesa-12.0.6/src/compiler/glsl/glsl_parser.cpp 2017-01-24 01:43:16.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/glsl_parser.cpp 2017-06-01 10:37:59.000000000 +0000 @@ -68,7 +68,7 @@ /* Copy the first part of user declarations. */ -#line 1 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:339 */ +#line 1 "./glsl/glsl_parser.yy" /* yacc.c:339 */ /* * Copyright © 2008, 2009 Intel Corporation @@ -434,7 +434,7 @@ union YYSTYPE { -#line 98 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:355 */ +#line 98 "./glsl/glsl_parser.yy" /* yacc.c:355 */ int n; float real; @@ -746,16 +746,16 @@ /* YYFINAL -- State number of the termination state. */ #define YYFINAL 5 /* YYLAST -- Last index in YYTABLE. */ -#define YYLAST 5731 +#define YYLAST 5748 /* YYNTOKENS -- Number of terminals. */ #define YYNTOKENS 269 /* YYNNTS -- Number of nonterminals. */ -#define YYNNTS 112 +#define YYNNTS 110 /* YYNRULES -- Number of rules. */ #define YYNRULES 414 /* YYNSTATES -- Number of states. */ -#define YYNSTATES 582 +#define YYNSTATES 571 /* YYTRANSLATE[YYX] -- Symbol number corresponding to YYX as returned by yylex, with out-of-bounds checking. */ @@ -826,48 +826,48 @@ /* YYRLINE[YYN] -- Source line where rule number YYN was defined. */ static const yytype_uint16 yyrline[] = { - 0, 312, 312, 311, 335, 337, 344, 354, 355, 356, - 357, 358, 382, 384, 388, 389, 390, 394, 403, 411, - 419, 430, 431, 435, 442, 449, 456, 463, 470, 477, - 484, 485, 491, 495, 502, 508, 517, 521, 525, 529, - 530, 534, 535, 539, 545, 557, 561, 567, 581, 582, - 588, 594, 604, 605, 606, 607, 611, 612, 618, 624, - 633, 634, 640, 649, 650, 656, 665, 666, 672, 678, - 684, 693, 694, 700, 709, 710, 719, 720, 729, 730, - 739, 740, 749, 750, 759, 760, 769, 770, 779, 780, - 789, 790, 791, 792, 793, 794, 795, 796, 797, 798, - 799, 803, 807, 823, 827, 832, 836, 841, 848, 852, - 853, 857, 862, 870, 888, 899, 914, 919, 933, 936, - 944, 952, 964, 976, 983, 988, 993, 1002, 1006, 1007, - 1017, 1027, 1037, 1051, 1058, 1069, 1080, 1091, 1102, 1114, - 1129, 1136, 1151, 1158, 1159, 1169, 1464, 1628, 1654, 1659, - 1664, 1672, 1677, 1686, 1695, 1707, 1712, 1717, 1726, 1731, - 1736, 1737, 1738, 1739, 1740, 1741, 1742, 1760, 1768, 1793, - 1817, 1834, 1839, 1855, 1875, 1887, 1895, 1900, 1905, 1912, - 1917, 1922, 1927, 1932, 1957, 1962, 1967, 1975, 1980, 1985, - 1991, 1996, 2004, 2012, 2018, 2028, 2039, 2040, 2048, 2054, - 2060, 2069, 2070, 2071, 2072, 2073, 2074, 2075, 2076, 2077, - 2078, 2079, 2080, 2081, 2082, 2083, 2084, 2085, 2086, 2087, - 2088, 2089, 2090, 2091, 2092, 2093, 2094, 2095, 2096, 2097, - 2098, 2099, 2100, 2101, 2102, 2103, 2104, 2105, 2106, 2107, - 2108, 2109, 2110, 2111, 2112, 2113, 2114, 2115, 2116, 2117, - 2118, 2119, 2120, 2121, 2122, 2123, 2124, 2125, 2126, 2127, - 2128, 2129, 2130, 2131, 2132, 2133, 2134, 2135, 2136, 2137, - 2138, 2139, 2140, 2141, 2142, 2143, 2144, 2145, 2146, 2147, - 2148, 2149, 2150, 2151, 2152, 2153, 2154, 2155, 2156, 2157, - 2158, 2159, 2160, 2161, 2162, 2163, 2164, 2165, 2166, 2167, - 2168, 2169, 2170, 2171, 2172, 2173, 2174, 2175, 2176, 2177, - 2178, 2179, 2180, 2181, 2182, 2186, 2191, 2196, 2204, 2211, - 2220, 2225, 2233, 2252, 2257, 2265, 2271, 2280, 2281, 2285, - 2292, 2299, 2306, 2312, 2313, 2317, 2318, 2319, 2320, 2321, - 2322, 2326, 2333, 2332, 2346, 2347, 2351, 2357, 2366, 2376, - 2388, 2394, 2403, 2412, 2417, 2425, 2429, 2447, 2455, 2460, - 2468, 2473, 2481, 2489, 2497, 2505, 2513, 2521, 2529, 2536, - 2543, 2553, 2554, 2558, 2560, 2566, 2571, 2580, 2586, 2592, - 2598, 2604, 2613, 2614, 2615, 2616, 2620, 2634, 2638, 2656, - 2673, 2684, 2696, 2711, 2716, 2724, 2732, 2741, 2744, 2749, - 2757, 2762, 2770, 2794, 2807, 2818, 2831, 2853, 2867, 2878, - 2892, 2902, 2903, 2904, 2905 + 0, 310, 310, 309, 333, 335, 342, 352, 353, 354, + 355, 356, 380, 382, 386, 387, 388, 392, 401, 409, + 417, 428, 429, 433, 440, 447, 454, 461, 468, 475, + 482, 483, 489, 493, 500, 506, 515, 519, 523, 527, + 528, 532, 533, 537, 543, 555, 559, 565, 579, 580, + 586, 592, 602, 603, 604, 605, 609, 610, 616, 622, + 631, 632, 638, 647, 648, 654, 663, 664, 670, 676, + 682, 691, 692, 698, 707, 708, 717, 718, 727, 728, + 737, 738, 747, 748, 757, 758, 767, 768, 777, 778, + 787, 788, 789, 790, 791, 792, 793, 794, 795, 796, + 797, 801, 805, 821, 825, 830, 834, 839, 856, 860, + 861, 865, 870, 878, 896, 907, 922, 930, 947, 950, + 958, 966, 978, 990, 997, 1002, 1007, 1016, 1020, 1021, + 1031, 1041, 1051, 1065, 1072, 1083, 1094, 1105, 1116, 1128, + 1143, 1150, 1168, 1175, 1176, 1186, 1578, 1743, 1769, 1774, + 1779, 1787, 1792, 1801, 1810, 1822, 1827, 1832, 1841, 1846, + 1851, 1852, 1853, 1854, 1855, 1856, 1857, 1875, 1883, 1908, + 1932, 1946, 1951, 1967, 1987, 1999, 2007, 2012, 2017, 2024, + 2029, 2034, 2039, 2044, 2069, 2081, 2086, 2091, 2099, 2104, + 2109, 2115, 2120, 2128, 2136, 2142, 2152, 2163, 2164, 2172, + 2178, 2184, 2193, 2194, 2195, 2196, 2197, 2198, 2199, 2200, + 2201, 2202, 2203, 2204, 2205, 2206, 2207, 2208, 2209, 2210, + 2211, 2212, 2213, 2214, 2215, 2216, 2217, 2218, 2219, 2220, + 2221, 2222, 2223, 2224, 2225, 2226, 2227, 2228, 2229, 2230, + 2231, 2232, 2233, 2234, 2235, 2236, 2237, 2238, 2239, 2240, + 2241, 2242, 2243, 2244, 2245, 2246, 2247, 2248, 2249, 2250, + 2251, 2252, 2253, 2254, 2255, 2256, 2257, 2258, 2259, 2260, + 2261, 2262, 2263, 2264, 2265, 2266, 2267, 2268, 2269, 2270, + 2271, 2272, 2273, 2274, 2275, 2276, 2277, 2278, 2279, 2280, + 2281, 2282, 2283, 2284, 2285, 2286, 2287, 2288, 2289, 2290, + 2291, 2292, 2293, 2294, 2295, 2296, 2297, 2298, 2299, 2300, + 2301, 2302, 2303, 2304, 2305, 2306, 2310, 2315, 2320, 2328, + 2335, 2344, 2349, 2357, 2376, 2381, 2389, 2395, 2404, 2405, + 2409, 2416, 2423, 2430, 2436, 2437, 2441, 2442, 2443, 2444, + 2445, 2446, 2450, 2457, 2456, 2470, 2471, 2475, 2481, 2490, + 2500, 2512, 2518, 2527, 2536, 2541, 2549, 2553, 2571, 2579, + 2584, 2592, 2597, 2605, 2613, 2621, 2629, 2637, 2645, 2653, + 2660, 2667, 2677, 2678, 2682, 2684, 2690, 2695, 2704, 2710, + 2716, 2722, 2728, 2737, 2738, 2739, 2740, 2744, 2758, 2762, + 2775, 2793, 2812, 2817, 2822, 2827, 2832, 2847, 2850, 2855, + 2863, 2868, 2876, 2900, 2907, 2911, 2918, 2922, 2932, 2941, + 2951, 2960, 2972, 2994, 3004 }; #endif @@ -964,11 +964,10 @@ "case_statement_list", "iteration_statement", "for_init_statement", "conditionopt", "for_rest_statement", "jump_statement", "external_declaration", "function_definition", "interface_block", - "basic_interface_block", "interface_qualifier", - "uniform_interface_qualifier", "buffer_interface_qualifier", - "instance_name_opt", "member_list", "member_declaration", - "layout_uniform_defaults", "layout_buffer_defaults", - "layout_in_defaults", "layout_out_defaults", "layout_defaults", YY_NULLPTR + "basic_interface_block", "interface_qualifier", "instance_name_opt", + "member_list", "member_declaration", "layout_uniform_defaults", + "layout_buffer_defaults", "layout_in_defaults", "layout_out_defaults", + "layout_defaults", YY_NULLPTR }; #endif @@ -1007,12 +1006,12 @@ }; # endif -#define YYPACT_NINF -428 +#define YYPACT_NINF -431 #define yypact_value_is_default(Yystate) \ - (!!((Yystate) == (-428))) + (!!((Yystate) == (-431))) -#define YYTABLE_NINF -397 +#define YYTABLE_NINF -396 #define yytable_value_is_error(Yytable_value) \ 0 @@ -1021,65 +1020,64 @@ STATE-NUM. */ static const yytype_int16 yypact[] = { - -149, -123, 92, -428, -110, -428, -93, -428, -428, -428, - -428, -48, 54, 4946, -428, -428, -41, -428, -428, -428, - -428, -428, -428, -428, -55, -428, -428, -428, -428, -428, - -428, -428, -428, -428, -428, -428, -428, -428, -428, -428, - -428, 8, 16, 25, -428, -428, -428, -428, -428, -428, - -428, -428, -428, -428, -428, -428, -428, -428, -428, -428, - -428, -428, -428, -428, -428, -428, -428, -428, -428, -428, - -428, -428, -428, -428, -428, -428, -428, -428, -428, -428, - -428, -428, -428, -428, -428, -428, -428, -428, -428, -428, - -428, -428, -428, -428, -428, -428, -428, -428, -428, -428, - -428, -428, -428, -428, -428, -428, -428, -428, -428, -428, - -428, -428, -428, -428, -428, -428, -428, -428, -428, -428, - -428, -428, -428, -428, -428, -428, -428, -428, -428, -428, - -428, -428, -428, -428, -428, -428, -428, -428, -428, -428, - -428, -428, -428, -428, -428, -428, -428, -428, -136, -428, - -428, 301, 301, -428, -428, -428, 53, -38, -5, -1, - 21, 23, -64, -428, -49, -428, 4729, -428, -140, -52, - -27, 101, -212, -428, 136, 5315, 5325, 5325, 5577, 5325, - 5325, 5385, -428, 7, -428, 5325, -428, -428, -428, -428, - -428, 88, 108, 111, -428, -428, -428, -428, -428, 54, - 5163, 9, -428, -428, -428, -428, -428, -428, 5325, 5325, - -428, 5325, -428, 5325, -428, -428, 5577, -428, -428, -428, - -428, -428, -107, 54, -428, -428, -428, 569, -428, -428, - 314, 314, -428, -428, -428, 314, -428, 5577, 314, 314, - 314, 54, -428, 22, 36, -215, 55, -143, -142, -133, - -130, -428, -428, -428, -428, -428, -428, -428, -428, -428, - -428, -428, 5385, -428, -428, 3872, 58, -428, 40, 42, - 43, 109, 54, 1353, -428, 5163, 45, -428, -428, -428, - 49, -153, -428, -428, -428, -100, 50, 56, 2119, 62, - 69, 57, 3386, 71, 73, -428, -428, -428, -428, -428, - 4288, 4288, 4288, -428, -428, -428, -428, -428, 52, -428, - -428, -428, -54, -428, -428, -428, 74, -96, 4496, 78, - -105, 4288, 41, -40, 38, -139, 51, 65, 66, 64, - 158, 157, -150, -428, -428, -183, -428, 67, 85, -428, - -428, -428, -428, 835, -428, -428, -428, -428, -428, -428, - -428, -428, -428, -428, 54, -428, -428, -428, -199, 3136, - -186, -428, -428, -428, -428, -428, -428, -428, -428, 86, - -428, 4080, 5163, 5163, 5163, -428, 7, -160, -428, -428, - -428, 1600, -428, 4288, -428, -107, -428, 54, -428, -428, - 184, 2636, 4288, -428, -428, -154, 4288, 3638, -428, -428, - -89, -428, 2119, -428, -428, 176, 4288, -428, -428, 4288, - 94, -428, -428, -428, -428, -428, -428, -428, -428, -428, - -428, -428, -428, -428, 4288, -428, 4288, 4288, 4288, 4288, - 4288, 4288, 4288, 4288, 4288, 4288, 4288, 4288, 4288, 4288, - 4288, 4288, 4288, 4288, 4288, 4288, 4288, -428, -428, -428, - 7, 3136, -166, 3136, -428, -428, 3136, -428, -428, 100, - 54, 82, 5163, 83, 87, 58, 54, -428, -428, -428, - -428, -428, 110, -428, -428, 3638, -66, -428, -59, 107, - 54, 115, -428, 1101, -428, 117, 107, -428, -428, -428, - -428, -428, 41, 41, -40, -40, 38, 38, 38, 38, - -139, -139, 51, 65, 66, 64, 158, 157, -211, -428, - 58, -428, 3136, -428, -216, -428, -428, -148, 203, -428, - 203, 203, -428, 4288, -428, 98, 120, 2119, 102, 105, - 2384, -428, -428, 4288, -428, 2886, -428, -428, 7, 106, - 113, 119, -51, 4288, 2384, 357, -428, -14, -428, 3136, - -428, -428, -428, -428, -428, -428, 58, -428, -428, -428, - 121, 107, -428, 2119, 4288, 112, -428, -428, 1854, 2119, - -12, -428, -428, -428, -155, -428, -428, -428, -428, -428, - 2119, -428 + -158, -122, 41, -431, -96, -431, -83, -431, -431, -431, + -431, -80, 102, 4935, -431, -431, -75, -431, -431, -431, + -431, -431, -431, -431, -93, -431, -431, -431, -431, -431, + -431, -431, -431, -431, -431, -431, -431, -431, -431, -431, + -431, -29, -4, -431, 9, -431, -431, -431, -431, -431, + -431, -431, -431, -431, -431, -431, -431, -431, -431, -431, + -431, -431, -431, -431, -431, -431, -431, -431, -431, -431, + -431, -431, -431, -431, -431, -431, -431, -431, -431, -431, + -431, -431, -431, -431, -431, -431, -431, -431, -431, -431, + -431, -431, -431, -431, -431, -431, -431, -431, -431, -431, + -431, -431, -431, -431, -431, -431, -431, -431, -431, -431, + -431, -431, -431, -431, -431, -431, -431, -431, -431, -431, + -431, -431, -431, -431, -431, -431, -431, -431, -431, -431, + -431, -431, -431, -431, -431, -431, -431, -431, -431, -431, + -431, -431, -431, -431, -431, -431, -431, -431, -431, -138, + -431, -431, 266, 266, -431, -431, -431, -47, -26, 8, + 17, 21, 25, -42, -431, -23, -431, 4718, -431, -146, + -22, 13, 52, -222, -431, 112, 5304, 5318, 5318, 5594, + 5329, 5318, 5329, -431, -7, -431, 5318, -431, -431, -431, + -431, -431, 80, -431, -431, -431, -431, -431, 102, 5152, + 1, -431, -431, -431, -431, -431, -431, 5318, 5318, -431, + 5318, -431, 5318, 5318, -431, -431, 5594, -431, -431, -431, + -431, -431, -101, 102, -431, -431, -431, 558, -431, -431, + 258, 258, -431, -431, -431, 258, -431, 5594, 258, 258, + 258, 102, -431, -2, 12, -205, 33, -132, -131, -130, + -129, -431, -431, -431, -431, -431, -431, -431, -431, -431, + -431, -431, -431, 5329, -431, -431, 3861, 39, -431, 23, + 97, 102, 1342, -431, 5152, 34, -431, -431, -431, 30, + -162, -431, -431, -431, -98, 35, 36, 2108, 67, 68, + 61, 3375, 82, 84, -431, -431, -431, -431, -431, 4277, + 4277, 4277, -431, -431, -431, -431, -431, 64, -431, -431, + -431, -86, -431, -431, -431, 87, -56, 4485, 89, 143, + 4277, 29, -76, 19, -117, 24, 77, 78, 76, 170, + 169, -151, -431, -431, -199, -431, 79, 96, -431, -431, + -431, -431, 824, -431, -431, -431, -431, -431, -431, -431, + -431, -431, -431, 102, -431, -431, -431, -171, 3125, -166, + -431, -431, -431, -431, -431, -431, -431, -431, 94, -431, + 4069, 5152, -431, -7, -177, -431, -431, -431, 1589, -431, + 4277, -431, -101, -431, 102, -431, -431, 192, 2625, 4277, + -431, -431, -169, 4277, 3627, -431, -431, -38, -431, 2108, + -431, -431, 185, 4277, -431, -431, 4277, 100, -431, -431, + -431, -431, -431, -431, -431, -431, -431, -431, -431, -431, + -431, 4277, -431, 4277, 4277, 4277, 4277, 4277, 4277, 4277, + 4277, 4277, 4277, 4277, 4277, 4277, 4277, 4277, 4277, 4277, + 4277, 4277, 4277, 4277, -431, -431, -431, -7, 3125, -165, + 3125, -431, -431, 3125, -431, -431, 99, 102, 81, 5152, + 39, 102, -431, -431, -431, -431, -431, 104, -431, -431, + 3627, -37, -431, -30, 103, 102, 105, -431, 1090, -431, + 106, 103, -431, -431, -431, -431, -431, 29, 29, -76, + -76, 19, 19, 19, 19, -117, -117, 24, 77, 78, + 76, 170, 169, -155, -431, 39, -431, 3125, -431, -223, + -431, -431, -163, 199, -431, -431, 4277, -431, 90, 110, + 2108, 92, 95, 2373, -431, -431, 4277, -431, 2875, -431, + -431, -7, 98, -5, 4277, 2373, 347, -431, -15, -431, + 3125, -431, -431, -431, -431, -431, -431, 39, -431, 101, + 103, -431, 2108, 4277, 107, -431, -431, 1843, 2108, -8, + -431, -431, -431, -137, -431, -431, -431, -431, -431, 2108, + -431 }; /* YYDEFACT[STATE-NUM] -- Default reduction number in state STATE-NUM. @@ -1088,98 +1086,95 @@ static const yytype_uint16 yydefact[] = { 4, 0, 0, 12, 0, 1, 2, 14, 15, 16, - 5, 0, 0, 0, 13, 6, 0, 180, 179, 206, - 202, 204, 205, 203, 185, 210, 211, 212, 213, 214, - 215, 216, 217, 218, 207, 208, 209, 219, 220, 221, - 176, 182, 183, 184, 181, 177, 157, 156, 155, 222, + 5, 0, 0, 0, 13, 6, 0, 180, 179, 207, + 203, 205, 206, 204, 186, 211, 212, 213, 214, 215, + 216, 217, 218, 219, 208, 209, 210, 220, 221, 222, + 176, 182, 183, 184, 185, 181, 177, 157, 156, 155, 223, 224, 225, 226, 227, 228, 229, 230, 231, 232, - 233, 234, 235, 236, 237, 238, 239, 240, 241, 243, - 244, 246, 247, 249, 250, 251, 252, 253, 255, 256, - 257, 258, 260, 261, 262, 263, 265, 266, 267, 269, - 270, 271, 272, 274, 242, 259, 268, 248, 254, 264, - 273, 275, 276, 277, 278, 279, 280, 245, 281, 282, + 233, 234, 235, 236, 237, 238, 239, 240, 241, 242, + 244, 245, 247, 248, 250, 251, 252, 253, 254, 256, + 257, 258, 259, 261, 262, 263, 264, 266, 267, 268, + 270, 271, 272, 273, 275, 243, 260, 269, 249, 255, + 265, 274, 276, 277, 278, 279, 280, 281, 246, 282, 283, 284, 285, 286, 287, 288, 289, 290, 291, 292, 293, 294, 295, 296, 297, 298, 299, 300, 301, 302, 303, 304, 305, 306, 307, 308, 309, 310, 311, 312, - 313, 187, 188, 189, 190, 191, 314, 186, 0, 201, - 200, 158, 159, 317, 316, 315, 0, 0, 0, 0, - 0, 0, 0, 178, 151, 384, 3, 383, 0, 0, - 110, 118, 0, 128, 133, 163, 165, 162, 0, 160, - 161, 164, 140, 196, 198, 166, 199, 18, 382, 107, - 387, 0, 0, 0, 411, 412, 413, 414, 385, 0, - 0, 0, 185, 182, 183, 184, 21, 22, 158, 159, - 138, 163, 168, 164, 139, 167, 0, 7, 8, 9, - 10, 11, 0, 0, 20, 19, 104, 0, 386, 108, + 313, 314, 188, 189, 190, 191, 192, 315, 187, 0, + 202, 201, 158, 159, 318, 317, 316, 0, 0, 0, + 0, 0, 0, 0, 178, 151, 385, 3, 384, 0, + 0, 110, 118, 0, 128, 133, 163, 165, 162, 0, + 160, 161, 164, 140, 197, 199, 166, 200, 18, 383, + 107, 388, 0, 411, 412, 413, 414, 386, 0, 0, + 0, 186, 182, 183, 185, 21, 22, 158, 159, 138, + 163, 168, 160, 164, 139, 167, 0, 7, 8, 9, + 10, 11, 0, 0, 20, 19, 104, 0, 387, 108, 118, 118, 124, 125, 126, 118, 111, 0, 118, 118, - 118, 0, 105, 14, 16, 134, 0, 185, 182, 183, - 184, 170, 388, 403, 405, 407, 409, 171, 169, 141, - 172, 173, 163, 175, 389, 0, 197, 174, 0, 0, - 0, 0, 0, 0, 320, 0, 0, 150, 149, 148, - 145, 0, 143, 147, 153, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 26, 27, 24, 25, 28, - 0, 0, 0, 52, 53, 54, 55, 350, 342, 346, - 23, 30, 48, 32, 37, 38, 0, 0, 42, 0, - 56, 0, 60, 63, 66, 71, 74, 76, 78, 80, - 82, 84, 86, 88, 101, 0, 332, 0, 140, 335, - 348, 334, 333, 0, 336, 337, 338, 339, 340, 112, - 119, 120, 116, 117, 127, 121, 123, 122, 129, 0, - 135, 113, 406, 408, 410, 404, 192, 56, 103, 0, - 46, 0, 0, 0, 0, 17, 325, 0, 323, 319, - 321, 0, 106, 0, 142, 0, 152, 0, 378, 377, - 0, 0, 0, 381, 379, 0, 0, 0, 49, 50, - 0, 341, 0, 34, 35, 0, 0, 40, 39, 0, - 201, 43, 45, 91, 92, 94, 93, 96, 97, 98, - 99, 100, 95, 90, 0, 51, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 351, 347, 349, - 114, 0, 130, 0, 327, 137, 0, 193, 194, 0, - 0, 0, 400, 0, 0, 326, 0, 322, 318, 146, - 144, 154, 0, 372, 371, 374, 0, 380, 0, 355, - 0, 0, 29, 0, 33, 0, 36, 44, 89, 57, - 58, 59, 61, 62, 64, 65, 69, 70, 67, 68, - 72, 73, 75, 77, 79, 81, 83, 85, 0, 102, - 115, 132, 0, 330, 0, 136, 195, 0, 397, 401, - 397, 397, 324, 0, 373, 0, 0, 0, 0, 0, - 0, 343, 31, 0, 131, 0, 328, 402, 398, 0, - 0, 0, 0, 375, 0, 354, 352, 0, 357, 0, - 345, 368, 344, 87, 329, 331, 399, 390, 391, 392, - 0, 376, 370, 0, 0, 0, 358, 362, 0, 366, - 0, 356, 369, 353, 0, 361, 364, 363, 365, 359, - 367, 360 + 118, 0, 105, 14, 16, 134, 0, 186, 182, 183, + 185, 170, 389, 403, 405, 407, 409, 171, 169, 141, + 172, 396, 173, 163, 175, 390, 0, 198, 174, 0, + 0, 0, 0, 321, 0, 0, 150, 149, 148, 145, + 0, 143, 147, 153, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 26, 27, 24, 25, 28, 0, + 0, 0, 52, 53, 54, 55, 351, 343, 347, 23, + 30, 48, 32, 37, 38, 0, 0, 42, 0, 56, + 0, 60, 63, 66, 71, 74, 76, 78, 80, 82, + 84, 86, 88, 101, 0, 333, 0, 140, 336, 349, + 335, 334, 0, 337, 338, 339, 340, 341, 112, 119, + 120, 116, 117, 127, 121, 123, 122, 129, 0, 135, + 113, 406, 408, 410, 404, 193, 56, 103, 0, 46, + 0, 0, 17, 326, 0, 324, 320, 322, 0, 106, + 0, 142, 0, 152, 0, 379, 378, 0, 0, 0, + 382, 380, 0, 0, 0, 49, 50, 0, 342, 0, + 34, 35, 0, 0, 40, 39, 0, 202, 43, 45, + 91, 92, 94, 93, 96, 97, 98, 99, 100, 95, + 90, 0, 51, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 352, 348, 350, 114, 0, 130, + 0, 328, 137, 0, 194, 195, 0, 0, 0, 400, + 327, 0, 323, 319, 146, 144, 154, 0, 373, 372, + 375, 0, 381, 0, 356, 0, 0, 29, 0, 33, + 0, 36, 44, 89, 57, 58, 59, 61, 62, 64, + 65, 69, 70, 67, 68, 72, 73, 75, 77, 79, + 81, 83, 85, 0, 102, 115, 132, 0, 331, 0, + 136, 196, 0, 397, 401, 325, 0, 374, 0, 0, + 0, 0, 0, 0, 344, 31, 0, 131, 0, 329, + 402, 398, 0, 0, 376, 0, 355, 353, 0, 358, + 0, 346, 369, 345, 87, 330, 332, 399, 391, 0, + 377, 371, 0, 0, 0, 359, 363, 0, 367, 0, + 357, 370, 354, 0, 362, 365, 364, 366, 360, 368, + 361 }; /* YYPGOTO[NTERM-NUM]. */ static const yytype_int16 yypgoto[] = { - -428, -428, -428, -428, -428, -428, 11, 207, -428, -88, - -428, -428, -428, -428, -428, -428, -428, -428, -428, -428, - -8, -428, -180, -173, -260, -167, -65, -63, -60, -56, - -53, -61, -428, -254, -308, -428, -262, -268, 1, 3, - -428, -428, -428, -428, 162, -3, -428, -428, -428, -428, - -195, -11, -428, 10, -428, -428, -428, -428, -120, -428, - -428, -9, -244, -13, -428, -428, 34, -428, 122, -253, - -72, -67, -427, -428, 12, -285, -423, -428, -428, -144, - 226, 0, 13, -428, -428, -74, -428, -428, -163, -428, - -164, -428, -428, -428, -428, -428, -428, 241, -428, -94, - -428, -428, -428, -428, -221, -337, -428, 233, 234, 235, - 236, -428 + -431, -431, -431, -431, -431, -431, 10, 195, -431, -114, + -431, -431, -431, -431, -431, -431, -431, -431, -431, -431, + 5157, -431, -178, -156, -286, -141, -68, -71, -69, -67, + -66, -65, -431, -248, -70, -431, -270, -340, -12, -6, + -431, -431, -431, -431, 140, -51, -431, -431, -431, -431, + -188, -11, -431, 0, -431, -431, -431, -431, -106, -144, + -431, -9, -242, -13, -431, -431, -61, -431, 111, -253, + -73, -74, -300, -431, 3, -277, -430, -431, -431, -142, + 220, -3, 7, -431, -431, -72, -431, -431, -160, -431, + -159, -431, -431, -431, -431, -431, -431, 232, -431, -147, + -431, 226, -431, -52, -431, 238, 240, 241, 242, -431 }; /* YYDEFGOTO[NTERM-NUM]. */ static const yytype_int16 yydefgoto[] = { - -1, 2, 13, 3, 165, 6, 376, 14, 166, 310, - 311, 312, 485, 313, 314, 315, 316, 317, 318, 319, - 320, 321, 322, 323, 324, 325, 326, 327, 328, 329, - 330, 331, 332, 333, 334, 424, 335, 369, 336, 337, - 169, 170, 171, 352, 236, 237, 238, 353, 172, 173, - 174, 211, 281, 282, 283, 176, 285, 177, 178, 179, - 180, 213, 266, 370, 183, 184, 185, 186, 273, 274, - 377, 378, 455, 514, 339, 340, 341, 342, 402, 551, - 552, 343, 344, 345, 546, 481, 346, 548, 567, 568, - 569, 570, 347, 475, 525, 526, 348, 187, 188, 189, - 190, 191, 192, 193, 539, 461, 462, 194, 195, 196, - 197, 198 + -1, 2, 13, 3, 166, 6, 373, 14, 167, 309, + 310, 311, 480, 312, 313, 314, 315, 316, 317, 318, + 319, 320, 321, 322, 323, 324, 325, 326, 327, 328, + 329, 330, 331, 332, 333, 421, 334, 368, 335, 336, + 170, 171, 172, 351, 236, 237, 238, 352, 173, 174, + 175, 210, 280, 281, 282, 177, 284, 178, 179, 180, + 181, 213, 267, 369, 184, 185, 186, 187, 272, 273, + 374, 375, 452, 509, 338, 339, 340, 341, 399, 542, + 543, 342, 343, 344, 537, 476, 345, 539, 556, 557, + 558, 559, 346, 470, 518, 519, 347, 188, 189, 190, + 191, 192, 532, 458, 459, 193, 194, 195, 196, 197 }; /* YYTABLE[YYPACT[STATE-NUM]] -- What to do in state STATE-NUM. If @@ -1187,67 +1182,119 @@ number is the opposite. If YYTABLE_NINF, syntax error. */ static const yytype_int16 yytable[] = { - 182, 360, 175, 390, 181, 272, 564, 565, 564, 565, - 411, 368, -396, -393, 167, 11, 168, 7, 8, 9, - 380, 444, -394, 16, 511, -395, 513, 433, 434, 515, - 395, 212, 215, 265, 535, 4, 463, 464, 241, 446, - 400, 1, 277, 7, 8, 9, 7, 8, 9, 265, - 359, 454, 536, 533, 242, 251, 257, 258, 449, 260, - 261, 263, 371, 210, 214, 267, 451, 446, 413, 414, - 415, 416, 417, 418, 419, 420, 421, 422, 272, 456, - 272, 252, 371, 447, 10, 534, 246, 264, 212, 215, - 466, 251, 5, 263, 384, 446, 446, 385, 12, 512, - -396, 487, 466, 459, 278, 231, 467, 550, 555, 581, - 403, 404, 477, 445, 452, 469, 488, 368, 537, 435, - 436, 550, 571, 362, 363, 519, 226, 227, 380, 368, - 476, 200, 465, 364, 478, 479, 365, 279, 509, 232, - 233, 234, 251, 454, 486, 454, 15, 386, 454, 405, - 387, 408, 199, 182, 409, 175, 217, 181, 482, 201, - 423, 446, 239, -393, 175, 259, 181, 167, 252, 168, - 262, -394, 181, 496, 497, 498, 499, 460, 460, 460, - -395, 527, 222, 508, 446, 245, 272, 182, 528, 218, - 216, 446, -47, 219, 406, 229, 560, 223, 449, 446, - 431, 432, 480, 276, 454, 240, 510, 7, 8, 9, - 271, 429, 430, 479, 338, 220, 262, 221, 181, 437, - 438, 239, 239, 230, 354, 553, 239, 454, 350, 239, - 239, 239, 351, 280, 284, 355, 356, 357, 153, 154, - 155, 454, 545, 268, 141, 142, 143, 144, 145, 492, - 493, 262, 358, 181, 566, 265, 579, 367, 494, 495, - 182, 542, 182, 269, 240, 240, 270, 460, -21, 240, - 500, 501, 240, 240, 240, 338, 275, 262, 573, 181, - 480, 561, -22, 576, 578, 235, 153, 154, 155, 243, - 8, 244, 398, 399, 556, 578, 426, 427, 428, 540, - 541, 361, 574, 375, 17, 18, 371, 372, 391, 373, - 374, 382, 202, 425, 383, 392, 388, 396, 231, 397, - 401, 407, 389, 393, 412, 439, 441, 440, 442, 443, - 338, -46, 262, 226, 181, 457, 472, 484, 40, 203, - 204, -41, 205, 44, 45, 46, 47, 48, -109, 516, - 518, 520, 232, 233, 234, 521, 523, 446, 538, 182, - 182, 182, 530, 367, 543, 450, 532, 544, 182, 547, - 549, 563, 557, 224, 502, 367, 575, 503, 338, 558, - 262, 504, 181, 507, 338, 559, 505, 572, 517, 338, - 506, 262, 349, 181, 228, 470, 280, 381, 471, 522, - 562, 524, 483, 473, 474, 577, 580, 225, 253, 254, - 255, 256, 0, 0, 0, 0, 0, 0, 489, 490, - 491, 367, 367, 367, 367, 367, 367, 367, 367, 367, - 367, 367, 367, 367, 367, 367, 367, 0, 0, 0, - 0, 0, 0, 0, 141, 142, 143, 144, 145, 182, - 147, 0, 0, 0, 206, 0, 207, 141, 142, 143, - 144, 145, 338, 0, 0, 0, 0, 0, 0, 0, - 338, 0, 262, 0, 181, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 208, 209, 153, 154, 155, 0, - 0, 529, 0, 0, 0, 0, 0, 0, 235, 153, - 154, 155, 0, 162, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 338, 0, 262, 338, 181, 262, - 0, 181, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 338, 0, 262, 0, 181, 0, 0, 163, 164, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 338, 0, 262, 0, 181, 338, 338, 262, 262, 181, - 181, 0, 0, 0, 0, 0, 0, 338, 0, 262, - 0, 181, 17, 18, 19, 20, 21, 22, 23, 286, - 24, 287, 288, 0, 289, 290, 291, 292, 293, 0, - 0, 25, 26, 27, 28, 29, 30, 31, 32, 33, - 34, 35, 36, 37, 38, 39, 40, 41, 42, 0, + 183, 168, 176, 359, 182, 553, 554, 169, 212, 212, + 387, 271, 553, 554, 11, 7, 8, 9, 367, 377, + 441, 392, 16, -395, -392, -393, -394, 528, 241, 252, + 456, 397, 1, 212, 212, 265, 4, 212, 209, 214, + 464, 5, 212, 266, 242, 529, 211, 215, 276, 430, + 431, 443, 7, 8, 9, 212, 231, 7, 8, 9, + 358, 246, -395, 212, 212, 446, 212, 444, 212, 212, + 251, 257, 258, 461, 260, 262, 264, 266, 400, 401, + 268, 443, 370, 370, 271, 381, 271, 461, 382, 462, + 232, 233, 234, 541, 448, 443, 216, 472, 10, 453, + 507, 211, 215, 530, 251, 541, 260, 264, 12, 526, + 277, 240, 442, 443, 15, 449, 252, 402, 198, 471, + 226, 227, 367, 473, 474, 377, -392, 570, 212, 199, + 212, 460, 367, 481, 361, 362, 363, 364, 154, 155, + 156, 432, 433, 278, 491, 492, 493, 494, 506, 383, + 508, -393, 384, 510, 183, 168, 176, 251, 182, 200, + -47, 169, 403, 239, -394, 176, 259, 182, 217, 240, + 240, 263, 503, 182, 240, 426, 427, 240, 240, 240, + 349, 428, 429, 457, 350, 245, 183, 354, 355, 356, + 271, 405, 434, 435, 406, 142, 143, 144, 145, 146, + 474, 446, 218, 275, 222, 505, 475, 527, 270, 477, + 520, 219, 443, 443, 337, 220, 263, 521, 182, 221, + 443, 239, 239, 223, 353, 229, 239, 212, 546, 239, + 239, 239, 279, 283, 212, 269, 235, 154, 155, 156, + 560, 266, 549, 536, -21, 443, 533, 408, 487, 488, + 212, 357, 263, 555, 182, 7, 8, 9, -22, 183, + 568, 183, 231, 230, 550, 243, 8, 244, 274, 17, + 18, 457, 489, 490, 337, 562, 263, 201, 182, 360, + 565, 567, 475, 563, 423, 424, 425, 370, 451, 547, + 371, 372, 567, 495, 496, 380, 232, 233, 234, -109, + 379, 385, 386, 40, 202, 203, 43, 204, 45, 46, + 47, 48, 49, 388, 389, 212, 410, 411, 412, 413, + 414, 415, 416, 417, 418, 419, 212, 390, 393, 337, + 394, 263, 398, 182, 404, 409, 482, 436, 438, 437, + 439, 440, -46, 454, 467, 226, 479, -41, 511, 513, + 516, 483, 523, 443, 531, 525, 534, 535, 183, 538, + 540, 552, 224, 447, 548, 183, 498, 561, 497, 499, + 348, 564, 500, 504, 501, 337, 502, 263, 451, 182, + 451, 337, 465, 451, 512, 378, 337, 515, 263, 228, + 182, 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65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, @@ -1608,19 +1581,19 @@ 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, - 132, 133, 134, 135, 136, 137, 138, 139, 140, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 146, 0, - 148, 149, 0, 206, 150, 207, 295, 296, 297, 298, - 299, 0, 0, 0, 300, 301, 0, 0, 0, 0, + 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 147, + 0, 149, 150, 0, 205, 151, 206, 294, 295, 296, + 297, 298, 0, 0, 0, 299, 300, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 19, 20, 21, 22, 23, 0, 0, + 0, 0, 0, 0, 19, 20, 21, 22, 23, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, - 35, 36, 37, 38, 39, 0, 302, 0, 0, 458, - 0, 303, 304, 305, 306, 49, 50, 51, 52, 53, + 0, 25, 26, 27, 28, 29, 30, 31, 32, 33, + 34, 35, 36, 37, 38, 39, 0, 301, 0, 0, + 365, 0, 302, 303, 304, 305, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, @@ -1629,19 +1602,19 @@ 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133, - 134, 135, 136, 137, 138, 139, 140, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 146, 0, 148, 149, - 0, 206, 150, 207, 295, 296, 297, 298, 299, 0, - 0, 0, 300, 301, 0, 0, 0, 0, 0, 0, + 134, 135, 136, 137, 138, 139, 140, 141, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 147, 0, 149, + 150, 0, 205, 151, 206, 294, 295, 296, 297, 298, + 0, 0, 0, 299, 300, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 19, 20, 21, 22, 23, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 25, 26, - 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, - 37, 38, 39, 0, 302, 0, 0, 0, 0, 303, - 304, 305, 306, 49, 50, 51, 52, 53, 54, 55, + 0, 0, 19, 20, 21, 22, 23, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 25, + 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, + 36, 37, 38, 39, 0, 301, 0, 0, 455, 0, + 302, 303, 304, 305, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, @@ -1650,106 +1623,42 @@ 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135, - 136, 137, 138, 139, 140, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 146, 0, 148, 410, 0, 206, - 150, 207, 295, 296, 297, 298, 299, 0, 0, 0, - 300, 301, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 136, 137, 138, 139, 140, 141, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 147, 0, 149, 150, 0, + 205, 151, 206, 294, 295, 296, 297, 298, 0, 0, + 0, 299, 300, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 19, 20, 21, 22, 23, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 25, 26, 27, + 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, + 38, 39, 0, 301, 0, 0, 0, 0, 302, 303, + 304, 305, 50, 51, 52, 53, 54, 55, 56, 57, + 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, + 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, + 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, + 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, + 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, + 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, + 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, + 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, + 138, 139, 140, 141, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 147, 0, 149, 407, 0, 205, 151, + 206, 294, 295, 296, 297, 298, 0, 0, 0, 299, + 300, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 17, 18, 19, 20, 21, 22, 23, 0, - 24, 0, 302, 0, 0, 0, 0, 303, 304, 305, - 306, 25, 26, 27, 28, 29, 30, 31, 32, 33, - 34, 35, 36, 37, 38, 39, 40, 41, 42, 0, - 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, - 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, - 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, - 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, - 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, - 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, - 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, - 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, - 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, - 133, 134, 135, 136, 137, 138, 139, 140, 0, 0, - 0, 0, 141, 142, 143, 144, 145, 146, 147, 148, - 149, 0, 0, 150, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 151, 152, 153, 154, 155, 0, 156, 0, - 12, 0, 0, 0, 0, 0, 157, 158, 159, 160, - 161, 162, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 17, - 18, 19, 20, 21, 22, 23, 0, 24, 0, 0, - 0, 0, 0, 0, 0, 0, 163, 164, 25, 26, - 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, - 37, 38, 39, 40, 41, 42, 0, 43, 44, 45, - 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, - 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, - 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, - 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, - 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, - 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, - 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, - 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, - 126, 127, 128, 129, 130, 131, 132, 133, 134, 135, - 136, 137, 138, 139, 140, 0, 0, 0, 0, 141, - 142, 143, 144, 145, 146, 147, 148, 149, 0, 0, - 150, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 151, - 152, 153, 154, 155, 0, 156, 0, 0, 0, 0, - 0, 0, 0, 157, 158, 159, 160, 161, 162, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 17, 18, 19, 20, - 21, 22, 23, 0, 202, 0, 0, 0, 0, 0, - 0, 0, 0, 163, 164, 25, 26, 27, 28, 29, - 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, - 40, 203, 204, 0, 205, 44, 45, 46, 47, 48, - 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, - 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, - 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, - 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, - 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, - 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, - 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, - 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, - 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, - 139, 140, 0, 0, 0, 0, 141, 142, 143, 144, - 145, 146, 147, 148, 149, 0, 0, 150, 17, 18, - 0, 0, 0, 0, 0, 0, 247, 0, 17, 18, - 0, 0, 0, 0, 0, 0, 202, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 208, 209, 153, 154, - 155, 0, 40, 248, 249, 0, 250, 44, 45, 46, - 47, 48, 40, 203, 204, 162, 205, 44, 45, 46, - 47, 48, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 17, 18, - 0, 0, 0, 0, 0, 0, 24, 0, 0, 0, - 163, 164, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 40, 41, 42, 0, 43, 44, 45, 46, - 47, 48, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 141, 142, - 143, 144, 145, 0, 147, 0, 0, 0, 141, 142, - 143, 144, 145, 0, 147, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 208, 209, - 153, 154, 155, 0, 0, 0, 0, 0, 208, 209, - 153, 154, 155, 0, 0, 0, 0, 162, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 162, 141, 142, - 143, 144, 145, 0, 147, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 163, 164, 0, 0, 0, 0, 0, 0, - 0, 0, 163, 164, 0, 0, 0, 0, 208, 209, - 153, 154, 155, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 19, 20, 21, 22, 23, 162, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 25, - 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, - 36, 37, 38, 39, 0, 0, 0, 0, 0, 0, - 0, 0, 163, 164, 49, 50, 51, 52, 53, 54, + 0, 17, 18, 19, 20, 21, 22, 23, 0, 24, + 0, 301, 0, 0, 0, 0, 302, 303, 304, 305, + 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, + 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, + 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, @@ -1758,75 +1667,41 @@ 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, - 135, 136, 137, 138, 139, 140, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 146, 0, 148, 149, 0, - 0, 150 -}; - -static const yytype_int16 yycheck[] = -{ - 13, 245, 13, 288, 13, 200, 20, 21, 20, 21, - 318, 265, 155, 155, 13, 4, 13, 153, 154, 155, - 273, 171, 155, 12, 451, 155, 453, 166, 167, 456, - 292, 151, 152, 248, 250, 158, 373, 374, 250, 250, - 302, 190, 149, 153, 154, 155, 153, 154, 155, 248, - 265, 359, 268, 264, 266, 175, 176, 177, 343, 179, - 180, 181, 248, 151, 152, 185, 265, 250, 173, 174, - 175, 176, 177, 178, 179, 180, 181, 182, 273, 265, - 275, 175, 248, 266, 194, 512, 174, 181, 208, 209, - 250, 211, 0, 213, 247, 250, 250, 250, 191, 265, - 155, 409, 250, 371, 211, 4, 266, 530, 535, 264, - 164, 165, 266, 263, 358, 383, 424, 371, 266, 258, - 259, 544, 549, 266, 266, 462, 266, 267, 381, 383, - 392, 267, 376, 266, 396, 397, 266, 244, 446, 38, - 39, 40, 262, 451, 406, 453, 194, 247, 456, 203, - 250, 247, 193, 166, 250, 166, 194, 166, 247, 148, - 265, 250, 171, 155, 175, 178, 175, 166, 262, 166, - 181, 155, 181, 433, 434, 435, 436, 372, 373, 374, - 155, 247, 246, 445, 250, 174, 381, 200, 247, 194, - 156, 250, 246, 194, 248, 247, 247, 246, 483, 250, - 162, 163, 397, 216, 512, 171, 450, 153, 154, 155, - 199, 251, 252, 475, 227, 194, 227, 194, 227, 168, - 169, 230, 231, 250, 237, 533, 235, 535, 231, 238, - 239, 240, 235, 222, 223, 238, 239, 240, 185, 186, - 187, 549, 527, 155, 143, 144, 145, 146, 147, 429, - 430, 262, 241, 262, 268, 248, 268, 265, 431, 432, - 273, 523, 275, 155, 230, 231, 155, 462, 246, 235, - 437, 438, 238, 239, 240, 288, 267, 288, 563, 288, - 475, 543, 246, 568, 569, 184, 185, 186, 187, 153, - 154, 155, 300, 301, 538, 580, 255, 256, 257, 520, - 521, 246, 564, 194, 3, 4, 248, 267, 246, 267, - 267, 266, 11, 321, 265, 246, 266, 246, 4, 246, - 268, 247, 266, 266, 246, 260, 262, 261, 170, 172, - 343, 246, 343, 266, 343, 249, 152, 161, 37, 38, - 39, 247, 41, 42, 43, 44, 45, 46, 247, 249, - 268, 268, 38, 39, 40, 268, 246, 250, 155, 372, - 373, 374, 247, 371, 266, 354, 249, 247, 381, 267, - 265, 14, 266, 166, 439, 383, 264, 440, 391, 266, - 391, 441, 391, 444, 397, 266, 442, 266, 460, 402, - 443, 402, 230, 402, 168, 385, 385, 275, 387, 466, - 544, 475, 402, 391, 391, 568, 570, 166, 175, 175, - 175, 175, -1, -1, -1, -1, -1, -1, 426, 427, - 428, 429, 430, 431, 432, 433, 434, 435, 436, 437, - 438, 439, 440, 441, 442, 443, 444, -1, -1, -1, - -1, -1, -1, -1, 143, 144, 145, 146, 147, 462, - 149, -1, -1, -1, 153, -1, 155, 143, 144, 145, - 146, 147, 475, -1, -1, -1, -1, -1, -1, -1, - 483, -1, 483, -1, 483, -1, -1, -1, -1, -1, - -1, -1, -1, -1, 183, 184, 185, 186, 187, -1, - -1, 480, -1, -1, -1, -1, -1, -1, 184, 185, - 186, 187, -1, 202, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, 527, -1, 527, 530, 527, 530, - -1, 530, -1, -1, -1, -1, -1, -1, -1, -1, - -1, 544, -1, 544, -1, 544, -1, -1, 237, 238, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - 563, -1, 563, -1, 563, 568, 569, 568, 569, 568, - 569, -1, -1, -1, -1, -1, -1, 580, -1, 580, - -1, 580, 3, 4, 5, 6, 7, 8, 9, 10, - 11, 12, 13, -1, 15, 16, 17, 18, 19, -1, - -1, 22, 23, 24, 25, 26, 27, 28, 29, 30, - 31, 32, 33, 34, 35, 36, 37, 38, 39, -1, - 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, + 135, 136, 137, 138, 139, 140, 141, 0, 0, 0, + 0, 142, 143, 144, 145, 146, 147, 148, 149, 150, + 0, 0, 151, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 152, 153, 154, 155, 156, 0, 157, 0, 12, + 0, 0, 0, 0, 0, 158, 159, 160, 161, 162, + 163, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 17, 18, + 19, 20, 21, 22, 23, 0, 24, 0, 0, 0, + 0, 0, 0, 0, 0, 164, 165, 25, 26, 27, + 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, + 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, + 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, + 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, + 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, + 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, + 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, + 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, + 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, + 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, + 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, + 138, 139, 140, 141, 0, 0, 0, 0, 142, 143, + 144, 145, 146, 147, 148, 149, 150, 0, 0, 151, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 152, 153, + 154, 155, 156, 0, 157, 0, 0, 0, 0, 0, + 0, 0, 158, 159, 160, 161, 162, 163, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 17, 18, 19, 20, 21, + 22, 23, 0, 201, 0, 0, 0, 0, 0, 0, + 0, 0, 164, 165, 25, 26, 27, 28, 29, 30, + 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, + 202, 203, 43, 204, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, @@ -1835,52 +1710,43 @@ 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, - 131, 132, 133, 134, 135, 136, 137, 138, -1, -1, - -1, -1, 143, 144, 145, 146, 147, 148, 149, 150, - 151, 152, 153, 154, 155, 156, 157, 158, 159, 160, - -1, -1, -1, 164, 165, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, 183, 184, 185, 186, 187, -1, 189, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, 202, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, 237, 238, -1, -1, - -1, -1, -1, -1, -1, 246, -1, -1, -1, -1, - 251, 252, 253, 254, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, 266, 267, 268, 3, 4, - 5, 6, 7, 8, 9, 10, 11, 12, 13, -1, - 15, 16, 17, 18, 19, -1, -1, 22, 23, 24, - 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, - 35, 36, 37, 38, 39, -1, 41, 42, 43, 44, - 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, - 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, - 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, - 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, - 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, - 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, - 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, - 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, - 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, - 135, 136, 137, 138, -1, -1, -1, -1, 143, 144, - 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, - 155, 156, 157, 158, 159, 160, -1, -1, -1, 164, - 165, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, 183, 184, - 185, 186, 187, -1, 189, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, 202, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, 237, 238, -1, -1, -1, -1, -1, -1, - -1, 246, -1, -1, -1, -1, 251, 252, 253, 254, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, 266, 267, 268, 3, 4, 5, 6, 7, 8, - 9, 10, 11, 12, 13, -1, 15, 16, 17, 18, - 19, -1, -1, 22, 23, 24, 25, 26, 27, 28, + 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, + 141, 0, 0, 0, 0, 142, 143, 144, 145, 146, + 147, 148, 149, 150, 0, 0, 151, 17, 18, 0, + 0, 0, 0, 0, 0, 247, 0, 0, 0, 0, + 0, 17, 18, 0, 0, 0, 0, 0, 0, 201, + 0, 0, 17, 18, 0, 207, 208, 154, 155, 156, + 24, 40, 248, 249, 43, 250, 45, 46, 47, 48, + 49, 0, 0, 0, 163, 40, 202, 203, 43, 204, + 45, 46, 47, 48, 49, 0, 40, 41, 42, 43, + 44, 45, 46, 47, 48, 49, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 164, + 165, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 366, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 142, 143, 144, + 145, 146, 0, 148, 0, 0, 395, 396, 0, 0, + 0, 142, 143, 144, 145, 146, 0, 148, 0, 0, + 0, 0, 142, 143, 144, 145, 146, 422, 148, 0, + 0, 0, 0, 0, 0, 0, 0, 207, 208, 154, + 155, 156, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 207, 208, 154, 155, 156, 163, 0, 0, 0, + 0, 0, 207, 208, 154, 155, 156, 0, 0, 0, + 163, 0, 0, 0, 0, 0, 0, 366, 0, 0, + 0, 163, 0, 0, 0, 0, 0, 366, 0, 0, + 0, 164, 165, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 164, 165, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 164, 165, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 484, 485, 486, 366, 366, 366, 366, 366, 366, 366, + 366, 366, 366, 366, 366, 366, 366, 366, 366, 19, + 20, 21, 22, 23, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, - 39, -1, 41, 42, 43, 44, 45, 46, 47, 48, - 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, + 39, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, @@ -1889,47 +1755,126 @@ 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, - -1, -1, -1, -1, 143, 144, 145, 146, 147, 148, - 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, - 159, 160, -1, -1, -1, 164, 165, -1, -1, -1, + 139, 140, 141, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 147, 0, 149, 150, 0, 0, 151 +}; + +static const yytype_int16 yycheck[] = +{ + 13, 13, 13, 245, 13, 20, 21, 13, 152, 153, + 287, 199, 20, 21, 4, 153, 154, 155, 266, 272, + 171, 291, 12, 155, 155, 155, 155, 250, 250, 176, + 370, 301, 190, 177, 178, 182, 158, 181, 152, 153, + 380, 0, 186, 248, 266, 268, 152, 153, 149, 166, + 167, 250, 153, 154, 155, 199, 4, 153, 154, 155, + 265, 175, 155, 207, 208, 342, 210, 266, 212, 213, + 176, 177, 178, 250, 180, 181, 182, 248, 164, 165, + 186, 250, 248, 248, 272, 247, 274, 250, 250, 266, + 38, 39, 40, 523, 265, 250, 157, 266, 194, 265, + 265, 207, 208, 266, 210, 535, 212, 213, 191, 264, + 211, 172, 263, 250, 194, 357, 263, 203, 193, 389, + 266, 267, 370, 393, 394, 378, 155, 264, 272, 267, + 274, 373, 380, 403, 266, 266, 266, 266, 185, 186, + 187, 258, 259, 244, 430, 431, 432, 433, 448, 247, + 450, 155, 250, 453, 167, 167, 167, 263, 167, 149, + 246, 167, 248, 172, 155, 176, 179, 176, 194, 230, + 231, 182, 442, 182, 235, 251, 252, 238, 239, 240, + 231, 162, 163, 371, 235, 175, 199, 238, 239, 240, + 378, 247, 168, 169, 250, 143, 144, 145, 146, 147, + 470, 478, 194, 216, 246, 447, 394, 507, 198, 247, + 247, 194, 250, 250, 227, 194, 227, 247, 227, 194, + 250, 230, 231, 246, 237, 247, 235, 371, 528, 238, + 239, 240, 222, 223, 378, 155, 184, 185, 186, 187, + 540, 248, 247, 520, 246, 250, 516, 317, 426, 427, + 394, 241, 263, 268, 263, 153, 154, 155, 246, 272, + 268, 274, 4, 250, 534, 153, 154, 155, 267, 3, + 4, 459, 428, 429, 287, 552, 287, 11, 287, 246, + 557, 558, 470, 553, 255, 256, 257, 248, 358, 531, + 267, 194, 569, 434, 435, 265, 38, 39, 40, 247, + 266, 266, 266, 37, 38, 39, 40, 41, 42, 43, + 44, 45, 46, 246, 246, 459, 173, 174, 175, 176, + 177, 178, 179, 180, 181, 182, 470, 266, 246, 342, + 246, 342, 268, 342, 247, 246, 406, 260, 262, 261, + 170, 172, 246, 249, 152, 266, 161, 247, 249, 268, + 246, 421, 247, 250, 155, 249, 266, 247, 371, 267, + 265, 14, 167, 353, 266, 378, 437, 266, 436, 438, + 230, 264, 439, 443, 440, 388, 441, 388, 448, 388, + 450, 394, 382, 453, 457, 274, 399, 461, 399, 169, + 399, 388, 382, 535, 384, 388, 399, 557, 470, 167, + 559, 143, 144, 145, 146, 147, 180, 459, 265, 143, + 144, 145, 146, 147, 176, 149, 176, 176, 176, 153, + -1, 155, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, 507, -1, -1, + -1, -1, 184, 185, 186, 187, 459, -1, -1, 183, + 184, 185, 186, 187, -1, -1, 526, 470, 528, -1, + -1, -1, -1, -1, -1, 478, -1, 478, 202, 478, + 540, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, 475, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 237, 238, -1, -1, 520, -1, 520, + 523, 520, 523, -1, 523, -1, -1, -1, -1, -1, + -1, -1, 535, -1, 535, -1, 535, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, 552, + -1, 552, -1, 552, 557, 558, 557, 558, 557, 558, + -1, -1, -1, -1, -1, -1, 569, -1, 569, -1, + 569, 3, 4, 5, 6, 7, 8, 9, 10, 11, + 12, 13, -1, 15, 16, 17, 18, 19, -1, -1, + 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, + 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, + 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, + 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, + 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, + 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, + 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, + 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, + 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, + 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, + 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, + 132, 133, 134, 135, 136, 137, 138, -1, -1, -1, + -1, 143, 144, 145, 146, 147, 148, 149, 150, 151, + 152, 153, 154, 155, 156, 157, 158, 159, 160, -1, + -1, -1, 164, 165, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, 183, 184, 185, 186, 187, -1, - 189, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, 202, -1, -1, -1, -1, -1, -1, + -1, 183, 184, 185, 186, 187, -1, 189, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + 202, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, 237, 238, - -1, -1, -1, -1, -1, -1, -1, 246, -1, -1, - -1, -1, 251, 252, 253, 254, 3, 4, 5, 6, - 7, 8, 9, -1, 11, -1, -1, 266, 267, 268, - -1, -1, -1, -1, -1, 22, 23, 24, 25, 26, - 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, - 37, 38, 39, -1, 41, 42, 43, 44, 45, 46, - 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, - 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, - 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, - 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, - 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, - 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, - 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, - 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, - 127, 128, 129, 130, 131, 132, 133, 134, 135, 136, - 137, 138, -1, -1, -1, -1, 143, 144, 145, 146, - 147, 148, 149, 150, 151, -1, -1, 154, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, 237, 238, -1, -1, -1, + -1, -1, -1, -1, 246, -1, -1, -1, -1, 251, + 252, 253, 254, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, 266, 267, 268, 3, 4, 5, + 6, 7, 8, 9, 10, 11, 12, 13, -1, 15, + 16, 17, 18, 19, -1, -1, 22, 23, 24, 25, + 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, + 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, + 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, + 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, + 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, + 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, + 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, + 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, + 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, + 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, + 126, 127, 128, 129, 130, 131, 132, 133, 134, 135, + 136, 137, 138, -1, -1, -1, -1, 143, 144, 145, + 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, + 156, 157, 158, 159, 160, -1, -1, -1, 164, 165, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, 183, 184, 185, 186, - 187, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, 202, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, 183, 184, 185, + 186, 187, -1, 189, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, 202, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - 237, 238, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, 3, 4, 5, 6, 7, 8, 9, - -1, 11, -1, -1, -1, -1, -1, -1, -1, -1, - -1, 268, 22, 23, 24, 25, 26, 27, 28, 29, + -1, 237, 238, -1, -1, -1, -1, -1, -1, -1, + 246, -1, -1, -1, -1, 251, 252, 253, 254, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + 266, 267, 268, 3, 4, 5, 6, 7, 8, 9, + 10, 11, 12, 13, -1, 15, 16, 17, 18, 19, + -1, -1, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, - -1, 41, 42, 43, 44, 45, 46, 47, 48, 49, + 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, @@ -1940,47 +1885,45 @@ 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, -1, -1, -1, -1, 143, 144, 145, 146, 147, 148, 149, - 150, 151, -1, -1, 154, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, + 160, -1, -1, -1, 164, 165, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, 183, 184, 185, 186, 187, -1, -1, + -1, -1, -1, 183, 184, 185, 186, 187, -1, 189, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 202, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 237, 238, -1, + -1, -1, -1, -1, -1, -1, 246, -1, -1, -1, + -1, 251, 252, 253, 254, 3, 4, 5, 6, 7, + 8, 9, -1, 11, -1, -1, 266, 267, 268, -1, + -1, -1, -1, -1, 22, 23, 24, 25, 26, 27, + 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, + 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, + 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, + 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, + 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, + 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, + 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, + 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, + 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, + 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, + 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, + 138, -1, -1, -1, -1, 143, 144, 145, 146, 147, + 148, 149, 150, 151, -1, -1, 154, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, 3, 4, 5, - 6, 7, 8, 9, 10, 11, 12, 13, 268, 15, - 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, - 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, - 36, 37, 38, 39, -1, 41, 42, 43, 44, 45, - 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, - 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, - 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, - 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, - 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, - 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, - 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, - 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, - 126, 127, 128, 129, 130, 131, 132, 133, 134, 135, - 136, 137, 138, -1, -1, -1, -1, 143, 144, 145, - 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, - 156, 157, 158, 159, 160, -1, -1, -1, 164, 165, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, 183, 184, 185, - 186, 187, -1, 189, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, 202, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, 183, 184, 185, 186, 187, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, 202, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, 237, 238, -1, -1, -1, -1, -1, -1, -1, - 246, -1, -1, -1, -1, 251, 252, 253, 254, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - 266, 267, 3, 4, 5, 6, 7, 8, 9, 10, - 11, 12, 13, -1, 15, 16, 17, 18, 19, -1, - -1, 22, 23, 24, 25, 26, 27, 28, 29, 30, - 31, 32, 33, 34, 35, 36, 37, 38, 39, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, 237, + 238, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, 3, 4, 5, 6, 7, 8, 9, -1, + 11, -1, -1, -1, -1, -1, -1, -1, -1, -1, + 268, 22, 23, 24, 25, 26, 27, 28, 29, 30, + 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, @@ -1992,147 +1935,308 @@ 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 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65, 66, 67, 68, 69, 70, - 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, - 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, - 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, - 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, - 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, - 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, - 131, 132, 133, 134, 135, 136, 137, 138, -1, -1, - -1, -1, 143, 144, 145, 146, 147, 148, 149, 150, - 151, -1, -1, 154, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, 183, 184, 185, 186, 187, -1, 189, -1, - 191, -1, -1, -1, -1, -1, 197, 198, 199, 200, - 201, 202, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, 3, - 4, 5, 6, 7, 8, 9, -1, 11, -1, -1, - -1, -1, -1, -1, -1, -1, 237, 238, 22, 23, - 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, - 34, 35, 36, 37, 38, 39, -1, 41, 42, 43, - 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, - 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, - 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, - 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, - 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, - 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, - 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, - 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, - 124, 125, 126, 127, 128, 129, 130, 131, 132, 133, - 134, 135, 136, 137, 138, -1, -1, -1, -1, 143, - 144, 145, 146, 147, 148, 149, 150, 151, -1, -1, - 154, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, 183, - 184, 185, 186, 187, -1, 189, -1, -1, -1, -1, - -1, -1, -1, 197, 198, 199, 200, 201, 202, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, 3, 4, 5, 6, - 7, 8, 9, -1, 11, -1, -1, -1, -1, -1, - -1, -1, -1, 237, 238, 22, 23, 24, 25, 26, - 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, - 37, 38, 39, -1, 41, 42, 43, 44, 45, 46, - 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, - 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, - 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, - 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, - 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, - 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, - 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, - 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, - 127, 128, 129, 130, 131, 132, 133, 134, 135, 136, - 137, 138, -1, -1, -1, -1, 143, 144, 145, 146, - 147, 148, 149, 150, 151, -1, -1, 154, 3, 4, - -1, -1, -1, -1, -1, -1, 11, -1, 3, 4, - -1, -1, -1, -1, -1, -1, 11, -1, -1, -1, - -1, -1, -1, -1, -1, -1, 183, 184, 185, 186, - 187, -1, 37, 38, 39, -1, 41, 42, 43, 44, - 45, 46, 37, 38, 39, 202, 41, 42, 43, 44, - 45, 46, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, 3, 4, - -1, -1, -1, -1, -1, -1, 11, -1, -1, -1, - 237, 238, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, 37, 38, 39, -1, 41, 42, 43, 44, - 45, 46, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, 143, 144, - 145, 146, 147, -1, 149, -1, -1, -1, 143, 144, - 145, 146, 147, -1, 149, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, 183, 184, - 185, 186, 187, -1, -1, -1, -1, -1, 183, 184, - 185, 186, 187, -1, -1, -1, -1, 202, -1, -1, - -1, -1, -1, -1, -1, -1, -1, 202, 143, 144, - 145, 146, 147, -1, 149, -1, -1, -1, -1, -1, + 138, -1, -1, -1, -1, 143, 144, 145, 146, 147, + 148, 149, 150, 151, -1, -1, 154, 3, 4, -1, + -1, -1, -1, -1, -1, 11, -1, -1, -1, -1, + -1, 3, 4, -1, -1, -1, -1, -1, -1, 11, + -1, -1, 3, 4, -1, 183, 184, 185, 186, 187, + 11, 37, 38, 39, 40, 41, 42, 43, 44, 45, + 46, -1, -1, -1, 202, 37, 38, 39, 40, 41, + 42, 43, 44, 45, 46, -1, 37, 38, 39, 40, + 41, 42, 43, 44, 45, 46, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, 237, + 238, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, 266, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, -1, 143, 144, 145, + 146, 147, -1, 149, -1, -1, 299, 300, -1, -1, + -1, 143, 144, 145, 146, 147, -1, 149, -1, -1, + -1, -1, 143, 144, 145, 146, 147, 320, 149, -1, + -1, -1, -1, -1, -1, -1, -1, 183, 184, 185, + 186, 187, -1, -1, -1, -1, -1, -1, -1, -1, + -1, 183, 184, 185, 186, 187, 202, -1, -1, -1, + -1, -1, 183, 184, 185, 186, 187, -1, -1, -1, + 202, -1, -1, -1, -1, -1, -1, 370, -1, -1, + -1, 202, -1, -1, -1, -1, -1, 380, -1, -1, + -1, 237, 238, -1, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, 237, 238, -1, -1, -1, + -1, -1, -1, -1, -1, -1, 237, 238, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, 237, 238, -1, -1, -1, -1, -1, -1, - -1, -1, 237, 238, -1, -1, -1, -1, 183, 184, - 185, 186, 187, -1, -1, -1, -1, -1, -1, -1, - -1, -1, 5, 6, 7, 8, 9, 202, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, 22, - 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, - 33, 34, 35, 36, -1, -1, -1, -1, -1, -1, - -1, -1, 237, 238, 47, 48, 49, 50, 51, 52, - 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, - 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, - 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, - 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, - 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, - 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, - 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, - 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, - 133, 134, 135, 136, 137, 138, -1, -1, -1, -1, - -1, -1, -1, -1, -1, 148, -1, 150, 151, -1, - -1, 154 + 423, 424, 425, 426, 427, 428, 429, 430, 431, 432, + 433, 434, 435, 436, 437, 438, 439, 440, 441, 5, + 6, 7, 8, 9, -1, -1, -1, -1, -1, -1, + -1, -1, -1, -1, -1, -1, 22, 23, 24, 25, + 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, + 36, -1, -1, -1, -1, -1, -1, -1, -1, -1, + -1, 47, 48, 49, 50, 51, 52, 53, 54, 55, + 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, + 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, + 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, + 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, + 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, + 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, + 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, + 126, 127, 128, 129, 130, 131, 132, 133, 134, 135, + 136, 137, 138, -1, -1, -1, -1, -1, -1, -1, + -1, -1, 148, -1, 150, 151, -1, -1, 154 }; /* YYSTOS[STATE-NUM] -- The (internal number of the) accessing @@ -2349,61 +2346,60 @@ 194, 275, 191, 271, 276, 194, 275, 3, 4, 5, 6, 7, 8, 9, 11, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, - 37, 38, 39, 41, 42, 43, 44, 45, 46, 47, - 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, - 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, - 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, - 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, - 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, - 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, - 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, - 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, - 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, - 138, 143, 144, 145, 146, 147, 148, 149, 150, 151, - 154, 183, 184, 185, 186, 187, 189, 197, 198, 199, - 200, 201, 202, 237, 238, 273, 277, 307, 308, 309, - 310, 311, 317, 318, 319, 320, 324, 326, 327, 328, - 329, 330, 332, 333, 334, 335, 336, 366, 367, 368, - 369, 370, 371, 372, 376, 377, 378, 379, 380, 193, - 267, 275, 11, 38, 39, 41, 153, 155, 183, 184, - 278, 320, 327, 330, 278, 327, 335, 194, 194, 194, + 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, + 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, + 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, + 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, + 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, + 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, + 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, + 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, + 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, + 127, 128, 129, 130, 131, 132, 133, 134, 135, 136, + 137, 138, 143, 144, 145, 146, 147, 148, 149, 150, + 151, 154, 183, 184, 185, 186, 187, 189, 197, 198, + 199, 200, 201, 202, 237, 238, 273, 277, 307, 308, + 309, 310, 311, 317, 318, 319, 320, 324, 326, 327, + 328, 329, 330, 332, 333, 334, 335, 336, 366, 367, + 368, 369, 370, 374, 375, 376, 377, 378, 193, 267, + 275, 11, 38, 39, 41, 153, 155, 183, 184, 278, + 320, 327, 328, 330, 278, 327, 335, 194, 194, 194, 194, 194, 246, 246, 276, 366, 266, 267, 349, 247, 250, 4, 38, 39, 40, 184, 313, 314, 315, 330, 335, 250, 266, 153, 155, 275, 278, 11, 38, 39, - 41, 327, 368, 376, 377, 378, 379, 327, 327, 332, - 327, 327, 320, 327, 368, 248, 331, 327, 155, 155, - 155, 275, 319, 337, 338, 267, 332, 149, 211, 244, - 275, 321, 322, 323, 275, 325, 10, 12, 13, 15, - 16, 17, 18, 19, 152, 156, 157, 158, 159, 160, - 164, 165, 246, 251, 252, 253, 254, 266, 267, 268, - 278, 279, 280, 282, 283, 284, 285, 286, 287, 288, - 289, 290, 291, 292, 293, 294, 295, 296, 297, 298, - 299, 300, 301, 302, 303, 305, 307, 308, 332, 343, - 344, 345, 346, 350, 351, 352, 355, 361, 365, 313, - 314, 314, 312, 316, 332, 314, 314, 314, 275, 265, - 331, 246, 266, 266, 266, 266, 249, 289, 302, 306, - 332, 248, 267, 267, 267, 194, 275, 339, 340, 268, - 338, 337, 266, 265, 247, 250, 247, 250, 266, 266, - 344, 246, 246, 266, 266, 305, 246, 246, 289, 289, - 305, 268, 347, 164, 165, 203, 248, 247, 247, 250, - 151, 303, 246, 173, 174, 175, 176, 177, 178, 179, - 180, 181, 182, 265, 304, 289, 255, 256, 257, 251, - 252, 162, 163, 166, 167, 258, 259, 168, 169, 260, - 261, 262, 170, 172, 171, 263, 250, 266, 268, 344, - 275, 265, 331, 267, 303, 341, 265, 249, 249, 306, - 319, 374, 375, 374, 374, 331, 250, 266, 268, 306, - 322, 275, 152, 343, 351, 362, 305, 266, 305, 305, - 319, 354, 247, 350, 161, 281, 305, 303, 303, 289, - 289, 289, 291, 291, 292, 292, 293, 293, 293, 293, - 294, 294, 295, 296, 297, 298, 299, 300, 305, 303, - 331, 341, 265, 341, 342, 341, 249, 339, 268, 374, - 268, 268, 340, 246, 354, 363, 364, 247, 247, 275, - 247, 268, 249, 264, 341, 250, 268, 266, 155, 373, - 373, 373, 305, 266, 247, 344, 353, 267, 356, 265, - 345, 348, 349, 303, 268, 341, 331, 266, 266, 266, - 247, 305, 348, 14, 20, 21, 268, 357, 358, 359, - 360, 341, 266, 344, 305, 264, 344, 357, 344, 268, - 359, 264 + 41, 327, 368, 374, 375, 376, 377, 327, 327, 332, + 327, 370, 327, 320, 327, 368, 248, 331, 327, 155, + 275, 319, 337, 338, 267, 332, 149, 211, 244, 275, + 321, 322, 323, 275, 325, 10, 12, 13, 15, 16, + 17, 18, 19, 152, 156, 157, 158, 159, 160, 164, + 165, 246, 251, 252, 253, 254, 266, 267, 268, 278, + 279, 280, 282, 283, 284, 285, 286, 287, 288, 289, + 290, 291, 292, 293, 294, 295, 296, 297, 298, 299, + 300, 301, 302, 303, 305, 307, 308, 332, 343, 344, + 345, 346, 350, 351, 352, 355, 361, 365, 313, 314, + 314, 312, 316, 332, 314, 314, 314, 275, 265, 331, + 246, 266, 266, 266, 266, 249, 289, 302, 306, 332, + 248, 267, 194, 275, 339, 340, 268, 338, 337, 266, + 265, 247, 250, 247, 250, 266, 266, 344, 246, 246, + 266, 266, 305, 246, 246, 289, 289, 305, 268, 347, + 164, 165, 203, 248, 247, 247, 250, 151, 303, 246, + 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, + 265, 304, 289, 255, 256, 257, 251, 252, 162, 163, + 166, 167, 258, 259, 168, 169, 260, 261, 262, 170, + 172, 171, 263, 250, 266, 268, 344, 275, 265, 331, + 267, 303, 341, 265, 249, 249, 306, 319, 372, 373, + 331, 250, 266, 268, 306, 322, 275, 152, 343, 351, + 362, 305, 266, 305, 305, 319, 354, 247, 350, 161, + 281, 305, 303, 303, 289, 289, 289, 291, 291, 292, + 292, 293, 293, 293, 293, 294, 294, 295, 296, 297, + 298, 299, 300, 305, 303, 331, 341, 265, 341, 342, + 341, 249, 339, 268, 372, 340, 246, 354, 363, 364, + 247, 247, 275, 247, 268, 249, 264, 341, 250, 268, + 266, 155, 371, 305, 266, 247, 344, 353, 267, 356, + 265, 345, 348, 349, 303, 268, 341, 331, 266, 247, + 305, 348, 14, 20, 21, 268, 357, 358, 359, 360, + 341, 266, 344, 305, 264, 344, 357, 344, 268, 359, + 264 }; /* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ @@ -2427,9 +2423,9 @@ 323, 324, 324, 325, 325, 326, 326, 326, 327, 327, 327, 327, 327, 327, 327, 327, 327, 327, 327, 327, 327, 327, 327, 327, 327, 327, 328, 328, 328, 329, - 329, 329, 329, 329, 329, 329, 329, 330, 330, 330, - 330, 330, 331, 331, 331, 331, 332, 332, 333, 333, - 333, 334, 334, 334, 334, 334, 334, 334, 334, 334, + 329, 329, 329, 329, 329, 329, 329, 329, 330, 330, + 330, 330, 330, 331, 331, 331, 331, 332, 332, 333, + 333, 333, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, @@ -2440,17 +2436,17 @@ 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, 334, - 334, 334, 334, 334, 334, 335, 335, 335, 336, 336, - 337, 337, 338, 339, 339, 340, 340, 341, 341, 341, - 342, 342, 343, 344, 344, 345, 345, 345, 345, 345, - 345, 346, 347, 346, 348, 348, 349, 349, 350, 350, - 351, 351, 352, 353, 353, 354, 354, 355, 356, 356, - 357, 357, 358, 358, 359, 359, 360, 360, 361, 361, - 361, 362, 362, 363, 363, 364, 364, 365, 365, 365, - 365, 365, 366, 366, 366, 366, 367, 368, 368, 368, - 369, 369, 369, 370, 370, 371, 372, 373, 373, 373, - 374, 374, 375, 376, 376, 377, 377, 378, 378, 379, - 379, 380, 380, 380, 380 + 334, 334, 334, 334, 334, 334, 335, 335, 335, 336, + 336, 337, 337, 338, 339, 339, 340, 340, 341, 341, + 341, 342, 342, 343, 344, 344, 345, 345, 345, 345, + 345, 345, 346, 347, 346, 348, 348, 349, 349, 350, + 350, 351, 351, 352, 353, 353, 354, 354, 355, 356, + 356, 357, 357, 358, 358, 359, 359, 360, 360, 361, + 361, 361, 362, 362, 363, 363, 364, 364, 365, 365, + 365, 365, 365, 366, 366, 366, 366, 367, 368, 368, + 368, 369, 370, 370, 370, 370, 370, 371, 371, 371, + 372, 372, 373, 374, 374, 375, 375, 376, 376, 377, + 377, 378, 378, 378, 378 }; /* YYR2[YYN] -- Number of symbols on the right hand side of rule YYN. */ @@ -2475,7 +2471,7 @@ 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 2, 3, 3, 4, 1, 2, 1, 1, + 1, 1, 1, 2, 3, 3, 4, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, @@ -2487,15 +2483,15 @@ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 5, 4, - 1, 2, 3, 1, 3, 1, 2, 1, 3, 4, - 1, 3, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 2, 0, 4, 1, 1, 2, 3, 1, 2, - 1, 2, 5, 3, 1, 1, 4, 5, 2, 3, - 3, 2, 1, 2, 2, 2, 1, 2, 5, 7, - 6, 1, 1, 1, 0, 2, 3, 2, 2, 2, - 3, 2, 1, 1, 1, 1, 2, 1, 2, 2, - 7, 7, 7, 1, 1, 1, 1, 0, 1, 2, + 1, 1, 1, 1, 1, 1, 1, 1, 1, 5, + 4, 1, 2, 3, 1, 3, 1, 2, 1, 3, + 4, 1, 3, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 2, 0, 4, 1, 1, 2, 3, 1, + 2, 1, 2, 5, 3, 1, 1, 4, 5, 2, + 3, 3, 2, 1, 2, 2, 2, 1, 2, 5, + 7, 6, 1, 1, 1, 0, 2, 3, 2, 2, + 2, 3, 2, 1, 1, 1, 1, 2, 1, 2, + 2, 7, 1, 1, 1, 1, 2, 0, 1, 2, 1, 2, 3, 2, 3, 2, 3, 2, 3, 2, 3, 1, 1, 1, 1 }; @@ -3091,7 +3087,7 @@ yychar = YYEMPTY; /* Cause a token to be read. */ /* User initialization code. */ -#line 87 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1429 */ +#line 87 "./glsl/glsl_parser.yy" /* yacc.c:1429 */ { yylloc.first_line = 1; yylloc.first_column = 1; @@ -3100,7 +3096,7 @@ yylloc.source = 0; } -#line 3104 "glsl/glsl_parser.cpp" /* yacc.c:1429 */ +#line 3100 "glsl/glsl_parser.cpp" /* yacc.c:1429 */ yylsp[0] = yylloc; goto yysetstate; @@ -3287,15 +3283,15 @@ switch (yyn) { case 2: -#line 312 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 310 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { _mesa_glsl_initialize_types(state); } -#line 3295 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3291 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 3: -#line 316 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 314 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { delete state->symbols; state->symbols = new(ralloc_parent(state)) glsl_symbol_table; @@ -3313,33 +3309,33 @@ } _mesa_glsl_initialize_types(state); } -#line 3317 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3313 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 5: -#line 338 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 336 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { state->process_version_directive(&(yylsp[-1]), (yyvsp[-1].n), NULL); if (state->error) { YYERROR; } } -#line 3328 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3324 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 6: -#line 345 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 343 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { state->process_version_directive(&(yylsp[-2]), (yyvsp[-2].n), (yyvsp[-1].identifier)); if (state->error) { YYERROR; } } -#line 3339 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3335 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 11: -#line 359 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 357 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { /* Pragma invariant(all) cannot be used in a fragment shader. * @@ -3361,21 +3357,21 @@ state->all_invariant = true; } } -#line 3365 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3361 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 17: -#line 395 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 393 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { if (!_mesa_glsl_process_extension((yyvsp[-3].identifier), & (yylsp[-3]), (yyvsp[-1].identifier), & (yylsp[-1]), state)) { YYERROR; } } -#line 3375 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3371 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 18: -#line 404 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 402 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { /* FINISHME: The NULL test is required because pragmas are set to * FINISHME: NULL. (See production rule for external_declaration.) @@ -3383,11 +3379,11 @@ if ((yyvsp[0].node) != NULL) state->translation_unit.push_tail(& (yyvsp[0].node)->link); } -#line 3387 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3383 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 19: -#line 412 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 410 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { /* FINISHME: The NULL test is required because pragmas are set to * FINISHME: NULL. (See production rule for external_declaration.) @@ -3395,11 +3391,11 @@ if ((yyvsp[0].node) != NULL) state->translation_unit.push_tail(& (yyvsp[0].node)->link); } -#line 3399 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3395 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 20: -#line 419 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 417 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { if (!state->allow_extension_directive_midshader) { _mesa_glsl_error(& (yylsp[0]), state, @@ -3408,514 +3404,514 @@ YYERROR; } } -#line 3412 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3408 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 23: -#line 436 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 434 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression(ast_identifier, NULL, NULL, NULL); (yyval.expression)->set_location((yylsp[0])); (yyval.expression)->primary_expression.identifier = (yyvsp[0].identifier); } -#line 3423 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3419 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 24: -#line 443 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 441 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression(ast_int_constant, NULL, NULL, NULL); (yyval.expression)->set_location((yylsp[0])); (yyval.expression)->primary_expression.int_constant = (yyvsp[0].n); } -#line 3434 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3430 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 25: -#line 450 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 448 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression(ast_uint_constant, NULL, NULL, NULL); (yyval.expression)->set_location((yylsp[0])); (yyval.expression)->primary_expression.uint_constant = (yyvsp[0].n); } -#line 3445 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3441 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 26: -#line 457 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 455 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression(ast_float_constant, NULL, NULL, NULL); (yyval.expression)->set_location((yylsp[0])); (yyval.expression)->primary_expression.float_constant = (yyvsp[0].real); } -#line 3456 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3452 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 27: -#line 464 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 462 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression(ast_double_constant, NULL, NULL, NULL); (yyval.expression)->set_location((yylsp[0])); (yyval.expression)->primary_expression.double_constant = (yyvsp[0].dreal); } -#line 3467 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3463 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 28: -#line 471 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 469 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression(ast_bool_constant, NULL, NULL, NULL); (yyval.expression)->set_location((yylsp[0])); (yyval.expression)->primary_expression.bool_constant = (yyvsp[0].n); } -#line 3478 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3474 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 29: -#line 478 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 476 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.expression) = (yyvsp[-1].expression); } -#line 3486 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3482 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 31: -#line 486 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 484 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression(ast_array_index, (yyvsp[-3].expression), (yyvsp[-1].expression), NULL); (yyval.expression)->set_location_range((yylsp[-3]), (yylsp[0])); } -#line 3496 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3492 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 32: -#line 492 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 490 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.expression) = (yyvsp[0].expression); } -#line 3504 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3500 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 33: -#line 496 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 494 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression(ast_field_selection, (yyvsp[-2].expression), NULL, NULL); (yyval.expression)->set_location_range((yylsp[-2]), (yylsp[0])); (yyval.expression)->primary_expression.identifier = (yyvsp[0].identifier); } -#line 3515 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3511 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 34: -#line 503 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 501 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression(ast_post_inc, (yyvsp[-1].expression), NULL, NULL); (yyval.expression)->set_location_range((yylsp[-1]), (yylsp[0])); } -#line 3525 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3521 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 35: -#line 509 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 507 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression(ast_post_dec, (yyvsp[-1].expression), NULL, NULL); (yyval.expression)->set_location_range((yylsp[-1]), (yylsp[0])); } -#line 3535 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3531 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 43: -#line 540 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 538 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.expression) = (yyvsp[-1].expression); (yyval.expression)->set_location((yylsp[-1])); (yyval.expression)->expressions.push_tail(& (yyvsp[0].expression)->link); } -#line 3545 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3541 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 44: -#line 546 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 544 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.expression) = (yyvsp[-2].expression); (yyval.expression)->set_location((yylsp[-2])); (yyval.expression)->expressions.push_tail(& (yyvsp[0].expression)->link); } -#line 3555 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3551 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 46: -#line 562 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 560 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_function_expression((yyvsp[0].type_specifier)); (yyval.expression)->set_location((yylsp[0])); } -#line 3565 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3561 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 47: -#line 568 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 566 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_function_expression((yyvsp[0].expression)); (yyval.expression)->set_location((yylsp[0])); } -#line 3575 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3571 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 49: -#line 583 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 581 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression(ast_pre_inc, (yyvsp[0].expression), NULL, NULL); (yyval.expression)->set_location((yylsp[-1])); } -#line 3585 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3581 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 50: -#line 589 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 587 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression(ast_pre_dec, (yyvsp[0].expression), NULL, NULL); (yyval.expression)->set_location((yylsp[-1])); } -#line 3595 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3591 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 51: -#line 595 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 593 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression((yyvsp[-1].n), (yyvsp[0].expression), NULL, NULL); (yyval.expression)->set_location_range((yylsp[-1]), (yylsp[0])); } -#line 3605 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3601 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 52: -#line 604 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 602 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.n) = ast_plus; } -#line 3611 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3607 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 53: -#line 605 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 603 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.n) = ast_neg; } -#line 3617 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3613 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 54: -#line 606 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 604 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.n) = ast_logic_not; } -#line 3623 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3619 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 55: -#line 607 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 605 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.n) = ast_bit_not; } -#line 3629 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3625 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 57: -#line 613 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 611 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression_bin(ast_mul, (yyvsp[-2].expression), (yyvsp[0].expression)); (yyval.expression)->set_location_range((yylsp[-2]), (yylsp[0])); } -#line 3639 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3635 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 58: -#line 619 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 617 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression_bin(ast_div, (yyvsp[-2].expression), (yyvsp[0].expression)); (yyval.expression)->set_location_range((yylsp[-2]), (yylsp[0])); } -#line 3649 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3645 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 59: -#line 625 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 623 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression_bin(ast_mod, (yyvsp[-2].expression), (yyvsp[0].expression)); (yyval.expression)->set_location_range((yylsp[-2]), (yylsp[0])); } -#line 3659 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3655 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 61: -#line 635 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 633 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression_bin(ast_add, (yyvsp[-2].expression), (yyvsp[0].expression)); (yyval.expression)->set_location_range((yylsp[-2]), (yylsp[0])); } -#line 3669 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3665 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 62: -#line 641 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 639 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression_bin(ast_sub, (yyvsp[-2].expression), (yyvsp[0].expression)); (yyval.expression)->set_location_range((yylsp[-2]), (yylsp[0])); } -#line 3679 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3675 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 64: -#line 651 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 649 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression_bin(ast_lshift, (yyvsp[-2].expression), (yyvsp[0].expression)); (yyval.expression)->set_location_range((yylsp[-2]), (yylsp[0])); } -#line 3689 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3685 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 65: -#line 657 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 655 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression_bin(ast_rshift, (yyvsp[-2].expression), (yyvsp[0].expression)); (yyval.expression)->set_location_range((yylsp[-2]), (yylsp[0])); } -#line 3699 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3695 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 67: -#line 667 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 665 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression_bin(ast_less, (yyvsp[-2].expression), (yyvsp[0].expression)); (yyval.expression)->set_location_range((yylsp[-2]), (yylsp[0])); } -#line 3709 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3705 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 68: -#line 673 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 671 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression_bin(ast_greater, (yyvsp[-2].expression), (yyvsp[0].expression)); (yyval.expression)->set_location_range((yylsp[-2]), (yylsp[0])); } -#line 3719 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3715 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 69: -#line 679 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 677 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression_bin(ast_lequal, (yyvsp[-2].expression), (yyvsp[0].expression)); (yyval.expression)->set_location_range((yylsp[-2]), (yylsp[0])); } -#line 3729 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3725 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 70: -#line 685 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 683 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression_bin(ast_gequal, (yyvsp[-2].expression), (yyvsp[0].expression)); (yyval.expression)->set_location_range((yylsp[-2]), (yylsp[0])); } -#line 3739 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3735 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 72: -#line 695 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 693 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression_bin(ast_equal, (yyvsp[-2].expression), (yyvsp[0].expression)); (yyval.expression)->set_location_range((yylsp[-2]), (yylsp[0])); } -#line 3749 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3745 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 73: -#line 701 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 699 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression_bin(ast_nequal, (yyvsp[-2].expression), (yyvsp[0].expression)); (yyval.expression)->set_location_range((yylsp[-2]), (yylsp[0])); } -#line 3759 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3755 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 75: -#line 711 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 709 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression_bin(ast_bit_and, (yyvsp[-2].expression), (yyvsp[0].expression)); (yyval.expression)->set_location_range((yylsp[-2]), (yylsp[0])); } -#line 3769 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3765 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 77: -#line 721 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 719 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression_bin(ast_bit_xor, (yyvsp[-2].expression), (yyvsp[0].expression)); (yyval.expression)->set_location_range((yylsp[-2]), (yylsp[0])); } -#line 3779 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3775 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 79: -#line 731 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 729 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression_bin(ast_bit_or, (yyvsp[-2].expression), (yyvsp[0].expression)); (yyval.expression)->set_location_range((yylsp[-2]), (yylsp[0])); } -#line 3789 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3785 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 81: -#line 741 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 739 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression_bin(ast_logic_and, (yyvsp[-2].expression), (yyvsp[0].expression)); (yyval.expression)->set_location_range((yylsp[-2]), (yylsp[0])); } -#line 3799 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3795 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 83: -#line 751 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 749 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression_bin(ast_logic_xor, (yyvsp[-2].expression), (yyvsp[0].expression)); (yyval.expression)->set_location_range((yylsp[-2]), (yylsp[0])); } -#line 3809 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3805 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 85: -#line 761 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 759 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression_bin(ast_logic_or, (yyvsp[-2].expression), (yyvsp[0].expression)); (yyval.expression)->set_location_range((yylsp[-2]), (yylsp[0])); } -#line 3819 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3815 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 87: -#line 771 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 769 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression(ast_conditional, (yyvsp[-4].expression), (yyvsp[-2].expression), (yyvsp[0].expression)); (yyval.expression)->set_location_range((yylsp[-4]), (yylsp[0])); } -#line 3829 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3825 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 89: -#line 781 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 779 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_expression((yyvsp[-1].n), (yyvsp[-2].expression), (yyvsp[0].expression), NULL); (yyval.expression)->set_location_range((yylsp[-2]), (yylsp[0])); } -#line 3839 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3835 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 90: -#line 789 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 787 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.n) = ast_assign; } -#line 3845 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3841 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 91: -#line 790 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 788 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.n) = ast_mul_assign; } -#line 3851 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3847 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 92: -#line 791 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 789 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.n) = ast_div_assign; } -#line 3857 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3853 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 93: -#line 792 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 790 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.n) = ast_mod_assign; } -#line 3863 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3859 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 94: -#line 793 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 791 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.n) = ast_add_assign; } -#line 3869 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3865 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 95: -#line 794 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 792 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.n) = ast_sub_assign; } -#line 3875 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3871 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 96: -#line 795 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 793 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.n) = ast_ls_assign; } -#line 3881 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3877 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 97: -#line 796 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 794 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.n) = ast_rs_assign; } -#line 3887 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3883 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 98: -#line 797 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 795 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.n) = ast_and_assign; } -#line 3893 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3889 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 99: -#line 798 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 796 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.n) = ast_xor_assign; } -#line 3899 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3895 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 100: -#line 799 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 797 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.n) = ast_or_assign; } -#line 3905 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3901 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 101: -#line 804 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 802 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.expression) = (yyvsp[0].expression); } -#line 3913 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3909 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 102: -#line 808 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 806 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; if ((yyvsp[-2].expression)->oper != ast_sequence) { (yyval.expression) = new(ctx) ast_expression(ast_sequence, NULL, NULL, NULL); (yyval.expression)->set_location_range((yylsp[-2]), (yylsp[0])); @@ -3926,65 +3922,75 @@ (yyval.expression)->expressions.push_tail(& (yyvsp[0].expression)->link); } -#line 3930 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3926 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 104: -#line 828 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 826 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { state->symbols->pop_scope(); (yyval.node) = (yyvsp[-1].function); } -#line 3939 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3935 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 105: -#line 833 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 831 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.node) = (yyvsp[-1].declarator_list); } -#line 3947 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3943 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 106: -#line 837 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 835 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyvsp[-1].type_specifier)->default_precision = (yyvsp[-2].n); (yyval.node) = (yyvsp[-1].type_specifier); } -#line 3956 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3952 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 107: -#line 842 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 840 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { + ast_interface_block *block = (ast_interface_block *) (yyvsp[0].node); + if (block->layout.has_layout() || block->layout.has_memory()) { + if (!block->default_layout.merge_qualifier(& (yylsp[0]), state, block->layout, false)) { + YYERROR; + } + } + block->layout = block->default_layout; + if (!block->layout.push_to_global(& (yylsp[0]), state)) { + YYERROR; + } (yyval.node) = (yyvsp[0].node); } -#line 3964 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3970 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 111: -#line 858 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 866 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.function) = (yyvsp[-1].function); (yyval.function)->parameters.push_tail(& (yyvsp[0].parameter_declarator)->link); } -#line 3973 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3979 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 112: -#line 863 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 871 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.function) = (yyvsp[-2].function); (yyval.function)->parameters.push_tail(& (yyvsp[0].parameter_declarator)->link); } -#line 3982 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 3988 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 113: -#line 871 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 879 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.function) = new(ctx) ast_function(); (yyval.function)->set_location((yylsp[-1])); (yyval.function)->return_type = (yyvsp[-2].fully_specified_type); @@ -3997,13 +4003,13 @@ state->symbols->add_function(new(state) ir_function((yyvsp[-1].identifier))); state->symbols->push_scope(); } -#line 4001 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4007 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 114: -#line 889 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 897 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.parameter_declarator) = new(ctx) ast_parameter_declarator(); (yyval.parameter_declarator)->set_location_range((yylsp[-1]), (yylsp[0])); (yyval.parameter_declarator)->type = new(ctx) ast_fully_specified_type(); @@ -4012,13 +4018,13 @@ (yyval.parameter_declarator)->identifier = (yyvsp[0].identifier); state->symbols->add_variable(new(state) ir_variable(NULL, (yyvsp[0].identifier), ir_var_auto)); } -#line 4016 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4022 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 115: -#line 900 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 908 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.parameter_declarator) = new(ctx) ast_parameter_declarator(); (yyval.parameter_declarator)->set_location_range((yylsp[-2]), (yylsp[0])); (yyval.parameter_declarator)->type = new(ctx) ast_fully_specified_type(); @@ -4028,42 +4034,48 @@ (yyval.parameter_declarator)->array_specifier = (yyvsp[0].array_specifier); state->symbols->add_variable(new(state) ir_variable(NULL, (yyvsp[-1].identifier), ir_var_auto)); } -#line 4032 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4038 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 116: -#line 915 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 923 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.parameter_declarator) = (yyvsp[0].parameter_declarator); (yyval.parameter_declarator)->type->qualifier = (yyvsp[-1].type_qualifier); + if (!(yyval.parameter_declarator)->type->qualifier.push_to_global(& (yylsp[-1]), state)) { + YYERROR; + } } -#line 4041 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4050 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 117: -#line 920 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 931 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.parameter_declarator) = new(ctx) ast_parameter_declarator(); (yyval.parameter_declarator)->set_location((yylsp[0])); (yyval.parameter_declarator)->type = new(ctx) ast_fully_specified_type(); (yyval.parameter_declarator)->type->set_location_range((yylsp[-1]), (yylsp[0])); (yyval.parameter_declarator)->type->qualifier = (yyvsp[-1].type_qualifier); + if (!(yyval.parameter_declarator)->type->qualifier.push_to_global(& (yylsp[-1]), state)) { + YYERROR; + } (yyval.parameter_declarator)->type->specifier = (yyvsp[0].type_specifier); } -#line 4055 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4067 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 118: -#line 933 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 947 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); } -#line 4063 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4075 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 119: -#line 937 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 951 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { if ((yyvsp[0].type_qualifier).flags.q.constant) _mesa_glsl_error(&(yylsp[-1]), state, "duplicate const qualifier"); @@ -4071,11 +4083,11 @@ (yyval.type_qualifier) = (yyvsp[0].type_qualifier); (yyval.type_qualifier).flags.q.constant = 1; } -#line 4075 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4087 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 120: -#line 945 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 959 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { if ((yyvsp[0].type_qualifier).flags.q.precise) _mesa_glsl_error(&(yylsp[-1]), state, "duplicate precise qualifier"); @@ -4083,11 +4095,11 @@ (yyval.type_qualifier) = (yyvsp[0].type_qualifier); (yyval.type_qualifier).flags.q.precise = 1; } -#line 4087 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4099 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 121: -#line 953 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 967 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { if (((yyvsp[-1].type_qualifier).flags.q.in || (yyvsp[-1].type_qualifier).flags.q.out) && ((yyvsp[0].type_qualifier).flags.q.in || (yyvsp[0].type_qualifier).flags.q.out)) _mesa_glsl_error(&(yylsp[-1]), state, "duplicate in/out/inout qualifier"); @@ -4099,11 +4111,11 @@ (yyval.type_qualifier) = (yyvsp[-1].type_qualifier); (yyval.type_qualifier).merge_qualifier(&(yylsp[-1]), state, (yyvsp[0].type_qualifier), false); } -#line 4103 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4115 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 122: -#line 965 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 979 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { if ((yyvsp[0].type_qualifier).precision != ast_precision_none) _mesa_glsl_error(&(yylsp[-1]), state, "duplicate precision qualifier"); @@ -4115,50 +4127,50 @@ (yyval.type_qualifier) = (yyvsp[0].type_qualifier); (yyval.type_qualifier).precision = (yyvsp[-1].n); } -#line 4119 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4131 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 123: -#line 977 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 991 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.type_qualifier) = (yyvsp[-1].type_qualifier); (yyval.type_qualifier).merge_qualifier(&(yylsp[-1]), state, (yyvsp[0].type_qualifier), false); } -#line 4128 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4140 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 124: -#line 984 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 998 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); (yyval.type_qualifier).flags.q.in = 1; } -#line 4137 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4149 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 125: -#line 989 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1003 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); (yyval.type_qualifier).flags.q.out = 1; } -#line 4146 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4158 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 126: -#line 994 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1008 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); (yyval.type_qualifier).flags.q.in = 1; (yyval.type_qualifier).flags.q.out = 1; } -#line 4156 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4168 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 129: -#line 1008 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1022 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; ast_declaration *decl = new(ctx) ast_declaration((yyvsp[0].identifier), NULL, NULL); decl->set_location((yylsp[0])); @@ -4166,13 +4178,13 @@ (yyval.declarator_list)->declarations.push_tail(&decl->link); state->symbols->add_variable(new(state) ir_variable(NULL, (yyvsp[0].identifier), ir_var_auto)); } -#line 4170 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4182 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 130: -#line 1018 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1032 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; ast_declaration *decl = new(ctx) ast_declaration((yyvsp[-1].identifier), (yyvsp[0].array_specifier), NULL); decl->set_location_range((yylsp[-1]), (yylsp[0])); @@ -4180,13 +4192,13 @@ (yyval.declarator_list)->declarations.push_tail(&decl->link); state->symbols->add_variable(new(state) ir_variable(NULL, (yyvsp[-1].identifier), ir_var_auto)); } -#line 4184 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4196 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 131: -#line 1028 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1042 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; ast_declaration *decl = new(ctx) ast_declaration((yyvsp[-3].identifier), (yyvsp[-2].array_specifier), (yyvsp[0].expression)); decl->set_location_range((yylsp[-3]), (yylsp[-2])); @@ -4194,13 +4206,13 @@ (yyval.declarator_list)->declarations.push_tail(&decl->link); state->symbols->add_variable(new(state) ir_variable(NULL, (yyvsp[-3].identifier), ir_var_auto)); } -#line 4198 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4210 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 132: -#line 1038 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1052 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; ast_declaration *decl = new(ctx) ast_declaration((yyvsp[-2].identifier), NULL, (yyvsp[0].expression)); decl->set_location((yylsp[-2])); @@ -4208,24 +4220,24 @@ (yyval.declarator_list)->declarations.push_tail(&decl->link); state->symbols->add_variable(new(state) ir_variable(NULL, (yyvsp[-2].identifier), ir_var_auto)); } -#line 4212 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4224 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 133: -#line 1052 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1066 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; /* Empty declaration list is valid. */ (yyval.declarator_list) = new(ctx) ast_declarator_list((yyvsp[0].fully_specified_type)); (yyval.declarator_list)->set_location((yylsp[0])); } -#line 4223 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4235 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 134: -#line 1059 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1073 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; ast_declaration *decl = new(ctx) ast_declaration((yyvsp[0].identifier), NULL, NULL); decl->set_location((yylsp[0])); @@ -4234,13 +4246,13 @@ (yyval.declarator_list)->declarations.push_tail(&decl->link); state->symbols->add_variable(new(state) ir_variable(NULL, (yyvsp[0].identifier), ir_var_auto)); } -#line 4238 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4250 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 135: -#line 1070 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1084 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; ast_declaration *decl = new(ctx) ast_declaration((yyvsp[-1].identifier), (yyvsp[0].array_specifier), NULL); decl->set_location_range((yylsp[-1]), (yylsp[0])); @@ -4249,13 +4261,13 @@ (yyval.declarator_list)->declarations.push_tail(&decl->link); state->symbols->add_variable(new(state) ir_variable(NULL, (yyvsp[-1].identifier), ir_var_auto)); } -#line 4253 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4265 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 136: -#line 1081 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1095 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; ast_declaration *decl = new(ctx) ast_declaration((yyvsp[-3].identifier), (yyvsp[-2].array_specifier), (yyvsp[0].expression)); decl->set_location_range((yylsp[-3]), (yylsp[-2])); @@ -4264,13 +4276,13 @@ (yyval.declarator_list)->declarations.push_tail(&decl->link); state->symbols->add_variable(new(state) ir_variable(NULL, (yyvsp[-3].identifier), ir_var_auto)); } -#line 4268 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4280 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 137: -#line 1092 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1106 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; ast_declaration *decl = new(ctx) ast_declaration((yyvsp[-2].identifier), NULL, (yyvsp[0].expression)); decl->set_location((yylsp[-2])); @@ -4279,13 +4291,13 @@ (yyval.declarator_list)->declarations.push_tail(&decl->link); state->symbols->add_variable(new(state) ir_variable(NULL, (yyvsp[-2].identifier), ir_var_auto)); } -#line 4283 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4295 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 138: -#line 1103 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1117 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; ast_declaration *decl = new(ctx) ast_declaration((yyvsp[0].identifier), NULL, NULL); decl->set_location((yylsp[0])); @@ -4295,13 +4307,13 @@ (yyval.declarator_list)->declarations.push_tail(&decl->link); } -#line 4299 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4311 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 139: -#line 1115 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1129 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; ast_declaration *decl = new(ctx) ast_declaration((yyvsp[0].identifier), NULL, NULL); decl->set_location((yylsp[0])); @@ -4311,57 +4323,60 @@ (yyval.declarator_list)->declarations.push_tail(&decl->link); } -#line 4315 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4327 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 140: -#line 1130 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1144 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.fully_specified_type) = new(ctx) ast_fully_specified_type(); (yyval.fully_specified_type)->set_location((yylsp[0])); (yyval.fully_specified_type)->specifier = (yyvsp[0].type_specifier); } -#line 4326 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4338 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 141: -#line 1137 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1151 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.fully_specified_type) = new(ctx) ast_fully_specified_type(); (yyval.fully_specified_type)->set_location_range((yylsp[-1]), (yylsp[0])); (yyval.fully_specified_type)->qualifier = (yyvsp[-1].type_qualifier); + if (!(yyval.fully_specified_type)->qualifier.push_to_global(& (yylsp[-1]), state)) { + YYERROR; + } (yyval.fully_specified_type)->specifier = (yyvsp[0].type_specifier); if ((yyval.fully_specified_type)->specifier->structure != NULL && (yyval.fully_specified_type)->specifier->structure->is_declaration) { (yyval.fully_specified_type)->specifier->structure->layout = &(yyval.fully_specified_type)->qualifier; } } -#line 4342 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4357 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 142: -#line 1152 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1169 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.type_qualifier) = (yyvsp[-1].type_qualifier); } -#line 4350 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4365 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 144: -#line 1160 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1177 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.type_qualifier) = (yyvsp[-2].type_qualifier); if (!(yyval.type_qualifier).merge_qualifier(& (yylsp[0]), state, (yyvsp[0].type_qualifier), true)) { YYERROR; } } -#line 4361 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4376 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 145: -#line 1170 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1187 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); @@ -4471,7 +4486,8 @@ } } - if ((yyval.type_qualifier).flags.i && !state->has_geometry_shader()) { + if ((yyval.type_qualifier).flags.i && !state->has_geometry_shader() && + !state->has_tessellation_shader()) { _mesa_glsl_error(& (yylsp[0]), state, "#version 150 layout " "qualifier `%s' used", (yyvsp[0].identifier)); } @@ -4492,51 +4508,55 @@ unsigned required_glsl; /** Minimum GLSL ES version required for the image format. */ unsigned required_essl; + /* NV_image_formats */ + bool nv_image_formats; } map[] = { - { "rgba32f", GL_RGBA32F, GLSL_TYPE_FLOAT, 130, 310 }, - { "rgba16f", GL_RGBA16F, GLSL_TYPE_FLOAT, 130, 310 }, - { "rg32f", GL_RG32F, GLSL_TYPE_FLOAT, 130, 0 }, - { "rg16f", GL_RG16F, GLSL_TYPE_FLOAT, 130, 0 }, - { "r11f_g11f_b10f", GL_R11F_G11F_B10F, GLSL_TYPE_FLOAT, 130, 0 }, - { "r32f", GL_R32F, GLSL_TYPE_FLOAT, 130, 310 }, - { "r16f", GL_R16F, GLSL_TYPE_FLOAT, 130, 0 }, - { "rgba32ui", GL_RGBA32UI, GLSL_TYPE_UINT, 130, 310 }, - { "rgba16ui", GL_RGBA16UI, GLSL_TYPE_UINT, 130, 310 }, - { "rgb10_a2ui", GL_RGB10_A2UI, GLSL_TYPE_UINT, 130, 0 }, - { "rgba8ui", GL_RGBA8UI, GLSL_TYPE_UINT, 130, 310 }, - { "rg32ui", GL_RG32UI, GLSL_TYPE_UINT, 130, 0 }, - { "rg16ui", GL_RG16UI, GLSL_TYPE_UINT, 130, 0 }, - { "rg8ui", GL_RG8UI, GLSL_TYPE_UINT, 130, 0 }, - { "r32ui", GL_R32UI, GLSL_TYPE_UINT, 130, 310 }, - { "r16ui", GL_R16UI, GLSL_TYPE_UINT, 130, 0 }, - { "r8ui", GL_R8UI, GLSL_TYPE_UINT, 130, 0 }, - { "rgba32i", GL_RGBA32I, GLSL_TYPE_INT, 130, 310 }, - { "rgba16i", GL_RGBA16I, GLSL_TYPE_INT, 130, 310 }, - { "rgba8i", GL_RGBA8I, GLSL_TYPE_INT, 130, 310 }, - { "rg32i", GL_RG32I, GLSL_TYPE_INT, 130, 0 }, - { "rg16i", GL_RG16I, GLSL_TYPE_INT, 130, 0 }, - { "rg8i", GL_RG8I, GLSL_TYPE_INT, 130, 0 }, - { "r32i", GL_R32I, GLSL_TYPE_INT, 130, 310 }, - { "r16i", GL_R16I, GLSL_TYPE_INT, 130, 0 }, - { "r8i", GL_R8I, GLSL_TYPE_INT, 130, 0 }, - { "rgba16", GL_RGBA16, GLSL_TYPE_FLOAT, 130, 0 }, - { "rgb10_a2", GL_RGB10_A2, GLSL_TYPE_FLOAT, 130, 0 }, - { "rgba8", GL_RGBA8, GLSL_TYPE_FLOAT, 130, 310 }, - { "rg16", GL_RG16, GLSL_TYPE_FLOAT, 130, 0 }, - { "rg8", GL_RG8, GLSL_TYPE_FLOAT, 130, 0 }, - { "r16", GL_R16, GLSL_TYPE_FLOAT, 130, 0 }, - { "r8", GL_R8, GLSL_TYPE_FLOAT, 130, 0 }, - { "rgba16_snorm", GL_RGBA16_SNORM, GLSL_TYPE_FLOAT, 130, 0 }, - { "rgba8_snorm", GL_RGBA8_SNORM, GLSL_TYPE_FLOAT, 130, 310 }, - { "rg16_snorm", GL_RG16_SNORM, GLSL_TYPE_FLOAT, 130, 0 }, - { "rg8_snorm", GL_RG8_SNORM, GLSL_TYPE_FLOAT, 130, 0 }, - { "r16_snorm", GL_R16_SNORM, GLSL_TYPE_FLOAT, 130, 0 }, - { "r8_snorm", GL_R8_SNORM, GLSL_TYPE_FLOAT, 130, 0 } + { "rgba32f", GL_RGBA32F, GLSL_TYPE_FLOAT, 130, 310, false }, + { "rgba16f", GL_RGBA16F, GLSL_TYPE_FLOAT, 130, 310, false }, + { "rg32f", GL_RG32F, GLSL_TYPE_FLOAT, 130, 0, true }, + { "rg16f", GL_RG16F, GLSL_TYPE_FLOAT, 130, 0, true }, + { "r11f_g11f_b10f", GL_R11F_G11F_B10F, GLSL_TYPE_FLOAT, 130, 0, true }, + { "r32f", GL_R32F, GLSL_TYPE_FLOAT, 130, 310, false }, + { "r16f", GL_R16F, GLSL_TYPE_FLOAT, 130, 0, true }, + { "rgba32ui", GL_RGBA32UI, GLSL_TYPE_UINT, 130, 310, false }, + { "rgba16ui", GL_RGBA16UI, GLSL_TYPE_UINT, 130, 310, false }, + { "rgb10_a2ui", GL_RGB10_A2UI, GLSL_TYPE_UINT, 130, 0, true }, + { "rgba8ui", GL_RGBA8UI, GLSL_TYPE_UINT, 130, 310, false }, + { "rg32ui", GL_RG32UI, GLSL_TYPE_UINT, 130, 0, true }, + { "rg16ui", GL_RG16UI, GLSL_TYPE_UINT, 130, 0, true }, + { "rg8ui", GL_RG8UI, GLSL_TYPE_UINT, 130, 0, true }, + { "r32ui", GL_R32UI, GLSL_TYPE_UINT, 130, 310, false }, + { "r16ui", GL_R16UI, GLSL_TYPE_UINT, 130, 0, true }, + { "r8ui", GL_R8UI, GLSL_TYPE_UINT, 130, 0, true }, + { "rgba32i", GL_RGBA32I, GLSL_TYPE_INT, 130, 310, false }, + { "rgba16i", GL_RGBA16I, GLSL_TYPE_INT, 130, 310, false }, + { "rgba8i", GL_RGBA8I, GLSL_TYPE_INT, 130, 310, false }, + { "rg32i", GL_RG32I, GLSL_TYPE_INT, 130, 0, true }, + { "rg16i", GL_RG16I, GLSL_TYPE_INT, 130, 0, true }, + { "rg8i", GL_RG8I, GLSL_TYPE_INT, 130, 0, true }, + { "r32i", GL_R32I, GLSL_TYPE_INT, 130, 310, false }, + { "r16i", GL_R16I, GLSL_TYPE_INT, 130, 0, true }, + { "r8i", GL_R8I, GLSL_TYPE_INT, 130, 0, true }, + { "rgba16", GL_RGBA16, GLSL_TYPE_FLOAT, 130, 0, false }, + { "rgb10_a2", GL_RGB10_A2, GLSL_TYPE_FLOAT, 130, 0, true }, + { "rgba8", GL_RGBA8, GLSL_TYPE_FLOAT, 130, 310, false }, + { "rg16", GL_RG16, GLSL_TYPE_FLOAT, 130, 0, false }, + { "rg8", GL_RG8, GLSL_TYPE_FLOAT, 130, 0, true }, + { "r16", GL_R16, GLSL_TYPE_FLOAT, 130, 0, false }, + { "r8", GL_R8, GLSL_TYPE_FLOAT, 130, 0, true }, + { "rgba16_snorm", GL_RGBA16_SNORM, GLSL_TYPE_FLOAT, 130, 0, false }, + { "rgba8_snorm", GL_RGBA8_SNORM, GLSL_TYPE_FLOAT, 130, 310, false }, + { "rg16_snorm", GL_RG16_SNORM, GLSL_TYPE_FLOAT, 130, 0, false }, + { "rg8_snorm", GL_RG8_SNORM, GLSL_TYPE_FLOAT, 130, 0, true }, + { "r16_snorm", GL_R16_SNORM, GLSL_TYPE_FLOAT, 130, 0, false }, + { "r8_snorm", GL_R8_SNORM, GLSL_TYPE_FLOAT, 130, 0, true } }; for (unsigned i = 0; i < ARRAY_SIZE(map); i++) { - if (state->is_version(map[i].required_glsl, - map[i].required_essl) && + if ((state->is_version(map[i].required_glsl, + map[i].required_essl) || + (state->NV_image_formats_enable && + map[i].nv_image_formats)) && match_layout_qualifier((yyvsp[0].identifier), map[i].name, state) == 0) { (yyval.type_qualifier).flags.q.explicit_image_format = 1; (yyval.type_qualifier).image_format = map[i].format; @@ -4545,9 +4565,10 @@ } } } + } - if (!(yyval.type_qualifier).flags.i && - match_layout_qualifier((yyvsp[0].identifier), "early_fragment_tests", state) == 0) { + if (!(yyval.type_qualifier).flags.i) { + if (match_layout_qualifier((yyvsp[0].identifier), "early_fragment_tests", state) == 0) { /* From section 4.4.1.3 of the GLSL 4.50 specification * (Fragment Shader Inputs): * @@ -4559,17 +4580,58 @@ */ if (state->stage != MESA_SHADER_FRAGMENT) { _mesa_glsl_error(& (yylsp[0]), state, - "early_fragment_tests layout qualifier only " + "early_fragment_tests layout qualifier only " + "valid in fragment shaders"); + } + + (yyval.type_qualifier).flags.q.early_fragment_tests = 1; + } + + if (match_layout_qualifier((yyvsp[0].identifier), "inner_coverage", state) == 0) { + if (state->stage != MESA_SHADER_FRAGMENT) { + _mesa_glsl_error(& (yylsp[0]), state, + "inner_coverage layout qualifier only " + "valid in fragment shaders"); + } + + if (state->INTEL_conservative_rasterization_enable) { + (yyval.type_qualifier).flags.q.inner_coverage = 1; + } else { + _mesa_glsl_error(& (yylsp[0]), state, + "inner_coverage layout qualifier present, " + "but the INTEL_conservative_rasterization extension " + "is not enabled."); + } + } + + if (match_layout_qualifier((yyvsp[0].identifier), "post_depth_coverage", state) == 0) { + if (state->stage != MESA_SHADER_FRAGMENT) { + _mesa_glsl_error(& (yylsp[0]), state, + "post_depth_coverage layout qualifier only " "valid in fragment shaders"); } - (yyval.type_qualifier).flags.q.early_fragment_tests = 1; + if (state->ARB_post_depth_coverage_enable || + state->INTEL_conservative_rasterization_enable) { + (yyval.type_qualifier).flags.q.post_depth_coverage = 1; + } else { + _mesa_glsl_error(& (yylsp[0]), state, + "post_depth_coverage layout qualifier present, " + "but the GL_ARB_post_depth_coverage extension " + "is not enabled."); + } + } + + if ((yyval.type_qualifier).flags.q.post_depth_coverage && (yyval.type_qualifier).flags.q.inner_coverage) { + _mesa_glsl_error(& (yylsp[0]), state, + "post_depth_coverage & inner_coverage layout qualifiers " + "are mutually exclusive"); } } /* Layout qualifiers for tessellation evaluation shaders. */ if (!(yyval.type_qualifier).flags.i) { - struct { + static const struct { const char *s; GLenum e; } map[] = { @@ -4585,22 +4647,20 @@ } } - if ((yyval.type_qualifier).flags.i && - !state->ARB_tessellation_shader_enable && - !state->is_version(400, 0)) { + if ((yyval.type_qualifier).flags.i && !state->has_tessellation_shader()) { _mesa_glsl_error(& (yylsp[0]), state, "primitive mode qualifier `%s' requires " "GLSL 4.00 or ARB_tessellation_shader", (yyvsp[0].identifier)); } } if (!(yyval.type_qualifier).flags.i) { - struct { + static const struct { const char *s; - GLenum e; + enum gl_tess_spacing e; } map[] = { - { "equal_spacing", GL_EQUAL }, - { "fractional_odd_spacing", GL_FRACTIONAL_ODD }, - { "fractional_even_spacing", GL_FRACTIONAL_EVEN }, + { "equal_spacing", TESS_SPACING_EQUAL }, + { "fractional_odd_spacing", TESS_SPACING_FRACTIONAL_ODD }, + { "fractional_even_spacing", TESS_SPACING_FRACTIONAL_EVEN }, }; for (unsigned i = 0; i < ARRAY_SIZE(map); i++) { if (match_layout_qualifier((yyvsp[0].identifier), map[i].s, state) == 0) { @@ -4610,9 +4670,7 @@ } } - if ((yyval.type_qualifier).flags.i && - !state->ARB_tessellation_shader_enable && - !state->is_version(400, 0)) { + if ((yyval.type_qualifier).flags.i && !state->has_tessellation_shader()) { _mesa_glsl_error(& (yylsp[0]), state, "vertex spacing qualifier `%s' requires " "GLSL 4.00 or ARB_tessellation_shader", (yyvsp[0].identifier)); @@ -4627,9 +4685,7 @@ (yyval.type_qualifier).ordering = GL_CCW; } - if ((yyval.type_qualifier).flags.i && - !state->ARB_tessellation_shader_enable && - !state->is_version(400, 0)) { + if ((yyval.type_qualifier).flags.i && !state->has_tessellation_shader()) { _mesa_glsl_error(& (yylsp[0]), state, "ordering qualifier `%s' requires " "GLSL 4.00 or ARB_tessellation_shader", (yyvsp[0].identifier)); @@ -4641,9 +4697,7 @@ (yyval.type_qualifier).point_mode = true; } - if ((yyval.type_qualifier).flags.i && - !state->ARB_tessellation_shader_enable && - !state->is_version(400, 0)) { + if ((yyval.type_qualifier).flags.i && !state->has_tessellation_shader()) { _mesa_glsl_error(& (yylsp[0]), state, "qualifier `point_mode' requires " "GLSL 4.00 or ARB_tessellation_shader"); @@ -4651,19 +4705,77 @@ } if (!(yyval.type_qualifier).flags.i) { + static const struct { + const char *s; + uint32_t mask; + } map[] = { + { "blend_support_multiply", BLEND_MULTIPLY }, + { "blend_support_screen", BLEND_SCREEN }, + { "blend_support_overlay", BLEND_OVERLAY }, + { "blend_support_darken", BLEND_DARKEN }, + { "blend_support_lighten", BLEND_LIGHTEN }, + { "blend_support_colordodge", BLEND_COLORDODGE }, + { "blend_support_colorburn", BLEND_COLORBURN }, + { "blend_support_hardlight", BLEND_HARDLIGHT }, + { "blend_support_softlight", BLEND_SOFTLIGHT }, + { "blend_support_difference", BLEND_DIFFERENCE }, + { "blend_support_exclusion", BLEND_EXCLUSION }, + { "blend_support_hsl_hue", BLEND_HSL_HUE }, + { "blend_support_hsl_saturation", BLEND_HSL_SATURATION }, + { "blend_support_hsl_color", BLEND_HSL_COLOR }, + { "blend_support_hsl_luminosity", BLEND_HSL_LUMINOSITY }, + { "blend_support_all_equations", BLEND_ALL }, + }; + for (unsigned i = 0; i < ARRAY_SIZE(map); i++) { + if (match_layout_qualifier((yyvsp[0].identifier), map[i].s, state) == 0) { + (yyval.type_qualifier).flags.q.blend_support = 1; + state->fs_blend_support |= map[i].mask; + break; + } + } + + if ((yyval.type_qualifier).flags.i && + !state->KHR_blend_equation_advanced_enable && + !state->is_version(0, 320)) { + _mesa_glsl_error(& (yylsp[0]), state, + "advanced blending layout qualifiers require " + "ESSL 3.20 or KHR_blend_equation_advanced"); + } + + if ((yyval.type_qualifier).flags.i && state->stage != MESA_SHADER_FRAGMENT) { + _mesa_glsl_error(& (yylsp[0]), state, + "advanced blending layout qualifiers only " + "valid in fragment shaders"); + } + } + + /* Layout qualifiers for ARB_compute_variable_group_size. */ + if (!(yyval.type_qualifier).flags.i) { + if (match_layout_qualifier((yyvsp[0].identifier), "local_size_variable", state) == 0) { + (yyval.type_qualifier).flags.q.local_size_variable = 1; + } + + if ((yyval.type_qualifier).flags.i && !state->ARB_compute_variable_group_size_enable) { + _mesa_glsl_error(& (yylsp[0]), state, + "qualifier `local_size_variable` requires " + "ARB_compute_variable_group_size"); + } + } + + if (!(yyval.type_qualifier).flags.i) { _mesa_glsl_error(& (yylsp[0]), state, "unrecognized layout identifier " "`%s'", (yyvsp[0].identifier)); YYERROR; } } -#line 4660 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4772 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 146: -#line 1465 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1579 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); - void *ctx = state; + void *ctx = state->linalloc; if ((yyvsp[0].expression)->oper != ast_int_constant && (yyvsp[0].expression)->oper != ast_uint_constant && @@ -4795,8 +4907,10 @@ if (match_layout_qualifier("invocations", (yyvsp[-2].identifier), state) == 0) { (yyval.type_qualifier).flags.q.invocations = 1; (yyval.type_qualifier).invocations = new(ctx) ast_layout_expression((yylsp[-2]), (yyvsp[0].expression)); - if (!state->is_version(400, 0) && - !state->ARB_gpu_shader5_enable) { + if (!state->is_version(400, 320) && + !state->ARB_gpu_shader5_enable && + !state->OES_geometry_shader_enable && + !state->EXT_geometry_shader_enable) { _mesa_glsl_error(& (yylsp[0]), state, "GL_ARB_gpu_shader5 invocations " "qualifier specified", (yyvsp[0].expression)); @@ -4807,8 +4921,7 @@ if (match_layout_qualifier("vertices", (yyvsp[-2].identifier), state) == 0) { (yyval.type_qualifier).flags.q.vertices = 1; (yyval.type_qualifier).vertices = new(ctx) ast_layout_expression((yylsp[-2]), (yyvsp[0].expression)); - if (!state->ARB_tessellation_shader_enable && - !state->is_version(400, 0)) { + if (!state->has_tessellation_shader()) { _mesa_glsl_error(& (yylsp[-2]), state, "vertices qualifier requires GLSL 4.00 or " "ARB_tessellation_shader"); @@ -4824,11 +4937,11 @@ YYERROR; } } -#line 4828 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4941 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 147: -#line 1629 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1744 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.type_qualifier) = (yyvsp[0].type_qualifier); /* Layout qualifiers for ARB_uniform_buffer_object. */ @@ -4842,137 +4955,137 @@ "layout qualifier `%s' is used", (yyvsp[0].type_qualifier)); } } -#line 4846 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4959 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 148: -#line 1655 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1770 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); (yyval.type_qualifier).flags.q.row_major = 1; } -#line 4855 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4968 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 149: -#line 1660 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1775 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); (yyval.type_qualifier).flags.q.packed = 1; } -#line 4864 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4977 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 150: -#line 1665 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1780 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); (yyval.type_qualifier).flags.q.shared = 1; } -#line 4873 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4986 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 151: -#line 1673 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1788 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); (yyval.type_qualifier).flags.q.subroutine = 1; } -#line 4882 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 4995 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 152: -#line 1678 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1793 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); (yyval.type_qualifier).flags.q.subroutine_def = 1; (yyval.type_qualifier).subroutine_list = (yyvsp[-1].subroutine_list); } -#line 4892 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5005 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 153: -#line 1687 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1802 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; ast_declaration *decl = new(ctx) ast_declaration((yyvsp[0].identifier), NULL, NULL); decl->set_location((yylsp[0])); (yyval.subroutine_list) = new(ctx) ast_subroutine_list(); (yyval.subroutine_list)->declarations.push_tail(&decl->link); } -#line 4905 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5018 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 154: -#line 1696 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1811 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; ast_declaration *decl = new(ctx) ast_declaration((yyvsp[0].identifier), NULL, NULL); decl->set_location((yylsp[0])); (yyval.subroutine_list) = (yyvsp[-2].subroutine_list); (yyval.subroutine_list)->declarations.push_tail(&decl->link); } -#line 4918 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5031 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 155: -#line 1708 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1823 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); (yyval.type_qualifier).flags.q.smooth = 1; } -#line 4927 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5040 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 156: -#line 1713 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1828 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); (yyval.type_qualifier).flags.q.flat = 1; } -#line 4936 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5049 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 157: -#line 1718 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1833 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); (yyval.type_qualifier).flags.q.noperspective = 1; } -#line 4945 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5058 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 158: -#line 1727 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1842 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); (yyval.type_qualifier).flags.q.invariant = 1; } -#line 4954 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5067 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 159: -#line 1732 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1847 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); (yyval.type_qualifier).flags.q.precise = 1; } -#line 4963 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5076 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 166: -#line 1743 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1858 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(&(yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); (yyval.type_qualifier).precision = (yyvsp[0].n); } -#line 4972 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5085 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 167: -#line 1761 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1876 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { if ((yyvsp[0].type_qualifier).flags.q.precise) _mesa_glsl_error(&(yylsp[-1]), state, "duplicate \"precise\" qualifier"); @@ -4980,11 +5093,11 @@ (yyval.type_qualifier) = (yyvsp[0].type_qualifier); (yyval.type_qualifier).flags.q.precise = 1; } -#line 4984 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5097 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 168: -#line 1769 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1884 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { if ((yyvsp[0].type_qualifier).flags.q.invariant) _mesa_glsl_error(&(yylsp[-1]), state, "duplicate \"invariant\" qualifier"); @@ -5009,11 +5122,11 @@ if (state->is_version(430, 300) && (yyval.type_qualifier).flags.q.in) _mesa_glsl_error(&(yylsp[-1]), state, "invariant qualifiers cannot be used with shader inputs"); } -#line 5013 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5126 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 169: -#line 1794 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1909 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { /* Section 4.3 of the GLSL 1.40 specification states: * "...qualified with one of these interpolation qualifiers" @@ -5037,11 +5150,11 @@ (yyval.type_qualifier) = (yyvsp[-1].type_qualifier); (yyval.type_qualifier).merge_qualifier(&(yylsp[-1]), state, (yyvsp[0].type_qualifier), false); } -#line 5041 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5154 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 170: -#line 1818 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1933 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { /* In the absence of ARB_shading_language_420pack, layout qualifiers may * appear no later than auxiliary storage qualifiers. There is no @@ -5052,26 +5165,23 @@ * precise qualifiers since these are useful in ARB_separate_shader_objects. * There is no clear spec guidance on this either. */ - if (!state->has_420pack_or_es31() && (yyvsp[0].type_qualifier).has_layout()) - _mesa_glsl_error(&(yylsp[-1]), state, "duplicate layout(...) qualifiers"); - (yyval.type_qualifier) = (yyvsp[-1].type_qualifier); - (yyval.type_qualifier).merge_qualifier(&(yylsp[-1]), state, (yyvsp[0].type_qualifier), false); + (yyval.type_qualifier).merge_qualifier(& (yylsp[-1]), state, (yyvsp[0].type_qualifier), false, (yyvsp[0].type_qualifier).has_layout()); } -#line 5062 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5172 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 171: -#line 1835 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1947 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.type_qualifier) = (yyvsp[-1].type_qualifier); (yyval.type_qualifier).merge_qualifier(&(yylsp[-1]), state, (yyvsp[0].type_qualifier), false); } -#line 5071 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5181 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 172: -#line 1840 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1952 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { if ((yyvsp[0].type_qualifier).has_auxiliary_storage()) { _mesa_glsl_error(&(yylsp[-1]), state, @@ -5087,11 +5197,11 @@ (yyval.type_qualifier) = (yyvsp[-1].type_qualifier); (yyval.type_qualifier).merge_qualifier(&(yylsp[-1]), state, (yyvsp[0].type_qualifier), false); } -#line 5091 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5201 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 173: -#line 1856 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1968 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { /* Section 4.3 of the GLSL 1.20 specification states: * "Variable declarations may have a storage qualifier specified..." @@ -5111,11 +5221,11 @@ (yyval.type_qualifier) = (yyvsp[-1].type_qualifier); (yyval.type_qualifier).merge_qualifier(&(yylsp[-1]), state, (yyvsp[0].type_qualifier), false); } -#line 5115 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5225 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 174: -#line 1876 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 1988 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { if ((yyvsp[0].type_qualifier).precision != ast_precision_none) _mesa_glsl_error(&(yylsp[-1]), state, "duplicate precision qualifier"); @@ -5127,83 +5237,83 @@ (yyval.type_qualifier) = (yyvsp[0].type_qualifier); (yyval.type_qualifier).precision = (yyvsp[-1].n); } -#line 5131 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5241 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 175: -#line 1888 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2000 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.type_qualifier) = (yyvsp[-1].type_qualifier); (yyval.type_qualifier).merge_qualifier(&(yylsp[-1]), state, (yyvsp[0].type_qualifier), false); } -#line 5140 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5250 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 176: -#line 1896 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2008 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); (yyval.type_qualifier).flags.q.centroid = 1; } -#line 5149 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5259 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 177: -#line 1901 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2013 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); (yyval.type_qualifier).flags.q.sample = 1; } -#line 5158 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5268 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 178: -#line 1906 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2018 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); (yyval.type_qualifier).flags.q.patch = 1; } -#line 5167 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5277 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 179: -#line 1913 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2025 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); (yyval.type_qualifier).flags.q.constant = 1; } -#line 5176 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5286 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 180: -#line 1918 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2030 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); (yyval.type_qualifier).flags.q.attribute = 1; } -#line 5185 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5295 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 181: -#line 1923 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2035 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); (yyval.type_qualifier).flags.q.varying = 1; } -#line 5194 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5304 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 182: -#line 1928 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2040 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); (yyval.type_qualifier).flags.q.in = 1; } -#line 5203 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5313 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 183: -#line 1933 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2045 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); (yyval.type_qualifier).flags.q.out = 1; @@ -5228,108 +5338,124 @@ (yyval.type_qualifier).xfb_buffer = state->out_qualifier->xfb_buffer; } } -#line 5232 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5342 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 184: -#line 1958 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2070 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); - (yyval.type_qualifier).flags.q.uniform = 1; + (yyval.type_qualifier).flags.q.in = 1; + (yyval.type_qualifier).flags.q.out = 1; + + if (!state->has_framebuffer_fetch() || + !state->is_version(130, 300) || + state->stage != MESA_SHADER_FRAGMENT) + _mesa_glsl_error(&(yylsp[0]), state, "A single interface variable cannot be " + "declared as both input and output"); } -#line 5241 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5358 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 185: -#line 1963 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2082 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); - (yyval.type_qualifier).flags.q.buffer = 1; + (yyval.type_qualifier).flags.q.uniform = 1; } -#line 5250 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5367 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 186: -#line 1968 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2087 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); - (yyval.type_qualifier).flags.q.shared_storage = 1; + (yyval.type_qualifier).flags.q.buffer = 1; } -#line 5259 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5376 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 187: -#line 1976 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2092 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); - (yyval.type_qualifier).flags.q.coherent = 1; + (yyval.type_qualifier).flags.q.shared_storage = 1; } -#line 5268 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5385 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 188: -#line 1981 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2100 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); - (yyval.type_qualifier).flags.q._volatile = 1; + (yyval.type_qualifier).flags.q.coherent = 1; } -#line 5277 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5394 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 189: -#line 1986 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2105 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { + memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); + (yyval.type_qualifier).flags.q._volatile = 1; + } +#line 5403 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ + break; + + case 190: +#line 2110 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { STATIC_ASSERT(sizeof((yyval.type_qualifier).flags.q) <= sizeof((yyval.type_qualifier).flags.i)); memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); (yyval.type_qualifier).flags.q.restrict_flag = 1; } -#line 5287 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5413 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 190: -#line 1992 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 191: +#line 2116 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); (yyval.type_qualifier).flags.q.read_only = 1; } -#line 5296 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5422 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 191: -#line 1997 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 192: +#line 2121 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); (yyval.type_qualifier).flags.q.write_only = 1; } -#line 5305 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5431 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 192: -#line 2005 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 193: +#line 2129 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.array_specifier) = new(ctx) ast_array_specifier((yylsp[-1]), new(ctx) ast_expression( ast_unsized_array_dim, NULL, NULL, NULL)); (yyval.array_specifier)->set_location_range((yylsp[-1]), (yylsp[0])); } -#line 5317 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5443 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 193: -#line 2013 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 194: +#line 2137 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.array_specifier) = new(ctx) ast_array_specifier((yylsp[-2]), (yyvsp[-1].expression)); (yyval.array_specifier)->set_location_range((yylsp[-2]), (yylsp[0])); } -#line 5327 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5453 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 194: -#line 2019 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 195: +#line 2143 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.array_specifier) = (yyvsp[-2].array_specifier); if (state->check_arrays_of_arrays_allowed(& (yylsp[-2]))) { @@ -5337,11 +5463,11 @@ NULL, NULL)); } } -#line 5341 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5467 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 195: -#line 2029 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 196: +#line 2153 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.array_specifier) = (yyvsp[-3].array_specifier); @@ -5349,802 +5475,802 @@ (yyval.array_specifier)->add_dimension((yyvsp[-1].expression)); } } -#line 5353 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5479 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 197: -#line 2041 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 198: +#line 2165 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.type_specifier) = (yyvsp[-1].type_specifier); (yyval.type_specifier)->array_specifier = (yyvsp[0].array_specifier); } -#line 5362 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5488 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 198: -#line 2049 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 199: +#line 2173 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.type_specifier) = new(ctx) ast_type_specifier((yyvsp[0].identifier)); (yyval.type_specifier)->set_location((yylsp[0])); } -#line 5372 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5498 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 199: -#line 2055 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 200: +#line 2179 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.type_specifier) = new(ctx) ast_type_specifier((yyvsp[0].struct_specifier)); (yyval.type_specifier)->set_location((yylsp[0])); } -#line 5382 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5508 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 200: -#line 2061 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 201: +#line 2185 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.type_specifier) = new(ctx) ast_type_specifier((yyvsp[0].identifier)); (yyval.type_specifier)->set_location((yylsp[0])); } -#line 5392 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ - break; - - case 201: -#line 2069 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "void"; } -#line 5398 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 5518 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 202: -#line 2070 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "float"; } -#line 5404 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2193 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "void"; } +#line 5524 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 203: -#line 2071 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "double"; } -#line 5410 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2194 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "float"; } +#line 5530 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 204: -#line 2072 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "int"; } -#line 5416 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2195 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "double"; } +#line 5536 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 205: -#line 2073 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "uint"; } -#line 5422 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2196 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "int"; } +#line 5542 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 206: -#line 2074 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "bool"; } -#line 5428 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2197 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "uint"; } +#line 5548 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 207: -#line 2075 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "vec2"; } -#line 5434 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2198 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "bool"; } +#line 5554 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 208: -#line 2076 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "vec3"; } -#line 5440 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2199 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "vec2"; } +#line 5560 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 209: -#line 2077 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "vec4"; } -#line 5446 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2200 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "vec3"; } +#line 5566 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 210: -#line 2078 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "bvec2"; } -#line 5452 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2201 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "vec4"; } +#line 5572 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 211: -#line 2079 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "bvec3"; } -#line 5458 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2202 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "bvec2"; } +#line 5578 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 212: -#line 2080 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "bvec4"; } -#line 5464 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2203 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "bvec3"; } +#line 5584 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 213: -#line 2081 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "ivec2"; } -#line 5470 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2204 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "bvec4"; } +#line 5590 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 214: -#line 2082 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "ivec3"; } -#line 5476 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2205 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "ivec2"; } +#line 5596 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 215: -#line 2083 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "ivec4"; } -#line 5482 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2206 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "ivec3"; } +#line 5602 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 216: -#line 2084 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "uvec2"; } -#line 5488 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2207 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "ivec4"; } +#line 5608 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 217: -#line 2085 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "uvec3"; } -#line 5494 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2208 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "uvec2"; } +#line 5614 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 218: -#line 2086 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "uvec4"; } -#line 5500 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2209 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "uvec3"; } +#line 5620 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 219: -#line 2087 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "dvec2"; } -#line 5506 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2210 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "uvec4"; } +#line 5626 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 220: -#line 2088 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "dvec3"; } -#line 5512 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2211 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "dvec2"; } +#line 5632 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 221: -#line 2089 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "dvec4"; } -#line 5518 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2212 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "dvec3"; } +#line 5638 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 222: -#line 2090 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "mat2"; } -#line 5524 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2213 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "dvec4"; } +#line 5644 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 223: -#line 2091 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "mat2x3"; } -#line 5530 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2214 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "mat2"; } +#line 5650 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 224: -#line 2092 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "mat2x4"; } -#line 5536 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2215 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "mat2x3"; } +#line 5656 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 225: -#line 2093 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "mat3x2"; } -#line 5542 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2216 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "mat2x4"; } +#line 5662 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 226: -#line 2094 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "mat3"; } -#line 5548 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2217 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "mat3x2"; } +#line 5668 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 227: -#line 2095 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "mat3x4"; } -#line 5554 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2218 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "mat3"; } +#line 5674 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 228: -#line 2096 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "mat4x2"; } -#line 5560 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2219 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "mat3x4"; } +#line 5680 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 229: -#line 2097 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "mat4x3"; } -#line 5566 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2220 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "mat4x2"; } +#line 5686 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 230: -#line 2098 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "mat4"; } -#line 5572 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2221 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "mat4x3"; } +#line 5692 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 231: -#line 2099 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "dmat2"; } -#line 5578 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2222 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "mat4"; } +#line 5698 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 232: -#line 2100 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "dmat2x3"; } -#line 5584 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2223 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "dmat2"; } +#line 5704 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 233: -#line 2101 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "dmat2x4"; } -#line 5590 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2224 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "dmat2x3"; } +#line 5710 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 234: -#line 2102 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "dmat3x2"; } -#line 5596 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2225 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "dmat2x4"; } +#line 5716 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 235: -#line 2103 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "dmat3"; } -#line 5602 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2226 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "dmat3x2"; } +#line 5722 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 236: -#line 2104 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "dmat3x4"; } -#line 5608 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2227 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "dmat3"; } +#line 5728 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 237: -#line 2105 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "dmat4x2"; } -#line 5614 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2228 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "dmat3x4"; } +#line 5734 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 238: -#line 2106 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "dmat4x3"; } -#line 5620 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2229 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "dmat4x2"; } +#line 5740 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 239: -#line 2107 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "dmat4"; } -#line 5626 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2230 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "dmat4x3"; } +#line 5746 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 240: -#line 2108 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "sampler1D"; } -#line 5632 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2231 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "dmat4"; } +#line 5752 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 241: -#line 2109 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "sampler2D"; } -#line 5638 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2232 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "sampler1D"; } +#line 5758 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 242: -#line 2110 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "sampler2DRect"; } -#line 5644 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2233 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "sampler2D"; } +#line 5764 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 243: -#line 2111 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "sampler3D"; } -#line 5650 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2234 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "sampler2DRect"; } +#line 5770 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 244: -#line 2112 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "samplerCube"; } -#line 5656 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2235 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "sampler3D"; } +#line 5776 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 245: -#line 2113 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "samplerExternalOES"; } -#line 5662 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2236 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "samplerCube"; } +#line 5782 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 246: -#line 2114 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "sampler1DShadow"; } -#line 5668 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2237 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "samplerExternalOES"; } +#line 5788 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 247: -#line 2115 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "sampler2DShadow"; } -#line 5674 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2238 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "sampler1DShadow"; } +#line 5794 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 248: -#line 2116 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "sampler2DRectShadow"; } -#line 5680 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2239 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "sampler2DShadow"; } +#line 5800 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 249: -#line 2117 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "samplerCubeShadow"; } -#line 5686 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2240 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "sampler2DRectShadow"; } +#line 5806 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 250: -#line 2118 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "sampler1DArray"; } -#line 5692 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2241 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "samplerCubeShadow"; } +#line 5812 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 251: -#line 2119 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "sampler2DArray"; } -#line 5698 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2242 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "sampler1DArray"; } +#line 5818 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 252: -#line 2120 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "sampler1DArrayShadow"; } -#line 5704 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2243 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "sampler2DArray"; } +#line 5824 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 253: -#line 2121 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "sampler2DArrayShadow"; } -#line 5710 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2244 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "sampler1DArrayShadow"; } +#line 5830 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 254: -#line 2122 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "samplerBuffer"; } -#line 5716 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2245 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "sampler2DArrayShadow"; } +#line 5836 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 255: -#line 2123 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "samplerCubeArray"; } -#line 5722 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2246 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "samplerBuffer"; } +#line 5842 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 256: -#line 2124 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "samplerCubeArrayShadow"; } -#line 5728 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2247 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "samplerCubeArray"; } +#line 5848 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 257: -#line 2125 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "isampler1D"; } -#line 5734 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2248 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "samplerCubeArrayShadow"; } +#line 5854 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 258: -#line 2126 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "isampler2D"; } -#line 5740 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2249 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "isampler1D"; } +#line 5860 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 259: -#line 2127 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "isampler2DRect"; } -#line 5746 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2250 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "isampler2D"; } +#line 5866 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 260: -#line 2128 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "isampler3D"; } -#line 5752 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2251 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "isampler2DRect"; } +#line 5872 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 261: -#line 2129 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "isamplerCube"; } -#line 5758 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2252 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "isampler3D"; } +#line 5878 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 262: -#line 2130 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "isampler1DArray"; } -#line 5764 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2253 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "isamplerCube"; } +#line 5884 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 263: -#line 2131 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "isampler2DArray"; } -#line 5770 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2254 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "isampler1DArray"; } +#line 5890 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 264: -#line 2132 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "isamplerBuffer"; } -#line 5776 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2255 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "isampler2DArray"; } +#line 5896 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 265: -#line 2133 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "isamplerCubeArray"; } -#line 5782 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2256 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "isamplerBuffer"; } +#line 5902 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 266: -#line 2134 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "usampler1D"; } -#line 5788 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2257 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "isamplerCubeArray"; } +#line 5908 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 267: -#line 2135 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "usampler2D"; } -#line 5794 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2258 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "usampler1D"; } +#line 5914 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 268: -#line 2136 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "usampler2DRect"; } -#line 5800 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2259 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "usampler2D"; } +#line 5920 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 269: -#line 2137 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "usampler3D"; } -#line 5806 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2260 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "usampler2DRect"; } +#line 5926 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 270: -#line 2138 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "usamplerCube"; } -#line 5812 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2261 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "usampler3D"; } +#line 5932 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 271: -#line 2139 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "usampler1DArray"; } -#line 5818 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2262 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "usamplerCube"; } +#line 5938 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 272: -#line 2140 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "usampler2DArray"; } -#line 5824 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2263 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "usampler1DArray"; } +#line 5944 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 273: -#line 2141 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "usamplerBuffer"; } -#line 5830 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2264 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "usampler2DArray"; } +#line 5950 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 274: -#line 2142 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "usamplerCubeArray"; } -#line 5836 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2265 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "usamplerBuffer"; } +#line 5956 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 275: -#line 2143 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "sampler2DMS"; } -#line 5842 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2266 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "usamplerCubeArray"; } +#line 5962 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 276: -#line 2144 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "isampler2DMS"; } -#line 5848 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2267 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "sampler2DMS"; } +#line 5968 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 277: -#line 2145 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "usampler2DMS"; } -#line 5854 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2268 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "isampler2DMS"; } +#line 5974 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 278: -#line 2146 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "sampler2DMSArray"; } -#line 5860 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2269 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "usampler2DMS"; } +#line 5980 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 279: -#line 2147 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "isampler2DMSArray"; } -#line 5866 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2270 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "sampler2DMSArray"; } +#line 5986 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 280: -#line 2148 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "usampler2DMSArray"; } -#line 5872 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2271 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "isampler2DMSArray"; } +#line 5992 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 281: -#line 2149 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "image1D"; } -#line 5878 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2272 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "usampler2DMSArray"; } +#line 5998 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 282: -#line 2150 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "image2D"; } -#line 5884 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2273 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "image1D"; } +#line 6004 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 283: -#line 2151 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "image3D"; } -#line 5890 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2274 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "image2D"; } +#line 6010 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 284: -#line 2152 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "image2DRect"; } -#line 5896 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2275 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "image3D"; } +#line 6016 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 285: -#line 2153 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "imageCube"; } -#line 5902 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2276 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "image2DRect"; } +#line 6022 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 286: -#line 2154 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "imageBuffer"; } -#line 5908 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2277 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "imageCube"; } +#line 6028 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 287: -#line 2155 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "image1DArray"; } -#line 5914 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2278 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "imageBuffer"; } +#line 6034 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 288: -#line 2156 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "image2DArray"; } -#line 5920 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2279 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "image1DArray"; } +#line 6040 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 289: -#line 2157 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "imageCubeArray"; } -#line 5926 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2280 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "image2DArray"; } +#line 6046 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 290: -#line 2158 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "image2DMS"; } -#line 5932 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2281 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "imageCubeArray"; } +#line 6052 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 291: -#line 2159 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "image2DMSArray"; } -#line 5938 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2282 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "image2DMS"; } +#line 6058 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 292: -#line 2160 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "iimage1D"; } -#line 5944 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2283 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "image2DMSArray"; } +#line 6064 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 293: -#line 2161 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "iimage2D"; } -#line 5950 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2284 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "iimage1D"; } +#line 6070 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 294: -#line 2162 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "iimage3D"; } -#line 5956 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2285 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "iimage2D"; } +#line 6076 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 295: -#line 2163 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "iimage2DRect"; } -#line 5962 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2286 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "iimage3D"; } +#line 6082 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 296: -#line 2164 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "iimageCube"; } -#line 5968 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2287 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "iimage2DRect"; } +#line 6088 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 297: -#line 2165 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "iimageBuffer"; } -#line 5974 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2288 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "iimageCube"; } +#line 6094 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 298: -#line 2166 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "iimage1DArray"; } -#line 5980 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2289 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "iimageBuffer"; } +#line 6100 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 299: -#line 2167 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "iimage2DArray"; } -#line 5986 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2290 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "iimage1DArray"; } +#line 6106 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 300: -#line 2168 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "iimageCubeArray"; } -#line 5992 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2291 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "iimage2DArray"; } +#line 6112 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 301: -#line 2169 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "iimage2DMS"; } -#line 5998 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2292 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "iimageCubeArray"; } +#line 6118 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 302: -#line 2170 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "iimage2DMSArray"; } -#line 6004 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2293 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "iimage2DMS"; } +#line 6124 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 303: -#line 2171 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "uimage1D"; } -#line 6010 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2294 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "iimage2DMSArray"; } +#line 6130 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 304: -#line 2172 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "uimage2D"; } -#line 6016 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2295 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "uimage1D"; } +#line 6136 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 305: -#line 2173 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "uimage3D"; } -#line 6022 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2296 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "uimage2D"; } +#line 6142 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 306: -#line 2174 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "uimage2DRect"; } -#line 6028 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2297 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "uimage3D"; } +#line 6148 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 307: -#line 2175 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "uimageCube"; } -#line 6034 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2298 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "uimage2DRect"; } +#line 6154 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 308: -#line 2176 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "uimageBuffer"; } -#line 6040 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2299 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "uimageCube"; } +#line 6160 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 309: -#line 2177 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "uimage1DArray"; } -#line 6046 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2300 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "uimageBuffer"; } +#line 6166 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 310: -#line 2178 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { (yyval.identifier) = "uimage2DArray"; } -#line 6052 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 2301 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "uimage1DArray"; } +#line 6172 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 311: -#line 2179 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2302 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { (yyval.identifier) = "uimage2DArray"; } +#line 6178 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ + break; + + case 312: +#line 2303 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.identifier) = "uimageCubeArray"; } -#line 6058 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6184 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 312: -#line 2180 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 313: +#line 2304 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.identifier) = "uimage2DMS"; } -#line 6064 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6190 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 313: -#line 2181 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 314: +#line 2305 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.identifier) = "uimage2DMSArray"; } -#line 6070 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6196 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 314: -#line 2182 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 315: +#line 2306 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.identifier) = "atomic_uint"; } -#line 6076 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6202 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 315: -#line 2187 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 316: +#line 2311 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { state->check_precision_qualifiers_allowed(&(yylsp[0])); (yyval.n) = ast_precision_high; } -#line 6085 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6211 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 316: -#line 2192 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 317: +#line 2316 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { state->check_precision_qualifiers_allowed(&(yylsp[0])); (yyval.n) = ast_precision_medium; } -#line 6094 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6220 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 317: -#line 2197 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 318: +#line 2321 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { state->check_precision_qualifiers_allowed(&(yylsp[0])); (yyval.n) = ast_precision_low; } -#line 6103 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6229 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 318: -#line 2205 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 319: +#line 2329 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; - (yyval.struct_specifier) = new(ctx) ast_struct_specifier((yyvsp[-3].identifier), (yyvsp[-1].declarator_list)); + void *ctx = state->linalloc; + (yyval.struct_specifier) = new(ctx) ast_struct_specifier(ctx, (yyvsp[-3].identifier), (yyvsp[-1].declarator_list)); (yyval.struct_specifier)->set_location_range((yylsp[-3]), (yylsp[0])); state->symbols->add_type((yyvsp[-3].identifier), glsl_type::void_type); } -#line 6114 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6240 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 319: -#line 2212 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 320: +#line 2336 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; - (yyval.struct_specifier) = new(ctx) ast_struct_specifier(NULL, (yyvsp[-1].declarator_list)); + void *ctx = state->linalloc; + (yyval.struct_specifier) = new(ctx) ast_struct_specifier(ctx, NULL, (yyvsp[-1].declarator_list)); (yyval.struct_specifier)->set_location_range((yylsp[-2]), (yylsp[0])); } -#line 6124 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6250 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 320: -#line 2221 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 321: +#line 2345 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.declarator_list) = (yyvsp[0].declarator_list); (yyvsp[0].declarator_list)->link.self_link(); } -#line 6133 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6259 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 321: -#line 2226 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 322: +#line 2350 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.declarator_list) = (yyvsp[-1].declarator_list); (yyval.declarator_list)->link.insert_before(& (yyvsp[0].declarator_list)->link); } -#line 6142 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6268 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 322: -#line 2234 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 323: +#line 2358 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; ast_fully_specified_type *const type = (yyvsp[-2].fully_specified_type); type->set_location((yylsp[-2])); @@ -6158,145 +6284,145 @@ (yyval.declarator_list)->declarations.push_degenerate_list_at_head(& (yyvsp[-1].declaration)->link); } -#line 6162 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6288 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 323: -#line 2253 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 324: +#line 2377 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.declaration) = (yyvsp[0].declaration); (yyvsp[0].declaration)->link.self_link(); } -#line 6171 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6297 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 324: -#line 2258 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 325: +#line 2382 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.declaration) = (yyvsp[-2].declaration); (yyval.declaration)->link.insert_before(& (yyvsp[0].declaration)->link); } -#line 6180 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6306 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 325: -#line 2266 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 326: +#line 2390 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.declaration) = new(ctx) ast_declaration((yyvsp[0].identifier), NULL, NULL); (yyval.declaration)->set_location((yylsp[0])); } -#line 6190 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6316 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 326: -#line 2272 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 327: +#line 2396 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.declaration) = new(ctx) ast_declaration((yyvsp[-1].identifier), (yyvsp[0].array_specifier), NULL); (yyval.declaration)->set_location_range((yylsp[-1]), (yylsp[0])); } -#line 6200 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6326 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 328: -#line 2282 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 329: +#line 2406 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.expression) = (yyvsp[-1].expression); } -#line 6208 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6334 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 329: -#line 2286 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 330: +#line 2410 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.expression) = (yyvsp[-2].expression); } -#line 6216 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6342 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 330: -#line 2293 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 331: +#line 2417 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.expression) = new(ctx) ast_aggregate_initializer(); (yyval.expression)->set_location((yylsp[0])); (yyval.expression)->expressions.push_tail(& (yyvsp[0].expression)->link); } -#line 6227 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6353 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 331: -#line 2300 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 332: +#line 2424 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyvsp[-2].expression)->expressions.push_tail(& (yyvsp[0].expression)->link); } -#line 6235 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6361 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 333: -#line 2312 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 334: +#line 2436 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.node) = (ast_node *) (yyvsp[0].compound_statement); } -#line 6241 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6367 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 341: -#line 2327 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 342: +#line 2451 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.compound_statement) = new(ctx) ast_compound_statement(true, NULL); (yyval.compound_statement)->set_location_range((yylsp[-1]), (yylsp[0])); } -#line 6251 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6377 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 342: -#line 2333 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 343: +#line 2457 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { state->symbols->push_scope(); } -#line 6259 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6385 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 343: -#line 2337 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 344: +#line 2461 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.compound_statement) = new(ctx) ast_compound_statement(true, (yyvsp[-1].node)); (yyval.compound_statement)->set_location_range((yylsp[-3]), (yylsp[0])); state->symbols->pop_scope(); } -#line 6270 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6396 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 344: -#line 2346 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 345: +#line 2470 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.node) = (ast_node *) (yyvsp[0].compound_statement); } -#line 6276 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6402 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 346: -#line 2352 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 347: +#line 2476 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.compound_statement) = new(ctx) ast_compound_statement(false, NULL); (yyval.compound_statement)->set_location_range((yylsp[-1]), (yylsp[0])); } -#line 6286 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6412 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 347: -#line 2358 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 348: +#line 2482 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.compound_statement) = new(ctx) ast_compound_statement(false, (yyvsp[-1].node)); (yyval.compound_statement)->set_location_range((yylsp[-2]), (yylsp[0])); } -#line 6296 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6422 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 348: -#line 2367 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 349: +#line 2491 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { if ((yyvsp[0].node) == NULL) { _mesa_glsl_error(& (yylsp[0]), state, " statement"); @@ -6306,11 +6432,11 @@ (yyval.node) = (yyvsp[0].node); (yyval.node)->link.self_link(); } -#line 6310 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6436 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 349: -#line 2377 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 350: +#line 2501 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { if ((yyvsp[0].node) == NULL) { _mesa_glsl_error(& (yylsp[0]), state, " statement"); @@ -6319,69 +6445,69 @@ (yyval.node) = (yyvsp[-1].node); (yyval.node)->link.insert_before(& (yyvsp[0].node)->link); } -#line 6323 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6449 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 350: -#line 2389 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 351: +#line 2513 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.node) = new(ctx) ast_expression_statement(NULL); (yyval.node)->set_location((yylsp[0])); } -#line 6333 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6459 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 351: -#line 2395 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 352: +#line 2519 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.node) = new(ctx) ast_expression_statement((yyvsp[-1].expression)); (yyval.node)->set_location((yylsp[-1])); } -#line 6343 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6469 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 352: -#line 2404 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 353: +#line 2528 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - (yyval.node) = new(state) ast_selection_statement((yyvsp[-2].expression), (yyvsp[0].selection_rest_statement).then_statement, - (yyvsp[0].selection_rest_statement).else_statement); + (yyval.node) = new(state->linalloc) ast_selection_statement((yyvsp[-2].expression), (yyvsp[0].selection_rest_statement).then_statement, + (yyvsp[0].selection_rest_statement).else_statement); (yyval.node)->set_location_range((yylsp[-4]), (yylsp[0])); } -#line 6353 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6479 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 353: -#line 2413 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 354: +#line 2537 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.selection_rest_statement).then_statement = (yyvsp[-2].node); (yyval.selection_rest_statement).else_statement = (yyvsp[0].node); } -#line 6362 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6488 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 354: -#line 2418 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 355: +#line 2542 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.selection_rest_statement).then_statement = (yyvsp[0].node); (yyval.selection_rest_statement).else_statement = NULL; } -#line 6371 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6497 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 355: -#line 2426 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 356: +#line 2550 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.node) = (ast_node *) (yyvsp[0].expression); } -#line 6379 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6505 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 356: -#line 2430 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 357: +#line 2554 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; ast_declaration *decl = new(ctx) ast_declaration((yyvsp[-2].identifier), NULL, (yyvsp[0].expression)); ast_declarator_list *declarator = new(ctx) ast_declarator_list((yyvsp[-3].fully_specified_type)); decl->set_location_range((yylsp[-2]), (yylsp[0])); @@ -6390,254 +6516,254 @@ declarator->declarations.push_tail(&decl->link); (yyval.node) = declarator; } -#line 6394 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6520 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 357: -#line 2448 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 358: +#line 2572 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - (yyval.node) = new(state) ast_switch_statement((yyvsp[-2].expression), (yyvsp[0].switch_body)); + (yyval.node) = new(state->linalloc) ast_switch_statement((yyvsp[-2].expression), (yyvsp[0].switch_body)); (yyval.node)->set_location_range((yylsp[-4]), (yylsp[0])); } -#line 6403 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6529 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 358: -#line 2456 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 359: +#line 2580 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - (yyval.switch_body) = new(state) ast_switch_body(NULL); + (yyval.switch_body) = new(state->linalloc) ast_switch_body(NULL); (yyval.switch_body)->set_location_range((yylsp[-1]), (yylsp[0])); } -#line 6412 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6538 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 359: -#line 2461 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 360: +#line 2585 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - (yyval.switch_body) = new(state) ast_switch_body((yyvsp[-1].case_statement_list)); + (yyval.switch_body) = new(state->linalloc) ast_switch_body((yyvsp[-1].case_statement_list)); (yyval.switch_body)->set_location_range((yylsp[-2]), (yylsp[0])); } -#line 6421 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6547 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 360: -#line 2469 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 361: +#line 2593 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - (yyval.case_label) = new(state) ast_case_label((yyvsp[-1].expression)); + (yyval.case_label) = new(state->linalloc) ast_case_label((yyvsp[-1].expression)); (yyval.case_label)->set_location((yylsp[-1])); } -#line 6430 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6556 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 361: -#line 2474 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 362: +#line 2598 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - (yyval.case_label) = new(state) ast_case_label(NULL); + (yyval.case_label) = new(state->linalloc) ast_case_label(NULL); (yyval.case_label)->set_location((yylsp[0])); } -#line 6439 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6565 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 362: -#line 2482 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 363: +#line 2606 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - ast_case_label_list *labels = new(state) ast_case_label_list(); + ast_case_label_list *labels = new(state->linalloc) ast_case_label_list(); labels->labels.push_tail(& (yyvsp[0].case_label)->link); (yyval.case_label_list) = labels; (yyval.case_label_list)->set_location((yylsp[0])); } -#line 6451 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6577 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 363: -#line 2490 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 364: +#line 2614 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.case_label_list) = (yyvsp[-1].case_label_list); (yyval.case_label_list)->labels.push_tail(& (yyvsp[0].case_label)->link); } -#line 6460 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6586 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 364: -#line 2498 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 365: +#line 2622 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - ast_case_statement *stmts = new(state) ast_case_statement((yyvsp[-1].case_label_list)); + ast_case_statement *stmts = new(state->linalloc) ast_case_statement((yyvsp[-1].case_label_list)); stmts->set_location((yylsp[0])); stmts->stmts.push_tail(& (yyvsp[0].node)->link); (yyval.case_statement) = stmts; } -#line 6472 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6598 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 365: -#line 2506 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 366: +#line 2630 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.case_statement) = (yyvsp[-1].case_statement); (yyval.case_statement)->stmts.push_tail(& (yyvsp[0].node)->link); } -#line 6481 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6607 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 366: -#line 2514 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 367: +#line 2638 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - ast_case_statement_list *cases= new(state) ast_case_statement_list(); + ast_case_statement_list *cases= new(state->linalloc) ast_case_statement_list(); cases->set_location((yylsp[0])); cases->cases.push_tail(& (yyvsp[0].case_statement)->link); (yyval.case_statement_list) = cases; } -#line 6493 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6619 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 367: -#line 2522 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 368: +#line 2646 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.case_statement_list) = (yyvsp[-1].case_statement_list); (yyval.case_statement_list)->cases.push_tail(& (yyvsp[0].case_statement)->link); } -#line 6502 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6628 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 368: -#line 2530 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 369: +#line 2654 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.node) = new(ctx) ast_iteration_statement(ast_iteration_statement::ast_while, NULL, (yyvsp[-2].node), NULL, (yyvsp[0].node)); (yyval.node)->set_location_range((yylsp[-4]), (yylsp[-1])); } -#line 6513 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6639 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 369: -#line 2537 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 370: +#line 2661 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.node) = new(ctx) ast_iteration_statement(ast_iteration_statement::ast_do_while, NULL, (yyvsp[-2].expression), NULL, (yyvsp[-5].node)); (yyval.node)->set_location_range((yylsp[-6]), (yylsp[-1])); } -#line 6524 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6650 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 370: -#line 2544 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 371: +#line 2668 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.node) = new(ctx) ast_iteration_statement(ast_iteration_statement::ast_for, (yyvsp[-3].node), (yyvsp[-2].for_rest_statement).cond, (yyvsp[-2].for_rest_statement).rest, (yyvsp[0].node)); (yyval.node)->set_location_range((yylsp[-5]), (yylsp[0])); } -#line 6535 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6661 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 374: -#line 2560 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 375: +#line 2684 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.node) = NULL; } -#line 6543 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6669 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 375: -#line 2567 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 376: +#line 2691 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.for_rest_statement).cond = (yyvsp[-1].node); (yyval.for_rest_statement).rest = NULL; } -#line 6552 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6678 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 376: -#line 2572 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 377: +#line 2696 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.for_rest_statement).cond = (yyvsp[-2].node); (yyval.for_rest_statement).rest = (yyvsp[0].expression); } -#line 6561 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6687 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 377: -#line 2581 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 378: +#line 2705 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.node) = new(ctx) ast_jump_statement(ast_jump_statement::ast_continue, NULL); (yyval.node)->set_location((yylsp[-1])); } -#line 6571 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6697 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 378: -#line 2587 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 379: +#line 2711 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.node) = new(ctx) ast_jump_statement(ast_jump_statement::ast_break, NULL); (yyval.node)->set_location((yylsp[-1])); } -#line 6581 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6707 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 379: -#line 2593 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 380: +#line 2717 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.node) = new(ctx) ast_jump_statement(ast_jump_statement::ast_return, NULL); (yyval.node)->set_location((yylsp[-1])); } -#line 6591 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6717 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 380: -#line 2599 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 381: +#line 2723 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.node) = new(ctx) ast_jump_statement(ast_jump_statement::ast_return, (yyvsp[-1].expression)); (yyval.node)->set_location_range((yylsp[-2]), (yylsp[-1])); } -#line 6601 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6727 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 381: -#line 2605 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 382: +#line 2729 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.node) = new(ctx) ast_jump_statement(ast_jump_statement::ast_discard, NULL); (yyval.node)->set_location((yylsp[-1])); } -#line 6611 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6737 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 382: -#line 2613 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 383: +#line 2737 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.node) = (yyvsp[0].function_definition); } -#line 6617 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6743 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 383: -#line 2614 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 384: +#line 2738 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.node) = (yyvsp[0].node); } -#line 6623 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6749 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 384: -#line 2615 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 385: +#line 2739 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.node) = NULL; } -#line 6629 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6755 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 385: -#line 2616 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 386: +#line 2740 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.node) = (yyvsp[0].node); } -#line 6635 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6761 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 386: -#line 2621 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 387: +#line 2745 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; (yyval.function_definition) = new(ctx) ast_function_definition(); (yyval.function_definition)->set_location_range((yylsp[-1]), (yylsp[0])); (yyval.function_definition)->prototype = (yyvsp[-1].function); @@ -6645,78 +6771,63 @@ state->symbols->pop_scope(); } -#line 6649 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6775 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 387: -#line 2635 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 388: +#line 2759 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.node) = (yyvsp[0].interface_block); } -#line 6657 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6783 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 388: -#line 2639 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 389: +#line 2763 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { ast_interface_block *block = (ast_interface_block *) (yyvsp[0].node); - if (!state->has_420pack_or_es31() && block->layout.has_layout() && - !block->layout.is_default_qualifier) { - _mesa_glsl_error(&(yylsp[-1]), state, "duplicate layout(...) qualifiers"); - YYERROR; - } - - if (!block->layout.merge_qualifier(& (yylsp[-1]), state, (yyvsp[-1].type_qualifier), false)) { + if (!(yyvsp[-1].type_qualifier).merge_qualifier(& (yylsp[-1]), state, block->layout, false, + block->layout.has_layout())) { YYERROR; } - block->layout.is_default_qualifier = false; + block->layout = (yyvsp[-1].type_qualifier); (yyval.node) = block; } -#line 6679 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6800 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 389: -#line 2657 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 390: +#line 2776 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { ast_interface_block *block = (ast_interface_block *)(yyvsp[0].node); - if (!block->layout.flags.q.buffer) { + if (!block->default_layout.flags.q.buffer) { _mesa_glsl_error(& (yylsp[-1]), state, "memory qualifiers can only be used in the " "declaration of shader storage blocks"); } - if (!block->layout.merge_qualifier(& (yylsp[-1]), state, (yyvsp[-1].type_qualifier), false)) { + if (!(yyvsp[-1].type_qualifier).merge_qualifier(& (yylsp[-1]), state, block->layout, false)) { YYERROR; } + block->layout = (yyvsp[-1].type_qualifier); (yyval.node) = block; } -#line 6697 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ - break; - - case 390: -#line 2674 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ - { - ast_interface_block *const block = (yyvsp[-1].interface_block); - - block->block_name = (yyvsp[-5].identifier); - block->declarations.push_degenerate_list_at_head(& (yyvsp[-3].declarator_list)->link); - - _mesa_ast_process_interface_block(& (yylsp[-6]), state, block, (yyvsp[-6].type_qualifier)); - - (yyval.interface_block) = block; - } -#line 6712 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6819 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 391: -#line 2685 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2794 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { ast_interface_block *const block = (yyvsp[-1].interface_block); - block->layout = *state->default_uniform_qualifier; + if ((yyvsp[-6].type_qualifier).flags.q.uniform) { + block->default_layout = *state->default_uniform_qualifier; + } else if ((yyvsp[-6].type_qualifier).flags.q.buffer) { + block->default_layout = *state->default_shader_storage_qualifier; + } block->block_name = (yyvsp[-5].identifier); block->declarations.push_degenerate_list_at_head(& (yyvsp[-3].declarator_list)->link); @@ -6724,109 +6835,108 @@ (yyval.interface_block) = block; } -#line 6728 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6839 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 392: -#line 2697 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2813 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - ast_interface_block *const block = (yyvsp[-1].interface_block); - - block->layout = *state->default_shader_storage_qualifier; - block->block_name = (yyvsp[-5].identifier); - block->declarations.push_degenerate_list_at_head(& (yyvsp[-3].declarator_list)->link); - - _mesa_ast_process_interface_block(& (yylsp[-6]), state, block, (yyvsp[-6].type_qualifier)); - - (yyval.interface_block) = block; + memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); + (yyval.type_qualifier).flags.q.in = 1; } -#line 6744 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6848 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 393: -#line 2712 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2818 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); - (yyval.type_qualifier).flags.q.in = 1; + (yyval.type_qualifier).flags.q.out = 1; } -#line 6753 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6857 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 394: -#line 2717 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2823 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); - (yyval.type_qualifier).flags.q.out = 1; + (yyval.type_qualifier).flags.q.uniform = 1; } -#line 6762 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6866 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 395: -#line 2725 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2828 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); - (yyval.type_qualifier).flags.q.uniform = 1; + (yyval.type_qualifier).flags.q.buffer = 1; } -#line 6771 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6875 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 396: -#line 2733 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2833 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - memset(& (yyval.type_qualifier), 0, sizeof((yyval.type_qualifier))); - (yyval.type_qualifier).flags.q.buffer = 1; + if (!(yyvsp[-1].type_qualifier).flags.q.patch) { + _mesa_glsl_error(&(yylsp[-1]), state, "invalid interface qualifier"); + } + if ((yyvsp[0].type_qualifier).has_auxiliary_storage()) { + _mesa_glsl_error(&(yylsp[-1]), state, "duplicate patch qualifier"); + } + (yyval.type_qualifier) = (yyvsp[0].type_qualifier); + (yyval.type_qualifier).flags.q.patch = 1; } -#line 6780 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6890 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 397: -#line 2741 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2847 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - (yyval.interface_block) = new(state) ast_interface_block(NULL, NULL); + (yyval.interface_block) = new(state->linalloc) ast_interface_block(NULL, NULL); } -#line 6788 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6898 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 398: -#line 2745 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2851 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - (yyval.interface_block) = new(state) ast_interface_block((yyvsp[0].identifier), NULL); + (yyval.interface_block) = new(state->linalloc) ast_interface_block((yyvsp[0].identifier), NULL); (yyval.interface_block)->set_location((yylsp[0])); } -#line 6797 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6907 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 399: -#line 2750 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2856 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - (yyval.interface_block) = new(state) ast_interface_block((yyvsp[-1].identifier), (yyvsp[0].array_specifier)); + (yyval.interface_block) = new(state->linalloc) ast_interface_block((yyvsp[-1].identifier), (yyvsp[0].array_specifier)); (yyval.interface_block)->set_location_range((yylsp[-1]), (yylsp[0])); } -#line 6806 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6916 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 400: -#line 2758 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2864 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.declarator_list) = (yyvsp[0].declarator_list); (yyvsp[0].declarator_list)->link.self_link(); } -#line 6815 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6925 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 401: -#line 2763 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2869 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.declarator_list) = (yyvsp[-1].declarator_list); (yyvsp[0].declarator_list)->link.insert_before(& (yyval.declarator_list)->link); } -#line 6824 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6934 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 402: -#line 2771 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2877 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - void *ctx = state; + void *ctx = state->linalloc; ast_fully_specified_type *type = (yyvsp[-2].fully_specified_type); type->set_location((yylsp[-2])); @@ -6845,139 +6955,151 @@ (yyval.declarator_list)->declarations.push_degenerate_list_at_head(& (yyvsp[-1].declaration)->link); } -#line 6849 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6959 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; case 403: -#line 2795 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ +#line 2901 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - (yyval.node) = NULL; - if (!state->has_420pack_or_es31()) { - _mesa_glsl_error(&(yylsp[-1]), state, "duplicate layout(...) qualifiers"); + (yyval.type_qualifier) = (yyvsp[-1].type_qualifier); + if (!(yyval.type_qualifier).merge_qualifier(& (yylsp[-1]), state, (yyvsp[0].type_qualifier), false, true)) { YYERROR; - } else { - if (!state->default_uniform_qualifier-> - merge_qualifier(& (yylsp[-1]), state, (yyvsp[-1].type_qualifier), false)) { - YYERROR; - } } } -#line 6866 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6970 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 404: -#line 2808 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 405: +#line 2912 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - if (!state->default_uniform_qualifier-> - merge_qualifier(& (yylsp[-2]), state, (yyvsp[-2].type_qualifier), false)) { + (yyval.type_qualifier) = (yyvsp[-1].type_qualifier); + if (!(yyval.type_qualifier).merge_qualifier(& (yylsp[-1]), state, (yyvsp[0].type_qualifier), false, true)) { YYERROR; } - (yyval.node) = NULL; } -#line 6878 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6981 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 405: -#line 2819 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 407: +#line 2923 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - (yyval.node) = NULL; - if (!state->has_420pack_or_es31()) { - _mesa_glsl_error(&(yylsp[-1]), state, "duplicate layout(...) qualifiers"); + (yyval.type_qualifier) = (yyvsp[-1].type_qualifier); + if (!(yyval.type_qualifier).merge_qualifier(& (yylsp[-1]), state, (yyvsp[0].type_qualifier), false, true)) { + YYERROR; + } + if (!(yyval.type_qualifier).validate_in_qualifier(& (yylsp[-1]), state)) { YYERROR; - } else { - if (!state->default_shader_storage_qualifier-> - merge_qualifier(& (yylsp[-1]), state, (yyvsp[-1].type_qualifier), false)) { - YYERROR; - } } } -#line 6895 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 6995 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 406: -#line 2832 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 408: +#line 2933 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { - if (!state->default_shader_storage_qualifier-> - merge_qualifier(& (yylsp[-2]), state, (yyvsp[-2].type_qualifier), false)) { + if (!(yyvsp[-2].type_qualifier).validate_in_qualifier(& (yylsp[-2]), state)) { YYERROR; } + } +#line 7005 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ + break; - /* From the GLSL 4.50 spec, section 4.4.5: - * - * "It is a compile-time error to specify the binding identifier for - * the global scope or for block member declarations." - */ - if (state->default_shader_storage_qualifier->flags.q.explicit_binding) { - _mesa_glsl_error(& (yylsp[-2]), state, - "binding qualifier cannot be set for default layout"); + case 409: +#line 2942 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { + (yyval.type_qualifier) = (yyvsp[-1].type_qualifier); + if (!(yyval.type_qualifier).merge_qualifier(& (yylsp[-1]), state, (yyvsp[0].type_qualifier), false, true)) { + YYERROR; + } + if (!(yyval.type_qualifier).validate_out_qualifier(& (yylsp[-1]), state)) { + YYERROR; } + } +#line 7019 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ + break; - (yyval.node) = NULL; + case 410: +#line 2952 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ + { + if (!(yyvsp[-2].type_qualifier).validate_out_qualifier(& (yylsp[-2]), state)) { + YYERROR; + } } -#line 6918 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 7029 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 407: -#line 2854 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 411: +#line 2961 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.node) = NULL; - if (!state->has_420pack_or_es31()) { - _mesa_glsl_error(&(yylsp[-1]), state, "duplicate layout(...) qualifiers"); + if (!state->default_uniform_qualifier-> + merge_qualifier(& (yylsp[0]), state, (yyvsp[0].type_qualifier), false)) { + YYERROR; + } + if (!state->default_uniform_qualifier-> + push_to_global(& (yylsp[0]), state)) { YYERROR; - } else { - if (!state->in_qualifier-> - merge_in_qualifier(& (yylsp[-1]), state, (yyvsp[-1].type_qualifier), (yyval.node), false)) { - YYERROR; - } - (yyval.node) = (yyvsp[0].node); } } -#line 6936 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 7045 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 408: -#line 2868 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 412: +#line 2973 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.node) = NULL; - if (!state->in_qualifier-> - merge_in_qualifier(& (yylsp[-2]), state, (yyvsp[-2].type_qualifier), (yyval.node), true)) { + if (!state->default_shader_storage_qualifier-> + merge_qualifier(& (yylsp[0]), state, (yyvsp[0].type_qualifier), false)) { YYERROR; } + if (!state->default_shader_storage_qualifier-> + push_to_global(& (yylsp[0]), state)) { + YYERROR; + } + + /* From the GLSL 4.50 spec, section 4.4.5: + * + * "It is a compile-time error to specify the binding identifier for + * the global scope or for block member declarations." + */ + if (state->default_shader_storage_qualifier->flags.q.explicit_binding) { + _mesa_glsl_error(& (yylsp[0]), state, + "binding qualifier cannot be set for default layout"); + } } -#line 6948 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 7071 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 409: -#line 2879 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 413: +#line 2995 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.node) = NULL; - if (!state->has_420pack_or_es31()) { - _mesa_glsl_error(&(yylsp[-1]), state, "duplicate layout(...) qualifiers"); + if (!(yyvsp[0].type_qualifier).merge_into_in_qualifier(& (yylsp[0]), state, (yyval.node))) { + YYERROR; + } + if (!state->in_qualifier->push_to_global(& (yylsp[0]), state)) { YYERROR; - } else { - if (!state->out_qualifier-> - merge_out_qualifier(& (yylsp[-1]), state, (yyvsp[-1].type_qualifier), (yyval.node), false)) { - YYERROR; - } - (yyval.node) = (yyvsp[0].node); } } -#line 6966 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 7085 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; - case 410: -#line 2893 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1646 */ + case 414: +#line 3005 "./glsl/glsl_parser.yy" /* yacc.c:1646 */ { (yyval.node) = NULL; - if (!state->out_qualifier-> - merge_out_qualifier(& (yylsp[-2]), state, (yyvsp[-2].type_qualifier), (yyval.node), true)) + if (!(yyvsp[0].type_qualifier).merge_into_out_qualifier(& (yylsp[0]), state, (yyval.node))) { YYERROR; + } + if (!state->out_qualifier->push_to_global(& (yylsp[0]), state)) { + YYERROR; + } } -#line 6977 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 7099 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ break; -#line 6981 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ +#line 7103 "glsl/glsl_parser.cpp" /* yacc.c:1646 */ default: break; } /* User semantic actions sometimes alter yychar, and that requires diff -Nru mesa-12.0.6/src/compiler/glsl/glsl_parser_extras.cpp mesa-17.0.7/src/compiler/glsl/glsl_parser_extras.cpp --- mesa-12.0.6/src/compiler/glsl/glsl_parser_extras.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/glsl_parser_extras.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -28,6 +28,7 @@ #include "main/core.h" /* for struct gl_context */ #include "main/context.h" #include "main/debug_output.h" +#include "main/formats.h" #include "main/shaderobj.h" #include "util/u_atomic.h" /* for p_atomic_cmpxchg */ #include "util/ralloc.h" @@ -50,6 +51,8 @@ static const unsigned known_desktop_glsl_versions[] = { 110, 120, 130, 140, 150, 330, 400, 410, 420, 430, 440, 450 }; +static const unsigned known_desktop_gl_versions[] = + { 20, 21, 30, 31, 32, 33, 40, 41, 42, 43, 44, 45 }; _mesa_glsl_parse_state::_mesa_glsl_parse_state(struct gl_context *_ctx, @@ -65,6 +68,8 @@ this->translation_unit.make_empty(); this->symbols = new(mem_ctx) glsl_symbol_table; + this->linalloc = linear_alloc_parent(this, 0); + this->info_log = ralloc_strdup(mem_ctx, ""); this->error = false; this->loop_nesting_ast = NULL; @@ -75,6 +80,7 @@ this->language_version = 110; this->forced_language_version = ctx->Const.ForceGLSLVersion; this->zero_init = ctx->Const.GLSLZeroInit; + this->gl_version = 20; this->es_shader = false; this->ARB_texture_rectangle_enable = true; @@ -195,9 +201,9 @@ this->subroutine_types = NULL; /* supported_versions should be large enough to support the known desktop - * GLSL versions plus 3 GLES versions (ES 1.00, ES 3.00, and ES 3.10)) + * GLSL versions plus 4 GLES versions (ES 1.00, ES 3.00, ES 3.10, ES 3.20) */ - STATIC_ASSERT((ARRAY_SIZE(known_desktop_glsl_versions) + 3) == + STATIC_ASSERT((ARRAY_SIZE(known_desktop_glsl_versions) + 4) == ARRAY_SIZE(this->supported_versions)); /* Populate the list of supported GLSL versions */ @@ -212,6 +218,8 @@ if (known_desktop_glsl_versions[i] <= ctx->Const.GLSLVersion) { this->supported_versions[this->num_supported_versions].ver = known_desktop_glsl_versions[i]; + this->supported_versions[this->num_supported_versions].gl_ver + = known_desktop_gl_versions[i]; this->supported_versions[this->num_supported_versions].es = false; this->num_supported_versions++; } @@ -219,22 +227,26 @@ } if (ctx->API == API_OPENGLES2 || ctx->Extensions.ARB_ES2_compatibility) { this->supported_versions[this->num_supported_versions].ver = 100; + this->supported_versions[this->num_supported_versions].gl_ver = 20; this->supported_versions[this->num_supported_versions].es = true; this->num_supported_versions++; } if (_mesa_is_gles3(ctx) || ctx->Extensions.ARB_ES3_compatibility) { this->supported_versions[this->num_supported_versions].ver = 300; + this->supported_versions[this->num_supported_versions].gl_ver = 30; this->supported_versions[this->num_supported_versions].es = true; this->num_supported_versions++; } if (_mesa_is_gles31(ctx) || ctx->Extensions.ARB_ES3_1_compatibility) { this->supported_versions[this->num_supported_versions].ver = 310; + this->supported_versions[this->num_supported_versions].gl_ver = 31; this->supported_versions[this->num_supported_versions].es = true; this->num_supported_versions++; } if ((ctx->API == API_OPENGLES2 && ctx->Version >= 32) || ctx->Extensions.ARB_ES3_2_compatibility) { this->supported_versions[this->num_supported_versions].ver = 320; + this->supported_versions[this->num_supported_versions].gl_ver = 32; this->supported_versions[this->num_supported_versions].es = true; this->num_supported_versions++; } @@ -264,12 +276,10 @@ this->default_uniform_qualifier = new(this) ast_type_qualifier(); this->default_uniform_qualifier->flags.q.shared = 1; this->default_uniform_qualifier->flags.q.column_major = 1; - this->default_uniform_qualifier->is_default_qualifier = true; this->default_shader_storage_qualifier = new(this) ast_type_qualifier(); this->default_shader_storage_qualifier->flags.q.shared = 1; this->default_shader_storage_qualifier->flags.q.column_major = 1; - this->default_shader_storage_qualifier->is_default_qualifier = true; this->fs_uses_gl_fragcoord = false; this->fs_redeclares_gl_fragcoord = false; @@ -283,10 +293,15 @@ this->in_qualifier = new(this) ast_type_qualifier(); this->out_qualifier = new(this) ast_type_qualifier(); this->fs_early_fragment_tests = false; + this->fs_inner_coverage = false; + this->fs_post_depth_coverage = false; + this->fs_blend_support = 0; memset(this->atomic_counter_offsets, 0, sizeof(this->atomic_counter_offsets)); this->allow_extension_directive_midshader = ctx->Const.AllowGLSLExtensionDirectiveMidShader; + + this->cs_input_local_size_variable_specified = false; } /** @@ -399,6 +414,7 @@ for (unsigned i = 0; i < this->num_supported_versions; i++) { if (this->supported_versions[i].ver == this->language_version && this->supported_versions[i].es == this->es_shader) { + this->gl_version = this->supported_versions[i].gl_ver; supported = true; break; } @@ -511,28 +527,17 @@ */ const char *name; - /** True if this extension is available to desktop GL shaders */ - bool avail_in_GL; - - /** True if this extension is available to GLES shaders */ - bool avail_in_ES; + /** + * Whether this extension is a part of AEP + */ + bool aep; /** - * Flag in the gl_extensions struct indicating whether this - * extension is supported by the driver, or - * &gl_extensions::dummy_true if supported by all drivers. - * - * Note: the type (GLboolean gl_extensions::*) is a "pointer to - * member" type, the type-safe alternative to the "offsetof" macro. - * In a nutshell: - * - * - foo bar::* p declares p to be an "offset" to a field of type - * foo that exists within struct bar - * - &bar::baz computes the "offset" of field baz within struct bar - * - x.*p accesses the field of x that exists at "offset" p - * - x->*p is equivalent to (*x).*p + * Predicate that checks whether the relevant extension is available for + * this context. */ - const GLboolean gl_extensions::* supported_flag; + bool (*available_pred)(const struct gl_context *, + gl_api api, uint8_t version); /** * Flag in the _mesa_glsl_parse_state struct that should be set @@ -553,104 +558,139 @@ bool _mesa_glsl_parse_state::* warn_flag; - bool compatible_with_state(const _mesa_glsl_parse_state *state) const; + bool compatible_with_state(const _mesa_glsl_parse_state *state, + gl_api api, uint8_t gl_version) const; void set_flags(_mesa_glsl_parse_state *state, ext_behavior behavior) const; }; -#define EXT(NAME, GL, ES, SUPPORTED_FLAG) \ - { "GL_" #NAME, GL, ES, &gl_extensions::SUPPORTED_FLAG, \ - &_mesa_glsl_parse_state::NAME##_enable, \ - &_mesa_glsl_parse_state::NAME##_warn } +/** Checks if the context supports a user-facing extension */ +#define EXT(name_str, driver_cap, ...) \ +static MAYBE_UNUSED bool \ +has_##name_str(const struct gl_context *ctx, gl_api api, uint8_t version) \ +{ \ + return ctx->Extensions.driver_cap && (version >= \ + _mesa_extension_table[MESA_EXTENSION_##name_str].version[api]); \ +} +#include "main/extensions_table.h" +#undef EXT + +#define EXT(NAME) \ + { "GL_" #NAME, false, has_##NAME, \ + &_mesa_glsl_parse_state::NAME##_enable, \ + &_mesa_glsl_parse_state::NAME##_warn } + +#define EXT_AEP(NAME) \ + { "GL_" #NAME, true, has_##NAME, \ + &_mesa_glsl_parse_state::NAME##_enable, \ + &_mesa_glsl_parse_state::NAME##_warn } /** * Table of extensions that can be enabled/disabled within a shader, * and the conditions under which they are supported. */ static const _mesa_glsl_extension _mesa_glsl_supported_extensions[] = { - /* API availability */ - /* name GL ES supported flag */ - /* ARB extensions go here, sorted alphabetically. */ - EXT(ARB_ES3_1_compatibility, true, false, ARB_ES3_1_compatibility), - EXT(ARB_ES3_2_compatibility, true, false, ARB_ES3_2_compatibility), - EXT(ARB_arrays_of_arrays, true, false, ARB_arrays_of_arrays), - EXT(ARB_compute_shader, true, false, ARB_compute_shader), - EXT(ARB_conservative_depth, true, false, ARB_conservative_depth), - EXT(ARB_cull_distance, true, false, ARB_cull_distance), - EXT(ARB_derivative_control, true, false, ARB_derivative_control), - EXT(ARB_draw_buffers, true, false, dummy_true), - EXT(ARB_draw_instanced, true, false, ARB_draw_instanced), - EXT(ARB_enhanced_layouts, true, false, ARB_enhanced_layouts), - EXT(ARB_explicit_attrib_location, true, false, ARB_explicit_attrib_location), - EXT(ARB_explicit_uniform_location, true, false, ARB_explicit_uniform_location), - EXT(ARB_fragment_coord_conventions, true, false, ARB_fragment_coord_conventions), - EXT(ARB_fragment_layer_viewport, true, false, ARB_fragment_layer_viewport), - EXT(ARB_gpu_shader5, true, false, ARB_gpu_shader5), - EXT(ARB_gpu_shader_fp64, true, false, ARB_gpu_shader_fp64), - EXT(ARB_sample_shading, true, false, ARB_sample_shading), - EXT(ARB_separate_shader_objects, true, false, dummy_true), - EXT(ARB_shader_atomic_counter_ops, true, false, ARB_shader_atomic_counter_ops), - EXT(ARB_shader_atomic_counters, true, false, ARB_shader_atomic_counters), - EXT(ARB_shader_bit_encoding, true, false, ARB_shader_bit_encoding), - EXT(ARB_shader_clock, true, false, ARB_shader_clock), - EXT(ARB_shader_draw_parameters, true, false, ARB_shader_draw_parameters), - EXT(ARB_shader_image_load_store, true, false, ARB_shader_image_load_store), - EXT(ARB_shader_image_size, true, false, ARB_shader_image_size), - EXT(ARB_shader_precision, true, false, ARB_shader_precision), - EXT(ARB_shader_stencil_export, true, false, ARB_shader_stencil_export), - EXT(ARB_shader_storage_buffer_object, true, true, ARB_shader_storage_buffer_object), - EXT(ARB_shader_subroutine, true, false, ARB_shader_subroutine), - EXT(ARB_shader_texture_image_samples, true, false, ARB_shader_texture_image_samples), - EXT(ARB_shader_texture_lod, true, false, ARB_shader_texture_lod), - EXT(ARB_shading_language_420pack, true, false, ARB_shading_language_420pack), - EXT(ARB_shading_language_packing, true, false, ARB_shading_language_packing), - EXT(ARB_tessellation_shader, true, false, ARB_tessellation_shader), - EXT(ARB_texture_cube_map_array, true, false, ARB_texture_cube_map_array), - EXT(ARB_texture_gather, true, false, ARB_texture_gather), - EXT(ARB_texture_multisample, true, false, ARB_texture_multisample), - EXT(ARB_texture_query_levels, true, false, ARB_texture_query_levels), - EXT(ARB_texture_query_lod, true, false, ARB_texture_query_lod), - EXT(ARB_texture_rectangle, true, false, dummy_true), - EXT(ARB_uniform_buffer_object, true, false, ARB_uniform_buffer_object), - EXT(ARB_vertex_attrib_64bit, true, false, ARB_vertex_attrib_64bit), - EXT(ARB_viewport_array, true, false, ARB_viewport_array), + EXT(ARB_ES3_1_compatibility), + EXT(ARB_ES3_2_compatibility), + EXT(ARB_arrays_of_arrays), + EXT(ARB_compute_shader), + EXT(ARB_compute_variable_group_size), + EXT(ARB_conservative_depth), + EXT(ARB_cull_distance), + EXT(ARB_derivative_control), + EXT(ARB_draw_buffers), + EXT(ARB_draw_instanced), + EXT(ARB_enhanced_layouts), + EXT(ARB_explicit_attrib_location), + EXT(ARB_explicit_uniform_location), + EXT(ARB_fragment_coord_conventions), + EXT(ARB_fragment_layer_viewport), + EXT(ARB_gpu_shader5), + EXT(ARB_gpu_shader_fp64), + EXT(ARB_post_depth_coverage), + EXT(ARB_sample_shading), + EXT(ARB_separate_shader_objects), + EXT(ARB_shader_atomic_counter_ops), + EXT(ARB_shader_atomic_counters), + EXT(ARB_shader_bit_encoding), + EXT(ARB_shader_clock), + EXT(ARB_shader_draw_parameters), + EXT(ARB_shader_group_vote), + EXT(ARB_shader_image_load_store), + EXT(ARB_shader_image_size), + EXT(ARB_shader_precision), + EXT(ARB_shader_stencil_export), + EXT(ARB_shader_storage_buffer_object), + EXT(ARB_shader_subroutine), + EXT(ARB_shader_texture_image_samples), + EXT(ARB_shader_texture_lod), + EXT(ARB_shader_viewport_layer_array), + EXT(ARB_shading_language_420pack), + EXT(ARB_shading_language_packing), + EXT(ARB_tessellation_shader), + EXT(ARB_texture_cube_map_array), + EXT(ARB_texture_gather), + EXT(ARB_texture_multisample), + EXT(ARB_texture_query_levels), + EXT(ARB_texture_query_lod), + EXT(ARB_texture_rectangle), + EXT(ARB_uniform_buffer_object), + EXT(ARB_vertex_attrib_64bit), + EXT(ARB_viewport_array), /* KHR extensions go here, sorted alphabetically. */ + EXT_AEP(KHR_blend_equation_advanced), /* OES extensions go here, sorted alphabetically. */ - EXT(OES_EGL_image_external, false, true, OES_EGL_image_external), - EXT(OES_geometry_point_size, false, true, OES_geometry_shader), - EXT(OES_geometry_shader, false, true, OES_geometry_shader), - EXT(OES_gpu_shader5, false, true, ARB_gpu_shader5), - EXT(OES_sample_variables, false, true, OES_sample_variables), - EXT(OES_shader_image_atomic, false, true, ARB_shader_image_load_store), - EXT(OES_shader_io_blocks, false, true, OES_shader_io_blocks), - EXT(OES_shader_multisample_interpolation, false, true, OES_sample_variables), - EXT(OES_standard_derivatives, false, true, OES_standard_derivatives), - EXT(OES_texture_3D, false, true, dummy_true), - EXT(OES_texture_buffer, false, true, OES_texture_buffer), - EXT(OES_texture_storage_multisample_2d_array, false, true, ARB_texture_multisample), + EXT(OES_EGL_image_external), + EXT(OES_geometry_point_size), + EXT(OES_geometry_shader), + EXT(OES_gpu_shader5), + EXT(OES_primitive_bounding_box), + EXT_AEP(OES_sample_variables), + EXT_AEP(OES_shader_image_atomic), + EXT(OES_shader_io_blocks), + EXT_AEP(OES_shader_multisample_interpolation), + EXT(OES_standard_derivatives), + EXT(OES_tessellation_point_size), + EXT(OES_tessellation_shader), + EXT(OES_texture_3D), + EXT(OES_texture_buffer), + EXT(OES_texture_cube_map_array), + EXT_AEP(OES_texture_storage_multisample_2d_array), + EXT(OES_viewport_array), /* All other extensions go here, sorted alphabetically. */ - EXT(AMD_conservative_depth, true, false, ARB_conservative_depth), - EXT(AMD_shader_stencil_export, true, false, ARB_shader_stencil_export), - EXT(AMD_shader_trinary_minmax, true, false, dummy_true), - EXT(AMD_vertex_shader_layer, true, false, AMD_vertex_shader_layer), - EXT(AMD_vertex_shader_viewport_index, true, false, AMD_vertex_shader_viewport_index), - EXT(EXT_blend_func_extended, false, true, ARB_blend_func_extended), - EXT(EXT_draw_buffers, false, true, dummy_true), - EXT(EXT_clip_cull_distance, false, true, ARB_cull_distance), - EXT(EXT_gpu_shader5, false, true, ARB_gpu_shader5), - EXT(EXT_separate_shader_objects, false, true, dummy_true), - EXT(EXT_shader_integer_mix, true, true, EXT_shader_integer_mix), - EXT(EXT_shader_io_blocks, false, true, OES_shader_io_blocks), - EXT(EXT_shader_samples_identical, true, true, EXT_shader_samples_identical), - EXT(EXT_texture_array, true, false, EXT_texture_array), - EXT(EXT_texture_buffer, false, true, OES_texture_buffer), + EXT(AMD_conservative_depth), + EXT(AMD_shader_stencil_export), + EXT(AMD_shader_trinary_minmax), + EXT(AMD_vertex_shader_layer), + EXT(AMD_vertex_shader_viewport_index), + EXT(ANDROID_extension_pack_es31a), + EXT(EXT_blend_func_extended), + EXT(EXT_draw_buffers), + EXT(EXT_clip_cull_distance), + EXT(EXT_geometry_point_size), + EXT_AEP(EXT_geometry_shader), + EXT_AEP(EXT_gpu_shader5), + EXT_AEP(EXT_primitive_bounding_box), + EXT(EXT_separate_shader_objects), + EXT(EXT_shader_framebuffer_fetch), + EXT(EXT_shader_integer_mix), + EXT_AEP(EXT_shader_io_blocks), + EXT(EXT_shader_samples_identical), + EXT(EXT_tessellation_point_size), + EXT_AEP(EXT_tessellation_shader), + EXT(EXT_texture_array), + EXT_AEP(EXT_texture_buffer), + EXT_AEP(EXT_texture_cube_map_array), + EXT(INTEL_conservative_rasterization), + EXT(MESA_shader_integer_functions), + EXT(NV_image_formats), }; #undef EXT @@ -660,26 +700,10 @@ * Determine whether a given extension is compatible with the target, * API, and extension information in the current parser state. */ -bool _mesa_glsl_extension::compatible_with_state(const _mesa_glsl_parse_state * - state) const +bool _mesa_glsl_extension::compatible_with_state( + const _mesa_glsl_parse_state *state, gl_api api, uint8_t gl_version) const { - /* Check that this extension matches whether we are compiling - * for desktop GL or GLES. - */ - if (state->es_shader) { - if (!this->avail_in_ES) return false; - } else { - if (!this->avail_in_GL) return false; - } - - /* Check that this extension is supported by the OpenGL - * implementation. - * - * Note: the ->* operator indexes into state->extensions by the - * offset this->supported_flag. See - * _mesa_glsl_extension::supported_flag for more info. - */ - return state->extensions->*(this->supported_flag); + return this->available_pred(state->ctx, api, gl_version); } /** @@ -711,12 +735,13 @@ return NULL; } - bool _mesa_glsl_process_extension(const char *name, YYLTYPE *name_locp, const char *behavior_string, YYLTYPE *behavior_locp, _mesa_glsl_parse_state *state) { + uint8_t gl_version = state->ctx->Extensions.Version; + gl_api api = state->ctx->API; ext_behavior behavior; if (strcmp(behavior_string, "warn") == 0) { behavior = extension_warn; @@ -733,6 +758,17 @@ return false; } + /* If we're in a desktop context but with an ES shader, use an ES API enum + * to verify extension availability. + */ + if (state->es_shader && api != API_OPENGLES2) + api = API_OPENGLES2; + /* Use the language-version derived GL version to extension checks, unless + * we're using meta, which sets the version to the max. + */ + if (gl_version != 0xff) + gl_version = state->gl_version; + if (strcmp(name, "all") == 0) { if ((behavior == extension_enable) || (behavior == extension_require)) { _mesa_glsl_error(name_locp, state, "cannot %s all extensions", @@ -744,15 +780,31 @@ i < ARRAY_SIZE(_mesa_glsl_supported_extensions); ++i) { const _mesa_glsl_extension *extension = &_mesa_glsl_supported_extensions[i]; - if (extension->compatible_with_state(state)) { + if (extension->compatible_with_state(state, api, gl_version)) { _mesa_glsl_supported_extensions[i].set_flags(state, behavior); } } } } else { const _mesa_glsl_extension *extension = find_extension(name); - if (extension && extension->compatible_with_state(state)) { + if (extension && extension->compatible_with_state(state, api, gl_version)) { extension->set_flags(state, behavior); + if (extension->available_pred == has_ANDROID_extension_pack_es31a) { + for (unsigned i = 0; + i < ARRAY_SIZE(_mesa_glsl_supported_extensions); ++i) { + const _mesa_glsl_extension *extension = + &_mesa_glsl_supported_extensions[i]; + + if (!extension->aep) + continue; + /* AEP should not be enabled if all of the sub-extensions can't + * also be enabled. This is not the proper layer to do such + * error-checking though. + */ + assert(extension->compatible_with_state(state, api, gl_version)); + extension->set_flags(state, behavior); + } + } } else { static const char fmt[] = "extension `%s' unsupported in %s shader"; @@ -831,7 +883,7 @@ * E.g., if if struct S[2] we want to set each element's type to * struct S. */ - for (exec_node *expr_node = ai->expressions.head; + for (exec_node *expr_node = ai->expressions.get_head_raw(); !expr_node->is_tail_sentinel(); expr_node = expr_node->next) { ast_expression *expr = exec_node_data(ast_expression, expr_node, @@ -843,7 +895,7 @@ /* If the aggregate is a struct, recursively set its fields' types. */ } else if (type->is_record()) { - exec_node *expr_node = ai->expressions.head; + exec_node *expr_node = ai->expressions.get_head_raw(); /* Iterate through the struct's fields. */ for (unsigned i = 0; !expr_node->is_tail_sentinel() && i < type->length; @@ -857,7 +909,7 @@ } /* If the aggregate is a matrix, set its columns' types. */ } else if (type->is_matrix()) { - for (exec_node *expr_node = ai->expressions.head; + for (exec_node *expr_node = ai->expressions.get_head_raw(); !expr_node->is_tail_sentinel(); expr_node = expr_node->next) { ast_expression *expr = exec_node_data(ast_expression, expr_node, @@ -944,6 +996,7 @@ temp_type_qualifier.flags.q.in = true; temp_type_qualifier.flags.q.out = true; temp_type_qualifier.flags.q.buffer = true; + temp_type_qualifier.flags.q.patch = true; interface_type_mask = temp_type_qualifier.flags.i; /* Get the block's interface qualifier. The interface_qualifier @@ -952,22 +1005,22 @@ */ uint64_t block_interface_qualifier = q.flags.i; - block->layout.flags.i |= block_interface_qualifier; + block->default_layout.flags.i |= block_interface_qualifier; if (state->stage == MESA_SHADER_GEOMETRY && state->has_explicit_attrib_stream() && - block->layout.flags.q.out) { + block->default_layout.flags.q.out) { /* Assign global layout's stream value. */ - block->layout.flags.q.stream = 1; - block->layout.flags.q.explicit_stream = 0; - block->layout.stream = state->out_qualifier->stream; + block->default_layout.flags.q.stream = 1; + block->default_layout.flags.q.explicit_stream = 0; + block->default_layout.stream = state->out_qualifier->stream; } - if (state->has_enhanced_layouts() && block->layout.flags.q.out) { + if (state->has_enhanced_layouts() && block->default_layout.flags.q.out) { /* Assign global layout's xfb_buffer value. */ - block->layout.flags.q.xfb_buffer = 1; - block->layout.flags.q.explicit_xfb_buffer = 0; - block->layout.xfb_buffer = state->out_qualifier->xfb_buffer; + block->default_layout.flags.q.xfb_buffer = 1; + block->default_layout.flags.q.explicit_xfb_buffer = 0; + block->default_layout.xfb_buffer = state->out_qualifier->xfb_buffer; } foreach_list_typed (ast_declarator_list, member, link, &block->declarations) { @@ -1586,7 +1639,7 @@ } -ast_struct_specifier::ast_struct_specifier(const char *identifier, +ast_struct_specifier::ast_struct_specifier(void *lin_ctx, const char *identifier, ast_declarator_list *declarator_list) { if (identifier == NULL) { @@ -1598,11 +1651,12 @@ count = anon_count++; mtx_unlock(&mutex); - identifier = ralloc_asprintf(this, "#anon_struct_%04x", count); + identifier = linear_asprintf(lin_ctx, "#anon_struct_%04x", count); } name = identifier; this->declarations.push_degenerate_list_at_head(&declarator_list->link); is_declaration = true; + layout = NULL; } void ast_subroutine_list::print(void) const @@ -1630,6 +1684,7 @@ if (shader->Stage != MESA_SHADER_COMPUTE) { /* Should have been prevented by the parser. */ assert(!state->cs_input_local_size_specified); + assert(!state->cs_input_local_size_variable_specified); } if (shader->Stage != MESA_SHADER_FRAGMENT) { @@ -1639,6 +1694,8 @@ assert(!state->fs_pixel_center_integer); assert(!state->fs_origin_upper_left); assert(!state->fs_early_fragment_tests); + assert(!state->fs_inner_coverage); + assert(!state->fs_post_depth_coverage); } for (unsigned i = 0; i < MAX_FEEDBACK_BUFFERS; i++) { @@ -1647,14 +1704,14 @@ if (state->out_qualifier->out_xfb_stride[i]-> process_qualifier_constant(state, "xfb_stride", &xfb_stride, true)) { - shader->TransformFeedback.BufferStride[i] = xfb_stride; + shader->info.TransformFeedback.BufferStride[i] = xfb_stride; } } } switch (shader->Stage) { case MESA_SHADER_TESS_CTRL: - shader->TessCtrl.VerticesOut = 0; + shader->info.TessCtrl.VerticesOut = 0; if (state->tcs_output_vertices_specified) { unsigned vertices; if (state->out_qualifier->vertices-> @@ -1666,34 +1723,34 @@ _mesa_glsl_error(&loc, state, "vertices (%d) exceeds " "GL_MAX_PATCH_VERTICES", vertices); } - shader->TessCtrl.VerticesOut = vertices; + shader->info.TessCtrl.VerticesOut = vertices; } } break; case MESA_SHADER_TESS_EVAL: - shader->TessEval.PrimitiveMode = PRIM_UNKNOWN; + shader->info.TessEval.PrimitiveMode = PRIM_UNKNOWN; if (state->in_qualifier->flags.q.prim_type) - shader->TessEval.PrimitiveMode = state->in_qualifier->prim_type; + shader->info.TessEval.PrimitiveMode = state->in_qualifier->prim_type; - shader->TessEval.Spacing = 0; + shader->info.TessEval.Spacing = TESS_SPACING_UNSPECIFIED; if (state->in_qualifier->flags.q.vertex_spacing) - shader->TessEval.Spacing = state->in_qualifier->vertex_spacing; + shader->info.TessEval.Spacing = state->in_qualifier->vertex_spacing; - shader->TessEval.VertexOrder = 0; + shader->info.TessEval.VertexOrder = 0; if (state->in_qualifier->flags.q.ordering) - shader->TessEval.VertexOrder = state->in_qualifier->ordering; + shader->info.TessEval.VertexOrder = state->in_qualifier->ordering; - shader->TessEval.PointMode = -1; + shader->info.TessEval.PointMode = -1; if (state->in_qualifier->flags.q.point_mode) - shader->TessEval.PointMode = state->in_qualifier->point_mode; + shader->info.TessEval.PointMode = state->in_qualifier->point_mode; break; case MESA_SHADER_GEOMETRY: - shader->Geom.VerticesOut = -1; + shader->info.Geom.VerticesOut = -1; if (state->out_qualifier->flags.q.max_vertices) { unsigned qual_max_vertices; if (state->out_qualifier->max_vertices-> process_qualifier_constant(state, "max_vertices", - &qual_max_vertices, true, true)) { + &qual_max_vertices, true)) { if (qual_max_vertices > state->Const.MaxGeometryOutputVertices) { YYLTYPE loc = state->out_qualifier->max_vertices->get_location(); @@ -1702,23 +1759,23 @@ "GL_MAX_GEOMETRY_OUTPUT_VERTICES", qual_max_vertices); } - shader->Geom.VerticesOut = qual_max_vertices; + shader->info.Geom.VerticesOut = qual_max_vertices; } } if (state->gs_input_prim_type_specified) { - shader->Geom.InputType = state->in_qualifier->prim_type; + shader->info.Geom.InputType = state->in_qualifier->prim_type; } else { - shader->Geom.InputType = PRIM_UNKNOWN; + shader->info.Geom.InputType = PRIM_UNKNOWN; } if (state->out_qualifier->flags.q.prim_type) { - shader->Geom.OutputType = state->out_qualifier->prim_type; + shader->info.Geom.OutputType = state->out_qualifier->prim_type; } else { - shader->Geom.OutputType = PRIM_UNKNOWN; + shader->info.Geom.OutputType = PRIM_UNKNOWN; } - shader->Geom.Invocations = 0; + shader->info.Geom.Invocations = 0; if (state->in_qualifier->flags.q.invocations) { unsigned invocations; if (state->in_qualifier->invocations-> @@ -1732,7 +1789,7 @@ "GL_MAX_GEOMETRY_SHADER_INVOCATIONS", invocations); } - shader->Geom.Invocations = invocations; + shader->info.Geom.Invocations = invocations; } } break; @@ -1740,21 +1797,28 @@ case MESA_SHADER_COMPUTE: if (state->cs_input_local_size_specified) { for (int i = 0; i < 3; i++) - shader->Comp.LocalSize[i] = state->cs_input_local_size[i]; + shader->info.Comp.LocalSize[i] = state->cs_input_local_size[i]; } else { for (int i = 0; i < 3; i++) - shader->Comp.LocalSize[i] = 0; + shader->info.Comp.LocalSize[i] = 0; } + + shader->info.Comp.LocalSizeVariable = + state->cs_input_local_size_variable_specified; break; case MESA_SHADER_FRAGMENT: - shader->redeclares_gl_fragcoord = state->fs_redeclares_gl_fragcoord; - shader->uses_gl_fragcoord = state->fs_uses_gl_fragcoord; - shader->pixel_center_integer = state->fs_pixel_center_integer; - shader->origin_upper_left = state->fs_origin_upper_left; - shader->ARB_fragment_coord_conventions_enable = + shader->info.redeclares_gl_fragcoord = + state->fs_redeclares_gl_fragcoord; + shader->info.uses_gl_fragcoord = state->fs_uses_gl_fragcoord; + shader->info.pixel_center_integer = state->fs_pixel_center_integer; + shader->info.origin_upper_left = state->fs_origin_upper_left; + shader->info.ARB_fragment_coord_conventions_enable = state->ARB_fragment_coord_conventions_enable; - shader->EarlyFragmentTests = state->fs_early_fragment_tests; + shader->info.EarlyFragmentTests = state->fs_early_fragment_tests; + shader->info.InnerCoverage = state->fs_inner_coverage; + shader->info.PostDepthCoverage = state->fs_post_depth_coverage; + shader->BlendSupport = state->fs_blend_support; break; default: @@ -1786,6 +1850,55 @@ } } +static void +add_builtin_defines(struct _mesa_glsl_parse_state *state, + void (*add_builtin_define)(struct glcpp_parser *, const char *, int), + struct glcpp_parser *data, + unsigned version, + bool es) +{ + unsigned gl_version = state->ctx->Extensions.Version; + gl_api api = state->ctx->API; + + if (gl_version != 0xff) { + unsigned i; + for (i = 0; i < state->num_supported_versions; i++) { + if (state->supported_versions[i].ver == version && + state->supported_versions[i].es == es) { + gl_version = state->supported_versions[i].gl_ver; + break; + } + } + + if (i == state->num_supported_versions) + return; + } + + if (es) + api = API_OPENGLES2; + + for (unsigned i = 0; + i < ARRAY_SIZE(_mesa_glsl_supported_extensions); ++i) { + const _mesa_glsl_extension *extension + = &_mesa_glsl_supported_extensions[i]; + if (extension->compatible_with_state(state, api, gl_version)) { + add_builtin_define(data, extension->name, 1); + } + } +} + +/* Implements parsing checks that we can't do during parsing */ +static void +do_late_parsing_checks(struct _mesa_glsl_parse_state *state) +{ + if (state->stage == MESA_SHADER_COMPUTE && !state->has_compute_shader()) { + YYLTYPE loc; + memset(&loc, 0, sizeof(loc)); + _mesa_glsl_error(&loc, state, "Compute shaders require " + "GLSL 4.30 or GLSL ES 3.10"); + } +} + void _mesa_glsl_compile_shader(struct gl_context *ctx, struct gl_shader *shader, bool dump_ast, bool dump_hir) @@ -1799,12 +1912,13 @@ false, true); state->error = glcpp_preprocess(state, &source, &state->info_log, - &ctx->Extensions, ctx); + add_builtin_defines, state, ctx); if (!state->error) { _mesa_glsl_lexer_ctor(state, source); _mesa_glsl_parse(state); _mesa_glsl_lexer_dtor(state); + do_late_parsing_checks(state); } if (dump_ast) { @@ -1835,12 +1949,20 @@ assign_subroutine_indexes(shader, state); lower_subroutine(shader->ir, state); + /* Do some optimization at compile time to reduce shader IR size * and reduce later work if the same shader is linked multiple times */ - while (do_common_optimization(shader->ir, false, false, options, - ctx->Const.NativeIntegers)) - ; + if (ctx->Const.GLSLOptimizeConservatively) { + /* Run it just once. */ + do_common_optimization(shader->ir, false, false, options, + ctx->Const.NativeIntegers); + } else { + /* Repeat it until it stops making changes. */ + while (do_common_optimization(shader->ir, false, false, options, + ctx->Const.NativeIntegers)) + ; + } validate_ir_tree(shader->ir); @@ -1876,7 +1998,6 @@ shader->InfoLog = state->info_log; shader->Version = state->language_version; shader->IsES = state->es_shader; - shader->uses_builtin_functions = state->uses_builtin_functions; /* Retain any live IR, but trash the rest. */ reparent_ir(shader->ir, shader->ir); @@ -1928,10 +2049,11 @@ * of unused uniforms from being removed. * The setting of this flag only matters if * \c linked is \c true. - * \param max_unroll_iterations Maximum number of loop iterations to be - * unrolled. Setting to 0 disables loop - * unrolling. * \param options The driver's preferred shader options. + * \param native_integers Selects optimizations that depend on the + * implementations supporting integers + * natively (as opposed to supporting + * integers in floating point registers). */ bool do_common_optimization(exec_list *ir, bool linked, @@ -1992,7 +2114,8 @@ OPT(do_minmax_prune, ir); OPT(do_rebalance_tree, ir); OPT(do_algebraic, ir, native_integers, options); - OPT(do_lower_jumps, ir); + OPT(do_lower_jumps, ir, true, true, options->EmitNoMainReturn, + options->EmitNoCont, options->EmitNoLoops); OPT(do_vec_index_to_swizzle, ir); OPT(lower_vector_insert, ir, false); OPT(do_swizzle_swizzle, ir); @@ -2001,12 +2124,14 @@ OPT(optimize_split_arrays, ir, linked); OPT(optimize_redundant_jumps, ir); - loop_state *ls = analyze_loop_variables(ir); - if (ls->loop_found) { - OPT(set_loop_controls, ir, ls); - OPT(unroll_loops, ir, ls, options); + if (options->MaxUnrollIterations) { + loop_state *ls = analyze_loop_variables(ir); + if (ls->loop_found) { + OPT(set_loop_controls, ir, ls); + OPT(unroll_loops, ir, ls, options); + } + delete ls; } - delete ls; #undef OPT diff -Nru mesa-12.0.6/src/compiler/glsl/glsl_parser_extras.h mesa-17.0.7/src/compiler/glsl/glsl_parser_extras.h --- mesa-12.0.6/src/compiler/glsl/glsl_parser_extras.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/glsl_parser_extras.h 2017-06-01 10:37:10.000000000 +0000 @@ -69,14 +69,14 @@ # define YYLTYPE_IS_TRIVIAL 1 extern void _mesa_glsl_error(YYLTYPE *locp, _mesa_glsl_parse_state *state, - const char *fmt, ...); + const char *fmt, ...); struct _mesa_glsl_parse_state { _mesa_glsl_parse_state(struct gl_context *_ctx, gl_shader_stage stage, - void *mem_ctx); + void *mem_ctx); - DECLARE_RALLOC_CXX_OPERATORS(_mesa_glsl_parse_state); + DECLARE_RZALLOC_CXX_OPERATORS(_mesa_glsl_parse_state); /** * Generate a string representing the GLSL version currently being compiled @@ -267,14 +267,35 @@ bool has_shader_io_blocks() const { + /* The OES_geometry_shader_specification says: + * + * "If the OES_geometry_shader extension is enabled, the + * OES_shader_io_blocks extension is also implicitly enabled." + * + * The OES_tessellation_shader extension has similar wording. + */ return OES_shader_io_blocks_enable || EXT_shader_io_blocks_enable || + OES_geometry_shader_enable || + EXT_geometry_shader_enable || + OES_tessellation_shader_enable || + EXT_tessellation_shader_enable || + is_version(150, 320); } bool has_geometry_shader() const { - return OES_geometry_shader_enable || is_version(150, 320); + return OES_geometry_shader_enable || EXT_geometry_shader_enable || + is_version(150, 320); + } + + bool has_tessellation_shader() const + { + return ARB_tessellation_shader_enable || + OES_tessellation_shader_enable || + EXT_tessellation_shader_enable || + is_version(400, 320); } bool has_clip_distance() const @@ -289,6 +310,21 @@ is_version(450, 0); } + bool has_framebuffer_fetch() const + { + return EXT_shader_framebuffer_fetch_enable || + MESA_shader_framebuffer_fetch_enable || + MESA_shader_framebuffer_fetch_non_coherent_enable; + } + + bool has_texture_cube_map_array() const + { + return ARB_texture_cube_map_array_enable || + EXT_texture_cube_map_array_enable || + OES_texture_cube_map_array_enable || + is_version(400, 320); + } + void process_version_directive(YYLTYPE *locp, int version, const char *ident); @@ -297,16 +333,20 @@ exec_list translation_unit; glsl_symbol_table *symbols; + void *linalloc; + unsigned num_supported_versions; struct { unsigned ver; + uint8_t gl_ver; bool es; - } supported_versions[15]; + } supported_versions[16]; bool es_shader; unsigned language_version; unsigned forced_language_version; bool zero_init; + unsigned gl_version; gl_shader_stage stage; /** @@ -367,6 +407,12 @@ unsigned cs_input_local_size[3]; /** + * True if a compute shader input local variable size was specified using + * a layout directive as specified by ARB_compute_variable_group_size. + */ + bool cs_input_local_size_variable_specified; + + /** * Output layout qualifiers from GLSL 1.50 (geometry shader controls), * and GLSL 4.00 (tessellation control shader). */ @@ -538,6 +584,8 @@ bool ARB_arrays_of_arrays_warn; bool ARB_compute_shader_enable; bool ARB_compute_shader_warn; + bool ARB_compute_variable_group_size_enable; + bool ARB_compute_variable_group_size_warn; bool ARB_conservative_depth_enable; bool ARB_conservative_depth_warn; bool ARB_cull_distance_enable; @@ -562,6 +610,8 @@ bool ARB_gpu_shader5_warn; bool ARB_gpu_shader_fp64_enable; bool ARB_gpu_shader_fp64_warn; + bool ARB_post_depth_coverage_enable; + bool ARB_post_depth_coverage_warn; bool ARB_sample_shading_enable; bool ARB_sample_shading_warn; bool ARB_separate_shader_objects_enable; @@ -576,6 +626,8 @@ bool ARB_shader_clock_warn; bool ARB_shader_draw_parameters_enable; bool ARB_shader_draw_parameters_warn; + bool ARB_shader_group_vote_enable; + bool ARB_shader_group_vote_warn; bool ARB_shader_image_load_store_enable; bool ARB_shader_image_load_store_warn; bool ARB_shader_image_size_enable; @@ -592,6 +644,8 @@ bool ARB_shader_texture_image_samples_warn; bool ARB_shader_texture_lod_enable; bool ARB_shader_texture_lod_warn; + bool ARB_shader_viewport_layer_array_enable; + bool ARB_shader_viewport_layer_array_warn; bool ARB_shading_language_420pack_enable; bool ARB_shading_language_420pack_warn; bool ARB_shading_language_packing_enable; @@ -619,6 +673,8 @@ /* KHR extensions go here, sorted alphabetically. */ + bool KHR_blend_equation_advanced_enable; + bool KHR_blend_equation_advanced_warn; /* OES extensions go here, sorted alphabetically. */ @@ -630,6 +686,8 @@ bool OES_geometry_shader_warn; bool OES_gpu_shader5_enable; bool OES_gpu_shader5_warn; + bool OES_primitive_bounding_box_enable; + bool OES_primitive_bounding_box_warn; bool OES_sample_variables_enable; bool OES_sample_variables_warn; bool OES_shader_image_atomic_enable; @@ -640,12 +698,20 @@ bool OES_shader_multisample_interpolation_warn; bool OES_standard_derivatives_enable; bool OES_standard_derivatives_warn; + bool OES_tessellation_point_size_enable; + bool OES_tessellation_point_size_warn; + bool OES_tessellation_shader_enable; + bool OES_tessellation_shader_warn; bool OES_texture_3D_enable; bool OES_texture_3D_warn; bool OES_texture_buffer_enable; bool OES_texture_buffer_warn; + bool OES_texture_cube_map_array_enable; + bool OES_texture_cube_map_array_warn; bool OES_texture_storage_multisample_2d_array_enable; bool OES_texture_storage_multisample_2d_array_warn; + bool OES_viewport_array_enable; + bool OES_viewport_array_warn; /* All other extensions go here, sorted alphabetically. */ @@ -659,26 +725,52 @@ bool AMD_vertex_shader_layer_warn; bool AMD_vertex_shader_viewport_index_enable; bool AMD_vertex_shader_viewport_index_warn; + bool ANDROID_extension_pack_es31a_enable; + bool ANDROID_extension_pack_es31a_warn; bool EXT_blend_func_extended_enable; bool EXT_blend_func_extended_warn; bool EXT_clip_cull_distance_enable; bool EXT_clip_cull_distance_warn; bool EXT_draw_buffers_enable; bool EXT_draw_buffers_warn; + bool EXT_geometry_point_size_enable; + bool EXT_geometry_point_size_warn; + bool EXT_geometry_shader_enable; + bool EXT_geometry_shader_warn; bool EXT_gpu_shader5_enable; bool EXT_gpu_shader5_warn; + bool EXT_primitive_bounding_box_enable; + bool EXT_primitive_bounding_box_warn; bool EXT_separate_shader_objects_enable; bool EXT_separate_shader_objects_warn; + bool EXT_shader_framebuffer_fetch_enable; + bool EXT_shader_framebuffer_fetch_warn; bool EXT_shader_integer_mix_enable; bool EXT_shader_integer_mix_warn; bool EXT_shader_io_blocks_enable; bool EXT_shader_io_blocks_warn; bool EXT_shader_samples_identical_enable; bool EXT_shader_samples_identical_warn; + bool EXT_tessellation_point_size_enable; + bool EXT_tessellation_point_size_warn; + bool EXT_tessellation_shader_enable; + bool EXT_tessellation_shader_warn; bool EXT_texture_array_enable; bool EXT_texture_array_warn; bool EXT_texture_buffer_enable; bool EXT_texture_buffer_warn; + bool EXT_texture_cube_map_array_enable; + bool EXT_texture_cube_map_array_warn; + bool INTEL_conservative_rasterization_enable; + bool INTEL_conservative_rasterization_warn; + bool MESA_shader_framebuffer_fetch_enable; + bool MESA_shader_framebuffer_fetch_warn; + bool MESA_shader_framebuffer_fetch_non_coherent_enable; + bool MESA_shader_framebuffer_fetch_non_coherent_warn; + bool MESA_shader_integer_functions_enable; + bool MESA_shader_integer_functions_warn; + bool NV_image_formats_enable; + bool NV_image_formats_warn; /*@}*/ /** Extensions supported by the OpenGL implementation. */ @@ -698,6 +790,12 @@ bool fs_early_fragment_tests; + bool fs_inner_coverage; + + bool fs_post_depth_coverage; + + unsigned fs_blend_support; + /** * For tessellation control shaders, size of the most recently seen output * declaration that was a sized array, or 0 if no sized output array @@ -738,23 +836,23 @@ unsigned clip_dist_size, cull_dist_size; }; -# define YYLLOC_DEFAULT(Current, Rhs, N) \ -do { \ - if (N) \ - { \ - (Current).first_line = YYRHSLOC(Rhs, 1).first_line; \ - (Current).first_column = YYRHSLOC(Rhs, 1).first_column; \ - (Current).last_line = YYRHSLOC(Rhs, N).last_line; \ - (Current).last_column = YYRHSLOC(Rhs, N).last_column; \ - } \ - else \ - { \ - (Current).first_line = (Current).last_line = \ - YYRHSLOC(Rhs, 0).last_line; \ - (Current).first_column = (Current).last_column = \ - YYRHSLOC(Rhs, 0).last_column; \ - } \ - (Current).source = 0; \ +# define YYLLOC_DEFAULT(Current, Rhs, N) \ +do { \ + if (N) \ + { \ + (Current).first_line = YYRHSLOC(Rhs, 1).first_line; \ + (Current).first_column = YYRHSLOC(Rhs, 1).first_column; \ + (Current).last_line = YYRHSLOC(Rhs, N).last_line; \ + (Current).last_column = YYRHSLOC(Rhs, N).last_column; \ + } \ + else \ + { \ + (Current).first_line = (Current).last_line = \ + YYRHSLOC(Rhs, 0).last_line; \ + (Current).first_column = (Current).last_column = \ + YYRHSLOC(Rhs, 0).last_column; \ + } \ + (Current).source = 0; \ } while (0) /** @@ -763,11 +861,11 @@ * \sa _mesa_glsl_error */ extern void _mesa_glsl_warning(const YYLTYPE *locp, - _mesa_glsl_parse_state *state, - const char *fmt, ...); + _mesa_glsl_parse_state *state, + const char *fmt, ...); extern void _mesa_glsl_lexer_ctor(struct _mesa_glsl_parse_state *state, - const char *string); + const char *string); extern void _mesa_glsl_lexer_dtor(struct _mesa_glsl_parse_state *state); @@ -785,9 +883,9 @@ * \c false is returned. */ extern bool _mesa_glsl_process_extension(const char *name, YYLTYPE *name_locp, - const char *behavior, - YYLTYPE *behavior_locp, - _mesa_glsl_parse_state *state); + const char *behavior, + YYLTYPE *behavior_locp, + _mesa_glsl_parse_state *state); #endif /* __cplusplus */ @@ -799,8 +897,19 @@ extern "C" { #endif +struct glcpp_parser; + +typedef void (*glcpp_extension_iterator)( + struct _mesa_glsl_parse_state *state, + void (*add_builtin_define)(struct glcpp_parser *, const char *, int), + struct glcpp_parser *data, + unsigned version, + bool es); + extern int glcpp_preprocess(void *ctx, const char **shader, char **info_log, - const struct gl_extensions *extensions, struct gl_context *gl_ctx); + glcpp_extension_iterator extensions, + struct _mesa_glsl_parse_state *state, + struct gl_context *gl_ctx); extern void _mesa_destroy_shader_compiler(void); extern void _mesa_destroy_shader_compiler_caches(void); diff -Nru mesa-12.0.6/src/compiler/glsl/glsl_parser.h mesa-17.0.7/src/compiler/glsl/glsl_parser.h --- mesa-12.0.6/src/compiler/glsl/glsl_parser.h 2017-01-24 01:43:16.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/glsl_parser.h 2017-06-01 10:37:59.000000000 +0000 @@ -296,7 +296,7 @@ union YYSTYPE { -#line 98 "../../../src/compiler/glsl/glsl_parser.yy" /* yacc.c:1909 */ +#line 98 "./glsl/glsl_parser.yy" /* yacc.c:1909 */ int n; float real; diff -Nru mesa-12.0.6/src/compiler/glsl/glsl_parser.yy mesa-17.0.7/src/compiler/glsl/glsl_parser.yy --- mesa-12.0.6/src/compiler/glsl/glsl_parser.yy 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/glsl_parser.yy 2017-06-01 10:37:10.000000000 +0000 @@ -219,8 +219,6 @@ %type subroutine_qualifier %type subroutine_type_list %type interface_qualifier -%type uniform_interface_qualifier -%type buffer_interface_qualifier %type type_specifier %type type_specifier_nonarray %type array_specifier @@ -299,10 +297,10 @@ %type for_init_statement %type for_rest_statement %type layout_defaults -%type layout_uniform_defaults -%type layout_buffer_defaults -%type layout_in_defaults -%type layout_out_defaults +%type layout_uniform_defaults +%type layout_buffer_defaults +%type layout_in_defaults +%type layout_out_defaults %right THEN ELSE %% @@ -434,42 +432,42 @@ primary_expression: variable_identifier { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression(ast_identifier, NULL, NULL, NULL); $$->set_location(@1); $$->primary_expression.identifier = $1; } | INTCONSTANT { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression(ast_int_constant, NULL, NULL, NULL); $$->set_location(@1); $$->primary_expression.int_constant = $1; } | UINTCONSTANT { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression(ast_uint_constant, NULL, NULL, NULL); $$->set_location(@1); $$->primary_expression.uint_constant = $1; } | FLOATCONSTANT { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression(ast_float_constant, NULL, NULL, NULL); $$->set_location(@1); $$->primary_expression.float_constant = $1; } | DOUBLECONSTANT { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression(ast_double_constant, NULL, NULL, NULL); $$->set_location(@1); $$->primary_expression.double_constant = $1; } | BOOLCONSTANT { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression(ast_bool_constant, NULL, NULL, NULL); $$->set_location(@1); $$->primary_expression.bool_constant = $1; @@ -484,7 +482,7 @@ primary_expression | postfix_expression '[' integer_expression ']' { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression(ast_array_index, $1, $3, NULL); $$->set_location_range(@1, @4); } @@ -494,20 +492,20 @@ } | postfix_expression DOT_TOK FIELD_SELECTION { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression(ast_field_selection, $1, NULL, NULL); $$->set_location_range(@1, @3); $$->primary_expression.identifier = $3; } | postfix_expression INC_OP { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression(ast_post_inc, $1, NULL, NULL); $$->set_location_range(@1, @2); } | postfix_expression DEC_OP { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression(ast_post_dec, $1, NULL, NULL); $$->set_location_range(@1, @2); } @@ -560,13 +558,13 @@ function_identifier: type_specifier { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_function_expression($1); $$->set_location(@1); } | postfix_expression { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_function_expression($1); $$->set_location(@1); } @@ -581,19 +579,19 @@ postfix_expression | INC_OP unary_expression { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression(ast_pre_inc, $2, NULL, NULL); $$->set_location(@1); } | DEC_OP unary_expression { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression(ast_pre_dec, $2, NULL, NULL); $$->set_location(@1); } | unary_operator unary_expression { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression($1, $2, NULL, NULL); $$->set_location_range(@1, @2); } @@ -611,19 +609,19 @@ unary_expression | multiplicative_expression '*' unary_expression { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression_bin(ast_mul, $1, $3); $$->set_location_range(@1, @3); } | multiplicative_expression '/' unary_expression { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression_bin(ast_div, $1, $3); $$->set_location_range(@1, @3); } | multiplicative_expression '%' unary_expression { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression_bin(ast_mod, $1, $3); $$->set_location_range(@1, @3); } @@ -633,13 +631,13 @@ multiplicative_expression | additive_expression '+' multiplicative_expression { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression_bin(ast_add, $1, $3); $$->set_location_range(@1, @3); } | additive_expression '-' multiplicative_expression { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression_bin(ast_sub, $1, $3); $$->set_location_range(@1, @3); } @@ -649,13 +647,13 @@ additive_expression | shift_expression LEFT_OP additive_expression { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression_bin(ast_lshift, $1, $3); $$->set_location_range(@1, @3); } | shift_expression RIGHT_OP additive_expression { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression_bin(ast_rshift, $1, $3); $$->set_location_range(@1, @3); } @@ -665,25 +663,25 @@ shift_expression | relational_expression '<' shift_expression { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression_bin(ast_less, $1, $3); $$->set_location_range(@1, @3); } | relational_expression '>' shift_expression { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression_bin(ast_greater, $1, $3); $$->set_location_range(@1, @3); } | relational_expression LE_OP shift_expression { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression_bin(ast_lequal, $1, $3); $$->set_location_range(@1, @3); } | relational_expression GE_OP shift_expression { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression_bin(ast_gequal, $1, $3); $$->set_location_range(@1, @3); } @@ -693,13 +691,13 @@ relational_expression | equality_expression EQ_OP relational_expression { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression_bin(ast_equal, $1, $3); $$->set_location_range(@1, @3); } | equality_expression NE_OP relational_expression { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression_bin(ast_nequal, $1, $3); $$->set_location_range(@1, @3); } @@ -709,7 +707,7 @@ equality_expression | and_expression '&' equality_expression { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression_bin(ast_bit_and, $1, $3); $$->set_location_range(@1, @3); } @@ -719,7 +717,7 @@ and_expression | exclusive_or_expression '^' and_expression { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression_bin(ast_bit_xor, $1, $3); $$->set_location_range(@1, @3); } @@ -729,7 +727,7 @@ exclusive_or_expression | inclusive_or_expression '|' exclusive_or_expression { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression_bin(ast_bit_or, $1, $3); $$->set_location_range(@1, @3); } @@ -739,7 +737,7 @@ inclusive_or_expression | logical_and_expression AND_OP inclusive_or_expression { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression_bin(ast_logic_and, $1, $3); $$->set_location_range(@1, @3); } @@ -749,7 +747,7 @@ logical_and_expression | logical_xor_expression XOR_OP logical_and_expression { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression_bin(ast_logic_xor, $1, $3); $$->set_location_range(@1, @3); } @@ -759,7 +757,7 @@ logical_xor_expression | logical_or_expression OR_OP logical_xor_expression { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression_bin(ast_logic_or, $1, $3); $$->set_location_range(@1, @3); } @@ -769,7 +767,7 @@ logical_or_expression | logical_or_expression '?' expression ':' assignment_expression { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression(ast_conditional, $1, $3, $5); $$->set_location_range(@1, @5); } @@ -779,7 +777,7 @@ conditional_expression | unary_expression assignment_operator assignment_expression { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression($2, $1, $3, NULL); $$->set_location_range(@1, @3); } @@ -806,7 +804,7 @@ } | expression ',' assignment_expression { - void *ctx = state; + void *ctx = state->linalloc; if ($1->oper != ast_sequence) { $$ = new(ctx) ast_expression(ast_sequence, NULL, NULL, NULL); $$->set_location_range(@1, @3); @@ -840,6 +838,16 @@ } | interface_block { + ast_interface_block *block = (ast_interface_block *) $1; + if (block->layout.has_layout() || block->layout.has_memory()) { + if (!block->default_layout.merge_qualifier(& @1, state, block->layout, false)) { + YYERROR; + } + } + block->layout = block->default_layout; + if (!block->layout.push_to_global(& @1, state)) { + YYERROR; + } $$ = $1; } ; @@ -869,7 +877,7 @@ function_header: fully_specified_type variable_identifier '(' { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_function(); $$->set_location(@2); $$->return_type = $1; @@ -887,7 +895,7 @@ parameter_declarator: type_specifier any_identifier { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_parameter_declarator(); $$->set_location_range(@1, @2); $$->type = new(ctx) ast_fully_specified_type(); @@ -898,7 +906,7 @@ } | type_specifier any_identifier array_specifier { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_parameter_declarator(); $$->set_location_range(@1, @3); $$->type = new(ctx) ast_fully_specified_type(); @@ -915,15 +923,21 @@ { $$ = $2; $$->type->qualifier = $1; + if (!$$->type->qualifier.push_to_global(& @1, state)) { + YYERROR; + } } | parameter_qualifier parameter_type_specifier { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_parameter_declarator(); $$->set_location(@2); $$->type = new(ctx) ast_fully_specified_type(); $$->type->set_location_range(@1, @2); $$->type->qualifier = $1; + if (!$$->type->qualifier.push_to_global(& @1, state)) { + YYERROR; + } $$->type->specifier = $2; } ; @@ -1006,7 +1020,7 @@ single_declaration | init_declarator_list ',' any_identifier { - void *ctx = state; + void *ctx = state->linalloc; ast_declaration *decl = new(ctx) ast_declaration($3, NULL, NULL); decl->set_location(@3); @@ -1016,7 +1030,7 @@ } | init_declarator_list ',' any_identifier array_specifier { - void *ctx = state; + void *ctx = state->linalloc; ast_declaration *decl = new(ctx) ast_declaration($3, $4, NULL); decl->set_location_range(@3, @4); @@ -1026,7 +1040,7 @@ } | init_declarator_list ',' any_identifier array_specifier '=' initializer { - void *ctx = state; + void *ctx = state->linalloc; ast_declaration *decl = new(ctx) ast_declaration($3, $4, $6); decl->set_location_range(@3, @4); @@ -1036,7 +1050,7 @@ } | init_declarator_list ',' any_identifier '=' initializer { - void *ctx = state; + void *ctx = state->linalloc; ast_declaration *decl = new(ctx) ast_declaration($3, NULL, $5); decl->set_location(@3); @@ -1050,14 +1064,14 @@ single_declaration: fully_specified_type { - void *ctx = state; + void *ctx = state->linalloc; /* Empty declaration list is valid. */ $$ = new(ctx) ast_declarator_list($1); $$->set_location(@1); } | fully_specified_type any_identifier { - void *ctx = state; + void *ctx = state->linalloc; ast_declaration *decl = new(ctx) ast_declaration($2, NULL, NULL); decl->set_location(@2); @@ -1068,7 +1082,7 @@ } | fully_specified_type any_identifier array_specifier { - void *ctx = state; + void *ctx = state->linalloc; ast_declaration *decl = new(ctx) ast_declaration($2, $3, NULL); decl->set_location_range(@2, @3); @@ -1079,7 +1093,7 @@ } | fully_specified_type any_identifier array_specifier '=' initializer { - void *ctx = state; + void *ctx = state->linalloc; ast_declaration *decl = new(ctx) ast_declaration($2, $3, $5); decl->set_location_range(@2, @3); @@ -1090,7 +1104,7 @@ } | fully_specified_type any_identifier '=' initializer { - void *ctx = state; + void *ctx = state->linalloc; ast_declaration *decl = new(ctx) ast_declaration($2, NULL, $4); decl->set_location(@2); @@ -1101,7 +1115,7 @@ } | INVARIANT variable_identifier { - void *ctx = state; + void *ctx = state->linalloc; ast_declaration *decl = new(ctx) ast_declaration($2, NULL, NULL); decl->set_location(@2); @@ -1113,7 +1127,7 @@ } | PRECISE variable_identifier { - void *ctx = state; + void *ctx = state->linalloc; ast_declaration *decl = new(ctx) ast_declaration($2, NULL, NULL); decl->set_location(@2); @@ -1128,17 +1142,20 @@ fully_specified_type: type_specifier { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_fully_specified_type(); $$->set_location(@1); $$->specifier = $1; } | type_qualifier type_specifier { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_fully_specified_type(); $$->set_location_range(@1, @2); $$->qualifier = $1; + if (!$$->qualifier.push_to_global(& @1, state)) { + YYERROR; + } $$->specifier = $2; if ($$->specifier->structure != NULL && $$->specifier->structure->is_declaration) { @@ -1276,7 +1293,8 @@ } } - if ($$.flags.i && !state->has_geometry_shader()) { + if ($$.flags.i && !state->has_geometry_shader() && + !state->has_tessellation_shader()) { _mesa_glsl_error(& @1, state, "#version 150 layout " "qualifier `%s' used", $1); } @@ -1297,51 +1315,55 @@ unsigned required_glsl; /** Minimum GLSL ES version required for the image format. */ unsigned required_essl; + /* NV_image_formats */ + bool nv_image_formats; } map[] = { - { "rgba32f", GL_RGBA32F, GLSL_TYPE_FLOAT, 130, 310 }, - { "rgba16f", GL_RGBA16F, GLSL_TYPE_FLOAT, 130, 310 }, - { "rg32f", GL_RG32F, GLSL_TYPE_FLOAT, 130, 0 }, - { "rg16f", GL_RG16F, GLSL_TYPE_FLOAT, 130, 0 }, - { "r11f_g11f_b10f", GL_R11F_G11F_B10F, GLSL_TYPE_FLOAT, 130, 0 }, - { "r32f", GL_R32F, GLSL_TYPE_FLOAT, 130, 310 }, - { "r16f", GL_R16F, GLSL_TYPE_FLOAT, 130, 0 }, - { "rgba32ui", GL_RGBA32UI, GLSL_TYPE_UINT, 130, 310 }, - { "rgba16ui", GL_RGBA16UI, GLSL_TYPE_UINT, 130, 310 }, - { "rgb10_a2ui", GL_RGB10_A2UI, GLSL_TYPE_UINT, 130, 0 }, - { "rgba8ui", GL_RGBA8UI, GLSL_TYPE_UINT, 130, 310 }, - { "rg32ui", GL_RG32UI, GLSL_TYPE_UINT, 130, 0 }, - { "rg16ui", GL_RG16UI, GLSL_TYPE_UINT, 130, 0 }, - { "rg8ui", GL_RG8UI, GLSL_TYPE_UINT, 130, 0 }, - { "r32ui", GL_R32UI, GLSL_TYPE_UINT, 130, 310 }, - { "r16ui", GL_R16UI, GLSL_TYPE_UINT, 130, 0 }, - { "r8ui", GL_R8UI, GLSL_TYPE_UINT, 130, 0 }, - { "rgba32i", GL_RGBA32I, GLSL_TYPE_INT, 130, 310 }, - { "rgba16i", GL_RGBA16I, GLSL_TYPE_INT, 130, 310 }, - { "rgba8i", GL_RGBA8I, GLSL_TYPE_INT, 130, 310 }, - { "rg32i", GL_RG32I, GLSL_TYPE_INT, 130, 0 }, - { "rg16i", GL_RG16I, GLSL_TYPE_INT, 130, 0 }, - { "rg8i", GL_RG8I, GLSL_TYPE_INT, 130, 0 }, - { "r32i", GL_R32I, GLSL_TYPE_INT, 130, 310 }, - { "r16i", GL_R16I, GLSL_TYPE_INT, 130, 0 }, - { "r8i", GL_R8I, GLSL_TYPE_INT, 130, 0 }, - { "rgba16", GL_RGBA16, GLSL_TYPE_FLOAT, 130, 0 }, - { "rgb10_a2", GL_RGB10_A2, GLSL_TYPE_FLOAT, 130, 0 }, - { "rgba8", GL_RGBA8, GLSL_TYPE_FLOAT, 130, 310 }, - { "rg16", GL_RG16, GLSL_TYPE_FLOAT, 130, 0 }, - { "rg8", GL_RG8, GLSL_TYPE_FLOAT, 130, 0 }, - { "r16", GL_R16, GLSL_TYPE_FLOAT, 130, 0 }, - { "r8", GL_R8, GLSL_TYPE_FLOAT, 130, 0 }, - { "rgba16_snorm", GL_RGBA16_SNORM, GLSL_TYPE_FLOAT, 130, 0 }, - { "rgba8_snorm", GL_RGBA8_SNORM, GLSL_TYPE_FLOAT, 130, 310 }, - { "rg16_snorm", GL_RG16_SNORM, GLSL_TYPE_FLOAT, 130, 0 }, - { "rg8_snorm", GL_RG8_SNORM, GLSL_TYPE_FLOAT, 130, 0 }, - { "r16_snorm", GL_R16_SNORM, GLSL_TYPE_FLOAT, 130, 0 }, - { "r8_snorm", GL_R8_SNORM, GLSL_TYPE_FLOAT, 130, 0 } + { "rgba32f", GL_RGBA32F, GLSL_TYPE_FLOAT, 130, 310, false }, + { "rgba16f", GL_RGBA16F, GLSL_TYPE_FLOAT, 130, 310, false }, + { "rg32f", GL_RG32F, GLSL_TYPE_FLOAT, 130, 0, true }, + { "rg16f", GL_RG16F, GLSL_TYPE_FLOAT, 130, 0, true }, + { "r11f_g11f_b10f", GL_R11F_G11F_B10F, GLSL_TYPE_FLOAT, 130, 0, true }, + { "r32f", GL_R32F, GLSL_TYPE_FLOAT, 130, 310, false }, + { "r16f", GL_R16F, GLSL_TYPE_FLOAT, 130, 0, true }, + { "rgba32ui", GL_RGBA32UI, GLSL_TYPE_UINT, 130, 310, false }, + { "rgba16ui", GL_RGBA16UI, GLSL_TYPE_UINT, 130, 310, false }, + { "rgb10_a2ui", GL_RGB10_A2UI, GLSL_TYPE_UINT, 130, 0, true }, + { "rgba8ui", GL_RGBA8UI, GLSL_TYPE_UINT, 130, 310, false }, + { "rg32ui", GL_RG32UI, GLSL_TYPE_UINT, 130, 0, true }, + { "rg16ui", GL_RG16UI, GLSL_TYPE_UINT, 130, 0, true }, + { "rg8ui", GL_RG8UI, GLSL_TYPE_UINT, 130, 0, true }, + { "r32ui", GL_R32UI, GLSL_TYPE_UINT, 130, 310, false }, + { "r16ui", GL_R16UI, GLSL_TYPE_UINT, 130, 0, true }, + { "r8ui", GL_R8UI, GLSL_TYPE_UINT, 130, 0, true }, + { "rgba32i", GL_RGBA32I, GLSL_TYPE_INT, 130, 310, false }, + { "rgba16i", GL_RGBA16I, GLSL_TYPE_INT, 130, 310, false }, + { "rgba8i", GL_RGBA8I, GLSL_TYPE_INT, 130, 310, false }, + { "rg32i", GL_RG32I, GLSL_TYPE_INT, 130, 0, true }, + { "rg16i", GL_RG16I, GLSL_TYPE_INT, 130, 0, true }, + { "rg8i", GL_RG8I, GLSL_TYPE_INT, 130, 0, true }, + { "r32i", GL_R32I, GLSL_TYPE_INT, 130, 310, false }, + { "r16i", GL_R16I, GLSL_TYPE_INT, 130, 0, true }, + { "r8i", GL_R8I, GLSL_TYPE_INT, 130, 0, true }, + { "rgba16", GL_RGBA16, GLSL_TYPE_FLOAT, 130, 0, false }, + { "rgb10_a2", GL_RGB10_A2, GLSL_TYPE_FLOAT, 130, 0, true }, + { "rgba8", GL_RGBA8, GLSL_TYPE_FLOAT, 130, 310, false }, + { "rg16", GL_RG16, GLSL_TYPE_FLOAT, 130, 0, false }, + { "rg8", GL_RG8, GLSL_TYPE_FLOAT, 130, 0, true }, + { "r16", GL_R16, GLSL_TYPE_FLOAT, 130, 0, false }, + { "r8", GL_R8, GLSL_TYPE_FLOAT, 130, 0, true }, + { "rgba16_snorm", GL_RGBA16_SNORM, GLSL_TYPE_FLOAT, 130, 0, false }, + { "rgba8_snorm", GL_RGBA8_SNORM, GLSL_TYPE_FLOAT, 130, 310, false }, + { "rg16_snorm", GL_RG16_SNORM, GLSL_TYPE_FLOAT, 130, 0, false }, + { "rg8_snorm", GL_RG8_SNORM, GLSL_TYPE_FLOAT, 130, 0, true }, + { "r16_snorm", GL_R16_SNORM, GLSL_TYPE_FLOAT, 130, 0, false }, + { "r8_snorm", GL_R8_SNORM, GLSL_TYPE_FLOAT, 130, 0, true } }; for (unsigned i = 0; i < ARRAY_SIZE(map); i++) { - if (state->is_version(map[i].required_glsl, - map[i].required_essl) && + if ((state->is_version(map[i].required_glsl, + map[i].required_essl) || + (state->NV_image_formats_enable && + map[i].nv_image_formats)) && match_layout_qualifier($1, map[i].name, state) == 0) { $$.flags.q.explicit_image_format = 1; $$.image_format = map[i].format; @@ -1350,9 +1372,10 @@ } } } + } - if (!$$.flags.i && - match_layout_qualifier($1, "early_fragment_tests", state) == 0) { + if (!$$.flags.i) { + if (match_layout_qualifier($1, "early_fragment_tests", state) == 0) { /* From section 4.4.1.3 of the GLSL 4.50 specification * (Fragment Shader Inputs): * @@ -1370,11 +1393,52 @@ $$.flags.q.early_fragment_tests = 1; } + + if (match_layout_qualifier($1, "inner_coverage", state) == 0) { + if (state->stage != MESA_SHADER_FRAGMENT) { + _mesa_glsl_error(& @1, state, + "inner_coverage layout qualifier only " + "valid in fragment shaders"); + } + + if (state->INTEL_conservative_rasterization_enable) { + $$.flags.q.inner_coverage = 1; + } else { + _mesa_glsl_error(& @1, state, + "inner_coverage layout qualifier present, " + "but the INTEL_conservative_rasterization extension " + "is not enabled."); + } + } + + if (match_layout_qualifier($1, "post_depth_coverage", state) == 0) { + if (state->stage != MESA_SHADER_FRAGMENT) { + _mesa_glsl_error(& @1, state, + "post_depth_coverage layout qualifier only " + "valid in fragment shaders"); + } + + if (state->ARB_post_depth_coverage_enable || + state->INTEL_conservative_rasterization_enable) { + $$.flags.q.post_depth_coverage = 1; + } else { + _mesa_glsl_error(& @1, state, + "post_depth_coverage layout qualifier present, " + "but the GL_ARB_post_depth_coverage extension " + "is not enabled."); + } + } + + if ($$.flags.q.post_depth_coverage && $$.flags.q.inner_coverage) { + _mesa_glsl_error(& @1, state, + "post_depth_coverage & inner_coverage layout qualifiers " + "are mutually exclusive"); + } } /* Layout qualifiers for tessellation evaluation shaders. */ if (!$$.flags.i) { - struct { + static const struct { const char *s; GLenum e; } map[] = { @@ -1390,22 +1454,20 @@ } } - if ($$.flags.i && - !state->ARB_tessellation_shader_enable && - !state->is_version(400, 0)) { + if ($$.flags.i && !state->has_tessellation_shader()) { _mesa_glsl_error(& @1, state, "primitive mode qualifier `%s' requires " "GLSL 4.00 or ARB_tessellation_shader", $1); } } if (!$$.flags.i) { - struct { + static const struct { const char *s; - GLenum e; + enum gl_tess_spacing e; } map[] = { - { "equal_spacing", GL_EQUAL }, - { "fractional_odd_spacing", GL_FRACTIONAL_ODD }, - { "fractional_even_spacing", GL_FRACTIONAL_EVEN }, + { "equal_spacing", TESS_SPACING_EQUAL }, + { "fractional_odd_spacing", TESS_SPACING_FRACTIONAL_ODD }, + { "fractional_even_spacing", TESS_SPACING_FRACTIONAL_EVEN }, }; for (unsigned i = 0; i < ARRAY_SIZE(map); i++) { if (match_layout_qualifier($1, map[i].s, state) == 0) { @@ -1415,9 +1477,7 @@ } } - if ($$.flags.i && - !state->ARB_tessellation_shader_enable && - !state->is_version(400, 0)) { + if ($$.flags.i && !state->has_tessellation_shader()) { _mesa_glsl_error(& @1, state, "vertex spacing qualifier `%s' requires " "GLSL 4.00 or ARB_tessellation_shader", $1); @@ -1432,9 +1492,7 @@ $$.ordering = GL_CCW; } - if ($$.flags.i && - !state->ARB_tessellation_shader_enable && - !state->is_version(400, 0)) { + if ($$.flags.i && !state->has_tessellation_shader()) { _mesa_glsl_error(& @1, state, "ordering qualifier `%s' requires " "GLSL 4.00 or ARB_tessellation_shader", $1); @@ -1446,9 +1504,7 @@ $$.point_mode = true; } - if ($$.flags.i && - !state->ARB_tessellation_shader_enable && - !state->is_version(400, 0)) { + if ($$.flags.i && !state->has_tessellation_shader()) { _mesa_glsl_error(& @1, state, "qualifier `point_mode' requires " "GLSL 4.00 or ARB_tessellation_shader"); @@ -1456,6 +1512,64 @@ } if (!$$.flags.i) { + static const struct { + const char *s; + uint32_t mask; + } map[] = { + { "blend_support_multiply", BLEND_MULTIPLY }, + { "blend_support_screen", BLEND_SCREEN }, + { "blend_support_overlay", BLEND_OVERLAY }, + { "blend_support_darken", BLEND_DARKEN }, + { "blend_support_lighten", BLEND_LIGHTEN }, + { "blend_support_colordodge", BLEND_COLORDODGE }, + { "blend_support_colorburn", BLEND_COLORBURN }, + { "blend_support_hardlight", BLEND_HARDLIGHT }, + { "blend_support_softlight", BLEND_SOFTLIGHT }, + { "blend_support_difference", BLEND_DIFFERENCE }, + { "blend_support_exclusion", BLEND_EXCLUSION }, + { "blend_support_hsl_hue", BLEND_HSL_HUE }, + { "blend_support_hsl_saturation", BLEND_HSL_SATURATION }, + { "blend_support_hsl_color", BLEND_HSL_COLOR }, + { "blend_support_hsl_luminosity", BLEND_HSL_LUMINOSITY }, + { "blend_support_all_equations", BLEND_ALL }, + }; + for (unsigned i = 0; i < ARRAY_SIZE(map); i++) { + if (match_layout_qualifier($1, map[i].s, state) == 0) { + $$.flags.q.blend_support = 1; + state->fs_blend_support |= map[i].mask; + break; + } + } + + if ($$.flags.i && + !state->KHR_blend_equation_advanced_enable && + !state->is_version(0, 320)) { + _mesa_glsl_error(& @1, state, + "advanced blending layout qualifiers require " + "ESSL 3.20 or KHR_blend_equation_advanced"); + } + + if ($$.flags.i && state->stage != MESA_SHADER_FRAGMENT) { + _mesa_glsl_error(& @1, state, + "advanced blending layout qualifiers only " + "valid in fragment shaders"); + } + } + + /* Layout qualifiers for ARB_compute_variable_group_size. */ + if (!$$.flags.i) { + if (match_layout_qualifier($1, "local_size_variable", state) == 0) { + $$.flags.q.local_size_variable = 1; + } + + if ($$.flags.i && !state->ARB_compute_variable_group_size_enable) { + _mesa_glsl_error(& @1, state, + "qualifier `local_size_variable` requires " + "ARB_compute_variable_group_size"); + } + } + + if (!$$.flags.i) { _mesa_glsl_error(& @1, state, "unrecognized layout identifier " "`%s'", $1); YYERROR; @@ -1464,7 +1578,7 @@ | any_identifier '=' constant_expression { memset(& $$, 0, sizeof($$)); - void *ctx = state; + void *ctx = state->linalloc; if ($3->oper != ast_int_constant && $3->oper != ast_uint_constant && @@ -1596,8 +1710,10 @@ if (match_layout_qualifier("invocations", $1, state) == 0) { $$.flags.q.invocations = 1; $$.invocations = new(ctx) ast_layout_expression(@1, $3); - if (!state->is_version(400, 0) && - !state->ARB_gpu_shader5_enable) { + if (!state->is_version(400, 320) && + !state->ARB_gpu_shader5_enable && + !state->OES_geometry_shader_enable && + !state->EXT_geometry_shader_enable) { _mesa_glsl_error(& @3, state, "GL_ARB_gpu_shader5 invocations " "qualifier specified", $3); @@ -1608,8 +1724,7 @@ if (match_layout_qualifier("vertices", $1, state) == 0) { $$.flags.q.vertices = 1; $$.vertices = new(ctx) ast_layout_expression(@1, $3); - if (!state->ARB_tessellation_shader_enable && - !state->is_version(400, 0)) { + if (!state->has_tessellation_shader()) { _mesa_glsl_error(& @1, state, "vertices qualifier requires GLSL 4.00 or " "ARB_tessellation_shader"); @@ -1685,7 +1800,7 @@ subroutine_type_list: any_identifier { - void *ctx = state; + void *ctx = state->linalloc; ast_declaration *decl = new(ctx) ast_declaration($1, NULL, NULL); decl->set_location(@1); @@ -1694,7 +1809,7 @@ } | subroutine_type_list ',' any_identifier { - void *ctx = state; + void *ctx = state->linalloc; ast_declaration *decl = new(ctx) ast_declaration($3, NULL, NULL); decl->set_location(@3); @@ -1825,11 +1940,8 @@ * precise qualifiers since these are useful in ARB_separate_shader_objects. * There is no clear spec guidance on this either. */ - if (!state->has_420pack_or_es31() && $2.has_layout()) - _mesa_glsl_error(&@1, state, "duplicate layout(...) qualifiers"); - $$ = $1; - $$.merge_qualifier(&@1, state, $2, false); + $$.merge_qualifier(& @1, state, $2, false, $2.has_layout()); } | subroutine_qualifier type_qualifier { @@ -1954,6 +2066,18 @@ $$.xfb_buffer = state->out_qualifier->xfb_buffer; } } + | INOUT_TOK + { + memset(& $$, 0, sizeof($$)); + $$.flags.q.in = 1; + $$.flags.q.out = 1; + + if (!state->has_framebuffer_fetch() || + !state->is_version(130, 300) || + state->stage != MESA_SHADER_FRAGMENT) + _mesa_glsl_error(&@1, state, "A single interface variable cannot be " + "declared as both input and output"); + } | UNIFORM { memset(& $$, 0, sizeof($$)); @@ -2003,7 +2127,7 @@ array_specifier: '[' ']' { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_array_specifier(@1, new(ctx) ast_expression( ast_unsized_array_dim, NULL, NULL, NULL)); @@ -2011,13 +2135,13 @@ } | '[' constant_expression ']' { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_array_specifier(@1, $2); $$->set_location_range(@1, @3); } | array_specifier '[' ']' { - void *ctx = state; + void *ctx = state->linalloc; $$ = $1; if (state->check_arrays_of_arrays_allowed(& @1)) { @@ -2047,19 +2171,19 @@ type_specifier_nonarray: basic_type_specifier_nonarray { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_type_specifier($1); $$->set_location(@1); } | struct_specifier { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_type_specifier($1); $$->set_location(@1); } | TYPE_IDENTIFIER { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_type_specifier($1); $$->set_location(@1); } @@ -2203,15 +2327,15 @@ struct_specifier: STRUCT any_identifier '{' struct_declaration_list '}' { - void *ctx = state; - $$ = new(ctx) ast_struct_specifier($2, $4); + void *ctx = state->linalloc; + $$ = new(ctx) ast_struct_specifier(ctx, $2, $4); $$->set_location_range(@2, @5); state->symbols->add_type($2, glsl_type::void_type); } | STRUCT '{' struct_declaration_list '}' { - void *ctx = state; - $$ = new(ctx) ast_struct_specifier(NULL, $3); + void *ctx = state->linalloc; + $$ = new(ctx) ast_struct_specifier(ctx, NULL, $3); $$->set_location_range(@2, @4); } ; @@ -2232,7 +2356,7 @@ struct_declaration: fully_specified_type struct_declarator_list ';' { - void *ctx = state; + void *ctx = state->linalloc; ast_fully_specified_type *const type = $1; type->set_location(@1); @@ -2264,13 +2388,13 @@ struct_declarator: any_identifier { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_declaration($1, NULL, NULL); $$->set_location(@1); } | any_identifier array_specifier { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_declaration($1, $2, NULL); $$->set_location_range(@1, @2); } @@ -2291,7 +2415,7 @@ initializer_list: initializer { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_aggregate_initializer(); $$->set_location(@1); $$->expressions.push_tail(& $1->link); @@ -2325,7 +2449,7 @@ compound_statement: '{' '}' { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_compound_statement(true, NULL); $$->set_location_range(@1, @2); } @@ -2335,7 +2459,7 @@ } statement_list '}' { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_compound_statement(true, $3); $$->set_location_range(@1, @4); state->symbols->pop_scope(); @@ -2350,13 +2474,13 @@ compound_statement_no_new_scope: '{' '}' { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_compound_statement(false, NULL); $$->set_location_range(@1, @2); } | '{' statement_list '}' { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_compound_statement(false, $2); $$->set_location_range(@1, @3); } @@ -2387,13 +2511,13 @@ expression_statement: ';' { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression_statement(NULL); $$->set_location(@1); } | expression ';' { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_expression_statement($1); $$->set_location(@1); } @@ -2402,8 +2526,8 @@ selection_statement: IF '(' expression ')' selection_rest_statement { - $$ = new(state) ast_selection_statement($3, $5.then_statement, - $5.else_statement); + $$ = new(state->linalloc) ast_selection_statement($3, $5.then_statement, + $5.else_statement); $$->set_location_range(@1, @5); } ; @@ -2428,7 +2552,7 @@ } | fully_specified_type any_identifier '=' initializer { - void *ctx = state; + void *ctx = state->linalloc; ast_declaration *decl = new(ctx) ast_declaration($2, NULL, $4); ast_declarator_list *declarator = new(ctx) ast_declarator_list($1); decl->set_location_range(@2, @4); @@ -2446,7 +2570,7 @@ switch_statement: SWITCH '(' expression ')' switch_body { - $$ = new(state) ast_switch_statement($3, $5); + $$ = new(state->linalloc) ast_switch_statement($3, $5); $$->set_location_range(@1, @5); } ; @@ -2454,12 +2578,12 @@ switch_body: '{' '}' { - $$ = new(state) ast_switch_body(NULL); + $$ = new(state->linalloc) ast_switch_body(NULL); $$->set_location_range(@1, @2); } | '{' case_statement_list '}' { - $$ = new(state) ast_switch_body($2); + $$ = new(state->linalloc) ast_switch_body($2); $$->set_location_range(@1, @3); } ; @@ -2467,12 +2591,12 @@ case_label: CASE expression ':' { - $$ = new(state) ast_case_label($2); + $$ = new(state->linalloc) ast_case_label($2); $$->set_location(@2); } | DEFAULT ':' { - $$ = new(state) ast_case_label(NULL); + $$ = new(state->linalloc) ast_case_label(NULL); $$->set_location(@2); } ; @@ -2480,7 +2604,7 @@ case_label_list: case_label { - ast_case_label_list *labels = new(state) ast_case_label_list(); + ast_case_label_list *labels = new(state->linalloc) ast_case_label_list(); labels->labels.push_tail(& $1->link); $$ = labels; @@ -2496,7 +2620,7 @@ case_statement: case_label_list statement { - ast_case_statement *stmts = new(state) ast_case_statement($1); + ast_case_statement *stmts = new(state->linalloc) ast_case_statement($1); stmts->set_location(@2); stmts->stmts.push_tail(& $2->link); @@ -2512,7 +2636,7 @@ case_statement_list: case_statement { - ast_case_statement_list *cases= new(state) ast_case_statement_list(); + ast_case_statement_list *cases= new(state->linalloc) ast_case_statement_list(); cases->set_location(@1); cases->cases.push_tail(& $1->link); @@ -2528,21 +2652,21 @@ iteration_statement: WHILE '(' condition ')' statement_no_new_scope { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_iteration_statement(ast_iteration_statement::ast_while, NULL, $3, NULL, $5); $$->set_location_range(@1, @4); } | DO statement WHILE '(' expression ')' ';' { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_iteration_statement(ast_iteration_statement::ast_do_while, NULL, $5, NULL, $2); $$->set_location_range(@1, @6); } | FOR '(' for_init_statement for_rest_statement ')' statement_no_new_scope { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_iteration_statement(ast_iteration_statement::ast_for, $3, $4.cond, $4.rest, $6); $$->set_location_range(@1, @6); @@ -2579,31 +2703,31 @@ jump_statement: CONTINUE ';' { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_jump_statement(ast_jump_statement::ast_continue, NULL); $$->set_location(@1); } | BREAK ';' { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_jump_statement(ast_jump_statement::ast_break, NULL); $$->set_location(@1); } | RETURN ';' { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_jump_statement(ast_jump_statement::ast_return, NULL); $$->set_location(@1); } | RETURN expression ';' { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_jump_statement(ast_jump_statement::ast_return, $2); $$->set_location_range(@1, @2); } | DISCARD ';' // Fragment shader only. { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_jump_statement(ast_jump_statement::ast_discard, NULL); $$->set_location(@1); } @@ -2619,7 +2743,7 @@ function_definition: function_prototype compound_statement_no_new_scope { - void *ctx = state; + void *ctx = state->linalloc; $$ = new(ctx) ast_function_definition(); $$->set_location_range(@1, @2); $$->prototype = $1; @@ -2639,17 +2763,12 @@ { ast_interface_block *block = (ast_interface_block *) $2; - if (!state->has_420pack_or_es31() && block->layout.has_layout() && - !block->layout.is_default_qualifier) { - _mesa_glsl_error(&@1, state, "duplicate layout(...) qualifiers"); - YYERROR; - } - - if (!block->layout.merge_qualifier(& @1, state, $1, false)) { + if (!$1.merge_qualifier(& @1, state, block->layout, false, + block->layout.has_layout())) { YYERROR; } - block->layout.is_default_qualifier = false; + block->layout = $1; $$ = block; } @@ -2657,14 +2776,15 @@ { ast_interface_block *block = (ast_interface_block *)$2; - if (!block->layout.flags.q.buffer) { + if (!block->default_layout.flags.q.buffer) { _mesa_glsl_error(& @1, state, "memory qualifiers can only be used in the " "declaration of shader storage blocks"); } - if (!block->layout.merge_qualifier(& @1, state, $1, false)) { + if (!$1.merge_qualifier(& @1, state, block->layout, false)) { YYERROR; } + block->layout = $1; $$ = block; } ; @@ -2674,30 +2794,11 @@ { ast_interface_block *const block = $6; - block->block_name = $2; - block->declarations.push_degenerate_list_at_head(& $4->link); - - _mesa_ast_process_interface_block(& @1, state, block, $1); - - $$ = block; - } - | uniform_interface_qualifier NEW_IDENTIFIER '{' member_list '}' instance_name_opt ';' - { - ast_interface_block *const block = $6; - - block->layout = *state->default_uniform_qualifier; - block->block_name = $2; - block->declarations.push_degenerate_list_at_head(& $4->link); - - _mesa_ast_process_interface_block(& @1, state, block, $1); - - $$ = block; - } - | buffer_interface_qualifier NEW_IDENTIFIER '{' member_list '}' instance_name_opt ';' - { - ast_interface_block *const block = $6; - - block->layout = *state->default_shader_storage_qualifier; + if ($1.flags.q.uniform) { + block->default_layout = *state->default_uniform_qualifier; + } else if ($1.flags.q.buffer) { + block->default_layout = *state->default_shader_storage_qualifier; + } block->block_name = $2; block->declarations.push_degenerate_list_at_head(& $4->link); @@ -2718,37 +2819,42 @@ memset(& $$, 0, sizeof($$)); $$.flags.q.out = 1; } - ; - -uniform_interface_qualifier: - UNIFORM + | UNIFORM { memset(& $$, 0, sizeof($$)); $$.flags.q.uniform = 1; } - ; - -buffer_interface_qualifier: - BUFFER + | BUFFER { memset(& $$, 0, sizeof($$)); $$.flags.q.buffer = 1; } + | auxiliary_storage_qualifier interface_qualifier + { + if (!$1.flags.q.patch) { + _mesa_glsl_error(&@1, state, "invalid interface qualifier"); + } + if ($2.has_auxiliary_storage()) { + _mesa_glsl_error(&@1, state, "duplicate patch qualifier"); + } + $$ = $2; + $$.flags.q.patch = 1; + } ; instance_name_opt: /* empty */ { - $$ = new(state) ast_interface_block(NULL, NULL); + $$ = new(state->linalloc) ast_interface_block(NULL, NULL); } | NEW_IDENTIFIER { - $$ = new(state) ast_interface_block($1, NULL); + $$ = new(state->linalloc) ast_interface_block($1, NULL); $$->set_location(@1); } | NEW_IDENTIFIER array_specifier { - $$ = new(state) ast_interface_block($1, $2); + $$ = new(state->linalloc) ast_interface_block($1, $2); $$->set_location_range(@1, @2); } ; @@ -2769,7 +2875,7 @@ member_declaration: fully_specified_type struct_declarator_list ';' { - void *ctx = state; + void *ctx = state->linalloc; ast_fully_specified_type *type = $1; type->set_location(@1); @@ -2793,82 +2899,39 @@ layout_uniform_defaults: layout_qualifier layout_uniform_defaults { - $$ = NULL; - if (!state->has_420pack_or_es31()) { - _mesa_glsl_error(&@1, state, "duplicate layout(...) qualifiers"); + $$ = $1; + if (!$$.merge_qualifier(& @1, state, $2, false, true)) { YYERROR; - } else { - if (!state->default_uniform_qualifier-> - merge_qualifier(& @1, state, $1, false)) { - YYERROR; - } } } | layout_qualifier UNIFORM ';' - { - if (!state->default_uniform_qualifier-> - merge_qualifier(& @1, state, $1, false)) { - YYERROR; - } - $$ = NULL; - } ; layout_buffer_defaults: layout_qualifier layout_buffer_defaults { - $$ = NULL; - if (!state->has_420pack_or_es31()) { - _mesa_glsl_error(&@1, state, "duplicate layout(...) qualifiers"); + $$ = $1; + if (!$$.merge_qualifier(& @1, state, $2, false, true)) { YYERROR; - } else { - if (!state->default_shader_storage_qualifier-> - merge_qualifier(& @1, state, $1, false)) { - YYERROR; - } } } | layout_qualifier BUFFER ';' - { - if (!state->default_shader_storage_qualifier-> - merge_qualifier(& @1, state, $1, false)) { - YYERROR; - } - - /* From the GLSL 4.50 spec, section 4.4.5: - * - * "It is a compile-time error to specify the binding identifier for - * the global scope or for block member declarations." - */ - if (state->default_shader_storage_qualifier->flags.q.explicit_binding) { - _mesa_glsl_error(& @1, state, - "binding qualifier cannot be set for default layout"); - } - - $$ = NULL; - } ; layout_in_defaults: layout_qualifier layout_in_defaults { - $$ = NULL; - if (!state->has_420pack_or_es31()) { - _mesa_glsl_error(&@1, state, "duplicate layout(...) qualifiers"); + $$ = $1; + if (!$$.merge_qualifier(& @1, state, $2, false, true)) { + YYERROR; + } + if (!$$.validate_in_qualifier(& @1, state)) { YYERROR; - } else { - if (!state->in_qualifier-> - merge_in_qualifier(& @1, state, $1, $$, false)) { - YYERROR; - } - $$ = $2; } } | layout_qualifier IN_TOK ';' { - $$ = NULL; - if (!state->in_qualifier-> - merge_in_qualifier(& @1, state, $1, $$, true)) { + if (!$1.validate_in_qualifier(& @1, state)) { YYERROR; } } @@ -2877,30 +2940,75 @@ layout_out_defaults: layout_qualifier layout_out_defaults { - $$ = NULL; - if (!state->has_420pack_or_es31()) { - _mesa_glsl_error(&@1, state, "duplicate layout(...) qualifiers"); + $$ = $1; + if (!$$.merge_qualifier(& @1, state, $2, false, true)) { + YYERROR; + } + if (!$$.validate_out_qualifier(& @1, state)) { YYERROR; - } else { - if (!state->out_qualifier-> - merge_out_qualifier(& @1, state, $1, $$, false)) { - YYERROR; - } - $$ = $2; } } | layout_qualifier OUT_TOK ';' { - $$ = NULL; - if (!state->out_qualifier-> - merge_out_qualifier(& @1, state, $1, $$, true)) + if (!$1.validate_out_qualifier(& @1, state)) { YYERROR; + } } ; layout_defaults: layout_uniform_defaults + { + $$ = NULL; + if (!state->default_uniform_qualifier-> + merge_qualifier(& @1, state, $1, false)) { + YYERROR; + } + if (!state->default_uniform_qualifier-> + push_to_global(& @1, state)) { + YYERROR; + } + } | layout_buffer_defaults + { + $$ = NULL; + if (!state->default_shader_storage_qualifier-> + merge_qualifier(& @1, state, $1, false)) { + YYERROR; + } + if (!state->default_shader_storage_qualifier-> + push_to_global(& @1, state)) { + YYERROR; + } + + /* From the GLSL 4.50 spec, section 4.4.5: + * + * "It is a compile-time error to specify the binding identifier for + * the global scope or for block member declarations." + */ + if (state->default_shader_storage_qualifier->flags.q.explicit_binding) { + _mesa_glsl_error(& @1, state, + "binding qualifier cannot be set for default layout"); + } + } | layout_in_defaults + { + $$ = NULL; + if (!$1.merge_into_in_qualifier(& @1, state, $$)) { + YYERROR; + } + if (!state->in_qualifier->push_to_global(& @1, state)) { + YYERROR; + } + } | layout_out_defaults + { + $$ = NULL; + if (!$1.merge_into_out_qualifier(& @1, state, $$)) { + YYERROR; + } + if (!state->out_qualifier->push_to_global(& @1, state)) { + YYERROR; + } + } ; diff -Nru mesa-12.0.6/src/compiler/glsl/glsl_symbol_table.cpp mesa-17.0.7/src/compiler/glsl/glsl_symbol_table.cpp --- mesa-12.0.6/src/compiler/glsl/glsl_symbol_table.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/glsl_symbol_table.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -27,7 +27,7 @@ class symbol_table_entry { public: - DECLARE_RALLOC_CXX_OPERATORS(symbol_table_entry); + DECLARE_LINEAR_ALLOC_CXX_OPERATORS(symbol_table_entry); bool add_interface(const glsl_type *i, enum ir_variable_mode mode) { @@ -106,6 +106,7 @@ this->separate_function_namespace = false; this->table = _mesa_symbol_table_ctor(); this->mem_ctx = ralloc_context(NULL); + this->linalloc = linear_alloc_parent(this->mem_ctx, 0); } glsl_symbol_table::~glsl_symbol_table() @@ -126,7 +127,7 @@ bool glsl_symbol_table::name_declared_this_scope(const char *name) { - return _mesa_symbol_table_symbol_scope(table, -1, name) == 0; + return _mesa_symbol_table_symbol_scope(table, name) == 0; } bool glsl_symbol_table::add_variable(ir_variable *v) @@ -149,10 +150,10 @@ * entry includes a function, propagate that to this block - otherwise * the new variable declaration would shadow the function. */ - symbol_table_entry *entry = new(mem_ctx) symbol_table_entry(v); + symbol_table_entry *entry = new(linalloc) symbol_table_entry(v); if (existing != NULL) entry->f = existing->f; - int added = _mesa_symbol_table_add_symbol(table, -1, v->name, entry); + int added = _mesa_symbol_table_add_symbol(table, v->name, entry); assert(added == 0); (void)added; return true; @@ -161,14 +162,14 @@ } /* 1.20+ rules: */ - symbol_table_entry *entry = new(mem_ctx) symbol_table_entry(v); - return _mesa_symbol_table_add_symbol(table, -1, v->name, entry) == 0; + symbol_table_entry *entry = new(linalloc) symbol_table_entry(v); + return _mesa_symbol_table_add_symbol(table, v->name, entry) == 0; } bool glsl_symbol_table::add_type(const char *name, const glsl_type *t) { - symbol_table_entry *entry = new(mem_ctx) symbol_table_entry(t); - return _mesa_symbol_table_add_symbol(table, -1, name, entry) == 0; + symbol_table_entry *entry = new(linalloc) symbol_table_entry(t); + return _mesa_symbol_table_add_symbol(table, name, entry) == 0; } bool glsl_symbol_table::add_interface(const char *name, const glsl_type *i, @@ -178,9 +179,9 @@ symbol_table_entry *entry = get_entry(name); if (entry == NULL) { symbol_table_entry *entry = - new(mem_ctx) symbol_table_entry(i, mode); + new(linalloc) symbol_table_entry(i, mode); bool add_interface_symbol_result = - _mesa_symbol_table_add_symbol(table, -1, name, entry) == 0; + _mesa_symbol_table_add_symbol(table, name, entry) == 0; assert(add_interface_symbol_result); return add_interface_symbol_result; } else { @@ -198,8 +199,8 @@ return true; } } - symbol_table_entry *entry = new(mem_ctx) symbol_table_entry(f); - return _mesa_symbol_table_add_symbol(table, -1, f->name, entry) == 0; + symbol_table_entry *entry = new(linalloc) symbol_table_entry(f); + return _mesa_symbol_table_add_symbol(table, f->name, entry) == 0; } bool glsl_symbol_table::add_default_precision_qualifier(const char *type_name, @@ -207,19 +208,22 @@ { char *name = ralloc_asprintf(mem_ctx, "#default_precision_%s", type_name); - ast_type_specifier *default_specifier = new(mem_ctx) ast_type_specifier(name); + ast_type_specifier *default_specifier = new(linalloc) ast_type_specifier(name); default_specifier->default_precision = precision; symbol_table_entry *entry = - new(mem_ctx) symbol_table_entry(default_specifier); + new(linalloc) symbol_table_entry(default_specifier); - return _mesa_symbol_table_add_symbol(table, -1, name, entry) == 0; + if (!get_entry(name)) + return _mesa_symbol_table_add_symbol(table, name, entry) == 0; + + return _mesa_symbol_table_replace_symbol(table, name, entry) == 0; } void glsl_symbol_table::add_global_function(ir_function *f) { - symbol_table_entry *entry = new(mem_ctx) symbol_table_entry(f); - int added = _mesa_symbol_table_add_global_symbol(table, -1, f->name, entry); + symbol_table_entry *entry = new(linalloc) symbol_table_entry(f); + int added = _mesa_symbol_table_add_global_symbol(table, f->name, entry); assert(added == 0); (void)added; } @@ -261,7 +265,7 @@ symbol_table_entry *glsl_symbol_table::get_entry(const char *name) { return (symbol_table_entry *) - _mesa_symbol_table_find_symbol(table, -1, name); + _mesa_symbol_table_find_symbol(table, name); } void diff -Nru mesa-12.0.6/src/compiler/glsl/glsl_symbol_table.h mesa-17.0.7/src/compiler/glsl/glsl_symbol_table.h --- mesa-12.0.6/src/compiler/glsl/glsl_symbol_table.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/glsl_symbol_table.h 2017-06-01 10:37:10.000000000 +0000 @@ -110,6 +110,7 @@ struct _mesa_symbol_table *table; void *mem_ctx; + void *linalloc; }; #endif /* GLSL_SYMBOL_TABLE */ diff -Nru mesa-12.0.6/src/compiler/glsl/glsl_to_nir.cpp mesa-17.0.7/src/compiler/glsl/glsl_to_nir.cpp --- mesa-12.0.6/src/compiler/glsl/glsl_to_nir.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/glsl_to_nir.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -129,77 +129,50 @@ } /* end of anonymous namespace */ +static void +nir_remap_attributes(nir_shader *shader) +{ + nir_foreach_variable(var, &shader->inputs) { + var->data.location += _mesa_bitcount_64(shader->info->double_inputs_read & + BITFIELD64_MASK(var->data.location)); + } + + /* Once the remap is done, reset double_inputs_read, so later it will have + * which location/slots are doubles */ + shader->info->double_inputs_read = 0; +} + nir_shader * glsl_to_nir(const struct gl_shader_program *shader_prog, gl_shader_stage stage, const nir_shader_compiler_options *options) { - struct gl_shader *sh = shader_prog->_LinkedShaders[stage]; + struct gl_linked_shader *sh = shader_prog->_LinkedShaders[stage]; - nir_shader *shader = nir_shader_create(NULL, stage, options); + nir_shader *shader = nir_shader_create(NULL, stage, options, + &sh->Program->info); nir_visitor v1(shader); nir_function_visitor v2(&v1); v2.run(sh->ir); visit_exec_list(sh->ir, &v1); - shader->info.name = ralloc_asprintf(shader, "GLSL%d", shader_prog->Name); - if (shader_prog->Label) - shader->info.label = ralloc_strdup(shader, shader_prog->Label); - shader->info.num_textures = _mesa_fls(sh->Program->SamplersUsed); - shader->info.num_ubos = sh->NumUniformBlocks; - shader->info.num_abos = shader_prog->NumAtomicBuffers; - shader->info.num_ssbos = sh->NumShaderStorageBlocks; - shader->info.num_images = sh->NumImages; - shader->info.inputs_read = sh->Program->InputsRead; - shader->info.double_inputs_read = sh->Program->DoubleInputsRead; - shader->info.outputs_written = sh->Program->OutputsWritten; - shader->info.patch_inputs_read = sh->Program->PatchInputsRead; - shader->info.patch_outputs_written = sh->Program->PatchOutputsWritten; - shader->info.system_values_read = sh->Program->SystemValuesRead; - shader->info.uses_texture_gather = sh->Program->UsesGather; - shader->info.uses_clip_distance_out = - sh->Program->ClipDistanceArraySize != 0; - shader->info.separate_shader = shader_prog->SeparateShader; - shader->info.has_transform_feedback_varyings = - shader_prog->TransformFeedback.NumVarying > 0; - - switch (stage) { - case MESA_SHADER_TESS_CTRL: - shader->info.tcs.vertices_out = shader_prog->TessCtrl.VerticesOut; - break; - - case MESA_SHADER_GEOMETRY: - shader->info.gs.vertices_in = shader_prog->Geom.VerticesIn; - shader->info.gs.output_primitive = sh->Geom.OutputType; - shader->info.gs.vertices_out = sh->Geom.VerticesOut; - shader->info.gs.invocations = sh->Geom.Invocations; - shader->info.gs.uses_end_primitive = shader_prog->Geom.UsesEndPrimitive; - shader->info.gs.uses_streams = shader_prog->Geom.UsesStreams; - break; - - case MESA_SHADER_FRAGMENT: { - struct gl_fragment_program *fp = - (struct gl_fragment_program *)sh->Program; - - shader->info.fs.uses_discard = fp->UsesKill; - shader->info.fs.uses_sample_qualifier = fp->IsSample != 0; - shader->info.fs.early_fragment_tests = sh->EarlyFragmentTests; - shader->info.fs.depth_layout = fp->FragDepthLayout; - break; - } + nir_lower_constant_initializers(shader, (nir_variable_mode)~0); - case MESA_SHADER_COMPUTE: { - struct gl_compute_program *cp = (struct gl_compute_program *)sh->Program; - shader->info.cs.local_size[0] = cp->LocalSize[0]; - shader->info.cs.local_size[1] = cp->LocalSize[1]; - shader->info.cs.local_size[2] = cp->LocalSize[2]; - break; - } + /* Remap the locations to slots so those requiring two slots will occupy + * two locations. For instance, if we have in the IR code a dvec3 attr0 in + * location 0 and vec4 attr1 in location 1, in NIR attr0 will use + * locations/slots 0 and 1, and attr1 will use location/slot 2 */ + if (shader->stage == MESA_SHADER_VERTEX) + nir_remap_attributes(shader); - default: - break; /* No stage-specific info */ - } + shader->info->name = ralloc_asprintf(shader, "GLSL%d", shader_prog->Name); + if (shader_prog->Label) + shader->info->label = ralloc_strdup(shader, shader_prog->Label); + shader->info->clip_distance_array_size = sh->Program->ClipDistanceArraySize; + shader->info->cull_distance_array_size = sh->Program->CullDistanceArraySize; + shader->info->has_transform_feedback_varyings = + shader_prog->TransformFeedback.NumVarying > 0; return shader; } @@ -243,34 +216,51 @@ nir_constant *ret = ralloc(mem_ctx, nir_constant); - unsigned total_elems = ir->type->components(); + const unsigned rows = ir->type->vector_elements; + const unsigned cols = ir->type->matrix_columns; unsigned i; ret->num_elements = 0; switch (ir->type->base_type) { case GLSL_TYPE_UINT: - for (i = 0; i < total_elems; i++) - ret->value.u[i] = ir->value.u[i]; + /* Only float base types can be matrices. */ + assert(cols == 1); + + for (unsigned r = 0; r < rows; r++) + ret->values[0].u32[r] = ir->value.u[r]; + break; case GLSL_TYPE_INT: - for (i = 0; i < total_elems; i++) - ret->value.i[i] = ir->value.i[i]; + /* Only float base types can be matrices. */ + assert(cols == 1); + + for (unsigned r = 0; r < rows; r++) + ret->values[0].i32[r] = ir->value.i[r]; + break; case GLSL_TYPE_FLOAT: - for (i = 0; i < total_elems; i++) - ret->value.f[i] = ir->value.f[i]; + for (unsigned c = 0; c < cols; c++) { + for (unsigned r = 0; r < rows; r++) + ret->values[c].f32[r] = ir->value.f[c * rows + r]; + } break; case GLSL_TYPE_DOUBLE: - for (i = 0; i < total_elems; i++) - ret->value.d[i] = ir->value.d[i]; + for (unsigned c = 0; c < cols; c++) { + for (unsigned r = 0; r < rows; r++) + ret->values[c].f64[r] = ir->value.d[c * rows + r]; + } break; case GLSL_TYPE_BOOL: - for (i = 0; i < total_elems; i++) - ret->value.b[i] = ir->value.b[i]; + /* Only float base types can be matrices. */ + assert(cols == 1); + + for (unsigned r = 0; r < rows; r++) + ret->values[0].u32[r] = ir->value.b[r] ? NIR_TRUE : NIR_FALSE; + break; case GLSL_TYPE_STRUCT: @@ -314,6 +304,7 @@ var->data.patch = ir->data.patch; var->data.invariant = ir->data.invariant; var->data.location = ir->data.location; + var->data.compact = false; switch(ir->data.mode) { case ir_var_auto: @@ -344,11 +335,30 @@ var->data.mode = nir_var_system_value; } else { var->data.mode = nir_var_shader_in; + + if (shader->stage == MESA_SHADER_TESS_EVAL && + (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER || + ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) { + var->data.compact = ir->type->without_array()->is_scalar(); + } + } + + /* Mark all the locations that require two slots */ + if (glsl_type_is_dual_slot(glsl_without_array(var->type))) { + for (uint i = 0; i < glsl_count_attribute_slots(var->type, true); i++) { + uint64_t bitfield = BITFIELD64_BIT(var->data.location + i); + shader->info->double_inputs_read |= bitfield; + } } break; case ir_var_shader_out: var->data.mode = nir_var_shader_out; + if (shader->stage == MESA_SHADER_TESS_CTRL && + (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER || + ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) { + var->data.compact = ir->type->without_array()->is_scalar(); + } break; case ir_var_uniform: @@ -370,10 +380,6 @@ var->data.interpolation = ir->data.interpolation; var->data.origin_upper_left = ir->data.origin_upper_left; var->data.pixel_center_integer = ir->data.pixel_center_integer; - var->data.explicit_location = ir->data.explicit_location; - var->data.explicit_index = ir->data.explicit_index; - var->data.explicit_binding = ir->data.explicit_binding; - var->data.has_initializer = ir->data.has_initializer; var->data.location_frac = ir->data.location_frac; switch (ir->data.depth_layout) { @@ -405,7 +411,7 @@ var->data.image._volatile = ir->data.image_volatile; var->data.image.restrict_flag = ir->data.image_restrict; var->data.image.format = ir->data.image_format; - var->data.max_array_access = ir->data.max_array_access; + var->data.fb_fetch_output = ir->data.fb_fetch_output; var->num_state_slots = ir->get_num_state_slots(); if (var->num_state_slots > 0) { @@ -447,7 +453,7 @@ void nir_visitor::create_function(ir_function_signature *ir) { - if (ir->is_intrinsic) + if (ir->is_intrinsic()) return; nir_function *func = nir_function_create(shader, ir->function_name()); @@ -468,7 +474,7 @@ void nir_visitor::visit(ir_function_signature *ir) { - if (ir->is_intrinsic) + if (ir->is_intrinsic()) return; struct hash_entry *entry = @@ -605,53 +611,101 @@ void nir_visitor::visit(ir_call *ir) { - if (ir->callee->is_intrinsic) { + if (ir->callee->is_intrinsic()) { nir_intrinsic_op op; - if (strcmp(ir->callee_name(), "__intrinsic_atomic_read") == 0) { + + switch (ir->callee->intrinsic_id) { + case ir_intrinsic_atomic_counter_read: op = nir_intrinsic_atomic_counter_read_var; - } else if (strcmp(ir->callee_name(), "__intrinsic_atomic_increment") == 0) { + break; + case ir_intrinsic_atomic_counter_increment: op = nir_intrinsic_atomic_counter_inc_var; - } else if (strcmp(ir->callee_name(), "__intrinsic_atomic_predecrement") == 0) { + break; + case ir_intrinsic_atomic_counter_predecrement: op = nir_intrinsic_atomic_counter_dec_var; - } else if (strcmp(ir->callee_name(), "__intrinsic_image_load") == 0) { + break; + case ir_intrinsic_atomic_counter_add: + op = nir_intrinsic_atomic_counter_add_var; + break; + case ir_intrinsic_atomic_counter_and: + op = nir_intrinsic_atomic_counter_and_var; + break; + case ir_intrinsic_atomic_counter_or: + op = nir_intrinsic_atomic_counter_or_var; + break; + case ir_intrinsic_atomic_counter_xor: + op = nir_intrinsic_atomic_counter_xor_var; + break; + case ir_intrinsic_atomic_counter_min: + op = nir_intrinsic_atomic_counter_min_var; + break; + case ir_intrinsic_atomic_counter_max: + op = nir_intrinsic_atomic_counter_max_var; + break; + case ir_intrinsic_atomic_counter_exchange: + op = nir_intrinsic_atomic_counter_exchange_var; + break; + case ir_intrinsic_atomic_counter_comp_swap: + op = nir_intrinsic_atomic_counter_comp_swap_var; + break; + case ir_intrinsic_image_load: op = nir_intrinsic_image_load; - } else if (strcmp(ir->callee_name(), "__intrinsic_image_store") == 0) { + break; + case ir_intrinsic_image_store: op = nir_intrinsic_image_store; - } else if (strcmp(ir->callee_name(), "__intrinsic_image_atomic_add") == 0) { + break; + case ir_intrinsic_image_atomic_add: op = nir_intrinsic_image_atomic_add; - } else if (strcmp(ir->callee_name(), "__intrinsic_image_atomic_min") == 0) { + break; + case ir_intrinsic_image_atomic_min: op = nir_intrinsic_image_atomic_min; - } else if (strcmp(ir->callee_name(), "__intrinsic_image_atomic_max") == 0) { + break; + case ir_intrinsic_image_atomic_max: op = nir_intrinsic_image_atomic_max; - } else if (strcmp(ir->callee_name(), "__intrinsic_image_atomic_and") == 0) { + break; + case ir_intrinsic_image_atomic_and: op = nir_intrinsic_image_atomic_and; - } else if (strcmp(ir->callee_name(), "__intrinsic_image_atomic_or") == 0) { + break; + case ir_intrinsic_image_atomic_or: op = nir_intrinsic_image_atomic_or; - } else if (strcmp(ir->callee_name(), "__intrinsic_image_atomic_xor") == 0) { + break; + case ir_intrinsic_image_atomic_xor: op = nir_intrinsic_image_atomic_xor; - } else if (strcmp(ir->callee_name(), "__intrinsic_image_atomic_exchange") == 0) { + break; + case ir_intrinsic_image_atomic_exchange: op = nir_intrinsic_image_atomic_exchange; - } else if (strcmp(ir->callee_name(), "__intrinsic_image_atomic_comp_swap") == 0) { + break; + case ir_intrinsic_image_atomic_comp_swap: op = nir_intrinsic_image_atomic_comp_swap; - } else if (strcmp(ir->callee_name(), "__intrinsic_memory_barrier") == 0) { + break; + case ir_intrinsic_memory_barrier: op = nir_intrinsic_memory_barrier; - } else if (strcmp(ir->callee_name(), "__intrinsic_image_size") == 0) { + break; + case ir_intrinsic_image_size: op = nir_intrinsic_image_size; - } else if (strcmp(ir->callee_name(), "__intrinsic_image_samples") == 0) { + break; + case ir_intrinsic_image_samples: op = nir_intrinsic_image_samples; - } else if (strcmp(ir->callee_name(), "__intrinsic_store_ssbo") == 0) { + break; + case ir_intrinsic_ssbo_store: op = nir_intrinsic_store_ssbo; - } else if (strcmp(ir->callee_name(), "__intrinsic_load_ssbo") == 0) { + break; + case ir_intrinsic_ssbo_load: op = nir_intrinsic_load_ssbo; - } else if (strcmp(ir->callee_name(), "__intrinsic_atomic_add_ssbo") == 0) { + break; + case ir_intrinsic_ssbo_atomic_add: op = nir_intrinsic_ssbo_atomic_add; - } else if (strcmp(ir->callee_name(), "__intrinsic_atomic_and_ssbo") == 0) { + break; + case ir_intrinsic_ssbo_atomic_and: op = nir_intrinsic_ssbo_atomic_and; - } else if (strcmp(ir->callee_name(), "__intrinsic_atomic_or_ssbo") == 0) { + break; + case ir_intrinsic_ssbo_atomic_or: op = nir_intrinsic_ssbo_atomic_or; - } else if (strcmp(ir->callee_name(), "__intrinsic_atomic_xor_ssbo") == 0) { + break; + case ir_intrinsic_ssbo_atomic_xor: op = nir_intrinsic_ssbo_atomic_xor; - } else if (strcmp(ir->callee_name(), "__intrinsic_atomic_min_ssbo") == 0) { + break; + case ir_intrinsic_ssbo_atomic_min: assert(ir->return_deref); if (ir->return_deref->type == glsl_type::int_type) op = nir_intrinsic_ssbo_atomic_imin; @@ -659,7 +713,8 @@ op = nir_intrinsic_ssbo_atomic_umin; else unreachable("Invalid type"); - } else if (strcmp(ir->callee_name(), "__intrinsic_atomic_max_ssbo") == 0) { + break; + case ir_intrinsic_ssbo_atomic_max: assert(ir->return_deref); if (ir->return_deref->type == glsl_type::int_type) op = nir_intrinsic_ssbo_atomic_imax; @@ -667,35 +722,50 @@ op = nir_intrinsic_ssbo_atomic_umax; else unreachable("Invalid type"); - } else if (strcmp(ir->callee_name(), "__intrinsic_atomic_exchange_ssbo") == 0) { + break; + case ir_intrinsic_ssbo_atomic_exchange: op = nir_intrinsic_ssbo_atomic_exchange; - } else if (strcmp(ir->callee_name(), "__intrinsic_atomic_comp_swap_ssbo") == 0) { + break; + case ir_intrinsic_ssbo_atomic_comp_swap: op = nir_intrinsic_ssbo_atomic_comp_swap; - } else if (strcmp(ir->callee_name(), "__intrinsic_shader_clock") == 0) { + break; + case ir_intrinsic_shader_clock: op = nir_intrinsic_shader_clock; - } else if (strcmp(ir->callee_name(), "__intrinsic_group_memory_barrier") == 0) { + break; + case ir_intrinsic_group_memory_barrier: op = nir_intrinsic_group_memory_barrier; - } else if (strcmp(ir->callee_name(), "__intrinsic_memory_barrier_atomic_counter") == 0) { + break; + case ir_intrinsic_memory_barrier_atomic_counter: op = nir_intrinsic_memory_barrier_atomic_counter; - } else if (strcmp(ir->callee_name(), "__intrinsic_memory_barrier_buffer") == 0) { + break; + case ir_intrinsic_memory_barrier_buffer: op = nir_intrinsic_memory_barrier_buffer; - } else if (strcmp(ir->callee_name(), "__intrinsic_memory_barrier_image") == 0) { + break; + case ir_intrinsic_memory_barrier_image: op = nir_intrinsic_memory_barrier_image; - } else if (strcmp(ir->callee_name(), "__intrinsic_memory_barrier_shared") == 0) { + break; + case ir_intrinsic_memory_barrier_shared: op = nir_intrinsic_memory_barrier_shared; - } else if (strcmp(ir->callee_name(), "__intrinsic_load_shared") == 0) { + break; + case ir_intrinsic_shared_load: op = nir_intrinsic_load_shared; - } else if (strcmp(ir->callee_name(), "__intrinsic_store_shared") == 0) { + break; + case ir_intrinsic_shared_store: op = nir_intrinsic_store_shared; - } else if (strcmp(ir->callee_name(), "__intrinsic_atomic_add_shared") == 0) { + break; + case ir_intrinsic_shared_atomic_add: op = nir_intrinsic_shared_atomic_add; - } else if (strcmp(ir->callee_name(), "__intrinsic_atomic_and_shared") == 0) { + break; + case ir_intrinsic_shared_atomic_and: op = nir_intrinsic_shared_atomic_and; - } else if (strcmp(ir->callee_name(), "__intrinsic_atomic_or_shared") == 0) { + break; + case ir_intrinsic_shared_atomic_or: op = nir_intrinsic_shared_atomic_or; - } else if (strcmp(ir->callee_name(), "__intrinsic_atomic_xor_shared") == 0) { + break; + case ir_intrinsic_shared_atomic_xor: op = nir_intrinsic_shared_atomic_xor; - } else if (strcmp(ir->callee_name(), "__intrinsic_atomic_min_shared") == 0) { + break; + case ir_intrinsic_shared_atomic_min: assert(ir->return_deref); if (ir->return_deref->type == glsl_type::int_type) op = nir_intrinsic_shared_atomic_imin; @@ -703,7 +773,8 @@ op = nir_intrinsic_shared_atomic_umin; else unreachable("Invalid type"); - } else if (strcmp(ir->callee_name(), "__intrinsic_atomic_max_shared") == 0) { + break; + case ir_intrinsic_shared_atomic_max: assert(ir->return_deref); if (ir->return_deref->type == glsl_type::int_type) op = nir_intrinsic_shared_atomic_imax; @@ -711,11 +782,14 @@ op = nir_intrinsic_shared_atomic_umax; else unreachable("Invalid type"); - } else if (strcmp(ir->callee_name(), "__intrinsic_atomic_exchange_shared") == 0) { + break; + case ir_intrinsic_shared_atomic_exchange: op = nir_intrinsic_shared_atomic_exchange; - } else if (strcmp(ir->callee_name(), "__intrinsic_atomic_comp_swap_shared") == 0) { + break; + case ir_intrinsic_shared_atomic_comp_swap: op = nir_intrinsic_shared_atomic_comp_swap; - } else { + break; + default: unreachable("not reached"); } @@ -725,11 +799,40 @@ switch (op) { case nir_intrinsic_atomic_counter_read_var: case nir_intrinsic_atomic_counter_inc_var: - case nir_intrinsic_atomic_counter_dec_var: { - ir_dereference *param = - (ir_dereference *) ir->actual_parameters.get_head(); - instr->variables[0] = evaluate_deref(&instr->instr, param); - nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL); + case nir_intrinsic_atomic_counter_dec_var: + case nir_intrinsic_atomic_counter_add_var: + case nir_intrinsic_atomic_counter_min_var: + case nir_intrinsic_atomic_counter_max_var: + case nir_intrinsic_atomic_counter_and_var: + case nir_intrinsic_atomic_counter_or_var: + case nir_intrinsic_atomic_counter_xor_var: + case nir_intrinsic_atomic_counter_exchange_var: + case nir_intrinsic_atomic_counter_comp_swap_var: { + /* Set the counter variable dereference. */ + exec_node *param = ir->actual_parameters.get_head(); + ir_dereference *counter = (ir_dereference *)param; + + instr->variables[0] = evaluate_deref(&instr->instr, counter); + param = param->get_next(); + + /* Set the intrinsic destination. */ + if (ir->return_deref) { + nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL); + } + + /* Set the intrinsic parameters. */ + if (!param->is_tail_sentinel()) { + instr->src[0] = + nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param)); + param = param->get_next(); + } + + if (!param->is_tail_sentinel()) { + instr->src[1] = + nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param)); + param = param->get_next(); + } + nir_builder_instr_insert(&b, &instr->instr); break; } @@ -824,7 +927,8 @@ nir_builder_instr_insert(&b, &instr->instr); break; case nir_intrinsic_shader_clock: - nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL); + nir_ssa_dest_init(&instr->instr, &instr->dest, 2, 32, NULL); + instr->num_components = 2; nir_builder_instr_insert(&b, &instr->instr); break; case nir_intrinsic_store_ssbo: { @@ -1111,8 +1215,7 @@ nir_intrinsic_instr_create(this->shader, nir_intrinsic_store_var); store->num_components = ir->lhs->type->vector_elements; nir_intrinsic_set_write_mask(store, ir->write_mask); - nir_deref *store_deref = nir_copy_deref(store, &lhs_deref->deref); - store->variables[0] = nir_deref_as_var(store_deref); + store->variables[0] = nir_deref_var_clone(lhs_deref, store); store->src[0] = nir_src_for_ssa(src); if (ir->condition) { @@ -1284,9 +1387,6 @@ intrin->intrinsic == nir_intrinsic_interp_var_at_sample) intrin->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1])); - if (intrin->intrinsic == nir_intrinsic_interp_var_at_offset) - shader->info.uses_interp_var_at_offset = true; - unsigned bit_size = glsl_get_bit_size(deref->type); add_instr(&intrin->instr, deref->type->vector_elements, bit_size); @@ -1833,7 +1933,7 @@ if (ir->projector != NULL) num_srcs++; - if (ir->shadow_comparitor != NULL) + if (ir->shadow_comparator != NULL) num_srcs++; if (ir->offset != NULL) num_srcs++; @@ -1881,10 +1981,10 @@ src_number++; } - if (ir->shadow_comparitor != NULL) { + if (ir->shadow_comparator != NULL) { instr->src[src_number].src = - nir_src_for_ssa(evaluate_rvalue(ir->shadow_comparitor)); - instr->src[src_number].src_type = nir_tex_src_comparitor; + nir_src_for_ssa(evaluate_rvalue(ir->shadow_comparator)); + instr->src[src_number].src_type = nir_tex_src_comparator; src_number++; } @@ -1953,7 +2053,7 @@ nir_visitor::visit(ir_constant *ir) { /* - * We don't know if this variable is an an array or struct that gets + * We don't know if this variable is an array or struct that gets * dereferenced, so do the safe thing an make it a variable with a * constant initializer and return a dereference. */ diff -Nru mesa-12.0.6/src/compiler/glsl/ir_array_refcount.cpp mesa-17.0.7/src/compiler/glsl/ir_array_refcount.cpp --- mesa-12.0.6/src/compiler/glsl/ir_array_refcount.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ir_array_refcount.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,254 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/** + * \file ir_array_refcount.cpp + * + * Provides a visitor which produces a list of variables referenced. + */ + +#include "ir.h" +#include "ir_visitor.h" +#include "ir_array_refcount.h" +#include "compiler/glsl_types.h" +#include "util/hash_table.h" + +ir_array_refcount_visitor::ir_array_refcount_visitor() + : last_array_deref(0), derefs(0), num_derefs(0), derefs_size(0) +{ + this->mem_ctx = ralloc_context(NULL); + this->ht = _mesa_hash_table_create(NULL, _mesa_hash_pointer, + _mesa_key_pointer_equal); +} + +static void +free_entry(struct hash_entry *entry) +{ + ir_array_refcount_entry *ivre = (ir_array_refcount_entry *) entry->data; + delete ivre; +} + +ir_array_refcount_visitor::~ir_array_refcount_visitor() +{ + ralloc_free(this->mem_ctx); + _mesa_hash_table_destroy(this->ht, free_entry); +} + +ir_array_refcount_entry::ir_array_refcount_entry(ir_variable *var) + : var(var), is_referenced(false) +{ + num_bits = MAX2(1, var->type->arrays_of_arrays_size()); + bits = new BITSET_WORD[BITSET_WORDS(num_bits)]; + memset(bits, 0, BITSET_WORDS(num_bits) * sizeof(bits[0])); + + /* Count the "depth" of the arrays-of-arrays. */ + array_depth = 0; + for (const glsl_type *type = var->type; + type->is_array(); + type = type->fields.array) { + array_depth++; + } +} + + +ir_array_refcount_entry::~ir_array_refcount_entry() +{ + delete [] bits; +} + + +void +ir_array_refcount_entry::mark_array_elements_referenced(const array_deref_range *dr, + unsigned count) +{ + if (count != array_depth) + return; + + mark_array_elements_referenced(dr, count, 1, 0); +} + +void +ir_array_refcount_entry::mark_array_elements_referenced(const array_deref_range *dr, + unsigned count, + unsigned scale, + unsigned linearized_index) +{ + /* Walk through the list of array dereferences in least- to + * most-significant order. Along the way, accumulate the current + * linearized offset and the scale factor for each array-of-. + */ + for (unsigned i = 0; i < count; i++) { + if (dr[i].index < dr[i].size) { + linearized_index += dr[i].index * scale; + scale *= dr[i].size; + } else { + /* For each element in the current array, update the count and + * offset, then recurse to process the remaining arrays. + * + * There is some inefficency here if the last element in the + * array_deref_range list specifies the entire array. In that case, + * the loop will make recursive calls with count == 0. In the call, + * all that will happen is the bit will be set. + */ + for (unsigned j = 0; j < dr[i].size; j++) { + mark_array_elements_referenced(&dr[i + 1], + count - (i + 1), + scale * dr[i].size, + linearized_index + (j * scale)); + } + + return; + } + } + + BITSET_SET(bits, linearized_index); +} + +ir_array_refcount_entry * +ir_array_refcount_visitor::get_variable_entry(ir_variable *var) +{ + assert(var); + + struct hash_entry *e = _mesa_hash_table_search(this->ht, var); + if (e) + return (ir_array_refcount_entry *)e->data; + + ir_array_refcount_entry *entry = new ir_array_refcount_entry(var); + _mesa_hash_table_insert(this->ht, var, entry); + + return entry; +} + + +array_deref_range * +ir_array_refcount_visitor::get_array_deref() +{ + if ((num_derefs + 1) * sizeof(array_deref_range) > derefs_size) { + void *ptr = reralloc_size(mem_ctx, derefs, derefs_size + 4096); + + if (ptr == NULL) + return NULL; + + derefs_size += 4096; + derefs = (array_deref_range *)ptr; + } + + array_deref_range *d = &derefs[num_derefs]; + num_derefs++; + + return d; +} + +ir_visitor_status +ir_array_refcount_visitor::visit_enter(ir_dereference_array *ir) +{ + /* It could also be a vector or a matrix. Individual elements of vectors + * are natrices are not tracked, so bail. + */ + if (!ir->array->type->is_array()) + return visit_continue; + + /* If this array dereference is a child of an array dereference that was + * already visited, just continue on. Otherwise, for an arrays-of-arrays + * dereference like x[1][2][3][4], we'd process the [1][2][3][4] sequence, + * the [1][2][3] sequence, the [1][2] sequence, and the [1] sequence. This + * ensures that we only process the full sequence. + */ + if (last_array_deref && last_array_deref->array == ir) { + last_array_deref = ir; + return visit_continue; + } + + last_array_deref = ir; + + num_derefs = 0; + + ir_rvalue *rv = ir; + while (rv->ir_type == ir_type_dereference_array) { + ir_dereference_array *const deref = rv->as_dereference_array(); + + assert(deref != NULL); + assert(deref->array->type->is_array()); + + ir_rvalue *const array = deref->array; + const ir_constant *const idx = deref->array_index->as_constant(); + array_deref_range *const dr = get_array_deref(); + + dr->size = array->type->array_size(); + + if (idx != NULL) { + dr->index = idx->get_int_component(0); + } else { + /* An unsized array can occur at the end of an SSBO. We can't track + * accesses to such an array, so bail. + */ + if (array->type->array_size() == 0) + return visit_continue; + + dr->index = dr->size; + } + + rv = array; + } + + ir_dereference_variable *const var_deref = rv->as_dereference_variable(); + + /* If the array being dereferenced is not a variable, bail. At the very + * least, ir_constant and ir_dereference_record are possible. + */ + if (var_deref == NULL) + return visit_continue; + + ir_array_refcount_entry *const entry = + this->get_variable_entry(var_deref->var); + + if (entry == NULL) + return visit_stop; + + entry->mark_array_elements_referenced(derefs, num_derefs); + + return visit_continue; +} + + +ir_visitor_status +ir_array_refcount_visitor::visit(ir_dereference_variable *ir) +{ + ir_variable *const var = ir->variable_referenced(); + ir_array_refcount_entry *entry = this->get_variable_entry(var); + + entry->is_referenced = true; + + return visit_continue; +} + + +ir_visitor_status +ir_array_refcount_visitor::visit_enter(ir_function_signature *ir) +{ + /* We don't want to descend into the function parameters and + * dead-code eliminate them, so just accept the body here. + */ + visit_list_elements(this, &ir->body); + return visit_continue_with_parent; +} diff -Nru mesa-12.0.6/src/compiler/glsl/ir_array_refcount.h mesa-17.0.7/src/compiler/glsl/ir_array_refcount.h --- mesa-12.0.6/src/compiler/glsl/ir_array_refcount.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ir_array_refcount.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,183 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/** + * \file ir_array_refcount.h + * + * Provides a visitor which produces a list of variables referenced. + */ + +#include "ir.h" +#include "ir_visitor.h" +#include "compiler/glsl_types.h" +#include "util/bitset.h" + +/** + * Describes an access of an array element or an access of the whole array + */ +struct array_deref_range { + /** + * Index that was accessed. + * + * All valid array indices are less than the size of the array. If index + * is equal to the size of the array, this means the entire array has been + * accessed (e.g., due to use of a non-constant index). + */ + unsigned index; + + /** Size of the array. Used for offset calculations. */ + unsigned size; +}; + +class ir_array_refcount_entry +{ +public: + ir_array_refcount_entry(ir_variable *var); + ~ir_array_refcount_entry(); + + ir_variable *var; /* The key: the variable's pointer. */ + + /** Has the variable been referenced? */ + bool is_referenced; + + /** + * Mark a set of array elements as accessed. + * + * If every \c array_deref_range is for a single index, only a single + * element will be marked. If any \c array_deref_range is for an entire + * array-of-, then multiple elements will be marked. + * + * Items in the \c array_deref_range list appear in least- to + * most-significant order. This is the \b opposite order the indices + * appear in the GLSL shader text. An array access like + * + * x = y[1][i][3]; + * + * would appear as + * + * { { 3, n }, { m, m }, { 1, p } } + * + * where n, m, and p are the sizes of the arrays-of-arrays. + * + * The set of marked array elements can later be queried by + * \c ::is_linearized_index_referenced. + * + * \param dr List of array_deref_range elements to be processed. + * \param count Number of array_deref_range elements to be processed. + */ + void mark_array_elements_referenced(const array_deref_range *dr, + unsigned count); + + /** Has a linearized array index been referenced? */ + bool is_linearized_index_referenced(unsigned linearized_index) const + { + assert(bits != 0); + assert(linearized_index <= num_bits); + + return BITSET_TEST(bits, linearized_index); + } + +private: + /** Set of bit-flags to note which array elements have been accessed. */ + BITSET_WORD *bits; + + /** + * Total number of bits referenced by \c bits. + * + * Also the total number of array(s-of-arrays) elements of \c var. + */ + unsigned num_bits; + + /** Count of nested arrays in the type. */ + unsigned array_depth; + + /** + * Recursive part of the public mark_array_elements_referenced method. + * + * The recursion occurs when an entire array-of- is accessed. See the + * implementation for more details. + * + * \param dr List of array_deref_range elements to be + * processed. + * \param count Number of array_deref_range elements to be + * processed. + * \param scale Current offset scale. + * \param linearized_index Current accumulated linearized array index. + */ + void mark_array_elements_referenced(const array_deref_range *dr, + unsigned count, + unsigned scale, + unsigned linearized_index); + + friend class array_refcount_test; +}; + +class ir_array_refcount_visitor : public ir_hierarchical_visitor { +public: + ir_array_refcount_visitor(void); + ~ir_array_refcount_visitor(void); + + virtual ir_visitor_status visit(ir_dereference_variable *); + + virtual ir_visitor_status visit_enter(ir_function_signature *); + virtual ir_visitor_status visit_enter(ir_dereference_array *); + + /** + * Find variable in the hash table, and insert it if not present + */ + ir_array_refcount_entry *get_variable_entry(ir_variable *var); + + /** + * Hash table mapping ir_variable to ir_array_refcount_entry. + */ + struct hash_table *ht; + + void *mem_ctx; + +private: + /** Get an array_deref_range element from private tracking. */ + array_deref_range *get_array_deref(); + + /** + * Last ir_dereference_array that was visited + * + * Used to prevent some redundant calculations. + * + * \sa ::visit_enter(ir_dereference_array *) + */ + ir_dereference_array *last_array_deref; + + /** + * \name array_deref_range tracking + */ + /*@{*/ + /** Currently allocated block of derefs. */ + array_deref_range *derefs; + + /** Number of derefs used in current processing. */ + unsigned num_derefs; + + /** Size of the derefs buffer in bytes. */ + unsigned derefs_size; + /*@}*/ +}; diff -Nru mesa-12.0.6/src/compiler/glsl/ir_builder.cpp mesa-17.0.7/src/compiler/glsl/ir_builder.cpp --- mesa-12.0.6/src/compiler/glsl/ir_builder.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ir_builder.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -417,6 +417,12 @@ } ir_expression* +bit_xor(operand a, operand b) +{ + return expr(ir_binop_bit_xor, a, b); +} + +ir_expression* lshift(operand a, operand b) { return expr(ir_binop_lshift, a, b); diff -Nru mesa-12.0.6/src/compiler/glsl/ir_builder.h mesa-17.0.7/src/compiler/glsl/ir_builder.h --- mesa-12.0.6/src/compiler/glsl/ir_builder.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ir_builder.h 2017-06-01 10:37:10.000000000 +0000 @@ -168,6 +168,7 @@ ir_expression *bit_not(operand a); ir_expression *bit_or(operand a, operand b); ir_expression *bit_and(operand a, operand b); +ir_expression *bit_xor(operand a, operand b); ir_expression *lshift(operand a, operand b); ir_expression *rshift(operand a, operand b); diff -Nru mesa-12.0.6/src/compiler/glsl/ir_builder_print_visitor.cpp mesa-17.0.7/src/compiler/glsl/ir_builder_print_visitor.cpp --- mesa-12.0.6/src/compiler/glsl/ir_builder_print_visitor.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ir_builder_print_visitor.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,758 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#define __STDC_FORMAT_MACROS 1 +#include /* for PRIx64 macro */ +#include "ir.h" +#include "ir_hierarchical_visitor.h" +#include "ir_builder_print_visitor.h" +#include "compiler/glsl_types.h" +#include "glsl_parser_extras.h" +#include "main/macros.h" +#include "util/hash_table.h" + +class ir_builder_print_visitor : public ir_hierarchical_visitor { +public: + ir_builder_print_visitor(FILE *f); + virtual ~ir_builder_print_visitor(); + + void indent(void); + + virtual ir_visitor_status visit(class ir_variable *); + virtual ir_visitor_status visit(class ir_dereference_variable *); + virtual ir_visitor_status visit(class ir_constant *); + virtual ir_visitor_status visit(class ir_loop_jump *); + + virtual ir_visitor_status visit_enter(class ir_if *); + + virtual ir_visitor_status visit_enter(class ir_loop *); + virtual ir_visitor_status visit_leave(class ir_loop *); + + virtual ir_visitor_status visit_enter(class ir_function_signature *); + virtual ir_visitor_status visit_leave(class ir_function_signature *); + + virtual ir_visitor_status visit_enter(class ir_expression *); + + virtual ir_visitor_status visit_enter(class ir_assignment *); + virtual ir_visitor_status visit_leave(class ir_assignment *); + + virtual ir_visitor_status visit_leave(class ir_call *); + virtual ir_visitor_status visit_leave(class ir_swizzle *); + virtual ir_visitor_status visit_leave(class ir_return *); + +private: + void print_with_indent(const char *fmt, ...); + void print_without_indent(const char *fmt, ...); + + void print_without_declaration(const ir_rvalue *ir); + void print_without_declaration(const ir_constant *ir); + void print_without_declaration(const ir_dereference_variable *ir); + void print_without_declaration(const ir_swizzle *ir); + void print_without_declaration(const ir_expression *ir); + + unsigned next_ir_index; + + /** + * Mapping from ir_instruction * -> index used in the generated C code + * variable name. + */ + hash_table *index_map; + + FILE *f; + + int indentation; +}; + +/* An operand is "simple" if it can be compactly printed on one line. + */ +static bool +is_simple_operand(const ir_rvalue *ir, unsigned depth = 1) +{ + if (depth == 0) + return false; + + switch (ir->ir_type) { + case ir_type_dereference_variable: + return true; + + case ir_type_constant: { + if (ir->type == glsl_type::uint_type || + ir->type == glsl_type::int_type || + ir->type == glsl_type::float_type || + ir->type == glsl_type::bool_type) + return true; + + const ir_constant *const c = (ir_constant *) ir; + ir_constant_data all_zero; + memset(&all_zero, 0, sizeof(all_zero)); + + return memcmp(&c->value, &all_zero, sizeof(all_zero)) == 0; + } + + case ir_type_swizzle: { + const ir_swizzle *swiz = (ir_swizzle *) ir; + return swiz->mask.num_components == 1 && + is_simple_operand(swiz->val, depth); + } + + case ir_type_expression: { + const ir_expression *expr = (ir_expression *) ir; + + for (unsigned i = 0; i < expr->get_num_operands(); i++) { + if (!is_simple_operand(expr->operands[i], depth - 1)) + return false; + } + + return true; + } + + default: + return false; + } +} + +void +_mesa_print_builder_for_ir(FILE *f, exec_list *instructions) +{ + ir_builder_print_visitor v(f); + v.run(instructions); +} + +ir_builder_print_visitor::ir_builder_print_visitor(FILE *f) + : next_ir_index(1), f(f), indentation(0) +{ + index_map = + _mesa_hash_table_create(NULL, _mesa_hash_pointer, _mesa_key_pointer_equal); +} + +ir_builder_print_visitor::~ir_builder_print_visitor() +{ + _mesa_hash_table_destroy(index_map, NULL); +} + +void ir_builder_print_visitor::indent(void) +{ + for (int i = 0; i < indentation; i++) + fprintf(f, " "); +} + +void +ir_builder_print_visitor::print_with_indent(const char *fmt, ...) +{ + va_list ap; + + indent(); + + va_start(ap, fmt); + vfprintf(f, fmt, ap); + va_end(ap); +} + +void +ir_builder_print_visitor::print_without_indent(const char *fmt, ...) +{ + va_list ap; + + va_start(ap, fmt); + vfprintf(f, fmt, ap); + va_end(ap); +} + +void +ir_builder_print_visitor::print_without_declaration(const ir_rvalue *ir) +{ + switch (ir->ir_type) { + case ir_type_dereference_variable: + print_without_declaration((ir_dereference_variable *) ir); + break; + case ir_type_constant: + print_without_declaration((ir_constant *) ir); + break; + case ir_type_swizzle: + print_without_declaration((ir_swizzle *) ir); + break; + case ir_type_expression: + print_without_declaration((ir_expression *) ir); + break; + default: + unreachable("Invalid IR type."); + } +} + +ir_visitor_status +ir_builder_print_visitor::visit(ir_variable *ir) +{ + const unsigned my_index = next_ir_index++; + + _mesa_hash_table_insert(index_map, ir, (void *)(uintptr_t) my_index); + + const char *mode_str; + switch (ir->data.mode) { + case ir_var_auto: mode_str = "ir_var_auto"; break; + case ir_var_uniform: mode_str = "ir_var_uniform"; break; + case ir_var_shader_storage: mode_str = "ir_var_shader_storage"; break; + case ir_var_shader_shared: mode_str = "ir_var_shader_shared"; break; + case ir_var_shader_in: mode_str = "ir_var_shader_in"; break; + case ir_var_shader_out: mode_str = "ir_var_shader_out"; break; + case ir_var_function_in: mode_str = "ir_var_function_in"; break; + case ir_var_function_out: mode_str = "ir_var_function_out"; break; + case ir_var_function_inout: mode_str = "ir_var_function_inout"; break; + case ir_var_const_in: mode_str = "ir_var_const_in"; break; + case ir_var_system_value: mode_str = "ir_var_system_value"; break; + case ir_var_temporary: mode_str = "ir_var_temporary"; break; + default: + unreachable("Invalid variable mode"); + } + + if (ir->data.mode == ir_var_temporary) { + print_with_indent("ir_variable *const r%04X = body.make_temp(glsl_type::%s_type, \"%s\");\n", + my_index, + ir->type->name, + ir->name); + } else { + print_with_indent("ir_variable *const r%04X = new(mem_ctx) ir_variable(glsl_type::%s_type, \"%s\", %s);\n", + my_index, + ir->type->name, + ir->name, + mode_str); + + switch (ir->data.mode) { + case ir_var_function_in: + case ir_var_function_out: + case ir_var_function_inout: + case ir_var_const_in: + print_with_indent("sig_parameters.push_tail(r%04X);\n", my_index); + break; + default: + print_with_indent("body.emit(r%04X);\n", my_index); + break; + } + } + + return visit_continue; +} + +void +ir_builder_print_visitor::print_without_declaration(const ir_dereference_variable *ir) +{ + const struct hash_entry *const he = + _mesa_hash_table_search(index_map, ir->var); + + print_without_indent("r%04X", (unsigned)(uintptr_t) he->data); +} + +ir_visitor_status +ir_builder_print_visitor::visit(ir_dereference_variable *ir) +{ + const struct hash_entry *const he = + _mesa_hash_table_search(index_map, ir->var); + + if (he != NULL) + _mesa_hash_table_insert(index_map, ir, he->data); + + return visit_continue; +} + +ir_visitor_status +ir_builder_print_visitor::visit_enter(ir_function_signature *ir) +{ + if (!ir->is_defined) + return visit_continue_with_parent; + + print_with_indent("ir_function_signature *\n" + "%s(void *mem_ctx, builtin_available_predicate avail)\n" + "{\n", + ir->function_name()); + indentation++; + print_with_indent("ir_function_signature *const sig =\n"); + print_with_indent(" new(mem_ctx) ir_function_signature(glsl_type::%s_type, avail);\n", + ir->return_type->name); + + print_with_indent("ir_factory body(&sig->body, mem_ctx);\n"); + print_with_indent("sig->is_defined = true;\n\n"); + + if (!ir->parameters.is_empty()) + print_with_indent("exec_list sig_parameters;\n\n"); + + return visit_continue; +} + +ir_visitor_status +ir_builder_print_visitor::visit_leave(ir_function_signature *ir) +{ + if (!ir->parameters.is_empty()) + print_with_indent("sig->replace_parameters(&sig_parameters);\n"); + + print_with_indent("return sig;\n"); + indentation--; + print_with_indent("}\n"); + return visit_continue; +} + +void +ir_builder_print_visitor::print_without_declaration(const ir_constant *ir) +{ + if (ir->type->is_scalar()) { + switch (ir->type->base_type) { + case GLSL_TYPE_UINT: + print_without_indent("body.constant(%uu)", ir->value.u[0]); + return; + case GLSL_TYPE_INT: + print_without_indent("body.constant(int(%d))", ir->value.i[0]); + return; + case GLSL_TYPE_FLOAT: + print_without_indent("body.constant(%ff)", ir->value.f[0]); + return; + case GLSL_TYPE_BOOL: + print_without_indent("body.constant(%s)", + ir->value.i[0] != 0 ? "true" : "false"); + return; + default: + break; + } + } + + ir_constant_data all_zero; + memset(&all_zero, 0, sizeof(all_zero)); + + if (memcmp(&ir->value, &all_zero, sizeof(all_zero)) == 0) { + print_without_indent("ir_constant::zero(mem_ctx, glsl_type::%s_type)", + ir->type->name); + } +} + +ir_visitor_status +ir_builder_print_visitor::visit(ir_constant *ir) +{ + const unsigned my_index = next_ir_index++; + + _mesa_hash_table_insert(index_map, ir, (void *)(uintptr_t) my_index); + + if (ir->type == glsl_type::uint_type || + ir->type == glsl_type::int_type || + ir->type == glsl_type::float_type || + ir->type == glsl_type::bool_type) { + print_with_indent("ir_constant *const r%04X = ", my_index); + print_without_declaration(ir); + print_without_indent(";\n"); + return visit_continue; + } + + ir_constant_data all_zero; + memset(&all_zero, 0, sizeof(all_zero)); + + if (memcmp(&ir->value, &all_zero, sizeof(all_zero)) == 0) { + print_with_indent("ir_constant *const r%04X = ", my_index); + print_without_declaration(ir); + print_without_indent(";\n"); + } else { + print_with_indent("ir_constant_data r%04X_data;\n", my_index); + print_with_indent("memset(&r%04X_data, 0, sizeof(ir_constant_data));\n", + my_index); + for (unsigned i = 0; i < 16; i++) { + switch (ir->type->base_type) { + case GLSL_TYPE_UINT: + if (ir->value.u[i] != 0) + print_without_indent("r%04X_data.u[%u] = %u;\n", + my_index, i, ir->value.u[i]); + break; + case GLSL_TYPE_INT: + if (ir->value.i[i] != 0) + print_without_indent("r%04X_data.i[%u] = %i;\n", + my_index, i, ir->value.i[i]); + break; + case GLSL_TYPE_FLOAT: + if (ir->value.u[i] != 0) + print_without_indent("r%04X_data.u[%u] = 0x%08x; /* %f */\n", + my_index, + i, + ir->value.u[i], + ir->value.f[i]); + break; + case GLSL_TYPE_DOUBLE: { + uint64_t v; + + STATIC_ASSERT(sizeof(double) == sizeof(uint64_t)); + + memcpy(&v, &ir->value.d[i], sizeof(v)); + if (v != 0) + /* FIXME: This won't actually work until ARB_gpu_shader_int64 + * support lands. + */ + print_without_indent("r%04X_data.u64[%u] = 0x%016" PRIx64 "; /* %g */\n", + my_index, i, v, ir->value.d[i]); + break; + } + case GLSL_TYPE_BOOL: + if (ir->value.u[i] != 0) + print_without_indent("r%04X_data.u[%u] = 1;\n", my_index, i); + break; + default: + unreachable("Invalid constant type"); + } + } + + print_with_indent("ir_constant *const r%04X = new(mem_ctx) ir_constant(glsl_type::%s_type, &r%04X_data);\n", + my_index, + ir->type->name, + my_index); + } + + return visit_continue; +} + +void +ir_builder_print_visitor::print_without_declaration(const ir_swizzle *ir) +{ + const struct hash_entry *const he = + _mesa_hash_table_search(index_map, ir->val); + + if (ir->mask.num_components == 1) { + static const char swiz[4] = { 'x', 'y', 'z', 'w' }; + + if (is_simple_operand(ir->val)) { + print_without_indent("swizzle_%c(", swiz[ir->mask.x]); + print_without_declaration(ir->val); + print_without_indent(")"); + } else { + print_without_indent("swizzle_%c(r%04X)", + swiz[ir->mask.x], + (unsigned)(uintptr_t) he->data); + } + } else { + static const char swiz[4] = { 'X', 'Y', 'Z', 'W' }; + + print_without_indent("swizzle(r%04X, MAKE_SWIZZLE4(SWIZZLE_%c, SWIZZLE_%c, SWIZZLE_%c, SWIZZLE_%c), %u)", + (unsigned)(uintptr_t) he->data, + swiz[ir->mask.x], + swiz[ir->mask.y], + swiz[ir->mask.z], + swiz[ir->mask.w], + ir->mask.num_components); + } +} + +ir_visitor_status +ir_builder_print_visitor::visit_leave(ir_swizzle *ir) +{ + const unsigned my_index = next_ir_index++; + + _mesa_hash_table_insert(index_map, ir, (void *)(uintptr_t) my_index); + + print_with_indent("ir_swizzle *const r%04X = ", my_index); + print_without_declaration(ir); + print_without_indent(";\n"); + + return visit_continue; +} + +ir_visitor_status +ir_builder_print_visitor::visit_enter(ir_assignment *ir) +{ + ir_expression *const rhs_expr = ir->rhs->as_expression(); + + if (!is_simple_operand(ir->rhs) && rhs_expr == NULL) + return visit_continue; + + if (rhs_expr != NULL) { + const unsigned num_op = rhs_expr->get_num_operands(); + + for (unsigned i = 0; i < num_op; i++) { + if (is_simple_operand(rhs_expr->operands[i])) + continue; + + rhs_expr->operands[i]->accept(this); + } + } + + ir_visitor_status s; + + this->in_assignee = true; + s = ir->lhs->accept(this); + this->in_assignee = false; + if (s != visit_continue) + return (s == visit_continue_with_parent) ? visit_continue : s; + + assert(ir->condition == NULL); + + const struct hash_entry *const he_lhs = + _mesa_hash_table_search(index_map, ir->lhs); + + print_with_indent("body.emit(assign(r%04X, ", + (unsigned)(uintptr_t) he_lhs->data); + print_without_declaration(ir->rhs); + print_without_indent(", 0x%02x));\n\n", ir->write_mask); + + return visit_continue_with_parent; +} + +ir_visitor_status +ir_builder_print_visitor::visit_leave(ir_assignment *ir) +{ + const struct hash_entry *const he_lhs = + _mesa_hash_table_search(index_map, ir->lhs); + + const struct hash_entry *const he_rhs = + _mesa_hash_table_search(index_map, ir->rhs); + + assert(ir->condition == NULL); + + print_with_indent("body.emit(assign(r%04X, r%04X, 0x%02x));\n\n", + (unsigned)(uintptr_t) he_lhs->data, + (unsigned)(uintptr_t) he_rhs->data, + ir->write_mask); + + return visit_continue; +} + +void +ir_builder_print_visitor::print_without_declaration(const ir_expression *ir) +{ + const unsigned num_op = ir->get_num_operands(); + + static const char *const arity[] = { + "", "unop", "binop", "triop", "quadop" + }; + + switch (ir->operation) { + case ir_unop_neg: + case ir_binop_add: + case ir_binop_sub: + case ir_binop_mul: + case ir_binop_imul_high: + case ir_binop_less: + case ir_binop_greater: + case ir_binop_lequal: + case ir_binop_gequal: + case ir_binop_equal: + case ir_binop_nequal: + case ir_binop_lshift: + case ir_binop_rshift: + case ir_binop_bit_and: + case ir_binop_bit_xor: + case ir_binop_bit_or: + case ir_binop_logic_and: + case ir_binop_logic_xor: + case ir_binop_logic_or: + print_without_indent("%s(", + ir_expression_operation_enum_strings[ir->operation]); + break; + default: + print_without_indent("expr(ir_%s_%s, ", + arity[num_op], + ir_expression_operation_enum_strings[ir->operation]); + break; + } + + for (unsigned i = 0; i < num_op; i++) { + if (is_simple_operand(ir->operands[i])) + print_without_declaration(ir->operands[i]); + else { + const struct hash_entry *const he = + _mesa_hash_table_search(index_map, ir->operands[i]); + + print_without_indent("r%04X", (unsigned)(uintptr_t) he->data); + } + + if (i < num_op - 1) + print_without_indent(", "); + } + + print_without_indent(")"); +} + +ir_visitor_status +ir_builder_print_visitor::visit_enter(ir_expression *ir) +{ + const unsigned num_op = ir->get_num_operands(); + + for (unsigned i = 0; i < num_op; i++) { + if (is_simple_operand(ir->operands[i])) + continue; + + ir->operands[i]->accept(this); + } + + const unsigned my_index = next_ir_index++; + + _mesa_hash_table_insert(index_map, ir, (void *)(uintptr_t) my_index); + + print_with_indent("ir_expression *const r%04X = ", my_index); + print_without_declaration(ir); + print_without_indent(";\n"); + + return visit_continue_with_parent; +} + +ir_visitor_status +ir_builder_print_visitor::visit_enter(ir_if *ir) +{ + const unsigned my_index = next_ir_index++; + + print_with_indent("/* IF CONDITION */\n"); + + ir_visitor_status s = ir->condition->accept(this); + if (s != visit_continue) + return (s == visit_continue_with_parent) ? visit_continue : s; + + const struct hash_entry *const he = + _mesa_hash_table_search(index_map, ir->condition); + + print_with_indent("ir_if *f%04X = new(mem_ctx) ir_if(operand(r%04X).val);\n", + my_index, + (unsigned)(uintptr_t) he->data); + print_with_indent("exec_list *const f%04X_parent_instructions = body.instructions;\n\n", + my_index); + + indentation++; + print_with_indent("/* THEN INSTRUCTIONS */\n"); + print_with_indent("body.instructions = &f%04X->then_instructions;\n\n", + my_index); + + if (s != visit_continue_with_parent) { + s = visit_list_elements(this, &ir->then_instructions); + if (s == visit_stop) + return s; + } + + print_without_indent("\n"); + + if (!ir->else_instructions.is_empty()) { + print_with_indent("/* ELSE INSTRUCTIONS */\n"); + print_with_indent("body.instructions = &f%04X->else_instructions;\n\n", + my_index); + + if (s != visit_continue_with_parent) { + s = visit_list_elements(this, &ir->else_instructions); + if (s == visit_stop) + return s; + } + + print_without_indent("\n"); + } + + indentation--; + + print_with_indent("body.instructions = f%04X_parent_instructions;\n", + my_index); + print_with_indent("body.emit(f%04X);\n\n", + my_index); + print_with_indent("/* END IF */\n\n"); + + return visit_continue_with_parent; +} + +ir_visitor_status +ir_builder_print_visitor::visit_leave(ir_return *ir) +{ + const struct hash_entry *const he = + _mesa_hash_table_search(index_map, ir->value); + + print_with_indent("body.emit(ret(r%04X));\n\n", + (unsigned)(uintptr_t) he->data); + + return visit_continue; +} + +ir_visitor_status +ir_builder_print_visitor::visit_leave(ir_call *ir) +{ + const unsigned my_index = next_ir_index++; + + print_without_indent("\n"); + print_with_indent("/* CALL %s */\n", ir->callee_name()); + print_with_indent("exec_list r%04X_parameters;\n", my_index); + + foreach_in_list(ir_dereference_variable, param, &ir->actual_parameters) { + const struct hash_entry *const he = + _mesa_hash_table_search(index_map, param); + + print_with_indent("r%04X_parameters.push_tail(operand(r%04X).val);\n", + my_index, + (unsigned)(uintptr_t) he->data); + } + + char return_deref_string[32]; + if (ir->return_deref) { + const struct hash_entry *const he = + _mesa_hash_table_search(index_map, ir->return_deref); + + snprintf(return_deref_string, sizeof(return_deref_string), + "operand(r%04X).val", + (unsigned)(uintptr_t) he->data); + } else { + strcpy(return_deref_string, "NULL"); + } + + print_with_indent("body.emit(new(mem_ctx) ir_call(shader->symbols->get_function(\"%s\"),\n", + ir->callee_name()); + print_with_indent(" %s, &r%04X_parameters);\n\n", + return_deref_string, + my_index); + return visit_continue; +} + +ir_visitor_status +ir_builder_print_visitor::visit_enter(ir_loop *ir) +{ + const unsigned my_index = next_ir_index++; + + _mesa_hash_table_insert(index_map, ir, (void *)(uintptr_t) my_index); + + print_with_indent("/* LOOP BEGIN */\n"); + print_with_indent("ir_loop *f%04X = new(mem_ctx) ir_loop();\n", my_index); + print_with_indent("exec_list *const f%04X_parent_instructions = body.instructions;\n\n", + my_index); + + indentation++; + + print_with_indent("body.instructions = &f%04X->body_instructions;\n\n", + my_index); + + return visit_continue; +} + +ir_visitor_status +ir_builder_print_visitor::visit_leave(ir_loop *ir) +{ + const struct hash_entry *const he = + _mesa_hash_table_search(index_map, ir); + + indentation--; + + print_with_indent("/* LOOP END */\n\n"); + print_with_indent("body.instructions = f%04X_parent_instructions;\n", + (unsigned)(uintptr_t) he->data); + print_with_indent("body.emit(f%04X);\n\n", + (unsigned)(uintptr_t) he->data); + + return visit_continue; +} + +ir_visitor_status +ir_builder_print_visitor::visit(ir_loop_jump *ir) +{ + print_with_indent("body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_%s));\n\n", + ir->is_break() ? "break" : "continue"); + return visit_continue; +} diff -Nru mesa-12.0.6/src/compiler/glsl/ir_builder_print_visitor.h mesa-17.0.7/src/compiler/glsl/ir_builder_print_visitor.h --- mesa-12.0.6/src/compiler/glsl/ir_builder_print_visitor.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ir_builder_print_visitor.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,32 @@ +/* -*- c++ -*- */ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once +#ifndef IR_BUILDER_PRINT_VISITOR_H +#define IR_BUILDER_PRINT_VISITOR_H + +extern void +_mesa_print_builder_for_ir(FILE *f, exec_list *instructions); + +#endif /* IR_BUILDER_PRINT_VISITOR_H */ diff -Nru mesa-12.0.6/src/compiler/glsl/ir_clone.cpp mesa-17.0.7/src/compiler/glsl/ir_clone.cpp --- mesa-12.0.6/src/compiler/glsl/ir_clone.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ir_clone.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -25,7 +25,7 @@ #include "main/compiler.h" #include "ir.h" #include "compiler/glsl_types.h" -#include "program/hash_table.h" +#include "util/hash_table.h" ir_rvalue * ir_rvalue::clone(void *mem_ctx, struct hash_table *) const @@ -68,9 +68,8 @@ var->interface_type = this->interface_type; - if (ht) { - hash_table_insert(ht, var, (void *)const_cast(this)); - } + if (ht) + _mesa_hash_table_insert(ht, (void *)const_cast(this), var); return var; } @@ -175,9 +174,8 @@ ir_variable *new_var; if (ht) { - new_var = (ir_variable *)hash_table_find(ht, this->var); - if (!new_var) - new_var = this->var; + hash_entry *entry = _mesa_hash_table_search(ht, this->var); + new_var = entry ? (ir_variable *) entry->data : this->var; } else { new_var = this->var; } @@ -211,8 +209,8 @@ new_tex->coordinate = this->coordinate->clone(mem_ctx, ht); if (this->projector) new_tex->projector = this->projector->clone(mem_ctx, ht); - if (this->shadow_comparitor) { - new_tex->shadow_comparitor = this->shadow_comparitor->clone(mem_ctx, ht); + if (this->shadow_comparator) { + new_tex->shadow_comparator = this->shadow_comparator->clone(mem_ctx, ht); } if (this->offset != NULL) @@ -280,9 +278,10 @@ ir_function_signature *sig_copy = sig->clone(mem_ctx, ht); copy->add_signature(sig_copy); - if (ht != NULL) - hash_table_insert(ht, sig_copy, - (void *)const_cast(sig)); + if (ht != NULL) { + _mesa_hash_table_insert(ht, + (void *)const_cast(sig), sig_copy); + } } return copy; @@ -344,7 +343,7 @@ ir_constant *c = new(mem_ctx) ir_constant; c->type = this->type; - for (exec_node *node = this->components.head + for (const exec_node *node = this->components.get_head_raw() ; !node->is_tail_sentinel() ; node = node->next) { ir_constant *const orig = (ir_constant *) node; @@ -394,10 +393,13 @@ /* Try to find the function signature referenced by the ir_call in the * table. If it is found, replace it with the value from the table. */ - ir_function_signature *sig = - (ir_function_signature *) hash_table_find(this->ht, ir->callee); - if (sig != NULL) - ir->callee = sig; + ir_function_signature *sig; + hash_entry *entry = _mesa_hash_table_search(this->ht, ir->callee); + + if (entry != NULL) { + sig = (ir_function_signature *) entry->data; + ir->callee = sig; + } /* Since this may be used before function call parameters are flattened, * the children also need to be processed. @@ -422,7 +424,7 @@ clone_ir_list(void *mem_ctx, exec_list *out, const exec_list *in) { struct hash_table *ht = - hash_table_ctor(0, hash_table_pointer_hash, hash_table_pointer_compare); + _mesa_hash_table_create(NULL, _mesa_hash_pointer, _mesa_key_pointer_equal); foreach_in_list(const ir_instruction, original, in) { ir_instruction *copy = original->clone(mem_ctx, ht); @@ -437,5 +439,5 @@ */ fixup_function_calls(ht, out); - hash_table_dtor(ht); + _mesa_hash_table_destroy(ht, NULL); } diff -Nru mesa-12.0.6/src/compiler/glsl/ir_constant_expression.cpp mesa-17.0.7/src/compiler/glsl/ir_constant_expression.cpp --- mesa-12.0.6/src/compiler/glsl/ir_constant_expression.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ir_constant_expression.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -39,7 +39,7 @@ #include "util/half_float.h" #include "ir.h" #include "compiler/glsl_types.h" -#include "program/hash_table.h" +#include "util/hash_table.h" static float dot_f(ir_constant *op0, ir_constant *op1) @@ -457,7 +457,9 @@ const ir_dereference_variable *const dv = (const ir_dereference_variable *) deref; - store = (ir_constant *) hash_table_find(variable_context, dv->var); + hash_entry *entry = _mesa_hash_table_search(variable_context, dv->var); + if (entry) + store = (ir_constant *) entry->data; break; } @@ -477,6 +479,118 @@ return NULL; } +static uint32_t +bitfield_reverse(uint32_t v) +{ + /* http://graphics.stanford.edu/~seander/bithacks.html#BitReverseObvious */ + uint32_t r = v; // r will be reversed bits of v; first get LSB of v + int s = sizeof(v) * CHAR_BIT - 1; // extra shift needed at end + + for (v >>= 1; v; v >>= 1) { + r <<= 1; + r |= v & 1; + s--; + } + r <<= s; // shift when v's highest bits are zero + + return r; +} + +static int +find_msb_uint(uint32_t v) +{ + int count = 0; + + /* If v == 0, then the loop will terminate when count == 32. In that case + * 31-count will produce the -1 result required by GLSL findMSB(). + */ + while (((v & (1u << 31)) == 0) && count != 32) { + count++; + v <<= 1; + } + + return 31 - count; +} + +static int +find_msb_int(int32_t v) +{ + /* If v is signed, findMSB() returns the position of the most significant + * zero bit. + */ + return find_msb_uint(v < 0 ? ~v : v); +} + +static float +ldexpf_flush_subnormal(float x, int exp) +{ + const float result = ldexpf(x, exp); + + /* Flush subnormal values to zero. */ + return !isnormal(result) ? copysignf(0.0f, x) : result; +} + +static double +ldexp_flush_subnormal(double x, int exp) +{ + const double result = ldexp(x, exp); + + /* Flush subnormal values to zero. */ + return !isnormal(result) ? copysign(0.0, x) : result; +} + +static uint32_t +bitfield_extract_uint(uint32_t value, int offset, int bits) +{ + if (bits == 0) + return 0; + else if (offset < 0 || bits < 0) + return 0; /* Undefined, per spec. */ + else if (offset + bits > 32) + return 0; /* Undefined, per spec. */ + else { + value <<= 32 - bits - offset; + value >>= 32 - bits; + return value; + } +} + +static int32_t +bitfield_extract_int(int32_t value, int offset, int bits) +{ + if (bits == 0) + return 0; + else if (offset < 0 || bits < 0) + return 0; /* Undefined, per spec. */ + else if (offset + bits > 32) + return 0; /* Undefined, per spec. */ + else { + value <<= 32 - bits - offset; + value >>= 32 - bits; + return value; + } +} + +static uint32_t +bitfield_insert(uint32_t base, uint32_t insert, int offset, int bits) +{ + if (bits == 0) + return base; + else if (offset < 0 || bits < 0) + return 0; /* Undefined, per spec. */ + else if (offset + bits > 32) + return 0; /* Undefined, per spec. */ + else { + unsigned insert_mask = ((1ull << bits) - 1) << offset; + + insert <<= offset; + insert &= insert_mask; + base &= ~insert_mask; + + return base | insert; + } +} + ir_constant * ir_expression::constant_expression_value(struct hash_table *variable_context) { @@ -491,7 +605,7 @@ for (unsigned operand = 0; operand < this->get_num_operands(); operand++) { op[operand] = this->operands[operand]->constant_expression_value(variable_context); if (!op[operand]) - return NULL; + return NULL; } if (op[1] != NULL) @@ -533,1235 +647,17 @@ assert(op[1] != NULL && op[1]->type->is_array()); switch (this->operation) { case ir_binop_all_equal: - return new(ctx) ir_constant(op[0]->has_value(op[1])); + return new(ctx) ir_constant(op[0]->has_value(op[1])); case ir_binop_any_nequal: - return new(ctx) ir_constant(!op[0]->has_value(op[1])); + return new(ctx) ir_constant(!op[0]->has_value(op[1])); default: - break; - } - return NULL; - } - - switch (this->operation) { - case ir_unop_bit_not: - switch (op[0]->type->base_type) { - case GLSL_TYPE_INT: - for (unsigned c = 0; c < components; c++) - data.i[c] = ~ op[0]->value.i[c]; - break; - case GLSL_TYPE_UINT: - for (unsigned c = 0; c < components; c++) - data.u[c] = ~ op[0]->value.u[c]; - break; - default: - assert(0); - } - break; - - case ir_unop_logic_not: - assert(op[0]->type->base_type == GLSL_TYPE_BOOL); - for (unsigned c = 0; c < op[0]->type->components(); c++) - data.b[c] = !op[0]->value.b[c]; - break; - - case ir_unop_f2i: - assert(op[0]->type->base_type == GLSL_TYPE_FLOAT); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.i[c] = (int) op[0]->value.f[c]; - } - break; - case ir_unop_f2u: - assert(op[0]->type->base_type == GLSL_TYPE_FLOAT); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.i[c] = (unsigned) op[0]->value.f[c]; - } - break; - case ir_unop_i2f: - assert(op[0]->type->base_type == GLSL_TYPE_INT); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.f[c] = (float) op[0]->value.i[c]; - } - break; - case ir_unop_u2f: - assert(op[0]->type->base_type == GLSL_TYPE_UINT); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.f[c] = (float) op[0]->value.u[c]; - } - break; - case ir_unop_b2f: - assert(op[0]->type->base_type == GLSL_TYPE_BOOL); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.f[c] = op[0]->value.b[c] ? 1.0F : 0.0F; - } - break; - case ir_unop_f2b: - assert(op[0]->type->base_type == GLSL_TYPE_FLOAT); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.b[c] = op[0]->value.f[c] != 0.0F ? true : false; - } - break; - case ir_unop_b2i: - assert(op[0]->type->base_type == GLSL_TYPE_BOOL); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.u[c] = op[0]->value.b[c] ? 1 : 0; - } - break; - case ir_unop_i2b: - assert(op[0]->type->is_integer()); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.b[c] = op[0]->value.u[c] ? true : false; - } - break; - case ir_unop_u2i: - assert(op[0]->type->base_type == GLSL_TYPE_UINT); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.i[c] = op[0]->value.u[c]; - } - break; - case ir_unop_i2u: - assert(op[0]->type->base_type == GLSL_TYPE_INT); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.u[c] = op[0]->value.i[c]; - } - break; - case ir_unop_bitcast_i2f: - assert(op[0]->type->base_type == GLSL_TYPE_INT); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.f[c] = bitcast_u2f(op[0]->value.i[c]); - } - break; - case ir_unop_bitcast_f2i: - assert(op[0]->type->base_type == GLSL_TYPE_FLOAT); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.i[c] = bitcast_f2u(op[0]->value.f[c]); - } - break; - case ir_unop_bitcast_u2f: - assert(op[0]->type->base_type == GLSL_TYPE_UINT); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.f[c] = bitcast_u2f(op[0]->value.u[c]); - } - break; - case ir_unop_bitcast_f2u: - assert(op[0]->type->base_type == GLSL_TYPE_FLOAT); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.u[c] = bitcast_f2u(op[0]->value.f[c]); - } - break; - case ir_unop_d2f: - assert(op[0]->type->base_type == GLSL_TYPE_DOUBLE); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.f[c] = op[0]->value.d[c]; - } - break; - case ir_unop_f2d: - assert(op[0]->type->base_type == GLSL_TYPE_FLOAT); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.d[c] = op[0]->value.f[c]; - } - break; - case ir_unop_d2i: - assert(op[0]->type->base_type == GLSL_TYPE_DOUBLE); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.i[c] = op[0]->value.d[c]; - } - break; - case ir_unop_i2d: - assert(op[0]->type->base_type == GLSL_TYPE_INT); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.d[c] = op[0]->value.i[c]; - } - break; - case ir_unop_d2u: - assert(op[0]->type->base_type == GLSL_TYPE_DOUBLE); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.u[c] = op[0]->value.d[c]; - } - break; - case ir_unop_u2d: - assert(op[0]->type->base_type == GLSL_TYPE_UINT); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.d[c] = op[0]->value.u[c]; - } - break; - case ir_unop_d2b: - assert(op[0]->type->base_type == GLSL_TYPE_DOUBLE); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.b[c] = op[0]->value.d[c] != 0.0; - } - break; - case ir_unop_trunc: - for (unsigned c = 0; c < op[0]->type->components(); c++) { - if (op[0]->type->base_type == GLSL_TYPE_DOUBLE) - data.d[c] = trunc(op[0]->value.d[c]); - else - data.f[c] = truncf(op[0]->value.f[c]); - } - break; - - case ir_unop_round_even: - for (unsigned c = 0; c < op[0]->type->components(); c++) { - if (op[0]->type->base_type == GLSL_TYPE_DOUBLE) - data.d[c] = _mesa_roundeven(op[0]->value.d[c]); - else - data.f[c] = _mesa_roundevenf(op[0]->value.f[c]); - } - break; - - case ir_unop_ceil: - for (unsigned c = 0; c < op[0]->type->components(); c++) { - if (op[0]->type->base_type == GLSL_TYPE_DOUBLE) - data.d[c] = ceil(op[0]->value.d[c]); - else - data.f[c] = ceilf(op[0]->value.f[c]); - } - break; - - case ir_unop_floor: - for (unsigned c = 0; c < op[0]->type->components(); c++) { - if (op[0]->type->base_type == GLSL_TYPE_DOUBLE) - data.d[c] = floor(op[0]->value.d[c]); - else - data.f[c] = floorf(op[0]->value.f[c]); - } - break; - - case ir_unop_fract: - for (unsigned c = 0; c < op[0]->type->components(); c++) { - switch (this->type->base_type) { - case GLSL_TYPE_UINT: - data.u[c] = 0; - break; - case GLSL_TYPE_INT: - data.i[c] = 0; - break; - case GLSL_TYPE_FLOAT: - data.f[c] = op[0]->value.f[c] - floor(op[0]->value.f[c]); - break; - case GLSL_TYPE_DOUBLE: - data.d[c] = op[0]->value.d[c] - floor(op[0]->value.d[c]); - break; - default: - assert(0); - } - } - break; - - case ir_unop_sin: - assert(op[0]->type->base_type == GLSL_TYPE_FLOAT); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.f[c] = sinf(op[0]->value.f[c]); - } - break; - - case ir_unop_cos: - assert(op[0]->type->base_type == GLSL_TYPE_FLOAT); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.f[c] = cosf(op[0]->value.f[c]); - } - break; - - case ir_unop_neg: - for (unsigned c = 0; c < op[0]->type->components(); c++) { - switch (this->type->base_type) { - case GLSL_TYPE_UINT: - data.u[c] = -((int) op[0]->value.u[c]); - break; - case GLSL_TYPE_INT: - data.i[c] = -op[0]->value.i[c]; - break; - case GLSL_TYPE_FLOAT: - data.f[c] = -op[0]->value.f[c]; - break; - case GLSL_TYPE_DOUBLE: - data.d[c] = -op[0]->value.d[c]; - break; - default: - assert(0); - } - } - break; - - case ir_unop_abs: - for (unsigned c = 0; c < op[0]->type->components(); c++) { - switch (this->type->base_type) { - case GLSL_TYPE_UINT: - data.u[c] = op[0]->value.u[c]; - break; - case GLSL_TYPE_INT: - data.i[c] = op[0]->value.i[c]; - if (data.i[c] < 0) - data.i[c] = -data.i[c]; - break; - case GLSL_TYPE_FLOAT: - data.f[c] = fabs(op[0]->value.f[c]); - break; - case GLSL_TYPE_DOUBLE: - data.d[c] = fabs(op[0]->value.d[c]); - break; - default: - assert(0); - } - } - break; - - case ir_unop_sign: - for (unsigned c = 0; c < op[0]->type->components(); c++) { - switch (this->type->base_type) { - case GLSL_TYPE_UINT: - data.u[c] = op[0]->value.i[c] > 0; - break; - case GLSL_TYPE_INT: - data.i[c] = (op[0]->value.i[c] > 0) - (op[0]->value.i[c] < 0); - break; - case GLSL_TYPE_FLOAT: - data.f[c] = float((op[0]->value.f[c] > 0)-(op[0]->value.f[c] < 0)); - break; - case GLSL_TYPE_DOUBLE: - data.d[c] = double((op[0]->value.d[c] > 0)-(op[0]->value.d[c] < 0)); - break; - default: - assert(0); - } - } - break; - - case ir_unop_rcp: - for (unsigned c = 0; c < op[0]->type->components(); c++) { - switch (this->type->base_type) { - case GLSL_TYPE_UINT: - if (op[0]->value.u[c] != 0.0) - data.u[c] = 1 / op[0]->value.u[c]; - break; - case GLSL_TYPE_INT: - if (op[0]->value.i[c] != 0.0) - data.i[c] = 1 / op[0]->value.i[c]; - break; - case GLSL_TYPE_FLOAT: - if (op[0]->value.f[c] != 0.0) - data.f[c] = 1.0F / op[0]->value.f[c]; - break; - case GLSL_TYPE_DOUBLE: - if (op[0]->value.d[c] != 0.0) - data.d[c] = 1.0 / op[0]->value.d[c]; - break; - default: - assert(0); - } - } - break; - - case ir_unop_rsq: - for (unsigned c = 0; c < op[0]->type->components(); c++) { - if (op[0]->type->base_type == GLSL_TYPE_DOUBLE) - data.d[c] = 1.0 / sqrt(op[0]->value.d[c]); - else - data.f[c] = 1.0F / sqrtf(op[0]->value.f[c]); - } - break; - - case ir_unop_sqrt: - for (unsigned c = 0; c < op[0]->type->components(); c++) { - if (op[0]->type->base_type == GLSL_TYPE_DOUBLE) - data.d[c] = sqrt(op[0]->value.d[c]); - else - data.f[c] = sqrtf(op[0]->value.f[c]); - } - break; - - case ir_unop_exp: - assert(op[0]->type->base_type == GLSL_TYPE_FLOAT); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.f[c] = expf(op[0]->value.f[c]); - } - break; - - case ir_unop_exp2: - assert(op[0]->type->base_type == GLSL_TYPE_FLOAT); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.f[c] = exp2f(op[0]->value.f[c]); - } - break; - - case ir_unop_log: - assert(op[0]->type->base_type == GLSL_TYPE_FLOAT); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.f[c] = logf(op[0]->value.f[c]); - } - break; - - case ir_unop_log2: - assert(op[0]->type->base_type == GLSL_TYPE_FLOAT); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.f[c] = log2f(op[0]->value.f[c]); - } - break; - - case ir_unop_dFdx: - case ir_unop_dFdx_coarse: - case ir_unop_dFdx_fine: - case ir_unop_dFdy: - case ir_unop_dFdy_coarse: - case ir_unop_dFdy_fine: - assert(op[0]->type->base_type == GLSL_TYPE_FLOAT); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.f[c] = 0.0; - } - break; - - case ir_unop_pack_snorm_2x16: - assert(op[0]->type == glsl_type::vec2_type); - data.u[0] = pack_2x16(pack_snorm_1x16, - op[0]->value.f[0], - op[0]->value.f[1]); - break; - case ir_unop_pack_snorm_4x8: - assert(op[0]->type == glsl_type::vec4_type); - data.u[0] = pack_4x8(pack_snorm_1x8, - op[0]->value.f[0], - op[0]->value.f[1], - op[0]->value.f[2], - op[0]->value.f[3]); - break; - case ir_unop_unpack_snorm_2x16: - assert(op[0]->type == glsl_type::uint_type); - unpack_2x16(unpack_snorm_1x16, - op[0]->value.u[0], - &data.f[0], &data.f[1]); - break; - case ir_unop_unpack_snorm_4x8: - assert(op[0]->type == glsl_type::uint_type); - unpack_4x8(unpack_snorm_1x8, - op[0]->value.u[0], - &data.f[0], &data.f[1], &data.f[2], &data.f[3]); - break; - case ir_unop_pack_unorm_2x16: - assert(op[0]->type == glsl_type::vec2_type); - data.u[0] = pack_2x16(pack_unorm_1x16, - op[0]->value.f[0], - op[0]->value.f[1]); - break; - case ir_unop_pack_unorm_4x8: - assert(op[0]->type == glsl_type::vec4_type); - data.u[0] = pack_4x8(pack_unorm_1x8, - op[0]->value.f[0], - op[0]->value.f[1], - op[0]->value.f[2], - op[0]->value.f[3]); - break; - case ir_unop_unpack_unorm_2x16: - assert(op[0]->type == glsl_type::uint_type); - unpack_2x16(unpack_unorm_1x16, - op[0]->value.u[0], - &data.f[0], &data.f[1]); - break; - case ir_unop_unpack_unorm_4x8: - assert(op[0]->type == glsl_type::uint_type); - unpack_4x8(unpack_unorm_1x8, - op[0]->value.u[0], - &data.f[0], &data.f[1], &data.f[2], &data.f[3]); - break; - case ir_unop_pack_half_2x16: - assert(op[0]->type == glsl_type::vec2_type); - data.u[0] = pack_2x16(pack_half_1x16, - op[0]->value.f[0], - op[0]->value.f[1]); - break; - case ir_unop_unpack_half_2x16: - assert(op[0]->type == glsl_type::uint_type); - unpack_2x16(unpack_half_1x16, - op[0]->value.u[0], - &data.f[0], &data.f[1]); - break; - case ir_binop_pow: - assert(op[0]->type->base_type == GLSL_TYPE_FLOAT); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - data.f[c] = powf(op[0]->value.f[c], op[1]->value.f[c]); - } - break; - - case ir_binop_dot: - if (op[0]->type->base_type == GLSL_TYPE_DOUBLE) - data.d[0] = dot_d(op[0], op[1]); - else - data.f[0] = dot_f(op[0], op[1]); - break; - - case ir_binop_min: - assert(op[0]->type == op[1]->type || op0_scalar || op1_scalar); - for (unsigned c = 0, c0 = 0, c1 = 0; - c < components; - c0 += c0_inc, c1 += c1_inc, c++) { - - switch (op[0]->type->base_type) { - case GLSL_TYPE_UINT: - data.u[c] = MIN2(op[0]->value.u[c0], op[1]->value.u[c1]); - break; - case GLSL_TYPE_INT: - data.i[c] = MIN2(op[0]->value.i[c0], op[1]->value.i[c1]); - break; - case GLSL_TYPE_FLOAT: - data.f[c] = MIN2(op[0]->value.f[c0], op[1]->value.f[c1]); - break; - case GLSL_TYPE_DOUBLE: - data.d[c] = MIN2(op[0]->value.d[c0], op[1]->value.d[c1]); - break; - default: - assert(0); - } - } - - break; - case ir_binop_max: - assert(op[0]->type == op[1]->type || op0_scalar || op1_scalar); - for (unsigned c = 0, c0 = 0, c1 = 0; - c < components; - c0 += c0_inc, c1 += c1_inc, c++) { - - switch (op[0]->type->base_type) { - case GLSL_TYPE_UINT: - data.u[c] = MAX2(op[0]->value.u[c0], op[1]->value.u[c1]); - break; - case GLSL_TYPE_INT: - data.i[c] = MAX2(op[0]->value.i[c0], op[1]->value.i[c1]); - break; - case GLSL_TYPE_FLOAT: - data.f[c] = MAX2(op[0]->value.f[c0], op[1]->value.f[c1]); - break; - case GLSL_TYPE_DOUBLE: - data.d[c] = MAX2(op[0]->value.d[c0], op[1]->value.d[c1]); - break; - default: - assert(0); - } - } - break; - - case ir_binop_add: - assert(op[0]->type == op[1]->type || op0_scalar || op1_scalar); - for (unsigned c = 0, c0 = 0, c1 = 0; - c < components; - c0 += c0_inc, c1 += c1_inc, c++) { - - switch (op[0]->type->base_type) { - case GLSL_TYPE_UINT: - data.u[c] = op[0]->value.u[c0] + op[1]->value.u[c1]; - break; - case GLSL_TYPE_INT: - data.i[c] = op[0]->value.i[c0] + op[1]->value.i[c1]; - break; - case GLSL_TYPE_FLOAT: - data.f[c] = op[0]->value.f[c0] + op[1]->value.f[c1]; - break; - case GLSL_TYPE_DOUBLE: - data.d[c] = op[0]->value.d[c0] + op[1]->value.d[c1]; - break; - default: - assert(0); - } - } - - break; - case ir_binop_sub: - assert(op[0]->type == op[1]->type || op0_scalar || op1_scalar); - for (unsigned c = 0, c0 = 0, c1 = 0; - c < components; - c0 += c0_inc, c1 += c1_inc, c++) { - - switch (op[0]->type->base_type) { - case GLSL_TYPE_UINT: - data.u[c] = op[0]->value.u[c0] - op[1]->value.u[c1]; - break; - case GLSL_TYPE_INT: - data.i[c] = op[0]->value.i[c0] - op[1]->value.i[c1]; - break; - case GLSL_TYPE_FLOAT: - data.f[c] = op[0]->value.f[c0] - op[1]->value.f[c1]; - break; - case GLSL_TYPE_DOUBLE: - data.d[c] = op[0]->value.d[c0] - op[1]->value.d[c1]; - break; - default: - assert(0); - } - } - - break; - case ir_binop_mul: - /* Check for equal types, or unequal types involving scalars */ - if ((op[0]->type == op[1]->type && !op[0]->type->is_matrix()) - || op0_scalar || op1_scalar) { - for (unsigned c = 0, c0 = 0, c1 = 0; - c < components; - c0 += c0_inc, c1 += c1_inc, c++) { - - switch (op[0]->type->base_type) { - case GLSL_TYPE_UINT: - data.u[c] = op[0]->value.u[c0] * op[1]->value.u[c1]; - break; - case GLSL_TYPE_INT: - data.i[c] = op[0]->value.i[c0] * op[1]->value.i[c1]; - break; - case GLSL_TYPE_FLOAT: - data.f[c] = op[0]->value.f[c0] * op[1]->value.f[c1]; - break; - case GLSL_TYPE_DOUBLE: - data.d[c] = op[0]->value.d[c0] * op[1]->value.d[c1]; - break; - default: - assert(0); - } - } - } else { - assert(op[0]->type->is_matrix() || op[1]->type->is_matrix()); - - /* Multiply an N-by-M matrix with an M-by-P matrix. Since either - * matrix can be a GLSL vector, either N or P can be 1. - * - * For vec*mat, the vector is treated as a row vector. This - * means the vector is a 1-row x M-column matrix. - * - * For mat*vec, the vector is treated as a column vector. Since - * matrix_columns is 1 for vectors, this just works. - */ - const unsigned n = op[0]->type->is_vector() - ? 1 : op[0]->type->vector_elements; - const unsigned m = op[1]->type->vector_elements; - const unsigned p = op[1]->type->matrix_columns; - for (unsigned j = 0; j < p; j++) { - for (unsigned i = 0; i < n; i++) { - for (unsigned k = 0; k < m; k++) { - if (op[0]->type->base_type == GLSL_TYPE_DOUBLE) - data.d[i+n*j] += op[0]->value.d[i+n*k]*op[1]->value.d[k+m*j]; - else - data.f[i+n*j] += op[0]->value.f[i+n*k]*op[1]->value.f[k+m*j]; - } - } - } - } - - break; - case ir_binop_div: - /* FINISHME: Emit warning when division-by-zero is detected. */ - assert(op[0]->type == op[1]->type || op0_scalar || op1_scalar); - for (unsigned c = 0, c0 = 0, c1 = 0; - c < components; - c0 += c0_inc, c1 += c1_inc, c++) { - - switch (op[0]->type->base_type) { - case GLSL_TYPE_UINT: - if (op[1]->value.u[c1] == 0) { - data.u[c] = 0; - } else { - data.u[c] = op[0]->value.u[c0] / op[1]->value.u[c1]; - } - break; - case GLSL_TYPE_INT: - if (op[1]->value.i[c1] == 0) { - data.i[c] = 0; - } else { - data.i[c] = op[0]->value.i[c0] / op[1]->value.i[c1]; - } - break; - case GLSL_TYPE_FLOAT: - data.f[c] = op[0]->value.f[c0] / op[1]->value.f[c1]; - break; - case GLSL_TYPE_DOUBLE: - data.d[c] = op[0]->value.d[c0] / op[1]->value.d[c1]; - break; - default: - assert(0); - } - } - - break; - case ir_binop_mod: - /* FINISHME: Emit warning when division-by-zero is detected. */ - assert(op[0]->type == op[1]->type || op0_scalar || op1_scalar); - for (unsigned c = 0, c0 = 0, c1 = 0; - c < components; - c0 += c0_inc, c1 += c1_inc, c++) { - - switch (op[0]->type->base_type) { - case GLSL_TYPE_UINT: - if (op[1]->value.u[c1] == 0) { - data.u[c] = 0; - } else { - data.u[c] = op[0]->value.u[c0] % op[1]->value.u[c1]; - } - break; - case GLSL_TYPE_INT: - if (op[1]->value.i[c1] == 0) { - data.i[c] = 0; - } else { - data.i[c] = op[0]->value.i[c0] % op[1]->value.i[c1]; - } - break; - case GLSL_TYPE_FLOAT: - /* We don't use fmod because it rounds toward zero; GLSL specifies - * the use of floor. - */ - data.f[c] = op[0]->value.f[c0] - op[1]->value.f[c1] - * floorf(op[0]->value.f[c0] / op[1]->value.f[c1]); - break; - case GLSL_TYPE_DOUBLE: - /* We don't use fmod because it rounds toward zero; GLSL specifies - * the use of floor. - */ - data.d[c] = op[0]->value.d[c0] - op[1]->value.d[c1] - * floor(op[0]->value.d[c0] / op[1]->value.d[c1]); - break; - default: - assert(0); - } - } - - break; - - case ir_binop_logic_and: - assert(op[0]->type->base_type == GLSL_TYPE_BOOL); - for (unsigned c = 0; c < op[0]->type->components(); c++) - data.b[c] = op[0]->value.b[c] && op[1]->value.b[c]; - break; - case ir_binop_logic_xor: - assert(op[0]->type->base_type == GLSL_TYPE_BOOL); - for (unsigned c = 0; c < op[0]->type->components(); c++) - data.b[c] = op[0]->value.b[c] ^ op[1]->value.b[c]; - break; - case ir_binop_logic_or: - assert(op[0]->type->base_type == GLSL_TYPE_BOOL); - for (unsigned c = 0; c < op[0]->type->components(); c++) - data.b[c] = op[0]->value.b[c] || op[1]->value.b[c]; - break; - - case ir_binop_less: - assert(op[0]->type == op[1]->type); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - switch (op[0]->type->base_type) { - case GLSL_TYPE_UINT: - data.b[c] = op[0]->value.u[c] < op[1]->value.u[c]; - break; - case GLSL_TYPE_INT: - data.b[c] = op[0]->value.i[c] < op[1]->value.i[c]; - break; - case GLSL_TYPE_FLOAT: - data.b[c] = op[0]->value.f[c] < op[1]->value.f[c]; - break; - case GLSL_TYPE_DOUBLE: - data.b[c] = op[0]->value.d[c] < op[1]->value.d[c]; - break; - default: - assert(0); - } - } - break; - case ir_binop_greater: - assert(op[0]->type == op[1]->type); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - switch (op[0]->type->base_type) { - case GLSL_TYPE_UINT: - data.b[c] = op[0]->value.u[c] > op[1]->value.u[c]; - break; - case GLSL_TYPE_INT: - data.b[c] = op[0]->value.i[c] > op[1]->value.i[c]; - break; - case GLSL_TYPE_FLOAT: - data.b[c] = op[0]->value.f[c] > op[1]->value.f[c]; - break; - case GLSL_TYPE_DOUBLE: - data.b[c] = op[0]->value.d[c] > op[1]->value.d[c]; - break; - default: - assert(0); - } - } - break; - case ir_binop_lequal: - assert(op[0]->type == op[1]->type); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - switch (op[0]->type->base_type) { - case GLSL_TYPE_UINT: - data.b[c] = op[0]->value.u[c] <= op[1]->value.u[c]; - break; - case GLSL_TYPE_INT: - data.b[c] = op[0]->value.i[c] <= op[1]->value.i[c]; - break; - case GLSL_TYPE_FLOAT: - data.b[c] = op[0]->value.f[c] <= op[1]->value.f[c]; - break; - case GLSL_TYPE_DOUBLE: - data.b[c] = op[0]->value.d[c] <= op[1]->value.d[c]; - break; - default: - assert(0); - } - } - break; - case ir_binop_gequal: - assert(op[0]->type == op[1]->type); - for (unsigned c = 0; c < op[0]->type->components(); c++) { - switch (op[0]->type->base_type) { - case GLSL_TYPE_UINT: - data.b[c] = op[0]->value.u[c] >= op[1]->value.u[c]; - break; - case GLSL_TYPE_INT: - data.b[c] = op[0]->value.i[c] >= op[1]->value.i[c]; - break; - case GLSL_TYPE_FLOAT: - data.b[c] = op[0]->value.f[c] >= op[1]->value.f[c]; - break; - case GLSL_TYPE_DOUBLE: - data.b[c] = op[0]->value.d[c] >= op[1]->value.d[c]; - break; - default: - assert(0); - } - } - break; - case ir_binop_equal: - assert(op[0]->type == op[1]->type); - for (unsigned c = 0; c < components; c++) { - switch (op[0]->type->base_type) { - case GLSL_TYPE_UINT: - data.b[c] = op[0]->value.u[c] == op[1]->value.u[c]; - break; - case GLSL_TYPE_INT: - data.b[c] = op[0]->value.i[c] == op[1]->value.i[c]; - break; - case GLSL_TYPE_FLOAT: - data.b[c] = op[0]->value.f[c] == op[1]->value.f[c]; - break; - case GLSL_TYPE_BOOL: - data.b[c] = op[0]->value.b[c] == op[1]->value.b[c]; - break; - case GLSL_TYPE_DOUBLE: - data.b[c] = op[0]->value.d[c] == op[1]->value.d[c]; - break; - default: - assert(0); - } - } - break; - case ir_binop_nequal: - assert(op[0]->type == op[1]->type); - for (unsigned c = 0; c < components; c++) { - switch (op[0]->type->base_type) { - case GLSL_TYPE_UINT: - data.b[c] = op[0]->value.u[c] != op[1]->value.u[c]; - break; - case GLSL_TYPE_INT: - data.b[c] = op[0]->value.i[c] != op[1]->value.i[c]; - break; - case GLSL_TYPE_FLOAT: - data.b[c] = op[0]->value.f[c] != op[1]->value.f[c]; - break; - case GLSL_TYPE_BOOL: - data.b[c] = op[0]->value.b[c] != op[1]->value.b[c]; - break; - case GLSL_TYPE_DOUBLE: - data.b[c] = op[0]->value.d[c] != op[1]->value.d[c]; - break; - default: - assert(0); - } - } - break; - case ir_binop_all_equal: - data.b[0] = op[0]->has_value(op[1]); - break; - case ir_binop_any_nequal: - data.b[0] = !op[0]->has_value(op[1]); - break; - - case ir_binop_lshift: - for (unsigned c = 0, c0 = 0, c1 = 0; - c < components; - c0 += c0_inc, c1 += c1_inc, c++) { - - if (op[0]->type->base_type == GLSL_TYPE_INT && - op[1]->type->base_type == GLSL_TYPE_INT) { - data.i[c] = op[0]->value.i[c0] << op[1]->value.i[c1]; - - } else if (op[0]->type->base_type == GLSL_TYPE_INT && - op[1]->type->base_type == GLSL_TYPE_UINT) { - data.i[c] = op[0]->value.i[c0] << op[1]->value.u[c1]; - - } else if (op[0]->type->base_type == GLSL_TYPE_UINT && - op[1]->type->base_type == GLSL_TYPE_INT) { - data.u[c] = op[0]->value.u[c0] << op[1]->value.i[c1]; - - } else if (op[0]->type->base_type == GLSL_TYPE_UINT && - op[1]->type->base_type == GLSL_TYPE_UINT) { - data.u[c] = op[0]->value.u[c0] << op[1]->value.u[c1]; - } - } - break; - - case ir_binop_rshift: - for (unsigned c = 0, c0 = 0, c1 = 0; - c < components; - c0 += c0_inc, c1 += c1_inc, c++) { - - if (op[0]->type->base_type == GLSL_TYPE_INT && - op[1]->type->base_type == GLSL_TYPE_INT) { - data.i[c] = op[0]->value.i[c0] >> op[1]->value.i[c1]; - - } else if (op[0]->type->base_type == GLSL_TYPE_INT && - op[1]->type->base_type == GLSL_TYPE_UINT) { - data.i[c] = op[0]->value.i[c0] >> op[1]->value.u[c1]; - - } else if (op[0]->type->base_type == GLSL_TYPE_UINT && - op[1]->type->base_type == GLSL_TYPE_INT) { - data.u[c] = op[0]->value.u[c0] >> op[1]->value.i[c1]; - - } else if (op[0]->type->base_type == GLSL_TYPE_UINT && - op[1]->type->base_type == GLSL_TYPE_UINT) { - data.u[c] = op[0]->value.u[c0] >> op[1]->value.u[c1]; - } - } - break; - - case ir_binop_bit_and: - for (unsigned c = 0, c0 = 0, c1 = 0; - c < components; - c0 += c0_inc, c1 += c1_inc, c++) { - - switch (op[0]->type->base_type) { - case GLSL_TYPE_INT: - data.i[c] = op[0]->value.i[c0] & op[1]->value.i[c1]; - break; - case GLSL_TYPE_UINT: - data.u[c] = op[0]->value.u[c0] & op[1]->value.u[c1]; - break; - default: - assert(0); - } - } - break; - - case ir_binop_bit_or: - for (unsigned c = 0, c0 = 0, c1 = 0; - c < components; - c0 += c0_inc, c1 += c1_inc, c++) { - - switch (op[0]->type->base_type) { - case GLSL_TYPE_INT: - data.i[c] = op[0]->value.i[c0] | op[1]->value.i[c1]; - break; - case GLSL_TYPE_UINT: - data.u[c] = op[0]->value.u[c0] | op[1]->value.u[c1]; - break; - default: - assert(0); - } - } - break; - - case ir_binop_vector_extract: { - const int c = CLAMP(op[1]->value.i[0], 0, - (int) op[0]->type->vector_elements - 1); - - switch (op[0]->type->base_type) { - case GLSL_TYPE_UINT: - data.u[0] = op[0]->value.u[c]; - break; - case GLSL_TYPE_INT: - data.i[0] = op[0]->value.i[c]; - break; - case GLSL_TYPE_FLOAT: - data.f[0] = op[0]->value.f[c]; break; - case GLSL_TYPE_DOUBLE: - data.d[0] = op[0]->value.d[c]; - break; - case GLSL_TYPE_BOOL: - data.b[0] = op[0]->value.b[c]; - break; - default: - assert(0); - } - break; - } - - case ir_binop_bit_xor: - for (unsigned c = 0, c0 = 0, c1 = 0; - c < components; - c0 += c0_inc, c1 += c1_inc, c++) { - - switch (op[0]->type->base_type) { - case GLSL_TYPE_INT: - data.i[c] = op[0]->value.i[c0] ^ op[1]->value.i[c1]; - break; - case GLSL_TYPE_UINT: - data.u[c] = op[0]->value.u[c0] ^ op[1]->value.u[c1]; - break; - default: - assert(0); - } - } - break; - - case ir_unop_bitfield_reverse: - /* http://graphics.stanford.edu/~seander/bithacks.html#BitReverseObvious */ - for (unsigned c = 0; c < components; c++) { - unsigned int v = op[0]->value.u[c]; // input bits to be reversed - unsigned int r = v; // r will be reversed bits of v; first get LSB of v - int s = sizeof(v) * CHAR_BIT - 1; // extra shift needed at end - - for (v >>= 1; v; v >>= 1) { - r <<= 1; - r |= v & 1; - s--; - } - r <<= s; // shift when v's highest bits are zero - - data.u[c] = r; - } - break; - - case ir_unop_bit_count: - for (unsigned c = 0; c < components; c++) { - unsigned count = 0; - unsigned v = op[0]->value.u[c]; - - for (; v; count++) { - v &= v - 1; - } - data.u[c] = count; - } - break; - - case ir_unop_find_msb: - for (unsigned c = 0; c < components; c++) { - int v = op[0]->value.i[c]; - - if (v == 0 || (op[0]->type->base_type == GLSL_TYPE_INT && v == -1)) - data.i[c] = -1; - else { - int count = 0; - unsigned top_bit = op[0]->type->base_type == GLSL_TYPE_UINT - ? 0 : v & (1u << 31); - - while (((v & (1u << 31)) == top_bit) && count != 32) { - count++; - v <<= 1; - } - - data.i[c] = 31 - count; - } - } - break; - - case ir_unop_find_lsb: - for (unsigned c = 0; c < components; c++) { - if (op[0]->value.i[c] == 0) - data.i[c] = -1; - else { - unsigned pos = 0; - unsigned v = op[0]->value.u[c]; - - for (; !(v & 1); v >>= 1) { - pos++; - } - data.u[c] = pos; - } - } - break; - - case ir_unop_saturate: - for (unsigned c = 0; c < components; c++) { - data.f[c] = CLAMP(op[0]->value.f[c], 0.0f, 1.0f); - } - break; - case ir_unop_pack_double_2x32: { - /* XXX needs to be checked on big-endian */ - uint64_t temp; - temp = (uint64_t)op[0]->value.u[0] | ((uint64_t)op[0]->value.u[1] << 32); - data.d[0] = *(double *)&temp; - - break; - } - case ir_unop_unpack_double_2x32: - /* XXX needs to be checked on big-endian */ - data.u[0] = *(uint32_t *)&op[0]->value.d[0]; - data.u[1] = *((uint32_t *)&op[0]->value.d[0] + 1); - break; - - case ir_triop_bitfield_extract: { - for (unsigned c = 0; c < components; c++) { - int offset = op[1]->value.i[c]; - int bits = op[2]->value.i[c]; - - if (bits == 0) - data.u[c] = 0; - else if (offset < 0 || bits < 0) - data.u[c] = 0; /* Undefined, per spec. */ - else if (offset + bits > 32) - data.u[c] = 0; /* Undefined, per spec. */ - else { - if (op[0]->type->base_type == GLSL_TYPE_INT) { - /* int so that the right shift will sign-extend. */ - int value = op[0]->value.i[c]; - value <<= 32 - bits - offset; - value >>= 32 - bits; - data.i[c] = value; - } else { - unsigned value = op[0]->value.u[c]; - value <<= 32 - bits - offset; - value >>= 32 - bits; - data.u[c] = value; - } - } - } - break; - } - - case ir_binop_ldexp: - for (unsigned c = 0; c < components; c++) { - if (op[0]->type->base_type == GLSL_TYPE_DOUBLE) { - data.d[c] = ldexp(op[0]->value.d[c], op[1]->value.i[c]); - /* Flush subnormal values to zero. */ - if (!isnormal(data.d[c])) - data.d[c] = copysign(0.0, op[0]->value.d[c]); - } else { - data.f[c] = ldexpf(op[0]->value.f[c], op[1]->value.i[c]); - /* Flush subnormal values to zero. */ - if (!isnormal(data.f[c])) - data.f[c] = copysignf(0.0f, op[0]->value.f[c]); - } - } - break; - - case ir_triop_fma: - assert(op[0]->type->base_type == GLSL_TYPE_FLOAT || - op[0]->type->base_type == GLSL_TYPE_DOUBLE); - assert(op[1]->type->base_type == GLSL_TYPE_FLOAT || - op[1]->type->base_type == GLSL_TYPE_DOUBLE); - assert(op[2]->type->base_type == GLSL_TYPE_FLOAT || - op[2]->type->base_type == GLSL_TYPE_DOUBLE); - - for (unsigned c = 0; c < components; c++) { - if (op[0]->type->base_type == GLSL_TYPE_DOUBLE) - data.d[c] = op[0]->value.d[c] * op[1]->value.d[c] - + op[2]->value.d[c]; - else - data.f[c] = op[0]->value.f[c] * op[1]->value.f[c] - + op[2]->value.f[c]; - } - break; - - case ir_triop_lrp: { - assert(op[0]->type->base_type == GLSL_TYPE_FLOAT || - op[0]->type->base_type == GLSL_TYPE_DOUBLE); - assert(op[1]->type->base_type == GLSL_TYPE_FLOAT || - op[1]->type->base_type == GLSL_TYPE_DOUBLE); - assert(op[2]->type->base_type == GLSL_TYPE_FLOAT || - op[2]->type->base_type == GLSL_TYPE_DOUBLE); - - unsigned c2_inc = op[2]->type->is_scalar() ? 0 : 1; - for (unsigned c = 0, c2 = 0; c < components; c2 += c2_inc, c++) { - if (op[0]->type->base_type == GLSL_TYPE_DOUBLE) - data.d[c] = op[0]->value.d[c] * (1.0 - op[2]->value.d[c2]) + - (op[1]->value.d[c] * op[2]->value.d[c2]); - else - data.f[c] = op[0]->value.f[c] * (1.0f - op[2]->value.f[c2]) + - (op[1]->value.f[c] * op[2]->value.f[c2]); - } - break; - } - - case ir_triop_csel: - for (unsigned c = 0; c < components; c++) { - if (op[1]->type->base_type == GLSL_TYPE_DOUBLE) - data.d[c] = op[0]->value.b[c] ? op[1]->value.d[c] - : op[2]->value.d[c]; - else - data.u[c] = op[0]->value.b[c] ? op[1]->value.u[c] - : op[2]->value.u[c]; - } - break; - - case ir_triop_vector_insert: { - const unsigned idx = op[2]->value.u[0]; - - memcpy(&data, &op[0]->value, sizeof(data)); - - switch (this->type->base_type) { - case GLSL_TYPE_INT: - data.i[idx] = op[1]->value.i[0]; - break; - case GLSL_TYPE_UINT: - data.u[idx] = op[1]->value.u[0]; - break; - case GLSL_TYPE_FLOAT: - data.f[idx] = op[1]->value.f[0]; - break; - case GLSL_TYPE_BOOL: - data.b[idx] = op[1]->value.b[0]; - break; - case GLSL_TYPE_DOUBLE: - data.d[idx] = op[1]->value.d[0]; - break; - default: - assert(!"Should not get here."); - break; - } - break; - } - - case ir_quadop_bitfield_insert: { - for (unsigned c = 0; c < components; c++) { - int offset = op[2]->value.i[c]; - int bits = op[3]->value.i[c]; - - if (bits == 0) - data.u[c] = op[0]->value.u[c]; - else if (offset < 0 || bits < 0) - data.u[c] = 0; /* Undefined, per spec. */ - else if (offset + bits > 32) - data.u[c] = 0; /* Undefined, per spec. */ - else { - unsigned insert_mask = ((1ull << bits) - 1) << offset; - - unsigned insert = op[1]->value.u[c]; - insert <<= offset; - insert &= insert_mask; - - unsigned base = op[0]->value.u[c]; - base &= ~insert_mask; - - data.u[c] = base | insert; - } } - break; - } - - case ir_quadop_vector: - for (unsigned c = 0; c < this->type->vector_elements; c++) { - switch (this->type->base_type) { - case GLSL_TYPE_INT: - data.i[c] = op[c]->value.i[0]; - break; - case GLSL_TYPE_UINT: - data.u[c] = op[c]->value.u[0]; - break; - case GLSL_TYPE_FLOAT: - data.f[c] = op[c]->value.f[0]; - break; - case GLSL_TYPE_DOUBLE: - data.d[c] = op[c]->value.d[0]; - break; - default: - assert(0); - } - } - break; - - default: - /* FINISHME: Should handle all expression types. */ return NULL; } +#include "ir_expression_operation_constant.h" + return new(ctx) ir_constant(this->type, &data); } @@ -1783,18 +679,18 @@ ir_constant_data data = { { 0 } }; const unsigned swiz_idx[4] = { - this->mask.x, this->mask.y, this->mask.z, this->mask.w + this->mask.x, this->mask.y, this->mask.z, this->mask.w }; for (unsigned i = 0; i < this->mask.num_components; i++) { - switch (v->type->base_type) { - case GLSL_TYPE_UINT: - case GLSL_TYPE_INT: data.u[i] = v->value.u[swiz_idx[i]]; break; - case GLSL_TYPE_FLOAT: data.f[i] = v->value.f[swiz_idx[i]]; break; - case GLSL_TYPE_BOOL: data.b[i] = v->value.b[swiz_idx[i]]; break; - case GLSL_TYPE_DOUBLE:data.d[i] = v->value.d[swiz_idx[i]]; break; - default: assert(!"Should not get here."); break; - } + switch (v->type->base_type) { + case GLSL_TYPE_UINT: + case GLSL_TYPE_INT: data.u[i] = v->value.u[swiz_idx[i]]; break; + case GLSL_TYPE_FLOAT: data.f[i] = v->value.f[swiz_idx[i]]; break; + case GLSL_TYPE_BOOL: data.b[i] = v->value.b[swiz_idx[i]]; break; + case GLSL_TYPE_DOUBLE:data.d[i] = v->value.d[swiz_idx[i]]; break; + default: assert(!"Should not get here."); break; + } } void *ctx = ralloc_parent(this); @@ -1811,9 +707,10 @@ /* Give priority to the context hashtable, if it exists */ if (variable_context) { - ir_constant *value = (ir_constant *)hash_table_find(variable_context, var); - if(value) - return value; + hash_entry *entry = _mesa_hash_table_search(variable_context, var); + + if(entry) + return (ir_constant *) entry->data; } /* The constant_value of a uniform variable is its initializer, @@ -1838,52 +735,52 @@ if ((array != NULL) && (idx != NULL)) { void *ctx = ralloc_parent(this); if (array->type->is_matrix()) { - /* Array access of a matrix results in a vector. - */ - const unsigned column = idx->value.u[0]; + /* Array access of a matrix results in a vector. + */ + const unsigned column = idx->value.u[0]; - const glsl_type *const column_type = array->type->column_type(); + const glsl_type *const column_type = array->type->column_type(); - /* Offset in the constant matrix to the first element of the column - * to be extracted. - */ - const unsigned mat_idx = column * column_type->vector_elements; + /* Offset in the constant matrix to the first element of the column + * to be extracted. + */ + const unsigned mat_idx = column * column_type->vector_elements; - ir_constant_data data = { { 0 } }; + ir_constant_data data = { { 0 } }; - switch (column_type->base_type) { - case GLSL_TYPE_UINT: - case GLSL_TYPE_INT: - for (unsigned i = 0; i < column_type->vector_elements; i++) - data.u[i] = array->value.u[mat_idx + i]; + switch (column_type->base_type) { + case GLSL_TYPE_UINT: + case GLSL_TYPE_INT: + for (unsigned i = 0; i < column_type->vector_elements; i++) + data.u[i] = array->value.u[mat_idx + i]; - break; + break; - case GLSL_TYPE_FLOAT: - for (unsigned i = 0; i < column_type->vector_elements; i++) - data.f[i] = array->value.f[mat_idx + i]; + case GLSL_TYPE_FLOAT: + for (unsigned i = 0; i < column_type->vector_elements; i++) + data.f[i] = array->value.f[mat_idx + i]; - break; + break; - case GLSL_TYPE_DOUBLE: - for (unsigned i = 0; i < column_type->vector_elements; i++) - data.d[i] = array->value.d[mat_idx + i]; + case GLSL_TYPE_DOUBLE: + for (unsigned i = 0; i < column_type->vector_elements; i++) + data.d[i] = array->value.d[mat_idx + i]; - break; + break; - default: - assert(!"Should not get here."); - break; - } + default: + assert(!"Should not get here."); + break; + } - return new(ctx) ir_constant(column_type, &data); + return new(ctx) ir_constant(column_type, &data); } else if (array->type->is_vector()) { - const unsigned component = idx->value.u[0]; + const unsigned component = idx->value.u[0]; - return new(ctx) ir_constant(array, component); + return new(ctx) ir_constant(array, component); } else { - const unsigned index = idx->value.u[0]; - return array->get_array_element(index)->clone(ctx, NULL); + const unsigned index = idx->value.u[0]; + return array->get_array_element(index)->clone(ctx, NULL); } } return NULL; @@ -1922,102 +819,102 @@ bool ir_function_signature::constant_expression_evaluate_expression_list(const struct exec_list &body, - struct hash_table *variable_context, - ir_constant **result) + struct hash_table *variable_context, + ir_constant **result) { foreach_in_list(ir_instruction, inst, &body) { switch(inst->ir_type) { - /* (declare () type symbol) */ + /* (declare () type symbol) */ case ir_type_variable: { - ir_variable *var = inst->as_variable(); - hash_table_insert(variable_context, ir_constant::zero(this, var->type), var); - break; + ir_variable *var = inst->as_variable(); + _mesa_hash_table_insert(variable_context, var, ir_constant::zero(this, var->type)); + break; } - /* (assign [condition] (write-mask) (ref) (value)) */ + /* (assign [condition] (write-mask) (ref) (value)) */ case ir_type_assignment: { - ir_assignment *asg = inst->as_assignment(); - if (asg->condition) { - ir_constant *cond = asg->condition->constant_expression_value(variable_context); - if (!cond) - return false; - if (!cond->get_bool_component(0)) - break; - } - - ir_constant *store = NULL; - int offset = 0; - - if (!constant_referenced(asg->lhs, variable_context, store, offset)) - return false; + ir_assignment *asg = inst->as_assignment(); + if (asg->condition) { + ir_constant *cond = asg->condition->constant_expression_value(variable_context); + if (!cond) + return false; + if (!cond->get_bool_component(0)) + break; + } + + ir_constant *store = NULL; + int offset = 0; - ir_constant *value = asg->rhs->constant_expression_value(variable_context); + if (!constant_referenced(asg->lhs, variable_context, store, offset)) + return false; - if (!value) - return false; + ir_constant *value = asg->rhs->constant_expression_value(variable_context); - store->copy_masked_offset(value, offset, asg->write_mask); - break; + if (!value) + return false; + + store->copy_masked_offset(value, offset, asg->write_mask); + break; } - /* (return (expression)) */ + /* (return (expression)) */ case ir_type_return: - assert (result); - *result = inst->as_return()->value->constant_expression_value(variable_context); - return *result != NULL; + assert (result); + *result = inst->as_return()->value->constant_expression_value(variable_context); + return *result != NULL; - /* (call name (ref) (params))*/ + /* (call name (ref) (params))*/ case ir_type_call: { - ir_call *call = inst->as_call(); + ir_call *call = inst->as_call(); - /* Just say no to void functions in constant expressions. We - * don't need them at that point. - */ + /* Just say no to void functions in constant expressions. We + * don't need them at that point. + */ - if (!call->return_deref) - return false; + if (!call->return_deref) + return false; - ir_constant *store = NULL; - int offset = 0; + ir_constant *store = NULL; + int offset = 0; - if (!constant_referenced(call->return_deref, variable_context, + if (!constant_referenced(call->return_deref, variable_context, store, offset)) - return false; + return false; - ir_constant *value = call->constant_expression_value(variable_context); + ir_constant *value = call->constant_expression_value(variable_context); - if(!value) - return false; + if(!value) + return false; - store->copy_offset(value, offset); - break; + store->copy_offset(value, offset); + break; } - /* (if condition (then-instructions) (else-instructions)) */ + /* (if condition (then-instructions) (else-instructions)) */ case ir_type_if: { - ir_if *iif = inst->as_if(); + ir_if *iif = inst->as_if(); - ir_constant *cond = iif->condition->constant_expression_value(variable_context); - if (!cond || !cond->type->is_boolean()) - return false; + ir_constant *cond = iif->condition->constant_expression_value(variable_context); + if (!cond || !cond->type->is_boolean()) + return false; - exec_list &branch = cond->get_bool_component(0) ? iif->then_instructions : iif->else_instructions; + exec_list &branch = cond->get_bool_component(0) ? iif->then_instructions : iif->else_instructions; - *result = NULL; - if (!constant_expression_evaluate_expression_list(branch, variable_context, result)) - return false; + *result = NULL; + if (!constant_expression_evaluate_expression_list(branch, variable_context, result)) + return false; - /* If there was a return in the branch chosen, drop out now. */ - if (*result) - return true; + /* If there was a return in the branch chosen, drop out now. */ + if (*result) + return true; - break; + break; } - /* Every other expression type, we drop out. */ + /* Every other expression type, we drop out. */ default: - return false; + return false; } } @@ -2055,25 +952,25 @@ * We expect the correctness of the number of parameters to have * been checked earlier. */ - hash_table *deref_hash = hash_table_ctor(8, hash_table_pointer_hash, - hash_table_pointer_compare); + hash_table *deref_hash = _mesa_hash_table_create(NULL, _mesa_hash_pointer, + _mesa_key_pointer_equal); /* If "origin" is non-NULL, then the function body is there. So we * have to use the variable objects from the object with the body, * but the parameter instanciation on the current object. */ - const exec_node *parameter_info = origin ? origin->parameters.head : parameters.head; + const exec_node *parameter_info = origin ? origin->parameters.get_head_raw() : parameters.get_head_raw(); foreach_in_list(ir_rvalue, n, actual_parameters) { ir_constant *constant = n->constant_expression_value(variable_context); if (constant == NULL) { - hash_table_dtor(deref_hash); + _mesa_hash_table_destroy(deref_hash, NULL); return NULL; } ir_variable *var = (ir_variable *)parameter_info; - hash_table_insert(deref_hash, constant, var); + _mesa_hash_table_insert(deref_hash, var, constant); parameter_info = parameter_info->next; } @@ -2086,7 +983,7 @@ if (constant_expression_evaluate_expression_list(origin ? origin->body : body, deref_hash, &result) && result) result = result->clone(ralloc_parent(this), NULL); - hash_table_dtor(deref_hash); + _mesa_hash_table_destroy(deref_hash, NULL); return result; } diff -Nru mesa-12.0.6/src/compiler/glsl/ir.cpp mesa-17.0.7/src/compiler/glsl/ir.cpp --- mesa-12.0.6/src/compiler/glsl/ir.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ir.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -341,6 +341,12 @@ this->type = glsl_type::int_type; break; + case ir_unop_vote_any: + case ir_unop_vote_all: + case ir_unop_vote_eq: + this->type = glsl_type::bool_type; + break; + default: assert(!"not reached: missing automatic type setup for ir_expression"); this->type = op0->type; @@ -492,130 +498,7 @@ return 0; } -static const char *const operator_strs[] = { - "~", - "!", - "neg", - "abs", - "sign", - "rcp", - "rsq", - "sqrt", - "exp", - "log", - "exp2", - "log2", - "f2i", - "f2u", - "i2f", - "f2b", - "b2f", - "i2b", - "b2i", - "u2f", - "i2u", - "u2i", - "d2f", - "f2d", - "d2i", - "i2d", - "d2u", - "u2d", - "d2b", - "bitcast_i2f", - "bitcast_f2i", - "bitcast_u2f", - "bitcast_f2u", - "trunc", - "ceil", - "floor", - "fract", - "round_even", - "sin", - "cos", - "dFdx", - "dFdxCoarse", - "dFdxFine", - "dFdy", - "dFdyCoarse", - "dFdyFine", - "packSnorm2x16", - "packSnorm4x8", - "packUnorm2x16", - "packUnorm4x8", - "packHalf2x16", - "unpackSnorm2x16", - "unpackSnorm4x8", - "unpackUnorm2x16", - "unpackUnorm4x8", - "unpackHalf2x16", - "bitfield_reverse", - "bit_count", - "find_msb", - "find_lsb", - "sat", - "packDouble2x32", - "unpackDouble2x32", - "frexp_sig", - "frexp_exp", - "noise", - "subroutine_to_int", - "interpolate_at_centroid", - "get_buffer_size", - "ssbo_unsized_array_length", - "+", - "-", - "*", - "imul_high", - "/", - "carry", - "borrow", - "%", - "<", - ">", - "<=", - ">=", - "==", - "!=", - "all_equal", - "any_nequal", - "<<", - ">>", - "&", - "^", - "|", - "&&", - "^^", - "||", - "dot", - "min", - "max", - "pow", - "ubo_load", - "ldexp", - "vector_extract", - "interpolate_at_offset", - "interpolate_at_sample", - "fma", - "lrp", - "csel", - "bitfield_extract", - "vector_insert", - "bitfield_insert", - "vector", -}; - -const char *ir_expression::operator_string(ir_expression_operation op) -{ - assert((unsigned int) op < ARRAY_SIZE(operator_strs)); - assert(ARRAY_SIZE(operator_strs) == (ir_quadop_vector + 1)); - return operator_strs[op]; -} - -const char *ir_expression::operator_string() -{ - return operator_string(this->operation); -} +#include "ir_expression_operation_strings.h" const char* depth_layout_string(ir_depth_layout layout) @@ -636,9 +519,8 @@ ir_expression_operation ir_expression::get_operator(const char *str) { - const int operator_count = sizeof(operator_strs) / sizeof(operator_strs[0]); - for (int op = 0; op < operator_count; op++) { - if (strcmp(str, operator_strs[op]) == 0) + for (int op = 0; op <= int(ir_last_opcode); op++) { + if (strcmp(str, ir_expression_operation_strings[op]) == 0) return (ir_expression_operation) op; } return (ir_expression_operation) -1; @@ -798,7 +680,7 @@ this->value.u[i] = 0; } - ir_constant *value = (ir_constant *) (value_list->head); + ir_constant *value = (ir_constant *) (value_list->get_head_raw()); /* Constructors with exactly one scalar argument are special for vectors * and matrices. For vectors, the scalar value is replicated to fill all @@ -1064,7 +946,7 @@ if (this->components.is_empty()) return NULL; - exec_node *node = this->components.head; + exec_node *node = this->components.get_head_raw(); for (int i = 0; i < idx; i++) { node = node->next; @@ -1188,8 +1070,8 @@ } if (this->type->base_type == GLSL_TYPE_STRUCT) { - const exec_node *a_node = this->components.head; - const exec_node *b_node = c->components.head; + const exec_node *a_node = this->components.get_head_raw(); + const exec_node *b_node = c->components.get_head_raw(); while (!a_node->is_tail_sentinel()) { assert(!b_node->is_tail_sentinel()); @@ -1641,6 +1523,10 @@ if (mode == ir_var_temporary && (name == NULL || name == ir_variable::tmp_name)) { this->name = ir_variable::tmp_name; + } else if (name == NULL || + strlen(name) < ARRAY_SIZE(this->name_storage)) { + strcpy(this->name_storage, name ? name : ""); + this->name = this->name_storage; } else { this->name = ralloc_strdup(this, name); } @@ -1667,7 +1553,7 @@ this->data.invariant = false; this->data.how_declared = ir_var_declared_normally; this->data.mode = mode; - this->data.interpolation = INTERP_QUALIFIER_NONE; + this->data.interpolation = INTERP_MODE_NONE; this->data.max_array_access = -1; this->data.offset = 0; this->data.precision = GLSL_PRECISION_NONE; @@ -1677,6 +1563,7 @@ this->data.image_volatile = false; this->data.image_restrict = false; this->data.from_ssbo_unsized_array = false; + this->data.fb_fetch_output = false; if (type != NULL) { if (type->base_type == GLSL_TYPE_SAMPLER) @@ -1694,10 +1581,10 @@ interpolation_string(unsigned interpolation) { switch (interpolation) { - case INTERP_QUALIFIER_NONE: return "no"; - case INTERP_QUALIFIER_SMOOTH: return "smooth"; - case INTERP_QUALIFIER_FLAT: return "flat"; - case INTERP_QUALIFIER_NOPERSPECTIVE: return "noperspective"; + case INTERP_MODE_NONE: return "no"; + case INTERP_MODE_SMOOTH: return "smooth"; + case INTERP_MODE_FLAT: return "flat"; + case INTERP_MODE_NOPERSPECTIVE: return "noperspective"; } assert(!"Should not get here."); @@ -1734,8 +1621,8 @@ ir_function_signature::ir_function_signature(const glsl_type *return_type, builtin_available_predicate b) : ir_instruction(ir_type_function_signature), - return_type(return_type), is_defined(false), is_intrinsic(false), - builtin_avail(b), _function(NULL) + return_type(return_type), is_defined(false), + intrinsic_id(ir_intrinsic_invalid), builtin_avail(b), _function(NULL) { this->origin = NULL; } diff -Nru mesa-12.0.6/src/compiler/glsl/ir_equals.cpp mesa-17.0.7/src/compiler/glsl/ir_equals.cpp --- mesa-12.0.6/src/compiler/glsl/ir_equals.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ir_equals.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -143,7 +143,7 @@ if (!possibly_null_equals(projector, other->projector, ignore)) return false; - if (!possibly_null_equals(shadow_comparitor, other->shadow_comparitor, ignore)) + if (!possibly_null_equals(shadow_comparator, other->shadow_comparator, ignore)) return false; if (!possibly_null_equals(offset, other->offset, ignore)) diff -Nru mesa-12.0.6/src/compiler/glsl/ir_expression_operation_constant.h mesa-17.0.7/src/compiler/glsl/ir_expression_operation_constant.h --- mesa-12.0.6/src/compiler/glsl/ir_expression_operation_constant.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ir_expression_operation_constant.h 2017-06-01 10:37:59.000000000 +0000 @@ -0,0 +1,1450 @@ + switch (this->operation) { + case ir_unop_bit_not: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.u[c] = ~ op[0]->value.u[c]; + break; + case GLSL_TYPE_INT: + data.i[c] = ~ op[0]->value.i[c]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_logic_not: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_BOOL: + data.b[c] = !op[0]->value.b[c]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_neg: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.u[c] = -((int) op[0]->value.u[c]); + break; + case GLSL_TYPE_INT: + data.i[c] = -op[0]->value.i[c]; + break; + case GLSL_TYPE_FLOAT: + data.f[c] = -op[0]->value.f[c]; + break; + case GLSL_TYPE_DOUBLE: + data.d[c] = -op[0]->value.d[c]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_abs: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_INT: + data.i[c] = op[0]->value.i[c] < 0 ? -op[0]->value.i[c] : op[0]->value.i[c]; + break; + case GLSL_TYPE_FLOAT: + data.f[c] = fabsf(op[0]->value.f[c]); + break; + case GLSL_TYPE_DOUBLE: + data.d[c] = fabs(op[0]->value.d[c]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_sign: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_INT: + data.i[c] = (op[0]->value.i[c] > 0) - (op[0]->value.i[c] < 0); + break; + case GLSL_TYPE_FLOAT: + data.f[c] = float((op[0]->value.f[c] > 0.0F) - (op[0]->value.f[c] < 0.0F)); + break; + case GLSL_TYPE_DOUBLE: + data.d[c] = double((op[0]->value.d[c] > 0.0) - (op[0]->value.d[c] < 0.0)); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_rcp: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.f[c] = op[0]->value.f[c] != 0.0F ? 1.0F / op[0]->value.f[c] : 0.0F; + break; + case GLSL_TYPE_DOUBLE: + data.d[c] = op[0]->value.d[c] != 0.0 ? 1.0 / op[0]->value.d[c] : 0.0; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_rsq: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.f[c] = 1.0F / sqrtf(op[0]->value.f[c]); + break; + case GLSL_TYPE_DOUBLE: + data.d[c] = 1.0 / sqrt(op[0]->value.d[c]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_sqrt: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.f[c] = sqrtf(op[0]->value.f[c]); + break; + case GLSL_TYPE_DOUBLE: + data.d[c] = sqrt(op[0]->value.d[c]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_exp: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.f[c] = expf(op[0]->value.f[c]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_log: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.f[c] = logf(op[0]->value.f[c]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_exp2: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.f[c] = exp2f(op[0]->value.f[c]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_log2: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.f[c] = log2f(op[0]->value.f[c]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_f2i: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.i[c] = (int) op[0]->value.f[c]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_f2u: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.u[c] = (unsigned) op[0]->value.f[c]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_i2f: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_INT: + data.f[c] = (float) op[0]->value.i[c]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_f2b: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.b[c] = op[0]->value.f[c] != 0.0F ? true : false; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_b2f: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_BOOL: + data.f[c] = op[0]->value.b[c] ? 1.0F : 0.0F; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_i2b: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.b[c] = op[0]->value.u[c] ? true : false; + break; + case GLSL_TYPE_INT: + data.b[c] = op[0]->value.i[c] ? true : false; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_b2i: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_BOOL: + data.i[c] = op[0]->value.b[c] ? 1 : 0; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_u2f: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.f[c] = (float) op[0]->value.u[c]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_i2u: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_INT: + data.u[c] = op[0]->value.i[c]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_u2i: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.i[c] = op[0]->value.u[c]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_d2f: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_DOUBLE: + data.f[c] = op[0]->value.d[c]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_f2d: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.d[c] = op[0]->value.f[c]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_d2i: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_DOUBLE: + data.i[c] = op[0]->value.d[c]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_i2d: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_INT: + data.d[c] = op[0]->value.i[c]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_d2u: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_DOUBLE: + data.u[c] = op[0]->value.d[c]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_u2d: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.d[c] = op[0]->value.u[c]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_d2b: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_DOUBLE: + data.b[c] = op[0]->value.d[c] != 0.0; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_bitcast_i2f: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_INT: + data.f[c] = bitcast_u2f(op[0]->value.i[c]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_bitcast_f2i: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.i[c] = bitcast_f2u(op[0]->value.f[c]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_bitcast_u2f: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.f[c] = bitcast_u2f(op[0]->value.u[c]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_bitcast_f2u: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.u[c] = bitcast_f2u(op[0]->value.f[c]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_trunc: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.f[c] = truncf(op[0]->value.f[c]); + break; + case GLSL_TYPE_DOUBLE: + data.d[c] = trunc(op[0]->value.d[c]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_ceil: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.f[c] = ceilf(op[0]->value.f[c]); + break; + case GLSL_TYPE_DOUBLE: + data.d[c] = ceil(op[0]->value.d[c]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_floor: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.f[c] = floorf(op[0]->value.f[c]); + break; + case GLSL_TYPE_DOUBLE: + data.d[c] = floor(op[0]->value.d[c]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_fract: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.f[c] = op[0]->value.f[c] - floorf(op[0]->value.f[c]); + break; + case GLSL_TYPE_DOUBLE: + data.d[c] = op[0]->value.d[c] - floor(op[0]->value.d[c]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_round_even: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.f[c] = _mesa_roundevenf(op[0]->value.f[c]); + break; + case GLSL_TYPE_DOUBLE: + data.d[c] = _mesa_roundeven(op[0]->value.d[c]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_sin: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.f[c] = sinf(op[0]->value.f[c]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_cos: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.f[c] = cosf(op[0]->value.f[c]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_dFdx: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.f[c] = 0.0f; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_dFdx_coarse: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.f[c] = 0.0f; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_dFdx_fine: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.f[c] = 0.0f; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_dFdy: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.f[c] = 0.0f; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_dFdy_coarse: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.f[c] = 0.0f; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_dFdy_fine: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.f[c] = 0.0f; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_pack_snorm_2x16: + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.u[0] = pack_2x16(pack_snorm_1x16, op[0]->value.f[0], op[0]->value.f[1]); + break; + default: + unreachable("invalid type"); + } + break; + + case ir_unop_pack_snorm_4x8: + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.u[0] = pack_4x8(pack_snorm_1x8, op[0]->value.f[0], op[0]->value.f[1], op[0]->value.f[2], op[0]->value.f[3]); + break; + default: + unreachable("invalid type"); + } + break; + + case ir_unop_pack_unorm_2x16: + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.u[0] = pack_2x16(pack_unorm_1x16, op[0]->value.f[0], op[0]->value.f[1]); + break; + default: + unreachable("invalid type"); + } + break; + + case ir_unop_pack_unorm_4x8: + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.u[0] = pack_4x8(pack_unorm_1x8, op[0]->value.f[0], op[0]->value.f[1], op[0]->value.f[2], op[0]->value.f[3]); + break; + default: + unreachable("invalid type"); + } + break; + + case ir_unop_pack_half_2x16: + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.u[0] = pack_2x16(pack_half_1x16, op[0]->value.f[0], op[0]->value.f[1]); + break; + default: + unreachable("invalid type"); + } + break; + + case ir_unop_unpack_snorm_2x16: + unpack_2x16(unpack_snorm_1x16, op[0]->value.u[0], &data.f[0], &data.f[1]); + break; + + case ir_unop_unpack_snorm_4x8: + unpack_4x8(unpack_snorm_1x8, op[0]->value.u[0], &data.f[0], &data.f[1], &data.f[2], &data.f[3]); + break; + + case ir_unop_unpack_unorm_2x16: + unpack_2x16(unpack_unorm_1x16, op[0]->value.u[0], &data.f[0], &data.f[1]); + break; + + case ir_unop_unpack_unorm_4x8: + unpack_4x8(unpack_unorm_1x8, op[0]->value.u[0], &data.f[0], &data.f[1], &data.f[2], &data.f[3]); + break; + + case ir_unop_unpack_half_2x16: + unpack_2x16(unpack_half_1x16, op[0]->value.u[0], &data.f[0], &data.f[1]); + break; + + case ir_unop_bitfield_reverse: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.u[c] = bitfield_reverse(op[0]->value.u[c]); + break; + case GLSL_TYPE_INT: + data.i[c] = bitfield_reverse(op[0]->value.i[c]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_bit_count: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.i[c] = _mesa_bitcount(op[0]->value.u[c]); + break; + case GLSL_TYPE_INT: + data.i[c] = _mesa_bitcount(op[0]->value.i[c]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_find_msb: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.i[c] = find_msb_uint(op[0]->value.u[c]); + break; + case GLSL_TYPE_INT: + data.i[c] = find_msb_int(op[0]->value.i[c]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_find_lsb: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.i[c] = find_msb_uint(op[0]->value.u[c] & -op[0]->value.u[c]); + break; + case GLSL_TYPE_INT: + data.i[c] = find_msb_uint(op[0]->value.i[c] & -op[0]->value.i[c]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_saturate: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.f[c] = CLAMP(op[0]->value.f[c], 0.0f, 1.0f); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_unop_pack_double_2x32: + memcpy(&data.d[0], &op[0]->value.u[0], sizeof(double)); + break; + + case ir_unop_unpack_double_2x32: + memcpy(&data.u[0], &op[0]->value.d[0], sizeof(double)); + break; + + case ir_binop_add: + assert(op[0]->type == op[1]->type || op0_scalar || op1_scalar); + for (unsigned c = 0, c0 = 0, c1 = 0; + c < components; + c0 += c0_inc, c1 += c1_inc, c++) { + + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.u[c] = op[0]->value.u[c0] + op[1]->value.u[c1]; + break; + case GLSL_TYPE_INT: + data.i[c] = op[0]->value.i[c0] + op[1]->value.i[c1]; + break; + case GLSL_TYPE_FLOAT: + data.f[c] = op[0]->value.f[c0] + op[1]->value.f[c1]; + break; + case GLSL_TYPE_DOUBLE: + data.d[c] = op[0]->value.d[c0] + op[1]->value.d[c1]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_binop_sub: + assert(op[0]->type == op[1]->type || op0_scalar || op1_scalar); + for (unsigned c = 0, c0 = 0, c1 = 0; + c < components; + c0 += c0_inc, c1 += c1_inc, c++) { + + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.u[c] = op[0]->value.u[c0] - op[1]->value.u[c1]; + break; + case GLSL_TYPE_INT: + data.i[c] = op[0]->value.i[c0] - op[1]->value.i[c1]; + break; + case GLSL_TYPE_FLOAT: + data.f[c] = op[0]->value.f[c0] - op[1]->value.f[c1]; + break; + case GLSL_TYPE_DOUBLE: + data.d[c] = op[0]->value.d[c0] - op[1]->value.d[c1]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_binop_mul: + /* Check for equal types, or unequal types involving scalars */ + if ((op[0]->type == op[1]->type && !op[0]->type->is_matrix()) + || op0_scalar || op1_scalar) { + for (unsigned c = 0, c0 = 0, c1 = 0; + c < components; + c0 += c0_inc, c1 += c1_inc, c++) { + + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.u[c] = op[0]->value.u[c0] * op[1]->value.u[c1]; + break; + case GLSL_TYPE_INT: + data.i[c] = op[0]->value.i[c0] * op[1]->value.i[c1]; + break; + case GLSL_TYPE_FLOAT: + data.f[c] = op[0]->value.f[c0] * op[1]->value.f[c1]; + break; + case GLSL_TYPE_DOUBLE: + data.d[c] = op[0]->value.d[c0] * op[1]->value.d[c1]; + break; + default: + unreachable("invalid type"); + } + } + } else { + assert(op[0]->type->is_matrix() || op[1]->type->is_matrix()); + + /* Multiply an N-by-M matrix with an M-by-P matrix. Since either + * matrix can be a GLSL vector, either N or P can be 1. + * + * For vec*mat, the vector is treated as a row vector. This + * means the vector is a 1-row x M-column matrix. + * + * For mat*vec, the vector is treated as a column vector. Since + * matrix_columns is 1 for vectors, this just works. + */ + const unsigned n = op[0]->type->is_vector() + ? 1 : op[0]->type->vector_elements; + const unsigned m = op[1]->type->vector_elements; + const unsigned p = op[1]->type->matrix_columns; + for (unsigned j = 0; j < p; j++) { + for (unsigned i = 0; i < n; i++) { + for (unsigned k = 0; k < m; k++) { + if (op[0]->type->base_type == GLSL_TYPE_DOUBLE) + data.d[i+n*j] += op[0]->value.d[i+n*k]*op[1]->value.d[k+m*j]; + else + data.f[i+n*j] += op[0]->value.f[i+n*k]*op[1]->value.f[k+m*j]; + } + } + } + } + break; + + case ir_binop_div: + assert(op[0]->type == op[1]->type || op0_scalar || op1_scalar); + for (unsigned c = 0, c0 = 0, c1 = 0; + c < components; + c0 += c0_inc, c1 += c1_inc, c++) { + + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.u[c] = op[1]->value.u[c1] == 0 ? 0 : op[0]->value.u[c0] / op[1]->value.u[c1]; + break; + case GLSL_TYPE_INT: + data.i[c] = op[1]->value.i[c1] == 0 ? 0 : op[0]->value.i[c0] / op[1]->value.i[c1]; + break; + case GLSL_TYPE_FLOAT: + data.f[c] = op[0]->value.f[c0] / op[1]->value.f[c1]; + break; + case GLSL_TYPE_DOUBLE: + data.d[c] = op[0]->value.d[c0] / op[1]->value.d[c1]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_binop_mod: + assert(op[0]->type == op[1]->type || op0_scalar || op1_scalar); + for (unsigned c = 0, c0 = 0, c1 = 0; + c < components; + c0 += c0_inc, c1 += c1_inc, c++) { + + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.u[c] = op[1]->value.u[c1] == 0 ? 0 : op[0]->value.u[c0] % op[1]->value.u[c1]; + break; + case GLSL_TYPE_INT: + data.i[c] = op[1]->value.i[c1] == 0 ? 0 : op[0]->value.i[c0] % op[1]->value.i[c1]; + break; + case GLSL_TYPE_FLOAT: + data.f[c] = op[0]->value.f[c0] - op[1]->value.f[c1] * floorf(op[0]->value.f[c0] / op[1]->value.f[c1]); + break; + case GLSL_TYPE_DOUBLE: + data.d[c] = op[0]->value.d[c0] - op[1]->value.d[c1] * floor(op[0]->value.d[c0] / op[1]->value.d[c1]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_binop_less: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.b[c] = op[0]->value.u[c] < op[1]->value.u[c]; + break; + case GLSL_TYPE_INT: + data.b[c] = op[0]->value.i[c] < op[1]->value.i[c]; + break; + case GLSL_TYPE_FLOAT: + data.b[c] = op[0]->value.f[c] < op[1]->value.f[c]; + break; + case GLSL_TYPE_DOUBLE: + data.b[c] = op[0]->value.d[c] < op[1]->value.d[c]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_binop_greater: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.b[c] = op[0]->value.u[c] > op[1]->value.u[c]; + break; + case GLSL_TYPE_INT: + data.b[c] = op[0]->value.i[c] > op[1]->value.i[c]; + break; + case GLSL_TYPE_FLOAT: + data.b[c] = op[0]->value.f[c] > op[1]->value.f[c]; + break; + case GLSL_TYPE_DOUBLE: + data.b[c] = op[0]->value.d[c] > op[1]->value.d[c]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_binop_lequal: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.b[c] = op[0]->value.u[c] <= op[1]->value.u[c]; + break; + case GLSL_TYPE_INT: + data.b[c] = op[0]->value.i[c] <= op[1]->value.i[c]; + break; + case GLSL_TYPE_FLOAT: + data.b[c] = op[0]->value.f[c] <= op[1]->value.f[c]; + break; + case GLSL_TYPE_DOUBLE: + data.b[c] = op[0]->value.d[c] <= op[1]->value.d[c]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_binop_gequal: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.b[c] = op[0]->value.u[c] >= op[1]->value.u[c]; + break; + case GLSL_TYPE_INT: + data.b[c] = op[0]->value.i[c] >= op[1]->value.i[c]; + break; + case GLSL_TYPE_FLOAT: + data.b[c] = op[0]->value.f[c] >= op[1]->value.f[c]; + break; + case GLSL_TYPE_DOUBLE: + data.b[c] = op[0]->value.d[c] >= op[1]->value.d[c]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_binop_equal: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.b[c] = op[0]->value.u[c] == op[1]->value.u[c]; + break; + case GLSL_TYPE_INT: + data.b[c] = op[0]->value.i[c] == op[1]->value.i[c]; + break; + case GLSL_TYPE_FLOAT: + data.b[c] = op[0]->value.f[c] == op[1]->value.f[c]; + break; + case GLSL_TYPE_DOUBLE: + data.b[c] = op[0]->value.d[c] == op[1]->value.d[c]; + break; + case GLSL_TYPE_BOOL: + data.b[c] = op[0]->value.b[c] == op[1]->value.b[c]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_binop_nequal: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.b[c] = op[0]->value.u[c] != op[1]->value.u[c]; + break; + case GLSL_TYPE_INT: + data.b[c] = op[0]->value.i[c] != op[1]->value.i[c]; + break; + case GLSL_TYPE_FLOAT: + data.b[c] = op[0]->value.f[c] != op[1]->value.f[c]; + break; + case GLSL_TYPE_DOUBLE: + data.b[c] = op[0]->value.d[c] != op[1]->value.d[c]; + break; + case GLSL_TYPE_BOOL: + data.b[c] = op[0]->value.b[c] != op[1]->value.b[c]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_binop_all_equal: + data.b[0] = op[0]->has_value(op[1]); + break; + + case ir_binop_any_nequal: + data.b[0] = !op[0]->has_value(op[1]); + break; + + case ir_binop_lshift: + assert(op[0]->type->base_type == GLSL_TYPE_UINT || + op[0]->type->base_type == GLSL_TYPE_INT); + assert(op[1]->type->base_type == GLSL_TYPE_UINT || + op[1]->type->base_type == GLSL_TYPE_INT); + for (unsigned c = 0, c0 = 0, c1 = 0; + c < components; + c0 += c0_inc, c1 += c1_inc, c++) { + + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.u[c] = op[0]->value.u[c0] << op[1]->value.u[c1]; + break; + case GLSL_TYPE_INT: + data.i[c] = op[0]->value.i[c0] << op[1]->value.i[c1]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_binop_rshift: + assert(op[0]->type->base_type == GLSL_TYPE_UINT || + op[0]->type->base_type == GLSL_TYPE_INT); + assert(op[1]->type->base_type == GLSL_TYPE_UINT || + op[1]->type->base_type == GLSL_TYPE_INT); + for (unsigned c = 0, c0 = 0, c1 = 0; + c < components; + c0 += c0_inc, c1 += c1_inc, c++) { + + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.u[c] = op[0]->value.u[c0] >> op[1]->value.u[c1]; + break; + case GLSL_TYPE_INT: + data.i[c] = op[0]->value.i[c0] >> op[1]->value.i[c1]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_binop_bit_and: + assert(op[0]->type == op[1]->type || op0_scalar || op1_scalar); + for (unsigned c = 0, c0 = 0, c1 = 0; + c < components; + c0 += c0_inc, c1 += c1_inc, c++) { + + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.u[c] = op[0]->value.u[c0] & op[1]->value.u[c1]; + break; + case GLSL_TYPE_INT: + data.i[c] = op[0]->value.i[c0] & op[1]->value.i[c1]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_binop_bit_xor: + assert(op[0]->type == op[1]->type || op0_scalar || op1_scalar); + for (unsigned c = 0, c0 = 0, c1 = 0; + c < components; + c0 += c0_inc, c1 += c1_inc, c++) { + + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.u[c] = op[0]->value.u[c0] ^ op[1]->value.u[c1]; + break; + case GLSL_TYPE_INT: + data.i[c] = op[0]->value.i[c0] ^ op[1]->value.i[c1]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_binop_bit_or: + assert(op[0]->type == op[1]->type || op0_scalar || op1_scalar); + for (unsigned c = 0, c0 = 0, c1 = 0; + c < components; + c0 += c0_inc, c1 += c1_inc, c++) { + + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.u[c] = op[0]->value.u[c0] | op[1]->value.u[c1]; + break; + case GLSL_TYPE_INT: + data.i[c] = op[0]->value.i[c0] | op[1]->value.i[c1]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_binop_logic_and: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_BOOL: + data.b[c] = op[0]->value.b[c] && op[1]->value.b[c]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_binop_logic_xor: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_BOOL: + data.b[c] = op[0]->value.b[c] != op[1]->value.b[c]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_binop_logic_or: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_BOOL: + data.b[c] = op[0]->value.b[c] || op[1]->value.b[c]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_binop_dot: + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.f[0] = dot_f(op[0], op[1]); + break; + case GLSL_TYPE_DOUBLE: + data.d[0] = dot_d(op[0], op[1]); + break; + default: + unreachable("invalid type"); + } + break; + + case ir_binop_min: + assert(op[0]->type == op[1]->type || op0_scalar || op1_scalar); + for (unsigned c = 0, c0 = 0, c1 = 0; + c < components; + c0 += c0_inc, c1 += c1_inc, c++) { + + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.u[c] = MIN2(op[0]->value.u[c0], op[1]->value.u[c1]); + break; + case GLSL_TYPE_INT: + data.i[c] = MIN2(op[0]->value.i[c0], op[1]->value.i[c1]); + break; + case GLSL_TYPE_FLOAT: + data.f[c] = MIN2(op[0]->value.f[c0], op[1]->value.f[c1]); + break; + case GLSL_TYPE_DOUBLE: + data.d[c] = MIN2(op[0]->value.d[c0], op[1]->value.d[c1]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_binop_max: + assert(op[0]->type == op[1]->type || op0_scalar || op1_scalar); + for (unsigned c = 0, c0 = 0, c1 = 0; + c < components; + c0 += c0_inc, c1 += c1_inc, c++) { + + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.u[c] = MAX2(op[0]->value.u[c0], op[1]->value.u[c1]); + break; + case GLSL_TYPE_INT: + data.i[c] = MAX2(op[0]->value.i[c0], op[1]->value.i[c1]); + break; + case GLSL_TYPE_FLOAT: + data.f[c] = MAX2(op[0]->value.f[c0], op[1]->value.f[c1]); + break; + case GLSL_TYPE_DOUBLE: + data.d[c] = MAX2(op[0]->value.d[c0], op[1]->value.d[c1]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_binop_pow: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.f[c] = powf(op[0]->value.f[c], op[1]->value.f[c]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_binop_ldexp: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.f[c] = ldexpf_flush_subnormal(op[0]->value.f[c], op[1]->value.i[c]); + break; + case GLSL_TYPE_DOUBLE: + data.d[c] = ldexp_flush_subnormal(op[0]->value.d[c], op[1]->value.i[c]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_binop_vector_extract: { + const int c = CLAMP(op[1]->value.i[0], 0, + (int) op[0]->type->vector_elements - 1); + + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.u[0] = op[0]->value.u[c]; + break; + case GLSL_TYPE_INT: + data.i[0] = op[0]->value.i[c]; + break; + case GLSL_TYPE_FLOAT: + data.f[0] = op[0]->value.f[c]; + break; + case GLSL_TYPE_DOUBLE: + data.d[0] = op[0]->value.d[c]; + break; + case GLSL_TYPE_BOOL: + data.b[0] = op[0]->value.b[c]; + break; + default: + unreachable("invalid type"); + } + break; + } + + case ir_triop_fma: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_FLOAT: + data.f[c] = op[0]->value.f[c] * op[1]->value.f[c] + op[2]->value.f[c]; + break; + case GLSL_TYPE_DOUBLE: + data.d[c] = op[0]->value.d[c] * op[1]->value.d[c] + op[2]->value.d[c]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_triop_lrp: { + assert(op[0]->type->base_type == GLSL_TYPE_FLOAT || + op[0]->type->base_type == GLSL_TYPE_DOUBLE); + assert(op[1]->type->base_type == GLSL_TYPE_FLOAT || + op[1]->type->base_type == GLSL_TYPE_DOUBLE); + assert(op[2]->type->base_type == GLSL_TYPE_FLOAT || + op[2]->type->base_type == GLSL_TYPE_DOUBLE); + + unsigned c2_inc = op[2]->type->is_scalar() ? 0 : 1; + for (unsigned c = 0, c2 = 0; c < components; c2 += c2_inc, c++) { + switch (this->type->base_type) { + case GLSL_TYPE_FLOAT: + data.f[c] = op[0]->value.f[c] * (1.0f - op[2]->value.f[c2]) + (op[1]->value.f[c] * op[2]->value.f[c2]); + break; + case GLSL_TYPE_DOUBLE: + data.d[c] = op[0]->value.d[c] * (1.0 - op[2]->value.d[c2]) + (op[1]->value.d[c] * op[2]->value.d[c2]); + break; + default: + unreachable("invalid type"); + } + } + break; + } + + case ir_triop_csel: + for (unsigned c = 0; c < components; c++) { + switch (this->type->base_type) { + case GLSL_TYPE_UINT: + data.u[c] = op[0]->value.b[c] ? op[1]->value.u[c] : op[2]->value.u[c]; + break; + case GLSL_TYPE_INT: + data.i[c] = op[0]->value.b[c] ? op[1]->value.i[c] : op[2]->value.i[c]; + break; + case GLSL_TYPE_FLOAT: + data.f[c] = op[0]->value.b[c] ? op[1]->value.f[c] : op[2]->value.f[c]; + break; + case GLSL_TYPE_DOUBLE: + data.d[c] = op[0]->value.b[c] ? op[1]->value.d[c] : op[2]->value.d[c]; + break; + case GLSL_TYPE_BOOL: + data.b[c] = op[0]->value.b[c] ? op[1]->value.b[c] : op[2]->value.b[c]; + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_triop_bitfield_extract: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.i[c] = bitfield_extract_uint(op[0]->value.u[c], op[1]->value.i[c], op[2]->value.i[c]); + break; + case GLSL_TYPE_INT: + data.i[c] = bitfield_extract_int(op[0]->value.i[c], op[1]->value.i[c], op[2]->value.i[c]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_triop_vector_insert: { + const unsigned idx = op[2]->value.u[0]; + + memcpy(&data, &op[0]->value, sizeof(data)); + + switch (this->type->base_type) { + case GLSL_TYPE_UINT: + data.u[idx] = op[1]->value.u[0]; + break; + case GLSL_TYPE_INT: + data.i[idx] = op[1]->value.i[0]; + break; + case GLSL_TYPE_FLOAT: + data.f[idx] = op[1]->value.f[0]; + break; + case GLSL_TYPE_DOUBLE: + data.d[idx] = op[1]->value.d[0]; + break; + case GLSL_TYPE_BOOL: + data.b[idx] = op[1]->value.b[0]; + break; + default: + unreachable("invalid type"); + } + break; + } + + case ir_quadop_bitfield_insert: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + case GLSL_TYPE_UINT: + data.u[c] = bitfield_insert(op[0]->value.u[c], op[1]->value.u[c], op[2]->value.i[c], op[3]->value.i[c]); + break; + case GLSL_TYPE_INT: + data.i[c] = bitfield_insert(op[0]->value.i[c], op[1]->value.i[c], op[2]->value.i[c], op[3]->value.i[c]); + break; + default: + unreachable("invalid type"); + } + } + break; + + case ir_quadop_vector: + for (unsigned c = 0; c < this->type->vector_elements; c++) { + switch (this->type->base_type) { + case GLSL_TYPE_UINT: + data.u[c] = op[c]->value.u[0]; + break; + case GLSL_TYPE_INT: + data.i[c] = op[c]->value.i[0]; + break; + case GLSL_TYPE_FLOAT: + data.f[c] = op[c]->value.f[0]; + break; + case GLSL_TYPE_DOUBLE: + data.d[c] = op[c]->value.d[0]; + break; + case GLSL_TYPE_BOOL: + data.b[c] = op[c]->value.b[0]; + break; + default: + unreachable("invalid type"); + } + } + break; + + default: + /* FINISHME: Should handle all expression types. */ + return NULL; + } + diff -Nru mesa-12.0.6/src/compiler/glsl/ir_expression_operation.h mesa-17.0.7/src/compiler/glsl/ir_expression_operation.h --- mesa-12.0.6/src/compiler/glsl/ir_expression_operation.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ir_expression_operation.h 2017-06-01 10:37:59.000000000 +0000 @@ -0,0 +1,145 @@ +/* + * Copyright (C) 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +enum ir_expression_operation { + ir_unop_bit_not, + ir_unop_logic_not, + ir_unop_neg, + ir_unop_abs, + ir_unop_sign, + ir_unop_rcp, + ir_unop_rsq, + ir_unop_sqrt, + ir_unop_exp, + ir_unop_log, + ir_unop_exp2, + ir_unop_log2, + ir_unop_f2i, + ir_unop_f2u, + ir_unop_i2f, + ir_unop_f2b, + ir_unop_b2f, + ir_unop_i2b, + ir_unop_b2i, + ir_unop_u2f, + ir_unop_i2u, + ir_unop_u2i, + ir_unop_d2f, + ir_unop_f2d, + ir_unop_d2i, + ir_unop_i2d, + ir_unop_d2u, + ir_unop_u2d, + ir_unop_d2b, + ir_unop_bitcast_i2f, + ir_unop_bitcast_f2i, + ir_unop_bitcast_u2f, + ir_unop_bitcast_f2u, + ir_unop_trunc, + ir_unop_ceil, + ir_unop_floor, + ir_unop_fract, + ir_unop_round_even, + ir_unop_sin, + ir_unop_cos, + ir_unop_dFdx, + ir_unop_dFdx_coarse, + ir_unop_dFdx_fine, + ir_unop_dFdy, + ir_unop_dFdy_coarse, + ir_unop_dFdy_fine, + ir_unop_pack_snorm_2x16, + ir_unop_pack_snorm_4x8, + ir_unop_pack_unorm_2x16, + ir_unop_pack_unorm_4x8, + ir_unop_pack_half_2x16, + ir_unop_unpack_snorm_2x16, + ir_unop_unpack_snorm_4x8, + ir_unop_unpack_unorm_2x16, + ir_unop_unpack_unorm_4x8, + ir_unop_unpack_half_2x16, + ir_unop_bitfield_reverse, + ir_unop_bit_count, + ir_unop_find_msb, + ir_unop_find_lsb, + ir_unop_saturate, + ir_unop_pack_double_2x32, + ir_unop_unpack_double_2x32, + ir_unop_frexp_sig, + ir_unop_frexp_exp, + ir_unop_noise, + ir_unop_subroutine_to_int, + ir_unop_interpolate_at_centroid, + ir_unop_get_buffer_size, + ir_unop_ssbo_unsized_array_length, + ir_unop_vote_any, + ir_unop_vote_all, + ir_unop_vote_eq, + ir_binop_add, + ir_binop_sub, + ir_binop_mul, + ir_binop_imul_high, + ir_binop_div, + ir_binop_carry, + ir_binop_borrow, + ir_binop_mod, + ir_binop_less, + ir_binop_greater, + ir_binop_lequal, + ir_binop_gequal, + ir_binop_equal, + ir_binop_nequal, + ir_binop_all_equal, + ir_binop_any_nequal, + ir_binop_lshift, + ir_binop_rshift, + ir_binop_bit_and, + ir_binop_bit_xor, + ir_binop_bit_or, + ir_binop_logic_and, + ir_binop_logic_xor, + ir_binop_logic_or, + ir_binop_dot, + ir_binop_min, + ir_binop_max, + ir_binop_pow, + ir_binop_ubo_load, + ir_binop_ldexp, + ir_binop_vector_extract, + ir_binop_interpolate_at_offset, + ir_binop_interpolate_at_sample, + ir_triop_fma, + ir_triop_lrp, + ir_triop_csel, + ir_triop_bitfield_extract, + ir_triop_vector_insert, + ir_quadop_bitfield_insert, + ir_quadop_vector, + + /* Sentinels marking the last of each kind of operation. */ + ir_last_unop = ir_unop_vote_eq, + ir_last_binop = ir_binop_interpolate_at_sample, + ir_last_triop = ir_triop_vector_insert, + ir_last_quadop = ir_quadop_vector, + ir_last_opcode = ir_quadop_vector +}; diff -Nru mesa-12.0.6/src/compiler/glsl/ir_expression_operation.py mesa-17.0.7/src/compiler/glsl/ir_expression_operation.py --- mesa-12.0.6/src/compiler/glsl/ir_expression_operation.py 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ir_expression_operation.py 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,744 @@ +#! /usr/bin/env python +# +# Copyright (C) 2015 Intel Corporation +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +# IN THE SOFTWARE. + +import mako.template +import sys + +class type(object): + def __init__(self, c_type, union_field, glsl_type): + self.c_type = c_type + self.union_field = union_field + self.glsl_type = glsl_type + + +class type_signature_iter(object): + """Basic iterator for a set of type signatures. Various kinds of sequences of + types come in, and an iteration of type_signature objects come out. + + """ + + def __init__(self, source_types, num_operands): + """Initialize an iterator from a sequence of input types and a number + operands. This is for signatures where all the operands have the same + type and the result type of the operation is the same as the input type. + + """ + self.dest_type = None + self.source_types = source_types + self.num_operands = num_operands + self.i = 0 + + def __init__(self, dest_type, source_types, num_operands): + """Initialize an iterator from a result tpye, a sequence of input types and a + number operands. This is for signatures where all the operands have the + same type but the result type of the operation is different from the + input type. + + """ + self.dest_type = dest_type + self.source_types = source_types + self.num_operands = num_operands + self.i = 0 + + def __iter__(self): + return self + + def next(self): + if self.i < len(self.source_types): + i = self.i + self.i += 1 + + if self.dest_type is None: + dest_type = self.source_types[i] + else: + dest_type = self.dest_type + + return (dest_type, self.num_operands * (self.source_types[i],)) + else: + raise StopIteration() + + +uint_type = type("unsigned", "u", "GLSL_TYPE_UINT") +int_type = type("int", "i", "GLSL_TYPE_INT") +float_type = type("float", "f", "GLSL_TYPE_FLOAT") +double_type = type("double", "d", "GLSL_TYPE_DOUBLE") +bool_type = type("bool", "b", "GLSL_TYPE_BOOL") + +all_types = (uint_type, int_type, float_type, double_type, bool_type) +numeric_types = (uint_type, int_type, float_type, double_type) +signed_numeric_types = (int_type, float_type, double_type) +integer_types = (uint_type, int_type) +real_types = (float_type, double_type) + +# This template is for operations that can have operands of a several +# different types, and each type may or may not has a different C expression. +# This is used by most operations. +constant_template_common = mako.template.Template("""\ + case ${op.get_enum_name()}: + for (unsigned c = 0; c < op[0]->type->components(); c++) { + switch (op[0]->type->base_type) { + % for dst_type, src_types in op.signatures(): + case ${src_types[0].glsl_type}: + data.${dst_type.union_field}[c] = ${op.get_c_expression(src_types)}; + break; + % endfor + default: + unreachable("invalid type"); + } + } + break;""") + +# This template is for binary operations that can operate on some combination +# of scalar and vector operands. +constant_template_vector_scalar = mako.template.Template("""\ + case ${op.get_enum_name()}: + % if "mixed" in op.flags: + % for i in xrange(op.num_operands): + assert(op[${i}]->type->base_type == ${op.source_types[0].glsl_type} || + % for src_type in op.source_types[1:-1]: + op[${i}]->type->base_type == ${src_type.glsl_type} || + % endfor + op[${i}]->type->base_type == ${op.source_types[-1].glsl_type}); + % endfor + % else: + assert(op[0]->type == op[1]->type || op0_scalar || op1_scalar); + % endif + for (unsigned c = 0, c0 = 0, c1 = 0; + c < components; + c0 += c0_inc, c1 += c1_inc, c++) { + + switch (op[0]->type->base_type) { + % for dst_type, src_types in op.signatures(): + case ${src_types[0].glsl_type}: + data.${dst_type.union_field}[c] = ${op.get_c_expression(src_types, ("c0", "c1", "c2"))}; + break; + % endfor + default: + unreachable("invalid type"); + } + } + break;""") + +# This template is for multiplication. It is unique because it has to support +# matrix * vector and matrix * matrix operations, and those are just different. +constant_template_mul = mako.template.Template("""\ + case ${op.get_enum_name()}: + /* Check for equal types, or unequal types involving scalars */ + if ((op[0]->type == op[1]->type && !op[0]->type->is_matrix()) + || op0_scalar || op1_scalar) { + for (unsigned c = 0, c0 = 0, c1 = 0; + c < components; + c0 += c0_inc, c1 += c1_inc, c++) { + + switch (op[0]->type->base_type) { + % for dst_type, src_types in op.signatures(): + case ${src_types[0].glsl_type}: + data.${dst_type.union_field}[c] = ${op.get_c_expression(src_types, ("c0", "c1", "c2"))}; + break; + % endfor + default: + unreachable("invalid type"); + } + } + } else { + assert(op[0]->type->is_matrix() || op[1]->type->is_matrix()); + + /* Multiply an N-by-M matrix with an M-by-P matrix. Since either + * matrix can be a GLSL vector, either N or P can be 1. + * + * For vec*mat, the vector is treated as a row vector. This + * means the vector is a 1-row x M-column matrix. + * + * For mat*vec, the vector is treated as a column vector. Since + * matrix_columns is 1 for vectors, this just works. + */ + const unsigned n = op[0]->type->is_vector() + ? 1 : op[0]->type->vector_elements; + const unsigned m = op[1]->type->vector_elements; + const unsigned p = op[1]->type->matrix_columns; + for (unsigned j = 0; j < p; j++) { + for (unsigned i = 0; i < n; i++) { + for (unsigned k = 0; k < m; k++) { + if (op[0]->type->base_type == GLSL_TYPE_DOUBLE) + data.d[i+n*j] += op[0]->value.d[i+n*k]*op[1]->value.d[k+m*j]; + else + data.f[i+n*j] += op[0]->value.f[i+n*k]*op[1]->value.f[k+m*j]; + } + } + } + } + break;""") + +# This template is for operations that are horizontal and either have only a +# single type or the implementation for all types is identical. That is, the +# operation consumes a vector and produces a scalar. +constant_template_horizontal_single_implementation = mako.template.Template("""\ + case ${op.get_enum_name()}: + data.${op.dest_type.union_field}[0] = ${op.c_expression['default']}; + break;""") + +# This template is for operations that are horizontal and do not assign the +# result. The various unpack operations are examples. +constant_template_horizontal_nonassignment = mako.template.Template("""\ + case ${op.get_enum_name()}: + ${op.c_expression['default']}; + break;""") + +# This template is for binary operations that are horizontal. That is, the +# operation consumes a vector and produces a scalar. +constant_template_horizontal = mako.template.Template("""\ + case ${op.get_enum_name()}: + switch (op[0]->type->base_type) { + % for dst_type, src_types in op.signatures(): + case ${src_types[0].glsl_type}: + data.${dst_type.union_field}[0] = ${op.get_c_expression(src_types)}; + break; + % endfor + default: + unreachable("invalid type"); + } + break;""") + +# This template is for ir_binop_vector_extract. +constant_template_vector_extract = mako.template.Template("""\ + case ${op.get_enum_name()}: { + const int c = CLAMP(op[1]->value.i[0], 0, + (int) op[0]->type->vector_elements - 1); + + switch (op[0]->type->base_type) { + % for dst_type, src_types in op.signatures(): + case ${src_types[0].glsl_type}: + data.${dst_type.union_field}[0] = op[0]->value.${src_types[0].union_field}[c]; + break; + % endfor + default: + unreachable("invalid type"); + } + break; + }""") + +# This template is for ir_triop_vector_insert. +constant_template_vector_insert = mako.template.Template("""\ + case ${op.get_enum_name()}: { + const unsigned idx = op[2]->value.u[0]; + + memcpy(&data, &op[0]->value, sizeof(data)); + + switch (this->type->base_type) { + % for dst_type, src_types in op.signatures(): + case ${src_types[0].glsl_type}: + data.${dst_type.union_field}[idx] = op[1]->value.${src_types[0].union_field}[0]; + break; + % endfor + default: + unreachable("invalid type"); + } + break; + }""") + +# This template is for ir_quadop_vector. +constant_template_vector = mako.template.Template("""\ + case ${op.get_enum_name()}: + for (unsigned c = 0; c < this->type->vector_elements; c++) { + switch (this->type->base_type) { + % for dst_type, src_types in op.signatures(): + case ${src_types[0].glsl_type}: + data.${dst_type.union_field}[c] = op[c]->value.${src_types[0].union_field}[0]; + break; + % endfor + default: + unreachable("invalid type"); + } + } + break;""") + +# This template is for ir_triop_lrp. +constant_template_lrp = mako.template.Template("""\ + case ${op.get_enum_name()}: { + assert(op[0]->type->base_type == GLSL_TYPE_FLOAT || + op[0]->type->base_type == GLSL_TYPE_DOUBLE); + assert(op[1]->type->base_type == GLSL_TYPE_FLOAT || + op[1]->type->base_type == GLSL_TYPE_DOUBLE); + assert(op[2]->type->base_type == GLSL_TYPE_FLOAT || + op[2]->type->base_type == GLSL_TYPE_DOUBLE); + + unsigned c2_inc = op[2]->type->is_scalar() ? 0 : 1; + for (unsigned c = 0, c2 = 0; c < components; c2 += c2_inc, c++) { + switch (this->type->base_type) { + % for dst_type, src_types in op.signatures(): + case ${src_types[0].glsl_type}: + data.${dst_type.union_field}[c] = ${op.get_c_expression(src_types, ("c", "c", "c2"))}; + break; + % endfor + default: + unreachable("invalid type"); + } + } + break; + }""") + +# This template is for ir_triop_csel. This expression is really unique +# because not all of the operands are the same type, and the second operand +# determines the type of the expression (instead of the first). +constant_template_csel = mako.template.Template("""\ + case ${op.get_enum_name()}: + for (unsigned c = 0; c < components; c++) { + switch (this->type->base_type) { + % for dst_type, src_types in op.signatures(): + case ${src_types[1].glsl_type}: + data.${dst_type.union_field}[c] = ${op.get_c_expression(src_types)}; + break; + % endfor + default: + unreachable("invalid type"); + } + } + break;""") + + +vector_scalar_operation = "vector-scalar" +horizontal_operation = "horizontal" +types_identical_operation = "identical" +non_assign_operation = "nonassign" +mixed_type_operation = "mixed" + +class operation(object): + def __init__(self, name, num_operands, printable_name = None, source_types = None, dest_type = None, c_expression = None, flags = None, all_signatures = None): + self.name = name + self.num_operands = num_operands + + if printable_name is None: + self.printable_name = name + else: + self.printable_name = printable_name + + self.all_signatures = all_signatures + + if source_types is None: + self.source_types = tuple() + else: + self.source_types = source_types + + self.dest_type = dest_type + + if c_expression is None: + self.c_expression = None + elif isinstance(c_expression, str): + self.c_expression = {'default': c_expression} + else: + self.c_expression = c_expression + + if flags is None: + self.flags = frozenset() + elif isinstance(flags, str): + self.flags = frozenset([flags]) + else: + self.flags = frozenset(flags) + + + def get_enum_name(self): + return "ir_{0}op_{1}".format(("un", "bin", "tri", "quad")[self.num_operands-1], self.name) + + + def get_template(self): + if self.c_expression is None: + return None + + if horizontal_operation in self.flags: + if non_assign_operation in self.flags: + return constant_template_horizontal_nonassignment.render(op=self) + elif types_identical_operation in self.flags: + return constant_template_horizontal_single_implementation.render(op=self) + else: + return constant_template_horizontal.render(op=self) + + if self.num_operands == 2: + if self.name == "mul": + return constant_template_mul.render(op=self) + elif self.name == "vector_extract": + return constant_template_vector_extract.render(op=self) + elif vector_scalar_operation in self.flags: + return constant_template_vector_scalar.render(op=self) + elif self.num_operands == 3: + if self.name == "vector_insert": + return constant_template_vector_insert.render(op=self) + elif self.name == "lrp": + return constant_template_lrp.render(op=self) + elif self.name == "csel": + return constant_template_csel.render(op=self) + elif self.num_operands == 4: + if self.name == "vector": + return constant_template_vector.render(op=self) + + return constant_template_common.render(op=self) + + + def get_c_expression(self, types, indices=("c", "c", "c")): + src0 = "op[0]->value.{0}[{1}]".format(types[0].union_field, indices[0]) + src1 = "op[1]->value.{0}[{1}]".format(types[1].union_field, indices[1]) if len(types) >= 2 else "ERROR" + src2 = "op[2]->value.{0}[{1}]".format(types[2].union_field, indices[2]) if len(types) >= 3 else "ERROR" + src3 = "op[3]->value.{0}[c]".format(types[3].union_field) if len(types) >= 4 else "ERROR" + + expr = self.c_expression[types[0].union_field] if types[0].union_field in self.c_expression else self.c_expression['default'] + + return expr.format(src0=src0, + src1=src1, + src2=src2, + src3=src3) + + + def signatures(self): + if self.all_signatures is not None: + return self.all_signatures + else: + return type_signature_iter(self.dest_type, self.source_types, self.num_operands) + + +ir_expression_operation = [ + operation("bit_not", 1, printable_name="~", source_types=integer_types, c_expression="~ {src0}"), + operation("logic_not", 1, printable_name="!", source_types=(bool_type,), c_expression="!{src0}"), + operation("neg", 1, source_types=numeric_types, c_expression={'u': "-((int) {src0})", 'default': "-{src0}"}), + operation("abs", 1, source_types=signed_numeric_types, c_expression={'i': "{src0} < 0 ? -{src0} : {src0}", 'f': "fabsf({src0})", 'd': "fabs({src0})"}), + operation("sign", 1, source_types=signed_numeric_types, c_expression={'i': "({src0} > 0) - ({src0} < 0)", 'f': "float(({src0} > 0.0F) - ({src0} < 0.0F))", 'd': "double(({src0} > 0.0) - ({src0} < 0.0))"}), + operation("rcp", 1, source_types=real_types, c_expression={'f': "{src0} != 0.0F ? 1.0F / {src0} : 0.0F", 'd': "{src0} != 0.0 ? 1.0 / {src0} : 0.0"}), + operation("rsq", 1, source_types=real_types, c_expression={'f': "1.0F / sqrtf({src0})", 'd': "1.0 / sqrt({src0})"}), + operation("sqrt", 1, source_types=real_types, c_expression={'f': "sqrtf({src0})", 'd': "sqrt({src0})"}), + operation("exp", 1, source_types=(float_type,), c_expression="expf({src0})"), # Log base e on gentype + operation("log", 1, source_types=(float_type,), c_expression="logf({src0})"), # Natural log on gentype + operation("exp2", 1, source_types=(float_type,), c_expression="exp2f({src0})"), + operation("log2", 1, source_types=(float_type,), c_expression="log2f({src0})"), + + # Float-to-integer conversion. + operation("f2i", 1, source_types=(float_type,), dest_type=int_type, c_expression="(int) {src0}"), + # Float-to-unsigned conversion. + operation("f2u", 1, source_types=(float_type,), dest_type=uint_type, c_expression="(unsigned) {src0}"), + # Integer-to-float conversion. + operation("i2f", 1, source_types=(int_type,), dest_type=float_type, c_expression="(float) {src0}"), + # Float-to-boolean conversion + operation("f2b", 1, source_types=(float_type,), dest_type=bool_type, c_expression="{src0} != 0.0F ? true : false"), + # Boolean-to-float conversion + operation("b2f", 1, source_types=(bool_type,), dest_type=float_type, c_expression="{src0} ? 1.0F : 0.0F"), + # int-to-boolean conversion + operation("i2b", 1, source_types=integer_types, dest_type=bool_type, c_expression="{src0} ? true : false"), + # Boolean-to-int conversion + operation("b2i", 1, source_types=(bool_type,), dest_type=int_type, c_expression="{src0} ? 1 : 0"), + # Unsigned-to-float conversion. + operation("u2f", 1, source_types=(uint_type,), dest_type=float_type, c_expression="(float) {src0}"), + # Integer-to-unsigned conversion. + operation("i2u", 1, source_types=(int_type,), dest_type=uint_type, c_expression="{src0}"), + # Unsigned-to-integer conversion. + operation("u2i", 1, source_types=(uint_type,), dest_type=int_type, c_expression="{src0}"), + # Double-to-float conversion. + operation("d2f", 1, source_types=(double_type,), dest_type=float_type, c_expression="{src0}"), + # Float-to-double conversion. + operation("f2d", 1, source_types=(float_type,), dest_type=double_type, c_expression="{src0}"), + # Double-to-integer conversion. + operation("d2i", 1, source_types=(double_type,), dest_type=int_type, c_expression="{src0}"), + # Integer-to-double conversion. + operation("i2d", 1, source_types=(int_type,), dest_type=double_type, c_expression="{src0}"), + # Double-to-unsigned conversion. + operation("d2u", 1, source_types=(double_type,), dest_type=uint_type, c_expression="{src0}"), + # Unsigned-to-double conversion. + operation("u2d", 1, source_types=(uint_type,), dest_type=double_type, c_expression="{src0}"), + # Double-to-boolean conversion. + operation("d2b", 1, source_types=(double_type,), dest_type=bool_type, c_expression="{src0} != 0.0"), + # 'Bit-identical int-to-float "conversion" + operation("bitcast_i2f", 1, source_types=(int_type,), dest_type=float_type, c_expression="bitcast_u2f({src0})"), + # 'Bit-identical float-to-int "conversion" + operation("bitcast_f2i", 1, source_types=(float_type,), dest_type=int_type, c_expression="bitcast_f2u({src0})"), + # 'Bit-identical uint-to-float "conversion" + operation("bitcast_u2f", 1, source_types=(uint_type,), dest_type=float_type, c_expression="bitcast_u2f({src0})"), + # 'Bit-identical float-to-uint "conversion" + operation("bitcast_f2u", 1, source_types=(float_type,), dest_type=uint_type, c_expression="bitcast_f2u({src0})"), + + # Unary floating-point rounding operations. + operation("trunc", 1, source_types=real_types, c_expression={'f': "truncf({src0})", 'd': "trunc({src0})"}), + operation("ceil", 1, source_types=real_types, c_expression={'f': "ceilf({src0})", 'd': "ceil({src0})"}), + operation("floor", 1, source_types=real_types, c_expression={'f': "floorf({src0})", 'd': "floor({src0})"}), + operation("fract", 1, source_types=real_types, c_expression={'f': "{src0} - floorf({src0})", 'd': "{src0} - floor({src0})"}), + operation("round_even", 1, source_types=real_types, c_expression={'f': "_mesa_roundevenf({src0})", 'd': "_mesa_roundeven({src0})"}), + + # Trigonometric operations. + operation("sin", 1, source_types=(float_type,), c_expression="sinf({src0})"), + operation("cos", 1, source_types=(float_type,), c_expression="cosf({src0})"), + + # Partial derivatives. + operation("dFdx", 1, source_types=(float_type,), c_expression="0.0f"), + operation("dFdx_coarse", 1, printable_name="dFdxCoarse", source_types=(float_type,), c_expression="0.0f"), + operation("dFdx_fine", 1, printable_name="dFdxFine", source_types=(float_type,), c_expression="0.0f"), + operation("dFdy", 1, source_types=(float_type,), c_expression="0.0f"), + operation("dFdy_coarse", 1, printable_name="dFdyCoarse", source_types=(float_type,), c_expression="0.0f"), + operation("dFdy_fine", 1, printable_name="dFdyFine", source_types=(float_type,), c_expression="0.0f"), + + # Floating point pack and unpack operations. + operation("pack_snorm_2x16", 1, printable_name="packSnorm2x16", source_types=(float_type,), dest_type=uint_type, c_expression="pack_2x16(pack_snorm_1x16, op[0]->value.f[0], op[0]->value.f[1])", flags=horizontal_operation), + operation("pack_snorm_4x8", 1, printable_name="packSnorm4x8", source_types=(float_type,), dest_type=uint_type, c_expression="pack_4x8(pack_snorm_1x8, op[0]->value.f[0], op[0]->value.f[1], op[0]->value.f[2], op[0]->value.f[3])", flags=horizontal_operation), + operation("pack_unorm_2x16", 1, printable_name="packUnorm2x16", source_types=(float_type,), dest_type=uint_type, c_expression="pack_2x16(pack_unorm_1x16, op[0]->value.f[0], op[0]->value.f[1])", flags=horizontal_operation), + operation("pack_unorm_4x8", 1, printable_name="packUnorm4x8", source_types=(float_type,), dest_type=uint_type, c_expression="pack_4x8(pack_unorm_1x8, op[0]->value.f[0], op[0]->value.f[1], op[0]->value.f[2], op[0]->value.f[3])", flags=horizontal_operation), + operation("pack_half_2x16", 1, printable_name="packHalf2x16", source_types=(float_type,), dest_type=uint_type, c_expression="pack_2x16(pack_half_1x16, op[0]->value.f[0], op[0]->value.f[1])", flags=horizontal_operation), + operation("unpack_snorm_2x16", 1, printable_name="unpackSnorm2x16", source_types=(uint_type,), dest_type=float_type, c_expression="unpack_2x16(unpack_snorm_1x16, op[0]->value.u[0], &data.f[0], &data.f[1])", flags=frozenset((horizontal_operation, non_assign_operation))), + operation("unpack_snorm_4x8", 1, printable_name="unpackSnorm4x8", source_types=(uint_type,), dest_type=float_type, c_expression="unpack_4x8(unpack_snorm_1x8, op[0]->value.u[0], &data.f[0], &data.f[1], &data.f[2], &data.f[3])", flags=frozenset((horizontal_operation, non_assign_operation))), + operation("unpack_unorm_2x16", 1, printable_name="unpackUnorm2x16", source_types=(uint_type,), dest_type=float_type, c_expression="unpack_2x16(unpack_unorm_1x16, op[0]->value.u[0], &data.f[0], &data.f[1])", flags=frozenset((horizontal_operation, non_assign_operation))), + operation("unpack_unorm_4x8", 1, printable_name="unpackUnorm4x8", source_types=(uint_type,), dest_type=float_type, c_expression="unpack_4x8(unpack_unorm_1x8, op[0]->value.u[0], &data.f[0], &data.f[1], &data.f[2], &data.f[3])", flags=frozenset((horizontal_operation, non_assign_operation))), + operation("unpack_half_2x16", 1, printable_name="unpackHalf2x16", source_types=(uint_type,), dest_type=float_type, c_expression="unpack_2x16(unpack_half_1x16, op[0]->value.u[0], &data.f[0], &data.f[1])", flags=frozenset((horizontal_operation, non_assign_operation))), + + # Bit operations, part of ARB_gpu_shader5. + operation("bitfield_reverse", 1, source_types=integer_types, c_expression="bitfield_reverse({src0})"), + operation("bit_count", 1, source_types=integer_types, dest_type=int_type, c_expression="_mesa_bitcount({src0})"), + operation("find_msb", 1, source_types=integer_types, dest_type=int_type, c_expression={'u': "find_msb_uint({src0})", 'i': "find_msb_int({src0})"}), + operation("find_lsb", 1, source_types=integer_types, dest_type=int_type, c_expression="find_msb_uint({src0} & -{src0})"), + + operation("saturate", 1, printable_name="sat", source_types=(float_type,), c_expression="CLAMP({src0}, 0.0f, 1.0f)"), + + # Double packing, part of ARB_gpu_shader_fp64. + operation("pack_double_2x32", 1, printable_name="packDouble2x32", source_types=(uint_type,), dest_type=double_type, c_expression="memcpy(&data.d[0], &op[0]->value.u[0], sizeof(double))", flags=frozenset((horizontal_operation, non_assign_operation))), + operation("unpack_double_2x32", 1, printable_name="unpackDouble2x32", source_types=(double_type,), dest_type=uint_type, c_expression="memcpy(&data.u[0], &op[0]->value.d[0], sizeof(double))", flags=frozenset((horizontal_operation, non_assign_operation))), + + operation("frexp_sig", 1), + operation("frexp_exp", 1), + + operation("noise", 1), + + operation("subroutine_to_int", 1), + + # Interpolate fs input at centroid + # + # operand0 is the fs input. + operation("interpolate_at_centroid", 1), + + # Ask the driver for the total size of a buffer block. + # operand0 is the ir_constant buffer block index in the linked shader. + operation("get_buffer_size", 1), + + # Calculate length of an unsized array inside a buffer block. + # This opcode is going to be replaced in a lowering pass inside + # the linker. + # + # operand0 is the unsized array's ir_value for the calculation + # of its length. + operation("ssbo_unsized_array_length", 1), + + # Vote among threads on the value of the boolean argument. + operation("vote_any", 1), + operation("vote_all", 1), + operation("vote_eq", 1), + + operation("add", 2, printable_name="+", source_types=numeric_types, c_expression="{src0} + {src1}", flags=vector_scalar_operation), + operation("sub", 2, printable_name="-", source_types=numeric_types, c_expression="{src0} - {src1}", flags=vector_scalar_operation), + # "Floating-point or low 32-bit integer multiply." + operation("mul", 2, printable_name="*", source_types=numeric_types, c_expression="{src0} * {src1}"), + operation("imul_high", 2), # Calculates the high 32-bits of a 64-bit multiply. + operation("div", 2, printable_name="/", source_types=numeric_types, c_expression={'u': "{src1} == 0 ? 0 : {src0} / {src1}", 'i': "{src1} == 0 ? 0 : {src0} / {src1}", 'default': "{src0} / {src1}"}, flags=vector_scalar_operation), + + # Returns the carry resulting from the addition of the two arguments. + operation("carry", 2), + + # Returns the borrow resulting from the subtraction of the second argument + # from the first argument. + operation("borrow", 2), + + # Either (vector % vector) or (vector % scalar) + # + # We don't use fmod because it rounds toward zero; GLSL specifies the use + # of floor. + operation("mod", 2, printable_name="%", source_types=numeric_types, c_expression={'u': "{src1} == 0 ? 0 : {src0} % {src1}", 'i': "{src1} == 0 ? 0 : {src0} % {src1}", 'f': "{src0} - {src1} * floorf({src0} / {src1})", 'd': "{src0} - {src1} * floor({src0} / {src1})"}, flags=vector_scalar_operation), + + # Binary comparison operators which return a boolean vector. + # The type of both operands must be equal. + operation("less", 2, printable_name="<", source_types=numeric_types, dest_type=bool_type, c_expression="{src0} < {src1}"), + operation("greater", 2, printable_name=">", source_types=numeric_types, dest_type=bool_type, c_expression="{src0} > {src1}"), + operation("lequal", 2, printable_name="<=", source_types=numeric_types, dest_type=bool_type, c_expression="{src0} <= {src1}"), + operation("gequal", 2, printable_name=">=", source_types=numeric_types, dest_type=bool_type, c_expression="{src0} >= {src1}"), + operation("equal", 2, printable_name="==", source_types=all_types, dest_type=bool_type, c_expression="{src0} == {src1}"), + operation("nequal", 2, printable_name="!=", source_types=all_types, dest_type=bool_type, c_expression="{src0} != {src1}"), + + # Returns single boolean for whether all components of operands[0] + # equal the components of operands[1]. + operation("all_equal", 2, source_types=all_types, dest_type=bool_type, c_expression="op[0]->has_value(op[1])", flags=frozenset((horizontal_operation, types_identical_operation))), + + # Returns single boolean for whether any component of operands[0] + # is not equal to the corresponding component of operands[1]. + operation("any_nequal", 2, source_types=all_types, dest_type=bool_type, c_expression="!op[0]->has_value(op[1])", flags=frozenset((horizontal_operation, types_identical_operation))), + + # Bit-wise binary operations. + operation("lshift", 2, printable_name="<<", source_types=integer_types, c_expression="{src0} << {src1}", flags=frozenset((vector_scalar_operation, mixed_type_operation))), + operation("rshift", 2, printable_name=">>", source_types=integer_types, c_expression="{src0} >> {src1}", flags=frozenset((vector_scalar_operation, mixed_type_operation))), + operation("bit_and", 2, printable_name="&", source_types=integer_types, c_expression="{src0} & {src1}", flags=vector_scalar_operation), + operation("bit_xor", 2, printable_name="^", source_types=integer_types, c_expression="{src0} ^ {src1}", flags=vector_scalar_operation), + operation("bit_or", 2, printable_name="|", source_types=integer_types, c_expression="{src0} | {src1}", flags=vector_scalar_operation), + + operation("logic_and", 2, printable_name="&&", source_types=(bool_type,), c_expression="{src0} && {src1}"), + operation("logic_xor", 2, printable_name="^^", source_types=(bool_type,), c_expression="{src0} != {src1}"), + operation("logic_or", 2, printable_name="||", source_types=(bool_type,), c_expression="{src0} || {src1}"), + + operation("dot", 2, source_types=real_types, c_expression={'f': "dot_f(op[0], op[1])", 'd': "dot_d(op[0], op[1])"}, flags=horizontal_operation), + operation("min", 2, source_types=numeric_types, c_expression="MIN2({src0}, {src1})", flags=vector_scalar_operation), + operation("max", 2, source_types=numeric_types, c_expression="MAX2({src0}, {src1})", flags=vector_scalar_operation), + + operation("pow", 2, source_types=(float_type,), c_expression="powf({src0}, {src1})"), + + # Load a value the size of a given GLSL type from a uniform block. + # + # operand0 is the ir_constant uniform block index in the linked shader. + # operand1 is a byte offset within the uniform block. + operation("ubo_load", 2), + + # Multiplies a number by two to a power, part of ARB_gpu_shader5. + operation("ldexp", 2, + all_signatures=((float_type, (float_type, int_type)), + (double_type, (double_type, int_type))), + c_expression={'f': "ldexpf_flush_subnormal({src0}, {src1})", + 'd': "ldexp_flush_subnormal({src0}, {src1})"}), + + # Extract a scalar from a vector + # + # operand0 is the vector + # operand1 is the index of the field to read from operand0 + operation("vector_extract", 2, source_types=all_types, c_expression="anything-except-None"), + + # Interpolate fs input at offset + # + # operand0 is the fs input + # operand1 is the offset from the pixel center + operation("interpolate_at_offset", 2), + + # Interpolate fs input at sample position + # + # operand0 is the fs input + # operand1 is the sample ID + operation("interpolate_at_sample", 2), + + # Fused floating-point multiply-add, part of ARB_gpu_shader5. + operation("fma", 3, source_types=real_types, c_expression="{src0} * {src1} + {src2}"), + + operation("lrp", 3, source_types=real_types, c_expression={'f': "{src0} * (1.0f - {src2}) + ({src1} * {src2})", 'd': "{src0} * (1.0 - {src2}) + ({src1} * {src2})"}), + + # Conditional Select + # + # A vector conditional select instruction (like ?:, but operating per- + # component on vectors). + # + # See also lower_instructions_visitor::ldexp_to_arith + operation("csel", 3, + all_signatures=zip(all_types, zip(len(all_types) * (bool_type,), all_types, all_types)), + c_expression="{src0} ? {src1} : {src2}"), + + operation("bitfield_extract", 3, + all_signatures=((int_type, (uint_type, int_type, int_type)), + (int_type, (int_type, int_type, int_type))), + c_expression={'u': "bitfield_extract_uint({src0}, {src1}, {src2})", + 'i': "bitfield_extract_int({src0}, {src1}, {src2})"}), + + # Generate a value with one field of a vector changed + # + # operand0 is the vector + # operand1 is the value to write into the vector result + # operand2 is the index in operand0 to be modified + operation("vector_insert", 3, source_types=all_types, c_expression="anything-except-None"), + + operation("bitfield_insert", 4, + all_signatures=((uint_type, (uint_type, uint_type, int_type, int_type)), + (int_type, (int_type, int_type, int_type, int_type))), + c_expression="bitfield_insert({src0}, {src1}, {src2}, {src3})"), + + operation("vector", 4, source_types=all_types, c_expression="anything-except-None"), +] + + +if __name__ == "__main__": + copyright = """/* + * Copyright (C) 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +""" + enum_template = mako.template.Template(copyright + """ +enum ir_expression_operation { +% for item in values: + ${item.get_enum_name()}, +% endfor + + /* Sentinels marking the last of each kind of operation. */ +% for item in lasts: + ir_last_${("un", "bin", "tri", "quad")[item.num_operands - 1]}op = ${item.get_enum_name()}, +% endfor + ir_last_opcode = ir_quadop_${lasts[3].name} +};""") + + strings_template = mako.template.Template(copyright + """ +const char *const ir_expression_operation_strings[] = { +% for item in values: + "${item.printable_name}", +% endfor +}; + +const char *const ir_expression_operation_enum_strings[] = { +% for item in values: + "${item.name}", +% endfor +};""") + + constant_template = mako.template.Template("""\ + switch (this->operation) { +% for op in values: + % if op.c_expression is not None: +${op.get_template()} + + % endif +% endfor + default: + /* FINISHME: Should handle all expression types. */ + return NULL; + } +""") + + if sys.argv[1] == "enum": + lasts = [None, None, None, None] + for item in reversed(ir_expression_operation): + i = item.num_operands - 1 + if lasts[i] is None: + lasts[i] = item + + print(enum_template.render(values=ir_expression_operation, + lasts=lasts)) + elif sys.argv[1] == "strings": + print(strings_template.render(values=ir_expression_operation)) + elif sys.argv[1] == "constant": + print(constant_template.render(values=ir_expression_operation)) diff -Nru mesa-12.0.6/src/compiler/glsl/ir_expression_operation_strings.h mesa-17.0.7/src/compiler/glsl/ir_expression_operation_strings.h --- mesa-12.0.6/src/compiler/glsl/ir_expression_operation_strings.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ir_expression_operation_strings.h 2017-06-01 10:37:59.000000000 +0000 @@ -0,0 +1,254 @@ +/* + * Copyright (C) 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +const char *const ir_expression_operation_strings[] = { + "~", + "!", + "neg", + "abs", + "sign", + "rcp", + "rsq", + "sqrt", + "exp", + "log", + "exp2", + "log2", + "f2i", + "f2u", + "i2f", + "f2b", + "b2f", + "i2b", + "b2i", + "u2f", + "i2u", + "u2i", + "d2f", + "f2d", + "d2i", + "i2d", + "d2u", + "u2d", + "d2b", + "bitcast_i2f", + "bitcast_f2i", + "bitcast_u2f", + "bitcast_f2u", + "trunc", + "ceil", + "floor", + "fract", + "round_even", + "sin", + "cos", + "dFdx", + "dFdxCoarse", + "dFdxFine", + "dFdy", + "dFdyCoarse", + "dFdyFine", + "packSnorm2x16", + "packSnorm4x8", + "packUnorm2x16", + "packUnorm4x8", + "packHalf2x16", + "unpackSnorm2x16", + "unpackSnorm4x8", + "unpackUnorm2x16", + "unpackUnorm4x8", + "unpackHalf2x16", + "bitfield_reverse", + "bit_count", + "find_msb", + "find_lsb", + "sat", + "packDouble2x32", + "unpackDouble2x32", + "frexp_sig", + "frexp_exp", + "noise", + "subroutine_to_int", + "interpolate_at_centroid", + "get_buffer_size", + "ssbo_unsized_array_length", + "vote_any", + "vote_all", + "vote_eq", + "+", + "-", + "*", + "imul_high", + "/", + "carry", + "borrow", + "%", + "<", + ">", + "<=", + ">=", + "==", + "!=", + "all_equal", + "any_nequal", + "<<", + ">>", + "&", + "^", + "|", + "&&", + "^^", + "||", + "dot", + "min", + "max", + "pow", + "ubo_load", + "ldexp", + "vector_extract", + "interpolate_at_offset", + "interpolate_at_sample", + "fma", + "lrp", + "csel", + "bitfield_extract", + "vector_insert", + "bitfield_insert", + "vector", +}; + +const char *const ir_expression_operation_enum_strings[] = { + "bit_not", + "logic_not", + "neg", + "abs", + "sign", + "rcp", + "rsq", + "sqrt", + "exp", + "log", + "exp2", + "log2", + "f2i", + "f2u", + "i2f", + "f2b", + "b2f", + "i2b", + "b2i", + "u2f", + "i2u", + "u2i", + "d2f", + "f2d", + "d2i", + "i2d", + "d2u", + "u2d", + "d2b", + "bitcast_i2f", + "bitcast_f2i", + "bitcast_u2f", + "bitcast_f2u", + "trunc", + "ceil", + "floor", + "fract", + "round_even", + "sin", + "cos", + "dFdx", + "dFdx_coarse", + "dFdx_fine", + "dFdy", + "dFdy_coarse", + "dFdy_fine", + "pack_snorm_2x16", + "pack_snorm_4x8", + "pack_unorm_2x16", + "pack_unorm_4x8", + "pack_half_2x16", + "unpack_snorm_2x16", + "unpack_snorm_4x8", + "unpack_unorm_2x16", + "unpack_unorm_4x8", + "unpack_half_2x16", + "bitfield_reverse", + "bit_count", + "find_msb", + "find_lsb", + "saturate", + "pack_double_2x32", + "unpack_double_2x32", + "frexp_sig", + "frexp_exp", + "noise", + "subroutine_to_int", + "interpolate_at_centroid", + "get_buffer_size", + "ssbo_unsized_array_length", + "vote_any", + "vote_all", + "vote_eq", + "add", + "sub", + "mul", + "imul_high", + "div", + "carry", + "borrow", + "mod", + "less", + "greater", + "lequal", + "gequal", + "equal", + "nequal", + "all_equal", + "any_nequal", + "lshift", + "rshift", + "bit_and", + "bit_xor", + "bit_or", + "logic_and", + "logic_xor", + "logic_or", + "dot", + "min", + "max", + "pow", + "ubo_load", + "ldexp", + "vector_extract", + "interpolate_at_offset", + "interpolate_at_sample", + "fma", + "lrp", + "csel", + "bitfield_extract", + "vector_insert", + "bitfield_insert", + "vector", +}; diff -Nru mesa-12.0.6/src/compiler/glsl/ir_function.cpp mesa-17.0.7/src/compiler/glsl/ir_function.cpp --- mesa-12.0.6/src/compiler/glsl/ir_function.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ir_function.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -43,8 +43,8 @@ parameter_lists_match(_mesa_glsl_parse_state *state, const exec_list *list_a, const exec_list *list_b) { - const exec_node *node_a = list_a->head; - const exec_node *node_b = list_b->head; + const exec_node *node_a = list_a->get_head_raw(); + const exec_node *node_b = list_b->get_head_raw(); /* This is set to true if there is an inexact match requiring an implicit * conversion. */ @@ -222,9 +222,9 @@ if (*other == sig) continue; - const exec_node *node_a = sig->parameters.head; - const exec_node *node_b = (*other)->parameters.head; - const exec_node *node_p = actual_parameters->head; + const exec_node *node_a = sig->parameters.get_head_raw(); + const exec_node *node_b = (*other)->parameters.get_head_raw(); + const exec_node *node_p = actual_parameters->get_head_raw(); bool better_for_some_parameter = false; @@ -268,11 +268,13 @@ if (num_matches == 1) return *matches; - /* Without GLSL 4.0 / ARB_gpu_shader5, there is no overload resolution - * among multiple inexact matches. Note that state may be NULL here if - * called from the linker; in that case we assume everything supported in - * any GLSL version is available. */ - if (!state || state->is_version(400, 0) || state->ARB_gpu_shader5_enable) { + /* Without GLSL 4.0, ARB_gpu_shader5, or MESA_shader_integer_functions, + * there is no overload resolution among multiple inexact matches. Note + * that state may be NULL here if called from the linker; in that case we + * assume everything supported in any GLSL version is available. + */ + if (!state || state->is_version(400, 0) || state->ARB_gpu_shader5_enable || + state->MESA_shader_integer_functions_enable) { for (ir_function_signature **sig = matches; sig < matches + num_matches; sig++) { if (is_best_inexact_overload(actual_parameters, matches, num_matches, *sig)) return *sig; @@ -366,8 +368,8 @@ static bool parameter_lists_match_exact(const exec_list *list_a, const exec_list *list_b) { - const exec_node *node_a = list_a->head; - const exec_node *node_b = list_b->head; + const exec_node *node_a = list_a->get_head_raw(); + const exec_node *node_b = list_b->get_head_raw(); for (/* empty */ ; !node_a->is_tail_sentinel() && !node_b->is_tail_sentinel() diff -Nru mesa-12.0.6/src/compiler/glsl/ir_function_detect_recursion.cpp mesa-17.0.7/src/compiler/glsl/ir_function_detect_recursion.cpp --- mesa-12.0.6/src/compiler/glsl/ir_function_detect_recursion.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ir_function_detect_recursion.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -124,7 +124,7 @@ #include "ir.h" #include "glsl_parser_extras.h" #include "linker.h" -#include "program/hash_table.h" +#include "util/hash_table.h" #include "program.h" namespace { @@ -159,22 +159,25 @@ { progress = false; this->mem_ctx = ralloc_context(NULL); - this->function_hash = hash_table_ctor(0, hash_table_pointer_hash, - hash_table_pointer_compare); + this->function_hash = _mesa_hash_table_create(NULL, _mesa_hash_pointer, + _mesa_key_pointer_equal); } ~has_recursion_visitor() { - hash_table_dtor(this->function_hash); + _mesa_hash_table_destroy(this->function_hash, NULL); ralloc_free(this->mem_ctx); } function *get_function(ir_function_signature *sig) { - function *f = (function *) hash_table_find(this->function_hash, sig); - if (f == NULL) { - f = new(mem_ctx) function(sig); - hash_table_insert(this->function_hash, f, sig); + function *f; + hash_entry *entry = _mesa_hash_table_search(this->function_hash, sig); + if (entry == NULL) { + f = new(mem_ctx) function(sig); + _mesa_hash_table_insert(this->function_hash, sig, f); + } else { + f = (function *) entry->data; } return f; @@ -251,16 +254,17 @@ if (f->callers.is_empty() || f->callees.is_empty()) { while (!f->callers.is_empty()) { - struct call_node *n = (struct call_node *) f->callers.pop_head(); - destroy_links(& n->func->callees, f); + struct call_node *n = (struct call_node *) f->callers.pop_head(); + destroy_links(& n->func->callees, f); } while (!f->callees.is_empty()) { - struct call_node *n = (struct call_node *) f->callees.pop_head(); - destroy_links(& n->func->callers, f); + struct call_node *n = (struct call_node *) f->callees.pop_head(); + destroy_links(& n->func->callers, f); } - hash_table_remove(visitor->function_hash, key); + hash_entry *entry = _mesa_hash_table_search(visitor->function_hash, key); + _mesa_hash_table_remove(visitor->function_hash, entry); visitor->progress = true; } } diff -Nru mesa-12.0.6/src/compiler/glsl/ir.h mesa-17.0.7/src/compiler/glsl/ir.h --- mesa-12.0.6/src/compiler/glsl/ir.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ir.h 2017-06-01 10:37:10.000000000 +0000 @@ -537,6 +537,10 @@ return this->interface_type; } + enum glsl_interface_packing get_interface_type_packing() const + { + return this->interface_type->get_interface_packing(); + } /** * Get the max_ifc_array_access pointer * @@ -588,14 +592,15 @@ inline bool is_interpolation_flat() const { - return this->data.interpolation == INTERP_QUALIFIER_FLAT || + return this->data.interpolation == INTERP_MODE_FLAT || this->type->contains_integer() || this->type->contains_double(); } inline bool is_name_ralloced() const { - return this->name != ir_variable::tmp_name; + return this->name != ir_variable::tmp_name && + this->name != this->name_storage; } /** @@ -620,6 +625,16 @@ */ const char *name; +private: + /** + * If the name length fits into name_storage, it's used, otherwise + * the name is ralloc'd. shader-db mining showed that 70% of variables + * fit here. This is a win over ralloc where only ralloc_header has + * 20 bytes on 64-bit (28 bytes with DEBUG), and we can also skip malloc. + */ + char name_storage[16]; + +public: struct ir_variable_data { /** @@ -682,7 +697,7 @@ /** * Interpolation mode for shader inputs / outputs * - * \sa ir_variable_interpolation + * \sa glsl_interp_mode */ unsigned interpolation:2; @@ -827,6 +842,20 @@ unsigned from_ssbo_unsized_array:1; /**< unsized array buffer variable. */ unsigned implicit_sized_array:1; + + /** + * Is this a non-patch TCS output / TES input array that was implicitly + * sized to gl_MaxPatchVertices? + */ + unsigned tess_varying_implicit_sized_array:1; + + /** + * Whether this is a fragment shader output implicitly initialized with + * the previous contents of the specified render target at the + * framebuffer location corresponding to this shader invocation. + */ + unsigned fb_fetch_output:1; + /** * Emit a warning if this variable is accessed. */ @@ -888,6 +917,9 @@ /** * Vertex stream output identifier. + * + * For packed outputs, bit 31 is set and bits [2*i+1,2*i] indicate the + * stream of the i-th component. */ unsigned stream; @@ -1001,6 +1033,90 @@ */ typedef bool (*builtin_available_predicate)(const _mesa_glsl_parse_state *); +#define MAKE_INTRINSIC_FOR_TYPE(op, t) \ + ir_intrinsic_generic_ ## op - ir_intrinsic_generic_load + ir_intrinsic_ ## t ## _ ## load + +#define MAP_INTRINSIC_TO_TYPE(i, t) \ + ir_intrinsic_id(int(i) - int(ir_intrinsic_generic_load) + int(ir_intrinsic_ ## t ## _ ## load)) + +enum ir_intrinsic_id { + ir_intrinsic_invalid = 0, + + /** + * \name Generic intrinsics + * + * Each of these intrinsics has a specific version for shared variables and + * SSBOs. + */ + /*@{*/ + ir_intrinsic_generic_load, + ir_intrinsic_generic_store, + ir_intrinsic_generic_atomic_add, + ir_intrinsic_generic_atomic_and, + ir_intrinsic_generic_atomic_or, + ir_intrinsic_generic_atomic_xor, + ir_intrinsic_generic_atomic_min, + ir_intrinsic_generic_atomic_max, + ir_intrinsic_generic_atomic_exchange, + ir_intrinsic_generic_atomic_comp_swap, + /*@}*/ + + ir_intrinsic_atomic_counter_read, + ir_intrinsic_atomic_counter_increment, + ir_intrinsic_atomic_counter_predecrement, + ir_intrinsic_atomic_counter_add, + ir_intrinsic_atomic_counter_and, + ir_intrinsic_atomic_counter_or, + ir_intrinsic_atomic_counter_xor, + ir_intrinsic_atomic_counter_min, + ir_intrinsic_atomic_counter_max, + ir_intrinsic_atomic_counter_exchange, + ir_intrinsic_atomic_counter_comp_swap, + + ir_intrinsic_image_load, + ir_intrinsic_image_store, + ir_intrinsic_image_atomic_add, + ir_intrinsic_image_atomic_and, + ir_intrinsic_image_atomic_or, + ir_intrinsic_image_atomic_xor, + ir_intrinsic_image_atomic_min, + ir_intrinsic_image_atomic_max, + ir_intrinsic_image_atomic_exchange, + ir_intrinsic_image_atomic_comp_swap, + ir_intrinsic_image_size, + ir_intrinsic_image_samples, + + ir_intrinsic_ssbo_load, + ir_intrinsic_ssbo_store = MAKE_INTRINSIC_FOR_TYPE(store, ssbo), + ir_intrinsic_ssbo_atomic_add = MAKE_INTRINSIC_FOR_TYPE(atomic_add, ssbo), + ir_intrinsic_ssbo_atomic_and = MAKE_INTRINSIC_FOR_TYPE(atomic_and, ssbo), + ir_intrinsic_ssbo_atomic_or = MAKE_INTRINSIC_FOR_TYPE(atomic_or, ssbo), + ir_intrinsic_ssbo_atomic_xor = MAKE_INTRINSIC_FOR_TYPE(atomic_xor, ssbo), + ir_intrinsic_ssbo_atomic_min = MAKE_INTRINSIC_FOR_TYPE(atomic_min, ssbo), + ir_intrinsic_ssbo_atomic_max = MAKE_INTRINSIC_FOR_TYPE(atomic_max, ssbo), + ir_intrinsic_ssbo_atomic_exchange = MAKE_INTRINSIC_FOR_TYPE(atomic_exchange, ssbo), + ir_intrinsic_ssbo_atomic_comp_swap = MAKE_INTRINSIC_FOR_TYPE(atomic_comp_swap, ssbo), + + ir_intrinsic_memory_barrier, + ir_intrinsic_shader_clock, + ir_intrinsic_group_memory_barrier, + ir_intrinsic_memory_barrier_atomic_counter, + ir_intrinsic_memory_barrier_buffer, + ir_intrinsic_memory_barrier_image, + ir_intrinsic_memory_barrier_shared, + + ir_intrinsic_shared_load, + ir_intrinsic_shared_store = MAKE_INTRINSIC_FOR_TYPE(store, shared), + ir_intrinsic_shared_atomic_add = MAKE_INTRINSIC_FOR_TYPE(atomic_add, shared), + ir_intrinsic_shared_atomic_and = MAKE_INTRINSIC_FOR_TYPE(atomic_and, shared), + ir_intrinsic_shared_atomic_or = MAKE_INTRINSIC_FOR_TYPE(atomic_or, shared), + ir_intrinsic_shared_atomic_xor = MAKE_INTRINSIC_FOR_TYPE(atomic_xor, shared), + ir_intrinsic_shared_atomic_min = MAKE_INTRINSIC_FOR_TYPE(atomic_min, shared), + ir_intrinsic_shared_atomic_max = MAKE_INTRINSIC_FOR_TYPE(atomic_max, shared), + ir_intrinsic_shared_atomic_exchange = MAKE_INTRINSIC_FOR_TYPE(atomic_exchange, shared), + ir_intrinsic_shared_atomic_comp_swap = MAKE_INTRINSIC_FOR_TYPE(atomic_comp_swap, shared), +}; + /*@{*/ /** * The representation of a function instance; may be the full definition or @@ -1094,7 +1210,13 @@ * Whether or not this function is an intrinsic to be implemented * by the driver. */ - bool is_intrinsic; + inline bool is_intrinsic() const + { + return intrinsic_id != ir_intrinsic_invalid; + } + + /** Indentifier for this intrinsic. */ + enum ir_intrinsic_id intrinsic_id; /** Whether or not a built-in is available for this shader. */ bool is_builtin_available(const _mesa_glsl_parse_state *state) const; @@ -1349,316 +1471,10 @@ unsigned write_mask:4; }; -/* Update ir_expression::get_num_operands() and operator_strs when - * updating this list. - */ -enum ir_expression_operation { - ir_unop_bit_not, - ir_unop_logic_not, - ir_unop_neg, - ir_unop_abs, - ir_unop_sign, - ir_unop_rcp, - ir_unop_rsq, - ir_unop_sqrt, - ir_unop_exp, /**< Log base e on gentype */ - ir_unop_log, /**< Natural log on gentype */ - ir_unop_exp2, - ir_unop_log2, - ir_unop_f2i, /**< Float-to-integer conversion. */ - ir_unop_f2u, /**< Float-to-unsigned conversion. */ - ir_unop_i2f, /**< Integer-to-float conversion. */ - ir_unop_f2b, /**< Float-to-boolean conversion */ - ir_unop_b2f, /**< Boolean-to-float conversion */ - ir_unop_i2b, /**< int-to-boolean conversion */ - ir_unop_b2i, /**< Boolean-to-int conversion */ - ir_unop_u2f, /**< Unsigned-to-float conversion. */ - ir_unop_i2u, /**< Integer-to-unsigned conversion. */ - ir_unop_u2i, /**< Unsigned-to-integer conversion. */ - ir_unop_d2f, /**< Double-to-float conversion. */ - ir_unop_f2d, /**< Float-to-double conversion. */ - ir_unop_d2i, /**< Double-to-integer conversion. */ - ir_unop_i2d, /**< Integer-to-double conversion. */ - ir_unop_d2u, /**< Double-to-unsigned conversion. */ - ir_unop_u2d, /**< Unsigned-to-double conversion. */ - ir_unop_d2b, /**< Double-to-boolean conversion. */ - ir_unop_bitcast_i2f, /**< Bit-identical int-to-float "conversion" */ - ir_unop_bitcast_f2i, /**< Bit-identical float-to-int "conversion" */ - ir_unop_bitcast_u2f, /**< Bit-identical uint-to-float "conversion" */ - ir_unop_bitcast_f2u, /**< Bit-identical float-to-uint "conversion" */ - - /** - * \name Unary floating-point rounding operations. - */ - /*@{*/ - ir_unop_trunc, - ir_unop_ceil, - ir_unop_floor, - ir_unop_fract, - ir_unop_round_even, - /*@}*/ - - /** - * \name Trigonometric operations. - */ - /*@{*/ - ir_unop_sin, - ir_unop_cos, - /*@}*/ - - /** - * \name Partial derivatives. - */ - /*@{*/ - ir_unop_dFdx, - ir_unop_dFdx_coarse, - ir_unop_dFdx_fine, - ir_unop_dFdy, - ir_unop_dFdy_coarse, - ir_unop_dFdy_fine, - /*@}*/ - - /** - * \name Floating point pack and unpack operations. - */ - /*@{*/ - ir_unop_pack_snorm_2x16, - ir_unop_pack_snorm_4x8, - ir_unop_pack_unorm_2x16, - ir_unop_pack_unorm_4x8, - ir_unop_pack_half_2x16, - ir_unop_unpack_snorm_2x16, - ir_unop_unpack_snorm_4x8, - ir_unop_unpack_unorm_2x16, - ir_unop_unpack_unorm_4x8, - ir_unop_unpack_half_2x16, - /*@}*/ - - /** - * \name Bit operations, part of ARB_gpu_shader5. - */ - /*@{*/ - ir_unop_bitfield_reverse, - ir_unop_bit_count, - ir_unop_find_msb, - ir_unop_find_lsb, - /*@}*/ - - ir_unop_saturate, - - /** - * \name Double packing, part of ARB_gpu_shader_fp64. - */ - /*@{*/ - ir_unop_pack_double_2x32, - ir_unop_unpack_double_2x32, - /*@}*/ - - ir_unop_frexp_sig, - ir_unop_frexp_exp, - - ir_unop_noise, - - ir_unop_subroutine_to_int, - /** - * Interpolate fs input at centroid - * - * operand0 is the fs input. - */ - ir_unop_interpolate_at_centroid, - - /** - * Ask the driver for the total size of a buffer block. - * - * operand0 is the ir_constant buffer block index in the linked shader. - */ - ir_unop_get_buffer_size, - - /** - * Calculate length of an unsized array inside a buffer block. - * This opcode is going to be replaced in a lowering pass inside - * the linker. - * - * operand0 is the unsized array's ir_value for the calculation - * of its length. - */ - ir_unop_ssbo_unsized_array_length, - - /** - * A sentinel marking the last of the unary operations. - */ - ir_last_unop = ir_unop_ssbo_unsized_array_length, - - ir_binop_add, - ir_binop_sub, - ir_binop_mul, /**< Floating-point or low 32-bit integer multiply. */ - ir_binop_imul_high, /**< Calculates the high 32-bits of a 64-bit multiply. */ - ir_binop_div, - - /** - * Returns the carry resulting from the addition of the two arguments. - */ - /*@{*/ - ir_binop_carry, - /*@}*/ - - /** - * Returns the borrow resulting from the subtraction of the second argument - * from the first argument. - */ - /*@{*/ - ir_binop_borrow, - /*@}*/ - - /** - * Takes one of two combinations of arguments: - * - * - mod(vecN, vecN) - * - mod(vecN, float) - * - * Does not take integer types. - */ - ir_binop_mod, +#include "ir_expression_operation.h" - /** - * \name Binary comparison operators which return a boolean vector. - * The type of both operands must be equal. - */ - /*@{*/ - ir_binop_less, - ir_binop_greater, - ir_binop_lequal, - ir_binop_gequal, - ir_binop_equal, - ir_binop_nequal, - /** - * Returns single boolean for whether all components of operands[0] - * equal the components of operands[1]. - */ - ir_binop_all_equal, - /** - * Returns single boolean for whether any component of operands[0] - * is not equal to the corresponding component of operands[1]. - */ - ir_binop_any_nequal, - /*@}*/ - - /** - * \name Bit-wise binary operations. - */ - /*@{*/ - ir_binop_lshift, - ir_binop_rshift, - ir_binop_bit_and, - ir_binop_bit_xor, - ir_binop_bit_or, - /*@}*/ - - ir_binop_logic_and, - ir_binop_logic_xor, - ir_binop_logic_or, - - ir_binop_dot, - ir_binop_min, - ir_binop_max, - - ir_binop_pow, - - /** - * Load a value the size of a given GLSL type from a uniform block. - * - * operand0 is the ir_constant uniform block index in the linked shader. - * operand1 is a byte offset within the uniform block. - */ - ir_binop_ubo_load, - - /** - * \name Multiplies a number by two to a power, part of ARB_gpu_shader5. - */ - /*@{*/ - ir_binop_ldexp, - /*@}*/ - - /** - * Extract a scalar from a vector - * - * operand0 is the vector - * operand1 is the index of the field to read from operand0 - */ - ir_binop_vector_extract, - - /** - * Interpolate fs input at offset - * - * operand0 is the fs input - * operand1 is the offset from the pixel center - */ - ir_binop_interpolate_at_offset, - - /** - * Interpolate fs input at sample position - * - * operand0 is the fs input - * operand1 is the sample ID - */ - ir_binop_interpolate_at_sample, - - /** - * A sentinel marking the last of the binary operations. - */ - ir_last_binop = ir_binop_interpolate_at_sample, - - /** - * \name Fused floating-point multiply-add, part of ARB_gpu_shader5. - */ - /*@{*/ - ir_triop_fma, - /*@}*/ - - ir_triop_lrp, - - /** - * \name Conditional Select - * - * A vector conditional select instruction (like ?:, but operating per- - * component on vectors). - * - * \see lower_instructions_visitor::ldexp_to_arith - */ - /*@{*/ - ir_triop_csel, - /*@}*/ - - ir_triop_bitfield_extract, - - /** - * Generate a value with one field of a vector changed - * - * operand0 is the vector - * operand1 is the value to write into the vector result - * operand2 is the index in operand0 to be modified - */ - ir_triop_vector_insert, - - /** - * A sentinel marking the last of the ternary operations. - */ - ir_last_triop = ir_triop_vector_insert, - - ir_quadop_bitfield_insert, - - ir_quadop_vector, - - /** - * A sentinel marking the last of the ternary operations. - */ - ir_last_quadop = ir_quadop_vector, - - /** - * A sentinel marking the last of all operations. - */ - ir_last_opcode = ir_quadop_vector -}; +extern const char *const ir_expression_operation_strings[ir_last_opcode + 1]; +extern const char *const ir_expression_operation_enum_strings[ir_last_opcode + 1]; class ir_expression : public ir_rvalue { public: @@ -1727,17 +1543,6 @@ } /** - * Return a string representing this expression's operator. - */ - const char *operator_string(); - - /** - * Return a string representing this expression's operator. - */ - static const char *operator_string(ir_expression_operation); - - - /** * Do a reverse-lookup to translate the given string into an operator. */ static ir_expression_operation get_operator(const char *); @@ -1982,7 +1787,7 @@ * * Texel offset (0 or an expression) * | Projection divisor - * | | Shadow comparitor + * | | Shadow comparator * | | | * v v v * (tex 0 1 ( )) @@ -2003,7 +1808,7 @@ ir_texture(enum ir_texture_opcode op) : ir_rvalue(ir_type_texture), op(op), sampler(NULL), coordinate(NULL), projector(NULL), - shadow_comparitor(NULL), offset(NULL) + shadow_comparator(NULL), offset(NULL) { memset(&lod_info, 0, sizeof(lod_info)); } @@ -2058,7 +1863,7 @@ * If there is no shadow comparison, this will be \c NULL. For the * \c ir_txf opcode, this *must* be \c NULL. */ - ir_rvalue *shadow_comparitor; + ir_rvalue *shadow_comparator; /** Texel offset. */ ir_rvalue *offset; @@ -2573,9 +2378,6 @@ gl_shader *shader); extern void -_mesa_glsl_initialize_functions(_mesa_glsl_parse_state *state); - -extern void _mesa_glsl_initialize_builtin_functions(); extern ir_function_signature * @@ -2589,10 +2391,7 @@ _mesa_glsl_get_builtin_function_shader(void); extern ir_function_signature * -_mesa_get_main_function_signature(gl_shader *sh); - -extern void -_mesa_glsl_release_functions(void); +_mesa_get_main_function_signature(glsl_symbol_table *symbols); extern void _mesa_glsl_release_builtin_functions(void); @@ -2600,15 +2399,6 @@ extern void reparent_ir(exec_list *list, void *mem_ctx); -struct glsl_symbol_table; - -extern void -import_prototypes(const exec_list *source, exec_list *dest, - struct glsl_symbol_table *symbols, void *mem_ctx); - -extern bool -ir_has_call(ir_instruction *ir); - extern void do_set_program_inouts(exec_list *instructions, struct gl_program *prog, gl_shader_stage shader_stage); diff -Nru mesa-12.0.6/src/compiler/glsl/ir_hv_accept.cpp mesa-17.0.7/src/compiler/glsl/ir_hv_accept.cpp --- mesa-12.0.6/src/compiler/glsl/ir_hv_accept.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ir_hv_accept.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -178,8 +178,8 @@ return (s == visit_continue_with_parent) ? visit_continue : s; } - if (this->shadow_comparitor) { - s = this->shadow_comparitor->accept(v); + if (this->shadow_comparator) { + s = this->shadow_comparator->accept(v); if (s != visit_continue) return (s == visit_continue_with_parent) ? visit_continue : s; } diff -Nru mesa-12.0.6/src/compiler/glsl/ir_import_prototypes.cpp mesa-17.0.7/src/compiler/glsl/ir_import_prototypes.cpp --- mesa-12.0.6/src/compiler/glsl/ir_import_prototypes.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ir_import_prototypes.cpp 1970-01-01 00:00:00.000000000 +0000 @@ -1,125 +0,0 @@ -/* - * Copyright © 2010 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -/** - * \file ir_import_prototypes.cpp - * Import function prototypes from one IR tree into another. - * - * \author Ian Romanick - */ -#include "ir.h" -#include "glsl_symbol_table.h" - -namespace { - -/** - * Visitor used to import function prototypes - * - * Normally the \c clone method of either \c ir_function or - * \c ir_function_signature could be used. However, we don't want a complete - * clone of the \c ir_function_signature. We want everything \b except the - * body of the function. - */ -class import_prototype_visitor : public ir_hierarchical_visitor { -public: - /** - */ - import_prototype_visitor(exec_list *list, glsl_symbol_table *symbols, - void *mem_ctx) - { - this->mem_ctx = mem_ctx; - this->list = list; - this->symbols = symbols; - this->function = NULL; - } - - virtual ir_visitor_status visit_enter(ir_function *ir) - { - assert(this->function == NULL); - - this->function = this->symbols->get_function(ir->name); - if (!this->function) { - this->function = new(this->mem_ctx) ir_function(ir->name); - - list->push_tail(this->function); - - /* Add the new function to the symbol table. - */ - this->symbols->add_function(this->function); - } - return visit_continue; - } - - virtual ir_visitor_status visit_leave(ir_function *ir) - { - (void) ir; - assert(this->function != NULL); - - this->function = NULL; - return visit_continue; - } - - ir_visitor_status visit_enter(ir_function_signature *ir) - { - assert(this->function != NULL); - - ir_function_signature *copy = ir->clone_prototype(mem_ctx, NULL); - - this->function->add_signature(copy); - - /* Do not process child nodes of the ir_function_signature. There can - * never be any nodes inside the ir_function_signature that we care - * about. Instead continue with the next sibling. - */ - return visit_continue_with_parent; - } - -private: - exec_list *list; - ir_function *function; - glsl_symbol_table *symbols; - void *mem_ctx; -}; - -} /* anonymous namespace */ - -/** - * Import function prototypes from one IR tree into another - * - * \param source Source instruction stream containing functions whose - * prototypes are to be imported - * \param dest Destination instruction stream where new \c ir_function and - * \c ir_function_signature nodes will be stored - * \param symbols Symbol table where new functions will be stored - * \param mem_ctx ralloc memory context used for new allocations - */ -void -import_prototypes(const exec_list *source, exec_list *dest, - glsl_symbol_table *symbols, void *mem_ctx) -{ - import_prototype_visitor v(dest, symbols, mem_ctx); - - /* Making source be const is just extra documentation. - */ - v.run(const_cast(source)); -} diff -Nru mesa-12.0.6/src/compiler/glsl/ir_optimization.h mesa-17.0.7/src/compiler/glsl/ir_optimization.h --- mesa-12.0.6/src/compiler/glsl/ir_optimization.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ir_optimization.h 2017-06-01 10:37:10.000000000 +0000 @@ -30,7 +30,7 @@ /* Operations for lower_instructions() */ #define SUB_TO_ADD_NEG 0x01 -#define DIV_TO_MUL_RCP 0x02 +#define FDIV_TO_MUL_RCP 0x02 #define EXP_TO_EXP2 0x04 #define POW_TO_EXP2 0x08 #define LOG_TO_LOG2 0x10 @@ -42,6 +42,15 @@ #define SAT_TO_CLAMP 0x400 #define DOPS_TO_DFRAC 0x800 #define DFREXP_DLDEXP_TO_ARITH 0x1000 +#define BIT_COUNT_TO_MATH 0x02000 +#define EXTRACT_TO_SHIFTS 0x04000 +#define INSERT_TO_SHIFTS 0x08000 +#define REVERSE_TO_SHIFTS 0x10000 +#define FIND_LSB_TO_FLOAT_CAST 0x20000 +#define FIND_MSB_TO_FLOAT_CAST 0x40000 +#define IMUL_HIGH_TO_MUL 0x80000 +#define DDIV_TO_MUL_RCP 0x100000 +#define DIV_TO_MUL_RCP (FDIV_TO_MUL_RCP | DDIV_TO_MUL_RCP) /** * \see class lower_packing_builtins_visitor @@ -86,7 +95,8 @@ bool do_copy_propagation_elements(exec_list *instructions); bool do_constant_propagation(exec_list *instructions); void do_dead_builtin_varyings(struct gl_context *ctx, - gl_shader *producer, gl_shader *consumer, + gl_linked_shader *producer, + gl_linked_shader *consumer, unsigned num_tfeedback_decls, class tfeedback_decl *tfeedback_decls); bool do_dead_code(exec_list *instructions, bool uniform_locations_assigned); @@ -100,7 +110,8 @@ bool do_if_simplification(exec_list *instructions); bool opt_flatten_nested_if_blocks(exec_list *instructions); bool do_discard_simplification(exec_list *instructions); -bool lower_if_to_cond_assign(exec_list *instructions, unsigned max_depth = 0); +bool lower_if_to_cond_assign(gl_shader_stage stage, exec_list *instructions, + unsigned max_depth = 0, unsigned min_branch_cost = 0); bool do_mat_op_to_vec(exec_list *instructions); bool do_minmax_prune(exec_list *instructions); bool do_noop_swizzle(exec_list *instructions); @@ -118,27 +129,34 @@ exec_list *instructions, bool lower_input, bool lower_output, bool lower_temp, bool lower_uniform); bool lower_quadop_vector(exec_list *instructions, bool dont_lower_swz); -bool lower_const_arrays_to_uniforms(exec_list *instructions); -bool lower_clip_cull_distance(struct gl_shader_program *prog, gl_shader *shader); +bool lower_const_arrays_to_uniforms(exec_list *instructions, unsigned stage); +bool lower_clip_cull_distance(struct gl_shader_program *prog, + gl_linked_shader *shader); void lower_output_reads(unsigned stage, exec_list *instructions); bool lower_packing_builtins(exec_list *instructions, int op_mask); -void lower_shared_reference(struct gl_shader *shader, unsigned *shared_size); -void lower_ubo_reference(struct gl_shader *shader, bool clamp_block_indices); +void lower_shared_reference(struct gl_linked_shader *shader, + unsigned *shared_size); +void lower_ubo_reference(struct gl_linked_shader *shader, + bool clamp_block_indices); void lower_packed_varyings(void *mem_ctx, - unsigned locations_used, ir_variable_mode mode, - unsigned gs_input_vertices, gl_shader *shader, + unsigned locations_used, + const uint8_t *components, + ir_variable_mode mode, + unsigned gs_input_vertices, + gl_linked_shader *shader, bool disable_varying_packing, bool xfb_enabled); bool lower_vector_insert(exec_list *instructions, bool lower_nonconstant_index); -bool lower_vector_derefs(gl_shader *shader); -void lower_named_interface_blocks(void *mem_ctx, gl_shader *shader); +bool lower_vector_derefs(gl_linked_shader *shader); +void lower_named_interface_blocks(void *mem_ctx, gl_linked_shader *shader); bool optimize_redundant_jumps(exec_list *instructions); bool optimize_split_arrays(exec_list *instructions, bool linked); bool lower_offset_arrays(exec_list *instructions); void optimize_dead_builtin_variables(exec_list *instructions, enum ir_variable_mode other); -bool lower_tess_level(gl_shader *shader); +bool lower_tess_level(gl_linked_shader *shader); -bool lower_vertex_id(gl_shader *shader); +bool lower_vertex_id(gl_linked_shader *shader); +bool lower_blend_equation_advanced(gl_linked_shader *shader); bool lower_subroutine(exec_list *instructions, struct _mesa_glsl_parse_state *state); void propagate_invariance(exec_list *instructions); diff -Nru mesa-12.0.6/src/compiler/glsl/ir_print_visitor.cpp mesa-17.0.7/src/compiler/glsl/ir_print_visitor.cpp --- mesa-12.0.6/src/compiler/glsl/ir_print_visitor.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ir_print_visitor.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -130,14 +130,14 @@ /* If there's no conflict, just use the original name */ const char* name = NULL; - if (_mesa_symbol_table_find_symbol(this->symbols, -1, var->name) == NULL) { + if (_mesa_symbol_table_find_symbol(this->symbols, var->name) == NULL) { name = var->name; } else { static unsigned i = 1; name = ralloc_asprintf(this->mem_ctx, "%s@%u", var->name, ++i); } _mesa_hash_table_insert(this->printable_names, var, (void *) name); - _mesa_symbol_table_add_symbol(this->symbols, -1, name, var); + _mesa_symbol_table_add_symbol(this->symbols, name, var); return name; } @@ -165,10 +165,29 @@ { fprintf(f, "(declare "); - char loc[256] = {0}; + char binding[32] = {0}; + if (ir->data.binding) + snprintf(binding, sizeof(binding), "binding=%i ", ir->data.binding); + + char loc[32] = {0}; if (ir->data.location != -1) snprintf(loc, sizeof(loc), "location=%i ", ir->data.location); + char component[32] = {0}; + if (ir->data.explicit_component) + snprintf(component, sizeof(component), "component=%i ", ir->data.location_frac); + + char stream[32] = {0}; + if (ir->data.stream & (1u << 31)) { + if (ir->data.stream & ~(1u << 31)) { + snprintf(stream, sizeof(stream), "stream(%u,%u,%u,%u) ", + ir->data.stream & 3, (ir->data.stream >> 2) & 3, + (ir->data.stream >> 4) & 3, (ir->data.stream >> 6) & 3); + } + } else if (ir->data.stream) { + snprintf(stream, sizeof(stream), "stream%u ", ir->data.stream); + } + const char *const cent = (ir->data.centroid) ? "centroid " : ""; const char *const samp = (ir->data.sample) ? "sample " : ""; const char *const patc = (ir->data.patch) ? "patch " : ""; @@ -179,13 +198,12 @@ "in ", "out ", "inout ", "const_in ", "sys ", "temporary " }; STATIC_ASSERT(ARRAY_SIZE(mode) == ir_var_mode_count); - const char *const stream [] = {"", "stream1 ", "stream2 ", "stream3 "}; const char *const interp[] = { "", "smooth", "flat", "noperspective" }; - STATIC_ASSERT(ARRAY_SIZE(interp) == INTERP_QUALIFIER_COUNT); + STATIC_ASSERT(ARRAY_SIZE(interp) == INTERP_MODE_COUNT); - fprintf(f, "(%s%s%s%s%s%s%s%s%s) ", - loc, cent, samp, patc, inv, prec, mode[ir->data.mode], - stream[ir->data.stream], + fprintf(f, "(%s%s%s%s%s%s%s%s%s%s%s) ", + binding, loc, component, cent, samp, patc, inv, prec, mode[ir->data.mode], + stream, interp[ir->data.interpolation]); print_type(f, ir->type); @@ -255,7 +273,7 @@ print_type(f, ir->type); - fprintf(f, " %s ", ir->operator_string()); + fprintf(f, " %s ", ir_expression_operation_strings[ir->operation]); for (unsigned i = 0; i < ir->get_num_operands(); i++) { ir->operands[i]->accept(this); @@ -306,9 +324,9 @@ else fprintf(f, "1"); - if (ir->shadow_comparitor) { + if (ir->shadow_comparator) { fprintf(f, " "); - ir->shadow_comparitor->accept(this); + ir->shadow_comparator->accept(this); } else { fprintf(f, " ()"); } @@ -344,7 +362,7 @@ ir->lod_info.component->accept(this); break; case ir_samples_identical: - unreachable(!"ir_samples_identical was already handled"); + unreachable("ir_samples_identical was already handled"); }; fprintf(f, ")"); } @@ -470,7 +488,8 @@ else fprintf(f, "%f", ir->value.d[i]); break; - default: assert(0); + default: + unreachable("Invalid constant type"); } } } diff -Nru mesa-12.0.6/src/compiler/glsl/ir_reader.cpp mesa-17.0.7/src/compiler/glsl/ir_reader.cpp --- mesa-12.0.6/src/compiler/glsl/ir_reader.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ir_reader.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -208,7 +208,7 @@ /* Skip over "function" tag and function name (which are guaranteed to be * present by the above PARTIAL_MATCH call). */ - exec_node *node = ((s_list *) expr)->subexpressions.head->next->next; + exec_node *node = ((s_list *) expr)->subexpressions.get_head_raw()->next->next; for (/* nothing */; !node->is_tail_sentinel(); node = node->next) { s_expression *s_sig = (s_expression *) node; read_function_sig(f, s_sig, skip_body); @@ -251,7 +251,7 @@ state->symbols->push_scope(); /* Skip over the "parameters" tag. */ - exec_node *node = paramlist->subexpressions.head->next; + exec_node *node = paramlist->subexpressions.get_head_raw()->next; for (/* nothing */; !node->is_tail_sentinel(); node = node->next) { ir_variable *var = read_declaration((s_expression *) node); if (var == NULL) @@ -448,11 +448,11 @@ } else if (strcmp(qualifier->value(), "stream3") == 0) { var->data.stream = 3; } else if (strcmp(qualifier->value(), "smooth") == 0) { - var->data.interpolation = INTERP_QUALIFIER_SMOOTH; + var->data.interpolation = INTERP_MODE_SMOOTH; } else if (strcmp(qualifier->value(), "flat") == 0) { - var->data.interpolation = INTERP_QUALIFIER_FLAT; + var->data.interpolation = INTERP_MODE_FLAT; } else if (strcmp(qualifier->value(), "noperspective") == 0) { - var->data.interpolation = INTERP_QUALIFIER_NOPERSPECTIVE; + var->data.interpolation = INTERP_MODE_NOPERSPECTIVE; } else { ir_read_error(expr, "unknown qualifier: %s", qualifier->value()); return NULL; @@ -1047,11 +1047,11 @@ } if (s_shadow->subexpressions.is_empty()) { - tex->shadow_comparitor = NULL; + tex->shadow_comparator = NULL; } else { - tex->shadow_comparitor = read_rvalue(s_shadow); - if (tex->shadow_comparitor == NULL) { - ir_read_error(NULL, "when reading shadow comparitor in (%s ..)", + tex->shadow_comparator = read_rvalue(s_shadow); + if (tex->shadow_comparator == NULL) { + ir_read_error(NULL, "when reading shadow comparator in (%s ..)", tex->opcode_string()); return NULL; } diff -Nru mesa-12.0.6/src/compiler/glsl/ir_rvalue_visitor.cpp mesa-17.0.7/src/compiler/glsl/ir_rvalue_visitor.cpp --- mesa-12.0.6/src/compiler/glsl/ir_rvalue_visitor.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ir_rvalue_visitor.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -51,7 +51,7 @@ { handle_rvalue(&ir->coordinate); handle_rvalue(&ir->projector); - handle_rvalue(&ir->shadow_comparitor); + handle_rvalue(&ir->shadow_comparator); handle_rvalue(&ir->offset); switch (ir->op) { diff -Nru mesa-12.0.6/src/compiler/glsl/ir_set_program_inouts.cpp mesa-17.0.7/src/compiler/glsl/ir_set_program_inouts.cpp --- mesa-12.0.6/src/compiler/glsl/ir_set_program_inouts.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ir_set_program_inouts.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -24,16 +24,13 @@ /** * \file ir_set_program_inouts.cpp * - * Sets the InputsRead and OutputsWritten of Mesa programs. - * - * Additionally, for fragment shaders, sets the InterpQualifier array, the - * IsCentroid and IsSample bitfields, and the UsesDFdy flag. + * Sets the inputs_read and outputs_written of Mesa programs. * * Mesa programs (gl_program, not gl_shader_program) have a set of * flags indicating which varyings are read and written. Computing * which are actually read from some sort of backend code can be * tricky when variable array indexing involved. So this pass - * provides support for setting InputsRead and OutputsWritten right + * provides support for setting inputs_read and outputs_written right * from the GLSL IR. */ @@ -58,7 +55,6 @@ virtual ir_visitor_status visit_enter(ir_dereference_array *); virtual ir_visitor_status visit_enter(ir_function_signature *); - virtual ir_visitor_status visit_enter(ir_expression *); virtual ir_visitor_status visit_enter(ir_discard *); virtual ir_visitor_status visit_enter(ir_texture *); virtual ir_visitor_status visit(ir_dereference_variable *); @@ -87,19 +83,21 @@ { /* As of GLSL 1.20, varyings can only be floats, floating-point * vectors or matrices, or arrays of them. For Mesa programs using - * InputsRead/OutputsWritten, everything but matrices uses one + * inputs_read/outputs_written, everything but matrices uses one * slot, while matrices use a slot per column. Presumably * something doing a more clever packing would use something other - * than InputsRead/OutputsWritten. + * than inputs_read/outputs_written. */ for (int i = 0; i < len; i++) { assert(var->data.location != -1); - int idx = var->data.location + var->data.index + offset + i; + int idx = var->data.location + offset + i; bool is_patch_generic = var->data.patch && idx != VARYING_SLOT_TESS_LEVEL_INNER && - idx != VARYING_SLOT_TESS_LEVEL_OUTER; + idx != VARYING_SLOT_TESS_LEVEL_OUTER && + idx != VARYING_SLOT_BOUNDING_BOX0 && + idx != VARYING_SLOT_BOUNDING_BOX1; GLbitfield64 bitfield; if (is_patch_generic) { @@ -113,32 +111,32 @@ if (var->data.mode == ir_var_shader_in) { if (is_patch_generic) - prog->PatchInputsRead |= bitfield; + prog->info.patch_inputs_read |= bitfield; else - prog->InputsRead |= bitfield; + prog->info.inputs_read |= bitfield; /* double inputs read is only for vertex inputs */ if (stage == MESA_SHADER_VERTEX && - var->type->without_array()->is_dual_slot_double()) - prog->DoubleInputsRead |= bitfield; + var->type->without_array()->is_dual_slot()) + prog->info.double_inputs_read |= bitfield; if (stage == MESA_SHADER_FRAGMENT) { - gl_fragment_program *fprog = (gl_fragment_program *) prog; - fprog->InterpQualifier[idx] = - (glsl_interp_qualifier) var->data.interpolation; - if (var->data.centroid) - fprog->IsCentroid |= bitfield; - if (var->data.sample) - fprog->IsSample |= bitfield; + prog->info.fs.uses_sample_qualifier |= var->data.sample; } } else if (var->data.mode == ir_var_system_value) { - prog->SystemValuesRead |= bitfield; + prog->info.system_values_read |= bitfield; } else { assert(var->data.mode == ir_var_shader_out); - if (is_patch_generic) - prog->PatchOutputsWritten |= bitfield; - else - prog->OutputsWritten |= bitfield; + if (is_patch_generic) { + prog->info.patch_outputs_written |= bitfield; + } else if (!var->data.read_only) { + prog->info.outputs_written |= bitfield; + if (var->data.index > 0) + prog->SecondaryOutputsWritten |= bitfield; + } + + if (var->data.fb_fetch_output) + prog->info.outputs_read |= bitfield; } } } @@ -310,7 +308,7 @@ /* double element width for double types that takes two slots */ if (this->shader_stage != MESA_SHADER_VERTEX || var->data.mode != ir_var_shader_in) { - if (type->without_array()->is_dual_slot_double()) + if (type->without_array()->is_dual_slot()) elem_width *= 2; } @@ -404,26 +402,12 @@ } ir_visitor_status -ir_set_program_inouts_visitor::visit_enter(ir_expression *ir) -{ - if (this->shader_stage == MESA_SHADER_FRAGMENT && - (ir->operation == ir_unop_dFdy || - ir->operation == ir_unop_dFdy_coarse || - ir->operation == ir_unop_dFdy_fine)) { - gl_fragment_program *fprog = (gl_fragment_program *) prog; - fprog->UsesDFdy = true; - } - return visit_continue; -} - -ir_visitor_status ir_set_program_inouts_visitor::visit_enter(ir_discard *) { /* discards are only allowed in fragment shaders. */ assert(this->shader_stage == MESA_SHADER_FRAGMENT); - gl_fragment_program *fprog = (gl_fragment_program *) prog; - fprog->UsesKill = true; + prog->info.fs.uses_discard = true; return visit_continue; } @@ -432,7 +416,7 @@ ir_set_program_inouts_visitor::visit_enter(ir_texture *ir) { if (ir->op == ir_tg4) - prog->UsesGather = true; + prog->info.uses_texture_gather = true; return visit_continue; } @@ -442,18 +426,16 @@ { ir_set_program_inouts_visitor v(prog, shader_stage); - prog->InputsRead = 0; - prog->OutputsWritten = 0; - prog->PatchInputsRead = 0; - prog->PatchOutputsWritten = 0; - prog->SystemValuesRead = 0; + prog->info.inputs_read = 0; + prog->info.outputs_written = 0; + prog->SecondaryOutputsWritten = 0; + prog->info.outputs_read = 0; + prog->info.patch_inputs_read = 0; + prog->info.patch_outputs_written = 0; + prog->info.system_values_read = 0; if (shader_stage == MESA_SHADER_FRAGMENT) { - gl_fragment_program *fprog = (gl_fragment_program *) prog; - memset(fprog->InterpQualifier, 0, sizeof(fprog->InterpQualifier)); - fprog->IsCentroid = 0; - fprog->IsSample = 0; - fprog->UsesDFdy = false; - fprog->UsesKill = false; + prog->info.fs.uses_sample_qualifier = false; + prog->info.fs.uses_discard = false; } visit_list_elements(&v, instructions); } diff -Nru mesa-12.0.6/src/compiler/glsl/ir_validate.cpp mesa-17.0.7/src/compiler/glsl/ir_validate.cpp --- mesa-12.0.6/src/compiler/glsl/ir_validate.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ir_validate.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -246,11 +246,22 @@ break; case ir_unop_neg: + assert(ir->type == ir->operands[0]->type); + break; + case ir_unop_abs: case ir_unop_sign: + assert(ir->operands[0]->type->base_type == GLSL_TYPE_INT || + ir->operands[0]->type->base_type == GLSL_TYPE_FLOAT || + ir->operands[0]->type->base_type == GLSL_TYPE_DOUBLE); + assert(ir->type == ir->operands[0]->type); + break; + case ir_unop_rcp: case ir_unop_rsq: case ir_unop_sqrt: + assert(ir->type->base_type == GLSL_TYPE_FLOAT || + ir->type->base_type == GLSL_TYPE_DOUBLE); assert(ir->type == ir->operands[0]->type); break; @@ -453,6 +464,14 @@ assert(ir->operands[0]->type->base_type == GLSL_TYPE_SUBROUTINE); assert(ir->type->base_type == GLSL_TYPE_INT); break; + + case ir_unop_vote_any: + case ir_unop_vote_all: + case ir_unop_vote_eq: + assert(ir->type == glsl_type::bool_type); + assert(ir->operands[0]->type == glsl_type::bool_type); + break; + case ir_binop_add: case ir_binop_sub: case ir_binop_mul: @@ -832,8 +851,8 @@ abort(); } - const exec_node *formal_param_node = callee->parameters.head; - const exec_node *actual_param_node = ir->actual_parameters.head; + const exec_node *formal_param_node = callee->parameters.get_head_raw(); + const exec_node *actual_param_node = ir->actual_parameters.get_head_raw(); while (true) { if (formal_param_node->is_tail_sentinel() != actual_param_node->is_tail_sentinel()) { diff -Nru mesa-12.0.6/src/compiler/glsl/ir_variable_refcount.h mesa-17.0.7/src/compiler/glsl/ir_variable_refcount.h --- mesa-12.0.6/src/compiler/glsl/ir_variable_refcount.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/ir_variable_refcount.h 2017-06-01 10:37:10.000000000 +0000 @@ -72,8 +72,14 @@ virtual ir_visitor_status visit_enter(ir_function_signature *); virtual ir_visitor_status visit_leave(ir_assignment *); + /** + * Find variable in the hash table, and insert it if not present + */ ir_variable_refcount_entry *get_variable_entry(ir_variable *var); + /** + * Hash table mapping ir_variable to ir_variable_refcount_entry. + */ struct hash_table *ht; void *mem_ctx; diff -Nru mesa-12.0.6/src/compiler/glsl/link_atomics.cpp mesa-17.0.7/src/compiler/glsl/link_atomics.cpp --- mesa-12.0.6/src/compiler/glsl/link_atomics.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/link_atomics.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -25,14 +25,13 @@ #include "ir.h" #include "ir_uniform.h" #include "linker.h" -#include "program/hash_table.h" #include "main/macros.h" namespace { /* - * Atomic counter as seen by the program. + * Atomic counter uniform as seen by the program. */ - struct active_atomic_counter { + struct active_atomic_counter_uniform { unsigned uniform_loc; ir_variable *var; }; @@ -44,44 +43,44 @@ */ struct active_atomic_buffer { active_atomic_buffer() - : counters(0), num_counters(0), stage_references(), size(0) + : uniforms(0), num_uniforms(0), stage_counter_references(), size(0) {} ~active_atomic_buffer() { - free(counters); + free(uniforms); } void push_back(unsigned uniform_loc, ir_variable *var) { - active_atomic_counter *new_counters; + active_atomic_counter_uniform *new_uniforms; - new_counters = (active_atomic_counter *) - realloc(counters, sizeof(active_atomic_counter) * - (num_counters + 1)); + new_uniforms = (active_atomic_counter_uniform *) + realloc(uniforms, sizeof(active_atomic_counter_uniform) * + (num_uniforms + 1)); - if (new_counters == NULL) { + if (new_uniforms == NULL) { _mesa_error_no_memory(__func__); return; } - counters = new_counters; - counters[num_counters].uniform_loc = uniform_loc; - counters[num_counters].var = var; - num_counters++; + uniforms = new_uniforms; + uniforms[num_uniforms].uniform_loc = uniform_loc; + uniforms[num_uniforms].var = var; + num_uniforms++; } - active_atomic_counter *counters; - unsigned num_counters; - unsigned stage_references[MESA_SHADER_STAGES]; + active_atomic_counter_uniform *uniforms; + unsigned num_uniforms; + unsigned stage_counter_references[MESA_SHADER_STAGES]; unsigned size; }; int cmp_actives(const void *a, const void *b) { - const active_atomic_counter *const first = (active_atomic_counter *) a; - const active_atomic_counter *const second = (active_atomic_counter *) b; + const active_atomic_counter_uniform *const first = (active_atomic_counter_uniform *) a; + const active_atomic_counter_uniform *const second = (active_atomic_counter_uniform *) b; return int(first->var->data.offset) - int(second->var->data.offset); } @@ -103,9 +102,9 @@ const unsigned shader_stage) { /* FIXME: Arrays of arrays get counted separately. For example: - * x1[3][3][2] = 9 counters - * x2[3][2] = 3 counters - * x3[2] = 1 counter + * x1[3][3][2] = 9 uniforms, 18 atomic counters + * x2[3][2] = 3 uniforms, 6 atomic counters + * x3[2] = 1 uniform, 2 atomic counters * * However this code marks all the counters as active even when they * might not be used. @@ -119,7 +118,7 @@ } else { active_atomic_buffer *buf = &buffers[var->data.binding]; gl_uniform_storage *const storage = - &prog->UniformStorage[*uniform_loc]; + &prog->data->UniformStorage[*uniform_loc]; /* If this is the first time the buffer is used, increment * the counter of buffers used. @@ -129,7 +128,13 @@ buf->push_back(*uniform_loc, var); - buf->stage_references[shader_stage]++; + /* When checking for atomic counters we should count every member in + * an array as an atomic counter reference. + */ + if (t->is_array()) + buf->stage_counter_references[shader_stage] += t->length; + else + buf->stage_counter_references[shader_stage]++; buf->size = MAX2(buf->size, *offset + t->atomic_size()); storage->offset = *offset; @@ -150,7 +155,7 @@ *num_buffers = 0; for (unsigned i = 0; i < MESA_SHADER_STAGES; ++i) { - struct gl_shader *sh = prog->_LinkedShaders[i]; + struct gl_linked_shader *sh = prog->_LinkedShaders[i]; if (sh == NULL) continue; @@ -170,22 +175,22 @@ if (buffers[i].size == 0) continue; - qsort(buffers[i].counters, buffers[i].num_counters, - sizeof(active_atomic_counter), + qsort(buffers[i].uniforms, buffers[i].num_uniforms, + sizeof(active_atomic_counter_uniform), cmp_actives); - for (unsigned j = 1; j < buffers[i].num_counters; j++) { + for (unsigned j = 1; j < buffers[i].num_uniforms; j++) { /* If an overlapping counter found, it must be a reference to the * same counter from a different shader stage. */ - if (check_atomic_counters_overlap(buffers[i].counters[j-1].var, - buffers[i].counters[j].var) - && strcmp(buffers[i].counters[j-1].var->name, - buffers[i].counters[j].var->name) != 0) { + if (check_atomic_counters_overlap(buffers[i].uniforms[j-1].var, + buffers[i].uniforms[j].var) + && strcmp(buffers[i].uniforms[j-1].var->name, + buffers[i].uniforms[j].var->name) != 0) { linker_error(prog, "Atomic counter %s declared at offset %d " "which is already in use.", - buffers[i].counters[j].var->name, - buffers[i].counters[j].var->data.offset); + buffers[i].uniforms[j].var->name, + buffers[i].uniforms[j].var->data.offset); } } } @@ -202,9 +207,9 @@ active_atomic_buffer *abs = find_active_atomic_counters(ctx, prog, &num_buffers); - prog->AtomicBuffers = rzalloc_array(prog, gl_active_atomic_buffer, - num_buffers); - prog->NumAtomicBuffers = num_buffers; + prog->data->AtomicBuffers = rzalloc_array(prog, gl_active_atomic_buffer, + num_buffers); + prog->data->NumAtomicBuffers = num_buffers; unsigned i = 0; for (unsigned binding = 0; @@ -217,22 +222,22 @@ continue; active_atomic_buffer &ab = abs[binding]; - gl_active_atomic_buffer &mab = prog->AtomicBuffers[i]; + gl_active_atomic_buffer &mab = prog->data->AtomicBuffers[i]; /* Assign buffer-specific fields. */ mab.Binding = binding; mab.MinimumSize = ab.size; - mab.Uniforms = rzalloc_array(prog->AtomicBuffers, GLuint, - ab.num_counters); - mab.NumUniforms = ab.num_counters; + mab.Uniforms = rzalloc_array(prog->data->AtomicBuffers, GLuint, + ab.num_uniforms); + mab.NumUniforms = ab.num_uniforms; /* Assign counter-specific fields. */ - for (unsigned j = 0; j < ab.num_counters; j++) { - ir_variable *const var = ab.counters[j].var; + for (unsigned j = 0; j < ab.num_uniforms; j++) { + ir_variable *const var = ab.uniforms[j].var; gl_uniform_storage *const storage = - &prog->UniformStorage[ab.counters[j].uniform_loc]; + &prog->data->UniformStorage[ab.uniforms[j].uniform_loc]; - mab.Uniforms[j] = ab.counters[j].uniform_loc; + mab.Uniforms[j] = ab.uniforms[j].uniform_loc; if (!var->data.explicit_binding) var->data.binding = i; @@ -246,7 +251,7 @@ /* Assign stage-specific fields. */ for (unsigned j = 0; j < MESA_SHADER_STAGES; ++j) { - if (ab.stage_references[j]) { + if (ab.stage_counter_references[j]) { mab.StageReferences[j] = GL_TRUE; num_atomic_buffers[j]++; } else { @@ -262,23 +267,23 @@ */ for (unsigned j = 0; j < MESA_SHADER_STAGES; ++j) { if (prog->_LinkedShaders[j] && num_atomic_buffers[j] > 0) { - prog->_LinkedShaders[j]->NumAtomicBuffers = num_atomic_buffers[j]; - prog->_LinkedShaders[j]->AtomicBuffers = + struct gl_program *gl_prog = prog->_LinkedShaders[j]->Program; + gl_prog->info.num_abos = num_atomic_buffers[j]; + gl_prog->sh.AtomicBuffers = rzalloc_array(prog, gl_active_atomic_buffer *, num_atomic_buffers[j]); unsigned intra_stage_idx = 0; for (unsigned i = 0; i < num_buffers; i++) { struct gl_active_atomic_buffer *atomic_buffer = - &prog->AtomicBuffers[i]; + &prog->data->AtomicBuffers[i]; if (atomic_buffer->StageReferences[j]) { - prog->_LinkedShaders[j]->AtomicBuffers[intra_stage_idx] = - atomic_buffer; + gl_prog->sh.AtomicBuffers[intra_stage_idx] = atomic_buffer; for (unsigned u = 0; u < atomic_buffer->NumUniforms; u++) { - prog->UniformStorage[atomic_buffer->Uniforms[u]].opaque[j].index = + prog->data->UniformStorage[atomic_buffer->Uniforms[u]].opaque[j].index = intra_stage_idx; - prog->UniformStorage[atomic_buffer->Uniforms[u]].opaque[j].active = + prog->data->UniformStorage[atomic_buffer->Uniforms[u]].opaque[j].active = true; } @@ -314,7 +319,7 @@ continue; for (unsigned j = 0; j < MESA_SHADER_STAGES; ++j) { - const unsigned n = abs[i].stage_references[j]; + const unsigned n = abs[i].stage_counter_references[j]; if (n) { atomic_counters[j] += n; diff -Nru mesa-12.0.6/src/compiler/glsl/linker.cpp mesa-17.0.7/src/compiler/glsl/linker.cpp --- mesa-12.0.6/src/compiler/glsl/linker.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/linker.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -71,8 +71,10 @@ #include "glsl_parser_extras.h" #include "ir.h" #include "program.h" -#include "program/hash_table.h" #include "program/prog_instruction.h" +#include "program/program.h" +#include "util/set.h" +#include "util/string_to_uint_map.h" #include "linker.h" #include "link_varyings.h" #include "ir_optimization.h" @@ -101,8 +103,8 @@ ir_variable *const var = ir->lhs->variable_referenced(); if (strcmp(name, var->name) == 0) { - found = true; - return visit_stop; + found = true; + return visit_stop; } return visit_continue_with_parent; @@ -112,26 +114,26 @@ { foreach_two_lists(formal_node, &ir->callee->parameters, actual_node, &ir->actual_parameters) { - ir_rvalue *param_rval = (ir_rvalue *) actual_node; - ir_variable *sig_param = (ir_variable *) formal_node; + ir_rvalue *param_rval = (ir_rvalue *) actual_node; + ir_variable *sig_param = (ir_variable *) formal_node; - if (sig_param->data.mode == ir_var_function_out || - sig_param->data.mode == ir_var_function_inout) { - ir_variable *var = param_rval->variable_referenced(); - if (var && strcmp(name, var->name) == 0) { - found = true; - return visit_stop; - } - } + if (sig_param->data.mode == ir_var_function_out || + sig_param->data.mode == ir_var_function_inout) { + ir_variable *var = param_rval->variable_referenced(); + if (var && strcmp(name, var->name) == 0) { + found = true; + return visit_stop; + } + } } if (ir->return_deref != NULL) { - ir_variable *const var = ir->return_deref->variable_referenced(); + ir_variable *const var = ir->return_deref->variable_referenced(); - if (strcmp(name, var->name) == 0) { - found = true; - return visit_stop; - } + if (strcmp(name, var->name) == 0) { + found = true; + return visit_stop; + } } return visit_continue_with_parent; @@ -162,8 +164,8 @@ virtual ir_visitor_status visit(ir_dereference_variable *ir) { if (strcmp(this->name, ir->var->name) == 0) { - this->found = true; - return visit_stop; + this->found = true; + return visit_stop; } return visit_continue; @@ -180,68 +182,19 @@ }; -class geom_array_resize_visitor : public ir_hierarchical_visitor { +/** + * A visitor helper that provides methods for updating the types of + * ir_dereferences. Classes that update variable types (say, updating + * array sizes) will want to use this so that dereference types stay in sync. + */ +class deref_type_updater : public ir_hierarchical_visitor { public: - unsigned num_vertices; - gl_shader_program *prog; - - geom_array_resize_visitor(unsigned num_vertices, gl_shader_program *prog) - { - this->num_vertices = num_vertices; - this->prog = prog; - } - - virtual ~geom_array_resize_visitor() - { - /* empty */ - } - - virtual ir_visitor_status visit(ir_variable *var) - { - if (!var->type->is_array() || var->data.mode != ir_var_shader_in) - return visit_continue; - - unsigned size = var->type->length; - - /* Generate a link error if the shader has declared this array with an - * incorrect size. - */ - if (!var->data.implicit_sized_array && - size && size != this->num_vertices) { - linker_error(this->prog, "size of array %s declared as %u, " - "but number of input vertices is %u\n", - var->name, size, this->num_vertices); - return visit_continue; - } - - /* Generate a link error if the shader attempts to access an input - * array using an index too large for its actual size assigned at link - * time. - */ - if (var->data.max_array_access >= (int)this->num_vertices) { - linker_error(this->prog, "geometry shader accesses element %i of " - "%s, but only %i input vertices\n", - var->data.max_array_access, var->name, this->num_vertices); - return visit_continue; - } - - var->type = glsl_type::get_array_instance(var->type->fields.array, - this->num_vertices); - var->data.max_array_access = this->num_vertices - 1; - - return visit_continue; - } - - /* Dereferences of input variables need to be updated so that their type - * matches the newly assigned type of the variable they are accessing. */ virtual ir_visitor_status visit(ir_dereference_variable *ir) { ir->type = ir->var->type; return visit_continue; } - /* Dereferences of 2D input arrays need to be updated so that their type - * matches the newly assigned type of the array they are accessing. */ virtual ir_visitor_status visit_leave(ir_dereference_array *ir) { const glsl_type *const vt = ir->array->type; @@ -249,144 +202,81 @@ ir->type = vt->fields.array; return visit_continue; } + + virtual ir_visitor_status visit_leave(ir_dereference_record *ir) + { + for (unsigned i = 0; i < ir->record->type->length; i++) { + const struct glsl_struct_field *field = + &ir->record->type->fields.structure[i]; + if (strcmp(field->name, ir->field) == 0) { + ir->type = field->type; + break; + } + } + return visit_continue; + } }; -class tess_eval_array_resize_visitor : public ir_hierarchical_visitor { + +class array_resize_visitor : public deref_type_updater { public: unsigned num_vertices; gl_shader_program *prog; + gl_shader_stage stage; - tess_eval_array_resize_visitor(unsigned num_vertices, gl_shader_program *prog) + array_resize_visitor(unsigned num_vertices, + gl_shader_program *prog, + gl_shader_stage stage) { this->num_vertices = num_vertices; this->prog = prog; + this->stage = stage; } - virtual ~tess_eval_array_resize_visitor() + virtual ~array_resize_visitor() { /* empty */ } virtual ir_visitor_status visit(ir_variable *var) { - if (!var->type->is_array() || var->data.mode != ir_var_shader_in || var->data.patch) + if (!var->type->is_array() || var->data.mode != ir_var_shader_in || + var->data.patch) return visit_continue; - var->type = glsl_type::get_array_instance(var->type->fields.array, - this->num_vertices); - var->data.max_array_access = this->num_vertices - 1; - - return visit_continue; - } - - /* Dereferences of input variables need to be updated so that their type - * matches the newly assigned type of the variable they are accessing. */ - virtual ir_visitor_status visit(ir_dereference_variable *ir) - { - ir->type = ir->var->type; - return visit_continue; - } - - /* Dereferences of 2D input arrays need to be updated so that their type - * matches the newly assigned type of the array they are accessing. */ - virtual ir_visitor_status visit_leave(ir_dereference_array *ir) - { - const glsl_type *const vt = ir->array->type; - if (vt->is_array()) - ir->type = vt->fields.array; - return visit_continue; - } -}; - -class barrier_use_visitor : public ir_hierarchical_visitor { -public: - barrier_use_visitor(gl_shader_program *prog) - : prog(prog), in_main(false), after_return(false), control_flow(0) - { - } - - virtual ~barrier_use_visitor() - { - /* empty */ - } - - virtual ir_visitor_status visit_enter(ir_function *ir) - { - if (strcmp(ir->name, "main") == 0) - in_main = true; - - return visit_continue; - } - - virtual ir_visitor_status visit_leave(ir_function *) - { - in_main = false; - after_return = false; - return visit_continue; - } - - virtual ir_visitor_status visit_leave(ir_return *) - { - after_return = true; - return visit_continue; - } - - virtual ir_visitor_status visit_enter(ir_if *) - { - ++control_flow; - return visit_continue; - } - - virtual ir_visitor_status visit_leave(ir_if *) - { - --control_flow; - return visit_continue; - } - - virtual ir_visitor_status visit_enter(ir_loop *) - { - ++control_flow; - return visit_continue; - } - - virtual ir_visitor_status visit_leave(ir_loop *) - { - --control_flow; - return visit_continue; - } - - /* FINISHME: `switch` is not expressed at the IR level -- it's already - * been lowered to a mess of `if`s. We'll correctly disallow any use of - * barrier() in a conditional path within the switch, but not in a path - * which is always hit. - */ - - virtual ir_visitor_status visit_enter(ir_call *ir) - { - if (ir->use_builtin && strcmp(ir->callee_name(), "barrier") == 0) { - /* Use of barrier(); determine if it is legal: */ - if (!in_main) { - linker_error(prog, "Builtin barrier() may only be used in main"); - return visit_stop; - } + unsigned size = var->type->length; - if (after_return) { - linker_error(prog, "Builtin barrier() may not be used after return"); - return visit_stop; + if (stage == MESA_SHADER_GEOMETRY) { + /* Generate a link error if the shader has declared this array with + * an incorrect size. + */ + if (!var->data.implicit_sized_array && + size && size != this->num_vertices) { + linker_error(this->prog, "size of array %s declared as %u, " + "but number of input vertices is %u\n", + var->name, size, this->num_vertices); + return visit_continue; } - if (control_flow != 0) { - linker_error(prog, "Builtin barrier() may not be used inside control flow"); - return visit_stop; + /* Generate a link error if the shader attempts to access an input + * array using an index too large for its actual size assigned at + * link time. + */ + if (var->data.max_array_access >= (int)this->num_vertices) { + linker_error(this->prog, "%s shader accesses element %i of " + "%s, but only %i input vertices\n", + _mesa_shader_stage_to_string(this->stage), + var->data.max_array_access, var->name, this->num_vertices); + return visit_continue; } } + + var->type = glsl_type::get_array_instance(var->type->fields.array, + this->num_vertices); + var->data.max_array_access = this->num_vertices - 1; + return visit_continue; } - -private: - gl_shader_program *prog; - bool in_main, after_return; - int control_flow; }; /** @@ -525,12 +415,12 @@ { va_list ap; - ralloc_strcat(&prog->InfoLog, "error: "); + ralloc_strcat(&prog->data->InfoLog, "error: "); va_start(ap, fmt); - ralloc_vasprintf_append(&prog->InfoLog, fmt, ap); + ralloc_vasprintf_append(&prog->data->InfoLog, fmt, ap); va_end(ap); - prog->LinkStatus = false; + prog->data->LinkStatus = false; } @@ -539,9 +429,9 @@ { va_list ap; - ralloc_strcat(&prog->InfoLog, "warning: "); + ralloc_strcat(&prog->data->InfoLog, "warning: "); va_start(ap, fmt); - ralloc_vasprintf_append(&prog->InfoLog, fmt, ap); + ralloc_vasprintf_append(&prog->data->InfoLog, fmt, ap); va_end(ap); } @@ -655,7 +545,7 @@ */ static void analyze_clip_cull_usage(struct gl_shader_program *prog, - struct gl_shader *shader, + struct gl_linked_shader *shader, struct gl_context *ctx, GLuint *clip_distance_array_size, GLuint *cull_distance_array_size) @@ -663,7 +553,7 @@ *clip_distance_array_size = 0; *cull_distance_array_size = 0; - if (prog->Version >= (prog->IsES ? 300 : 130)) { + if (prog->data->Version >= (prog->IsES ? 300 : 130)) { /* From section 7.1 (Vertex Shader Special Variables) of the * GLSL 1.30 spec: * @@ -750,7 +640,7 @@ */ void validate_vertex_shader_executable(struct gl_shader_program *prog, - struct gl_shader *shader, + struct gl_linked_shader *shader, struct gl_context *ctx) { if (shader == NULL) @@ -782,19 +672,19 @@ * All GLSL ES Versions are similar to GLSL 1.40--failing to write to * gl_Position is not an error. */ - if (prog->Version < (prog->IsES ? 300 : 140)) { + if (prog->data->Version < (prog->IsES ? 300 : 140)) { find_assignment_visitor find("gl_Position"); find.run(shader->ir); if (!find.variable_found()) { if (prog->IsES) { linker_warning(prog, - "vertex shader does not write to `gl_Position'." - "It's value is undefined. \n"); + "vertex shader does not write to `gl_Position'. " + "Its value is undefined. \n"); } else { linker_error(prog, "vertex shader does not write to `gl_Position'. \n"); } - return; + return; } } @@ -805,7 +695,7 @@ void validate_tess_eval_shader_executable(struct gl_shader_program *prog, - struct gl_shader *shader, + struct gl_linked_shader *shader, struct gl_context *ctx) { if (shader == NULL) @@ -824,7 +714,7 @@ */ void validate_fragment_shader_executable(struct gl_shader_program *prog, - struct gl_shader *shader) + struct gl_linked_shader *shader) { if (shader == NULL) return; @@ -837,7 +727,7 @@ if (frag_color.variable_found() && frag_data.variable_found()) { linker_error(prog, "fragment shader writes to both " - "`gl_FragColor' and `gl_FragData'\n"); + "`gl_FragColor' and `gl_FragData'\n"); } } @@ -851,13 +741,13 @@ */ void validate_geometry_shader_executable(struct gl_shader_program *prog, - struct gl_shader *shader, + struct gl_linked_shader *shader, struct gl_context *ctx) { if (shader == NULL) return; - unsigned num_vertices = vertices_per_prim(prog->Geom.InputType); + unsigned num_vertices = vertices_per_prim(shader->info.Geom.InputType); prog->Geom.VerticesIn = num_vertices; analyze_clip_cull_usage(prog, shader, ctx, @@ -873,9 +763,11 @@ validate_geometry_shader_emissions(struct gl_context *ctx, struct gl_shader_program *prog) { - if (prog->_LinkedShaders[MESA_SHADER_GEOMETRY] != NULL) { + struct gl_linked_shader *sh = prog->_LinkedShaders[MESA_SHADER_GEOMETRY]; + + if (sh != NULL) { find_emit_vertex_visitor emit_vertex(ctx->Const.MaxVertexStreams - 1); - emit_vertex.run(prog->_LinkedShaders[MESA_SHADER_GEOMETRY]->ir); + emit_vertex.run(sh->ir); if (emit_vertex.error()) { linker_error(prog, "Invalid call %s(%d). Accepted values for the " "stream parameter are in the range [0, %d].\n", @@ -910,7 +802,7 @@ * EmitStreamVertex() or EmitEndPrimitive() are called with a non-zero * stream. */ - if (prog->Geom.UsesStreams && prog->Geom.OutputType != GL_POINTS) { + if (prog->Geom.UsesStreams && sh->info.Geom.OutputType != GL_POINTS) { linker_error(prog, "EmitStreamVertex(n) and EndStreamPrimitive(n) " "with n>0 requires point output\n"); } @@ -920,7 +812,7 @@ bool validate_intrastage_arrays(struct gl_shader_program *prog, ir_variable *const var, - ir_variable *const existing) + ir_variable *const existing) { /* Consider the types to be "the same" if both types are arrays * of the same type and one of the arrays is implicitly sized. @@ -972,236 +864,241 @@ */ void cross_validate_globals(struct gl_shader_program *prog, - struct gl_shader **shader_list, - unsigned num_shaders, - bool uniforms_only) + struct exec_list *ir, glsl_symbol_table *variables, + bool uniforms_only) { - /* Examine all of the uniforms in all of the shaders and cross validate - * them. - */ - glsl_symbol_table variables; - for (unsigned i = 0; i < num_shaders; i++) { - if (shader_list[i] == NULL) - continue; + foreach_in_list(ir_instruction, node, ir) { + ir_variable *const var = node->as_variable(); - foreach_in_list(ir_instruction, node, shader_list[i]->ir) { - ir_variable *const var = node->as_variable(); + if (var == NULL) + continue; - if (var == NULL) - continue; + if (uniforms_only && (var->data.mode != ir_var_uniform && var->data.mode != ir_var_shader_storage)) + continue; - if (uniforms_only && (var->data.mode != ir_var_uniform && var->data.mode != ir_var_shader_storage)) - continue; + /* don't cross validate subroutine uniforms */ + if (var->type->contains_subroutine()) + continue; - /* don't cross validate subroutine uniforms */ - if (var->type->contains_subroutine()) - continue; + /* Don't cross validate temporaries that are at global scope. These + * will eventually get pulled into the shaders 'main'. + */ + if (var->data.mode == ir_var_temporary) + continue; - /* Don't cross validate temporaries that are at global scope. These - * will eventually get pulled into the shaders 'main'. - */ - if (var->data.mode == ir_var_temporary) - continue; - - /* If a global with this name has already been seen, verify that the - * new instance has the same type. In addition, if the globals have - * initializers, the values of the initializers must be the same. - */ - ir_variable *const existing = variables.get_variable(var->name); - if (existing != NULL) { - /* Check if types match. Interface blocks have some special - * rules so we handle those elsewhere. - */ - if (var->type != existing->type && - !var->is_interface_instance()) { - if (!validate_intrastage_arrays(prog, var, existing)) { - if (var->type->is_record() && existing->type->is_record() - && existing->type->record_compare(var->type)) { - existing->type = var->type; - } else { - /* If it is an unsized array in a Shader Storage Block, - * two different shaders can access to different elements. - * Because of that, they might be converted to different - * sized arrays, then check that they are compatible but - * ignore the array size. - */ - if (!(var->data.mode == ir_var_shader_storage && - var->data.from_ssbo_unsized_array && - existing->data.mode == ir_var_shader_storage && - existing->data.from_ssbo_unsized_array && - var->type->gl_type == existing->type->gl_type)) { - linker_error(prog, "%s `%s' declared as type " - "`%s' and type `%s'\n", - mode_string(var), - var->name, var->type->name, - existing->type->name); - return; - } + /* If a global with this name has already been seen, verify that the + * new instance has the same type. In addition, if the globals have + * initializers, the values of the initializers must be the same. + */ + ir_variable *const existing = variables->get_variable(var->name); + if (existing != NULL) { + /* Check if types match. Interface blocks have some special + * rules so we handle those elsewhere. + */ + if (var->type != existing->type && + !var->is_interface_instance()) { + if (!validate_intrastage_arrays(prog, var, existing)) { + if (var->type->is_record() && existing->type->is_record() + && existing->type->record_compare(var->type)) { + existing->type = var->type; + } else { + /* If it is an unsized array in a Shader Storage Block, + * two different shaders can access to different elements. + * Because of that, they might be converted to different + * sized arrays, then check that they are compatible but + * ignore the array size. + */ + if (!(var->data.mode == ir_var_shader_storage && + var->data.from_ssbo_unsized_array && + existing->data.mode == ir_var_shader_storage && + existing->data.from_ssbo_unsized_array && + var->type->gl_type == existing->type->gl_type)) { + linker_error(prog, "%s `%s' declared as type " + "`%s' and type `%s'\n", + mode_string(var), + var->name, var->type->name, + existing->type->name); + return; } - } - } - - if (var->data.explicit_location) { - if (existing->data.explicit_location - && (var->data.location != existing->data.location)) { - linker_error(prog, "explicit locations for %s " - "`%s' have differing values\n", - mode_string(var), var->name); - return; - } - - if (var->data.location_frac != existing->data.location_frac) { - linker_error(prog, "explicit components for %s " - "`%s' have differing values\n", - mode_string(var), var->name); - return; - } - - existing->data.location = var->data.location; - existing->data.explicit_location = true; - } else { - /* Check if uniform with implicit location was marked explicit - * by earlier shader stage. If so, mark it explicit in this stage - * too to make sure later processing does not treat it as - * implicit one. - */ - if (existing->data.explicit_location) { - var->data.location = existing->data.location; - var->data.explicit_location = true; } } + } - /* From the GLSL 4.20 specification: - * "A link error will result if two compilation units in a program - * specify different integer-constant bindings for the same - * opaque-uniform name. However, it is not an error to specify a - * binding on some but not all declarations for the same name" - */ - if (var->data.explicit_binding) { - if (existing->data.explicit_binding && - var->data.binding != existing->data.binding) { - linker_error(prog, "explicit bindings for %s " - "`%s' have differing values\n", - mode_string(var), var->name); - return; - } - - existing->data.binding = var->data.binding; - existing->data.explicit_binding = true; - } - - if (var->type->contains_atomic() && - var->data.offset != existing->data.offset) { - linker_error(prog, "offset specifications for %s " + if (var->data.explicit_location) { + if (existing->data.explicit_location + && (var->data.location != existing->data.location)) { + linker_error(prog, "explicit locations for %s " "`%s' have differing values\n", mode_string(var), var->name); return; } - /* Validate layout qualifiers for gl_FragDepth. - * - * From the AMD/ARB_conservative_depth specs: - * - * "If gl_FragDepth is redeclared in any fragment shader in a - * program, it must be redeclared in all fragment shaders in - * that program that have static assignments to - * gl_FragDepth. All redeclarations of gl_FragDepth in all - * fragment shaders in a single program must have the same set - * of qualifiers." - */ - if (strcmp(var->name, "gl_FragDepth") == 0) { - bool layout_declared = var->data.depth_layout != ir_depth_layout_none; - bool layout_differs = - var->data.depth_layout != existing->data.depth_layout; - - if (layout_declared && layout_differs) { - linker_error(prog, - "All redeclarations of gl_FragDepth in all " - "fragment shaders in a single program must have " - "the same set of qualifiers.\n"); - } - - if (var->data.used && layout_differs) { - linker_error(prog, - "If gl_FragDepth is redeclared with a layout " - "qualifier in any fragment shader, it must be " - "redeclared with the same layout qualifier in " - "all fragment shaders that have assignments to " - "gl_FragDepth\n"); - } - } - - /* Page 35 (page 41 of the PDF) of the GLSL 4.20 spec says: - * - * "If a shared global has multiple initializers, the - * initializers must all be constant expressions, and they - * must all have the same value. Otherwise, a link error will - * result. (A shared global having only one initializer does - * not require that initializer to be a constant expression.)" - * - * Previous to 4.20 the GLSL spec simply said that initializers - * must have the same value. In this case of non-constant - * initializers, this was impossible to determine. As a result, - * no vendor actually implemented that behavior. The 4.20 - * behavior matches the implemented behavior of at least one other - * vendor, so we'll implement that for all GLSL versions. - */ - if (var->constant_initializer != NULL) { - if (existing->constant_initializer != NULL) { - if (!var->constant_initializer->has_value(existing->constant_initializer)) { - linker_error(prog, "initializers for %s " - "`%s' have differing values\n", - mode_string(var), var->name); - return; - } - } else { - /* If the first-seen instance of a particular uniform did - * not have an initializer but a later instance does, - * replace the former with the later. - */ - variables.replace_variable(existing->name, var); - } - } - - if (var->data.has_initializer) { - if (existing->data.has_initializer - && (var->constant_initializer == NULL - || existing->constant_initializer == NULL)) { - linker_error(prog, - "shared global variable `%s' has multiple " - "non-constant initializers.\n", - var->name); - return; - } - } - - if (existing->data.invariant != var->data.invariant) { - linker_error(prog, "declarations for %s `%s' have " - "mismatching invariant qualifiers\n", - mode_string(var), var->name); - return; - } - if (existing->data.centroid != var->data.centroid) { - linker_error(prog, "declarations for %s `%s' have " - "mismatching centroid qualifiers\n", - mode_string(var), var->name); + if (var->data.location_frac != existing->data.location_frac) { + linker_error(prog, "explicit components for %s `%s' have " + "differing values\n", mode_string(var), var->name); return; } - if (existing->data.sample != var->data.sample) { - linker_error(prog, "declarations for %s `%s` have " - "mismatching sample qualifiers\n", + + existing->data.location = var->data.location; + existing->data.explicit_location = true; + } else { + /* Check if uniform with implicit location was marked explicit + * by earlier shader stage. If so, mark it explicit in this stage + * too to make sure later processing does not treat it as + * implicit one. + */ + if (existing->data.explicit_location) { + var->data.location = existing->data.location; + var->data.explicit_location = true; + } + } + + /* From the GLSL 4.20 specification: + * "A link error will result if two compilation units in a program + * specify different integer-constant bindings for the same + * opaque-uniform name. However, it is not an error to specify a + * binding on some but not all declarations for the same name" + */ + if (var->data.explicit_binding) { + if (existing->data.explicit_binding && + var->data.binding != existing->data.binding) { + linker_error(prog, "explicit bindings for %s " + "`%s' have differing values\n", mode_string(var), var->name); return; } - if (existing->data.image_format != var->data.image_format) { - linker_error(prog, "declarations for %s `%s` have " - "mismatching image format qualifiers\n", - mode_string(var), var->name); + + existing->data.binding = var->data.binding; + existing->data.explicit_binding = true; + } + + if (var->type->contains_atomic() && + var->data.offset != existing->data.offset) { + linker_error(prog, "offset specifications for %s " + "`%s' have differing values\n", + mode_string(var), var->name); + return; + } + + /* Validate layout qualifiers for gl_FragDepth. + * + * From the AMD/ARB_conservative_depth specs: + * + * "If gl_FragDepth is redeclared in any fragment shader in a + * program, it must be redeclared in all fragment shaders in + * that program that have static assignments to + * gl_FragDepth. All redeclarations of gl_FragDepth in all + * fragment shaders in a single program must have the same set + * of qualifiers." + */ + if (strcmp(var->name, "gl_FragDepth") == 0) { + bool layout_declared = var->data.depth_layout != ir_depth_layout_none; + bool layout_differs = + var->data.depth_layout != existing->data.depth_layout; + + if (layout_declared && layout_differs) { + linker_error(prog, + "All redeclarations of gl_FragDepth in all " + "fragment shaders in a single program must have " + "the same set of qualifiers.\n"); + } + + if (var->data.used && layout_differs) { + linker_error(prog, + "If gl_FragDepth is redeclared with a layout " + "qualifier in any fragment shader, it must be " + "redeclared with the same layout qualifier in " + "all fragment shaders that have assignments to " + "gl_FragDepth\n"); + } + } + + /* Page 35 (page 41 of the PDF) of the GLSL 4.20 spec says: + * + * "If a shared global has multiple initializers, the + * initializers must all be constant expressions, and they + * must all have the same value. Otherwise, a link error will + * result. (A shared global having only one initializer does + * not require that initializer to be a constant expression.)" + * + * Previous to 4.20 the GLSL spec simply said that initializers + * must have the same value. In this case of non-constant + * initializers, this was impossible to determine. As a result, + * no vendor actually implemented that behavior. The 4.20 + * behavior matches the implemented behavior of at least one other + * vendor, so we'll implement that for all GLSL versions. + */ + if (var->constant_initializer != NULL) { + if (existing->constant_initializer != NULL) { + if (!var->constant_initializer->has_value(existing->constant_initializer)) { + linker_error(prog, "initializers for %s " + "`%s' have differing values\n", + mode_string(var), var->name); + return; + } + } else { + /* If the first-seen instance of a particular uniform did + * not have an initializer but a later instance does, + * replace the former with the later. + */ + variables->replace_variable(existing->name, var); + } + } + + if (var->data.has_initializer) { + if (existing->data.has_initializer + && (var->constant_initializer == NULL + || existing->constant_initializer == NULL)) { + linker_error(prog, + "shared global variable `%s' has multiple " + "non-constant initializers.\n", + var->name); return; } - } else - variables.add_variable(var); - } + } + + if (existing->data.invariant != var->data.invariant) { + linker_error(prog, "declarations for %s `%s' have " + "mismatching invariant qualifiers\n", + mode_string(var), var->name); + return; + } + if (existing->data.centroid != var->data.centroid) { + linker_error(prog, "declarations for %s `%s' have " + "mismatching centroid qualifiers\n", + mode_string(var), var->name); + return; + } + if (existing->data.sample != var->data.sample) { + linker_error(prog, "declarations for %s `%s` have " + "mismatching sample qualifiers\n", + mode_string(var), var->name); + return; + } + if (existing->data.image_format != var->data.image_format) { + linker_error(prog, "declarations for %s `%s` have " + "mismatching image format qualifiers\n", + mode_string(var), var->name); + return; + } + + /* Only in GLSL ES 3.10, the precision qualifier should not match + * between block members defined in matched block names within a + * shader interface. + * + * In GLSL ES 3.00 and ES 3.20, precision qualifier for each block + * member should match. + */ + if (prog->IsES && (prog->data->Version != 310 || + !var->get_interface_type()) && + existing->data.precision != var->data.precision) { + linker_error(prog, "declarations for %s `%s` have " + "mismatching precision qualifiers\n", + mode_string(var), var->name); + return; + } + } else + variables->add_variable(var); } } @@ -1212,8 +1109,14 @@ void cross_validate_uniforms(struct gl_shader_program *prog) { - cross_validate_globals(prog, prog->_LinkedShaders, - MESA_SHADER_STAGES, true); + glsl_symbol_table variables; + for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { + if (prog->_LinkedShaders[i] == NULL) + continue; + + cross_validate_globals(prog, prog->_LinkedShaders[i]->ir, &variables, + true); + } } /** @@ -1226,40 +1129,40 @@ { int *InterfaceBlockStageIndex[MESA_SHADER_STAGES]; struct gl_uniform_block *blks = NULL; - unsigned *num_blks = validate_ssbo ? &prog->NumShaderStorageBlocks : - &prog->NumUniformBlocks; + unsigned *num_blks = validate_ssbo ? &prog->data->NumShaderStorageBlocks : + &prog->data->NumUniformBlocks; unsigned max_num_buffer_blocks = 0; for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { if (prog->_LinkedShaders[i]) { if (validate_ssbo) { max_num_buffer_blocks += - prog->_LinkedShaders[i]->NumShaderStorageBlocks; + prog->_LinkedShaders[i]->Program->info.num_ssbos; } else { max_num_buffer_blocks += - prog->_LinkedShaders[i]->NumUniformBlocks; + prog->_LinkedShaders[i]->Program->info.num_ubos; } } } for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { - struct gl_shader *sh = prog->_LinkedShaders[i]; + struct gl_linked_shader *sh = prog->_LinkedShaders[i]; InterfaceBlockStageIndex[i] = new int[max_num_buffer_blocks]; for (unsigned int j = 0; j < max_num_buffer_blocks; j++) InterfaceBlockStageIndex[i][j] = -1; if (sh == NULL) - continue; + continue; unsigned sh_num_blocks; struct gl_uniform_block **sh_blks; if (validate_ssbo) { - sh_num_blocks = prog->_LinkedShaders[i]->NumShaderStorageBlocks; - sh_blks = sh->ShaderStorageBlocks; + sh_num_blocks = prog->_LinkedShaders[i]->Program->info.num_ssbos; + sh_blks = sh->Program->sh.ShaderStorageBlocks; } else { - sh_num_blocks = prog->_LinkedShaders[i]->NumUniformBlocks; - sh_blks = sh->UniformBlocks; + sh_num_blocks = prog->_LinkedShaders[i]->Program->info.num_ubos; + sh_blks = sh->Program->sh.UniformBlocks; } for (unsigned int j = 0; j < sh_num_blocks; j++) { @@ -1273,6 +1176,12 @@ for (unsigned k = 0; k <= i; k++) { delete[] InterfaceBlockStageIndex[k]; } + + /* Reset the block count. This will help avoid various segfaults + * from api calls that assume the array exists due to the count + * being non-zero. + */ + *num_blks = 0; return false; } @@ -1287,16 +1196,16 @@ for (unsigned j = 0; j < *num_blks; j++) { int stage_index = InterfaceBlockStageIndex[i][j]; - if (stage_index != -1) { - struct gl_shader *sh = prog->_LinkedShaders[i]; - - blks[j].stageref |= (1 << i); + if (stage_index != -1) { + struct gl_linked_shader *sh = prog->_LinkedShaders[i]; struct gl_uniform_block **sh_blks = validate_ssbo ? - sh->ShaderStorageBlocks : sh->UniformBlocks; + sh->Program->sh.ShaderStorageBlocks : + sh->Program->sh.UniformBlocks; + blks[j].stageref |= sh_blks[stage_index]->stageref; sh_blks[stage_index] = &blks[j]; - } + } } } @@ -1305,9 +1214,9 @@ } if (validate_ssbo) - prog->ShaderStorageBlocks = blks; + prog->data->ShaderStorageBlocks = blks; else - prog->UniformBlocks = blks; + prog->data->UniformBlocks = blks; return true; } @@ -1317,7 +1226,7 @@ * Populates a shaders symbol table with all global declarations */ static void -populate_symbol_table(gl_shader *sh) +populate_symbol_table(gl_linked_shader *sh) { sh->symbols = new(sh) glsl_symbol_table; @@ -1326,7 +1235,7 @@ ir_function *func; if ((func = inst->as_function()) != NULL) { - sh->symbols->add_function(func); + sh->symbols->add_function(func); } else if ((var = inst->as_variable()) != NULL) { if (var->data.mode != ir_var_temporary) sh->symbols->add_variable(var); @@ -1355,47 +1264,47 @@ * should be added. */ void -remap_variables(ir_instruction *inst, struct gl_shader *target, - hash_table *temps) +remap_variables(ir_instruction *inst, struct gl_linked_shader *target, + hash_table *temps) { class remap_visitor : public ir_hierarchical_visitor { public: - remap_visitor(struct gl_shader *target, - hash_table *temps) + remap_visitor(struct gl_linked_shader *target, hash_table *temps) { - this->target = target; - this->symbols = target->symbols; - this->instructions = target->ir; - this->temps = temps; + this->target = target; + this->symbols = target->symbols; + this->instructions = target->ir; + this->temps = temps; } virtual ir_visitor_status visit(ir_dereference_variable *ir) { - if (ir->var->data.mode == ir_var_temporary) { - ir_variable *var = (ir_variable *) hash_table_find(temps, ir->var); + if (ir->var->data.mode == ir_var_temporary) { + hash_entry *entry = _mesa_hash_table_search(temps, ir->var); + ir_variable *var = entry ? (ir_variable *) entry->data : NULL; + + assert(var != NULL); + ir->var = var; + return visit_continue; + } - assert(var != NULL); - ir->var = var; - return visit_continue; - } - - ir_variable *const existing = - this->symbols->get_variable(ir->var->name); - if (existing != NULL) - ir->var = existing; - else { - ir_variable *copy = ir->var->clone(this->target, NULL); - - this->symbols->add_variable(copy); - this->instructions->push_head(copy); - ir->var = copy; - } + ir_variable *const existing = + this->symbols->get_variable(ir->var->name); + if (existing != NULL) + ir->var = existing; + else { + ir_variable *copy = ir->var->clone(this->target, NULL); + + this->symbols->add_variable(copy); + this->instructions->push_head(copy); + ir->var = copy; + } - return visit_continue; + return visit_continue; } private: - struct gl_shader *target; + struct gl_linked_shader *target; glsl_symbol_table *symbols; exec_list *instructions; hash_table *temps; @@ -1430,36 +1339,36 @@ */ exec_node * move_non_declarations(exec_list *instructions, exec_node *last, - bool make_copies, gl_shader *target) + bool make_copies, gl_linked_shader *target) { hash_table *temps = NULL; if (make_copies) - temps = hash_table_ctor(0, hash_table_pointer_hash, - hash_table_pointer_compare); + temps = _mesa_hash_table_create(NULL, _mesa_hash_pointer, + _mesa_key_pointer_equal); foreach_in_list_safe(ir_instruction, inst, instructions) { if (inst->as_function()) - continue; + continue; ir_variable *var = inst->as_variable(); if ((var != NULL) && (var->data.mode != ir_var_temporary)) - continue; + continue; assert(inst->as_assignment() || inst->as_call() || inst->as_if() /* for initializers with the ?: operator */ - || ((var != NULL) && (var->data.mode == ir_var_temporary))); + || ((var != NULL) && (var->data.mode == ir_var_temporary))); if (make_copies) { - inst = inst->clone(target, NULL); + inst = inst->clone(target, NULL); - if (var != NULL) - hash_table_insert(temps, inst, var); - else - remap_variables(inst, target, temps); + if (var != NULL) + _mesa_hash_table_insert(temps, var, inst); + else + remap_variables(inst, target, temps); } else { - inst->remove(); + inst->remove(); } last->insert_after(inst); @@ -1467,7 +1376,7 @@ } if (make_copies) - hash_table_dtor(temps); + _mesa_hash_table_destroy(temps, NULL); return last; } @@ -1478,18 +1387,18 @@ * it inside that function leads to compiler warnings with some versions of * gcc. */ -class array_sizing_visitor : public ir_hierarchical_visitor { +class array_sizing_visitor : public deref_type_updater { public: array_sizing_visitor() : mem_ctx(ralloc_context(NULL)), - unnamed_interfaces(hash_table_ctor(0, hash_table_pointer_hash, - hash_table_pointer_compare)) + unnamed_interfaces(_mesa_hash_table_create(NULL, _mesa_hash_pointer, + _mesa_key_pointer_equal)) { } ~array_sizing_visitor() { - hash_table_dtor(this->unnamed_interfaces); + _mesa_hash_table_destroy(this->unnamed_interfaces, NULL); ralloc_free(this->mem_ctx); } @@ -1524,13 +1433,17 @@ /* Store a pointer to the variable in the unnamed_interfaces * hashtable. */ - ir_variable **interface_vars = (ir_variable **) - hash_table_find(this->unnamed_interfaces, ifc_type); + hash_entry *entry = + _mesa_hash_table_search(this->unnamed_interfaces, + ifc_type); + + ir_variable **interface_vars = entry ? (ir_variable **) entry->data : NULL; + if (interface_vars == NULL) { interface_vars = rzalloc_array(mem_ctx, ir_variable *, ifc_type->length); - hash_table_insert(this->unnamed_interfaces, interface_vars, - ifc_type); + _mesa_hash_table_insert(this->unnamed_interfaces, ifc_type, + interface_vars); } unsigned index = ifc_type->field_index(var->name); assert(index < ifc_type->length); @@ -1626,9 +1539,10 @@ } glsl_interface_packing packing = (glsl_interface_packing) type->interface_packing; + bool row_major = (bool) type->interface_row_major; const glsl_type *new_ifc_type = glsl_type::get_interface_instance(fields, num_fields, - packing, type->name); + packing, row_major, type->name); delete [] fields; return new_ifc_type; } @@ -1656,9 +1570,10 @@ } glsl_interface_packing packing = (glsl_interface_packing) ifc_type->interface_packing; + bool row_major = (bool) ifc_type->interface_row_major; const glsl_type *new_ifc_type = glsl_type::get_interface_instance(fields, num_fields, packing, - ifc_type->name); + row_major, ifc_type->name); delete [] fields; for (unsigned i = 0; i < num_fields; i++) { if (interface_vars[i] != NULL) @@ -1685,42 +1600,43 @@ static void link_xfb_stride_layout_qualifiers(struct gl_context *ctx, struct gl_shader_program *prog, - struct gl_shader *linked_shader, - struct gl_shader **shader_list, - unsigned num_shaders) + struct gl_linked_shader *linked_shader, + struct gl_shader **shader_list, + unsigned num_shaders) { for (unsigned i = 0; i < MAX_FEEDBACK_BUFFERS; i++) { - linked_shader->TransformFeedback.BufferStride[i] = 0; + linked_shader->info.TransformFeedback.BufferStride[i] = 0; } for (unsigned i = 0; i < num_shaders; i++) { struct gl_shader *shader = shader_list[i]; for (unsigned j = 0; j < MAX_FEEDBACK_BUFFERS; j++) { - if (shader->TransformFeedback.BufferStride[j]) { - if (linked_shader->TransformFeedback.BufferStride[j] != 0 && - shader->TransformFeedback.BufferStride[j] != 0 && - linked_shader->TransformFeedback.BufferStride[j] != - shader->TransformFeedback.BufferStride[j]) { - linker_error(prog, + if (shader->info.TransformFeedback.BufferStride[j]) { + if (linked_shader->info.TransformFeedback.BufferStride[j] != 0 && + shader->info.TransformFeedback.BufferStride[j] != 0 && + linked_shader->info.TransformFeedback.BufferStride[j] != + shader->info.TransformFeedback.BufferStride[j]) { + linker_error(prog, "intrastage shaders defined with conflicting " "xfb_stride for buffer %d (%d and %d)\n", j, - linked_shader->TransformFeedback.BufferStride[j], - shader->TransformFeedback.BufferStride[j]); - return; - } - - if (shader->TransformFeedback.BufferStride[j]) - linked_shader->TransformFeedback.BufferStride[j] = - shader->TransformFeedback.BufferStride[j]; + linked_shader-> + info.TransformFeedback.BufferStride[j], + shader->info.TransformFeedback.BufferStride[j]); + return; + } + + if (shader->info.TransformFeedback.BufferStride[j]) + linked_shader->info.TransformFeedback.BufferStride[j] = + shader->info.TransformFeedback.BufferStride[j]; } } } for (unsigned j = 0; j < MAX_FEEDBACK_BUFFERS; j++) { - if (linked_shader->TransformFeedback.BufferStride[j]) { + if (linked_shader->info.TransformFeedback.BufferStride[j]) { prog->TransformFeedback.BufferStride[j] = - linked_shader->TransformFeedback.BufferStride[j]; + linked_shader->info.TransformFeedback.BufferStride[j]; /* We will validate doubles at a later stage */ if (prog->TransformFeedback.BufferStride[j] % 4) { @@ -1749,11 +1665,11 @@ */ static void link_tcs_out_layout_qualifiers(struct gl_shader_program *prog, - struct gl_shader *linked_shader, - struct gl_shader **shader_list, - unsigned num_shaders) + struct gl_linked_shader *linked_shader, + struct gl_shader **shader_list, + unsigned num_shaders) { - linked_shader->TessCtrl.VerticesOut = 0; + linked_shader->info.TessCtrl.VerticesOut = 0; if (linked_shader->Stage != MESA_SHADER_TESS_CTRL) return; @@ -1771,16 +1687,18 @@ for (unsigned i = 0; i < num_shaders; i++) { struct gl_shader *shader = shader_list[i]; - if (shader->TessCtrl.VerticesOut != 0) { - if (linked_shader->TessCtrl.VerticesOut != 0 && - linked_shader->TessCtrl.VerticesOut != shader->TessCtrl.VerticesOut) { - linker_error(prog, "tessellation control shader defined with " - "conflicting output vertex count (%d and %d)\n", - linked_shader->TessCtrl.VerticesOut, - shader->TessCtrl.VerticesOut); - return; - } - linked_shader->TessCtrl.VerticesOut = shader->TessCtrl.VerticesOut; + if (shader->info.TessCtrl.VerticesOut != 0) { + if (linked_shader->info.TessCtrl.VerticesOut != 0 && + linked_shader->info.TessCtrl.VerticesOut != + shader->info.TessCtrl.VerticesOut) { + linker_error(prog, "tessellation control shader defined with " + "conflicting output vertex count (%d and %d)\n", + linked_shader->info.TessCtrl.VerticesOut, + shader->info.TessCtrl.VerticesOut); + return; + } + linked_shader->info.TessCtrl.VerticesOut = + shader->info.TessCtrl.VerticesOut; } } @@ -1788,12 +1706,11 @@ * since we already know we're in the right type of shader program * for doing it. */ - if (linked_shader->TessCtrl.VerticesOut == 0) { + if (linked_shader->info.TessCtrl.VerticesOut == 0) { linker_error(prog, "tessellation control shader didn't declare " - "vertices out layout qualifier\n"); + "vertices out layout qualifier\n"); return; } - prog->TessCtrl.VerticesOut = linked_shader->TessCtrl.VerticesOut; } @@ -1805,14 +1722,14 @@ */ static void link_tes_in_layout_qualifiers(struct gl_shader_program *prog, - struct gl_shader *linked_shader, - struct gl_shader **shader_list, - unsigned num_shaders) -{ - linked_shader->TessEval.PrimitiveMode = PRIM_UNKNOWN; - linked_shader->TessEval.Spacing = 0; - linked_shader->TessEval.VertexOrder = 0; - linked_shader->TessEval.PointMode = -1; + struct gl_linked_shader *linked_shader, + struct gl_shader **shader_list, + unsigned num_shaders) +{ + linked_shader->info.TessEval.PrimitiveMode = PRIM_UNKNOWN; + linked_shader->info.TessEval.Spacing = TESS_SPACING_UNSPECIFIED; + linked_shader->info.TessEval.VertexOrder = 0; + linked_shader->info.TessEval.PointMode = -1; if (linked_shader->Stage != MESA_SHADER_TESS_EVAL) return; @@ -1834,71 +1751,73 @@ for (unsigned i = 0; i < num_shaders; i++) { struct gl_shader *shader = shader_list[i]; - if (shader->TessEval.PrimitiveMode != PRIM_UNKNOWN) { - if (linked_shader->TessEval.PrimitiveMode != PRIM_UNKNOWN && - linked_shader->TessEval.PrimitiveMode != shader->TessEval.PrimitiveMode) { - linker_error(prog, "tessellation evaluation shader defined with " - "conflicting input primitive modes.\n"); - return; - } - linked_shader->TessEval.PrimitiveMode = shader->TessEval.PrimitiveMode; - } - - if (shader->TessEval.Spacing != 0) { - if (linked_shader->TessEval.Spacing != 0 && - linked_shader->TessEval.Spacing != shader->TessEval.Spacing) { - linker_error(prog, "tessellation evaluation shader defined with " - "conflicting vertex spacing.\n"); - return; - } - linked_shader->TessEval.Spacing = shader->TessEval.Spacing; - } - - if (shader->TessEval.VertexOrder != 0) { - if (linked_shader->TessEval.VertexOrder != 0 && - linked_shader->TessEval.VertexOrder != shader->TessEval.VertexOrder) { - linker_error(prog, "tessellation evaluation shader defined with " - "conflicting ordering.\n"); - return; - } - linked_shader->TessEval.VertexOrder = shader->TessEval.VertexOrder; - } - - if (shader->TessEval.PointMode != -1) { - if (linked_shader->TessEval.PointMode != -1 && - linked_shader->TessEval.PointMode != shader->TessEval.PointMode) { - linker_error(prog, "tessellation evaluation shader defined with " - "conflicting point modes.\n"); - return; - } - linked_shader->TessEval.PointMode = shader->TessEval.PointMode; + if (shader->info.TessEval.PrimitiveMode != PRIM_UNKNOWN) { + if (linked_shader->info.TessEval.PrimitiveMode != PRIM_UNKNOWN && + linked_shader->info.TessEval.PrimitiveMode != + shader->info.TessEval.PrimitiveMode) { + linker_error(prog, "tessellation evaluation shader defined with " + "conflicting input primitive modes.\n"); + return; + } + linked_shader->info.TessEval.PrimitiveMode = shader->info.TessEval.PrimitiveMode; } - } + if (shader->info.TessEval.Spacing != 0) { + if (linked_shader->info.TessEval.Spacing != 0 && + linked_shader->info.TessEval.Spacing != + shader->info.TessEval.Spacing) { + linker_error(prog, "tessellation evaluation shader defined with " + "conflicting vertex spacing.\n"); + return; + } + linked_shader->info.TessEval.Spacing = shader->info.TessEval.Spacing; + } - /* Just do the intrastage -> interstage propagation right now, - * since we already know we're in the right type of shader program - * for doing it. - */ - if (linked_shader->TessEval.PrimitiveMode == PRIM_UNKNOWN) { - linker_error(prog, - "tessellation evaluation shader didn't declare input " - "primitive modes.\n"); - return; - } - prog->TessEval.PrimitiveMode = linked_shader->TessEval.PrimitiveMode; + if (shader->info.TessEval.VertexOrder != 0) { + if (linked_shader->info.TessEval.VertexOrder != 0 && + linked_shader->info.TessEval.VertexOrder != + shader->info.TessEval.VertexOrder) { + linker_error(prog, "tessellation evaluation shader defined with " + "conflicting ordering.\n"); + return; + } + linked_shader->info.TessEval.VertexOrder = + shader->info.TessEval.VertexOrder; + } + + if (shader->info.TessEval.PointMode != -1) { + if (linked_shader->info.TessEval.PointMode != -1 && + linked_shader->info.TessEval.PointMode != + shader->info.TessEval.PointMode) { + linker_error(prog, "tessellation evaluation shader defined with " + "conflicting point modes.\n"); + return; + } + linked_shader->info.TessEval.PointMode = + shader->info.TessEval.PointMode; + } + + } + + /* Just do the intrastage -> interstage propagation right now, + * since we already know we're in the right type of shader program + * for doing it. + */ + if (linked_shader->info.TessEval.PrimitiveMode == PRIM_UNKNOWN) { + linker_error(prog, + "tessellation evaluation shader didn't declare input " + "primitive modes.\n"); + return; + } + + if (linked_shader->info.TessEval.Spacing == TESS_SPACING_UNSPECIFIED) + linked_shader->info.TessEval.Spacing = TESS_SPACING_EQUAL; - if (linked_shader->TessEval.Spacing == 0) - linked_shader->TessEval.Spacing = GL_EQUAL; - prog->TessEval.Spacing = linked_shader->TessEval.Spacing; - - if (linked_shader->TessEval.VertexOrder == 0) - linked_shader->TessEval.VertexOrder = GL_CCW; - prog->TessEval.VertexOrder = linked_shader->TessEval.VertexOrder; - - if (linked_shader->TessEval.PointMode == -1) - linked_shader->TessEval.PointMode = GL_FALSE; - prog->TessEval.PointMode = linked_shader->TessEval.PointMode; + if (linked_shader->info.TessEval.VertexOrder == 0) + linked_shader->info.TessEval.VertexOrder = GL_CCW; + + if (linked_shader->info.TessEval.PointMode == -1) + linked_shader->info.TessEval.PointMode = GL_FALSE; } @@ -1908,18 +1827,19 @@ * and propagates them to the linked FS and linked shader program. */ static void -link_fs_input_layout_qualifiers(struct gl_shader_program *prog, - struct gl_shader *linked_shader, - struct gl_shader **shader_list, - unsigned num_shaders) -{ - linked_shader->redeclares_gl_fragcoord = false; - linked_shader->uses_gl_fragcoord = false; - linked_shader->origin_upper_left = false; - linked_shader->pixel_center_integer = false; +link_fs_inout_layout_qualifiers(struct gl_shader_program *prog, + struct gl_linked_shader *linked_shader, + struct gl_shader **shader_list, + unsigned num_shaders) +{ + linked_shader->info.redeclares_gl_fragcoord = false; + linked_shader->info.uses_gl_fragcoord = false; + linked_shader->info.origin_upper_left = false; + linked_shader->info.pixel_center_integer = false; if (linked_shader->Stage != MESA_SHADER_FRAGMENT || - (prog->Version < 150 && !prog->ARB_fragment_coord_conventions_enable)) + (prog->data->Version < 150 && + !prog->ARB_fragment_coord_conventions_enable)) return; for (unsigned i = 0; i < num_shaders; i++) { @@ -1930,12 +1850,12 @@ * it must be redeclared in all the fragment shaders in that program * that have a static use gl_FragCoord." */ - if ((linked_shader->redeclares_gl_fragcoord - && !shader->redeclares_gl_fragcoord - && shader->uses_gl_fragcoord) - || (shader->redeclares_gl_fragcoord - && !linked_shader->redeclares_gl_fragcoord - && linked_shader->uses_gl_fragcoord)) { + if ((linked_shader->info.redeclares_gl_fragcoord + && !shader->info.redeclares_gl_fragcoord + && shader->info.uses_gl_fragcoord) + || (shader->info.redeclares_gl_fragcoord + && !linked_shader->info.redeclares_gl_fragcoord + && linked_shader->info.uses_gl_fragcoord)) { linker_error(prog, "fragment shader defined with conflicting " "layout qualifiers for gl_FragCoord\n"); } @@ -1945,9 +1865,12 @@ * "All redeclarations of gl_FragCoord in all fragment shaders in a * single program must have the same set of qualifiers." */ - if (linked_shader->redeclares_gl_fragcoord && shader->redeclares_gl_fragcoord - && (shader->origin_upper_left != linked_shader->origin_upper_left - || shader->pixel_center_integer != linked_shader->pixel_center_integer)) { + if (linked_shader->info.redeclares_gl_fragcoord && + shader->info.redeclares_gl_fragcoord && + (shader->info.origin_upper_left != + linked_shader->info.origin_upper_left || + shader->info.pixel_center_integer != + linked_shader->info.pixel_center_integer)) { linker_error(prog, "fragment shader defined with conflicting " "layout qualifiers for gl_FragCoord\n"); } @@ -1957,16 +1880,27 @@ * are multiple redeclarations, all the fields except uses_gl_fragcoord * are already known to be the same. */ - if (shader->redeclares_gl_fragcoord || shader->uses_gl_fragcoord) { - linked_shader->redeclares_gl_fragcoord = - shader->redeclares_gl_fragcoord; - linked_shader->uses_gl_fragcoord = linked_shader->uses_gl_fragcoord - || shader->uses_gl_fragcoord; - linked_shader->origin_upper_left = shader->origin_upper_left; - linked_shader->pixel_center_integer = shader->pixel_center_integer; - } + if (shader->info.redeclares_gl_fragcoord || + shader->info.uses_gl_fragcoord) { + linked_shader->info.redeclares_gl_fragcoord = + shader->info.redeclares_gl_fragcoord; + linked_shader->info.uses_gl_fragcoord = + linked_shader->info.uses_gl_fragcoord || + shader->info.uses_gl_fragcoord; + linked_shader->info.origin_upper_left = + shader->info.origin_upper_left; + linked_shader->info.pixel_center_integer = + shader->info.pixel_center_integer; + } + + linked_shader->info.EarlyFragmentTests |= + shader->info.EarlyFragmentTests; + linked_shader->info.InnerCoverage |= + shader->info.InnerCoverage; + linked_shader->Program->info.fs.post_depth_coverage |= + shader->info.PostDepthCoverage; - linked_shader->EarlyFragmentTests |= shader->EarlyFragmentTests; + linked_shader->Program->sh.fs.BlendSupport |= shader->BlendSupport; } } @@ -1977,19 +1911,20 @@ */ static void link_gs_inout_layout_qualifiers(struct gl_shader_program *prog, - struct gl_shader *linked_shader, - struct gl_shader **shader_list, - unsigned num_shaders) -{ - linked_shader->Geom.VerticesOut = -1; - linked_shader->Geom.Invocations = 0; - linked_shader->Geom.InputType = PRIM_UNKNOWN; - linked_shader->Geom.OutputType = PRIM_UNKNOWN; + struct gl_linked_shader *linked_shader, + struct gl_shader **shader_list, + unsigned num_shaders) +{ + linked_shader->info.Geom.VerticesOut = -1; + linked_shader->info.Geom.Invocations = 0; + linked_shader->info.Geom.InputType = PRIM_UNKNOWN; + linked_shader->info.Geom.OutputType = PRIM_UNKNOWN; /* No in/out qualifiers defined for anything but GLSL 1.50+ * geometry shaders so far. */ - if (linked_shader->Stage != MESA_SHADER_GEOMETRY || prog->Version < 150) + if (linked_shader->Stage != MESA_SHADER_GEOMETRY || + prog->data->Version < 150) return; /* From the GLSL 1.50 spec, page 46: @@ -2005,48 +1940,52 @@ for (unsigned i = 0; i < num_shaders; i++) { struct gl_shader *shader = shader_list[i]; - if (shader->Geom.InputType != PRIM_UNKNOWN) { - if (linked_shader->Geom.InputType != PRIM_UNKNOWN && - linked_shader->Geom.InputType != shader->Geom.InputType) { - linker_error(prog, "geometry shader defined with conflicting " - "input types\n"); - return; - } - linked_shader->Geom.InputType = shader->Geom.InputType; - } - - if (shader->Geom.OutputType != PRIM_UNKNOWN) { - if (linked_shader->Geom.OutputType != PRIM_UNKNOWN && - linked_shader->Geom.OutputType != shader->Geom.OutputType) { - linker_error(prog, "geometry shader defined with conflicting " - "output types\n"); - return; - } - linked_shader->Geom.OutputType = shader->Geom.OutputType; - } - - if (shader->Geom.VerticesOut != -1) { - if (linked_shader->Geom.VerticesOut != -1 && - linked_shader->Geom.VerticesOut != shader->Geom.VerticesOut) { - linker_error(prog, "geometry shader defined with conflicting " - "output vertex count (%d and %d)\n", - linked_shader->Geom.VerticesOut, - shader->Geom.VerticesOut); - return; - } - linked_shader->Geom.VerticesOut = shader->Geom.VerticesOut; - } - - if (shader->Geom.Invocations != 0) { - if (linked_shader->Geom.Invocations != 0 && - linked_shader->Geom.Invocations != shader->Geom.Invocations) { - linker_error(prog, "geometry shader defined with conflicting " - "invocation count (%d and %d)\n", - linked_shader->Geom.Invocations, - shader->Geom.Invocations); - return; - } - linked_shader->Geom.Invocations = shader->Geom.Invocations; + if (shader->info.Geom.InputType != PRIM_UNKNOWN) { + if (linked_shader->info.Geom.InputType != PRIM_UNKNOWN && + linked_shader->info.Geom.InputType != + shader->info.Geom.InputType) { + linker_error(prog, "geometry shader defined with conflicting " + "input types\n"); + return; + } + linked_shader->info.Geom.InputType = shader->info.Geom.InputType; + } + + if (shader->info.Geom.OutputType != PRIM_UNKNOWN) { + if (linked_shader->info.Geom.OutputType != PRIM_UNKNOWN && + linked_shader->info.Geom.OutputType != + shader->info.Geom.OutputType) { + linker_error(prog, "geometry shader defined with conflicting " + "output types\n"); + return; + } + linked_shader->info.Geom.OutputType = shader->info.Geom.OutputType; + } + + if (shader->info.Geom.VerticesOut != -1) { + if (linked_shader->info.Geom.VerticesOut != -1 && + linked_shader->info.Geom.VerticesOut != + shader->info.Geom.VerticesOut) { + linker_error(prog, "geometry shader defined with conflicting " + "output vertex count (%d and %d)\n", + linked_shader->info.Geom.VerticesOut, + shader->info.Geom.VerticesOut); + return; + } + linked_shader->info.Geom.VerticesOut = shader->info.Geom.VerticesOut; + } + + if (shader->info.Geom.Invocations != 0) { + if (linked_shader->info.Geom.Invocations != 0 && + linked_shader->info.Geom.Invocations != + shader->info.Geom.Invocations) { + linker_error(prog, "geometry shader defined with conflicting " + "invocation count (%d and %d)\n", + linked_shader->info.Geom.Invocations, + shader->info.Geom.Invocations); + return; + } + linked_shader->info.Geom.Invocations = shader->info.Geom.Invocations; } } @@ -2054,31 +1993,26 @@ * since we already know we're in the right type of shader program * for doing it. */ - if (linked_shader->Geom.InputType == PRIM_UNKNOWN) { + if (linked_shader->info.Geom.InputType == PRIM_UNKNOWN) { linker_error(prog, - "geometry shader didn't declare primitive input type\n"); + "geometry shader didn't declare primitive input type\n"); return; } - prog->Geom.InputType = linked_shader->Geom.InputType; - if (linked_shader->Geom.OutputType == PRIM_UNKNOWN) { + if (linked_shader->info.Geom.OutputType == PRIM_UNKNOWN) { linker_error(prog, - "geometry shader didn't declare primitive output type\n"); + "geometry shader didn't declare primitive output type\n"); return; } - prog->Geom.OutputType = linked_shader->Geom.OutputType; - if (linked_shader->Geom.VerticesOut == -1) { + if (linked_shader->info.Geom.VerticesOut == -1) { linker_error(prog, - "geometry shader didn't declare max_vertices\n"); + "geometry shader didn't declare max_vertices\n"); return; } - prog->Geom.VerticesOut = linked_shader->Geom.VerticesOut; - if (linked_shader->Geom.Invocations == 0) - linked_shader->Geom.Invocations = 1; - - prog->Geom.Invocations = linked_shader->Geom.Invocations; + if (linked_shader->info.Geom.Invocations == 0) + linked_shader->info.Geom.Invocations = 1; } @@ -2089,12 +2023,14 @@ */ static void link_cs_input_layout_qualifiers(struct gl_shader_program *prog, - struct gl_shader *linked_shader, + struct gl_linked_shader *linked_shader, struct gl_shader **shader_list, unsigned num_shaders) { for (int i = 0; i < 3; i++) - linked_shader->Comp.LocalSize[i] = 0; + linked_shader->info.Comp.LocalSize[i] = 0; + + linked_shader->info.Comp.LocalSizeVariable = false; /* This function is called for all shader stages, but it only has an effect * for compute shaders. @@ -2115,19 +2051,35 @@ for (unsigned sh = 0; sh < num_shaders; sh++) { struct gl_shader *shader = shader_list[sh]; - if (shader->Comp.LocalSize[0] != 0) { - if (linked_shader->Comp.LocalSize[0] != 0) { + if (shader->info.Comp.LocalSize[0] != 0) { + if (linked_shader->info.Comp.LocalSize[0] != 0) { for (int i = 0; i < 3; i++) { - if (linked_shader->Comp.LocalSize[i] != - shader->Comp.LocalSize[i]) { + if (linked_shader->info.Comp.LocalSize[i] != + shader->info.Comp.LocalSize[i]) { linker_error(prog, "compute shader defined with conflicting " "local sizes\n"); return; } } } - for (int i = 0; i < 3; i++) - linked_shader->Comp.LocalSize[i] = shader->Comp.LocalSize[i]; + for (int i = 0; i < 3; i++) { + linked_shader->info.Comp.LocalSize[i] = + shader->info.Comp.LocalSize[i]; + } + } else if (shader->info.Comp.LocalSizeVariable) { + if (linked_shader->info.Comp.LocalSize[0] != 0) { + /* The ARB_compute_variable_group_size spec says: + * + * If one compute shader attached to a program declares a + * variable local group size and a second compute shader + * attached to the same program declares a fixed local group + * size, a link-time error results. + */ + linker_error(prog, "compute shader defined with both fixed and " + "variable local group size\n"); + return; + } + linked_shader->info.Comp.LocalSizeVariable = true; } } @@ -2135,12 +2087,17 @@ * since we already know we're in the right type of shader program * for doing it. */ - if (linked_shader->Comp.LocalSize[0] == 0) { - linker_error(prog, "compute shader didn't declare local size\n"); + if (linked_shader->info.Comp.LocalSize[0] == 0 && + !linked_shader->info.Comp.LocalSizeVariable) { + linker_error(prog, "compute shader must contain a fixed or a variable " + "local group size\n"); return; } for (int i = 0; i < 3; i++) - prog->Comp.LocalSize[i] = linked_shader->Comp.LocalSize[i]; + prog->Comp.LocalSize[i] = linked_shader->info.Comp.LocalSize[i]; + + prog->Comp.LocalSizeVariable = + linked_shader->info.Comp.LocalSizeVariable; } @@ -2151,12 +2108,13 @@ * If this function is supplied a single shader, it is cloned, and the new * shader is returned. */ -static struct gl_shader * +struct gl_linked_shader * link_intrastage_shaders(void *mem_ctx, - struct gl_context *ctx, - struct gl_shader_program *prog, - struct gl_shader **shader_list, - unsigned num_shaders) + struct gl_context *ctx, + struct gl_shader_program *prog, + struct gl_shader **shader_list, + unsigned num_shaders, + bool allow_missing_main) { struct gl_uniform_block *ubo_blocks = NULL; struct gl_uniform_block *ssbo_blocks = NULL; @@ -2165,15 +2123,21 @@ /* Check that global variables defined in multiple shaders are consistent. */ - cross_validate_globals(prog, shader_list, num_shaders, false); - if (!prog->LinkStatus) + glsl_symbol_table variables; + for (unsigned i = 0; i < num_shaders; i++) { + if (shader_list[i] == NULL) + continue; + cross_validate_globals(prog, shader_list[i]->ir, &variables, false); + } + + if (!prog->data->LinkStatus) return NULL; /* Check that interface blocks defined in multiple shaders are consistent. */ validate_intrastage_interface_blocks(prog, (const gl_shader **)shader_list, num_shaders); - if (!prog->LinkStatus) + if (!prog->data->LinkStatus) return NULL; /* Check that there is only a single definition of each function signature @@ -2181,36 +2145,35 @@ */ for (unsigned i = 0; i < (num_shaders - 1); i++) { foreach_in_list(ir_instruction, node, shader_list[i]->ir) { - ir_function *const f = node->as_function(); + ir_function *const f = node->as_function(); + + if (f == NULL) + continue; + + for (unsigned j = i + 1; j < num_shaders; j++) { + ir_function *const other = + shader_list[j]->symbols->get_function(f->name); - if (f == NULL) - continue; + /* If the other shader has no function (and therefore no function + * signatures) with the same name, skip to the next shader. + */ + if (other == NULL) + continue; - for (unsigned j = i + 1; j < num_shaders; j++) { - ir_function *const other = - shader_list[j]->symbols->get_function(f->name); - - /* If the other shader has no function (and therefore no function - * signatures) with the same name, skip to the next shader. - */ - if (other == NULL) - continue; - - foreach_in_list(ir_function_signature, sig, &f->signatures) { - if (!sig->is_defined || sig->is_builtin()) - continue; - - ir_function_signature *other_sig = - other->exact_matching_signature(NULL, &sig->parameters); - - if ((other_sig != NULL) && other_sig->is_defined - && !other_sig->is_builtin()) { - linker_error(prog, "function `%s' is multiply defined\n", - f->name); - return NULL; - } - } - } + foreach_in_list(ir_function_signature, sig, &f->signatures) { + if (!sig->is_defined) + continue; + + ir_function_signature *other_sig = + other->exact_matching_signature(NULL, &sig->parameters); + + if (other_sig != NULL && other_sig->is_defined) { + linker_error(prog, "function `%s' is multiply defined\n", + f->name); + return NULL; + } + } + } } } @@ -2223,23 +2186,44 @@ */ gl_shader *main = NULL; for (unsigned i = 0; i < num_shaders; i++) { - if (_mesa_get_main_function_signature(shader_list[i]) != NULL) { - main = shader_list[i]; - break; + if (_mesa_get_main_function_signature(shader_list[i]->symbols)) { + main = shader_list[i]; + break; } } + if (main == NULL && allow_missing_main) + main = shader_list[0]; + if (main == NULL) { linker_error(prog, "%s shader lacks `main'\n", - _mesa_shader_stage_to_string(shader_list[0]->Stage)); + _mesa_shader_stage_to_string(shader_list[0]->Stage)); + return NULL; + } + + gl_linked_shader *linked = rzalloc(NULL, struct gl_linked_shader); + linked->Stage = shader_list[0]->Stage; + + /* Create program and attach it to the linked shader */ + struct gl_program *gl_prog = + ctx->Driver.NewProgram(ctx, + _mesa_shader_stage_to_program(shader_list[0]->Stage), + prog->Name, false); + if (!gl_prog) { + prog->data->LinkStatus = false; + _mesa_delete_linked_shader(ctx, linked); return NULL; } - gl_shader *linked = ctx->Driver.NewShader(NULL, 0, main->Type); + _mesa_reference_shader_program_data(ctx, &gl_prog->sh.data, prog->data); + + /* Don't use _mesa_reference_program() just take ownership */ + linked->Program = gl_prog; + linked->ir = new(linked) exec_list; clone_ir_list(mem_ctx, linked->ir, main->ir); - link_fs_input_layout_qualifiers(prog, linked, shader_list, num_shaders); + link_fs_inout_layout_qualifiers(prog, linked, shader_list, num_shaders); link_tcs_out_layout_qualifiers(prog, linked, shader_list, num_shaders); link_tes_in_layout_qualifiers(prog, linked, shader_list, num_shaders); link_gs_inout_layout_qualifiers(prog, linked, shader_list, num_shaders); @@ -2253,60 +2237,27 @@ * copy of the original shader that contained the main function). */ ir_function_signature *const main_sig = - _mesa_get_main_function_signature(linked); + _mesa_get_main_function_signature(linked->symbols); /* Move any instructions other than variable declarations or function * declarations into main. */ - exec_node *insertion_point = - move_non_declarations(linked->ir, (exec_node *) &main_sig->body, false, - linked); - - for (unsigned i = 0; i < num_shaders; i++) { - if (shader_list[i] == main) - continue; - - insertion_point = move_non_declarations(shader_list[i]->ir, - insertion_point, true, linked); - } - - /* Check if any shader needs built-in functions. */ - bool need_builtins = false; - for (unsigned i = 0; i < num_shaders; i++) { - if (shader_list[i]->uses_builtin_functions) { - need_builtins = true; - break; - } - } + if (main_sig != NULL) { + exec_node *insertion_point = + move_non_declarations(linked->ir, (exec_node *) &main_sig->body, false, + linked); - bool ok; - if (need_builtins) { - /* Make a temporary array one larger than shader_list, which will hold - * the built-in function shader as well. - */ - gl_shader **linking_shaders = (gl_shader **) - calloc(num_shaders + 1, sizeof(gl_shader *)); - - ok = linking_shaders != NULL; - - if (ok) { - memcpy(linking_shaders, shader_list, num_shaders * sizeof(gl_shader *)); - _mesa_glsl_initialize_builtin_functions(); - linking_shaders[num_shaders] = _mesa_glsl_get_builtin_function_shader(); - - ok = link_function_calls(prog, linked, linking_shaders, num_shaders + 1); + for (unsigned i = 0; i < num_shaders; i++) { + if (shader_list[i] == main) + continue; - free(linking_shaders); - } else { - _mesa_error_no_memory(__func__); + insertion_point = move_non_declarations(shader_list[i]->ir, + insertion_point, true, linked); } - } else { - ok = link_function_calls(prog, linked, shader_list, num_shaders); } - - if (!ok) { - _mesa_delete_shader(ctx, linked); + if (!link_function_calls(prog, linked, shader_list, num_shaders)) { + _mesa_delete_linked_shader(ctx, linked); return NULL; } @@ -2319,32 +2270,31 @@ v.fixup_unnamed_interface_types(); /* Link up uniform blocks defined within this stage. */ - link_uniform_blocks(mem_ctx, ctx, prog, &linked, 1, - &ubo_blocks, &num_ubo_blocks, &ssbo_blocks, - &num_ssbo_blocks); + link_uniform_blocks(mem_ctx, ctx, prog, linked, &ubo_blocks, + &num_ubo_blocks, &ssbo_blocks, &num_ssbo_blocks); - if (!prog->LinkStatus) { - _mesa_delete_shader(ctx, linked); + if (!prog->data->LinkStatus) { + _mesa_delete_linked_shader(ctx, linked); return NULL; } /* Copy ubo blocks to linked shader list */ - linked->UniformBlocks = + linked->Program->sh.UniformBlocks = ralloc_array(linked, gl_uniform_block *, num_ubo_blocks); ralloc_steal(linked, ubo_blocks); for (unsigned i = 0; i < num_ubo_blocks; i++) { - linked->UniformBlocks[i] = &ubo_blocks[i]; + linked->Program->sh.UniformBlocks[i] = &ubo_blocks[i]; } - linked->NumUniformBlocks = num_ubo_blocks; + linked->Program->info.num_ubos = num_ubo_blocks; /* Copy ssbo blocks to linked shader list */ - linked->ShaderStorageBlocks = + linked->Program->sh.ShaderStorageBlocks = ralloc_array(linked, gl_uniform_block *, num_ssbo_blocks); ralloc_steal(linked, ssbo_blocks); for (unsigned i = 0; i < num_ssbo_blocks; i++) { - linked->ShaderStorageBlocks[i] = &ssbo_blocks[i]; + linked->Program->sh.ShaderStorageBlocks[i] = &ssbo_blocks[i]; } - linked->NumShaderStorageBlocks = num_ssbo_blocks; + linked->Program->info.num_ssbos = num_ssbo_blocks; /* At this point linked should contain all of the linked IR, so * validate it to make sure nothing went wrong. @@ -2353,8 +2303,9 @@ /* Set the size of geometry shader input arrays */ if (linked->Stage == MESA_SHADER_GEOMETRY) { - unsigned num_vertices = vertices_per_prim(prog->Geom.InputType); - geom_array_resize_visitor input_resize_visitor(num_vertices, prog); + unsigned num_vertices = vertices_per_prim(linked->info.Geom.InputType); + array_resize_visitor input_resize_visitor(num_vertices, prog, + MESA_SHADER_GEOMETRY); foreach_in_list(ir_instruction, ir, linked->ir) { ir->accept(&input_resize_visitor); } @@ -2363,13 +2314,15 @@ if (ctx->Const.VertexID_is_zero_based) lower_vertex_id(linked); - /* Validate correct usage of barrier() in the tess control shader */ - if (linked->Stage == MESA_SHADER_TESS_CTRL) { - barrier_use_visitor visitor(prog); - foreach_in_list(ir_instruction, ir, linked->ir) { - ir->accept(&visitor); - } +#ifdef DEBUG + /* Compute the source checksum. */ + linked->SourceChecksum = 0; + for (unsigned i = 0; i < num_shaders; i++) { + if (shader_list[i] == NULL) + continue; + linked->SourceChecksum ^= shader_list[i]->SourceChecksum; } +#endif return linked; } @@ -2393,68 +2346,74 @@ update_array_sizes(struct gl_shader_program *prog) { for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { - if (prog->_LinkedShaders[i] == NULL) - continue; + if (prog->_LinkedShaders[i] == NULL) + continue; + + bool types_were_updated = false; foreach_in_list(ir_instruction, node, prog->_LinkedShaders[i]->ir) { - ir_variable *const var = node->as_variable(); + ir_variable *const var = node->as_variable(); + + if ((var == NULL) || (var->data.mode != ir_var_uniform) || + !var->type->is_array()) + continue; - if ((var == NULL) || (var->data.mode != ir_var_uniform) || - !var->type->is_array()) - continue; - - /* GL_ARB_uniform_buffer_object says that std140 uniforms - * will not be eliminated. Since we always do std140, just - * don't resize arrays in UBOs. + /* GL_ARB_uniform_buffer_object says that std140 uniforms + * will not be eliminated. Since we always do std140, just + * don't resize arrays in UBOs. * * Atomic counters are supposed to get deterministic * locations assigned based on the declaration ordering and * sizes, array compaction would mess that up. * * Subroutine uniforms are not removed. - */ - if (var->is_in_buffer_block() || var->type->contains_atomic() || - var->type->contains_subroutine() || var->constant_initializer) - continue; - - int size = var->data.max_array_access; - for (unsigned j = 0; j < MESA_SHADER_STAGES; j++) { - if (prog->_LinkedShaders[j] == NULL) - continue; - - foreach_in_list(ir_instruction, node2, prog->_LinkedShaders[j]->ir) { - ir_variable *other_var = node2->as_variable(); - if (!other_var) - continue; - - if (strcmp(var->name, other_var->name) == 0 && - other_var->data.max_array_access > size) { - size = other_var->data.max_array_access; - } - } - } - - if (size + 1 != (int)var->type->length) { - /* If this is a built-in uniform (i.e., it's backed by some - * fixed-function state), adjust the number of state slots to - * match the new array size. The number of slots per array entry - * is not known. It seems safe to assume that the total number of - * slots is an integer multiple of the number of array elements. - * Determine the number of slots per array element by dividing by - * the old (total) size. - */ + */ + if (var->is_in_buffer_block() || var->type->contains_atomic() || + var->type->contains_subroutine() || var->constant_initializer) + continue; + + int size = var->data.max_array_access; + for (unsigned j = 0; j < MESA_SHADER_STAGES; j++) { + if (prog->_LinkedShaders[j] == NULL) + continue; + + foreach_in_list(ir_instruction, node2, prog->_LinkedShaders[j]->ir) { + ir_variable *other_var = node2->as_variable(); + if (!other_var) + continue; + + if (strcmp(var->name, other_var->name) == 0 && + other_var->data.max_array_access > size) { + size = other_var->data.max_array_access; + } + } + } + + if (size + 1 != (int)var->type->length) { + /* If this is a built-in uniform (i.e., it's backed by some + * fixed-function state), adjust the number of state slots to + * match the new array size. The number of slots per array entry + * is not known. It seems safe to assume that the total number of + * slots is an integer multiple of the number of array elements. + * Determine the number of slots per array element by dividing by + * the old (total) size. + */ const unsigned num_slots = var->get_num_state_slots(); - if (num_slots > 0) { - var->set_num_state_slots((size + 1) + if (num_slots > 0) { + var->set_num_state_slots((size + 1) * (num_slots / var->type->length)); - } + } + + var->type = glsl_type::get_array_instance(var->type->fields.array, + size + 1); + types_were_updated = true; + } + } - var->type = glsl_type::get_array_instance(var->type->fields.array, - size + 1); - /* FINISHME: We should update the types of array - * dereferences of this variable now. - */ - } + /* Update the types of dereferences in case we changed any. */ + if (types_were_updated) { + deref_type_updater v; + v.run(prog->_LinkedShaders[i]->ir); } } } @@ -2470,18 +2429,19 @@ if (prog->_LinkedShaders[MESA_SHADER_TESS_EVAL] == NULL) return; - gl_shader *const tcs = prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]; - gl_shader *const tes = prog->_LinkedShaders[MESA_SHADER_TESS_EVAL]; + gl_linked_shader *const tcs = prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]; + gl_linked_shader *const tes = prog->_LinkedShaders[MESA_SHADER_TESS_EVAL]; /* If no control shader is present, then the TES inputs are statically * sized to MaxPatchVertices; the actual size of the arrays won't be * known until draw time. */ const int num_vertices = tcs - ? tcs->TessCtrl.VerticesOut + ? tcs->info.TessCtrl.VerticesOut : ctx->Const.MaxPatchVertices; - tess_eval_array_resize_visitor input_resize_visitor(num_vertices, prog); + array_resize_visitor input_resize_visitor(num_vertices, prog, + MESA_SHADER_TESS_EVAL); foreach_in_list(ir_instruction, ir, tes->ir) { ir->accept(&input_resize_visitor); } @@ -2539,7 +2499,7 @@ for (int i = 0; i <= max_bit_to_test; i++) { if ((needed_mask & ~used_mask) == needed_mask) - return i; + return i; needed_mask <<= 1; } @@ -2551,6 +2511,7 @@ /** * Assign locations for either VS inputs or FS outputs * + * \param mem_ctx Temporary ralloc context used for linking * \param prog Shader program whose variables need locations assigned * \param constants Driver specific constant values for the program. * \param target_index Selector for the program target to receive location @@ -2562,7 +2523,8 @@ * error is emitted to the shader link log and false is returned. */ bool -assign_attribute_or_color_locations(gl_shader_program *prog, +assign_attribute_or_color_locations(void *mem_ctx, + gl_shader_program *prog, struct gl_constants *constants, unsigned target_index) { @@ -2581,9 +2543,9 @@ unsigned double_storage_locations = 0; assert((target_index == MESA_SHADER_VERTEX) - || (target_index == MESA_SHADER_FRAGMENT)); + || (target_index == MESA_SHADER_FRAGMENT)); - gl_shader *const sh = prog->_LinkedShaders[target_index]; + gl_linked_shader *const sh = prog->_LinkedShaders[target_index]; if (sh == NULL) return true; @@ -2620,11 +2582,11 @@ /* Used below in the call to qsort. */ static int compare(const void *a, const void *b) { - const temp_attr *const l = (const temp_attr *) a; - const temp_attr *const r = (const temp_attr *) b; + const temp_attr *const l = (const temp_attr *) a; + const temp_attr *const r = (const temp_attr *) b; - /* Reversed because we want a descending order sort below. */ - return r->slots - l->slots; + /* Reversed because we want a descending order sort below. */ + return r->slots - l->slots; } } to_assign[32]; assert(max_index <= 32); @@ -2640,43 +2602,61 @@ ir_variable *const var = node->as_variable(); if ((var == NULL) || (var->data.mode != (unsigned) direction)) - continue; + continue; if (var->data.explicit_location) { var->data.is_unmatched_generic_inout = 0; - if ((var->data.location >= (int)(max_index + generic_base)) - || (var->data.location < 0)) { - linker_error(prog, - "invalid explicit location %d specified for `%s'\n", - (var->data.location < 0) - ? var->data.location + if ((var->data.location >= (int)(max_index + generic_base)) + || (var->data.location < 0)) { + linker_error(prog, + "invalid explicit location %d specified for `%s'\n", + (var->data.location < 0) + ? var->data.location : var->data.location - generic_base, - var->name); - return false; - } + var->name); + return false; + } } else if (target_index == MESA_SHADER_VERTEX) { - unsigned binding; + unsigned binding; - if (prog->AttributeBindings->get(binding, var->name)) { - assert(binding >= VERT_ATTRIB_GENERIC0); - var->data.location = binding; + if (prog->AttributeBindings->get(binding, var->name)) { + assert(binding >= VERT_ATTRIB_GENERIC0); + var->data.location = binding; var->data.is_unmatched_generic_inout = 0; - } + } } else if (target_index == MESA_SHADER_FRAGMENT) { - unsigned binding; - unsigned index; + unsigned binding; + unsigned index; + const char *name = var->name; + const glsl_type *type = var->type; + + while (type) { + /* Check if there's a binding for the variable name */ + if (prog->FragDataBindings->get(binding, name)) { + assert(binding >= FRAG_RESULT_DATA0); + var->data.location = binding; + var->data.is_unmatched_generic_inout = 0; - if (prog->FragDataBindings->get(binding, var->name)) { - assert(binding >= FRAG_RESULT_DATA0); - var->data.location = binding; - var->data.is_unmatched_generic_inout = 0; + if (prog->FragDataIndexBindings->get(index, name)) { + var->data.index = index; + } + break; + } + + /* If not, but it's an array type, look for name[0] */ + if (type->is_array()) { + name = ralloc_asprintf(mem_ctx, "%s[0]", name); + type = type->fields.array; + continue; + } - if (prog->FragDataIndexBindings->get(index, var->name)) { - var->data.index = index; - } - } + break; + } } + if (strcmp(var->name, "gl_LastFragData") == 0) + continue; + /* From GL4.5 core spec, section 15.2 (Shader Execution): * * "Output binding assignments will cause LinkProgram to fail: @@ -2704,80 +2684,80 @@ * add it to the list of variables that need linker-assigned locations. */ if (var->data.location != -1) { - if (var->data.location >= generic_base && var->data.index < 1) { - /* From page 61 of the OpenGL 4.0 spec: - * - * "LinkProgram will fail if the attribute bindings assigned - * by BindAttribLocation do not leave not enough space to - * assign a location for an active matrix attribute or an - * active attribute array, both of which require multiple - * contiguous generic attributes." - * - * I think above text prohibits the aliasing of explicit and - * automatic assignments. But, aliasing is allowed in manual - * assignments of attribute locations. See below comments for - * the details. - * - * From OpenGL 4.0 spec, page 61: - * - * "It is possible for an application to bind more than one - * attribute name to the same location. This is referred to as - * aliasing. This will only work if only one of the aliased - * attributes is active in the executable program, or if no - * path through the shader consumes more than one attribute of - * a set of attributes aliased to the same location. A link - * error can occur if the linker determines that every path - * through the shader consumes multiple aliased attributes, - * but implementations are not required to generate an error - * in this case." - * - * From GLSL 4.30 spec, page 54: - * - * "A program will fail to link if any two non-vertex shader - * input variables are assigned to the same location. For - * vertex shaders, multiple input variables may be assigned - * to the same location using either layout qualifiers or via - * the OpenGL API. However, such aliasing is intended only to - * support vertex shaders where each execution path accesses - * at most one input per each location. Implementations are - * permitted, but not required, to generate link-time errors - * if they detect that every path through the vertex shader - * executable accesses multiple inputs assigned to any single - * location. For all shader types, a program will fail to link - * if explicit location assignments leave the linker unable - * to find space for other variables without explicit - * assignments." - * - * From OpenGL ES 3.0 spec, page 56: - * - * "Binding more than one attribute name to the same location - * is referred to as aliasing, and is not permitted in OpenGL - * ES Shading Language 3.00 vertex shaders. LinkProgram will - * fail when this condition exists. However, aliasing is - * possible in OpenGL ES Shading Language 1.00 vertex shaders. - * This will only work if only one of the aliased attributes - * is active in the executable program, or if no path through - * the shader consumes more than one attribute of a set of - * attributes aliased to the same location. A link error can - * occur if the linker determines that every path through the - * shader consumes multiple aliased attributes, but implemen- - * tations are not required to generate an error in this case." - * - * After looking at above references from OpenGL, OpenGL ES and - * GLSL specifications, we allow aliasing of vertex input variables - * in: OpenGL 2.0 (and above) and OpenGL ES 2.0. - * - * NOTE: This is not required by the spec but its worth mentioning - * here that we're not doing anything to make sure that no path - * through the vertex shader executable accesses multiple inputs - * assigned to any single location. - */ - - /* Mask representing the contiguous slots that will be used by - * this attribute. - */ - const unsigned attr = var->data.location - generic_base; - const unsigned use_mask = (1 << slots) - 1; + if (var->data.location >= generic_base && var->data.index < 1) { + /* From page 61 of the OpenGL 4.0 spec: + * + * "LinkProgram will fail if the attribute bindings assigned + * by BindAttribLocation do not leave not enough space to + * assign a location for an active matrix attribute or an + * active attribute array, both of which require multiple + * contiguous generic attributes." + * + * I think above text prohibits the aliasing of explicit and + * automatic assignments. But, aliasing is allowed in manual + * assignments of attribute locations. See below comments for + * the details. + * + * From OpenGL 4.0 spec, page 61: + * + * "It is possible for an application to bind more than one + * attribute name to the same location. This is referred to as + * aliasing. This will only work if only one of the aliased + * attributes is active in the executable program, or if no + * path through the shader consumes more than one attribute of + * a set of attributes aliased to the same location. A link + * error can occur if the linker determines that every path + * through the shader consumes multiple aliased attributes, + * but implementations are not required to generate an error + * in this case." + * + * From GLSL 4.30 spec, page 54: + * + * "A program will fail to link if any two non-vertex shader + * input variables are assigned to the same location. For + * vertex shaders, multiple input variables may be assigned + * to the same location using either layout qualifiers or via + * the OpenGL API. However, such aliasing is intended only to + * support vertex shaders where each execution path accesses + * at most one input per each location. Implementations are + * permitted, but not required, to generate link-time errors + * if they detect that every path through the vertex shader + * executable accesses multiple inputs assigned to any single + * location. For all shader types, a program will fail to link + * if explicit location assignments leave the linker unable + * to find space for other variables without explicit + * assignments." + * + * From OpenGL ES 3.0 spec, page 56: + * + * "Binding more than one attribute name to the same location + * is referred to as aliasing, and is not permitted in OpenGL + * ES Shading Language 3.00 vertex shaders. LinkProgram will + * fail when this condition exists. However, aliasing is + * possible in OpenGL ES Shading Language 1.00 vertex shaders. + * This will only work if only one of the aliased attributes + * is active in the executable program, or if no path through + * the shader consumes more than one attribute of a set of + * attributes aliased to the same location. A link error can + * occur if the linker determines that every path through the + * shader consumes multiple aliased attributes, but implemen- + * tations are not required to generate an error in this case." + * + * After looking at above references from OpenGL, OpenGL ES and + * GLSL specifications, we allow aliasing of vertex input variables + * in: OpenGL 2.0 (and above) and OpenGL ES 2.0. + * + * NOTE: This is not required by the spec but its worth mentioning + * here that we're not doing anything to make sure that no path + * through the vertex shader executable accesses multiple inputs + * assigned to any single location. + */ + + /* Mask representing the contiguous slots that will be used by + * this attribute. + */ + const unsigned attr = var->data.location - generic_base; + const unsigned use_mask = (1 << slots) - 1; const char *const string = (target_index == MESA_SHADER_VERTEX) ? "vertex shader input" : "fragment shader output"; @@ -2792,10 +2772,10 @@ return false; } - /* Generate a link error if the set of bits requested for this - * attribute overlaps any previously allocated bits. - */ - if ((~(use_mask << attr) & used_locations) != used_locations) { + /* Generate a link error if the set of bits requested for this + * attribute overlaps any previously allocated bits. + */ + if ((~(use_mask << attr) & used_locations) != used_locations) { if (target_index == MESA_SHADER_FRAGMENT && !prog->IsES) { /* From section 4.4.2 (Output Layout Qualifiers) of the GLSL * 4.40 spec: @@ -2809,9 +2789,9 @@ for (unsigned i = 0; i < assigned_attr; i++) { unsigned assigned_slots = assigned[i]->type->count_attribute_slots(false); - unsigned assig_attr = + unsigned assig_attr = assigned[i]->data.location - generic_base; - unsigned assigned_use_mask = (1 << assigned_slots) - 1; + unsigned assigned_use_mask = (1 << assigned_slots) - 1; if ((assigned_use_mask << assig_attr) & (use_mask << attr)) { @@ -2843,7 +2823,7 @@ } } } else if (target_index == MESA_SHADER_FRAGMENT || - (prog->IsES && prog->Version >= 300)) { + (prog->IsES && prog->data->Version >= 300)) { linker_error(prog, "overlapping location is assigned " "to %s `%s' %d %d %d\n", string, var->name, used_locations, use_mask, attr); @@ -2853,9 +2833,9 @@ "to %s `%s' %d %d %d\n", string, var->name, used_locations, use_mask, attr); } - } + } - used_locations |= (use_mask << attr); + used_locations |= (use_mask << attr); /* From the GL 4.5 core spec, section 11.1.1 (Vertex Attributes): * @@ -2877,14 +2857,14 @@ * issue (3) of the GL_ARB_vertex_attrib_64bit behavior, this * is optional behavior, but it seems preferable. */ - if (var->type->without_array()->is_dual_slot_double()) + if (var->type->without_array()->is_dual_slot()) double_storage_locations |= (use_mask << attr); - } + } assigned[assigned_attr] = var; assigned_attr++; - continue; + continue; } if (num_attr >= max_index) { @@ -2904,10 +2884,10 @@ _mesa_bitcount(used_locations & ((1 << max_index) - 1)) + _mesa_bitcount(double_storage_locations); if (total_attribs_size > max_index) { - linker_error(prog, - "attempt to use %d vertex attribute slots only %d available ", - total_attribs_size, max_index); - return false; + linker_error(prog, + "attempt to use %d vertex attribute slots only %d available ", + total_attribs_size, max_index); + return false; } } @@ -2928,7 +2908,7 @@ find_deref_visitor find("gl_Vertex"); find.run(sh->ir); if (find.variable_found()) - used_locations |= (1 << 0); + used_locations |= (1 << 0); } for (unsigned i = 0; i < num_attr; i++) { @@ -2940,21 +2920,21 @@ int location = find_available_slots(used_locations, to_assign[i].slots); if (location < 0) { - const char *const string = (target_index == MESA_SHADER_VERTEX) - ? "vertex shader input" : "fragment shader output"; + const char *const string = (target_index == MESA_SHADER_VERTEX) + ? "vertex shader input" : "fragment shader output"; - linker_error(prog, - "insufficient contiguous locations " - "available for %s `%s'\n", - string, to_assign[i].var->name); - return false; + linker_error(prog, + "insufficient contiguous locations " + "available for %s `%s'\n", + string, to_assign[i].var->name); + return false; } to_assign[i].var->data.location = generic_base + location; to_assign[i].var->data.is_unmatched_generic_inout = 0; used_locations |= (use_mask << location); - if (to_assign[i].var->type->without_array()->is_dual_slot_double()) + if (to_assign[i].var->type->without_array()->is_dual_slot()) double_storage_locations |= (use_mask << location); } @@ -2968,10 +2948,10 @@ _mesa_bitcount(used_locations & ((1 << max_index) - 1)) + _mesa_bitcount(double_storage_locations); if (total_attribs_size > max_index) { - linker_error(prog, - "attempt to use %d vertex attribute slots only %d available ", - total_attribs_size, max_index); - return false; + linker_error(prog, + "attempt to use %d vertex attribute slots only %d available ", + total_attribs_size, max_index); + return false; } } @@ -2983,8 +2963,8 @@ * unmatch flag if found so we don't optimise them away. */ static void -match_explicit_outputs_to_inputs(gl_shader *producer, - gl_shader *consumer) +match_explicit_outputs_to_inputs(gl_linked_shader *producer, + gl_linked_shader *consumer) { glsl_symbol_table parameters; ir_variable *explicit_locations[MAX_VARYINGS_INCL_PATCH][4] = @@ -3088,14 +3068,15 @@ unsigned total_shader_storage_blocks = 0; for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { - struct gl_shader *sh = prog->_LinkedShaders[i]; + struct gl_linked_shader *sh = prog->_LinkedShaders[i]; if (sh == NULL) - continue; + continue; - if (sh->num_samplers > ctx->Const.Program[i].MaxTextureImageUnits) { - linker_error(prog, "Too many %s shader texture samplers\n", - _mesa_shader_stage_to_string(i)); + if (sh->Program->info.num_textures > + ctx->Const.Program[i].MaxTextureImageUnits) { + linker_error(prog, "Too many %s shader texture samplers\n", + _mesa_shader_stage_to_string(i)); } if (sh->num_uniform_components > @@ -3104,17 +3085,17 @@ linker_warning(prog, "Too many %s shader default uniform block " "components, but the driver will try to optimize " "them out; this is non-portable out-of-spec " - "behavior\n", + "behavior\n", _mesa_shader_stage_to_string(i)); } else { linker_error(prog, "Too many %s shader default uniform block " - "components\n", + "components\n", _mesa_shader_stage_to_string(i)); } } if (sh->num_combined_uniform_components > - ctx->Const.Program[i].MaxCombinedUniformComponents) { + ctx->Const.Program[i].MaxCombinedUniformComponents) { if (ctx->Const.GLSLSkipStrictMaxUniformLimitCheck) { linker_warning(prog, "Too many %s shader uniform components, " "but the driver will try to optimize them out; " @@ -3126,23 +3107,23 @@ } } - total_shader_storage_blocks += sh->NumShaderStorageBlocks; - total_uniform_blocks += sh->NumUniformBlocks; + total_shader_storage_blocks += sh->Program->info.num_ssbos; + total_uniform_blocks += sh->Program->info.num_ubos; const unsigned max_uniform_blocks = ctx->Const.Program[i].MaxUniformBlocks; - if (max_uniform_blocks < sh->NumUniformBlocks) { + if (max_uniform_blocks < sh->Program->info.num_ubos) { linker_error(prog, "Too many %s uniform blocks (%d/%d)\n", - _mesa_shader_stage_to_string(i), sh->NumUniformBlocks, - max_uniform_blocks); + _mesa_shader_stage_to_string(i), + sh->Program->info.num_ubos, max_uniform_blocks); } const unsigned max_shader_storage_blocks = ctx->Const.Program[i].MaxShaderStorageBlocks; - if (max_shader_storage_blocks < sh->NumShaderStorageBlocks) { + if (max_shader_storage_blocks < sh->Program->info.num_ssbos) { linker_error(prog, "Too many %s shader storage blocks (%d/%d)\n", _mesa_shader_stage_to_string(i), - sh->NumShaderStorageBlocks, max_shader_storage_blocks); + sh->Program->info.num_ssbos, max_shader_storage_blocks); } } @@ -3157,22 +3138,22 @@ ctx->Const.MaxCombinedShaderStorageBlocks); } - for (unsigned i = 0; i < prog->NumUniformBlocks; i++) { - if (prog->UniformBlocks[i].UniformBufferSize > + for (unsigned i = 0; i < prog->data->NumUniformBlocks; i++) { + if (prog->data->UniformBlocks[i].UniformBufferSize > ctx->Const.MaxUniformBlockSize) { linker_error(prog, "Uniform block %s too big (%d/%d)\n", - prog->UniformBlocks[i].Name, - prog->UniformBlocks[i].UniformBufferSize, + prog->data->UniformBlocks[i].Name, + prog->data->UniformBlocks[i].UniformBufferSize, ctx->Const.MaxUniformBlockSize); } } - for (unsigned i = 0; i < prog->NumShaderStorageBlocks; i++) { - if (prog->ShaderStorageBlocks[i].UniformBufferSize > + for (unsigned i = 0; i < prog->data->NumShaderStorageBlocks; i++) { + if (prog->data->ShaderStorageBlocks[i].UniformBufferSize > ctx->Const.MaxShaderStorageBlockSize) { linker_error(prog, "Shader storage block %s too big (%d/%d)\n", - prog->ShaderStorageBlocks[i].Name, - prog->ShaderStorageBlocks[i].UniformBufferSize, + prog->data->ShaderStorageBlocks[i].Name, + prog->data->ShaderStorageBlocks[i].UniformBufferSize, ctx->Const.MaxShaderStorageBlockSize); } } @@ -3181,29 +3162,27 @@ static void link_calculate_subroutine_compat(struct gl_shader_program *prog) { - for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { - struct gl_shader *sh = prog->_LinkedShaders[i]; - int count; - if (!sh) - continue; + unsigned mask = prog->data->linked_stages; + while (mask) { + const int i = u_bit_scan(&mask); + struct gl_program *p = prog->_LinkedShaders[i]->Program; - for (unsigned j = 0; j < sh->NumSubroutineUniformRemapTable; j++) { - if (sh->SubroutineUniformRemapTable[j] == INACTIVE_UNIFORM_EXPLICIT_LOCATION) + for (unsigned j = 0; j < p->sh.NumSubroutineUniformRemapTable; j++) { + if (p->sh.SubroutineUniformRemapTable[j] == INACTIVE_UNIFORM_EXPLICIT_LOCATION) continue; - struct gl_uniform_storage *uni = sh->SubroutineUniformRemapTable[j]; + struct gl_uniform_storage *uni = p->sh.SubroutineUniformRemapTable[j]; if (!uni) continue; - sh->NumSubroutineUniforms++; - count = 0; - if (sh->NumSubroutineFunctions == 0) { + int count = 0; + if (p->sh.NumSubroutineFunctions == 0) { linker_error(prog, "subroutine uniform %s defined but no valid functions found\n", uni->type->name); continue; } - for (unsigned f = 0; f < sh->NumSubroutineFunctions; f++) { - struct gl_subroutine_function *fn = &sh->SubroutineFunctions[f]; + for (unsigned f = 0; f < p->sh.NumSubroutineFunctions; f++) { + struct gl_subroutine_function *fn = &p->sh.SubroutineFunctions[f]; for (int k = 0; k < fn->num_compat_types; k++) { if (fn->types[k] == uni->type) { count++; @@ -3219,13 +3198,14 @@ static void check_subroutine_resources(struct gl_shader_program *prog) { - for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { - struct gl_shader *sh = prog->_LinkedShaders[i]; - - if (sh) { - if (sh->NumSubroutineUniformRemapTable > MAX_SUBROUTINE_UNIFORM_LOCATIONS) - linker_error(prog, "Too many %s shader subroutine uniforms\n", - _mesa_shader_stage_to_string(i)); + unsigned mask = prog->data->linked_stages; + while (mask) { + const int i = u_bit_scan(&mask); + struct gl_program *p = prog->_LinkedShaders[i]->Program; + + if (p->sh.NumSubroutineUniformRemapTable > MAX_SUBROUTINE_UNIFORM_LOCATIONS) { + linker_error(prog, "Too many %s shader subroutine uniforms\n", + _mesa_shader_stage_to_string(i)); } } } @@ -3243,16 +3223,17 @@ return; for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { - struct gl_shader *sh = prog->_LinkedShaders[i]; + struct gl_linked_shader *sh = prog->_LinkedShaders[i]; if (sh) { - if (sh->NumImages > ctx->Const.Program[i].MaxImageUniforms) + if (sh->Program->info.num_images > ctx->Const.Program[i].MaxImageUniforms) linker_error(prog, "Too many %s shader image uniforms (%u > %u)\n", - _mesa_shader_stage_to_string(i), sh->NumImages, + _mesa_shader_stage_to_string(i), + sh->Program->info.num_images, ctx->Const.Program[i].MaxImageUniforms); - total_image_units += sh->NumImages; - total_shader_storage_blocks += sh->NumShaderStorageBlocks; + total_image_units += sh->Program->info.num_images; + total_shader_storage_blocks += sh->Program->info.num_ssbos; if (i == MESA_SHADER_FRAGMENT) { foreach_in_list(ir_instruction, node, sh->ir) { @@ -3347,36 +3328,36 @@ static bool reserve_subroutine_explicit_locations(struct gl_shader_program *prog, - struct gl_shader *sh, + struct gl_program *p, ir_variable *var) { unsigned slots = var->type->uniform_locations(); unsigned max_loc = var->data.location + slots - 1; /* Resize remap table if locations do not fit in the current one. */ - if (max_loc + 1 > sh->NumSubroutineUniformRemapTable) { - sh->SubroutineUniformRemapTable = - reralloc(sh, sh->SubroutineUniformRemapTable, + if (max_loc + 1 > p->sh.NumSubroutineUniformRemapTable) { + p->sh.SubroutineUniformRemapTable = + reralloc(p, p->sh.SubroutineUniformRemapTable, gl_uniform_storage *, max_loc + 1); - if (!sh->SubroutineUniformRemapTable) { + if (!p->sh.SubroutineUniformRemapTable) { linker_error(prog, "Out of memory during linking.\n"); return false; } /* Initialize allocated space. */ - for (unsigned i = sh->NumSubroutineUniformRemapTable; i < max_loc + 1; i++) - sh->SubroutineUniformRemapTable[i] = NULL; + for (unsigned i = p->sh.NumSubroutineUniformRemapTable; i < max_loc + 1; i++) + p->sh.SubroutineUniformRemapTable[i] = NULL; - sh->NumSubroutineUniformRemapTable = max_loc + 1; + p->sh.NumSubroutineUniformRemapTable = max_loc + 1; } for (unsigned i = 0; i < slots; i++) { unsigned loc = var->data.location + i; /* Check if location is already used. */ - if (sh->SubroutineUniformRemapTable[loc] == INACTIVE_UNIFORM_EXPLICIT_LOCATION) { + if (p->sh.SubroutineUniformRemapTable[loc] == INACTIVE_UNIFORM_EXPLICIT_LOCATION) { /* ARB_explicit_uniform_location specification states: * "No two subroutine uniform variables can have the same location @@ -3393,7 +3374,7 @@ /* Initialize location as inactive before optimization * rounds and location assignment. */ - sh->SubroutineUniformRemapTable[loc] = INACTIVE_UNIFORM_EXPLICIT_LOCATION; + p->sh.SubroutineUniformRemapTable[loc] = INACTIVE_UNIFORM_EXPLICIT_LOCATION; } return true; @@ -3421,13 +3402,12 @@ } unsigned entries_total = 0; - for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { - struct gl_shader *sh = prog->_LinkedShaders[i]; - - if (!sh) - continue; + unsigned mask = prog->data->linked_stages; + while (mask) { + const int i = u_bit_scan(&mask); + struct gl_program *p = prog->_LinkedShaders[i]->Program; - foreach_in_list(ir_instruction, node, sh->ir) { + foreach_in_list(ir_instruction, node, prog->_LinkedShaders[i]->ir) { ir_variable *var = node->as_variable(); if (!var || var->data.mode != ir_var_uniform) continue; @@ -3435,7 +3415,7 @@ if (var->data.explicit_location) { bool ret = false; if (var->type->without_array()->is_subroutine()) - ret = reserve_subroutine_explicit_locations(prog, sh, var); + ret = reserve_subroutine_explicit_locations(prog, p, var); else { int slots = reserve_explicit_locations(prog, uniform_map, var); @@ -3488,8 +3468,8 @@ if (type != GL_BUFFER_VARIABLE) return true; - for (unsigned i = 0; i < shProg->NumShaderStorageBlocks; i++) { - const char *block_name = shProg->ShaderStorageBlocks[i].Name; + for (unsigned i = 0; i < shProg->data->NumShaderStorageBlocks; i++) { + const char *block_name = shProg->data->ShaderStorageBlocks[i].Name; block_name_len = strlen(block_name); const char *block_square_bracket = strchr(block_name, '['); @@ -3550,15 +3530,15 @@ } static bool -add_program_resource(struct gl_shader_program *prog, GLenum type, - const void *data, uint8_t stages) +add_program_resource(struct gl_shader_program *prog, + struct set *resource_set, + GLenum type, const void *data, uint8_t stages) { assert(data); /* If resource already exists, do not add it again. */ - for (unsigned i = 0; i < prog->NumProgramResourceList; i++) - if (prog->ProgramResourceList[i].Data == data) - return true; + if (_mesa_set_search(resource_set, data)) + return true; prog->ProgramResourceList = reralloc(prog, @@ -3580,6 +3560,8 @@ prog->NumProgramResourceList++; + _mesa_set_add(resource_set, data); + return true; } @@ -3627,7 +3609,7 @@ assert(MESA_SHADER_STAGES < 8); for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { - struct gl_shader *sh = shProg->_LinkedShaders[i]; + struct gl_linked_shader *sh = shProg->_LinkedShaders[i]; if (!sh) continue; @@ -3674,6 +3656,7 @@ create_shader_variable(struct gl_shader_program *shProg, const ir_variable *in, const char *name, const glsl_type *type, + const glsl_type *interface_type, bool use_implicit_location, int location, const glsl_type *outermost_struct_type) { @@ -3731,7 +3714,7 @@ out->type = type; out->outermost_struct_type = outermost_struct_type; - out->interface_type = in->get_interface_type(); + out->interface_type = interface_type; out->component = in->data.location_frac; out->index = in->data.index; out->patch = in->data.patch; @@ -3743,16 +3726,85 @@ return out; } +static const glsl_type * +resize_to_max_patch_vertices(const struct gl_context *ctx, + const glsl_type *type) +{ + if (!type) + return NULL; + + return glsl_type::get_array_instance(type->fields.array, + ctx->Const.MaxPatchVertices); +} + static bool -add_shader_variable(struct gl_shader_program *shProg, unsigned stage_mask, +add_shader_variable(const struct gl_context *ctx, + struct gl_shader_program *shProg, + struct set *resource_set, + unsigned stage_mask, GLenum programInterface, ir_variable *var, const char *name, const glsl_type *type, bool use_implicit_location, int location, const glsl_type *outermost_struct_type = NULL) { - const bool is_vertex_input = - programInterface == GL_PROGRAM_INPUT && - stage_mask == MESA_SHADER_VERTEX; + const glsl_type *interface_type = var->get_interface_type(); + + if (outermost_struct_type == NULL) { + /* Unsized (non-patch) TCS output/TES input arrays are implicitly + * sized to gl_MaxPatchVertices. Internally, we shrink them to a + * smaller size. + * + * This can cause trouble with SSO programs. Since the TCS declares + * the number of output vertices, we can always shrink TCS output + * arrays. However, the TES might not be linked with a TCS, in + * which case it won't know the size of the patch. In other words, + * the TCS and TES may disagree on the (smaller) array sizes. This + * can result in the resource names differing across stages, causing + * SSO validation failures and other cascading issues. + * + * Expanding the array size to the full gl_MaxPatchVertices fixes + * these issues. It's also what program interface queries expect, + * as that is the official size of the array. + */ + if (var->data.tess_varying_implicit_sized_array) { + type = resize_to_max_patch_vertices(ctx, type); + interface_type = resize_to_max_patch_vertices(ctx, interface_type); + } + + if (var->data.from_named_ifc_block) { + const char *interface_name = interface_type->name; + + if (interface_type->is_array()) { + /* Issue #16 of the ARB_program_interface_query spec says: + * + * "* If a variable is a member of an interface block without an + * instance name, it is enumerated using just the variable name. + * + * * If a variable is a member of an interface block with an + * instance name, it is enumerated as "BlockName.Member", where + * "BlockName" is the name of the interface block (not the + * instance name) and "Member" is the name of the variable." + * + * In particular, it indicates that it should be "BlockName", + * not "BlockName[array length]". The conformance suite and + * dEQP both require this behavior. + * + * Here, we unwrap the extra array level added by named interface + * block array lowering so we have the correct variable type. We + * also unwrap the interface type when constructing the name. + * + * We leave interface_type the same so that ES 3.x SSO pipeline + * validation can enforce the rules requiring array length to + * match on interface blocks. + */ + type = type->fields.array; + + interface_name = interface_type->fields.array->name; + } + + name = ralloc_asprintf(shProg, "%s.%s", interface_name, name); + } + } switch (type->base_type) { case GLSL_TYPE_STRUCT: { @@ -3772,35 +3824,19 @@ for (unsigned i = 0; i < type->length; i++) { const struct glsl_struct_field *field = &type->fields.structure[i]; char *field_name = ralloc_asprintf(shProg, "%s.%s", name, field->name); - if (!add_shader_variable(shProg, stage_mask, programInterface, + if (!add_shader_variable(ctx, shProg, resource_set, + stage_mask, programInterface, var, field_name, field->type, use_implicit_location, field_location, outermost_struct_type)) return false; - field_location += - field->type->count_attribute_slots(is_vertex_input); + field_location += field->type->count_attribute_slots(false); } return true; } default: { - /* Issue #16 of the ARB_program_interface_query spec says: - * - * "* If a variable is a member of an interface block without an - * instance name, it is enumerated using just the variable name. - * - * * If a variable is a member of an interface block with an instance - * name, it is enumerated as "BlockName.Member", where "BlockName" is - * the name of the interface block (not the instance name) and - * "Member" is the name of the variable." - */ - const char *prefixed_name = (var->data.from_named_ifc_block && - !is_gl_identifier(var->name)) - ? ralloc_asprintf(shProg, "%s.%s", var->get_interface_type()->name, - name) - : name; - /* The ARB_program_interface_query spec says: * * "For an active variable declared as a single instance of a basic @@ -3808,19 +3844,22 @@ * from the shader source." */ gl_shader_variable *sha_v = - create_shader_variable(shProg, var, prefixed_name, type, + create_shader_variable(shProg, var, name, type, interface_type, use_implicit_location, location, outermost_struct_type); if (!sha_v) return false; - return add_program_resource(shProg, programInterface, sha_v, stage_mask); + return add_program_resource(shProg, resource_set, + programInterface, sha_v, stage_mask); } } } static bool -add_interface_variables(struct gl_shader_program *shProg, +add_interface_variables(const struct gl_context *ctx, + struct gl_shader_program *shProg, + struct set *resource_set, unsigned stage, GLenum programInterface) { exec_list *ir = shProg->_LinkedShaders[stage]->ir; @@ -3870,7 +3909,8 @@ (stage == MESA_SHADER_VERTEX && var->data.mode == ir_var_shader_in) || (stage == MESA_SHADER_FRAGMENT && var->data.mode == ir_var_shader_out); - if (!add_shader_variable(shProg, 1 << stage, programInterface, + if (!add_shader_variable(ctx, shProg, resource_set, + 1 << stage, programInterface, var, var->name, var->type, vs_input_or_fs_output, var->data.location - loc_bias)) return false; @@ -3879,9 +3919,12 @@ } static bool -add_packed_varyings(struct gl_shader_program *shProg, int stage, GLenum type) +add_packed_varyings(const struct gl_context *ctx, + struct gl_shader_program *shProg, + struct set *resource_set, + int stage, GLenum type) { - struct gl_shader *sh = shProg->_LinkedShaders[stage]; + struct gl_linked_shader *sh = shProg->_LinkedShaders[stage]; GLenum iface; if (!sh || !sh->packed_varyings) @@ -3904,7 +3947,8 @@ if (type == iface) { const int stage_mask = build_stageref(shProg, var->name, var->data.mode); - if (!add_shader_variable(shProg, stage_mask, + if (!add_shader_variable(ctx, shProg, resource_set, + stage_mask, iface, var, var->name, var->type, false, var->data.location - VARYING_SLOT_VAR0)) return false; @@ -3915,9 +3959,11 @@ } static bool -add_fragdata_arrays(struct gl_shader_program *shProg) +add_fragdata_arrays(const struct gl_context *ctx, + struct gl_shader_program *shProg, + struct set *resource_set) { - struct gl_shader *sh = shProg->_LinkedShaders[MESA_SHADER_FRAGMENT]; + struct gl_linked_shader *sh = shProg->_LinkedShaders[MESA_SHADER_FRAGMENT]; if (!sh || !sh->fragdata_arrays) return true; @@ -3927,7 +3973,7 @@ if (var) { assert(var->data.mode == ir_var_shader_out); - if (!add_shader_variable(shProg, + if (!add_shader_variable(ctx, shProg, resource_set, 1 << MESA_SHADER_FRAGMENT, GL_PROGRAM_OUTPUT, var, var->name, var->type, true, var->data.location - FRAG_RESULT_DATA0)) @@ -4093,8 +4139,8 @@ char *var_name = get_top_level_name(uni->name); char *interface_name = get_top_level_name(uni->is_shader_storage ? - shProg->ShaderStorageBlocks[block_index].Name : - shProg->UniformBlocks[block_index].Name); + shProg->data->ShaderStorageBlocks[block_index].Name : + shProg->data->UniformBlocks[block_index].Name); if (strcmp(var_name, interface_name) == 0) { /* Deal with instanced array of SSBOs */ @@ -4112,12 +4158,12 @@ } } - for (unsigned i = 0; i < shProg->NumShaders; i++) { - if (shProg->Shaders[i] == NULL) + for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { + const gl_linked_shader *sh = shProg->_LinkedShaders[i]; + if (sh == NULL) continue; - const gl_shader *stage = shProg->Shaders[i]; - foreach_in_list(ir_instruction, node, stage->ir) { + foreach_in_list(ir_instruction, node, sh->ir) { ir_variable *var = node->as_variable(); if (!var || !var->get_interface_type() || var->data.mode != ir_var_shader_storage) @@ -4180,130 +4226,145 @@ if (input_stage == MESA_SHADER_STAGES && output_stage == 0) return; + struct set *resource_set = _mesa_set_create(NULL, + _mesa_hash_pointer, + _mesa_key_pointer_equal); + /* Program interface needs to expose varyings in case of SSO. */ if (shProg->SeparateShader) { - if (!add_packed_varyings(shProg, input_stage, GL_PROGRAM_INPUT)) + if (!add_packed_varyings(ctx, shProg, resource_set, + input_stage, GL_PROGRAM_INPUT)) return; - if (!add_packed_varyings(shProg, output_stage, GL_PROGRAM_OUTPUT)) + if (!add_packed_varyings(ctx, shProg, resource_set, + output_stage, GL_PROGRAM_OUTPUT)) return; } - if (!add_fragdata_arrays(shProg)) + if (!add_fragdata_arrays(ctx, shProg, resource_set)) return; /* Add inputs and outputs to the resource list. */ - if (!add_interface_variables(shProg, input_stage, GL_PROGRAM_INPUT)) + if (!add_interface_variables(ctx, shProg, resource_set, + input_stage, GL_PROGRAM_INPUT)) return; - if (!add_interface_variables(shProg, output_stage, GL_PROGRAM_OUTPUT)) + if (!add_interface_variables(ctx, shProg, resource_set, + output_stage, GL_PROGRAM_OUTPUT)) return; + struct gl_transform_feedback_info *linked_xfb = + shProg->xfb_program->sh.LinkedTransformFeedback; + /* Add transform feedback varyings. */ - if (shProg->LinkedTransformFeedback.NumVarying > 0) { - for (int i = 0; i < shProg->LinkedTransformFeedback.NumVarying; i++) { - if (!add_program_resource(shProg, GL_TRANSFORM_FEEDBACK_VARYING, - &shProg->LinkedTransformFeedback.Varyings[i], - 0)) + if (linked_xfb->NumVarying > 0) { + for (int i = 0; i < linked_xfb->NumVarying; i++) { + if (!add_program_resource(shProg, resource_set, + GL_TRANSFORM_FEEDBACK_VARYING, + &linked_xfb->Varyings[i], 0)) return; } } /* Add transform feedback buffers. */ for (unsigned i = 0; i < ctx->Const.MaxTransformFeedbackBuffers; i++) { - if ((shProg->LinkedTransformFeedback.ActiveBuffers >> i) & 1) { - shProg->LinkedTransformFeedback.Buffers[i].Binding = i; - if (!add_program_resource(shProg, GL_TRANSFORM_FEEDBACK_BUFFER, - &shProg->LinkedTransformFeedback.Buffers[i], - 0)) + if ((linked_xfb->ActiveBuffers >> i) & 1) { + linked_xfb->Buffers[i].Binding = i; + if (!add_program_resource(shProg, resource_set, + GL_TRANSFORM_FEEDBACK_BUFFER, + &linked_xfb->Buffers[i], 0)) return; } } /* Add uniforms from uniform storage. */ - for (unsigned i = 0; i < shProg->NumUniformStorage; i++) { + for (unsigned i = 0; i < shProg->data->NumUniformStorage; i++) { /* Do not add uniforms internally used by Mesa. */ - if (shProg->UniformStorage[i].hidden) + if (shProg->data->UniformStorage[i].hidden) continue; uint8_t stageref = - build_stageref(shProg, shProg->UniformStorage[i].name, + build_stageref(shProg, shProg->data->UniformStorage[i].name, ir_var_uniform); /* Add stagereferences for uniforms in a uniform block. */ - bool is_shader_storage = shProg->UniformStorage[i].is_shader_storage; - int block_index = shProg->UniformStorage[i].block_index; + bool is_shader_storage = + shProg->data->UniformStorage[i].is_shader_storage; + int block_index = shProg->data->UniformStorage[i].block_index; if (block_index != -1) { stageref |= is_shader_storage ? - shProg->ShaderStorageBlocks[block_index].stageref : - shProg->UniformBlocks[block_index].stageref; + shProg->data->ShaderStorageBlocks[block_index].stageref : + shProg->data->UniformBlocks[block_index].stageref; } GLenum type = is_shader_storage ? GL_BUFFER_VARIABLE : GL_UNIFORM; if (!should_add_buffer_variable(shProg, type, - shProg->UniformStorage[i].name)) + shProg->data->UniformStorage[i].name)) continue; if (is_shader_storage) { - calculate_array_size_and_stride(shProg, &shProg->UniformStorage[i]); + calculate_array_size_and_stride(shProg, + &shProg->data->UniformStorage[i]); } - if (!add_program_resource(shProg, type, - &shProg->UniformStorage[i], stageref)) + if (!add_program_resource(shProg, resource_set, type, + &shProg->data->UniformStorage[i], stageref)) return; } /* Add program uniform blocks. */ - for (unsigned i = 0; i < shProg->NumUniformBlocks; i++) { - if (!add_program_resource(shProg, GL_UNIFORM_BLOCK, - &shProg->UniformBlocks[i], 0)) + for (unsigned i = 0; i < shProg->data->NumUniformBlocks; i++) { + if (!add_program_resource(shProg, resource_set, GL_UNIFORM_BLOCK, + &shProg->data->UniformBlocks[i], 0)) return; } /* Add program shader storage blocks. */ - for (unsigned i = 0; i < shProg->NumShaderStorageBlocks; i++) { - if (!add_program_resource(shProg, GL_SHADER_STORAGE_BLOCK, - &shProg->ShaderStorageBlocks[i], 0)) + for (unsigned i = 0; i < shProg->data->NumShaderStorageBlocks; i++) { + if (!add_program_resource(shProg, resource_set, GL_SHADER_STORAGE_BLOCK, + &shProg->data->ShaderStorageBlocks[i], 0)) return; } /* Add atomic counter buffers. */ - for (unsigned i = 0; i < shProg->NumAtomicBuffers; i++) { - if (!add_program_resource(shProg, GL_ATOMIC_COUNTER_BUFFER, - &shProg->AtomicBuffers[i], 0)) + for (unsigned i = 0; i < shProg->data->NumAtomicBuffers; i++) { + if (!add_program_resource(shProg, resource_set, GL_ATOMIC_COUNTER_BUFFER, + &shProg->data->AtomicBuffers[i], 0)) return; } - for (unsigned i = 0; i < shProg->NumUniformStorage; i++) { + for (unsigned i = 0; i < shProg->data->NumUniformStorage; i++) { GLenum type; - if (!shProg->UniformStorage[i].hidden) + if (!shProg->data->UniformStorage[i].hidden) continue; for (int j = MESA_SHADER_VERTEX; j < MESA_SHADER_STAGES; j++) { - if (!shProg->UniformStorage[i].opaque[j].active || - !shProg->UniformStorage[i].type->is_subroutine()) + if (!shProg->data->UniformStorage[i].opaque[j].active || + !shProg->data->UniformStorage[i].type->is_subroutine()) continue; type = _mesa_shader_stage_to_subroutine_uniform((gl_shader_stage)j); /* add shader subroutines */ - if (!add_program_resource(shProg, type, &shProg->UniformStorage[i], 0)) + if (!add_program_resource(shProg, resource_set, + type, &shProg->data->UniformStorage[i], 0)) return; } } - for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { - struct gl_shader *sh = shProg->_LinkedShaders[i]; - GLuint type; - - if (!sh) - continue; - - type = _mesa_shader_stage_to_subroutine((gl_shader_stage)i); - for (unsigned j = 0; j < sh->NumSubroutineFunctions; j++) { - if (!add_program_resource(shProg, type, &sh->SubroutineFunctions[j], 0)) + unsigned mask = shProg->data->linked_stages; + while (mask) { + const int i = u_bit_scan(&mask); + struct gl_program *p = shProg->_LinkedShaders[i]->Program; + + GLuint type = _mesa_shader_stage_to_subroutine((gl_shader_stage)i); + for (unsigned j = 0; j < p->sh.NumSubroutineFunctions; j++) { + if (!add_program_resource(shProg, resource_set, + type, &p->sh.SubroutineFunctions[j], 0)) return; } } + + _mesa_set_destroy(resource_set, NULL); } /** @@ -4318,7 +4379,7 @@ dynamic_sampler_array_indexing_visitor v; for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { if (prog->_LinkedShaders[i] == NULL) - continue; + continue; bool no_dynamic_indexing = ctx->Const.ShaderCompilerOptions[i].EmitNoIndirectSampler; @@ -4330,10 +4391,12 @@ "expressions is forbidden in GLSL %s %u"; /* Backend has indicated that it has no dynamic indexing support. */ if (no_dynamic_indexing) { - linker_error(prog, msg, prog->IsES ? "ES" : "", prog->Version); + linker_error(prog, msg, prog->IsES ? "ES" : "", + prog->data->Version); return false; } else { - linker_warning(prog, msg, prog->IsES ? "ES" : "", prog->Version); + linker_warning(prog, msg, prog->IsES ? "ES" : "", + prog->data->Version); } } } @@ -4343,37 +4406,36 @@ static void link_assign_subroutine_types(struct gl_shader_program *prog) { - for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { - gl_shader *sh = prog->_LinkedShaders[i]; - - if (sh == NULL) - continue; + unsigned mask = prog->data->linked_stages; + while (mask) { + const int i = u_bit_scan(&mask); + gl_program *p = prog->_LinkedShaders[i]->Program; - sh->MaxSubroutineFunctionIndex = 0; - foreach_in_list(ir_instruction, node, sh->ir) { + p->sh.MaxSubroutineFunctionIndex = 0; + foreach_in_list(ir_instruction, node, prog->_LinkedShaders[i]->ir) { ir_function *fn = node->as_function(); if (!fn) continue; if (fn->is_subroutine) - sh->NumSubroutineUniformTypes++; + p->sh.NumSubroutineUniformTypes++; if (!fn->num_subroutine_types) continue; - /* these should have been calculated earlier. */ - assert(fn->subroutine_index != -1); - if (sh->NumSubroutineFunctions + 1 > MAX_SUBROUTINES) { + /* these should have been calculated earlier. */ + assert(fn->subroutine_index != -1); + if (p->sh.NumSubroutineFunctions + 1 > MAX_SUBROUTINES) { linker_error(prog, "Too many subroutine functions declared.\n"); return; } - sh->SubroutineFunctions = reralloc(sh, sh->SubroutineFunctions, + p->sh.SubroutineFunctions = reralloc(p, p->sh.SubroutineFunctions, struct gl_subroutine_function, - sh->NumSubroutineFunctions + 1); - sh->SubroutineFunctions[sh->NumSubroutineFunctions].name = ralloc_strdup(sh, fn->name); - sh->SubroutineFunctions[sh->NumSubroutineFunctions].num_compat_types = fn->num_subroutine_types; - sh->SubroutineFunctions[sh->NumSubroutineFunctions].types = - ralloc_array(sh, const struct glsl_type *, + p->sh.NumSubroutineFunctions + 1); + p->sh.SubroutineFunctions[p->sh.NumSubroutineFunctions].name = ralloc_strdup(p, fn->name); + p->sh.SubroutineFunctions[p->sh.NumSubroutineFunctions].num_compat_types = fn->num_subroutine_types; + p->sh.SubroutineFunctions[p->sh.NumSubroutineFunctions].types = + ralloc_array(p, const struct glsl_type *, fn->num_subroutine_types); /* From Section 4.4.4(Subroutine Function Layout Qualifiers) of the @@ -4383,23 +4445,23 @@ * given a unique index, otherwise a compile or link error will be * generated." */ - for (unsigned j = 0; j < sh->NumSubroutineFunctions; j++) { - if (sh->SubroutineFunctions[j].index != -1 && - sh->SubroutineFunctions[j].index == fn->subroutine_index) { + for (unsigned j = 0; j < p->sh.NumSubroutineFunctions; j++) { + if (p->sh.SubroutineFunctions[j].index != -1 && + p->sh.SubroutineFunctions[j].index == fn->subroutine_index) { linker_error(prog, "each subroutine index qualifier in the " "shader must be unique\n"); return; } } - sh->SubroutineFunctions[sh->NumSubroutineFunctions].index = + p->sh.SubroutineFunctions[p->sh.NumSubroutineFunctions].index = fn->subroutine_index; - if (fn->subroutine_index > (int)sh->MaxSubroutineFunctionIndex) - sh->MaxSubroutineFunctionIndex = fn->subroutine_index; + if (fn->subroutine_index > (int)p->sh.MaxSubroutineFunctionIndex) + p->sh.MaxSubroutineFunctionIndex = fn->subroutine_index; for (int j = 0; j < fn->num_subroutine_types; j++) - sh->SubroutineFunctions[sh->NumSubroutineFunctions].types[j] = fn->subroutine_types[j]; - sh->NumSubroutineFunctions++; + p->sh.SubroutineFunctions[p->sh.NumSubroutineFunctions].types[j] = fn->subroutine_types[j]; + p->sh.NumSubroutineFunctions++; } } } @@ -4450,7 +4512,7 @@ return; for (unsigned stage = 0; stage < MESA_SHADER_STAGES; stage++) { - gl_shader *sh = prog->_LinkedShaders[stage]; + gl_linked_shader *sh = prog->_LinkedShaders[stage]; if (!sh) continue; @@ -4475,48 +4537,273 @@ } } -void -link_shaders(struct gl_context *ctx, struct gl_shader_program *prog) +static bool +link_varyings_and_uniforms(unsigned first, unsigned last, + unsigned num_explicit_uniform_locs, + struct gl_context *ctx, + struct gl_shader_program *prog, void *mem_ctx) { - prog->LinkStatus = true; /* All error paths will set this to false */ - prog->Validated = false; - prog->_Used = false; - - /* Section 7.3 (Program Objects) of the OpenGL 4.5 Core Profile spec says: - * - * "Linking can fail for a variety of reasons as specified in the - * OpenGL Shading Language Specification, as well as any of the - * following reasons: - * - * - No shader objects are attached to program." - * - * The Compatibility Profile specification does not list the error. In - * Compatibility Profile missing shader stages are replaced by - * fixed-function. This applies to the case where all stages are - * missing. - */ - if (prog->NumShaders == 0) { - if (ctx->API != API_OPENGL_COMPAT) - linker_error(prog, "no shaders attached to the program\n"); - return; - } - - unsigned num_tfeedback_decls = 0; - unsigned int num_explicit_uniform_locs = 0; bool has_xfb_qualifiers = false; + unsigned num_tfeedback_decls = 0; char **varying_names = NULL; tfeedback_decl *tfeedback_decls = NULL; - void *mem_ctx = ralloc_context(NULL); // temporary linker context + /* Mark all generic shader inputs and outputs as unpaired. */ + for (unsigned i = MESA_SHADER_VERTEX; i <= MESA_SHADER_FRAGMENT; i++) { + if (prog->_LinkedShaders[i] != NULL) { + link_invalidate_variable_locations(prog->_LinkedShaders[i]->ir); + } + } - prog->ARB_fragment_coord_conventions_enable = false; + unsigned prev = first; + for (unsigned i = prev + 1; i <= MESA_SHADER_FRAGMENT; i++) { + if (prog->_LinkedShaders[i] == NULL) + continue; - /* Separate the shaders into groups based on their type. - */ - struct gl_shader **shader_list[MESA_SHADER_STAGES]; - unsigned num_shaders[MESA_SHADER_STAGES]; + match_explicit_outputs_to_inputs(prog->_LinkedShaders[prev], + prog->_LinkedShaders[i]); + prev = i; + } - for (int i = 0; i < MESA_SHADER_STAGES; i++) { + if (!assign_attribute_or_color_locations(mem_ctx, prog, &ctx->Const, + MESA_SHADER_VERTEX)) { + return false; + } + + if (!assign_attribute_or_color_locations(mem_ctx, prog, &ctx->Const, + MESA_SHADER_FRAGMENT)) { + return false; + } + + /* From the ARB_enhanced_layouts spec: + * + * "If the shader used to record output variables for transform feedback + * varyings uses the "xfb_buffer", "xfb_offset", or "xfb_stride" layout + * qualifiers, the values specified by TransformFeedbackVaryings are + * ignored, and the set of variables captured for transform feedback is + * instead derived from the specified layout qualifiers." + */ + for (int i = MESA_SHADER_FRAGMENT - 1; i >= 0; i--) { + /* Find last stage before fragment shader */ + if (prog->_LinkedShaders[i]) { + has_xfb_qualifiers = + process_xfb_layout_qualifiers(mem_ctx, prog->_LinkedShaders[i], + &num_tfeedback_decls, + &varying_names); + break; + } + } + + if (!has_xfb_qualifiers) { + num_tfeedback_decls = prog->TransformFeedback.NumVarying; + varying_names = prog->TransformFeedback.VaryingNames; + } + + /* Find the program used for xfb. Even if we don't use xfb we still want to + * set this so we can fill the default values for program interface query. + */ + prog->xfb_program = prog->_LinkedShaders[last]->Program; + for (int i = MESA_SHADER_GEOMETRY; i >= MESA_SHADER_VERTEX; i--) { + if (prog->_LinkedShaders[i] == NULL) + continue; + + prog->xfb_program = prog->_LinkedShaders[i]->Program; + break; + } + + if (num_tfeedback_decls != 0) { + /* From GL_EXT_transform_feedback: + * A program will fail to link if: + * + * * the specified by TransformFeedbackVaryingsEXT is + * non-zero, but the program object has no vertex or geometry + * shader; + */ + if (first >= MESA_SHADER_FRAGMENT) { + linker_error(prog, "Transform feedback varyings specified, but " + "no vertex, tessellation, or geometry shader is " + "present.\n"); + return false; + } + + tfeedback_decls = rzalloc_array(mem_ctx, tfeedback_decl, + num_tfeedback_decls); + if (!parse_tfeedback_decls(ctx, prog, mem_ctx, num_tfeedback_decls, + varying_names, tfeedback_decls)) + return false; + } + + /* If there is no fragment shader we need to set transform feedback. + * + * For SSO we also need to assign output locations. We assign them here + * because we need to do it for both single stage programs and multi stage + * programs. + */ + if (last < MESA_SHADER_FRAGMENT && + (num_tfeedback_decls != 0 || prog->SeparateShader)) { + const uint64_t reserved_out_slots = + reserved_varying_slot(prog->_LinkedShaders[last], ir_var_shader_out); + if (!assign_varying_locations(ctx, mem_ctx, prog, + prog->_LinkedShaders[last], NULL, + num_tfeedback_decls, tfeedback_decls, + reserved_out_slots)) + return false; + } + + if (last <= MESA_SHADER_FRAGMENT) { + /* Remove unused varyings from the first/last stage unless SSO */ + remove_unused_shader_inputs_and_outputs(prog->SeparateShader, + prog->_LinkedShaders[first], + ir_var_shader_in); + remove_unused_shader_inputs_and_outputs(prog->SeparateShader, + prog->_LinkedShaders[last], + ir_var_shader_out); + + /* If the program is made up of only a single stage */ + if (first == last) { + gl_linked_shader *const sh = prog->_LinkedShaders[last]; + + do_dead_builtin_varyings(ctx, NULL, sh, 0, NULL); + do_dead_builtin_varyings(ctx, sh, NULL, num_tfeedback_decls, + tfeedback_decls); + + if (prog->SeparateShader) { + const uint64_t reserved_slots = + reserved_varying_slot(sh, ir_var_shader_in); + + /* Assign input locations for SSO, output locations are already + * assigned. + */ + if (!assign_varying_locations(ctx, mem_ctx, prog, + NULL /* producer */, + sh /* consumer */, + 0 /* num_tfeedback_decls */, + NULL /* tfeedback_decls */, + reserved_slots)) + return false; + } + } else { + /* Linking the stages in the opposite order (from fragment to vertex) + * ensures that inter-shader outputs written to in an earlier stage + * are eliminated if they are (transitively) not used in a later + * stage. + */ + int next = last; + for (int i = next - 1; i >= 0; i--) { + if (prog->_LinkedShaders[i] == NULL && i != 0) + continue; + + gl_linked_shader *const sh_i = prog->_LinkedShaders[i]; + gl_linked_shader *const sh_next = prog->_LinkedShaders[next]; + + const uint64_t reserved_out_slots = + reserved_varying_slot(sh_i, ir_var_shader_out); + const uint64_t reserved_in_slots = + reserved_varying_slot(sh_next, ir_var_shader_in); + + do_dead_builtin_varyings(ctx, sh_i, sh_next, + next == MESA_SHADER_FRAGMENT ? num_tfeedback_decls : 0, + tfeedback_decls); + + if (!assign_varying_locations(ctx, mem_ctx, prog, sh_i, sh_next, + next == MESA_SHADER_FRAGMENT ? num_tfeedback_decls : 0, + tfeedback_decls, + reserved_out_slots | reserved_in_slots)) + return false; + + /* This must be done after all dead varyings are eliminated. */ + if (sh_i != NULL) { + unsigned slots_used = _mesa_bitcount_64(reserved_out_slots); + if (!check_against_output_limit(ctx, prog, sh_i, slots_used)) { + return false; + } + } + + unsigned slots_used = _mesa_bitcount_64(reserved_in_slots); + if (!check_against_input_limit(ctx, prog, sh_next, slots_used)) + return false; + + next = i; + } + } + } + + if (!store_tfeedback_info(ctx, prog, num_tfeedback_decls, tfeedback_decls, + has_xfb_qualifiers)) + return false; + + update_array_sizes(prog); + link_assign_uniform_locations(prog, ctx, num_explicit_uniform_locs); + link_assign_atomic_counter_resources(ctx, prog); + + link_calculate_subroutine_compat(prog); + check_resources(ctx, prog); + check_subroutine_resources(prog); + check_image_resources(ctx, prog); + link_check_atomic_counter_resources(ctx, prog); + + if (!prog->data->LinkStatus) + return false; + + for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { + if (prog->_LinkedShaders[i] == NULL) + continue; + + const struct gl_shader_compiler_options *options = + &ctx->Const.ShaderCompilerOptions[i]; + + if (options->LowerBufferInterfaceBlocks) + lower_ubo_reference(prog->_LinkedShaders[i], + options->ClampBlockIndicesToArrayBounds); + + if (i == MESA_SHADER_COMPUTE) + lower_shared_reference(prog->_LinkedShaders[i], + &prog->Comp.SharedSize); + + lower_vector_derefs(prog->_LinkedShaders[i]); + do_vec_index_to_swizzle(prog->_LinkedShaders[i]->ir); + } + + return true; +} + +void +link_shaders(struct gl_context *ctx, struct gl_shader_program *prog) +{ + prog->data->LinkStatus = true; /* All error paths will set this to false */ + prog->data->Validated = false; + + /* Section 7.3 (Program Objects) of the OpenGL 4.5 Core Profile spec says: + * + * "Linking can fail for a variety of reasons as specified in the + * OpenGL Shading Language Specification, as well as any of the + * following reasons: + * + * - No shader objects are attached to program." + * + * The Compatibility Profile specification does not list the error. In + * Compatibility Profile missing shader stages are replaced by + * fixed-function. This applies to the case where all stages are + * missing. + */ + if (prog->NumShaders == 0) { + if (ctx->API != API_OPENGL_COMPAT) + linker_error(prog, "no shaders attached to the program\n"); + return; + } + + unsigned int num_explicit_uniform_locs = 0; + + void *mem_ctx = ralloc_context(NULL); // temporary linker context + + prog->ARB_fragment_coord_conventions_enable = false; + + /* Separate the shaders into groups based on their type. + */ + struct gl_shader **shader_list[MESA_SHADER_STAGES]; + unsigned num_shaders[MESA_SHADER_STAGES]; + + for (int i = 0; i < MESA_SHADER_STAGES; i++) { shader_list[i] = (struct gl_shader **) calloc(prog->NumShaders, sizeof(struct gl_shader *)); num_shaders[i] = 0; @@ -4529,12 +4816,12 @@ max_version = MAX2(max_version, prog->Shaders[i]->Version); if (prog->Shaders[i]->IsES != prog->Shaders[0]->IsES) { - linker_error(prog, "all shaders must use same shading " - "language version\n"); - goto done; + linker_error(prog, "all shaders must use same shading " + "language version\n"); + goto done; } - if (prog->Shaders[i]->ARB_fragment_coord_conventions_enable) { + if (prog->Shaders[i]->info.ARB_fragment_coord_conventions_enable) { prog->ARB_fragment_coord_conventions_enable = true; } @@ -4548,11 +4835,11 @@ */ if (prog->Shaders[0]->IsES && min_version != max_version) { linker_error(prog, "all shaders must use same shading " - "language version\n"); + "language version\n"); goto done; } - prog->Version = max_version; + prog->data->Version = max_version; prog->IsES = prog->Shaders[0]->IsES; /* Some shaders have to be linked with some other shaders present. @@ -4561,19 +4848,19 @@ if (num_shaders[MESA_SHADER_GEOMETRY] > 0 && num_shaders[MESA_SHADER_VERTEX] == 0) { linker_error(prog, "Geometry shader must be linked with " - "vertex shader\n"); + "vertex shader\n"); goto done; } if (num_shaders[MESA_SHADER_TESS_EVAL] > 0 && num_shaders[MESA_SHADER_VERTEX] == 0) { linker_error(prog, "Tessellation evaluation shader must be linked " - "with vertex shader\n"); + "with vertex shader\n"); goto done; } if (num_shaders[MESA_SHADER_TESS_CTRL] > 0 && num_shaders[MESA_SHADER_VERTEX] == 0) { linker_error(prog, "Tessellation control shader must be linked with " - "vertex shader\n"); + "vertex shader\n"); goto done; } @@ -4596,7 +4883,7 @@ if (num_shaders[MESA_SHADER_TESS_CTRL] > 0 && num_shaders[MESA_SHADER_TESS_EVAL] == 0) { linker_error(prog, "Tessellation control shader must be linked with " - "tessellation evaluation shader\n"); + "tessellation evaluation shader\n"); goto done; } } @@ -4608,24 +4895,17 @@ "type of shader\n"); } - for (unsigned int i = 0; i < MESA_SHADER_STAGES; i++) { - if (prog->_LinkedShaders[i] != NULL) - _mesa_delete_shader(ctx, prog->_LinkedShaders[i]); - - prog->_LinkedShaders[i] = NULL; - } - /* Link all shaders for a particular stage and validate the result. */ for (int stage = 0; stage < MESA_SHADER_STAGES; stage++) { if (num_shaders[stage] > 0) { - gl_shader *const sh = + gl_linked_shader *const sh = link_intrastage_shaders(mem_ctx, ctx, prog, shader_list[stage], - num_shaders[stage]); + num_shaders[stage], false); - if (!prog->LinkStatus) { + if (!prog->data->LinkStatus) { if (sh) - _mesa_delete_shader(ctx, sh); + _mesa_delete_linked_shader(ctx, sh); goto done; } @@ -4646,13 +4926,14 @@ validate_fragment_shader_executable(prog, sh); break; } - if (!prog->LinkStatus) { + if (!prog->data->LinkStatus) { if (sh) - _mesa_delete_shader(ctx, sh); + _mesa_delete_linked_shader(ctx, sh); goto done; } - _mesa_reference_shader(ctx, &prog->_LinkedShaders[stage], sh); + prog->_LinkedShaders[stage] = sh; + prog->data->linked_stages |= 1 << stage; } } @@ -4675,7 +4956,7 @@ * varyings. */ cross_validate_uniforms(prog); - if (!prog->LinkStatus) + if (!prog->data->LinkStatus) goto done; unsigned first, last, prev; @@ -4695,7 +4976,7 @@ num_explicit_uniform_locs = check_explicit_uniform_locations(ctx, prog); link_assign_subroutine_types(prog); - if (!prog->LinkStatus) + if (!prog->data->LinkStatus) goto done; resize_tes_inputs(ctx, prog); @@ -4710,22 +4991,21 @@ validate_interstage_inout_blocks(prog, prog->_LinkedShaders[prev], prog->_LinkedShaders[i]); - if (!prog->LinkStatus) + if (!prog->data->LinkStatus) goto done; cross_validate_outputs_to_inputs(prog, prog->_LinkedShaders[prev], prog->_LinkedShaders[i]); - if (!prog->LinkStatus) + if (!prog->data->LinkStatus) goto done; prev = i; } /* Cross-validate uniform blocks between shader stages */ - validate_interstage_uniform_blocks(prog, prog->_LinkedShaders, - MESA_SHADER_STAGES); - if (!prog->LinkStatus) + validate_interstage_uniform_blocks(prog, prog->_LinkedShaders); + if (!prog->data->LinkStatus) goto done; for (unsigned int i = 0; i < MESA_SHADER_STAGES; i++) { @@ -4740,9 +5020,9 @@ * This rule also applies to GLSL ES 3.00. */ if (max_version >= (prog->IsES ? 300 : 130)) { - struct gl_shader *sh = prog->_LinkedShaders[MESA_SHADER_FRAGMENT]; + struct gl_linked_shader *sh = prog->_LinkedShaders[MESA_SHADER_FRAGMENT]; if (sh) { - lower_discard_flow(sh->ir); + lower_discard_flow(sh->ir); } } @@ -4763,11 +5043,11 @@ */ for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { if (prog->_LinkedShaders[i] == NULL) - continue; + continue; detect_recursion_linked(prog, prog->_LinkedShaders[i]->ir); - if (!prog->LinkStatus) - goto done; + if (!prog->data->LinkStatus) + goto done; if (ctx->Const.ShaderCompilerOptions[i].LowerCombinedClipCullDistance) { lower_clip_cull_distance(prog, prog->_LinkedShaders[i]); @@ -4777,12 +5057,20 @@ lower_tess_level(prog->_LinkedShaders[i]); } - while (do_common_optimization(prog->_LinkedShaders[i]->ir, true, false, - &ctx->Const.ShaderCompilerOptions[i], - ctx->Const.NativeIntegers)) - ; + if (ctx->Const.GLSLOptimizeConservatively) { + /* Run it just once. */ + do_common_optimization(prog->_LinkedShaders[i]->ir, true, false, + &ctx->Const.ShaderCompilerOptions[i], + ctx->Const.NativeIntegers); + } else { + /* Repeat it until it stops making changes. */ + while (do_common_optimization(prog->_LinkedShaders[i]->ir, true, false, + &ctx->Const.ShaderCompilerOptions[i], + ctx->Const.NativeIntegers)) + ; + } - lower_const_arrays_to_uniforms(prog->_LinkedShaders[i]->ir); + lower_const_arrays_to_uniforms(prog->_LinkedShaders[i]->ir, i); propagate_invariance(prog->_LinkedShaders[i]->ir); } @@ -4790,8 +5078,8 @@ * with loop induction variable. This check emits a warning or error * depending if backend can handle dynamic indexing. */ - if ((!prog->IsES && prog->Version < 130) || - (prog->IsES && prog->Version < 300)) { + if ((!prog->IsES && prog->data->Version < 130) || + (prog->IsES && prog->data->Version < 300)) { if (!validate_sampler_array_indexing(ctx, prog)) goto done; } @@ -4799,176 +5087,10 @@ /* Check and validate stream emissions in geometry shaders */ validate_geometry_shader_emissions(ctx, prog); - /* Mark all generic shader inputs and outputs as unpaired. */ - for (unsigned i = MESA_SHADER_VERTEX; i <= MESA_SHADER_FRAGMENT; i++) { - if (prog->_LinkedShaders[i] != NULL) { - link_invalidate_variable_locations(prog->_LinkedShaders[i]->ir); - } - } - - prev = first; - for (unsigned i = prev + 1; i <= MESA_SHADER_FRAGMENT; i++) { - if (prog->_LinkedShaders[i] == NULL) - continue; - - match_explicit_outputs_to_inputs(prog->_LinkedShaders[prev], - prog->_LinkedShaders[i]); - prev = i; - } - - if (!assign_attribute_or_color_locations(prog, &ctx->Const, - MESA_SHADER_VERTEX)) { - goto done; - } - - if (!assign_attribute_or_color_locations(prog, &ctx->Const, - MESA_SHADER_FRAGMENT)) { - goto done; - } - - /* From the ARB_enhanced_layouts spec: - * - * "If the shader used to record output variables for transform feedback - * varyings uses the "xfb_buffer", "xfb_offset", or "xfb_stride" layout - * qualifiers, the values specified by TransformFeedbackVaryings are - * ignored, and the set of variables captured for transform feedback is - * instead derived from the specified layout qualifiers." - */ - for (int i = MESA_SHADER_FRAGMENT - 1; i >= 0; i--) { - /* Find last stage before fragment shader */ - if (prog->_LinkedShaders[i]) { - has_xfb_qualifiers = - process_xfb_layout_qualifiers(mem_ctx, prog->_LinkedShaders[i], - &num_tfeedback_decls, - &varying_names); - break; - } - } - - if (!has_xfb_qualifiers) { - num_tfeedback_decls = prog->TransformFeedback.NumVarying; - varying_names = prog->TransformFeedback.VaryingNames; - } - - if (num_tfeedback_decls != 0) { - /* From GL_EXT_transform_feedback: - * A program will fail to link if: - * - * * the specified by TransformFeedbackVaryingsEXT is - * non-zero, but the program object has no vertex or geometry - * shader; - */ - if (first >= MESA_SHADER_FRAGMENT) { - linker_error(prog, "Transform feedback varyings specified, but " - "no vertex, tessellation, or geometry shader is " - "present.\n"); - goto done; - } - - tfeedback_decls = ralloc_array(mem_ctx, tfeedback_decl, - num_tfeedback_decls); - if (!parse_tfeedback_decls(ctx, prog, mem_ctx, num_tfeedback_decls, - varying_names, tfeedback_decls)) - goto done; - } - - /* If there is no fragment shader we need to set transform feedback. - * - * For SSO we also need to assign output locations. We assign them here - * because we need to do it for both single stage programs and multi stage - * programs. - */ - if (last < MESA_SHADER_FRAGMENT && - (num_tfeedback_decls != 0 || prog->SeparateShader)) { - if (!assign_varying_locations(ctx, mem_ctx, prog, - prog->_LinkedShaders[last], NULL, - num_tfeedback_decls, tfeedback_decls)) - goto done; - } - - if (last <= MESA_SHADER_FRAGMENT) { - /* Remove unused varyings from the first/last stage unless SSO */ - remove_unused_shader_inputs_and_outputs(prog->SeparateShader, - prog->_LinkedShaders[first], - ir_var_shader_in); - remove_unused_shader_inputs_and_outputs(prog->SeparateShader, - prog->_LinkedShaders[last], - ir_var_shader_out); - - /* If the program is made up of only a single stage */ - if (first == last) { - - gl_shader *const sh = prog->_LinkedShaders[last]; - if (prog->SeparateShader) { - /* Assign input locations for SSO, output locations are already - * assigned. - */ - if (!assign_varying_locations(ctx, mem_ctx, prog, - NULL /* producer */, - sh /* consumer */, - 0 /* num_tfeedback_decls */, - NULL /* tfeedback_decls */)) - goto done; - } - - do_dead_builtin_varyings(ctx, NULL, sh, 0, NULL); - do_dead_builtin_varyings(ctx, sh, NULL, num_tfeedback_decls, - tfeedback_decls); - } else { - /* Linking the stages in the opposite order (from fragment to vertex) - * ensures that inter-shader outputs written to in an earlier stage - * are eliminated if they are (transitively) not used in a later - * stage. - */ - int next = last; - for (int i = next - 1; i >= 0; i--) { - if (prog->_LinkedShaders[i] == NULL && i != 0) - continue; - - gl_shader *const sh_i = prog->_LinkedShaders[i]; - gl_shader *const sh_next = prog->_LinkedShaders[next]; - - if (!assign_varying_locations(ctx, mem_ctx, prog, sh_i, sh_next, - next == MESA_SHADER_FRAGMENT ? num_tfeedback_decls : 0, - tfeedback_decls)) - goto done; - - do_dead_builtin_varyings(ctx, sh_i, sh_next, - next == MESA_SHADER_FRAGMENT ? num_tfeedback_decls : 0, - tfeedback_decls); - - /* This must be done after all dead varyings are eliminated. */ - if (sh_i != NULL) { - if (!check_against_output_limit(ctx, prog, sh_i)) { - goto done; - } - } - if (!check_against_input_limit(ctx, prog, sh_next)) - goto done; - - next = i; - } - } - } - - if (!store_tfeedback_info(ctx, prog, num_tfeedback_decls, tfeedback_decls, - has_xfb_qualifiers)) - goto done; - - update_array_sizes(prog); - link_assign_uniform_locations(prog, ctx->Const.UniformBooleanTrue, - num_explicit_uniform_locs, - ctx->Const.MaxUserAssignableUniformLocations); - link_assign_atomic_counter_resources(ctx, prog); store_fragdepth_layout(prog); - link_calculate_subroutine_compat(prog); - check_resources(ctx, prog); - check_subroutine_resources(prog); - check_image_resources(ctx, prog); - link_check_atomic_counter_resources(ctx, prog); - - if (!prog->LinkStatus) + if(!link_varyings_and_uniforms(first, last, num_explicit_uniform_locs, ctx, + prog, mem_ctx)) goto done; /* OpenGL ES < 3.1 requires that a vertex shader and a fragment shader both @@ -5000,36 +5122,17 @@ if (!prog->SeparateShader && ctx->API == API_OPENGLES2 && num_shaders[MESA_SHADER_COMPUTE] == 0) { if (prog->_LinkedShaders[MESA_SHADER_VERTEX] == NULL) { - linker_error(prog, "program lacks a vertex shader\n"); + linker_error(prog, "program lacks a vertex shader\n"); } else if (prog->_LinkedShaders[MESA_SHADER_FRAGMENT] == NULL) { - linker_error(prog, "program lacks a fragment shader\n"); + linker_error(prog, "program lacks a fragment shader\n"); } } - for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { - if (prog->_LinkedShaders[i] == NULL) - continue; - - const struct gl_shader_compiler_options *options = - &ctx->Const.ShaderCompilerOptions[i]; - - if (options->LowerBufferInterfaceBlocks) - lower_ubo_reference(prog->_LinkedShaders[i], - options->ClampBlockIndicesToArrayBounds); - - if (options->LowerShaderSharedVariables) - lower_shared_reference(prog->_LinkedShaders[i], - &prog->Comp.SharedSize); - - lower_vector_derefs(prog->_LinkedShaders[i]); - do_vec_index_to_swizzle(prog->_LinkedShaders[i]->ir); - } - done: for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { free(shader_list[i]); if (prog->_LinkedShaders[i] == NULL) - continue; + continue; /* Do a final validation step to make sure that the IR wasn't * invalidated by any modifications performed after intrastage linking. diff -Nru mesa-12.0.6/src/compiler/glsl/linker.h mesa-17.0.7/src/compiler/glsl/linker.h --- mesa-12.0.6/src/compiler/glsl/linker.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/linker.h 2017-06-01 10:37:10.000000000 +0000 @@ -27,17 +27,16 @@ #define GLSL_LINKER_H extern bool -link_function_calls(gl_shader_program *prog, gl_shader *main, - gl_shader **shader_list, unsigned num_shaders); +link_function_calls(gl_shader_program *prog, gl_linked_shader *main, + gl_shader **shader_list, unsigned num_shaders); extern void link_invalidate_variable_locations(exec_list *ir); extern void link_assign_uniform_locations(struct gl_shader_program *prog, - unsigned int boolean_true, - unsigned int num_explicit_uniform_locs, - unsigned int max_uniform_locs); + struct gl_context *ctx, + unsigned int num_explicit_uniform_locs); extern void link_set_uniform_initializers(struct gl_shader_program *prog, @@ -45,20 +44,15 @@ extern int link_cross_validate_uniform_block(void *mem_ctx, - struct gl_uniform_block **linked_blocks, - unsigned int *num_linked_blocks, - struct gl_uniform_block *new_block); - -extern bool -link_uniform_blocks_are_compatible(const gl_uniform_block *a, - const gl_uniform_block *b); + struct gl_uniform_block **linked_blocks, + unsigned int *num_linked_blocks, + struct gl_uniform_block *new_block); extern void link_uniform_blocks(void *mem_ctx, struct gl_context *ctx, struct gl_shader_program *prog, - struct gl_shader **shader_list, - unsigned num_shaders, + struct gl_linked_shader *shader, struct gl_uniform_block **ubo_blocks, unsigned *num_ubo_blocks, struct gl_uniform_block **ssbo_blocks, @@ -76,12 +70,12 @@ void validate_interstage_inout_blocks(struct gl_shader_program *prog, - const gl_shader *producer, - const gl_shader *consumer); + const gl_linked_shader *producer, + const gl_linked_shader *consumer); void validate_interstage_uniform_blocks(struct gl_shader_program *prog, - gl_shader **stages, int num_stages); + gl_linked_shader **stages); extern void link_assign_atomic_counter_resources(struct gl_context *ctx, @@ -91,6 +85,15 @@ link_check_atomic_counter_resources(struct gl_context *ctx, struct gl_shader_program *prog); + +extern struct gl_linked_shader * +link_intrastage_shaders(void *mem_ctx, + struct gl_context *ctx, + struct gl_shader_program *prog, + struct gl_shader **shader_list, + unsigned num_shaders, + bool allow_missing_main); + /** * Class for processing all of the leaf fields of a variable that corresponds * to a program resource. @@ -151,23 +154,11 @@ * \param last_field Set if \c name is the last field of the structure * containing it. This will always be false for items * not contained in a structure or interface block. - * - * The default implementation just calls the other \c visit_field method. */ virtual void visit_field(const glsl_type *type, const char *name, bool row_major, const glsl_type *record_type, - const unsigned packing, - bool last_field); - - /** - * Method invoked for each leaf of the variable - * - * \param type Type of the field. - * \param name Fully qualified name of the field. - * \param row_major For a matrix type, is it stored row-major. - */ - virtual void visit_field(const glsl_type *type, const char *name, - bool row_major) = 0; + const enum glsl_interface_packing packing, + bool last_field) = 0; /** * Visit a record before visiting its fields @@ -180,10 +171,10 @@ virtual void visit_field(const glsl_struct_field *field); virtual void enter_record(const glsl_type *type, const char *name, - bool row_major, const unsigned packing); + bool row_major, const enum glsl_interface_packing packing); virtual void leave_record(const glsl_type *type, const char *name, - bool row_major, const unsigned packing); + bool row_major, const enum glsl_interface_packing packing); virtual void set_buffer_offset(unsigned offset); @@ -199,7 +190,7 @@ */ void recursion(const glsl_type *t, char **name, size_t name_length, bool row_major, const glsl_type *record_type, - const unsigned packing, + const enum glsl_interface_packing packing, bool last_field, unsigned record_array_count, const glsl_struct_field *named_ifc_member); }; diff -Nru mesa-12.0.6/src/compiler/glsl/link_functions.cpp mesa-17.0.7/src/compiler/glsl/link_functions.cpp --- mesa-12.0.6/src/compiler/glsl/link_functions.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/link_functions.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -26,19 +26,19 @@ #include "glsl_parser_extras.h" #include "ir.h" #include "program.h" -#include "program/hash_table.h" +#include "util/set.h" +#include "util/hash_table.h" #include "linker.h" static ir_function_signature * find_matching_signature(const char *name, const exec_list *actual_parameters, - gl_shader **shader_list, unsigned num_shaders, - bool use_builtin); + glsl_symbol_table *symbols); namespace { class call_link_visitor : public ir_hierarchical_visitor { public: - call_link_visitor(gl_shader_program *prog, gl_shader *linked, + call_link_visitor(gl_shader_program *prog, gl_linked_shader *linked, gl_shader **shader_list, unsigned num_shaders) { this->prog = prog; @@ -47,18 +47,18 @@ this->success = true; this->linked = linked; - this->locals = hash_table_ctor(0, hash_table_pointer_hash, - hash_table_pointer_compare); + this->locals = _mesa_set_create(NULL, _mesa_hash_pointer, + _mesa_key_pointer_equal); } ~call_link_visitor() { - hash_table_dtor(this->locals); + _mesa_set_destroy(this->locals, NULL); } virtual ir_visitor_status visit(ir_variable *ir) { - hash_table_insert(locals, ir, ir); + _mesa_set_add(locals, ir); return visit_continue; } @@ -74,12 +74,15 @@ assert(callee != NULL); const char *const name = callee->function_name(); + /* We don't actually need to find intrinsics; they're not real */ + if (callee->is_intrinsic()) + return visit_continue; + /* Determine if the requested function signature already exists in the * final linked shader. If it does, use it as the target of the call. */ ir_function_signature *sig = - find_matching_signature(name, &callee->parameters, &linked, 1, - ir->use_builtin); + find_matching_signature(name, &callee->parameters, linked->symbols); if (sig != NULL) { ir->callee = sig; return visit_continue; @@ -88,8 +91,13 @@ /* Try to find the signature in one of the other shaders that is being * linked. If it's not found there, return an error. */ - sig = find_matching_signature(name, &ir->actual_parameters, shader_list, - num_shaders, ir->use_builtin); + for (unsigned i = 0; i < num_shaders; i++) { + sig = find_matching_signature(name, &ir->actual_parameters, + shader_list[i]->symbols); + if (sig) + break; + } + if (sig == NULL) { /* FINISHME: Log the full signature of unresolved function. */ @@ -116,9 +124,7 @@ ir_function_signature *linked_sig = f->exact_matching_signature(NULL, &callee->parameters); - if ((linked_sig == NULL) - || ((linked_sig != NULL) - && (linked_sig->is_builtin() != ir->use_builtin))) { + if (linked_sig == NULL) { linked_sig = new(linked) ir_function_signature(callee->return_type); f->add_signature(linked_sig); } @@ -142,19 +148,20 @@ * replace signature stored in a function. One could easily be added, * but this avoids the need. */ - struct hash_table *ht = hash_table_ctor(0, hash_table_pointer_hash, - hash_table_pointer_compare); + struct hash_table *ht = _mesa_hash_table_create(NULL, _mesa_hash_pointer, + _mesa_key_pointer_equal); + exec_list formal_parameters; foreach_in_list(const ir_instruction, original, &sig->parameters) { - assert(const_cast(original)->as_variable()); + assert(const_cast(original)->as_variable()); - ir_instruction *copy = original->clone(linked, ht); - formal_parameters.push_tail(copy); + ir_instruction *copy = original->clone(linked, ht); + formal_parameters.push_tail(copy); } linked_sig->replace_parameters(&formal_parameters); - linked_sig->is_intrinsic = sig->is_intrinsic; + linked_sig->intrinsic_id = sig->intrinsic_id; if (sig->is_defined) { foreach_in_list(const ir_instruction, original, &sig->body) { @@ -165,7 +172,7 @@ linked_sig->is_defined = true; } - hash_table_dtor(ht); + _mesa_hash_table_destroy(ht, NULL); /* Patch references inside the function to things outside the function * (i.e., function calls and global variables). @@ -212,7 +219,7 @@ virtual ir_visitor_status visit(ir_dereference_variable *ir) { - if (hash_table_find(locals, ir->var) == NULL) { + if (_mesa_set_search(locals, ir->var) == NULL) { /* The non-function variable must be a global, so try to find the * variable in the shader's symbol table. If the variable is not * found, then it's a global that *MUST* be defined in the original @@ -292,12 +299,12 @@ * linked shader that are accessed by the function. It is also used to add * global variables from the shader where the function originated. */ - gl_shader *linked; + gl_linked_shader *linked; /** * Table of variables local to the function. */ - hash_table *locals; + set *locals; }; } /* anonymous namespace */ @@ -307,30 +314,16 @@ */ ir_function_signature * find_matching_signature(const char *name, const exec_list *actual_parameters, - gl_shader **shader_list, unsigned num_shaders, - bool use_builtin) + glsl_symbol_table *symbols) { - for (unsigned i = 0; i < num_shaders; i++) { - ir_function *const f = shader_list[i]->symbols->get_function(name); - - if (f == NULL) - continue; + ir_function *const f = symbols->get_function(name); + if (f) { ir_function_signature *sig = - f->matching_signature(NULL, actual_parameters, use_builtin); - - if ((sig == NULL) || - (!sig->is_defined && !sig->is_intrinsic)) - continue; - - /* If this function expects to bind to a built-in function and the - * signature that we found isn't a built-in, keep looking. Also keep - * looking if we expect a non-built-in but found a built-in. - */ - if (use_builtin != sig->is_builtin()) - continue; + f->matching_signature(NULL, actual_parameters, false); - return sig; + if (sig && (sig->is_defined || sig->is_intrinsic())) + return sig; } return NULL; @@ -338,7 +331,7 @@ bool -link_function_calls(gl_shader_program *prog, gl_shader *main, +link_function_calls(gl_shader_program *prog, gl_linked_shader *main, gl_shader **shader_list, unsigned num_shaders) { call_link_visitor v(prog, main, shader_list, num_shaders); diff -Nru mesa-12.0.6/src/compiler/glsl/link_interface_blocks.cpp mesa-17.0.7/src/compiler/glsl/link_interface_blocks.cpp --- mesa-12.0.6/src/compiler/glsl/link_interface_blocks.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/link_interface_blocks.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -36,52 +36,6 @@ namespace { /** - * Check if two interfaces match, according to intrastage interface matching - * rules. If they do, and the first interface uses an unsized array, it will - * be updated to reflect the array size declared in the second interface. - */ -bool -intrastage_match(ir_variable *a, - ir_variable *b, - struct gl_shader_program *prog) -{ - /* Types must match. */ - if (a->get_interface_type() != b->get_interface_type()) { - /* Exception: if both the interface blocks are implicitly declared, - * don't force their types to match. They might mismatch due to the two - * shaders using different GLSL versions, and that's ok. - */ - if (a->data.how_declared != ir_var_declared_implicitly || - b->data.how_declared != ir_var_declared_implicitly) - return false; - } - - /* Presence/absence of interface names must match. */ - if (a->is_interface_instance() != b->is_interface_instance()) - return false; - - /* For uniforms, instance names need not match. For shader ins/outs, - * it's not clear from the spec whether they need to match, but - * Mesa's implementation relies on them matching. - */ - if (a->is_interface_instance() && b->data.mode != ir_var_uniform && - b->data.mode != ir_var_shader_storage && - strcmp(a->name, b->name) != 0) { - return false; - } - - /* If a block is an array then it must match across the shader. - * Unsized arrays are also processed and matched agaist sized arrays. - */ - if (b->type != a->type && - (b->is_interface_instance() || a->is_interface_instance()) && - !validate_intrastage_arrays(prog, b, a)) - return false; - - return true; -} - -/** * Return true if interface members mismatch and its not allowed by GLSL. */ static bool @@ -110,7 +64,7 @@ * interpolation qualifiers of variables of the same name do not * match." */ - if (prog->IsES || prog->Version < 440) + if (prog->IsES || prog->data->Version < 440) if (c->fields.structure[i].interpolation != p->fields.structure[i].interpolation) return true; @@ -129,7 +83,7 @@ * The table in Section 9.2.1 Linked Shaders of the GLSL ES 3.2 spec * says that sample need not match for varyings. */ - if (!prog->IsES || prog->Version < 310) + if (!prog->IsES || prog->data->Version < 310) if (c->fields.structure[i].centroid != p->fields.structure[i].centroid) return true; @@ -143,6 +97,55 @@ } /** + * Check if two interfaces match, according to intrastage interface matching + * rules. If they do, and the first interface uses an unsized array, it will + * be updated to reflect the array size declared in the second interface. + */ +bool +intrastage_match(ir_variable *a, + ir_variable *b, + struct gl_shader_program *prog) +{ + /* Types must match. */ + if (a->get_interface_type() != b->get_interface_type()) { + /* Exception: if both the interface blocks are implicitly declared, + * don't force their types to match. They might mismatch due to the two + * shaders using different GLSL versions, and that's ok. + */ + if ((a->data.how_declared != ir_var_declared_implicitly || + b->data.how_declared != ir_var_declared_implicitly) && + (!prog->IsES || prog->data->Version != 310 || + interstage_member_mismatch(prog, a->get_interface_type(), + b->get_interface_type()))) + return false; + } + + /* Presence/absence of interface names must match. */ + if (a->is_interface_instance() != b->is_interface_instance()) + return false; + + /* For uniforms, instance names need not match. For shader ins/outs, + * it's not clear from the spec whether they need to match, but + * Mesa's implementation relies on them matching. + */ + if (a->is_interface_instance() && b->data.mode != ir_var_uniform && + b->data.mode != ir_var_shader_storage && + strcmp(a->name, b->name) != 0) { + return false; + } + + /* If a block is an array then it must match across the shader. + * Unsized arrays are also processed and matched agaist sized arrays. + */ + if (b->type != a->type && + (b->is_interface_instance() || a->is_interface_instance()) && + !validate_intrastage_arrays(prog, b, a)) + return false; + + return true; +} + +/** * Check if two interfaces match, according to interstage (in/out) interface * matching rules. * @@ -341,10 +344,19 @@ } } +static bool +is_builtin_gl_in_block(ir_variable *var, int consumer_stage) +{ + return !strcmp(var->name, "gl_in") && + (consumer_stage == MESA_SHADER_TESS_CTRL || + consumer_stage == MESA_SHADER_TESS_EVAL || + consumer_stage == MESA_SHADER_GEOMETRY); +} + void validate_interstage_inout_blocks(struct gl_shader_program *prog, - const gl_shader *producer, - const gl_shader *consumer) + const gl_linked_shader *producer, + const gl_linked_shader *consumer) { interface_block_definitions definitions; /* VS -> GS, VS -> TCS, VS -> TES, TES -> GS */ @@ -352,28 +364,38 @@ consumer->Stage != MESA_SHADER_FRAGMENT) || consumer->Stage == MESA_SHADER_GEOMETRY; - /* Add input interfaces from the consumer to the symbol table. */ - foreach_in_list(ir_instruction, node, consumer->ir) { + /* Add output interfaces from the producer to the symbol table. */ + foreach_in_list(ir_instruction, node, producer->ir) { ir_variable *var = node->as_variable(); - if (!var || !var->get_interface_type() || var->data.mode != ir_var_shader_in) + if (!var || !var->get_interface_type() || var->data.mode != ir_var_shader_out) continue; definitions.store(var); } - /* Verify that the producer's output interfaces match. */ - foreach_in_list(ir_instruction, node, producer->ir) { + /* Verify that the consumer's input interfaces match. */ + foreach_in_list(ir_instruction, node, consumer->ir) { ir_variable *var = node->as_variable(); - if (!var || !var->get_interface_type() || var->data.mode != ir_var_shader_out) + if (!var || !var->get_interface_type() || var->data.mode != ir_var_shader_in) continue; - ir_variable *consumer_def = definitions.lookup(var); + ir_variable *producer_def = definitions.lookup(var); - /* The consumer doesn't use this output block. Ignore it. */ - if (consumer_def == NULL) - continue; + /* The producer doesn't generate this input: fail to link. Skip built-in + * 'gl_in[]' since that may not be present if the producer does not + * write to any of the pre-defined outputs (e.g. if the vertex shader + * does not write to gl_Position, etc), which is allowed and results in + * undefined behavior. + */ + if (producer_def == NULL && + !is_builtin_gl_in_block(var, consumer->Stage)) { + linker_error(prog, "Input block `%s' is not an output of " + "the previous stage\n", var->get_interface_type()->name); + return; + } - if (!interstage_match(prog, var, consumer_def, extra_array_level)) { + if (producer_def && + !interstage_match(prog, producer_def, var, extra_array_level)) { linker_error(prog, "definitions of interface block `%s' do not " "match\n", var->get_interface_type()->name); return; @@ -384,15 +406,15 @@ void validate_interstage_uniform_blocks(struct gl_shader_program *prog, - gl_shader **stages, int num_stages) + gl_linked_shader **stages) { interface_block_definitions definitions; - for (int i = 0; i < num_stages; i++) { + for (int i = 0; i < MESA_SHADER_STAGES; i++) { if (stages[i] == NULL) continue; - const gl_shader *stage = stages[i]; + const gl_linked_shader *stage = stages[i]; foreach_in_list(ir_instruction, node, stage->ir) { ir_variable *var = node->as_variable(); if (!var || !var->get_interface_type() || diff -Nru mesa-12.0.6/src/compiler/glsl/link_uniform_block_active_visitor.cpp mesa-17.0.7/src/compiler/glsl/link_uniform_block_active_visitor.cpp --- mesa-12.0.6/src/compiler/glsl/link_uniform_block_active_visitor.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/link_uniform_block_active_visitor.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -40,7 +40,7 @@ */ if (existing_block == NULL) { link_uniform_block_active *const b = - rzalloc(mem_ctx, struct link_uniform_block_active); + rzalloc(mem_ctx, struct link_uniform_block_active); b->type = block_type; b->has_instance_name = var->is_interface_instance(); @@ -58,13 +58,13 @@ return b; } else { link_uniform_block_active *const b = - (link_uniform_block_active *) existing_block->data; + (link_uniform_block_active *) existing_block->data; if (b->type != block_type - || b->has_instance_name != var->is_interface_instance()) - return NULL; + || b->has_instance_name != var->is_interface_instance()) + return NULL; else - return b; + return b; } assert(!"Should not get here."); @@ -89,8 +89,8 @@ * } * * There are only 2 active blocks above but for the sake of indirect indexing - * and not over complicating the code we will end up with a count of 8. - * Here each dimension has 2 different indices counted so we end up with 2*2*2 + * and not over complicating the code we will end up with a count of 8. Here + * each dimension has 2 different indices counted so we end up with 2*2*2 */ static struct uniform_block_array_elements ** process_arrays(void *mem_ctx, ir_dereference_array *ir, @@ -107,8 +107,8 @@ struct uniform_block_array_elements *ub_array = *ub_array_ptr; ir_constant *c = ir->array_index->as_constant(); if (c) { - /* Index is a constant, so mark just that element used, - * if not already. + /* Index is a constant, so mark just that element used, if not + * already. */ const unsigned idx = c->get_uint_component(0); @@ -131,9 +131,7 @@ ub_array->num_array_elements++; } } else { - /* The array index is not a constant, - * so mark the entire array used. - */ + /* The array index is not a constant, so mark the entire array used. */ assert(ir->array->type->is_array()); if (ub_array->num_array_elements < ir->array->type->length) { ub_array->num_array_elements = ir->array->type->length; @@ -147,6 +145,7 @@ } } } + return &ub_array->array; } else { return &block->array; @@ -167,12 +166,10 @@ * also considered active, even if no member of the block is * referenced." */ - if (var->get_interface_type()->interface_packing == - GLSL_INTERFACE_PACKING_PACKED) + if (var->get_interface_type_packing() == GLSL_INTERFACE_PACKING_PACKED) return visit_continue; - /* Process the block. Bail if there was an error. - */ + /* Process the block. Bail if there was an error. */ link_uniform_block_active *const b = process_block(this->mem_ctx, this->ht, var); if (b == NULL) { @@ -237,14 +234,13 @@ || !var->is_interface_instance()) return visit_continue; - /* Process the block. Bail if there was an error. - */ + /* Process the block. Bail if there was an error. */ link_uniform_block_active *const b = process_block(this->mem_ctx, this->ht, var); if (b == NULL) { linker_error(prog, - "uniform block `%s' has mismatching definitions", - var->get_interface_type()->name); + "uniform block `%s' has mismatching definitions", + var->get_interface_type()->name); this->success = false; return visit_stop; } @@ -254,12 +250,11 @@ assert(b->has_instance_name); assert(b->type != NULL); - /* If the block array was declared with a shared or - * std140 layout qualifier, all its instances have been already marked - * as used in link_uniform_block_active_visitor::visit(ir_variable *). + /* If the block array was declared with a shared or std140 layout + * qualifier, all its instances have been already marked as used in + * link_uniform_block_active_visitor::visit(ir_variable *). */ - if (var->get_interface_type()->interface_packing == - GLSL_INTERFACE_PACKING_PACKED) { + if (var->get_interface_type_packing() == GLSL_INTERFACE_PACKING_PACKED) { b->var = var; process_arrays(this->mem_ctx, ir, b); } @@ -277,14 +272,13 @@ assert(!var->is_interface_instance() || !var->type->is_array()); - /* Process the block. Bail if there was an error. - */ + /* Process the block. Bail if there was an error. */ link_uniform_block_active *const b = process_block(this->mem_ctx, this->ht, var); if (b == NULL) { linker_error(this->prog, - "uniform block `%s' has mismatching definitions", - var->get_interface_type()->name); + "uniform block `%s' has mismatching definitions", + var->get_interface_type()->name); this->success = false; return visit_stop; } diff -Nru mesa-12.0.6/src/compiler/glsl/link_uniform_blocks.cpp mesa-17.0.7/src/compiler/glsl/link_uniform_blocks.cpp --- mesa-12.0.6/src/compiler/glsl/link_uniform_blocks.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/link_uniform_blocks.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -36,8 +36,8 @@ ubo_visitor(void *mem_ctx, gl_uniform_buffer_variable *variables, unsigned num_variables, struct gl_shader_program *prog) : index(0), offset(0), buffer_size(0), variables(variables), - num_variables(num_variables), mem_ctx(mem_ctx), is_array_instance(false), - prog(prog) + num_variables(num_variables), mem_ctx(mem_ctx), + is_array_instance(false), prog(prog) { /* empty */ } @@ -60,17 +60,10 @@ struct gl_shader_program *prog; private: - virtual void visit_field(const glsl_type *type, const char *name, - bool row_major) - { - (void) type; - (void) name; - (void) row_major; - assert(!"Should not get here."); - } - virtual void enter_record(const glsl_type *type, const char *, - bool row_major, const unsigned packing) { + bool row_major, + const enum glsl_interface_packing packing) + { assert(type->is_record()); if (packing == GLSL_INTERFACE_PACKING_STD430) this->offset = glsl_align( @@ -81,15 +74,17 @@ } virtual void leave_record(const glsl_type *type, const char *, - bool row_major, const unsigned packing) { + bool row_major, + const enum glsl_interface_packing packing) + { assert(type->is_record()); /* If this is the last field of a structure, apply rule #9. The - * GL_ARB_uniform_buffer_object spec says: + * ARB_uniform_buffer_object spec says: * - * "The structure may have padding at the end; the base offset of - * the member following the sub-structure is rounded up to the next - * multiple of the base alignment of the structure." + * The structure may have padding at the end; the base offset of the + * member following the sub-structure is rounded up to the next + * multiple of the base alignment of the structure. */ if (packing == GLSL_INTERFACE_PACKING_STD430) this->offset = glsl_align( @@ -106,7 +101,7 @@ virtual void visit_field(const glsl_type *type, const char *name, bool row_major, const glsl_type *, - const unsigned packing, + const enum glsl_interface_packing packing, bool last_field) { assert(this->index < this->num_variables); @@ -138,25 +133,20 @@ unsigned alignment = 0; unsigned size = 0; - /* From ARB_program_interface_query: + /* The ARB_program_interface_query spec says: * - * "If the final member of an active shader storage block is array - * with no declared size, the minimum buffer size is computed - * assuming the array was declared as an array with one element." + * If the final member of an active shader storage block is array + * with no declared size, the minimum buffer size is computed + * assuming the array was declared as an array with one element. * - * For that reason, we use the base type of the unsized array to calculate - * its size. We don't need to check if the unsized array is the last member - * of a shader storage block (that check was already done by the parser). + * For that reason, we use the base type of the unsized array to + * calculate its size. We don't need to check if the unsized array is + * the last member of a shader storage block (that check was already + * done by the parser). */ const glsl_type *type_for_size = type; if (type->is_unsized_array()) { - if (!last_field) { - linker_error(prog, "unsized array `%s' definition: " - "only last member of a shader storage block " - "can be defined as unsized array", - name); - } - + assert(last_field); type_for_size = type->without_array(); } @@ -173,15 +163,15 @@ this->offset += size; - /* From the GL_ARB_uniform_buffer_object spec: + /* The ARB_uniform_buffer_object spec says: * - * "For uniform blocks laid out according to [std140] rules, the - * minimum buffer object size returned by the - * UNIFORM_BLOCK_DATA_SIZE query is derived by taking the offset of - * the last basic machine unit consumed by the last uniform of the - * uniform block (including any end-of-array or end-of-structure - * padding), adding one, and rounding up to the next multiple of - * the base alignment required for a vec4." + * For uniform blocks laid out according to [std140] rules, the + * minimum buffer object size returned by the UNIFORM_BLOCK_DATA_SIZE + * query is derived by taking the offset of the last basic machine + * unit consumed by the last uniform of the uniform block (including + * any end-of-array or end-of-structure padding), adding one, and + * rounding up to the next multiple of the base alignment required + * for a vec4. */ this->buffer_size = glsl_align(this->offset, 16); } @@ -197,12 +187,13 @@ unsigned num_active_uniforms; private: - virtual void visit_field(const glsl_type *type, const char *name, - bool row_major) + virtual void visit_field(const glsl_type * /* type */, + const char * /* name */, + bool /* row_major */, + const glsl_type * /* record_type */, + const enum glsl_interface_packing, + bool /* last_field */) { - (void) type; - (void) name; - (void) row_major; this->num_active_uniforms++; } }; @@ -214,65 +205,97 @@ bool has_instance_name; }; +static void process_block_array_leaf(const char *name, gl_uniform_block *blocks, + ubo_visitor *parcel, + gl_uniform_buffer_variable *variables, + const struct link_uniform_block_active *const b, + unsigned *block_index, + unsigned *binding_offset, + unsigned linearized_index, + struct gl_context *ctx, + struct gl_shader_program *prog); + +/** + * + * \param first_index Value of \c block_index for the first element of the + * array. + */ static void process_block_array(struct uniform_block_array_elements *ub_array, char **name, size_t name_length, gl_uniform_block *blocks, ubo_visitor *parcel, gl_uniform_buffer_variable *variables, const struct link_uniform_block_active *const b, unsigned *block_index, unsigned *binding_offset, - struct gl_context *ctx, struct gl_shader_program *prog) + struct gl_context *ctx, struct gl_shader_program *prog, + unsigned first_index) { - if (ub_array) { - for (unsigned j = 0; j < ub_array->num_array_elements; j++) { - size_t new_length = name_length; - - /* Append the subscript to the current variable name */ - ralloc_asprintf_rewrite_tail(name, &new_length, "[%u]", - ub_array->array_elements[j]); + for (unsigned j = 0; j < ub_array->num_array_elements; j++) { + size_t new_length = name_length; + /* Append the subscript to the current variable name */ + ralloc_asprintf_rewrite_tail(name, &new_length, "[%u]", + ub_array->array_elements[j]); + + if (ub_array->array) { process_block_array(ub_array->array, name, new_length, blocks, parcel, variables, b, block_index, - binding_offset, ctx, prog); + binding_offset, ctx, prog, first_index); + } else { + process_block_array_leaf(*name, blocks, + parcel, variables, b, block_index, + binding_offset, *block_index - first_index, + ctx, prog); } - } else { - unsigned i = *block_index; - const glsl_type *type = b->type->without_array(); - - blocks[i].Name = ralloc_strdup(blocks, *name); - blocks[i].Uniforms = &variables[(*parcel).index]; - - /* The GL_ARB_shading_language_420pack spec says: - * - * "If the binding identifier is used with a uniform block - * instanced as an array then the first element of the array - * takes the specified block binding and each subsequent - * element takes the next consecutive uniform block binding - * point." - */ - blocks[i].Binding = (b->has_binding) ? b->binding + *binding_offset : 0; - - blocks[i].UniformBufferSize = 0; - blocks[i]._Packing = gl_uniform_block_packing(type->interface_packing); + } +} - parcel->process(type, blocks[i].Name); +static void +process_block_array_leaf(const char *name, + gl_uniform_block *blocks, + ubo_visitor *parcel, gl_uniform_buffer_variable *variables, + const struct link_uniform_block_active *const b, + unsigned *block_index, unsigned *binding_offset, + unsigned linearized_index, + struct gl_context *ctx, struct gl_shader_program *prog) +{ + unsigned i = *block_index; + const glsl_type *type = b->type->without_array(); - blocks[i].UniformBufferSize = parcel->buffer_size; + blocks[i].Name = ralloc_strdup(blocks, name); + blocks[i].Uniforms = &variables[(*parcel).index]; - /* Check SSBO size is lower than maximum supported size for SSBO */ - if (b->is_shader_storage && - parcel->buffer_size > ctx->Const.MaxShaderStorageBlockSize) { - linker_error(prog, "shader storage block `%s' has size %d, " - "which is larger than than the maximum allowed (%d)", - b->type->name, - parcel->buffer_size, - ctx->Const.MaxShaderStorageBlockSize); - } - blocks[i].NumUniforms = - (unsigned)(ptrdiff_t)(&variables[parcel->index] - blocks[i].Uniforms); + /* The ARB_shading_language_420pack spec says: + * + * If the binding identifier is used with a uniform block instanced as + * an array then the first element of the array takes the specified + * block binding and each subsequent element takes the next consecutive + * uniform block binding point. + */ + blocks[i].Binding = (b->has_binding) ? b->binding + *binding_offset : 0; - *block_index = *block_index + 1; - *binding_offset = *binding_offset + 1; + blocks[i].UniformBufferSize = 0; + blocks[i]._Packing = gl_uniform_block_packing(type->interface_packing); + blocks[i]._RowMajor = type->get_interface_row_major(); + blocks[i].linearized_array_index = linearized_index; + + parcel->process(type, b->has_instance_name ? blocks[i].Name : ""); + + blocks[i].UniformBufferSize = parcel->buffer_size; + + /* Check SSBO size is lower than maximum supported size for SSBO */ + if (b->is_shader_storage && + parcel->buffer_size > ctx->Const.MaxShaderStorageBlockSize) { + linker_error(prog, "shader storage block `%s' has size %d, " + "which is larger than than the maximum allowed (%d)", + b->type->name, + parcel->buffer_size, + ctx->Const.MaxShaderStorageBlockSize); } + blocks[i].NumUniforms = + (unsigned)(ptrdiff_t)(&variables[parcel->index] - blocks[i].Uniforms); + + *block_index = *block_index + 1; + *binding_offset = *binding_offset + 1; } /* This function resizes the array types of the block so that later we can use @@ -315,7 +338,8 @@ /* Allocate storage to hold all of the information related to uniform * blocks that can be queried through the API. */ - struct gl_uniform_block *blocks = ralloc_array(mem_ctx, gl_uniform_block, num_blocks); + struct gl_uniform_block *blocks = + rzalloc_array(mem_ctx, gl_uniform_block, num_blocks); gl_uniform_buffer_variable *variables = ralloc_array(blocks, gl_uniform_buffer_variable, num_variables); @@ -343,41 +367,21 @@ if ((create_ubo_blocks && !b->is_shader_storage) || (!create_ubo_blocks && b->is_shader_storage)) { + unsigned binding_offset = 0; if (b->array != NULL) { - unsigned binding_offset = 0; char *name = ralloc_strdup(NULL, block_type->without_array()->name); size_t name_length = strlen(name); assert(b->has_instance_name); process_block_array(b->array, &name, name_length, blocks, &parcel, - variables, b, &i, &binding_offset, ctx, prog); + variables, b, &i, &binding_offset, ctx, prog, + i); ralloc_free(name); } else { - blocks[i].Name = ralloc_strdup(blocks, block_type->name); - blocks[i].Uniforms = &variables[parcel.index]; - blocks[i].Binding = (b->has_binding) ? b->binding : 0; - blocks[i].UniformBufferSize = 0; - blocks[i]._Packing = - gl_uniform_block_packing(block_type->interface_packing); - - parcel.process(block_type, - b->has_instance_name ? block_type->name : ""); - - blocks[i].UniformBufferSize = parcel.buffer_size; - - /* Check SSBO size is lower than maximum supported size for SSBO - */ - if (b->is_shader_storage && - parcel.buffer_size > ctx->Const.MaxShaderStorageBlockSize) { - linker_error(prog, "shader storage block `%s' has size %d, " - "which is larger than than the maximum allowed (%d)", - block_type->name, parcel.buffer_size, - ctx->Const.MaxShaderStorageBlockSize); - } - blocks[i].NumUniforms = (unsigned)(ptrdiff_t) - (&variables[parcel.index] - blocks[i].Uniforms); - i++; + process_block_array_leaf(block_type->name, blocks, &parcel, + variables, b, &i, &binding_offset, + 0, ctx, prog); } } } @@ -391,8 +395,7 @@ link_uniform_blocks(void *mem_ctx, struct gl_context *ctx, struct gl_shader_program *prog, - struct gl_shader **shader_list, - unsigned num_shaders, + struct gl_linked_shader *shader, struct gl_uniform_block **ubo_blocks, unsigned *num_ubo_blocks, struct gl_uniform_block **ssbo_blocks, @@ -412,12 +415,9 @@ return; } - /* Determine which uniform blocks are active. - */ + /* Determine which uniform blocks are active. */ link_uniform_block_active_visitor v(mem_ctx, block_hash, prog); - for (unsigned i = 0; i < num_shaders; i++) { - visit_list_elements(&v, shader_list[i]->ir); - } + visit_list_elements(&v, shader->ir); /* Count the number of active uniform blocks. Count the total number of * active slots in those uniform blocks. @@ -472,7 +472,7 @@ _mesa_hash_table_destroy(block_hash, NULL); } -bool +static bool link_uniform_blocks_are_compatible(const gl_uniform_block *a, const gl_uniform_block *b) { @@ -480,12 +480,12 @@ /* Page 35 (page 42 of the PDF) in section 4.3.7 of the GLSL 1.50 spec says: * - * "Matched block names within an interface (as defined above) must - * match in terms of having the same number of declarations with the - * same sequence of types and the same sequence of member names, as - * well as having the same member-wise layout qualification....if a - * matching block is declared as an array, then the array sizes must - * also match... Any mismatch will generate a link error." + * Matched block names within an interface (as defined above) must match + * in terms of having the same number of declarations with the same + * sequence of types and the same sequence of member names, as well as + * having the same member-wise layout qualification....if a matching + * block is declared as an array, then the array sizes must also + * match... Any mismatch will generate a link error. * * Arrays are not yet supported, so there is no check for that. */ @@ -495,6 +495,9 @@ if (a->_Packing != b->_Packing) return false; + if (a->_RowMajor != b->_RowMajor) + return false; + for (unsigned i = 0; i < a->NumUniforms; i++) { if (strcmp(a->Uniforms[i].Name, b->Uniforms[i].Name) != 0) return false; diff -Nru mesa-12.0.6/src/compiler/glsl/link_uniform_initializers.cpp mesa-17.0.7/src/compiler/glsl/link_uniform_initializers.cpp --- mesa-12.0.6/src/compiler/glsl/link_uniform_initializers.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/link_uniform_initializers.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -25,6 +25,7 @@ #include "ir.h" #include "linker.h" #include "ir_uniform.h" +#include "util/string_to_uint_map.h" /* These functions are put in a "private" namespace instead of being marked * static so that the unit tests can access them. See @@ -33,44 +34,42 @@ namespace linker { gl_uniform_storage * -get_storage(gl_uniform_storage *storage, unsigned num_storage, - const char *name) +get_storage(struct gl_shader_program *prog, const char *name) { - for (unsigned int i = 0; i < num_storage; i++) { - if (strcmp(name, storage[i].name) == 0) - return &storage[i]; - } + unsigned id; + if (prog->UniformHash->get(id, name)) + return &prog->data->UniformStorage[id]; + assert(!"No uniform storage found!"); return NULL; } void copy_constant_to_storage(union gl_constant_value *storage, - const ir_constant *val, - const enum glsl_base_type base_type, + const ir_constant *val, + const enum glsl_base_type base_type, const unsigned int elements, unsigned int boolean_true) { for (unsigned int i = 0; i < elements; i++) { switch (base_type) { case GLSL_TYPE_UINT: - storage[i].u = val->value.u[i]; - break; + storage[i].u = val->value.u[i]; + break; case GLSL_TYPE_INT: case GLSL_TYPE_SAMPLER: - storage[i].i = val->value.i[i]; - break; + storage[i].i = val->value.i[i]; + break; case GLSL_TYPE_FLOAT: - storage[i].f = val->value.f[i]; - break; + storage[i].f = val->value.f[i]; + break; case GLSL_TYPE_DOUBLE: /* XXX need to check on big-endian */ - storage[i * 2].u = *(uint32_t *)&val->value.d[i]; - storage[i * 2 + 1].u = *(((uint32_t *)&val->value.d[i]) + 1); + memcpy(&storage[i * 2].u, &val->value.d[i], sizeof(double)); break; case GLSL_TYPE_BOOL: - storage[i].b = val->value.b[i] ? boolean_true : 0; - break; + storage[i].b = val->value.b[i] ? boolean_true : 0; + break; case GLSL_TYPE_ARRAY: case GLSL_TYPE_STRUCT: case GLSL_TYPE_IMAGE: @@ -80,11 +79,11 @@ case GLSL_TYPE_SUBROUTINE: case GLSL_TYPE_FUNCTION: case GLSL_TYPE_ERROR: - /* All other types should have already been filtered by other - * paths in the caller. - */ - assert(!"Should not get here."); - break; + /* All other types should have already been filtered by other + * paths in the caller. + */ + assert(!"Should not get here."); + break; } } } @@ -103,19 +102,16 @@ const glsl_type *const element_type = type->fields.array; for (unsigned int i = 0; i < type->length; i++) { - const char *element_name = ralloc_asprintf(mem_ctx, "%s[%d]", name, i); + const char *element_name = ralloc_asprintf(mem_ctx, "%s[%d]", name, i); - set_opaque_binding(mem_ctx, prog, element_type, + set_opaque_binding(mem_ctx, prog, element_type, element_name, binding); } } else { - struct gl_uniform_storage *const storage = - get_storage(prog->UniformStorage, prog->NumUniformStorage, name); + struct gl_uniform_storage *const storage = get_storage(prog, name); - if (storage == NULL) { - assert(storage != NULL); + if (!storage) return; - } const unsigned elements = MAX2(storage->array_elements, 1); @@ -131,23 +127,25 @@ } for (int sh = 0; sh < MESA_SHADER_STAGES; sh++) { - gl_shader *shader = prog->_LinkedShaders[sh]; + gl_linked_shader *shader = prog->_LinkedShaders[sh]; if (shader) { if (storage->type->base_type == GLSL_TYPE_SAMPLER && storage->opaque[sh].active) { for (unsigned i = 0; i < elements; i++) { const unsigned index = storage->opaque[sh].index + i; - shader->SamplerUnits[index] = storage->storage[i].i; + shader->Program->SamplerUnits[index] = + storage->storage[i].i; } } else if (storage->type->base_type == GLSL_TYPE_IMAGE && storage->opaque[sh].active) { for (unsigned i = 0; i < elements; i++) { const unsigned index = storage->opaque[sh].index + i; - if (index >= ARRAY_SIZE(shader->ImageUnits)) + if (index >= ARRAY_SIZE(shader->Program->sh.ImageUnits)) break; - shader->ImageUnits[index] = storage->storage[i].i; + shader->Program->sh.ImageUnits[index] = + storage->storage[i].i; } } } @@ -159,10 +157,11 @@ set_block_binding(gl_shader_program *prog, const char *block_name, unsigned mode, int binding) { - unsigned num_blocks = mode == ir_var_uniform ? prog->NumUniformBlocks : - prog->NumShaderStorageBlocks; + unsigned num_blocks = mode == ir_var_uniform ? + prog->data->NumUniformBlocks : + prog->data->NumShaderStorageBlocks; struct gl_uniform_block *blks = mode == ir_var_uniform ? - prog->UniformBlocks : prog->ShaderStorageBlocks; + prog->data->UniformBlocks : prog->data->ShaderStorageBlocks; for (unsigned i = 0; i < num_blocks; i++) { if (!strcmp(blks[i].Name, block_name)) { @@ -176,7 +175,7 @@ void set_uniform_initializer(void *mem_ctx, gl_shader_program *prog, - const char *name, const glsl_type *type, + const char *name, const glsl_type *type, ir_constant *val, unsigned int boolean_true) { const glsl_type *t_without_array = type->without_array(); @@ -186,12 +185,12 @@ field_constant = (ir_constant *)val->components.get_head(); for (unsigned int i = 0; i < type->length; i++) { - const glsl_type *field_type = type->fields.structure[i].type; - const char *field_name = ralloc_asprintf(mem_ctx, "%s.%s", name, - type->fields.structure[i].name); - set_uniform_initializer(mem_ctx, prog, field_name, + const glsl_type *field_type = type->fields.structure[i].type; + const char *field_name = ralloc_asprintf(mem_ctx, "%s.%s", name, + type->fields.structure[i].name); + set_uniform_initializer(mem_ctx, prog, field_name, field_type, field_constant, boolean_true); - field_constant = (ir_constant *)field_constant->next; + field_constant = (ir_constant *)field_constant->next; } return; } else if (t_without_array->is_record() || @@ -199,56 +198,52 @@ const glsl_type *const element_type = type->fields.array; for (unsigned int i = 0; i < type->length; i++) { - const char *element_name = ralloc_asprintf(mem_ctx, "%s[%d]", name, i); + const char *element_name = ralloc_asprintf(mem_ctx, "%s[%d]", name, i); - set_uniform_initializer(mem_ctx, prog, element_name, + set_uniform_initializer(mem_ctx, prog, element_name, element_type, val->array_elements[i], boolean_true); } return; } - struct gl_uniform_storage *const storage = - get_storage(prog->UniformStorage, - prog->NumUniformStorage, - name); - if (storage == NULL) { - assert(storage != NULL); + struct gl_uniform_storage *const storage = get_storage(prog, name); + + if (!storage) return; - } if (val->type->is_array()) { const enum glsl_base_type base_type = - val->array_elements[0]->type->base_type; + val->array_elements[0]->type->base_type; const unsigned int elements = val->array_elements[0]->type->components(); unsigned int idx = 0; - unsigned dmul = (base_type == GLSL_TYPE_DOUBLE) ? 2 : 1; + unsigned dmul = glsl_base_type_is_64bit(base_type) ? 2 : 1; assert(val->type->length >= storage->array_elements); for (unsigned int i = 0; i < storage->array_elements; i++) { - copy_constant_to_storage(& storage->storage[idx], - val->array_elements[i], - base_type, + copy_constant_to_storage(& storage->storage[idx], + val->array_elements[i], + base_type, elements, boolean_true); - idx += elements * dmul; + idx += elements * dmul; } } else { copy_constant_to_storage(storage->storage, - val, - val->type->base_type, + val, + val->type->base_type, val->type->components(), boolean_true); if (storage->type->is_sampler()) { for (int sh = 0; sh < MESA_SHADER_STAGES; sh++) { - gl_shader *shader = prog->_LinkedShaders[sh]; + gl_linked_shader *shader = prog->_LinkedShaders[sh]; if (shader && storage->opaque[sh].active) { unsigned index = storage->opaque[sh].index; - shader->SamplerUnits[index] = storage->storage[0].i; + shader->Program->SamplerUnits[index] = storage->storage[0].i; } } } @@ -263,20 +258,20 @@ void *mem_ctx = NULL; for (unsigned int i = 0; i < MESA_SHADER_STAGES; i++) { - struct gl_shader *shader = prog->_LinkedShaders[i]; + struct gl_linked_shader *shader = prog->_LinkedShaders[i]; if (shader == NULL) - continue; + continue; foreach_in_list(ir_instruction, node, shader->ir) { - ir_variable *const var = node->as_variable(); + ir_variable *const var = node->as_variable(); - if (!var || (var->data.mode != ir_var_uniform && - var->data.mode != ir_var_shader_storage)) - continue; + if (!var || (var->data.mode != ir_var_uniform && + var->data.mode != ir_var_shader_storage)) + continue; - if (!mem_ctx) - mem_ctx = ralloc_context(NULL); + if (!mem_ctx) + mem_ctx = ralloc_context(NULL); if (var->data.explicit_binding) { const glsl_type *const type = var->type; diff -Nru mesa-12.0.6/src/compiler/glsl/link_uniforms.cpp mesa-17.0.7/src/compiler/glsl/link_uniforms.cpp --- mesa-12.0.6/src/compiler/glsl/link_uniforms.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/link_uniforms.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -26,9 +26,9 @@ #include "linker.h" #include "ir_uniform.h" #include "glsl_symbol_table.h" -#include "program/hash_table.h" #include "program.h" -#include "util/hash_table.h" +#include "util/string_to_uint_map.h" +#include "ir_array_refcount.h" /** * \file link_uniforms.cpp @@ -65,7 +65,7 @@ unsigned record_array_count = 1; char *name_copy = ralloc_strdup(NULL, name); - unsigned packing = type->interface_packing; + enum glsl_interface_packing packing = type->get_interface_packing(); recursion(type, &name_copy, strlen(name), false, NULL, packing, false, record_array_count, NULL); @@ -79,9 +79,9 @@ const bool row_major = var->data.matrix_layout == GLSL_MATRIX_LAYOUT_ROW_MAJOR; - const unsigned packing = var->get_interface_type() ? - var->get_interface_type()->interface_packing : - var->type->interface_packing; + const enum glsl_interface_packing packing = var->get_interface_type() ? + var->get_interface_type_packing() : + var->type->get_interface_packing(); const glsl_type *t = var->data.from_named_ifc_block ? var->get_interface_type() : var->type; @@ -116,7 +116,7 @@ program_resource_visitor::recursion(const glsl_type *t, char **name, size_t name_length, bool row_major, const glsl_type *record_type, - const unsigned packing, + const enum glsl_interface_packing packing, bool last_field, unsigned record_array_count, const glsl_struct_field *named_ifc_member) @@ -194,8 +194,10 @@ record_type = t->fields.array; unsigned length = t->length; + /* Shader storage block unsized arrays: add subscript [0] to variable - * names */ + * names. + */ if (t->is_unsized_array()) length = 1; @@ -225,31 +227,19 @@ } void -program_resource_visitor::visit_field(const glsl_type *type, const char *name, - bool row_major, - const glsl_type *, - const unsigned, - bool /* last_field */) -{ - visit_field(type, name, row_major); -} - -void -program_resource_visitor::visit_field(const glsl_struct_field *field) +program_resource_visitor::visit_field(const glsl_struct_field *) { - (void) field; - /* empty */ } void program_resource_visitor::enter_record(const glsl_type *, const char *, bool, - const unsigned) + const enum glsl_interface_packing) { } void program_resource_visitor::leave_record(const glsl_type *, const char *, bool, - const unsigned) + const enum glsl_interface_packing) { } @@ -347,14 +337,15 @@ private: virtual void visit_field(const glsl_type *type, const char *name, - bool row_major) + bool /* row_major */, + const glsl_type * /* record_type */, + const enum glsl_interface_packing, + bool /* last_field */) { assert(!type->without_array()->is_record()); assert(!type->without_array()->is_interface()); assert(!(type->is_array() && type->fields.array->is_array())); - (void) row_major; - /* Count the number of samplers regardless of whether the uniform is * already in the hash table. The hash table prevents adding the same * uniform for multiple shader targets, but in this case we want to @@ -373,7 +364,7 @@ * components in the default block. The spec allows image * uniforms to use up no more than one scalar slot. */ - if(!is_shader_storage) + if (!is_shader_storage) this->num_shader_uniform_components += values; } else { /* Accumulate the total number of uniform slots used by this shader. @@ -402,7 +393,9 @@ * uniforms. */ this->num_active_uniforms++; - this->num_values += values; + + if(!is_gl_identifier(name) && !is_shader_storage && !is_buffer_block) + this->num_values += values; } struct string_to_uint_map *hidden_map; @@ -463,9 +456,9 @@ buffer_block_index = -1; if (var->is_in_buffer_block()) { struct gl_uniform_block *blks = var->is_in_shader_storage_block() ? - prog->ShaderStorageBlocks : prog->UniformBlocks; + prog->data->ShaderStorageBlocks : prog->data->UniformBlocks; unsigned num_blks = var->is_in_shader_storage_block() ? - prog->NumShaderStorageBlocks : prog->NumUniformBlocks; + prog->data->NumShaderStorageBlocks : prog->data->NumUniformBlocks; if (var->is_interface_instance() && var->type->is_array()) { unsigned l = strlen(var->get_interface_type()->name); @@ -479,8 +472,7 @@ } } else { for (unsigned i = 0; i < num_blks; i++) { - if (strcmp(var->get_interface_type()->name, blks[i].Name) == - 0) { + if (strcmp(var->get_interface_type()->name, blks[i].Name) == 0) { buffer_block_index = i; break; } @@ -543,7 +535,7 @@ const char *str_end; while((str_start = strchr(name_copy, '[')) && (str_end = strchr(name_copy, ']'))) { - memmove(str_start, str_end + 1, 1 + strlen(str_end)); + memmove(str_start, str_end + 1, 1 + strlen(str_end + 1)); } unsigned index = 0; @@ -621,7 +613,7 @@ this->next_image += MAX2(1, uniform->array_elements); for (unsigned i = first; i < MIN2(next_image, MAX_IMAGE_UNIFORMS); i++) - prog->_LinkedShaders[shader_type]->ImageAccess[i] = access; + prog->_LinkedShaders[shader_type]->Program->sh.ImageAccess[i] = access; } } @@ -632,6 +624,8 @@ uniform->opaque[shader_type].index = this->next_subroutine; uniform->opaque[shader_type].active = true; + prog->_LinkedShaders[shader_type]->Program->sh.NumSubroutineUniforms++; + /* Increment the subroutine index by 1 for non-arrays and by the * number of array elements for arrays. */ @@ -650,17 +644,10 @@ this->record_array_count = record_array_count; } - virtual void visit_field(const glsl_type *type, const char *name, - bool row_major) - { - (void) type; - (void) name; - (void) row_major; - assert(!"Should not get here."); - } - virtual void enter_record(const glsl_type *type, const char *, - bool row_major, const unsigned packing) { + bool row_major, + const enum glsl_interface_packing packing) + { assert(type->is_record()); if (this->buffer_block_index == -1) return; @@ -673,7 +660,9 @@ } virtual void leave_record(const glsl_type *type, const char *, - bool row_major, const unsigned packing) { + bool row_major, + const enum glsl_interface_packing packing) + { assert(type->is_record()); if (this->buffer_block_index == -1) return; @@ -687,7 +676,7 @@ virtual void visit_field(const glsl_type *type, const char *name, bool row_major, const glsl_type * /* record_type */, - const unsigned packing, + const enum glsl_interface_packing packing, bool /* last_field */) { assert(!type->without_array()->is_record()); @@ -762,13 +751,15 @@ current_var->data.how_declared == ir_var_hidden; this->uniforms[id].builtin = is_gl_identifier(name); - /* Do not assign storage if the uniform is builtin */ - if (!this->uniforms[id].builtin) - this->uniforms[id].storage = this->values; - this->uniforms[id].is_shader_storage = current_var->is_in_shader_storage_block(); + /* Do not assign storage if the uniform is a builtin or buffer object */ + if (!this->uniforms[id].builtin && + !this->uniforms[id].is_shader_storage && + this->buffer_block_index == -1) + this->uniforms[id].storage = this->values; + if (this->buffer_block_index != -1) { this->uniforms[id].block_index = this->buffer_block_index; @@ -819,7 +810,10 @@ this->uniforms[id].row_major = false; } - this->values += values_for_type(type); + if (!this->uniforms[id].builtin && + !this->uniforms[id].is_shader_storage && + this->buffer_block_index == -1) + this->values += values_for_type(type); } /** @@ -874,6 +868,15 @@ unsigned shader_shadow_samplers; }; +static bool +variable_is_referenced(ir_array_refcount_visitor &v, ir_variable *var) +{ + ir_array_refcount_entry *const entry = v.get_variable_entry(var); + + return entry->is_referenced; + +} + /** * Walks the IR and update the references to uniform blocks in the * ir_variables to point at linked shader's list (previously, they @@ -881,18 +884,65 @@ * shaders). */ static void -link_update_uniform_buffer_variables(struct gl_shader *shader) +link_update_uniform_buffer_variables(struct gl_linked_shader *shader, + unsigned stage) { + ir_array_refcount_visitor v; + + v.run(shader->ir); + foreach_in_list(ir_instruction, node, shader->ir) { ir_variable *const var = node->as_variable(); - if ((var == NULL) || !var->is_in_buffer_block()) + if (var == NULL || !var->is_in_buffer_block()) continue; assert(var->data.mode == ir_var_uniform || var->data.mode == ir_var_shader_storage); + unsigned num_blocks = var->data.mode == ir_var_uniform ? + shader->Program->info.num_ubos : shader->Program->info.num_ssbos; + struct gl_uniform_block **blks = var->data.mode == ir_var_uniform ? + shader->Program->sh.UniformBlocks : + shader->Program->sh.ShaderStorageBlocks; + if (var->is_interface_instance()) { + const ir_array_refcount_entry *const entry = v.get_variable_entry(var); + + if (entry->is_referenced) { + /* Since this is an interface instance, the instance type will be + * same as the array-stripped variable type. If the variable type + * is an array, then the block names will be suffixed with [0] + * through [n-1]. Unlike for non-interface instances, there will + * not be structure types here, so the only name sentinel that we + * have to worry about is [. + */ + assert(var->type->without_array() == var->get_interface_type()); + const char sentinel = var->type->is_array() ? '[' : '\0'; + + const ptrdiff_t len = strlen(var->get_interface_type()->name); + for (unsigned i = 0; i < num_blocks; i++) { + const char *const begin = blks[i]->Name; + const char *const end = strchr(begin, sentinel); + + if (end == NULL) + continue; + + if (len != (end - begin)) + continue; + + /* Even when a match is found, do not "break" here. This could + * be an array of instances, and all elements of the array need + * to be marked as referenced. + */ + if (strncmp(begin, var->get_interface_type()->name, len) == 0 && + (!var->type->is_array() || + entry->is_linearized_index_referenced(blks[i]->linearized_array_index))) { + blks[i]->stageref |= 1U << stage; + } + } + } + var->data.location = 0; continue; } @@ -907,11 +957,6 @@ sentinel = '['; } - unsigned num_blocks = var->data.mode == ir_var_uniform ? - shader->NumUniformBlocks : shader->NumShaderStorageBlocks; - struct gl_uniform_block **blks = var->data.mode == ir_var_uniform ? - shader->UniformBlocks : shader->ShaderStorageBlocks; - const unsigned l = strlen(var->name); for (unsigned i = 0; i < num_blocks; i++) { for (unsigned j = 0; j < blks[i]->NumUniforms; j++) { @@ -925,17 +970,21 @@ if ((ptrdiff_t) l != (end - begin)) continue; - if (strncmp(var->name, begin, l) == 0) { - found = true; - var->data.location = j; - break; - } - } else if (!strcmp(var->name, blks[i]->Uniforms[j].Name)) { - found = true; + found = strncmp(var->name, begin, l) == 0; + } else { + found = strcmp(var->name, blks[i]->Uniforms[j].Name) == 0; + } + + if (found) { var->data.location = j; + + if (variable_is_referenced(v, var)) + blks[i]->stageref |= 1U << stage; + break; } } + if (found) break; } @@ -991,170 +1040,63 @@ return -1; } -void -link_assign_uniform_locations(struct gl_shader_program *prog, - unsigned int boolean_true, - unsigned int num_explicit_uniform_locs, - unsigned int max_uniform_locs) +static void +link_setup_uniform_remap_tables(struct gl_context *ctx, + struct gl_shader_program *prog, + unsigned num_explicit_uniform_locs) { - ralloc_free(prog->UniformStorage); - prog->UniformStorage = NULL; - prog->NumUniformStorage = 0; - - if (prog->UniformHash != NULL) { - prog->UniformHash->clear(); - } else { - prog->UniformHash = new string_to_uint_map; - } - - /* First pass: Count the uniform resources used by the user-defined - * uniforms. While this happens, each active uniform will have an index - * assigned to it. - * - * Note: this is *NOT* the index that is returned to the application by - * glGetUniformLocation. - */ - struct string_to_uint_map *hiddenUniforms = new string_to_uint_map; - count_uniform_size uniform_size(prog->UniformHash, hiddenUniforms); - for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { - struct gl_shader *sh = prog->_LinkedShaders[i]; - - if (sh == NULL) - continue; - - /* Uniforms that lack an initializer in the shader code have an initial - * value of zero. This includes sampler uniforms. - * - * Page 24 (page 30 of the PDF) of the GLSL 1.20 spec says: - * - * "The link time initial value is either the value of the variable's - * initializer, if present, or 0 if no initializer is present. Sampler - * types cannot have initializers." - */ - memset(sh->SamplerUnits, 0, sizeof(sh->SamplerUnits)); - memset(sh->ImageUnits, 0, sizeof(sh->ImageUnits)); - - link_update_uniform_buffer_variables(sh); - - /* Reset various per-shader target counts. - */ - uniform_size.start_shader(); - - foreach_in_list(ir_instruction, node, sh->ir) { - ir_variable *const var = node->as_variable(); - - if ((var == NULL) || (var->data.mode != ir_var_uniform && - var->data.mode != ir_var_shader_storage)) - continue; - - uniform_size.process(var); - } - - sh->num_samplers = uniform_size.num_shader_samplers; - sh->NumImages = uniform_size.num_shader_images; - sh->num_uniform_components = uniform_size.num_shader_uniform_components; - sh->num_combined_uniform_components = sh->num_uniform_components; - - for (unsigned i = 0; i < sh->NumUniformBlocks; i++) { - sh->num_combined_uniform_components += - sh->UniformBlocks[i]->UniformBufferSize / 4; - } - } - - const unsigned num_uniforms = uniform_size.num_active_uniforms; - const unsigned num_data_slots = uniform_size.num_values; - const unsigned hidden_uniforms = uniform_size.num_hidden_uniforms; - - /* assign hidden uniforms a slot id */ - hiddenUniforms->iterate(assign_hidden_uniform_slot_id, &uniform_size); - delete hiddenUniforms; - - /* On the outside chance that there were no uniforms, bail out. - */ - if (num_uniforms == 0) - return; - - struct gl_uniform_storage *uniforms = - rzalloc_array(prog, struct gl_uniform_storage, num_uniforms); - union gl_constant_value *data = - rzalloc_array(uniforms, union gl_constant_value, num_data_slots); -#ifndef NDEBUG - union gl_constant_value *data_end = &data[num_data_slots]; -#endif - - parcel_out_uniform_storage parcel(prog, prog->UniformHash, uniforms, data); - unsigned total_entries = num_explicit_uniform_locs; - unsigned empty_locs = prog->NumUniformRemapTable - num_explicit_uniform_locs; - - for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { - if (prog->_LinkedShaders[i] == NULL) - continue; - - parcel.start_shader((gl_shader_stage)i); - - foreach_in_list(ir_instruction, node, prog->_LinkedShaders[i]->ir) { - ir_variable *const var = node->as_variable(); - - if ((var == NULL) || (var->data.mode != ir_var_uniform && - var->data.mode != ir_var_shader_storage)) - continue; - - parcel.set_and_process(var); - } - - prog->_LinkedShaders[i]->active_samplers = parcel.shader_samplers_used; - prog->_LinkedShaders[i]->shadow_samplers = parcel.shader_shadow_samplers; - - STATIC_ASSERT(sizeof(prog->_LinkedShaders[i]->SamplerTargets) == - sizeof(parcel.targets)); - memcpy(prog->_LinkedShaders[i]->SamplerTargets, parcel.targets, - sizeof(prog->_LinkedShaders[i]->SamplerTargets)); - } + unsigned empty_locs = + prog->NumUniformRemapTable - num_explicit_uniform_locs; /* Reserve all the explicit locations of the active uniforms. */ - for (unsigned i = 0; i < num_uniforms; i++) { - if (uniforms[i].type->is_subroutine() || - uniforms[i].is_shader_storage) + for (unsigned i = 0; i < prog->data->NumUniformStorage; i++) { + if (prog->data->UniformStorage[i].type->is_subroutine() || + prog->data->UniformStorage[i].is_shader_storage) continue; - if (uniforms[i].remap_location != UNMAPPED_UNIFORM_LOC) { + if (prog->data->UniformStorage[i].remap_location != + UNMAPPED_UNIFORM_LOC) { /* How many new entries for this uniform? */ - const unsigned entries = MAX2(1, uniforms[i].array_elements); + const unsigned entries = + MAX2(1, prog->data->UniformStorage[i].array_elements); /* Set remap table entries point to correct gl_uniform_storage. */ for (unsigned j = 0; j < entries; j++) { - unsigned element_loc = uniforms[i].remap_location + j; + unsigned element_loc = + prog->data->UniformStorage[i].remap_location + j; assert(prog->UniformRemapTable[element_loc] == INACTIVE_UNIFORM_EXPLICIT_LOCATION); - prog->UniformRemapTable[element_loc] = &uniforms[i]; + prog->UniformRemapTable[element_loc] = + &prog->data->UniformStorage[i]; } } } /* Reserve locations for rest of the uniforms. */ - for (unsigned i = 0; i < num_uniforms; i++) { + for (unsigned i = 0; i < prog->data->NumUniformStorage; i++) { - if (uniforms[i].type->is_subroutine() || - uniforms[i].is_shader_storage) + if (prog->data->UniformStorage[i].type->is_subroutine() || + prog->data->UniformStorage[i].is_shader_storage) continue; /* Built-in uniforms should not get any location. */ - if (uniforms[i].builtin) + if (prog->data->UniformStorage[i].builtin) continue; /* Explicit ones have been set already. */ - if (uniforms[i].remap_location != UNMAPPED_UNIFORM_LOC) + if (prog->data->UniformStorage[i].remap_location != UNMAPPED_UNIFORM_LOC) continue; /* how many new entries for this uniform? */ - const unsigned entries = MAX2(1, uniforms[i].array_elements); + const unsigned entries = + MAX2(1, prog->data->UniformStorage[i].array_elements); /* Find UniformRemapTable for empty blocks where we can fit this uniform. */ int chosen_location = -1; if (empty_locs) - chosen_location = find_empty_block(prog, &uniforms[i]); + chosen_location = find_empty_block(prog, &prog->data->UniformStorage[i]); /* Add new entries to the total amount of entries. */ total_entries += entries; @@ -1175,93 +1117,224 @@ /* set pointers for this uniform */ for (unsigned j = 0; j < entries; j++) - prog->UniformRemapTable[chosen_location + j] = &uniforms[i]; + prog->UniformRemapTable[chosen_location + j] = + &prog->data->UniformStorage[i]; /* set the base location in remap table for the uniform */ - uniforms[i].remap_location = chosen_location; + prog->data->UniformStorage[i].remap_location = chosen_location; } /* Verify that total amount of entries for explicit and implicit locations * is less than MAX_UNIFORM_LOCATIONS. */ - if (total_entries > max_uniform_locs) { + if (total_entries > ctx->Const.MaxUserAssignableUniformLocations) { linker_error(prog, "count of uniform locations > MAX_UNIFORM_LOCATIONS" - "(%u > %u)", total_entries, max_uniform_locs); + "(%u > %u)", total_entries, + ctx->Const.MaxUserAssignableUniformLocations); } /* Reserve all the explicit locations of the active subroutine uniforms. */ - for (unsigned i = 0; i < num_uniforms; i++) { - if (!uniforms[i].type->is_subroutine()) + for (unsigned i = 0; i < prog->data->NumUniformStorage; i++) { + if (!prog->data->UniformStorage[i].type->is_subroutine()) continue; - if (uniforms[i].remap_location == UNMAPPED_UNIFORM_LOC) + if (prog->data->UniformStorage[i].remap_location == UNMAPPED_UNIFORM_LOC) continue; - for (unsigned j = 0; j < MESA_SHADER_STAGES; j++) { - struct gl_shader *sh = prog->_LinkedShaders[j]; - if (!sh) - continue; + /* How many new entries for this uniform? */ + const unsigned entries = + MAX2(1, prog->data->UniformStorage[i].array_elements); + + unsigned mask = prog->data->linked_stages; + while (mask) { + const int j = u_bit_scan(&mask); + struct gl_program *p = prog->_LinkedShaders[j]->Program; - if (!uniforms[i].opaque[j].active) + if (!prog->data->UniformStorage[i].opaque[j].active) continue; - /* How many new entries for this uniform? */ - const unsigned entries = MAX2(1, uniforms[i].array_elements); - /* Set remap table entries point to correct gl_uniform_storage. */ for (unsigned k = 0; k < entries; k++) { - unsigned element_loc = uniforms[i].remap_location + k; - assert(sh->SubroutineUniformRemapTable[element_loc] == + unsigned element_loc = + prog->data->UniformStorage[i].remap_location + k; + assert(p->sh.SubroutineUniformRemapTable[element_loc] == INACTIVE_UNIFORM_EXPLICIT_LOCATION); - sh->SubroutineUniformRemapTable[element_loc] = &uniforms[i]; + p->sh.SubroutineUniformRemapTable[element_loc] = + &prog->data->UniformStorage[i]; } } } /* reserve subroutine locations */ - for (unsigned i = 0; i < num_uniforms; i++) { - - if (!uniforms[i].type->is_subroutine()) + for (unsigned i = 0; i < prog->data->NumUniformStorage; i++) { + if (!prog->data->UniformStorage[i].type->is_subroutine()) continue; - const unsigned entries = MAX2(1, uniforms[i].array_elements); - if (uniforms[i].remap_location != UNMAPPED_UNIFORM_LOC) + if (prog->data->UniformStorage[i].remap_location != + UNMAPPED_UNIFORM_LOC) continue; - for (unsigned j = 0; j < MESA_SHADER_STAGES; j++) { - struct gl_shader *sh = prog->_LinkedShaders[j]; - if (!sh) - continue; - if (!uniforms[i].opaque[j].active) + const unsigned entries = + MAX2(1, prog->data->UniformStorage[i].array_elements); + + unsigned mask = prog->data->linked_stages; + while (mask) { + const int j = u_bit_scan(&mask); + struct gl_program *p = prog->_LinkedShaders[j]->Program; + + if (!prog->data->UniformStorage[i].opaque[j].active) continue; - sh->SubroutineUniformRemapTable = - reralloc(sh, - sh->SubroutineUniformRemapTable, + p->sh.SubroutineUniformRemapTable = + reralloc(p, + p->sh.SubroutineUniformRemapTable, gl_uniform_storage *, - sh->NumSubroutineUniformRemapTable + entries); + p->sh.NumSubroutineUniformRemapTable + entries); + + for (unsigned k = 0; k < entries; k++) { + p->sh.SubroutineUniformRemapTable[p->sh.NumSubroutineUniformRemapTable + k] = + &prog->data->UniformStorage[i]; + } + prog->data->UniformStorage[i].remap_location = + p->sh.NumSubroutineUniformRemapTable; + p->sh.NumSubroutineUniformRemapTable += entries; + } + } +} + +static void +link_assign_uniform_storage(struct gl_context *ctx, + struct gl_shader_program *prog, + const unsigned num_data_slots, + unsigned num_explicit_uniform_locs) +{ + /* On the outside chance that there were no uniforms, bail out. + */ + if (prog->data->NumUniformStorage == 0) + return; + + unsigned int boolean_true = ctx->Const.UniformBooleanTrue; + + prog->data->UniformStorage = rzalloc_array(prog, struct gl_uniform_storage, + prog->data->NumUniformStorage); + union gl_constant_value *data = rzalloc_array(prog->data->UniformStorage, + union gl_constant_value, + num_data_slots); +#ifndef NDEBUG + union gl_constant_value *data_end = &data[num_data_slots]; +#endif + + parcel_out_uniform_storage parcel(prog, prog->UniformHash, + prog->data->UniformStorage, data); + + for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { + if (prog->_LinkedShaders[i] == NULL) + continue; + + parcel.start_shader((gl_shader_stage)i); + + foreach_in_list(ir_instruction, node, prog->_LinkedShaders[i]->ir) { + ir_variable *const var = node->as_variable(); + + if ((var == NULL) || (var->data.mode != ir_var_uniform && + var->data.mode != ir_var_shader_storage)) + continue; - for (unsigned k = 0; k < entries; k++) - sh->SubroutineUniformRemapTable[sh->NumSubroutineUniformRemapTable + k] = &uniforms[i]; - uniforms[i].remap_location = sh->NumSubroutineUniformRemapTable; - sh->NumSubroutineUniformRemapTable += entries; + parcel.set_and_process(var); } + + prog->_LinkedShaders[i]->Program->SamplersUsed = + parcel.shader_samplers_used; + prog->_LinkedShaders[i]->shadow_samplers = parcel.shader_shadow_samplers; + + STATIC_ASSERT(sizeof(prog->_LinkedShaders[i]->Program->sh.SamplerTargets) == + sizeof(parcel.targets)); + memcpy(prog->_LinkedShaders[i]->Program->sh.SamplerTargets, + parcel.targets, + sizeof(prog->_LinkedShaders[i]->Program->sh.SamplerTargets)); } #ifndef NDEBUG - for (unsigned i = 0; i < num_uniforms; i++) { - assert(uniforms[i].storage != NULL || uniforms[i].builtin); + for (unsigned i = 0; i < prog->data->NumUniformStorage; i++) { + assert(prog->data->UniformStorage[i].storage != NULL || + prog->data->UniformStorage[i].builtin || + prog->data->UniformStorage[i].is_shader_storage || + prog->data->UniformStorage[i].block_index != -1); } assert(parcel.values == data_end); #endif - prog->NumUniformStorage = num_uniforms; - prog->NumHiddenUniforms = hidden_uniforms; - prog->UniformStorage = uniforms; + link_setup_uniform_remap_tables(ctx, prog, num_explicit_uniform_locs); link_set_uniform_initializers(prog, boolean_true); +} + +void +link_assign_uniform_locations(struct gl_shader_program *prog, + struct gl_context *ctx, + unsigned int num_explicit_uniform_locs) +{ + ralloc_free(prog->data->UniformStorage); + prog->data->UniformStorage = NULL; + prog->data->NumUniformStorage = 0; + + if (prog->UniformHash != NULL) { + prog->UniformHash->clear(); + } else { + prog->UniformHash = new string_to_uint_map; + } + + /* First pass: Count the uniform resources used by the user-defined + * uniforms. While this happens, each active uniform will have an index + * assigned to it. + * + * Note: this is *NOT* the index that is returned to the application by + * glGetUniformLocation. + */ + struct string_to_uint_map *hiddenUniforms = new string_to_uint_map; + count_uniform_size uniform_size(prog->UniformHash, hiddenUniforms); + for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { + struct gl_linked_shader *sh = prog->_LinkedShaders[i]; + + if (sh == NULL) + continue; + + link_update_uniform_buffer_variables(sh, i); + + /* Reset various per-shader target counts. + */ + uniform_size.start_shader(); + + foreach_in_list(ir_instruction, node, sh->ir) { + ir_variable *const var = node->as_variable(); + + if ((var == NULL) || (var->data.mode != ir_var_uniform && + var->data.mode != ir_var_shader_storage)) + continue; + + uniform_size.process(var); + } + + sh->Program->info.num_textures = uniform_size.num_shader_samplers; + sh->Program->info.num_images = uniform_size.num_shader_images; + sh->num_uniform_components = uniform_size.num_shader_uniform_components; + sh->num_combined_uniform_components = sh->num_uniform_components; + + for (unsigned i = 0; i < sh->Program->info.num_ubos; i++) { + sh->num_combined_uniform_components += + sh->Program->sh.UniformBlocks[i]->UniformBufferSize / 4; + } + } + + prog->data->NumUniformStorage = uniform_size.num_active_uniforms; + prog->data->NumHiddenUniforms = uniform_size.num_hidden_uniforms; + + /* assign hidden uniforms a slot id */ + hiddenUniforms->iterate(assign_hidden_uniform_slot_id, &uniform_size); + delete hiddenUniforms; - return; + link_assign_uniform_storage(ctx, prog, uniform_size.num_values, + num_explicit_uniform_locs); } diff -Nru mesa-12.0.6/src/compiler/glsl/link_varyings.cpp mesa-17.0.7/src/compiler/glsl/link_varyings.cpp --- mesa-12.0.6/src/compiler/glsl/link_varyings.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/link_varyings.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -36,7 +36,7 @@ #include "linker.h" #include "link_varyings.h" #include "main/macros.h" -#include "program/hash_table.h" +#include "util/hash_table.h" #include "program.h" @@ -107,7 +107,7 @@ } bool -process_xfb_layout_qualifiers(void *mem_ctx, const gl_shader *sh, +process_xfb_layout_qualifiers(void *mem_ctx, const gl_linked_shader *sh, unsigned *num_tfeedback_decls, char ***varying_names) { @@ -118,7 +118,7 @@ * xfb_stride to interface block members so this will catch that case also. */ for (unsigned j = 0; j < MAX_FEEDBACK_BUFFERS; j++) { - if (sh->TransformFeedback.BufferStride[j]) { + if (sh->info.TransformFeedback.BufferStride[j]) { has_xfb_qualifiers = true; } } @@ -271,7 +271,7 @@ * OpenGLES 3.0 drivers, so we relax the checking in all cases. */ if (false /* always skip the centroid check */ && - prog->Version < (prog->IsES ? 310 : 430) && + prog->data->Version < (prog->IsES ? 310 : 430) && input->data.centroid != output->data.centroid) { linker_error(prog, "%s shader output `%s' %s centroid qualifier, " @@ -326,7 +326,7 @@ * and fragment shaders must match." */ if (input->data.invariant != output->data.invariant && - prog->Version < (prog->IsES ? 300 : 430)) { + prog->data->Version < (prog->IsES ? 300 : 430)) { linker_error(prog, "%s shader output `%s' %s invariant qualifier, " "but %s shader input %s invariant qualifier\n", @@ -348,7 +348,7 @@ * */ if (input->data.interpolation != output->data.interpolation && - prog->Version < 440) { + prog->data->Version < 440) { linker_error(prog, "%s shader output `%s' specifies %s " "interpolation qualifier, " @@ -388,7 +388,8 @@ */ void cross_validate_outputs_to_inputs(struct gl_shader_program *prog, - gl_shader *producer, gl_shader *consumer) + gl_linked_shader *producer, + gl_linked_shader *consumer) { glsl_symbol_table parameters; ir_variable *explicit_locations[MAX_VARYINGS_INCL_PATCH][4] = @@ -415,15 +416,15 @@ unsigned slot_limit = idx + num_elements; unsigned last_comp; - if (var->type->without_array()->is_record()) { + if (type->without_array()->is_record()) { /* The component qualifier can't be used on structs so just treat * all component slots as used. */ last_comp = 4; } else { - unsigned dmul = var->type->is_double() ? 2 : 1; + unsigned dmul = type->without_array()->is_64bit() ? 2 : 1; last_comp = var->data.location_frac + - var->type->without_array()->vector_elements * dmul; + type->without_array()->vector_elements * dmul; } while (idx < slot_limit) { @@ -443,7 +444,7 @@ for (unsigned j = 0; j < 4; j++) { if (explicit_locations[idx][j] && (explicit_locations[idx][j]->type->without_array() - ->base_type != var->type->without_array()->base_type)) { + ->base_type != type->without_array()->base_type)) { linker_error(prog, "Varyings sharing the same location must " "have the same underlying numerical type. " @@ -461,7 +462,7 @@ * worry about components beginning at anything other than 0 as * the spec does not allow this for dvec3 and dvec4. */ - if (i == 3 && last_comp > 4) { + if (i == 4 && last_comp > 4) { last_comp = last_comp - 4; /* Bump location index and reset the component index */ idx++; @@ -574,7 +575,7 @@ */ void remove_unused_shader_inputs_and_outputs(bool is_separate_shader_object, - gl_shader *sh, + gl_linked_shader *sh, enum ir_variable_mode mode) { if (is_separate_shader_object) @@ -592,6 +593,11 @@ */ if (var->data.is_unmatched_generic_inout && !var->data.is_xfb_only) { assert(var->data.mode != ir_var_temporary); + + /* Assign zeros to demoted inputs to allow more optimizations. */ + if (var->data.mode == ir_var_shader_in && !var->constant_value) + var->constant_value = ir_constant::zero(var, var->type); + var->data.mode = ir_var_auto; } } @@ -726,7 +732,7 @@ + this->matched_candidate->toplevel_var->data.location_frac + this->matched_candidate->offset; const unsigned dmul = - this->matched_candidate->type->without_array()->is_double() ? 2 : 1; + this->matched_candidate->type->without_array()->is_64bit() ? 2 : 1; if (this->matched_candidate->type->is_array()) { /* Array variable */ @@ -904,7 +910,7 @@ } if (explicit_stride && explicit_stride[buffer]) { - if (this->is_double() && info->Buffers[buffer].Stride % 2) { + if (this->is_64bit() && info->Buffers[buffer].Stride % 2) { linker_error(prog, "invalid qualifier xfb_stride=%d must be a " "multiple of 8 as its applied to a type that is or " "contains a double.", @@ -980,8 +986,11 @@ name = "gl_TessLevelInnerMESA"; break; } - this->matched_candidate = (const tfeedback_candidate *) - hash_table_find(tfeedback_candidates, name); + hash_entry *entry = _mesa_hash_table_search(tfeedback_candidates, name); + + this->matched_candidate = entry ? + (const tfeedback_candidate *) entry->data : NULL; + if (!this->matched_candidate) { /* From GL_EXT_transform_feedback: * A program will fail to link if: @@ -993,6 +1002,7 @@ linker_error(prog, "Transform feedback varying %s undeclared.", this->orig_name); } + return this->matched_candidate; } @@ -1053,7 +1063,8 @@ /** * Store transform feedback location assignments into - * prog->LinkedTransformFeedback based on the data stored in tfeedback_decls. + * prog->sh.LinkedTransformFeedback based on the data stored in + * tfeedback_decls. * * If an error occurs, the error is reported through linker_error() and false * is returned. @@ -1071,11 +1082,9 @@ bool separate_attribs_mode = prog->TransformFeedback.BufferMode == GL_SEPARATE_ATTRIBS; - ralloc_free(prog->LinkedTransformFeedback.Varyings); - ralloc_free(prog->LinkedTransformFeedback.Outputs); - - memset(&prog->LinkedTransformFeedback, 0, - sizeof(prog->LinkedTransformFeedback)); + struct gl_program *xfb_prog = prog->xfb_program; + xfb_prog->sh.LinkedTransformFeedback = + rzalloc(xfb_prog, struct gl_transform_feedback_info); /* The xfb_offset qualifier does not have to be used in increasing order * however some drivers expect to receive the list of transform feedback @@ -1085,9 +1094,8 @@ qsort(tfeedback_decls, num_tfeedback_decls, sizeof(*tfeedback_decls), cmp_xfb_offset); - prog->LinkedTransformFeedback.Varyings = - rzalloc_array(prog, - struct gl_transform_feedback_varying_info, + xfb_prog->sh.LinkedTransformFeedback->Varyings = + rzalloc_array(xfb_prog, struct gl_transform_feedback_varying_info, num_tfeedback_decls); unsigned num_outputs = 0; @@ -1096,9 +1104,8 @@ num_outputs += tfeedback_decls[i].get_num_outputs(); } - prog->LinkedTransformFeedback.Outputs = - rzalloc_array(prog, - struct gl_transform_feedback_output, + xfb_prog->sh.LinkedTransformFeedback->Outputs = + rzalloc_array(xfb_prog, struct gl_transform_feedback_output, num_outputs); unsigned num_buffers = 0; @@ -1107,7 +1114,8 @@ if (!has_xfb_qualifiers && separate_attribs_mode) { /* GL_SEPARATE_ATTRIBS */ for (unsigned i = 0; i < num_tfeedback_decls; ++i) { - if (!tfeedback_decls[i].store(ctx, prog, &prog->LinkedTransformFeedback, + if (!tfeedback_decls[i].store(ctx, prog, + xfb_prog->sh.LinkedTransformFeedback, num_buffers, num_buffers, num_outputs, NULL, has_xfb_qualifiers)) return false; @@ -1129,7 +1137,7 @@ if (prog->TransformFeedback.BufferStride[j]) { buffers |= 1 << j; explicit_stride[j] = true; - prog->LinkedTransformFeedback.Buffers[j].Stride = + xfb_prog->sh.LinkedTransformFeedback->Buffers[j].Stride = prog->TransformFeedback.BufferStride[j] / 4; } } @@ -1145,7 +1153,7 @@ if (tfeedback_decls[i].is_next_buffer_separator()) { if (!tfeedback_decls[i].store(ctx, prog, - &prog->LinkedTransformFeedback, + xfb_prog->sh.LinkedTransformFeedback, buffer, num_buffers, num_outputs, explicit_stride, has_xfb_qualifiers)) return false; @@ -1179,16 +1187,16 @@ buffers |= 1 << buffer; if (!tfeedback_decls[i].store(ctx, prog, - &prog->LinkedTransformFeedback, + xfb_prog->sh.LinkedTransformFeedback, buffer, num_buffers, num_outputs, explicit_stride, has_xfb_qualifiers)) return false; } } - assert(prog->LinkedTransformFeedback.NumOutputs == num_outputs); + assert(xfb_prog->sh.LinkedTransformFeedback->NumOutputs == num_outputs); - prog->LinkedTransformFeedback.ActiveBuffers = buffers; + xfb_prog->sh.LinkedTransformFeedback->ActiveBuffers = buffers; return true; } @@ -1207,6 +1215,7 @@ ~varying_matches(); void record(ir_variable *producer_var, ir_variable *consumer_var); unsigned assign_locations(struct gl_shader_program *prog, + uint8_t *components, uint64_t reserved_slots); void store_locations() const; @@ -1389,8 +1398,9 @@ (producer_var->type->contains_integer() || producer_var->type->contains_double()); - if (needs_flat_qualifier || - (consumer_stage != -1 && consumer_stage != MESA_SHADER_FRAGMENT)) { + if (!disable_varying_packing && + (needs_flat_qualifier || + (consumer_stage != -1 && consumer_stage != MESA_SHADER_FRAGMENT))) { /* Since this varying is not being consumed by the fragment shader, its * interpolation type varying cannot possibly affect rendering. * Also, this variable is non-flat and is (or contains) an integer @@ -1405,13 +1415,13 @@ if (producer_var) { producer_var->data.centroid = false; producer_var->data.sample = false; - producer_var->data.interpolation = INTERP_QUALIFIER_FLAT; + producer_var->data.interpolation = INTERP_MODE_FLAT; } if (consumer_var) { consumer_var->data.centroid = false; consumer_var->data.sample = false; - consumer_var->data.interpolation = INTERP_QUALIFIER_FLAT; + consumer_var->data.interpolation = INTERP_MODE_FLAT; } } @@ -1422,10 +1432,26 @@ sizeof(*this->matches) * this->matches_capacity); } - const ir_variable *const var = (producer_var != NULL) - ? producer_var : consumer_var; - const gl_shader_stage stage = (producer_var != NULL) - ? producer_stage : consumer_stage; + /* We must use the consumer to compute the packing class because in GL4.4+ + * there is no guarantee interpolation qualifiers will match across stages. + * + * From Section 4.5 (Interpolation Qualifiers) of the GLSL 4.30 spec: + * + * "The type and presence of interpolation qualifiers of variables with + * the same name declared in all linked shaders for the same cross-stage + * interface must match, otherwise the link command will fail. + * + * When comparing an output from one stage to an input of a subsequent + * stage, the input and output don't match if their interpolation + * qualifiers (or lack thereof) are not the same." + * + * This text was also in at least revison 7 of the 4.40 spec but is no + * longer in revision 9 and not in the 4.50 spec. + */ + const ir_variable *const var = (consumer_var != NULL) + ? consumer_var : producer_var; + const gl_shader_stage stage = (consumer_var != NULL) + ? consumer_stage : producer_stage; const glsl_type *type = get_varying_type(var, stage); this->matches[this->num_matches].packing_class @@ -1455,6 +1481,7 @@ */ unsigned varying_matches::assign_locations(struct gl_shader_program *prog, + uint8_t *components, uint64_t reserved_slots) { /* If packing has been disabled then we cannot safely sort the varyings by @@ -1519,14 +1546,16 @@ previous_var_xfb_only = var->data.is_xfb_only; - unsigned num_elements = type->count_attribute_slots(is_vertex_input); - unsigned slot_end; - if (this->disable_varying_packing && - !is_varying_packing_safe(type, var)) - slot_end = 4; - else - slot_end = type->without_array()->vector_elements; - slot_end += *location - 1; + /* The number of components taken up by this variable. For vertex shader + * inputs, we use the number of slots * 4, as they have different + * counting rules. + */ + unsigned num_components = is_vertex_input ? + type->count_attribute_slots(is_vertex_input) * 4 : + this->matches[i].num_components; + + /* The last slot for this variable, inclusive. */ + unsigned slot_end = *location + num_components - 1; /* FIXME: We could be smarter in the below code and loop back over * trying to fill any locations that we skipped because we couldn't pack @@ -1534,29 +1563,21 @@ * hit the linking error if we run out of room and suggest they use * explicit locations. */ - for (unsigned j = 0; j < num_elements; j++) { - while ((slot_end < MAX_VARYING * 4u) && - ((reserved_slots & (UINT64_C(1) << *location / 4u) || - (reserved_slots & (UINT64_C(1) << slot_end / 4u))))) { + while (slot_end < MAX_VARYING * 4u) { + const unsigned slots = (slot_end / 4u) - (*location / 4u) + 1; + const uint64_t slot_mask = ((1ull << slots) - 1) << (*location / 4u); + assert(slots > 0); + if (reserved_slots & slot_mask) { *location = ALIGN(*location + 1, 4); - slot_end = *location; - - /* reset the counter and try again */ - j = 0; + slot_end = *location + num_components - 1; + continue; } - /* Increase the slot to make sure there is enough room for next - * array element. - */ - if (this->disable_varying_packing && - !is_varying_packing_safe(type, var)) - slot_end += 4; - else - slot_end += type->without_array()->vector_elements; + break; } - if (!var->data.patch && *location >= MAX_VARYING * 4u) { + if (!var->data.patch && slot_end >= MAX_VARYING * 4u) { linker_error(prog, "insufficient contiguous locations available for " "%s it is possible an array or struct could not be " "packed between varyings with explicit locations. Try " @@ -1564,9 +1585,15 @@ var->name); } + if (slot_end < MAX_VARYINGS_INCL_PATCH * 4u) { + for (unsigned j = *location / 4u; j < slot_end / 4u; j++) + components[j] = 4; + components[slot_end / 4u] = (slot_end & 3) + 1; + } + this->matches[i].generic_location = *location; - *location += this->matches[i].num_components; + *location = slot_end + 1; } return (generic_location + 3) / 4; @@ -1629,7 +1656,7 @@ (var->data.patch << 2); packing_class *= 4; packing_class += var->is_interpolation_flat() - ? unsigned(INTERP_QUALIFIER_FLAT) : var->data.interpolation; + ? unsigned(INTERP_MODE_FLAT) : var->data.interpolation; return packing_class; } @@ -1759,20 +1786,22 @@ private: virtual void visit_field(const glsl_type *type, const char *name, - bool row_major) + bool /* row_major */, + const glsl_type * /* record_type */, + const enum glsl_interface_packing, + bool /* last_field */) { assert(!type->without_array()->is_record()); assert(!type->without_array()->is_interface()); - (void) row_major; - tfeedback_candidate *candidate = rzalloc(this->mem_ctx, tfeedback_candidate); candidate->toplevel_var = this->toplevel_var; candidate->type = type; candidate->offset = this->varying_floats; - hash_table_insert(this->tfeedback_candidates, candidate, - ralloc_strdup(this->mem_ctx, name)); + _mesa_hash_table_insert(this->tfeedback_candidates, + ralloc_strdup(this->mem_ctx, name), + candidate); this->varying_floats += type->component_slots(); } @@ -1843,11 +1872,12 @@ ralloc_asprintf(mem_ctx, "%s.%s", input_var->get_interface_type()->without_array()->name, input_var->name); - hash_table_insert(consumer_interface_inputs, input_var, - iface_field_name); + _mesa_hash_table_insert(consumer_interface_inputs, + iface_field_name, input_var); } else { - hash_table_insert(consumer_inputs, input_var, - ralloc_strdup(mem_ctx, input_var->name)); + _mesa_hash_table_insert(consumer_inputs, + ralloc_strdup(mem_ctx, input_var->name), + input_var); } } } @@ -1875,12 +1905,11 @@ ralloc_asprintf(mem_ctx, "%s.%s", output_var->get_interface_type()->without_array()->name, output_var->name); - input_var = - (ir_variable *) hash_table_find(consumer_interface_inputs, - iface_field_name); + hash_entry *entry = _mesa_hash_table_search(consumer_interface_inputs, iface_field_name); + input_var = entry ? (ir_variable *) entry->data : NULL; } else { - input_var = - (ir_variable *) hash_table_find(consumer_inputs, output_var->name); + hash_entry *entry = _mesa_hash_table_search(consumer_inputs, output_var->name); + input_var = entry ? (ir_variable *) entry->data : NULL; } return (input_var == NULL || input_var->data.mode != ir_var_shader_in) @@ -1956,8 +1985,9 @@ * 64 bit map. Per-vertex and per-patch both have separate location domains * with a max of MAX_VARYING. */ -static uint64_t -reserved_varying_slot(struct gl_shader *stage, ir_variable_mode io_mode) +uint64_t +reserved_varying_slot(struct gl_linked_shader *stage, + ir_variable_mode io_mode) { assert(io_mode == ir_var_shader_in || io_mode == ir_var_shader_out); /* Avoid an overflow of the returned value */ @@ -2016,9 +2046,11 @@ assign_varying_locations(struct gl_context *ctx, void *mem_ctx, struct gl_shader_program *prog, - gl_shader *producer, gl_shader *consumer, + gl_linked_shader *producer, + gl_linked_shader *consumer, unsigned num_tfeedback_decls, - tfeedback_decl *tfeedback_decls) + tfeedback_decl *tfeedback_decls, + const uint64_t reserved_slots) { /* Tessellation shaders treat inputs and outputs as shared memory and can * access inputs and outputs of other invocations. @@ -2037,51 +2069,32 @@ bool xfb_enabled = ctx->Extensions.EXT_transform_feedback && !unpackable_tess; - /* Disable varying packing for GL 4.4+ as there is no guarantee - * that interpolation qualifiers will match between shaders in these - * versions. We also disable packing on outward facing interfaces for - * SSO because in ES we need to retain the unpacked varying information - * for draw time validation. For desktop GL we could allow packing for - * versions < 4.4 but it's just safer not to do packing. + /* Disable packing on outward facing interfaces for SSO because in ES we + * need to retain the unpacked varying information for draw time + * validation. * * Packing is still enabled on individual arrays, structs, and matrices as * these are required by the transform feedback code and it is still safe * to do so. We also enable packing when a varying is only used for * transform feedback and its not a SSO. - * - * Varying packing currently only packs together varyings with matching - * interpolation qualifiers as the backends assume all packed components - * are to be processed in the same way. Therefore we cannot do packing in - * these versions of GL without the risk of mismatching interfaces. - * - * From Section 4.5 (Interpolation Qualifiers) of the GLSL 4.30 spec: - * - * "The type and presence of interpolation qualifiers of variables with - * the same name declared in all linked shaders for the same cross-stage - * interface must match, otherwise the link command will fail. - * - * When comparing an output from one stage to an input of a subsequent - * stage, the input and output don't match if their interpolation - * qualifiers (or lack thereof) are not the same." - * - * This text was also in at least revison 7 of the 4.40 spec but is no - * longer in revision 9 and not in the 4.50 spec. */ bool disable_varying_packing = ctx->Const.DisableVaryingPacking || unpackable_tess; - if ((ctx->API == API_OPENGL_CORE && ctx->Version >= 44) || - (prog->SeparateShader && (producer == NULL || consumer == NULL))) + if (prog->SeparateShader && (producer == NULL || consumer == NULL)) disable_varying_packing = true; varying_matches matches(disable_varying_packing, xfb_enabled, producer ? producer->Stage : (gl_shader_stage)-1, consumer ? consumer->Stage : (gl_shader_stage)-1); - hash_table *tfeedback_candidates - = hash_table_ctor(0, hash_table_string_hash, hash_table_string_compare); - hash_table *consumer_inputs - = hash_table_ctor(0, hash_table_string_hash, hash_table_string_compare); - hash_table *consumer_interface_inputs - = hash_table_ctor(0, hash_table_string_hash, hash_table_string_compare); + hash_table *tfeedback_candidates = + _mesa_hash_table_create(NULL, _mesa_key_hash_string, + _mesa_key_string_equal); + hash_table *consumer_inputs = + _mesa_hash_table_create(NULL, _mesa_key_hash_string, + _mesa_key_string_equal); + hash_table *consumer_interface_inputs = + _mesa_hash_table_create(NULL, _mesa_key_hash_string, + _mesa_key_string_equal); ir_variable *consumer_inputs_with_locations[VARYING_SLOT_TESS_MAX] = { NULL, }; @@ -2147,7 +2160,7 @@ * within a patch and can be used as shared memory. */ if (input_var || (prog->SeparateShader && consumer == NULL) || - producer->Type == GL_TESS_CONTROL_SHADER) { + producer->Stage == MESA_SHADER_TESS_CTRL) { matches.record(output_var, input_var); } @@ -2176,6 +2189,9 @@ } } + _mesa_hash_table_destroy(consumer_inputs, NULL); + _mesa_hash_table_destroy(consumer_interface_inputs, NULL); + for (unsigned i = 0; i < num_tfeedback_decls; ++i) { if (!tfeedback_decls[i].is_varying()) continue; @@ -2184,9 +2200,7 @@ = tfeedback_decls[i].find_candidate(prog, tfeedback_candidates); if (matched_candidate == NULL) { - hash_table_dtor(tfeedback_candidates); - hash_table_dtor(consumer_inputs); - hash_table_dtor(consumer_interface_inputs); + _mesa_hash_table_destroy(tfeedback_candidates, NULL); return false; } @@ -2196,11 +2210,9 @@ } } - const uint64_t reserved_slots = - reserved_varying_slot(producer, ir_var_shader_out) | - reserved_varying_slot(consumer, ir_var_shader_in); - - const unsigned slots_used = matches.assign_locations(prog, reserved_slots); + uint8_t components[MAX_VARYINGS_INCL_PATCH] = {0}; + const unsigned slots_used = matches.assign_locations( + prog, components, reserved_slots); matches.store_locations(); for (unsigned i = 0; i < num_tfeedback_decls; ++i) { @@ -2208,16 +2220,11 @@ continue; if (!tfeedback_decls[i].assign_location(ctx, prog)) { - hash_table_dtor(tfeedback_candidates); - hash_table_dtor(consumer_inputs); - hash_table_dtor(consumer_interface_inputs); + _mesa_hash_table_destroy(tfeedback_candidates, NULL); return false; } } - - hash_table_dtor(tfeedback_candidates); - hash_table_dtor(consumer_inputs); - hash_table_dtor(consumer_interface_inputs); + _mesa_hash_table_destroy(tfeedback_candidates, NULL); if (consumer && producer) { foreach_in_list(ir_instruction, node, consumer->ir) { @@ -2225,7 +2232,7 @@ if (var && var->data.mode == ir_var_shader_in && var->data.is_unmatched_generic_inout) { - if (!prog->IsES && prog->Version <= 120) { + if (!prog->IsES && prog->data->Version <= 120) { /* On page 25 (page 31 of the PDF) of the GLSL 1.20 spec: * * Only those varying variables used (i.e. read) in @@ -2265,13 +2272,13 @@ } if (producer) { - lower_packed_varyings(mem_ctx, slots_used, ir_var_shader_out, + lower_packed_varyings(mem_ctx, slots_used, components, ir_var_shader_out, 0, producer, disable_varying_packing, xfb_enabled); } if (consumer) { - lower_packed_varyings(mem_ctx, slots_used, ir_var_shader_in, + lower_packed_varyings(mem_ctx, slots_used, components, ir_var_shader_in, consumer_vertices, consumer, disable_varying_packing, xfb_enabled); } @@ -2282,14 +2289,16 @@ bool check_against_output_limit(struct gl_context *ctx, struct gl_shader_program *prog, - gl_shader *producer) + gl_linked_shader *producer, + unsigned num_explicit_locations) { - unsigned output_vectors = 0; + unsigned output_vectors = num_explicit_locations; foreach_in_list(ir_instruction, node, producer->ir) { ir_variable *const var = node->as_variable(); - if (var && var->data.mode == ir_var_shader_out && + if (var && !var->data.explicit_location && + var->data.mode == ir_var_shader_out && var_counts_against_varying_limit(producer->Stage, var)) { /* outputs for fragment shader can't be doubles */ output_vectors += var->type->count_attribute_slots(false); @@ -2324,14 +2333,16 @@ bool check_against_input_limit(struct gl_context *ctx, struct gl_shader_program *prog, - gl_shader *consumer) + gl_linked_shader *consumer, + unsigned num_explicit_locations) { - unsigned input_vectors = 0; + unsigned input_vectors = num_explicit_locations; foreach_in_list(ir_instruction, node, consumer->ir) { ir_variable *const var = node->as_variable(); - if (var && var->data.mode == ir_var_shader_in && + if (var && !var->data.explicit_location && + var->data.mode == ir_var_shader_in && var_counts_against_varying_limit(consumer->Stage, var)) { /* vertex inputs aren't varying counted */ input_vectors += var->type->count_attribute_slots(false); diff -Nru mesa-12.0.6/src/compiler/glsl/link_varyings.h mesa-17.0.7/src/compiler/glsl/link_varyings.h --- mesa-12.0.6/src/compiler/glsl/link_varyings.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/link_varyings.h 2017-06-01 10:37:10.000000000 +0000 @@ -151,7 +151,7 @@ return this->size; else return this->vector_elements * this->matrix_columns * this->size * - (this->is_double() ? 2 : 1); + (this->is_64bit() ? 2 : 1); } unsigned get_location() const { @@ -160,7 +160,7 @@ private: - bool is_double() const + bool is_64bit() const { switch (this->type) { case GL_DOUBLE: @@ -291,7 +291,8 @@ void cross_validate_outputs_to_inputs(struct gl_shader_program *prog, - gl_shader *producer, gl_shader *consumer); + gl_linked_shader *producer, + gl_linked_shader *consumer); bool parse_tfeedback_decls(struct gl_context *ctx, struct gl_shader_program *prog, @@ -299,13 +300,13 @@ char **varying_names, tfeedback_decl *decls); bool -process_xfb_layout_qualifiers(void *mem_ctx, const gl_shader *sh, +process_xfb_layout_qualifiers(void *mem_ctx, const gl_linked_shader *sh, unsigned *num_tfeedback_decls, char ***varying_names); void remove_unused_shader_inputs_and_outputs(bool is_separate_shader_object, - gl_shader *sh, + gl_linked_shader *sh, enum ir_variable_mode mode); bool @@ -318,18 +319,26 @@ assign_varying_locations(struct gl_context *ctx, void *mem_ctx, struct gl_shader_program *prog, - gl_shader *producer, gl_shader *consumer, + gl_linked_shader *producer, + gl_linked_shader *consumer, unsigned num_tfeedback_decls, - tfeedback_decl *tfeedback_decls); + tfeedback_decl *tfeedback_decls, + const uint64_t reserved_slots); + +uint64_t +reserved_varying_slot(struct gl_linked_shader *stage, + ir_variable_mode io_mode); bool check_against_output_limit(struct gl_context *ctx, struct gl_shader_program *prog, - gl_shader *producer); + gl_linked_shader *producer, + unsigned num_explicit_locations); bool check_against_input_limit(struct gl_context *ctx, struct gl_shader_program *prog, - gl_shader *consumer); + gl_linked_shader *consumer, + unsigned num_explicit_locations); #endif /* GLSL_LINK_VARYINGS_H */ diff -Nru mesa-12.0.6/src/compiler/glsl/list.h mesa-17.0.7/src/compiler/glsl/list.h --- mesa-12.0.6/src/compiler/glsl/list.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/list.h 2017-06-01 10:37:10.000000000 +0000 @@ -32,36 +32,12 @@ * * A list is empty if either the head sentinel's \c next pointer points to the * tail sentinel or the tail sentinel's \c prev poiner points to the head - * sentinel. - * - * Instead of tracking two separate \c node structures and a \c list structure - * that points to them, the sentinel nodes are in a single structure. Noting - * that each sentinel node always has one \c NULL pointer, the \c NULL - * pointers occupy the same memory location. In the \c list structure - * contains a the following: - * - * - A \c head pointer that represents the \c next pointer of the - * head sentinel node. - * - A \c tail pointer that represents the \c prev pointer of the head - * sentinel node and the \c next pointer of the tail sentinel node. This - * pointer is \b always \c NULL. - * - A \c tail_prev pointer that represents the \c prev pointer of the - * tail sentinel node. - * - * Therefore, if \c head->next is \c NULL or \c tail_prev->prev is \c NULL, - * the list is empty. + * sentinel. The head sentinel and tail sentinel nodes are allocated within the + * list structure. * * Do note that this means that the list nodes will contain pointers into the * list structure itself and as a result you may not \c realloc() an \c * exec_list or any structure in which an \c exec_list is embedded. - * - * To anyone familiar with "exec lists" on the Amiga, this structure should - * be immediately recognizable. See the following link for the original Amiga - * operating system documentation on the subject. - * - * http://www.natami.net/dev/Libraries_Manual_guide/node02D7.html - * - * \author Ian Romanick */ #pragma once @@ -80,7 +56,7 @@ struct exec_node *prev; #ifdef __cplusplus - DECLARE_RALLOC_CXX_OPERATORS(exec_node) + DECLARE_RZALLOC_CXX_OPERATORS(exec_node) exec_node() : next(NULL), prev(NULL) { @@ -307,9 +283,8 @@ #endif struct exec_list { - struct exec_node *head; - struct exec_node *tail; - struct exec_node *tail_pred; + struct exec_node head_sentinel; + struct exec_node tail_sentinel; #ifdef __cplusplus DECLARE_RALLOC_CXX_OPERATORS(exec_list) @@ -325,9 +300,13 @@ const exec_node *get_head() const; exec_node *get_head(); + const exec_node *get_head_raw() const; + exec_node *get_head_raw(); const exec_node *get_tail() const; exec_node *get_tail(); + const exec_node *get_tail_raw() const; + exec_node *get_tail_raw(); unsigned length() const; @@ -366,9 +345,10 @@ static inline void exec_list_make_empty(struct exec_list *list) { - list->head = (struct exec_node *) & list->tail; - list->tail = NULL; - list->tail_pred = (struct exec_node *) & list->head; + list->head_sentinel.next = &list->tail_sentinel; + list->head_sentinel.prev = NULL; + list->tail_sentinel.next = NULL; + list->tail_sentinel.prev = &list->head_sentinel; } static inline bool @@ -376,39 +356,63 @@ { /* There are three ways to test whether a list is empty or not. * - * - Check to see if the \c head points to the \c tail. - * - Check to see if the \c tail_pred points to the \c head. - * - Check to see if the \c head is the sentinel node by test whether its + * - Check to see if the head sentinel's \c next is the tail sentinel. + * - Check to see if the tail sentinel's \c prev is the head sentinel. + * - Check to see if the head is the sentinel node by test whether its * \c next pointer is \c NULL. * * The first two methods tend to generate better code on modern systems * because they save a pointer dereference. */ - return list->head == (struct exec_node *) &list->tail; + return list->head_sentinel.next == &list->tail_sentinel; } static inline const struct exec_node * exec_list_get_head_const(const struct exec_list *list) { - return !exec_list_is_empty(list) ? list->head : NULL; + return !exec_list_is_empty(list) ? list->head_sentinel.next : NULL; } static inline struct exec_node * exec_list_get_head(struct exec_list *list) { - return !exec_list_is_empty(list) ? list->head : NULL; + return !exec_list_is_empty(list) ? list->head_sentinel.next : NULL; +} + +static inline const struct exec_node * +exec_list_get_head_raw_const(const struct exec_list *list) +{ + return list->head_sentinel.next; +} + +static inline struct exec_node * +exec_list_get_head_raw(struct exec_list *list) +{ + return list->head_sentinel.next; } static inline const struct exec_node * exec_list_get_tail_const(const struct exec_list *list) { - return !exec_list_is_empty(list) ? list->tail_pred : NULL; + return !exec_list_is_empty(list) ? list->tail_sentinel.prev : NULL; } static inline struct exec_node * exec_list_get_tail(struct exec_list *list) { - return !exec_list_is_empty(list) ? list->tail_pred : NULL; + return !exec_list_is_empty(list) ? list->tail_sentinel.prev : NULL; +} + +static inline const struct exec_node * +exec_list_get_tail_raw_const(const struct exec_list *list) +{ + return list->tail_sentinel.prev; +} + +static inline struct exec_node * +exec_list_get_tail_raw(struct exec_list *list) +{ + return list->tail_sentinel.prev; } static inline unsigned @@ -417,7 +421,7 @@ unsigned size = 0; struct exec_node *node; - for (node = list->head; node->next != NULL; node = node->next) { + for (node = list->head_sentinel.next; node->next != NULL; node = node->next) { size++; } @@ -427,21 +431,21 @@ static inline void exec_list_push_head(struct exec_list *list, struct exec_node *n) { - n->next = list->head; - n->prev = (struct exec_node *) &list->head; + n->next = list->head_sentinel.next; + n->prev = &list->head_sentinel; n->next->prev = n; - list->head = n; + list->head_sentinel.next = n; } static inline void exec_list_push_tail(struct exec_list *list, struct exec_node *n) { - n->next = (struct exec_node *) &list->tail; - n->prev = list->tail_pred; + n->next = &list->tail_sentinel; + n->prev = list->tail_sentinel.prev; n->prev->next = n; - list->tail_pred = n; + list->tail_sentinel.prev = n; } static inline void @@ -449,10 +453,10 @@ { assert(n->prev->next == n); - n->prev->next = list->head; - list->head->prev = n->prev; - n->prev = (struct exec_node *) &list->head; - list->head = n; + n->prev->next = list->head_sentinel.next; + list->head_sentinel.next->prev = n->prev; + n->prev = &list->head_sentinel; + list->head_sentinel.next = n; } static inline struct exec_node * @@ -471,12 +475,13 @@ if (exec_list_is_empty(list)) { exec_list_make_empty(target); } else { - target->head = list->head; - target->tail = NULL; - target->tail_pred = list->tail_pred; + target->head_sentinel.next = list->head_sentinel.next; + target->head_sentinel.prev = NULL; + target->tail_sentinel.next = NULL; + target->tail_sentinel.prev = list->tail_sentinel.prev; - target->head->prev = (struct exec_node *) &target->head; - target->tail_pred->next = (struct exec_node *) &target->tail; + target->head_sentinel.next->prev = &target->head_sentinel; + target->tail_sentinel.prev->next = &target->tail_sentinel; exec_list_make_empty(list); } @@ -490,13 +495,13 @@ /* Link the first node of the source with the last node of the target list. */ - list->tail_pred->next = source->head; - source->head->prev = list->tail_pred; + list->tail_sentinel.prev->next = source->head_sentinel.next; + source->head_sentinel.next->prev = list->tail_sentinel.prev; /* Make the tail of the source list be the tail of the target list. */ - list->tail_pred = source->tail_pred; - list->tail_pred->next = (struct exec_node *) &list->tail; + list->tail_sentinel.prev = source->tail_sentinel.prev; + list->tail_sentinel.prev->next = &list->tail_sentinel; /* Make the source list empty for good measure. */ @@ -516,11 +521,11 @@ if (exec_list_is_empty(before)) return; - before->tail_pred->next = n; - before->head->prev = n->prev; + before->tail_sentinel.prev->next = n; + before->head_sentinel.next->prev = n->prev; - n->prev->next = before->head; - n->prev = before->tail_pred; + n->prev->next = before->head_sentinel.next; + n->prev = before->tail_sentinel.prev; exec_list_make_empty(before); } @@ -530,15 +535,16 @@ { const struct exec_node *node; - assert(list->head->prev == (const struct exec_node *) &list->head); - assert(list->tail == NULL); - assert(list->tail_pred->next == (const struct exec_node *) &list->tail); + assert(list->head_sentinel.next->prev == &list->head_sentinel); + assert(list->head_sentinel.prev == NULL); + assert(list->tail_sentinel.next == NULL); + assert(list->tail_sentinel.prev->next == &list->tail_sentinel); /* We could try to use one of the interators below for this but they all * either require C++ or assume the exec_node is embedded in a structure * which is not the case for this function. */ - for (node = list->head; node->next != NULL; node = node->next) { + for (node = list->head_sentinel.next; node->next != NULL; node = node->next) { assert(node->next->prev == node); assert(node->prev->next == node); } @@ -565,6 +571,16 @@ return exec_list_get_head(this); } +inline const exec_node *exec_list::get_head_raw() const +{ + return exec_list_get_head_raw_const(this); +} + +inline exec_node *exec_list::get_head_raw() +{ + return exec_list_get_head_raw(this); +} + inline const exec_node *exec_list::get_tail() const { return exec_list_get_tail_const(this); @@ -575,6 +591,16 @@ return exec_list_get_tail(this); } +inline const exec_node *exec_list::get_tail_raw() const +{ + return exec_list_get_tail_raw_const(this); +} + +inline exec_node *exec_list::get_tail_raw() +{ + return exec_list_get_tail_raw(this); +} + inline unsigned exec_list::length() const { return exec_list_length(this); @@ -622,12 +648,12 @@ #endif #define foreach_in_list(__type, __inst, __list) \ - for (__type *(__inst) = (__type *)(__list)->head; \ + for (__type *(__inst) = (__type *)(__list)->head_sentinel.next; \ !(__inst)->is_tail_sentinel(); \ (__inst) = (__type *)(__inst)->next) #define foreach_in_list_reverse(__type, __inst, __list) \ - for (__type *(__inst) = (__type *)(__list)->tail_pred; \ + for (__type *(__inst) = (__type *)(__list)->tail_sentinel.prev; \ !(__inst)->is_head_sentinel(); \ (__inst) = (__type *)(__inst)->prev) @@ -635,20 +661,20 @@ * This version is safe even if the current node is removed. */ #define foreach_in_list_safe(__type, __node, __list) \ - for (__type *__node = (__type *)(__list)->head, \ + for (__type *__node = (__type *)(__list)->head_sentinel.next, \ *__next = (__type *)__node->next; \ __next != NULL; \ __node = __next, __next = (__type *)__next->next) #define foreach_in_list_reverse_safe(__type, __node, __list) \ - for (__type *__node = (__type *)(__list)->tail_pred, \ + for (__type *__node = (__type *)(__list)->tail_sentinel.prev, \ *__prev = (__type *)__node->prev; \ __prev != NULL; \ __node = __prev, __prev = (__type *)__prev->prev) #define foreach_in_list_use_after(__type, __inst, __list) \ __type *(__inst); \ - for ((__inst) = (__type *)(__list)->head; \ + for ((__inst) = (__type *)(__list)->head_sentinel.next; \ !(__inst)->is_tail_sentinel(); \ (__inst) = (__type *)(__inst)->next) /** @@ -657,8 +683,8 @@ * This is safe against either current node being removed or replaced. */ #define foreach_two_lists(__node1, __list1, __node2, __list2) \ - for (struct exec_node * __node1 = (__list1)->head, \ - * __node2 = (__list2)->head, \ + for (struct exec_node * __node1 = (__list1)->head_sentinel.next, \ + * __node2 = (__list2)->head_sentinel.next, \ * __next1 = __node1->next, \ * __next2 = __node2->next \ ; __next1 != NULL && __next2 != NULL \ @@ -669,19 +695,19 @@ #define foreach_list_typed(__type, __node, __field, __list) \ for (__type * __node = \ - exec_node_data(__type, (__list)->head, __field); \ + exec_node_data(__type, (__list)->head_sentinel.next, __field); \ (__node)->__field.next != NULL; \ (__node) = exec_node_data(__type, (__node)->__field.next, __field)) #define foreach_list_typed_reverse(__type, __node, __field, __list) \ for (__type * __node = \ - exec_node_data(__type, (__list)->tail_pred, __field); \ + exec_node_data(__type, (__list)->tail_sentinel.prev, __field); \ (__node)->__field.prev != NULL; \ (__node) = exec_node_data(__type, (__node)->__field.prev, __field)) #define foreach_list_typed_safe(__type, __node, __field, __list) \ for (__type * __node = \ - exec_node_data(__type, (__list)->head, __field), \ + exec_node_data(__type, (__list)->head_sentinel.next, __field), \ * __next = \ exec_node_data(__type, (__node)->__field.next, __field); \ (__node)->__field.next != NULL; \ @@ -690,7 +716,7 @@ #define foreach_list_typed_reverse_safe(__type, __node, __field, __list) \ for (__type * __node = \ - exec_node_data(__type, (__list)->tail_pred, __field), \ + exec_node_data(__type, (__list)->tail_sentinel.prev, __field), \ * __prev = \ exec_node_data(__type, (__node)->__field.prev, __field); \ (__node)->__field.prev != NULL; \ diff -Nru mesa-12.0.6/src/compiler/glsl/loop_analysis.cpp mesa-17.0.7/src/compiler/glsl/loop_analysis.cpp --- mesa-12.0.6/src/compiler/glsl/loop_analysis.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/loop_analysis.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -75,8 +75,8 @@ loop_state::loop_state() { - this->ht = hash_table_ctor(0, hash_table_pointer_hash, - hash_table_pointer_compare); + this->ht = _mesa_hash_table_create(NULL, _mesa_hash_pointer, + _mesa_key_pointer_equal); this->mem_ctx = ralloc_context(NULL); this->loop_found = false; } @@ -84,7 +84,7 @@ loop_state::~loop_state() { - hash_table_dtor(this->ht); + _mesa_hash_table_destroy(this->ht, NULL); ralloc_free(this->mem_ctx); } @@ -94,7 +94,7 @@ { loop_variable_state *ls = new(this->mem_ctx) loop_variable_state; - hash_table_insert(this->ht, ls, ir); + _mesa_hash_table_insert(this->ht, ir, ls); this->loop_found = true; return ls; @@ -104,14 +104,16 @@ loop_variable_state * loop_state::get(const ir_loop *ir) { - return (loop_variable_state *) hash_table_find(this->ht, ir); + hash_entry *entry = _mesa_hash_table_search(this->ht, ir); + return entry ? (loop_variable_state *) entry->data : NULL; } loop_variable * loop_variable_state::get(const ir_variable *ir) { - return (loop_variable *) hash_table_find(this->var_hash, ir); + hash_entry *entry = _mesa_hash_table_search(this->var_hash, ir); + return entry ? (loop_variable *) entry->data : NULL; } @@ -123,7 +125,7 @@ lv->var = var; - hash_table_insert(this->var_hash, lv, lv->var); + _mesa_hash_table_insert(this->var_hash, lv->var, lv); this->variables.push_tail(lv); return lv; @@ -518,8 +520,9 @@ virtual ir_visitor_status visit(ir_dereference_variable *ir) { - loop_variable *lv = - (loop_variable *) hash_table_find(this->loop_variables, ir->var); + hash_entry *entry = _mesa_hash_table_search(this->loop_variables, + ir->var); + loop_variable *lv = entry ? (loop_variable *) entry->data : NULL; assert(lv != NULL); @@ -576,8 +579,8 @@ if (inc->as_constant() == NULL) { ir_variable *const inc_var = inc->variable_referenced(); if (inc_var != NULL) { - loop_variable *lv = - (loop_variable *) hash_table_find(var_hash, inc_var); + hash_entry *entry = _mesa_hash_table_search(var_hash, inc_var); + loop_variable *lv = entry ? (loop_variable *) entry->data : NULL; if (lv == NULL || !lv->is_loop_constant()) { assert(lv != NULL); diff -Nru mesa-12.0.6/src/compiler/glsl/loop_analysis.h mesa-17.0.7/src/compiler/glsl/loop_analysis.h --- mesa-12.0.6/src/compiler/glsl/loop_analysis.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/loop_analysis.h 2017-06-01 10:37:10.000000000 +0000 @@ -27,7 +27,7 @@ #define LOOP_ANALYSIS_H #include "ir.h" -#include "program/hash_table.h" +#include "util/hash_table.h" /** * Analyze and classify all variables used in all loops in the instruction list @@ -130,14 +130,14 @@ { this->num_loop_jumps = 0; this->contains_calls = false; - this->var_hash = hash_table_ctor(0, hash_table_pointer_hash, - hash_table_pointer_compare); + this->var_hash = _mesa_hash_table_create(NULL, _mesa_hash_pointer, + _mesa_key_pointer_equal); this->limiting_terminator = NULL; } ~loop_variable_state() { - hash_table_dtor(this->var_hash); + _mesa_hash_table_destroy(this->var_hash, NULL); } DECLARE_RALLOC_CXX_OPERATORS(loop_variable_state) diff -Nru mesa-12.0.6/src/compiler/glsl/lower_blend_equation_advanced.cpp mesa-17.0.7/src/compiler/glsl/lower_blend_equation_advanced.cpp --- mesa-12.0.6/src/compiler/glsl/lower_blend_equation_advanced.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/lower_blend_equation_advanced.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,569 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include "ir.h" +#include "ir_builder.h" +#include "ir_optimization.h" +#include "ir_hierarchical_visitor.h" +#include "program/prog_instruction.h" +#include "program/prog_statevars.h" +#include "util/bitscan.h" + +using namespace ir_builder; + +#define imm1(x) new(mem_ctx) ir_constant((float) (x), 1) +#define imm3(x) new(mem_ctx) ir_constant((float) (x), 3) + +static ir_rvalue * +blend_multiply(ir_variable *src, ir_variable *dst) +{ + /* f(Cs,Cd) = Cs*Cd */ + return mul(src, dst); +} + +static ir_rvalue * +blend_screen(ir_variable *src, ir_variable *dst) +{ + /* f(Cs,Cd) = Cs+Cd-Cs*Cd */ + return sub(add(src, dst), mul(src, dst)); +} + +static ir_rvalue * +blend_overlay(ir_variable *src, ir_variable *dst) +{ + void *mem_ctx = ralloc_parent(src); + + /* f(Cs,Cd) = 2*Cs*Cd, if Cd <= 0.5 + * 1-2*(1-Cs)*(1-Cd), otherwise + */ + ir_rvalue *rule_1 = mul(imm3(2), mul(src, dst)); + ir_rvalue *rule_2 = + sub(imm3(1), mul(imm3(2), mul(sub(imm3(1), src), sub(imm3(1), dst)))); + return csel(lequal(dst, imm3(0.5f)), rule_1, rule_2); +} + +static ir_rvalue * +blend_darken(ir_variable *src, ir_variable *dst) +{ + /* f(Cs,Cd) = min(Cs,Cd) */ + return min2(src, dst); +} + +static ir_rvalue * +blend_lighten(ir_variable *src, ir_variable *dst) +{ + /* f(Cs,Cd) = max(Cs,Cd) */ + return max2(src, dst); +} + +static ir_rvalue * +blend_colordodge(ir_variable *src, ir_variable *dst) +{ + void *mem_ctx = ralloc_parent(src); + + /* f(Cs,Cd) = + * 0, if Cd <= 0 + * min(1,Cd/(1-Cs)), if Cd > 0 and Cs < 1 + * 1, if Cd > 0 and Cs >= 1 + */ + return csel(lequal(dst, imm3(0)), imm3(0), + csel(gequal(src, imm3(1)), imm3(1), + min2(imm3(1), div(dst, sub(imm3(1), src))))); +} + +static ir_rvalue * +blend_colorburn(ir_variable *src, ir_variable *dst) +{ + void *mem_ctx = ralloc_parent(src); + + /* f(Cs,Cd) = + * 1, if Cd >= 1 + * 1 - min(1,(1-Cd)/Cs), if Cd < 1 and Cs > 0 + * 0, if Cd < 1 and Cs <= 0 + */ + return csel(gequal(dst, imm3(1)), imm3(1), + csel(lequal(src, imm3(0)), imm3(0), + sub(imm3(1), min2(imm3(1), div(sub(imm3(1), dst), src))))); +} + +static ir_rvalue * +blend_hardlight(ir_variable *src, ir_variable *dst) +{ + void *mem_ctx = ralloc_parent(src); + + /* f(Cs,Cd) = 2*Cs*Cd, if Cs <= 0.5 + * 1-2*(1-Cs)*(1-Cd), otherwise + */ + ir_rvalue *rule_1 = mul(imm3(2), mul(src, dst)); + ir_rvalue *rule_2 = + sub(imm3(1), mul(imm3(2), mul(sub(imm3(1), src), sub(imm3(1), dst)))); + return csel(lequal(src, imm3(0.5f)), rule_1, rule_2); +} + +static ir_rvalue * +blend_softlight(ir_variable *src, ir_variable *dst) +{ + void *mem_ctx = ralloc_parent(src); + + /* f(Cs,Cd) = + * Cd-(1-2*Cs)*Cd*(1-Cd), + * if Cs <= 0.5 + * Cd+(2*Cs-1)*Cd*((16*Cd-12)*Cd+3), + * if Cs > 0.5 and Cd <= 0.25 + * Cd+(2*Cs-1)*(sqrt(Cd)-Cd), + * if Cs > 0.5 and Cd > 0.25 + * + * We can simplify this to + * + * f(Cs,Cd) = Cd+(2*Cs-1)*g(Cs,Cd) where + * g(Cs,Cd) = Cd*Cd-Cd if Cs <= 0.5 + * Cd*((16*Cd-12)*Cd+3) if Cs > 0.5 and Cd <= 0.25 + * sqrt(Cd)-Cd, otherwise + */ + ir_rvalue *factor_1 = mul(dst, sub(imm3(1), dst)); + ir_rvalue *factor_2 = + mul(dst, add(mul(sub(mul(imm3(16), dst), imm3(12)), dst), imm3(3))); + ir_rvalue *factor_3 = sub(sqrt(dst), dst); + ir_rvalue *factor = csel(lequal(src, imm3(0.5f)), factor_1, + csel(lequal(dst, imm3(0.25f)), + factor_2, factor_3)); + return add(dst, mul(sub(mul(imm3(2), src), imm3(1)), factor)); +} + +static ir_rvalue * +blend_difference(ir_variable *src, ir_variable *dst) +{ + return abs(sub(dst, src)); +} + +static ir_rvalue * +blend_exclusion(ir_variable *src, ir_variable *dst) +{ + void *mem_ctx = ralloc_parent(src); + + return add(src, sub(dst, mul(imm3(2), mul(src, dst)))); +} + +/* Return the minimum of a vec3's components */ +static ir_rvalue * +minv3(ir_variable *v) +{ + return min2(min2(swizzle_x(v), swizzle_y(v)), swizzle_z(v)); +} + +/* Return the maximum of a vec3's components */ +static ir_rvalue * +maxv3(ir_variable *v) +{ + return max2(max2(swizzle_x(v), swizzle_y(v)), swizzle_z(v)); +} + +static ir_rvalue * +lumv3(ir_variable *c) +{ + ir_constant_data data; + data.f[0] = 0.30; + data.f[1] = 0.59; + data.f[2] = 0.11; + + void *mem_ctx = ralloc_parent(c); + + /* dot(c, vec3(0.30, 0.59, 0.11)) */ + return dot(c, new(mem_ctx) ir_constant(glsl_type::vec3_type, &data)); +} + +static ir_rvalue * +satv3(ir_variable *c) +{ + return sub(maxv3(c), minv3(c)); +} + +/* Take the base RGB color and override its luminosity with that + * of the RGB color . + * + * This follows the equations given in the ES 3.2 (June 15th, 2016) + * specification. Revision 16 of GL_KHR_blend_equation_advanced and + * revision 9 of GL_NV_blend_equation_advanced specify a different set + * of equations. Older revisions match ES 3.2's text, and dEQP expects + * the ES 3.2 rules implemented here. + */ +static void +set_lum(ir_factory *f, + ir_variable *color, + ir_variable *cbase, + ir_variable *clum) +{ + void *mem_ctx = f->mem_ctx; + f->emit(assign(color, add(cbase, sub(lumv3(clum), lumv3(cbase))))); + + ir_variable *llum = f->make_temp(glsl_type::float_type, "__blend_lum"); + ir_variable *mincol = f->make_temp(glsl_type::float_type, "__blend_mincol"); + ir_variable *maxcol = f->make_temp(glsl_type::float_type, "__blend_maxcol"); + + f->emit(assign(llum, lumv3(color))); + f->emit(assign(mincol, minv3(color))); + f->emit(assign(maxcol, maxv3(color))); + + f->emit(if_tree(less(mincol, imm1(0)), + assign(color, add(llum, div(mul(sub(color, llum), llum), + sub(llum, mincol)))), + if_tree(greater(maxcol, imm1(1)), + assign(color, add(llum, div(mul(sub(color, llum), + sub(imm3(1), llum)), + sub(maxcol, llum))))))); + +} + +/* Take the base RGB color and override its saturation with + * that of the RGB color . The override the luminosity of the + * result with that of the RGB color . + */ +static void +set_lum_sat(ir_factory *f, + ir_variable *color, + ir_variable *cbase, + ir_variable *csat, + ir_variable *clum) +{ + void *mem_ctx = f->mem_ctx; + + ir_rvalue *minbase = minv3(cbase); + ir_rvalue *ssat = satv3(csat); + + ir_variable *sbase = f->make_temp(glsl_type::float_type, "__blend_sbase"); + f->emit(assign(sbase, satv3(cbase))); + + /* Equivalent (modulo rounding errors) to setting the + * smallest (R,G,B) component to 0, the largest to , + * and interpolating the "middle" component based on its + * original value relative to the smallest/largest. + */ + f->emit(if_tree(greater(sbase, imm1(0)), + assign(color, div(mul(sub(cbase, minbase), ssat), sbase)), + assign(color, imm3(0)))); + set_lum(f, color, color, clum); +} + +static ir_rvalue * +is_mode(ir_variable *mode, enum gl_advanced_blend_mode q) +{ + return equal(mode, new(ralloc_parent(mode)) ir_constant(unsigned(q))); +} + +static ir_variable * +calc_blend_result(ir_factory f, + ir_variable *mode, + ir_variable *fb, + ir_rvalue *blend_src, + GLbitfield blend_qualifiers) +{ + void *mem_ctx = f.mem_ctx; + ir_variable *result = f.make_temp(glsl_type::vec4_type, "__blend_result"); + + /* Save blend_src to a temporary so we can reference it multiple times. */ + ir_variable *src = f.make_temp(glsl_type::vec4_type, "__blend_src"); + f.emit(assign(src, blend_src)); + + /* If we're not doing advanced blending, just write the original value. */ + ir_if *if_blending = new(mem_ctx) ir_if(is_mode(mode, BLEND_NONE)); + f.emit(if_blending); + if_blending->then_instructions.push_tail(assign(result, src)); + + f.instructions = &if_blending->else_instructions; + + /* (Rs', Gs', Bs') = + * (0, 0, 0), if As == 0 + * (Rs/As, Gs/As, Bs/As), otherwise + */ + ir_variable *src_rgb = f.make_temp(glsl_type::vec3_type, "__blend_src_rgb"); + ir_variable *src_alpha = f.make_temp(glsl_type::float_type, "__blend_src_a"); + + /* (Rd', Gd', Bd') = + * (0, 0, 0), if Ad == 0 + * (Rd/Ad, Gd/Ad, Bd/Ad), otherwise + */ + ir_variable *dst_rgb = f.make_temp(glsl_type::vec3_type, "__blend_dst_rgb"); + ir_variable *dst_alpha = f.make_temp(glsl_type::float_type, "__blend_dst_a"); + + f.emit(assign(dst_alpha, swizzle_w(fb))); + f.emit(if_tree(equal(dst_alpha, imm1(0)), + assign(dst_rgb, imm3(0)), + assign(dst_rgb, csel(equal(swizzle_xyz(fb), + swizzle(fb, SWIZZLE_WWWW, 3)), + imm3(1), + div(swizzle_xyz(fb), dst_alpha))))); + + f.emit(assign(src_alpha, swizzle_w(src))); + f.emit(if_tree(equal(src_alpha, imm1(0)), + assign(src_rgb, imm3(0)), + assign(src_rgb, csel(equal(swizzle_xyz(src), + swizzle(src, SWIZZLE_WWWW, 3)), + imm3(1), + div(swizzle_xyz(src), src_alpha))))); + + ir_variable *factor = f.make_temp(glsl_type::vec3_type, "__blend_factor"); + + ir_factory casefactory = f; + + unsigned choices = blend_qualifiers; + while (choices) { + enum gl_advanced_blend_mode choice = (enum gl_advanced_blend_mode) + (1u << u_bit_scan(&choices)); + + ir_if *iff = new(mem_ctx) ir_if(is_mode(mode, choice)); + casefactory.emit(iff); + casefactory.instructions = &iff->then_instructions; + + ir_rvalue *val = NULL; + + switch (choice) { + case BLEND_MULTIPLY: + val = blend_multiply(src_rgb, dst_rgb); + break; + case BLEND_SCREEN: + val = blend_screen(src_rgb, dst_rgb); + break; + case BLEND_OVERLAY: + val = blend_overlay(src_rgb, dst_rgb); + break; + case BLEND_DARKEN: + val = blend_darken(src_rgb, dst_rgb); + break; + case BLEND_LIGHTEN: + val = blend_lighten(src_rgb, dst_rgb); + break; + case BLEND_COLORDODGE: + val = blend_colordodge(src_rgb, dst_rgb); + break; + case BLEND_COLORBURN: + val = blend_colorburn(src_rgb, dst_rgb); + break; + case BLEND_HARDLIGHT: + val = blend_hardlight(src_rgb, dst_rgb); + break; + case BLEND_SOFTLIGHT: + val = blend_softlight(src_rgb, dst_rgb); + break; + case BLEND_DIFFERENCE: + val = blend_difference(src_rgb, dst_rgb); + break; + case BLEND_EXCLUSION: + val = blend_exclusion(src_rgb, dst_rgb); + break; + case BLEND_HSL_HUE: + set_lum_sat(&casefactory, factor, src_rgb, dst_rgb, dst_rgb); + break; + case BLEND_HSL_SATURATION: + set_lum_sat(&casefactory, factor, dst_rgb, src_rgb, dst_rgb); + break; + case BLEND_HSL_COLOR: + set_lum(&casefactory, factor, src_rgb, dst_rgb); + break; + case BLEND_HSL_LUMINOSITY: + set_lum(&casefactory, factor, dst_rgb, src_rgb); + break; + case BLEND_NONE: + case BLEND_ALL: + unreachable("not real cases"); + } + + if (val) + casefactory.emit(assign(factor, val)); + + casefactory.instructions = &iff->else_instructions; + } + + /* p0(As,Ad) = As*Ad + * p1(As,Ad) = As*(1-Ad) + * p2(As,Ad) = Ad*(1-As) + */ + ir_variable *p0 = f.make_temp(glsl_type::float_type, "__blend_p0"); + ir_variable *p1 = f.make_temp(glsl_type::float_type, "__blend_p1"); + ir_variable *p2 = f.make_temp(glsl_type::float_type, "__blend_p2"); + + f.emit(assign(p0, mul(src_alpha, dst_alpha))); + f.emit(assign(p1, mul(src_alpha, sub(imm1(1), dst_alpha)))); + f.emit(assign(p2, mul(dst_alpha, sub(imm1(1), src_alpha)))); + + /* R = f(Rs',Rd')*p0(As,Ad) + Y*Rs'*p1(As,Ad) + Z*Rd'*p2(As,Ad) + * G = f(Gs',Gd')*p0(As,Ad) + Y*Gs'*p1(As,Ad) + Z*Gd'*p2(As,Ad) + * B = f(Bs',Bd')*p0(As,Ad) + Y*Bs'*p1(As,Ad) + Z*Bd'*p2(As,Ad) + * A = X*p0(As,Ad) + Y*p1(As,Ad) + Z*p2(As,Ad) + * + * is always <1, 1, 1>, so we can ignore it. + * + * In vector form, this is: + * RGB = factor * p0 + Cs * p1 + Cd * p2 + * A = p0 + p1 + p2 + */ + f.emit(assign(result, + add(add(mul(factor, p0), mul(src_rgb, p1)), mul(dst_rgb, p2)), + WRITEMASK_XYZ)); + f.emit(assign(result, add(add(p0, p1), p2), WRITEMASK_W)); + + return result; +} + +/** + * Dereference var, or var[0] if it's an array. + */ +static ir_dereference * +deref_output(ir_variable *var) +{ + void *mem_ctx = ralloc_parent(var); + + ir_dereference *val = new(mem_ctx) ir_dereference_variable(var); + if (val->type->is_array()) { + ir_constant *index = new(mem_ctx) ir_constant(0); + val = new(mem_ctx) ir_dereference_array(val, index); + } + + return val; +} + +static ir_function_signature * +get_main(gl_linked_shader *sh) +{ + ir_function_signature *sig = NULL; + /* We can't use _mesa_get_main_function_signature() because we don't + * have a symbol table at this point. Just go find main() by hand. + */ + foreach_in_list(ir_instruction, ir, sh->ir) { + ir_function *f = ir->as_function(); + if (f && strcmp(f->name, "main") == 0) { + exec_list void_parameters; + sig = f->matching_signature(NULL, &void_parameters, false); + break; + } + } + assert(sig != NULL); /* main() must exist */ + return sig; +} + +bool +lower_blend_equation_advanced(struct gl_linked_shader *sh) +{ + if (sh->Program->sh.fs.BlendSupport == 0) + return false; + + /* Lower early returns in main() so there's a single exit point + * where we can insert our lowering code. + */ + do_lower_jumps(sh->ir, false, false, true, false, false); + + void *mem_ctx = ralloc_parent(sh->ir); + + ir_variable *fb = new(mem_ctx) ir_variable(glsl_type::vec4_type, + "__blend_fb_fetch", + ir_var_shader_out); + fb->data.location = FRAG_RESULT_DATA0; + fb->data.read_only = 1; + fb->data.fb_fetch_output = 1; + fb->data.how_declared = ir_var_hidden; + + ir_variable *mode = new(mem_ctx) ir_variable(glsl_type::uint_type, + "gl_AdvancedBlendModeMESA", + ir_var_uniform); + mode->data.how_declared = ir_var_hidden; + mode->allocate_state_slots(1); + ir_state_slot *slot0 = &mode->get_state_slots()[0]; + slot0->swizzle = SWIZZLE_XXXX; + slot0->tokens[0] = STATE_INTERNAL; + slot0->tokens[1] = STATE_ADVANCED_BLENDING_MODE; + for (int i = 2; i < STATE_LENGTH; i++) + slot0->tokens[i] = 0; + + sh->ir->push_head(fb); + sh->ir->push_head(mode); + + /* Gather any output variables referring to render target 0. + * + * ARB_enhanced_layouts irritatingly allows the shader to specify + * multiple output variables for the same render target, each of + * which writes a subset of the components, starting at location_frac. + * The variables can't overlap, thankfully. + */ + ir_variable *outputs[4] = { NULL, NULL, NULL, NULL }; + foreach_in_list(ir_instruction, ir, sh->ir) { + ir_variable *var = ir->as_variable(); + if (!var || var->data.mode != ir_var_shader_out) + continue; + + if (var->data.location == FRAG_RESULT_DATA0 || + var->data.location == FRAG_RESULT_COLOR) { + const int components = var->type->without_array()->vector_elements; + + for (int i = 0; i < components; i++) { + outputs[var->data.location_frac + i] = var; + } + } + } + + /* Combine values written to outputs into a single RGBA blend source. + * We assign <0, 0, 0, 1> to any components with no corresponding output. + */ + ir_rvalue *blend_source; + if (outputs[0] && outputs[0]->type->without_array()->vector_elements == 4) { + blend_source = deref_output(outputs[0]); + } else { + ir_rvalue *blend_comps[4]; + for (int i = 0; i < 4; i++) { + ir_variable *var = outputs[i]; + if (var) { + blend_comps[i] = swizzle(deref_output(outputs[i]), + i - outputs[i]->data.location_frac, 1); + } else { + blend_comps[i] = new(mem_ctx) ir_constant(i < 3 ? 0.0f : 1.0f); + } + } + + blend_source = + new(mem_ctx) ir_expression(ir_quadop_vector, glsl_type::vec4_type, + blend_comps[0], blend_comps[1], + blend_comps[2], blend_comps[3]); + } + + ir_function_signature *main = get_main(sh); + ir_factory f(&main->body, mem_ctx); + + ir_variable *result_dest = + calc_blend_result(f, mode, fb, blend_source, + sh->Program->sh.fs.BlendSupport); + + /* Copy the result back to the original values. It would be simpler + * to demote the program's output variables, and create a new vec4 + * output for our result, but this pass runs before we create the + * ARB_program_interface_query resource list. So we have to leave + * the original outputs in place and use them. + */ + for (int i = 0; i < 4; i++) { + if (!outputs[i]) + continue; + + f.emit(assign(deref_output(outputs[i]), swizzle(result_dest, i, 1), + 1 << i)); + } + + validate_ir_tree(sh->ir); + return true; +} diff -Nru mesa-12.0.6/src/compiler/glsl/lower_buffer_access.cpp mesa-17.0.7/src/compiler/glsl/lower_buffer_access.cpp --- mesa-12.0.6/src/compiler/glsl/lower_buffer_access.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/lower_buffer_access.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -114,7 +114,7 @@ /* For a row-major matrix, the next column starts at the next * element. */ - int size_mul = deref->type->is_double() ? 8 : 4; + int size_mul = deref->type->is_64bit() ? 8 : 4; emit_access(mem_ctx, is_write, col_deref, base_offset, deref_offset + i * size_mul, row_major, deref->type->matrix_columns, packing, @@ -125,7 +125,7 @@ /* std430 doesn't round up vec2 size to a vec4 size */ if (packing == GLSL_INTERFACE_PACKING_STD430 && deref->type->vector_elements == 2 && - !deref->type->is_double()) { + !deref->type->is_64bit()) { size_mul = 8; } else { /* std140 always rounds the stride of arrays (and matrices) to a @@ -137,7 +137,7 @@ * machine units, the base alignment is 4N. For vec4, base * alignment is 4N. */ - size_mul = (deref->type->is_double() && + size_mul = (deref->type->is_64bit() && deref->type->vector_elements > 2) ? 32 : 16; } @@ -159,7 +159,7 @@ is_write ? write_mask : (1 << deref->type->vector_elements) - 1; insert_buffer_access(mem_ctx, deref, deref->type, offset, mask, -1); } else { - unsigned N = deref->type->is_double() ? 8 : 4; + unsigned N = deref->type->is_64bit() ? 8 : 4; /* We're dereffing a column out of a row-major matrix, so we * gather the vector from each stored row. @@ -321,14 +321,13 @@ */ void lower_buffer_access::setup_buffer_access(void *mem_ctx, - ir_variable *var, ir_rvalue *deref, ir_rvalue **offset, unsigned *const_offset, bool *row_major, int *matrix_columns, const glsl_struct_field **struct_field, - unsigned packing) + enum glsl_interface_packing packing) { *offset = new(mem_ctx) ir_constant(0u); *row_major = is_dereferenced_thing_row_major(deref); @@ -358,7 +357,7 @@ * thread or SIMD channel is modifying the same vector. */ array_stride = 4; - if (deref_array->array->type->is_double()) + if (deref_array->array->type->is_64bit()) array_stride *= 2; } else if (deref_array->array->type->is_matrix() && *row_major) { /* When loading a vector out of a row major matrix, the @@ -367,7 +366,7 @@ * vector) is handled below in emit_ubo_loads. */ array_stride = 4; - if (deref_array->array->type->is_double()) + if (deref_array->array->type->is_64bit()) array_stride *= 2; *matrix_columns = deref_array->array->type->matrix_columns; } else if (deref_array->type->without_array()->is_interface()) { diff -Nru mesa-12.0.6/src/compiler/glsl/lower_buffer_access.h mesa-17.0.7/src/compiler/glsl/lower_buffer_access.h --- mesa-12.0.6/src/compiler/glsl/lower_buffer_access.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/lower_buffer_access.h 2017-06-01 10:37:10.000000000 +0000 @@ -54,11 +54,11 @@ bool is_dereferenced_thing_row_major(const ir_rvalue *deref); - void setup_buffer_access(void *mem_ctx, ir_variable *var, ir_rvalue *deref, + void setup_buffer_access(void *mem_ctx, ir_rvalue *deref, ir_rvalue **offset, unsigned *const_offset, bool *row_major, int *matrix_columns, const glsl_struct_field **struct_field, - unsigned packing); + enum glsl_interface_packing packing); }; } /* namespace lower_buffer_access */ diff -Nru mesa-12.0.6/src/compiler/glsl/lower_const_arrays_to_uniforms.cpp mesa-17.0.7/src/compiler/glsl/lower_const_arrays_to_uniforms.cpp --- mesa-12.0.6/src/compiler/glsl/lower_const_arrays_to_uniforms.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/lower_const_arrays_to_uniforms.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -45,9 +45,11 @@ namespace { class lower_const_array_visitor : public ir_rvalue_visitor { public: - lower_const_array_visitor(exec_list *insts) + lower_const_array_visitor(exec_list *insts, unsigned s) { instructions = insts; + stage = s; + const_count = 0; progress = false; } @@ -62,6 +64,8 @@ private: exec_list *instructions; + unsigned stage; + unsigned const_count; bool progress; }; @@ -83,7 +87,16 @@ void *mem_ctx = ralloc_parent(con); - char *uniform_name = ralloc_asprintf(mem_ctx, "constarray__%p", con); + /* In the very unlikely event of 4294967295 constant arrays in a single + * shader, don't promote this to a uniform. + */ + unsigned limit = ~0; + if (const_count == limit) + return; + + char *uniform_name = ralloc_asprintf(mem_ctx, "constarray_%x_%u", + const_count, stage); + const_count++; ir_variable *uni = new(mem_ctx) ir_variable(con->type, uniform_name, ir_var_uniform); @@ -104,8 +117,8 @@ } /* anonymous namespace */ bool -lower_const_arrays_to_uniforms(exec_list *instructions) +lower_const_arrays_to_uniforms(exec_list *instructions, unsigned stage) { - lower_const_array_visitor v(instructions); + lower_const_array_visitor v(instructions, stage); return v.run(); } diff -Nru mesa-12.0.6/src/compiler/glsl/lower_discard_flow.cpp mesa-17.0.7/src/compiler/glsl/lower_discard_flow.cpp --- mesa-12.0.6/src/compiler/glsl/lower_discard_flow.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/lower_discard_flow.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -46,7 +46,6 @@ #include "compiler/glsl_types.h" #include "ir.h" -#include "program/hash_table.h" namespace { diff -Nru mesa-12.0.6/src/compiler/glsl/lower_distance.cpp mesa-17.0.7/src/compiler/glsl/lower_distance.cpp --- mesa-12.0.6/src/compiler/glsl/lower_distance.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/lower_distance.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -529,8 +529,8 @@ { void *ctx = ralloc_parent(ir); - const exec_node *formal_param_node = ir->callee->parameters.head; - const exec_node *actual_param_node = ir->actual_parameters.head; + const exec_node *formal_param_node = ir->callee->parameters.get_head_raw(); + const exec_node *actual_param_node = ir->actual_parameters.get_head_raw(); while (!actual_param_node->is_tail_sentinel()) { ir_variable *formal_param = (ir_variable *) formal_param_node; ir_rvalue *actual_param = (ir_rvalue *) actual_param_node; @@ -654,7 +654,8 @@ } bool -lower_clip_cull_distance(struct gl_shader_program *prog, gl_shader *shader) +lower_clip_cull_distance(struct gl_shader_program *prog, + struct gl_linked_shader *shader) { int clip_size, cull_size; diff -Nru mesa-12.0.6/src/compiler/glsl/lower_if_to_cond_assign.cpp mesa-17.0.7/src/compiler/glsl/lower_if_to_cond_assign.cpp --- mesa-12.0.6/src/compiler/glsl/lower_if_to_cond_assign.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/lower_if_to_cond_assign.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -24,8 +24,14 @@ /** * \file lower_if_to_cond_assign.cpp * - * This attempts to flatten if-statements to conditional assignments for - * GPUs with limited or no flow control support. + * This flattens if-statements to conditional assignments if: + * + * - the GPU has limited or no flow control support + * (controlled by max_depth) + * + * - small conditional branches are more expensive than conditional assignments + * (controlled by min_branch_cost, that's the cost for a branch to be + * preserved) * * It can't handle other control flow being inside of its block, such * as calls or loops. Hopefully loop unrolling and inlining will take @@ -47,46 +53,62 @@ #include "compiler/glsl_types.h" #include "ir.h" -#include "program/hash_table.h" +#include "util/set.h" +#include "util/hash_table.h" /* Needed for the hashing functions */ +#include "main/macros.h" /* for MAX2 */ namespace { class ir_if_to_cond_assign_visitor : public ir_hierarchical_visitor { public: - ir_if_to_cond_assign_visitor(unsigned max_depth) + ir_if_to_cond_assign_visitor(gl_shader_stage stage, + unsigned max_depth, + unsigned min_branch_cost) { this->progress = false; + this->stage = stage; this->max_depth = max_depth; + this->min_branch_cost = min_branch_cost; this->depth = 0; - this->condition_variables = hash_table_ctor(0, hash_table_pointer_hash, - hash_table_pointer_compare); + this->condition_variables = + _mesa_set_create(NULL, _mesa_hash_pointer, + _mesa_key_pointer_equal); } ~ir_if_to_cond_assign_visitor() { - hash_table_dtor(this->condition_variables); + _mesa_set_destroy(this->condition_variables, NULL); } ir_visitor_status visit_enter(ir_if *); ir_visitor_status visit_leave(ir_if *); + bool found_unsupported_op; + bool found_expensive_op; + bool found_dynamic_arrayref; + bool is_then; bool progress; + gl_shader_stage stage; + unsigned then_cost; + unsigned else_cost; + unsigned min_branch_cost; unsigned max_depth; unsigned depth; - struct hash_table *condition_variables; + struct set *condition_variables; }; } /* anonymous namespace */ bool -lower_if_to_cond_assign(exec_list *instructions, unsigned max_depth) +lower_if_to_cond_assign(gl_shader_stage stage, exec_list *instructions, + unsigned max_depth, unsigned min_branch_cost) { if (max_depth == UINT_MAX) return false; - ir_if_to_cond_assign_visitor v(max_depth); + ir_if_to_cond_assign_visitor v(stage, max_depth, min_branch_cost); visit_list_elements(&v, instructions); @@ -94,17 +116,53 @@ } void -check_control_flow(ir_instruction *ir, void *data) +check_ir_node(ir_instruction *ir, void *data) { - bool *found_control_flow = (bool *)data; + ir_if_to_cond_assign_visitor *v = (ir_if_to_cond_assign_visitor *)data; + switch (ir->ir_type) { case ir_type_call: case ir_type_discard: case ir_type_loop: case ir_type_loop_jump: case ir_type_return: - *found_control_flow = true; + case ir_type_emit_vertex: + case ir_type_end_primitive: + case ir_type_barrier: + v->found_unsupported_op = true; + break; + + case ir_type_dereference_variable: { + ir_variable *var = ir->as_dereference_variable()->variable_referenced(); + + /* Lowering branches with TCS output accesses breaks many piglit tests, + * so don't touch them for now. + */ + if (v->stage == MESA_SHADER_TESS_CTRL && + var->data.mode == ir_var_shader_out) + v->found_unsupported_op = true; + break; + } + + /* SSBO, images, atomic counters are handled by ir_type_call */ + case ir_type_texture: + v->found_expensive_op = true; break; + + case ir_type_dereference_array: { + ir_dereference_array *deref = ir->as_dereference_array(); + + if (deref->array_index->ir_type != ir_type_constant) + v->found_dynamic_arrayref = true; + } /* fall-through */ + case ir_type_expression: + case ir_type_dereference_record: + if (v->is_then) + v->then_cost++; + else + v->else_cost++; + break; + default: break; } @@ -114,38 +172,39 @@ move_block_to_cond_assign(void *mem_ctx, ir_if *if_ir, ir_rvalue *cond_expr, exec_list *instructions, - struct hash_table *ht) + struct set *set) { foreach_in_list_safe(ir_instruction, ir, instructions) { if (ir->ir_type == ir_type_assignment) { ir_assignment *assign = (ir_assignment *)ir; - if (hash_table_find(ht, assign) == NULL) { - hash_table_insert(ht, assign, assign); + if (_mesa_set_search(set, assign) == NULL) { + _mesa_set_add(set, assign); /* If the LHS of the assignment is a condition variable that was * previously added, insert an additional assignment of false to * the variable. */ const bool assign_to_cv = - hash_table_find(ht, assign->lhs->variable_referenced()) != NULL; + _mesa_set_search( + set, assign->lhs->variable_referenced()) != NULL; if (!assign->condition) { - if (assign_to_cv) { - assign->rhs = - new(mem_ctx) ir_expression(ir_binop_logic_and, - glsl_type::bool_type, - cond_expr->clone(mem_ctx, NULL), - assign->rhs); - } else { - assign->condition = cond_expr->clone(mem_ctx, NULL); + if (assign_to_cv) { + assign->rhs = + new(mem_ctx) ir_expression(ir_binop_logic_and, + glsl_type::bool_type, + cond_expr->clone(mem_ctx, NULL), + assign->rhs); + } else { + assign->condition = cond_expr->clone(mem_ctx, NULL); } } else { assign->condition = - new(mem_ctx) ir_expression(ir_binop_logic_and, - glsl_type::bool_type, - cond_expr->clone(mem_ctx, NULL), - assign->condition); + new(mem_ctx) ir_expression(ir_binop_logic_and, + glsl_type::bool_type, + cond_expr->clone(mem_ctx, NULL), + assign->condition); } } } @@ -168,21 +227,46 @@ ir_visitor_status ir_if_to_cond_assign_visitor::visit_leave(ir_if *ir) { + bool must_lower = this->depth-- > this->max_depth; + /* Only flatten when beyond the GPU's maximum supported nesting depth. */ - if (this->depth-- <= this->max_depth) + if (!must_lower && this->min_branch_cost == 0) return visit_continue; - bool found_control_flow = false; + this->found_unsupported_op = false; + this->found_expensive_op = false; + this->found_dynamic_arrayref = false; + this->then_cost = 0; + this->else_cost = 0; + ir_assignment *assign; /* Check that both blocks don't contain anything we can't support. */ + this->is_then = true; foreach_in_list(ir_instruction, then_ir, &ir->then_instructions) { - visit_tree(then_ir, check_control_flow, &found_control_flow); + visit_tree(then_ir, check_ir_node, this); } + + this->is_then = false; foreach_in_list(ir_instruction, else_ir, &ir->else_instructions) { - visit_tree(else_ir, check_control_flow, &found_control_flow); + visit_tree(else_ir, check_ir_node, this); } - if (found_control_flow) + + if (this->found_unsupported_op) + return visit_continue; /* can't handle inner unsupported opcodes */ + + /* Skip if the branch cost is high enough or if there's an expensive op. + * + * Also skip if non-constant array indices were encountered, since those + * can be out-of-bounds for a not-taken branch, and so generating an + * assignment would be incorrect. In the case of must_lower, it's up to the + * backend to deal with any potential fall-out (perhaps by translating the + * assignments to hardware-predicated moves). + */ + if (!must_lower && + (this->found_expensive_op || + this->found_dynamic_arrayref || + MAX2(this->then_cost, this->else_cost) >= this->min_branch_cost)) return visit_continue; void *mem_ctx = ralloc_parent(ir); @@ -210,7 +294,7 @@ /* Add the new condition variable to the hash table. This allows us to * find this variable when lowering other (enclosing) if-statements. */ - hash_table_insert(this->condition_variables, then_var, then_var); + _mesa_set_add(this->condition_variables, then_var); /* If there are instructions in the else-clause, store the inverse of the * condition to a variable. Move all of the instructions from the @@ -241,7 +325,7 @@ /* Add the new condition variable to the hash table. This allows us to * find this variable when lowering other (enclosing) if-statements. */ - hash_table_insert(this->condition_variables, else_var, else_var); + _mesa_set_add(this->condition_variables, else_var); } ir->remove(); diff -Nru mesa-12.0.6/src/compiler/glsl/lower_instructions.cpp mesa-17.0.7/src/compiler/glsl/lower_instructions.cpp --- mesa-12.0.6/src/compiler/glsl/lower_instructions.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/lower_instructions.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -54,8 +54,8 @@ * want to recognize add(op0, neg(op1)) or the other way around to * produce a subtract anyway. * - * DIV_TO_MUL_RCP and INT_DIV_TO_MUL_RCP: - * -------------------------------------- + * FDIV_TO_MUL_RCP, DDIV_TO_MUL_RCP, and INT_DIV_TO_MUL_RCP: + * --------------------------------------------------------- * Breaks an ir_binop_div expression down to op0 * (rcp(op1)). * * Many GPUs don't have a divide instruction (945 and 965 included), @@ -63,9 +63,11 @@ * reciprocal. By breaking the operation down, constant reciprocals * can get constant folded. * - * DIV_TO_MUL_RCP only lowers floating point division; INT_DIV_TO_MUL_RCP - * handles the integer case, converting to and from floating point so that - * RCP is possible. + * FDIV_TO_MUL_RCP only lowers single-precision floating point division; + * DDIV_TO_MUL_RCP only lowers double-precision floating point division. + * DIV_TO_MUL_RCP is a convenience macro that sets both flags. + * INT_DIV_TO_MUL_RCP handles the integer case, converting to and from floating + * point so that RCP is possible. * * EXP_TO_EXP2 and LOG_TO_LOG2: * ---------------------------- @@ -159,6 +161,15 @@ void dround_even_to_dfrac(ir_expression *); void dtrunc_to_dfrac(ir_expression *); void dsign_to_csel(ir_expression *); + void bit_count_to_math(ir_expression *); + void extract_to_shifts(ir_expression *); + void insert_to_shifts(ir_expression *); + void reverse_to_shifts(ir_expression *ir); + void find_lsb_to_float_cast(ir_expression *ir); + void find_msb_to_float_cast(ir_expression *ir); + void imul_high_to_mul(ir_expression *ir); + + ir_expression *_carry(operand a, operand b); }; } /* anonymous namespace */ @@ -317,7 +328,8 @@ /* Don't generate new IR that would need to be lowered in an additional * pass. */ - if (lowering(DIV_TO_MUL_RCP) && (ir->type->is_float() || ir->type->is_double())) + if ((lowering(FDIV_TO_MUL_RCP) && ir->type->is_float()) || + (lowering(DDIV_TO_MUL_RCP) && ir->type->is_double())) div_to_mul_rcp(div_expr); ir_expression *const floor_expr = @@ -383,7 +395,6 @@ ir_constant *sign_mask = new(ir) ir_constant(0x80000000u, vec_elem); ir_constant *exp_shift = new(ir) ir_constant(23, vec_elem); - ir_constant *exp_width = new(ir) ir_constant(8, vec_elem); /* Temporary variables */ ir_variable *x = new(ir) ir_variable(ir->type, "x", ir_var_temporary); @@ -446,10 +457,22 @@ */ ir_constant *exp_shift_clone = exp_shift->clone(ir, NULL); - ir->operation = ir_unop_bitcast_i2f; - ir->operands[0] = bitfield_insert(bitcast_f2i(x), resulting_biased_exp, - exp_shift_clone, exp_width); - ir->operands[1] = NULL; + + /* Don't generate new IR that would need to be lowered in an additional + * pass. + */ + if (!lowering(INSERT_TO_SHIFTS)) { + ir_constant *exp_width = new(ir) ir_constant(8, vec_elem); + ir->operation = ir_unop_bitcast_i2f; + ir->operands[0] = bitfield_insert(bitcast_f2i(x), resulting_biased_exp, + exp_shift_clone, exp_width); + ir->operands[1] = NULL; + } else { + ir_constant *sign_mantissa_mask = new(ir) ir_constant(0x807fffffu, vec_elem); + ir->operation = ir_unop_bitcast_u2f; + ir->operands[0] = bit_or(bit_and(bitcast_f2u(x), sign_mantissa_mask), + lshift(i2u(resulting_biased_exp), exp_shift_clone)); + } this->progress = true; } @@ -954,6 +977,611 @@ this->progress = true; } +void +lower_instructions_visitor::bit_count_to_math(ir_expression *ir) +{ + /* For more details, see: + * + * http://graphics.stanford.edu/~seander/bithacks.html#CountBitsSetPaallel + */ + const unsigned elements = ir->operands[0]->type->vector_elements; + ir_variable *temp = new(ir) ir_variable(glsl_type::uvec(elements), "temp", + ir_var_temporary); + ir_constant *c55555555 = new(ir) ir_constant(0x55555555u); + ir_constant *c33333333 = new(ir) ir_constant(0x33333333u); + ir_constant *c0F0F0F0F = new(ir) ir_constant(0x0F0F0F0Fu); + ir_constant *c01010101 = new(ir) ir_constant(0x01010101u); + ir_constant *c1 = new(ir) ir_constant(1u); + ir_constant *c2 = new(ir) ir_constant(2u); + ir_constant *c4 = new(ir) ir_constant(4u); + ir_constant *c24 = new(ir) ir_constant(24u); + + base_ir->insert_before(temp); + + if (ir->operands[0]->type->base_type == GLSL_TYPE_UINT) { + base_ir->insert_before(assign(temp, ir->operands[0])); + } else { + assert(ir->operands[0]->type->base_type == GLSL_TYPE_INT); + base_ir->insert_before(assign(temp, i2u(ir->operands[0]))); + } + + /* temp = temp - ((temp >> 1) & 0x55555555u); */ + base_ir->insert_before(assign(temp, sub(temp, bit_and(rshift(temp, c1), + c55555555)))); + + /* temp = (temp & 0x33333333u) + ((temp >> 2) & 0x33333333u); */ + base_ir->insert_before(assign(temp, add(bit_and(temp, c33333333), + bit_and(rshift(temp, c2), + c33333333->clone(ir, NULL))))); + + /* int(((temp + (temp >> 4) & 0xF0F0F0Fu) * 0x1010101u) >> 24); */ + ir->operation = ir_unop_u2i; + ir->operands[0] = rshift(mul(bit_and(add(temp, rshift(temp, c4)), c0F0F0F0F), + c01010101), + c24); + + this->progress = true; +} + +void +lower_instructions_visitor::extract_to_shifts(ir_expression *ir) +{ + ir_variable *bits = + new(ir) ir_variable(ir->operands[0]->type, "bits", ir_var_temporary); + + base_ir->insert_before(bits); + base_ir->insert_before(assign(bits, ir->operands[2])); + + if (ir->operands[0]->type->base_type == GLSL_TYPE_UINT) { + ir_constant *c1 = + new(ir) ir_constant(1u, ir->operands[0]->type->vector_elements); + ir_constant *c32 = + new(ir) ir_constant(32u, ir->operands[0]->type->vector_elements); + ir_constant *cFFFFFFFF = + new(ir) ir_constant(0xFFFFFFFFu, ir->operands[0]->type->vector_elements); + + /* At least some hardware treats (x << y) as (x << (y%32)). This means + * we'd get a mask of 0 when bits is 32. Special case it. + * + * mask = bits == 32 ? 0xffffffff : (1u << bits) - 1u; + */ + ir_expression *mask = csel(equal(bits, c32), + cFFFFFFFF, + sub(lshift(c1, bits), c1->clone(ir, NULL))); + + /* Section 8.8 (Integer Functions) of the GLSL 4.50 spec says: + * + * If bits is zero, the result will be zero. + * + * Since (1 << 0) - 1 == 0, we don't need to bother with the conditional + * select as in the signed integer case. + * + * (value >> offset) & mask; + */ + ir->operation = ir_binop_bit_and; + ir->operands[0] = rshift(ir->operands[0], ir->operands[1]); + ir->operands[1] = mask; + ir->operands[2] = NULL; + } else { + ir_constant *c0 = + new(ir) ir_constant(int(0), ir->operands[0]->type->vector_elements); + ir_constant *c32 = + new(ir) ir_constant(int(32), ir->operands[0]->type->vector_elements); + ir_variable *temp = + new(ir) ir_variable(ir->operands[0]->type, "temp", ir_var_temporary); + + /* temp = 32 - bits; */ + base_ir->insert_before(temp); + base_ir->insert_before(assign(temp, sub(c32, bits))); + + /* expr = value << (temp - offset)) >> temp; */ + ir_expression *expr = + rshift(lshift(ir->operands[0], sub(temp, ir->operands[1])), temp); + + /* Section 8.8 (Integer Functions) of the GLSL 4.50 spec says: + * + * If bits is zero, the result will be zero. + * + * Due to the (x << (y%32)) behavior mentioned before, the (value << + * (32-0)) doesn't "erase" all of the data as we would like, so finish + * up with: + * + * (bits == 0) ? 0 : e; + */ + ir->operation = ir_triop_csel; + ir->operands[0] = equal(c0, bits); + ir->operands[1] = c0->clone(ir, NULL); + ir->operands[2] = expr; + } + + this->progress = true; +} + +void +lower_instructions_visitor::insert_to_shifts(ir_expression *ir) +{ + ir_constant *c1; + ir_constant *c32; + ir_constant *cFFFFFFFF; + ir_variable *offset = + new(ir) ir_variable(ir->operands[0]->type, "offset", ir_var_temporary); + ir_variable *bits = + new(ir) ir_variable(ir->operands[0]->type, "bits", ir_var_temporary); + ir_variable *mask = + new(ir) ir_variable(ir->operands[0]->type, "mask", ir_var_temporary); + + if (ir->operands[0]->type->base_type == GLSL_TYPE_INT) { + c1 = new(ir) ir_constant(int(1), ir->operands[0]->type->vector_elements); + c32 = new(ir) ir_constant(int(32), ir->operands[0]->type->vector_elements); + cFFFFFFFF = new(ir) ir_constant(int(0xFFFFFFFF), ir->operands[0]->type->vector_elements); + } else { + assert(ir->operands[0]->type->base_type == GLSL_TYPE_UINT); + + c1 = new(ir) ir_constant(1u, ir->operands[0]->type->vector_elements); + c32 = new(ir) ir_constant(32u, ir->operands[0]->type->vector_elements); + cFFFFFFFF = new(ir) ir_constant(0xFFFFFFFFu, ir->operands[0]->type->vector_elements); + } + + base_ir->insert_before(offset); + base_ir->insert_before(assign(offset, ir->operands[2])); + + base_ir->insert_before(bits); + base_ir->insert_before(assign(bits, ir->operands[3])); + + /* At least some hardware treats (x << y) as (x << (y%32)). This means + * we'd get a mask of 0 when bits is 32. Special case it. + * + * mask = (bits == 32 ? 0xffffffff : (1u << bits) - 1u) << offset; + * + * Section 8.8 (Integer Functions) of the GLSL 4.50 spec says: + * + * The result will be undefined if offset or bits is negative, or if the + * sum of offset and bits is greater than the number of bits used to + * store the operand. + * + * Since it's undefined, there are a couple other ways this could be + * implemented. The other way that was considered was to put the csel + * around the whole thing: + * + * final_result = bits == 32 ? insert : ... ; + */ + base_ir->insert_before(mask); + + base_ir->insert_before(assign(mask, csel(equal(bits, c32), + cFFFFFFFF, + lshift(sub(lshift(c1, bits), + c1->clone(ir, NULL)), + offset)))); + + /* (base & ~mask) | ((insert << offset) & mask) */ + ir->operation = ir_binop_bit_or; + ir->operands[0] = bit_and(ir->operands[0], bit_not(mask)); + ir->operands[1] = bit_and(lshift(ir->operands[1], offset), mask); + ir->operands[2] = NULL; + ir->operands[3] = NULL; + + this->progress = true; +} + +void +lower_instructions_visitor::reverse_to_shifts(ir_expression *ir) +{ + /* For more details, see: + * + * http://graphics.stanford.edu/~seander/bithacks.html#ReverseParallel + */ + ir_constant *c1 = + new(ir) ir_constant(1u, ir->operands[0]->type->vector_elements); + ir_constant *c2 = + new(ir) ir_constant(2u, ir->operands[0]->type->vector_elements); + ir_constant *c4 = + new(ir) ir_constant(4u, ir->operands[0]->type->vector_elements); + ir_constant *c8 = + new(ir) ir_constant(8u, ir->operands[0]->type->vector_elements); + ir_constant *c16 = + new(ir) ir_constant(16u, ir->operands[0]->type->vector_elements); + ir_constant *c33333333 = + new(ir) ir_constant(0x33333333u, ir->operands[0]->type->vector_elements); + ir_constant *c55555555 = + new(ir) ir_constant(0x55555555u, ir->operands[0]->type->vector_elements); + ir_constant *c0F0F0F0F = + new(ir) ir_constant(0x0F0F0F0Fu, ir->operands[0]->type->vector_elements); + ir_constant *c00FF00FF = + new(ir) ir_constant(0x00FF00FFu, ir->operands[0]->type->vector_elements); + ir_variable *temp = + new(ir) ir_variable(glsl_type::uvec(ir->operands[0]->type->vector_elements), + "temp", ir_var_temporary); + ir_instruction &i = *base_ir; + + i.insert_before(temp); + + if (ir->operands[0]->type->base_type == GLSL_TYPE_UINT) { + i.insert_before(assign(temp, ir->operands[0])); + } else { + assert(ir->operands[0]->type->base_type == GLSL_TYPE_INT); + i.insert_before(assign(temp, i2u(ir->operands[0]))); + } + + /* Swap odd and even bits. + * + * temp = ((temp >> 1) & 0x55555555u) | ((temp & 0x55555555u) << 1); + */ + i.insert_before(assign(temp, bit_or(bit_and(rshift(temp, c1), c55555555), + lshift(bit_and(temp, c55555555->clone(ir, NULL)), + c1->clone(ir, NULL))))); + /* Swap consecutive pairs. + * + * temp = ((temp >> 2) & 0x33333333u) | ((temp & 0x33333333u) << 2); + */ + i.insert_before(assign(temp, bit_or(bit_and(rshift(temp, c2), c33333333), + lshift(bit_and(temp, c33333333->clone(ir, NULL)), + c2->clone(ir, NULL))))); + + /* Swap nibbles. + * + * temp = ((temp >> 4) & 0x0F0F0F0Fu) | ((temp & 0x0F0F0F0Fu) << 4); + */ + i.insert_before(assign(temp, bit_or(bit_and(rshift(temp, c4), c0F0F0F0F), + lshift(bit_and(temp, c0F0F0F0F->clone(ir, NULL)), + c4->clone(ir, NULL))))); + + /* The last step is, basically, bswap. Swap the bytes, then swap the + * words. When this code is run through GCC on x86, it does generate a + * bswap instruction. + * + * temp = ((temp >> 8) & 0x00FF00FFu) | ((temp & 0x00FF00FFu) << 8); + * temp = ( temp >> 16 ) | ( temp << 16); + */ + i.insert_before(assign(temp, bit_or(bit_and(rshift(temp, c8), c00FF00FF), + lshift(bit_and(temp, c00FF00FF->clone(ir, NULL)), + c8->clone(ir, NULL))))); + + if (ir->operands[0]->type->base_type == GLSL_TYPE_UINT) { + ir->operation = ir_binop_bit_or; + ir->operands[0] = rshift(temp, c16); + ir->operands[1] = lshift(temp, c16->clone(ir, NULL)); + } else { + ir->operation = ir_unop_u2i; + ir->operands[0] = bit_or(rshift(temp, c16), + lshift(temp, c16->clone(ir, NULL))); + } + + this->progress = true; +} + +void +lower_instructions_visitor::find_lsb_to_float_cast(ir_expression *ir) +{ + /* For more details, see: + * + * http://graphics.stanford.edu/~seander/bithacks.html#ZerosOnRightFloatCast + */ + const unsigned elements = ir->operands[0]->type->vector_elements; + ir_constant *c0 = new(ir) ir_constant(unsigned(0), elements); + ir_constant *cminus1 = new(ir) ir_constant(int(-1), elements); + ir_constant *c23 = new(ir) ir_constant(int(23), elements); + ir_constant *c7F = new(ir) ir_constant(int(0x7F), elements); + ir_variable *temp = + new(ir) ir_variable(glsl_type::ivec(elements), "temp", ir_var_temporary); + ir_variable *lsb_only = + new(ir) ir_variable(glsl_type::uvec(elements), "lsb_only", ir_var_temporary); + ir_variable *as_float = + new(ir) ir_variable(glsl_type::vec(elements), "as_float", ir_var_temporary); + ir_variable *lsb = + new(ir) ir_variable(glsl_type::ivec(elements), "lsb", ir_var_temporary); + + ir_instruction &i = *base_ir; + + i.insert_before(temp); + + if (ir->operands[0]->type->base_type == GLSL_TYPE_INT) { + i.insert_before(assign(temp, ir->operands[0])); + } else { + assert(ir->operands[0]->type->base_type == GLSL_TYPE_UINT); + i.insert_before(assign(temp, u2i(ir->operands[0]))); + } + + /* The int-to-float conversion is lossless because (value & -value) is + * either a power of two or zero. We don't use the result in the zero + * case. The uint() cast is necessary so that 0x80000000 does not + * generate a negative value. + * + * uint lsb_only = uint(value & -value); + * float as_float = float(lsb_only); + */ + i.insert_before(lsb_only); + i.insert_before(assign(lsb_only, i2u(bit_and(temp, neg(temp))))); + + i.insert_before(as_float); + i.insert_before(assign(as_float, u2f(lsb_only))); + + /* This is basically an open-coded frexp. Implementations that have a + * native frexp instruction would be better served by that. This is + * optimized versus a full-featured open-coded implementation in two ways: + * + * - We don't care about a correct result from subnormal numbers (including + * 0.0), so the raw exponent can always be safely unbiased. + * + * - The value cannot be negative, so it does not need to be masked off to + * extract the exponent. + * + * int lsb = (floatBitsToInt(as_float) >> 23) - 0x7f; + */ + i.insert_before(lsb); + i.insert_before(assign(lsb, sub(rshift(bitcast_f2i(as_float), c23), c7F))); + + /* Use lsb_only in the comparison instead of temp so that the & (far above) + * can possibly generate the result without an explicit comparison. + * + * (lsb_only == 0) ? -1 : lsb; + * + * Since our input values are all integers, the unbiased exponent must not + * be negative. It will only be negative (-0x7f, in fact) if lsb_only is + * 0. Instead of using (lsb_only == 0), we could use (lsb >= 0). Which is + * better is likely GPU dependent. Either way, the difference should be + * small. + */ + ir->operation = ir_triop_csel; + ir->operands[0] = equal(lsb_only, c0); + ir->operands[1] = cminus1; + ir->operands[2] = new(ir) ir_dereference_variable(lsb); + + this->progress = true; +} + +void +lower_instructions_visitor::find_msb_to_float_cast(ir_expression *ir) +{ + /* For more details, see: + * + * http://graphics.stanford.edu/~seander/bithacks.html#ZerosOnRightFloatCast + */ + const unsigned elements = ir->operands[0]->type->vector_elements; + ir_constant *c0 = new(ir) ir_constant(int(0), elements); + ir_constant *cminus1 = new(ir) ir_constant(int(-1), elements); + ir_constant *c23 = new(ir) ir_constant(int(23), elements); + ir_constant *c7F = new(ir) ir_constant(int(0x7F), elements); + ir_constant *c000000FF = new(ir) ir_constant(0x000000FFu, elements); + ir_constant *cFFFFFF00 = new(ir) ir_constant(0xFFFFFF00u, elements); + ir_variable *temp = + new(ir) ir_variable(glsl_type::uvec(elements), "temp", ir_var_temporary); + ir_variable *as_float = + new(ir) ir_variable(glsl_type::vec(elements), "as_float", ir_var_temporary); + ir_variable *msb = + new(ir) ir_variable(glsl_type::ivec(elements), "msb", ir_var_temporary); + + ir_instruction &i = *base_ir; + + i.insert_before(temp); + + if (ir->operands[0]->type->base_type == GLSL_TYPE_UINT) { + i.insert_before(assign(temp, ir->operands[0])); + } else { + assert(ir->operands[0]->type->base_type == GLSL_TYPE_INT); + + /* findMSB(uint(abs(some_int))) almost always does the right thing. + * There are two problem values: + * + * * 0x80000000. Since abs(0x80000000) == 0x80000000, findMSB returns + * 31. However, findMSB(int(0x80000000)) == 30. + * + * * 0xffffffff. Since abs(0xffffffff) == 1, findMSB returns + * 31. Section 8.8 (Integer Functions) of the GLSL 4.50 spec says: + * + * For a value of zero or negative one, -1 will be returned. + * + * For all negative number cases, including 0x80000000 and 0xffffffff, + * the correct value is obtained from findMSB if instead of negating the + * (already negative) value the logical-not is used. A conditonal + * logical-not can be achieved in two instructions. + */ + ir_variable *as_int = + new(ir) ir_variable(glsl_type::ivec(elements), "as_int", ir_var_temporary); + ir_constant *c31 = new(ir) ir_constant(int(31), elements); + + i.insert_before(as_int); + i.insert_before(assign(as_int, ir->operands[0])); + i.insert_before(assign(temp, i2u(expr(ir_binop_bit_xor, + as_int, + rshift(as_int, c31))))); + } + + /* The int-to-float conversion is lossless because bits are conditionally + * masked off the bottom of temp to ensure the value has at most 24 bits of + * data or is zero. We don't use the result in the zero case. The uint() + * cast is necessary so that 0x80000000 does not generate a negative value. + * + * float as_float = float(temp > 255 ? temp & ~255 : temp); + */ + i.insert_before(as_float); + i.insert_before(assign(as_float, u2f(csel(greater(temp, c000000FF), + bit_and(temp, cFFFFFF00), + temp)))); + + /* This is basically an open-coded frexp. Implementations that have a + * native frexp instruction would be better served by that. This is + * optimized versus a full-featured open-coded implementation in two ways: + * + * - We don't care about a correct result from subnormal numbers (including + * 0.0), so the raw exponent can always be safely unbiased. + * + * - The value cannot be negative, so it does not need to be masked off to + * extract the exponent. + * + * int msb = (floatBitsToInt(as_float) >> 23) - 0x7f; + */ + i.insert_before(msb); + i.insert_before(assign(msb, sub(rshift(bitcast_f2i(as_float), c23), c7F))); + + /* Use msb in the comparison instead of temp so that the subtract can + * possibly generate the result without an explicit comparison. + * + * (msb < 0) ? -1 : msb; + * + * Since our input values are all integers, the unbiased exponent must not + * be negative. It will only be negative (-0x7f, in fact) if temp is 0. + */ + ir->operation = ir_triop_csel; + ir->operands[0] = less(msb, c0); + ir->operands[1] = cminus1; + ir->operands[2] = new(ir) ir_dereference_variable(msb); + + this->progress = true; +} + +ir_expression * +lower_instructions_visitor::_carry(operand a, operand b) +{ + if (lowering(CARRY_TO_ARITH)) + return i2u(b2i(less(add(a, b), + a.val->clone(ralloc_parent(a.val), NULL)))); + else + return carry(a, b); +} + +void +lower_instructions_visitor::imul_high_to_mul(ir_expression *ir) +{ + /* ABCD + * * EFGH + * ====== + * (GH * CD) + (GH * AB) << 16 + (EF * CD) << 16 + (EF * AB) << 32 + * + * In GLSL, (a * b) becomes + * + * uint m1 = (a & 0x0000ffffu) * (b & 0x0000ffffu); + * uint m2 = (a & 0x0000ffffu) * (b >> 16); + * uint m3 = (a >> 16) * (b & 0x0000ffffu); + * uint m4 = (a >> 16) * (b >> 16); + * + * uint c1; + * uint c2; + * uint lo_result; + * uint hi_result; + * + * lo_result = uaddCarry(m1, m2 << 16, c1); + * hi_result = m4 + c1; + * lo_result = uaddCarry(lo_result, m3 << 16, c2); + * hi_result = hi_result + c2; + * hi_result = hi_result + (m2 >> 16) + (m3 >> 16); + */ + const unsigned elements = ir->operands[0]->type->vector_elements; + ir_variable *src1 = + new(ir) ir_variable(glsl_type::uvec(elements), "src1", ir_var_temporary); + ir_variable *src1h = + new(ir) ir_variable(glsl_type::uvec(elements), "src1h", ir_var_temporary); + ir_variable *src1l = + new(ir) ir_variable(glsl_type::uvec(elements), "src1l", ir_var_temporary); + ir_variable *src2 = + new(ir) ir_variable(glsl_type::uvec(elements), "src2", ir_var_temporary); + ir_variable *src2h = + new(ir) ir_variable(glsl_type::uvec(elements), "src2h", ir_var_temporary); + ir_variable *src2l = + new(ir) ir_variable(glsl_type::uvec(elements), "src2l", ir_var_temporary); + ir_variable *t1 = + new(ir) ir_variable(glsl_type::uvec(elements), "t1", ir_var_temporary); + ir_variable *t2 = + new(ir) ir_variable(glsl_type::uvec(elements), "t2", ir_var_temporary); + ir_variable *lo = + new(ir) ir_variable(glsl_type::uvec(elements), "lo", ir_var_temporary); + ir_variable *hi = + new(ir) ir_variable(glsl_type::uvec(elements), "hi", ir_var_temporary); + ir_variable *different_signs = NULL; + ir_constant *c0000FFFF = new(ir) ir_constant(0x0000FFFFu, elements); + ir_constant *c16 = new(ir) ir_constant(16u, elements); + + ir_instruction &i = *base_ir; + + i.insert_before(src1); + i.insert_before(src2); + i.insert_before(src1h); + i.insert_before(src2h); + i.insert_before(src1l); + i.insert_before(src2l); + + if (ir->operands[0]->type->base_type == GLSL_TYPE_UINT) { + i.insert_before(assign(src1, ir->operands[0])); + i.insert_before(assign(src2, ir->operands[1])); + } else { + assert(ir->operands[0]->type->base_type == GLSL_TYPE_INT); + + ir_variable *itmp1 = + new(ir) ir_variable(glsl_type::ivec(elements), "itmp1", ir_var_temporary); + ir_variable *itmp2 = + new(ir) ir_variable(glsl_type::ivec(elements), "itmp2", ir_var_temporary); + ir_constant *c0 = new(ir) ir_constant(int(0), elements); + + i.insert_before(itmp1); + i.insert_before(itmp2); + i.insert_before(assign(itmp1, ir->operands[0])); + i.insert_before(assign(itmp2, ir->operands[1])); + + different_signs = + new(ir) ir_variable(glsl_type::bvec(elements), "different_signs", + ir_var_temporary); + + i.insert_before(different_signs); + i.insert_before(assign(different_signs, expr(ir_binop_logic_xor, + less(itmp1, c0), + less(itmp2, c0->clone(ir, NULL))))); + + i.insert_before(assign(src1, i2u(abs(itmp1)))); + i.insert_before(assign(src2, i2u(abs(itmp2)))); + } + + i.insert_before(assign(src1l, bit_and(src1, c0000FFFF))); + i.insert_before(assign(src2l, bit_and(src2, c0000FFFF->clone(ir, NULL)))); + i.insert_before(assign(src1h, rshift(src1, c16))); + i.insert_before(assign(src2h, rshift(src2, c16->clone(ir, NULL)))); + + i.insert_before(lo); + i.insert_before(hi); + i.insert_before(t1); + i.insert_before(t2); + + i.insert_before(assign(lo, mul(src1l, src2l))); + i.insert_before(assign(t1, mul(src1l, src2h))); + i.insert_before(assign(t2, mul(src1h, src2l))); + i.insert_before(assign(hi, mul(src1h, src2h))); + + i.insert_before(assign(hi, add(hi, _carry(lo, lshift(t1, c16->clone(ir, NULL)))))); + i.insert_before(assign(lo, add(lo, lshift(t1, c16->clone(ir, NULL))))); + + i.insert_before(assign(hi, add(hi, _carry(lo, lshift(t2, c16->clone(ir, NULL)))))); + i.insert_before(assign(lo, add(lo, lshift(t2, c16->clone(ir, NULL))))); + + if (different_signs == NULL) { + assert(ir->operands[0]->type->base_type == GLSL_TYPE_UINT); + + ir->operation = ir_binop_add; + ir->operands[0] = add(hi, rshift(t1, c16->clone(ir, NULL))); + ir->operands[1] = rshift(t2, c16->clone(ir, NULL)); + } else { + assert(ir->operands[0]->type->base_type == GLSL_TYPE_INT); + + i.insert_before(assign(hi, add(add(hi, rshift(t1, c16->clone(ir, NULL))), + rshift(t2, c16->clone(ir, NULL))))); + + /* For channels where different_signs is set we have to perform a 64-bit + * negation. This is *not* the same as just negating the high 32-bits. + * Consider -3 * 2. The high 32-bits is 0, but the desired result is + * -1, not -0! Recall -x == ~x + 1. + */ + ir_variable *neg_hi = + new(ir) ir_variable(glsl_type::ivec(elements), "neg_hi", ir_var_temporary); + ir_constant *c1 = new(ir) ir_constant(1u, elements); + + i.insert_before(neg_hi); + i.insert_before(assign(neg_hi, add(bit_not(u2i(hi)), + u2i(_carry(bit_not(lo), c1))))); + + ir->operation = ir_triop_csel; + ir->operands[0] = new(ir) ir_dereference_variable(different_signs); + ir->operands[1] = new(ir) ir_dereference_variable(neg_hi); + ir->operands[2] = u2i(hi); + } +} + ir_visitor_status lower_instructions_visitor::visit_leave(ir_expression *ir) { @@ -974,8 +1602,8 @@ case ir_binop_div: if (ir->operands[1]->type->is_integer() && lowering(INT_DIV_TO_MUL_RCP)) int_div_to_mul_rcp(ir); - else if ((ir->operands[1]->type->is_float() || - ir->operands[1]->type->is_double()) && lowering(DIV_TO_MUL_RCP)) + else if ((ir->operands[1]->type->is_float() && lowering(FDIV_TO_MUL_RCP)) || + (ir->operands[1]->type->is_double() && lowering(DDIV_TO_MUL_RCP))) div_to_mul_rcp(ir); break; @@ -1055,6 +1683,42 @@ if (lowering(DOPS_TO_DFRAC) && ir->type->is_double()) dsign_to_csel(ir); break; + + case ir_unop_bit_count: + if (lowering(BIT_COUNT_TO_MATH)) + bit_count_to_math(ir); + break; + + case ir_triop_bitfield_extract: + if (lowering(EXTRACT_TO_SHIFTS)) + extract_to_shifts(ir); + break; + + case ir_quadop_bitfield_insert: + if (lowering(INSERT_TO_SHIFTS)) + insert_to_shifts(ir); + break; + + case ir_unop_bitfield_reverse: + if (lowering(REVERSE_TO_SHIFTS)) + reverse_to_shifts(ir); + break; + + case ir_unop_find_lsb: + if (lowering(FIND_LSB_TO_FLOAT_CAST)) + find_lsb_to_float_cast(ir); + break; + + case ir_unop_find_msb: + if (lowering(FIND_MSB_TO_FLOAT_CAST)) + find_msb_to_float_cast(ir); + break; + + case ir_binop_imul_high: + if (lowering(IMUL_HIGH_TO_MUL)) + imul_high_to_mul(ir); + break; + default: return visit_continue; } diff -Nru mesa-12.0.6/src/compiler/glsl/lower_jumps.cpp mesa-17.0.7/src/compiler/glsl/lower_jumps.cpp --- mesa-12.0.6/src/compiler/glsl/lower_jumps.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/lower_jumps.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -777,7 +777,7 @@ * analysis. */ exec_list list; - list.head = next; + list.head_sentinel.next = next; block_records[move_into] = visit_block(&list); /* @@ -932,14 +932,21 @@ * break statement if necessary. */ return_if->then_instructions.push_tail(new(ir) ir_loop_jump(ir_loop_jump::jump_break)); - else - /* Otherwise, all we need to do is ensure that the - * instructions that follow are only executed if the - * return flag is clear. We can do that by moving those - * instructions into the else clause of the generated if + else { + /* Otherwise, ensure that the instructions that follow are only + * executed if the return flag is clear. We can do that by moving + * those instructions into the else clause of the generated if * statement. */ move_outer_block_inside(ir, &return_if->else_instructions); + + /* In case the loop is embeded inside an if add a new return to + * the return flag then branch and let a future pass tidy it up. + */ + if (this->function.signature->return_type->is_void()) + return_if->then_instructions.push_tail(new(ir) ir_return(NULL)); + } + ir->insert_after(return_if); } diff -Nru mesa-12.0.6/src/compiler/glsl/lower_mat_op_to_vec.cpp mesa-17.0.7/src/compiler/glsl/lower_mat_op_to_vec.cpp --- mesa-12.0.6/src/compiler/glsl/lower_mat_op_to_vec.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/lower_mat_op_to_vec.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -428,7 +428,7 @@ default: printf("FINISHME: Handle matrix operation for %s\n", - orig_expr->operator_string()); + ir_expression_operation_strings[orig_expr->operation]); abort(); } orig_assign->remove(); diff -Nru mesa-12.0.6/src/compiler/glsl/lower_named_interface_blocks.cpp mesa-17.0.7/src/compiler/glsl/lower_named_interface_blocks.cpp --- mesa-12.0.6/src/compiler/glsl/lower_named_interface_blocks.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/lower_named_interface_blocks.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -63,7 +63,7 @@ #include "ir.h" #include "ir_optimization.h" #include "ir_rvalue_visitor.h" -#include "program/hash_table.h" +#include "util/hash_table.h" static const glsl_type * process_array_type(const glsl_type *type, unsigned idx) @@ -123,8 +123,8 @@ void flatten_named_interface_blocks_declarations::run(exec_list *instructions) { - interface_namespace = hash_table_ctor(0, hash_table_string_hash, - hash_table_string_compare); + interface_namespace = _mesa_hash_table_create(NULL, _mesa_key_hash_string, + _mesa_key_string_equal); /* First pass: adjust instance block variables with an instance name * to not have an instance name. @@ -157,9 +157,9 @@ var->data.mode == ir_var_shader_in ? "in" : "out", iface_t->name, var->name, field_name); - ir_variable *found_var = - (ir_variable *) hash_table_find(interface_namespace, - iface_field_name); + hash_entry *entry = _mesa_hash_table_search(interface_namespace, + iface_field_name); + ir_variable *found_var = entry ? (ir_variable *) entry->data : NULL; if (!found_var) { ir_variable *new_var; char *var_name = @@ -193,11 +193,13 @@ new_var->data.patch = iface_t->fields.structure[i].patch; new_var->data.stream = var->data.stream; new_var->data.how_declared = var->data.how_declared; + new_var->data.tess_varying_implicit_sized_array = + var->data.tess_varying_implicit_sized_array; new_var->data.from_named_ifc_block = 1; new_var->init_interface_type(var->type); - hash_table_insert(interface_namespace, new_var, - iface_field_name); + _mesa_hash_table_insert(interface_namespace, iface_field_name, + new_var); insert_pos->insert_after(new_var); insert_pos = new_var; } @@ -209,7 +211,7 @@ * reference an interface block, then flatten the refererence out. */ visit_list_elements(this, instructions); - hash_table_dtor(interface_namespace); + _mesa_hash_table_destroy(interface_namespace, NULL); interface_namespace = NULL; } @@ -268,11 +270,12 @@ var->data.mode == ir_var_shader_in ? "in" : "out", var->get_interface_type()->name, var->name, ir->field); + /* Find the variable in the set of flattened interface blocks */ - ir_variable *found_var = - (ir_variable *) hash_table_find(interface_namespace, - iface_field_name); - assert(found_var); + hash_entry *entry = _mesa_hash_table_search(interface_namespace, + iface_field_name); + assert(entry); + ir_variable *found_var = (ir_variable *) entry->data; ir_dereference_variable *deref_var = new(mem_ctx) ir_dereference_variable(found_var); @@ -289,7 +292,7 @@ } void -lower_named_interface_blocks(void *mem_ctx, gl_shader *shader) +lower_named_interface_blocks(void *mem_ctx, gl_linked_shader *shader) { flatten_named_interface_blocks_declarations v_decl(mem_ctx); v_decl.run(shader->ir); diff -Nru mesa-12.0.6/src/compiler/glsl/lower_output_reads.cpp mesa-17.0.7/src/compiler/glsl/lower_output_reads.cpp --- mesa-12.0.6/src/compiler/glsl/lower_output_reads.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/lower_output_reads.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -23,7 +23,7 @@ */ #include "ir.h" -#include "program/hash_table.h" +#include "util/hash_table.h" /** * \file lower_output_reads.cpp @@ -47,8 +47,6 @@ */ hash_table *replacements; - void *mem_ctx; - unsigned stage; public: output_read_remover(unsigned stage); @@ -74,39 +72,36 @@ hash_table_var_hash(const void *key) { const ir_variable * var = static_cast(key); - return hash_table_string_hash(var->name); + return _mesa_key_hash_string(var->name); } output_read_remover::output_read_remover(unsigned stage) { this->stage = stage; - mem_ctx = ralloc_context(NULL); - replacements = - hash_table_ctor(0, hash_table_var_hash, hash_table_pointer_compare); + replacements = _mesa_hash_table_create(NULL, hash_table_var_hash, + _mesa_key_pointer_equal); } output_read_remover::~output_read_remover() { - hash_table_dtor(replacements); - ralloc_free(mem_ctx); + _mesa_hash_table_destroy(replacements, NULL); } ir_visitor_status output_read_remover::visit(ir_dereference_variable *ir) { - if (ir->var->data.mode != ir_var_shader_out) - return visit_continue; - if (stage == MESA_SHADER_TESS_CTRL) + if (ir->var->data.mode != ir_var_shader_out || ir->var->data.fb_fetch_output) return visit_continue; - ir_variable *temp = (ir_variable *) hash_table_find(replacements, ir->var); + hash_entry *entry = _mesa_hash_table_search(replacements, ir->var); + ir_variable *temp = entry ? (ir_variable *) entry->data : NULL; /* If we don't have an existing temporary, create one. */ if (temp == NULL) { void *var_ctx = ralloc_parent(ir->var); temp = new(var_ctx) ir_variable(ir->var->type, ir->var->name, ir_var_temporary); - hash_table_insert(replacements, temp, ir->var); + _mesa_hash_table_insert(replacements, ir->var, temp); ir->var->insert_after(temp); } @@ -156,7 +151,6 @@ output_read_remover::visit_leave(ir_emit_vertex *ir) { hash_table_call_foreach(replacements, emit_return_copy, ir); - hash_table_clear(replacements); return visit_continue; } @@ -173,6 +167,12 @@ void lower_output_reads(unsigned stage, exec_list *instructions) { + /* Due to the possible interactions between multiple tessellation control + * shader invocations, we leave output variables as-is. + */ + if (stage == MESA_SHADER_TESS_CTRL) + return; + output_read_remover v(stage); visit_list_elements(&v, instructions); } diff -Nru mesa-12.0.6/src/compiler/glsl/lower_packed_varyings.cpp mesa-17.0.7/src/compiler/glsl/lower_packed_varyings.cpp --- mesa-12.0.6/src/compiler/glsl/lower_packed_varyings.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/lower_packed_varyings.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -164,7 +164,9 @@ class lower_packed_varyings_visitor { public: - lower_packed_varyings_visitor(void *mem_ctx, unsigned locations_used, + lower_packed_varyings_visitor(void *mem_ctx, + unsigned locations_used, + const uint8_t *components, ir_variable_mode mode, unsigned gs_input_vertices, exec_list *out_instructions, @@ -172,7 +174,7 @@ bool disable_varying_packing, bool xfb_enabled); - void run(struct gl_shader *shader); + void run(struct gl_linked_shader *shader); private: void bitwise_assign_pack(ir_rvalue *lhs, ir_rvalue *rhs); @@ -203,6 +205,8 @@ */ const unsigned locations_used; + const uint8_t* components; + /** * Array of pointers to the packed varyings that have been created for each * generic varying slot. NULL entries in this array indicate varying slots @@ -241,12 +245,14 @@ } /* anonymous namespace */ lower_packed_varyings_visitor::lower_packed_varyings_visitor( - void *mem_ctx, unsigned locations_used, ir_variable_mode mode, + void *mem_ctx, unsigned locations_used, const uint8_t *components, + ir_variable_mode mode, unsigned gs_input_vertices, exec_list *out_instructions, exec_list *out_variables, bool disable_varying_packing, bool xfb_enabled) : mem_ctx(mem_ctx), locations_used(locations_used), + components(components), packed_varyings((ir_variable **) rzalloc_array_size(mem_ctx, sizeof(*packed_varyings), locations_used)), @@ -260,7 +266,7 @@ } void -lower_packed_varyings_visitor::run(struct gl_shader *shader) +lower_packed_varyings_visitor::run(struct gl_linked_shader *shader) { foreach_in_list(ir_instruction, node, shader->ir) { ir_variable *var = node->as_variable(); @@ -276,8 +282,8 @@ * together when their interpolation mode is "flat". Treat integers as * being flat when the interpolation mode is none. */ - assert(var->data.interpolation == INTERP_QUALIFIER_FLAT || - var->data.interpolation == INTERP_QUALIFIER_NONE || + assert(var->data.interpolation == INTERP_MODE_FLAT || + var->data.interpolation == INTERP_MODE_NONE || !var->type->contains_integer()); /* Clone the variable for program resource list before @@ -432,7 +438,7 @@ bool gs_input_toplevel, unsigned vertex_index) { - unsigned dmul = rvalue->type->is_double() ? 2 : 1; + unsigned dmul = rvalue->type->is_64bit() ? 2 : 1; /* When gs_input_toplevel is set, we should be looking at a geometry shader * input array. */ @@ -480,7 +486,7 @@ char right_swizzle_name[4] = { 0, 0, 0, 0 }; left_components = 4 - fine_location % 4; - if (rvalue->type->is_double()) { + if (rvalue->type->is_64bit()) { /* We might actually end up with 0 left components! */ left_components /= 2; } @@ -525,6 +531,14 @@ ir_dereference *packed_deref = this->get_packed_varying_deref(location, unpacked_var, name, vertex_index); + if (unpacked_var->data.stream != 0) { + assert(unpacked_var->data.stream < 4); + ir_variable *packed_var = packed_deref->variable_referenced(); + for (unsigned i = 0; i < components; ++i) { + packed_var->data.stream |= + unpacked_var->data.stream << (2 * (location_frac + i)); + } + } ir_swizzle *swizzle = new(this->mem_ctx) ir_swizzle(packed_deref, swizzle_values, components); if (this->mode == ir_var_shader_out) { @@ -607,10 +621,11 @@ if (this->packed_varyings[slot] == NULL) { char *packed_name = ralloc_asprintf(this->mem_ctx, "packed:%s", name); const glsl_type *packed_type; + assert(components[slot] != 0); if (unpacked_var->is_interpolation_flat()) - packed_type = glsl_type::ivec4_type; + packed_type = glsl_type::get_instance(GLSL_TYPE_INT, components[slot], 1); else - packed_type = glsl_type::vec4_type; + packed_type = glsl_type::get_instance(GLSL_TYPE_FLOAT, components[slot], 1); if (this->gs_input_vertices != 0) { packed_type = glsl_type::get_array_instance(packed_type, @@ -628,10 +643,11 @@ packed_var->data.sample = unpacked_var->data.sample; packed_var->data.patch = unpacked_var->data.patch; packed_var->data.interpolation = packed_type == glsl_type::ivec4_type - ? unsigned(INTERP_QUALIFIER_FLAT) : unpacked_var->data.interpolation; + ? unsigned(INTERP_MODE_FLAT) : unpacked_var->data.interpolation; packed_var->data.location = location; packed_var->data.precision = unpacked_var->data.precision; packed_var->data.always_active_io = unpacked_var->data.always_active_io; + packed_var->data.stream = 1u << 31; unpacked_var->insert_before(packed_var); this->packed_varyings[slot] = packed_var; } else { @@ -639,8 +655,12 @@ * first time we visit each component. */ if (this->gs_input_vertices == 0 || vertex_index == 0) { - ralloc_asprintf_append((char **) &this->packed_varyings[slot]->name, - ",%s", name); + ir_variable *var = this->packed_varyings[slot]; + + if (var->is_name_ralloced()) + ralloc_asprintf_append((char **) &var->name, ",%s", name); + else + var->name = ralloc_asprintf(var, "%s,%s", var->name, name); } } @@ -677,7 +697,7 @@ return false; type = type->without_array(); - if (type->vector_elements == 4 && !type->is_double()) + if (type->vector_elements == 4 && !type->is_64bit()) return false; return true; } @@ -767,8 +787,9 @@ void lower_packed_varyings(void *mem_ctx, unsigned locations_used, + const uint8_t *components, ir_variable_mode mode, unsigned gs_input_vertices, - gl_shader *shader, bool disable_varying_packing, + gl_linked_shader *shader, bool disable_varying_packing, bool xfb_enabled) { exec_list *instructions = shader->ir; @@ -777,7 +798,10 @@ ir_function_signature *main_func_sig = main_func->matching_signature(NULL, &void_parameters, false); exec_list new_instructions, new_variables; - lower_packed_varyings_visitor visitor(mem_ctx, locations_used, mode, + lower_packed_varyings_visitor visitor(mem_ctx, + locations_used, + components, + mode, gs_input_vertices, &new_instructions, &new_variables, @@ -792,7 +816,7 @@ lower_packed_varyings_gs_splicer splicer(mem_ctx, &new_instructions); /* Add all the variables in first. */ - main_func_sig->body.head->insert_before(&new_variables); + main_func_sig->body.get_head_raw()->insert_before(&new_variables); /* Now update all the EmitVertex instances */ splicer.run(instructions); @@ -803,7 +827,7 @@ lower_packed_varyings_return_splicer splicer(mem_ctx, &new_instructions); - main_func_sig->body.head->insert_before(&new_variables); + main_func_sig->body.get_head_raw()->insert_before(&new_variables); splicer.run(instructions); @@ -816,7 +840,7 @@ } } else { /* Shader inputs need to be lowered at the beginning of main() */ - main_func_sig->body.head->insert_before(&new_instructions); - main_func_sig->body.head->insert_before(&new_variables); + main_func_sig->body.get_head_raw()->insert_before(&new_instructions); + main_func_sig->body.get_head_raw()->insert_before(&new_variables); } } diff -Nru mesa-12.0.6/src/compiler/glsl/lower_shared_reference.cpp mesa-17.0.7/src/compiler/glsl/lower_shared_reference.cpp --- mesa-12.0.6/src/compiler/glsl/lower_shared_reference.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/lower_shared_reference.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -51,7 +51,7 @@ public lower_buffer_access::lower_buffer_access { public: - lower_shared_reference_visitor(struct gl_shader *shader) + lower_shared_reference_visitor(struct gl_linked_shader *shader) : list_ctx(ralloc_context(NULL)), shader(shader), shared_size(0u) { list_inithead(&var_offsets); @@ -88,7 +88,7 @@ unsigned write_mask); void *list_ctx; - struct gl_shader *shader; + struct gl_linked_shader *shader; struct list_head var_offsets; unsigned shared_size; bool progress; @@ -138,9 +138,9 @@ bool row_major; int matrix_columns; assert(var->get_interface_type() == NULL); - const unsigned packing = GLSL_INTERFACE_PACKING_STD430; + const enum glsl_interface_packing packing = GLSL_INTERFACE_PACKING_STD430; - setup_buffer_access(mem_ctx, var, deref, + setup_buffer_access(mem_ctx, deref, &offset, &const_offset, &row_major, &matrix_columns, NULL, packing); @@ -206,9 +206,9 @@ bool row_major; int matrix_columns; assert(var->get_interface_type() == NULL); - const unsigned packing = GLSL_INTERFACE_PACKING_STD430; + const enum glsl_interface_packing packing = GLSL_INTERFACE_PACKING_STD430; - setup_buffer_access(mem_ctx, var, deref, + setup_buffer_access(mem_ctx, deref, &offset, &const_offset, &row_major, &matrix_columns, NULL, packing); @@ -284,7 +284,7 @@ ir_function_signature(glsl_type::void_type, compute_shader_enabled); assert(sig); sig->replace_parameters(&sig_params); - sig->is_intrinsic = true; + sig->intrinsic_id = ir_intrinsic_shared_store; ir_function *f = new(mem_ctx) ir_function("__intrinsic_store_shared"); f->add_signature(sig); @@ -311,7 +311,7 @@ new(mem_ctx) ir_function_signature(type, compute_shader_enabled); assert(sig); sig->replace_parameters(&sig_params); - sig->is_intrinsic = true; + sig->intrinsic_id = ir_intrinsic_shared_load; ir_function *f = new(mem_ctx) ir_function("__intrinsic_load_shared"); f->add_signature(sig); @@ -365,10 +365,10 @@ bool row_major; int matrix_columns; assert(var->get_interface_type() == NULL); - const unsigned packing = GLSL_INTERFACE_PACKING_STD430; + const enum glsl_interface_packing packing = GLSL_INTERFACE_PACKING_STD430; buffer_access_type = shared_atomic_access; - setup_buffer_access(mem_ctx, var, deref, + setup_buffer_access(mem_ctx, deref, &offset, &const_offset, &row_major, &matrix_columns, NULL, packing); @@ -404,7 +404,10 @@ compute_shader_enabled); assert(sig); sig->replace_parameters(&sig_params); - sig->is_intrinsic = true; + + assert(ir->callee->intrinsic_id >= ir_intrinsic_generic_load); + assert(ir->callee->intrinsic_id <= ir_intrinsic_generic_atomic_comp_swap); + sig->intrinsic_id = MAP_INTRINSIC_TO_TYPE(ir->callee->intrinsic_id, shared); char func_name[64]; sprintf(func_name, "%s_shared", ir->callee_name()); @@ -444,15 +447,15 @@ if (!var || var->data.mode != ir_var_shader_shared) return ir; - const char *callee = ir->callee_name(); - if (!strcmp("__intrinsic_atomic_add", callee) || - !strcmp("__intrinsic_atomic_min", callee) || - !strcmp("__intrinsic_atomic_max", callee) || - !strcmp("__intrinsic_atomic_and", callee) || - !strcmp("__intrinsic_atomic_or", callee) || - !strcmp("__intrinsic_atomic_xor", callee) || - !strcmp("__intrinsic_atomic_exchange", callee) || - !strcmp("__intrinsic_atomic_comp_swap", callee)) { + const enum ir_intrinsic_id id = ir->callee->intrinsic_id; + if (id == ir_intrinsic_generic_atomic_add || + id == ir_intrinsic_generic_atomic_min || + id == ir_intrinsic_generic_atomic_max || + id == ir_intrinsic_generic_atomic_and || + id == ir_intrinsic_generic_atomic_or || + id == ir_intrinsic_generic_atomic_xor || + id == ir_intrinsic_generic_atomic_exchange || + id == ir_intrinsic_generic_atomic_comp_swap) { return lower_shared_atomic_intrinsic(ir); } @@ -475,7 +478,7 @@ } /* unnamed namespace */ void -lower_shared_reference(struct gl_shader *shader, unsigned *shared_size) +lower_shared_reference(struct gl_linked_shader *shader, unsigned *shared_size) { if (shader->Stage != MESA_SHADER_COMPUTE) return; diff -Nru mesa-12.0.6/src/compiler/glsl/lower_tess_level.cpp mesa-17.0.7/src/compiler/glsl/lower_tess_level.cpp --- mesa-12.0.6/src/compiler/glsl/lower_tess_level.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/lower_tess_level.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -382,8 +382,8 @@ { void *ctx = ralloc_parent(ir); - const exec_node *formal_param_node = ir->callee->parameters.head; - const exec_node *actual_param_node = ir->actual_parameters.head; + const exec_node *formal_param_node = ir->callee->parameters.get_head_raw(); + const exec_node *actual_param_node = ir->actual_parameters.get_head_raw(); while (!actual_param_node->is_tail_sentinel()) { ir_variable *formal_param = (ir_variable *) formal_param_node; ir_rvalue *actual_param = (ir_rvalue *) actual_param_node; @@ -440,7 +440,7 @@ bool -lower_tess_level(gl_shader *shader) +lower_tess_level(gl_linked_shader *shader) { if ((shader->Stage != MESA_SHADER_TESS_CTRL) && (shader->Stage != MESA_SHADER_TESS_EVAL)) diff -Nru mesa-12.0.6/src/compiler/glsl/lower_texture_projection.cpp mesa-17.0.7/src/compiler/glsl/lower_texture_projection.cpp --- mesa-12.0.6/src/compiler/glsl/lower_texture_projection.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/lower_texture_projection.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -78,11 +78,11 @@ ir->coordinate, deref); - if (ir->shadow_comparitor) { + if (ir->shadow_comparator) { deref = new(mem_ctx) ir_dereference_variable(var); - ir->shadow_comparitor = new(mem_ctx) ir_expression(ir_binop_mul, - ir->shadow_comparitor->type, - ir->shadow_comparitor, + ir->shadow_comparator = new(mem_ctx) ir_expression(ir_binop_mul, + ir->shadow_comparator->type, + ir->shadow_comparator, deref); } diff -Nru mesa-12.0.6/src/compiler/glsl/lower_ubo_reference.cpp mesa-17.0.7/src/compiler/glsl/lower_ubo_reference.cpp --- mesa-12.0.6/src/compiler/glsl/lower_ubo_reference.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/lower_ubo_reference.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -44,7 +44,7 @@ class lower_ubo_reference_visitor : public lower_buffer_access::lower_buffer_access { public: - lower_ubo_reference_visitor(struct gl_shader *shader, + lower_ubo_reference_visitor(struct gl_linked_shader *shader, bool clamp_block_indices) : shader(shader), clamp_block_indices(clamp_block_indices), struct_field(NULL), variable(NULL) @@ -61,7 +61,7 @@ unsigned *const_offset, bool *row_major, int *matrix_columns, - unsigned packing); + enum glsl_interface_packing packing); uint32_t ssbo_access_params(); ir_expression *ubo_load(void *mem_ctx, const struct glsl_type *type, ir_rvalue *offset); @@ -99,15 +99,14 @@ ir_expression *emit_ssbo_get_buffer_size(void *mem_ctx); unsigned calculate_unsized_array_stride(ir_dereference *deref, - unsigned packing); + enum glsl_interface_packing packing); ir_call *lower_ssbo_atomic_intrinsic(ir_call *ir); ir_call *check_for_ssbo_atomic_intrinsic(ir_call *ir); ir_visitor_status visit_enter(ir_call *ir); - struct gl_shader *shader; + struct gl_linked_shader *shader; bool clamp_block_indices; - struct gl_uniform_buffer_variable *ubo_var; const struct glsl_struct_field *struct_field; ir_variable *variable; ir_rvalue *uniform_block; @@ -273,7 +272,7 @@ unsigned *const_offset, bool *row_major, int *matrix_columns, - unsigned packing) + enum glsl_interface_packing packing) { /* Determine the name of the interface block */ ir_rvalue *nonconst_block_index; @@ -290,11 +289,11 @@ unsigned num_blocks; struct gl_uniform_block **blocks; if (this->buffer_access_type != ubo_load_access) { - num_blocks = shader->NumShaderStorageBlocks; - blocks = shader->ShaderStorageBlocks; + num_blocks = shader->Program->info.num_ssbos; + blocks = shader->Program->sh.ShaderStorageBlocks; } else { - num_blocks = shader->NumUniformBlocks; - blocks = shader->UniformBlocks; + num_blocks = shader->Program->info.num_ubos; + blocks = shader->Program->sh.UniformBlocks; } this->uniform_block = NULL; for (unsigned i = 0; i < num_blocks; i++) { @@ -308,8 +307,11 @@ this->uniform_block = index; } - this->ubo_var = var->is_interface_instance() - ? &blocks[i]->Uniforms[0] : &blocks[i]->Uniforms[var->data.location]; + if (var->is_interface_instance()) { + *const_offset = 0; + } else { + *const_offset = blocks[i]->Uniforms[var->data.location].Offset; + } break; } @@ -317,10 +319,8 @@ assert(this->uniform_block); - *const_offset = ubo_var->Offset; - this->struct_field = NULL; - setup_buffer_access(mem_ctx, var, deref, offset, const_offset, row_major, + setup_buffer_access(mem_ctx, deref, offset, const_offset, row_major, matrix_columns, &this->struct_field, packing); } @@ -344,7 +344,7 @@ unsigned const_offset; bool row_major; int matrix_columns; - unsigned packing = var->get_interface_type()->interface_packing; + enum glsl_interface_packing packing = var->get_interface_type_packing(); this->buffer_access_type = var->is_in_shader_storage_block() ? @@ -453,7 +453,7 @@ ir_function_signature(glsl_type::void_type, shader_storage_buffer_object); assert(sig); sig->replace_parameters(&sig_params); - sig->is_intrinsic = true; + sig->intrinsic_id = ir_intrinsic_ssbo_store; ir_function *f = new(mem_ctx) ir_function("__intrinsic_store_ssbo"); f->add_signature(sig); @@ -490,7 +490,7 @@ new(mem_ctx) ir_function_signature(type, shader_storage_buffer_object); assert(sig); sig->replace_parameters(&sig_params); - sig->is_intrinsic = true; + sig->intrinsic_id = ir_intrinsic_ssbo_load; ir_function *f = new(mem_ctx) ir_function("__intrinsic_load_ssbo"); f->add_signature(sig); @@ -557,7 +557,7 @@ unsigned const_offset; bool row_major; int matrix_columns; - unsigned packing = var->get_interface_type()->interface_packing; + enum glsl_interface_packing packing = var->get_interface_type_packing(); this->buffer_access_type = ssbo_store_access; this->variable = var; @@ -666,7 +666,7 @@ unsigned lower_ubo_reference_visitor::calculate_unsized_array_stride(ir_dereference *deref, - unsigned packing) + enum glsl_interface_packing packing) { unsigned array_stride = 0; @@ -736,7 +736,7 @@ unsigned const_offset; bool row_major; int matrix_columns; - unsigned packing = var->get_interface_type()->interface_packing; + enum glsl_interface_packing packing = var->get_interface_type_packing(); int unsized_array_stride = calculate_unsized_array_stride(deref, packing); this->buffer_access_type = ssbo_unsized_array_length_access; @@ -970,7 +970,7 @@ unsigned const_offset; bool row_major; int matrix_columns; - unsigned packing = var->get_interface_type()->interface_packing; + enum glsl_interface_packing packing = var->get_interface_type_packing(); this->buffer_access_type = ssbo_atomic_access; this->variable = var; @@ -1016,7 +1016,10 @@ shader_storage_buffer_object); assert(sig); sig->replace_parameters(&sig_params); - sig->is_intrinsic = true; + + assert(ir->callee->intrinsic_id >= ir_intrinsic_generic_load); + assert(ir->callee->intrinsic_id <= ir_intrinsic_generic_atomic_comp_swap); + sig->intrinsic_id = MAP_INTRINSIC_TO_TYPE(ir->callee->intrinsic_id, ssbo); char func_name[64]; sprintf(func_name, "%s_ssbo", ir->callee_name()); @@ -1057,15 +1060,15 @@ if (!var || !var->is_in_shader_storage_block()) return ir; - const char *callee = ir->callee_name(); - if (!strcmp("__intrinsic_atomic_add", callee) || - !strcmp("__intrinsic_atomic_min", callee) || - !strcmp("__intrinsic_atomic_max", callee) || - !strcmp("__intrinsic_atomic_and", callee) || - !strcmp("__intrinsic_atomic_or", callee) || - !strcmp("__intrinsic_atomic_xor", callee) || - !strcmp("__intrinsic_atomic_exchange", callee) || - !strcmp("__intrinsic_atomic_comp_swap", callee)) { + const enum ir_intrinsic_id id = ir->callee->intrinsic_id; + if (id == ir_intrinsic_generic_atomic_add || + id == ir_intrinsic_generic_atomic_min || + id == ir_intrinsic_generic_atomic_max || + id == ir_intrinsic_generic_atomic_and || + id == ir_intrinsic_generic_atomic_or || + id == ir_intrinsic_generic_atomic_xor || + id == ir_intrinsic_generic_atomic_exchange || + id == ir_intrinsic_generic_atomic_comp_swap) { return lower_ssbo_atomic_intrinsic(ir); } @@ -1090,7 +1093,7 @@ } /* unnamed namespace */ void -lower_ubo_reference(struct gl_shader *shader, bool clamp_block_indices) +lower_ubo_reference(struct gl_linked_shader *shader, bool clamp_block_indices) { lower_ubo_reference_visitor v(shader, clamp_block_indices); diff -Nru mesa-12.0.6/src/compiler/glsl/lower_vector_derefs.cpp mesa-17.0.7/src/compiler/glsl/lower_vector_derefs.cpp --- mesa-12.0.6/src/compiler/glsl/lower_vector_derefs.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/lower_vector_derefs.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -94,7 +94,7 @@ } bool -lower_vector_derefs(gl_shader *shader) +lower_vector_derefs(gl_linked_shader *shader) { vector_deref_visitor v; diff -Nru mesa-12.0.6/src/compiler/glsl/lower_vertex_id.cpp mesa-17.0.7/src/compiler/glsl/lower_vertex_id.cpp --- mesa-12.0.6/src/compiler/glsl/lower_vertex_id.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/lower_vertex_id.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -122,7 +122,7 @@ } bool -lower_vertex_id(gl_shader *shader) +lower_vertex_id(gl_linked_shader *shader) { /* gl_VertexID only exists in the vertex shader. */ @@ -130,7 +130,7 @@ return false; ir_function_signature *const main_sig = - _mesa_get_main_function_signature(shader); + _mesa_get_main_function_signature(shader->symbols); if (main_sig == NULL) { assert(main_sig != NULL); return false; diff -Nru mesa-12.0.6/src/compiler/glsl/main.cpp mesa-17.0.7/src/compiler/glsl/main.cpp --- mesa-12.0.6/src/compiler/glsl/main.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/main.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -42,6 +42,7 @@ { "dump-ast", no_argument, &options.dump_ast, 1 }, { "dump-hir", no_argument, &options.dump_hir, 1 }, { "dump-lir", no_argument, &options.dump_lir, 1 }, + { "dump-builder", no_argument, &options.dump_builder, 1 }, { "link", no_argument, &options.do_link, 1 }, { "just-log", no_argument, &options.just_log, 1 }, { "version", required_argument, NULL, 'v' }, diff -Nru mesa-12.0.6/src/compiler/glsl/opt_add_neg_to_sub.h mesa-17.0.7/src/compiler/glsl/opt_add_neg_to_sub.h --- mesa-12.0.6/src/compiler/glsl/opt_add_neg_to_sub.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/opt_add_neg_to_sub.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,61 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef OPT_ADD_NEG_TO_SUB_H +#define OPT_ADD_NEG_TO_SUB_H + +#include "ir.h" +#include "ir_hierarchical_visitor.h" + +class add_neg_to_sub_visitor : public ir_hierarchical_visitor { +public: + add_neg_to_sub_visitor() + { + /* empty */ + } + + ir_visitor_status visit_leave(ir_expression *ir) + { + if (ir->operation != ir_binop_add) + return visit_continue; + + for (unsigned i = 0; i < 2; i++) { + ir_expression *const op = ir->operands[i]->as_expression(); + + if (op != NULL && op->operation == ir_unop_neg) { + ir->operation = ir_binop_sub; + + /* This ensures that -a + b becomes b - a. */ + if (i == 0) + ir->operands[0] = ir->operands[1]; + + ir->operands[1] = op->operands[0]; + break; + } + } + + return visit_continue; + } +}; + +#endif /* OPT_ADD_NEG_TO_SUB_H */ diff -Nru mesa-12.0.6/src/compiler/glsl/opt_algebraic.cpp mesa-17.0.7/src/compiler/glsl/opt_algebraic.cpp --- mesa-12.0.6/src/compiler/glsl/opt_algebraic.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/opt_algebraic.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -961,6 +961,16 @@ return ir->operands[2]; break; + /* Remove interpolateAt* instructions for demoted inputs. They are + * assigned a constant expression to facilitate this. + */ + case ir_unop_interpolate_at_centroid: + case ir_binop_interpolate_at_offset: + case ir_binop_interpolate_at_sample: + if (op_const[0]) + return ir->operands[0]; + break; + default: break; } diff -Nru mesa-12.0.6/src/compiler/glsl/opt_conditional_discard.cpp mesa-17.0.7/src/compiler/glsl/opt_conditional_discard.cpp --- mesa-12.0.6/src/compiler/glsl/opt_conditional_discard.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/opt_conditional_discard.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -65,13 +65,13 @@ { /* Look for "if (...) discard" with no else clause or extra statements. */ if (ir->then_instructions.is_empty() || - !ir->then_instructions.head->next->is_tail_sentinel() || - !((ir_instruction *) ir->then_instructions.head)->as_discard() || + !ir->then_instructions.get_head_raw()->next->is_tail_sentinel() || + !((ir_instruction *) ir->then_instructions.get_head_raw())->as_discard() || !ir->else_instructions.is_empty()) return visit_continue; /* Move the condition and replace the ir_if with the ir_discard. */ - ir_discard *discard = (ir_discard *) ir->then_instructions.head; + ir_discard *discard = (ir_discard *) ir->then_instructions.get_head_raw(); if (!discard->condition) discard->condition = ir->condition; else { diff -Nru mesa-12.0.6/src/compiler/glsl/opt_constant_propagation.cpp mesa-17.0.7/src/compiler/glsl/opt_constant_propagation.cpp --- mesa-12.0.6/src/compiler/glsl/opt_constant_propagation.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/opt_constant_propagation.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -47,6 +47,9 @@ class acp_entry : public exec_node { public: + /* override operator new from exec_node */ + DECLARE_LINEAR_ZALLOC_CXX_OPERATORS(acp_entry) + acp_entry(ir_variable *var, unsigned write_mask, ir_constant *constant) { assert(var); @@ -77,6 +80,9 @@ class kill_entry : public exec_node { public: + /* override operator new from exec_node */ + DECLARE_LINEAR_ZALLOC_CXX_OPERATORS(kill_entry) + kill_entry(ir_variable *var, unsigned write_mask) { assert(var); @@ -95,6 +101,7 @@ progress = false; killed_all = false; mem_ctx = ralloc_context(0); + this->lin_ctx = linear_alloc_parent(this->mem_ctx, 0); this->acp = new(mem_ctx) exec_list; this->kills = _mesa_hash_table_create(mem_ctx, _mesa_hash_pointer, _mesa_key_pointer_equal); @@ -132,6 +139,7 @@ bool killed_all; void *mem_ctx; + void *lin_ctx; }; @@ -354,7 +362,7 @@ /* Populate the initial acp with a constant of the original */ foreach_in_list(acp_entry, a, orig_acp) { - this->acp->push_tail(new(this->mem_ctx) acp_entry(a)); + this->acp->push_tail(new(this->lin_ctx) acp_entry(a)); } visit_list_elements(this, instructions); @@ -454,7 +462,7 @@ } /* Not already in the hash table. Make new entry. */ _mesa_hash_table_insert(this->kills, var, - new(this->mem_ctx) kill_entry(var, write_mask)); + new(this->lin_ctx) kill_entry(var, write_mask)); } /** @@ -493,7 +501,7 @@ deref->var->data.mode == ir_var_shader_shared) return; - entry = new(this->mem_ctx) acp_entry(deref->var, ir->write_mask, constant); + entry = new(this->lin_ctx) acp_entry(deref->var, ir->write_mask, constant); this->acp->push_tail(entry); } diff -Nru mesa-12.0.6/src/compiler/glsl/opt_copy_propagation.cpp mesa-17.0.7/src/compiler/glsl/opt_copy_propagation.cpp --- mesa-12.0.6/src/compiler/glsl/opt_copy_propagation.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/opt_copy_propagation.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -37,28 +37,16 @@ #include "ir_basic_block.h" #include "ir_optimization.h" #include "compiler/glsl_types.h" +#include "util/hash_table.h" namespace { -class acp_entry : public exec_node -{ -public: - acp_entry(ir_variable *lhs, ir_variable *rhs) - { - assert(lhs); - assert(rhs); - this->lhs = lhs; - this->rhs = rhs; - } - - ir_variable *lhs; - ir_variable *rhs; -}; - - class kill_entry : public exec_node { public: + /* override operator new from exec_node */ + DECLARE_LINEAR_ZALLOC_CXX_OPERATORS(kill_entry) + kill_entry(ir_variable *var) { assert(var); @@ -74,8 +62,11 @@ { progress = false; mem_ctx = ralloc_context(0); - this->acp = new(mem_ctx) exec_list; + lin_ctx = linear_alloc_parent(mem_ctx, 0); + acp = _mesa_hash_table_create(mem_ctx, _mesa_hash_pointer, + _mesa_key_pointer_equal); this->kills = new(mem_ctx) exec_list; + killed_all = false; } ~ir_copy_propagation_visitor() { @@ -83,6 +74,7 @@ } virtual ir_visitor_status visit(class ir_dereference_variable *); + void handle_loop(class ir_loop *, bool keep_acp); virtual ir_visitor_status visit_enter(class ir_loop *); virtual ir_visitor_status visit_enter(class ir_function_signature *); virtual ir_visitor_status visit_enter(class ir_function *); @@ -94,8 +86,8 @@ void kill(ir_variable *ir); void handle_if_block(exec_list *instructions); - /** List of acp_entry: The available copies to propagate */ - exec_list *acp; + /** Hash of lhs->rhs: The available copies to propagate */ + hash_table *acp; /** * List of kill_entry: The variables whose values were killed in this * block. @@ -107,6 +99,7 @@ bool killed_all; void *mem_ctx; + void *lin_ctx; }; } /* unnamed namespace */ @@ -118,17 +111,18 @@ * block. Any instructions at global scope will be shuffled into * main() at link time, so they're irrelevant to us. */ - exec_list *orig_acp = this->acp; + hash_table *orig_acp = this->acp; exec_list *orig_kills = this->kills; bool orig_killed_all = this->killed_all; - this->acp = new(mem_ctx) exec_list; + acp = _mesa_hash_table_create(NULL, _mesa_hash_pointer, + _mesa_key_pointer_equal); this->kills = new(mem_ctx) exec_list; this->killed_all = false; visit_list_elements(this, &ir->body); - ralloc_free(this->acp); + _mesa_hash_table_destroy(acp, NULL); ralloc_free(this->kills); this->kills = orig_kills; @@ -168,14 +162,10 @@ if (this->in_assignee) return visit_continue; - ir_variable *var = ir->var; - - foreach_in_list(acp_entry, entry, this->acp) { - if (var == entry->lhs) { - ir->var = entry->rhs; - this->progress = true; - break; - } + struct hash_entry *entry = _mesa_hash_table_search(acp, ir->var); + if (entry) { + ir->var = (ir_variable *) entry->data; + progress = true; } return visit_continue; @@ -196,11 +186,34 @@ } } - /* Since we're unlinked, we don't (necessarily) know the side effects of - * this call. So kill all copies. + /* Since this pass can run when unlinked, we don't (necessarily) know + * the side effects of calls. (When linked, most calls are inlined + * anyway, so it doesn't matter much.) + * + * One place where this does matter is IR intrinsics. They're never + * inlined. We also know what they do - while some have side effects + * (such as image writes), none edit random global variables. So we + * can assume they're side-effect free (other than the return value + * and out parameters). */ - acp->make_empty(); - this->killed_all = true; + if (!ir->callee->is_intrinsic()) { + _mesa_hash_table_clear(acp, NULL); + this->killed_all = true; + } else { + if (ir->return_deref) + kill(ir->return_deref->var); + + foreach_two_lists(formal_node, &ir->callee->parameters, + actual_node, &ir->actual_parameters) { + ir_variable *sig_param = (ir_variable *) formal_node; + if (sig_param->data.mode == ir_var_function_out || + sig_param->data.mode == ir_var_function_inout) { + ir_rvalue *ir = (ir_rvalue *) actual_node; + ir_variable *var = ir->variable_referenced(); + kill(var); + } + } + } return visit_continue_with_parent; } @@ -208,28 +221,30 @@ void ir_copy_propagation_visitor::handle_if_block(exec_list *instructions) { - exec_list *orig_acp = this->acp; + hash_table *orig_acp = this->acp; exec_list *orig_kills = this->kills; bool orig_killed_all = this->killed_all; - this->acp = new(mem_ctx) exec_list; + acp = _mesa_hash_table_create(NULL, _mesa_hash_pointer, + _mesa_key_pointer_equal); this->kills = new(mem_ctx) exec_list; this->killed_all = false; /* Populate the initial acp with a copy of the original */ - foreach_in_list(acp_entry, a, orig_acp) { - this->acp->push_tail(new(this->acp) acp_entry(a->lhs, a->rhs)); + struct hash_entry *entry; + hash_table_foreach(orig_acp, entry) { + _mesa_hash_table_insert(acp, entry->key, entry->data); } visit_list_elements(this, instructions); if (this->killed_all) { - orig_acp->make_empty(); + _mesa_hash_table_clear(orig_acp, NULL); } exec_list *new_kills = this->kills; this->kills = orig_kills; - ralloc_free(this->acp); + _mesa_hash_table_destroy(acp, NULL); this->acp = orig_acp; this->killed_all = this->killed_all || orig_killed_all; @@ -252,30 +267,34 @@ return visit_continue_with_parent; } -ir_visitor_status -ir_copy_propagation_visitor::visit_enter(ir_loop *ir) +void +ir_copy_propagation_visitor::handle_loop(ir_loop *ir, bool keep_acp) { - exec_list *orig_acp = this->acp; + hash_table *orig_acp = this->acp; exec_list *orig_kills = this->kills; bool orig_killed_all = this->killed_all; - /* FINISHME: For now, the initial acp for loops is totally empty. - * We could go through once, then go through again with the acp - * cloned minus the killed entries after the first run through. - */ - this->acp = new(mem_ctx) exec_list; + acp = _mesa_hash_table_create(NULL, _mesa_hash_pointer, + _mesa_key_pointer_equal); this->kills = new(mem_ctx) exec_list; this->killed_all = false; + if (keep_acp) { + struct hash_entry *entry; + hash_table_foreach(orig_acp, entry) { + _mesa_hash_table_insert(acp, entry->key, entry->data); + } + } + visit_list_elements(this, &ir->body_instructions); if (this->killed_all) { - orig_acp->make_empty(); + _mesa_hash_table_clear(orig_acp, NULL); } exec_list *new_kills = this->kills; this->kills = orig_kills; - ralloc_free(this->acp); + _mesa_hash_table_destroy(acp, NULL); this->acp = orig_acp; this->killed_all = this->killed_all || orig_killed_all; @@ -284,6 +303,20 @@ } ralloc_free(new_kills); +} + +ir_visitor_status +ir_copy_propagation_visitor::visit_enter(ir_loop *ir) +{ + /* Make a conservative first pass over the loop with an empty ACP set. + * This also removes any killed entries from the original ACP set. + */ + handle_loop(ir, false); + + /* Then, run it again with the real ACP set, minus any killed entries. + * This takes care of propagating values from before the loop into it. + */ + handle_loop(ir, true); /* already descended into the children. */ return visit_continue_with_parent; @@ -295,15 +328,20 @@ assert(var != NULL); /* Remove any entries currently in the ACP for this kill. */ - foreach_in_list_safe(acp_entry, entry, acp) { - if (entry->lhs == var || entry->rhs == var) { - entry->remove(); + struct hash_entry *entry = _mesa_hash_table_search(acp, var); + if (entry) { + _mesa_hash_table_remove(acp, entry); + } + + hash_table_foreach(acp, entry) { + if (var == (ir_variable *) entry->data) { + _mesa_hash_table_remove(acp, entry); } } /* Add the LHS variable to the list of killed variables in this block. */ - this->kills->push_tail(new(this->kills) kill_entry(var)); + this->kills->push_tail(new(this->lin_ctx) kill_entry(var)); } /** @@ -313,8 +351,6 @@ void ir_copy_propagation_visitor::add_copy(ir_assignment *ir) { - acp_entry *entry; - if (ir->condition) return; @@ -333,8 +369,9 @@ } else if (lhs_var->data.mode != ir_var_shader_storage && lhs_var->data.mode != ir_var_shader_shared && lhs_var->data.precise == rhs_var->data.precise) { - entry = new(this->acp) acp_entry(lhs_var, rhs_var); - this->acp->push_tail(entry); + assert(lhs_var); + assert(rhs_var); + _mesa_hash_table_insert(acp, lhs_var, rhs_var); } } } diff -Nru mesa-12.0.6/src/compiler/glsl/opt_copy_propagation_elements.cpp mesa-17.0.7/src/compiler/glsl/opt_copy_propagation_elements.cpp --- mesa-12.0.6/src/compiler/glsl/opt_copy_propagation_elements.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/opt_copy_propagation_elements.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -46,15 +46,35 @@ #include "ir_basic_block.h" #include "ir_optimization.h" #include "compiler/glsl_types.h" +#include "util/hash_table.h" static bool debug = false; namespace { +class acp_entry; + +/* Class that refers to acp_entry in another exec_list. Used + * when making removals based on rhs. + */ +class acp_ref : public exec_node +{ +public: + acp_ref(acp_entry *e) + { + entry = e; + } + acp_entry *entry; +}; + class acp_entry : public exec_node { public: + /* override operator new from exec_node */ + DECLARE_LINEAR_ZALLOC_CXX_OPERATORS(acp_entry) + acp_entry(ir_variable *lhs, ir_variable *rhs, int write_mask, int swizzle[4]) + : rhs_node(this) { this->lhs = lhs; this->rhs = rhs; @@ -62,24 +82,20 @@ memcpy(this->swizzle, swizzle, sizeof(this->swizzle)); } - acp_entry(acp_entry *a) - { - this->lhs = a->lhs; - this->rhs = a->rhs; - this->write_mask = a->write_mask; - memcpy(this->swizzle, a->swizzle, sizeof(this->swizzle)); - } - ir_variable *lhs; ir_variable *rhs; unsigned int write_mask; int swizzle[4]; + acp_ref rhs_node; }; class kill_entry : public exec_node { public: + /* override operator new from exec_node */ + DECLARE_LINEAR_ZALLOC_CXX_OPERATORS(kill_entry) + kill_entry(ir_variable *var, int write_mask) { this->var = var; @@ -97,15 +113,45 @@ this->progress = false; this->killed_all = false; this->mem_ctx = ralloc_context(NULL); + this->lin_ctx = linear_alloc_parent(this->mem_ctx, 0); this->shader_mem_ctx = NULL; - this->acp = new(mem_ctx) exec_list; this->kills = new(mem_ctx) exec_list; + + create_acp(); } ~ir_copy_propagation_elements_visitor() { ralloc_free(mem_ctx); } + void create_acp() + { + lhs_ht = _mesa_hash_table_create(mem_ctx, _mesa_hash_pointer, + _mesa_key_pointer_equal); + rhs_ht = _mesa_hash_table_create(mem_ctx, _mesa_hash_pointer, + _mesa_key_pointer_equal); + } + + void destroy_acp() + { + _mesa_hash_table_destroy(lhs_ht, NULL); + _mesa_hash_table_destroy(rhs_ht, NULL); + } + + void populate_acp(hash_table *lhs, hash_table *rhs) + { + struct hash_entry *entry; + + hash_table_foreach(lhs, entry) { + _mesa_hash_table_insert(lhs_ht, entry->key, entry->data); + } + + hash_table_foreach(rhs, entry) { + _mesa_hash_table_insert(rhs_ht, entry->key, entry->data); + } + } + + void handle_loop(ir_loop *, bool keep_acp); virtual ir_visitor_status visit_enter(class ir_loop *); virtual ir_visitor_status visit_enter(class ir_function_signature *); virtual ir_visitor_status visit_leave(class ir_assignment *); @@ -119,8 +165,10 @@ void kill(kill_entry *k); void handle_if_block(exec_list *instructions); - /** List of acp_entry: The available copies to propagate */ - exec_list *acp; + /** Hash of acp_entry: The available copies to propagate */ + hash_table *lhs_ht; + hash_table *rhs_ht; + /** * List of kill_entry: The variables whose values were killed in this * block. @@ -133,6 +181,7 @@ /* Context for our local data structures. */ void *mem_ctx; + void *lin_ctx; /* Context for allocating new shader nodes. */ void *shader_mem_ctx; }; @@ -146,23 +195,29 @@ * block. Any instructions at global scope will be shuffled into * main() at link time, so they're irrelevant to us. */ - exec_list *orig_acp = this->acp; exec_list *orig_kills = this->kills; bool orig_killed_all = this->killed_all; - this->acp = new(mem_ctx) exec_list; + hash_table *orig_lhs_ht = lhs_ht; + hash_table *orig_rhs_ht = rhs_ht; + this->kills = new(mem_ctx) exec_list; this->killed_all = false; + create_acp(); + visit_list_elements(this, &ir->body); - ralloc_free(this->acp); ralloc_free(this->kills); + destroy_acp(); + this->kills = orig_kills; - this->acp = orig_acp; this->killed_all = orig_killed_all; + lhs_ht = orig_lhs_ht; + rhs_ht = orig_rhs_ht; + return visit_continue_with_parent; } @@ -176,9 +231,9 @@ kill_entry *k; if (lhs) - k = new(this->kills) kill_entry(var, ir->write_mask); + k = new(this->lin_ctx) kill_entry(var, ir->write_mask); else - k = new(this->kills) kill_entry(var, ~0); + k = new(this->lin_ctx) kill_entry(var, ~0); kill(k); } @@ -248,17 +303,19 @@ /* Try to find ACP entries covering swizzle_chan[], hoping they're * the same source variable. */ - foreach_in_list(acp_entry, entry, this->acp) { - if (var == entry->lhs) { - for (int c = 0; c < chans; c++) { - if (entry->write_mask & (1 << swizzle_chan[c])) { - source[c] = entry->rhs; - source_chan[c] = entry->swizzle[swizzle_chan[c]]; + hash_entry *ht_entry = _mesa_hash_table_search(lhs_ht, var); + if (ht_entry) { + exec_list *ht_list = (exec_list *) ht_entry->data; + foreach_in_list(acp_entry, entry, ht_list) { + for (int c = 0; c < chans; c++) { + if (entry->write_mask & (1 << swizzle_chan[c])) { + source[c] = entry->rhs; + source_chan[c] = entry->swizzle[swizzle_chan[c]]; if (source_chan[c] != swizzle_chan[c]) noop_swizzle = false; - } - } + } + } } } @@ -318,7 +375,9 @@ /* Since we're unlinked, we don't (necessarily) know the side effects of * this call. So kill all copies. */ - acp->make_empty(); + _mesa_hash_table_clear(lhs_ht, NULL); + _mesa_hash_table_clear(rhs_ht, NULL); + this->killed_all = true; return visit_continue_with_parent; @@ -327,31 +386,36 @@ void ir_copy_propagation_elements_visitor::handle_if_block(exec_list *instructions) { - exec_list *orig_acp = this->acp; exec_list *orig_kills = this->kills; bool orig_killed_all = this->killed_all; - this->acp = new(mem_ctx) exec_list; + hash_table *orig_lhs_ht = lhs_ht; + hash_table *orig_rhs_ht = rhs_ht; + this->kills = new(mem_ctx) exec_list; this->killed_all = false; + create_acp(); + /* Populate the initial acp with a copy of the original */ - foreach_in_list(acp_entry, a, orig_acp) { - this->acp->push_tail(new(this->acp) acp_entry(a)); - } + populate_acp(orig_lhs_ht, orig_rhs_ht); visit_list_elements(this, instructions); if (this->killed_all) { - orig_acp->make_empty(); + _mesa_hash_table_clear(orig_lhs_ht, NULL); + _mesa_hash_table_clear(orig_rhs_ht, NULL); } exec_list *new_kills = this->kills; this->kills = orig_kills; - ralloc_free(this->acp); - this->acp = orig_acp; this->killed_all = this->killed_all || orig_killed_all; + destroy_acp(); + + lhs_ht = orig_lhs_ht; + rhs_ht = orig_rhs_ht; + /* Move the new kills into the parent block's list, removing them * from the parent's ACP list in the process. */ @@ -374,38 +438,57 @@ return visit_continue_with_parent; } -ir_visitor_status -ir_copy_propagation_elements_visitor::visit_enter(ir_loop *ir) +void +ir_copy_propagation_elements_visitor::handle_loop(ir_loop *ir, bool keep_acp) { - exec_list *orig_acp = this->acp; exec_list *orig_kills = this->kills; bool orig_killed_all = this->killed_all; + hash_table *orig_lhs_ht = lhs_ht; + hash_table *orig_rhs_ht = rhs_ht; + /* FINISHME: For now, the initial acp for loops is totally empty. * We could go through once, then go through again with the acp * cloned minus the killed entries after the first run through. */ - this->acp = new(mem_ctx) exec_list; this->kills = new(mem_ctx) exec_list; this->killed_all = false; + create_acp(); + + if (keep_acp) { + /* Populate the initial acp with a copy of the original */ + populate_acp(orig_lhs_ht, orig_rhs_ht); + } + visit_list_elements(this, &ir->body_instructions); if (this->killed_all) { - orig_acp->make_empty(); + _mesa_hash_table_clear(orig_lhs_ht, NULL); + _mesa_hash_table_clear(orig_rhs_ht, NULL); } exec_list *new_kills = this->kills; this->kills = orig_kills; - ralloc_free(this->acp); - this->acp = orig_acp; this->killed_all = this->killed_all || orig_killed_all; + destroy_acp(); + + lhs_ht = orig_lhs_ht; + rhs_ht = orig_rhs_ht; + foreach_in_list_safe(kill_entry, k, new_kills) { kill(k); } ralloc_free(new_kills); +} + +ir_visitor_status +ir_copy_propagation_elements_visitor::visit_enter(ir_loop *ir) +{ + handle_loop(ir, false); + handle_loop(ir, true); /* already descended into the children. */ return visit_continue_with_parent; @@ -415,16 +498,33 @@ void ir_copy_propagation_elements_visitor::kill(kill_entry *k) { - foreach_in_list_safe(acp_entry, entry, acp) { - if (entry->lhs == k->var) { - entry->write_mask = entry->write_mask & ~k->write_mask; - if (entry->write_mask == 0) { - entry->remove(); - continue; - } + /* removal of lhs entries */ + hash_entry *ht_entry = _mesa_hash_table_search(lhs_ht, k->var); + if (ht_entry) { + exec_list *lhs_list = (exec_list *) ht_entry->data; + foreach_in_list_safe(acp_entry, entry, lhs_list) { + entry->write_mask = entry->write_mask & ~k->write_mask; + if (entry->write_mask == 0) { + entry->remove(); + continue; + } } - if (entry->rhs == k->var) { - entry->remove(); + } + + /* removal of rhs entries */ + ht_entry = _mesa_hash_table_search(rhs_ht, k->var); + if (ht_entry) { + exec_list *rhs_list = (exec_list *) ht_entry->data; + acp_ref *ref; + + while ((ref = (acp_ref *) rhs_list->pop_head()) != NULL) { + acp_entry *entry = ref->entry; + + /* If entry is still in a list (not already removed by lhs entry + * removal above), remove it. + */ + if (entry->prev || entry->next) + entry->remove(); } } @@ -432,7 +532,6 @@ if (k->next) k->remove(); - ralloc_steal(this->kills, k); this->kills->push_tail(k); } @@ -496,9 +595,30 @@ if (lhs->var->data.precise != rhs->var->data.precise) return; - entry = new(this->mem_ctx) acp_entry(lhs->var, rhs->var, write_mask, + entry = new(this->lin_ctx) acp_entry(lhs->var, rhs->var, write_mask, swizzle); - this->acp->push_tail(entry); + + /* lhs hash, hash of lhs -> acp_entry lists */ + hash_entry *ht_entry = _mesa_hash_table_search(lhs_ht, lhs->var); + if (ht_entry) { + exec_list *lhs_list = (exec_list *) ht_entry->data; + lhs_list->push_tail(entry); + } else { + exec_list *lhs_list = new(mem_ctx) exec_list; + lhs_list->push_tail(entry); + _mesa_hash_table_insert(lhs_ht, lhs->var, lhs_list); + } + + /* rhs hash, hash of rhs -> acp_entry pointers to lhs lists */ + ht_entry = _mesa_hash_table_search(rhs_ht, rhs->var); + if (ht_entry) { + exec_list *rhs_list = (exec_list *) ht_entry->data; + rhs_list->push_tail(&entry->rhs_node); + } else { + exec_list *rhs_list = new(mem_ctx) exec_list; + rhs_list->push_tail(&entry->rhs_node); + _mesa_hash_table_insert(rhs_ht, rhs->var, rhs_list); + } } bool diff -Nru mesa-12.0.6/src/compiler/glsl/opt_dead_builtin_varyings.cpp mesa-17.0.7/src/compiler/glsl/opt_dead_builtin_varyings.cpp --- mesa-12.0.6/src/compiler/glsl/opt_dead_builtin_varyings.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/opt_dead_builtin_varyings.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -89,9 +89,10 @@ !is_gl_identifier(var->name)) return visit_continue; - /* Only match gl_FragData[], not gl_SecondaryFragDataEXT[] */ - if (this->find_frag_outputs && var->data.location == FRAG_RESULT_DATA0 && - var->data.index == 0) { + /* Only match gl_FragData[], not gl_SecondaryFragDataEXT[] or + * gl_LastFragData[]. + */ + if (this->find_frag_outputs && strcmp(var->name, "gl_FragData") == 0) { this->fragdata_array = var; ir_constant *index = ir->array_index->as_constant(); @@ -273,7 +274,7 @@ */ class replace_varyings_visitor : public ir_rvalue_visitor { public: - replace_varyings_visitor(struct gl_shader *sha, + replace_varyings_visitor(struct gl_linked_shader *sha, const varying_info_visitor *info, unsigned external_texcoord_usage, unsigned external_color_usage, @@ -379,7 +380,7 @@ new_var[i]->data.explicit_index = 0; } - ir->head->insert_before(new_var[i]); + ir->get_head_raw()->insert_before(new_var[i]); } } } @@ -500,7 +501,7 @@ } private: - struct gl_shader *shader; + struct gl_linked_shader *shader; const varying_info_visitor *info; ir_variable *new_fragdata[MAX_DRAW_BUFFERS]; ir_variable *new_texcoord[MAX_TEXTURE_COORD_UNITS]; @@ -512,7 +513,7 @@ } /* anonymous namespace */ static void -lower_texcoord_array(struct gl_shader *shader, const varying_info_visitor *info) +lower_texcoord_array(struct gl_linked_shader *shader, const varying_info_visitor *info) { replace_varyings_visitor(shader, info, (1 << MAX_TEXTURE_COORD_UNITS) - 1, @@ -520,7 +521,7 @@ } static void -lower_fragdata_array(struct gl_shader *shader) +lower_fragdata_array(struct gl_linked_shader *shader) { varying_info_visitor info(ir_var_shader_out, true); info.get(shader->ir, 0, NULL); @@ -531,7 +532,8 @@ void do_dead_builtin_varyings(struct gl_context *ctx, - gl_shader *producer, gl_shader *consumer, + gl_linked_shader *producer, + gl_linked_shader *consumer, unsigned num_tfeedback_decls, tfeedback_decl *tfeedback_decls) { diff -Nru mesa-12.0.6/src/compiler/glsl/opt_dead_code.cpp mesa-17.0.7/src/compiler/glsl/opt_dead_code.cpp --- mesa-12.0.6/src/compiler/glsl/opt_dead_code.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/opt_dead_code.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -101,7 +101,7 @@ while (!entry->assign_list.is_empty()) { struct assignment_entry *assignment_entry = exec_node_data(struct assignment_entry, - entry->assign_list.head, link); + entry->assign_list.get_head_raw(), link); assignment_entry->assign->remove(); @@ -144,7 +144,7 @@ * layouts, do not eliminate it. */ if (entry->var->is_in_buffer_block()) { - if (entry->var->get_interface_type()->interface_packing != + if (entry->var->get_interface_type_packing() != GLSL_INTERFACE_PACKING_PACKED) continue; } diff -Nru mesa-12.0.6/src/compiler/glsl/opt_dead_code_local.cpp mesa-17.0.7/src/compiler/glsl/opt_dead_code_local.cpp --- mesa-12.0.6/src/compiler/glsl/opt_dead_code_local.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/opt_dead_code_local.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -45,6 +45,9 @@ class assignment_entry : public exec_node { public: + /* override operator new from exec_node */ + DECLARE_LINEAR_ZALLOC_CXX_OPERATORS(assignment_entry) + assignment_entry(ir_variable *lhs, ir_assignment *ir) { assert(lhs); @@ -103,9 +106,12 @@ int used = 0; used |= 1 << ir->mask.x; - used |= 1 << ir->mask.y; - used |= 1 << ir->mask.z; - used |= 1 << ir->mask.w; + if (ir->mask.num_components > 1) + used |= 1 << ir->mask.y; + if (ir->mask.num_components > 2) + used |= 1 << ir->mask.z; + if (ir->mask.num_components > 3) + used |= 1 << ir->mask.w; use_channels(deref->var, used); @@ -161,7 +167,7 @@ * of a variable to a variable. */ static bool -process_assignment(void *ctx, ir_assignment *ir, exec_list *assignments) +process_assignment(void *lin_ctx, ir_assignment *ir, exec_list *assignments) { ir_variable *var = NULL; bool progress = false; @@ -271,7 +277,7 @@ } /* Add this instruction to the assignment list available to be removed. */ - assignment_entry *entry = new(ctx) assignment_entry(var, ir); + assignment_entry *entry = new(lin_ctx) assignment_entry(var, ir); assignments->push_tail(entry); if (debug) { @@ -298,6 +304,8 @@ bool progress = false; void *ctx = ralloc_context(NULL); + void *lin_ctx = linear_alloc_parent(ctx, 0); + /* Safe looping, since process_assignment */ for (ir = first, ir_next = (ir_instruction *)first->next;; ir = ir_next, ir_next = (ir_instruction *)ir->next) { @@ -309,7 +317,8 @@ } if (ir_assign) { - progress = process_assignment(ctx, ir_assign, &assignments) || progress; + progress = process_assignment(lin_ctx, ir_assign, &assignments) || + progress; } else { kill_for_derefs_visitor kill(&assignments); ir->accept(&kill); diff -Nru mesa-12.0.6/src/compiler/glsl/opt_flatten_nested_if_blocks.cpp mesa-17.0.7/src/compiler/glsl/opt_flatten_nested_if_blocks.cpp --- mesa-12.0.6/src/compiler/glsl/opt_flatten_nested_if_blocks.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/opt_flatten_nested_if_blocks.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -90,7 +90,7 @@ if (ir->then_instructions.is_empty() || !ir->else_instructions.is_empty()) return visit_continue; - ir_if *inner = ((ir_instruction *) ir->then_instructions.head)->as_if(); + ir_if *inner = ((ir_instruction *) ir->then_instructions.get_head_raw())->as_if(); if (!inner || !inner->next->is_tail_sentinel() || !inner->else_instructions.is_empty()) return visit_continue; diff -Nru mesa-12.0.6/src/compiler/glsl/opt_function_inlining.cpp mesa-17.0.7/src/compiler/glsl/opt_function_inlining.cpp --- mesa-12.0.6/src/compiler/glsl/opt_function_inlining.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/opt_function_inlining.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -32,7 +32,7 @@ #include "ir_function_inlining.h" #include "ir_expression_flattening.h" #include "compiler/glsl_types.h" -#include "program/hash_table.h" +#include "util/hash_table.h" static void do_variable_replacement(exec_list *instructions, @@ -62,6 +62,11 @@ bool progress; }; +class ir_save_lvalue_visitor : public ir_hierarchical_visitor { +public: + virtual ir_visitor_status visit_enter(ir_dereference_array *); +}; + } /* unnamed namespace */ bool @@ -95,6 +100,37 @@ } } +/* Save the given lvalue before the given instruction. + * + * This is done by adding temporary variables into which the current value + * of any array indices are saved, and then modifying the dereference chain + * in-place to point to those temporary variables. + * + * The hierarchical visitor is only used to traverse the left-hand-side chain + * of derefs. + */ +ir_visitor_status +ir_save_lvalue_visitor::visit_enter(ir_dereference_array *deref) +{ + if (deref->array_index->ir_type != ir_type_constant) { + void *ctx = ralloc_parent(deref); + ir_variable *index; + ir_assignment *assignment; + + index = new(ctx) ir_variable(deref->array_index->type, "saved_idx", ir_var_temporary); + base_ir->insert_before(index); + + assignment = new(ctx) ir_assignment(new(ctx) ir_dereference_variable(index), + deref->array_index, 0); + base_ir->insert_before(assignment); + + deref->array_index = new(ctx) ir_dereference_variable(index); + } + + deref->array->accept(this); + return visit_stop; +} + void ir_call::generate_inline(ir_instruction *next_ir) { @@ -104,7 +140,7 @@ int i; struct hash_table *ht; - ht = hash_table_ctor(0, hash_table_pointer_hash, hash_table_pointer_compare); + ht = _mesa_hash_table_create(NULL, _mesa_hash_pointer, _mesa_key_pointer_equal); num_parameters = this->callee->parameters.length(); parameters = new ir_variable *[num_parameters]; @@ -128,7 +164,7 @@ parameters[i] = NULL; } else { parameters[i] = sig_param->clone(ctx, ht); - parameters[i]->data.mode = ir_var_auto; + parameters[i]->data.mode = ir_var_temporary; /* Remove the read-only decoration because we're going to write * directly to this variable. If the cloned variable is left @@ -139,15 +175,50 @@ next_ir->insert_before(parameters[i]); } - /* Move the actual param into our param variable if it's an 'in' type. */ - if (parameters[i] && (sig_param->data.mode == ir_var_function_in || - sig_param->data.mode == ir_var_const_in || - sig_param->data.mode == ir_var_function_inout)) { - ir_assignment *assign; - - assign = new(ctx) ir_assignment(new(ctx) ir_dereference_variable(parameters[i]), - param, NULL); - next_ir->insert_before(assign); + /* Section 6.1.1 (Function Calling Conventions) of the OpenGL Shading + * Language 4.5 spec says: + * + * "All arguments are evaluated at call time, exactly once, in order, + * from left to right. [...] Evaluation of an out parameter results + * in an l-value that is used to copy out a value when the function + * returns." + * + * I.e., we have to take temporary copies of any relevant array indices + * before the function body is executed. + * + * This ensures that + * (a) if an array index expressions refers to a variable that is + * modified by the execution of the function body, we use the + * original value as intended, and + * (b) if an array index expression has side effects, those side effects + * are only executed once and at the right time. + */ + if (parameters[i]) { + if (sig_param->data.mode == ir_var_function_in || + sig_param->data.mode == ir_var_const_in) { + ir_assignment *assign; + + assign = new(ctx) ir_assignment(new(ctx) ir_dereference_variable(parameters[i]), + param, NULL); + next_ir->insert_before(assign); + } else { + assert(sig_param->data.mode == ir_var_function_out || + sig_param->data.mode == ir_var_function_inout); + assert(param->is_lvalue()); + + ir_save_lvalue_visitor v; + v.base_ir = next_ir; + + param->accept(&v); + + if (sig_param->data.mode == ir_var_function_inout) { + ir_assignment *assign; + + assign = new(ctx) ir_assignment(new(ctx) ir_dereference_variable(parameters[i]), + param->clone(ctx, NULL)->as_rvalue(), NULL); + next_ir->insert_before(assign); + } + } } ++i; @@ -196,7 +267,7 @@ sig_param->data.mode == ir_var_function_inout)) { ir_assignment *assign; - assign = new(ctx) ir_assignment(param->clone(ctx, NULL)->as_rvalue(), + assign = new(ctx) ir_assignment(param, new(ctx) ir_dereference_variable(parameters[i]), NULL); next_ir->insert_before(assign); @@ -207,7 +278,7 @@ delete [] parameters; - hash_table_dtor(ht); + _mesa_hash_table_destroy(ht, NULL); } diff -Nru mesa-12.0.6/src/compiler/glsl/opt_minmax.cpp mesa-17.0.7/src/compiler/glsl/opt_minmax.cpp --- mesa-12.0.6/src/compiler/glsl/opt_minmax.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/opt_minmax.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -355,7 +355,7 @@ */ if (!is_redundant && limits[i].low && baserange.high) { cr = compare_components(limits[i].low, baserange.high); - if (cr >= EQUAL && cr != MIXED) + if (cr > EQUAL && cr != MIXED) is_redundant = true; } } else { @@ -373,7 +373,7 @@ */ if (!is_redundant && limits[i].high && baserange.low) { cr = compare_components(limits[i].high, baserange.low); - if (cr <= EQUAL) + if (cr < EQUAL) is_redundant = true; } } diff -Nru mesa-12.0.6/src/compiler/glsl/opt_tree_grafting.cpp mesa-17.0.7/src/compiler/glsl/opt_tree_grafting.cpp --- mesa-12.0.6/src/compiler/glsl/opt_tree_grafting.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/opt_tree_grafting.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -267,7 +267,7 @@ if (do_graft(&ir->coordinate) || do_graft(&ir->projector) || do_graft(&ir->offset) || - do_graft(&ir->shadow_comparitor)) + do_graft(&ir->shadow_comparator)) return visit_stop; switch (ir->op) { diff -Nru mesa-12.0.6/src/compiler/glsl/propagate_invariance.cpp mesa-17.0.7/src/compiler/glsl/propagate_invariance.cpp --- mesa-12.0.6/src/compiler/glsl/propagate_invariance.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/propagate_invariance.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -27,7 +27,7 @@ * compute invariant or precise values. * * The GLSL spec (depending on what version you read) says, among the - * conditions for geting bit-for-bit the same values on an invariant output: + * conditions for getting bit-for-bit the same values on an invariant output: * * "All operations in the consuming expressions and any intermediate * expressions must be the same, with the same order of operands and same @@ -83,7 +83,7 @@ } ir_visitor_status -ir_invariance_propagation_visitor::visit_leave(ir_assignment *ir) +ir_invariance_propagation_visitor::visit_leave(ir_assignment *) { this->dst_var = NULL; diff -Nru mesa-12.0.6/src/compiler/glsl/standalone.cpp mesa-17.0.7/src/compiler/glsl/standalone.cpp --- mesa-12.0.6/src/compiler/glsl/standalone.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/standalone.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -33,10 +33,101 @@ #include "glsl_parser_extras.h" #include "ir_optimization.h" #include "program.h" -#include "program/hash_table.h" #include "loop_analysis.h" #include "standalone_scaffolding.h" #include "standalone.h" +#include "util/string_to_uint_map.h" +#include "util/set.h" +#include "linker.h" +#include "glsl_parser_extras.h" +#include "ir_builder_print_visitor.h" +#include "opt_add_neg_to_sub.h" + +class dead_variable_visitor : public ir_hierarchical_visitor { +public: + dead_variable_visitor() + { + variables = _mesa_set_create(NULL, + _mesa_hash_pointer, + _mesa_key_pointer_equal); + } + + virtual ~dead_variable_visitor() + { + _mesa_set_destroy(variables, NULL); + } + + virtual ir_visitor_status visit(ir_variable *ir) + { + /* If the variable is auto or temp, add it to the set of variables that + * are candidates for removal. + */ + if (ir->data.mode != ir_var_auto && ir->data.mode != ir_var_temporary) + return visit_continue; + + _mesa_set_add(variables, ir); + + return visit_continue; + } + + virtual ir_visitor_status visit(ir_dereference_variable *ir) + { + struct set_entry *entry = _mesa_set_search(variables, ir->var); + + /* If a variable is dereferenced at all, remove it from the set of + * variables that are candidates for removal. + */ + if (entry != NULL) + _mesa_set_remove(variables, entry); + + return visit_continue; + } + + void remove_dead_variables() + { + struct set_entry *entry; + + set_foreach(variables, entry) { + ir_variable *ir = (ir_variable *) entry->key; + + assert(ir->ir_type == ir_type_variable); + ir->remove(); + } + } + +private: + set *variables; +}; + +void +init_gl_program(struct gl_program *prog, GLenum target, bool is_arb_asm) +{ + mtx_init(&prog->Mutex, mtx_plain); + + prog->RefCount = 1; + prog->Format = GL_PROGRAM_FORMAT_ASCII_ARB; + prog->is_arb_asm = is_arb_asm; +} + +struct gl_program * +new_program(struct gl_context *ctx, GLenum target, GLuint id, bool is_arb_asm) +{ + switch (target) { + case GL_VERTEX_PROGRAM_ARB: /* == GL_VERTEX_PROGRAM_NV */ + case GL_GEOMETRY_PROGRAM_NV: + case GL_TESS_CONTROL_PROGRAM_NV: + case GL_TESS_EVALUATION_PROGRAM_NV: + case GL_FRAGMENT_PROGRAM_ARB: + case GL_COMPUTE_PROGRAM_NV: { + struct gl_program *prog = rzalloc(NULL, struct gl_program); + init_gl_program(prog, target, is_arb_asm); + return prog; + } + default: + printf("bad target in new_program\n"); + return NULL; + } +} static const struct standalone_options *options; @@ -58,6 +149,10 @@ ctx->Const.MaxComputeWorkGroupSize[2] = 64; ctx->Const.MaxComputeWorkGroupInvocations = 1024; ctx->Const.MaxComputeSharedMemorySize = 32768; + ctx->Const.MaxComputeVariableGroupSize[0] = 512; + ctx->Const.MaxComputeVariableGroupSize[1] = 512; + ctx->Const.MaxComputeVariableGroupSize[2] = 64; + ctx->Const.MaxComputeVariableGroupInvocations = 512; ctx->Const.Program[MESA_SHADER_COMPUTE].MaxTextureImageUnits = 16; ctx->Const.Program[MESA_SHADER_COMPUTE].MaxUniformComponents = 1024; ctx->Const.Program[MESA_SHADER_COMPUTE].MaxCombinedUniformComponents = 1024; @@ -153,6 +248,12 @@ break; case 150: case 330: + case 400: + case 410: + case 420: + case 430: + case 440: + case 450: ctx->Const.MaxClipPlanes = 8; ctx->Const.MaxDrawBuffers = 8; ctx->Const.MinProgramTexelOffset = -8; @@ -222,7 +323,11 @@ ctx->Const.GenerateTemporaryNames = true; ctx->Const.MaxPatchVertices = 32; - ctx->Driver.NewShader = _mesa_new_shader; + /* GL_ARB_explicit_uniform_location, GL_MAX_UNIFORM_LOCATIONS */ + ctx->Const.MaxUserAssignableUniformLocations = + 4 * MESA_SHADER_STAGES * MAX_UNIFORMS; + + ctx->Driver.NewProgram = new_program; } /* Returned string will have 'ctx' as its ralloc owner. */ @@ -285,19 +390,6 @@ return; } -void -init_gl_program(struct gl_program *prog, GLenum target) -{ - mtx_init(&prog->Mutex, mtx_plain); - - prog->RefCount = 1; - prog->Format = GL_PROGRAM_FORMAT_ASCII_ARB; - - /* default mapping from samplers to texture units */ - for (int i = 0; i < MAX_SAMPLERS; i++) - prog->SamplerUnits[i] = i; -} - extern "C" struct gl_shader_program * standalone_compile_shader(const struct standalone_options *_options, unsigned num_files, char* const* files) @@ -320,6 +412,12 @@ case 140: case 150: case 330: + case 400: + case 410: + case 420: + case 430: + case 440: + case 450: glsl_es = false; break; default: @@ -327,13 +425,19 @@ return NULL; } - initialize_context(ctx, (glsl_es) ? API_OPENGLES2 : API_OPENGL_COMPAT); + if (glsl_es) { + initialize_context(ctx, API_OPENGLES2); + } else { + initialize_context(ctx, options->glsl_version > 130 ? API_OPENGL_CORE : API_OPENGL_COMPAT); + } struct gl_shader_program *whole_program; whole_program = rzalloc (NULL, struct gl_shader_program); assert(whole_program != NULL); - whole_program->InfoLog = ralloc_strdup(whole_program, ""); + whole_program->data = rzalloc(whole_program, struct gl_shader_program_data); + assert(whole_program->data != NULL); + whole_program->data->InfoLog = ralloc_strdup(whole_program->data, ""); /* Created just to avoid segmentation faults */ whole_program->AttributeBindings = new string_to_uint_map; @@ -396,35 +500,94 @@ } } - if ((status == EXIT_SUCCESS) && options->do_link) { - _mesa_clear_shader_program_data(whole_program); + if (status == EXIT_SUCCESS) { + _mesa_clear_shader_program_data(ctx, whole_program); - link_shaders(ctx, whole_program); - status = (whole_program->LinkStatus) ? EXIT_SUCCESS : EXIT_FAILURE; + if (options->do_link) { + link_shaders(ctx, whole_program); + } else { + const gl_shader_stage stage = whole_program->Shaders[0]->Stage; + + whole_program->data->LinkStatus = GL_TRUE; + whole_program->_LinkedShaders[stage] = + link_intrastage_shaders(whole_program /* mem_ctx */, + ctx, + whole_program, + whole_program->Shaders, + 1, + true); + + /* Par-linking can fail, for example, if there are undefined external + * references. + */ + if (whole_program->_LinkedShaders[stage] != NULL) { + assert(whole_program->data->LinkStatus); + + struct gl_shader_compiler_options *const compiler_options = + &ctx->Const.ShaderCompilerOptions[stage]; + + exec_list *const ir = + whole_program->_LinkedShaders[stage]->ir; + + bool progress; + do { + progress = do_function_inlining(ir); + + progress = do_common_optimization(ir, + false, + false, + compiler_options, + true) + && progress; + } while(progress); + } + } - if (strlen(whole_program->InfoLog) > 0) { + status = (whole_program->data->LinkStatus) ? EXIT_SUCCESS : EXIT_FAILURE; + + if (strlen(whole_program->data->InfoLog) > 0) { printf("\n"); if (!options->just_log) printf("Info log for linking:\n"); - printf("%s", whole_program->InfoLog); + printf("%s", whole_program->data->InfoLog); if (!options->just_log) printf("\n"); } for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { - struct gl_shader *shader = whole_program->_LinkedShaders[i]; + struct gl_linked_shader *shader = whole_program->_LinkedShaders[i]; if (!shader) continue; - shader->Program = rzalloc(shader, gl_program); - init_gl_program(shader->Program, shader->Type); + add_neg_to_sub_visitor v; + visit_list_elements(&v, shader->ir); + + dead_variable_visitor dv; + visit_list_elements(&dv, shader->ir); + dv.remove_dead_variables(); + } + + if (options->dump_builder) { + for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { + struct gl_linked_shader *shader = whole_program->_LinkedShaders[i]; + + if (!shader) + continue; + + _mesa_print_builder_for_ir(stdout, shader->ir); + } } } return whole_program; fail: + for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { + if (whole_program->_LinkedShaders[i]) + ralloc_free(whole_program->_LinkedShaders[i]->Program); + } + ralloc_free(whole_program); return NULL; } @@ -432,8 +595,10 @@ extern "C" void standalone_compiler_cleanup(struct gl_shader_program *whole_program) { - for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) - ralloc_free(whole_program->_LinkedShaders[i]); + for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { + if (whole_program->_LinkedShaders[i]) + ralloc_free(whole_program->_LinkedShaders[i]->Program); + } delete whole_program->AttributeBindings; delete whole_program->FragDataBindings; diff -Nru mesa-12.0.6/src/compiler/glsl/standalone.h mesa-17.0.7/src/compiler/glsl/standalone.h --- mesa-12.0.6/src/compiler/glsl/standalone.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/standalone.h 2017-06-01 10:37:10.000000000 +0000 @@ -33,6 +33,7 @@ int dump_ast; int dump_hir; int dump_lir; + int dump_builder; int do_link; int just_log; }; diff -Nru mesa-12.0.6/src/compiler/glsl/standalone_scaffolding.cpp mesa-17.0.7/src/compiler/glsl/standalone_scaffolding.cpp --- mesa-12.0.6/src/compiler/glsl/standalone_scaffolding.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/standalone_scaffolding.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -54,6 +54,15 @@ } void +_mesa_reference_shader_program_data(struct gl_context *ctx, + struct gl_shader_program_data **ptr, + struct gl_shader_program_data *data) +{ + (void) ctx; + *ptr = data; +} + +void _mesa_reference_shader(struct gl_context *ctx, struct gl_shader **ptr, struct gl_shader *sh) { @@ -62,29 +71,46 @@ } void +_mesa_reference_program_(struct gl_context *ctx, struct gl_program **ptr, + struct gl_program *prog) +{ + (void) ctx; + *ptr = prog; +} + +void _mesa_shader_debug(struct gl_context *, GLenum, GLuint *, const char *) { } struct gl_shader * -_mesa_new_shader(struct gl_context *ctx, GLuint name, GLenum type) +_mesa_new_shader(GLuint name, gl_shader_stage stage) { struct gl_shader *shader; - (void) ctx; - - assert(type == GL_FRAGMENT_SHADER || type == GL_VERTEX_SHADER); + assert(stage == MESA_SHADER_FRAGMENT || stage == MESA_SHADER_VERTEX); shader = rzalloc(NULL, struct gl_shader); if (shader) { - shader->Type = type; - shader->Stage = _mesa_shader_enum_to_shader_stage(type); + shader->Stage = stage; shader->Name = name; shader->RefCount = 1; } return shader; } +GLbitfield +_mesa_program_state_flags(const gl_state_index state[STATE_LENGTH]) +{ + return 0; +} + +char * +_mesa_program_state_string(const gl_state_index state[STATE_LENGTH]) +{ + return NULL; +} + void _mesa_delete_shader(struct gl_context *ctx, struct gl_shader *sh) { @@ -94,28 +120,43 @@ } void -_mesa_clear_shader_program_data(struct gl_shader_program *shProg) +_mesa_delete_linked_shader(struct gl_context *ctx, + struct gl_linked_shader *sh) { - shProg->NumUniformStorage = 0; - shProg->UniformStorage = NULL; + ralloc_free(sh); +} + +void +_mesa_clear_shader_program_data(struct gl_context *ctx, + struct gl_shader_program *shProg) +{ + for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { + if (shProg->_LinkedShaders[i] != NULL) { + _mesa_delete_linked_shader(ctx, shProg->_LinkedShaders[i]); + shProg->_LinkedShaders[i] = NULL; + } + } + + shProg->data->NumUniformStorage = 0; + shProg->data->UniformStorage = NULL; shProg->NumUniformRemapTable = 0; shProg->UniformRemapTable = NULL; shProg->UniformHash = NULL; - ralloc_free(shProg->InfoLog); - shProg->InfoLog = ralloc_strdup(shProg, ""); + ralloc_free(shProg->data->InfoLog); + shProg->data->InfoLog = ralloc_strdup(shProg->data, ""); - ralloc_free(shProg->UniformBlocks); - shProg->UniformBlocks = NULL; - shProg->NumUniformBlocks = 0; - - ralloc_free(shProg->ShaderStorageBlocks); - shProg->ShaderStorageBlocks = NULL; - shProg->NumShaderStorageBlocks = 0; - - ralloc_free(shProg->AtomicBuffers); - shProg->AtomicBuffers = NULL; - shProg->NumAtomicBuffers = 0; + ralloc_free(shProg->data->UniformBlocks); + shProg->data->UniformBlocks = NULL; + shProg->data->NumUniformBlocks = 0; + + ralloc_free(shProg->data->ShaderStorageBlocks); + shProg->data->ShaderStorageBlocks = NULL; + shProg->data->NumShaderStorageBlocks = 0; + + ralloc_free(shProg->data->AtomicBuffers); + shProg->data->AtomicBuffers = NULL; + shProg->data->NumAtomicBuffers = 0; } void initialize_context_to_defaults(struct gl_context *ctx, gl_api api) @@ -127,6 +168,7 @@ ctx->Extensions.dummy_false = false; ctx->Extensions.dummy_true = true; ctx->Extensions.ARB_compute_shader = true; + ctx->Extensions.ARB_compute_variable_group_size = true; ctx->Extensions.ARB_conservative_depth = true; ctx->Extensions.ARB_draw_instanced = true; ctx->Extensions.ARB_ES2_compatibility = true; @@ -160,6 +202,8 @@ ctx->Extensions.EXT_shader_integer_mix = true; ctx->Extensions.EXT_texture_array = true; + ctx->Extensions.MESA_shader_integer_functions = true; + ctx->Extensions.NV_texture_rectangle = true; ctx->Const.GLSLVersion = 120; @@ -188,6 +232,10 @@ ctx->Const.MaxComputeWorkGroupSize[1] = 1024; ctx->Const.MaxComputeWorkGroupSize[2] = 64; ctx->Const.MaxComputeWorkGroupInvocations = 1024; + ctx->Const.MaxComputeVariableGroupSize[0] = 512; + ctx->Const.MaxComputeVariableGroupSize[1] = 512; + ctx->Const.MaxComputeVariableGroupSize[2] = 64; + ctx->Const.MaxComputeVariableGroupInvocations = 512; ctx->Const.Program[MESA_SHADER_COMPUTE].MaxTextureImageUnits = 16; ctx->Const.Program[MESA_SHADER_COMPUTE].MaxUniformComponents = 1024; ctx->Const.Program[MESA_SHADER_COMPUTE].MaxInputComponents = 0; /* not used */ diff -Nru mesa-12.0.6/src/compiler/glsl/standalone_scaffolding.h mesa-17.0.7/src/compiler/glsl/standalone_scaffolding.h --- mesa-12.0.6/src/compiler/glsl/standalone_scaffolding.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/standalone_scaffolding.h 2017-06-01 10:37:10.000000000 +0000 @@ -33,27 +33,49 @@ #include #include "main/mtypes.h" +#include "program/prog_statevars.h" extern "C" void _mesa_warning(struct gl_context *ctx, const char *fmtString, ... ); extern "C" void +_mesa_reference_shader_program_data(struct gl_context *ctx, + struct gl_shader_program_data **ptr, + struct gl_shader_program_data *data); + +extern "C" void _mesa_reference_shader(struct gl_context *ctx, struct gl_shader **ptr, struct gl_shader *sh); +extern "C" void +_mesa_reference_program_(struct gl_context *ctx, struct gl_program **ptr, + struct gl_program *prog); + extern "C" struct gl_shader * -_mesa_new_shader(struct gl_context *ctx, GLuint name, GLenum type); +_mesa_new_shader(GLuint name, gl_shader_stage stage); extern "C" void _mesa_delete_shader(struct gl_context *ctx, struct gl_shader *sh); extern "C" void -_mesa_clear_shader_program_data(struct gl_shader_program *); +_mesa_delete_linked_shader(struct gl_context *ctx, + struct gl_linked_shader *sh); + +extern "C" void +_mesa_clear_shader_program_data(struct gl_context *ctx, + struct gl_shader_program *); extern "C" void _mesa_shader_debug(struct gl_context *ctx, GLenum type, GLuint *id, const char *msg); +extern "C" GLbitfield +_mesa_program_state_flags(const gl_state_index state[STATE_LENGTH]); + + +extern "C" char * +_mesa_program_state_string(const gl_state_index state[STATE_LENGTH]); + static inline gl_shader_stage _mesa_shader_enum_to_shader_stage(GLenum v) { diff -Nru mesa-12.0.6/src/compiler/glsl/test_optpass.cpp mesa-17.0.7/src/compiler/glsl/test_optpass.cpp --- mesa-12.0.6/src/compiler/glsl/test_optpass.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/test_optpass.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -99,7 +99,7 @@ return do_if_simplification(ir); } else if (sscanf(optimization, "lower_if_to_cond_assign ( %d ) ", &int_0) == 1) { - return lower_if_to_cond_assign(ir, int_0); + return lower_if_to_cond_assign(MESA_SHADER_VERTEX, ir, int_0); } else if (strcmp(optimization, "do_mat_op_to_vec") == 0) { return do_mat_op_to_vec(ir); } else if (strcmp(optimization, "do_noop_swizzle") == 0) { @@ -200,7 +200,6 @@ struct gl_context *ctx = &local_ctx; initialize_context_to_defaults(ctx, API_OPENGL_COMPAT); - ctx->Driver.NewShader = _mesa_new_shader; ir_variable::temporaries_allocate_names = true; struct gl_shader *shader = rzalloc(NULL, struct gl_shader); @@ -220,7 +219,7 @@ shader->Source = input.c_str(); const char *source = shader->Source; state->error = glcpp_preprocess(state, &source, &state->info_log, - state->extensions, ctx) != 0; + NULL, NULL, ctx) != 0; if (!state->error) { _mesa_glsl_lexer_ctor(state, source); diff -Nru mesa-12.0.6/src/compiler/glsl/tests/array_refcount_test.cpp mesa-17.0.7/src/compiler/glsl/tests/array_refcount_test.cpp --- mesa-12.0.6/src/compiler/glsl/tests/array_refcount_test.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/tests/array_refcount_test.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,717 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +#include +#include "ir.h" +#include "ir_array_refcount.h" +#include "ir_builder.h" +#include "util/hash_table.h" + +using namespace ir_builder; + +class array_refcount_test : public ::testing::Test { +public: + virtual void SetUp(); + virtual void TearDown(); + + exec_list instructions; + ir_factory *body; + void *mem_ctx; + + /** + * glsl_type for a vec4[3][4][5]. + * + * The exceptionally verbose name is picked because it matches the syntax + * of http://cdecl.org/. + */ + const glsl_type *array_3_of_array_4_of_array_5_of_vec4; + + /** + * glsl_type for a int[3]. + * + * The exceptionally verbose name is picked because it matches the syntax + * of http://cdecl.org/. + */ + const glsl_type *array_3_of_int; + + /** + * Wrapper to access private member "bits" of ir_array_refcount_entry + * + * The test class is a friend to ir_array_refcount_entry, but the + * individual tests are not part of the class. Since the friendliness of + * the test class does not extend to the tests, provide a wrapper. + */ + const BITSET_WORD *get_bits(const ir_array_refcount_entry &entry) + { + return entry.bits; + } + + /** + * Wrapper to access private member "num_bits" of ir_array_refcount_entry + * + * The test class is a friend to ir_array_refcount_entry, but the + * individual tests are not part of the class. Since the friendliness of + * the test class does not extend to the tests, provide a wrapper. + */ + unsigned get_num_bits(const ir_array_refcount_entry &entry) + { + return entry.num_bits; + } + + /** + * Wrapper to access private member "array_depth" of ir_array_refcount_entry + * + * The test class is a friend to ir_array_refcount_entry, but the + * individual tests are not part of the class. Since the friendliness of + * the test class does not extend to the tests, provide a wrapper. + */ + unsigned get_array_depth(const ir_array_refcount_entry &entry) + { + return entry.array_depth; + } +}; + +void +array_refcount_test::SetUp() +{ + mem_ctx = ralloc_context(NULL); + + instructions.make_empty(); + body = new ir_factory(&instructions, mem_ctx); + + /* The type of vec4 x[3][4][5]; */ + const glsl_type *const array_5_of_vec4 = + glsl_type::get_array_instance(glsl_type::vec4_type, 5); + const glsl_type *const array_4_of_array_5_of_vec4 = + glsl_type::get_array_instance(array_5_of_vec4, 4); + array_3_of_array_4_of_array_5_of_vec4 = + glsl_type::get_array_instance(array_4_of_array_5_of_vec4, 3); + + array_3_of_int = glsl_type::get_array_instance(glsl_type::int_type, 3); +} + +void +array_refcount_test::TearDown() +{ + delete body; + body = NULL; + + ralloc_free(mem_ctx); + mem_ctx = NULL; +} + +static operand +deref_array(operand array, operand index) +{ + void *mem_ctx = ralloc_parent(array.val); + + ir_rvalue *val = new(mem_ctx) ir_dereference_array(array.val, index.val); + + return operand(val); +} + +static operand +deref_struct(operand s, const char *field) +{ + void *mem_ctx = ralloc_parent(s.val); + + ir_rvalue *val = new(mem_ctx) ir_dereference_record(s.val, field); + + return operand(val); +} + +/** + * Verify that only the specified set of ir_variables exists in the hash table + */ +static void +validate_variables_in_hash_table(struct hash_table *ht, + unsigned count, + ...) +{ + ir_variable **vars = new ir_variable *[count]; + va_list args; + + /* Make a copy of the list of expected ir_variables. The copied list can + * be modified during the checking. + */ + va_start(args, count); + + for (unsigned i = 0; i < count; i++) + vars[i] = va_arg(args, ir_variable *); + + va_end(args); + + struct hash_entry *entry; + hash_table_foreach(ht, entry) { + const ir_instruction *const ir = (ir_instruction *) entry->key; + const ir_variable *const v = ir->as_variable(); + + if (v == NULL) { + ADD_FAILURE() << "Invalid junk in hash table: ir_type = " + << ir->ir_type << ", address = " + << (void *) ir; + continue; + } + + unsigned i; + for (i = 0; i < count; i++) { + if (vars[i] == NULL) + continue; + + if (vars[i] == v) + break; + } + + if (i == count) { + ADD_FAILURE() << "Invalid variable in hash table: \"" + << v->name << "\""; + } else { + /* As each variable is encountered, remove it from the set. Don't + * bother compacting the set because we don't care about + * performance here. + */ + vars[i] = NULL; + } + } + + /* Check that there's nothing left in the set. */ + for (unsigned i = 0; i < count; i++) { + if (vars[i] != NULL) { + ADD_FAILURE() << "Variable was not in the hash table: \"" + << vars[i]->name << "\""; + } + } + + delete [] vars; +} + +TEST_F(array_refcount_test, ir_array_refcount_entry_initial_state_for_scalar) +{ + ir_variable *const var = + new(mem_ctx) ir_variable(glsl_type::int_type, "a", ir_var_auto); + + ir_array_refcount_entry entry(var); + + ASSERT_NE((void *)0, get_bits(entry)); + EXPECT_FALSE(entry.is_referenced); + EXPECT_EQ(1, get_num_bits(entry)); + EXPECT_EQ(0, get_array_depth(entry)); + EXPECT_FALSE(entry.is_linearized_index_referenced(0)); +} + +TEST_F(array_refcount_test, ir_array_refcount_entry_initial_state_for_vector) +{ + ir_variable *const var = + new(mem_ctx) ir_variable(glsl_type::vec4_type, "a", ir_var_auto); + + ir_array_refcount_entry entry(var); + + ASSERT_NE((void *)0, get_bits(entry)); + EXPECT_FALSE(entry.is_referenced); + EXPECT_EQ(1, get_num_bits(entry)); + EXPECT_EQ(0, get_array_depth(entry)); + EXPECT_FALSE(entry.is_linearized_index_referenced(0)); +} + +TEST_F(array_refcount_test, ir_array_refcount_entry_initial_state_for_matrix) +{ + ir_variable *const var = + new(mem_ctx) ir_variable(glsl_type::mat4_type, "a", ir_var_auto); + + ir_array_refcount_entry entry(var); + + ASSERT_NE((void *)0, get_bits(entry)); + EXPECT_FALSE(entry.is_referenced); + EXPECT_EQ(1, get_num_bits(entry)); + EXPECT_EQ(0, get_array_depth(entry)); + EXPECT_FALSE(entry.is_linearized_index_referenced(0)); +} + +TEST_F(array_refcount_test, ir_array_refcount_entry_initial_state_for_array) +{ + ir_variable *const var = + new(mem_ctx) ir_variable(array_3_of_array_4_of_array_5_of_vec4, + "a", + ir_var_auto); + const unsigned total_elements = var->type->arrays_of_arrays_size(); + + ir_array_refcount_entry entry(var); + + ASSERT_NE((void *)0, get_bits(entry)); + EXPECT_FALSE(entry.is_referenced); + EXPECT_EQ(total_elements, get_num_bits(entry)); + EXPECT_EQ(3, get_array_depth(entry)); + + for (unsigned i = 0; i < total_elements; i++) + EXPECT_FALSE(entry.is_linearized_index_referenced(i)) << "index = " << i; +} + +TEST_F(array_refcount_test, mark_array_elements_referenced_simple) +{ + ir_variable *const var = + new(mem_ctx) ir_variable(array_3_of_array_4_of_array_5_of_vec4, + "a", + ir_var_auto); + const unsigned total_elements = var->type->arrays_of_arrays_size(); + + ir_array_refcount_entry entry(var); + + static const array_deref_range dr[] = { + { 0, 5 }, { 1, 4 }, { 2, 3 } + }; + const unsigned accessed_element = 0 + (1 * 5) + (2 * 4 * 5); + + entry.mark_array_elements_referenced(dr, 3); + + for (unsigned i = 0; i < total_elements; i++) + EXPECT_EQ(i == accessed_element, entry.is_linearized_index_referenced(i)); +} + +TEST_F(array_refcount_test, mark_array_elements_referenced_whole_first_array) +{ + ir_variable *const var = + new(mem_ctx) ir_variable(array_3_of_array_4_of_array_5_of_vec4, + "a", + ir_var_auto); + + ir_array_refcount_entry entry(var); + + static const array_deref_range dr[] = { + { 0, 5 }, { 1, 4 }, { 3, 3 } + }; + + entry.mark_array_elements_referenced(dr, 3); + + for (unsigned i = 0; i < 3; i++) { + for (unsigned j = 0; j < 4; j++) { + for (unsigned k = 0; k < 5; k++) { + const bool accessed = (j == 1) && (k == 0); + const unsigned linearized_index = k + (j * 5) + (i * 4 * 5); + + EXPECT_EQ(accessed, + entry.is_linearized_index_referenced(linearized_index)); + } + } + } +} + +TEST_F(array_refcount_test, mark_array_elements_referenced_whole_second_array) +{ + ir_variable *const var = + new(mem_ctx) ir_variable(array_3_of_array_4_of_array_5_of_vec4, + "a", + ir_var_auto); + + ir_array_refcount_entry entry(var); + + static const array_deref_range dr[] = { + { 0, 5 }, { 4, 4 }, { 1, 3 } + }; + + entry.mark_array_elements_referenced(dr, 3); + + for (unsigned i = 0; i < 3; i++) { + for (unsigned j = 0; j < 4; j++) { + for (unsigned k = 0; k < 5; k++) { + const bool accessed = (i == 1) && (k == 0); + const unsigned linearized_index = k + (j * 5) + (i * 4 * 5); + + EXPECT_EQ(accessed, + entry.is_linearized_index_referenced(linearized_index)); + } + } + } +} + +TEST_F(array_refcount_test, mark_array_elements_referenced_whole_third_array) +{ + ir_variable *const var = + new(mem_ctx) ir_variable(array_3_of_array_4_of_array_5_of_vec4, + "a", + ir_var_auto); + + ir_array_refcount_entry entry(var); + + static const array_deref_range dr[] = { + { 5, 5 }, { 2, 4 }, { 1, 3 } + }; + + entry.mark_array_elements_referenced(dr, 3); + + for (unsigned i = 0; i < 3; i++) { + for (unsigned j = 0; j < 4; j++) { + for (unsigned k = 0; k < 5; k++) { + const bool accessed = (i == 1) && (j == 2); + const unsigned linearized_index = k + (j * 5) + (i * 4 * 5); + + EXPECT_EQ(accessed, + entry.is_linearized_index_referenced(linearized_index)); + } + } + } +} + +TEST_F(array_refcount_test, mark_array_elements_referenced_whole_first_and_third_arrays) +{ + ir_variable *const var = + new(mem_ctx) ir_variable(array_3_of_array_4_of_array_5_of_vec4, + "a", + ir_var_auto); + + ir_array_refcount_entry entry(var); + + static const array_deref_range dr[] = { + { 5, 5 }, { 3, 4 }, { 3, 3 } + }; + + entry.mark_array_elements_referenced(dr, 3); + + for (unsigned i = 0; i < 3; i++) { + for (unsigned j = 0; j < 4; j++) { + for (unsigned k = 0; k < 5; k++) { + const bool accessed = (j == 3); + const unsigned linearized_index = k + (j * 5) + (i * 4 * 5); + + EXPECT_EQ(accessed, + entry.is_linearized_index_referenced(linearized_index)); + } + } + } +} + +TEST_F(array_refcount_test, do_not_process_vector_indexing) +{ + /* Vectors and matrices can also be indexed in much the same manner as + * arrays. The visitor should not try to track per-element accesses to + * these types. + */ + ir_variable *var_a = new(mem_ctx) ir_variable(glsl_type::float_type, + "a", + ir_var_auto); + ir_variable *var_b = new(mem_ctx) ir_variable(glsl_type::int_type, + "b", + ir_var_auto); + ir_variable *var_c = new(mem_ctx) ir_variable(glsl_type::vec4_type, + "c", + ir_var_auto); + + body->emit(assign(var_a, deref_array(var_c, var_b))); + + ir_array_refcount_visitor v; + + visit_list_elements(&v, &instructions); + + ir_array_refcount_entry *entry_a = v.get_variable_entry(var_a); + ir_array_refcount_entry *entry_b = v.get_variable_entry(var_b); + ir_array_refcount_entry *entry_c = v.get_variable_entry(var_c); + + EXPECT_TRUE(entry_a->is_referenced); + EXPECT_TRUE(entry_b->is_referenced); + EXPECT_TRUE(entry_c->is_referenced); + + /* As validated by previous tests, for non-array types, num_bits is 1. */ + ASSERT_EQ(1, get_num_bits(*entry_c)); + EXPECT_FALSE(entry_c->is_linearized_index_referenced(0)); +} + +TEST_F(array_refcount_test, do_not_process_matrix_indexing) +{ + /* Vectors and matrices can also be indexed in much the same manner as + * arrays. The visitor should not try to track per-element accesses to + * these types. + */ + ir_variable *var_a = new(mem_ctx) ir_variable(glsl_type::vec4_type, + "a", + ir_var_auto); + ir_variable *var_b = new(mem_ctx) ir_variable(glsl_type::int_type, + "b", + ir_var_auto); + ir_variable *var_c = new(mem_ctx) ir_variable(glsl_type::mat4_type, + "c", + ir_var_auto); + + body->emit(assign(var_a, deref_array(var_c, var_b))); + + ir_array_refcount_visitor v; + + visit_list_elements(&v, &instructions); + + ir_array_refcount_entry *entry_a = v.get_variable_entry(var_a); + ir_array_refcount_entry *entry_b = v.get_variable_entry(var_b); + ir_array_refcount_entry *entry_c = v.get_variable_entry(var_c); + + EXPECT_TRUE(entry_a->is_referenced); + EXPECT_TRUE(entry_b->is_referenced); + EXPECT_TRUE(entry_c->is_referenced); + + /* As validated by previous tests, for non-array types, num_bits is 1. */ + ASSERT_EQ(1, get_num_bits(*entry_c)); + EXPECT_FALSE(entry_c->is_linearized_index_referenced(0)); +} + +TEST_F(array_refcount_test, do_not_process_array_inside_structure) +{ + /* Structures can contain arrays. The visitor should not try to track + * per-element accesses to arrays contained inside structures. + */ + const glsl_struct_field fields[] = { + glsl_struct_field(array_3_of_int, "i"), + }; + + const glsl_type *const record_of_array_3_of_int = + glsl_type::get_record_instance(fields, ARRAY_SIZE(fields), "S"); + + ir_variable *var_a = new(mem_ctx) ir_variable(glsl_type::int_type, + "a", + ir_var_auto); + + ir_variable *var_b = new(mem_ctx) ir_variable(record_of_array_3_of_int, + "b", + ir_var_auto); + + /* a = b.i[2] */ + body->emit(assign(var_a, + deref_array( + deref_struct(var_b, "i"), + body->constant(int(2))))); + + ir_array_refcount_visitor v; + + visit_list_elements(&v, &instructions); + + ir_array_refcount_entry *entry_a = v.get_variable_entry(var_a); + ir_array_refcount_entry *entry_b = v.get_variable_entry(var_b); + + EXPECT_TRUE(entry_a->is_referenced); + EXPECT_TRUE(entry_b->is_referenced); + + ASSERT_EQ(1, get_num_bits(*entry_b)); + EXPECT_FALSE(entry_b->is_linearized_index_referenced(0)); + + validate_variables_in_hash_table(v.ht, 2, var_a, var_b); +} + +TEST_F(array_refcount_test, visit_simple_indexing) +{ + ir_variable *var_a = new(mem_ctx) ir_variable(glsl_type::vec4_type, + "a", + ir_var_auto); + ir_variable *var_b = new(mem_ctx) ir_variable(array_3_of_array_4_of_array_5_of_vec4, + "b", + ir_var_auto); + + /* a = b[2][1][0] */ + body->emit(assign(var_a, + deref_array( + deref_array( + deref_array(var_b, body->constant(int(2))), + body->constant(int(1))), + body->constant(int(0))))); + + ir_array_refcount_visitor v; + + visit_list_elements(&v, &instructions); + + const unsigned accessed_element = 0 + (1 * 5) + (2 * 4 * 5); + ir_array_refcount_entry *entry_b = v.get_variable_entry(var_b); + const unsigned total_elements = var_b->type->arrays_of_arrays_size(); + + for (unsigned i = 0; i < total_elements; i++) + EXPECT_EQ(i == accessed_element, entry_b->is_linearized_index_referenced(i)) << + "i = " << i; + + validate_variables_in_hash_table(v.ht, 2, var_a, var_b); +} + +TEST_F(array_refcount_test, visit_whole_second_array_indexing) +{ + ir_variable *var_a = new(mem_ctx) ir_variable(glsl_type::vec4_type, + "a", + ir_var_auto); + ir_variable *var_b = new(mem_ctx) ir_variable(array_3_of_array_4_of_array_5_of_vec4, + "b", + ir_var_auto); + ir_variable *var_i = new(mem_ctx) ir_variable(glsl_type::int_type, + "i", + ir_var_auto); + + /* a = b[2][i][1] */ + body->emit(assign(var_a, + deref_array( + deref_array( + deref_array(var_b, body->constant(int(2))), + var_i), + body->constant(int(1))))); + + ir_array_refcount_visitor v; + + visit_list_elements(&v, &instructions); + + ir_array_refcount_entry *const entry_b = v.get_variable_entry(var_b); + for (unsigned i = 0; i < 3; i++) { + for (unsigned j = 0; j < 4; j++) { + for (unsigned k = 0; k < 5; k++) { + const bool accessed = (i == 2) && (k == 1); + const unsigned linearized_index = k + (j * 5) + (i * 4 * 5); + + EXPECT_EQ(accessed, + entry_b->is_linearized_index_referenced(linearized_index)) << + "i = " << i; + } + } + } + + validate_variables_in_hash_table(v.ht, 3, var_a, var_b, var_i); +} + +TEST_F(array_refcount_test, visit_array_indexing_an_array) +{ + ir_variable *var_a = new(mem_ctx) ir_variable(glsl_type::vec4_type, + "a", + ir_var_auto); + ir_variable *var_b = new(mem_ctx) ir_variable(array_3_of_array_4_of_array_5_of_vec4, + "b", + ir_var_auto); + ir_variable *var_c = new(mem_ctx) ir_variable(array_3_of_int, + "c", + ir_var_auto); + ir_variable *var_i = new(mem_ctx) ir_variable(glsl_type::int_type, + "i", + ir_var_auto); + + /* a = b[2][3][c[i]] */ + body->emit(assign(var_a, + deref_array( + deref_array( + deref_array(var_b, body->constant(int(2))), + body->constant(int(3))), + deref_array(var_c, var_i)))); + + ir_array_refcount_visitor v; + + visit_list_elements(&v, &instructions); + + ir_array_refcount_entry *const entry_b = v.get_variable_entry(var_b); + + for (unsigned i = 0; i < 3; i++) { + for (unsigned j = 0; j < 4; j++) { + for (unsigned k = 0; k < 5; k++) { + const bool accessed = (i == 2) && (j == 3); + const unsigned linearized_index = k + (j * 5) + (i * 4 * 5); + + EXPECT_EQ(accessed, + entry_b->is_linearized_index_referenced(linearized_index)) << + "array b[" << i << "][" << j << "][" << k << "], " << + "linear index = " << linearized_index; + } + } + } + + ir_array_refcount_entry *const entry_c = v.get_variable_entry(var_c); + + for (unsigned i = 0; i < var_c->type->array_size(); i++) { + EXPECT_EQ(true, entry_c->is_linearized_index_referenced(i)) << + "array c, i = " << i; + } + + validate_variables_in_hash_table(v.ht, 4, var_a, var_b, var_c, var_i); +} + +TEST_F(array_refcount_test, visit_array_indexing_with_itself) +{ + const glsl_type *const array_2_of_array_3_of_int = + glsl_type::get_array_instance(array_3_of_int, 2); + + const glsl_type *const array_2_of_array_2_of_array_3_of_int = + glsl_type::get_array_instance(array_2_of_array_3_of_int, 2); + + ir_variable *var_a = new(mem_ctx) ir_variable(glsl_type::int_type, + "a", + ir_var_auto); + ir_variable *var_b = new(mem_ctx) ir_variable(array_2_of_array_2_of_array_3_of_int, + "b", + ir_var_auto); + + /* Given GLSL code: + * + * int b[2][2][3]; + * a = b[ b[0][0][0] ][ b[ b[0][1][0] ][ b[1][0][0] ][1] ][2] + * + * b[0][0][0], b[0][1][0], and b[1][0][0] are trivially accessed. + * + * b[*][*][1] and b[*][*][2] are accessed. + * + * Only b[1][1][0] is not accessed. + */ + operand b000 = deref_array( + deref_array( + deref_array(var_b, body->constant(int(0))), + body->constant(int(0))), + body->constant(int(0))); + + operand b010 = deref_array( + deref_array( + deref_array(var_b, body->constant(int(0))), + body->constant(int(1))), + body->constant(int(0))); + + operand b100 = deref_array( + deref_array( + deref_array(var_b, body->constant(int(1))), + body->constant(int(0))), + body->constant(int(0))); + + operand b_b010_b100_1 = deref_array( + deref_array( + deref_array(var_b, b010), + b100), + body->constant(int(1))); + + body->emit(assign(var_a, + deref_array( + deref_array( + deref_array(var_b, b000), + b_b010_b100_1), + body->constant(int(2))))); + + ir_array_refcount_visitor v; + + visit_list_elements(&v, &instructions); + + ir_array_refcount_entry *const entry_b = v.get_variable_entry(var_b); + + for (unsigned i = 0; i < 2; i++) { + for (unsigned j = 0; j < 2; j++) { + for (unsigned k = 0; k < 3; k++) { + const bool accessed = !(i == 1 && j == 1 && k == 0); + const unsigned linearized_index = k + (j * 3) + (i * 2 * 3); + + EXPECT_EQ(accessed, + entry_b->is_linearized_index_referenced(linearized_index)) << + "array b[" << i << "][" << j << "][" << k << "], " << + "linear index = " << linearized_index; + } + } + } + + validate_variables_in_hash_table(v.ht, 2, var_a, var_b); +} diff -Nru mesa-12.0.6/src/compiler/glsl/tests/blob_test.c mesa-17.0.7/src/compiler/glsl/tests/blob_test.c --- mesa-12.0.6/src/compiler/glsl/tests/blob_test.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/tests/blob_test.c 2017-06-01 10:37:10.000000000 +0000 @@ -23,6 +23,7 @@ /* A collection of unit tests for blob.c */ +#include #include #include #include @@ -49,7 +50,10 @@ expect_equal(uint64_t expected, uint64_t actual, const char *test) { if (actual != expected) { - fprintf (stderr, "Error: Test '%s' failed: Expected=%ld, Actual=%ld\n", + fprintf(stderr, + "Error: Test '%s' failed: " + "Expected=%" PRIu64 ", " + "Actual=%" PRIu64 "\n", test, expected, actual); error = true; } @@ -59,7 +63,9 @@ expect_unequal(uint64_t expected, uint64_t actual, const char *test) { if (actual == expected) { - fprintf (stderr, "Error: Test '%s' failed: Result=%ld, but expected something different.\n", + fprintf(stderr, + "Error: Test '%s' failed: Result=%" PRIu64 ", " + "but expected something different.\n", test, actual); error = true; } diff -Nru mesa-12.0.6/src/compiler/glsl/tests/cache_test.c mesa-17.0.7/src/compiler/glsl/tests/cache_test.c --- mesa-12.0.6/src/compiler/glsl/tests/cache_test.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/tests/cache_test.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,402 @@ +/* + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +/* A collection of unit tests for cache.c */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "util/mesa-sha1.h" +#include "util/disk_cache.h" + +bool error = false; + +#ifdef ENABLE_SHADER_CACHE + +static void +expect_equal(uint64_t actual, uint64_t expected, const char *test) +{ + if (actual != expected) { + fprintf(stderr, "Error: Test '%s' failed: Expected=%" PRIu64 + ", Actual=%" PRIu64 "\n", + test, expected, actual); + error = true; + } +} + +static void +expect_null(void *ptr, const char *test) +{ + if (ptr != NULL) { + fprintf(stderr, "Error: Test '%s' failed: Result=%p, but expected NULL.\n", + test, ptr); + error = true; + } +} + +static void +expect_non_null(void *ptr, const char *test) +{ + if (ptr == NULL) { + fprintf(stderr, "Error: Test '%s' failed: Result=NULL, but expected something else.\n", + test); + error = true; + } +} + +static void +expect_equal_str(const char *actual, const char *expected, const char *test) +{ + if (strcmp(actual, expected)) { + fprintf(stderr, "Error: Test '%s' failed:\n\t" + "Expected=\"%s\", Actual=\"%s\"\n", + test, expected, actual); + error = true; + } +} + +/* Callback for nftw used in rmrf_local below. + */ +static int +remove_entry(const char *path, + const struct stat *sb, + int typeflag, + struct FTW *ftwbuf) +{ + int err = remove(path); + + if (err) + fprintf(stderr, "Error removing %s: %s\n", path, strerror(errno)); + + return err; +} + +/* Recursively remove a directory. + * + * This is equivalent to "rm -rf " with one bit of protection + * that the directory name must begin with "." to ensure we don't + * wander around deleting more than intended. + * + * Returns 0 on success, -1 on any error. + */ +static int +rmrf_local(const char *path) +{ + if (path == NULL || *path == '\0' || *path != '.') + return -1; + + return nftw(path, remove_entry, 64, FTW_DEPTH | FTW_PHYS); +} + +#define CACHE_TEST_TMP "./cache-test-tmp" + +static void +test_disk_cache_create(void) +{ + struct disk_cache *cache; + int err; + + /* Before doing anything else, ensure that with + * MESA_GLSL_CACHE_DISABLE set, that disk_cache_create returns NULL. + */ + setenv("MESA_GLSL_CACHE_DISABLE", "1", 1); + cache = disk_cache_create(); + expect_null(cache, "disk_cache_create with MESA_GLSL_CACHE_DISABLE set"); + + unsetenv("MESA_GLSL_CACHE_DISABLE"); + + /* For the first real disk_cache_create() clear these environment + * variables to test creation of cache in home directory. + */ + unsetenv("MESA_GLSL_CACHE_DIR"); + unsetenv("XDG_CACHE_HOME"); + + cache = disk_cache_create(); + expect_non_null(cache, "disk_cache_create with no environment variables"); + + disk_cache_destroy(cache); + + /* Test with XDG_CACHE_HOME set */ + setenv("XDG_CACHE_HOME", CACHE_TEST_TMP "/xdg-cache-home", 1); + cache = disk_cache_create(); + expect_null(cache, "disk_cache_create with XDG_CACHE_HOME set with" + "a non-existing parent directory"); + + mkdir(CACHE_TEST_TMP, 0755); + cache = disk_cache_create(); + expect_non_null(cache, "disk_cache_create with XDG_CACHE_HOME set"); + + disk_cache_destroy(cache); + + /* Test with MESA_GLSL_CACHE_DIR set */ + err = rmrf_local(CACHE_TEST_TMP); + expect_equal(err, 0, "Removing " CACHE_TEST_TMP); + + setenv("MESA_GLSL_CACHE_DIR", CACHE_TEST_TMP "/mesa-glsl-cache-dir", 1); + cache = disk_cache_create(); + expect_null(cache, "disk_cache_create with MESA_GLSL_CACHE_DIR set with" + "a non-existing parent directory"); + + mkdir(CACHE_TEST_TMP, 0755); + cache = disk_cache_create(); + expect_non_null(cache, "disk_cache_create with MESA_GLSL_CACHE_DIR set"); + + disk_cache_destroy(cache); +} + +static bool +does_cache_contain(struct disk_cache *cache, cache_key key) +{ + void *result; + + result = disk_cache_get(cache, key, NULL); + + if (result) { + free(result); + return true; + } + + return false; +} + +static void +test_put_and_get(void) +{ + struct disk_cache *cache; + /* If the text of this blob is changed, then blob_key_byte_zero + * also needs to be updated. + */ + char blob[] = "This is a blob of thirty-seven bytes"; + uint8_t blob_key[20]; + uint8_t blob_key_byte_zero = 0xca; + char string[] = "While this string has thirty-four"; + uint8_t string_key[20]; + char *result; + size_t size; + uint8_t *one_KB, *one_MB; + uint8_t one_KB_key[20], one_MB_key[20]; + int count; + + cache = disk_cache_create(); + + _mesa_sha1_compute(blob, sizeof(blob), blob_key); + + /* Ensure that disk_cache_get returns nothing before anything is added. */ + result = disk_cache_get(cache, blob_key, &size); + expect_null(result, "disk_cache_get with non-existent item (pointer)"); + expect_equal(size, 0, "disk_cache_get with non-existent item (size)"); + + /* Simple test of put and get. */ + disk_cache_put(cache, blob_key, blob, sizeof(blob)); + + result = disk_cache_get(cache, blob_key, &size); + expect_equal_str(blob, result, "disk_cache_get of existing item (pointer)"); + expect_equal(size, sizeof(blob), "disk_cache_get of existing item (size)"); + + free(result); + + /* Test put and get of a second item. */ + _mesa_sha1_compute(string, sizeof(string), string_key); + disk_cache_put(cache, string_key, string, sizeof(string)); + + result = disk_cache_get(cache, string_key, &size); + expect_equal_str(result, string, "2nd disk_cache_get of existing item (pointer)"); + expect_equal(size, sizeof(string), "2nd disk_cache_get of existing item (size)"); + + free(result); + + /* Set the cache size to 1KB and add a 1KB item to force an eviction. */ + disk_cache_destroy(cache); + + setenv("MESA_GLSL_CACHE_MAX_SIZE", "1K", 1); + cache = disk_cache_create(); + + one_KB = calloc(1, 1024); + + /* Obviously the SHA-1 hash of 1024 zero bytes isn't particularly + * interesting. But we do have want to take some special care with + * the hash we use here. The issue is that in this artificial case, + * (with only three files in the cache), the probability is good + * that each of the three files will end up in their own + * directory. Then, if the directory containing the .tmp file for + * the new item being added for disk_cache_put() is the chosen victim + * directory for eviction, then no suitable file will be found and + * nothing will be evicted. + * + * That's actually expected given how the eviction code is + * implemented, (which expects to only evict once things are more + * interestingly full than that). + * + * For this test, we force this signature to land in the same + * directory as the original blob first written to the cache. + */ + _mesa_sha1_compute(one_KB, 1024, one_KB_key); + one_KB_key[0] = blob_key_byte_zero; + + disk_cache_put(cache, one_KB_key, one_KB, 1024); + + free(one_KB); + + result = disk_cache_get(cache, one_KB_key, &size); + expect_non_null(result, "3rd disk_cache_get of existing item (pointer)"); + expect_equal(size, 1024, "3rd disk_cache_get of existing item (size)"); + + free(result); + + /* Ensure eviction happened by checking that only one of the two + * previously-added items can still be fetched. + */ + count = 0; + if (does_cache_contain(cache, blob_key)) + count++; + + if (does_cache_contain(cache, string_key)) + count++; + + expect_equal(count, 1, "disk_cache_put eviction with MAX_SIZE=1K"); + + /* Now increase the size to 1M, add back both items, and ensure all + * three that have been added are available via disk_cache_get. + */ + disk_cache_destroy(cache); + + setenv("MESA_GLSL_CACHE_MAX_SIZE", "1M", 1); + cache = disk_cache_create(); + + disk_cache_put(cache, blob_key, blob, sizeof(blob)); + disk_cache_put(cache, string_key, string, sizeof(string)); + + count = 0; + if (does_cache_contain(cache, blob_key)) + count++; + + if (does_cache_contain(cache, string_key)) + count++; + + if (does_cache_contain(cache, one_KB_key)) + count++; + + expect_equal(count, 3, "no eviction before overflow with MAX_SIZE=1M"); + + /* Finally, check eviction again after adding an object of size 1M. */ + one_MB = calloc(1024, 1024); + + _mesa_sha1_compute(one_MB, 1024 * 1024, one_MB_key); + one_MB_key[0] = blob_key_byte_zero;; + + disk_cache_put(cache, one_MB_key, one_MB, 1024 * 1024); + + free(one_MB); + + count = 0; + if (does_cache_contain(cache, blob_key)) + count++; + + if (does_cache_contain(cache, string_key)) + count++; + + if (does_cache_contain(cache, one_KB_key)) + count++; + + expect_equal(count, 2, "eviction after overflow with MAX_SIZE=1M"); + + disk_cache_destroy(cache); +} + +static void +test_put_key_and_get_key(void) +{ + struct disk_cache *cache; + bool result; + + uint8_t key_a[20] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, + 10, 11, 12, 13, 14, 15, 16, 17, 18, 19}; + uint8_t key_b[20] = { 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, + 30, 33, 32, 33, 34, 35, 36, 37, 38, 39}; + uint8_t key_a_collide[20] = + { 0, 1, 42, 43, 44, 45, 46, 47, 48, 49, + 50, 55, 52, 53, 54, 55, 56, 57, 58, 59}; + + cache = disk_cache_create(); + + /* First test that disk_cache_has_key returns false before disk_cache_put_key */ + result = disk_cache_has_key(cache, key_a); + expect_equal(result, 0, "disk_cache_has_key before key added"); + + /* Then a couple of tests of disk_cache_put_key followed by disk_cache_has_key */ + disk_cache_put_key(cache, key_a); + result = disk_cache_has_key(cache, key_a); + expect_equal(result, 1, "disk_cache_has_key after key added"); + + disk_cache_put_key(cache, key_b); + result = disk_cache_has_key(cache, key_b); + expect_equal(result, 1, "2nd disk_cache_has_key after key added"); + + /* Test that a key with the same two bytes as an existing key + * forces an eviction. + */ + disk_cache_put_key(cache, key_a_collide); + result = disk_cache_has_key(cache, key_a_collide); + expect_equal(result, 1, "put_key of a colliding key lands in the cache"); + + result = disk_cache_has_key(cache, key_a); + expect_equal(result, 0, "put_key of a colliding key evicts from the cache"); + + /* And finally test that we can re-add the original key to re-evict + * the colliding key. + */ + disk_cache_put_key(cache, key_a); + result = disk_cache_has_key(cache, key_a); + expect_equal(result, 1, "put_key of original key lands again"); + + result = disk_cache_has_key(cache, key_a_collide); + expect_equal(result, 0, "put_key of orginal key evicts the colliding key"); + + disk_cache_destroy(cache); +} +#endif /* ENABLE_SHADER_CACHE */ + +int +main(void) +{ +#ifdef ENABLE_SHADER_CACHE + int err; + + test_disk_cache_create(); + + test_put_and_get(); + + test_put_key_and_get_key(); + + err = rmrf_local(CACHE_TEST_TMP); + expect_equal(err, 0, "Removing " CACHE_TEST_TMP " again"); +#endif /* ENABLE_SHADER_CACHE */ + + return error ? 1 : 0; +} diff -Nru mesa-12.0.6/src/compiler/glsl/tests/.deps/array_refcount_test.Po mesa-17.0.7/src/compiler/glsl/tests/.deps/array_refcount_test.Po --- mesa-12.0.6/src/compiler/glsl/tests/.deps/array_refcount_test.Po 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/tests/.deps/array_refcount_test.Po 2017-06-01 10:37:32.000000000 +0000 @@ -0,0 +1 @@ +# dummy diff -Nru mesa-12.0.6/src/compiler/glsl/tests/.deps/glsl_tests_cache_test-cache_test.Po mesa-17.0.7/src/compiler/glsl/tests/.deps/glsl_tests_cache_test-cache_test.Po --- mesa-12.0.6/src/compiler/glsl/tests/.deps/glsl_tests_cache_test-cache_test.Po 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/tests/.deps/glsl_tests_cache_test-cache_test.Po 2017-06-01 10:37:32.000000000 +0000 @@ -0,0 +1 @@ +# dummy diff -Nru mesa-12.0.6/src/compiler/glsl/tests/.deps/opt_add_neg_to_sub_test.Po mesa-17.0.7/src/compiler/glsl/tests/.deps/opt_add_neg_to_sub_test.Po --- mesa-12.0.6/src/compiler/glsl/tests/.deps/opt_add_neg_to_sub_test.Po 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/tests/.deps/opt_add_neg_to_sub_test.Po 2017-06-01 10:37:32.000000000 +0000 @@ -0,0 +1 @@ +# dummy diff -Nru mesa-12.0.6/src/compiler/glsl/tests/general_ir_test.cpp mesa-17.0.7/src/compiler/glsl/tests/general_ir_test.cpp --- mesa-12.0.6/src/compiler/glsl/tests/general_ir_test.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/tests/general_ir_test.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -38,6 +38,7 @@ glsl_type::get_interface_instance(f, ARRAY_SIZE(f), GLSL_INTERFACE_PACKING_STD140, + false, "simple_interface"); static const char name[] = "named_instance"; @@ -63,6 +64,7 @@ glsl_type::get_interface_instance(f, ARRAY_SIZE(f), GLSL_INTERFACE_PACKING_STD140, + false, "simple_interface"); const glsl_type *const interface_array = diff -Nru mesa-12.0.6/src/compiler/glsl/tests/lower_jumps/create_test_cases.py mesa-17.0.7/src/compiler/glsl/tests/lower_jumps/create_test_cases.py --- mesa-12.0.6/src/compiler/glsl/tests/lower_jumps/create_test_cases.py 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/tests/lower_jumps/create_test_cases.py 2017-06-01 10:37:10.000000000 +0000 @@ -236,6 +236,13 @@ check_sexp(statements) return [['if', ['var_ref', 'execute_flag'], statements, []]] +def if_return_flag(then_statements, else_statements): + """Wrap statements in an if test with return_flag as the condition. + """ + check_sexp(then_statements) + check_sexp(else_statements) + return [['if', ['var_ref', 'return_flag'], then_statements, else_statements]] + def if_not_return_flag(statements): """Wrap statements in an if test so that they will only execute if return_flag is False. @@ -452,7 +459,10 @@ loop(simple_if('b', simple_if('c', [], continue_()), lowered_return_simple()) + break_()) + - if_not_return_flag(assign_x('d', const_float(1)))) + + if_return_flag(assign_x('return_flag', const_bool(1)) + + assign_x('execute_flag', const_bool(0)), + assign_x('d', const_float(1)))) )) create_test_case(doc_string, input_sexp, expected_sexp, 'lower_pulled_out_jump', lower_main_return=True, pull_out_jumps=True) @@ -583,11 +593,14 @@ assign_x('b', const_float(2)) )) expected_sexp = make_test_case('main', 'void', ( + declare_execute_flag() + declare_return_flag() + loop(assign_x('a', const_float(1)) + lowered_return_simple() + break_()) + - if_not_return_flag(assign_x('b', const_float(2))) + if_return_flag(assign_x('return_flag', const_bool(1)) + + assign_x('execute_flag', const_bool(0)), + assign_x('b', const_float(2))) )) create_test_case(doc_string, input_sexp, input_sexp, 'return_void_at_end_of_loop_lower_nothing') create_test_case(doc_string, input_sexp, expected_sexp, 'return_void_at_end_of_loop_lower_return', diff -Nru mesa-12.0.6/src/compiler/glsl/tests/opt_add_neg_to_sub_test.cpp mesa-17.0.7/src/compiler/glsl/tests/opt_add_neg_to_sub_test.cpp --- mesa-12.0.6/src/compiler/glsl/tests/opt_add_neg_to_sub_test.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/tests/opt_add_neg_to_sub_test.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,210 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +#include +#include "ir.h" +#include "ir_builder.h" +#include "opt_add_neg_to_sub.h" + +using namespace ir_builder; + +class add_neg_to_sub : public ::testing::Test { +public: + virtual void SetUp(); + virtual void TearDown(); + + exec_list instructions; + ir_factory *body; + void *mem_ctx; + ir_variable *var_a; + ir_variable *var_b; + ir_variable *var_c; + add_neg_to_sub_visitor v; +}; + +void +add_neg_to_sub::SetUp() +{ + mem_ctx = ralloc_context(NULL); + + instructions.make_empty(); + body = new ir_factory(&instructions, mem_ctx); + + var_a = new(mem_ctx) ir_variable(glsl_type::float_type, + "a", + ir_var_temporary); + + var_b = new(mem_ctx) ir_variable(glsl_type::float_type, + "b", + ir_var_temporary); + + var_c = new(mem_ctx) ir_variable(glsl_type::float_type, + "c", + ir_var_temporary); +} + +void +add_neg_to_sub::TearDown() +{ + delete body; + body = NULL; + + ralloc_free(mem_ctx); + mem_ctx = NULL; +} + +TEST_F(add_neg_to_sub, a_plus_b) +{ + body->emit(assign(var_c, add(var_a, var_b))); + + visit_list_elements(&v, &instructions); + + ASSERT_FALSE(instructions.is_empty()); + + ir_instruction *const ir = (ir_instruction *) instructions.pop_head(); + + EXPECT_TRUE(instructions.is_empty()); + + /* The resulting instruction should be 'c = a + b'. */ + ir_assignment *const assign = ir->as_assignment(); + ASSERT_NE((void *)0, assign); + + EXPECT_EQ(var_c, assign->lhs->variable_referenced()); + + ir_expression *const expr = assign->rhs->as_expression(); + ASSERT_NE((void *)0, expr); + EXPECT_EQ(ir_binop_add, expr->operation); + + ir_dereference_variable *const deref_a = + expr->operands[0]->as_dereference_variable(); + ir_dereference_variable *const deref_b = + expr->operands[1]->as_dereference_variable(); + + ASSERT_NE((void *)0, deref_a); + EXPECT_EQ(var_a, deref_a->var); + ASSERT_NE((void *)0, deref_b); + EXPECT_EQ(var_b, deref_b->var); +} + +TEST_F(add_neg_to_sub, a_plus_neg_b) +{ + body->emit(assign(var_c, add(var_a, neg(var_b)))); + + visit_list_elements(&v, &instructions); + + ASSERT_FALSE(instructions.is_empty()); + + ir_instruction *const ir = (ir_instruction *) instructions.pop_head(); + + EXPECT_TRUE(instructions.is_empty()); + + /* The resulting instruction should be 'c = a - b'. */ + ir_assignment *const assign = ir->as_assignment(); + ASSERT_NE((void *)0, assign); + + EXPECT_EQ(var_c, assign->lhs->variable_referenced()); + + ir_expression *const expr = assign->rhs->as_expression(); + ASSERT_NE((void *)0, expr); + EXPECT_EQ(ir_binop_sub, expr->operation); + + ir_dereference_variable *const deref_a = + expr->operands[0]->as_dereference_variable(); + ir_dereference_variable *const deref_b = + expr->operands[1]->as_dereference_variable(); + + ASSERT_NE((void *)0, deref_a); + EXPECT_EQ(var_a, deref_a->var); + ASSERT_NE((void *)0, deref_b); + EXPECT_EQ(var_b, deref_b->var); +} + +TEST_F(add_neg_to_sub, neg_a_plus_b) +{ + body->emit(assign(var_c, add(neg(var_a), var_b))); + + visit_list_elements(&v, &instructions); + + ASSERT_FALSE(instructions.is_empty()); + + ir_instruction *const ir = (ir_instruction *) instructions.pop_head(); + + EXPECT_TRUE(instructions.is_empty()); + + /* The resulting instruction should be 'c = b - a'. */ + ir_assignment *const assign = ir->as_assignment(); + ASSERT_NE((void *)0, assign); + + EXPECT_EQ(var_c, assign->lhs->variable_referenced()); + + ir_expression *const expr = assign->rhs->as_expression(); + ASSERT_NE((void *)0, expr); + EXPECT_EQ(ir_binop_sub, expr->operation); + + ir_dereference_variable *const deref_b = + expr->operands[0]->as_dereference_variable(); + ir_dereference_variable *const deref_a = + expr->operands[1]->as_dereference_variable(); + + ASSERT_NE((void *)0, deref_a); + EXPECT_EQ(var_a, deref_a->var); + ASSERT_NE((void *)0, deref_b); + EXPECT_EQ(var_b, deref_b->var); +} + +TEST_F(add_neg_to_sub, neg_a_plus_neg_b) +{ + body->emit(assign(var_c, add(neg(var_a), neg(var_b)))); + + visit_list_elements(&v, &instructions); + + ASSERT_FALSE(instructions.is_empty()); + + ir_instruction *const ir = (ir_instruction *) instructions.pop_head(); + + EXPECT_TRUE(instructions.is_empty()); + + /* The resulting instruction should be 'c = -b - a'. */ + ir_assignment *const assign = ir->as_assignment(); + ASSERT_NE((void *)0, assign); + + EXPECT_EQ(var_c, assign->lhs->variable_referenced()); + + ir_expression *const expr = assign->rhs->as_expression(); + ASSERT_NE((void *)0, expr); + EXPECT_EQ(ir_binop_sub, expr->operation); + + ir_expression *const neg_b = expr->operands[0]->as_expression(); + ir_dereference_variable *const deref_a = + expr->operands[1]->as_dereference_variable(); + + ASSERT_NE((void *)0, deref_a); + EXPECT_EQ(var_a, deref_a->var); + + ASSERT_NE((void *)0, neg_b); + + ir_dereference_variable *const deref_b = + neg_b->operands[0]->as_dereference_variable(); + + ASSERT_NE((void *)0, deref_b); + EXPECT_EQ(var_b, deref_b->var); +} diff -Nru mesa-12.0.6/src/compiler/glsl/tests/set_uniform_initializer_tests.cpp mesa-17.0.7/src/compiler/glsl/tests/set_uniform_initializer_tests.cpp --- mesa-12.0.6/src/compiler/glsl/tests/set_uniform_initializer_tests.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/tests/set_uniform_initializer_tests.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -25,6 +25,7 @@ #include "main/mtypes.h" #include "main/macros.h" #include "util/ralloc.h" +#include "util/string_to_uint_map.h" #include "uniform_initializer_utils.h" namespace linker { @@ -69,6 +70,7 @@ { this->mem_ctx = ralloc_context(NULL); this->prog = rzalloc(NULL, struct gl_shader_program); + this->prog->data = rzalloc(this->prog, struct gl_shader_program_data); /* Set default values used by the test cases. */ @@ -108,40 +110,44 @@ + type->components())); const unsigned red_zone_components = total_components - data_components; - prog->UniformStorage = rzalloc_array(prog, struct gl_uniform_storage, - num_storage); - prog->NumUniformStorage = num_storage; - - prog->UniformStorage[index_to_set].name = (char *) name; - prog->UniformStorage[index_to_set].type = type; - prog->UniformStorage[index_to_set].array_elements = array_size; + prog->UniformHash = new string_to_uint_map; + prog->data->UniformStorage = rzalloc_array(prog, struct gl_uniform_storage, + num_storage); + prog->data->NumUniformStorage = num_storage; + + prog->data->UniformStorage[index_to_set].name = (char *) name; + prog->data->UniformStorage[index_to_set].type = type; + prog->data->UniformStorage[index_to_set].array_elements = array_size; for (int sh = 0; sh < MESA_SHADER_STAGES; sh++) { - prog->UniformStorage[index_to_set].opaque[sh].index = ~0; - prog->UniformStorage[index_to_set].opaque[sh].active = false; + prog->data->UniformStorage[index_to_set].opaque[sh].index = ~0; + prog->data->UniformStorage[index_to_set].opaque[sh].active = false; } - prog->UniformStorage[index_to_set].num_driver_storage = 0; - prog->UniformStorage[index_to_set].driver_storage = NULL; - prog->UniformStorage[index_to_set].storage = + prog->data->UniformStorage[index_to_set].num_driver_storage = 0; + prog->data->UniformStorage[index_to_set].driver_storage = NULL; + prog->data->UniformStorage[index_to_set].storage = rzalloc_array(prog, union gl_constant_value, total_components); - fill_storage_array_with_sentinels(prog->UniformStorage[index_to_set].storage, + fill_storage_array_with_sentinels(prog->data->UniformStorage[index_to_set].storage, data_components, red_zone_components); + prog->UniformHash->put(index_to_set, + prog->data->UniformStorage[index_to_set].name); + for (unsigned i = 0; i < num_storage; i++) { if (i == index_to_set) continue; - prog->UniformStorage[i].name = (char *) "invalid slot"; - prog->UniformStorage[i].type = glsl_type::void_type; - prog->UniformStorage[i].array_elements = 0; + prog->data->UniformStorage[i].name = (char *) "invalid slot"; + prog->data->UniformStorage[i].type = glsl_type::void_type; + prog->data->UniformStorage[i].array_elements = 0; for (int sh = 0; sh < MESA_SHADER_STAGES; sh++) { - prog->UniformStorage[i].opaque[sh].index = ~0; - prog->UniformStorage[i].opaque[sh].active = false; + prog->data->UniformStorage[i].opaque[sh].index = ~0; + prog->data->UniformStorage[i].opaque[sh].active = false; } - prog->UniformStorage[i].num_driver_storage = 0; - prog->UniformStorage[i].driver_storage = NULL; - prog->UniformStorage[i].storage = NULL; + prog->data->UniformStorage[i].num_driver_storage = 0; + prog->data->UniformStorage[i].driver_storage = NULL; + prog->data->UniformStorage[i].storage = NULL; } return red_zone_components; @@ -164,7 +170,7 @@ linker::set_uniform_initializer(mem_ctx, prog, name, type, val, 0xF00F); - verify_data(prog->UniformStorage[actual_index].storage, 0, val, + verify_data(prog->data->UniformStorage[actual_index].storage, 0, val, red_zone_components, 0xF00F); } @@ -320,7 +326,7 @@ linker::set_uniform_initializer(mem_ctx, prog, name, element_type, val, 0xF00F); - verify_data(prog->UniformStorage[actual_index].storage, array_size, + verify_data(prog->data->UniformStorage[actual_index].storage, array_size, val, red_zone_components, 0xF00F); } diff -Nru mesa-12.0.6/src/compiler/glsl/tests/varyings_test.cpp mesa-17.0.7/src/compiler/glsl/tests/varyings_test.cpp --- mesa-12.0.6/src/compiler/glsl/tests/varyings_test.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/tests/varyings_test.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -26,7 +26,7 @@ #include "main/macros.h" #include "util/ralloc.h" #include "ir.h" -#include "program/hash_table.h" +#include "util/hash_table.h" /** * \file varyings_test.cpp @@ -83,6 +83,7 @@ glsl_type::get_interface_instance(f, ARRAY_SIZE(f), GLSL_INTERFACE_PACKING_STD140, + false, "simple_interface"); } @@ -92,11 +93,13 @@ this->mem_ctx = ralloc_context(NULL); this->ir.make_empty(); - this->consumer_inputs - = hash_table_ctor(0, hash_table_string_hash, hash_table_string_compare); - - this->consumer_interface_inputs - = hash_table_ctor(0, hash_table_string_hash, hash_table_string_compare); + this->consumer_inputs = + _mesa_hash_table_create(NULL, _mesa_key_hash_string, + _mesa_key_string_equal); + + this->consumer_interface_inputs = + _mesa_hash_table_create(NULL, _mesa_key_hash_string, + _mesa_key_string_equal); } void @@ -105,47 +108,12 @@ ralloc_free(this->mem_ctx); this->mem_ctx = NULL; - hash_table_dtor(this->consumer_inputs); + _mesa_hash_table_destroy(this->consumer_inputs, NULL); this->consumer_inputs = NULL; - hash_table_dtor(this->consumer_interface_inputs); + _mesa_hash_table_destroy(this->consumer_interface_inputs, NULL); this->consumer_interface_inputs = NULL; } -/** - * Hash table callback function that counts the elements in the table - * - * \sa num_elements - */ -static void -ht_count_callback(const void *, void *, void *closure) -{ - unsigned int *counter = (unsigned int *) closure; - - (*counter)++; -} - -/** - * Helper function to count the number of elements in a hash table. - */ -static unsigned -num_elements(hash_table *ht) -{ - unsigned int counter = 0; - - hash_table_call_foreach(ht, ht_count_callback, (void *) &counter); - - return counter; -} - -/** - * Helper function to determine whether a hash table is empty. - */ -static bool -is_empty(hash_table *ht) -{ - return num_elements(ht) == 0; -} - TEST_F(link_varyings, single_simple_input) { ir_variable *const v = @@ -162,9 +130,10 @@ consumer_interface_inputs, junk); - EXPECT_EQ((void *) v, hash_table_find(consumer_inputs, "a")); - EXPECT_EQ(1u, num_elements(consumer_inputs)); - EXPECT_TRUE(is_empty(consumer_interface_inputs)); + hash_entry *entry = _mesa_hash_table_search(consumer_inputs, "a"); + EXPECT_EQ((void *) v, entry->data); + EXPECT_EQ(1u, consumer_inputs->entries); + EXPECT_TRUE(consumer_interface_inputs->entries == 0); } TEST_F(link_varyings, gl_ClipDistance) @@ -190,8 +159,8 @@ junk); EXPECT_EQ(clipdistance, junk[VARYING_SLOT_CLIP_DIST0]); - EXPECT_TRUE(is_empty(consumer_inputs)); - EXPECT_TRUE(is_empty(consumer_interface_inputs)); + EXPECT_TRUE(consumer_inputs->entries == 0); + EXPECT_TRUE(consumer_interface_inputs->entries == 0); } TEST_F(link_varyings, gl_CullDistance) @@ -217,8 +186,8 @@ junk); EXPECT_EQ(culldistance, junk[VARYING_SLOT_CULL_DIST0]); - EXPECT_TRUE(is_empty(consumer_inputs)); - EXPECT_TRUE(is_empty(consumer_interface_inputs)); + EXPECT_TRUE(consumer_inputs->entries == 0); + EXPECT_TRUE(consumer_interface_inputs->entries == 0); } TEST_F(link_varyings, single_interface_input) @@ -239,9 +208,11 @@ junk); char *const full_name = interface_field_name(simple_interface); - EXPECT_EQ((void *) v, hash_table_find(consumer_interface_inputs, full_name)); - EXPECT_EQ(1u, num_elements(consumer_interface_inputs)); - EXPECT_TRUE(is_empty(consumer_inputs)); + hash_entry *entry = _mesa_hash_table_search(consumer_interface_inputs, + full_name); + EXPECT_EQ((void *) v, entry->data); + EXPECT_EQ(1u, consumer_interface_inputs->entries); + EXPECT_TRUE(consumer_inputs->entries == 0); } TEST_F(link_varyings, one_interface_and_one_simple_input) @@ -271,12 +242,14 @@ char *const iface_field_name = interface_field_name(simple_interface); - EXPECT_EQ((void *) iface, hash_table_find(consumer_interface_inputs, - iface_field_name)); - EXPECT_EQ(1u, num_elements(consumer_interface_inputs)); - - EXPECT_EQ((void *) v, hash_table_find(consumer_inputs, "a")); - EXPECT_EQ(1u, num_elements(consumer_inputs)); + hash_entry *entry = _mesa_hash_table_search(consumer_interface_inputs, + iface_field_name); + EXPECT_EQ((void *) iface, entry->data); + EXPECT_EQ(1u, consumer_interface_inputs->entries); + + entry = _mesa_hash_table_search(consumer_inputs, "a"); + EXPECT_EQ((void *) v, entry->data); + EXPECT_EQ(1u, consumer_inputs->entries); } TEST_F(link_varyings, interface_field_doesnt_match_noninterface) diff -Nru mesa-12.0.6/src/compiler/glsl/tests/warnings/026-out-function-parameter-shaderout.vert.expected mesa-17.0.7/src/compiler/glsl/tests/warnings/026-out-function-parameter-shaderout.vert.expected --- mesa-12.0.6/src/compiler/glsl/tests/warnings/026-out-function-parameter-shaderout.vert.expected 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/tests/warnings/026-out-function-parameter-shaderout.vert.expected 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,2 @@ + +error: unresolved reference to function `fooFunction' diff -Nru mesa-12.0.6/src/compiler/glsl/tests/warnings/027-inout-function-parameter-shaderout.vert.expected mesa-17.0.7/src/compiler/glsl/tests/warnings/027-inout-function-parameter-shaderout.vert.expected --- mesa-12.0.6/src/compiler/glsl/tests/warnings/027-inout-function-parameter-shaderout.vert.expected 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/tests/warnings/027-inout-function-parameter-shaderout.vert.expected 2017-06-01 10:37:10.000000000 +0000 @@ -1 +1,3 @@ 0:11(14): warning: `willBeDefined' used uninitialized + +error: unresolved reference to function `fooFunction' diff -Nru mesa-12.0.6/src/compiler/glsl/tests/warnings/030-array-as-function-parameter.vert.expected mesa-17.0.7/src/compiler/glsl/tests/warnings/030-array-as-function-parameter.vert.expected --- mesa-12.0.6/src/compiler/glsl/tests/warnings/030-array-as-function-parameter.vert.expected 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl/tests/warnings/030-array-as-function-parameter.vert.expected 2017-06-01 10:37:10.000000000 +0000 @@ -5,3 +5,5 @@ 0:14(20): warning: `undefinedIndex' used uninitialized 0:14(51): warning: `undefinedIndex' used uninitialized 0:14(82): warning: `undefinedIndex' used uninitialized + +error: unresolved reference to function `foo' diff -Nru mesa-12.0.6/src/compiler/glsl_types.cpp mesa-17.0.7/src/compiler/glsl_types.cpp --- mesa-12.0.6/src/compiler/glsl_types.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl_types.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -51,10 +51,17 @@ gl_type(gl_type), base_type(base_type), sampler_dimensionality(0), sampler_shadow(0), sampler_array(0), - sampled_type(0), interface_packing(0), + sampled_type(0), interface_packing(0), interface_row_major(0), vector_elements(vector_elements), matrix_columns(matrix_columns), length(0) { + /* Values of these types must fit in the two bits of + * glsl_type::sampled_type. + */ + STATIC_ASSERT((unsigned(GLSL_TYPE_UINT) & 3) == unsigned(GLSL_TYPE_UINT)); + STATIC_ASSERT((unsigned(GLSL_TYPE_INT) & 3) == unsigned(GLSL_TYPE_INT)); + STATIC_ASSERT((unsigned(GLSL_TYPE_FLOAT) & 3) == unsigned(GLSL_TYPE_FLOAT)); + mtx_lock(&glsl_type::mutex); init_ralloc_type_ctx(); @@ -76,7 +83,7 @@ base_type(base_type), sampler_dimensionality(dim), sampler_shadow(shadow), sampler_array(array), sampled_type(type), interface_packing(0), - length(0) + interface_row_major(0), length(0) { mtx_lock(&glsl_type::mutex); @@ -101,7 +108,7 @@ gl_type(0), base_type(GLSL_TYPE_STRUCT), sampler_dimensionality(0), sampler_shadow(0), sampler_array(0), - sampled_type(0), interface_packing(0), + sampled_type(0), interface_packing(0), interface_row_major(0), vector_elements(0), matrix_columns(0), length(num_fields) { @@ -116,37 +123,22 @@ glsl_struct_field, length); for (i = 0; i < length; i++) { - this->fields.structure[i].type = fields[i].type; + this->fields.structure[i] = fields[i]; this->fields.structure[i].name = ralloc_strdup(this->fields.structure, fields[i].name); - this->fields.structure[i].location = fields[i].location; - this->fields.structure[i].offset = fields[i].offset; - this->fields.structure[i].interpolation = fields[i].interpolation; - this->fields.structure[i].centroid = fields[i].centroid; - this->fields.structure[i].sample = fields[i].sample; - this->fields.structure[i].matrix_layout = fields[i].matrix_layout; - this->fields.structure[i].patch = fields[i].patch; - this->fields.structure[i].image_read_only = fields[i].image_read_only; - this->fields.structure[i].image_write_only = fields[i].image_write_only; - this->fields.structure[i].image_coherent = fields[i].image_coherent; - this->fields.structure[i].image_volatile = fields[i].image_volatile; - this->fields.structure[i].image_restrict = fields[i].image_restrict; - this->fields.structure[i].precision = fields[i].precision; - this->fields.structure[i].explicit_xfb_buffer = - fields[i].explicit_xfb_buffer; - this->fields.structure[i].xfb_buffer = fields[i].xfb_buffer; - this->fields.structure[i].xfb_stride = fields[i].xfb_stride; } mtx_unlock(&glsl_type::mutex); } glsl_type::glsl_type(const glsl_struct_field *fields, unsigned num_fields, - enum glsl_interface_packing packing, const char *name) : + enum glsl_interface_packing packing, + bool row_major, const char *name) : gl_type(0), base_type(GLSL_TYPE_INTERFACE), sampler_dimensionality(0), sampler_shadow(0), sampler_array(0), sampled_type(0), interface_packing((unsigned) packing), + interface_row_major((unsigned) row_major), vector_elements(0), matrix_columns(0), length(num_fields) { @@ -157,29 +149,12 @@ init_ralloc_type_ctx(); assert(name != NULL); this->name = ralloc_strdup(this->mem_ctx, name); - this->fields.structure = ralloc_array(this->mem_ctx, - glsl_struct_field, length); + this->fields.structure = rzalloc_array(this->mem_ctx, + glsl_struct_field, length); for (i = 0; i < length; i++) { - this->fields.structure[i].type = fields[i].type; + this->fields.structure[i] = fields[i]; this->fields.structure[i].name = ralloc_strdup(this->fields.structure, fields[i].name); - this->fields.structure[i].location = fields[i].location; - this->fields.structure[i].offset = fields[i].offset; - this->fields.structure[i].interpolation = fields[i].interpolation; - this->fields.structure[i].centroid = fields[i].centroid; - this->fields.structure[i].sample = fields[i].sample; - this->fields.structure[i].matrix_layout = fields[i].matrix_layout; - this->fields.structure[i].patch = fields[i].patch; - this->fields.structure[i].image_read_only = fields[i].image_read_only; - this->fields.structure[i].image_write_only = fields[i].image_write_only; - this->fields.structure[i].image_coherent = fields[i].image_coherent; - this->fields.structure[i].image_volatile = fields[i].image_volatile; - this->fields.structure[i].image_restrict = fields[i].image_restrict; - this->fields.structure[i].precision = fields[i].precision; - this->fields.structure[i].explicit_xfb_buffer = - fields[i].explicit_xfb_buffer; - this->fields.structure[i].xfb_buffer = fields[i].xfb_buffer; - this->fields.structure[i].xfb_stride = fields[i].xfb_stride; } mtx_unlock(&glsl_type::mutex); @@ -190,7 +165,7 @@ gl_type(0), base_type(GLSL_TYPE_FUNCTION), sampler_dimensionality(0), sampler_shadow(0), sampler_array(0), - sampled_type(0), interface_packing(0), + sampled_type(0), interface_packing(0), interface_row_major(0), vector_elements(0), matrix_columns(0), length(num_params) { @@ -222,7 +197,7 @@ gl_type(0), base_type(GLSL_TYPE_SUBROUTINE), sampler_dimensionality(0), sampler_shadow(0), sampler_array(0), - sampled_type(0), interface_packing(0), + sampled_type(0), interface_packing(0), interface_row_major(0), vector_elements(1), matrix_columns(1), length(0) { @@ -239,7 +214,7 @@ { if (this->is_array()) { return this->fields.array->contains_sampler(); - } else if (this->is_record()) { + } else if (this->is_record() || this->is_interface()) { for (unsigned int i = 0; i < this->length; i++) { if (this->fields.structure[i].type->contains_sampler()) return true; @@ -256,7 +231,7 @@ { if (this->is_array()) { return this->fields.array->contains_integer(); - } else if (this->is_record()) { + } else if (this->is_record() || this->is_interface()) { for (unsigned int i = 0; i < this->length; i++) { if (this->fields.structure[i].type->contains_integer()) return true; @@ -272,7 +247,7 @@ { if (this->is_array()) { return this->fields.array->contains_double(); - } else if (this->is_record()) { + } else if (this->is_record() || this->is_interface()) { for (unsigned int i = 0; i < this->length; i++) { if (this->fields.structure[i].type->contains_double()) return true; @@ -293,6 +268,7 @@ case GLSL_TYPE_ARRAY: return fields.array->contains_opaque(); case GLSL_TYPE_STRUCT: + case GLSL_TYPE_INTERFACE: for (unsigned int i = 0; i < length; i++) { if (fields.structure[i].type->contains_opaque()) return true; @@ -308,7 +284,7 @@ { if (this->is_array()) { return this->fields.array->contains_subroutine(); - } else if (this->is_record()) { + } else if (this->is_record() || this->is_interface()) { for (unsigned int i = 0; i < this->length; i++) { if (this->fields.structure[i].type->contains_subroutine()) return true; @@ -354,7 +330,7 @@ { if (this->is_array()) { return this->fields.array->contains_image(); - } else if (this->is_record()) { + } else if (this->is_record() || this->is_interface()) { for (unsigned int i = 0; i < this->length; i++) { if (this->fields.structure[i].type->contains_image()) return true; @@ -438,7 +414,7 @@ glsl_type::glsl_type(const glsl_type *array, unsigned length) : base_type(GLSL_TYPE_ARRAY), sampler_dimensionality(0), sampler_shadow(0), sampler_array(0), - sampled_type(0), interface_packing(0), + sampled_type(0), interface_packing(0), interface_row_major(0), vector_elements(0), matrix_columns(0), length(length), name(NULL) { @@ -667,6 +643,9 @@ return error_type; else return samplerExternalOES_type; + case GLSL_SAMPLER_DIM_SUBPASS: + case GLSL_SAMPLER_DIM_SUBPASS_MS: + return error_type; } case GLSL_TYPE_INT: if (shadow) @@ -694,6 +673,9 @@ return (array ? isampler2DMSArray_type : isampler2DMS_type); case GLSL_SAMPLER_DIM_EXTERNAL: return error_type; + case GLSL_SAMPLER_DIM_SUBPASS: + case GLSL_SAMPLER_DIM_SUBPASS_MS: + return error_type; } case GLSL_TYPE_UINT: if (shadow) @@ -721,6 +703,9 @@ return (array ? usampler2DMSArray_type : usampler2DMS_type); case GLSL_SAMPLER_DIM_EXTERNAL: return error_type; + case GLSL_SAMPLER_DIM_SUBPASS: + case GLSL_SAMPLER_DIM_SUBPASS_MS: + return error_type; } default: return error_type; @@ -756,6 +741,10 @@ return imageBuffer_type; case GLSL_SAMPLER_DIM_MS: return (array ? image2DMSArray_type : image2DMS_type); + case GLSL_SAMPLER_DIM_SUBPASS: + return subpassInput_type; + case GLSL_SAMPLER_DIM_SUBPASS_MS: + return subpassInputMS_type; case GLSL_SAMPLER_DIM_EXTERNAL: return error_type; } @@ -781,6 +770,10 @@ return iimageBuffer_type; case GLSL_SAMPLER_DIM_MS: return (array ? iimage2DMSArray_type : iimage2DMS_type); + case GLSL_SAMPLER_DIM_SUBPASS: + return isubpassInput_type; + case GLSL_SAMPLER_DIM_SUBPASS_MS: + return isubpassInputMS_type; case GLSL_SAMPLER_DIM_EXTERNAL: return error_type; } @@ -806,6 +799,10 @@ return uimageBuffer_type; case GLSL_SAMPLER_DIM_MS: return (array ? uimage2DMSArray_type : uimage2DMS_type); + case GLSL_SAMPLER_DIM_SUBPASS: + return usubpassInput_type; + case GLSL_SAMPLER_DIM_SUBPASS_MS: + return usubpassInputMS_type; case GLSL_SAMPLER_DIM_EXTERNAL: return error_type; } @@ -864,6 +861,9 @@ if (this->interface_packing != b->interface_packing) return false; + if (this->interface_row_major != b->interface_row_major) + return false; + /* From the GLSL 4.20 specification (Sec 4.2): * * "Structures must have the same name, sequence of type names, and @@ -1010,9 +1010,10 @@ glsl_type::get_interface_instance(const glsl_struct_field *fields, unsigned num_fields, enum glsl_interface_packing packing, + bool row_major, const char *block_name) { - const glsl_type key(fields, num_fields, packing, block_name); + const glsl_type key(fields, num_fields, packing, row_major, block_name); mtx_lock(&glsl_type::mutex); @@ -1026,7 +1027,7 @@ if (entry == NULL) { mtx_unlock(&glsl_type::mutex); const glsl_type *t = new glsl_type(fields, num_fields, - packing, block_name); + packing, row_major, block_name); mtx_lock(&glsl_type::mutex); entry = _mesa_hash_table_insert(interface_types, t, (void *) t); @@ -1377,11 +1378,11 @@ if (this == desired) return true; - /* ESSL does not allow implicit conversions. If there is no state, we're - * doing intra-stage function linking where these checks have already been - * done. + /* GLSL 1.10 and ESSL do not allow implicit conversions. If there is no + * state, we're doing intra-stage function linking where these checks have + * already been done. */ - if (state && state->es_shader) + if (state && (state->es_shader || !state->is_version(120, 0))) return false; /* There is no conversion among matrix types. */ @@ -1396,11 +1397,14 @@ if (desired->is_float() && this->is_integer()) return true; - /* With GLSL 4.0 / ARB_gpu_shader5, int can be converted to uint. - * Note that state may be NULL here, when resolving function calls in the - * linker. By this time, all the state-dependent checks have already - * happened though, so allow anything that's allowed in any shader version. */ - if ((!state || state->is_version(400, 0) || state->ARB_gpu_shader5_enable) && + /* With GLSL 4.0, ARB_gpu_shader5, or MESA_shader_integer_functions, int + * can be converted to uint. Note that state may be NULL here, when + * resolving function calls in the linker. By this time, all the + * state-dependent checks have already happened though, so allow anything + * that's allowed in any shader version. + */ + if ((!state || state->is_version(400, 0) || state->ARB_gpu_shader5_enable || + state->MESA_shader_integer_functions_enable) && desired->base_type == GLSL_TYPE_UINT && this->base_type == GLSL_TYPE_INT) return true; @@ -1422,7 +1426,7 @@ unsigned glsl_type::std140_base_alignment(bool row_major) const { - unsigned N = is_double() ? 8 : 4; + unsigned N = is_64bit() ? 8 : 4; /* (1) If the member is a scalar consuming basic machine units, the * base alignment is . @@ -1540,7 +1544,7 @@ unsigned glsl_type::std140_size(bool row_major) const { - unsigned N = is_double() ? 8 : 4; + unsigned N = is_64bit() ? 8 : 4; /* (1) If the member is a scalar consuming basic machine units, the * base alignment is . @@ -1677,7 +1681,7 @@ glsl_type::std430_base_alignment(bool row_major) const { - unsigned N = is_double() ? 8 : 4; + unsigned N = is_64bit() ? 8 : 4; /* (1) If the member is a scalar consuming basic machine units, the * base alignment is . @@ -1786,7 +1790,7 @@ unsigned glsl_type::std430_array_stride(bool row_major) const { - unsigned N = is_double() ? 8 : 4; + unsigned N = is_64bit() ? 8 : 4; /* Notice that the array stride of a vec3 is not 3 * N but 4 * N. * See OpenGL 4.30 spec, section 7.6.2.2 "Standard Uniform Block Layout" @@ -1804,7 +1808,7 @@ unsigned glsl_type::std430_size(bool row_major) const { - unsigned N = is_double() ? 8 : 4; + unsigned N = is_64bit() ? 8 : 4; /* OpenGL 4.30 spec, section 7.6.2.2 "Standard Uniform Block Layout": * @@ -1965,6 +1969,7 @@ case GLSL_SAMPLER_DIM_RECT: case GLSL_SAMPLER_DIM_MS: case GLSL_SAMPLER_DIM_EXTERNAL: + case GLSL_SAMPLER_DIM_SUBPASS: size = 2; break; case GLSL_SAMPLER_DIM_3D: diff -Nru mesa-12.0.6/src/compiler/glsl_types.h mesa-17.0.7/src/compiler/glsl_types.h --- mesa-12.0.6/src/compiler/glsl_types.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/glsl_types.h 2017-06-01 10:37:10.000000000 +0000 @@ -47,6 +47,9 @@ #endif enum glsl_base_type { + /* Note: GLSL_TYPE_UINT, GLSL_TYPE_INT, and GLSL_TYPE_FLOAT must be 0, 1, + * and 2 so that they will fit in the 2 bits of glsl_type::sampled_type. + */ GLSL_TYPE_UINT = 0, GLSL_TYPE_INT, GLSL_TYPE_FLOAT, @@ -64,6 +67,11 @@ GLSL_TYPE_ERROR }; +static inline bool glsl_base_type_is_64bit(enum glsl_base_type type) +{ + return type == GLSL_TYPE_DOUBLE; +} + enum glsl_sampler_dim { GLSL_SAMPLER_DIM_1D = 0, GLSL_SAMPLER_DIM_2D, @@ -72,7 +80,9 @@ GLSL_SAMPLER_DIM_RECT, GLSL_SAMPLER_DIM_BUF, GLSL_SAMPLER_DIM_EXTERNAL, - GLSL_SAMPLER_DIM_MS + GLSL_SAMPLER_DIM_MS, + GLSL_SAMPLER_DIM_SUBPASS, /* for vulkan input attachments */ + GLSL_SAMPLER_DIM_SUBPASS_MS, /* for multisampled vulkan input attachments */ }; enum glsl_interface_packing { @@ -119,7 +129,7 @@ GLenum gl_type; glsl_base_type base_type; - unsigned sampler_dimensionality:3; /**< \see glsl_sampler_dim */ + unsigned sampler_dimensionality:4; /**< \see glsl_sampler_dim */ unsigned sampler_shadow:1; unsigned sampler_array:1; unsigned sampled_type:2; /**< Type of data returned using this @@ -128,6 +138,7 @@ * and \c GLSL_TYPE_UINT are valid. */ unsigned interface_packing:2; + unsigned interface_row_major:1; /* Callers of this ralloc-based new need not call delete. It's * easier to just ralloc_free 'mem_ctx' (or any of its ancestors). */ @@ -273,6 +284,7 @@ static const glsl_type *get_interface_instance(const glsl_struct_field *fields, unsigned num_fields, enum glsl_interface_packing packing, + bool row_major, const char *block_name); /** @@ -462,14 +474,14 @@ } /** - * Query whether or not type is an integral type, or for struct and array - * types, contains an integral type. + * Query whether or not type is an integral type, or for struct, interface + * and array types, contains an integral type. */ bool contains_integer() const; /** - * Query whether or not type is a double type, or for struct and array - * types, contains a double type. + * Query whether or not type is a double type, or for struct, interface and + * array types, contains a double type. */ bool contains_double() const; @@ -490,11 +502,19 @@ } /** - * Query whether a double takes two slots. + * Query whether a 64-bit type takes two slots. */ - bool is_dual_slot_double() const + bool is_dual_slot() const { - return base_type == GLSL_TYPE_DOUBLE && vector_elements > 2; + return is_64bit() && vector_elements > 2; + } + + /** + * Query whether or not a type is 64-bit + */ + bool is_64bit() const + { + return glsl_base_type_is_64bit(base_type); } /** @@ -514,8 +534,8 @@ } /** - * Query whether or not type is a sampler, or for struct and array - * types, contains a sampler. + * Query whether or not type is a sampler, or for struct, interface and + * array types, contains a sampler. */ bool contains_sampler() const; @@ -525,8 +545,8 @@ gl_texture_index sampler_index() const; /** - * Query whether or not type is an image, or for struct and array - * types, contains an image. + * Query whether or not type is an image, or for struct, interface and + * array types, contains an image. */ bool contains_image() const; @@ -732,7 +752,7 @@ * * Note that this is often different than actual coordinate type used in * a texturing built-in function, since those pack additional values (such - * as the shadow comparitor or projector) into the coordinate type. + * as the shadow comparator or projector) into the coordinate type. */ int coordinate_components() const; @@ -745,6 +765,22 @@ */ bool record_compare(const glsl_type *b, bool match_locations = true) const; + /** + * Get the type interface packing. + */ + enum glsl_interface_packing get_interface_packing() const + { + return (enum glsl_interface_packing)interface_packing; + } + + /** + * Check if the type interface is row major + */ + bool get_interface_row_major() const + { + return (bool) interface_row_major; + } + private: static mtx_t mutex; @@ -774,7 +810,8 @@ /** Constructor for interface types */ glsl_type(const glsl_struct_field *fields, unsigned num_fields, - enum glsl_interface_packing packing, const char *name); + enum glsl_interface_packing packing, + bool row_major, const char *name); /** Constructor for interface types */ glsl_type(const glsl_type *return_type, @@ -919,10 +956,12 @@ unsigned implicit_sized_array:1; #ifdef __cplusplus glsl_struct_field(const struct glsl_type *_type, const char *_name) - : type(_type), name(_name), location(-1), interpolation(0), centroid(0), + : type(_type), name(_name), location(-1), offset(0), xfb_buffer(0), + xfb_stride(0), interpolation(0), centroid(0), sample(0), matrix_layout(GLSL_MATRIX_LAYOUT_INHERITED), patch(0), precision(GLSL_PRECISION_NONE), image_read_only(0), image_write_only(0), - image_coherent(0), image_volatile(0), image_restrict(0) + image_coherent(0), image_volatile(0), image_restrict(0), + explicit_xfb_buffer(0), implicit_sized_array(0) { /* empty */ } diff -Nru mesa-12.0.6/src/compiler/Makefile.am mesa-17.0.7/src/compiler/Makefile.am --- mesa-12.0.6/src/compiler/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -57,6 +57,7 @@ EXTRA_DIST = SConscript MKDIR_GEN = $(AM_V_at)$(MKDIR_P) $(@D) +PYTHON_GEN = $(AM_V_GEN)$(PYTHON2) $(PYTHON_FLAGS) include Makefile.glsl.am diff -Nru mesa-12.0.6/src/compiler/Makefile.glsl.am mesa-17.0.7/src/compiler/Makefile.glsl.am --- mesa-12.0.6/src/compiler/Makefile.glsl.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/Makefile.glsl.am 2017-06-01 10:37:10.000000000 +0000 @@ -25,6 +25,7 @@ glsl/TODO glsl/glcpp/README \ glsl/glsl_lexer.ll \ glsl/glsl_parser.yy \ + glsl/ir_expression_operation.py \ glsl/glcpp/glcpp-lex.l \ glsl/glcpp/glcpp-parse.y \ SConscript.glsl @@ -32,6 +33,7 @@ TESTS += glsl/glcpp/tests/glcpp-test \ glsl/glcpp/tests/glcpp-test-cr-lf \ glsl/tests/blob-test \ + glsl/tests/cache-test \ glsl/tests/general-ir-test \ glsl/tests/optimization-test \ glsl/tests/sampler-types-test \ @@ -46,6 +48,7 @@ glsl/glcpp/glcpp \ glsl/glsl_test \ glsl/tests/blob-test \ + glsl/tests/cache-test \ glsl/tests/general-ir-test \ glsl/tests/sampler-types-test \ glsl/tests/uniform-initializer-test @@ -57,10 +60,20 @@ glsl_tests_blob_test_LDADD = \ glsl/libglsl.la +glsl_tests_cache_test_SOURCES = \ + glsl/tests/cache_test.c +glsl_tests_cache_test_CFLAGS = \ + $(PTHREAD_CFLAGS) +glsl_tests_cache_test_LDADD = \ + glsl/libglsl.la \ + $(PTHREAD_LIBS) + glsl_tests_general_ir_test_SOURCES = \ + glsl/tests/array_refcount_test.cpp \ glsl/tests/builtin_variable_test.cpp \ glsl/tests/invalidate_locations_test.cpp \ glsl/tests/general_ir_test.cpp \ + glsl/tests/opt_add_neg_to_sub_test.cpp \ glsl/tests/varyings_test.cpp glsl_tests_general_ir_test_CFLAGS = \ $(PTHREAD_CFLAGS) @@ -116,12 +129,9 @@ glsl/libglcpp.la glsl_libglsl_la_SOURCES = \ - glsl/glsl_lexer.cpp \ - glsl/glsl_parser.cpp \ - glsl/glsl_parser.h \ + $(LIBGLSL_GENERATED_FILES) \ $(LIBGLSL_FILES) - glsl_libstandalone_la_SOURCES = \ $(GLSL_COMPILER_CXX_FILES) @@ -197,6 +207,18 @@ $(MKDIR_GEN) $(LEX_GEN) -o $@ $(srcdir)/glsl/glcpp/glcpp-lex.l +glsl/ir_expression_operation.h: glsl/ir_expression_operation.py + $(MKDIR_GEN) + $(PYTHON_GEN) $(srcdir)/glsl/ir_expression_operation.py enum > $@ || ($(RM) $@; false) + +glsl/ir_expression_operation_constant.h: glsl/ir_expression_operation.py + $(MKDIR_GEN) + $(PYTHON_GEN) $(srcdir)/glsl/ir_expression_operation.py constant > $@ || ($(RM) $@; false) + +glsl/ir_expression_operation_strings.h: glsl/ir_expression_operation.py + $(MKDIR_GEN) + $(PYTHON_GEN) $(srcdir)/glsl/ir_expression_operation.py strings > $@ || ($(RM) $@; false) + # Only the parsers (specifically the header files generated at the same time) # need to be in BUILT_SOURCES. Though if we list the parser headers YACC is # called for the .c/.cpp file and the .h files. By listing the .c/.cpp files @@ -206,6 +228,9 @@ BUILT_SOURCES += \ glsl/glsl_parser.cpp \ glsl/glsl_lexer.cpp \ + glsl/ir_expression_operation.h \ + glsl/ir_expression_operation_constant.h \ + glsl/ir_expression_operation_strings.h \ glsl/glcpp/glcpp-parse.c \ glsl/glcpp/glcpp-lex.c CLEANFILES += \ @@ -213,6 +238,9 @@ glsl/glsl_parser.h \ glsl/glsl_parser.cpp \ glsl/glsl_lexer.cpp \ + glsl/ir_expression_operation.h \ + glsl/ir_expression_operation_constant.h \ + glsl/ir_expression_operation_strings.h \ glsl/glcpp/glcpp-parse.c \ glsl/glcpp/glcpp-lex.c diff -Nru mesa-12.0.6/src/compiler/Makefile.in mesa-17.0.7/src/compiler/Makefile.in --- mesa-12.0.6/src/compiler/Makefile.in 2017-01-24 01:41:45.000000000 +0000 +++ mesa-17.0.7/src/compiler/Makefile.in 2017-06-01 10:37:19.000000000 +0000 @@ -160,19 +160,19 @@ host_triplet = @host@ target_triplet = @target@ check_PROGRAMS = glsl/glcpp/glcpp$(EXEEXT) glsl/glsl_test$(EXEEXT) \ - glsl/tests/blob-test$(EXEEXT) \ + glsl/tests/blob-test$(EXEEXT) glsl/tests/cache-test$(EXEEXT) \ glsl/tests/general-ir-test$(EXEEXT) \ glsl/tests/sampler-types-test$(EXEEXT) \ glsl/tests/uniform-initializer-test$(EXEEXT) \ nir/tests/control_flow_tests$(EXEEXT) TESTS = glsl/glcpp/tests/glcpp-test glsl/glcpp/tests/glcpp-test-cr-lf \ - glsl/tests/blob-test$(EXEEXT) \ + glsl/tests/blob-test$(EXEEXT) glsl/tests/cache-test$(EXEEXT) \ glsl/tests/general-ir-test$(EXEEXT) \ glsl/tests/optimization-test \ glsl/tests/sampler-types-test$(EXEEXT) \ glsl/tests/uniform-initializer-test$(EXEEXT) \ glsl/tests/warnings-test nir/tests/control_flow_tests$(EXEEXT) -noinst_PROGRAMS = glsl_compiler$(EXEEXT) +noinst_PROGRAMS = glsl_compiler$(EXEEXT) spirv2nir$(EXEEXT) subdir = src/compiler ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps = $(top_srcdir)/m4/ax_check_gnu_make.m4 \ @@ -204,29 +204,30 @@ am__v_lt_0 = --silent am__v_lt_1 = glsl_libglsl_la_DEPENDENCIES = nir/libnir.la glsl/libglcpp.la -am__objects_2 = glsl/ast_array_index.lo glsl/ast_expr.lo \ +am__objects_2 = glsl/glsl_lexer.lo glsl/glsl_parser.lo +am__objects_3 = glsl/ast_array_index.lo glsl/ast_expr.lo \ glsl/ast_function.lo glsl/ast_to_hir.lo glsl/ast_type.lo \ glsl/blob.lo glsl/builtin_functions.lo glsl/builtin_types.lo \ glsl/builtin_variables.lo glsl/glsl_parser_extras.lo \ glsl/glsl_symbol_table.lo glsl/glsl_to_nir.lo \ - glsl/hir_field_selection.lo glsl/ir_basic_block.lo \ - glsl/ir_builder.lo glsl/ir_clone.lo \ + glsl/hir_field_selection.lo glsl/ir_array_refcount.lo \ + glsl/ir_basic_block.lo glsl/ir_builder.lo glsl/ir_clone.lo \ glsl/ir_constant_expression.lo glsl/ir.lo glsl/ir_equals.lo \ glsl/ir_expression_flattening.lo \ glsl/ir_function_can_inline.lo \ glsl/ir_function_detect_recursion.lo glsl/ir_function.lo \ glsl/ir_hierarchical_visitor.lo glsl/ir_hv_accept.lo \ - glsl/ir_import_prototypes.lo glsl/ir_print_visitor.lo \ - glsl/ir_reader.lo glsl/ir_rvalue_visitor.lo \ - glsl/ir_set_program_inouts.lo glsl/ir_validate.lo \ - glsl/ir_variable_refcount.lo glsl/linker.lo \ - glsl/link_atomics.lo glsl/link_functions.lo \ + glsl/ir_print_visitor.lo glsl/ir_reader.lo \ + glsl/ir_rvalue_visitor.lo glsl/ir_set_program_inouts.lo \ + glsl/ir_validate.lo glsl/ir_variable_refcount.lo \ + glsl/linker.lo glsl/link_atomics.lo glsl/link_functions.lo \ glsl/link_interface_blocks.lo glsl/link_uniforms.lo \ glsl/link_uniform_initializers.lo \ glsl/link_uniform_block_active_visitor.lo \ glsl/link_uniform_blocks.lo glsl/link_varyings.lo \ glsl/loop_analysis.lo glsl/loop_controls.lo \ - glsl/loop_unroll.lo glsl/lower_buffer_access.lo \ + glsl/loop_unroll.lo glsl/lower_blend_equation_advanced.lo \ + glsl/lower_buffer_access.lo \ glsl/lower_const_arrays_to_uniforms.lo glsl/lower_discard.lo \ glsl/lower_discard_flow.lo glsl/lower_distance.lo \ glsl/lower_if_to_cond_assign.lo glsl/lower_instructions.lo \ @@ -257,61 +258,71 @@ glsl/opt_structure_splitting.lo glsl/opt_swizzle_swizzle.lo \ glsl/opt_tree_grafting.lo glsl/opt_vectorize.lo \ glsl/propagate_invariance.lo glsl/s_expression.lo -am_glsl_libglsl_la_OBJECTS = glsl/glsl_lexer.lo glsl/glsl_parser.lo \ - $(am__objects_2) +am_glsl_libglsl_la_OBJECTS = $(am__objects_2) $(am__objects_3) glsl_libglsl_la_OBJECTS = $(am_glsl_libglsl_la_OBJECTS) am__DEPENDENCIES_1 = glsl_libstandalone_la_DEPENDENCIES = glsl/libglsl.la \ $(top_builddir)/src/libglsl_util.la \ $(top_builddir)/src/util/libmesautil.la $(am__DEPENDENCIES_1) -am__objects_3 = glsl/standalone_scaffolding.lo glsl/standalone.lo -am_glsl_libstandalone_la_OBJECTS = $(am__objects_3) +am__objects_4 = glsl/ir_builder_print_visitor.lo \ + glsl/standalone_scaffolding.lo glsl/standalone.lo +am_glsl_libstandalone_la_OBJECTS = $(am__objects_4) glsl_libstandalone_la_OBJECTS = $(am_glsl_libstandalone_la_OBJECTS) libcompiler_la_LIBADD = -am__objects_4 = glsl_types.lo nir_types.lo shader_enums.lo -am_libcompiler_la_OBJECTS = $(am__objects_4) +am__objects_5 = glsl_types.lo nir_types.lo shader_enums.lo +am_libcompiler_la_OBJECTS = $(am__objects_5) libcompiler_la_OBJECTS = $(am_libcompiler_la_OBJECTS) nir_libnir_la_DEPENDENCIES = libcompiler.la -am__objects_5 = nir/nir.lo nir/nir_clone.lo nir/nir_control_flow.lo \ +am__objects_6 = nir/nir.lo nir/nir_clone.lo nir/nir_control_flow.lo \ nir/nir_dominance.lo nir/nir_from_ssa.lo \ nir/nir_gather_info.lo nir/nir_gs_count_vertices.lo \ nir/nir_inline_functions.lo nir/nir_instr_set.lo \ nir/nir_intrinsics.lo nir/nir_liveness.lo \ - nir/nir_lower_alu_to_scalar.lo nir/nir_lower_atomics.lo \ - nir/nir_lower_bitmap.lo nir/nir_lower_clamp_color_outputs.lo \ - nir/nir_lower_clip.lo nir/nir_lower_double_ops.lo \ - nir/nir_lower_double_packing.lo nir/nir_lower_drawpixels.lo \ + nir/nir_loop_analyze.lo nir/nir_lower_alu_to_scalar.lo \ + nir/nir_lower_atomics.lo nir/nir_lower_bitmap.lo \ + nir/nir_lower_clamp_color_outputs.lo nir/nir_lower_clip.lo \ + nir/nir_lower_clip_cull_distance_arrays.lo \ + nir/nir_lower_constant_initializers.lo \ + nir/nir_lower_double_ops.lo nir/nir_lower_double_packing.lo \ + nir/nir_lower_drawpixels.lo \ nir/nir_lower_global_vars_to_local.lo \ nir/nir_lower_gs_intrinsics.lo \ nir/nir_lower_load_const_to_scalar.lo \ nir/nir_lower_locals_to_regs.lo nir/nir_lower_idiv.lo \ nir/nir_lower_indirect_derefs.lo nir/nir_lower_io.lo \ - nir/nir_lower_io_to_temporaries.lo nir/nir_lower_io_types.lo \ + nir/nir_lower_io_to_temporaries.lo \ + nir/nir_lower_io_to_scalar.lo nir/nir_lower_io_types.lo \ nir/nir_lower_passthrough_edgeflags.lo \ - nir/nir_lower_phis_to_scalar.lo nir/nir_lower_returns.lo \ - nir/nir_lower_samplers.lo nir/nir_lower_system_values.lo \ - nir/nir_lower_tex.lo nir/nir_lower_to_source_mods.lo \ + nir/nir_lower_patch_vertices.lo \ + nir/nir_lower_phis_to_scalar.lo nir/nir_lower_regs_to_ssa.lo \ + nir/nir_lower_returns.lo nir/nir_lower_samplers.lo \ + nir/nir_lower_system_values.lo nir/nir_lower_tex.lo \ + nir/nir_lower_to_source_mods.lo \ nir/nir_lower_two_sided_color.lo nir/nir_lower_vars_to_ssa.lo \ nir/nir_lower_var_copies.lo nir/nir_lower_vec_to_movs.lo \ nir/nir_lower_wpos_center.lo nir/nir_lower_wpos_ytransform.lo \ nir/nir_metadata.lo nir/nir_move_vec_src_uses_to_dest.lo \ nir/nir_normalize_cubemap_coords.lo \ - nir/nir_opt_constant_folding.lo nir/nir_opt_copy_propagate.lo \ - nir/nir_opt_cse.lo nir/nir_opt_dce.lo nir/nir_opt_dead_cf.lo \ - nir/nir_opt_gcm.lo nir/nir_opt_global_to_local.lo \ + nir/nir_opt_conditional_discard.lo \ + nir/nir_opt_constant_folding.lo nir/nir_opt_copy_prop_vars.lo \ + nir/nir_opt_copy_propagate.lo nir/nir_opt_cse.lo \ + nir/nir_opt_dce.lo nir/nir_opt_dead_cf.lo nir/nir_opt_gcm.lo \ + nir/nir_opt_global_to_local.lo nir/nir_opt_if.lo \ + nir/nir_opt_loop_unroll.lo nir/nir_opt_move_comparisons.lo \ nir/nir_opt_peephole_select.lo nir/nir_opt_remove_phis.lo \ - nir/nir_opt_undef.lo nir/nir_phi_builder.lo nir/nir_print.lo \ + nir/nir_opt_trivial_continues.lo nir/nir_opt_undef.lo \ + nir/nir_phi_builder.lo nir/nir_print.lo \ nir/nir_propagate_invariant.lo \ nir/nir_remove_dead_variables.lo nir/nir_repair_ssa.lo \ nir/nir_search.lo nir/nir_split_var_copies.lo nir/nir_sweep.lo \ - nir/nir_to_ssa.lo nir/nir_validate.lo nir/nir_worklist.lo -am__objects_6 = spirv/spirv_info.lo spirv/spirv_to_nir.lo \ + nir/nir_to_lcssa.lo nir/nir_validate.lo nir/nir_worklist.lo +am__objects_7 = spirv/spirv_info.lo spirv/spirv_to_nir.lo \ spirv/vtn_alu.lo spirv/vtn_cfg.lo spirv/vtn_glsl450.lo \ spirv/vtn_variables.lo -am__objects_7 = nir/nir_constant_expressions.lo nir/nir_opcodes.lo \ +am__objects_8 = nir/nir_constant_expressions.lo nir/nir_opcodes.lo \ nir/nir_opt_algebraic.lo -am_nir_libnir_la_OBJECTS = $(am__objects_5) $(am__objects_6) \ - $(am__objects_7) +am_nir_libnir_la_OBJECTS = $(am__objects_6) $(am__objects_7) \ + $(am__objects_8) nir_libnir_la_OBJECTS = $(am_nir_libnir_la_OBJECTS) PROGRAMS = $(noinst_PROGRAMS) am_glsl_glcpp_glcpp_OBJECTS = glsl/glcpp/glcpp.$(OBJEXT) @@ -326,10 +337,21 @@ am_glsl_tests_blob_test_OBJECTS = glsl/tests/blob_test.$(OBJEXT) glsl_tests_blob_test_OBJECTS = $(am_glsl_tests_blob_test_OBJECTS) glsl_tests_blob_test_DEPENDENCIES = glsl/libglsl.la +am_glsl_tests_cache_test_OBJECTS = \ + glsl/tests/glsl_tests_cache_test-cache_test.$(OBJEXT) +glsl_tests_cache_test_OBJECTS = $(am_glsl_tests_cache_test_OBJECTS) +glsl_tests_cache_test_DEPENDENCIES = glsl/libglsl.la \ + $(am__DEPENDENCIES_1) +glsl_tests_cache_test_LINK = $(LIBTOOL) $(AM_V_lt) --tag=CC \ + $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=link $(CCLD) \ + $(glsl_tests_cache_test_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) \ + $(LDFLAGS) -o $@ am_glsl_tests_general_ir_test_OBJECTS = \ + glsl/tests/array_refcount_test.$(OBJEXT) \ glsl/tests/builtin_variable_test.$(OBJEXT) \ glsl/tests/invalidate_locations_test.$(OBJEXT) \ glsl/tests/general_ir_test.$(OBJEXT) \ + glsl/tests/opt_add_neg_to_sub_test.$(OBJEXT) \ glsl/tests/varyings_test.$(OBJEXT) glsl_tests_general_ir_test_OBJECTS = \ $(am_glsl_tests_general_ir_test_OBJECTS) @@ -362,6 +384,10 @@ nir_tests_control_flow_tests_DEPENDENCIES = \ $(top_builddir)/src/gtest/libgtest.la nir/libnir.la \ $(top_builddir)/src/util/libmesautil.la $(am__DEPENDENCIES_1) +am_spirv2nir_OBJECTS = spirv/spirv2nir-spirv2nir.$(OBJEXT) +spirv2nir_OBJECTS = $(am_spirv2nir_OBJECTS) +spirv2nir_DEPENDENCIES = nir/libnir.la \ + $(top_builddir)/src/util/libmesautil.la $(am__DEPENDENCIES_1) AM_V_P = $(am__v_P_@AM_V@) am__v_P_ = $(am__v_P_@AM_DEFAULT_V@) am__v_P_0 = false @@ -418,20 +444,23 @@ $(glsl_libstandalone_la_SOURCES) $(libcompiler_la_SOURCES) \ $(nir_libnir_la_SOURCES) $(glsl_glcpp_glcpp_SOURCES) \ $(glsl_glsl_test_SOURCES) $(glsl_tests_blob_test_SOURCES) \ + $(glsl_tests_cache_test_SOURCES) \ $(glsl_tests_general_ir_test_SOURCES) \ $(glsl_tests_sampler_types_test_SOURCES) \ $(glsl_tests_uniform_initializer_test_SOURCES) \ $(glsl_compiler_SOURCES) \ - $(nir_tests_control_flow_tests_SOURCES) + $(nir_tests_control_flow_tests_SOURCES) $(spirv2nir_SOURCES) \ + $(nodist_EXTRA_spirv2nir_SOURCES) DIST_SOURCES = $(glsl_libglcpp_la_SOURCES) $(glsl_libglsl_la_SOURCES) \ $(glsl_libstandalone_la_SOURCES) $(libcompiler_la_SOURCES) \ $(nir_libnir_la_SOURCES) $(glsl_glcpp_glcpp_SOURCES) \ $(glsl_glsl_test_SOURCES) $(glsl_tests_blob_test_SOURCES) \ + $(glsl_tests_cache_test_SOURCES) \ $(glsl_tests_general_ir_test_SOURCES) \ $(glsl_tests_sampler_types_test_SOURCES) \ $(glsl_tests_uniform_initializer_test_SOURCES) \ $(glsl_compiler_SOURCES) \ - $(nir_tests_control_flow_tests_SOURCES) + $(nir_tests_control_flow_tests_SOURCES) $(spirv2nir_SOURCES) am__can_run_installinfo = \ case $$AM_UPDATE_INFO_DIR in \ n|no|NO) false;; \ @@ -669,6 +698,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -683,6 +714,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -712,10 +744,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -765,11 +798,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -809,8 +839,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -847,8 +875,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -857,7 +883,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -865,13 +890,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -900,6 +926,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -969,7 +996,8 @@ nir_types.cpp \ nir_types.h \ shader_enums.c \ - shader_enums.h + shader_enums.h \ + shader_info.h # libglsl @@ -992,6 +1020,8 @@ glsl/glsl_to_nir.cpp \ glsl/glsl_to_nir.h \ glsl/hir_field_selection.cpp \ + glsl/ir_array_refcount.cpp \ + glsl/ir_array_refcount.h \ glsl/ir_basic_block.cpp \ glsl/ir_basic_block.h \ glsl/ir_builder.cpp \ @@ -1010,7 +1040,6 @@ glsl/ir_hierarchical_visitor.cpp \ glsl/ir_hierarchical_visitor.h \ glsl/ir_hv_accept.cpp \ - glsl/ir_import_prototypes.cpp \ glsl/ir_optimization.h \ glsl/ir_print_visitor.cpp \ glsl/ir_print_visitor.h \ @@ -1041,6 +1070,7 @@ glsl/loop_analysis.h \ glsl/loop_controls.cpp \ glsl/loop_unroll.cpp \ + glsl/lower_blend_equation_advanced.cpp \ glsl/lower_buffer_access.cpp \ glsl/lower_buffer_access.h \ glsl/lower_const_arrays_to_uniforms.cpp \ @@ -1102,6 +1132,9 @@ # glsl_compiler GLSL_COMPILER_CXX_FILES = \ + glsl/ir_builder_print_visitor.cpp \ + glsl/ir_builder_print_visitor.h \ + glsl/opt_add_neg_to_sub.h \ glsl/standalone_scaffolding.cpp \ glsl/standalone_scaffolding.h \ glsl/standalone.cpp \ @@ -1109,9 +1142,13 @@ # libglsl generated sources -LIBGLSL_GENERATED_CXX_FILES = \ +LIBGLSL_GENERATED_FILES = \ + glsl/ir_expression_operation.h \ + glsl/ir_expression_operation_constant.h \ + glsl/ir_expression_operation_strings.h \ glsl/glsl_lexer.cpp \ - glsl/glsl_parser.cpp + glsl/glsl_parser.cpp \ + glsl/glsl_parser.h # libglcpp @@ -1150,11 +1187,15 @@ nir/nir_intrinsics.c \ nir/nir_intrinsics.h \ nir/nir_liveness.c \ + nir/nir_loop_analyze.c \ + nir/nir_loop_analyze.h \ nir/nir_lower_alu_to_scalar.c \ nir/nir_lower_atomics.c \ nir/nir_lower_bitmap.c \ nir/nir_lower_clamp_color_outputs.c \ nir/nir_lower_clip.c \ + nir/nir_lower_clip_cull_distance_arrays.c \ + nir/nir_lower_constant_initializers.c \ nir/nir_lower_double_ops.c \ nir/nir_lower_double_packing.c \ nir/nir_lower_drawpixels.c \ @@ -1166,9 +1207,12 @@ nir/nir_lower_indirect_derefs.c \ nir/nir_lower_io.c \ nir/nir_lower_io_to_temporaries.c \ + nir/nir_lower_io_to_scalar.c \ nir/nir_lower_io_types.c \ nir/nir_lower_passthrough_edgeflags.c \ + nir/nir_lower_patch_vertices.c \ nir/nir_lower_phis_to_scalar.c \ + nir/nir_lower_regs_to_ssa.c \ nir/nir_lower_returns.c \ nir/nir_lower_samplers.c \ nir/nir_lower_system_values.c \ @@ -1183,15 +1227,21 @@ nir/nir_metadata.c \ nir/nir_move_vec_src_uses_to_dest.c \ nir/nir_normalize_cubemap_coords.c \ + nir/nir_opt_conditional_discard.c \ nir/nir_opt_constant_folding.c \ + nir/nir_opt_copy_prop_vars.c \ nir/nir_opt_copy_propagate.c \ nir/nir_opt_cse.c \ nir/nir_opt_dce.c \ nir/nir_opt_dead_cf.c \ nir/nir_opt_gcm.c \ nir/nir_opt_global_to_local.c \ + nir/nir_opt_if.c \ + nir/nir_opt_loop_unroll.c \ + nir/nir_opt_move_comparisons.c \ nir/nir_opt_peephole_select.c \ nir/nir_opt_remove_phis.c \ + nir/nir_opt_trivial_continues.c \ nir/nir_opt_undef.c \ nir/nir_phi_builder.c \ nir/nir_phi_builder.h \ @@ -1201,9 +1251,10 @@ nir/nir_repair_ssa.c \ nir/nir_search.c \ nir/nir_search.h \ + nir/nir_search_helpers.h \ nir/nir_split_var_copies.c \ nir/nir_sweep.c \ - nir/nir_to_ssa.c \ + nir/nir_to_lcssa.c \ nir/nir_validate.c \ nir/nir_vla.h \ nir/nir_worklist.c \ @@ -1256,20 +1307,28 @@ # will be created at the appropriate times according to standard automake # dependency rules. BUILT_SOURCES = glsl/glsl_parser.cpp glsl/glsl_lexer.cpp \ + glsl/ir_expression_operation.h \ + glsl/ir_expression_operation_constant.h \ + glsl/ir_expression_operation_strings.h \ glsl/glcpp/glcpp-parse.c glsl/glcpp/glcpp-lex.c \ $(NIR_GENERATED_FILES) CLEANFILES = glsl/glcpp/glcpp-parse.h glsl/glsl_parser.h \ glsl/glsl_parser.cpp glsl/glsl_lexer.cpp \ + glsl/ir_expression_operation.h \ + glsl/ir_expression_operation_constant.h \ + glsl/ir_expression_operation_strings.h \ glsl/glcpp/glcpp-parse.c glsl/glcpp/glcpp-lex.c \ $(NIR_GENERATED_FILES) EXTRA_DIST = SConscript glsl/tests glsl/glcpp/tests glsl/README \ glsl/TODO glsl/glcpp/README glsl/glsl_lexer.ll \ - glsl/glsl_parser.yy glsl/glcpp/glcpp-lex.l \ - glsl/glcpp/glcpp-parse.y SConscript.glsl nir/nir_algebraic.py \ + glsl/glsl_parser.yy glsl/ir_expression_operation.py \ + glsl/glcpp/glcpp-lex.l glsl/glcpp/glcpp-parse.y \ + SConscript.glsl nir/nir_algebraic.py \ nir/nir_builder_opcodes_h.py nir/nir_constant_expressions.py \ nir/nir_opcodes.py nir/nir_opcodes_c.py nir/nir_opcodes_h.py \ nir/nir_opt_algebraic.py nir/tests SConscript.nir MKDIR_GEN = $(AM_V_at)$(MKDIR_P) $(@D) +PYTHON_GEN = $(AM_V_GEN)$(PYTHON2) $(PYTHON_FLAGS) TESTS_ENVIRONMENT = \ export PYTHON2=$(PYTHON2); \ export PYTHON_FLAGS=$(PYTHON_FLAGS); @@ -1280,10 +1339,22 @@ glsl_tests_blob_test_LDADD = \ glsl/libglsl.la +glsl_tests_cache_test_SOURCES = \ + glsl/tests/cache_test.c + +glsl_tests_cache_test_CFLAGS = \ + $(PTHREAD_CFLAGS) + +glsl_tests_cache_test_LDADD = \ + glsl/libglsl.la \ + $(PTHREAD_LIBS) + glsl_tests_general_ir_test_SOURCES = \ + glsl/tests/array_refcount_test.cpp \ glsl/tests/builtin_variable_test.cpp \ glsl/tests/invalidate_locations_test.cpp \ glsl/tests/general_ir_test.cpp \ + glsl/tests/opt_add_neg_to_sub_test.cpp \ glsl/tests/varyings_test.cpp glsl_tests_general_ir_test_CFLAGS = \ @@ -1345,9 +1416,7 @@ glsl/libglcpp.la glsl_libglsl_la_SOURCES = \ - glsl/glsl_lexer.cpp \ - glsl/glsl_parser.cpp \ - glsl/glsl_parser.h \ + $(LIBGLSL_GENERATED_FILES) \ $(LIBGLSL_FILES) glsl_libstandalone_la_SOURCES = \ @@ -1414,7 +1483,22 @@ $(SPIRV_FILES) \ $(NIR_GENERATED_FILES) -PYTHON_GEN = $(AM_V_GEN)$(PYTHON2) $(PYTHON_FLAGS) +spirv2nir_SOURCES = \ + spirv/spirv2nir.c + +spirv2nir_CPPFLAGS = \ + $(AM_CPPFLAGS) \ + -I$(top_builddir)/src/compiler/nir \ + -I$(top_srcdir)/src/compiler/nir \ + -I$(top_srcdir)/src/compiler/spirv + +spirv2nir_LDADD = \ + nir/libnir.la \ + $(top_builddir)/src/util/libmesautil.la \ + -lm \ + $(PTHREAD_LIBS) + +nodist_EXTRA_spirv2nir_SOURCES = dummy.cpp nir_tests_control_flow_tests_CPPFLAGS = \ $(AM_CPPFLAGS) \ -I$(top_builddir)/src/compiler/nir \ @@ -1526,6 +1610,8 @@ glsl/$(DEPDIR)/$(am__dirstamp) glsl/hir_field_selection.lo: glsl/$(am__dirstamp) \ glsl/$(DEPDIR)/$(am__dirstamp) +glsl/ir_array_refcount.lo: glsl/$(am__dirstamp) \ + glsl/$(DEPDIR)/$(am__dirstamp) glsl/ir_basic_block.lo: glsl/$(am__dirstamp) \ glsl/$(DEPDIR)/$(am__dirstamp) glsl/ir_builder.lo: glsl/$(am__dirstamp) \ @@ -1547,8 +1633,6 @@ glsl/$(DEPDIR)/$(am__dirstamp) glsl/ir_hv_accept.lo: glsl/$(am__dirstamp) \ glsl/$(DEPDIR)/$(am__dirstamp) -glsl/ir_import_prototypes.lo: glsl/$(am__dirstamp) \ - glsl/$(DEPDIR)/$(am__dirstamp) glsl/ir_print_visitor.lo: glsl/$(am__dirstamp) \ glsl/$(DEPDIR)/$(am__dirstamp) glsl/ir_reader.lo: glsl/$(am__dirstamp) glsl/$(DEPDIR)/$(am__dirstamp) @@ -1583,6 +1667,8 @@ glsl/$(DEPDIR)/$(am__dirstamp) glsl/loop_unroll.lo: glsl/$(am__dirstamp) \ glsl/$(DEPDIR)/$(am__dirstamp) +glsl/lower_blend_equation_advanced.lo: glsl/$(am__dirstamp) \ + glsl/$(DEPDIR)/$(am__dirstamp) glsl/lower_buffer_access.lo: glsl/$(am__dirstamp) \ glsl/$(DEPDIR)/$(am__dirstamp) glsl/lower_const_arrays_to_uniforms.lo: glsl/$(am__dirstamp) \ @@ -1694,6 +1780,8 @@ glsl/libglsl.la: $(glsl_libglsl_la_OBJECTS) $(glsl_libglsl_la_DEPENDENCIES) $(EXTRA_glsl_libglsl_la_DEPENDENCIES) glsl/$(am__dirstamp) $(AM_V_CXXLD)$(CXXLINK) $(glsl_libglsl_la_OBJECTS) $(glsl_libglsl_la_LIBADD) $(LIBS) +glsl/ir_builder_print_visitor.lo: glsl/$(am__dirstamp) \ + glsl/$(DEPDIR)/$(am__dirstamp) glsl/standalone_scaffolding.lo: glsl/$(am__dirstamp) \ glsl/$(DEPDIR)/$(am__dirstamp) glsl/standalone.lo: glsl/$(am__dirstamp) \ @@ -1728,6 +1816,8 @@ nir/nir_intrinsics.lo: nir/$(am__dirstamp) \ nir/$(DEPDIR)/$(am__dirstamp) nir/nir_liveness.lo: nir/$(am__dirstamp) nir/$(DEPDIR)/$(am__dirstamp) +nir/nir_loop_analyze.lo: nir/$(am__dirstamp) \ + nir/$(DEPDIR)/$(am__dirstamp) nir/nir_lower_alu_to_scalar.lo: nir/$(am__dirstamp) \ nir/$(DEPDIR)/$(am__dirstamp) nir/nir_lower_atomics.lo: nir/$(am__dirstamp) \ @@ -1738,6 +1828,10 @@ nir/$(DEPDIR)/$(am__dirstamp) nir/nir_lower_clip.lo: nir/$(am__dirstamp) \ nir/$(DEPDIR)/$(am__dirstamp) +nir/nir_lower_clip_cull_distance_arrays.lo: nir/$(am__dirstamp) \ + nir/$(DEPDIR)/$(am__dirstamp) +nir/nir_lower_constant_initializers.lo: nir/$(am__dirstamp) \ + nir/$(DEPDIR)/$(am__dirstamp) nir/nir_lower_double_ops.lo: nir/$(am__dirstamp) \ nir/$(DEPDIR)/$(am__dirstamp) nir/nir_lower_double_packing.lo: nir/$(am__dirstamp) \ @@ -1759,12 +1853,18 @@ nir/nir_lower_io.lo: nir/$(am__dirstamp) nir/$(DEPDIR)/$(am__dirstamp) nir/nir_lower_io_to_temporaries.lo: nir/$(am__dirstamp) \ nir/$(DEPDIR)/$(am__dirstamp) +nir/nir_lower_io_to_scalar.lo: nir/$(am__dirstamp) \ + nir/$(DEPDIR)/$(am__dirstamp) nir/nir_lower_io_types.lo: nir/$(am__dirstamp) \ nir/$(DEPDIR)/$(am__dirstamp) nir/nir_lower_passthrough_edgeflags.lo: nir/$(am__dirstamp) \ nir/$(DEPDIR)/$(am__dirstamp) +nir/nir_lower_patch_vertices.lo: nir/$(am__dirstamp) \ + nir/$(DEPDIR)/$(am__dirstamp) nir/nir_lower_phis_to_scalar.lo: nir/$(am__dirstamp) \ nir/$(DEPDIR)/$(am__dirstamp) +nir/nir_lower_regs_to_ssa.lo: nir/$(am__dirstamp) \ + nir/$(DEPDIR)/$(am__dirstamp) nir/nir_lower_returns.lo: nir/$(am__dirstamp) \ nir/$(DEPDIR)/$(am__dirstamp) nir/nir_lower_samplers.lo: nir/$(am__dirstamp) \ @@ -1792,8 +1892,12 @@ nir/$(DEPDIR)/$(am__dirstamp) nir/nir_normalize_cubemap_coords.lo: nir/$(am__dirstamp) \ nir/$(DEPDIR)/$(am__dirstamp) +nir/nir_opt_conditional_discard.lo: nir/$(am__dirstamp) \ + nir/$(DEPDIR)/$(am__dirstamp) nir/nir_opt_constant_folding.lo: nir/$(am__dirstamp) \ nir/$(DEPDIR)/$(am__dirstamp) +nir/nir_opt_copy_prop_vars.lo: nir/$(am__dirstamp) \ + nir/$(DEPDIR)/$(am__dirstamp) nir/nir_opt_copy_propagate.lo: nir/$(am__dirstamp) \ nir/$(DEPDIR)/$(am__dirstamp) nir/nir_opt_cse.lo: nir/$(am__dirstamp) nir/$(DEPDIR)/$(am__dirstamp) @@ -1803,10 +1907,17 @@ nir/nir_opt_gcm.lo: nir/$(am__dirstamp) nir/$(DEPDIR)/$(am__dirstamp) nir/nir_opt_global_to_local.lo: nir/$(am__dirstamp) \ nir/$(DEPDIR)/$(am__dirstamp) +nir/nir_opt_if.lo: nir/$(am__dirstamp) nir/$(DEPDIR)/$(am__dirstamp) +nir/nir_opt_loop_unroll.lo: nir/$(am__dirstamp) \ + nir/$(DEPDIR)/$(am__dirstamp) +nir/nir_opt_move_comparisons.lo: nir/$(am__dirstamp) \ + nir/$(DEPDIR)/$(am__dirstamp) nir/nir_opt_peephole_select.lo: nir/$(am__dirstamp) \ nir/$(DEPDIR)/$(am__dirstamp) nir/nir_opt_remove_phis.lo: nir/$(am__dirstamp) \ nir/$(DEPDIR)/$(am__dirstamp) +nir/nir_opt_trivial_continues.lo: nir/$(am__dirstamp) \ + nir/$(DEPDIR)/$(am__dirstamp) nir/nir_opt_undef.lo: nir/$(am__dirstamp) \ nir/$(DEPDIR)/$(am__dirstamp) nir/nir_phi_builder.lo: nir/$(am__dirstamp) \ @@ -1822,7 +1933,7 @@ nir/nir_split_var_copies.lo: nir/$(am__dirstamp) \ nir/$(DEPDIR)/$(am__dirstamp) nir/nir_sweep.lo: nir/$(am__dirstamp) nir/$(DEPDIR)/$(am__dirstamp) -nir/nir_to_ssa.lo: nir/$(am__dirstamp) nir/$(DEPDIR)/$(am__dirstamp) +nir/nir_to_lcssa.lo: nir/$(am__dirstamp) nir/$(DEPDIR)/$(am__dirstamp) nir/nir_validate.lo: nir/$(am__dirstamp) nir/$(DEPDIR)/$(am__dirstamp) nir/nir_worklist.lo: nir/$(am__dirstamp) nir/$(DEPDIR)/$(am__dirstamp) spirv/$(am__dirstamp): @@ -1895,6 +2006,15 @@ glsl/tests/blob-test$(EXEEXT): $(glsl_tests_blob_test_OBJECTS) $(glsl_tests_blob_test_DEPENDENCIES) $(EXTRA_glsl_tests_blob_test_DEPENDENCIES) glsl/tests/$(am__dirstamp) @rm -f glsl/tests/blob-test$(EXEEXT) $(AM_V_CCLD)$(LINK) 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@AMDEPBACKSLASH@ +@am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(spirv2nir_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o spirv/spirv2nir-spirv2nir.obj `if test -f 'spirv/spirv2nir.c'; then $(CYGPATH_W) 'spirv/spirv2nir.c'; else $(CYGPATH_W) '$(srcdir)/spirv/spirv2nir.c'; fi` + .cpp.o: @am__fastdepCXX_TRUE@ $(AM_V_CXX)depbase=`echo $@ | sed 's|[^/]*$$|$(DEPDIR)/&|;s|\.o$$||'`;\ @am__fastdepCXX_TRUE@ $(CXXCOMPILE) -MT $@ -MD -MP -MF $$depbase.Tpo -c -o $@ $< &&\ @@ -2222,6 +2398,20 @@ @AMDEP_TRUE@@am__fastdepCXX_FALSE@ DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCXX_FALSE@ $(AM_V_CXX@am__nodep@)$(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(nir_tests_control_flow_tests_CPPFLAGS) $(CPPFLAGS) $(AM_CXXFLAGS) $(CXXFLAGS) -c -o nir/tests/nir_tests_control_flow_tests-control_flow_tests.obj `if test -f 'nir/tests/control_flow_tests.cpp'; then $(CYGPATH_W) 'nir/tests/control_flow_tests.cpp'; else $(CYGPATH_W) '$(srcdir)/nir/tests/control_flow_tests.cpp'; fi` +spirv2nir-dummy.o: dummy.cpp +@am__fastdepCXX_TRUE@ $(AM_V_CXX)$(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(spirv2nir_CPPFLAGS) $(CPPFLAGS) $(AM_CXXFLAGS) $(CXXFLAGS) -MT spirv2nir-dummy.o -MD -MP -MF $(DEPDIR)/spirv2nir-dummy.Tpo -c -o spirv2nir-dummy.o `test -f 'dummy.cpp' || echo '$(srcdir)/'`dummy.cpp +@am__fastdepCXX_TRUE@ $(AM_V_at)$(am__mv) $(DEPDIR)/spirv2nir-dummy.Tpo $(DEPDIR)/spirv2nir-dummy.Po +@AMDEP_TRUE@@am__fastdepCXX_FALSE@ $(AM_V_CXX)source='dummy.cpp' object='spirv2nir-dummy.o' libtool=no @AMDEPBACKSLASH@ +@AMDEP_TRUE@@am__fastdepCXX_FALSE@ DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCXX_FALSE@ $(AM_V_CXX@am__nodep@)$(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(spirv2nir_CPPFLAGS) $(CPPFLAGS) $(AM_CXXFLAGS) $(CXXFLAGS) -c -o spirv2nir-dummy.o `test -f 'dummy.cpp' || echo '$(srcdir)/'`dummy.cpp + +spirv2nir-dummy.obj: dummy.cpp +@am__fastdepCXX_TRUE@ $(AM_V_CXX)$(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(spirv2nir_CPPFLAGS) $(CPPFLAGS) $(AM_CXXFLAGS) $(CXXFLAGS) -MT spirv2nir-dummy.obj -MD -MP -MF $(DEPDIR)/spirv2nir-dummy.Tpo -c -o spirv2nir-dummy.obj `if test -f 'dummy.cpp'; then $(CYGPATH_W) 'dummy.cpp'; else $(CYGPATH_W) '$(srcdir)/dummy.cpp'; fi` +@am__fastdepCXX_TRUE@ $(AM_V_at)$(am__mv) $(DEPDIR)/spirv2nir-dummy.Tpo $(DEPDIR)/spirv2nir-dummy.Po +@AMDEP_TRUE@@am__fastdepCXX_FALSE@ $(AM_V_CXX)source='dummy.cpp' object='spirv2nir-dummy.obj' libtool=no @AMDEPBACKSLASH@ +@AMDEP_TRUE@@am__fastdepCXX_FALSE@ DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCXX_FALSE@ $(AM_V_CXX@am__nodep@)$(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(spirv2nir_CPPFLAGS) $(CPPFLAGS) $(AM_CXXFLAGS) $(CXXFLAGS) -c -o spirv2nir-dummy.obj `if test -f 'dummy.cpp'; then $(CYGPATH_W) 'dummy.cpp'; else $(CYGPATH_W) '$(srcdir)/dummy.cpp'; fi` + mostlyclean-libtool: -rm -f *.lo @@ -2448,6 +2638,13 @@ --log-file $$b.log --trs-file $$b.trs \ $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \ "$$tst" $(AM_TESTS_FD_REDIRECT) +glsl/tests/cache-test.log: glsl/tests/cache-test$(EXEEXT) + @p='glsl/tests/cache-test$(EXEEXT)'; \ + b='glsl/tests/cache-test'; \ + $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \ + --log-file $$b.log --trs-file $$b.trs \ + $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \ + "$$tst" $(AM_TESTS_FD_REDIRECT) glsl/tests/general-ir-test.log: glsl/tests/general-ir-test$(EXEEXT) @p='glsl/tests/general-ir-test$(EXEEXT)'; \ b='glsl/tests/general-ir-test'; \ @@ -2700,6 +2897,18 @@ $(MKDIR_GEN) $(LEX_GEN) -o $@ $(srcdir)/glsl/glcpp/glcpp-lex.l +glsl/ir_expression_operation.h: glsl/ir_expression_operation.py + $(MKDIR_GEN) + $(PYTHON_GEN) $(srcdir)/glsl/ir_expression_operation.py enum > $@ || ($(RM) $@; false) + +glsl/ir_expression_operation_constant.h: glsl/ir_expression_operation.py + $(MKDIR_GEN) + $(PYTHON_GEN) $(srcdir)/glsl/ir_expression_operation.py constant > $@ || ($(RM) $@; false) + +glsl/ir_expression_operation_strings.h: glsl/ir_expression_operation.py + $(MKDIR_GEN) + $(PYTHON_GEN) $(srcdir)/glsl/ir_expression_operation.py strings > $@ || ($(RM) $@; false) + clean-local: $(RM) -r subtest-cr subtest-cr-lf subtest-lf subtest-lf-cr diff -Nru mesa-12.0.6/src/compiler/Makefile.nir.am mesa-17.0.7/src/compiler/Makefile.nir.am --- mesa-12.0.6/src/compiler/Makefile.nir.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/Makefile.nir.am 2017-06-01 10:37:10.000000000 +0000 @@ -31,8 +31,6 @@ $(SPIRV_FILES) \ $(NIR_GENERATED_FILES) -PYTHON_GEN = $(AM_V_GEN)$(PYTHON2) $(PYTHON_FLAGS) - nir/nir_builder_opcodes.h: nir/nir_opcodes.py nir/nir_builder_opcodes_h.py $(MKDIR_GEN) $(PYTHON_GEN) $(srcdir)/nir/nir_builder_opcodes_h.py > $@ || ($(RM) $@; false) @@ -53,6 +51,24 @@ $(MKDIR_GEN) $(PYTHON_GEN) $(srcdir)/nir/nir_opt_algebraic.py > $@ || ($(RM) $@; false) +noinst_PROGRAMS += spirv2nir + +spirv2nir_SOURCES = \ + spirv/spirv2nir.c + +spirv2nir_CPPFLAGS = \ + $(AM_CPPFLAGS) \ + -I$(top_builddir)/src/compiler/nir \ + -I$(top_srcdir)/src/compiler/nir \ + -I$(top_srcdir)/src/compiler/spirv + +spirv2nir_LDADD = \ + nir/libnir.la \ + $(top_builddir)/src/util/libmesautil.la \ + -lm \ + $(PTHREAD_LIBS) + +nodist_EXTRA_spirv2nir_SOURCES = dummy.cpp check_PROGRAMS += nir/tests/control_flow_tests diff -Nru mesa-12.0.6/src/compiler/Makefile.sources mesa-17.0.7/src/compiler/Makefile.sources --- mesa-12.0.6/src/compiler/Makefile.sources 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/Makefile.sources 2017-06-01 10:37:10.000000000 +0000 @@ -5,7 +5,8 @@ nir_types.cpp \ nir_types.h \ shader_enums.c \ - shader_enums.h + shader_enums.h \ + shader_info.h # libglsl @@ -28,6 +29,8 @@ glsl/glsl_to_nir.cpp \ glsl/glsl_to_nir.h \ glsl/hir_field_selection.cpp \ + glsl/ir_array_refcount.cpp \ + glsl/ir_array_refcount.h \ glsl/ir_basic_block.cpp \ glsl/ir_basic_block.h \ glsl/ir_builder.cpp \ @@ -46,7 +49,6 @@ glsl/ir_hierarchical_visitor.cpp \ glsl/ir_hierarchical_visitor.h \ glsl/ir_hv_accept.cpp \ - glsl/ir_import_prototypes.cpp \ glsl/ir_optimization.h \ glsl/ir_print_visitor.cpp \ glsl/ir_print_visitor.h \ @@ -77,6 +79,7 @@ glsl/loop_analysis.h \ glsl/loop_controls.cpp \ glsl/loop_unroll.cpp \ + glsl/lower_blend_equation_advanced.cpp \ glsl/lower_buffer_access.cpp \ glsl/lower_buffer_access.h \ glsl/lower_const_arrays_to_uniforms.cpp \ @@ -138,15 +141,22 @@ # glsl_compiler GLSL_COMPILER_CXX_FILES = \ + glsl/ir_builder_print_visitor.cpp \ + glsl/ir_builder_print_visitor.h \ + glsl/opt_add_neg_to_sub.h \ glsl/standalone_scaffolding.cpp \ glsl/standalone_scaffolding.h \ glsl/standalone.cpp \ glsl/standalone.h # libglsl generated sources -LIBGLSL_GENERATED_CXX_FILES = \ +LIBGLSL_GENERATED_FILES = \ + glsl/ir_expression_operation.h \ + glsl/ir_expression_operation_constant.h \ + glsl/ir_expression_operation_strings.h \ glsl/glsl_lexer.cpp \ - glsl/glsl_parser.cpp + glsl/glsl_parser.cpp \ + glsl/glsl_parser.h # libglcpp @@ -185,11 +195,15 @@ nir/nir_intrinsics.c \ nir/nir_intrinsics.h \ nir/nir_liveness.c \ + nir/nir_loop_analyze.c \ + nir/nir_loop_analyze.h \ nir/nir_lower_alu_to_scalar.c \ nir/nir_lower_atomics.c \ nir/nir_lower_bitmap.c \ nir/nir_lower_clamp_color_outputs.c \ nir/nir_lower_clip.c \ + nir/nir_lower_clip_cull_distance_arrays.c \ + nir/nir_lower_constant_initializers.c \ nir/nir_lower_double_ops.c \ nir/nir_lower_double_packing.c \ nir/nir_lower_drawpixels.c \ @@ -201,9 +215,12 @@ nir/nir_lower_indirect_derefs.c \ nir/nir_lower_io.c \ nir/nir_lower_io_to_temporaries.c \ + nir/nir_lower_io_to_scalar.c \ nir/nir_lower_io_types.c \ nir/nir_lower_passthrough_edgeflags.c \ + nir/nir_lower_patch_vertices.c \ nir/nir_lower_phis_to_scalar.c \ + nir/nir_lower_regs_to_ssa.c \ nir/nir_lower_returns.c \ nir/nir_lower_samplers.c \ nir/nir_lower_system_values.c \ @@ -218,15 +235,21 @@ nir/nir_metadata.c \ nir/nir_move_vec_src_uses_to_dest.c \ nir/nir_normalize_cubemap_coords.c \ + nir/nir_opt_conditional_discard.c \ nir/nir_opt_constant_folding.c \ + nir/nir_opt_copy_prop_vars.c \ nir/nir_opt_copy_propagate.c \ nir/nir_opt_cse.c \ nir/nir_opt_dce.c \ nir/nir_opt_dead_cf.c \ nir/nir_opt_gcm.c \ nir/nir_opt_global_to_local.c \ + nir/nir_opt_if.c \ + nir/nir_opt_loop_unroll.c \ + nir/nir_opt_move_comparisons.c \ nir/nir_opt_peephole_select.c \ nir/nir_opt_remove_phis.c \ + nir/nir_opt_trivial_continues.c \ nir/nir_opt_undef.c \ nir/nir_phi_builder.c \ nir/nir_phi_builder.h \ @@ -236,9 +259,10 @@ nir/nir_repair_ssa.c \ nir/nir_search.c \ nir/nir_search.h \ + nir/nir_search_helpers.h \ nir/nir_split_var_copies.c \ nir/nir_sweep.c \ - nir/nir_to_ssa.c \ + nir/nir_to_lcssa.c \ nir/nir_validate.c \ nir/nir_vla.h \ nir/nir_worklist.c \ diff -Nru mesa-12.0.6/src/compiler/nir/nir_algebraic.py mesa-17.0.7/src/compiler/nir/nir_algebraic.py --- mesa-12.0.6/src/compiler/nir/nir_algebraic.py 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_algebraic.py 2017-06-01 10:37:10.000000000 +0000 @@ -76,6 +76,7 @@ return Constant(val, name_base) __template = mako.template.Template(""" +#include "compiler/nir/nir_search_helpers.h" static const ${val.c_type} ${val.name} = { { ${val.type_enum}, ${val.bit_size} }, % if isinstance(val, Constant): @@ -84,10 +85,12 @@ ${val.index}, /* ${val.var_name} */ ${'true' if val.is_constant else 'false'}, ${val.type() or 'nir_type_invalid' }, + ${val.cond if val.cond else 'NULL'}, % elif isinstance(val, Expression): ${'true' if val.inexact else 'false'}, nir_op_${val.opcode}, { ${', '.join(src.c_ptr for src in val.sources)} }, + ${val.cond if val.cond else 'NULL'}, % endif };""") @@ -113,7 +116,7 @@ Variable=Variable, Expression=Expression) -_constant_re = re.compile(r"(?P[^@]+)(?:@(?P\d+))?") +_constant_re = re.compile(r"(?P[^@\(]+)(?:@(?P\d+))?") class Constant(Value): def __init__(self, val, name): @@ -150,7 +153,8 @@ return "nir_type_float" _var_name_re = re.compile(r"(?P#)?(?P\w+)" - r"(?:@(?Pint|uint|bool|float)?(?P\d+)?)?") + r"(?:@(?Pint|uint|bool|float)?(?P\d+)?)?" + r"(?P\([^\)]+\))?") class Variable(Value): def __init__(self, val, name, varset): @@ -161,6 +165,7 @@ self.var_name = m.group('name') self.is_constant = m.group('const') is not None + self.cond = m.group('cond') self.required_type = m.group('type') self.bit_size = int(m.group('bits')) if m.group('bits') else 0 @@ -181,7 +186,8 @@ elif self.required_type == 'float': return "nir_type_float" -_opcode_re = re.compile(r"(?P~)?(?P\w+)(?:@(?P\d+))?") +_opcode_re = re.compile(r"(?P~)?(?P\w+)(?:@(?P\d+))?" + r"(?P\([^\)]+\))?") class Expression(Value): def __init__(self, expr, name_base, varset): @@ -194,6 +200,7 @@ self.opcode = m.group('opcode') self.bit_size = int(m.group('bits')) if m.group('bits') else 0 self.inexact = m.group('inexact') is not None + self.cond = m.group('cond') self.sources = [ Value.create(src, "{0}_{1}".format(name_base, i), varset) for (i, src) in enumerate(expr[1:]) ] diff -Nru mesa-12.0.6/src/compiler/nir/nir_builder.h mesa-17.0.7/src/compiler/nir/nir_builder.h --- mesa-12.0.6/src/compiler/nir/nir_builder.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_builder.h 2017-06-01 10:37:10.000000000 +0000 @@ -52,7 +52,7 @@ gl_shader_stage stage, const nir_shader_compiler_options *options) { - build->shader = nir_shader_create(mem_ctx, stage, options); + build->shader = nir_shader_create(mem_ctx, stage, options, NULL); nir_function *func = nir_function_create(build->shader, "main"); build->exact = false; build->impl = nir_function_impl_create(func); @@ -68,6 +68,13 @@ build->cursor = nir_after_instr(instr); } +static inline nir_instr * +nir_builder_last_instr(nir_builder *build) +{ + assert(build->cursor.option == nir_cursor_after_instr); + return build->cursor.instr; +} + static inline void nir_builder_cf_insert(nir_builder *build, nir_cf_node *cf) { @@ -411,6 +418,22 @@ return &load->dest.ssa; } +static inline nir_ssa_def * +nir_load_deref_var(nir_builder *build, nir_deref_var *deref) +{ + const struct glsl_type *type = nir_deref_tail(&deref->deref)->type; + const unsigned num_components = glsl_get_vector_elements(type); + + nir_intrinsic_instr *load = + nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_var); + load->num_components = num_components; + load->variables[0] = nir_deref_var_clone(deref, load); + nir_ssa_dest_init(&load->instr, &load->dest, num_components, + glsl_get_bit_size(type), NULL); + nir_builder_instr_insert(build, &load->instr); + return &load->dest.ssa; +} + static inline void nir_store_var(nir_builder *build, nir_variable *var, nir_ssa_def *value, unsigned writemask) @@ -437,7 +460,7 @@ nir_intrinsic_instr_create(build->shader, nir_intrinsic_store_var); store->num_components = num_components; store->const_index[0] = writemask & ((1 << num_components) - 1); - store->variables[0] = nir_deref_as_var(nir_copy_deref(store, &deref->deref)); + store->variables[0] = nir_deref_var_clone(deref, store); store->src[0] = nir_src_for_ssa(value); nir_builder_instr_insert(build, &store->instr); } @@ -450,8 +473,8 @@ nir_intrinsic_instr *copy = nir_intrinsic_instr_create(build->shader, nir_intrinsic_copy_var); - copy->variables[0] = nir_deref_as_var(nir_copy_deref(copy, &dest->deref)); - copy->variables[1] = nir_deref_as_var(nir_copy_deref(copy, &src->deref)); + copy->variables[0] = nir_deref_var_clone(dest, copy); + copy->variables[1] = nir_deref_var_clone(src, copy); nir_builder_instr_insert(build, ©->instr); } @@ -465,6 +488,7 @@ nir_builder_instr_insert(build, ©->instr); } +/* Generic builder for system values. */ static inline nir_ssa_def * nir_load_system_value(nir_builder *build, nir_intrinsic_op op, int index) { @@ -477,6 +501,31 @@ return &load->dest.ssa; } +/* Generate custom builders for system values. */ +#define INTRINSIC(name, num_srcs, src_components, has_dest, dest_components, \ + num_variables, num_indices, idx0, idx1, idx2, flags) +#define LAST_INTRINSIC(name) + +#define DEFINE_SYSTEM_VALUE(name) \ + static inline nir_ssa_def * \ + nir_load_##name(nir_builder *build) \ + { \ + return nir_load_system_value(build, nir_intrinsic_load_##name, 0); \ + } \ + +#include "nir_intrinsics.h" + +static inline nir_ssa_def * +nir_load_barycentric(nir_builder *build, nir_intrinsic_op op, + unsigned interp_mode) +{ + nir_intrinsic_instr *bary = nir_intrinsic_instr_create(build->shader, op); + nir_ssa_dest_init(&bary->instr, &bary->dest, 2, 32, NULL); + nir_intrinsic_set_interp_mode(bary, interp_mode); + nir_builder_instr_insert(build, &bary->instr); + return &bary->dest.ssa; +} + static inline void nir_jump(nir_builder *build, nir_jump_type jump_type) { diff -Nru mesa-12.0.6/src/compiler/nir/nir.c mesa-17.0.7/src/compiler/nir/nir.c --- mesa-12.0.6/src/compiler/nir/nir.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir.c 2017-06-01 10:37:10.000000000 +0000 @@ -32,9 +32,10 @@ nir_shader * nir_shader_create(void *mem_ctx, gl_shader_stage stage, - const nir_shader_compiler_options *options) + const nir_shader_compiler_options *options, + shader_info *si) { - nir_shader *shader = ralloc(mem_ctx, nir_shader); + nir_shader *shader = rzalloc(mem_ctx, nir_shader); exec_list_make_empty(&shader->uniforms); exec_list_make_empty(&shader->inputs); @@ -42,7 +43,8 @@ exec_list_make_empty(&shader->shared); shader->options = options; - memset(&shader->info, 0, sizeof(shader->info)); + + shader->info = si ? si : rzalloc(shader, shader_info); exec_list_make_empty(&shader->functions); exec_list_make_empty(&shader->registers); @@ -161,7 +163,7 @@ if ((mode == nir_var_shader_in && shader->stage != MESA_SHADER_VERTEX) || (mode == nir_var_shader_out && shader->stage != MESA_SHADER_FRAGMENT)) - var->data.interpolation = INTERP_QUALIFIER_SMOOTH; + var->data.interpolation = INTERP_MODE_SMOOTH; if (mode == nir_var_shader_in || mode == nir_var_uniform) var->data.read_only = true; @@ -334,7 +336,7 @@ nir_block * nir_block_create(nir_shader *shader) { - nir_block *block = ralloc(shader, nir_block); + nir_block *block = rzalloc(shader, nir_block); cf_init(&block->cf_node, nir_cf_node_block); @@ -391,7 +393,7 @@ nir_loop * nir_loop_create(nir_shader *shader) { - nir_loop *loop = ralloc(shader, nir_loop); + nir_loop *loop = rzalloc(shader, nir_loop); cf_init(&loop->cf_node, nir_cf_node_loop); @@ -446,9 +448,10 @@ nir_alu_instr_create(nir_shader *shader, nir_op op) { unsigned num_srcs = nir_op_infos[op].num_inputs; + /* TODO: don't use rzalloc */ nir_alu_instr *instr = - ralloc_size(shader, - sizeof(nir_alu_instr) + num_srcs * sizeof(nir_alu_src)); + rzalloc_size(shader, + sizeof(nir_alu_instr) + num_srcs * sizeof(nir_alu_src)); instr_init(&instr->instr, nir_instr_type_alu); instr->op = op; @@ -484,8 +487,9 @@ nir_intrinsic_instr_create(nir_shader *shader, nir_intrinsic_op op) { unsigned num_srcs = nir_intrinsic_infos[op].num_srcs; + /* TODO: don't use rzalloc */ nir_intrinsic_instr *instr = - ralloc_size(shader, + rzalloc_size(shader, sizeof(nir_intrinsic_instr) + num_srcs * sizeof(nir_src)); instr_init(&instr->instr, nir_instr_type_intrinsic); @@ -536,6 +540,22 @@ return instr; } +void +nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx) +{ + assert(src_idx < tex->num_srcs); + + /* First rewrite the source to NIR_SRC_INIT */ + nir_instr_rewrite_src(&tex->instr, &tex->src[src_idx].src, NIR_SRC_INIT); + + /* Now, move all of the other sources down */ + for (unsigned i = src_idx + 1; i < tex->num_srcs; i++) { + tex->src[i-1].src_type = tex->src[i].src_type; + nir_instr_move_src(&tex->instr, &tex->src[i-1].src, &tex->src[i].src); + } + tex->num_srcs--; +} + nir_phi_instr * nir_phi_instr_create(nir_shader *shader) { @@ -604,18 +624,21 @@ return deref; } -static nir_deref_var * -copy_deref_var(void *mem_ctx, nir_deref_var *deref) +nir_deref_var * +nir_deref_var_clone(const nir_deref_var *deref, void *mem_ctx) { + if (deref == NULL) + return NULL; + nir_deref_var *ret = nir_deref_var_create(mem_ctx, deref->var); ret->deref.type = deref->deref.type; if (deref->deref.child) - ret->deref.child = nir_copy_deref(ret, deref->deref.child); + ret->deref.child = nir_deref_clone(deref->deref.child, ret); return ret; } static nir_deref_array * -copy_deref_array(void *mem_ctx, nir_deref_array *deref) +deref_array_clone(const nir_deref_array *deref, void *mem_ctx) { nir_deref_array *ret = nir_deref_array_create(mem_ctx); ret->base_offset = deref->base_offset; @@ -625,33 +648,33 @@ } ret->deref.type = deref->deref.type; if (deref->deref.child) - ret->deref.child = nir_copy_deref(ret, deref->deref.child); + ret->deref.child = nir_deref_clone(deref->deref.child, ret); return ret; } static nir_deref_struct * -copy_deref_struct(void *mem_ctx, nir_deref_struct *deref) +deref_struct_clone(const nir_deref_struct *deref, void *mem_ctx) { nir_deref_struct *ret = nir_deref_struct_create(mem_ctx, deref->index); ret->deref.type = deref->deref.type; if (deref->deref.child) - ret->deref.child = nir_copy_deref(ret, deref->deref.child); + ret->deref.child = nir_deref_clone(deref->deref.child, ret); return ret; } nir_deref * -nir_copy_deref(void *mem_ctx, nir_deref *deref) +nir_deref_clone(const nir_deref *deref, void *mem_ctx) { if (deref == NULL) return NULL; switch (deref->deref_type) { case nir_deref_type_var: - return ©_deref_var(mem_ctx, nir_deref_as_var(deref))->deref; + return &nir_deref_var_clone(nir_deref_as_var(deref), mem_ctx)->deref; case nir_deref_type_array: - return ©_deref_array(mem_ctx, nir_deref_as_array(deref))->deref; + return &deref_array_clone(nir_deref_as_array(deref), mem_ctx)->deref; case nir_deref_type_struct: - return ©_deref_struct(mem_ctx, nir_deref_as_struct(deref))->deref; + return &deref_struct_clone(nir_deref_as_struct(deref), mem_ctx)->deref; default: unreachable("Invalid dereference type"); } @@ -786,7 +809,7 @@ assert(constant); const nir_deref *tail = &deref->deref; - unsigned matrix_offset = 0; + unsigned matrix_col = 0; while (tail->child) { switch (tail->child->deref_type) { case nir_deref_type_array: { @@ -794,7 +817,7 @@ assert(arr->deref_array_type == nir_deref_array_type_direct); if (glsl_type_is_matrix(tail->type)) { assert(arr->deref.child == NULL); - matrix_offset = arr->base_offset; + matrix_col = arr->base_offset; } else { constant = constant->elements[arr->base_offset]; } @@ -818,24 +841,16 @@ nir_load_const_instr_create(shader, glsl_get_vector_elements(tail->type), bit_size); - matrix_offset *= load->def.num_components; - for (unsigned i = 0; i < load->def.num_components; i++) { - switch (glsl_get_base_type(tail->type)) { - case GLSL_TYPE_FLOAT: - case GLSL_TYPE_INT: - case GLSL_TYPE_UINT: - load->value.u32[i] = constant->value.u[matrix_offset + i]; - break; - case GLSL_TYPE_DOUBLE: - load->value.f64[i] = constant->value.d[matrix_offset + i]; - break; - case GLSL_TYPE_BOOL: - load->value.u32[i] = constant->value.b[matrix_offset + i] ? - NIR_TRUE : NIR_FALSE; - break; - default: - unreachable("Invalid immediate type"); - } + switch (glsl_get_base_type(tail->type)) { + case GLSL_TYPE_FLOAT: + case GLSL_TYPE_INT: + case GLSL_TYPE_UINT: + case GLSL_TYPE_DOUBLE: + case GLSL_TYPE_BOOL: + load->value = constant->values[matrix_col]; + break; + default: + unreachable("Invalid immediate type"); } return load; @@ -1630,10 +1645,10 @@ case nir_cf_node_if: { /* Are we at the end of the if? Go to the beginning of the else */ nir_if *if_stmt = nir_cf_node_as_if(parent); - if (&block->cf_node == nir_if_last_then_node(if_stmt)) - return nir_cf_node_as_block(nir_if_first_else_node(if_stmt)); + if (block == nir_if_last_then_block(if_stmt)) + return nir_if_first_else_block(if_stmt); - assert(&block->cf_node == nir_if_last_else_node(if_stmt)); + assert(block == nir_if_last_else_block(if_stmt)); /* fall through */ } @@ -1666,10 +1681,10 @@ case nir_cf_node_if: { /* Are we at the beginning of the else? Go to the end of the if */ nir_if *if_stmt = nir_cf_node_as_if(parent); - if (&block->cf_node == nir_if_first_else_node(if_stmt)) - return nir_cf_node_as_block(nir_if_last_then_node(if_stmt)); + if (block == nir_if_first_else_block(if_stmt)) + return nir_if_last_then_block(if_stmt); - assert(&block->cf_node == nir_if_first_then_node(if_stmt)); + assert(block == nir_if_first_then_block(if_stmt)); /* fall through */ } @@ -1694,12 +1709,12 @@ case nir_cf_node_if: { nir_if *if_stmt = nir_cf_node_as_if(node); - return nir_cf_node_as_block(nir_if_first_then_node(if_stmt)); + return nir_if_first_then_block(if_stmt); } case nir_cf_node_loop: { nir_loop *loop = nir_cf_node_as_loop(node); - return nir_cf_node_as_block(nir_loop_first_cf_node(loop)); + return nir_loop_first_block(loop); } case nir_cf_node_block: { @@ -1721,12 +1736,12 @@ case nir_cf_node_if: { nir_if *if_stmt = nir_cf_node_as_if(node); - return nir_cf_node_as_block(nir_if_last_else_node(if_stmt)); + return nir_if_last_else_block(if_stmt); } case nir_cf_node_loop: { nir_loop *loop = nir_cf_node_as_loop(node); - return nir_cf_node_as_block(nir_loop_last_cf_node(loop)); + return nir_loop_last_block(loop); } case nir_cf_node_block: { @@ -1741,7 +1756,7 @@ nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node) { if (node->type == nir_cf_node_block) - return nir_cf_node_cf_tree_first(nir_cf_node_next(node)); + return nir_block_cf_tree_next(nir_cf_node_as_block(node)); else if (node->type == nir_cf_node_function) return NULL; else @@ -1941,3 +1956,84 @@ unreachable("intrinsic doesn't produce a system value"); } } + +nir_op +nir_type_conversion_op(nir_alu_type src, nir_alu_type dst) +{ + nir_alu_type src_base_type = (nir_alu_type) nir_alu_type_get_base_type(src); + nir_alu_type dst_base_type = (nir_alu_type) nir_alu_type_get_base_type(dst); + unsigned src_bitsize = nir_alu_type_get_type_size(src); + unsigned dst_bitsize = nir_alu_type_get_type_size(dst); + + if (src_base_type == dst_base_type) { + if (src_bitsize == dst_bitsize) + return (src_base_type == nir_type_float) ? nir_op_fmov : nir_op_imov; + + assert (src_base_type == nir_type_float); + /* TODO: implement support for float16 */ + assert(src_bitsize == 64 || dst_bitsize == 64); + return (src_bitsize == 64) ? nir_op_d2f : nir_op_f2d; + } + + /* Different base type but same bit_size */ + if (src_bitsize == dst_bitsize) { + /* TODO: This does not include specific conversions between + * signed or unsigned integer types of bit size different than 32 yet. + */ + assert(src_bitsize == 32); + switch (src_base_type) { + case nir_type_uint: + return (dst_base_type == nir_type_float) ? nir_op_u2f : nir_op_imov; + case nir_type_int: + return (dst_base_type == nir_type_float) ? nir_op_i2f : nir_op_imov; + case nir_type_bool: + return (dst_base_type == nir_type_float) ? nir_op_b2f : nir_op_b2i; + case nir_type_float: + switch (dst_base_type) { + case nir_type_uint: + return nir_op_f2u; + case nir_type_bool: + return nir_op_f2b; + default: + return nir_op_f2i; + }; + default: + unreachable("Invalid conversion"); + }; + } + + /* Different bit_size and different base type */ + /* TODO: Implement integer support for types with bit_size != 32 */ + switch (src_base_type) { + case nir_type_uint: + assert(dst == nir_type_float64); + return nir_op_u2d; + case nir_type_int: + assert(dst == nir_type_float64); + return nir_op_i2d; + case nir_type_bool: + assert(dst == nir_type_float64); + return nir_op_u2d; + case nir_type_float: + assert(src_bitsize == 32 || src_bitsize == 64); + if (src_bitsize != 64) { + assert(dst == nir_type_float64); + return nir_op_f2d; + } + assert(dst_bitsize == 32); + switch (dst_base_type) { + case nir_type_uint: + return nir_op_d2u; + case nir_type_int: + return nir_op_d2i; + case nir_type_bool: + return nir_op_d2b; + case nir_type_float: + return nir_op_d2f; + default: + unreachable("Invalid conversion"); + }; + default: + unreachable("Invalid conversion"); + }; +} diff -Nru mesa-12.0.6/src/compiler/nir/nir_clone.c mesa-17.0.7/src/compiler/nir/nir_clone.c --- mesa-12.0.6/src/compiler/nir/nir_clone.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_clone.c 2017-06-01 10:37:10.000000000 +0000 @@ -22,7 +22,7 @@ */ #include "nir.h" -#include "nir_control_flow_private.h" +#include "nir_control_flow.h" /* Secret Decoder Ring: * clone_foo(): @@ -35,6 +35,13 @@ /* True if we are cloning an entire shader. */ bool global_clone; + /* If true allows the clone operation to fall back to the original pointer + * if no clone pointer is found in the remap table. This allows us to + * clone a loop body without having to add srcs from outside the loop to + * the remap table. This is useful for loop unrolling. + */ + bool allow_remap_fallback; + /* maps orig ptr -> cloned ptr: */ struct hash_table *remap_table; @@ -46,11 +53,19 @@ } clone_state; static void -init_clone_state(clone_state *state, bool global) +init_clone_state(clone_state *state, struct hash_table *remap_table, + bool global, bool allow_remap_fallback) { state->global_clone = global; - state->remap_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer, - _mesa_key_pointer_equal); + state->allow_remap_fallback = allow_remap_fallback; + + if (remap_table) { + state->remap_table = remap_table; + } else { + state->remap_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer, + _mesa_key_pointer_equal); + } + list_inithead(&state->phi_srcs); } @@ -72,9 +87,10 @@ return (void *)ptr; entry = _mesa_hash_table_search(state->remap_table, ptr); - assert(entry && "Failed to find pointer!"); - if (!entry) - return NULL; + if (!entry) { + assert(state->allow_remap_fallback); + return (void *)ptr; + } return entry->data; } @@ -114,7 +130,7 @@ { nir_constant *nc = ralloc(nvar, nir_constant); - nc->value = c->value; + memcpy(nc->values, c->values, sizeof(nc->values)); nc->num_elements = c->num_elements; nc->elements = ralloc_array(nvar, nir_constant *, c->num_elements); for (unsigned i = 0; i < c->num_elements; i++) { @@ -593,6 +609,59 @@ } } +/* After we've cloned almost everything, we have to walk the list of phi + * sources and fix them up. Thanks to loops, the block and SSA value for a + * phi source may not be defined when we first encounter it. Instead, we + * add it to the phi_srcs list and we fix it up here. + */ +static void +fixup_phi_srcs(clone_state *state) +{ + list_for_each_entry_safe(nir_phi_src, src, &state->phi_srcs, src.use_link) { + src->pred = remap_local(state, src->pred); + + /* Remove from this list */ + list_del(&src->src.use_link); + + if (src->src.is_ssa) { + src->src.ssa = remap_local(state, src->src.ssa); + list_addtail(&src->src.use_link, &src->src.ssa->uses); + } else { + src->src.reg.reg = remap_reg(state, src->src.reg.reg); + list_addtail(&src->src.use_link, &src->src.reg.reg->uses); + } + } + assert(list_empty(&state->phi_srcs)); +} + +void +nir_cf_list_clone(nir_cf_list *dst, nir_cf_list *src, nir_cf_node *parent, + struct hash_table *remap_table) +{ + exec_list_make_empty(&dst->list); + dst->impl = src->impl; + + if (exec_list_is_empty(&src->list)) + return; + + clone_state state; + init_clone_state(&state, remap_table, false, true); + + /* We use the same shader */ + state.ns = src->impl->function->shader; + + /* The control-flow code assumes that the list of cf_nodes always starts + * and ends with a block. We start by adding an empty block. + */ + nir_block *nblk = nir_block_create(state.ns); + nblk->cf_node.parent = parent; + exec_list_push_tail(&dst->list, &nblk->cf_node.node); + + clone_cf_list(&state, &dst->list, &src->list); + + fixup_phi_srcs(&state); +} + static nir_function_impl * clone_function_impl(clone_state *state, const nir_function_impl *fi) { @@ -614,21 +683,7 @@ clone_cf_list(state, &nfi->body, &fi->body); - /* After we've cloned almost everything, we have to walk the list of phi - * sources and fix them up. Thanks to loops, the block and SSA value for a - * phi source may not be defined when we first encounter it. Instead, we - * add it to the phi_srcs list and we fix it up here. - */ - list_for_each_entry_safe(nir_phi_src, src, &state->phi_srcs, src.use_link) { - src->pred = remap_local(state, src->pred); - assert(src->src.is_ssa); - src->src.ssa = remap_local(state, src->src.ssa); - - /* Remove from this list and place in the uses of the SSA def */ - list_del(&src->src.use_link); - list_addtail(&src->src.use_link, &src->src.ssa->uses); - } - assert(list_empty(&state->phi_srcs)); + fixup_phi_srcs(state); /* All metadata is invalidated in the cloning process */ nfi->valid_metadata = 0; @@ -640,7 +695,7 @@ nir_function_impl_clone(const nir_function_impl *fi) { clone_state state; - init_clone_state(&state, false); + init_clone_state(&state, NULL, false, false); /* We use the same shader */ state.ns = fi->function->shader; @@ -680,9 +735,9 @@ nir_shader_clone(void *mem_ctx, const nir_shader *s) { clone_state state; - init_clone_state(&state, true); + init_clone_state(&state, NULL, true, false); - nir_shader *ns = nir_shader_create(mem_ctx, s->stage, s->options); + nir_shader *ns = nir_shader_create(mem_ctx, s->stage, s->options, NULL); state.ns = ns; clone_var_list(&state, &ns->uniforms, &s->uniforms); @@ -710,10 +765,10 @@ clone_reg_list(&state, &ns->registers, &s->registers); ns->reg_alloc = s->reg_alloc; - ns->info = s->info; - ns->info.name = ralloc_strdup(ns, ns->info.name); - if (ns->info.label) - ns->info.label = ralloc_strdup(ns, ns->info.label); + *ns->info = *s->info; + ns->info->name = ralloc_strdup(ns, ns->info->name); + if (ns->info->label) + ns->info->label = ralloc_strdup(ns, ns->info->label); ns->num_inputs = s->num_inputs; ns->num_uniforms = s->num_uniforms; diff -Nru mesa-12.0.6/src/compiler/nir/nir_constant_expressions.c mesa-17.0.7/src/compiler/nir/nir_constant_expressions.c --- mesa-12.0.6/src/compiler/nir/nir_constant_expressions.c 2017-01-24 01:43:17.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_constant_expressions.c 2017-06-01 10:37:59.000000000 +0000 @@ -251,8 +251,8 @@ }; static nir_const_value -evaluate_b2f(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_b2f(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -262,7 +262,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - bool src0 = _src[0].u32[_i] != 0; + const bool src0 = _src[0].u32[_i] != 0; float32_t dst = src0 ? 1.0f : 0.0f; @@ -276,7 +276,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - bool src0 = _src[0].u32[_i] != 0; + const bool src0 = _src[0].u32[_i] != 0; float32_t dst = src0 ? 1.0f : 0.0f; @@ -293,8 +293,8 @@ return _dst_val; } static nir_const_value -evaluate_b2i(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_b2i(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -304,7 +304,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - bool src0 = _src[0].u32[_i] != 0; + const bool src0 = _src[0].u32[_i] != 0; int32_t dst = src0 ? 1 : 0; @@ -318,7 +318,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - bool src0 = _src[0].u32[_i] != 0; + const bool src0 = _src[0].u32[_i] != 0; int32_t dst = src0 ? 1 : 0; @@ -335,8 +335,8 @@ return _dst_val; } static nir_const_value -evaluate_ball_fequal2(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ball_fequal2(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -345,14 +345,18 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], + 0, + 0, }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], _src[1].f32[1], + 0, + 0, }; struct bool32_vec dst; @@ -367,14 +371,18 @@ - struct float64_vec src0 = { + const struct float64_vec src0 = { _src[0].f64[0], _src[0].f64[1], + 0, + 0, }; - struct float64_vec src1 = { + const struct float64_vec src1 = { _src[1].f64[0], _src[1].f64[1], + 0, + 0, }; struct bool32_vec dst; @@ -393,8 +401,8 @@ return _dst_val; } static nir_const_value -evaluate_ball_fequal3(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ball_fequal3(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -403,16 +411,18 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], _src[0].f32[2], + 0, }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], _src[1].f32[1], _src[1].f32[2], + 0, }; struct bool32_vec dst; @@ -427,16 +437,18 @@ - struct float64_vec src0 = { + const struct float64_vec src0 = { _src[0].f64[0], _src[0].f64[1], _src[0].f64[2], + 0, }; - struct float64_vec src1 = { + const struct float64_vec src1 = { _src[1].f64[0], _src[1].f64[1], _src[1].f64[2], + 0, }; struct bool32_vec dst; @@ -455,8 +467,8 @@ return _dst_val; } static nir_const_value -evaluate_ball_fequal4(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ball_fequal4(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -465,14 +477,14 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], _src[0].f32[2], _src[0].f32[3], }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], _src[1].f32[1], _src[1].f32[2], @@ -491,14 +503,14 @@ - struct float64_vec src0 = { + const struct float64_vec src0 = { _src[0].f64[0], _src[0].f64[1], _src[0].f64[2], _src[0].f64[3], }; - struct float64_vec src1 = { + const struct float64_vec src1 = { _src[1].f64[0], _src[1].f64[1], _src[1].f64[2], @@ -521,8 +533,8 @@ return _dst_val; } static nir_const_value -evaluate_ball_iequal2(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ball_iequal2(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -531,14 +543,18 @@ - struct int32_vec src0 = { + const struct int32_vec src0 = { _src[0].i32[0], _src[0].i32[1], + 0, + 0, }; - struct int32_vec src1 = { + const struct int32_vec src1 = { _src[1].i32[0], _src[1].i32[1], + 0, + 0, }; struct bool32_vec dst; @@ -553,14 +569,18 @@ - struct int64_vec src0 = { + const struct int64_vec src0 = { _src[0].i64[0], _src[0].i64[1], + 0, + 0, }; - struct int64_vec src1 = { + const struct int64_vec src1 = { _src[1].i64[0], _src[1].i64[1], + 0, + 0, }; struct bool32_vec dst; @@ -579,8 +599,8 @@ return _dst_val; } static nir_const_value -evaluate_ball_iequal3(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ball_iequal3(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -589,16 +609,18 @@ - struct int32_vec src0 = { + const struct int32_vec src0 = { _src[0].i32[0], _src[0].i32[1], _src[0].i32[2], + 0, }; - struct int32_vec src1 = { + const struct int32_vec src1 = { _src[1].i32[0], _src[1].i32[1], _src[1].i32[2], + 0, }; struct bool32_vec dst; @@ -613,16 +635,18 @@ - struct int64_vec src0 = { + const struct int64_vec src0 = { _src[0].i64[0], _src[0].i64[1], _src[0].i64[2], + 0, }; - struct int64_vec src1 = { + const struct int64_vec src1 = { _src[1].i64[0], _src[1].i64[1], _src[1].i64[2], + 0, }; struct bool32_vec dst; @@ -641,8 +665,8 @@ return _dst_val; } static nir_const_value -evaluate_ball_iequal4(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ball_iequal4(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -651,14 +675,14 @@ - struct int32_vec src0 = { + const struct int32_vec src0 = { _src[0].i32[0], _src[0].i32[1], _src[0].i32[2], _src[0].i32[3], }; - struct int32_vec src1 = { + const struct int32_vec src1 = { _src[1].i32[0], _src[1].i32[1], _src[1].i32[2], @@ -677,14 +701,14 @@ - struct int64_vec src0 = { + const struct int64_vec src0 = { _src[0].i64[0], _src[0].i64[1], _src[0].i64[2], _src[0].i64[3], }; - struct int64_vec src1 = { + const struct int64_vec src1 = { _src[1].i64[0], _src[1].i64[1], _src[1].i64[2], @@ -707,8 +731,8 @@ return _dst_val; } static nir_const_value -evaluate_bany_fnequal2(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_bany_fnequal2(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -717,14 +741,18 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], + 0, + 0, }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], _src[1].f32[1], + 0, + 0, }; struct bool32_vec dst; @@ -739,14 +767,18 @@ - struct float64_vec src0 = { + const struct float64_vec src0 = { _src[0].f64[0], _src[0].f64[1], + 0, + 0, }; - struct float64_vec src1 = { + const struct float64_vec src1 = { _src[1].f64[0], _src[1].f64[1], + 0, + 0, }; struct bool32_vec dst; @@ -765,8 +797,8 @@ return _dst_val; } static nir_const_value -evaluate_bany_fnequal3(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_bany_fnequal3(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -775,16 +807,18 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], _src[0].f32[2], + 0, }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], _src[1].f32[1], _src[1].f32[2], + 0, }; struct bool32_vec dst; @@ -799,16 +833,18 @@ - struct float64_vec src0 = { + const struct float64_vec src0 = { _src[0].f64[0], _src[0].f64[1], _src[0].f64[2], + 0, }; - struct float64_vec src1 = { + const struct float64_vec src1 = { _src[1].f64[0], _src[1].f64[1], _src[1].f64[2], + 0, }; struct bool32_vec dst; @@ -827,8 +863,8 @@ return _dst_val; } static nir_const_value -evaluate_bany_fnequal4(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_bany_fnequal4(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -837,14 +873,14 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], _src[0].f32[2], _src[0].f32[3], }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], _src[1].f32[1], _src[1].f32[2], @@ -863,14 +899,14 @@ - struct float64_vec src0 = { + const struct float64_vec src0 = { _src[0].f64[0], _src[0].f64[1], _src[0].f64[2], _src[0].f64[3], }; - struct float64_vec src1 = { + const struct float64_vec src1 = { _src[1].f64[0], _src[1].f64[1], _src[1].f64[2], @@ -893,8 +929,8 @@ return _dst_val; } static nir_const_value -evaluate_bany_inequal2(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_bany_inequal2(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -903,14 +939,18 @@ - struct int32_vec src0 = { + const struct int32_vec src0 = { _src[0].i32[0], _src[0].i32[1], + 0, + 0, }; - struct int32_vec src1 = { + const struct int32_vec src1 = { _src[1].i32[0], _src[1].i32[1], + 0, + 0, }; struct bool32_vec dst; @@ -925,14 +965,18 @@ - struct int64_vec src0 = { + const struct int64_vec src0 = { _src[0].i64[0], _src[0].i64[1], + 0, + 0, }; - struct int64_vec src1 = { + const struct int64_vec src1 = { _src[1].i64[0], _src[1].i64[1], + 0, + 0, }; struct bool32_vec dst; @@ -951,8 +995,8 @@ return _dst_val; } static nir_const_value -evaluate_bany_inequal3(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_bany_inequal3(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -961,16 +1005,18 @@ - struct int32_vec src0 = { + const struct int32_vec src0 = { _src[0].i32[0], _src[0].i32[1], _src[0].i32[2], + 0, }; - struct int32_vec src1 = { + const struct int32_vec src1 = { _src[1].i32[0], _src[1].i32[1], _src[1].i32[2], + 0, }; struct bool32_vec dst; @@ -985,16 +1031,18 @@ - struct int64_vec src0 = { + const struct int64_vec src0 = { _src[0].i64[0], _src[0].i64[1], _src[0].i64[2], + 0, }; - struct int64_vec src1 = { + const struct int64_vec src1 = { _src[1].i64[0], _src[1].i64[1], _src[1].i64[2], + 0, }; struct bool32_vec dst; @@ -1013,8 +1061,8 @@ return _dst_val; } static nir_const_value -evaluate_bany_inequal4(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_bany_inequal4(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -1023,14 +1071,14 @@ - struct int32_vec src0 = { + const struct int32_vec src0 = { _src[0].i32[0], _src[0].i32[1], _src[0].i32[2], _src[0].i32[3], }; - struct int32_vec src1 = { + const struct int32_vec src1 = { _src[1].i32[0], _src[1].i32[1], _src[1].i32[2], @@ -1049,14 +1097,14 @@ - struct int64_vec src0 = { + const struct int64_vec src0 = { _src[0].i64[0], _src[0].i64[1], _src[0].i64[2], _src[0].i64[3], }; - struct int64_vec src1 = { + const struct int64_vec src1 = { _src[1].i64[0], _src[1].i64[1], _src[1].i64[2], @@ -1079,8 +1127,8 @@ return _dst_val; } static nir_const_value -evaluate_bcsel(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_bcsel(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -1090,10 +1138,10 @@ for (unsigned _i = 0; _i < num_components; _i++) { - bool src0 = _src[0].u32[_i] != 0; - uint32_t src1 = + const bool src0 = _src[0].u32[_i] != 0; + const uint32_t src1 = _src[1].u32[_i]; - uint32_t src2 = + const uint32_t src2 = _src[2].u32[_i]; uint32_t dst = src0 ? src1 : src2; @@ -1108,10 +1156,10 @@ for (unsigned _i = 0; _i < num_components; _i++) { - bool src0 = _src[0].u32[_i] != 0; - uint64_t src1 = + const bool src0 = _src[0].u32[_i] != 0; + const uint64_t src1 = _src[1].u64[_i]; - uint64_t src2 = + const uint64_t src2 = _src[2].u64[_i]; uint64_t dst = src0 ? src1 : src2; @@ -1129,8 +1177,8 @@ return _dst_val; } static nir_const_value -evaluate_bfi(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_bfi(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -1140,14 +1188,15 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; - uint32_t src1 = + const uint32_t src1 = _src[1].u32[_i]; - uint32_t src2 = + const uint32_t src2 = _src[2].u32[_i]; uint32_t dst; + unsigned mask = src0, insert = src1, base = src2; if (mask == 0) { @@ -1172,14 +1221,15 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; - uint32_t src1 = + const uint32_t src1 = _src[1].u32[_i]; - uint32_t src2 = + const uint32_t src2 = _src[2].u32[_i]; uint32_t dst; + unsigned mask = src0, insert = src1, base = src2; if (mask == 0) { @@ -1207,8 +1257,8 @@ return _dst_val; } static nir_const_value -evaluate_bfm(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_bfm(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -1218,12 +1268,13 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; uint32_t dst; + int bits = src0, offset = src1; if (offset < 0 || bits < 0 || offset > 31 || bits > 31 || offset + bits > 32) @@ -1242,12 +1293,13 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; uint32_t dst; + int bits = src0, offset = src1; if (offset < 0 || bits < 0 || offset > 31 || bits > 31 || offset + bits > 32) @@ -1269,8 +1321,8 @@ return _dst_val; } static nir_const_value -evaluate_bit_count(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_bit_count(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -1280,10 +1332,11 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; uint32_t dst; + dst = 0; for (unsigned bit = 0; bit < 32; bit++) { @@ -1302,10 +1355,11 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; uint32_t dst; + dst = 0; for (unsigned bit = 0; bit < 32; bit++) { @@ -1327,8 +1381,8 @@ return _dst_val; } static nir_const_value -evaluate_bitfield_insert(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_bitfield_insert(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -1338,16 +1392,17 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; - uint32_t src1 = + const uint32_t src1 = _src[1].u32[_i]; - int32_t src2 = + const int32_t src2 = _src[2].i32[_i]; - int32_t src3 = + const int32_t src3 = _src[3].i32[_i]; uint32_t dst; + unsigned base = src0, insert = src1; int offset = src2, bits = src3; @@ -1371,16 +1426,17 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; - uint32_t src1 = + const uint32_t src1 = _src[1].u32[_i]; - int32_t src2 = + const int32_t src2 = _src[2].i32[_i]; - int32_t src3 = + const int32_t src3 = _src[3].i32[_i]; uint32_t dst; + unsigned base = src0, insert = src1; int offset = src2, bits = src3; @@ -1407,8 +1463,8 @@ return _dst_val; } static nir_const_value -evaluate_bitfield_reverse(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_bitfield_reverse(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -1418,10 +1474,11 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; uint32_t dst; + /* we're not winning any awards for speed here, but that's ok */ dst = 0; @@ -1439,10 +1496,11 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; uint32_t dst; + /* we're not winning any awards for speed here, but that's ok */ dst = 0; @@ -1463,8 +1521,8 @@ return _dst_val; } static nir_const_value -evaluate_d2b(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_d2b(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -1474,7 +1532,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; bool32_t dst = src0 != 0.0; @@ -1489,7 +1547,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; bool32_t dst = src0 != 0.0; @@ -1507,8 +1565,8 @@ return _dst_val; } static nir_const_value -evaluate_d2f(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_d2f(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -1518,7 +1576,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; float32_t dst = src0; @@ -1533,7 +1591,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; float32_t dst = src0; @@ -1551,8 +1609,8 @@ return _dst_val; } static nir_const_value -evaluate_d2i(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_d2i(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -1562,7 +1620,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; int32_t dst = src0; @@ -1577,7 +1635,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; int32_t dst = src0; @@ -1595,8 +1653,8 @@ return _dst_val; } static nir_const_value -evaluate_d2u(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_d2u(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -1606,7 +1664,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; uint32_t dst = src0; @@ -1621,7 +1679,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; uint32_t dst = src0; @@ -1639,8 +1697,8 @@ return _dst_val; } static nir_const_value -evaluate_extract_i16(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_extract_i16(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -1650,9 +1708,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; int32_t dst = (int16_t)(src0 >> (src1 * 16)); @@ -1667,9 +1725,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int64_t src0 = + const int64_t src0 = _src[0].i64[_i]; - int64_t src1 = + const int64_t src1 = _src[1].i64[_i]; int64_t dst = (int16_t)(src0 >> (src1 * 16)); @@ -1687,8 +1745,8 @@ return _dst_val; } static nir_const_value -evaluate_extract_i8(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_extract_i8(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -1698,9 +1756,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; int32_t dst = (int8_t)(src0 >> (src1 * 8)); @@ -1715,9 +1773,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int64_t src0 = + const int64_t src0 = _src[0].i64[_i]; - int64_t src1 = + const int64_t src1 = _src[1].i64[_i]; int64_t dst = (int8_t)(src0 >> (src1 * 8)); @@ -1735,8 +1793,8 @@ return _dst_val; } static nir_const_value -evaluate_extract_u16(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_extract_u16(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -1746,9 +1804,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; - uint32_t src1 = + const uint32_t src1 = _src[1].u32[_i]; uint32_t dst = (uint16_t)(src0 >> (src1 * 16)); @@ -1763,9 +1821,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint64_t src0 = + const uint64_t src0 = _src[0].u64[_i]; - uint64_t src1 = + const uint64_t src1 = _src[1].u64[_i]; uint64_t dst = (uint16_t)(src0 >> (src1 * 16)); @@ -1783,8 +1841,8 @@ return _dst_val; } static nir_const_value -evaluate_extract_u8(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_extract_u8(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -1794,9 +1852,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; - uint32_t src1 = + const uint32_t src1 = _src[1].u32[_i]; uint32_t dst = (uint8_t)(src0 >> (src1 * 8)); @@ -1811,9 +1869,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint64_t src0 = + const uint64_t src0 = _src[0].u64[_i]; - uint64_t src1 = + const uint64_t src1 = _src[1].u64[_i]; uint64_t dst = (uint8_t)(src0 >> (src1 * 8)); @@ -1831,8 +1889,8 @@ return _dst_val; } static nir_const_value -evaluate_f2b(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_f2b(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -1842,7 +1900,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; bool32_t dst = src0 != 0.0f; @@ -1857,7 +1915,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; bool32_t dst = src0 != 0.0f; @@ -1875,8 +1933,8 @@ return _dst_val; } static nir_const_value -evaluate_f2d(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_f2d(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -1886,7 +1944,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; float64_t dst = src0; @@ -1901,7 +1959,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; float64_t dst = src0; @@ -1919,8 +1977,8 @@ return _dst_val; } static nir_const_value -evaluate_f2i(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_f2i(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -1930,7 +1988,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; int32_t dst = src0; @@ -1945,7 +2003,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; int32_t dst = src0; @@ -1963,8 +2021,8 @@ return _dst_val; } static nir_const_value -evaluate_f2u(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_f2u(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -1974,7 +2032,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; uint32_t dst = src0; @@ -1989,7 +2047,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; uint32_t dst = src0; @@ -2007,8 +2065,8 @@ return _dst_val; } static nir_const_value -evaluate_fabs(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fabs(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -2018,7 +2076,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; float32_t dst = bit_size == 64 ? fabs(src0) : fabsf(src0); @@ -2033,7 +2091,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; float64_t dst = bit_size == 64 ? fabs(src0) : fabsf(src0); @@ -2051,8 +2109,8 @@ return _dst_val; } static nir_const_value -evaluate_fadd(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fadd(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -2062,9 +2120,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; float32_t dst = src0 + src1; @@ -2079,9 +2137,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; - float64_t src1 = + const float64_t src1 = _src[1].f64[_i]; float64_t dst = src0 + src1; @@ -2099,8 +2157,8 @@ return _dst_val; } static nir_const_value -evaluate_fall_equal2(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fall_equal2(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -2109,14 +2167,18 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], + 0, + 0, }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], _src[1].f32[1], + 0, + 0, }; struct float32_vec dst; @@ -2131,14 +2193,18 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], + 0, + 0, }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], _src[1].f32[1], + 0, + 0, }; struct float32_vec dst; @@ -2157,8 +2223,8 @@ return _dst_val; } static nir_const_value -evaluate_fall_equal3(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fall_equal3(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -2167,16 +2233,18 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], _src[0].f32[2], + 0, }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], _src[1].f32[1], _src[1].f32[2], + 0, }; struct float32_vec dst; @@ -2191,16 +2259,18 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], _src[0].f32[2], + 0, }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], _src[1].f32[1], _src[1].f32[2], + 0, }; struct float32_vec dst; @@ -2219,8 +2289,8 @@ return _dst_val; } static nir_const_value -evaluate_fall_equal4(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fall_equal4(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -2229,14 +2299,14 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], _src[0].f32[2], _src[0].f32[3], }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], _src[1].f32[1], _src[1].f32[2], @@ -2255,14 +2325,14 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], _src[0].f32[2], _src[0].f32[3], }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], _src[1].f32[1], _src[1].f32[2], @@ -2285,8 +2355,8 @@ return _dst_val; } static nir_const_value -evaluate_fand(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fand(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -2296,9 +2366,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; float32_t dst = ((src0 != 0.0f) && (src1 != 0.0f)) ? 1.0f : 0.0f; @@ -2313,9 +2383,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; float32_t dst = ((src0 != 0.0f) && (src1 != 0.0f)) ? 1.0f : 0.0f; @@ -2333,8 +2403,8 @@ return _dst_val; } static nir_const_value -evaluate_fany_nequal2(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fany_nequal2(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -2343,14 +2413,18 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], + 0, + 0, }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], _src[1].f32[1], + 0, + 0, }; struct float32_vec dst; @@ -2365,14 +2439,18 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], + 0, + 0, }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], _src[1].f32[1], + 0, + 0, }; struct float32_vec dst; @@ -2391,8 +2469,8 @@ return _dst_val; } static nir_const_value -evaluate_fany_nequal3(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fany_nequal3(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -2401,16 +2479,18 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], _src[0].f32[2], + 0, }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], _src[1].f32[1], _src[1].f32[2], + 0, }; struct float32_vec dst; @@ -2425,16 +2505,18 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], _src[0].f32[2], + 0, }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], _src[1].f32[1], _src[1].f32[2], + 0, }; struct float32_vec dst; @@ -2453,8 +2535,8 @@ return _dst_val; } static nir_const_value -evaluate_fany_nequal4(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fany_nequal4(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -2463,14 +2545,14 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], _src[0].f32[2], _src[0].f32[3], }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], _src[1].f32[1], _src[1].f32[2], @@ -2489,14 +2571,14 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], _src[0].f32[2], _src[0].f32[3], }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], _src[1].f32[1], _src[1].f32[2], @@ -2519,8 +2601,8 @@ return _dst_val; } static nir_const_value -evaluate_fceil(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fceil(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -2530,7 +2612,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; float32_t dst = bit_size == 64 ? ceil(src0) : ceilf(src0); @@ -2545,7 +2627,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; float64_t dst = bit_size == 64 ? ceil(src0) : ceilf(src0); @@ -2563,8 +2645,8 @@ return _dst_val; } static nir_const_value -evaluate_fcos(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fcos(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -2574,7 +2656,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; float32_t dst = bit_size == 64 ? cos(src0) : cosf(src0); @@ -2589,7 +2671,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; float64_t dst = bit_size == 64 ? cos(src0) : cosf(src0); @@ -2607,8 +2689,8 @@ return _dst_val; } static nir_const_value -evaluate_fcsel(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fcsel(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -2618,11 +2700,11 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; - float32_t src2 = + const float32_t src2 = _src[2].f32[_i]; float32_t dst = (src0 != 0.0f) ? src1 : src2; @@ -2637,11 +2719,11 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; - float32_t src2 = + const float32_t src2 = _src[2].f32[_i]; float32_t dst = (src0 != 0.0f) ? src1 : src2; @@ -2659,8 +2741,8 @@ return _dst_val; } static nir_const_value -evaluate_fddx(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fddx(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -2699,8 +2781,8 @@ return _dst_val; } static nir_const_value -evaluate_fddx_coarse(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fddx_coarse(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -2739,8 +2821,8 @@ return _dst_val; } static nir_const_value -evaluate_fddx_fine(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fddx_fine(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -2779,8 +2861,8 @@ return _dst_val; } static nir_const_value -evaluate_fddy(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fddy(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -2819,8 +2901,8 @@ return _dst_val; } static nir_const_value -evaluate_fddy_coarse(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fddy_coarse(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -2859,8 +2941,8 @@ return _dst_val; } static nir_const_value -evaluate_fddy_fine(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fddy_fine(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -2899,8 +2981,8 @@ return _dst_val; } static nir_const_value -evaluate_fdiv(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fdiv(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -2910,9 +2992,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; float32_t dst = src0 / src1; @@ -2927,9 +3009,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; - float64_t src1 = + const float64_t src1 = _src[1].f64[_i]; float64_t dst = src0 / src1; @@ -2947,8 +3029,8 @@ return _dst_val; } static nir_const_value -evaluate_fdot2(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fdot2(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -2957,14 +3039,18 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], + 0, + 0, }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], _src[1].f32[1], + 0, + 0, }; struct float32_vec dst; @@ -2979,14 +3065,18 @@ - struct float64_vec src0 = { + const struct float64_vec src0 = { _src[0].f64[0], _src[0].f64[1], + 0, + 0, }; - struct float64_vec src1 = { + const struct float64_vec src1 = { _src[1].f64[0], _src[1].f64[1], + 0, + 0, }; struct float64_vec dst; @@ -3005,8 +3095,8 @@ return _dst_val; } static nir_const_value -evaluate_fdot3(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fdot3(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -3015,16 +3105,18 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], _src[0].f32[2], + 0, }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], _src[1].f32[1], _src[1].f32[2], + 0, }; struct float32_vec dst; @@ -3039,16 +3131,18 @@ - struct float64_vec src0 = { + const struct float64_vec src0 = { _src[0].f64[0], _src[0].f64[1], _src[0].f64[2], + 0, }; - struct float64_vec src1 = { + const struct float64_vec src1 = { _src[1].f64[0], _src[1].f64[1], _src[1].f64[2], + 0, }; struct float64_vec dst; @@ -3067,8 +3161,8 @@ return _dst_val; } static nir_const_value -evaluate_fdot4(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fdot4(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -3077,14 +3171,14 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], _src[0].f32[2], _src[0].f32[3], }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], _src[1].f32[1], _src[1].f32[2], @@ -3103,14 +3197,14 @@ - struct float64_vec src0 = { + const struct float64_vec src0 = { _src[0].f64[0], _src[0].f64[1], _src[0].f64[2], _src[0].f64[3], }; - struct float64_vec src1 = { + const struct float64_vec src1 = { _src[1].f64[0], _src[1].f64[1], _src[1].f64[2], @@ -3133,8 +3227,8 @@ return _dst_val; } static nir_const_value -evaluate_fdot_replicated2(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fdot_replicated2(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -3143,14 +3237,18 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], + 0, + 0, }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], _src[1].f32[1], + 0, + 0, }; struct float32_vec dst; @@ -3168,14 +3266,18 @@ - struct float64_vec src0 = { + const struct float64_vec src0 = { _src[0].f64[0], _src[0].f64[1], + 0, + 0, }; - struct float64_vec src1 = { + const struct float64_vec src1 = { _src[1].f64[0], _src[1].f64[1], + 0, + 0, }; struct float64_vec dst; @@ -3197,8 +3299,8 @@ return _dst_val; } static nir_const_value -evaluate_fdot_replicated3(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fdot_replicated3(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -3207,16 +3309,18 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], _src[0].f32[2], + 0, }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], _src[1].f32[1], _src[1].f32[2], + 0, }; struct float32_vec dst; @@ -3234,16 +3338,18 @@ - struct float64_vec src0 = { + const struct float64_vec src0 = { _src[0].f64[0], _src[0].f64[1], _src[0].f64[2], + 0, }; - struct float64_vec src1 = { + const struct float64_vec src1 = { _src[1].f64[0], _src[1].f64[1], _src[1].f64[2], + 0, }; struct float64_vec dst; @@ -3265,8 +3371,8 @@ return _dst_val; } static nir_const_value -evaluate_fdot_replicated4(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fdot_replicated4(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -3275,14 +3381,14 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], _src[0].f32[2], _src[0].f32[3], }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], _src[1].f32[1], _src[1].f32[2], @@ -3304,14 +3410,14 @@ - struct float64_vec src0 = { + const struct float64_vec src0 = { _src[0].f64[0], _src[0].f64[1], _src[0].f64[2], _src[0].f64[3], }; - struct float64_vec src1 = { + const struct float64_vec src1 = { _src[1].f64[0], _src[1].f64[1], _src[1].f64[2], @@ -3337,8 +3443,8 @@ return _dst_val; } static nir_const_value -evaluate_fdph(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fdph(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -3347,13 +3453,14 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], _src[0].f32[2], + 0, }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], _src[1].f32[1], _src[1].f32[2], @@ -3372,13 +3479,14 @@ - struct float64_vec src0 = { + const struct float64_vec src0 = { _src[0].f64[0], _src[0].f64[1], _src[0].f64[2], + 0, }; - struct float64_vec src1 = { + const struct float64_vec src1 = { _src[1].f64[0], _src[1].f64[1], _src[1].f64[2], @@ -3401,8 +3509,8 @@ return _dst_val; } static nir_const_value -evaluate_fdph_replicated(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fdph_replicated(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -3411,13 +3519,14 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], _src[0].f32[2], + 0, }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], _src[1].f32[1], _src[1].f32[2], @@ -3439,13 +3548,14 @@ - struct float64_vec src0 = { + const struct float64_vec src0 = { _src[0].f64[0], _src[0].f64[1], _src[0].f64[2], + 0, }; - struct float64_vec src1 = { + const struct float64_vec src1 = { _src[1].f64[0], _src[1].f64[1], _src[1].f64[2], @@ -3471,8 +3581,8 @@ return _dst_val; } static nir_const_value -evaluate_feq(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_feq(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -3482,9 +3592,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; bool32_t dst = src0 == src1; @@ -3499,9 +3609,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; - float64_t src1 = + const float64_t src1 = _src[1].f64[_i]; bool32_t dst = src0 == src1; @@ -3519,8 +3629,8 @@ return _dst_val; } static nir_const_value -evaluate_fexp2(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fexp2(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -3530,7 +3640,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; float32_t dst = exp2f(src0); @@ -3545,7 +3655,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; float64_t dst = exp2f(src0); @@ -3563,8 +3673,8 @@ return _dst_val; } static nir_const_value -evaluate_ffloor(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ffloor(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -3574,7 +3684,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; float32_t dst = bit_size == 64 ? floor(src0) : floorf(src0); @@ -3589,7 +3699,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; float64_t dst = bit_size == 64 ? floor(src0) : floorf(src0); @@ -3607,8 +3717,8 @@ return _dst_val; } static nir_const_value -evaluate_ffma(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ffma(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -3618,11 +3728,11 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; - float32_t src2 = + const float32_t src2 = _src[2].f32[_i]; float32_t dst = src0 * src1 + src2; @@ -3637,11 +3747,11 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; - float64_t src1 = + const float64_t src1 = _src[1].f64[_i]; - float64_t src2 = + const float64_t src2 = _src[2].f64[_i]; float64_t dst = src0 * src1 + src2; @@ -3659,8 +3769,8 @@ return _dst_val; } static nir_const_value -evaluate_ffract(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ffract(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -3670,7 +3780,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; float32_t dst = src0 - (bit_size == 64 ? floor(src0) : floorf(src0)); @@ -3685,7 +3795,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; float64_t dst = src0 - (bit_size == 64 ? floor(src0) : floorf(src0)); @@ -3703,8 +3813,8 @@ return _dst_val; } static nir_const_value -evaluate_fge(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fge(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -3714,9 +3824,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; bool32_t dst = src0 >= src1; @@ -3731,9 +3841,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; - float64_t src1 = + const float64_t src1 = _src[1].f64[_i]; bool32_t dst = src0 >= src1; @@ -3751,8 +3861,8 @@ return _dst_val; } static nir_const_value -evaluate_find_lsb(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_find_lsb(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -3762,10 +3872,11 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; int32_t dst; + dst = -1; for (unsigned bit = 0; bit < 32; bit++) { @@ -3786,10 +3897,11 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; int32_t dst; + dst = -1; for (unsigned bit = 0; bit < 32; bit++) { @@ -3813,8 +3925,8 @@ return _dst_val; } static nir_const_value -evaluate_flog2(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_flog2(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -3824,7 +3936,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; float32_t dst = log2f(src0); @@ -3839,7 +3951,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; float64_t dst = log2f(src0); @@ -3857,8 +3969,8 @@ return _dst_val; } static nir_const_value -evaluate_flrp(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_flrp(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -3868,11 +3980,11 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; - float32_t src2 = + const float32_t src2 = _src[2].f32[_i]; float32_t dst = src0 * (1 - src2) + src1 * src2; @@ -3887,11 +3999,11 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; - float64_t src1 = + const float64_t src1 = _src[1].f64[_i]; - float64_t src2 = + const float64_t src2 = _src[2].f64[_i]; float64_t dst = src0 * (1 - src2) + src1 * src2; @@ -3909,8 +4021,8 @@ return _dst_val; } static nir_const_value -evaluate_flt(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_flt(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -3920,9 +4032,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; bool32_t dst = src0 < src1; @@ -3937,9 +4049,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; - float64_t src1 = + const float64_t src1 = _src[1].f64[_i]; bool32_t dst = src0 < src1; @@ -3957,8 +4069,8 @@ return _dst_val; } static nir_const_value -evaluate_fmax(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fmax(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -3968,9 +4080,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; float32_t dst = fmaxf(src0, src1); @@ -3985,9 +4097,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; - float64_t src1 = + const float64_t src1 = _src[1].f64[_i]; float64_t dst = fmaxf(src0, src1); @@ -4005,8 +4117,8 @@ return _dst_val; } static nir_const_value -evaluate_fmin(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fmin(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -4016,9 +4128,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; float32_t dst = fminf(src0, src1); @@ -4033,9 +4145,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; - float64_t src1 = + const float64_t src1 = _src[1].f64[_i]; float64_t dst = fminf(src0, src1); @@ -4053,8 +4165,8 @@ return _dst_val; } static nir_const_value -evaluate_fmod(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fmod(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -4064,9 +4176,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; float32_t dst = src0 - src1 * floorf(src0 / src1); @@ -4081,9 +4193,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; - float64_t src1 = + const float64_t src1 = _src[1].f64[_i]; float64_t dst = src0 - src1 * floorf(src0 / src1); @@ -4101,8 +4213,8 @@ return _dst_val; } static nir_const_value -evaluate_fmov(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fmov(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -4112,7 +4224,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; float32_t dst = src0; @@ -4127,7 +4239,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; float64_t dst = src0; @@ -4145,8 +4257,8 @@ return _dst_val; } static nir_const_value -evaluate_fmul(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fmul(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -4156,9 +4268,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; float32_t dst = src0 * src1; @@ -4173,9 +4285,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; - float64_t src1 = + const float64_t src1 = _src[1].f64[_i]; float64_t dst = src0 * src1; @@ -4193,8 +4305,8 @@ return _dst_val; } static nir_const_value -evaluate_fne(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fne(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -4204,9 +4316,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; bool32_t dst = src0 != src1; @@ -4221,9 +4333,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; - float64_t src1 = + const float64_t src1 = _src[1].f64[_i]; bool32_t dst = src0 != src1; @@ -4241,8 +4353,8 @@ return _dst_val; } static nir_const_value -evaluate_fneg(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fneg(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -4252,7 +4364,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; float32_t dst = -src0; @@ -4267,7 +4379,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; float64_t dst = -src0; @@ -4285,8 +4397,8 @@ return _dst_val; } static nir_const_value -evaluate_fnoise1_1(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fnoise1_1(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -4323,8 +4435,8 @@ return _dst_val; } static nir_const_value -evaluate_fnoise1_2(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fnoise1_2(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -4361,8 +4473,8 @@ return _dst_val; } static nir_const_value -evaluate_fnoise1_3(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fnoise1_3(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -4399,8 +4511,8 @@ return _dst_val; } static nir_const_value -evaluate_fnoise1_4(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fnoise1_4(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -4437,8 +4549,8 @@ return _dst_val; } static nir_const_value -evaluate_fnoise2_1(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fnoise2_1(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -4477,8 +4589,8 @@ return _dst_val; } static nir_const_value -evaluate_fnoise2_2(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fnoise2_2(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -4517,8 +4629,8 @@ return _dst_val; } static nir_const_value -evaluate_fnoise2_3(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fnoise2_3(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -4557,8 +4669,8 @@ return _dst_val; } static nir_const_value -evaluate_fnoise2_4(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fnoise2_4(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -4597,8 +4709,8 @@ return _dst_val; } static nir_const_value -evaluate_fnoise3_1(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fnoise3_1(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -4639,8 +4751,8 @@ return _dst_val; } static nir_const_value -evaluate_fnoise3_2(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fnoise3_2(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -4681,8 +4793,8 @@ return _dst_val; } static nir_const_value -evaluate_fnoise3_3(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fnoise3_3(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -4723,8 +4835,8 @@ return _dst_val; } static nir_const_value -evaluate_fnoise3_4(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fnoise3_4(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -4765,8 +4877,8 @@ return _dst_val; } static nir_const_value -evaluate_fnoise4_1(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fnoise4_1(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -4809,8 +4921,8 @@ return _dst_val; } static nir_const_value -evaluate_fnoise4_2(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fnoise4_2(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -4853,8 +4965,8 @@ return _dst_val; } static nir_const_value -evaluate_fnoise4_3(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fnoise4_3(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -4897,8 +5009,8 @@ return _dst_val; } static nir_const_value -evaluate_fnoise4_4(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fnoise4_4(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -4941,8 +5053,8 @@ return _dst_val; } static nir_const_value -evaluate_fnot(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fnot(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -4952,7 +5064,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; float32_t dst = bit_size == 64 ? ((src0 == 0.0) ? 1.0 : 0.0f) : ((src0 == 0.0f) ? 1.0f : 0.0f); @@ -4967,7 +5079,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; float64_t dst = bit_size == 64 ? ((src0 == 0.0) ? 1.0 : 0.0f) : ((src0 == 0.0f) ? 1.0f : 0.0f); @@ -4985,8 +5097,8 @@ return _dst_val; } static nir_const_value -evaluate_for(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_for(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -4996,9 +5108,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; float32_t dst = ((src0 != 0.0f) || (src1 != 0.0f)) ? 1.0f : 0.0f; @@ -5013,9 +5125,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; float32_t dst = ((src0 != 0.0f) || (src1 != 0.0f)) ? 1.0f : 0.0f; @@ -5033,8 +5145,8 @@ return _dst_val; } static nir_const_value -evaluate_fpow(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fpow(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -5044,9 +5156,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; float32_t dst = bit_size == 64 ? powf(src0, src1) : pow(src0, src1); @@ -5061,9 +5173,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; - float64_t src1 = + const float64_t src1 = _src[1].f64[_i]; float64_t dst = bit_size == 64 ? powf(src0, src1) : pow(src0, src1); @@ -5081,8 +5193,8 @@ return _dst_val; } static nir_const_value -evaluate_fquantize2f16(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fquantize2f16(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -5092,7 +5204,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; float32_t dst = (fabs(src0) < ldexpf(1.0, -14)) ? copysignf(0.0f, src0) : _mesa_half_to_float(_mesa_float_to_half(src0)); @@ -5107,7 +5219,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; float64_t dst = (fabs(src0) < ldexpf(1.0, -14)) ? copysignf(0.0f, src0) : _mesa_half_to_float(_mesa_float_to_half(src0)); @@ -5125,8 +5237,8 @@ return _dst_val; } static nir_const_value -evaluate_frcp(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_frcp(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -5136,7 +5248,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; float32_t dst = bit_size == 64 ? 1.0 / src0 : 1.0f / src0; @@ -5151,7 +5263,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; float64_t dst = bit_size == 64 ? 1.0 / src0 : 1.0f / src0; @@ -5169,8 +5281,8 @@ return _dst_val; } static nir_const_value -evaluate_frem(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_frem(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -5180,9 +5292,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; float32_t dst = src0 - src1 * truncf(src0 / src1); @@ -5197,9 +5309,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; - float64_t src1 = + const float64_t src1 = _src[1].f64[_i]; float64_t dst = src0 - src1 * truncf(src0 / src1); @@ -5217,8 +5329,8 @@ return _dst_val; } static nir_const_value -evaluate_fround_even(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fround_even(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -5228,7 +5340,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; float32_t dst = bit_size == 64 ? _mesa_roundeven(src0) : _mesa_roundevenf(src0); @@ -5243,7 +5355,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; float64_t dst = bit_size == 64 ? _mesa_roundeven(src0) : _mesa_roundevenf(src0); @@ -5261,8 +5373,8 @@ return _dst_val; } static nir_const_value -evaluate_frsq(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_frsq(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -5272,7 +5384,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; float32_t dst = bit_size == 64 ? 1.0 / sqrt(src0) : 1.0f / sqrtf(src0); @@ -5287,7 +5399,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; float64_t dst = bit_size == 64 ? 1.0 / sqrt(src0) : 1.0f / sqrtf(src0); @@ -5305,8 +5417,8 @@ return _dst_val; } static nir_const_value -evaluate_fsat(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fsat(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -5316,7 +5428,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; float32_t dst = bit_size == 64 ? ((src0 > 1.0) ? 1.0 : ((src0 <= 0.0) ? 0.0 : src0)) : ((src0 > 1.0f) ? 1.0f : ((src0 <= 0.0f) ? 0.0f : src0)); @@ -5331,7 +5443,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; float64_t dst = bit_size == 64 ? ((src0 > 1.0) ? 1.0 : ((src0 <= 0.0) ? 0.0 : src0)) : ((src0 > 1.0f) ? 1.0f : ((src0 <= 0.0f) ? 0.0f : src0)); @@ -5349,8 +5461,8 @@ return _dst_val; } static nir_const_value -evaluate_fsign(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fsign(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -5360,7 +5472,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; float32_t dst = bit_size == 64 ? ((src0 == 0.0) ? 0.0 : ((src0 > 0.0) ? 1.0 : -1.0)) : ((src0 == 0.0f) ? 0.0f : ((src0 > 0.0f) ? 1.0f : -1.0f)); @@ -5375,7 +5487,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; float64_t dst = bit_size == 64 ? ((src0 == 0.0) ? 0.0 : ((src0 > 0.0) ? 1.0 : -1.0)) : ((src0 == 0.0f) ? 0.0f : ((src0 > 0.0f) ? 1.0f : -1.0f)); @@ -5393,8 +5505,8 @@ return _dst_val; } static nir_const_value -evaluate_fsin(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fsin(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -5404,7 +5516,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; float32_t dst = bit_size == 64 ? sin(src0) : sinf(src0); @@ -5419,7 +5531,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; float64_t dst = bit_size == 64 ? sin(src0) : sinf(src0); @@ -5437,8 +5549,8 @@ return _dst_val; } static nir_const_value -evaluate_fsqrt(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fsqrt(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -5448,7 +5560,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; float32_t dst = bit_size == 64 ? sqrt(src0) : sqrtf(src0); @@ -5463,7 +5575,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; float64_t dst = bit_size == 64 ? sqrt(src0) : sqrtf(src0); @@ -5481,8 +5593,8 @@ return _dst_val; } static nir_const_value -evaluate_fsub(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fsub(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -5492,9 +5604,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; float32_t dst = src0 - src1; @@ -5509,9 +5621,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; - float64_t src1 = + const float64_t src1 = _src[1].f64[_i]; float64_t dst = src0 - src1; @@ -5529,8 +5641,8 @@ return _dst_val; } static nir_const_value -evaluate_ftrunc(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ftrunc(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -5540,7 +5652,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; float32_t dst = bit_size == 64 ? trunc(src0) : truncf(src0); @@ -5555,7 +5667,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; float64_t dst = bit_size == 64 ? trunc(src0) : truncf(src0); @@ -5573,8 +5685,8 @@ return _dst_val; } static nir_const_value -evaluate_fxor(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_fxor(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -5584,9 +5696,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; float32_t dst = (src0 != 0.0f && src1 == 0.0f) || (src0 == 0.0f && src1 != 0.0f) ? 1.0f : 0.0f; @@ -5601,9 +5713,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; float32_t dst = (src0 != 0.0f && src1 == 0.0f) || (src0 == 0.0f && src1 != 0.0f) ? 1.0f : 0.0f; @@ -5621,8 +5733,8 @@ return _dst_val; } static nir_const_value -evaluate_i2b(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_i2b(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -5632,7 +5744,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; bool32_t dst = src0 != 0; @@ -5647,7 +5759,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; bool32_t dst = src0 != 0; @@ -5665,8 +5777,8 @@ return _dst_val; } static nir_const_value -evaluate_i2d(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_i2d(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -5676,7 +5788,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; float64_t dst = src0; @@ -5691,7 +5803,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; float64_t dst = src0; @@ -5709,8 +5821,8 @@ return _dst_val; } static nir_const_value -evaluate_i2f(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_i2f(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -5720,7 +5832,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; float32_t dst = src0; @@ -5735,7 +5847,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; float32_t dst = src0; @@ -5753,8 +5865,8 @@ return _dst_val; } static nir_const_value -evaluate_iabs(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_iabs(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -5764,7 +5876,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; int32_t dst = (src0 < 0) ? -src0 : src0; @@ -5779,7 +5891,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int64_t src0 = + const int64_t src0 = _src[0].i64[_i]; int64_t dst = (src0 < 0) ? -src0 : src0; @@ -5797,8 +5909,8 @@ return _dst_val; } static nir_const_value -evaluate_iadd(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_iadd(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -5808,9 +5920,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; int32_t dst = src0 + src1; @@ -5825,9 +5937,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int64_t src0 = + const int64_t src0 = _src[0].i64[_i]; - int64_t src1 = + const int64_t src1 = _src[1].i64[_i]; int64_t dst = src0 + src1; @@ -5845,8 +5957,8 @@ return _dst_val; } static nir_const_value -evaluate_iand(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_iand(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -5856,9 +5968,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; - uint32_t src1 = + const uint32_t src1 = _src[1].u32[_i]; uint32_t dst = src0 & src1; @@ -5873,9 +5985,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint64_t src0 = + const uint64_t src0 = _src[0].u64[_i]; - uint64_t src1 = + const uint64_t src1 = _src[1].u64[_i]; uint64_t dst = src0 & src1; @@ -5893,8 +6005,8 @@ return _dst_val; } static nir_const_value -evaluate_ibfe(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ibfe(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -5904,14 +6016,15 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; - int32_t src2 = + const int32_t src2 = _src[2].i32[_i]; int32_t dst; + int base = src0; int offset = src1, bits = src2; @@ -5936,14 +6049,15 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; - int32_t src2 = + const int32_t src2 = _src[2].i32[_i]; int32_t dst; + int base = src0; int offset = src1, bits = src2; @@ -5971,8 +6085,8 @@ return _dst_val; } static nir_const_value -evaluate_ibitfield_extract(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ibitfield_extract(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -5982,14 +6096,15 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; - int32_t src2 = + const int32_t src2 = _src[2].i32[_i]; int32_t dst; + int base = src0; int offset = src1, bits = src2; @@ -6012,14 +6127,15 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; - int32_t src2 = + const int32_t src2 = _src[2].i32[_i]; int32_t dst; + int base = src0; int offset = src1, bits = src2; @@ -6045,8 +6161,8 @@ return _dst_val; } static nir_const_value -evaluate_idiv(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_idiv(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -6056,9 +6172,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; int32_t dst = src0 / src1; @@ -6073,9 +6189,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int64_t src0 = + const int64_t src0 = _src[0].i64[_i]; - int64_t src1 = + const int64_t src1 = _src[1].i64[_i]; int64_t dst = src0 / src1; @@ -6093,8 +6209,8 @@ return _dst_val; } static nir_const_value -evaluate_ieq(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ieq(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -6104,9 +6220,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; bool32_t dst = src0 == src1; @@ -6121,9 +6237,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int64_t src0 = + const int64_t src0 = _src[0].i64[_i]; - int64_t src1 = + const int64_t src1 = _src[1].i64[_i]; bool32_t dst = src0 == src1; @@ -6141,8 +6257,8 @@ return _dst_val; } static nir_const_value -evaluate_ifind_msb(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ifind_msb(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -6152,10 +6268,11 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; int32_t dst; + dst = -1; for (int bit = 31; bit >= 0; bit--) { @@ -6180,10 +6297,11 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; int32_t dst; + dst = -1; for (int bit = 31; bit >= 0; bit--) { @@ -6211,8 +6329,8 @@ return _dst_val; } static nir_const_value -evaluate_ige(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ige(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -6222,9 +6340,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; bool32_t dst = src0 >= src1; @@ -6239,9 +6357,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int64_t src0 = + const int64_t src0 = _src[0].i64[_i]; - int64_t src1 = + const int64_t src1 = _src[1].i64[_i]; bool32_t dst = src0 >= src1; @@ -6259,8 +6377,8 @@ return _dst_val; } static nir_const_value -evaluate_ilt(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ilt(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -6270,9 +6388,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; bool32_t dst = src0 < src1; @@ -6287,9 +6405,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int64_t src0 = + const int64_t src0 = _src[0].i64[_i]; - int64_t src1 = + const int64_t src1 = _src[1].i64[_i]; bool32_t dst = src0 < src1; @@ -6307,8 +6425,8 @@ return _dst_val; } static nir_const_value -evaluate_imax(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_imax(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -6318,9 +6436,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; int32_t dst = src1 > src0 ? src1 : src0; @@ -6335,9 +6453,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int64_t src0 = + const int64_t src0 = _src[0].i64[_i]; - int64_t src1 = + const int64_t src1 = _src[1].i64[_i]; int64_t dst = src1 > src0 ? src1 : src0; @@ -6355,8 +6473,8 @@ return _dst_val; } static nir_const_value -evaluate_imin(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_imin(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -6366,9 +6484,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; int32_t dst = src1 > src0 ? src0 : src1; @@ -6383,9 +6501,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int64_t src0 = + const int64_t src0 = _src[0].i64[_i]; - int64_t src1 = + const int64_t src1 = _src[1].i64[_i]; int64_t dst = src1 > src0 ? src0 : src1; @@ -6403,8 +6521,8 @@ return _dst_val; } static nir_const_value -evaluate_imod(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_imod(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -6414,9 +6532,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; int32_t dst = src1 == 0 ? 0 : ((src0 % src1 == 0 || (src0 >= 0) == (src1 >= 0)) ? src0 % src1 : src0 % src1 + src1); @@ -6431,9 +6549,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int64_t src0 = + const int64_t src0 = _src[0].i64[_i]; - int64_t src1 = + const int64_t src1 = _src[1].i64[_i]; int64_t dst = src1 == 0 ? 0 : ((src0 % src1 == 0 || (src0 >= 0) == (src1 >= 0)) ? src0 % src1 : src0 % src1 + src1); @@ -6451,8 +6569,8 @@ return _dst_val; } static nir_const_value -evaluate_imov(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_imov(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -6462,7 +6580,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; int32_t dst = src0; @@ -6477,7 +6595,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int64_t src0 = + const int64_t src0 = _src[0].i64[_i]; int64_t dst = src0; @@ -6495,8 +6613,8 @@ return _dst_val; } static nir_const_value -evaluate_imul(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_imul(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -6506,9 +6624,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; int32_t dst = src0 * src1; @@ -6523,9 +6641,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int64_t src0 = + const int64_t src0 = _src[0].i64[_i]; - int64_t src1 = + const int64_t src1 = _src[1].i64[_i]; int64_t dst = src0 * src1; @@ -6543,8 +6661,8 @@ return _dst_val; } static nir_const_value -evaluate_imul_high(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_imul_high(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -6554,9 +6672,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; int32_t dst = (int32_t)(((int64_t) src0 * (int64_t) src1) >> 32); @@ -6571,9 +6689,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; int32_t dst = (int32_t)(((int64_t) src0 * (int64_t) src1) >> 32); @@ -6591,8 +6709,8 @@ return _dst_val; } static nir_const_value -evaluate_ine(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ine(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -6602,9 +6720,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; bool32_t dst = src0 != src1; @@ -6619,9 +6737,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int64_t src0 = + const int64_t src0 = _src[0].i64[_i]; - int64_t src1 = + const int64_t src1 = _src[1].i64[_i]; bool32_t dst = src0 != src1; @@ -6639,8 +6757,8 @@ return _dst_val; } static nir_const_value -evaluate_ineg(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ineg(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -6650,7 +6768,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; int32_t dst = -src0; @@ -6665,7 +6783,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int64_t src0 = + const int64_t src0 = _src[0].i64[_i]; int64_t dst = -src0; @@ -6683,8 +6801,8 @@ return _dst_val; } static nir_const_value -evaluate_inot(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_inot(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -6694,7 +6812,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; int32_t dst = ~src0; @@ -6709,7 +6827,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int64_t src0 = + const int64_t src0 = _src[0].i64[_i]; int64_t dst = ~src0; @@ -6727,8 +6845,8 @@ return _dst_val; } static nir_const_value -evaluate_ior(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ior(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -6738,9 +6856,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; - uint32_t src1 = + const uint32_t src1 = _src[1].u32[_i]; uint32_t dst = src0 | src1; @@ -6755,9 +6873,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint64_t src0 = + const uint64_t src0 = _src[0].u64[_i]; - uint64_t src1 = + const uint64_t src1 = _src[1].u64[_i]; uint64_t dst = src0 | src1; @@ -6775,8 +6893,8 @@ return _dst_val; } static nir_const_value -evaluate_irem(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_irem(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -6786,9 +6904,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; int32_t dst = src1 == 0 ? 0 : src0 % src1; @@ -6803,9 +6921,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int64_t src0 = + const int64_t src0 = _src[0].i64[_i]; - int64_t src1 = + const int64_t src1 = _src[1].i64[_i]; int64_t dst = src1 == 0 ? 0 : src0 % src1; @@ -6823,8 +6941,8 @@ return _dst_val; } static nir_const_value -evaluate_ishl(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ishl(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -6834,9 +6952,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; int32_t dst = src0 << src1; @@ -6851,9 +6969,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int64_t src0 = + const int64_t src0 = _src[0].i64[_i]; - int64_t src1 = + const int64_t src1 = _src[1].i64[_i]; int64_t dst = src0 << src1; @@ -6871,8 +6989,8 @@ return _dst_val; } static nir_const_value -evaluate_ishr(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ishr(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -6882,9 +7000,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; int32_t dst = src0 >> src1; @@ -6899,9 +7017,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int64_t src0 = + const int64_t src0 = _src[0].i64[_i]; - int64_t src1 = + const int64_t src1 = _src[1].i64[_i]; int64_t dst = src0 >> src1; @@ -6919,8 +7037,8 @@ return _dst_val; } static nir_const_value -evaluate_isign(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_isign(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -6930,7 +7048,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; int32_t dst = (src0 == 0) ? 0 : ((src0 > 0) ? 1 : -1); @@ -6945,7 +7063,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int64_t src0 = + const int64_t src0 = _src[0].i64[_i]; int64_t dst = (src0 == 0) ? 0 : ((src0 > 0) ? 1 : -1); @@ -6963,8 +7081,8 @@ return _dst_val; } static nir_const_value -evaluate_isub(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_isub(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -6974,9 +7092,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; int32_t dst = src0 - src1; @@ -6991,9 +7109,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int64_t src0 = + const int64_t src0 = _src[0].i64[_i]; - int64_t src1 = + const int64_t src1 = _src[1].i64[_i]; int64_t dst = src0 - src1; @@ -7011,8 +7129,8 @@ return _dst_val; } static nir_const_value -evaluate_ixor(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ixor(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -7022,9 +7140,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; - uint32_t src1 = + const uint32_t src1 = _src[1].u32[_i]; uint32_t dst = src0 ^ src1; @@ -7039,9 +7157,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint64_t src0 = + const uint64_t src0 = _src[0].u64[_i]; - uint64_t src1 = + const uint64_t src1 = _src[1].u64[_i]; uint64_t dst = src0 ^ src1; @@ -7059,8 +7177,8 @@ return _dst_val; } static nir_const_value -evaluate_ldexp(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ldexp(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -7070,12 +7188,13 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; float32_t dst; + dst = (bit_size == 64) ? ldexp(src0, src1) : ldexpf(src0, src1); /* flush denormals to zero. */ @@ -7093,12 +7212,13 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float64_t src0 = + const float64_t src0 = _src[0].f64[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; float64_t dst; + dst = (bit_size == 64) ? ldexp(src0, src1) : ldexpf(src0, src1); /* flush denormals to zero. */ @@ -7119,8 +7239,8 @@ return _dst_val; } static nir_const_value -evaluate_pack_double_2x32(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_pack_double_2x32(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -7129,9 +7249,11 @@ - struct uint32_vec src0 = { + const struct uint32_vec src0 = { _src[0].u32[0], _src[0].u32[1], + 0, + 0, }; struct uint64_vec dst; @@ -7146,9 +7268,11 @@ - struct uint32_vec src0 = { + const struct uint32_vec src0 = { _src[0].u32[0], _src[0].u32[1], + 0, + 0, }; struct uint64_vec dst; @@ -7167,8 +7291,8 @@ return _dst_val; } static nir_const_value -evaluate_pack_double_2x32_split(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_pack_double_2x32_split(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -7178,9 +7302,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; - uint32_t src1 = + const uint32_t src1 = _src[1].u32[_i]; uint64_t dst = src0 | ((uint64_t)src1 << 32); @@ -7195,9 +7319,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; - uint32_t src1 = + const uint32_t src1 = _src[1].u32[_i]; uint64_t dst = src0 | ((uint64_t)src1 << 32); @@ -7215,8 +7339,8 @@ return _dst_val; } static nir_const_value -evaluate_pack_half_2x16(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_pack_half_2x16(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -7225,9 +7349,11 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], + 0, + 0, }; struct uint32_vec dst; @@ -7245,9 +7371,11 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], + 0, + 0, }; struct uint32_vec dst; @@ -7269,8 +7397,8 @@ return _dst_val; } static nir_const_value -evaluate_pack_half_2x16_split(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_pack_half_2x16_split(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -7279,12 +7407,18 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], + 0, + 0, + 0, }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], + 0, + 0, + 0, }; struct uint32_vec dst; @@ -7299,12 +7433,18 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], + 0, + 0, + 0, }; - struct float32_vec src1 = { + const struct float32_vec src1 = { _src[1].f32[0], + 0, + 0, + 0, }; struct uint32_vec dst; @@ -7323,8 +7463,8 @@ return _dst_val; } static nir_const_value -evaluate_pack_snorm_2x16(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_pack_snorm_2x16(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -7333,9 +7473,11 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], + 0, + 0, }; struct uint32_vec dst; @@ -7353,9 +7495,11 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], + 0, + 0, }; struct uint32_vec dst; @@ -7377,8 +7521,8 @@ return _dst_val; } static nir_const_value -evaluate_pack_snorm_4x8(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_pack_snorm_4x8(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -7387,7 +7531,7 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], _src[0].f32[2], @@ -7411,7 +7555,7 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], _src[0].f32[2], @@ -7439,8 +7583,8 @@ return _dst_val; } static nir_const_value -evaluate_pack_unorm_2x16(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_pack_unorm_2x16(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -7449,9 +7593,11 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], + 0, + 0, }; struct uint32_vec dst; @@ -7469,9 +7615,11 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], + 0, + 0, }; struct uint32_vec dst; @@ -7493,8 +7641,8 @@ return _dst_val; } static nir_const_value -evaluate_pack_unorm_4x8(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_pack_unorm_4x8(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -7503,7 +7651,7 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], _src[0].f32[2], @@ -7527,7 +7675,7 @@ - struct float32_vec src0 = { + const struct float32_vec src0 = { _src[0].f32[0], _src[0].f32[1], _src[0].f32[2], @@ -7555,8 +7703,8 @@ return _dst_val; } static nir_const_value -evaluate_pack_uvec2_to_uint(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_pack_uvec2_to_uint(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -7565,9 +7713,11 @@ - struct uint32_vec src0 = { + const struct uint32_vec src0 = { _src[0].u32[0], _src[0].u32[1], + 0, + 0, }; struct uint32_vec dst; @@ -7584,9 +7734,11 @@ - struct uint32_vec src0 = { + const struct uint32_vec src0 = { _src[0].u32[0], _src[0].u32[1], + 0, + 0, }; struct uint32_vec dst; @@ -7607,8 +7759,8 @@ return _dst_val; } static nir_const_value -evaluate_pack_uvec4_to_uint(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_pack_uvec4_to_uint(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -7617,7 +7769,7 @@ - struct uint32_vec src0 = { + const struct uint32_vec src0 = { _src[0].u32[0], _src[0].u32[1], _src[0].u32[2], @@ -7641,7 +7793,7 @@ - struct uint32_vec src0 = { + const struct uint32_vec src0 = { _src[0].u32[0], _src[0].u32[1], _src[0].u32[2], @@ -7669,8 +7821,8 @@ return _dst_val; } static nir_const_value -evaluate_seq(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_seq(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -7680,9 +7832,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; float32_t dst = (src0 == src1) ? 1.0f : 0.0f; @@ -7697,9 +7849,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; float32_t dst = (src0 == src1) ? 1.0f : 0.0f; @@ -7717,8 +7869,8 @@ return _dst_val; } static nir_const_value -evaluate_sge(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_sge(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -7728,9 +7880,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; float32_t dst = (src0 >= src1) ? 1.0f : 0.0f; @@ -7745,9 +7897,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; float32_t dst = (src0 >= src1) ? 1.0f : 0.0f; @@ -7765,8 +7917,8 @@ return _dst_val; } static nir_const_value -evaluate_slt(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_slt(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -7776,9 +7928,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; float32_t dst = (src0 < src1) ? 1.0f : 0.0f; @@ -7793,9 +7945,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; float32_t dst = (src0 < src1) ? 1.0f : 0.0f; @@ -7813,8 +7965,8 @@ return _dst_val; } static nir_const_value -evaluate_sne(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_sne(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -7824,9 +7976,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; float32_t dst = (src0 != src1) ? 1.0f : 0.0f; @@ -7841,9 +7993,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - float32_t src0 = + const float32_t src0 = _src[0].f32[_i]; - float32_t src1 = + const float32_t src1 = _src[1].f32[_i]; float32_t dst = (src0 != src1) ? 1.0f : 0.0f; @@ -7861,8 +8013,8 @@ return _dst_val; } static nir_const_value -evaluate_u2d(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_u2d(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -7872,7 +8024,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; float64_t dst = src0; @@ -7887,7 +8039,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; float64_t dst = src0; @@ -7905,8 +8057,8 @@ return _dst_val; } static nir_const_value -evaluate_u2f(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_u2f(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -7916,7 +8068,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; float32_t dst = src0; @@ -7931,7 +8083,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; float32_t dst = src0; @@ -7949,8 +8101,8 @@ return _dst_val; } static nir_const_value -evaluate_uadd_carry(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_uadd_carry(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -7960,9 +8112,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; - uint32_t src1 = + const uint32_t src1 = _src[1].u32[_i]; uint32_t dst = src0 + src1 < src0; @@ -7977,9 +8129,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint64_t src0 = + const uint64_t src0 = _src[0].u64[_i]; - uint64_t src1 = + const uint64_t src1 = _src[1].u64[_i]; uint64_t dst = src0 + src1 < src0; @@ -7997,8 +8149,8 @@ return _dst_val; } static nir_const_value -evaluate_ubfe(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ubfe(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -8008,14 +8160,15 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; - int32_t src2 = + const int32_t src2 = _src[2].i32[_i]; uint32_t dst; + unsigned base = src0; int offset = src1, bits = src2; @@ -8040,14 +8193,15 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; - int32_t src2 = + const int32_t src2 = _src[2].i32[_i]; uint32_t dst; + unsigned base = src0; int offset = src1, bits = src2; @@ -8075,8 +8229,8 @@ return _dst_val; } static nir_const_value -evaluate_ubitfield_extract(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ubitfield_extract(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -8086,14 +8240,15 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; - int32_t src2 = + const int32_t src2 = _src[2].i32[_i]; uint32_t dst; + unsigned base = src0; int offset = src1, bits = src2; @@ -8116,14 +8271,15 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; - int32_t src2 = + const int32_t src2 = _src[2].i32[_i]; uint32_t dst; + unsigned base = src0; int offset = src1, bits = src2; @@ -8149,8 +8305,8 @@ return _dst_val; } static nir_const_value -evaluate_udiv(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_udiv(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -8160,9 +8316,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; - uint32_t src1 = + const uint32_t src1 = _src[1].u32[_i]; uint32_t dst = src0 / src1; @@ -8177,9 +8333,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint64_t src0 = + const uint64_t src0 = _src[0].u64[_i]; - uint64_t src1 = + const uint64_t src1 = _src[1].u64[_i]; uint64_t dst = src0 / src1; @@ -8197,8 +8353,8 @@ return _dst_val; } static nir_const_value -evaluate_ufind_msb(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ufind_msb(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -8208,10 +8364,11 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; int32_t dst; + dst = -1; for (int bit = 31; bit > 0; bit--) { @@ -8232,10 +8389,11 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; int32_t dst; + dst = -1; for (int bit = 31; bit > 0; bit--) { @@ -8259,8 +8417,8 @@ return _dst_val; } static nir_const_value -evaluate_uge(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_uge(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -8270,9 +8428,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; - uint32_t src1 = + const uint32_t src1 = _src[1].u32[_i]; bool32_t dst = src0 >= src1; @@ -8287,9 +8445,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint64_t src0 = + const uint64_t src0 = _src[0].u64[_i]; - uint64_t src1 = + const uint64_t src1 = _src[1].u64[_i]; bool32_t dst = src0 >= src1; @@ -8307,8 +8465,8 @@ return _dst_val; } static nir_const_value -evaluate_ult(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ult(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -8318,9 +8476,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; - uint32_t src1 = + const uint32_t src1 = _src[1].u32[_i]; bool32_t dst = src0 < src1; @@ -8335,9 +8493,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint64_t src0 = + const uint64_t src0 = _src[0].u64[_i]; - uint64_t src1 = + const uint64_t src1 = _src[1].u64[_i]; bool32_t dst = src0 < src1; @@ -8355,8 +8513,8 @@ return _dst_val; } static nir_const_value -evaluate_umax(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_umax(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -8366,9 +8524,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; - uint32_t src1 = + const uint32_t src1 = _src[1].u32[_i]; uint32_t dst = src1 > src0 ? src1 : src0; @@ -8383,9 +8541,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint64_t src0 = + const uint64_t src0 = _src[0].u64[_i]; - uint64_t src1 = + const uint64_t src1 = _src[1].u64[_i]; uint64_t dst = src1 > src0 ? src1 : src0; @@ -8403,8 +8561,8 @@ return _dst_val; } static nir_const_value -evaluate_umax_4x8(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_umax_4x8(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -8414,12 +8572,13 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; int32_t dst; + dst = 0; for (int i = 0; i < 32; i += 8) { @@ -8437,12 +8596,13 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; int32_t dst; + dst = 0; for (int i = 0; i < 32; i += 8) { @@ -8463,8 +8623,8 @@ return _dst_val; } static nir_const_value -evaluate_umin(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_umin(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -8474,9 +8634,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; - uint32_t src1 = + const uint32_t src1 = _src[1].u32[_i]; uint32_t dst = src1 > src0 ? src0 : src1; @@ -8491,9 +8651,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint64_t src0 = + const uint64_t src0 = _src[0].u64[_i]; - uint64_t src1 = + const uint64_t src1 = _src[1].u64[_i]; uint64_t dst = src1 > src0 ? src0 : src1; @@ -8511,8 +8671,8 @@ return _dst_val; } static nir_const_value -evaluate_umin_4x8(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_umin_4x8(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -8522,12 +8682,13 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; int32_t dst; + dst = 0; for (int i = 0; i < 32; i += 8) { @@ -8545,12 +8706,13 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; int32_t dst; + dst = 0; for (int i = 0; i < 32; i += 8) { @@ -8571,8 +8733,8 @@ return _dst_val; } static nir_const_value -evaluate_umod(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_umod(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -8582,9 +8744,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; - uint32_t src1 = + const uint32_t src1 = _src[1].u32[_i]; uint32_t dst = src1 == 0 ? 0 : src0 % src1; @@ -8599,9 +8761,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint64_t src0 = + const uint64_t src0 = _src[0].u64[_i]; - uint64_t src1 = + const uint64_t src1 = _src[1].u64[_i]; uint64_t dst = src1 == 0 ? 0 : src0 % src1; @@ -8619,8 +8781,8 @@ return _dst_val; } static nir_const_value -evaluate_umul_high(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_umul_high(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -8630,9 +8792,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; - uint32_t src1 = + const uint32_t src1 = _src[1].u32[_i]; uint32_t dst = (uint32_t)(((uint64_t) src0 * (uint64_t) src1) >> 32); @@ -8647,9 +8809,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; - uint32_t src1 = + const uint32_t src1 = _src[1].u32[_i]; uint32_t dst = (uint32_t)(((uint64_t) src0 * (uint64_t) src1) >> 32); @@ -8667,8 +8829,8 @@ return _dst_val; } static nir_const_value -evaluate_umul_unorm_4x8(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_umul_unorm_4x8(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -8678,12 +8840,13 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; int32_t dst; + dst = 0; for (int i = 0; i < 32; i += 8) { @@ -8703,12 +8866,13 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; int32_t dst; + dst = 0; for (int i = 0; i < 32; i += 8) { @@ -8731,8 +8895,8 @@ return _dst_val; } static nir_const_value -evaluate_unpack_double_2x32(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_unpack_double_2x32(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -8741,8 +8905,11 @@ - struct uint64_vec src0 = { + const struct uint64_vec src0 = { _src[0].u64[0], + 0, + 0, + 0, }; struct uint32_vec dst; @@ -8758,8 +8925,11 @@ - struct uint64_vec src0 = { + const struct uint64_vec src0 = { _src[0].u64[0], + 0, + 0, + 0, }; struct uint32_vec dst; @@ -8779,8 +8949,8 @@ return _dst_val; } static nir_const_value -evaluate_unpack_double_2x32_split_x(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_unpack_double_2x32_split_x(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -8790,7 +8960,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint64_t src0 = + const uint64_t src0 = _src[0].u64[_i]; uint32_t dst = src0; @@ -8805,7 +8975,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint64_t src0 = + const uint64_t src0 = _src[0].u64[_i]; uint32_t dst = src0; @@ -8823,8 +8993,8 @@ return _dst_val; } static nir_const_value -evaluate_unpack_double_2x32_split_y(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_unpack_double_2x32_split_y(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -8834,7 +9004,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint64_t src0 = + const uint64_t src0 = _src[0].u64[_i]; uint32_t dst = src0 >> 32; @@ -8849,7 +9019,7 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint64_t src0 = + const uint64_t src0 = _src[0].u64[_i]; uint32_t dst = src0 >> 32; @@ -8867,8 +9037,8 @@ return _dst_val; } static nir_const_value -evaluate_unpack_half_2x16(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_unpack_half_2x16(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -8877,8 +9047,11 @@ - struct uint32_vec src0 = { + const struct uint32_vec src0 = { _src[0].u32[0], + 0, + 0, + 0, }; struct float32_vec dst; @@ -8897,8 +9070,11 @@ - struct uint32_vec src0 = { + const struct uint32_vec src0 = { _src[0].u32[0], + 0, + 0, + 0, }; struct float32_vec dst; @@ -8921,8 +9097,8 @@ return _dst_val; } static nir_const_value -evaluate_unpack_half_2x16_split_x(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_unpack_half_2x16_split_x(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -8931,8 +9107,11 @@ - struct uint32_vec src0 = { + const struct uint32_vec src0 = { _src[0].u32[0], + 0, + 0, + 0, }; struct float32_vec dst; @@ -8947,8 +9126,11 @@ - struct uint32_vec src0 = { + const struct uint32_vec src0 = { _src[0].u32[0], + 0, + 0, + 0, }; struct float32_vec dst; @@ -8967,8 +9149,8 @@ return _dst_val; } static nir_const_value -evaluate_unpack_half_2x16_split_y(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_unpack_half_2x16_split_y(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -8977,8 +9159,11 @@ - struct uint32_vec src0 = { + const struct uint32_vec src0 = { _src[0].u32[0], + 0, + 0, + 0, }; struct float32_vec dst; @@ -8993,8 +9178,11 @@ - struct uint32_vec src0 = { + const struct uint32_vec src0 = { _src[0].u32[0], + 0, + 0, + 0, }; struct float32_vec dst; @@ -9013,8 +9201,8 @@ return _dst_val; } static nir_const_value -evaluate_unpack_snorm_2x16(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_unpack_snorm_2x16(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -9023,8 +9211,11 @@ - struct uint32_vec src0 = { + const struct uint32_vec src0 = { _src[0].u32[0], + 0, + 0, + 0, }; struct float32_vec dst; @@ -9043,8 +9234,11 @@ - struct uint32_vec src0 = { + const struct uint32_vec src0 = { _src[0].u32[0], + 0, + 0, + 0, }; struct float32_vec dst; @@ -9067,8 +9261,8 @@ return _dst_val; } static nir_const_value -evaluate_unpack_snorm_4x8(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_unpack_snorm_4x8(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -9077,8 +9271,11 @@ - struct uint32_vec src0 = { + const struct uint32_vec src0 = { _src[0].u32[0], + 0, + 0, + 0, }; struct float32_vec dst; @@ -9101,8 +9298,11 @@ - struct uint32_vec src0 = { + const struct uint32_vec src0 = { _src[0].u32[0], + 0, + 0, + 0, }; struct float32_vec dst; @@ -9129,8 +9329,8 @@ return _dst_val; } static nir_const_value -evaluate_unpack_unorm_2x16(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_unpack_unorm_2x16(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -9139,8 +9339,11 @@ - struct uint32_vec src0 = { + const struct uint32_vec src0 = { _src[0].u32[0], + 0, + 0, + 0, }; struct float32_vec dst; @@ -9159,8 +9362,11 @@ - struct uint32_vec src0 = { + const struct uint32_vec src0 = { _src[0].u32[0], + 0, + 0, + 0, }; struct float32_vec dst; @@ -9183,8 +9389,8 @@ return _dst_val; } static nir_const_value -evaluate_unpack_unorm_4x8(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_unpack_unorm_4x8(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -9193,8 +9399,11 @@ - struct uint32_vec src0 = { + const struct uint32_vec src0 = { _src[0].u32[0], + 0, + 0, + 0, }; struct float32_vec dst; @@ -9217,8 +9426,11 @@ - struct uint32_vec src0 = { + const struct uint32_vec src0 = { _src[0].u32[0], + 0, + 0, + 0, }; struct float32_vec dst; @@ -9245,8 +9457,8 @@ return _dst_val; } static nir_const_value -evaluate_usadd_4x8(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_usadd_4x8(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -9256,12 +9468,13 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; int32_t dst; + dst = 0; for (int i = 0; i < 32; i += 8) { @@ -9279,12 +9492,13 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; int32_t dst; + dst = 0; for (int i = 0; i < 32; i += 8) { @@ -9305,8 +9519,8 @@ return _dst_val; } static nir_const_value -evaluate_ushr(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ushr(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -9316,9 +9530,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; - uint32_t src1 = + const uint32_t src1 = _src[1].u32[_i]; uint32_t dst = src0 >> src1; @@ -9333,9 +9547,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint64_t src0 = + const uint64_t src0 = _src[0].u64[_i]; - uint64_t src1 = + const uint64_t src1 = _src[1].u64[_i]; uint64_t dst = src0 >> src1; @@ -9353,8 +9567,8 @@ return _dst_val; } static nir_const_value -evaluate_ussub_4x8(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_ussub_4x8(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -9364,12 +9578,13 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; int32_t dst; + dst = 0; for (int i = 0; i < 32; i += 8) { @@ -9390,12 +9605,13 @@ for (unsigned _i = 0; _i < num_components; _i++) { - int32_t src0 = + const int32_t src0 = _src[0].i32[_i]; - int32_t src1 = + const int32_t src1 = _src[1].i32[_i]; int32_t dst; + dst = 0; for (int i = 0; i < 32; i += 8) { @@ -9419,8 +9635,8 @@ return _dst_val; } static nir_const_value -evaluate_usub_borrow(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_usub_borrow(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -9430,9 +9646,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint32_t src0 = + const uint32_t src0 = _src[0].u32[_i]; - uint32_t src1 = + const uint32_t src1 = _src[1].u32[_i]; uint32_t dst = src0 < src1; @@ -9447,9 +9663,9 @@ for (unsigned _i = 0; _i < num_components; _i++) { - uint64_t src0 = + const uint64_t src0 = _src[0].u64[_i]; - uint64_t src1 = + const uint64_t src1 = _src[1].u64[_i]; uint64_t dst = src0 < src1; @@ -9467,8 +9683,8 @@ return _dst_val; } static nir_const_value -evaluate_vec2(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_vec2(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -9477,12 +9693,18 @@ - struct uint32_vec src0 = { + const struct uint32_vec src0 = { _src[0].u32[0], + 0, + 0, + 0, }; - struct uint32_vec src1 = { + const struct uint32_vec src1 = { _src[1].u32[0], + 0, + 0, + 0, }; struct uint32_vec dst; @@ -9501,12 +9723,18 @@ - struct uint64_vec src0 = { + const struct uint64_vec src0 = { _src[0].u64[0], + 0, + 0, + 0, }; - struct uint64_vec src1 = { + const struct uint64_vec src1 = { _src[1].u64[0], + 0, + 0, + 0, }; struct uint64_vec dst; @@ -9529,8 +9757,8 @@ return _dst_val; } static nir_const_value -evaluate_vec3(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_vec3(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -9539,16 +9767,25 @@ - struct uint32_vec src0 = { + const struct uint32_vec src0 = { _src[0].u32[0], + 0, + 0, + 0, }; - struct uint32_vec src1 = { + const struct uint32_vec src1 = { _src[1].u32[0], + 0, + 0, + 0, }; - struct uint32_vec src2 = { + const struct uint32_vec src2 = { _src[2].u32[0], + 0, + 0, + 0, }; struct uint32_vec dst; @@ -9569,16 +9806,25 @@ - struct uint64_vec src0 = { + const struct uint64_vec src0 = { _src[0].u64[0], + 0, + 0, + 0, }; - struct uint64_vec src1 = { + const struct uint64_vec src1 = { _src[1].u64[0], + 0, + 0, + 0, }; - struct uint64_vec src2 = { + const struct uint64_vec src2 = { _src[2].u64[0], + 0, + 0, + 0, }; struct uint64_vec dst; @@ -9603,8 +9849,8 @@ return _dst_val; } static nir_const_value -evaluate_vec4(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_vec4(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -9613,20 +9859,32 @@ - struct uint32_vec src0 = { + const struct uint32_vec src0 = { _src[0].u32[0], + 0, + 0, + 0, }; - struct uint32_vec src1 = { + const struct uint32_vec src1 = { _src[1].u32[0], + 0, + 0, + 0, }; - struct uint32_vec src2 = { + const struct uint32_vec src2 = { _src[2].u32[0], + 0, + 0, + 0, }; - struct uint32_vec src3 = { + const struct uint32_vec src3 = { _src[3].u32[0], + 0, + 0, + 0, }; struct uint32_vec dst; @@ -9649,20 +9907,32 @@ - struct uint64_vec src0 = { + const struct uint64_vec src0 = { _src[0].u64[0], + 0, + 0, + 0, }; - struct uint64_vec src1 = { + const struct uint64_vec src1 = { _src[1].u64[0], + 0, + 0, + 0, }; - struct uint64_vec src2 = { + const struct uint64_vec src2 = { _src[2].u64[0], + 0, + 0, + 0, }; - struct uint64_vec src3 = { + const struct uint64_vec src3 = { _src[3].u64[0], + 0, + 0, + 0, }; struct uint64_vec dst; @@ -9694,742 +9964,374 @@ unsigned bit_width, nir_const_value *src) { switch (op) { - case nir_op_b2f: { + case nir_op_b2f: return evaluate_b2f(num_components, bit_width, src); - break; - } - case nir_op_b2i: { + case nir_op_b2i: return evaluate_b2i(num_components, bit_width, src); - break; - } - case nir_op_ball_fequal2: { + case nir_op_ball_fequal2: return evaluate_ball_fequal2(num_components, bit_width, src); - break; - } - case nir_op_ball_fequal3: { + case nir_op_ball_fequal3: return evaluate_ball_fequal3(num_components, bit_width, src); - break; - } - case nir_op_ball_fequal4: { + case nir_op_ball_fequal4: return evaluate_ball_fequal4(num_components, bit_width, src); - break; - } - case nir_op_ball_iequal2: { + case nir_op_ball_iequal2: return evaluate_ball_iequal2(num_components, bit_width, src); - break; - } - case nir_op_ball_iequal3: { + case nir_op_ball_iequal3: return evaluate_ball_iequal3(num_components, bit_width, src); - break; - } - case nir_op_ball_iequal4: { + case nir_op_ball_iequal4: return evaluate_ball_iequal4(num_components, bit_width, src); - break; - } - case nir_op_bany_fnequal2: { + case nir_op_bany_fnequal2: return evaluate_bany_fnequal2(num_components, bit_width, src); - break; - } - case nir_op_bany_fnequal3: { + case nir_op_bany_fnequal3: return evaluate_bany_fnequal3(num_components, bit_width, src); - break; - } - case nir_op_bany_fnequal4: { + case nir_op_bany_fnequal4: return evaluate_bany_fnequal4(num_components, bit_width, src); - break; - } - case nir_op_bany_inequal2: { + case nir_op_bany_inequal2: return evaluate_bany_inequal2(num_components, bit_width, src); - break; - } - case nir_op_bany_inequal3: { + case nir_op_bany_inequal3: return evaluate_bany_inequal3(num_components, bit_width, src); - break; - } - case nir_op_bany_inequal4: { + case nir_op_bany_inequal4: return evaluate_bany_inequal4(num_components, bit_width, src); - break; - } - case nir_op_bcsel: { + case nir_op_bcsel: return evaluate_bcsel(num_components, bit_width, src); - break; - } - case nir_op_bfi: { + case nir_op_bfi: return evaluate_bfi(num_components, bit_width, src); - break; - } - case nir_op_bfm: { + case nir_op_bfm: return evaluate_bfm(num_components, bit_width, src); - break; - } - case nir_op_bit_count: { + case nir_op_bit_count: return evaluate_bit_count(num_components, bit_width, src); - break; - } - case nir_op_bitfield_insert: { + case nir_op_bitfield_insert: return evaluate_bitfield_insert(num_components, bit_width, src); - break; - } - case nir_op_bitfield_reverse: { + case nir_op_bitfield_reverse: return evaluate_bitfield_reverse(num_components, bit_width, src); - break; - } - case nir_op_d2b: { + case nir_op_d2b: return evaluate_d2b(num_components, bit_width, src); - break; - } - case nir_op_d2f: { + case nir_op_d2f: return evaluate_d2f(num_components, bit_width, src); - break; - } - case nir_op_d2i: { + case nir_op_d2i: return evaluate_d2i(num_components, bit_width, src); - break; - } - case nir_op_d2u: { + case nir_op_d2u: return evaluate_d2u(num_components, bit_width, src); - break; - } - case nir_op_extract_i16: { + case nir_op_extract_i16: return evaluate_extract_i16(num_components, bit_width, src); - break; - } - case nir_op_extract_i8: { + case nir_op_extract_i8: return evaluate_extract_i8(num_components, bit_width, src); - break; - } - case nir_op_extract_u16: { + case nir_op_extract_u16: return evaluate_extract_u16(num_components, bit_width, src); - break; - } - case nir_op_extract_u8: { + case nir_op_extract_u8: return evaluate_extract_u8(num_components, bit_width, src); - break; - } - case nir_op_f2b: { + case nir_op_f2b: return evaluate_f2b(num_components, bit_width, src); - break; - } - case nir_op_f2d: { + case nir_op_f2d: return evaluate_f2d(num_components, bit_width, src); - break; - } - case nir_op_f2i: { + case nir_op_f2i: return evaluate_f2i(num_components, bit_width, src); - break; - } - case nir_op_f2u: { + case nir_op_f2u: return evaluate_f2u(num_components, bit_width, src); - break; - } - case nir_op_fabs: { + case nir_op_fabs: return evaluate_fabs(num_components, bit_width, src); - break; - } - case nir_op_fadd: { + case nir_op_fadd: return evaluate_fadd(num_components, bit_width, src); - break; - } - case nir_op_fall_equal2: { + case nir_op_fall_equal2: return evaluate_fall_equal2(num_components, bit_width, src); - break; - } - case nir_op_fall_equal3: { + case nir_op_fall_equal3: return evaluate_fall_equal3(num_components, bit_width, src); - break; - } - case nir_op_fall_equal4: { + case nir_op_fall_equal4: return evaluate_fall_equal4(num_components, bit_width, src); - break; - } - case nir_op_fand: { + case nir_op_fand: return evaluate_fand(num_components, bit_width, src); - break; - } - case nir_op_fany_nequal2: { + case nir_op_fany_nequal2: return evaluate_fany_nequal2(num_components, bit_width, src); - break; - } - case nir_op_fany_nequal3: { + case nir_op_fany_nequal3: return evaluate_fany_nequal3(num_components, bit_width, src); - break; - } - case nir_op_fany_nequal4: { + case nir_op_fany_nequal4: return evaluate_fany_nequal4(num_components, bit_width, src); - break; - } - case nir_op_fceil: { + case nir_op_fceil: return evaluate_fceil(num_components, bit_width, src); - break; - } - case nir_op_fcos: { + case nir_op_fcos: return evaluate_fcos(num_components, bit_width, src); - break; - } - case nir_op_fcsel: { + case nir_op_fcsel: return evaluate_fcsel(num_components, bit_width, src); - break; - } - case nir_op_fddx: { + case nir_op_fddx: return evaluate_fddx(num_components, bit_width, src); - break; - } - case nir_op_fddx_coarse: { + case nir_op_fddx_coarse: return evaluate_fddx_coarse(num_components, bit_width, src); - break; - } - case nir_op_fddx_fine: { + case nir_op_fddx_fine: return evaluate_fddx_fine(num_components, bit_width, src); - break; - } - case nir_op_fddy: { + case nir_op_fddy: return evaluate_fddy(num_components, bit_width, src); - break; - } - case nir_op_fddy_coarse: { + case nir_op_fddy_coarse: return evaluate_fddy_coarse(num_components, bit_width, src); - break; - } - case nir_op_fddy_fine: { + case nir_op_fddy_fine: return evaluate_fddy_fine(num_components, bit_width, src); - break; - } - case nir_op_fdiv: { + case nir_op_fdiv: return evaluate_fdiv(num_components, bit_width, src); - break; - } - case nir_op_fdot2: { + case nir_op_fdot2: return evaluate_fdot2(num_components, bit_width, src); - break; - } - case nir_op_fdot3: { + case nir_op_fdot3: return evaluate_fdot3(num_components, bit_width, src); - break; - } - case nir_op_fdot4: { + case nir_op_fdot4: return evaluate_fdot4(num_components, bit_width, src); - break; - } - case nir_op_fdot_replicated2: { + case nir_op_fdot_replicated2: return evaluate_fdot_replicated2(num_components, bit_width, src); - break; - } - case nir_op_fdot_replicated3: { + case nir_op_fdot_replicated3: return evaluate_fdot_replicated3(num_components, bit_width, src); - break; - } - case nir_op_fdot_replicated4: { + case nir_op_fdot_replicated4: return evaluate_fdot_replicated4(num_components, bit_width, src); - break; - } - case nir_op_fdph: { + case nir_op_fdph: return evaluate_fdph(num_components, bit_width, src); - break; - } - case nir_op_fdph_replicated: { + case nir_op_fdph_replicated: return evaluate_fdph_replicated(num_components, bit_width, src); - break; - } - case nir_op_feq: { + case nir_op_feq: return evaluate_feq(num_components, bit_width, src); - break; - } - case nir_op_fexp2: { + case nir_op_fexp2: return evaluate_fexp2(num_components, bit_width, src); - break; - } - case nir_op_ffloor: { + case nir_op_ffloor: return evaluate_ffloor(num_components, bit_width, src); - break; - } - case nir_op_ffma: { + case nir_op_ffma: return evaluate_ffma(num_components, bit_width, src); - break; - } - case nir_op_ffract: { + case nir_op_ffract: return evaluate_ffract(num_components, bit_width, src); - break; - } - case nir_op_fge: { + case nir_op_fge: return evaluate_fge(num_components, bit_width, src); - break; - } - case nir_op_find_lsb: { + case nir_op_find_lsb: return evaluate_find_lsb(num_components, bit_width, src); - break; - } - case nir_op_flog2: { + case nir_op_flog2: return evaluate_flog2(num_components, bit_width, src); - break; - } - case nir_op_flrp: { + case nir_op_flrp: return evaluate_flrp(num_components, bit_width, src); - break; - } - case nir_op_flt: { + case nir_op_flt: return evaluate_flt(num_components, bit_width, src); - break; - } - case nir_op_fmax: { + case nir_op_fmax: return evaluate_fmax(num_components, bit_width, src); - break; - } - case nir_op_fmin: { + case nir_op_fmin: return evaluate_fmin(num_components, bit_width, src); - break; - } - case nir_op_fmod: { + case nir_op_fmod: return evaluate_fmod(num_components, bit_width, src); - break; - } - case nir_op_fmov: { + case nir_op_fmov: return evaluate_fmov(num_components, bit_width, src); - break; - } - case nir_op_fmul: { + case nir_op_fmul: return evaluate_fmul(num_components, bit_width, src); - break; - } - case nir_op_fne: { + case nir_op_fne: return evaluate_fne(num_components, bit_width, src); - break; - } - case nir_op_fneg: { + case nir_op_fneg: return evaluate_fneg(num_components, bit_width, src); - break; - } - case nir_op_fnoise1_1: { + case nir_op_fnoise1_1: return evaluate_fnoise1_1(num_components, bit_width, src); - break; - } - case nir_op_fnoise1_2: { + case nir_op_fnoise1_2: return evaluate_fnoise1_2(num_components, bit_width, src); - break; - } - case nir_op_fnoise1_3: { + case nir_op_fnoise1_3: return evaluate_fnoise1_3(num_components, bit_width, src); - break; - } - case nir_op_fnoise1_4: { + case nir_op_fnoise1_4: return evaluate_fnoise1_4(num_components, bit_width, src); - break; - } - case nir_op_fnoise2_1: { + case nir_op_fnoise2_1: return evaluate_fnoise2_1(num_components, bit_width, src); - break; - } - case nir_op_fnoise2_2: { + case nir_op_fnoise2_2: return evaluate_fnoise2_2(num_components, bit_width, src); - break; - } - case nir_op_fnoise2_3: { + case nir_op_fnoise2_3: return evaluate_fnoise2_3(num_components, bit_width, src); - break; - } - case nir_op_fnoise2_4: { + case nir_op_fnoise2_4: return evaluate_fnoise2_4(num_components, bit_width, src); - break; - } - case nir_op_fnoise3_1: { + case nir_op_fnoise3_1: return evaluate_fnoise3_1(num_components, bit_width, src); - break; - } - case nir_op_fnoise3_2: { + case nir_op_fnoise3_2: return evaluate_fnoise3_2(num_components, bit_width, src); - break; - } - case nir_op_fnoise3_3: { + case nir_op_fnoise3_3: return evaluate_fnoise3_3(num_components, bit_width, src); - break; - } - case nir_op_fnoise3_4: { + case nir_op_fnoise3_4: return evaluate_fnoise3_4(num_components, bit_width, src); - break; - } - case nir_op_fnoise4_1: { + case nir_op_fnoise4_1: return evaluate_fnoise4_1(num_components, bit_width, src); - break; - } - case nir_op_fnoise4_2: { + case nir_op_fnoise4_2: return evaluate_fnoise4_2(num_components, bit_width, src); - break; - } - case nir_op_fnoise4_3: { + case nir_op_fnoise4_3: return evaluate_fnoise4_3(num_components, bit_width, src); - break; - } - case nir_op_fnoise4_4: { + case nir_op_fnoise4_4: return evaluate_fnoise4_4(num_components, bit_width, src); - break; - } - case nir_op_fnot: { + case nir_op_fnot: return evaluate_fnot(num_components, bit_width, src); - break; - } - case nir_op_for: { + case nir_op_for: return evaluate_for(num_components, bit_width, src); - break; - } - case nir_op_fpow: { + case nir_op_fpow: return evaluate_fpow(num_components, bit_width, src); - break; - } - case nir_op_fquantize2f16: { + case nir_op_fquantize2f16: return evaluate_fquantize2f16(num_components, bit_width, src); - break; - } - case nir_op_frcp: { + case nir_op_frcp: return evaluate_frcp(num_components, bit_width, src); - break; - } - case nir_op_frem: { + case nir_op_frem: return evaluate_frem(num_components, bit_width, src); - break; - } - case nir_op_fround_even: { + case nir_op_fround_even: return evaluate_fround_even(num_components, bit_width, src); - break; - } - case nir_op_frsq: { + case nir_op_frsq: return evaluate_frsq(num_components, bit_width, src); - break; - } - case nir_op_fsat: { + case nir_op_fsat: return evaluate_fsat(num_components, bit_width, src); - break; - } - case nir_op_fsign: { + case nir_op_fsign: return evaluate_fsign(num_components, bit_width, src); - break; - } - case nir_op_fsin: { + case nir_op_fsin: return evaluate_fsin(num_components, bit_width, src); - break; - } - case nir_op_fsqrt: { + case nir_op_fsqrt: return evaluate_fsqrt(num_components, bit_width, src); - break; - } - case nir_op_fsub: { + case nir_op_fsub: return evaluate_fsub(num_components, bit_width, src); - break; - } - case nir_op_ftrunc: { + case nir_op_ftrunc: return evaluate_ftrunc(num_components, bit_width, src); - break; - } - case nir_op_fxor: { + case nir_op_fxor: return evaluate_fxor(num_components, bit_width, src); - break; - } - case nir_op_i2b: { + case nir_op_i2b: return evaluate_i2b(num_components, bit_width, src); - break; - } - case nir_op_i2d: { + case nir_op_i2d: return evaluate_i2d(num_components, bit_width, src); - break; - } - case nir_op_i2f: { + case nir_op_i2f: return evaluate_i2f(num_components, bit_width, src); - break; - } - case nir_op_iabs: { + case nir_op_iabs: return evaluate_iabs(num_components, bit_width, src); - break; - } - case nir_op_iadd: { + case nir_op_iadd: return evaluate_iadd(num_components, bit_width, src); - break; - } - case nir_op_iand: { + case nir_op_iand: return evaluate_iand(num_components, bit_width, src); - break; - } - case nir_op_ibfe: { + case nir_op_ibfe: return evaluate_ibfe(num_components, bit_width, src); - break; - } - case nir_op_ibitfield_extract: { + case nir_op_ibitfield_extract: return evaluate_ibitfield_extract(num_components, bit_width, src); - break; - } - case nir_op_idiv: { + case nir_op_idiv: return evaluate_idiv(num_components, bit_width, src); - break; - } - case nir_op_ieq: { + case nir_op_ieq: return evaluate_ieq(num_components, bit_width, src); - break; - } - case nir_op_ifind_msb: { + case nir_op_ifind_msb: return evaluate_ifind_msb(num_components, bit_width, src); - break; - } - case nir_op_ige: { + case nir_op_ige: return evaluate_ige(num_components, bit_width, src); - break; - } - case nir_op_ilt: { + case nir_op_ilt: return evaluate_ilt(num_components, bit_width, src); - break; - } - case nir_op_imax: { + case nir_op_imax: return evaluate_imax(num_components, bit_width, src); - break; - } - case nir_op_imin: { + case nir_op_imin: return evaluate_imin(num_components, bit_width, src); - break; - } - case nir_op_imod: { + case nir_op_imod: return evaluate_imod(num_components, bit_width, src); - break; - } - case nir_op_imov: { + case nir_op_imov: return evaluate_imov(num_components, bit_width, src); - break; - } - case nir_op_imul: { + case nir_op_imul: return evaluate_imul(num_components, bit_width, src); - break; - } - case nir_op_imul_high: { + case nir_op_imul_high: return evaluate_imul_high(num_components, bit_width, src); - break; - } - case nir_op_ine: { + case nir_op_ine: return evaluate_ine(num_components, bit_width, src); - break; - } - case nir_op_ineg: { + case nir_op_ineg: return evaluate_ineg(num_components, bit_width, src); - break; - } - case nir_op_inot: { + case nir_op_inot: return evaluate_inot(num_components, bit_width, src); - break; - } - case nir_op_ior: { + case nir_op_ior: return evaluate_ior(num_components, bit_width, src); - break; - } - case nir_op_irem: { + case nir_op_irem: return evaluate_irem(num_components, bit_width, src); - break; - } - case nir_op_ishl: { + case nir_op_ishl: return evaluate_ishl(num_components, bit_width, src); - break; - } - case nir_op_ishr: { + case nir_op_ishr: return evaluate_ishr(num_components, bit_width, src); - break; - } - case nir_op_isign: { + case nir_op_isign: return evaluate_isign(num_components, bit_width, src); - break; - } - case nir_op_isub: { + case nir_op_isub: return evaluate_isub(num_components, bit_width, src); - break; - } - case nir_op_ixor: { + case nir_op_ixor: return evaluate_ixor(num_components, bit_width, src); - break; - } - case nir_op_ldexp: { + case nir_op_ldexp: return evaluate_ldexp(num_components, bit_width, src); - break; - } - case nir_op_pack_double_2x32: { + case nir_op_pack_double_2x32: return evaluate_pack_double_2x32(num_components, bit_width, src); - break; - } - case nir_op_pack_double_2x32_split: { + case nir_op_pack_double_2x32_split: return evaluate_pack_double_2x32_split(num_components, bit_width, src); - break; - } - case nir_op_pack_half_2x16: { + case nir_op_pack_half_2x16: return evaluate_pack_half_2x16(num_components, bit_width, src); - break; - } - case nir_op_pack_half_2x16_split: { + case nir_op_pack_half_2x16_split: return evaluate_pack_half_2x16_split(num_components, bit_width, src); - break; - } - case nir_op_pack_snorm_2x16: { + case nir_op_pack_snorm_2x16: return evaluate_pack_snorm_2x16(num_components, bit_width, src); - break; - } - case nir_op_pack_snorm_4x8: { + case nir_op_pack_snorm_4x8: return evaluate_pack_snorm_4x8(num_components, bit_width, src); - break; - } - case nir_op_pack_unorm_2x16: { + case nir_op_pack_unorm_2x16: return evaluate_pack_unorm_2x16(num_components, bit_width, src); - break; - } - case nir_op_pack_unorm_4x8: { + case nir_op_pack_unorm_4x8: return evaluate_pack_unorm_4x8(num_components, bit_width, src); - break; - } - case nir_op_pack_uvec2_to_uint: { + case nir_op_pack_uvec2_to_uint: return evaluate_pack_uvec2_to_uint(num_components, bit_width, src); - break; - } - case nir_op_pack_uvec4_to_uint: { + case nir_op_pack_uvec4_to_uint: return evaluate_pack_uvec4_to_uint(num_components, bit_width, src); - break; - } - case nir_op_seq: { + case nir_op_seq: return evaluate_seq(num_components, bit_width, src); - break; - } - case nir_op_sge: { + case nir_op_sge: return evaluate_sge(num_components, bit_width, src); - break; - } - case nir_op_slt: { + case nir_op_slt: return evaluate_slt(num_components, bit_width, src); - break; - } - case nir_op_sne: { + case nir_op_sne: return evaluate_sne(num_components, bit_width, src); - break; - } - case nir_op_u2d: { + case nir_op_u2d: return evaluate_u2d(num_components, bit_width, src); - break; - } - case nir_op_u2f: { + case nir_op_u2f: return evaluate_u2f(num_components, bit_width, src); - break; - } - case nir_op_uadd_carry: { + case nir_op_uadd_carry: return evaluate_uadd_carry(num_components, bit_width, src); - break; - } - case nir_op_ubfe: { + case nir_op_ubfe: return evaluate_ubfe(num_components, bit_width, src); - break; - } - case nir_op_ubitfield_extract: { + case nir_op_ubitfield_extract: return evaluate_ubitfield_extract(num_components, bit_width, src); - break; - } - case nir_op_udiv: { + case nir_op_udiv: return evaluate_udiv(num_components, bit_width, src); - break; - } - case nir_op_ufind_msb: { + case nir_op_ufind_msb: return evaluate_ufind_msb(num_components, bit_width, src); - break; - } - case nir_op_uge: { + case nir_op_uge: return evaluate_uge(num_components, bit_width, src); - break; - } - case nir_op_ult: { + case nir_op_ult: return evaluate_ult(num_components, bit_width, src); - break; - } - case nir_op_umax: { + case nir_op_umax: return evaluate_umax(num_components, bit_width, src); - break; - } - case nir_op_umax_4x8: { + case nir_op_umax_4x8: return evaluate_umax_4x8(num_components, bit_width, src); - break; - } - case nir_op_umin: { + case nir_op_umin: return evaluate_umin(num_components, bit_width, src); - break; - } - case nir_op_umin_4x8: { + case nir_op_umin_4x8: return evaluate_umin_4x8(num_components, bit_width, src); - break; - } - case nir_op_umod: { + case nir_op_umod: return evaluate_umod(num_components, bit_width, src); - break; - } - case nir_op_umul_high: { + case nir_op_umul_high: return evaluate_umul_high(num_components, bit_width, src); - break; - } - case nir_op_umul_unorm_4x8: { + case nir_op_umul_unorm_4x8: return evaluate_umul_unorm_4x8(num_components, bit_width, src); - break; - } - case nir_op_unpack_double_2x32: { + case nir_op_unpack_double_2x32: return evaluate_unpack_double_2x32(num_components, bit_width, src); - break; - } - case nir_op_unpack_double_2x32_split_x: { + case nir_op_unpack_double_2x32_split_x: return evaluate_unpack_double_2x32_split_x(num_components, bit_width, src); - break; - } - case nir_op_unpack_double_2x32_split_y: { + case nir_op_unpack_double_2x32_split_y: return evaluate_unpack_double_2x32_split_y(num_components, bit_width, src); - break; - } - case nir_op_unpack_half_2x16: { + case nir_op_unpack_half_2x16: return evaluate_unpack_half_2x16(num_components, bit_width, src); - break; - } - case nir_op_unpack_half_2x16_split_x: { + case nir_op_unpack_half_2x16_split_x: return evaluate_unpack_half_2x16_split_x(num_components, bit_width, src); - break; - } - case nir_op_unpack_half_2x16_split_y: { + case nir_op_unpack_half_2x16_split_y: return evaluate_unpack_half_2x16_split_y(num_components, bit_width, src); - break; - } - case nir_op_unpack_snorm_2x16: { + case nir_op_unpack_snorm_2x16: return evaluate_unpack_snorm_2x16(num_components, bit_width, src); - break; - } - case nir_op_unpack_snorm_4x8: { + case nir_op_unpack_snorm_4x8: return evaluate_unpack_snorm_4x8(num_components, bit_width, src); - break; - } - case nir_op_unpack_unorm_2x16: { + case nir_op_unpack_unorm_2x16: return evaluate_unpack_unorm_2x16(num_components, bit_width, src); - break; - } - case nir_op_unpack_unorm_4x8: { + case nir_op_unpack_unorm_4x8: return evaluate_unpack_unorm_4x8(num_components, bit_width, src); - break; - } - case nir_op_usadd_4x8: { + case nir_op_usadd_4x8: return evaluate_usadd_4x8(num_components, bit_width, src); - break; - } - case nir_op_ushr: { + case nir_op_ushr: return evaluate_ushr(num_components, bit_width, src); - break; - } - case nir_op_ussub_4x8: { + case nir_op_ussub_4x8: return evaluate_ussub_4x8(num_components, bit_width, src); - break; - } - case nir_op_usub_borrow: { + case nir_op_usub_borrow: return evaluate_usub_borrow(num_components, bit_width, src); - break; - } - case nir_op_vec2: { + case nir_op_vec2: return evaluate_vec2(num_components, bit_width, src); - break; - } - case nir_op_vec3: { + case nir_op_vec3: return evaluate_vec3(num_components, bit_width, src); - break; - } - case nir_op_vec4: { + case nir_op_vec4: return evaluate_vec4(num_components, bit_width, src); - break; - } default: unreachable("shouldn't get here"); } diff -Nru mesa-12.0.6/src/compiler/nir/nir_constant_expressions.py mesa-17.0.7/src/compiler/nir/nir_constant_expressions.py --- mesa-12.0.6/src/compiler/nir/nir_constant_expressions.py 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_constant_expressions.py 2017-06-01 10:37:10.000000000 +0000 @@ -267,8 +267,8 @@ % for name, op in sorted(opcodes.iteritems()): static nir_const_value -evaluate_${name}(unsigned num_components, unsigned bit_size, - nir_const_value *_src) +evaluate_${name}(MAYBE_UNUSED unsigned num_components, unsigned bit_size, + MAYBE_UNUSED nir_const_value *_src) { nir_const_value _dst_val = { {0, } }; @@ -291,7 +291,7 @@ <% continue %> %endif - struct ${input_types[j]}_vec src${j} = { + const struct ${input_types[j]}_vec src${j} = { % for k in range(op.input_sizes[j]): % if input_types[j] == "bool32": _src[${j}].u32[${k}] != 0, @@ -299,6 +299,9 @@ _src[${j}].${get_const_field(input_types[j])}[${k}], % endif % endfor + % for k in range(op.input_sizes[j], 4): + 0, + % endfor }; % endfor @@ -316,9 +319,9 @@ ## Avoid unused variable warnings <% continue %> % elif input_types[j] == "bool32": - bool src${j} = _src[${j}].u32[_i] != 0; + const bool src${j} = _src[${j}].u32[_i] != 0; % else: - ${input_types[j]}_t src${j} = + const ${input_types[j]}_t src${j} = _src[${j}].${get_const_field(input_types[j])}[_i]; % endif % endfor @@ -328,6 +331,7 @@ ## writes to dst, just include const_expr directly. % if "dst" in op.const_expr: ${output_type}_t dst; + ${op.const_expr} % else: ${output_type}_t dst = ${op.const_expr}; @@ -389,10 +393,8 @@ { switch (op) { % for name in sorted(opcodes.iterkeys()): - case nir_op_${name}: { + case nir_op_${name}: return evaluate_${name}(num_components, bit_width, src); - break; - } % endfor default: unreachable("shouldn't get here"); diff -Nru mesa-12.0.6/src/compiler/nir/nir_control_flow.c mesa-17.0.7/src/compiler/nir/nir_control_flow.c --- mesa-12.0.6/src/compiler/nir/nir_control_flow.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_control_flow.c 2017-06-01 10:37:10.000000000 +0000 @@ -39,8 +39,6 @@ * 3. Two basic blocks cannot be directly next to each other. * 4. If a basic block has a jump instruction, there must be only one and it * must be at the end of the block. - * 5. The CFG must always be connected - this means that we must insert a fake - * CFG edge for loops with no break statement. * * The purpose of the second one is so that we have places to insert code during * GCM, as well as eliminating the possibility of critical edges. @@ -116,13 +114,8 @@ nir_if *if_stmt = nir_cf_node_as_if(node); - nir_cf_node *last_then = nir_if_last_then_node(if_stmt); - assert(last_then->type == nir_cf_node_block); - nir_block *last_then_block = nir_cf_node_as_block(last_then); - - nir_cf_node *last_else = nir_if_last_else_node(if_stmt); - assert(last_else->type == nir_cf_node_block); - nir_block *last_else_block = nir_cf_node_as_block(last_else); + nir_block *last_then_block = nir_if_last_then_block(if_stmt); + nir_block *last_else_block = nir_if_last_else_block(if_stmt); if (!block_ends_in_jump(last_then_block)) { unlink_block_successors(last_then_block); @@ -135,25 +128,6 @@ } } else { assert(node->type == nir_cf_node_loop); - - /* - * We can only get to this codepath if we're inserting a new loop, or - * at least a loop with no break statements; we can't insert break - * statements into a loop when we haven't inserted it into the CFG - * because we wouldn't know which block comes after the loop - * and therefore, which block should be the successor of the block with - * the break). Therefore, we need to insert a fake edge (see invariant - * #5). - */ - - nir_loop *loop = nir_cf_node_as_loop(node); - - nir_cf_node *last = nir_loop_last_cf_node(loop); - assert(last->type == nir_cf_node_block); - nir_block *last_block = nir_cf_node_as_block(last); - - last_block->successors[1] = block; - block_add_pred(block, last_block); } } @@ -168,13 +142,8 @@ nir_if *if_stmt = nir_cf_node_as_if(node); - nir_cf_node *first_then = nir_if_first_then_node(if_stmt); - assert(first_then->type == nir_cf_node_block); - nir_block *first_then_block = nir_cf_node_as_block(first_then); - - nir_cf_node *first_else = nir_if_first_else_node(if_stmt); - assert(first_else->type == nir_cf_node_block); - nir_block *first_else_block = nir_cf_node_as_block(first_else); + nir_block *first_then_block = nir_if_first_then_block(if_stmt); + nir_block *first_else_block = nir_if_first_else_block(if_stmt); unlink_block_successors(block); link_blocks(block, first_then_block, first_else_block); @@ -185,13 +154,9 @@ * any predecessors that need to be unlinked. */ - assert(node->type == nir_cf_node_loop); - nir_loop *loop = nir_cf_node_as_loop(node); - nir_cf_node *loop_header = nir_loop_first_cf_node(loop); - assert(loop_header->type == nir_cf_node_block); - nir_block *loop_header_block = nir_cf_node_as_block(loop_header); + nir_block *loop_header_block = nir_loop_first_block(loop); unlink_block_successors(block); link_blocks(block, loop_header_block, NULL); @@ -333,21 +298,17 @@ nir_cf_node *parent = block->cf_node.parent; if (parent->type == nir_cf_node_if) { nir_cf_node *next = nir_cf_node_next(parent); - assert(next->type == nir_cf_node_block); nir_block *next_block = nir_cf_node_as_block(next); link_blocks(block, next_block, NULL); } else if (parent->type == nir_cf_node_loop) { nir_loop *loop = nir_cf_node_as_loop(parent); - nir_cf_node *head = nir_loop_first_cf_node(loop); - assert(head->type == nir_cf_node_block); - nir_block *head_block = nir_cf_node_as_block(head); + nir_block *head_block = nir_loop_first_block(loop); link_blocks(block, head_block, NULL); insert_phi_undef(head_block, block); } else { - assert(parent->type == nir_cf_node_function); nir_function_impl *impl = nir_cf_node_as_function(parent); link_blocks(block, impl->end_block, NULL); } @@ -356,22 +317,14 @@ if (next->type == nir_cf_node_if) { nir_if *next_if = nir_cf_node_as_if(next); - nir_cf_node *first_then = nir_if_first_then_node(next_if); - assert(first_then->type == nir_cf_node_block); - nir_block *first_then_block = nir_cf_node_as_block(first_then); - - nir_cf_node *first_else = nir_if_first_else_node(next_if); - assert(first_else->type == nir_cf_node_block); - nir_block *first_else_block = nir_cf_node_as_block(first_else); + nir_block *first_then_block = nir_if_first_then_block(next_if); + nir_block *first_else_block = nir_if_first_else_block(next_if); link_blocks(block, first_then_block, first_else_block); } else { - assert(next->type == nir_cf_node_loop); nir_loop *next_loop = nir_cf_node_as_loop(next); - nir_cf_node *first = nir_loop_first_cf_node(next_loop); - assert(first->type == nir_cf_node_block); - nir_block *first_block = nir_cf_node_as_block(first); + nir_block *first_block = nir_loop_first_block(next_loop); link_blocks(block, first_block, NULL); insert_phi_undef(first_block, block); @@ -511,22 +464,12 @@ nir_loop *loop = nearest_loop(&block->cf_node); if (jump_instr->type == nir_jump_continue) { - nir_cf_node *first_node = nir_loop_first_cf_node(loop); - assert(first_node->type == nir_cf_node_block); - nir_block *first_block = nir_cf_node_as_block(first_node); + nir_block *first_block = nir_loop_first_block(loop); link_blocks(block, first_block, NULL); } else { nir_cf_node *after = nir_cf_node_next(&loop->cf_node); - assert(after->type == nir_cf_node_block); nir_block *after_block = nir_cf_node_as_block(after); link_blocks(block, after_block, NULL); - - /* If we inserted a fake link, remove it */ - nir_cf_node *last = nir_loop_last_cf_node(loop); - assert(last->type == nir_cf_node_block); - nir_block *last_block = nir_cf_node_as_block(last); - if (last_block->successors[1] != NULL) - unlink_blocks(last_block, after_block); } } else { assert(jump_instr->type == nir_jump_return); @@ -551,15 +494,13 @@ } } -/* Removes the successor of a block with a jump, and inserts a fake edge for - * infinite loops. Note that the jump to be eliminated may be free-floating. +/* Removes the successor of a block with a jump. Note that the jump to be + * eliminated may be free-floating. */ static void unlink_jump(nir_block *block, nir_jump_type type, bool add_normal_successors) { - nir_block *next = block->successors[0]; - if (block->successors[0]) remove_phi_src(block->successors[0], block); if (block->successors[1]) @@ -568,33 +509,6 @@ unlink_block_successors(block); if (add_normal_successors) block_add_normal_succs(block); - - /* If we've just removed a break, and the block we were jumping to (after - * the loop) now has zero predecessors, we've created a new infinite loop. - * - * NIR doesn't allow blocks (other than the start block) to have zero - * predecessors. In particular, dominance assumes all blocks are reachable. - * So, we insert a "fake link" by making successors[1] point after the loop. - * - * Note that we have to do this after unlinking/recreating the block's - * successors. If we removed a "break" at the end of the loop, then - * block == last_block, so block->successors[0] would already be "next", - * and adding a fake link would create two identical successors. Doing - * this afterward works, as we'll have changed block->successors[0] to - * be the top of the loop. - */ - if (type == nir_jump_break && next->predecessors->entries == 0) { - nir_loop *loop = - nir_cf_node_as_loop(nir_cf_node_prev(&next->cf_node)); - - /* insert fake link */ - nir_cf_node *last = nir_loop_last_cf_node(loop); - assert(last->type == nir_cf_node_block); - nir_block *last_block = nir_cf_node_as_block(last); - - last_block->successors[1] = next; - block_add_pred(next, last_block); - } } void diff -Nru mesa-12.0.6/src/compiler/nir/nir_control_flow.h mesa-17.0.7/src/compiler/nir/nir_control_flow.h --- mesa-12.0.6/src/compiler/nir/nir_control_flow.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_control_flow.h 2017-06-01 10:37:10.000000000 +0000 @@ -141,6 +141,9 @@ void nir_cf_delete(nir_cf_list *cf_list); +void nir_cf_list_clone(nir_cf_list *dst, nir_cf_list *src, nir_cf_node *parent, + struct hash_table *remap_table); + static inline void nir_cf_list_extract(nir_cf_list *extracted, struct exec_list *cf_list) { diff -Nru mesa-12.0.6/src/compiler/nir/nir_from_ssa.c mesa-17.0.7/src/compiler/nir/nir_from_ssa.c --- mesa-12.0.6/src/compiler/nir/nir_from_ssa.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_from_ssa.c 2017-06-01 10:37:10.000000000 +0000 @@ -26,6 +26,7 @@ */ #include "nir.h" +#include "nir_builder.h" #include "nir_vla.h" /* @@ -35,12 +36,11 @@ */ struct from_ssa_state { - void *mem_ctx; + nir_builder builder; void *dead_ctx; bool phi_webs_only; struct hash_table *merge_node_table; nir_instr *instr; - nir_function_impl *impl; }; /* Returns true if a dominates b */ @@ -447,6 +447,19 @@ return true; } +static nir_register * +create_reg_for_ssa_def(nir_ssa_def *def, nir_function_impl *impl) +{ + nir_register *reg = nir_local_reg_create(impl); + + reg->name = def->name; + reg->num_components = def->num_components; + reg->bit_size = def->bit_size; + reg->num_array_elems = 0; + + return reg; +} + static bool rewrite_ssa_def(nir_ssa_def *def, void *void_state) { @@ -463,13 +476,8 @@ * the things in the merge set should be the same so it doesn't * matter which node's definition we use. */ - if (node->set->reg == NULL) { - node->set->reg = nir_local_reg_create(state->impl); - node->set->reg->name = def->name; - node->set->reg->num_components = def->num_components; - node->set->reg->bit_size = def->bit_size; - node->set->reg->num_array_elems = 0; - } + if (node->set->reg == NULL) + node->set->reg = create_reg_for_ssa_def(def, state->builder.impl); reg = node->set->reg; } else { @@ -482,11 +490,7 @@ if (def->parent_instr->type == nir_instr_type_load_const) return true; - reg = nir_local_reg_create(state->impl); - reg->name = def->name; - reg->num_components = def->num_components; - reg->bit_size = def->bit_size; - reg->num_array_elems = 0; + reg = create_reg_for_ssa_def(def, state->builder.impl); } nir_ssa_def_rewrite_uses(def, nir_src_for_reg(reg)); @@ -535,8 +539,7 @@ } static void -emit_copy(nir_parallel_copy_instr *pcopy, nir_src src, nir_src dest_src, - void *mem_ctx) +emit_copy(nir_builder *b, nir_src src, nir_src dest_src) { assert(!dest_src.is_ssa && dest_src.reg.indirect == NULL && @@ -547,12 +550,12 @@ else assert(src.reg.reg->num_components >= dest_src.reg.reg->num_components); - nir_alu_instr *mov = nir_alu_instr_create(mem_ctx, nir_op_imov); + nir_alu_instr *mov = nir_alu_instr_create(b->shader, nir_op_imov); nir_src_copy(&mov->src[0].src, &src, mov); mov->dest.dest = nir_dest_for_reg(dest_src.reg.reg); mov->dest.write_mask = (1 << dest_src.reg.reg->num_components) - 1; - nir_instr_insert_before(&pcopy->instr, &mov->instr); + nir_builder_instr_insert(b, &mov->instr); } /* Resolves a single parallel copy operation into a sequence of mov's @@ -609,6 +612,8 @@ NIR_VLA(int, to_do, num_copies * 2); int to_do_idx = -1; + state->builder.cursor = nir_before_instr(&pcopy->instr); + /* Now we set everything up: * - All values get assigned a temporary index * - Current locations are set from sources @@ -672,7 +677,7 @@ while (ready_idx >= 0) { int b = ready[ready_idx--]; int a = pred[b]; - emit_copy(pcopy, values[loc[a]], values[b], state->mem_ctx); + emit_copy(&state->builder, values[loc[a]], values[b]); /* If any other copies want a they can find it at b */ loc[a] = b; @@ -698,7 +703,7 @@ * backend can coalesce the (possibly multiple) temporaries. */ assert(num_vals < num_copies * 2); - nir_register *reg = nir_local_reg_create(state->impl); + nir_register *reg = nir_local_reg_create(state->builder.impl); reg->name = "copy_temp"; reg->num_array_elems = 0; if (values[b].is_ssa) @@ -708,7 +713,7 @@ values[num_vals].is_ssa = false; values[num_vals].reg.reg = reg; - emit_copy(pcopy, values[b], values[num_vals], state->mem_ctx); + emit_copy(&state->builder, values[b], values[num_vals]); loc[b] = num_vals; ready[++ready_idx] = b; num_vals++; @@ -756,9 +761,8 @@ { struct from_ssa_state state; - state.mem_ctx = ralloc_parent(impl); + nir_builder_init(&state.builder, impl); state.dead_ctx = ralloc_context(NULL); - state.impl = impl; state.phi_webs_only = phi_webs_only; state.merge_node_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer, _mesa_key_pointer_equal); @@ -810,3 +814,163 @@ nir_convert_from_ssa_impl(function->impl, phi_webs_only); } } + + +static void +place_phi_read(nir_shader *shader, nir_register *reg, + nir_ssa_def *def, nir_block *block) +{ + if (block != def->parent_instr->block) { + /* Try to go up the single-successor tree */ + bool all_single_successors = true; + struct set_entry *entry; + set_foreach(block->predecessors, entry) { + nir_block *pred = (nir_block *)entry->key; + if (pred->successors[0] && pred->successors[1]) { + all_single_successors = false; + break; + } + } + + if (all_single_successors) { + /* All predecessors of this block have exactly one successor and it + * is this block so they must eventually lead here without + * intersecting each other. Place the reads in the predecessors + * instead of this block. + */ + set_foreach(block->predecessors, entry) + place_phi_read(shader, reg, def, (nir_block *)entry->key); + return; + } + } + + nir_alu_instr *mov = nir_alu_instr_create(shader, nir_op_imov); + mov->src[0].src = nir_src_for_ssa(def); + mov->dest.dest = nir_dest_for_reg(reg); + mov->dest.write_mask = (1 << reg->num_components) - 1; + nir_instr_insert(nir_after_block_before_jump(block), &mov->instr); +} + +/** Lower all of the phi nodes in a block to imov's to and from a register + * + * This provides a very quick-and-dirty out-of-SSA pass that you can run on a + * single block to convert all of it's phis to a register and some imov's. + * The code that is generated, while not optimal for actual codegen in a + * back-end, is easy to generate, correct, and will turn into the same set of + * phis after you call regs_to_ssa and do some copy propagation. + * + * The one intelligent thing this pass does is that it places the moves from + * the phi sources as high up the predecessor tree as possible instead of in + * the exact predecessor. This means that, in particular, it will crawl into + * the deepest nesting of any if-ladders. In order to ensure that doing so is + * safe, it stops as soon as one of the predecessors has multiple successors. + */ +bool +nir_lower_phis_to_regs_block(nir_block *block) +{ + nir_function_impl *impl = nir_cf_node_get_function(&block->cf_node); + nir_shader *shader = impl->function->shader; + + bool progress = false; + nir_foreach_instr_safe(instr, block) { + if (instr->type != nir_instr_type_phi) + break; + + nir_phi_instr *phi = nir_instr_as_phi(instr); + assert(phi->dest.is_ssa); + + nir_register *reg = create_reg_for_ssa_def(&phi->dest.ssa, impl); + + nir_alu_instr *mov = nir_alu_instr_create(shader, nir_op_imov); + mov->src[0].src = nir_src_for_reg(reg); + mov->dest.write_mask = (1 << phi->dest.ssa.num_components) - 1; + nir_ssa_dest_init(&mov->instr, &mov->dest.dest, + phi->dest.ssa.num_components, phi->dest.ssa.bit_size, + phi->dest.ssa.name); + nir_instr_insert(nir_after_instr(&phi->instr), &mov->instr); + + nir_ssa_def_rewrite_uses(&phi->dest.ssa, + nir_src_for_ssa(&mov->dest.dest.ssa)); + + nir_foreach_phi_src(src, phi) { + assert(src->src.is_ssa); + place_phi_read(shader, reg, src->src.ssa, src->pred); + } + + nir_instr_remove(&phi->instr); + + progress = true; + } + + return progress; +} + +struct ssa_def_to_reg_state { + nir_function_impl *impl; + bool progress; +}; + +static bool +dest_replace_ssa_with_reg(nir_dest *dest, void *void_state) +{ + struct ssa_def_to_reg_state *state = void_state; + + if (!dest->is_ssa) + return true; + + nir_register *reg = create_reg_for_ssa_def(&dest->ssa, state->impl); + + nir_ssa_def_rewrite_uses(&dest->ssa, nir_src_for_reg(reg)); + + nir_instr *instr = dest->ssa.parent_instr; + *dest = nir_dest_for_reg(reg); + dest->reg.parent_instr = instr; + list_addtail(&dest->reg.def_link, ®->defs); + + state->progress = true; + + return true; +} + +/** Lower all of the SSA defs in a block to registers + * + * This performs the very simple operation of blindly replacing all of the SSA + * defs in the given block with registers. If not used carefully, this may + * result in phi nodes with register sources which is technically invalid. + * Fortunately, the register-based into-SSA pass handles them anyway. + */ +bool +nir_lower_ssa_defs_to_regs_block(nir_block *block) +{ + nir_function_impl *impl = nir_cf_node_get_function(&block->cf_node); + nir_shader *shader = impl->function->shader; + + struct ssa_def_to_reg_state state = { + .impl = impl, + .progress = false, + }; + + nir_foreach_instr(instr, block) { + if (instr->type == nir_instr_type_ssa_undef) { + /* Undefs are just a read of something never written. */ + nir_ssa_undef_instr *undef = nir_instr_as_ssa_undef(instr); + nir_register *reg = create_reg_for_ssa_def(&undef->def, state.impl); + nir_ssa_def_rewrite_uses(&undef->def, nir_src_for_reg(reg)); + } else if (instr->type == nir_instr_type_load_const) { + /* Constant loads are SSA-only, we need to insert a move */ + nir_load_const_instr *load = nir_instr_as_load_const(instr); + nir_register *reg = create_reg_for_ssa_def(&load->def, state.impl); + nir_ssa_def_rewrite_uses(&load->def, nir_src_for_reg(reg)); + + nir_alu_instr *mov = nir_alu_instr_create(shader, nir_op_imov); + mov->src[0].src = nir_src_for_ssa(&load->def); + mov->dest.dest = nir_dest_for_reg(reg); + mov->dest.write_mask = (1 << reg->num_components) - 1; + nir_instr_insert(nir_after_instr(&load->instr), &mov->instr); + } else { + nir_foreach_dest(instr, dest_replace_ssa_with_reg, &state); + } + } + + return state.progress; +} diff -Nru mesa-12.0.6/src/compiler/nir/nir_gather_info.c mesa-17.0.7/src/compiler/nir/nir_gather_info.c --- mesa-12.0.6/src/compiler/nir/nir_gather_info.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_gather_info.c 2017-06-01 10:37:10.000000000 +0000 @@ -21,22 +21,217 @@ * IN THE SOFTWARE. */ +#include "main/mtypes.h" #include "nir.h" static void +set_io_mask(nir_shader *shader, nir_variable *var, int offset, int len) +{ + for (int i = 0; i < len; i++) { + assert(var->data.location != -1); + + int idx = var->data.location + offset + i; + bool is_patch_generic = var->data.patch && + idx != VARYING_SLOT_TESS_LEVEL_INNER && + idx != VARYING_SLOT_TESS_LEVEL_OUTER && + idx != VARYING_SLOT_BOUNDING_BOX0 && + idx != VARYING_SLOT_BOUNDING_BOX1; + uint64_t bitfield; + + if (is_patch_generic) { + assert(idx >= VARYING_SLOT_PATCH0 && idx < VARYING_SLOT_TESS_MAX); + bitfield = BITFIELD64_BIT(idx - VARYING_SLOT_PATCH0); + } + else { + assert(idx < VARYING_SLOT_MAX); + bitfield = BITFIELD64_BIT(idx); + } + + if (var->data.mode == nir_var_shader_in) { + if (is_patch_generic) + shader->info->patch_inputs_read |= bitfield; + else + shader->info->inputs_read |= bitfield; + + if (shader->stage == MESA_SHADER_FRAGMENT) { + shader->info->fs.uses_sample_qualifier |= var->data.sample; + } + } else { + assert(var->data.mode == nir_var_shader_out); + if (is_patch_generic) { + shader->info->patch_outputs_written |= bitfield; + } else if (!var->data.read_only) { + shader->info->outputs_written |= bitfield; + } + + if (var->data.fb_fetch_output) + shader->info->outputs_read |= bitfield; + } + } +} + +/** + * Mark an entire variable as used. Caller must ensure that the variable + * represents a shader input or output. + */ +static void +mark_whole_variable(nir_shader *shader, nir_variable *var) +{ + const struct glsl_type *type = var->type; + + if (nir_is_per_vertex_io(var, shader->stage)) { + assert(glsl_type_is_array(type)); + type = glsl_get_array_element(type); + } + + const unsigned slots = + var->data.compact ? DIV_ROUND_UP(glsl_get_length(type), 4) + : glsl_count_attribute_slots(type, false); + + set_io_mask(shader, var, 0, slots); +} + +static unsigned +get_io_offset(nir_deref_var *deref) +{ + unsigned offset = 0; + + nir_deref *tail = &deref->deref; + while (tail->child != NULL) { + tail = tail->child; + + if (tail->deref_type == nir_deref_type_array) { + nir_deref_array *deref_array = nir_deref_as_array(tail); + + if (deref_array->deref_array_type == nir_deref_array_type_indirect) { + return -1; + } + + offset += glsl_count_attribute_slots(tail->type, false) * + deref_array->base_offset; + } + /* TODO: we can get the offset for structs here see nir_lower_io() */ + } + + return offset; +} + +/** + * Try to mark a portion of the given varying as used. Caller must ensure + * that the variable represents a shader input or output. + * + * If the index can't be interpreted as a constant, or some other problem + * occurs, then nothing will be marked and false will be returned. + */ +static bool +try_mask_partial_io(nir_shader *shader, nir_deref_var *deref) +{ + nir_variable *var = deref->var; + const struct glsl_type *type = var->type; + + if (nir_is_per_vertex_io(var, shader->stage)) { + assert(glsl_type_is_array(type)); + type = glsl_get_array_element(type); + } + + /* The code below only handles: + * + * - Indexing into matrices + * - Indexing into arrays of (arrays, matrices, vectors, or scalars) + * + * For now, we just give up if we see varying structs and arrays of structs + * here marking the entire variable as used. + */ + if (!(glsl_type_is_matrix(type) || + (glsl_type_is_array(type) && !var->data.compact && + (glsl_type_is_numeric(glsl_without_array(type)) || + glsl_type_is_boolean(glsl_without_array(type)))))) { + + /* If we don't know how to handle this case, give up and let the + * caller mark the whole variable as used. + */ + return false; + } + + unsigned offset = get_io_offset(deref); + if (offset == -1) + return false; + + unsigned num_elems; + unsigned elem_width = 1; + unsigned mat_cols = 1; + if (glsl_type_is_array(type)) { + num_elems = glsl_get_aoa_size(type); + if (glsl_type_is_matrix(glsl_without_array(type))) + mat_cols = glsl_get_matrix_columns(glsl_without_array(type)); + } else { + num_elems = glsl_get_matrix_columns(type); + } + + /* double element width for double types that takes two slots */ + if (glsl_type_is_dual_slot(glsl_without_array(type))) { + elem_width *= 2; + } + + if (offset >= num_elems * elem_width * mat_cols) { + /* Constant index outside the bounds of the matrix/array. This could + * arise as a result of constant folding of a legal GLSL program. + * + * Even though the spec says that indexing outside the bounds of a + * matrix/array results in undefined behaviour, we don't want to pass + * out-of-range values to set_io_mask() (since this could result in + * slots that don't exist being marked as used), so just let the caller + * mark the whole variable as used. + */ + return false; + } + + set_io_mask(shader, var, offset, elem_width); + return true; +} + +static void gather_intrinsic_info(nir_intrinsic_instr *instr, nir_shader *shader) { switch (instr->intrinsic) { case nir_intrinsic_discard: case nir_intrinsic_discard_if: assert(shader->stage == MESA_SHADER_FRAGMENT); - shader->info.fs.uses_discard = true; + shader->info->fs.uses_discard = true; break; + case nir_intrinsic_interp_var_at_centroid: + case nir_intrinsic_interp_var_at_sample: + case nir_intrinsic_interp_var_at_offset: + case nir_intrinsic_load_var: + case nir_intrinsic_store_var: { + nir_variable *var = instr->variables[0]->var; + + if (var->data.mode == nir_var_shader_in || + var->data.mode == nir_var_shader_out) { + if (!try_mask_partial_io(shader, instr->variables[0])) + mark_whole_variable(shader, var); + + /* We need to track which input_reads bits correspond to a + * dvec3/dvec4 input attribute */ + if (shader->stage == MESA_SHADER_VERTEX && + var->data.mode == nir_var_shader_in && + glsl_type_is_dual_slot(glsl_without_array(var->type))) { + for (uint i = 0; i < glsl_count_attribute_slots(var->type, false); i++) { + int idx = var->data.location + i; + shader->info->double_inputs_read |= BITFIELD64_BIT(idx); + } + } + } + break; + } + + case nir_intrinsic_load_draw_id: case nir_intrinsic_load_front_face: case nir_intrinsic_load_vertex_id: case nir_intrinsic_load_vertex_id_zero_base: case nir_intrinsic_load_base_vertex: + case nir_intrinsic_load_base_instance: case nir_intrinsic_load_instance_id: case nir_intrinsic_load_sample_id: case nir_intrinsic_load_sample_pos: @@ -47,18 +242,17 @@ case nir_intrinsic_load_local_invocation_index: case nir_intrinsic_load_work_group_id: case nir_intrinsic_load_num_work_groups: - shader->info.system_values_read |= + case nir_intrinsic_load_tess_coord: + case nir_intrinsic_load_tess_level_outer: + case nir_intrinsic_load_tess_level_inner: + shader->info->system_values_read |= (1 << nir_system_value_from_intrinsic(instr->intrinsic)); break; case nir_intrinsic_end_primitive: case nir_intrinsic_end_primitive_with_counter: assert(shader->stage == MESA_SHADER_GEOMETRY); - shader->info.gs.uses_end_primitive = 1; - break; - - case nir_intrinsic_interp_var_at_offset: - shader->info.uses_interp_var_at_offset = 1; + shader->info->gs.uses_end_primitive = 1; break; default: @@ -70,7 +264,7 @@ gather_tex_info(nir_tex_instr *instr, nir_shader *shader) { if (instr->op == nir_texop_tg4) - shader->info.uses_texture_gather = true; + shader->info->uses_texture_gather = true; } static void @@ -93,79 +287,36 @@ } } -/** - * Returns the bits in the inputs_read, outputs_written, or - * system_values_read bitfield corresponding to this variable. - */ -static inline uint64_t -get_io_mask(nir_variable *var, gl_shader_stage stage) -{ - assert(var->data.mode == nir_var_shader_in || - var->data.mode == nir_var_shader_out || - var->data.mode == nir_var_system_value); - assert(var->data.location >= 0); - - const struct glsl_type *var_type = var->type; - if (stage == MESA_SHADER_GEOMETRY && var->data.mode == nir_var_shader_in) { - /* Most geometry shader inputs are per-vertex arrays */ - if (var->data.location >= VARYING_SLOT_VAR0) - assert(glsl_type_is_array(var_type)); - - if (glsl_type_is_array(var_type)) - var_type = glsl_get_array_element(var_type); - } - - bool is_vertex_input = (var->data.mode == nir_var_shader_in && - stage == MESA_SHADER_VERTEX); - unsigned slots = glsl_count_attribute_slots(var_type, is_vertex_input); - return ((1ull << slots) - 1) << var->data.location; -} - void nir_shader_gather_info(nir_shader *shader, nir_function_impl *entrypoint) { - /* This pass does not yet support tessellation shaders */ - assert(shader->stage == MESA_SHADER_VERTEX || - shader->stage == MESA_SHADER_GEOMETRY || - shader->stage == MESA_SHADER_FRAGMENT || - shader->stage == MESA_SHADER_COMPUTE); - - bool uses_sample_qualifier = false; - shader->info.inputs_read = 0; - foreach_list_typed(nir_variable, var, node, &shader->inputs) { - shader->info.inputs_read |= get_io_mask(var, shader->stage); - uses_sample_qualifier |= var->data.sample; - } - - if (shader->stage == MESA_SHADER_FRAGMENT) - shader->info.fs.uses_sample_qualifier = uses_sample_qualifier; - - /* TODO: Some day we may need to add stream support to NIR */ - shader->info.outputs_written = 0; - foreach_list_typed(nir_variable, var, node, &shader->outputs) - shader->info.outputs_written |= get_io_mask(var, shader->stage); - - shader->info.system_values_read = 0; - foreach_list_typed(nir_variable, var, node, &shader->system_values) - shader->info.system_values_read |= get_io_mask(var, shader->stage); - - shader->info.num_textures = 0; - shader->info.num_images = 0; + shader->info->num_textures = 0; + shader->info->num_images = 0; nir_foreach_variable(var, &shader->uniforms) { const struct glsl_type *type = var->type; unsigned count = 1; if (glsl_type_is_array(type)) { - count = glsl_get_length(type); - type = glsl_get_array_element(type); + count = glsl_get_aoa_size(type); + type = glsl_without_array(type); } if (glsl_type_is_image(type)) { - shader->info.num_images += count; + shader->info->num_images += count; } else if (glsl_type_is_sampler(type)) { - shader->info.num_textures += count; + shader->info->num_textures += count; } } + shader->info->inputs_read = 0; + shader->info->outputs_written = 0; + shader->info->outputs_read = 0; + shader->info->double_inputs_read = 0; + shader->info->patch_inputs_read = 0; + shader->info->patch_outputs_written = 0; + shader->info->system_values_read = 0; + if (shader->stage == MESA_SHADER_FRAGMENT) { + shader->info->fs.uses_sample_qualifier = false; + } nir_foreach_block(block, entrypoint) { gather_info_block(block, shader); } diff -Nru mesa-12.0.6/src/compiler/nir/nir.h mesa-17.0.7/src/compiler/nir/nir.h --- mesa-12.0.6/src/compiler/nir/nir.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir.h 2017-06-01 10:37:10.000000000 +0000 @@ -37,6 +37,7 @@ #include "util/macros.h" #include "compiler/nir_types.h" #include "compiler/shader_enums.h" +#include "compiler/shader_info.h" #include #include "nir_opcodes.h" @@ -59,11 +60,13 @@ * Note that you have to be a bit careful as the generated cast function * destroys constness. */ -#define NIR_DEFINE_CAST(name, in_type, out_type, field) \ -static inline out_type * \ -name(const in_type *parent) \ -{ \ - return exec_node_data(out_type, parent, field); \ +#define NIR_DEFINE_CAST(name, in_type, out_type, field, \ + type_field, type_value) \ +static inline out_type * \ +name(const in_type *parent) \ +{ \ + assert(parent && parent->type_field == type_value); \ + return exec_node_data(out_type, parent, field); \ } struct nir_function; @@ -94,16 +97,15 @@ nir_var_all = ~0, } nir_variable_mode; -/** - * Data stored in an nir_constant - */ -union nir_constant_data { - unsigned u[16]; - int i[16]; - float f[16]; - bool b[16]; - double d[16]; -}; + +typedef union { + float f32[4]; + double f64[4]; + int32_t i32[4]; + uint32_t u32[4]; + int64_t i64[4]; + uint64_t u64[4]; +} nir_const_value; typedef struct nir_constant { /** @@ -113,7 +115,7 @@ * by the type associated with the \c nir_variable. Constants may be * scalars, vectors, or matrices. */ - union nir_constant_data value; + nir_const_value values[4]; /* we could get this from the var->type but makes clone *much* easier to * not have to care about the type. @@ -179,7 +181,7 @@ /** * Interpolation mode for shader inputs / outputs * - * \sa glsl_interp_qualifier + * \sa glsl_interp_mode */ unsigned interpolation:2; @@ -192,32 +194,6 @@ /*@}*/ /** - * Was the location explicitly set in the shader? - * - * If the location is explicitly set in the shader, it \b cannot be changed - * by the linker or by the API (e.g., calls to \c glBindAttribLocation have - * no effect). - */ - unsigned explicit_location:1; - unsigned explicit_index:1; - - /** - * Was an initial binding explicitly set in the shader? - * - * If so, constant_initializer contains an integer nir_constant - * representing the initial binding point. - */ - unsigned explicit_binding:1; - - /** - * Does this variable have an initializer? - * - * This is used by the linker to cross-validiate initializers of global - * variables. - */ - unsigned has_initializer:1; - - /** * If non-zero, then this variable may be packed along with other variables * into a single varying slot, so this offset should be applied when * accessing components. For example, an offset of 1 means that the x @@ -227,6 +203,20 @@ unsigned location_frac:2; /** + * If true, this variable represents an array of scalars that should + * be tightly packed. In other words, consecutive array elements + * should be stored one component apart, rather than one slot apart. + */ + bool compact:1; + + /** + * Whether this is a fragment shader output implicitly initialized with + * the previous contents of the specified render target at the + * framebuffer location corresponding to this shader invocation. + */ + unsigned fb_fetch_output:1; + + /** * \brief Layout qualifier for gl_FragDepth. * * This is not equal to \c ir_depth_layout_none if and only if this @@ -296,14 +286,6 @@ /** Image internal format if specified explicitly, otherwise GL_NONE. */ GLenum format; } image; - - /** - * Highest element accessed with a constant expression array index - * - * Not used for non-array variables. - */ - unsigned max_array_access; - } data; /** @@ -324,6 +306,10 @@ /** * Constant expression assigned in the initializer of the variable + * + * This field should only be used temporarily by creators of NIR shaders + * and then lower_constant_initializers can be used to get rid of them. + * Most of the rest of NIR ignores this field or asserts that it's NULL. */ nir_constant *constant_initializer; @@ -387,6 +373,11 @@ struct list_head if_uses; } nir_register; +#define nir_foreach_register(reg, reg_list) \ + foreach_list_typed(nir_register, reg, node, reg_list) +#define nir_foreach_register_safe(reg, reg_list) \ + foreach_list_typed_safe(nir_register, reg, node, reg_list) + typedef enum { nir_instr_type_alu, nir_instr_type_call, @@ -684,6 +675,32 @@ return type & NIR_ALU_TYPE_BASE_TYPE_MASK; } +static inline nir_alu_type +nir_get_nir_type_for_glsl_type(const struct glsl_type *type) +{ + switch (glsl_get_base_type(type)) { + case GLSL_TYPE_BOOL: + return nir_type_bool32; + break; + case GLSL_TYPE_UINT: + return nir_type_uint32; + break; + case GLSL_TYPE_INT: + return nir_type_int32; + break; + case GLSL_TYPE_FLOAT: + return nir_type_float32; + break; + case GLSL_TYPE_DOUBLE: + return nir_type_float64; + break; + default: + unreachable("unknown type"); + } +} + +nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst); + typedef enum { NIR_OP_IS_COMMUTATIVE = (1 << 0), NIR_OP_IS_ASSOCIATIVE = (1 << 1), @@ -785,6 +802,9 @@ return instr->dest.dest.ssa.num_components; } +bool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2, + unsigned src1, unsigned src2); + typedef enum { nir_deref_type_var, nir_deref_type_array, @@ -804,7 +824,7 @@ } nir_deref_var; /* This enum describes how the array is referenced. If the deref is - * direct then the base_offset is used. If the deref is indirect then then + * direct then the base_offset is used. If the deref is indirect then * offset is given by base_offset + indirect. If the deref is a wildcard * then the deref refers to all of the elements of the array at the same * time. Wildcard dereferences are only ever allowed in copy_var @@ -831,9 +851,12 @@ unsigned index; } nir_deref_struct; -NIR_DEFINE_CAST(nir_deref_as_var, nir_deref, nir_deref_var, deref) -NIR_DEFINE_CAST(nir_deref_as_array, nir_deref, nir_deref_array, deref) -NIR_DEFINE_CAST(nir_deref_as_struct, nir_deref, nir_deref_struct, deref) +NIR_DEFINE_CAST(nir_deref_as_var, nir_deref, nir_deref_var, deref, + deref_type, nir_deref_type_var) +NIR_DEFINE_CAST(nir_deref_as_array, nir_deref, nir_deref_array, deref, + deref_type, nir_deref_type_array) +NIR_DEFINE_CAST(nir_deref_as_struct, nir_deref, nir_deref_struct, deref, + deref_type, nir_deref_type_struct) /* Returns the last deref in the chain. */ static inline nir_deref * @@ -865,9 +888,6 @@ nir_num_intrinsics = nir_last_intrinsic + 1 } nir_intrinsic_op; -#undef INTRINSIC -#undef LAST_INTRINSIC - #define NIR_INTRINSIC_MAX_CONST_INDEX 3 /** Represents an intrinsic @@ -987,6 +1007,16 @@ */ NIR_INTRINSIC_BINDING = 7, + /** + * Component offset. + */ + NIR_INTRINSIC_COMPONENT = 8, + + /** + * Interpolation mode (only meaningful for FS inputs). + */ + NIR_INTRINSIC_INTERP_MODE = 9, + NIR_INTRINSIC_NUM_INDEX_FLAGS, } nir_intrinsic_index_flag; @@ -1053,6 +1083,8 @@ INTRINSIC_IDX_ACCESSORS(range, RANGE, unsigned) INTRINSIC_IDX_ACCESSORS(desc_set, DESC_SET, unsigned) INTRINSIC_IDX_ACCESSORS(binding, BINDING, unsigned) +INTRINSIC_IDX_ACCESSORS(component, COMPONENT, unsigned) +INTRINSIC_IDX_ACCESSORS(interp_mode, INTERP_MODE, unsigned) /** * \group texture information @@ -1064,7 +1096,7 @@ typedef enum { nir_tex_src_coord, nir_tex_src_projector, - nir_tex_src_comparitor, /* shadow comparitor */ + nir_tex_src_comparator, /* shadow comparator */ nir_tex_src_offset, nir_tex_src_bias, nir_tex_src_lod, @@ -1179,6 +1211,7 @@ case GLSL_SAMPLER_DIM_MS: case GLSL_SAMPLER_DIM_RECT: case GLSL_SAMPLER_DIM_EXTERNAL: + case GLSL_SAMPLER_DIM_SUBPASS: ret = 2; break; case GLSL_SAMPLER_DIM_3D: @@ -1261,7 +1294,7 @@ } case nir_tex_src_projector: - case nir_tex_src_comparitor: + case nir_tex_src_comparator: case nir_tex_src_bias: case nir_tex_src_ddx: case nir_tex_src_ddy: @@ -1310,14 +1343,7 @@ return -1; } -typedef union { - float f32[4]; - double f64[4]; - int32_t i32[4]; - uint32_t u32[4]; - int64_t i64[4]; - uint64_t u64[4]; -} nir_const_value; +void nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx); typedef struct { nir_instr instr; @@ -1387,16 +1413,25 @@ struct exec_list entries; } nir_parallel_copy_instr; -NIR_DEFINE_CAST(nir_instr_as_alu, nir_instr, nir_alu_instr, instr) -NIR_DEFINE_CAST(nir_instr_as_call, nir_instr, nir_call_instr, instr) -NIR_DEFINE_CAST(nir_instr_as_jump, nir_instr, nir_jump_instr, instr) -NIR_DEFINE_CAST(nir_instr_as_tex, nir_instr, nir_tex_instr, instr) -NIR_DEFINE_CAST(nir_instr_as_intrinsic, nir_instr, nir_intrinsic_instr, instr) -NIR_DEFINE_CAST(nir_instr_as_load_const, nir_instr, nir_load_const_instr, instr) -NIR_DEFINE_CAST(nir_instr_as_ssa_undef, nir_instr, nir_ssa_undef_instr, instr) -NIR_DEFINE_CAST(nir_instr_as_phi, nir_instr, nir_phi_instr, instr) +NIR_DEFINE_CAST(nir_instr_as_alu, nir_instr, nir_alu_instr, instr, + type, nir_instr_type_alu) +NIR_DEFINE_CAST(nir_instr_as_call, nir_instr, nir_call_instr, instr, + type, nir_instr_type_call) +NIR_DEFINE_CAST(nir_instr_as_jump, nir_instr, nir_jump_instr, instr, + type, nir_instr_type_jump) +NIR_DEFINE_CAST(nir_instr_as_tex, nir_instr, nir_tex_instr, instr, + type, nir_instr_type_tex) +NIR_DEFINE_CAST(nir_instr_as_intrinsic, nir_instr, nir_intrinsic_instr, instr, + type, nir_instr_type_intrinsic) +NIR_DEFINE_CAST(nir_instr_as_load_const, nir_instr, nir_load_const_instr, instr, + type, nir_instr_type_load_const) +NIR_DEFINE_CAST(nir_instr_as_ssa_undef, nir_instr, nir_ssa_undef_instr, instr, + type, nir_instr_type_ssa_undef) +NIR_DEFINE_CAST(nir_instr_as_phi, nir_instr, nir_phi_instr, instr, + type, nir_instr_type_phi) NIR_DEFINE_CAST(nir_instr_as_parallel_copy, nir_instr, - nir_parallel_copy_instr, instr) + nir_parallel_copy_instr, instr, + type, nir_instr_type_parallel_copy) /* * Control flow @@ -1501,51 +1536,43 @@ struct exec_list else_list; /** < list of nir_cf_node */ } nir_if; -static inline nir_cf_node * -nir_if_first_then_node(nir_if *if_stmt) -{ - struct exec_node *head = exec_list_get_head(&if_stmt->then_list); - return exec_node_data(nir_cf_node, head, node); -} +typedef struct { + nir_if *nif; -static inline nir_cf_node * -nir_if_last_then_node(nir_if *if_stmt) -{ - struct exec_node *tail = exec_list_get_tail(&if_stmt->then_list); - return exec_node_data(nir_cf_node, tail, node); -} + nir_instr *conditional_instr; -static inline nir_cf_node * -nir_if_first_else_node(nir_if *if_stmt) -{ - struct exec_node *head = exec_list_get_head(&if_stmt->else_list); - return exec_node_data(nir_cf_node, head, node); -} + nir_block *break_block; + nir_block *continue_from_block; -static inline nir_cf_node * -nir_if_last_else_node(nir_if *if_stmt) -{ - struct exec_node *tail = exec_list_get_tail(&if_stmt->else_list); - return exec_node_data(nir_cf_node, tail, node); -} + bool continue_from_then; + + struct list_head loop_terminator_link; +} nir_loop_terminator; + +typedef struct { + /* Number of instructions in the loop */ + unsigned num_instructions; + + /* How many times the loop is run (if known) */ + unsigned trip_count; + bool is_trip_count_known; + + /* Unroll the loop regardless of its size */ + bool force_unroll; + + nir_loop_terminator *limiting_terminator; + + /* A list of loop_terminators terminating this loop. */ + struct list_head loop_terminator_list; +} nir_loop_info; typedef struct { nir_cf_node cf_node; struct exec_list body; /** < list of nir_cf_node */ -} nir_loop; -static inline nir_cf_node * -nir_loop_first_cf_node(nir_loop *loop) -{ - return exec_node_data(nir_cf_node, exec_list_get_head(&loop->body), node); -} - -static inline nir_cf_node * -nir_loop_last_cf_node(nir_loop *loop) -{ - return exec_node_data(nir_cf_node, exec_list_get_tail(&loop->body), node); -} + nir_loop_info *info; +} nir_loop; /** * Various bits of metadata that can may be created or required by @@ -1557,6 +1584,7 @@ nir_metadata_dominance = 0x2, nir_metadata_live_ssa_defs = 0x4, nir_metadata_not_properly_reset = 0x8, + nir_metadata_loop_analysis = 0x10, } nir_metadata; typedef struct { @@ -1597,13 +1625,13 @@ ATTRIBUTE_RETURNS_NONNULL static inline nir_block * nir_start_block(nir_function_impl *impl) { - return (nir_block *) impl->body.head; + return (nir_block *) impl->body.head_sentinel.next; } ATTRIBUTE_RETURNS_NONNULL static inline nir_block * nir_impl_last_block(nir_function_impl *impl) { - return (nir_block *) impl->body.tail_pred; + return (nir_block *) impl->body.tail_sentinel.prev; } static inline nir_cf_node * @@ -1638,10 +1666,56 @@ return exec_node_is_tail_sentinel(node->node.next); } -NIR_DEFINE_CAST(nir_cf_node_as_block, nir_cf_node, nir_block, cf_node) -NIR_DEFINE_CAST(nir_cf_node_as_if, nir_cf_node, nir_if, cf_node) -NIR_DEFINE_CAST(nir_cf_node_as_loop, nir_cf_node, nir_loop, cf_node) -NIR_DEFINE_CAST(nir_cf_node_as_function, nir_cf_node, nir_function_impl, cf_node) +NIR_DEFINE_CAST(nir_cf_node_as_block, nir_cf_node, nir_block, cf_node, + type, nir_cf_node_block) +NIR_DEFINE_CAST(nir_cf_node_as_if, nir_cf_node, nir_if, cf_node, + type, nir_cf_node_if) +NIR_DEFINE_CAST(nir_cf_node_as_loop, nir_cf_node, nir_loop, cf_node, + type, nir_cf_node_loop) +NIR_DEFINE_CAST(nir_cf_node_as_function, nir_cf_node, + nir_function_impl, cf_node, type, nir_cf_node_function) + +static inline nir_block * +nir_if_first_then_block(nir_if *if_stmt) +{ + struct exec_node *head = exec_list_get_head(&if_stmt->then_list); + return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node)); +} + +static inline nir_block * +nir_if_last_then_block(nir_if *if_stmt) +{ + struct exec_node *tail = exec_list_get_tail(&if_stmt->then_list); + return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node)); +} + +static inline nir_block * +nir_if_first_else_block(nir_if *if_stmt) +{ + struct exec_node *head = exec_list_get_head(&if_stmt->else_list); + return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node)); +} + +static inline nir_block * +nir_if_last_else_block(nir_if *if_stmt) +{ + struct exec_node *tail = exec_list_get_tail(&if_stmt->else_list); + return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node)); +} + +static inline nir_block * +nir_loop_first_block(nir_loop *loop) +{ + struct exec_node *head = exec_list_get_head(&loop->body); + return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node)); +} + +static inline nir_block * +nir_loop_last_block(nir_loop *loop) +{ + struct exec_node *tail = exec_list_get_tail(&loop->body); + return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node)); +} typedef enum { nir_parameter_in, @@ -1695,6 +1769,9 @@ /* lower {slt,sge,seq,sne} to {flt,fge,feq,fne} + b2f: */ bool lower_scmp; + /** enables rules to lower idiv by power-of-two: */ + bool lower_idiv; + /* Does the native fdot instruction replicate its result for four * components? If so, then opt_algebraic_late will turn all fdotN * instructions into fdot_replicatedN instructions. @@ -1728,103 +1805,17 @@ bool vertex_id_zero_based; bool lower_cs_local_index_from_id; -} nir_shader_compiler_options; - -typedef struct nir_shader_info { - const char *name; - - /* Descriptive name provided by the client; may be NULL */ - const char *label; - - /* Number of textures used by this shader */ - unsigned num_textures; - /* Number of uniform buffers used by this shader */ - unsigned num_ubos; - /* Number of atomic buffers used by this shader */ - unsigned num_abos; - /* Number of shader storage buffers used by this shader */ - unsigned num_ssbos; - /* Number of images used by this shader */ - unsigned num_images; - - /* Which inputs are actually read */ - uint64_t inputs_read; - /* Which inputs are actually read and are double */ - uint64_t double_inputs_read; - /* Which outputs are actually written */ - uint64_t outputs_written; - /* Which system values are actually read */ - uint64_t system_values_read; - - /* Which patch inputs are actually read */ - uint32_t patch_inputs_read; - /* Which patch outputs are actually written */ - uint32_t patch_outputs_written; - - /* Whether or not this shader ever uses textureGather() */ - bool uses_texture_gather; - - /** Whether or not this shader uses nir_intrinsic_interp_var_at_offset */ - bool uses_interp_var_at_offset; - - /* Whether or not this shader uses the gl_ClipDistance output */ - bool uses_clip_distance_out; - - /* Whether or not separate shader objects were used */ - bool separate_shader; - - /** Was this shader linked with any transform feedback varyings? */ - bool has_transform_feedback_varyings; - - union { - struct { - /** The number of vertices recieves per input primitive */ - unsigned vertices_in; - - /** The output primitive type (GL enum value) */ - unsigned output_primitive; - - /** The maximum number of vertices the geometry shader might write. */ - unsigned vertices_out; - - /** 1 .. MAX_GEOMETRY_SHADER_INVOCATIONS */ - unsigned invocations; - - /** Whether or not this shader uses EndPrimitive */ - bool uses_end_primitive; - - /** Whether or not this shader uses non-zero streams */ - bool uses_streams; - } gs; - struct { - bool uses_discard; - - /** - * Whether any inputs are declared with the "sample" qualifier. - */ - bool uses_sample_qualifier; - - /** - * Whether early fragment tests are enabled as defined by - * ARB_shader_image_load_store. - */ - bool early_fragment_tests; - - /** gl_FragDepth layout for ARB_conservative_depth. */ - enum gl_frag_depth_layout depth_layout; - } fs; - - struct { - unsigned local_size[3]; - } cs; + /** + * Should nir_lower_io() create load_interpolated_input intrinsics? + * + * If not, it generates regular load_input intrinsics and interpolation + * information must be inferred from the list of input nir_variables. + */ + bool use_interpolated_input_intrinsics; - struct { - /** The number of vertices in the TCS output patch. */ - unsigned vertices_out; - } tcs; - }; -} nir_shader_info; + unsigned max_unroll_iterations; +} nir_shader_compiler_options; typedef struct nir_shader { /** list of uniforms (nir_variable) */ @@ -1847,7 +1838,7 @@ const struct nir_shader_compiler_options *options; /** Various bits of compile-time information about a given shader */ - struct nir_shader_info info; + struct shader_info *info; /** list of global variables in the shader (nir_variable) */ struct exec_list globals; @@ -1873,7 +1864,7 @@ gl_shader_stage stage; } nir_shader; -static inline nir_function * +static inline nir_function_impl * nir_shader_get_entrypoint(nir_shader *shader) { assert(exec_list_length(&shader->functions) == 1); @@ -1881,7 +1872,8 @@ nir_function *func = exec_node_data(nir_function, func_node, node); assert(func->return_type == glsl_void_type()); assert(func->num_params == 0); - return func; + assert(func->impl); + return func->impl; } #define nir_foreach_function(func, shader) \ @@ -1889,7 +1881,8 @@ nir_shader *nir_shader_create(void *mem_ctx, gl_shader_stage stage, - const nir_shader_compiler_options *options); + const nir_shader_compiler_options *options, + shader_info *si); /** creates a register, including assigning it an index and adding it to the list */ nir_register *nir_global_reg_create(nir_shader *shader); @@ -1932,7 +1925,7 @@ nir_function_impl *nir_cf_node_get_function(nir_cf_node *node); /** requests that the given pieces of metadata be generated */ -void nir_metadata_require(nir_function_impl *impl, nir_metadata required); +void nir_metadata_require(nir_function_impl *impl, nir_metadata required, ...); /** dirties all but the preserved metadata */ void nir_metadata_preserve(nir_function_impl *impl, nir_metadata preserved); @@ -1965,8 +1958,6 @@ nir_deref_array *nir_deref_array_create(void *mem_ctx); nir_deref_struct *nir_deref_struct_create(void *mem_ctx, unsigned field_index); -nir_deref *nir_copy_deref(void *mem_ctx, nir_deref *deref); - typedef bool (*nir_deref_foreach_leaf_cb)(nir_deref_var *deref, void *state); bool nir_deref_foreach_leaf(nir_deref_var *deref, nir_deref_foreach_leaf_cb cb, void *state); @@ -2078,19 +2069,24 @@ } static inline nir_cursor +nir_after_phis(nir_block *block) +{ + nir_foreach_instr(instr, block) { + if (instr->type != nir_instr_type_phi) + return nir_before_instr(instr); + } + return nir_after_block(block); +} + +static inline nir_cursor nir_after_cf_node_and_phis(nir_cf_node *node) { if (node->type == nir_cf_node_block) return nir_after_block(nir_cf_node_as_block(node)); nir_block *block = nir_cf_node_as_block(nir_cf_node_next(node)); - assert(block->cf_node.type == nir_cf_node_block); - nir_foreach_instr(instr, block) { - if (instr->type != nir_instr_type_phi) - return nir_before_instr(instr); - } - return nir_after_block(block); + return nir_after_phis(block); } static inline nir_cursor @@ -2269,6 +2265,8 @@ nir_function_impl *nir_function_impl_clone(const nir_function_impl *fi); nir_constant *nir_constant_clone(const nir_constant *c, nir_variable *var); nir_variable *nir_variable_clone(const nir_variable *c, nir_shader *shader); +nir_deref *nir_deref_clone(const nir_deref *deref, void *mem_ctx); +nir_deref_var *nir_deref_var_clone(const nir_deref_var *deref, void *mem_ctx); #ifdef DEBUG void nir_validate_shader(nir_shader *shader); @@ -2340,7 +2338,7 @@ bool nir_propagate_invariant(nir_shader *shader); -void nir_lower_var_copy_instr(nir_intrinsic_instr *copy, void *mem_ctx); +void nir_lower_var_copy_instr(nir_intrinsic_instr *copy, nir_shader *shader); void nir_lower_var_copies(nir_shader *shader); bool nir_lower_global_vars_to_local(nir_shader *shader); @@ -2349,32 +2347,47 @@ bool nir_lower_locals_to_regs(nir_shader *shader); -void nir_lower_io_to_temporaries(nir_shader *shader, nir_function *entrypoint, +void nir_lower_io_to_temporaries(nir_shader *shader, + nir_function_impl *entrypoint, bool outputs, bool inputs); void nir_shader_gather_info(nir_shader *shader, nir_function_impl *entrypoint); -void nir_assign_var_locations(struct exec_list *var_list, - unsigned *size, +void nir_assign_var_locations(struct exec_list *var_list, unsigned *size, int (*type_size)(const struct glsl_type *)); +typedef enum { + /* If set, this forces all non-flat fragment shader inputs to be + * interpolated as if with the "sample" qualifier. This requires + * nir_shader_compiler_options::use_interpolated_input_intrinsics. + */ + nir_lower_io_force_sample_interpolation = (1 << 1), +} nir_lower_io_options; void nir_lower_io(nir_shader *shader, nir_variable_mode modes, - int (*type_size)(const struct glsl_type *)); + int (*type_size)(const struct glsl_type *), + nir_lower_io_options); nir_src *nir_get_io_offset_src(nir_intrinsic_instr *instr); nir_src *nir_get_io_vertex_index_src(nir_intrinsic_instr *instr); +bool nir_is_per_vertex_io(nir_variable *var, gl_shader_stage stage); + void nir_lower_io_types(nir_shader *shader); +void nir_lower_regs_to_ssa_impl(nir_function_impl *impl); +void nir_lower_regs_to_ssa(nir_shader *shader); void nir_lower_vars_to_ssa(nir_shader *shader); bool nir_remove_dead_variables(nir_shader *shader, nir_variable_mode modes); +bool nir_lower_constant_initializers(nir_shader *shader, + nir_variable_mode modes); void nir_move_vec_src_uses_to_dest(nir_shader *shader); bool nir_lower_vec_to_movs(nir_shader *shader); -void nir_lower_alu_to_scalar(nir_shader *shader); +bool nir_lower_alu_to_scalar(nir_shader *shader); void nir_lower_load_const_to_scalar(nir_shader *shader); -void nir_lower_phis_to_scalar(nir_shader *shader); +bool nir_lower_phis_to_scalar(nir_shader *shader); +void nir_lower_io_to_scalar(nir_shader *shader, nir_variable_mode mask); void nir_lower_samplers(nir_shader *shader, const struct gl_shader_program *shader_program); @@ -2449,6 +2462,18 @@ * of the texture are lowered to linear. */ unsigned lower_srgb; + + /** + * If true, lower nir_texop_txd on cube maps with nir_texop_txl. + */ + bool lower_txd_cube_map; + + /** + * If true, lower nir_texop_txd on shadow samplers (except cube maps) + * with nir_texop_txl. Notice that cube map shadow samplers are lowered + * with lower_txd_cube_map. + */ + bool lower_txd_shadow; } nir_lower_tex_options; bool nir_lower_tex(nir_shader *shader, @@ -2458,12 +2483,14 @@ void nir_lower_clip_vs(nir_shader *shader, unsigned ucp_enables); void nir_lower_clip_fs(nir_shader *shader, unsigned ucp_enables); +void nir_lower_clip_cull_distance_arrays(nir_shader *nir); void nir_lower_two_sided_color(nir_shader *shader); void nir_lower_clamp_color_outputs(nir_shader *shader); void nir_lower_passthrough_edgeflags(nir_shader *shader); +void nir_lower_tes_patch_vertices(nir_shader *tes, unsigned patch_vertices); typedef struct nir_lower_wpos_ytransform_options { int state_tokens[5]; @@ -2521,20 +2548,26 @@ bool nir_normalize_cubemap_coords(nir_shader *shader); void nir_live_ssa_defs_impl(nir_function_impl *impl); -bool nir_ssa_defs_interfere(nir_ssa_def *a, nir_ssa_def *b); -void nir_convert_to_ssa_impl(nir_function_impl *impl); -void nir_convert_to_ssa(nir_shader *shader); +void nir_loop_analyze_impl(nir_function_impl *impl, + nir_variable_mode indirect_mask); + +bool nir_ssa_defs_interfere(nir_ssa_def *a, nir_ssa_def *b); bool nir_repair_ssa_impl(nir_function_impl *impl); bool nir_repair_ssa(nir_shader *shader); +void nir_convert_loop_to_lcssa(nir_loop *loop); + /* If phi_webs_only is true, only convert SSA values involved in phi nodes to * registers. If false, convert all values (even those not involved in a phi * node) to registers. */ void nir_convert_from_ssa(nir_shader *shader, bool phi_webs_only); +bool nir_lower_phis_to_regs_block(nir_block *block); +bool nir_lower_ssa_defs_to_regs_block(nir_block *block); + bool nir_opt_algebraic(nir_shader *shader); bool nir_opt_algebraic_late(nir_shader *shader); bool nir_opt_constant_folding(nir_shader *shader); @@ -2543,20 +2576,32 @@ bool nir_copy_prop(nir_shader *shader); +bool nir_opt_copy_prop_vars(nir_shader *shader); + bool nir_opt_cse(nir_shader *shader); bool nir_opt_dce(nir_shader *shader); bool nir_opt_dead_cf(nir_shader *shader); -void nir_opt_gcm(nir_shader *shader); +bool nir_opt_gcm(nir_shader *shader, bool value_number); -bool nir_opt_peephole_select(nir_shader *shader); +bool nir_opt_if(nir_shader *shader); + +bool nir_opt_loop_unroll(nir_shader *shader, nir_variable_mode indirect_mask); + +bool nir_opt_move_comparisons(nir_shader *shader); + +bool nir_opt_peephole_select(nir_shader *shader, unsigned limit); bool nir_opt_remove_phis(nir_shader *shader); +bool nir_opt_trivial_continues(nir_shader *shader); + bool nir_opt_undef(nir_shader *shader); +bool nir_opt_conditional_discard(nir_shader *shader); + void nir_sweep(nir_shader *shader); nir_intrinsic_op nir_intrinsic_from_system_value(gl_system_value val); diff -Nru mesa-12.0.6/src/compiler/nir/nir_inline_functions.c mesa-17.0.7/src/compiler/nir/nir_inline_functions.c --- mesa-12.0.6/src/compiler/nir/nir_inline_functions.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_inline_functions.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,20 +25,6 @@ #include "nir_builder.h" #include "nir_control_flow.h" -static bool -deref_apply_constant_initializer(nir_deref_var *deref, void *state) -{ - struct nir_builder *b = state; - - nir_load_const_instr *initializer = - nir_deref_get_const_initializer_load(b->shader, deref); - nir_builder_instr_insert(b, &initializer->instr); - - nir_store_deref_var(b, deref, &initializer->def, 0xf); - - return true; -} - static bool inline_function_impl(nir_function_impl *impl, struct set *inlined); static void @@ -63,7 +49,7 @@ /* Now we make a new deref by concatenating the deref in the call's * parameter with the deref we were given. */ - nir_deref_var *new_deref = nir_deref_as_var(nir_copy_deref(instr, &call_deref->deref)); + nir_deref_var *new_deref = nir_deref_var_clone(call_deref, instr); nir_deref *new_tail = nir_deref_tail(&new_deref->deref); new_tail->child = (*deref)->deref.child; ralloc_steal(new_tail, new_tail->child); @@ -188,35 +174,11 @@ /* Add copies of all in parameters */ assert(call->num_params == callee_copy->num_params); - b->cursor = nir_before_instr(&call->instr); - - /* Before we insert the copy of the function, we need to lower away - * constant initializers on local variables. This is because constant - * initializers happen (effectively) at the top of the function and, - * since these are about to become locals of the calling function, - * initialization will happen at the top of the caller rather than at - * the top of the callee. This isn't usually a problem, but if we are - * being inlined inside of a loop, it can result in the variable not - * getting re-initialized properly for all loop iterations. - */ - nir_foreach_variable(local, &callee_copy->locals) { - if (!local->constant_initializer) - continue; - - nir_deref_var deref; - deref.deref.deref_type = nir_deref_type_var, - deref.deref.child = NULL; - deref.deref.type = local->type, - deref.var = local; - - nir_deref_foreach_leaf(&deref, deref_apply_constant_initializer, b); - - local->constant_initializer = NULL; - } - exec_list_append(&b->impl->locals, &callee_copy->locals); exec_list_append(&b->impl->registers, &callee_copy->registers); + b->cursor = nir_before_instr(&call->instr); + /* We now need to tie the two functions together using the * parameters. There are two ways we do this: One is to turn the * parameter into a local variable and do a shadow-copy. The other diff -Nru mesa-12.0.6/src/compiler/nir/nir_instr_set.c mesa-17.0.7/src/compiler/nir/nir_instr_set.c --- mesa-12.0.6/src/compiler/nir/nir_instr_set.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_instr_set.c 2017-06-01 10:37:10.000000000 +0000 @@ -228,7 +228,7 @@ } } -static bool +bool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2, unsigned src1, unsigned src2) { @@ -514,7 +514,7 @@ nir_instr *match = (nir_instr *) entry->key; nir_ssa_def *new_def = nir_instr_get_dest_ssa_def(match); - /* It's safe to replace a exact instruction with an inexact one as + /* It's safe to replace an exact instruction with an inexact one as * long as we make it exact. If we got here, the two instructions are * exactly identical in every other way so, once we've set the exact * bit, they are the same. diff -Nru mesa-12.0.6/src/compiler/nir/nir_intrinsics.h mesa-17.0.7/src/compiler/nir/nir_intrinsics.h --- mesa-12.0.6/src/compiler/nir/nir_intrinsics.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_intrinsics.h 2017-06-01 10:37:10.000000000 +0000 @@ -50,9 +50,9 @@ /* * Interpolation of input. The interp_var_at* intrinsics are similar to the - * load_var intrinsic acting an a shader input except that they interpolate + * load_var intrinsic acting on a shader input except that they interpolate * the input differently. The at_sample and at_offset intrinsics take an - * aditional source that is a integer sample id or a vec2 position offset + * additional source that is an integer sample id or a vec2 position offset * respectively. */ @@ -91,7 +91,7 @@ * The latter can be used as code motion barrier, which is currently not * feasible with NIR. */ -INTRINSIC(shader_clock, 0, ARR(0), true, 1, 0, 0, xx, xx, xx, NIR_INTRINSIC_CAN_ELIMINATE) +INTRINSIC(shader_clock, 0, ARR(0), true, 2, 0, 0, xx, xx, xx, NIR_INTRINSIC_CAN_ELIMINATE) /* * Memory barrier with semantics analogous to the compute shader @@ -139,12 +139,26 @@ */ #define ATOMIC(name, flags) \ - INTRINSIC(atomic_counter_##name##_var, 0, ARR(0), true, 1, 1, 0, xx, xx, xx, flags) \ - INTRINSIC(atomic_counter_##name, 1, ARR(1), true, 1, 0, 1, BASE, xx, xx, flags) - -ATOMIC(inc, 0) -ATOMIC(dec, 0) -ATOMIC(read, NIR_INTRINSIC_CAN_ELIMINATE) + INTRINSIC(name##_var, 0, ARR(0), true, 1, 1, 0, xx, xx, xx, flags) \ + INTRINSIC(name, 1, ARR(1), true, 1, 0, 1, BASE, xx, xx, flags) +#define ATOMIC2(name) \ + INTRINSIC(name##_var, 1, ARR(1), true, 1, 1, 0, xx, xx, xx, 0) \ + INTRINSIC(name, 2, ARR(1, 1), true, 1, 0, 1, BASE, xx, xx, 0) +#define ATOMIC3(name) \ + INTRINSIC(name##_var, 2, ARR(1, 1), true, 1, 1, 0, xx, xx, xx, 0) \ + INTRINSIC(name, 3, ARR(1, 1, 1), true, 1, 0, 1, BASE, xx, xx, 0) + +ATOMIC(atomic_counter_inc, 0) +ATOMIC(atomic_counter_dec, 0) +ATOMIC(atomic_counter_read, NIR_INTRINSIC_CAN_ELIMINATE) +ATOMIC2(atomic_counter_add) +ATOMIC2(atomic_counter_min) +ATOMIC2(atomic_counter_max) +ATOMIC2(atomic_counter_and) +ATOMIC2(atomic_counter_or) +ATOMIC2(atomic_counter_xor) +ATOMIC2(atomic_counter_exchange) +ATOMIC3(atomic_counter_comp_swap) /* * Image load, store and atomic intrinsics. @@ -279,7 +293,13 @@ INTRINSIC(shared_atomic_exchange, 2, ARR(1, 1), true, 1, 0, 1, BASE, xx, xx, 0) INTRINSIC(shared_atomic_comp_swap, 3, ARR(1, 1, 1), true, 1, 0, 1, BASE, xx, xx, 0) +/* Used by nir_builder.h to generate loader helpers for the system values. */ +#ifndef DEFINE_SYSTEM_VALUE +#define DEFINE_SYSTEM_VALUE(name) +#endif + #define SYSTEM_VALUE(name, components, num_indices, idx0, idx1, idx2) \ + DEFINE_SYSTEM_VALUE(name) \ INTRINSIC(load_##name, 0, ARR(0), true, components, 0, num_indices, \ idx0, idx1, idx2, \ NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER) @@ -307,6 +327,45 @@ SYSTEM_VALUE(num_work_groups, 3, 0, xx, xx, xx) SYSTEM_VALUE(helper_invocation, 1, 0, xx, xx, xx) SYSTEM_VALUE(channel_num, 1, 0, xx, xx, xx) +SYSTEM_VALUE(alpha_ref_float, 1, 0, xx, xx, xx) +SYSTEM_VALUE(layer_id, 1, 0, xx, xx, xx) + +/* Blend constant color values. Float values are clamped. */ +SYSTEM_VALUE(blend_const_color_r_float, 1, 0, xx, xx, xx) +SYSTEM_VALUE(blend_const_color_g_float, 1, 0, xx, xx, xx) +SYSTEM_VALUE(blend_const_color_b_float, 1, 0, xx, xx, xx) +SYSTEM_VALUE(blend_const_color_a_float, 1, 0, xx, xx, xx) +SYSTEM_VALUE(blend_const_color_rgba8888_unorm, 1, 0, xx, xx, xx) +SYSTEM_VALUE(blend_const_color_aaaa8888_unorm, 1, 0, xx, xx, xx) + +/** + * Barycentric coordinate intrinsics. + * + * These set up the barycentric coordinates for a particular interpolation. + * The first three are for the simple cases: pixel, centroid, or per-sample + * (at gl_SampleID). The next two handle interpolating at a specified + * sample location, or interpolating with a vec2 offset, + * + * The interp_mode index should be either the INTERP_MODE_SMOOTH or + * INTERP_MODE_NOPERSPECTIVE enum values. + * + * The vec2 value produced by these intrinsics is intended for use as the + * barycoord source of a load_interpolated_input intrinsic. + */ + +#define BARYCENTRIC(name, sources, source_components) \ + INTRINSIC(load_barycentric_##name, sources, ARR(source_components), \ + true, 2, 0, 1, INTERP_MODE, xx, xx, \ + NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER) + +/* no sources. const_index[] = { interp_mode } */ +BARYCENTRIC(pixel, 0, 0) +BARYCENTRIC(centroid, 0, 0) +BARYCENTRIC(sample, 0, 0) +/* src[] = { sample_id }. const_index[] = { interp_mode } */ +BARYCENTRIC(at_sample, 1, 1) +/* src[] = { offset.xy }. const_index[] = { interp_mode } */ +BARYCENTRIC(at_offset, 1, 2) /* * Load operations pull data from some piece of GPU memory. All load @@ -333,20 +392,25 @@ #define LOAD(name, srcs, num_indices, idx0, idx1, idx2, flags) \ INTRINSIC(load_##name, srcs, ARR(1, 1, 1, 1), true, 0, 0, num_indices, idx0, idx1, idx2, flags) -/* src[] = { offset }. const_index[] = { base } */ +/* src[] = { offset }. const_index[] = { base, range } */ LOAD(uniform, 1, 2, BASE, RANGE, xx, NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER) /* src[] = { buffer_index, offset }. No const_index */ LOAD(ubo, 2, 0, xx, xx, xx, NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER) -/* src[] = { offset }. const_index[] = { base } */ -LOAD(input, 1, 1, BASE, xx, xx, NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER) -/* src[] = { vertex, offset }. const_index[] = { base } */ -LOAD(per_vertex_input, 2, 1, BASE, xx, xx, NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER) +/* src[] = { offset }. const_index[] = { base, component } */ +LOAD(input, 1, 2, BASE, COMPONENT, xx, NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER) +/* src[] = { vertex, offset }. const_index[] = { base, component } */ +LOAD(per_vertex_input, 2, 2, BASE, COMPONENT, xx, NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER) +/* src[] = { barycoord, offset }. const_index[] = { base, component } */ +INTRINSIC(load_interpolated_input, 2, ARR(2, 1), true, 0, 0, + 2, BASE, COMPONENT, xx, + NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER) + /* src[] = { buffer_index, offset }. No const_index */ LOAD(ssbo, 2, 0, xx, xx, xx, NIR_INTRINSIC_CAN_ELIMINATE) -/* src[] = { offset }. const_index[] = { base } */ -LOAD(output, 1, 1, BASE, xx, xx, NIR_INTRINSIC_CAN_ELIMINATE) -/* src[] = { vertex, offset }. const_index[] = { base } */ -LOAD(per_vertex_output, 2, 1, BASE, xx, xx, NIR_INTRINSIC_CAN_ELIMINATE) +/* src[] = { offset }. const_index[] = { base, component } */ +LOAD(output, 1, 1, BASE, COMPONENT, xx, NIR_INTRINSIC_CAN_ELIMINATE) +/* src[] = { vertex, offset }. const_index[] = { base, component } */ +LOAD(per_vertex_output, 2, 1, BASE, COMPONENT, xx, NIR_INTRINSIC_CAN_ELIMINATE) /* src[] = { offset }. const_index[] = { base } */ LOAD(shared, 1, 1, BASE, xx, xx, NIR_INTRINSIC_CAN_ELIMINATE) /* src[] = { offset }. const_index[] = { base, range } */ @@ -363,13 +427,19 @@ #define STORE(name, srcs, num_indices, idx0, idx1, idx2, flags) \ INTRINSIC(store_##name, srcs, ARR(0, 1, 1, 1), false, 0, 0, num_indices, idx0, idx1, idx2, flags) -/* src[] = { value, offset }. const_index[] = { base, write_mask } */ -STORE(output, 2, 2, BASE, WRMASK, xx, 0) -/* src[] = { value, vertex, offset }. const_index[] = { base, write_mask } */ -STORE(per_vertex_output, 3, 2, BASE, WRMASK, xx, 0) +/* src[] = { value, offset }. const_index[] = { base, write_mask, component } */ +STORE(output, 2, 3, BASE, WRMASK, COMPONENT, 0) +/* src[] = { value, vertex, offset }. + * const_index[] = { base, write_mask, component } + */ +STORE(per_vertex_output, 3, 3, BASE, WRMASK, COMPONENT, 0) /* src[] = { value, block_index, offset }. const_index[] = { write_mask } */ STORE(ssbo, 3, 1, WRMASK, xx, xx, 0) /* src[] = { value, offset }. const_index[] = { base, write_mask } */ STORE(shared, 2, 2, BASE, WRMASK, xx, 0) LAST_INTRINSIC(store_shared) + +#undef DEFINE_SYSTEM_VALUE +#undef INTRINSIC +#undef LAST_INTRINSIC diff -Nru mesa-12.0.6/src/compiler/nir/nir_loop_analyze.c mesa-17.0.7/src/compiler/nir/nir_loop_analyze.c --- mesa-12.0.6/src/compiler/nir/nir_loop_analyze.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_loop_analyze.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,844 @@ +/* + * Copyright © 2015 Thomas Helland + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "nir.h" +#include "nir_constant_expressions.h" +#include "nir_loop_analyze.h" + +typedef enum { + undefined, + invariant, + not_invariant, + basic_induction +} nir_loop_variable_type; + +struct nir_basic_induction_var; + +typedef struct { + /* A link for the work list */ + struct list_head process_link; + + bool in_loop; + + /* The ssa_def associated with this info */ + nir_ssa_def *def; + + /* The type of this ssa_def */ + nir_loop_variable_type type; + + /* If this is of type basic_induction */ + struct nir_basic_induction_var *ind; + + /* True if variable is in an if branch or a nested loop */ + bool in_control_flow; + +} nir_loop_variable; + +typedef struct nir_basic_induction_var { + nir_op alu_op; /* The type of alu-operation */ + nir_loop_variable *alu_def; /* The def of the alu-operation */ + nir_loop_variable *invariant; /* The invariant alu-operand */ + nir_loop_variable *def_outside_loop; /* The phi-src outside the loop */ +} nir_basic_induction_var; + +typedef struct { + /* The loop we store information for */ + nir_loop *loop; + + /* Loop_variable for all ssa_defs in function */ + nir_loop_variable *loop_vars; + + /* A list of the loop_vars to analyze */ + struct list_head process_list; + + nir_variable_mode indirect_mask; + +} loop_info_state; + +static nir_loop_variable * +get_loop_var(nir_ssa_def *value, loop_info_state *state) +{ + return &(state->loop_vars[value->index]); +} + +typedef struct { + loop_info_state *state; + bool in_control_flow; +} init_loop_state; + +static bool +init_loop_def(nir_ssa_def *def, void *void_init_loop_state) +{ + init_loop_state *loop_init_state = void_init_loop_state; + nir_loop_variable *var = get_loop_var(def, loop_init_state->state); + + if (loop_init_state->in_control_flow) { + var->in_control_flow = true; + } else { + /* Add to the tail of the list. That way we start at the beginning of + * the defs in the loop instead of the end when walking the list. This + * means less recursive calls. Only add defs that are not in nested + * loops or conditional blocks. + */ + list_addtail(&var->process_link, &loop_init_state->state->process_list); + } + + var->in_loop = true; + + return true; +} + +static bool +init_loop_block(nir_block *block, loop_info_state *state, + bool in_control_flow) +{ + init_loop_state init_state = {.in_control_flow = in_control_flow, + .state = state }; + + nir_foreach_instr(instr, block) { + if (instr->type == nir_instr_type_intrinsic || + instr->type == nir_instr_type_alu || + instr->type == nir_instr_type_tex) { + state->loop->info->num_instructions++; + } + + nir_foreach_ssa_def(instr, init_loop_def, &init_state); + } + + return true; +} + +static inline bool +is_var_alu(nir_loop_variable *var) +{ + return var->def->parent_instr->type == nir_instr_type_alu; +} + +static inline bool +is_var_constant(nir_loop_variable *var) +{ + return var->def->parent_instr->type == nir_instr_type_load_const; +} + +static inline bool +is_var_phi(nir_loop_variable *var) +{ + return var->def->parent_instr->type == nir_instr_type_phi; +} + +static inline bool +mark_invariant(nir_ssa_def *def, loop_info_state *state) +{ + nir_loop_variable *var = get_loop_var(def, state); + + if (var->type == invariant) + return true; + + if (!var->in_loop) { + var->type = invariant; + return true; + } + + if (var->type == not_invariant) + return false; + + if (is_var_alu(var)) { + nir_alu_instr *alu = nir_instr_as_alu(def->parent_instr); + + for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) { + if (!mark_invariant(alu->src[i].src.ssa, state)) { + var->type = not_invariant; + return false; + } + } + var->type = invariant; + return true; + } + + /* Phis shouldn't be invariant except if one operand is invariant, and the + * other is the phi itself. These should be removed by opt_remove_phis. + * load_consts are already set to invariant and constant during init, + * and so should return earlier. Remaining op_codes are set undefined. + */ + var->type = not_invariant; + return false; +} + +static void +compute_invariance_information(loop_info_state *state) +{ + /* An expression is invariant in a loop L if: + * (base cases) + * – it’s a constant + * – it’s a variable use, all of whose single defs are outside of L + * (inductive cases) + * – it’s a pure computation all of whose args are loop invariant + * – it’s a variable use whose single reaching def, and the + * rhs of that def is loop-invariant + */ + list_for_each_entry_safe(nir_loop_variable, var, &state->process_list, + process_link) { + assert(!var->in_control_flow); + + if (mark_invariant(var->def, state)) + list_del(&var->process_link); + } +} + +static bool +compute_induction_information(loop_info_state *state) +{ + bool found_induction_var = false; + list_for_each_entry_safe(nir_loop_variable, var, &state->process_list, + process_link) { + + /* It can't be an induction variable if it is invariant. Invariants and + * things in nested loops or conditionals should have been removed from + * the list by compute_invariance_information(). + */ + assert(!var->in_control_flow && var->type != invariant); + + /* We are only interested in checking phi's for the basic induction + * variable case as its simple to detect. All basic induction variables + * have a phi node + */ + if (!is_var_phi(var)) + continue; + + nir_phi_instr *phi = nir_instr_as_phi(var->def->parent_instr); + nir_basic_induction_var *biv = rzalloc(state, nir_basic_induction_var); + + nir_foreach_phi_src(src, phi) { + nir_loop_variable *src_var = get_loop_var(src->src.ssa, state); + + /* If one of the sources is in a conditional or nested block then + * panic. + */ + if (src_var->in_control_flow) + break; + + if (!src_var->in_loop) { + biv->def_outside_loop = src_var; + } else if (is_var_alu(src_var)) { + nir_alu_instr *alu = nir_instr_as_alu(src_var->def->parent_instr); + + if (nir_op_infos[alu->op].num_inputs == 2) { + biv->alu_def = src_var; + biv->alu_op = alu->op; + + for (unsigned i = 0; i < 2; i++) { + /* Is one of the operands const, and the other the phi */ + if (alu->src[i].src.ssa->parent_instr->type == nir_instr_type_load_const && + alu->src[1-i].src.ssa == &phi->dest.ssa) + biv->invariant = get_loop_var(alu->src[i].src.ssa, state); + } + } + } + } + + if (biv->alu_def && biv->def_outside_loop && biv->invariant && + is_var_constant(biv->def_outside_loop)) { + assert(is_var_constant(biv->invariant)); + biv->alu_def->type = basic_induction; + biv->alu_def->ind = biv; + var->type = basic_induction; + var->ind = biv; + + found_induction_var = true; + } else { + ralloc_free(biv); + } + } + return found_induction_var; +} + +static bool +initialize_ssa_def(nir_ssa_def *def, void *void_state) +{ + loop_info_state *state = void_state; + nir_loop_variable *var = get_loop_var(def, state); + + var->in_loop = false; + var->def = def; + + if (def->parent_instr->type == nir_instr_type_load_const) { + var->type = invariant; + } else { + var->type = undefined; + } + + return true; +} + +static inline bool +ends_in_break(nir_block *block) +{ + if (exec_list_is_empty(&block->instr_list)) + return false; + + nir_instr *instr = nir_block_last_instr(block); + return instr->type == nir_instr_type_jump && + nir_instr_as_jump(instr)->type == nir_jump_break; +} + +static bool +find_loop_terminators(loop_info_state *state) +{ + bool success = false; + foreach_list_typed_safe(nir_cf_node, node, node, &state->loop->body) { + if (node->type == nir_cf_node_if) { + nir_if *nif = nir_cf_node_as_if(node); + + nir_block *break_blk = NULL; + nir_block *continue_from_blk = NULL; + bool continue_from_then = true; + + nir_block *last_then = nir_if_last_then_block(nif); + nir_block *last_else = nir_if_last_else_block(nif); + if (ends_in_break(last_then)) { + break_blk = last_then; + continue_from_blk = last_else; + continue_from_then = false; + } else if (ends_in_break(last_else)) { + break_blk = last_else; + continue_from_blk = last_then; + } + + /* If there is a break then we should find a terminator. If we can + * not find a loop terminator, but there is a break-statement then + * we should return false so that we do not try to find trip-count + */ + if (!nir_is_trivial_loop_if(nif, break_blk)) + return false; + + /* Continue if the if contained no jumps at all */ + if (!break_blk) + continue; + + if (nif->condition.ssa->parent_instr->type == nir_instr_type_phi) + return false; + + nir_loop_terminator *terminator = + rzalloc(state->loop->info, nir_loop_terminator); + + list_add(&terminator->loop_terminator_link, + &state->loop->info->loop_terminator_list); + + terminator->nif = nif; + terminator->break_block = break_blk; + terminator->continue_from_block = continue_from_blk; + terminator->continue_from_then = continue_from_then; + terminator->conditional_instr = nif->condition.ssa->parent_instr; + + success = true; + } + } + + return success; +} + +static int32_t +get_iteration(nir_op cond_op, nir_const_value *initial, nir_const_value *step, + nir_const_value *limit, nir_alu_instr *alu) +{ + int32_t iter; + + switch (cond_op) { + case nir_op_ige: + case nir_op_ilt: + case nir_op_ieq: + case nir_op_ine: { + int32_t initial_val = initial->i32[0]; + int32_t span = limit->i32[0] - initial_val; + iter = span / step->i32[0]; + break; + } + case nir_op_uge: + case nir_op_ult: { + uint32_t initial_val = initial->u32[0]; + uint32_t span = limit->u32[0] - initial_val; + iter = span / step->u32[0]; + break; + } + case nir_op_fge: + case nir_op_flt: + case nir_op_feq: + case nir_op_fne: { + float initial_val = initial->f32[0]; + float span = limit->f32[0] - initial_val; + iter = span / step->f32[0]; + break; + } + default: + return -1; + } + + return iter; +} + +static bool +test_iterations(int32_t iter_int, nir_const_value *step, + nir_const_value *limit, nir_op cond_op, unsigned bit_size, + nir_alu_type induction_base_type, + nir_const_value *initial, bool limit_rhs, bool invert_cond) +{ + assert(nir_op_infos[cond_op].num_inputs == 2); + + nir_const_value iter_src = { {0, } }; + nir_op mul_op; + nir_op add_op; + switch (induction_base_type) { + case nir_type_float: + iter_src.f32[0] = (float) iter_int; + mul_op = nir_op_fmul; + add_op = nir_op_fadd; + break; + case nir_type_int: + case nir_type_uint: + iter_src.i32[0] = iter_int; + mul_op = nir_op_imul; + add_op = nir_op_iadd; + break; + default: + unreachable("Unhandled induction variable base type!"); + } + + /* Multiple the iteration count we are testing by the number of times we + * step the induction variable each iteration. + */ + nir_const_value mul_src[2] = { iter_src, *step }; + nir_const_value mul_result = + nir_eval_const_opcode(mul_op, 1, bit_size, mul_src); + + /* Add the initial value to the accumulated induction variable total */ + nir_const_value add_src[2] = { mul_result, *initial }; + nir_const_value add_result = + nir_eval_const_opcode(add_op, 1, bit_size, add_src); + + nir_const_value src[2] = { { {0, } }, { {0, } } }; + src[limit_rhs ? 0 : 1] = add_result; + src[limit_rhs ? 1 : 0] = *limit; + + /* Evaluate the loop exit condition */ + nir_const_value result = nir_eval_const_opcode(cond_op, 1, bit_size, src); + + return invert_cond ? (result.u32[0] == 0) : (result.u32[0] != 0); +} + +static int +calculate_iterations(nir_const_value *initial, nir_const_value *step, + nir_const_value *limit, nir_loop_variable *alu_def, + nir_alu_instr *cond_alu, bool limit_rhs, bool invert_cond) +{ + assert(initial != NULL && step != NULL && limit != NULL); + + nir_alu_instr *alu = nir_instr_as_alu(alu_def->def->parent_instr); + + /* nir_op_isub should have been lowered away by this point */ + assert(alu->op != nir_op_isub); + + /* Make sure the alu type for our induction variable is compatible with the + * conditional alus input type. If its not something has gone really wrong. + */ + nir_alu_type induction_base_type = + nir_alu_type_get_base_type(nir_op_infos[alu->op].output_type); + if (induction_base_type == nir_type_int || induction_base_type == nir_type_uint) { + assert(nir_alu_type_get_base_type(nir_op_infos[cond_alu->op].input_types[1]) == nir_type_int || + nir_alu_type_get_base_type(nir_op_infos[cond_alu->op].input_types[1]) == nir_type_uint); + } else { + assert(nir_alu_type_get_base_type(nir_op_infos[cond_alu->op].input_types[0]) == + induction_base_type); + } + + /* Check for nsupported alu operations */ + if (alu->op != nir_op_iadd && alu->op != nir_op_fadd) + return -1; + + /* do-while loops can increment the starting value before the condition is + * checked. e.g. + * + * do { + * ndx++; + * } while (ndx < 3); + * + * Here we check if the induction variable is used directly by the loop + * condition and if so we assume we need to step the initial value. + */ + unsigned trip_offset = 0; + if (cond_alu->src[0].src.ssa == alu_def->def || + cond_alu->src[1].src.ssa == alu_def->def) { + trip_offset = 1; + } + + int iter_int = get_iteration(cond_alu->op, initial, step, limit, alu); + + /* If iter_int is negative the loop is ill-formed or is the conditional is + * unsigned with a huge iteration count so don't bother going any further. + */ + if (iter_int < 0) + return -1; + + /* An explanation from the GLSL unrolling pass: + * + * Make sure that the calculated number of iterations satisfies the exit + * condition. This is needed to catch off-by-one errors and some types of + * ill-formed loops. For example, we need to detect that the following + * loop does not have a maximum iteration count. + * + * for (float x = 0.0; x != 0.9; x += 0.2); + */ + assert(nir_src_bit_size(alu->src[0].src) == + nir_src_bit_size(alu->src[1].src)); + unsigned bit_size = nir_src_bit_size(alu->src[0].src); + for (int bias = -1; bias <= 1; bias++) { + const int iter_bias = iter_int + bias; + + if (test_iterations(iter_bias, step, limit, cond_alu->op, bit_size, + induction_base_type, initial, + limit_rhs, invert_cond)) { + return iter_bias > 0 ? iter_bias - trip_offset : iter_bias; + } + } + + return -1; +} + +/* Run through each of the terminators of the loop and try to infer a possible + * trip-count. We need to check them all, and set the lowest trip-count as the + * trip-count of our loop. If one of the terminators has an undecidable + * trip-count we can not safely assume anything about the duration of the + * loop. + */ +static void +find_trip_count(loop_info_state *state) +{ + bool trip_count_known = true; + nir_loop_terminator *limiting_terminator = NULL; + int min_trip_count = -1; + + list_for_each_entry(nir_loop_terminator, terminator, + &state->loop->info->loop_terminator_list, + loop_terminator_link) { + + if (terminator->conditional_instr->type != nir_instr_type_alu) { + /* If we get here the loop is dead and will get cleaned up by the + * nir_opt_dead_cf pass. + */ + trip_count_known = false; + continue; + } + + nir_alu_instr *alu = nir_instr_as_alu(terminator->conditional_instr); + nir_loop_variable *basic_ind = NULL; + nir_loop_variable *limit = NULL; + bool limit_rhs = true; + + switch (alu->op) { + case nir_op_fge: case nir_op_ige: case nir_op_uge: + case nir_op_flt: case nir_op_ilt: case nir_op_ult: + case nir_op_feq: case nir_op_ieq: + case nir_op_fne: case nir_op_ine: + + /* We assume that the limit is the "right" operand */ + basic_ind = get_loop_var(alu->src[0].src.ssa, state); + limit = get_loop_var(alu->src[1].src.ssa, state); + + if (basic_ind->type != basic_induction) { + /* We had it the wrong way, flip things around */ + basic_ind = get_loop_var(alu->src[1].src.ssa, state); + limit = get_loop_var(alu->src[0].src.ssa, state); + limit_rhs = false; + } + + /* The comparison has to have a basic induction variable + * and a constant for us to be able to find trip counts + */ + if (basic_ind->type != basic_induction || !is_var_constant(limit)) { + trip_count_known = false; + continue; + } + + /* We have determined that we have the following constants: + * (With the typical int i = 0; i < x; i++; as an example) + * - Upper limit. + * - Starting value + * - Step / iteration size + * Thats all thats needed to calculate the trip-count + */ + + nir_const_value initial_val = + nir_instr_as_load_const(basic_ind->ind->def_outside_loop-> + def->parent_instr)->value; + + nir_const_value step_val = + nir_instr_as_load_const(basic_ind->ind->invariant->def-> + parent_instr)->value; + + nir_const_value limit_val = + nir_instr_as_load_const(limit->def->parent_instr)->value; + + int iterations = calculate_iterations(&initial_val, &step_val, + &limit_val, + basic_ind->ind->alu_def, alu, + limit_rhs, + terminator->continue_from_then); + + /* Where we not able to calculate the iteration count */ + if (iterations == -1) { + trip_count_known = false; + continue; + } + + /* If this is the first run or we have found a smaller amount of + * iterations than previously (we have identified a more limiting + * terminator) set the trip count and limiting terminator. + */ + if (min_trip_count == -1 || iterations < min_trip_count) { + min_trip_count = iterations; + limiting_terminator = terminator; + } + break; + + default: + trip_count_known = false; + } + } + + state->loop->info->is_trip_count_known = trip_count_known; + if (min_trip_count > -1) + state->loop->info->trip_count = min_trip_count; + state->loop->info->limiting_terminator = limiting_terminator; +} + +/* Checks if we should force the loop to be unrolled regardless of size + * due to array access heuristics. + */ +static bool +force_unroll_array_access(loop_info_state *state, nir_shader *ns, + nir_deref_var *variable) +{ + nir_deref *tail = &variable->deref; + + while (tail->child != NULL) { + tail = tail->child; + + if (tail->deref_type == nir_deref_type_array) { + + nir_deref_array *deref_array = nir_deref_as_array(tail); + if (deref_array->deref_array_type != nir_deref_array_type_indirect) + continue; + + nir_loop_variable *array_index = + get_loop_var(deref_array->indirect.ssa, state); + + if (array_index->type != basic_induction) + continue; + + /* If an array is indexed by a loop induction variable, and the + * array size is exactly the number of loop iterations, this is + * probably a simple for-loop trying to access each element in + * turn; the application may expect it to be unrolled. + */ + if (glsl_get_length(variable->deref.type) == + state->loop->info->trip_count) { + state->loop->info->force_unroll = true; + return state->loop->info->force_unroll; + } + + if (variable->var->data.mode & state->indirect_mask) { + state->loop->info->force_unroll = true; + return state->loop->info->force_unroll; + } + } + } + + return false; +} + +static bool +force_unroll_heuristics(loop_info_state *state, nir_shader *ns, + nir_block *block) +{ + nir_foreach_instr(instr, block) { + if (instr->type != nir_instr_type_intrinsic) + continue; + + nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr); + + /* Check for arrays variably-indexed by a loop induction variable. + * Unrolling the loop may convert that access into constant-indexing. + */ + if (intrin->intrinsic == nir_intrinsic_load_var || + intrin->intrinsic == nir_intrinsic_store_var || + intrin->intrinsic == nir_intrinsic_copy_var) { + unsigned num_vars = + nir_intrinsic_infos[intrin->intrinsic].num_variables; + for (unsigned i = 0; i < num_vars; i++) { + if (force_unroll_array_access(state, ns, intrin->variables[i])) + return true; + } + } + } + + return false; +} + +static void +get_loop_info(loop_info_state *state, nir_function_impl *impl) +{ + /* Initialize all variables to "outside_loop". This also marks defs + * invariant and constant if they are nir_instr_type_load_const's + */ + nir_foreach_block(block, impl) { + nir_foreach_instr(instr, block) + nir_foreach_ssa_def(instr, initialize_ssa_def, state); + } + + /* Add all entries in the outermost part of the loop to the processing list + * Mark the entries in conditionals or in nested loops accordingly + */ + foreach_list_typed_safe(nir_cf_node, node, node, &state->loop->body) { + switch (node->type) { + + case nir_cf_node_block: + init_loop_block(nir_cf_node_as_block(node), state, false); + break; + + case nir_cf_node_if: + nir_foreach_block_in_cf_node(block, node) + init_loop_block(block, state, true); + break; + + case nir_cf_node_loop: + nir_foreach_block_in_cf_node(block, node) { + init_loop_block(block, state, true); + } + break; + + case nir_cf_node_function: + break; + } + } + + /* Induction analysis needs invariance information so get that first */ + compute_invariance_information(state); + + /* We have invariance information so try to find induction variables */ + if (!compute_induction_information(state)) + return; + + /* Try to find all simple terminators of the loop. If we can't find any, + * or we find possible terminators that have side effects then bail. + */ + if (!find_loop_terminators(state)) { + list_for_each_entry_safe(nir_loop_terminator, terminator, + &state->loop->info->loop_terminator_list, + loop_terminator_link) { + list_del(&terminator->loop_terminator_link); + ralloc_free(terminator); + } + return; + } + + /* Run through each of the terminators and try to compute a trip-count */ + find_trip_count(state); + + nir_shader *ns = impl->function->shader; + foreach_list_typed_safe(nir_cf_node, node, node, &state->loop->body) { + if (node->type == nir_cf_node_block) { + if (force_unroll_heuristics(state, ns, nir_cf_node_as_block(node))) + break; + } else { + nir_foreach_block_in_cf_node(block, node) { + if (force_unroll_heuristics(state, ns, block)) + break; + } + } + } +} + +static loop_info_state * +initialize_loop_info_state(nir_loop *loop, void *mem_ctx, + nir_function_impl *impl) +{ + loop_info_state *state = rzalloc(mem_ctx, loop_info_state); + state->loop_vars = rzalloc_array(mem_ctx, nir_loop_variable, + impl->ssa_alloc); + state->loop = loop; + + list_inithead(&state->process_list); + + if (loop->info) + ralloc_free(loop->info); + + loop->info = rzalloc(loop, nir_loop_info); + + list_inithead(&loop->info->loop_terminator_list); + + return state; +} + +static void +process_loops(nir_cf_node *cf_node, nir_variable_mode indirect_mask) +{ + switch (cf_node->type) { + case nir_cf_node_block: + return; + case nir_cf_node_if: { + nir_if *if_stmt = nir_cf_node_as_if(cf_node); + foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) + process_loops(nested_node, indirect_mask); + foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) + process_loops(nested_node, indirect_mask); + return; + } + case nir_cf_node_loop: { + nir_loop *loop = nir_cf_node_as_loop(cf_node); + foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) + process_loops(nested_node, indirect_mask); + break; + } + default: + unreachable("unknown cf node type"); + } + + nir_loop *loop = nir_cf_node_as_loop(cf_node); + nir_function_impl *impl = nir_cf_node_get_function(cf_node); + void *mem_ctx = ralloc_context(NULL); + + loop_info_state *state = initialize_loop_info_state(loop, mem_ctx, impl); + state->indirect_mask = indirect_mask; + + get_loop_info(state, impl); + + ralloc_free(mem_ctx); +} + +void +nir_loop_analyze_impl(nir_function_impl *impl, + nir_variable_mode indirect_mask) +{ + nir_index_ssa_defs(impl); + foreach_list_typed(nir_cf_node, node, node, &impl->body) + process_loops(node, indirect_mask); +} diff -Nru mesa-12.0.6/src/compiler/nir/nir_loop_analyze.h mesa-17.0.7/src/compiler/nir/nir_loop_analyze.h --- mesa-12.0.6/src/compiler/nir/nir_loop_analyze.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_loop_analyze.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,92 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#pragma once + +#include "nir.h" + +/* Returns true if nir_cf_node contains a jump other than the expected_jump + * parameter. + */ +static inline bool +contains_other_jump(nir_cf_node *node, nir_instr *expected_jump) +{ + switch (node->type) { + case nir_cf_node_block: { + nir_instr *lst_instr = nir_block_last_instr(nir_cf_node_as_block(node)); + + /* dead_cf should have eliminated any instruction after the first break + */ + nir_foreach_instr(instr, nir_cf_node_as_block(node)) + assert(instr->type != nir_instr_type_jump || instr == lst_instr); + + if (lst_instr && lst_instr->type == nir_instr_type_jump && + lst_instr != expected_jump) + return true; + else + return false; + } + case nir_cf_node_if: { + nir_if *if_stmt = nir_cf_node_as_if(node); + + foreach_list_typed_safe(nir_cf_node, node, node, &if_stmt->then_list) { + if (contains_other_jump(node, expected_jump)) + return true; + } + + foreach_list_typed_safe(nir_cf_node, node, node, &if_stmt->else_list) { + if (contains_other_jump(node, expected_jump)) + return true; + } + + return false; + } + case nir_cf_node_loop: + return true; + + default: + unreachable("Unhandled cf node type"); + } +} + +/* Here we define a trivial if as containing only a single break that must be + * located at the end of either the then or else branch of the top level if, + * there must be no other breaks or any other type of jump. Or we pass NULL + * to break_block the if must contains no jumps at all. + */ +static inline bool +nir_is_trivial_loop_if(nir_if *nif, nir_block *break_block) +{ + nir_instr *last_instr = NULL; + + if (break_block) { + last_instr = nir_block_last_instr(break_block); + assert(last_instr && last_instr->type == nir_instr_type_jump && + nir_instr_as_jump(last_instr)->type == nir_jump_break); + } + + if (contains_other_jump(&nif->cf_node, last_instr)) + return false; + + return true; +} diff -Nru mesa-12.0.6/src/compiler/nir/nir_lower_alu_to_scalar.c mesa-17.0.7/src/compiler/nir/nir_lower_alu_to_scalar.c --- mesa-12.0.6/src/compiler/nir/nir_lower_alu_to_scalar.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_lower_alu_to_scalar.c 2017-06-01 10:37:10.000000000 +0000 @@ -73,7 +73,7 @@ nir_instr_remove(&instr->instr); } -static void +static bool lower_alu_instr_scalar(nir_alu_instr *instr, nir_builder *b) { unsigned num_src = nir_op_infos[instr->op].num_inputs; @@ -90,7 +90,7 @@ case name##3: \ case name##4: \ lower_reduction(instr, chan, merge, b); \ - return; + return true; switch (instr->op) { case nir_op_vec4: @@ -99,11 +99,11 @@ /* We don't need to scalarize these ops, they're the ones generated to * group up outputs into a value that can be SSAed. */ - return; + return false; case nir_op_pack_half_2x16: if (!b->shader->options->lower_pack_half_2x16) - return; + return false; nir_ssa_def *val = nir_pack_half_2x16_split(b, nir_channel(b, instr->src[0].src.ssa, @@ -113,7 +113,7 @@ nir_ssa_def_rewrite_uses(&instr->dest.dest.ssa, nir_src_for_ssa(val)); nir_instr_remove(&instr->instr); - return; + return true; case nir_op_unpack_unorm_4x8: case nir_op_unpack_snorm_4x8: @@ -122,11 +122,11 @@ /* There is no scalar version of these ops, unless we were to break it * down to bitshifts and math (which is definitely not intended). */ - return; + return false; case nir_op_unpack_half_2x16: { if (!b->shader->options->lower_unpack_half_2x16) - return; + return false; nir_ssa_def *comps[2]; comps[0] = nir_unpack_half_2x16_split_x(b, instr->src[0].src.ssa); @@ -135,7 +135,7 @@ nir_ssa_def_rewrite_uses(&instr->dest.dest.ssa, nir_src_for_ssa(vec)); nir_instr_remove(&instr->instr); - return; + return true; } case nir_op_pack_uvec2_to_uint: { @@ -185,11 +185,11 @@ nir_ssa_def_rewrite_uses(&instr->dest.dest.ssa, nir_src_for_ssa(val)); nir_instr_remove(&instr->instr); - return; + return true; } case nir_op_unpack_double_2x32: - return; + return false; LOWER_REDUCTION(nir_op_fdot, nir_op_fmul, nir_op_fadd); LOWER_REDUCTION(nir_op_ball_fequal, nir_op_feq, nir_op_iand); @@ -204,7 +204,7 @@ } if (instr->dest.dest.ssa.num_components == 1) - return; + return false; unsigned num_components = instr->dest.dest.ssa.num_components; nir_ssa_def *comps[] = { NULL, NULL, NULL, NULL }; @@ -240,30 +240,40 @@ nir_ssa_def_rewrite_uses(&instr->dest.dest.ssa, nir_src_for_ssa(vec)); nir_instr_remove(&instr->instr); + return true; } -static void +static bool nir_lower_alu_to_scalar_impl(nir_function_impl *impl) { nir_builder builder; nir_builder_init(&builder, impl); + bool progress = false; nir_foreach_block(block, impl) { nir_foreach_instr_safe(instr, block) { - if (instr->type == nir_instr_type_alu) - lower_alu_instr_scalar(nir_instr_as_alu(instr), &builder); + if (instr->type == nir_instr_type_alu) { + progress = lower_alu_instr_scalar(nir_instr_as_alu(instr), + &builder) || progress; + } } } nir_metadata_preserve(impl, nir_metadata_block_index | nir_metadata_dominance); + + return progress; } -void +bool nir_lower_alu_to_scalar(nir_shader *shader) { + bool progress = false; + nir_foreach_function(function, shader) { if (function->impl) - nir_lower_alu_to_scalar_impl(function->impl); + progress = nir_lower_alu_to_scalar_impl(function->impl) || progress; } + + return progress; } diff -Nru mesa-12.0.6/src/compiler/nir/nir_lower_atomics.c mesa-17.0.7/src/compiler/nir/nir_lower_atomics.c --- mesa-12.0.6/src/compiler/nir/nir_lower_atomics.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_lower_atomics.c 2017-06-01 10:37:10.000000000 +0000 @@ -54,6 +54,38 @@ op = nir_intrinsic_atomic_counter_dec; break; + case nir_intrinsic_atomic_counter_add_var: + op = nir_intrinsic_atomic_counter_add; + break; + + case nir_intrinsic_atomic_counter_min_var: + op = nir_intrinsic_atomic_counter_min; + break; + + case nir_intrinsic_atomic_counter_max_var: + op = nir_intrinsic_atomic_counter_max; + break; + + case nir_intrinsic_atomic_counter_and_var: + op = nir_intrinsic_atomic_counter_and; + break; + + case nir_intrinsic_atomic_counter_or_var: + op = nir_intrinsic_atomic_counter_or; + break; + + case nir_intrinsic_atomic_counter_xor_var: + op = nir_intrinsic_atomic_counter_xor; + break; + + case nir_intrinsic_atomic_counter_exchange_var: + op = nir_intrinsic_atomic_counter_exchange; + break; + + case nir_intrinsic_atomic_counter_comp_swap_var: + op = nir_intrinsic_atomic_counter_comp_swap; + break; + default: return; } @@ -68,7 +100,7 @@ nir_intrinsic_instr *new_instr = nir_intrinsic_instr_create(mem_ctx, op); nir_intrinsic_set_base(new_instr, - shader_program->UniformStorage[uniform_loc].opaque[shader->stage].index); + shader_program->data->UniformStorage[uniform_loc].opaque[shader->stage].index); nir_load_const_instr *offset_const = nir_load_const_instr_create(mem_ctx, 1, 32); @@ -80,7 +112,6 @@ nir_deref *tail = &instr->variables[0]->deref; while (tail->child != NULL) { - assert(tail->child->deref_type == nir_deref_type_array); nir_deref_array *deref_array = nir_deref_as_array(tail->child); tail = tail->child; @@ -120,6 +151,12 @@ new_instr->src[0].is_ssa = true; new_instr->src[0].ssa = offset_def; + /* Copy the other sources, if any, from the original instruction to the new + * instruction. + */ + for (unsigned i = 0; i < nir_intrinsic_infos[instr->intrinsic].num_srcs; i++) + new_instr->src[i + 1] = instr->src[i]; + if (instr->dest.is_ssa) { nir_ssa_dest_init(&new_instr->instr, &new_instr->dest, instr->dest.ssa.num_components, 32, NULL); diff -Nru mesa-12.0.6/src/compiler/nir/nir_lower_bitmap.c mesa-17.0.7/src/compiler/nir/nir_lower_bitmap.c --- mesa-12.0.6/src/compiler/nir/nir_lower_bitmap.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_lower_bitmap.c 2017-06-01 10:37:10.000000000 +0000 @@ -95,7 +95,10 @@ tex->sampler_index = options->sampler; tex->texture_index = options->sampler; tex->dest_type = nir_type_float; - tex->src[0].src = nir_src_for_ssa(texcoord); + tex->src[0].src_type = nir_tex_src_coord; + tex->src[0].src = + nir_src_for_ssa(nir_channels(b, texcoord, + (1 << tex->coord_components) - 1)); nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, NULL); nir_builder_instr_insert(b, &tex->instr); @@ -107,6 +110,8 @@ discard = nir_intrinsic_instr_create(shader, nir_intrinsic_discard_if); discard->src[0] = nir_src_for_ssa(cond); nir_builder_instr_insert(b, &discard->instr); + + shader->info->fs.uses_discard = true; } static void @@ -128,12 +133,7 @@ nir_lower_bitmap(nir_shader *shader, const nir_lower_bitmap_options *options) { - nir_function *function; - assert(shader->stage == MESA_SHADER_FRAGMENT); - function = nir_shader_get_entrypoint(shader); - - if (function->impl) - lower_bitmap_impl(function->impl, options); + lower_bitmap_impl(nir_shader_get_entrypoint(shader), options); } diff -Nru mesa-12.0.6/src/compiler/nir/nir_lower_clip.c mesa-17.0.7/src/compiler/nir/nir_lower_clip.c --- mesa-12.0.6/src/compiler/nir/nir_lower_clip.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_lower_clip.c 2017-06-01 10:37:10.000000000 +0000 @@ -286,6 +286,8 @@ nir_intrinsic_discard_if); discard->src[0] = nir_src_for_ssa(cond); nir_builder_instr_insert(&b, &discard->instr); + + b.shader->info->fs.uses_discard = true; } } } diff -Nru mesa-12.0.6/src/compiler/nir/nir_lower_clip_cull_distance_arrays.c mesa-17.0.7/src/compiler/nir/nir_lower_clip_cull_distance_arrays.c --- mesa-12.0.6/src/compiler/nir/nir_lower_clip_cull_distance_arrays.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_lower_clip_cull_distance_arrays.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,188 @@ +/* + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "nir.h" +#include "nir_builder.h" + +/** + * @file + * + * This pass combines separate clip and cull distance arrays into a + * single array that contains both. Clip distances come first, then + * cull distances. It also populates nir_shader_info with the size + * of the original arrays so the driver knows which are which. + */ + +/** + * Get the length of the clip/cull distance array, looking past + * any interface block arrays. + */ +static unsigned +get_unwrapped_array_length(nir_shader *nir, nir_variable *var) +{ + if (!var) + return 0; + + /* Unwrap GS input and TCS input/output interfaces. We want the + * underlying clip/cull distance array length, not the per-vertex + * array length. + */ + const struct glsl_type *type = var->type; + if (nir_is_per_vertex_io(var, nir->stage)) + type = glsl_get_array_element(type); + + assert(glsl_type_is_array(type)); + + return glsl_get_length(type); +} + +/** + * Update the type of the combined array (including interface block nesting). + */ +static void +update_type(nir_variable *var, gl_shader_stage stage, unsigned length) +{ + const struct glsl_type *type = glsl_array_type(glsl_float_type(), length); + + if (nir_is_per_vertex_io(var, stage)) + type = glsl_array_type(type, glsl_get_length(var->type)); + + var->type = type; +} + +/** + * Rewrite any clip/cull distances to refer to the new combined array. + */ +static void +rewrite_references(nir_instr *instr, + nir_variable *combined, + unsigned cull_offset) +{ + if (instr->type != nir_instr_type_intrinsic) + return; + + nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr); + + /* copy_var needs to be lowered to load/store before calling this pass */ + assert(intrin->intrinsic != nir_intrinsic_copy_var); + + if (intrin->intrinsic != nir_intrinsic_load_var && + intrin->intrinsic != nir_intrinsic_store_var) + return; + + nir_deref_var *var_ref = intrin->variables[0]; + if (var_ref->var->data.mode != combined->data.mode) + return; + + if (var_ref->var->data.location != VARYING_SLOT_CLIP_DIST0 && + var_ref->var->data.location != VARYING_SLOT_CULL_DIST0) + return; + + /* Update types along the deref chain */ + const struct glsl_type *type = combined->type; + nir_deref *deref = &var_ref->deref; + while (deref) { + deref->type = type; + deref = deref->child; + type = glsl_get_array_element(type); + } + + /* For cull distances, add an offset to the array index */ + if (var_ref->var->data.location == VARYING_SLOT_CULL_DIST0) { + nir_deref *tail = nir_deref_tail(&intrin->variables[0]->deref); + nir_deref_array *array_ref = nir_deref_as_array(tail); + + array_ref->base_offset += cull_offset; + } + + /* Point the deref at the combined array */ + var_ref->var = combined; + + /* There's no need to update writemasks; it's a scalar array. */ +} + +static void +combine_clip_cull(nir_shader *nir, + struct exec_list *vars, + bool store_info) +{ + nir_variable *cull = NULL; + nir_variable *clip = NULL; + + nir_foreach_variable(var, vars) { + if (var->data.location == VARYING_SLOT_CLIP_DIST0) + clip = var; + + if (var->data.location == VARYING_SLOT_CULL_DIST0) + cull = var; + } + + const unsigned clip_array_size = get_unwrapped_array_length(nir, clip); + const unsigned cull_array_size = get_unwrapped_array_length(nir, cull); + + if (store_info) { + nir->info->clip_distance_array_size = clip_array_size; + nir->info->cull_distance_array_size = cull_array_size; + } + + if (clip) + clip->data.compact = true; + + if (cull) + cull->data.compact = true; + + if (cull_array_size > 0) { + if (clip_array_size == 0) { + /* No clip distances, just change the cull distance location */ + cull->data.location = VARYING_SLOT_CLIP_DIST0; + } else { + /* Turn the ClipDistance array into a combined one */ + update_type(clip, nir->stage, clip_array_size + cull_array_size); + + /* Rewrite CullDistance to reference the combined array */ + nir_foreach_function(function, nir) { + if (function->impl) { + nir_foreach_block(block, function->impl) { + nir_foreach_instr(instr, block) { + rewrite_references(instr, clip, clip_array_size); + } + } + } + } + + /* Delete the old CullDistance variable */ + exec_node_remove(&cull->node); + ralloc_free(cull); + } + } +} + +void +nir_lower_clip_cull_distance_arrays(nir_shader *nir) +{ + if (nir->stage <= MESA_SHADER_GEOMETRY) + combine_clip_cull(nir, &nir->outputs, true); + + if (nir->stage > MESA_SHADER_VERTEX) + combine_clip_cull(nir, &nir->inputs, false); +} diff -Nru mesa-12.0.6/src/compiler/nir/nir_lower_constant_initializers.c mesa-17.0.7/src/compiler/nir/nir_lower_constant_initializers.c --- mesa-12.0.6/src/compiler/nir/nir_lower_constant_initializers.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_lower_constant_initializers.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,112 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "nir.h" +#include "nir_builder.h" + +static bool +deref_apply_constant_initializer(nir_deref_var *deref, void *state) +{ + struct nir_builder *b = state; + + nir_load_const_instr *initializer = + nir_deref_get_const_initializer_load(b->shader, deref); + nir_builder_instr_insert(b, &initializer->instr); + + nir_store_deref_var(b, deref, &initializer->def, 0xf); + + return true; +} + +static bool +lower_const_initializer(struct nir_builder *b, struct exec_list *var_list) +{ + bool progress = false; + + b->cursor = nir_before_cf_list(&b->impl->body); + + nir_foreach_variable(var, var_list) { + if (!var->constant_initializer) + continue; + + progress = true; + + nir_deref_var deref; + deref.deref.deref_type = nir_deref_type_var, + deref.deref.child = NULL; + deref.deref.type = var->type, + deref.var = var; + + nir_deref_foreach_leaf(&deref, deref_apply_constant_initializer, b); + + var->constant_initializer = NULL; + } + + return progress; +} + +bool +nir_lower_constant_initializers(nir_shader *shader, nir_variable_mode modes) +{ + bool progress = false; + + nir_builder builder; + if (modes & ~nir_var_local) + nir_builder_init(&builder, nir_shader_get_entrypoint(shader)); + + if (modes & nir_var_shader_out) + progress |= lower_const_initializer(&builder, &shader->outputs); + + if (modes & nir_var_global) + progress |= lower_const_initializer(&builder, &shader->globals); + + if (modes & nir_var_system_value) + progress |= lower_const_initializer(&builder, &shader->system_values); + + if (progress) { + nir_foreach_function(function, shader) { + if (function->impl) { + nir_metadata_preserve(function->impl, nir_metadata_block_index | + nir_metadata_dominance | + nir_metadata_live_ssa_defs); + } + } + } + + if (modes & nir_var_local) { + nir_foreach_function(function, shader) { + if (!function->impl) + continue; + + nir_builder_init(&builder, function->impl); + if (lower_const_initializer(&builder, &function->impl->locals)) { + nir_metadata_preserve(function->impl, nir_metadata_block_index | + nir_metadata_dominance | + nir_metadata_live_ssa_defs); + progress = true; + } + } + } + + return progress; +} diff -Nru mesa-12.0.6/src/compiler/nir/nir_lower_drawpixels.c mesa-17.0.7/src/compiler/nir/nir_lower_drawpixels.c --- mesa-12.0.6/src/compiler/nir/nir_lower_drawpixels.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_lower_drawpixels.c 2017-06-01 10:37:10.000000000 +0000 @@ -134,7 +134,10 @@ tex->sampler_index = state->options->drawpix_sampler; tex->texture_index = state->options->drawpix_sampler; tex->dest_type = nir_type_float; - tex->src[0].src = nir_src_for_ssa(texcoord); + tex->src[0].src_type = nir_tex_src_coord; + tex->src[0].src = + nir_src_for_ssa(nir_channels(b, texcoord, + (1 << tex->coord_components) - 1)); nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, NULL); nir_builder_instr_insert(b, &tex->instr); @@ -161,6 +164,7 @@ tex->sampler_index = state->options->pixelmap_sampler; tex->texture_index = state->options->pixelmap_sampler; tex->dest_type = nir_type_float; + tex->src[0].src_type = nir_tex_src_coord; tex->src[0].src = nir_src_for_ssa(nir_swizzle(b, def, swiz_xy, 2, true)); nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, NULL); @@ -174,6 +178,7 @@ tex->coord_components = 2; tex->sampler_index = state->options->pixelmap_sampler; tex->dest_type = nir_type_float; + tex->src[0].src_type = nir_tex_src_coord; tex->src[0].src = nir_src_for_ssa(nir_swizzle(b, def, swiz_zw, 2, true)); nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, NULL); @@ -194,6 +199,8 @@ static void lower_texcoord(lower_drawpixels_state *state, nir_intrinsic_instr *intr) { + state->b.cursor = nir_before_instr(&intr->instr); + nir_ssa_def *texcoord_const = get_texcoord_const(state); nir_ssa_def_rewrite_uses(&intr->dest.ssa, nir_src_for_ssa(texcoord_const)); } @@ -209,7 +216,7 @@ nir_variable *var = dvar->var; if (var->data.location == VARYING_SLOT_COL0) { - /* gl_FragCoord should not have array/struct deref's: */ + /* gl_Color should not have array/struct deref's: */ assert(dvar->deref.child == NULL); lower_color(state, intr); } else if (var->data.location == VARYING_SLOT_TEX0) { diff -Nru mesa-12.0.6/src/compiler/nir/nir_lower_gs_intrinsics.c mesa-17.0.7/src/compiler/nir/nir_lower_gs_intrinsics.c --- mesa-12.0.6/src/compiler/nir/nir_lower_gs_intrinsics.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_lower_gs_intrinsics.c 2017-06-01 10:37:10.000000000 +0000 @@ -76,7 +76,8 @@ b->cursor = nir_before_instr(&intrin->instr); nir_ssa_def *count = nir_load_var(b, state->vertex_count_var); - nir_ssa_def *max_vertices = nir_imm_int(b, b->shader->info.gs.vertices_out); + nir_ssa_def *max_vertices = + nir_imm_int(b, b->shader->info->gs.vertices_out); /* Create: if (vertex_count < max_vertices) and insert it. * @@ -188,32 +189,27 @@ struct state state; state.progress = false; + nir_function_impl *impl = nir_shader_get_entrypoint(shader); + assert(impl); + + nir_builder b; + nir_builder_init(&b, impl); + state.builder = &b; + /* Create the counter variable */ - nir_variable *var = rzalloc(shader, nir_variable); - var->data.mode = nir_var_global; - var->type = glsl_uint_type(); - var->name = "vertex_count"; - var->constant_initializer = rzalloc(shader, nir_constant); /* initialize to 0 */ - - exec_list_push_tail(&shader->globals, &var->node); - state.vertex_count_var = var; - - nir_foreach_function(function, shader) { - if (function->impl) { - nir_builder b; - nir_builder_init(&b, function->impl); - state.builder = &b; - - nir_foreach_block_safe(block, function->impl) { - rewrite_intrinsics(block, &state); - } + state.vertex_count_var = + nir_local_variable_create(impl, glsl_uint_type(), "vertex_count"); + /* initialize to 0 */ + b.cursor = nir_before_cf_list(&impl->body); + nir_store_var(&b, state.vertex_count_var, nir_imm_int(&b, 0), 0x1); - /* This only works because we have a single main() function. */ - append_set_vertex_count(function->impl->end_block, &state); + nir_foreach_block_safe(block, impl) + rewrite_intrinsics(block, &state); - nir_metadata_preserve(function->impl, 0); - } - } + /* This only works because we have a single main() function. */ + append_set_vertex_count(impl->end_block, &state); + + nir_metadata_preserve(impl, 0); return state.progress; } diff -Nru mesa-12.0.6/src/compiler/nir/nir_lower_idiv.c mesa-17.0.7/src/compiler/nir/nir_lower_idiv.c --- mesa-12.0.6/src/compiler/nir/nir_lower_idiv.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_lower_idiv.c 2017-06-01 10:37:10.000000000 +0000 @@ -101,8 +101,7 @@ if (is_signed) { /* fix the sign: */ r = nir_ixor(bld, numer, denom); - r = nir_ushr(bld, r, nir_imm_int(bld, 31)); - r = nir_i2b(bld, r); + r = nir_ishr(bld, r, nir_imm_int(bld, 31)); b = nir_ineg(bld, q); q = nir_bcsel(bld, r, b, q); } diff -Nru mesa-12.0.6/src/compiler/nir/nir_lower_indirect_derefs.c mesa-17.0.7/src/compiler/nir/nir_lower_indirect_derefs.c --- mesa-12.0.6/src/compiler/nir/nir_lower_indirect_derefs.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_lower_indirect_derefs.c 2017-06-01 10:37:10.000000000 +0000 @@ -35,8 +35,6 @@ int start, int end, nir_ssa_def **dest, nir_ssa_def *src) { - assert(arr_parent->child && - arr_parent->child->deref_type == nir_deref_type_array); nir_deref_array *arr = nir_deref_as_array(arr_parent->child); assert(arr->deref_array_type == nir_deref_array_type_indirect); assert(arr->indirect.is_ssa); @@ -80,12 +78,12 @@ then_dest->num_components, bit_size, NULL); nir_phi_src *src0 = ralloc(phi, nir_phi_src); - src0->pred = nir_cf_node_as_block(nir_if_last_then_node(if_stmt)); + src0->pred = nir_if_last_then_block(if_stmt); src0->src = nir_src_for_ssa(then_dest); exec_list_push_tail(&phi->srcs, &src0->node); nir_phi_src *src1 = ralloc(phi, nir_phi_src); - src1->pred = nir_cf_node_as_block(nir_if_last_else_node(if_stmt)); + src1->pred = nir_if_last_else_block(if_stmt); src1->src = nir_src_for_ssa(else_dest); exec_list_push_tail(&phi->srcs, &src1->node); @@ -124,8 +122,7 @@ nir_intrinsic_instr *load = nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_var); load->num_components = orig_instr->num_components; - load->variables[0] = - nir_deref_as_var(nir_copy_deref(load, &deref->deref)); + load->variables[0] = nir_deref_var_clone(deref, load); unsigned bit_size = orig_instr->dest.ssa.bit_size; nir_ssa_dest_init(&load->instr, &load->dest, load->num_components, bit_size, NULL); @@ -137,8 +134,7 @@ nir_intrinsic_instr_create(b->shader, nir_intrinsic_store_var); store->num_components = orig_instr->num_components; nir_intrinsic_set_write_mask(store, nir_intrinsic_write_mask(orig_instr)); - store->variables[0] = - nir_deref_as_var(nir_copy_deref(store, &deref->deref)); + store->variables[0] = nir_deref_var_clone(deref, store); store->src[0] = nir_src_for_ssa(src); nir_builder_instr_insert(b, &store->instr); } @@ -177,8 +173,12 @@ if (!deref_has_indirect(intrin->variables[0])) continue; - /* Only lower variables whose mode is in the mask */ - if (!(modes & intrin->variables[0]->var->data.mode)) + /* Only lower variables whose mode is in the mask, or compact + * array variables. (We can't handle indirects on tightly packed + * scalar arrays, so we need to lower them regardless.) + */ + if (!(modes & intrin->variables[0]->var->data.mode) && + !intrin->variables[0]->var->data.compact) continue; b->cursor = nir_before_instr(&intrin->instr); diff -Nru mesa-12.0.6/src/compiler/nir/nir_lower_io.c mesa-17.0.7/src/compiler/nir/nir_lower_io.c --- mesa-12.0.6/src/compiler/nir/nir_lower_io.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_lower_io.c 2017-06-01 10:37:10.000000000 +0000 @@ -36,9 +36,9 @@ struct lower_io_state { nir_builder builder; - void *mem_ctx; int (*type_size)(const struct glsl_type *type); nir_variable_mode modes; + nir_lower_io_options options; }; void @@ -64,32 +64,31 @@ } /** - * Returns true if we're processing a stage whose inputs are arrays indexed - * by a vertex number (such as geometry shader inputs). + * Return true if the given variable is a per-vertex input/output array. + * (such as geometry shader inputs). */ -static bool -is_per_vertex_input(struct lower_io_state *state, nir_variable *var) +bool +nir_is_per_vertex_io(nir_variable *var, gl_shader_stage stage) { - gl_shader_stage stage = state->builder.shader->stage; + if (var->data.patch || !glsl_type_is_array(var->type)) + return false; - return var->data.mode == nir_var_shader_in && !var->data.patch && - (stage == MESA_SHADER_TESS_CTRL || - stage == MESA_SHADER_TESS_EVAL || - stage == MESA_SHADER_GEOMETRY); -} + if (var->data.mode == nir_var_shader_in) + return stage == MESA_SHADER_GEOMETRY || + stage == MESA_SHADER_TESS_CTRL || + stage == MESA_SHADER_TESS_EVAL; -static bool -is_per_vertex_output(struct lower_io_state *state, nir_variable *var) -{ - gl_shader_stage stage = state->builder.shader->stage; - return var->data.mode == nir_var_shader_out && !var->data.patch && - stage == MESA_SHADER_TESS_CTRL; + if (var->data.mode == nir_var_shader_out) + return stage == MESA_SHADER_TESS_CTRL; + + return false; } static nir_ssa_def * get_io_offset(nir_builder *b, nir_deref_var *deref, nir_ssa_def **vertex_index, - int (*type_size)(const struct glsl_type *)) + int (*type_size)(const struct glsl_type *), + unsigned *component) { nir_deref *tail = &deref->deref; @@ -98,7 +97,6 @@ */ if (vertex_index != NULL) { tail = tail->child; - assert(tail->deref_type == nir_deref_type_array); nir_deref_array *deref_array = nir_deref_as_array(tail); nir_ssa_def *vtx = nir_imm_int(b, deref_array->base_offset); @@ -108,6 +106,19 @@ *vertex_index = vtx; } + if (deref->var->data.compact) { + assert(tail->child->deref_type == nir_deref_type_array); + assert(glsl_type_is_scalar(glsl_without_array(deref->var->type))); + nir_deref_array *deref_array = nir_deref_as_array(tail->child); + /* We always lower indirect dereferences for "compact" array vars. */ + assert(deref_array->deref_array_type == nir_deref_array_type_direct); + + const unsigned total_offset = *component + deref_array->base_offset; + const unsigned slot_offset = total_offset / 4; + *component = total_offset % 4; + return nir_imm_int(b, type_size(glsl_vec4_type()) * slot_offset); + } + /* Just emit code and let constant-folding go to town */ nir_ssa_def *offset = nir_imm_int(b, 0); @@ -143,18 +154,44 @@ return offset; } -static nir_intrinsic_op -load_op(nir_variable_mode mode, bool per_vertex) -{ +static nir_intrinsic_instr * +lower_load(nir_intrinsic_instr *intrin, struct lower_io_state *state, + nir_ssa_def *vertex_index, nir_ssa_def *offset, + unsigned component) +{ + const nir_shader *nir = state->builder.shader; + nir_variable *var = intrin->variables[0]->var; + nir_variable_mode mode = var->data.mode; + nir_ssa_def *barycentric = NULL; + nir_intrinsic_op op; switch (mode) { case nir_var_shader_in: - op = per_vertex ? nir_intrinsic_load_per_vertex_input : - nir_intrinsic_load_input; + if (nir->stage == MESA_SHADER_FRAGMENT && + nir->options->use_interpolated_input_intrinsics && + var->data.interpolation != INTERP_MODE_FLAT) { + assert(vertex_index == NULL); + + nir_intrinsic_op bary_op; + if (var->data.sample || + (state->options & nir_lower_io_force_sample_interpolation)) + bary_op = nir_intrinsic_load_barycentric_sample; + else if (var->data.centroid) + bary_op = nir_intrinsic_load_barycentric_centroid; + else + bary_op = nir_intrinsic_load_barycentric_pixel; + + barycentric = nir_load_barycentric(&state->builder, bary_op, + var->data.interpolation); + op = nir_intrinsic_load_interpolated_input; + } else { + op = vertex_index ? nir_intrinsic_load_per_vertex_input : + nir_intrinsic_load_input; + } break; case nir_var_shader_out: - op = per_vertex ? nir_intrinsic_load_per_vertex_output : - nir_intrinsic_load_output; + op = vertex_index ? nir_intrinsic_load_per_vertex_output : + nir_intrinsic_load_output; break; case nir_var_uniform: op = nir_intrinsic_load_uniform; @@ -165,34 +202,80 @@ default: unreachable("Unknown variable mode"); } - return op; + + nir_intrinsic_instr *load = + nir_intrinsic_instr_create(state->builder.shader, op); + load->num_components = intrin->num_components; + + nir_intrinsic_set_base(load, var->data.driver_location); + if (mode == nir_var_shader_in || mode == nir_var_shader_out) + nir_intrinsic_set_component(load, component); + + if (load->intrinsic == nir_intrinsic_load_uniform) + nir_intrinsic_set_range(load, state->type_size(var->type)); + + if (vertex_index) { + load->src[0] = nir_src_for_ssa(vertex_index); + load->src[1] = nir_src_for_ssa(offset); + } else if (barycentric) { + load->src[0] = nir_src_for_ssa(barycentric); + load->src[1] = nir_src_for_ssa(offset); + } else { + load->src[0] = nir_src_for_ssa(offset); + } + + return load; } -static nir_intrinsic_op -store_op(struct lower_io_state *state, - nir_variable_mode mode, bool per_vertex) +static nir_intrinsic_instr * +lower_store(nir_intrinsic_instr *intrin, struct lower_io_state *state, + nir_ssa_def *vertex_index, nir_ssa_def *offset, + unsigned component) { + nir_variable *var = intrin->variables[0]->var; + nir_variable_mode mode = var->data.mode; + nir_intrinsic_op op; - switch (mode) { - case nir_var_shader_in: - case nir_var_shader_out: - op = per_vertex ? nir_intrinsic_store_per_vertex_output : - nir_intrinsic_store_output; - break; - case nir_var_shared: + if (mode == nir_var_shared) { op = nir_intrinsic_store_shared; - break; - default: - unreachable("Unknown variable mode"); + } else { + assert(mode == nir_var_shader_out); + op = vertex_index ? nir_intrinsic_store_per_vertex_output : + nir_intrinsic_store_output; } - return op; + + nir_intrinsic_instr *store = + nir_intrinsic_instr_create(state->builder.shader, op); + store->num_components = intrin->num_components; + + nir_src_copy(&store->src[0], &intrin->src[0], store); + + nir_intrinsic_set_base(store, var->data.driver_location); + + if (mode == nir_var_shader_out) + nir_intrinsic_set_component(store, component); + + nir_intrinsic_set_write_mask(store, nir_intrinsic_write_mask(intrin)); + + if (vertex_index) + store->src[1] = nir_src_for_ssa(vertex_index); + + store->src[vertex_index ? 2 : 1] = nir_src_for_ssa(offset); + + return store; } -static nir_intrinsic_op -atomic_op(nir_intrinsic_op opcode) +static nir_intrinsic_instr * +lower_atomic(nir_intrinsic_instr *intrin, struct lower_io_state *state, + nir_ssa_def *offset) { - switch (opcode) { -#define OP(O) case nir_intrinsic_var_##O: return nir_intrinsic_shared_##O; + nir_variable *var = intrin->variables[0]->var; + + assert(var->data.mode == nir_var_shared); + + nir_intrinsic_op op; + switch (intrin->intrinsic) { +#define OP(O) case nir_intrinsic_var_##O: op = nir_intrinsic_shared_##O; break; OP(atomic_exchange) OP(atomic_comp_swap) OP(atomic_add) @@ -207,6 +290,72 @@ default: unreachable("Invalid atomic"); } + + nir_intrinsic_instr *atomic = + nir_intrinsic_instr_create(state->builder.shader, op); + + nir_intrinsic_set_base(atomic, var->data.driver_location); + + atomic->src[0] = nir_src_for_ssa(offset); + for (unsigned i = 0; i < nir_intrinsic_infos[intrin->intrinsic].num_srcs; i++) { + nir_src_copy(&atomic->src[i+1], &intrin->src[i], atomic); + } + + return atomic; +} + +static nir_intrinsic_instr * +lower_interpolate_at(nir_intrinsic_instr *intrin, struct lower_io_state *state, + nir_ssa_def *offset, unsigned component) +{ + nir_variable *var = intrin->variables[0]->var; + + assert(var->data.mode == nir_var_shader_in); + + /* Ignore interpolateAt() for flat variables - flat is flat. */ + if (var->data.interpolation == INTERP_MODE_FLAT) + return lower_load(intrin, state, NULL, offset, component); + + nir_intrinsic_op bary_op; + switch (intrin->intrinsic) { + case nir_intrinsic_interp_var_at_centroid: + bary_op = (state->options & nir_lower_io_force_sample_interpolation) ? + nir_intrinsic_load_barycentric_sample : + nir_intrinsic_load_barycentric_centroid; + break; + case nir_intrinsic_interp_var_at_sample: + bary_op = nir_intrinsic_load_barycentric_at_sample; + break; + case nir_intrinsic_interp_var_at_offset: + bary_op = nir_intrinsic_load_barycentric_at_offset; + break; + default: + unreachable("Bogus interpolateAt() intrinsic."); + } + + nir_intrinsic_instr *bary_setup = + nir_intrinsic_instr_create(state->builder.shader, bary_op); + + nir_ssa_dest_init(&bary_setup->instr, &bary_setup->dest, 2, 32, NULL); + nir_intrinsic_set_interp_mode(bary_setup, var->data.interpolation); + + if (intrin->intrinsic != nir_intrinsic_interp_var_at_centroid) + nir_src_copy(&bary_setup->src[0], &intrin->src[0], bary_setup); + + nir_builder_instr_insert(&state->builder, &bary_setup->instr); + + nir_intrinsic_instr *load = + nir_intrinsic_instr_create(state->builder.shader, + nir_intrinsic_load_interpolated_input); + load->num_components = intrin->num_components; + + nir_intrinsic_set_base(load, var->data.driver_location); + nir_intrinsic_set_component(load, component); + + load->src[0] = nir_src_for_ssa(&bary_setup->dest.ssa); + load->src[1] = nir_src_for_ssa(offset); + + return load; } static bool @@ -214,6 +363,7 @@ struct lower_io_state *state) { nir_builder *b = &state->builder; + const nir_shader_compiler_options *options = b->shader->options; nir_foreach_instr_safe(instr, block) { if (instr->type != nir_instr_type_intrinsic) @@ -236,12 +386,19 @@ case nir_intrinsic_var_atomic_comp_swap: /* We can lower the io for this nir instrinsic */ break; + case nir_intrinsic_interp_var_at_centroid: + case nir_intrinsic_interp_var_at_sample: + case nir_intrinsic_interp_var_at_offset: + /* We can optionally lower these to load_interpolated_input */ + if (options->use_interpolated_input_intrinsics) + break; default: /* We can't lower the io for this nir instrinsic, so skip it */ continue; } - nir_variable_mode mode = intrin->variables[0]->var->data.mode; + nir_variable *var = intrin->variables[0]->var; + nir_variable_mode mode = var->data.mode; if ((state->modes & mode) == 0) continue; @@ -254,85 +411,28 @@ b->cursor = nir_before_instr(instr); - switch (intrin->intrinsic) { - case nir_intrinsic_load_var: { - bool per_vertex = - is_per_vertex_input(state, intrin->variables[0]->var) || - is_per_vertex_output(state, intrin->variables[0]->var); - - nir_ssa_def *offset; - nir_ssa_def *vertex_index; - - offset = get_io_offset(b, intrin->variables[0], - per_vertex ? &vertex_index : NULL, - state->type_size); - - nir_intrinsic_instr *load = - nir_intrinsic_instr_create(state->mem_ctx, - load_op(mode, per_vertex)); - load->num_components = intrin->num_components; - - nir_intrinsic_set_base(load, - intrin->variables[0]->var->data.driver_location); - - if (load->intrinsic == nir_intrinsic_load_uniform) { - nir_intrinsic_set_range(load, - state->type_size(intrin->variables[0]->var->type)); - } + const bool per_vertex = nir_is_per_vertex_io(var, b->shader->stage); - if (per_vertex) - load->src[0] = nir_src_for_ssa(vertex_index); + nir_ssa_def *offset; + nir_ssa_def *vertex_index = NULL; + unsigned component_offset = var->data.location_frac; - load->src[per_vertex ? 1 : 0] = nir_src_for_ssa(offset); + offset = get_io_offset(b, intrin->variables[0], + per_vertex ? &vertex_index : NULL, + state->type_size, &component_offset); - if (intrin->dest.is_ssa) { - nir_ssa_dest_init(&load->instr, &load->dest, - intrin->num_components, - intrin->dest.ssa.bit_size, NULL); - nir_ssa_def_rewrite_uses(&intrin->dest.ssa, - nir_src_for_ssa(&load->dest.ssa)); - } else { - nir_dest_copy(&load->dest, &intrin->dest, state->mem_ctx); - } + nir_intrinsic_instr *replacement; - nir_instr_insert_before(&intrin->instr, &load->instr); - nir_instr_remove(&intrin->instr); + switch (intrin->intrinsic) { + case nir_intrinsic_load_var: + replacement = lower_load(intrin, state, vertex_index, offset, + component_offset); break; - } - - case nir_intrinsic_store_var: { - assert(mode == nir_var_shader_out || mode == nir_var_shared); - - nir_ssa_def *offset; - nir_ssa_def *vertex_index; - - bool per_vertex = - is_per_vertex_output(state, intrin->variables[0]->var); - - offset = get_io_offset(b, intrin->variables[0], - per_vertex ? &vertex_index : NULL, - state->type_size); - - nir_intrinsic_instr *store = - nir_intrinsic_instr_create(state->mem_ctx, - store_op(state, mode, per_vertex)); - store->num_components = intrin->num_components; - - nir_src_copy(&store->src[0], &intrin->src[0], store); - nir_intrinsic_set_base(store, - intrin->variables[0]->var->data.driver_location); - nir_intrinsic_set_write_mask(store, nir_intrinsic_write_mask(intrin)); - - if (per_vertex) - store->src[1] = nir_src_for_ssa(vertex_index); - - store->src[per_vertex ? 2 : 1] = nir_src_for_ssa(offset); - - nir_instr_insert_before(&intrin->instr, &store->instr); - nir_instr_remove(&intrin->instr); + case nir_intrinsic_store_var: + replacement = lower_store(intrin, state, vertex_index, offset, + component_offset); break; - } case nir_intrinsic_var_atomic_add: case nir_intrinsic_var_atomic_imin: @@ -343,47 +443,37 @@ case nir_intrinsic_var_atomic_or: case nir_intrinsic_var_atomic_xor: case nir_intrinsic_var_atomic_exchange: - case nir_intrinsic_var_atomic_comp_swap: { - assert(mode == nir_var_shared); - - nir_ssa_def *offset; - - offset = get_io_offset(b, intrin->variables[0], - NULL, state->type_size); - - nir_intrinsic_instr *atomic = - nir_intrinsic_instr_create(state->mem_ctx, - atomic_op(intrin->intrinsic)); - - atomic->src[0] = nir_src_for_ssa(offset); + case nir_intrinsic_var_atomic_comp_swap: + assert(vertex_index == NULL); + replacement = lower_atomic(intrin, state, offset); + break; - atomic->const_index[0] = - intrin->variables[0]->var->data.driver_location; + case nir_intrinsic_interp_var_at_centroid: + case nir_intrinsic_interp_var_at_sample: + case nir_intrinsic_interp_var_at_offset: + assert(vertex_index == NULL); + replacement = lower_interpolate_at(intrin, state, offset, + component_offset); + break; - for (unsigned i = 0; - i < nir_op_infos[intrin->intrinsic].num_inputs; - i++) { - nir_src_copy(&atomic->src[i+1], &intrin->src[i], atomic); - } + default: + continue; + } + if (nir_intrinsic_infos[intrin->intrinsic].has_dest) { if (intrin->dest.is_ssa) { - nir_ssa_dest_init(&atomic->instr, &atomic->dest, + nir_ssa_dest_init(&replacement->instr, &replacement->dest, intrin->dest.ssa.num_components, intrin->dest.ssa.bit_size, NULL); nir_ssa_def_rewrite_uses(&intrin->dest.ssa, - nir_src_for_ssa(&atomic->dest.ssa)); + nir_src_for_ssa(&replacement->dest.ssa)); } else { - nir_dest_copy(&atomic->dest, &intrin->dest, state->mem_ctx); + nir_dest_copy(&replacement->dest, &intrin->dest, &intrin->instr); } - - nir_instr_insert_before(&intrin->instr, &atomic->instr); - nir_instr_remove(&intrin->instr); - break; } - default: - break; - } + nir_instr_insert_before(&intrin->instr, &replacement->instr); + nir_instr_remove(&intrin->instr); } return true; @@ -392,14 +482,15 @@ static void nir_lower_io_impl(nir_function_impl *impl, nir_variable_mode modes, - int (*type_size)(const struct glsl_type *)) + int (*type_size)(const struct glsl_type *), + nir_lower_io_options options) { struct lower_io_state state; nir_builder_init(&state.builder, impl); - state.mem_ctx = ralloc_parent(impl); state.modes = modes; state.type_size = type_size; + state.options = options; nir_foreach_block(block, impl) { nir_lower_io_block(block, &state); @@ -411,11 +502,13 @@ void nir_lower_io(nir_shader *shader, nir_variable_mode modes, - int (*type_size)(const struct glsl_type *)) + int (*type_size)(const struct glsl_type *), + nir_lower_io_options options) { nir_foreach_function(function, shader) { - if (function->impl) - nir_lower_io_impl(function->impl, modes, type_size); + if (function->impl) { + nir_lower_io_impl(function->impl, modes, type_size, options); + } } } @@ -434,6 +527,7 @@ case nir_intrinsic_load_ssbo: case nir_intrinsic_load_per_vertex_input: case nir_intrinsic_load_per_vertex_output: + case nir_intrinsic_load_interpolated_input: case nir_intrinsic_store_output: return &instr->src[1]; case nir_intrinsic_store_ssbo: diff -Nru mesa-12.0.6/src/compiler/nir/nir_lower_io_to_scalar.c mesa-17.0.7/src/compiler/nir/nir_lower_io_to_scalar.c --- mesa-12.0.6/src/compiler/nir/nir_lower_io_to_scalar.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_lower_io_to_scalar.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,129 @@ +/* + * Copyright © 2016 Broadcom + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "nir.h" +#include "nir_builder.h" + +/** @file nir_lower_io_to_scalar.c + * + * Replaces nir_load_input/nir_store_output operations with num_components != + * 1 with individual per-channel operations. + */ + +static void +lower_load_input_to_scalar(nir_builder *b, nir_intrinsic_instr *intr) +{ + b->cursor = nir_before_instr(&intr->instr); + + assert(intr->dest.is_ssa); + + nir_ssa_def *loads[4]; + + for (unsigned i = 0; i < intr->num_components; i++) { + nir_intrinsic_instr *chan_intr = + nir_intrinsic_instr_create(b->shader, intr->intrinsic); + nir_ssa_dest_init(&chan_intr->instr, &chan_intr->dest, + 1, intr->dest.ssa.bit_size, NULL); + chan_intr->num_components = 1; + + nir_intrinsic_set_base(chan_intr, nir_intrinsic_base(intr)); + nir_intrinsic_set_component(chan_intr, nir_intrinsic_component(intr) + i); + /* offset */ + chan_intr->src[0] = intr->src[0]; + + nir_builder_instr_insert(b, &chan_intr->instr); + + loads[i] = &chan_intr->dest.ssa; + } + + nir_ssa_def_rewrite_uses(&intr->dest.ssa, + nir_src_for_ssa(nir_vec(b, loads, + intr->num_components))); + nir_instr_remove(&intr->instr); +} + +static void +lower_store_output_to_scalar(nir_builder *b, nir_intrinsic_instr *intr) +{ + b->cursor = nir_before_instr(&intr->instr); + + nir_ssa_def *value = nir_ssa_for_src(b, intr->src[0], intr->num_components); + + for (unsigned i = 0; i < intr->num_components; i++) { + if (!(nir_intrinsic_write_mask(intr) & (1 << i))) + continue; + + nir_intrinsic_instr *chan_intr = + nir_intrinsic_instr_create(b->shader, intr->intrinsic); + chan_intr->num_components = 1; + + nir_intrinsic_set_base(chan_intr, nir_intrinsic_base(intr)); + nir_intrinsic_set_write_mask(chan_intr, 0x1); + nir_intrinsic_set_component(chan_intr, nir_intrinsic_component(intr) + i); + + /* value */ + chan_intr->src[0] = nir_src_for_ssa(nir_channel(b, value, i)); + /* offset */ + chan_intr->src[1] = intr->src[1]; + + nir_builder_instr_insert(b, &chan_intr->instr); + } + + nir_instr_remove(&intr->instr); +} + +void +nir_lower_io_to_scalar(nir_shader *shader, nir_variable_mode mask) +{ + nir_foreach_function(function, shader) { + if (function->impl) { + nir_builder b; + nir_builder_init(&b, function->impl); + + nir_foreach_block(block, function->impl) { + nir_foreach_instr_safe(instr, block) { + if (instr->type != nir_instr_type_intrinsic) + continue; + + nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr); + + if (intr->num_components == 1) + continue; + + switch (intr->intrinsic) { + case nir_intrinsic_load_input: + if (mask & nir_var_shader_in) + lower_load_input_to_scalar(&b, intr); + break; + case nir_intrinsic_store_output: + if (mask & nir_var_shader_out) + lower_store_output_to_scalar(&b, intr); + break; + default: + break; + } + } + } + } + } +} diff -Nru mesa-12.0.6/src/compiler/nir/nir_lower_io_to_temporaries.c mesa-17.0.7/src/compiler/nir/nir_lower_io_to_temporaries.c --- mesa-12.0.6/src/compiler/nir/nir_lower_io_to_temporaries.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_lower_io_to_temporaries.c 2017-06-01 10:37:10.000000000 +0000 @@ -34,7 +34,7 @@ struct lower_io_state { nir_shader *shader; - nir_function *entrypoint; + nir_function_impl *entrypoint; struct exec_list old_outputs; struct exec_list old_inputs; }; @@ -49,6 +49,21 @@ nir_variable *newv = exec_node_data(nir_variable, new_node, node); nir_variable *temp = exec_node_data(nir_variable, old_node, node); + /* No need to copy the contents of a non-fb_fetch_output output variable + * to the temporary allocated for it, since its initial value is + * undefined. + */ + if (temp->data.mode == nir_var_shader_out && + !temp->data.fb_fetch_output) + continue; + + /* Can't copy the contents of the temporary back to a read-only + * interface variable. The value of the temporary won't have been + * modified by the shader anyway. + */ + if (newv->data.read_only) + continue; + nir_intrinsic_instr *copy = nir_intrinsic_instr_create(shader, nir_intrinsic_copy_var); copy->variables[0] = nir_deref_var_create(copy, newv); @@ -78,7 +93,11 @@ } } } - } else if (impl->function == state->entrypoint) { + } else if (impl == state->entrypoint) { + nir_cursor cursor = nir_before_block(nir_start_block(impl)); + emit_copies(cursor, state->shader, &state->old_outputs, + &state->shader->outputs); + /* For all other shader types, we need to do the copies right before * the jumps to the end block. */ @@ -95,7 +114,7 @@ static void emit_input_copies_impl(struct lower_io_state *state, nir_function_impl *impl) { - if (impl->function == state->entrypoint) { + if (impl == state->entrypoint) { nir_cursor cursor = nir_before_block(nir_start_block(impl)); emit_copies(cursor, state->shader, &state->old_inputs, &state->shader->inputs); @@ -114,20 +133,20 @@ /* Reparent the name to the new variable */ ralloc_steal(nvar, nvar->name); - /* Reparent the constant initializer (if any) */ - ralloc_steal(nvar, nvar->constant_initializer); + assert(nvar->constant_initializer == NULL); /* Give the original a new name with @-temp appended */ const char *mode = (temp->data.mode == nir_var_shader_in) ? "in" : "out"; temp->name = ralloc_asprintf(var, "%s@%s-temp", mode, nvar->name); temp->data.mode = nir_var_global; - temp->constant_initializer = NULL; + temp->data.read_only = false; + temp->data.fb_fetch_output = false; return nvar; } void -nir_lower_io_to_temporaries(nir_shader *shader, nir_function *entrypoint, +nir_lower_io_to_temporaries(nir_shader *shader, nir_function_impl *entrypoint, bool outputs, bool inputs) { struct lower_io_state state; diff -Nru mesa-12.0.6/src/compiler/nir/nir_lower_locals_to_regs.c mesa-17.0.7/src/compiler/nir/nir_lower_locals_to_regs.c --- mesa-12.0.6/src/compiler/nir/nir_lower_locals_to_regs.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_lower_locals_to_regs.c 2017-06-01 10:37:10.000000000 +0000 @@ -35,12 +35,6 @@ /* A hash table mapping derefs to registers */ struct hash_table *regs_table; - /* A growing array of derefs that we have encountered. There is exactly - * one element of this array per element in the hash table. This is - * used to make adding register initialization code deterministic. - */ - nir_array derefs_array; - bool progress; }; @@ -101,6 +95,8 @@ { uint32_t hash = hash_deref(deref); + assert(deref->var->constant_initializer == NULL); + struct hash_entry *entry = _mesa_hash_table_search_pre_hashed(state->regs_table, hash, deref); if (entry) @@ -122,7 +118,6 @@ reg->bit_size = glsl_get_bit_size(tail->type); _mesa_hash_table_insert_pre_hashed(state->regs_table, hash, deref, reg); - nir_array_add(&state->derefs_array, nir_deref_var *, deref); return reg; } @@ -269,81 +264,6 @@ return true; } -static nir_block * -compute_reg_usedef_lca(nir_register *reg) -{ - nir_block *lca = NULL; - - list_for_each_entry(nir_dest, def_dest, ®->defs, reg.def_link) - lca = nir_dominance_lca(lca, def_dest->reg.parent_instr->block); - - list_for_each_entry(nir_src, use_src, ®->uses, use_link) - lca = nir_dominance_lca(lca, use_src->parent_instr->block); - - list_for_each_entry(nir_src, use_src, ®->if_uses, use_link) { - nir_cf_node *prev_node = nir_cf_node_prev(&use_src->parent_if->cf_node); - assert(prev_node->type == nir_cf_node_block); - lca = nir_dominance_lca(lca, nir_cf_node_as_block(prev_node)); - } - - return lca; -} - -static void -insert_constant_initializer(nir_deref_var *deref_head, nir_deref *deref_tail, - nir_block *block, - struct locals_to_regs_state *state) -{ - if (deref_tail->child) { - switch (deref_tail->child->deref_type) { - case nir_deref_type_array: { - unsigned array_elems = glsl_get_length(deref_tail->type); - - nir_deref_array arr_deref; - arr_deref.deref = *deref_tail->child; - arr_deref.deref_array_type = nir_deref_array_type_direct; - - nir_deref *old_child = deref_tail->child; - deref_tail->child = &arr_deref.deref; - for (unsigned i = 0; i < array_elems; i++) { - arr_deref.base_offset = i; - insert_constant_initializer(deref_head, &arr_deref.deref, - block, state); - } - deref_tail->child = old_child; - return; - } - - case nir_deref_type_struct: - insert_constant_initializer(deref_head, deref_tail->child, - block, state); - return; - - default: - unreachable("Invalid deref child type"); - } - } - - assert(deref_tail->child == NULL); - - nir_load_const_instr *load = - nir_deref_get_const_initializer_load(state->shader, deref_head); - nir_instr_insert_before_block(block, &load->instr); - - nir_src reg_src = get_deref_reg_src(deref_head, &load->instr, state); - - nir_alu_instr *mov = nir_alu_instr_create(state->shader, nir_op_imov); - mov->src[0].src = nir_src_for_ssa(&load->def); - mov->dest.write_mask = (1 << load->def.num_components) - 1; - mov->dest.dest.is_ssa = false; - mov->dest.dest.reg.reg = reg_src.reg.reg; - mov->dest.dest.reg.base_offset = reg_src.reg.base_offset; - mov->dest.dest.reg.indirect = reg_src.reg.indirect; - - nir_instr_insert_after(&load->instr, &mov->instr); - state->progress = true; -} - static bool nir_lower_locals_to_regs_impl(nir_function_impl *impl) { @@ -353,7 +273,6 @@ state.impl = impl; state.progress = false; state.regs_table = _mesa_hash_table_create(NULL, hash_deref, derefs_equal); - nir_array_init(&state.derefs_array, NULL); nir_metadata_require(impl, nir_metadata_dominance); @@ -361,25 +280,9 @@ lower_locals_to_regs_block(block, &state); } - nir_array_foreach(&state.derefs_array, nir_deref_var *, deref_ptr) { - nir_deref_var *deref = *deref_ptr; - struct hash_entry *deref_entry = - _mesa_hash_table_search(state.regs_table, deref); - assert(deref_entry && deref_entry->key == deref); - nir_register *reg = (nir_register *)deref_entry->data; - - if (deref->var->constant_initializer == NULL) - continue; - - nir_block *usedef_lca = compute_reg_usedef_lca(reg); - - insert_constant_initializer(deref, &deref->deref, usedef_lca, &state); - } - nir_metadata_preserve(impl, nir_metadata_block_index | nir_metadata_dominance); - nir_array_fini(&state.derefs_array); _mesa_hash_table_destroy(state.regs_table, NULL); return state.progress; diff -Nru mesa-12.0.6/src/compiler/nir/nir_lower_passthrough_edgeflags.c mesa-17.0.7/src/compiler/nir/nir_lower_passthrough_edgeflags.c --- mesa-12.0.6/src/compiler/nir/nir_lower_passthrough_edgeflags.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_lower_passthrough_edgeflags.c 2017-06-01 10:37:10.000000000 +0000 @@ -52,7 +52,5 @@ void nir_lower_passthrough_edgeflags(nir_shader *shader) { - nir_function *function = nir_shader_get_entrypoint(shader); - if (function->impl) - lower_impl(function->impl); + lower_impl(nir_shader_get_entrypoint(shader)); } diff -Nru mesa-12.0.6/src/compiler/nir/nir_lower_patch_vertices.c mesa-17.0.7/src/compiler/nir/nir_lower_patch_vertices.c --- mesa-12.0.6/src/compiler/nir/nir_lower_patch_vertices.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_lower_patch_vertices.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,53 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "nir_builder.h" + +void +nir_lower_tes_patch_vertices(nir_shader *tes_nir, unsigned patch_vertices) +{ + nir_foreach_function(function, tes_nir) { + if (function->impl) { + nir_foreach_block(block, function->impl) { + nir_builder b; + nir_builder_init(&b, function->impl); + nir_foreach_instr_safe(instr, block) { + if (instr->type == nir_instr_type_intrinsic) { + nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr); + if (intr->intrinsic != nir_intrinsic_load_patch_vertices_in) + continue; + + b.cursor = nir_before_instr(&intr->instr); + nir_ssa_def *val = nir_imm_int(&b, patch_vertices); + nir_ssa_def_rewrite_uses(&intr->dest.ssa, + nir_src_for_ssa(val)); + nir_instr_remove(instr); + } + } + } + + nir_metadata_preserve(function->impl, nir_metadata_block_index | + nir_metadata_dominance); + } + } +} diff -Nru mesa-12.0.6/src/compiler/nir/nir_lower_phis_to_scalar.c mesa-17.0.7/src/compiler/nir/nir_lower_phis_to_scalar.c --- mesa-12.0.6/src/compiler/nir/nir_lower_phis_to_scalar.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_lower_phis_to_scalar.c 2017-06-01 10:37:10.000000000 +0000 @@ -166,6 +166,8 @@ lower_phis_to_scalar_block(nir_block *block, struct lower_phis_to_scalar_state *state) { + bool progress = false; + /* Find the last phi node in the block */ nir_phi_instr *last_phi = NULL; nir_foreach_instr(instr, block) { @@ -248,6 +250,8 @@ ralloc_steal(state->dead_ctx, phi); nir_instr_remove(&phi->instr); + progress = true; + /* We're using the safe iterator and inserting all the newly * scalarized phi nodes before their non-scalarized version so that's * ok. However, we are also inserting vec operations after all of @@ -258,13 +262,14 @@ break; } - return true; + return progress; } -static void +static bool lower_phis_to_scalar_impl(nir_function_impl *impl) { struct lower_phis_to_scalar_state state; + bool progress = false; state.mem_ctx = ralloc_parent(impl); state.dead_ctx = ralloc_context(NULL); @@ -272,13 +277,14 @@ _mesa_key_pointer_equal); nir_foreach_block(block, impl) { - lower_phis_to_scalar_block(block, &state); + progress = lower_phis_to_scalar_block(block, &state) || progress; } nir_metadata_preserve(impl, nir_metadata_block_index | nir_metadata_dominance); ralloc_free(state.dead_ctx); + return progress; } /** A pass that lowers vector phi nodes to scalar @@ -288,11 +294,15 @@ * instance, if one of the sources is a non-scalarizable vector, then we * don't bother lowering because that would generate hard-to-coalesce movs. */ -void +bool nir_lower_phis_to_scalar(nir_shader *shader) { + bool progress = false; + nir_foreach_function(function, shader) { if (function->impl) - lower_phis_to_scalar_impl(function->impl); + progress = lower_phis_to_scalar_impl(function->impl) || progress; } + + return progress; } diff -Nru mesa-12.0.6/src/compiler/nir/nir_lower_regs_to_ssa.c mesa-17.0.7/src/compiler/nir/nir_lower_regs_to_ssa.c --- mesa-12.0.6/src/compiler/nir/nir_lower_regs_to_ssa.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_lower_regs_to_ssa.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,293 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Connor Abbott (cwabbott0@gmail.com) + * + */ + +#include "nir.h" +#include "nir_builder.h" +#include "nir_phi_builder.h" +#include "nir_vla.h" + +struct regs_to_ssa_state { + nir_shader *shader; + + struct nir_phi_builder_value **values; +}; + +static bool +rewrite_src(nir_src *src, void *_state) +{ + struct regs_to_ssa_state *state = _state; + + if (src->is_ssa) + return true; + + nir_instr *instr = src->parent_instr; + nir_register *reg = src->reg.reg; + struct nir_phi_builder_value *value = state->values[reg->index]; + if (!value) + return true; + + nir_block *block; + if (instr->type == nir_instr_type_phi) { + nir_phi_src *phi_src = exec_node_data(nir_phi_src, src, src); + block = phi_src->pred; + } else { + block = instr->block; + } + + nir_ssa_def *def = nir_phi_builder_value_get_block_def(value, block); + nir_instr_rewrite_src(instr, src, nir_src_for_ssa(def)); + + return true; +} + +static void +rewrite_if_condition(nir_if *nif, struct regs_to_ssa_state *state) +{ + if (nif->condition.is_ssa) + return; + + nir_block *block = nir_cf_node_as_block(nir_cf_node_prev(&nif->cf_node)); + nir_register *reg = nif->condition.reg.reg; + struct nir_phi_builder_value *value = state->values[reg->index]; + if (!value) + return; + + nir_ssa_def *def = nir_phi_builder_value_get_block_def(value, block); + nir_if_rewrite_condition(nif, nir_src_for_ssa(def)); +} + +static bool +rewrite_dest(nir_dest *dest, void *_state) +{ + struct regs_to_ssa_state *state = _state; + + if (dest->is_ssa) + return true; + + nir_instr *instr = dest->reg.parent_instr; + nir_register *reg = dest->reg.reg; + struct nir_phi_builder_value *value = state->values[reg->index]; + if (!value) + return true; + + list_del(&dest->reg.def_link); + nir_ssa_dest_init(instr, dest, reg->num_components, + reg->bit_size, reg->name); + + nir_phi_builder_value_set_block_def(value, instr->block, &dest->ssa); + + return true; +} + +static void +rewrite_alu_instr(nir_alu_instr *alu, struct regs_to_ssa_state *state) +{ + nir_foreach_src(&alu->instr, rewrite_src, state); + + if (alu->dest.dest.is_ssa) + return; + + nir_register *reg = alu->dest.dest.reg.reg; + struct nir_phi_builder_value *value = state->values[reg->index]; + if (!value) + return; + + unsigned write_mask = alu->dest.write_mask; + if (write_mask == (1 << reg->num_components) - 1) { + /* This is the simple case where the instruction writes all the + * components. We can handle that the same as any other destination. + */ + rewrite_dest(&alu->dest.dest, state); + return; + } + + /* Calculate the number of components the final instruction, which for + * per-component things is the number of output components of the + * instruction and non-per-component things is the number of enabled + * channels in the write mask. + */ + unsigned num_components; + unsigned vec_swizzle[4] = { 0, 1, 2, 3 }; + if (nir_op_infos[alu->op].output_size == 0) { + /* Figure out the swizzle we need on the vecN operation and compute + * the number of components in the SSA def at the same time. + */ + num_components = 0; + for (unsigned index = 0; index < 4; index++) { + if (write_mask & (1 << index)) + vec_swizzle[index] = num_components++; + } + + /* When we change the output writemask, we need to change + * the swizzles for per-component inputs too + */ + for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) { + if (nir_op_infos[alu->op].input_sizes[i] != 0) + continue; + + /* + * We keep two indices: + * 1. The index of the original (non-SSA) component + * 2. The index of the post-SSA, compacted, component + * + * We need to map the swizzle component at index 1 to the swizzle + * component at index 2. Since index 1 is always larger than + * index 2, we can do it in a single loop. + */ + + unsigned ssa_index = 0; + for (unsigned index = 0; index < 4; index++) { + if (!((write_mask >> index) & 1)) + continue; + + alu->src[i].swizzle[ssa_index++] = alu->src[i].swizzle[index]; + } + assert(ssa_index == num_components); + } + } else { + num_components = nir_op_infos[alu->op].output_size; + } + assert(num_components <= 4); + + alu->dest.write_mask = (1 << num_components) - 1; + list_del(&alu->dest.dest.reg.def_link); + nir_ssa_dest_init(&alu->instr, &alu->dest.dest, num_components, + reg->bit_size, reg->name); + + nir_op vecN_op; + switch (reg->num_components) { + case 2: vecN_op = nir_op_vec2; break; + case 3: vecN_op = nir_op_vec3; break; + case 4: vecN_op = nir_op_vec4; break; + default: unreachable("not reached"); + } + + nir_alu_instr *vec = nir_alu_instr_create(state->shader, vecN_op); + + nir_ssa_def *old_src = + nir_phi_builder_value_get_block_def(value, alu->instr.block); + nir_ssa_def *new_src = &alu->dest.dest.ssa; + + for (unsigned i = 0; i < reg->num_components; i++) { + if (write_mask & (1 << i)) { + vec->src[i].src = nir_src_for_ssa(new_src); + vec->src[i].swizzle[0] = vec_swizzle[i]; + } else { + vec->src[i].src = nir_src_for_ssa(old_src); + vec->src[i].swizzle[0] = i; + } + } + + nir_ssa_dest_init(&vec->instr, &vec->dest.dest, reg->num_components, + reg->bit_size, reg->name); + nir_instr_insert(nir_after_instr(&alu->instr), &vec->instr); + + nir_phi_builder_value_set_block_def(value, alu->instr.block, + &vec->dest.dest.ssa); +} + +void +nir_lower_regs_to_ssa_impl(nir_function_impl *impl) +{ + if (exec_list_is_empty(&impl->registers)) + return; + + nir_metadata_require(impl, nir_metadata_block_index | + nir_metadata_dominance); + nir_index_local_regs(impl); + + struct regs_to_ssa_state state; + state.shader = impl->function->shader; + state.values = malloc(impl->reg_alloc * sizeof(*state.values)); + + struct nir_phi_builder *phi_build = nir_phi_builder_create(impl); + + const unsigned block_set_words = BITSET_WORDS(impl->num_blocks); + NIR_VLA(BITSET_WORD, defs, block_set_words); + + nir_foreach_register(reg, &impl->registers) { + if (reg->num_array_elems != 0 || reg->is_packed) { + /* This pass only really works on "plain" registers. If it's a + * packed or array register, just set the value to NULL so that the + * rewrite portion of the pass will know to ignore it. + */ + state.values[reg->index] = NULL; + continue; + } + + memset(defs, 0, block_set_words * sizeof(*defs)); + + nir_foreach_def(dest, reg) + BITSET_SET(defs, dest->reg.parent_instr->block->index); + + state.values[reg->index] = + nir_phi_builder_add_value(phi_build, reg->num_components, + reg->bit_size, defs); + } + + nir_foreach_block(block, impl) { + nir_foreach_instr(instr, block) { + if (instr->type == nir_instr_type_alu) { + rewrite_alu_instr(nir_instr_as_alu(instr), &state); + } else { + nir_foreach_src(instr, rewrite_src, &state); + nir_foreach_dest(instr, rewrite_dest, &state); + } + } + + nir_if *following_if = nir_block_get_following_if(block); + if (following_if) + rewrite_if_condition(following_if, &state); + } + + nir_phi_builder_finish(phi_build); + + nir_foreach_register_safe(reg, &impl->registers) { + if (state.values[reg->index]) { + assert(list_empty(®->uses)); + assert(list_empty(®->if_uses)); + assert(list_empty(®->defs)); + exec_node_remove(®->node); + } + } + + free(state.values); + + nir_metadata_preserve(impl, nir_metadata_block_index | + nir_metadata_dominance); +} + +void +nir_lower_regs_to_ssa(nir_shader *shader) +{ + assert(exec_list_is_empty(&shader->registers)); + + nir_foreach_function(function, shader) { + if (function->impl) + nir_lower_regs_to_ssa_impl(function->impl); + } +} diff -Nru mesa-12.0.6/src/compiler/nir/nir_lower_returns.c mesa-17.0.7/src/compiler/nir/nir_lower_returns.c --- mesa-12.0.6/src/compiler/nir/nir_lower_returns.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_lower_returns.c 2017-06-01 10:37:10.000000000 +0000 @@ -30,6 +30,13 @@ struct exec_list *cf_list; nir_loop *loop; nir_variable *return_flag; + + /* This indicates that we have a return which is predicated on some form of + * control-flow. Since whether or not the return happens can only be + * determined dynamically at run-time, everything that occurs afterwards + * needs to be predicated on the return flag variable. + */ + bool has_predicated_return; }; static bool lower_returns_in_cf_list(struct exec_list *cf_list, @@ -82,8 +89,10 @@ * flag set to true. We need to predicate everything following the loop * on the return flag. */ - if (progress) + if (progress) { predicate_following(&loop->cf_node, state); + state->has_predicated_return = true; + } return progress; } @@ -91,10 +100,14 @@ static bool lower_returns_in_if(nir_if *if_stmt, struct lower_returns_state *state) { - bool progress; + bool progress, then_progress, else_progress; - progress = lower_returns_in_cf_list(&if_stmt->then_list, state); - progress = lower_returns_in_cf_list(&if_stmt->else_list, state) || progress; + bool has_predicated_return = state->has_predicated_return; + state->has_predicated_return = false; + + then_progress = lower_returns_in_cf_list(&if_stmt->then_list, state); + else_progress = lower_returns_in_cf_list(&if_stmt->else_list, state); + progress = then_progress || else_progress; /* If either of the recursive calls made progress, then there were * returns inside of the body of the if. If we're in a loop, then these @@ -106,8 +119,29 @@ * after a return, we need to predicate everything following on the * return flag. */ - if (progress && !state->loop) - predicate_following(&if_stmt->cf_node, state); + if (progress && !state->loop) { + if (state->has_predicated_return) { + predicate_following(&if_stmt->cf_node, state); + } else { + /* If there are no nested returns we can just add the instructions to + * the end of the branch that doesn't have the return. + */ + nir_cf_list list; + nir_cf_extract(&list, nir_after_cf_node(&if_stmt->cf_node), + nir_after_cf_list(state->cf_list)); + + if (then_progress && else_progress) { + /* Both branches return so delete instructions following the if */ + nir_cf_delete(&list); + } else if (then_progress) { + nir_cf_reinsert(&list, nir_after_cf_list(&if_stmt->else_list)); + } else { + nir_cf_reinsert(&list, nir_after_cf_list(&if_stmt->then_list)); + } + } + } + + state->has_predicated_return = progress || has_predicated_return; return progress; } @@ -147,17 +181,18 @@ nir_instr_remove(&jump->instr); nir_builder *b = &state->builder; - b->cursor = nir_after_block(block); /* Set the return flag */ if (state->return_flag == NULL) { state->return_flag = nir_local_variable_create(b->impl, glsl_bool_type(), "return"); - /* Set a default value of false */ - state->return_flag->constant_initializer = - rzalloc(state->return_flag, nir_constant); + /* Initialize the variable to 0 */ + b->cursor = nir_before_cf_list(&b->impl->body); + nir_store_var(b, state->return_flag, nir_imm_int(b, NIR_FALSE), 1); } + + b->cursor = nir_after_block(block); nir_store_var(b, state->return_flag, nir_imm_int(b, NIR_TRUE), 1); if (state->loop) { @@ -220,6 +255,7 @@ state.cf_list = &impl->body; state.loop = NULL; state.return_flag = NULL; + state.has_predicated_return = false; nir_builder_init(&state.builder, impl); bool progress = lower_returns_in_cf_list(&impl->body, &state); diff -Nru mesa-12.0.6/src/compiler/nir/nir_lower_samplers.c mesa-17.0.7/src/compiler/nir/nir_lower_samplers.c --- mesa-12.0.6/src/compiler/nir/nir_lower_samplers.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_lower_samplers.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,7 +25,6 @@ #include "nir.h" #include "nir_builder.h" -#include "program/hash_table.h" #include "compiler/glsl/ir_uniform.h" #include "main/compiler.h" @@ -141,14 +140,14 @@ instr->texture_array_size = array_elements; } - if (location > shader_program->NumUniformStorage - 1 || - !shader_program->UniformStorage[location].opaque[stage].active) { + if (location > shader_program->data->NumUniformStorage - 1 || + !shader_program->data->UniformStorage[location].opaque[stage].active) { assert(!"cannot return a sampler"); return; } instr->texture_index += - shader_program->UniformStorage[location].opaque[stage].index; + shader_program->data->UniformStorage[location].opaque[stage].index; instr->sampler_index = instr->texture_index; diff -Nru mesa-12.0.6/src/compiler/nir/nir_lower_system_values.c mesa-17.0.7/src/compiler/nir/nir_lower_system_values.c --- mesa-12.0.6/src/compiler/nir/nir_lower_system_values.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_lower_system_values.c 2017-06-01 10:37:10.000000000 +0000 @@ -58,14 +58,12 @@ */ nir_const_value local_size; - local_size.u32[0] = b->shader->info.cs.local_size[0]; - local_size.u32[1] = b->shader->info.cs.local_size[1]; - local_size.u32[2] = b->shader->info.cs.local_size[2]; - - nir_ssa_def *group_id = - nir_load_system_value(b, nir_intrinsic_load_work_group_id, 0); - nir_ssa_def *local_id = - nir_load_system_value(b, nir_intrinsic_load_local_invocation_id, 0); + local_size.u32[0] = b->shader->info->cs.local_size[0]; + local_size.u32[1] = b->shader->info->cs.local_size[1]; + local_size.u32[2] = b->shader->info->cs.local_size[2]; + + nir_ssa_def *group_id = nir_load_work_group_id(b); + nir_ssa_def *local_id = nir_load_local_invocation_id(b); sysval = nir_iadd(b, nir_imul(b, group_id, nir_build_imm(b, 3, 32, local_size)), @@ -87,11 +85,12 @@ * gl_WorkGroupSize.y + gl_LocalInvocationID.y * * gl_WorkGroupSize.x + gl_LocalInvocationID.x" */ - nir_ssa_def *local_id = - nir_load_system_value(b, nir_intrinsic_load_local_invocation_id, 0); + nir_ssa_def *local_id = nir_load_local_invocation_id(b); - nir_ssa_def *size_x = nir_imm_int(b, b->shader->info.cs.local_size[0]); - nir_ssa_def *size_y = nir_imm_int(b, b->shader->info.cs.local_size[1]); + nir_ssa_def *size_x = + nir_imm_int(b, b->shader->info->cs.local_size[0]); + nir_ssa_def *size_y = + nir_imm_int(b, b->shader->info->cs.local_size[1]); sysval = nir_imul(b, nir_channel(b, local_id, 2), nir_imul(b, size_x, size_y)); @@ -104,17 +103,17 @@ case SYSTEM_VALUE_VERTEX_ID: if (b->shader->options->vertex_id_zero_based) { sysval = nir_iadd(b, - nir_load_system_value(b, nir_intrinsic_load_vertex_id_zero_base, 0), - nir_load_system_value(b, nir_intrinsic_load_base_vertex, 0)); + nir_load_vertex_id_zero_base(b), + nir_load_base_vertex(b)); } else { - sysval = nir_load_system_value(b, nir_intrinsic_load_vertex_id, 0); + sysval = nir_load_vertex_id(b); } break; case SYSTEM_VALUE_INSTANCE_INDEX: sysval = nir_iadd(b, - nir_load_system_value(b, nir_intrinsic_load_instance_id, 0), - nir_load_system_value(b, nir_intrinsic_load_base_instance, 0)); + nir_load_instance_id(b), + nir_load_base_instance(b)); break; default: diff -Nru mesa-12.0.6/src/compiler/nir/nir_lower_tex.c mesa-17.0.7/src/compiler/nir/nir_lower_tex.c --- mesa-12.0.6/src/compiler/nir/nir_lower_tex.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_lower_tex.c 2017-06-01 10:37:10.000000000 +0000 @@ -38,38 +38,11 @@ #include "nir.h" #include "nir_builder.h" -static int -tex_instr_find_src(nir_tex_instr *tex, nir_tex_src_type src_type) -{ - for (unsigned i = 0; i < tex->num_srcs; i++) { - if (tex->src[i].src_type == src_type) - return i; - } - - return -1; -} - -static void -tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx) -{ - assert(src_idx < tex->num_srcs); - - /* First rewrite the source to NIR_SRC_INIT */ - nir_instr_rewrite_src(&tex->instr, &tex->src[src_idx].src, NIR_SRC_INIT); - - /* Now, move all of the other sources down */ - for (unsigned i = src_idx + 1; i < tex->num_srcs; i++) { - tex->src[i-1].src_type = tex->src[i].src_type; - nir_instr_move_src(&tex->instr, &tex->src[i-1].src, &tex->src[i].src); - } - tex->num_srcs--; -} - static void project_src(nir_builder *b, nir_tex_instr *tex) { /* Find the projector in the srcs list, if present. */ - int proj_index = tex_instr_find_src(tex, nir_tex_src_projector); + int proj_index = nir_tex_instr_src_index(tex, nir_tex_src_projector); if (proj_index < 0) return; @@ -82,7 +55,7 @@ for (unsigned i = 0; i < tex->num_srcs; i++) { switch (tex->src[i].src_type) { case nir_tex_src_coord: - case nir_tex_src_comparitor: + case nir_tex_src_comparator: break; default: continue; @@ -125,17 +98,17 @@ nir_src_for_ssa(projected)); } - tex_instr_remove_src(tex, proj_index); + nir_tex_instr_remove_src(tex, proj_index); } static bool lower_offset(nir_builder *b, nir_tex_instr *tex) { - int offset_index = tex_instr_find_src(tex, nir_tex_src_offset); + int offset_index = nir_tex_instr_src_index(tex, nir_tex_src_offset); if (offset_index < 0) return false; - int coord_index = tex_instr_find_src(tex, nir_tex_src_coord); + int coord_index = nir_tex_instr_src_index(tex, nir_tex_src_coord); assert(coord_index >= 0); assert(tex->src[offset_index].src.is_ssa); @@ -170,7 +143,7 @@ nir_instr_rewrite_src(&tex->instr, &tex->src[coord_index].src, nir_src_for_ssa(offset_coord)); - tex_instr_remove_src(tex, offset_index); + nir_tex_instr_remove_src(tex, offset_index); return true; } @@ -181,22 +154,25 @@ { b->cursor = nir_before_instr(&tex->instr); - /* RECT textures should not be array: */ - assert(!tex->is_array); - nir_tex_instr *txs; txs = nir_tex_instr_create(b->shader, 1); txs->op = nir_texop_txs; - txs->sampler_dim = GLSL_SAMPLER_DIM_RECT; + txs->sampler_dim = tex->sampler_dim; + txs->is_array = tex->is_array; + txs->is_shadow = tex->is_shadow; + txs->is_new_style_shadow = tex->is_new_style_shadow; txs->texture_index = tex->texture_index; + txs->texture = nir_deref_var_clone(tex->texture, txs); + txs->sampler_index = tex->sampler_index; + txs->sampler = nir_deref_var_clone(tex->sampler, txs); txs->dest_type = nir_type_int; /* only single src, the lod: */ txs->src[0].src = nir_src_for_ssa(nir_imm_int(b, 0)); txs->src[0].src_type = nir_tex_src_lod; - nir_ssa_dest_init(&txs->instr, &txs->dest, 2, 32, NULL); + nir_ssa_dest_init(&txs->instr, &txs->dest, tex->coord_components, 32, NULL); nir_builder_instr_insert(b, &txs->instr); return nir_i2f(b, &txs->dest.ssa); @@ -238,16 +214,14 @@ plane_tex->src[1].src = nir_src_for_ssa(nir_imm_int(b, plane)); plane_tex->src[1].src_type = nir_tex_src_plane; plane_tex->op = nir_texop_tex; - plane_tex->sampler_dim = 2; + plane_tex->sampler_dim = GLSL_SAMPLER_DIM_2D; plane_tex->dest_type = nir_type_float; plane_tex->coord_components = 2; plane_tex->texture_index = tex->texture_index; - plane_tex->texture = (nir_deref_var *) - nir_copy_deref(plane_tex, &tex->texture->deref); + plane_tex->texture = nir_deref_var_clone(tex->texture, plane_tex); plane_tex->sampler_index = tex->sampler_index; - plane_tex->sampler = (nir_deref_var *) - nir_copy_deref(plane_tex, &tex->sampler->deref); + plane_tex->sampler = nir_deref_var_clone(tex->sampler, plane_tex); nir_ssa_dest_init(&plane_tex->instr, &plane_tex->dest, 4, 32, NULL); @@ -269,9 +243,9 @@ nir_ssa_def *yuv = nir_vec4(b, nir_fmul(b, nir_imm_float(b, 1.16438356f), - nir_fadd(b, y, nir_imm_float(b, -0.0625f))), - nir_channel(b, nir_fadd(b, u, nir_imm_float(b, -0.5f)), 0), - nir_channel(b, nir_fadd(b, v, nir_imm_float(b, -0.5f)), 0), + nir_fadd(b, y, nir_imm_float(b, -16.0f / 255.0f))), + nir_channel(b, nir_fadd(b, u, nir_imm_float(b, -128.0f / 255.0f)), 0), + nir_channel(b, nir_fadd(b, v, nir_imm_float(b, -128.0f / 255.0f)), 0), nir_imm_float(b, 0.0)); nir_ssa_def *red = nir_fdot4(b, yuv, nir_build_imm(b, 4, 32, m[0])); @@ -326,6 +300,259 @@ nir_channel(b, xuxv, 3)); } +/* + * Emits a textureLod operation used to replace an existing + * textureGrad instruction. + */ +static void +replace_gradient_with_lod(nir_builder *b, nir_ssa_def *lod, nir_tex_instr *tex) +{ + /* We are going to emit a textureLod() with the same parameters except that + * we replace ddx/ddy with lod. + */ + int num_srcs = tex->num_srcs - 1; + nir_tex_instr *txl = nir_tex_instr_create(b->shader, num_srcs); + + txl->op = nir_texop_txl; + txl->sampler_dim = tex->sampler_dim; + txl->texture_index = tex->texture_index; + txl->dest_type = tex->dest_type; + txl->is_array = tex->is_array; + txl->is_shadow = tex->is_shadow; + txl->is_new_style_shadow = tex->is_new_style_shadow; + txl->sampler_index = tex->sampler_index; + txl->texture = nir_deref_var_clone(tex->texture, txl); + txl->sampler = nir_deref_var_clone(tex->sampler, txl); + txl->coord_components = tex->coord_components; + + nir_ssa_dest_init(&txl->instr, &txl->dest, 4, 32, NULL); + + int src_num = 0; + for (int i = 0; i < tex->num_srcs; i++) { + if (tex->src[i].src_type == nir_tex_src_ddx || + tex->src[i].src_type == nir_tex_src_ddy) + continue; + nir_src_copy(&txl->src[src_num].src, &tex->src[i].src, txl); + txl->src[src_num].src_type = tex->src[i].src_type; + src_num++; + } + + txl->src[src_num].src = nir_src_for_ssa(lod); + txl->src[src_num].src_type = nir_tex_src_lod; + src_num++; + + assert(src_num == num_srcs); + + nir_ssa_dest_init(&txl->instr, &txl->dest, + tex->dest.ssa.num_components, 32, NULL); + nir_builder_instr_insert(b, &txl->instr); + + nir_ssa_def_rewrite_uses(&tex->dest.ssa, nir_src_for_ssa(&txl->dest.ssa)); + + nir_instr_remove(&tex->instr); +} + +static void +lower_gradient_cube_map(nir_builder *b, nir_tex_instr *tex) +{ + assert(tex->sampler_dim == GLSL_SAMPLER_DIM_CUBE); + assert(tex->op == nir_texop_txd); + assert(tex->dest.is_ssa); + + /* Use textureSize() to get the width and height of LOD 0 */ + nir_ssa_def *size = get_texture_size(b, tex); + + /* Cubemap texture lookups first generate a texture coordinate normalized + * to [-1, 1] on the appropiate face. The appropiate face is determined + * by which component has largest magnitude and its sign. The texture + * coordinate is the quotient of the remaining texture coordinates against + * that absolute value of the component of largest magnitude. This + * division requires that the computing of the derivative of the texel + * coordinate must use the quotient rule. The high level GLSL code is as + * follows: + * + * Step 1: selection + * + * vec3 abs_p, Q, dQdx, dQdy; + * abs_p = abs(ir->coordinate); + * if (abs_p.x >= max(abs_p.y, abs_p.z)) { + * Q = ir->coordinate.yzx; + * dQdx = ir->lod_info.grad.dPdx.yzx; + * dQdy = ir->lod_info.grad.dPdy.yzx; + * } + * if (abs_p.y >= max(abs_p.x, abs_p.z)) { + * Q = ir->coordinate.xzy; + * dQdx = ir->lod_info.grad.dPdx.xzy; + * dQdy = ir->lod_info.grad.dPdy.xzy; + * } + * if (abs_p.z >= max(abs_p.x, abs_p.y)) { + * Q = ir->coordinate; + * dQdx = ir->lod_info.grad.dPdx; + * dQdy = ir->lod_info.grad.dPdy; + * } + * + * Step 2: use quotient rule to compute derivative. The normalized to + * [-1, 1] texel coordinate is given by Q.xy / (sign(Q.z) * Q.z). We are + * only concerned with the magnitudes of the derivatives whose values are + * not affected by the sign. We drop the sign from the computation. + * + * vec2 dx, dy; + * float recip; + * + * recip = 1.0 / Q.z; + * dx = recip * ( dQdx.xy - Q.xy * (dQdx.z * recip) ); + * dy = recip * ( dQdy.xy - Q.xy * (dQdy.z * recip) ); + * + * Step 3: compute LOD. At this point we have the derivatives of the + * texture coordinates normalized to [-1,1]. We take the LOD to be + * result = log2(max(sqrt(dot(dx, dx)), sqrt(dy, dy)) * 0.5 * L) + * = -1.0 + log2(max(sqrt(dot(dx, dx)), sqrt(dy, dy)) * L) + * = -1.0 + log2(sqrt(max(dot(dx, dx), dot(dy,dy))) * L) + * = -1.0 + log2(sqrt(L * L * max(dot(dx, dx), dot(dy,dy)))) + * = -1.0 + 0.5 * log2(L * L * max(dot(dx, dx), dot(dy,dy))) + * where L is the dimension of the cubemap. The code is: + * + * float M, result; + * M = max(dot(dx, dx), dot(dy, dy)); + * L = textureSize(sampler, 0).x; + * result = -1.0 + 0.5 * log2(L * L * M); + */ + + /* coordinate */ + nir_ssa_def *p = + tex->src[nir_tex_instr_src_index(tex, nir_tex_src_coord)].src.ssa; + + /* unmodified dPdx, dPdy values */ + nir_ssa_def *dPdx = + tex->src[nir_tex_instr_src_index(tex, nir_tex_src_ddx)].src.ssa; + nir_ssa_def *dPdy = + tex->src[nir_tex_instr_src_index(tex, nir_tex_src_ddy)].src.ssa; + + nir_ssa_def *abs_p = nir_fabs(b, p); + nir_ssa_def *abs_p_x = nir_channel(b, abs_p, 0); + nir_ssa_def *abs_p_y = nir_channel(b, abs_p, 1); + nir_ssa_def *abs_p_z = nir_channel(b, abs_p, 2); + + /* 1. compute selector */ + nir_ssa_def *Q, *dQdx, *dQdy; + + nir_ssa_def *cond_z = nir_fge(b, abs_p_z, nir_fmax(b, abs_p_x, abs_p_y)); + nir_ssa_def *cond_y = nir_fge(b, abs_p_y, nir_fmax(b, abs_p_x, abs_p_z)); + + unsigned yzx[4] = { 1, 2, 0, 0 }; + unsigned xzy[4] = { 0, 2, 1, 0 }; + + Q = nir_bcsel(b, cond_z, + p, + nir_bcsel(b, cond_y, + nir_swizzle(b, p, xzy, 3, false), + nir_swizzle(b, p, yzx, 3, false))); + + dQdx = nir_bcsel(b, cond_z, + dPdx, + nir_bcsel(b, cond_y, + nir_swizzle(b, dPdx, xzy, 3, false), + nir_swizzle(b, dPdx, yzx, 3, false))); + + dQdy = nir_bcsel(b, cond_z, + dPdy, + nir_bcsel(b, cond_y, + nir_swizzle(b, dPdy, xzy, 3, false), + nir_swizzle(b, dPdy, yzx, 3, false))); + + /* 2. quotient rule */ + + /* tmp = Q.xy * recip; + * dx = recip * ( dQdx.xy - (tmp * dQdx.z) ); + * dy = recip * ( dQdy.xy - (tmp * dQdy.z) ); + */ + nir_ssa_def *rcp_Q_z = nir_frcp(b, nir_channel(b, Q, 2)); + + unsigned xy[4] = { 0, 1, 0, 0 }; + nir_ssa_def *Q_xy = nir_swizzle(b, Q, xy, 2, false); + nir_ssa_def *tmp = nir_fmul(b, Q_xy, rcp_Q_z); + + nir_ssa_def *dQdx_xy = nir_swizzle(b, dQdx, xy, 2, false); + nir_ssa_def *dQdx_z = nir_channel(b, dQdx, 2); + nir_ssa_def *dx = + nir_fmul(b, rcp_Q_z, nir_fsub(b, dQdx_xy, nir_fmul(b, tmp, dQdx_z))); + + nir_ssa_def *dQdy_xy = nir_swizzle(b, dQdy, xy, 2, false); + nir_ssa_def *dQdy_z = nir_channel(b, dQdy, 2); + nir_ssa_def *dy = + nir_fmul(b, rcp_Q_z, nir_fsub(b, dQdy_xy, nir_fmul(b, tmp, dQdy_z))); + + /* M = max(dot(dx, dx), dot(dy, dy)); */ + nir_ssa_def *M = nir_fmax(b, nir_fdot(b, dx, dx), nir_fdot(b, dy, dy)); + + /* size has textureSize() of LOD 0 */ + nir_ssa_def *L = nir_channel(b, size, 0); + + /* lod = -1.0 + 0.5 * log2(L * L * M); */ + nir_ssa_def *lod = + nir_fadd(b, + nir_imm_float(b, -1.0f), + nir_fmul(b, + nir_imm_float(b, 0.5f), + nir_flog2(b, nir_fmul(b, L, nir_fmul(b, L, M))))); + + /* 3. Replace the gradient instruction with an equivalent lod instruction */ + replace_gradient_with_lod(b, lod, tex); +} + +static void +lower_gradient_shadow(nir_builder *b, nir_tex_instr *tex) +{ + assert(tex->sampler_dim != GLSL_SAMPLER_DIM_CUBE); + assert(tex->is_shadow); + assert(tex->op == nir_texop_txd); + assert(tex->dest.is_ssa); + + /* Use textureSize() to get the width and height of LOD 0 */ + unsigned component_mask; + switch (tex->sampler_dim) { + case GLSL_SAMPLER_DIM_3D: + component_mask = 7; + break; + case GLSL_SAMPLER_DIM_1D: + component_mask = 1; + break; + default: + component_mask = 3; + break; + } + + nir_ssa_def *size = + nir_channels(b, get_texture_size(b, tex), component_mask); + + /* Scale the gradients by width and height. Effectively, the incoming + * gradients are s'(x,y), t'(x,y), and r'(x,y) from equation 3.19 in the + * GL 3.0 spec; we want u'(x,y), which is w_t * s'(x,y). + */ + nir_ssa_def *ddx = + tex->src[nir_tex_instr_src_index(tex, nir_tex_src_ddx)].src.ssa; + nir_ssa_def *ddy = + tex->src[nir_tex_instr_src_index(tex, nir_tex_src_ddy)].src.ssa; + + nir_ssa_def *dPdx = nir_fmul(b, ddx, size); + nir_ssa_def *dPdy = nir_fmul(b, ddy, size); + + nir_ssa_def *rho; + if (dPdx->num_components == 1) { + rho = nir_fmax(b, nir_fabs(b, dPdx), nir_fabs(b, dPdy)); + } else { + rho = nir_fmax(b, + nir_fsqrt(b, nir_fdot(b, dPdx, dPdx)), + nir_fsqrt(b, nir_fdot(b, dPdy, dPdy))); + } + + /* lod = log2(rho). We're ignoring GL state biases for now. */ + nir_ssa_def *lod = nir_flog2(b, rho); + + /* Replace the gradient instruction with an equivalent lod instruction */ + replace_gradient_with_lod(b, lod, tex); +} + static void saturate_src(nir_builder *b, nir_tex_instr *tex, unsigned sat_mask) { @@ -551,6 +778,22 @@ linearize_srgb_result(b, tex); progress = true; } + + if (tex->op == nir_texop_txd && + tex->sampler_dim == GLSL_SAMPLER_DIM_CUBE && + (options->lower_txd_cube_map || + (tex->is_shadow && options->lower_txd_shadow))) { + lower_gradient_cube_map(b, tex); + progress = true; + continue; + } + + if (tex->op == nir_texop_txd && options->lower_txd_shadow && + tex->is_shadow && tex->sampler_dim != GLSL_SAMPLER_DIM_CUBE) { + lower_gradient_shadow(b, tex); + progress = true; + continue; + } } return progress; diff -Nru mesa-12.0.6/src/compiler/nir/nir_lower_to_source_mods.c mesa-17.0.7/src/compiler/nir/nir_lower_to_source_mods.c --- mesa-12.0.6/src/compiler/nir/nir_lower_to_source_mods.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_lower_to_source_mods.c 2017-06-01 10:37:10.000000000 +0000 @@ -164,9 +164,7 @@ nir_foreach_use(child_src, &alu->dest.dest.ssa) { assert(child_src->is_ssa); - nir_instr *child = child_src->parent_instr; - assert(child->type == nir_instr_type_alu); - nir_alu_instr *child_alu = nir_instr_as_alu(child); + nir_alu_instr *child_alu = nir_instr_as_alu(child_src->parent_instr); child_alu->op = nir_op_fmov; child_alu->dest.saturate = false; diff -Nru mesa-12.0.6/src/compiler/nir/nir_lower_two_sided_color.c mesa-17.0.7/src/compiler/nir/nir_lower_two_sided_color.c --- mesa-12.0.6/src/compiler/nir/nir_lower_two_sided_color.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_lower_two_sided_color.c 2017-06-01 10:37:10.000000000 +0000 @@ -32,7 +32,6 @@ typedef struct { nir_builder b; nir_shader *shader; - nir_variable *face; struct { nir_variable *front; /* COLn */ nir_variable *back; /* BFCn */ @@ -85,12 +84,12 @@ { int maxloc = -1; - /* find color/face inputs: */ + /* find color inputs: */ nir_foreach_variable(var, &state->shader->inputs) { int loc = var->data.driver_location; /* keep track of last used driver-location.. we'll be - * appending BCLr/FACE after last existing input: + * appending BCLr after last existing input: */ maxloc = MAX2(maxloc, loc); @@ -101,9 +100,6 @@ state->colors[state->colors_count].front = var; state->colors_count++; break; - case VARYING_SLOT_FACE: - state->face = var; - break; } } @@ -111,12 +107,6 @@ if (state->colors_count == 0) return -1; - /* if we don't already have one, insert a FACE input: */ - if (!state->face) { - state->face = create_input(state->shader, ++maxloc, VARYING_SLOT_FACE); - state->face->data.interpolation = INTERP_QUALIFIER_FLAT; - } - /* add required back-face color inputs: */ for (int i = 0; i < state->colors_count; i++) { gl_varying_slot slot; @@ -161,14 +151,13 @@ continue; /* replace load_input(COLn) with - * bcsel(load_input(FACE), load_input(COLn), load_input(BFCn)) + * bcsel(load_system_value(FACE), load_input(COLn), load_input(BFCn)) */ b->cursor = nir_before_instr(&intr->instr); - nir_ssa_def *face = nir_channel(b, load_input(b, state->face), 0); + nir_ssa_def *face = nir_load_front_face(b); nir_ssa_def *front = load_input(b, state->colors[idx].front); nir_ssa_def *back = load_input(b, state->colors[idx].back); - nir_ssa_def *cond = nir_flt(b, face, nir_imm_float(b, 0.0)); - nir_ssa_def *color = nir_bcsel(b, cond, back, front); + nir_ssa_def *color = nir_bcsel(b, face, front, back); assert(intr->dest.is_ssa); nir_ssa_def_rewrite_uses(&intr->dest.ssa, nir_src_for_ssa(color)); diff -Nru mesa-12.0.6/src/compiler/nir/nir_lower_var_copies.c mesa-17.0.7/src/compiler/nir/nir_lower_var_copies.c --- mesa-12.0.6/src/compiler/nir/nir_lower_var_copies.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_lower_var_copies.c 2017-06-01 10:37:10.000000000 +0000 @@ -77,7 +77,8 @@ static void emit_copy_load_store(nir_intrinsic_instr *copy_instr, nir_deref_var *dest_head, nir_deref_var *src_head, - nir_deref *dest_tail, nir_deref *src_tail, void *mem_ctx) + nir_deref *dest_tail, nir_deref *src_tail, + nir_shader *shader) { /* Find the next pair of wildcards */ nir_deref *src_arr_parent = deref_next_wildcard_parent(src_tail); @@ -103,7 +104,7 @@ src_arr->base_offset = i; dest_arr->base_offset = i; emit_copy_load_store(copy_instr, dest_head, src_head, - &dest_arr->deref, &src_arr->deref, mem_ctx); + &dest_arr->deref, &src_arr->deref, shader); } src_arr->deref_array_type = nir_deref_array_type_wildcard; dest_arr->deref_array_type = nir_deref_array_type_wildcard; @@ -119,19 +120,19 @@ unsigned bit_size = glsl_get_bit_size(src_tail->type); nir_intrinsic_instr *load = - nir_intrinsic_instr_create(mem_ctx, nir_intrinsic_load_var); + nir_intrinsic_instr_create(shader, nir_intrinsic_load_var); load->num_components = num_components; - load->variables[0] = nir_deref_as_var(nir_copy_deref(load, &src_head->deref)); + load->variables[0] = nir_deref_var_clone(src_head, load); nir_ssa_dest_init(&load->instr, &load->dest, num_components, bit_size, NULL); nir_instr_insert_before(©_instr->instr, &load->instr); nir_intrinsic_instr *store = - nir_intrinsic_instr_create(mem_ctx, nir_intrinsic_store_var); + nir_intrinsic_instr_create(shader, nir_intrinsic_store_var); store->num_components = num_components; nir_intrinsic_set_write_mask(store, (1 << num_components) - 1); - store->variables[0] = nir_deref_as_var(nir_copy_deref(store, &dest_head->deref)); + store->variables[0] = nir_deref_var_clone(dest_head, store); store->src[0].is_ssa = true; store->src[0].ssa = &load->dest.ssa; @@ -145,18 +146,18 @@ * The new instructions are placed before the copy instruction in the IR. */ void -nir_lower_var_copy_instr(nir_intrinsic_instr *copy, void *mem_ctx) +nir_lower_var_copy_instr(nir_intrinsic_instr *copy, nir_shader *shader) { assert(copy->intrinsic == nir_intrinsic_copy_var); emit_copy_load_store(copy, copy->variables[0], copy->variables[1], ©->variables[0]->deref, - ©->variables[1]->deref, mem_ctx); + ©->variables[1]->deref, shader); } static void lower_var_copies_impl(nir_function_impl *impl) { - void *mem_ctx = ralloc_parent(impl); + nir_shader *shader = impl->function->shader; nir_foreach_block(block, impl) { nir_foreach_instr_safe(instr, block) { @@ -167,7 +168,7 @@ if (copy->intrinsic != nir_intrinsic_copy_var) continue; - nir_lower_var_copy_instr(copy, mem_ctx); + nir_lower_var_copy_instr(copy, shader); nir_instr_remove(©->instr); ralloc_free(copy); diff -Nru mesa-12.0.6/src/compiler/nir/nir_lower_vars_to_ssa.c mesa-17.0.7/src/compiler/nir/nir_lower_vars_to_ssa.c --- mesa-12.0.6/src/compiler/nir/nir_lower_vars_to_ssa.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_lower_vars_to_ssa.c 2017-06-01 10:37:10.000000000 +0000 @@ -620,14 +620,12 @@ * fully-direct references we see and store them in the * direct_deref_nodes hash table. * - * 2) Walk over the the list of fully-qualified direct derefs generated in + * 2) Walk over the list of fully-qualified direct derefs generated in * the previous pass. For each deref, we determine if it can ever be * aliased, i.e. if there is an indirect reference anywhere that may * refer to it. If it cannot be aliased, we mark it for lowering to an * SSA value. At this point, we lower any var_copy instructions that - * use the given deref to load/store operations and, if the deref has a - * constant initializer, we go ahead and add a load_const value at the - * beginning of the function with the initialized value. + * use the given deref to load/store operations. * * 3) Walk over the list of derefs we plan to lower to SSA values and * insert phi nodes as needed. @@ -709,6 +707,8 @@ memset(store_blocks, 0, BITSET_WORDS(state.impl->num_blocks) * sizeof(*store_blocks)); + assert(node->deref->var->constant_initializer == NULL); + if (node->stores) { struct set_entry *store_entry; set_foreach(node->stores, store_entry) { @@ -718,22 +718,11 @@ } } - if (node->deref->var->constant_initializer) - BITSET_SET(store_blocks, 0); - node->pb_value = nir_phi_builder_add_value(state.phi_builder, glsl_get_vector_elements(node->type), glsl_get_bit_size(node->type), store_blocks); - - if (node->deref->var->constant_initializer) { - nir_load_const_instr *load = - nir_deref_get_const_initializer_load(state.shader, node->deref); - nir_instr_insert_before_cf_list(&impl->body, &load->instr); - nir_phi_builder_value_set_block_def(node->pb_value, - nir_start_block(impl), &load->def); - } } rename_variables(&state); diff -Nru mesa-12.0.6/src/compiler/nir/nir_lower_wpos_ytransform.c mesa-17.0.7/src/compiler/nir/nir_lower_wpos_ytransform.c --- mesa-12.0.6/src/compiler/nir/nir_lower_wpos_ytransform.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_lower_wpos_ytransform.c 2017-06-01 10:37:10.000000000 +0000 @@ -159,7 +159,7 @@ * * The bias of the y-coordinate depends on whether y-inversion takes place * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are - * drawing to an FBO (causes additional inversion), and whether the the pipe + * drawing to an FBO (causes additional inversion), and whether the pipe * driver origin and the requested origin differ (the latter condition is * stored in the 'invert' variable). * @@ -273,6 +273,26 @@ } static void +lower_load_sample_pos(lower_wpos_ytransform_state *state, + nir_intrinsic_instr *intr) +{ + nir_builder *b = &state->b; + b->cursor = nir_after_instr(&intr->instr); + + nir_ssa_def *pos = &intr->dest.ssa; + nir_ssa_def *scale = nir_channel(b, get_transform(state), 0); + nir_ssa_def *neg_scale = nir_channel(b, get_transform(state), 2); + /* Either y or 1-y for scale equal to 1 or -1 respectively. */ + nir_ssa_def *flipped_y = + nir_fadd(b, nir_fmax(b, neg_scale, nir_imm_float(b, 0.0)), + nir_fmul(b, nir_channel(b, pos, 1), scale)); + nir_ssa_def *flipped_pos = nir_vec2(b, nir_channel(b, pos, 0), flipped_y); + + nir_ssa_def_rewrite_uses_after(&intr->dest.ssa, nir_src_for_ssa(flipped_pos), + flipped_pos->parent_instr); +} + +static void lower_wpos_ytransform_block(lower_wpos_ytransform_state *state, nir_block *block) { nir_foreach_instr_safe(instr, block) { @@ -287,6 +307,10 @@ /* gl_FragCoord should not have array/struct deref's: */ assert(dvar->deref.child == NULL); lower_fragcoord(state, intr); + } else if (var->data.mode == nir_var_system_value && + var->data.location == SYSTEM_VALUE_SAMPLE_POS) { + assert(dvar->deref.child == NULL); + lower_load_sample_pos(state, intr); } } else if (intr->intrinsic == nir_intrinsic_interp_var_at_offset) { lower_interp_var_at_offset(state, intr); diff -Nru mesa-12.0.6/src/compiler/nir/nir_metadata.c mesa-17.0.7/src/compiler/nir/nir_metadata.c --- mesa-12.0.6/src/compiler/nir/nir_metadata.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_metadata.c 2017-06-01 10:37:10.000000000 +0000 @@ -31,7 +31,7 @@ */ void -nir_metadata_require(nir_function_impl *impl, nir_metadata required) +nir_metadata_require(nir_function_impl *impl, nir_metadata required, ...) { #define NEEDS_UPDATE(X) ((required & ~impl->valid_metadata) & (X)) @@ -41,6 +41,12 @@ nir_calc_dominance_impl(impl); if (NEEDS_UPDATE(nir_metadata_live_ssa_defs)) nir_live_ssa_defs_impl(impl); + if (NEEDS_UPDATE(nir_metadata_loop_analysis)) { + va_list ap; + va_start(ap, required); + nir_loop_analyze_impl(impl, va_arg(ap, nir_variable_mode)); + va_end(ap); + } #undef NEEDS_UPDATE diff -Nru mesa-12.0.6/src/compiler/nir/nir_opt_algebraic.c mesa-17.0.7/src/compiler/nir/nir_opt_algebraic.c --- mesa-12.0.6/src/compiler/nir/nir_opt_algebraic.c 2017-01-24 01:43:17.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_opt_algebraic.c 2017-06-01 10:38:00.000000000 +0000 @@ -14,13862 +14,19758 @@ #endif -static const nir_search_variable search94_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search111_0 = { { nir_search_value_variable, 32 }, 0, /* a */ false, nir_type_bool32, + NULL, }; -static const nir_search_constant search94_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search111_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x3ff0000000000000 /* 1.0 */ }, }; -static const nir_search_expression search94 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search111 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search94_0.value, &search94_1.value }, + { &search111_0.value, &search111_1.value }, + NULL, }; -static const nir_search_variable replace94_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace111_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace94 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace111 = { { nir_search_value_expression, 0 }, false, nir_op_b2f, - { &replace94_0.value }, + { &replace111_0.value }, + NULL, }; -static const nir_search_variable search104_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search122_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search104_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search122_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search104 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search122 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search104_0.value, &search104_1.value }, + { &search122_0.value, &search122_1.value }, + NULL, }; -static const nir_search_variable replace104 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace122 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search105_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search123_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search105_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search123_1 = { { nir_search_value_constant, 0 }, nir_type_int, { -0x1 /* -1 */ }, }; -static const nir_search_expression search105 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search123 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search105_0.value, &search105_1.value }, + { &search123_0.value, &search123_1.value }, + NULL, }; -static const nir_search_variable replace105 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace123 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search106_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search124_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search106_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search124_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_expression search106 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search124 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search106_0.value, &search106_1.value }, + { &search124_0.value, &search124_1.value }, + NULL, }; -static const nir_search_constant replace106 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace124 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_variable search113_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search132_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search113_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search132_0 = { { nir_search_value_expression, 0 }, false, nir_op_inot, - { &search113_0_0.value }, + { &search132_0_0.value }, + NULL, }; -static const nir_search_variable search113_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search132_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search113_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search132_1 = { { nir_search_value_expression, 0 }, false, nir_op_inot, - { &search113_1_0.value }, + { &search132_1_0.value }, + NULL, }; -static const nir_search_expression search113 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search132 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search113_0.value, &search113_1.value }, + { &search132_0.value, &search132_1.value }, + NULL, }; -static const nir_search_variable replace113_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace132_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace113_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace132_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace113_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace132_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &replace113_0_0.value, &replace113_0_1.value }, + { &replace132_0_0.value, &replace132_0_1.value }, + NULL, }; -static const nir_search_expression replace113 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace132 = { { nir_search_value_expression, 0 }, false, nir_op_inot, - { &replace113_0.value }, + { &replace132_0.value }, + NULL, }; -static const nir_search_constant search121_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search140_0 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xff /* 255 */ }, }; -static const nir_search_variable search121_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search140_1_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search121_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search140_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x18 /* 24 */ }, }; -static const nir_search_expression search121_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search140_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search121_1_0.value, &search121_1_1.value }, + { &search140_1_0.value, &search140_1_1.value }, + NULL, }; -static const nir_search_expression search121 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search140 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search121_0.value, &search121_1.value }, + { &search140_0.value, &search140_1.value }, + NULL, }; -static const nir_search_variable replace121_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace140_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace121_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace140_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x18 /* 24 */ }, }; -static const nir_search_expression replace121 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace140 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &replace121_0.value, &replace121_1.value }, + { &replace140_0.value, &replace140_1.value }, + NULL, }; -static const nir_search_constant search122_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search141_0 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xffff /* 65535 */ }, }; -static const nir_search_variable search122_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search141_1_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search122_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search141_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search122_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search141_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search122_1_0.value, &search122_1_1.value }, + { &search141_1_0.value, &search141_1_1.value }, + NULL, }; -static const nir_search_expression search122 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search141 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search122_0.value, &search122_1.value }, + { &search141_0.value, &search141_1.value }, + NULL, }; -static const nir_search_variable replace122_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace141_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace122_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace141_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression replace122 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace141 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &replace122_0.value, &replace122_1.value }, + { &replace141_0.value, &replace141_1.value }, + NULL, }; -static const nir_search_constant search167_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search190_0 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xff /* 255 */ }, }; -static const nir_search_variable search167_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search190_1_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search167_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search190_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search167_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search190_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search167_1_0.value, &search167_1_1.value }, + { &search190_1_0.value, &search190_1_1.value }, + NULL, }; -static const nir_search_expression search167 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search190 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search167_0.value, &search167_1.value }, + { &search190_0.value, &search190_1.value }, + NULL, }; -static const nir_search_variable replace167_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace190_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace167_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace190_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x2 /* 2 */ }, }; -static const nir_search_expression replace167 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace190 = { { nir_search_value_expression, 0 }, false, nir_op_extract_u8, - { &replace167_0.value, &replace167_1.value }, + { &replace190_0.value, &replace190_1.value }, + NULL, }; -static const nir_search_constant search168_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search191_0 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xff /* 255 */ }, }; -static const nir_search_variable search168_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search191_1_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search168_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search191_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x8 /* 8 */ }, }; -static const nir_search_expression search168_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search191_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search168_1_0.value, &search168_1_1.value }, + { &search191_1_0.value, &search191_1_1.value }, + NULL, }; -static const nir_search_expression search168 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search191 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search168_0.value, &search168_1.value }, + { &search191_0.value, &search191_1.value }, + NULL, }; -static const nir_search_variable replace168_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace191_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace168_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace191_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x1 /* 1 */ }, }; -static const nir_search_expression replace168 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace191 = { { nir_search_value_expression, 0 }, false, nir_op_extract_u8, - { &replace168_0.value, &replace168_1.value }, + { &replace191_0.value, &replace191_1.value }, + NULL, }; -static const nir_search_constant search169_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search192_0 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xff /* 255 */ }, }; -static const nir_search_variable search169_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search192_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search169 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search192 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search169_0.value, &search169_1.value }, + { &search192_0.value, &search192_1.value }, + NULL, }; -static const nir_search_variable replace169_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace192_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace169_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace192_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_expression replace169 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace192 = { { nir_search_value_expression, 0 }, false, nir_op_extract_u8, - { &replace169_0.value, &replace169_1.value }, + { &replace192_0.value, &replace192_1.value }, + NULL, }; -static const nir_search_constant search171_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search194_0 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xffff /* 65535 */ }, }; -static const nir_search_variable search171_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search194_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search171 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search194 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search171_0.value, &search171_1.value }, + { &search194_0.value, &search194_1.value }, + NULL, }; -static const nir_search_variable replace171_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace194_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace171_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace194_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_expression replace171 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace194 = { { nir_search_value_expression, 0 }, false, nir_op_extract_u16, - { &replace171_0.value, &replace171_1.value }, -}; - -static const struct transform nir_opt_algebraic_iand_xforms[] = { - { &search94, &replace94.value, 0 }, - { &search104, &replace104.value, 0 }, - { &search105, &replace105.value, 0 }, - { &search106, &replace106.value, 0 }, - { &search113, &replace113.value, 0 }, - { &search121, &replace121.value, 0 }, - { &search122, &replace122.value, 0 }, - { &search167, &replace167.value, 16 }, - { &search168, &replace168.value, 16 }, - { &search169, &replace169.value, 16 }, - { &search171, &replace171.value, 17 }, + { &replace194_0.value, &replace194_1.value }, + NULL, }; -static const nir_search_variable search110_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search236_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search110_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search236_0_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search110 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search236_0 = { { nir_search_value_expression, 0 }, false, - nir_op_ixor, - { &search110_0.value, &search110_1.value }, -}; - -static const nir_search_constant replace110 = { - { nir_search_value_constant, 0 }, - nir_type_int, { 0x0 /* 0 */ }, + nir_op_feq, + { &search236_0_0.value, &search236_0_1.value }, + NULL, }; - -static const nir_search_variable search111_0 = { + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search236_1_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search111_1 = { - { nir_search_value_constant, 0 }, - nir_type_int, { 0x0 /* 0 */ }, +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search236_1_1 = { + { nir_search_value_variable, 0 }, + 1, /* b */ + false, + nir_type_invalid, + NULL, }; -static const nir_search_expression search111 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search236_1 = { { nir_search_value_expression, 0 }, false, - nir_op_ixor, - { &search111_0.value, &search111_1.value }, + nir_op_flt, + { &search236_1_0.value, &search236_1_1.value }, + NULL, }; - -static const nir_search_variable replace111 = { - { nir_search_value_variable, 0 }, - 0, /* a */ +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search236 = { + { nir_search_value_expression, 0 }, false, - nir_type_invalid, -}; - -static const struct transform nir_opt_algebraic_ixor_xforms[] = { - { &search110, &replace110.value, 0 }, - { &search111, &replace111.value, 0 }, + nir_op_iand, + { &search236_0.value, &search236_1.value }, + NULL, }; -static const nir_search_variable search87_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace236_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search87_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace236_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search87 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace236 = { { nir_search_value_expression, 0 }, false, - nir_op_seq, - { &search87_0.value, &search87_1.value }, + nir_op_flt, + { &replace236_0.value, &replace236_1.value }, + NULL, }; -static const nir_search_variable replace87_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search237_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace87_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search237_0_1 = { { nir_search_value_variable, 0 }, - 1, /* b */ + 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace87_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search237_0 = { { nir_search_value_expression, 0 }, false, nir_op_feq, - { &replace87_0_0.value, &replace87_0_1.value }, -}; -static const nir_search_expression replace87 = { - { nir_search_value_expression, 0 }, - false, - nir_op_b2f, - { &replace87_0.value }, + { &search237_0_0.value, &search237_0_1.value }, + NULL, }; -static const struct transform nir_opt_algebraic_seq_xforms[] = { - { &search87, &replace87.value, 10 }, -}; - -static const nir_search_variable search97_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search237_1_0 = { { nir_search_value_variable, 0 }, - 0, /* a */ + 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search97_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search237_1_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search97 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search237_1 = { { nir_search_value_expression, 0 }, false, - nir_op_ilt, - { &search97_0.value, &search97_1.value }, -}; - -static const nir_search_constant replace97 = { - { nir_search_value_constant, 32 }, - nir_type_bool32, { NIR_FALSE /* False */ }, + nir_op_flt, + { &search237_1_0.value, &search237_1_1.value }, + NULL, }; - -static const nir_search_variable search221_0_0 = { - { nir_search_value_variable, 0 }, - 0, /* a */ +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search237 = { + { nir_search_value_expression, 0 }, false, - nir_type_invalid, + nir_op_iand, + { &search237_0.value, &search237_1.value }, + NULL, }; - -static const nir_search_variable search221_0_1 = { + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace237_0 = { { nir_search_value_variable, 0 }, 1, /* b */ - true, + false, nir_type_invalid, + NULL, }; -static const nir_search_variable search221_0_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace237_1 = { { nir_search_value_variable, 0 }, - 2, /* c */ - true, - nir_type_invalid, -}; -static const nir_search_expression search221_0 = { - { nir_search_value_expression, 0 }, + 0, /* a */ false, - nir_op_bcsel, - { &search221_0_0.value, &search221_0_1.value, &search221_0_2.value }, -}; - -static const nir_search_variable search221_1 = { - { nir_search_value_variable, 0 }, - 3, /* d */ - true, nir_type_invalid, + NULL, }; -static const nir_search_expression search221 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace237 = { { nir_search_value_expression, 0 }, false, - nir_op_ilt, - { &search221_0.value, &search221_1.value }, + nir_op_flt, + { &replace237_0.value, &replace237_1.value }, + NULL, }; -static const nir_search_variable replace221_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search238_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace221_1_0 = { - { nir_search_value_variable, 0 }, - 1, /* b */ - false, - nir_type_invalid, -}; - -static const nir_search_variable replace221_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search238_0_1 = { { nir_search_value_variable, 0 }, - 3, /* d */ + 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace221_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search238_0 = { { nir_search_value_expression, 0 }, false, - nir_op_ilt, - { &replace221_1_0.value, &replace221_1_1.value }, + nir_op_feq, + { &search238_0_0.value, &search238_0_1.value }, + NULL, }; -static const nir_search_variable replace221_2_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search238_1_0 = { { nir_search_value_variable, 0 }, - 2, /* c */ + 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace221_2_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search238_1_1 = { { nir_search_value_variable, 0 }, - 3, /* d */ + 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace221_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search238_1 = { { nir_search_value_expression, 0 }, false, - nir_op_ilt, - { &replace221_2_0.value, &replace221_2_1.value }, + nir_op_fge, + { &search238_1_0.value, &search238_1_1.value }, + NULL, }; -static const nir_search_expression replace221 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search238 = { { nir_search_value_expression, 0 }, false, - nir_op_bcsel, - { &replace221_0.value, &replace221_1.value, &replace221_2.value }, + nir_op_iand, + { &search238_0.value, &search238_1.value }, + NULL, }; -static const nir_search_variable search222_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace238_0 = { { nir_search_value_variable, 0 }, - 0, /* d */ - true, + 0, /* a */ + false, nir_type_invalid, + NULL, }; -static const nir_search_variable search222_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace238_1 = { { nir_search_value_variable, 0 }, - 1, /* a */ + 1, /* b */ false, nir_type_invalid, + NULL, }; - -static const nir_search_variable search222_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace238 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fge, + { &replace238_0.value, &replace238_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search239_0_0 = { { nir_search_value_variable, 0 }, - 2, /* b */ - true, + 0, /* a */ + false, nir_type_invalid, + NULL, }; -static const nir_search_variable search222_1_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search239_0_1 = { { nir_search_value_variable, 0 }, - 3, /* c */ - true, - nir_type_invalid, -}; -static const nir_search_expression search222_1 = { - { nir_search_value_expression, 0 }, + 0, /* a */ false, - nir_op_bcsel, - { &search222_1_0.value, &search222_1_1.value, &search222_1_2.value }, + nir_type_invalid, + NULL, }; -static const nir_search_expression search222 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search239_0 = { { nir_search_value_expression, 0 }, false, - nir_op_ilt, - { &search222_0.value, &search222_1.value }, + nir_op_feq, + { &search239_0_0.value, &search239_0_1.value }, + NULL, }; - -static const nir_search_variable replace222_0 = { + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search239_1_0 = { { nir_search_value_variable, 0 }, - 1, /* a */ + 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace222_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search239_1_1 = { { nir_search_value_variable, 0 }, - 0, /* d */ + 0, /* a */ false, nir_type_invalid, + NULL, }; - -static const nir_search_variable replace222_1_1 = { - { nir_search_value_variable, 0 }, - 2, /* b */ +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search239_1 = { + { nir_search_value_expression, 0 }, false, - nir_type_invalid, + nir_op_fge, + { &search239_1_0.value, &search239_1_1.value }, + NULL, }; -static const nir_search_expression replace222_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search239 = { { nir_search_value_expression, 0 }, false, - nir_op_ilt, - { &replace222_1_0.value, &replace222_1_1.value }, + nir_op_iand, + { &search239_0.value, &search239_1.value }, + NULL, }; - -static const nir_search_variable replace222_2_0 = { + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace239_0 = { { nir_search_value_variable, 0 }, - 0, /* d */ + 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace222_2_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace239_1 = { { nir_search_value_variable, 0 }, - 3, /* c */ + 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace222_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace239 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fge, + { &replace239_0.value, &replace239_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search240_0_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search240_0_1 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search240_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_feq, + { &search240_0_0.value, &search240_0_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search240_1_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search240_1_1 = { + { nir_search_value_variable, 0 }, + 1, /* b */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search240_1 = { + { nir_search_value_expression, 0 }, + false, + nir_op_feq, + { &search240_1_0.value, &search240_1_1.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search240 = { + { nir_search_value_expression, 0 }, + false, + nir_op_iand, + { &search240_0.value, &search240_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace240_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace240_1 = { + { nir_search_value_variable, 0 }, + 1, /* b */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace240 = { + { nir_search_value_expression, 0 }, + false, + nir_op_feq, + { &replace240_0.value, &replace240_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search241_0_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search241_0_1 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search241_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_feq, + { &search241_0_0.value, &search241_0_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search241_1_0 = { + { nir_search_value_variable, 0 }, + 1, /* b */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search241_1_1 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search241_1 = { + { nir_search_value_expression, 0 }, + false, + nir_op_feq, + { &search241_1_0.value, &search241_1_1.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search241 = { + { nir_search_value_expression, 0 }, + false, + nir_op_iand, + { &search241_0.value, &search241_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace241_0 = { + { nir_search_value_variable, 0 }, + 1, /* b */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace241_1 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace241 = { + { nir_search_value_expression, 0 }, + false, + nir_op_feq, + { &replace241_0.value, &replace241_1.value }, + NULL, +}; + +static const struct transform nir_opt_algebraic_iand_xforms[] = { + { &search111, &replace111.value, 0 }, + { &search122, &replace122.value, 0 }, + { &search123, &replace123.value, 0 }, + { &search124, &replace124.value, 0 }, + { &search132, &replace132.value, 0 }, + { &search140, &replace140.value, 0 }, + { &search141, &replace141.value, 0 }, + { &search190, &replace190.value, 17 }, + { &search191, &replace191.value, 17 }, + { &search192, &replace192.value, 17 }, + { &search194, &replace194.value, 18 }, + { &search236, &replace236.value, 0 }, + { &search237, &replace237.value, 0 }, + { &search238, &replace238.value, 0 }, + { &search239, &replace239.value, 0 }, + { &search240, &replace240.value, 0 }, + { &search241, &replace241.value, 0 }, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search182_0_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search182_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_b2i, + { &search182_0_0.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search182 = { + { nir_search_value_expression, 0 }, + false, + nir_op_i2b, + { &search182_0.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace182 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search185_0_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search185_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_ineg, + { &search185_0_0.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search185 = { + { nir_search_value_expression, 0 }, + false, + nir_op_i2b, + { &search185_0.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace185_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace185 = { + { nir_search_value_expression, 0 }, + false, + nir_op_i2b, + { &replace185_0.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search186_0_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search186_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_iabs, + { &search186_0_0.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search186 = { + { nir_search_value_expression, 0 }, + false, + nir_op_i2b, + { &search186_0.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace186_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace186 = { + { nir_search_value_expression, 0 }, + false, + nir_op_i2b, + { &replace186_0.value }, + NULL, +}; + +static const struct transform nir_opt_algebraic_i2b_xforms[] = { + { &search182, &replace182.value, 0 }, + { &search185, &replace185.value, 0 }, + { &search186, &replace186.value, 0 }, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search129_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search129_1 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search129 = { + { nir_search_value_expression, 0 }, + false, + nir_op_ixor, + { &search129_0.value, &search129_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace129 = { + { nir_search_value_constant, 0 }, + nir_type_int, { 0x0 /* 0 */ }, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search130_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search130_1 = { + { nir_search_value_constant, 0 }, + nir_type_int, { 0x0 /* 0 */ }, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search130 = { + { nir_search_value_expression, 0 }, + false, + nir_op_ixor, + { &search130_0.value, &search130_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace130 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +static const struct transform nir_opt_algebraic_ixor_xforms[] = { + { &search129, &replace129.value, 0 }, + { &search130, &replace130.value, 0 }, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search104_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search104_1 = { + { nir_search_value_variable, 0 }, + 1, /* b */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search104 = { + { nir_search_value_expression, 0 }, + false, + nir_op_seq, + { &search104_0.value, &search104_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace104_0_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace104_0_1 = { + { nir_search_value_variable, 0 }, + 1, /* b */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace104_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_feq, + { &replace104_0_0.value, &replace104_0_1.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace104 = { + { nir_search_value_expression, 0 }, + false, + nir_op_b2f, + { &replace104_0.value }, + NULL, +}; + +static const struct transform nir_opt_algebraic_seq_xforms[] = { + { &search104, &replace104.value, 11 }, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search115_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search115_1 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search115 = { + { nir_search_value_expression, 0 }, + false, + nir_op_ilt, + { &search115_0.value, &search115_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace115 = { + { nir_search_value_constant, 32 }, + nir_type_bool32, { NIR_FALSE /* False */ }, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search250_0_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search250_0_1 = { + { nir_search_value_variable, 0 }, + 1, /* b */ + true, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search250_0_2 = { + { nir_search_value_variable, 0 }, + 2, /* c */ + true, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search250_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_bcsel, + { &search250_0_0.value, &search250_0_1.value, &search250_0_2.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search250_1 = { + { nir_search_value_variable, 0 }, + 3, /* d */ + true, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search250 = { + { nir_search_value_expression, 0 }, + false, + nir_op_ilt, + { &search250_0.value, &search250_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace250_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace250_1_0 = { + { nir_search_value_variable, 0 }, + 1, /* b */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace250_1_1 = { + { nir_search_value_variable, 0 }, + 3, /* d */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace250_1 = { + { nir_search_value_expression, 0 }, + false, + nir_op_ilt, + { &replace250_1_0.value, &replace250_1_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace250_2_0 = { + { nir_search_value_variable, 0 }, + 2, /* c */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace250_2_1 = { + { nir_search_value_variable, 0 }, + 3, /* d */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace250_2 = { + { nir_search_value_expression, 0 }, + false, + nir_op_ilt, + { &replace250_2_0.value, &replace250_2_1.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace250 = { + { nir_search_value_expression, 0 }, + false, + nir_op_bcsel, + { &replace250_0.value, &replace250_1.value, &replace250_2.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search251_0 = { + { nir_search_value_variable, 0 }, + 0, /* d */ + true, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search251_1_0 = { + { nir_search_value_variable, 0 }, + 1, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search251_1_1 = { + { nir_search_value_variable, 0 }, + 2, /* b */ + true, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search251_1_2 = { + { nir_search_value_variable, 0 }, + 3, /* c */ + true, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search251_1 = { + { nir_search_value_expression, 0 }, + false, + nir_op_bcsel, + { &search251_1_0.value, &search251_1_1.value, &search251_1_2.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search251 = { + { nir_search_value_expression, 0 }, + false, + nir_op_ilt, + { &search251_0.value, &search251_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace251_0 = { + { nir_search_value_variable, 0 }, + 1, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace251_1_0 = { + { nir_search_value_variable, 0 }, + 0, /* d */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace251_1_1 = { + { nir_search_value_variable, 0 }, + 2, /* b */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace251_1 = { + { nir_search_value_expression, 0 }, + false, + nir_op_ilt, + { &replace251_1_0.value, &replace251_1_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace251_2_0 = { + { nir_search_value_variable, 0 }, + 0, /* d */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace251_2_1 = { + { nir_search_value_variable, 0 }, + 3, /* c */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace251_2 = { + { nir_search_value_expression, 0 }, + false, + nir_op_ilt, + { &replace251_2_0.value, &replace251_2_1.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace251 = { + { nir_search_value_expression, 0 }, + false, + nir_op_bcsel, + { &replace251_0.value, &replace251_1.value, &replace251_2.value }, + NULL, +}; + +static const struct transform nir_opt_algebraic_ilt_xforms[] = { + { &search115, &replace115.value, 0 }, + { &search250, &replace250.value, 0 }, + { &search251, &replace251.value, 0 }, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search4_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search4_1 = { + { nir_search_value_constant, 0 }, + nir_type_int, { 0x1 /* 1 */ }, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search4 = { + { nir_search_value_expression, 0 }, + false, + nir_op_umod, + { &search4_0.value, &search4_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace4 = { + { nir_search_value_constant, 0 }, + nir_type_int, { 0x0 /* 0 */ }, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search9_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search9_1 = { + { nir_search_value_variable, 0 }, + 1, /* b */ + true, + nir_type_invalid, + (is_pos_power_of_two), +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search9 = { + { nir_search_value_expression, 0 }, + false, + nir_op_umod, + { &search9_0.value, &search9_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace9_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace9_1_0 = { + { nir_search_value_variable, 0 }, + 1, /* b */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace9_1_1 = { + { nir_search_value_constant, 0 }, + nir_type_int, { 0x1 /* 1 */ }, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace9_1 = { + { nir_search_value_expression, 0 }, + false, + nir_op_isub, + { &replace9_1_0.value, &replace9_1_1.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace9 = { + { nir_search_value_expression, 0 }, + false, + nir_op_iand, + { &replace9_0.value, &replace9_1.value }, + NULL, +}; + +static const struct transform nir_opt_algebraic_umod_xforms[] = { + { &search4, &replace4.value, 0 }, + { &search9, &replace9.value, 0 }, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search0_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search0_1 = { + { nir_search_value_variable, 32 }, + 1, /* b */ + true, + nir_type_invalid, + (is_pos_power_of_two), +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_imul, + { &search0_0.value, &search0_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace0_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace0_1_0 = { + { nir_search_value_variable, 0 }, + 1, /* b */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace0_1 = { + { nir_search_value_expression, 0 }, + false, + nir_op_find_lsb, + { &replace0_1_0.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace0 = { { nir_search_value_expression, 0 }, false, - nir_op_ilt, - { &replace222_2_0.value, &replace222_2_1.value }, + nir_op_ishl, + { &replace0_0.value, &replace0_1.value }, + NULL, }; -static const nir_search_expression replace222 = { + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search1_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search1_1 = { + { nir_search_value_variable, 32 }, + 1, /* b */ + true, + nir_type_invalid, + (is_neg_power_of_two), +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search1 = { { nir_search_value_expression, 0 }, false, - nir_op_bcsel, - { &replace222_0.value, &replace222_1.value, &replace222_2.value }, + nir_op_imul, + { &search1_0.value, &search1_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace1_0_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, }; -static const struct transform nir_opt_algebraic_ilt_xforms[] = { - { &search97, &replace97.value, 0 }, - { &search221, &replace221.value, 0 }, - { &search222, &replace222.value, 0 }, +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace1_0_1_0_0 = { + { nir_search_value_variable, 0 }, + 1, /* b */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace1_0_1_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_iabs, + { &replace1_0_1_0_0.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace1_0_1 = { + { nir_search_value_expression, 0 }, + false, + nir_op_find_lsb, + { &replace1_0_1_0.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace1_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_ishl, + { &replace1_0_0.value, &replace1_0_1.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace1 = { + { nir_search_value_expression, 0 }, + false, + nir_op_ineg, + { &replace1_0.value }, + NULL, }; -static const nir_search_variable search19_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search30_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search19_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search30_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_expression search19 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search30 = { { nir_search_value_expression, 0 }, false, nir_op_imul, - { &search19_0.value, &search19_1.value }, + { &search30_0.value, &search30_1.value }, + NULL, }; -static const nir_search_constant replace19 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace30 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_variable search23_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search34_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search23_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search34_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x1 /* 1 */ }, }; -static const nir_search_expression search23 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search34 = { { nir_search_value_expression, 0 }, false, nir_op_imul, - { &search23_0.value, &search23_1.value }, + { &search34_0.value, &search34_1.value }, + NULL, }; -static const nir_search_variable replace23 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace34 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search25_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search36_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search25_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search36_1 = { { nir_search_value_constant, 0 }, nir_type_int, { -0x1 /* -1 */ }, }; -static const nir_search_expression search25 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search36 = { { nir_search_value_expression, 0 }, false, nir_op_imul, - { &search25_0.value, &search25_1.value }, + { &search36_0.value, &search36_1.value }, + NULL, }; -static const nir_search_variable replace25_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace36_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace25 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace36 = { { nir_search_value_expression, 0 }, false, nir_op_ineg, - { &replace25_0.value }, + { &replace36_0.value }, + NULL, }; -static const nir_search_variable search91_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search108_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search91_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search108_0 = { { nir_search_value_expression, 0 }, false, nir_op_b2i, - { &search91_0_0.value }, + { &search108_0_0.value }, + NULL, }; -static const nir_search_variable search91_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search108_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search91_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search108_1 = { { nir_search_value_expression, 0 }, false, nir_op_b2i, - { &search91_1_0.value }, + { &search108_1_0.value }, + NULL, }; -static const nir_search_expression search91 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search108 = { { nir_search_value_expression, 0 }, false, nir_op_imul, - { &search91_0.value, &search91_1.value }, + { &search108_0.value, &search108_1.value }, + NULL, }; -static const nir_search_variable replace91_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace108_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace91_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace108_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace91_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace108_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &replace91_0_0.value, &replace91_0_1.value }, + { &replace108_0_0.value, &replace108_0_1.value }, + NULL, }; -static const nir_search_expression replace91 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace108 = { { nir_search_value_expression, 0 }, false, nir_op_b2i, - { &replace91_0.value }, + { &replace108_0.value }, + NULL, }; -static const nir_search_variable search185_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search208_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search185_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search208_0 = { { nir_search_value_expression, 0 }, false, nir_op_ineg, - { &search185_0_0.value }, + { &search208_0_0.value }, + NULL, }; -static const nir_search_variable search185_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search208_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search185 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search208 = { { nir_search_value_expression, 0 }, false, nir_op_imul, - { &search185_0.value, &search185_1.value }, + { &search208_0.value, &search208_1.value }, + NULL, }; -static const nir_search_variable replace185_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace208_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace185_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace208_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace185_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace208_0 = { { nir_search_value_expression, 0 }, false, nir_op_imul, - { &replace185_0_0.value, &replace185_0_1.value }, + { &replace208_0_0.value, &replace208_0_1.value }, + NULL, }; -static const nir_search_expression replace185 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace208 = { { nir_search_value_expression, 0 }, false, nir_op_ineg, - { &replace185_0.value }, + { &replace208_0.value }, + NULL, }; -static const nir_search_variable search187_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search210_0 = { { nir_search_value_variable, 0 }, 0, /* a */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search187_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search210_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search187_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search210_1_1 = { { nir_search_value_variable, 0 }, 2, /* c */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search187_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search210_1 = { { nir_search_value_expression, 0 }, false, nir_op_imul, - { &search187_1_0.value, &search187_1_1.value }, + { &search210_1_0.value, &search210_1_1.value }, + NULL, }; -static const nir_search_expression search187 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search210 = { { nir_search_value_expression, 0 }, false, nir_op_imul, - { &search187_0.value, &search187_1.value }, + { &search210_0.value, &search210_1.value }, + NULL, }; -static const nir_search_variable replace187_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace210_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace187_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace210_0_1 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace187_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace210_0 = { { nir_search_value_expression, 0 }, false, nir_op_imul, - { &replace187_0_0.value, &replace187_0_1.value }, + { &replace210_0_0.value, &replace210_0_1.value }, + NULL, }; -static const nir_search_variable replace187_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace210_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace187 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace210 = { { nir_search_value_expression, 0 }, false, nir_op_imul, - { &replace187_0.value, &replace187_1.value }, + { &replace210_0.value, &replace210_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_imul_xforms[] = { - { &search19, &replace19.value, 0 }, - { &search23, &replace23.value, 0 }, - { &search25, &replace25.value, 0 }, - { &search91, &replace91.value, 0 }, - { &search185, &replace185.value, 0 }, - { &search187, &replace187.value, 0 }, + { &search0, &replace0.value, 0 }, + { &search1, &replace1.value, 0 }, + { &search30, &replace30.value, 0 }, + { &search34, &replace34.value, 0 }, + { &search36, &replace36.value, 0 }, + { &search108, &replace108.value, 0 }, + { &search208, &replace208.value, 0 }, + { &search210, &replace210.value, 0 }, }; -static const nir_search_variable search102_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search120_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search102_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search120_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search102 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search120 = { { nir_search_value_expression, 0 }, false, nir_op_uge, - { &search102_0.value, &search102_1.value }, + { &search120_0.value, &search120_1.value }, + NULL, }; -static const nir_search_constant replace102 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace120 = { { nir_search_value_constant, 32 }, nir_type_bool32, { NIR_TRUE /* True */ }, }; -static const nir_search_variable search231_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search260_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search231_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search260_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search231_0_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search260_0_2 = { { nir_search_value_variable, 0 }, 2, /* c */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search231_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search260_0 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search231_0_0.value, &search231_0_1.value, &search231_0_2.value }, + { &search260_0_0.value, &search260_0_1.value, &search260_0_2.value }, + NULL, }; -static const nir_search_variable search231_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search260_1 = { { nir_search_value_variable, 0 }, 3, /* d */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search231 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search260 = { { nir_search_value_expression, 0 }, false, nir_op_uge, - { &search231_0.value, &search231_1.value }, + { &search260_0.value, &search260_1.value }, + NULL, }; -static const nir_search_variable replace231_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace260_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace231_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace260_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace231_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace260_1_1 = { { nir_search_value_variable, 0 }, 3, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace231_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace260_1 = { { nir_search_value_expression, 0 }, false, nir_op_uge, - { &replace231_1_0.value, &replace231_1_1.value }, + { &replace260_1_0.value, &replace260_1_1.value }, + NULL, }; -static const nir_search_variable replace231_2_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace260_2_0 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace231_2_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace260_2_1 = { { nir_search_value_variable, 0 }, 3, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace231_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace260_2 = { { nir_search_value_expression, 0 }, false, nir_op_uge, - { &replace231_2_0.value, &replace231_2_1.value }, + { &replace260_2_0.value, &replace260_2_1.value }, + NULL, }; -static const nir_search_expression replace231 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace260 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &replace231_0.value, &replace231_1.value, &replace231_2.value }, + { &replace260_0.value, &replace260_1.value, &replace260_2.value }, + NULL, }; -static const nir_search_variable search232_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search261_0 = { { nir_search_value_variable, 0 }, 0, /* d */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search232_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search261_1_0 = { { nir_search_value_variable, 0 }, 1, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search232_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search261_1_1 = { { nir_search_value_variable, 0 }, 2, /* b */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search232_1_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search261_1_2 = { { nir_search_value_variable, 0 }, 3, /* c */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search232_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search261_1 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search232_1_0.value, &search232_1_1.value, &search232_1_2.value }, + { &search261_1_0.value, &search261_1_1.value, &search261_1_2.value }, + NULL, }; -static const nir_search_expression search232 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search261 = { { nir_search_value_expression, 0 }, false, nir_op_uge, - { &search232_0.value, &search232_1.value }, + { &search261_0.value, &search261_1.value }, + NULL, }; -static const nir_search_variable replace232_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace261_0 = { { nir_search_value_variable, 0 }, 1, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace232_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace261_1_0 = { { nir_search_value_variable, 0 }, 0, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace232_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace261_1_1 = { { nir_search_value_variable, 0 }, 2, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace232_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace261_1 = { { nir_search_value_expression, 0 }, false, nir_op_uge, - { &replace232_1_0.value, &replace232_1_1.value }, + { &replace261_1_0.value, &replace261_1_1.value }, + NULL, }; -static const nir_search_variable replace232_2_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace261_2_0 = { { nir_search_value_variable, 0 }, 0, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace232_2_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace261_2_1 = { { nir_search_value_variable, 0 }, 3, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace232_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace261_2 = { { nir_search_value_expression, 0 }, false, nir_op_uge, - { &replace232_2_0.value, &replace232_2_1.value }, + { &replace261_2_0.value, &replace261_2_1.value }, + NULL, }; -static const nir_search_expression replace232 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace261 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &replace232_0.value, &replace232_1.value, &replace232_2.value }, + { &replace261_0.value, &replace261_1.value, &replace261_2.value }, + NULL, }; static const struct transform nir_opt_algebraic_uge_xforms[] = { - { &search102, &replace102.value, 0 }, - { &search231, &replace231.value, 0 }, - { &search232, &replace232.value, 0 }, + { &search120, &replace120.value, 0 }, + { &search260, &replace260.value, 0 }, + { &search261, &replace261.value, 0 }, }; -static const nir_search_variable search8_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search11_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; - -static const nir_search_constant search8_1 = { - { nir_search_value_constant, 0 }, - nir_type_int, { 0x0 /* 0 */ }, +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search11_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_ineg, + { &search11_0_0.value }, + NULL, }; -static const nir_search_expression search8 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search11 = { { nir_search_value_expression, 0 }, false, - nir_op_usadd_4x8, - { &search8_0.value, &search8_1.value }, + nir_op_ineg, + { &search11_0.value }, + NULL, }; -static const nir_search_variable replace8 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace11 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search9_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search112_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; - -static const nir_search_constant search9_1 = { - { nir_search_value_constant, 0 }, - nir_type_int, { -0x1 /* -1 */ }, +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search112_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_b2i, + { &search112_0_0.value }, + NULL, }; -static const nir_search_expression search9 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search112 = { { nir_search_value_expression, 0 }, false, - nir_op_usadd_4x8, - { &search9_0.value, &search9_1.value }, + nir_op_ineg, + { &search112_0.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace112 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search202_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search202 = { + { nir_search_value_expression, 0 }, + false, + nir_op_ineg, + { &search202_0.value }, + NULL, }; -static const nir_search_constant replace9 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace202_0 = { { nir_search_value_constant, 0 }, - nir_type_int, { -0x1 /* -1 */ }, + nir_type_int, { 0x0 /* 0 */ }, }; -static const struct transform nir_opt_algebraic_usadd_4x8_xforms[] = { - { &search8, &replace8.value, 0 }, - { &search9, &replace9.value, 0 }, +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace202_1 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace202 = { + { nir_search_value_expression, 0 }, + false, + nir_op_isub, + { &replace202_0.value, &replace202_1.value }, + NULL, +}; + +static const struct transform nir_opt_algebraic_ineg_xforms[] = { + { &search11, &replace11.value, 0 }, + { &search112, &replace112.value, 0 }, + { &search202, &replace202.value, 20 }, }; -static const nir_search_variable search18_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search29_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search18_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search29_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_expression search18 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search29 = { { nir_search_value_expression, 0 }, true, nir_op_fmul, - { &search18_0.value, &search18_1.value }, + { &search29_0.value, &search29_1.value }, + NULL, }; -static const nir_search_constant replace18 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace29 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_variable search22_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search33_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search22_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search33_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x3ff0000000000000 /* 1.0 */ }, }; -static const nir_search_expression search22 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search33 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &search22_0.value, &search22_1.value }, + { &search33_0.value, &search33_1.value }, + NULL, }; -static const nir_search_variable replace22 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace33 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search24_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search35_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search24_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search35_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0xbff0000000000000L /* -1.0 */ }, }; -static const nir_search_expression search24 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search35 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &search24_0.value, &search24_1.value }, + { &search35_0.value, &search35_1.value }, + NULL, }; -static const nir_search_variable replace24_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace35_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace24 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace35 = { { nir_search_value_expression, 0 }, false, nir_op_fneg, - { &replace24_0.value }, + { &replace35_0.value }, + NULL, }; -static const nir_search_variable search92_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search109_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search92_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search109_0 = { { nir_search_value_expression, 0 }, false, nir_op_b2f, - { &search92_0_0.value }, + { &search109_0_0.value }, + NULL, }; -static const nir_search_variable search92_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search109_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search92_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search109_1 = { { nir_search_value_expression, 0 }, false, nir_op_b2f, - { &search92_1_0.value }, + { &search109_1_0.value }, + NULL, }; -static const nir_search_expression search92 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search109 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &search92_0.value, &search92_1.value }, + { &search109_0.value, &search109_1.value }, + NULL, }; -static const nir_search_variable replace92_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace109_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace92_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace109_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace92_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace109_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &replace92_0_0.value, &replace92_0_1.value }, + { &replace109_0_0.value, &replace109_0_1.value }, + NULL, }; -static const nir_search_expression replace92 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace109 = { { nir_search_value_expression, 0 }, false, nir_op_b2f, - { &replace92_0.value }, + { &replace109_0.value }, + NULL, }; -static const nir_search_variable search141_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search160_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search141_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search160_0 = { { nir_search_value_expression, 0 }, false, nir_op_fexp2, - { &search141_0_0.value }, + { &search160_0_0.value }, + NULL, }; -static const nir_search_variable search141_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search160_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search141_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search160_1 = { { nir_search_value_expression, 0 }, false, nir_op_fexp2, - { &search141_1_0.value }, + { &search160_1_0.value }, + NULL, }; -static const nir_search_expression search141 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search160 = { { nir_search_value_expression, 0 }, true, nir_op_fmul, - { &search141_0.value, &search141_1.value }, + { &search160_0.value, &search160_1.value }, + NULL, }; -static const nir_search_variable replace141_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace160_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace141_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace160_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace141_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace160_0 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, - { &replace141_0_0.value, &replace141_0_1.value }, + { &replace160_0_0.value, &replace160_0_1.value }, + NULL, }; -static const nir_search_expression replace141 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace160 = { { nir_search_value_expression, 0 }, false, nir_op_fexp2, - { &replace141_0.value }, + { &replace160_0.value }, + NULL, }; -static const nir_search_variable search184_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search207_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search184_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search207_0 = { { nir_search_value_expression, 0 }, false, nir_op_fneg, - { &search184_0_0.value }, + { &search207_0_0.value }, + NULL, }; -static const nir_search_variable search184_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search207_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search184 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search207 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &search184_0.value, &search184_1.value }, + { &search207_0.value, &search207_1.value }, + NULL, }; -static const nir_search_variable replace184_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace207_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace184_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace207_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace184_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace207_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace184_0_0.value, &replace184_0_1.value }, + { &replace207_0_0.value, &replace207_0_1.value }, + NULL, }; -static const nir_search_expression replace184 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace207 = { { nir_search_value_expression, 0 }, false, nir_op_fneg, - { &replace184_0.value }, + { &replace207_0.value }, + NULL, }; -static const nir_search_variable search186_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search209_0 = { { nir_search_value_variable, 0 }, 0, /* a */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search186_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search209_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search186_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search209_1_1 = { { nir_search_value_variable, 0 }, 2, /* c */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search186_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search209_1 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &search186_1_0.value, &search186_1_1.value }, + { &search209_1_0.value, &search209_1_1.value }, + NULL, }; -static const nir_search_expression search186 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search209 = { { nir_search_value_expression, 0 }, true, nir_op_fmul, - { &search186_0.value, &search186_1.value }, + { &search209_0.value, &search209_1.value }, + NULL, }; -static const nir_search_variable replace186_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace209_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace186_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace209_0_1 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace186_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace209_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace186_0_0.value, &replace186_0_1.value }, + { &replace209_0_0.value, &replace209_0_1.value }, + NULL, }; -static const nir_search_variable replace186_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace209_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace186 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace209 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace186_0.value, &replace186_1.value }, + { &replace209_0.value, &replace209_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_fmul_xforms[] = { - { &search18, &replace18.value, 0 }, - { &search22, &replace22.value, 0 }, - { &search24, &replace24.value, 0 }, - { &search92, &replace92.value, 0 }, - { &search141, &replace141.value, 0 }, - { &search184, &replace184.value, 0 }, - { &search186, &replace186.value, 0 }, + { &search29, &replace29.value, 0 }, + { &search33, &replace33.value, 0 }, + { &search35, &replace35.value, 0 }, + { &search109, &replace109.value, 0 }, + { &search160, &replace160.value, 0 }, + { &search207, &replace207.value, 0 }, + { &search209, &replace209.value, 0 }, }; -static const nir_search_variable search197_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search220_0 = { { nir_search_value_variable, 0 }, 0, /* value */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search197_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search220_1 = { { nir_search_value_variable, 0 }, 1, /* offset */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search197_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search220_2 = { { nir_search_value_variable, 0 }, 2, /* bits */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search197 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search220 = { { nir_search_value_expression, 0 }, false, nir_op_ubitfield_extract, - { &search197_0.value, &search197_1.value, &search197_2.value }, + { &search220_0.value, &search220_1.value, &search220_2.value }, + NULL, }; -static const nir_search_constant replace197_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace220_0_0 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x1f /* 31 */ }, }; -static const nir_search_variable replace197_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace220_0_1 = { { nir_search_value_variable, 0 }, 2, /* bits */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace197_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace220_0 = { { nir_search_value_expression, 0 }, false, nir_op_ult, - { &replace197_0_0.value, &replace197_0_1.value }, + { &replace220_0_0.value, &replace220_0_1.value }, + NULL, }; -static const nir_search_variable replace197_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace220_1 = { { nir_search_value_variable, 0 }, 0, /* value */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace197_2_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace220_2_0 = { { nir_search_value_variable, 0 }, 0, /* value */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace197_2_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace220_2_1 = { { nir_search_value_variable, 0 }, 1, /* offset */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace197_2_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace220_2_2 = { { nir_search_value_variable, 0 }, 2, /* bits */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace197_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace220_2 = { { nir_search_value_expression, 0 }, false, nir_op_ubfe, - { &replace197_2_0.value, &replace197_2_1.value, &replace197_2_2.value }, + { &replace220_2_0.value, &replace220_2_1.value, &replace220_2_2.value }, + NULL, }; -static const nir_search_expression replace197 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace220 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &replace197_0.value, &replace197_1.value, &replace197_2.value }, + { &replace220_0.value, &replace220_1.value, &replace220_2.value }, + NULL, }; static const struct transform nir_opt_algebraic_ubitfield_extract_xforms[] = { - { &search197, &replace197.value, 25 }, + { &search220, &replace220.value, 26 }, }; -static const nir_search_constant search26_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search37_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_variable search26_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search37_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search26_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search37_2 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search26 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search37 = { { nir_search_value_expression, 0 }, true, nir_op_ffma, - { &search26_0.value, &search26_1.value, &search26_2.value }, + { &search37_0.value, &search37_1.value, &search37_2.value }, + NULL, }; -static const nir_search_variable replace26 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace37 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search27_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search38_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search27_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search38_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_variable search27_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search38_2 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search27 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search38 = { { nir_search_value_expression, 0 }, true, nir_op_ffma, - { &search27_0.value, &search27_1.value, &search27_2.value }, + { &search38_0.value, &search38_1.value, &search38_2.value }, + NULL, }; -static const nir_search_variable replace27 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace38 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search28_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search39_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search28_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search39_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search28_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search39_2 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_expression search28 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search39 = { { nir_search_value_expression, 0 }, true, nir_op_ffma, - { &search28_0.value, &search28_1.value, &search28_2.value }, + { &search39_0.value, &search39_1.value, &search39_2.value }, + NULL, }; -static const nir_search_variable replace28_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace39_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace28_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace39_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace28 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace39 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace28_0.value, &replace28_1.value }, + { &replace39_0.value, &replace39_1.value }, + NULL, }; -static const nir_search_variable search29_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search40_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search29_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search40_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x3ff0000000000000 /* 1.0 */ }, }; -static const nir_search_variable search29_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search40_2 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search29 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search40 = { { nir_search_value_expression, 0 }, false, nir_op_ffma, - { &search29_0.value, &search29_1.value, &search29_2.value }, + { &search40_0.value, &search40_1.value, &search40_2.value }, + NULL, }; -static const nir_search_variable replace29_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace40_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace29_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace40_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace29 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace40 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, - { &replace29_0.value, &replace29_1.value }, + { &replace40_0.value, &replace40_1.value }, + NULL, }; -static const nir_search_constant search30_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search41_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x3ff0000000000000 /* 1.0 */ }, }; -static const nir_search_variable search30_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search41_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search30_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search41_2 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search30 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search41 = { { nir_search_value_expression, 0 }, false, nir_op_ffma, - { &search30_0.value, &search30_1.value, &search30_2.value }, + { &search41_0.value, &search41_1.value, &search41_2.value }, + NULL, }; -static const nir_search_variable replace30_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace41_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace30_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace41_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace30 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace41 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, - { &replace30_0.value, &replace30_1.value }, + { &replace41_0.value, &replace41_1.value }, + NULL, }; -static const nir_search_variable search45_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search57_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search45_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search57_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search45_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search57_2 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search45 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search57 = { { nir_search_value_expression, 0 }, false, nir_op_ffma, - { &search45_0.value, &search45_1.value, &search45_2.value }, + { &search57_0.value, &search57_1.value, &search57_2.value }, + NULL, }; -static const nir_search_variable replace45_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace57_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace45_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace57_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace45_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace57_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace45_0_0.value, &replace45_0_1.value }, + { &replace57_0_0.value, &replace57_0_1.value }, + NULL, }; -static const nir_search_variable replace45_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace57_1 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace45 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace57 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, - { &replace45_0.value, &replace45_1.value }, + { &replace57_0.value, &replace57_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_ffma_xforms[] = { - { &search26, &replace26.value, 0 }, - { &search27, &replace27.value, 0 }, - { &search28, &replace28.value, 0 }, - { &search29, &replace29.value, 0 }, - { &search30, &replace30.value, 0 }, - { &search45, &replace45.value, 6 }, + { &search37, &replace37.value, 0 }, + { &search38, &replace38.value, 0 }, + { &search39, &replace39.value, 0 }, + { &search40, &replace40.value, 0 }, + { &search41, &replace41.value, 0 }, + { &search57, &replace57.value, 7 }, }; -static const nir_search_variable search67_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search82_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search67_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search82_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search67 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search82 = { { nir_search_value_expression, 0 }, false, nir_op_umin, - { &search67_0.value, &search67_1.value }, + { &search82_0.value, &search82_1.value }, + NULL, }; -static const nir_search_variable replace67 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace82 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search75_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search90_0_0_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search75_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search90_0_0_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search75_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search90_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_umax, - { &search75_0_0_0_0.value, &search75_0_0_0_1.value }, + { &search90_0_0_0_0.value, &search90_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search75_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search90_0_0_1 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search75_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search90_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_umin, - { &search75_0_0_0.value, &search75_0_0_1.value }, + { &search90_0_0_0.value, &search90_0_0_1.value }, + NULL, }; -static const nir_search_variable search75_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search90_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search75_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search90_0 = { { nir_search_value_expression, 0 }, false, nir_op_umax, - { &search75_0_0.value, &search75_0_1.value }, + { &search90_0_0.value, &search90_0_1.value }, + NULL, }; -static const nir_search_variable search75_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search90_1 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search75 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search90 = { { nir_search_value_expression, 0 }, false, nir_op_umin, - { &search75_0.value, &search75_1.value }, + { &search90_0.value, &search90_1.value }, + NULL, }; -static const nir_search_variable replace75_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace90_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace75_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace90_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace75_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace90_0 = { { nir_search_value_expression, 0 }, false, nir_op_umax, - { &replace75_0_0.value, &replace75_0_1.value }, + { &replace90_0_0.value, &replace90_0_1.value }, + NULL, }; -static const nir_search_variable replace75_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace90_1 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace75 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace90 = { { nir_search_value_expression, 0 }, false, nir_op_umin, - { &replace75_0.value, &replace75_1.value }, + { &replace90_0.value, &replace90_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_umin_xforms[] = { - { &search67, &replace67.value, 0 }, - { &search75, &replace75.value, 0 }, + { &search82, &replace82.value, 0 }, + { &search90, &replace90.value, 0 }, }; -static const nir_search_variable search68_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search83_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search68_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search83_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search68 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search83 = { { nir_search_value_expression, 0 }, false, nir_op_umax, - { &search68_0.value, &search68_1.value }, + { &search83_0.value, &search83_1.value }, + NULL, }; -static const nir_search_variable replace68 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace83 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; static const struct transform nir_opt_algebraic_umax_xforms[] = { - { &search68, &replace68.value, 0 }, + { &search83, &replace83.value, 0 }, }; -static const nir_search_variable search58_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search73_0_0 = { { nir_search_value_variable, 0 }, 0, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search58_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search73_0_1 = { { nir_search_value_variable, 0 }, 1, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search58_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search73_0 = { { nir_search_value_expression, 0 }, false, nir_op_flt, - { &search58_0_0.value, &search58_0_1.value }, + { &search73_0_0.value, &search73_0_1.value }, + NULL, }; -static const nir_search_variable search58_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search73_1 = { { nir_search_value_variable, 0 }, 0, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search58_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search73_2 = { { nir_search_value_variable, 0 }, 1, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search58 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search73 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search58_0.value, &search58_1.value, &search58_2.value }, + { &search73_0.value, &search73_1.value, &search73_2.value }, + NULL, }; -static const nir_search_variable replace58_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace73_0 = { { nir_search_value_variable, 0 }, 1, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace58_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace73_1 = { { nir_search_value_variable, 0 }, 0, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace58 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace73 = { { nir_search_value_expression, 0 }, false, nir_op_fmin, - { &replace58_0.value, &replace58_1.value }, + { &replace73_0.value, &replace73_1.value }, + NULL, }; -static const nir_search_variable search59_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search74_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search59_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search74_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search59_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search74_0 = { { nir_search_value_expression, 0 }, false, nir_op_flt, - { &search59_0_0.value, &search59_0_1.value }, + { &search74_0_0.value, &search74_0_1.value }, + NULL, }; -static const nir_search_variable search59_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search74_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search59_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search74_2 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search59 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search74 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search59_0.value, &search59_1.value, &search59_2.value }, + { &search74_0.value, &search74_1.value, &search74_2.value }, + NULL, }; -static const nir_search_variable replace59_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace74_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace59_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace74_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace59 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace74 = { { nir_search_value_expression, 0 }, false, nir_op_fmax, - { &replace59_0.value, &replace59_1.value }, + { &replace74_0.value, &replace74_1.value }, + NULL, }; -static const nir_search_variable search60_0_0 = { - { nir_search_value_variable, 32 }, +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search75_0_0 = { + { nir_search_value_variable, 0 }, 0, /* a */ false, - nir_type_bool32, + nir_type_invalid, + NULL, }; -static const nir_search_expression search60_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search75_0 = { { nir_search_value_expression, 0 }, false, nir_op_inot, - { &search60_0_0.value }, + { &search75_0_0.value }, + NULL, }; -static const nir_search_variable search60_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search75_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search60_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search75_2 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search60 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search75 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search60_0.value, &search60_1.value, &search60_2.value }, + { &search75_0.value, &search75_1.value, &search75_2.value }, + NULL, }; -static const nir_search_variable replace60_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace75_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace60_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace75_1 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace60_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace75_2 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace60 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace75 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &replace60_0.value, &replace60_1.value, &replace60_2.value }, + { &replace75_0.value, &replace75_1.value, &replace75_2.value }, + NULL, }; -static const nir_search_variable search61_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search76_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search61_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search76_1_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search61_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search76_1_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search61_1_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search76_1_2 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search61_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search76_1 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search61_1_0.value, &search61_1_1.value, &search61_1_2.value }, + { &search76_1_0.value, &search76_1_1.value, &search76_1_2.value }, + NULL, }; -static const nir_search_variable search61_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search76_2 = { { nir_search_value_variable, 0 }, 3, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search61 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search76 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search61_0.value, &search61_1.value, &search61_2.value }, + { &search76_0.value, &search76_1.value, &search76_2.value }, + NULL, }; -static const nir_search_variable replace61_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace76_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace61_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace76_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace61_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace76_2 = { { nir_search_value_variable, 0 }, 3, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace61 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace76 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &replace61_0.value, &replace61_1.value, &replace61_2.value }, + { &replace76_0.value, &replace76_1.value, &replace76_2.value }, + NULL, }; -static const nir_search_variable search62_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search77_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search62_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search77_1 = { { nir_search_value_constant, 32 }, nir_type_bool32, { NIR_TRUE /* True */ }, }; -static const nir_search_variable search62_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search77_2 = { { nir_search_value_variable, 32 }, 1, /* b */ false, nir_type_bool32, + NULL, }; -static const nir_search_expression search62 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search77 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search62_0.value, &search62_1.value, &search62_2.value }, + { &search77_0.value, &search77_1.value, &search77_2.value }, + NULL, }; -static const nir_search_variable replace62_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace77_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace62_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace77_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace62 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace77 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &replace62_0.value, &replace62_1.value }, + { &replace77_0.value, &replace77_1.value }, + NULL, }; -static const nir_search_variable search152_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search171_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search152_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search171_1 = { + { nir_search_value_constant, 32 }, + nir_type_bool32, { NIR_TRUE /* True */ }, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search171_2 = { + { nir_search_value_constant, 32 }, + nir_type_bool32, { NIR_FALSE /* False */ }, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search171 = { + { nir_search_value_expression, 0 }, + false, + nir_op_bcsel, + { &search171_0.value, &search171_1.value, &search171_2.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace171 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search172_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search172_1 = { + { nir_search_value_constant, 32 }, + nir_type_bool32, { NIR_FALSE /* False */ }, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search172_2 = { { nir_search_value_constant, 32 }, nir_type_bool32, { NIR_TRUE /* True */ }, }; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search172 = { + { nir_search_value_expression, 0 }, + false, + nir_op_bcsel, + { &search172_0.value, &search172_1.value, &search172_2.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace172_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace172 = { + { nir_search_value_expression, 0 }, + false, + nir_op_inot, + { &replace172_0.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search173_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search173_1 = { + { nir_search_value_constant, 0 }, + nir_type_float, { 0x3ff0000000000000 /* 1.0 */ }, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search173_2 = { + { nir_search_value_constant, 0 }, + nir_type_float, { 0x0 /* 0.0 */ }, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search173 = { + { nir_search_value_expression, 32 }, + false, + nir_op_bcsel, + { &search173_0.value, &search173_1.value, &search173_2.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace173_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace173 = { + { nir_search_value_expression, 0 }, + false, + nir_op_b2f, + { &replace173_0.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search174_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search174_1 = { + { nir_search_value_constant, 0 }, + nir_type_float, { 0x0 /* 0.0 */ }, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search174_2 = { + { nir_search_value_constant, 0 }, + nir_type_float, { 0x3ff0000000000000 /* 1.0 */ }, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search174 = { + { nir_search_value_expression, 32 }, + false, + nir_op_bcsel, + { &search174_0.value, &search174_1.value, &search174_2.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace174_0_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace174_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_inot, + { &replace174_0_0.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace174 = { + { nir_search_value_expression, 0 }, + false, + nir_op_b2f, + { &replace174_0.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search175_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search175_1 = { + { nir_search_value_constant, 0 }, + nir_type_float, { 0xbff0000000000000L /* -1.0 */ }, +}; -static const nir_search_constant search152_2 = { - { nir_search_value_constant, 32 }, - nir_type_bool32, { NIR_FALSE /* False */ }, +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search175_2 = { + { nir_search_value_constant, 0 }, + nir_type_float, { 0x8000000000000000L /* -0.0 */ }, }; -static const nir_search_expression search152 = { - { nir_search_value_expression, 0 }, +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search175 = { + { nir_search_value_expression, 32 }, false, nir_op_bcsel, - { &search152_0.value, &search152_1.value, &search152_2.value }, + { &search175_0.value, &search175_1.value, &search175_2.value }, + NULL, }; -static const nir_search_variable replace152_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace175_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; - -static const nir_search_constant replace152_1 = { - { nir_search_value_constant, 0 }, - nir_type_int, { 0x0 /* 0 */ }, +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace175_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_b2f, + { &replace175_0_0.value }, + NULL, }; -static const nir_search_expression replace152 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace175 = { { nir_search_value_expression, 0 }, false, - nir_op_ine, - { &replace152_0.value, &replace152_1.value }, + nir_op_fneg, + { &replace175_0.value }, + NULL, }; -static const nir_search_variable search153_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search176_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search153_1 = { - { nir_search_value_constant, 32 }, - nir_type_bool32, { NIR_FALSE /* False */ }, +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search176_1 = { + { nir_search_value_constant, 0 }, + nir_type_float, { 0x8000000000000000L /* -0.0 */ }, }; -static const nir_search_constant search153_2 = { - { nir_search_value_constant, 32 }, - nir_type_bool32, { NIR_TRUE /* True */ }, +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search176_2 = { + { nir_search_value_constant, 0 }, + nir_type_float, { 0xbff0000000000000L /* -1.0 */ }, }; -static const nir_search_expression search153 = { - { nir_search_value_expression, 0 }, +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search176 = { + { nir_search_value_expression, 32 }, false, nir_op_bcsel, - { &search153_0.value, &search153_1.value, &search153_2.value }, + { &search176_0.value, &search176_1.value, &search176_2.value }, + NULL, }; -static const nir_search_variable replace153_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace176_0_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; - -static const nir_search_constant replace153_1 = { - { nir_search_value_constant, 0 }, - nir_type_int, { 0x0 /* 0 */ }, +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace176_0_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_inot, + { &replace176_0_0_0.value }, + NULL, }; -static const nir_search_expression replace153 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace176_0 = { { nir_search_value_expression, 0 }, false, - nir_op_ieq, - { &replace153_0.value, &replace153_1.value }, + nir_op_b2f, + { &replace176_0_0.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace176 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fneg, + { &replace176_0.value }, + NULL, }; -static const nir_search_constant search154_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search177_0 = { { nir_search_value_constant, 32 }, nir_type_bool32, { NIR_TRUE /* True */ }, }; -static const nir_search_variable search154_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search177_1 = { { nir_search_value_variable, 0 }, 0, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search154_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search177_2 = { { nir_search_value_variable, 0 }, 1, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search154 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search177 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search154_0.value, &search154_1.value, &search154_2.value }, + { &search177_0.value, &search177_1.value, &search177_2.value }, + NULL, }; -static const nir_search_variable replace154 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace177 = { { nir_search_value_variable, 0 }, 0, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search155_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search178_0 = { { nir_search_value_constant, 32 }, nir_type_bool32, { NIR_FALSE /* False */ }, }; -static const nir_search_variable search155_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search178_1 = { { nir_search_value_variable, 0 }, 0, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search155_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search178_2 = { { nir_search_value_variable, 0 }, 1, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search155 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search178 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search155_0.value, &search155_1.value, &search155_2.value }, + { &search178_0.value, &search178_1.value, &search178_2.value }, + NULL, }; -static const nir_search_variable replace155 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace178 = { { nir_search_value_variable, 0 }, 1, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search156_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search179_0 = { { nir_search_value_variable, 0 }, 0, /* a */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search156_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search179_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search156_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search179_2 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search156 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search179 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search156_0.value, &search156_1.value, &search156_2.value }, + { &search179_0.value, &search179_1.value, &search179_2.value }, + NULL, }; -static const nir_search_variable replace156_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace179_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace156_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace179_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_expression replace156_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace179_0 = { { nir_search_value_expression, 0 }, false, nir_op_ine, - { &replace156_0_0.value, &replace156_0_1.value }, + { &replace179_0_0.value, &replace179_0_1.value }, + NULL, }; -static const nir_search_variable replace156_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace179_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace156_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace179_2 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace156 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace179 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &replace156_0.value, &replace156_1.value, &replace156_2.value }, + { &replace179_0.value, &replace179_1.value, &replace179_2.value }, + NULL, }; -static const nir_search_variable search157_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search180_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search157_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search180_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search157_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search180_2 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search157 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search180 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search157_0.value, &search157_1.value, &search157_2.value }, + { &search180_0.value, &search180_1.value, &search180_2.value }, + NULL, }; -static const nir_search_variable replace157 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace180 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; static const struct transform nir_opt_algebraic_bcsel_xforms[] = { - { &search58, &replace58.value, 0 }, - { &search59, &replace59.value, 0 }, - { &search60, &replace60.value, 0 }, - { &search61, &replace61.value, 0 }, - { &search62, &replace62.value, 0 }, - { &search152, &replace152.value, 0 }, - { &search153, &replace153.value, 0 }, - { &search154, &replace154.value, 0 }, - { &search155, &replace155.value, 0 }, - { &search156, &replace156.value, 0 }, - { &search157, &replace157.value, 0 }, + { &search73, &replace73.value, 0 }, + { &search74, &replace74.value, 0 }, + { &search75, &replace75.value, 0 }, + { &search76, &replace76.value, 0 }, + { &search77, &replace77.value, 0 }, + { &search171, &replace171.value, 0 }, + { &search172, &replace172.value, 0 }, + { &search173, &replace173.value, 0 }, + { &search174, &replace174.value, 0 }, + { &search175, &replace175.value, 0 }, + { &search176, &replace176.value, 0 }, + { &search177, &replace177.value, 0 }, + { &search178, &replace178.value, 0 }, + { &search179, &replace179.value, 0 }, + { &search180, &replace180.value, 0 }, }; -static const nir_search_variable search86_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search103_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search86_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search103_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search86 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search103 = { { nir_search_value_expression, 0 }, false, nir_op_sge, - { &search86_0.value, &search86_1.value }, + { &search103_0.value, &search103_1.value }, + NULL, }; -static const nir_search_variable replace86_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace103_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace86_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace103_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace86_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace103_0 = { { nir_search_value_expression, 0 }, false, nir_op_fge, - { &replace86_0_0.value, &replace86_0_1.value }, + { &replace103_0_0.value, &replace103_0_1.value }, + NULL, }; -static const nir_search_expression replace86 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace103 = { { nir_search_value_expression, 0 }, false, nir_op_b2f, - { &replace86_0.value }, + { &replace103_0.value }, + NULL, }; static const struct transform nir_opt_algebraic_sge_xforms[] = { - { &search86, &replace86.value, 10 }, + { &search103, &replace103.value, 11 }, }; -static const nir_search_variable search134_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search153_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search134_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search153_0 = { { nir_search_value_expression, 0 }, false, nir_op_fexp2, - { &search134_0_0.value }, + { &search153_0_0.value }, + NULL, }; -static const nir_search_expression search134 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search153 = { { nir_search_value_expression, 0 }, true, nir_op_fsqrt, - { &search134_0.value }, + { &search153_0.value }, + NULL, }; -static const nir_search_constant replace134_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace153_0_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x3fe0000000000000 /* 0.5 */ }, }; -static const nir_search_variable replace134_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace153_0_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace134_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace153_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace134_0_0.value, &replace134_0_1.value }, + { &replace153_0_0.value, &replace153_0_1.value }, + NULL, }; -static const nir_search_expression replace134 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace153 = { { nir_search_value_expression, 0 }, false, nir_op_fexp2, - { &replace134_0.value }, + { &replace153_0.value }, + NULL, }; -static const nir_search_variable search146_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search165_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search146 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search165 = { { nir_search_value_expression, 0 }, false, nir_op_fsqrt, - { &search146_0.value }, + { &search165_0.value }, + NULL, }; -static const nir_search_variable replace146_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace165_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace146_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace165_0 = { { nir_search_value_expression, 0 }, false, nir_op_frsq, - { &replace146_0_0.value }, + { &replace165_0_0.value }, + NULL, }; -static const nir_search_expression replace146 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace165 = { { nir_search_value_expression, 0 }, false, nir_op_frcp, - { &replace146_0.value }, + { &replace165_0.value }, + NULL, }; static const struct transform nir_opt_algebraic_fsqrt_xforms[] = { - { &search134, &replace134.value, 0 }, - { &search146, &replace146.value, 14 }, + { &search153, &replace153.value, 0 }, + { &search165, &replace165.value, 15 }, }; -static const nir_search_variable search7_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search18_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search7_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search18_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_expression search7 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search18 = { { nir_search_value_expression, 0 }, false, nir_op_iadd, - { &search7_0.value, &search7_1.value }, + { &search18_0.value, &search18_1.value }, + NULL, }; -static const nir_search_variable replace7 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace18 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search11_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search22_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search11_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search22_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search11_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search22_0 = { { nir_search_value_expression, 0 }, false, nir_op_imul, - { &search11_0_0.value, &search11_0_1.value }, + { &search22_0_0.value, &search22_0_1.value }, + NULL, }; -static const nir_search_variable search11_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search22_1_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search11_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search22_1_1 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search11_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search22_1 = { { nir_search_value_expression, 0 }, false, nir_op_imul, - { &search11_1_0.value, &search11_1_1.value }, + { &search22_1_0.value, &search22_1_1.value }, + NULL, }; -static const nir_search_expression search11 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search22 = { { nir_search_value_expression, 0 }, false, nir_op_iadd, - { &search11_0.value, &search11_1.value }, + { &search22_0.value, &search22_1.value }, + NULL, }; -static const nir_search_variable replace11_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace22_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace11_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace22_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace11_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace22_1_1 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace11_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace22_1 = { { nir_search_value_expression, 0 }, false, nir_op_iadd, - { &replace11_1_0.value, &replace11_1_1.value }, + { &replace22_1_0.value, &replace22_1_1.value }, + NULL, }; -static const nir_search_expression replace11 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace22 = { { nir_search_value_expression, 0 }, false, nir_op_imul, - { &replace11_0.value, &replace11_1.value }, + { &replace22_0.value, &replace22_1.value }, + NULL, }; -static const nir_search_variable search13_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search24_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search13_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search24_0 = { { nir_search_value_expression, 0 }, false, nir_op_ineg, - { &search13_0_0.value }, + { &search24_0_0.value }, + NULL, }; -static const nir_search_variable search13_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search24_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search13 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search24 = { { nir_search_value_expression, 0 }, false, nir_op_iadd, - { &search13_0.value, &search13_1.value }, + { &search24_0.value, &search24_1.value }, + NULL, }; -static const nir_search_constant replace13 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace24 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_variable search14_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search25_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search14_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search25_0 = { { nir_search_value_expression, 0 }, false, nir_op_ineg, - { &search14_0_0.value }, + { &search25_0_0.value }, + NULL, }; -static const nir_search_variable search14_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search25_1_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search14_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search25_1_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search14_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search25_1 = { { nir_search_value_expression, 0 }, false, nir_op_iadd, - { &search14_1_0.value, &search14_1_1.value }, + { &search25_1_0.value, &search25_1_1.value }, + NULL, }; -static const nir_search_expression search14 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search25 = { { nir_search_value_expression, 0 }, false, nir_op_iadd, - { &search14_0.value, &search14_1.value }, + { &search25_0.value, &search25_1.value }, + NULL, }; -static const nir_search_variable replace14 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace25 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search15_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search26_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search15_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search26_1_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search15_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search26_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_ineg, - { &search15_1_0_0.value }, + { &search26_1_0_0.value }, + NULL, }; -static const nir_search_variable search15_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search26_1_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search15_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search26_1 = { { nir_search_value_expression, 0 }, false, nir_op_iadd, - { &search15_1_0.value, &search15_1_1.value }, + { &search26_1_0.value, &search26_1_1.value }, + NULL, }; -static const nir_search_expression search15 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search26 = { { nir_search_value_expression, 0 }, false, nir_op_iadd, - { &search15_0.value, &search15_1.value }, + { &search26_0.value, &search26_1.value }, + NULL, }; -static const nir_search_variable replace15 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace26 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search181_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search204_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search181_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search204_1_0 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_variable search181_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search204_1_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search181_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search204_1 = { { nir_search_value_expression, 0 }, false, nir_op_isub, - { &search181_1_0.value, &search181_1_1.value }, + { &search204_1_0.value, &search204_1_1.value }, + NULL, }; -static const nir_search_expression search181 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search204 = { { nir_search_value_expression, 0 }, false, nir_op_iadd, - { &search181_0.value, &search181_1.value }, + { &search204_0.value, &search204_1.value }, + NULL, }; -static const nir_search_variable replace181_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace204_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace181_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace204_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace181 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace204 = { { nir_search_value_expression, 0 }, false, nir_op_isub, - { &replace181_0.value, &replace181_1.value }, + { &replace204_0.value, &replace204_1.value }, + NULL, }; -static const nir_search_variable search189_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search212_0 = { { nir_search_value_variable, 0 }, 0, /* a */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search189_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search212_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search189_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search212_1_1 = { { nir_search_value_variable, 0 }, 2, /* c */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search189_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search212_1 = { { nir_search_value_expression, 0 }, false, nir_op_iadd, - { &search189_1_0.value, &search189_1_1.value }, + { &search212_1_0.value, &search212_1_1.value }, + NULL, }; -static const nir_search_expression search189 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search212 = { { nir_search_value_expression, 0 }, false, nir_op_iadd, - { &search189_0.value, &search189_1.value }, + { &search212_0.value, &search212_1.value }, + NULL, }; -static const nir_search_variable replace189_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace212_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace189_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace212_0_1 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace189_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace212_0 = { { nir_search_value_expression, 0 }, false, nir_op_iadd, - { &replace189_0_0.value, &replace189_0_1.value }, + { &replace212_0_0.value, &replace212_0_1.value }, + NULL, }; -static const nir_search_variable replace189_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace212_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace189 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace212 = { { nir_search_value_expression, 0 }, false, nir_op_iadd, - { &replace189_0.value, &replace189_1.value }, + { &replace212_0.value, &replace212_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_iadd_xforms[] = { - { &search7, &replace7.value, 0 }, - { &search11, &replace11.value, 0 }, - { &search13, &replace13.value, 0 }, - { &search14, &replace14.value, 0 }, - { &search15, &replace15.value, 0 }, - { &search181, &replace181.value, 0 }, - { &search189, &replace189.value, 0 }, + { &search18, &replace18.value, 0 }, + { &search22, &replace22.value, 0 }, + { &search24, &replace24.value, 0 }, + { &search25, &replace25.value, 0 }, + { &search26, &replace26.value, 0 }, + { &search204, &replace204.value, 0 }, + { &search212, &replace212.value, 0 }, }; -static const nir_search_variable search202_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search225_0 = { { nir_search_value_variable, 0 }, 0, /* v */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search202 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search225 = { { nir_search_value_expression, 0 }, false, nir_op_pack_unorm_2x16, - { &search202_0.value }, + { &search225_0.value }, + NULL, }; -static const nir_search_variable replace202_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace225_0_0_0_0_0 = { { nir_search_value_variable, 0 }, 0, /* v */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace202_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace225_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_fsat, - { &replace202_0_0_0_0_0.value }, + { &replace225_0_0_0_0_0.value }, + NULL, }; -static const nir_search_constant replace202_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace225_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x40efffe000000000 /* 65535.0 */ }, }; -static const nir_search_expression replace202_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace225_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace202_0_0_0_0.value, &replace202_0_0_0_1.value }, + { &replace225_0_0_0_0.value, &replace225_0_0_0_1.value }, + NULL, }; -static const nir_search_expression replace202_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace225_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_fround_even, - { &replace202_0_0_0.value }, + { &replace225_0_0_0.value }, + NULL, }; -static const nir_search_expression replace202_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace225_0 = { { nir_search_value_expression, 0 }, false, nir_op_f2u, - { &replace202_0_0.value }, + { &replace225_0_0.value }, + NULL, }; -static const nir_search_expression replace202 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace225 = { { nir_search_value_expression, 0 }, false, nir_op_pack_uvec2_to_uint, - { &replace202_0.value }, + { &replace225_0.value }, + NULL, }; static const struct transform nir_opt_algebraic_pack_unorm_2x16_xforms[] = { - { &search202, &replace202.value, 28 }, + { &search225, &replace225.value, 29 }, }; -static const nir_search_variable search203_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search226_0 = { { nir_search_value_variable, 0 }, 0, /* v */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search203 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search226 = { { nir_search_value_expression, 0 }, false, nir_op_pack_unorm_4x8, - { &search203_0.value }, + { &search226_0.value }, + NULL, }; -static const nir_search_variable replace203_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace226_0_0_0_0_0 = { { nir_search_value_variable, 0 }, 0, /* v */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace203_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace226_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_fsat, - { &replace203_0_0_0_0_0.value }, + { &replace226_0_0_0_0_0.value }, + NULL, }; -static const nir_search_constant replace203_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace226_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x406fe00000000000 /* 255.0 */ }, }; -static const nir_search_expression replace203_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace226_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace203_0_0_0_0.value, &replace203_0_0_0_1.value }, + { &replace226_0_0_0_0.value, &replace226_0_0_0_1.value }, + NULL, }; -static const nir_search_expression replace203_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace226_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_fround_even, - { &replace203_0_0_0.value }, + { &replace226_0_0_0.value }, + NULL, }; -static const nir_search_expression replace203_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace226_0 = { { nir_search_value_expression, 0 }, false, nir_op_f2u, - { &replace203_0_0.value }, + { &replace226_0_0.value }, + NULL, }; -static const nir_search_expression replace203 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace226 = { { nir_search_value_expression, 0 }, false, nir_op_pack_uvec4_to_uint, - { &replace203_0.value }, + { &replace226_0.value }, + NULL, }; static const struct transform nir_opt_algebraic_pack_unorm_4x8_xforms[] = { - { &search203, &replace203.value, 29 }, + { &search226, &replace226.value, 30 }, }; -static const nir_search_variable search205_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search228_0 = { { nir_search_value_variable, 0 }, 0, /* v */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search205 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search228 = { { nir_search_value_expression, 0 }, false, nir_op_pack_snorm_4x8, - { &search205_0.value }, + { &search228_0.value }, + NULL, }; -static const nir_search_constant replace205_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace228_0_0_0_0_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x3ff0000000000000 /* 1.0 */ }, }; -static const nir_search_constant replace205_0_0_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace228_0_0_0_0_1_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0xbff0000000000000L /* -1.0 */ }, }; -static const nir_search_variable replace205_0_0_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace228_0_0_0_0_1_1 = { { nir_search_value_variable, 0 }, 0, /* v */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace205_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace228_0_0_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_fmax, - { &replace205_0_0_0_0_1_0.value, &replace205_0_0_0_0_1_1.value }, + { &replace228_0_0_0_0_1_0.value, &replace228_0_0_0_0_1_1.value }, + NULL, }; -static const nir_search_expression replace205_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace228_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmin, - { &replace205_0_0_0_0_0.value, &replace205_0_0_0_0_1.value }, + { &replace228_0_0_0_0_0.value, &replace228_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant replace205_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace228_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x405fc00000000000 /* 127.0 */ }, }; -static const nir_search_expression replace205_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace228_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace205_0_0_0_0.value, &replace205_0_0_0_1.value }, + { &replace228_0_0_0_0.value, &replace228_0_0_0_1.value }, + NULL, }; -static const nir_search_expression replace205_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace228_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_fround_even, - { &replace205_0_0_0.value }, + { &replace228_0_0_0.value }, + NULL, }; -static const nir_search_expression replace205_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace228_0 = { { nir_search_value_expression, 0 }, false, nir_op_f2i, - { &replace205_0_0.value }, + { &replace228_0_0.value }, + NULL, }; -static const nir_search_expression replace205 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace228 = { { nir_search_value_expression, 0 }, false, nir_op_pack_uvec4_to_uint, - { &replace205_0.value }, + { &replace228_0.value }, + NULL, }; static const struct transform nir_opt_algebraic_pack_snorm_4x8_xforms[] = { - { &search205, &replace205.value, 31 }, + { &search228, &replace228.value, 32 }, }; -static const nir_search_variable search103_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search121_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search103_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search121_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_expression search103 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search121 = { { nir_search_value_expression, 0 }, false, nir_op_fand, - { &search103_0.value, &search103_1.value }, + { &search121_0.value, &search121_1.value }, + NULL, }; -static const nir_search_constant replace103 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace121 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; static const struct transform nir_opt_algebraic_fand_xforms[] = { - { &search103, &replace103.value, 0 }, + { &search121, &replace121.value, 0 }, }; -static const nir_search_variable search2_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search12_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search2_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search12_0 = { { nir_search_value_expression, 0 }, false, nir_op_fabs, - { &search2_0_0.value }, + { &search12_0_0.value }, + NULL, }; -static const nir_search_expression search2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search12 = { { nir_search_value_expression, 0 }, false, nir_op_fabs, - { &search2_0.value }, + { &search12_0.value }, + NULL, }; -static const nir_search_variable replace2_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace12_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace12 = { { nir_search_value_expression, 0 }, false, nir_op_fabs, - { &replace2_0.value }, + { &replace12_0.value }, + NULL, }; -static const nir_search_variable search3_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search13_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search3_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search13_0 = { { nir_search_value_expression, 0 }, false, nir_op_fneg, - { &search3_0_0.value }, + { &search13_0_0.value }, + NULL, }; -static const nir_search_expression search3 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search13 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fabs, + { &search13_0.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace13_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace13 = { { nir_search_value_expression, 0 }, false, nir_op_fabs, - { &search3_0.value }, + { &replace13_0.value }, + NULL, }; -static const nir_search_variable replace3_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search14_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search14_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_u2f, + { &search14_0_0.value }, + NULL, }; -static const nir_search_expression replace3 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search14 = { { nir_search_value_expression, 0 }, false, nir_op_fabs, - { &replace3_0.value }, + { &search14_0.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace14_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace14 = { + { nir_search_value_expression, 0 }, + false, + nir_op_u2f, + { &replace14_0.value }, + NULL, }; -static const nir_search_variable search81_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search98_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search81_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search98_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search81_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search98_0 = { { nir_search_value_expression, 0 }, false, nir_op_slt, - { &search81_0_0.value, &search81_0_1.value }, + { &search98_0_0.value, &search98_0_1.value }, + NULL, }; -static const nir_search_expression search81 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search98 = { { nir_search_value_expression, 0 }, false, nir_op_fabs, - { &search81_0.value }, + { &search98_0.value }, + NULL, }; -static const nir_search_variable replace81_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace98_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace81_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace98_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace81 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace98 = { { nir_search_value_expression, 0 }, false, nir_op_slt, - { &replace81_0.value, &replace81_1.value }, + { &replace98_0.value, &replace98_1.value }, + NULL, }; -static const nir_search_variable search82_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search99_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search82_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search99_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search82_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search99_0 = { { nir_search_value_expression, 0 }, false, nir_op_sge, - { &search82_0_0.value, &search82_0_1.value }, + { &search99_0_0.value, &search99_0_1.value }, + NULL, }; -static const nir_search_expression search82 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search99 = { { nir_search_value_expression, 0 }, false, nir_op_fabs, - { &search82_0.value }, + { &search99_0.value }, + NULL, }; -static const nir_search_variable replace82_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace99_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace82_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace99_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace82 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace99 = { { nir_search_value_expression, 0 }, false, nir_op_sge, - { &replace82_0.value, &replace82_1.value }, + { &replace99_0.value, &replace99_1.value }, + NULL, }; -static const nir_search_variable search83_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search100_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search83_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search100_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search83_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search100_0 = { { nir_search_value_expression, 0 }, false, nir_op_seq, - { &search83_0_0.value, &search83_0_1.value }, + { &search100_0_0.value, &search100_0_1.value }, + NULL, }; -static const nir_search_expression search83 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search100 = { { nir_search_value_expression, 0 }, false, nir_op_fabs, - { &search83_0.value }, + { &search100_0.value }, + NULL, }; -static const nir_search_variable replace83_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace100_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace83_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace100_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace83 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace100 = { { nir_search_value_expression, 0 }, false, nir_op_seq, - { &replace83_0.value, &replace83_1.value }, + { &replace100_0.value, &replace100_1.value }, + NULL, }; -static const nir_search_variable search84_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search101_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search84_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search101_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search84_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search101_0 = { { nir_search_value_expression, 0 }, false, nir_op_sne, - { &search84_0_0.value, &search84_0_1.value }, + { &search101_0_0.value, &search101_0_1.value }, + NULL, }; -static const nir_search_expression search84 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search101 = { { nir_search_value_expression, 0 }, false, nir_op_fabs, - { &search84_0.value }, + { &search101_0.value }, + NULL, }; -static const nir_search_variable replace84_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace101_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace84_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace101_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace84 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace101 = { { nir_search_value_expression, 0 }, false, nir_op_sne, - { &replace84_0.value, &replace84_1.value }, + { &replace101_0.value, &replace101_1.value }, + NULL, }; -static const nir_search_variable search164_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search187_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search164_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search187_0 = { { nir_search_value_expression, 0 }, false, nir_op_b2f, - { &search164_0_0.value }, + { &search187_0_0.value }, + NULL, }; -static const nir_search_expression search164 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search187 = { { nir_search_value_expression, 0 }, false, nir_op_fabs, - { &search164_0.value }, + { &search187_0.value }, + NULL, }; -static const nir_search_variable replace164_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace187_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace164 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace187 = { { nir_search_value_expression, 0 }, false, nir_op_b2f, - { &replace164_0.value }, + { &replace187_0.value }, + NULL, }; -static const nir_search_constant search182_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search205_0_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_variable search182_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search205_0_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search182_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search205_0 = { { nir_search_value_expression, 0 }, false, nir_op_fsub, - { &search182_0_0.value, &search182_0_1.value }, + { &search205_0_0.value, &search205_0_1.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search205 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fabs, + { &search205_0.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace205_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, }; -static const nir_search_expression search182 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace205 = { { nir_search_value_expression, 0 }, false, nir_op_fabs, - { &search182_0.value }, + { &replace205_0.value }, + NULL, +}; + +static const struct transform nir_opt_algebraic_fabs_xforms[] = { + { &search12, &replace12.value, 0 }, + { &search13, &replace13.value, 0 }, + { &search14, &replace14.value, 0 }, + { &search98, &replace98.value, 0 }, + { &search99, &replace99.value, 0 }, + { &search100, &replace100.value, 0 }, + { &search101, &replace101.value, 0 }, + { &search187, &replace187.value, 0 }, + { &search205, &replace205.value, 0 }, }; -static const nir_search_variable replace182_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search5_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace182 = { + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search5_1 = { + { nir_search_value_constant, 0 }, + nir_type_int, { 0x1 /* 1 */ }, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search5 = { { nir_search_value_expression, 0 }, false, - nir_op_fabs, - { &replace182_0.value }, + nir_op_imod, + { &search5_0.value, &search5_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace5 = { + { nir_search_value_constant, 0 }, + nir_type_int, { 0x0 /* 0 */ }, }; -static const struct transform nir_opt_algebraic_fabs_xforms[] = { - { &search2, &replace2.value, 0 }, - { &search3, &replace3.value, 0 }, - { &search81, &replace81.value, 0 }, - { &search82, &replace82.value, 0 }, - { &search83, &replace83.value, 0 }, - { &search84, &replace84.value, 0 }, - { &search164, &replace164.value, 0 }, - { &search182, &replace182.value, 0 }, +static const struct transform nir_opt_algebraic_imod_xforms[] = { + { &search5, &replace5.value, 0 }, }; -static const nir_search_variable search99_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search117_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search99_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search117_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search99 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search117 = { { nir_search_value_expression, 0 }, false, nir_op_ieq, - { &search99_0.value, &search99_1.value }, + { &search117_0.value, &search117_1.value }, + NULL, }; -static const nir_search_constant replace99 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace117 = { { nir_search_value_constant, 32 }, nir_type_bool32, { NIR_TRUE /* True */ }, }; -static const nir_search_variable search148_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search167_0 = { { nir_search_value_variable, 32 }, 0, /* a */ false, nir_type_bool32, + NULL, }; -static const nir_search_constant search148_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search167_1 = { { nir_search_value_constant, 32 }, nir_type_bool32, { NIR_TRUE /* True */ }, }; -static const nir_search_expression search148 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search167 = { { nir_search_value_expression, 0 }, false, nir_op_ieq, - { &search148_0.value, &search148_1.value }, + { &search167_0.value, &search167_1.value }, + NULL, }; -static const nir_search_variable replace148 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace167 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search151_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search170_0 = { { nir_search_value_variable, 32 }, 0, /* a */ false, nir_type_bool32, + NULL, }; -static const nir_search_constant search151_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search170_1 = { { nir_search_value_constant, 32 }, nir_type_bool32, { NIR_FALSE /* False */ }, }; -static const nir_search_expression search151 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search170 = { { nir_search_value_expression, 0 }, false, nir_op_ieq, - { &search151_0.value, &search151_1.value }, + { &search170_0.value, &search170_1.value }, + (is_not_used_by_if), }; -static const nir_search_variable replace151_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace170_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace151 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace170 = { { nir_search_value_expression, 0 }, false, nir_op_inot, - { &replace151_0.value }, + { &replace170_0.value }, + NULL, }; -static const nir_search_variable search225_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search254_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search225_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search254_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search225_0_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search254_0_2 = { { nir_search_value_variable, 0 }, 2, /* c */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search225_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search254_0 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search225_0_0.value, &search225_0_1.value, &search225_0_2.value }, + { &search254_0_0.value, &search254_0_1.value, &search254_0_2.value }, + NULL, }; -static const nir_search_variable search225_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search254_1 = { { nir_search_value_variable, 0 }, 3, /* d */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search225 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search254 = { { nir_search_value_expression, 0 }, false, nir_op_ieq, - { &search225_0.value, &search225_1.value }, + { &search254_0.value, &search254_1.value }, + NULL, }; -static const nir_search_variable replace225_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace254_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace225_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace254_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace225_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace254_1_1 = { { nir_search_value_variable, 0 }, 3, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace225_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace254_1 = { { nir_search_value_expression, 0 }, false, nir_op_ieq, - { &replace225_1_0.value, &replace225_1_1.value }, + { &replace254_1_0.value, &replace254_1_1.value }, + NULL, }; -static const nir_search_variable replace225_2_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace254_2_0 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace225_2_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace254_2_1 = { { nir_search_value_variable, 0 }, 3, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace225_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace254_2 = { { nir_search_value_expression, 0 }, false, nir_op_ieq, - { &replace225_2_0.value, &replace225_2_1.value }, + { &replace254_2_0.value, &replace254_2_1.value }, + NULL, }; -static const nir_search_expression replace225 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace254 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &replace225_0.value, &replace225_1.value, &replace225_2.value }, + { &replace254_0.value, &replace254_1.value, &replace254_2.value }, + NULL, }; -static const nir_search_variable search226_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search255_0 = { { nir_search_value_variable, 0 }, 0, /* d */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search226_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search255_1_0 = { { nir_search_value_variable, 0 }, 1, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search226_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search255_1_1 = { { nir_search_value_variable, 0 }, 2, /* b */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search226_1_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search255_1_2 = { { nir_search_value_variable, 0 }, 3, /* c */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search226_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search255_1 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search226_1_0.value, &search226_1_1.value, &search226_1_2.value }, + { &search255_1_0.value, &search255_1_1.value, &search255_1_2.value }, + NULL, }; -static const nir_search_expression search226 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search255 = { { nir_search_value_expression, 0 }, false, nir_op_ieq, - { &search226_0.value, &search226_1.value }, + { &search255_0.value, &search255_1.value }, + NULL, }; -static const nir_search_variable replace226_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace255_0 = { { nir_search_value_variable, 0 }, 1, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace226_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace255_1_0 = { { nir_search_value_variable, 0 }, 0, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace226_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace255_1_1 = { { nir_search_value_variable, 0 }, 2, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace226_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace255_1 = { { nir_search_value_expression, 0 }, false, nir_op_ieq, - { &replace226_1_0.value, &replace226_1_1.value }, + { &replace255_1_0.value, &replace255_1_1.value }, + NULL, }; -static const nir_search_variable replace226_2_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace255_2_0 = { { nir_search_value_variable, 0 }, 0, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace226_2_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace255_2_1 = { { nir_search_value_variable, 0 }, 3, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace226_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace255_2 = { { nir_search_value_expression, 0 }, false, nir_op_ieq, - { &replace226_2_0.value, &replace226_2_1.value }, + { &replace255_2_0.value, &replace255_2_1.value }, + NULL, }; -static const nir_search_expression replace226 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace255 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &replace226_0.value, &replace226_1.value, &replace226_2.value }, + { &replace255_0.value, &replace255_1.value, &replace255_2.value }, + NULL, }; static const struct transform nir_opt_algebraic_ieq_xforms[] = { - { &search99, &replace99.value, 0 }, - { &search148, &replace148.value, 0 }, - { &search151, &replace151.value, 0 }, - { &search225, &replace225.value, 0 }, - { &search226, &replace226.value, 0 }, + { &search117, &replace117.value, 0 }, + { &search167, &replace167.value, 0 }, + { &search170, &replace170.value, 0 }, + { &search254, &replace254.value, 0 }, + { &search255, &replace255.value, 0 }, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search80_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search80_1 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search80 = { + { nir_search_value_expression, 0 }, + false, + nir_op_imin, + { &search80_0.value, &search80_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace80 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search89_0_0_0_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search89_0_0_0_1 = { + { nir_search_value_variable, 0 }, + 1, /* b */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search89_0_0_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_imax, + { &search89_0_0_0_0.value, &search89_0_0_0_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search89_0_0_1 = { + { nir_search_value_variable, 0 }, + 2, /* c */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search89_0_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_imin, + { &search89_0_0_0.value, &search89_0_0_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search89_0_1 = { + { nir_search_value_variable, 0 }, + 1, /* b */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search89_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_imax, + { &search89_0_0.value, &search89_0_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search89_1 = { + { nir_search_value_variable, 0 }, + 2, /* c */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search89 = { + { nir_search_value_expression, 0 }, + false, + nir_op_imin, + { &search89_0.value, &search89_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace89_0_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace89_0_1 = { + { nir_search_value_variable, 0 }, + 1, /* b */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace89_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_imax, + { &replace89_0_0.value, &replace89_0_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace89_1 = { + { nir_search_value_variable, 0 }, + 2, /* c */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace89 = { + { nir_search_value_expression, 0 }, + false, + nir_op_imin, + { &replace89_0.value, &replace89_1.value }, + NULL, +}; + +static const struct transform nir_opt_algebraic_imin_xforms[] = { + { &search80, &replace80.value, 0 }, + { &search89, &replace89.value, 0 }, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search155_0_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search155_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fexp2, + { &search155_0_0.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search155 = { + { nir_search_value_expression, 0 }, + true, + nir_op_frsq, + { &search155_0.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace155_0_0 = { + { nir_search_value_constant, 0 }, + nir_type_float, { 0xbfe0000000000000L /* -0.5 */ }, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace155_0_1 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace155_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fmul, + { &replace155_0_0.value, &replace155_0_1.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace155 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fexp2, + { &replace155_0.value }, + NULL, +}; + +static const struct transform nir_opt_algebraic_frsq_xforms[] = { + { &search155, &replace155.value, 0 }, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search19_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search19_1 = { + { nir_search_value_constant, 0 }, + nir_type_int, { 0x0 /* 0 */ }, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search19 = { + { nir_search_value_expression, 0 }, + false, + nir_op_usadd_4x8, + { &search19_0.value, &search19_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace19 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search20_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search20_1 = { + { nir_search_value_constant, 0 }, + nir_type_int, { -0x1 /* -1 */ }, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search20 = { + { nir_search_value_expression, 0 }, + false, + nir_op_usadd_4x8, + { &search20_0.value, &search20_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace20 = { + { nir_search_value_constant, 0 }, + nir_type_int, { -0x1 /* -1 */ }, +}; + +static const struct transform nir_opt_algebraic_usadd_4x8_xforms[] = { + { &search19, &replace19.value, 0 }, + { &search20, &replace20.value, 0 }, }; -static const nir_search_variable search65_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search3_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search65_1 = { - { nir_search_value_variable, 0 }, - 0, /* a */ - false, - nir_type_invalid, +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search3_1 = { + { nir_search_value_constant, 0 }, + nir_type_int, { 0x1 /* 1 */ }, }; -static const nir_search_expression search65 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search3 = { { nir_search_value_expression, 0 }, false, - nir_op_imin, - { &search65_0.value, &search65_1.value }, + nir_op_idiv, + { &search3_0.value, &search3_1.value }, + NULL, }; -static const nir_search_variable replace65 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace3 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search74_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search7_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search74_0_0_0_1 = { - { nir_search_value_variable, 0 }, +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search7_1 = { + { nir_search_value_variable, 32 }, 1, /* b */ - false, + true, nir_type_invalid, + (is_pos_power_of_two), }; -static const nir_search_expression search74_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search7 = { { nir_search_value_expression, 0 }, false, - nir_op_imax, - { &search74_0_0_0_0.value, &search74_0_0_0_1.value }, + nir_op_idiv, + { &search7_0.value, &search7_1.value }, + NULL, }; - -static const nir_search_variable search74_0_0_1 = { + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace7_0_0 = { { nir_search_value_variable, 0 }, - 2, /* c */ + 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search74_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace7_0 = { { nir_search_value_expression, 0 }, false, - nir_op_imin, - { &search74_0_0_0.value, &search74_0_0_1.value }, + nir_op_isign, + { &replace7_0_0.value }, + NULL, }; -static const nir_search_variable search74_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace7_1_0_0 = { { nir_search_value_variable, 0 }, - 1, /* b */ + 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search74_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace7_1_0 = { { nir_search_value_expression, 0 }, false, - nir_op_imax, - { &search74_0_0.value, &search74_0_1.value }, + nir_op_iabs, + { &replace7_1_0_0.value }, + NULL, }; -static const nir_search_variable search74_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace7_1_1_0 = { { nir_search_value_variable, 0 }, - 2, /* c */ + 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search74 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace7_1_1 = { { nir_search_value_expression, 0 }, false, - nir_op_imin, - { &search74_0.value, &search74_1.value }, + nir_op_find_lsb, + { &replace7_1_1_0.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace7_1 = { + { nir_search_value_expression, 0 }, + false, + nir_op_ushr, + { &replace7_1_0.value, &replace7_1_1.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace7 = { + { nir_search_value_expression, 0 }, + false, + nir_op_imul, + { &replace7_0.value, &replace7_1.value }, + NULL, }; -static const nir_search_variable replace74_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search8_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace74_0_1 = { - { nir_search_value_variable, 0 }, +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search8_1 = { + { nir_search_value_variable, 32 }, 1, /* b */ - false, - nir_type_invalid, -}; -static const nir_search_expression replace74_0 = { - { nir_search_value_expression, 0 }, - false, - nir_op_imax, - { &replace74_0_0.value, &replace74_0_1.value }, -}; - -static const nir_search_variable replace74_1 = { - { nir_search_value_variable, 0 }, - 2, /* c */ - false, + true, nir_type_invalid, + (is_neg_power_of_two), }; -static const nir_search_expression replace74 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search8 = { { nir_search_value_expression, 0 }, false, - nir_op_imin, - { &replace74_0.value, &replace74_1.value }, -}; - -static const struct transform nir_opt_algebraic_imin_xforms[] = { - { &search65, &replace65.value, 0 }, - { &search74, &replace74.value, 0 }, + nir_op_idiv, + { &search8_0.value, &search8_1.value }, + NULL, }; -static const nir_search_variable search136_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace8_0_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search136_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace8_0_0 = { { nir_search_value_expression, 0 }, false, - nir_op_fexp2, - { &search136_0_0.value }, -}; -static const nir_search_expression search136 = { - { nir_search_value_expression, 0 }, - true, - nir_op_frsq, - { &search136_0.value }, -}; - -static const nir_search_constant replace136_0_0 = { - { nir_search_value_constant, 0 }, - nir_type_float, { 0xbfe0000000000000L /* -0.5 */ }, + nir_op_isign, + { &replace8_0_0_0.value }, + NULL, }; -static const nir_search_variable replace136_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace8_0_1_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace136_0 = { - { nir_search_value_expression, 0 }, - false, - nir_op_fmul, - { &replace136_0_0.value, &replace136_0_1.value }, -}; -static const nir_search_expression replace136 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace8_0_1_0 = { { nir_search_value_expression, 0 }, false, - nir_op_fexp2, - { &replace136_0.value }, + nir_op_iabs, + { &replace8_0_1_0_0.value }, + NULL, }; -static const struct transform nir_opt_algebraic_frsq_xforms[] = { - { &search136, &replace136.value, 0 }, -}; - -static const nir_search_variable search1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace8_0_1_1_0_0 = { { nir_search_value_variable, 0 }, - 0, /* a */ + 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace8_0_1_1_0 = { { nir_search_value_expression, 0 }, false, - nir_op_ineg, - { &search1_0_0.value }, + nir_op_iabs, + { &replace8_0_1_1_0_0.value }, + NULL, }; -static const nir_search_expression search1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace8_0_1_1 = { { nir_search_value_expression, 0 }, false, - nir_op_ineg, - { &search1_0.value }, -}; - -static const nir_search_variable replace1 = { - { nir_search_value_variable, 0 }, - 0, /* a */ - false, - nir_type_invalid, -}; - -static const nir_search_variable search179_0 = { - { nir_search_value_variable, 0 }, - 0, /* a */ - false, - nir_type_invalid, + nir_op_find_lsb, + { &replace8_0_1_1_0.value }, + NULL, }; -static const nir_search_expression search179 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace8_0_1 = { { nir_search_value_expression, 0 }, false, - nir_op_ineg, - { &search179_0.value }, -}; - -static const nir_search_constant replace179_0 = { - { nir_search_value_constant, 0 }, - nir_type_int, { 0x0 /* 0 */ }, + nir_op_ushr, + { &replace8_0_1_0.value, &replace8_0_1_1.value }, + NULL, }; - -static const nir_search_variable replace179_1 = { - { nir_search_value_variable, 0 }, - 0, /* a */ +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace8_0 = { + { nir_search_value_expression, 0 }, false, - nir_type_invalid, + nir_op_imul, + { &replace8_0_0.value, &replace8_0_1.value }, + NULL, }; -static const nir_search_expression replace179 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace8 = { { nir_search_value_expression, 0 }, false, - nir_op_isub, - { &replace179_0.value, &replace179_1.value }, + nir_op_ineg, + { &replace8_0.value }, + NULL, }; -static const struct transform nir_opt_algebraic_ineg_xforms[] = { - { &search1, &replace1.value, 0 }, - { &search179, &replace179.value, 19 }, +static const struct transform nir_opt_algebraic_idiv_xforms[] = { + { &search3, &replace3.value, 0 }, + { &search7, &replace7.value, 1 }, + { &search8, &replace8.value, 1 }, }; -static const nir_search_variable search76_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search93_0_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search76_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search93_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_expression search76_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search93_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_imax, - { &search76_0_0_0.value, &search76_0_0_1.value }, + { &search93_0_0_0.value, &search93_0_0_1.value }, + NULL, }; -static const nir_search_constant search76_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search93_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xff /* 255 */ }, }; -static const nir_search_expression search76_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search93_0 = { { nir_search_value_expression, 0 }, false, nir_op_imin, - { &search76_0_0.value, &search76_0_1.value }, + { &search93_0_0.value, &search93_0_1.value }, + NULL, }; -static const nir_search_constant search76_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search93_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_expression search76 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search93 = { { nir_search_value_expression, 0 }, false, nir_op_extract_u8, - { &search76_0.value, &search76_1.value }, + { &search93_0.value, &search93_1.value }, + NULL, }; -static const nir_search_variable replace76_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace93_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace76_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace93_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_expression replace76_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace93_0 = { { nir_search_value_expression, 0 }, false, nir_op_imax, - { &replace76_0_0.value, &replace76_0_1.value }, + { &replace93_0_0.value, &replace93_0_1.value }, + NULL, }; -static const nir_search_constant replace76_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace93_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xff /* 255 */ }, }; -static const nir_search_expression replace76 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace93 = { { nir_search_value_expression, 0 }, false, nir_op_imin, - { &replace76_0.value, &replace76_1.value }, + { &replace93_0.value, &replace93_1.value }, + NULL, }; -static const nir_search_variable search199_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search222_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search199_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search222_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search199 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search222 = { { nir_search_value_expression, 0 }, false, nir_op_extract_u8, - { &search199_0.value, &search199_1.value }, + { &search222_0.value, &search222_1.value }, + NULL, }; -static const nir_search_variable replace199_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace222_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace199_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace222_0_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace199_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace222_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x8 /* 8 */ }, }; -static const nir_search_expression replace199_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace222_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_imul, - { &replace199_0_1_0.value, &replace199_0_1_1.value }, + { &replace222_0_1_0.value, &replace222_0_1_1.value }, + NULL, }; -static const nir_search_expression replace199_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace222_0 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &replace199_0_0.value, &replace199_0_1.value }, + { &replace222_0_0.value, &replace222_0_1.value }, + NULL, }; -static const nir_search_constant replace199_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace222_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xff /* 255 */ }, }; -static const nir_search_expression replace199 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace222 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &replace199_0.value, &replace199_1.value }, + { &replace222_0.value, &replace222_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_extract_u8_xforms[] = { - { &search76, &replace76.value, 0 }, - { &search199, &replace199.value, 26 }, + { &search93, &replace93.value, 0 }, + { &search222, &replace222.value, 27 }, }; -static const nir_search_variable search204_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search227_0 = { { nir_search_value_variable, 0 }, 0, /* v */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search204 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search227 = { { nir_search_value_expression, 0 }, false, nir_op_pack_snorm_2x16, - { &search204_0.value }, + { &search227_0.value }, + NULL, }; -static const nir_search_constant replace204_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace227_0_0_0_0_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x3ff0000000000000 /* 1.0 */ }, }; -static const nir_search_constant replace204_0_0_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace227_0_0_0_0_1_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0xbff0000000000000L /* -1.0 */ }, }; -static const nir_search_variable replace204_0_0_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace227_0_0_0_0_1_1 = { { nir_search_value_variable, 0 }, 0, /* v */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace204_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace227_0_0_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_fmax, - { &replace204_0_0_0_0_1_0.value, &replace204_0_0_0_0_1_1.value }, + { &replace227_0_0_0_0_1_0.value, &replace227_0_0_0_0_1_1.value }, + NULL, }; -static const nir_search_expression replace204_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace227_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmin, - { &replace204_0_0_0_0_0.value, &replace204_0_0_0_0_1.value }, + { &replace227_0_0_0_0_0.value, &replace227_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant replace204_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace227_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x40dfffc000000000 /* 32767.0 */ }, }; -static const nir_search_expression replace204_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace227_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace204_0_0_0_0.value, &replace204_0_0_0_1.value }, + { &replace227_0_0_0_0.value, &replace227_0_0_0_1.value }, + NULL, }; -static const nir_search_expression replace204_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace227_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_fround_even, - { &replace204_0_0_0.value }, + { &replace227_0_0_0.value }, + NULL, }; -static const nir_search_expression replace204_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace227_0 = { { nir_search_value_expression, 0 }, false, nir_op_f2i, - { &replace204_0_0.value }, + { &replace227_0_0.value }, + NULL, }; -static const nir_search_expression replace204 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace227 = { { nir_search_value_expression, 0 }, false, nir_op_pack_uvec2_to_uint, - { &replace204_0.value }, + { &replace227_0.value }, + NULL, }; static const struct transform nir_opt_algebraic_pack_snorm_2x16_xforms[] = { - { &search204, &replace204.value, 30 }, + { &search227, &replace227.value, 31 }, }; -static const nir_search_variable search125_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search144_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search125_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search144_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search125 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search144 = { { nir_search_value_expression, 0 }, false, nir_op_fpow, - { &search125_0.value, &search125_1.value }, + { &search144_0.value, &search144_1.value }, + NULL, }; -static const nir_search_variable replace125_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace144_0_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace125_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace144_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_flog2, - { &replace125_0_0_0.value }, + { &replace144_0_0_0.value }, + NULL, }; -static const nir_search_variable replace125_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace144_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace125_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace144_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace125_0_0.value, &replace125_0_1.value }, + { &replace144_0_0.value, &replace144_0_1.value }, + NULL, }; -static const nir_search_expression replace125 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace144 = { { nir_search_value_expression, 0 }, false, nir_op_fexp2, - { &replace125_0.value }, + { &replace144_0.value }, + NULL, }; -static const nir_search_variable search128_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search147_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search128_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search147_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x3ff0000000000000 /* 1.0 */ }, }; -static const nir_search_expression search128 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search147 = { { nir_search_value_expression, 0 }, true, nir_op_fpow, - { &search128_0.value, &search128_1.value }, + { &search147_0.value, &search147_1.value }, + NULL, }; -static const nir_search_variable replace128 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace147 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search129_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search148_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search129_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search148_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x4000000000000000 /* 2.0 */ }, }; -static const nir_search_expression search129 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search148 = { { nir_search_value_expression, 0 }, true, nir_op_fpow, - { &search129_0.value, &search129_1.value }, + { &search148_0.value, &search148_1.value }, + NULL, }; -static const nir_search_variable replace129_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace148_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace129_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace148_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace129 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace148 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace129_0.value, &replace129_1.value }, + { &replace148_0.value, &replace148_1.value }, + NULL, }; -static const nir_search_variable search130_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search149_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search130_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search149_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x4010000000000000 /* 4.0 */ }, }; -static const nir_search_expression search130 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search149 = { { nir_search_value_expression, 0 }, true, nir_op_fpow, - { &search130_0.value, &search130_1.value }, + { &search149_0.value, &search149_1.value }, + NULL, }; -static const nir_search_variable replace130_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace149_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace130_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace149_0_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace130_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace149_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace130_0_0.value, &replace130_0_1.value }, + { &replace149_0_0.value, &replace149_0_1.value }, + NULL, }; -static const nir_search_variable replace130_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace149_1_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace130_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace149_1_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace130_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace149_1 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace130_1_0.value, &replace130_1_1.value }, + { &replace149_1_0.value, &replace149_1_1.value }, + NULL, }; -static const nir_search_expression replace130 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace149 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace130_0.value, &replace130_1.value }, + { &replace149_0.value, &replace149_1.value }, + NULL, }; -static const nir_search_constant search131_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search150_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x4000000000000000 /* 2.0 */ }, }; -static const nir_search_variable search131_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search150_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search131 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search150 = { { nir_search_value_expression, 0 }, true, nir_op_fpow, - { &search131_0.value, &search131_1.value }, + { &search150_0.value, &search150_1.value }, + NULL, }; -static const nir_search_variable replace131_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace150_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace131 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace150 = { { nir_search_value_expression, 0 }, false, nir_op_fexp2, - { &replace131_0.value }, + { &replace150_0.value }, + NULL, }; -static const nir_search_variable search132_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search151_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search132_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search151_0_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x400199999999999a /* 2.2 */ }, }; -static const nir_search_expression search132_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search151_0 = { { nir_search_value_expression, 0 }, false, nir_op_fpow, - { &search132_0_0.value, &search132_0_1.value }, + { &search151_0_0.value, &search151_0_1.value }, + NULL, }; -static const nir_search_constant search132_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search151_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x3fdd1743e963dc48 /* 0.454545 */ }, }; -static const nir_search_expression search132 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search151 = { { nir_search_value_expression, 0 }, true, nir_op_fpow, - { &search132_0.value, &search132_1.value }, + { &search151_0.value, &search151_1.value }, + NULL, }; -static const nir_search_variable replace132 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace151 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search133_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search152_0_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search133_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search152_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x400199999999999a /* 2.2 */ }, }; -static const nir_search_expression search133_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search152_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_fpow, - { &search133_0_0_0.value, &search133_0_0_1.value }, + { &search152_0_0_0.value, &search152_0_0_1.value }, + NULL, }; -static const nir_search_expression search133_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search152_0 = { { nir_search_value_expression, 0 }, false, nir_op_fabs, - { &search133_0_0.value }, + { &search152_0_0.value }, + NULL, }; -static const nir_search_constant search133_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search152_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x3fdd1743e963dc48 /* 0.454545 */ }, }; -static const nir_search_expression search133 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search152 = { { nir_search_value_expression, 0 }, true, nir_op_fpow, - { &search133_0.value, &search133_1.value }, + { &search152_0.value, &search152_1.value }, + NULL, }; -static const nir_search_variable replace133_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace152_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace133 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace152 = { { nir_search_value_expression, 0 }, false, nir_op_fabs, - { &replace133_0.value }, + { &replace152_0.value }, + NULL, }; static const struct transform nir_opt_algebraic_fpow_xforms[] = { - { &search125, &replace125.value, 11 }, - { &search128, &replace128.value, 0 }, - { &search129, &replace129.value, 0 }, - { &search130, &replace130.value, 0 }, - { &search131, &replace131.value, 0 }, - { &search132, &replace132.value, 0 }, - { &search133, &replace133.value, 0 }, + { &search144, &replace144.value, 12 }, + { &search147, &replace147.value, 0 }, + { &search148, &replace148.value, 0 }, + { &search149, &replace149.value, 0 }, + { &search150, &replace150.value, 0 }, + { &search151, &replace151.value, 0 }, + { &search152, &replace152.value, 0 }, }; -static const nir_search_variable search98_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search116_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search98_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search116_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search98 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search116 = { { nir_search_value_expression, 0 }, false, nir_op_ige, - { &search98_0.value, &search98_1.value }, + { &search116_0.value, &search116_1.value }, + NULL, }; -static const nir_search_constant replace98 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace116 = { { nir_search_value_constant, 32 }, nir_type_bool32, { NIR_TRUE /* True */ }, }; -static const nir_search_variable search223_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search252_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search223_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search252_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search223_0_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search252_0_2 = { { nir_search_value_variable, 0 }, 2, /* c */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search223_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search252_0 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search223_0_0.value, &search223_0_1.value, &search223_0_2.value }, + { &search252_0_0.value, &search252_0_1.value, &search252_0_2.value }, + NULL, }; -static const nir_search_variable search223_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search252_1 = { { nir_search_value_variable, 0 }, 3, /* d */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search223 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search252 = { { nir_search_value_expression, 0 }, false, nir_op_ige, - { &search223_0.value, &search223_1.value }, + { &search252_0.value, &search252_1.value }, + NULL, }; -static const nir_search_variable replace223_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace252_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace223_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace252_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace223_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace252_1_1 = { { nir_search_value_variable, 0 }, 3, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace223_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace252_1 = { { nir_search_value_expression, 0 }, false, nir_op_ige, - { &replace223_1_0.value, &replace223_1_1.value }, + { &replace252_1_0.value, &replace252_1_1.value }, + NULL, }; -static const nir_search_variable replace223_2_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace252_2_0 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace223_2_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace252_2_1 = { { nir_search_value_variable, 0 }, 3, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace223_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace252_2 = { { nir_search_value_expression, 0 }, false, nir_op_ige, - { &replace223_2_0.value, &replace223_2_1.value }, + { &replace252_2_0.value, &replace252_2_1.value }, + NULL, }; -static const nir_search_expression replace223 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace252 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &replace223_0.value, &replace223_1.value, &replace223_2.value }, + { &replace252_0.value, &replace252_1.value, &replace252_2.value }, + NULL, }; -static const nir_search_variable search224_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search253_0 = { { nir_search_value_variable, 0 }, 0, /* d */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search224_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search253_1_0 = { { nir_search_value_variable, 0 }, 1, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search224_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search253_1_1 = { { nir_search_value_variable, 0 }, 2, /* b */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search224_1_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search253_1_2 = { { nir_search_value_variable, 0 }, 3, /* c */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search224_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search253_1 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search224_1_0.value, &search224_1_1.value, &search224_1_2.value }, + { &search253_1_0.value, &search253_1_1.value, &search253_1_2.value }, + NULL, }; -static const nir_search_expression search224 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search253 = { { nir_search_value_expression, 0 }, false, nir_op_ige, - { &search224_0.value, &search224_1.value }, + { &search253_0.value, &search253_1.value }, + NULL, }; -static const nir_search_variable replace224_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace253_0 = { { nir_search_value_variable, 0 }, 1, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace224_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace253_1_0 = { { nir_search_value_variable, 0 }, 0, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace224_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace253_1_1 = { { nir_search_value_variable, 0 }, 2, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace224_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace253_1 = { { nir_search_value_expression, 0 }, false, nir_op_ige, - { &replace224_1_0.value, &replace224_1_1.value }, + { &replace253_1_0.value, &replace253_1_1.value }, + NULL, }; -static const nir_search_variable replace224_2_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace253_2_0 = { { nir_search_value_variable, 0 }, 0, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace224_2_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace253_2_1 = { { nir_search_value_variable, 0 }, 3, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace224_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace253_2 = { { nir_search_value_expression, 0 }, false, nir_op_ige, - { &replace224_2_0.value, &replace224_2_1.value }, + { &replace253_2_0.value, &replace253_2_1.value }, + NULL, }; -static const nir_search_expression replace224 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace253 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &replace224_0.value, &replace224_1.value, &replace224_2.value }, + { &replace253_0.value, &replace253_1.value, &replace253_2.value }, + NULL, }; static const struct transform nir_opt_algebraic_ige_xforms[] = { - { &search98, &replace98.value, 0 }, - { &search223, &replace223.value, 0 }, - { &search224, &replace224.value, 0 }, + { &search116, &replace116.value, 0 }, + { &search252, &replace252.value, 0 }, + { &search253, &replace253.value, 0 }, }; -static const nir_search_constant search142_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search161_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x3ff0000000000000 /* 1.0 */ }, }; -static const nir_search_variable search142_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search161_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search142 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search161 = { { nir_search_value_expression, 0 }, true, nir_op_fdiv, - { &search142_0.value, &search142_1.value }, + { &search161_0.value, &search161_1.value }, + NULL, }; -static const nir_search_variable replace142_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace161_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace142 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace161 = { { nir_search_value_expression, 0 }, false, nir_op_frcp, - { &replace142_0.value }, + { &replace161_0.value }, + NULL, }; -static const nir_search_variable search143_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search162_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search143_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search162_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search143 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search162 = { { nir_search_value_expression, 0 }, false, nir_op_fdiv, - { &search143_0.value, &search143_1.value }, + { &search162_0.value, &search162_1.value }, + NULL, }; -static const nir_search_variable replace143_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace162_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace143_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace162_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace143_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace162_1 = { { nir_search_value_expression, 0 }, false, nir_op_frcp, - { &replace143_1_0.value }, + { &replace162_1_0.value }, + NULL, }; -static const nir_search_expression replace143 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace162 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace143_0.value, &replace143_1.value }, + { &replace162_0.value, &replace162_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_fdiv_xforms[] = { - { &search142, &replace142.value, 0 }, - { &search143, &replace143.value, 13 }, + { &search161, &replace161.value, 0 }, + { &search162, &replace162.value, 14 }, }; -static const nir_search_variable search38_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search50_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search38 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search50 = { { nir_search_value_expression, 0 }, false, nir_op_ffract, - { &search38_0.value }, + { &search50_0.value }, + NULL, }; -static const nir_search_variable replace38_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace50_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace38_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace50_1_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace38_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace50_1 = { { nir_search_value_expression, 0 }, false, nir_op_ffloor, - { &replace38_1_0.value }, + { &replace50_1_0.value }, + NULL, }; -static const nir_search_expression replace38 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace50 = { { nir_search_value_expression, 0 }, false, nir_op_fsub, - { &replace38_0.value, &replace38_1.value }, + { &replace50_0.value, &replace50_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_ffract_xforms[] = { - { &search38, &replace38.value, 3 }, + { &search50, &replace50.value, 4 }, }; -static const nir_search_variable search6_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search17_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search6_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search17_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_expression search6 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search17 = { { nir_search_value_expression, 0 }, true, nir_op_fadd, - { &search6_0.value, &search6_1.value }, + { &search17_0.value, &search17_1.value }, + NULL, }; -static const nir_search_variable replace6 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace17 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search10_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search21_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search10_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search21_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search10_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search21_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &search10_0_0.value, &search10_0_1.value }, + { &search21_0_0.value, &search21_0_1.value }, + NULL, }; -static const nir_search_variable search10_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search21_1_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search10_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search21_1_1 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search10_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search21_1 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &search10_1_0.value, &search10_1_1.value }, + { &search21_1_0.value, &search21_1_1.value }, + NULL, }; -static const nir_search_expression search10 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search21 = { { nir_search_value_expression, 0 }, true, nir_op_fadd, - { &search10_0.value, &search10_1.value }, + { &search21_0.value, &search21_1.value }, + NULL, }; -static const nir_search_variable replace10_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace21_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace10_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace21_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace10_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace21_1_1 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace10_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace21_1 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, - { &replace10_1_0.value, &replace10_1_1.value }, + { &replace21_1_0.value, &replace21_1_1.value }, + NULL, }; -static const nir_search_expression replace10 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace21 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace10_0.value, &replace10_1.value }, + { &replace21_0.value, &replace21_1.value }, + NULL, }; -static const nir_search_variable search12_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search23_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search12_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search23_0 = { { nir_search_value_expression, 0 }, false, nir_op_fneg, - { &search12_0_0.value }, + { &search23_0_0.value }, + NULL, }; -static const nir_search_variable search12_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search23_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search12 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search23 = { { nir_search_value_expression, 0 }, true, nir_op_fadd, - { &search12_0.value, &search12_1.value }, + { &search23_0.value, &search23_1.value }, + NULL, }; -static const nir_search_constant replace12 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace23 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_variable search16_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search27_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search16_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search27_0 = { { nir_search_value_expression, 0 }, false, nir_op_fneg, - { &search16_0_0.value }, + { &search27_0_0.value }, + NULL, }; -static const nir_search_variable search16_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search27_1_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search16_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search27_1_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search16_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search27_1 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, - { &search16_1_0.value, &search16_1_1.value }, + { &search27_1_0.value, &search27_1_1.value }, + NULL, }; -static const nir_search_expression search16 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search27 = { { nir_search_value_expression, 0 }, true, nir_op_fadd, - { &search16_0.value, &search16_1.value }, + { &search27_0.value, &search27_1.value }, + NULL, }; -static const nir_search_variable replace16 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace27 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search17_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search28_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search17_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search28_1_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search17_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search28_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_fneg, - { &search17_1_0_0.value }, + { &search28_1_0_0.value }, + NULL, }; -static const nir_search_variable search17_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search28_1_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search17_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search28_1 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, - { &search17_1_0.value, &search17_1_1.value }, + { &search28_1_0.value, &search28_1_1.value }, + NULL, }; -static const nir_search_expression search17 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search28 = { { nir_search_value_expression, 0 }, true, nir_op_fadd, - { &search17_0.value, &search17_1.value }, + { &search28_0.value, &search28_1.value }, + NULL, }; -static const nir_search_variable replace17 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace28 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search39_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search51_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search39_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search51_0_1_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x3ff0000000000000 /* 1.0 */ }, }; -static const nir_search_variable search39_0_1_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search51_0_1_1_0_0 = { { nir_search_value_variable, 0 }, 1, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search39_0_1_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search51_0_1_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_b2f, - { &search39_0_1_1_0_0.value }, + { &search51_0_1_1_0_0.value }, + NULL, }; -static const nir_search_expression search39_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search51_0_1_1 = { { nir_search_value_expression, 0 }, false, nir_op_fneg, - { &search39_0_1_1_0.value }, + { &search51_0_1_1_0.value }, + NULL, }; -static const nir_search_expression search39_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search51_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, - { &search39_0_1_0.value, &search39_0_1_1.value }, + { &search51_0_1_0.value, &search51_0_1_1.value }, + NULL, }; -static const nir_search_expression search39_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search51_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &search39_0_0.value, &search39_0_1.value }, + { &search51_0_0.value, &search51_0_1.value }, + NULL, }; -static const nir_search_variable search39_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search51_1_0 = { { nir_search_value_variable, 0 }, 2, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search39_1_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search51_1_1_0 = { { nir_search_value_variable, 0 }, 1, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search39_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search51_1_1 = { { nir_search_value_expression, 0 }, false, nir_op_b2f, - { &search39_1_1_0.value }, + { &search51_1_1_0.value }, + NULL, }; -static const nir_search_expression search39_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search51_1 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &search39_1_0.value, &search39_1_1.value }, + { &search51_1_0.value, &search51_1_1.value }, + NULL, }; -static const nir_search_expression search39 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search51 = { { nir_search_value_expression, 0 }, true, nir_op_fadd, - { &search39_0.value, &search39_1.value }, + { &search51_0.value, &search51_1.value }, + NULL, }; -static const nir_search_variable replace39_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace51_0 = { { nir_search_value_variable, 0 }, 1, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace39_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace51_1 = { { nir_search_value_variable, 0 }, 2, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace39_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace51_2 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace39 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace51 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &replace39_0.value, &replace39_1.value, &replace39_2.value }, + { &replace51_0.value, &replace51_1.value, &replace51_2.value }, + NULL, }; -static const nir_search_variable search40_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search52_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search40_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search52_0_1_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x3ff0000000000000 /* 1.0 */ }, }; -static const nir_search_variable search40_0_1_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search52_0_1_1_0 = { { nir_search_value_variable, 0 }, 1, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search40_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search52_0_1_1 = { { nir_search_value_expression, 0 }, false, nir_op_fneg, - { &search40_0_1_1_0.value }, + { &search52_0_1_1_0.value }, + NULL, }; -static const nir_search_expression search40_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search52_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, - { &search40_0_1_0.value, &search40_0_1_1.value }, + { &search52_0_1_0.value, &search52_0_1_1.value }, + NULL, }; -static const nir_search_expression search40_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search52_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &search40_0_0.value, &search40_0_1.value }, + { &search52_0_0.value, &search52_0_1.value }, + NULL, }; -static const nir_search_variable search40_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search52_1_0 = { { nir_search_value_variable, 0 }, 2, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search40_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search52_1_1 = { { nir_search_value_variable, 0 }, 1, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search40_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search52_1 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &search40_1_0.value, &search40_1_1.value }, + { &search52_1_0.value, &search52_1_1.value }, + NULL, }; -static const nir_search_expression search40 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search52 = { { nir_search_value_expression, 32 }, true, nir_op_fadd, - { &search40_0.value, &search40_1.value }, + { &search52_0.value, &search52_1.value }, + NULL, }; -static const nir_search_variable replace40_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace52_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace40_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace52_1 = { { nir_search_value_variable, 0 }, 2, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace40_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace52_2 = { { nir_search_value_variable, 0 }, 1, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace40 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace52 = { { nir_search_value_expression, 0 }, false, nir_op_flrp, - { &replace40_0.value, &replace40_1.value, &replace40_2.value }, + { &replace52_0.value, &replace52_1.value, &replace52_2.value }, + NULL, }; -static const nir_search_variable search41_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search53_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search41_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search53_0_1_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x3ff0000000000000 /* 1.0 */ }, }; -static const nir_search_variable search41_0_1_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search53_0_1_1_0 = { { nir_search_value_variable, 0 }, 1, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search41_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search53_0_1_1 = { { nir_search_value_expression, 0 }, false, nir_op_fneg, - { &search41_0_1_1_0.value }, + { &search53_0_1_1_0.value }, + NULL, }; -static const nir_search_expression search41_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search53_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, - { &search41_0_1_0.value, &search41_0_1_1.value }, + { &search53_0_1_0.value, &search53_0_1_1.value }, + NULL, }; -static const nir_search_expression search41_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search53_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &search41_0_0.value, &search41_0_1.value }, + { &search53_0_0.value, &search53_0_1.value }, + NULL, }; -static const nir_search_variable search41_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search53_1_0 = { { nir_search_value_variable, 0 }, 2, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search41_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search53_1_1 = { { nir_search_value_variable, 0 }, 1, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search41_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search53_1 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &search41_1_0.value, &search41_1_1.value }, + { &search53_1_0.value, &search53_1_1.value }, + NULL, }; -static const nir_search_expression search41 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search53 = { { nir_search_value_expression, 64 }, true, nir_op_fadd, - { &search41_0.value, &search41_1.value }, + { &search53_0.value, &search53_1.value }, + NULL, }; -static const nir_search_variable replace41_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace53_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace41_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace53_1 = { { nir_search_value_variable, 0 }, 2, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace41_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace53_2 = { { nir_search_value_variable, 0 }, 1, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace41 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace53 = { { nir_search_value_expression, 0 }, false, nir_op_flrp, - { &replace41_0.value, &replace41_1.value, &replace41_2.value }, + { &replace53_0.value, &replace53_1.value, &replace53_2.value }, + NULL, }; -static const nir_search_variable search42_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search54_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search42_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search54_1_0_0 = { { nir_search_value_variable, 0 }, 1, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search42_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search54_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_b2f, - { &search42_1_0_0.value }, + { &search54_1_0_0.value }, + NULL, }; -static const nir_search_variable search42_1_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search54_1_1_0 = { { nir_search_value_variable, 0 }, 2, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search42_1_1_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search54_1_1_1_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search42_1_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search54_1_1_1 = { { nir_search_value_expression, 0 }, false, nir_op_fneg, - { &search42_1_1_1_0.value }, + { &search54_1_1_1_0.value }, + NULL, }; -static const nir_search_expression search42_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search54_1_1 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, - { &search42_1_1_0.value, &search42_1_1_1.value }, + { &search54_1_1_0.value, &search54_1_1_1.value }, + NULL, }; -static const nir_search_expression search42_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search54_1 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &search42_1_0.value, &search42_1_1.value }, + { &search54_1_0.value, &search54_1_1.value }, + NULL, }; -static const nir_search_expression search42 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search54 = { { nir_search_value_expression, 0 }, true, nir_op_fadd, - { &search42_0.value, &search42_1.value }, + { &search54_0.value, &search54_1.value }, + NULL, }; -static const nir_search_variable replace42_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace54_0 = { { nir_search_value_variable, 0 }, 1, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace42_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace54_1 = { { nir_search_value_variable, 0 }, 2, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace42_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace54_2 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace42 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace54 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &replace42_0.value, &replace42_1.value, &replace42_2.value }, + { &replace54_0.value, &replace54_1.value, &replace54_2.value }, + NULL, }; -static const nir_search_variable search43_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search55_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search43_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search55_1_0 = { { nir_search_value_variable, 0 }, 1, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search43_1_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search55_1_1_0 = { { nir_search_value_variable, 0 }, 2, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search43_1_1_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search55_1_1_1_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search43_1_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search55_1_1_1 = { { nir_search_value_expression, 0 }, false, nir_op_fneg, - { &search43_1_1_1_0.value }, + { &search55_1_1_1_0.value }, + NULL, }; -static const nir_search_expression search43_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search55_1_1 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, - { &search43_1_1_0.value, &search43_1_1_1.value }, + { &search55_1_1_0.value, &search55_1_1_1.value }, + NULL, }; -static const nir_search_expression search43_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search55_1 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &search43_1_0.value, &search43_1_1.value }, + { &search55_1_0.value, &search55_1_1.value }, + NULL, }; -static const nir_search_expression search43 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search55 = { { nir_search_value_expression, 32 }, true, nir_op_fadd, - { &search43_0.value, &search43_1.value }, + { &search55_0.value, &search55_1.value }, + NULL, }; -static const nir_search_variable replace43_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace55_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace43_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace55_1 = { { nir_search_value_variable, 0 }, 2, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace43_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace55_2 = { { nir_search_value_variable, 0 }, 1, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace43 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace55 = { { nir_search_value_expression, 0 }, false, nir_op_flrp, - { &replace43_0.value, &replace43_1.value, &replace43_2.value }, + { &replace55_0.value, &replace55_1.value, &replace55_2.value }, + NULL, }; -static const nir_search_variable search44_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search56_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search44_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search56_1_0 = { { nir_search_value_variable, 0 }, 1, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search44_1_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search56_1_1_0 = { { nir_search_value_variable, 0 }, 2, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search44_1_1_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search56_1_1_1_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search44_1_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search56_1_1_1 = { { nir_search_value_expression, 0 }, false, nir_op_fneg, - { &search44_1_1_1_0.value }, + { &search56_1_1_1_0.value }, + NULL, }; -static const nir_search_expression search44_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search56_1_1 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, - { &search44_1_1_0.value, &search44_1_1_1.value }, + { &search56_1_1_0.value, &search56_1_1_1.value }, + NULL, }; -static const nir_search_expression search44_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search56_1 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &search44_1_0.value, &search44_1_1.value }, + { &search56_1_0.value, &search56_1_1.value }, + NULL, }; -static const nir_search_expression search44 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search56 = { { nir_search_value_expression, 64 }, true, nir_op_fadd, - { &search44_0.value, &search44_1.value }, + { &search56_0.value, &search56_1.value }, + NULL, }; -static const nir_search_variable replace44_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace56_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace44_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace56_1 = { { nir_search_value_variable, 0 }, 2, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace44_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace56_2 = { { nir_search_value_variable, 0 }, 1, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace44 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace56 = { { nir_search_value_expression, 0 }, false, nir_op_flrp, - { &replace44_0.value, &replace44_1.value, &replace44_2.value }, + { &replace56_0.value, &replace56_1.value, &replace56_2.value }, + NULL, }; -static const nir_search_variable search46_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search58_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search46_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search58_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search46_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search58_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &search46_0_0.value, &search46_0_1.value }, + { &search58_0_0.value, &search58_0_1.value }, + NULL, }; -static const nir_search_variable search46_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search58_1 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search46 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search58 = { { nir_search_value_expression, 0 }, true, nir_op_fadd, - { &search46_0.value, &search46_1.value }, + { &search58_0.value, &search58_1.value }, + NULL, }; -static const nir_search_variable replace46_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace58_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace46_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace58_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace46_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace58_2 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace46 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace58 = { { nir_search_value_expression, 0 }, false, nir_op_ffma, - { &replace46_0.value, &replace46_1.value, &replace46_2.value }, + { &replace58_0.value, &replace58_1.value, &replace58_2.value }, + NULL, }; -static const nir_search_variable search180_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search203_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search180_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search203_1_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_variable search180_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search203_1_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search180_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search203_1 = { { nir_search_value_expression, 0 }, false, nir_op_fsub, - { &search180_1_0.value, &search180_1_1.value }, + { &search203_1_0.value, &search203_1_1.value }, + NULL, }; -static const nir_search_expression search180 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search203 = { { nir_search_value_expression, 0 }, true, nir_op_fadd, - { &search180_0.value, &search180_1.value }, + { &search203_0.value, &search203_1.value }, + NULL, }; -static const nir_search_variable replace180_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace203_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace180_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace203_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace180 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace203 = { { nir_search_value_expression, 0 }, false, nir_op_fsub, - { &replace180_0.value, &replace180_1.value }, + { &replace203_0.value, &replace203_1.value }, + NULL, }; -static const nir_search_variable search188_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search211_0 = { { nir_search_value_variable, 0 }, 0, /* a */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search188_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search211_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search188_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search211_1_1 = { { nir_search_value_variable, 0 }, 2, /* c */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search188_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search211_1 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, - { &search188_1_0.value, &search188_1_1.value }, + { &search211_1_0.value, &search211_1_1.value }, + NULL, }; -static const nir_search_expression search188 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search211 = { { nir_search_value_expression, 0 }, true, nir_op_fadd, - { &search188_0.value, &search188_1.value }, + { &search211_0.value, &search211_1.value }, + NULL, }; -static const nir_search_variable replace188_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace211_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace188_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace211_0_1 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace188_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace211_0 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, - { &replace188_0_0.value, &replace188_0_1.value }, + { &replace211_0_0.value, &replace211_0_1.value }, + NULL, }; -static const nir_search_variable replace188_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace211_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace188 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace211 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, - { &replace188_0.value, &replace188_1.value }, + { &replace211_0.value, &replace211_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_fadd_xforms[] = { - { &search6, &replace6.value, 0 }, - { &search10, &replace10.value, 0 }, - { &search12, &replace12.value, 0 }, - { &search16, &replace16.value, 0 }, { &search17, &replace17.value, 0 }, - { &search39, &replace39.value, 1 }, - { &search40, &replace40.value, 4 }, - { &search41, &replace41.value, 5 }, - { &search42, &replace42.value, 1 }, - { &search43, &replace43.value, 4 }, - { &search44, &replace44.value, 5 }, - { &search46, &replace46.value, 7 }, - { &search180, &replace180.value, 0 }, - { &search188, &replace188.value, 0 }, + { &search21, &replace21.value, 0 }, + { &search23, &replace23.value, 0 }, + { &search27, &replace27.value, 0 }, + { &search28, &replace28.value, 0 }, + { &search51, &replace51.value, 2 }, + { &search52, &replace52.value, 5 }, + { &search53, &replace53.value, 6 }, + { &search54, &replace54.value, 2 }, + { &search55, &replace55.value, 5 }, + { &search56, &replace56.value, 6 }, + { &search58, &replace58.value, 8 }, + { &search203, &replace203.value, 0 }, + { &search211, &replace211.value, 0 }, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search59_0_0_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search59_0_0_1 = { + { nir_search_value_variable, 0 }, + 1, /* b */ + true, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search59_0_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_imul, + { &search59_0_0_0.value, &search59_0_0_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search59_0_1 = { + { nir_search_value_variable, 0 }, + 2, /* c */ + true, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search59_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_iadd, + { &search59_0_0.value, &search59_0_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search59_1 = { + { nir_search_value_variable, 0 }, + 3, /* d */ + true, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search59 = { + { nir_search_value_expression, 0 }, + false, + nir_op_ishl, + { &search59_0.value, &search59_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace59_0_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace59_0_1_0 = { + { nir_search_value_variable, 0 }, + 1, /* b */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace59_0_1_1 = { + { nir_search_value_variable, 0 }, + 3, /* d */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace59_0_1 = { + { nir_search_value_expression, 0 }, + false, + nir_op_ishl, + { &replace59_0_1_0.value, &replace59_0_1_1.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace59_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_imul, + { &replace59_0_0.value, &replace59_0_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace59_1_0 = { + { nir_search_value_variable, 0 }, + 2, /* c */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace59_1_1 = { + { nir_search_value_variable, 0 }, + 3, /* d */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace59_1 = { + { nir_search_value_expression, 0 }, + false, + nir_op_ishl, + { &replace59_1_0.value, &replace59_1_1.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace59 = { + { nir_search_value_expression, 0 }, + false, + nir_op_iadd, + { &replace59_0.value, &replace59_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search60_0_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search60_0_1 = { + { nir_search_value_variable, 0 }, + 1, /* b */ + true, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search60_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_imul, + { &search60_0_0.value, &search60_0_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search60_1 = { + { nir_search_value_variable, 0 }, + 2, /* c */ + true, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search60 = { + { nir_search_value_expression, 0 }, + false, + nir_op_ishl, + { &search60_0.value, &search60_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace60_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace60_1_0 = { + { nir_search_value_variable, 0 }, + 1, /* b */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace60_1_1 = { + { nir_search_value_variable, 0 }, + 2, /* c */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace60_1 = { + { nir_search_value_expression, 0 }, + false, + nir_op_ishl, + { &replace60_1_0.value, &replace60_1_1.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace60 = { + { nir_search_value_expression, 0 }, + false, + nir_op_imul, + { &replace60_0.value, &replace60_1.value }, + NULL, }; -static const nir_search_constant search115_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search134_0 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_variable search115_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search134_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search115 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search134 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search115_0.value, &search115_1.value }, + { &search134_0.value, &search134_1.value }, + NULL, }; -static const nir_search_constant replace115 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace134 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_variable search116_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search135_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search116_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search135_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_expression search116 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search135 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search116_0.value, &search116_1.value }, + { &search135_0.value, &search135_1.value }, + NULL, }; -static const nir_search_variable replace116 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace135 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; static const struct transform nir_opt_algebraic_ishl_xforms[] = { - { &search115, &replace115.value, 0 }, - { &search116, &replace116.value, 0 }, + { &search59, &replace59.value, 0 }, + { &search60, &replace60.value, 0 }, + { &search134, &replace134.value, 0 }, + { &search135, &replace135.value, 0 }, }; -static const nir_search_variable search194_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search217_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search194_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search217_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search194 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search217 = { { nir_search_value_expression, 32 }, false, nir_op_usub_borrow, - { &search194_0.value, &search194_1.value }, + { &search217_0.value, &search217_1.value }, + NULL, }; -static const nir_search_variable replace194_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace217_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace194_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace217_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace194_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace217_0 = { { nir_search_value_expression, 0 }, false, nir_op_ult, - { &replace194_0_0.value, &replace194_0_1.value }, + { &replace217_0_0.value, &replace217_0_1.value }, + NULL, }; -static const nir_search_expression replace194 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace217 = { { nir_search_value_expression, 0 }, false, nir_op_b2i, - { &replace194_0.value }, + { &replace217_0.value }, + NULL, }; static const struct transform nir_opt_algebraic_usub_borrow_xforms[] = { - { &search194, &replace194.value, 23 }, + { &search217, &replace217.value, 24 }, }; -static const nir_search_variable search124_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search143_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search124_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search143_0 = { { nir_search_value_expression, 0 }, false, nir_op_fexp2, - { &search124_0_0.value }, + { &search143_0_0.value }, + NULL, }; -static const nir_search_expression search124 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search143 = { { nir_search_value_expression, 0 }, true, nir_op_flog2, - { &search124_0.value }, + { &search143_0.value }, + NULL, }; -static const nir_search_variable replace124 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace143 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search137_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search156_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search137_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search156_0 = { { nir_search_value_expression, 0 }, false, nir_op_fsqrt, - { &search137_0_0.value }, + { &search156_0_0.value }, + NULL, }; -static const nir_search_expression search137 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search156 = { { nir_search_value_expression, 0 }, true, nir_op_flog2, - { &search137_0.value }, + { &search156_0.value }, + NULL, }; -static const nir_search_constant replace137_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace156_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x3fe0000000000000 /* 0.5 */ }, }; -static const nir_search_variable replace137_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace156_1_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace137_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace156_1 = { { nir_search_value_expression, 0 }, false, nir_op_flog2, - { &replace137_1_0.value }, + { &replace156_1_0.value }, + NULL, }; -static const nir_search_expression replace137 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace156 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace137_0.value, &replace137_1.value }, + { &replace156_0.value, &replace156_1.value }, + NULL, }; -static const nir_search_variable search138_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search157_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search138_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search157_0 = { { nir_search_value_expression, 0 }, false, nir_op_frcp, - { &search138_0_0.value }, + { &search157_0_0.value }, + NULL, }; -static const nir_search_expression search138 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search157 = { { nir_search_value_expression, 0 }, true, nir_op_flog2, - { &search138_0.value }, + { &search157_0.value }, + NULL, }; -static const nir_search_variable replace138_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace157_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace138_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace157_0 = { { nir_search_value_expression, 0 }, false, nir_op_flog2, - { &replace138_0_0.value }, + { &replace157_0_0.value }, + NULL, }; -static const nir_search_expression replace138 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace157 = { { nir_search_value_expression, 0 }, false, nir_op_fneg, - { &replace138_0.value }, + { &replace157_0.value }, + NULL, }; -static const nir_search_variable search139_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search158_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search139_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search158_0 = { { nir_search_value_expression, 0 }, false, nir_op_frsq, - { &search139_0_0.value }, + { &search158_0_0.value }, + NULL, }; -static const nir_search_expression search139 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search158 = { { nir_search_value_expression, 0 }, true, nir_op_flog2, - { &search139_0.value }, + { &search158_0.value }, + NULL, }; -static const nir_search_constant replace139_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace158_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0xbfe0000000000000L /* -0.5 */ }, }; -static const nir_search_variable replace139_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace158_1_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace139_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace158_1 = { { nir_search_value_expression, 0 }, false, nir_op_flog2, - { &replace139_1_0.value }, + { &replace158_1_0.value }, + NULL, }; -static const nir_search_expression replace139 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace158 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace139_0.value, &replace139_1.value }, + { &replace158_0.value, &replace158_1.value }, + NULL, }; -static const nir_search_variable search140_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search159_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search140_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search159_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search140_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search159_0 = { { nir_search_value_expression, 0 }, false, nir_op_fpow, - { &search140_0_0.value, &search140_0_1.value }, + { &search159_0_0.value, &search159_0_1.value }, + NULL, }; -static const nir_search_expression search140 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search159 = { { nir_search_value_expression, 0 }, true, nir_op_flog2, - { &search140_0.value }, + { &search159_0.value }, + NULL, }; -static const nir_search_variable replace140_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace159_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace140_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace159_1_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace140_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace159_1 = { { nir_search_value_expression, 0 }, false, nir_op_flog2, - { &replace140_1_0.value }, + { &replace159_1_0.value }, + NULL, }; -static const nir_search_expression replace140 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace159 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace140_0.value, &replace140_1.value }, + { &replace159_0.value, &replace159_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_flog2_xforms[] = { - { &search124, &replace124.value, 0 }, - { &search137, &replace137.value, 0 }, - { &search138, &replace138.value, 0 }, - { &search139, &replace139.value, 0 }, - { &search140, &replace140.value, 0 }, + { &search143, &replace143.value, 0 }, + { &search156, &replace156.value, 0 }, + { &search157, &replace157.value, 0 }, + { &search158, &replace158.value, 0 }, + { &search159, &replace159.value, 0 }, }; -static const nir_search_variable search47_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search61_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search47_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search61_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search47_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search61_0 = { { nir_search_value_expression, 0 }, false, nir_op_flt, - { &search47_0_0.value, &search47_0_1.value }, + { &search61_0_0.value, &search61_0_1.value }, + NULL, }; -static const nir_search_expression search47 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search61 = { { nir_search_value_expression, 0 }, true, nir_op_inot, - { &search47_0.value }, + { &search61_0.value }, + NULL, }; -static const nir_search_variable replace47_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace61_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace47_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace61_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace47 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace61 = { { nir_search_value_expression, 0 }, false, nir_op_fge, - { &replace47_0.value, &replace47_1.value }, + { &replace61_0.value, &replace61_1.value }, + NULL, }; -static const nir_search_variable search48_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search62_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search48_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search62_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search48_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search62_0 = { { nir_search_value_expression, 0 }, false, nir_op_fge, - { &search48_0_0.value, &search48_0_1.value }, + { &search62_0_0.value, &search62_0_1.value }, + NULL, }; -static const nir_search_expression search48 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search62 = { { nir_search_value_expression, 0 }, true, nir_op_inot, - { &search48_0.value }, + { &search62_0.value }, + NULL, }; -static const nir_search_variable replace48_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace62_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace48_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace62_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace48 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace62 = { { nir_search_value_expression, 0 }, false, nir_op_flt, - { &replace48_0.value, &replace48_1.value }, + { &replace62_0.value, &replace62_1.value }, + NULL, }; -static const nir_search_variable search49_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search63_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search49_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search63_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search49_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search63_0 = { { nir_search_value_expression, 0 }, false, nir_op_feq, - { &search49_0_0.value, &search49_0_1.value }, + { &search63_0_0.value, &search63_0_1.value }, + NULL, }; -static const nir_search_expression search49 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search63 = { { nir_search_value_expression, 0 }, true, nir_op_inot, - { &search49_0.value }, + { &search63_0.value }, + NULL, }; -static const nir_search_variable replace49_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace63_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace49_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace63_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace49 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace63 = { { nir_search_value_expression, 0 }, false, nir_op_fne, - { &replace49_0.value, &replace49_1.value }, + { &replace63_0.value, &replace63_1.value }, + NULL, }; -static const nir_search_variable search50_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search64_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search50_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search64_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search50_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search64_0 = { { nir_search_value_expression, 0 }, false, nir_op_fne, - { &search50_0_0.value, &search50_0_1.value }, + { &search64_0_0.value, &search64_0_1.value }, + NULL, }; -static const nir_search_expression search50 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search64 = { { nir_search_value_expression, 0 }, true, nir_op_inot, - { &search50_0.value }, + { &search64_0.value }, + NULL, }; -static const nir_search_variable replace50_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace64_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace50_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace64_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace50 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace64 = { { nir_search_value_expression, 0 }, false, nir_op_feq, - { &replace50_0.value, &replace50_1.value }, + { &replace64_0.value, &replace64_1.value }, + NULL, }; -static const nir_search_variable search51_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search65_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search51_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search65_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search51_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search65_0 = { { nir_search_value_expression, 0 }, false, nir_op_ilt, - { &search51_0_0.value, &search51_0_1.value }, + { &search65_0_0.value, &search65_0_1.value }, + NULL, }; -static const nir_search_expression search51 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search65 = { { nir_search_value_expression, 0 }, false, nir_op_inot, - { &search51_0.value }, + { &search65_0.value }, + NULL, }; -static const nir_search_variable replace51_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace65_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace51_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace65_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace51 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace65 = { { nir_search_value_expression, 0 }, false, nir_op_ige, - { &replace51_0.value, &replace51_1.value }, + { &replace65_0.value, &replace65_1.value }, + NULL, }; -static const nir_search_variable search52_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search66_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search52_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search66_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search52_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search66_0 = { { nir_search_value_expression, 0 }, false, nir_op_ige, - { &search52_0_0.value, &search52_0_1.value }, + { &search66_0_0.value, &search66_0_1.value }, + NULL, }; -static const nir_search_expression search52 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search66 = { { nir_search_value_expression, 0 }, false, nir_op_inot, - { &search52_0.value }, + { &search66_0.value }, + NULL, }; -static const nir_search_variable replace52_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace66_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace52_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace66_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace52 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace66 = { { nir_search_value_expression, 0 }, false, nir_op_ilt, - { &replace52_0.value, &replace52_1.value }, + { &replace66_0.value, &replace66_1.value }, + NULL, }; -static const nir_search_variable search53_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search67_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search53_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search67_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search53_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search67_0 = { { nir_search_value_expression, 0 }, false, nir_op_ieq, - { &search53_0_0.value, &search53_0_1.value }, + { &search67_0_0.value, &search67_0_1.value }, + NULL, }; -static const nir_search_expression search53 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search67 = { { nir_search_value_expression, 0 }, false, nir_op_inot, - { &search53_0.value }, + { &search67_0.value }, + NULL, }; -static const nir_search_variable replace53_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace67_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace53_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace67_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace53 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace67 = { { nir_search_value_expression, 0 }, false, nir_op_ine, - { &replace53_0.value, &replace53_1.value }, + { &replace67_0.value, &replace67_1.value }, + NULL, }; -static const nir_search_variable search54_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search68_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search54_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search68_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search54_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search68_0 = { { nir_search_value_expression, 0 }, false, nir_op_ine, - { &search54_0_0.value, &search54_0_1.value }, + { &search68_0_0.value, &search68_0_1.value }, + NULL, }; -static const nir_search_expression search54 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search68 = { { nir_search_value_expression, 0 }, false, nir_op_inot, - { &search54_0.value }, + { &search68_0.value }, + NULL, }; -static const nir_search_variable replace54_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace68_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace54_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace68_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace54 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace68 = { { nir_search_value_expression, 0 }, false, nir_op_ieq, - { &replace54_0.value, &replace54_1.value }, + { &replace68_0.value, &replace68_1.value }, + NULL, }; -static const nir_search_variable search112_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search131_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search112_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search131_0 = { { nir_search_value_expression, 0 }, false, nir_op_inot, - { &search112_0_0.value }, + { &search131_0_0.value }, + NULL, }; -static const nir_search_expression search112 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search131 = { { nir_search_value_expression, 0 }, false, nir_op_inot, - { &search112_0.value }, + { &search131_0.value }, + NULL, }; -static const nir_search_variable replace112 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace131 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; static const struct transform nir_opt_algebraic_inot_xforms[] = { - { &search47, &replace47.value, 0 }, - { &search48, &replace48.value, 0 }, - { &search49, &replace49.value, 0 }, - { &search50, &replace50.value, 0 }, - { &search51, &replace51.value, 0 }, - { &search52, &replace52.value, 0 }, - { &search53, &replace53.value, 0 }, - { &search54, &replace54.value, 0 }, - { &search112, &replace112.value, 0 }, + { &search61, &replace61.value, 0 }, + { &search62, &replace62.value, 0 }, + { &search63, &replace63.value, 0 }, + { &search64, &replace64.value, 0 }, + { &search65, &replace65.value, 0 }, + { &search66, &replace66.value, 0 }, + { &search67, &replace67.value, 0 }, + { &search68, &replace68.value, 0 }, + { &search131, &replace131.value, 0 }, }; -static const nir_search_variable search88_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search105_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search88_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search105_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search88 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search105 = { { nir_search_value_expression, 0 }, false, nir_op_sne, - { &search88_0.value, &search88_1.value }, + { &search105_0.value, &search105_1.value }, + NULL, }; -static const nir_search_variable replace88_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace105_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace88_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace105_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace88_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace105_0 = { { nir_search_value_expression, 0 }, false, nir_op_fne, - { &replace88_0_0.value, &replace88_0_1.value }, + { &replace105_0_0.value, &replace105_0_1.value }, + NULL, }; -static const nir_search_expression replace88 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace105 = { { nir_search_value_expression, 0 }, false, nir_op_b2f, - { &replace88_0.value }, + { &replace105_0.value }, + NULL, }; static const struct transform nir_opt_algebraic_sne_xforms[] = { - { &search88, &replace88.value, 10 }, + { &search105, &replace105.value, 11 }, }; -static const nir_search_variable search190_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search213_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search190_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search213_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search190 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search213 = { { nir_search_value_expression, 32 }, false, nir_op_fmod, - { &search190_0.value, &search190_1.value }, + { &search213_0.value, &search213_1.value }, + NULL, }; -static const nir_search_variable replace190_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace213_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace190_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace213_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace190_1_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace213_1_1_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace190_1_1_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace213_1_1_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace190_1_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace213_1_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_fdiv, - { &replace190_1_1_0_0.value, &replace190_1_1_0_1.value }, + { &replace213_1_1_0_0.value, &replace213_1_1_0_1.value }, + NULL, }; -static const nir_search_expression replace190_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace213_1_1 = { { nir_search_value_expression, 0 }, false, nir_op_ffloor, - { &replace190_1_1_0.value }, + { &replace213_1_1_0.value }, + NULL, }; -static const nir_search_expression replace190_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace213_1 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace190_1_0.value, &replace190_1_1.value }, + { &replace213_1_0.value, &replace213_1_1.value }, + NULL, }; -static const nir_search_expression replace190 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace213 = { { nir_search_value_expression, 0 }, false, nir_op_fsub, - { &replace190_0.value, &replace190_1.value }, + { &replace213_0.value, &replace213_1.value }, + NULL, }; -static const nir_search_variable search191_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search214_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search191_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search214_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search191 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search214 = { { nir_search_value_expression, 64 }, false, nir_op_fmod, - { &search191_0.value, &search191_1.value }, + { &search214_0.value, &search214_1.value }, + NULL, }; -static const nir_search_variable replace191_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace214_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace191_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace214_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace191_1_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace214_1_1_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace191_1_1_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace214_1_1_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace191_1_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace214_1_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_fdiv, - { &replace191_1_1_0_0.value, &replace191_1_1_0_1.value }, + { &replace214_1_1_0_0.value, &replace214_1_1_0_1.value }, + NULL, }; -static const nir_search_expression replace191_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace214_1_1 = { { nir_search_value_expression, 0 }, false, nir_op_ffloor, - { &replace191_1_1_0.value }, + { &replace214_1_1_0.value }, + NULL, }; -static const nir_search_expression replace191_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace214_1 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace191_1_0.value, &replace191_1_1.value }, + { &replace214_1_0.value, &replace214_1_1.value }, + NULL, }; -static const nir_search_expression replace191 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace214 = { { nir_search_value_expression, 0 }, false, nir_op_fsub, - { &replace191_0.value, &replace191_1.value }, + { &replace214_0.value, &replace214_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_fmod_xforms[] = { - { &search190, &replace190.value, 20 }, - { &search191, &replace191.value, 21 }, + { &search213, &replace213.value, 21 }, + { &search214, &replace214.value, 22 }, }; -static const nir_search_variable search161_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search184_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search161_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search184_0 = { { nir_search_value_expression, 0 }, false, nir_op_ftrunc, - { &search161_0_0.value }, + { &search184_0_0.value }, + NULL, }; -static const nir_search_expression search161 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search184 = { { nir_search_value_expression, 0 }, false, nir_op_f2u, - { &search161_0.value }, + { &search184_0.value }, + NULL, }; -static const nir_search_variable replace161_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace184_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace161 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace184 = { { nir_search_value_expression, 0 }, false, nir_op_f2u, - { &replace161_0.value }, + { &replace184_0.value }, + NULL, }; static const struct transform nir_opt_algebraic_f2u_xforms[] = { - { &search161, &replace161.value, 0 }, + { &search184, &replace184.value, 0 }, }; -static const nir_search_variable search158_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search181_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search158_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search181_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search158_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search181_2 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search158 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search181 = { { nir_search_value_expression, 0 }, false, nir_op_fcsel, - { &search158_0.value, &search158_1.value, &search158_2.value }, + { &search181_0.value, &search181_1.value, &search181_2.value }, + NULL, }; -static const nir_search_variable replace158 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace181 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; static const struct transform nir_opt_algebraic_fcsel_xforms[] = { - { &search158, &replace158.value, 0 }, + { &search181, &replace181.value, 0 }, }; -static const nir_search_variable search173_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search196_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search173_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search196_1_0 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_variable search173_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search196_1_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search173_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search196_1 = { { nir_search_value_expression, 0 }, false, nir_op_isub, - { &search173_1_0.value, &search173_1_1.value }, + { &search196_1_0.value, &search196_1_1.value }, + NULL, }; -static const nir_search_expression search173 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search196 = { { nir_search_value_expression, 0 }, false, nir_op_isub, - { &search173_0.value, &search173_1.value }, + { &search196_0.value, &search196_1.value }, + NULL, }; -static const nir_search_variable replace173_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace196_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace173_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace196_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace173 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace196 = { { nir_search_value_expression, 0 }, false, nir_op_iadd, - { &replace173_0.value, &replace173_1.value }, + { &replace196_0.value, &replace196_1.value }, + NULL, }; -static const nir_search_variable search177_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search200_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search177_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search200_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search177 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search200 = { { nir_search_value_expression, 0 }, false, nir_op_isub, - { &search177_0.value, &search177_1.value }, + { &search200_0.value, &search200_1.value }, + NULL, }; -static const nir_search_variable replace177_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace200_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace177_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace200_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace177_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace200_1 = { { nir_search_value_expression, 0 }, false, nir_op_ineg, - { &replace177_1_0.value }, + { &replace200_1_0.value }, + NULL, }; -static const nir_search_expression replace177 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace200 = { { nir_search_value_expression, 0 }, false, nir_op_iadd, - { &replace177_0.value, &replace177_1.value }, + { &replace200_0.value, &replace200_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_isub_xforms[] = { - { &search173, &replace173.value, 0 }, - { &search177, &replace177.value, 18 }, + { &search196, &replace196.value, 0 }, + { &search200, &replace200.value, 19 }, }; -static const nir_search_variable search64_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search79_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search64_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search79_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search64 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search79 = { { nir_search_value_expression, 0 }, false, nir_op_fmax, - { &search64_0.value, &search64_1.value }, + { &search79_0.value, &search79_1.value }, + NULL, }; -static const nir_search_variable replace64 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace79 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search70_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search85_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search70_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search85_0_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x3ff0000000000000 /* 1.0 */ }, }; -static const nir_search_expression search70_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search85_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmin, - { &search70_0_0.value, &search70_0_1.value }, + { &search85_0_0.value, &search85_0_1.value }, + NULL, }; -static const nir_search_constant search70_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search85_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_expression search70 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search85 = { { nir_search_value_expression, 0 }, true, nir_op_fmax, - { &search70_0.value, &search70_1.value }, + { &search85_0.value, &search85_1.value }, + NULL, }; -static const nir_search_variable replace70_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace85_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace85 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fsat, + { &replace85_0.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search91_0_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search91_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fsat, + { &search91_0_0.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search91_1 = { + { nir_search_value_variable, 32 }, + 1, /* b */ + true, + nir_type_invalid, + (is_zero_to_one), +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search91 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fmax, + { &search91_0.value, &search91_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace91_0_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace91_0_1 = { { nir_search_value_variable, 0 }, - 0, /* a */ + 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace70 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace91_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fmax, + { &replace91_0_0.value, &replace91_0_1.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace91 = { { nir_search_value_expression, 0 }, false, nir_op_fsat, - { &replace70_0.value }, + { &replace91_0.value }, + NULL, }; static const struct transform nir_opt_algebraic_fmax_xforms[] = { - { &search64, &replace64.value, 0 }, - { &search70, &replace70.value, 8 }, + { &search79, &replace79.value, 0 }, + { &search85, &replace85.value, 9 }, + { &search91, &replace91.value, 0 }, }; -static const nir_search_variable search20_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search31_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search20_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search31_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_expression search20 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search31 = { { nir_search_value_expression, 0 }, false, nir_op_umul_unorm_4x8, - { &search20_0.value, &search20_1.value }, + { &search31_0.value, &search31_1.value }, + NULL, }; -static const nir_search_constant replace20 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace31 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_variable search21_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search32_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search21_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search32_1 = { { nir_search_value_constant, 0 }, nir_type_int, { -0x1 /* -1 */ }, }; -static const nir_search_expression search21 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search32 = { { nir_search_value_expression, 0 }, false, nir_op_umul_unorm_4x8, - { &search21_0.value, &search21_1.value }, + { &search32_0.value, &search32_1.value }, + NULL, }; -static const nir_search_variable replace21 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace32 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; static const struct transform nir_opt_algebraic_umul_unorm_4x8_xforms[] = { - { &search20, &replace20.value, 0 }, - { &search21, &replace21.value, 0 }, + { &search31, &replace31.value, 0 }, + { &search32, &replace32.value, 0 }, }; -static const nir_search_variable search195_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search218_0 = { { nir_search_value_variable, 0 }, 0, /* base */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search195_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search218_1 = { { nir_search_value_variable, 0 }, 1, /* insert */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search195_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search218_2 = { { nir_search_value_variable, 0 }, 2, /* offset */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search195_3 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search218_3 = { { nir_search_value_variable, 0 }, 3, /* bits */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search195 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search218 = { { nir_search_value_expression, 0 }, false, nir_op_bitfield_insert, - { &search195_0.value, &search195_1.value, &search195_2.value, &search195_3.value }, + { &search218_0.value, &search218_1.value, &search218_2.value, &search218_3.value }, + NULL, }; -static const nir_search_constant replace195_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace218_0_0 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x1f /* 31 */ }, }; -static const nir_search_variable replace195_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace218_0_1 = { { nir_search_value_variable, 0 }, 3, /* bits */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace195_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace218_0 = { { nir_search_value_expression, 0 }, false, nir_op_ilt, - { &replace195_0_0.value, &replace195_0_1.value }, + { &replace218_0_0.value, &replace218_0_1.value }, + NULL, }; -static const nir_search_variable replace195_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace218_1 = { { nir_search_value_variable, 0 }, 1, /* insert */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace195_2_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace218_2_0_0 = { { nir_search_value_variable, 0 }, 3, /* bits */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace195_2_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace218_2_0_1 = { { nir_search_value_variable, 0 }, 2, /* offset */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace195_2_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace218_2_0 = { { nir_search_value_expression, 0 }, false, nir_op_bfm, - { &replace195_2_0_0.value, &replace195_2_0_1.value }, + { &replace218_2_0_0.value, &replace218_2_0_1.value }, + NULL, }; -static const nir_search_variable replace195_2_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace218_2_1 = { { nir_search_value_variable, 0 }, 1, /* insert */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace195_2_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace218_2_2 = { { nir_search_value_variable, 0 }, 0, /* base */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace195_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace218_2 = { { nir_search_value_expression, 0 }, false, nir_op_bfi, - { &replace195_2_0.value, &replace195_2_1.value, &replace195_2_2.value }, + { &replace218_2_0.value, &replace218_2_1.value, &replace218_2_2.value }, + NULL, }; -static const nir_search_expression replace195 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace218 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &replace195_0.value, &replace195_1.value, &replace195_2.value }, + { &replace218_0.value, &replace218_1.value, &replace218_2.value }, + NULL, }; static const struct transform nir_opt_algebraic_bitfield_insert_xforms[] = { - { &search195, &replace195.value, 24 }, + { &search218, &replace218.value, 25 }, }; -static const nir_search_variable search90_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search107_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search90_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search107_0 = { { nir_search_value_expression, 0 }, false, nir_op_fneg, - { &search90_0_0.value }, + { &search107_0_0.value }, + NULL, }; -static const nir_search_variable search90_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search107_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search90 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search107 = { { nir_search_value_expression, 0 }, false, nir_op_feq, - { &search90_0.value, &search90_1.value }, + { &search107_0.value, &search107_1.value }, + NULL, }; -static const nir_search_variable replace90_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace107_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace90_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace107_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_expression replace90 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace107 = { { nir_search_value_expression, 0 }, false, nir_op_feq, - { &replace90_0.value, &replace90_1.value }, + { &replace107_0.value, &replace107_1.value }, + NULL, }; -static const nir_search_variable search217_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search246_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search217_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search246_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search217_0_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search246_0_2 = { { nir_search_value_variable, 0 }, 2, /* c */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search217_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search246_0 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search217_0_0.value, &search217_0_1.value, &search217_0_2.value }, + { &search246_0_0.value, &search246_0_1.value, &search246_0_2.value }, + NULL, }; -static const nir_search_variable search217_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search246_1 = { { nir_search_value_variable, 0 }, 3, /* d */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search217 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search246 = { { nir_search_value_expression, 0 }, false, nir_op_feq, - { &search217_0.value, &search217_1.value }, + { &search246_0.value, &search246_1.value }, + NULL, }; -static const nir_search_variable replace217_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace246_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace217_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace246_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace217_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace246_1_1 = { { nir_search_value_variable, 0 }, 3, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace217_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace246_1 = { { nir_search_value_expression, 0 }, false, nir_op_feq, - { &replace217_1_0.value, &replace217_1_1.value }, + { &replace246_1_0.value, &replace246_1_1.value }, + NULL, }; -static const nir_search_variable replace217_2_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace246_2_0 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace217_2_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace246_2_1 = { { nir_search_value_variable, 0 }, 3, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace217_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace246_2 = { { nir_search_value_expression, 0 }, false, nir_op_feq, - { &replace217_2_0.value, &replace217_2_1.value }, + { &replace246_2_0.value, &replace246_2_1.value }, + NULL, }; -static const nir_search_expression replace217 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace246 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &replace217_0.value, &replace217_1.value, &replace217_2.value }, + { &replace246_0.value, &replace246_1.value, &replace246_2.value }, + NULL, }; -static const nir_search_variable search218_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search247_0 = { { nir_search_value_variable, 0 }, 0, /* d */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search218_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search247_1_0 = { { nir_search_value_variable, 0 }, 1, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search218_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search247_1_1 = { { nir_search_value_variable, 0 }, 2, /* b */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search218_1_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search247_1_2 = { { nir_search_value_variable, 0 }, 3, /* c */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search218_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search247_1 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search218_1_0.value, &search218_1_1.value, &search218_1_2.value }, + { &search247_1_0.value, &search247_1_1.value, &search247_1_2.value }, + NULL, }; -static const nir_search_expression search218 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search247 = { { nir_search_value_expression, 0 }, false, nir_op_feq, - { &search218_0.value, &search218_1.value }, + { &search247_0.value, &search247_1.value }, + NULL, }; -static const nir_search_variable replace218_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace247_0 = { { nir_search_value_variable, 0 }, 1, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace218_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace247_1_0 = { { nir_search_value_variable, 0 }, 0, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace218_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace247_1_1 = { { nir_search_value_variable, 0 }, 2, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace218_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace247_1 = { { nir_search_value_expression, 0 }, false, nir_op_feq, - { &replace218_1_0.value, &replace218_1_1.value }, + { &replace247_1_0.value, &replace247_1_1.value }, + NULL, }; -static const nir_search_variable replace218_2_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace247_2_0 = { { nir_search_value_variable, 0 }, 0, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace218_2_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace247_2_1 = { { nir_search_value_variable, 0 }, 3, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace218_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace247_2 = { { nir_search_value_expression, 0 }, false, nir_op_feq, - { &replace218_2_0.value, &replace218_2_1.value }, + { &replace247_2_0.value, &replace247_2_1.value }, + NULL, }; -static const nir_search_expression replace218 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace247 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &replace218_0.value, &replace218_1.value, &replace218_2.value }, + { &replace247_0.value, &replace247_1.value, &replace247_2.value }, + NULL, }; static const struct transform nir_opt_algebraic_feq_xforms[] = { - { &search90, &replace90.value, 0 }, - { &search217, &replace217.value, 0 }, - { &search218, &replace218.value, 0 }, + { &search107, &replace107.value, 0 }, + { &search246, &replace246.value, 0 }, + { &search247, &replace247.value, 0 }, }; -static const nir_search_variable search31_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search42_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search31_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search42_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search31_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search42_2 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_expression search31 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search42 = { { nir_search_value_expression, 0 }, true, nir_op_flrp, - { &search31_0.value, &search31_1.value, &search31_2.value }, + { &search42_0.value, &search42_1.value, &search42_2.value }, + NULL, }; -static const nir_search_variable replace31 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace42 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search32_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search43_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search32_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search43_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search32_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search43_2 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x3ff0000000000000 /* 1.0 */ }, }; -static const nir_search_expression search32 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search43 = { { nir_search_value_expression, 0 }, true, nir_op_flrp, - { &search32_0.value, &search32_1.value, &search32_2.value }, + { &search43_0.value, &search43_1.value, &search43_2.value }, + NULL, }; -static const nir_search_variable replace32 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace43 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search33_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search44_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search33_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search44_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search33_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search44_2 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search33 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search44 = { { nir_search_value_expression, 0 }, true, nir_op_flrp, - { &search33_0.value, &search33_1.value, &search33_2.value }, + { &search44_0.value, &search44_1.value, &search44_2.value }, + NULL, }; -static const nir_search_variable replace33 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace44 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search34_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search45_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_variable search34_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search45_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search34_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search45_2 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search34 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search45 = { { nir_search_value_expression, 0 }, true, nir_op_flrp, - { &search34_0.value, &search34_1.value, &search34_2.value }, + { &search45_0.value, &search45_1.value, &search45_2.value }, + NULL, }; -static const nir_search_variable replace34_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace45_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace34_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace45_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace34 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace45 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace34_0.value, &replace34_1.value }, + { &replace45_0.value, &replace45_1.value }, + NULL, }; -static const nir_search_variable search35_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search46_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search35_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search46_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search35_2_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search46_2_0 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search35_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search46_2 = { { nir_search_value_expression, 0 }, false, nir_op_b2f, - { &search35_2_0.value }, + { &search46_2_0.value }, + NULL, }; -static const nir_search_expression search35 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search46 = { { nir_search_value_expression, 0 }, true, nir_op_flrp, - { &search35_0.value, &search35_1.value, &search35_2.value }, + { &search46_0.value, &search46_1.value, &search46_2.value }, + NULL, }; -static const nir_search_variable replace35_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace46_0 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace35_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace46_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace35_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace46_2 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace35 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace46 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &replace35_0.value, &replace35_1.value, &replace35_2.value }, + { &replace46_0.value, &replace46_1.value, &replace46_2.value }, + NULL, }; -static const nir_search_variable search36_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search47_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search47_1 = { + { nir_search_value_constant, 0 }, + nir_type_float, { 0x0 /* 0.0 */ }, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search47_2 = { + { nir_search_value_variable, 0 }, + 1, /* c */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search47 = { + { nir_search_value_expression, 0 }, + true, + nir_op_flrp, + { &search47_0.value, &search47_1.value, &search47_2.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace47_0_0_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace47_0_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fneg, + { &replace47_0_0_0.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace47_0_1 = { + { nir_search_value_variable, 0 }, + 1, /* c */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace47_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fmul, + { &replace47_0_0.value, &replace47_0_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace47_1 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace47 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fadd, + { &replace47_0.value, &replace47_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search48_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search36_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search48_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search36_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search48_2 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search36 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search48 = { { nir_search_value_expression, 32 }, false, nir_op_flrp, - { &search36_0.value, &search36_1.value, &search36_2.value }, + { &search48_0.value, &search48_1.value, &search48_2.value }, + NULL, }; -static const nir_search_variable replace36_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace48_0_0 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace36_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace48_0_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace36_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace48_0_1_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace36_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace48_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_fsub, - { &replace36_0_1_0.value, &replace36_0_1_1.value }, + { &replace48_0_1_0.value, &replace48_0_1_1.value }, + NULL, }; -static const nir_search_expression replace36_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace48_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace36_0_0.value, &replace36_0_1.value }, + { &replace48_0_0.value, &replace48_0_1.value }, + NULL, }; -static const nir_search_variable replace36_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace48_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace36 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace48 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, - { &replace36_0.value, &replace36_1.value }, + { &replace48_0.value, &replace48_1.value }, + NULL, }; -static const nir_search_variable search37_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search49_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search37_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search49_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search37_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search49_2 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search37 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search49 = { { nir_search_value_expression, 64 }, false, nir_op_flrp, - { &search37_0.value, &search37_1.value, &search37_2.value }, + { &search49_0.value, &search49_1.value, &search49_2.value }, + NULL, }; -static const nir_search_variable replace37_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace49_0_0 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace37_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace49_0_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace37_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace49_0_1_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace37_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace49_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_fsub, - { &replace37_0_1_0.value, &replace37_0_1_1.value }, + { &replace49_0_1_0.value, &replace49_0_1_1.value }, + NULL, }; -static const nir_search_expression replace37_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace49_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace37_0_0.value, &replace37_0_1.value }, + { &replace49_0_0.value, &replace49_0_1.value }, + NULL, }; -static const nir_search_variable replace37_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace49_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace37 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace49 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, - { &replace37_0.value, &replace37_1.value }, + { &replace49_0.value, &replace49_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_flrp_xforms[] = { - { &search31, &replace31.value, 0 }, - { &search32, &replace32.value, 0 }, - { &search33, &replace33.value, 0 }, - { &search34, &replace34.value, 0 }, - { &search35, &replace35.value, 1 }, - { &search36, &replace36.value, 1 }, - { &search37, &replace37.value, 2 }, + { &search42, &replace42.value, 0 }, + { &search43, &replace43.value, 0 }, + { &search44, &replace44.value, 0 }, + { &search45, &replace45.value, 0 }, + { &search46, &replace46.value, 2 }, + { &search47, &replace47.value, 0 }, + { &search48, &replace48.value, 2 }, + { &search49, &replace49.value, 3 }, }; -static const nir_search_variable search77_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search94_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search77_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search94_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search77_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search94_0 = { { nir_search_value_expression, 0 }, false, nir_op_flt, - { &search77_0_0.value, &search77_0_1.value }, + { &search94_0_0.value, &search94_0_1.value }, + NULL, }; -static const nir_search_variable search77_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search94_1_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search77_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search94_1_1 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search77_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search94_1 = { { nir_search_value_expression, 0 }, false, nir_op_flt, - { &search77_1_0.value, &search77_1_1.value }, + { &search94_1_0.value, &search94_1_1.value }, + NULL, }; -static const nir_search_expression search77 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search94 = { { nir_search_value_expression, 0 }, true, nir_op_ior, - { &search77_0.value, &search77_1.value }, + { &search94_0.value, &search94_1.value }, + NULL, }; -static const nir_search_variable replace77_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace94_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace77_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace94_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace77_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace94_1_1 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace77_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace94_1 = { { nir_search_value_expression, 0 }, false, nir_op_fmax, - { &replace77_1_0.value, &replace77_1_1.value }, + { &replace94_1_0.value, &replace94_1_1.value }, + NULL, }; -static const nir_search_expression replace77 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace94 = { { nir_search_value_expression, 0 }, false, nir_op_flt, - { &replace77_0.value, &replace77_1.value }, + { &replace94_0.value, &replace94_1.value }, + NULL, }; -static const nir_search_variable search78_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search95_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search78_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search95_0_1 = { { nir_search_value_variable, 0 }, 1, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search78_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search95_0 = { { nir_search_value_expression, 0 }, false, nir_op_flt, - { &search78_0_0.value, &search78_0_1.value }, + { &search95_0_0.value, &search95_0_1.value }, + NULL, }; -static const nir_search_variable search78_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search95_1_0 = { { nir_search_value_variable, 0 }, 2, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search78_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search95_1_1 = { { nir_search_value_variable, 0 }, 1, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search78_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search95_1 = { { nir_search_value_expression, 0 }, false, nir_op_flt, - { &search78_1_0.value, &search78_1_1.value }, + { &search95_1_0.value, &search95_1_1.value }, + NULL, }; -static const nir_search_expression search78 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search95 = { { nir_search_value_expression, 0 }, true, nir_op_ior, - { &search78_0.value, &search78_1.value }, + { &search95_0.value, &search95_1.value }, + NULL, }; -static const nir_search_variable replace78_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace95_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace78_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace95_0_1 = { { nir_search_value_variable, 0 }, 2, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace78_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace95_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmin, - { &replace78_0_0.value, &replace78_0_1.value }, + { &replace95_0_0.value, &replace95_0_1.value }, + NULL, }; -static const nir_search_variable replace78_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace95_1 = { { nir_search_value_variable, 0 }, 1, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace78 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace95 = { { nir_search_value_expression, 0 }, false, nir_op_flt, - { &replace78_0.value, &replace78_1.value }, + { &replace95_0.value, &replace95_1.value }, + NULL, }; -static const nir_search_variable search79_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search96_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search79_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search96_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search79_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search96_0 = { { nir_search_value_expression, 0 }, false, nir_op_fge, - { &search79_0_0.value, &search79_0_1.value }, + { &search96_0_0.value, &search96_0_1.value }, + NULL, }; -static const nir_search_variable search79_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search96_1_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search79_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search96_1_1 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search79_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search96_1 = { { nir_search_value_expression, 0 }, false, nir_op_fge, - { &search79_1_0.value, &search79_1_1.value }, + { &search96_1_0.value, &search96_1_1.value }, + NULL, }; -static const nir_search_expression search79 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search96 = { { nir_search_value_expression, 0 }, true, nir_op_ior, - { &search79_0.value, &search79_1.value }, + { &search96_0.value, &search96_1.value }, + NULL, }; -static const nir_search_variable replace79_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace96_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace79_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace96_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace79_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace96_1_1 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace79_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace96_1 = { { nir_search_value_expression, 0 }, false, nir_op_fmin, - { &replace79_1_0.value, &replace79_1_1.value }, + { &replace96_1_0.value, &replace96_1_1.value }, + NULL, }; -static const nir_search_expression replace79 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace96 = { { nir_search_value_expression, 0 }, false, nir_op_fge, - { &replace79_0.value, &replace79_1.value }, + { &replace96_0.value, &replace96_1.value }, + NULL, }; -static const nir_search_variable search80_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search97_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search80_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search97_0_1 = { { nir_search_value_variable, 0 }, 1, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search80_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search97_0 = { { nir_search_value_expression, 0 }, false, nir_op_fge, - { &search80_0_0.value, &search80_0_1.value }, + { &search97_0_0.value, &search97_0_1.value }, + NULL, }; -static const nir_search_variable search80_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search97_1_0 = { { nir_search_value_variable, 0 }, 2, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search80_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search97_1_1 = { { nir_search_value_variable, 0 }, 1, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search80_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search97_1 = { { nir_search_value_expression, 0 }, false, nir_op_fge, - { &search80_1_0.value, &search80_1_1.value }, + { &search97_1_0.value, &search97_1_1.value }, + NULL, }; -static const nir_search_expression search80 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search97 = { { nir_search_value_expression, 0 }, true, nir_op_ior, - { &search80_0.value, &search80_1.value }, + { &search97_0.value, &search97_1.value }, + NULL, }; -static const nir_search_variable replace80_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace97_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace80_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace97_0_1 = { { nir_search_value_variable, 0 }, 2, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace80_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace97_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmax, - { &replace80_0_0.value, &replace80_0_1.value }, + { &replace97_0_0.value, &replace97_0_1.value }, + NULL, }; -static const nir_search_variable replace80_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace97_1 = { { nir_search_value_variable, 0 }, 1, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace80 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace97 = { { nir_search_value_expression, 0 }, false, nir_op_fge, - { &replace80_0.value, &replace80_1.value }, + { &replace97_0.value, &replace97_1.value }, + NULL, }; -static const nir_search_variable search107_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search125_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search107_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search125_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search107 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search125 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search107_0.value, &search107_1.value }, + { &search125_0.value, &search125_1.value }, + NULL, }; -static const nir_search_variable replace107 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace125 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search108_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search126_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search108_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search126_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_expression search108 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search126 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search108_0.value, &search108_1.value }, + { &search126_0.value, &search126_1.value }, + NULL, }; -static const nir_search_variable replace108 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace126 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search114_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search127_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search114_0 = { + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search127_1 = { + { nir_search_value_constant, 32 }, + nir_type_bool32, { NIR_TRUE /* True */ }, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search127 = { + { nir_search_value_expression, 0 }, + false, + nir_op_ior, + { &search127_0.value, &search127_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace127 = { + { nir_search_value_constant, 32 }, + nir_type_bool32, { NIR_TRUE /* True */ }, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search133_0_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search133_0 = { { nir_search_value_expression, 0 }, false, nir_op_inot, - { &search114_0_0.value }, + { &search133_0_0.value }, + NULL, }; -static const nir_search_variable search114_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search133_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search114_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search133_1 = { { nir_search_value_expression, 0 }, false, nir_op_inot, - { &search114_1_0.value }, + { &search133_1_0.value }, + NULL, }; -static const nir_search_expression search114 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search133 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search114_0.value, &search114_1.value }, + { &search133_0.value, &search133_1.value }, + NULL, }; -static const nir_search_variable replace114_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace133_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace114_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace133_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace114_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace133_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &replace114_0_0.value, &replace114_0_1.value }, + { &replace133_0_0.value, &replace133_0_1.value }, + NULL, }; -static const nir_search_expression replace114 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace133 = { { nir_search_value_expression, 0 }, false, nir_op_inot, - { &replace114_0.value }, + { &replace133_0.value }, + NULL, }; -static const nir_search_variable search212_0_0_0_0_0_0_0_0_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_0_0_0_0_0_0_0_0_0_0_0_0_0_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_0_0_0_0_0_0_0_0_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_0_0_0_0_0_0_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_0_0_0_0_0_0_0_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0_0_0_0_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_0_0_0_0_0_0_0_0_0_0_0_0_0_0.value, &search212_0_0_0_0_0_0_0_0_0_0_0_0_0_1.value }, + { &search235_0_0_0_0_0_0_0_0_0_0_0_0_0_0.value, &search235_0_0_0_0_0_0_0_0_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_0_0_0_0_0_0_0_0_0_0_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_0_0_0_0_0_0_0_0_0_0_0_0_1_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_0_0_0_0_0_0_0_0_0_0_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_0_0_0_0_0_0_0_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_0_0_0_0_0_0_0_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0_0_0_0_0_0_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_0_0_0_0_0_0_0_0_0_0_0_0_1_0.value, &search212_0_0_0_0_0_0_0_0_0_0_0_0_1_1.value }, + { &search235_0_0_0_0_0_0_0_0_0_0_0_0_1_0.value, &search235_0_0_0_0_0_0_0_0_0_0_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_0_0_0_0_0_0_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0_0_0_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_0_0_0_0_0_0_0_0_0_0_0_0_0.value, &search212_0_0_0_0_0_0_0_0_0_0_0_0_1.value }, + { &search235_0_0_0_0_0_0_0_0_0_0_0_0_0.value, &search235_0_0_0_0_0_0_0_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_0_0_0_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_0_0_0_0_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xff00ff /* 16711935 */ }, }; -static const nir_search_expression search212_0_0_0_0_0_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0_0_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_0_0_0_0_0_0_0_0_0_0_0_0.value, &search212_0_0_0_0_0_0_0_0_0_0_0_1.value }, + { &search235_0_0_0_0_0_0_0_0_0_0_0_0.value, &search235_0_0_0_0_0_0_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_0_0_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_0_0_0_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x8 /* 8 */ }, }; -static const nir_search_expression search212_0_0_0_0_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_0_0_0_0_0_0_0_0_0_0_0.value, &search212_0_0_0_0_0_0_0_0_0_0_1.value }, + { &search235_0_0_0_0_0_0_0_0_0_0_0.value, &search235_0_0_0_0_0_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_0_0_0_0_0_0_0_0_0_1_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_0_0_0_0_0_0_0_0_0_1_0_0_0_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_0_0_0_0_0_0_0_0_0_1_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_0_0_0_0_0_0_1_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_0_0_0_0_0_0_0_0_0_1_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0_0_0_0_0_1_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_0_0_0_0_0_0_0_0_0_1_0_0_0_0.value, &search212_0_0_0_0_0_0_0_0_0_1_0_0_0_1.value }, + { &search235_0_0_0_0_0_0_0_0_0_1_0_0_0_0.value, &search235_0_0_0_0_0_0_0_0_0_1_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_0_0_0_0_0_0_0_0_0_1_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_0_0_0_0_0_0_0_0_0_1_0_0_1_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_0_0_0_0_0_0_0_0_0_1_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_0_0_0_0_0_0_1_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_0_0_0_0_0_0_0_0_0_1_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0_0_0_0_0_1_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_0_0_0_0_0_0_0_0_0_1_0_0_1_0.value, &search212_0_0_0_0_0_0_0_0_0_1_0_0_1_1.value }, + { &search235_0_0_0_0_0_0_0_0_0_1_0_0_1_0.value, &search235_0_0_0_0_0_0_0_0_0_1_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_0_0_0_0_0_0_0_0_0_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0_0_0_0_0_1_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_0_0_0_0_0_0_0_0_0_1_0_0_0.value, &search212_0_0_0_0_0_0_0_0_0_1_0_0_1.value }, + { &search235_0_0_0_0_0_0_0_0_0_1_0_0_0.value, &search235_0_0_0_0_0_0_0_0_0_1_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_0_0_0_0_0_0_1_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_0_0_0_0_0_0_1_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xff00ff00 /* 4278255360 */ }, }; -static const nir_search_expression search212_0_0_0_0_0_0_0_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0_0_0_0_0_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_0_0_0_0_0_0_0_0_0_1_0_0.value, &search212_0_0_0_0_0_0_0_0_0_1_0_1.value }, + { &search235_0_0_0_0_0_0_0_0_0_1_0_0.value, &search235_0_0_0_0_0_0_0_0_0_1_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_0_0_0_0_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_0_0_0_0_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x8 /* 8 */ }, }; -static const nir_search_expression search212_0_0_0_0_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0_0_0_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_0_0_0_0_0_0_0_0_0_1_0.value, &search212_0_0_0_0_0_0_0_0_0_1_1.value }, + { &search235_0_0_0_0_0_0_0_0_0_1_0.value, &search235_0_0_0_0_0_0_0_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_0_0_0_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_0_0_0_0_0_0_0_0_0_0.value, &search212_0_0_0_0_0_0_0_0_0_1.value }, + { &search235_0_0_0_0_0_0_0_0_0_0.value, &search235_0_0_0_0_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_0_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xf0f0f0f /* 252645135 */ }, }; -static const nir_search_expression search212_0_0_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_0_0_0_0_0_0_0_0_0.value, &search212_0_0_0_0_0_0_0_0_1.value }, + { &search235_0_0_0_0_0_0_0_0_0.value, &search235_0_0_0_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x4 /* 4 */ }, }; -static const nir_search_expression search212_0_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_0_0_0_0_0_0_0_0.value, &search212_0_0_0_0_0_0_0_1.value }, + { &search235_0_0_0_0_0_0_0_0.value, &search235_0_0_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_0_0_0_0_0_0_1_0_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_0_0_0_0_0_0_1_0_0_0_0_0_0_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_0_0_0_0_0_0_1_0_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_0_0_0_1_0_0_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_0_0_0_0_0_0_1_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0_0_1_0_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_0_0_0_0_0_0_1_0_0_0_0_0_0_0.value, &search212_0_0_0_0_0_0_1_0_0_0_0_0_0_1.value }, + { &search235_0_0_0_0_0_0_1_0_0_0_0_0_0_0.value, &search235_0_0_0_0_0_0_1_0_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_0_0_0_0_0_0_1_0_0_0_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_0_0_0_0_0_0_1_0_0_0_0_0_1_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_0_0_0_0_0_0_1_0_0_0_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_0_0_0_1_0_0_0_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_0_0_0_0_0_0_1_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0_0_1_0_0_0_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_0_0_0_0_0_0_1_0_0_0_0_0_1_0.value, &search212_0_0_0_0_0_0_1_0_0_0_0_0_1_1.value }, + { &search235_0_0_0_0_0_0_1_0_0_0_0_0_1_0.value, &search235_0_0_0_0_0_0_1_0_0_0_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_0_0_0_0_0_0_1_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0_0_1_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_0_0_0_0_0_0_1_0_0_0_0_0_0.value, &search212_0_0_0_0_0_0_1_0_0_0_0_0_1.value }, + { &search235_0_0_0_0_0_0_1_0_0_0_0_0_0.value, &search235_0_0_0_0_0_0_1_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_0_0_0_1_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_0_0_0_1_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xff00ff /* 16711935 */ }, }; -static const nir_search_expression search212_0_0_0_0_0_0_1_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0_0_1_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_0_0_0_0_0_0_1_0_0_0_0_0.value, &search212_0_0_0_0_0_0_1_0_0_0_0_1.value }, + { &search235_0_0_0_0_0_0_1_0_0_0_0_0.value, &search235_0_0_0_0_0_0_1_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_0_0_0_1_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_0_0_0_1_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x8 /* 8 */ }, }; -static const nir_search_expression search212_0_0_0_0_0_0_1_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0_0_1_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_0_0_0_0_0_0_1_0_0_0_0.value, &search212_0_0_0_0_0_0_1_0_0_0_1.value }, + { &search235_0_0_0_0_0_0_1_0_0_0_0.value, &search235_0_0_0_0_0_0_1_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_0_0_0_0_0_0_1_0_0_1_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_0_0_0_0_0_0_1_0_0_1_0_0_0_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_0_0_0_0_0_0_1_0_0_1_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_0_0_0_1_0_0_1_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_0_0_0_0_0_0_1_0_0_1_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0_0_1_0_0_1_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_0_0_0_0_0_0_1_0_0_1_0_0_0_0.value, &search212_0_0_0_0_0_0_1_0_0_1_0_0_0_1.value }, + { &search235_0_0_0_0_0_0_1_0_0_1_0_0_0_0.value, &search235_0_0_0_0_0_0_1_0_0_1_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_0_0_0_0_0_0_1_0_0_1_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_0_0_0_0_0_0_1_0_0_1_0_0_1_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_0_0_0_0_0_0_1_0_0_1_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_0_0_0_1_0_0_1_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_0_0_0_0_0_0_1_0_0_1_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0_0_1_0_0_1_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_0_0_0_0_0_0_1_0_0_1_0_0_1_0.value, &search212_0_0_0_0_0_0_1_0_0_1_0_0_1_1.value }, + { &search235_0_0_0_0_0_0_1_0_0_1_0_0_1_0.value, &search235_0_0_0_0_0_0_1_0_0_1_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_0_0_0_0_0_0_1_0_0_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0_0_1_0_0_1_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_0_0_0_0_0_0_1_0_0_1_0_0_0.value, &search212_0_0_0_0_0_0_1_0_0_1_0_0_1.value }, + { &search235_0_0_0_0_0_0_1_0_0_1_0_0_0.value, &search235_0_0_0_0_0_0_1_0_0_1_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_0_0_0_1_0_0_1_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_0_0_0_1_0_0_1_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xff00ff00 /* 4278255360 */ }, }; -static const nir_search_expression search212_0_0_0_0_0_0_1_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0_0_1_0_0_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_0_0_0_0_0_0_1_0_0_1_0_0.value, &search212_0_0_0_0_0_0_1_0_0_1_0_1.value }, + { &search235_0_0_0_0_0_0_1_0_0_1_0_0.value, &search235_0_0_0_0_0_0_1_0_0_1_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_0_0_0_1_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_0_0_0_1_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x8 /* 8 */ }, }; -static const nir_search_expression search212_0_0_0_0_0_0_1_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0_0_1_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_0_0_0_0_0_0_1_0_0_1_0.value, &search212_0_0_0_0_0_0_1_0_0_1_1.value }, + { &search235_0_0_0_0_0_0_1_0_0_1_0.value, &search235_0_0_0_0_0_0_1_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_0_0_0_0_0_0_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0_0_1_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_0_0_0_0_0_0_1_0_0_0.value, &search212_0_0_0_0_0_0_1_0_0_1.value }, + { &search235_0_0_0_0_0_0_1_0_0_0.value, &search235_0_0_0_0_0_0_1_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_0_0_0_1_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_0_0_0_1_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xf0f0f0f0 /* 4042322160 */ }, }; -static const nir_search_expression search212_0_0_0_0_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0_0_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_0_0_0_0_0_0_1_0_0.value, &search212_0_0_0_0_0_0_1_0_1.value }, + { &search235_0_0_0_0_0_0_1_0_0.value, &search235_0_0_0_0_0_0_1_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_0_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_0_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x4 /* 4 */ }, }; -static const nir_search_expression search212_0_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_0_0_0_0_0_0_1_0.value, &search212_0_0_0_0_0_0_1_1.value }, + { &search235_0_0_0_0_0_0_1_0.value, &search235_0_0_0_0_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_0_0_0_0_0_0_0.value, &search212_0_0_0_0_0_0_1.value }, + { &search235_0_0_0_0_0_0_0.value, &search235_0_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x33333333 /* 858993459 */ }, }; -static const nir_search_expression search212_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_0_0_0_0_0_0.value, &search212_0_0_0_0_0_1.value }, + { &search235_0_0_0_0_0_0.value, &search235_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x2 /* 2 */ }, }; -static const nir_search_expression search212_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_0_0_0_0_0.value, &search212_0_0_0_0_1.value }, + { &search235_0_0_0_0_0.value, &search235_0_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_0_0_0_1_0_0_0_0_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_0_0_0_1_0_0_0_0_0_0_0_0_0_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_0_0_0_1_0_0_0_0_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_1_0_0_0_0_0_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_0_0_0_1_0_0_0_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0_0_0_0_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_0_0_0_1_0_0_0_0_0_0_0_0_0_0.value, &search212_0_0_0_1_0_0_0_0_0_0_0_0_0_1.value }, + { &search235_0_0_0_1_0_0_0_0_0_0_0_0_0_0.value, &search235_0_0_0_1_0_0_0_0_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_0_0_0_1_0_0_0_0_0_0_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_0_0_0_1_0_0_0_0_0_0_0_0_1_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_0_0_0_1_0_0_0_0_0_0_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_1_0_0_0_0_0_0_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_0_0_0_1_0_0_0_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0_0_0_0_0_0_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_0_0_0_1_0_0_0_0_0_0_0_0_1_0.value, &search212_0_0_0_1_0_0_0_0_0_0_0_0_1_1.value }, + { &search235_0_0_0_1_0_0_0_0_0_0_0_0_1_0.value, &search235_0_0_0_1_0_0_0_0_0_0_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_0_0_0_1_0_0_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0_0_0_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_0_0_0_1_0_0_0_0_0_0_0_0_0.value, &search212_0_0_0_1_0_0_0_0_0_0_0_0_1.value }, + { &search235_0_0_0_1_0_0_0_0_0_0_0_0_0.value, &search235_0_0_0_1_0_0_0_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_1_0_0_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_1_0_0_0_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xff00ff /* 16711935 */ }, }; -static const nir_search_expression search212_0_0_0_1_0_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0_0_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_0_0_0_1_0_0_0_0_0_0_0_0.value, &search212_0_0_0_1_0_0_0_0_0_0_0_1.value }, + { &search235_0_0_0_1_0_0_0_0_0_0_0_0.value, &search235_0_0_0_1_0_0_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_1_0_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_1_0_0_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x8 /* 8 */ }, }; -static const nir_search_expression search212_0_0_0_1_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_0_0_0_1_0_0_0_0_0_0_0.value, &search212_0_0_0_1_0_0_0_0_0_0_1.value }, + { &search235_0_0_0_1_0_0_0_0_0_0_0.value, &search235_0_0_0_1_0_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_0_0_0_1_0_0_0_0_0_1_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_0_0_0_1_0_0_0_0_0_1_0_0_0_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_0_0_0_1_0_0_0_0_0_1_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_1_0_0_0_0_0_1_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_0_0_0_1_0_0_0_0_0_1_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0_0_0_0_0_1_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_0_0_0_1_0_0_0_0_0_1_0_0_0_0.value, &search212_0_0_0_1_0_0_0_0_0_1_0_0_0_1.value }, + { &search235_0_0_0_1_0_0_0_0_0_1_0_0_0_0.value, &search235_0_0_0_1_0_0_0_0_0_1_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_0_0_0_1_0_0_0_0_0_1_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_0_0_0_1_0_0_0_0_0_1_0_0_1_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_0_0_0_1_0_0_0_0_0_1_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_1_0_0_0_0_0_1_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_0_0_0_1_0_0_0_0_0_1_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0_0_0_0_0_1_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_0_0_0_1_0_0_0_0_0_1_0_0_1_0.value, &search212_0_0_0_1_0_0_0_0_0_1_0_0_1_1.value }, + { &search235_0_0_0_1_0_0_0_0_0_1_0_0_1_0.value, &search235_0_0_0_1_0_0_0_0_0_1_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_0_0_0_1_0_0_0_0_0_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0_0_0_0_0_1_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_0_0_0_1_0_0_0_0_0_1_0_0_0.value, &search212_0_0_0_1_0_0_0_0_0_1_0_0_1.value }, + { &search235_0_0_0_1_0_0_0_0_0_1_0_0_0.value, &search235_0_0_0_1_0_0_0_0_0_1_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_1_0_0_0_0_0_1_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_1_0_0_0_0_0_1_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xff00ff00 /* 4278255360 */ }, }; -static const nir_search_expression search212_0_0_0_1_0_0_0_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0_0_0_0_0_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_0_0_0_1_0_0_0_0_0_1_0_0.value, &search212_0_0_0_1_0_0_0_0_0_1_0_1.value }, + { &search235_0_0_0_1_0_0_0_0_0_1_0_0.value, &search235_0_0_0_1_0_0_0_0_0_1_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_1_0_0_0_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_1_0_0_0_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x8 /* 8 */ }, }; -static const nir_search_expression search212_0_0_0_1_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0_0_0_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_0_0_0_1_0_0_0_0_0_1_0.value, &search212_0_0_0_1_0_0_0_0_0_1_1.value }, + { &search235_0_0_0_1_0_0_0_0_0_1_0.value, &search235_0_0_0_1_0_0_0_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_0_0_0_1_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_0_0_0_1_0_0_0_0_0_0.value, &search212_0_0_0_1_0_0_0_0_0_1.value }, + { &search235_0_0_0_1_0_0_0_0_0_0.value, &search235_0_0_0_1_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_1_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_1_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xf0f0f0f /* 252645135 */ }, }; -static const nir_search_expression search212_0_0_0_1_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_0_0_0_1_0_0_0_0_0.value, &search212_0_0_0_1_0_0_0_0_1.value }, + { &search235_0_0_0_1_0_0_0_0_0.value, &search235_0_0_0_1_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_1_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_1_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x4 /* 4 */ }, }; -static const nir_search_expression search212_0_0_0_1_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_0_0_0_1_0_0_0_0.value, &search212_0_0_0_1_0_0_0_1.value }, + { &search235_0_0_0_1_0_0_0_0.value, &search235_0_0_0_1_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_0_0_0_1_0_0_1_0_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_0_0_0_1_0_0_1_0_0_0_0_0_0_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_0_0_0_1_0_0_1_0_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_1_0_0_1_0_0_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_0_0_0_1_0_0_1_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0_0_1_0_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_0_0_0_1_0_0_1_0_0_0_0_0_0_0.value, &search212_0_0_0_1_0_0_1_0_0_0_0_0_0_1.value }, + { &search235_0_0_0_1_0_0_1_0_0_0_0_0_0_0.value, &search235_0_0_0_1_0_0_1_0_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_0_0_0_1_0_0_1_0_0_0_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_0_0_0_1_0_0_1_0_0_0_0_0_1_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_0_0_0_1_0_0_1_0_0_0_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_1_0_0_1_0_0_0_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_0_0_0_1_0_0_1_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0_0_1_0_0_0_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_0_0_0_1_0_0_1_0_0_0_0_0_1_0.value, &search212_0_0_0_1_0_0_1_0_0_0_0_0_1_1.value }, + { &search235_0_0_0_1_0_0_1_0_0_0_0_0_1_0.value, &search235_0_0_0_1_0_0_1_0_0_0_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_0_0_0_1_0_0_1_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0_0_1_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_0_0_0_1_0_0_1_0_0_0_0_0_0.value, &search212_0_0_0_1_0_0_1_0_0_0_0_0_1.value }, + { &search235_0_0_0_1_0_0_1_0_0_0_0_0_0.value, &search235_0_0_0_1_0_0_1_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_1_0_0_1_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_1_0_0_1_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xff00ff /* 16711935 */ }, }; -static const nir_search_expression search212_0_0_0_1_0_0_1_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0_0_1_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_0_0_0_1_0_0_1_0_0_0_0_0.value, &search212_0_0_0_1_0_0_1_0_0_0_0_1.value }, + { &search235_0_0_0_1_0_0_1_0_0_0_0_0.value, &search235_0_0_0_1_0_0_1_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_1_0_0_1_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_1_0_0_1_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x8 /* 8 */ }, }; -static const nir_search_expression search212_0_0_0_1_0_0_1_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0_0_1_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_0_0_0_1_0_0_1_0_0_0_0.value, &search212_0_0_0_1_0_0_1_0_0_0_1.value }, + { &search235_0_0_0_1_0_0_1_0_0_0_0.value, &search235_0_0_0_1_0_0_1_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_0_0_0_1_0_0_1_0_0_1_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_0_0_0_1_0_0_1_0_0_1_0_0_0_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_0_0_0_1_0_0_1_0_0_1_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_1_0_0_1_0_0_1_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_0_0_0_1_0_0_1_0_0_1_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0_0_1_0_0_1_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_0_0_0_1_0_0_1_0_0_1_0_0_0_0.value, &search212_0_0_0_1_0_0_1_0_0_1_0_0_0_1.value }, + { &search235_0_0_0_1_0_0_1_0_0_1_0_0_0_0.value, &search235_0_0_0_1_0_0_1_0_0_1_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_0_0_0_1_0_0_1_0_0_1_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_0_0_0_1_0_0_1_0_0_1_0_0_1_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_0_0_0_1_0_0_1_0_0_1_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_1_0_0_1_0_0_1_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_0_0_0_1_0_0_1_0_0_1_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0_0_1_0_0_1_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_0_0_0_1_0_0_1_0_0_1_0_0_1_0.value, &search212_0_0_0_1_0_0_1_0_0_1_0_0_1_1.value }, + { &search235_0_0_0_1_0_0_1_0_0_1_0_0_1_0.value, &search235_0_0_0_1_0_0_1_0_0_1_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_0_0_0_1_0_0_1_0_0_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0_0_1_0_0_1_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_0_0_0_1_0_0_1_0_0_1_0_0_0.value, &search212_0_0_0_1_0_0_1_0_0_1_0_0_1.value }, + { &search235_0_0_0_1_0_0_1_0_0_1_0_0_0.value, &search235_0_0_0_1_0_0_1_0_0_1_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_1_0_0_1_0_0_1_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_1_0_0_1_0_0_1_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xff00ff00 /* 4278255360 */ }, }; -static const nir_search_expression search212_0_0_0_1_0_0_1_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0_0_1_0_0_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_0_0_0_1_0_0_1_0_0_1_0_0.value, &search212_0_0_0_1_0_0_1_0_0_1_0_1.value }, + { &search235_0_0_0_1_0_0_1_0_0_1_0_0.value, &search235_0_0_0_1_0_0_1_0_0_1_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_1_0_0_1_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_1_0_0_1_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x8 /* 8 */ }, }; -static const nir_search_expression search212_0_0_0_1_0_0_1_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0_0_1_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_0_0_0_1_0_0_1_0_0_1_0.value, &search212_0_0_0_1_0_0_1_0_0_1_1.value }, + { &search235_0_0_0_1_0_0_1_0_0_1_0.value, &search235_0_0_0_1_0_0_1_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_0_0_0_1_0_0_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0_0_1_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_0_0_0_1_0_0_1_0_0_0.value, &search212_0_0_0_1_0_0_1_0_0_1.value }, + { &search235_0_0_0_1_0_0_1_0_0_0.value, &search235_0_0_0_1_0_0_1_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_1_0_0_1_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_1_0_0_1_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xf0f0f0f0 /* 4042322160 */ }, }; -static const nir_search_expression search212_0_0_0_1_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0_0_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_0_0_0_1_0_0_1_0_0.value, &search212_0_0_0_1_0_0_1_0_1.value }, + { &search235_0_0_0_1_0_0_1_0_0.value, &search235_0_0_0_1_0_0_1_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_1_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_1_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x4 /* 4 */ }, }; -static const nir_search_expression search212_0_0_0_1_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_0_0_0_1_0_0_1_0.value, &search212_0_0_0_1_0_0_1_1.value }, + { &search235_0_0_0_1_0_0_1_0.value, &search235_0_0_0_1_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_0_0_0_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_0_0_0_1_0_0_0.value, &search212_0_0_0_1_0_0_1.value }, + { &search235_0_0_0_1_0_0_0.value, &search235_0_0_0_1_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_1_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_1_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xcccccccc /* 3435973836 */ }, }; -static const nir_search_expression search212_0_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_0_0_0_1_0_0.value, &search212_0_0_0_1_0_1.value }, + { &search235_0_0_0_1_0_0.value, &search235_0_0_0_1_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x2 /* 2 */ }, }; -static const nir_search_expression search212_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_0_0_0_1_0.value, &search212_0_0_0_1_1.value }, + { &search235_0_0_0_1_0.value, &search235_0_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_0_0_0_0.value, &search212_0_0_0_1.value }, + { &search235_0_0_0_0.value, &search235_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x55555555 /* 1431655765 */ }, }; -static const nir_search_expression search212_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_0_0_0.value, &search212_0_0_1.value }, + { &search235_0_0_0.value, &search235_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x1 /* 1 */ }, }; -static const nir_search_expression search212_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_0_0.value, &search212_0_1.value }, + { &search235_0_0.value, &search235_0_1.value }, + NULL, }; -static const nir_search_variable search212_1_0_0_0_0_0_0_0_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_1_0_0_0_0_0_0_0_0_0_0_0_0_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_1_0_0_0_0_0_0_0_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_0_0_0_0_0_0_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_1_0_0_0_0_0_0_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0_0_0_0_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_1_0_0_0_0_0_0_0_0_0_0_0_0_0.value, &search212_1_0_0_0_0_0_0_0_0_0_0_0_0_1.value }, + { &search235_1_0_0_0_0_0_0_0_0_0_0_0_0_0.value, &search235_1_0_0_0_0_0_0_0_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_1_0_0_0_0_0_0_0_0_0_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_1_0_0_0_0_0_0_0_0_0_0_0_1_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_1_0_0_0_0_0_0_0_0_0_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_0_0_0_0_0_0_0_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_1_0_0_0_0_0_0_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0_0_0_0_0_0_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_1_0_0_0_0_0_0_0_0_0_0_0_1_0.value, &search212_1_0_0_0_0_0_0_0_0_0_0_0_1_1.value }, + { &search235_1_0_0_0_0_0_0_0_0_0_0_0_1_0.value, &search235_1_0_0_0_0_0_0_0_0_0_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_1_0_0_0_0_0_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0_0_0_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_1_0_0_0_0_0_0_0_0_0_0_0_0.value, &search212_1_0_0_0_0_0_0_0_0_0_0_0_1.value }, + { &search235_1_0_0_0_0_0_0_0_0_0_0_0_0.value, &search235_1_0_0_0_0_0_0_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_0_0_0_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_0_0_0_0_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xff00ff /* 16711935 */ }, }; -static const nir_search_expression search212_1_0_0_0_0_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0_0_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_1_0_0_0_0_0_0_0_0_0_0_0.value, &search212_1_0_0_0_0_0_0_0_0_0_0_1.value }, + { &search235_1_0_0_0_0_0_0_0_0_0_0_0.value, &search235_1_0_0_0_0_0_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_0_0_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_0_0_0_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x8 /* 8 */ }, }; -static const nir_search_expression search212_1_0_0_0_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_1_0_0_0_0_0_0_0_0_0_0.value, &search212_1_0_0_0_0_0_0_0_0_0_1.value }, + { &search235_1_0_0_0_0_0_0_0_0_0_0.value, &search235_1_0_0_0_0_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_1_0_0_0_0_0_0_0_0_1_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_1_0_0_0_0_0_0_0_0_1_0_0_0_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_1_0_0_0_0_0_0_0_0_1_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_0_0_0_0_0_0_1_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_1_0_0_0_0_0_0_0_0_1_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0_0_0_0_0_1_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_1_0_0_0_0_0_0_0_0_1_0_0_0_0.value, &search212_1_0_0_0_0_0_0_0_0_1_0_0_0_1.value }, + { &search235_1_0_0_0_0_0_0_0_0_1_0_0_0_0.value, &search235_1_0_0_0_0_0_0_0_0_1_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_1_0_0_0_0_0_0_0_0_1_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_1_0_0_0_0_0_0_0_0_1_0_0_1_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_1_0_0_0_0_0_0_0_0_1_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_0_0_0_0_0_0_1_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_1_0_0_0_0_0_0_0_0_1_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0_0_0_0_0_1_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_1_0_0_0_0_0_0_0_0_1_0_0_1_0.value, &search212_1_0_0_0_0_0_0_0_0_1_0_0_1_1.value }, + { &search235_1_0_0_0_0_0_0_0_0_1_0_0_1_0.value, &search235_1_0_0_0_0_0_0_0_0_1_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_1_0_0_0_0_0_0_0_0_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0_0_0_0_0_1_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_1_0_0_0_0_0_0_0_0_1_0_0_0.value, &search212_1_0_0_0_0_0_0_0_0_1_0_0_1.value }, + { &search235_1_0_0_0_0_0_0_0_0_1_0_0_0.value, &search235_1_0_0_0_0_0_0_0_0_1_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_0_0_0_0_0_0_1_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_0_0_0_0_0_0_1_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xff00ff00 /* 4278255360 */ }, }; -static const nir_search_expression search212_1_0_0_0_0_0_0_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0_0_0_0_0_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_1_0_0_0_0_0_0_0_0_1_0_0.value, &search212_1_0_0_0_0_0_0_0_0_1_0_1.value }, + { &search235_1_0_0_0_0_0_0_0_0_1_0_0.value, &search235_1_0_0_0_0_0_0_0_0_1_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_0_0_0_0_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_0_0_0_0_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x8 /* 8 */ }, }; -static const nir_search_expression search212_1_0_0_0_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0_0_0_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_1_0_0_0_0_0_0_0_0_1_0.value, &search212_1_0_0_0_0_0_0_0_0_1_1.value }, + { &search235_1_0_0_0_0_0_0_0_0_1_0.value, &search235_1_0_0_0_0_0_0_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_1_0_0_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_1_0_0_0_0_0_0_0_0_0.value, &search212_1_0_0_0_0_0_0_0_0_1.value }, + { &search235_1_0_0_0_0_0_0_0_0_0.value, &search235_1_0_0_0_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_0_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xf0f0f0f /* 252645135 */ }, }; -static const nir_search_expression search212_1_0_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_1_0_0_0_0_0_0_0_0.value, &search212_1_0_0_0_0_0_0_0_1.value }, + { &search235_1_0_0_0_0_0_0_0_0.value, &search235_1_0_0_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x4 /* 4 */ }, }; -static const nir_search_expression search212_1_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_1_0_0_0_0_0_0_0.value, &search212_1_0_0_0_0_0_0_1.value }, + { &search235_1_0_0_0_0_0_0_0.value, &search235_1_0_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_1_0_0_0_0_0_1_0_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_1_0_0_0_0_0_1_0_0_0_0_0_0_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_1_0_0_0_0_0_1_0_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_0_0_0_1_0_0_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_1_0_0_0_0_0_1_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0_0_1_0_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_1_0_0_0_0_0_1_0_0_0_0_0_0_0.value, &search212_1_0_0_0_0_0_1_0_0_0_0_0_0_1.value }, + { &search235_1_0_0_0_0_0_1_0_0_0_0_0_0_0.value, &search235_1_0_0_0_0_0_1_0_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_1_0_0_0_0_0_1_0_0_0_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_1_0_0_0_0_0_1_0_0_0_0_0_1_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_1_0_0_0_0_0_1_0_0_0_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_0_0_0_1_0_0_0_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_1_0_0_0_0_0_1_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0_0_1_0_0_0_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_1_0_0_0_0_0_1_0_0_0_0_0_1_0.value, &search212_1_0_0_0_0_0_1_0_0_0_0_0_1_1.value }, + { &search235_1_0_0_0_0_0_1_0_0_0_0_0_1_0.value, &search235_1_0_0_0_0_0_1_0_0_0_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_1_0_0_0_0_0_1_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0_0_1_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_1_0_0_0_0_0_1_0_0_0_0_0_0.value, &search212_1_0_0_0_0_0_1_0_0_0_0_0_1.value }, + { &search235_1_0_0_0_0_0_1_0_0_0_0_0_0.value, &search235_1_0_0_0_0_0_1_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_0_0_0_1_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_0_0_0_1_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xff00ff /* 16711935 */ }, }; -static const nir_search_expression search212_1_0_0_0_0_0_1_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0_0_1_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_1_0_0_0_0_0_1_0_0_0_0_0.value, &search212_1_0_0_0_0_0_1_0_0_0_0_1.value }, + { &search235_1_0_0_0_0_0_1_0_0_0_0_0.value, &search235_1_0_0_0_0_0_1_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_0_0_0_1_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_0_0_0_1_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x8 /* 8 */ }, }; -static const nir_search_expression search212_1_0_0_0_0_0_1_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0_0_1_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_1_0_0_0_0_0_1_0_0_0_0.value, &search212_1_0_0_0_0_0_1_0_0_0_1.value }, + { &search235_1_0_0_0_0_0_1_0_0_0_0.value, &search235_1_0_0_0_0_0_1_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_1_0_0_0_0_0_1_0_0_1_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_1_0_0_0_0_0_1_0_0_1_0_0_0_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_1_0_0_0_0_0_1_0_0_1_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_0_0_0_1_0_0_1_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_1_0_0_0_0_0_1_0_0_1_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0_0_1_0_0_1_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_1_0_0_0_0_0_1_0_0_1_0_0_0_0.value, &search212_1_0_0_0_0_0_1_0_0_1_0_0_0_1.value }, + { &search235_1_0_0_0_0_0_1_0_0_1_0_0_0_0.value, &search235_1_0_0_0_0_0_1_0_0_1_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_1_0_0_0_0_0_1_0_0_1_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_1_0_0_0_0_0_1_0_0_1_0_0_1_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_1_0_0_0_0_0_1_0_0_1_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_0_0_0_1_0_0_1_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_1_0_0_0_0_0_1_0_0_1_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0_0_1_0_0_1_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_1_0_0_0_0_0_1_0_0_1_0_0_1_0.value, &search212_1_0_0_0_0_0_1_0_0_1_0_0_1_1.value }, + { &search235_1_0_0_0_0_0_1_0_0_1_0_0_1_0.value, &search235_1_0_0_0_0_0_1_0_0_1_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_1_0_0_0_0_0_1_0_0_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0_0_1_0_0_1_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_1_0_0_0_0_0_1_0_0_1_0_0_0.value, &search212_1_0_0_0_0_0_1_0_0_1_0_0_1.value }, + { &search235_1_0_0_0_0_0_1_0_0_1_0_0_0.value, &search235_1_0_0_0_0_0_1_0_0_1_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_0_0_0_1_0_0_1_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_0_0_0_1_0_0_1_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xff00ff00 /* 4278255360 */ }, }; -static const nir_search_expression search212_1_0_0_0_0_0_1_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0_0_1_0_0_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_1_0_0_0_0_0_1_0_0_1_0_0.value, &search212_1_0_0_0_0_0_1_0_0_1_0_1.value }, + { &search235_1_0_0_0_0_0_1_0_0_1_0_0.value, &search235_1_0_0_0_0_0_1_0_0_1_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_0_0_0_1_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_0_0_0_1_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x8 /* 8 */ }, }; -static const nir_search_expression search212_1_0_0_0_0_0_1_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0_0_1_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_1_0_0_0_0_0_1_0_0_1_0.value, &search212_1_0_0_0_0_0_1_0_0_1_1.value }, + { &search235_1_0_0_0_0_0_1_0_0_1_0.value, &search235_1_0_0_0_0_0_1_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_1_0_0_0_0_0_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0_0_1_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_1_0_0_0_0_0_1_0_0_0.value, &search212_1_0_0_0_0_0_1_0_0_1.value }, + { &search235_1_0_0_0_0_0_1_0_0_0.value, &search235_1_0_0_0_0_0_1_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_0_0_0_1_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_0_0_0_1_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xf0f0f0f0 /* 4042322160 */ }, }; -static const nir_search_expression search212_1_0_0_0_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0_0_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_1_0_0_0_0_0_1_0_0.value, &search212_1_0_0_0_0_0_1_0_1.value }, + { &search235_1_0_0_0_0_0_1_0_0.value, &search235_1_0_0_0_0_0_1_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_0_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_0_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x4 /* 4 */ }, }; -static const nir_search_expression search212_1_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_1_0_0_0_0_0_1_0.value, &search212_1_0_0_0_0_0_1_1.value }, + { &search235_1_0_0_0_0_0_1_0.value, &search235_1_0_0_0_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_1_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_1_0_0_0_0_0_0.value, &search212_1_0_0_0_0_0_1.value }, + { &search235_1_0_0_0_0_0_0.value, &search235_1_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x33333333 /* 858993459 */ }, }; -static const nir_search_expression search212_1_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_1_0_0_0_0_0.value, &search212_1_0_0_0_0_1.value }, + { &search235_1_0_0_0_0_0.value, &search235_1_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x2 /* 2 */ }, }; -static const nir_search_expression search212_1_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_1_0_0_0_0.value, &search212_1_0_0_0_1.value }, + { &search235_1_0_0_0_0.value, &search235_1_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_1_0_0_1_0_0_0_0_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_1_0_0_1_0_0_0_0_0_0_0_0_0_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_1_0_0_1_0_0_0_0_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_1_0_0_0_0_0_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_1_0_0_1_0_0_0_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0_0_0_0_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_1_0_0_1_0_0_0_0_0_0_0_0_0_0.value, &search212_1_0_0_1_0_0_0_0_0_0_0_0_0_1.value }, + { &search235_1_0_0_1_0_0_0_0_0_0_0_0_0_0.value, &search235_1_0_0_1_0_0_0_0_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_1_0_0_1_0_0_0_0_0_0_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_1_0_0_1_0_0_0_0_0_0_0_0_1_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_1_0_0_1_0_0_0_0_0_0_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_1_0_0_0_0_0_0_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_1_0_0_1_0_0_0_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0_0_0_0_0_0_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_1_0_0_1_0_0_0_0_0_0_0_0_1_0.value, &search212_1_0_0_1_0_0_0_0_0_0_0_0_1_1.value }, + { &search235_1_0_0_1_0_0_0_0_0_0_0_0_1_0.value, &search235_1_0_0_1_0_0_0_0_0_0_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_1_0_0_1_0_0_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0_0_0_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_1_0_0_1_0_0_0_0_0_0_0_0_0.value, &search212_1_0_0_1_0_0_0_0_0_0_0_0_1.value }, + { &search235_1_0_0_1_0_0_0_0_0_0_0_0_0.value, &search235_1_0_0_1_0_0_0_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_1_0_0_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_1_0_0_0_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xff00ff /* 16711935 */ }, }; -static const nir_search_expression search212_1_0_0_1_0_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0_0_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_1_0_0_1_0_0_0_0_0_0_0_0.value, &search212_1_0_0_1_0_0_0_0_0_0_0_1.value }, + { &search235_1_0_0_1_0_0_0_0_0_0_0_0.value, &search235_1_0_0_1_0_0_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_1_0_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_1_0_0_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x8 /* 8 */ }, }; -static const nir_search_expression search212_1_0_0_1_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_1_0_0_1_0_0_0_0_0_0_0.value, &search212_1_0_0_1_0_0_0_0_0_0_1.value }, + { &search235_1_0_0_1_0_0_0_0_0_0_0.value, &search235_1_0_0_1_0_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_1_0_0_1_0_0_0_0_0_1_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_1_0_0_1_0_0_0_0_0_1_0_0_0_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_1_0_0_1_0_0_0_0_0_1_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_1_0_0_0_0_0_1_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_1_0_0_1_0_0_0_0_0_1_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0_0_0_0_0_1_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_1_0_0_1_0_0_0_0_0_1_0_0_0_0.value, &search212_1_0_0_1_0_0_0_0_0_1_0_0_0_1.value }, + { &search235_1_0_0_1_0_0_0_0_0_1_0_0_0_0.value, &search235_1_0_0_1_0_0_0_0_0_1_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_1_0_0_1_0_0_0_0_0_1_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_1_0_0_1_0_0_0_0_0_1_0_0_1_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_1_0_0_1_0_0_0_0_0_1_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_1_0_0_0_0_0_1_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_1_0_0_1_0_0_0_0_0_1_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0_0_0_0_0_1_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_1_0_0_1_0_0_0_0_0_1_0_0_1_0.value, &search212_1_0_0_1_0_0_0_0_0_1_0_0_1_1.value }, + { &search235_1_0_0_1_0_0_0_0_0_1_0_0_1_0.value, &search235_1_0_0_1_0_0_0_0_0_1_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_1_0_0_1_0_0_0_0_0_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0_0_0_0_0_1_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_1_0_0_1_0_0_0_0_0_1_0_0_0.value, &search212_1_0_0_1_0_0_0_0_0_1_0_0_1.value }, + { &search235_1_0_0_1_0_0_0_0_0_1_0_0_0.value, &search235_1_0_0_1_0_0_0_0_0_1_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_1_0_0_0_0_0_1_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_1_0_0_0_0_0_1_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xff00ff00 /* 4278255360 */ }, }; -static const nir_search_expression search212_1_0_0_1_0_0_0_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0_0_0_0_0_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_1_0_0_1_0_0_0_0_0_1_0_0.value, &search212_1_0_0_1_0_0_0_0_0_1_0_1.value }, + { &search235_1_0_0_1_0_0_0_0_0_1_0_0.value, &search235_1_0_0_1_0_0_0_0_0_1_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_1_0_0_0_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_1_0_0_0_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x8 /* 8 */ }, }; -static const nir_search_expression search212_1_0_0_1_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0_0_0_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_1_0_0_1_0_0_0_0_0_1_0.value, &search212_1_0_0_1_0_0_0_0_0_1_1.value }, + { &search235_1_0_0_1_0_0_0_0_0_1_0.value, &search235_1_0_0_1_0_0_0_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_1_0_0_1_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_1_0_0_1_0_0_0_0_0_0.value, &search212_1_0_0_1_0_0_0_0_0_1.value }, + { &search235_1_0_0_1_0_0_0_0_0_0.value, &search235_1_0_0_1_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_1_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_1_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xf0f0f0f /* 252645135 */ }, }; -static const nir_search_expression search212_1_0_0_1_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_1_0_0_1_0_0_0_0_0.value, &search212_1_0_0_1_0_0_0_0_1.value }, + { &search235_1_0_0_1_0_0_0_0_0.value, &search235_1_0_0_1_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_1_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_1_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x4 /* 4 */ }, }; -static const nir_search_expression search212_1_0_0_1_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_1_0_0_1_0_0_0_0.value, &search212_1_0_0_1_0_0_0_1.value }, + { &search235_1_0_0_1_0_0_0_0.value, &search235_1_0_0_1_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_1_0_0_1_0_0_1_0_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_1_0_0_1_0_0_1_0_0_0_0_0_0_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_1_0_0_1_0_0_1_0_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_1_0_0_1_0_0_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_1_0_0_1_0_0_1_0_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0_0_1_0_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_1_0_0_1_0_0_1_0_0_0_0_0_0_0.value, &search212_1_0_0_1_0_0_1_0_0_0_0_0_0_1.value }, + { &search235_1_0_0_1_0_0_1_0_0_0_0_0_0_0.value, &search235_1_0_0_1_0_0_1_0_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_1_0_0_1_0_0_1_0_0_0_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_1_0_0_1_0_0_1_0_0_0_0_0_1_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_1_0_0_1_0_0_1_0_0_0_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_1_0_0_1_0_0_0_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_1_0_0_1_0_0_1_0_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0_0_1_0_0_0_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_1_0_0_1_0_0_1_0_0_0_0_0_1_0.value, &search212_1_0_0_1_0_0_1_0_0_0_0_0_1_1.value }, + { &search235_1_0_0_1_0_0_1_0_0_0_0_0_1_0.value, &search235_1_0_0_1_0_0_1_0_0_0_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_1_0_0_1_0_0_1_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0_0_1_0_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_1_0_0_1_0_0_1_0_0_0_0_0_0.value, &search212_1_0_0_1_0_0_1_0_0_0_0_0_1.value }, + { &search235_1_0_0_1_0_0_1_0_0_0_0_0_0.value, &search235_1_0_0_1_0_0_1_0_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_1_0_0_1_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_1_0_0_1_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xff00ff /* 16711935 */ }, }; -static const nir_search_expression search212_1_0_0_1_0_0_1_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0_0_1_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_1_0_0_1_0_0_1_0_0_0_0_0.value, &search212_1_0_0_1_0_0_1_0_0_0_0_1.value }, + { &search235_1_0_0_1_0_0_1_0_0_0_0_0.value, &search235_1_0_0_1_0_0_1_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_1_0_0_1_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_1_0_0_1_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x8 /* 8 */ }, }; -static const nir_search_expression search212_1_0_0_1_0_0_1_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0_0_1_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_1_0_0_1_0_0_1_0_0_0_0.value, &search212_1_0_0_1_0_0_1_0_0_0_1.value }, + { &search235_1_0_0_1_0_0_1_0_0_0_0.value, &search235_1_0_0_1_0_0_1_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_1_0_0_1_0_0_1_0_0_1_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_1_0_0_1_0_0_1_0_0_1_0_0_0_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_1_0_0_1_0_0_1_0_0_1_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_1_0_0_1_0_0_1_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_1_0_0_1_0_0_1_0_0_1_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0_0_1_0_0_1_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &search212_1_0_0_1_0_0_1_0_0_1_0_0_0_0.value, &search212_1_0_0_1_0_0_1_0_0_1_0_0_0_1.value }, + { &search235_1_0_0_1_0_0_1_0_0_1_0_0_0_0.value, &search235_1_0_0_1_0_0_1_0_0_1_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search212_1_0_0_1_0_0_1_0_0_1_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search235_1_0_0_1_0_0_1_0_0_1_0_0_1_0 = { { nir_search_value_variable, 32 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search212_1_0_0_1_0_0_1_0_0_1_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_1_0_0_1_0_0_1_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search212_1_0_0_1_0_0_1_0_0_1_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0_0_1_0_0_1_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_1_0_0_1_0_0_1_0_0_1_0_0_1_0.value, &search212_1_0_0_1_0_0_1_0_0_1_0_0_1_1.value }, + { &search235_1_0_0_1_0_0_1_0_0_1_0_0_1_0.value, &search235_1_0_0_1_0_0_1_0_0_1_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_1_0_0_1_0_0_1_0_0_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0_0_1_0_0_1_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_1_0_0_1_0_0_1_0_0_1_0_0_0.value, &search212_1_0_0_1_0_0_1_0_0_1_0_0_1.value }, + { &search235_1_0_0_1_0_0_1_0_0_1_0_0_0.value, &search235_1_0_0_1_0_0_1_0_0_1_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_1_0_0_1_0_0_1_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_1_0_0_1_0_0_1_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xff00ff00 /* 4278255360 */ }, }; -static const nir_search_expression search212_1_0_0_1_0_0_1_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0_0_1_0_0_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_1_0_0_1_0_0_1_0_0_1_0_0.value, &search212_1_0_0_1_0_0_1_0_0_1_0_1.value }, + { &search235_1_0_0_1_0_0_1_0_0_1_0_0.value, &search235_1_0_0_1_0_0_1_0_0_1_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_1_0_0_1_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_1_0_0_1_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x8 /* 8 */ }, }; -static const nir_search_expression search212_1_0_0_1_0_0_1_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0_0_1_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_1_0_0_1_0_0_1_0_0_1_0.value, &search212_1_0_0_1_0_0_1_0_0_1_1.value }, + { &search235_1_0_0_1_0_0_1_0_0_1_0.value, &search235_1_0_0_1_0_0_1_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_1_0_0_1_0_0_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0_0_1_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_1_0_0_1_0_0_1_0_0_0.value, &search212_1_0_0_1_0_0_1_0_0_1.value }, + { &search235_1_0_0_1_0_0_1_0_0_0.value, &search235_1_0_0_1_0_0_1_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_1_0_0_1_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_1_0_0_1_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xf0f0f0f0 /* 4042322160 */ }, }; -static const nir_search_expression search212_1_0_0_1_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0_0_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_1_0_0_1_0_0_1_0_0.value, &search212_1_0_0_1_0_0_1_0_1.value }, + { &search235_1_0_0_1_0_0_1_0_0.value, &search235_1_0_0_1_0_0_1_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_1_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_1_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x4 /* 4 */ }, }; -static const nir_search_expression search212_1_0_0_1_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_1_0_0_1_0_0_1_0.value, &search212_1_0_0_1_0_0_1_1.value }, + { &search235_1_0_0_1_0_0_1_0.value, &search235_1_0_0_1_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_1_0_0_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_1_0_0_1_0_0_0.value, &search212_1_0_0_1_0_0_1.value }, + { &search235_1_0_0_1_0_0_0.value, &search235_1_0_0_1_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_1_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_1_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xcccccccc /* 3435973836 */ }, }; -static const nir_search_expression search212_1_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_1_0_0_1_0_0.value, &search212_1_0_0_1_0_1.value }, + { &search235_1_0_0_1_0_0.value, &search235_1_0_0_1_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x2 /* 2 */ }, }; -static const nir_search_expression search212_1_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_1_0_0_1_0.value, &search212_1_0_0_1_1.value }, + { &search235_1_0_0_1_0.value, &search235_1_0_0_1_1.value }, + NULL, }; -static const nir_search_expression search212_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_1_0_0_0.value, &search212_1_0_0_1.value }, + { &search235_1_0_0_0.value, &search235_1_0_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xaaaaaaaa /* 2863311530 */ }, }; -static const nir_search_expression search212_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &search212_1_0_0.value, &search212_1_0_1.value }, + { &search235_1_0_0.value, &search235_1_0_1.value }, + NULL, }; -static const nir_search_constant search212_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search235_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x1 /* 1 */ }, }; -static const nir_search_expression search212_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235_1 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search212_1_0.value, &search212_1_1.value }, + { &search235_1_0.value, &search235_1_1.value }, + NULL, }; -static const nir_search_expression search212 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search235 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &search212_0.value, &search212_1.value }, + { &search235_0.value, &search235_1.value }, + NULL, }; -static const nir_search_variable replace212_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace235_0 = { { nir_search_value_variable, 0 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace212 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace235 = { { nir_search_value_expression, 0 }, false, - nir_op_bitfield_reverse, - { &replace212_0.value }, -}; - -static const struct transform nir_opt_algebraic_ior_xforms[] = { - { &search77, &replace77.value, 0 }, - { &search78, &replace78.value, 0 }, - { &search79, &replace79.value, 0 }, - { &search80, &replace80.value, 0 }, - { &search107, &replace107.value, 0 }, - { &search108, &replace108.value, 0 }, - { &search114, &replace114.value, 0 }, - { &search212, &replace212.value, 0 }, + nir_op_bitfield_reverse, + { &replace235_0.value }, + NULL, +}; + +static const struct transform nir_opt_algebraic_ior_xforms[] = { + { &search94, &replace94.value, 0 }, + { &search95, &replace95.value, 0 }, + { &search96, &replace96.value, 0 }, + { &search97, &replace97.value, 0 }, + { &search125, &replace125.value, 0 }, + { &search126, &replace126.value, 0 }, + { &search127, &replace127.value, 0 }, + { &search133, &replace133.value, 0 }, + { &search235, &replace235.value, 0 }, }; -static const nir_search_variable search174_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search197_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search174_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search197_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_expression search174 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search197 = { { nir_search_value_expression, 0 }, false, nir_op_ussub_4x8, - { &search174_0.value, &search174_1.value }, + { &search197_0.value, &search197_1.value }, + NULL, }; -static const nir_search_variable replace174 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace197 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search175_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search198_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search175_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search198_1 = { { nir_search_value_constant, 0 }, nir_type_int, { -0x1 /* -1 */ }, }; -static const nir_search_expression search175 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search198 = { { nir_search_value_expression, 0 }, false, nir_op_ussub_4x8, - { &search175_0.value, &search175_1.value }, + { &search198_0.value, &search198_1.value }, + NULL, }; -static const nir_search_constant replace175 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace198 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; static const struct transform nir_opt_algebraic_ussub_4x8_xforms[] = { - { &search174, &replace174.value, 0 }, - { &search175, &replace175.value, 0 }, + { &search197, &replace197.value, 0 }, + { &search198, &replace198.value, 0 }, }; -static const nir_search_variable search209_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search232_0 = { { nir_search_value_variable, 0 }, 0, /* v */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search209 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search232 = { { nir_search_value_expression, 0 }, false, nir_op_unpack_snorm_4x8, - { &search209_0.value }, + { &search232_0.value }, + NULL, }; -static const nir_search_constant replace209_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace232_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x3ff0000000000000 /* 1.0 */ }, }; -static const nir_search_constant replace209_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace232_1_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0xbff0000000000000L /* -1.0 */ }, }; -static const nir_search_variable replace209_1_1_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace232_1_1_0_0_0_0 = { { nir_search_value_variable, 0 }, 0, /* v */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace209_1_1_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace232_1_1_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_expression replace209_1_1_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace232_1_1_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_extract_i8, - { &replace209_1_1_0_0_0_0.value, &replace209_1_1_0_0_0_1.value }, + { &replace232_1_1_0_0_0_0.value, &replace232_1_1_0_0_0_1.value }, + NULL, }; -static const nir_search_variable replace209_1_1_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace232_1_1_0_0_1_0 = { { nir_search_value_variable, 0 }, 0, /* v */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace209_1_1_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace232_1_1_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x1 /* 1 */ }, }; -static const nir_search_expression replace209_1_1_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace232_1_1_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_extract_i8, - { &replace209_1_1_0_0_1_0.value, &replace209_1_1_0_0_1_1.value }, + { &replace232_1_1_0_0_1_0.value, &replace232_1_1_0_0_1_1.value }, + NULL, }; -static const nir_search_variable replace209_1_1_0_0_2_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace232_1_1_0_0_2_0 = { { nir_search_value_variable, 0 }, 0, /* v */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace209_1_1_0_0_2_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace232_1_1_0_0_2_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x2 /* 2 */ }, }; -static const nir_search_expression replace209_1_1_0_0_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace232_1_1_0_0_2 = { { nir_search_value_expression, 0 }, false, nir_op_extract_i8, - { &replace209_1_1_0_0_2_0.value, &replace209_1_1_0_0_2_1.value }, + { &replace232_1_1_0_0_2_0.value, &replace232_1_1_0_0_2_1.value }, + NULL, }; -static const nir_search_variable replace209_1_1_0_0_3_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace232_1_1_0_0_3_0 = { { nir_search_value_variable, 0 }, 0, /* v */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace209_1_1_0_0_3_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace232_1_1_0_0_3_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x3 /* 3 */ }, }; -static const nir_search_expression replace209_1_1_0_0_3 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace232_1_1_0_0_3 = { { nir_search_value_expression, 0 }, false, nir_op_extract_i8, - { &replace209_1_1_0_0_3_0.value, &replace209_1_1_0_0_3_1.value }, + { &replace232_1_1_0_0_3_0.value, &replace232_1_1_0_0_3_1.value }, + NULL, }; -static const nir_search_expression replace209_1_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace232_1_1_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_vec4, - { &replace209_1_1_0_0_0.value, &replace209_1_1_0_0_1.value, &replace209_1_1_0_0_2.value, &replace209_1_1_0_0_3.value }, + { &replace232_1_1_0_0_0.value, &replace232_1_1_0_0_1.value, &replace232_1_1_0_0_2.value, &replace232_1_1_0_0_3.value }, + NULL, }; -static const nir_search_expression replace209_1_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace232_1_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_i2f, - { &replace209_1_1_0_0.value }, + { &replace232_1_1_0_0.value }, + NULL, }; -static const nir_search_constant replace209_1_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace232_1_1_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x405fc00000000000 /* 127.0 */ }, }; -static const nir_search_expression replace209_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace232_1_1 = { { nir_search_value_expression, 0 }, false, nir_op_fdiv, - { &replace209_1_1_0.value, &replace209_1_1_1.value }, + { &replace232_1_1_0.value, &replace232_1_1_1.value }, + NULL, }; -static const nir_search_expression replace209_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace232_1 = { { nir_search_value_expression, 0 }, false, nir_op_fmax, - { &replace209_1_0.value, &replace209_1_1.value }, + { &replace232_1_0.value, &replace232_1_1.value }, + NULL, }; -static const nir_search_expression replace209 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace232 = { { nir_search_value_expression, 0 }, false, nir_op_fmin, - { &replace209_0.value, &replace209_1.value }, + { &replace232_0.value, &replace232_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_unpack_snorm_4x8_xforms[] = { - { &search209, &replace209.value, 35 }, + { &search232, &replace232.value, 36 }, }; -static const nir_search_variable search192_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search215_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search192_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search215_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search192 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search215 = { { nir_search_value_expression, 0 }, false, nir_op_frem, - { &search192_0.value, &search192_1.value }, + { &search215_0.value, &search215_1.value }, + NULL, }; -static const nir_search_variable replace192_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace215_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace192_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace215_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace192_1_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace215_1_1_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace192_1_1_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace215_1_1_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace192_1_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace215_1_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_fdiv, - { &replace192_1_1_0_0.value, &replace192_1_1_0_1.value }, + { &replace215_1_1_0_0.value, &replace215_1_1_0_1.value }, + NULL, }; -static const nir_search_expression replace192_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace215_1_1 = { { nir_search_value_expression, 0 }, false, nir_op_ftrunc, - { &replace192_1_1_0.value }, + { &replace215_1_1_0.value }, + NULL, }; -static const nir_search_expression replace192_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace215_1 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace192_1_0.value, &replace192_1_1.value }, + { &replace215_1_0.value, &replace215_1_1.value }, + NULL, }; -static const nir_search_expression replace192 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace215 = { { nir_search_value_expression, 0 }, false, nir_op_fsub, - { &replace192_0.value, &replace192_1.value }, + { &replace215_0.value, &replace215_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_frem_xforms[] = { - { &search192, &replace192.value, 20 }, + { &search215, &replace215.value, 21 }, }; -static const nir_search_variable search206_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search229_0 = { { nir_search_value_variable, 0 }, 0, /* v */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search206 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search229 = { { nir_search_value_expression, 0 }, false, nir_op_unpack_unorm_2x16, - { &search206_0.value }, + { &search229_0.value }, + NULL, }; -static const nir_search_variable replace206_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace229_0_0_0_0 = { { nir_search_value_variable, 0 }, 0, /* v */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace206_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace229_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_expression replace206_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace229_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_extract_u16, - { &replace206_0_0_0_0.value, &replace206_0_0_0_1.value }, + { &replace229_0_0_0_0.value, &replace229_0_0_0_1.value }, + NULL, }; -static const nir_search_variable replace206_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace229_0_0_1_0 = { { nir_search_value_variable, 0 }, 0, /* v */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace206_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace229_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x1 /* 1 */ }, }; -static const nir_search_expression replace206_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace229_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_extract_u16, - { &replace206_0_0_1_0.value, &replace206_0_0_1_1.value }, + { &replace229_0_0_1_0.value, &replace229_0_0_1_1.value }, + NULL, }; -static const nir_search_expression replace206_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace229_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_vec2, - { &replace206_0_0_0.value, &replace206_0_0_1.value }, + { &replace229_0_0_0.value, &replace229_0_0_1.value }, + NULL, }; -static const nir_search_expression replace206_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace229_0 = { { nir_search_value_expression, 0 }, false, nir_op_u2f, - { &replace206_0_0.value }, + { &replace229_0_0.value }, + NULL, }; -static const nir_search_constant replace206_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace229_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x40efffe000000000 /* 65535.0 */ }, }; -static const nir_search_expression replace206 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace229 = { { nir_search_value_expression, 0 }, false, nir_op_fdiv, - { &replace206_0.value, &replace206_1.value }, + { &replace229_0.value, &replace229_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_unpack_unorm_2x16_xforms[] = { - { &search206, &replace206.value, 32 }, + { &search229, &replace229.value, 33 }, }; -static const nir_search_variable search208_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search231_0 = { { nir_search_value_variable, 0 }, 0, /* v */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search208 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search231 = { { nir_search_value_expression, 0 }, false, nir_op_unpack_snorm_2x16, - { &search208_0.value }, + { &search231_0.value }, + NULL, }; -static const nir_search_constant replace208_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace231_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x3ff0000000000000 /* 1.0 */ }, }; -static const nir_search_constant replace208_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace231_1_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0xbff0000000000000L /* -1.0 */ }, }; -static const nir_search_variable replace208_1_1_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace231_1_1_0_0_0_0 = { { nir_search_value_variable, 0 }, 0, /* v */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace208_1_1_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace231_1_1_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_expression replace208_1_1_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace231_1_1_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_extract_i16, - { &replace208_1_1_0_0_0_0.value, &replace208_1_1_0_0_0_1.value }, + { &replace231_1_1_0_0_0_0.value, &replace231_1_1_0_0_0_1.value }, + NULL, }; -static const nir_search_variable replace208_1_1_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace231_1_1_0_0_1_0 = { { nir_search_value_variable, 0 }, 0, /* v */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace208_1_1_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace231_1_1_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x1 /* 1 */ }, }; -static const nir_search_expression replace208_1_1_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace231_1_1_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_extract_i16, - { &replace208_1_1_0_0_1_0.value, &replace208_1_1_0_0_1_1.value }, + { &replace231_1_1_0_0_1_0.value, &replace231_1_1_0_0_1_1.value }, + NULL, }; -static const nir_search_expression replace208_1_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace231_1_1_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_vec2, - { &replace208_1_1_0_0_0.value, &replace208_1_1_0_0_1.value }, + { &replace231_1_1_0_0_0.value, &replace231_1_1_0_0_1.value }, + NULL, }; -static const nir_search_expression replace208_1_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace231_1_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_i2f, - { &replace208_1_1_0_0.value }, + { &replace231_1_1_0_0.value }, + NULL, }; -static const nir_search_constant replace208_1_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace231_1_1_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x40dfffc000000000 /* 32767.0 */ }, }; -static const nir_search_expression replace208_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace231_1_1 = { { nir_search_value_expression, 0 }, false, nir_op_fdiv, - { &replace208_1_1_0.value, &replace208_1_1_1.value }, + { &replace231_1_1_0.value, &replace231_1_1_1.value }, + NULL, }; -static const nir_search_expression replace208_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace231_1 = { { nir_search_value_expression, 0 }, false, nir_op_fmax, - { &replace208_1_0.value, &replace208_1_1.value }, + { &replace231_1_0.value, &replace231_1_1.value }, + NULL, }; -static const nir_search_expression replace208 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace231 = { { nir_search_value_expression, 0 }, false, nir_op_fmin, - { &replace208_0.value, &replace208_1.value }, + { &replace231_0.value, &replace231_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_unpack_snorm_2x16_xforms[] = { - { &search208, &replace208.value, 34 }, + { &search231, &replace231.value, 35 }, }; -static const nir_search_variable search66_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search81_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search66_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search81_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search66 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search81 = { { nir_search_value_expression, 0 }, false, nir_op_imax, - { &search66_0.value, &search66_1.value }, + { &search81_0.value, &search81_1.value }, + NULL, }; -static const nir_search_variable replace66 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace81 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; static const struct transform nir_opt_algebraic_imax_xforms[] = { - { &search66, &replace66.value, 0 }, + { &search81, &replace81.value, 0 }, }; -static const nir_search_variable search71_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search86_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search71 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search86 = { { nir_search_value_expression, 0 }, false, nir_op_fsat, - { &search71_0.value }, + { &search86_0.value }, + NULL, }; -static const nir_search_variable replace71_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace86_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace71_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace86_0_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_expression replace71_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace86_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmax, - { &replace71_0_0.value, &replace71_0_1.value }, + { &replace86_0_0.value, &replace86_0_1.value }, + NULL, }; -static const nir_search_constant replace71_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace86_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x3ff0000000000000 /* 1.0 */ }, }; -static const nir_search_expression replace71 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace86 = { { nir_search_value_expression, 0 }, false, nir_op_fmin, - { &replace71_0.value, &replace71_1.value }, + { &replace86_0.value, &replace86_1.value }, + NULL, }; -static const nir_search_variable search72_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search87_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search72_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search87_0 = { { nir_search_value_expression, 0 }, false, nir_op_fsat, - { &search72_0_0.value }, + { &search87_0_0.value }, + NULL, }; -static const nir_search_expression search72 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search87 = { { nir_search_value_expression, 0 }, false, nir_op_fsat, - { &search72_0.value }, + { &search87_0.value }, + NULL, }; -static const nir_search_variable replace72_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace87_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace72 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace87 = { { nir_search_value_expression, 0 }, false, nir_op_fsat, - { &replace72_0.value }, + { &replace87_0.value }, + NULL, }; -static const nir_search_variable search93_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search110_0_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search93_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search110_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_b2f, - { &search93_0_0_0.value }, + { &search110_0_0_0.value }, + NULL, }; -static const nir_search_variable search93_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search110_0_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search93_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search110_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_b2f, - { &search93_0_1_0.value }, + { &search110_0_1_0.value }, + NULL, }; -static const nir_search_expression search93_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search110_0 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, - { &search93_0_0.value, &search93_0_1.value }, + { &search110_0_0.value, &search110_0_1.value }, + NULL, }; -static const nir_search_expression search93 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search110 = { { nir_search_value_expression, 0 }, false, nir_op_fsat, - { &search93_0.value }, + { &search110_0.value }, + NULL, }; -static const nir_search_variable replace93_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace110_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace93_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace110_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace93_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace110_0 = { { nir_search_value_expression, 0 }, false, nir_op_ior, - { &replace93_0_0.value, &replace93_0_1.value }, + { &replace110_0_0.value, &replace110_0_1.value }, + NULL, }; -static const nir_search_expression replace93 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace110 = { { nir_search_value_expression, 0 }, false, nir_op_b2f, - { &replace93_0.value }, + { &replace110_0.value }, + NULL, }; static const struct transform nir_opt_algebraic_fsat_xforms[] = { - { &search71, &replace71.value, 9 }, - { &search72, &replace72.value, 0 }, - { &search93, &replace93.value, 0 }, + { &search86, &replace86.value, 10 }, + { &search87, &replace87.value, 0 }, + { &search110, &replace110.value, 0 }, }; -static const nir_search_variable search201_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search224_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search201_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search224_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search201 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search224 = { { nir_search_value_expression, 0 }, false, nir_op_extract_u16, - { &search201_0.value, &search201_1.value }, + { &search224_0.value, &search224_1.value }, + NULL, }; -static const nir_search_variable replace201_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace224_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace201_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace224_0_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace201_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace224_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression replace201_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace224_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_imul, - { &replace201_0_1_0.value, &replace201_0_1_1.value }, + { &replace224_0_1_0.value, &replace224_0_1_1.value }, + NULL, }; -static const nir_search_expression replace201_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace224_0 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &replace201_0_0.value, &replace201_0_1.value }, + { &replace224_0_0.value, &replace224_0_1.value }, + NULL, }; -static const nir_search_constant replace201_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace224_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xffff /* 65535 */ }, }; -static const nir_search_expression replace201 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace224 = { { nir_search_value_expression, 0 }, false, nir_op_iand, - { &replace201_0.value, &replace201_1.value }, + { &replace224_0.value, &replace224_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_extract_u16_xforms[] = { - { &search201, &replace201.value, 27 }, + { &search224, &replace224.value, 28 }, }; -static const nir_search_constant search55_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search69_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_variable search55_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search69_1_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search55_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search69_1 = { { nir_search_value_expression, 0 }, false, nir_op_b2f, - { &search55_1_0.value }, + { &search69_1_0.value }, + NULL, }; -static const nir_search_expression search55 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search69 = { { nir_search_value_expression, 0 }, false, nir_op_fge, - { &search55_0.value, &search55_1.value }, + { &search69_0.value, &search69_1.value }, + NULL, }; -static const nir_search_variable replace55_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace69_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace55 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace69 = { + { nir_search_value_expression, 0 }, + false, + nir_op_inot, + { &replace69_0.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search70_0_0_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search70_0_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_b2f, + { &search70_0_0_0.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search70_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fneg, + { &search70_0_0.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search70_1 = { + { nir_search_value_constant, 0 }, + nir_type_float, { 0x0 /* 0.0 */ }, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search70 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fge, + { &search70_0.value, &search70_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace70_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace70 = { { nir_search_value_expression, 0 }, false, nir_op_inot, - { &replace55_0.value }, + { &replace70_0.value }, + NULL, }; -static const nir_search_variable search57_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search72_0_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search57_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search72_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_fabs, - { &search57_0_0_0.value }, + { &search72_0_0_0.value }, + NULL, }; -static const nir_search_expression search57_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search72_0 = { { nir_search_value_expression, 0 }, false, nir_op_fneg, - { &search57_0_0.value }, + { &search72_0_0.value }, + NULL, }; -static const nir_search_constant search57_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search72_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_expression search57 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search72 = { { nir_search_value_expression, 0 }, false, nir_op_fge, - { &search57_0.value, &search57_1.value }, + { &search72_0.value, &search72_1.value }, + NULL, }; -static const nir_search_variable replace57_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace72_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace57_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace72_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_expression replace57 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace72 = { { nir_search_value_expression, 0 }, false, nir_op_feq, - { &replace57_0.value, &replace57_1.value }, + { &replace72_0.value, &replace72_1.value }, + NULL, }; -static const nir_search_variable search215_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search244_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search215_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search244_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search215_0_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search244_0_2 = { { nir_search_value_variable, 0 }, 2, /* c */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search215_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search244_0 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search215_0_0.value, &search215_0_1.value, &search215_0_2.value }, + { &search244_0_0.value, &search244_0_1.value, &search244_0_2.value }, + NULL, }; -static const nir_search_variable search215_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search244_1 = { { nir_search_value_variable, 0 }, 3, /* d */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search215 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search244 = { { nir_search_value_expression, 0 }, false, nir_op_fge, - { &search215_0.value, &search215_1.value }, + { &search244_0.value, &search244_1.value }, + NULL, }; -static const nir_search_variable replace215_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace244_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace215_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace244_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace215_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace244_1_1 = { { nir_search_value_variable, 0 }, 3, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace215_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace244_1 = { { nir_search_value_expression, 0 }, false, nir_op_fge, - { &replace215_1_0.value, &replace215_1_1.value }, + { &replace244_1_0.value, &replace244_1_1.value }, + NULL, }; -static const nir_search_variable replace215_2_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace244_2_0 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace215_2_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace244_2_1 = { { nir_search_value_variable, 0 }, 3, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace215_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace244_2 = { { nir_search_value_expression, 0 }, false, nir_op_fge, - { &replace215_2_0.value, &replace215_2_1.value }, + { &replace244_2_0.value, &replace244_2_1.value }, + NULL, }; -static const nir_search_expression replace215 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace244 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &replace215_0.value, &replace215_1.value, &replace215_2.value }, + { &replace244_0.value, &replace244_1.value, &replace244_2.value }, + NULL, }; -static const nir_search_variable search216_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search245_0 = { { nir_search_value_variable, 0 }, 0, /* d */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search216_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search245_1_0 = { { nir_search_value_variable, 0 }, 1, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search216_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search245_1_1 = { { nir_search_value_variable, 0 }, 2, /* b */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search216_1_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search245_1_2 = { { nir_search_value_variable, 0 }, 3, /* c */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search216_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search245_1 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search216_1_0.value, &search216_1_1.value, &search216_1_2.value }, + { &search245_1_0.value, &search245_1_1.value, &search245_1_2.value }, + NULL, }; -static const nir_search_expression search216 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search245 = { { nir_search_value_expression, 0 }, false, nir_op_fge, - { &search216_0.value, &search216_1.value }, + { &search245_0.value, &search245_1.value }, + NULL, }; -static const nir_search_variable replace216_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace245_0 = { { nir_search_value_variable, 0 }, 1, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace216_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace245_1_0 = { { nir_search_value_variable, 0 }, 0, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace216_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace245_1_1 = { { nir_search_value_variable, 0 }, 2, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace216_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace245_1 = { { nir_search_value_expression, 0 }, false, nir_op_fge, - { &replace216_1_0.value, &replace216_1_1.value }, + { &replace245_1_0.value, &replace245_1_1.value }, + NULL, }; -static const nir_search_variable replace216_2_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace245_2_0 = { { nir_search_value_variable, 0 }, 0, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace216_2_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace245_2_1 = { { nir_search_value_variable, 0 }, 3, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace216_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace245_2 = { { nir_search_value_expression, 0 }, false, nir_op_fge, - { &replace216_2_0.value, &replace216_2_1.value }, + { &replace245_2_0.value, &replace245_2_1.value }, + NULL, }; -static const nir_search_expression replace216 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace245 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &replace216_0.value, &replace216_1.value, &replace216_2.value }, + { &replace245_0.value, &replace245_1.value, &replace245_2.value }, + NULL, }; static const struct transform nir_opt_algebraic_fge_xforms[] = { - { &search55, &replace55.value, 0 }, - { &search57, &replace57.value, 0 }, - { &search215, &replace215.value, 0 }, - { &search216, &replace216.value, 0 }, + { &search69, &replace69.value, 0 }, + { &search70, &replace70.value, 0 }, + { &search72, &replace72.value, 0 }, + { &search244, &replace244.value, 0 }, + { &search245, &replace245.value, 0 }, }; -static const nir_search_variable search135_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search154_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search135_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search154_0 = { { nir_search_value_expression, 0 }, false, nir_op_fexp2, - { &search135_0_0.value }, + { &search154_0_0.value }, + NULL, }; -static const nir_search_expression search135 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search154 = { { nir_search_value_expression, 0 }, true, nir_op_frcp, - { &search135_0.value }, + { &search154_0.value }, + NULL, }; -static const nir_search_variable replace135_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace154_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace135_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace154_0 = { { nir_search_value_expression, 0 }, false, nir_op_fneg, - { &replace135_0_0.value }, + { &replace154_0_0.value }, + NULL, }; -static const nir_search_expression replace135 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace154 = { { nir_search_value_expression, 0 }, false, nir_op_fexp2, - { &replace135_0.value }, + { &replace154_0.value }, + NULL, }; -static const nir_search_variable search144_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search163_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search144_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search163_0 = { { nir_search_value_expression, 0 }, false, nir_op_frcp, - { &search144_0_0.value }, + { &search163_0_0.value }, + NULL, }; -static const nir_search_expression search144 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search163 = { { nir_search_value_expression, 0 }, true, nir_op_frcp, - { &search144_0.value }, + { &search163_0.value }, + NULL, }; -static const nir_search_variable replace144 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace163 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search145_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search164_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search145_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search164_0 = { { nir_search_value_expression, 0 }, false, nir_op_fsqrt, - { &search145_0_0.value }, + { &search164_0_0.value }, + NULL, }; -static const nir_search_expression search145 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search164 = { { nir_search_value_expression, 0 }, true, nir_op_frcp, - { &search145_0.value }, + { &search164_0.value }, + NULL, }; -static const nir_search_variable replace145_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace164_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace145 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace164 = { { nir_search_value_expression, 0 }, false, nir_op_frsq, - { &replace145_0.value }, + { &replace164_0.value }, + NULL, }; -static const nir_search_variable search147_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search166_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search147_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search166_0 = { { nir_search_value_expression, 0 }, false, nir_op_frsq, - { &search147_0_0.value }, + { &search166_0_0.value }, + NULL, }; -static const nir_search_expression search147 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search166 = { { nir_search_value_expression, 0 }, true, nir_op_frcp, - { &search147_0.value }, + { &search166_0.value }, + NULL, }; -static const nir_search_variable replace147_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace166_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace147 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace166 = { { nir_search_value_expression, 0 }, false, nir_op_fsqrt, - { &replace147_0.value }, + { &replace166_0.value }, + NULL, }; static const struct transform nir_opt_algebraic_frcp_xforms[] = { - { &search135, &replace135.value, 0 }, - { &search144, &replace144.value, 0 }, - { &search145, &replace145.value, 0 }, - { &search147, &replace147.value, 15 }, + { &search154, &replace154.value, 0 }, + { &search163, &replace163.value, 0 }, + { &search164, &replace164.value, 0 }, + { &search166, &replace166.value, 16 }, }; -static const nir_search_variable search109_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search128_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search109_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search128_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search109 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search128 = { { nir_search_value_expression, 0 }, false, nir_op_fxor, - { &search109_0.value, &search109_1.value }, + { &search128_0.value, &search128_1.value }, + NULL, }; -static const nir_search_constant replace109 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace128 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; static const struct transform nir_opt_algebraic_fxor_xforms[] = { - { &search109, &replace109.value, 0 }, + { &search128, &replace128.value, 0 }, }; -static const nir_search_constant search119_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search138_0 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_variable search119_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search138_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search119 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search138 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search119_0.value, &search119_1.value }, + { &search138_0.value, &search138_1.value }, + NULL, }; -static const nir_search_constant replace119 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace138 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_variable search120_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search139_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search120_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search139_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_expression search120 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search139 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search120_0.value, &search120_1.value }, + { &search139_0.value, &search139_1.value }, + NULL, }; -static const nir_search_variable replace120 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace139 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search166_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search189_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search166_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search189_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x18 /* 24 */ }, }; -static const nir_search_expression search166 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search189 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search166_0.value, &search166_1.value }, + { &search189_0.value, &search189_1.value }, + NULL, }; -static const nir_search_variable replace166_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace189_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace166_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace189_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x3 /* 3 */ }, }; -static const nir_search_expression replace166 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace189 = { { nir_search_value_expression, 0 }, false, nir_op_extract_u8, - { &replace166_0.value, &replace166_1.value }, + { &replace189_0.value, &replace189_1.value }, + NULL, }; -static const nir_search_variable search170_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search193_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search170_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search193_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression search170 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search193 = { { nir_search_value_expression, 0 }, false, nir_op_ushr, - { &search170_0.value, &search170_1.value }, + { &search193_0.value, &search193_1.value }, + NULL, }; -static const nir_search_variable replace170_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace193_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace170_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace193_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x1 /* 1 */ }, }; -static const nir_search_expression replace170 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace193 = { { nir_search_value_expression, 0 }, false, nir_op_extract_u16, - { &replace170_0.value, &replace170_1.value }, + { &replace193_0.value, &replace193_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_ushr_xforms[] = { - { &search119, &replace119.value, 0 }, - { &search120, &replace120.value, 0 }, - { &search166, &replace166.value, 16 }, - { &search170, &replace170.value, 17 }, + { &search138, &replace138.value, 0 }, + { &search139, &replace139.value, 0 }, + { &search189, &replace189.value, 17 }, + { &search193, &replace193.value, 18 }, }; -static const nir_search_variable search123_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search142_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search123_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search142_0 = { { nir_search_value_expression, 0 }, false, nir_op_flog2, - { &search123_0_0.value }, + { &search142_0_0.value }, + NULL, }; -static const nir_search_expression search123 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search142 = { { nir_search_value_expression, 0 }, true, nir_op_fexp2, - { &search123_0.value }, + { &search142_0.value }, + NULL, }; -static const nir_search_variable replace123 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace142 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search126_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search145_0_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search126_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search145_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_flog2, - { &search126_0_0_0.value }, + { &search145_0_0_0.value }, + NULL, }; -static const nir_search_variable search126_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search145_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search126_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search145_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &search126_0_0.value, &search126_0_1.value }, + { &search145_0_0.value, &search145_0_1.value }, + NULL, }; -static const nir_search_expression search126 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search145 = { { nir_search_value_expression, 0 }, true, nir_op_fexp2, - { &search126_0.value }, + { &search145_0.value }, + NULL, }; -static const nir_search_variable replace126_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace145_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace126_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace145_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace126 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace145 = { { nir_search_value_expression, 0 }, false, nir_op_fpow, - { &replace126_0.value, &replace126_1.value }, + { &replace145_0.value, &replace145_1.value }, + NULL, }; -static const nir_search_variable search127_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search146_0_0_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search127_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search146_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_flog2, - { &search127_0_0_0_0.value }, + { &search146_0_0_0_0.value }, + NULL, }; -static const nir_search_variable search127_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search146_0_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search127_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search146_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &search127_0_0_0.value, &search127_0_0_1.value }, + { &search146_0_0_0.value, &search146_0_0_1.value }, + NULL, }; -static const nir_search_variable search127_0_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search146_0_1_0_0 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search127_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search146_0_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_flog2, - { &search127_0_1_0_0.value }, + { &search146_0_1_0_0.value }, + NULL, }; -static const nir_search_variable search127_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search146_0_1_1 = { { nir_search_value_variable, 0 }, 3, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search127_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search146_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &search127_0_1_0.value, &search127_0_1_1.value }, + { &search146_0_1_0.value, &search146_0_1_1.value }, + NULL, }; -static const nir_search_expression search127_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search146_0 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, - { &search127_0_0.value, &search127_0_1.value }, + { &search146_0_0.value, &search146_0_1.value }, + NULL, }; -static const nir_search_expression search127 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search146 = { { nir_search_value_expression, 0 }, true, nir_op_fexp2, - { &search127_0.value }, + { &search146_0.value }, + NULL, }; -static const nir_search_variable replace127_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace146_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace127_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace146_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace127_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace146_0 = { { nir_search_value_expression, 0 }, false, nir_op_fpow, - { &replace127_0_0.value, &replace127_0_1.value }, + { &replace146_0_0.value, &replace146_0_1.value }, + NULL, }; -static const nir_search_variable replace127_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace146_1_0 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace127_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace146_1_1 = { { nir_search_value_variable, 0 }, 3, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace127_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace146_1 = { { nir_search_value_expression, 0 }, false, nir_op_fpow, - { &replace127_1_0.value, &replace127_1_1.value }, + { &replace146_1_0.value, &replace146_1_1.value }, + NULL, }; -static const nir_search_expression replace127 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace146 = { { nir_search_value_expression, 0 }, true, nir_op_fmul, - { &replace127_0.value, &replace127_1.value }, + { &replace146_0.value, &replace146_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_fexp2_xforms[] = { - { &search123, &replace123.value, 0 }, - { &search126, &replace126.value, 12 }, - { &search127, &replace127.value, 12 }, + { &search142, &replace142.value, 0 }, + { &search145, &replace145.value, 13 }, + { &search146, &replace146.value, 13 }, }; -static const nir_search_constant search117_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search136_0 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_variable search117_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search136_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search117 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search136 = { { nir_search_value_expression, 0 }, false, nir_op_ishr, - { &search117_0.value, &search117_1.value }, + { &search136_0.value, &search136_1.value }, + NULL, }; -static const nir_search_constant replace117 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace136 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_variable search118_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search137_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search118_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search137_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_expression search118 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search137 = { { nir_search_value_expression, 0 }, false, nir_op_ishr, - { &search118_0.value, &search118_1.value }, + { &search137_0.value, &search137_1.value }, + NULL, }; -static const nir_search_variable replace118 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace137 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; static const struct transform nir_opt_algebraic_ishr_xforms[] = { - { &search117, &replace117.value, 0 }, - { &search118, &replace118.value, 0 }, + { &search136, &replace136.value, 0 }, + { &search137, &replace137.value, 0 }, }; -static const nir_search_variable search85_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search102_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search85_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search102_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search85 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search102 = { { nir_search_value_expression, 0 }, false, nir_op_slt, - { &search85_0.value, &search85_1.value }, + { &search102_0.value, &search102_1.value }, + NULL, }; -static const nir_search_variable replace85_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace102_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace85_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace102_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace85_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace102_0 = { { nir_search_value_expression, 0 }, false, nir_op_flt, - { &replace85_0_0.value, &replace85_0_1.value }, + { &replace102_0_0.value, &replace102_0_1.value }, + NULL, }; -static const nir_search_expression replace85 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace102 = { { nir_search_value_expression, 0 }, false, nir_op_b2f, - { &replace85_0.value }, + { &replace102_0.value }, + NULL, }; static const struct transform nir_opt_algebraic_slt_xforms[] = { - { &search85, &replace85.value, 10 }, + { &search102, &replace102.value, 11 }, }; -static const nir_search_variable search160_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search183_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search160_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search183_0 = { { nir_search_value_expression, 0 }, false, nir_op_ftrunc, - { &search160_0_0.value }, + { &search183_0_0.value }, + NULL, }; -static const nir_search_expression search160 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search183 = { { nir_search_value_expression, 0 }, false, nir_op_f2i, - { &search160_0.value }, + { &search183_0.value }, + NULL, }; -static const nir_search_variable replace160_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace183_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace160 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace183 = { { nir_search_value_expression, 0 }, false, nir_op_f2i, - { &replace160_0.value }, + { &replace183_0.value }, + NULL, }; static const struct transform nir_opt_algebraic_f2i_xforms[] = { - { &search160, &replace160.value, 0 }, + { &search183, &replace183.value, 0 }, }; -static const nir_search_constant search56_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search71_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_variable search56_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search71_1_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search56_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search71_1 = { { nir_search_value_expression, 0 }, false, nir_op_fabs, - { &search56_1_0.value }, + { &search71_1_0.value }, + NULL, }; -static const nir_search_expression search56 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search71 = { { nir_search_value_expression, 0 }, false, nir_op_flt, - { &search56_0.value, &search56_1.value }, + { &search71_0.value, &search71_1.value }, + NULL, }; -static const nir_search_variable replace56_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace71_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace56_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace71_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_expression replace56 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace71 = { { nir_search_value_expression, 0 }, false, nir_op_fne, - { &replace56_0.value, &replace56_1.value }, + { &replace71_0.value, &replace71_1.value }, + NULL, }; -static const nir_search_variable search95_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search113_0_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search95_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search113_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_b2f, - { &search95_0_0_0.value }, + { &search113_0_0_0.value }, + NULL, }; -static const nir_search_expression search95_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search113_0 = { { nir_search_value_expression, 0 }, false, nir_op_fneg, - { &search95_0_0.value }, + { &search113_0_0.value }, + NULL, }; -static const nir_search_constant search95_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search113_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_expression search95 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search113 = { { nir_search_value_expression, 0 }, false, nir_op_flt, - { &search95_0.value, &search95_1.value }, + { &search113_0.value, &search113_1.value }, + NULL, }; -static const nir_search_variable replace95 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace113 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search96_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search114_0_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_variable search96_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search114_0_1_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search96_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search114_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_b2f, - { &search96_0_1_0.value }, + { &search114_0_1_0.value }, + NULL, }; -static const nir_search_expression search96_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search114_0 = { { nir_search_value_expression, 0 }, false, nir_op_fsub, - { &search96_0_0.value, &search96_0_1.value }, + { &search114_0_0.value, &search114_0_1.value }, + NULL, }; -static const nir_search_constant search96_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search114_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_expression search96 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search114 = { { nir_search_value_expression, 0 }, false, nir_op_flt, - { &search96_0.value, &search96_1.value }, + { &search114_0.value, &search114_1.value }, + NULL, }; -static const nir_search_variable replace96 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace114 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search213_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search242_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search213_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search242_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search213_0_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search242_0_2 = { { nir_search_value_variable, 0 }, 2, /* c */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search213_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search242_0 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search213_0_0.value, &search213_0_1.value, &search213_0_2.value }, + { &search242_0_0.value, &search242_0_1.value, &search242_0_2.value }, + NULL, }; -static const nir_search_variable search213_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search242_1 = { { nir_search_value_variable, 0 }, 3, /* d */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search213 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search242 = { { nir_search_value_expression, 0 }, false, nir_op_flt, - { &search213_0.value, &search213_1.value }, + { &search242_0.value, &search242_1.value }, + NULL, }; -static const nir_search_variable replace213_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace242_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace213_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace242_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace213_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace242_1_1 = { { nir_search_value_variable, 0 }, 3, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace213_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace242_1 = { { nir_search_value_expression, 0 }, false, nir_op_flt, - { &replace213_1_0.value, &replace213_1_1.value }, + { &replace242_1_0.value, &replace242_1_1.value }, + NULL, }; -static const nir_search_variable replace213_2_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace242_2_0 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace213_2_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace242_2_1 = { { nir_search_value_variable, 0 }, 3, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace213_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace242_2 = { { nir_search_value_expression, 0 }, false, nir_op_flt, - { &replace213_2_0.value, &replace213_2_1.value }, + { &replace242_2_0.value, &replace242_2_1.value }, + NULL, }; -static const nir_search_expression replace213 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace242 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &replace213_0.value, &replace213_1.value, &replace213_2.value }, + { &replace242_0.value, &replace242_1.value, &replace242_2.value }, + NULL, }; -static const nir_search_variable search214_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search243_0 = { { nir_search_value_variable, 0 }, 0, /* d */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search214_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search243_1_0 = { { nir_search_value_variable, 0 }, 1, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search214_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search243_1_1 = { { nir_search_value_variable, 0 }, 2, /* b */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search214_1_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search243_1_2 = { { nir_search_value_variable, 0 }, 3, /* c */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search214_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search243_1 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search214_1_0.value, &search214_1_1.value, &search214_1_2.value }, + { &search243_1_0.value, &search243_1_1.value, &search243_1_2.value }, + NULL, }; -static const nir_search_expression search214 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search243 = { { nir_search_value_expression, 0 }, false, nir_op_flt, - { &search214_0.value, &search214_1.value }, + { &search243_0.value, &search243_1.value }, + NULL, }; -static const nir_search_variable replace214_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace243_0 = { { nir_search_value_variable, 0 }, 1, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace214_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace243_1_0 = { { nir_search_value_variable, 0 }, 0, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace214_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace243_1_1 = { { nir_search_value_variable, 0 }, 2, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace214_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace243_1 = { { nir_search_value_expression, 0 }, false, nir_op_flt, - { &replace214_1_0.value, &replace214_1_1.value }, + { &replace243_1_0.value, &replace243_1_1.value }, + NULL, }; -static const nir_search_variable replace214_2_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace243_2_0 = { { nir_search_value_variable, 0 }, 0, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace214_2_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace243_2_1 = { { nir_search_value_variable, 0 }, 3, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace214_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace243_2 = { { nir_search_value_expression, 0 }, false, nir_op_flt, - { &replace214_2_0.value, &replace214_2_1.value }, + { &replace243_2_0.value, &replace243_2_1.value }, + NULL, }; -static const nir_search_expression replace214 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace243 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &replace214_0.value, &replace214_1.value, &replace214_2.value }, + { &replace243_0.value, &replace243_1.value, &replace243_2.value }, + NULL, }; static const struct transform nir_opt_algebraic_flt_xforms[] = { - { &search56, &replace56.value, 0 }, - { &search95, &replace95.value, 0 }, - { &search96, &replace96.value, 0 }, - { &search213, &replace213.value, 0 }, - { &search214, &replace214.value, 0 }, + { &search71, &replace71.value, 0 }, + { &search113, &replace113.value, 0 }, + { &search114, &replace114.value, 0 }, + { &search242, &replace242.value, 0 }, + { &search243, &replace243.value, 0 }, }; -static const nir_search_variable search101_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search119_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search101_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search119_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search101 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search119 = { { nir_search_value_expression, 0 }, false, nir_op_ult, - { &search101_0.value, &search101_1.value }, + { &search119_0.value, &search119_1.value }, + NULL, }; -static const nir_search_constant replace101 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace119 = { { nir_search_value_constant, 32 }, nir_type_bool32, { NIR_FALSE /* False */ }, }; -static const nir_search_variable search229_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search258_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search229_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search258_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search229_0_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search258_0_2 = { { nir_search_value_variable, 0 }, 2, /* c */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search229_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search258_0 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search229_0_0.value, &search229_0_1.value, &search229_0_2.value }, + { &search258_0_0.value, &search258_0_1.value, &search258_0_2.value }, + NULL, }; -static const nir_search_variable search229_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search258_1 = { { nir_search_value_variable, 0 }, 3, /* d */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search229 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search258 = { { nir_search_value_expression, 0 }, false, nir_op_ult, - { &search229_0.value, &search229_1.value }, + { &search258_0.value, &search258_1.value }, + NULL, }; -static const nir_search_variable replace229_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace258_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace229_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace258_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace229_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace258_1_1 = { { nir_search_value_variable, 0 }, 3, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace229_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace258_1 = { { nir_search_value_expression, 0 }, false, nir_op_ult, - { &replace229_1_0.value, &replace229_1_1.value }, + { &replace258_1_0.value, &replace258_1_1.value }, + NULL, }; -static const nir_search_variable replace229_2_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace258_2_0 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace229_2_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace258_2_1 = { { nir_search_value_variable, 0 }, 3, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace229_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace258_2 = { { nir_search_value_expression, 0 }, false, nir_op_ult, - { &replace229_2_0.value, &replace229_2_1.value }, + { &replace258_2_0.value, &replace258_2_1.value }, + NULL, }; -static const nir_search_expression replace229 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace258 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &replace229_0.value, &replace229_1.value, &replace229_2.value }, + { &replace258_0.value, &replace258_1.value, &replace258_2.value }, + NULL, }; -static const nir_search_variable search230_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search259_0 = { { nir_search_value_variable, 0 }, 0, /* d */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search230_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search259_1_0 = { { nir_search_value_variable, 0 }, 1, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search230_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search259_1_1 = { { nir_search_value_variable, 0 }, 2, /* b */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search230_1_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search259_1_2 = { { nir_search_value_variable, 0 }, 3, /* c */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search230_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search259_1 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search230_1_0.value, &search230_1_1.value, &search230_1_2.value }, + { &search259_1_0.value, &search259_1_1.value, &search259_1_2.value }, + NULL, }; -static const nir_search_expression search230 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search259 = { { nir_search_value_expression, 0 }, false, nir_op_ult, - { &search230_0.value, &search230_1.value }, + { &search259_0.value, &search259_1.value }, + NULL, }; -static const nir_search_variable replace230_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace259_0 = { { nir_search_value_variable, 0 }, 1, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace230_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace259_1_0 = { { nir_search_value_variable, 0 }, 0, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace230_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace259_1_1 = { { nir_search_value_variable, 0 }, 2, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace230_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace259_1 = { { nir_search_value_expression, 0 }, false, nir_op_ult, - { &replace230_1_0.value, &replace230_1_1.value }, + { &replace259_1_0.value, &replace259_1_1.value }, + NULL, }; -static const nir_search_variable replace230_2_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace259_2_0 = { { nir_search_value_variable, 0 }, 0, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace230_2_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace259_2_1 = { { nir_search_value_variable, 0 }, 3, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace230_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace259_2 = { { nir_search_value_expression, 0 }, false, nir_op_ult, - { &replace230_2_0.value, &replace230_2_1.value }, + { &replace259_2_0.value, &replace259_2_1.value }, + NULL, }; -static const nir_search_expression replace230 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace259 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &replace230_0.value, &replace230_1.value, &replace230_2.value }, + { &replace259_0.value, &replace259_1.value, &replace259_2.value }, + NULL, }; static const struct transform nir_opt_algebraic_ult_xforms[] = { - { &search101, &replace101.value, 0 }, - { &search229, &replace229.value, 0 }, - { &search230, &replace230.value, 0 }, + { &search119, &replace119.value, 0 }, + { &search258, &replace258.value, 0 }, + { &search259, &replace259.value, 0 }, }; -static const nir_search_variable search172_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search195_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search172_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search195_1_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_variable search172_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search195_1_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search172_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search195_1 = { { nir_search_value_expression, 0 }, false, nir_op_fsub, - { &search172_1_0.value, &search172_1_1.value }, + { &search195_1_0.value, &search195_1_1.value }, + NULL, }; -static const nir_search_expression search172 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search195 = { { nir_search_value_expression, 0 }, true, nir_op_fsub, - { &search172_0.value, &search172_1.value }, + { &search195_0.value, &search195_1.value }, + NULL, }; -static const nir_search_variable replace172_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace195_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace172_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace195_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace172 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace195 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, - { &replace172_0.value, &replace172_1.value }, + { &replace195_0.value, &replace195_1.value }, + NULL, }; -static const nir_search_variable search176_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search199_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search176_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search199_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search176 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search199 = { { nir_search_value_expression, 0 }, false, nir_op_fsub, - { &search176_0.value, &search176_1.value }, + { &search199_0.value, &search199_1.value }, + NULL, }; -static const nir_search_variable replace176_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace199_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace176_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace199_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace176_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace199_1 = { { nir_search_value_expression, 0 }, false, nir_op_fneg, - { &replace176_1_0.value }, + { &replace199_1_0.value }, + NULL, }; -static const nir_search_expression replace176 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace199 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, - { &replace176_0.value, &replace176_1.value }, + { &replace199_0.value, &replace199_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_fsub_xforms[] = { - { &search172, &replace172.value, 0 }, - { &search176, &replace176.value, 18 }, + { &search195, &replace195.value, 0 }, + { &search199, &replace199.value, 19 }, }; -static const nir_search_variable search0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search10_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search10_0 = { { nir_search_value_expression, 0 }, false, nir_op_fneg, - { &search0_0_0.value }, + { &search10_0_0.value }, + NULL, }; -static const nir_search_expression search0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search10 = { { nir_search_value_expression, 0 }, false, nir_op_fneg, - { &search0_0.value }, + { &search10_0.value }, + NULL, }; -static const nir_search_variable replace0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace10 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search178_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search201_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search178 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search201 = { { nir_search_value_expression, 0 }, false, nir_op_fneg, - { &search178_0.value }, + { &search201_0.value }, + NULL, }; -static const nir_search_constant replace178_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace201_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_variable replace178_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace201_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace178 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace201 = { { nir_search_value_expression, 0 }, false, nir_op_fsub, - { &replace178_0.value, &replace178_1.value }, + { &replace201_0.value, &replace201_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_fneg_xforms[] = { - { &search0, &replace0.value, 0 }, - { &search178, &replace178.value, 19 }, + { &search10, &replace10.value, 0 }, + { &search201, &replace201.value, 20 }, }; -static const nir_search_variable search89_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search106_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search89_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search106_0 = { { nir_search_value_expression, 0 }, false, nir_op_fneg, - { &search89_0_0.value }, + { &search106_0_0.value }, + NULL, }; -static const nir_search_variable search89_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search106_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search89 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search106 = { { nir_search_value_expression, 0 }, false, nir_op_fne, - { &search89_0.value, &search89_1.value }, + { &search106_0.value, &search106_1.value }, + NULL, }; -static const nir_search_variable replace89_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace106_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace89_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace106_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_expression replace89 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace106 = { { nir_search_value_expression, 0 }, false, nir_op_fne, - { &replace89_0.value, &replace89_1.value }, + { &replace106_0.value, &replace106_1.value }, + NULL, }; -static const nir_search_variable search219_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search248_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search219_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search248_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search219_0_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search248_0_2 = { { nir_search_value_variable, 0 }, 2, /* c */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search219_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search248_0 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search219_0_0.value, &search219_0_1.value, &search219_0_2.value }, + { &search248_0_0.value, &search248_0_1.value, &search248_0_2.value }, + NULL, }; -static const nir_search_variable search219_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search248_1 = { { nir_search_value_variable, 0 }, 3, /* d */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search219 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search248 = { { nir_search_value_expression, 0 }, false, nir_op_fne, - { &search219_0.value, &search219_1.value }, + { &search248_0.value, &search248_1.value }, + NULL, }; -static const nir_search_variable replace219_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace248_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace219_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace248_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace219_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace248_1_1 = { { nir_search_value_variable, 0 }, 3, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace219_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace248_1 = { { nir_search_value_expression, 0 }, false, nir_op_fne, - { &replace219_1_0.value, &replace219_1_1.value }, + { &replace248_1_0.value, &replace248_1_1.value }, + NULL, }; -static const nir_search_variable replace219_2_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace248_2_0 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace219_2_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace248_2_1 = { { nir_search_value_variable, 0 }, 3, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace219_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace248_2 = { { nir_search_value_expression, 0 }, false, nir_op_fne, - { &replace219_2_0.value, &replace219_2_1.value }, + { &replace248_2_0.value, &replace248_2_1.value }, + NULL, }; -static const nir_search_expression replace219 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace248 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &replace219_0.value, &replace219_1.value, &replace219_2.value }, + { &replace248_0.value, &replace248_1.value, &replace248_2.value }, + NULL, }; -static const nir_search_variable search220_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search249_0 = { { nir_search_value_variable, 0 }, 0, /* d */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search220_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search249_1_0 = { { nir_search_value_variable, 0 }, 1, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search220_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search249_1_1 = { { nir_search_value_variable, 0 }, 2, /* b */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search220_1_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search249_1_2 = { { nir_search_value_variable, 0 }, 3, /* c */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search220_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search249_1 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search220_1_0.value, &search220_1_1.value, &search220_1_2.value }, + { &search249_1_0.value, &search249_1_1.value, &search249_1_2.value }, + NULL, }; -static const nir_search_expression search220 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search249 = { { nir_search_value_expression, 0 }, false, nir_op_fne, - { &search220_0.value, &search220_1.value }, + { &search249_0.value, &search249_1.value }, + NULL, }; -static const nir_search_variable replace220_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace249_0 = { { nir_search_value_variable, 0 }, 1, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace220_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace249_1_0 = { { nir_search_value_variable, 0 }, 0, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace220_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace249_1_1 = { { nir_search_value_variable, 0 }, 2, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace220_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace249_1 = { { nir_search_value_expression, 0 }, false, nir_op_fne, - { &replace220_1_0.value, &replace220_1_1.value }, + { &replace249_1_0.value, &replace249_1_1.value }, + NULL, }; -static const nir_search_variable replace220_2_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace249_2_0 = { { nir_search_value_variable, 0 }, 0, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace220_2_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace249_2_1 = { { nir_search_value_variable, 0 }, 3, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace220_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace249_2 = { { nir_search_value_expression, 0 }, false, nir_op_fne, - { &replace220_2_0.value, &replace220_2_1.value }, + { &replace249_2_0.value, &replace249_2_1.value }, + NULL, }; -static const nir_search_expression replace220 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace249 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &replace220_0.value, &replace220_1.value, &replace220_2.value }, + { &replace249_0.value, &replace249_1.value, &replace249_2.value }, + NULL, }; static const struct transform nir_opt_algebraic_fne_xforms[] = { - { &search89, &replace89.value, 0 }, - { &search219, &replace219.value, 0 }, - { &search220, &replace220.value, 0 }, + { &search106, &replace106.value, 0 }, + { &search248, &replace248.value, 0 }, + { &search249, &replace249.value, 0 }, }; -static const nir_search_variable search4_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search15_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search4_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search15_0 = { { nir_search_value_expression, 0 }, false, nir_op_iabs, - { &search4_0_0.value }, + { &search15_0_0.value }, + NULL, }; -static const nir_search_expression search4 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search15 = { { nir_search_value_expression, 0 }, false, nir_op_iabs, - { &search4_0.value }, + { &search15_0.value }, + NULL, }; -static const nir_search_variable replace4_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace15_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace4 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace15 = { { nir_search_value_expression, 0 }, false, nir_op_iabs, - { &replace4_0.value }, + { &replace15_0.value }, + NULL, }; -static const nir_search_variable search5_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search16_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search5_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search16_0 = { { nir_search_value_expression, 0 }, false, nir_op_ineg, - { &search5_0_0.value }, + { &search16_0_0.value }, + NULL, }; -static const nir_search_expression search5 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search16 = { { nir_search_value_expression, 0 }, false, nir_op_iabs, - { &search5_0.value }, + { &search16_0.value }, + NULL, }; -static const nir_search_variable replace5_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace16_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace5 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace16 = { { nir_search_value_expression, 0 }, false, nir_op_iabs, - { &replace5_0.value }, + { &replace16_0.value }, + NULL, }; -static const nir_search_variable search165_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search188_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search165_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search188_0 = { { nir_search_value_expression, 0 }, false, nir_op_b2i, - { &search165_0_0.value }, + { &search188_0_0.value }, + NULL, }; -static const nir_search_expression search165 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search188 = { { nir_search_value_expression, 0 }, false, nir_op_iabs, - { &search165_0.value }, + { &search188_0.value }, + NULL, }; -static const nir_search_variable replace165_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace188_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace165 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace188 = { { nir_search_value_expression, 0 }, false, nir_op_b2i, - { &replace165_0.value }, + { &replace188_0.value }, + NULL, }; -static const nir_search_constant search183_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search206_0_0 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_variable search183_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search206_0_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search183_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search206_0 = { { nir_search_value_expression, 0 }, false, nir_op_isub, - { &search183_0_0.value, &search183_0_1.value }, + { &search206_0_0.value, &search206_0_1.value }, + NULL, }; -static const nir_search_expression search183 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search206 = { { nir_search_value_expression, 0 }, false, nir_op_iabs, - { &search183_0.value }, + { &search206_0.value }, + NULL, }; -static const nir_search_variable replace183_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace206_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace183 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace206 = { { nir_search_value_expression, 0 }, false, nir_op_iabs, - { &replace183_0.value }, + { &replace206_0.value }, + NULL, }; static const struct transform nir_opt_algebraic_iabs_xforms[] = { - { &search4, &replace4.value, 0 }, - { &search5, &replace5.value, 0 }, - { &search165, &replace165.value, 0 }, - { &search183, &replace183.value, 0 }, + { &search15, &replace15.value, 0 }, + { &search16, &replace16.value, 0 }, + { &search188, &replace188.value, 0 }, + { &search206, &replace206.value, 0 }, }; -static const nir_search_variable search207_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search230_0 = { { nir_search_value_variable, 0 }, 0, /* v */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search207 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search230 = { { nir_search_value_expression, 0 }, false, nir_op_unpack_unorm_4x8, - { &search207_0.value }, + { &search230_0.value }, + NULL, }; -static const nir_search_variable replace207_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace230_0_0_0_0 = { { nir_search_value_variable, 0 }, 0, /* v */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace207_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace230_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_expression replace207_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace230_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_extract_u8, - { &replace207_0_0_0_0.value, &replace207_0_0_0_1.value }, + { &replace230_0_0_0_0.value, &replace230_0_0_0_1.value }, + NULL, }; -static const nir_search_variable replace207_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace230_0_0_1_0 = { { nir_search_value_variable, 0 }, 0, /* v */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace207_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace230_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x1 /* 1 */ }, }; -static const nir_search_expression replace207_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace230_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_extract_u8, - { &replace207_0_0_1_0.value, &replace207_0_0_1_1.value }, + { &replace230_0_0_1_0.value, &replace230_0_0_1_1.value }, + NULL, }; -static const nir_search_variable replace207_0_0_2_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace230_0_0_2_0 = { { nir_search_value_variable, 0 }, 0, /* v */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace207_0_0_2_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace230_0_0_2_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x2 /* 2 */ }, }; -static const nir_search_expression replace207_0_0_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace230_0_0_2 = { { nir_search_value_expression, 0 }, false, nir_op_extract_u8, - { &replace207_0_0_2_0.value, &replace207_0_0_2_1.value }, + { &replace230_0_0_2_0.value, &replace230_0_0_2_1.value }, + NULL, }; -static const nir_search_variable replace207_0_0_3_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace230_0_0_3_0 = { { nir_search_value_variable, 0 }, 0, /* v */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace207_0_0_3_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace230_0_0_3_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x3 /* 3 */ }, }; -static const nir_search_expression replace207_0_0_3 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace230_0_0_3 = { { nir_search_value_expression, 0 }, false, nir_op_extract_u8, - { &replace207_0_0_3_0.value, &replace207_0_0_3_1.value }, + { &replace230_0_0_3_0.value, &replace230_0_0_3_1.value }, + NULL, }; -static const nir_search_expression replace207_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace230_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_vec4, - { &replace207_0_0_0.value, &replace207_0_0_1.value, &replace207_0_0_2.value, &replace207_0_0_3.value }, + { &replace230_0_0_0.value, &replace230_0_0_1.value, &replace230_0_0_2.value, &replace230_0_0_3.value }, + NULL, }; -static const nir_search_expression replace207_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace230_0 = { { nir_search_value_expression, 0 }, false, nir_op_u2f, - { &replace207_0_0.value }, + { &replace230_0_0.value }, + NULL, }; -static const nir_search_constant replace207_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace230_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x406fe00000000000 /* 255.0 */ }, }; -static const nir_search_expression replace207 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace230 = { { nir_search_value_expression, 0 }, false, nir_op_fdiv, - { &replace207_0.value, &replace207_1.value }, + { &replace230_0.value, &replace230_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_unpack_unorm_4x8_xforms[] = { - { &search207, &replace207.value, 33 }, + { &search230, &replace230.value, 34 }, }; -static const nir_search_variable search63_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search78_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search63_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search78_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search63 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search78 = { { nir_search_value_expression, 0 }, false, nir_op_fmin, - { &search63_0.value, &search63_1.value }, + { &search78_0.value, &search78_1.value }, + NULL, }; -static const nir_search_variable replace63 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace78 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search69_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search84_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant search69_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search84_0_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_expression search69_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search84_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmax, - { &search69_0_0.value, &search69_0_1.value }, + { &search84_0_0.value, &search84_0_1.value }, + NULL, }; -static const nir_search_constant search69_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search84_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x3ff0000000000000 /* 1.0 */ }, }; -static const nir_search_expression search69 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search84 = { { nir_search_value_expression, 0 }, true, nir_op_fmin, - { &search69_0.value, &search69_1.value }, + { &search84_0.value, &search84_1.value }, + NULL, }; -static const nir_search_variable replace69_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace84_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace69 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace84 = { { nir_search_value_expression, 0 }, false, nir_op_fsat, - { &replace69_0.value }, + { &replace84_0.value }, + NULL, }; -static const nir_search_variable search73_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search88_0_0_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search73_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search88_0_0_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search73_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search88_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmax, - { &search73_0_0_0_0.value, &search73_0_0_0_1.value }, + { &search88_0_0_0_0.value, &search88_0_0_0_1.value }, + NULL, }; -static const nir_search_variable search73_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search88_0_0_1 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search73_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search88_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmin, - { &search73_0_0_0.value, &search73_0_0_1.value }, + { &search88_0_0_0.value, &search88_0_0_1.value }, + NULL, }; -static const nir_search_variable search73_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search88_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search73_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search88_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmax, - { &search73_0_0.value, &search73_0_1.value }, + { &search88_0_0.value, &search88_0_1.value }, + NULL, }; -static const nir_search_variable search73_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search88_1 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search73 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search88 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fmin, + { &search88_0.value, &search88_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace88_0_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace88_0_1 = { + { nir_search_value_variable, 0 }, + 1, /* b */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace88_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fmax, + { &replace88_0_0.value, &replace88_0_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace88_1 = { + { nir_search_value_variable, 0 }, + 2, /* c */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace88 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fmin, + { &replace88_0.value, &replace88_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search92_0_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search92_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fsat, + { &search92_0_0.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search92_1 = { + { nir_search_value_variable, 32 }, + 1, /* b */ + true, + nir_type_invalid, + (is_zero_to_one), +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search92 = { { nir_search_value_expression, 0 }, false, nir_op_fmin, - { &search73_0.value, &search73_1.value }, + { &search92_0.value, &search92_1.value }, + NULL, }; -static const nir_search_variable replace73_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace92_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace73_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace92_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace73_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace92_0 = { { nir_search_value_expression, 0 }, false, - nir_op_fmax, - { &replace73_0_0.value, &replace73_0_1.value }, -}; - -static const nir_search_variable replace73_1 = { - { nir_search_value_variable, 0 }, - 2, /* c */ - false, - nir_type_invalid, + nir_op_fmin, + { &replace92_0_0.value, &replace92_0_1.value }, + NULL, }; -static const nir_search_expression replace73 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace92 = { { nir_search_value_expression, 0 }, false, - nir_op_fmin, - { &replace73_0.value, &replace73_1.value }, + nir_op_fsat, + { &replace92_0.value }, + NULL, }; static const struct transform nir_opt_algebraic_fmin_xforms[] = { - { &search63, &replace63.value, 0 }, - { &search69, &replace69.value, 8 }, - { &search73, &replace73.value, 0 }, + { &search78, &replace78.value, 0 }, + { &search84, &replace84.value, 9 }, + { &search88, &replace88.value, 0 }, + { &search92, &replace92.value, 0 }, }; -static const nir_search_variable search100_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search118_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search100_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search118_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search100 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search118 = { { nir_search_value_expression, 0 }, false, nir_op_ine, - { &search100_0.value, &search100_1.value }, + { &search118_0.value, &search118_1.value }, + NULL, }; -static const nir_search_constant replace100 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace118 = { { nir_search_value_constant, 32 }, nir_type_bool32, { NIR_FALSE /* False */ }, }; -static const nir_search_variable search149_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search168_0 = { { nir_search_value_variable, 32 }, 0, /* a */ false, nir_type_bool32, + NULL, }; -static const nir_search_constant search149_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search168_1 = { { nir_search_value_constant, 32 }, nir_type_bool32, { NIR_TRUE /* True */ }, }; -static const nir_search_expression search149 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search168 = { { nir_search_value_expression, 0 }, false, nir_op_ine, - { &search149_0.value, &search149_1.value }, + { &search168_0.value, &search168_1.value }, + (is_not_used_by_if), }; -static const nir_search_variable replace149_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace168_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace149 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace168 = { { nir_search_value_expression, 0 }, false, nir_op_inot, - { &replace149_0.value }, + { &replace168_0.value }, + NULL, }; -static const nir_search_variable search150_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search169_0 = { { nir_search_value_variable, 32 }, 0, /* a */ false, nir_type_bool32, + NULL, }; -static const nir_search_constant search150_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search169_1 = { { nir_search_value_constant, 32 }, nir_type_bool32, { NIR_FALSE /* False */ }, }; -static const nir_search_expression search150 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search169 = { { nir_search_value_expression, 0 }, false, nir_op_ine, - { &search150_0.value, &search150_1.value }, + { &search169_0.value, &search169_1.value }, + NULL, }; -static const nir_search_variable replace150 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace169 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search227_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search256_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search227_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search256_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search227_0_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search256_0_2 = { { nir_search_value_variable, 0 }, 2, /* c */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search227_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search256_0 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search227_0_0.value, &search227_0_1.value, &search227_0_2.value }, + { &search256_0_0.value, &search256_0_1.value, &search256_0_2.value }, + NULL, }; -static const nir_search_variable search227_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search256_1 = { { nir_search_value_variable, 0 }, 3, /* d */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search227 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search256 = { { nir_search_value_expression, 0 }, false, nir_op_ine, - { &search227_0.value, &search227_1.value }, + { &search256_0.value, &search256_1.value }, + NULL, }; -static const nir_search_variable replace227_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace256_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace227_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace256_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace227_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace256_1_1 = { { nir_search_value_variable, 0 }, 3, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace227_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace256_1 = { { nir_search_value_expression, 0 }, false, nir_op_ine, - { &replace227_1_0.value, &replace227_1_1.value }, + { &replace256_1_0.value, &replace256_1_1.value }, + NULL, }; -static const nir_search_variable replace227_2_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace256_2_0 = { { nir_search_value_variable, 0 }, 2, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace227_2_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace256_2_1 = { { nir_search_value_variable, 0 }, 3, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace227_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace256_2 = { { nir_search_value_expression, 0 }, false, nir_op_ine, - { &replace227_2_0.value, &replace227_2_1.value }, + { &replace256_2_0.value, &replace256_2_1.value }, + NULL, }; -static const nir_search_expression replace227 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace256 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &replace227_0.value, &replace227_1.value, &replace227_2.value }, + { &replace256_0.value, &replace256_1.value, &replace256_2.value }, + NULL, }; -static const nir_search_variable search228_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search257_0 = { { nir_search_value_variable, 0 }, 0, /* d */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search228_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search257_1_0 = { { nir_search_value_variable, 0 }, 1, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search228_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search257_1_1 = { { nir_search_value_variable, 0 }, 2, /* b */ true, nir_type_invalid, + NULL, }; -static const nir_search_variable search228_1_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search257_1_2 = { { nir_search_value_variable, 0 }, 3, /* c */ true, nir_type_invalid, + NULL, }; -static const nir_search_expression search228_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search257_1 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &search228_1_0.value, &search228_1_1.value, &search228_1_2.value }, + { &search257_1_0.value, &search257_1_1.value, &search257_1_2.value }, + NULL, }; -static const nir_search_expression search228 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search257 = { { nir_search_value_expression, 0 }, false, nir_op_ine, - { &search228_0.value, &search228_1.value }, + { &search257_0.value, &search257_1.value }, + NULL, }; -static const nir_search_variable replace228_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace257_0 = { { nir_search_value_variable, 0 }, 1, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace228_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace257_1_0 = { { nir_search_value_variable, 0 }, 0, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace228_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace257_1_1 = { { nir_search_value_variable, 0 }, 2, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace228_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace257_1 = { { nir_search_value_expression, 0 }, false, nir_op_ine, - { &replace228_1_0.value, &replace228_1_1.value }, + { &replace257_1_0.value, &replace257_1_1.value }, + NULL, }; -static const nir_search_variable replace228_2_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace257_2_0 = { { nir_search_value_variable, 0 }, 0, /* d */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace228_2_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace257_2_1 = { { nir_search_value_variable, 0 }, 3, /* c */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace228_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace257_2 = { { nir_search_value_expression, 0 }, false, nir_op_ine, - { &replace228_2_0.value, &replace228_2_1.value }, + { &replace257_2_0.value, &replace257_2_1.value }, + NULL, }; -static const nir_search_expression replace228 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace257 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &replace228_0.value, &replace228_1.value, &replace228_2.value }, + { &replace257_0.value, &replace257_1.value, &replace257_2.value }, + NULL, }; static const struct transform nir_opt_algebraic_ine_xforms[] = { - { &search100, &replace100.value, 0 }, - { &search149, &replace149.value, 0 }, - { &search150, &replace150.value, 0 }, - { &search227, &replace227.value, 0 }, - { &search228, &replace228.value, 0 }, + { &search118, &replace118.value, 0 }, + { &search168, &replace168.value, 0 }, + { &search169, &replace169.value, 0 }, + { &search256, &replace256.value, 0 }, + { &search257, &replace257.value, 0 }, }; -static const nir_search_variable search159_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search2_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search159_0 = { - { nir_search_value_expression, 0 }, - false, - nir_op_b2i, - { &search159_0_0.value }, + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search2_1 = { + { nir_search_value_constant, 0 }, + nir_type_int, { 0x1 /* 1 */ }, }; -static const nir_search_expression search159 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search2 = { { nir_search_value_expression, 0 }, false, - nir_op_i2b, - { &search159_0.value }, + nir_op_udiv, + { &search2_0.value, &search2_1.value }, + NULL, }; -static const nir_search_variable replace159 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace2 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search162_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search6_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search162_0 = { - { nir_search_value_expression, 0 }, - false, - nir_op_ineg, - { &search162_0_0.value }, + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search6_1 = { + { nir_search_value_variable, 32 }, + 1, /* b */ + true, + nir_type_invalid, + (is_pos_power_of_two), }; -static const nir_search_expression search162 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search6 = { { nir_search_value_expression, 0 }, false, - nir_op_i2b, - { &search162_0.value }, + nir_op_udiv, + { &search6_0.value, &search6_1.value }, + NULL, }; -static const nir_search_variable replace162_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace6_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace162 = { - { nir_search_value_expression, 0 }, - false, - nir_op_i2b, - { &replace162_0.value }, -}; - -static const nir_search_variable search163_0_0 = { + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace6_1_0 = { { nir_search_value_variable, 0 }, - 0, /* a */ + 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search163_0 = { - { nir_search_value_expression, 0 }, - false, - nir_op_iabs, - { &search163_0_0.value }, -}; -static const nir_search_expression search163 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace6_1 = { { nir_search_value_expression, 0 }, false, - nir_op_i2b, - { &search163_0.value }, -}; - -static const nir_search_variable replace163_0 = { - { nir_search_value_variable, 0 }, - 0, /* a */ - false, - nir_type_invalid, + nir_op_find_lsb, + { &replace6_1_0.value }, + NULL, }; -static const nir_search_expression replace163 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace6 = { { nir_search_value_expression, 0 }, false, - nir_op_i2b, - { &replace163_0.value }, + nir_op_ushr, + { &replace6_0.value, &replace6_1.value }, + NULL, }; -static const struct transform nir_opt_algebraic_i2b_xforms[] = { - { &search159, &replace159.value, 0 }, - { &search162, &replace162.value, 0 }, - { &search163, &replace163.value, 0 }, +static const struct transform nir_opt_algebraic_udiv_xforms[] = { + { &search2, &replace2.value, 0 }, + { &search6, &replace6.value, 0 }, }; -static const nir_search_variable search198_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search221_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search198_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search221_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search198 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search221 = { { nir_search_value_expression, 0 }, false, nir_op_extract_i8, - { &search198_0.value, &search198_1.value }, + { &search221_0.value, &search221_1.value }, + NULL, }; -static const nir_search_variable replace198_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace221_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace198_0_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace221_0_1_0_0 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x3 /* 3 */ }, }; -static const nir_search_variable replace198_0_1_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace221_0_1_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace198_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace221_0_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_isub, - { &replace198_0_1_0_0.value, &replace198_0_1_0_1.value }, + { &replace221_0_1_0_0.value, &replace221_0_1_0_1.value }, + NULL, }; -static const nir_search_constant replace198_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace221_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x8 /* 8 */ }, }; -static const nir_search_expression replace198_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace221_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_imul, - { &replace198_0_1_0.value, &replace198_0_1_1.value }, + { &replace221_0_1_0.value, &replace221_0_1_1.value }, + NULL, }; -static const nir_search_expression replace198_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace221_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &replace198_0_0.value, &replace198_0_1.value }, + { &replace221_0_0.value, &replace221_0_1.value }, + NULL, }; -static const nir_search_constant replace198_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace221_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x18 /* 24 */ }, }; -static const nir_search_expression replace198 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace221 = { { nir_search_value_expression, 0 }, false, nir_op_ishr, - { &replace198_0.value, &replace198_1.value }, + { &replace221_0.value, &replace221_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_extract_i8_xforms[] = { - { &search198, &replace198.value, 26 }, + { &search221, &replace221.value, 27 }, }; -static const nir_search_variable search193_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search216_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search193_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search216_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search193 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search216 = { { nir_search_value_expression, 32 }, false, nir_op_uadd_carry, - { &search193_0.value, &search193_1.value }, + { &search216_0.value, &search216_1.value }, + NULL, }; -static const nir_search_variable replace193_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace216_0_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace193_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace216_0_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace193_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace216_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_iadd, - { &replace193_0_0_0.value, &replace193_0_0_1.value }, + { &replace216_0_0_0.value, &replace216_0_0_1.value }, + NULL, }; -static const nir_search_variable replace193_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace216_0_1 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace193_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace216_0 = { { nir_search_value_expression, 0 }, false, nir_op_ult, - { &replace193_0_0.value, &replace193_0_1.value }, + { &replace216_0_0.value, &replace216_0_1.value }, + NULL, }; -static const nir_search_expression replace193 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace216 = { { nir_search_value_expression, 0 }, false, nir_op_b2i, - { &replace193_0.value }, + { &replace216_0.value }, + NULL, }; static const struct transform nir_opt_algebraic_uadd_carry_xforms[] = { - { &search193, &replace193.value, 22 }, + { &search216, &replace216.value, 23 }, }; -static const nir_search_variable search196_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search219_0 = { { nir_search_value_variable, 0 }, 0, /* value */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search196_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search219_1 = { { nir_search_value_variable, 0 }, 1, /* offset */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search196_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search219_2 = { { nir_search_value_variable, 0 }, 2, /* bits */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search196 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search219 = { { nir_search_value_expression, 0 }, false, nir_op_ibitfield_extract, - { &search196_0.value, &search196_1.value, &search196_2.value }, + { &search219_0.value, &search219_1.value, &search219_2.value }, + NULL, }; -static const nir_search_constant replace196_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace219_0_0 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x1f /* 31 */ }, }; -static const nir_search_variable replace196_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace219_0_1 = { { nir_search_value_variable, 0 }, 2, /* bits */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace196_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace219_0 = { { nir_search_value_expression, 0 }, false, nir_op_ilt, - { &replace196_0_0.value, &replace196_0_1.value }, + { &replace219_0_0.value, &replace219_0_1.value }, + NULL, }; -static const nir_search_variable replace196_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace219_1 = { { nir_search_value_variable, 0 }, 0, /* value */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace196_2_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace219_2_0 = { { nir_search_value_variable, 0 }, 0, /* value */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace196_2_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace219_2_1 = { { nir_search_value_variable, 0 }, 1, /* offset */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace196_2_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace219_2_2 = { { nir_search_value_variable, 0 }, 2, /* bits */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace196_2 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace219_2 = { { nir_search_value_expression, 0 }, false, nir_op_ibfe, - { &replace196_2_0.value, &replace196_2_1.value, &replace196_2_2.value }, + { &replace219_2_0.value, &replace219_2_1.value, &replace219_2_2.value }, + NULL, }; -static const nir_search_expression replace196 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace219 = { { nir_search_value_expression, 0 }, false, nir_op_bcsel, - { &replace196_0.value, &replace196_1.value, &replace196_2.value }, + { &replace219_0.value, &replace219_1.value, &replace219_2.value }, + NULL, }; static const struct transform nir_opt_algebraic_ibitfield_extract_xforms[] = { - { &search196, &replace196.value, 25 }, + { &search219, &replace219.value, 26 }, }; -static const nir_search_variable search210_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search233_0 = { { nir_search_value_variable, 0 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search210_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search233_1 = { { nir_search_value_variable, 0 }, 1, /* exp */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search210 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search233 = { { nir_search_value_expression, 32 }, false, nir_op_ldexp, - { &search210_0.value, &search210_1.value }, + { &search233_0.value, &search233_1.value }, + NULL, }; -static const nir_search_variable replace210_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace233_0_0 = { { nir_search_value_variable, 0 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace210_0_1_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace233_0_1_0_0_0_0_0 = { { nir_search_value_variable, 0 }, 1, /* exp */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace210_0_1_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace233_0_1_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { -0xfc /* -252 */ }, }; -static const nir_search_expression replace210_0_1_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace233_0_1_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_imax, - { &replace210_0_1_0_0_0_0_0.value, &replace210_0_1_0_0_0_0_1.value }, + { &replace233_0_1_0_0_0_0_0.value, &replace233_0_1_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant replace210_0_1_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace233_0_1_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xfe /* 254 */ }, }; -static const nir_search_expression replace210_0_1_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace233_0_1_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_imin, - { &replace210_0_1_0_0_0_0.value, &replace210_0_1_0_0_0_1.value }, + { &replace233_0_1_0_0_0_0.value, &replace233_0_1_0_0_0_1.value }, + NULL, }; -static const nir_search_constant replace210_0_1_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace233_0_1_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x1 /* 1 */ }, }; -static const nir_search_expression replace210_0_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace233_0_1_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishr, - { &replace210_0_1_0_0_0.value, &replace210_0_1_0_0_1.value }, + { &replace233_0_1_0_0_0.value, &replace233_0_1_0_0_1.value }, + NULL, }; -static const nir_search_constant replace210_0_1_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace233_0_1_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x7f /* 127 */ }, }; -static const nir_search_expression replace210_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace233_0_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_iadd, - { &replace210_0_1_0_0.value, &replace210_0_1_0_1.value }, + { &replace233_0_1_0_0.value, &replace233_0_1_0_1.value }, + NULL, }; -static const nir_search_constant replace210_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace233_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x17 /* 23 */ }, }; -static const nir_search_expression replace210_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace233_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &replace210_0_1_0.value, &replace210_0_1_1.value }, + { &replace233_0_1_0.value, &replace233_0_1_1.value }, + NULL, }; -static const nir_search_expression replace210_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace233_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace210_0_0.value, &replace210_0_1.value }, + { &replace233_0_0.value, &replace233_0_1.value }, + NULL, }; -static const nir_search_variable replace210_1_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace233_1_0_0_0_0_0 = { { nir_search_value_variable, 0 }, 1, /* exp */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace210_1_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace233_1_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { -0xfc /* -252 */ }, }; -static const nir_search_expression replace210_1_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace233_1_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_imax, - { &replace210_1_0_0_0_0_0.value, &replace210_1_0_0_0_0_1.value }, + { &replace233_1_0_0_0_0_0.value, &replace233_1_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant replace210_1_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace233_1_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xfe /* 254 */ }, }; -static const nir_search_expression replace210_1_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace233_1_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_imin, - { &replace210_1_0_0_0_0.value, &replace210_1_0_0_0_1.value }, + { &replace233_1_0_0_0_0.value, &replace233_1_0_0_0_1.value }, + NULL, }; -static const nir_search_variable replace210_1_0_0_1_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace233_1_0_0_1_0_0_0 = { { nir_search_value_variable, 0 }, 1, /* exp */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace210_1_0_0_1_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace233_1_0_0_1_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { -0xfc /* -252 */ }, }; -static const nir_search_expression replace210_1_0_0_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace233_1_0_0_1_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_imax, - { &replace210_1_0_0_1_0_0_0.value, &replace210_1_0_0_1_0_0_1.value }, + { &replace233_1_0_0_1_0_0_0.value, &replace233_1_0_0_1_0_0_1.value }, + NULL, }; -static const nir_search_constant replace210_1_0_0_1_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace233_1_0_0_1_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0xfe /* 254 */ }, }; -static const nir_search_expression replace210_1_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace233_1_0_0_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_imin, - { &replace210_1_0_0_1_0_0.value, &replace210_1_0_0_1_0_1.value }, + { &replace233_1_0_0_1_0_0.value, &replace233_1_0_0_1_0_1.value }, + NULL, }; -static const nir_search_constant replace210_1_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace233_1_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x1 /* 1 */ }, }; -static const nir_search_expression replace210_1_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace233_1_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ishr, - { &replace210_1_0_0_1_0.value, &replace210_1_0_0_1_1.value }, + { &replace233_1_0_0_1_0.value, &replace233_1_0_0_1_1.value }, + NULL, }; -static const nir_search_expression replace210_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace233_1_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_isub, - { &replace210_1_0_0_0.value, &replace210_1_0_0_1.value }, + { &replace233_1_0_0_0.value, &replace233_1_0_0_1.value }, + NULL, }; -static const nir_search_constant replace210_1_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace233_1_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x7f /* 127 */ }, }; -static const nir_search_expression replace210_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace233_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_iadd, - { &replace210_1_0_0.value, &replace210_1_0_1.value }, + { &replace233_1_0_0.value, &replace233_1_0_1.value }, + NULL, }; -static const nir_search_constant replace210_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace233_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x17 /* 23 */ }, }; -static const nir_search_expression replace210_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace233_1 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &replace210_1_0.value, &replace210_1_1.value }, + { &replace233_1_0.value, &replace233_1_1.value }, + NULL, }; -static const nir_search_expression replace210 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace233 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace210_0.value, &replace210_1.value }, + { &replace233_0.value, &replace233_1.value }, + NULL, }; -static const nir_search_variable search211_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search234_0 = { { nir_search_value_variable, 0 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search211_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search234_1 = { { nir_search_value_variable, 0 }, 1, /* exp */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search211 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search234 = { { nir_search_value_expression, 64 }, false, nir_op_ldexp, - { &search211_0.value, &search211_1.value }, + { &search234_0.value, &search234_1.value }, + NULL, }; -static const nir_search_variable replace211_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace234_0_0 = { { nir_search_value_variable, 0 }, 0, /* x */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace211_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace234_0_1_0 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_variable replace211_0_1_1_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace234_0_1_1_0_0_0_0_0 = { { nir_search_value_variable, 0 }, 1, /* exp */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace211_0_1_1_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace234_0_1_1_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { -0x7fc /* -2044 */ }, }; -static const nir_search_expression replace211_0_1_1_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace234_0_1_1_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_imax, - { &replace211_0_1_1_0_0_0_0_0.value, &replace211_0_1_1_0_0_0_0_1.value }, + { &replace234_0_1_1_0_0_0_0_0.value, &replace234_0_1_1_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant replace211_0_1_1_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace234_0_1_1_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x7fe /* 2046 */ }, }; -static const nir_search_expression replace211_0_1_1_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace234_0_1_1_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_imin, - { &replace211_0_1_1_0_0_0_0.value, &replace211_0_1_1_0_0_0_1.value }, + { &replace234_0_1_1_0_0_0_0.value, &replace234_0_1_1_0_0_0_1.value }, + NULL, }; -static const nir_search_constant replace211_0_1_1_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace234_0_1_1_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x1 /* 1 */ }, }; -static const nir_search_expression replace211_0_1_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace234_0_1_1_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishr, - { &replace211_0_1_1_0_0_0.value, &replace211_0_1_1_0_0_1.value }, + { &replace234_0_1_1_0_0_0.value, &replace234_0_1_1_0_0_1.value }, + NULL, }; -static const nir_search_constant replace211_0_1_1_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace234_0_1_1_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x3ff /* 1023 */ }, }; -static const nir_search_expression replace211_0_1_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace234_0_1_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_iadd, - { &replace211_0_1_1_0_0.value, &replace211_0_1_1_0_1.value }, + { &replace234_0_1_1_0_0.value, &replace234_0_1_1_0_1.value }, + NULL, }; -static const nir_search_constant replace211_0_1_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace234_0_1_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x14 /* 20 */ }, }; -static const nir_search_expression replace211_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace234_0_1_1 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &replace211_0_1_1_0.value, &replace211_0_1_1_1.value }, + { &replace234_0_1_1_0.value, &replace234_0_1_1_1.value }, + NULL, }; -static const nir_search_expression replace211_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace234_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_pack_double_2x32_split, - { &replace211_0_1_0.value, &replace211_0_1_1.value }, + { &replace234_0_1_0.value, &replace234_0_1_1.value }, + NULL, }; -static const nir_search_expression replace211_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace234_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace211_0_0.value, &replace211_0_1.value }, + { &replace234_0_0.value, &replace234_0_1.value }, + NULL, }; -static const nir_search_constant replace211_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace234_1_0 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x0 /* 0 */ }, }; -static const nir_search_variable replace211_1_1_0_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace234_1_1_0_0_0_0_0 = { { nir_search_value_variable, 0 }, 1, /* exp */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace211_1_1_0_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace234_1_1_0_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { -0x7fc /* -2044 */ }, }; -static const nir_search_expression replace211_1_1_0_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace234_1_1_0_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_imax, - { &replace211_1_1_0_0_0_0_0.value, &replace211_1_1_0_0_0_0_1.value }, + { &replace234_1_1_0_0_0_0_0.value, &replace234_1_1_0_0_0_0_1.value }, + NULL, }; -static const nir_search_constant replace211_1_1_0_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace234_1_1_0_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x7fe /* 2046 */ }, }; -static const nir_search_expression replace211_1_1_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace234_1_1_0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_imin, - { &replace211_1_1_0_0_0_0.value, &replace211_1_1_0_0_0_1.value }, + { &replace234_1_1_0_0_0_0.value, &replace234_1_1_0_0_0_1.value }, + NULL, }; -static const nir_search_variable replace211_1_1_0_0_1_0_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace234_1_1_0_0_1_0_0_0 = { { nir_search_value_variable, 0 }, 1, /* exp */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace211_1_1_0_0_1_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace234_1_1_0_0_1_0_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { -0x7fc /* -2044 */ }, }; -static const nir_search_expression replace211_1_1_0_0_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace234_1_1_0_0_1_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_imax, - { &replace211_1_1_0_0_1_0_0_0.value, &replace211_1_1_0_0_1_0_0_1.value }, + { &replace234_1_1_0_0_1_0_0_0.value, &replace234_1_1_0_0_1_0_0_1.value }, + NULL, }; -static const nir_search_constant replace211_1_1_0_0_1_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace234_1_1_0_0_1_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x7fe /* 2046 */ }, }; -static const nir_search_expression replace211_1_1_0_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace234_1_1_0_0_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_imin, - { &replace211_1_1_0_0_1_0_0.value, &replace211_1_1_0_0_1_0_1.value }, + { &replace234_1_1_0_0_1_0_0.value, &replace234_1_1_0_0_1_0_1.value }, + NULL, }; -static const nir_search_constant replace211_1_1_0_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace234_1_1_0_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x1 /* 1 */ }, }; -static const nir_search_expression replace211_1_1_0_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace234_1_1_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ishr, - { &replace211_1_1_0_0_1_0.value, &replace211_1_1_0_0_1_1.value }, + { &replace234_1_1_0_0_1_0.value, &replace234_1_1_0_0_1_1.value }, + NULL, }; -static const nir_search_expression replace211_1_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace234_1_1_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_isub, - { &replace211_1_1_0_0_0.value, &replace211_1_1_0_0_1.value }, + { &replace234_1_1_0_0_0.value, &replace234_1_1_0_0_1.value }, + NULL, }; -static const nir_search_constant replace211_1_1_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace234_1_1_0_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x3ff /* 1023 */ }, }; -static const nir_search_expression replace211_1_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace234_1_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_iadd, - { &replace211_1_1_0_0.value, &replace211_1_1_0_1.value }, + { &replace234_1_1_0_0.value, &replace234_1_1_0_1.value }, + NULL, }; -static const nir_search_constant replace211_1_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace234_1_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x14 /* 20 */ }, }; -static const nir_search_expression replace211_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace234_1_1 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &replace211_1_1_0.value, &replace211_1_1_1.value }, + { &replace234_1_1_0.value, &replace234_1_1_1.value }, + NULL, }; -static const nir_search_expression replace211_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace234_1 = { { nir_search_value_expression, 0 }, false, nir_op_pack_double_2x32_split, - { &replace211_1_0.value, &replace211_1_1.value }, + { &replace234_1_0.value, &replace234_1_1.value }, + NULL, }; -static const nir_search_expression replace211 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace234 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, - { &replace211_0.value, &replace211_1.value }, + { &replace234_0.value, &replace234_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_ldexp_xforms[] = { - { &search210, &replace210.value, 0 }, - { &search211, &replace211.value, 0 }, + { &search233, &replace233.value, 0 }, + { &search234, &replace234.value, 0 }, }; -static const nir_search_variable search200_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search223_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search200_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search223_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search200 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search223 = { { nir_search_value_expression, 0 }, false, nir_op_extract_i16, - { &search200_0.value, &search200_1.value }, + { &search223_0.value, &search223_1.value }, + NULL, }; -static const nir_search_variable replace200_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace223_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_constant replace200_0_1_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace223_0_1_0_0 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x1 /* 1 */ }, }; -static const nir_search_variable replace200_0_1_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace223_0_1_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace200_0_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace223_0_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_isub, - { &replace200_0_1_0_0.value, &replace200_0_1_0_1.value }, + { &replace223_0_1_0_0.value, &replace223_0_1_0_1.value }, + NULL, }; -static const nir_search_constant replace200_0_1_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace223_0_1_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression replace200_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace223_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_imul, - { &replace200_0_1_0.value, &replace200_0_1_1.value }, + { &replace223_0_1_0.value, &replace223_0_1_1.value }, + NULL, }; -static const nir_search_expression replace200_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace223_0 = { { nir_search_value_expression, 0 }, false, nir_op_ishl, - { &replace200_0_0.value, &replace200_0_1.value }, + { &replace223_0_0.value, &replace223_0_1.value }, + NULL, }; -static const nir_search_constant replace200_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace223_1 = { { nir_search_value_constant, 0 }, nir_type_int, { 0x10 /* 16 */ }, }; -static const nir_search_expression replace200 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace223 = { { nir_search_value_expression, 0 }, false, nir_op_ishr, - { &replace200_0.value, &replace200_1.value }, + { &replace223_0.value, &replace223_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_extract_i16_xforms[] = { - { &search200, &replace200.value, 27 }, + { &search223, &replace223.value, 28 }, }; static bool @@ -13898,6 +19794,17 @@ } } break; + case nir_op_i2b: + for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_i2b_xforms); i++) { + const struct transform *xform = &nir_opt_algebraic_i2b_xforms[i]; + if (condition_flags[xform->condition_offset] && + nir_replace_instr(alu, xform->search, xform->replace, + mem_ctx)) { + progress = true; + break; + } + } + break; case nir_op_ixor: for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_ixor_xforms); i++) { const struct transform *xform = &nir_opt_algebraic_ixor_xforms[i]; @@ -13931,6 +19838,17 @@ } } break; + case nir_op_umod: + for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_umod_xforms); i++) { + const struct transform *xform = &nir_opt_algebraic_umod_xforms[i]; + if (condition_flags[xform->condition_offset] && + nir_replace_instr(alu, xform->search, xform->replace, + mem_ctx)) { + progress = true; + break; + } + } + break; case nir_op_imul: for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_imul_xforms); i++) { const struct transform *xform = &nir_opt_algebraic_imul_xforms[i]; @@ -13953,9 +19871,9 @@ } } break; - case nir_op_usadd_4x8: - for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_usadd_4x8_xforms); i++) { - const struct transform *xform = &nir_opt_algebraic_usadd_4x8_xforms[i]; + case nir_op_ineg: + for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_ineg_xforms); i++) { + const struct transform *xform = &nir_opt_algebraic_ineg_xforms[i]; if (condition_flags[xform->condition_offset] && nir_replace_instr(alu, xform->search, xform->replace, mem_ctx)) { @@ -14118,6 +20036,17 @@ } } break; + case nir_op_imod: + for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_imod_xforms); i++) { + const struct transform *xform = &nir_opt_algebraic_imod_xforms[i]; + if (condition_flags[xform->condition_offset] && + nir_replace_instr(alu, xform->search, xform->replace, + mem_ctx)) { + progress = true; + break; + } + } + break; case nir_op_ieq: for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_ieq_xforms); i++) { const struct transform *xform = &nir_opt_algebraic_ieq_xforms[i]; @@ -14151,9 +20080,20 @@ } } break; - case nir_op_ineg: - for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_ineg_xforms); i++) { - const struct transform *xform = &nir_opt_algebraic_ineg_xforms[i]; + case nir_op_usadd_4x8: + for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_usadd_4x8_xforms); i++) { + const struct transform *xform = &nir_opt_algebraic_usadd_4x8_xforms[i]; + if (condition_flags[xform->condition_offset] && + nir_replace_instr(alu, xform->search, xform->replace, + mem_ctx)) { + progress = true; + break; + } + } + break; + case nir_op_idiv: + for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_idiv_xforms); i++) { + const struct transform *xform = &nir_opt_algebraic_idiv_xforms[i]; if (condition_flags[xform->condition_offset] && nir_replace_instr(alu, xform->search, xform->replace, mem_ctx)) { @@ -14679,9 +20619,9 @@ } } break; - case nir_op_i2b: - for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_i2b_xforms); i++) { - const struct transform *xform = &nir_opt_algebraic_i2b_xforms[i]; + case nir_op_udiv: + for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_udiv_xforms); i++) { + const struct transform *xform = &nir_opt_algebraic_udiv_xforms[i]; if (condition_flags[xform->condition_offset] && nir_replace_instr(alu, xform->search, xform->replace, mem_ctx)) { @@ -14775,46 +20715,47 @@ nir_opt_algebraic(nir_shader *shader) { bool progress = false; - bool condition_flags[36]; + bool condition_flags[37]; const nir_shader_compiler_options *options = shader->options; (void) options; condition_flags[0] = true; - condition_flags[1] = options->lower_flrp32; - condition_flags[2] = options->lower_flrp64; - condition_flags[3] = options->lower_ffract; - condition_flags[4] = !options->lower_flrp32; - condition_flags[5] = !options->lower_flrp64; - condition_flags[6] = options->lower_ffma; - condition_flags[7] = options->fuse_ffma; - condition_flags[8] = !options->lower_fsat; - condition_flags[9] = options->lower_fsat; - condition_flags[10] = options->lower_scmp; - condition_flags[11] = options->lower_fpow; - condition_flags[12] = !options->lower_fpow; - condition_flags[13] = options->lower_fdiv; - condition_flags[14] = options->lower_fsqrt; - condition_flags[15] = !options->lower_fsqrt; - condition_flags[16] = !options->lower_extract_byte; - condition_flags[17] = !options->lower_extract_word; - condition_flags[18] = options->lower_sub; - condition_flags[19] = options->lower_negate; - condition_flags[20] = options->lower_fmod32; - condition_flags[21] = options->lower_fmod64; - condition_flags[22] = options->lower_uadd_carry; - condition_flags[23] = options->lower_usub_borrow; - condition_flags[24] = options->lower_bitfield_insert; - condition_flags[25] = options->lower_bitfield_extract; - condition_flags[26] = options->lower_extract_byte; - condition_flags[27] = options->lower_extract_word; - condition_flags[28] = options->lower_pack_unorm_2x16; - condition_flags[29] = options->lower_pack_unorm_4x8; - condition_flags[30] = options->lower_pack_snorm_2x16; - condition_flags[31] = options->lower_pack_snorm_4x8; - condition_flags[32] = options->lower_unpack_unorm_2x16; - condition_flags[33] = options->lower_unpack_unorm_4x8; - condition_flags[34] = options->lower_unpack_snorm_2x16; - condition_flags[35] = options->lower_unpack_snorm_4x8; + condition_flags[1] = options->lower_idiv; + condition_flags[2] = options->lower_flrp32; + condition_flags[3] = options->lower_flrp64; + condition_flags[4] = options->lower_ffract; + condition_flags[5] = !options->lower_flrp32; + condition_flags[6] = !options->lower_flrp64; + condition_flags[7] = options->lower_ffma; + condition_flags[8] = options->fuse_ffma; + condition_flags[9] = !options->lower_fsat; + condition_flags[10] = options->lower_fsat; + condition_flags[11] = options->lower_scmp; + condition_flags[12] = options->lower_fpow; + condition_flags[13] = !options->lower_fpow; + condition_flags[14] = options->lower_fdiv; + condition_flags[15] = options->lower_fsqrt; + condition_flags[16] = !options->lower_fsqrt; + condition_flags[17] = !options->lower_extract_byte; + condition_flags[18] = !options->lower_extract_word; + condition_flags[19] = options->lower_sub; + condition_flags[20] = options->lower_negate; + condition_flags[21] = options->lower_fmod32; + condition_flags[22] = options->lower_fmod64; + condition_flags[23] = options->lower_uadd_carry; + condition_flags[24] = options->lower_usub_borrow; + condition_flags[25] = options->lower_bitfield_insert; + condition_flags[26] = options->lower_bitfield_extract; + condition_flags[27] = options->lower_extract_byte; + condition_flags[28] = options->lower_extract_word; + condition_flags[29] = options->lower_pack_unorm_2x16; + condition_flags[30] = options->lower_pack_unorm_4x8; + condition_flags[31] = options->lower_pack_snorm_2x16; + condition_flags[32] = options->lower_pack_snorm_4x8; + condition_flags[33] = options->lower_unpack_unorm_2x16; + condition_flags[34] = options->lower_unpack_unorm_4x8; + condition_flags[35] = options->lower_unpack_snorm_2x16; + condition_flags[36] = options->lower_unpack_snorm_4x8; nir_foreach_function(function, shader) { if (function->impl) @@ -14837,427 +20778,881 @@ unsigned condition_offset; }; -#endif - +#endif + + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search270_0_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search270_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_inot, + { &search270_0_0.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search270 = { + { nir_search_value_expression, 0 }, + false, + nir_op_b2f, + { &search270_0.value }, + (is_used_more_than_once), +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace270_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace270_1 = { + { nir_search_value_constant, 0 }, + nir_type_float, { 0x0 /* 0.0 */ }, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace270_2 = { + { nir_search_value_constant, 0 }, + nir_type_float, { 0x3ff0000000000000 /* 1.0 */ }, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace270 = { + { nir_search_value_expression, 0 }, + false, + nir_op_bcsel, + { &replace270_0.value, &replace270_1.value, &replace270_2.value }, + NULL, +}; + +static const struct transform nir_opt_algebraic_late_b2f_xforms[] = { + { &search270, &replace270.value, 0 }, +}; -static const nir_search_variable search239_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search268_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search239_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search268_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search239 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search268 = { { nir_search_value_expression, 0 }, false, nir_op_fdot4, - { &search239_0.value, &search239_1.value }, + { &search268_0.value, &search268_1.value }, + NULL, }; -static const nir_search_variable replace239_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace268_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace239_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace268_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace239 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace268 = { { nir_search_value_expression, 0 }, false, nir_op_fdot_replicated4, - { &replace239_0.value, &replace239_1.value }, + { &replace268_0.value, &replace268_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_late_fdot4_xforms[] = { - { &search239, &replace239.value, 36 }, + { &search268, &replace268.value, 37 }, }; -static const nir_search_variable search233_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search262_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search233_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search262_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search233_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search262_0 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, - { &search233_0_0.value, &search233_0_1.value }, + { &search262_0_0.value, &search262_0_1.value }, + NULL, }; -static const nir_search_constant search233_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search262_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_expression search233 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search262 = { { nir_search_value_expression, 0 }, false, nir_op_flt, - { &search233_0.value, &search233_1.value }, + { &search262_0.value, &search262_1.value }, + NULL, }; -static const nir_search_variable replace233_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace262_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace233_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace262_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace233_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace262_1 = { { nir_search_value_expression, 0 }, false, nir_op_fneg, - { &replace233_1_0.value }, + { &replace262_1_0.value }, + NULL, }; -static const nir_search_expression replace233 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace262 = { { nir_search_value_expression, 0 }, false, nir_op_flt, - { &replace233_0.value, &replace233_1.value }, + { &replace262_0.value, &replace262_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_late_flt_xforms[] = { - { &search233, &replace233.value, 0 }, + { &search262, &replace262.value, 0 }, }; -static const nir_search_variable search237_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search266_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search237_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search266_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search237 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search266 = { { nir_search_value_expression, 0 }, false, nir_op_fdot2, - { &search237_0.value, &search237_1.value }, + { &search266_0.value, &search266_1.value }, + NULL, }; -static const nir_search_variable replace237_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace266_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace237_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace266_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace237 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace266 = { { nir_search_value_expression, 0 }, false, nir_op_fdot_replicated2, - { &replace237_0.value, &replace237_1.value }, + { &replace266_0.value, &replace266_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_late_fdot2_xforms[] = { - { &search237, &replace237.value, 36 }, + { &search266, &replace266.value, 37 }, }; -static const nir_search_variable search238_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search267_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search238_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search267_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search238 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search267 = { { nir_search_value_expression, 0 }, false, nir_op_fdot3, - { &search238_0.value, &search238_1.value }, + { &search267_0.value, &search267_1.value }, + NULL, }; -static const nir_search_variable replace238_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace267_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace238_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace267_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace238 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace267 = { { nir_search_value_expression, 0 }, false, nir_op_fdot_replicated3, - { &replace238_0.value, &replace238_1.value }, + { &replace267_0.value, &replace267_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_late_fdot3_xforms[] = { - { &search238, &replace238.value, 36 }, + { &search267, &replace267.value, 37 }, }; -static const nir_search_variable search236_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search271_0_0_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search271_0_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_inot, + { &search271_0_0_0.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search271_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_b2f, + { &search271_0_0.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search271 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fneg, + { &search271_0.value }, + (is_used_more_than_once), +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace271_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search236_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace271_1 = { + { nir_search_value_constant, 0 }, + nir_type_float, { 0x8000000000000000L /* -0.0 */ }, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant replace271_2 = { + { nir_search_value_constant, 0 }, + nir_type_float, { 0xbff0000000000000L /* -1.0 */ }, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace271 = { + { nir_search_value_expression, 0 }, + false, + nir_op_bcsel, + { &replace271_0.value, &replace271_1.value, &replace271_2.value }, + NULL, +}; + +static const struct transform nir_opt_algebraic_late_fneg_xforms[] = { + { &search271, &replace271.value, 0 }, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search273_0_0 = { + { nir_search_value_variable, 0 }, + 0, /* c */ + true, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search273_0_1 = { + { nir_search_value_variable, 0 }, + 1, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search273_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fadd, + { &search273_0_0.value, &search273_0_1.value }, + (is_used_once), +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search273_1_0 = { + { nir_search_value_variable, 0 }, + 0, /* c */ + true, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search273_1_1 = { + { nir_search_value_variable, 0 }, + 2, /* b */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search273_1 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fadd, + { &search273_1_0.value, &search273_1_1.value }, + (is_used_once), +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search273 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fmax, + { &search273_0.value, &search273_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace273_0 = { + { nir_search_value_variable, 0 }, + 0, /* c */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace273_1_0 = { + { nir_search_value_variable, 0 }, + 1, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace273_1_1 = { + { nir_search_value_variable, 0 }, + 2, /* b */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace273_1 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fmax, + { &replace273_1_0.value, &replace273_1_1.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace273 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fadd, + { &replace273_0.value, &replace273_1.value }, + NULL, +}; + +static const struct transform nir_opt_algebraic_late_fmax_xforms[] = { + { &search273, &replace273.value, 0 }, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search265_0_0 = { + { nir_search_value_variable, 0 }, + 0, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search265_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search236_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search265_0 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, - { &search236_0_0.value, &search236_0_1.value }, + { &search265_0_0.value, &search265_0_1.value }, + NULL, }; -static const nir_search_constant search236_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search265_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_expression search236 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search265 = { { nir_search_value_expression, 0 }, true, nir_op_fne, - { &search236_0.value, &search236_1.value }, + { &search265_0.value, &search265_1.value }, + NULL, }; -static const nir_search_variable replace236_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace265_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace236_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace265_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace236_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace265_1 = { { nir_search_value_expression, 0 }, false, nir_op_fneg, - { &replace236_1_0.value }, + { &replace265_1_0.value }, + NULL, }; -static const nir_search_expression replace236 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace265 = { { nir_search_value_expression, 0 }, false, nir_op_fne, - { &replace236_0.value, &replace236_1.value }, + { &replace265_0.value, &replace265_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_late_fne_xforms[] = { - { &search236, &replace236.value, 0 }, + { &search265, &replace265.value, 0 }, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search272_0_0 = { + { nir_search_value_variable, 0 }, + 0, /* c */ + true, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search272_0_1 = { + { nir_search_value_variable, 0 }, + 1, /* a */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search272_0 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fadd, + { &search272_0_0.value, &search272_0_1.value }, + (is_used_once), +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search272_1_0 = { + { nir_search_value_variable, 0 }, + 0, /* c */ + true, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search272_1_1 = { + { nir_search_value_variable, 0 }, + 2, /* b */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search272_1 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fadd, + { &search272_1_0.value, &search272_1_1.value }, + (is_used_once), +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search272 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fmin, + { &search272_0.value, &search272_1.value }, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace272_0 = { + { nir_search_value_variable, 0 }, + 0, /* c */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace272_1_0 = { + { nir_search_value_variable, 0 }, + 1, /* a */ + false, + nir_type_invalid, + NULL, +}; + +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace272_1_1 = { + { nir_search_value_variable, 0 }, + 2, /* b */ + false, + nir_type_invalid, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace272_1 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fmin, + { &replace272_1_0.value, &replace272_1_1.value }, + NULL, +}; +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace272 = { + { nir_search_value_expression, 0 }, + false, + nir_op_fadd, + { &replace272_0.value, &replace272_1.value }, + NULL, +}; + +static const struct transform nir_opt_algebraic_late_fmin_xforms[] = { + { &search272, &replace272.value, 0 }, }; -static const nir_search_variable search235_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search264_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search235_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search264_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search235_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search264_0 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, - { &search235_0_0.value, &search235_0_1.value }, + { &search264_0_0.value, &search264_0_1.value }, + NULL, }; -static const nir_search_constant search235_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search264_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_expression search235 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search264 = { { nir_search_value_expression, 0 }, true, nir_op_feq, - { &search235_0.value, &search235_1.value }, + { &search264_0.value, &search264_1.value }, + NULL, }; -static const nir_search_variable replace235_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace264_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace235_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace264_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace235_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace264_1 = { { nir_search_value_expression, 0 }, false, nir_op_fneg, - { &replace235_1_0.value }, + { &replace264_1_0.value }, + NULL, }; -static const nir_search_expression replace235 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace264 = { { nir_search_value_expression, 0 }, false, nir_op_feq, - { &replace235_0.value, &replace235_1.value }, + { &replace264_0.value, &replace264_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_late_feq_xforms[] = { - { &search235, &replace235.value, 0 }, + { &search264, &replace264.value, 0 }, }; -static const nir_search_variable search234_0_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search263_0_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search234_0_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search263_0_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search234_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search263_0 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, - { &search234_0_0.value, &search234_0_1.value }, + { &search263_0_0.value, &search263_0_1.value }, + NULL, }; -static const nir_search_constant search234_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_constant search263_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x0 /* 0.0 */ }, }; -static const nir_search_expression search234 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search263 = { { nir_search_value_expression, 0 }, true, nir_op_fge, - { &search234_0.value, &search234_1.value }, + { &search263_0.value, &search263_1.value }, + NULL, }; -static const nir_search_variable replace234_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace263_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace234_1_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace263_1_0 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace234_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace263_1 = { { nir_search_value_expression, 0 }, false, nir_op_fneg, - { &replace234_1_0.value }, + { &replace263_1_0.value }, + NULL, }; -static const nir_search_expression replace234 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace263 = { { nir_search_value_expression, 0 }, false, nir_op_fge, - { &replace234_0.value, &replace234_1.value }, + { &replace263_0.value, &replace263_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_late_fge_xforms[] = { - { &search234, &replace234.value, 0 }, + { &search263, &replace263.value, 0 }, }; -static const nir_search_variable search240_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search269_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable search240_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable search269_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression search240 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression search269 = { { nir_search_value_expression, 0 }, false, nir_op_fdph, - { &search240_0.value, &search240_1.value }, + { &search269_0.value, &search269_1.value }, + NULL, }; -static const nir_search_variable replace240_0 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace269_0 = { { nir_search_value_variable, 0 }, 0, /* a */ false, nir_type_invalid, + NULL, }; -static const nir_search_variable replace240_1 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_variable replace269_1 = { { nir_search_value_variable, 0 }, 1, /* b */ false, nir_type_invalid, + NULL, }; -static const nir_search_expression replace240 = { +#include "compiler/nir/nir_search_helpers.h" +static const nir_search_expression replace269 = { { nir_search_value_expression, 0 }, false, nir_op_fdph_replicated, - { &replace240_0.value, &replace240_1.value }, + { &replace269_0.value, &replace269_1.value }, + NULL, }; static const struct transform nir_opt_algebraic_late_fdph_xforms[] = { - { &search240, &replace240.value, 36 }, + { &search269, &replace269.value, 37 }, }; static bool @@ -15275,6 +21670,17 @@ continue; switch (alu->op) { + case nir_op_b2f: + for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_late_b2f_xforms); i++) { + const struct transform *xform = &nir_opt_algebraic_late_b2f_xforms[i]; + if (condition_flags[xform->condition_offset] && + nir_replace_instr(alu, xform->search, xform->replace, + mem_ctx)) { + progress = true; + break; + } + } + break; case nir_op_fdot4: for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_late_fdot4_xforms); i++) { const struct transform *xform = &nir_opt_algebraic_late_fdot4_xforms[i]; @@ -15319,6 +21725,28 @@ } } break; + case nir_op_fneg: + for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_late_fneg_xforms); i++) { + const struct transform *xform = &nir_opt_algebraic_late_fneg_xforms[i]; + if (condition_flags[xform->condition_offset] && + nir_replace_instr(alu, xform->search, xform->replace, + mem_ctx)) { + progress = true; + break; + } + } + break; + case nir_op_fmax: + for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_late_fmax_xforms); i++) { + const struct transform *xform = &nir_opt_algebraic_late_fmax_xforms[i]; + if (condition_flags[xform->condition_offset] && + nir_replace_instr(alu, xform->search, xform->replace, + mem_ctx)) { + progress = true; + break; + } + } + break; case nir_op_fne: for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_late_fne_xforms); i++) { const struct transform *xform = &nir_opt_algebraic_late_fne_xforms[i]; @@ -15330,6 +21758,17 @@ } } break; + case nir_op_fmin: + for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_late_fmin_xforms); i++) { + const struct transform *xform = &nir_opt_algebraic_late_fmin_xforms[i]; + if (condition_flags[xform->condition_offset] && + nir_replace_instr(alu, xform->search, xform->replace, + mem_ctx)) { + progress = true; + break; + } + } + break; case nir_op_feq: for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_late_feq_xforms); i++) { const struct transform *xform = &nir_opt_algebraic_late_feq_xforms[i]; @@ -15393,47 +21832,48 @@ nir_opt_algebraic_late(nir_shader *shader) { bool progress = false; - bool condition_flags[37]; + bool condition_flags[38]; const nir_shader_compiler_options *options = shader->options; (void) options; condition_flags[0] = true; - condition_flags[1] = options->lower_flrp32; - condition_flags[2] = options->lower_flrp64; - condition_flags[3] = options->lower_ffract; - condition_flags[4] = !options->lower_flrp32; - condition_flags[5] = !options->lower_flrp64; - condition_flags[6] = options->lower_ffma; - condition_flags[7] = options->fuse_ffma; - condition_flags[8] = !options->lower_fsat; - condition_flags[9] = options->lower_fsat; - condition_flags[10] = options->lower_scmp; - condition_flags[11] = options->lower_fpow; - condition_flags[12] = !options->lower_fpow; - condition_flags[13] = options->lower_fdiv; - condition_flags[14] = options->lower_fsqrt; - condition_flags[15] = !options->lower_fsqrt; - condition_flags[16] = !options->lower_extract_byte; - condition_flags[17] = !options->lower_extract_word; - condition_flags[18] = options->lower_sub; - condition_flags[19] = options->lower_negate; - condition_flags[20] = options->lower_fmod32; - condition_flags[21] = options->lower_fmod64; - condition_flags[22] = options->lower_uadd_carry; - condition_flags[23] = options->lower_usub_borrow; - condition_flags[24] = options->lower_bitfield_insert; - condition_flags[25] = options->lower_bitfield_extract; - condition_flags[26] = options->lower_extract_byte; - condition_flags[27] = options->lower_extract_word; - condition_flags[28] = options->lower_pack_unorm_2x16; - condition_flags[29] = options->lower_pack_unorm_4x8; - condition_flags[30] = options->lower_pack_snorm_2x16; - condition_flags[31] = options->lower_pack_snorm_4x8; - condition_flags[32] = options->lower_unpack_unorm_2x16; - condition_flags[33] = options->lower_unpack_unorm_4x8; - condition_flags[34] = options->lower_unpack_snorm_2x16; - condition_flags[35] = options->lower_unpack_snorm_4x8; - condition_flags[36] = options->fdot_replicates; + condition_flags[1] = options->lower_idiv; + condition_flags[2] = options->lower_flrp32; + condition_flags[3] = options->lower_flrp64; + condition_flags[4] = options->lower_ffract; + condition_flags[5] = !options->lower_flrp32; + condition_flags[6] = !options->lower_flrp64; + condition_flags[7] = options->lower_ffma; + condition_flags[8] = options->fuse_ffma; + condition_flags[9] = !options->lower_fsat; + condition_flags[10] = options->lower_fsat; + condition_flags[11] = options->lower_scmp; + condition_flags[12] = options->lower_fpow; + condition_flags[13] = !options->lower_fpow; + condition_flags[14] = options->lower_fdiv; + condition_flags[15] = options->lower_fsqrt; + condition_flags[16] = !options->lower_fsqrt; + condition_flags[17] = !options->lower_extract_byte; + condition_flags[18] = !options->lower_extract_word; + condition_flags[19] = options->lower_sub; + condition_flags[20] = options->lower_negate; + condition_flags[21] = options->lower_fmod32; + condition_flags[22] = options->lower_fmod64; + condition_flags[23] = options->lower_uadd_carry; + condition_flags[24] = options->lower_usub_borrow; + condition_flags[25] = options->lower_bitfield_insert; + condition_flags[26] = options->lower_bitfield_extract; + condition_flags[27] = options->lower_extract_byte; + condition_flags[28] = options->lower_extract_word; + condition_flags[29] = options->lower_pack_unorm_2x16; + condition_flags[30] = options->lower_pack_unorm_4x8; + condition_flags[31] = options->lower_pack_snorm_2x16; + condition_flags[32] = options->lower_pack_snorm_4x8; + condition_flags[33] = options->lower_unpack_unorm_2x16; + condition_flags[34] = options->lower_unpack_unorm_4x8; + condition_flags[35] = options->lower_unpack_snorm_2x16; + condition_flags[36] = options->lower_unpack_snorm_4x8; + condition_flags[37] = options->fdot_replicates; nir_foreach_function(function, shader) { if (function->impl) diff -Nru mesa-12.0.6/src/compiler/nir/nir_opt_algebraic.py mesa-17.0.7/src/compiler/nir/nir_opt_algebraic.py --- mesa-12.0.6/src/compiler/nir/nir_opt_algebraic.py 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_opt_algebraic.py 2017-06-01 10:37:10.000000000 +0000 @@ -45,10 +45,11 @@ # however, be used for backend-requested lowering operations as those need to # happen regardless of precision. # -# Variable names are specified as "[#]name[@type]" where "#" inicates that -# the given variable will only match constants and the type indicates that +# Variable names are specified as "[#]name[@type][(cond)]" where "#" inicates +# that the given variable will only match constants and the type indicates that # the given variable will only match values from ALU instructions with the -# given output type. +# given output type, and (cond) specifies an additional condition function +# (see nir_search_helpers.h). # # For constants, you have to be careful to make sure that it is the right # type because python is unaware of the source and destination types of the @@ -62,10 +63,23 @@ # constructed value should have that bit-size. optimizations = [ + + (('imul', a, '#b@32(is_pos_power_of_two)'), ('ishl', a, ('find_lsb', b))), + (('imul', a, '#b@32(is_neg_power_of_two)'), ('ineg', ('ishl', a, ('find_lsb', ('iabs', b))))), + (('udiv', a, 1), a), + (('idiv', a, 1), a), + (('umod', a, 1), 0), + (('imod', a, 1), 0), + (('udiv', a, '#b@32(is_pos_power_of_two)'), ('ushr', a, ('find_lsb', b))), + (('idiv', a, '#b@32(is_pos_power_of_two)'), ('imul', ('isign', a), ('ushr', ('iabs', a), ('find_lsb', b))), 'options->lower_idiv'), + (('idiv', a, '#b@32(is_neg_power_of_two)'), ('ineg', ('imul', ('isign', a), ('ushr', ('iabs', a), ('find_lsb', ('iabs', b))))), 'options->lower_idiv'), + (('umod', a, '#b(is_pos_power_of_two)'), ('iand', a, ('isub', b, 1))), + (('fneg', ('fneg', a)), a), (('ineg', ('ineg', a)), a), (('fabs', ('fabs', a)), ('fabs', a)), (('fabs', ('fneg', a)), ('fabs', a)), + (('fabs', ('u2f', a)), ('u2f', a)), (('iabs', ('iabs', a)), ('iabs', a)), (('iabs', ('ineg', a)), ('iabs', a)), (('~fadd', a, 0.0), a), @@ -98,6 +112,7 @@ (('~flrp', a, a, b), a), (('~flrp', 0.0, a, b), ('fmul', a, b)), (('~flrp', a, b, ('b2f', c)), ('bcsel', c, b, a), 'options->lower_flrp32'), + (('~flrp', a, 0.0, c), ('fadd', ('fmul', ('fneg', a), c), a)), (('flrp@32', a, b, c), ('fadd', ('fmul', c, ('fsub', b, a)), a), 'options->lower_flrp32'), (('flrp@64', a, b, c), ('fadd', ('fmul', c, ('fsub', b, a)), a), 'options->lower_flrp64'), (('ffract', a), ('fsub', a, ('ffloor', a)), 'options->lower_ffract'), @@ -109,6 +124,17 @@ (('~fadd@64', a, ('fmul', c , ('fadd', b, ('fneg', a)))), ('flrp', a, b, c), '!options->lower_flrp64'), (('ffma', a, b, c), ('fadd', ('fmul', a, b), c), 'options->lower_ffma'), (('~fadd', ('fmul', a, b), c), ('ffma', a, b, c), 'options->fuse_ffma'), + + # (a * #b + #c) << #d + # ((a * #b) << #d) + (#c << #d) + # (a * (#b << #d)) + (#c << #d) + (('ishl', ('iadd', ('imul', a, '#b'), '#c'), '#d'), + ('iadd', ('imul', a, ('ishl', b, d)), ('ishl', c, d))), + + # (a * #b) << #c + # a * (#b << #c) + (('ishl', ('imul', a, '#b'), '#c'), ('imul', a, ('ishl', b, c))), + # Comparison simplifications (('~inot', ('flt', a, b)), ('fge', a, b)), (('~inot', ('fge', a, b)), ('flt', a, b)), @@ -125,6 +151,8 @@ # inot(a) (('fge', 0.0, ('b2f', a)), ('inot', a)), + (('fge', ('fneg', ('b2f', a)), 0.0), ('inot', a)), + # 0.0 < fabs(a) # fabs(a) > 0.0 # fabs(a) != 0.0 because fabs(a) must be >= 0 @@ -134,7 +162,7 @@ (('fge', ('fneg', ('fabs', a)), 0.0), ('feq', a, 0.0)), (('bcsel', ('flt', b, a), b, a), ('fmin', a, b)), (('bcsel', ('flt', a, b), b, a), ('fmax', a, b)), - (('bcsel', ('inot', 'a@bool'), b, c), ('bcsel', a, c, b)), + (('bcsel', ('inot', a), b, c), ('bcsel', a, c, b)), (('bcsel', a, ('bcsel', a, b, c), d), ('bcsel', a, b, d)), (('bcsel', a, True, 'b@bool'), ('ior', a, b)), (('fmin', a, a), a), @@ -150,6 +178,8 @@ (('fmin', ('fmax', ('fmin', ('fmax', a, b), c), b), c), ('fmin', ('fmax', a, b), c)), (('imin', ('imax', ('imin', ('imax', a, b), c), b), c), ('imin', ('imax', a, b), c)), (('umin', ('umax', ('umin', ('umax', a, b), c), b), c), ('umin', ('umax', a, b), c)), + (('fmax', ('fsat', a), '#b@32(is_zero_to_one)'), ('fsat', ('fmax', a, b))), + (('fmin', ('fsat', a), '#b@32(is_zero_to_one)'), ('fsat', ('fmin', a, b))), (('extract_u8', ('imin', ('imax', a, 0), 0xff), 0), ('imin', ('imax', a, 0), 0xff)), (('~ior', ('flt', a, b), ('flt', a, c)), ('flt', a, ('fmax', b, c))), (('~ior', ('flt', a, c), ('flt', b, c)), ('flt', ('fmin', a, b), c)), @@ -170,6 +200,8 @@ (('fmul', ('b2f', a), ('b2f', b)), ('b2f', ('iand', a, b))), (('fsat', ('fadd', ('b2f', a), ('b2f', b))), ('b2f', ('ior', a, b))), (('iand', 'a@bool', 1.0), ('b2f', a)), + # True/False are ~0 and 0 in NIR. b2i of True is 1, and -1 is ~0 (True). + (('ineg', ('b2i', a)), a), (('flt', ('fneg', ('b2f', a)), 0), a), # Generated by TGSI KILL_IF. (('flt', ('fsub', 0.0, ('b2f', a)), 0), a), # Generated by TGSI KILL_IF. # Comparison with the same args. Note that these are not done for @@ -188,6 +220,7 @@ (('iand', a, 0), 0), (('ior', a, a), a), (('ior', a, 0), a), + (('ior', a, True), True), (('fxor', a, a), 0.0), (('ixor', a, a), 0), (('ixor', a, 0), a), @@ -234,11 +267,15 @@ (('~frcp', ('frsq', a)), ('fsqrt', a), '!options->lower_fsqrt'), # Boolean simplifications (('ieq', 'a@bool', True), a), - (('ine', 'a@bool', True), ('inot', a)), + (('ine(is_not_used_by_if)', 'a@bool', True), ('inot', a)), (('ine', 'a@bool', False), a), - (('ieq', 'a@bool', False), ('inot', 'a')), - (('bcsel', a, True, False), ('ine', a, 0)), - (('bcsel', a, False, True), ('ieq', a, 0)), + (('ieq(is_not_used_by_if)', 'a@bool', False), ('inot', 'a')), + (('bcsel', a, True, False), a), + (('bcsel', a, False, True), ('inot', a)), + (('bcsel@32', a, 1.0, 0.0), ('b2f', a)), + (('bcsel@32', a, 0.0, 1.0), ('b2f', ('inot', a))), + (('bcsel@32', a, -1.0, -0.0), ('fneg', ('b2f', a))), + (('bcsel@32', a, -0.0, -1.0), ('fneg', ('b2f', ('inot', a)))), (('bcsel', True, b, c), b), (('bcsel', False, b, c), c), # The result of this should be hit by constant propagation and, in the @@ -436,6 +473,14 @@ optimizations += [(bitfield_reverse('x@32'), ('bitfield_reverse', 'x'))] +# For any float comparison operation, "cmp", if you have "a == a && a cmp b" +# then the "a == a" is redundant because it's equivalent to "a is not NaN" +# and, if a is a NaN then the second comparison will fail anyway. +for op in ['flt', 'fge', 'feq']: + optimizations += [ + (('iand', ('feq', a, a), (op, a, b)), (op, a, b)), + (('iand', ('feq', a, a), (op, b, a)), (op, b, a)), + ] # Add optimizations to handle the case where the result of a ternary is # compared to a constant. This way we can take things like @@ -474,6 +519,13 @@ (('fdot3', a, b), ('fdot_replicated3', a, b), 'options->fdot_replicates'), (('fdot4', a, b), ('fdot_replicated4', a, b), 'options->fdot_replicates'), (('fdph', a, b), ('fdph_replicated', a, b), 'options->fdot_replicates'), + + (('b2f(is_used_more_than_once)', ('inot', a)), ('bcsel', a, 0.0, 1.0)), + (('fneg(is_used_more_than_once)', ('b2f', ('inot', a))), ('bcsel', a, -0.0, -1.0)), + + # we do these late so that we don't get in the way of creating ffmas + (('fmin', ('fadd(is_used_once)', '#c', a), ('fadd(is_used_once)', '#c', b)), ('fadd', c, ('fmin', a, b))), + (('fmax', ('fadd(is_used_once)', '#c', a), ('fadd(is_used_once)', '#c', b)), ('fadd', c, ('fmax', a, b))), ] print nir_algebraic.AlgebraicPass("nir_opt_algebraic", optimizations).render() diff -Nru mesa-12.0.6/src/compiler/nir/nir_opt_conditional_discard.c mesa-17.0.7/src/compiler/nir/nir_opt_conditional_discard.c --- mesa-12.0.6/src/compiler/nir/nir_opt_conditional_discard.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_opt_conditional_discard.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,124 @@ +/* + * Copyright © 2016 Red Hat + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "nir.h" +#include "nir_builder.h" + +/** @file nir_opt_conditional_discard.c + * + * Handles optimization of lowering if (cond) discard to discard_if(cond). + */ + +static bool +nir_opt_conditional_discard_block(nir_builder *b, nir_block *block) +{ + if (nir_cf_node_is_first(&block->cf_node)) + return false; + + nir_cf_node *prev_node = nir_cf_node_prev(&block->cf_node); + if (prev_node->type != nir_cf_node_if) + return false; + + nir_if *if_stmt = nir_cf_node_as_if(prev_node); + nir_block *then_block = nir_if_first_then_block(if_stmt); + nir_block *else_block = nir_if_first_else_block(if_stmt); + + /* check there is only one else block and it is empty */ + if (nir_if_last_else_block(if_stmt) != else_block) + return false; + if (!exec_list_is_empty(&else_block->instr_list)) + return false; + + /* check there is only one then block and it has only one instruction in it */ + if (nir_if_last_then_block(if_stmt) != then_block) + return false; + if (exec_list_is_empty(&then_block->instr_list)) + return false; + if (exec_list_length(&then_block->instr_list) > 1) + return false; + /* + * make sure no subsequent phi nodes point at this if. + */ + nir_block *after = nir_cf_node_as_block(nir_cf_node_next(&if_stmt->cf_node)); + nir_foreach_instr_safe(instr, after) { + if (instr->type != nir_instr_type_phi) + break; + nir_phi_instr *phi = nir_instr_as_phi(instr); + + nir_foreach_phi_src(phi_src, phi) { + if (phi_src->pred == then_block || + phi_src->pred == else_block) + return false; + } + } + + /* Get the first instruction in the then block and confirm it is + * a discard or a discard_if + */ + nir_instr *instr = nir_block_first_instr(then_block); + if (instr->type != nir_instr_type_intrinsic) + return false; + + nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr); + if (intrin->intrinsic != nir_intrinsic_discard && + intrin->intrinsic != nir_intrinsic_discard_if) + return false; + + nir_src cond; + + b->cursor = nir_before_cf_node(prev_node); + if (intrin->intrinsic == nir_intrinsic_discard) + cond = if_stmt->condition; + else + cond = nir_src_for_ssa(nir_iand(b, + nir_ssa_for_src(b, if_stmt->condition, 1), + nir_ssa_for_src(b, intrin->src[0], 1))); + + nir_intrinsic_instr *discard_if = + nir_intrinsic_instr_create(b->shader, nir_intrinsic_discard_if); + nir_src_copy(&discard_if->src[0], &cond, discard_if); + + nir_instr_insert_before_cf(prev_node, &discard_if->instr); + nir_instr_remove(&intrin->instr); + nir_cf_node_remove(&if_stmt->cf_node); + + return true; +} + +bool +nir_opt_conditional_discard(nir_shader *shader) +{ + bool progress = false; + + nir_builder builder; + + nir_foreach_function(function, shader) { + if (function->impl) { + nir_builder_init(&builder, function->impl); + nir_foreach_block_safe(block, function->impl) { + progress |= nir_opt_conditional_discard_block(&builder, block); + } + } + } + return progress; +} diff -Nru mesa-12.0.6/src/compiler/nir/nir_opt_constant_folding.c mesa-17.0.7/src/compiler/nir/nir_opt_constant_folding.c --- mesa-12.0.6/src/compiler/nir/nir_opt_constant_folding.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_opt_constant_folding.c 2017-06-01 10:37:10.000000000 +0000 @@ -155,6 +155,14 @@ progress |= constant_fold_deref(&instr->instr, instr->variables[i]); } + if (instr->intrinsic == nir_intrinsic_discard_if) { + nir_const_value *src_val = nir_src_as_const_value(instr->src[0]); + if (src_val && src_val->u32[0] == 0) { + nir_instr_remove(&instr->instr); + progress = true; + } + } + return progress; } diff -Nru mesa-12.0.6/src/compiler/nir/nir_opt_copy_propagate.c mesa-17.0.7/src/compiler/nir/nir_opt_copy_propagate.c --- mesa-12.0.6/src/compiler/nir/nir_opt_copy_propagate.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_opt_copy_propagate.c 2017-06-01 10:37:10.000000000 +0000 @@ -103,7 +103,7 @@ { if (!src->is_ssa) { if (src->reg.indirect) - return copy_prop_src(src, parent_instr, parent_if); + return copy_prop_src(src->reg.indirect, parent_instr, parent_if); return false; } diff -Nru mesa-12.0.6/src/compiler/nir/nir_opt_copy_prop_vars.c mesa-17.0.7/src/compiler/nir/nir_opt_copy_prop_vars.c --- mesa-12.0.6/src/compiler/nir/nir_opt_copy_prop_vars.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_opt_copy_prop_vars.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,813 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "nir.h" +#include "nir_builder.h" + +#include "util/bitscan.h" + +/** + * Variable-based copy propagation + * + * Normally, NIR trusts in SSA form for most of its copy-propagation needs. + * However, there are cases, especially when dealing with indirects, where SSA + * won't help you. This pass is for those times. Specifically, it handles + * the following things that the rest of NIR can't: + * + * 1) Copy-propagation on variables that have indirect access. This includes + * propagating from indirect stores into indirect loads. + * + * 2) Dead code elimination of store_var and copy_var intrinsics based on + * killed destination values. + * + * 3) Removal of redundant load_var intrinsics. We can't trust regular CSE + * to do this because it isn't aware of variable writes that may alias the + * value and make the former load invalid. + * + * Unfortunately, properly handling all of those cases makes this path rather + * complex. In order to avoid additional complexity, this pass is entirely + * block-local. If we tried to make it global, the data-flow analysis would + * rapidly get out of hand. Fortunately, for anything that is only ever + * accessed directly, we get SSA based copy-propagation which is extremely + * powerful so this isn't that great a loss. + */ + +struct value { + bool is_ssa; + union { + nir_ssa_def *ssa[4]; + nir_deref_var *deref; + }; +}; + +struct copy_entry { + struct list_head link; + + nir_instr *store_instr[4]; + + unsigned comps_may_be_read; + struct value src; + + nir_deref_var *dst; +}; + +struct copy_prop_var_state { + nir_shader *shader; + + void *mem_ctx; + + struct list_head copies; + + /* We're going to be allocating and deleting a lot of copy entries so we'll + * keep a free list to avoid thrashing malloc too badly. + */ + struct list_head copy_free_list; + + bool progress; +}; + +static struct copy_entry * +copy_entry_create(struct copy_prop_var_state *state, + nir_deref_var *dst_deref) +{ + struct copy_entry *entry; + if (!list_empty(&state->copy_free_list)) { + struct list_head *item = state->copy_free_list.next; + list_del(item); + entry = LIST_ENTRY(struct copy_entry, item, link); + memset(entry, 0, sizeof(*entry)); + } else { + entry = rzalloc(state->mem_ctx, struct copy_entry); + } + + entry->dst = dst_deref; + list_add(&entry->link, &state->copies); + + return entry; +} + +static void +copy_entry_remove(struct copy_prop_var_state *state, struct copy_entry *entry) +{ + list_del(&entry->link); + list_add(&entry->link, &state->copy_free_list); +} + +enum deref_compare_result { + derefs_equal_bit = (1 << 0), + derefs_may_alias_bit = (1 << 1), + derefs_a_contains_b_bit = (1 << 2), + derefs_b_contains_a_bit = (1 << 3), +}; + +/** Returns true if the storage referrenced to by deref completely contains + * the storage referenced by sub. + * + * NOTE: This is fairly general and could be moved to core NIR if someone else + * ever needs it. + */ +static enum deref_compare_result +compare_derefs(nir_deref_var *a, nir_deref_var *b) +{ + if (a->var != b->var) + return 0; + + /* Start off assuming they fully compare. We ignore equality for now. In + * the end, we'll determine that by containment. + */ + enum deref_compare_result result = derefs_may_alias_bit | + derefs_a_contains_b_bit | + derefs_b_contains_a_bit; + + nir_deref *a_tail = &a->deref; + nir_deref *b_tail = &b->deref; + while (a_tail->child && b_tail->child) { + a_tail = a_tail->child; + b_tail = b_tail->child; + + assert(a_tail->deref_type == b_tail->deref_type); + switch (a_tail->deref_type) { + case nir_deref_type_array: { + nir_deref_array *a_arr = nir_deref_as_array(a_tail); + nir_deref_array *b_arr = nir_deref_as_array(b_tail); + + if (a_arr->deref_array_type == nir_deref_array_type_direct && + b_arr->deref_array_type == nir_deref_array_type_direct) { + /* If they're both direct and have different offsets, they + * don't even alias much less anything else. + */ + if (a_arr->base_offset != b_arr->base_offset) + return 0; + } else if (a_arr->deref_array_type == nir_deref_array_type_wildcard) { + if (b_arr->deref_array_type != nir_deref_array_type_wildcard) + result &= ~derefs_b_contains_a_bit; + } else if (b_arr->deref_array_type == nir_deref_array_type_wildcard) { + if (a_arr->deref_array_type != nir_deref_array_type_wildcard) + result &= ~derefs_a_contains_b_bit; + } else if (a_arr->deref_array_type == nir_deref_array_type_indirect && + b_arr->deref_array_type == nir_deref_array_type_indirect) { + assert(a_arr->indirect.is_ssa && b_arr->indirect.is_ssa); + if (a_arr->indirect.ssa == b_arr->indirect.ssa) { + /* If they're different constant offsets from the same indirect + * then they don't alias at all. + */ + if (a_arr->base_offset != b_arr->base_offset) + return 0; + /* Otherwise the indirect and base both match */ + } else { + /* If they're have different indirect offsets then we can't + * prove anything about containment. + */ + result &= ~(derefs_a_contains_b_bit | derefs_b_contains_a_bit); + } + } else { + /* In this case, one is indirect and the other direct so we can't + * prove anything about containment. + */ + result &= ~(derefs_a_contains_b_bit | derefs_b_contains_a_bit); + } + break; + } + + case nir_deref_type_struct: { + nir_deref_struct *a_struct = nir_deref_as_struct(a_tail); + nir_deref_struct *b_struct = nir_deref_as_struct(b_tail); + + /* If they're different struct members, they don't even alias */ + if (a_struct->index != b_struct->index) + return 0; + break; + } + + default: + unreachable("Invalid deref type"); + } + } + + /* If a is longer than b, then it can't contain b */ + if (a_tail->child) + result &= ~derefs_a_contains_b_bit; + if (b_tail->child) + result &= ~derefs_b_contains_a_bit; + + /* If a contains b and b contains a they must be equal. */ + if ((result & derefs_a_contains_b_bit) && (result & derefs_b_contains_a_bit)) + result |= derefs_equal_bit; + + return result; +} + +static void +remove_dead_writes(struct copy_prop_var_state *state, + struct copy_entry *entry, unsigned write_mask) +{ + /* We're overwriting another entry. Some of it's components may not + * have been read yet and, if that's the case, we may be able to delete + * some instructions but we have to be careful. + */ + unsigned dead_comps = write_mask & ~entry->comps_may_be_read; + + for (unsigned mask = dead_comps; mask;) { + unsigned i = u_bit_scan(&mask); + + nir_instr *instr = entry->store_instr[i]; + + /* We may have already deleted it on a previous iteration */ + if (!instr) + continue; + + /* See if this instr is used anywhere that it's not dead */ + bool keep = false; + for (unsigned j = 0; j < 4; j++) { + if (entry->store_instr[j] == instr) { + if (dead_comps & (1 << j)) { + entry->store_instr[j] = NULL; + } else { + keep = true; + } + } + } + + if (!keep) { + nir_instr_remove(instr); + state->progress = true; + } + } +} + +static struct copy_entry * +lookup_entry_for_deref(struct copy_prop_var_state *state, + nir_deref_var *deref, + enum deref_compare_result allowed_comparisons) +{ + list_for_each_entry(struct copy_entry, iter, &state->copies, link) { + if (compare_derefs(iter->dst, deref) & allowed_comparisons) + return iter; + } + + return NULL; +} + +static void +mark_aliased_entries_as_read(struct copy_prop_var_state *state, + nir_deref_var *deref, unsigned components) +{ + list_for_each_entry(struct copy_entry, iter, &state->copies, link) { + if (compare_derefs(iter->dst, deref) & derefs_may_alias_bit) + iter->comps_may_be_read |= components; + } +} + +static struct copy_entry * +get_entry_and_kill_aliases(struct copy_prop_var_state *state, + nir_deref_var *deref, + unsigned write_mask) +{ + struct copy_entry *entry = NULL; + list_for_each_entry_safe(struct copy_entry, iter, &state->copies, link) { + if (!iter->src.is_ssa) { + /* If this write aliases the source of some entry, get rid of it */ + if (compare_derefs(iter->src.deref, deref) & derefs_may_alias_bit) { + copy_entry_remove(state, iter); + continue; + } + } + + enum deref_compare_result comp = compare_derefs(iter->dst, deref); + /* This is a store operation. If we completely overwrite some value, we + * want to delete any dead writes that may be present. + */ + if (comp & derefs_b_contains_a_bit) + remove_dead_writes(state, iter, write_mask); + + if (comp & derefs_equal_bit) { + assert(entry == NULL); + entry = iter; + } else if (comp & derefs_may_alias_bit) { + copy_entry_remove(state, iter); + } + } + + if (entry == NULL) + entry = copy_entry_create(state, deref); + + return entry; +} + +static void +apply_barrier_for_modes(struct copy_prop_var_state *state, + nir_variable_mode modes) +{ + list_for_each_entry_safe(struct copy_entry, iter, &state->copies, link) { + if ((iter->dst->var->data.mode & modes) || + (!iter->src.is_ssa && (iter->src.deref->var->data.mode & modes))) + copy_entry_remove(state, iter); + } +} + +static void +store_to_entry(struct copy_prop_var_state *state, struct copy_entry *entry, + const struct value *value, unsigned write_mask, + nir_instr *store_instr) +{ + entry->comps_may_be_read &= ~write_mask; + if (value->is_ssa) { + entry->src.is_ssa = true; + /* Only overwrite the written components */ + for (unsigned i = 0; i < 4; i++) { + if (write_mask & (1 << i)) { + entry->store_instr[i] = store_instr; + entry->src.ssa[i] = value->ssa[i]; + } + } + } else { + /* Non-ssa stores always write everything */ + entry->src.is_ssa = false; + entry->src.deref = value->deref; + for (unsigned i = 0; i < 4; i++) + entry->store_instr[i] = store_instr; + } +} + +/* Remove an instruction and return a cursor pointing to where it was */ +static nir_cursor +instr_remove_cursor(nir_instr *instr) +{ + nir_cursor cursor; + nir_instr *prev = nir_instr_prev(instr); + if (prev) { + cursor = nir_after_instr(prev); + } else { + cursor = nir_before_block(instr->block); + } + nir_instr_remove(instr); + return cursor; +} + +/* Do a "load" from an SSA-based entry return it in "value" as a value with a + * single SSA def. Because an entry could reference up to 4 different SSA + * defs, a vecN operation may be inserted to combine them into a single SSA + * def before handing it back to the caller. If the load instruction is no + * longer needed, it is removed and nir_instr::block is set to NULL. (It is + * possible, in some cases, for the load to be used in the vecN operation in + * which case it isn't deleted.) + */ +static bool +load_from_ssa_entry_value(struct copy_prop_var_state *state, + struct copy_entry *entry, + nir_builder *b, nir_intrinsic_instr *intrin, + struct value *value) +{ + *value = entry->src; + assert(value->is_ssa); + + const struct glsl_type *type = nir_deref_tail(&entry->dst->deref)->type; + unsigned num_components = glsl_get_vector_elements(type); + + uint8_t available = 0; + bool all_same = true; + for (unsigned i = 0; i < num_components; i++) { + if (value->ssa[i]) + available |= (1 << i); + + if (value->ssa[i] != value->ssa[0]) + all_same = false; + } + + if (all_same) { + /* Our work here is done */ + b->cursor = instr_remove_cursor(&intrin->instr); + intrin->instr.block = NULL; + return true; + } + + if (available != (1 << num_components) - 1 && + intrin->intrinsic == nir_intrinsic_load_var && + (available & nir_ssa_def_components_read(&intrin->dest.ssa)) == 0) { + /* If none of the components read are available as SSA values, then we + * should just bail. Otherwise, we would end up replacing the uses of + * the load_var a vecN() that just gathers up its components. + */ + return false; + } + + b->cursor = nir_after_instr(&intrin->instr); + + nir_ssa_def *load_def = + intrin->intrinsic == nir_intrinsic_load_var ? &intrin->dest.ssa : NULL; + + bool keep_intrin = false; + nir_ssa_def *comps[4]; + for (unsigned i = 0; i < num_components; i++) { + if (value->ssa[i]) { + comps[i] = nir_channel(b, value->ssa[i], i); + } else { + /* We don't have anything for this component in our + * list. Just re-use a channel from the load. + */ + if (load_def == NULL) + load_def = nir_load_deref_var(b, entry->dst); + + if (load_def->parent_instr == &intrin->instr) + keep_intrin = true; + + comps[i] = nir_channel(b, load_def, i); + } + } + + nir_ssa_def *vec = nir_vec(b, comps, num_components); + for (unsigned i = 0; i < num_components; i++) + value->ssa[i] = vec; + + if (!keep_intrin) { + /* Removing this instruction should not touch the cursor because we + * created the cursor after the intrinsic and have added at least one + * instruction (the vec) since then. + */ + assert(b->cursor.instr != &intrin->instr); + nir_instr_remove(&intrin->instr); + intrin->instr.block = NULL; + } + + return true; +} + +/** + * Specialize the wildcards in a deref chain + * + * This function returns a deref chain identical to \param deref except that + * some of its wildcards are replaced with indices from \param specific. The + * process is guided by \param guide which references the same type as \param + * specific but has the same wildcard array lengths as \param deref. + */ +static nir_deref_var * +specialize_wildcards(nir_deref_var *deref, + nir_deref_var *guide, + nir_deref_var *specific, + void *mem_ctx) +{ + nir_deref_var *ret = nir_deref_var_create(mem_ctx, deref->var); + + nir_deref *deref_tail = deref->deref.child; + nir_deref *guide_tail = guide->deref.child; + nir_deref *spec_tail = specific->deref.child; + nir_deref *ret_tail = &ret->deref; + while (deref_tail) { + switch (deref_tail->deref_type) { + case nir_deref_type_array: { + nir_deref_array *deref_arr = nir_deref_as_array(deref_tail); + + nir_deref_array *ret_arr = nir_deref_array_create(ret_tail); + ret_arr->deref.type = deref_arr->deref.type; + ret_arr->deref_array_type = deref_arr->deref_array_type; + + switch (deref_arr->deref_array_type) { + case nir_deref_array_type_direct: + ret_arr->base_offset = deref_arr->base_offset; + break; + case nir_deref_array_type_indirect: + ret_arr->base_offset = deref_arr->base_offset; + assert(deref_arr->indirect.is_ssa); + ret_arr->indirect = deref_arr->indirect; + break; + case nir_deref_array_type_wildcard: + /* This is where things get tricky. We have to search through + * the entry deref to find its corresponding wildcard and fill + * this slot in with the value from the src. + */ + while (guide_tail) { + if (guide_tail->deref_type == nir_deref_type_array && + nir_deref_as_array(guide_tail)->deref_array_type == + nir_deref_array_type_wildcard) + break; + + guide_tail = guide_tail->child; + spec_tail = spec_tail->child; + } + + nir_deref_array *spec_arr = nir_deref_as_array(spec_tail); + ret_arr->deref_array_type = spec_arr->deref_array_type; + ret_arr->base_offset = spec_arr->base_offset; + ret_arr->indirect = spec_arr->indirect; + } + + ret_tail->child = &ret_arr->deref; + break; + } + case nir_deref_type_struct: { + nir_deref_struct *deref_struct = nir_deref_as_struct(deref_tail); + + nir_deref_struct *ret_struct = + nir_deref_struct_create(ret_tail, deref_struct->index); + ret_struct->deref.type = deref_struct->deref.type; + + ret_tail->child = &ret_struct->deref; + break; + } + case nir_deref_type_var: + unreachable("Invalid deref type"); + } + + deref_tail = deref_tail->child; + ret_tail = ret_tail->child; + } + + return ret; +} + +/* Do a "load" from an deref-based entry return it in "value" as a value. The + * deref returned in "value" will always be a fresh copy so the caller can + * steal it and assign it to the instruction directly without copying it + * again. + */ +static bool +load_from_deref_entry_value(struct copy_prop_var_state *state, + struct copy_entry *entry, + nir_builder *b, nir_intrinsic_instr *intrin, + nir_deref_var *src, struct value *value) +{ + *value = entry->src; + + /* Walk the deref to get the two tails and also figure out if we need to + * specialize any wildcards. + */ + bool need_to_specialize_wildcards = false; + nir_deref *entry_tail = &entry->dst->deref; + nir_deref *src_tail = &src->deref; + while (entry_tail->child && src_tail->child) { + assert(src_tail->child->deref_type == entry_tail->child->deref_type); + if (src_tail->child->deref_type == nir_deref_type_array) { + nir_deref_array *entry_arr = nir_deref_as_array(entry_tail->child); + nir_deref_array *src_arr = nir_deref_as_array(src_tail->child); + + if (src_arr->deref_array_type != nir_deref_array_type_wildcard && + entry_arr->deref_array_type == nir_deref_array_type_wildcard) + need_to_specialize_wildcards = true; + } + + entry_tail = entry_tail->child; + src_tail = src_tail->child; + } + + /* If the entry deref is longer than the source deref then it refers to a + * smaller type and we can't source from it. + */ + assert(entry_tail->child == NULL); + + if (need_to_specialize_wildcards) { + /* The entry has some wildcards that are not in src. This means we need + * to construct a new deref based on the entry but using the wildcards + * from the source and guided by the entry dst. Oof. + */ + value->deref = specialize_wildcards(entry->src.deref, entry->dst, src, + state->mem_ctx); + } else { + /* We're going to need to make a copy in case we modify it below */ + value->deref = nir_deref_var_clone(value->deref, state->mem_ctx); + } + + if (src_tail->child) { + /* If our source deref is longer than the entry deref, that's ok because + * it just means the entry deref needs to be extended a bit. + */ + nir_deref *value_tail = nir_deref_tail(&value->deref->deref); + value_tail->child = nir_deref_clone(src_tail->child, value_tail); + } + + b->cursor = instr_remove_cursor(&intrin->instr); + + return true; +} + +static bool +try_load_from_entry(struct copy_prop_var_state *state, struct copy_entry *entry, + nir_builder *b, nir_intrinsic_instr *intrin, + nir_deref_var *src, struct value *value) +{ + if (entry == NULL) + return false; + + if (entry->src.is_ssa) { + return load_from_ssa_entry_value(state, entry, b, intrin, value); + } else { + return load_from_deref_entry_value(state, entry, b, intrin, src, value); + } +} + +static void +copy_prop_vars_block(struct copy_prop_var_state *state, + nir_builder *b, nir_block *block) +{ + /* Start each block with a blank slate */ + list_for_each_entry_safe(struct copy_entry, iter, &state->copies, link) + copy_entry_remove(state, iter); + + nir_foreach_instr_safe(instr, block) { + if (instr->type != nir_instr_type_intrinsic) + continue; + + nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr); + switch (intrin->intrinsic) { + case nir_intrinsic_barrier: + case nir_intrinsic_memory_barrier: + /* If we hit a barrier, we need to trash everything that may possibly + * be accessible to another thread. Locals, globals, and things of + * the like are safe, however. + */ + apply_barrier_for_modes(state, ~(nir_var_local | nir_var_global | + nir_var_shader_in | nir_var_uniform)); + break; + + case nir_intrinsic_emit_vertex: + case nir_intrinsic_emit_vertex_with_counter: + apply_barrier_for_modes(state, nir_var_shader_out); + break; + + case nir_intrinsic_load_var: { + nir_deref_var *src = intrin->variables[0]; + + uint8_t comps_read = nir_ssa_def_components_read(&intrin->dest.ssa); + mark_aliased_entries_as_read(state, src, comps_read); + + struct copy_entry *src_entry = + lookup_entry_for_deref(state, src, derefs_a_contains_b_bit); + struct value value; + if (try_load_from_entry(state, src_entry, b, intrin, src, &value)) { + if (value.is_ssa) { + /* lookup_load has already ensured that we get a single SSA + * value that has all of the channels. We just have to do the + * rewrite operation. + */ + if (intrin->instr.block) { + /* The lookup left our instruction in-place. This means it + * must have used it to vec up a bunch of different sources. + * We need to be careful when rewriting uses so we don't + * rewrite the vecN itself. + */ + nir_ssa_def_rewrite_uses_after(&intrin->dest.ssa, + nir_src_for_ssa(value.ssa[0]), + value.ssa[0]->parent_instr); + } else { + nir_ssa_def_rewrite_uses(&intrin->dest.ssa, + nir_src_for_ssa(value.ssa[0])); + } + } else { + /* We're turning it into a load of a different variable */ + ralloc_steal(intrin, value.deref); + intrin->variables[0] = value.deref; + + /* Put it back in again. */ + nir_builder_instr_insert(b, instr); + + value.is_ssa = true; + for (unsigned i = 0; i < intrin->num_components; i++) + value.ssa[i] = &intrin->dest.ssa; + } + state->progress = true; + } else { + value.is_ssa = true; + for (unsigned i = 0; i < intrin->num_components; i++) + value.ssa[i] = &intrin->dest.ssa; + } + + /* Now that we have a value, we're going to store it back so that we + * have the right value next time we come looking for it. In order + * to do this, we need an exact match, not just something that + * contains what we're looking for. + */ + struct copy_entry *store_entry = + lookup_entry_for_deref(state, src, derefs_equal_bit); + if (!store_entry) + store_entry = copy_entry_create(state, src); + + /* Set up a store to this entry with the value of the load. This way + * we can potentially remove subsequent loads. However, we use a + * NULL instruction so we don't try and delete the load on a + * subsequent store. + */ + store_to_entry(state, store_entry, &value, + ((1 << intrin->num_components) - 1), NULL); + break; + } + + case nir_intrinsic_store_var: { + struct value value = { + .is_ssa = true + }; + + for (unsigned i = 0; i < intrin->num_components; i++) + value.ssa[i] = intrin->src[0].ssa; + + nir_deref_var *dst = intrin->variables[0]; + unsigned wrmask = nir_intrinsic_write_mask(intrin); + struct copy_entry *entry = + get_entry_and_kill_aliases(state, dst, wrmask); + store_to_entry(state, entry, &value, wrmask, &intrin->instr); + break; + } + + case nir_intrinsic_copy_var: { + nir_deref_var *dst = intrin->variables[0]; + nir_deref_var *src = intrin->variables[1]; + + if (compare_derefs(src, dst) & derefs_equal_bit) { + /* This is a no-op self-copy. Get rid of it */ + nir_instr_remove(instr); + continue; + } + + mark_aliased_entries_as_read(state, src, 0xf); + + struct copy_entry *src_entry = + lookup_entry_for_deref(state, src, derefs_a_contains_b_bit); + struct value value; + if (try_load_from_entry(state, src_entry, b, intrin, src, &value)) { + if (value.is_ssa) { + nir_store_deref_var(b, dst, value.ssa[0], 0xf); + intrin = nir_instr_as_intrinsic(nir_builder_last_instr(b)); + } else { + /* If this would be a no-op self-copy, don't bother. */ + if (compare_derefs(value.deref, dst) & derefs_equal_bit) + continue; + + /* Just turn it into a copy of a different deref */ + ralloc_steal(intrin, value.deref); + intrin->variables[1] = value.deref; + + /* Put it back in again. */ + nir_builder_instr_insert(b, instr); + } + + state->progress = true; + } else { + value = (struct value) { + .is_ssa = false, + { .deref = src }, + }; + } + + struct copy_entry *dst_entry = + get_entry_and_kill_aliases(state, dst, 0xf); + store_to_entry(state, dst_entry, &value, 0xf, &intrin->instr); + break; + } + + default: + break; + } + } +} + +bool +nir_opt_copy_prop_vars(nir_shader *shader) +{ + struct copy_prop_var_state state; + + state.shader = shader; + state.mem_ctx = ralloc_context(NULL); + list_inithead(&state.copies); + list_inithead(&state.copy_free_list); + + bool global_progress = false; + nir_foreach_function(function, shader) { + if (!function->impl) + continue; + + nir_builder b; + nir_builder_init(&b, function->impl); + + state.progress = false; + nir_foreach_block(block, function->impl) + copy_prop_vars_block(&state, &b, block); + + if (state.progress) { + nir_metadata_preserve(function->impl, nir_metadata_block_index | + nir_metadata_dominance); + global_progress = true; + } + } + + ralloc_free(state.mem_ctx); + + return global_progress; +} diff -Nru mesa-12.0.6/src/compiler/nir/nir_opt_dce.c mesa-17.0.7/src/compiler/nir/nir_opt_dce.c --- mesa-12.0.6/src/compiler/nir/nir_opt_dce.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_opt_dce.c 2017-06-01 10:37:10.000000000 +0000 @@ -131,7 +131,7 @@ static bool nir_opt_dce_impl(nir_function_impl *impl) { - struct exec_list *worklist = ralloc(NULL, struct exec_list); + struct exec_list *worklist = rzalloc(NULL, struct exec_list); exec_list_make_empty(worklist); nir_foreach_block(block, impl) { diff -Nru mesa-12.0.6/src/compiler/nir/nir_opt_dead_cf.c mesa-17.0.7/src/compiler/nir/nir_opt_dead_cf.c --- mesa-12.0.6/src/compiler/nir/nir_opt_dead_cf.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_opt_dead_cf.c 2017-06-01 10:37:10.000000000 +0000 @@ -30,7 +30,7 @@ /* * This file implements an optimization that deletes statically - * unreachable/dead code. In NIR, one way this can happen if if an if + * unreachable/dead code. In NIR, one way this can happen is when an if * statement has a constant condition: * * if (true) { @@ -87,9 +87,8 @@ * point to the correct source. */ nir_block *after = nir_cf_node_as_block(nir_cf_node_next(&if_stmt->cf_node)); - nir_block *last_block = - nir_cf_node_as_block(condition ? nir_if_last_then_node(if_stmt) - : nir_if_last_else_node(if_stmt)); + nir_block *last_block = condition ? nir_if_last_then_block(if_stmt) + : nir_if_last_else_block(if_stmt); nir_foreach_instr_safe(instr, after) { if (instr->type != nir_instr_type_phi) @@ -128,8 +127,7 @@ : &if_stmt->else_list; nir_cf_list list; - nir_cf_extract(&list, nir_before_cf_list(cf_list), - nir_after_cf_list(cf_list)); + nir_cf_list_extract(&list, cf_list); nir_cf_reinsert(&list, nir_after_cf_node(&if_stmt->cf_node)); nir_cf_node_remove(&if_stmt->cf_node); } @@ -206,7 +204,8 @@ nir_metadata_require(impl, nir_metadata_live_ssa_defs | nir_metadata_dominance); - for (nir_block *cur = after->imm_dom; cur != before; cur = cur->imm_dom) { + for (nir_block *cur = after->imm_dom; cur && cur != before; + cur = cur->imm_dom) { nir_foreach_instr(instr, cur) { if (!nir_foreach_ssa_def(instr, def_not_live_out, after)) return false; diff -Nru mesa-12.0.6/src/compiler/nir/nir_opt_gcm.c mesa-17.0.7/src/compiler/nir/nir_opt_gcm.c --- mesa-12.0.6/src/compiler/nir/nir_opt_gcm.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_opt_gcm.c 2017-06-01 10:37:10.000000000 +0000 @@ -26,6 +26,7 @@ */ #include "nir.h" +#include "nir_instr_set.h" /* * Implements Global Code Motion. A description of GCM can be found in @@ -319,18 +320,19 @@ if (lca == NULL) return true; - /* We know have the LCA of all of the uses. If our invariants hold, + /* We now have the LCA of all of the uses. If our invariants hold, * this is dominated by the block that we chose when scheduling early. * We now walk up the dominance tree and pick the lowest block that is * as far outside loops as we can get. */ nir_block *best = lca; - while (lca != def->parent_instr->block) { - assert(lca); - if (state->blocks[lca->index].loop_depth < + for (nir_block *block = lca; block != NULL; block = block->imm_dom) { + if (state->blocks[block->index].loop_depth < state->blocks[best->index].loop_depth) - best = lca; - lca = lca->imm_dom; + best = block; + + if (block == def->parent_instr->block) + break; } def->parent_instr->block = best; @@ -451,9 +453,12 @@ block_info->last_instr = instr; } -static void -opt_gcm_impl(nir_function_impl *impl) +static bool +opt_gcm_impl(nir_function_impl *impl, bool value_number) { + nir_metadata_require(impl, nir_metadata_block_index | + nir_metadata_dominance); + struct gcm_state state; state.impl = impl; @@ -461,15 +466,24 @@ exec_list_make_empty(&state.instrs); state.blocks = rzalloc_array(NULL, struct gcm_block_info, impl->num_blocks); - nir_metadata_require(impl, nir_metadata_block_index | - nir_metadata_dominance); - gcm_build_block_info(&impl->body, &state, 0); nir_foreach_block(block, impl) { gcm_pin_instructions_block(block, &state); } + bool progress = false; + if (value_number) { + struct set *gvn_set = nir_instr_set_create(NULL); + foreach_list_typed_safe(nir_instr, instr, node, &state.instrs) { + if (nir_instr_set_add_or_rewrite(gvn_set, instr)) { + nir_instr_remove(instr); + progress = true; + } + } + nir_instr_set_destroy(gvn_set); + } + foreach_list_typed(nir_instr, instr, node, &state.instrs) gcm_schedule_early_instr(instr, &state); @@ -478,18 +492,27 @@ while (!exec_list_is_empty(&state.instrs)) { nir_instr *instr = exec_node_data(nir_instr, - state.instrs.tail_pred, node); + state.instrs.tail_sentinel.prev, node); gcm_place_instr(instr, &state); } ralloc_free(state.blocks); + + nir_metadata_preserve(impl, nir_metadata_block_index | + nir_metadata_dominance); + + return progress; } -void -nir_opt_gcm(nir_shader *shader) +bool +nir_opt_gcm(nir_shader *shader, bool value_number) { + bool progress = false; + nir_foreach_function(function, shader) { if (function->impl) - opt_gcm_impl(function->impl); + progress |= opt_gcm_impl(function->impl, value_number); } + + return progress; } diff -Nru mesa-12.0.6/src/compiler/nir/nir_opt_if.c mesa-17.0.7/src/compiler/nir/nir_opt_if.c --- mesa-12.0.6/src/compiler/nir/nir_opt_if.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_opt_if.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,256 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "nir.h" +#include "nir_control_flow.h" + +/** + * This optimization detects if statements at the tops of loops where the + * condition is a phi node of two constants and moves half of the if to above + * the loop and the other half of the if to the end of the loop. A simple for + * loop "for (int i = 0; i < 4; i++)", when run through the SPIR-V front-end, + * ends up looking something like this: + * + * vec1 32 ssa_0 = load_const (0x00000000) + * vec1 32 ssa_1 = load_const (0xffffffff) + * loop { + * block block_1: + * vec1 32 ssa_2 = phi block_0: ssa_0, block_7: ssa_5 + * vec1 32 ssa_3 = phi block_0: ssa_0, block_7: ssa_1 + * if ssa_2 { + * block block_2: + * vec1 32 ssa_4 = load_const (0x00000001) + * vec1 32 ssa_5 = iadd ssa_2, ssa_4 + * } else { + * block block_3: + * } + * block block_4: + * vec1 32 ssa_6 = load_const (0x00000004) + * vec1 32 ssa_7 = ilt ssa_5, ssa_6 + * if ssa_7 { + * block block_5: + * } else { + * block block_6: + * break + * } + * block block_7: + * } + * + * This turns it into something like this: + * + * // Stuff from block 1 + * // Stuff from block 3 + * loop { + * block block_1: + * vec1 32 ssa_3 = phi block_0: ssa_0, block_7: ssa_1 + * vec1 32 ssa_6 = load_const (0x00000004) + * vec1 32 ssa_7 = ilt ssa_5, ssa_6 + * if ssa_7 { + * block block_5: + * } else { + * block block_6: + * break + * } + * block block_7: + * // Stuff from block 1 + * // Stuff from block 2 + * vec1 32 ssa_4 = load_const (0x00000001) + * vec1 32 ssa_5 = iadd ssa_2, ssa_4 + * } + */ +static bool +opt_peel_loop_initial_if(nir_loop *loop) +{ + nir_block *header_block = nir_loop_first_block(loop); + nir_block *prev_block = + nir_cf_node_as_block(nir_cf_node_prev(&loop->cf_node)); + + /* It would be insane if this were not true */ + assert(_mesa_set_search(header_block->predecessors, prev_block)); + + /* The loop must have exactly one continue block which could be a block + * ending in a continue instruction or the "natural" continue from the + * last block in the loop back to the top. + */ + if (header_block->predecessors->entries != 2) + return false; + + nir_block *continue_block = NULL; + struct set_entry *pred_entry; + set_foreach(header_block->predecessors, pred_entry) { + if (pred_entry->key != prev_block) + continue_block = (void *)pred_entry->key; + } + + nir_cf_node *if_node = nir_cf_node_next(&header_block->cf_node); + if (!if_node || if_node->type != nir_cf_node_if) + return false; + + nir_if *nif = nir_cf_node_as_if(if_node); + assert(nif->condition.is_ssa); + + nir_ssa_def *cond = nif->condition.ssa; + if (cond->parent_instr->type != nir_instr_type_phi) + return false; + + nir_phi_instr *cond_phi = nir_instr_as_phi(cond->parent_instr); + if (cond->parent_instr->block != header_block) + return false; + + /* We already know we have exactly one continue */ + assert(exec_list_length(&cond_phi->srcs) == 2); + + uint32_t entry_val = 0, continue_val = 0; + nir_foreach_phi_src(src, cond_phi) { + assert(src->src.is_ssa); + nir_const_value *const_src = nir_src_as_const_value(src->src); + if (!const_src) + return false; + + if (src->pred == continue_block) { + continue_val = const_src->u32[0]; + } else { + assert(src->pred == prev_block); + entry_val = const_src->u32[0]; + } + } + + /* If they both execute or both don't execute, this is a job for + * nir_dead_cf, not this pass. + */ + if ((entry_val && continue_val) || (!entry_val && !continue_val)) + return false; + + struct exec_list *continue_list, *entry_list; + if (continue_val) { + continue_list = &nif->then_list; + entry_list = &nif->else_list; + } else { + continue_list = &nif->else_list; + entry_list = &nif->then_list; + } + + /* We want to be moving the contents of entry_list to above the loop so it + * can't contain any break or continue instructions. + */ + foreach_list_typed(nir_cf_node, cf_node, node, entry_list) { + nir_foreach_block_in_cf_node(block, cf_node) { + nir_instr *last_instr = nir_block_last_instr(block); + if (last_instr && last_instr->type == nir_instr_type_jump) + return false; + } + } + + /* Before we do anything, convert the loop to LCSSA. We're about to + * replace a bunch of SSA defs with registers and this will prevent any of + * it from leaking outside the loop. + */ + nir_convert_loop_to_lcssa(loop); + + nir_block *after_if_block = + nir_cf_node_as_block(nir_cf_node_next(&nif->cf_node)); + + /* Get rid of phis in the header block since we will be duplicating it */ + nir_lower_phis_to_regs_block(header_block); + /* Get rid of phis after the if since dominance will change */ + nir_lower_phis_to_regs_block(after_if_block); + + /* Get rid of SSA defs in the pieces we're about to move around */ + nir_lower_ssa_defs_to_regs_block(header_block); + nir_foreach_block_in_cf_node(block, &nif->cf_node) + nir_lower_ssa_defs_to_regs_block(block); + + nir_cf_list header, tmp; + nir_cf_extract(&header, nir_before_block(header_block), + nir_after_block(header_block)); + + nir_cf_list_clone(&tmp, &header, &loop->cf_node, NULL); + nir_cf_reinsert(&tmp, nir_before_cf_node(&loop->cf_node)); + nir_cf_extract(&tmp, nir_before_cf_list(entry_list), + nir_after_cf_list(entry_list)); + nir_cf_reinsert(&tmp, nir_before_cf_node(&loop->cf_node)); + + nir_cf_reinsert(&header, nir_after_block_before_jump(continue_block)); + nir_cf_extract(&tmp, nir_before_cf_list(continue_list), + nir_after_cf_list(continue_list)); + nir_cf_reinsert(&tmp, nir_after_block_before_jump(continue_block)); + + nir_cf_node_remove(&nif->cf_node); + + return true; +} + +static bool +opt_if_cf_list(struct exec_list *cf_list) +{ + bool progress = false; + foreach_list_typed(nir_cf_node, cf_node, node, cf_list) { + switch (cf_node->type) { + case nir_cf_node_block: + break; + + case nir_cf_node_if: { + nir_if *nif = nir_cf_node_as_if(cf_node); + progress |= opt_if_cf_list(&nif->then_list); + progress |= opt_if_cf_list(&nif->else_list); + break; + } + + case nir_cf_node_loop: { + nir_loop *loop = nir_cf_node_as_loop(cf_node); + progress |= opt_if_cf_list(&loop->body); + progress |= opt_peel_loop_initial_if(loop); + break; + } + + case nir_cf_node_function: + unreachable("Invalid cf type"); + } + } + + return progress; +} + +bool +nir_opt_if(nir_shader *shader) +{ + bool progress = false; + + nir_foreach_function(function, shader) { + if (function->impl == NULL) + continue; + + if (opt_if_cf_list(&function->impl->body)) { + nir_metadata_preserve(function->impl, nir_metadata_none); + + /* If that made progress, we're no longer really in SSA form. We + * need to convert registers back into SSA defs and clean up SSA defs + * that don't dominate their uses. + */ + nir_lower_regs_to_ssa_impl(function->impl); + progress = true; + } + } + + return progress; +} diff -Nru mesa-12.0.6/src/compiler/nir/nir_opt_loop_unroll.c mesa-17.0.7/src/compiler/nir/nir_opt_loop_unroll.c --- mesa-12.0.6/src/compiler/nir/nir_opt_loop_unroll.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_opt_loop_unroll.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,575 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include "nir.h" +#include "nir_builder.h" +#include "nir_control_flow.h" +#include "nir_loop_analyze.h" + +/* Prepare this loop for unrolling by first converting to lcssa and then + * converting the phis from the loops first block and the block that follows + * the loop into regs. Partially converting out of SSA allows us to unroll + * the loop without having to keep track of and update phis along the way + * which gets tricky and doesn't add much value over conveting to regs. + * + * The loop may have a continue instruction at the end of the loop which does + * nothing. Once we're out of SSA, we can safely delete it so we don't have + * to deal with it later. + */ +static void +loop_prepare_for_unroll(nir_loop *loop) +{ + nir_convert_loop_to_lcssa(loop); + + nir_lower_phis_to_regs_block(nir_loop_first_block(loop)); + + nir_block *block_after_loop = + nir_cf_node_as_block(nir_cf_node_next(&loop->cf_node)); + + nir_lower_phis_to_regs_block(block_after_loop); + + nir_instr *last_instr = nir_block_last_instr(nir_loop_last_block(loop)); + if (last_instr && last_instr->type == nir_instr_type_jump) { + assert(nir_instr_as_jump(last_instr)->type == nir_jump_continue); + nir_instr_remove(last_instr); + } +} + +static void +get_first_blocks_in_terminator(nir_loop_terminator *term, + nir_block **first_break_block, + nir_block **first_continue_block) +{ + if (term->continue_from_then) { + *first_continue_block = nir_if_first_then_block(term->nif); + *first_break_block = nir_if_first_else_block(term->nif); + } else { + *first_continue_block = nir_if_first_else_block(term->nif); + *first_break_block = nir_if_first_then_block(term->nif); + } +} + +/** + * Unroll a loop where we know exactly how many iterations there are and there + * is only a single exit point. Note here we can unroll loops with multiple + * theoretical exits that only have a single terminating exit that we always + * know is the "real" exit. + * + * loop { + * ...instrs... + * } + * + * And the iteration count is 3, the output will be: + * + * ...instrs... ...instrs... ...instrs... + */ +static void +simple_unroll(nir_loop *loop) +{ + nir_loop_terminator *limiting_term = loop->info->limiting_terminator; + assert(nir_is_trivial_loop_if(limiting_term->nif, + limiting_term->break_block)); + + loop_prepare_for_unroll(loop); + + /* Skip over loop terminator and get the loop body. */ + list_for_each_entry(nir_loop_terminator, terminator, + &loop->info->loop_terminator_list, + loop_terminator_link) { + + /* Remove all but the limiting terminator as we know the other exit + * conditions can never be met. Note we need to extract any instructions + * in the continue from branch and insert then into the loop body before + * removing it. + */ + if (terminator->nif != limiting_term->nif) { + nir_block *first_break_block; + nir_block *first_continue_block; + get_first_blocks_in_terminator(terminator, &first_break_block, + &first_continue_block); + + assert(nir_is_trivial_loop_if(terminator->nif, + terminator->break_block)); + + nir_cf_list continue_from_lst; + nir_cf_extract(&continue_from_lst, + nir_before_block(first_continue_block), + nir_after_block(terminator->continue_from_block)); + nir_cf_reinsert(&continue_from_lst, + nir_after_cf_node(&terminator->nif->cf_node)); + + nir_cf_node_remove(&terminator->nif->cf_node); + } + } + + nir_block *first_break_block; + nir_block *first_continue_block; + get_first_blocks_in_terminator(limiting_term, &first_break_block, + &first_continue_block); + + /* Pluck out the loop header */ + nir_block *header_blk = nir_loop_first_block(loop); + nir_cf_list lp_header; + nir_cf_extract(&lp_header, nir_before_block(header_blk), + nir_before_cf_node(&limiting_term->nif->cf_node)); + + /* Add the continue from block of the limiting terminator to the loop body + */ + nir_cf_list continue_from_lst; + nir_cf_extract(&continue_from_lst, nir_before_block(first_continue_block), + nir_after_block(limiting_term->continue_from_block)); + nir_cf_reinsert(&continue_from_lst, + nir_after_cf_node(&limiting_term->nif->cf_node)); + + /* Pluck out the loop body */ + nir_cf_list loop_body; + nir_cf_extract(&loop_body, nir_after_cf_node(&limiting_term->nif->cf_node), + nir_after_block(nir_loop_last_block(loop))); + + struct hash_table *remap_table = + _mesa_hash_table_create(NULL, _mesa_hash_pointer, + _mesa_key_pointer_equal); + + /* Clone the loop header */ + nir_cf_list cloned_header; + nir_cf_list_clone(&cloned_header, &lp_header, loop->cf_node.parent, + remap_table); + + /* Insert cloned loop header before the loop */ + nir_cf_reinsert(&cloned_header, nir_before_cf_node(&loop->cf_node)); + + /* Temp list to store the cloned loop body as we unroll */ + nir_cf_list unrolled_lp_body; + + /* Clone loop header and append to the loop body */ + for (unsigned i = 0; i < loop->info->trip_count; i++) { + /* Clone loop body */ + nir_cf_list_clone(&unrolled_lp_body, &loop_body, loop->cf_node.parent, + remap_table); + + /* Insert unrolled loop body before the loop */ + nir_cf_reinsert(&unrolled_lp_body, nir_before_cf_node(&loop->cf_node)); + + /* Clone loop header */ + nir_cf_list_clone(&cloned_header, &lp_header, loop->cf_node.parent, + remap_table); + + /* Insert loop header after loop body */ + nir_cf_reinsert(&cloned_header, nir_before_cf_node(&loop->cf_node)); + } + + /* Remove the break from the loop terminator and add instructions from + * the break block after the unrolled loop. + */ + nir_instr *break_instr = nir_block_last_instr(limiting_term->break_block); + nir_instr_remove(break_instr); + nir_cf_list break_list; + nir_cf_extract(&break_list, nir_before_block(first_break_block), + nir_after_block(limiting_term->break_block)); + + /* Clone so things get properly remapped */ + nir_cf_list cloned_break_list; + nir_cf_list_clone(&cloned_break_list, &break_list, loop->cf_node.parent, + remap_table); + + nir_cf_reinsert(&cloned_break_list, nir_before_cf_node(&loop->cf_node)); + + /* Remove the loop */ + nir_cf_node_remove(&loop->cf_node); + + /* Delete the original loop body, break block & header */ + nir_cf_delete(&lp_header); + nir_cf_delete(&loop_body); + nir_cf_delete(&break_list); + + _mesa_hash_table_destroy(remap_table, NULL); +} + +static void +move_cf_list_into_loop_term(nir_cf_list *lst, nir_loop_terminator *term) +{ + /* Move the rest of the loop inside the continue-from-block */ + nir_cf_reinsert(lst, nir_after_block(term->continue_from_block)); + + /* Remove the break */ + nir_instr_remove(nir_block_last_instr(term->break_block)); +} + +static nir_cursor +get_complex_unroll_insert_location(nir_cf_node *node, bool continue_from_then) +{ + if (node->type == nir_cf_node_loop) { + return nir_before_cf_node(node); + } else { + nir_if *if_stmt = nir_cf_node_as_if(node); + if (continue_from_then) { + return nir_after_block(nir_if_last_then_block(if_stmt)); + } else { + return nir_after_block(nir_if_last_else_block(if_stmt)); + } + } +} + +/** + * Unroll a loop with two exists when the trip count of one of the exits is + * unknown. If continue_from_then is true, the loop is repeated only when the + * "then" branch of the if is taken; otherwise it is repeated only + * when the "else" branch of the if is taken. + * + * For example, if the input is: + * + * loop { + * ...phis/condition... + * if condition { + * ...then instructions... + * } else { + * ...continue instructions... + * break + * } + * ...body... + * } + * + * And the iteration count is 3, and unlimit_term->continue_from_then is true, + * then the output will be: + * + * ...condition... + * if condition { + * ...then instructions... + * ...body... + * if condition { + * ...then instructions... + * ...body... + * if condition { + * ...then instructions... + * ...body... + * } else { + * ...continue instructions... + * } + * } else { + * ...continue instructions... + * } + * } else { + * ...continue instructions... + * } + */ +static void +complex_unroll(nir_loop *loop, nir_loop_terminator *unlimit_term, + bool limiting_term_second) +{ + assert(nir_is_trivial_loop_if(unlimit_term->nif, + unlimit_term->break_block)); + + nir_loop_terminator *limiting_term = loop->info->limiting_terminator; + assert(nir_is_trivial_loop_if(limiting_term->nif, + limiting_term->break_block)); + + loop_prepare_for_unroll(loop); + + nir_block *header_blk = nir_loop_first_block(loop); + + nir_cf_list lp_header; + nir_cf_list limit_break_list; + unsigned num_times_to_clone; + if (limiting_term_second) { + /* Pluck out the loop header */ + nir_cf_extract(&lp_header, nir_before_block(header_blk), + nir_before_cf_node(&unlimit_term->nif->cf_node)); + + /* We need some special handling when its the second terminator causing + * us to exit the loop for example: + * + * for (int i = 0; i < uniform_lp_count; i++) { + * colour = vec4(0.0, 1.0, 0.0, 1.0); + * + * if (i == 1) { + * break; + * } + * ... any further code is unreachable after i == 1 ... + * } + */ + nir_cf_list after_lt; + nir_if *limit_if = limiting_term->nif; + nir_cf_extract(&after_lt, nir_after_cf_node(&limit_if->cf_node), + nir_after_block(nir_loop_last_block(loop))); + move_cf_list_into_loop_term(&after_lt, limiting_term); + + /* Because the trip count is the number of times we pass over the entire + * loop before hitting a break when the second terminator is the + * limiting terminator we can actually execute code inside the loop when + * trip count == 0 e.g. the code above the break. So we need to bump + * the trip_count in order for the code below to clone anything. When + * trip count == 1 we execute the code above the break twice and the + * code below it once so we need clone things twice and so on. + */ + num_times_to_clone = loop->info->trip_count + 1; + } else { + /* Pluck out the loop header */ + nir_cf_extract(&lp_header, nir_before_block(header_blk), + nir_before_cf_node(&limiting_term->nif->cf_node)); + + nir_block *first_break_block; + nir_block *first_continue_block; + get_first_blocks_in_terminator(limiting_term, &first_break_block, + &first_continue_block); + + /* Remove the break then extract instructions from the break block so we + * can insert them in the innermost else of the unrolled loop. + */ + nir_instr *break_instr = nir_block_last_instr(limiting_term->break_block); + nir_instr_remove(break_instr); + nir_cf_extract(&limit_break_list, nir_before_block(first_break_block), + nir_after_block(limiting_term->break_block)); + + nir_cf_list continue_list; + nir_cf_extract(&continue_list, nir_before_block(first_continue_block), + nir_after_block(limiting_term->continue_from_block)); + + nir_cf_reinsert(&continue_list, + nir_after_cf_node(&limiting_term->nif->cf_node)); + + nir_cf_node_remove(&limiting_term->nif->cf_node); + + num_times_to_clone = loop->info->trip_count; + } + + /* In the terminator that we have no trip count for move everything after + * the terminator into the continue from branch. + */ + nir_cf_list loop_end; + nir_cf_extract(&loop_end, nir_after_cf_node(&unlimit_term->nif->cf_node), + nir_after_block(nir_loop_last_block(loop))); + move_cf_list_into_loop_term(&loop_end, unlimit_term); + + /* Pluck out the loop body. */ + nir_cf_list loop_body; + nir_cf_extract(&loop_body, nir_before_block(nir_loop_first_block(loop)), + nir_after_block(nir_loop_last_block(loop))); + + struct hash_table *remap_table = + _mesa_hash_table_create(NULL, _mesa_hash_pointer, + _mesa_key_pointer_equal); + + /* Set unroll_loc to the loop as we will insert the unrolled loop before it + */ + nir_cf_node *unroll_loc = &loop->cf_node; + + /* Temp lists to store the cloned loop as we unroll */ + nir_cf_list unrolled_lp_body; + nir_cf_list cloned_header; + + for (unsigned i = 0; i < num_times_to_clone; i++) { + /* Clone loop header */ + nir_cf_list_clone(&cloned_header, &lp_header, loop->cf_node.parent, + remap_table); + + nir_cursor cursor = + get_complex_unroll_insert_location(unroll_loc, + unlimit_term->continue_from_then); + + /* Insert cloned loop header */ + nir_cf_reinsert(&cloned_header, cursor); + + cursor = + get_complex_unroll_insert_location(unroll_loc, + unlimit_term->continue_from_then); + + /* Clone loop body */ + nir_cf_list_clone(&unrolled_lp_body, &loop_body, loop->cf_node.parent, + remap_table); + + unroll_loc = exec_node_data(nir_cf_node, + exec_list_get_tail(&unrolled_lp_body.list), + node); + assert(unroll_loc->type == nir_cf_node_block && + exec_list_is_empty(&nir_cf_node_as_block(unroll_loc)->instr_list)); + + /* Get the unrolled if node */ + unroll_loc = nir_cf_node_prev(unroll_loc); + + /* Insert unrolled loop body */ + nir_cf_reinsert(&unrolled_lp_body, cursor); + } + + if (!limiting_term_second) { + assert(unroll_loc->type == nir_cf_node_if); + + nir_cf_list_clone(&cloned_header, &lp_header, loop->cf_node.parent, + remap_table); + + nir_cursor cursor = + get_complex_unroll_insert_location(unroll_loc, + unlimit_term->continue_from_then); + + /* Insert cloned loop header */ + nir_cf_reinsert(&cloned_header, cursor); + + /* Clone so things get properly remapped, and insert break block from + * the limiting terminator. + */ + nir_cf_list cloned_break_blk; + nir_cf_list_clone(&cloned_break_blk, &limit_break_list, + loop->cf_node.parent, remap_table); + + cursor = + get_complex_unroll_insert_location(unroll_loc, + unlimit_term->continue_from_then); + + nir_cf_reinsert(&cloned_break_blk, cursor); + nir_cf_delete(&limit_break_list); + } + + /* The loop has been unrolled so remove it. */ + nir_cf_node_remove(&loop->cf_node); + + /* Delete the original loop header and body */ + nir_cf_delete(&lp_header); + nir_cf_delete(&loop_body); + + _mesa_hash_table_destroy(remap_table, NULL); +} + +static bool +is_loop_small_enough_to_unroll(nir_shader *shader, nir_loop_info *li) +{ + unsigned max_iter = shader->options->max_unroll_iterations; + + if (li->trip_count > max_iter) + return false; + + if (li->force_unroll) + return true; + + bool loop_not_too_large = + li->num_instructions * li->trip_count <= max_iter * 25; + + return loop_not_too_large; +} + +static bool +process_loops(nir_shader *sh, nir_cf_node *cf_node, bool *innermost_loop) +{ + bool progress = false; + nir_loop *loop; + + switch (cf_node->type) { + case nir_cf_node_block: + return progress; + case nir_cf_node_if: { + nir_if *if_stmt = nir_cf_node_as_if(cf_node); + foreach_list_typed_safe(nir_cf_node, nested_node, node, &if_stmt->then_list) + progress |= process_loops(sh, nested_node, innermost_loop); + foreach_list_typed_safe(nir_cf_node, nested_node, node, &if_stmt->else_list) + progress |= process_loops(sh, nested_node, innermost_loop); + return progress; + } + case nir_cf_node_loop: { + loop = nir_cf_node_as_loop(cf_node); + foreach_list_typed_safe(nir_cf_node, nested_node, node, &loop->body) + progress |= process_loops(sh, nested_node, innermost_loop); + break; + } + default: + unreachable("unknown cf node type"); + } + + if (*innermost_loop) { + /* Don't attempt to unroll outer loops or a second inner loop in + * this pass wait until the next pass as we have altered the cf. + */ + *innermost_loop = false; + + if (loop->info->limiting_terminator == NULL) + return progress; + + if (!is_loop_small_enough_to_unroll(sh, loop->info)) + return progress; + + if (loop->info->is_trip_count_known) { + simple_unroll(loop); + progress = true; + } else { + /* Attempt to unroll loops with two terminators. */ + unsigned num_lt = list_length(&loop->info->loop_terminator_list); + if (num_lt == 2) { + bool limiting_term_second = true; + nir_loop_terminator *terminator = + list_last_entry(&loop->info->loop_terminator_list, + nir_loop_terminator, loop_terminator_link); + + + if (terminator->nif == loop->info->limiting_terminator->nif) { + limiting_term_second = false; + terminator = + list_first_entry(&loop->info->loop_terminator_list, + nir_loop_terminator, loop_terminator_link); + } + + /* If the first terminator has a trip count of zero and is the + * limiting terminator just do a simple unroll as the second + * terminator can never be reached. + */ + if (loop->info->trip_count == 0 && !limiting_term_second) { + simple_unroll(loop); + } else { + complex_unroll(loop, terminator, limiting_term_second); + } + progress = true; + } + } + } + + return progress; +} + +static bool +nir_opt_loop_unroll_impl(nir_function_impl *impl, + nir_variable_mode indirect_mask) +{ + bool progress = false; + nir_metadata_require(impl, nir_metadata_loop_analysis, indirect_mask); + nir_metadata_require(impl, nir_metadata_block_index); + + foreach_list_typed_safe(nir_cf_node, node, node, &impl->body) { + bool innermost_loop = true; + progress |= process_loops(impl->function->shader, node, + &innermost_loop); + } + + if (progress) + nir_lower_regs_to_ssa_impl(impl); + + return progress; +} + +bool +nir_opt_loop_unroll(nir_shader *shader, nir_variable_mode indirect_mask) +{ + bool progress = false; + + nir_foreach_function(function, shader) { + if (function->impl) { + progress |= nir_opt_loop_unroll_impl(function->impl, indirect_mask); + } + } + return progress; +} diff -Nru mesa-12.0.6/src/compiler/nir/nir_opt_move_comparisons.c mesa-17.0.7/src/compiler/nir/nir_opt_move_comparisons.c --- mesa-12.0.6/src/compiler/nir/nir_opt_move_comparisons.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_opt_move_comparisons.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,185 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "nir.h" + +/** + * \file nir_opt_move_comparisons.c + * + * This pass moves ALU comparison operations just before their first use. + * + * It only moves instructions within a single basic block; cross-block + * movement is left to global code motion. + * + * Many GPUs generate condition codes for comparisons, and use predication + * for conditional selects and control flow. In a sequence such as: + * + * vec1 32 ssa_1 = flt a b + * + * vec1 32 ssa_2 = bcsel ssa_1 c d + * + * the backend would likely do the comparison, producing condition codes, + * then save those to a boolean value. The intervening operations might + * trash the condition codes. Then, in order to do the bcsel, it would + * need to re-populate the condition code register based on the boolean. + * + * By moving the comparison just before the bcsel, the condition codes could + * be used directly. This eliminates the need to reload them from the boolean + * (generally eliminating an instruction). It may also eliminate the need to + * create a boolean value altogether (unless it's used elsewhere), which could + * lower register pressure. + */ + +static bool +is_comparison(nir_op op) +{ + switch (op) { + case nir_op_flt: + case nir_op_fge: + case nir_op_feq: + case nir_op_fne: + case nir_op_ilt: + case nir_op_ult: + case nir_op_ige: + case nir_op_uge: + case nir_op_ieq: + case nir_op_ine: + case nir_op_i2b: + case nir_op_f2b: + case nir_op_inot: + case nir_op_fnot: + return true; + default: + return false; + } +} + +static bool +move_comparison_source(nir_src *src, nir_block *block, nir_instr *before) +{ + if (!src->is_ssa) + return false; + + nir_instr *src_instr = src->ssa->parent_instr; + + if (src_instr->block == block && + src_instr->type == nir_instr_type_alu && + is_comparison(nir_instr_as_alu(src_instr)->op)) { + + exec_node_remove(&src_instr->node); + + if (before) + exec_node_insert_node_before(&before->node, &src_instr->node); + else + exec_list_push_tail(&block->instr_list, &src_instr->node); + + return true; + } + + return false; +} + +static bool +move_comparison_source_cb(nir_src *src, void *data) +{ + bool *progress = data; + + nir_instr *instr = src->parent_instr; + if (move_comparison_source(src, instr->block, instr)) + *progress = true; + + return true; /* nir_foreach_src should keep going */ +} + +static bool +move_comparisons(nir_block *block) +{ + bool progress = false; + + /* We use a simple approach: walk instructions backwards. + * + * If the instruction's source is a comparison from the same block, + * simply move it here. This may break SSA if it's used earlier in + * the block as well. However, as we walk backwards, we'll find the + * earlier use and move it again, further up. It eventually ends up + * dominating all uses again, restoring SSA form. + * + * Before walking instructions, we consider the if-condition at the + * end of the block, if one exists. It's effectively a use at the + * bottom of the block. + */ + nir_if *iff = nir_block_get_following_if(block); + if (iff) { + progress |= move_comparison_source(&iff->condition, block, NULL); + } + + nir_foreach_instr_reverse(instr, block) { + /* The sources of phi instructions happen after the predecessor block + * but before this block. (Yes, that's between blocks). This means + * that we don't need to move them in order for them to be correct. + * We could move them to encourage comparisons that are used in a phi to + * the end of the block, doing so correctly would make the pass + * substantially more complicated and wouldn't gain us anything since + * the phi can't use a flag value anyway. + */ + if (instr->type == nir_instr_type_phi) { + /* We're going backwards so everything else is a phi too */ + break; + } else if (instr->type == nir_instr_type_alu) { + /* Walk ALU instruction sources backwards so that bcsel's boolean + * condition is processed last. + */ + nir_alu_instr *alu = nir_instr_as_alu(instr); + for (int i = nir_op_infos[alu->op].num_inputs - 1; i >= 0; i--) { + progress |= move_comparison_source(&alu->src[i].src, + block, instr); + } + } else { + nir_foreach_src(instr, move_comparison_source_cb, &progress); + } + } + + return progress; +} + +bool +nir_opt_move_comparisons(nir_shader *shader) +{ + bool progress = false; + + nir_foreach_function(func, shader) { + if (!func->impl) + continue; + + nir_foreach_block(block, func->impl) { + if (move_comparisons(block)) { + nir_metadata_preserve(func->impl, nir_metadata_block_index | + nir_metadata_dominance | + nir_metadata_live_ssa_defs); + progress = true; + } + } + } + + return progress; +} diff -Nru mesa-12.0.6/src/compiler/nir/nir_opt_peephole_select.c mesa-17.0.7/src/compiler/nir/nir_opt_peephole_select.c --- mesa-12.0.6/src/compiler/nir/nir_opt_peephole_select.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_opt_peephole_select.c 2017-06-01 10:37:10.000000000 +0000 @@ -32,23 +32,33 @@ * Implements a small peephole optimization that looks for * * if (cond) { - * + * * } else { - * + * * } * phi * ... * phi * - * and replaces it with a series of selects. It can also handle the case - * where, instead of being empty, the if may contain some move operations - * whose only use is one of the following phi nodes. This happens all the - * time when the SSA form comes from a conditional assignment with a - * swizzle. + * and replaces it with: + * + * + * + * bcsel + * ... + * bcsel + * + * where the SSA defs are ALU operations or other cheap instructions (not + * texturing, for example). + * + * If the number of ALU operations in the branches is greater than the limit + * parameter, then the optimization is skipped. In limit=0 mode, the SSA defs + * must only be MOVs which we expect to get copy-propagated away once they're + * out of the inner blocks. */ static bool -block_check_for_allowed_instrs(nir_block *block) +block_check_for_allowed_instrs(nir_block *block, unsigned *count, bool alu_ok) { nir_foreach_instr(instr, block) { switch (instr->type) { @@ -67,6 +77,11 @@ } break; + case nir_intrinsic_load_uniform: + if (!alu_ok) + return false; + break; + default: return false; } @@ -89,29 +104,36 @@ case nir_op_vec2: case nir_op_vec3: case nir_op_vec4: - /* It must be a move-like operation. */ break; default: - return false; + if (!alu_ok) { + /* It must be a move-like operation. */ + return false; + } + break; } - /* Can't handle saturate */ - if (mov->dest.saturate) - return false; - /* It must be SSA */ if (!mov->dest.dest.is_ssa) return false; - /* It cannot have any if-uses */ - if (!list_empty(&mov->dest.dest.ssa.if_uses)) - return false; + if (alu_ok) { + (*count)++; + } else { + /* Can't handle saturate */ + if (mov->dest.saturate) + return false; - /* The only uses of this definition must be phi's in the successor */ - nir_foreach_use(use, &mov->dest.dest.ssa) { - if (use->parent_instr->type != nir_instr_type_phi || - use->parent_instr->block != block->successors[0]) + /* It cannot have any if-uses */ + if (!list_empty(&mov->dest.dest.ssa.if_uses)) return false; + + /* The only uses of this definition must be phi's in the successor */ + nir_foreach_use(use, &mov->dest.dest.ssa) { + if (use->parent_instr->type != nir_instr_type_phi || + use->parent_instr->block != block->successors[0]) + return false; + } } break; } @@ -125,15 +147,9 @@ } static bool -nir_opt_peephole_select_block(nir_block *block, void *mem_ctx) +nir_opt_peephole_select_block(nir_block *block, nir_shader *shader, + unsigned limit) { - /* If the block is empty, then it certainly doesn't have any phi nodes, - * so we can skip it. This also ensures that we do an early skip on the - * end block of the function which isn't actually attached to the CFG. - */ - if (exec_list_is_empty(&block->instr_list)) - return false; - if (nir_cf_node_is_first(&block->cf_node)) return false; @@ -142,20 +158,21 @@ return false; nir_if *if_stmt = nir_cf_node_as_if(prev_node); - nir_cf_node *then_node = nir_if_first_then_node(if_stmt); - nir_cf_node *else_node = nir_if_first_else_node(if_stmt); + nir_block *then_block = nir_if_first_then_block(if_stmt); + nir_block *else_block = nir_if_first_else_block(if_stmt); /* We can only have one block in each side ... */ - if (nir_if_last_then_node(if_stmt) != then_node || - nir_if_last_else_node(if_stmt) != else_node) + if (nir_if_last_then_block(if_stmt) != then_block || + nir_if_last_else_block(if_stmt) != else_block) return false; - nir_block *then_block = nir_cf_node_as_block(then_node); - nir_block *else_block = nir_cf_node_as_block(else_node); - /* ... and those blocks must only contain "allowed" instructions. */ - if (!block_check_for_allowed_instrs(then_block) || - !block_check_for_allowed_instrs(else_block)) + unsigned count = 0; + if (!block_check_for_allowed_instrs(then_block, &count, limit != 0) || + !block_check_for_allowed_instrs(else_block, &count, limit != 0)) + return false; + + if (count > limit) return false; /* At this point, we know that the previous CFG node is an if-then @@ -165,7 +182,6 @@ */ nir_block *prev_block = nir_cf_node_as_block(nir_cf_node_prev(prev_node)); - assert(prev_block->cf_node.type == nir_cf_node_block); /* First, we move the remaining instructions from the blocks to the * block before. We have already guaranteed that this is safe by @@ -188,7 +204,7 @@ break; nir_phi_instr *phi = nir_instr_as_phi(instr); - nir_alu_instr *sel = nir_alu_instr_create(mem_ctx, nir_op_bcsel); + nir_alu_instr *sel = nir_alu_instr_create(shader, nir_op_bcsel); nir_src_copy(&sel->src[0].src, &if_stmt->condition, sel); /* Splat the condition to all channels */ memset(sel->src[0].swizzle, 0, sizeof sel->src[0].swizzle); @@ -219,13 +235,13 @@ } static bool -nir_opt_peephole_select_impl(nir_function_impl *impl) +nir_opt_peephole_select_impl(nir_function_impl *impl, unsigned limit) { - void *mem_ctx = ralloc_parent(impl); + nir_shader *shader = impl->function->shader; bool progress = false; nir_foreach_block_safe(block, impl) { - progress |= nir_opt_peephole_select_block(block, mem_ctx); + progress |= nir_opt_peephole_select_block(block, shader, limit); } if (progress) @@ -235,13 +251,13 @@ } bool -nir_opt_peephole_select(nir_shader *shader) +nir_opt_peephole_select(nir_shader *shader, unsigned limit) { bool progress = false; nir_foreach_function(function, shader) { if (function->impl) - progress |= nir_opt_peephole_select_impl(function->impl); + progress |= nir_opt_peephole_select_impl(function->impl, limit); } return progress; diff -Nru mesa-12.0.6/src/compiler/nir/nir_opt_remove_phis.c mesa-17.0.7/src/compiler/nir/nir_opt_remove_phis.c --- mesa-12.0.6/src/compiler/nir/nir_opt_remove_phis.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_opt_remove_phis.c 2017-06-01 10:37:10.000000000 +0000 @@ -26,6 +26,27 @@ */ #include "nir.h" +#include "nir_builder.h" + +static nir_alu_instr * +get_parent_mov(nir_ssa_def *ssa) +{ + if (ssa->parent_instr->type != nir_instr_type_alu) + return NULL; + + nir_alu_instr *alu = nir_instr_as_alu(ssa->parent_instr); + return (alu->op == nir_op_imov || alu->op == nir_op_fmov) ? alu : NULL; +} + +static bool +matching_mov(nir_alu_instr *mov1, nir_ssa_def *ssa) +{ + if (!mov1) + return false; + + nir_alu_instr *mov2 = get_parent_mov(ssa); + return mov2 && nir_alu_srcs_equal(mov1, mov2, 0, 0); +} /* * This is a pass for removing phi nodes that look like: @@ -43,7 +64,7 @@ */ static bool -remove_phis_block(nir_block *block) +remove_phis_block(nir_block *block, nir_builder *b) { bool progress = false; @@ -54,6 +75,7 @@ nir_phi_instr *phi = nir_instr_as_phi(instr); nir_ssa_def *def = NULL; + nir_alu_instr *mov = NULL; bool srcs_same = true; nir_foreach_phi_src(src, phi) { @@ -75,8 +97,9 @@ if (def == NULL) { def = src->src.ssa; + mov = get_parent_mov(def); } else { - if (src->src.ssa != def) { + if (src->src.ssa != def && !matching_mov(mov, src->src.ssa)) { srcs_same = false; break; } @@ -91,6 +114,21 @@ */ assert(def != NULL); + if (mov) { + /* If the sources were all mov's from the same source with the same + * swizzle, then we can't just pick a random move because it may not + * dominate the phi node. Instead, we need to emit our own move after + * the phi which uses the shared source, and rewrite uses of the phi + * to use the move instead. This is ok, because while the mov's may + * not all dominate the phi node, their shared source does. + */ + + b->cursor = nir_after_phis(block); + def = mov->op == nir_op_imov ? + nir_imov_alu(b, mov->src[0], def->num_components) : + nir_fmov_alu(b, mov->src[0], def->num_components); + } + assert(phi->dest.is_ssa); nir_ssa_def_rewrite_uses(&phi->dest.ssa, nir_src_for_ssa(def)); nir_instr_remove(instr); @@ -105,9 +143,11 @@ remove_phis_impl(nir_function_impl *impl) { bool progress = false; + nir_builder bld; + nir_builder_init(&bld, impl); nir_foreach_block(block, impl) { - progress |= remove_phis_block(block); + progress |= remove_phis_block(block, &bld); } if (progress) { diff -Nru mesa-12.0.6/src/compiler/nir/nir_opt_trivial_continues.c mesa-17.0.7/src/compiler/nir/nir_opt_trivial_continues.c --- mesa-12.0.6/src/compiler/nir/nir_opt_trivial_continues.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_opt_trivial_continues.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,137 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "nir.h" + +static bool +instr_is_continue(nir_instr *instr) +{ + if (instr->type != nir_instr_type_jump) + return false; + + return nir_instr_as_jump(instr)->type == nir_jump_continue; +} + +static bool +lower_trivial_continues_block(nir_block *block, nir_loop *loop) +{ + bool progress = false; + nir_instr *first_instr = nir_block_first_instr(block); + if (!first_instr || instr_is_continue(first_instr)) { + /* The block contains only a continue if anything */ + nir_cf_node *prev_node = nir_cf_node_prev(&block->cf_node); + if (prev_node && prev_node->type == nir_cf_node_if) { + nir_if *prev_if = nir_cf_node_as_if(prev_node); + progress |= lower_trivial_continues_block( + nir_if_last_then_block(prev_if), loop); + progress |= lower_trivial_continues_block( + nir_if_last_else_block(prev_if), loop); + } + + /* The lower_phis_to_regs helper is smart enough to push phi sources as + * far up if-ladders as it possibly can. In other words, the recursive + * calls above shouldn't be adding instructions to this block since it + * follows an if statement. + */ + first_instr = nir_block_first_instr(block); + assert(!first_instr || instr_is_continue(first_instr)); + } + + nir_instr *last_instr = nir_block_last_instr(block); + if (!last_instr || !instr_is_continue(last_instr)) + return progress; + + /* We're at the end of a block that goes straight through to the end of the + * loop and continues to the top. We can exit normally instead of jump. + */ + nir_lower_phis_to_regs_block(nir_loop_first_block(loop)); + nir_instr_remove(last_instr); + return true; +} + +static bool +lower_trivial_continues_list(struct exec_list *cf_list, + bool list_ends_at_loop_tail, + nir_loop *loop) +{ + bool progress = false; + foreach_list_typed(nir_cf_node, cf_node, node, cf_list) { + bool at_loop_tail = list_ends_at_loop_tail && + &cf_node->node == exec_list_get_tail(cf_list); + switch (cf_node->type) { + case nir_cf_node_block: + break; + + case nir_cf_node_if: { + nir_if *nif = nir_cf_node_as_if(cf_node); + if (lower_trivial_continues_list(&nif->then_list, at_loop_tail, loop)) + progress = true; + if (lower_trivial_continues_list(&nif->else_list, at_loop_tail, loop)) + progress = true; + break; + } + + case nir_cf_node_loop: { + nir_loop *loop = nir_cf_node_as_loop(cf_node); + if (lower_trivial_continues_list(&loop->body, true, loop)) + progress = true; + if (lower_trivial_continues_block(nir_loop_last_block(loop), loop)) + progress = true; + break; + } + + case nir_cf_node_function: + unreachable("Invalid cf type"); + } + } + + return progress; +} + +/** + * This simple pass gets rid of any "trivial" continues, i.e. those that are + * at the tail of a loop where we can just delete the continue instruction and + * control-flow will naturally and harmlessly take us back to the top of the + * loop. + */ +bool +nir_opt_trivial_continues(nir_shader *shader) +{ + bool progress = false; + + nir_foreach_function(function, shader) { + if (function->impl == NULL) + continue; + + /* First we run the simple pass to get rid of pesky continues */ + if (lower_trivial_continues_list(&function->impl->body, false, NULL)) { + nir_metadata_preserve(function->impl, nir_metadata_none); + + /* If that made progress, we're no longer really in SSA form. */ + nir_lower_regs_to_ssa_impl(function->impl); + progress = true; + } + } + + return progress; +} diff -Nru mesa-12.0.6/src/compiler/nir/nir_opt_undef.c mesa-17.0.7/src/compiler/nir/nir_opt_undef.c --- mesa-12.0.6/src/compiler/nir/nir_opt_undef.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_opt_undef.c 2017-06-01 10:37:10.000000000 +0000 @@ -79,22 +79,22 @@ { if (alu->op != nir_op_vec2 && alu->op != nir_op_vec3 && - alu->op != nir_op_vec4) + alu->op != nir_op_vec4 && + alu->op != nir_op_fmov && + alu->op != nir_op_imov) return false; assert(alu->dest.dest.is_ssa); - unsigned num_components = nir_op_infos[alu->op].num_inputs; - - for (unsigned i = 0; i < num_components; i++) { + for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) { if (!alu->src[i].src.is_ssa || alu->src[i].src.ssa->parent_instr->type != nir_instr_type_ssa_undef) return false; } b->cursor = nir_before_instr(&alu->instr); - nir_ssa_def *undef = - nir_ssa_undef(b, num_components, nir_dest_bit_size(alu->dest.dest)); + nir_ssa_def *undef = nir_ssa_undef(b, alu->dest.dest.ssa.num_components, + nir_dest_bit_size(alu->dest.dest)); nir_ssa_def_rewrite_uses(&alu->dest.dest.ssa, nir_src_for_ssa(undef)); return true; diff -Nru mesa-12.0.6/src/compiler/nir/nir_phi_builder.c mesa-17.0.7/src/compiler/nir/nir_phi_builder.c --- mesa-12.0.6/src/compiler/nir/nir_phi_builder.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_phi_builder.c 2017-06-01 10:37:10.000000000 +0000 @@ -81,7 +81,7 @@ struct nir_phi_builder * nir_phi_builder_create(nir_function_impl *impl) { - struct nir_phi_builder *pb = ralloc(NULL, struct nir_phi_builder); + struct nir_phi_builder *pb = rzalloc(NULL, struct nir_phi_builder); pb->shader = impl->function->shader; pb->impl = impl; @@ -172,31 +172,27 @@ nir_phi_builder_value_get_block_def(struct nir_phi_builder_value *val, nir_block *block) { - /* For each block, we have one of three types of values */ - if (val->defs[block->index] == NULL) { - /* NULL indicates that we have no SSA def for this block. */ - if (block->imm_dom) { - /* Grab it from our immediate dominator. We'll stash it here for - * easy access later. - */ - val->defs[block->index] = - nir_phi_builder_value_get_block_def(val, block->imm_dom); - return val->defs[block->index]; - } else { - /* No immediate dominator means that this block is either the - * start block or unreachable. In either case, the value is - * undefined so we need an SSA undef. - */ - nir_ssa_undef_instr *undef = - nir_ssa_undef_instr_create(val->builder->shader, - val->num_components, - val->bit_size); - nir_instr_insert(nir_before_cf_list(&val->builder->impl->body), - &undef->instr); - val->defs[block->index] = &undef->def; - return &undef->def; - } - } else if (val->defs[block->index] == NEEDS_PHI) { + /* Crawl up the dominance tree and find the closest dominator for which we + * have a valid ssa_def, if any. + */ + nir_block *dom = block; + while (dom && val->defs[dom->index] == NULL) + dom = dom->imm_dom; + + nir_ssa_def *def; + if (dom == NULL) { + /* No dominator means either that we crawled to the top without ever + * finding a definition or that this block is unreachable. In either + * case, the value is undefined so we need an SSA undef. + */ + nir_ssa_undef_instr *undef = + nir_ssa_undef_instr_create(val->builder->shader, + val->num_components, + val->bit_size); + nir_instr_insert(nir_before_cf_list(&val->builder->impl->body), + &undef->instr); + def = &undef->def; + } else if (val->defs[dom->index] == NEEDS_PHI) { /* The magic value NEEDS_PHI indicates that the block needs a phi node * but none has been created. We need to create one now so we can * return it to the caller. @@ -218,17 +214,28 @@ nir_phi_instr *phi = nir_phi_instr_create(val->builder->shader); nir_ssa_dest_init(&phi->instr, &phi->dest, val->num_components, val->bit_size, NULL); - phi->instr.block = block; + phi->instr.block = dom; exec_list_push_tail(&val->phis, &phi->instr.node); - val->defs[block->index] = &phi->dest.ssa; - return &phi->dest.ssa; + def = val->defs[dom->index] = &phi->dest.ssa; } else { /* In this case, we have an actual SSA def. It's either the result of a * phi node created by the case above or one passed to us through * nir_phi_builder_value_set_block_def(). */ - return val->defs[block->index]; + def = val->defs[dom->index]; } + + /* Walk the chain and stash the def in all of the applicable blocks. We do + * this for two reasons: + * + * 1) To speed up lookup next time even if the next time is called from a + * block that is not dominated by this one. + * 2) To avoid unneeded recreation of phi nodes and undefs. + */ + for (dom = block; dom && val->defs[dom->index] == NULL; dom = dom->imm_dom) + val->defs[dom->index] = def; + + return def; } static int diff -Nru mesa-12.0.6/src/compiler/nir/nir_print.c mesa-17.0.7/src/compiler/nir/nir_print.c --- mesa-12.0.6/src/compiler/nir/nir_print.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_print.c 2017-06-01 10:37:10.000000000 +0000 @@ -186,17 +186,25 @@ print_src(&instr->src[src].src, state); bool print_swizzle = false; + unsigned used_channels = 0; + for (unsigned i = 0; i < 4; i++) { if (!nir_alu_instr_channel_used(instr, src, i)) continue; + used_channels++; + if (instr->src[src].swizzle[i] != i) { print_swizzle = true; break; } } - if (print_swizzle) { + unsigned live_channels = instr->src[src].src.is_ssa + ? instr->src[src].src.ssa->num_components + : instr->src[src].src.reg.reg->num_components; + + if (print_swizzle || used_channels != live_channels) { fprintf(fp, "."); for (unsigned i = 0; i < 4; i++) { if (!nir_alu_instr_channel_used(instr, src, i)) @@ -287,30 +295,38 @@ print_constant(nir_constant *c, const struct glsl_type *type, print_state *state) { FILE *fp = state->fp; - unsigned total_elems = glsl_get_components(type); - unsigned i; + const unsigned rows = glsl_get_vector_elements(type); + const unsigned cols = glsl_get_matrix_columns(type); + unsigned i, j; switch (glsl_get_base_type(type)) { case GLSL_TYPE_UINT: case GLSL_TYPE_INT: case GLSL_TYPE_BOOL: - for (i = 0; i < total_elems; i++) { + /* Only float base types can be matrices. */ + assert(cols == 1); + + for (i = 0; i < rows; i++) { if (i > 0) fprintf(fp, ", "); - fprintf(fp, "0x%08x", c->value.u[i]); + fprintf(fp, "0x%08x", c->values[0].u32[i]); } break; case GLSL_TYPE_FLOAT: - for (i = 0; i < total_elems; i++) { - if (i > 0) fprintf(fp, ", "); - fprintf(fp, "%f", c->value.f[i]); + for (i = 0; i < cols; i++) { + for (j = 0; j < rows; j++) { + if (i + j > 0) fprintf(fp, ", "); + fprintf(fp, "%f", c->values[i].f32[j]); + } } break; case GLSL_TYPE_DOUBLE: - for (i = 0; i < total_elems; i++) { - if (i > 0) fprintf(fp, ", "); - fprintf(fp, "%f", c->value.d[i]); + for (i = 0; i < cols; i++) { + for (j = 0; j < rows; j++) { + if (i + j > 0) fprintf(fp, ", "); + fprintf(fp, "%f", c->values[i].f64[j]); + } } break; @@ -374,7 +390,7 @@ const char *const inv = (var->data.invariant) ? "invariant " : ""; fprintf(fp, "%s%s%s%s%s %s ", cent, samp, patch, inv, get_variable_mode_str(var->data.mode), - glsl_interp_qualifier_name(var->data.interpolation)); + glsl_interp_mode_name(var->data.interpolation)); const char *const coher = (var->data.image.coherent) ? "coherent " : ""; const char *const volat = (var->data.image._volatile) ? "volatile " : ""; @@ -383,9 +399,8 @@ const char *const wonly = (var->data.image.write_only) ? "writeonly " : ""; fprintf(fp, "%s%s%s%s%s", coher, volat, restr, ronly, wonly); - glsl_print_type(var->type, fp); - - fprintf(fp, " %s", get_var_name(var, state)); + fprintf(fp, "%s %s", glsl_get_type_name(var->type), + get_var_name(var, state)); if (var->data.mode == nir_var_shader_in || var->data.mode == nir_var_shader_out || @@ -425,7 +440,8 @@ loc = buf; } - fprintf(fp, " (%s, %u)", loc, var->data.driver_location); + fprintf(fp, " (%s, %u, %u)%s", loc, var->data.driver_location, var->data.binding, + var->data.compact ? " compact" : ""); } if (var->constant_initializer) { @@ -449,8 +465,8 @@ print_arg(nir_variable *var, print_state *state) { FILE *fp = state->fp; - glsl_print_type(var->type, fp); - fprintf(fp, " %s", get_var_name(var, state)); + fprintf(fp, "%s %s", glsl_get_type_name(var->type), + get_var_name(var, state)); } static void @@ -570,6 +586,8 @@ [NIR_INTRINSIC_RANGE] = "range", [NIR_INTRINSIC_DESC_SET] = "desc-set", [NIR_INTRINSIC_BINDING] = "binding", + [NIR_INTRINSIC_COMPONENT] = "component", + [NIR_INTRINSIC_INTERP_MODE] = "interp_mode", }; for (unsigned idx = 1; idx < NIR_INTRINSIC_NUM_INDEX_FLAGS; idx++) { if (!info->index_map[idx]) @@ -614,6 +632,8 @@ nir_foreach_variable(var, var_list) { if ((var->data.driver_location == nir_intrinsic_base(instr)) && + (instr->intrinsic == nir_intrinsic_load_uniform || + var->data.location_frac == nir_intrinsic_component(instr)) && var->name) { fprintf(fp, "\t/* %s */", var->name); break; @@ -687,8 +707,8 @@ case nir_tex_src_projector: fprintf(fp, "(projector)"); break; - case nir_tex_src_comparitor: - fprintf(fp, "(comparitor)"); + case nir_tex_src_comparator: + fprintf(fp, "(comparator)"); break; case nir_tex_src_offset: fprintf(fp, "(offset)"); @@ -1085,14 +1105,13 @@ unreachable("Invalid parameter type"); } - glsl_print_type(function->params[i].type, fp); + fprintf(fp, "%s", glsl_get_type_name(function->params[i].type)); } if (function->return_type != NULL) { if (function->num_params != 0) fprintf(fp, ", "); - fprintf(fp, "returning "); - glsl_print_type(function->return_type, fp); + fprintf(fp, "returning %s", glsl_get_type_name(function->return_type)); } fprintf(fp, "\n"); @@ -1133,11 +1152,11 @@ fprintf(fp, "shader: %s\n", gl_shader_stage_name(shader->stage)); - if (shader->info.name) - fprintf(fp, "name: %s\n", shader->info.name); + if (shader->info->name) + fprintf(fp, "name: %s\n", shader->info->name); - if (shader->info.label) - fprintf(fp, "label: %s\n", shader->info.label); + if (shader->info->label) + fprintf(fp, "label: %s\n", shader->info->label); fprintf(fp, "inputs: %u\n", shader->num_inputs); fprintf(fp, "outputs: %u\n", shader->num_outputs); diff -Nru mesa-12.0.6/src/compiler/nir/nir_remove_dead_variables.c mesa-17.0.7/src/compiler/nir/nir_remove_dead_variables.c --- mesa-12.0.6/src/compiler/nir/nir_remove_dead_variables.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_remove_dead_variables.c 2017-06-01 10:37:10.000000000 +0000 @@ -31,9 +31,27 @@ add_var_use_intrinsic(nir_intrinsic_instr *instr, struct set *live) { unsigned num_vars = nir_intrinsic_infos[instr->intrinsic].num_variables; - for (unsigned i = 0; i < num_vars; i++) { - nir_variable *var = instr->variables[i]->var; - _mesa_set_add(live, var); + + switch (instr->intrinsic) { + case nir_intrinsic_copy_var: + _mesa_set_add(live, instr->variables[1]->var); + /* Fall through */ + case nir_intrinsic_store_var: { + /* The first source in both copy_var and store_var is the destination. + * If the variable is a local that never escapes the shader, then we + * don't mark it as live for just a store. + */ + nir_variable_mode mode = instr->variables[0]->var->data.mode; + if (!(mode & (nir_var_local | nir_var_global | nir_var_shared))) + _mesa_set_add(live, instr->variables[0]->var); + break; + } + + default: + for (unsigned i = 0; i < num_vars; i++) { + _mesa_set_add(live, instr->variables[i]->var); + } + break; } } @@ -94,6 +112,31 @@ } } +static void +remove_dead_var_writes(nir_shader *shader, struct set *live) +{ + nir_foreach_function(function, shader) { + if (!function->impl) + continue; + + nir_foreach_block(block, function->impl) { + nir_foreach_instr_safe(instr, block) { + if (instr->type != nir_instr_type_intrinsic) + continue; + + nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr); + if (intrin->intrinsic != nir_intrinsic_copy_var && + intrin->intrinsic != nir_intrinsic_store_var) + continue; + + /* Stores to dead variables need to be removed */ + if (intrin->variables[0]->var->data.mode == 0) + nir_instr_remove(instr); + } + } + } +} + static bool remove_dead_vars(struct exec_list *var_list, struct set *live) { @@ -102,8 +145,9 @@ foreach_list_typed_safe(nir_variable, var, node, var_list) { struct set_entry *entry = _mesa_set_search(live, var); if (entry == NULL) { + /* Mark this variable as used by setting the mode to 0 */ + var->data.mode = 0; exec_node_remove(&var->node); - ralloc_free(var); progress = true; } } @@ -135,15 +179,25 @@ if (modes & nir_var_system_value) progress = remove_dead_vars(&shader->system_values, live) || progress; + if (modes & nir_var_shared) + progress = remove_dead_vars(&shader->shared, live) || progress; + if (modes & nir_var_local) { nir_foreach_function(function, shader) { if (function->impl) { - if (remove_dead_vars(&function->impl->locals, live)) { - nir_metadata_preserve(function->impl, nir_metadata_block_index | - nir_metadata_dominance | - nir_metadata_live_ssa_defs); + if (remove_dead_vars(&function->impl->locals, live)) progress = true; - } + } + } + } + + if (progress) { + remove_dead_var_writes(shader, live); + + nir_foreach_function(function, shader) { + if (function->impl) { + nir_metadata_preserve(function->impl, nir_metadata_block_index | + nir_metadata_dominance); } } } diff -Nru mesa-12.0.6/src/compiler/nir/nir_search.c mesa-17.0.7/src/compiler/nir/nir_search.c --- mesa-12.0.6/src/compiler/nir/nir_search.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_search.c 2017-06-01 10:37:10.000000000 +0000 @@ -42,32 +42,53 @@ static const uint8_t identity_swizzle[] = { 0, 1, 2, 3 }; -static bool alu_instr_is_bool(nir_alu_instr *instr); - +/** + * Check if a source produces a value of the given type. + * + * Used for satisfying 'a@type' constraints. + */ static bool -src_is_bool(nir_src src) +src_is_type(nir_src src, nir_alu_type type) { + assert(type != nir_type_invalid); + if (!src.is_ssa) return false; - if (src.ssa->parent_instr->type != nir_instr_type_alu) - return false; - return alu_instr_is_bool(nir_instr_as_alu(src.ssa->parent_instr)); -} -static bool -alu_instr_is_bool(nir_alu_instr *instr) -{ - switch (instr->op) { - case nir_op_iand: - case nir_op_ior: - case nir_op_ixor: - return src_is_bool(instr->src[0].src) && src_is_bool(instr->src[1].src); - case nir_op_inot: - return src_is_bool(instr->src[0].src); - default: - return (nir_alu_type_get_base_type(nir_op_infos[instr->op].output_type) - == nir_type_bool); + /* Turn nir_type_bool32 into nir_type_bool...they're the same thing. */ + if (nir_alu_type_get_base_type(type) == nir_type_bool) + type = nir_type_bool; + + if (src.ssa->parent_instr->type == nir_instr_type_alu) { + nir_alu_instr *src_alu = nir_instr_as_alu(src.ssa->parent_instr); + nir_alu_type output_type = nir_op_infos[src_alu->op].output_type; + + if (type == nir_type_bool) { + switch (src_alu->op) { + case nir_op_iand: + case nir_op_ior: + case nir_op_ixor: + return src_is_type(src_alu->src[0].src, nir_type_bool) && + src_is_type(src_alu->src[1].src, nir_type_bool); + case nir_op_inot: + return src_is_type(src_alu->src[0].src, nir_type_bool); + default: + break; + } + } + + return nir_alu_type_get_base_type(output_type) == type; + } else if (src.ssa->parent_instr->type == nir_instr_type_intrinsic) { + nir_intrinsic_instr *intr = nir_instr_as_intrinsic(src.ssa->parent_instr); + + if (type == nir_type_bool) { + return intr->intrinsic == nir_intrinsic_load_front_face || + intr->intrinsic == nir_intrinsic_load_helper_invocation; + } } + + /* don't know */ + return false; } static bool @@ -77,6 +98,16 @@ { uint8_t new_swizzle[4]; + /* Searching only works on SSA values because, if it's not SSA, we can't + * know if the value changed between one instance of that value in the + * expression and another. Also, the replace operation will place reads of + * that value right before the last instruction in the expression we're + * replacing so those reads will happen after the original reads and may + * not be valid if they're register reads. + */ + if (!instr->src[src].src.is_ssa) + return false; + /* If the source is an explicitly sized source, then we need to reset * both the number of components and the swizzle. */ @@ -95,9 +126,6 @@ switch (value->type) { case nir_search_value_expression: - if (!instr->src[src].src.is_ssa) - return false; - if (instr->src[src].src.ssa->parent_instr->type != nir_instr_type_alu) return false; @@ -110,8 +138,7 @@ assert(var->variable < NIR_SEARCH_MAX_VARIABLES); if (state->variables_seen & (1 << var->variable)) { - if (!nir_srcs_equal(state->variables[var->variable].src, - instr->src[src].src)) + if (state->variables[var->variable].src.ssa != instr->src[src].src.ssa) return false; assert(!instr->src[src].abs && !instr->src[src].negate); @@ -127,19 +154,12 @@ instr->src[src].src.ssa->parent_instr->type != nir_instr_type_load_const) return false; - if (var->type != nir_type_invalid) { - if (instr->src[src].src.ssa->parent_instr->type != nir_instr_type_alu) - return false; - - nir_alu_instr *src_alu = - nir_instr_as_alu(instr->src[src].src.ssa->parent_instr); + if (var->cond && !var->cond(instr, src, num_components, new_swizzle)) + return false; - if (nir_alu_type_get_base_type(nir_op_infos[src_alu->op].output_type) != - var->type && - !(nir_alu_type_get_base_type(var->type) == nir_type_bool && - alu_instr_is_bool(src_alu))) - return false; - } + if (var->type != nir_type_invalid && + !src_is_type(instr->src[src].src, var->type)) + return false; state->variables_seen |= (1 << var->variable); state->variables[var->variable].src = instr->src[src].src; @@ -190,43 +210,27 @@ return true; case nir_type_int: - for (unsigned i = 0; i < num_components; ++i) { - int64_t val; - switch (load->def.bit_size) { - case 32: - val = load->value.i32[new_swizzle[i]]; - break; - case 64: - val = load->value.i64[new_swizzle[i]]; - break; - default: - unreachable("unknown bit size"); - } - - if (val != const_val->data.i) - return false; - } - return true; - case nir_type_uint: case nir_type_bool32: - for (unsigned i = 0; i < num_components; ++i) { - uint64_t val; - switch (load->def.bit_size) { - case 32: - val = load->value.u32[new_swizzle[i]]; - break; - case 64: - val = load->value.u64[new_swizzle[i]]; - break; - default: - unreachable("unknown bit size"); + switch (load->def.bit_size) { + case 32: + for (unsigned i = 0; i < num_components; ++i) { + if (load->value.u32[new_swizzle[i]] != + (uint32_t)const_val->data.u) + return false; } + return true; - if (val != const_val->data.u) - return false; + case 64: + for (unsigned i = 0; i < num_components; ++i) { + if (load->value.u64[new_swizzle[i]] != const_val->data.u) + return false; + } + return true; + + default: + unreachable("unknown bit size"); } - return true; default: unreachable("Invalid alu source type"); @@ -243,6 +247,9 @@ unsigned num_components, const uint8_t *swizzle, struct match_state *state) { + if (expr->cond && !expr->cond(instr)) + return false; + if (instr->op != expr->opcode) return false; @@ -326,7 +333,7 @@ build_bitsize_tree(void *mem_ctx, struct match_state *state, const nir_search_value *value) { - bitsize_tree *tree = ralloc(mem_ctx, bitsize_tree); + bitsize_tree *tree = rzalloc(mem_ctx, bitsize_tree); switch (value->type) { case nir_search_value_expression: { diff -Nru mesa-12.0.6/src/compiler/nir/nir_search.h mesa-17.0.7/src/compiler/nir/nir_search.h --- mesa-12.0.6/src/compiler/nir/nir_search.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_search.h 2017-06-01 10:37:10.000000000 +0000 @@ -68,6 +68,16 @@ * never match anything. */ nir_alu_type type; + + /** Optional condition fxn ptr + * + * This is only allowed in search expressions, and allows additional + * constraints to be placed on the match. Typically used for 'is_constant' + * variables to require, for example, power-of-two in order for the search + * to match. + */ + bool (*cond)(nir_alu_instr *instr, unsigned src, + unsigned num_components, const uint8_t *swizzle); } nir_search_variable; typedef struct { @@ -93,14 +103,25 @@ nir_op opcode; const nir_search_value *srcs[4]; + + /** Optional condition fxn ptr + * + * This allows additional constraints on expression matching, it is + * typically used to match an expressions uses such as the number of times + * the expression is used, and whether its used by an if. + */ + bool (*cond)(nir_alu_instr *instr); } nir_search_expression; NIR_DEFINE_CAST(nir_search_value_as_variable, nir_search_value, - nir_search_variable, value) + nir_search_variable, value, + type, nir_search_value_variable) NIR_DEFINE_CAST(nir_search_value_as_constant, nir_search_value, - nir_search_constant, value) + nir_search_constant, value, + type, nir_search_value_constant) NIR_DEFINE_CAST(nir_search_value_as_expression, nir_search_value, - nir_search_expression, value) + nir_search_expression, value, + type, nir_search_value_expression) nir_alu_instr * nir_replace_instr(nir_alu_instr *instr, const nir_search_expression *search, diff -Nru mesa-12.0.6/src/compiler/nir/nir_search_helpers.h mesa-17.0.7/src/compiler/nir/nir_search_helpers.h --- mesa-12.0.6/src/compiler/nir/nir_search_helpers.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_search_helpers.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,161 @@ +/* + * Copyright © 2016 Red Hat + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#ifndef _NIR_SEARCH_HELPERS_ +#define _NIR_SEARCH_HELPERS_ + +#include "nir.h" + +static inline bool +__is_power_of_two(unsigned int x) +{ + return ((x != 0) && !(x & (x - 1))); +} + +static inline bool +is_pos_power_of_two(nir_alu_instr *instr, unsigned src, unsigned num_components, + const uint8_t *swizzle) +{ + nir_const_value *val = nir_src_as_const_value(instr->src[src].src); + + /* only constant src's: */ + if (!val) + return false; + + for (unsigned i = 0; i < num_components; i++) { + switch (nir_op_infos[instr->op].input_types[src]) { + case nir_type_int: + if (val->i32[swizzle[i]] < 0) + return false; + if (!__is_power_of_two(val->i32[swizzle[i]])) + return false; + break; + case nir_type_uint: + if (!__is_power_of_two(val->u32[swizzle[i]])) + return false; + break; + default: + return false; + } + } + + return true; +} + +static inline bool +is_neg_power_of_two(nir_alu_instr *instr, unsigned src, unsigned num_components, + const uint8_t *swizzle) +{ + nir_const_value *val = nir_src_as_const_value(instr->src[src].src); + + /* only constant src's: */ + if (!val) + return false; + + for (unsigned i = 0; i < num_components; i++) { + switch (nir_op_infos[instr->op].input_types[src]) { + case nir_type_int: + if (val->i32[swizzle[i]] > 0) + return false; + if (!__is_power_of_two(abs(val->i32[swizzle[i]]))) + return false; + break; + default: + return false; + } + } + + return true; +} + +static inline bool +is_zero_to_one(nir_alu_instr *instr, unsigned src, unsigned num_components, + const uint8_t *swizzle) +{ + nir_const_value *val = nir_src_as_const_value(instr->src[src].src); + + if (!val) + return false; + + for (unsigned i = 0; i < num_components; i++) { + switch (nir_op_infos[instr->op].input_types[src]) { + case nir_type_float: + if (val->f32[swizzle[i]] < 0.0f || val->f32[swizzle[i]] > 1.0f) + return false; + break; + default: + return false; + } + } + + return true; +} + +static inline bool +is_used_more_than_once(nir_alu_instr *instr) +{ + bool zero_if_use = list_empty(&instr->dest.dest.ssa.if_uses); + bool zero_use = list_empty(&instr->dest.dest.ssa.uses); + + if (zero_use && zero_if_use) + return false; + else if (zero_use && list_is_singular(&instr->dest.dest.ssa.if_uses)) + return false; + else if (zero_if_use && list_is_singular(&instr->dest.dest.ssa.uses)) + return false; + + return true; +} + +static inline bool +is_used_once(nir_alu_instr *instr) +{ + bool zero_if_use = list_empty(&instr->dest.dest.ssa.if_uses); + bool zero_use = list_empty(&instr->dest.dest.ssa.uses); + + if (zero_if_use && zero_use) + return false; + + if (!zero_if_use && list_is_singular(&instr->dest.dest.ssa.uses)) + return false; + + if (!zero_use && list_is_singular(&instr->dest.dest.ssa.if_uses)) + return false; + + if (!list_is_singular(&instr->dest.dest.ssa.if_uses) && + !list_is_singular(&instr->dest.dest.ssa.uses)) + return false; + + return true; +} + +static inline bool +is_not_used_by_if(nir_alu_instr *instr) +{ + return list_empty(&instr->dest.dest.ssa.if_uses); +} + +#endif /* _NIR_SEARCH_ */ diff -Nru mesa-12.0.6/src/compiler/nir/nir_split_var_copies.c mesa-17.0.7/src/compiler/nir/nir_split_var_copies.c --- mesa-12.0.6/src/compiler/nir/nir_split_var_copies.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_split_var_copies.c 2017-06-01 10:37:10.000000000 +0000 @@ -62,7 +62,7 @@ */ struct split_var_copies_state { - void *mem_ctx; + nir_shader *shader; void *dead_ctx; bool progress; }; @@ -82,7 +82,7 @@ */ static void split_var_copy_instr(nir_intrinsic_instr *old_copy, - nir_deref *dest_head, nir_deref *src_head, + nir_deref_var *dest_head, nir_deref_var *src_head, nir_deref *dest_tail, nir_deref *src_tail, struct split_var_copies_state *state) { @@ -176,17 +176,14 @@ * actually add the new copy instruction. */ nir_intrinsic_instr *new_copy = - nir_intrinsic_instr_create(state->mem_ctx, nir_intrinsic_copy_var); + nir_intrinsic_instr_create(state->shader, nir_intrinsic_copy_var); /* We need to make copies because a) this deref chain actually * belongs to the copy instruction and b) the deref chains may * have some of the same links due to the way we constructed them */ - nir_deref *src = nir_copy_deref(new_copy, src_head); - nir_deref *dest = nir_copy_deref(new_copy, dest_head); - - new_copy->variables[0] = nir_deref_as_var(dest); - new_copy->variables[1] = nir_deref_as_var(src); + new_copy->variables[0] = nir_deref_var_clone(dest_head, new_copy); + new_copy->variables[1] = nir_deref_var_clone(src_head, new_copy); /* Emit the copy instruction after the old instruction. We'll * remove the old one later. @@ -216,10 +213,10 @@ if (intrinsic->intrinsic != nir_intrinsic_copy_var) continue; - nir_deref *dest_head = &intrinsic->variables[0]->deref; - nir_deref *src_head = &intrinsic->variables[1]->deref; - nir_deref *dest_tail = nir_deref_tail(dest_head); - nir_deref *src_tail = nir_deref_tail(src_head); + nir_deref_var *dest_head = intrinsic->variables[0]; + nir_deref_var *src_head = intrinsic->variables[1]; + nir_deref *dest_tail = nir_deref_tail(&dest_head->deref); + nir_deref *src_tail = nir_deref_tail(&src_head->deref); switch (glsl_get_base_type(src_tail->type)) { case GLSL_TYPE_ARRAY: @@ -231,9 +228,6 @@ break; case GLSL_TYPE_FLOAT: case GLSL_TYPE_DOUBLE: - case GLSL_TYPE_INT: - case GLSL_TYPE_UINT: - case GLSL_TYPE_BOOL: if (glsl_type_is_matrix(src_tail->type)) { split_var_copy_instr(intrinsic, dest_head, src_head, dest_tail, src_tail, state); @@ -241,6 +235,11 @@ ralloc_steal(state->dead_ctx, instr); } break; + case GLSL_TYPE_INT: + case GLSL_TYPE_UINT: + case GLSL_TYPE_BOOL: + assert(!glsl_type_is_matrix(src_tail->type)); + break; default: unreachable("Invalid type"); break; @@ -255,7 +254,7 @@ { struct split_var_copies_state state; - state.mem_ctx = ralloc_parent(impl); + state.shader = impl->function->shader; state.dead_ctx = ralloc_context(NULL); state.progress = false; diff -Nru mesa-12.0.6/src/compiler/nir/nir_sweep.c mesa-17.0.7/src/compiler/nir/nir_sweep.c --- mesa-12.0.6/src/compiler/nir/nir_sweep.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_sweep.c 2017-06-01 10:37:10.000000000 +0000 @@ -150,12 +150,20 @@ { void *rubbish = ralloc_context(NULL); + /* The shader may not own shader_info so check first */ + bool steal_info = false; + if (nir == ralloc_parent(nir->info)) + steal_info = true; + /* First, move ownership of all the memory to a temporary context; assume dead. */ ralloc_adopt(rubbish, nir); - ralloc_steal(nir, (char *)nir->info.name); - if (nir->info.label) - ralloc_steal(nir, (char *)nir->info.label); + if (steal_info) + ralloc_steal(nir, nir->info); + + ralloc_steal(nir, (char *)nir->info->name); + if (nir->info->label) + ralloc_steal(nir, (char *)nir->info->label); /* Variables and registers are not dead. Steal them back. */ steal_list(nir, nir_variable, &nir->uniforms); diff -Nru mesa-12.0.6/src/compiler/nir/nir_to_lcssa.c mesa-17.0.7/src/compiler/nir/nir_to_lcssa.c --- mesa-12.0.6/src/compiler/nir/nir_to_lcssa.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_to_lcssa.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,203 @@ +/* + * Copyright © 2015 Thomas Helland + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +/* + * This pass converts the ssa-graph into "Loop Closed SSA form". This is + * done by placing phi nodes at the exits of the loop for all values + * that are used outside the loop. The result is it transforms: + * + * loop { -> loop { + * ssa2 = .... -> ssa2 = ... + * if (cond) -> if (cond) + * break; -> break; + * ssa3 = ssa2 * ssa4 -> ssa3 = ssa2 * ssa4 + * } -> } + * ssa6 = ssa2 + 4 -> ssa5 = phi(ssa2) + * ssa6 = ssa5 + 4 + */ + +#include "nir.h" + +typedef struct { + /* The nir_shader we are transforming */ + nir_shader *shader; + + /* The loop we store information for */ + nir_loop *loop; + +} lcssa_state; + +static bool +is_if_use_inside_loop(nir_src *use, nir_loop* loop) +{ + nir_block *block_before_loop = + nir_cf_node_as_block(nir_cf_node_prev(&loop->cf_node)); + nir_block *block_after_loop = + nir_cf_node_as_block(nir_cf_node_next(&loop->cf_node)); + + nir_block *prev_block = + nir_cf_node_as_block(nir_cf_node_prev(&use->parent_if->cf_node)); + if (prev_block->index <= block_before_loop->index || + prev_block->index >= block_after_loop->index) { + return false; + } + + return true; +} + +static bool +is_use_inside_loop(nir_src *use, nir_loop* loop) +{ + nir_block *block_before_loop = + nir_cf_node_as_block(nir_cf_node_prev(&loop->cf_node)); + nir_block *block_after_loop = + nir_cf_node_as_block(nir_cf_node_next(&loop->cf_node)); + + if (use->parent_instr->block->index <= block_before_loop->index || + use->parent_instr->block->index >= block_after_loop->index) { + return false; + } + + return true; +} + +static bool +convert_loop_exit_for_ssa(nir_ssa_def *def, void *void_state) +{ + lcssa_state *state = void_state; + bool all_uses_inside_loop = true; + + nir_block *block_after_loop = + nir_cf_node_as_block(nir_cf_node_next(&state->loop->cf_node)); + + nir_foreach_use(use, def) { + if (use->parent_instr->type == nir_instr_type_phi && + use->parent_instr->block == block_after_loop) { + continue; + } + + if (!is_use_inside_loop(use, state->loop)) { + all_uses_inside_loop = false; + } + } + + nir_foreach_if_use(use, def) { + if (!is_if_use_inside_loop(use, state->loop)) { + all_uses_inside_loop = false; + } + } + + /* There where no sources that had defs outside the loop */ + if (all_uses_inside_loop) + return true; + + /* Initialize a phi-instruction */ + nir_phi_instr *phi = nir_phi_instr_create(state->shader); + nir_ssa_dest_init(&phi->instr, &phi->dest, + def->num_components, def->bit_size, "LCSSA-phi"); + + /* Create a phi node with as many sources pointing to the same ssa_def as + * the block has predecessors. + */ + struct set_entry *entry; + set_foreach(block_after_loop->predecessors, entry) { + nir_phi_src *phi_src = ralloc(phi, nir_phi_src); + phi_src->src = nir_src_for_ssa(def); + phi_src->pred = (nir_block *) entry->key; + + exec_list_push_tail(&phi->srcs, &phi_src->node); + } + + nir_instr_insert_before_block(block_after_loop, &phi->instr); + + /* Run through all uses and rewrite those outside the loop to point to + * the phi instead of pointing to the ssa-def. + */ + nir_foreach_use_safe(use, def) { + if (use->parent_instr->type == nir_instr_type_phi && + block_after_loop == use->parent_instr->block) { + continue; + } + + if (!is_use_inside_loop(use, state->loop)) { + nir_instr_rewrite_src(use->parent_instr, use, + nir_src_for_ssa(&phi->dest.ssa)); + } + } + + nir_foreach_if_use_safe(use, def) { + if (!is_if_use_inside_loop(use, state->loop)) { + nir_if_rewrite_condition(use->parent_if, + nir_src_for_ssa(&phi->dest.ssa)); + } + } + + return true; +} + +static void +convert_to_lcssa(nir_cf_node *cf_node, lcssa_state *state) +{ + switch (cf_node->type) { + case nir_cf_node_block: + nir_foreach_instr(instr, nir_cf_node_as_block(cf_node)) + nir_foreach_ssa_def(instr, convert_loop_exit_for_ssa, state); + return; + case nir_cf_node_if: { + nir_if *if_stmt = nir_cf_node_as_if(cf_node); + foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) + convert_to_lcssa(nested_node, state); + foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) + convert_to_lcssa(nested_node, state); + return; + } + case nir_cf_node_loop: { + nir_loop *parent_loop = state->loop; + state->loop = nir_cf_node_as_loop(cf_node); + + foreach_list_typed(nir_cf_node, nested_node, node, &state->loop->body) + convert_to_lcssa(nested_node, state); + + state->loop = parent_loop; + return; + } + default: + unreachable("unknown cf node type"); + } +} + +void +nir_convert_loop_to_lcssa(nir_loop *loop) { + nir_function_impl *impl = nir_cf_node_get_function(&loop->cf_node); + + nir_metadata_require(impl, nir_metadata_block_index); + + lcssa_state *state = rzalloc(NULL, lcssa_state); + state->loop = loop; + state->shader = impl->function->shader; + + foreach_list_typed(nir_cf_node, node, node, &state->loop->body) + convert_to_lcssa(node, state); + + ralloc_free(state); +} diff -Nru mesa-12.0.6/src/compiler/nir/nir_to_ssa.c mesa-17.0.7/src/compiler/nir/nir_to_ssa.c --- mesa-12.0.6/src/compiler/nir/nir_to_ssa.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_to_ssa.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,540 +0,0 @@ -/* - * Copyright © 2014 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * Authors: - * Connor Abbott (cwabbott0@gmail.com) - * - */ - -#include "nir.h" -#include - -/* - * Implements the classic to-SSA algorithm described by Cytron et. al. in - * "Efficiently Computing Static Single Assignment Form and the Control - * Dependence Graph." - */ - -/* inserts a phi node of the form reg = phi(reg, reg, reg, ...) */ - -static void -insert_trivial_phi(nir_register *reg, nir_block *block, void *mem_ctx) -{ - nir_phi_instr *instr = nir_phi_instr_create(mem_ctx); - - instr->dest.reg.reg = reg; - struct set_entry *entry; - set_foreach(block->predecessors, entry) { - nir_block *pred = (nir_block *) entry->key; - - nir_phi_src *src = ralloc(instr, nir_phi_src); - src->pred = pred; - src->src.is_ssa = false; - src->src.reg.base_offset = 0; - src->src.reg.indirect = NULL; - src->src.reg.reg = reg; - exec_list_push_tail(&instr->srcs, &src->node); - } - - nir_instr_insert_before_block(block, &instr->instr); -} - -static void -insert_phi_nodes(nir_function_impl *impl) -{ - void *mem_ctx = ralloc_parent(impl); - - unsigned *work = calloc(impl->num_blocks, sizeof(unsigned)); - unsigned *has_already = calloc(impl->num_blocks, sizeof(unsigned)); - - /* - * Since the work flags already prevent us from inserting a node that has - * ever been inserted into W, we don't need to use a set to represent W. - * Also, since no block can ever be inserted into W more than once, we know - * that the maximum size of W is the number of basic blocks in the - * function. So all we need to handle W is an array and a pointer to the - * next element to be inserted and the next element to be removed. - */ - nir_block **W = malloc(impl->num_blocks * sizeof(nir_block *)); - unsigned w_start, w_end; - - unsigned iter_count = 0; - - nir_index_blocks(impl); - - foreach_list_typed(nir_register, reg, node, &impl->registers) { - if (reg->num_array_elems != 0) - continue; - - w_start = w_end = 0; - iter_count++; - - nir_foreach_def(dest, reg) { - nir_instr *def = dest->reg.parent_instr; - if (work[def->block->index] < iter_count) - W[w_end++] = def->block; - work[def->block->index] = iter_count; - } - - while (w_start != w_end) { - nir_block *cur = W[w_start++]; - struct set_entry *entry; - set_foreach(cur->dom_frontier, entry) { - nir_block *next = (nir_block *) entry->key; - - /* - * If there's more than one return statement, then the end block - * can be a join point for some definitions. However, there are - * no instructions in the end block, so nothing would use those - * phi nodes. Of course, we couldn't place those phi nodes - * anyways due to the restriction of having no instructions in the - * end block... - */ - if (next == impl->end_block) - continue; - - if (has_already[next->index] < iter_count) { - insert_trivial_phi(reg, next, mem_ctx); - has_already[next->index] = iter_count; - if (work[next->index] < iter_count) { - work[next->index] = iter_count; - W[w_end++] = next; - } - } - } - } - } - - free(work); - free(has_already); - free(W); -} - -typedef struct { - nir_ssa_def **stack; - int index; - unsigned num_defs; /** < used to add indices to debug names */ -#ifndef NDEBUG - unsigned stack_size; -#endif -} reg_state; - -typedef struct { - reg_state *states; - void *mem_ctx; - nir_instr *parent_instr; - nir_if *parent_if; - nir_function_impl *impl; - - /* map from SSA value -> original register */ - struct hash_table *ssa_map; -} rewrite_state; - -static nir_ssa_def *get_ssa_src(nir_register *reg, rewrite_state *state) -{ - unsigned index = reg->index; - - if (state->states[index].index == -1) { - /* - * We're using an undefined register, create a new undefined SSA value - * to preserve the information that this source is undefined - */ - nir_ssa_undef_instr *instr = - nir_ssa_undef_instr_create(state->mem_ctx, reg->num_components, - reg->bit_size); - - /* - * We could just insert the undefined instruction before the instruction - * we're rewriting, but we could be rewriting a phi source in which case - * we can't do that, so do the next easiest thing - insert it at the - * beginning of the program. In the end, it doesn't really matter where - * the undefined instructions are because they're going to be ignored - * in the backend. - */ - nir_instr_insert_before_cf_list(&state->impl->body, &instr->instr); - return &instr->def; - } - - return state->states[index].stack[state->states[index].index]; -} - -static bool -rewrite_use(nir_src *src, void *_state) -{ - rewrite_state *state = (rewrite_state *) _state; - - if (src->is_ssa) - return true; - - unsigned index = src->reg.reg->index; - - if (state->states[index].stack == NULL) - return true; - - nir_ssa_def *def = get_ssa_src(src->reg.reg, state); - if (state->parent_instr) - nir_instr_rewrite_src(state->parent_instr, src, nir_src_for_ssa(def)); - else - nir_if_rewrite_condition(state->parent_if, nir_src_for_ssa(def)); - - return true; -} - -static bool -rewrite_def_forwards(nir_dest *dest, void *_state) -{ - rewrite_state *state = (rewrite_state *) _state; - - if (dest->is_ssa) - return true; - - nir_register *reg = dest->reg.reg; - unsigned index = reg->index; - - if (state->states[index].stack == NULL) - return true; - - char *name = NULL; - if (dest->reg.reg->name) - name = ralloc_asprintf(state->mem_ctx, "%s_%u", dest->reg.reg->name, - state->states[index].num_defs); - - list_del(&dest->reg.def_link); - nir_ssa_dest_init(state->parent_instr, dest, reg->num_components, - reg->bit_size, name); - ralloc_free(name); - - /* push our SSA destination on the stack */ - state->states[index].index++; - assert(state->states[index].index < state->states[index].stack_size); - state->states[index].stack[state->states[index].index] = &dest->ssa; - state->states[index].num_defs++; - - _mesa_hash_table_insert(state->ssa_map, &dest->ssa, reg); - - return true; -} - -static void -rewrite_alu_instr_forward(nir_alu_instr *instr, rewrite_state *state) -{ - state->parent_instr = &instr->instr; - - nir_foreach_src(&instr->instr, rewrite_use, state); - - if (instr->dest.dest.is_ssa) - return; - - nir_register *reg = instr->dest.dest.reg.reg; - unsigned index = reg->index; - - if (state->states[index].stack == NULL) - return; - - unsigned write_mask = instr->dest.write_mask; - if (write_mask != (1 << instr->dest.dest.reg.reg->num_components) - 1) { - /* - * Calculate the number of components the final instruction, which for - * per-component things is the number of output components of the - * instruction and non-per-component things is the number of enabled - * channels in the write mask. - */ - unsigned num_components; - if (nir_op_infos[instr->op].output_size == 0) { - unsigned temp = (write_mask & 0x5) + ((write_mask >> 1) & 0x5); - num_components = (temp & 0x3) + ((temp >> 2) & 0x3); - } else { - num_components = nir_op_infos[instr->op].output_size; - } - - char *name = NULL; - if (instr->dest.dest.reg.reg->name) - name = ralloc_asprintf(state->mem_ctx, "%s_%u", - reg->name, state->states[index].num_defs); - - instr->dest.write_mask = (1 << num_components) - 1; - list_del(&instr->dest.dest.reg.def_link); - nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components, - reg->bit_size, name); - ralloc_free(name); - - if (nir_op_infos[instr->op].output_size == 0) { - /* - * When we change the output writemask, we need to change the - * swizzles for per-component inputs too - */ - for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) { - if (nir_op_infos[instr->op].input_sizes[i] != 0) - continue; - - unsigned new_swizzle[4] = {0, 0, 0, 0}; - - /* - * We keep two indices: - * 1. The index of the original (non-SSA) component - * 2. The index of the post-SSA, compacted, component - * - * We need to map the swizzle component at index 1 to the swizzle - * component at index 2. - */ - - unsigned ssa_index = 0; - for (unsigned index = 0; index < 4; index++) { - if (!((write_mask >> index) & 1)) - continue; - - new_swizzle[ssa_index] = instr->src[i].swizzle[index]; - ssa_index++; - } - - for (unsigned j = 0; j < 4; j++) - instr->src[i].swizzle[j] = new_swizzle[j]; - } - } - - nir_op op; - switch (reg->num_components) { - case 2: op = nir_op_vec2; break; - case 3: op = nir_op_vec3; break; - case 4: op = nir_op_vec4; break; - default: unreachable("not reached"); - } - - nir_alu_instr *vec = nir_alu_instr_create(state->mem_ctx, op); - - vec->dest.dest.reg.reg = reg; - vec->dest.write_mask = (1 << reg->num_components) - 1; - - nir_ssa_def *old_src = get_ssa_src(reg, state); - nir_ssa_def *new_src = &instr->dest.dest.ssa; - - unsigned ssa_index = 0; - for (unsigned i = 0; i < reg->num_components; i++) { - vec->src[i].src.is_ssa = true; - if ((write_mask >> i) & 1) { - vec->src[i].src.ssa = new_src; - if (nir_op_infos[instr->op].output_size == 0) - vec->src[i].swizzle[0] = ssa_index; - else - vec->src[i].swizzle[0] = i; - ssa_index++; - } else { - vec->src[i].src.ssa = old_src; - vec->src[i].swizzle[0] = i; - } - } - - nir_instr_insert_after(&instr->instr, &vec->instr); - - state->parent_instr = &vec->instr; - rewrite_def_forwards(&vec->dest.dest, state); - } else { - rewrite_def_forwards(&instr->dest.dest, state); - } -} - -static void -rewrite_phi_instr(nir_phi_instr *instr, rewrite_state *state) -{ - state->parent_instr = &instr->instr; - rewrite_def_forwards(&instr->dest, state); -} - -static void -rewrite_instr_forward(nir_instr *instr, rewrite_state *state) -{ - if (instr->type == nir_instr_type_alu) { - rewrite_alu_instr_forward(nir_instr_as_alu(instr), state); - return; - } - - if (instr->type == nir_instr_type_phi) { - rewrite_phi_instr(nir_instr_as_phi(instr), state); - return; - } - - state->parent_instr = instr; - - nir_foreach_src(instr, rewrite_use, state); - nir_foreach_dest(instr, rewrite_def_forwards, state); -} - -static void -rewrite_phi_sources(nir_block *block, nir_block *pred, rewrite_state *state) -{ - nir_foreach_instr(instr, block) { - if (instr->type != nir_instr_type_phi) - break; - - nir_phi_instr *phi_instr = nir_instr_as_phi(instr); - - state->parent_instr = instr; - - nir_foreach_phi_src(src, phi_instr) { - if (src->pred == pred) { - rewrite_use(&src->src, state); - break; - } - } - } -} - -static bool -rewrite_def_backwards(nir_dest *dest, void *_state) -{ - rewrite_state *state = (rewrite_state *) _state; - - if (!dest->is_ssa) - return true; - - struct hash_entry *entry = - _mesa_hash_table_search(state->ssa_map, &dest->ssa); - - if (!entry) - return true; - - nir_register *reg = (nir_register *) entry->data; - unsigned index = reg->index; - - state->states[index].index--; - assert(state->states[index].index >= -1); - - return true; -} - -static void -rewrite_instr_backwards(nir_instr *instr, rewrite_state *state) -{ - nir_foreach_dest(instr, rewrite_def_backwards, state); -} - -static void -rewrite_block(nir_block *block, rewrite_state *state) -{ - /* This will skip over any instructions after the current one, which is - * what we want because those instructions (vector gather, conditional - * select) will already be in SSA form. - */ - nir_foreach_instr_safe(instr, block) { - rewrite_instr_forward(instr, state); - } - - if (block != state->impl->end_block && - !nir_cf_node_is_last(&block->cf_node) && - nir_cf_node_next(&block->cf_node)->type == nir_cf_node_if) { - nir_if *if_stmt = nir_cf_node_as_if(nir_cf_node_next(&block->cf_node)); - state->parent_instr = NULL; - state->parent_if = if_stmt; - rewrite_use(&if_stmt->condition, state); - } - - if (block->successors[0]) - rewrite_phi_sources(block->successors[0], block, state); - if (block->successors[1]) - rewrite_phi_sources(block->successors[1], block, state); - - for (unsigned i = 0; i < block->num_dom_children; i++) - rewrite_block(block->dom_children[i], state); - - nir_foreach_instr_reverse(instr, block) { - rewrite_instr_backwards(instr, state); - } -} - -static void -remove_unused_regs(nir_function_impl *impl, rewrite_state *state) -{ - foreach_list_typed_safe(nir_register, reg, node, &impl->registers) { - if (state->states[reg->index].stack != NULL) - exec_node_remove(®->node); - } -} - -static void -init_rewrite_state(nir_function_impl *impl, rewrite_state *state) -{ - state->impl = impl; - state->mem_ctx = ralloc_parent(impl); - state->ssa_map = _mesa_hash_table_create(NULL, _mesa_hash_pointer, - _mesa_key_pointer_equal); - state->states = ralloc_array(NULL, reg_state, impl->reg_alloc); - - foreach_list_typed(nir_register, reg, node, &impl->registers) { - assert(reg->index < impl->reg_alloc); - if (reg->num_array_elems > 0) { - state->states[reg->index].stack = NULL; - } else { - /* - * Calculate a conservative estimate of the stack size based on the - * number of definitions there are. Note that this function *must* be - * called after phi nodes are inserted so we can count phi node - * definitions too. - */ - unsigned stack_size = list_length(®->defs); - - state->states[reg->index].stack = ralloc_array(state->states, - nir_ssa_def *, - stack_size); -#ifndef NDEBUG - state->states[reg->index].stack_size = stack_size; -#endif - state->states[reg->index].index = -1; - state->states[reg->index].num_defs = 0; - } - } -} - -static void -destroy_rewrite_state(rewrite_state *state) -{ - _mesa_hash_table_destroy(state->ssa_map, NULL); - ralloc_free(state->states); -} - -void -nir_convert_to_ssa_impl(nir_function_impl *impl) -{ - nir_metadata_require(impl, nir_metadata_dominance); - - insert_phi_nodes(impl); - - rewrite_state state; - init_rewrite_state(impl, &state); - - rewrite_block(nir_start_block(impl), &state); - - remove_unused_regs(impl, &state); - - nir_metadata_preserve(impl, nir_metadata_block_index | - nir_metadata_dominance); - - destroy_rewrite_state(&state); -} - -void -nir_convert_to_ssa(nir_shader *shader) -{ - nir_foreach_function(function, shader) { - if (function->impl) - nir_convert_to_ssa_impl(function->impl); - } -} diff -Nru mesa-12.0.6/src/compiler/nir/nir_validate.c mesa-17.0.7/src/compiler/nir/nir_validate.c --- mesa-12.0.6/src/compiler/nir/nir_validate.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_validate.c 2017-06-01 10:37:10.000000000 +0000 @@ -173,6 +173,9 @@ validate_assert(state, entry); + if (!entry) + return; + ssa_def_validate_state *def_state = (ssa_def_validate_state *)entry->data; validate_assert(state, def_state->where_defined == state->impl && @@ -702,8 +705,7 @@ } case nir_jump_continue: { - nir_block *first = - nir_cf_node_as_block(nir_loop_first_cf_node(state->loop)); + nir_block *first = nir_loop_first_block(state->loop); validate_assert(state, block->successors[0] == first); break; } @@ -720,8 +722,7 @@ if (next == NULL) { switch (state->parent_node->type) { case nir_cf_node_loop: { - nir_block *first = - nir_cf_node_as_block(nir_loop_first_cf_node(state->loop)); + nir_block *first = nir_loop_first_block(state->loop); validate_assert(state, block->successors[0] == first); /* due to the hack for infinite loops, block->successors[1] may * point to the block after the loop. @@ -748,15 +749,15 @@ } else { if (next->type == nir_cf_node_if) { nir_if *if_stmt = nir_cf_node_as_if(next); - validate_assert(state, &block->successors[0]->cf_node == - nir_if_first_then_node(if_stmt)); - validate_assert(state, &block->successors[1]->cf_node == - nir_if_first_else_node(if_stmt)); + validate_assert(state, block->successors[0] == + nir_if_first_then_block(if_stmt)); + validate_assert(state, block->successors[1] == + nir_if_first_else_block(if_stmt)); } else { validate_assert(state, next->type == nir_cf_node_loop); nir_loop *loop = nir_cf_node_as_loop(next); - validate_assert(state, &block->successors[0]->cf_node == - nir_loop_first_cf_node(loop)); + validate_assert(state, block->successors[0] == + nir_loop_first_block(loop)); validate_assert(state, block->successors[1] == NULL); } } @@ -941,6 +942,19 @@ /* Must have exactly one mode set */ validate_assert(state, util_bitcount(var->data.mode) == 1); + if (var->data.compact) { + /* The "compact" flag is only valid on arrays of scalars. */ + assert(glsl_type_is_array(var->type)); + + const struct glsl_type *type = glsl_get_array_element(var->type); + if (nir_is_per_vertex_io(var, state->shader->stage)) { + assert(glsl_type_is_array(type)); + assert(glsl_type_is_scalar(glsl_get_array_element(type))); + } else { + assert(glsl_type_is_scalar(type)); + } + } + /* * TODO validate some things ir_validate.cpp does (requires more GLSL type * support) @@ -970,7 +984,7 @@ } if (def_state->uses->entries != 0) { - printf("extra entries in register uses:\n"); + printf("extra entries in SSA def uses:\n"); struct set_entry *entry; set_foreach(def_state->uses, entry) printf("%p\n", entry->key); @@ -985,7 +999,7 @@ } if (def_state->if_uses->entries != 0) { - printf("extra entries in register uses:\n"); + printf("extra entries in SSA def uses:\n"); struct set_entry *entry; set_foreach(def_state->if_uses, entry) printf("%p\n", entry->key); @@ -1124,6 +1138,12 @@ void nir_validate_shader(nir_shader *shader) { + static int should_validate = -1; + if (should_validate < 0) + should_validate = env_var_as_boolean("NIR_VALIDATE", true); + if (!should_validate) + return; + validate_state state; init_validate_state(&state); diff -Nru mesa-12.0.6/src/compiler/nir/nir_worklist.c mesa-17.0.7/src/compiler/nir/nir_worklist.c --- mesa-12.0.6/src/compiler/nir/nir_worklist.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/nir_worklist.c 2017-06-01 10:37:10.000000000 +0000 @@ -37,7 +37,7 @@ w->blocks_present = rzalloc_array(mem_ctx, BITSET_WORD, BITSET_WORDS(num_blocks)); - w->blocks = ralloc_array(mem_ctx, nir_block *, num_blocks); + w->blocks = rzalloc_array(mem_ctx, nir_block *, num_blocks); } void diff -Nru mesa-12.0.6/src/compiler/nir/tests/control_flow_tests.cpp mesa-17.0.7/src/compiler/nir/tests/control_flow_tests.cpp --- mesa-12.0.6/src/compiler/nir/tests/control_flow_tests.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir/tests/control_flow_tests.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -76,7 +76,7 @@ * } */ nir_block *block_0 = nir_start_block(b.impl); - nir_block *block_1 = nir_cf_node_as_block(nir_loop_first_cf_node(loop)); + nir_block *block_1 = nir_loop_first_block(loop); nir_block *block_2 = nir_cf_node_as_block(nir_cf_node_next(&loop->cf_node)); nir_block *block_3 = b.impl->end_block; ASSERT_EQ(nir_cf_node_block, block_0->cf_node.type); @@ -120,7 +120,7 @@ * // succs: block_1 * } * block block_2: - * // preds: block_1 + * // preds: * // succs: block_3 * block block_3: * } @@ -130,18 +130,18 @@ EXPECT_EQ(block_1, block_0->successors[0]); EXPECT_EQ(NULL, block_0->successors[1]); EXPECT_EQ(block_1, block_1->successors[0]); /* back to itself */ - EXPECT_EQ(block_2, block_1->successors[1]); /* fake successor */ + EXPECT_EQ(NULL, block_1->successors[1]); EXPECT_EQ(block_3, block_2->successors[0]); EXPECT_EQ(NULL, block_2->successors[1]); EXPECT_EQ(NULL, block_3->successors[0]); EXPECT_EQ(NULL, block_3->successors[1]); EXPECT_EQ(0, block_0->predecessors->entries); EXPECT_EQ(2, block_1->predecessors->entries); - EXPECT_EQ(1, block_2->predecessors->entries); + EXPECT_EQ(0, block_2->predecessors->entries); EXPECT_EQ(1, block_3->predecessors->entries); EXPECT_TRUE(_mesa_set_search(block_1->predecessors, block_0)); EXPECT_TRUE(_mesa_set_search(block_1->predecessors, block_1)); - EXPECT_TRUE(_mesa_set_search(block_2->predecessors, block_1)); + EXPECT_FALSE(_mesa_set_search(block_2->predecessors, block_1)); EXPECT_TRUE(_mesa_set_search(block_3->predecessors, block_2)); nir_metadata_require(b.impl, nir_metadata_dominance); diff -Nru mesa-12.0.6/src/compiler/nir_types.cpp mesa-17.0.7/src/compiler/nir_types.cpp --- mesa-12.0.6/src/compiler/nir_types.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir_types.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -28,32 +28,10 @@ #include "nir_types.h" #include "compiler/glsl/ir.h" -void -glsl_print_type(const glsl_type *type, FILE *fp) +const char * +glsl_get_type_name(const glsl_type *type) { - if (type->base_type == GLSL_TYPE_ARRAY) { - glsl_print_type(type->fields.array, fp); - fprintf(fp, "[%u]", type->length); - } else if ((type->base_type == GLSL_TYPE_STRUCT) - && !is_gl_identifier(type->name)) { - fprintf(fp, "%s@%p", type->name, (void *) type); - } else { - fprintf(fp, "%s", type->name); - } -} - -void -glsl_print_struct(const glsl_type *type, FILE *fp) -{ - assert(type->base_type == GLSL_TYPE_STRUCT); - - fprintf(fp, "struct {\n"); - for (unsigned i = 0; i < type->length; i++) { - fprintf(fp, "\t"); - glsl_print_type(type->fields.structure[i].type, fp); - fprintf(fp, " %s;\n", type->fields.structure[i].name); - } - fprintf(fp, "}\n"); + return type->name; } const glsl_type * @@ -207,6 +185,12 @@ } bool +glsl_type_is_array_of_arrays(const struct glsl_type *type) +{ + return type->is_array_of_arrays(); +} + +bool glsl_type_is_struct(const struct glsl_type *type) { return type->is_record() || type->is_interface(); @@ -238,6 +222,24 @@ return type->sampler_array; } +bool +glsl_type_is_dual_slot(const struct glsl_type *type) +{ + return type->is_dual_slot(); +} + +bool +glsl_type_is_numeric(const struct glsl_type *type) +{ + return type->is_numeric(); +} + +bool +glsl_type_is_boolean(const struct glsl_type *type) +{ + return type->is_boolean(); +} + const glsl_type * glsl_void_type(void) { @@ -251,12 +253,24 @@ } const glsl_type * +glsl_double_type(void) +{ + return glsl_type::double_type; +} + +const glsl_type * glsl_vec_type(unsigned n) { return glsl_type::vec(n); } const glsl_type * +glsl_dvec_type(unsigned n) +{ + return glsl_type::dvec(n); +} + +const glsl_type * glsl_vec4_type(void) { return glsl_type::vec4_type; diff -Nru mesa-12.0.6/src/compiler/nir_types.h mesa-17.0.7/src/compiler/nir_types.h --- mesa-12.0.6/src/compiler/nir_types.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/nir_types.h 2017-06-01 10:37:10.000000000 +0000 @@ -40,8 +40,7 @@ struct glsl_type; #endif -void glsl_print_type(const struct glsl_type *type, FILE *fp); -void glsl_print_struct(const struct glsl_type *type, FILE *fp); +const char *glsl_get_type_name(const struct glsl_type *type); const struct glsl_type *glsl_get_struct_field(const struct glsl_type *type, unsigned index); @@ -109,15 +108,21 @@ bool glsl_type_is_vector_or_scalar(const struct glsl_type *type); bool glsl_type_is_matrix(const struct glsl_type *type); bool glsl_type_is_array(const struct glsl_type *type); +bool glsl_type_is_array_of_arrays(const struct glsl_type *type); bool glsl_type_is_struct(const struct glsl_type *type); bool glsl_type_is_sampler(const struct glsl_type *type); bool glsl_type_is_image(const struct glsl_type *type); +bool glsl_type_is_dual_slot(const struct glsl_type *type); +bool glsl_type_is_numeric(const struct glsl_type *type); +bool glsl_type_is_boolean(const struct glsl_type *type); bool glsl_sampler_type_is_shadow(const struct glsl_type *type); bool glsl_sampler_type_is_array(const struct glsl_type *type); const struct glsl_type *glsl_void_type(void); const struct glsl_type *glsl_float_type(void); +const struct glsl_type *glsl_double_type(void); const struct glsl_type *glsl_vec_type(unsigned n); +const struct glsl_type *glsl_dvec_type(unsigned n); const struct glsl_type *glsl_vec4_type(void); const struct glsl_type *glsl_int_type(void); const struct glsl_type *glsl_uint_type(void); diff -Nru mesa-12.0.6/src/compiler/SConscript mesa-17.0.7/src/compiler/SConscript --- mesa-12.0.6/src/compiler/SConscript 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/SConscript 2017-06-01 10:37:10.000000000 +0000 @@ -13,6 +13,10 @@ '#src/gallium/auxiliary', ]) +# Make generated headers reachable from the include path. +env.Prepend(CPPPATH = [Dir('.').abspath, Dir('glsl').abspath]) +env.Prepend(CPPPATH = [Dir('.').abspath, Dir('nir').abspath]) + sources = env.ParseSourceList('Makefile.sources', 'LIBCOMPILER_FILES') compiler = env.ConvenienceLibrary( diff -Nru mesa-12.0.6/src/compiler/SConscript.glsl mesa-17.0.7/src/compiler/SConscript.glsl --- mesa-12.0.6/src/compiler/SConscript.glsl 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/SConscript.glsl 2017-06-01 10:37:10.000000000 +0000 @@ -70,23 +70,43 @@ # Copy these files to avoid generation object files into src/mesa/program env.Prepend(CPPPATH = ['#src/mesa/main']) env.Command('glsl/imports.c', '#src/mesa/main/imports.c', Copy('$TARGET', '$SOURCE')) +env.Command('glsl/extensions_table.c', '#src/mesa/main/extensions_table.c', Copy('$TARGET', '$SOURCE')) # Copy these files to avoid generation object files into src/mesa/program env.Prepend(CPPPATH = ['#src/mesa/program']) -env.Command('glsl/prog_hash_table.c', '#src/mesa/program/prog_hash_table.c', Copy('$TARGET', '$SOURCE')) env.Command('glsl/symbol_table.c', '#src/mesa/program/symbol_table.c', Copy('$TARGET', '$SOURCE')) env.Command('glsl/dummy_errors.c', '#src/mesa/program/dummy_errors.c', Copy('$TARGET', '$SOURCE')) compiler_objs = env.StaticObject(source_lists['GLSL_COMPILER_CXX_FILES']) mesa_objs = env.StaticObject([ + 'glsl/extensions_table.c', 'glsl/imports.c', - 'glsl/prog_hash_table.c', 'glsl/symbol_table.c', 'glsl/dummy_errors.c', ]) compiler_objs += mesa_objs +# GLSL generated sources +env.CodeGenerate( + target = 'glsl/ir_expression_operation.h', + script = 'glsl/ir_expression_operation.py', + source = [], + command = python_cmd + ' $SCRIPT enum > $TARGET' +) +env.CodeGenerate( + target = 'glsl/ir_expression_operation_constant.h', + script = 'glsl/ir_expression_operation.py', + source = [], + command = python_cmd + ' $SCRIPT constant > $TARGET' +) +env.CodeGenerate( + target = 'glsl/ir_expression_operation_strings.h', + script = 'glsl/ir_expression_operation.py', + source = [], + command = python_cmd + ' $SCRIPT strings > $TARGET' +) + glsl = env.ConvenienceLibrary( target = 'glsl', source = glsl_sources, @@ -98,6 +118,11 @@ Export('glsl') +# +# XXX: It's important to not add any generated source files after this point, +# or it will break MinGW cross-compilation. +# + # Skip building these programs as they will cause SCons error "Two environments # with different actions were specified for the same target" if env['crosscompile'] or env['embedded']: diff -Nru mesa-12.0.6/src/compiler/SConscript.nir mesa-17.0.7/src/compiler/SConscript.nir --- mesa-12.0.6/src/compiler/SConscript.nir 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/SConscript.nir 2017-06-01 10:37:10.000000000 +0000 @@ -19,6 +19,7 @@ ]) # Make generated headers reachable from the include path. +env.Prepend(CPPPATH = [Dir('.').abspath, Dir('glsl').abspath]) env.Prepend(CPPPATH = [Dir('.').abspath, Dir('nir').abspath]) # nir generated sources diff -Nru mesa-12.0.6/src/compiler/shader_enums.c mesa-17.0.7/src/compiler/shader_enums.c --- mesa-12.0.6/src/compiler/shader_enums.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/shader_enums.c 2017-06-01 10:37:10.000000000 +0000 @@ -151,6 +151,8 @@ ENUM(VARYING_SLOT_CLIP_VERTEX), ENUM(VARYING_SLOT_CLIP_DIST0), ENUM(VARYING_SLOT_CLIP_DIST1), + ENUM(VARYING_SLOT_CULL_DIST0), + ENUM(VARYING_SLOT_CULL_DIST1), ENUM(VARYING_SLOT_PRIMITIVE_ID), ENUM(VARYING_SLOT_LAYER), ENUM(VARYING_SLOT_VIEWPORT), @@ -158,6 +160,8 @@ ENUM(VARYING_SLOT_PNTC), ENUM(VARYING_SLOT_TESS_LEVEL_OUTER), ENUM(VARYING_SLOT_TESS_LEVEL_INNER), + ENUM(VARYING_SLOT_BOUNDING_BOX0), + ENUM(VARYING_SLOT_BOUNDING_BOX1), ENUM(VARYING_SLOT_VAR0), ENUM(VARYING_SLOT_VAR1), ENUM(VARYING_SLOT_VAR2), @@ -226,15 +230,15 @@ } const char * -glsl_interp_qualifier_name(enum glsl_interp_qualifier qual) +glsl_interp_mode_name(enum glsl_interp_mode qual) { static const char *names[] = { - ENUM(INTERP_QUALIFIER_NONE), - ENUM(INTERP_QUALIFIER_SMOOTH), - ENUM(INTERP_QUALIFIER_FLAT), - ENUM(INTERP_QUALIFIER_NOPERSPECTIVE), + ENUM(INTERP_MODE_NONE), + ENUM(INTERP_MODE_SMOOTH), + ENUM(INTERP_MODE_FLAT), + ENUM(INTERP_MODE_NOPERSPECTIVE), }; - STATIC_ASSERT(ARRAY_SIZE(names) == INTERP_QUALIFIER_COUNT); + STATIC_ASSERT(ARRAY_SIZE(names) == INTERP_MODE_COUNT); return NAME(qual); } diff -Nru mesa-12.0.6/src/compiler/shader_enums.h mesa-17.0.7/src/compiler/shader_enums.h --- mesa-12.0.6/src/compiler/shader_enums.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/shader_enums.h 2017-06-01 10:37:10.000000000 +0000 @@ -172,6 +172,7 @@ BITFIELD64_RANGE(VERT_ATTRIB_GENERIC(0), VERT_ATTRIB_GENERIC_MAX) /*@}*/ +#define MAX_VARYING 32 /**< number of float[4] vectors */ /** * Indexes for vertex shader outputs, geometry shader inputs/outputs, and @@ -214,6 +215,8 @@ VARYING_SLOT_PNTC, /* FS only */ VARYING_SLOT_TESS_LEVEL_OUTER, /* Only appears as TCS output. */ VARYING_SLOT_TESS_LEVEL_INNER, /* Only appears as TCS output. */ + VARYING_SLOT_BOUNDING_BOX0, /* Only appears as TCS output. */ + VARYING_SLOT_BOUNDING_BOX1, /* Only appears as TCS output. */ VARYING_SLOT_VAR0, /* First generic varying slot */ /* the remaining are simply for the benefit of gl_varying_slot_name() * and not to be construed as an upper bound: @@ -294,6 +297,8 @@ #define VARYING_BIT_PNTC BITFIELD64_BIT(VARYING_SLOT_PNTC) #define VARYING_BIT_TESS_LEVEL_OUTER BITFIELD64_BIT(VARYING_SLOT_TESS_LEVEL_OUTER) #define VARYING_BIT_TESS_LEVEL_INNER BITFIELD64_BIT(VARYING_SLOT_TESS_LEVEL_INNER) +#define VARYING_BIT_BOUNDING_BOX0 BITFIELD64_BIT(VARYING_SLOT_BOUNDING_BOX0) +#define VARYING_BIT_BOUNDING_BOX1 BITFIELD64_BIT(VARYING_SLOT_BOUNDING_BOX1) #define VARYING_BIT_VAR(V) BITFIELD64_BIT(VARYING_SLOT_VAR0 + (V)) /*@}*/ @@ -468,6 +473,7 @@ SYSTEM_VALUE_GLOBAL_INVOCATION_ID, SYSTEM_VALUE_WORK_GROUP_ID, SYSTEM_VALUE_NUM_WORK_GROUPS, + SYSTEM_VALUE_LOCAL_GROUP_SIZE, /*@}*/ /** @@ -485,19 +491,19 @@ * The possible interpolation qualifiers that can be applied to a fragment * shader input in GLSL. * - * Note: INTERP_QUALIFIER_NONE must be 0 so that memsetting the - * gl_fragment_program data structure to 0 causes the default behavior. + * Note: INTERP_MODE_NONE must be 0 so that memsetting the + * ir_variable data structure to 0 causes the default behavior. */ -enum glsl_interp_qualifier +enum glsl_interp_mode { - INTERP_QUALIFIER_NONE = 0, - INTERP_QUALIFIER_SMOOTH, - INTERP_QUALIFIER_FLAT, - INTERP_QUALIFIER_NOPERSPECTIVE, - INTERP_QUALIFIER_COUNT /**< Number of interpolation qualifiers */ + INTERP_MODE_NONE = 0, + INTERP_MODE_SMOOTH, + INTERP_MODE_FLAT, + INTERP_MODE_NOPERSPECTIVE, + INTERP_MODE_COUNT /**< Number of interpolation qualifiers */ }; -const char *glsl_interp_qualifier_name(enum glsl_interp_qualifier qual); +const char *glsl_interp_mode_name(enum glsl_interp_mode qual); /** * Fragment program results @@ -559,6 +565,40 @@ ACCESS_VOLATILE = 4, }; +/** + * \brief Blend support qualifiers + */ +enum gl_advanced_blend_mode +{ + BLEND_NONE = 0x0000, + + BLEND_MULTIPLY = 0x0001, + BLEND_SCREEN = 0x0002, + BLEND_OVERLAY = 0x0004, + BLEND_DARKEN = 0x0008, + BLEND_LIGHTEN = 0x0010, + BLEND_COLORDODGE = 0x0020, + BLEND_COLORBURN = 0x0040, + BLEND_HARDLIGHT = 0x0080, + BLEND_SOFTLIGHT = 0x0100, + BLEND_DIFFERENCE = 0x0200, + BLEND_EXCLUSION = 0x0400, + BLEND_HSL_HUE = 0x0800, + BLEND_HSL_SATURATION = 0x1000, + BLEND_HSL_COLOR = 0x2000, + BLEND_HSL_LUMINOSITY = 0x4000, + + BLEND_ALL = 0x7fff, +}; + +enum gl_tess_spacing +{ + TESS_SPACING_UNSPECIFIED, + TESS_SPACING_EQUAL, + TESS_SPACING_FRACTIONAL_ODD, + TESS_SPACING_FRACTIONAL_EVEN, +}; + #ifdef __cplusplus } /* extern "C" */ #endif diff -Nru mesa-12.0.6/src/compiler/shader_info.h mesa-17.0.7/src/compiler/shader_info.h --- mesa-12.0.6/src/compiler/shader_info.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/shader_info.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,163 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +#ifndef SHADER_INFO_H +#define SHADER_INFO_H + +#include "shader_enums.h" + +#ifdef __cplusplus +extern "C" { +#endif + +typedef struct shader_info { + /** The shader stage, such as MESA_SHADER_VERTEX. */ + gl_shader_stage stage; + + const char *name; + + /* Descriptive name provided by the client; may be NULL */ + const char *label; + + /* Number of textures used by this shader */ + unsigned num_textures; + /* Number of uniform buffers used by this shader */ + unsigned num_ubos; + /* Number of atomic buffers used by this shader */ + unsigned num_abos; + /* Number of shader storage buffers used by this shader */ + unsigned num_ssbos; + /* Number of images used by this shader */ + unsigned num_images; + + /* Which inputs are actually read */ + uint64_t inputs_read; + /* Which inputs are actually read and are double */ + uint64_t double_inputs_read; + /* Which outputs are actually written */ + uint64_t outputs_written; + /* Which outputs are actually read */ + uint64_t outputs_read; + /* Which system values are actually read */ + uint64_t system_values_read; + + /* Which patch inputs are actually read */ + uint32_t patch_inputs_read; + /* Which patch outputs are actually written */ + uint32_t patch_outputs_written; + + /* Whether or not this shader ever uses textureGather() */ + bool uses_texture_gather; + + /* The size of the gl_ClipDistance[] array, if declared. */ + unsigned clip_distance_array_size; + + /* The size of the gl_CullDistance[] array, if declared. */ + unsigned cull_distance_array_size; + + /* Whether or not separate shader objects were used */ + bool separate_shader; + + /** Was this shader linked with any transform feedback varyings? */ + bool has_transform_feedback_varyings; + + union { + struct { + /** The number of vertices recieves per input primitive */ + unsigned vertices_in; + + /** The output primitive type (GL enum value) */ + unsigned output_primitive; + + /** The input primitive type (GL enum value) */ + unsigned input_primitive; + + /** The maximum number of vertices the geometry shader might write. */ + unsigned vertices_out; + + /** 1 .. MAX_GEOMETRY_SHADER_INVOCATIONS */ + unsigned invocations; + + /** Whether or not this shader uses EndPrimitive */ + bool uses_end_primitive; + + /** Whether or not this shader uses non-zero streams */ + bool uses_streams; + } gs; + + struct { + bool uses_discard; + + /** + * Whether any inputs are declared with the "sample" qualifier. + */ + bool uses_sample_qualifier; + + /** + * Whether early fragment tests are enabled as defined by + * ARB_shader_image_load_store. + */ + bool early_fragment_tests; + + /** + * Defined by INTEL_conservative_rasterization. + */ + bool inner_coverage; + + bool post_depth_coverage; + + /** gl_FragDepth layout for ARB_conservative_depth. */ + enum gl_frag_depth_layout depth_layout; + } fs; + + struct { + unsigned local_size[3]; + + bool local_size_variable; + + /** + * Size of shared variables accessed by the compute shader. + */ + unsigned shared_size; + } cs; + + /* Applies to both TCS and TES. */ + struct { + /** The number of vertices in the TCS output patch. */ + unsigned tcs_vertices_out; + + uint32_t primitive_mode; /* GL_TRIANGLES, GL_QUADS or GL_ISOLINES */ + enum gl_tess_spacing spacing; + /** Is the vertex order counterclockwise? */ + bool ccw; + bool point_mode; + } tess; + }; +} shader_info; + +#ifdef __cplusplus +} +#endif + +#endif /* SHADER_INFO_H */ diff -Nru mesa-12.0.6/src/compiler/spirv/nir_spirv.h mesa-17.0.7/src/compiler/spirv/nir_spirv.h --- mesa-12.0.6/src/compiler/spirv/nir_spirv.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/spirv/nir_spirv.h 2017-06-01 10:37:10.000000000 +0000 @@ -38,13 +38,23 @@ struct nir_spirv_specialization { uint32_t id; - uint32_t data; + union { + uint32_t data32; + uint64_t data64; + }; +}; + +struct nir_spirv_supported_extensions { + bool float64; + bool image_ms_array; + bool tessellation; }; nir_function *spirv_to_nir(const uint32_t *words, size_t word_count, struct nir_spirv_specialization *specializations, unsigned num_specializations, gl_shader_stage stage, const char *entry_point_name, + const struct nir_spirv_supported_extensions *ext, const nir_shader_compiler_options *options); #ifdef __cplusplus diff -Nru mesa-12.0.6/src/compiler/spirv/spirv2nir.c mesa-17.0.7/src/compiler/spirv/spirv2nir.c --- mesa-12.0.6/src/compiler/spirv/spirv2nir.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/compiler/spirv/spirv2nir.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,80 @@ +/* + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Jason Ekstrand (jason@jlekstrand.net) + * + */ + +/* + * A simple executable that opens a SPIR-V shader, converts it to NIR, and + * dumps out the result. This should be useful for testing the + * spirv_to_nir code. + */ + +#include "spirv/nir_spirv.h" + +#include +#include +#include +#include +#include +#include +#include + +#define WORD_SIZE 4 + +int main(int argc, char **argv) +{ + int fd = open(argv[1], O_RDONLY); + if (fd < 0) + { + fprintf(stderr, "Failed to open %s\n", argv[1]); + return 1; + } + + off_t len = lseek(fd, 0, SEEK_END); + if (len % WORD_SIZE != 0) + { + fprintf(stderr, "File length isn't a multiple of the word size\n"); + fprintf(stderr, "Are you sure this is a valid SPIR-V shader?\n"); + close(fd); + return 1; + } + + size_t word_count = len / WORD_SIZE; + + const void *map = mmap(NULL, len, PROT_READ, MAP_PRIVATE, fd, 0); + if (map == MAP_FAILED) + { + fprintf(stderr, "Failed to mmap the file: errno=%d, %s\n", + errno, strerror(errno)); + close(fd); + return 1; + } + + nir_function *func = spirv_to_nir(map, word_count, NULL, 0, + MESA_SHADER_FRAGMENT, "main", NULL, NULL); + nir_print_shader(func->shader, stderr); + + return 0; +} diff -Nru mesa-12.0.6/src/compiler/spirv/spirv_to_nir.c mesa-17.0.7/src/compiler/spirv/spirv_to_nir.c --- mesa-12.0.6/src/compiler/spirv/spirv_to_nir.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/spirv/spirv_to_nir.c 2017-06-01 10:37:10.000000000 +0000 @@ -31,6 +31,14 @@ #include "nir/nir_constant_expressions.h" #include "spirv_info.h" +struct spec_constant_value { + bool is_double; + union { + uint32_t data32; + uint64_t data64; + }; +}; + void _vtn_warn(const char *file, int line, const char *msg, ...) { @@ -98,14 +106,14 @@ case GLSL_TYPE_UINT: case GLSL_TYPE_BOOL: case GLSL_TYPE_FLOAT: - case GLSL_TYPE_DOUBLE: + case GLSL_TYPE_DOUBLE: { + int bit_size = glsl_get_bit_size(type); if (glsl_type_is_vector_or_scalar(type)) { unsigned num_components = glsl_get_vector_elements(val->type); nir_load_const_instr *load = - nir_load_const_instr_create(b->shader, num_components, 32); + nir_load_const_instr_create(b->shader, num_components, bit_size); - for (unsigned i = 0; i < num_components; i++) - load->value.u32[i] = constant->value.u[i]; + load->value = constant->values[0]; nir_instr_insert_before_cf_list(&b->impl->body, &load->instr); val->def = &load->def; @@ -119,10 +127,9 @@ struct vtn_ssa_value *col_val = rzalloc(b, struct vtn_ssa_value); col_val->type = glsl_get_column_type(val->type); nir_load_const_instr *load = - nir_load_const_instr_create(b->shader, rows, 32); + nir_load_const_instr_create(b->shader, rows, bit_size); - for (unsigned j = 0; j < rows; j++) - load->value.u32[j] = constant->value.u[rows * i + j]; + load->value = constant->values[i]; nir_instr_insert_before_cf_list(&b->impl->body, &load->instr); col_val->def = &load->def; @@ -131,6 +138,7 @@ } } break; + } case GLSL_TYPE_ARRAY: { unsigned elems = glsl_get_length(val->type); @@ -478,10 +486,10 @@ case SpvDecorationUniform: break; /* FIXME: Do nothing with this for now. */ case SpvDecorationNoPerspective: - ctx->fields[member].interpolation = INTERP_QUALIFIER_NOPERSPECTIVE; + ctx->fields[member].interpolation = INTERP_MODE_NOPERSPECTIVE; break; case SpvDecorationFlat: - ctx->fields[member].interpolation = INTERP_QUALIFIER_FLAT; + ctx->fields[member].interpolation = INTERP_MODE_FLAT; break; case SpvDecorationCentroid: ctx->fields[member].centroid = true; @@ -517,7 +525,6 @@ break; case SpvDecorationPatch: - vtn_warn("Tessellation not yet supported"); break; case SpvDecorationSpecId: @@ -551,7 +558,7 @@ case SpvDecorationFPRoundingMode: case SpvDecorationFPFastMathMode: case SpvDecorationAlignment: - vtn_warn("Decoraiton only allowed for CL-style kernels: %s", + vtn_warn("Decoration only allowed for CL-style kernels: %s", spirv_decoration_to_string(dec->decoration)); break; } @@ -706,9 +713,11 @@ val->type->type = (signedness ? glsl_int_type() : glsl_uint_type()); break; } - case SpvOpTypeFloat: - val->type->type = glsl_float_type(); + case SpvOpTypeFloat: { + int bit_size = w[2]; + val->type->type = bit_size == 64 ? glsl_double_type() : glsl_float_type(); break; + } case SpvOpTypeVector: { struct vtn_type *base = vtn_value(b, w[2], vtn_value_type_type)->type; @@ -752,7 +761,7 @@ length = 0; } else { length = - vtn_value(b, w[3], vtn_value_type_constant)->constant->value.u[0]; + vtn_value(b, w[3], vtn_value_type_constant)->constant->values[0].u32[0]; } val->type->type = glsl_array_type(array_element->type, length); @@ -828,6 +837,7 @@ case SpvDimCube: dim = GLSL_SAMPLER_DIM_CUBE; break; case SpvDimRect: dim = GLSL_SAMPLER_DIM_RECT; break; case SpvDimBuffer: dim = GLSL_SAMPLER_DIM_BUF; break; + case SpvDimSubpassData: dim = GLSL_SAMPLER_DIM_SUBPASS; break; default: unreachable("Invalid SPIR-V Sampler dimension"); } @@ -854,7 +864,7 @@ val->type->type = glsl_sampler_type(dim, is_shadow, is_array, glsl_get_base_type(sampled_type)); } else if (sampled == 2) { - assert(format); + assert((dim == GLSL_SAMPLER_DIM_SUBPASS) || format); assert(!is_shadow); val->type->type = glsl_image_type(dim, is_array, glsl_get_base_type(sampled_type)); @@ -931,7 +941,7 @@ } static void -spec_constant_deocoration_cb(struct vtn_builder *b, struct vtn_value *v, +spec_constant_decoration_cb(struct vtn_builder *b, struct vtn_value *v, int member, const struct vtn_decoration *dec, void *data) { @@ -939,11 +949,14 @@ if (dec->decoration != SpvDecorationSpecId) return; - uint32_t *const_value = data; + struct spec_constant_value *const_value = data; for (unsigned i = 0; i < b->num_specializations; i++) { if (b->specializations[i].id == dec->literals[0]) { - *const_value = b->specializations[i].data; + if (const_value->is_double) + const_value->data64 = b->specializations[i].data64; + else + const_value->data32 = b->specializations[i].data32; return; } } @@ -953,8 +966,22 @@ get_specialization(struct vtn_builder *b, struct vtn_value *val, uint32_t const_value) { - vtn_foreach_decoration(b, val, spec_constant_deocoration_cb, &const_value); - return const_value; + struct spec_constant_value data; + data.is_double = false; + data.data32 = const_value; + vtn_foreach_decoration(b, val, spec_constant_decoration_cb, &data); + return data.data32; +} + +static uint64_t +get_specialization64(struct vtn_builder *b, struct vtn_value *val, + uint64_t const_value) +{ + struct spec_constant_value data; + data.is_double = true; + data.data64 = const_value; + vtn_foreach_decoration(b, val, spec_constant_decoration_cb, &data); + return data.data64; } static void @@ -971,9 +998,9 @@ assert(val->const_type == glsl_vector_type(GLSL_TYPE_UINT, 3)); - b->shader->info.cs.local_size[0] = val->constant->value.u[0]; - b->shader->info.cs.local_size[1] = val->constant->value.u[1]; - b->shader->info.cs.local_size[2] = val->constant->value.u[2]; + b->shader->info->cs.local_size[0] = val->constant->values[0].u32[0]; + b->shader->info->cs.local_size[1] = val->constant->values[0].u32[1]; + b->shader->info->cs.local_size[2] = val->constant->values[0].u32[2]; } static void @@ -986,11 +1013,11 @@ switch (opcode) { case SpvOpConstantTrue: assert(val->const_type == glsl_bool_type()); - val->constant->value.u[0] = NIR_TRUE; + val->constant->values[0].u32[0] = NIR_TRUE; break; case SpvOpConstantFalse: assert(val->const_type == glsl_bool_type()); - val->constant->value.u[0] = NIR_FALSE; + val->constant->values[0].u32[0] = NIR_FALSE; break; case SpvOpSpecConstantTrue: @@ -998,18 +1025,33 @@ assert(val->const_type == glsl_bool_type()); uint32_t int_val = get_specialization(b, val, (opcode == SpvOpSpecConstantTrue)); - val->constant->value.u[0] = int_val ? NIR_TRUE : NIR_FALSE; + val->constant->values[0].u32[0] = int_val ? NIR_TRUE : NIR_FALSE; break; } - case SpvOpConstant: + case SpvOpConstant: { assert(glsl_type_is_scalar(val->const_type)); - val->constant->value.u[0] = w[3]; + int bit_size = glsl_get_bit_size(val->const_type); + if (bit_size == 64) { + val->constant->values->u32[0] = w[3]; + val->constant->values->u32[1] = w[4]; + } else { + assert(bit_size == 32); + val->constant->values->u32[0] = w[3]; + } break; - case SpvOpSpecConstant: + } + case SpvOpSpecConstant: { assert(glsl_type_is_scalar(val->const_type)); - val->constant->value.u[0] = get_specialization(b, val, w[3]); + val->constant->values[0].u32[0] = get_specialization(b, val, w[3]); + int bit_size = glsl_get_bit_size(val->const_type); + if (bit_size == 64) + val->constant->values[0].u64[0] = + get_specialization64(b, val, vtn_u64_literal(&w[3])); + else + val->constant->values[0].u32[0] = get_specialization(b, val, w[3]); break; + } case SpvOpSpecConstantComposite: case SpvOpConstantComposite: { unsigned elem_count = count - 3; @@ -1022,21 +1064,27 @@ case GLSL_TYPE_INT: case GLSL_TYPE_FLOAT: case GLSL_TYPE_BOOL: + case GLSL_TYPE_DOUBLE: { + int bit_size = glsl_get_bit_size(val->const_type); if (glsl_type_is_matrix(val->const_type)) { - unsigned rows = glsl_get_vector_elements(val->const_type); assert(glsl_get_matrix_columns(val->const_type) == elem_count); for (unsigned i = 0; i < elem_count; i++) - for (unsigned j = 0; j < rows; j++) - val->constant->value.u[rows * i + j] = elems[i]->value.u[j]; + val->constant->values[i] = elems[i]->values[0]; } else { assert(glsl_type_is_vector(val->const_type)); assert(glsl_get_vector_elements(val->const_type) == elem_count); - for (unsigned i = 0; i < elem_count; i++) - val->constant->value.u[i] = elems[i]->value.u[0]; + for (unsigned i = 0; i < elem_count; i++) { + if (bit_size == 64) { + val->constant->values[0].u64[i] = elems[i]->values[0].u64[0]; + } else { + assert(bit_size == 32); + val->constant->values[0].u32[i] = elems[i]->values[0].u32[0]; + } + } } ralloc_free(elems); break; - + } case GLSL_TYPE_STRUCT: case GLSL_TYPE_ARRAY: ralloc_steal(val->constant, elems); @@ -1054,23 +1102,74 @@ SpvOp opcode = get_specialization(b, val, w[3]); switch (opcode) { case SpvOpVectorShuffle: { - struct vtn_value *v0 = vtn_value(b, w[4], vtn_value_type_constant); - struct vtn_value *v1 = vtn_value(b, w[5], vtn_value_type_constant); - unsigned len0 = glsl_get_vector_elements(v0->const_type); - unsigned len1 = glsl_get_vector_elements(v1->const_type); - - uint32_t u[8]; - for (unsigned i = 0; i < len0; i++) - u[i] = v0->constant->value.u[i]; - for (unsigned i = 0; i < len1; i++) - u[len0 + i] = v1->constant->value.u[i]; - - for (unsigned i = 0; i < count - 6; i++) { - uint32_t comp = w[i + 6]; - if (comp == (uint32_t)-1) { - val->constant->value.u[i] = 0xdeadbeef; - } else { - val->constant->value.u[i] = u[comp]; + struct vtn_value *v0 = &b->values[w[4]]; + struct vtn_value *v1 = &b->values[w[5]]; + + assert(v0->value_type == vtn_value_type_constant || + v0->value_type == vtn_value_type_undef); + assert(v1->value_type == vtn_value_type_constant || + v1->value_type == vtn_value_type_undef); + + unsigned len0 = v0->value_type == vtn_value_type_constant ? + glsl_get_vector_elements(v0->const_type) : + glsl_get_vector_elements(v0->type->type); + unsigned len1 = v1->value_type == vtn_value_type_constant ? + glsl_get_vector_elements(v1->const_type) : + glsl_get_vector_elements(v1->type->type); + + assert(len0 + len1 < 16); + + unsigned bit_size = glsl_get_bit_size(val->const_type); + unsigned bit_size0 = v0->value_type == vtn_value_type_constant ? + glsl_get_bit_size(v0->const_type) : + glsl_get_bit_size(v0->type->type); + unsigned bit_size1 = v1->value_type == vtn_value_type_constant ? + glsl_get_bit_size(v1->const_type) : + glsl_get_bit_size(v1->type->type); + + assert(bit_size == bit_size0 && bit_size == bit_size1); + + if (bit_size == 64) { + uint64_t u64[8]; + if (v0->value_type == vtn_value_type_constant) { + for (unsigned i = 0; i < len0; i++) + u64[i] = v0->constant->values[0].u64[i]; + } + if (v1->value_type == vtn_value_type_constant) { + for (unsigned i = 0; i < len1; i++) + u64[len0 + i] = v1->constant->values[0].u64[i]; + } + + for (unsigned i = 0, j = 0; i < count - 6; i++, j++) { + uint32_t comp = w[i + 6]; + /* If component is not used, set the value to a known constant + * to detect if it is wrongly used. + */ + if (comp == (uint32_t)-1) + val->constant->values[0].u64[j] = 0xdeadbeefdeadbeef; + else + val->constant->values[0].u64[j] = u64[comp]; + } + } else { + uint32_t u32[8]; + if (v0->value_type == vtn_value_type_constant) { + for (unsigned i = 0; i < len0; i++) + u32[i] = v0->constant->values[0].u32[i]; + } + if (v1->value_type == vtn_value_type_constant) { + for (unsigned i = 0; i < len1; i++) + u32[len0 + i] = v1->constant->values[0].u32[i]; + } + + for (unsigned i = 0, j = 0; i < count - 6; i++, j++) { + uint32_t comp = w[i + 6]; + /* If component is not used, set the value to a known constant + * to detect if it is wrongly used. + */ + if (comp == (uint32_t)-1) + val->constant->values[0].u32[j] = 0xdeadbeef; + else + val->constant->values[0].u32[j] = u32[comp]; } } break; @@ -1094,23 +1193,24 @@ } int elem = -1; + int col = 0; const struct glsl_type *type = comp->const_type; for (unsigned i = deref_start; i < count; i++) { switch (glsl_get_base_type(type)) { case GLSL_TYPE_UINT: case GLSL_TYPE_INT: case GLSL_TYPE_FLOAT: + case GLSL_TYPE_DOUBLE: case GLSL_TYPE_BOOL: /* If we hit this granularity, we're picking off an element */ - if (elem < 0) - elem = 0; - if (glsl_type_is_matrix(type)) { - elem += w[i] * glsl_get_vector_elements(type); + assert(col == 0 && elem == -1); + col = w[i]; + elem = 0; type = glsl_get_column_type(type); } else { - assert(glsl_type_is_vector(type)); - elem += w[i]; + assert(elem <= 0 && glsl_type_is_vector(type)); + elem = w[i]; type = glsl_scalar_type(glsl_get_base_type(type)); } continue; @@ -1135,8 +1235,14 @@ val->constant = *c; } else { unsigned num_components = glsl_get_vector_elements(type); + unsigned bit_size = glsl_get_bit_size(type); for (unsigned i = 0; i < num_components; i++) - val->constant->value.u[i] = (*c)->value.u[elem + i]; + if (bit_size == 64) { + val->constant->values[0].u64[i] = (*c)->values[col].u64[elem + i]; + } else { + assert(bit_size == 32); + val->constant->values[0].u32[i] = (*c)->values[col].u32[elem + i]; + } } } else { struct vtn_value *insert = @@ -1146,8 +1252,14 @@ *c = insert->constant; } else { unsigned num_components = glsl_get_vector_elements(type); + unsigned bit_size = glsl_get_bit_size(type); for (unsigned i = 0; i < num_components; i++) - (*c)->value.u[elem + i] = insert->constant->value.u[i]; + if (bit_size == 64) { + (*c)->values[col].u64[elem + i] = insert->constant->values[0].u64[i]; + } else { + assert(bit_size == 32); + (*c)->values[col].u32[elem + i] = insert->constant->values[0].u32[i]; + } } } break; @@ -1155,7 +1267,9 @@ default: { bool swap; - nir_op op = vtn_nir_alu_op_for_spirv_opcode(opcode, &swap); + nir_alu_type dst_alu_type = nir_get_nir_type_for_glsl_type(val->const_type); + nir_alu_type src_alu_type = dst_alu_type; + nir_op op = vtn_nir_alu_op_for_spirv_opcode(opcode, &swap, src_alu_type, dst_alu_type); unsigned num_components = glsl_get_vector_elements(val->const_type); unsigned bit_size = @@ -1169,16 +1283,11 @@ unsigned j = swap ? 1 - i : i; assert(bit_size == 32); - for (unsigned k = 0; k < num_components; k++) - src[j].u32[k] = c->value.u[k]; + src[j] = c->values[0]; } - nir_const_value res = nir_eval_const_opcode(op, num_components, - bit_size, src); - - for (unsigned k = 0; k < num_components; k++) - val->constant->value.u[k] = res.u32[k]; - + val->constant->values[0] = + nir_eval_const_opcode(op, num_components, bit_size, src); break; } /* default */ } @@ -1214,7 +1323,7 @@ struct vtn_value *arg = vtn_untyped_value(b, arg_id); if (arg->value_type == vtn_value_type_access_chain) { nir_deref_var *d = vtn_access_chain_to_deref(b, arg->access_chain); - call->params[i] = nir_deref_as_var(nir_copy_deref(call, &d->deref)); + call->params[i] = nir_deref_var_clone(d, call); } else { struct vtn_ssa_value *arg_ssa = vtn_ssa_value(b, arg_id); @@ -1426,7 +1535,7 @@ coord_components = 3; break; default: - assert("Invalid sampler type"); + unreachable("Invalid sampler type"); } if (is_array && texop != nir_texop_lod) @@ -1468,13 +1577,13 @@ case SpvOpImageSampleProjDrefExplicitLod: case SpvOpImageDrefGather: /* These all have an explicit depth value as their next source */ - (*p++) = vtn_tex_src(b, w[idx++], nir_tex_src_comparitor); + (*p++) = vtn_tex_src(b, w[idx++], nir_tex_src_comparator); break; case SpvOpImageGather: /* This has a component as its next source */ gather_component = - vtn_value(b, w[idx++], vtn_value_type_constant)->constant->value.u[0]; + vtn_value(b, w[idx++], vtn_value_type_constant)->constant->values[0].u32[0]; break; default: @@ -1486,6 +1595,7 @@ (*p++) = vtn_tex_src(b, w[idx++], nir_tex_src_lod); /* Now we need to handle some number of optional arguments */ + const struct vtn_ssa_value *gather_offsets = NULL; if (idx < count) { uint32_t operands = w[idx++]; @@ -1512,8 +1622,10 @@ operands & SpvImageOperandsConstOffsetMask) (*p++) = vtn_tex_src(b, w[idx++], nir_tex_src_offset); - if (operands & SpvImageOperandsConstOffsetsMask) - assert(!"Constant offsets to texture gather not yet implemented"); + if (operands & SpvImageOperandsConstOffsetsMask) { + gather_offsets = vtn_ssa_value(b, w[idx++]); + (*p++) = (nir_tex_src){}; + } if (operands & SpvImageOperandsSampleMask) { assert(texop == nir_texop_txf_ms); @@ -1547,20 +1659,23 @@ } nir_deref_var *sampler = vtn_access_chain_to_deref(b, sampled.sampler); + nir_deref_var *texture; if (sampled.image) { nir_deref_var *image = vtn_access_chain_to_deref(b, sampled.image); - instr->texture = nir_deref_as_var(nir_copy_deref(instr, &image->deref)); + texture = image; } else { - instr->texture = nir_deref_as_var(nir_copy_deref(instr, &sampler->deref)); + texture = sampler; } + instr->texture = nir_deref_var_clone(texture, instr); + switch (instr->op) { case nir_texop_tex: case nir_texop_txb: case nir_texop_txl: case nir_texop_txd: /* These operations require a sampler */ - instr->sampler = nir_deref_as_var(nir_copy_deref(instr, &sampler->deref)); + instr->sampler = nir_deref_var_clone(sampler, instr); break; case nir_texop_txf: case nir_texop_txf_ms: @@ -1583,10 +1698,105 @@ assert(glsl_get_vector_elements(ret_type->type) == nir_tex_instr_dest_size(instr)); + nir_ssa_def *def; + nir_instr *instruction; + if (gather_offsets) { + assert(glsl_get_base_type(gather_offsets->type) == GLSL_TYPE_ARRAY); + assert(glsl_get_length(gather_offsets->type) == 4); + nir_tex_instr *instrs[4] = {instr, NULL, NULL, NULL}; + + /* Copy the current instruction 4x */ + for (uint32_t i = 1; i < 4; i++) { + instrs[i] = nir_tex_instr_create(b->shader, instr->num_srcs); + instrs[i]->op = instr->op; + instrs[i]->coord_components = instr->coord_components; + instrs[i]->sampler_dim = instr->sampler_dim; + instrs[i]->is_array = instr->is_array; + instrs[i]->is_shadow = instr->is_shadow; + instrs[i]->is_new_style_shadow = instr->is_new_style_shadow; + instrs[i]->component = instr->component; + instrs[i]->dest_type = instr->dest_type; + instrs[i]->texture = nir_deref_var_clone(texture, instrs[i]); + instrs[i]->sampler = NULL; + + memcpy(instrs[i]->src, srcs, instr->num_srcs * sizeof(*instr->src)); + + nir_ssa_dest_init(&instrs[i]->instr, &instrs[i]->dest, + nir_tex_instr_dest_size(instr), 32, NULL); + } + + /* Fill in the last argument with the offset from the passed in offsets + * and insert the instruction into the stream. + */ + for (uint32_t i = 0; i < 4; i++) { + nir_tex_src src; + src.src = nir_src_for_ssa(gather_offsets->elems[i]->def); + src.src_type = nir_tex_src_offset; + instrs[i]->src[instrs[i]->num_srcs - 1] = src; + nir_builder_instr_insert(&b->nb, &instrs[i]->instr); + } + + /* Combine the results of the 4 instructions by taking their .w + * components + */ + nir_alu_instr *vec4 = nir_alu_instr_create(b->shader, nir_op_vec4); + nir_ssa_dest_init(&vec4->instr, &vec4->dest.dest, 4, 32, NULL); + vec4->dest.write_mask = 0xf; + for (uint32_t i = 0; i < 4; i++) { + vec4->src[i].src = nir_src_for_ssa(&instrs[i]->dest.ssa); + vec4->src[i].swizzle[0] = 3; + } + def = &vec4->dest.dest.ssa; + instruction = &vec4->instr; + } else { + def = &instr->dest.ssa; + instruction = &instr->instr; + } + val->ssa = vtn_create_ssa_value(b, ret_type->type); - val->ssa->def = &instr->dest.ssa; + val->ssa->def = def; - nir_builder_instr_insert(&b->nb, &instr->instr); + nir_builder_instr_insert(&b->nb, instruction); +} + +static void +fill_common_atomic_sources(struct vtn_builder *b, SpvOp opcode, + const uint32_t *w, nir_src *src) +{ + switch (opcode) { + case SpvOpAtomicIIncrement: + src[0] = nir_src_for_ssa(nir_imm_int(&b->nb, 1)); + break; + + case SpvOpAtomicIDecrement: + src[0] = nir_src_for_ssa(nir_imm_int(&b->nb, -1)); + break; + + case SpvOpAtomicISub: + src[0] = + nir_src_for_ssa(nir_ineg(&b->nb, vtn_ssa_value(b, w[6])->def)); + break; + + case SpvOpAtomicCompareExchange: + src[0] = nir_src_for_ssa(vtn_ssa_value(b, w[8])->def); + src[1] = nir_src_for_ssa(vtn_ssa_value(b, w[7])->def); + break; + + case SpvOpAtomicExchange: + case SpvOpAtomicIAdd: + case SpvOpAtomicSMin: + case SpvOpAtomicUMin: + case SpvOpAtomicSMax: + case SpvOpAtomicUMax: + case SpvOpAtomicAnd: + case SpvOpAtomicOr: + case SpvOpAtomicXor: + src[0] = nir_src_for_ssa(vtn_ssa_value(b, w[6])->def); + break; + + default: + unreachable("Invalid SPIR-V atomic"); + } } static nir_ssa_def * @@ -1630,6 +1840,7 @@ case SpvOpAtomicIDecrement: case SpvOpAtomicIAdd: case SpvOpAtomicISub: + case SpvOpAtomicLoad: case SpvOpAtomicSMin: case SpvOpAtomicUMin: case SpvOpAtomicSMax: @@ -1640,6 +1851,10 @@ image = *vtn_value(b, w[3], vtn_value_type_image_pointer)->image; break; + case SpvOpAtomicStore: + image = *vtn_value(b, w[1], vtn_value_type_image_pointer)->image; + break; + case SpvOpImageQuerySize: image.image = vtn_value(b, w[3], vtn_value_type_access_chain)->access_chain; @@ -1685,6 +1900,8 @@ OP(ImageQuerySize, size) OP(ImageRead, load) OP(ImageWrite, store) + OP(AtomicLoad, load) + OP(AtomicStore, store) OP(AtomicExchange, atomic_exchange) OP(AtomicCompareExchange, atomic_comp_swap) OP(AtomicIIncrement, atomic_add) @@ -1706,8 +1923,7 @@ nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(b->shader, op); nir_deref_var *image_deref = vtn_access_chain_to_deref(b, image.image); - intrin->variables[0] = - nir_deref_as_var(nir_copy_deref(&intrin->instr, &image_deref->deref)); + intrin->variables[0] = nir_deref_var_clone(image_deref, intrin); /* ImageQuerySize doesn't take any extra parameters */ if (opcode != SpvOpImageQuerySize) { @@ -1723,19 +1939,19 @@ } switch (opcode) { + case SpvOpAtomicLoad: case SpvOpImageQuerySize: case SpvOpImageRead: break; + case SpvOpAtomicStore: + intrin->src[2] = nir_src_for_ssa(vtn_ssa_value(b, w[4])->def); + break; case SpvOpImageWrite: intrin->src[2] = nir_src_for_ssa(vtn_ssa_value(b, w[3])->def); break; + case SpvOpAtomicIIncrement: - intrin->src[2] = nir_src_for_ssa(nir_imm_int(&b->nb, 1)); - break; case SpvOpAtomicIDecrement: - intrin->src[2] = nir_src_for_ssa(nir_imm_int(&b->nb, -1)); - break; - case SpvOpAtomicExchange: case SpvOpAtomicIAdd: case SpvOpAtomicSMin: @@ -1745,16 +1961,7 @@ case SpvOpAtomicAnd: case SpvOpAtomicOr: case SpvOpAtomicXor: - intrin->src[2] = nir_src_for_ssa(vtn_ssa_value(b, w[6])->def); - break; - - case SpvOpAtomicCompareExchange: - intrin->src[2] = nir_src_for_ssa(vtn_ssa_value(b, w[8])->def); - intrin->src[3] = nir_src_for_ssa(vtn_ssa_value(b, w[7])->def); - break; - - case SpvOpAtomicISub: - intrin->src[2] = nir_src_for_ssa(nir_ineg(&b->nb, vtn_ssa_value(b, w[6])->def)); + fill_common_atomic_sources(b, opcode, w, &intrin->src[2]); break; default: @@ -1784,6 +1991,8 @@ get_ssbo_nir_atomic_op(SpvOp opcode) { switch (opcode) { + case SpvOpAtomicLoad: return nir_intrinsic_load_ssbo; + case SpvOpAtomicStore: return nir_intrinsic_store_ssbo; #define OP(S, N) case SpvOp##S: return nir_intrinsic_ssbo_##N; OP(AtomicExchange, atomic_exchange) OP(AtomicCompareExchange, atomic_comp_swap) @@ -1808,6 +2017,8 @@ get_shared_nir_atomic_op(SpvOp opcode) { switch (opcode) { + case SpvOpAtomicLoad: return nir_intrinsic_load_var; + case SpvOpAtomicStore: return nir_intrinsic_store_var; #define OP(S, N) case SpvOp##S: return nir_intrinsic_var_##N; OP(AtomicExchange, atomic_exchange) OP(AtomicCompareExchange, atomic_comp_swap) @@ -1829,31 +2040,21 @@ } static void -fill_common_atomic_sources(struct vtn_builder *b, SpvOp opcode, - const uint32_t *w, nir_src *src) +vtn_handle_ssbo_or_shared_atomic(struct vtn_builder *b, SpvOp opcode, + const uint32_t *w, unsigned count) { + struct vtn_access_chain *chain; + nir_intrinsic_instr *atomic; + switch (opcode) { + case SpvOpAtomicLoad: + case SpvOpAtomicExchange: + case SpvOpAtomicCompareExchange: + case SpvOpAtomicCompareExchangeWeak: case SpvOpAtomicIIncrement: - src[0] = nir_src_for_ssa(nir_imm_int(&b->nb, 1)); - break; - case SpvOpAtomicIDecrement: - src[0] = nir_src_for_ssa(nir_imm_int(&b->nb, -1)); - break; - - case SpvOpAtomicISub: - src[0] = - nir_src_for_ssa(nir_ineg(&b->nb, vtn_ssa_value(b, w[6])->def)); - break; - - case SpvOpAtomicCompareExchange: - src[0] = nir_src_for_ssa(vtn_ssa_value(b, w[8])->def); - src[1] = nir_src_for_ssa(vtn_ssa_value(b, w[7])->def); - break; - /* Fall through */ - - case SpvOpAtomicExchange: case SpvOpAtomicIAdd: + case SpvOpAtomicISub: case SpvOpAtomicSMin: case SpvOpAtomicUMin: case SpvOpAtomicSMax: @@ -1861,21 +2062,18 @@ case SpvOpAtomicAnd: case SpvOpAtomicOr: case SpvOpAtomicXor: - src[0] = nir_src_for_ssa(vtn_ssa_value(b, w[6])->def); + chain = + vtn_value(b, w[3], vtn_value_type_access_chain)->access_chain; + break; + + case SpvOpAtomicStore: + chain = + vtn_value(b, w[1], vtn_value_type_access_chain)->access_chain; break; default: unreachable("Invalid SPIR-V atomic"); } -} - -static void -vtn_handle_ssbo_or_shared_atomic(struct vtn_builder *b, SpvOp opcode, - const uint32_t *w, unsigned count) -{ - struct vtn_access_chain *chain = - vtn_value(b, w[3], vtn_value_type_access_chain)->access_chain; - nir_intrinsic_instr *atomic; /* SpvScope scope = w[4]; @@ -1883,11 +2081,44 @@ */ if (chain->var->mode == vtn_variable_mode_workgroup) { - nir_deref *deref = &vtn_access_chain_to_deref(b, chain)->deref; + struct vtn_type *type = chain->var->type; + nir_deref_var *deref = vtn_access_chain_to_deref(b, chain); nir_intrinsic_op op = get_shared_nir_atomic_op(opcode); atomic = nir_intrinsic_instr_create(b->nb.shader, op); - atomic->variables[0] = nir_deref_as_var(nir_copy_deref(atomic, deref)); - fill_common_atomic_sources(b, opcode, w, &atomic->src[0]); + atomic->variables[0] = nir_deref_var_clone(deref, atomic); + + switch (opcode) { + case SpvOpAtomicLoad: + atomic->num_components = glsl_get_vector_elements(type->type); + break; + + case SpvOpAtomicStore: + atomic->num_components = glsl_get_vector_elements(type->type); + nir_intrinsic_set_write_mask(atomic, (1 << atomic->num_components) - 1); + atomic->src[0] = nir_src_for_ssa(vtn_ssa_value(b, w[4])->def); + break; + + case SpvOpAtomicExchange: + case SpvOpAtomicCompareExchange: + case SpvOpAtomicCompareExchangeWeak: + case SpvOpAtomicIIncrement: + case SpvOpAtomicIDecrement: + case SpvOpAtomicIAdd: + case SpvOpAtomicISub: + case SpvOpAtomicSMin: + case SpvOpAtomicUMin: + case SpvOpAtomicSMax: + case SpvOpAtomicUMax: + case SpvOpAtomicAnd: + case SpvOpAtomicOr: + case SpvOpAtomicXor: + fill_common_atomic_sources(b, opcode, w, &atomic->src[0]); + break; + + default: + unreachable("Invalid SPIR-V atomic"); + + } } else { assert(chain->var->mode == vtn_variable_mode_ssbo); struct vtn_type *type; @@ -1897,18 +2128,58 @@ nir_intrinsic_op op = get_ssbo_nir_atomic_op(opcode); atomic = nir_intrinsic_instr_create(b->nb.shader, op); - atomic->src[0] = nir_src_for_ssa(index); - atomic->src[1] = nir_src_for_ssa(offset); - fill_common_atomic_sources(b, opcode, w, &atomic->src[2]); + + switch (opcode) { + case SpvOpAtomicLoad: + atomic->num_components = glsl_get_vector_elements(type->type); + atomic->src[0] = nir_src_for_ssa(index); + atomic->src[1] = nir_src_for_ssa(offset); + break; + + case SpvOpAtomicStore: + atomic->num_components = glsl_get_vector_elements(type->type); + nir_intrinsic_set_write_mask(atomic, (1 << atomic->num_components) - 1); + atomic->src[0] = nir_src_for_ssa(vtn_ssa_value(b, w[4])->def); + atomic->src[1] = nir_src_for_ssa(index); + atomic->src[2] = nir_src_for_ssa(offset); + break; + + case SpvOpAtomicExchange: + case SpvOpAtomicCompareExchange: + case SpvOpAtomicCompareExchangeWeak: + case SpvOpAtomicIIncrement: + case SpvOpAtomicIDecrement: + case SpvOpAtomicIAdd: + case SpvOpAtomicISub: + case SpvOpAtomicSMin: + case SpvOpAtomicUMin: + case SpvOpAtomicSMax: + case SpvOpAtomicUMax: + case SpvOpAtomicAnd: + case SpvOpAtomicOr: + case SpvOpAtomicXor: + atomic->src[0] = nir_src_for_ssa(index); + atomic->src[1] = nir_src_for_ssa(offset); + fill_common_atomic_sources(b, opcode, w, &atomic->src[2]); + break; + + default: + unreachable("Invalid SPIR-V atomic"); + } } - nir_ssa_dest_init(&atomic->instr, &atomic->dest, 1, 32, NULL); + if (opcode != SpvOpAtomicStore) { + struct vtn_type *type = vtn_value(b, w[1], vtn_value_type_type)->type; - struct vtn_type *type = vtn_value(b, w[1], vtn_value_type_type)->type; - struct vtn_value *val = vtn_push_value(b, w[2], vtn_value_type_ssa); - val->ssa = rzalloc(b, struct vtn_ssa_value); - val->ssa->def = &atomic->dest.ssa; - val->ssa->type = type->type; + nir_ssa_dest_init(&atomic->instr, &atomic->dest, + glsl_get_vector_elements(type->type), + glsl_get_bit_size(type->type), NULL); + + struct vtn_value *val = vtn_push_value(b, w[2], vtn_value_type_ssa); + val->ssa = rzalloc(b, struct vtn_ssa_value); + val->ssa->def = &atomic->dest.ssa; + val->ssa->type = type->type; + } nir_builder_instr_insert(&b->nb, &atomic->instr); } @@ -2305,6 +2576,12 @@ } } +#define spv_check_supported(name, cap) do { \ + if (!(b->ext && b->ext->name)) \ + vtn_warn("Unsupported SPIR-V capability: %s", \ + spirv_capability_to_string(cap)); \ + } while(0) + static bool vtn_handle_preamble_instruction(struct vtn_builder *b, SpvOp opcode, const uint32_t *w, unsigned count) @@ -2339,32 +2616,28 @@ case SpvCapabilityDerivativeControl: case SpvCapabilityInterpolationFunction: case SpvCapabilityMultiViewport: - break; - + case SpvCapabilitySampleRateShading: case SpvCapabilityClipDistance: case SpvCapabilityCullDistance: + case SpvCapabilityInputAttachment: + case SpvCapabilityImageGatherExtended: + case SpvCapabilityStorageImageExtendedFormats: + break; + case SpvCapabilityGeometryStreams: - case SpvCapabilityTessellation: - case SpvCapabilityTessellationPointSize: case SpvCapabilityLinkage: case SpvCapabilityVector16: case SpvCapabilityFloat16Buffer: case SpvCapabilityFloat16: - case SpvCapabilityFloat64: case SpvCapabilityInt64: case SpvCapabilityInt64Atomics: case SpvCapabilityAtomicStorage: case SpvCapabilityInt16: - case SpvCapabilityImageGatherExtended: case SpvCapabilityStorageImageMultisample: case SpvCapabilityImageCubeArray: - case SpvCapabilitySampleRateShading: case SpvCapabilityInt8: - case SpvCapabilityInputAttachment: case SpvCapabilitySparseResidency: case SpvCapabilityMinLod: - case SpvCapabilityImageMSArray: - case SpvCapabilityStorageImageExtendedFormats: case SpvCapabilityTransformFeedback: case SpvCapabilityStorageImageReadWithoutFormat: case SpvCapabilityStorageImageWriteWithoutFormat: @@ -2372,6 +2645,10 @@ spirv_capability_to_string(cap)); break; + case SpvCapabilityFloat64: + spv_check_supported(float64, cap); + break; + case SpvCapabilityAddresses: case SpvCapabilityKernel: case SpvCapabilityImageBasic: @@ -2385,6 +2662,15 @@ vtn_warn("Unsupported OpenCL-style SPIR-V capability: %s", spirv_capability_to_string(cap)); break; + + case SpvCapabilityImageMSArray: + spv_check_supported(image_ms_array, cap); + break; + + case SpvCapabilityTessellation: + case SpvCapabilityTessellationPointSize: + spv_check_supported(tessellation, cap); + break; } break; } @@ -2457,43 +2743,48 @@ case SpvExecutionModeEarlyFragmentTests: assert(b->shader->stage == MESA_SHADER_FRAGMENT); - b->shader->info.fs.early_fragment_tests = true; + b->shader->info->fs.early_fragment_tests = true; break; case SpvExecutionModeInvocations: assert(b->shader->stage == MESA_SHADER_GEOMETRY); - b->shader->info.gs.invocations = MAX2(1, mode->literals[0]); + b->shader->info->gs.invocations = MAX2(1, mode->literals[0]); break; case SpvExecutionModeDepthReplacing: assert(b->shader->stage == MESA_SHADER_FRAGMENT); - b->shader->info.fs.depth_layout = FRAG_DEPTH_LAYOUT_ANY; + b->shader->info->fs.depth_layout = FRAG_DEPTH_LAYOUT_ANY; break; case SpvExecutionModeDepthGreater: assert(b->shader->stage == MESA_SHADER_FRAGMENT); - b->shader->info.fs.depth_layout = FRAG_DEPTH_LAYOUT_GREATER; + b->shader->info->fs.depth_layout = FRAG_DEPTH_LAYOUT_GREATER; break; case SpvExecutionModeDepthLess: assert(b->shader->stage == MESA_SHADER_FRAGMENT); - b->shader->info.fs.depth_layout = FRAG_DEPTH_LAYOUT_LESS; + b->shader->info->fs.depth_layout = FRAG_DEPTH_LAYOUT_LESS; break; case SpvExecutionModeDepthUnchanged: assert(b->shader->stage == MESA_SHADER_FRAGMENT); - b->shader->info.fs.depth_layout = FRAG_DEPTH_LAYOUT_UNCHANGED; + b->shader->info->fs.depth_layout = FRAG_DEPTH_LAYOUT_UNCHANGED; break; case SpvExecutionModeLocalSize: assert(b->shader->stage == MESA_SHADER_COMPUTE); - b->shader->info.cs.local_size[0] = mode->literals[0]; - b->shader->info.cs.local_size[1] = mode->literals[1]; - b->shader->info.cs.local_size[2] = mode->literals[2]; + b->shader->info->cs.local_size[0] = mode->literals[0]; + b->shader->info->cs.local_size[1] = mode->literals[1]; + b->shader->info->cs.local_size[2] = mode->literals[2]; break; case SpvExecutionModeLocalSizeHint: - break; /* Nothing do do with this */ + break; /* Nothing to do with this */ case SpvExecutionModeOutputVertices: - assert(b->shader->stage == MESA_SHADER_GEOMETRY); - b->shader->info.gs.vertices_out = mode->literals[0]; + if (b->shader->stage == MESA_SHADER_TESS_CTRL || + b->shader->stage == MESA_SHADER_TESS_EVAL) { + b->shader->info->tess.tcs_vertices_out = mode->literals[0]; + } else { + assert(b->shader->stage == MESA_SHADER_GEOMETRY); + b->shader->info->gs.vertices_out = mode->literals[0]; + } break; case SpvExecutionModeInputPoints: @@ -2503,11 +2794,14 @@ case SpvExecutionModeInputTrianglesAdjacency: case SpvExecutionModeQuads: case SpvExecutionModeIsolines: - if (b->shader->stage == MESA_SHADER_GEOMETRY) { - b->shader->info.gs.vertices_in = - vertices_in_from_spv_execution_mode(mode->exec_mode); + if (b->shader->stage == MESA_SHADER_TESS_CTRL || + b->shader->stage == MESA_SHADER_TESS_EVAL) { + b->shader->info->tess.primitive_mode = + gl_primitive_from_spv_execution_mode(mode->exec_mode); } else { - assert(!"Tesselation shaders not yet supported"); + assert(b->shader->stage == MESA_SHADER_GEOMETRY); + b->shader->info->gs.vertices_in = + vertices_in_from_spv_execution_mode(mode->exec_mode); } break; @@ -2515,17 +2809,44 @@ case SpvExecutionModeOutputLineStrip: case SpvExecutionModeOutputTriangleStrip: assert(b->shader->stage == MESA_SHADER_GEOMETRY); - b->shader->info.gs.output_primitive = + b->shader->info->gs.output_primitive = gl_primitive_from_spv_execution_mode(mode->exec_mode); break; case SpvExecutionModeSpacingEqual: + assert(b->shader->stage == MESA_SHADER_TESS_CTRL || + b->shader->stage == MESA_SHADER_TESS_EVAL); + b->shader->info->tess.spacing = TESS_SPACING_EQUAL; + break; case SpvExecutionModeSpacingFractionalEven: + assert(b->shader->stage == MESA_SHADER_TESS_CTRL || + b->shader->stage == MESA_SHADER_TESS_EVAL); + b->shader->info->tess.spacing = TESS_SPACING_FRACTIONAL_EVEN; + break; case SpvExecutionModeSpacingFractionalOdd: + assert(b->shader->stage == MESA_SHADER_TESS_CTRL || + b->shader->stage == MESA_SHADER_TESS_EVAL); + b->shader->info->tess.spacing = TESS_SPACING_FRACTIONAL_ODD; + break; case SpvExecutionModeVertexOrderCw: + assert(b->shader->stage == MESA_SHADER_TESS_CTRL || + b->shader->stage == MESA_SHADER_TESS_EVAL); + /* Vulkan's notion of CCW seems to match the hardware backends, + * but be the opposite of OpenGL. Currently NIR follows GL semantics, + * so we set it backwards here. + */ + b->shader->info->tess.ccw = true; + break; case SpvExecutionModeVertexOrderCcw: + assert(b->shader->stage == MESA_SHADER_TESS_CTRL || + b->shader->stage == MESA_SHADER_TESS_EVAL); + /* Backwards; see above */ + b->shader->info->tess.ccw = false; + break; case SpvExecutionModePointMode: - assert(!"TODO: Add tessellation metadata"); + assert(b->shader->stage == MESA_SHADER_TESS_CTRL || + b->shader->stage == MESA_SHADER_TESS_EVAL); + b->shader->info->tess.point_mode = true; break; case SpvExecutionModePixelCenterInteger: @@ -2604,6 +2925,7 @@ vtn_handle_constant(b, opcode, w, count); break; + case SpvOpUndef: case SpvOpVariable: vtn_handle_variables(b, opcode, w, count); break; @@ -2690,6 +3012,7 @@ break; } + case SpvOpAtomicLoad: case SpvOpAtomicExchange: case SpvOpAtomicCompareExchange: case SpvOpAtomicCompareExchangeWeak: @@ -2714,6 +3037,17 @@ break; } + case SpvOpAtomicStore: { + struct vtn_value *pointer = vtn_untyped_value(b, w[1]); + if (pointer->value_type == vtn_value_type_image_pointer) { + vtn_handle_image(b, opcode, w, count); + } else { + assert(pointer->value_type == vtn_value_type_access_chain); + vtn_handle_ssbo_or_shared_atomic(b, opcode, w, count); + } + break; + } + case SpvOpSNegate: case SpvOpFNegate: case SpvOpNot: @@ -2847,6 +3181,7 @@ spirv_to_nir(const uint32_t *words, size_t word_count, struct nir_spirv_specialization *spec, unsigned num_spec, gl_shader_stage stage, const char *entry_point_name, + const struct nir_spirv_supported_extensions *ext, const nir_shader_compiler_options *options) { const uint32_t *word_end = words + word_count; @@ -2869,6 +3204,7 @@ exec_list_make_empty(&b->functions); b->entry_point_stage = stage; b->entry_point_name = entry_point_name; + b->ext = ext; /* Handle all the preamble instructions */ words = vtn_foreach_instruction(b, words, word_end, @@ -2880,10 +3216,10 @@ return NULL; } - b->shader = nir_shader_create(NULL, stage, options); + b->shader = nir_shader_create(NULL, stage, options, NULL); /* Set shader info defaults */ - b->shader->info.gs.invocations = 1; + b->shader->info->gs.invocations = 1; /* Parse execution modes */ vtn_foreach_execution_mode(b, b->entry_point, diff -Nru mesa-12.0.6/src/compiler/spirv/vtn_alu.c mesa-17.0.7/src/compiler/spirv/vtn_alu.c --- mesa-12.0.6/src/compiler/spirv/vtn_alu.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/spirv/vtn_alu.c 2017-06-01 10:37:10.000000000 +0000 @@ -211,7 +211,8 @@ } nir_op -vtn_nir_alu_op_for_spirv_opcode(SpvOp opcode, bool *swap) +vtn_nir_alu_op_for_spirv_opcode(SpvOp opcode, bool *swap, + nir_alu_type src, nir_alu_type dst) { /* Indicates that the first two arguments should be swapped. This is * used for implementing greater-than and less-than-or-equal. @@ -257,7 +258,10 @@ case SpvOpBitReverse: return nir_op_bitfield_reverse; case SpvOpBitCount: return nir_op_bit_count; - /* Comparisons: (TODO: How do we want to handled ordered/unordered?) */ + /* The ordered / unordered operators need special implementation besides + * the logical operator to use since they also need to check if operands are + * ordered. + */ case SpvOpFOrdEqual: return nir_op_feq; case SpvOpFUnordEqual: return nir_op_feq; case SpvOpINotEqual: return nir_op_ine; @@ -281,16 +285,16 @@ case SpvOpFUnordGreaterThanEqual: return nir_op_fge; /* Conversions: */ - case SpvOpConvertFToU: return nir_op_f2u; - case SpvOpConvertFToS: return nir_op_f2i; - case SpvOpConvertSToF: return nir_op_i2f; - case SpvOpConvertUToF: return nir_op_u2f; case SpvOpBitcast: return nir_op_imov; case SpvOpUConvert: case SpvOpQuantizeToF16: return nir_op_fquantize2f16; - /* TODO: NIR is 32-bit only; these are no-ops. */ - case SpvOpSConvert: return nir_op_imov; - case SpvOpFConvert: return nir_op_fmov; + case SpvOpConvertFToU: + case SpvOpConvertFToS: + case SpvOpConvertSToF: + case SpvOpConvertUToF: + case SpvOpSConvert: + case SpvOpFConvert: + return nir_type_conversion_op(src, dst); /* Derivatives: */ case SpvOpDPdx: return nir_op_fddx; @@ -447,9 +451,63 @@ nir_imm_float(&b->nb, INFINITY)); break; + case SpvOpFUnordEqual: + case SpvOpFUnordNotEqual: + case SpvOpFUnordLessThan: + case SpvOpFUnordGreaterThan: + case SpvOpFUnordLessThanEqual: + case SpvOpFUnordGreaterThanEqual: { + bool swap; + nir_alu_type src_alu_type = nir_get_nir_type_for_glsl_type(vtn_src[0]->type); + nir_alu_type dst_alu_type = nir_get_nir_type_for_glsl_type(type); + nir_op op = vtn_nir_alu_op_for_spirv_opcode(opcode, &swap, src_alu_type, dst_alu_type); + + if (swap) { + nir_ssa_def *tmp = src[0]; + src[0] = src[1]; + src[1] = tmp; + } + + val->ssa->def = + nir_ior(&b->nb, + nir_build_alu(&b->nb, op, src[0], src[1], NULL, NULL), + nir_ior(&b->nb, + nir_fne(&b->nb, src[0], src[0]), + nir_fne(&b->nb, src[1], src[1]))); + break; + } + + case SpvOpFOrdEqual: + case SpvOpFOrdNotEqual: + case SpvOpFOrdLessThan: + case SpvOpFOrdGreaterThan: + case SpvOpFOrdLessThanEqual: + case SpvOpFOrdGreaterThanEqual: { + bool swap; + nir_alu_type src_alu_type = nir_get_nir_type_for_glsl_type(vtn_src[0]->type); + nir_alu_type dst_alu_type = nir_get_nir_type_for_glsl_type(type); + nir_op op = vtn_nir_alu_op_for_spirv_opcode(opcode, &swap, src_alu_type, dst_alu_type); + + if (swap) { + nir_ssa_def *tmp = src[0]; + src[0] = src[1]; + src[1] = tmp; + } + + val->ssa->def = + nir_iand(&b->nb, + nir_build_alu(&b->nb, op, src[0], src[1], NULL, NULL), + nir_iand(&b->nb, + nir_feq(&b->nb, src[0], src[0]), + nir_feq(&b->nb, src[1], src[1]))); + break; + } + default: { bool swap; - nir_op op = vtn_nir_alu_op_for_spirv_opcode(opcode, &swap); + nir_alu_type src_alu_type = nir_get_nir_type_for_glsl_type(vtn_src[0]->type); + nir_alu_type dst_alu_type = nir_get_nir_type_for_glsl_type(type); + nir_op op = vtn_nir_alu_op_for_spirv_opcode(opcode, &swap, src_alu_type, dst_alu_type); if (swap) { nir_ssa_def *tmp = src[0]; diff -Nru mesa-12.0.6/src/compiler/spirv/vtn_glsl450.c mesa-17.0.7/src/compiler/spirv/vtn_glsl450.c --- mesa-12.0.6/src/compiler/spirv/vtn_glsl450.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/spirv/vtn_glsl450.c 2017-06-01 10:37:10.000000000 +0000 @@ -399,11 +399,13 @@ case GLSLstd450PackSnorm2x16: return nir_op_pack_snorm_2x16; case GLSLstd450PackUnorm2x16: return nir_op_pack_unorm_2x16; case GLSLstd450PackHalf2x16: return nir_op_pack_half_2x16; + case GLSLstd450PackDouble2x32: return nir_op_pack_double_2x32; case GLSLstd450UnpackSnorm4x8: return nir_op_unpack_snorm_4x8; case GLSLstd450UnpackUnorm4x8: return nir_op_unpack_unorm_4x8; case GLSLstd450UnpackSnorm2x16: return nir_op_unpack_snorm_2x16; case GLSLstd450UnpackUnorm2x16: return nir_op_unpack_unorm_2x16; case GLSLstd450UnpackHalf2x16: return nir_op_unpack_half_2x16; + case GLSLstd450UnpackDouble2x32: return nir_op_unpack_double_2x32; default: unreachable("No NIR equivalent"); @@ -565,16 +567,21 @@ build_exp(nb, nir_fneg(nb, src[0])))); return; - case GLSLstd450Tanh: - /* (0.5 * (e^x - e^(-x))) / (0.5 * (e^x + e^(-x))) */ - val->ssa->def = - nir_fdiv(nb, nir_fmul(nb, nir_imm_float(nb, 0.5f), - nir_fsub(nb, build_exp(nb, src[0]), - build_exp(nb, nir_fneg(nb, src[0])))), - nir_fmul(nb, nir_imm_float(nb, 0.5f), - nir_fadd(nb, build_exp(nb, src[0]), - build_exp(nb, nir_fneg(nb, src[0]))))); + case GLSLstd450Tanh: { + /* tanh(x) := (0.5 * (e^x - e^(-x))) / (0.5 * (e^x + e^(-x))) + * + * With a little algebra this reduces to (e^2x - 1) / (e^2x + 1) + * + * We clamp x to (-inf, +10] to avoid precision problems. When x > 10, + * e^2x is so much larger than 1.0 that 1.0 gets flushed to zero in the + * computation e^2x +/- 1 so it can be ignored. + */ + nir_ssa_def *x = nir_fmin(nb, src[0], nir_imm_float(nb, 10)); + nir_ssa_def *exp2x = build_exp(nb, nir_fmul(nb, x, nir_imm_float(nb, 2))); + val->ssa->def = nir_fdiv(nb, nir_fsub(nb, exp2x, nir_imm_float(nb, 1)), + nir_fadd(nb, exp2x, nir_imm_float(nb, 1))); return; + } case GLSLstd450Asinh: val->ssa->def = nir_fmul(nb, nir_fsign(nb, src[0]), @@ -634,6 +641,56 @@ } } +static void +handle_glsl450_interpolation(struct vtn_builder *b, enum GLSLstd450 opcode, + const uint32_t *w, unsigned count) +{ + const struct glsl_type *dest_type = + vtn_value(b, w[1], vtn_value_type_type)->type->type; + + struct vtn_value *val = vtn_push_value(b, w[2], vtn_value_type_ssa); + val->ssa = vtn_create_ssa_value(b, dest_type); + + nir_intrinsic_op op; + switch (opcode) { + case GLSLstd450InterpolateAtCentroid: + op = nir_intrinsic_interp_var_at_centroid; + break; + case GLSLstd450InterpolateAtSample: + op = nir_intrinsic_interp_var_at_sample; + break; + case GLSLstd450InterpolateAtOffset: + op = nir_intrinsic_interp_var_at_offset; + break; + default: + unreachable("Invalid opcode"); + } + + nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(b->nb.shader, op); + + nir_deref_var *deref = vtn_nir_deref(b, w[5]); + intrin->variables[0] = nir_deref_var_clone(deref, intrin); + + switch (opcode) { + case GLSLstd450InterpolateAtCentroid: + break; + case GLSLstd450InterpolateAtSample: + case GLSLstd450InterpolateAtOffset: + intrin->src[0] = nir_src_for_ssa(vtn_ssa_value(b, w[6])->def); + break; + default: + unreachable("Invalid opcode"); + } + + intrin->num_components = glsl_get_vector_elements(dest_type); + nir_ssa_dest_init(&intrin->instr, &intrin->dest, + glsl_get_vector_elements(dest_type), + glsl_get_bit_size(dest_type), NULL); + val->ssa->def = &intrin->dest.ssa; + + nir_builder_instr_insert(&b->nb, &intrin->instr); +} + bool vtn_handle_glsl450_instruction(struct vtn_builder *b, uint32_t ext_opcode, const uint32_t *w, unsigned count) @@ -656,7 +713,8 @@ case GLSLstd450InterpolateAtCentroid: case GLSLstd450InterpolateAtSample: case GLSLstd450InterpolateAtOffset: - unreachable("Unhandled opcode"); + handle_glsl450_interpolation(b, ext_opcode, w, count); + break; default: handle_glsl450_alu(b, (enum GLSLstd450)ext_opcode, w, count); diff -Nru mesa-12.0.6/src/compiler/spirv/vtn_private.h mesa-17.0.7/src/compiler/spirv/vtn_private.h --- mesa-12.0.6/src/compiler/spirv/vtn_private.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/spirv/vtn_private.h 2017-06-01 10:37:10.000000000 +0000 @@ -279,6 +279,8 @@ unsigned descriptor_set; unsigned binding; + unsigned input_attachment_index; + bool patch; nir_variable *var; nir_variable **members; @@ -346,6 +348,7 @@ nir_shader *shader; nir_function_impl *impl; + const struct nir_spirv_supported_extensions *ext; struct vtn_block *block; /* Current file, line, and column. Useful for debugging. Set @@ -479,10 +482,17 @@ void vtn_foreach_execution_mode(struct vtn_builder *b, struct vtn_value *value, vtn_execution_mode_foreach_cb cb, void *data); -nir_op vtn_nir_alu_op_for_spirv_opcode(SpvOp opcode, bool *swap); +nir_op vtn_nir_alu_op_for_spirv_opcode(SpvOp opcode, bool *swap, + nir_alu_type src, nir_alu_type dst); void vtn_handle_alu(struct vtn_builder *b, SpvOp opcode, const uint32_t *w, unsigned count); bool vtn_handle_glsl450_instruction(struct vtn_builder *b, uint32_t ext_opcode, const uint32_t *words, unsigned count); + +static inline uint64_t +vtn_u64_literal(const uint32_t *w) +{ + return (uint64_t)w[1] << 32 | w[0]; +} diff -Nru mesa-12.0.6/src/compiler/spirv/vtn_variables.c mesa-17.0.7/src/compiler/spirv/vtn_variables.c --- mesa-12.0.6/src/compiler/spirv/vtn_variables.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/compiler/spirv/vtn_variables.c 2017-06-01 10:37:10.000000000 +0000 @@ -35,7 +35,8 @@ struct vtn_access_chain *chain; unsigned new_len = old->length + new_ids; - chain = ralloc_size(b, sizeof(*chain) + new_len * sizeof(chain->link[0])); + /* TODO: don't use rzalloc */ + chain = rzalloc_size(b, sizeof(*chain) + new_len * sizeof(chain->link[0])); chain->var = old->var; chain->length = new_len; @@ -185,8 +186,7 @@ nir_intrinsic_store_var; nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(b->shader, op); - intrin->variables[0] = - nir_deref_as_var(nir_copy_deref(intrin, &deref->deref)); + intrin->variables[0] = nir_deref_var_clone(deref, intrin); intrin->num_components = glsl_get_vector_elements(tail->type); if (load) { @@ -385,9 +385,86 @@ return offset; } +/* Tries to compute the size of an interface block based on the strides and + * offsets that are provided to us in the SPIR-V source. + */ +static unsigned +vtn_type_block_size(struct vtn_type *type) +{ + enum glsl_base_type base_type = glsl_get_base_type(type->type); + switch (base_type) { + case GLSL_TYPE_UINT: + case GLSL_TYPE_INT: + case GLSL_TYPE_FLOAT: + case GLSL_TYPE_BOOL: + case GLSL_TYPE_DOUBLE: { + unsigned cols = type->row_major ? glsl_get_vector_elements(type->type) : + glsl_get_matrix_columns(type->type); + if (cols > 1) { + assert(type->stride > 0); + return type->stride * cols; + } else if (base_type == GLSL_TYPE_DOUBLE) { + return glsl_get_vector_elements(type->type) * 8; + } else { + return glsl_get_vector_elements(type->type) * 4; + } + } + + case GLSL_TYPE_STRUCT: + case GLSL_TYPE_INTERFACE: { + unsigned size = 0; + unsigned num_fields = glsl_get_length(type->type); + for (unsigned f = 0; f < num_fields; f++) { + unsigned field_end = type->offsets[f] + + vtn_type_block_size(type->members[f]); + size = MAX2(size, field_end); + } + return size; + } + + case GLSL_TYPE_ARRAY: + assert(type->stride > 0); + assert(glsl_get_length(type->type) > 0); + return type->stride * glsl_get_length(type->type); + + default: + assert(!"Invalid block type"); + return 0; + } +} + +static void +vtn_access_chain_get_offset_size(struct vtn_access_chain *chain, + unsigned *access_offset, + unsigned *access_size) +{ + /* Only valid for push constants accesses now. */ + assert(chain->var->mode == vtn_variable_mode_push_constant); + + struct vtn_type *type = chain->var->type; + + *access_offset = 0; + + for (unsigned i = 0; i < chain->length; i++) { + if (chain->link[i].mode != vtn_access_mode_literal) + break; + + if (glsl_type_is_struct(type->type)) { + *access_offset += type->offsets[chain->link[i].id]; + type = type->members[chain->link[i].id]; + } else { + *access_offset += type->stride * chain->link[i].id; + type = type->array_element; + } + } + + *access_size = vtn_type_block_size(type); +} + static void _vtn_load_store_tail(struct vtn_builder *b, nir_intrinsic_op op, bool load, nir_ssa_def *index, nir_ssa_def *offset, + unsigned access_offset, unsigned access_size, struct vtn_ssa_value **inout, const struct glsl_type *type) { nir_intrinsic_instr *instr = nir_intrinsic_instr_create(b->nb.shader, op); @@ -399,18 +476,25 @@ instr->src[src++] = nir_src_for_ssa((*inout)->def); } - /* We set the base and size for push constant load to the entire push - * constant block for now. - */ if (op == nir_intrinsic_load_push_constant) { - nir_intrinsic_set_base(instr, 0); - nir_intrinsic_set_range(instr, 128); + assert(access_offset % 4 == 0); + + nir_intrinsic_set_base(instr, access_offset); + nir_intrinsic_set_range(instr, access_size); } if (index) instr->src[src++] = nir_src_for_ssa(index); - instr->src[src++] = nir_src_for_ssa(offset); + if (op == nir_intrinsic_load_push_constant) { + /* We need to subtract the offset from where the intrinsic will load the + * data. */ + instr->src[src++] = + nir_src_for_ssa(nir_isub(&b->nb, offset, + nir_imm_int(&b->nb, access_offset))); + } else { + instr->src[src++] = nir_src_for_ssa(offset); + } if (load) { nir_ssa_dest_init(&instr->instr, &instr->dest, @@ -428,6 +512,7 @@ static void _vtn_block_load_store(struct vtn_builder *b, nir_intrinsic_op op, bool load, nir_ssa_def *index, nir_ssa_def *offset, + unsigned access_offset, unsigned access_size, struct vtn_access_chain *chain, unsigned chain_idx, struct vtn_type *type, struct vtn_ssa_value **inout) { @@ -442,6 +527,7 @@ case GLSL_TYPE_UINT: case GLSL_TYPE_INT: case GLSL_TYPE_FLOAT: + case GLSL_TYPE_DOUBLE: case GLSL_TYPE_BOOL: /* This is where things get interesting. At this point, we've hit * a vector, a scalar, or a matrix. @@ -472,6 +558,7 @@ nir_iadd(&b->nb, offset, nir_imm_int(&b->nb, i * type->stride)); _vtn_load_store_tail(b, op, load, index, elem_offset, + access_offset, access_size, &(*inout)->elems[i], glsl_vector_type(base_type, vec_width)); } @@ -493,8 +580,9 @@ offset = nir_iadd(&b->nb, offset, row_offset); if (load) *inout = vtn_create_ssa_value(b, glsl_scalar_type(base_type)); - _vtn_load_store_tail(b, op, load, index, offset, inout, - glsl_scalar_type(base_type)); + _vtn_load_store_tail(b, op, load, index, offset, + access_offset, access_size, + inout, glsl_scalar_type(base_type)); } else { /* Grabbing a column; picking one element off each row */ unsigned num_comps = glsl_get_vector_elements(type->type); @@ -514,6 +602,7 @@ } comp = &temp_val; _vtn_load_store_tail(b, op, load, index, elem_offset, + access_offset, access_size, &comp, glsl_scalar_type(base_type)); comps[i] = comp->def; } @@ -532,20 +621,25 @@ offset = nir_iadd(&b->nb, offset, col_offset); _vtn_block_load_store(b, op, load, index, offset, + access_offset, access_size, chain, chain_idx + 1, type->array_element, inout); } } else if (chain == NULL) { /* Single whole vector */ assert(glsl_type_is_vector_or_scalar(type->type)); - _vtn_load_store_tail(b, op, load, index, offset, inout, type->type); + _vtn_load_store_tail(b, op, load, index, offset, + access_offset, access_size, + inout, type->type); } else { /* Single component of a vector. Fall through to array case. */ nir_ssa_def *elem_offset = vtn_access_link_as_ssa(b, chain->link[chain_idx], type->stride); offset = nir_iadd(&b->nb, offset, elem_offset); - _vtn_block_load_store(b, op, load, index, offset, NULL, 0, + _vtn_block_load_store(b, op, load, index, offset, + access_offset, access_size, + NULL, 0, type->array_element, inout); } return; @@ -555,7 +649,9 @@ for (unsigned i = 0; i < elems; i++) { nir_ssa_def *elem_off = nir_iadd(&b->nb, offset, nir_imm_int(&b->nb, i * type->stride)); - _vtn_block_load_store(b, op, load, index, elem_off, NULL, 0, + _vtn_block_load_store(b, op, load, index, elem_off, + access_offset, access_size, + NULL, 0, type->array_element, &(*inout)->elems[i]); } return; @@ -566,7 +662,9 @@ for (unsigned i = 0; i < elems; i++) { nir_ssa_def *elem_off = nir_iadd(&b->nb, offset, nir_imm_int(&b->nb, type->offsets[i])); - _vtn_block_load_store(b, op, load, index, elem_off, NULL, 0, + _vtn_block_load_store(b, op, load, index, elem_off, + access_offset, access_size, + NULL, 0, type->members[i], &(*inout)->elems[i]); } return; @@ -581,6 +679,7 @@ vtn_block_load(struct vtn_builder *b, struct vtn_access_chain *src) { nir_intrinsic_op op; + unsigned access_offset = 0, access_size = 0; switch (src->var->mode) { case vtn_variable_mode_ubo: op = nir_intrinsic_load_ubo; @@ -590,6 +689,7 @@ break; case vtn_variable_mode_push_constant: op = nir_intrinsic_load_push_constant; + vtn_access_chain_get_offset_size(src, &access_offset, &access_size); break; default: assert(!"Invalid block variable mode"); @@ -602,6 +702,7 @@ struct vtn_ssa_value *value = NULL; _vtn_block_load_store(b, op, true, index, offset, + access_offset, access_size, src, chain_idx, type, &value); return value; } @@ -616,7 +717,7 @@ offset = vtn_access_chain_to_offset(b, dst, &index, &type, &chain_idx, true); _vtn_block_load_store(b, nir_intrinsic_store_ssbo, false, index, offset, - dst, chain_idx, type, &src); + 0, 0, dst, chain_idx, type, &src); } static bool @@ -639,6 +740,7 @@ case GLSL_TYPE_INT: case GLSL_TYPE_FLOAT: case GLSL_TYPE_BOOL: + case GLSL_TYPE_DOUBLE: /* At this point, we have a scalar, vector, or matrix so we know that * there cannot be any structure splitting still in the way. By * stopping at the matrix level rather than the vector level, we @@ -714,6 +816,7 @@ case GLSL_TYPE_UINT: case GLSL_TYPE_INT: case GLSL_TYPE_FLOAT: + case GLSL_TYPE_DOUBLE: case GLSL_TYPE_BOOL: /* At this point, we have a scalar, vector, or matrix so we know that * there cannot be any structure splitting still in the way. By @@ -783,7 +886,7 @@ *location = VARYING_SLOT_CLIP_DIST0; /* XXX CLIP_DIST1? */ break; case SpvBuiltInCullDistance: - /* XXX figure this out */ + *location = VARYING_SLOT_CULL_DIST0; break; case SpvBuiltInVertexIndex: *location = SYSTEM_VALUE_VERTEX_ID; @@ -805,8 +908,15 @@ set_mode_system_value(mode); break; case SpvBuiltInPrimitiveId: - *location = VARYING_SLOT_PRIMITIVE_ID; - *mode = nir_var_shader_out; + if (b->shader->stage == MESA_SHADER_FRAGMENT) { + assert(*mode == nir_var_shader_in); + *location = VARYING_SLOT_PRIMITIVE_ID; + } else if (*mode == nir_var_shader_out) { + *location = VARYING_SLOT_PRIMITIVE_ID; + } else { + *location = SYSTEM_VALUE_PRIMITIVE_ID; + set_mode_system_value(mode); + } break; case SpvBuiltInInvocationId: *location = SYSTEM_VALUE_INVOCATION_ID; @@ -814,7 +924,12 @@ break; case SpvBuiltInLayer: *location = VARYING_SLOT_LAYER; - *mode = nir_var_shader_out; + if (b->shader->stage == MESA_SHADER_FRAGMENT) + *mode = nir_var_shader_in; + else if (b->shader->stage == MESA_SHADER_GEOMETRY) + *mode = nir_var_shader_out; + else + unreachable("invalid stage for SpvBuiltInLayer"); break; case SpvBuiltInViewportIndex: *location = VARYING_SLOT_VIEWPORT; @@ -826,10 +941,19 @@ unreachable("invalid stage for SpvBuiltInViewportIndex"); break; case SpvBuiltInTessLevelOuter: + *location = VARYING_SLOT_TESS_LEVEL_OUTER; + break; case SpvBuiltInTessLevelInner: + *location = VARYING_SLOT_TESS_LEVEL_INNER; + break; case SpvBuiltInTessCoord: + *location = SYSTEM_VALUE_TESS_COORD; + set_mode_system_value(mode); + break; case SpvBuiltInPatchVertices: - unreachable("no tessellation support"); + *location = SYSTEM_VALUE_VERTICES_IN; + set_mode_system_value(mode); + break; case SpvBuiltInFragCoord: *location = VARYING_SLOT_POS; assert(*mode == nir_var_shader_in); @@ -896,10 +1020,10 @@ case SpvDecorationRelaxedPrecision: break; /* FIXME: Do nothing with this for now. */ case SpvDecorationNoPerspective: - nir_var->data.interpolation = INTERP_QUALIFIER_NOPERSPECTIVE; + nir_var->data.interpolation = INTERP_MODE_NOPERSPECTIVE; break; case SpvDecorationFlat: - nir_var->data.interpolation = INTERP_QUALIFIER_FLAT; + nir_var->data.interpolation = INTERP_MODE_FLAT; break; case SpvDecorationCentroid: nir_var->data.centroid = true; @@ -921,7 +1045,6 @@ nir_var->data.location_frac = dec->literals[0]; break; case SpvDecorationIndex: - nir_var->data.explicit_index = true; nir_var->data.index = dec->literals[0]; break; case SpvDecorationBuiltIn: { @@ -933,24 +1056,31 @@ nir_var->data.read_only = true; nir_constant *c = rzalloc(nir_var, nir_constant); - c->value.u[0] = b->shader->info.cs.local_size[0]; - c->value.u[1] = b->shader->info.cs.local_size[1]; - c->value.u[2] = b->shader->info.cs.local_size[2]; + c->values[0].u32[0] = b->shader->info->cs.local_size[0]; + c->values[0].u32[1] = b->shader->info->cs.local_size[1]; + c->values[0].u32[2] = b->shader->info->cs.local_size[2]; nir_var->constant_initializer = c; break; } nir_variable_mode mode = nir_var->data.mode; vtn_get_builtin_location(b, builtin, &nir_var->data.location, &mode); - nir_var->data.explicit_location = true; nir_var->data.mode = mode; - if (builtin == SpvBuiltInFragCoord || builtin == SpvBuiltInSamplePosition) + switch (builtin) { + case SpvBuiltInTessLevelOuter: + case SpvBuiltInTessLevelInner: + nir_var->data.compact = true; + break; + case SpvBuiltInSamplePosition: nir_var->data.origin_upper_left = b->origin_upper_left; - - if (builtin == SpvBuiltInFragCoord) + /* fallthrough */ + case SpvBuiltInFragCoord: nir_var->data.pixel_center_integer = b->pixel_center_integer; - break; + break; + default: + break; + } } case SpvDecorationSpecId: @@ -969,7 +1099,7 @@ break; /* Do nothing with these here */ case SpvDecorationPatch: - vtn_warn("Tessellation not yet supported"); + nir_var->data.patch = true; break; case SpvDecorationLocation: @@ -1009,6 +1139,15 @@ } static void +var_is_patch_cb(struct vtn_builder *b, struct vtn_value *val, int member, + const struct vtn_decoration *dec, void *out_is_patch) +{ + if (dec->decoration == SpvDecorationPatch) { + *((bool *) out_is_patch) = true; + } +} + +static void var_decoration_cb(struct vtn_builder *b, struct vtn_value *val, int member, const struct vtn_decoration *dec, void *void_var) { @@ -1022,6 +1161,12 @@ case SpvDecorationDescriptorSet: vtn_var->descriptor_set = dec->literals[0]; return; + case SpvDecorationInputAttachmentIndex: + vtn_var->input_attachment_index = dec->literals[0]; + return; + case SpvDecorationPatch: + vtn_var->patch = true; + break; default: break; } @@ -1052,15 +1197,15 @@ } else if (vtn_var->mode == vtn_variable_mode_input || vtn_var->mode == vtn_variable_mode_output) { is_vertex_input = false; - location += VARYING_SLOT_VAR0; + location += vtn_var->patch ? VARYING_SLOT_PATCH0 : VARYING_SLOT_VAR0; } else { - assert(!"Location must be on input or output variable"); + vtn_warn("Location must be on input or output variable"); + return; } if (vtn_var->var) { /* This handles the member and lone variable cases */ vtn_var->var->data.location = location; - vtn_var->var->data.explicit_location = true; } else { /* This handles the structure member case */ assert(vtn_var->members); @@ -1068,7 +1213,6 @@ glsl_get_length(glsl_without_array(vtn_var->type->type)); for (unsigned i = 0; i < length; i++) { vtn_var->members[i]->data.location = location; - vtn_var->members[i]->data.explicit_location = true; location += glsl_count_attribute_slots(vtn_var->members[i]->interface_type, is_vertex_input); @@ -1101,52 +1245,22 @@ } } -/* Tries to compute the size of an interface block based on the strides and - * offsets that are provided to us in the SPIR-V source. - */ -static unsigned -vtn_type_block_size(struct vtn_type *type) +static bool +is_per_vertex_inout(const struct vtn_variable *var, gl_shader_stage stage) { - enum glsl_base_type base_type = glsl_get_base_type(type->type); - switch (base_type) { - case GLSL_TYPE_UINT: - case GLSL_TYPE_INT: - case GLSL_TYPE_FLOAT: - case GLSL_TYPE_BOOL: - case GLSL_TYPE_DOUBLE: { - unsigned cols = type->row_major ? glsl_get_vector_elements(type->type) : - glsl_get_matrix_columns(type->type); - if (cols > 1) { - assert(type->stride > 0); - return type->stride * cols; - } else if (base_type == GLSL_TYPE_DOUBLE) { - return glsl_get_vector_elements(type->type) * 8; - } else { - return glsl_get_vector_elements(type->type) * 4; - } - } + if (var->patch || !glsl_type_is_array(var->type->type)) + return false; - case GLSL_TYPE_STRUCT: - case GLSL_TYPE_INTERFACE: { - unsigned size = 0; - unsigned num_fields = glsl_get_length(type->type); - for (unsigned f = 0; f < num_fields; f++) { - unsigned field_end = type->offsets[f] + - vtn_type_block_size(type->members[f]); - size = MAX2(size, field_end); - } - return size; + if (var->mode == vtn_variable_mode_input) { + return stage == MESA_SHADER_TESS_CTRL || + stage == MESA_SHADER_TESS_EVAL || + stage == MESA_SHADER_GEOMETRY; } - case GLSL_TYPE_ARRAY: - assert(type->stride > 0); - assert(glsl_get_length(type->type) > 0); - return type->stride * glsl_get_length(type->type); + if (var->mode == vtn_variable_mode_output) + return stage == MESA_SHADER_TESS_CTRL; - default: - assert(!"Invalid block type"); - return 0; - } + return false; } void @@ -1154,6 +1268,12 @@ const uint32_t *w, unsigned count) { switch (opcode) { + case SpvOpUndef: { + struct vtn_value *val = vtn_push_value(b, w[2], vtn_value_type_undef); + val->type = vtn_value(b, w[1], vtn_value_type_type)->type; + break; + } + case SpvOpVariable: { struct vtn_variable *var = rzalloc(b, struct vtn_variable); var->type = vtn_value(b, w[1], vtn_value_type_type)->type; @@ -1175,18 +1295,18 @@ case SpvStorageClassUniformConstant: if (without_array->block) { var->mode = vtn_variable_mode_ubo; - b->shader->info.num_ubos++; + b->shader->info->num_ubos++; } else if (without_array->buffer_block) { var->mode = vtn_variable_mode_ssbo; - b->shader->info.num_ssbos++; + b->shader->info->num_ssbos++; } else if (glsl_type_is_image(without_array->type)) { var->mode = vtn_variable_mode_image; nir_mode = nir_var_uniform; - b->shader->info.num_images++; + b->shader->info->num_images++; } else if (glsl_type_is_sampler(without_array->type)) { var->mode = vtn_variable_mode_sampler; nir_mode = nir_var_uniform; - b->shader->info.num_textures++; + b->shader->info->num_textures++; } else { assert(!"Invalid uniform variable type"); } @@ -1248,6 +1368,30 @@ case vtn_variable_mode_input: case vtn_variable_mode_output: { + /* In order to know whether or not we're a per-vertex inout, we need + * the patch qualifier. This means walking the variable decorations + * early before we actually create any variables. Not a big deal. + * + * GLSLang really likes to place decorations in the most interior + * thing it possibly can. In particular, if you have a struct, it + * will place the patch decorations on the struct members. This + * should be handled by the variable splitting below just fine. + * + * If you have an array-of-struct, things get even more weird as it + * will place the patch decorations on the struct even though it's + * inside an array and some of the members being patch and others not + * makes no sense whatsoever. Since the only sensible thing is for + * it to be all or nothing, we'll call it patch if any of the members + * are declared patch. + */ + var->patch = false; + vtn_foreach_decoration(b, val, var_is_patch_cb, &var->patch); + if (glsl_type_is_array(var->type->type) && + glsl_type_is_struct(without_array->type)) { + vtn_foreach_decoration(b, without_array->val, + var_is_patch_cb, &var->patch); + } + /* For inputs and outputs, we immediately split structures. This * is for a couple of reasons. For one, builtins may all come in * a struct and we really want those split out into separate @@ -1258,8 +1402,7 @@ int array_length = -1; struct vtn_type *interface_type = var->type; - if (b->shader->stage == MESA_SHADER_GEOMETRY && - glsl_type_is_array(var->type->type)) { + if (is_per_vertex_inout(var, b->shader->stage)) { /* In Geometry shaders (and some tessellation), inputs come * in per-vertex arrays. However, some builtins come in * non-per-vertex, hence the need for the is_array check. In @@ -1287,6 +1430,7 @@ var->members[i]->interface_type = interface_type->members[i]->type; var->members[i]->data.mode = nir_mode; + var->members[i]->data.patch = var->patch; } } else { var->var = rzalloc(b->shader, nir_variable); @@ -1294,6 +1438,7 @@ var->var->type = var->type->type; var->var->interface_type = interface_type->type; var->var->data.mode = nir_mode; + var->var->data.patch = var->patch; } /* For inputs and outputs, we need to grab locations and builtin @@ -1330,6 +1475,7 @@ */ var->var->data.binding = var->binding; var->var->data.descriptor_set = var->descriptor_set; + var->var->data.index = var->input_attachment_index; if (var->mode == vtn_variable_mode_image) var->var->data.image.format = without_array->image_format; @@ -1379,7 +1525,7 @@ struct vtn_value *link_val = vtn_untyped_value(b, w[i]); if (link_val->value_type == vtn_value_type_constant) { chain->link[idx].mode = vtn_access_mode_literal; - chain->link[idx].id = link_val->constant->value.u[0]; + chain->link[idx].id = link_val->constant->values[0].u32[0]; } else { chain->link[idx].mode = vtn_access_mode_id; chain->link[idx].id = w[i]; diff -Nru mesa-12.0.6/src/egl/docs/EGL_MESA_screen_surface mesa-17.0.7/src/egl/docs/EGL_MESA_screen_surface --- mesa-12.0.6/src/egl/docs/EGL_MESA_screen_surface 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/docs/EGL_MESA_screen_surface 1970-01-01 00:00:00.000000000 +0000 @@ -1,564 +0,0 @@ -Name - - MESA_screen_surface - -Name Strings - - EGL_MESA_screen_surface - -Contact - - Brian Paul - - To discuss, join the dri-egl@lists.freedesktop.org list. - -Status - - Obsolete. - -Version - - 11 (27 January 2006) - -Number - - TBD - -Dependencies - - EGL 1.0 or later. - -Overview - - EGL 1.1 supports three types of drawing surfaces: - * Window surfaces - * Pixmap surfaces - * Pbuffer surfaces - This extension defines a fourth type of drawing surface: - * Screen surface - - A screen surface is a surface for which the (front) color buffer can - be directly displayed (i.e. scanned out) on a monitor (such as a flat - panel or CRT). In particular the color buffer memory will be allocated - at a location in VRAM (and in a suitable format) which can be displayed - by the graphics hardware. - - Note that the width and height of the screen surface need not exactly - match the monitor's current resolution. For example, while the monitor - may be configured to to show 1024x768 pixels, the associated screen - surface may be larger, such as 1200x1000. The "screen origin" attribute - will specify which region of the screen surface which is visible on the - monitor. The screen surface can be scrolled by changing this origin. - - This extension also defines functions for controlling the monitor's - display mode (width, height, refresh rate, etc), and specifing which - screen surface is to be displayed on a monitor. - - The new EGLModeMESA type and related functions are very similar to the - EGLConfig type and related functions. The user may get a list of - supported modes for a screen and specify the mode to be used when - displaying a screen surface. - - -Issues - - 1. Should EGL_INTERLACE be a supported mode attribute? - - Arguments against: - - No, this should be provided by another extension which would - also provide the mechanisms needed to play back interlaced video - material correctly on hardware that supports it. - This extension should prefer non-interlaced modes. [M. Danzer] - - Arguments for: - - An interlaced display can be of use without considering video - material. Being able to query whether a screen is operating in - interlaced mode can be used by applications to control their - drawing. For example: avoid drawing 1-pixel-wide horizontal lines - if screen is interlaced. [B. Paul] - - Resolution: Defer for future extension? - - - 2. Should EGL_REFRESH_RATE be a supported mode attribute? - - Arguments for: - - Yes, it's been shown that applications and/or users need to select - modes by this. [M. Danzer] - - Many examples have been given in which it's desirable to let the - user choose from a variety of refresh rates without having to - restart/reconfigure. [B. Paul] - - Arguments against: - - TBD. - - Resolution: Yes. - - - 3. Exactly how should the list of modes returned by eglChooseConfigMESA - be sorted? - - Current method is described in the text below. Subject to change. - - Alternately, leave the sorting order undefined so that each - implementation can return the modes in order of "most desirable" - to "least desirable" which may depend on the display technology - (CRT vs LCD, etc) or other factors. - - - 4. How should screen blanking be supported? Note that a screen can be - disabled or turned off by calling eglShowSurface(dpy, scrn, - EGL_NO_SURFACE, EGL_NO_MODE_MESA). But what about power-save mode? - - I would defer this to other extensions that depend on this one. - I can imagine people wanting different semantics not just in - relation to the power management API being exposed (DPMS or whatever) - but also relating to what events can trigger EGL_CONTEXT_LOST. Also - I'm not sure whether power management commands are properly operations - on the Display or on a screen surface. [A. Jackson] - - - 5. Should the EGL_PHYSICAL_SIZE_EGL query be kept? The size information - isn't always reliable (consider video projectors) but can still be - used to determine the pixel aspect ratio. - - Resolution: Omit. The EGL 1.2 specification includes queries for - the display resolution and pixel aspect ratio. - - - 6. Should detailed mode timing information be exposed by this API? - - Probably not. Instead, offer that information in a layered extension. - - - 7. How should the notion of a screen's "native" mode be expressed? - For example, LCD panels have a native resolution and refresh rate - that looks best but other sub-optimal resolutions may be supported. - - The mode attribute EGL_OPTIMAL_MESA will be set for modes which - best match the screen. [M. Danzer] - - - 8. Should eglQueryModeStringMESA() be included? This function returns - a human-readable string which corresponds to an EGLMode. - - Arguments for: - - A mode name such as "HDTV-720P" might mean more to users than - "1280x720@60Hz" if the later were generated via code. - - Arguments against: - - There's no standard syntax for the strings. May cause more - trouble than it's worth. - - Postpone for future extension. [A. Jackson] - - Latest discussion leaning toward omitting this function. - - - 9. Should we use "Get" or "Query" for functions which return state? - The EGL 1.x specification doesn't seem to be totally consistent - in this regard, but "Query" is used more often. - - Use "Get" for mode-related queries (as for EGLConfigs) but "Query" - for everything else. - - - 10. What should be the default size for screen surfaces? - - For Pbuffer surfaces the default width and height are zero. - We'll do the same for screen surfaces. Since there's no function - to resize surfaces it's useless to have a 0x0 screen, but this isn't - a situation that'll normally be encountered. - - - 11. Should there be a function for resizing a screen surface? - - Suppose one wants to change the screen's size in the EGL application. - Also suppose there's a hardware restriction such that only one screen - surface can exist at a time (either for lack of memory or because of - memory layout restrictions). - - The basic idea is that the currently displayed screen surface must - be deallocated before a new one can be created. Perhaps a resize - function would work better? - - - 12. How should sub-pixel LCD color information be made available? - What about the display's gamma value? - - Perhaps expose as additional read-only mode attributes. - - Perhaps postpone for a layered extension. - - - 13. What happens if the user attempts to delete a screen surface that - is currently being shown? - - Spec currently says that's illegal and that an error (TBD) will be - generated. - - - 14. What if the physical screen size can't be determined? Should - a query of EGL_PHYSICAL_SIZE_MESA return [0,0]? - - Obsolete: EGL_PHYSICAL_SIZE_MESA not used. - - - 15. Suppose the device's number of RAMDACs is different from the - number of output ports. For example, a graphics card with - two RAMDACs but three ports (VGA, DVI, TV). - - Address this in a follow-on extension. [Matthias Hopf] - - - 16. How should we deal with on-the-fly device changes? For example, - the monitor being unplugged and replaced by another with different - characteristics? - - A HAL event could be received via DBUS in the application [J. Smirl, - A. Jackson]. - - Should there be an EGL mechanism for detecting this? Maybe an - EGL_SCREEN_LOST error (similar to EGL_CONTEXT_LOST) can be recorded - when there's a screen change. At least then the application can - poll to detect this situation. - - Maybe leave that to a future extension. - - See also the EGL_SCREEN_COUNT_MESA query. - - - 17. What if pixel-accurate panning is not supported (see - eglScreenPositionMESA)? [M. Danzer] - - Is this a common problem? Can we ignore it for now? - - - 18. Should eglShowSurfaceMESA be renamed to eglShowScreenSurfaceMESA? - - Probably. - - - -New Procedures and Functions - - EGLBoolean eglChooseModeMESA(EGLDisplay dpy, EGLScreenMESA screen, - const EGLint *attrib_list, - EGLModeMESA *modes, EGLint modes_size, - EGLint *num_modes) - - EGLBoolean eglGetModesMESA(EGLDisplay dpy, EGLScreenMESA screen, - EGLModeMESA *modes, EGLint modes_size, - EGLint *num_modes) - - EGLBoolean eglGetModeAttribMESA(EGLDisplay dpy, EGLModeMESA mode, - EGLint attrib, EGLint *value) - - - EGLBoolean eglGetScreensMESA(EGLDisplay dpy, EGLScreenMESA *screens, - EGLint screens_size, EGLint *num_screens) - - EGLSurface eglCreateScreenSurfaceMESA(EGLDisplay dpy, EGLConfig config, - const EGLint *attrib_list) - - EGLBoolean eglShowSurfaceMESA(EGLDisplay dpy, EGLScreenMESA screen, - EGLSurface surface, EGLModeMESA mode) - - EGLBoolean eglScreenPositionMESA(EGLDisplay dpy, EGLScreenMESA screen, - EGLint x, EGLint y) - - - EGLBoolean eglQueryScreenMESA(EGLDisplay dpy, EGLScreenMESA screen, - EGLint attrib, EGLint *value); - - EGLBoolean eglQueryScreenSurfaceMESA(EGLDisplay dpy, EGLScreenMESA screen, - EGLSurface *surface) - - EGLBoolean eglQueryScreenModeMESA(EGLDisplay dpy, EGLScreenMESA screen, - EGLModeMESA *mode) - - const char *eglQueryModeStringMESA(EGLDisplay dpy, EGLMode mode); - - -New Types - - EGLModeMESA - EGLScreenMESA - -New Tokens - - New error codes: - - EGL_BAD_SCREEN_MESA - EGL_BAD_MODE_MESA - - Screen-related tokens: - - EGL_SCREEN_COUNT_MESA - EGL_SCREEN_POSITION_MESA - EGL_SCREEN_BIT_MESA - EGL_SCREEN_POSITION_GRANULARITY_MESA - - Mode-related tokens: - - EGL_MODE_ID_MESA - EGL_REFRESH_RATE_MESA - EGL_INTERLACED_MESA - EGL_OPTIMAL_MESA - EGL_NO_MODE_MESA - - -Additions to Chapter X of the EGL 1.1 Specification - - [XXX this all has to be rewritten to fit into the EGL specification - and match the conventions of an EGL extension. For now, just list - all the functions with brief descriptions.] - - - EGLBoolean eglChooseModeMESA(EGLDisplay dpy, const EGLScreenMESA screen, - EGLint *attrib_list, EGLModeMESA *modes, - EGLint modes_size, EGLint *num_modes) - - Like eglChooseConfig, returns a list of EGLModes which match the given - attribute list. This does not set the screen's current display mode. - The attribute list is a list of token/value pairs terminated with - EGL_NONE. Supported attributes include: - - Name Description - --------------------- --------------------------------------------- - EGL_WIDTH Mode width (resolution) - EGL_HEIGHT Mode height (resolution) - EGL_REFRESH_RATE_MESA The mode's refresh rate, multiplied by 1000 - EGL_INTERLACED_MESA 1 indicates an interlaced mode, 0 otherwise - EGL_OPTIMAL_MESA Set if the most is especially optimal for the - screen (ex. for particular LCD resolutions) - - Any other token will generate the error EGL_BAD_ATTRIBUTE. - - The list of modes returned by eglChooseModeMESA will be sorted - according to the following criteria. See the discussion of table 3.3 - in the EGL specification for more information. - - Selection Sort Sort - Attribute Default Criteria Order Priority - -------------------- -------------- ----------- ------ -------- - EGL_OPTIMAL_MESA EGL_DONT_CARE Exact 1,0 1 - EGL_INTERLACED_MESA EGL_DONT_CARE Exact 0,1 2 - EGL_REFRESH_RATE EGL_DONT_CARE AtLeast Larger 3 - EGL_WIDTH EGL_DONT_CARE AtLeast Larger 4 - EGL_HEIGHT EGL_DONT_CARE AtLeast Larger 5 - EGL_MODE_ID_MESA EGL_DONT_CARE Exact Smaller 6 - - - EGLBoolean eglGetModesMESA(EGLDisplay dpy, EGLScreenMESA screen, - EGLModeMESA *modes, EGLint modes_size, - EGLint *num_modes) - - Like eglGetConfigs, returns a list of all modes supported by the - given screen. The returned modes will be sorted in the same manner - as for eglChooseModeMESA(). - - - - EGLBoolean eglGetModeAttribMESA(EGLDisplay dpy, EGLModeMESA mode, - EGLint attrib, EGLint *value) - - Used to query mode attributes. The following attributes are supported: - - Name Return value description - --------------------- ---------------------------------------------- - EGL_OPTIMAL_MESA 1 indicates an optimal mode, 0 otherwise - EGL_INTERLACED_MESA 1 indicates an interlaced mode, 0 otherwise - EGL_REFRESH_RATE_MESA The mode's refresh rate, multiplied by 1000 - EGL_WIDTH Mode width (resolution) - EGL_HEIGHT Mode height (resolution) - EGL_MODE_ID_MESA A unique small integer identifier for the mode - - Any other token will generate the error EGL_BAD_ATTRIBUTE. - - - - EGLBoolean eglGetScreensMESA(EGLDisplay dpy, EGLScreenMESA *screens, - EGLint screens_size, EGLint *num_screens) - - This function returns an array of all available screen handles. - is the maximum number of screens to return in the - array. will return the number of screen handles - placed in the array, even if is NULL. - - The number of screens and the availability of each may change over - time (hot-plugging). Screen handles will not be reused. When a - screen handle becomes invalid, function calls which reference an - invalid handle will generate EGL_BAD_SCREEN_MESA. - - The first screen handle returned will be considered to be the primary - one. - - - - EGLSurface eglCreateScreenSurfaceMESA(EGLDisplay dpy, EGLConfig config, - const EGLint *attrib_list) - - Create a surface that can be displayed on a screen. is - an array of token/value pairs terminated with EGL_NONE. Valid tokens - include: - - Name Description - ---------------- -------------------------------- - EGL_WIDTH desired surface width in pixels - EGL_HEIGHT desired surface height in pixels - - Any other token will generate the error EGL_BAD_ATTRIBUTE. - The default width and height are zero. - - - - EGLBoolean eglShowSurfaceMESA(EGLDisplay dpy, EGLScreenMESA screen, - EGLSurface surface, EGLModeMESA mode) - - This function causes a screen to show the given surface (or more - precisely, the surface's front color buffer) with the given mode. - - If the surface is in any way incompatible with the mode, the error - EGL_BAD_MATCH will be generated, EGL_FALSE will be returned, and the - previous screen state will remain in effect. This might occur when - the bandwidth of the video-out subsystem is exceeded, or if the mode - specifies a width or height that's greater than the width or height - of the surface. - - To disable a screen, the values EGL_NO_SURFACE and EGL_NO_MODE_MESA - be passed as the and parameters. - - The values of EGL_SCREEN_POSITION_MESA are clamped to the new valid - range computed from the screen size and surface size. If the new - surface is EGL_NO_SURFACE, EGL_SCREEN_POSITION_MESA is set to [0, 0]. - - - Attempting to delete a screen surface which is currently being - displayed will result in the error EGL_BAD_ACCESS being generated. - - - - EGLBoolean eglScreenPositionMESA(EGLDisplay dpy, EGLScreenMESA screen, - EGLint x, EGLint y) - - Specifies the origin of the screen's view into the surface, if the - surface is larger than the screen. Valid values for x and y are - [0, surfaceWidth - screenWidth] and [0, surfaceHeight - screenHeight], - respectively. - - The x and y values are also constrained to be integer multiples of the - EGL_SCREEN_POSITION_GRANULARITY_MESA values. - - - - - EGLBoolean eglQueryScreenMESA(EGLDisplay dpy, EGLScreenMESA screen, - EGLint attrib, EGLint *value); - - Used to query screen attributes. may be one of the following: - - Name Return value description - ------------------------ --------------------------------------------- - EGL_SCREEN_POSITION_MESA x, y position of the screen's origin with - respect to the surface. If no surface is - attached to the screen, [0, 0] is returned. - EGL_SCREEN_POSITION_GRANULARITY_MESA - Returns the granularity, in pixels, for - which the screen position is constrained. - - Any other token will generate the error EGL_BAD_ATTRIBUTE. - - - - - EGLBoolean eglQueryScreenSurfaceMESA(EGLDisplay dpy, EGLScreenMESA screen, - EGLSurface *surface) - - Returns the surface currently displayed on the given screen. - may be EGL_NO_SURFACE if the screen isn't currently showing any surface. - - - - - EGLBoolean eglQueryScreenModeMESA(EGLDisplay dpy, EGLScreenMESA screen, - EGLModeMESA *mode) - - Returns the given screen's current display mode. The mode may be - EGL_NO_MODE_MESA if the screen is currently disabled. - - - - const char *eglQueryModeStringMESA(EGLDisplay dpy, EGLModeMESA mode); - - Returns a human-readable string for the given mode. The string is a - zero-terminated C string which the user should not attempt to free. - There is no standard syntax for mode strings. Applications should - not directly rely on mode strings. - - - -Version History - - 1. 15 March 2005 - BrianP - Initial version - - 2. 16 March 2005 - BrianP - Removed EGL_DEPTH_MESA - Added EGL_PHYSICAL_WIDTH_MESA, EGL_PHYSICAL_HEIGHT_MESA queries - Added EGL_OPTIMAL_MESA for width/height/refresh rate selection - Added possible eglQueryModeStringMESA() function - More details of the new functions explained. - - 3. 18 March 2005 - BrianP - Added screen_number to eglChooseModeMESA(). - Fix off by one mistake in value range for ORIGIN attributes - Added Issues section - - 4. 21 March 2005 - BrianP - Removed eglScreenAttribsMESA(). - Added eglScreenPositionMESA() to set screen origin. - Replaced EGL_SCREEN_X/Y_OFFSET_MESA with EGL_SCREEN_POSITION_MESA. - Replaced EGL_PHYSICAL_WIDTH/HEIGHT_MESA with EGL_PHYSICAL_SIZE_MESA. - Use EGL_OPTIMAL_MESA as a new mode attribute. (Michel Danzer) - Added a few more issues. - - 5. 6 April 2005 - BrianP - More language for eglGetModeStringMESA(). - Added issues 10, 11, 12, 13, 14. - Updated issue 3 discussion about mode sorting. - - 6. 22 April 2005 - BrianP - Fixed "LDC" typo. - Added issues 15, 16. - Changed dependency on EGL 1.1 to EGL 1.0 - s/EGL_NUM_SCREENS_MESA/EGL_SCREEN_COUNT_MESA/ - Added eglQueryDisplayMESA() to New Functions section. - Clarified language for the EGL_SCREEN_COUNT_MESA query. - - 7. 29 April 2005 - BrianP - Added EGLScreenMESA type and eglGetScreensMESA() function. [J. Smirl]. - Replaced EGLint screen_number parameters with EGLScreenMESA screen. - Added issue 17 (pixel-accurate panning) - - 8. 2 May 2005 - BrianP - Removed eglQueryDisplayMESA. - Fixed a few more EGLint -> EGLScreenMESA changes. - - 9. 20 May 2005 - BrianP - Fixed a few typos. - Updated some open issues text. - - 10. 10 August 2005 - BrianP - Added EGL_SCREEN_POSITION_GRANULARITY_MESA. - - 11. 27 January 2006 - BrianP - EGL_PHYSICAL_SIZE_MESA removed since EGL 1.2 has a similar feature. - diff -Nru mesa-12.0.6/src/egl/drivers/dri2/egl_dri2.c mesa-17.0.7/src/egl/drivers/dri2/egl_dri2.c --- mesa-12.0.6/src/egl/drivers/dri2/egl_dri2.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/drivers/dri2/egl_dri2.c 2017-06-01 10:37:10.000000000 +0000 @@ -56,6 +56,7 @@ #endif #include "egl_dri2.h" +#include "loader/loader.h" #include "util/u_atomic.h" /* The kernel header drm_fourcc.h defines the DRM formats below. We duplicate @@ -80,54 +81,54 @@ EGLint dri2_to_egl_attribute_map[] = { 0, - EGL_BUFFER_SIZE, /* __DRI_ATTRIB_BUFFER_SIZE */ - EGL_LEVEL, /* __DRI_ATTRIB_LEVEL */ - EGL_RED_SIZE, /* __DRI_ATTRIB_RED_SIZE */ - EGL_GREEN_SIZE, /* __DRI_ATTRIB_GREEN_SIZE */ - EGL_BLUE_SIZE, /* __DRI_ATTRIB_BLUE_SIZE */ - EGL_LUMINANCE_SIZE, /* __DRI_ATTRIB_LUMINANCE_SIZE */ - EGL_ALPHA_SIZE, /* __DRI_ATTRIB_ALPHA_SIZE */ - 0, /* __DRI_ATTRIB_ALPHA_MASK_SIZE */ - EGL_DEPTH_SIZE, /* __DRI_ATTRIB_DEPTH_SIZE */ - EGL_STENCIL_SIZE, /* __DRI_ATTRIB_STENCIL_SIZE */ - 0, /* __DRI_ATTRIB_ACCUM_RED_SIZE */ - 0, /* __DRI_ATTRIB_ACCUM_GREEN_SIZE */ - 0, /* __DRI_ATTRIB_ACCUM_BLUE_SIZE */ - 0, /* __DRI_ATTRIB_ACCUM_ALPHA_SIZE */ - EGL_SAMPLE_BUFFERS, /* __DRI_ATTRIB_SAMPLE_BUFFERS */ - EGL_SAMPLES, /* __DRI_ATTRIB_SAMPLES */ - 0, /* __DRI_ATTRIB_RENDER_TYPE, */ - 0, /* __DRI_ATTRIB_CONFIG_CAVEAT */ - 0, /* __DRI_ATTRIB_CONFORMANT */ - 0, /* __DRI_ATTRIB_DOUBLE_BUFFER */ - 0, /* __DRI_ATTRIB_STEREO */ - 0, /* __DRI_ATTRIB_AUX_BUFFERS */ - 0, /* __DRI_ATTRIB_TRANSPARENT_TYPE */ - 0, /* __DRI_ATTRIB_TRANSPARENT_INDEX_VALUE */ - 0, /* __DRI_ATTRIB_TRANSPARENT_RED_VALUE */ - 0, /* __DRI_ATTRIB_TRANSPARENT_GREEN_VALUE */ - 0, /* __DRI_ATTRIB_TRANSPARENT_BLUE_VALUE */ - 0, /* __DRI_ATTRIB_TRANSPARENT_ALPHA_VALUE */ - 0, /* __DRI_ATTRIB_FLOAT_MODE (deprecated) */ - 0, /* __DRI_ATTRIB_RED_MASK */ - 0, /* __DRI_ATTRIB_GREEN_MASK */ - 0, /* __DRI_ATTRIB_BLUE_MASK */ - 0, /* __DRI_ATTRIB_ALPHA_MASK */ - EGL_MAX_PBUFFER_WIDTH, /* __DRI_ATTRIB_MAX_PBUFFER_WIDTH */ - EGL_MAX_PBUFFER_HEIGHT, /* __DRI_ATTRIB_MAX_PBUFFER_HEIGHT */ - EGL_MAX_PBUFFER_PIXELS, /* __DRI_ATTRIB_MAX_PBUFFER_PIXELS */ - 0, /* __DRI_ATTRIB_OPTIMAL_PBUFFER_WIDTH */ - 0, /* __DRI_ATTRIB_OPTIMAL_PBUFFER_HEIGHT */ - 0, /* __DRI_ATTRIB_VISUAL_SELECT_GROUP */ - 0, /* __DRI_ATTRIB_SWAP_METHOD */ - EGL_MAX_SWAP_INTERVAL, /* __DRI_ATTRIB_MAX_SWAP_INTERVAL */ - EGL_MIN_SWAP_INTERVAL, /* __DRI_ATTRIB_MIN_SWAP_INTERVAL */ - 0, /* __DRI_ATTRIB_BIND_TO_TEXTURE_RGB */ - 0, /* __DRI_ATTRIB_BIND_TO_TEXTURE_RGBA */ - 0, /* __DRI_ATTRIB_BIND_TO_MIPMAP_TEXTURE */ - 0, /* __DRI_ATTRIB_BIND_TO_TEXTURE_TARGETS */ - EGL_Y_INVERTED_NOK, /* __DRI_ATTRIB_YINVERTED */ - 0, /* __DRI_ATTRIB_FRAMEBUFFER_SRGB_CAPABLE */ + EGL_BUFFER_SIZE, /* __DRI_ATTRIB_BUFFER_SIZE */ + EGL_LEVEL, /* __DRI_ATTRIB_LEVEL */ + EGL_RED_SIZE, /* __DRI_ATTRIB_RED_SIZE */ + EGL_GREEN_SIZE, /* __DRI_ATTRIB_GREEN_SIZE */ + EGL_BLUE_SIZE, /* __DRI_ATTRIB_BLUE_SIZE */ + EGL_LUMINANCE_SIZE, /* __DRI_ATTRIB_LUMINANCE_SIZE */ + EGL_ALPHA_SIZE, /* __DRI_ATTRIB_ALPHA_SIZE */ + 0, /* __DRI_ATTRIB_ALPHA_MASK_SIZE */ + EGL_DEPTH_SIZE, /* __DRI_ATTRIB_DEPTH_SIZE */ + EGL_STENCIL_SIZE, /* __DRI_ATTRIB_STENCIL_SIZE */ + 0, /* __DRI_ATTRIB_ACCUM_RED_SIZE */ + 0, /* __DRI_ATTRIB_ACCUM_GREEN_SIZE */ + 0, /* __DRI_ATTRIB_ACCUM_BLUE_SIZE */ + 0, /* __DRI_ATTRIB_ACCUM_ALPHA_SIZE */ + EGL_SAMPLE_BUFFERS, /* __DRI_ATTRIB_SAMPLE_BUFFERS */ + EGL_SAMPLES, /* __DRI_ATTRIB_SAMPLES */ + 0, /* __DRI_ATTRIB_RENDER_TYPE, */ + 0, /* __DRI_ATTRIB_CONFIG_CAVEAT */ + 0, /* __DRI_ATTRIB_CONFORMANT */ + 0, /* __DRI_ATTRIB_DOUBLE_BUFFER */ + 0, /* __DRI_ATTRIB_STEREO */ + 0, /* __DRI_ATTRIB_AUX_BUFFERS */ + 0, /* __DRI_ATTRIB_TRANSPARENT_TYPE */ + 0, /* __DRI_ATTRIB_TRANSPARENT_INDEX_VALUE */ + 0, /* __DRI_ATTRIB_TRANSPARENT_RED_VALUE */ + 0, /* __DRI_ATTRIB_TRANSPARENT_GREEN_VALUE */ + 0, /* __DRI_ATTRIB_TRANSPARENT_BLUE_VALUE */ + 0, /* __DRI_ATTRIB_TRANSPARENT_ALPHA_VALUE */ + 0, /* __DRI_ATTRIB_FLOAT_MODE (deprecated) */ + 0, /* __DRI_ATTRIB_RED_MASK */ + 0, /* __DRI_ATTRIB_GREEN_MASK */ + 0, /* __DRI_ATTRIB_BLUE_MASK */ + 0, /* __DRI_ATTRIB_ALPHA_MASK */ + EGL_MAX_PBUFFER_WIDTH, /* __DRI_ATTRIB_MAX_PBUFFER_WIDTH */ + EGL_MAX_PBUFFER_HEIGHT, /* __DRI_ATTRIB_MAX_PBUFFER_HEIGHT */ + EGL_MAX_PBUFFER_PIXELS, /* __DRI_ATTRIB_MAX_PBUFFER_PIXELS */ + 0, /* __DRI_ATTRIB_OPTIMAL_PBUFFER_WIDTH */ + 0, /* __DRI_ATTRIB_OPTIMAL_PBUFFER_HEIGHT */ + 0, /* __DRI_ATTRIB_VISUAL_SELECT_GROUP */ + 0, /* __DRI_ATTRIB_SWAP_METHOD */ + EGL_MAX_SWAP_INTERVAL, /* __DRI_ATTRIB_MAX_SWAP_INTERVAL */ + EGL_MIN_SWAP_INTERVAL, /* __DRI_ATTRIB_MIN_SWAP_INTERVAL */ + 0, /* __DRI_ATTRIB_BIND_TO_TEXTURE_RGB */ + 0, /* __DRI_ATTRIB_BIND_TO_TEXTURE_RGBA */ + 0, /* __DRI_ATTRIB_BIND_TO_MIPMAP_TEXTURE */ + 0, /* __DRI_ATTRIB_BIND_TO_TEXTURE_TARGETS */ + EGL_Y_INVERTED_NOK, /* __DRI_ATTRIB_YINVERTED */ + 0, /* __DRI_ATTRIB_FRAMEBUFFER_SRGB_CAPABLE */ }; const __DRIconfig * @@ -154,11 +155,11 @@ struct dri2_egl_config * dri2_add_config(_EGLDisplay *disp, const __DRIconfig *dri_config, int id, - EGLint surface_type, const EGLint *attr_list, - const unsigned int *rgba_masks) + EGLint surface_type, const EGLint *attr_list, + const unsigned int *rgba_masks) { struct dri2_egl_config *conf; - struct dri2_egl_display *dri2_dpy; + struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); _EGLConfig base; unsigned int attrib, value, double_buffer; bool srgb = false; @@ -169,7 +170,6 @@ EGLint config_id; int i; - dri2_dpy = disp->DriverData; _eglInitConfig(&base, disp, id); i = 0; @@ -180,36 +180,36 @@ while (dri2_dpy->core->indexConfigAttrib(dri_config, i++, &attrib, &value)) { switch (attrib) { case __DRI_ATTRIB_RENDER_TYPE: - if (value & __DRI_ATTRIB_RGBA_BIT) - value = EGL_RGB_BUFFER; - else if (value & __DRI_ATTRIB_LUMINANCE_BIT) - value = EGL_LUMINANCE_BUFFER; - else - return NULL; - _eglSetConfigKey(&base, EGL_COLOR_BUFFER_TYPE, value); - break; + if (value & __DRI_ATTRIB_RGBA_BIT) + value = EGL_RGB_BUFFER; + else if (value & __DRI_ATTRIB_LUMINANCE_BIT) + value = EGL_LUMINANCE_BUFFER; + else + return NULL; + _eglSetConfigKey(&base, EGL_COLOR_BUFFER_TYPE, value); + break; case __DRI_ATTRIB_CONFIG_CAVEAT: if (value & __DRI_ATTRIB_NON_CONFORMANT_CONFIG) value = EGL_NON_CONFORMANT_CONFIG; else if (value & __DRI_ATTRIB_SLOW_BIT) value = EGL_SLOW_CONFIG; - else - value = EGL_NONE; - _eglSetConfigKey(&base, EGL_CONFIG_CAVEAT, value); + else + value = EGL_NONE; + _eglSetConfigKey(&base, EGL_CONFIG_CAVEAT, value); break; case __DRI_ATTRIB_BIND_TO_TEXTURE_RGB: - bind_to_texture_rgb = value; - break; + bind_to_texture_rgb = value; + break; case __DRI_ATTRIB_BIND_TO_TEXTURE_RGBA: - bind_to_texture_rgba = value; - break; + bind_to_texture_rgba = value; + break; case __DRI_ATTRIB_DOUBLE_BUFFER: - double_buffer = value; - break; + double_buffer = value; + break; case __DRI_ATTRIB_RED_MASK: dri_masks[0] = value; @@ -252,10 +252,10 @@ break; default: - key = dri2_to_egl_attribute_map[attrib]; - if (key != 0) - _eglSetConfigKey(&base, key, value); - break; + key = dri2_to_egl_attribute_map[attrib]; + if (key != 0) + _eglSetConfigKey(&base, key, value); + break; } } @@ -375,40 +375,50 @@ int offset; }; -static struct dri2_extension_match dri3_driver_extensions[] = { +static const struct dri2_extension_match dri3_driver_extensions[] = { { __DRI_CORE, 1, offsetof(struct dri2_egl_display, core) }, { __DRI_IMAGE_DRIVER, 1, offsetof(struct dri2_egl_display, image_driver) }, { NULL, 0, 0 } }; -static struct dri2_extension_match dri2_driver_extensions[] = { +static const struct dri2_extension_match dri2_driver_extensions[] = { { __DRI_CORE, 1, offsetof(struct dri2_egl_display, core) }, { __DRI_DRI2, 2, offsetof(struct dri2_egl_display, dri2) }, { NULL, 0, 0 } }; -static struct dri2_extension_match dri2_core_extensions[] = { +static const struct dri2_extension_match dri2_core_extensions[] = { { __DRI2_FLUSH, 1, offsetof(struct dri2_egl_display, flush) }, { __DRI_TEX_BUFFER, 2, offsetof(struct dri2_egl_display, tex_buffer) }, { __DRI_IMAGE, 1, offsetof(struct dri2_egl_display, image) }, { NULL, 0, 0 } }; -static struct dri2_extension_match swrast_driver_extensions[] = { +static const struct dri2_extension_match swrast_driver_extensions[] = { { __DRI_CORE, 1, offsetof(struct dri2_egl_display, core) }, { __DRI_SWRAST, 2, offsetof(struct dri2_egl_display, swrast) }, { NULL, 0, 0 } }; -static struct dri2_extension_match swrast_core_extensions[] = { +static const struct dri2_extension_match swrast_core_extensions[] = { { __DRI_TEX_BUFFER, 2, offsetof(struct dri2_egl_display, tex_buffer) }, { NULL, 0, 0 } }; +static const struct dri2_extension_match optional_core_extensions[] = { + { __DRI2_ROBUSTNESS, 1, offsetof(struct dri2_egl_display, robustness) }, + { __DRI2_CONFIG_QUERY, 1, offsetof(struct dri2_egl_display, config) }, + { __DRI2_FENCE, 1, offsetof(struct dri2_egl_display, fence) }, + { __DRI2_RENDERER_QUERY, 1, offsetof(struct dri2_egl_display, rendererQuery) }, + { __DRI2_INTEROP, 1, offsetof(struct dri2_egl_display, interop) }, + { NULL, 0, 0 } +}; + static EGLBoolean dri2_bind_extensions(struct dri2_egl_display *dri2_dpy, - struct dri2_extension_match *matches, - const __DRIextension **extensions) + const struct dri2_extension_match *matches, + const __DRIextension **extensions, + bool optional) { int i, j, ret = EGL_TRUE; void *field; @@ -416,22 +426,28 @@ for (i = 0; extensions[i]; i++) { _eglLog(_EGL_DEBUG, "found extension `%s'", extensions[i]->name); for (j = 0; matches[j].name; j++) { - if (strcmp(extensions[i]->name, matches[j].name) == 0 && - extensions[i]->version >= matches[j].version) { - field = ((char *) dri2_dpy + matches[j].offset); - *(const __DRIextension **) field = extensions[i]; - _eglLog(_EGL_INFO, "found extension %s version %d", - extensions[i]->name, extensions[i]->version); - } + if (strcmp(extensions[i]->name, matches[j].name) == 0 && + extensions[i]->version >= matches[j].version) { + field = ((char *) dri2_dpy + matches[j].offset); + *(const __DRIextension **) field = extensions[i]; + _eglLog(_EGL_INFO, "found extension %s version %d", + extensions[i]->name, extensions[i]->version); + break; + } } } for (j = 0; matches[j].name; j++) { field = ((char *) dri2_dpy + matches[j].offset); if (*(const __DRIextension **) field == NULL) { - _eglLog(_EGL_WARNING, "did not find extension %s version %d", - matches[j].name, matches[j].version); - ret = EGL_FALSE; + if (optional) { + _eglLog(_EGL_DEBUG, "did not find optional extension %s version %d", + matches[j].name, matches[j].version); + } else { + _eglLog(_EGL_WARNING, "did not find extension %s version %d", + matches[j].name, matches[j].version); + ret = EGL_FALSE; + } } } @@ -441,7 +457,7 @@ static const __DRIextension ** dri2_open_driver(_EGLDisplay *disp) { - struct dri2_egl_display *dri2_dpy = disp->DriverData; + struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); const __DRIextension **extensions = NULL; char path[PATH_MAX], *search_paths, *p, *next, *end; char *get_extensions_name; @@ -466,15 +482,15 @@ len = next - p; #if GLX_USE_TLS snprintf(path, sizeof path, - "%.*s/tls/%s_dri.so", len, p, dri2_dpy->driver_name); + "%.*s/tls/%s_dri.so", len, p, dri2_dpy->driver_name); dri2_dpy->driver = dlopen(path, RTLD_NOW | RTLD_GLOBAL); #endif if (dri2_dpy->driver == NULL) { - snprintf(path, sizeof path, - "%.*s/%s_dri.so", len, p, dri2_dpy->driver_name); - dri2_dpy->driver = dlopen(path, RTLD_NOW | RTLD_GLOBAL); - if (dri2_dpy->driver == NULL) - _eglLog(_EGL_DEBUG, "failed to open %s: %s\n", path, dlerror()); + snprintf(path, sizeof path, + "%.*s/%s_dri.so", len, p, dri2_dpy->driver_name); + dri2_dpy->driver = dlopen(path, RTLD_NOW | RTLD_GLOBAL); + if (dri2_dpy->driver == NULL) + _eglLog(_EGL_DEBUG, "failed to open %s: %s\n", path, dlerror()); } /* not need continue to loop all paths once the driver is found */ if (dri2_dpy->driver != NULL) @@ -492,15 +508,15 @@ if (dri2_dpy->driver == NULL) { _eglLog(_EGL_WARNING, - "DRI2: failed to open %s (search paths %s)", - dri2_dpy->driver_name, search_paths); + "DRI2: failed to open %s (search paths %s)", + dri2_dpy->driver_name, search_paths); return NULL; } _eglLog(_EGL_DEBUG, "DRI2: dlopen(%s)", path); - if (asprintf(&get_extensions_name, "%s_%s", - __DRI_DRIVER_GET_EXTENSIONS, dri2_dpy->driver_name) != -1) { + get_extensions_name = loader_get_extensions_name(dri2_dpy->driver_name); + if (get_extensions_name) { get_extensions = dlsym(dri2_dpy->driver, get_extensions_name); if (get_extensions) { extensions = get_extensions(); @@ -515,7 +531,7 @@ extensions = dlsym(dri2_dpy->driver, __DRI_DRIVER_EXTENSIONS); if (extensions == NULL) { _eglLog(_EGL_WARNING, - "DRI2: driver exports no extensions (%s)", dlerror()); + "DRI2: driver exports no extensions (%s)", dlerror()); dlclose(dri2_dpy->driver); } @@ -525,14 +541,14 @@ EGLBoolean dri2_load_driver_dri3(_EGLDisplay *disp) { - struct dri2_egl_display *dri2_dpy = disp->DriverData; + struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); const __DRIextension **extensions; extensions = dri2_open_driver(disp); if (!extensions) return EGL_FALSE; - if (!dri2_bind_extensions(dri2_dpy, dri3_driver_extensions, extensions)) { + if (!dri2_bind_extensions(dri2_dpy, dri3_driver_extensions, extensions, false)) { dlclose(dri2_dpy->driver); return EGL_FALSE; } @@ -544,14 +560,14 @@ EGLBoolean dri2_load_driver(_EGLDisplay *disp) { - struct dri2_egl_display *dri2_dpy = disp->DriverData; + struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); const __DRIextension **extensions; extensions = dri2_open_driver(disp); if (!extensions) return EGL_FALSE; - if (!dri2_bind_extensions(dri2_dpy, dri2_driver_extensions, extensions)) { + if (!dri2_bind_extensions(dri2_dpy, dri2_driver_extensions, extensions, false)) { dlclose(dri2_dpy->driver); return EGL_FALSE; } @@ -563,14 +579,14 @@ EGLBoolean dri2_load_driver_swrast(_EGLDisplay *disp) { - struct dri2_egl_display *dri2_dpy = disp->DriverData; + struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); const __DRIextension **extensions; extensions = dri2_open_driver(disp); if (!extensions) return EGL_FALSE; - if (!dri2_bind_extensions(dri2_dpy, swrast_driver_extensions, extensions)) { + if (!dri2_bind_extensions(dri2_dpy, swrast_driver_extensions, extensions, false)) { dlclose(dri2_dpy->driver); return EGL_FALSE; } @@ -611,18 +627,18 @@ } disp->ClientAPIs = 0; - if (api_mask & (1 <<__DRI_API_OPENGL)) + if ((api_mask & (1 <<__DRI_API_OPENGL)) && _eglIsApiValid(EGL_OPENGL_API)) disp->ClientAPIs |= EGL_OPENGL_BIT; - if (api_mask & (1 <<__DRI_API_GLES)) + if ((api_mask & (1 << __DRI_API_GLES)) && _eglIsApiValid(EGL_OPENGL_ES_API)) disp->ClientAPIs |= EGL_OPENGL_ES_BIT; - if (api_mask & (1 << __DRI_API_GLES2)) + if ((api_mask & (1 << __DRI_API_GLES2)) && _eglIsApiValid(EGL_OPENGL_ES_API)) disp->ClientAPIs |= EGL_OPENGL_ES2_BIT; - if (api_mask & (1 << __DRI_API_GLES3)) + if ((api_mask & (1 << __DRI_API_GLES3)) && _eglIsApiValid(EGL_OPENGL_ES_API)) disp->ClientAPIs |= EGL_OPENGL_ES3_BIT_KHR; assert(dri2_dpy->image_driver || dri2_dpy->dri2 || dri2_dpy->swrast); + disp->Extensions.KHR_no_config_context = EGL_TRUE; disp->Extensions.KHR_surfaceless_context = EGL_TRUE; - disp->Extensions.MESA_configless_context = EGL_TRUE; if (dri2_renderer_query_integer(dri2_dpy, __DRI2_RENDERER_HAS_FRAMEBUFFER_SRGB)) @@ -642,6 +658,12 @@ disp->Extensions.KHR_wait_sync = EGL_TRUE; if (dri2_dpy->fence->get_fence_from_cl_event) disp->Extensions.KHR_cl_event2 = EGL_TRUE; + if (dri2_dpy->fence->base.version >= 2) { + unsigned capabilities = + dri2_dpy->fence->get_capabilities(dri2_dpy->dri_screen); + disp->Extensions.ANDROID_native_fence_sync = + (capabilities & __DRI_FENCE_CAP_NATIVE_FD) != 0; + } } disp->Extensions.KHR_reusable_sync = EGL_TRUE; @@ -689,15 +711,12 @@ dri2_create_screen(_EGLDisplay *disp) { const __DRIextension **extensions; - struct dri2_egl_display *dri2_dpy; - unsigned i; - - dri2_dpy = disp->DriverData; + struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); if (dri2_dpy->image_driver) { dri2_dpy->dri_screen = dri2_dpy->image_driver->createNewScreen2(0, dri2_dpy->fd, - dri2_dpy->extensions, + dri2_dpy->loader_extensions, dri2_dpy->driver_extensions, &dri2_dpy->driver_configs, disp); @@ -705,25 +724,25 @@ if (dri2_dpy->dri2->base.version >= 4) { dri2_dpy->dri_screen = dri2_dpy->dri2->createNewScreen2(0, dri2_dpy->fd, - dri2_dpy->extensions, + dri2_dpy->loader_extensions, dri2_dpy->driver_extensions, &dri2_dpy->driver_configs, disp); } else { dri2_dpy->dri_screen = dri2_dpy->dri2->createNewScreen(0, dri2_dpy->fd, - dri2_dpy->extensions, + dri2_dpy->loader_extensions, &dri2_dpy->driver_configs, disp); } } else { assert(dri2_dpy->swrast); if (dri2_dpy->swrast->base.version >= 4) { dri2_dpy->dri_screen = - dri2_dpy->swrast->createNewScreen2(0, dri2_dpy->extensions, + dri2_dpy->swrast->createNewScreen2(0, dri2_dpy->loader_extensions, dri2_dpy->driver_extensions, &dri2_dpy->driver_configs, disp); } else { dri2_dpy->dri_screen = - dri2_dpy->swrast->createNewScreen(0, dri2_dpy->extensions, + dri2_dpy->swrast->createNewScreen(0, dri2_dpy->loader_extensions, &dri2_dpy->driver_configs, disp); } } @@ -738,31 +757,15 @@ extensions = dri2_dpy->core->getExtensions(dri2_dpy->dri_screen); if (dri2_dpy->image_driver || dri2_dpy->dri2) { - if (!dri2_bind_extensions(dri2_dpy, dri2_core_extensions, extensions)) + if (!dri2_bind_extensions(dri2_dpy, dri2_core_extensions, extensions, false)) goto cleanup_dri_screen; } else { assert(dri2_dpy->swrast); - if (!dri2_bind_extensions(dri2_dpy, swrast_core_extensions, extensions)) + if (!dri2_bind_extensions(dri2_dpy, swrast_core_extensions, extensions, false)) goto cleanup_dri_screen; } - for (i = 0; extensions[i]; i++) { - if (strcmp(extensions[i]->name, __DRI2_ROBUSTNESS) == 0) { - dri2_dpy->robustness = (__DRIrobustnessExtension *) extensions[i]; - } - if (strcmp(extensions[i]->name, __DRI2_CONFIG_QUERY) == 0) { - dri2_dpy->config = (__DRI2configQueryExtension *) extensions[i]; - } - if (strcmp(extensions[i]->name, __DRI2_FENCE) == 0) { - dri2_dpy->fence = (__DRI2fenceExtension *) extensions[i]; - } - if (strcmp(extensions[i]->name, __DRI2_RENDERER_QUERY) == 0) { - dri2_dpy->rendererQuery = (__DRI2rendererQueryExtension *) extensions[i]; - } - if (strcmp(extensions[i]->name, __DRI2_INTEROP) == 0) - dri2_dpy->interop = (__DRI2interopExtension *) extensions[i]; - } - + dri2_bind_extensions(dri2_dpy, optional_core_extensions, extensions, true); dri2_setup_screen(disp); return EGL_TRUE; @@ -858,10 +861,16 @@ * Decrement display reference count, and free up display if necessary. */ static void -dri2_display_release(_EGLDisplay *disp) { - struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); +dri2_display_release(_EGLDisplay *disp) +{ + struct dri2_egl_display *dri2_dpy; unsigned i; + if (!disp) + return; + + dri2_dpy = dri2_egl_display(disp); + assert(dri2_dpy->ref_count > 0); dri2_dpy->ref_count--; @@ -876,9 +885,12 @@ close(dri2_dpy->fd); if (dri2_dpy->driver) dlclose(dri2_dpy->driver); - free(dri2_dpy->device_name); free(dri2_dpy->driver_name); +#ifdef HAVE_WAYLAND_PLATFORM + free(dri2_dpy->device_name); +#endif + switch (disp->Platform) { #ifdef HAVE_X11_PLATFORM case _EGL_PLATFORM_X11: @@ -902,6 +914,7 @@ wl_shm_destroy(dri2_dpy->wl_shm); wl_registry_destroy(dri2_dpy->wl_registry); wl_event_queue_destroy(dri2_dpy->wl_queue); + wl_proxy_wrapper_destroy(dri2_dpy->wl_dpy_wrapper); if (dri2_dpy->own_device) { wl_display_disconnect(dri2_dpy->wl_dpy); } @@ -1059,7 +1072,7 @@ */ static _EGLContext * dri2_create_context(_EGLDriver *drv, _EGLDisplay *disp, _EGLConfig *conf, - _EGLContext *share_list, const EGLint *attrib_list) + _EGLContext *share_list, const EGLint *attrib_list) { struct dri2_egl_context *dri2_ctx; struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); @@ -1081,6 +1094,20 @@ if (!_eglInitContext(&dri2_ctx->base, disp, conf, attrib_list)) goto cleanup; + /* The EGL_EXT_create_context_robustness spec says: + * + * "Add to the eglCreateContext context creation errors: [...] + * + * * If the reset notification behavior of and the + * newly created context are different then an EGL_BAD_MATCH error is + * generated." + */ + if (share_list && share_list->ResetNotificationStrategy != + dri2_ctx->base.ResetNotificationStrategy) { + _eglError(EGL_BAD_MATCH, "eglCreateContext"); + goto cleanup; + } + switch (dri2_ctx->base.ClientAPI) { case EGL_OPENGL_ES_API: switch (dri2_ctx->base.ClientMajorVersion) { @@ -1165,8 +1192,8 @@ &num_attribs)) goto cleanup; - dri2_ctx->dri_context = - dri2_dpy->dri2->createContextAttribs(dri2_dpy->dri_screen, + dri2_ctx->dri_context = + dri2_dpy->dri2->createContextAttribs(dri2_dpy->dri_screen, api, dri_config, shared, @@ -1174,14 +1201,14 @@ ctx_attribs, & error, dri2_ctx); - dri2_create_context_attribs_error(error); + dri2_create_context_attribs_error(error); } else { - dri2_ctx->dri_context = - dri2_dpy->dri2->createNewContextForAPI(dri2_dpy->dri_screen, - api, - dri_config, + dri2_ctx->dri_context = + dri2_dpy->dri2->createNewContextForAPI(dri2_dpy->dri_screen, + api, + dri_config, shared, - dri2_ctx); + dri2_ctx); } } else { assert(dri2_dpy->swrast); @@ -1241,12 +1268,23 @@ return EGL_TRUE; } +static EGLBoolean +dri2_destroy_surface(_EGLDriver *drv, _EGLDisplay *dpy, _EGLSurface *surf) +{ + struct dri2_egl_display *dri2_dpy = dri2_egl_display(dpy); + + if (!_eglPutSurface(surf)) + return EGL_TRUE; + + return dri2_dpy->vtbl->destroy_surface(drv, dpy, surf); +} + /** * Called via eglMakeCurrent(), drv->API.MakeCurrent(). */ static EGLBoolean dri2_make_current(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *dsurf, - _EGLSurface *rsurf, _EGLContext *ctx) + _EGLSurface *rsurf, _EGLContext *ctx) { struct dri2_egl_driver *dri2_drv = dri2_egl_driver(drv); struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); @@ -1268,7 +1306,7 @@ } /* flush before context switch */ - if (old_ctx && dri2_drv->glFlush) + if (old_ctx) dri2_drv->glFlush(); ddraw = (dsurf) ? dri2_dpy->vtbl->get_dri_drawable(dsurf) : NULL; @@ -1283,16 +1321,14 @@ unbind = (cctx == NULL && ddraw == NULL && rdraw == NULL); if (unbind || dri2_dpy->core->bindContext(cctx, ddraw, rdraw)) { - if (old_dsurf) - drv->API.DestroySurface(drv, disp, old_dsurf); - if (old_rsurf) - drv->API.DestroySurface(drv, disp, old_rsurf); + dri2_destroy_surface(drv, disp, old_dsurf); + dri2_destroy_surface(drv, disp, old_rsurf); if (!unbind) dri2_dpy->ref_count++; if (old_ctx) { EGLDisplay old_disp = _eglGetDisplayHandle(old_ctx->Resource.Display); - drv->API.DestroyContext(drv, disp, old_ctx); + dri2_destroy_context(drv, disp, old_ctx); dri2_display_release(old_disp); } @@ -1368,13 +1404,6 @@ } static EGLBoolean -dri2_destroy_surface(_EGLDriver *drv, _EGLDisplay *dpy, _EGLSurface *surf) -{ - struct dri2_egl_display *dri2_dpy = dri2_egl_display(dpy); - return dri2_dpy->vtbl->destroy_surface(drv, dpy, surf); -} - -static EGLBoolean dri2_swap_interval(_EGLDriver *drv, _EGLDisplay *dpy, _EGLSurface *surf, EGLint interval) { @@ -1499,7 +1528,7 @@ static EGLBoolean dri2_bind_tex_image(_EGLDriver *drv, - _EGLDisplay *disp, _EGLSurface *surf, EGLint buffer) + _EGLDisplay *disp, _EGLSurface *surf, EGLint buffer) { struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); struct dri2_egl_context *dri2_ctx; @@ -1534,16 +1563,16 @@ assert(!"Unexpected texture target in dri2_bind_tex_image()"); } - (*dri2_dpy->tex_buffer->setTexBuffer2)(dri2_ctx->dri_context, - target, format, - dri_drawable); + dri2_dpy->tex_buffer->setTexBuffer2(dri2_ctx->dri_context, + target, format, + dri_drawable); return EGL_TRUE; } static EGLBoolean dri2_release_tex_image(_EGLDriver *drv, - _EGLDisplay *disp, _EGLSurface *surf, EGLint buffer) + _EGLDisplay *disp, _EGLSurface *surf, EGLint buffer) { struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); struct dri2_egl_context *dri2_ctx; @@ -1567,9 +1596,8 @@ if (dri2_dpy->tex_buffer->base.version >= 3 && dri2_dpy->tex_buffer->releaseTexBuffer != NULL) { - (*dri2_dpy->tex_buffer->releaseTexBuffer)(dri2_ctx->dri_context, - target, - dri_drawable); + dri2_dpy->tex_buffer->releaseTexBuffer(dri2_ctx->dri_context, + target, dri_drawable); } return EGL_TRUE; @@ -1613,8 +1641,8 @@ static _EGLImage * dri2_create_image_khr_renderbuffer(_EGLDisplay *disp, _EGLContext *ctx, - EGLClientBuffer buffer, - const EGLint *attr_list) + EGLClientBuffer buffer, + const EGLint *attr_list) { struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); struct dri2_egl_context *dri2_ctx = dri2_egl_context(ctx); @@ -1655,8 +1683,8 @@ static _EGLImage * dri2_create_image_wayland_wl_buffer(_EGLDisplay *disp, _EGLContext *ctx, - EGLClientBuffer _buffer, - const EGLint *attr_list) + EGLClientBuffer _buffer, + const EGLint *attr_list) { struct wl_drm_buffer *buffer; struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); @@ -1745,9 +1773,9 @@ static _EGLImage * dri2_create_image_khr_texture(_EGLDisplay *disp, _EGLContext *ctx, - EGLenum target, - EGLClientBuffer buffer, - const EGLint *attr_list) + EGLenum target, + EGLClientBuffer buffer, + const EGLint *attr_list) { struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); struct dri2_egl_context *dri2_ctx = dri2_egl_context(ctx); @@ -1824,6 +1852,16 @@ return &dri2_img->base; } +static EGLBoolean +dri2_query_surface(_EGLDriver *drv, _EGLDisplay *dpy, _EGLSurface *surf, + EGLint attribute, EGLint *value) +{ + struct dri2_egl_display *dri2_dpy = dri2_egl_display(dpy); + if (!dri2_dpy->vtbl->query_surface) + return _eglQuerySurface(drv, dpy, surf, attribute, value); + return dri2_dpy->vtbl->query_surface(drv, dpy, surf, attribute, value); +} + static struct wl_buffer* dri2_create_wayland_buffer_from_image(_EGLDriver *drv, _EGLDisplay *dpy, _EGLImage *img) @@ -1835,7 +1873,7 @@ #ifdef HAVE_LIBDRM static _EGLImage * dri2_create_image_mesa_drm_buffer(_EGLDisplay *disp, _EGLContext *ctx, - EGLClientBuffer buffer, const EGLint *attr_list) + EGLClientBuffer buffer, const EGLint *attr_list) { struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); EGLint format, name, pitch, err; @@ -1851,7 +1889,7 @@ if (attrs.Width <= 0 || attrs.Height <= 0 || attrs.DRMBufferStrideMESA <= 0) { _eglError(EGL_BAD_PARAMETER, - "bad width, height or stride"); + "bad width, height or stride"); return NULL; } @@ -1862,18 +1900,18 @@ break; default: _eglError(EGL_BAD_PARAMETER, - "dri2_create_image_khr: unsupported pixmap depth"); + "dri2_create_image_khr: unsupported pixmap depth"); return NULL; } dri_image = dri2_dpy->image->createImageFromName(dri2_dpy->dri_screen, - attrs.Width, - attrs.Height, - format, - name, - pitch, - NULL); + attrs.Width, + attrs.Height, + format, + name, + pitch, + NULL); return dri2_create_image_from_dri(disp, dri_image); } @@ -2047,7 +2085,7 @@ */ _EGLImage * dri2_create_image_dma_buf(_EGLDisplay *disp, _EGLContext *ctx, - EGLClientBuffer buffer, const EGLint *attr_list) + EGLClientBuffer buffer, const EGLint *attr_list) { struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); _EGLImage *res; @@ -2112,7 +2150,7 @@ } static _EGLImage * dri2_create_drm_image_mesa(_EGLDriver *drv, _EGLDisplay *disp, - const EGLint *attr_list) + const EGLint *attr_list) { struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); struct dri2_egl_image *dri2_img; @@ -2179,7 +2217,7 @@ dri2_img->dri_image = dri2_dpy->image->createImage(dri2_dpy->dri_screen, - attrs.Width, attrs.Height, + attrs.Width, attrs.Height, format, dri_use, dri2_img); if (dri2_img->dri_image == NULL) { err = EGL_BAD_ALLOC; @@ -2197,7 +2235,7 @@ static EGLBoolean dri2_export_drm_image_mesa(_EGLDriver *drv, _EGLDisplay *disp, _EGLImage *img, - EGLint *name, EGLint *handle, EGLint *stride) + EGLint *name, EGLint *handle, EGLint *stride) { struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); struct dri2_egl_image *dri2_img = dri2_egl_image(img); @@ -2205,18 +2243,18 @@ (void) drv; if (name && !dri2_dpy->image->queryImage(dri2_img->dri_image, - __DRI_IMAGE_ATTRIB_NAME, name)) { + __DRI_IMAGE_ATTRIB_NAME, name)) { _eglError(EGL_BAD_ALLOC, "dri2_export_drm_image_mesa"); return EGL_FALSE; } if (handle) dri2_dpy->image->queryImage(dri2_img->dri_image, - __DRI_IMAGE_ATTRIB_HANDLE, handle); + __DRI_IMAGE_ATTRIB_HANDLE, handle); if (stride) dri2_dpy->image->queryImage(dri2_img->dri_image, - __DRI_IMAGE_ATTRIB_STRIDE, stride); + __DRI_IMAGE_ATTRIB_STRIDE, stride); return EGL_TRUE; } @@ -2235,10 +2273,10 @@ if (nplanes) dri2_dpy->image->queryImage(dri2_img->dri_image, - __DRI_IMAGE_ATTRIB_NUM_PLANES, nplanes); + __DRI_IMAGE_ATTRIB_NUM_PLANES, nplanes); if (fourcc) dri2_dpy->image->queryImage(dri2_img->dri_image, - __DRI_IMAGE_ATTRIB_FOURCC, fourcc); + __DRI_IMAGE_ATTRIB_FOURCC, fourcc); if (modifiers) *modifiers = 0; @@ -2258,14 +2296,21 @@ /* rework later to provide multiple fds/strides/offsets */ if (fds) dri2_dpy->image->queryImage(dri2_img->dri_image, - __DRI_IMAGE_ATTRIB_FD, fds); + __DRI_IMAGE_ATTRIB_FD, fds); if (strides) dri2_dpy->image->queryImage(dri2_img->dri_image, - __DRI_IMAGE_ATTRIB_STRIDE, strides); + __DRI_IMAGE_ATTRIB_STRIDE, strides); - if (offsets) - offsets[0] = 0; + if (offsets) { + int img_offset; + bool ret = dri2_dpy->image->queryImage(dri2_img->dri_image, + __DRI_IMAGE_ATTRIB_OFFSET, &img_offset); + if (ret) + offsets[0] = img_offset; + else + offsets[0] = 0; + } return EGL_TRUE; } @@ -2274,8 +2319,8 @@ _EGLImage * dri2_create_image_khr(_EGLDriver *drv, _EGLDisplay *disp, - _EGLContext *ctx, EGLenum target, - EGLClientBuffer buffer, const EGLint *attr_list) + _EGLContext *ctx, EGLenum target, + EGLClientBuffer buffer, const EGLint *attr_list) { (void) drv; @@ -2384,14 +2429,14 @@ } static struct wayland_drm_callbacks wl_drm_callbacks = { - .authenticate = NULL, - .reference_buffer = dri2_wl_reference_buffer, - .release_buffer = dri2_wl_release_buffer + .authenticate = NULL, + .reference_buffer = dri2_wl_reference_buffer, + .release_buffer = dri2_wl_release_buffer }; static EGLBoolean dri2_bind_wayland_display_wl(_EGLDriver *drv, _EGLDisplay *disp, - struct wl_display *wl_dpy) + struct wl_display *wl_dpy) { struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); int flags = 0; @@ -2400,7 +2445,7 @@ (void) drv; if (dri2_dpy->wl_server_drm) - return EGL_FALSE; + return EGL_FALSE; wl_drm_callbacks.authenticate = (int(*)(void *, uint32_t)) dri2_dpy->vtbl->authenticate; @@ -2412,11 +2457,11 @@ flags |= WAYLAND_DRM_PRIME; dri2_dpy->wl_server_drm = - wayland_drm_init(wl_dpy, dri2_dpy->device_name, + wayland_drm_init(wl_dpy, dri2_dpy->device_name, &wl_drm_callbacks, disp, flags); if (!dri2_dpy->wl_server_drm) - return EGL_FALSE; + return EGL_FALSE; #ifdef HAVE_DRM_PLATFORM /* We have to share the wl_drm instance with gbm, so gbm can convert @@ -2430,14 +2475,14 @@ static EGLBoolean dri2_unbind_wayland_display_wl(_EGLDriver *drv, _EGLDisplay *disp, - struct wl_display *wl_dpy) + struct wl_display *wl_dpy) { struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); (void) drv; if (!dri2_dpy->wl_server_drm) - return EGL_FALSE; + return EGL_FALSE; wayland_drm_uninit(dri2_dpy->wl_server_drm); dri2_dpy->wl_server_drm = NULL; @@ -2486,8 +2531,17 @@ struct dri2_egl_sync *dri2_sync) { if (p_atomic_dec_zero(&dri2_sync->refcount)) { - if (dri2_sync->base.Type == EGL_SYNC_REUSABLE_KHR) + switch (dri2_sync->base.Type) { + case EGL_SYNC_REUSABLE_KHR: cnd_destroy(&dri2_sync->cond); + break; + case EGL_SYNC_NATIVE_FENCE_ANDROID: + if (dri2_sync->base.SyncFd != EGL_NO_NATIVE_FENCE_FD_ANDROID) + close(dri2_sync->base.SyncFd); + break; + default: + break; + } if (dri2_sync->fence) dri2_dpy->fence->destroy_fence(dri2_dpy->dri_screen, dri2_sync->fence); @@ -2498,8 +2552,7 @@ static _EGLSync * dri2_create_sync(_EGLDriver *drv, _EGLDisplay *dpy, - EGLenum type, const EGLint *attrib_list, - const EGLAttrib *attrib_list64) + EGLenum type, const EGLAttrib *attrib_list) { _EGLContext *ctx = _eglGetCurrentContext(); struct dri2_egl_display *dri2_dpy = dri2_egl_display(dpy); @@ -2514,8 +2567,7 @@ return NULL; } - if (!_eglInitSync(&dri2_sync->base, dpy, type, attrib_list, - attrib_list64)) { + if (!_eglInitSync(&dri2_sync->base, dpy, type, attrib_list)) { free(dri2_sync); return NULL; } @@ -2580,6 +2632,19 @@ /* initial status of reusable sync must be "unsignaled" */ dri2_sync->base.SyncStatus = EGL_UNSIGNALED_KHR; break; + + case EGL_SYNC_NATIVE_FENCE_ANDROID: + if (dri2_dpy->fence->create_fence_fd) { + dri2_sync->fence = dri2_dpy->fence->create_fence_fd( + dri2_ctx->dri_context, + dri2_sync->base.SyncFd); + } + if (!dri2_sync->fence) { + _eglError(EGL_BAD_ATTRIBUTE, "eglCreateSyncKHR"); + free(dri2_sync); + return NULL; + } + break; } p_atomic_set(&dri2_sync->refcount, 1); @@ -2609,12 +2674,38 @@ ret = EGL_FALSE; } } + dri2_egl_unref_sync(dri2_dpy, dri2_sync); return ret; } static EGLint +dri2_dup_native_fence_fd(_EGLDriver *drv, _EGLDisplay *dpy, _EGLSync *sync) +{ + struct dri2_egl_display *dri2_dpy = dri2_egl_display(dpy); + struct dri2_egl_sync *dri2_sync = dri2_egl_sync(sync); + + assert(sync->Type == EGL_SYNC_NATIVE_FENCE_ANDROID); + + if (sync->SyncFd == EGL_NO_NATIVE_FENCE_FD_ANDROID) { + /* try to retrieve the actual native fence fd.. if rendering is + * not flushed this will just return -1, aka NO_NATIVE_FENCE_FD: + */ + sync->SyncFd = dri2_dpy->fence->get_fence_fd(dri2_dpy->dri_screen, + dri2_sync->fence); + } + + if (sync->SyncFd == EGL_NO_NATIVE_FENCE_FD_ANDROID) { + /* if native fence fd still not created, return an error: */ + _eglError(EGL_BAD_PARAMETER, "eglDupNativeFenceFDANDROID"); + return EGL_NO_NATIVE_FENCE_FD_ANDROID; + } + + return dup(sync->SyncFd); +} + +static EGLint dri2_client_wait_sync(_EGLDriver *drv, _EGLDisplay *dpy, _EGLSync *sync, EGLint flags, EGLTime timeout) { @@ -2644,6 +2735,7 @@ switch (sync->Type) { case EGL_SYNC_FENCE_KHR: + case EGL_SYNC_NATIVE_FENCE_ANDROID: case EGL_SYNC_CL_EVENT_KHR: if (dri2_dpy->fence->client_wait_sync(dri2_ctx ? dri2_ctx->dri_context : NULL, dri2_sync->fence, wait_flags, @@ -2657,25 +2749,14 @@ if (dri2_ctx && dri2_sync->base.SyncStatus == EGL_UNSIGNALED_KHR && (flags & EGL_SYNC_FLUSH_COMMANDS_BIT_KHR)) { /* flush context if EGL_SYNC_FLUSH_COMMANDS_BIT_KHR is set */ - if (dri2_drv->glFlush) - dri2_drv->glFlush(); + dri2_drv->glFlush(); } /* if timeout is EGL_FOREVER_KHR, it should wait without any timeout.*/ if (timeout == EGL_FOREVER_KHR) { - if (mtx_lock(&dri2_sync->mutex)) { - ret = EGL_FALSE; - goto cleanup; - } - - ret = cnd_wait(&dri2_sync->cond, &dri2_sync->mutex); - + mtx_lock(&dri2_sync->mutex); + cnd_wait(&dri2_sync->cond, &dri2_sync->mutex); mtx_unlock(&dri2_sync->mutex); - - if (ret) { - _eglError(EGL_BAD_PARAMETER, "eglClientWaitSyncKHR"); - ret = EGL_FALSE; - } } else { /* if reusable sync has not been yet signaled */ if (dri2_sync->base.SyncStatus != EGL_SIGNALED_KHR) { @@ -2694,38 +2775,25 @@ expire.nsec -= 1000000000L; } - if (mtx_lock(&dri2_sync->mutex)) { - ret = EGL_FALSE; - goto cleanup; - } - + mtx_lock(&dri2_sync->mutex); ret = cnd_timedwait(&dri2_sync->cond, &dri2_sync->mutex, &expire); - mtx_unlock(&dri2_sync->mutex); - if (ret) - if (ret == thrd_busy) { - if (dri2_sync->base.SyncStatus == EGL_UNSIGNALED_KHR) { - ret = EGL_TIMEOUT_EXPIRED_KHR; - } else { - _eglError(EGL_BAD_ACCESS, "eglClientWaitSyncKHR"); - ret = EGL_FALSE; - } + if (ret == thrd_busy) { + if (dri2_sync->base.SyncStatus == EGL_UNSIGNALED_KHR) { + ret = EGL_TIMEOUT_EXPIRED_KHR; + } else { + _eglError(EGL_BAD_ACCESS, "eglClientWaitSyncKHR"); + ret = EGL_FALSE; } + } } } break; } + dri2_egl_unref_sync(dri2_dpy, dri2_sync); - cleanup: - dri2_egl_unref_sync(dri2_dpy, dri2_sync); - - if (ret == EGL_FALSE) { - _eglError(EGL_BAD_ACCESS, "eglClientWaitSyncKHR"); - return EGL_FALSE; - } - - return ret; + return ret; } static EGLBoolean @@ -2805,8 +2873,7 @@ { struct dri2_egl_driver *dri2_drv = dri2_egl_driver(drv); - if (dri2_drv->handle) - dlclose(dri2_drv->handle); + dlclose(dri2_drv->handle); free(dri2_drv); } @@ -2818,6 +2885,8 @@ const char *libname = "libglapi.so"; #elif defined(__APPLE__) const char *libname = "libglapi.0.dylib"; +#elif defined(__CYGWIN__) + const char *libname = "cygglapi-0.dll"; #else const char *libname = "libglapi.so.0"; #endif @@ -2825,28 +2894,36 @@ /* RTLD_GLOBAL to make sure glapi symbols are visible to DRI drivers */ handle = dlopen(libname, RTLD_LAZY | RTLD_GLOBAL); - if (handle) { - dri2_drv->get_proc_address = (_EGLProc (*)(const char *)) - dlsym(handle, "_glapi_get_proc_address"); - if (!dri2_drv->get_proc_address || !libname) { - /* no need to keep a reference */ - dlclose(handle); - handle = NULL; - } + if (!handle) { + _eglLog(_EGL_WARNING, "DRI2: failed to open glapi provider"); + goto no_handle; } + dri2_drv->get_proc_address = (_EGLProc (*)(const char *)) + dlsym(handle, "_glapi_get_proc_address"); + /* if glapi is not available, loading DRI drivers will fail */ if (!dri2_drv->get_proc_address) { _eglLog(_EGL_WARNING, "DRI2: failed to find _glapi_get_proc_address"); - return EGL_FALSE; + goto no_symbol; } dri2_drv->glFlush = (void (*)(void)) dri2_drv->get_proc_address("glFlush"); - dri2_drv->handle = handle; + /* if glFlush is not available things are horribly broken */ + if (!dri2_drv->glFlush) { + _eglLog(_EGL_WARNING, "DRI2: failed to find glFlush entry point"); + goto no_symbol; + } + dri2_drv->handle = handle; return EGL_TRUE; + +no_symbol: + dlclose(handle); +no_handle: + return EGL_FALSE; } /** @@ -2894,6 +2971,7 @@ dri2_drv->base.API.CreateImageKHR = dri2_create_image; dri2_drv->base.API.DestroyImageKHR = dri2_destroy_image_khr; dri2_drv->base.API.CreateWaylandBufferFromImageWL = dri2_create_wayland_buffer_from_image; + dri2_drv->base.API.QuerySurface = dri2_query_surface; #ifdef HAVE_LIBDRM dri2_drv->base.API.CreateDRMImageMESA = dri2_create_drm_image_mesa; dri2_drv->base.API.ExportDRMImageMESA = dri2_export_drm_image_mesa; @@ -2913,6 +2991,7 @@ dri2_drv->base.API.DestroySyncKHR = dri2_destroy_sync; dri2_drv->base.API.GLInteropQueryDeviceInfo = dri2_interop_query_device_info; dri2_drv->base.API.GLInteropExportObject = dri2_interop_export_object; + dri2_drv->base.API.DupNativeFenceFDANDROID = dri2_dup_native_fence_fd; dri2_drv->base.Name = "DRI2"; dri2_drv->base.Unload = dri2_unload; diff -Nru mesa-12.0.6/src/egl/drivers/dri2/egl_dri2_fallbacks.h mesa-17.0.7/src/egl/drivers/dri2/egl_dri2_fallbacks.h --- mesa-12.0.6/src/egl/drivers/dri2/egl_dri2_fallbacks.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/drivers/dri2/egl_dri2_fallbacks.h 2017-06-01 10:37:10.000000000 +0000 @@ -66,7 +66,8 @@ _EGLSurface *surf, const EGLint *rects, EGLint n_rects) { - return EGL_FALSE; + struct dri2_egl_display *dri2_dpy = dri2_egl_display(dpy); + return dri2_dpy->vtbl->swap_buffers(drv, dpy, surf); } static inline EGLBoolean diff -Nru mesa-12.0.6/src/egl/drivers/dri2/egl_dri2.h mesa-17.0.7/src/egl/drivers/dri2/egl_dri2.h --- mesa-12.0.6/src/egl/drivers/dri2/egl_dri2.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/drivers/dri2/egl_dri2.h 2017-06-01 10:37:10.000000000 +0000 @@ -141,6 +141,10 @@ EGLint (*query_buffer_age)(_EGLDriver *drv, _EGLDisplay *dpy, _EGLSurface *surf); + EGLBoolean (*query_surface)(_EGLDriver *drv, _EGLDisplay *dpy, + _EGLSurface *surf, EGLint attribute, + EGLint *value); + struct wl_buffer* (*create_wayland_buffer_from_image)( _EGLDriver *drv, _EGLDisplay *dpy, _EGLImage *img); @@ -180,7 +184,6 @@ int ref_count; int own_device; - int swap_available; int invalidate_available; int min_swap_interval; int max_swap_interval; @@ -189,17 +192,15 @@ struct gbm_dri_device *gbm_dri; #endif - char *device_name; char *driver_name; - __DRIdri2LoaderExtension dri2_loader_extension; - __DRIswrastLoaderExtension swrast_loader_extension; - const __DRIextension *extensions[5]; + const __DRIextension **loader_extensions; const __DRIextension **driver_extensions; #ifdef HAVE_X11_PLATFORM xcb_connection_t *conn; - int screen; + xcb_screen_t *screen; + int swap_available; #ifdef HAVE_DRI3 struct loader_dri3_extensions loader_dri3_ext; #endif @@ -207,18 +208,24 @@ #ifdef HAVE_WAYLAND_PLATFORM struct wl_display *wl_dpy; + struct wl_display *wl_dpy_wrapper; struct wl_registry *wl_registry; struct wl_drm *wl_server_drm; struct wl_drm *wl_drm; struct wl_shm *wl_shm; struct wl_event_queue *wl_queue; - int authenticated; - int formats; + int authenticated; + int formats; uint32_t capabilities; + char *device_name; +#endif + +#ifdef HAVE_ANDROID_PLATFORM + const gralloc_module_t *gralloc; #endif - int is_render_node; - int is_different_gpu; + int is_render_node; + int is_different_gpu; }; struct dri2_egl_context @@ -257,8 +264,12 @@ struct wl_egl_window *wl_win; int dx; int dy; + struct wl_event_queue *wl_queue; + struct wl_surface *wl_surface_wrapper; + struct wl_display *wl_dpy_wrapper; + struct wl_drm *wl_drm_wrapper; struct wl_callback *throttle_callback; - int format; + int format; #endif #ifdef HAVE_DRM_PLATFORM @@ -288,13 +299,18 @@ #ifdef HAVE_ANDROID_PLATFORM struct ANativeWindow *window; struct ANativeWindowBuffer *buffer; - __DRIimage *dri_image; + __DRIimage *dri_image_back; + __DRIimage *dri_image_front; /* EGL-owned buffers */ __DRIbuffer *local_buffers[__DRI_BUFFER_COUNT]; #endif -}; +#if defined(HAVE_SURFACELESS_PLATFORM) + __DRIimage *front; + unsigned int visual; +#endif +}; struct dri2_egl_config { @@ -355,17 +371,17 @@ struct dri2_egl_config * dri2_add_config(_EGLDisplay *disp, const __DRIconfig *dri_config, int id, - EGLint surface_type, const EGLint *attr_list, - const unsigned int *rgba_masks); + EGLint surface_type, const EGLint *attr_list, + const unsigned int *rgba_masks); _EGLImage * dri2_create_image_khr(_EGLDriver *drv, _EGLDisplay *disp, - _EGLContext *ctx, EGLenum target, - EGLClientBuffer buffer, const EGLint *attr_list); + _EGLContext *ctx, EGLenum target, + EGLClientBuffer buffer, const EGLint *attr_list); _EGLImage * dri2_create_image_dma_buf(_EGLDisplay *disp, _EGLContext *ctx, - EGLClientBuffer buffer, const EGLint *attr_list); + EGLClientBuffer buffer, const EGLint *attr_list); EGLBoolean dri2_initialize_x11(_EGLDriver *drv, _EGLDisplay *disp); @@ -389,4 +405,28 @@ dri2_get_dri_config(struct dri2_egl_config *conf, EGLint surface_type, EGLenum colorspace); +static inline void +dri2_set_WL_bind_wayland_display(_EGLDriver *drv, _EGLDisplay *disp) +{ +#ifdef HAVE_WAYLAND_PLATFORM + struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); + + (void) drv; + + if (dri2_dpy->device_name && dri2_dpy->image) { + if (dri2_dpy->image->base.version >= 10 && + dri2_dpy->image->getCapabilities != NULL) { + int capabilities; + + capabilities = + dri2_dpy->image->getCapabilities(dri2_dpy->dri_screen); + disp->Extensions.WL_bind_wayland_display = + (capabilities & __DRI_IMAGE_CAP_GLOBAL_NAMES) != 0; + } else { + disp->Extensions.WL_bind_wayland_display = EGL_TRUE; + } + } +#endif +} + #endif /* EGL_DRI2_INCLUDED */ diff -Nru mesa-12.0.6/src/egl/drivers/dri2/platform_android.c mesa-17.0.7/src/egl/drivers/dri2/platform_android.c --- mesa-12.0.6/src/egl/drivers/dri2/platform_android.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/drivers/dri2/platform_android.c 2017-06-01 10:37:10.000000000 +0000 @@ -31,6 +31,7 @@ #include #include #include +#include #if ANDROID_VERSION >= 0x402 #include @@ -41,6 +42,54 @@ #include "egl_dri2_fallbacks.h" #include "gralloc_drm.h" +#define ALIGN(val, align) (((val) + (align) - 1) & ~((align) - 1)) + +struct droid_yuv_format { + /* Lookup keys */ + int native; /* HAL_PIXEL_FORMAT_ */ + int is_ycrcb; /* 0 if chroma order is {Cb, Cr}, 1 if {Cr, Cb} */ + int chroma_step; /* Distance in bytes between subsequent chroma pixels. */ + + /* Result */ + int fourcc; /* __DRI_IMAGE_FOURCC_ */ +}; + +/* The following table is used to look up a DRI image FourCC based + * on native format and information contained in android_ycbcr struct. */ +static const struct droid_yuv_format droid_yuv_formats[] = { + /* Native format, YCrCb, Chroma step, DRI image FourCC */ + { HAL_PIXEL_FORMAT_YCbCr_420_888, 0, 2, __DRI_IMAGE_FOURCC_NV12 }, + { HAL_PIXEL_FORMAT_YCbCr_420_888, 0, 1, __DRI_IMAGE_FOURCC_YUV420 }, + { HAL_PIXEL_FORMAT_YCbCr_420_888, 1, 1, __DRI_IMAGE_FOURCC_YVU420 }, + { HAL_PIXEL_FORMAT_YV12, 1, 1, __DRI_IMAGE_FOURCC_YVU420 }, +}; + +static int +get_fourcc_yuv(int native, int is_ycrcb, int chroma_step) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(droid_yuv_formats); ++i) + if (droid_yuv_formats[i].native == native && + droid_yuv_formats[i].is_ycrcb == is_ycrcb && + droid_yuv_formats[i].chroma_step == chroma_step) + return droid_yuv_formats[i].fourcc; + + return -1; +} + +static bool +is_yuv(int native) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(droid_yuv_formats); ++i) + if (droid_yuv_formats[i].native == native) + return true; + + return false; +} + static int get_format_bpp(int native) { @@ -52,9 +101,6 @@ case HAL_PIXEL_FORMAT_BGRA_8888: bpp = 4; break; - case HAL_PIXEL_FORMAT_RGB_888: - bpp = 3; - break; case HAL_PIXEL_FORMAT_RGB_565: bpp = 2; break; @@ -67,14 +113,15 @@ } /* createImageFromFds requires fourcc format */ -static int get_fourcc(int format) +static int get_fourcc(int native) { - switch(format) { - case __DRI_IMAGE_FORMAT_RGB565: return __DRI_IMAGE_FOURCC_RGB565; - case __DRI_IMAGE_FORMAT_ARGB8888: return __DRI_IMAGE_FOURCC_ARGB8888; - case __DRI_IMAGE_FORMAT_XRGB8888: return __DRI_IMAGE_FOURCC_XRGB8888; - case __DRI_IMAGE_FORMAT_ABGR8888: return __DRI_IMAGE_FOURCC_ABGR8888; - case __DRI_IMAGE_FORMAT_XBGR8888: return __DRI_IMAGE_FOURCC_XBGR8888; + switch (native) { + case HAL_PIXEL_FORMAT_RGB_565: return __DRI_IMAGE_FOURCC_RGB565; + case HAL_PIXEL_FORMAT_BGRA_8888: return __DRI_IMAGE_FOURCC_ARGB8888; + case HAL_PIXEL_FORMAT_RGBA_8888: return __DRI_IMAGE_FOURCC_ABGR8888; + case HAL_PIXEL_FORMAT_RGBX_8888: return __DRI_IMAGE_FOURCC_XBGR8888; + default: + _eglLog(_EGL_WARNING, "unsupported native buffer format 0x%x", native); } return -1; } @@ -86,13 +133,12 @@ case HAL_PIXEL_FORMAT_RGB_565: return __DRI_IMAGE_FORMAT_RGB565; case HAL_PIXEL_FORMAT_RGBA_8888: return __DRI_IMAGE_FORMAT_ABGR8888; case HAL_PIXEL_FORMAT_RGBX_8888: return __DRI_IMAGE_FORMAT_XBGR8888; - case HAL_PIXEL_FORMAT_RGB_888: - /* unsupported */ default: _eglLog(_EGL_WARNING, "unsupported native buffer format 0x%x", format); } return -1; } + static int get_native_buffer_fd(struct ANativeWindowBuffer *buf) { @@ -196,19 +242,24 @@ mtx_lock(&disp->Mutex); - if (dri2_surf->dri_image) { - dri2_dpy->image->destroyImage(dri2_surf->dri_image); - dri2_surf->dri_image = NULL; + if (dri2_surf->dri_image_back) { + dri2_dpy->image->destroyImage(dri2_surf->dri_image_back); + dri2_surf->dri_image_back = NULL; } return EGL_TRUE; } static void -droid_window_cancel_buffer(_EGLDisplay *disp, struct dri2_egl_surface *dri2_surf) +droid_window_cancel_buffer(struct dri2_egl_surface *dri2_surf) { - /* no cancel buffer? */ - droid_window_enqueue_buffer(disp, dri2_surf); + int ret; + + ret = dri2_surf->window->cancelBuffer(dri2_surf->window, dri2_surf->buffer, -1); + if (ret < 0) { + _eglLog(_EGL_WARNING, "ANativeWindow::cancelBuffer failed"); + dri2_surf->base.Lost = EGL_TRUE; + } } static __DRIbuffer * @@ -287,14 +338,14 @@ window->query(window, NATIVE_WINDOW_HEIGHT, &dri2_surf->base.Height); } - config = dri2_get_dri_config(dri2_conf, EGL_WINDOW_BIT, + config = dri2_get_dri_config(dri2_conf, type, dri2_surf->base.GLColorspace); if (!config) goto cleanup_surface; dri2_surf->dri_drawable = - (*dri2_dpy->dri2->createNewDrawable)(dri2_dpy->dri_screen, config, - dri2_surf); + dri2_dpy->dri2->createNewDrawable(dri2_dpy->dri_screen, config, + dri2_surf); if (dri2_surf->dri_drawable == NULL) { _eglError(EGL_BAD_ALLOC, "dri2->createNewDrawable"); goto cleanup_surface; @@ -336,19 +387,28 @@ struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); struct dri2_egl_surface *dri2_surf = dri2_egl_surface(surf); - if (!_eglPutSurface(surf)) - return EGL_TRUE; - droid_free_local_buffers(dri2_surf); if (dri2_surf->base.Type == EGL_WINDOW_BIT) { if (dri2_surf->buffer) - droid_window_cancel_buffer(disp, dri2_surf); + droid_window_cancel_buffer(dri2_surf); dri2_surf->window->common.decRef(&dri2_surf->window->common); } - (*dri2_dpy->core->destroyDrawable)(dri2_surf->dri_drawable); + if (dri2_surf->dri_image_back) { + _eglLog(_EGL_DEBUG, "%s : %d : destroy dri_image_back", __func__, __LINE__); + dri2_dpy->image->destroyImage(dri2_surf->dri_image_back); + dri2_surf->dri_image_back = NULL; + } + + if (dri2_surf->dri_image_front) { + _eglLog(_EGL_DEBUG, "%s : %d : destroy dri_image_front", __func__, __LINE__); + dri2_dpy->image->destroyImage(dri2_surf->dri_image_front); + dri2_surf->dri_image_front = NULL; + } + + dri2_dpy->core->destroyDrawable(dri2_surf->dri_drawable); free(dri2_surf); @@ -358,12 +418,18 @@ static int update_buffers(struct dri2_egl_surface *dri2_surf) { + if (dri2_surf->base.Lost) + return -1; + if (dri2_surf->base.Type != EGL_WINDOW_BIT) return 0; /* try to dequeue the next back buffer */ - if (!dri2_surf->buffer && !droid_window_dequeue_buffer(dri2_surf)) + if (!dri2_surf->buffer && !droid_window_dequeue_buffer(dri2_surf)) { + _eglLog(_EGL_WARNING, "Could not dequeue buffer from native window"); + dri2_surf->base.Lost = EGL_TRUE; return -1; + } /* free outdated buffers and update the surface size */ if (dri2_surf->base.Width != dri2_surf->buffer->width || @@ -377,47 +443,111 @@ } static int -get_back_bo(struct dri2_egl_surface *dri2_surf) +get_front_bo(struct dri2_egl_surface *dri2_surf, unsigned int format) +{ + struct dri2_egl_display *dri2_dpy = + dri2_egl_display(dri2_surf->base.Resource.Display); + + if (dri2_surf->dri_image_front) + return 0; + + if (dri2_surf->base.Type == EGL_WINDOW_BIT) { + /* According current EGL spec, front buffer rendering + * for window surface is not supported now. + * and mesa doesn't have the implementation of this case. + * Add warning message, but not treat it as error. + */ + _eglLog(_EGL_DEBUG, "DRI driver requested unsupported front buffer for window surface"); + } else if (dri2_surf->base.Type == EGL_PBUFFER_BIT) { + dri2_surf->dri_image_front = + dri2_dpy->image->createImage(dri2_dpy->dri_screen, + dri2_surf->base.Width, + dri2_surf->base.Height, + format, + 0, + dri2_surf); + if (!dri2_surf->dri_image_front) { + _eglLog(_EGL_WARNING, "dri2_image_front allocation failed"); + return -1; + } + } + + return 0; +} + +static int +get_back_bo(struct dri2_egl_surface *dri2_surf, unsigned int format) { struct dri2_egl_display *dri2_dpy = dri2_egl_display(dri2_surf->base.Resource.Display); int fourcc, pitch; int offset = 0, fd; - if (dri2_surf->dri_image) - return 0; + if (dri2_surf->dri_image_back) + return 0; - if (!dri2_surf->buffer) - return -1; + if (dri2_surf->base.Type == EGL_WINDOW_BIT) { + if (!dri2_surf->buffer) { + _eglLog(_EGL_WARNING, "Could not get native buffer"); + return -1; + } - fd = get_native_buffer_fd(dri2_surf->buffer); - if (fd < 0) - return -1; + fd = get_native_buffer_fd(dri2_surf->buffer); + if (fd < 0) { + _eglLog(_EGL_WARNING, "Could not get native buffer FD"); + return -1; + } - fourcc = get_fourcc(get_format(dri2_surf->buffer->format)); + fourcc = get_fourcc(dri2_surf->buffer->format); - pitch = dri2_surf->buffer->stride * - get_format_bpp(dri2_surf->buffer->format); + pitch = dri2_surf->buffer->stride * + get_format_bpp(dri2_surf->buffer->format); - if (fourcc == -1 || pitch == 0) - return -1; + if (fourcc == -1 || pitch == 0) { + _eglLog(_EGL_WARNING, "Invalid buffer fourcc(%x) or pitch(%d)", + fourcc, pitch); + return -1; + } - dri2_surf->dri_image = - dri2_dpy->image->createImageFromFds(dri2_dpy->dri_screen, - dri2_surf->base.Width, - dri2_surf->base.Height, - fourcc, - &fd, - 1, - &pitch, - &offset, - dri2_surf); - if (!dri2_surf->dri_image) - return -1; + dri2_surf->dri_image_back = + dri2_dpy->image->createImageFromFds(dri2_dpy->dri_screen, + dri2_surf->base.Width, + dri2_surf->base.Height, + fourcc, + &fd, + 1, + &pitch, + &offset, + dri2_surf); + if (!dri2_surf->dri_image_back) { + _eglLog(_EGL_WARNING, "failed to create DRI image from FD"); + return -1; + } + } else if (dri2_surf->base.Type == EGL_PBUFFER_BIT) { + /* The EGL 1.5 spec states that pbuffers are single-buffered. Specifically, + * the spec states that they have a back buffer but no front buffer, in + * contrast to pixmaps, which have a front buffer but no back buffer. + * + * Single-buffered surfaces with no front buffer confuse Mesa; so we deviate + * from the spec, following the precedent of Mesa's EGL X11 platform. The + * X11 platform correctly assigns pbuffers to single-buffered configs, but + * assigns the pbuffer a front buffer instead of a back buffer. + * + * Pbuffers in the X11 platform mostly work today, so let's just copy its + * behavior instead of trying to fix (and hence potentially breaking) the + * world. + */ + _eglLog(_EGL_DEBUG, "DRI driver requested unsupported back buffer for pbuffer surface"); + } return 0; } +/* Some drivers will pass multiple bits in buffer_mask. + * For such case, will go through all the bits, and + * will not return error when unsupported buffer is requested, only + * return error when the allocation for supported buffer failed. + */ static int droid_image_get_buffers(__DRIdrawable *driDrawable, unsigned int format, @@ -428,16 +558,32 @@ { struct dri2_egl_surface *dri2_surf = loaderPrivate; + images->image_mask = 0; + images->front = NULL; + images->back = NULL; + if (update_buffers(dri2_surf) < 0) return 0; - if (get_back_bo(dri2_surf) < 0) { - _eglError(EGL_BAD_PARAMETER, "get_back_bo"); - return 0; + if (buffer_mask & __DRI_IMAGE_BUFFER_FRONT) { + if (get_front_bo(dri2_surf, format) < 0) + return 0; + + if (dri2_surf->dri_image_front) { + images->front = dri2_surf->dri_image_front; + images->image_mask |= __DRI_IMAGE_BUFFER_FRONT; + } } - images->image_mask = __DRI_IMAGE_BUFFER_BACK; - images->back = dri2_surf->dri_image; + if (buffer_mask & __DRI_IMAGE_BUFFER_BACK) { + if (get_back_bo(dri2_surf, format) < 0) + return 0; + + if (dri2_surf->dri_image_back) { + images->back = dri2_surf->dri_image_back; + images->image_mask |= __DRI_IMAGE_BUFFER_BACK; + } + } return 1; } @@ -453,63 +599,157 @@ dri2_flush_drawable_for_swapbuffers(disp, draw); + /* dri2_surf->buffer can be null even when no error has occured. For + * example, if the user has called no GL rendering commands since the + * previous eglSwapBuffers, then the driver may have not triggered + * a callback to ANativeWindow::dequeueBuffer, in which case + * dri2_surf->buffer remains null. + */ if (dri2_surf->buffer) droid_window_enqueue_buffer(disp, dri2_surf); - (*dri2_dpy->flush->invalidate)(dri2_surf->dri_drawable); + dri2_dpy->flush->invalidate(dri2_surf->dri_drawable); return EGL_TRUE; } static _EGLImage * -dri2_create_image_android_native_buffer(_EGLDisplay *disp, - _EGLContext *ctx, - struct ANativeWindowBuffer *buf) +droid_create_image_from_prime_fd_yuv(_EGLDisplay *disp, _EGLContext *ctx, + struct ANativeWindowBuffer *buf, int fd) { struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); - struct dri2_egl_image *dri2_img; - int name, fd; - int format; + struct android_ycbcr ycbcr; + size_t offsets[3]; + size_t pitches[3]; + int is_ycrcb; + int fourcc; + int ret; - if (ctx != NULL) { - /* From the EGL_ANDROID_image_native_buffer spec: - * - * * If is EGL_NATIVE_BUFFER_ANDROID and is not - * EGL_NO_CONTEXT, the error EGL_BAD_CONTEXT is generated. - */ - _eglError(EGL_BAD_CONTEXT, "eglCreateEGLImageKHR: for " - "EGL_NATIVE_BUFFER_ANDROID, the context must be " - "EGL_NO_CONTEXT"); + if (!dri2_dpy->gralloc->lock_ycbcr) { + _eglLog(_EGL_WARNING, "Gralloc does not support lock_ycbcr"); return NULL; } - if (!buf || buf->common.magic != ANDROID_NATIVE_BUFFER_MAGIC || - buf->common.version != sizeof(*buf)) { - _eglError(EGL_BAD_PARAMETER, "eglCreateEGLImageKHR"); + memset(&ycbcr, 0, sizeof(ycbcr)); + ret = dri2_dpy->gralloc->lock_ycbcr(dri2_dpy->gralloc, buf->handle, + 0, 0, 0, 0, 0, &ycbcr); + if (ret) { + _eglLog(_EGL_WARNING, "gralloc->lock_ycbcr failed: %d", ret); return NULL; } + dri2_dpy->gralloc->unlock(dri2_dpy->gralloc, buf->handle); - fd = get_native_buffer_fd(buf); - if (fd >= 0) { - const int fourcc = get_fourcc(get_format(buf->format)); - const int pitch = buf->stride * get_format_bpp(buf->format); + /* When lock_ycbcr's usage argument contains no SW_READ/WRITE flags + * it will return the .y/.cb/.cr pointers based on a NULL pointer, + * so they can be interpreted as offsets. */ + offsets[0] = (size_t)ycbcr.y; + /* We assume here that all the planes are located in one DMA-buf. */ + is_ycrcb = (size_t)ycbcr.cr < (size_t)ycbcr.cb; + if (is_ycrcb) { + offsets[1] = (size_t)ycbcr.cr; + offsets[2] = (size_t)ycbcr.cb; + } else { + offsets[1] = (size_t)ycbcr.cb; + offsets[2] = (size_t)ycbcr.cr; + } + + /* .ystride is the line length (in bytes) of the Y plane, + * .cstride is the line length (in bytes) of any of the remaining + * Cb/Cr/CbCr planes, assumed to be the same for Cb and Cr for fully + * planar formats. */ + pitches[0] = ycbcr.ystride; + pitches[1] = pitches[2] = ycbcr.cstride; + + /* .chroma_step is the byte distance between the same chroma channel + * values of subsequent pixels, assumed to be the same for Cb and Cr. */ + fourcc = get_fourcc_yuv(buf->format, is_ycrcb, ycbcr.chroma_step); + if (fourcc == -1) { + _eglLog(_EGL_WARNING, "unsupported YUV format, native = %x, is_ycrcb = %d, chroma_step = %d", + buf->format, is_ycrcb, ycbcr.chroma_step); + return NULL; + } - const EGLint attr_list[14] = { + if (ycbcr.chroma_step == 2) { + /* Semi-planar Y + CbCr or Y + CbCr format. */ + const EGLint attr_list_2plane[] = { EGL_WIDTH, buf->width, EGL_HEIGHT, buf->height, EGL_LINUX_DRM_FOURCC_EXT, fourcc, EGL_DMA_BUF_PLANE0_FD_EXT, fd, - EGL_DMA_BUF_PLANE0_PITCH_EXT, pitch, - EGL_DMA_BUF_PLANE0_OFFSET_EXT, 0, + EGL_DMA_BUF_PLANE0_PITCH_EXT, pitches[0], + EGL_DMA_BUF_PLANE0_OFFSET_EXT, offsets[0], + EGL_DMA_BUF_PLANE1_FD_EXT, fd, + EGL_DMA_BUF_PLANE1_PITCH_EXT, pitches[1], + EGL_DMA_BUF_PLANE1_OFFSET_EXT, offsets[1], EGL_NONE, 0 }; - if (fourcc == -1 || pitch == 0) - return NULL; + return dri2_create_image_dma_buf(disp, ctx, NULL, attr_list_2plane); + } else { + /* Fully planar Y + Cb + Cr or Y + Cr + Cb format. */ + const EGLint attr_list_3plane[] = { + EGL_WIDTH, buf->width, + EGL_HEIGHT, buf->height, + EGL_LINUX_DRM_FOURCC_EXT, fourcc, + EGL_DMA_BUF_PLANE0_FD_EXT, fd, + EGL_DMA_BUF_PLANE0_PITCH_EXT, pitches[0], + EGL_DMA_BUF_PLANE0_OFFSET_EXT, offsets[0], + EGL_DMA_BUF_PLANE1_FD_EXT, fd, + EGL_DMA_BUF_PLANE1_PITCH_EXT, pitches[1], + EGL_DMA_BUF_PLANE1_OFFSET_EXT, offsets[1], + EGL_DMA_BUF_PLANE2_FD_EXT, fd, + EGL_DMA_BUF_PLANE2_PITCH_EXT, pitches[2], + EGL_DMA_BUF_PLANE2_OFFSET_EXT, offsets[2], + EGL_NONE, 0 + }; + + return dri2_create_image_dma_buf(disp, ctx, NULL, attr_list_3plane); + } +} + +static _EGLImage * +droid_create_image_from_prime_fd(_EGLDisplay *disp, _EGLContext *ctx, + struct ANativeWindowBuffer *buf, int fd) +{ + unsigned int pitch; + + if (is_yuv(buf->format)) + return droid_create_image_from_prime_fd_yuv(disp, ctx, buf, fd); + + const int fourcc = get_fourcc(buf->format); + if (fourcc == -1) { + _eglError(EGL_BAD_PARAMETER, "eglCreateEGLImageKHR"); + return NULL; + } - return dri2_create_image_dma_buf(disp, ctx, NULL, attr_list); + pitch = buf->stride * get_format_bpp(buf->format); + if (pitch == 0) { + _eglError(EGL_BAD_PARAMETER, "eglCreateEGLImageKHR"); + return NULL; } + const EGLint attr_list[] = { + EGL_WIDTH, buf->width, + EGL_HEIGHT, buf->height, + EGL_LINUX_DRM_FOURCC_EXT, fourcc, + EGL_DMA_BUF_PLANE0_FD_EXT, fd, + EGL_DMA_BUF_PLANE0_PITCH_EXT, pitch, + EGL_DMA_BUF_PLANE0_OFFSET_EXT, 0, + EGL_NONE, 0 + }; + + return dri2_create_image_dma_buf(disp, ctx, NULL, attr_list); +} + +static _EGLImage * +droid_create_image_from_name(_EGLDisplay *disp, _EGLContext *ctx, + struct ANativeWindowBuffer *buf) +{ + struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); + struct dri2_egl_image *dri2_img; + int name; + int format; + name = get_native_buffer_name(buf); if (!name) { _eglError(EGL_BAD_PARAMETER, "eglCreateEGLImageKHR"); @@ -548,6 +788,64 @@ return &dri2_img->base; } +static EGLBoolean +droid_query_surface(_EGLDriver *drv, _EGLDisplay *dpy, _EGLSurface *surf, + EGLint attribute, EGLint *value) +{ + struct dri2_egl_surface *dri2_surf = dri2_egl_surface(surf); + switch (attribute) { + case EGL_WIDTH: + if (dri2_surf->base.Type == EGL_WINDOW_BIT && dri2_surf->window) { + dri2_surf->window->query(dri2_surf->window, + NATIVE_WINDOW_DEFAULT_WIDTH, value); + return EGL_TRUE; + } + break; + case EGL_HEIGHT: + if (dri2_surf->base.Type == EGL_WINDOW_BIT && dri2_surf->window) { + dri2_surf->window->query(dri2_surf->window, + NATIVE_WINDOW_DEFAULT_HEIGHT, value); + return EGL_TRUE; + } + break; + default: + break; + } + return _eglQuerySurface(drv, dpy, surf, attribute, value); +} + +static _EGLImage * +dri2_create_image_android_native_buffer(_EGLDisplay *disp, + _EGLContext *ctx, + struct ANativeWindowBuffer *buf) +{ + int fd; + + if (ctx != NULL) { + /* From the EGL_ANDROID_image_native_buffer spec: + * + * * If is EGL_NATIVE_BUFFER_ANDROID and is not + * EGL_NO_CONTEXT, the error EGL_BAD_CONTEXT is generated. + */ + _eglError(EGL_BAD_CONTEXT, "eglCreateEGLImageKHR: for " + "EGL_NATIVE_BUFFER_ANDROID, the context must be " + "EGL_NO_CONTEXT"); + return NULL; + } + + if (!buf || buf->common.magic != ANDROID_NATIVE_BUFFER_MAGIC || + buf->common.version != sizeof(*buf)) { + _eglError(EGL_BAD_PARAMETER, "eglCreateEGLImageKHR"); + return NULL; + } + + fd = get_native_buffer_fd(buf); + if (fd >= 0) + return droid_create_image_from_prime_fd(disp, ctx, buf, fd); + + return droid_create_image_from_name(disp, ctx, buf); +} + static _EGLImage * droid_create_image_khr(_EGLDriver *drv, _EGLDisplay *disp, _EGLContext *ctx, EGLenum target, @@ -629,9 +927,6 @@ int *out_count, void *loaderPrivate) { struct dri2_egl_surface *dri2_surf = loaderPrivate; - struct dri2_egl_display *dri2_dpy = - dri2_egl_display(dri2_surf->base.Resource.Display); - int i; if (update_buffers(dri2_surf) < 0) return NULL; @@ -653,16 +948,14 @@ droid_add_configs_for_visuals(_EGLDriver *drv, _EGLDisplay *dpy) { struct dri2_egl_display *dri2_dpy = dri2_egl_display(dpy); - const struct { + static const struct { int format; unsigned int rgba_masks[4]; } visuals[] = { { HAL_PIXEL_FORMAT_RGBA_8888, { 0xff, 0xff00, 0xff0000, 0xff000000 } }, { HAL_PIXEL_FORMAT_RGBX_8888, { 0xff, 0xff00, 0xff0000, 0x0 } }, - { HAL_PIXEL_FORMAT_RGB_888, { 0xff, 0xff00, 0xff0000, 0x0 } }, { HAL_PIXEL_FORMAT_RGB_565, { 0xf800, 0x7e0, 0x1f, 0x0 } }, { HAL_PIXEL_FORMAT_BGRA_8888, { 0xff0000, 0xff00, 0xff, 0xff000000 } }, - { 0, { 0, 0, 0, 0 } } }; EGLint config_attrs[] = { EGL_NATIVE_VISUAL_ID, 0, @@ -671,67 +964,46 @@ EGL_RECORDABLE_ANDROID, EGL_TRUE, EGL_NONE }; + unsigned int format_count[ARRAY_SIZE(visuals)] = { 0 }; int count, i, j; count = 0; - for (i = 0; visuals[i].format; i++) { - int format_count = 0; + for (i = 0; dri2_dpy->driver_configs[i]; i++) { + const EGLint surface_type = EGL_WINDOW_BIT | EGL_PBUFFER_BIT; + struct dri2_egl_config *dri2_conf; + + for (j = 0; j < ARRAY_SIZE(visuals); j++) { + config_attrs[1] = visuals[j].format; + config_attrs[3] = visuals[j].format; - config_attrs[1] = visuals[i].format; - config_attrs[3] = visuals[i].format; - - for (j = 0; dri2_dpy->driver_configs[j]; j++) { - const EGLint surface_type = EGL_WINDOW_BIT | EGL_PBUFFER_BIT; - struct dri2_egl_config *dri2_conf; - unsigned int double_buffered = 0; - - dri2_dpy->core->getConfigAttrib(dri2_dpy->driver_configs[j], - __DRI_ATTRIB_DOUBLE_BUFFER, &double_buffered); - - /* support only double buffered configs */ - if (!double_buffered) - continue; - - dri2_conf = dri2_add_config(dpy, dri2_dpy->driver_configs[j], - count + 1, surface_type, config_attrs, visuals[i].rgba_masks); + dri2_conf = dri2_add_config(dpy, dri2_dpy->driver_configs[i], + count + 1, surface_type, config_attrs, visuals[j].rgba_masks); if (dri2_conf) { count++; - format_count++; + format_count[j]++; } } + } - if (!format_count) { + for (i = 0; i < ARRAY_SIZE(format_count); i++) { + if (!format_count[i]) { _eglLog(_EGL_DEBUG, "No DRI config supports native format 0x%x", - visuals[i].format); + visuals[i].format); } } - /* post-process configs */ - for (i = 0; i < dpy->Configs->Size; i++) { - struct dri2_egl_config *dri2_conf = dri2_egl_config(dpy->Configs->Elements[i]); - - /* there is no front buffer so no OpenGL */ - dri2_conf->base.RenderableType &= ~EGL_OPENGL_BIT; - dri2_conf->base.Conformant &= ~EGL_OPENGL_BIT; - } - return (count != 0); } static int -droid_open_device(void) +droid_open_device(struct dri2_egl_display *dri2_dpy) { - const hw_module_t *mod; - int fd = -1, err; + int fd = -1, err = -EINVAL; - err = hw_get_module(GRALLOC_HARDWARE_MODULE_ID, &mod); - if (!err) { - const gralloc_module_t *gr = (gralloc_module_t *) mod; - - err = -EINVAL; - if (gr->perform) - err = gr->perform(gr, GRALLOC_MODULE_PERFORM_GET_DRM_FD, &fd); - } + if (dri2_dpy->gralloc->perform) + err = dri2_dpy->gralloc->perform(dri2_dpy->gralloc, + GRALLOC_MODULE_PERFORM_GET_DRM_FD, + &fd); if (err || fd < 0) { _eglLog(_EGL_WARNING, "fail to get drm fd"); fd = -1; @@ -786,11 +1058,20 @@ .post_sub_buffer = dri2_fallback_post_sub_buffer, .copy_buffers = dri2_fallback_copy_buffers, .query_buffer_age = dri2_fallback_query_buffer_age, + .query_surface = droid_query_surface, .create_wayland_buffer_from_image = dri2_fallback_create_wayland_buffer_from_image, .get_sync_values = dri2_fallback_get_sync_values, .get_dri_drawable = dri2_surface_get_dri_drawable, }; +static const __DRIdri2LoaderExtension droid_dri2_loader_extension = { + .base = { __DRI_DRI2_LOADER, 3 }, + + .getBuffers = NULL, + .flushFrontBuffer = droid_flush_front_buffer, + .getBuffersWithFormat = droid_get_buffers_with_format, +}; + static const __DRIimageLoaderExtension droid_image_loader_extension = { .base = { __DRI_IMAGE_LOADER, 1 }, @@ -798,11 +1079,26 @@ .flushFrontBuffer = droid_flush_front_buffer, }; +static const __DRIextension *droid_dri2_loader_extensions[] = { + &droid_dri2_loader_extension.base, + &image_lookup_extension.base, + &use_invalidate.base, + NULL, +}; + +static const __DRIextension *droid_image_loader_extensions[] = { + &droid_image_loader_extension.base, + &image_lookup_extension.base, + &use_invalidate.base, + NULL, +}; + EGLBoolean dri2_initialize_android(_EGLDriver *drv, _EGLDisplay *dpy) { struct dri2_egl_display *dri2_dpy; const char *err; + int ret; _eglSetLogProc(droid_log); @@ -812,15 +1108,22 @@ if (!dri2_dpy) return _eglError(EGL_BAD_ALLOC, "eglInitialize"); + ret = hw_get_module(GRALLOC_HARDWARE_MODULE_ID, + (const hw_module_t **)&dri2_dpy->gralloc); + if (ret) { + err = "DRI2: failed to get gralloc module"; + goto cleanup_display; + } + dpy->DriverData = (void *) dri2_dpy; - dri2_dpy->fd = droid_open_device(); + dri2_dpy->fd = droid_open_device(dri2_dpy); if (dri2_dpy->fd < 0) { err = "DRI2: failed to open device"; goto cleanup_display; } - dri2_dpy->driver_name = loader_get_driver_for_fd(dri2_dpy->fd, 0); + dri2_dpy->driver_name = loader_get_driver_for_fd(dri2_dpy->fd); if (dri2_dpy->driver_name == NULL) { err = "DRI2: failed to get driver name"; goto cleanup_device; @@ -835,21 +1138,10 @@ /* render nodes cannot use Gem names, and thus do not support * the __DRI_DRI2_LOADER extension */ - if (!dri2_dpy->is_render_node) { - dri2_dpy->dri2_loader_extension.base.name = __DRI_DRI2_LOADER; - dri2_dpy->dri2_loader_extension.base.version = 3; - dri2_dpy->dri2_loader_extension.getBuffers = NULL; - dri2_dpy->dri2_loader_extension.flushFrontBuffer = droid_flush_front_buffer; - dri2_dpy->dri2_loader_extension.getBuffersWithFormat = - droid_get_buffers_with_format; - dri2_dpy->extensions[0] = &dri2_dpy->dri2_loader_extension.base; - } else { - dri2_dpy->extensions[0] = &droid_image_loader_extension.base; - } - dri2_dpy->extensions[1] = &use_invalidate.base; - dri2_dpy->extensions[2] = &image_lookup_extension.base; - dri2_dpy->extensions[3] = NULL; - + if (!dri2_dpy->is_render_node) + dri2_dpy->loader_extensions = droid_dri2_loader_extensions; + else + dri2_dpy->loader_extensions = droid_image_loader_extensions; if (!dri2_create_screen(dpy)) { err = "DRI2: failed to create screen"; @@ -864,7 +1156,6 @@ dpy->Extensions.ANDROID_framebuffer_target = EGL_TRUE; dpy->Extensions.ANDROID_image_native_buffer = EGL_TRUE; dpy->Extensions.ANDROID_recordable = EGL_TRUE; - dpy->Extensions.KHR_image_base = EGL_TRUE; /* Fill vtbl last to prevent accidentally calling virtual function during * initialization. diff -Nru mesa-12.0.6/src/egl/drivers/dri2/platform_drm.c mesa-17.0.7/src/egl/drivers/dri2/platform_drm.c --- mesa-12.0.6/src/egl/drivers/dri2/platform_drm.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/drivers/dri2/platform_drm.c 2017-06-01 10:37:10.000000000 +0000 @@ -136,15 +136,15 @@ if (dri2_dpy->dri2) { dri2_surf->dri_drawable = - (*dri2_dpy->dri2->createNewDrawable)(dri2_dpy->dri_screen, config, - dri2_surf->gbm_surf); + dri2_dpy->dri2->createNewDrawable(dri2_dpy->dri_screen, config, + dri2_surf->gbm_surf); } else { assert(dri2_dpy->swrast != NULL); dri2_surf->dri_drawable = - (*dri2_dpy->swrast->createNewDrawable)(dri2_dpy->dri_screen, config, - dri2_surf->gbm_surf); + dri2_dpy->swrast->createNewDrawable(dri2_dpy->dri_screen, config, + dri2_surf->gbm_surf); } if (dri2_surf->dri_drawable == NULL) { @@ -191,10 +191,7 @@ struct dri2_egl_surface *dri2_surf = dri2_egl_surface(surf); unsigned i; - if (!_eglPutSurface(surf)) - return EGL_TRUE; - - (*dri2_dpy->core->destroyDrawable)(dri2_surf->dri_drawable); + dri2_dpy->core->destroyDrawable(dri2_surf->dri_drawable); for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) { if (dri2_surf->color_buffers[i].bo) @@ -218,13 +215,15 @@ struct dri2_egl_display *dri2_dpy = dri2_egl_display(dri2_surf->base.Resource.Display); struct gbm_dri_surface *surf = dri2_surf->gbm_surf; + int age = 0; unsigned i; if (dri2_surf->back == NULL) { for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) { - if (!dri2_surf->color_buffers[i].locked) { + if (!dri2_surf->color_buffers[i].locked && + dri2_surf->color_buffers[i].age >= age) { dri2_surf->back = &dri2_surf->color_buffers[i]; - break; + age = dri2_surf->color_buffers[i].age; } } } @@ -417,7 +416,7 @@ unsigned i; if (dri2_dpy->swrast) { - (*dri2_dpy->core->swapBuffers)(dri2_surf->dri_drawable); + dri2_dpy->core->swapBuffers(dri2_surf->dri_drawable); } else { if (dri2_surf->base.Type == EGL_WINDOW_BIT) { if (dri2_surf->current) @@ -439,7 +438,7 @@ } dri2_flush_drawable_for_swapbuffers(disp, draw); - (*dri2_dpy->flush->invalidate)(dri2_surf->dri_drawable); + dri2_dpy->flush->invalidate(dri2_surf->dri_drawable); } return EGL_TRUE; @@ -578,6 +577,64 @@ gbm_dri_bo_unmap_dumb(bo); } +static EGLBoolean +drm_add_configs_for_visuals(_EGLDriver *drv, _EGLDisplay *disp) +{ + struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); + static const struct { + int format; + unsigned int red_mask; + unsigned int alpha_mask; + } visuals[] = { + { GBM_FORMAT_XRGB2101010, 0x3ff00000, 0x00000000 }, + { GBM_FORMAT_ARGB2101010, 0x3ff00000, 0xc0000000 }, + { GBM_FORMAT_XRGB8888, 0x00ff0000, 0x00000000 }, + { GBM_FORMAT_ARGB8888, 0x00ff0000, 0xff000000 }, + { GBM_FORMAT_RGB565, 0x0000f800, 0x00000000 }, + }; + EGLint attr_list[] = { + EGL_NATIVE_VISUAL_ID, 0, + EGL_NONE, + }; + unsigned int format_count[ARRAY_SIZE(visuals)] = { 0 }; + unsigned int count, i, j; + + count = 0; + for (i = 0; dri2_dpy->driver_configs[i]; i++) { + unsigned int red, alpha; + + dri2_dpy->core->getConfigAttrib(dri2_dpy->driver_configs[i], + __DRI_ATTRIB_RED_MASK, &red); + dri2_dpy->core->getConfigAttrib(dri2_dpy->driver_configs[i], + __DRI_ATTRIB_ALPHA_MASK, &alpha); + + for (j = 0; j < ARRAY_SIZE(visuals); j++) { + struct dri2_egl_config *dri2_conf; + + if (visuals[j].red_mask != red || visuals[j].alpha_mask != alpha) + continue; + + attr_list[1] = visuals[j].format; + + dri2_conf = dri2_add_config(disp, dri2_dpy->driver_configs[i], + count + 1, EGL_WINDOW_BIT, attr_list, NULL); + if (dri2_conf) { + count++; + format_count[j]++; + } + } + } + + for (i = 0; i < ARRAY_SIZE(format_count); i++) { + if (!format_count[i]) { + _eglLog(_EGL_DEBUG, "No DRI config supports native format 0x%x", + visuals[i].format); + } + } + + return (count != 0); +} + static struct dri2_egl_display_vtbl dri2_drm_display_vtbl = { .authenticate = dri2_drm_authenticate, .create_window_surface = dri2_drm_create_window_surface, @@ -602,8 +659,8 @@ { struct dri2_egl_display *dri2_dpy; struct gbm_device *gbm; + const char *err; int fd = -1; - int i; loader_set_logger(_eglLog); @@ -621,34 +678,43 @@ fd = loader_open_device(buf); if (fd < 0) fd = loader_open_device("/dev/dri/card0"); - dri2_dpy->own_device = 1; gbm = gbm_create_device(fd); - if (gbm == NULL) + if (gbm == NULL) { + err = "DRI2: failed to create gbm device"; goto cleanup; + } + dri2_dpy->own_device = 1; } else { fd = fcntl(gbm_device_get_fd(gbm), F_DUPFD_CLOEXEC, 3); - if (fd < 0) + if (fd < 0) { + err = "DRI2: failed to fcntl() existing gbm device"; goto cleanup; + } } - if (strcmp(gbm_device_get_backend_name(gbm), "drm") != 0) + if (strcmp(gbm_device_get_backend_name(gbm), "drm") != 0) { + err = "DRI2: gbm device using incorrect/incompatible backend"; goto cleanup; + } dri2_dpy->gbm_dri = gbm_dri_device(gbm); - if (dri2_dpy->gbm_dri->base.type != GBM_DRM_DRIVER_TYPE_DRI) + if (dri2_dpy->gbm_dri->base.type != GBM_DRM_DRIVER_TYPE_DRI) { + err = "DRI2: gbm device using incorrect/incompatible type"; goto cleanup; + } dri2_dpy->fd = fd; - dri2_dpy->device_name = loader_get_device_name_for_fd(dri2_dpy->fd); dri2_dpy->driver_name = strdup(dri2_dpy->gbm_dri->base.driver_name); dri2_dpy->dri_screen = dri2_dpy->gbm_dri->screen; dri2_dpy->core = dri2_dpy->gbm_dri->core; dri2_dpy->dri2 = dri2_dpy->gbm_dri->dri2; + dri2_dpy->fence = dri2_dpy->gbm_dri->fence; dri2_dpy->image = dri2_dpy->gbm_dri->image; dri2_dpy->flush = dri2_dpy->gbm_dri->flush; dri2_dpy->swrast = dri2_dpy->gbm_dri->swrast; dri2_dpy->driver_configs = dri2_dpy->gbm_dri->driver_configs; + dri2_dpy->interop = dri2_dpy->gbm_dri->interop; dri2_dpy->gbm_dri->lookup_image = dri2_lookup_egl_image; dri2_dpy->gbm_dri->lookup_user_data = disp; @@ -666,33 +732,9 @@ dri2_setup_screen(disp); - for (i = 0; dri2_dpy->driver_configs[i]; i++) { - EGLint format, attr_list[3]; - unsigned int red, alpha; - - dri2_dpy->core->getConfigAttrib(dri2_dpy->driver_configs[i], - __DRI_ATTRIB_RED_MASK, &red); - dri2_dpy->core->getConfigAttrib(dri2_dpy->driver_configs[i], - __DRI_ATTRIB_ALPHA_MASK, &alpha); - if (red == 0x3ff00000 && alpha == 0x00000000) - format = GBM_FORMAT_XRGB2101010; - else if (red == 0x3ff00000 && alpha == 0xc0000000) - format = GBM_FORMAT_ARGB2101010; - else if (red == 0x00ff0000 && alpha == 0x00000000) - format = GBM_FORMAT_XRGB8888; - else if (red == 0x00ff0000 && alpha == 0xff000000) - format = GBM_FORMAT_ARGB8888; - else if (red == 0xf800) - format = GBM_FORMAT_RGB565; - else - continue; - - attr_list[0] = EGL_NATIVE_VISUAL_ID; - attr_list[1] = format; - attr_list[2] = EGL_NONE; - - dri2_add_config(disp, dri2_dpy->driver_configs[i], - i + 1, EGL_WINDOW_BIT, attr_list, NULL); + if (!drm_add_configs_for_visuals(drv, disp)) { + err = "DRI2: failed to add configs"; + goto cleanup; } disp->Extensions.KHR_image_pixmap = EGL_TRUE; @@ -700,19 +742,9 @@ disp->Extensions.EXT_buffer_age = EGL_TRUE; #ifdef HAVE_WAYLAND_PLATFORM - if (dri2_dpy->image) { - if (dri2_dpy->image->base.version >= 10 && - dri2_dpy->image->getCapabilities != NULL) { - int capabilities; - - capabilities = - dri2_dpy->image->getCapabilities(dri2_dpy->dri_screen); - disp->Extensions.WL_bind_wayland_display = - (capabilities & __DRI_IMAGE_CAP_GLOBAL_NAMES) != 0; - } else - disp->Extensions.WL_bind_wayland_display = EGL_TRUE; - } + dri2_dpy->device_name = loader_get_device_name_for_fd(dri2_dpy->fd); #endif + dri2_set_WL_bind_wayland_display(drv, disp); /* Fill vtbl last to prevent accidentally calling virtual function during * initialization. @@ -727,5 +759,5 @@ free(dri2_dpy); disp->DriverData = NULL; - return EGL_FALSE; + return _eglError(EGL_NOT_INITIALIZED, err); } diff -Nru mesa-12.0.6/src/egl/drivers/dri2/platform_surfaceless.c mesa-17.0.7/src/egl/drivers/dri2/platform_surfaceless.c --- mesa-12.0.6/src/egl/drivers/dri2/platform_surfaceless.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/drivers/dri2/platform_surfaceless.c 2017-06-01 10:37:10.000000000 +0000 @@ -37,10 +37,204 @@ #include "egl_dri2_fallbacks.h" #include "loader.h" +static __DRIimage* +surfaceless_alloc_image(struct dri2_egl_display *dri2_dpy, + struct dri2_egl_surface *dri2_surf) +{ + return dri2_dpy->image->createImage( + dri2_dpy->dri_screen, + dri2_surf->base.Width, + dri2_surf->base.Height, + dri2_surf->visual, + 0, + NULL); +} + +static void +surfaceless_free_images(struct dri2_egl_surface *dri2_surf) +{ + struct dri2_egl_display *dri2_dpy = + dri2_egl_display(dri2_surf->base.Resource.Display); + + if (dri2_surf->front) { + dri2_dpy->image->destroyImage(dri2_surf->front); + dri2_surf->front = NULL; + } +} + +static int +surfaceless_image_get_buffers(__DRIdrawable *driDrawable, + unsigned int format, + uint32_t *stamp, + void *loaderPrivate, + uint32_t buffer_mask, + struct __DRIimageList *buffers) +{ + struct dri2_egl_surface *dri2_surf = loaderPrivate; + struct dri2_egl_display *dri2_dpy = + dri2_egl_display(dri2_surf->base.Resource.Display); + + buffers->image_mask = 0; + buffers->front = NULL; + buffers->back = NULL; + + /* The EGL 1.5 spec states that pbuffers are single-buffered. Specifically, + * the spec states that they have a back buffer but no front buffer, in + * contrast to pixmaps, which have a front buffer but no back buffer. + * + * Single-buffered surfaces with no front buffer confuse Mesa; so we deviate + * from the spec, following the precedent of Mesa's EGL X11 platform. The + * X11 platform correctly assigns pbuffers to single-buffered configs, but + * assigns the pbuffer a front buffer instead of a back buffer. + * + * Pbuffers in the X11 platform mostly work today, so let's just copy its + * behavior instead of trying to fix (and hence potentially breaking) the + * world. + */ + + if (buffer_mask & __DRI_IMAGE_BUFFER_FRONT) { + + if (!dri2_surf->front) + dri2_surf->front = + surfaceless_alloc_image(dri2_dpy, dri2_surf); + + buffers->image_mask |= __DRI_IMAGE_BUFFER_FRONT; + buffers->front = dri2_surf->front; + } + + return 1; +} + +static _EGLSurface * +dri2_surfaceless_create_surface(_EGLDriver *drv, _EGLDisplay *disp, EGLint type, + _EGLConfig *conf, const EGLint *attrib_list) +{ + struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); + struct dri2_egl_config *dri2_conf = dri2_egl_config(conf); + struct dri2_egl_surface *dri2_surf; + const __DRIconfig *config; + + /* Make sure to calloc so all pointers + * are originally NULL. + */ + dri2_surf = calloc(1, sizeof *dri2_surf); + + if (!dri2_surf) { + _eglError(EGL_BAD_ALLOC, "eglCreatePbufferSurface"); + return NULL; + } + + if (!_eglInitSurface(&dri2_surf->base, disp, type, conf, attrib_list)) + goto cleanup_surface; + + config = dri2_get_dri_config(dri2_conf, type, + dri2_surf->base.GLColorspace); + + if (!config) + goto cleanup_surface; + + dri2_surf->dri_drawable = + dri2_dpy->dri2->createNewDrawable(dri2_dpy->dri_screen, config, + dri2_surf); + if (dri2_surf->dri_drawable == NULL) { + _eglError(EGL_BAD_ALLOC, "dri2->createNewDrawable"); + goto cleanup_surface; + } + + if (conf->RedSize == 5) + dri2_surf->visual = __DRI_IMAGE_FORMAT_RGB565; + else if (conf->AlphaSize == 0) + dri2_surf->visual = __DRI_IMAGE_FORMAT_XRGB8888; + else + dri2_surf->visual = __DRI_IMAGE_FORMAT_ARGB8888; + + return &dri2_surf->base; + + cleanup_surface: + free(dri2_surf); + return NULL; +} + +static EGLBoolean +surfaceless_destroy_surface(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *surf) +{ + struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); + struct dri2_egl_surface *dri2_surf = dri2_egl_surface(surf); + + surfaceless_free_images(dri2_surf); + + dri2_dpy->core->destroyDrawable(dri2_surf->dri_drawable); + + free(dri2_surf); + return EGL_TRUE; +} + +static _EGLSurface * +dri2_surfaceless_create_pbuffer_surface(_EGLDriver *drv, _EGLDisplay *disp, + _EGLConfig *conf, const EGLint *attrib_list) +{ + return dri2_surfaceless_create_surface(drv, disp, EGL_PBUFFER_BIT, conf, + attrib_list); +} + +static EGLBoolean +surfaceless_swap_buffers(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *surf) +{ + assert(!surf || surf->Type == EGL_PBUFFER_BIT); + + /* From the EGL 1.5 spec: + * If surface is a [...] pbuffer surface, eglSwapBuffers has no effect. + */ + return EGL_TRUE; +} + +static EGLBoolean +surfaceless_add_configs_for_visuals(_EGLDriver *drv, _EGLDisplay *dpy) +{ + struct dri2_egl_display *dri2_dpy = dri2_egl_display(dpy); + static const struct { + const char *format_name; + unsigned int rgba_masks[4]; + } visuals[] = { + { "ARGB8888", { 0xff0000, 0xff00, 0xff, 0xff000000 } }, + { "RGB888", { 0xff0000, 0xff00, 0xff, 0x0 } }, + { "RGB565", { 0x00f800, 0x07e0, 0x1f, 0x0 } }, + }; + unsigned int format_count[ARRAY_SIZE(visuals)] = { 0 }; + unsigned int count, i, j; + + count = 0; + for (i = 0; dri2_dpy->driver_configs[i] != NULL; i++) { + for (j = 0; j < ARRAY_SIZE(visuals); j++) { + struct dri2_egl_config *dri2_conf; + + dri2_conf = dri2_add_config(dpy, dri2_dpy->driver_configs[i], + count + 1, EGL_PBUFFER_BIT, NULL, visuals[j].rgba_masks); + + if (dri2_conf) { + count++; + format_count[j]++; + } + } + } + + for (i = 0; i < ARRAY_SIZE(format_count); i++) { + if (!format_count[i]) { + _eglLog(_EGL_DEBUG, "No DRI config supports native format %s", + visuals[i].format_name); + } + } + + return (count != 0); +} + static struct dri2_egl_display_vtbl dri2_surfaceless_display_vtbl = { .create_pixmap_surface = dri2_fallback_create_pixmap_surface, + .create_pbuffer_surface = dri2_surfaceless_create_pbuffer_surface, + .destroy_surface = surfaceless_destroy_surface, .create_image = dri2_create_image_khr, .swap_interval = dri2_fallback_swap_interval, + .swap_buffers = surfaceless_swap_buffers, .swap_buffers_with_damage = dri2_fallback_swap_buffers_with_damage, .swap_buffers_region = dri2_fallback_swap_buffers_region, .post_sub_buffer = dri2_fallback_post_sub_buffer, @@ -48,6 +242,7 @@ .query_buffer_age = dri2_fallback_query_buffer_age, .create_wayland_buffer_from_image = dri2_fallback_create_wayland_buffer_from_image, .get_sync_values = dri2_fallback_get_sync_values, + .get_dri_drawable = dri2_surface_get_dri_drawable, }; static void @@ -55,25 +250,21 @@ { } -static __DRIbuffer * -surfaceless_get_buffers_with_format(__DRIdrawable * driDrawable, - int *width, int *height, - unsigned int *attachments, int count, - int *out_count, void *loaderPrivate) -{ - struct dri2_egl_surface *dri2_surf = loaderPrivate; - - dri2_surf->buffer_count = 1; - if (width) - *width = dri2_surf->base.Width; - if (height) - *height = dri2_surf->base.Height; - *out_count = dri2_surf->buffer_count; - return dri2_surf->buffers; -} +static const __DRIimageLoaderExtension image_loader_extension = { + .base = { __DRI_IMAGE_LOADER, 1 }, + .getBuffers = surfaceless_image_get_buffers, + .flushFrontBuffer = surfaceless_flush_front_buffer, +}; #define DRM_RENDER_DEV_NAME "%s/renderD%d" +static const __DRIextension *image_loader_extensions[] = { + &image_loader_extension.base, + &image_lookup_extension.base, + &use_invalidate.base, + NULL, +}; + EGLBoolean dri2_initialize_surfaceless(_EGLDriver *drv, _EGLDisplay *disp) { @@ -103,7 +294,7 @@ if (dri2_dpy->fd < 0) continue; - dri2_dpy->driver_name = loader_get_driver_for_fd(dri2_dpy->fd, 0); + dri2_dpy->driver_name = loader_get_driver_for_fd(dri2_dpy->fd); if (dri2_dpy->driver_name) { if (dri2_load_driver(disp)) { driver_loaded = 1; @@ -119,31 +310,18 @@ goto cleanup_display; } - dri2_dpy->dri2_loader_extension.base.name = __DRI_DRI2_LOADER; - dri2_dpy->dri2_loader_extension.base.version = 3; - dri2_dpy->dri2_loader_extension.getBuffers = NULL; - dri2_dpy->dri2_loader_extension.flushFrontBuffer = - surfaceless_flush_front_buffer; - dri2_dpy->dri2_loader_extension.getBuffersWithFormat = - surfaceless_get_buffers_with_format; - - dri2_dpy->extensions[0] = &dri2_dpy->dri2_loader_extension.base; - dri2_dpy->extensions[1] = &image_lookup_extension.base; - dri2_dpy->extensions[2] = &use_invalidate.base; - dri2_dpy->extensions[3] = NULL; + dri2_dpy->loader_extensions = image_loader_extensions; if (!dri2_create_screen(disp)) { err = "DRI2: failed to create screen"; goto cleanup_driver; } - for (i = 0; dri2_dpy->driver_configs[i]; i++) { - dri2_add_config(disp, dri2_dpy->driver_configs[i], - i + 1, EGL_WINDOW_BIT, NULL, NULL); + if (!surfaceless_add_configs_for_visuals(drv, disp)) { + err = "DRI2: failed to add configs"; + goto cleanup_screen; } - disp->Extensions.KHR_image_base = EGL_TRUE; - /* Fill vtbl last to prevent accidentally calling virtual function during * initialization. */ @@ -151,6 +329,9 @@ return EGL_TRUE; +cleanup_screen: + dri2_dpy->core->destroyScreen(dri2_dpy->dri_screen); + cleanup_driver: dlclose(dri2_dpy->driver); free(dri2_dpy->driver_name); diff -Nru mesa-12.0.6/src/egl/drivers/dri2/platform_wayland.c mesa-17.0.7/src/egl/drivers/dri2/platform_wayland.c --- mesa-12.0.6/src/egl/drivers/dri2/platform_wayland.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/drivers/dri2/platform_wayland.c 2017-06-01 10:37:10.000000000 +0000 @@ -55,35 +55,10 @@ dri2_wl_swap_interval(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *surf, EGLint interval); -static void -sync_callback(void *data, struct wl_callback *callback, uint32_t serial) -{ - int *done = data; - - *done = 1; - wl_callback_destroy(callback); -} - -static const struct wl_callback_listener sync_listener = { - .done = sync_callback -}; - static int roundtrip(struct dri2_egl_display *dri2_dpy) { - struct wl_callback *callback; - int done = 0, ret = 0; - - callback = wl_display_sync(dri2_dpy->wl_dpy); - wl_callback_add_listener(callback, &sync_listener, &done); - wl_proxy_set_queue((struct wl_proxy *) callback, dri2_dpy->wl_queue); - while (ret != -1 && !done) - ret = wl_display_dispatch_queue(dri2_dpy->wl_dpy, dri2_dpy->wl_queue); - - if (!done) - wl_callback_destroy(callback); - - return ret; + return wl_display_roundtrip_queue(dri2_dpy->wl_dpy, dri2_dpy->wl_queue); } static void @@ -115,7 +90,7 @@ struct dri2_egl_display *dri2_dpy = dri2_egl_display(dri2_surf->base.Resource.Display); - (*dri2_dpy->flush->invalidate)(dri2_surf->dri_drawable); + dri2_dpy->flush->invalidate(dri2_surf->dri_drawable); } static void @@ -129,18 +104,17 @@ * Called via eglCreateWindowSurface(), drv->API.CreateWindowSurface(). */ static _EGLSurface * -dri2_wl_create_surface(_EGLDriver *drv, _EGLDisplay *disp, - _EGLConfig *conf, void *native_window, - const EGLint *attrib_list) +dri2_wl_create_window_surface(_EGLDriver *drv, _EGLDisplay *disp, + _EGLConfig *conf, void *native_window, + const EGLint *attrib_list) { + __DRIcreateNewDrawableFunc createNewDrawable; struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); struct dri2_egl_config *dri2_conf = dri2_egl_config(conf); struct wl_egl_window *window = native_window; struct dri2_egl_surface *dri2_surf; const __DRIconfig *config; - (void) drv; - dri2_surf = calloc(1, sizeof *dri2_surf); if (!dri2_surf) { _eglError(EGL_BAD_ALLOC, "dri2_create_surface"); @@ -150,12 +124,22 @@ if (!_eglInitSurface(&dri2_surf->base, disp, EGL_WINDOW_BIT, conf, attrib_list)) goto cleanup_surf; - if (conf->RedSize == 5) - dri2_surf->format = WL_DRM_FORMAT_RGB565; - else if (conf->AlphaSize == 0) - dri2_surf->format = WL_DRM_FORMAT_XRGB8888; - else - dri2_surf->format = WL_DRM_FORMAT_ARGB8888; + if (dri2_dpy->wl_drm) { + if (conf->RedSize == 5) + dri2_surf->format = WL_DRM_FORMAT_RGB565; + else if (conf->AlphaSize == 0) + dri2_surf->format = WL_DRM_FORMAT_XRGB8888; + else + dri2_surf->format = WL_DRM_FORMAT_ARGB8888; + } else { + assert(dri2_dpy->wl_shm); + if (conf->RedSize == 5) + dri2_surf->format = WL_SHM_FORMAT_RGB565; + else if (conf->AlphaSize == 0) + dri2_surf->format = WL_SHM_FORMAT_XRGB8888; + else + dri2_surf->format = WL_SHM_FORMAT_ARGB8888; + } if (!window) { _eglError(EGL_BAD_NATIVE_WINDOW, "dri2_create_surface"); @@ -163,9 +147,39 @@ } dri2_surf->wl_win = window; + dri2_surf->wl_queue = wl_display_create_queue(dri2_dpy->wl_dpy); + if (!dri2_surf->wl_queue) { + _eglError(EGL_BAD_ALLOC, "dri2_create_surface"); + goto cleanup_surf; + } + + if (dri2_dpy->wl_drm) { + dri2_surf->wl_drm_wrapper = wl_proxy_create_wrapper(dri2_dpy->wl_drm); + if (!dri2_surf->wl_drm_wrapper) { + _eglError(EGL_BAD_ALLOC, "dri2_create_surface"); + goto cleanup_queue; + } + wl_proxy_set_queue((struct wl_proxy *)dri2_surf->wl_drm_wrapper, + dri2_surf->wl_queue); + } + + dri2_surf->wl_dpy_wrapper = wl_proxy_create_wrapper(dri2_dpy->wl_dpy); + if (!dri2_surf->wl_dpy_wrapper) { + _eglError(EGL_BAD_ALLOC, "dri2_create_surface"); + goto cleanup_drm; + } + wl_proxy_set_queue((struct wl_proxy *)dri2_surf->wl_dpy_wrapper, + dri2_surf->wl_queue); + + dri2_surf->wl_surface_wrapper = wl_proxy_create_wrapper(window->surface); + if (!dri2_surf->wl_surface_wrapper) { + _eglError(EGL_BAD_ALLOC, "dri2_create_surface"); + goto cleanup_drm; + } + wl_proxy_set_queue((struct wl_proxy *)dri2_surf->wl_surface_wrapper, + dri2_surf->wl_queue); dri2_surf->wl_win->private = dri2_surf; - dri2_surf->wl_win->resize_callback = resize_callback; dri2_surf->wl_win->destroy_window_callback = destroy_window_callback; dri2_surf->base.Width = -1; @@ -174,41 +188,37 @@ config = dri2_get_dri_config(dri2_conf, EGL_WINDOW_BIT, dri2_surf->base.GLColorspace); - dri2_surf->dri_drawable = - (*dri2_dpy->dri2->createNewDrawable)(dri2_dpy->dri_screen, config, - dri2_surf); - if (dri2_surf->dri_drawable == NULL) { - _eglError(EGL_BAD_ALLOC, "dri2->createNewDrawable"); - goto cleanup_surf; + if (dri2_dpy->dri2) { + dri2_surf->wl_win->resize_callback = resize_callback; + + createNewDrawable = dri2_dpy->dri2->createNewDrawable; + } else { + createNewDrawable = dri2_dpy->swrast->createNewDrawable; } + dri2_surf->dri_drawable = (*createNewDrawable)(dri2_dpy->dri_screen, config, + dri2_surf); + if (dri2_surf->dri_drawable == NULL) { + _eglError(EGL_BAD_ALLOC, "createNewDrawable"); + goto cleanup_surf; + } + + dri2_wl_swap_interval(drv, disp, &dri2_surf->base, + dri2_dpy->default_swap_interval); + return &dri2_surf->base; + cleanup_drm: + if (dri2_surf->wl_drm_wrapper) + wl_proxy_wrapper_destroy(dri2_surf->wl_drm_wrapper); + cleanup_queue: + wl_event_queue_destroy(dri2_surf->wl_queue); cleanup_surf: free(dri2_surf); return NULL; } -/** - * Called via eglCreateWindowSurface(), drv->API.CreateWindowSurface(). - */ -static _EGLSurface * -dri2_wl_create_window_surface(_EGLDriver *drv, _EGLDisplay *disp, - _EGLConfig *conf, void *native_window, - const EGLint *attrib_list) -{ - struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); - _EGLSurface *surf; - - surf = dri2_wl_create_surface(drv, disp, conf, native_window, attrib_list); - - if (surf != NULL) - dri2_wl_swap_interval(drv, disp, surf, dri2_dpy->default_swap_interval); - - return surf; -} - static _EGLSurface * dri2_wl_create_pixmap_surface(_EGLDriver *drv, _EGLDisplay *disp, _EGLConfig *conf, void *native_window, @@ -237,10 +247,7 @@ (void) drv; - if (!_eglPutSurface(surf)) - return EGL_TRUE; - - (*dri2_dpy->core->destroyDrawable)(dri2_surf->dri_drawable); + dri2_dpy->core->destroyDrawable(dri2_surf->dri_drawable); for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) { if (dri2_surf->color_buffers[i].wl_buffer) @@ -271,6 +278,12 @@ dri2_surf->wl_win->destroy_window_callback = NULL; } + if (dri2_surf->wl_drm_wrapper) + wl_proxy_wrapper_destroy(dri2_surf->wl_drm_wrapper); + wl_proxy_wrapper_destroy(dri2_surf->wl_surface_wrapper); + wl_proxy_wrapper_destroy(dri2_surf->wl_dpy_wrapper); + wl_event_queue_destroy(dri2_surf->wl_queue); + free(surf); return EGL_TRUE; @@ -338,16 +351,10 @@ return -1; } - /* We always want to throttle to some event (either a frame callback or - * a sync request) after the commit so that we can be sure the - * compositor has had a chance to handle it and send us a release event - * before we look for a free buffer */ - while (dri2_surf->throttle_callback != NULL) - if (wl_display_dispatch_queue(dri2_dpy->wl_dpy, - dri2_dpy->wl_queue) == -1) - return -1; + /* There might be a buffer release already queued that wasn't processed */ + wl_display_dispatch_queue_pending(dri2_dpy->wl_dpy, dri2_surf->wl_queue); - if (dri2_surf->back == NULL) { + while (dri2_surf->back == NULL) { for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) { /* Get an unlocked buffer, preferrably one with a dri_buffer * already allocated. */ @@ -358,6 +365,14 @@ else if (dri2_surf->back->dri_image == NULL) dri2_surf->back = &dri2_surf->color_buffers[i]; } + + if (dri2_surf->back) + break; + + /* If we don't have a buffer, then block on the server to release one for + * us, and try again. */ + if (wl_display_dispatch_queue(dri2_dpy->wl_dpy, dri2_surf->wl_queue) < 0) + return -1; } if (dri2_surf->back == NULL) @@ -595,6 +610,14 @@ (void) loaderPrivate; } +static const __DRIdri2LoaderExtension dri2_loader_extension = { + .base = { __DRI_DRI2_LOADER, 3 }, + + .getBuffers = dri2_wl_get_buffers, + .flushFrontBuffer = dri2_wl_flush_front_buffer, + .getBuffersWithFormat = dri2_wl_get_buffers_with_format, +}; + static const __DRIimageLoaderExtension image_loader_extension = { .base = { __DRI_IMAGE_LOADER, 1 }, @@ -638,7 +661,7 @@ dri2_dpy->image->queryImage(image, __DRI_IMAGE_ATTRIB_STRIDE, &stride); dri2_surf->current->wl_buffer = - wl_drm_create_prime_buffer(dri2_dpy->wl_drm, + wl_drm_create_prime_buffer(dri2_surf->wl_drm_wrapper, fd, dri2_surf->base.Width, dri2_surf->base.Height, @@ -652,7 +675,7 @@ dri2_dpy->image->queryImage(image, __DRI_IMAGE_ATTRIB_STRIDE, &stride); dri2_surf->current->wl_buffer = - wl_drm_create_buffer(dri2_dpy->wl_drm, + wl_drm_create_buffer(dri2_surf->wl_drm_wrapper, name, dri2_surf->base.Width, dri2_surf->base.Height, @@ -660,8 +683,6 @@ dri2_surf->format); } - wl_proxy_set_queue((struct wl_proxy *) dri2_surf->current->wl_buffer, - dri2_dpy->wl_queue); wl_buffer_add_listener(dri2_surf->current->wl_buffer, &wl_buffer_listener, dri2_surf); } @@ -671,31 +692,21 @@ const EGLint *rects, EGLint n_rects) { -/* The WL_SURFACE_DAMAGE_BUFFER_SINCE_VERSION macro and - * wl_proxy_get_version() were both introduced in wayland 1.10. - * Instead of bumping our wayland dependency we just make this - * function conditional on the required 1.10 features, falling - * back to old (correct but suboptimal) behaviour for older - * wayland. - */ -#ifdef WL_SURFACE_DAMAGE_BUFFER_SINCE_VERSION int i; - if (wl_proxy_get_version((struct wl_proxy *) dri2_surf->wl_win->surface) + if (wl_proxy_get_version((struct wl_proxy *) dri2_surf->wl_surface_wrapper) < WL_SURFACE_DAMAGE_BUFFER_SINCE_VERSION) return EGL_FALSE; for (i = 0; i < n_rects; i++) { const int *rect = &rects[i * 4]; - wl_surface_damage_buffer(dri2_surf->wl_win->surface, + wl_surface_damage_buffer(dri2_surf->wl_surface_wrapper, rect[0], dri2_surf->base.Height - rect[1] - rect[3], rect[2], rect[3]); } return EGL_TRUE; -#endif - return EGL_FALSE; } /** * Called via eglSwapBuffers(), drv->API.SwapBuffers(). @@ -711,6 +722,11 @@ struct dri2_egl_surface *dri2_surf = dri2_egl_surface(draw); int i; + while (dri2_surf->throttle_callback != NULL) + if (wl_display_dispatch_queue(dri2_dpy->wl_dpy, + dri2_surf->wl_queue) == -1) + return -1; + for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) if (dri2_surf->color_buffers[i].age > 0) dri2_surf->color_buffers[i].age++; @@ -724,11 +740,9 @@ if (draw->SwapInterval > 0) { dri2_surf->throttle_callback = - wl_surface_frame(dri2_surf->wl_win->surface); + wl_surface_frame(dri2_surf->wl_surface_wrapper); wl_callback_add_listener(dri2_surf->throttle_callback, &throttle_listener, dri2_surf); - wl_proxy_set_queue((struct wl_proxy *) dri2_surf->throttle_callback, - dri2_dpy->wl_queue); } dri2_surf->back->age = 1; @@ -737,7 +751,7 @@ create_wl_buffer(dri2_surf); - wl_surface_attach(dri2_surf->wl_win->surface, + wl_surface_attach(dri2_surf->wl_surface_wrapper, dri2_surf->current->wl_buffer, dri2_surf->dx, dri2_surf->dy); @@ -751,7 +765,7 @@ * ignore the damage region and post maximum damage, due to * https://bugs.freedesktop.org/78190 */ if (!n_rects || !try_damage_buffer(dri2_surf, rects, n_rects)) - wl_surface_damage(dri2_surf->wl_win->surface, + wl_surface_damage(dri2_surf->wl_surface_wrapper, 0, 0, INT32_MAX, INT32_MAX); if (dri2_dpy->is_different_gpu) { @@ -767,20 +781,18 @@ } dri2_flush_drawable_for_swapbuffers(disp, draw); - (*dri2_dpy->flush->invalidate)(dri2_surf->dri_drawable); + dri2_dpy->flush->invalidate(dri2_surf->dri_drawable); - wl_surface_commit(dri2_surf->wl_win->surface); + wl_surface_commit(dri2_surf->wl_surface_wrapper); /* If we're not waiting for a frame callback then we'll at least throttle * to a sync callback so that we always give a chance for the compositor to * handle the commit and send a release event before checking for a free * buffer */ if (dri2_surf->throttle_callback == NULL) { - dri2_surf->throttle_callback = wl_display_sync(dri2_dpy->wl_dpy); + dri2_surf->throttle_callback = wl_display_sync(dri2_surf->wl_dpy_wrapper); wl_callback_add_listener(dri2_surf->throttle_callback, &throttle_listener, dri2_surf); - wl_proxy_set_queue((struct wl_proxy *) dri2_surf->throttle_callback, - dri2_dpy->wl_queue); } wl_display_flush(dri2_dpy->wl_dpy); @@ -1074,17 +1086,68 @@ .get_dri_drawable = dri2_surface_get_dri_drawable, }; +static const __DRIextension *dri2_loader_extensions[] = { + &dri2_loader_extension.base, + &image_loader_extension.base, + &image_lookup_extension.base, + &use_invalidate.base, + NULL, +}; + +static const __DRIextension *image_loader_extensions[] = { + &image_loader_extension.base, + &image_lookup_extension.base, + &use_invalidate.base, + NULL, +}; + +static EGLBoolean +dri2_wl_add_configs_for_visuals(_EGLDriver *drv, _EGLDisplay *disp) +{ + struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); + static const struct { + const char *format_name; + int has_format; + unsigned int rgba_masks[4]; + } visuals[] = { + { "XRGB8888", HAS_XRGB8888, { 0xff0000, 0xff00, 0x00ff, 0xff000000 } }, + { "ARGB8888", HAS_ARGB8888, { 0xff0000, 0xff00, 0x00ff, 0 } }, + { "RGB565", HAS_RGB565, { 0x00f800, 0x07e0, 0x001f, 0 } }, + }; + unsigned int format_count[ARRAY_SIZE(visuals)] = { 0 }; + unsigned int count, i, j; + + count = 0; + for (i = 0; dri2_dpy->driver_configs[i]; i++) { + for (j = 0; j < ARRAY_SIZE(visuals); j++) { + struct dri2_egl_config *dri2_conf; + + if (!(dri2_dpy->formats & visuals[j].has_format)) + continue; + + dri2_conf = dri2_add_config(disp, dri2_dpy->driver_configs[i], + count + 1, EGL_WINDOW_BIT, NULL, visuals[j].rgba_masks); + if (dri2_conf) { + count++; + format_count[j]++; + } + } + } + + for (i = 0; i < ARRAY_SIZE(format_count); i++) { + if (!format_count[i]) { + _eglLog(_EGL_DEBUG, "No DRI config supports native format %s", + visuals[i].format_name); + } + } + + return (count != 0); +} + static EGLBoolean dri2_initialize_wayland_drm(_EGLDriver *drv, _EGLDisplay *disp) { struct dri2_egl_display *dri2_dpy; - const __DRIconfig *config; - uint32_t types; - int i; - static const unsigned int argb_masks[4] = - { 0xff0000, 0xff00, 0xff, 0xff000000 }; - static const unsigned int rgb_masks[4] = { 0xff0000, 0xff00, 0xff, 0 }; - static const unsigned int rgb565_masks[4] = { 0xf800, 0x07e0, 0x001f, 0 }; loader_set_logger(_eglLog); @@ -1104,12 +1167,17 @@ dri2_dpy->wl_queue = wl_display_create_queue(dri2_dpy->wl_dpy); + dri2_dpy->wl_dpy_wrapper = wl_proxy_create_wrapper(dri2_dpy->wl_dpy); + if (dri2_dpy->wl_dpy_wrapper == NULL) + goto cleanup_dpy_wrapper; + + wl_proxy_set_queue((struct wl_proxy *) dri2_dpy->wl_dpy_wrapper, + dri2_dpy->wl_queue); + if (dri2_dpy->own_device) wl_display_dispatch_pending(dri2_dpy->wl_dpy); - dri2_dpy->wl_registry = wl_display_get_registry(dri2_dpy->wl_dpy); - wl_proxy_set_queue((struct wl_proxy *) dri2_dpy->wl_registry, - dri2_dpy->wl_queue); + dri2_dpy->wl_registry = wl_display_get_registry(dri2_dpy->wl_dpy_wrapper); wl_registry_add_listener(dri2_dpy->wl_registry, ®istry_listener_drm, dri2_dpy); if (roundtrip(dri2_dpy) < 0 || dri2_dpy->wl_drm == NULL) @@ -1139,7 +1207,7 @@ * the server by requesting its pci-id */ dri2_dpy->is_render_node = drmGetNodeTypeFromFd(dri2_dpy->fd) == DRM_NODE_RENDER; - dri2_dpy->driver_name = loader_get_driver_for_fd(dri2_dpy->fd, 0); + dri2_dpy->driver_name = loader_get_driver_for_fd(dri2_dpy->fd); if (dri2_dpy->driver_name == NULL) { _eglError(EGL_BAD_ALLOC, "DRI2: failed to get driver name"); goto cleanup_fd; @@ -1148,25 +1216,12 @@ if (!dri2_load_driver(disp)) goto cleanup_driver_name; - dri2_dpy->extensions[0] = &image_loader_extension.base; - dri2_dpy->extensions[1] = &image_lookup_extension.base; - dri2_dpy->extensions[2] = &use_invalidate.base; - /* render nodes cannot use Gem names, and thus do not support * the __DRI_DRI2_LOADER extension */ - if (!dri2_dpy->is_render_node) { - dri2_dpy->dri2_loader_extension.base.name = __DRI_DRI2_LOADER; - dri2_dpy->dri2_loader_extension.base.version = 3; - dri2_dpy->dri2_loader_extension.getBuffers = dri2_wl_get_buffers; - dri2_dpy->dri2_loader_extension.flushFrontBuffer = dri2_wl_flush_front_buffer; - dri2_dpy->dri2_loader_extension.getBuffersWithFormat = - dri2_wl_get_buffers_with_format; - dri2_dpy->extensions[3] = &dri2_dpy->dri2_loader_extension.base; - dri2_dpy->extensions[4] = NULL; - } else - dri2_dpy->extensions[3] = NULL; - - dri2_dpy->swap_available = EGL_TRUE; + if (!dri2_dpy->is_render_node) + dri2_dpy->loader_extensions = dri2_loader_extensions; + else + dri2_dpy->loader_extensions = image_loader_extensions; if (!dri2_create_screen(disp)) goto cleanup_driver; @@ -1200,18 +1255,12 @@ goto cleanup_screen; } - types = EGL_WINDOW_BIT; - for (i = 0; dri2_dpy->driver_configs[i]; i++) { - config = dri2_dpy->driver_configs[i]; - if (dri2_dpy->formats & HAS_XRGB8888) - dri2_add_config(disp, config, i + 1, types, NULL, rgb_masks); - if (dri2_dpy->formats & HAS_ARGB8888) - dri2_add_config(disp, config, i + 1, types, NULL, argb_masks); - if (dri2_dpy->formats & HAS_RGB565) - dri2_add_config(disp, config, i + 1, types, NULL, rgb565_masks); + if (!dri2_wl_add_configs_for_visuals(drv, disp)) { + _eglError(EGL_NOT_INITIALIZED, "DRI2: failed to add configs"); + goto cleanup_screen; } - disp->Extensions.WL_bind_wayland_display = EGL_TRUE; + dri2_set_WL_bind_wayland_display(drv, disp); /* When cannot convert EGLImage to wl_buffer when on a different gpu, * because the buffer of the EGLImage has likely a tiling mode the server * gpu won't support. These is no way to check for now. Thus do not support the @@ -1246,7 +1295,11 @@ wl_drm_destroy(dri2_dpy->wl_drm); cleanup_registry: wl_registry_destroy(dri2_dpy->wl_registry); + wl_proxy_wrapper_destroy(dri2_dpy->wl_dpy_wrapper); + cleanup_dpy_wrapper: wl_event_queue_destroy(dri2_dpy->wl_queue); + if (disp->PlatformDisplay == NULL) + wl_display_disconnect(dri2_dpy->wl_dpy); cleanup_dpy: free(dri2_dpy); disp->DriverData = NULL; @@ -1380,11 +1433,13 @@ static EGLBoolean -dri2_wl_swrast_allocate_buffer(struct dri2_egl_display *dri2_dpy, +dri2_wl_swrast_allocate_buffer(struct dri2_egl_surface *dri2_surf, int format, int w, int h, void **data, int *size, struct wl_buffer **buffer) { + struct dri2_egl_display *dri2_dpy = + dri2_egl_display(dri2_surf->base.Resource.Display); struct wl_shm_pool *pool; int fd, stride, size_map; void *data_map; @@ -1405,6 +1460,7 @@ /* Share it in a wl_buffer */ pool = wl_shm_create_pool(dri2_dpy->wl_shm, fd, size_map); + wl_proxy_set_queue((struct wl_proxy *)pool, dri2_surf->wl_queue); *buffer = wl_shm_pool_create_buffer(pool, 0, w, h, stride, format); wl_shm_pool_destroy(pool); close(fd); @@ -1439,14 +1495,8 @@ /* find back buffer */ - /* We always want to throttle to some event (either a frame callback or - * a sync request) after the commit so that we can be sure the - * compositor has had a chance to handle it and send us a release event - * before we look for a free buffer */ - while (dri2_surf->throttle_callback != NULL) - if (wl_display_dispatch_queue(dri2_dpy->wl_dpy, - dri2_dpy->wl_queue) == -1) - return -1; + /* There might be a buffer release already queued that wasn't processed */ + wl_display_dispatch_queue_pending(dri2_dpy->wl_dpy, dri2_surf->wl_queue); /* try get free buffer already created */ for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) { @@ -1462,7 +1512,7 @@ for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) { if (!dri2_surf->color_buffers[i].locked) { dri2_surf->back = &dri2_surf->color_buffers[i]; - if (!dri2_wl_swrast_allocate_buffer(dri2_dpy, + if (!dri2_wl_swrast_allocate_buffer(dri2_surf, dri2_surf->format, dri2_surf->base.Width, dri2_surf->base.Height, @@ -1472,8 +1522,6 @@ _eglError(EGL_BAD_ALLOC, "failed to allocate color buffer"); return -1; } - wl_proxy_set_queue((struct wl_proxy *) dri2_surf->back->wl_buffer, - dri2_dpy->wl_queue); wl_buffer_add_listener(dri2_surf->back->wl_buffer, &wl_buffer_listener, dri2_surf); break; @@ -1527,19 +1575,22 @@ { struct dri2_egl_display *dri2_dpy = dri2_egl_display(dri2_surf->base.Resource.Display); + while (dri2_surf->throttle_callback != NULL) + if (wl_display_dispatch_queue(dri2_dpy->wl_dpy, + dri2_surf->wl_queue) == -1) + return; + if (dri2_surf->base.SwapInterval > 0) { dri2_surf->throttle_callback = - wl_surface_frame(dri2_surf->wl_win->surface); + wl_surface_frame(dri2_surf->wl_surface_wrapper); wl_callback_add_listener(dri2_surf->throttle_callback, &throttle_listener, dri2_surf); - wl_proxy_set_queue((struct wl_proxy *) dri2_surf->throttle_callback, - dri2_dpy->wl_queue); } dri2_surf->current = dri2_surf->back; dri2_surf->back = NULL; - wl_surface_attach(dri2_surf->wl_win->surface, + wl_surface_attach(dri2_surf->wl_surface_wrapper, dri2_surf->current->wl_buffer, dri2_surf->dx, dri2_surf->dy); @@ -1549,20 +1600,18 @@ dri2_surf->dx = 0; dri2_surf->dy = 0; - wl_surface_damage(dri2_surf->wl_win->surface, + wl_surface_damage(dri2_surf->wl_surface_wrapper, 0, 0, INT32_MAX, INT32_MAX); - wl_surface_commit(dri2_surf->wl_win->surface); + wl_surface_commit(dri2_surf->wl_surface_wrapper); /* If we're not waiting for a frame callback then we'll at least throttle * to a sync callback so that we always give a chance for the compositor to * handle the commit and send a release event before checking for a free * buffer */ if (dri2_surf->throttle_callback == NULL) { - dri2_surf->throttle_callback = wl_display_sync(dri2_dpy->wl_dpy); + dri2_surf->throttle_callback = wl_display_sync(dri2_dpy->wl_dpy_wrapper); wl_callback_add_listener(dri2_surf->throttle_callback, &throttle_listener, dri2_surf); - wl_proxy_set_queue((struct wl_proxy *) dri2_surf->throttle_callback, - dri2_dpy->wl_queue); } wl_display_flush(dri2_dpy->wl_dpy); @@ -1673,69 +1722,6 @@ stride, data, loaderPrivate); } -/** - * Called via eglCreateWindowSurface(), drv->API.CreateWindowSurface(). - */ -static _EGLSurface * -dri2_wl_swrast_create_window_surface(_EGLDriver *drv, _EGLDisplay *disp, - _EGLConfig *conf, void *native_window, - const EGLint *attrib_list) -{ - struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); - struct dri2_egl_config *dri2_conf = dri2_egl_config(conf); - struct wl_egl_window *window = native_window; - struct dri2_egl_surface *dri2_surf; - const __DRIconfig *config; - - (void) drv; - - dri2_surf = calloc(1, sizeof *dri2_surf); - if (!dri2_surf) { - _eglError(EGL_BAD_ALLOC, "dri2_create_surface"); - return NULL; - } - - if (!_eglInitSurface(&dri2_surf->base, disp, EGL_WINDOW_BIT, conf, attrib_list)) - goto cleanup_surf; - - if (conf->RedSize == 5) - dri2_surf->format = WL_SHM_FORMAT_RGB565; - else if (conf->AlphaSize == 0) - dri2_surf->format = WL_SHM_FORMAT_XRGB8888; - else - dri2_surf->format = WL_SHM_FORMAT_ARGB8888; - - dri2_surf->wl_win = window; - dri2_surf->wl_win->private = dri2_surf; - dri2_surf->wl_win->destroy_window_callback = destroy_window_callback; - - dri2_surf->base.Width = -1; - dri2_surf->base.Height = -1; - - config = dri2_get_dri_config(dri2_conf, EGL_WINDOW_BIT, - dri2_surf->base.GLColorspace); - - dri2_surf->dri_drawable = - (*dri2_dpy->swrast->createNewDrawable)(dri2_dpy->dri_screen, - config, dri2_surf); - if (dri2_surf->dri_drawable == NULL) { - _eglError(EGL_BAD_ALLOC, "swrast->createNewDrawable"); - goto cleanup_dri_drawable; - } - - dri2_wl_swap_interval(drv, disp, &dri2_surf->base, - dri2_dpy->default_swap_interval); - - return &dri2_surf->base; - - cleanup_dri_drawable: - dri2_dpy->core->destroyDrawable(dri2_surf->dri_drawable); - cleanup_surf: - free(dri2_surf); - - return NULL; -} - static EGLBoolean dri2_wl_swrast_swap_buffers(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *draw) { @@ -1788,7 +1774,7 @@ static struct dri2_egl_display_vtbl dri2_wl_swrast_display_vtbl = { .authenticate = NULL, - .create_window_surface = dri2_wl_swrast_create_window_surface, + .create_window_surface = dri2_wl_create_window_surface, .create_pixmap_surface = dri2_wl_create_pixmap_surface, .create_pbuffer_surface = dri2_fallback_create_pbuffer_surface, .destroy_surface = dri2_wl_destroy_surface, @@ -1805,17 +1791,24 @@ .get_dri_drawable = dri2_surface_get_dri_drawable, }; +static const __DRIswrastLoaderExtension swrast_loader_extension = { + .base = { __DRI_SWRAST_LOADER, 2 }, + + .getDrawableInfo = dri2_wl_swrast_get_drawable_info, + .putImage = dri2_wl_swrast_put_image, + .getImage = dri2_wl_swrast_get_image, + .putImage2 = dri2_wl_swrast_put_image2, +}; + +static const __DRIextension *swrast_loader_extensions[] = { + &swrast_loader_extension.base, + NULL, +}; + static EGLBoolean dri2_initialize_wayland_swrast(_EGLDriver *drv, _EGLDisplay *disp) { struct dri2_egl_display *dri2_dpy; - const __DRIconfig *config; - uint32_t types; - int i; - static const unsigned int argb_masks[4] = - { 0xff0000, 0xff00, 0xff, 0xff000000 }; - static const unsigned int rgb_masks[4] = { 0xff0000, 0xff00, 0xff, 0 }; - static const unsigned int rgb565_masks[4] = { 0xf800, 0x07e0, 0x001f, 0 }; loader_set_logger(_eglLog); @@ -1835,12 +1828,17 @@ dri2_dpy->wl_queue = wl_display_create_queue(dri2_dpy->wl_dpy); + dri2_dpy->wl_dpy_wrapper = wl_proxy_create_wrapper(dri2_dpy->wl_dpy); + if (dri2_dpy->wl_dpy_wrapper == NULL) + goto cleanup_dpy_wrapper; + + wl_proxy_set_queue((struct wl_proxy *) dri2_dpy->wl_dpy_wrapper, + dri2_dpy->wl_queue); + if (dri2_dpy->own_device) wl_display_dispatch_pending(dri2_dpy->wl_dpy); - dri2_dpy->wl_registry = wl_display_get_registry(dri2_dpy->wl_dpy); - wl_proxy_set_queue((struct wl_proxy *) dri2_dpy->wl_registry, - dri2_dpy->wl_queue); + dri2_dpy->wl_registry = wl_display_get_registry(dri2_dpy->wl_dpy_wrapper); wl_registry_add_listener(dri2_dpy->wl_registry, ®istry_listener_swrast, dri2_dpy); @@ -1855,30 +1853,16 @@ if (!dri2_load_driver_swrast(disp)) goto cleanup_shm; - dri2_dpy->swrast_loader_extension.base.name = __DRI_SWRAST_LOADER; - dri2_dpy->swrast_loader_extension.base.version = 2; - dri2_dpy->swrast_loader_extension.getDrawableInfo = dri2_wl_swrast_get_drawable_info; - dri2_dpy->swrast_loader_extension.putImage = dri2_wl_swrast_put_image; - dri2_dpy->swrast_loader_extension.getImage = dri2_wl_swrast_get_image; - dri2_dpy->swrast_loader_extension.putImage2 = dri2_wl_swrast_put_image2; - - dri2_dpy->extensions[0] = &dri2_dpy->swrast_loader_extension.base; - dri2_dpy->extensions[1] = NULL; + dri2_dpy->loader_extensions = swrast_loader_extensions; if (!dri2_create_screen(disp)) goto cleanup_driver; dri2_wl_setup_swap_interval(dri2_dpy); - types = EGL_WINDOW_BIT; - for (i = 0; dri2_dpy->driver_configs[i]; i++) { - config = dri2_dpy->driver_configs[i]; - if (dri2_dpy->formats & HAS_XRGB8888) - dri2_add_config(disp, config, i + 1, types, NULL, rgb_masks); - if (dri2_dpy->formats & HAS_ARGB8888) - dri2_add_config(disp, config, i + 1, types, NULL, argb_masks); - if (dri2_dpy->formats & HAS_RGB565) - dri2_add_config(disp, config, i + 1, types, NULL, rgb565_masks); + if (!dri2_wl_add_configs_for_visuals(drv, disp)) { + _eglError(EGL_NOT_INITIALIZED, "DRI2: failed to add configs"); + goto cleanup_screen; } /* Fill vtbl last to prevent accidentally calling virtual function during @@ -1888,13 +1872,19 @@ return EGL_TRUE; + cleanup_screen: + dri2_dpy->core->destroyScreen(dri2_dpy->dri_screen); cleanup_driver: dlclose(dri2_dpy->driver); cleanup_shm: wl_shm_destroy(dri2_dpy->wl_shm); cleanup_registry: wl_registry_destroy(dri2_dpy->wl_registry); + wl_proxy_wrapper_destroy(dri2_dpy->wl_dpy_wrapper); + cleanup_dpy_wrapper: wl_event_queue_destroy(dri2_dpy->wl_queue); + if (disp->PlatformDisplay == NULL) + wl_display_disconnect(dri2_dpy->wl_dpy); cleanup_dpy: free(dri2_dpy); disp->DriverData = NULL; diff -Nru mesa-12.0.6/src/egl/drivers/dri2/platform_x11.c mesa-17.0.7/src/egl/drivers/dri2/platform_x11.c --- mesa-12.0.6/src/egl/drivers/dri2/platform_x11.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/drivers/dri2/platform_x11.c 2017-06-01 10:37:10.000000000 +0000 @@ -206,10 +206,8 @@ struct dri2_egl_surface *dri2_surf; xcb_get_geometry_cookie_t cookie; xcb_get_geometry_reply_t *reply; - xcb_screen_iterator_t s; xcb_generic_error_t *error; xcb_drawable_t drawable; - xcb_screen_t *screen; const __DRIconfig *config; STATIC_ASSERT(sizeof(uintptr_t) == sizeof(native_surface)); @@ -228,16 +226,9 @@ dri2_surf->region = XCB_NONE; if (type == EGL_PBUFFER_BIT) { - s = xcb_setup_roots_iterator(xcb_get_setup(dri2_dpy->conn)); - screen = get_xcb_screen(s, dri2_dpy->screen); - if (!screen) { - _eglError(EGL_BAD_ALLOC, "failed to get xcb screen"); - goto cleanup_surf; - } - dri2_surf->drawable = xcb_generate_id(dri2_dpy->conn); xcb_create_pixmap(dri2_dpy->conn, conf->BufferSize, - dri2_surf->drawable, screen->root, + dri2_surf->drawable, dri2_dpy->screen->root, dri2_surf->base.Width, dri2_surf->base.Height); } else { if (!drawable) { @@ -255,13 +246,13 @@ if (dri2_dpy->dri2) { dri2_surf->dri_drawable = - (*dri2_dpy->dri2->createNewDrawable)(dri2_dpy->dri_screen, config, - dri2_surf); + dri2_dpy->dri2->createNewDrawable(dri2_dpy->dri_screen, config, + dri2_surf); } else { assert(dri2_dpy->swrast); dri2_surf->dri_drawable = - (*dri2_dpy->swrast->createNewDrawable)(dri2_dpy->dri_screen, config, - dri2_surf); + dri2_dpy->swrast->createNewDrawable(dri2_dpy->dri_screen, config, + dri2_surf); } if (dri2_surf->dri_drawable == NULL) { @@ -386,10 +377,7 @@ (void) drv; - if (!_eglPutSurface(surf)) - return EGL_TRUE; - - (*dri2_dpy->core->destroyDrawable)(dri2_surf->dri_drawable); + dri2_dpy->core->destroyDrawable(dri2_surf->dri_drawable); if (dri2_dpy->dri2) { xcb_dri2_destroy_drawable (dri2_dpy->conn, dri2_surf->drawable); @@ -407,6 +395,40 @@ } /** + * Function utilizes swrastGetDrawableInfo to get surface + * geometry from x server and calls default query surface + * implementation that returns the updated values. + * + * In case of errors we still return values that we currently + * have. + */ +static EGLBoolean +dri2_query_surface(_EGLDriver *drv, _EGLDisplay *dpy, + _EGLSurface *surf, EGLint attribute, + EGLint *value) +{ + struct dri2_egl_display *dri2_dpy = dri2_egl_display(dpy); + struct dri2_egl_surface *dri2_surf = dri2_egl_surface(surf); + int x, y, w = -1, h = -1; + + __DRIdrawable *drawable = dri2_dpy->vtbl->get_dri_drawable(surf); + + switch (attribute) { + case EGL_WIDTH: + case EGL_HEIGHT: + swrastGetDrawableInfo(drawable, &x, &y, &w, &h, dri2_surf); + if (w != -1 && h != -1) { + surf->Width = w; + surf->Height = h; + } + break; + default: + break; + } + return _eglQuerySurface(drv, dpy, surf, attribute, value); +} + +/** * Process list of buffer received from the server * * Processes the list of buffers received in a reply from the server to either @@ -547,20 +569,10 @@ { xcb_dri2_authenticate_reply_t *authenticate; xcb_dri2_authenticate_cookie_t authenticate_cookie; - xcb_screen_iterator_t s; - xcb_screen_t *screen; int ret = 0; - s = xcb_setup_roots_iterator(xcb_get_setup(dri2_dpy->conn)); - - screen = get_xcb_screen(s, dri2_dpy->screen); - if (!screen) { - _eglLog(_EGL_WARNING, "DRI2: failed to get xcb screen"); - return -1; - } - authenticate_cookie = - xcb_dri2_authenticate_unchecked(dri2_dpy->conn, screen->root, id); + xcb_dri2_authenticate_unchecked(dri2_dpy->conn, dri2_dpy->screen->root, id); authenticate = xcb_dri2_authenticate_reply(dri2_dpy->conn, authenticate_cookie, NULL); @@ -601,8 +613,6 @@ xcb_dri2_connect_reply_t *connect; xcb_dri2_connect_cookie_t connect_cookie; xcb_generic_error_t *error; - xcb_screen_iterator_t s; - xcb_screen_t *screen; char *driver_name, *loader_driver_name, *device_name; const xcb_query_extension_reply_t *extension; @@ -625,13 +635,7 @@ XCB_DRI2_MAJOR_VERSION, XCB_DRI2_MINOR_VERSION); - s = xcb_setup_roots_iterator(xcb_get_setup(dri2_dpy->conn)); - screen = get_xcb_screen(s, dri2_dpy->screen); - if (!screen) { - _eglLog(_EGL_WARNING, "DRI2: failed to get xcb screen"); - return EGL_FALSE; - } - connect_cookie = xcb_dri2_connect_unchecked(dri2_dpy->conn, screen->root, + connect_cookie = xcb_dri2_connect_unchecked(dri2_dpy->conn, dri2_dpy->screen->root, XCB_DRI2_DRIVER_TYPE_DRI); xfixes_query = @@ -665,23 +669,16 @@ device_name = xcb_dri2_connect_device_name (connect); - dri2_dpy->device_name = - strndup(device_name, - xcb_dri2_connect_device_name_length(connect)); - - dri2_dpy->fd = loader_open_device(dri2_dpy->device_name); + dri2_dpy->fd = loader_open_device(device_name); if (dri2_dpy->fd == -1) { _eglLog(_EGL_WARNING, - "DRI2: could not open %s (%s)", dri2_dpy->device_name, - strerror(errno)); - free(dri2_dpy->device_name); + "DRI2: could not open %s (%s)", device_name, strerror(errno)); free(connect); return EGL_FALSE; } if (!dri2_x11_local_authenticate(dri2_dpy)) { close(dri2_dpy->fd); - free(dri2_dpy->device_name); free(connect); return EGL_FALSE; } @@ -691,7 +688,7 @@ /* If Mesa knows about the appropriate driver for this fd, then trust it. * Otherwise, default to the server's value. */ - loader_driver_name = loader_get_driver_for_fd(dri2_dpy->fd, 0); + loader_driver_name = loader_get_driver_for_fd(dri2_dpy->fd); if (loader_driver_name) { dri2_dpy->driver_name = loader_driver_name; } else { @@ -700,13 +697,19 @@ xcb_dri2_connect_driver_name_length(connect)); } - if (dri2_dpy->device_name == NULL || dri2_dpy->driver_name == NULL) { + if (dri2_dpy->driver_name == NULL) { close(dri2_dpy->fd); - free(dri2_dpy->device_name); free(dri2_dpy->driver_name); free(connect); return EGL_FALSE; } + +#ifdef HAVE_WAYLAND_PLATFORM + dri2_dpy->device_name = + strndup(device_name, + xcb_dri2_connect_device_name_length(connect)); +#endif + free(connect); return EGL_TRUE; @@ -724,10 +727,9 @@ dri2_x11_add_configs_for_visuals(struct dri2_egl_display *dri2_dpy, _EGLDisplay *disp, bool supports_preserved) { - xcb_screen_iterator_t s; xcb_depth_iterator_t d; xcb_visualtype_t *visuals; - int i, j, id; + int i, j, count; unsigned int rgba_masks[4]; EGLint surface_type; EGLint config_attrs[] = { @@ -736,9 +738,8 @@ EGL_NONE }; - s = xcb_setup_roots_iterator(xcb_get_setup(dri2_dpy->conn)); - d = xcb_screen_allowed_depths_iterator(get_xcb_screen(s, dri2_dpy->screen)); - id = 1; + d = xcb_screen_allowed_depths_iterator(dri2_dpy->screen); + count = 0; surface_type = EGL_WINDOW_BIT | @@ -758,6 +759,9 @@ class_added[visuals[i]._class] = EGL_TRUE; for (j = 0; dri2_dpy->driver_configs[j]; j++) { + struct dri2_egl_config *dri2_conf; + const __DRIconfig *config = dri2_dpy->driver_configs[j]; + config_attrs[1] = visuals[i].visual_id; config_attrs[3] = visuals[i]._class; @@ -765,8 +769,10 @@ rgba_masks[1] = visuals[i].green_mask; rgba_masks[2] = visuals[i].blue_mask; rgba_masks[3] = 0; - dri2_add_config(disp, dri2_dpy->driver_configs[j], id++, - surface_type, config_attrs, rgba_masks); + dri2_conf = dri2_add_config(disp, config, count + 1, surface_type, + config_attrs, rgba_masks); + if (dri2_conf) + count++; /* Allow a 24-bit RGB visual to match a 32-bit RGBA EGLConfig. * Otherwise it will only match a 32-bit RGBA visual. On a @@ -778,8 +784,10 @@ if (d.data->depth == 24) { rgba_masks[3] = ~(rgba_masks[0] | rgba_masks[1] | rgba_masks[2]); - dri2_add_config(disp, dri2_dpy->driver_configs[j], id++, - surface_type, config_attrs, rgba_masks); + dri2_conf = dri2_add_config(disp, config, count + 1, surface_type, + config_attrs, rgba_masks); + if (dri2_conf) + count++; } } } @@ -787,7 +795,7 @@ xcb_depth_next(&d); } - if (!_eglGetArraySize(disp->Configs)) { + if (!count) { _eglLog(_EGL_WARNING, "DRI2: failed to create any config"); return EGL_FALSE; } @@ -809,7 +817,7 @@ return EGL_TRUE; if (dri2_dpy->flush) - (*dri2_dpy->flush->flush)(dri2_surf->dri_drawable); + dri2_dpy->flush->flush(dri2_surf->dri_drawable); if (dri2_surf->have_fake_front) render_attachment = XCB_DRI2_ATTACHMENT_BUFFER_FAKE_FRONT_LEFT; @@ -873,7 +881,7 @@ */ if (dri2_dpy->flush && dri2_dpy->flush->base.version >= 3 && dri2_dpy->flush->invalidate) - (*dri2_dpy->flush->invalidate)(dri2_surf->dri_drawable); + dri2_dpy->flush->invalidate(dri2_surf->dri_drawable); return swap_count; } @@ -889,7 +897,7 @@ return EGL_TRUE; } /* Swap failed with a window drawable. */ - _eglError(EGL_BAD_NATIVE_WINDOW, __FUNCTION__); + _eglError(EGL_BAD_NATIVE_WINDOW, __func__); return EGL_FALSE; } else { assert(dri2_dpy->swrast); @@ -975,7 +983,7 @@ (void) drv; - (*dri2_dpy->flush->flush)(dri2_surf->dri_drawable); + dri2_dpy->flush->flush(dri2_surf->dri_drawable); gc = xcb_generate_id(dri2_dpy->conn); xcb_create_gc(dri2_dpy->conn, gc, target, 0, NULL); @@ -1139,6 +1147,7 @@ .post_sub_buffer = dri2_fallback_post_sub_buffer, .copy_buffers = dri2_x11_copy_buffers, .query_buffer_age = dri2_fallback_query_buffer_age, + .query_surface = dri2_query_surface, .create_wayland_buffer_from_image = dri2_fallback_create_wayland_buffer_from_image, .get_sync_values = dri2_fallback_get_sync_values, .get_dri_drawable = dri2_surface_get_dri_drawable, @@ -1158,36 +1167,76 @@ .post_sub_buffer = dri2_x11_post_sub_buffer, .copy_buffers = dri2_x11_copy_buffers, .query_buffer_age = dri2_fallback_query_buffer_age, + .query_surface = dri2_query_surface, .create_wayland_buffer_from_image = dri2_fallback_create_wayland_buffer_from_image, .get_sync_values = dri2_x11_get_sync_values, .get_dri_drawable = dri2_surface_get_dri_drawable, }; +static const __DRIswrastLoaderExtension swrast_loader_extension = { + .base = { __DRI_SWRAST_LOADER, 1 }, + + .getDrawableInfo = swrastGetDrawableInfo, + .putImage = swrastPutImage, + .getImage = swrastGetImage, +}; + +static const __DRIextension *swrast_loader_extensions[] = { + &swrast_loader_extension.base, + NULL, +}; + static EGLBoolean -dri2_initialize_x11_swrast(_EGLDriver *drv, _EGLDisplay *disp) +dri2_get_xcb_connection(_EGLDriver *drv, _EGLDisplay *disp, + struct dri2_egl_display *dri2_dpy) { - struct dri2_egl_display *dri2_dpy; - - dri2_dpy = calloc(1, sizeof *dri2_dpy); - if (!dri2_dpy) - return _eglError(EGL_BAD_ALLOC, "eglInitialize"); + xcb_screen_iterator_t s; + int screen = 0; + const char *msg; disp->DriverData = (void *) dri2_dpy; if (disp->PlatformDisplay == NULL) { - dri2_dpy->conn = xcb_connect(0, &dri2_dpy->screen); + dri2_dpy->conn = xcb_connect(NULL, &screen); dri2_dpy->own_device = true; } else { Display *dpy = disp->PlatformDisplay; dri2_dpy->conn = XGetXCBConnection(dpy); - dri2_dpy->screen = DefaultScreen(dpy); + screen = DefaultScreen(dpy); } if (!dri2_dpy->conn || xcb_connection_has_error(dri2_dpy->conn)) { - _eglLog(_EGL_WARNING, "DRI2: xcb_connect failed"); - goto cleanup_dpy; + msg = "xcb_connect failed"; + goto disconnect; + } + + s = xcb_setup_roots_iterator(xcb_get_setup(dri2_dpy->conn)); + dri2_dpy->screen = get_xcb_screen(s, screen); + if (!dri2_dpy->screen) { + msg = "failed to get xcb screen"; + goto disconnect; } + return EGL_TRUE; +disconnect: + if (disp->PlatformDisplay == NULL) + xcb_disconnect(dri2_dpy->conn); + + return _eglError(EGL_BAD_ALLOC, msg); +} + +static EGLBoolean +dri2_initialize_x11_swrast(_EGLDriver *drv, _EGLDisplay *disp) +{ + struct dri2_egl_display *dri2_dpy; + + dri2_dpy = calloc(1, sizeof *dri2_dpy); + if (!dri2_dpy) + return _eglError(EGL_BAD_ALLOC, "eglInitialize"); + + if (!dri2_get_xcb_connection(drv, disp, dri2_dpy)) + goto cleanup_dpy; + /* * Every hardware driver_name is set using strdup. Doing the same in * here will allow is to simply free the memory at dri2_terminate(). @@ -1197,15 +1246,7 @@ if (!dri2_load_driver_swrast(disp)) goto cleanup_conn; - dri2_dpy->swrast_loader_extension.base.name = __DRI_SWRAST_LOADER; - dri2_dpy->swrast_loader_extension.base.version = 2; - dri2_dpy->swrast_loader_extension.getDrawableInfo = swrastGetDrawableInfo; - dri2_dpy->swrast_loader_extension.putImage = swrastPutImage; - dri2_dpy->swrast_loader_extension.getImage = swrastGetImage; - - dri2_dpy->extensions[0] = &dri2_dpy->swrast_loader_extension.base; - dri2_dpy->extensions[1] = NULL; - dri2_dpy->extensions[2] = NULL; + dri2_dpy->loader_extensions = swrast_loader_extensions; if (!dri2_create_screen(disp)) goto cleanup_driver; @@ -1283,6 +1324,14 @@ } #ifdef HAVE_DRI3 + +static const __DRIextension *dri3_image_loader_extensions[] = { + &dri3_image_loader_extension.base, + &image_lookup_extension.base, + &use_invalidate.base, + NULL, +}; + static EGLBoolean dri2_initialize_x11_dri3(_EGLDriver *drv, _EGLDisplay *disp) { @@ -1292,21 +1341,8 @@ if (!dri2_dpy) return _eglError(EGL_BAD_ALLOC, "eglInitialize"); - disp->DriverData = (void *) dri2_dpy; - if (disp->PlatformDisplay == NULL) { - dri2_dpy->conn = xcb_connect(0, &dri2_dpy->screen); - dri2_dpy->own_device = true; - } else { - Display *dpy = disp->PlatformDisplay; - - dri2_dpy->conn = XGetXCBConnection(dpy); - dri2_dpy->screen = DefaultScreen(dpy); - } - - if (!dri2_dpy->conn || xcb_connection_has_error(dri2_dpy->conn)) { - _eglLog(_EGL_WARNING, "DRI3: xcb_connect failed"); + if (!dri2_get_xcb_connection(drv, disp, dri2_dpy)) goto cleanup_dpy; - } if (!dri3_x11_connect(dri2_dpy)) goto cleanup_conn; @@ -1314,10 +1350,7 @@ if (!dri2_load_driver_dri3(disp)) goto cleanup_conn; - dri2_dpy->extensions[0] = &dri3_image_loader_extension.base; - dri2_dpy->extensions[1] = &use_invalidate.base; - dri2_dpy->extensions[2] = &image_lookup_extension.base; - dri2_dpy->extensions[3] = NULL; + dri2_dpy->loader_extensions = dri3_image_loader_extensions; dri2_dpy->swap_available = true; dri2_dpy->invalidate_available = true; @@ -1333,9 +1366,7 @@ disp->Extensions.CHROMIUM_sync_control = EGL_TRUE; disp->Extensions.EXT_buffer_age = EGL_TRUE; -#ifdef HAVE_WAYLAND_PLATFORM - disp->Extensions.WL_bind_wayland_display = EGL_TRUE; -#endif + dri2_set_WL_bind_wayland_display(drv, disp); if (!dri2_x11_add_configs_for_visuals(dri2_dpy, disp, false)) goto cleanup_configs; @@ -1373,6 +1404,34 @@ } #endif +static const __DRIdri2LoaderExtension dri2_loader_extension_old = { + .base = { __DRI_DRI2_LOADER, 2 }, + + .getBuffers = dri2_x11_get_buffers, + .flushFrontBuffer = dri2_x11_flush_front_buffer, + .getBuffersWithFormat = NULL, +}; + +static const __DRIdri2LoaderExtension dri2_loader_extension = { + .base = { __DRI_DRI2_LOADER, 3 }, + + .getBuffers = dri2_x11_get_buffers, + .flushFrontBuffer = dri2_x11_flush_front_buffer, + .getBuffersWithFormat = dri2_x11_get_buffers_with_format, +}; + +static const __DRIextension *dri2_loader_extensions_old[] = { + &dri2_loader_extension_old.base, + &image_lookup_extension.base, + NULL, +}; + +static const __DRIextension *dri2_loader_extensions[] = { + &dri2_loader_extension.base, + &image_lookup_extension.base, + NULL, +}; + static EGLBoolean dri2_initialize_x11_dri2(_EGLDriver *drv, _EGLDisplay *disp) { @@ -1382,21 +1441,8 @@ if (!dri2_dpy) return _eglError(EGL_BAD_ALLOC, "eglInitialize"); - disp->DriverData = (void *) dri2_dpy; - if (disp->PlatformDisplay == NULL) { - dri2_dpy->conn = xcb_connect(0, &dri2_dpy->screen); - dri2_dpy->own_device = true; - } else { - Display *dpy = disp->PlatformDisplay; - - dri2_dpy->conn = XGetXCBConnection(dpy); - dri2_dpy->screen = DefaultScreen(dpy); - } - - if (!dri2_dpy->conn || xcb_connection_has_error(dri2_dpy->conn)) { - _eglLog(_EGL_WARNING, "DRI2: xcb_connect failed"); + if (!dri2_get_xcb_connection(drv, disp, dri2_dpy)) goto cleanup_dpy; - } if (!dri2_x11_connect(dri2_dpy)) goto cleanup_conn; @@ -1404,24 +1450,10 @@ if (!dri2_load_driver(disp)) goto cleanup_fd; - if (dri2_dpy->dri2_minor >= 1) { - dri2_dpy->dri2_loader_extension.base.name = __DRI_DRI2_LOADER; - dri2_dpy->dri2_loader_extension.base.version = 3; - dri2_dpy->dri2_loader_extension.getBuffers = dri2_x11_get_buffers; - dri2_dpy->dri2_loader_extension.flushFrontBuffer = dri2_x11_flush_front_buffer; - dri2_dpy->dri2_loader_extension.getBuffersWithFormat = - dri2_x11_get_buffers_with_format; - } else { - dri2_dpy->dri2_loader_extension.base.name = __DRI_DRI2_LOADER; - dri2_dpy->dri2_loader_extension.base.version = 2; - dri2_dpy->dri2_loader_extension.getBuffers = dri2_x11_get_buffers; - dri2_dpy->dri2_loader_extension.flushFrontBuffer = dri2_x11_flush_front_buffer; - dri2_dpy->dri2_loader_extension.getBuffersWithFormat = NULL; - } - - dri2_dpy->extensions[0] = &dri2_dpy->dri2_loader_extension.base; - dri2_dpy->extensions[1] = &image_lookup_extension.base; - dri2_dpy->extensions[2] = NULL; + if (dri2_dpy->dri2_minor >= 1) + dri2_dpy->loader_extensions = dri2_loader_extensions; + else + dri2_dpy->loader_extensions = dri2_loader_extensions_old; dri2_dpy->swap_available = (dri2_dpy->dri2_minor >= 2); dri2_dpy->invalidate_available = (dri2_dpy->dri2_minor >= 3); @@ -1437,9 +1469,7 @@ disp->Extensions.NV_post_sub_buffer = EGL_TRUE; disp->Extensions.CHROMIUM_sync_control = EGL_TRUE; -#ifdef HAVE_WAYLAND_PLATFORM - disp->Extensions.WL_bind_wayland_display = EGL_TRUE; -#endif + dri2_set_WL_bind_wayland_display(drv, disp); if (!dri2_x11_add_configs_for_visuals(dri2_dpy, disp, true)) goto cleanup_configs; @@ -1473,25 +1503,21 @@ EGLBoolean dri2_initialize_x11(_EGLDriver *drv, _EGLDisplay *disp) { - EGLBoolean initialized = EGL_TRUE; - - int x11_dri2_accel = (getenv("LIBGL_ALWAYS_SOFTWARE") == NULL); + EGLBoolean initialized = EGL_FALSE; - if (x11_dri2_accel) { + if (!getenv("LIBGL_ALWAYS_SOFTWARE")) { #ifdef HAVE_DRI3 - if (getenv("LIBGL_DRI3_DISABLE") != NULL || - !dri2_initialize_x11_dri3(drv, disp)) { + if (!getenv("LIBGL_DRI3_DISABLE")) + initialized = dri2_initialize_x11_dri3(drv, disp); #endif - if (!dri2_initialize_x11_dri2(drv, disp)) { - initialized = dri2_initialize_x11_swrast(drv, disp); - } -#ifdef HAVE_DRI3 - } -#endif - } else { - initialized = dri2_initialize_x11_swrast(drv, disp); + + if (!initialized) + initialized = dri2_initialize_x11_dri2(drv, disp); } + if (!initialized) + initialized = dri2_initialize_x11_swrast(drv, disp); + return initialized; } diff -Nru mesa-12.0.6/src/egl/drivers/dri2/platform_x11_dri3.c mesa-17.0.7/src/egl/drivers/dri2/platform_x11_dri3.c --- mesa-12.0.6/src/egl/drivers/dri2/platform_x11_dri3.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/drivers/dri2/platform_x11_dri3.c 2017-06-01 10:37:10.000000000 +0000 @@ -123,7 +123,7 @@ dri2_flush_drawable_for_swapbuffers(disp, &dri3_surf->base); } -static struct loader_dri3_vtable egl_dri3_vtable = { +static const struct loader_dri3_vtable egl_dri3_vtable = { .get_swap_interval = egl_dri3_get_swap_interval, .clamp_swap_interval = egl_dri3_clamp_swap_interval, .set_swap_interval = egl_dri3_set_swap_interval, @@ -142,9 +142,6 @@ (void) drv; - if (!_eglPutSurface(surf)) - return EGL_TRUE; - loader_dri3_drawable_fini(&dri3_surf->loader_drawable); free(surf); @@ -163,16 +160,6 @@ return EGL_TRUE; } -static xcb_screen_t * -get_xcb_screen(xcb_screen_iterator_t iter, int screen) -{ - for (; iter.rem; --screen, xcb_screen_next(&iter)) - if (screen == 0) - return iter.data; - - return NULL; -} - static _EGLSurface * dri3_create_surface(_EGLDriver *drv, _EGLDisplay *disp, EGLint type, _EGLConfig *conf, void *native_surface, @@ -183,8 +170,6 @@ struct dri3_egl_surface *dri3_surf; const __DRIconfig *dri_config; xcb_drawable_t drawable; - xcb_screen_iterator_t s; - xcb_screen_t *screen; STATIC_ASSERT(sizeof(uintptr_t) == sizeof(native_surface)); drawable = (uintptr_t) native_surface; @@ -201,16 +186,9 @@ goto cleanup_surf; if (type == EGL_PBUFFER_BIT) { - s = xcb_setup_roots_iterator(xcb_get_setup(dri2_dpy->conn)); - screen = get_xcb_screen(s, dri2_dpy->screen); - if (!screen) { - _eglError(EGL_BAD_NATIVE_WINDOW, "dri3_create_surface"); - goto cleanup_surf; - } - drawable = xcb_generate_id(dri2_dpy->conn); xcb_create_pixmap(dri2_dpy->conn, conf->BufferSize, - drawable, screen->root, + drawable, dri2_dpy->screen->root, dri3_surf->base.Width, dri3_surf->base.Height); } @@ -238,6 +216,25 @@ return NULL; } +static int +dri3_authenticate(_EGLDisplay *disp, uint32_t id) +{ +#ifdef HAVE_WAYLAND_PLATFORM + struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp); + + if (dri2_dpy->device_name) { + _eglLog(_EGL_WARNING, + "Wayland client render node authentication is unnecessary"); + return 0; + } + + _eglLog(_EGL_WARNING, + "Wayland client primary node authentication isn't supported"); +#endif + + return -1; +} + /** * Called via eglCreateWindowSurface(), drv->API.CreateWindowSurface(). */ @@ -391,7 +388,7 @@ /* No-op for a pixmap or pbuffer surface */ if (draw->Type == EGL_PIXMAP_BIT || draw->Type == EGL_PBUFFER_BIT) - return 0; + return EGL_FALSE; return loader_dri3_swap_buffers_msc(&dri3_surf->loader_drawable, 0, 0, 0, 0, @@ -422,6 +419,25 @@ return loader_dri3_query_buffer_age(&dri3_surf->loader_drawable); } +static EGLBoolean +dri3_query_surface(_EGLDriver *drv, _EGLDisplay *dpy, + _EGLSurface *surf, EGLint attribute, + EGLint *value) +{ + struct dri3_egl_surface *dri3_surf = dri3_egl_surface(surf); + + switch (attribute) { + case EGL_WIDTH: + case EGL_HEIGHT: + loader_dri3_update_drawable_geometry(&dri3_surf->loader_drawable); + break; + default: + break; + } + + return _eglQuerySurface(drv, dpy, surf, attribute, value); +} + static __DRIdrawable * dri3_get_dri_drawable(_EGLSurface *surf) { @@ -431,7 +447,7 @@ } struct dri2_egl_display_vtbl dri3_x11_display_vtbl = { - .authenticate = NULL, + .authenticate = dri3_authenticate, .create_window_surface = dri3_create_window_surface, .create_pixmap_surface = dri3_create_pixmap_surface, .create_pbuffer_surface = dri3_create_pbuffer_surface, @@ -444,34 +460,12 @@ .post_sub_buffer = dri2_fallback_post_sub_buffer, .copy_buffers = dri3_copy_buffers, .query_buffer_age = dri3_query_buffer_age, + .query_surface = dri3_query_surface, .create_wayland_buffer_from_image = dri2_fallback_create_wayland_buffer_from_image, .get_sync_values = dri3_get_sync_values, .get_dri_drawable = dri3_get_dri_drawable, }; -static char * -dri3_get_device_name(int fd) -{ - char *ret = NULL; - - ret = drmGetRenderDeviceNameFromFd(fd); - if (ret) - return ret; - - /* For dri3, render node support is required for WL_bind_wayland_display. - * In order not to regress on older systems without kernel or libdrm - * support, fall back to dri2. User can override it with environment - * variable if they don't need to use that extension. - */ - if (getenv("EGL_FORCE_DRI3") == NULL) { - _eglLog(_EGL_WARNING, "Render node support not available, falling back to dri2"); - _eglLog(_EGL_WARNING, "If you want to force dri3, set EGL_FORCE_DRI3 environment variable"); - } else - ret = loader_get_device_name_for_fd(fd); - - return ret; -} - EGLBoolean dri3_x11_connect(struct dri2_egl_display *dri2_dpy) { @@ -480,8 +474,6 @@ xcb_present_query_version_reply_t *present_query; xcb_present_query_version_cookie_t present_query_cookie; xcb_generic_error_t *error; - xcb_screen_iterator_t s; - xcb_screen_t *screen; const xcb_query_extension_reply_t *extension; xcb_prefetch_extension_data (dri2_dpy->conn, &xcb_dri3_id); @@ -524,14 +516,7 @@ } free(present_query); - s = xcb_setup_roots_iterator(xcb_get_setup(dri2_dpy->conn)); - screen = get_xcb_screen(s, dri2_dpy->screen); - if (!screen) { - _eglError(EGL_BAD_NATIVE_WINDOW, "dri3_x11_connect"); - return EGL_FALSE; - } - - dri2_dpy->fd = loader_dri3_open(dri2_dpy->conn, screen->root, 0); + dri2_dpy->fd = loader_dri3_open(dri2_dpy->conn, dri2_dpy->screen->root, 0); if (dri2_dpy->fd < 0) { int conn_error = xcb_connection_has_error(dri2_dpy->conn); _eglLog(_EGL_WARNING, "DRI3: Screen seems not DRI3 capable"); @@ -544,18 +529,19 @@ dri2_dpy->fd = loader_get_user_preferred_fd(dri2_dpy->fd, &dri2_dpy->is_different_gpu); - dri2_dpy->driver_name = loader_get_driver_for_fd(dri2_dpy->fd, 0); + dri2_dpy->driver_name = loader_get_driver_for_fd(dri2_dpy->fd); if (!dri2_dpy->driver_name) { _eglLog(_EGL_WARNING, "DRI3: No driver found"); close(dri2_dpy->fd); return EGL_FALSE; } - dri2_dpy->device_name = dri3_get_device_name(dri2_dpy->fd); - if (!dri2_dpy->device_name) { - close(dri2_dpy->fd); - return EGL_FALSE; - } +#ifdef HAVE_WAYLAND_PLATFORM + /* Only try to get a render device name since dri3 doesn't provide a + * mechanism for authenticating client opened device node fds. If this + * fails then don't advertise the extension. */ + dri2_dpy->device_name = drmGetRenderDeviceNameFromFd(dri2_dpy->fd); +#endif return EGL_TRUE; } diff -Nru mesa-12.0.6/src/egl/drivers/haiku/.editorconfig mesa-17.0.7/src/egl/drivers/haiku/.editorconfig --- mesa-12.0.6/src/egl/drivers/haiku/.editorconfig 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/egl/drivers/haiku/.editorconfig 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,2 @@ +[*.cpp] +indent_style = tab diff -Nru mesa-12.0.6/src/egl/main/eglapi.c mesa-17.0.7/src/egl/main/eglapi.c --- mesa-12.0.6/src/egl/main/eglapi.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/main/eglapi.c 2017-06-01 10:37:10.000000000 +0000 @@ -250,6 +250,78 @@ mtx_unlock(&dpy->Mutex); } +static EGLBoolean +_eglSetFuncName(const char *funcName, _EGLDisplay *disp, EGLenum objectType, _EGLResource *object) +{ + _EGLThreadInfo *thr = _eglGetCurrentThread(); + if (!_eglIsCurrentThreadDummy()) { + thr->CurrentFuncName = funcName; + thr->CurrentObjectLabel = NULL; + + if (objectType == EGL_OBJECT_THREAD_KHR) + thr->CurrentObjectLabel = thr->Label; + else if (objectType == EGL_OBJECT_DISPLAY_KHR && disp) + thr->CurrentObjectLabel = disp->Label; + else if (object) + thr->CurrentObjectLabel = object->Label; + + return EGL_TRUE; + } + + _eglDebugReportFull(EGL_BAD_ALLOC, funcName, funcName, + EGL_DEBUG_MSG_CRITICAL_KHR, NULL, NULL); + return EGL_FALSE; +} + +#define _EGL_FUNC_START(disp, objectType, object, ret) \ + do { \ + if (!_eglSetFuncName(__func__, disp, objectType, (_EGLResource *) object)) { \ + if (disp) \ + _eglUnlockDisplay(disp); \ + return ret; \ + } \ + } while(0) + +/** + * Convert an attribute list from EGLint[] to EGLAttrib[]. + * + * Return an EGL error code. The output parameter out_attrib_list is modified + * only on success. + */ +static EGLint +_eglConvertIntsToAttribs(const EGLint *int_list, EGLAttrib **out_attrib_list) +{ + size_t len = 0; + EGLAttrib *attrib_list; + + if (int_list) { + while (int_list[2*len] != EGL_NONE) + ++len; + } + + if (len == 0) { + *out_attrib_list = NULL; + return EGL_SUCCESS; + } + + if (2*len + 1 > SIZE_MAX / sizeof(EGLAttrib)) + return EGL_BAD_ALLOC; + + attrib_list = malloc((2*len + 1) * sizeof(EGLAttrib)); + if (!attrib_list) + return EGL_BAD_ALLOC; + + for (size_t i = 0; i < len; ++i) { + attrib_list[2*i + 0] = int_list[2*i + 0]; + attrib_list[2*i + 1] = int_list[2*i + 1]; + } + + attrib_list[2*len] = EGL_NONE; + + *out_attrib_list = attrib_list; + return EGL_SUCCESS; +} + static EGLint * _eglConvertAttribsToInt(const EGLAttrib *attr_list) @@ -287,6 +359,8 @@ _EGLDisplay *dpy; void *native_display_ptr; + _EGL_FUNC_START(NULL, EGL_OBJECT_THREAD_KHR, NULL, EGL_NO_DISPLAY); + STATIC_ASSERT(sizeof(void*) == sizeof(nativeDisplay)); native_display_ptr = (void*) nativeDisplay; @@ -295,9 +369,9 @@ return _eglGetDisplayHandle(dpy); } -static EGLDisplay EGLAPIENTRY -eglGetPlatformDisplayEXT(EGLenum platform, void *native_display, - const EGLint *attrib_list) +static EGLDisplay +_eglGetPlatformDisplayCommon(EGLenum platform, void *native_display, + const EGLint *attrib_list) { _EGLDisplay *dpy; @@ -319,6 +393,11 @@ attrib_list); break; #endif +#ifdef HAVE_SURFACELESS_PLATFORM + case EGL_PLATFORM_SURFACELESS_MESA: + dpy = _eglGetSurfacelessDisplay(native_display, attrib_list); + break; +#endif default: RETURN_EGL_ERROR(NULL, EGL_BAD_PARAMETER, NULL); } @@ -326,17 +405,28 @@ return _eglGetDisplayHandle(dpy); } +static EGLDisplay EGLAPIENTRY +eglGetPlatformDisplayEXT(EGLenum platform, void *native_display, + const EGLint *attrib_list) +{ + _EGL_FUNC_START(NULL, EGL_OBJECT_THREAD_KHR, NULL, EGL_NO_DISPLAY); + return _eglGetPlatformDisplayCommon(platform, native_display, attrib_list); +} + EGLDisplay EGLAPIENTRY eglGetPlatformDisplay(EGLenum platform, void *native_display, const EGLAttrib *attrib_list) { EGLDisplay display; - EGLint *int_attribs = _eglConvertAttribsToInt(attrib_list); + EGLint *int_attribs; + _EGL_FUNC_START(NULL, EGL_OBJECT_THREAD_KHR, NULL, EGL_NO_DISPLAY); + + int_attribs = _eglConvertAttribsToInt(attrib_list); if (attrib_list && !int_attribs) RETURN_EGL_ERROR(NULL, EGL_BAD_ALLOC, NULL); - display = eglGetPlatformDisplayEXT(platform, native_display, int_attribs); + display = _eglGetPlatformDisplayCommon(platform, native_display, int_attribs); free(int_attribs); return display; } @@ -384,6 +474,7 @@ /* Please keep these sorted alphabetically. */ _EGL_CHECK_EXTENSION(ANDROID_framebuffer_target); _EGL_CHECK_EXTENSION(ANDROID_image_native_buffer); + _EGL_CHECK_EXTENSION(ANDROID_native_fence_sync); _EGL_CHECK_EXTENSION(ANDROID_recordable); _EGL_CHECK_EXTENSION(CHROMIUM_sync_control); @@ -394,6 +485,7 @@ _EGL_CHECK_EXTENSION(EXT_swap_buffers_with_damage); _EGL_CHECK_EXTENSION(KHR_cl_event2); + _EGL_CHECK_EXTENSION(KHR_config_attribs); _EGL_CHECK_EXTENSION(KHR_create_context); _EGL_CHECK_EXTENSION(KHR_fence_sync); _EGL_CHECK_EXTENSION(KHR_get_all_proc_addresses); @@ -406,11 +498,15 @@ _eglAppendExtension(&exts, "EGL_KHR_image"); _EGL_CHECK_EXTENSION(KHR_image_base); _EGL_CHECK_EXTENSION(KHR_image_pixmap); + _EGL_CHECK_EXTENSION(KHR_no_config_context); _EGL_CHECK_EXTENSION(KHR_reusable_sync); _EGL_CHECK_EXTENSION(KHR_surfaceless_context); + if (dpy->Extensions.EXT_swap_buffers_with_damage) + _eglAppendExtension(&exts, "EGL_KHR_swap_buffers_with_damage"); _EGL_CHECK_EXTENSION(KHR_wait_sync); - _EGL_CHECK_EXTENSION(MESA_configless_context); + if (dpy->Extensions.KHR_no_config_context) + _eglAppendExtension(&exts, "EGL_MESA_configless_context"); _EGL_CHECK_EXTENSION(MESA_drm_image); _EGL_CHECK_EXTENSION(MESA_image_dma_buf_export); @@ -473,6 +569,8 @@ { _EGLDisplay *disp = _eglLockDisplay(dpy); + _EGL_FUNC_START(disp, EGL_OBJECT_DISPLAY_KHR, NULL, EGL_FALSE); + if (!disp) RETURN_EGL_ERROR(NULL, EGL_BAD_DISPLAY, EGL_FALSE); @@ -500,6 +598,11 @@ */ disp->Extensions.KHR_get_all_proc_addresses = EGL_TRUE; + /* Extensions is used to provide EGL 1.3 functionality for 1.2 aware + * programs. It is driver agnostic and handled in the main EGL code. + */ + disp->Extensions.KHR_config_attribs = EGL_TRUE; + _eglComputeVersion(disp); _eglCreateExtensionsString(disp); _eglCreateAPIsString(disp); @@ -523,6 +626,8 @@ { _EGLDisplay *disp = _eglLockDisplay(dpy); + _EGL_FUNC_START(disp, EGL_OBJECT_DISPLAY_KHR, NULL, EGL_FALSE); + if (!disp) RETURN_EGL_ERROR(NULL, EGL_BAD_DISPLAY, EGL_FALSE); @@ -550,6 +655,7 @@ } disp = _eglLockDisplay(dpy); + _EGL_FUNC_START(disp, EGL_OBJECT_DISPLAY_KHR, NULL, NULL); _EGL_CHECK_DISPLAY(disp, NULL, drv); switch (name) { @@ -575,6 +681,8 @@ _EGLDriver *drv; EGLBoolean ret; + _EGL_FUNC_START(disp, EGL_OBJECT_DISPLAY_KHR, NULL, EGL_FALSE); + _EGL_CHECK_DISPLAY(disp, EGL_FALSE, drv); ret = drv->API.GetConfigs(drv, disp, configs, config_size, num_config); @@ -590,6 +698,8 @@ _EGLDriver *drv; EGLBoolean ret; + _EGL_FUNC_START(disp, EGL_OBJECT_DISPLAY_KHR, NULL, EGL_FALSE); + _EGL_CHECK_DISPLAY(disp, EGL_FALSE, drv); ret = drv->API.ChooseConfig(drv, disp, attrib_list, configs, config_size, num_config); @@ -607,6 +717,8 @@ _EGLDriver *drv; EGLBoolean ret; + _EGL_FUNC_START(disp, EGL_OBJECT_DISPLAY_KHR, NULL, EGL_FALSE); + _EGL_CHECK_CONFIG(disp, conf, EGL_FALSE, drv); ret = drv->API.GetConfigAttrib(drv, disp, conf, attribute, value); @@ -625,11 +737,13 @@ _EGLContext *context; EGLContext ret; + _EGL_FUNC_START(disp, EGL_OBJECT_DISPLAY_KHR, NULL, EGL_NO_CONTEXT); + _EGL_CHECK_DISPLAY(disp, EGL_NO_CONTEXT, drv); - if (config) + if (config != EGL_NO_CONFIG_KHR) _EGL_CHECK_CONFIG(disp, conf, EGL_NO_CONTEXT, drv); - else if (!disp->Extensions.MESA_configless_context) + else if (!disp->Extensions.KHR_no_config_context) RETURN_EGL_ERROR(disp, EGL_BAD_CONFIG, EGL_NO_CONTEXT); if (!share && share_list != EGL_NO_CONTEXT) @@ -650,6 +764,8 @@ _EGLDriver *drv; EGLBoolean ret; + _EGL_FUNC_START(disp, EGL_OBJECT_CONTEXT_KHR, context, EGL_FALSE); + _EGL_CHECK_CONTEXT(disp, context, EGL_FALSE, drv); _eglUnlinkContext(context); ret = drv->API.DestroyContext(drv, disp, context); @@ -669,6 +785,8 @@ _EGLDriver *drv; EGLBoolean ret; + _EGL_FUNC_START(disp, EGL_OBJECT_CONTEXT_KHR, context, EGL_FALSE); + if (!disp) RETURN_EGL_ERROR(disp, EGL_BAD_DISPLAY, EGL_FALSE); drv = disp->Driver; @@ -700,6 +818,14 @@ RETURN_EGL_ERROR(disp, EGL_BAD_MATCH, EGL_FALSE); } + /* If a native window underlying either draw or read is no longer valid, + * an EGL_BAD_NATIVE_WINDOW error is generated. + */ + if (draw_surf && draw_surf->Lost) + RETURN_EGL_ERROR(disp, EGL_BAD_NATIVE_WINDOW, EGL_FALSE); + if (read_surf && read_surf->Lost) + RETURN_EGL_ERROR(disp, EGL_BAD_NATIVE_WINDOW, EGL_FALSE); + ret = drv->API.MakeCurrent(drv, disp, draw_surf, read_surf, context); RETURN_EGL_EVAL(disp, ret); @@ -715,6 +841,8 @@ _EGLDriver *drv; EGLBoolean ret; + _EGL_FUNC_START(disp, EGL_OBJECT_CONTEXT_KHR, context, EGL_FALSE); + _EGL_CHECK_CONTEXT(disp, context, EGL_FALSE, drv); ret = drv->API.QueryContext(drv, disp, context, attribute, value); @@ -731,11 +859,33 @@ _EGLSurface *surf; EGLSurface ret; - _EGL_CHECK_CONFIG(disp, conf, EGL_NO_SURFACE, drv); if (native_window == NULL) RETURN_EGL_ERROR(disp, EGL_BAD_NATIVE_WINDOW, EGL_NO_SURFACE); +#ifdef HAVE_SURFACELESS_PLATFORM + if (disp && disp->Platform == _EGL_PLATFORM_SURFACELESS) { + /* From the EGL_MESA_platform_surfaceless spec (v1): + * + * eglCreatePlatformWindowSurface fails when called with a + * that belongs to the surfaceless platform. It returns + * EGL_NO_SURFACE and generates EGL_BAD_NATIVE_WINDOW. The + * justification for this unconditional failure is that the + * surfaceless platform has no native windows, and therefore the + * parameter is always invalid. + * + * This check must occur before checking the EGLConfig, which emits + * EGL_BAD_CONFIG. + */ + RETURN_EGL_ERROR(disp, EGL_BAD_NATIVE_WINDOW, EGL_NO_SURFACE); + } +#endif + + _EGL_CHECK_CONFIG(disp, conf, EGL_NO_SURFACE, drv); + + if ((conf->SurfaceType & EGL_WINDOW_BIT) == 0) + RETURN_EGL_ERROR(disp, EGL_BAD_MATCH, EGL_NO_SURFACE); + surf = drv->API.CreateWindowSurface(drv, disp, conf, native_window, attrib_list); ret = (surf) ? _eglLinkSurface(surf) : EGL_NO_SURFACE; @@ -749,19 +899,16 @@ EGLNativeWindowType window, const EGLint *attrib_list) { _EGLDisplay *disp = _eglLockDisplay(dpy); + + _EGL_FUNC_START(disp, EGL_OBJECT_DISPLAY_KHR, NULL, EGL_NO_SURFACE); STATIC_ASSERT(sizeof(void*) == sizeof(window)); return _eglCreateWindowSurfaceCommon(disp, config, (void*) window, attrib_list); } - -static EGLSurface EGLAPIENTRY -eglCreatePlatformWindowSurfaceEXT(EGLDisplay dpy, EGLConfig config, - void *native_window, - const EGLint *attrib_list) +static void * +_fixupNativeWindow(_EGLDisplay *disp, void *native_window) { - _EGLDisplay *disp = _eglLockDisplay(dpy); - #ifdef HAVE_X11_PLATFORM if (disp->Platform == _EGL_PLATFORM_X11 && native_window != NULL) { /* The `native_window` parameter for the X11 platform differs between @@ -771,10 +918,22 @@ * `Window*`. Convert `Window*` to `Window` because that's what * dri2_x11_create_window_surface() expects. */ - native_window = (void*) (* (Window*) native_window); + return (void *)(* (Window*) native_window); } #endif + return native_window; +} +static EGLSurface EGLAPIENTRY +eglCreatePlatformWindowSurfaceEXT(EGLDisplay dpy, EGLConfig config, + void *native_window, + const EGLint *attrib_list) +{ + _EGLDisplay *disp = _eglLockDisplay(dpy); + + native_window = _fixupNativeWindow(disp, native_window); + + _EGL_FUNC_START(disp, EGL_OBJECT_DISPLAY_KHR, NULL, EGL_NO_SURFACE); return _eglCreateWindowSurfaceCommon(disp, config, native_window, attrib_list); } @@ -785,18 +944,39 @@ void *native_window, const EGLAttrib *attrib_list) { + _EGLDisplay *disp = _eglLockDisplay(dpy); EGLSurface surface; - EGLint *int_attribs = _eglConvertAttribsToInt(attrib_list); + EGLint *int_attribs; + + _EGL_FUNC_START(disp, EGL_OBJECT_DISPLAY_KHR, NULL, EGL_NO_SURFACE); + int_attribs = _eglConvertAttribsToInt(attrib_list); if (attrib_list && !int_attribs) - RETURN_EGL_ERROR(NULL, EGL_BAD_ALLOC, EGL_NO_SURFACE); + RETURN_EGL_ERROR(disp, EGL_BAD_ALLOC, EGL_NO_SURFACE); - surface = eglCreatePlatformWindowSurfaceEXT(dpy, config, native_window, - int_attribs); + native_window = _fixupNativeWindow(disp, native_window); + surface = _eglCreateWindowSurfaceCommon(disp, config, native_window, + int_attribs); free(int_attribs); return surface; } +static void * +_fixupNativePixmap(_EGLDisplay *disp, void *native_pixmap) +{ +#ifdef HAVE_X11_PLATFORM + /* The `native_pixmap` parameter for the X11 platform differs between + * eglCreatePixmapSurface() and eglCreatePlatformPixmapSurfaceEXT(). In + * eglCreatePixmapSurface(), the type of `native_pixmap` is an Xlib + * `Pixmap`. In eglCreatePlatformPixmapSurfaceEXT(), the type is + * `Pixmap*`. Convert `Pixmap*` to `Pixmap` because that's what + * dri2_x11_create_pixmap_surface() expects. + */ + if (disp->Platform == _EGL_PLATFORM_X11 && native_pixmap != NULL) + return (void *)(* (Pixmap*) native_pixmap); +#endif + return native_pixmap; +} static EGLSurface _eglCreatePixmapSurfaceCommon(_EGLDisplay *disp, EGLConfig config, @@ -807,7 +987,27 @@ _EGLSurface *surf; EGLSurface ret; +#if HAVE_SURFACELESS_PLATFORM + if (disp && disp->Platform == _EGL_PLATFORM_SURFACELESS) { + /* From the EGL_MESA_platform_surfaceless spec (v1): + * + * [Like eglCreatePlatformWindowSurface,] eglCreatePlatformPixmapSurface + * also fails when called with a that belongs to the + * surfaceless platform. It returns EGL_NO_SURFACE and generates + * EGL_BAD_NATIVE_PIXMAP. + * + * This check must occur before checking the EGLConfig, which emits + * EGL_BAD_CONFIG. + */ + RETURN_EGL_ERROR(disp, EGL_BAD_NATIVE_PIXMAP, EGL_NO_SURFACE); + } +#endif + _EGL_CHECK_CONFIG(disp, conf, EGL_NO_SURFACE, drv); + + if ((conf->SurfaceType & EGL_PIXMAP_BIT) == 0) + RETURN_EGL_ERROR(disp, EGL_BAD_MATCH, EGL_NO_SURFACE); + surf = drv->API.CreatePixmapSurface(drv, disp, conf, native_pixmap, attrib_list); ret = (surf) ? _eglLinkSurface(surf) : EGL_NO_SURFACE; @@ -821,6 +1021,8 @@ EGLNativePixmapType pixmap, const EGLint *attrib_list) { _EGLDisplay *disp = _eglLockDisplay(dpy); + + _EGL_FUNC_START(disp, EGL_OBJECT_DISPLAY_KHR, NULL, EGL_NO_SURFACE); STATIC_ASSERT(sizeof(void*) == sizeof(pixmap)); return _eglCreatePixmapSurfaceCommon(disp, config, (void*) pixmap, attrib_list); @@ -833,19 +1035,8 @@ { _EGLDisplay *disp = _eglLockDisplay(dpy); -#ifdef HAVE_X11_PLATFORM - /* The `native_pixmap` parameter for the X11 platform differs between - * eglCreatePixmapSurface() and eglCreatePlatformPixmapSurfaceEXT(). In - * eglCreatePixmapSurface(), the type of `native_pixmap` is an Xlib - * `Pixmap`. In eglCreatePlatformPixmapSurfaceEXT(), the type is - * `Pixmap*`. Convert `Pixmap*` to `Pixmap` because that's what - * dri2_x11_create_pixmap_surface() expects. - */ - if (disp->Platform == _EGL_PLATFORM_X11 && native_pixmap != NULL) { - native_pixmap = (void*) (* (Pixmap*) native_pixmap); - } -#endif - + _EGL_FUNC_START(disp, EGL_OBJECT_DISPLAY_KHR, NULL, EGL_NO_SURFACE); + native_pixmap = _fixupNativePixmap(disp, native_pixmap); return _eglCreatePixmapSurfaceCommon(disp, config, native_pixmap, attrib_list); } @@ -856,14 +1047,19 @@ void *native_pixmap, const EGLAttrib *attrib_list) { + _EGLDisplay *disp = _eglLockDisplay(dpy); EGLSurface surface; - EGLint *int_attribs = _eglConvertAttribsToInt(attrib_list); + EGLint *int_attribs; + _EGL_FUNC_START(disp, EGL_OBJECT_DISPLAY_KHR, NULL, EGL_NO_SURFACE); + + int_attribs = _eglConvertAttribsToInt(attrib_list); if (attrib_list && !int_attribs) - RETURN_EGL_ERROR(NULL, EGL_BAD_ALLOC, EGL_NO_SURFACE); + RETURN_EGL_ERROR(disp, EGL_BAD_ALLOC, EGL_NO_SURFACE); - surface = eglCreatePlatformPixmapSurfaceEXT(dpy, config, native_pixmap, - int_attribs); + native_pixmap = _fixupNativePixmap(disp, native_pixmap); + surface = _eglCreatePixmapSurfaceCommon(disp, config, native_pixmap, + int_attribs); free(int_attribs); return surface; } @@ -879,8 +1075,12 @@ _EGLSurface *surf; EGLSurface ret; + _EGL_FUNC_START(disp, EGL_OBJECT_DISPLAY_KHR, NULL, EGL_NO_SURFACE); _EGL_CHECK_CONFIG(disp, conf, EGL_NO_SURFACE, drv); + if ((conf->SurfaceType & EGL_PBUFFER_BIT) == 0) + RETURN_EGL_ERROR(disp, EGL_BAD_MATCH, EGL_NO_SURFACE); + surf = drv->API.CreatePbufferSurface(drv, disp, conf, attrib_list); ret = (surf) ? _eglLinkSurface(surf) : EGL_NO_SURFACE; @@ -896,6 +1096,7 @@ _EGLDriver *drv; EGLBoolean ret; + _EGL_FUNC_START(disp, EGL_OBJECT_SURFACE_KHR, surf, EGL_FALSE); _EGL_CHECK_SURFACE(disp, surf, EGL_FALSE, drv); _eglUnlinkSurface(surf); ret = drv->API.DestroySurface(drv, disp, surf); @@ -912,6 +1113,7 @@ _EGLDriver *drv; EGLBoolean ret; + _EGL_FUNC_START(disp, EGL_OBJECT_SURFACE_KHR, surf, EGL_FALSE); _EGL_CHECK_SURFACE(disp, surf, EGL_FALSE, drv); ret = drv->API.QuerySurface(drv, disp, surf, attribute, value); @@ -927,6 +1129,7 @@ _EGLDriver *drv; EGLBoolean ret; + _EGL_FUNC_START(disp, EGL_OBJECT_SURFACE_KHR, surf, EGL_FALSE); _EGL_CHECK_SURFACE(disp, surf, EGL_FALSE, drv); ret = drv->API.SurfaceAttrib(drv, disp, surf, attribute, value); @@ -942,6 +1145,7 @@ _EGLDriver *drv; EGLBoolean ret; + _EGL_FUNC_START(disp, EGL_OBJECT_SURFACE_KHR, surf, EGL_FALSE); _EGL_CHECK_SURFACE(disp, surf, EGL_FALSE, drv); ret = drv->API.BindTexImage(drv, disp, surf, buffer); @@ -957,6 +1161,7 @@ _EGLDriver *drv; EGLBoolean ret; + _EGL_FUNC_START(disp, EGL_OBJECT_SURFACE_KHR, surf, EGL_FALSE); _EGL_CHECK_SURFACE(disp, surf, EGL_FALSE, drv); ret = drv->API.ReleaseTexImage(drv, disp, surf, buffer); @@ -969,17 +1174,17 @@ { _EGLDisplay *disp = _eglLockDisplay(dpy); _EGLContext *ctx = _eglGetCurrentContext(); - _EGLSurface *surf; + _EGLSurface *surf = ctx ? ctx->DrawSurface : NULL; _EGLDriver *drv; EGLBoolean ret; + _EGL_FUNC_START(disp, EGL_OBJECT_SURFACE_KHR, surf, EGL_FALSE); _EGL_CHECK_DISPLAY(disp, EGL_FALSE, drv); if (_eglGetContextHandle(ctx) == EGL_NO_CONTEXT || ctx->Resource.Display != disp) RETURN_EGL_ERROR(disp, EGL_BAD_CONTEXT, EGL_FALSE); - surf = ctx->DrawSurface; if (_eglGetSurfaceHandle(surf) == EGL_NO_SURFACE) RETURN_EGL_ERROR(disp, EGL_BAD_SURFACE, EGL_FALSE); @@ -998,6 +1203,7 @@ _EGLDriver *drv; EGLBoolean ret; + _EGL_FUNC_START(disp, EGL_OBJECT_SURFACE_KHR, surf, EGL_FALSE); _EGL_CHECK_SURFACE(disp, surf, EGL_FALSE, drv); /* surface must be bound to current context in EGL 1.4 */ @@ -1007,19 +1213,26 @@ RETURN_EGL_ERROR(disp, EGL_BAD_SURFACE, EGL_FALSE); #endif + /* From the EGL 1.5 spec: + * + * If eglSwapBuffers is called and the native window associated with + * surface is no longer valid, an EGL_BAD_NATIVE_WINDOW error is + * generated. + */ + if (surf->Lost) + RETURN_EGL_ERROR(disp, EGL_BAD_NATIVE_WINDOW, EGL_FALSE); + ret = drv->API.SwapBuffers(drv, disp, surf); RETURN_EGL_EVAL(disp, ret); } -static EGLBoolean EGLAPIENTRY -eglSwapBuffersWithDamageEXT(EGLDisplay dpy, EGLSurface surface, - EGLint *rects, EGLint n_rects) +static EGLBoolean +_eglSwapBuffersWithDamageCommon(_EGLDisplay *disp, _EGLSurface *surf, + EGLint *rects, EGLint n_rects) { _EGLContext *ctx = _eglGetCurrentContext(); - _EGLDisplay *disp = _eglLockDisplay(dpy); - _EGLSurface *surf = _eglLookupSurface(surface, disp); _EGLDriver *drv; EGLBoolean ret; @@ -1038,6 +1251,26 @@ RETURN_EGL_EVAL(disp, ret); } +static EGLBoolean EGLAPIENTRY +eglSwapBuffersWithDamageEXT(EGLDisplay dpy, EGLSurface surface, + EGLint *rects, EGLint n_rects) +{ + _EGLDisplay *disp = _eglLockDisplay(dpy); + _EGLSurface *surf = _eglLookupSurface(surface, disp); + _EGL_FUNC_START(disp, EGL_OBJECT_SURFACE_KHR, surf, EGL_FALSE); + return _eglSwapBuffersWithDamageCommon(disp, surf, rects, n_rects); +} + +static EGLBoolean EGLAPIENTRY +eglSwapBuffersWithDamageKHR(EGLDisplay dpy, EGLSurface surface, + EGLint *rects, EGLint n_rects) +{ + _EGLDisplay *disp = _eglLockDisplay(dpy); + _EGLSurface *surf = _eglLookupSurface(surface, disp); + _EGL_FUNC_START(disp, EGL_OBJECT_SURFACE_KHR, surf, EGL_FALSE); + return _eglSwapBuffersWithDamageCommon(disp, surf, rects, n_rects); +} + EGLBoolean EGLAPIENTRY eglCopyBuffers(EGLDisplay dpy, EGLSurface surface, EGLNativePixmapType target) { @@ -1047,6 +1280,7 @@ EGLBoolean ret; void *native_pixmap_ptr; + _EGL_FUNC_START(disp, EGL_OBJECT_SURFACE_KHR, surf, EGL_FALSE); STATIC_ASSERT(sizeof(void*) == sizeof(target)); native_pixmap_ptr = (void*) target; @@ -1059,8 +1293,8 @@ } -EGLBoolean EGLAPIENTRY -eglWaitClient(void) +static EGLBoolean +_eglWaitClientCommon(void) { _EGLContext *ctx = _eglGetCurrentContext(); _EGLDisplay *disp; @@ -1086,22 +1320,19 @@ RETURN_EGL_EVAL(disp, ret); } +EGLBoolean EGLAPIENTRY +eglWaitClient(void) +{ + _EGL_FUNC_START(NULL, EGL_OBJECT_CONTEXT_KHR, _eglGetCurrentContext(), EGL_FALSE); + return _eglWaitClientCommon(); +} EGLBoolean EGLAPIENTRY eglWaitGL(void) { - _EGLThreadInfo *t = _eglGetCurrentThread(); - EGLint api_index = t->CurrentAPIIndex; - EGLint es_index = _eglConvertApiToIndex(EGL_OPENGL_ES_API); - EGLBoolean ret; - - if (api_index != es_index && _eglIsCurrentThreadDummy()) - RETURN_EGL_ERROR(NULL, EGL_BAD_ALLOC, EGL_FALSE); - - t->CurrentAPIIndex = es_index; - ret = eglWaitClient(); - t->CurrentAPIIndex = api_index; - return ret; + /* Since we only support OpenGL and GLES, eglWaitGL is equivalent to eglWaitClient. */ + _EGL_FUNC_START(NULL, EGL_OBJECT_CONTEXT_KHR, _eglGetCurrentContext(), EGL_FALSE); + return _eglWaitClientCommon(); } @@ -1116,6 +1347,8 @@ if (!ctx) RETURN_EGL_SUCCESS(NULL, EGL_TRUE); + _EGL_FUNC_START(NULL, EGL_OBJECT_THREAD_KHR, NULL, EGL_FALSE); + disp = ctx->Resource.Display; mtx_lock(&disp->Mutex); @@ -1165,6 +1398,8 @@ _EGLSurface *surf; EGLSurface ret; + _EGL_FUNC_START(NULL, EGL_NONE, NULL, EGL_NO_SURFACE); + if (!ctx) RETURN_EGL_SUCCESS(NULL, EGL_NO_SURFACE); @@ -1216,15 +1451,18 @@ EGLBoolean EGLAPIENTRY eglBindAPI(EGLenum api) { - _EGLThreadInfo *t = _eglGetCurrentThread(); + _EGLThreadInfo *t; + _EGL_FUNC_START(NULL, EGL_OBJECT_THREAD_KHR, NULL, EGL_FALSE); + + t = _eglGetCurrentThread(); if (_eglIsCurrentThreadDummy()) RETURN_EGL_ERROR(NULL, EGL_BAD_ALLOC, EGL_FALSE); if (!_eglIsApiValid(api)) RETURN_EGL_ERROR(NULL, EGL_BAD_PARAMETER, EGL_FALSE); - t->CurrentAPIIndex = _eglConvertApiToIndex(api); + t->CurrentAPI = api; RETURN_EGL_SUCCESS(NULL, EGL_TRUE); } @@ -1240,7 +1478,7 @@ EGLenum ret; /* returns one of EGL_OPENGL_API, EGL_OPENGL_ES_API or EGL_OPENVG_API */ - ret = _eglConvertApiFromIndex(t->CurrentAPIIndex); + ret = t->CurrentAPI; RETURN_EGL_SUCCESS(NULL, ret); } @@ -1257,6 +1495,8 @@ _EGLSurface *surf; EGLSurface ret; + _EGL_FUNC_START(disp, EGL_OBJECT_DISPLAY_KHR, NULL, EGL_NO_SURFACE); + _EGL_CHECK_CONFIG(disp, conf, EGL_NO_SURFACE, drv); surf = drv->API.CreatePbufferFromClientBuffer(drv, disp, buftype, buffer, @@ -1273,25 +1513,19 @@ /* unbind current contexts */ if (!_eglIsCurrentThreadDummy()) { _EGLThreadInfo *t = _eglGetCurrentThread(); - EGLint api_index = t->CurrentAPIIndex; - EGLint i; + _EGLContext *ctx = t->CurrentContext; - for (i = 0; i < _EGL_API_NUM_APIS; i++) { - _EGLContext *ctx = t->CurrentContexts[i]; - if (ctx) { - _EGLDisplay *disp = ctx->Resource.Display; - _EGLDriver *drv; - - t->CurrentAPIIndex = i; - - mtx_lock(&disp->Mutex); - drv = disp->Driver; - (void) drv->API.MakeCurrent(drv, disp, NULL, NULL, NULL); - mtx_unlock(&disp->Mutex); - } - } + _EGL_FUNC_START(NULL, EGL_OBJECT_THREAD_KHR, NULL, EGL_FALSE); - t->CurrentAPIIndex = api_index; + if (ctx) { + _EGLDisplay *disp = ctx->Resource.Display; + _EGLDriver *drv; + + mtx_lock(&disp->Mutex); + drv = disp->Driver; + (void) drv->API.MakeCurrent(drv, disp, NULL, NULL, NULL); + mtx_unlock(&disp->Mutex); + } } _eglDestroyCurrentThread(); @@ -1300,11 +1534,10 @@ } -static EGLImage EGLAPIENTRY -eglCreateImageKHR(EGLDisplay dpy, EGLContext ctx, EGLenum target, +static EGLImage +_eglCreateImageCommon(_EGLDisplay *disp, EGLContext ctx, EGLenum target, EGLClientBuffer buffer, const EGLint *attr_list) { - _EGLDisplay *disp = _eglLockDisplay(dpy); _EGLContext *context = _eglLookupContext(ctx, disp); _EGLDriver *drv; _EGLImage *img; @@ -1328,18 +1561,31 @@ RETURN_EGL_EVAL(disp, ret); } +static EGLImage EGLAPIENTRY +eglCreateImageKHR(EGLDisplay dpy, EGLContext ctx, EGLenum target, + EGLClientBuffer buffer, const EGLint *attr_list) +{ + _EGLDisplay *disp = _eglLockDisplay(dpy); + _EGL_FUNC_START(disp, EGL_OBJECT_DISPLAY_KHR, NULL, EGL_NO_IMAGE_KHR); + return _eglCreateImageCommon(disp, ctx, target, buffer, attr_list); +} + EGLImage EGLAPIENTRY eglCreateImage(EGLDisplay dpy, EGLContext ctx, EGLenum target, EGLClientBuffer buffer, const EGLAttrib *attr_list) { + _EGLDisplay *disp = _eglLockDisplay(dpy); EGLImage image; - EGLint *int_attribs = _eglConvertAttribsToInt(attr_list); + EGLint *int_attribs; + _EGL_FUNC_START(disp, EGL_OBJECT_DISPLAY_KHR, NULL, EGL_NO_IMAGE_KHR); + + int_attribs = _eglConvertAttribsToInt(attr_list); if (attr_list && !int_attribs) - RETURN_EGL_ERROR(NULL, EGL_BAD_ALLOC, EGL_NO_IMAGE); + RETURN_EGL_ERROR(disp, EGL_BAD_ALLOC, EGL_NO_IMAGE); - image = eglCreateImageKHR(dpy, ctx, target, buffer, int_attribs); + image = _eglCreateImageCommon(disp, ctx, target, buffer, int_attribs); free(int_attribs); return image; } @@ -1353,6 +1599,8 @@ _EGLDriver *drv; EGLBoolean ret; + _EGL_FUNC_START(disp, EGL_OBJECT_IMAGE_KHR, img, EGL_FALSE); + _EGL_CHECK_DISPLAY(disp, EGL_FALSE, drv); if (!disp->Extensions.KHR_image_base) RETURN_EGL_EVAL(disp, EGL_FALSE); @@ -1367,11 +1615,10 @@ static EGLSync -_eglCreateSync(EGLDisplay dpy, EGLenum type, const EGLint *attrib_list, - const EGLAttrib *attrib_list64, EGLBoolean is64, +_eglCreateSync(_EGLDisplay *disp, EGLenum type, const EGLAttrib *attrib_list, + EGLBoolean orig_is_EGLAttrib, EGLenum invalid_type_error) { - _EGLDisplay *disp = _eglLockDisplay(dpy); _EGLContext *ctx = _eglGetCurrentContext(); _EGLDriver *drv; _EGLSync *sync; @@ -1379,12 +1626,30 @@ _EGL_CHECK_DISPLAY(disp, EGL_NO_SYNC_KHR, drv); - if (!disp->Extensions.KHR_cl_event2 && is64) - RETURN_EGL_EVAL(disp, EGL_NO_SYNC_KHR); + if (!disp->Extensions.KHR_cl_event2 && orig_is_EGLAttrib) { + /* There exist two EGLAttrib variants of eglCreateSync*: + * eglCreateSync64KHR which requires EGL_KHR_cl_event2, and eglCreateSync + * which requires EGL 1.5. Here we use the presence of EGL_KHR_cl_event2 + * support as a proxy for EGL 1.5 support, even though that's not + * entirely correct (though _eglComputeVersion does the same). + * + * The EGL spec provides no guidance on how to handle unsupported + * functions. EGL_BAD_MATCH seems reasonable. + */ + RETURN_EGL_ERROR(disp, EGL_BAD_MATCH, EGL_NO_SYNC_KHR); + } + + /* If type is EGL_SYNC_FENCE and no context is current for the bound API + * (i.e., eglGetCurrentContext returns EGL_NO_CONTEXT ), an EGL_BAD_MATCH + * error is generated. + */ + if (!ctx && + (type == EGL_SYNC_FENCE_KHR || type == EGL_SYNC_NATIVE_FENCE_ANDROID)) + RETURN_EGL_ERROR(disp, EGL_BAD_MATCH, EGL_NO_SYNC_KHR); /* return an error if the client API doesn't support GL_OES_EGL_sync */ - if (!ctx || ctx->Resource.Display != dpy || - ctx->ClientAPI != EGL_OPENGL_ES_API) + if (ctx && (ctx->Resource.Display != disp || + ctx->ClientAPI != EGL_OPENGL_ES_API)) RETURN_EGL_ERROR(disp, EGL_BAD_MATCH, EGL_NO_SYNC_KHR); switch (type) { @@ -1400,11 +1665,15 @@ if (!disp->Extensions.KHR_cl_event2) RETURN_EGL_ERROR(disp, invalid_type_error, EGL_NO_SYNC_KHR); break; + case EGL_SYNC_NATIVE_FENCE_ANDROID: + if (!disp->Extensions.ANDROID_native_fence_sync) + RETURN_EGL_ERROR(disp, invalid_type_error, EGL_NO_SYNC_KHR); + break; default: RETURN_EGL_ERROR(disp, invalid_type_error, EGL_NO_SYNC_KHR); } - sync = drv->API.CreateSyncKHR(drv, disp, type, attrib_list, attrib_list64); + sync = drv->API.CreateSyncKHR(drv, disp, type, attrib_list); ret = (sync) ? _eglLinkSync(sync) : EGL_NO_SYNC_KHR; RETURN_EGL_EVAL(disp, ret); @@ -1412,17 +1681,40 @@ static EGLSync EGLAPIENTRY -eglCreateSyncKHR(EGLDisplay dpy, EGLenum type, const EGLint *attrib_list) +eglCreateSyncKHR(EGLDisplay dpy, EGLenum type, const EGLint *int_list) { - return _eglCreateSync(dpy, type, attrib_list, NULL, EGL_FALSE, + _EGLDisplay *disp = _eglLockDisplay(dpy); + _EGL_FUNC_START(disp, EGL_OBJECT_DISPLAY_KHR, NULL, EGL_FALSE); + + EGLSync sync; + EGLAttrib *attrib_list; + EGLint err; + + if (sizeof(int_list[0]) == sizeof(attrib_list[0])) { + attrib_list = (EGLAttrib *) int_list; + } else { + err = _eglConvertIntsToAttribs(int_list, &attrib_list); + if (err != EGL_SUCCESS) + RETURN_EGL_ERROR(disp, err, EGL_NO_SYNC); + } + + sync = _eglCreateSync(disp, type, attrib_list, EGL_FALSE, EGL_BAD_ATTRIBUTE); + + if (sizeof(int_list[0]) != sizeof(attrib_list[0])) + free(attrib_list); + + /* Don't double-unlock the display. _eglCreateSync already unlocked it. */ + return sync; } static EGLSync EGLAPIENTRY eglCreateSync64KHR(EGLDisplay dpy, EGLenum type, const EGLAttrib *attrib_list) { - return _eglCreateSync(dpy, type, NULL, attrib_list, EGL_TRUE, + _EGLDisplay *disp = _eglLockDisplay(dpy); + _EGL_FUNC_START(disp, EGL_OBJECT_DISPLAY_KHR, NULL, EGL_FALSE); + return _eglCreateSync(disp, type, attrib_list, EGL_TRUE, EGL_BAD_ATTRIBUTE); } @@ -1430,7 +1722,9 @@ EGLSync EGLAPIENTRY eglCreateSync(EGLDisplay dpy, EGLenum type, const EGLAttrib *attrib_list) { - return _eglCreateSync(dpy, type, NULL, attrib_list, EGL_TRUE, + _EGLDisplay *disp = _eglLockDisplay(dpy); + _EGL_FUNC_START(disp, EGL_OBJECT_DISPLAY_KHR, NULL, EGL_FALSE); + return _eglCreateSync(disp, type, attrib_list, EGL_TRUE, EGL_BAD_PARAMETER); } @@ -1443,9 +1737,12 @@ _EGLDriver *drv; EGLBoolean ret; + _EGL_FUNC_START(disp, EGL_OBJECT_SYNC_KHR, s, EGL_FALSE); + _EGL_CHECK_SYNC(disp, s, EGL_FALSE, drv); assert(disp->Extensions.KHR_reusable_sync || - disp->Extensions.KHR_fence_sync); + disp->Extensions.KHR_fence_sync || + disp->Extensions.ANDROID_native_fence_sync); _eglUnlinkSync(s); ret = drv->API.DestroySyncKHR(drv, disp, s); @@ -1462,9 +1759,12 @@ _EGLDriver *drv; EGLint ret; + _EGL_FUNC_START(disp, EGL_OBJECT_SYNC_KHR, s, EGL_FALSE); + _EGL_CHECK_SYNC(disp, s, EGL_FALSE, drv); assert(disp->Extensions.KHR_reusable_sync || - disp->Extensions.KHR_fence_sync); + disp->Extensions.KHR_fence_sync || + disp->Extensions.ANDROID_native_fence_sync); if (s->SyncStatus == EGL_SIGNALED_KHR) RETURN_EGL_EVAL(disp, EGL_CONDITION_SATISFIED_KHR); @@ -1490,11 +1790,9 @@ } -static EGLint EGLAPIENTRY -eglWaitSyncKHR(EGLDisplay dpy, EGLSync sync, EGLint flags) +static EGLint +_eglWaitSyncCommon(_EGLDisplay *disp, _EGLSync *s, EGLint flags) { - _EGLDisplay *disp = _eglLockDisplay(dpy); - _EGLSync *s = _eglLookupSync(sync, disp); _EGLContext *ctx = _eglGetCurrentContext(); _EGLDriver *drv; EGLint ret; @@ -1515,6 +1813,15 @@ RETURN_EGL_EVAL(disp, ret); } +static EGLint EGLAPIENTRY +eglWaitSyncKHR(EGLDisplay dpy, EGLSync sync, EGLint flags) +{ + _EGLDisplay *disp = _eglLockDisplay(dpy); + _EGLSync *s = _eglLookupSync(sync, disp); + _EGL_FUNC_START(disp, EGL_OBJECT_SYNC_KHR, s, EGL_FALSE); + return _eglWaitSyncCommon(disp, s, flags); +} + EGLBoolean EGLAPIENTRY eglWaitSync(EGLDisplay dpy, EGLSync sync, EGLint flags) @@ -1523,7 +1830,10 @@ * EGLBoolean. In both cases, the return values can only be EGL_FALSE and * EGL_TRUE. */ - return eglWaitSyncKHR(dpy, sync, flags); + _EGLDisplay *disp = _eglLockDisplay(dpy); + _EGLSync *s = _eglLookupSync(sync, disp); + _EGL_FUNC_START(disp, EGL_OBJECT_SYNC_KHR, s, EGL_FALSE); + return _eglWaitSyncCommon(disp, s, flags); } @@ -1535,6 +1845,8 @@ _EGLDriver *drv; EGLBoolean ret; + _EGL_FUNC_START(disp, EGL_OBJECT_SYNC_KHR, s, EGL_FALSE); + _EGL_CHECK_SYNC(disp, s, EGL_FALSE, drv); assert(disp->Extensions.KHR_reusable_sync); ret = drv->API.SignalSyncKHR(drv, disp, s, mode); @@ -1543,34 +1855,46 @@ } -EGLBoolean EGLAPIENTRY -eglGetSyncAttrib(EGLDisplay dpy, EGLSync sync, EGLint attribute, EGLAttrib *value) +static EGLBoolean +_eglGetSyncAttribCommon(_EGLDisplay *disp, _EGLSync *s, EGLint attribute, EGLAttrib *value) { - _EGLDisplay *disp = _eglLockDisplay(dpy); - _EGLSync *s = _eglLookupSync(sync, disp); _EGLDriver *drv; EGLBoolean ret; _EGL_CHECK_SYNC(disp, s, EGL_FALSE, drv); assert(disp->Extensions.KHR_reusable_sync || - disp->Extensions.KHR_fence_sync); + disp->Extensions.KHR_fence_sync || + disp->Extensions.ANDROID_native_fence_sync); ret = drv->API.GetSyncAttrib(drv, disp, s, attribute, value); RETURN_EGL_EVAL(disp, ret); } +EGLBoolean EGLAPIENTRY +eglGetSyncAttrib(EGLDisplay dpy, EGLSync sync, EGLint attribute, EGLAttrib *value) +{ + _EGLDisplay *disp = _eglLockDisplay(dpy); + _EGLSync *s = _eglLookupSync(sync, disp); + _EGL_FUNC_START(disp, EGL_OBJECT_SYNC_KHR, s, EGL_FALSE); + return _eglGetSyncAttribCommon(disp, s, attribute, value); +} + static EGLBoolean EGLAPIENTRY eglGetSyncAttribKHR(EGLDisplay dpy, EGLSync sync, EGLint attribute, EGLint *value) { + _EGLDisplay *disp = _eglLockDisplay(dpy); + _EGLSync *s = _eglLookupSync(sync, disp); EGLAttrib attrib; EGLBoolean result; + _EGL_FUNC_START(disp, EGL_OBJECT_SYNC_KHR, s, EGL_FALSE); + if (!value) - RETURN_EGL_ERROR(NULL, EGL_BAD_PARAMETER, EGL_FALSE); + RETURN_EGL_ERROR(disp, EGL_BAD_PARAMETER, EGL_FALSE); attrib = *value; - result = eglGetSyncAttrib(dpy, sync, attribute, &attrib); + result = _eglGetSyncAttribCommon(disp, s, attribute, &attrib); /* The EGL_KHR_fence_sync spec says this about eglGetSyncAttribKHR: * @@ -1583,6 +1907,29 @@ return result; } +static EGLint EGLAPIENTRY +eglDupNativeFenceFDANDROID(EGLDisplay dpy, EGLSync sync) +{ + _EGLDisplay *disp = _eglLockDisplay(dpy); + _EGLSync *s = _eglLookupSync(sync, disp); + _EGLDriver *drv; + EGLBoolean ret; + + _EGL_FUNC_START(disp, EGL_OBJECT_SYNC_KHR, s, EGL_FALSE); + + /* the spec doesn't seem to specify what happens if the fence + * type is not EGL_SYNC_NATIVE_FENCE_ANDROID, but this seems + * sensible: + */ + if (!(s && (s->Type == EGL_SYNC_NATIVE_FENCE_ANDROID))) + RETURN_EGL_ERROR(disp, EGL_BAD_PARAMETER, EGL_NO_NATIVE_FENCE_FD_ANDROID); + + _EGL_CHECK_SYNC(disp, s, EGL_NO_NATIVE_FENCE_FD_ANDROID, drv); + assert(disp->Extensions.ANDROID_native_fence_sync); + ret = drv->API.DupNativeFenceFDANDROID(drv, disp, s); + + RETURN_EGL_EVAL(disp, ret); +} static EGLBoolean EGLAPIENTRY eglSwapBuffersRegionNOK(EGLDisplay dpy, EGLSurface surface, @@ -1594,6 +1941,8 @@ _EGLDriver *drv; EGLBoolean ret; + _EGL_FUNC_START(disp, EGL_OBJECT_SURFACE_KHR, surf, EGL_FALSE); + _EGL_CHECK_SURFACE(disp, surf, EGL_FALSE, drv); if (!disp->Extensions.NOK_swap_region) @@ -1618,6 +1967,8 @@ _EGLImage *img; EGLImage ret; + _EGL_FUNC_START(disp, EGL_OBJECT_DISPLAY_KHR, NULL, EGL_FALSE); + _EGL_CHECK_DISPLAY(disp, EGL_NO_IMAGE_KHR, drv); if (!disp->Extensions.MESA_drm_image) RETURN_EGL_EVAL(disp, EGL_NO_IMAGE_KHR); @@ -1637,6 +1988,8 @@ _EGLDriver *drv; EGLBoolean ret; + _EGL_FUNC_START(disp, EGL_OBJECT_IMAGE_KHR, img, EGL_FALSE); + _EGL_CHECK_DISPLAY(disp, EGL_FALSE, drv); assert(disp->Extensions.MESA_drm_image); @@ -1658,6 +2011,8 @@ _EGLDriver *drv; EGLBoolean ret; + _EGL_FUNC_START(disp, EGL_OBJECT_DISPLAY_KHR, NULL, EGL_FALSE); + _EGL_CHECK_DISPLAY(disp, EGL_FALSE, drv); assert(disp->Extensions.WL_bind_wayland_display); @@ -1676,6 +2031,8 @@ _EGLDriver *drv; EGLBoolean ret; + _EGL_FUNC_START(disp, EGL_OBJECT_DISPLAY_KHR, NULL, EGL_FALSE); + _EGL_CHECK_DISPLAY(disp, EGL_FALSE, drv); assert(disp->Extensions.WL_bind_wayland_display); @@ -1695,6 +2052,8 @@ _EGLDriver *drv; EGLBoolean ret; + _EGL_FUNC_START(disp, EGL_OBJECT_DISPLAY_KHR, NULL, EGL_FALSE); + _EGL_CHECK_DISPLAY(disp, EGL_FALSE, drv); assert(disp->Extensions.WL_bind_wayland_display); @@ -1715,6 +2074,8 @@ _EGLDriver *drv; struct wl_buffer *ret; + _EGL_FUNC_START(disp, EGL_OBJECT_DISPLAY_KHR, NULL, EGL_FALSE); + _EGL_CHECK_DISPLAY(disp, NULL, drv); assert(disp->Extensions.WL_create_wayland_buffer_from_image); @@ -1737,6 +2098,8 @@ _EGLDriver *drv; EGLBoolean ret; + _EGL_FUNC_START(disp, EGL_OBJECT_SURFACE_KHR, surf, EGL_FALSE); + _EGL_CHECK_SURFACE(disp, surf, EGL_FALSE, drv); if (!disp->Extensions.NV_post_sub_buffer) @@ -1757,6 +2120,8 @@ _EGLDriver *drv; EGLBoolean ret; + _EGL_FUNC_START(disp, EGL_OBJECT_SURFACE_KHR, surf, EGL_FALSE); + _EGL_CHECK_SURFACE(disp, surf, EGL_FALSE, drv); if (!disp->Extensions.CHROMIUM_sync_control) RETURN_EGL_EVAL(disp, EGL_FALSE); @@ -1779,6 +2144,8 @@ _EGLDriver *drv; EGLBoolean ret; + _EGL_FUNC_START(disp, EGL_OBJECT_IMAGE_KHR, img, EGL_FALSE); + _EGL_CHECK_DISPLAY(disp, EGL_FALSE, drv); assert(disp->Extensions.MESA_image_dma_buf_export); @@ -1800,6 +2167,8 @@ _EGLDriver *drv; EGLBoolean ret; + _EGL_FUNC_START(disp, EGL_OBJECT_IMAGE_KHR, img, EGL_FALSE); + _EGL_CHECK_DISPLAY(disp, EGL_FALSE, drv); assert(disp->Extensions.MESA_image_dma_buf_export); @@ -1811,6 +2180,148 @@ RETURN_EGL_EVAL(disp, ret); } +static EGLint EGLAPIENTRY +eglLabelObjectKHR(EGLDisplay dpy, EGLenum objectType, EGLObjectKHR object, + EGLLabelKHR label) +{ + _EGLDisplay *disp = NULL; + _EGLResourceType type; + + _EGL_FUNC_START(NULL, EGL_NONE, NULL, EGL_BAD_ALLOC); + + if (objectType == EGL_OBJECT_THREAD_KHR) { + _EGLThreadInfo *t = _eglGetCurrentThread(); + + if (!_eglIsCurrentThreadDummy()) { + t->Label = label; + return EGL_SUCCESS; + } + + RETURN_EGL_ERROR(NULL, EGL_BAD_ALLOC, EGL_BAD_ALLOC); + } + + disp = _eglLockDisplay(dpy); + if (disp == NULL) + RETURN_EGL_ERROR(disp, EGL_BAD_DISPLAY, EGL_BAD_DISPLAY); + + if (objectType == EGL_OBJECT_DISPLAY_KHR) { + if (dpy != (EGLDisplay) object) + RETURN_EGL_ERROR(disp, EGL_BAD_PARAMETER, EGL_BAD_PARAMETER); + + disp->Label = label; + RETURN_EGL_EVAL(disp, EGL_SUCCESS); + } + + switch (objectType) { + case EGL_OBJECT_CONTEXT_KHR: + type = _EGL_RESOURCE_CONTEXT; + break; + case EGL_OBJECT_SURFACE_KHR: + type = _EGL_RESOURCE_SURFACE; + break; + case EGL_OBJECT_IMAGE_KHR: + type = _EGL_RESOURCE_IMAGE; + break; + case EGL_OBJECT_SYNC_KHR: + type = _EGL_RESOURCE_SYNC; + break; + case EGL_OBJECT_STREAM_KHR: + default: + RETURN_EGL_ERROR(disp, EGL_BAD_PARAMETER, EGL_BAD_PARAMETER); + } + + if (_eglCheckResource(object, type, disp)) { + _EGLResource *res = (_EGLResource *) object; + + res->Label = label; + RETURN_EGL_EVAL(disp, EGL_SUCCESS); + } + + RETURN_EGL_ERROR(disp, EGL_BAD_PARAMETER, EGL_BAD_PARAMETER); +} + +static EGLBoolean +_validDebugMessageLevel(EGLAttrib level) +{ + return (level >= EGL_DEBUG_MSG_CRITICAL_KHR && + level <= EGL_DEBUG_MSG_INFO_KHR); +} + +static EGLint EGLAPIENTRY +eglDebugMessageControlKHR(EGLDEBUGPROCKHR callback, + const EGLAttrib *attrib_list) +{ + unsigned int newEnabled; + + _EGL_FUNC_START(NULL, EGL_NONE, NULL, EGL_BAD_ALLOC); + + mtx_lock(_eglGlobal.Mutex); + + newEnabled = _eglGlobal.debugTypesEnabled; + if (attrib_list != NULL) { + int i; + + for (i = 0; attrib_list[i] != EGL_NONE; i += 2) { + if (_validDebugMessageLevel(attrib_list[i])) { + if (attrib_list[i + 1]) + newEnabled |= DebugBitFromType(attrib_list[i]); + else + newEnabled &= ~DebugBitFromType(attrib_list[i]); + continue; + } + + // On error, set the last error code, call the current + // debug callback, and return the error code. + mtx_unlock(_eglGlobal.Mutex); + _eglReportError(EGL_BAD_ATTRIBUTE, NULL, + "Invalid attribute 0x%04lx", (unsigned long) attrib_list[i]); + return EGL_BAD_ATTRIBUTE; + } + } + + if (callback != NULL) { + _eglGlobal.debugCallback = callback; + _eglGlobal.debugTypesEnabled = newEnabled; + } else { + _eglGlobal.debugCallback = NULL; + _eglGlobal.debugTypesEnabled = _EGL_DEBUG_BIT_CRITICAL | _EGL_DEBUG_BIT_ERROR; + } + + mtx_unlock(_eglGlobal.Mutex); + return EGL_SUCCESS; +} + +static EGLBoolean EGLAPIENTRY +eglQueryDebugKHR(EGLint attribute, EGLAttrib *value) +{ + _EGL_FUNC_START(NULL, EGL_NONE, NULL, EGL_BAD_ALLOC); + + mtx_lock(_eglGlobal.Mutex); + + do { + if (_validDebugMessageLevel(attribute)) { + if (_eglGlobal.debugTypesEnabled & DebugBitFromType(attribute)) + *value = EGL_TRUE; + else + *value = EGL_FALSE; + break; + } + + if (attribute == EGL_DEBUG_CALLBACK_KHR) { + *value = (EGLAttrib) _eglGlobal.debugCallback; + break; + } + + mtx_unlock(_eglGlobal.Mutex); + _eglReportError(EGL_BAD_ATTRIBUTE, NULL, + "Invalid attribute 0x%04lx", (unsigned long) attribute); + return EGL_FALSE; + } while (0); + + mtx_unlock(_eglGlobal.Mutex); + return EGL_TRUE; +} + __eglMustCastToProperFunctionPointerType EGLAPIENTRY eglGetProcAddress(const char *procname) { @@ -1884,12 +2395,17 @@ { "eglCreateWaylandBufferFromImageWL", (_EGLProc) eglCreateWaylandBufferFromImageWL }, { "eglPostSubBufferNV", (_EGLProc) eglPostSubBufferNV }, { "eglSwapBuffersWithDamageEXT", (_EGLProc) eglSwapBuffersWithDamageEXT }, + { "eglSwapBuffersWithDamageKHR", (_EGLProc) eglSwapBuffersWithDamageKHR }, { "eglGetPlatformDisplayEXT", (_EGLProc) eglGetPlatformDisplayEXT }, { "eglCreatePlatformWindowSurfaceEXT", (_EGLProc) eglCreatePlatformWindowSurfaceEXT }, { "eglCreatePlatformPixmapSurfaceEXT", (_EGLProc) eglCreatePlatformPixmapSurfaceEXT }, { "eglGetSyncValuesCHROMIUM", (_EGLProc) eglGetSyncValuesCHROMIUM }, { "eglExportDMABUFImageQueryMESA", (_EGLProc) eglExportDMABUFImageQueryMESA }, { "eglExportDMABUFImageMESA", (_EGLProc) eglExportDMABUFImageMESA }, + { "eglLabelObjectKHR", (_EGLProc) eglLabelObjectKHR }, + { "eglDebugMessageControlKHR", (_EGLProc) eglDebugMessageControlKHR }, + { "eglQueryDebugKHR", (_EGLProc) eglQueryDebugKHR }, + { "eglDupNativeFenceFDANDROID", (_EGLProc) eglDupNativeFenceFDANDROID }, { NULL, NULL } }; EGLint i; @@ -1898,6 +2414,8 @@ if (!procname) RETURN_EGL_SUCCESS(NULL, NULL); + _EGL_FUNC_START(NULL, EGL_NONE, NULL, NULL); + ret = NULL; if (strncmp(procname, "egl", 3) == 0) { for (i = 0; egl_functions[i].name; i++) { diff -Nru mesa-12.0.6/src/egl/main/eglapi.h mesa-17.0.7/src/egl/main/eglapi.h --- mesa-12.0.6/src/egl/main/eglapi.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/main/eglapi.h 2017-06-01 10:37:10.000000000 +0000 @@ -135,8 +135,7 @@ _EGLImage *image); _EGLSync *(*CreateSyncKHR)(_EGLDriver *drv, _EGLDisplay *dpy, EGLenum type, - const EGLint *attrib_list, - const EGLAttrib *attrib_list64); + const EGLAttrib *attrib_list); EGLBoolean (*DestroySyncKHR)(_EGLDriver *drv, _EGLDisplay *dpy, _EGLSync *sync); EGLint (*ClientWaitSyncKHR)(_EGLDriver *drv, _EGLDisplay *dpy, @@ -147,6 +146,8 @@ EGLBoolean (*GetSyncAttrib)(_EGLDriver *drv, _EGLDisplay *dpy, _EGLSync *sync, EGLint attribute, EGLAttrib *value); + EGLint (*DupNativeFenceFDANDROID)(_EGLDriver *drv, _EGLDisplay *dpy, + _EGLSync *sync); EGLBoolean (*SwapBuffersRegionNOK)(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *surf, EGLint numRects, @@ -199,7 +200,6 @@ struct mesa_glinterop_export_out *out); }; - #ifdef __cplusplus } #endif diff -Nru mesa-12.0.6/src/egl/main/eglconfig.c mesa-17.0.7/src/egl/main/eglconfig.c --- mesa-12.0.6/src/egl/main/eglconfig.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/main/eglconfig.c 2017-06-01 10:37:10.000000000 +0000 @@ -38,6 +38,7 @@ #include #include "c99_compat.h" +#include "eglcompiler.h" #include "eglconfig.h" #include "egldisplay.h" #include "eglcurrent.h" @@ -598,14 +599,14 @@ return 0; /* the enum values have the desired ordering */ - assert(EGL_NONE < EGL_SLOW_CONFIG); - assert(EGL_SLOW_CONFIG < EGL_NON_CONFORMANT_CONFIG); + STATIC_ASSERT(EGL_NONE < EGL_SLOW_CONFIG); + STATIC_ASSERT(EGL_SLOW_CONFIG < EGL_NON_CONFORMANT_CONFIG); val1 = conf1->ConfigCaveat - conf2->ConfigCaveat; if (val1) return val1; /* the enum values have the desired ordering */ - assert(EGL_RGB_BUFFER < EGL_LUMINANCE_BUFFER); + STATIC_ASSERT(EGL_RGB_BUFFER < EGL_LUMINANCE_BUFFER); val1 = conf1->ColorBufferType - conf2->ColorBufferType; if (val1) return val1; @@ -727,7 +728,7 @@ EGLint i, count; if (!num_configs) - return _eglError(EGL_BAD_PARAMETER, "eglChooseConfigs"); + return _eglError(EGL_BAD_PARAMETER, "eglChooseConfig"); /* get the number of matched configs */ count = _eglFilterArray(array, NULL, 0, diff -Nru mesa-12.0.6/src/egl/main/eglcontext.c mesa-17.0.7/src/egl/main/eglcontext.c --- mesa-12.0.6/src/egl/main/eglcontext.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/main/eglcontext.c 2017-06-01 10:37:10.000000000 +0000 @@ -184,19 +184,33 @@ break; } - /* The EGL_KHR_create_context_spec says: - * - * "If the EGL_CONTEXT_OPENGL_ROBUST_ACCESS_BIT_KHR bit is set in - * EGL_CONTEXT_FLAGS_KHR, then a context supporting will be created. Robust buffer access is defined in the - * GL_ARB_robustness extension specification, and the resulting - * context must also support either the GL_ARB_robustness - * extension, or a version of OpenGL incorporating equivalent - * functionality. This bit is supported for OpenGL contexts. - */ if ((val & EGL_CONTEXT_OPENGL_ROBUST_ACCESS_BIT_KHR) && - (api != EGL_OPENGL_API || - !dpy->Extensions.EXT_create_context_robustness)) { + api != EGL_OPENGL_API) { + /* The EGL_KHR_create_context spec says: + * + * 10) Which error should be generated if robust buffer access + * or reset notifications are requested under OpenGL ES? + * + * As per Issue 6, this extension does not support creating + * robust contexts for OpenGL ES. This is only supported via + * the EGL_EXT_create_context_robustness extension. + * + * Attempting to use this extension to create robust OpenGL + * ES context will generate an EGL_BAD_ATTRIBUTE error. This + * specific error is generated because this extension does + * not define the EGL_CONTEXT_OPENGL_ROBUST_ACCESS_BIT_KHR + * and EGL_CONTEXT_OPENGL_RESET_NOTIFICATION_STRATEGY_KHR + * bits for OpenGL ES contexts. Thus, use of these bits fall + * under condition described by: "If an attribute is + * specified that is not meaningful for the client API + * type.." in the above specification. + * + * The spec requires that we emit the error even if the display + * supports EGL_EXT_create_context_robustness. To create a robust + * GLES context, the *attribute* + * EGL_CONTEXT_OPENGL_ROBUST_ACCESS_EXT must be used, not the + * *flag* EGL_CONTEXT_OPENGL_ROBUST_ACCESS_BIT_KHR. + */ err = EGL_BAD_ATTRIBUTE; break; } @@ -457,6 +471,16 @@ /** * Initialize the given _EGLContext object to defaults and/or the values * in the attrib_list. + * + * According to EGL 1.5 Section 3.7: + * + * "EGL_OPENGL_API and EGL_OPENGL_ES_API are interchangeable for all + * purposes except eglCreateContext." + * + * And since we only support GL and GLES, this is the only place where the + * bound API matters at all. We look up the current API from the current + * thread, and stash that in the context we're initializing. Our caller is + * responsible for determining whether that's an API it supports. */ EGLBoolean _eglInitContext(_EGLContext *ctx, _EGLDisplay *dpy, _EGLConfig *conf, @@ -528,9 +552,14 @@ switch (attribute) { case EGL_CONFIG_ID: - if (!c->Config) - return _eglError(EGL_BAD_ATTRIBUTE, "eglQueryContext"); - *value = c->Config->ConfigID; + /* + * From EGL_KHR_no_config_context: + * + * "Querying EGL_CONFIG_ID returns the ID of the EGLConfig with + * respect to which the context was created, or zero if created + * without respect to an EGLConfig." + */ + *value = c->Config ? c->Config->ConfigID : 0; break; case EGL_CONTEXT_CLIENT_VERSION: *value = c->ClientMajorVersion; @@ -557,20 +586,16 @@ static _EGLContext * _eglBindContextToThread(_EGLContext *ctx, _EGLThreadInfo *t) { - EGLint apiIndex; _EGLContext *oldCtx; - apiIndex = (ctx) ? - _eglConvertApiToIndex(ctx->ClientAPI) : t->CurrentAPIIndex; - - oldCtx = t->CurrentContexts[apiIndex]; + oldCtx = t->CurrentContext; if (ctx != oldCtx) { if (oldCtx) oldCtx->Binding = NULL; if (ctx) ctx->Binding = t; - t->CurrentContexts[apiIndex] = ctx; + t->CurrentContext = ctx; } return oldCtx; @@ -585,7 +610,6 @@ { _EGLThreadInfo *t = _eglGetCurrentThread(); _EGLDisplay *dpy; - EGLint conflict_api; if (_eglIsCurrentThreadDummy()) return _eglError(EGL_BAD_ALLOC, "eglMakeCurrent"); @@ -617,13 +641,11 @@ if (ctx->Binding && ctx->Binding != t) return _eglError(EGL_BAD_ACCESS, "eglMakeCurrent"); if (draw && draw->CurrentContext && draw->CurrentContext != ctx) { - if (draw->CurrentContext->Binding != t || - draw->CurrentContext->ClientAPI != ctx->ClientAPI) + if (draw->CurrentContext->Binding != t) return _eglError(EGL_BAD_ACCESS, "eglMakeCurrent"); } if (read && read->CurrentContext && read->CurrentContext != ctx) { - if (read->CurrentContext->Binding != t || - read->CurrentContext->ClientAPI != ctx->ClientAPI) + if (read->CurrentContext->Binding != t) return _eglError(EGL_BAD_ACCESS, "eglMakeCurrent"); } @@ -634,9 +656,9 @@ (read && read->Config != ctx->Config)) return _eglError(EGL_BAD_MATCH, "eglMakeCurrent"); } else { - /* Otherwise we must be using the EGL_MESA_configless_context + /* Otherwise we must be using the EGL_KHR_no_config_context * extension */ - assert(dpy->Extensions.MESA_configless_context); + assert(dpy->Extensions.KHR_no_config_context); /* The extension doesn't permit binding draw and read buffers with * differing contexts */ @@ -644,22 +666,6 @@ return _eglError(EGL_BAD_MATCH, "eglMakeCurrent"); } - switch (ctx->ClientAPI) { - /* OpenGL and OpenGL ES are conflicting */ - case EGL_OPENGL_ES_API: - conflict_api = EGL_OPENGL_API; - break; - case EGL_OPENGL_API: - conflict_api = EGL_OPENGL_ES_API; - break; - default: - conflict_api = -1; - break; - } - - if (conflict_api >= 0 && _eglGetAPIContext(conflict_api)) - return _eglError(EGL_BAD_ACCESS, "eglMakeCurrent"); - return EGL_TRUE; } diff -Nru mesa-12.0.6/src/egl/main/eglcurrent.c mesa-17.0.7/src/egl/main/eglcurrent.c --- mesa-12.0.6/src/egl/main/eglcurrent.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/main/eglcurrent.c 2017-06-01 10:37:10.000000000 +0000 @@ -26,8 +26,10 @@ **************************************************************************/ +#include #include #include +#include #include "c99_compat.h" #include "c11/threads.h" @@ -35,10 +37,9 @@ #include "eglcurrent.h" #include "eglglobals.h" - /* This should be kept in sync with _eglInitThreadInfo() */ #define _EGL_THREAD_INFO_INITIALIZER \ - { EGL_SUCCESS, { NULL }, 0 } + { EGL_SUCCESS, NULL, EGL_OPENGL_ES_API, NULL, NULL, NULL } /* a fallback thread info to guarantee that every thread always has one */ static _EGLThreadInfo dummy_thread = _EGL_THREAD_INFO_INITIALIZER; @@ -111,7 +112,7 @@ memset(t, 0, sizeof(*t)); t->LastError = EGL_SUCCESS; /* default, per EGL spec */ - t->CurrentAPIIndex = _eglConvertApiToIndex(EGL_OPENGL_ES_API); + t->CurrentAPI = EGL_OPENGL_ES_API; } @@ -205,32 +206,21 @@ /** - * Return the currently bound context of the given API, or NULL. - */ -_EGLContext * -_eglGetAPIContext(EGLenum api) -{ - _EGLThreadInfo *t = _eglGetCurrentThread(); - return t->CurrentContexts[_eglConvertApiToIndex(api)]; -} - - -/** * Return the currently bound context of the current API, or NULL. */ _EGLContext * _eglGetCurrentContext(void) { _EGLThreadInfo *t = _eglGetCurrentThread(); - return t->CurrentContexts[t->CurrentAPIIndex]; + return t->CurrentContext; } /** * Record EGL error code and return EGL_FALSE. */ -EGLBoolean -_eglError(EGLint errCode, const char *msg) +static EGLBoolean +_eglInternalError(EGLint errCode, const char *msg) { _EGLThreadInfo *t = _eglGetCurrentThread(); @@ -290,3 +280,86 @@ return EGL_FALSE; } + +EGLBoolean +_eglError(EGLint errCode, const char *msg) +{ + if (errCode != EGL_SUCCESS) { + EGLint type; + if (errCode == EGL_BAD_ALLOC) { + type = EGL_DEBUG_MSG_CRITICAL_KHR; + } else { + type = EGL_DEBUG_MSG_ERROR_KHR; + } + + _eglDebugReport(errCode, msg, type, NULL); + } else + _eglInternalError(errCode, msg); + + return EGL_FALSE; +} + +/** + * Returns the label set for the current thread. + */ +EGLLabelKHR +_eglGetThreadLabel(void) +{ + _EGLThreadInfo *t = _eglGetCurrentThread(); + return t->Label; +} + +static void +_eglDebugReportFullv(EGLenum error, const char *command, const char *funcName, + EGLint type, EGLLabelKHR objectLabel, const char *message, va_list args) +{ + EGLDEBUGPROCKHR callback = NULL; + + mtx_lock(_eglGlobal.Mutex); + if (_eglGlobal.debugTypesEnabled & DebugBitFromType(type)) { + callback = _eglGlobal.debugCallback; + } + mtx_unlock(_eglGlobal.Mutex); + + if (callback != NULL) { + char *buf = NULL; + + if (message != NULL) { + if (vasprintf(&buf, message, args) < 0) { + buf = NULL; + } + } + callback(error, command, type, _eglGetThreadLabel(), objectLabel, buf); + free(buf); + } + + if (type == EGL_DEBUG_MSG_CRITICAL_KHR || type == EGL_DEBUG_MSG_ERROR_KHR) { + _eglInternalError(error, funcName); + } +} + +void +_eglDebugReportFull(EGLenum error, const char *command, const char *funcName, + EGLint type, EGLLabelKHR objectLabel, const char *message, ...) +{ + va_list args; + va_start(args, message); + _eglDebugReportFullv(error, command, funcName, type, objectLabel, message, args); + va_end(args); +} + +void +_eglDebugReport(EGLenum error, const char *funcName, + EGLint type, const char *message, ...) +{ + _EGLThreadInfo *thr = _eglGetCurrentThread(); + va_list args; + + if (funcName == NULL) { + funcName = thr->CurrentFuncName; + } + + va_start(args, message); + _eglDebugReportFullv(error, thr->CurrentFuncName, funcName, type, thr->CurrentObjectLabel, message, args); + va_end(args); +} diff -Nru mesa-12.0.6/src/egl/main/eglcurrent.h mesa-17.0.7/src/egl/main/eglcurrent.h --- mesa-12.0.6/src/egl/main/eglcurrent.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/main/eglcurrent.h 2017-06-01 10:37:10.000000000 +0000 @@ -46,20 +46,22 @@ EGL_OPENGL_BIT) -#define _EGL_API_FIRST_API EGL_OPENGL_ES_API -#define _EGL_API_LAST_API EGL_OPENGL_API -#define _EGL_API_NUM_APIS (_EGL_API_LAST_API - _EGL_API_FIRST_API + 1) - - /** * Per-thread info */ struct _egl_thread_info { EGLint LastError; - _EGLContext *CurrentContexts[_EGL_API_NUM_APIS]; - /* use index for fast access to current context */ - EGLint CurrentAPIIndex; + _EGLContext *CurrentContext; + EGLenum CurrentAPI; + EGLLabelKHR Label; + + /** + * The name of the EGL function that's being called at the moment. This is + * used to report the function name to the EGL_KHR_debug callback. + */ + const char *CurrentFuncName; + EGLLabelKHR CurrentObjectLabel; }; @@ -69,29 +71,12 @@ static inline EGLBoolean _eglIsApiValid(EGLenum api) { - return (api >= _EGL_API_FIRST_API && api <= _EGL_API_LAST_API); -} - - -/** - * Convert a client API enum to an index, for use by thread info. - * The client API enum is assumed to be valid. - */ -static inline EGLint -_eglConvertApiToIndex(EGLenum api) -{ - return api - _EGL_API_FIRST_API; -} - - -/** - * Convert an index, used by thread info, to a client API enum. - * The index is assumed to be valid. - */ -static inline EGLenum -_eglConvertApiFromIndex(EGLint idx) -{ - return _EGL_API_FIRST_API + idx; +#ifdef ANDROID + /* OpenGL is not a valid/supported API on Android */ + return api == EGL_OPENGL_ES_API; +#else + return (api == EGL_OPENGL_ES_API || api == EGL_OPENGL_API); +#endif } @@ -108,16 +93,34 @@ extern _EGLContext * -_eglGetAPIContext(EGLenum api); - - -extern _EGLContext * _eglGetCurrentContext(void); extern EGLBoolean _eglError(EGLint errCode, const char *msg); +extern EGLLabelKHR +_eglGetThreadLabel(void); + +extern void +_eglDebugReportFull(EGLenum error, const char *command, const char *funcName, + EGLint type, EGLLabelKHR objectLabel, const char *message, ...); + +extern void +_eglDebugReport(EGLenum error, const char *funcName, + EGLint type, const char *message, ...); + +#define _eglReportCritical(error, funcName, ...) \ + _eglDebugReport(error, funcName, EGL_DEBUG_MSG_CRITICAL_KHR, __VA_ARGS__) + +#define _eglReportError(error, funcName, ...) \ + _eglDebugReport(error, funcName, EGL_DEBUG_MSG_ERROR_KHR, __VA_ARGS__) + +#define _eglReportWarn(funcName, ...) \ + _eglDebugReport(EGL_SUCCESS, funcName, EGL_DEBUG_MSG_WARN_KHR, __VA_ARGS__) + +#define _eglReportInfo(funcName, ...) \ + _eglDebugReport(EGL_SUCCESS, funcName, EGL_DEBUG_MSG_INFO_KHR, __VA_ARGS__) #ifdef __cplusplus } diff -Nru mesa-12.0.6/src/egl/main/egldefines.h mesa-17.0.7/src/egl/main/egldefines.h --- mesa-12.0.6/src/egl/main/egldefines.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/main/egldefines.h 2017-06-01 10:37:10.000000000 +0000 @@ -50,8 +50,6 @@ #define _EGL_VENDOR_STRING "Mesa Project" -#define MIN2(A, B) (((A) < (B)) ? (A) : (B)) - #ifdef __cplusplus } #endif diff -Nru mesa-12.0.6/src/egl/main/egldisplay.c mesa-17.0.7/src/egl/main/egldisplay.c --- mesa-12.0.6/src/egl/main/egldisplay.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/main/egldisplay.c 2017-06-01 10:37:10.000000000 +0000 @@ -44,6 +44,8 @@ #include "egldriver.h" #include "eglglobals.h" #include "egllog.h" +#include "eglimage.h" +#include "eglsync.h" /* Includes for _eglNativePlatformDetectNativeDisplay */ #ifdef HAVE_MINCORE @@ -178,25 +180,24 @@ _EGLPlatformType _eglGetNativePlatform(void *nativeDisplay) { - static _EGLPlatformType native_platform = _EGL_INVALID_PLATFORM; - char *detection_method = NULL; + static _EGLPlatformType native_platform; + char *detection_method; + + native_platform = _eglGetNativePlatformFromEnv(); + detection_method = "environment overwrite"; if (native_platform == _EGL_INVALID_PLATFORM) { - native_platform = _eglGetNativePlatformFromEnv(); - detection_method = "environment overwrite"; - if (native_platform == _EGL_INVALID_PLATFORM) { - native_platform = _eglNativePlatformDetectNativeDisplay(nativeDisplay); - detection_method = "autodetected"; - if (native_platform == _EGL_INVALID_PLATFORM) { - native_platform = _EGL_NATIVE_PLATFORM; - detection_method = "build-time configuration"; - } - } + native_platform = _eglNativePlatformDetectNativeDisplay(nativeDisplay); + detection_method = "autodetected"; } - if (detection_method != NULL) - _eglLog(_EGL_DEBUG, "Native platform type: %s (%s)", - egl_platforms[native_platform].name, detection_method); + if (native_platform == _EGL_INVALID_PLATFORM) { + native_platform = _EGL_NATIVE_PLATFORM; + detection_method = "build-time configuration"; + } + + _eglLog(_EGL_DEBUG, "Native platform type: %s (%s)", + egl_platforms[native_platform].name, detection_method); return native_platform; } @@ -301,6 +302,26 @@ drv->API.DestroySurface(drv, display, surf); } assert(!display->ResourceLists[_EGL_RESOURCE_SURFACE]); + + list = display->ResourceLists[_EGL_RESOURCE_IMAGE]; + while (list) { + _EGLImage *image = (_EGLImage *) list; + list = list->Next; + + _eglUnlinkImage(image); + drv->API.DestroyImageKHR(drv, display, image); + } + assert(!display->ResourceLists[_EGL_RESOURCE_IMAGE]); + + list = display->ResourceLists[_EGL_RESOURCE_SYNC]; + while (list) { + _EGLSync *sync = (_EGLSync *) list; + list = list->Next; + + _eglUnlinkSync(sync); + drv->API.DestroySyncKHR(drv, display, sync); + } + assert(!display->ResourceLists[_EGL_RESOURCE_SYNC]); } @@ -519,3 +540,24 @@ return _eglFindDisplay(_EGL_PLATFORM_WAYLAND, native_display); } #endif /* HAVE_WAYLAND_PLATFORM */ + +#ifdef HAVE_SURFACELESS_PLATFORM +_EGLDisplay* +_eglGetSurfacelessDisplay(void *native_display, + const EGLint *attrib_list) +{ + /* This platform has no native display. */ + if (native_display != NULL) { + _eglError(EGL_BAD_PARAMETER, "eglGetPlatformDisplay"); + return NULL; + } + + /* This platform recognizes no display attributes. */ + if (attrib_list != NULL && attrib_list[0] != EGL_NONE) { + _eglError(EGL_BAD_ATTRIBUTE, "eglGetPlatformDisplay"); + return NULL; + } + + return _eglFindDisplay(_EGL_PLATFORM_SURFACELESS, native_display); +} +#endif /* HAVE_SURFACELESS_PLATFORM */ diff -Nru mesa-12.0.6/src/egl/main/egldisplay.h mesa-17.0.7/src/egl/main/egldisplay.h --- mesa-12.0.6/src/egl/main/egldisplay.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/main/egldisplay.h 2017-06-01 10:37:10.000000000 +0000 @@ -79,6 +79,8 @@ EGLBoolean IsLinked; EGLint RefCount; + EGLLabelKHR Label; + /* used to link resources of the same type */ _EGLResource *Next; }; @@ -92,6 +94,7 @@ /* Please keep these sorted alphabetically. */ EGLBoolean ANDROID_framebuffer_target; EGLBoolean ANDROID_image_native_buffer; + EGLBoolean ANDROID_native_fence_sync; EGLBoolean ANDROID_recordable; EGLBoolean CHROMIUM_sync_control; @@ -102,6 +105,7 @@ EGLBoolean EXT_swap_buffers_with_damage; EGLBoolean KHR_cl_event2; + EGLBoolean KHR_config_attribs; EGLBoolean KHR_create_context; EGLBoolean KHR_fence_sync; EGLBoolean KHR_get_all_proc_addresses; @@ -112,11 +116,11 @@ EGLBoolean KHR_gl_texture_cubemap_image; EGLBoolean KHR_image_base; EGLBoolean KHR_image_pixmap; + EGLBoolean KHR_no_config_context; EGLBoolean KHR_reusable_sync; EGLBoolean KHR_surfaceless_context; EGLBoolean KHR_wait_sync; - EGLBoolean MESA_configless_context; EGLBoolean MESA_drm_image; EGLBoolean MESA_image_dma_buf_export; @@ -165,6 +169,8 @@ /* lists of resources */ _EGLResource *ResourceLists[_EGL_NUM_RESOURCES]; + + EGLLabelKHR Label; }; @@ -270,6 +276,11 @@ const EGLint *attrib_list); #endif +#ifdef HAVE_SURFACELESS_PLATFORM +_EGLDisplay* +_eglGetSurfacelessDisplay(void *native_display, + const EGLint *attrib_list); +#endif #ifdef __cplusplus } diff -Nru mesa-12.0.6/src/egl/main/eglfallbacks.c mesa-17.0.7/src/egl/main/eglfallbacks.c --- mesa-12.0.6/src/egl/main/eglfallbacks.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/main/eglfallbacks.c 2017-06-01 10:37:10.000000000 +0000 @@ -92,6 +92,7 @@ drv->API.WaitSyncKHR = NULL; drv->API.SignalSyncKHR = NULL; drv->API.GetSyncAttrib = _eglGetSyncAttrib; + drv->API.DupNativeFenceFDANDROID = NULL; drv->API.CreateDRMImageMESA = NULL; drv->API.ExportDRMImageMESA = NULL; diff -Nru mesa-12.0.6/src/egl/main/eglglobals.c mesa-17.0.7/src/egl/main/eglglobals.c --- mesa-12.0.6/src/egl/main/eglglobals.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/main/eglglobals.c 2017-06-01 10:37:10.000000000 +0000 @@ -50,7 +50,7 @@ _eglFiniDisplay }, - /* ClientExtensionsString */ + /* ClientExtensionString */ "EGL_EXT_client_extensions" " EGL_EXT_platform_base" #ifdef HAVE_WAYLAND_PLATFORM @@ -62,7 +62,14 @@ #ifdef HAVE_DRM_PLATFORM " EGL_MESA_platform_gbm" #endif +#ifdef HAVE_SURFACELESS_PLATFORM + " EGL_MESA_platform_surfaceless" +#endif " EGL_KHR_client_get_all_proc_addresses" + " EGL_KHR_debug", + + NULL, /* debugCallback */ + _EGL_DEBUG_BIT_CRITICAL | _EGL_DEBUG_BIT_ERROR, /* debugTypesEnabled */ }; diff -Nru mesa-12.0.6/src/egl/main/eglglobals.h mesa-17.0.7/src/egl/main/eglglobals.h --- mesa-12.0.6/src/egl/main/eglglobals.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/main/eglglobals.h 2017-06-01 10:37:10.000000000 +0000 @@ -36,6 +36,13 @@ #include "egltypedefs.h" +enum +{ + _EGL_DEBUG_BIT_CRITICAL = 0x1, + _EGL_DEBUG_BIT_ERROR = 0x2, + _EGL_DEBUG_BIT_WARN = 0x4, + _EGL_DEBUG_BIT_INFO = 0x8, +}; /** * Global library data @@ -51,6 +58,9 @@ void (*AtExitCalls[10])(void); const char *ClientExtensionString; + + EGLDEBUGPROCKHR debugCallback; + unsigned int debugTypesEnabled; }; @@ -60,5 +70,10 @@ extern void _eglAddAtExitCall(void (*func)(void)); +static inline unsigned int DebugBitFromType(EGLenum type) +{ + assert(type >= EGL_DEBUG_MSG_CRITICAL_KHR && type <= EGL_DEBUG_MSG_INFO_KHR); + return (1 << (type - EGL_DEBUG_MSG_CRITICAL_KHR)); +} #endif /* EGLGLOBALS_INCLUDED */ diff -Nru mesa-12.0.6/src/egl/main/eglsurface.c mesa-17.0.7/src/egl/main/eglsurface.c --- mesa-12.0.6/src/egl/main/eglsurface.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/main/eglsurface.c 2017-06-01 10:37:10.000000000 +0000 @@ -71,8 +71,8 @@ EGLint type = surf->Type; EGLint texture_type = EGL_PBUFFER_BIT; EGLint i, err = EGL_SUCCESS; - EGLint tex_target = -1; - EGLint tex_format = -1; + EGLint attr = EGL_NONE; + EGLint val = EGL_NONE; if (!attrib_list) return EGL_SUCCESS; @@ -81,8 +81,8 @@ texture_type |= EGL_PIXMAP_BIT; for (i = 0; attrib_list[i] != EGL_NONE; i++) { - EGLint attr = attrib_list[i++]; - EGLint val = attrib_list[i]; + attr = attrib_list[i++]; + val = attrib_list[i]; switch (attr) { /* common attributes */ @@ -189,7 +189,6 @@ break; } - tex_format = val; switch (val) { case EGL_TEXTURE_RGB: case EGL_TEXTURE_RGBA: @@ -209,7 +208,6 @@ break; } - tex_target = val; switch (val) { case EGL_TEXTURE_2D: case EGL_NO_TEXTURE: @@ -235,19 +233,21 @@ break; } - if (type == EGL_PBUFFER_BIT) { - if ((tex_target == EGL_NO_TEXTURE && tex_format != EGL_NO_TEXTURE) || - (tex_format == EGL_NO_TEXTURE && tex_target != EGL_NO_TEXTURE)) { - err = EGL_BAD_MATCH; - } - } - - if (err != EGL_SUCCESS) { - _eglLog(_EGL_WARNING, "bad surface attribute 0x%04x", attr); + if (err != EGL_SUCCESS) break; + } + + if (err == EGL_SUCCESS && type == EGL_PBUFFER_BIT) { + if ((surf->TextureTarget == EGL_NO_TEXTURE && surf->TextureFormat != EGL_NO_TEXTURE) || + (surf->TextureFormat == EGL_NO_TEXTURE && surf->TextureTarget != EGL_NO_TEXTURE)) { + attr = surf->TextureTarget == EGL_NO_TEXTURE ? EGL_TEXTURE_TARGET : EGL_TEXTURE_FORMAT; + err = EGL_BAD_MATCH; } } + if (err != EGL_SUCCESS) + _eglLog(_EGL_WARNING, "bad surface attribute 0x%04x", attr); + return err; } @@ -288,13 +288,14 @@ if ((conf->SurfaceType & type) == 0) { /* The config can't be used to create a surface of this type */ - _eglError(EGL_BAD_CONFIG, func); + _eglError(EGL_BAD_MATCH, func); return EGL_FALSE; } _eglInitResource(&surf->Resource, sizeof(*surf), dpy); surf->Type = type; surf->Config = conf; + surf->Lost = EGL_FALSE; surf->Width = 0; surf->Height = 0; @@ -525,14 +526,51 @@ } EGLBoolean -_eglReleaseTexImage(_EGLDriver *drv, _EGLDisplay *disp, _EGLSurface *surf, +_eglReleaseTexImage(_EGLDriver *drv, _EGLDisplay *dpy, _EGLSurface *surf, EGLint buffer) { - /* TODO: do basic error checking and return success/fail. + /* Just do basic error checking and return success/fail. * Drivers must implement the real stuff. */ - return EGL_TRUE; + EGLint texture_type = EGL_PBUFFER_BIT; + + if (surf == EGL_NO_SURFACE) + { + _eglError(EGL_BAD_SURFACE, "eglReleaseTexImage"); + return EGL_FALSE; + } + + if (!surf->BoundToTexture) + { + /* Not an error, simply nothing to do */ + return EGL_TRUE; + } + + if (surf->TextureFormat == EGL_NO_TEXTURE) + { + _eglError(EGL_BAD_MATCH, "eglReleaseTexImage"); + return EGL_FALSE; + } + + if (buffer != EGL_BACK_BUFFER) + { + _eglError(EGL_BAD_PARAMETER, "eglReleaseTexImage"); + return EGL_FALSE; + } + + if (dpy->Extensions.NOK_texture_from_pixmap) + texture_type |= EGL_PIXMAP_BIT; + + if (!(surf->Type & texture_type)) + { + _eglError(EGL_BAD_SURFACE, "eglReleaseTexImage"); + return EGL_FALSE; + } + + surf->BoundToTexture = EGL_FALSE; + + return EGL_TRUE; } diff -Nru mesa-12.0.6/src/egl/main/eglsurface.h mesa-17.0.7/src/egl/main/eglsurface.h --- mesa-12.0.6/src/egl/main/eglsurface.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/main/eglsurface.h 2017-06-01 10:37:10.000000000 +0000 @@ -56,6 +56,11 @@ EGLint Type; /* one of EGL_WINDOW_BIT, EGL_PIXMAP_BIT or EGL_PBUFFER_BIT */ + /* The native surface is lost. The EGL spec requires certain functions + * to generate EGL_BAD_NATIVE_WINDOW when given this surface. + */ + EGLBoolean Lost; + /* attributes set by attribute list */ EGLint Width, Height; EGLenum TextureFormat; diff -Nru mesa-12.0.6/src/egl/main/eglsync.c mesa-17.0.7/src/egl/main/eglsync.c --- mesa-12.0.6/src/egl/main/eglsync.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/main/eglsync.c 2017-06-01 10:37:10.000000000 +0000 @@ -39,38 +39,9 @@ * Parse the list of sync attributes and return the proper error code. */ static EGLint -_eglParseSyncAttribList(_EGLSync *sync, const EGLint *attrib_list) +_eglParseSyncAttribList(_EGLSync *sync, const EGLAttrib *attrib_list) { - EGLint i, err = EGL_SUCCESS; - - if (!attrib_list) - return EGL_SUCCESS; - - for (i = 0; attrib_list[i] != EGL_NONE; i++) { - EGLint attr = attrib_list[i++]; - EGLint val = attrib_list[i]; - - switch (attr) { - default: - (void) val; - err = EGL_BAD_ATTRIBUTE; - break; - } - - if (err != EGL_SUCCESS) { - _eglLog(_EGL_DEBUG, "bad sync attribute 0x%04x", attr); - break; - } - } - - return err; -} - - -static EGLint -_eglParseSyncAttribList64(_EGLSync *sync, const EGLAttrib *attrib_list) -{ - EGLint i, err = EGL_SUCCESS; + EGLint i; if (!attrib_list) return EGL_SUCCESS; @@ -78,59 +49,66 @@ for (i = 0; attrib_list[i] != EGL_NONE; i++) { EGLAttrib attr = attrib_list[i++]; EGLAttrib val = attrib_list[i]; + EGLint err = EGL_SUCCESS; switch (attr) { case EGL_CL_EVENT_HANDLE_KHR: if (sync->Type == EGL_SYNC_CL_EVENT_KHR) { sync->CLEvent = val; - break; + } else { + err = EGL_BAD_ATTRIBUTE; + } + break; + case EGL_SYNC_NATIVE_FENCE_FD_ANDROID: + if (sync->Type == EGL_SYNC_NATIVE_FENCE_ANDROID) { + /* we take ownership of the native fd, so no dup(): */ + sync->SyncFd = val; + } else { + err = EGL_BAD_ATTRIBUTE; } - /* fall through */ + break; default: - (void) val; err = EGL_BAD_ATTRIBUTE; break; } if (err != EGL_SUCCESS) { _eglLog(_EGL_DEBUG, "bad sync attribute 0x%" PRIxPTR, attr); - break; + return err; } } - return err; + return EGL_SUCCESS; } EGLBoolean _eglInitSync(_EGLSync *sync, _EGLDisplay *dpy, EGLenum type, - const EGLint *attrib_list, const EGLAttrib *attrib_list64) + const EGLAttrib *attrib_list) { EGLint err; - if (!(type == EGL_SYNC_REUSABLE_KHR && dpy->Extensions.KHR_reusable_sync) && - !(type == EGL_SYNC_FENCE_KHR && dpy->Extensions.KHR_fence_sync) && - !(type == EGL_SYNC_CL_EVENT_KHR && dpy->Extensions.KHR_cl_event2 && - attrib_list64)) - return _eglError(EGL_BAD_ATTRIBUTE, "eglCreateSyncKHR"); - _eglInitResource(&sync->Resource, sizeof(*sync), dpy); sync->Type = type; sync->SyncStatus = EGL_UNSIGNALED_KHR; + sync->SyncFd = EGL_NO_NATIVE_FENCE_FD_ANDROID; + + err = _eglParseSyncAttribList(sync, attrib_list); switch (type) { case EGL_SYNC_CL_EVENT_KHR: sync->SyncCondition = EGL_SYNC_CL_EVENT_COMPLETE_KHR; break; + case EGL_SYNC_NATIVE_FENCE_ANDROID: + if (sync->SyncFd == EGL_NO_NATIVE_FENCE_FD_ANDROID) + sync->SyncCondition = EGL_SYNC_PRIOR_COMMANDS_COMPLETE_KHR; + else + sync->SyncCondition = EGL_SYNC_NATIVE_FENCE_SIGNALED_ANDROID; + break; default: sync->SyncCondition = EGL_SYNC_PRIOR_COMMANDS_COMPLETE_KHR; } - if (attrib_list64) - err = _eglParseSyncAttribList64(sync, attrib_list64); - else - err = _eglParseSyncAttribList(sync, attrib_list); - if (err != EGL_SUCCESS) return _eglError(err, "eglCreateSyncKHR"); @@ -154,17 +132,20 @@ if (sync->SyncStatus != EGL_SIGNALED_KHR && (sync->Type == EGL_SYNC_FENCE_KHR || sync->Type == EGL_SYNC_CL_EVENT_KHR || - sync->Type == EGL_SYNC_REUSABLE_KHR)) + sync->Type == EGL_SYNC_REUSABLE_KHR || + sync->Type == EGL_SYNC_NATIVE_FENCE_ANDROID)) drv->API.ClientWaitSyncKHR(drv, dpy, sync, 0, 0); *value = sync->SyncStatus; break; case EGL_SYNC_CONDITION_KHR: if (sync->Type != EGL_SYNC_FENCE_KHR && - sync->Type != EGL_SYNC_CL_EVENT_KHR) + sync->Type != EGL_SYNC_CL_EVENT_KHR && + sync->Type != EGL_SYNC_NATIVE_FENCE_ANDROID) return _eglError(EGL_BAD_ATTRIBUTE, "eglGetSyncAttribKHR"); *value = sync->SyncCondition; break; + default: return _eglError(EGL_BAD_ATTRIBUTE, "eglGetSyncAttribKHR"); break; diff -Nru mesa-12.0.6/src/egl/main/eglsync.h mesa-17.0.7/src/egl/main/eglsync.h --- mesa-12.0.6/src/egl/main/eglsync.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/main/eglsync.h 2017-06-01 10:37:10.000000000 +0000 @@ -48,12 +48,13 @@ EGLenum SyncStatus; EGLenum SyncCondition; EGLAttrib CLEvent; + EGLint SyncFd; }; extern EGLBoolean _eglInitSync(_EGLSync *sync, _EGLDisplay *dpy, EGLenum type, - const EGLint *attrib_list, const EGLAttrib *attrib_list64); + const EGLAttrib *attrib_list); extern EGLBoolean diff -Nru mesa-12.0.6/src/egl/Makefile.am mesa-17.0.7/src/egl/Makefile.am --- mesa-12.0.6/src/egl/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -86,17 +86,18 @@ if HAVE_EGL_PLATFORM_ANDROID AM_CFLAGS += -DHAVE_ANDROID_PLATFORM +AM_CFLAGS += $(ANDROID_CFLAGS) +libEGL_la_LIBADD += $(ANDROID_LIBS) dri2_backend_FILES += drivers/dri2/platform_android.c endif -if HAVE_EGL_DRIVER_DRI2 AM_CFLAGS += \ -I$(top_srcdir)/src/loader \ -I$(top_srcdir)/src/egl/drivers/dri2 \ -I$(top_srcdir)/src/gbm/backends/dri \ -I$(top_srcdir)/src/egl/wayland/wayland-egl \ - -I$(top_srcdir)/src/egl/wayland/wayland-drm \ -I$(top_builddir)/src/egl/wayland/wayland-drm \ + -I$(top_srcdir)/src/egl/wayland/wayland-drm \ -DDEFAULT_DRIVER_DIR=\"$(DRI_DRIVER_SEARCH_DIR)\" \ -D_EGL_BUILT_IN_DRIVER_DRI2 @@ -107,7 +108,6 @@ libEGL_la_LIBADD += $(top_builddir)/src/loader/libloader.la libEGL_la_LIBADD += $(DLOPEN_LIBS) $(LIBDRM_LIBS) $(CLOCK_LIB) -endif include $(top_srcdir)/install-lib-links.mk @@ -132,6 +132,5 @@ egl-symbols-check \ SConscript \ drivers/haiku \ - docs \ main/egl.def \ main/README.txt diff -Nru mesa-12.0.6/src/egl/Makefile.in mesa-17.0.7/src/egl/Makefile.in --- mesa-12.0.6/src/egl/Makefile.in 2017-01-24 01:41:45.000000000 +0000 +++ mesa-17.0.7/src/egl/Makefile.in 2017-06-01 10:37:19.000000000 +0000 @@ -135,26 +135,11 @@ @HAVE_EGL_PLATFORM_DRM_TRUE@am__append_11 = drivers/dri2/platform_drm.c @HAVE_EGL_PLATFORM_SURFACELESS_TRUE@am__append_12 = -DHAVE_SURFACELESS_PLATFORM @HAVE_EGL_PLATFORM_SURFACELESS_TRUE@am__append_13 = drivers/dri2/platform_surfaceless.c -@HAVE_EGL_PLATFORM_ANDROID_TRUE@am__append_14 = -DHAVE_ANDROID_PLATFORM -@HAVE_EGL_PLATFORM_ANDROID_TRUE@am__append_15 = drivers/dri2/platform_android.c -@HAVE_EGL_DRIVER_DRI2_TRUE@am__append_16 = \ -@HAVE_EGL_DRIVER_DRI2_TRUE@ -I$(top_srcdir)/src/loader \ -@HAVE_EGL_DRIVER_DRI2_TRUE@ -I$(top_srcdir)/src/egl/drivers/dri2 \ -@HAVE_EGL_DRIVER_DRI2_TRUE@ -I$(top_srcdir)/src/gbm/backends/dri \ -@HAVE_EGL_DRIVER_DRI2_TRUE@ -I$(top_srcdir)/src/egl/wayland/wayland-egl \ -@HAVE_EGL_DRIVER_DRI2_TRUE@ -I$(top_srcdir)/src/egl/wayland/wayland-drm \ -@HAVE_EGL_DRIVER_DRI2_TRUE@ -I$(top_builddir)/src/egl/wayland/wayland-drm \ -@HAVE_EGL_DRIVER_DRI2_TRUE@ -DDEFAULT_DRIVER_DIR=\"$(DRI_DRIVER_SEARCH_DIR)\" \ -@HAVE_EGL_DRIVER_DRI2_TRUE@ -D_EGL_BUILT_IN_DRIVER_DRI2 - -@HAVE_EGL_DRIVER_DRI2_TRUE@am__append_17 = \ -@HAVE_EGL_DRIVER_DRI2_TRUE@ $(dri2_backend_core_FILES) \ -@HAVE_EGL_DRIVER_DRI2_TRUE@ $(dri2_backend_FILES) \ -@HAVE_EGL_DRIVER_DRI2_TRUE@ $(dri3_backend_FILES) - -@HAVE_EGL_DRIVER_DRI2_TRUE@am__append_18 = $(top_builddir)/src/loader/libloader.la \ -@HAVE_EGL_DRIVER_DRI2_TRUE@ $(DLOPEN_LIBS) $(LIBDRM_LIBS) \ -@HAVE_EGL_DRIVER_DRI2_TRUE@ $(CLOCK_LIB) +@HAVE_EGL_PLATFORM_ANDROID_TRUE@am__append_14 = \ +@HAVE_EGL_PLATFORM_ANDROID_TRUE@ -DHAVE_ANDROID_PLATFORM \ +@HAVE_EGL_PLATFORM_ANDROID_TRUE@ $(ANDROID_CFLAGS) +@HAVE_EGL_PLATFORM_ANDROID_TRUE@am__append_15 = $(ANDROID_LIBS) +@HAVE_EGL_PLATFORM_ANDROID_TRUE@am__append_16 = drivers/dri2/platform_android.c subdir = src/egl ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps = $(top_srcdir)/m4/ax_check_gnu_make.m4 \ @@ -210,13 +195,13 @@ @HAVE_PLATFORM_WAYLAND_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_PLATFORM_WAYLAND_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_PLATFORM_WAYLAND_TRUE@ $(top_builddir)/src/egl/wayland/wayland-drm/libwayland-drm.la -@HAVE_EGL_DRIVER_DRI2_TRUE@am__DEPENDENCIES_4 = $(top_builddir)/src/loader/libloader.la \ -@HAVE_EGL_DRIVER_DRI2_TRUE@ $(am__DEPENDENCIES_1) \ -@HAVE_EGL_DRIVER_DRI2_TRUE@ $(am__DEPENDENCIES_1) \ -@HAVE_EGL_DRIVER_DRI2_TRUE@ $(am__DEPENDENCIES_1) +@HAVE_EGL_PLATFORM_ANDROID_TRUE@am__DEPENDENCIES_4 = \ +@HAVE_EGL_PLATFORM_ANDROID_TRUE@ $(am__DEPENDENCIES_1) libEGL_la_DEPENDENCIES = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_2) \ $(am__append_5) $(am__DEPENDENCIES_3) $(am__append_10) \ - $(am__DEPENDENCIES_4) + $(am__DEPENDENCIES_4) $(top_builddir)/src/loader/libloader.la \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_1) am__libEGL_la_SOURCES_DIST = main/eglapi.c main/eglapi.h \ main/eglarray.c main/eglarray.h main/eglcompiler.h \ main/eglconfig.c main/eglconfig.h main/eglcontext.c \ @@ -252,9 +237,8 @@ $(am__objects_6) $(am__objects_7) @HAVE_DRI3_TRUE@@HAVE_PLATFORM_X11_TRUE@am__objects_9 = drivers/dri2/platform_x11_dri3.lo am__objects_10 = $(am__objects_9) -@HAVE_EGL_DRIVER_DRI2_TRUE@am__objects_11 = $(am__objects_2) \ -@HAVE_EGL_DRIVER_DRI2_TRUE@ $(am__objects_8) $(am__objects_10) -am_libEGL_la_OBJECTS = $(am__objects_1) $(am__objects_11) +am_libEGL_la_OBJECTS = $(am__objects_1) $(am__objects_2) \ + $(am__objects_8) $(am__objects_10) libEGL_la_OBJECTS = $(am_libEGL_la_OBJECTS) AM_V_lt = $(am__v_lt_@AM_V@) am__v_lt_ = $(am__v_lt_@AM_DEFAULT_V@) @@ -511,6 +495,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -525,6 +511,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -554,10 +541,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -607,11 +595,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -651,8 +636,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -689,8 +672,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -699,7 +680,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -707,13 +687,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -742,6 +723,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -844,11 +826,21 @@ $(VISIBILITY_CFLAGS) $(LIBDRM_CFLAGS) $(EGL_CFLAGS) \ -D_EGL_NATIVE_PLATFORM=$(EGL_NATIVE_PLATFORM) $(am__append_1) \ $(am__append_6) $(am__append_9) $(am__append_12) \ - $(am__append_14) $(am__append_16) + $(am__append_14) -I$(top_srcdir)/src/loader \ + -I$(top_srcdir)/src/egl/drivers/dri2 \ + -I$(top_srcdir)/src/gbm/backends/dri \ + -I$(top_srcdir)/src/egl/wayland/wayland-egl \ + -I$(top_builddir)/src/egl/wayland/wayland-drm \ + -I$(top_srcdir)/src/egl/wayland/wayland-drm \ + -DDEFAULT_DRIVER_DIR=\"$(DRI_DRIVER_SEARCH_DIR)\" \ + -D_EGL_BUILT_IN_DRIVER_DRI2 lib_LTLIBRARIES = libEGL.la -libEGL_la_SOURCES = $(LIBEGL_C_FILES) $(am__append_17) +libEGL_la_SOURCES = $(LIBEGL_C_FILES) $(dri2_backend_core_FILES) \ + $(dri2_backend_FILES) $(dri3_backend_FILES) libEGL_la_LIBADD = $(EGL_LIB_DEPS) $(am__append_2) $(am__append_5) \ - $(am__append_7) $(am__append_10) $(am__append_18) + $(am__append_7) $(am__append_10) $(am__append_15) \ + $(top_builddir)/src/loader/libloader.la $(DLOPEN_LIBS) \ + $(LIBDRM_LIBS) $(CLOCK_LIB) libEGL_la_LDFLAGS = \ -no-undefined \ -version-number 1:0 \ @@ -857,7 +849,7 @@ $(LD_NO_UNDEFINED) dri2_backend_FILES = $(am__append_3) $(am__append_8) $(am__append_11) \ - $(am__append_13) $(am__append_15) + $(am__append_13) $(am__append_16) dri3_backend_FILES = $(am__append_4) pkgconfigdir = $(libdir)/pkgconfig pkgconfig_DATA = main/egl.pc @@ -876,7 +868,6 @@ egl-symbols-check \ SConscript \ drivers/haiku \ - docs \ main/egl.def \ main/README.txt diff -Nru mesa-12.0.6/src/egl/wayland/wayland-drm/Makefile.in mesa-17.0.7/src/egl/wayland/wayland-drm/Makefile.in --- mesa-12.0.6/src/egl/wayland/wayland-drm/Makefile.in 2017-01-24 01:41:45.000000000 +0000 +++ mesa-17.0.7/src/egl/wayland/wayland-drm/Makefile.in 2017-06-01 10:37:19.000000000 +0000 @@ -185,6 +185,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -199,6 +201,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -228,10 +231,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -281,11 +285,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -325,8 +326,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -363,8 +362,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -373,7 +370,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -381,13 +377,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -416,6 +413,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ diff -Nru mesa-12.0.6/src/egl/wayland/wayland-drm/wayland-drm.c mesa-17.0.7/src/egl/wayland/wayland-drm/wayland-drm.c --- mesa-12.0.6/src/egl/wayland/wayland-drm/wayland-drm.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/egl/wayland/wayland-drm/wayland-drm.c 2017-06-01 10:37:10.000000000 +0000 @@ -265,6 +265,8 @@ struct wl_drm *drm; drm = malloc(sizeof *drm); + if (!drm) + return NULL; drm->display = display; drm->device_name = strdup(device_name); diff -Nru mesa-12.0.6/src/egl/wayland/wayland-drm/wayland-drm-protocol.c mesa-17.0.7/src/egl/wayland/wayland-drm/wayland-drm-protocol.c --- mesa-12.0.6/src/egl/wayland/wayland-drm/wayland-drm-protocol.c 2017-01-24 01:43:26.000000000 +0000 +++ mesa-17.0.7/src/egl/wayland/wayland-drm/wayland-drm-protocol.c 2017-06-01 10:38:05.000000000 +0000 @@ -1,4 +1,4 @@ -/* Generated by wayland-scanner 1.12.0 */ +/* Generated by wayland-scanner 1.13.0 */ /* * Copyright © 2008-2011 Kristian Høgsberg diff -Nru mesa-12.0.6/src/egl/wayland/wayland-egl/Makefile.in mesa-17.0.7/src/egl/wayland/wayland-egl/Makefile.in --- mesa-12.0.6/src/egl/wayland/wayland-egl/Makefile.in 2017-01-24 01:41:45.000000000 +0000 +++ mesa-17.0.7/src/egl/wayland/wayland-egl/Makefile.in 2017-06-01 10:37:19.000000000 +0000 @@ -401,6 +401,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -415,6 +417,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -444,10 +447,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -497,11 +501,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -541,8 +542,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -579,8 +578,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -589,7 +586,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -597,13 +593,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -632,6 +629,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ diff -Nru mesa-12.0.6/src/gallium/Automake.inc mesa-17.0.7/src/gallium/Automake.inc --- mesa-12.0.6/src/gallium/Automake.inc 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/Automake.inc 2017-06-01 10:37:10.000000000 +0000 @@ -46,10 +46,16 @@ GALLIUM_COMMON_LIB_DEPS = \ -lm \ + $(LIBSENSORS_LIBS) \ $(CLOCK_LIB) \ $(PTHREAD_LIBS) \ $(DLOPEN_LIBS) +if HAVE_LIBDRM +GALLIUM_COMMON_LIB_DEPS += \ + $(LIBDRM_LIBS) +endif + GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ diff -Nru mesa-12.0.6/src/gallium/auxiliary/cso_cache/cso_cache.c mesa-17.0.7/src/gallium/auxiliary/cso_cache/cso_cache.c --- mesa-12.0.6/src/gallium/auxiliary/cso_cache/cso_cache.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/cso_cache/cso_cache.c 2017-06-01 10:37:10.000000000 +0000 @@ -188,9 +188,7 @@ void *state) { struct cso_hash *hash = _cso_hash_for_type(sc, type); - - if (type != CSO_SAMPLER) - sanitize_hash(sc, hash, type, sc->max_size); + sanitize_hash(sc, hash, type, sc->max_size); return cso_hash_insert(hash, hash_key, state); } diff -Nru mesa-12.0.6/src/gallium/auxiliary/cso_cache/cso_cache.h mesa-17.0.7/src/gallium/auxiliary/cso_cache/cso_cache.h --- mesa-12.0.6/src/gallium/auxiliary/cso_cache/cso_cache.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/cso_cache/cso_cache.h 2017-06-01 10:37:10.000000000 +0000 @@ -129,6 +129,7 @@ void *data; cso_state_callback delete_state; struct pipe_context *context; + unsigned hash_key; }; struct cso_velems_state { diff -Nru mesa-12.0.6/src/gallium/auxiliary/cso_cache/cso_context.c mesa-17.0.7/src/gallium/auxiliary/cso_cache/cso_context.c --- mesa-12.0.6/src/gallium/auxiliary/cso_cache/cso_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/cso_cache/cso_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -55,6 +55,7 @@ */ struct sampler_info { + struct cso_sampler *cso_samplers[PIPE_MAX_SAMPLERS]; void *samplers[PIPE_MAX_SAMPLERS]; unsigned nr_samplers; }; @@ -79,9 +80,7 @@ struct pipe_sampler_view *fragment_views_saved[PIPE_MAX_SHADER_SAMPLER_VIEWS]; unsigned nr_fragment_views_saved; - void *fragment_samplers_saved[PIPE_MAX_SAMPLERS]; - unsigned nr_fragment_samplers_saved; - + struct sampler_info fragment_samplers_saved; struct sampler_info samplers[PIPE_SHADER_TYPES]; struct pipe_vertex_buffer aux_vertex_buffer_current; @@ -91,6 +90,9 @@ struct pipe_constant_buffer aux_constbuf_current[PIPE_SHADER_TYPES]; struct pipe_constant_buffer aux_constbuf_saved[PIPE_SHADER_TYPES]; + struct pipe_image_view fragment_image0_current; + struct pipe_image_view fragment_image0_saved; + unsigned nr_so_targets; struct pipe_stream_output_target *so_targets[PIPE_MAX_SO_BUFFERS]; @@ -218,19 +220,61 @@ int hash_size = cso_hash_size(hash); int max_entries = (max_size > hash_size) ? max_size : hash_size; int to_remove = (max_size < max_entries) * max_entries/4; - struct cso_hash_iter iter = cso_hash_first_node(hash); + struct cso_hash_iter iter; + struct cso_sampler **samplers_to_restore = NULL; + unsigned to_restore = 0; + if (hash_size > max_size) to_remove += hash_size - max_size; + + if (to_remove == 0) + return; + + if (type == CSO_SAMPLER) { + int i, j; + + samplers_to_restore = MALLOC(PIPE_SHADER_TYPES * PIPE_MAX_SAMPLERS * + sizeof(*samplers_to_restore)); + + /* Temporarily remove currently bound sampler states from the hash + * table, to prevent them from being deleted + */ + for (i = 0; i < PIPE_SHADER_TYPES; i++) { + for (j = 0; j < ctx->samplers[i].nr_samplers; j++) { + struct cso_sampler *sampler = ctx->samplers[i].cso_samplers[j]; + + if (sampler && cso_hash_take(hash, sampler->hash_key)) + samplers_to_restore[to_restore++] = sampler; + } + } + } + + iter = cso_hash_first_node(hash); while (to_remove) { /*remove elements until we're good */ /*fixme: currently we pick the nodes to remove at random*/ void *cso = cso_hash_iter_data(iter); + + if (!cso) + break; + if (delete_cso(ctx, cso, type)) { iter = cso_hash_erase(hash, iter); --to_remove; } else iter = cso_hash_iter_next(iter); } + + if (type == CSO_SAMPLER) { + /* Put currently bound sampler states back into the hash table */ + while (to_restore--) { + struct cso_sampler *sampler = samplers_to_restore[to_restore]; + + cso_hash_insert(hash, sampler->hash_key, sampler); + } + + FREE(samplers_to_restore); + } } static void cso_init_vbuf(struct cso_context *cso) @@ -248,7 +292,7 @@ { struct cso_context *ctx = CALLOC_STRUCT(cso_context); if (!ctx) - goto out; + return NULL; ctx->cache = cso_cache_create(); if (ctx->cache == NULL) @@ -313,7 +357,7 @@ static struct pipe_sampler_view *views[PIPE_MAX_SHADER_SAMPLER_VIEWS] = { NULL }; static void *zeros[PIPE_MAX_SAMPLERS] = { NULL }; struct pipe_screen *scr = ctx->pipe->screen; - unsigned sh; + enum pipe_shader_type sh; for (sh = 0; sh < PIPE_SHADER_TYPES; sh++) { int maxsam = scr->get_shader_param(scr, sh, PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS); @@ -371,6 +415,9 @@ pipe_resource_reference(&ctx->aux_constbuf_saved[i].buffer, NULL); } + pipe_resource_reference(&ctx->fragment_image0_current.resource, NULL); + pipe_resource_reference(&ctx->fragment_image0_saved.resource, NULL); + for (i = 0; i < PIPE_MAX_SO_BUFFERS; i++) { pipe_so_target_reference(&ctx->so_targets[i], NULL); pipe_so_target_reference(&ctx->so_targets_saved[i], NULL); @@ -1158,18 +1205,17 @@ cso_single_sampler(struct cso_context *ctx, unsigned shader_stage, unsigned idx, const struct pipe_sampler_state *templ) { - void *handle = NULL; - if (templ) { unsigned key_size = sizeof(struct pipe_sampler_state); unsigned hash_key = cso_construct_key((void*)templ, key_size); + struct cso_sampler *cso; struct cso_hash_iter iter = cso_find_state_template(ctx->cache, hash_key, CSO_SAMPLER, (void *) templ, key_size); if (cso_hash_iter_is_null(iter)) { - struct cso_sampler *cso = MALLOC(sizeof(struct cso_sampler)); + cso = MALLOC(sizeof(struct cso_sampler)); if (!cso) return PIPE_ERROR_OUT_OF_MEMORY; @@ -1178,21 +1224,25 @@ cso->delete_state = (cso_state_callback) ctx->pipe->delete_sampler_state; cso->context = ctx->pipe; + cso->hash_key = hash_key; iter = cso_insert_state(ctx->cache, hash_key, CSO_SAMPLER, cso); if (cso_hash_iter_is_null(iter)) { FREE(cso); return PIPE_ERROR_OUT_OF_MEMORY; } - - handle = cso->data; } else { - handle = ((struct cso_sampler *)cso_hash_iter_data(iter))->data; + cso = cso_hash_iter_data(iter); } + + ctx->samplers[shader_stage].cso_samplers[idx] = cso; + ctx->samplers[shader_stage].samplers[idx] = cso->data; + } else { + ctx->samplers[shader_stage].cso_samplers[idx] = NULL; + ctx->samplers[shader_stage].samplers[idx] = NULL; } - ctx->samplers[shader_stage].samplers[idx] = handle; return PIPE_OK; } @@ -1201,7 +1251,8 @@ * Send staged sampler state to the driver. */ void -cso_single_sampler_done(struct cso_context *ctx, unsigned shader_stage) +cso_single_sampler_done(struct cso_context *ctx, + enum pipe_shader_type shader_stage) { struct sampler_info *info = &ctx->samplers[shader_stage]; const unsigned old_nr_samplers = info->nr_samplers; @@ -1227,7 +1278,7 @@ */ enum pipe_error cso_set_samplers(struct cso_context *ctx, - unsigned shader_stage, + enum pipe_shader_type shader_stage, unsigned nr, const struct pipe_sampler_state **templates) { @@ -1256,10 +1307,13 @@ cso_save_fragment_samplers(struct cso_context *ctx) { struct sampler_info *info = &ctx->samplers[PIPE_SHADER_FRAGMENT]; + struct sampler_info *saved = &ctx->fragment_samplers_saved; - ctx->nr_fragment_samplers_saved = info->nr_samplers; - memcpy(ctx->fragment_samplers_saved, info->samplers, - sizeof(info->samplers)); + saved->nr_samplers = info->nr_samplers; + memcpy(saved->cso_samplers, info->cso_samplers, info->nr_samplers * + sizeof(*info->cso_samplers)); + memcpy(saved->samplers, info->samplers, info->nr_samplers * + sizeof(*info->samplers)); } @@ -1267,16 +1321,28 @@ cso_restore_fragment_samplers(struct cso_context *ctx) { struct sampler_info *info = &ctx->samplers[PIPE_SHADER_FRAGMENT]; + struct sampler_info *saved = &ctx->fragment_samplers_saved; + int delta = (int)info->nr_samplers - saved->nr_samplers; + + memcpy(info->cso_samplers, saved->cso_samplers, + saved->nr_samplers * sizeof(*info->cso_samplers)); + memcpy(info->samplers, saved->samplers, + saved->nr_samplers * sizeof(*info->samplers)); + + if (delta > 0) { + memset(&info->cso_samplers[saved->nr_samplers], 0, + delta * sizeof(*info->cso_samplers)); + memset(&info->samplers[saved->nr_samplers], 0, + delta * sizeof(*info->samplers)); + } - memcpy(info->samplers, ctx->fragment_samplers_saved, - sizeof(info->samplers)); cso_single_sampler_done(ctx, PIPE_SHADER_FRAGMENT); } void cso_set_sampler_views(struct cso_context *ctx, - unsigned shader_stage, + enum pipe_shader_type shader_stage, unsigned count, struct pipe_sampler_view **views) { @@ -1352,6 +1418,36 @@ void +cso_set_shader_images(struct cso_context *ctx, + enum pipe_shader_type shader_stage, + unsigned start, unsigned count, + struct pipe_image_view *images) +{ + if (shader_stage == PIPE_SHADER_FRAGMENT && start == 0 && count >= 1) { + util_copy_image_view(&ctx->fragment_image0_current, &images[0]); + } + + ctx->pipe->set_shader_images(ctx->pipe, shader_stage, start, count, images); +} + + +static void +cso_save_fragment_image0(struct cso_context *ctx) +{ + util_copy_image_view(&ctx->fragment_image0_saved, + &ctx->fragment_image0_current); +} + + +static void +cso_restore_fragment_image0(struct cso_context *ctx) +{ + cso_set_shader_images(ctx, PIPE_SHADER_FRAGMENT, 0, 1, + &ctx->fragment_image0_saved); +} + + +void cso_set_stream_outputs(struct cso_context *ctx, unsigned num_targets, struct pipe_stream_output_target **targets, @@ -1540,6 +1636,8 @@ cso_save_viewport(cso); if (state_mask & CSO_BIT_PAUSE_QUERIES) cso->pipe->set_active_query_state(cso->pipe, false); + if (state_mask & CSO_BIT_FRAGMENT_IMAGE0) + cso_save_fragment_image0(cso); } @@ -1593,6 +1691,8 @@ cso_restore_viewport(cso); if (state_mask & CSO_BIT_PAUSE_QUERIES) cso->pipe->set_active_query_state(cso->pipe, true); + if (state_mask & CSO_BIT_FRAGMENT_IMAGE0) + cso_restore_fragment_image0(cso); cso->saved_state = 0; } diff -Nru mesa-12.0.6/src/gallium/auxiliary/cso_cache/cso_context.h mesa-17.0.7/src/gallium/auxiliary/cso_cache/cso_context.h --- mesa-12.0.6/src/gallium/auxiliary/cso_cache/cso_context.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/cso_cache/cso_context.h 2017-06-01 10:37:10.000000000 +0000 @@ -60,7 +60,7 @@ enum pipe_error cso_set_samplers(struct cso_context *cso, - unsigned shader_stage, + enum pipe_shader_type shader_stage, unsigned count, const struct pipe_sampler_state **states); @@ -73,7 +73,8 @@ unsigned idx, const struct pipe_sampler_state *states); void -cso_single_sampler_done(struct cso_context *cso, unsigned shader_stage); +cso_single_sampler_done(struct cso_context *cso, + enum pipe_shader_type shader_stage); enum pipe_error cso_set_vertex_elements(struct cso_context *ctx, @@ -171,6 +172,7 @@ #define CSO_BIT_VERTEX_SHADER 0x20000 #define CSO_BIT_VIEWPORT 0x40000 #define CSO_BIT_PAUSE_QUERIES 0x80000 +#define CSO_BIT_FRAGMENT_IMAGE0 0x100000 #define CSO_BITS_ALL_SHADERS (CSO_BIT_VERTEX_SHADER | \ CSO_BIT_FRAGMENT_SHADER | \ @@ -186,11 +188,20 @@ void cso_set_sampler_views(struct cso_context *cso, - unsigned shader_stage, + enum pipe_shader_type shader_stage, unsigned count, struct pipe_sampler_view **views); +/* shader images */ + +void +cso_set_shader_images(struct cso_context *cso, + enum pipe_shader_type shader_stage, + unsigned start, unsigned count, + struct pipe_image_view *views); + + /* constant buffers */ void cso_set_constant_buffer(struct cso_context *cso, unsigned shader_stage, diff -Nru mesa-12.0.6/src/gallium/auxiliary/draw/draw_cliptest_tmp.h mesa-17.0.7/src/gallium/auxiliary/draw/draw_cliptest_tmp.h --- mesa-12.0.6/src/gallium/auxiliary/draw/draw_cliptest_tmp.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/draw/draw_cliptest_tmp.h 2017-06-01 10:37:10.000000000 +0000 @@ -25,6 +25,8 @@ * **************************************************************************/ +#include "util/u_bitcast.h" + static boolean TAG(do_cliptest)( struct pt_post_vs *pvs, struct draw_vertex_info *info, const struct draw_prim_info *prim_info ) @@ -45,7 +47,7 @@ draw_current_shader_viewport_index_output(pvs->draw); int viewport_index = draw_current_shader_uses_viewport_index(pvs->draw) ? - *((unsigned*)out->data[viewport_index_output]): 0; + u_bitcast_f2u(out->data[viewport_index_output][0]): 0; int num_written_clipdistance = draw_current_shader_num_written_clipdistances(pvs->draw); @@ -72,7 +74,7 @@ unsigned verts_per_prim = u_vertices_per_prim(prim_info->prim); /* only change the viewport_index for the leading vertex */ if (!(j % verts_per_prim)) { - viewport_index = *((unsigned*)out->data[viewport_index_output]); + viewport_index = u_bitcast_f2u(out->data[viewport_index_output][0]); viewport_index = draw_clamp_viewport_idx(viewport_index); } scale = pvs->draw->viewports[viewport_index].scale; diff -Nru mesa-12.0.6/src/gallium/auxiliary/draw/draw_context.c mesa-17.0.7/src/gallium/auxiliary/draw/draw_context.c --- mesa-12.0.6/src/gallium/auxiliary/draw/draw_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/draw/draw_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -964,7 +964,7 @@ void draw_set_sampler_views(struct draw_context *draw, - unsigned shader_stage, + enum pipe_shader_type shader_stage, struct pipe_sampler_view **views, unsigned num) { @@ -985,7 +985,7 @@ void draw_set_samplers(struct draw_context *draw, - unsigned shader_stage, + enum pipe_shader_type shader_stage, struct pipe_sampler_state **samplers, unsigned num) { diff -Nru mesa-12.0.6/src/gallium/auxiliary/draw/draw_context.h mesa-17.0.7/src/gallium/auxiliary/draw/draw_context.h --- mesa-12.0.6/src/gallium/auxiliary/draw/draw_context.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/draw/draw_context.h 2017-06-01 10:37:10.000000000 +0000 @@ -167,12 +167,12 @@ void draw_set_sampler_views(struct draw_context *draw, - unsigned shader_stage, + enum pipe_shader_type shader_stage, struct pipe_sampler_view **views, unsigned num); void draw_set_samplers(struct draw_context *draw, - unsigned shader_stage, + enum pipe_shader_type shader_stage, struct pipe_sampler_state **samplers, unsigned num); diff -Nru mesa-12.0.6/src/gallium/auxiliary/draw/draw_llvm.c mesa-17.0.7/src/gallium/auxiliary/draw/draw_llvm.c --- mesa-12.0.6/src/gallium/auxiliary/draw/draw_llvm.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/draw/draw_llvm.c 2017-06-01 10:37:10.000000000 +0000 @@ -33,6 +33,8 @@ #include "gallivm/lp_bld_arit.h" #include "gallivm/lp_bld_arit_overflow.h" +#include "gallivm/lp_bld_bitarit.h" +#include "gallivm/lp_bld_gather.h" #include "gallivm/lp_bld_logic.h" #include "gallivm/lp_bld_const.h" #include "gallivm/lp_bld_swizzle.h" @@ -61,8 +63,7 @@ static void -draw_llvm_generate(struct draw_llvm *llvm, struct draw_llvm_variant *var, - boolean elts); +draw_llvm_generate(struct draw_llvm *llvm, struct draw_llvm_variant *var); struct draw_gs_llvm_iface { @@ -575,17 +576,13 @@ variant->vertex_header_ptr_type = LLVMPointerType(vertex_header, 0); - draw_llvm_generate(llvm, variant, FALSE); /* linear */ - draw_llvm_generate(llvm, variant, TRUE); /* elts */ + draw_llvm_generate(llvm, variant); gallivm_compile_module(variant->gallivm); variant->jit_func = (draw_jit_vert_func) gallivm_jit_function(variant->gallivm, variant->function); - variant->jit_func_elts = (draw_jit_vert_func_elts) - gallivm_jit_function(variant->gallivm, variant->function_elts); - gallivm_free_ir(variant->gallivm); variant->list_item_global.base = variant; @@ -656,140 +653,133 @@ } } + static void -generate_fetch(struct gallivm_state *gallivm, - struct draw_context *draw, - LLVMValueRef vbuffers_ptr, - LLVMValueRef *res, - struct pipe_vertex_element *velem, - LLVMValueRef vbuf, - LLVMValueRef index, - LLVMValueRef instance_id, - LLVMValueRef start_instance) -{ - const struct util_format_description *format_desc = - util_format_description(velem->src_format); - LLVMValueRef zero = LLVMConstNull(LLVMInt32TypeInContext(gallivm->context)); +fetch_instanced(struct gallivm_state *gallivm, + const struct util_format_description *format_desc, + struct lp_type vs_type, + LLVMValueRef vb_stride, + LLVMValueRef map_ptr, + LLVMValueRef buffer_size_adj, + LLVMValueRef *inputs, + LLVMValueRef index) +{ + LLVMTypeRef i32_t = LLVMInt32TypeInContext(gallivm->context); + LLVMTypeRef aosf_t, aosi_t; + LLVMValueRef zero = LLVMConstNull(i32_t); LLVMBuilderRef builder = gallivm->builder; - LLVMValueRef indices = - LLVMConstInt(LLVMInt64TypeInContext(gallivm->context), - velem->vertex_buffer_index, 0); - LLVMValueRef vbuffer_ptr = LLVMBuildGEP(builder, vbuffers_ptr, - &indices, 1, ""); - LLVMValueRef vb_stride = draw_jit_vbuffer_stride(gallivm, vbuf); - LLVMValueRef vb_buffer_offset = draw_jit_vbuffer_offset(gallivm, vbuf); - LLVMValueRef map_ptr = draw_jit_dvbuffer_map(gallivm, vbuffer_ptr); - LLVMValueRef buffer_size = draw_jit_dvbuffer_size(gallivm, vbuffer_ptr); - LLVMValueRef stride; - LLVMValueRef buffer_overflowed; - LLVMValueRef needed_buffer_size; - LLVMValueRef temp_ptr = - lp_build_alloca(gallivm, - lp_build_vec_type(gallivm, lp_float32_vec4_type()), ""); - LLVMValueRef ofbit = NULL; - struct lp_build_if_state if_ctx; + LLVMValueRef stride, buffer_overflowed, aos, index_valid; + unsigned i; - if (velem->instance_divisor) { - /* Index is equal to the start instance plus the number of current - * instance divided by the divisor. In this case we compute it as: - * index = start_instance + (instance_id / divisor) - */ - LLVMValueRef current_instance; - current_instance = LLVMBuildUDiv(builder, instance_id, - lp_build_const_int32(gallivm, velem->instance_divisor), - "instance_divisor"); - index = lp_build_uadd_overflow(gallivm, start_instance, - current_instance, &ofbit); - } - - stride = lp_build_umul_overflow(gallivm, vb_stride, index, &ofbit); - stride = lp_build_uadd_overflow(gallivm, stride, vb_buffer_offset, &ofbit); - stride = lp_build_uadd_overflow( - gallivm, stride, - lp_build_const_int32(gallivm, velem->src_offset), &ofbit); - needed_buffer_size = lp_build_uadd_overflow( - gallivm, stride, - lp_build_const_int32(gallivm, - util_format_get_blocksize(velem->src_format)), - &ofbit); + aosf_t = lp_build_vec_type(gallivm, lp_float32_vec4_type()); + aosi_t = lp_build_vec_type(gallivm, lp_int32_vec4_type()); + + /* This mul can overflow. Wraparound is ok. */ + stride = LLVMBuildMul(builder, vb_stride, index, ""); - buffer_overflowed = LLVMBuildICmp(builder, LLVMIntUGT, - needed_buffer_size, buffer_size, + buffer_overflowed = LLVMBuildICmp(builder, LLVMIntUGE, + stride, buffer_size_adj, "buffer_overflowed"); - buffer_overflowed = LLVMBuildOr(builder, buffer_overflowed, ofbit, ""); -#if 0 - lp_build_printf(gallivm, "vbuf index = %u, vb_stride is %u\n", - index, vb_stride); - lp_build_printf(gallivm, " vb_buffer_offset = %u, src_offset is %u\n", - vb_buffer_offset, - lp_build_const_int32(gallivm, velem->src_offset)); - lp_build_print_value(gallivm, " blocksize = ", - lp_build_const_int32( - gallivm, - util_format_get_blocksize(velem->src_format))); - lp_build_printf(gallivm, " instance_id = %u\n", instance_id); - lp_build_printf(gallivm, " stride = %u\n", stride); - lp_build_printf(gallivm, " buffer size = %u\n", buffer_size); - lp_build_printf(gallivm, " needed_buffer_size = %u\n", needed_buffer_size); - lp_build_print_value(gallivm, " buffer overflowed = ", buffer_overflowed); -#endif - lp_build_if(&if_ctx, gallivm, buffer_overflowed); - { - LLVMValueRef val = - lp_build_const_vec(gallivm, lp_float32_vec4_type(), 0); - LLVMBuildStore(builder, val, temp_ptr); + if (0) { + lp_build_print_value(gallivm, " instance index = ", index); + lp_build_print_value(gallivm, " buffer overflowed = ", buffer_overflowed); } - lp_build_else(&if_ctx); - { - LLVMValueRef val; - map_ptr = LLVMBuildGEP(builder, map_ptr, &stride, 1, ""); - val = lp_build_fetch_rgba_aos(gallivm, - format_desc, - lp_float32_vec4_type(), - FALSE, - map_ptr, - zero, zero, zero, - NULL); - LLVMBuildStore(builder, val, temp_ptr); + index_valid = LLVMBuildNot(builder, buffer_overflowed, ""); + index_valid = LLVMBuildSExt(builder, index_valid, i32_t, ""); + stride = LLVMBuildAnd(builder, stride, index_valid, ""); + + aos = lp_build_fetch_rgba_aos(gallivm, + format_desc, + lp_float32_vec4_type(), + FALSE, + map_ptr, + stride, zero, zero, + NULL); + + index_valid = lp_build_broadcast(gallivm, aosi_t, index_valid); + aos = LLVMBuildBitCast(builder, aos, aosi_t, ""); + aos = LLVMBuildAnd(builder, aos, index_valid, ""); + aos = LLVMBuildBitCast(builder, aos, aosf_t, ""); + + for (i = 0; i < TGSI_NUM_CHANNELS; i++) { + LLVMValueRef index = lp_build_const_int32(gallivm, i); + inputs[i] = lp_build_extract_broadcast(gallivm, + lp_float32_vec4_type(), + vs_type, aos, index); } - lp_build_endif(&if_ctx); - - *res = LLVMBuildLoad(builder, temp_ptr, "aos"); } + static void -convert_to_soa(struct gallivm_state *gallivm, - LLVMValueRef (*src_aos)[LP_MAX_VECTOR_WIDTH / 32], - LLVMValueRef (*dst_soa)[TGSI_NUM_CHANNELS], - unsigned num_attribs, const struct lp_type soa_type) +fetch_vector(struct gallivm_state *gallivm, + const struct util_format_description *format_desc, + struct lp_type vs_type, + LLVMValueRef vb_stride, + LLVMValueRef map_ptr, + LLVMValueRef buffer_size_adj, + LLVMValueRef *inputs, + LLVMValueRef indices) { - unsigned i, j, k; - struct lp_type aos_channel_type = soa_type; + LLVMBuilderRef builder = gallivm->builder; + struct lp_build_context blduivec; + struct lp_type fetch_type = vs_type; + LLVMValueRef offset, valid_mask; + unsigned i; - debug_assert(TGSI_NUM_CHANNELS == 4); - debug_assert((soa_type.length % TGSI_NUM_CHANNELS) == 0); + lp_build_context_init(&blduivec, gallivm, lp_uint_type(vs_type)); - aos_channel_type.length >>= 1; + vb_stride = lp_build_broadcast_scalar(&blduivec, vb_stride); + buffer_size_adj = lp_build_broadcast_scalar(&blduivec, buffer_size_adj); - for (i = 0; i < num_attribs; ++i) { - LLVMValueRef aos_channels[TGSI_NUM_CHANNELS]; - unsigned pixels_per_channel = soa_type.length / TGSI_NUM_CHANNELS; + /* This mul can overflow. Wraparound is ok. */ + offset = lp_build_mul(&blduivec, vb_stride, indices); - for (j = 0; j < TGSI_NUM_CHANNELS; ++j) { - LLVMValueRef channel[LP_MAX_VECTOR_LENGTH] = { 0 }; + valid_mask = lp_build_compare(gallivm, blduivec.type, + PIPE_FUNC_LESS, offset, buffer_size_adj); - assert(pixels_per_channel <= LP_MAX_VECTOR_LENGTH); + /* not valid elements use offset 0 */ + offset = LLVMBuildAnd(builder, offset, valid_mask, ""); - for (k = 0; k < pixels_per_channel; ++k) { - channel[k] = src_aos[i][j + TGSI_NUM_CHANNELS * k]; - } + if (0) { + lp_build_print_value(gallivm, " indices = ", indices); + lp_build_print_value(gallivm, " offsets = ", offset); + lp_build_print_value(gallivm, " valid_mask = ", valid_mask); + } + + /* + * Unlike fetch_instanced, use SoA fetch instead of multiple AoS fetches. + * This should always produce better code. + */ - aos_channels[j] = lp_build_concat(gallivm, channel, aos_channel_type, pixels_per_channel); + /* The type handling is annoying here... */ + if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_RGB && + format_desc->channel[0].pure_integer) { + if (format_desc->channel[0].type == UTIL_FORMAT_TYPE_SIGNED) { + fetch_type = lp_type_int_vec(vs_type.width, vs_type.width * vs_type.length); + } + else if (format_desc->channel[0].type == UTIL_FORMAT_TYPE_UNSIGNED) { + fetch_type = lp_type_uint_vec(vs_type.width, vs_type.width * vs_type.length); } + } - lp_build_transpose_aos(gallivm, soa_type, aos_channels, dst_soa[i]); + lp_build_fetch_rgba_soa(gallivm, format_desc, + fetch_type, FALSE, map_ptr, offset, + blduivec.zero, blduivec.zero, + NULL, inputs); + + for (i = 0; i < TGSI_NUM_CHANNELS; i++) { + inputs[i] = LLVMBuildBitCast(builder, inputs[i], + lp_build_vec_type(gallivm, vs_type), ""); + } + + /* out-of-bound fetches return all zeros */ + for (i = 0; i < TGSI_NUM_CHANNELS; i++) { + inputs[i] = LLVMBuildBitCast(builder, inputs[i], blduivec.vec_type, ""); + inputs[i] = LLVMBuildAnd(builder, inputs[i], valid_mask, ""); + inputs[i] = LLVMBuildBitCast(builder, inputs[i], + lp_build_vec_type(gallivm, vs_type), ""); } } @@ -1123,10 +1113,8 @@ /* divide by w */ out = LLVMBuildFMul(builder, out, out3, ""); - /* mult by scale */ - out = LLVMBuildFMul(builder, out, scale, ""); - /* add translation */ - out = LLVMBuildFAdd(builder, out, trans, ""); + /* mult by scale, add translation */ + out = lp_build_fmuladd(builder, out, scale, trans); /* store transformed outputs */ LLVMBuildStore(builder, out, outputs[pos][i]); @@ -1303,22 +1291,19 @@ plane_ptr = LLVMBuildGEP(builder, planes_ptr, indices, 3, ""); plane1 = LLVMBuildLoad(builder, plane_ptr, "plane_y"); planes = lp_build_broadcast(gallivm, vs_type_llvm, plane1); - test = LLVMBuildFMul(builder, planes, cv_y, ""); - sum = LLVMBuildFAdd(builder, sum, test, ""); + sum = lp_build_fmuladd(builder, planes, cv_y, sum); indices[2] = lp_build_const_int32(gallivm, 2); plane_ptr = LLVMBuildGEP(builder, planes_ptr, indices, 3, ""); plane1 = LLVMBuildLoad(builder, plane_ptr, "plane_z"); planes = lp_build_broadcast(gallivm, vs_type_llvm, plane1); - test = LLVMBuildFMul(builder, planes, cv_z, ""); - sum = LLVMBuildFAdd(builder, sum, test, ""); + sum = lp_build_fmuladd(builder, planes, cv_z, sum); indices[2] = lp_build_const_int32(gallivm, 3); plane_ptr = LLVMBuildGEP(builder, planes_ptr, indices, 3, ""); plane1 = LLVMBuildLoad(builder, plane_ptr, "plane_w"); planes = lp_build_broadcast(gallivm, vs_type_llvm, plane1); - test = LLVMBuildFMul(builder, planes, cv_w, ""); - sum = LLVMBuildFAdd(builder, sum, test, ""); + sum = lp_build_fmuladd(builder, planes, cv_w, sum); test = lp_build_compare(gallivm, f32_type, PIPE_FUNC_GREATER, zero, sum); temp = lp_build_const_int_vec(gallivm, i32_type, 1LL << plane_idx); @@ -1347,20 +1332,21 @@ /** * Returns boolean if any clipping has occurred - * Used zero/non-zero i32 value to represent boolean + * Used zero/one i8 value to represent boolean */ static LLVMValueRef -clipmask_booli32(struct gallivm_state *gallivm, - const struct lp_type vs_type, - LLVMValueRef clipmask_bool_ptr, - boolean edgeflag_in_clipmask) +clipmask_booli8(struct gallivm_state *gallivm, + const struct lp_type vs_type, + LLVMValueRef clipmask_bool_ptr, + boolean edgeflag_in_clipmask) { LLVMBuilderRef builder = gallivm->builder; - LLVMTypeRef int32_type = LLVMInt32TypeInContext(gallivm->context); + LLVMTypeRef int8_type = LLVMInt8TypeInContext(gallivm->context); LLVMValueRef clipmask_bool = LLVMBuildLoad(builder, clipmask_bool_ptr, ""); - LLVMValueRef ret = LLVMConstNull(int32_type); - LLVMValueRef temp; - int i; + LLVMValueRef ret; + struct lp_build_context bldivec; + + lp_build_context_init(&bldivec, gallivm, lp_int_type(vs_type)); /* * We need to invert the edgeflag bit from the clipmask here @@ -1368,19 +1354,20 @@ * and we (may) need it if edgeflag was 0). */ if (edgeflag_in_clipmask) { - struct lp_type i32_type = lp_int_type(vs_type); - LLVMValueRef edge = lp_build_const_int_vec(gallivm, i32_type, + LLVMValueRef edge = lp_build_const_int_vec(gallivm, bldivec.type, 1LL << DRAW_TOTAL_CLIP_PLANES); clipmask_bool = LLVMBuildXor(builder, clipmask_bool, edge, ""); } + /* - * Could do much better with just cmp/movmskps. + * XXX: probably should mask off bits from the mask which come from + * vertices which were beyond the count (i.e. indices_valid for + * linear fetches, for elts ones we don't have the correct mask + * right now). Otherwise might run the pipeline for nothing, + * though everything should still work. */ - for (i=0; i < vs_type.length; i++) { - temp = LLVMBuildExtractElement(builder, clipmask_bool, - lp_build_const_int32(gallivm, i) , ""); - ret = LLVMBuildOr(builder, ret, temp, ""); - } + ret = lp_build_any_true_range(&bldivec, vs_type.length, clipmask_bool); + ret = LLVMBuildZExt(builder, ret, int8_type, ""); return ret; } @@ -1527,36 +1514,38 @@ } static void -draw_llvm_generate(struct draw_llvm *llvm, struct draw_llvm_variant *variant, - boolean elts) +draw_llvm_generate(struct draw_llvm *llvm, struct draw_llvm_variant *variant) { struct gallivm_state *gallivm = variant->gallivm; LLVMContextRef context = gallivm->context; LLVMTypeRef int32_type = LLVMInt32TypeInContext(context); LLVMTypeRef arg_types[11]; - unsigned num_arg_types = - elts ? ARRAY_SIZE(arg_types) : ARRAY_SIZE(arg_types) - 1; + unsigned num_arg_types = ARRAY_SIZE(arg_types); LLVMTypeRef func_type; LLVMValueRef context_ptr; LLVMBasicBlockRef block; LLVMBuilderRef builder; char func_name[64]; struct lp_type vs_type; - LLVMValueRef end, start; - LLVMValueRef count, fetch_elts, fetch_elt_max, fetch_count; + LLVMValueRef count, fetch_elts, start_or_maxelt; LLVMValueRef vertex_id_offset, start_instance; LLVMValueRef stride, step, io_itr; + LLVMValueRef ind_vec, start_vec, have_elts, fetch_max, tmp; LLVMValueRef io_ptr, vbuffers_ptr, vb_ptr; - LLVMValueRef zero = lp_build_const_int32(gallivm, 0); - LLVMValueRef one = lp_build_const_int32(gallivm, 1); + LLVMValueRef vb_stride[PIPE_MAX_ATTRIBS]; + LLVMValueRef map_ptr[PIPE_MAX_ATTRIBS]; + LLVMValueRef buffer_size_adj[PIPE_MAX_ATTRIBS]; + LLVMValueRef instance_index[PIPE_MAX_ATTRIBS]; + LLVMValueRef fake_buf_ptr, fake_buf; + struct draw_context *draw = llvm->draw; const struct tgsi_shader_info *vs_info = &draw->vs.vertex_shader->info; unsigned i, j; - struct lp_build_context bld; + struct lp_build_context bld, blduivec; struct lp_build_loop_state lp_loop; + struct lp_build_if_state if_ctx; const int vector_length = lp_native_vector_width / 32; LLVMValueRef outputs[PIPE_MAX_SHADER_OUTPUTS][TGSI_NUM_CHANNELS]; - LLVMValueRef fetch_max; struct lp_build_sampler_soa *sampler = 0; LLVMValueRef ret, clipmask_bool_ptr; struct draw_llvm_variant_key *key = &variant->key; @@ -1568,93 +1557,80 @@ * the values). */ const boolean bypass_viewport = key->has_gs || key->bypass_viewport || - llvm->draw->vs.vertex_shader->info.writes_viewport_index; + vs_info->writes_viewport_index; const boolean enable_cliptest = !key->has_gs && (key->clip_xy || key->clip_z || key->clip_user || key->need_edgeflags); LLVMValueRef variant_func; - const unsigned pos = llvm->draw->vs.position_output; - const unsigned cv = llvm->draw->vs.clipvertex_output; + const unsigned pos = draw->vs.position_output; + const unsigned cv = draw->vs.clipvertex_output; boolean have_clipdist = FALSE; struct lp_bld_tgsi_system_values system_values; memset(&system_values, 0, sizeof(system_values)); - util_snprintf(func_name, sizeof(func_name), "draw_llvm_vs_variant%u_%s", - variant->shader->variants_cached, elts ? "elts" : "linear"); + util_snprintf(func_name, sizeof(func_name), "draw_llvm_vs_variant%u", + variant->shader->variants_cached); i = 0; arg_types[i++] = get_context_ptr_type(variant); /* context */ arg_types[i++] = get_vertex_header_ptr_type(variant); /* vertex_header */ arg_types[i++] = get_buffer_ptr_type(variant); /* vbuffers */ - if (elts) { - arg_types[i++] = LLVMPointerType(int32_type, 0);/* fetch_elts */ - arg_types[i++] = int32_type; /* fetch_elt_max */ - } else - arg_types[i++] = int32_type; /* start */ - arg_types[i++] = int32_type; /* fetch_count / count */ - arg_types[i++] = int32_type; /* stride */ - arg_types[i++] = get_vb_ptr_type(variant); /* pipe_vertex_buffer's */ - arg_types[i++] = int32_type; /* instance_id */ - arg_types[i++] = int32_type; /* vertex_id_offset */ - arg_types[i++] = int32_type; /* start_instance */ + arg_types[i++] = int32_type; /* count */ + arg_types[i++] = int32_type; /* start/fetch_elt_max */ + arg_types[i++] = int32_type; /* stride */ + arg_types[i++] = get_vb_ptr_type(variant); /* pipe_vertex_buffer's */ + arg_types[i++] = int32_type; /* instance_id */ + arg_types[i++] = int32_type; /* vertex_id_offset */ + arg_types[i++] = int32_type; /* start_instance */ + arg_types[i++] = LLVMPointerType(int32_type, 0); /* fetch_elts */ - func_type = LLVMFunctionType(int32_type, arg_types, num_arg_types, 0); + func_type = LLVMFunctionType(LLVMInt8TypeInContext(context), + arg_types, num_arg_types, 0); variant_func = LLVMAddFunction(gallivm->module, func_name, func_type); - - if (elts) - variant->function_elts = variant_func; - else - variant->function = variant_func; + variant->function = variant_func; LLVMSetFunctionCallConv(variant_func, LLVMCCallConv); for (i = 0; i < num_arg_types; ++i) if (LLVMGetTypeKind(arg_types[i]) == LLVMPointerTypeKind) - LLVMAddAttribute(LLVMGetParam(variant_func, i), - LLVMNoAliasAttribute); + lp_add_function_attr(variant_func, i + 1, LP_FUNC_ATTR_NOALIAS); context_ptr = LLVMGetParam(variant_func, 0); io_ptr = LLVMGetParam(variant_func, 1); vbuffers_ptr = LLVMGetParam(variant_func, 2); + count = LLVMGetParam(variant_func, 3); + /* + * XXX: the maxelt part is unused. Not really useful, since we cannot + * get index buffer overflows due to vsplit (which provides its own + * elts buffer, with a different size than what's passed in here). + */ + start_or_maxelt = LLVMGetParam(variant_func, 4); /* * XXX: stride is actually unused. The stride we use is strictly calculated * from the number of outputs (including the draw_extra outputs). * Should probably fix some day (we need a new vs just because of extra * outputs which the generated vs won't touch). */ - stride = LLVMGetParam(variant_func, 5 + (elts ? 1 : 0)); - vb_ptr = LLVMGetParam(variant_func, 6 + (elts ? 1 : 0)); - system_values.instance_id = LLVMGetParam(variant_func, 7 + (elts ? 1 : 0)); - vertex_id_offset = LLVMGetParam(variant_func, 8 + (elts ? 1 : 0)); - start_instance = LLVMGetParam(variant_func, 9 + (elts ? 1 : 0)); + stride = LLVMGetParam(variant_func, 5); + vb_ptr = LLVMGetParam(variant_func, 6); + system_values.instance_id = LLVMGetParam(variant_func, 7); + vertex_id_offset = LLVMGetParam(variant_func, 8); + start_instance = LLVMGetParam(variant_func, 9); + fetch_elts = LLVMGetParam(variant_func, 10); lp_build_name(context_ptr, "context"); lp_build_name(io_ptr, "io"); lp_build_name(vbuffers_ptr, "vbuffers"); + lp_build_name(count, "count"); + lp_build_name(start_or_maxelt, "start_or_maxelt"); lp_build_name(stride, "stride"); lp_build_name(vb_ptr, "vb"); lp_build_name(system_values.instance_id, "instance_id"); lp_build_name(vertex_id_offset, "vertex_id_offset"); lp_build_name(start_instance, "start_instance"); - - if (elts) { - fetch_elts = LLVMGetParam(variant_func, 3); - fetch_elt_max = LLVMGetParam(variant_func, 4); - fetch_count = LLVMGetParam(variant_func, 5); - lp_build_name(fetch_elts, "fetch_elts"); - lp_build_name(fetch_elt_max, "fetch_elt_max"); - lp_build_name(fetch_count, "fetch_count"); - start = count = NULL; - } - else { - start = LLVMGetParam(variant_func, 3); - count = LLVMGetParam(variant_func, 4); - lp_build_name(start, "start"); - lp_build_name(count, "count"); - fetch_elts = fetch_count = NULL; - } + lp_build_name(fetch_elts, "fetch_elts"); /* * Function body @@ -1664,8 +1640,6 @@ builder = gallivm->builder; LLVMPositionBuilderAtEnd(builder, block); - lp_build_context_init(&bld, gallivm, lp_type_int(32)); - memset(&vs_type, 0, sizeof vs_type); vs_type.floating = TRUE; /* floating point values */ vs_type.sign = TRUE; /* values are signed */ @@ -1673,34 +1647,143 @@ vs_type.width = 32; /* 32-bit float */ vs_type.length = vector_length; + lp_build_context_init(&bld, gallivm, lp_type_uint(32)); + lp_build_context_init(&blduivec, gallivm, lp_uint_type(vs_type)); + /* hold temporary "bool" clipmask */ - clipmask_bool_ptr = lp_build_alloca(gallivm, lp_build_int_vec_type(gallivm, vs_type), ""); - LLVMBuildStore(builder, lp_build_zero(gallivm, lp_int_type(vs_type)), clipmask_bool_ptr); + clipmask_bool_ptr = lp_build_alloca(gallivm, blduivec.vec_type, ""); + + fake_buf = lp_build_alloca_undef(gallivm, + LLVMVectorType(LLVMInt64TypeInContext(context), 4), ""); + fake_buf = LLVMBuildBitCast(builder, fake_buf, + LLVMPointerType(LLVMInt8TypeInContext(context), 0), ""); + fake_buf_ptr = LLVMBuildGEP(builder, fake_buf, &bld.zero, 1, ""); /* code generated texture sampling */ sampler = draw_llvm_sampler_soa_create(draw_llvm_variant_key_samplers(key)); - if (elts) { - start = zero; - end = fetch_count; - count = fetch_count; - } - else { - end = lp_build_add(&bld, start, count); + step = lp_build_const_int32(gallivm, vector_length); + + ind_vec = blduivec.undef; + for (i = 0; i < vs_type.length; i++) { + LLVMValueRef index = lp_build_const_int32(gallivm, i); + ind_vec = LLVMBuildInsertElement(builder, ind_vec, index, index, ""); } - step = lp_build_const_int32(gallivm, vector_length); + fetch_max = lp_build_alloca(gallivm, int32_type, "fetch_max"); - fetch_max = LLVMBuildSub(builder, end, one, "fetch_max"); + have_elts = LLVMBuildICmp(builder, LLVMIntNE, + LLVMConstPointerNull(arg_types[10]), fetch_elts, ""); - lp_build_loop_begin(&lp_loop, gallivm, zero); + fetch_max = LLVMBuildSub(builder, count, bld.one, "fetch_max"); + fetch_max = lp_build_broadcast_scalar(&blduivec, fetch_max); + /* + * Only needed for non-indexed path. + */ + start_vec = lp_build_broadcast_scalar(&blduivec, start_or_maxelt); + + /* + * Pre-calculate everything which is constant per shader invocation. + */ + for (j = 0; j < key->nr_vertex_elements; ++j) { + LLVMValueRef vb_buffer_offset, buffer_size, temp_ptr; + LLVMValueRef vb_info, vbuffer_ptr, buf_offset, ofbit; + struct pipe_vertex_element *velem = &key->vertex_element[j]; + LLVMValueRef vb_index = + lp_build_const_int32(gallivm, velem->vertex_buffer_index); + LLVMValueRef bsize = lp_build_const_int32(gallivm, + util_format_get_blocksize(velem->src_format)); + LLVMValueRef src_offset = lp_build_const_int32(gallivm, + velem->src_offset); + struct lp_build_if_state if_ctx; + + if (velem->src_format != PIPE_FORMAT_NONE) { + vbuffer_ptr = LLVMBuildGEP(builder, vbuffers_ptr, &vb_index, 1, ""); + vb_info = LLVMBuildGEP(builder, vb_ptr, &vb_index, 1, ""); + vb_stride[j] = draw_jit_vbuffer_stride(gallivm, vb_info); + vb_buffer_offset = draw_jit_vbuffer_offset(gallivm, vb_info); + map_ptr[j] = draw_jit_dvbuffer_map(gallivm, vbuffer_ptr); + buffer_size = draw_jit_dvbuffer_size(gallivm, vbuffer_ptr); + + ofbit = NULL; + /* + * We'll set buffer_size_adj to zero if we have of, so it will + * always overflow later automatically without having to keep ofbit. + * Overflows (with normal wraparound) doing the actual offset + * calculation should be ok, just not for the buffer size calc. + * It would also be possible to detect such overflows and return + * zeros if that happens, but this would be more complex. + */ + buf_offset = lp_build_add(&bld, vb_buffer_offset, src_offset); + tmp = lp_build_sub(&bld, bsize, bld.one); + buffer_size_adj[j] = lp_build_usub_overflow(gallivm, buffer_size, tmp, + &ofbit); + buffer_size_adj[j] = lp_build_usub_overflow(gallivm, buffer_size_adj[j], + buf_offset, &ofbit); + + /* + * We can't easily set fake vertex buffers outside the generated code. + * Hence, set fake vertex buffers here instead basically, so fetch + * code can always fetch using offset 0, eliminating all control flow + * inside the main loop. + * (Alternatively, could have control flow per vector skipping fetch + * if ofbit is true.) + */ + if (velem->instance_divisor) { + /* + * Index is equal to the start instance plus the number of current + * instance divided by the divisor. In this case we compute it as: + * index = start_instance + (instance_id / divisor). + * Note we could actually do the fetch here, outside the loop - + * it's all constant, hopefully llvm recognizes this. + */ + LLVMValueRef current_instance; + current_instance = LLVMBuildUDiv(builder, system_values.instance_id, + lp_build_const_int32(gallivm, + velem->instance_divisor), + "instance_divisor"); + instance_index[j] = lp_build_uadd_overflow(gallivm, start_instance, + current_instance, &ofbit); + } + + buffer_size_adj[j] = LLVMBuildSelect(builder, ofbit, bld.zero, + buffer_size_adj[j], ""); + + temp_ptr = lp_build_alloca_undef(gallivm, + LLVMPointerType(LLVMInt8TypeInContext(context), 0), ""); + + lp_build_if(&if_ctx, gallivm, ofbit); + { + LLVMBuildStore(builder, fake_buf_ptr, temp_ptr); + } + lp_build_else(&if_ctx); + { + map_ptr[j] = LLVMBuildGEP(builder, map_ptr[j], &buf_offset, 1, ""); + LLVMBuildStore(builder, map_ptr[j], temp_ptr); + } + lp_build_endif(&if_ctx); + map_ptr[j] = LLVMBuildLoad(builder, temp_ptr, "map_ptr"); + + if (0) { + lp_build_printf(gallivm, "velem %d, vbuf index = %u, vb_stride = %u\n", + lp_build_const_int32(gallivm, j), + vb_index, vb_stride[j]); + lp_build_printf(gallivm, + " vb_buffer_offset = %u, src_offset = %u, buf_offset = %u\n", + vb_buffer_offset, src_offset, buf_offset); + lp_build_printf(gallivm, " buffer size = %u, blocksize = %u\n", + buffer_size, bsize); + lp_build_printf(gallivm, " instance_id = %u\n", system_values.instance_id); + } + } + } + + lp_build_loop_begin(&lp_loop, gallivm, bld.zero); { LLVMValueRef inputs[PIPE_MAX_SHADER_INPUTS][TGSI_NUM_CHANNELS]; - LLVMValueRef aos_attribs[PIPE_MAX_SHADER_INPUTS][LP_MAX_VECTOR_WIDTH / 32] = { { 0 } }; LLVMValueRef io; LLVMValueRef clipmask; /* holds the clipmask value */ - LLVMValueRef true_index_array = lp_build_zero(gallivm, - lp_type_uint_vec(32, 32*vector_length)); + LLVMValueRef true_index_array, index_store; const LLVMValueRef (*ptr_aos)[TGSI_NUM_CHANNELS]; io_itr = lp_loop.counter; @@ -1710,71 +1793,88 @@ lp_build_printf(gallivm, " --- io %d = %p, loop counter %d\n", io_itr, io, lp_loop.counter); #endif - for (i = 0; i < vector_length; ++i) { - LLVMValueRef vert_index = - LLVMBuildAdd(builder, - lp_loop.counter, - lp_build_const_int32(gallivm, i), ""); - LLVMValueRef true_index = - LLVMBuildAdd(builder, start, vert_index, ""); - - /* make sure we're not out of bounds which can happen - * if fetch_count % 4 != 0, because on the last iteration - * a few of the 4 vertex fetches will be out of bounds */ - true_index = lp_build_min(&bld, true_index, fetch_max); - - if (elts) { - LLVMValueRef fetch_ptr; - LLVMValueRef index_overflowed; - LLVMValueRef index_ptr = - lp_build_alloca( - gallivm, - lp_build_vec_type(gallivm, lp_type_int(32)), ""); - struct lp_build_if_state if_ctx; - index_overflowed = LLVMBuildICmp(builder, LLVMIntUGT, - true_index, fetch_elt_max, - "index_overflowed"); - lp_build_if(&if_ctx, gallivm, index_overflowed); - { - /* Generate maximum possible index so that - * generate_fetch can treat it just like - * any other overflow and return zeros. - * We don't have to worry about the restart - * primitive index because it has already been - * handled - */ - LLVMValueRef val = - lp_build_const_int32(gallivm, 0xffffffff); - LLVMBuildStore(builder, val, index_ptr); - } - lp_build_else(&if_ctx); - { - LLVMValueRef val; - fetch_ptr = LLVMBuildGEP(builder, fetch_elts, - &true_index, 1, ""); - val = LLVMBuildLoad(builder, fetch_ptr, ""); - LLVMBuildStore(builder, val, index_ptr); + true_index_array = lp_build_broadcast_scalar(&blduivec, lp_loop.counter); + true_index_array = LLVMBuildAdd(builder, true_index_array, ind_vec, ""); + + /* + * Limit indices to fetch_max, otherwise might try to access indices + * beyond index buffer (or rather vsplit elt buffer) size. + * Could probably safely (?) skip this for non-indexed draws and + * simplify things minimally (by removing it could combine the ind_vec + * and start_vec adds). I think the only effect for non-indexed draws will + * be that for the invalid elements they will be all fetched from the + * same location as the last valid one, but noone should really care. + */ + true_index_array = lp_build_min(&blduivec, true_index_array, fetch_max); + + index_store = lp_build_alloca_undef(gallivm, blduivec.vec_type, "index_store"); + + lp_build_if(&if_ctx, gallivm, have_elts); + { + /* + * Note: you'd expect some comparison/clamp against fetch_elt_max + * here. + * There used to be one here but it was incorrect: overflow was + * detected if index > fetch_elt_max - but the correct condition + * would be index >= fetch_elt_max (since this is just size of elts + * buffer / element size). + * Using the correct condition however will cause failures - due to + * vsplit/vcache code which rebases indices. So, as an example, if + * fetch_elt_max is just 1 and fetch_count 2, vsplit cache will + * replace all invalid indices with 0 - which in case of elt_bias + * not being zero will get a different fetch index than the valid + * index 0. So, just rely on vsplit code preventing out-of-bounds + * fetches. This is also why it's safe to do elts fetch even if there + * was no index buffer bound - the real buffer is never seen here, at + * least not if there are index buffer overflows... + */ + + /* + * XXX should not have to do this, as scale can be handled + * natively by loads (hits asserts though). + */ + tmp = lp_build_shl_imm(&blduivec, true_index_array, 2); + fetch_elts = LLVMBuildBitCast(builder, fetch_elts, + LLVMPointerType(LLVMInt8TypeInContext(context), + 0), ""); + tmp = lp_build_gather(gallivm, vs_type.length, + 32, bld.type, TRUE, + fetch_elts, tmp, FALSE); + LLVMBuildStore(builder, tmp, index_store); + } + lp_build_else(&if_ctx); + { + tmp = LLVMBuildAdd(builder, true_index_array, start_vec, ""); + LLVMBuildStore(builder, tmp, index_store); + } + lp_build_endif(&if_ctx); + + true_index_array = LLVMBuildLoad(builder, index_store, ""); + + for (j = 0; j < key->nr_vertex_elements; ++j) { + struct pipe_vertex_element *velem = &key->vertex_element[j]; + const struct util_format_description *format_desc = + util_format_description(velem->src_format); + + if (format_desc->format == PIPE_FORMAT_NONE) { + for (i = 0; i < TGSI_NUM_CHANNELS; i++) { + inputs[j][i] = lp_build_zero(gallivm, vs_type); } - lp_build_endif(&if_ctx); - true_index = LLVMBuildLoad(builder, index_ptr, "true_index"); } - true_index_array = LLVMBuildInsertElement( - gallivm->builder, true_index_array, true_index, - lp_build_const_int32(gallivm, i), ""); - - for (j = 0; j < draw->pt.nr_vertex_elements; ++j) { - struct pipe_vertex_element *velem = &draw->pt.vertex_element[j]; - LLVMValueRef vb_index = - lp_build_const_int32(gallivm, velem->vertex_buffer_index); - LLVMValueRef vb = LLVMBuildGEP(builder, vb_ptr, &vb_index, 1, ""); - generate_fetch(gallivm, draw, vbuffers_ptr, - &aos_attribs[j][i], velem, vb, true_index, - system_values.instance_id, start_instance); + else if (velem->instance_divisor) { + fetch_instanced(gallivm, format_desc, vs_type, + vb_stride[j], map_ptr[j], + buffer_size_adj[j], + inputs[j], instance_index[j]); + } + else { + fetch_vector(gallivm, format_desc, vs_type, + vb_stride[j], map_ptr[j], + buffer_size_adj[j], + inputs[j], true_index_array); } } - convert_to_soa(gallivm, aos_attribs, inputs, - draw->pt.nr_vertex_elements, vs_type); /* In the paths with elts vertex id has to be unaffected by the * index bias and because indices inside our elements array have @@ -1787,9 +1887,8 @@ * most 4095-vertices) we need to back out the original start * index out of our vertex id here. */ - system_values.basevertex = lp_build_broadcast(gallivm, lp_build_vec_type(gallivm, - lp_type_uint_vec(32, 32*vector_length)), - vertex_id_offset); + system_values.basevertex = lp_build_broadcast_scalar(&blduivec, + vertex_id_offset); system_values.vertex_id = true_index_array; system_values.vertex_id_nobase = LLVMBuildSub(builder, true_index_array, system_values.basevertex, ""); @@ -1824,7 +1923,7 @@ LLVMBuildStore(builder, temp, clipmask_bool_ptr); } else { - clipmask = lp_build_const_int_vec(gallivm, lp_int_type(vs_type), 0); + clipmask = blduivec.zero; } /* do viewport mapping */ @@ -1833,7 +1932,7 @@ } } else { - clipmask = lp_build_const_int_vec(gallivm, lp_int_type(vs_type), 0); + clipmask = blduivec.zero; } /* store clipmask in vertex header, @@ -1849,8 +1948,8 @@ sampler->destroy(sampler); /* return clipping boolean value for function */ - ret = clipmask_booli32(gallivm, vs_type, clipmask_bool_ptr, - enable_cliptest && key->need_edgeflags); + ret = clipmask_booli8(gallivm, vs_type, clipmask_bool_ptr, + enable_cliptest && key->need_edgeflags); LLVMBuildRet(builder, ret); @@ -1871,15 +1970,6 @@ key->clamp_vertex_color = llvm->draw->rasterizer->clamp_vertex_color; /**/ - /* Presumably all variants of the shader should have the same - * number of vertex elements - ie the number of shader inputs. - * NOTE: we NEED to store the needed number of needed inputs - * here, not the number of provided elements to match keysize - * (and the offset of sampler state in the key). - */ - key->nr_vertex_elements = llvm->draw->vs.vertex_shader->info.file_max[TGSI_FILE_INPUT] + 1; - assert(key->nr_vertex_elements <= llvm->draw->pt.nr_vertex_elements); - /* will have to rig this up properly later */ key->clip_xy = llvm->draw->clip_xy; key->clip_z = llvm->draw->clip_z; @@ -1905,13 +1995,34 @@ key->nr_sampler_views = key->nr_samplers; } - draw_sampler = draw_llvm_variant_key_samplers(key); + /* Presumably all variants of the shader should have the same + * number of vertex elements - ie the number of shader inputs. + * NOTE: we NEED to store the needed number of needed inputs + * here, not the number of provided elements to match keysize + * (and the offset of sampler state in the key). + * If we have excess number of vertex elements, this is valid, + * but the excess ones don't matter. + * If we don't have enough vertex elements (which looks not really + * valid but we'll handle it gracefully) fill out missing ones with + * zero (we'll recognize these later by PIPE_FORMAT_NONE). + */ + key->nr_vertex_elements = + llvm->draw->vs.vertex_shader->info.file_max[TGSI_FILE_INPUT] + 1; + if (llvm->draw->pt.nr_vertex_elements < key->nr_vertex_elements) { + debug_printf("draw: vs with %d inputs but only have %d vertex elements\n", + key->nr_vertex_elements, llvm->draw->pt.nr_vertex_elements); + memset(key->vertex_element, 0, + sizeof(struct pipe_vertex_element) * key->nr_vertex_elements); + } memcpy(key->vertex_element, llvm->draw->pt.vertex_element, - sizeof(struct pipe_vertex_element) * key->nr_vertex_elements); + sizeof(struct pipe_vertex_element) * + MIN2(key->nr_vertex_elements, llvm->draw->pt.nr_vertex_elements)); - memset(draw_sampler, 0, MAX2(key->nr_samplers, key->nr_sampler_views) * sizeof *draw_sampler); + draw_sampler = draw_llvm_variant_key_samplers(key); + memset(draw_sampler, 0, + MAX2(key->nr_samplers, key->nr_sampler_views) * sizeof *draw_sampler); for (i = 0 ; i < key->nr_samplers; i++) { lp_sampler_static_sampler_state(&draw_sampler[i].sampler_state, @@ -2158,8 +2269,7 @@ for (i = 0; i < ARRAY_SIZE(arg_types); ++i) if (LLVMGetTypeKind(arg_types[i]) == LLVMPointerTypeKind) - LLVMAddAttribute(LLVMGetParam(variant_func, i), - LLVMNoAliasAttribute); + lp_add_function_attr(variant_func, i + 1, LP_FUNC_ATTR_NOALIAS); context_ptr = LLVMGetParam(variant_func, 0); input_array = LLVMGetParam(variant_func, 1); diff -Nru mesa-12.0.6/src/gallium/auxiliary/draw/draw_llvm.h mesa-17.0.7/src/gallium/auxiliary/draw/draw_llvm.h --- mesa-12.0.6/src/gallium/auxiliary/draw/draw_llvm.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/draw/draw_llvm.h 2017-06-01 10:37:10.000000000 +0000 @@ -261,31 +261,18 @@ -typedef int +typedef boolean (*draw_jit_vert_func)(struct draw_jit_context *context, struct vertex_header *io, const struct draw_vertex_buffer vbuffers[PIPE_MAX_ATTRIBS], - unsigned start, unsigned count, + unsigned start_or_maxelt, unsigned stride, struct pipe_vertex_buffer *vertex_buffers, unsigned instance_id, unsigned vertex_id_offset, - unsigned start_instance); - - -typedef int -(*draw_jit_vert_func_elts)(struct draw_jit_context *context, - struct vertex_header *io, - const struct draw_vertex_buffer vbuffers[PIPE_MAX_ATTRIBS], - const unsigned *fetch_elts, - unsigned fetch_max_elt, - unsigned fetch_count, - unsigned stride, - struct pipe_vertex_buffer *vertex_buffers, - unsigned instance_id, - unsigned vertex_id_offset, - unsigned start_instance); + unsigned start_instance, + const unsigned *fetch_elts); typedef int @@ -393,9 +380,7 @@ LLVMTypeRef vertex_header_ptr_type; LLVMValueRef function; - LLVMValueRef function_elts; draw_jit_vert_func jit_func; - draw_jit_vert_func_elts jit_func_elts; struct llvm_vertex_shader *shader; diff -Nru mesa-12.0.6/src/gallium/auxiliary/draw/draw_pipe_aaline.c mesa-17.0.7/src/gallium/auxiliary/draw/draw_pipe_aaline.c --- mesa-12.0.6/src/gallium/auxiliary/draw/draw_pipe_aaline.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/draw/draw_pipe_aaline.c 2017-06-01 10:37:10.000000000 +0000 @@ -118,10 +118,12 @@ void (*driver_bind_fs_state)(struct pipe_context *, void *); void (*driver_delete_fs_state)(struct pipe_context *, void *); - void (*driver_bind_sampler_states)(struct pipe_context *, unsigned, unsigned, + void (*driver_bind_sampler_states)(struct pipe_context *, + enum pipe_shader_type, unsigned, unsigned, void **); - void (*driver_set_sampler_views)(struct pipe_context *, unsigned shader, + void (*driver_set_sampler_views)(struct pipe_context *, + enum pipe_shader_type shader, unsigned start, unsigned count, struct pipe_sampler_view **); }; @@ -283,7 +285,7 @@ TGSI_FILE_OUTPUT, aactx->colorOutput, TGSI_WRITEMASK_W, TGSI_FILE_TEMPORARY, aactx->colorTemp, - TGSI_FILE_TEMPORARY, aactx->texTemp); + TGSI_FILE_TEMPORARY, aactx->texTemp, false); } } @@ -884,7 +886,8 @@ static void -aaline_bind_sampler_states(struct pipe_context *pipe, unsigned shader, +aaline_bind_sampler_states(struct pipe_context *pipe, + enum pipe_shader_type shader, unsigned start, unsigned num, void **sampler) { struct aaline_stage *aaline = aaline_stage_from_pipe(pipe); @@ -907,7 +910,8 @@ static void -aaline_set_sampler_views(struct pipe_context *pipe, unsigned shader, +aaline_set_sampler_views(struct pipe_context *pipe, + enum pipe_shader_type shader, unsigned start, unsigned num, struct pipe_sampler_view **views) { diff -Nru mesa-12.0.6/src/gallium/auxiliary/draw/draw_pipe_aapoint.c mesa-17.0.7/src/gallium/auxiliary/draw/draw_pipe_aapoint.c --- mesa-12.0.6/src/gallium/auxiliary/draw/draw_pipe_aapoint.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/draw/draw_pipe_aapoint.c 2017-06-01 10:37:10.000000000 +0000 @@ -213,13 +213,13 @@ tgsi_transform_op2_inst(ctx, TGSI_OPCODE_MUL, TGSI_FILE_TEMPORARY, tmp0, TGSI_WRITEMASK_XY, TGSI_FILE_INPUT, texInput, - TGSI_FILE_INPUT, texInput); + TGSI_FILE_INPUT, texInput, false); /* ADD t0.x, t0.x, t0.y; # x^2 + y^2 */ tgsi_transform_op2_swz_inst(ctx, TGSI_OPCODE_ADD, TGSI_FILE_TEMPORARY, tmp0, TGSI_WRITEMASK_X, TGSI_FILE_TEMPORARY, tmp0, TGSI_SWIZZLE_X, - TGSI_FILE_TEMPORARY, tmp0, TGSI_SWIZZLE_Y); + TGSI_FILE_TEMPORARY, tmp0, TGSI_SWIZZLE_Y, false); #if NORMALIZE /* OPTIONAL normalization of length */ /* RSQ t0.x, t0.x; */ @@ -237,7 +237,7 @@ tgsi_transform_op2_swz_inst(ctx, TGSI_OPCODE_SGT, TGSI_FILE_TEMPORARY, tmp0, TGSI_WRITEMASK_Y, TGSI_FILE_TEMPORARY, tmp0, TGSI_SWIZZLE_X, - TGSI_FILE_INPUT, texInput, TGSI_SWIZZLE_W); + TGSI_FILE_INPUT, texInput, TGSI_SWIZZLE_W, false); /* KILL_IF -tmp0.yyyy; # if -tmp0.y < 0, KILL */ tgsi_transform_kill_inst(ctx, TGSI_FILE_TEMPORARY, tmp0, @@ -246,10 +246,10 @@ /* compute coverage factor = (1-d)/(1-k) */ /* SUB t0.z, tex.w, tex.z; # m = 1 - k */ - tgsi_transform_op2_swz_inst(ctx, TGSI_OPCODE_SUB, + tgsi_transform_op2_swz_inst(ctx, TGSI_OPCODE_ADD, TGSI_FILE_TEMPORARY, tmp0, TGSI_WRITEMASK_Z, TGSI_FILE_INPUT, texInput, TGSI_SWIZZLE_W, - TGSI_FILE_INPUT, texInput, TGSI_SWIZZLE_Z); + TGSI_FILE_INPUT, texInput, TGSI_SWIZZLE_Z, true); /* RCP t0.z, t0.z; # t0.z = 1 / m */ newInst = tgsi_default_full_instruction(); @@ -265,22 +265,22 @@ ctx->emit_instruction(ctx, &newInst); /* SUB t0.y, 1, t0.x; # d = 1 - d */ - tgsi_transform_op2_swz_inst(ctx, TGSI_OPCODE_SUB, + tgsi_transform_op2_swz_inst(ctx, TGSI_OPCODE_ADD, TGSI_FILE_TEMPORARY, tmp0, TGSI_WRITEMASK_Y, TGSI_FILE_INPUT, texInput, TGSI_SWIZZLE_W, - TGSI_FILE_TEMPORARY, tmp0, TGSI_SWIZZLE_X); + TGSI_FILE_TEMPORARY, tmp0, TGSI_SWIZZLE_X, true); /* MUL t0.w, t0.y, t0.z; # coverage = d * m */ tgsi_transform_op2_swz_inst(ctx, TGSI_OPCODE_MUL, TGSI_FILE_TEMPORARY, tmp0, TGSI_WRITEMASK_W, TGSI_FILE_TEMPORARY, tmp0, TGSI_SWIZZLE_Y, - TGSI_FILE_TEMPORARY, tmp0, TGSI_SWIZZLE_Z); + TGSI_FILE_TEMPORARY, tmp0, TGSI_SWIZZLE_Z, false); /* SLE t0.y, t0.x, tex.z; # bool b = distance <= k */ tgsi_transform_op2_swz_inst(ctx, TGSI_OPCODE_SLE, TGSI_FILE_TEMPORARY, tmp0, TGSI_WRITEMASK_Y, TGSI_FILE_TEMPORARY, tmp0, TGSI_SWIZZLE_X, - TGSI_FILE_INPUT, texInput, TGSI_SWIZZLE_Z); + TGSI_FILE_INPUT, texInput, TGSI_SWIZZLE_Z, false); /* CMP t0.w, -t0.y, tex.w, t0.w; * # if -t0.y < 0 then @@ -318,7 +318,7 @@ TGSI_FILE_OUTPUT, aactx->colorOutput, TGSI_WRITEMASK_W, TGSI_FILE_TEMPORARY, aactx->colorTemp, - TGSI_FILE_TEMPORARY, aactx->tmp0); + TGSI_FILE_TEMPORARY, aactx->tmp0, false); } diff -Nru mesa-12.0.6/src/gallium/auxiliary/draw/draw_pipe_clip.c mesa-17.0.7/src/gallium/auxiliary/draw/draw_pipe_clip.c --- mesa-12.0.6/src/gallium/auxiliary/draw/draw_pipe_clip.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/draw/draw_pipe_clip.c 2017-06-01 10:37:10.000000000 +0000 @@ -32,6 +32,7 @@ */ +#include "util/u_bitcast.h" #include "util/u_memory.h" #include "util/u_math.h" @@ -90,7 +91,7 @@ unsigned viewport_index_output = draw_current_shader_viewport_index_output(draw); unsigned viewport_index = - *((unsigned*)leading_vertex->data[viewport_index_output]); + u_bitcast_f2u(leading_vertex->data[viewport_index_output][0]); return draw_clamp_viewport_idx(viewport_index); } else { return 0; diff -Nru mesa-12.0.6/src/gallium/auxiliary/draw/draw_pipe_pstipple.c mesa-17.0.7/src/gallium/auxiliary/draw/draw_pipe_pstipple.c --- mesa-12.0.6/src/gallium/auxiliary/draw/draw_pipe_pstipple.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/draw/draw_pipe_pstipple.c 2017-06-01 10:37:10.000000000 +0000 @@ -99,12 +99,13 @@ void (*driver_bind_fs_state)(struct pipe_context *, void *); void (*driver_delete_fs_state)(struct pipe_context *, void *); - void (*driver_bind_sampler_states)(struct pipe_context *, unsigned, + void (*driver_bind_sampler_states)(struct pipe_context *, + enum pipe_shader_type, unsigned, unsigned, void **); void (*driver_set_sampler_views)(struct pipe_context *, - unsigned shader, unsigned start, - unsigned count, + enum pipe_shader_type shader, + unsigned start, unsigned count, struct pipe_sampler_view **); void (*driver_set_polygon_stipple)(struct pipe_context *, @@ -142,7 +143,7 @@ assert(pstip->fs->sampler_unit < PIPE_MAX_SAMPLERS); pstip->fs->pstip_fs = pstip->driver_create_fs_state(pipe, &pstip_fs); - + FREE((void *)pstip_fs.tokens); if (!pstip->fs->pstip_fs) @@ -195,7 +196,6 @@ stage->tri(stage, header); return; } - /* how many samplers? */ /* we'll use sampler/texture[pstip->sampler_unit] for the stipple */ @@ -374,7 +374,8 @@ static void -pstip_bind_sampler_states(struct pipe_context *pipe, unsigned shader, +pstip_bind_sampler_states(struct pipe_context *pipe, + enum pipe_shader_type shader, unsigned start, unsigned num, void **sampler) { struct pstip_stage *pstip = pstip_stage_from_pipe(pipe); @@ -398,7 +399,8 @@ static void pstip_set_sampler_views(struct pipe_context *pipe, - unsigned shader, unsigned start, unsigned num, + enum pipe_shader_type shader, + unsigned start, unsigned num, struct pipe_sampler_view **views) { struct pstip_stage *pstip = pstip_stage_from_pipe(pipe); diff -Nru mesa-12.0.6/src/gallium/auxiliary/draw/draw_private.h mesa-17.0.7/src/gallium/auxiliary/draw/draw_private.h --- mesa-12.0.6/src/gallium/auxiliary/draw/draw_private.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/draw/draw_private.h 2017-06-01 10:37:10.000000000 +0000 @@ -489,11 +489,10 @@ /** * Return index i from the index buffer. - * If the index buffer would overflow we return the - * maximum possible index. + * If the index buffer would overflow we return index 0. */ #define DRAW_GET_IDX(_elts, _i) \ - (((_i) >= draw->pt.user.eltMax) ? DRAW_MAX_FETCH_IDX : (_elts)[_i]) + (((_i) >= draw->pt.user.eltMax) ? 0 : (_elts)[_i]) /** * Return index of the given viewport clamping it @@ -515,7 +514,7 @@ unsigned overflow_value) { unsigned res = a + b; - if (res < a || res < b) { + if (res < a) { res = overflow_value; } return res; diff -Nru mesa-12.0.6/src/gallium/auxiliary/draw/draw_pt_fetch_shade_pipeline_llvm.c mesa-17.0.7/src/gallium/auxiliary/draw/draw_pt_fetch_shade_pipeline_llvm.c --- mesa-12.0.6/src/gallium/auxiliary/draw/draw_pt_fetch_shade_pipeline_llvm.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/draw/draw_pt_fetch_shade_pipeline_llvm.c 2017-06-01 10:37:10.000000000 +0000 @@ -353,7 +353,9 @@ const struct draw_prim_info *prim_info = in_prim_info; boolean free_prim_info = FALSE; unsigned opt = fpme->opt; - unsigned clipped = 0; + boolean clipped = 0; + unsigned start_or_maxelt, vid_base; + const unsigned *elts; llvm_vert_info.count = fetch_info->count; llvm_vert_info.vertex_size = fpme->vertex_size; @@ -373,29 +375,27 @@ draw->statistics.vs_invocations += fetch_info->count; } - if (fetch_info->linear) - clipped = fpme->current_variant->jit_func( &fpme->llvm->jit_context, - llvm_vert_info.verts, - draw->pt.user.vbuffer, - fetch_info->start, - fetch_info->count, - fpme->vertex_size, - draw->pt.vertex_buffer, - draw->instance_id, - draw->start_index, - draw->start_instance); - else - clipped = fpme->current_variant->jit_func_elts( &fpme->llvm->jit_context, - llvm_vert_info.verts, - draw->pt.user.vbuffer, - fetch_info->elts, - draw->pt.user.eltMax, - fetch_info->count, - fpme->vertex_size, - draw->pt.vertex_buffer, - draw->instance_id, - draw->pt.user.eltBias, - draw->start_instance); + if (fetch_info->linear) { + start_or_maxelt = fetch_info->start; + vid_base = draw->start_index; + elts = NULL; + } + else { + start_or_maxelt = draw->pt.user.eltMax; + vid_base = draw->pt.user.eltBias; + elts = fetch_info->elts; + } + clipped = fpme->current_variant->jit_func(&fpme->llvm->jit_context, + llvm_vert_info.verts, + draw->pt.user.vbuffer, + fetch_info->count, + start_or_maxelt, + fpme->vertex_size, + draw->pt.vertex_buffer, + draw->instance_id, + vid_base, + draw->start_instance, + elts); /* Finished with fetch and vs: */ diff -Nru mesa-12.0.6/src/gallium/auxiliary/draw/draw_pt_vsplit.c mesa-17.0.7/src/gallium/auxiliary/draw/draw_pt_vsplit.c --- mesa-12.0.6/src/gallium/auxiliary/draw/draw_pt_vsplit.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/draw/draw_pt_vsplit.c 2017-06-01 10:37:10.000000000 +0000 @@ -33,7 +33,7 @@ #define SEGMENT_SIZE 1024 #define MAP_SIZE 256 -/* The largest possible index withing an index buffer */ +/* The largest possible index within an index buffer */ #define MAX_ELT_IDX 0xffffffff struct vsplit_frontend { @@ -85,7 +85,7 @@ * Add a fetch element and add it to the draw elements. */ static inline void -vsplit_add_cache(struct vsplit_frontend *vsplit, unsigned fetch, unsigned ofbias) +vsplit_add_cache(struct vsplit_frontend *vsplit, unsigned fetch) { unsigned hash; @@ -93,7 +93,7 @@ /* If the value isn't in the cache or it's an overflow due to the * element bias */ - if (vsplit->cache.fetches[hash] != fetch || ofbias) { + if (vsplit->cache.fetches[hash] != fetch) { /* update cache */ vsplit->cache.fetches[hash] = fetch; vsplit->cache.draws[hash] = vsplit->cache.num_fetch_elts; @@ -108,67 +108,22 @@ /** * Returns the base index to the elements array. - * The value is checked for overflows (both integer overflows - * and the elements array overflow). + * The value is checked for integer overflow (not sure it can happen?). */ static inline unsigned -vsplit_get_base_idx(struct vsplit_frontend *vsplit, - unsigned start, unsigned fetch, unsigned *ofbit) +vsplit_get_base_idx(unsigned start, unsigned fetch) { - struct draw_context *draw = vsplit->draw; - unsigned elt_idx = draw_overflow_uadd(start, fetch, MAX_ELT_IDX); - if (ofbit) - *ofbit = 0; - - /* Overflown indices need to wrap to the first element - * in the index buffer */ - if (elt_idx >= draw->pt.user.eltMax) { - if (ofbit) - *ofbit = 1; - elt_idx = 0; - } - - return elt_idx; + return draw_overflow_uadd(start, fetch, MAX_ELT_IDX); } -/** - * Returns the element index adjust for the element bias. - * The final element index is created from the actual element - * index, plus the element bias, clamped to maximum elememt - * index if that addition overflows. +/* + * The final element index is just element index plus element bias. */ -static inline unsigned -vsplit_get_bias_idx(struct vsplit_frontend *vsplit, - int idx, int bias, unsigned *ofbias) -{ - int res = idx + bias; - - if (ofbias) - *ofbias = 0; - - if (idx > 0 && bias > 0) { - if (res < idx || res < bias) { - res = DRAW_MAX_FETCH_IDX; - if (ofbias) - *ofbias = 1; - } - } else if (idx < 0 && bias < 0) { - if (res > idx || res > bias) { - res = DRAW_MAX_FETCH_IDX; - if (ofbias) - *ofbias = 1; - } - } - - return res; -} - #define VSPLIT_CREATE_IDX(elts, start, fetch, elt_bias) \ unsigned elt_idx; \ - unsigned ofbit; \ - unsigned ofbias; \ - elt_idx = vsplit_get_base_idx(vsplit, start, fetch, &ofbit); \ - elt_idx = vsplit_get_bias_idx(vsplit, ofbit ? 0 : DRAW_GET_IDX(elts, elt_idx), elt_bias, &ofbias) + elt_idx = vsplit_get_base_idx(start, fetch); \ + elt_idx = (unsigned)((int)(DRAW_GET_IDX(elts, elt_idx)) + (int)elt_bias); + static inline void vsplit_add_cache_ubyte(struct vsplit_frontend *vsplit, const ubyte *elts, @@ -176,7 +131,13 @@ { struct draw_context *draw = vsplit->draw; VSPLIT_CREATE_IDX(elts, start, fetch, elt_bias); - vsplit_add_cache(vsplit, elt_idx, ofbias); + /* unlike the uint case this can only happen with elt_bias */ + if (elt_bias && elt_idx == DRAW_MAX_FETCH_IDX && !vsplit->cache.has_max_fetch) { + unsigned hash = fetch % MAP_SIZE; + vsplit->cache.fetches[hash] = 0; + vsplit->cache.has_max_fetch = TRUE; + } + vsplit_add_cache(vsplit, elt_idx); } static inline void @@ -185,7 +146,13 @@ { struct draw_context *draw = vsplit->draw; VSPLIT_CREATE_IDX(elts, start, fetch, elt_bias); - vsplit_add_cache(vsplit, elt_idx, ofbias); + /* unlike the uint case this can only happen with elt_bias */ + if (elt_bias && elt_idx == DRAW_MAX_FETCH_IDX && !vsplit->cache.has_max_fetch) { + unsigned hash = fetch % MAP_SIZE; + vsplit->cache.fetches[hash] = 0; + vsplit->cache.has_max_fetch = TRUE; + } + vsplit_add_cache(vsplit, elt_idx); } @@ -198,17 +165,15 @@ unsigned start, unsigned fetch, int elt_bias) { struct draw_context *draw = vsplit->draw; - unsigned raw_elem_idx = start + fetch + elt_bias; VSPLIT_CREATE_IDX(elts, start, fetch, elt_bias); - - /* special care for DRAW_MAX_FETCH_IDX */ - if (raw_elem_idx == DRAW_MAX_FETCH_IDX && !vsplit->cache.has_max_fetch) { + /* Take care for DRAW_MAX_FETCH_IDX (since cache is initialized to -1). */ + if (elt_idx == DRAW_MAX_FETCH_IDX && !vsplit->cache.has_max_fetch) { unsigned hash = fetch % MAP_SIZE; - vsplit->cache.fetches[hash] = raw_elem_idx - 1; /* force update */ + /* force update - any value will do except DRAW_MAX_FETCH_IDX */ + vsplit->cache.fetches[hash] = 0; vsplit->cache.has_max_fetch = TRUE; } - - vsplit_add_cache(vsplit, elt_idx, ofbias); + vsplit_add_cache(vsplit, elt_idx); } diff -Nru mesa-12.0.6/src/gallium/auxiliary/draw/draw_pt_vsplit_tmp.h mesa-17.0.7/src/gallium/auxiliary/draw/draw_pt_vsplit_tmp.h --- mesa-12.0.6/src/gallium/auxiliary/draw/draw_pt_vsplit_tmp.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/draw/draw_pt_vsplit_tmp.h 2017-06-01 10:37:10.000000000 +0000 @@ -49,9 +49,8 @@ /* If the index buffer overflows we'll need to run * through the normal paths */ - if (start >= draw->pt.user.eltMax || - end > draw->pt.user.eltMax || - end < istart || end < icount) + if (end >= draw->pt.user.eltMax || + end < istart) return FALSE; /* use the ib directly */ @@ -157,7 +156,7 @@ if (close) ADD_CACHE(vsplit, ib, 0, iclose, 0); } - else if (ibias > 0) { + else { if (spoken) ADD_CACHE(vsplit, ib, 0, ispoken, ibias); @@ -167,19 +166,6 @@ if (close) ADD_CACHE(vsplit, ib, 0, iclose, ibias); } - else { - if (spoken) { - ADD_CACHE(vsplit, ib, 0, ispoken, ibias); - } - - for (i = spoken; i < icount; i++) { - ADD_CACHE(vsplit, ib, istart, i, ibias); - } - - if (close) { - ADD_CACHE(vsplit, ib, 0, iclose, ibias); - } - } vsplit_flush_cache(vsplit, flags); } diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_arit.c mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_arit.c --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_arit.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_arit.c 2017-06-01 10:37:10.000000000 +0000 @@ -50,7 +50,6 @@ #include "util/u_memory.h" #include "util/u_debug.h" #include "util/u_math.h" -#include "util/u_string.h" #include "util/u_cpu_detect.h" #include "lp_bld_type.h" @@ -144,6 +143,20 @@ intr_size = 128; } } else if (HAVE_LLVM < 0x0309 && + util_cpu_caps.has_avx2 && type.length > 4) { + intr_size = 256; + switch (type.width) { + case 8: + intrinsic = type.sign ? "llvm.x86.avx2.pmins.b" : "llvm.x86.avx2.pminu.b"; + break; + case 16: + intrinsic = type.sign ? "llvm.x86.avx2.pmins.w" : "llvm.x86.avx2.pminu.w"; + break; + case 32: + intrinsic = type.sign ? "llvm.x86.avx2.pmins.d" : "llvm.x86.avx2.pminu.d"; + break; + } + } else if (HAVE_LLVM < 0x0309 && util_cpu_caps.has_sse2 && type.length >= 2) { intr_size = 128; if ((type.width == 8 || type.width == 16) && @@ -263,6 +276,28 @@ } +LLVMValueRef +lp_build_fmuladd(LLVMBuilderRef builder, + LLVMValueRef a, + LLVMValueRef b, + LLVMValueRef c) +{ + LLVMTypeRef type = LLVMTypeOf(a); + assert(type == LLVMTypeOf(b)); + assert(type == LLVMTypeOf(c)); + if (HAVE_LLVM < 0x0304) { + /* XXX: LLVM 3.3 does not breakdown llvm.fmuladd into mul+add when FMA is + * not supported, and instead it falls-back to a C function. + */ + return LLVMBuildFAdd(builder, LLVMBuildFMul(builder, a, b, ""), c, ""); + } + char intrinsic[32]; + lp_format_intrinsic(intrinsic, sizeof intrinsic, "llvm.fmuladd", type); + LLVMValueRef args[] = { a, b, c }; + return lp_build_intrinsic(builder, intrinsic, type, args, 3, 0); +} + + /** * Generate max(a, b) * No checks for special case values of a or b = 1 or 0 are done. @@ -326,6 +361,20 @@ intr_size = 128; } } else if (HAVE_LLVM < 0x0309 && + util_cpu_caps.has_avx2 && type.length > 4) { + intr_size = 256; + switch (type.width) { + case 8: + intrinsic = type.sign ? "llvm.x86.avx2.pmaxs.b" : "llvm.x86.avx2.pmaxu.b"; + break; + case 16: + intrinsic = type.sign ? "llvm.x86.avx2.pmaxs.w" : "llvm.x86.avx2.pmaxu.w"; + break; + case 32: + intrinsic = type.sign ? "llvm.x86.avx2.pmaxs.d" : "llvm.x86.avx2.pmaxu.d"; + break; + } + } else if (HAVE_LLVM < 0x0309 && util_cpu_caps.has_sse2 && type.length >= 2) { intr_size = 128; if ((type.width == 8 || type.width == 16) && @@ -505,18 +554,27 @@ if(a == bld->one || b == bld->one) return bld->one; - if (type.width * type.length == 128 && - !type.floating && !type.fixed) { - if(util_cpu_caps.has_sse2) { - if(type.width == 8) - intrinsic = type.sign ? "llvm.x86.sse2.padds.b" : "llvm.x86.sse2.paddus.b"; - if(type.width == 16) - intrinsic = type.sign ? "llvm.x86.sse2.padds.w" : "llvm.x86.sse2.paddus.w"; - } else if (util_cpu_caps.has_altivec) { - if(type.width == 8) - intrinsic = type.sign ? "llvm.ppc.altivec.vaddsbs" : "llvm.ppc.altivec.vaddubs"; - if(type.width == 16) - intrinsic = type.sign ? "llvm.ppc.altivec.vaddshs" : "llvm.ppc.altivec.vadduhs"; + if (!type.floating && !type.fixed) { + if (type.width * type.length == 128) { + if(util_cpu_caps.has_sse2) { + if(type.width == 8) + intrinsic = type.sign ? "llvm.x86.sse2.padds.b" : "llvm.x86.sse2.paddus.b"; + if(type.width == 16) + intrinsic = type.sign ? "llvm.x86.sse2.padds.w" : "llvm.x86.sse2.paddus.w"; + } else if (util_cpu_caps.has_altivec) { + if(type.width == 8) + intrinsic = type.sign ? "llvm.ppc.altivec.vaddsbs" : "llvm.ppc.altivec.vaddubs"; + if(type.width == 16) + intrinsic = type.sign ? "llvm.ppc.altivec.vaddshs" : "llvm.ppc.altivec.vadduhs"; + } + } + if (type.width * type.length == 256) { + if(util_cpu_caps.has_avx2) { + if(type.width == 8) + intrinsic = type.sign ? "llvm.x86.avx2.padds.b" : "llvm.x86.avx2.paddus.b"; + if(type.width == 16) + intrinsic = type.sign ? "llvm.x86.avx2.padds.w" : "llvm.x86.avx2.paddus.w"; + } } } @@ -797,18 +855,27 @@ if(b == bld->one) return bld->zero; - if (type.width * type.length == 128 && - !type.floating && !type.fixed) { - if (util_cpu_caps.has_sse2) { - if(type.width == 8) - intrinsic = type.sign ? "llvm.x86.sse2.psubs.b" : "llvm.x86.sse2.psubus.b"; - if(type.width == 16) - intrinsic = type.sign ? "llvm.x86.sse2.psubs.w" : "llvm.x86.sse2.psubus.w"; - } else if (util_cpu_caps.has_altivec) { - if(type.width == 8) - intrinsic = type.sign ? "llvm.ppc.altivec.vsubsbs" : "llvm.ppc.altivec.vsububs"; - if(type.width == 16) - intrinsic = type.sign ? "llvm.ppc.altivec.vsubshs" : "llvm.ppc.altivec.vsubuhs"; + if (!type.floating && !type.fixed) { + if (type.width * type.length == 128) { + if (util_cpu_caps.has_sse2) { + if(type.width == 8) + intrinsic = type.sign ? "llvm.x86.sse2.psubs.b" : "llvm.x86.sse2.psubus.b"; + if(type.width == 16) + intrinsic = type.sign ? "llvm.x86.sse2.psubs.w" : "llvm.x86.sse2.psubus.w"; + } else if (util_cpu_caps.has_altivec) { + if(type.width == 8) + intrinsic = type.sign ? "llvm.ppc.altivec.vsubsbs" : "llvm.ppc.altivec.vsububs"; + if(type.width == 16) + intrinsic = type.sign ? "llvm.ppc.altivec.vsubshs" : "llvm.ppc.altivec.vsubuhs"; + } + } + if (type.width * type.length == 256) { + if (util_cpu_caps.has_avx2) { + if(type.width == 8) + intrinsic = type.sign ? "llvm.x86.avx2.psubs.b" : "llvm.x86.avx2.psubus.b"; + if(type.width == 16) + intrinsic = type.sign ? "llvm.x86.avx2.psubs.w" : "llvm.x86.avx2.psubus.w"; + } } } @@ -979,14 +1046,14 @@ struct lp_type wide_type = lp_wider_type(type); LLVMValueRef al, ah, bl, bh, abl, abh, ab; - lp_build_unpack2(bld->gallivm, type, wide_type, a, &al, &ah); - lp_build_unpack2(bld->gallivm, type, wide_type, b, &bl, &bh); + lp_build_unpack2_native(bld->gallivm, type, wide_type, a, &al, &ah); + lp_build_unpack2_native(bld->gallivm, type, wide_type, b, &bl, &bh); /* PMULLW, PSRLW, PADDW */ abl = lp_build_mul_norm(bld->gallivm, wide_type, al, bl); abh = lp_build_mul_norm(bld->gallivm, wide_type, ah, bh); - ab = lp_build_pack2(bld->gallivm, wide_type, type, abl, abh); + ab = lp_build_pack2_native(bld->gallivm, wide_type, type, abl, abh); return ab; } @@ -1024,6 +1091,196 @@ return res; } +/* + * Widening mul, valid for 32x32 bit -> 64bit only. + * Result is low 32bits, high bits returned in res_hi. + * + * Emits code that is meant to be compiled for the host CPU. + */ +LLVMValueRef +lp_build_mul_32_lohi_cpu(struct lp_build_context *bld, + LLVMValueRef a, + LLVMValueRef b, + LLVMValueRef *res_hi) +{ + struct gallivm_state *gallivm = bld->gallivm; + LLVMBuilderRef builder = gallivm->builder; + + assert(bld->type.width == 32); + assert(bld->type.floating == 0); + assert(bld->type.fixed == 0); + assert(bld->type.norm == 0); + + /* + * XXX: for some reason, with zext/zext/mul/trunc the code llvm produces + * for x86 simd is atrocious (even if the high bits weren't required), + * trying to handle real 64bit inputs (which of course can't happen due + * to using 64bit umul with 32bit numbers zero-extended to 64bit, but + * apparently llvm does not recognize this widening mul). This includes 6 + * (instead of 2) pmuludq plus extra adds and shifts + * The same story applies to signed mul, albeit fixing this requires sse41. + * https://llvm.org/bugs/show_bug.cgi?id=30845 + * So, whip up our own code, albeit only for length 4 and 8 (which + * should be good enough)... + */ + if ((bld->type.length == 4 || bld->type.length == 8) && + ((util_cpu_caps.has_sse2 && (bld->type.sign == 0)) || + util_cpu_caps.has_sse4_1)) { + const char *intrinsic = NULL; + LLVMValueRef aeven, aodd, beven, bodd, muleven, mulodd; + LLVMValueRef shuf[LP_MAX_VECTOR_WIDTH / 32], shuf_vec; + struct lp_type type_wide = lp_wider_type(bld->type); + LLVMTypeRef wider_type = lp_build_vec_type(gallivm, type_wide); + unsigned i; + for (i = 0; i < bld->type.length; i += 2) { + shuf[i] = lp_build_const_int32(gallivm, i+1); + shuf[i+1] = LLVMGetUndef(LLVMInt32TypeInContext(gallivm->context)); + } + shuf_vec = LLVMConstVector(shuf, bld->type.length); + aeven = a; + beven = b; + aodd = LLVMBuildShuffleVector(builder, aeven, bld->undef, shuf_vec, ""); + bodd = LLVMBuildShuffleVector(builder, beven, bld->undef, shuf_vec, ""); + + if (util_cpu_caps.has_avx2 && bld->type.length == 8) { + if (bld->type.sign) { + intrinsic = "llvm.x86.avx2.pmul.dq"; + } else { + intrinsic = "llvm.x86.avx2.pmulu.dq"; + } + muleven = lp_build_intrinsic_binary(builder, intrinsic, + wider_type, aeven, beven); + mulodd = lp_build_intrinsic_binary(builder, intrinsic, + wider_type, aodd, bodd); + } + else { + /* for consistent naming look elsewhere... */ + if (bld->type.sign) { + intrinsic = "llvm.x86.sse41.pmuldq"; + } else { + intrinsic = "llvm.x86.sse2.pmulu.dq"; + } + /* + * XXX If we only have AVX but not AVX2 this is a pain. + * lp_build_intrinsic_binary_anylength() can't handle it + * (due to src and dst type not being identical). + */ + if (bld->type.length == 8) { + LLVMValueRef aevenlo, aevenhi, bevenlo, bevenhi; + LLVMValueRef aoddlo, aoddhi, boddlo, boddhi; + LLVMValueRef muleven2[2], mulodd2[2]; + struct lp_type type_wide_half = type_wide; + LLVMTypeRef wtype_half; + type_wide_half.length = 2; + wtype_half = lp_build_vec_type(gallivm, type_wide_half); + aevenlo = lp_build_extract_range(gallivm, aeven, 0, 4); + aevenhi = lp_build_extract_range(gallivm, aeven, 4, 4); + bevenlo = lp_build_extract_range(gallivm, beven, 0, 4); + bevenhi = lp_build_extract_range(gallivm, beven, 4, 4); + aoddlo = lp_build_extract_range(gallivm, aodd, 0, 4); + aoddhi = lp_build_extract_range(gallivm, aodd, 4, 4); + boddlo = lp_build_extract_range(gallivm, bodd, 0, 4); + boddhi = lp_build_extract_range(gallivm, bodd, 4, 4); + muleven2[0] = lp_build_intrinsic_binary(builder, intrinsic, + wtype_half, aevenlo, bevenlo); + mulodd2[0] = lp_build_intrinsic_binary(builder, intrinsic, + wtype_half, aoddlo, boddlo); + muleven2[1] = lp_build_intrinsic_binary(builder, intrinsic, + wtype_half, aevenhi, bevenhi); + mulodd2[1] = lp_build_intrinsic_binary(builder, intrinsic, + wtype_half, aoddhi, boddhi); + muleven = lp_build_concat(gallivm, muleven2, type_wide_half, 2); + mulodd = lp_build_concat(gallivm, mulodd2, type_wide_half, 2); + + } + else { + muleven = lp_build_intrinsic_binary(builder, intrinsic, + wider_type, aeven, beven); + mulodd = lp_build_intrinsic_binary(builder, intrinsic, + wider_type, aodd, bodd); + } + } + muleven = LLVMBuildBitCast(builder, muleven, bld->vec_type, ""); + mulodd = LLVMBuildBitCast(builder, mulodd, bld->vec_type, ""); + + for (i = 0; i < bld->type.length; i += 2) { + shuf[i] = lp_build_const_int32(gallivm, i + 1); + shuf[i+1] = lp_build_const_int32(gallivm, i + 1 + bld->type.length); + } + shuf_vec = LLVMConstVector(shuf, bld->type.length); + *res_hi = LLVMBuildShuffleVector(builder, muleven, mulodd, shuf_vec, ""); + + for (i = 0; i < bld->type.length; i += 2) { + shuf[i] = lp_build_const_int32(gallivm, i); + shuf[i+1] = lp_build_const_int32(gallivm, i + bld->type.length); + } + shuf_vec = LLVMConstVector(shuf, bld->type.length); + return LLVMBuildShuffleVector(builder, muleven, mulodd, shuf_vec, ""); + } + else { + return lp_build_mul_32_lohi(bld, a, b, res_hi); + } +} + + +/* + * Widening mul, valid for 32x32 bit -> 64bit only. + * Result is low 32bits, high bits returned in res_hi. + * + * Emits generic code. + */ +LLVMValueRef +lp_build_mul_32_lohi(struct lp_build_context *bld, + LLVMValueRef a, + LLVMValueRef b, + LLVMValueRef *res_hi) +{ + struct gallivm_state *gallivm = bld->gallivm; + LLVMBuilderRef builder = gallivm->builder; + LLVMValueRef tmp, shift, res_lo; + struct lp_type type_tmp; + LLVMTypeRef wide_type, narrow_type; + + type_tmp = bld->type; + narrow_type = lp_build_vec_type(gallivm, type_tmp); + type_tmp.width *= 2; + wide_type = lp_build_vec_type(gallivm, type_tmp); + shift = lp_build_const_vec(gallivm, type_tmp, 32); + + if (bld->type.sign) { + a = LLVMBuildSExt(builder, a, wide_type, ""); + b = LLVMBuildSExt(builder, b, wide_type, ""); + } else { + a = LLVMBuildZExt(builder, a, wide_type, ""); + b = LLVMBuildZExt(builder, b, wide_type, ""); + } + tmp = LLVMBuildMul(builder, a, b, ""); + + res_lo = LLVMBuildTrunc(builder, tmp, narrow_type, ""); + + /* Since we truncate anyway, LShr and AShr are equivalent. */ + tmp = LLVMBuildLShr(builder, tmp, shift, ""); + *res_hi = LLVMBuildTrunc(builder, tmp, narrow_type, ""); + + return res_lo; +} + + +/* a * b + c */ +LLVMValueRef +lp_build_mad(struct lp_build_context *bld, + LLVMValueRef a, + LLVMValueRef b, + LLVMValueRef c) +{ + const struct lp_type type = bld->type; + if (type.floating) { + return lp_build_fmuladd(bld->gallivm->builder, a, b, c); + } else { + return lp_build_add(bld, lp_build_mul(bld, a, b), c); + } +} + /** * Small vector x scale multiplication optimization. @@ -1155,6 +1412,11 @@ delta = lp_build_sub(bld, v1, v0); + if (bld->type.floating) { + assert(flags == 0); + return lp_build_mad(bld, x, delta, v0); + } + if (flags & LP_BLD_LERP_WIDE_NORMALIZED) { if (!bld->type.sign) { if (!(flags & LP_BLD_LERP_PRESCALED_WEIGHTS)) { @@ -1262,9 +1524,9 @@ lp_build_context_init(&wide_bld, bld->gallivm, wide_type); - lp_build_unpack2(bld->gallivm, type, wide_type, x, &xl, &xh); - lp_build_unpack2(bld->gallivm, type, wide_type, v0, &v0l, &v0h); - lp_build_unpack2(bld->gallivm, type, wide_type, v1, &v1l, &v1h); + lp_build_unpack2_native(bld->gallivm, type, wide_type, x, &xl, &xh); + lp_build_unpack2_native(bld->gallivm, type, wide_type, v0, &v0l, &v0h); + lp_build_unpack2_native(bld->gallivm, type, wide_type, v1, &v1l, &v1h); /* * Lerp both halves. @@ -1275,7 +1537,7 @@ resl = lp_build_lerp_simple(&wide_bld, xl, v0l, v1l, flags); resh = lp_build_lerp_simple(&wide_bld, xh, v0h, v1h, flags); - res = lp_build_pack2(bld->gallivm, wide_type, type, resl, resh); + res = lp_build_pack2_native(bld->gallivm, wide_type, type, resl, resh); } else { res = lp_build_lerp_simple(bld, x, v0, v1, flags); } @@ -1545,6 +1807,16 @@ return lp_build_intrinsic_unary(builder, "llvm.x86.ssse3.pabs.d.128", vec_type, a); } } + else if (type.width*type.length == 256 && util_cpu_caps.has_avx2) { + switch(type.width) { + case 8: + return lp_build_intrinsic_unary(builder, "llvm.x86.avx2.pabs.b", vec_type, a); + case 16: + return lp_build_intrinsic_unary(builder, "llvm.x86.avx2.pabs.w", vec_type, a); + case 32: + return lp_build_intrinsic_unary(builder, "llvm.x86.avx2.pabs.d", vec_type, a); + } + } else if (type.width*type.length == 256 && util_cpu_caps.has_ssse3 && (gallivm_debug & GALLIVM_DEBUG_PERF) && (type.width == 8 || type.width == 16 || type.width == 32)) { @@ -2719,23 +2991,10 @@ /* * The magic pass: "Extended precision modular arithmetic" * x = ((x - y * DP1) - y * DP2) - y * DP3; - * xmm1 = _mm_mul_ps(y, xmm1); - * xmm2 = _mm_mul_ps(y, xmm2); - * xmm3 = _mm_mul_ps(y, xmm3); - */ - LLVMValueRef xmm1 = LLVMBuildFMul(b, y_2, DP1, "xmm1"); - LLVMValueRef xmm2 = LLVMBuildFMul(b, y_2, DP2, "xmm2"); - LLVMValueRef xmm3 = LLVMBuildFMul(b, y_2, DP3, "xmm3"); - - /* - * x = _mm_add_ps(x, xmm1); - * x = _mm_add_ps(x, xmm2); - * x = _mm_add_ps(x, xmm3); */ - - LLVMValueRef x_1 = LLVMBuildFAdd(b, x_abs, xmm1, "x_1"); - LLVMValueRef x_2 = LLVMBuildFAdd(b, x_1, xmm2, "x_2"); - LLVMValueRef x_3 = LLVMBuildFAdd(b, x_2, xmm3, "x_3"); + LLVMValueRef x_1 = lp_build_fmuladd(b, y_2, DP1, x_abs); + LLVMValueRef x_2 = lp_build_fmuladd(b, y_2, DP2, x_1); + LLVMValueRef x_3 = lp_build_fmuladd(b, y_2, DP3, x_2); /* * Evaluate the first polynom (0 <= x <= Pi/4) @@ -2757,10 +3016,8 @@ * y = *(v4sf*)_ps_coscof_p0; * y = _mm_mul_ps(y, z); */ - LLVMValueRef y_3 = LLVMBuildFMul(b, z, coscof_p0, "y_3"); - LLVMValueRef y_4 = LLVMBuildFAdd(b, y_3, coscof_p1, "y_4"); - LLVMValueRef y_5 = LLVMBuildFMul(b, y_4, z, "y_5"); - LLVMValueRef y_6 = LLVMBuildFAdd(b, y_5, coscof_p2, "y_6"); + LLVMValueRef y_4 = lp_build_fmuladd(b, z, coscof_p0, coscof_p1); + LLVMValueRef y_6 = lp_build_fmuladd(b, y_4, z, coscof_p2); LLVMValueRef y_7 = LLVMBuildFMul(b, y_6, z, "y_7"); LLVMValueRef y_8 = LLVMBuildFMul(b, y_7, z, "y_8"); @@ -2798,13 +3055,10 @@ * y2 = _mm_add_ps(y2, x); */ - LLVMValueRef y2_3 = LLVMBuildFMul(b, z, sincof_p0, "y2_3"); - LLVMValueRef y2_4 = LLVMBuildFAdd(b, y2_3, sincof_p1, "y2_4"); - LLVMValueRef y2_5 = LLVMBuildFMul(b, y2_4, z, "y2_5"); - LLVMValueRef y2_6 = LLVMBuildFAdd(b, y2_5, sincof_p2, "y2_6"); + LLVMValueRef y2_4 = lp_build_fmuladd(b, z, sincof_p0, sincof_p1); + LLVMValueRef y2_6 = lp_build_fmuladd(b, y2_4, z, sincof_p2); LLVMValueRef y2_7 = LLVMBuildFMul(b, y2_6, z, "y2_7"); - LLVMValueRef y2_8 = LLVMBuildFMul(b, y2_7, x_3, "y2_8"); - LLVMValueRef y2_9 = LLVMBuildFAdd(b, y2_8, x_3, "y2_9"); + LLVMValueRef y2_9 = lp_build_fmuladd(b, y2_7, x_3, x_3); /* * select the correct result from the two polynoms @@ -2971,19 +3225,19 @@ if (i % 2 == 0) { if (even) - even = lp_build_add(bld, coeff, lp_build_mul(bld, x2, even)); + even = lp_build_mad(bld, x2, even, coeff); else even = coeff; } else { if (odd) - odd = lp_build_add(bld, coeff, lp_build_mul(bld, x2, odd)); + odd = lp_build_mad(bld, x2, odd, coeff); else odd = coeff; } } if (odd) - return lp_build_add(bld, lp_build_mul(bld, odd, x), even); + return lp_build_mad(bld, odd, x, even); else if (even) return even; else @@ -3214,7 +3468,7 @@ LLVMValueRef exp = NULL; LLVMValueRef mant = NULL; LLVMValueRef logexp = NULL; - LLVMValueRef logmant = NULL; + LLVMValueRef p_z = NULL; LLVMValueRef res = NULL; assert(lp_check_value(bld->type, x)); @@ -3263,13 +3517,11 @@ z = lp_build_mul(bld, y, y); /* compute P(z) */ - logmant = lp_build_polynomial(bld, z, lp_build_log2_polynomial, - ARRAY_SIZE(lp_build_log2_polynomial)); - - /* logmant = y * P(z) */ - logmant = lp_build_mul(bld, y, logmant); + p_z = lp_build_polynomial(bld, z, lp_build_log2_polynomial, + ARRAY_SIZE(lp_build_log2_polynomial)); - res = lp_build_add(bld, logmant, logexp); + /* y * P(z) + logexp */ + res = lp_build_mad(bld, y, p_z, logexp); if (type.floating && handle_edge_cases) { LLVMValueRef negmask, infmask, zmask; diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_arit.h mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_arit.h --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_arit.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_arit.h 2017-06-01 10:37:10.000000000 +0000 @@ -77,6 +77,18 @@ LLVMValueRef b); LLVMValueRef +lp_build_mul_32_lohi_cpu(struct lp_build_context *bld, + LLVMValueRef a, + LLVMValueRef b, + LLVMValueRef *res_hi); + +LLVMValueRef +lp_build_mul_32_lohi(struct lp_build_context *bld, + LLVMValueRef a, + LLVMValueRef b, + LLVMValueRef *res_hi); + +LLVMValueRef lp_build_mul_imm(struct lp_build_context *bld, LLVMValueRef a, int b); @@ -87,6 +99,21 @@ LLVMValueRef b); +/* llvm.fmuladd.* intrinsic */ +LLVMValueRef +lp_build_fmuladd(LLVMBuilderRef builder, + LLVMValueRef a, + LLVMValueRef b, + LLVMValueRef c); + +/* a * b + c */ +LLVMValueRef +lp_build_mad(struct lp_build_context *bld, + LLVMValueRef a, + LLVMValueRef b, + LLVMValueRef c); + + /** * Set when the weights for normalized are prescaled, that is, in range * 0..2**n, as opposed to range 0..2**(n-1). diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_arit_overflow.c mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_arit_overflow.c --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_arit_overflow.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_arit_overflow.c 2017-06-01 10:37:10.000000000 +0000 @@ -127,6 +127,30 @@ } /** + * Performs unsigned subtraction of two integers and reports + * overflow if detected. + * + * The values @a and @b must be of the same integer type. If + * an overflow is detected the IN/OUT @ofbit parameter is used: + * - if it's pointing to a null value, the overflow bit is simply + * stored inside the variable it's pointing to, + * - if it's pointing to a valid value, then that variable, + * which must be of i1 type, is ORed with the newly detected + * overflow bit. This is done to allow chaining of a number of + * overflow functions together without having to test the + * overflow bit after every single one. + */ +LLVMValueRef +lp_build_usub_overflow(struct gallivm_state *gallivm, + LLVMValueRef a, + LLVMValueRef b, + LLVMValueRef *ofbit) +{ + return build_binary_int_overflow(gallivm, "llvm.usub.with.overflow", + a, b, ofbit); +} + +/** * Performs unsigned multiplication of two integers and * reports overflow if detected. * diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_arit_overflow.h mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_arit_overflow.h --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_arit_overflow.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_arit_overflow.h 2017-06-01 10:37:10.000000000 +0000 @@ -49,6 +49,12 @@ LLVMValueRef *ofbit); LLVMValueRef +lp_build_usub_overflow(struct gallivm_state *gallivm, + LLVMValueRef a, + LLVMValueRef b, + LLVMValueRef *ofbit); + +LLVMValueRef lp_build_umul_overflow(struct gallivm_state *gallivm, LLVMValueRef a, LLVMValueRef b, diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_conv.c mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_conv.c --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_conv.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_conv.c 2017-06-01 10:37:10.000000000 +0000 @@ -311,7 +311,7 @@ * important, we also get exact results for 0.0 and 1.0. */ - unsigned n = MIN2(src_type.width - 1, dst_width); + unsigned n = MIN2(src_type.width - 1u, dst_width); double scale = (double)(1ULL << n); unsigned lshift = dst_width - n; @@ -445,7 +445,7 @@ unsigned num_srcs, LLVMValueRef *dst) { - int i; + unsigned i; int num_dsts = num_srcs; if (src_type.floating == dst_type->floating && @@ -456,21 +456,21 @@ src_type.sign == dst_type->sign) return num_dsts; - /* Special case 4x4f -> 1x16ub or 2x8f -> 1x16ub + /* Special case 4x4x32 -> 1x16x8 or 2x8x32 -> 1x16x8 */ - if (src_type.floating == 1 && - src_type.fixed == 0 && - src_type.sign == 1 && - src_type.norm == 0 && + if (src_type.norm == 0 && src_type.width == 32 && + src_type.fixed == 0 && dst_type->floating == 0 && dst_type->fixed == 0 && - dst_type->sign == 0 && - dst_type->norm == 1 && - dst_type->width == 8) - { - /* Special case 4x4f --> 1x16ub */ + dst_type->width == 8 && + + ((src_type.floating == 1 && src_type.sign == 1 && dst_type->norm == 1) || + (src_type.floating == 0 && dst_type->floating == 0 && + src_type.sign == dst_type->sign && dst_type->norm == 0))) { + + /* Special case 4x4x32 --> 1x16x8 */ if (src_type.length == 4 && (util_cpu_caps.has_sse2 || util_cpu_caps.has_altivec)) { @@ -481,7 +481,7 @@ return num_dsts; } - /* Special case 2x8f --> 1x16ub */ + /* Special case 2x8x32 --> 1x16x8 */ if (src_type.length == 8 && util_cpu_caps.has_avx) { @@ -497,8 +497,25 @@ if (src_type.width == dst_type->width) { lp_build_conv(gallivm, src_type, *dst_type, src, num_srcs, dst, num_dsts); } else { - for (i = 0; i < num_srcs; ++i) { - lp_build_conv(gallivm, src_type, *dst_type, &src[i], 1, &dst[i], 1); + /* + * If dst_width is 16 bits and src_width 32 and the dst vector size + * 64bit, try feeding 2 vectors at once so pack intrinsics can be used. + * (For AVX, this isn't needed, since we usually get 256bit src and + * 128bit dst vectors which works ok. If we do AVX2 pack this should + * be extended but need to be able to tell conversion code about pack + * ordering first.) + */ + unsigned ratio = 1; + if (src_type.width == 2 * dst_type->width && + src_type.length == dst_type->length && + dst_type->floating == 0 && (num_srcs % 2 == 0) && + dst_type->width * dst_type->length == 64) { + ratio = 2; + num_dsts /= 2; + dst_type->length *= 2; + } + for (i = 0; i < num_dsts; i++) { + lp_build_conv(gallivm, src_type, *dst_type, &src[i*ratio], ratio, &dst[i], 1); } } @@ -541,21 +558,25 @@ num_tmps = num_srcs; - /* Special case 4x4f --> 1x16ub, 2x4f -> 1x8ub, 1x4f -> 1x4ub + /* + * Special case 4x4x32 --> 1x16x8, 2x4x32 -> 1x8x8, 1x4x32 -> 1x4x8 + * Only float -> s/unorm8 and (u)int32->(u)int8. + * XXX: This should cover all interesting backend cases for 8 bit, + * but should use same strategy if dst is 16 bit. */ - if (src_type.floating == 1 && - src_type.fixed == 0 && - src_type.sign == 1 && - src_type.norm == 0 && + if (src_type.norm == 0 && src_type.width == 32 && src_type.length == 4 && + src_type.fixed == 0 && dst_type.floating == 0 && dst_type.fixed == 0 && - dst_type.sign == 0 && - dst_type.norm == 1 && dst_type.width == 8 && + ((src_type.floating == 1 && src_type.sign == 1 && dst_type.norm == 1) || + (src_type.floating == 0 && dst_type.floating == 0 && + src_type.sign == dst_type.sign && dst_type.norm == 0)) && + ((dst_type.length == 16 && 4 * num_dsts == num_srcs) || (num_dsts == 1 && dst_type.length * num_srcs == 16 && num_srcs != 3)) && @@ -564,7 +585,7 @@ struct lp_build_context bld; struct lp_type int16_type, int32_type; struct lp_type dst_type_ext = dst_type; - LLVMValueRef const_255f; + LLVMValueRef const_scale; unsigned i, j; lp_build_context_init(&bld, gallivm, src_type); @@ -580,14 +601,54 @@ int32_type.length /= 4; int32_type.sign = 1; - const_255f = lp_build_const_vec(gallivm, src_type, 255.0f); + const_scale = lp_build_const_vec(gallivm, src_type, lp_const_scale(dst_type)); for (i = 0; i < num_dsts; ++i, src += 4) { LLVMValueRef lo, hi; - for (j = 0; j < dst_type.length / 4; ++j) { - tmp[j] = LLVMBuildFMul(builder, src[j], const_255f, ""); - tmp[j] = lp_build_iround(&bld, tmp[j]); + if (src_type.floating) { + for (j = 0; j < dst_type.length / 4; ++j) { + /* + * XXX This is not actually fully correct. The float to int + * conversion will produce 0x80000000 value for everything + * out of range and NaNs (on x86, llvm.x86.sse2.cvtps2dq). + * Hence, NaNs and negatives will get clamped just fine to zero + * (relying on clamping pack behavior) when converting to unorm, + * however too large values (both finite and infinite) will also + * end up as zero, not 255. + * For snorm, for now we'll keep bug compatibility with generic + * conversion path (meaning too large values are fine, but + * NaNs get converted to -128 (purely by luck, as we don't + * specify nan behavior for the max there) instead of 0). + */ + if (dst_type.sign) { + tmp[j] = lp_build_min(&bld, bld.one, src[j]); + + } + else { + if (0) { + tmp[j] = lp_build_min_ext(&bld, bld.one, src[j], + GALLIVM_NAN_RETURN_NAN_FIRST_NONNAN); + } + tmp[j] = src[j]; + } + tmp[j] = LLVMBuildFMul(builder, tmp[j], const_scale, ""); + tmp[j] = lp_build_iround(&bld, tmp[j]); + } + } else { + for (j = 0; j < dst_type.length / 4; ++j) { + if (!dst_type.sign) { + /* + * Pack clamp is always signed->unsigned (or signed->signed). + * Hence need min. + */ + LLVMValueRef const_max; + const_max = lp_build_const_int_vec(gallivm, src_type, 255); + tmp[j] = lp_build_min(&bld, src[j], const_max); + } else { + tmp[j] = src[j]; + } + } } if (num_srcs == 1) { @@ -612,20 +673,20 @@ return; } - /* Special case 2x8f --> 1x16ub, 1x8f ->1x8ub + /* Special case 2x8x32 --> 1x16x8, 1x8x32 ->1x8x8 */ - else if (src_type.floating == 1 && - src_type.fixed == 0 && - src_type.sign == 1 && - src_type.norm == 0 && - src_type.width == 32 && - src_type.length == 8 && - - dst_type.floating == 0 && - dst_type.fixed == 0 && - dst_type.sign == 0 && - dst_type.norm == 1 && - dst_type.width == 8 && + else if (src_type.norm == 0 && + src_type.width == 32 && + src_type.length == 8 && + src_type.fixed == 0 && + + dst_type.floating == 0 && + dst_type.fixed == 0 && + dst_type.width == 8 && + + ((src_type.floating == 1 && src_type.sign == 1 && dst_type.norm == 1) || + (src_type.floating == 0 && dst_type.floating == 0 && + src_type.sign == dst_type.sign && dst_type.norm == 0)) && ((dst_type.length == 16 && 2 * num_dsts == num_srcs) || (num_dsts == 1 && dst_type.length * num_srcs == 8)) && @@ -635,7 +696,7 @@ struct lp_build_context bld; struct lp_type int16_type, int32_type; struct lp_type dst_type_ext = dst_type; - LLVMValueRef const_255f; + LLVMValueRef const_scale; unsigned i; lp_build_context_init(&bld, gallivm, src_type); @@ -651,30 +712,44 @@ int32_type.length /= 4; int32_type.sign = 1; - const_255f = lp_build_const_vec(gallivm, src_type, 255.0f); + const_scale = lp_build_const_vec(gallivm, src_type, lp_const_scale(dst_type)); for (i = 0; i < num_dsts; ++i, src += 2) { - LLVMValueRef lo, hi, a, b; - - a = LLVMBuildFMul(builder, src[0], const_255f, ""); - a = lp_build_iround(&bld, a); - tmp[0] = lp_build_extract_range(gallivm, a, 0, 4); - tmp[1] = lp_build_extract_range(gallivm, a, 4, 4); - /* relying on clamping behavior of sse2 intrinsics here */ - lo = lp_build_pack2(gallivm, int32_type, int16_type, tmp[0], tmp[1]); - - if (num_srcs == 1) { - hi = lo; + unsigned j; + for (j = 0; j < (num_srcs == 1 ? 1 : 2); j++) { + LLVMValueRef lo, hi, a; + + a = src[j]; + if (src_type.floating) { + if (dst_type.sign) { + a = lp_build_min(&bld, bld.one, a); + + } + else { + if (0) { + a = lp_build_min_ext(&bld, bld.one, a, + GALLIVM_NAN_RETURN_NAN_FIRST_NONNAN); + } + } + a = LLVMBuildFMul(builder, a, const_scale, ""); + a = lp_build_iround(&bld, a); + } else { + if (!dst_type.sign) { + LLVMValueRef const_max; + const_max = lp_build_const_int_vec(gallivm, src_type, 255); + a = lp_build_min(&bld, a, const_max); + } + } + lo = lp_build_extract_range(gallivm, a, 0, 4); + hi = lp_build_extract_range(gallivm, a, 4, 4); + /* relying on clamping behavior of sse2 intrinsics here */ + tmp[j] = lp_build_pack2(gallivm, int32_type, int16_type, lo, hi); } - else { - b = LLVMBuildFMul(builder, src[1], const_255f, ""); - b = lp_build_iround(&bld, b); - tmp[2] = lp_build_extract_range(gallivm, b, 0, 4); - tmp[3] = lp_build_extract_range(gallivm, b, 4, 4); - hi = lp_build_pack2(gallivm, int32_type, int16_type, tmp[2], tmp[3]); + if (num_srcs == 1) { + tmp[1] = tmp[0]; } - dst[i] = lp_build_pack2(gallivm, int16_type, dst_type_ext, lo, hi); + dst[i] = lp_build_pack2(gallivm, int16_type, dst_type_ext, tmp[0], tmp[1]); } if (num_srcs == 1) { @@ -841,6 +916,10 @@ new_type.width = dst_type.width; new_type.length = dst_type.length; + /* + * Note that resize when using packs can sometimes get min/max + * clamping for free. Should be able to exploit this... + */ lp_build_resize(gallivm, tmp_type, new_type, tmp, num_srcs, tmp, num_dsts); tmp_type = new_type; diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_flow.c mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_flow.c --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_flow.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_flow.c 2017-06-01 10:37:10.000000000 +0000 @@ -454,6 +454,26 @@ } +static LLVMBuilderRef +create_builder_at_entry(struct gallivm_state *gallivm) +{ + LLVMBuilderRef builder = gallivm->builder; + LLVMBasicBlockRef current_block = LLVMGetInsertBlock(builder); + LLVMValueRef function = LLVMGetBasicBlockParent(current_block); + LLVMBasicBlockRef first_block = LLVMGetEntryBasicBlock(function); + LLVMValueRef first_instr = LLVMGetFirstInstruction(first_block); + LLVMBuilderRef first_builder = LLVMCreateBuilderInContext(gallivm->context); + + if (first_instr) { + LLVMPositionBuilderBefore(first_builder, first_instr); + } else { + LLVMPositionBuilderAtEnd(first_builder, first_block); + } + + return first_builder; +} + + /** * Allocate a scalar (or vector) variable. * @@ -475,19 +495,9 @@ const char *name) { LLVMBuilderRef builder = gallivm->builder; - LLVMBasicBlockRef current_block = LLVMGetInsertBlock(builder); - LLVMValueRef function = LLVMGetBasicBlockParent(current_block); - LLVMBasicBlockRef first_block = LLVMGetEntryBasicBlock(function); - LLVMValueRef first_instr = LLVMGetFirstInstruction(first_block); - LLVMBuilderRef first_builder = LLVMCreateBuilderInContext(gallivm->context); + LLVMBuilderRef first_builder = create_builder_at_entry(gallivm); LLVMValueRef res; - if (first_instr) { - LLVMPositionBuilderBefore(first_builder, first_instr); - } else { - LLVMPositionBuilderAtEnd(first_builder, first_block); - } - res = LLVMBuildAlloca(first_builder, type, name); LLVMBuildStore(builder, LLVMConstNull(type), res); @@ -498,6 +508,25 @@ /** + * Like lp_build_alloca, but do not zero-initialize the variable. + */ +LLVMValueRef +lp_build_alloca_undef(struct gallivm_state *gallivm, + LLVMTypeRef type, + const char *name) +{ + LLVMBuilderRef first_builder = create_builder_at_entry(gallivm); + LLVMValueRef res; + + res = LLVMBuildAlloca(first_builder, type, name); + + LLVMDisposeBuilder(first_builder); + + return res; +} + + +/** * Allocate an array of scalars/vectors. * * mem2reg pass is not capable of promoting structs or arrays to registers, but @@ -517,20 +546,9 @@ LLVMValueRef count, const char *name) { - LLVMBuilderRef builder = gallivm->builder; - LLVMBasicBlockRef current_block = LLVMGetInsertBlock(builder); - LLVMValueRef function = LLVMGetBasicBlockParent(current_block); - LLVMBasicBlockRef first_block = LLVMGetEntryBasicBlock(function); - LLVMValueRef first_instr = LLVMGetFirstInstruction(first_block); - LLVMBuilderRef first_builder = LLVMCreateBuilderInContext(gallivm->context); + LLVMBuilderRef first_builder = create_builder_at_entry(gallivm); LLVMValueRef res; - if (first_instr) { - LLVMPositionBuilderBefore(first_builder, first_instr); - } else { - LLVMPositionBuilderAtEnd(first_builder, first_block); - } - res = LLVMBuildArrayAlloca(first_builder, type, count, name); LLVMDisposeBuilder(first_builder); diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_flow.h mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_flow.h --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_flow.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_flow.h 2017-06-01 10:37:10.000000000 +0000 @@ -196,6 +196,11 @@ const char *name); LLVMValueRef +lp_build_alloca_undef(struct gallivm_state *gallivm, + LLVMTypeRef type, + const char *name); + +LLVMValueRef lp_build_array_alloca(struct gallivm_state *gallivm, LLVMTypeRef type, LLVMValueRef count, diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_format_aos_array.c mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_format_aos_array.c --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_format_aos_array.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_format_aos_array.c 2017-06-01 10:37:10.000000000 +0000 @@ -70,7 +70,14 @@ src_vec_type = lp_build_vec_type(gallivm, src_type); - /* Read whole vector from memory, unaligned */ + /* + * Read whole vector from memory, unaligned. + * XXX: Note it's actually aligned to element type. Not sure if all + * callers are able to guarantee that (whereas for others, we should + * be able to use full alignment when there's 2 or 4 channels). + * (If all callers can guarantee element type alignment, we should + * relax alignment restrictions elsewhere.) + */ ptr = LLVMBuildGEP(builder, base_ptr, &offset, 1, ""); ptr = LLVMBuildPointerCast(builder, ptr, LLVMPointerType(src_vec_type, 0), ""); res = LLVMBuildLoad(builder, ptr, ""); diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_format_aos.c mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_format_aos.c --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_format_aos.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_format_aos.c 2017-06-01 10:37:10.000000000 +0000 @@ -38,6 +38,7 @@ #include "util/u_math.h" #include "util/u_pointer.h" #include "util/u_string.h" +#include "util/u_cpu_detect.h" #include "lp_bld_arit.h" #include "lp_bld_init.h" @@ -49,7 +50,10 @@ #include "lp_bld_gather.h" #include "lp_bld_debug.h" #include "lp_bld_format.h" +#include "lp_bld_pack.h" #include "lp_bld_intr.h" +#include "lp_bld_logic.h" +#include "lp_bld_bitarit.h" /** @@ -137,6 +141,73 @@ return TRUE; } +/* + * Do rounding when converting small unorm values to larger ones. + * Not quite 100% accurate, as it's done by appending MSBs, but + * should be good enough. + */ + +static inline LLVMValueRef +scale_bits_up(struct gallivm_state *gallivm, + int src_bits, + int dst_bits, + LLVMValueRef src, + struct lp_type src_type) +{ + LLVMBuilderRef builder = gallivm->builder; + LLVMValueRef result = src; + + if (src_bits == 1 && dst_bits > 1) { + /* + * Useful for a1 - we'd need quite some repeated copies otherwise. + */ + struct lp_build_context bld; + LLVMValueRef dst_mask; + lp_build_context_init(&bld, gallivm, src_type); + dst_mask = lp_build_const_int_vec(gallivm, src_type, + (1 << dst_bits) - 1), + result = lp_build_cmp(&bld, PIPE_FUNC_EQUAL, src, + lp_build_const_int_vec(gallivm, src_type, 0)); + result = lp_build_andnot(&bld, dst_mask, result); + } + else if (dst_bits > src_bits) { + /* Scale up bits */ + int db = dst_bits - src_bits; + + /* Shift left by difference in bits */ + result = LLVMBuildShl(builder, + src, + lp_build_const_int_vec(gallivm, src_type, db), + ""); + + if (db <= src_bits) { + /* Enough bits in src to fill the remainder */ + LLVMValueRef lower = LLVMBuildLShr(builder, + src, + lp_build_const_int_vec(gallivm, src_type, + src_bits - db), + ""); + + result = LLVMBuildOr(builder, result, lower, ""); + } else if (db > src_bits) { + /* Need to repeatedly copy src bits to fill remainder in dst */ + unsigned n; + + for (n = src_bits; n < dst_bits; n *= 2) { + LLVMValueRef shuv = lp_build_const_int_vec(gallivm, src_type, n); + + result = LLVMBuildOr(builder, + result, + LLVMBuildLShr(builder, result, shuv, ""), + ""); + } + } + } else { + assert (dst_bits == src_bits); + } + + return result; +} /** * Unpack a single pixel into its XYZW components. @@ -156,6 +227,7 @@ LLVMValueRef shifts[4]; LLVMValueRef masks[4]; LLVMValueRef scales[4]; + LLVMTypeRef vec32_type; boolean normalized; boolean needs_uitofp; @@ -171,19 +243,17 @@ * matches floating point size */ assert (LLVMTypeOf(packed) == LLVMInt32TypeInContext(gallivm->context)); + vec32_type = LLVMVectorType(LLVMInt32TypeInContext(gallivm->context), 4); + /* Broadcast the packed value to all four channels * before: packed = BGRA * after: packed = {BGRA, BGRA, BGRA, BGRA} */ - packed = LLVMBuildInsertElement(builder, - LLVMGetUndef(LLVMVectorType(LLVMInt32TypeInContext(gallivm->context), 4)), - packed, + packed = LLVMBuildInsertElement(builder, LLVMGetUndef(vec32_type), packed, LLVMConstNull(LLVMInt32TypeInContext(gallivm->context)), ""); - packed = LLVMBuildShuffleVector(builder, - packed, - LLVMGetUndef(LLVMVectorType(LLVMInt32TypeInContext(gallivm->context), 4)), - LLVMConstNull(LLVMVectorType(LLVMInt32TypeInContext(gallivm->context), 4)), + packed = LLVMBuildShuffleVector(builder, packed, LLVMGetUndef(vec32_type), + LLVMConstNull(vec32_type), ""); /* Initialize vector constants */ @@ -224,8 +294,40 @@ /* Ex: convert packed = {XYZW, XYZW, XYZW, XYZW} * into masked = {X, Y, Z, W} */ - shifted = LLVMBuildLShr(builder, packed, LLVMConstVector(shifts, 4), ""); - masked = LLVMBuildAnd(builder, shifted, LLVMConstVector(masks, 4), ""); + if (desc->block.bits < 32 && normalized) { + /* + * Note: we cannot do the shift below on x86 natively until AVX2. + * + * Old llvm versions will resort to scalar extract/shift insert, + * which is definitely terrible, new versions will just do + * several vector shifts and shuffle/blend results together. + * We could turn this into a variable left shift plus a constant + * right shift, and llvm would then turn the variable left shift + * into a mul for us (albeit without sse41 the mul needs emulation + * too...). However, since we're going to do a float mul + * anyway, we just adjust that mul instead (plus the mask), skipping + * the shift completely. + * We could also use a extra mul when the format isn't normalized and + * we don't have AVX2 support, but don't bother for now. Unfortunately, + * this strategy doesn't work for 32bit formats (such as rgb10a2 or even + * rgba8 if it ends up here), as that would require UIToFP, albeit that + * would be fixable with easy 16bit shuffle (unless there's channels + * crossing 16bit boundaries). + */ + for (i = 0; i < 4; ++i) { + if (desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) { + unsigned bits = desc->channel[i].size; + unsigned shift = desc->channel[i].shift; + unsigned long long mask = ((1ULL << bits) - 1) << shift; + scales[i] = lp_build_const_float(gallivm, 1.0 / mask); + masks[i] = lp_build_const_int32(gallivm, mask); + } + } + masked = LLVMBuildAnd(builder, packed, LLVMConstVector(masks, 4), ""); + } else { + shifted = LLVMBuildLShr(builder, packed, LLVMConstVector(shifts, 4), ""); + masked = LLVMBuildAnd(builder, shifted, LLVMConstVector(masks, 4), ""); + } if (!needs_uitofp) { /* UIToFP can't be expressed in SSE2 */ @@ -234,8 +336,10 @@ casted = LLVMBuildUIToFP(builder, masked, LLVMVectorType(LLVMFloatTypeInContext(gallivm->context), 4), ""); } - /* At this point 'casted' may be a vector of floats such as - * {255.0, 255.0, 255.0, 255.0}. Next, if the pixel values are normalized + /* + * At this point 'casted' may be a vector of floats such as + * {255.0, 255.0, 255.0, 255.0}. (Normalized values may be multiplied + * by powers of two). Next, if the pixel values are normalized * we'll scale this to {1.0, 1.0, 1.0, 1.0}. */ @@ -391,9 +495,11 @@ if (format_matches_type(format_desc, type) && format_desc->block.bits <= type.width * 4 && + /* XXX this shouldn't be needed */ util_is_power_of_two(format_desc->block.bits)) { LLVMValueRef packed; LLVMTypeRef dst_vec_type = lp_build_vec_type(gallivm, type); + struct lp_type fetch_type; unsigned vec_len = type.width * type.length; /* @@ -401,8 +507,9 @@ * scaling or converting. */ + fetch_type = lp_type_uint(type.width*4); packed = lp_build_gather(gallivm, type.length/4, - format_desc->block.bits, type.width*4, + format_desc->block.bits, fetch_type, aligned, base_ptr, offset, TRUE); assert(format_desc->block.bits <= vec_len); @@ -413,6 +520,86 @@ } /* + * Bit arithmetic for converting small_unorm to unorm8. + * + * This misses some opportunities for optimizations (like skipping mask + * for the highest channel for instance, or doing bit scaling in parallel + * for channels with the same bit width) but it should be passable for + * all arithmetic formats. + */ + if (format_desc->layout == UTIL_FORMAT_LAYOUT_PLAIN && + format_desc->colorspace == UTIL_FORMAT_COLORSPACE_RGB && + util_format_fits_8unorm(format_desc) && + type.width == 8 && type.norm == 1 && type.sign == 0 && + type.fixed == 0 && type.floating == 0) { + LLVMValueRef packed, res, chans[4], rgba[4]; + LLVMTypeRef dst_vec_type, conv_vec_type; + struct lp_type fetch_type, conv_type; + struct lp_build_context bld_conv; + unsigned j; + + fetch_type = lp_type_uint(type.width*4); + conv_type = lp_type_int_vec(type.width*4, type.width * type.length); + dst_vec_type = lp_build_vec_type(gallivm, type); + conv_vec_type = lp_build_vec_type(gallivm, conv_type); + lp_build_context_init(&bld_conv, gallivm, conv_type); + + packed = lp_build_gather(gallivm, type.length/4, + format_desc->block.bits, fetch_type, + aligned, base_ptr, offset, TRUE); + + assert(format_desc->block.bits * type.length / 4 <= + type.width * type.length); + + packed = LLVMBuildBitCast(gallivm->builder, packed, conv_vec_type, ""); + + for (j = 0; j < format_desc->nr_channels; ++j) { + unsigned mask = 0; + unsigned sa = format_desc->channel[j].shift; + + mask = (1 << format_desc->channel[j].size) - 1; + + /* Extract bits from source */ + chans[j] = LLVMBuildLShr(builder, packed, + lp_build_const_int_vec(gallivm, conv_type, sa), + ""); + + chans[j] = LLVMBuildAnd(builder, chans[j], + lp_build_const_int_vec(gallivm, conv_type, mask), + ""); + + /* Scale bits */ + if (type.norm) { + chans[j] = scale_bits_up(gallivm, format_desc->channel[j].size, + type.width, chans[j], conv_type); + } + } + /* + * This is a hacked lp_build_format_swizzle_soa() since we need a + * normalized 1 but only 8 bits in a 32bit vector... + */ + for (j = 0; j < 4; ++j) { + enum pipe_swizzle swizzle = format_desc->swizzle[j]; + if (swizzle == PIPE_SWIZZLE_1) { + rgba[j] = lp_build_const_int_vec(gallivm, conv_type, (1 << type.width) - 1); + } else { + rgba[j] = lp_build_swizzle_soa_channel(&bld_conv, chans, swizzle); + } + if (j == 0) { + res = rgba[j]; + } else { + rgba[j] = LLVMBuildShl(builder, rgba[j], + lp_build_const_int_vec(gallivm, conv_type, + j * type.width), ""); + res = LLVMBuildOr(builder, res, rgba[j], ""); + } + } + res = LLVMBuildBitCast(gallivm->builder, res, dst_vec_type, ""); + + return res; + } + + /* * Bit arithmetic */ @@ -421,6 +608,7 @@ format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS) && format_desc->block.width == 1 && format_desc->block.height == 1 && + /* XXX this shouldn't be needed */ util_is_power_of_two(format_desc->block.bits) && format_desc->block.bits <= 32 && format_desc->is_bitmask && @@ -430,8 +618,15 @@ !format_desc->channel[0].pure_integer) { LLVMValueRef tmps[LP_MAX_VECTOR_LENGTH/4]; - LLVMValueRef res; - unsigned k; + LLVMValueRef res[LP_MAX_VECTOR_WIDTH / 128]; + struct lp_type conv_type; + unsigned k, num_conv_src, num_conv_dst; + + /* + * Note this path is generally terrible for fetching multiple pixels. + * We should make sure we cannot hit this code path for anything but + * single pixels. + */ /* * Unpack a pixel at a time into a <4 x float> RGBA vector @@ -461,12 +656,38 @@ __FUNCTION__, format_desc->short_name); } - lp_build_conv(gallivm, - lp_float32_vec4_type(), - type, - tmps, num_pixels, &res, 1); + conv_type = lp_float32_vec4_type(); + num_conv_src = num_pixels; + num_conv_dst = 1; + + if (num_pixels % 8 == 0) { + lp_build_concat_n(gallivm, lp_float32_vec4_type(), + tmps, num_pixels, tmps, num_pixels / 2); + conv_type.length *= num_pixels / 4; + num_conv_src = 4 * num_pixels / 8; + if (type.width == 8 && type.floating == 0 && type.fixed == 0) { + /* + * FIXME: The fast float->unorm path (which is basically + * skipping the MIN/MAX which are extremely pointless in any + * case) requires that there's 2 destinations... + * In any case, we really should make sure we don't hit this + * code with multiple pixels for unorm8 dst types, it's + * completely hopeless even if we do hit the right conversion. + */ + type.length /= num_pixels / 4; + num_conv_dst = num_pixels / 4; + } + } + + lp_build_conv(gallivm, conv_type, type, + tmps, num_conv_src, res, num_conv_dst); + + if (num_pixels % 8 == 0 && + (type.width == 8 && type.floating == 0 && type.fixed == 0)) { + lp_build_concat_n(gallivm, type, res, num_conv_dst, res, 1); + } - return lp_build_format_swizzle_aos(format_desc, &bld, res); + return lp_build_format_swizzle_aos(format_desc, &bld, res[0]); } /* If all channels are of same type and we are not using half-floats */ diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_format.h mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_format.h --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_format.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_format.h 2017-06-01 10:37:10.000000000 +0000 @@ -143,6 +143,7 @@ lp_build_fetch_rgba_soa(struct gallivm_state *gallivm, const struct util_format_description *format_desc, struct lp_type type, + boolean aligned, LLVMValueRef base_ptr, LLVMValueRef offsets, LLVMValueRef i, diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_format_soa.c mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_format_soa.c --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_format_soa.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_format_soa.c 2017-06-01 10:37:10.000000000 +0000 @@ -31,6 +31,7 @@ #include "util/u_format.h" #include "util/u_memory.h" #include "util/u_string.h" +#include "util/u_math.h" #include "lp_bld_type.h" #include "lp_bld_const.h" @@ -40,6 +41,39 @@ #include "lp_bld_debug.h" #include "lp_bld_format.h" #include "lp_bld_arit.h" +#include "lp_bld_pack.h" + + +static void +convert_to_soa(struct gallivm_state *gallivm, + LLVMValueRef src_aos[LP_MAX_VECTOR_WIDTH / 32], + LLVMValueRef dst_soa[4], + const struct lp_type soa_type) +{ + unsigned j, k; + struct lp_type aos_channel_type = soa_type; + + LLVMValueRef aos_channels[4]; + unsigned pixels_per_channel = soa_type.length / 4; + + debug_assert((soa_type.length % 4) == 0); + + aos_channel_type.length >>= 1; + + for (j = 0; j < 4; ++j) { + LLVMValueRef channel[LP_MAX_VECTOR_LENGTH] = { 0 }; + + assert(pixels_per_channel <= LP_MAX_VECTOR_LENGTH); + + for (k = 0; k < pixels_per_channel; ++k) { + channel[k] = src_aos[j + 4 * k]; + } + + aos_channels[j] = lp_build_concat(gallivm, channel, aos_channel_type, pixels_per_channel); + } + + lp_build_transpose_aos(gallivm, soa_type, aos_channels, dst_soa); +} void @@ -48,9 +82,6 @@ const LLVMValueRef *unswizzled, LLVMValueRef swizzled_out[4]) { - assert(PIPE_SWIZZLE_0 == (int)PIPE_SWIZZLE_0); - assert(PIPE_SWIZZLE_1 == (int)PIPE_SWIZZLE_1); - if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS) { enum pipe_swizzle swizzle; LLVMValueRef depth_or_stencil; @@ -83,6 +114,166 @@ } + +static LLVMValueRef +lp_build_extract_soa_chan(struct lp_build_context *bld, + unsigned blockbits, + boolean srgb_chan, + struct util_format_channel_description chan_desc, + LLVMValueRef packed) +{ + struct gallivm_state *gallivm = bld->gallivm; + LLVMBuilderRef builder = gallivm->builder; + struct lp_type type = bld->type; + LLVMValueRef input = packed; + const unsigned width = chan_desc.size; + const unsigned start = chan_desc.shift; + const unsigned stop = start + width; + + /* Decode the input vector component */ + + switch(chan_desc.type) { + case UTIL_FORMAT_TYPE_VOID: + input = bld->undef; + break; + + case UTIL_FORMAT_TYPE_UNSIGNED: + /* + * Align the LSB + */ + if (start) { + input = LLVMBuildLShr(builder, input, + lp_build_const_int_vec(gallivm, type, start), ""); + } + + /* + * Zero the MSBs + */ + if (stop < blockbits) { + unsigned mask = ((unsigned long long)1 << width) - 1; + input = LLVMBuildAnd(builder, input, + lp_build_const_int_vec(gallivm, type, mask), ""); + } + + /* + * Type conversion + */ + if (type.floating) { + if (srgb_chan) { + struct lp_type conv_type = lp_uint_type(type); + input = lp_build_srgb_to_linear(gallivm, conv_type, width, input); + } + else { + if(chan_desc.normalized) + input = lp_build_unsigned_norm_to_float(gallivm, width, type, input); + else + input = LLVMBuildSIToFP(builder, input, bld->vec_type, ""); + } + } + else if (chan_desc.pure_integer) { + /* Nothing to do */ + } else { + /* FIXME */ + assert(0); + } + break; + + case UTIL_FORMAT_TYPE_SIGNED: + /* + * Align the sign bit first. + */ + if (stop < type.width) { + unsigned bits = type.width - stop; + LLVMValueRef bits_val = lp_build_const_int_vec(gallivm, type, bits); + input = LLVMBuildShl(builder, input, bits_val, ""); + } + + /* + * Align the LSB (with an arithmetic shift to preserve the sign) + */ + if (chan_desc.size < type.width) { + unsigned bits = type.width - chan_desc.size; + LLVMValueRef bits_val = lp_build_const_int_vec(gallivm, type, bits); + input = LLVMBuildAShr(builder, input, bits_val, ""); + } + + /* + * Type conversion + */ + if (type.floating) { + input = LLVMBuildSIToFP(builder, input, bld->vec_type, ""); + if (chan_desc.normalized) { + double scale = 1.0 / ((1 << (chan_desc.size - 1)) - 1); + LLVMValueRef scale_val = lp_build_const_vec(gallivm, type, scale); + input = LLVMBuildFMul(builder, input, scale_val, ""); + /* + * The formula above will produce value below -1.0 for most negative + * value but everything seems happy with that hence disable for now. + */ + if (0) + input = lp_build_max(bld, input, + lp_build_const_vec(gallivm, type, -1.0f)); + } + } + else if (chan_desc.pure_integer) { + /* Nothing to do */ + } else { + /* FIXME */ + assert(0); + } + break; + + case UTIL_FORMAT_TYPE_FLOAT: + if (type.floating) { + if (chan_desc.size == 16) { + struct lp_type f16i_type = type; + f16i_type.width /= 2; + f16i_type.floating = 0; + if (start) { + input = LLVMBuildLShr(builder, input, + lp_build_const_int_vec(gallivm, type, start), ""); + } + input = LLVMBuildTrunc(builder, input, + lp_build_vec_type(gallivm, f16i_type), ""); + input = lp_build_half_to_float(gallivm, input); + } else { + assert(start == 0); + assert(stop == 32); + assert(type.width == 32); + } + input = LLVMBuildBitCast(builder, input, bld->vec_type, ""); + } + else { + /* FIXME */ + assert(0); + input = bld->undef; + } + break; + + case UTIL_FORMAT_TYPE_FIXED: + if (type.floating) { + double scale = 1.0 / ((1 << (chan_desc.size/2)) - 1); + LLVMValueRef scale_val = lp_build_const_vec(gallivm, type, scale); + input = LLVMBuildSIToFP(builder, input, bld->vec_type, ""); + input = LLVMBuildFMul(builder, input, scale_val, ""); + } + else { + /* FIXME */ + assert(0); + input = bld->undef; + } + break; + + default: + assert(0); + input = bld->undef; + break; + } + + return input; +} + + /** * Unpack several pixels in SoA. * @@ -113,7 +304,6 @@ LLVMValueRef packed, LLVMValueRef rgba_out[4]) { - LLVMBuilderRef builder = gallivm->builder; struct lp_build_context bld; LLVMValueRef inputs[4]; unsigned chan; @@ -129,149 +319,19 @@ /* Decode the input vector components */ for (chan = 0; chan < format_desc->nr_channels; ++chan) { - const unsigned width = format_desc->channel[chan].size; - const unsigned start = format_desc->channel[chan].shift; - const unsigned stop = start + width; - LLVMValueRef input; - - input = packed; - - switch(format_desc->channel[chan].type) { - case UTIL_FORMAT_TYPE_VOID: - input = lp_build_undef(gallivm, type); - break; - - case UTIL_FORMAT_TYPE_UNSIGNED: - /* - * Align the LSB - */ - - if (start) { - input = LLVMBuildLShr(builder, input, lp_build_const_int_vec(gallivm, type, start), ""); - } + struct util_format_channel_description chan_desc = format_desc->channel[chan]; + boolean srgb_chan = FALSE; - /* - * Zero the MSBs - */ - - if (stop < format_desc->block.bits) { - unsigned mask = ((unsigned long long)1 << width) - 1; - input = LLVMBuildAnd(builder, input, lp_build_const_int_vec(gallivm, type, mask), ""); - } - - /* - * Type conversion - */ - - if (type.floating) { - if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB) { - if (format_desc->swizzle[3] == chan) { - input = lp_build_unsigned_norm_to_float(gallivm, width, type, input); - } - else { - struct lp_type conv_type = lp_uint_type(type); - input = lp_build_srgb_to_linear(gallivm, conv_type, width, input); - } - } - else { - if(format_desc->channel[chan].normalized) - input = lp_build_unsigned_norm_to_float(gallivm, width, type, input); - else - input = LLVMBuildSIToFP(builder, input, - lp_build_vec_type(gallivm, type), ""); - } - } - else if (format_desc->channel[chan].pure_integer) { - /* Nothing to do */ - } else { - /* FIXME */ - assert(0); - } - - break; - - case UTIL_FORMAT_TYPE_SIGNED: - /* - * Align the sign bit first. - */ - - if (stop < type.width) { - unsigned bits = type.width - stop; - LLVMValueRef bits_val = lp_build_const_int_vec(gallivm, type, bits); - input = LLVMBuildShl(builder, input, bits_val, ""); - } - - /* - * Align the LSB (with an arithmetic shift to preserve the sign) - */ - - if (format_desc->channel[chan].size < type.width) { - unsigned bits = type.width - format_desc->channel[chan].size; - LLVMValueRef bits_val = lp_build_const_int_vec(gallivm, type, bits); - input = LLVMBuildAShr(builder, input, bits_val, ""); - } - - /* - * Type conversion - */ - - if (type.floating) { - input = LLVMBuildSIToFP(builder, input, lp_build_vec_type(gallivm, type), ""); - if (format_desc->channel[chan].normalized) { - double scale = 1.0 / ((1 << (format_desc->channel[chan].size - 1)) - 1); - LLVMValueRef scale_val = lp_build_const_vec(gallivm, type, scale); - input = LLVMBuildFMul(builder, input, scale_val, ""); - /* the formula above will produce value below -1.0 for most negative - * value but everything seems happy with that hence disable for now */ - if (0) - input = lp_build_max(&bld, input, - lp_build_const_vec(gallivm, type, -1.0f)); - } - } - else if (format_desc->channel[chan].pure_integer) { - /* Nothing to do */ - } else { - /* FIXME */ - assert(0); - } - - break; - - case UTIL_FORMAT_TYPE_FLOAT: - if (type.floating) { - assert(start == 0); - assert(stop == 32); - assert(type.width == 32); - input = LLVMBuildBitCast(builder, input, lp_build_vec_type(gallivm, type), ""); - } - else { - /* FIXME */ - assert(0); - input = lp_build_undef(gallivm, type); - } - break; - - case UTIL_FORMAT_TYPE_FIXED: - if (type.floating) { - double scale = 1.0 / ((1 << (format_desc->channel[chan].size/2)) - 1); - LLVMValueRef scale_val = lp_build_const_vec(gallivm, type, scale); - input = LLVMBuildSIToFP(builder, input, lp_build_vec_type(gallivm, type), ""); - input = LLVMBuildFMul(builder, input, scale_val, ""); - } - else { - /* FIXME */ - assert(0); - input = lp_build_undef(gallivm, type); - } - break; - - default: - assert(0); - input = lp_build_undef(gallivm, type); - break; + if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB && + format_desc->swizzle[3] != chan) { + srgb_chan = TRUE; } - inputs[chan] = input; + inputs[chan] = lp_build_extract_soa_chan(&bld, + format_desc->block.bits, + srgb_chan, + chan_desc, + packed); } lp_build_format_swizzle_soa(format_desc, &bld, inputs, rgba_out); @@ -336,6 +396,7 @@ * * \param type the desired return type for 'rgba'. The vector length * is the number of texels to fetch + * \param aligned if the offset is guaranteed to be aligned to element width * * \param base_ptr points to the base of the texture mip tree. * \param offset offset to start of the texture image block. For non- @@ -352,6 +413,7 @@ lp_build_fetch_rgba_soa(struct gallivm_state *gallivm, const struct util_format_description *format_desc, struct lp_type type, + boolean aligned, LLVMValueRef base_ptr, LLVMValueRef offset, LLVMValueRef i, @@ -360,6 +422,8 @@ LLVMValueRef rgba_out[4]) { LLVMBuilderRef builder = gallivm->builder; + enum pipe_format format = format_desc->format; + struct lp_type fetch_type; if (format_desc->layout == UTIL_FORMAT_LAYOUT_PLAIN && (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_RGB || @@ -369,7 +433,8 @@ format_desc->block.height == 1 && format_desc->block.bits <= type.width && (format_desc->channel[0].type != UTIL_FORMAT_TYPE_FLOAT || - format_desc->channel[0].size == 32)) + format_desc->channel[0].size == 32 || + format_desc->channel[0].size == 16)) { /* * The packed pixel fits into an element of the destination format. Put @@ -384,11 +449,12 @@ * Ex: packed = {XYZW, XYZW, XYZW, XYZW} */ assert(format_desc->block.bits <= type.width); + fetch_type = lp_type_uint(type.width); packed = lp_build_gather(gallivm, type.length, format_desc->block.bits, - type.width, - TRUE, + fetch_type, + aligned, base_ptr, offset, FALSE); /* @@ -401,22 +467,227 @@ return; } - if (format_desc->format == PIPE_FORMAT_R11G11B10_FLOAT || - format_desc->format == PIPE_FORMAT_R9G9B9E5_FLOAT) { + + if (format_desc->layout == UTIL_FORMAT_LAYOUT_PLAIN && + (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_RGB) && + format_desc->block.width == 1 && + format_desc->block.height == 1 && + format_desc->block.bits > type.width && + ((format_desc->block.bits <= type.width * type.length && + format_desc->channel[0].size <= type.width) || + (format_desc->channel[0].size == 64 && + format_desc->channel[0].type == UTIL_FORMAT_TYPE_FLOAT && + type.floating))) + { + /* + * Similar to above, but the packed pixel is larger than what fits + * into an element of the destination format. The packed pixels will be + * shuffled into SoA vectors appropriately, and then the extraction will + * be done in parallel as much as possible. + * Good for 16xn (n > 2) and 32xn (n > 1) formats, care is taken so + * the gathered vectors can be shuffled easily (even with avx). + * 64xn float -> 32xn float is handled too but it's a bit special as + * it does the conversion pre-shuffle. + */ + + LLVMValueRef packed[4], dst[4], output[4], shuffles[LP_MAX_VECTOR_WIDTH/32]; + struct lp_type fetch_type, gather_type = type; + unsigned num_gather, fetch_width, i, j; + struct lp_build_context bld; + boolean fp64 = format_desc->channel[0].size == 64; + + lp_build_context_init(&bld, gallivm, type); + + assert(type.width == 32); + assert(format_desc->block.bits > type.width); + + /* + * First, figure out fetch order. + */ + fetch_width = util_next_power_of_two(format_desc->block.bits); + num_gather = fetch_width / type.width; + /* + * fp64 are treated like fp32 except we fetch twice wide values + * (as we shuffle after trunc). The shuffles for that work out + * mostly fine (slightly suboptimal for 4-wide, perfect for AVX) + * albeit we miss the potential opportunity for hw gather (as it + * only handles native size). + */ + num_gather = fetch_width / type.width; + gather_type.width *= num_gather; + if (fp64) { + num_gather /= 2; + } + gather_type.length /= num_gather; + + for (i = 0; i < num_gather; i++) { + LLVMValueRef offsetr, shuf_vec; + if(num_gather == 4) { + for (j = 0; j < gather_type.length; j++) { + unsigned idx = i + 4*j; + shuffles[j] = lp_build_const_int32(gallivm, idx); + } + shuf_vec = LLVMConstVector(shuffles, gather_type.length); + offsetr = LLVMBuildShuffleVector(builder, offset, offset, shuf_vec, ""); + + } + else if (num_gather == 2) { + assert(num_gather == 2); + for (j = 0; j < gather_type.length; j++) { + unsigned idx = i*2 + (j%2) + (j/2)*4; + shuffles[j] = lp_build_const_int32(gallivm, idx); + } + shuf_vec = LLVMConstVector(shuffles, gather_type.length); + offsetr = LLVMBuildShuffleVector(builder, offset, offset, shuf_vec, ""); + } + else { + assert(num_gather == 1); + offsetr = offset; + } + if (gather_type.length == 1) { + LLVMValueRef zero = lp_build_const_int32(gallivm, 0); + offsetr = LLVMBuildExtractElement(builder, offsetr, zero, ""); + } + + /* + * Determine whether to use float or int loads. This is mostly + * to outsmart the (stupid) llvm int/float shuffle logic, we + * don't really care much if the data is floats or ints... + * But llvm will refuse to use single float shuffle with int data + * and instead use 3 int shuffles instead, the code looks atrocious. + * (Note bitcasts often won't help, as llvm is too smart to be + * fooled by that.) + * Nobody cares about simd float<->int domain transition penalties, + * which usually don't even exist for shuffles anyway. + * With 4x32bit (and 3x32bit) fetch, we use float vec (the data is + * going into transpose, which is unpacks, so doesn't really matter + * much). + * With 2x32bit or 4x16bit fetch, we use float vec, since those + * go into the weird channel separation shuffle. With floats, + * this is (with 128bit vectors): + * - 2 movq, 2 movhpd, 2 shufps + * With ints it would be: + * - 4 movq, 2 punpcklqdq, 4 pshufd, 2 blendw + * I've seen texture functions increase in code size by 15% just due + * to that (there's lots of such fetches in them...) + * (We could chose a different gather order to improve this somewhat + * for the int path, but it would basically just drop the blends, + * so the float path with this order really is optimal.) + * Albeit it is tricky sometimes llvm doesn't ignore the float->int + * casts so must avoid them until we're done with the float shuffle... + * 3x16bit formats (the same is also true for 3x8) are pretty bad but + * there's nothing we can do about them (we could overallocate by + * those couple bytes and use unaligned but pot sized load). + * Note that this is very much x86 specific. I don't know if this + * affect other archs at all. + */ + if (num_gather > 1) { + /* + * We always want some float type here (with x86) + * due to shuffles being float ones afterwards (albeit for + * the num_gather == 4 case int should work fine too + * (unless there's some problems with avx but not avx2). + */ + if (format_desc->channel[0].size == 64) { + fetch_type = lp_type_float_vec(64, gather_type.width); + } else { + fetch_type = lp_type_int_vec(32, gather_type.width); + } + } + else { + /* type doesn't matter much */ + if (format_desc->channel[0].type == UTIL_FORMAT_TYPE_FLOAT && + (format_desc->channel[0].size == 32 || + format_desc->channel[0].size == 64)) { + fetch_type = lp_type_float(gather_type.width); + } else { + fetch_type = lp_type_uint(gather_type.width); + } + } + + /* Now finally gather the values */ + packed[i] = lp_build_gather(gallivm, gather_type.length, + format_desc->block.bits, + fetch_type, aligned, + base_ptr, offsetr, FALSE); + if (fp64) { + struct lp_type conv_type = type; + conv_type.width *= 2; + packed[i] = LLVMBuildBitCast(builder, packed[i], + lp_build_vec_type(gallivm, conv_type), ""); + packed[i] = LLVMBuildFPTrunc(builder, packed[i], bld.vec_type, ""); + } + } + + /* shuffle the gathered values to SoA */ + if (num_gather == 2) { + for (i = 0; i < num_gather; i++) { + for (j = 0; j < type.length; j++) { + unsigned idx = (j%2)*2 + (j/4)*4 + i; + if ((j/2)%2) + idx += type.length; + shuffles[j] = lp_build_const_int32(gallivm, idx); + } + dst[i] = LLVMBuildShuffleVector(builder, packed[0], packed[1], + LLVMConstVector(shuffles, type.length), ""); + } + } + else if (num_gather == 4) { + lp_build_transpose_aos(gallivm, lp_int_type(type), packed, dst); + } + else { + assert(num_gather == 1); + dst[0] = packed[0]; + } + + /* + * And finally unpack exactly as above, except that + * chan shift is adjusted and the right vector selected. + */ + if (!fp64) { + for (i = 0; i < num_gather; i++) { + dst[i] = LLVMBuildBitCast(builder, dst[i], bld.int_vec_type, ""); + } + for (i = 0; i < format_desc->nr_channels; i++) { + struct util_format_channel_description chan_desc = format_desc->channel[i]; + unsigned blockbits = type.width; + unsigned vec_nr = chan_desc.shift / type.width; + chan_desc.shift %= type.width; + + output[i] = lp_build_extract_soa_chan(&bld, + blockbits, + FALSE, + chan_desc, + dst[vec_nr]); + } + } + else { + for (i = 0; i < format_desc->nr_channels; i++) { + output[i] = dst[i]; + } + } + + lp_build_format_swizzle_soa(format_desc, &bld, output, rgba_out); + return; + } + + if (format == PIPE_FORMAT_R11G11B10_FLOAT || + format == PIPE_FORMAT_R9G9B9E5_FLOAT) { /* * similar conceptually to above but requiring special * AoS packed -> SoA float conversion code. */ LLVMValueRef packed; + struct lp_type fetch_type = lp_type_uint(type.width); assert(type.floating); assert(type.width == 32); packed = lp_build_gather(gallivm, type.length, format_desc->block.bits, - type.width, TRUE, + fetch_type, aligned, base_ptr, offset, FALSE); - if (format_desc->format == PIPE_FORMAT_R11G11B10_FLOAT) { + if (format == PIPE_FORMAT_R11G11B10_FLOAT) { lp_build_r11g11b10_to_float(gallivm, packed, rgba_out); } else { @@ -432,8 +703,9 @@ * 32bit (or 8bit) from each block. */ LLVMValueRef packed; + struct lp_type fetch_type = lp_type_uint(type.width); - if (format_desc->format == PIPE_FORMAT_X32_S8X24_UINT) { + if (format == PIPE_FORMAT_X32_S8X24_UINT) { /* * for stencil simply fix up offsets - could in fact change * base_ptr instead even outside the shader. @@ -441,15 +713,15 @@ unsigned mask = (1 << 8) - 1; LLVMValueRef s_offset = lp_build_const_int_vec(gallivm, type, 4); offset = LLVMBuildAdd(builder, offset, s_offset, ""); - packed = lp_build_gather(gallivm, type.length, 32, type.width, - TRUE, base_ptr, offset, FALSE); + packed = lp_build_gather(gallivm, type.length, 32, fetch_type, + aligned, base_ptr, offset, FALSE); packed = LLVMBuildAnd(builder, packed, lp_build_const_int_vec(gallivm, type, mask), ""); } else { - assert (format_desc->format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT); - packed = lp_build_gather(gallivm, type.length, 32, type.width, - TRUE, base_ptr, offset, TRUE); + assert (format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT); + packed = lp_build_gather(gallivm, type.length, 32, fetch_type, + aligned, base_ptr, offset, TRUE); packed = LLVMBuildBitCast(builder, packed, lp_build_vec_type(gallivm, type), ""); } @@ -461,63 +733,69 @@ /* * Try calling lp_build_fetch_rgba_aos for all pixels. + * Should only really hit subsampled, compressed + * (for s3tc srgb too, for rgtc the unorm ones only) by now. + * (This is invalid for plain 8unorm formats because we're lazy with + * the swizzle since some results would arrive swizzled, some not.) */ - if (util_format_fits_8unorm(format_desc) && + if ((format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN) && + (util_format_fits_8unorm(format_desc) || + format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) && type.floating && type.width == 32 && (type.length == 1 || (type.length % 4 == 0))) { struct lp_type tmp_type; - LLVMValueRef tmp; + struct lp_build_context bld; + LLVMValueRef packed, rgba[4]; + const struct util_format_description *flinear_desc; + const struct util_format_description *frgba8_desc; + unsigned chan; + + lp_build_context_init(&bld, gallivm, type); + /* + * Make sure the conversion in aos really only does convert to rgba8 + * and not anything more (so use linear format, adjust type). + */ + flinear_desc = util_format_description(util_format_linear(format)); memset(&tmp_type, 0, sizeof tmp_type); tmp_type.width = 8; tmp_type.length = type.length * 4; tmp_type.norm = TRUE; - tmp = lp_build_fetch_rgba_aos(gallivm, format_desc, tmp_type, - TRUE, base_ptr, offset, i, j, cache); - - lp_build_rgba8_to_fi32_soa(gallivm, - type, - tmp, - rgba_out); + packed = lp_build_fetch_rgba_aos(gallivm, flinear_desc, tmp_type, + aligned, base_ptr, offset, i, j, cache); + packed = LLVMBuildBitCast(builder, packed, bld.int_vec_type, ""); - return; - } - - if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC && - /* non-srgb case is already handled above */ - format_desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB && - type.floating && type.width == 32 && - (type.length == 1 || (type.length % 4 == 0)) && - cache) { - const struct util_format_description *format_decompressed; - const struct util_format_description *flinear_desc; - LLVMValueRef packed; - flinear_desc = util_format_description(util_format_linear(format_desc->format)); - packed = lp_build_fetch_cached_texels(gallivm, - flinear_desc, - type.length, - base_ptr, - offset, - i, j, - cache); - packed = LLVMBuildBitCast(builder, packed, - lp_build_int_vec_type(gallivm, type), ""); /* - * The values are now packed so they match ordinary srgb RGBA8 format, + * The values are now packed so they match ordinary (srgb) RGBA8 format, * hence need to use matching format for unpack. */ - format_decompressed = util_format_description(PIPE_FORMAT_R8G8B8A8_SRGB); - + frgba8_desc = util_format_description(PIPE_FORMAT_R8G8B8A8_UNORM); + if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB) { + assert(format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC); + frgba8_desc = util_format_description(PIPE_FORMAT_R8G8B8A8_SRGB); + } lp_build_unpack_rgba_soa(gallivm, - format_decompressed, + frgba8_desc, type, - packed, rgba_out); + packed, rgba); + /* + * We converted 4 channels. Make sure llvm can drop unneeded ones + * (luckily the rgba order is fixed, only LA needs special case). + */ + for (chan = 0; chan < 4; chan++) { + enum pipe_swizzle swizzle = format_desc->swizzle[chan]; + if (chan == 3 && util_format_is_luminance_alpha(format)) { + swizzle = PIPE_SWIZZLE_W; + } + rgba_out[chan] = lp_build_swizzle_soa_channel(&bld, rgba, swizzle); + } return; } + /* * Fallback to calling lp_build_fetch_rgba_aos for each pixel. * @@ -525,30 +803,40 @@ * miss some opportunities to do vectorization, but this is * convenient for formats or scenarios for which there was no * opportunity or incentive to optimize. + * + * We do NOT want to end up here, this typically is quite terrible, + * in particular if the formats have less than 4 channels. + * + * Right now, this should only be hit for: + * - RGTC snorm formats + * (those miss fast fetch functions hence they are terrible anyway) */ { - unsigned k, chan; + unsigned k; struct lp_type tmp_type; + LLVMValueRef aos_fetch[LP_MAX_VECTOR_WIDTH / 32]; if (gallivm_debug & GALLIVM_DEBUG_PERF) { - debug_printf("%s: scalar unpacking of %s\n", + debug_printf("%s: AoS fetch fallback for %s\n", __FUNCTION__, format_desc->short_name); } tmp_type = type; tmp_type.length = 4; - for (chan = 0; chan < 4; ++chan) { - rgba_out[chan] = lp_build_undef(gallivm, type); - } + /* + * Note that vector transpose can be worse compared to insert/extract + * for aos->soa conversion (for formats with 1 or 2 channels). However, + * we should try to avoid getting here for just about all formats, so + * don't bother. + */ /* loop over number of pixels */ for(k = 0; k < type.length; ++k) { LLVMValueRef index = lp_build_const_int32(gallivm, k); LLVMValueRef offset_elem; LLVMValueRef i_elem, j_elem; - LLVMValueRef tmp; offset_elem = LLVMBuildExtractElement(builder, offset, index, ""); @@ -557,20 +845,11 @@ j_elem = LLVMBuildExtractElement(builder, j, index, ""); /* Get a single float[4]={R,G,B,A} pixel */ - tmp = lp_build_fetch_rgba_aos(gallivm, format_desc, tmp_type, - TRUE, base_ptr, offset_elem, - i_elem, j_elem, cache); + aos_fetch[k] = lp_build_fetch_rgba_aos(gallivm, format_desc, tmp_type, + aligned, base_ptr, offset_elem, + i_elem, j_elem, cache); - /* - * Insert the AoS tmp value channels into the SoA result vectors at - * position = 'index'. - */ - for (chan = 0; chan < 4; ++chan) { - LLVMValueRef chan_val = lp_build_const_int32(gallivm, chan), - tmp_chan = LLVMBuildExtractElement(builder, tmp, chan_val, ""); - rgba_out[chan] = LLVMBuildInsertElement(builder, rgba_out[chan], - tmp_chan, index, ""); - } } + convert_to_soa(gallivm, aos_fetch, rgba_out, type); } } diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_format_srgb.c mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_format_srgb.c --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_format_srgb.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_format_srgb.c 2017-06-01 10:37:10.000000000 +0000 @@ -289,8 +289,7 @@ c_const = lp_build_const_vec(gallivm, src_type, -0.0620f * 255.0f); tmp = lp_build_mul(&f32_bld, a_const, x0375); - tmp2 = lp_build_mul(&f32_bld, b_const, x05); - tmp2 = lp_build_add(&f32_bld, tmp2, c_const); + tmp2 = lp_build_mad(&f32_bld, b_const, x05, c_const); pow_final = lp_build_add(&f32_bld, tmp, tmp2); } diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_format_yuv.c mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_format_yuv.c --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_format_yuv.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_format_yuv.c 2017-06-01 10:37:10.000000000 +0000 @@ -491,13 +491,15 @@ { LLVMValueRef packed; LLVMValueRef rgba; + struct lp_type fetch_type; assert(format_desc->layout == UTIL_FORMAT_LAYOUT_SUBSAMPLED); assert(format_desc->block.bits == 32); assert(format_desc->block.width == 2); assert(format_desc->block.height == 1); - packed = lp_build_gather(gallivm, n, 32, 32, TRUE, base_ptr, offset, FALSE); + fetch_type = lp_type_uint(32); + packed = lp_build_gather(gallivm, n, 32, fetch_type, TRUE, base_ptr, offset, FALSE); (void)j; diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_gather.c mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_gather.c --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_gather.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_gather.c 2017-06-01 10:37:10.000000000 +0000 @@ -27,12 +27,17 @@ #include "util/u_debug.h" +#include "util/u_cpu_detect.h" +#include "util/u_math.h" #include "lp_bld_debug.h" #include "lp_bld_const.h" #include "lp_bld_format.h" #include "lp_bld_gather.h" +#include "lp_bld_swizzle.h" +#include "lp_bld_type.h" #include "lp_bld_init.h" #include "lp_bld_intr.h" +#include "lp_bld_pack.h" /** @@ -111,14 +116,29 @@ * translation of offsets to first_elem in sampler_views it actually seems * gallium could not do anything else except 16 no matter what... */ - if (!aligned) { + if (!aligned) { LLVMSetAlignment(res, 1); + } else if (!util_is_power_of_two(src_width)) { + /* + * Full alignment is impossible, assume the caller really meant + * the individual elements were aligned (e.g. 3x32bit format). + * And yes the generated code may otherwise crash, llvm will + * really assume 128bit alignment with a 96bit fetch (I suppose + * that makes sense as it can just assume the upper 32bit to be + * whatever). + * Maybe the caller should be able to explicitly set this, but + * this should cover all the 3-channel formats. + */ + if (((src_width / 24) * 24 == src_width) && + util_is_power_of_two(src_width / 24)) { + LLVMSetAlignment(res, src_width / 24); + } else { + LLVMSetAlignment(res, 1); + } } assert(src_width <= dst_width); - if (src_width > dst_width) { - res = LLVMBuildTrunc(gallivm->builder, res, dst_elem_type, ""); - } else if (src_width < dst_width) { + if (src_width < dst_width) { res = LLVMBuildZExt(gallivm->builder, res, dst_elem_type, ""); if (vector_justify) { #ifdef PIPE_ARCH_BIG_ENDIAN @@ -133,6 +153,210 @@ /** + * Gather one element from scatter positions in memory. + * Nearly the same as above, however the individual elements + * may be vectors themselves, and fetches may be float type. + * Can also do pad vector instead of ZExt. + * + * @sa lp_build_gather() + */ +static LLVMValueRef +lp_build_gather_elem_vec(struct gallivm_state *gallivm, + unsigned length, + unsigned src_width, + LLVMTypeRef src_type, + struct lp_type dst_type, + boolean aligned, + LLVMValueRef base_ptr, + LLVMValueRef offsets, + unsigned i, + boolean vector_justify) +{ + LLVMValueRef ptr, res; + LLVMTypeRef src_ptr_type = LLVMPointerType(src_type, 0); + assert(LLVMTypeOf(base_ptr) == LLVMPointerType(LLVMInt8TypeInContext(gallivm->context), 0)); + + ptr = lp_build_gather_elem_ptr(gallivm, length, base_ptr, offsets, i); + ptr = LLVMBuildBitCast(gallivm->builder, ptr, src_ptr_type, ""); + res = LLVMBuildLoad(gallivm->builder, ptr, ""); + + /* XXX + * On some archs we probably really want to avoid having to deal + * with alignments lower than 4 bytes (if fetch size is a power of + * two >= 32). On x86 it doesn't matter, however. + * We should be able to guarantee full alignment for any kind of texture + * fetch (except ARB_texture_buffer_range, oops), but not vertex fetch + * (there's PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY and friends + * but I don't think that's quite what we wanted). + * For ARB_texture_buffer_range, PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT + * looks like a good fit, but it seems this cap bit (and OpenGL) aren't + * enforcing what we want (which is what d3d10 does, the offset needs to + * be aligned to element size, but GL has bytes regardless of element + * size which would only leave us with minimum alignment restriction of 16 + * which doesn't make much sense if the type isn't 4x32bit). Due to + * translation of offsets to first_elem in sampler_views it actually seems + * gallium could not do anything else except 16 no matter what... + */ + if (!aligned) { + LLVMSetAlignment(res, 1); + } else if (!util_is_power_of_two(src_width)) { + /* + * Full alignment is impossible, assume the caller really meant + * the individual elements were aligned (e.g. 3x32bit format). + * And yes the generated code may otherwise crash, llvm will + * really assume 128bit alignment with a 96bit fetch (I suppose + * that makes sense as it can just assume the upper 32bit to be + * whatever). + * Maybe the caller should be able to explicitly set this, but + * this should cover all the 3-channel formats. + */ + if (((src_width / 24) * 24 == src_width) && + util_is_power_of_two(src_width / 24)) { + LLVMSetAlignment(res, src_width / 24); + } else { + LLVMSetAlignment(res, 1); + } + } + + assert(src_width <= dst_type.width * dst_type.length); + if (src_width < dst_type.width * dst_type.length) { + if (dst_type.length > 1) { + res = lp_build_pad_vector(gallivm, res, dst_type.length); + /* + * vector_justify hopefully a non-issue since we only deal + * with src_width >= 32 here? + */ + } else { + LLVMTypeRef dst_elem_type = lp_build_vec_type(gallivm, dst_type); + + /* + * Only valid if src_ptr_type is int type... + */ + res = LLVMBuildZExt(gallivm->builder, res, dst_elem_type, ""); + + if (vector_justify) { +#ifdef PIPE_ARCH_BIG_ENDIAN + res = LLVMBuildShl(gallivm->builder, res, + LLVMConstInt(dst_elem_type, + dst_type.width - src_width, 0), ""); +#endif + } + } + } + return res; +} + + + + +static LLVMValueRef +lp_build_gather_avx2(struct gallivm_state *gallivm, + unsigned length, + unsigned src_width, + struct lp_type dst_type, + LLVMValueRef base_ptr, + LLVMValueRef offsets) +{ + LLVMBuilderRef builder = gallivm->builder; + LLVMTypeRef src_type, src_vec_type; + LLVMValueRef res; + struct lp_type res_type = dst_type; + res_type.length *= length; + + if (dst_type.floating) { + src_type = src_width == 64 ? LLVMDoubleTypeInContext(gallivm->context) : + LLVMFloatTypeInContext(gallivm->context); + } else { + src_type = LLVMIntTypeInContext(gallivm->context, src_width); + } + src_vec_type = LLVMVectorType(src_type, length); + + /* XXX should allow hw scaling (can handle i8, i16, i32, i64 for x86) */ + assert(LLVMTypeOf(base_ptr) == LLVMPointerType(LLVMInt8TypeInContext(gallivm->context), 0)); + + if (0) { + /* + * XXX: This will cause LLVM pre 3.7 to hang; it works on LLVM 3.8 but + * will not use the AVX2 gather instrinsics (even with llvm 4.0), at + * least with Haswell. See + * http://lists.llvm.org/pipermail/llvm-dev/2016-January/094448.html + * And the generated code doing the emulation is quite a bit worse + * than what we get by doing it ourselves too. + */ + LLVMTypeRef i32_type = LLVMIntTypeInContext(gallivm->context, 32); + LLVMTypeRef i32_vec_type = LLVMVectorType(i32_type, length); + LLVMTypeRef i1_type = LLVMIntTypeInContext(gallivm->context, 1); + LLVMTypeRef i1_vec_type = LLVMVectorType(i1_type, length); + LLVMTypeRef src_ptr_type = LLVMPointerType(src_type, 0); + LLVMValueRef src_ptr; + + base_ptr = LLVMBuildBitCast(builder, base_ptr, src_ptr_type, ""); + + /* Rescale offsets from bytes to elements */ + LLVMValueRef scale = LLVMConstInt(i32_type, src_width/8, 0); + scale = lp_build_broadcast(gallivm, i32_vec_type, scale); + assert(LLVMTypeOf(offsets) == i32_vec_type); + offsets = LLVMBuildSDiv(builder, offsets, scale, ""); + + src_ptr = LLVMBuildGEP(builder, base_ptr, &offsets, 1, "vector-gep"); + + char intrinsic[64]; + util_snprintf(intrinsic, sizeof intrinsic, "llvm.masked.gather.v%u%s%u", + length, dst_type.floating ? "f" : "i", src_width); + LLVMValueRef alignment = LLVMConstInt(i32_type, src_width/8, 0); + LLVMValueRef mask = LLVMConstAllOnes(i1_vec_type); + LLVMValueRef passthru = LLVMGetUndef(src_vec_type); + + LLVMValueRef args[] = { src_ptr, alignment, mask, passthru }; + + res = lp_build_intrinsic(builder, intrinsic, src_vec_type, args, 4, 0); + } else { + LLVMTypeRef i8_type = LLVMIntTypeInContext(gallivm->context, 8); + const char *intrinsic = NULL; + unsigned l_idx = 0; + + assert(src_width == 32 || src_width == 64); + if (src_width == 32) { + assert(length == 4 || length == 8); + } else { + assert(length == 2 || length == 4); + } + + static const char *intrinsics[2][2][2] = { + + {{"llvm.x86.avx2.gather.d.d", + "llvm.x86.avx2.gather.d.d.256"}, + {"llvm.x86.avx2.gather.d.q", + "llvm.x86.avx2.gather.d.q.256"}}, + + {{"llvm.x86.avx2.gather.d.ps", + "llvm.x86.avx2.gather.d.ps.256"}, + {"llvm.x86.avx2.gather.d.pd", + "llvm.x86.avx2.gather.d.pd.256"}}, + }; + + if ((src_width == 32 && length == 8) || + (src_width == 64 && length == 4)) { + l_idx = 1; + } + intrinsic = intrinsics[dst_type.floating][src_width == 64][l_idx]; + + LLVMValueRef passthru = LLVMGetUndef(src_vec_type); + LLVMValueRef mask = LLVMConstAllOnes(src_vec_type); + mask = LLVMConstBitCast(mask, src_vec_type); + LLVMValueRef scale = LLVMConstInt(i8_type, 1, 0); + + LLVMValueRef args[] = { passthru, base_ptr, offsets, mask, scale }; + + res = lp_build_intrinsic(builder, intrinsic, src_vec_type, args, 5, 0); + } + res = LLVMBuildBitCast(builder, res, lp_build_vec_type(gallivm, res_type), ""); + + return res; +} + + +/** * Gather elements from scatter positions in memory into a single vector. * Use for fetching texels from a texture. * For SSE, typical values are length=4, src_width=32, dst_width=32. @@ -147,9 +371,11 @@ * * @param length length of the offsets * @param src_width src element width in bits - * @param dst_width result element width in bits (src will be expanded to fit) + * @param dst_type result element type (src will be expanded to fit, + * but truncation is not allowed) + * (this may be a vector, must be pot sized) * @param aligned whether the data is guaranteed to be aligned (to src_width) - * @param base_ptr base pointer, should be a i8 pointer type. + * @param base_ptr base pointer, needs to be a i8 pointer type. * @param offsets vector with offsets * @param vector_justify select vector rather than integer justification */ @@ -157,34 +383,174 @@ lp_build_gather(struct gallivm_state *gallivm, unsigned length, unsigned src_width, - unsigned dst_width, + struct lp_type dst_type, boolean aligned, LLVMValueRef base_ptr, LLVMValueRef offsets, boolean vector_justify) { LLVMValueRef res; + boolean need_expansion = src_width < dst_type.width * dst_type.length; + boolean vec_fetch; + struct lp_type fetch_type, fetch_dst_type; + LLVMTypeRef src_type; + + assert(src_width <= dst_type.width * dst_type.length); + + /* + * This is quite a mess... + * Figure out if the fetch should be done as: + * a) scalar or vector + * b) float or int + * + * As an example, for a 96bit fetch expanded into 4x32bit, it is better + * to use (3x32bit) vector type (then pad the vector). Otherwise, the + * zext will cause extra instructions. + * However, the same isn't true for 3x16bit (the codegen for that is + * completely worthless on x86 simd, and for 3x8bit is is way worse + * still, don't try that... (To get really good code out of llvm for + * these cases, the only way is to decompose the fetches manually + * into 1x32bit/1x16bit, or 1x16/1x8bit respectively, although the latter + * case requires sse41, otherwise simple scalar zext is way better. + * But probably not important enough, so don't bother.) + * Also, we try to honor the floating bit of destination (but isn't + * possible if caller asks for instance for 2x32bit dst_type with + * 48bit fetch - the idea would be to use 3x16bit fetch, pad and + * cast to 2x32f type, so the fetch is always int and on top of that + * we avoid the vec pad and use scalar zext due the above mentioned + * issue). + * Note this is optimized for x86 sse2 and up backend. Could be tweaked + * for other archs if necessary... + */ + if (((src_width % 32) == 0) && ((src_width % dst_type.width) == 0) && + (dst_type.length > 1)) { + /* use vector fetch (if dst_type is vector) */ + vec_fetch = TRUE; + if (dst_type.floating) { + fetch_type = lp_type_float_vec(dst_type.width, src_width); + } else { + fetch_type = lp_type_int_vec(dst_type.width, src_width); + } + /* intentionally not using lp_build_vec_type here */ + src_type = LLVMVectorType(lp_build_elem_type(gallivm, fetch_type), + fetch_type.length); + fetch_dst_type = fetch_type; + fetch_dst_type.length = dst_type.length; + } else { + /* use scalar fetch */ + vec_fetch = FALSE; + if (dst_type.floating && ((src_width == 32) || (src_width == 64))) { + fetch_type = lp_type_float(src_width); + } else { + fetch_type = lp_type_int(src_width); + } + src_type = lp_build_vec_type(gallivm, fetch_type); + fetch_dst_type = fetch_type; + fetch_dst_type.width = dst_type.width * dst_type.length; + } if (length == 1) { /* Scalar */ - return lp_build_gather_elem(gallivm, length, - src_width, dst_width, aligned, - base_ptr, offsets, 0, vector_justify); + res = lp_build_gather_elem_vec(gallivm, length, + src_width, src_type, fetch_dst_type, + aligned, base_ptr, offsets, 0, + vector_justify); + return LLVMBuildBitCast(gallivm->builder, res, + lp_build_vec_type(gallivm, dst_type), ""); + /* + * Excluding expansion from these paths because if you need it for + * 32bit/64bit fetches you're doing it wrong (this is gather, not + * conversion) and it would be awkward for floats. + */ + } else if (util_cpu_caps.has_avx2 && !need_expansion && + src_width == 32 && (length == 4 || length == 8)) { + return lp_build_gather_avx2(gallivm, length, src_width, dst_type, + base_ptr, offsets); + /* + * This looks bad on paper wrt throughtput/latency on Haswell. + * Even on Broadwell it doesn't look stellar. + * Albeit no measurements were done (but tested to work). + * Should definitely enable on Skylake. + * (In general, should be more of a win if the fetch is 256bit wide - + * this is true for the 32bit case above too.) + */ + } else if (0 && util_cpu_caps.has_avx2 && !need_expansion && + src_width == 64 && (length == 2 || length == 4)) { + return lp_build_gather_avx2(gallivm, length, src_width, dst_type, + base_ptr, offsets); } else { /* Vector */ - LLVMTypeRef dst_elem_type = LLVMIntTypeInContext(gallivm->context, dst_width); - LLVMTypeRef dst_vec_type = LLVMVectorType(dst_elem_type, length); + LLVMValueRef elems[LP_MAX_VECTOR_WIDTH / 8]; unsigned i; - - res = LLVMGetUndef(dst_vec_type); + boolean vec_zext = FALSE; + struct lp_type res_type, gather_res_type; + LLVMTypeRef res_t, gather_res_t; + + res_type = fetch_dst_type; + res_type.length *= length; + gather_res_type = res_type; + + if (src_width == 16 && dst_type.width == 32 && dst_type.length == 1) { + /* + * Note that llvm is never able to optimize zext/insert combos + * directly (i.e. zero the simd reg, then place the elements into + * the appropriate place directly). (I think this has to do with + * scalar/vector transition.) And scalar 16->32bit zext simd loads + * aren't possible (instead loading to scalar reg first). + * No idea about other archs... + * We could do this manually, but instead we just use a vector + * zext, which is simple enough (and, in fact, llvm might optimize + * this away). + * (We're not trying that with other bit widths as that might not be + * easier, in particular with 8 bit values at least with only sse2.) + */ + assert(vec_fetch == FALSE); + gather_res_type.width /= 2; + fetch_dst_type = fetch_type; + src_type = lp_build_vec_type(gallivm, fetch_type); + vec_zext = TRUE; + } + res_t = lp_build_vec_type(gallivm, res_type); + gather_res_t = lp_build_vec_type(gallivm, gather_res_type); + res = LLVMGetUndef(gather_res_t); for (i = 0; i < length; ++i) { LLVMValueRef index = lp_build_const_int32(gallivm, i); - LLVMValueRef elem; - elem = lp_build_gather_elem(gallivm, length, - src_width, dst_width, aligned, - base_ptr, offsets, i, vector_justify); - res = LLVMBuildInsertElement(gallivm->builder, res, elem, index, ""); + elems[i] = lp_build_gather_elem_vec(gallivm, length, + src_width, src_type, fetch_dst_type, + aligned, base_ptr, offsets, i, + vector_justify); + if (!vec_fetch) { + res = LLVMBuildInsertElement(gallivm->builder, res, elems[i], index, ""); + } + } + if (vec_zext) { + res = LLVMBuildZExt(gallivm->builder, res, res_t, ""); + if (vector_justify) { +#ifdef PIPE_ARCH_BIG_ENDIAN + unsigned sv = dst_type.width - src_width; + res = LLVMBuildShl(gallivm->builder, res, + lp_build_const_int_vec(gallivm, res_type, sv), ""); +#endif + } + } + if (vec_fetch) { + /* + * Do bitcast now otherwise llvm might get some funny ideas wrt + * float/int types... + */ + for (i = 0; i < length; i++) { + elems[i] = LLVMBuildBitCast(gallivm->builder, elems[i], + lp_build_vec_type(gallivm, dst_type), ""); + } + res = lp_build_concat(gallivm, elems, dst_type, length); + } else { + struct lp_type really_final_type = dst_type; + assert(res_type.length * res_type.width == + dst_type.length * dst_type.width * length); + really_final_type.length *= length; + res = LLVMBuildBitCast(gallivm->builder, res, + lp_build_vec_type(gallivm, really_final_type), ""); } } diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_gather.h mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_gather.h --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_gather.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_gather.h 2017-06-01 10:37:10.000000000 +0000 @@ -55,7 +55,7 @@ lp_build_gather(struct gallivm_state *gallivm, unsigned length, unsigned src_width, - unsigned dst_width, + struct lp_type dst_type, boolean aligned, LLVMValueRef base_ptr, LLVMValueRef offsets, diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_init.c mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_init.c --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_init.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_init.c 2017-06-01 10:37:10.000000000 +0000 @@ -48,8 +48,12 @@ # define USE_MCJIT 1 #elif defined(PIPE_ARCH_PPC_64) || defined(PIPE_ARCH_S390) || defined(PIPE_ARCH_ARM) || defined(PIPE_ARCH_AARCH64) # define USE_MCJIT 1 +#endif + +#if defined(USE_MCJIT) +static const bool use_mcjit = USE_MCJIT; #else -static bool USE_MCJIT = 0; +static bool use_mcjit = FALSE; #endif @@ -121,19 +125,6 @@ LLVMAddTargetData(gallivm->target, gallivm->passmgr); #endif - /* Setting the module's DataLayout to an empty string will cause the - * ExecutionEngine to copy to the DataLayout string from its target - * machine to the module. As of LLVM 3.8 the module and the execution - * engine are required to have the same DataLayout. - * - * TODO: This is just a temporary work-around. The correct solution is - * for gallivm_init_state() to create a TargetMachine and pull the - * DataLayout from there. Currently, the TargetMachine used by llvmpipe - * is being implicitly created by the EngineBuilder in - * lp_build_create_jit_compiler_for_module() - */ - -#if HAVE_LLVM < 0x0308 { char *td_str; // New ones from the Module. @@ -141,9 +132,6 @@ LLVMSetDataLayout(gallivm->module, td_str); free(td_str); } -#else - LLVMSetDataLayout(gallivm->module, ""); -#endif if ((gallivm_debug & GALLIVM_DEBUG_NO_OPT) == 0) { /* These are the passes currently listed in llvm-c/Transforms/Scalar.h, @@ -190,7 +178,7 @@ FREE(gallivm->module_name); - if (!USE_MCJIT) { + if (!use_mcjit) { /* Don't free the TargetData, it's owned by the exec engine */ } else { if (gallivm->target) { @@ -248,7 +236,7 @@ gallivm->module, gallivm->memorymgr, (unsigned) optlevel, - USE_MCJIT, + use_mcjit, &error); if (ret) { _debug_printf("%s\n", error); @@ -257,7 +245,7 @@ } } - if (!USE_MCJIT) { + if (!use_mcjit) { gallivm->target = LLVMGetExecutionEngineTargetData(gallivm->engine); if (!gallivm->target) goto fail; @@ -336,7 +324,7 @@ * complete when MC-JIT is created. So defer the MC-JIT engine creation for * now. */ - if (!USE_MCJIT) { + if (!use_mcjit) { if (!init_gallivm_engine(gallivm)) { goto fail; } @@ -395,10 +383,21 @@ if (gallivm_initialized) return TRUE; - LLVMLinkInMCJIT(); -#if !defined(USE_MCJIT) - USE_MCJIT = debug_get_bool_option("GALLIVM_MCJIT", 0); + + /* LLVMLinkIn* are no-ops at runtime. They just ensure the respective + * component is linked at buildtime, which is sufficient for its static + * constructors to be called at load time. + */ +#if defined(USE_MCJIT) +# if USE_MCJIT + LLVMLinkInMCJIT(); +# else + LLVMLinkInJIT(); +# endif +#else + use_mcjit = debug_get_bool_option("GALLIVM_MCJIT", FALSE); LLVMLinkInJIT(); + LLVMLinkInMCJIT(); #endif #ifdef DEBUG @@ -420,6 +419,7 @@ util_cpu_caps.has_avx = 0; util_cpu_caps.has_avx2 = 0; util_cpu_caps.has_f16c = 0; + util_cpu_caps.has_fma = 0; } #endif @@ -454,6 +454,12 @@ util_cpu_caps.has_avx = 0; util_cpu_caps.has_avx2 = 0; util_cpu_caps.has_f16c = 0; + util_cpu_caps.has_fma = 0; + } + if (HAVE_LLVM < 0x0304 || !use_mcjit) { + /* AVX2 support has only been tested with LLVM 3.4, and it requires + * MCJIT. */ + util_cpu_caps.has_avx2 = 0; } #ifdef PIPE_ARCH_PPC_64 @@ -599,10 +605,31 @@ util_snprintf(filename, sizeof(filename), "ir_%s.bc", gallivm->module_name); LLVMWriteBitcodeToFile(gallivm->module, filename); debug_printf("%s written\n", filename); - debug_printf("Invoke as \"llc -o - %s\"\n", filename); + debug_printf("Invoke as \"llc %s%s -o - %s\"\n", + (HAVE_LLVM >= 0x0305) ? "[-mcpu=<-mcpu option] " : "", + "[-mattr=<-mattr option(s)>]", + filename); } - if (USE_MCJIT) { + if (use_mcjit) { + /* Setting the module's DataLayout to an empty string will cause the + * ExecutionEngine to copy to the DataLayout string from its target + * machine to the module. As of LLVM 3.8 the module and the execution + * engine are required to have the same DataLayout. + * + * We must make sure we do this after running the optimization passes, + * because those passes need a correct datalayout string. For example, + * if those optimization passes see an empty datalayout, they will assume + * this is a little endian target and will do optimizations that break big + * endian machines. + * + * TODO: This is just a temporary work-around. The correct solution is + * for gallivm_init_state() to create a TargetMachine and pull the + * DataLayout from there. Currently, the TargetMachine used by llvmpipe + * is being implicitly created by the EngineBuilder in + * lp_build_create_jit_compiler_for_module() + */ + LLVMSetDataLayout(gallivm->module, ""); assert(!gallivm->engine); if (!init_gallivm_engine(gallivm)) { assert(0); @@ -652,13 +679,24 @@ { void *code; func_pointer jit_func; + int64_t time_begin = 0; assert(gallivm->compiled); assert(gallivm->engine); + if (gallivm_debug & GALLIVM_DEBUG_PERF) + time_begin = os_time_get(); + code = LLVMGetPointerToGlobal(gallivm->engine, func); assert(code); jit_func = pointer_to_func(code); + if (gallivm_debug & GALLIVM_DEBUG_PERF) { + int64_t time_end = os_time_get(); + int time_msec = (int)(time_end - time_begin) / 1000; + debug_printf(" jitting func %s took %d msec\n", + LLVMGetValueName(func), time_msec); + } + return jit_func; } diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_intr.c mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_intr.c --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_intr.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_intr.c 2017-06-01 10:37:10.000000000 +0000 @@ -46,6 +46,7 @@ #include "util/u_debug.h" #include "util/u_string.h" +#include "util/bitscan.h" #include "lp_bld_const.h" #include "lp_bld_intr.h" @@ -120,13 +121,73 @@ } +#if HAVE_LLVM < 0x0400 +static LLVMAttribute lp_attr_to_llvm_attr(enum lp_func_attr attr) +{ + switch (attr) { + case LP_FUNC_ATTR_ALWAYSINLINE: return LLVMAlwaysInlineAttribute; + case LP_FUNC_ATTR_BYVAL: return LLVMByValAttribute; + case LP_FUNC_ATTR_INREG: return LLVMInRegAttribute; + case LP_FUNC_ATTR_NOALIAS: return LLVMNoAliasAttribute; + case LP_FUNC_ATTR_NOUNWIND: return LLVMNoUnwindAttribute; + case LP_FUNC_ATTR_READNONE: return LLVMReadNoneAttribute; + case LP_FUNC_ATTR_READONLY: return LLVMReadOnlyAttribute; + default: + _debug_printf("Unhandled function attribute: %x\n", attr); + return 0; + } +} + +#else + +static const char *attr_to_str(enum lp_func_attr attr) +{ + switch (attr) { + case LP_FUNC_ATTR_ALWAYSINLINE: return "alwaysinline"; + case LP_FUNC_ATTR_BYVAL: return "byval"; + case LP_FUNC_ATTR_INREG: return "inreg"; + case LP_FUNC_ATTR_NOALIAS: return "noalias"; + case LP_FUNC_ATTR_NOUNWIND: return "nounwind"; + case LP_FUNC_ATTR_READNONE: return "readnone"; + case LP_FUNC_ATTR_READONLY: return "readonly"; + default: + _debug_printf("Unhandled function attribute: %x\n", attr); + return 0; + } +} + +#endif + +void +lp_add_function_attr(LLVMValueRef function, + int attr_idx, + enum lp_func_attr attr) +{ + +#if HAVE_LLVM < 0x0400 + LLVMAttribute llvm_attr = lp_attr_to_llvm_attr(attr); + if (attr_idx == -1) { + LLVMAddFunctionAttr(function, llvm_attr); + } else { + LLVMAddAttribute(LLVMGetParam(function, attr_idx - 1), llvm_attr); + } +#else + LLVMContextRef context = LLVMGetModuleContext(LLVMGetGlobalParent(function)); + const char *attr_name = attr_to_str(attr); + unsigned kind_id = LLVMGetEnumAttributeKindForName(attr_name, + strlen(attr_name)); + LLVMAttributeRef llvm_attr = LLVMCreateEnumAttribute(context, kind_id, 0); + LLVMAddAttributeAtIndex(function, attr_idx, llvm_attr); +#endif +} + LLVMValueRef lp_build_intrinsic(LLVMBuilderRef builder, const char *name, LLVMTypeRef ret_type, LLVMValueRef *args, unsigned num_args, - LLVMAttribute attr) + unsigned attr_mask) { LLVMModuleRef module = LLVMGetGlobalParent(LLVMGetBasicBlockParent(LLVMGetInsertBlock(builder))); LLVMValueRef function; @@ -145,8 +206,15 @@ function = lp_declare_intrinsic(module, name, ret_type, arg_types, num_args); - if (attr) - LLVMAddFunctionAttr(function, attr); + /* NoUnwind indicates that the intrinsic never raises a C++ exception. + * Set it for all intrinsics. + */ + attr_mask |= LP_FUNC_ATTR_NOUNWIND; + + while (attr_mask) { + enum lp_func_attr attr = 1 << u_bit_scan(&attr_mask); + lp_add_function_attr(function, -1, attr); + } if (gallivm_debug & GALLIVM_DEBUG_IR) { lp_debug_dump_value(function); diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_intr.h mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_intr.h --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_intr.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_intr.h 2017-06-01 10:37:10.000000000 +0000 @@ -46,6 +46,16 @@ */ #define LP_MAX_FUNC_ARGS 32 +enum lp_func_attr { + LP_FUNC_ATTR_ALWAYSINLINE = (1 << 0), + LP_FUNC_ATTR_BYVAL = (1 << 1), + LP_FUNC_ATTR_INREG = (1 << 2), + LP_FUNC_ATTR_NOALIAS = (1 << 3), + LP_FUNC_ATTR_NOUNWIND = (1 << 4), + LP_FUNC_ATTR_READNONE = (1 << 5), + LP_FUNC_ATTR_READONLY = (1 << 6), + LP_FUNC_ATTR_LAST = (1 << 7) +}; void lp_format_intrinsic(char *name, @@ -60,13 +70,18 @@ LLVMTypeRef *arg_types, unsigned num_args); +void +lp_add_function_attr(LLVMValueRef function, + int attr_idx, + enum lp_func_attr attr); + LLVMValueRef lp_build_intrinsic(LLVMBuilderRef builder, const char *name, LLVMTypeRef ret_type, LLVMValueRef *args, unsigned num_args, - LLVMAttribute attr); + unsigned attr_mask); LLVMValueRef diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_limits.h mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_limits.h --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_limits.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_limits.h 2017-06-01 10:37:10.000000000 +0000 @@ -140,6 +140,7 @@ case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED: case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: + case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: return 0; case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: return 32; diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_logic.c mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_logic.c --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_logic.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_logic.c 2017-06-01 10:37:10.000000000 +0000 @@ -88,8 +88,6 @@ LLVMValueRef cond; LLVMValueRef res; - assert(func >= PIPE_FUNC_NEVER); - assert(func <= PIPE_FUNC_ALWAYS); assert(lp_check_value(type, a)); assert(lp_check_value(type, b)); @@ -98,6 +96,9 @@ if(func == PIPE_FUNC_ALWAYS) return ones; + assert(func > PIPE_FUNC_NEVER); + assert(func < PIPE_FUNC_ALWAYS); + if(type.floating) { LLVMRealPredicate op; switch(func) { @@ -176,8 +177,6 @@ LLVMValueRef zeros = LLVMConstNull(int_vec_type); LLVMValueRef ones = LLVMConstAllOnes(int_vec_type); - assert(func >= PIPE_FUNC_NEVER); - assert(func <= PIPE_FUNC_ALWAYS); assert(lp_check_value(type, a)); assert(lp_check_value(type, b)); @@ -186,6 +185,9 @@ if(func == PIPE_FUNC_ALWAYS) return ones; + assert(func > PIPE_FUNC_NEVER); + assert(func < PIPE_FUNC_ALWAYS); + #if defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64) /* * There are no unsigned integer comparison instructions in SSE. @@ -325,6 +327,8 @@ * supported yet for a long time, and LLVM will generate poor code when * the mask is not the result of a comparison. * Also, llvm 3.7 may miscompile them (bug 94972). + * XXX: Even if the instruction was an SExt, this may still produce + * terrible code. Try piglit stencil-twoside. */ /* Convert the mask to a vector of booleans. @@ -346,7 +350,9 @@ else if (((util_cpu_caps.has_sse4_1 && type.width * type.length == 128) || (util_cpu_caps.has_avx && - type.width * type.length == 256 && type.width >= 32)) && + type.width * type.length == 256 && type.width >= 32) || + (util_cpu_caps.has_avx2 && + type.width * type.length == 256)) && !LLVMIsConstant(a) && !LLVMIsConstant(b) && !LLVMIsConstant(mask)) { @@ -363,9 +369,13 @@ intrinsic = "llvm.x86.avx.blendv.pd.256"; arg_type = LLVMVectorType(LLVMDoubleTypeInContext(lc), 4); } - else { + else if (type.width == 32) { intrinsic = "llvm.x86.avx.blendv.ps.256"; arg_type = LLVMVectorType(LLVMFloatTypeInContext(lc), 8); + } else { + assert(util_cpu_caps.has_avx2); + intrinsic = "llvm.x86.avx2.pblendvb"; + arg_type = LLVMVectorType(LLVMInt8TypeInContext(lc), 32); } } else if (type.floating && diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -77,6 +77,9 @@ #include +#if HAVE_LLVM >= 0x0305 +#include +#endif #include #include #include @@ -98,6 +101,7 @@ #include "util/u_cpu_detect.h" #include "lp_bld_misc.h" +#include "lp_bld_debug.h" namespace { @@ -539,6 +543,20 @@ llvm::SmallVector MAttrs; #if defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64) +#if HAVE_LLVM >= 0x0400 + /* llvm-3.7+ implements sys::getHostCPUFeatures for x86, + * which allows us to enable/disable code generation based + * on the results of cpuid. + */ + llvm::StringMap features; + llvm::sys::getHostCPUFeatures(features); + + for (StringMapIterator f = features.begin(); + f != features.end(); + ++f) { + MAttrs.push_back(((*f).second ? "+" : "-") + (*f).first().str()); + } +#else /* * We need to unset attributes because sometimes LLVM mistakenly assumes * certain features are present given the processor name. @@ -570,6 +588,15 @@ */ MAttrs.push_back(util_cpu_caps.has_avx ? "+avx" : "-avx"); MAttrs.push_back(util_cpu_caps.has_f16c ? "+f16c" : "-f16c"); + if (HAVE_LLVM >= 0x0304) { + MAttrs.push_back(util_cpu_caps.has_fma ? "+fma" : "-fma"); + } else { + /* + * The old JIT in LLVM 3.3 has a bug encoding llvm.fmuladd.f32 and + * llvm.fmuladd.v2f32 intrinsics when FMA is available. + */ + MAttrs.push_back("-fma"); + } MAttrs.push_back(util_cpu_caps.has_avx2 ? "+avx2" : "-avx2"); /* disable avx512 and all subvariants */ #if HAVE_LLVM >= 0x0304 @@ -584,10 +611,12 @@ MAttrs.push_back("-avx512vl"); #endif #endif +#endif #if defined(PIPE_ARCH_PPC) MAttrs.push_back(util_cpu_caps.has_altivec ? "+altivec" : "-altivec"); -#if HAVE_LLVM >= 0x0304 +#if (HAVE_LLVM >= 0x0304) +#if (HAVE_LLVM <= 0x0307) || (HAVE_LLVM == 0x0308 && MESA_LLVM_VERSION_PATCH == 0) /* * Make sure VSX instructions are disabled * See LLVM bug https://llvm.org/bugs/show_bug.cgi?id=25503#c7 @@ -595,11 +624,32 @@ if (util_cpu_caps.has_altivec) { MAttrs.push_back("-vsx"); } +#else + /* + * However, bug 25503 is fixed, by the same fix that fixed + * bug 26775, in versions of LLVM later than 3.8 (starting with 3.8.1): + * Make sure VSX instructions are ENABLED + * See LLVM bug https://llvm.org/bugs/show_bug.cgi?id=26775 + */ + if (util_cpu_caps.has_altivec) { + MAttrs.push_back("+vsx"); + } +#endif #endif #endif builder.setMAttrs(MAttrs); + if (gallivm_debug & (GALLIVM_DEBUG_IR | GALLIVM_DEBUG_ASM | GALLIVM_DEBUG_DUMP_BC)) { + int n = MAttrs.size(); + if (n > 0) { + debug_printf("llc -mattr option(s): "); + for (int i = 0; i < n; i++) + debug_printf("%s%s", MAttrs[i].c_str(), (i < n - 1) ? "," : ""); + debug_printf("\n"); + } + } + #if HAVE_LLVM >= 0x0305 StringRef MCPU = llvm::sys::getHostCPUName(); /* @@ -614,7 +664,23 @@ * when not using MCJIT so no instructions are generated which the old JIT * can't handle. Not entirely sure if we really need to do anything yet. */ +#if defined(PIPE_ARCH_LITTLE_ENDIAN) && defined(PIPE_ARCH_PPC_64) + /* + * Versions of LLVM prior to 4.0 lacked a table entry for "POWER8NVL", + * resulting in (big-endian) "generic" being returned on + * little-endian Power8NVL systems. The result was that code that + * attempted to load the least significant 32 bits of a 64-bit quantity + * from memory loaded the wrong half. This resulted in failures in some + * Piglit tests, e.g. + * .../arb_gpu_shader_fp64/execution/conversion/frag-conversion-explicit-double-uint + */ + if (MCPU == "generic") + MCPU = "pwr8"; +#endif builder.setMCPU(MCPU); + if (gallivm_debug & (GALLIVM_DEBUG_IR | GALLIVM_DEBUG_ASM | GALLIVM_DEBUG_DUMP_BC)) { + debug_printf("llc -mcpu option: %s\n", MCPU.str().c_str()); + } #endif ShaderMemoryManager *MM = NULL; @@ -688,3 +754,52 @@ { delete reinterpret_cast(memorymgr); } + +extern "C" void +lp_add_attr_dereferenceable(LLVMValueRef val, uint64_t bytes) +{ +#if HAVE_LLVM >= 0x0306 + llvm::Argument *A = llvm::unwrap(val); + llvm::AttrBuilder B; + B.addDereferenceableAttr(bytes); + A->addAttr(llvm::AttributeSet::get(A->getContext(), A->getArgNo() + 1, B)); +#endif +} + +extern "C" LLVMValueRef +lp_get_called_value(LLVMValueRef call) +{ +#if HAVE_LLVM >= 0x0309 + return LLVMGetCalledValue(call); +#elif HAVE_LLVM >= 0x0305 + return llvm::wrap(llvm::CallSite(llvm::unwrap(call)).getCalledValue()); +#else + return NULL; /* radeonsi doesn't support so old LLVM. */ +#endif +} + +extern "C" bool +lp_is_function(LLVMValueRef v) +{ +#if HAVE_LLVM >= 0x0309 + return LLVMGetValueKind(v) == LLVMFunctionValueKind; +#else + return llvm::isa(llvm::unwrap(v)); +#endif +} + +extern "C" LLVMBuilderRef +lp_create_builder(LLVMContextRef ctx, bool unsafe_fpmath) +{ + LLVMBuilderRef builder = LLVMCreateBuilderInContext(ctx); + +#if HAVE_LLVM >= 0x0308 + if (unsafe_fpmath) { + llvm::FastMathFlags flags; + flags.setUnsafeAlgebra(); + llvm::unwrap(builder)->setFastMathFlags(flags); + } +#endif + + return builder; +} diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_misc.h mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_misc.h --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_misc.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_misc.h 2017-06-01 10:37:10.000000000 +0000 @@ -73,6 +73,18 @@ extern void lp_free_memory_manager(LLVMMCJITMemoryManagerRef memorymgr); +extern void +lp_add_attr_dereferenceable(LLVMValueRef val, uint64_t bytes); + +extern LLVMValueRef +lp_get_called_value(LLVMValueRef call); + +extern bool +lp_is_function(LLVMValueRef v); + +extern LLVMBuilderRef +lp_create_builder(LLVMContextRef ctx, bool unsafe_fpmath); + #ifdef __cplusplus } #endif diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_pack.c mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_pack.c --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_pack.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_pack.c 2017-06-01 10:37:10.000000000 +0000 @@ -236,7 +236,7 @@ unsigned num_dsts) { int size = num_srcs / num_dsts; - int i; + unsigned i; assert(num_srcs >= num_dsts); assert((num_srcs % size) == 0); @@ -346,10 +346,10 @@ */ LLVMValueRef lp_build_interleave2_half(struct gallivm_state *gallivm, - struct lp_type type, - LLVMValueRef a, - LLVMValueRef b, - unsigned lo_hi) + struct lp_type type, + LLVMValueRef a, + LLVMValueRef b, + unsigned lo_hi) { if (type.length * type.width == 256) { LLVMValueRef shuffle = lp_build_const_unpack_shuffle_half(gallivm, type.length, lo_hi); @@ -359,11 +359,13 @@ } } + /** * Double the bit width. * * This will only change the number of bits the values are represented, not the * values themselves. + * */ void lp_build_unpack2(struct gallivm_state *gallivm, @@ -394,6 +396,65 @@ #ifdef PIPE_ARCH_LITTLE_ENDIAN *dst_lo = lp_build_interleave2(gallivm, src_type, src, msb, 0); *dst_hi = lp_build_interleave2(gallivm, src_type, src, msb, 1); + +#else + *dst_lo = lp_build_interleave2(gallivm, src_type, msb, src, 0); + *dst_hi = lp_build_interleave2(gallivm, src_type, msb, src, 1); +#endif + + /* Cast the result into the new type (twice as wide) */ + + dst_vec_type = lp_build_vec_type(gallivm, dst_type); + + *dst_lo = LLVMBuildBitCast(builder, *dst_lo, dst_vec_type, ""); + *dst_hi = LLVMBuildBitCast(builder, *dst_hi, dst_vec_type, ""); +} + + +/** + * Double the bit width, with an order which fits the cpu nicely. + * + * This will only change the number of bits the values are represented, not the + * values themselves. + * + * The order of the results is not guaranteed, other than it will match + * the corresponding lp_build_pack2_native call. + */ +void +lp_build_unpack2_native(struct gallivm_state *gallivm, + struct lp_type src_type, + struct lp_type dst_type, + LLVMValueRef src, + LLVMValueRef *dst_lo, + LLVMValueRef *dst_hi) +{ + LLVMBuilderRef builder = gallivm->builder; + LLVMValueRef msb; + LLVMTypeRef dst_vec_type; + + assert(!src_type.floating); + assert(!dst_type.floating); + assert(dst_type.width == src_type.width * 2); + assert(dst_type.length * 2 == src_type.length); + + if(dst_type.sign && src_type.sign) { + /* Replicate the sign bit in the most significant bits */ + msb = LLVMBuildAShr(builder, src, + lp_build_const_int_vec(gallivm, src_type, src_type.width - 1), ""); + } + else + /* Most significant bits always zero */ + msb = lp_build_zero(gallivm, src_type); + + /* Interleave bits */ +#ifdef PIPE_ARCH_LITTLE_ENDIAN + if (src_type.length * src_type.width == 256 && util_cpu_caps.has_avx2) { + *dst_lo = lp_build_interleave2_half(gallivm, src_type, src, msb, 0); + *dst_hi = lp_build_interleave2_half(gallivm, src_type, src, msb, 1); + } else { + *dst_lo = lp_build_interleave2(gallivm, src_type, src, msb, 0); + *dst_hi = lp_build_interleave2(gallivm, src_type, src, msb, 1); + } #else *dst_lo = lp_build_interleave2(gallivm, src_type, msb, src, 0); *dst_hi = lp_build_interleave2(gallivm, src_type, msb, src, 1); @@ -440,7 +501,8 @@ tmp_type.length /= 2; for(i = num_tmps; i--; ) { - lp_build_unpack2(gallivm, src_type, tmp_type, dst[i], &dst[2*i + 0], &dst[2*i + 1]); + lp_build_unpack2(gallivm, src_type, tmp_type, dst[i], &dst[2*i + 0], + &dst[2*i + 1]); } src_type = tmp_type; @@ -605,6 +667,70 @@ } +/** + * Non-interleaved native pack. + * + * Similar to lp_build_pack2, but the ordering of values is not + * guaranteed, other than it will match lp_build_unpack2_native. + * + * In particular, with avx2, the lower and upper 128bits of the vectors will + * be packed independently, so that (with 32bit->16bit values) + * (LSB) (MSB) + * lo = l0 __ l1 __ l2 __ l3 __ l4 __ l5 __ l6 __ l7 __ + * hi = h0 __ h1 __ h2 __ h3 __ h4 __ h5 __ h6 __ h7 __ + * res = l0 l1 l2 l3 h0 h1 h2 h3 l4 l5 l6 l7 h4 h5 h6 h7 + * + * This will only change the number of bits the values are represented, not the + * values themselves. + * + * It is assumed the values are already clamped into the destination type range. + * Values outside that range will produce undefined results. + */ +LLVMValueRef +lp_build_pack2_native(struct gallivm_state *gallivm, + struct lp_type src_type, + struct lp_type dst_type, + LLVMValueRef lo, + LLVMValueRef hi) +{ + LLVMBuilderRef builder = gallivm->builder; + struct lp_type intr_type = dst_type; + const char *intrinsic = NULL; + + assert(!src_type.floating); + assert(!dst_type.floating); + assert(src_type.width == dst_type.width * 2); + assert(src_type.length * 2 == dst_type.length); + + /* At this point only have special case for avx2 */ + if (src_type.length * src_type.width == 256 && + util_cpu_caps.has_avx2) { + switch(src_type.width) { + case 32: + if (dst_type.sign) { + intrinsic = "llvm.x86.avx2.packssdw"; + } else { + intrinsic = "llvm.x86.avx2.packusdw"; + } + break; + case 16: + if (dst_type.sign) { + intrinsic = "llvm.x86.avx2.packsswb"; + } else { + intrinsic = "llvm.x86.avx2.packuswb"; + } + break; + } + } + if (intrinsic) { + LLVMTypeRef intr_vec_type = lp_build_vec_type(gallivm, intr_type); + return lp_build_intrinsic_binary(builder, intrinsic, intr_vec_type, + lo, hi); + } + else { + return lp_build_pack2(gallivm, src_type, dst_type, lo, hi); + } +} /** * Non-interleaved pack and saturate. @@ -640,7 +766,8 @@ if(clamp) { struct lp_build_context bld; unsigned dst_bits = dst_type.sign ? dst_type.width - 1 : dst_type.width; - LLVMValueRef dst_max = lp_build_const_int_vec(gallivm, src_type, ((unsigned long long)1 << dst_bits) - 1); + LLVMValueRef dst_max = lp_build_const_int_vec(gallivm, src_type, + ((unsigned long long)1 << dst_bits) - 1); lp_build_context_init(&bld, gallivm, src_type); lo = lp_build_min(&bld, lo, dst_max); hi = lp_build_min(&bld, hi, dst_max); diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_pack.h mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_pack.h --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_pack.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_pack.h 2017-06-01 10:37:10.000000000 +0000 @@ -74,6 +74,14 @@ void +lp_build_unpack2_native(struct gallivm_state *gallivm, + struct lp_type src_type, + struct lp_type dst_type, + LLVMValueRef src, + LLVMValueRef *dst_lo, + LLVMValueRef *dst_hi); + +void lp_build_unpack(struct gallivm_state *gallivm, struct lp_type src_type, struct lp_type dst_type, @@ -118,6 +126,14 @@ LLVMValueRef +lp_build_pack2_native(struct gallivm_state *gallivm, + struct lp_type src_type, + struct lp_type dst_type, + LLVMValueRef lo, + LLVMValueRef hi); + + +LLVMValueRef lp_build_pack(struct gallivm_state *gallivm, struct lp_type src_type, struct lp_type dst_type, diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_printf.c mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_printf.c --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_printf.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_printf.c 2017-06-01 10:37:10.000000000 +0000 @@ -155,10 +155,10 @@ } -static int +static unsigned lp_get_printf_arg_count(const char *fmt) { - int count =0; + unsigned count = 0; const char *p = fmt; int c; @@ -195,8 +195,7 @@ { LLVMValueRef params[50]; va_list arglist; - int argcount; - int i; + unsigned argcount, i; argcount = lp_get_printf_arg_count(fmt); assert(ARRAY_SIZE(params) >= argcount + 1); diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_sample_aos.c mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_sample_aos.c --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_sample_aos.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_sample_aos.c 2017-06-01 10:37:10.000000000 +0000 @@ -579,10 +579,12 @@ LLVMValueRef rgba8; struct lp_build_context u8n; LLVMTypeRef u8n_vec_type; + struct lp_type fetch_type; lp_build_context_init(&u8n, bld->gallivm, lp_type_unorm(8, bld->vector_width)); u8n_vec_type = lp_build_vec_type(bld->gallivm, u8n.type); + fetch_type = lp_type_uint(bld->texel_type.width); if (util_format_is_rgba8_variant(bld->format_desc)) { /* * Given the format is a rgba8, just read the pixels as is, @@ -591,7 +593,7 @@ rgba8 = lp_build_gather(bld->gallivm, bld->texel_type.length, bld->format_desc->block.bits, - bld->texel_type.width, + fetch_type, TRUE, data_ptr, offset, TRUE); @@ -925,14 +927,16 @@ LLVMValueRef rgba8; if (util_format_is_rgba8_variant(bld->format_desc)) { + struct lp_type fetch_type; /* * Given the format is a rgba8, just read the pixels as is, * without any swizzling. Swizzling will be done later. */ + fetch_type = lp_type_uint(bld->texel_type.width); rgba8 = lp_build_gather(bld->gallivm, bld->texel_type.length, bld->format_desc->block.bits, - bld->texel_type.width, + fetch_type, TRUE, data_ptr, offset[k][j][i], TRUE); @@ -1409,6 +1413,9 @@ LLVMValueRef mipoff1 = NULL; LLVMValueRef colors0; LLVMValueRef colors1; + boolean use_floats = util_cpu_caps.has_avx && + !util_cpu_caps.has_avx2 && + bld->coord_type.length > 4; /* sample the first mipmap level */ lp_build_mipmap_level_sizes(bld, ilevel0, @@ -1423,7 +1430,7 @@ mipoff0 = lp_build_get_mip_offsets(bld, ilevel0); } - if (util_cpu_caps.has_avx && bld->coord_type.length > 4) { + if (use_floats) { if (img_filter == PIPE_TEX_FILTER_NEAREST) { lp_build_sample_image_nearest_afloat(bld, size0, @@ -1514,7 +1521,7 @@ mipoff1 = lp_build_get_mip_offsets(bld, ilevel1); } - if (util_cpu_caps.has_avx && bld->coord_type.length > 4) { + if (use_floats) { if (img_filter == PIPE_TEX_FILTER_NEAREST) { lp_build_sample_image_nearest_afloat(bld, size1, diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_sample.c mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_sample.c --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_sample.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_sample.c 2017-06-01 10:37:10.000000000 +0000 @@ -580,10 +580,8 @@ lp_build_ifloor_fract(bld, lod, out_lod_ipart, &lod_fpart); - lod_fpart = lp_build_mul(bld, lod_fpart, - lp_build_const_vec(bld->gallivm, bld->type, factor)); - - lod_fpart = lp_build_add(bld, lod_fpart, + lod_fpart = lp_build_mad(bld, lod_fpart, + lp_build_const_vec(bld->gallivm, bld->type, factor), lp_build_const_vec(bld->gallivm, bld->type, post_offset)); /* @@ -639,10 +637,8 @@ /* fpart = rho / 2**ipart */ lod_fpart = lp_build_extract_mantissa(bld, rho); - lod_fpart = lp_build_mul(bld, lod_fpart, - lp_build_const_vec(bld->gallivm, bld->type, factor)); - - lod_fpart = lp_build_add(bld, lod_fpart, + lod_fpart = lp_build_mad(bld, lod_fpart, + lp_build_const_vec(bld->gallivm, bld->type, factor), lp_build_const_vec(bld->gallivm, bld->type, post_offset)); /* diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_sample_soa.c mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_sample_soa.c --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_sample_soa.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_sample_soa.c 2017-06-01 10:37:10.000000000 +0000 @@ -42,7 +42,7 @@ #include "util/u_math.h" #include "util/u_format.h" #include "util/u_cpu_detect.h" -#include "util/u_format_rgb9e5.h" +#include "util/format_rgb9e5.h" #include "lp_bld_debug.h" #include "lp_bld_type.h" #include "lp_bld_const.h" @@ -60,6 +60,7 @@ #include "lp_bld_struct.h" #include "lp_bld_quad.h" #include "lp_bld_pack.h" +#include "lp_bld_intr.h" /** @@ -158,7 +159,7 @@ lp_build_fetch_rgba_soa(bld->gallivm, bld->format_desc, - bld->texel_type, + bld->texel_type, TRUE, data_ptr, offset, i, j, bld->cache, @@ -2405,7 +2406,7 @@ lp_build_fetch_rgba_soa(bld->gallivm, bld->format_desc, - bld->texel_type, + bld->texel_type, TRUE, bld->base_ptr, offset, i, j, bld->cache, @@ -2860,12 +2861,13 @@ } /* - * we only try 8-wide sampling with soa as it appears to - * be a loss with aos with AVX (but it should work, except - * for conformance if min_filter != mag_filter if num_lods > 1). - * (It should be faster if we'd support avx2) + * we only try 8-wide sampling with soa or if we have AVX2 + * as it appears to be a loss with just AVX) */ - if (num_quads == 1 || !use_aos) { + if (num_quads == 1 || !use_aos || + (util_cpu_caps.has_avx2 && + (bld.num_lods == 1 || + derived_sampler_state.min_img_filter == derived_sampler_state.mag_img_filter))) { if (use_aos) { /* do sampling/filtering with fixed pt arithmetic */ lp_build_sample_aos(&bld, sampler_index, @@ -3315,7 +3317,8 @@ for (i = 0; i < num_param; ++i) { if(LLVMGetTypeKind(arg_types[i]) == LLVMPointerTypeKind) { - LLVMAddAttribute(LLVMGetParam(function, i), LLVMNoAliasAttribute); + + lp_add_function_attr(function, i + 1, LP_FUNC_ATTR_NOALIAS); } } diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_swizzle.c mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_swizzle.c --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_swizzle.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_swizzle.c 2017-06-01 10:37:10.000000000 +0000 @@ -467,7 +467,7 @@ LLVMValueRef res; struct lp_type type4; unsigned cond = 0; - unsigned chan; + int chan; int shift; /* diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c 2017-06-01 10:37:10.000000000 +0000 @@ -368,8 +368,8 @@ TGSI_OPCODE_EX2, floor_x); /* src0.x - floor( src0.x ) */ - emit_data->output[TGSI_CHAN_Y] = lp_build_emit_llvm_binary(bld_base, - TGSI_OPCODE_SUB, emit_data->args[0] /* src0.x */, floor_x); + emit_data->output[TGSI_CHAN_Y] = + lp_build_sub(&bld_base->base, emit_data->args[0] /* src0.x */, floor_x); /* 2 ^ src0.x */ emit_data->output[TGSI_CHAN_Z] = lp_build_emit_llvm_unary(bld_base, @@ -394,8 +394,8 @@ LLVMValueRef tmp; tmp = lp_build_emit_llvm_unary(bld_base, TGSI_OPCODE_FLR, emit_data->args[0]); - emit_data->output[emit_data->chan] = lp_build_emit_llvm_binary(bld_base, - TGSI_OPCODE_SUB, emit_data->args[0], tmp); + emit_data->output[emit_data->chan] = + lp_build_sub(&bld_base->base, emit_data->args[0], tmp); } /* TGSI_OPCODE_KILL_IF */ @@ -499,8 +499,7 @@ LLVMValueRef abs_x, log_abs_x, flr_log_abs_x, ex2_flr_log_abs_x; /* abs( src0.x) */ - abs_x = lp_build_emit_llvm_unary(bld_base, TGSI_OPCODE_ABS, - emit_data->args[0] /* src0.x */); + abs_x = lp_build_abs(&bld_base->base, emit_data->args[0] /* src0.x */); /* log( abs( src0.x ) ) */ log_abs_x = lp_build_emit_llvm_unary(bld_base, TGSI_OPCODE_LG2, @@ -771,19 +770,6 @@ scs_emit /* emit */ }; -/* TGSI_OPCODE_SUB */ -static void -sub_emit( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - emit_data->output[emit_data->chan] = - LLVMBuildFSub(bld_base->base.gallivm->builder, - emit_data->args[0], - emit_data->args[1], ""); -} - /* TGSI_OPCODE_F2U */ static void f2u_emit( @@ -842,26 +828,32 @@ struct lp_build_tgsi_context * bld_base, struct lp_build_emit_data * emit_data) { - LLVMBuilderRef builder = bld_base->base.gallivm->builder; struct lp_build_context *int_bld = &bld_base->int_bld; - struct lp_type type = int_bld->type; - LLVMValueRef src0, src1; - LLVMValueRef dst64; - LLVMTypeRef typeRef; - - assert(type.width == 32); - type.width = 64; - typeRef = lp_build_vec_type(bld_base->base.gallivm, type); - src0 = LLVMBuildSExt(builder, emit_data->args[0], typeRef, ""); - src1 = LLVMBuildSExt(builder, emit_data->args[1], typeRef, ""); - dst64 = LLVMBuildMul(builder, src0, src1, ""); - dst64 = LLVMBuildAShr( - builder, dst64, - lp_build_const_vec(bld_base->base.gallivm, type, 32), ""); - type.width = 32; - typeRef = lp_build_vec_type(bld_base->base.gallivm, type); - emit_data->output[emit_data->chan] = - LLVMBuildTrunc(builder, dst64, typeRef, ""); + LLVMValueRef hi_bits; + + assert(int_bld->type.width == 32); + + /* low result bits are tossed away */ + lp_build_mul_32_lohi(int_bld, emit_data->args[0], + emit_data->args[1], &hi_bits); + emit_data->output[emit_data->chan] = hi_bits; +} + +static void +imul_hi_emit_cpu( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + struct lp_build_context *int_bld = &bld_base->int_bld; + LLVMValueRef hi_bits; + + assert(int_bld->type.width == 32); + + /* low result bits are tossed away */ + lp_build_mul_32_lohi_cpu(int_bld, emit_data->args[0], + emit_data->args[1], &hi_bits); + emit_data->output[emit_data->chan] = hi_bits; } /* TGSI_OPCODE_UMUL_HI */ @@ -871,26 +863,32 @@ struct lp_build_tgsi_context * bld_base, struct lp_build_emit_data * emit_data) { - LLVMBuilderRef builder = bld_base->base.gallivm->builder; struct lp_build_context *uint_bld = &bld_base->uint_bld; - struct lp_type type = uint_bld->type; - LLVMValueRef src0, src1; - LLVMValueRef dst64; - LLVMTypeRef typeRef; - - assert(type.width == 32); - type.width = 64; - typeRef = lp_build_vec_type(bld_base->base.gallivm, type); - src0 = LLVMBuildZExt(builder, emit_data->args[0], typeRef, ""); - src1 = LLVMBuildZExt(builder, emit_data->args[1], typeRef, ""); - dst64 = LLVMBuildMul(builder, src0, src1, ""); - dst64 = LLVMBuildLShr( - builder, dst64, - lp_build_const_vec(bld_base->base.gallivm, type, 32), ""); - type.width = 32; - typeRef = lp_build_vec_type(bld_base->base.gallivm, type); - emit_data->output[emit_data->chan] = - LLVMBuildTrunc(builder, dst64, typeRef, ""); + LLVMValueRef hi_bits; + + assert(uint_bld->type.width == 32); + + /* low result bits are tossed away */ + lp_build_mul_32_lohi(uint_bld, emit_data->args[0], + emit_data->args[1], &hi_bits); + emit_data->output[emit_data->chan] = hi_bits; +} + +static void +umul_hi_emit_cpu( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + struct lp_build_context *uint_bld = &bld_base->uint_bld; + LLVMValueRef hi_bits; + + assert(uint_bld->type.width == 32); + + /* low result bits are tossed away */ + lp_build_mul_32_lohi_cpu(uint_bld, emit_data->args[0], + emit_data->args[1], &hi_bits); + emit_data->output[emit_data->chan] = hi_bits; } /* TGSI_OPCODE_MAX */ @@ -945,7 +943,7 @@ tmp0 = lp_build_emit_llvm_binary(bld_base, TGSI_OPCODE_MUL, a, b); tmp1 = lp_build_emit_llvm_binary(bld_base, TGSI_OPCODE_MUL, c, d); - return lp_build_emit_llvm_binary(bld_base, TGSI_OPCODE_SUB, tmp0, tmp1); + return lp_build_sub(&bld_base->base, tmp0, tmp1); } static void @@ -1093,6 +1091,210 @@ emit_data->args[0], tmp, ""); } +static void +u64mul_emit( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + emit_data->output[emit_data->chan] = lp_build_mul(&bld_base->uint64_bld, + emit_data->args[0], emit_data->args[1]); +} + +static void +u64mod_emit_cpu( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + LLVMValueRef div_mask = lp_build_cmp(&bld_base->uint64_bld, + PIPE_FUNC_EQUAL, emit_data->args[1], + bld_base->uint64_bld.zero); + /* We want to make sure that we never divide/mod by zero to not + * generate sigfpe. We don't want to crash just because the + * shader is doing something weird. */ + LLVMValueRef divisor = LLVMBuildOr(builder, + div_mask, + emit_data->args[1], ""); + LLVMValueRef result = lp_build_mod(&bld_base->uint64_bld, + emit_data->args[0], divisor); + /* umod by zero doesn't have a guaranteed return value chose -1 for now. */ + emit_data->output[emit_data->chan] = LLVMBuildOr(builder, + div_mask, + result, ""); +} + +static void +i64mod_emit_cpu( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + LLVMValueRef div_mask = lp_build_cmp(&bld_base->uint64_bld, + PIPE_FUNC_EQUAL, emit_data->args[1], + bld_base->uint64_bld.zero); + /* We want to make sure that we never divide/mod by zero to not + * generate sigfpe. We don't want to crash just because the + * shader is doing something weird. */ + LLVMValueRef divisor = LLVMBuildOr(builder, + div_mask, + emit_data->args[1], ""); + LLVMValueRef result = lp_build_mod(&bld_base->int64_bld, + emit_data->args[0], divisor); + /* umod by zero doesn't have a guaranteed return value chose -1 for now. */ + emit_data->output[emit_data->chan] = LLVMBuildOr(builder, + div_mask, + result, ""); +} + +static void +u64div_emit_cpu( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + LLVMValueRef div_mask = lp_build_cmp(&bld_base->uint64_bld, + PIPE_FUNC_EQUAL, emit_data->args[1], + bld_base->uint64_bld.zero); + /* We want to make sure that we never divide/mod by zero to not + * generate sigfpe. We don't want to crash just because the + * shader is doing something weird. */ + LLVMValueRef divisor = LLVMBuildOr(builder, + div_mask, + emit_data->args[1], ""); + LLVMValueRef result = LLVMBuildUDiv(builder, + emit_data->args[0], divisor, ""); + /* udiv by zero is guaranteed to return 0xffffffff at least with d3d10 */ + emit_data->output[emit_data->chan] = LLVMBuildOr(builder, + div_mask, + result, ""); +} + +static void +i64div_emit_cpu( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + LLVMValueRef div_mask = lp_build_cmp(&bld_base->int64_bld, + PIPE_FUNC_EQUAL, emit_data->args[1], + bld_base->int64_bld.zero); + /* We want to make sure that we never divide/mod by zero to not + * generate sigfpe. We don't want to crash just because the + * shader is doing something weird. */ + LLVMValueRef divisor = LLVMBuildOr(builder, + div_mask, + emit_data->args[1], ""); + LLVMValueRef result = LLVMBuildSDiv(builder, + emit_data->args[0], divisor, ""); + /* udiv by zero is guaranteed to return 0xffffffff at least with d3d10 */ + emit_data->output[emit_data->chan] = LLVMBuildOr(builder, + div_mask, + result, ""); +} + +static void +f2u64_emit( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + emit_data->output[emit_data->chan] = + LLVMBuildFPToUI(bld_base->base.gallivm->builder, + emit_data->args[0], + bld_base->uint64_bld.vec_type, ""); +} + +static void +f2i64_emit( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + emit_data->output[emit_data->chan] = + LLVMBuildFPToSI(bld_base->base.gallivm->builder, + emit_data->args[0], + bld_base->int64_bld.vec_type, ""); +} + +static void +u2i64_emit( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + emit_data->output[emit_data->chan] = + LLVMBuildZExt(bld_base->base.gallivm->builder, + emit_data->args[0], + bld_base->uint64_bld.vec_type, ""); +} + +static void +i2i64_emit( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + emit_data->output[emit_data->chan] = + LLVMBuildSExt(bld_base->base.gallivm->builder, + emit_data->args[0], + bld_base->int64_bld.vec_type, ""); +} + +static void +i642f_emit( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + emit_data->output[emit_data->chan] = + LLVMBuildSIToFP(bld_base->base.gallivm->builder, + emit_data->args[0], + bld_base->base.vec_type, ""); +} + +static void +u642f_emit( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + emit_data->output[emit_data->chan] = + LLVMBuildUIToFP(bld_base->base.gallivm->builder, + emit_data->args[0], + bld_base->base.vec_type, ""); +} + +static void +i642d_emit( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + emit_data->output[emit_data->chan] = + LLVMBuildSIToFP(bld_base->base.gallivm->builder, + emit_data->args[0], + bld_base->dbl_bld.vec_type, ""); +} + +static void +u642d_emit( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + emit_data->output[emit_data->chan] = + LLVMBuildUIToFP(bld_base->base.gallivm->builder, + emit_data->args[0], + bld_base->dbl_bld.vec_type, ""); +} + void lp_set_default_actions(struct lp_build_tgsi_context * bld_base) { @@ -1137,7 +1339,6 @@ bld_base->op_actions[TGSI_OPCODE_MUL].emit = mul_emit; bld_base->op_actions[TGSI_OPCODE_DIV].emit = fdiv_emit; bld_base->op_actions[TGSI_OPCODE_RCP].emit = rcp_emit; - bld_base->op_actions[TGSI_OPCODE_SUB].emit = sub_emit; bld_base->op_actions[TGSI_OPCODE_UARL].emit = mov_emit; bld_base->op_actions[TGSI_OPCODE_F2U].emit = f2u_emit; @@ -1154,6 +1355,7 @@ bld_base->op_actions[TGSI_OPCODE_DMAX].emit = fmax_emit; bld_base->op_actions[TGSI_OPCODE_DMIN].emit = fmin_emit; bld_base->op_actions[TGSI_OPCODE_DMUL].emit = mul_emit; + bld_base->op_actions[TGSI_OPCODE_DDIV].emit = fdiv_emit; bld_base->op_actions[TGSI_OPCODE_D2F].emit = d2f_emit; bld_base->op_actions[TGSI_OPCODE_D2I].emit = d2i_emit; @@ -1168,6 +1370,26 @@ bld_base->op_actions[TGSI_OPCODE_DRCP].emit = drcp_emit; bld_base->op_actions[TGSI_OPCODE_DFRAC].emit = dfrac_emit; + bld_base->op_actions[TGSI_OPCODE_U64MUL].emit = u64mul_emit; + + bld_base->op_actions[TGSI_OPCODE_F2I64].emit = f2i64_emit; + bld_base->op_actions[TGSI_OPCODE_F2U64].emit = f2u64_emit; + + bld_base->op_actions[TGSI_OPCODE_D2I64].emit = f2i64_emit; + bld_base->op_actions[TGSI_OPCODE_D2U64].emit = f2u64_emit; + + bld_base->op_actions[TGSI_OPCODE_I2I64].emit = i2i64_emit; + bld_base->op_actions[TGSI_OPCODE_U2I64].emit = u2i64_emit; + + bld_base->op_actions[TGSI_OPCODE_I642F].emit = i642f_emit; + bld_base->op_actions[TGSI_OPCODE_U642F].emit = u642f_emit; + + bld_base->op_actions[TGSI_OPCODE_I642F].emit = i642f_emit; + bld_base->op_actions[TGSI_OPCODE_U642F].emit = u642f_emit; + + bld_base->op_actions[TGSI_OPCODE_I642D].emit = i642d_emit; + bld_base->op_actions[TGSI_OPCODE_U642D].emit = u642d_emit; + } /* CPU Only default actions */ @@ -1176,18 +1398,6 @@ * intrinsics. */ -/* TGSI_OPCODE_ABS (CPU Only)*/ - -static void -abs_emit_cpu( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - emit_data->output[emit_data->chan] = lp_build_abs(&bld_base->base, - emit_data->args[0]); -} - /* TGSI_OPCODE_ADD (CPU Only) */ static void add_emit_cpu( @@ -1577,6 +1787,19 @@ } +/* TGSI_OPCODE_MAD (CPU Only) */ + +static void +mad_emit_cpu( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + emit_data->output[emit_data->chan] = + lp_build_mad(&bld_base->base, + emit_data->args[0], emit_data->args[1], emit_data->args[2]); +} + /* TGSI_OPCODE_MAX (CPU Only) */ static void @@ -1835,19 +2058,6 @@ emit_data->args[0]); } -/* TGSI_OPCODE_SUB (CPU Only) */ - -static void -sub_emit_cpu( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - emit_data->output[emit_data->chan] = lp_build_sub(&bld_base->base, - emit_data->args[0], - emit_data->args[1]); -} - /* TGSI_OPCODE_TRUNC (CPU Only) */ static void @@ -2127,12 +2337,218 @@ emit_data->args[0]); } +static void +i64abs_emit_cpu( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + emit_data->output[emit_data->chan] = lp_build_abs(&bld_base->int64_bld, + emit_data->args[0]); +} + +static void +i64ssg_emit_cpu( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + emit_data->output[emit_data->chan] = lp_build_sgn(&bld_base->int64_bld, + emit_data->args[0]); +} + +static void +i64neg_emit_cpu( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + emit_data->output[emit_data->chan] = lp_build_sub(&bld_base->int64_bld, + bld_base->int64_bld.zero, + emit_data->args[0]); +} + +static void +u64set_emit_cpu( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data, + unsigned pipe_func) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + LLVMValueRef cond = lp_build_cmp(&bld_base->uint64_bld, pipe_func, + emit_data->args[0], emit_data->args[1]); + /* arguments were 64 bit but store as 32 bit */ + cond = LLVMBuildTrunc(builder, cond, bld_base->int_bld.int_vec_type, ""); + emit_data->output[emit_data->chan] = cond; +} + +static void +u64seq_emit_cpu( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + u64set_emit_cpu(action, bld_base, emit_data, PIPE_FUNC_EQUAL); +} + +static void +u64sne_emit_cpu( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + u64set_emit_cpu(action, bld_base, emit_data, PIPE_FUNC_NOTEQUAL); +} + +static void +u64slt_emit_cpu( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + u64set_emit_cpu(action, bld_base, emit_data, PIPE_FUNC_LESS); +} + +static void +u64sge_emit_cpu( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + u64set_emit_cpu(action, bld_base, emit_data, PIPE_FUNC_GEQUAL); +} + +static void +i64set_emit_cpu( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data, + unsigned pipe_func) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + LLVMValueRef cond = lp_build_cmp(&bld_base->int64_bld, pipe_func, + emit_data->args[0], emit_data->args[1]); + /* arguments were 64 bit but store as 32 bit */ + cond = LLVMBuildTrunc(builder, cond, bld_base->int_bld.int_vec_type, ""); + emit_data->output[emit_data->chan] = cond; +} + +static void +i64slt_emit_cpu( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + i64set_emit_cpu(action, bld_base, emit_data, PIPE_FUNC_LESS); +} + +static void +i64sge_emit_cpu( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + i64set_emit_cpu(action, bld_base, emit_data, PIPE_FUNC_GEQUAL); +} + +static void +u64max_emit_cpu( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + emit_data->output[emit_data->chan] = lp_build_max(&bld_base->uint64_bld, + emit_data->args[0], emit_data->args[1]); +} + +static void +u64min_emit_cpu( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + emit_data->output[emit_data->chan] = lp_build_min(&bld_base->uint64_bld, + emit_data->args[0], emit_data->args[1]); +} + +static void +i64max_emit_cpu( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + emit_data->output[emit_data->chan] = lp_build_max(&bld_base->int64_bld, + emit_data->args[0], emit_data->args[1]); +} + +static void +i64min_emit_cpu( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + emit_data->output[emit_data->chan] = lp_build_min(&bld_base->int64_bld, + emit_data->args[0], emit_data->args[1]); +} + +static void +u64add_emit_cpu( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + emit_data->output[emit_data->chan] = lp_build_add(&bld_base->uint64_bld, + emit_data->args[0], emit_data->args[1]); +} + +static void +u64shl_emit_cpu( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + struct lp_build_context *uint_bld = &bld_base->uint64_bld; + LLVMValueRef mask = lp_build_const_vec(uint_bld->gallivm, uint_bld->type, + uint_bld->type.width - 1); + LLVMValueRef masked_count = lp_build_and(uint_bld, emit_data->args[1], mask); + emit_data->output[emit_data->chan] = lp_build_shl(uint_bld, emit_data->args[0], + masked_count); +} + +static void +i64shr_emit_cpu( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + struct lp_build_context *int_bld = &bld_base->int64_bld; + LLVMValueRef mask = lp_build_const_vec(int_bld->gallivm, int_bld->type, + int_bld->type.width - 1); + LLVMValueRef masked_count = lp_build_and(int_bld, emit_data->args[1], mask); + emit_data->output[emit_data->chan] = lp_build_shr(int_bld, emit_data->args[0], + masked_count); +} + +static void +u64shr_emit_cpu( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + struct lp_build_context *uint_bld = &bld_base->uint64_bld; + LLVMValueRef mask = lp_build_const_vec(uint_bld->gallivm, uint_bld->type, + uint_bld->type.width - 1); + LLVMValueRef masked_count = lp_build_and(uint_bld, emit_data->args[1], mask); + emit_data->output[emit_data->chan] = lp_build_shr(uint_bld, emit_data->args[0], + masked_count); +} + void lp_set_default_actions_cpu( struct lp_build_tgsi_context * bld_base) { lp_set_default_actions(bld_base); - bld_base->op_actions[TGSI_OPCODE_ABS].emit = abs_emit_cpu; bld_base->op_actions[TGSI_OPCODE_ADD].emit = add_emit_cpu; bld_base->op_actions[TGSI_OPCODE_AND].emit = and_emit_cpu; bld_base->op_actions[TGSI_OPCODE_ARL].emit = arl_emit_cpu; @@ -2159,9 +2575,12 @@ bld_base->op_actions[TGSI_OPCODE_ISHR].emit = ishr_emit_cpu; bld_base->op_actions[TGSI_OPCODE_ISLT].emit = islt_emit_cpu; bld_base->op_actions[TGSI_OPCODE_ISSG].emit = issg_emit_cpu; + bld_base->op_actions[TGSI_OPCODE_IMUL_HI].emit = imul_hi_emit_cpu; + bld_base->op_actions[TGSI_OPCODE_UMUL_HI].emit = umul_hi_emit_cpu; bld_base->op_actions[TGSI_OPCODE_LG2].emit = lg2_emit_cpu; bld_base->op_actions[TGSI_OPCODE_LOG].emit = log_emit_cpu; + bld_base->op_actions[TGSI_OPCODE_MAD].emit = mad_emit_cpu; bld_base->op_actions[TGSI_OPCODE_MAX].emit = max_emit_cpu; bld_base->op_actions[TGSI_OPCODE_MIN].emit = min_emit_cpu; bld_base->op_actions[TGSI_OPCODE_MOD].emit = mod_emit_cpu; @@ -2179,7 +2598,6 @@ bld_base->op_actions[TGSI_OPCODE_SLT].emit = slt_emit_cpu; bld_base->op_actions[TGSI_OPCODE_SNE].emit = sne_emit_cpu; bld_base->op_actions[TGSI_OPCODE_SSG].emit = ssg_emit_cpu; - bld_base->op_actions[TGSI_OPCODE_SUB].emit = sub_emit_cpu; bld_base->op_actions[TGSI_OPCODE_TRUNC].emit = trunc_emit_cpu; bld_base->rsq_action.emit = recip_sqrt_emit_cpu; @@ -2209,4 +2627,29 @@ bld_base->op_actions[TGSI_OPCODE_DRSQ].emit = drecip_sqrt_emit_cpu; bld_base->op_actions[TGSI_OPCODE_DSQRT].emit = dsqrt_emit_cpu; + bld_base->op_actions[TGSI_OPCODE_I64ABS].emit = i64abs_emit_cpu; + bld_base->op_actions[TGSI_OPCODE_I64SSG].emit = i64ssg_emit_cpu; + bld_base->op_actions[TGSI_OPCODE_I64NEG].emit = i64neg_emit_cpu; + + bld_base->op_actions[TGSI_OPCODE_U64SEQ].emit = u64seq_emit_cpu; + bld_base->op_actions[TGSI_OPCODE_U64SNE].emit = u64sne_emit_cpu; + bld_base->op_actions[TGSI_OPCODE_U64SLT].emit = u64slt_emit_cpu; + bld_base->op_actions[TGSI_OPCODE_U64SGE].emit = u64sge_emit_cpu; + bld_base->op_actions[TGSI_OPCODE_I64SLT].emit = i64slt_emit_cpu; + bld_base->op_actions[TGSI_OPCODE_I64SGE].emit = i64sge_emit_cpu; + + bld_base->op_actions[TGSI_OPCODE_U64MIN].emit = u64min_emit_cpu; + bld_base->op_actions[TGSI_OPCODE_U64MAX].emit = u64max_emit_cpu; + bld_base->op_actions[TGSI_OPCODE_I64MIN].emit = i64min_emit_cpu; + bld_base->op_actions[TGSI_OPCODE_I64MAX].emit = i64max_emit_cpu; + + bld_base->op_actions[TGSI_OPCODE_U64ADD].emit = u64add_emit_cpu; + bld_base->op_actions[TGSI_OPCODE_U64MOD].emit = u64mod_emit_cpu; + bld_base->op_actions[TGSI_OPCODE_I64MOD].emit = i64mod_emit_cpu; + bld_base->op_actions[TGSI_OPCODE_U64DIV].emit = u64div_emit_cpu; + bld_base->op_actions[TGSI_OPCODE_I64DIV].emit = i64div_emit_cpu; + + bld_base->op_actions[TGSI_OPCODE_U64SHL].emit = u64shl_emit_cpu; + bld_base->op_actions[TGSI_OPCODE_I64SHR].emit = i64shr_emit_cpu; + bld_base->op_actions[TGSI_OPCODE_U64SHR].emit = u64shr_emit_cpu; } diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_tgsi_aos.c mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_tgsi_aos.c --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_tgsi_aos.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_tgsi_aos.c 2017-06-01 10:37:10.000000000 +0000 @@ -521,7 +521,7 @@ case TGSI_OPCODE_RSQ: /* TGSI_OPCODE_RECIPSQRT */ src0 = lp_build_emit_fetch(&bld->bld_base, inst, 0, LP_CHAN_ALL); - tmp0 = lp_build_emit_llvm_unary(&bld->bld_base, TGSI_OPCODE_ABS, src0); + tmp0 = lp_build_abs(&bld->bld_base.base, src0); dst0 = lp_build_rsqrt(&bld->bld_base.base, tmp0); break; @@ -591,12 +591,6 @@ dst0 = lp_build_add(&bld->bld_base.base, tmp0, src2); break; - case TGSI_OPCODE_SUB: - src0 = lp_build_emit_fetch(&bld->bld_base, inst, 0, LP_CHAN_ALL); - src1 = lp_build_emit_fetch(&bld->bld_base, inst, 1, LP_CHAN_ALL); - dst0 = lp_build_sub(&bld->bld_base.base, src0, src1); - break; - case TGSI_OPCODE_LRP: src0 = lp_build_emit_fetch(&bld->bld_base, inst, 0, LP_CHAN_ALL); src1 = lp_build_emit_fetch(&bld->bld_base, inst, 1, LP_CHAN_ALL); diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c 2017-06-01 10:37:10.000000000 +0000 @@ -186,15 +186,15 @@ } /** - * with doubles src and dst channels aren't 1:1. + * with 64-bit src and dst channels aren't 1:1. * check the src/dst types for the opcode, - * 1. if neither is double then src == dst; - * 2. if dest is double + * 1. if neither is 64-bit then src == dst; + * 2. if dest is 64-bit * - don't store to y or w - * - if src is double then src == dst. + * - if src is 64-bit then src == dst. * - else for f2d, d.xy = s.x * - else for f2d, d.zw = s.y - * 3. if dst is single, src is double + * 3. if dst is single, src is 64-bit * - map dst x,z to src xy; * - map dst y,w to src zw; */ @@ -204,12 +204,12 @@ enum tgsi_opcode_type dtype = tgsi_opcode_infer_dst_type(opcode); enum tgsi_opcode_type stype = tgsi_opcode_infer_src_type(opcode); - if (dtype != TGSI_TYPE_DOUBLE && stype != TGSI_TYPE_DOUBLE) + if (!tgsi_type_is_64bit(dtype) && !tgsi_type_is_64bit(stype)) return dst_chan_index; - if (dtype == TGSI_TYPE_DOUBLE) { + if (tgsi_type_is_64bit(dtype)) { if (dst_chan_index == 1 || dst_chan_index == 3) return -1; - if (stype == TGSI_TYPE_DOUBLE) + if (tgsi_type_is_64bit(stype)) return dst_chan_index; if (dst_chan_index == 0) return 0; @@ -335,7 +335,7 @@ enum tgsi_opcode_type stype = tgsi_opcode_infer_src_type(inst->Instruction.Opcode); if (chan_index == LP_CHAN_ALL) { - swizzle = ~0; + swizzle = ~0u; } else { swizzle = tgsi_util_get_full_src_register_swizzle(reg, chan_index); if (swizzle > 3) { @@ -360,10 +360,12 @@ case TGSI_TYPE_DOUBLE: case TGSI_TYPE_UNTYPED: /* modifiers on movs assume data is float */ - res = lp_build_emit_llvm_unary(bld_base, TGSI_OPCODE_ABS, res); + res = lp_build_abs(&bld_base->base, res); break; case TGSI_TYPE_UNSIGNED: case TGSI_TYPE_SIGNED: + case TGSI_TYPE_UNSIGNED64: + case TGSI_TYPE_SIGNED64: case TGSI_TYPE_VOID: default: /* abs modifier is only legal on floating point types */ @@ -387,6 +389,10 @@ case TGSI_TYPE_UNSIGNED: res = lp_build_negate( &bld_base->int_bld, res ); break; + case TGSI_TYPE_SIGNED64: + case TGSI_TYPE_UNSIGNED64: + res = lp_build_negate( &bld_base->int64_bld, res ); + break; case TGSI_TYPE_VOID: default: assert(0); @@ -398,7 +404,7 @@ * Swizzle the argument */ - if (swizzle == ~0) { + if (swizzle == ~0u) { res = bld_base->emit_swizzle(bld_base, res, reg->Register.SwizzleX, reg->Register.SwizzleY, @@ -453,7 +459,7 @@ * Swizzle the argument */ - if (swizzle == ~0) { + if (swizzle == ~0u) { res = bld_base->emit_swizzle(bld_base, res, off->SwizzleX, off->SwizzleY, diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h 2017-06-01 10:37:10.000000000 +0000 @@ -52,7 +52,7 @@ extern "C" { #endif -#define LP_CHAN_ALL ~0 +#define LP_CHAN_ALL ~0u #define LP_MAX_INSTRUCTIONS 256 @@ -337,6 +337,10 @@ struct lp_build_context int_bld; struct lp_build_context dbl_bld; + + struct lp_build_context uint64_bld; + struct lp_build_context int64_bld; + /** This array stores functions that are used to transform TGSI opcodes to * LLVM instructions. */ diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c 2017-06-01 10:37:10.000000000 +0000 @@ -642,7 +642,7 @@ { unsigned pc = bld_base->pc; struct function_ctx *ctx = func_ctx(mask); - unsigned curr_switch_stack = ctx->switch_stack_size; + int curr_switch_stack = ctx->switch_stack_size; if (ctx->switch_stack_size > LP_MAX_TGSI_NESTING) { return false; @@ -653,7 +653,7 @@ pc++; } - while (pc != -1 && pc < bld_base->num_instructions) { + while (pc != ~0u && pc < bld_base->num_instructions) { unsigned opcode = bld_base->instructions[pc].Instruction.Opcode; switch (opcode) { case TGSI_OPCODE_CASE: @@ -856,7 +856,7 @@ static LLVMValueRef get_file_ptr(struct lp_build_tgsi_soa_context *bld, unsigned file, - unsigned index, + int index, unsigned chan) { LLVMBuilderRef builder = bld->bld_base.base.gallivm->builder; @@ -1168,6 +1168,12 @@ case TGSI_TYPE_DOUBLE: bld_fetch = &bld_base->dbl_bld; break; + case TGSI_TYPE_UNSIGNED64: + bld_fetch = &bld_base->uint64_bld; + break; + case TGSI_TYPE_SIGNED64: + bld_fetch = &bld_base->int64_bld; + break; case TGSI_TYPE_VOID: default: assert(0); @@ -1227,7 +1233,7 @@ LLVMValueRef res; /* XXX: Handle fetching xyzw components as a vector */ - assert(swizzle != ~0); + assert(swizzle != ~0u); if (reg->Register.Dimension) { assert(!reg->Dimension.Indirect); @@ -1264,7 +1270,7 @@ index_vec = lp_build_shl_imm(uint_bld, indirect_index, 2); index_vec = lp_build_add(uint_bld, index_vec, swizzle_vec); - if (stype == TGSI_TYPE_DOUBLE) { + if (tgsi_type_is_64bit(stype)) { LLVMValueRef swizzle_vec2; swizzle_vec2 = lp_build_const_int_vec(gallivm, uint_bld->type, swizzle + 1); index_vec2 = lp_build_shl_imm(uint_bld, indirect_index, 2); @@ -1285,12 +1291,20 @@ LLVMTypeRef dptr_type = LLVMPointerType(LLVMDoubleTypeInContext(gallivm->context), 0); scalar_ptr = LLVMBuildBitCast(builder, scalar_ptr, dptr_type, ""); bld_broad = &bld_base->dbl_bld; + } else if (stype == TGSI_TYPE_UNSIGNED64) { + LLVMTypeRef u64ptr_type = LLVMPointerType(LLVMInt64TypeInContext(gallivm->context), 0); + scalar_ptr = LLVMBuildBitCast(builder, scalar_ptr, u64ptr_type, ""); + bld_broad = &bld_base->uint64_bld; + } else if (stype == TGSI_TYPE_SIGNED64) { + LLVMTypeRef i64ptr_type = LLVMPointerType(LLVMInt64TypeInContext(gallivm->context), 0); + scalar_ptr = LLVMBuildBitCast(builder, scalar_ptr, i64ptr_type, ""); + bld_broad = &bld_base->int64_bld; } scalar = LLVMBuildLoad(builder, scalar_ptr, ""); res = lp_build_broadcast_scalar(bld_broad, scalar); } - if (stype == TGSI_TYPE_SIGNED || stype == TGSI_TYPE_UNSIGNED || stype == TGSI_TYPE_DOUBLE) { + if (stype == TGSI_TYPE_SIGNED || stype == TGSI_TYPE_UNSIGNED || stype == TGSI_TYPE_DOUBLE || stype == TGSI_TYPE_SIGNED64 || stype == TGSI_TYPE_UNSIGNED64) { struct lp_build_context *bld_fetch = stype_to_fetch(bld_base, stype); res = LLVMBuildBitCast(builder, res, bld_fetch->vec_type, ""); } @@ -1299,14 +1313,14 @@ } /** - * Fetch double values from two separate channels. - * Doubles are stored split across two channels, like xy and zw. + * Fetch 64-bit values from two separate channels. + * 64-bit values are stored split across two channels, like xy and zw. * This function creates a set of 16 floats, * extracts the values from the two channels, - * puts them in the correct place, then casts to 8 doubles. + * puts them in the correct place, then casts to 8 64-bits. */ static LLVMValueRef -emit_fetch_double( +emit_fetch_64bit( struct lp_build_tgsi_context * bld_base, enum tgsi_opcode_type stype, LLVMValueRef input, @@ -1369,7 +1383,7 @@ indirect_index, swizzle, FALSE); - if (stype == TGSI_TYPE_DOUBLE) + if (tgsi_type_is_64bit(stype)) index_vec2 = get_soa_array_offsets(&bld_base->uint_bld, indirect_index, swizzle + 1, @@ -1383,7 +1397,7 @@ bld->imms_array, &lindex, 1, ""); res = LLVMBuildLoad(builder, imms_ptr, ""); - if (stype == TGSI_TYPE_DOUBLE) { + if (tgsi_type_is_64bit(stype)) { LLVMValueRef lindex1; LLVMValueRef imms_ptr2; LLVMValueRef res2; @@ -1393,22 +1407,19 @@ imms_ptr2 = LLVMBuildGEP(builder, bld->imms_array, &lindex1, 1, ""); res2 = LLVMBuildLoad(builder, imms_ptr2, ""); - res = emit_fetch_double(bld_base, stype, res, res2); + res = emit_fetch_64bit(bld_base, stype, res, res2); } } } else { res = bld->immediates[reg->Register.Index][swizzle]; - if (stype == TGSI_TYPE_DOUBLE) - res = emit_fetch_double(bld_base, stype, res, bld->immediates[reg->Register.Index][swizzle + 1]); + if (tgsi_type_is_64bit(stype)) + res = emit_fetch_64bit(bld_base, stype, res, bld->immediates[reg->Register.Index][swizzle + 1]); } - if (stype == TGSI_TYPE_UNSIGNED) { - res = LLVMBuildBitCast(builder, res, bld_base->uint_bld.vec_type, ""); - } else if (stype == TGSI_TYPE_SIGNED) { - res = LLVMBuildBitCast(builder, res, bld_base->int_bld.vec_type, ""); - } else if (stype == TGSI_TYPE_DOUBLE) { - res = LLVMBuildBitCast(builder, res, bld_base->dbl_bld.vec_type, ""); + if (stype == TGSI_TYPE_SIGNED || stype == TGSI_TYPE_UNSIGNED || tgsi_type_is_64bit(stype)) { + struct lp_build_context *bld_fetch = stype_to_fetch(bld_base, stype); + res = LLVMBuildBitCast(builder, res, bld_fetch->vec_type, ""); } return res; } @@ -1441,7 +1452,7 @@ indirect_index, swizzle, TRUE); - if (stype == TGSI_TYPE_DOUBLE) { + if (tgsi_type_is_64bit(stype)) { index_vec2 = get_soa_array_offsets(&bld_base->uint_bld, indirect_index, swizzle + 1, @@ -1461,7 +1472,7 @@ bld->inputs_array, &lindex, 1, ""); res = LLVMBuildLoad(builder, input_ptr, ""); - if (stype == TGSI_TYPE_DOUBLE) { + if (tgsi_type_is_64bit(stype)) { LLVMValueRef lindex1; LLVMValueRef input_ptr2; LLVMValueRef res2; @@ -1471,24 +1482,21 @@ input_ptr2 = LLVMBuildGEP(builder, bld->inputs_array, &lindex1, 1, ""); res2 = LLVMBuildLoad(builder, input_ptr2, ""); - res = emit_fetch_double(bld_base, stype, res, res2); + res = emit_fetch_64bit(bld_base, stype, res, res2); } } else { res = bld->inputs[reg->Register.Index][swizzle]; - if (stype == TGSI_TYPE_DOUBLE) - res = emit_fetch_double(bld_base, stype, res, bld->inputs[reg->Register.Index][swizzle + 1]); + if (tgsi_type_is_64bit(stype)) + res = emit_fetch_64bit(bld_base, stype, res, bld->inputs[reg->Register.Index][swizzle + 1]); } } assert(res); - if (stype == TGSI_TYPE_UNSIGNED) { - res = LLVMBuildBitCast(builder, res, bld_base->uint_bld.vec_type, ""); - } else if (stype == TGSI_TYPE_SIGNED) { - res = LLVMBuildBitCast(builder, res, bld_base->int_bld.vec_type, ""); - } else if (stype == TGSI_TYPE_DOUBLE) { - res = LLVMBuildBitCast(builder, res, bld_base->dbl_bld.vec_type, ""); + if (stype == TGSI_TYPE_SIGNED || stype == TGSI_TYPE_UNSIGNED || tgsi_type_is_64bit(stype)) { + struct lp_build_context *bld_fetch = stype_to_fetch(bld_base, stype); + res = LLVMBuildBitCast(builder, res, bld_fetch->vec_type, ""); } return res; @@ -1548,7 +1556,7 @@ swizzle_index); assert(res); - if (stype == TGSI_TYPE_DOUBLE) { + if (tgsi_type_is_64bit(stype)) { LLVMValueRef swizzle_index = lp_build_const_int32(gallivm, swizzle + 1); LLVMValueRef res2; res2 = bld->gs_iface->fetch_input(bld->gs_iface, bld_base, @@ -1558,7 +1566,7 @@ attrib_index, swizzle_index); assert(res2); - res = emit_fetch_double(bld_base, stype, res, res2); + res = emit_fetch_64bit(bld_base, stype, res, res2); } else if (stype == TGSI_TYPE_UNSIGNED) { res = LLVMBuildBitCast(builder, res, bld_base->uint_bld.vec_type, ""); } else if (stype == TGSI_TYPE_SIGNED) { @@ -1595,7 +1603,7 @@ indirect_index, swizzle, TRUE); - if (stype == TGSI_TYPE_DOUBLE) { + if (tgsi_type_is_64bit(stype)) { index_vec2 = get_soa_array_offsets(&bld_base->uint_bld, indirect_index, swizzle + 1, @@ -1614,16 +1622,20 @@ temp_ptr = lp_get_temp_ptr_soa(bld, reg->Register.Index, swizzle); res = LLVMBuildLoad(builder, temp_ptr, ""); - if (stype == TGSI_TYPE_DOUBLE) { + if (tgsi_type_is_64bit(stype)) { LLVMValueRef temp_ptr2, res2; temp_ptr2 = lp_get_temp_ptr_soa(bld, reg->Register.Index, swizzle + 1); res2 = LLVMBuildLoad(builder, temp_ptr2, ""); - res = emit_fetch_double(bld_base, stype, res, res2); + res = emit_fetch_64bit(bld_base, stype, res, res2); } } - if (stype == TGSI_TYPE_SIGNED || stype == TGSI_TYPE_UNSIGNED || stype == TGSI_TYPE_DOUBLE) { + if (stype == TGSI_TYPE_SIGNED || + stype == TGSI_TYPE_UNSIGNED || + stype == TGSI_TYPE_DOUBLE || + stype == TGSI_TYPE_SIGNED64 || + stype == TGSI_TYPE_UNSIGNED64) { struct lp_build_context *bld_fetch = stype_to_fetch(bld_base, stype); res = LLVMBuildBitCast(builder, res, bld_fetch->vec_type, ""); } @@ -1790,20 +1802,19 @@ } /** - * store an array of 8 doubles into two arrays of 8 floats + * store an array of 8 64-bit into two arrays of 8 floats * i.e. * value is d0, d1, d2, d3 etc. - * each double has high and low pieces x, y + * each 64-bit has high and low pieces x, y * so gets stored into the separate channels as: * chan_ptr = d0.x, d1.x, d2.x, d3.x * chan_ptr2 = d0.y, d1.y, d2.y, d3.y */ static void -emit_store_double_chan(struct lp_build_tgsi_context *bld_base, - int dtype, - LLVMValueRef chan_ptr, LLVMValueRef chan_ptr2, - LLVMValueRef pred, - LLVMValueRef value) +emit_store_64bit_chan(struct lp_build_tgsi_context *bld_base, + LLVMValueRef chan_ptr, LLVMValueRef chan_ptr2, + LLVMValueRef pred, + LLVMValueRef value) { struct lp_build_tgsi_soa_context * bld = lp_soa_context(bld_base); struct gallivm_state *gallivm = bld_base->base.gallivm; @@ -1870,9 +1881,9 @@ if (reg->Register.Indirect) { /* * Currently the mesa/st doesn't generate indirect stores - * to doubles, it normally uses MOV to do indirect stores. + * to 64-bit values, it normally uses MOV to do indirect stores. */ - assert(dtype != TGSI_TYPE_DOUBLE); + assert(!tgsi_type_is_64bit(dtype)); indirect_index = get_indirect_index(bld, reg->Register.File, reg->Register.Index, @@ -1912,11 +1923,11 @@ LLVMValueRef out_ptr = lp_get_output_ptr(bld, reg->Register.Index, chan_index); - if (dtype == TGSI_TYPE_DOUBLE) { + if (tgsi_type_is_64bit(dtype)) { LLVMValueRef out_ptr2 = lp_get_output_ptr(bld, reg->Register.Index, chan_index + 1); - emit_store_double_chan(bld_base, dtype, out_ptr, out_ptr2, - pred, value); + emit_store_64bit_chan(bld_base, out_ptr, out_ptr2, + pred, value); } else lp_exec_mask_store(&bld->exec_mask, float_bld, pred, value, out_ptr); } @@ -1924,7 +1935,7 @@ case TGSI_FILE_TEMPORARY: /* Temporaries are always stored as floats */ - if (dtype != TGSI_TYPE_DOUBLE) + if (!tgsi_type_is_64bit(dtype)) value = LLVMBuildBitCast(builder, value, float_bld->vec_type, ""); else value = LLVMBuildBitCast(builder, value, LLVMVectorType(LLVMFloatTypeInContext(gallivm->context), bld_base->base.type.length * 2), ""); @@ -1950,12 +1961,12 @@ LLVMValueRef temp_ptr; temp_ptr = lp_get_temp_ptr_soa(bld, reg->Register.Index, chan_index); - if (dtype == TGSI_TYPE_DOUBLE) { + if (tgsi_type_is_64bit(dtype)) { LLVMValueRef temp_ptr2 = lp_get_temp_ptr_soa(bld, reg->Register.Index, chan_index + 1); - emit_store_double_chan(bld_base, dtype, temp_ptr, temp_ptr2, - pred, value); + emit_store_64bit_chan(bld_base, temp_ptr, temp_ptr2, + pred, value); } else lp_exec_mask_store(&bld->exec_mask, float_bld, pred, value, temp_ptr); @@ -2035,7 +2046,7 @@ TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( inst, chan_index ) { - if (dtype == TGSI_TYPE_DOUBLE && (chan_index == 1 || chan_index == 3)) + if (tgsi_type_is_64bit(dtype) && (chan_index == 1 || chan_index == 3)) continue; emit_store_chan(bld_base, inst, 0, chan_index, pred[chan_index], dst[chan_index]); } @@ -2882,7 +2893,7 @@ int chan; if (index < 8 * sizeof(unsigned) && - (info->file_mask[file] & (1 << index)) == 0) { + (info->file_mask[file] & (1u << index)) == 0) { /* This was not declared.*/ continue; } @@ -3052,6 +3063,8 @@ break; case TGSI_IMM_FLOAT64: + case TGSI_IMM_UINT64: + case TGSI_IMM_INT64: case TGSI_IMM_UINT32: for( i = 0; i < size; ++i ) { LLVMValueRef tmp = lp_build_const_vec(gallivm, bld_base->uint_bld.type, imm->u[i].Uint); @@ -3909,6 +3922,18 @@ dbl_type.width *= 2; lp_build_context_init(&bld.bld_base.dbl_bld, gallivm, dbl_type); } + { + struct lp_type uint64_type; + uint64_type = lp_uint_type(type); + uint64_type.width *= 2; + lp_build_context_init(&bld.bld_base.uint64_bld, gallivm, uint64_type); + } + { + struct lp_type int64_type; + int64_type = lp_int_type(type); + int64_type.width *= 2; + lp_build_context_init(&bld.bld_base.int64_bld, gallivm, int64_type); + } bld.mask = mask; bld.inputs = inputs; bld.outputs = outputs; diff -Nru mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_type.h mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_type.h --- mesa-12.0.6/src/gallium/auxiliary/gallivm/lp_bld_type.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/gallivm/lp_bld_type.h 2017-06-01 10:37:10.000000000 +0000 @@ -41,6 +41,10 @@ #include "pipe/p_compiler.h" #include "gallivm/lp_bld.h" +#ifdef __cplusplus +extern "C" { +#endif + /** * Native SIMD architecture width available at runtime. * @@ -449,5 +453,8 @@ unsigned lp_build_count_ir_module(LLVMModuleRef module); +#ifdef __cplusplus +} +#endif #endif /* !LP_BLD_TYPE_H */ diff -Nru mesa-12.0.6/src/gallium/auxiliary/hud/hud_context.c mesa-17.0.7/src/gallium/auxiliary/hud/hud_context.c --- mesa-12.0.6/src/gallium/auxiliary/hud/hud_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/hud/hud_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -33,6 +33,7 @@ * Set GALLIUM_HUD=help for more info. */ +#include #include #include @@ -42,6 +43,7 @@ #include "cso_cache/cso_context.h" #include "util/u_draw_quad.h" +#include "util/u_format.h" #include "util/u_inlines.h" #include "util/u_memory.h" #include "util/u_math.h" @@ -64,10 +66,10 @@ struct list_head pane_list; /* states */ - struct pipe_blend_state alpha_blend; + struct pipe_blend_state no_blend, alpha_blend; struct pipe_depth_stencil_alpha_state dsa; void *fs_color, *fs_text; - struct pipe_rasterizer_state rasterizer; + struct pipe_rasterizer_state rasterizer, rasterizer_aa_lines; void *vs; struct pipe_vertex_element velems[2]; @@ -97,6 +99,8 @@ unsigned max_num_vertices; unsigned num_vertices; } text, bg, whitelines; + + bool has_srgb; }; #ifdef PIPE_OS_UNIX @@ -242,8 +246,8 @@ } static void -number_to_human_readable(uint64_t num, uint64_t max_value, - enum pipe_driver_query_type type, char *out) +number_to_human_readable(uint64_t num, enum pipe_driver_query_type type, + char *out) { static const char *byte_units[] = {" B", " KB", " MB", " GB", " TB", " PB", " EB"}; @@ -254,6 +258,11 @@ static const char *hz_units[] = {" Hz", " KHz", " MHz", " GHz"}; static const char *percent_units[] = {"%"}; + static const char *dbm_units[] = {" (-dBm)"}; + static const char *temperature_units[] = {" C"}; + static const char *volt_units[] = {" mV", " V"}; + static const char *amp_units[] = {" mA", " A"}; + static const char *watt_units[] = {" mW", " W"}; const char **units; unsigned max_unit; @@ -266,6 +275,22 @@ max_unit = ARRAY_SIZE(time_units)-1; units = time_units; break; + case PIPE_DRIVER_QUERY_TYPE_VOLTS: + max_unit = ARRAY_SIZE(volt_units)-1; + units = volt_units; + break; + case PIPE_DRIVER_QUERY_TYPE_AMPS: + max_unit = ARRAY_SIZE(amp_units)-1; + units = amp_units; + break; + case PIPE_DRIVER_QUERY_TYPE_DBM: + max_unit = ARRAY_SIZE(dbm_units)-1; + units = dbm_units; + break; + case PIPE_DRIVER_QUERY_TYPE_TEMPERATURE: + max_unit = ARRAY_SIZE(temperature_units)-1; + units = temperature_units; + break; case PIPE_DRIVER_QUERY_TYPE_PERCENTAGE: max_unit = ARRAY_SIZE(percent_units)-1; units = percent_units; @@ -278,14 +303,13 @@ max_unit = ARRAY_SIZE(hz_units)-1; units = hz_units; break; + case PIPE_DRIVER_QUERY_TYPE_WATTS: + max_unit = ARRAY_SIZE(watt_units)-1; + units = watt_units; + break; default: - if (max_value == 100) { - max_unit = ARRAY_SIZE(percent_units)-1; - units = percent_units; - } else { - max_unit = ARRAY_SIZE(metric_units)-1; - units = metric_units; - } + max_unit = ARRAY_SIZE(metric_units)-1; + units = metric_units; } while (d > divisor && unit < max_unit) { @@ -293,12 +317,19 @@ unit++; } - if (d >= 100 || d == (int)d) + /* Round to 3 decimal places so as not to print trailing zeros. */ + if (d*1000 != (int)(d*1000)) + d = round(d * 1000) / 1000; + + /* Show at least 4 digits with at most 3 decimal places, but not zeros. */ + if (d >= 1000 || d == (int)d) sprintf(out, "%.0f%s", d, units[unit]); - else if (d >= 10 || d*10 == (int)(d*10)) + else if (d >= 100 || d*10 == (int)(d*10)) sprintf(out, "%.1f%s", d, units[unit]); - else + else if (d >= 10 || d*100 == (int)(d*100)) sprintf(out, "%.2f%s", d, units[unit]); + else + sprintf(out, "%.3f%s", d, units[unit]); } static void @@ -334,6 +365,7 @@ float *line_verts = hud->whitelines.vertices + hud->whitelines.num_vertices*2; unsigned i, num = 0; char str[32]; + const unsigned last_line = pane->last_line; /* draw background */ hud_draw_background_quad(hud, @@ -341,12 +373,13 @@ pane->x2, pane->y2); /* draw numbers on the right-hand side */ - for (i = 0; i < 6; i++) { + for (i = 0; i <= last_line; i++) { unsigned x = pane->x2 + 2; - unsigned y = pane->inner_y1 + pane->inner_height * (5 - i) / 5 - + unsigned y = pane->inner_y1 + + pane->inner_height * (last_line - i) / last_line - hud->font.glyph_height / 2; - number_to_human_readable(pane->max_value * i / 5, pane->max_value, + number_to_human_readable(pane->max_value * i / last_line, pane->type, str); hud_draw_string(hud, x, y, "%s", str); } @@ -357,8 +390,7 @@ unsigned x = pane->x1 + 2; unsigned y = pane->y2 + 2 + i*hud->font.glyph_height; - number_to_human_readable(gr->current_value, pane->max_value, - pane->type, str); + number_to_human_readable(gr->current_value, pane->type, str); hud_draw_string(hud, x, y, " %s: %s", gr->name, str); i++; } @@ -386,8 +418,9 @@ line_verts[num++] = (float) pane->y2; /* draw horizontal lines inside the graph */ - for (i = 0; i <= 5; i++) { - float y = round((pane->max_value * i / 5.0) * pane->yscale + pane->inner_y2); + for (i = 0; i <= last_line; i++) { + float y = round((pane->max_value * i / (double)last_line) * + pane->yscale + pane->inner_y2); assert(hud->whitelines.num_vertices + num/2 + 2 <= hud->whitelines.max_num_vertices); line_verts[num++] = pane->x1; @@ -450,7 +483,7 @@ const struct pipe_sampler_state *sampler_states[] = { &hud->font_sampler_state }; struct hud_pane *pane; - struct hud_graph *gr; + struct hud_graph *gr, *next; if (!huds_visible) return; @@ -484,6 +517,18 @@ /* set states */ memset(&surf_templ, 0, sizeof(surf_templ)); surf_templ.format = tex->format; + + /* Without this, AA lines look thinner if they are between 2 pixels + * because the alpha is 0.5 on both pixels. (it's ugly) + * + * sRGB makes the width of all AA lines look the same. + */ + if (hud->has_srgb) { + enum pipe_format srgb_format = util_format_srgb(tex->format); + + if (srgb_format != PIPE_FORMAT_NONE) + surf_templ.format = srgb_format; + } surf = pipe->create_surface(pipe, tex, &surf_templ); memset(&fb, 0, sizeof(fb)); @@ -503,7 +548,6 @@ cso_set_framebuffer(cso, &fb); cso_set_sample_mask(cso, ~0); cso_set_min_samples(cso, 1); - cso_set_blend(cso, &hud->alpha_blend); cso_set_depth_stencil_alpha(cso, &hud->dsa); cso_set_rasterizer(cso, &hud->rasterizer); cso_set_viewport(cso, &viewport); @@ -520,9 +564,9 @@ cso_set_constant_buffer(cso, PIPE_SHADER_VERTEX, 0, &hud->constbuf); /* prepare vertex buffers */ - hud_alloc_vertices(hud, &hud->bg, 4 * 128, 2 * sizeof(float)); + hud_alloc_vertices(hud, &hud->bg, 16 * 256, 2 * sizeof(float)); hud_alloc_vertices(hud, &hud->whitelines, 4 * 256, 2 * sizeof(float)); - hud_alloc_vertices(hud, &hud->text, 4 * 512, 4 * sizeof(float)); + hud_alloc_vertices(hud, &hud->text, 16 * 1024, 4 * sizeof(float)); /* prepare all graphs */ hud_batch_query_update(hud->batch_query); @@ -532,6 +576,23 @@ gr->query_new_value(gr); } + if (pane->sort_items) { + LIST_FOR_EACH_ENTRY_SAFE(gr, next, &pane->graph_list, head) { + /* ignore the last one */ + if (&gr->head == pane->graph_list.prev) + continue; + + /* This is an incremental bubble sort, because we only do one pass + * per frame. It will eventually reach an equilibrium. + */ + if (gr->current_value < + LIST_ENTRY(struct hud_graph, next, head)->current_value) { + LIST_DEL(&gr->head); + LIST_ADD(&gr->head, &next->head); + } + } + } + hud_pane_accumulate_vertices(hud, pane); } @@ -539,6 +600,7 @@ u_upload_unmap(hud->uploader); /* draw accumulated vertices for background quads */ + cso_set_blend(cso, &hud->alpha_blend); cso_set_fragment_shader_handle(hud->cso, hud->fs_color); if (hud->bg.num_vertices) { @@ -559,6 +621,8 @@ pipe_resource_reference(&hud->bg.vbuf.buffer, NULL); /* draw accumulated vertices for white lines */ + cso_set_blend(cso, &hud->no_blend); + hud->constants.color[0] = 1; hud->constants.color[1] = 1; hud->constants.color[2] = 1; @@ -578,6 +642,7 @@ pipe_resource_reference(&hud->whitelines.vbuf.buffer, NULL); /* draw accumulated vertices for text */ + cso_set_blend(cso, &hud->alpha_blend); if (hud->text.num_vertices) { cso_set_vertex_buffers(cso, cso_get_aux_vertex_buffer_slot(cso), 1, &hud->text.vbuf); @@ -587,6 +652,7 @@ pipe_resource_reference(&hud->text.vbuf.buffer, NULL); /* draw the rest */ + cso_set_rasterizer(cso, &hud->rasterizer_aa_lines); LIST_FOR_EACH_ENTRY(pane, &hud->pane_list, head) { if (pane) hud_pane_draw_colored_objects(hud, pane); @@ -596,6 +662,23 @@ cso_restore_constant_buffer_slot0(cso, PIPE_SHADER_VERTEX); pipe_surface_reference(&surf, NULL); + + /* Start queries. */ + hud_batch_query_begin(hud->batch_query); + + LIST_FOR_EACH_ENTRY(pane, &hud->pane_list, head) { + LIST_FOR_EACH_ENTRY(gr, &pane->graph_list, head) { + if (gr->begin_query) + gr->begin_query(gr); + } + } +} + +static void +fixup_bytes(enum pipe_driver_query_type type, int position, uint64_t *exp10) +{ + if (type == PIPE_DRIVER_QUERY_TYPE_BYTES && position % 3 == 0) + *exp10 = (*exp10 / 1000) * 1024; } /** @@ -605,7 +688,74 @@ void hud_pane_set_max_value(struct hud_pane *pane, uint64_t value) { - pane->max_value = value; + double leftmost_digit; + uint64_t exp10; + int i; + + /* The following code determines the max_value in the graph as well as + * how many describing lines are drawn. The max_value is rounded up, + * so that all drawn numbers are rounded for readability. + * We want to print multiples of a simple number instead of multiples of + * hard-to-read numbers like 1.753. + */ + + /* Find the left-most digit. */ + exp10 = 1; + for (i = 0; value > 9 * exp10; i++) { + exp10 *= 10; + fixup_bytes(pane->type, i + 1, &exp10); + } + + leftmost_digit = DIV_ROUND_UP(value, exp10); + + /* Round 9 to 10. */ + if (leftmost_digit == 9) { + leftmost_digit = 1; + exp10 *= 10; + fixup_bytes(pane->type, i + 1, &exp10); + } + + switch ((unsigned)leftmost_digit) { + case 1: + pane->last_line = 5; /* lines in +1/5 increments */ + break; + case 2: + pane->last_line = 8; /* lines in +1/4 increments. */ + break; + case 3: + case 4: + pane->last_line = leftmost_digit * 2; /* lines in +1/2 increments */ + break; + case 5: + case 6: + case 7: + case 8: + pane->last_line = leftmost_digit; /* lines in +1 increments */ + break; + default: + assert(0); + } + + /* Truncate {3,4} to {2.5, 3.5} if possible. */ + for (i = 3; i <= 4; i++) { + if (leftmost_digit == i && value <= (i - 0.5) * exp10) { + leftmost_digit = i - 0.5; + pane->last_line = leftmost_digit * 2; /* lines in +1/2 increments. */ + } + } + + /* Truncate 2 to a multiple of 0.2 in (1, 1.6] if possible. */ + if (leftmost_digit == 2) { + for (i = 1; i <= 3; i++) { + if (value <= (1 + i*0.2) * exp10) { + leftmost_digit = 1 + i*0.2; + pane->last_line = 5 + i; /* lines in +1/5 increments. */ + break; + } + } + } + + pane->max_value = leftmost_digit * exp10; pane->yscale = -(int)pane->inner_height / (float)pane->max_value; } @@ -638,7 +788,7 @@ static struct hud_pane * hud_pane_create(unsigned x1, unsigned y1, unsigned x2, unsigned y2, unsigned period, uint64_t max_value, uint64_t ceiling, - boolean dyn_ceiling) + boolean dyn_ceiling, boolean sort_items) { struct hud_pane *pane = CALLOC_STRUCT(hud_pane); @@ -660,12 +810,24 @@ pane->ceiling = ceiling; pane->dyn_ceiling = dyn_ceiling; pane->dyn_ceil_last_ran = 0; + pane->sort_items = sort_items; pane->initial_max_value = max_value; hud_pane_set_max_value(pane, max_value); LIST_INITHEAD(&pane->graph_list); return pane; } +/* replace '-' with a space */ +static void +strip_hyphens(char *s) +{ + while (*s) { + if (*s == '-') + *s = ' '; + s++; + } +} + /** * Add a graph to an existing pane. * One pane can contain multiple graphs over each other. @@ -679,26 +841,29 @@ {0, 1, 1}, {1, 0, 1}, {1, 1, 0}, - {0.5, 0.5, 1}, - {0.5, 0.5, 0.5}, + {0.5, 1, 0.5}, + {1, 0.5, 0.5}, + {0.5, 1, 1}, + {1, 0.5, 1}, + {1, 1, 0.5}, + {0, 0.5, 0}, + {0.5, 0, 0}, + {0, 0.5, 0.5}, + {0.5, 0, 0.5}, + {0.5, 0.5, 0}, }; - char *name = gr->name; + unsigned color = pane->next_color % ARRAY_SIZE(colors); - /* replace '-' with a space */ - while (*name) { - if (*name == '-') - *name = ' '; - name++; - } + strip_hyphens(gr->name); - assert(pane->num_graphs < ARRAY_SIZE(colors)); gr->vertices = MALLOC(pane->max_num_vertices * sizeof(float) * 2); - gr->color[0] = colors[pane->num_graphs][0]; - gr->color[1] = colors[pane->num_graphs][1]; - gr->color[2] = colors[pane->num_graphs][2]; + gr->color[0] = colors[color][0]; + gr->color[1] = colors[color][1]; + gr->color[2] = colors[color][2]; gr->pane = pane; LIST_ADDTAIL(&gr->head, &pane->graph_list); pane->num_graphs++; + pane->next_color++; } void @@ -707,6 +872,9 @@ gr->current_value = value; value = value > gr->pane->ceiling ? gr->pane->ceiling : value; + if (gr->fd) + fprintf(gr->fd, "%" PRIu64 "\n", value); + if (gr->index == gr->pane->max_num_vertices) { gr->vertices[0] = 0; gr->vertices[1] = gr->vertices[(gr->index-1)*2+1]; @@ -734,9 +902,31 @@ FREE(graph->vertices); if (graph->free_query_data) graph->free_query_data(graph->query_data); + if (graph->fd) + fclose(graph->fd); FREE(graph); } +void +hud_graph_set_dump_file(struct hud_graph *gr) +{ +#ifndef PIPE_OS_WINDOWS + const char *hud_dump_dir = getenv("GALLIUM_HUD_DUMP_DIR"); + char *dump_file; + + if (hud_dump_dir && access(hud_dump_dir, W_OK) == 0) { + dump_file = malloc(strlen(hud_dump_dir) + sizeof("/") + sizeof(gr->name)); + if (dump_file) { + strcpy(dump_file, hud_dump_dir); + strcat(dump_file, "/"); + strcat(dump_file, gr->name); + gr->fd = fopen(dump_file, "w+"); + free(dump_file); + } + } +#endif +} + /** * Read a string from the environment variable. * The separators "+", ",", ":", and ";" terminate the string. @@ -747,22 +937,26 @@ { int i; - for (i = 0; *s && *s != '+' && *s != ',' && *s != ':' && *s != ';'; + for (i = 0; *s && *s != '+' && *s != ',' && *s != ':' && *s != ';' && *s != '='; s++, out++, i++) *out = *s; *out = 0; - if (*s && !i) + if (*s && !i) { fprintf(stderr, "gallium_hud: syntax error: unexpected '%c' (%i) while " "parsing a string\n", *s, *s); + fflush(stderr); + } + return i; } static char * read_pane_settings(char *str, unsigned * const x, unsigned * const y, unsigned * const width, unsigned * const height, - uint64_t * const ceiling, boolean * const dyn_ceiling) + uint64_t * const ceiling, boolean * const dyn_ceiling, + boolean *reset_colors, boolean *sort_items) { char *ret = str; unsigned tmp; @@ -813,8 +1007,21 @@ *dyn_ceiling = true; break; + case 'r': + ++str; + ret = str; + *reset_colors = true; + break; + + case 's': + ++str; + ret = str; + *sort_items = true; + break; + default: fprintf(stderr, "gallium_hud: syntax error: unexpected '%c'\n", *str); + fflush(stderr); } } @@ -853,6 +1060,8 @@ uint64_t ceiling = UINT64_MAX; unsigned column_width = 251; boolean dyn_ceiling = false; + boolean reset_colors = false; + boolean sort_items = false; const char *period_env; /* @@ -873,7 +1082,7 @@ /* check for explicit location, size and etc. settings */ name = read_pane_settings(name_a, &x, &y, &width, &height, &ceiling, - &dyn_ceiling); + &dyn_ceiling, &reset_colors, &sort_items); /* * Keep track of overall column width to avoid pane overlapping in case @@ -884,12 +1093,20 @@ if (!pane) { pane = hud_pane_create(x, y, x + width, y + height, period, 10, - ceiling, dyn_ceiling); + ceiling, dyn_ceiling, sort_items); if (!pane) return; } + if (reset_colors) { + pane->next_color = 0; + reset_colors = false; + } + /* Add a graph. */ +#if HAVE_GALLIUM_EXTRA_HUD || HAVE_LIBSENSORS + char arg_name[64]; +#endif /* IF YOU CHANGE THIS, UPDATE print_help! */ if (strcmp(name, "fps") == 0) { hud_fps_graph_install(pane); @@ -900,6 +1117,65 @@ else if (sscanf(name, "cpu%u%s", &i, s) == 1) { hud_cpu_graph_install(pane, i); } +#if HAVE_GALLIUM_EXTRA_HUD + else if (sscanf(name, "nic-rx-%s", arg_name) == 1) { + hud_nic_graph_install(pane, arg_name, NIC_DIRECTION_RX); + } + else if (sscanf(name, "nic-tx-%s", arg_name) == 1) { + hud_nic_graph_install(pane, arg_name, NIC_DIRECTION_TX); + } + else if (sscanf(name, "nic-rssi-%s", arg_name) == 1) { + hud_nic_graph_install(pane, arg_name, NIC_RSSI_DBM); + pane->type = PIPE_DRIVER_QUERY_TYPE_DBM; + } + else if (sscanf(name, "diskstat-rd-%s", arg_name) == 1) { + hud_diskstat_graph_install(pane, arg_name, DISKSTAT_RD); + pane->type = PIPE_DRIVER_QUERY_TYPE_BYTES; + } + else if (sscanf(name, "diskstat-wr-%s", arg_name) == 1) { + hud_diskstat_graph_install(pane, arg_name, DISKSTAT_WR); + pane->type = PIPE_DRIVER_QUERY_TYPE_BYTES; + } + else if (sscanf(name, "cpufreq-min-cpu%u", &i) == 1) { + hud_cpufreq_graph_install(pane, i, CPUFREQ_MINIMUM); + pane->type = PIPE_DRIVER_QUERY_TYPE_HZ; + } + else if (sscanf(name, "cpufreq-cur-cpu%u", &i) == 1) { + hud_cpufreq_graph_install(pane, i, CPUFREQ_CURRENT); + pane->type = PIPE_DRIVER_QUERY_TYPE_HZ; + } + else if (sscanf(name, "cpufreq-max-cpu%u", &i) == 1) { + hud_cpufreq_graph_install(pane, i, CPUFREQ_MAXIMUM); + pane->type = PIPE_DRIVER_QUERY_TYPE_HZ; + } +#endif +#if HAVE_LIBSENSORS + else if (sscanf(name, "sensors_temp_cu-%s", arg_name) == 1) { + hud_sensors_temp_graph_install(pane, arg_name, + SENSORS_TEMP_CURRENT); + pane->type = PIPE_DRIVER_QUERY_TYPE_TEMPERATURE; + } + else if (sscanf(name, "sensors_temp_cr-%s", arg_name) == 1) { + hud_sensors_temp_graph_install(pane, arg_name, + SENSORS_TEMP_CRITICAL); + pane->type = PIPE_DRIVER_QUERY_TYPE_TEMPERATURE; + } + else if (sscanf(name, "sensors_volt_cu-%s", arg_name) == 1) { + hud_sensors_temp_graph_install(pane, arg_name, + SENSORS_VOLTAGE_CURRENT); + pane->type = PIPE_DRIVER_QUERY_TYPE_VOLTS; + } + else if (sscanf(name, "sensors_curr_cu-%s", arg_name) == 1) { + hud_sensors_temp_graph_install(pane, arg_name, + SENSORS_CURRENT_CURRENT); + pane->type = PIPE_DRIVER_QUERY_TYPE_AMPS; + } + else if (sscanf(name, "sensors_pow_cu-%s", arg_name) == 1) { + hud_sensors_temp_graph_install(pane, arg_name, + SENSORS_POWER_CURRENT); + pane->type = PIPE_DRIVER_QUERY_TYPE_WATTS; + } +#endif else if (strcmp(name, "samples-passed") == 0 && has_occlusion_query(hud->pipe->screen)) { hud_pipe_query_install(&hud->batch_query, pane, hud->pipe, @@ -955,6 +1231,7 @@ if (!hud_driver_query_install(&hud->batch_query, pane, hud->pipe, name)) { fprintf(stderr, "gallium_hud: unknown driver query '%s'\n", name); + fflush(stderr); } } } @@ -965,6 +1242,7 @@ if (!pane) { fprintf(stderr, "gallium_hud: syntax error: unexpected ':', " "expected a name\n"); + fflush(stderr); break; } @@ -977,7 +1255,30 @@ } else { fprintf(stderr, "gallium_hud: syntax error: unexpected '%c' (%i) " - "after ':'\n", *env, *env); + "after ':'\n", *env, *env); + fflush(stderr); + } + } + + if (*env == '=') { + env++; + + if (!pane) { + fprintf(stderr, "gallium_hud: syntax error: unexpected '=', " + "expected a name\n"); + fflush(stderr); + break; + } + + num = parse_string(env, s); + env += num; + + strip_hyphens(s); + if (!LIST_IS_EMPTY(&pane->graph_list)) { + struct hud_graph *graph; + graph = LIST_ENTRY(struct hud_graph, pane->graph_list.prev, head); + strncpy(graph->name, s, sizeof(graph->name)-1); + graph->name[sizeof(graph->name)-1] = 0; } } @@ -1007,7 +1308,7 @@ case ';': env++; y = 10; - x += column_width + hud->font.glyph_width * 7; + x += column_width + hud->font.glyph_width * 9; height = 100; if (pane && pane->num_graphs) { @@ -1021,12 +1322,14 @@ default: fprintf(stderr, "gallium_hud: syntax error: unexpected '%c'\n", *env); + fflush(stderr); } /* Reset to defaults for the next pane in case these were modified. */ width = 251; ceiling = UINT64_MAX; dyn_ceiling = false; + sort_items = false; } @@ -1056,6 +1359,8 @@ puts(" for the given pane."); puts(" ',' creates a new pane below the last one."); puts(" ';' creates a new pane at the top of the next column."); + puts(" '=' followed by a string, changes the name of the last data source"); + puts(" to that string"); puts(""); puts(" Example: GALLIUM_HUD=\"cpu,fps;primitives-generated\""); puts(""); @@ -1076,6 +1381,8 @@ puts(" the ceiling allows, the value is clamped."); puts(" 'd' activates dynamic Y axis readjustment to set the value of"); puts(" the Y axis to match the highest value still visible in the graph."); + puts(" 'r' resets the color counter (the next color will be green)"); + puts(" 's' sort items below graphs in descending order"); puts(""); puts(" If 'c' and 'd' modifiers are used simultaneously, both are in effect:"); puts(" the Y axis does not go above the restriction imposed by 'c' while"); @@ -1109,6 +1416,15 @@ puts(" cs-invocations"); } +#if HAVE_GALLIUM_EXTRA_HUD + hud_get_num_disks(1); + hud_get_num_nics(1); + hud_get_num_cpufreq(1); +#endif +#if HAVE_LIBSENSORS + hud_get_num_sensors(1); +#endif + if (screen->get_driver_query_info){ boolean skipping = false; struct pipe_driver_query_info info; @@ -1134,12 +1450,13 @@ struct hud_context * hud_create(struct pipe_context *pipe, struct cso_context *cso) { + struct pipe_screen *screen = pipe->screen; struct hud_context *hud; struct pipe_sampler_view view_templ; unsigned i; const char *env = debug_get_option("GALLIUM_HUD", NULL); - unsigned signo = debug_get_num_option("GALLIUM_HUD_TOGGLE_SIGNAL", 0); #ifdef PIPE_OS_UNIX + unsigned signo = debug_get_num_option("GALLIUM_HUD_TOGGLE_SIGNAL", 0); static boolean sig_handled = FALSE; struct sigaction action = {}; #endif @@ -1169,7 +1486,14 @@ return NULL; } + hud->has_srgb = screen->is_format_supported(screen, + PIPE_FORMAT_B8G8R8A8_SRGB, + PIPE_TEXTURE_2D, 0, + PIPE_BIND_RENDER_TARGET) != 0; + /* blend state */ + hud->no_blend.rt[0].colormask = PIPE_MASK_RGBA; + hud->alpha_blend.rt[0].colormask = PIPE_MASK_RGBA; hud->alpha_blend.rt[0].blend_enable = 1; hud->alpha_blend.rt[0].rgb_func = PIPE_BLEND_ADD; @@ -1222,6 +1546,9 @@ hud->rasterizer.line_width = 1; hud->rasterizer.line_last_pixel = 1; + hud->rasterizer_aa_lines = hud->rasterizer; + hud->rasterizer_aa_lines.line_smooth = 1; + /* vertex shader */ { static const char *vertex_shader_text = { diff -Nru mesa-12.0.6/src/gallium/auxiliary/hud/hud_cpu.c mesa-17.0.7/src/gallium/auxiliary/hud/hud_cpu.c --- mesa-12.0.6/src/gallium/auxiliary/hud/hud_cpu.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/hud/hud_cpu.c 2017-06-01 10:37:10.000000000 +0000 @@ -213,6 +213,8 @@ info = gr->query_data; info->cpu_index = cpu_index; + hud_graph_set_dump_file(gr); + hud_pane_add_graph(pane, gr); hud_pane_set_max_value(pane, 100); } diff -Nru mesa-12.0.6/src/gallium/auxiliary/hud/hud_cpufreq.c mesa-17.0.7/src/gallium/auxiliary/hud/hud_cpufreq.c --- mesa-12.0.6/src/gallium/auxiliary/hud/hud_cpufreq.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/hud/hud_cpufreq.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,254 @@ +/************************************************************************** + * + * Copyright (C) 2016 Steven Toth + * Copyright (C) 2016 Zodiac Inflight Innovations + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#if HAVE_GALLIUM_EXTRA_HUD + +/* Purpose: + * Reading /sys/devices/system/cpu/cpu?/cpufreq/scaling_???_freq + * cpu frequency (KHz), displaying on the HUD in Hz. + */ + +#include "hud/hud_private.h" +#include "util/list.h" +#include "os/os_time.h" +#include "os/os_thread.h" +#include "util/u_memory.h" +#include +#include +#include +#include +#include +#include +#include +#include + +struct cpufreq_info +{ + struct list_head list; + int mode; /* CPUFREQ_MINIMUM, CPUFREQ_CURRENT, CPUFREQ_MAXIMUM */ + char name[16]; /* EG. cpu0 */ + int cpu_index; + + /* EG. /sys/devices/system/cpu/cpu?/cpufreq/scaling_cur_freq */ + char sysfs_filename[128]; + uint64_t KHz; + uint64_t last_time; +}; + +static int gcpufreq_count = 0; +static struct list_head gcpufreq_list; +pipe_static_mutex(gcpufreq_mutex); + +static struct cpufreq_info * +find_cfi_by_index(int cpu_index, int mode) +{ + list_for_each_entry(struct cpufreq_info, cfi, &gcpufreq_list, list) { + if (cfi->mode != mode) + continue; + if (cfi->cpu_index == cpu_index) + return cfi; + } + return 0; +} + +static int +get_file_value(const char *fn, uint64_t *KHz) +{ + FILE *fh = fopen(fn, "r"); + if (!fh) { + fprintf(stderr, "%s error: %s\n", fn, strerror(errno)); + return -1; + } + int ret = fscanf(fh, "%" PRIu64 "", KHz); + fclose(fh); + + return ret; +} + +static void +query_cfi_load(struct hud_graph *gr) +{ + struct cpufreq_info *cfi = gr->query_data; + + uint64_t now = os_time_get(); + if (cfi->last_time) { + if (cfi->last_time + gr->pane->period <= now) { + switch (cfi->mode) { + case CPUFREQ_MINIMUM: + case CPUFREQ_CURRENT: + case CPUFREQ_MAXIMUM: + get_file_value(cfi->sysfs_filename, &cfi->KHz); + hud_graph_add_value(gr, (uint64_t)cfi->KHz * 1000); + } + cfi->last_time = now; + } + } else { + /* initialize */ + get_file_value(cfi->sysfs_filename, &cfi->KHz); + cfi->last_time = now; + } +} + +/** + * Create and initialize a new object for a specific CPU. + * \param pane parent context. + * \param cpu_index CPU identifier Eg. 0 (CPU0) + * \param mode query CPUFREQ_MINIMUM | CURRENT | MAXIMUM statistic. + */ +void +hud_cpufreq_graph_install(struct hud_pane *pane, int cpu_index, + unsigned int mode) +{ + struct hud_graph *gr; + struct cpufreq_info *cfi; + + int num_cpus = hud_get_num_cpufreq(0); + if (num_cpus <= 0) + return; + + cfi = find_cfi_by_index(cpu_index, mode); + if (!cfi) + return; + + gr = CALLOC_STRUCT(hud_graph); + if (!gr) + return; + + cfi->mode = mode; + switch(cfi->mode) { + case CPUFREQ_MINIMUM: + snprintf(gr->name, sizeof(gr->name), "%s-Min", cfi->name); + break; + case CPUFREQ_CURRENT: + snprintf(gr->name, sizeof(gr->name), "%s-Cur", cfi->name); + break; + case CPUFREQ_MAXIMUM: + snprintf(gr->name, sizeof(gr->name), "%s-Max", cfi->name); + break; + default: + return; + } + + gr->query_data = cfi; + gr->query_new_value = query_cfi_load; + + hud_pane_add_graph(pane, gr); + hud_pane_set_max_value(pane, 3000000 /* 3 GHz */); +} + +static void +add_object(const char *name, const char *fn, int objmode, int cpu_index) +{ + struct cpufreq_info *cfi = CALLOC_STRUCT(cpufreq_info); + + strcpy(cfi->name, name); + strcpy(cfi->sysfs_filename, fn); + cfi->mode = objmode; + cfi->cpu_index = cpu_index; + list_addtail(&cfi->list, &gcpufreq_list); + gcpufreq_count++; +} + +/** + * Initialize internal object arrays and display cpu freq HUD help. + * \param displayhelp true if the list of detected cpus should be + displayed on the console. + * \return number of detected CPU metrics (CPU count * 3) + */ +int +hud_get_num_cpufreq(bool displayhelp) +{ + struct dirent *dp; + struct stat stat_buf; + char fn[128]; + int cpu_index; + + /* Return the number of CPU metrics we support. */ + pipe_mutex_lock(gcpufreq_mutex); + if (gcpufreq_count) { + pipe_mutex_unlock(gcpufreq_mutex); + return gcpufreq_count; + } + + /* Scan /sys/devices.../cpu, for every object type we support, create + * and persist an object to represent its different metrics. + */ + list_inithead(&gcpufreq_list); + DIR *dir = opendir("/sys/devices/system/cpu"); + if (!dir) { + pipe_mutex_unlock(gcpufreq_mutex); + return 0; + } + + while ((dp = readdir(dir)) != NULL) { + + /* Avoid 'lo' and '..' and '.' */ + if (strlen(dp->d_name) <= 2) + continue; + + if (sscanf(dp->d_name, "cpu%d\n", &cpu_index) != 1) + continue; + + char basename[256]; + snprintf(basename, sizeof(basename), "/sys/devices/system/cpu/%s", dp->d_name); + + snprintf(fn, sizeof(fn), "%s/cpufreq/scaling_cur_freq", basename); + if (stat(fn, &stat_buf) < 0) + continue; + + if (!S_ISREG(stat_buf.st_mode)) + continue; /* Not a regular file */ + + snprintf(fn, sizeof(fn), "%s/cpufreq/scaling_min_freq", basename); + add_object(dp->d_name, fn, CPUFREQ_MINIMUM, cpu_index); + + snprintf(fn, sizeof(fn), "%s/cpufreq/scaling_cur_freq", basename); + add_object(dp->d_name, fn, CPUFREQ_CURRENT, cpu_index); + + snprintf(fn, sizeof(fn), "%s/cpufreq/scaling_max_freq", basename); + add_object(dp->d_name, fn, CPUFREQ_MAXIMUM, cpu_index); + } + closedir(dir); + + if (displayhelp) { + list_for_each_entry(struct cpufreq_info, cfi, &gcpufreq_list, list) { + char line[128]; + snprintf(line, sizeof(line), " cpufreq-%s-%s", + cfi->mode == CPUFREQ_MINIMUM ? "min" : + cfi->mode == CPUFREQ_CURRENT ? "cur" : + cfi->mode == CPUFREQ_MAXIMUM ? "max" : "undefined", cfi->name); + + puts(line); + } + } + + pipe_mutex_unlock(gcpufreq_mutex); + return gcpufreq_count; +} + +#endif /* HAVE_GALLIUM_EXTRA_HUD */ diff -Nru mesa-12.0.6/src/gallium/auxiliary/hud/hud_diskstat.c mesa-17.0.7/src/gallium/auxiliary/hud/hud_diskstat.c --- mesa-12.0.6/src/gallium/auxiliary/hud/hud_diskstat.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/hud/hud_diskstat.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,328 @@ +/************************************************************************** + * + * Copyright (C) 2016 Steven Toth + * Copyright (C) 2016 Zodiac Inflight Innovations + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#if HAVE_GALLIUM_EXTRA_HUD + +/* Purpose: Reading /sys/block/<*>/stat MB/s read/write throughput per second, + * displaying on the HUD. + */ + +#include "hud/hud_private.h" +#include "util/list.h" +#include "os/os_time.h" +#include "os/os_thread.h" +#include "util/u_memory.h" +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct stat_s +{ + /* Read */ + uint64_t r_ios; + uint64_t r_merges; + uint64_t r_sectors; + uint64_t r_ticks; + /* Write */ + uint64_t w_ios; + uint64_t w_merges; + uint64_t w_sectors; + uint64_t w_ticks; + /* Misc */ + uint64_t in_flight; + uint64_t io_ticks; + uint64_t time_in_queue; +}; + +struct diskstat_info +{ + struct list_head list; + int mode; /* DISKSTAT_RD, DISKSTAT_WR */ + char name[64]; /* EG. sda5 */ + + char sysfs_filename[128]; + uint64_t last_time; + struct stat_s last_stat; +}; + +/* TODO: We don't handle dynamic block device / partition + * arrival or removal. + * Static globals specific to this HUD category. + */ +static int gdiskstat_count = 0; +static struct list_head gdiskstat_list; +pipe_static_mutex(gdiskstat_mutex); + +static struct diskstat_info * +find_dsi_by_name(const char *n, int mode) +{ + list_for_each_entry(struct diskstat_info, dsi, &gdiskstat_list, list) { + if (dsi->mode != mode) + continue; + if (strcasecmp(dsi->name, n) == 0) + return dsi; + } + return 0; +} + +static int +get_file_values(const char *fn, struct stat_s *s) +{ + int ret = 0; + FILE *fh = fopen(fn, "r"); + if (!fh) + return -1; + + ret = fscanf(fh, + "%" PRIu64 " %" PRIu64 " %" PRIu64 " %" PRIu64 " %" PRIu64 " %" PRIu64 + " %" PRIu64 " %" PRIu64 " %" PRIu64 " %" PRIu64 " %" PRIu64 "", + &s->r_ios, &s->r_merges, &s->r_sectors, &s->r_ticks, &s->w_ios, + &s->w_merges, &s->w_sectors, &s->w_ticks, &s->in_flight, &s->io_ticks, + &s->time_in_queue); + + fclose(fh); + + return ret; +} + +static void +query_dsi_load(struct hud_graph *gr) +{ + /* The framework calls us periodically, compensate for the + * calling interval accordingly when reporting per second. + */ + struct diskstat_info *dsi = gr->query_data; + uint64_t now = os_time_get(); + + if (dsi->last_time) { + if (dsi->last_time + gr->pane->period <= now) { + struct stat_s stat; + if (get_file_values(dsi->sysfs_filename, &stat) < 0) + return; + float val = 0; + + switch (dsi->mode) { + case DISKSTAT_RD: + val = + ((stat.r_sectors - + dsi->last_stat.r_sectors) * 512) / + (((float) gr->pane->period / 1000) / 1000); + break; + case DISKSTAT_WR: + val = + ((stat.w_sectors - + dsi->last_stat.w_sectors) * 512) / + (((float) gr->pane->period / 1000) / 1000); + break; + } + + hud_graph_add_value(gr, (uint64_t) val); + dsi->last_stat = stat; + dsi->last_time = now; + } + } + else { + /* initialize */ + switch (dsi->mode) { + case DISKSTAT_RD: + case DISKSTAT_WR: + get_file_values(dsi->sysfs_filename, &dsi->last_stat); + break; + } + dsi->last_time = now; + } +} + +/** + * Create and initialize a new object for a specific block I/O device. + * \param pane parent context. + * \param dev_name logical block device name, EG. sda5. + * \param mode query read or write (DISKSTAT_RD/DISKSTAT_WR) statistics. + */ +void +hud_diskstat_graph_install(struct hud_pane *pane, const char *dev_name, + unsigned int mode) +{ + struct hud_graph *gr; + struct diskstat_info *dsi; + + int num_devs = hud_get_num_disks(0); + if (num_devs <= 0) + return; + + dsi = find_dsi_by_name(dev_name, mode); + if (!dsi) + return; + + gr = CALLOC_STRUCT(hud_graph); + if (!gr) + return; + + dsi->mode = mode; + if (dsi->mode == DISKSTAT_RD) { + snprintf(gr->name, sizeof(gr->name), "%s-Read-MB/s", dsi->name); + } + else if (dsi->mode == DISKSTAT_WR) { + snprintf(gr->name, sizeof(gr->name), "%s-Write-MB/s", dsi->name); + } + else + return; + + gr->query_data = dsi; + gr->query_new_value = query_dsi_load; + + hud_pane_add_graph(pane, gr); + hud_pane_set_max_value(pane, 100); +} + +static void +add_object_part(const char *basename, const char *name, int objmode) +{ + struct diskstat_info *dsi = CALLOC_STRUCT(diskstat_info); + + strcpy(dsi->name, name); + snprintf(dsi->sysfs_filename, sizeof(dsi->sysfs_filename), "%s/%s/stat", + basename, name); + dsi->mode = objmode; + list_addtail(&dsi->list, &gdiskstat_list); + gdiskstat_count++; +} + +static void +add_object(const char *basename, const char *name, int objmode) +{ + struct diskstat_info *dsi = CALLOC_STRUCT(diskstat_info); + + strcpy(dsi->name, name); + snprintf(dsi->sysfs_filename, sizeof(dsi->sysfs_filename), "%s/stat", + basename); + dsi->mode = objmode; + list_addtail(&dsi->list, &gdiskstat_list); + gdiskstat_count++; +} + +/** + * Initialize internal object arrays and display block I/O HUD help. + * \param displayhelp true if the list of detected devices should be + displayed on the console. + * \return number of detected block I/O devices. + */ +int +hud_get_num_disks(bool displayhelp) +{ + struct dirent *dp; + struct stat stat_buf; + char name[64]; + + /* Return the number of block devices and partitions. */ + pipe_mutex_lock(gdiskstat_mutex); + if (gdiskstat_count) { + pipe_mutex_unlock(gdiskstat_mutex); + return gdiskstat_count; + } + + /* Scan /sys/block, for every object type we support, create and + * persist an object to represent its different statistics. + */ + list_inithead(&gdiskstat_list); + DIR *dir = opendir("/sys/block/"); + if (!dir) { + pipe_mutex_unlock(gdiskstat_mutex); + return 0; + } + + while ((dp = readdir(dir)) != NULL) { + + /* Avoid 'lo' and '..' and '.' */ + if (strlen(dp->d_name) <= 2) + continue; + + char basename[256]; + snprintf(basename, sizeof(basename), "/sys/block/%s", dp->d_name); + snprintf(name, sizeof(name), "%s/stat", basename); + if (stat(name, &stat_buf) < 0) + continue; + + if (!S_ISREG(stat_buf.st_mode)) + continue; /* Not a regular file */ + + /* Add a physical block device with R/W stats */ + add_object(basename, dp->d_name, DISKSTAT_RD); + add_object(basename, dp->d_name, DISKSTAT_WR); + + /* Add any partitions */ + struct dirent *dpart; + DIR *pdir = opendir(basename); + if (!pdir) { + pipe_mutex_unlock(gdiskstat_mutex); + closedir(dir); + return 0; + } + + while ((dpart = readdir(pdir)) != NULL) { + /* Avoid 'lo' and '..' and '.' */ + if (strlen(dpart->d_name) <= 2) + continue; + + char p[64]; + snprintf(p, sizeof(p), "%s/%s/stat", basename, dpart->d_name); + if (stat(p, &stat_buf) < 0) + continue; + + if (!S_ISREG(stat_buf.st_mode)) + continue; /* Not a regular file */ + + /* Add a partition with R/W stats */ + add_object_part(basename, dpart->d_name, DISKSTAT_RD); + add_object_part(basename, dpart->d_name, DISKSTAT_WR); + } + } + closedir(dir); + + if (displayhelp) { + list_for_each_entry(struct diskstat_info, dsi, &gdiskstat_list, list) { + char line[32]; + snprintf(line, sizeof(line), " diskstat-%s-%s", + dsi->mode == DISKSTAT_RD ? "rd" : + dsi->mode == DISKSTAT_WR ? "wr" : "undefined", dsi->name); + + puts(line); + } + } + pipe_mutex_unlock(gdiskstat_mutex); + + return gdiskstat_count; +} + +#endif /* HAVE_GALLIUM_EXTRA_HUD */ diff -Nru mesa-12.0.6/src/gallium/auxiliary/hud/hud_driver_query.c mesa-17.0.7/src/gallium/auxiliary/hud/hud_driver_query.c --- mesa-12.0.6/src/gallium/auxiliary/hud/hud_driver_query.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/hud/hud_driver_query.c 2017-06-01 10:37:10.000000000 +0000 @@ -116,8 +116,15 @@ return; } } +} - if (!pipe->begin_query(pipe, bq->query[bq->head])) { +void +hud_batch_query_begin(struct hud_batch_query_context *bq) +{ + if (!bq || bq->failed || !bq->query[bq->head]) + return; + + if (!bq->pipe->begin_query(bq->pipe, bq->query[bq->head])) { fprintf(stderr, "gallium_hud: could not begin batch query. You may have " "selected too many or incompatible queries.\n"); @@ -277,7 +284,15 @@ /* initialize */ info->query[info->head] = pipe->create_query(pipe, info->query_type, 0); } +} +static void +begin_query(struct hud_graph *gr) +{ + struct query_info *info = gr->query_data; + struct pipe_context *pipe = info->pipe; + + assert(!info->batch); if (info->query[info->head]) pipe->begin_query(pipe, info->query[info->head]); } @@ -374,14 +389,18 @@ goto fail_info; info->batch = *pbq; } else { + gr->begin_query = begin_query; info->query_type = query_type; info->result_index = result_index; } + hud_graph_set_dump_file(gr); + hud_pane_add_graph(pane, gr); + pane->type = type; /* must be set before updating the max_value */ + if (pane->max_value < max_value) hud_pane_set_max_value(pane, max_value); - pane->type = type; return; fail_info: diff -Nru mesa-12.0.6/src/gallium/auxiliary/hud/hud_fps.c mesa-17.0.7/src/gallium/auxiliary/hud/hud_fps.c --- mesa-12.0.6/src/gallium/auxiliary/hud/hud_fps.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/hud/hud_fps.c 2017-06-01 10:37:10.000000000 +0000 @@ -88,5 +88,7 @@ */ gr->free_query_data = free_query_data; + hud_graph_set_dump_file(gr); + hud_pane_add_graph(pane, gr); } diff -Nru mesa-12.0.6/src/gallium/auxiliary/hud/hud_nic.c mesa-17.0.7/src/gallium/auxiliary/hud/hud_nic.c --- mesa-12.0.6/src/gallium/auxiliary/hud/hud_nic.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/hud/hud_nic.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,426 @@ +/************************************************************************** + * + * Copyright (C) 2016 Steven Toth + * Copyright (C) 2016 Zodiac Inflight Innovations + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#if HAVE_GALLIUM_EXTRA_HUD + +/* Purpose: Reading network interface RX/TX throughput per second, + * displaying on the HUD. + */ + +#include "hud/hud_private.h" +#include "util/list.h" +#include "os/os_time.h" +#include "os/os_thread.h" +#include "util/u_memory.h" +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct nic_info +{ + struct list_head list; + int mode; + char name[64]; + uint64_t speedMbps; + int is_wireless; + + char throughput_filename[128]; + uint64_t last_time; + uint64_t last_nic_bytes; +}; + +/* TODO: We don't handle dynamic NIC arrival or removal. + * Static globals specific to this HUD category. + */ +static int gnic_count = 0; +static struct list_head gnic_list; +pipe_static_mutex(gnic_mutex); + +static struct nic_info * +find_nic_by_name(const char *n, int mode) +{ + list_for_each_entry(struct nic_info, nic, &gnic_list, list) { + if (nic->mode != mode) + continue; + + if (strcasecmp(nic->name, n) == 0) + return nic; + } + return 0; +} + +static int +get_file_value(const char *fname, uint64_t *value) +{ + FILE *fh = fopen(fname, "r"); + if (!fh) + return -1; + if (fscanf(fh, "%" PRIu64 "", value) != 0) { + /* Error */ + } + fclose(fh); + return 0; +} + +static boolean +get_nic_bytes(const char *fn, uint64_t *bytes) +{ + if (get_file_value(fn, bytes) < 0) + return FALSE; + + return TRUE; +} + +static void +query_wifi_bitrate(const struct nic_info *nic, uint64_t *bitrate) +{ + int sockfd; + struct iw_statistics stats; + struct iwreq req; + + memset(&stats, 0, sizeof(stats)); + memset(&req, 0, sizeof(req)); + + strcpy(req.ifr_name, nic->name); + req.u.data.pointer = &stats; + req.u.data.flags = 1; + req.u.data.length = sizeof(struct iw_statistics); + + /* Any old socket will do, and a datagram socket is pretty cheap */ + if ((sockfd = socket(AF_INET, SOCK_DGRAM, 0)) == -1) { + fprintf(stderr, "Unable to create socket for %s\n", nic->name); + return; + } + + if (ioctl(sockfd, SIOCGIWRATE, &req) == -1) { + fprintf(stderr, "Error performing SIOCGIWSTATS on %s\n", nic->name); + close(sockfd); + return; + } + *bitrate = req.u.bitrate.value; + + close(sockfd); +} + +static void +query_nic_rssi(const struct nic_info *nic, uint64_t *leveldBm) +{ + int sockfd; + struct iw_statistics stats; + struct iwreq req; + + memset(&stats, 0, sizeof(stats)); + memset(&req, 0, sizeof(req)); + + strcpy(req.ifr_name, nic->name); + req.u.data.pointer = &stats; + req.u.data.flags = 1; + req.u.data.length = sizeof(struct iw_statistics); + + if (nic->mode != NIC_RSSI_DBM) + return; + + /* Any old socket will do, and a datagram socket is pretty cheap */ + if ((sockfd = socket(AF_INET, SOCK_DGRAM, 0)) == -1) { + fprintf(stderr, "Unable to create socket for %s\n", nic->name); + return; + } + + /* Perform the ioctl */ + if (ioctl(sockfd, SIOCGIWSTATS, &req) == -1) { + fprintf(stderr, "Error performing SIOCGIWSTATS on %s\n", nic->name); + close(sockfd); + return; + } + *leveldBm = ((char) stats.qual.level * -1); + + close(sockfd); +} + +static void +query_nic_load(struct hud_graph *gr) +{ + /* The framework calls us at a regular but indefined period, + * not once per second, compensate the statistics accordingly. + */ + + struct nic_info *nic = gr->query_data; + uint64_t now = os_time_get(); + + if (nic->last_time) { + if (nic->last_time + gr->pane->period <= now) { + switch (nic->mode) { + case NIC_DIRECTION_RX: + case NIC_DIRECTION_TX: + { + uint64_t bytes; + get_nic_bytes(nic->throughput_filename, &bytes); + uint64_t nic_mbps = + ((bytes - nic->last_nic_bytes) / 1000000) * 8; + + float speedMbps = nic->speedMbps; + float periodMs = gr->pane->period / 1000; + float bits = nic_mbps; + float period_factor = periodMs / 1000; + float period_speed = speedMbps * period_factor; + float pct = (bits / period_speed) * 100; + + /* Scaling bps with a narrow time period into a second, + * potentially suffers from routing errors at higher + * periods. Eg 104%. Compensate. + */ + if (pct > 100) + pct = 100; + hud_graph_add_value(gr, (uint64_t) pct); + + nic->last_nic_bytes = bytes; + } + break; + case NIC_RSSI_DBM: + { + uint64_t leveldBm = 0; + query_nic_rssi(nic, &leveldBm); + hud_graph_add_value(gr, leveldBm); + } + break; + } + + nic->last_time = now; + } + } + else { + /* initialize */ + switch (nic->mode) { + case NIC_DIRECTION_RX: + case NIC_DIRECTION_TX: + get_nic_bytes(nic->throughput_filename, &nic->last_nic_bytes); + break; + case NIC_RSSI_DBM: + break; + } + + nic->last_time = now; + } +} + +/** + * Create and initialize a new object for a specific network interface dev. + * \param pane parent context. + * \param nic_name logical block device name, EG. eth0. + * \param mode query type (NIC_DIRECTION_RX/WR/RSSI) statistics. + */ +void +hud_nic_graph_install(struct hud_pane *pane, const char *nic_name, + unsigned int mode) +{ + struct hud_graph *gr; + struct nic_info *nic; + + int num_nics = hud_get_num_nics(0); + if (num_nics <= 0) + return; + + nic = find_nic_by_name(nic_name, mode); + if (!nic) + return; + + gr = CALLOC_STRUCT(hud_graph); + if (!gr) + return; + + nic->mode = mode; + if (nic->mode == NIC_DIRECTION_RX) { + snprintf(gr->name, sizeof(gr->name), "%s-rx-%lldMbps", nic->name, + nic->speedMbps); + } + else if (nic->mode == NIC_DIRECTION_TX) { + snprintf(gr->name, sizeof(gr->name), "%s-tx-%lldMbps", nic->name, + nic->speedMbps); + } + else if (nic->mode == NIC_RSSI_DBM) + snprintf(gr->name, sizeof(gr->name), "%s-rssi", nic->name); + else + return; + + gr->query_data = nic; + gr->query_new_value = query_nic_load; + + hud_pane_add_graph(pane, gr); + hud_pane_set_max_value(pane, 100); +} + +static int +is_wireless_nic(const char *dirbase) +{ + struct stat stat_buf; + + /* Check if its a wireless card */ + char fn[256]; + snprintf(fn, sizeof(fn), "%s/wireless", dirbase); + if (stat(fn, &stat_buf) == 0) + return 1; + + return 0; +} + +static void +query_nic_bitrate(struct nic_info *nic, const char *dirbase) +{ + struct stat stat_buf; + + /* Check if its a wireless card */ + char fn[256]; + snprintf(fn, sizeof(fn), "%s/wireless", dirbase); + if (stat(fn, &stat_buf) == 0) { + /* we're a wireless nic */ + query_wifi_bitrate(nic, &nic->speedMbps); + nic->speedMbps /= 1000000; + } + else { + /* Must be a wired nic */ + snprintf(fn, sizeof(fn), "%s/speed", dirbase); + get_file_value(fn, &nic->speedMbps); + } +} + +/** + * Initialize internal object arrays and display NIC HUD help. + * \param displayhelp true if the list of detected devices should be + displayed on the console. + * \return number of detected network interface devices. + */ +int +hud_get_num_nics(bool displayhelp) +{ + struct dirent *dp; + struct stat stat_buf; + struct nic_info *nic; + char name[64]; + + /* Return the number if network interfaces. */ + pipe_mutex_lock(gnic_mutex); + if (gnic_count) { + pipe_mutex_unlock(gnic_mutex); + return gnic_count; + } + + /* Scan /sys/block, for every object type we support, create and + * persist an object to represent its different statistics. + */ + list_inithead(&gnic_list); + DIR *dir = opendir("/sys/class/net/"); + if (!dir) { + pipe_mutex_unlock(gnic_mutex); + return 0; + } + + while ((dp = readdir(dir)) != NULL) { + + /* Avoid 'lo' and '..' and '.' */ + if (strlen(dp->d_name) <= 2) + continue; + + char basename[256]; + snprintf(basename, sizeof(basename), "/sys/class/net/%s", dp->d_name); + snprintf(name, sizeof(name), "%s/statistics/rx_bytes", basename); + if (stat(name, &stat_buf) < 0) + continue; + + if (!S_ISREG(stat_buf.st_mode)) + continue; /* Not a regular file */ + + int is_wireless = is_wireless_nic(basename); + + /* Add the RX object */ + nic = CALLOC_STRUCT(nic_info); + strcpy(nic->name, dp->d_name); + snprintf(nic->throughput_filename, sizeof(nic->throughput_filename), + "%s/statistics/rx_bytes", basename); + nic->mode = NIC_DIRECTION_RX; + nic->is_wireless = is_wireless; + query_nic_bitrate(nic, basename); + + list_addtail(&nic->list, &gnic_list); + gnic_count++; + + /* Add the TX object */ + nic = CALLOC_STRUCT(nic_info); + strcpy(nic->name, dp->d_name); + snprintf(nic->throughput_filename, + sizeof(nic->throughput_filename), + "/sys/class/net/%s/statistics/tx_bytes", dp->d_name); + nic->mode = NIC_DIRECTION_TX; + nic->is_wireless = is_wireless; + + query_nic_bitrate(nic, basename); + + list_addtail(&nic->list, &gnic_list); + gnic_count++; + + if (nic->is_wireless) { + /* RSSI Support */ + nic = CALLOC_STRUCT(nic_info); + strcpy(nic->name, dp->d_name); + snprintf(nic->throughput_filename, + sizeof(nic->throughput_filename), + "/sys/class/net/%s/statistics/tx_bytes", dp->d_name); + nic->mode = NIC_RSSI_DBM; + + query_nic_bitrate(nic, basename); + + list_addtail(&nic->list, &gnic_list); + gnic_count++; + } + + } + closedir(dir); + + list_for_each_entry(struct nic_info, nic, &gnic_list, list) { + char line[64]; + snprintf(line, sizeof(line), " nic-%s-%s", + nic->mode == NIC_DIRECTION_RX ? "rx" : + nic->mode == NIC_DIRECTION_TX ? "tx" : + nic->mode == NIC_RSSI_DBM ? "rssi" : "undefined", nic->name); + + puts(line); + + } + + pipe_mutex_unlock(gnic_mutex); + return gnic_count; +} + +#endif /* HAVE_GALLIUM_EXTRA_HUD */ diff -Nru mesa-12.0.6/src/gallium/auxiliary/hud/hud_private.h mesa-17.0.7/src/gallium/auxiliary/hud/hud_private.h --- mesa-12.0.6/src/gallium/auxiliary/hud/hud_private.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/hud/hud_private.h 2017-06-01 10:37:10.000000000 +0000 @@ -41,6 +41,7 @@ /* name and query */ char name[128]; void *query_data; + void (*begin_query)(struct hud_graph *gr); void (*query_new_value)(struct hud_graph *gr); void (*free_query_data)(void *ptr); /**< do not use ordinary free() */ @@ -48,6 +49,7 @@ unsigned num_vertices; unsigned index; /* vertex index being updated */ uint64_t current_value; + FILE *fd; }; struct hud_pane { @@ -61,16 +63,19 @@ unsigned inner_height; float yscale; unsigned max_num_vertices; + unsigned last_line; /* index of the last describing line in the graph */ uint64_t max_value; uint64_t initial_max_value; uint64_t ceiling; unsigned dyn_ceil_last_ran; boolean dyn_ceiling; + boolean sort_items; enum pipe_driver_query_type type; uint64_t period; /* in microseconds */ struct list_head graph_list; unsigned num_graphs; + unsigned next_color; }; @@ -99,7 +104,42 @@ boolean hud_driver_query_install(struct hud_batch_query_context **pbq, struct hud_pane *pane, struct pipe_context *pipe, const char *name); +void hud_batch_query_begin(struct hud_batch_query_context *bq); void hud_batch_query_update(struct hud_batch_query_context *bq); void hud_batch_query_cleanup(struct hud_batch_query_context **pbq); +void hud_graph_set_dump_file(struct hud_graph *gr); + +#if HAVE_GALLIUM_EXTRA_HUD +int hud_get_num_nics(bool displayhelp); +#define NIC_DIRECTION_RX 1 +#define NIC_DIRECTION_TX 2 +#define NIC_RSSI_DBM 3 +void hud_nic_graph_install(struct hud_pane *pane, const char *nic_index, + unsigned int mode); + +int hud_get_num_disks(bool displayhelp); +#define DISKSTAT_RD 1 +#define DISKSTAT_WR 2 +void hud_diskstat_graph_install(struct hud_pane *pane, const char *dev_name, + unsigned int mode); + +int hud_get_num_cpufreq(bool displayhelp); +#define CPUFREQ_MINIMUM 1 +#define CPUFREQ_CURRENT 2 +#define CPUFREQ_MAXIMUM 3 +void hud_cpufreq_graph_install(struct hud_pane *pane, int cpu_index, unsigned int mode); +#endif + +#if HAVE_LIBSENSORS +int hud_get_num_sensors(bool displayhelp); +#define SENSORS_TEMP_CURRENT 1 +#define SENSORS_TEMP_CRITICAL 2 +#define SENSORS_VOLTAGE_CURRENT 3 +#define SENSORS_CURRENT_CURRENT 4 +#define SENSORS_POWER_CURRENT 5 +void hud_sensors_temp_graph_install(struct hud_pane *pane, const char *dev_name, + unsigned int mode); +#endif + #endif diff -Nru mesa-12.0.6/src/gallium/auxiliary/hud/hud_sensors_temp.c mesa-17.0.7/src/gallium/auxiliary/hud/hud_sensors_temp.c --- mesa-12.0.6/src/gallium/auxiliary/hud/hud_sensors_temp.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/hud/hud_sensors_temp.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,375 @@ +/************************************************************************** + * + * Copyright (C) 2016 Steven Toth + * Copyright (C) 2016 Zodiac Inflight Innovations + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#if HAVE_LIBSENSORS +/* Purpose: Extract lm-sensors data, expose temperature, power, voltage. */ + +#include "hud/hud_private.h" +#include "util/list.h" +#include "os/os_time.h" +#include "os/os_thread.h" +#include "util/u_memory.h" +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* TODO: We don't handle dynamic sensor discovery / arrival or removal. + * Static globals specific to this HUD category. + */ +static int gsensors_temp_count = 0; +static struct list_head gsensors_temp_list; +pipe_static_mutex(gsensor_temp_mutex); + +struct sensors_temp_info +{ + struct list_head list; + + /* Combined chip and feature name, human readable. */ + char name[64]; + + /* The type of measurement, critical or current. */ + unsigned int mode; + + uint64_t last_time; + + char chipname[64]; + char featurename[128]; + + sensors_chip_name *chip; + const sensors_feature *feature; + double current, min, max, critical; +}; + +static double +get_value(const sensors_chip_name *name, const sensors_subfeature *sub) +{ + double val; + int err; + + err = sensors_get_value(name, sub->number, &val); + if (err) { + fprintf(stderr, "ERROR: Can't get value of subfeature %s\n", sub->name); + val = 0; + } + return val; +} + +static void +get_sensor_values(struct sensors_temp_info *sti) +{ + const sensors_subfeature *sf; + + switch(sti->mode) { + case SENSORS_VOLTAGE_CURRENT: + sf = sensors_get_subfeature(sti->chip, sti->feature, + SENSORS_SUBFEATURE_IN_INPUT); + if (sf) + sti->current = get_value(sti->chip, sf); + break; + case SENSORS_CURRENT_CURRENT: + sf = sensors_get_subfeature(sti->chip, sti->feature, + SENSORS_SUBFEATURE_CURR_INPUT); + if (sf) { + /* Sensors API returns in AMPs, even though driver is reporting mA, + * convert back to mA */ + sti->current = get_value(sti->chip, sf) * 1000; + } + break; + case SENSORS_TEMP_CURRENT: + sf = sensors_get_subfeature(sti->chip, sti->feature, + SENSORS_SUBFEATURE_TEMP_INPUT); + if (sf) + sti->current = get_value(sti->chip, sf); + break; + case SENSORS_TEMP_CRITICAL: + sf = sensors_get_subfeature(sti->chip, sti->feature, + SENSORS_SUBFEATURE_TEMP_CRIT); + if (sf) + sti->critical = get_value(sti->chip, sf); + break; + case SENSORS_POWER_CURRENT: + sf = sensors_get_subfeature(sti->chip, sti->feature, + SENSORS_SUBFEATURE_POWER_INPUT); + if (sf) { + /* Sensors API returns in WATTs, even though driver is reporting mW, + * convert back to mW */ + sti->current = get_value(sti->chip, sf) * 1000; + } + break; + } + + sf = sensors_get_subfeature(sti->chip, sti->feature, + SENSORS_SUBFEATURE_TEMP_MIN); + if (sf) + sti->min = get_value(sti->chip, sf); + + sf = sensors_get_subfeature(sti->chip, sti->feature, + SENSORS_SUBFEATURE_TEMP_MAX); + if (sf) + sti->max = get_value(sti->chip, sf); +} + +static struct sensors_temp_info * +find_sti_by_name(const char *n, unsigned int mode) +{ + list_for_each_entry(struct sensors_temp_info, sti, &gsensors_temp_list, list) { + if (sti->mode != mode) + continue; + if (strcasecmp(sti->name, n) == 0) + return sti; + } + return 0; +} + +static void +query_sti_load(struct hud_graph *gr) +{ + struct sensors_temp_info *sti = gr->query_data; + uint64_t now = os_time_get(); + + if (sti->last_time) { + if (sti->last_time + gr->pane->period <= now) { + get_sensor_values(sti); + + switch (sti->mode) { + case SENSORS_TEMP_CURRENT: + hud_graph_add_value(gr, (uint64_t) sti->current); + break; + case SENSORS_TEMP_CRITICAL: + hud_graph_add_value(gr, (uint64_t) sti->critical); + break; + case SENSORS_VOLTAGE_CURRENT: + hud_graph_add_value(gr, (uint64_t)(sti->current * 1000)); + break; + case SENSORS_CURRENT_CURRENT: + hud_graph_add_value(gr, (uint64_t) sti->current); + break; + case SENSORS_POWER_CURRENT: + hud_graph_add_value(gr, (uint64_t) sti->current); + break; + } + + sti->last_time = now; + } + } + else { + /* initialize */ + get_sensor_values(sti); + sti->last_time = now; + } +} + +/** + * Create and initialize a new object for a specific sensor interface dev. + * \param pane parent context. + * \param dev_name device name, EG. 'coretemp-isa-0000.Core 1' + * \param mode query type (NIC_DIRECTION_RX/WR/RSSI) statistics. + */ +void +hud_sensors_temp_graph_install(struct hud_pane *pane, const char *dev_name, + unsigned int mode) +{ + struct hud_graph *gr; + struct sensors_temp_info *sti; + + int num_devs = hud_get_num_sensors(0); + if (num_devs <= 0) + return; + + sti = find_sti_by_name(dev_name, mode); + if (!sti) + return; + + gr = CALLOC_STRUCT(hud_graph); + if (!gr) + return; + + snprintf(gr->name, sizeof(gr->name), "%.6s..%s (%s)", + sti->chipname, + sti->featurename, + sti->mode == SENSORS_VOLTAGE_CURRENT ? "Volts" : + sti->mode == SENSORS_CURRENT_CURRENT ? "Amps" : + sti->mode == SENSORS_TEMP_CURRENT ? "Curr" : + sti->mode == SENSORS_POWER_CURRENT ? "Pow" : + sti->mode == SENSORS_TEMP_CRITICAL ? "Crit" : "Unkn"); + + gr->query_data = sti; + gr->query_new_value = query_sti_load; + + hud_pane_add_graph(pane, gr); + switch (sti->mode) { + case SENSORS_TEMP_CURRENT: + case SENSORS_TEMP_CRITICAL: + hud_pane_set_max_value(pane, 120); + break; + case SENSORS_VOLTAGE_CURRENT: + hud_pane_set_max_value(pane, 12); + break; + case SENSORS_CURRENT_CURRENT: + hud_pane_set_max_value(pane, 5000); + break; + case SENSORS_POWER_CURRENT: + hud_pane_set_max_value(pane, 5000 /* mW */); + break; + } +} + +static void +create_object(const char *chipname, const char *featurename, + const sensors_chip_name *chip, const sensors_feature *feature, + int mode) +{ + struct sensors_temp_info *sti = CALLOC_STRUCT(sensors_temp_info); + + sti->mode = mode; + sti->chip = (sensors_chip_name *) chip; + sti->feature = feature; + strcpy(sti->chipname, chipname); + strcpy(sti->featurename, featurename); + snprintf(sti->name, sizeof(sti->name), "%s.%s", sti->chipname, + sti->featurename); + + list_addtail(&sti->list, &gsensors_temp_list); + gsensors_temp_count++; +} + +static void +build_sensor_list(void) +{ + const sensors_chip_name *chip; + const sensors_chip_name *match = 0; + const sensors_feature *feature; + int chip_nr = 0; + + char name[256]; + while ((chip = sensors_get_detected_chips(match, &chip_nr))) { + sensors_snprintf_chip_name(name, sizeof(name), chip); + + /* Get all features and filter accordingly. */ + int fnr = 0; + while ((feature = sensors_get_features(chip, &fnr))) { + char *featurename = sensors_get_label(chip, feature); + if (!featurename) + continue; + + /* Create a 'current' and 'critical' object pair. + * Ignore sensor if its not temperature based. + */ + switch(feature->type) { + case SENSORS_FEATURE_TEMP: + create_object(name, featurename, chip, feature, + SENSORS_TEMP_CURRENT); + create_object(name, featurename, chip, feature, + SENSORS_TEMP_CRITICAL); + break; + case SENSORS_FEATURE_IN: + create_object(name, featurename, chip, feature, + SENSORS_VOLTAGE_CURRENT); + break; + case SENSORS_FEATURE_CURR: + create_object(name, featurename, chip, feature, + SENSORS_CURRENT_CURRENT); + break; + case SENSORS_FEATURE_POWER: + create_object(name, featurename, chip, feature, + SENSORS_POWER_CURRENT); + break; + default: + break; + } + free(featurename); + } + } +} + +/** + * Initialize internal object arrays and display lmsensors HUD help. + * \param displayhelp true if the list of detected devices should be + displayed on the console. + * \return number of detected lmsensor devices. + */ +int +hud_get_num_sensors(bool displayhelp) +{ + /* Return the number of sensors detected. */ + pipe_mutex_lock(gsensor_temp_mutex); + if (gsensors_temp_count) { + pipe_mutex_unlock(gsensor_temp_mutex); + return gsensors_temp_count; + } + + int ret = sensors_init(NULL); + if (ret) { + pipe_mutex_unlock(gsensor_temp_mutex); + return 0; + } + + list_inithead(&gsensors_temp_list); + + /* Scan /sys/block, for every object type we support, create and + * persist an object to represent its different statistics. + */ + build_sensor_list(); + + if (displayhelp) { + list_for_each_entry(struct sensors_temp_info, sti, &gsensors_temp_list, list) { + char line[64]; + switch (sti->mode) { + case SENSORS_TEMP_CURRENT: + snprintf(line, sizeof(line), " sensors_temp_cu-%s", sti->name); + break; + case SENSORS_TEMP_CRITICAL: + snprintf(line, sizeof(line), " sensors_temp_cr-%s", sti->name); + break; + case SENSORS_VOLTAGE_CURRENT: + snprintf(line, sizeof(line), " sensors_volt_cu-%s", sti->name); + break; + case SENSORS_CURRENT_CURRENT: + snprintf(line, sizeof(line), " sensors_curr_cu-%s", sti->name); + break; + case SENSORS_POWER_CURRENT: + snprintf(line, sizeof(line), " sensors_pow_cu-%s", sti->name); + break; + } + + puts(line); + } + } + + pipe_mutex_unlock(gsensor_temp_mutex); + return gsensors_temp_count; +} + +#endif /* HAVE_LIBSENSORS */ diff -Nru mesa-12.0.6/src/gallium/auxiliary/Makefile.am mesa-17.0.7/src/gallium/auxiliary/Makefile.am --- mesa-12.0.6/src/gallium/auxiliary/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -20,7 +20,17 @@ $(NIR_SOURCES) \ $(GENERATED_SOURCES) -if HAVE_MESA_LLVM +if HAVE_LIBDRM + +AM_CFLAGS += \ + $(LIBDRM_CFLAGS) + +libgallium_la_SOURCES += \ + $(RENDERONLY_SOURCES) + +endif + +if HAVE_GALLIUM_LLVM AM_CFLAGS += \ $(LLVM_CFLAGS) diff -Nru mesa-12.0.6/src/gallium/auxiliary/Makefile.in mesa-17.0.7/src/gallium/auxiliary/Makefile.in --- mesa-12.0.6/src/gallium/auxiliary/Makefile.in 2017-01-24 01:41:45.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/Makefile.in 2017-06-01 10:37:20.000000000 +0000 @@ -89,26 +89,35 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) -@HAVE_MESA_LLVM_TRUE@am__append_3 = \ -@HAVE_MESA_LLVM_TRUE@ $(LLVM_CFLAGS) +@HAVE_LIBDRM_TRUE@am__append_4 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_CFLAGS) + +@HAVE_LIBDRM_TRUE@am__append_5 = \ +@HAVE_LIBDRM_TRUE@ $(RENDERONLY_SOURCES) + +@HAVE_GALLIUM_LLVM_TRUE@am__append_6 = \ +@HAVE_GALLIUM_LLVM_TRUE@ $(LLVM_CFLAGS) + +@HAVE_GALLIUM_LLVM_TRUE@am__append_7 = \ +@HAVE_GALLIUM_LLVM_TRUE@ $(GALLIUM_CFLAGS) \ +@HAVE_GALLIUM_LLVM_TRUE@ $(LLVM_CXXFLAGS) -@HAVE_MESA_LLVM_TRUE@am__append_4 = \ -@HAVE_MESA_LLVM_TRUE@ $(GALLIUM_CFLAGS) \ -@HAVE_MESA_LLVM_TRUE@ $(LLVM_CXXFLAGS) - -@HAVE_MESA_LLVM_TRUE@am__append_5 = \ -@HAVE_MESA_LLVM_TRUE@ $(GALLIVM_SOURCES) - -@NEED_GALLIUM_VL_TRUE@am__append_6 = libgalliumvl.la -@NEED_GALLIUM_VL_TRUE@@NEED_GALLIUM_VL_WINSYS_TRUE@am__append_7 = libgalliumvlwinsys.la -@HAVE_DRI3_TRUE@@NEED_GALLIUM_VL_TRUE@@NEED_GALLIUM_VL_WINSYS_TRUE@am__append_8 = \ +@HAVE_GALLIUM_LLVM_TRUE@am__append_8 = \ +@HAVE_GALLIUM_LLVM_TRUE@ $(GALLIVM_SOURCES) + +@NEED_GALLIUM_VL_TRUE@am__append_9 = libgalliumvl.la +@NEED_GALLIUM_VL_TRUE@@NEED_GALLIUM_VL_WINSYS_TRUE@am__append_10 = libgalliumvlwinsys.la +@HAVE_DRI3_TRUE@@NEED_GALLIUM_VL_TRUE@@NEED_GALLIUM_VL_WINSYS_TRUE@am__append_11 = \ @HAVE_DRI3_TRUE@@NEED_GALLIUM_VL_TRUE@@NEED_GALLIUM_VL_WINSYS_TRUE@ $(VL_WINSYS_DRI3_SOURCES) subdir = src/gallium/auxiliary @@ -159,8 +168,9 @@ draw/draw_vertex.h draw/draw_vs.c draw/draw_vs_exec.c \ draw/draw_vs.h draw/draw_vs_variant.c hud/font.c hud/font.h \ hud/hud_context.c hud/hud_context.h hud/hud_cpu.c \ - hud/hud_driver_query.c hud/hud_fps.c hud/hud_private.h \ - indices/u_indices.h indices/u_indices_priv.h \ + hud/hud_nic.c hud/hud_cpufreq.c hud/hud_diskstat.c \ + hud/hud_sensors_temp.c hud/hud_driver_query.c hud/hud_fps.c \ + hud/hud_private.h indices/u_indices.h indices/u_indices_priv.h \ indices/u_primconvert.c indices/u_primconvert.h \ os/os_memory_aligned.h os/os_memory_debug.h \ os/os_memory_stdc.h os/os_memory.h os/os_misc.c os/os_misc.h \ @@ -172,7 +182,8 @@ pipebuffer/pb_bufmgr.h pipebuffer/pb_bufmgr_mm.c \ pipebuffer/pb_bufmgr_ondemand.c pipebuffer/pb_bufmgr_pool.c \ pipebuffer/pb_bufmgr_slab.c pipebuffer/pb_cache.c \ - pipebuffer/pb_cache.h pipebuffer/pb_validate.c \ + pipebuffer/pb_cache.h pipebuffer/pb_slab.c \ + pipebuffer/pb_slab.h pipebuffer/pb_validate.c \ pipebuffer/pb_validate.h postprocess/filters.h \ postprocess/postprocess.h postprocess/pp_celshade.c \ postprocess/pp_celshade.h postprocess/pp_colors.c \ @@ -203,10 +214,10 @@ tgsi/tgsi_util.c tgsi/tgsi_util.h translate/translate.c \ translate/translate.h translate/translate_cache.c \ translate/translate_cache.h translate/translate_generic.c \ - translate/translate_sse.c util/dbghelp.h util/u_bitmask.c \ - util/u_bitmask.h util/u_blend.h util/u_blit.c util/u_blit.h \ - util/u_blitter.c util/u_blitter.h util/u_box.h util/u_cache.c \ - util/u_cache.h util/u_caps.c util/u_caps.h util/u_clear.h \ + translate/translate_sse.c util/dbghelp.h util/u_bitcast.h \ + util/u_bitmask.c util/u_bitmask.h util/u_blend.h util/u_blit.c \ + util/u_blit.h util/u_blitter.c util/u_blitter.h util/u_box.h \ + util/u_cache.c util/u_cache.h util/u_caps.c util/u_caps.h \ util/u_cpu_detect.c util/u_cpu_detect.h util/u_debug.c \ util/u_debug.h util/u_debug_describe.c util/u_debug_describe.h \ util/u_debug_flush.c util/u_debug_flush.h util/u_debug_image.c \ @@ -221,67 +232,67 @@ util/u_fifo.h util/u_format.c util/u_format.h \ util/u_format_etc.c util/u_format_etc.h util/u_format_latc.c \ util/u_format_latc.h util/u_format_other.c \ - util/u_format_other.h util/u_format_r11g11b10f.h \ - util/u_format_rgb9e5.h util/u_format_rgtc.c \ + util/u_format_other.h util/u_format_rgtc.c \ util/u_format_rgtc.h util/u_format_s3tc.c util/u_format_s3tc.h \ util/u_format_tests.c util/u_format_tests.h \ util/u_format_yuv.c util/u_format_yuv.h util/u_format_zs.c \ util/u_format_zs.h util/u_framebuffer.c util/u_framebuffer.h \ util/u_gen_mipmap.c util/u_gen_mipmap.h util/u_half.h \ - util/u_handle_table.c util/u_handle_table.h util/u_hash.c \ - util/u_hash.h util/u_hash_table.c util/u_hash_table.h \ - util/u_helpers.c util/u_helpers.h util/u_index_modify.c \ - util/u_index_modify.h util/u_inlines.h util/u_keymap.c \ - util/u_keymap.h util/u_linear.c util/u_linear.h util/u_math.c \ - util/u_math.h util/u_memory.h util/u_mm.c util/u_mm.h \ - util/u_network.c util/u_network.h util/u_pack_color.h \ - util/u_pointer.h util/u_prim.h util/u_prim_restart.c \ - util/u_prim_restart.h util/u_pstipple.c util/u_pstipple.h \ - util/u_pwr8.h util/u_range.h util/u_rect.h util/u_resource.c \ - util/u_resource.h util/u_ringbuffer.c util/u_ringbuffer.h \ - util/u_sampler.c util/u_sampler.h util/u_simple_shaders.c \ - util/u_simple_shaders.h util/u_slab.c util/u_slab.h \ - util/u_split_prim.h util/u_sse.h util/u_staging.c \ - util/u_staging.h util/u_string.h util/u_suballoc.c \ - util/u_suballoc.h util/u_surface.c util/u_surface.h \ - util/u_surfaces.c util/u_surfaces.h util/u_tests.c \ - util/u_tests.h util/u_texture.c util/u_texture.h util/u_tile.c \ - util/u_tile.h util/u_time.h util/u_transfer.c \ - util/u_transfer.h util/u_upload_mgr.c util/u_upload_mgr.h \ - util/u_vbuf.c util/u_vbuf.h util/u_video.h util/u_viewport.h \ - nir/tgsi_to_nir.c nir/tgsi_to_nir.h indices/u_indices_gen.c \ - indices/u_unfilled_gen.c util/u_format_table.c \ - gallivm/lp_bld_arit.c gallivm/lp_bld_arit.h \ - gallivm/lp_bld_arit_overflow.c gallivm/lp_bld_arit_overflow.h \ - gallivm/lp_bld_assert.c gallivm/lp_bld_assert.h \ - gallivm/lp_bld_bitarit.c gallivm/lp_bld_bitarit.h \ - gallivm/lp_bld_const.c gallivm/lp_bld_const.h \ - gallivm/lp_bld_conv.c gallivm/lp_bld_conv.h \ - gallivm/lp_bld_debug.cpp gallivm/lp_bld_debug.h \ - gallivm/lp_bld_flow.c gallivm/lp_bld_flow.h \ - gallivm/lp_bld_format_aos_array.c gallivm/lp_bld_format_aos.c \ - gallivm/lp_bld_format_cached.c gallivm/lp_bld_format_float.c \ - gallivm/lp_bld_format.c gallivm/lp_bld_format.h \ - gallivm/lp_bld_format_soa.c gallivm/lp_bld_format_srgb.c \ - gallivm/lp_bld_format_yuv.c gallivm/lp_bld_gather.c \ - gallivm/lp_bld_gather.h gallivm/lp_bld.h gallivm/lp_bld_init.c \ - gallivm/lp_bld_init.h gallivm/lp_bld_intr.c \ - gallivm/lp_bld_intr.h gallivm/lp_bld_limits.h \ - gallivm/lp_bld_logic.c gallivm/lp_bld_logic.h \ - gallivm/lp_bld_misc.cpp gallivm/lp_bld_misc.h \ - gallivm/lp_bld_pack.c gallivm/lp_bld_pack.h \ - gallivm/lp_bld_printf.c gallivm/lp_bld_printf.h \ - gallivm/lp_bld_quad.c gallivm/lp_bld_quad.h \ - gallivm/lp_bld_sample_aos.c gallivm/lp_bld_sample_aos.h \ - gallivm/lp_bld_sample.c gallivm/lp_bld_sample.h \ - gallivm/lp_bld_sample_soa.c gallivm/lp_bld_struct.c \ - gallivm/lp_bld_struct.h gallivm/lp_bld_swizzle.c \ - gallivm/lp_bld_swizzle.h gallivm/lp_bld_tgsi_action.c \ - gallivm/lp_bld_tgsi_action.h gallivm/lp_bld_tgsi_aos.c \ - gallivm/lp_bld_tgsi.c gallivm/lp_bld_tgsi.h \ - gallivm/lp_bld_tgsi_info.c gallivm/lp_bld_tgsi_soa.c \ - gallivm/lp_bld_type.c gallivm/lp_bld_type.h draw/draw_llvm.c \ - draw/draw_llvm.h draw/draw_llvm_sample.c \ + util/u_handle_table.c util/u_handle_table.h \ + util/u_hash_table.c util/u_hash_table.h util/u_helpers.c \ + util/u_helpers.h util/u_index_modify.c util/u_index_modify.h \ + util/u_inlines.h util/u_keymap.c util/u_keymap.h \ + util/u_linear.c util/u_linear.h util/u_math.c util/u_math.h \ + util/u_memory.h util/u_mm.c util/u_mm.h util/u_network.c \ + util/u_network.h util/u_pack_color.h util/u_pointer.h \ + util/u_prim.h util/u_prim_restart.c util/u_prim_restart.h \ + util/u_pstipple.c util/u_pstipple.h util/u_pwr8.h \ + util/u_queue.c util/u_queue.h util/u_range.h util/u_rect.h \ + util/u_resource.c util/u_resource.h util/u_ringbuffer.c \ + util/u_ringbuffer.h util/u_sampler.c util/u_sampler.h \ + util/u_simple_shaders.c util/u_simple_shaders.h \ + util/u_split_prim.h util/u_sse.h util/u_string.h \ + util/u_suballoc.c util/u_suballoc.h util/u_surface.c \ + util/u_surface.h util/u_surfaces.c util/u_surfaces.h \ + util/u_tests.c util/u_tests.h util/u_texture.c \ + util/u_texture.h util/u_tile.c util/u_tile.h util/u_time.h \ + util/u_transfer.c util/u_transfer.h util/u_upload_mgr.c \ + util/u_upload_mgr.h util/u_vbuf.c util/u_vbuf.h util/u_video.h \ + util/u_viewport.h nir/tgsi_to_nir.c nir/tgsi_to_nir.h \ + indices/u_indices_gen.c indices/u_unfilled_gen.c \ + util/u_format_table.c renderonly/renderonly.c \ + renderonly/renderonly.h gallivm/lp_bld_arit.c \ + gallivm/lp_bld_arit.h gallivm/lp_bld_arit_overflow.c \ + gallivm/lp_bld_arit_overflow.h gallivm/lp_bld_assert.c \ + gallivm/lp_bld_assert.h gallivm/lp_bld_bitarit.c \ + gallivm/lp_bld_bitarit.h gallivm/lp_bld_const.c \ + gallivm/lp_bld_const.h gallivm/lp_bld_conv.c \ + gallivm/lp_bld_conv.h gallivm/lp_bld_debug.cpp \ + gallivm/lp_bld_debug.h gallivm/lp_bld_flow.c \ + gallivm/lp_bld_flow.h gallivm/lp_bld_format_aos_array.c \ + gallivm/lp_bld_format_aos.c gallivm/lp_bld_format_cached.c \ + gallivm/lp_bld_format_float.c gallivm/lp_bld_format.c \ + gallivm/lp_bld_format.h gallivm/lp_bld_format_soa.c \ + gallivm/lp_bld_format_srgb.c gallivm/lp_bld_format_yuv.c \ + gallivm/lp_bld_gather.c gallivm/lp_bld_gather.h \ + gallivm/lp_bld.h gallivm/lp_bld_init.c gallivm/lp_bld_init.h \ + gallivm/lp_bld_intr.c gallivm/lp_bld_intr.h \ + gallivm/lp_bld_limits.h gallivm/lp_bld_logic.c \ + gallivm/lp_bld_logic.h gallivm/lp_bld_misc.cpp \ + gallivm/lp_bld_misc.h gallivm/lp_bld_pack.c \ + gallivm/lp_bld_pack.h gallivm/lp_bld_printf.c \ + gallivm/lp_bld_printf.h gallivm/lp_bld_quad.c \ + gallivm/lp_bld_quad.h gallivm/lp_bld_sample_aos.c \ + gallivm/lp_bld_sample_aos.h gallivm/lp_bld_sample.c \ + gallivm/lp_bld_sample.h gallivm/lp_bld_sample_soa.c \ + gallivm/lp_bld_struct.c gallivm/lp_bld_struct.h \ + gallivm/lp_bld_swizzle.c gallivm/lp_bld_swizzle.h \ + gallivm/lp_bld_tgsi_action.c gallivm/lp_bld_tgsi_action.h \ + gallivm/lp_bld_tgsi_aos.c gallivm/lp_bld_tgsi.c \ + gallivm/lp_bld_tgsi.h gallivm/lp_bld_tgsi_info.c \ + gallivm/lp_bld_tgsi_soa.c gallivm/lp_bld_type.c \ + gallivm/lp_bld_type.h draw/draw_llvm.c draw/draw_llvm.h \ + draw/draw_llvm_sample.c \ draw/draw_pt_fetch_shade_pipeline_llvm.c draw/draw_vs_llvm.c am__dirstamp = $(am__leading_dot)dirstamp am__objects_1 = cso_cache/cso_cache.lo cso_cache/cso_context.lo \ @@ -301,27 +312,30 @@ draw/draw_pt_so_emit.lo draw/draw_pt_util.lo \ draw/draw_pt_vsplit.lo draw/draw_vertex.lo draw/draw_vs.lo \ draw/draw_vs_exec.lo draw/draw_vs_variant.lo hud/font.lo \ - hud/hud_context.lo hud/hud_cpu.lo hud/hud_driver_query.lo \ - hud/hud_fps.lo indices/u_primconvert.lo os/os_misc.lo \ - os/os_process.lo os/os_time.lo pipebuffer/pb_buffer_fenced.lo \ + hud/hud_context.lo hud/hud_cpu.lo hud/hud_nic.lo \ + hud/hud_cpufreq.lo hud/hud_diskstat.lo hud/hud_sensors_temp.lo \ + hud/hud_driver_query.lo hud/hud_fps.lo \ + indices/u_primconvert.lo os/os_misc.lo os/os_process.lo \ + os/os_time.lo pipebuffer/pb_buffer_fenced.lo \ pipebuffer/pb_buffer_malloc.lo pipebuffer/pb_bufmgr_alt.lo \ pipebuffer/pb_bufmgr_cache.lo pipebuffer/pb_bufmgr_debug.lo \ pipebuffer/pb_bufmgr_mm.lo pipebuffer/pb_bufmgr_ondemand.lo \ pipebuffer/pb_bufmgr_pool.lo pipebuffer/pb_bufmgr_slab.lo \ - pipebuffer/pb_cache.lo pipebuffer/pb_validate.lo \ - postprocess/pp_celshade.lo postprocess/pp_colors.lo \ - postprocess/pp_init.lo postprocess/pp_mlaa.lo \ - postprocess/pp_program.lo postprocess/pp_run.lo \ - rbug/rbug_connection.lo rbug/rbug_context.lo rbug/rbug_core.lo \ - rbug/rbug_demarshal.lo rbug/rbug_shader.lo \ - rbug/rbug_texture.lo rtasm/rtasm_cpu.lo rtasm/rtasm_execmem.lo \ - rtasm/rtasm_x86sse.lo tgsi/tgsi_aa_point.lo tgsi/tgsi_build.lo \ - tgsi/tgsi_dump.lo tgsi/tgsi_exec.lo tgsi/tgsi_emulate.lo \ - tgsi/tgsi_info.lo tgsi/tgsi_iterate.lo tgsi/tgsi_lowering.lo \ - tgsi/tgsi_parse.lo tgsi/tgsi_point_sprite.lo \ - tgsi/tgsi_sanity.lo tgsi/tgsi_scan.lo tgsi/tgsi_strings.lo \ - tgsi/tgsi_text.lo tgsi/tgsi_transform.lo tgsi/tgsi_two_side.lo \ - tgsi/tgsi_ureg.lo tgsi/tgsi_util.lo translate/translate.lo \ + pipebuffer/pb_cache.lo pipebuffer/pb_slab.lo \ + pipebuffer/pb_validate.lo postprocess/pp_celshade.lo \ + postprocess/pp_colors.lo postprocess/pp_init.lo \ + postprocess/pp_mlaa.lo postprocess/pp_program.lo \ + postprocess/pp_run.lo rbug/rbug_connection.lo \ + rbug/rbug_context.lo rbug/rbug_core.lo rbug/rbug_demarshal.lo \ + rbug/rbug_shader.lo rbug/rbug_texture.lo rtasm/rtasm_cpu.lo \ + rtasm/rtasm_execmem.lo rtasm/rtasm_x86sse.lo \ + tgsi/tgsi_aa_point.lo tgsi/tgsi_build.lo tgsi/tgsi_dump.lo \ + tgsi/tgsi_exec.lo tgsi/tgsi_emulate.lo tgsi/tgsi_info.lo \ + tgsi/tgsi_iterate.lo tgsi/tgsi_lowering.lo tgsi/tgsi_parse.lo \ + tgsi/tgsi_point_sprite.lo tgsi/tgsi_sanity.lo \ + tgsi/tgsi_scan.lo tgsi/tgsi_strings.lo tgsi/tgsi_text.lo \ + tgsi/tgsi_transform.lo tgsi/tgsi_two_side.lo tgsi/tgsi_ureg.lo \ + tgsi/tgsi_util.lo translate/translate.lo \ translate/translate_cache.lo translate/translate_generic.lo \ translate/translate_sse.lo util/u_bitmask.lo util/u_blit.lo \ util/u_blitter.lo util/u_cache.lo util/u_caps.lo \ @@ -335,19 +349,21 @@ util/u_format_rgtc.lo util/u_format_s3tc.lo \ util/u_format_tests.lo util/u_format_yuv.lo \ util/u_format_zs.lo util/u_framebuffer.lo util/u_gen_mipmap.lo \ - util/u_handle_table.lo util/u_hash.lo util/u_hash_table.lo \ - util/u_helpers.lo util/u_index_modify.lo util/u_keymap.lo \ - util/u_linear.lo util/u_math.lo util/u_mm.lo util/u_network.lo \ - util/u_prim_restart.lo util/u_pstipple.lo util/u_resource.lo \ - util/u_ringbuffer.lo util/u_sampler.lo \ - util/u_simple_shaders.lo util/u_slab.lo util/u_staging.lo \ - util/u_suballoc.lo util/u_surface.lo util/u_surfaces.lo \ - util/u_tests.lo util/u_texture.lo util/u_tile.lo \ - util/u_transfer.lo util/u_upload_mgr.lo util/u_vbuf.lo + util/u_handle_table.lo util/u_hash_table.lo util/u_helpers.lo \ + util/u_index_modify.lo util/u_keymap.lo util/u_linear.lo \ + util/u_math.lo util/u_mm.lo util/u_network.lo \ + util/u_prim_restart.lo util/u_pstipple.lo util/u_queue.lo \ + util/u_resource.lo util/u_ringbuffer.lo util/u_sampler.lo \ + util/u_simple_shaders.lo util/u_suballoc.lo util/u_surface.lo \ + util/u_surfaces.lo util/u_tests.lo util/u_texture.lo \ + util/u_tile.lo util/u_transfer.lo util/u_upload_mgr.lo \ + util/u_vbuf.lo am__objects_2 = nir/tgsi_to_nir.lo am__objects_3 = indices/u_indices_gen.lo indices/u_unfilled_gen.lo \ util/u_format_table.lo -am__objects_4 = gallivm/lp_bld_arit.lo gallivm/lp_bld_arit_overflow.lo \ +am__objects_4 = renderonly/renderonly.lo +@HAVE_LIBDRM_TRUE@am__objects_5 = $(am__objects_4) +am__objects_6 = gallivm/lp_bld_arit.lo gallivm/lp_bld_arit_overflow.lo \ gallivm/lp_bld_assert.lo gallivm/lp_bld_bitarit.lo \ gallivm/lp_bld_const.lo gallivm/lp_bld_conv.lo \ gallivm/lp_bld_debug.lo gallivm/lp_bld_flow.lo \ @@ -367,27 +383,29 @@ gallivm/lp_bld_tgsi_soa.lo gallivm/lp_bld_type.lo \ draw/draw_llvm.lo draw/draw_llvm_sample.lo \ draw/draw_pt_fetch_shade_pipeline_llvm.lo draw/draw_vs_llvm.lo -@HAVE_MESA_LLVM_TRUE@am__objects_5 = $(am__objects_4) +@HAVE_GALLIUM_LLVM_TRUE@am__objects_7 = $(am__objects_6) am_libgallium_la_OBJECTS = $(am__objects_1) $(am__objects_2) \ - $(am__objects_3) $(am__objects_5) + $(am__objects_3) $(am__objects_5) $(am__objects_7) libgallium_la_OBJECTS = $(am_libgallium_la_OBJECTS) AM_V_lt = $(am__v_lt_@AM_V@) am__v_lt_ = $(am__v_lt_@AM_DEFAULT_V@) am__v_lt_0 = --silent am__v_lt_1 = libgalliumvl_la_LIBADD = -am__libgalliumvl_la_SOURCES_DIST = vl/vl_compositor.c \ - vl/vl_compositor.h vl/vl_csc.c vl/vl_csc.h vl/vl_decoder.c \ - vl/vl_decoder.h vl/vl_defines.h vl/vl_deint_filter.c \ - vl/vl_deint_filter.h vl/vl_idct.c vl/vl_idct.h \ - vl/vl_matrix_filter.c vl/vl_matrix_filter.h vl/vl_mc.c \ - vl/vl_mc.h vl/vl_median_filter.c vl/vl_median_filter.h \ +am__libgalliumvl_la_SOURCES_DIST = vl/vl_bicubic_filter.c \ + vl/vl_bicubic_filter.h vl/vl_compositor.c vl/vl_compositor.h \ + vl/vl_csc.c vl/vl_csc.h vl/vl_decoder.c vl/vl_decoder.h \ + vl/vl_defines.h vl/vl_deint_filter.c vl/vl_deint_filter.h \ + vl/vl_idct.c vl/vl_idct.h vl/vl_matrix_filter.c \ + vl/vl_matrix_filter.h vl/vl_mc.c vl/vl_mc.h \ + vl/vl_median_filter.c vl/vl_median_filter.h \ vl/vl_mpeg12_bitstream.c vl/vl_mpeg12_bitstream.h \ vl/vl_mpeg12_decoder.c vl/vl_mpeg12_decoder.h vl/vl_rbsp.h \ vl/vl_types.h vl/vl_vertex_buffers.c vl/vl_vertex_buffers.h \ vl/vl_video_buffer.c vl/vl_video_buffer.h vl/vl_vlc.h \ vl/vl_winsys.h vl/vl_zscan.c vl/vl_zscan.h -am__objects_6 = vl/libgalliumvl_la-vl_compositor.lo \ +am__objects_8 = vl/libgalliumvl_la-vl_bicubic_filter.lo \ + vl/libgalliumvl_la-vl_compositor.lo \ vl/libgalliumvl_la-vl_csc.lo vl/libgalliumvl_la-vl_decoder.lo \ vl/libgalliumvl_la-vl_deint_filter.lo \ vl/libgalliumvl_la-vl_idct.lo \ @@ -399,7 +417,7 @@ vl/libgalliumvl_la-vl_vertex_buffers.lo \ vl/libgalliumvl_la-vl_video_buffer.lo \ vl/libgalliumvl_la-vl_zscan.lo -@NEED_GALLIUM_VL_TRUE@am_libgalliumvl_la_OBJECTS = $(am__objects_6) +@NEED_GALLIUM_VL_TRUE@am_libgalliumvl_la_OBJECTS = $(am__objects_8) libgalliumvl_la_OBJECTS = $(am_libgalliumvl_la_OBJECTS) libgalliumvl_la_LINK = $(LIBTOOL) $(AM_V_lt) --tag=CC \ $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=link $(CCLD) \ @@ -407,18 +425,18 @@ -o $@ @NEED_GALLIUM_VL_TRUE@am_libgalliumvl_la_rpath = libgalliumvl_stub_la_LIBADD = -am__objects_7 = vl/vl_stubs.lo -am_libgalliumvl_stub_la_OBJECTS = $(am__objects_7) +am__objects_9 = vl/vl_stubs.lo +am_libgalliumvl_stub_la_OBJECTS = $(am__objects_9) libgalliumvl_stub_la_OBJECTS = $(am_libgalliumvl_stub_la_OBJECTS) libgalliumvlwinsys_la_LIBADD = am__libgalliumvlwinsys_la_SOURCES_DIST = vl/vl_winsys_dri.c \ vl/vl_winsys_drm.c vl/vl_winsys_dri3.c -am__objects_8 = vl/libgalliumvlwinsys_la-vl_winsys_dri.lo \ +am__objects_10 = vl/libgalliumvlwinsys_la-vl_winsys_dri.lo \ vl/libgalliumvlwinsys_la-vl_winsys_drm.lo -am__objects_9 = vl/libgalliumvlwinsys_la-vl_winsys_dri3.lo -@HAVE_DRI3_TRUE@@NEED_GALLIUM_VL_TRUE@@NEED_GALLIUM_VL_WINSYS_TRUE@am__objects_10 = $(am__objects_9) -@NEED_GALLIUM_VL_TRUE@@NEED_GALLIUM_VL_WINSYS_TRUE@am_libgalliumvlwinsys_la_OBJECTS = $(am__objects_8) \ -@NEED_GALLIUM_VL_TRUE@@NEED_GALLIUM_VL_WINSYS_TRUE@ $(am__objects_10) +am__objects_11 = vl/libgalliumvlwinsys_la-vl_winsys_dri3.lo +@HAVE_DRI3_TRUE@@NEED_GALLIUM_VL_TRUE@@NEED_GALLIUM_VL_WINSYS_TRUE@am__objects_12 = $(am__objects_11) +@NEED_GALLIUM_VL_TRUE@@NEED_GALLIUM_VL_WINSYS_TRUE@am_libgalliumvlwinsys_la_OBJECTS = $(am__objects_10) \ +@NEED_GALLIUM_VL_TRUE@@NEED_GALLIUM_VL_WINSYS_TRUE@ $(am__objects_12) libgalliumvlwinsys_la_OBJECTS = $(am_libgalliumvlwinsys_la_OBJECTS) libgalliumvlwinsys_la_LINK = $(LIBTOOL) $(AM_V_lt) --tag=CC \ $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=link $(CCLD) \ @@ -517,6 +535,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -531,6 +551,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -560,10 +581,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -613,11 +635,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -657,8 +676,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -695,8 +712,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -705,7 +720,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -713,13 +727,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -748,6 +763,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -874,6 +890,10 @@ hud/hud_context.c \ hud/hud_context.h \ hud/hud_cpu.c \ + hud/hud_nic.c \ + hud/hud_cpufreq.c \ + hud/hud_diskstat.c \ + hud/hud_sensors_temp.c \ hud/hud_driver_query.c \ hud/hud_fps.c \ hud/hud_private.h \ @@ -907,6 +927,8 @@ pipebuffer/pb_bufmgr_slab.c \ pipebuffer/pb_cache.c \ pipebuffer/pb_cache.h \ + pipebuffer/pb_slab.c \ + pipebuffer/pb_slab.h \ pipebuffer/pb_validate.c \ pipebuffer/pb_validate.h \ postprocess/filters.h \ @@ -987,6 +1009,7 @@ translate/translate_generic.c \ translate/translate_sse.c \ util/dbghelp.h \ + util/u_bitcast.h \ util/u_bitmask.c \ util/u_bitmask.h \ util/u_blend.h \ @@ -999,7 +1022,6 @@ util/u_cache.h \ util/u_caps.c \ util/u_caps.h \ - util/u_clear.h \ util/u_cpu_detect.c \ util/u_cpu_detect.h \ util/u_debug.c \ @@ -1039,8 +1061,6 @@ util/u_format_latc.h \ util/u_format_other.c \ util/u_format_other.h \ - util/u_format_r11g11b10f.h \ - util/u_format_rgb9e5.h \ util/u_format_rgtc.c \ util/u_format_rgtc.h \ util/u_format_s3tc.c \ @@ -1058,8 +1078,6 @@ util/u_half.h \ util/u_handle_table.c \ util/u_handle_table.h \ - util/u_hash.c \ - util/u_hash.h \ util/u_hash_table.c \ util/u_hash_table.h \ util/u_helpers.c \ @@ -1086,6 +1104,8 @@ util/u_pstipple.c \ util/u_pstipple.h \ util/u_pwr8.h \ + util/u_queue.c \ + util/u_queue.h \ util/u_range.h \ util/u_rect.h \ util/u_resource.c \ @@ -1096,12 +1116,8 @@ util/u_sampler.h \ util/u_simple_shaders.c \ util/u_simple_shaders.h \ - util/u_slab.c \ - util/u_slab.h \ util/u_split_prim.h \ util/u_sse.h \ - util/u_staging.c \ - util/u_staging.h \ util/u_string.h \ util/u_suballoc.c \ util/u_suballoc.h \ @@ -1130,6 +1146,8 @@ nir/tgsi_to_nir.h VL_SOURCES := \ + vl/vl_bicubic_filter.c \ + vl/vl_bicubic_filter.h \ vl/vl_compositor.c \ vl/vl_compositor.h \ vl/vl_csc.c \ @@ -1247,6 +1265,10 @@ draw/draw_pt_fetch_shade_pipeline_llvm.c \ draw/draw_vs_llvm.c +RENDERONLY_SOURCES := \ + renderonly/renderonly.c \ + renderonly/renderonly.h + GALLIUM_CFLAGS = \ -I$(top_srcdir)/include \ -I$(top_srcdir)/src \ @@ -1294,12 +1316,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -1311,17 +1329,18 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) noinst_LTLIBRARIES = libgallium.la libgalliumvl_stub.la \ - $(am__append_6) $(am__append_7) + $(am__append_9) $(am__append_10) AM_CFLAGS = -I$(top_srcdir)/src/loader \ -I$(top_builddir)/src/compiler/nir \ -I$(top_srcdir)/src/gallium/auxiliary/util $(GALLIUM_CFLAGS) \ - $(VISIBILITY_CFLAGS) $(MSVC2013_COMPAT_CFLAGS) $(am__append_3) + $(VISIBILITY_CFLAGS) $(MSVC2013_COMPAT_CFLAGS) $(am__append_4) \ + $(am__append_6) AM_CXXFLAGS = $(VISIBILITY_CXXFLAGS) $(MSVC2013_COMPAT_CXXFLAGS) \ - $(am__append_4) + $(am__append_7) libgallium_la_SOURCES = $(C_SOURCES) $(NIR_SOURCES) \ - $(GENERATED_SOURCES) $(am__append_5) + $(GENERATED_SOURCES) $(am__append_5) $(am__append_8) MKDIR_GEN = $(AM_V_at)$(MKDIR_P) $(@D) PYTHON_GEN = $(AM_V_GEN)$(PYTHON2) $(PYTHON_FLAGS) libgalliumvl_stub_la_SOURCES = \ @@ -1343,7 +1362,7 @@ @NEED_GALLIUM_VL_TRUE@@NEED_GALLIUM_VL_WINSYS_TRUE@ $(COMMON_VL_CFLAGS) @NEED_GALLIUM_VL_TRUE@@NEED_GALLIUM_VL_WINSYS_TRUE@libgalliumvlwinsys_la_SOURCES = $(VL_WINSYS_SOURCES) \ -@NEED_GALLIUM_VL_TRUE@@NEED_GALLIUM_VL_WINSYS_TRUE@ $(am__append_8) +@NEED_GALLIUM_VL_TRUE@@NEED_GALLIUM_VL_WINSYS_TRUE@ $(am__append_11) EXTRA_DIST = \ SConscript \ indices/u_indices.c \ @@ -1493,6 +1512,11 @@ hud/font.lo: hud/$(am__dirstamp) hud/$(DEPDIR)/$(am__dirstamp) hud/hud_context.lo: hud/$(am__dirstamp) hud/$(DEPDIR)/$(am__dirstamp) hud/hud_cpu.lo: hud/$(am__dirstamp) hud/$(DEPDIR)/$(am__dirstamp) +hud/hud_nic.lo: hud/$(am__dirstamp) hud/$(DEPDIR)/$(am__dirstamp) +hud/hud_cpufreq.lo: hud/$(am__dirstamp) hud/$(DEPDIR)/$(am__dirstamp) +hud/hud_diskstat.lo: hud/$(am__dirstamp) hud/$(DEPDIR)/$(am__dirstamp) +hud/hud_sensors_temp.lo: hud/$(am__dirstamp) \ + hud/$(DEPDIR)/$(am__dirstamp) hud/hud_driver_query.lo: hud/$(am__dirstamp) \ hud/$(DEPDIR)/$(am__dirstamp) hud/hud_fps.lo: hud/$(am__dirstamp) hud/$(DEPDIR)/$(am__dirstamp) @@ -1539,6 +1563,8 @@ pipebuffer/$(DEPDIR)/$(am__dirstamp) pipebuffer/pb_cache.lo: pipebuffer/$(am__dirstamp) \ pipebuffer/$(DEPDIR)/$(am__dirstamp) +pipebuffer/pb_slab.lo: pipebuffer/$(am__dirstamp) \ + pipebuffer/$(DEPDIR)/$(am__dirstamp) pipebuffer/pb_validate.lo: pipebuffer/$(am__dirstamp) \ pipebuffer/$(DEPDIR)/$(am__dirstamp) postprocess/$(am__dirstamp): @@ -1696,7 +1722,6 @@ util/$(DEPDIR)/$(am__dirstamp) util/u_handle_table.lo: util/$(am__dirstamp) \ util/$(DEPDIR)/$(am__dirstamp) -util/u_hash.lo: util/$(am__dirstamp) util/$(DEPDIR)/$(am__dirstamp) util/u_hash_table.lo: util/$(am__dirstamp) \ util/$(DEPDIR)/$(am__dirstamp) util/u_helpers.lo: util/$(am__dirstamp) util/$(DEPDIR)/$(am__dirstamp) @@ -1711,6 +1736,7 @@ util/$(DEPDIR)/$(am__dirstamp) util/u_pstipple.lo: util/$(am__dirstamp) \ util/$(DEPDIR)/$(am__dirstamp) +util/u_queue.lo: util/$(am__dirstamp) util/$(DEPDIR)/$(am__dirstamp) util/u_resource.lo: util/$(am__dirstamp) \ util/$(DEPDIR)/$(am__dirstamp) util/u_ringbuffer.lo: util/$(am__dirstamp) \ @@ -1718,8 +1744,6 @@ util/u_sampler.lo: util/$(am__dirstamp) util/$(DEPDIR)/$(am__dirstamp) util/u_simple_shaders.lo: util/$(am__dirstamp) \ util/$(DEPDIR)/$(am__dirstamp) -util/u_slab.lo: util/$(am__dirstamp) util/$(DEPDIR)/$(am__dirstamp) -util/u_staging.lo: util/$(am__dirstamp) util/$(DEPDIR)/$(am__dirstamp) util/u_suballoc.lo: util/$(am__dirstamp) \ util/$(DEPDIR)/$(am__dirstamp) util/u_surface.lo: util/$(am__dirstamp) util/$(DEPDIR)/$(am__dirstamp) @@ -1746,6 +1770,14 @@ indices/$(DEPDIR)/$(am__dirstamp) util/u_format_table.lo: util/$(am__dirstamp) \ util/$(DEPDIR)/$(am__dirstamp) +renderonly/$(am__dirstamp): + @$(MKDIR_P) renderonly + @: > renderonly/$(am__dirstamp) +renderonly/$(DEPDIR)/$(am__dirstamp): + @$(MKDIR_P) renderonly/$(DEPDIR) + @: > renderonly/$(DEPDIR)/$(am__dirstamp) +renderonly/renderonly.lo: renderonly/$(am__dirstamp) \ + renderonly/$(DEPDIR)/$(am__dirstamp) gallivm/$(am__dirstamp): @$(MKDIR_P) gallivm @: > gallivm/$(am__dirstamp) @@ -1838,6 +1870,8 @@ vl/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) vl/$(DEPDIR) @: > vl/$(DEPDIR)/$(am__dirstamp) +vl/libgalliumvl_la-vl_bicubic_filter.lo: vl/$(am__dirstamp) \ + vl/$(DEPDIR)/$(am__dirstamp) vl/libgalliumvl_la-vl_compositor.lo: vl/$(am__dirstamp) \ vl/$(DEPDIR)/$(am__dirstamp) vl/libgalliumvl_la-vl_csc.lo: vl/$(am__dirstamp) \ @@ -1903,6 +1937,8 @@ -rm -f postprocess/*.lo -rm -f rbug/*.$(OBJEXT) -rm -f rbug/*.lo + -rm -f renderonly/*.$(OBJEXT) + -rm -f renderonly/*.lo -rm -f rtasm/*.$(OBJEXT) -rm -f rtasm/*.lo -rm -f tgsi/*.$(OBJEXT) @@ -1996,8 +2032,12 @@ @AMDEP_TRUE@@am__include@ @am__quote@hud/$(DEPDIR)/font.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@hud/$(DEPDIR)/hud_context.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@hud/$(DEPDIR)/hud_cpu.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@hud/$(DEPDIR)/hud_cpufreq.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@hud/$(DEPDIR)/hud_diskstat.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@hud/$(DEPDIR)/hud_driver_query.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@hud/$(DEPDIR)/hud_fps.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@hud/$(DEPDIR)/hud_nic.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@hud/$(DEPDIR)/hud_sensors_temp.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@indices/$(DEPDIR)/u_indices_gen.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@indices/$(DEPDIR)/u_primconvert.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@indices/$(DEPDIR)/u_unfilled_gen.Plo@am__quote@ @@ -2015,6 +2055,7 @@ @AMDEP_TRUE@@am__include@ @am__quote@pipebuffer/$(DEPDIR)/pb_bufmgr_pool.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@pipebuffer/$(DEPDIR)/pb_bufmgr_slab.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@pipebuffer/$(DEPDIR)/pb_cache.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@pipebuffer/$(DEPDIR)/pb_slab.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@pipebuffer/$(DEPDIR)/pb_validate.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@postprocess/$(DEPDIR)/pp_celshade.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@postprocess/$(DEPDIR)/pp_colors.Plo@am__quote@ @@ -2028,6 +2069,7 @@ @AMDEP_TRUE@@am__include@ @am__quote@rbug/$(DEPDIR)/rbug_demarshal.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rbug/$(DEPDIR)/rbug_shader.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rbug/$(DEPDIR)/rbug_texture.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@renderonly/$(DEPDIR)/renderonly.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rtasm/$(DEPDIR)/rtasm_cpu.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rtasm/$(DEPDIR)/rtasm_execmem.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rtasm/$(DEPDIR)/rtasm_x86sse.Plo@am__quote@ @@ -2085,7 +2127,6 @@ @AMDEP_TRUE@@am__include@ @am__quote@util/$(DEPDIR)/u_framebuffer.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@util/$(DEPDIR)/u_gen_mipmap.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@util/$(DEPDIR)/u_handle_table.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@util/$(DEPDIR)/u_hash.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@util/$(DEPDIR)/u_hash_table.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@util/$(DEPDIR)/u_helpers.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@util/$(DEPDIR)/u_index_modify.Plo@am__quote@ @@ -2096,12 +2137,11 @@ @AMDEP_TRUE@@am__include@ @am__quote@util/$(DEPDIR)/u_network.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@util/$(DEPDIR)/u_prim_restart.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@util/$(DEPDIR)/u_pstipple.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@util/$(DEPDIR)/u_queue.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@util/$(DEPDIR)/u_resource.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@util/$(DEPDIR)/u_ringbuffer.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@util/$(DEPDIR)/u_sampler.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@util/$(DEPDIR)/u_simple_shaders.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@util/$(DEPDIR)/u_slab.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@util/$(DEPDIR)/u_staging.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@util/$(DEPDIR)/u_suballoc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@util/$(DEPDIR)/u_surface.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@util/$(DEPDIR)/u_surfaces.Plo@am__quote@ @@ -2111,6 +2151,7 @@ @AMDEP_TRUE@@am__include@ @am__quote@util/$(DEPDIR)/u_transfer.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@util/$(DEPDIR)/u_upload_mgr.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@util/$(DEPDIR)/u_vbuf.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@vl/$(DEPDIR)/libgalliumvl_la-vl_bicubic_filter.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@vl/$(DEPDIR)/libgalliumvl_la-vl_compositor.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@vl/$(DEPDIR)/libgalliumvl_la-vl_csc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@vl/$(DEPDIR)/libgalliumvl_la-vl_decoder.Plo@am__quote@ @@ -2153,6 +2194,13 @@ @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(LTCOMPILE) -c -o $@ $< +vl/libgalliumvl_la-vl_bicubic_filter.lo: vl/vl_bicubic_filter.c +@am__fastdepCC_TRUE@ $(AM_V_CC)$(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libgalliumvl_la_CFLAGS) $(CFLAGS) -MT vl/libgalliumvl_la-vl_bicubic_filter.lo -MD -MP -MF vl/$(DEPDIR)/libgalliumvl_la-vl_bicubic_filter.Tpo -c -o vl/libgalliumvl_la-vl_bicubic_filter.lo `test -f 'vl/vl_bicubic_filter.c' || echo '$(srcdir)/'`vl/vl_bicubic_filter.c +@am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) vl/$(DEPDIR)/libgalliumvl_la-vl_bicubic_filter.Tpo vl/$(DEPDIR)/libgalliumvl_la-vl_bicubic_filter.Plo +@AMDEP_TRUE@@am__fastdepCC_FALSE@ $(AM_V_CC)source='vl/vl_bicubic_filter.c' object='vl/libgalliumvl_la-vl_bicubic_filter.lo' libtool=yes @AMDEPBACKSLASH@ +@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libgalliumvl_la_CFLAGS) $(CFLAGS) -c -o vl/libgalliumvl_la-vl_bicubic_filter.lo `test -f 'vl/vl_bicubic_filter.c' || echo '$(srcdir)/'`vl/vl_bicubic_filter.c + vl/libgalliumvl_la-vl_compositor.lo: vl/vl_compositor.c @am__fastdepCC_TRUE@ $(AM_V_CC)$(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libgalliumvl_la_CFLAGS) $(CFLAGS) -MT vl/libgalliumvl_la-vl_compositor.lo -MD -MP -MF vl/$(DEPDIR)/libgalliumvl_la-vl_compositor.Tpo -c -o vl/libgalliumvl_la-vl_compositor.lo `test -f 'vl/vl_compositor.c' || echo '$(srcdir)/'`vl/vl_compositor.c @am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) vl/$(DEPDIR)/libgalliumvl_la-vl_compositor.Tpo vl/$(DEPDIR)/libgalliumvl_la-vl_compositor.Plo @@ -2304,6 +2352,7 @@ -rm -rf pipebuffer/.libs pipebuffer/_libs -rm -rf postprocess/.libs postprocess/_libs -rm -rf rbug/.libs rbug/_libs + -rm -rf renderonly/.libs renderonly/_libs -rm -rf rtasm/.libs rtasm/_libs -rm -rf tgsi/.libs tgsi/_libs -rm -rf translate/.libs translate/_libs @@ -2442,6 +2491,8 @@ -rm -f postprocess/$(am__dirstamp) -rm -f rbug/$(DEPDIR)/$(am__dirstamp) -rm -f rbug/$(am__dirstamp) + -rm -f renderonly/$(DEPDIR)/$(am__dirstamp) + -rm -f renderonly/$(am__dirstamp) -rm -f rtasm/$(DEPDIR)/$(am__dirstamp) -rm -f rtasm/$(am__dirstamp) -rm -f tgsi/$(DEPDIR)/$(am__dirstamp) @@ -2462,7 +2513,7 @@ mostlyclean-am distclean: distclean-am - -rm -rf cso_cache/$(DEPDIR) draw/$(DEPDIR) gallivm/$(DEPDIR) hud/$(DEPDIR) indices/$(DEPDIR) nir/$(DEPDIR) os/$(DEPDIR) pipebuffer/$(DEPDIR) postprocess/$(DEPDIR) rbug/$(DEPDIR) rtasm/$(DEPDIR) tgsi/$(DEPDIR) translate/$(DEPDIR) util/$(DEPDIR) vl/$(DEPDIR) + -rm -rf cso_cache/$(DEPDIR) draw/$(DEPDIR) gallivm/$(DEPDIR) hud/$(DEPDIR) indices/$(DEPDIR) nir/$(DEPDIR) os/$(DEPDIR) pipebuffer/$(DEPDIR) postprocess/$(DEPDIR) rbug/$(DEPDIR) renderonly/$(DEPDIR) rtasm/$(DEPDIR) tgsi/$(DEPDIR) translate/$(DEPDIR) util/$(DEPDIR) vl/$(DEPDIR) -rm -f Makefile distclean-am: clean-am distclean-compile distclean-generic \ distclean-tags @@ -2508,7 +2559,7 @@ installcheck-am: maintainer-clean: maintainer-clean-am - -rm -rf cso_cache/$(DEPDIR) draw/$(DEPDIR) gallivm/$(DEPDIR) hud/$(DEPDIR) indices/$(DEPDIR) nir/$(DEPDIR) os/$(DEPDIR) pipebuffer/$(DEPDIR) postprocess/$(DEPDIR) rbug/$(DEPDIR) rtasm/$(DEPDIR) tgsi/$(DEPDIR) translate/$(DEPDIR) util/$(DEPDIR) vl/$(DEPDIR) + -rm -rf cso_cache/$(DEPDIR) draw/$(DEPDIR) gallivm/$(DEPDIR) hud/$(DEPDIR) indices/$(DEPDIR) nir/$(DEPDIR) os/$(DEPDIR) pipebuffer/$(DEPDIR) postprocess/$(DEPDIR) rbug/$(DEPDIR) renderonly/$(DEPDIR) rtasm/$(DEPDIR) tgsi/$(DEPDIR) translate/$(DEPDIR) util/$(DEPDIR) vl/$(DEPDIR) -rm -f Makefile maintainer-clean-am: distclean-am maintainer-clean-generic diff -Nru mesa-12.0.6/src/gallium/auxiliary/Makefile.sources mesa-17.0.7/src/gallium/auxiliary/Makefile.sources --- mesa-12.0.6/src/gallium/auxiliary/Makefile.sources 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/Makefile.sources 2017-06-01 10:37:10.000000000 +0000 @@ -62,6 +62,10 @@ hud/hud_context.c \ hud/hud_context.h \ hud/hud_cpu.c \ + hud/hud_nic.c \ + hud/hud_cpufreq.c \ + hud/hud_diskstat.c \ + hud/hud_sensors_temp.c \ hud/hud_driver_query.c \ hud/hud_fps.c \ hud/hud_private.h \ @@ -95,6 +99,8 @@ pipebuffer/pb_bufmgr_slab.c \ pipebuffer/pb_cache.c \ pipebuffer/pb_cache.h \ + pipebuffer/pb_slab.c \ + pipebuffer/pb_slab.h \ pipebuffer/pb_validate.c \ pipebuffer/pb_validate.h \ postprocess/filters.h \ @@ -175,6 +181,7 @@ translate/translate_generic.c \ translate/translate_sse.c \ util/dbghelp.h \ + util/u_bitcast.h \ util/u_bitmask.c \ util/u_bitmask.h \ util/u_blend.h \ @@ -187,7 +194,6 @@ util/u_cache.h \ util/u_caps.c \ util/u_caps.h \ - util/u_clear.h \ util/u_cpu_detect.c \ util/u_cpu_detect.h \ util/u_debug.c \ @@ -227,8 +233,6 @@ util/u_format_latc.h \ util/u_format_other.c \ util/u_format_other.h \ - util/u_format_r11g11b10f.h \ - util/u_format_rgb9e5.h \ util/u_format_rgtc.c \ util/u_format_rgtc.h \ util/u_format_s3tc.c \ @@ -246,8 +250,6 @@ util/u_half.h \ util/u_handle_table.c \ util/u_handle_table.h \ - util/u_hash.c \ - util/u_hash.h \ util/u_hash_table.c \ util/u_hash_table.h \ util/u_helpers.c \ @@ -274,6 +276,8 @@ util/u_pstipple.c \ util/u_pstipple.h \ util/u_pwr8.h \ + util/u_queue.c \ + util/u_queue.h \ util/u_range.h \ util/u_rect.h \ util/u_resource.c \ @@ -284,12 +288,8 @@ util/u_sampler.h \ util/u_simple_shaders.c \ util/u_simple_shaders.h \ - util/u_slab.c \ - util/u_slab.h \ util/u_split_prim.h \ util/u_sse.h \ - util/u_staging.c \ - util/u_staging.h \ util/u_string.h \ util/u_suballoc.c \ util/u_suballoc.h \ @@ -318,6 +318,8 @@ nir/tgsi_to_nir.h VL_SOURCES := \ + vl/vl_bicubic_filter.c \ + vl/vl_bicubic_filter.h \ vl/vl_compositor.c \ vl/vl_compositor.h \ vl/vl_csc.c \ @@ -433,3 +435,7 @@ draw/draw_llvm_sample.c \ draw/draw_pt_fetch_shade_pipeline_llvm.c \ draw/draw_vs_llvm.c + +RENDERONLY_SOURCES := \ + renderonly/renderonly.c \ + renderonly/renderonly.h diff -Nru mesa-12.0.6/src/gallium/auxiliary/nir/tgsi_to_nir.c mesa-17.0.7/src/gallium/auxiliary/nir/tgsi_to_nir.c --- mesa-12.0.6/src/gallium/auxiliary/nir/tgsi_to_nir.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/nir/tgsi_to_nir.c 2017-06-01 10:37:10.000000000 +0000 @@ -314,8 +314,11 @@ file == TGSI_FILE_CONSTANT); /* nothing to do for UBOs: */ - if ((file == TGSI_FILE_CONSTANT) && decl->Declaration.Dimension) + if ((file == TGSI_FILE_CONSTANT) && decl->Declaration.Dimension) { + b->shader->info->num_ubos = + MAX2(b->shader->info->num_ubos, decl->Dim.Index2D); return; + } if ((file == TGSI_FILE_INPUT) || (file == TGSI_FILE_OUTPUT)) { is_array = (is_array && decl->Declaration.Array && @@ -339,9 +342,14 @@ var->name = ralloc_asprintf(var, "in_%d", idx); if (c->scan->processor == PIPE_SHADER_FRAGMENT) { - var->data.location = - tgsi_varying_semantic_to_slot(decl->Semantic.Name, - decl->Semantic.Index); + if (decl->Semantic.Name == TGSI_SEMANTIC_FACE) { + var->data.location = SYSTEM_VALUE_FRONT_FACE; + var->data.mode = nir_var_system_value; + } else { + var->data.location = + tgsi_varying_semantic_to_slot(decl->Semantic.Name, + decl->Semantic.Index); + } } else { assert(!decl->Declaration.Semantic); var->data.location = VERT_ATTRIB_GENERIC0 + idx; @@ -353,17 +361,21 @@ */ switch (decl->Interp.Interpolate) { case TGSI_INTERPOLATE_CONSTANT: - var->data.interpolation = INTERP_QUALIFIER_FLAT; + var->data.interpolation = INTERP_MODE_FLAT; break; case TGSI_INTERPOLATE_LINEAR: - var->data.interpolation = INTERP_QUALIFIER_NOPERSPECTIVE; + var->data.interpolation = INTERP_MODE_NOPERSPECTIVE; break; case TGSI_INTERPOLATE_PERSPECTIVE: - var->data.interpolation = INTERP_QUALIFIER_SMOOTH; + var->data.interpolation = INTERP_MODE_SMOOTH; break; } exec_list_push_tail(&b->shader->inputs, &var->node); + + for (int i = 0; i < array_size; i++) + b->shader->info->inputs_read |= 1 << (var->data.location + i); + break; case TGSI_FILE_OUTPUT: { int semantic_name = decl->Semantic.Name; @@ -426,6 +438,9 @@ } exec_list_push_tail(&b->shader->outputs, &var->node); + + for (int i = 0; i < array_size; i++) + b->shader->info->outputs_written |= 1 << (var->data.location + i); } break; case TGSI_FILE_CONSTANT: @@ -571,6 +586,10 @@ nir_builder_instr_insert(b, &load->instr); src = nir_src_for_ssa(&load->dest.ssa); + + b->shader->info->system_values_read |= + (1 << nir_system_value_from_intrinsic(op)); + break; } @@ -582,6 +601,25 @@ switch (file) { case TGSI_FILE_INPUT: + /* Special case: Turn the frontface varying into a load of the + * frontface intrinsic plus math, and appending the silly floats. + */ + if (c->scan->processor == PIPE_SHADER_FRAGMENT && + c->scan->input_semantic_name[index] == TGSI_SEMANTIC_FACE) { + nir_ssa_def *tgsi_frontface[4] = { + nir_bcsel(&c->build, + nir_load_system_value(&c->build, + nir_intrinsic_load_front_face, 0), + nir_imm_float(&c->build, 1.0), + nir_imm_float(&c->build, -1.0)), + nir_imm_float(&c->build, 0.0), + nir_imm_float(&c->build, 0.0), + nir_imm_float(&c->build, 1.0), + }; + + return nir_src_for_ssa(nir_vec(&c->build, tgsi_frontface, 4)); + } + op = nir_intrinsic_load_input; assert(!dim); break; @@ -1036,6 +1074,7 @@ nir_intrinsic_instr *discard = nir_intrinsic_instr_create(b->shader, nir_intrinsic_discard); nir_builder_instr_insert(b, &discard->instr); + b->shader->info->fs.uses_discard = true; } static void @@ -1048,6 +1087,7 @@ nir_intrinsic_instr_create(b->shader, nir_intrinsic_discard_if); discard->src[0] = nir_src_for_ssa(cmp); nir_builder_instr_insert(b, &discard->instr); + b->shader->info->fs.uses_discard = true; } static void @@ -1303,6 +1343,9 @@ case GLSL_SAMPLER_DIM_CUBE: instr->coord_components = 3; break; + case GLSL_SAMPLER_DIM_SUBPASS: + case GLSL_SAMPLER_DIM_SUBPASS_MS: + unreachable("invalid sampler_dim"); } if (instr->is_array) @@ -1394,7 +1437,7 @@ else instr->src[src_number].src = nir_src_for_ssa(ttn_channel(b, src[0], Z)); - instr->src[src_number].src_type = nir_tex_src_comparitor; + instr->src[src_number].src_type = nir_tex_src_comparator; src_number++; } @@ -1492,7 +1535,6 @@ [TGSI_OPCODE_SLT] = nir_op_slt, [TGSI_OPCODE_SGE] = nir_op_sge, [TGSI_OPCODE_MAD] = nir_op_ffma, - [TGSI_OPCODE_SUB] = nir_op_fsub, [TGSI_OPCODE_LRP] = 0, [TGSI_OPCODE_SQRT] = nir_op_fsqrt, [TGSI_OPCODE_DP2A] = 0, @@ -1504,7 +1546,6 @@ [TGSI_OPCODE_LG2] = nir_op_flog2, [TGSI_OPCODE_POW] = nir_op_fpow, [TGSI_OPCODE_XPD] = 0, - [TGSI_OPCODE_ABS] = nir_op_fabs, [TGSI_OPCODE_DPH] = 0, [TGSI_OPCODE_COS] = nir_op_fcos, [TGSI_OPCODE_DDX] = nir_op_fddx, @@ -1538,7 +1579,6 @@ [TGSI_OPCODE_TXB] = 0, [TGSI_OPCODE_DIV] = nir_op_fdiv, [TGSI_OPCODE_DP2] = 0, - [TGSI_OPCODE_DP2A] = 0, [TGSI_OPCODE_TXL] = 0, [TGSI_OPCODE_BRK] = 0, @@ -1905,9 +1945,22 @@ nir_intrinsic_instr *store = nir_intrinsic_instr_create(b->shader, nir_intrinsic_store_output); unsigned loc = var->data.driver_location + i; - store->num_components = 4; - store->src[0].reg.reg = c->output_regs[loc].reg; - store->src[0].reg.base_offset = c->output_regs[loc].offset; + + nir_src src = nir_src_for_reg(c->output_regs[loc].reg); + src.reg.base_offset = c->output_regs[loc].offset; + + if (c->build.shader->stage == MESA_SHADER_FRAGMENT && + var->data.location == FRAG_RESULT_DEPTH) { + /* TGSI uses TGSI_SEMANTIC_POSITION.z for the depth output, while + * NIR uses a single float FRAG_RESULT_DEPTH. + */ + src = nir_src_for_ssa(nir_channel(b, nir_ssa_for_src(b, src, 4), 2)); + store->num_components = 1; + } else { + store->num_components = 4; + } + store->src[0] = src; + nir_intrinsic_set_base(store, loc); nir_intrinsic_set_write_mask(store, 0xf); store->src[1] = nir_src_for_ssa(nir_imm_int(b, 0)); diff -Nru mesa-12.0.6/src/gallium/auxiliary/os/os_misc.c mesa-17.0.7/src/gallium/auxiliary/os/os_misc.c --- mesa-12.0.6/src/gallium/auxiliary/os/os_misc.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/os/os_misc.c 2017-06-01 10:37:10.000000000 +0000 @@ -69,10 +69,21 @@ static FILE *fout = NULL; if (!fout) { +#ifdef DEBUG /* one-time init */ const char *filename = os_get_option("GALLIUM_LOG_FILE"); - if (filename) - fout = fopen(filename, "w"); + if (filename) { + const char *mode = "w"; + if (filename[0] == '+') { + /* If the filename is prefixed with '+' then open the file for + * appending instead of normal writing. + */ + mode = "a"; + filename++; /* skip the '+' */ + } + fout = fopen(filename, mode); + } +#endif if (!fout) fout = stderr; } @@ -117,8 +128,11 @@ const long phys_pages = sysconf(_SC_PHYS_PAGES); const long page_size = sysconf(_SC_PAGE_SIZE); - *size = phys_pages * page_size; - return (phys_pages > 0 && page_size > 0); + if (phys_pages <= 0 || page_size <= 0) + return false; + + *size = (uint64_t)phys_pages * (uint64_t)page_size; + return true; #elif defined(PIPE_OS_APPLE) || defined(PIPE_OS_BSD) size_t len = sizeof(*size); int mib[2]; @@ -142,8 +156,11 @@ status_t ret; ret = get_system_info(&info); - *size = info.max_pages * B_PAGE_SIZE; - return (ret == B_OK); + if (ret != B_OK || info.max_pages <= 0) + return false; + + *size = (uint64_t)info.max_pages * (uint64_t)B_PAGE_SIZE; + return true; #elif defined(PIPE_OS_WINDOWS) MEMORYSTATUSEX status; BOOL ret; diff -Nru mesa-12.0.6/src/gallium/auxiliary/os/os_process.c mesa-17.0.7/src/gallium/auxiliary/os/os_process.c --- mesa-12.0.6/src/gallium/auxiliary/os/os_process.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/os/os_process.c 2017-06-01 10:37:10.000000000 +0000 @@ -43,6 +43,10 @@ #warning unexpected platform in os_process.c #endif +#if defined(PIPE_OS_LINUX) +# include +#endif + /** * Return the name of the current process. @@ -108,3 +112,47 @@ return FALSE; } } + + +/** + * Return the command line for the calling process. This is basically + * the argv[] array with the arguments separated by spaces. + * \param cmdline returns the command line string + * \param size size of the cmdline buffer + * \return TRUE or FALSE for success, failure + */ +boolean +os_get_command_line(char *cmdline, size_t size) +{ +#if defined(PIPE_SUBSYSTEM_WINDOWS_USER) + const char *args = GetCommandLine(); + if (args) { + strncpy(cmdline, args, size); + // make sure we terminate the string + cmdline[size - 1] = 0; + return TRUE; + } +#elif defined(PIPE_OS_LINUX) + int f = open("/proc/self/cmdline", O_RDONLY); + if (f) { + const int n = read(f, cmdline, size - 1); + int i; + assert(n < size); + // The arguments are separated by '\0' chars. Convert them to spaces. + for (i = 0; i < n; i++) { + if (cmdline[i] == 0) { + cmdline[i] = ' '; + } + } + // terminate the string + cmdline[n] = 0; + close(f); + return TRUE; + } +#endif + + /* XXX to-do: implement this function for other operating systems */ + + cmdline[0] = 0; + return FALSE; +} diff -Nru mesa-12.0.6/src/gallium/auxiliary/os/os_process.h mesa-17.0.7/src/gallium/auxiliary/os/os_process.h --- mesa-12.0.6/src/gallium/auxiliary/os/os_process.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/os/os_process.h 2017-06-01 10:37:10.000000000 +0000 @@ -37,4 +37,8 @@ os_get_process_name(char *str, size_t size); +extern boolean +os_get_command_line(char *cmdline, size_t size); + + #endif /* OS_PROCESS_H */ diff -Nru mesa-12.0.6/src/gallium/auxiliary/os/os_thread.h mesa-17.0.7/src/gallium/auxiliary/os/os_thread.h --- mesa-12.0.6/src/gallium/auxiliary/os/os_thread.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/os/os_thread.h 2017-06-01 10:37:10.000000000 +0000 @@ -97,6 +97,17 @@ } +static inline int pipe_thread_is_self( pipe_thread thread ) +{ +#if defined(HAVE_PTHREAD) +# if defined(__GNU_LIBRARY__) && defined(__GLIBC__) && defined(__GLIBC_MINOR__) && \ + (__GLIBC__ >= 3 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 12)) + return pthread_equal(pthread_self(), thread); +# endif +#endif + return 0; +} + /* pipe_mutex */ typedef mtx_t pipe_mutex; @@ -116,6 +127,22 @@ #define pipe_mutex_unlock(mutex) \ (void) mtx_unlock(&(mutex)) +#define pipe_mutex_assert_locked(mutex) \ + __pipe_mutex_assert_locked(&(mutex)) + +static inline void +__pipe_mutex_assert_locked(pipe_mutex *mutex) +{ +#ifdef DEBUG + /* NOTE: this would not work for recursive mutexes, but + * pipe_mutex doesn't support those + */ + int ret = mtx_trylock(mutex); + assert(ret == thrd_busy); + if (ret == thrd_success) + mtx_unlock(mutex); +#endif +} /* pipe_condvar */ diff -Nru mesa-12.0.6/src/gallium/auxiliary/os/os_time.c mesa-17.0.7/src/gallium/auxiliary/os/os_time.c --- mesa-12.0.6/src/gallium/auxiliary/os/os_time.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/os/os_time.c 2017-06-01 10:37:10.000000000 +0000 @@ -40,6 +40,7 @@ # include /* timeval */ # include /* timeval */ # include /* sched_yield */ +# include #elif defined(PIPE_SUBSYSTEM_WINDOWS_USER) # include #else @@ -81,19 +82,30 @@ } -#if defined(PIPE_SUBSYSTEM_WINDOWS_USER) void os_time_sleep(int64_t usecs) { +#if defined(PIPE_OS_LINUX) + struct timespec time; + time.tv_sec = usecs / 1000000; + time.tv_nsec = (usecs % 1000000) * 1000; + while (clock_nanosleep(CLOCK_MONOTONIC, 0, &time, &time) == EINTR); + +#elif defined(PIPE_OS_UNIX) + usleep(usecs); + +#elif defined(PIPE_SUBSYSTEM_WINDOWS_USER) DWORD dwMilliseconds = (DWORD) ((usecs + 999) / 1000); /* Avoid Sleep(O) as that would cause to sleep for an undetermined duration */ if (dwMilliseconds) { Sleep(dwMilliseconds); } +#else +# error Unsupported OS +#endif } -#endif int64_t diff -Nru mesa-12.0.6/src/gallium/auxiliary/os/os_time.h mesa-17.0.7/src/gallium/auxiliary/os/os_time.h --- mesa-12.0.6/src/gallium/auxiliary/os/os_time.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/os/os_time.h 2017-06-01 10:37:10.000000000 +0000 @@ -70,12 +70,8 @@ /* * Sleep. */ -#if defined(PIPE_OS_UNIX) -#define os_time_sleep(_usecs) usleep(_usecs) -#else void os_time_sleep(int64_t usecs); -#endif /* diff -Nru mesa-12.0.6/src/gallium/auxiliary/pipebuffer/pb_bufmgr_cache.c mesa-17.0.7/src/gallium/auxiliary/pipebuffer/pb_bufmgr_cache.c --- mesa-12.0.6/src/gallium/auxiliary/pipebuffer/pb_bufmgr_cache.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/pipebuffer/pb_bufmgr_cache.c 2017-06-01 10:37:10.000000000 +0000 @@ -210,7 +210,7 @@ /* get a buffer from the cache */ buf = (struct pb_cache_buffer *) pb_cache_reclaim_buffer(&mgr->cache, size, desc->alignment, - desc->usage); + desc->usage, 0); if (buf) return &buf->base; @@ -243,7 +243,7 @@ buf->base.vtbl = &pb_cache_buffer_vtbl; buf->mgr = mgr; - pb_cache_init_entry(&mgr->cache, &buf->cache_entry, &buf->base); + pb_cache_init_entry(&mgr->cache, &buf->cache_entry, &buf->base, 0); return &buf->base; } diff -Nru mesa-12.0.6/src/gallium/auxiliary/pipebuffer/pb_cache.c mesa-17.0.7/src/gallium/auxiliary/pipebuffer/pb_cache.c --- mesa-12.0.6/src/gallium/auxiliary/pipebuffer/pb_cache.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/pipebuffer/pb_cache.c 2017-06-01 10:37:10.000000000 +0000 @@ -38,22 +38,23 @@ destroy_buffer_locked(struct pb_cache_entry *entry) { struct pb_cache *mgr = entry->mgr; + struct pb_buffer *buf = entry->buffer; - assert(!pipe_is_referenced(&entry->buffer->reference)); + assert(!pipe_is_referenced(&buf->reference)); if (entry->head.next) { LIST_DEL(&entry->head); assert(mgr->num_buffers); --mgr->num_buffers; - mgr->cache_size -= entry->buffer->size; + mgr->cache_size -= buf->size; } - entry->mgr->destroy_buffer(entry->buffer); + mgr->destroy_buffer(buf); } /** * Free as many cache buffers from the list head as possible. */ static void -release_expired_buffers_locked(struct pb_cache *mgr) +release_expired_buffers_locked(struct list_head *cache) { struct list_head *curr, *next; struct pb_cache_entry *entry; @@ -61,9 +62,9 @@ now = os_time_get(); - curr = mgr->cache.next; + curr = cache->next; next = curr->next; - while (curr != &mgr->cache) { + while (curr != cache) { entry = LIST_ENTRY(struct pb_cache_entry, curr, head); if (!os_time_timeout(entry->start, entry->end, now)) @@ -84,24 +85,28 @@ pb_cache_add_buffer(struct pb_cache_entry *entry) { struct pb_cache *mgr = entry->mgr; + struct list_head *cache = &mgr->buckets[entry->bucket_index]; + struct pb_buffer *buf = entry->buffer; + unsigned i; pipe_mutex_lock(mgr->mutex); - assert(!pipe_is_referenced(&entry->buffer->reference)); + assert(!pipe_is_referenced(&buf->reference)); - release_expired_buffers_locked(mgr); + for (i = 0; i < ARRAY_SIZE(mgr->buckets); i++) + release_expired_buffers_locked(&mgr->buckets[i]); /* Directly release any buffer that exceeds the limit. */ - if (mgr->cache_size + entry->buffer->size > mgr->max_cache_size) { - entry->mgr->destroy_buffer(entry->buffer); + if (mgr->cache_size + buf->size > mgr->max_cache_size) { + mgr->destroy_buffer(buf); pipe_mutex_unlock(mgr->mutex); return; } entry->start = os_time_get(); entry->end = entry->start + mgr->usecs; - LIST_ADDTAIL(&entry->head, &mgr->cache); + LIST_ADDTAIL(&entry->head, cache); ++mgr->num_buffers; - mgr->cache_size += entry->buffer->size; + mgr->cache_size += buf->size; pipe_mutex_unlock(mgr->mutex); } @@ -114,25 +119,24 @@ pb_cache_is_buffer_compat(struct pb_cache_entry *entry, pb_size size, unsigned alignment, unsigned usage) { + struct pb_cache *mgr = entry->mgr; struct pb_buffer *buf = entry->buffer; - if (usage & entry->mgr->bypass_usage) - return 0; - - if (buf->size < size) + if (!pb_check_usage(usage, buf->usage)) return 0; /* be lenient with size */ - if (buf->size > (unsigned) (entry->mgr->size_factor * size)) + if (buf->size < size || + buf->size > (unsigned) (mgr->size_factor * size)) return 0; - if (!pb_check_alignment(alignment, buf->alignment)) + if (usage & mgr->bypass_usage) return 0; - if (!pb_check_usage(usage, buf->usage)) + if (!pb_check_alignment(alignment, buf->alignment)) return 0; - return entry->mgr->can_reclaim(buf) ? 1 : -1; + return mgr->can_reclaim(buf) ? 1 : -1; } /** @@ -141,23 +145,25 @@ */ struct pb_buffer * pb_cache_reclaim_buffer(struct pb_cache *mgr, pb_size size, - unsigned alignment, unsigned usage) + unsigned alignment, unsigned usage, + unsigned bucket_index) { struct pb_cache_entry *entry; struct pb_cache_entry *cur_entry; struct list_head *cur, *next; int64_t now; int ret = 0; + struct list_head *cache = &mgr->buckets[bucket_index]; pipe_mutex_lock(mgr->mutex); entry = NULL; - cur = mgr->cache.next; + cur = cache->next; next = cur->next; /* search in the expired buffers, freeing them in the process */ now = os_time_get(); - while (cur != &mgr->cache) { + while (cur != cache) { cur_entry = LIST_ENTRY(struct pb_cache_entry, cur, head); if (!entry && (ret = pb_cache_is_buffer_compat(cur_entry, size, @@ -179,7 +185,7 @@ /* keep searching in the hot buffers */ if (!entry && ret != -1) { - while (cur != &mgr->cache) { + while (cur != cache) { cur_entry = LIST_ENTRY(struct pb_cache_entry, cur, head); ret = pb_cache_is_buffer_compat(cur_entry, size, alignment, usage); @@ -220,26 +226,32 @@ { struct list_head *curr, *next; struct pb_cache_entry *buf; + unsigned i; pipe_mutex_lock(mgr->mutex); - curr = mgr->cache.next; - next = curr->next; - while (curr != &mgr->cache) { - buf = LIST_ENTRY(struct pb_cache_entry, curr, head); - destroy_buffer_locked(buf); - curr = next; + for (i = 0; i < ARRAY_SIZE(mgr->buckets); i++) { + struct list_head *cache = &mgr->buckets[i]; + + curr = cache->next; next = curr->next; + while (curr != cache) { + buf = LIST_ENTRY(struct pb_cache_entry, curr, head); + destroy_buffer_locked(buf); + curr = next; + next = curr->next; + } } pipe_mutex_unlock(mgr->mutex); } void pb_cache_init_entry(struct pb_cache *mgr, struct pb_cache_entry *entry, - struct pb_buffer *buf) + struct pb_buffer *buf, unsigned bucket_index) { memset(entry, 0, sizeof(*entry)); entry->buffer = buf; entry->mgr = mgr; + entry->bucket_index = bucket_index; } /** @@ -263,7 +275,11 @@ void (*destroy_buffer)(struct pb_buffer *buf), bool (*can_reclaim)(struct pb_buffer *buf)) { - LIST_INITHEAD(&mgr->cache); + unsigned i; + + for (i = 0; i < ARRAY_SIZE(mgr->buckets); i++) + LIST_INITHEAD(&mgr->buckets[i]); + pipe_mutex_init(mgr->mutex); mgr->cache_size = 0; mgr->max_cache_size = maximum_cache_size; diff -Nru mesa-12.0.6/src/gallium/auxiliary/pipebuffer/pb_cache.h mesa-17.0.7/src/gallium/auxiliary/pipebuffer/pb_cache.h --- mesa-12.0.6/src/gallium/auxiliary/pipebuffer/pb_cache.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/pipebuffer/pb_cache.h 2017-06-01 10:37:10.000000000 +0000 @@ -42,11 +42,16 @@ struct pb_buffer *buffer; /**< Pointer to the structure this is part of. */ struct pb_cache *mgr; int64_t start, end; /**< Caching time interval */ + unsigned bucket_index; }; struct pb_cache { - struct list_head cache; + /* The cache is divided into buckets for minimizing cache misses. + * The driver controls which buffer goes into which bucket. + */ + struct list_head buckets[4]; + pipe_mutex mutex; uint64_t cache_size; uint64_t max_cache_size; @@ -61,10 +66,11 @@ void pb_cache_add_buffer(struct pb_cache_entry *entry); struct pb_buffer *pb_cache_reclaim_buffer(struct pb_cache *mgr, pb_size size, - unsigned alignment, unsigned usage); + unsigned alignment, unsigned usage, + unsigned bucket_index); void pb_cache_release_all_buffers(struct pb_cache *mgr); void pb_cache_init_entry(struct pb_cache *mgr, struct pb_cache_entry *entry, - struct pb_buffer *buf); + struct pb_buffer *buf, unsigned bucket_index); void pb_cache_init(struct pb_cache *mgr, uint usecs, float size_factor, unsigned bypass_usage, uint64_t maximum_cache_size, void (*destroy_buffer)(struct pb_buffer *buf), diff -Nru mesa-12.0.6/src/gallium/auxiliary/pipebuffer/pb_slab.c mesa-17.0.7/src/gallium/auxiliary/pipebuffer/pb_slab.c --- mesa-12.0.6/src/gallium/auxiliary/pipebuffer/pb_slab.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/pipebuffer/pb_slab.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,252 @@ +/* + * Copyright 2016 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#include "pb_slab.h" + +#include "util/u_math.h" +#include "util/u_memory.h" + +/* All slab allocations from the same heap and with the same size belong + * to the same group. + */ +struct pb_slab_group +{ + /* Slabs with allocation candidates. Typically, slabs in this list should + * have some free entries. + * + * However, when the head becomes full we purposefully keep it around + * until the next allocation attempt, at which time we try a reclaim. + * The intention is to keep serving allocations from the same slab as long + * as possible for better locality. + * + * Due to a race in new slab allocation, additional slabs in this list + * can be fully allocated as well. + */ + struct list_head slabs; +}; + + +static void +pb_slab_reclaim(struct pb_slabs *slabs, struct pb_slab_entry *entry) +{ + struct pb_slab *slab = entry->slab; + + LIST_DEL(&entry->head); /* remove from reclaim list */ + LIST_ADD(&entry->head, &slab->free); + slab->num_free++; + + /* Add slab to the group's list if it isn't already linked. */ + if (!slab->head.next) { + struct pb_slab_group *group = &slabs->groups[entry->group_index]; + LIST_ADDTAIL(&slab->head, &group->slabs); + } + + if (slab->num_free >= slab->num_entries) { + LIST_DEL(&slab->head); + slabs->slab_free(slabs->priv, slab); + } +} + +static void +pb_slabs_reclaim_locked(struct pb_slabs *slabs) +{ + while (!LIST_IS_EMPTY(&slabs->reclaim)) { + struct pb_slab_entry *entry = + LIST_ENTRY(struct pb_slab_entry, slabs->reclaim.next, head); + + if (!slabs->can_reclaim(slabs->priv, entry)) + break; + + pb_slab_reclaim(slabs, entry); + } +} + +/* Allocate a slab entry of the given size from the given heap. + * + * This will try to re-use entries that have previously been freed. However, + * if no entries are free (or all free entries are still "in flight" as + * determined by the can_reclaim fallback function), a new slab will be + * requested via the slab_alloc callback. + * + * Note that slab_free can also be called by this function. + */ +struct pb_slab_entry * +pb_slab_alloc(struct pb_slabs *slabs, unsigned size, unsigned heap) +{ + unsigned order = MAX2(slabs->min_order, util_logbase2_ceil(size)); + unsigned group_index; + struct pb_slab_group *group; + struct pb_slab *slab; + struct pb_slab_entry *entry; + + assert(order < slabs->min_order + slabs->num_orders); + assert(heap < slabs->num_heaps); + + group_index = heap * slabs->num_orders + (order - slabs->min_order); + group = &slabs->groups[group_index]; + + pipe_mutex_lock(slabs->mutex); + + /* If there is no candidate slab at all, or the first slab has no free + * entries, try reclaiming entries. + */ + if (LIST_IS_EMPTY(&group->slabs) || + LIST_IS_EMPTY(&LIST_ENTRY(struct pb_slab, group->slabs.next, head)->free)) + pb_slabs_reclaim_locked(slabs); + + /* Remove slabs without free entries. */ + while (!LIST_IS_EMPTY(&group->slabs)) { + slab = LIST_ENTRY(struct pb_slab, group->slabs.next, head); + if (!LIST_IS_EMPTY(&slab->free)) + break; + + LIST_DEL(&slab->head); + } + + if (LIST_IS_EMPTY(&group->slabs)) { + /* Drop the mutex temporarily to prevent a deadlock where the allocation + * calls back into slab functions (most likely to happen for + * pb_slab_reclaim if memory is low). + * + * There's a chance that racing threads will end up allocating multiple + * slabs for the same group, but that doesn't hurt correctness. + */ + pipe_mutex_unlock(slabs->mutex); + slab = slabs->slab_alloc(slabs->priv, heap, 1 << order, group_index); + if (!slab) + return NULL; + pipe_mutex_lock(slabs->mutex); + + LIST_ADD(&slab->head, &group->slabs); + } + + entry = LIST_ENTRY(struct pb_slab_entry, slab->free.next, head); + LIST_DEL(&entry->head); + slab->num_free--; + + pipe_mutex_unlock(slabs->mutex); + + return entry; +} + +/* Free the given slab entry. + * + * The entry may still be in use e.g. by in-flight command submissions. The + * can_reclaim callback function will be called to determine whether the entry + * can be handed out again by pb_slab_alloc. + */ +void +pb_slab_free(struct pb_slabs* slabs, struct pb_slab_entry *entry) +{ + pipe_mutex_lock(slabs->mutex); + LIST_ADDTAIL(&entry->head, &slabs->reclaim); + pipe_mutex_unlock(slabs->mutex); +} + +/* Check if any of the entries handed to pb_slab_free are ready to be re-used. + * + * This may end up freeing some slabs and is therefore useful to try to reclaim + * some no longer used memory. However, calling this function is not strictly + * required since pb_slab_alloc will eventually do the same thing. + */ +void +pb_slabs_reclaim(struct pb_slabs *slabs) +{ + pipe_mutex_lock(slabs->mutex); + pb_slabs_reclaim_locked(slabs); + pipe_mutex_unlock(slabs->mutex); +} + +/* Initialize the slabs manager. + * + * The minimum and maximum size of slab entries are 2^min_order and + * 2^max_order, respectively. + * + * priv will be passed to the given callback functions. + */ +bool +pb_slabs_init(struct pb_slabs *slabs, + unsigned min_order, unsigned max_order, + unsigned num_heaps, + void *priv, + slab_can_reclaim_fn *can_reclaim, + slab_alloc_fn *slab_alloc, + slab_free_fn *slab_free) +{ + unsigned num_groups; + unsigned i; + + assert(min_order <= max_order); + assert(max_order < sizeof(unsigned) * 8 - 1); + + slabs->min_order = min_order; + slabs->num_orders = max_order - min_order + 1; + slabs->num_heaps = num_heaps; + + slabs->priv = priv; + slabs->can_reclaim = can_reclaim; + slabs->slab_alloc = slab_alloc; + slabs->slab_free = slab_free; + + LIST_INITHEAD(&slabs->reclaim); + + num_groups = slabs->num_orders * slabs->num_heaps; + slabs->groups = CALLOC(num_groups, sizeof(*slabs->groups)); + if (!slabs->groups) + return false; + + for (i = 0; i < num_groups; ++i) { + struct pb_slab_group *group = &slabs->groups[i]; + LIST_INITHEAD(&group->slabs); + } + + pipe_mutex_init(slabs->mutex); + + return true; +} + +/* Shutdown the slab manager. + * + * This will free all allocated slabs and internal structures, even if some + * of the slab entries are still in flight (i.e. if can_reclaim would return + * false). + */ +void +pb_slabs_deinit(struct pb_slabs *slabs) +{ + /* Reclaim all slab entries (even those that are still in flight). This + * implicitly calls slab_free for everything. + */ + while (!LIST_IS_EMPTY(&slabs->reclaim)) { + struct pb_slab_entry *entry = + LIST_ENTRY(struct pb_slab_entry, slabs->reclaim.next, head); + pb_slab_reclaim(slabs, entry); + } + + FREE(slabs->groups); + pipe_mutex_destroy(slabs->mutex); +} diff -Nru mesa-12.0.6/src/gallium/auxiliary/pipebuffer/pb_slab.h mesa-17.0.7/src/gallium/auxiliary/pipebuffer/pb_slab.h --- mesa-12.0.6/src/gallium/auxiliary/pipebuffer/pb_slab.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/pipebuffer/pb_slab.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,155 @@ +/* + * Copyright 2016 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +/** + * \file + * + * Helper library for carving out smaller allocations (called "(slab) entries") + * from larger buffers (called "slabs"). + * + * The library supports maintaining separate heaps (e.g. VRAM vs. GTT). The + * meaning of each heap is treated as opaque by this library. + * + * The library allows delaying the re-use of an entry, i.e. an entry may be + * freed by calling \ref pb_slab_free even while the corresponding buffer + * region is still in use by the GPU. A callback function is called to + * determine when it is safe to allocate the entry again; the user of this + * library is expected to maintain the required fences or similar. + */ + +#ifndef PB_SLAB_H +#define PB_SLAB_H + +#include "pb_buffer.h" +#include "util/list.h" +#include "os/os_thread.h" + +struct pb_slab; +struct pb_slabs; +struct pb_slab_group; + +/* Descriptor of a slab entry. + * + * The user of this utility library is expected to embed this in a larger + * structure that describes a buffer object. + */ +struct pb_slab_entry +{ + struct list_head head; + struct pb_slab *slab; /* the slab that contains this buffer */ + unsigned group_index; /* index into pb_slabs::groups */ +}; + +/* Descriptor of a slab from which many entries are carved out. + * + * The user of this utility library is expected to embed this in a larger + * structure that describes a buffer object. + */ +struct pb_slab +{ + struct list_head head; + + struct list_head free; /* list of free pb_slab_entry structures */ + unsigned num_free; /* number of entries in free list */ + unsigned num_entries; /* total number of entries */ +}; + +/* Callback function that is called when a new slab needs to be allocated + * for fulfilling allocation requests of the given size from the given heap. + * + * The callback must allocate a pb_slab structure and the desired number + * of entries. All entries that belong to the slab must be added to the free + * list. Entries' pb_slab_entry structures must be initialized with the given + * group_index. + * + * The callback may call pb_slab functions. + */ +typedef struct pb_slab *(slab_alloc_fn)(void *priv, + unsigned heap, + unsigned entry_size, + unsigned group_index); + +/* Callback function that is called when all entries of a slab have been freed. + * + * The callback must free the slab and all its entries. It must not call any of + * the pb_slab functions, or a deadlock (recursive mutex lock) may occur. + */ +typedef void (slab_free_fn)(void *priv, struct pb_slab *); + +/* Callback function to determine whether a given entry can already be reused. + */ +typedef bool (slab_can_reclaim_fn)(void *priv, struct pb_slab_entry *); + +/* Manager of slab allocations. The user of this utility library should embed + * this in a structure somewhere and call pb_slab_init/deinit at init/shutdown + * time. + */ +struct pb_slabs +{ + pipe_mutex mutex; + + unsigned min_order; + unsigned num_orders; + unsigned num_heaps; + + /* One group per (heap, order) pair. */ + struct pb_slab_group *groups; + + /* List of entries waiting to be reclaimed, i.e. they have been passed to + * pb_slab_free, but may not be safe for re-use yet. The tail points at + * the most-recently freed entry. + */ + struct list_head reclaim; + + void *priv; + slab_can_reclaim_fn *can_reclaim; + slab_alloc_fn *slab_alloc; + slab_free_fn *slab_free; +}; + +struct pb_slab_entry * +pb_slab_alloc(struct pb_slabs *slabs, unsigned size, unsigned heap); + +void +pb_slab_free(struct pb_slabs* slabs, struct pb_slab_entry *entry); + +void +pb_slabs_reclaim(struct pb_slabs *slabs); + +bool +pb_slabs_init(struct pb_slabs *slabs, + unsigned min_order, unsigned max_order, + unsigned num_heaps, + void *priv, + slab_can_reclaim_fn *can_reclaim, + slab_alloc_fn *slab_alloc, + slab_free_fn *slab_free); + +void +pb_slabs_deinit(struct pb_slabs *slabs); + +#endif diff -Nru mesa-12.0.6/src/gallium/auxiliary/pipe-loader/Makefile.in mesa-17.0.7/src/gallium/auxiliary/pipe-loader/Makefile.in --- mesa-12.0.6/src/gallium/auxiliary/pipe-loader/Makefile.in 2017-01-24 01:41:46.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/pipe-loader/Makefile.in 2017-06-01 10:37:20.000000000 +0000 @@ -89,20 +89,23 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) -@HAVE_LIBDRM_TRUE@am__append_3 = \ +@HAVE_LIBDRM_TRUE@am__append_4 = \ @HAVE_LIBDRM_TRUE@ $(LIBDRM_CFLAGS) -@HAVE_LIBDRM_TRUE@am__append_4 = \ +@HAVE_LIBDRM_TRUE@am__append_5 = \ @HAVE_LIBDRM_TRUE@ $(DRM_SOURCES) -@HAVE_LIBDRM_TRUE@am__append_5 = \ +@HAVE_LIBDRM_TRUE@am__append_6 = \ @HAVE_LIBDRM_TRUE@ $(DRM_SOURCES) subdir = src/gallium/auxiliary/pipe-loader @@ -233,6 +236,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -247,6 +252,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -276,10 +282,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -329,11 +336,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -373,8 +377,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -411,8 +413,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -421,7 +421,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -429,13 +428,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -464,6 +464,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -582,12 +583,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -599,13 +596,13 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) # XXX: check if we need the gallium/winsys include AM_CFLAGS = -I$(top_srcdir)/src/loader \ -I$(top_srcdir)/src/gallium/winsys \ $(GALLIUM_PIPE_LOADER_DEFINES) $(GALLIUM_CFLAGS) \ - $(VISIBILITY_CFLAGS) $(am__append_3) + $(VISIBILITY_CFLAGS) $(am__append_4) noinst_LTLIBRARIES = \ libpipe_loader_static.la \ libpipe_loader_dynamic.la @@ -618,8 +615,8 @@ $(AM_CFLAGS) \ -DPIPE_SEARCH_DIR=\"$(libdir)/gallium-pipe\" -libpipe_loader_static_la_SOURCES = $(COMMON_SOURCES) $(am__append_4) -libpipe_loader_dynamic_la_SOURCES = $(COMMON_SOURCES) $(am__append_5) +libpipe_loader_static_la_SOURCES = $(COMMON_SOURCES) $(am__append_5) +libpipe_loader_dynamic_la_SOURCES = $(COMMON_SOURCES) $(am__append_6) libpipe_loader_static_la_LIBADD = \ $(top_builddir)/src/loader/libloader.la diff -Nru mesa-12.0.6/src/gallium/auxiliary/pipe-loader/pipe_loader_drm.c mesa-17.0.7/src/gallium/auxiliary/pipe-loader/pipe_loader_drm.c --- mesa-12.0.6/src/gallium/auxiliary/pipe-loader/pipe_loader_drm.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/pipe-loader/pipe_loader_drm.c 2017-06-01 10:37:10.000000000 +0000 @@ -64,13 +64,13 @@ #ifdef GALLIUM_STATIC_TARGETS static const struct drm_conf_ret throttle_ret = { - DRM_CONF_INT, - {2}, + .type = DRM_CONF_INT, + .val.val_int = 2, }; static const struct drm_conf_ret share_fd_ret = { - DRM_CONF_BOOL, - {true}, + .type = DRM_CONF_BOOL, + .val.val_bool = true, }; static inline const struct drm_conf_ret * @@ -89,7 +89,6 @@ static const struct drm_driver_descriptor driver_descriptors[] = { { - .name = "i915", .driver_name = "i915", .create_screen = pipe_i915_create_screen, .configuration = configuration_query, @@ -100,72 +99,71 @@ * it. */ { - .name = "i965", - .driver_name = "vc4", + .driver_name = "i965", .create_screen = pipe_vc4_create_screen, .configuration = configuration_query, }, #endif { - .name = "i965", - .driver_name = "i915", + .driver_name = "i965", .create_screen = pipe_ilo_create_screen, .configuration = configuration_query, }, { - .name = "nouveau", .driver_name = "nouveau", .create_screen = pipe_nouveau_create_screen, .configuration = configuration_query, }, { - .name = "r300", - .driver_name = "radeon", + .driver_name = "r300", .create_screen = pipe_r300_create_screen, .configuration = configuration_query, }, { - .name = "r600", - .driver_name = "radeon", + .driver_name = "r600", .create_screen = pipe_r600_create_screen, .configuration = configuration_query, }, { - .name = "radeonsi", - .driver_name = "radeon", + .driver_name = "radeonsi", .create_screen = pipe_radeonsi_create_screen, .configuration = configuration_query, }, { - .name = "vmwgfx", .driver_name = "vmwgfx", .create_screen = pipe_vmwgfx_create_screen, .configuration = configuration_query, }, { - .name = "kgsl", - .driver_name = "freedreno", + .driver_name = "kgsl", .create_screen = pipe_freedreno_create_screen, .configuration = configuration_query, }, { - .name = "msm", - .driver_name = "freedreno", + .driver_name = "msm", .create_screen = pipe_freedreno_create_screen, .configuration = configuration_query, }, { - .name = "virtio_gpu", - .driver_name = "virtio-gpu", + .driver_name = "virtio_gpu", .create_screen = pipe_virgl_create_screen, .configuration = configuration_query, }, { - .name = "vc4", .driver_name = "vc4", .create_screen = pipe_vc4_create_screen, .configuration = configuration_query, }, + { + .driver_name = "etnaviv", + .create_screen = pipe_etna_create_screen, + .configuration = configuration_query, + }, + { + .driver_name = "imx-drm", + .create_screen = pipe_imx_drm_create_screen, + .configuration = configuration_query, + } }; #endif @@ -188,13 +186,13 @@ ddev->base.ops = &pipe_loader_drm_ops; ddev->fd = fd; - ddev->base.driver_name = loader_get_driver_for_fd(fd, _LOADER_GALLIUM); + ddev->base.driver_name = loader_get_driver_for_fd(fd); if (!ddev->base.driver_name) goto fail; #ifdef GALLIUM_STATIC_TARGETS for (int i = 0; i < ARRAY_SIZE(driver_descriptors); i++) { - if (strcmp(driver_descriptors[i].name, ddev->base.driver_name) == 0) { + if (strcmp(driver_descriptors[i].driver_name, ddev->base.driver_name) == 0) { ddev->dd = &driver_descriptors[i]; break; } @@ -209,8 +207,8 @@ ddev->dd = (const struct drm_driver_descriptor *) util_dl_get_proc_address(ddev->lib, "driver_descriptor"); - /* sanity check on the name */ - if (!ddev->dd || strcmp(ddev->dd->name, ddev->base.driver_name) != 0) + /* sanity check on the driver name */ + if (!ddev->dd || strcmp(ddev->dd->driver_name, ddev->base.driver_name) != 0) goto fail; #endif diff -Nru mesa-12.0.6/src/gallium/auxiliary/postprocess/pp_mlaa.c mesa-17.0.7/src/gallium/auxiliary/postprocess/pp_mlaa.c --- mesa-12.0.6/src/gallium/auxiliary/postprocess/pp_mlaa.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/postprocess/pp_mlaa.c 2017-06-01 10:37:10.000000000 +0000 @@ -62,13 +62,9 @@ up_consts(struct pp_queue_t *ppq) { struct pipe_context *pipe = ppq->p->pipe; - struct pipe_box box; - - u_box_2d(0, 0, sizeof(constants), 1, &box); - pipe->transfer_inline_write(pipe, ppq->constbuf, 0, PIPE_TRANSFER_WRITE, - &box, constants, sizeof(constants), - sizeof(constants)); + pipe->buffer_subdata(pipe, ppq->constbuf, PIPE_TRANSFER_WRITE, + 0, sizeof(constants), constants); } /** Run function of the MLAA filter. */ @@ -280,9 +276,9 @@ u_box_2d(0, 0, 165, 165, &box); - ppq->p->pipe->transfer_inline_write(ppq->p->pipe, ppq->areamaptex, 0, - PIPE_TRANSFER_WRITE, &box, - areamap, 165 * 2, sizeof(areamap)); + ppq->p->pipe->texture_subdata(ppq->p->pipe, ppq->areamaptex, 0, + PIPE_TRANSFER_WRITE, &box, + areamap, 165 * 2, sizeof(areamap)); ppq->shaders[n][1] = pp_tgsi_to_state(ppq->p->pipe, offsetvs, true, "offsetvs"); @@ -357,13 +353,11 @@ pp_jimenezmlaa_free(struct pp_queue_t *ppq, unsigned int n) { if (ppq->areamaptex) { - ppq->p->screen->resource_destroy(ppq->p->screen, ppq->areamaptex); - ppq->areamaptex = NULL; + pipe_resource_reference(&ppq->areamaptex, NULL); } if (ppq->constbuf) { - ppq->p->screen->resource_destroy(ppq->p->screen, ppq->constbuf); - ppq->constbuf = NULL; + pipe_resource_reference(&ppq->constbuf, NULL); } } diff -Nru mesa-12.0.6/src/gallium/auxiliary/renderonly/renderonly.c mesa-17.0.7/src/gallium/auxiliary/renderonly/renderonly.c --- mesa-12.0.6/src/gallium/auxiliary/renderonly/renderonly.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/renderonly/renderonly.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,186 @@ +/* + * Copyright (C) 2016 Christian Gmeiner + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Christian Gmeiner + */ + +#include "renderonly/renderonly.h" + +#include +#include +#include +#include + +#include "state_tracker/drm_driver.h" +#include "pipe/p_screen.h" +#include "util/u_inlines.h" +#include "util/u_memory.h" + +struct renderonly * +renderonly_dup(const struct renderonly *ro) +{ + struct renderonly *copy; + + copy = CALLOC_STRUCT(renderonly); + if (!copy) + return NULL; + + memcpy(copy, ro, sizeof(*ro)); + + return copy; +} + +struct renderonly_scanout * +renderonly_scanout_for_prime(struct pipe_resource *rsc, struct renderonly *ro) +{ + struct renderonly_scanout *scanout; + + scanout = CALLOC_STRUCT(renderonly_scanout); + if (!scanout) + return NULL; + + scanout->prime = rsc; + + return scanout; +} + +void +renderonly_scanout_destroy(struct renderonly_scanout *scanout, + struct renderonly *ro) +{ + struct drm_mode_destroy_dumb destroy_dumb = { }; + + pipe_resource_reference(&scanout->prime, NULL); + if (ro->kms_fd != -1) { + destroy_dumb.handle = scanout->handle; + drmIoctl(ro->kms_fd, DRM_IOCTL_MODE_DESTROY_DUMB, &destroy_dumb); + } + FREE(scanout); +} + +struct renderonly_scanout * +renderonly_create_kms_dumb_buffer_for_resource(struct pipe_resource *rsc, + struct renderonly *ro) +{ + struct pipe_screen *screen = rsc->screen; + struct renderonly_scanout *scanout; + struct winsys_handle handle; + int prime_fd, err; + struct drm_mode_create_dumb create_dumb = { + .width = rsc->width0, + .height = rsc->height0, + .bpp = 32, + }; + struct drm_mode_destroy_dumb destroy_dumb = { }; + + scanout = CALLOC_STRUCT(renderonly_scanout); + if (!scanout) + return NULL; + + /* create dumb buffer at scanout GPU */ + err = drmIoctl(ro->kms_fd, DRM_IOCTL_MODE_CREATE_DUMB, &create_dumb); + if (err < 0) { + fprintf(stderr, "DRM_IOCTL_MODE_CREATE_DUMB failed: %s\n", + strerror(errno)); + goto free_scanout; + } + + scanout->handle = create_dumb.handle; + scanout->stride = create_dumb.pitch; + + /* export dumb buffer */ + err = drmPrimeHandleToFD(ro->kms_fd, create_dumb.handle, O_CLOEXEC, + &prime_fd); + if (err < 0) { + fprintf(stderr, "failed to export dumb buffer: %s\n", strerror(errno)); + goto free_dumb; + } + + /* import dumb buffer */ + memset(&handle, 0, sizeof(handle)); + handle.type = DRM_API_HANDLE_TYPE_FD; + handle.handle = prime_fd; + handle.stride = create_dumb.pitch; + + scanout->prime = screen->resource_from_handle(screen, rsc, + &handle, PIPE_HANDLE_USAGE_READ_WRITE); + + close(prime_fd); + + if (!scanout->prime) { + fprintf(stderr, "failed to create resource_from_handle: %s\n", strerror(errno)); + goto free_dumb; + } + + return scanout; + +free_dumb: + destroy_dumb.handle = scanout->handle; + drmIoctl(ro->kms_fd, DRM_IOCTL_MODE_DESTROY_DUMB, &destroy_dumb); + +free_scanout: + FREE(scanout); + + return NULL; +} + +struct renderonly_scanout * +renderonly_create_gpu_import_for_resource(struct pipe_resource *rsc, + struct renderonly *ro) +{ + struct pipe_screen *screen = rsc->screen; + struct renderonly_scanout *scanout; + boolean status; + int fd, err; + struct winsys_handle handle = { + .type = DRM_API_HANDLE_TYPE_FD + }; + + scanout = CALLOC_STRUCT(renderonly_scanout); + if (!scanout) + return NULL; + + status = screen->resource_get_handle(screen, NULL, rsc, &handle, + PIPE_HANDLE_USAGE_READ_WRITE); + if (!status) + goto free_scanout; + + scanout->stride = handle.stride; + fd = handle.handle; + + err = drmPrimeFDToHandle(ro->kms_fd, fd, &scanout->handle); + close(fd); + + if (err < 0) { + fprintf(stderr, "drmPrimeFDToHandle() failed: %s\n", strerror(errno)); + goto free_scanout; + } + + return scanout; + +free_scanout: + FREE(scanout); + + return NULL; +} + diff -Nru mesa-12.0.6/src/gallium/auxiliary/renderonly/renderonly.h mesa-17.0.7/src/gallium/auxiliary/renderonly/renderonly.h --- mesa-12.0.6/src/gallium/auxiliary/renderonly/renderonly.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/renderonly/renderonly.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,110 @@ +/* + * Copyright (C) 2016 Christian Gmeiner + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Christian Gmeiner + */ + +#ifndef RENDERONLY_H +#define RENDERONLY_H + +#include +#include "state_tracker/drm_driver.h" +#include "pipe/p_state.h" + +struct renderonly_scanout { + uint32_t handle; + uint32_t stride; + + struct pipe_resource *prime; +}; + +struct renderonly { + /** + * Create a renderonly_scanout object for scanout resource. + * + * This function creates a renderonly_scanout object based on the provided + * resource. The library is designed that the driver specific pipe_resource + * struct holds a pointer to a renderonly_scanout struct. + * + * struct driver_resource { + * struct pipe_resource base; + * struct renderonly_scanout *scanout; + * ... + * }; + * + * The renderonly_scanout object exits for two reasons: + * - Do any special treatment for a scanout resource like importing the GPU + * resource into the scanout hw. + * - Make it easier for a gallium driver to detect if anything special needs + * to be done in flush_resource(..) like a resolve to linear. + */ + struct renderonly_scanout *(*create_for_resource)(struct pipe_resource *rsc, + struct renderonly *ro); + int kms_fd; + int gpu_fd; +}; + +struct renderonly * +renderonly_dup(const struct renderonly *ro); + +static inline struct renderonly_scanout * +renderonly_scanout_for_resource(struct pipe_resource *rsc, struct renderonly *ro) +{ + return ro->create_for_resource(rsc, ro); +} + +struct renderonly_scanout * +renderonly_scanout_for_prime(struct pipe_resource *rsc, struct renderonly *ro); + +void +renderonly_scanout_destroy(struct renderonly_scanout *scanout, + struct renderonly *ro); + +static inline boolean +renderonly_get_handle(struct renderonly_scanout *scanout, + struct winsys_handle *handle) +{ + if (!scanout) + return FALSE; + + handle->handle = scanout->handle; + handle->stride = scanout->stride; + + return TRUE; +} + +/** + * Create a dumb buffer object for a resource at scanout hw. + */ +struct renderonly_scanout * +renderonly_create_kms_dumb_buffer_for_resource(struct pipe_resource *rsc, + struct renderonly *ro); + +/** + * Import GPU resource into scanout hw. + */ +struct renderonly_scanout * +renderonly_create_gpu_import_for_resource(struct pipe_resource *rsc, + struct renderonly *ro); + +#endif /* RENDERONLY_H_ */ diff -Nru mesa-12.0.6/src/gallium/auxiliary/target-helpers/drm_helper.h mesa-17.0.7/src/gallium/auxiliary/target-helpers/drm_helper.h --- mesa-12.0.6/src/gallium/auxiliary/target-helpers/drm_helper.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/target-helpers/drm_helper.h 2017-06-01 10:37:10.000000000 +0000 @@ -266,5 +266,51 @@ #endif +#ifdef GALLIUM_ETNAVIV +#include "etnaviv/drm/etnaviv_drm_public.h" + +struct pipe_screen * +pipe_etna_create_screen(int fd) +{ + struct pipe_screen *screen; + + screen = etna_drm_screen_create(fd); + return screen ? debug_screen_wrap(screen) : NULL; +} + +#else + +struct pipe_screen * +pipe_etna_create_screen(int fd) +{ + fprintf(stderr, "etnaviv: driver missing\n"); + return NULL; +} + +#endif + +#ifdef GALLIUM_IMX +#include "imx/drm/imx_drm_public.h" + +struct pipe_screen * +pipe_imx_drm_create_screen(int fd) +{ + struct pipe_screen *screen; + + screen = imx_drm_screen_create(fd); + return screen ? debug_screen_wrap(screen) : NULL; +} + +#else + +struct pipe_screen * +pipe_imx_drm_create_screen(int fd) +{ + fprintf(stderr, "imx-drm: driver missing\n"); + return NULL; +} + +#endif + #endif /* DRM_HELPER_H */ diff -Nru mesa-12.0.6/src/gallium/auxiliary/target-helpers/drm_helper_public.h mesa-17.0.7/src/gallium/auxiliary/target-helpers/drm_helper_public.h --- mesa-12.0.6/src/gallium/auxiliary/target-helpers/drm_helper_public.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/target-helpers/drm_helper_public.h 2017-06-01 10:37:10.000000000 +0000 @@ -34,4 +34,10 @@ struct pipe_screen * pipe_vc4_create_screen(int fd); +struct pipe_screen * +pipe_etna_create_screen(int fd); + +struct pipe_screen * +pipe_imx_drm_create_screen(int fd); + #endif /* _DRM_HELPER_PUBLIC_H */ diff -Nru mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_aa_point.c mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_aa_point.c --- mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_aa_point.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_aa_point.c 2017-06-01 10:37:10.000000000 +0000 @@ -148,16 +148,16 @@ tmp0 = ts->tmp; /* SUB t0.xy, texIn, (0.5, 0,5) */ - tgsi_transform_op2_inst(ctx, TGSI_OPCODE_SUB, + tgsi_transform_op2_inst(ctx, TGSI_OPCODE_ADD, TGSI_FILE_TEMPORARY, tmp0, TGSI_WRITEMASK_XY, TGSI_FILE_INPUT, texIn, - TGSI_FILE_IMMEDIATE, imm); + TGSI_FILE_IMMEDIATE, imm, true); /* DP2 t0.x, t0.xy, t0.xy; # t0.x = x^2 + y^2 */ tgsi_transform_op2_inst(ctx, TGSI_OPCODE_DP2, TGSI_FILE_TEMPORARY, tmp0, TGSI_WRITEMASK_X, TGSI_FILE_TEMPORARY, tmp0, - TGSI_FILE_TEMPORARY, tmp0); + TGSI_FILE_TEMPORARY, tmp0, false); /* SQRT t0.x, t0.x */ tgsi_transform_op1_inst(ctx, TGSI_OPCODE_SQRT, @@ -167,22 +167,22 @@ /* compute coverage factor = (0.5-d)/(0.5-k) */ /* SUB t0.w, 0.5, texIn.z; # t0.w = 0.5-k */ - tgsi_transform_op2_swz_inst(ctx, TGSI_OPCODE_SUB, + tgsi_transform_op2_swz_inst(ctx, TGSI_OPCODE_ADD, TGSI_FILE_TEMPORARY, tmp0, TGSI_WRITEMASK_W, TGSI_FILE_IMMEDIATE, imm, TGSI_SWIZZLE_X, - TGSI_FILE_INPUT, texIn, TGSI_SWIZZLE_Z); + TGSI_FILE_INPUT, texIn, TGSI_SWIZZLE_Z, true); /* SUB t0.y, 0.5, t0.x; # t0.y = 0.5-d */ - tgsi_transform_op2_swz_inst(ctx, TGSI_OPCODE_SUB, + tgsi_transform_op2_swz_inst(ctx, TGSI_OPCODE_ADD, TGSI_FILE_TEMPORARY, tmp0, TGSI_WRITEMASK_Y, TGSI_FILE_IMMEDIATE, imm, TGSI_SWIZZLE_X, - TGSI_FILE_TEMPORARY, tmp0, TGSI_SWIZZLE_X); + TGSI_FILE_TEMPORARY, tmp0, TGSI_SWIZZLE_X, true); /* DIV t0.w, t0.y, t0.w; # coverage = (0.5-d)/(0.5-k) */ tgsi_transform_op2_swz_inst(ctx, TGSI_OPCODE_DIV, TGSI_FILE_TEMPORARY, tmp0, TGSI_WRITEMASK_W, TGSI_FILE_TEMPORARY, tmp0, TGSI_SWIZZLE_Y, - TGSI_FILE_TEMPORARY, tmp0, TGSI_SWIZZLE_W); + TGSI_FILE_TEMPORARY, tmp0, TGSI_SWIZZLE_W, false); /* If the coverage value is negative, it means the fragment is outside * the point's circular boundary. Kill it. @@ -198,7 +198,7 @@ tgsi_transform_op2_swz_inst(ctx, TGSI_OPCODE_MIN, TGSI_FILE_TEMPORARY, tmp0, TGSI_WRITEMASK_W, TGSI_FILE_TEMPORARY, tmp0, TGSI_SWIZZLE_W, - TGSI_FILE_IMMEDIATE, imm, TGSI_SWIZZLE_W); + TGSI_FILE_IMMEDIATE, imm, TGSI_SWIZZLE_W, false); } /** @@ -249,7 +249,7 @@ TGSI_FILE_OUTPUT, ts->color_out, TGSI_WRITEMASK_W, TGSI_FILE_TEMPORARY, ts->color_tmp, - TGSI_FILE_TEMPORARY, ts->tmp); + TGSI_FILE_TEMPORARY, ts->tmp, false); } /** diff -Nru mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_build.c mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_build.c --- mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_build.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_build.c 2017-06-01 10:37:10.000000000 +0000 @@ -239,7 +239,10 @@ ds.Name = TGSI_SEMANTIC_POSITION; ds.Index = 0; - ds.Padding = 0; + ds.StreamX = 0; + ds.StreamY = 0; + ds.StreamZ = 0; + ds.StreamW = 0; return ds; } @@ -248,6 +251,10 @@ tgsi_build_declaration_semantic( unsigned semantic_name, unsigned semantic_index, + unsigned streamx, + unsigned streamy, + unsigned streamz, + unsigned streamw, struct tgsi_declaration *declaration, struct tgsi_header *header ) { @@ -258,7 +265,10 @@ ds.Name = semantic_name; ds.Index = semantic_index; - ds.Padding = 0; + ds.StreamX = streamx; + ds.StreamY = streamy; + ds.StreamZ = streamz; + ds.StreamW = streamw; declaration_grow( declaration, header ); @@ -461,6 +471,10 @@ *ds = tgsi_build_declaration_semantic( full_decl->Semantic.Name, full_decl->Semantic.Index, + full_decl->Semantic.StreamX, + full_decl->Semantic.StreamY, + full_decl->Semantic.StreamZ, + full_decl->Semantic.StreamW, declaration, header ); } diff -Nru mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_dump.c mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_dump.c --- mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_dump.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_dump.c 2017-06-01 10:37:10.000000000 +0000 @@ -254,6 +254,20 @@ i++; break; } + case TGSI_IMM_INT64: { + union di d; + d.i = data[i].Uint | (uint64_t)data[i+1].Uint << 32; + UID( d.i ); + i++; + break; + } + case TGSI_IMM_UINT64: { + union di d; + d.ui = data[i].Uint | (uint64_t)data[i+1].Uint << 32; + UID( d.ui ); + i++; + break; + } case TGSI_IMM_FLOAT32: if (ctx->dump_float_as_hex) HFLT( data[i].Float ); @@ -346,6 +360,19 @@ UID( decl->Semantic.Index ); CHR( ']' ); } + + if (decl->Semantic.StreamX != 0 || decl->Semantic.StreamY != 0 || + decl->Semantic.StreamZ != 0 || decl->Semantic.StreamW != 0) { + TXT(", STREAM("); + UID(decl->Semantic.StreamX); + TXT(", "); + UID(decl->Semantic.StreamY); + TXT(", "); + UID(decl->Semantic.StreamZ); + TXT(", "); + UID(decl->Semantic.StreamW); + CHR(')'); + } } if (decl->Declaration.File == TGSI_FILE_IMAGE) { @@ -658,17 +685,19 @@ } } - switch (inst->Instruction.Opcode) { - case TGSI_OPCODE_IF: - case TGSI_OPCODE_UIF: - case TGSI_OPCODE_ELSE: - case TGSI_OPCODE_BGNLOOP: - case TGSI_OPCODE_ENDLOOP: - case TGSI_OPCODE_CAL: - case TGSI_OPCODE_BGNSUB: - TXT( " :" ); - UID( inst->Label.Label ); - break; + if (inst->Instruction.Label) { + switch (inst->Instruction.Opcode) { + case TGSI_OPCODE_IF: + case TGSI_OPCODE_UIF: + case TGSI_OPCODE_ELSE: + case TGSI_OPCODE_BGNLOOP: + case TGSI_OPCODE_ENDLOOP: + case TGSI_OPCODE_CAL: + case TGSI_OPCODE_BGNSUB: + TXT( " :" ); + UID( inst->Label.Label ); + break; + } } /* update indentation */ diff -Nru mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_exec.c mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_exec.c --- mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_exec.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_exec.c 2017-06-01 10:37:10.000000000 +0000 @@ -77,6 +77,8 @@ union tgsi_double_channel { double d[TGSI_QUAD_SIZE]; unsigned u[TGSI_QUAD_SIZE][2]; + uint64_t u64[TGSI_QUAD_SIZE]; + int64_t i64[TGSI_QUAD_SIZE]; }; struct tgsi_double_vector { @@ -208,6 +210,16 @@ } static void +micro_ddiv(union tgsi_double_channel *dst, + const union tgsi_double_channel *src) +{ + dst->d[0] = src[0].d[0] / src[1].d[0]; + dst->d[1] = src[0].d[1] / src[1].d[1]; + dst->d[2] = src[0].d[2] / src[1].d[2]; + dst->d[3] = src[0].d[3] / src[1].d[3]; +} + +static void micro_ddx(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src) { @@ -676,10 +688,10 @@ micro_trunc(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src) { - dst->f[0] = (float)(int)src->f[0]; - dst->f[1] = (float)(int)src->f[1]; - dst->f[2] = (float)(int)src->f[2]; - dst->f[3] = (float)(int)src->f[3]; + dst->f[0] = truncf(src->f[0]); + dst->f[1] = truncf(src->f[1]); + dst->f[2] = truncf(src->f[2]); + dst->f[3] = truncf(src->f[3]); } static void @@ -692,11 +704,251 @@ dst->d[3] = (double)src->u[3]; } +static void +micro_i64abs(union tgsi_double_channel *dst, + const union tgsi_double_channel *src) +{ + dst->i64[0] = src->i64[0] >= 0.0 ? src->i64[0] : -src->i64[0]; + dst->i64[1] = src->i64[1] >= 0.0 ? src->i64[1] : -src->i64[1]; + dst->i64[2] = src->i64[2] >= 0.0 ? src->i64[2] : -src->i64[2]; + dst->i64[3] = src->i64[3] >= 0.0 ? src->i64[3] : -src->i64[3]; +} + +static void +micro_i64sgn(union tgsi_double_channel *dst, + const union tgsi_double_channel *src) +{ + dst->i64[0] = src->i64[0] < 0 ? -1 : src->i64[0] > 0 ? 1 : 0; + dst->i64[1] = src->i64[1] < 0 ? -1 : src->i64[1] > 0 ? 1 : 0; + dst->i64[2] = src->i64[2] < 0 ? -1 : src->i64[2] > 0 ? 1 : 0; + dst->i64[3] = src->i64[3] < 0 ? -1 : src->i64[3] > 0 ? 1 : 0; +} + +static void +micro_i64neg(union tgsi_double_channel *dst, + const union tgsi_double_channel *src) +{ + dst->i64[0] = -src->i64[0]; + dst->i64[1] = -src->i64[1]; + dst->i64[2] = -src->i64[2]; + dst->i64[3] = -src->i64[3]; +} + +static void +micro_u64seq(union tgsi_double_channel *dst, + const union tgsi_double_channel *src) +{ + dst->u[0][0] = src[0].u64[0] == src[1].u64[0] ? ~0U : 0U; + dst->u[1][0] = src[0].u64[1] == src[1].u64[1] ? ~0U : 0U; + dst->u[2][0] = src[0].u64[2] == src[1].u64[2] ? ~0U : 0U; + dst->u[3][0] = src[0].u64[3] == src[1].u64[3] ? ~0U : 0U; +} + +static void +micro_u64sne(union tgsi_double_channel *dst, + const union tgsi_double_channel *src) +{ + dst->u[0][0] = src[0].u64[0] != src[1].u64[0] ? ~0U : 0U; + dst->u[1][0] = src[0].u64[1] != src[1].u64[1] ? ~0U : 0U; + dst->u[2][0] = src[0].u64[2] != src[1].u64[2] ? ~0U : 0U; + dst->u[3][0] = src[0].u64[3] != src[1].u64[3] ? ~0U : 0U; +} + +static void +micro_i64slt(union tgsi_double_channel *dst, + const union tgsi_double_channel *src) +{ + dst->u[0][0] = src[0].i64[0] < src[1].i64[0] ? ~0U : 0U; + dst->u[1][0] = src[0].i64[1] < src[1].i64[1] ? ~0U : 0U; + dst->u[2][0] = src[0].i64[2] < src[1].i64[2] ? ~0U : 0U; + dst->u[3][0] = src[0].i64[3] < src[1].i64[3] ? ~0U : 0U; +} + +static void +micro_u64slt(union tgsi_double_channel *dst, + const union tgsi_double_channel *src) +{ + dst->u[0][0] = src[0].u64[0] < src[1].u64[0] ? ~0U : 0U; + dst->u[1][0] = src[0].u64[1] < src[1].u64[1] ? ~0U : 0U; + dst->u[2][0] = src[0].u64[2] < src[1].u64[2] ? ~0U : 0U; + dst->u[3][0] = src[0].u64[3] < src[1].u64[3] ? ~0U : 0U; +} + +static void +micro_i64sge(union tgsi_double_channel *dst, + const union tgsi_double_channel *src) +{ + dst->u[0][0] = src[0].i64[0] >= src[1].i64[0] ? ~0U : 0U; + dst->u[1][0] = src[0].i64[1] >= src[1].i64[1] ? ~0U : 0U; + dst->u[2][0] = src[0].i64[2] >= src[1].i64[2] ? ~0U : 0U; + dst->u[3][0] = src[0].i64[3] >= src[1].i64[3] ? ~0U : 0U; +} + +static void +micro_u64sge(union tgsi_double_channel *dst, + const union tgsi_double_channel *src) +{ + dst->u[0][0] = src[0].u64[0] >= src[1].u64[0] ? ~0U : 0U; + dst->u[1][0] = src[0].u64[1] >= src[1].u64[1] ? ~0U : 0U; + dst->u[2][0] = src[0].u64[2] >= src[1].u64[2] ? ~0U : 0U; + dst->u[3][0] = src[0].u64[3] >= src[1].u64[3] ? ~0U : 0U; +} + +static void +micro_u64max(union tgsi_double_channel *dst, + const union tgsi_double_channel *src) +{ + dst->u64[0] = src[0].u64[0] > src[1].u64[0] ? src[0].u64[0] : src[1].u64[0]; + dst->u64[1] = src[0].u64[1] > src[1].u64[1] ? src[0].u64[1] : src[1].u64[1]; + dst->u64[2] = src[0].u64[2] > src[1].u64[2] ? src[0].u64[2] : src[1].u64[2]; + dst->u64[3] = src[0].u64[3] > src[1].u64[3] ? src[0].u64[3] : src[1].u64[3]; +} + +static void +micro_i64max(union tgsi_double_channel *dst, + const union tgsi_double_channel *src) +{ + dst->i64[0] = src[0].i64[0] > src[1].i64[0] ? src[0].i64[0] : src[1].i64[0]; + dst->i64[1] = src[0].i64[1] > src[1].i64[1] ? src[0].i64[1] : src[1].i64[1]; + dst->i64[2] = src[0].i64[2] > src[1].i64[2] ? src[0].i64[2] : src[1].i64[2]; + dst->i64[3] = src[0].i64[3] > src[1].i64[3] ? src[0].i64[3] : src[1].i64[3]; +} + +static void +micro_u64min(union tgsi_double_channel *dst, + const union tgsi_double_channel *src) +{ + dst->u64[0] = src[0].u64[0] < src[1].u64[0] ? src[0].u64[0] : src[1].u64[0]; + dst->u64[1] = src[0].u64[1] < src[1].u64[1] ? src[0].u64[1] : src[1].u64[1]; + dst->u64[2] = src[0].u64[2] < src[1].u64[2] ? src[0].u64[2] : src[1].u64[2]; + dst->u64[3] = src[0].u64[3] < src[1].u64[3] ? src[0].u64[3] : src[1].u64[3]; +} + +static void +micro_i64min(union tgsi_double_channel *dst, + const union tgsi_double_channel *src) +{ + dst->i64[0] = src[0].i64[0] < src[1].i64[0] ? src[0].i64[0] : src[1].i64[0]; + dst->i64[1] = src[0].i64[1] < src[1].i64[1] ? src[0].i64[1] : src[1].i64[1]; + dst->i64[2] = src[0].i64[2] < src[1].i64[2] ? src[0].i64[2] : src[1].i64[2]; + dst->i64[3] = src[0].i64[3] < src[1].i64[3] ? src[0].i64[3] : src[1].i64[3]; +} + +static void +micro_u64add(union tgsi_double_channel *dst, + const union tgsi_double_channel *src) +{ + dst->u64[0] = src[0].u64[0] + src[1].u64[0]; + dst->u64[1] = src[0].u64[1] + src[1].u64[1]; + dst->u64[2] = src[0].u64[2] + src[1].u64[2]; + dst->u64[3] = src[0].u64[3] + src[1].u64[3]; +} + +static void +micro_u64mul(union tgsi_double_channel *dst, + const union tgsi_double_channel *src) +{ + dst->u64[0] = src[0].u64[0] * src[1].u64[0]; + dst->u64[1] = src[0].u64[1] * src[1].u64[1]; + dst->u64[2] = src[0].u64[2] * src[1].u64[2]; + dst->u64[3] = src[0].u64[3] * src[1].u64[3]; +} + +static void +micro_u64div(union tgsi_double_channel *dst, + const union tgsi_double_channel *src) +{ + dst->u64[0] = src[0].u64[0] / src[1].u64[0]; + dst->u64[1] = src[0].u64[1] / src[1].u64[1]; + dst->u64[2] = src[0].u64[2] / src[1].u64[2]; + dst->u64[3] = src[0].u64[3] / src[1].u64[3]; +} + +static void +micro_i64div(union tgsi_double_channel *dst, + const union tgsi_double_channel *src) +{ + dst->i64[0] = src[0].i64[0] / src[1].i64[0]; + dst->i64[1] = src[0].i64[1] / src[1].i64[1]; + dst->i64[2] = src[0].i64[2] / src[1].i64[2]; + dst->i64[3] = src[0].i64[3] / src[1].i64[3]; +} + +static void +micro_u64mod(union tgsi_double_channel *dst, + const union tgsi_double_channel *src) +{ + dst->u64[0] = src[0].u64[0] % src[1].u64[0]; + dst->u64[1] = src[0].u64[1] % src[1].u64[1]; + dst->u64[2] = src[0].u64[2] % src[1].u64[2]; + dst->u64[3] = src[0].u64[3] % src[1].u64[3]; +} + +static void +micro_i64mod(union tgsi_double_channel *dst, + const union tgsi_double_channel *src) +{ + dst->i64[0] = src[0].i64[0] % src[1].i64[0]; + dst->i64[1] = src[0].i64[1] % src[1].i64[1]; + dst->i64[2] = src[0].i64[2] % src[1].i64[2]; + dst->i64[3] = src[0].i64[3] % src[1].i64[3]; +} + +static void +micro_u64shl(union tgsi_double_channel *dst, + const union tgsi_double_channel *src0, + union tgsi_exec_channel *src1) +{ + unsigned masked_count; + masked_count = src1->u[0] & 0x3f; + dst->u64[0] = src0->u64[0] << masked_count; + masked_count = src1->u[1] & 0x3f; + dst->u64[1] = src0->u64[1] << masked_count; + masked_count = src1->u[2] & 0x3f; + dst->u64[2] = src0->u64[2] << masked_count; + masked_count = src1->u[3] & 0x3f; + dst->u64[3] = src0->u64[3] << masked_count; +} + +static void +micro_i64shr(union tgsi_double_channel *dst, + const union tgsi_double_channel *src0, + union tgsi_exec_channel *src1) +{ + unsigned masked_count; + masked_count = src1->u[0] & 0x3f; + dst->i64[0] = src0->i64[0] >> masked_count; + masked_count = src1->u[1] & 0x3f; + dst->i64[1] = src0->i64[1] >> masked_count; + masked_count = src1->u[2] & 0x3f; + dst->i64[2] = src0->i64[2] >> masked_count; + masked_count = src1->u[3] & 0x3f; + dst->i64[3] = src0->i64[3] >> masked_count; +} + +static void +micro_u64shr(union tgsi_double_channel *dst, + const union tgsi_double_channel *src0, + union tgsi_exec_channel *src1) +{ + unsigned masked_count; + masked_count = src1->u[0] & 0x3f; + dst->u64[0] = src0->u64[0] >> masked_count; + masked_count = src1->u[1] & 0x3f; + dst->u64[1] = src0->u64[1] >> masked_count; + masked_count = src1->u[2] & 0x3f; + dst->u64[2] = src0->u64[2] >> masked_count; + masked_count = src1->u[3] & 0x3f; + dst->u64[3] = src0->u64[3] >> masked_count; +} + enum tgsi_exec_datatype { TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_UINT, - TGSI_EXEC_DATA_DOUBLE + TGSI_EXEC_DATA_DOUBLE, + TGSI_EXEC_DATA_INT64, + TGSI_EXEC_DATA_UINT64, }; /* @@ -3396,6 +3648,16 @@ typedef void (* micro_dop)(union tgsi_double_channel *dst, const union tgsi_double_channel *src); +typedef void (* micro_dop_sop)(union tgsi_double_channel *dst, + const union tgsi_double_channel *src0, + union tgsi_exec_channel *src1); + +typedef void (* micro_dop_s)(union tgsi_double_channel *dst, + const union tgsi_exec_channel *src); + +typedef void (* micro_sop_d)(union tgsi_exec_channel *dst, + const union tgsi_double_channel *src); + static void fetch_double_channel(struct tgsi_exec_machine *mach, union tgsi_double_channel *chan, @@ -3548,131 +3810,6 @@ } static void -exec_f2d(struct tgsi_exec_machine *mach, - const struct tgsi_full_instruction *inst) -{ - union tgsi_exec_channel src; - union tgsi_double_channel dst; - - if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XY) == TGSI_WRITEMASK_XY) { - fetch_source(mach, &src, &inst->Src[0], TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT); - micro_f2d(&dst, &src); - store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_X, TGSI_CHAN_Y); - } - if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_ZW) == TGSI_WRITEMASK_ZW) { - fetch_source(mach, &src, &inst->Src[0], TGSI_CHAN_Y, TGSI_EXEC_DATA_FLOAT); - micro_f2d(&dst, &src); - store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_Z, TGSI_CHAN_W); - } -} - -static void -exec_d2f(struct tgsi_exec_machine *mach, - const struct tgsi_full_instruction *inst) -{ - union tgsi_double_channel src; - union tgsi_exec_channel dst; - int wm = inst->Dst[0].Register.WriteMask; - int i; - int bit; - for (i = 0; i < 2; i++) { - bit = ffs(wm); - if (bit) { - wm &= ~(1 << (bit - 1)); - if (i == 0) - fetch_double_channel(mach, &src, &inst->Src[0], TGSI_CHAN_X, TGSI_CHAN_Y); - else - fetch_double_channel(mach, &src, &inst->Src[0], TGSI_CHAN_Z, TGSI_CHAN_W); - micro_d2f(&dst, &src); - store_dest(mach, &dst, &inst->Dst[0], inst, bit - 1, TGSI_EXEC_DATA_FLOAT); - } - } -} - -static void -exec_i2d(struct tgsi_exec_machine *mach, - const struct tgsi_full_instruction *inst) -{ - union tgsi_exec_channel src; - union tgsi_double_channel dst; - - if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XY) == TGSI_WRITEMASK_XY) { - fetch_source(mach, &src, &inst->Src[0], TGSI_CHAN_X, TGSI_EXEC_DATA_INT); - micro_i2d(&dst, &src); - store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_X, TGSI_CHAN_Y); - } - if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_ZW) == TGSI_WRITEMASK_ZW) { - fetch_source(mach, &src, &inst->Src[0], TGSI_CHAN_Y, TGSI_EXEC_DATA_INT); - micro_i2d(&dst, &src); - store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_Z, TGSI_CHAN_W); - } -} - -static void -exec_d2i(struct tgsi_exec_machine *mach, - const struct tgsi_full_instruction *inst) -{ - union tgsi_double_channel src; - union tgsi_exec_channel dst; - int wm = inst->Dst[0].Register.WriteMask; - int i; - int bit; - for (i = 0; i < 2; i++) { - bit = ffs(wm); - if (bit) { - wm &= ~(1 << (bit - 1)); - if (i == 0) - fetch_double_channel(mach, &src, &inst->Src[0], TGSI_CHAN_X, TGSI_CHAN_Y); - else - fetch_double_channel(mach, &src, &inst->Src[0], TGSI_CHAN_Z, TGSI_CHAN_W); - micro_d2i(&dst, &src); - store_dest(mach, &dst, &inst->Dst[0], inst, bit - 1, TGSI_EXEC_DATA_INT); - } - } -} -static void -exec_u2d(struct tgsi_exec_machine *mach, - const struct tgsi_full_instruction *inst) -{ - union tgsi_exec_channel src; - union tgsi_double_channel dst; - - if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XY) == TGSI_WRITEMASK_XY) { - fetch_source(mach, &src, &inst->Src[0], TGSI_CHAN_X, TGSI_EXEC_DATA_UINT); - micro_u2d(&dst, &src); - store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_X, TGSI_CHAN_Y); - } - if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_ZW) == TGSI_WRITEMASK_ZW) { - fetch_source(mach, &src, &inst->Src[0], TGSI_CHAN_Y, TGSI_EXEC_DATA_UINT); - micro_u2d(&dst, &src); - store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_Z, TGSI_CHAN_W); - } -} - -static void -exec_d2u(struct tgsi_exec_machine *mach, - const struct tgsi_full_instruction *inst) -{ - union tgsi_double_channel src; - union tgsi_exec_channel dst; - int wm = inst->Dst[0].Register.WriteMask; - int i; - int bit; - for (i = 0; i < 2; i++) { - bit = ffs(wm); - if (bit) { - wm &= ~(1 << (bit - 1)); - if (i == 0) - fetch_double_channel(mach, &src, &inst->Src[0], TGSI_CHAN_X, TGSI_CHAN_Y); - else - fetch_double_channel(mach, &src, &inst->Src[0], TGSI_CHAN_Z, TGSI_CHAN_W); - micro_d2u(&dst, &src); - store_dest(mach, &dst, &inst->Dst[0], inst, bit - 1, TGSI_EXEC_DATA_UINT); - } - } -} - -static void exec_dldexp(struct tgsi_exec_machine *mach, const struct tgsi_full_instruction *inst) { @@ -3719,6 +3856,32 @@ } } +static void +exec_arg0_64_arg1_32(struct tgsi_exec_machine *mach, + const struct tgsi_full_instruction *inst, + micro_dop_sop op) +{ + union tgsi_double_channel src0; + union tgsi_exec_channel src1; + union tgsi_double_channel dst; + int wmask; + + wmask = inst->Dst[0].Register.WriteMask; + if (wmask & TGSI_WRITEMASK_XY) { + fetch_double_channel(mach, &src0, &inst->Src[0], TGSI_CHAN_X, TGSI_CHAN_Y); + fetch_source(mach, &src1, &inst->Src[1], TGSI_CHAN_X, TGSI_EXEC_DATA_INT); + op(&dst, &src0, &src1); + store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_X, TGSI_CHAN_Y); + } + + if (wmask & TGSI_WRITEMASK_ZW) { + fetch_double_channel(mach, &src0, &inst->Src[0], TGSI_CHAN_Z, TGSI_CHAN_W); + fetch_source(mach, &src1, &inst->Src[1], TGSI_CHAN_Z, TGSI_EXEC_DATA_INT); + op(&dst, &src0, &src1); + store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_Z, TGSI_CHAN_W); + } +} + static int get_image_coord_dim(unsigned tgsi_tex) { @@ -4302,6 +4465,152 @@ } static void +micro_f2u64(union tgsi_double_channel *dst, + const union tgsi_exec_channel *src) +{ + dst->u64[0] = (uint64_t)src->f[0]; + dst->u64[1] = (uint64_t)src->f[1]; + dst->u64[2] = (uint64_t)src->f[2]; + dst->u64[3] = (uint64_t)src->f[3]; +} + +static void +micro_f2i64(union tgsi_double_channel *dst, + const union tgsi_exec_channel *src) +{ + dst->i64[0] = (int64_t)src->f[0]; + dst->i64[1] = (int64_t)src->f[1]; + dst->i64[2] = (int64_t)src->f[2]; + dst->i64[3] = (int64_t)src->f[3]; +} + +static void +micro_u2i64(union tgsi_double_channel *dst, + const union tgsi_exec_channel *src) +{ + dst->u64[0] = (uint64_t)src->u[0]; + dst->u64[1] = (uint64_t)src->u[1]; + dst->u64[2] = (uint64_t)src->u[2]; + dst->u64[3] = (uint64_t)src->u[3]; +} + +static void +micro_i2i64(union tgsi_double_channel *dst, + const union tgsi_exec_channel *src) +{ + dst->i64[0] = (int64_t)src->i[0]; + dst->i64[1] = (int64_t)src->i[1]; + dst->i64[2] = (int64_t)src->i[2]; + dst->i64[3] = (int64_t)src->i[3]; +} + +static void +micro_d2u64(union tgsi_double_channel *dst, + const union tgsi_double_channel *src) +{ + dst->u64[0] = (uint64_t)src->d[0]; + dst->u64[1] = (uint64_t)src->d[1]; + dst->u64[2] = (uint64_t)src->d[2]; + dst->u64[3] = (uint64_t)src->d[3]; +} + +static void +micro_d2i64(union tgsi_double_channel *dst, + const union tgsi_double_channel *src) +{ + dst->i64[0] = (int64_t)src->d[0]; + dst->i64[1] = (int64_t)src->d[1]; + dst->i64[2] = (int64_t)src->d[2]; + dst->i64[3] = (int64_t)src->d[3]; +} + +static void +micro_u642d(union tgsi_double_channel *dst, + const union tgsi_double_channel *src) +{ + dst->d[0] = (double)src->u64[0]; + dst->d[1] = (double)src->u64[1]; + dst->d[2] = (double)src->u64[2]; + dst->d[3] = (double)src->u64[3]; +} + +static void +micro_i642d(union tgsi_double_channel *dst, + const union tgsi_double_channel *src) +{ + dst->d[0] = (double)src->i64[0]; + dst->d[1] = (double)src->i64[1]; + dst->d[2] = (double)src->i64[2]; + dst->d[3] = (double)src->i64[3]; +} + +static void +micro_u642f(union tgsi_exec_channel *dst, + const union tgsi_double_channel *src) +{ + dst->f[0] = (float)src->u64[0]; + dst->f[1] = (float)src->u64[1]; + dst->f[2] = (float)src->u64[2]; + dst->f[3] = (float)src->u64[3]; +} + +static void +micro_i642f(union tgsi_exec_channel *dst, + const union tgsi_double_channel *src) +{ + dst->f[0] = (float)src->i64[0]; + dst->f[1] = (float)src->i64[1]; + dst->f[2] = (float)src->i64[2]; + dst->f[3] = (float)src->i64[3]; +} + +static void +exec_t_2_64(struct tgsi_exec_machine *mach, + const struct tgsi_full_instruction *inst, + micro_dop_s op, + enum tgsi_exec_datatype src_datatype) +{ + union tgsi_exec_channel src; + union tgsi_double_channel dst; + + if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XY) == TGSI_WRITEMASK_XY) { + fetch_source(mach, &src, &inst->Src[0], TGSI_CHAN_X, src_datatype); + op(&dst, &src); + store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_X, TGSI_CHAN_Y); + } + if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_ZW) == TGSI_WRITEMASK_ZW) { + fetch_source(mach, &src, &inst->Src[0], TGSI_CHAN_Y, src_datatype); + op(&dst, &src); + store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_Z, TGSI_CHAN_W); + } +} + +static void +exec_64_2_t(struct tgsi_exec_machine *mach, + const struct tgsi_full_instruction *inst, + micro_sop_d op, + enum tgsi_exec_datatype dst_datatype) +{ + union tgsi_double_channel src; + union tgsi_exec_channel dst; + int wm = inst->Dst[0].Register.WriteMask; + int i; + int bit; + for (i = 0; i < 2; i++) { + bit = ffs(wm); + if (bit) { + wm &= ~(1 << (bit - 1)); + if (i == 0) + fetch_double_channel(mach, &src, &inst->Src[0], TGSI_CHAN_X, TGSI_CHAN_Y); + else + fetch_double_channel(mach, &src, &inst->Src[0], TGSI_CHAN_Z, TGSI_CHAN_W); + op(&dst, &src); + store_dest(mach, &dst, &inst->Dst[0], inst, bit - 1, dst_datatype); + } + } +} + +static void micro_i2f(union tgsi_exec_channel *dst, const union tgsi_exec_channel *src) { @@ -4909,10 +5218,6 @@ exec_vector_trinary(mach, inst, micro_mad, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT); break; - case TGSI_OPCODE_SUB: - exec_vector_binary(mach, inst, micro_sub, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT); - break; - case TGSI_OPCODE_LRP: exec_vector_trinary(mach, inst, micro_lrp, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT); break; @@ -4957,10 +5262,6 @@ exec_xpd(mach, inst); break; - case TGSI_OPCODE_ABS: - exec_vector_unary(mach, inst, micro_abs, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT); - break; - case TGSI_OPCODE_DPH: exec_dph(mach, inst); break; @@ -5148,6 +5449,10 @@ /* returning from main() */ mach->CondStackTop = 0; mach->LoopStackTop = 0; + mach->ContStackTop = 0; + mach->LoopLabelStackTop = 0; + mach->SwitchStackTop = 0; + mach->BreakStackTop = 0; *pc = -1; return FALSE; } @@ -5681,11 +5986,11 @@ break; case TGSI_OPCODE_F2D: - exec_f2d(mach, inst); + exec_t_2_64(mach, inst, micro_f2d, TGSI_EXEC_DATA_FLOAT); break; case TGSI_OPCODE_D2F: - exec_d2f(mach, inst); + exec_64_2_t(mach, inst, micro_d2f, TGSI_EXEC_DATA_FLOAT); break; case TGSI_OPCODE_DABS: @@ -5700,6 +6005,10 @@ exec_double_binary(mach, inst, micro_dadd, TGSI_EXEC_DATA_DOUBLE); break; + case TGSI_OPCODE_DDIV: + exec_double_binary(mach, inst, micro_ddiv, TGSI_EXEC_DATA_DOUBLE); + break; + case TGSI_OPCODE_DMUL: exec_double_binary(mach, inst, micro_dmul, TGSI_EXEC_DATA_DOUBLE); break; @@ -5757,19 +6066,19 @@ break; case TGSI_OPCODE_I2D: - exec_i2d(mach, inst); + exec_t_2_64(mach, inst, micro_i2d, TGSI_EXEC_DATA_INT); break; case TGSI_OPCODE_D2I: - exec_d2i(mach, inst); + exec_64_2_t(mach, inst, micro_d2i, TGSI_EXEC_DATA_INT); break; case TGSI_OPCODE_U2D: - exec_u2d(mach, inst); + exec_t_2_64(mach, inst, micro_u2d, TGSI_EXEC_DATA_UINT); break; case TGSI_OPCODE_D2U: - exec_d2u(mach, inst); + exec_64_2_t(mach, inst, micro_d2u, TGSI_EXEC_DATA_INT); break; case TGSI_OPCODE_LOAD: @@ -5800,6 +6109,118 @@ case TGSI_OPCODE_MEMBAR: return TRUE; break; + + case TGSI_OPCODE_I64ABS: + exec_double_unary(mach, inst, micro_i64abs); + break; + + case TGSI_OPCODE_I64SSG: + exec_double_unary(mach, inst, micro_i64sgn); + break; + + case TGSI_OPCODE_I64NEG: + exec_double_unary(mach, inst, micro_i64neg); + break; + + case TGSI_OPCODE_U64SEQ: + exec_double_binary(mach, inst, micro_u64seq, TGSI_EXEC_DATA_UINT); + break; + + case TGSI_OPCODE_U64SNE: + exec_double_binary(mach, inst, micro_u64sne, TGSI_EXEC_DATA_UINT); + break; + + case TGSI_OPCODE_I64SLT: + exec_double_binary(mach, inst, micro_i64slt, TGSI_EXEC_DATA_UINT); + break; + case TGSI_OPCODE_U64SLT: + exec_double_binary(mach, inst, micro_u64slt, TGSI_EXEC_DATA_UINT); + break; + + case TGSI_OPCODE_I64SGE: + exec_double_binary(mach, inst, micro_i64sge, TGSI_EXEC_DATA_UINT); + break; + case TGSI_OPCODE_U64SGE: + exec_double_binary(mach, inst, micro_u64sge, TGSI_EXEC_DATA_UINT); + break; + + case TGSI_OPCODE_I64MIN: + exec_double_binary(mach, inst, micro_i64min, TGSI_EXEC_DATA_INT64); + break; + case TGSI_OPCODE_U64MIN: + exec_double_binary(mach, inst, micro_u64min, TGSI_EXEC_DATA_UINT64); + break; + case TGSI_OPCODE_I64MAX: + exec_double_binary(mach, inst, micro_i64max, TGSI_EXEC_DATA_INT64); + break; + case TGSI_OPCODE_U64MAX: + exec_double_binary(mach, inst, micro_u64max, TGSI_EXEC_DATA_UINT64); + break; + case TGSI_OPCODE_U64ADD: + exec_double_binary(mach, inst, micro_u64add, TGSI_EXEC_DATA_UINT64); + break; + case TGSI_OPCODE_U64MUL: + exec_double_binary(mach, inst, micro_u64mul, TGSI_EXEC_DATA_UINT64); + break; + case TGSI_OPCODE_U64SHL: + exec_arg0_64_arg1_32(mach, inst, micro_u64shl); + break; + case TGSI_OPCODE_I64SHR: + exec_arg0_64_arg1_32(mach, inst, micro_i64shr); + break; + case TGSI_OPCODE_U64SHR: + exec_arg0_64_arg1_32(mach, inst, micro_u64shr); + break; + case TGSI_OPCODE_U64DIV: + exec_double_binary(mach, inst, micro_u64div, TGSI_EXEC_DATA_UINT64); + break; + case TGSI_OPCODE_I64DIV: + exec_double_binary(mach, inst, micro_i64div, TGSI_EXEC_DATA_INT64); + break; + case TGSI_OPCODE_U64MOD: + exec_double_binary(mach, inst, micro_u64mod, TGSI_EXEC_DATA_UINT64); + break; + case TGSI_OPCODE_I64MOD: + exec_double_binary(mach, inst, micro_i64mod, TGSI_EXEC_DATA_INT64); + break; + + case TGSI_OPCODE_F2U64: + exec_t_2_64(mach, inst, micro_f2u64, TGSI_EXEC_DATA_FLOAT); + break; + + case TGSI_OPCODE_F2I64: + exec_t_2_64(mach, inst, micro_f2i64, TGSI_EXEC_DATA_FLOAT); + break; + + case TGSI_OPCODE_U2I64: + exec_t_2_64(mach, inst, micro_u2i64, TGSI_EXEC_DATA_INT); + break; + case TGSI_OPCODE_I2I64: + exec_t_2_64(mach, inst, micro_i2i64, TGSI_EXEC_DATA_INT); + break; + + case TGSI_OPCODE_D2U64: + exec_double_unary(mach, inst, micro_d2u64); + break; + + case TGSI_OPCODE_D2I64: + exec_double_unary(mach, inst, micro_d2i64); + break; + + case TGSI_OPCODE_U642F: + exec_64_2_t(mach, inst, micro_u642f, TGSI_EXEC_DATA_FLOAT); + break; + case TGSI_OPCODE_I642F: + exec_64_2_t(mach, inst, micro_i642f, TGSI_EXEC_DATA_FLOAT); + break; + + case TGSI_OPCODE_U642D: + exec_double_unary(mach, inst, micro_u642d); + break; + case TGSI_OPCODE_I642D: + exec_double_unary(mach, inst, micro_i642d); + break; + default: assert( 0 ); } diff -Nru mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_exec.h mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_exec.h --- mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_exec.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_exec.h 2017-06-01 10:37:10.000000000 +0000 @@ -534,6 +534,7 @@ return 1; case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED: case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED: + case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: return 0; case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: return PIPE_MAX_SHADER_BUFFERS; diff -Nru mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_info.c mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_info.c --- mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_info.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_info.c 2017-06-01 10:37:10.000000000 +0000 @@ -54,13 +54,13 @@ { 1, 2, 0, 0, 0, 0, 0, COMP, "SLT", TGSI_OPCODE_SLT }, { 1, 2, 0, 0, 0, 0, 0, COMP, "SGE", TGSI_OPCODE_SGE }, { 1, 3, 0, 0, 0, 0, 0, COMP, "MAD", TGSI_OPCODE_MAD }, - { 1, 2, 0, 0, 0, 0, 0, COMP, "SUB", TGSI_OPCODE_SUB }, + { 1, 2, 0, 0, 0, 0, 0, COMP, "", 17 }, /* removed */ { 1, 3, 0, 0, 0, 0, 0, COMP, "LRP", TGSI_OPCODE_LRP }, { 1, 3, 0, 0, 0, 0, 0, COMP, "FMA", TGSI_OPCODE_FMA }, { 1, 1, 0, 0, 0, 0, 0, REPL, "SQRT", TGSI_OPCODE_SQRT }, { 1, 3, 0, 0, 0, 0, 0, REPL, "DP2A", TGSI_OPCODE_DP2A }, - { 0, 0, 0, 0, 0, 0, 0, NONE, "", 22 }, /* removed */ - { 0, 0, 0, 0, 0, 0, 0, NONE, "", 23 }, /* removed */ + { 1, 1, 0, 0, 0, 0, 0, COMP, "F2U64", TGSI_OPCODE_F2U64 }, + { 1, 1, 0, 0, 0, 0, 0, COMP, "F2I64", TGSI_OPCODE_F2I64 }, { 1, 1, 0, 0, 0, 0, 0, COMP, "FRC", TGSI_OPCODE_FRC }, { 1, 3, 0, 0, 0, 0, 0, COMP, "CLAMP", TGSI_OPCODE_CLAMP }, { 1, 1, 0, 0, 0, 0, 0, COMP, "FLR", TGSI_OPCODE_FLR }, @@ -69,9 +69,9 @@ { 1, 1, 0, 0, 0, 0, 0, REPL, "LG2", TGSI_OPCODE_LG2 }, { 1, 2, 0, 0, 0, 0, 0, REPL, "POW", TGSI_OPCODE_POW }, { 1, 2, 0, 0, 0, 0, 0, COMP, "XPD", TGSI_OPCODE_XPD }, - { 0, 0, 0, 0, 0, 0, 0, NONE, "", 32 }, /* removed */ - { 1, 1, 0, 0, 0, 0, 0, COMP, "ABS", TGSI_OPCODE_ABS }, - { 0, 0, 0, 0, 0, 0, 0, NONE, "", 34 }, /* removed */ + { 1, 1, 0, 0, 0, 0, 0, COMP, "U2I64", TGSI_OPCODE_U2I64 }, + { 1, 1, 0, 0, 0, 0, 0, COMP, "", 33 }, /* removed */ + { 1, 1, 0, 0, 0, 0, 0, COMP, "I2I64", TGSI_OPCODE_I2I64 }, { 1, 2, 0, 0, 0, 0, 0, REPL, "DPH", TGSI_OPCODE_DPH }, { 1, 1, 0, 0, 0, 0, 0, REPL, "COS", TGSI_OPCODE_COS }, { 1, 1, 0, 0, 0, 0, 0, COMP, "DDX", TGSI_OPCODE_DDX }, @@ -81,14 +81,14 @@ { 1, 1, 0, 0, 0, 0, 0, REPL, "PK2US", TGSI_OPCODE_PK2US }, { 1, 1, 0, 0, 0, 0, 0, REPL, "PK4B", TGSI_OPCODE_PK4B }, { 1, 1, 0, 0, 0, 0, 0, REPL, "PK4UB", TGSI_OPCODE_PK4UB }, - { 0, 1, 0, 0, 0, 0, 1, NONE, "", 44 }, /* removed */ + { 1, 1, 0, 0, 0, 0, 1, COMP, "D2U64", TGSI_OPCODE_D2U64 }, { 1, 2, 0, 0, 0, 0, 0, COMP, "SEQ", TGSI_OPCODE_SEQ }, - { 0, 1, 0, 0, 0, 0, 1, NONE, "", 46 }, /* removed */ + { 1, 1, 0, 0, 0, 0, 1, COMP, "D2I64", TGSI_OPCODE_D2I64 }, { 1, 2, 0, 0, 0, 0, 0, COMP, "SGT", TGSI_OPCODE_SGT }, { 1, 1, 0, 0, 0, 0, 0, REPL, "SIN", TGSI_OPCODE_SIN }, { 1, 2, 0, 0, 0, 0, 0, COMP, "SLE", TGSI_OPCODE_SLE }, { 1, 2, 0, 0, 0, 0, 0, COMP, "SNE", TGSI_OPCODE_SNE }, - { 0, 1, 0, 0, 0, 0, 1, NONE, "", 51 }, /* removed */ + { 1, 1, 0, 0, 0, 0, 1, COMP, "U642D", TGSI_OPCODE_U642D }, { 1, 2, 1, 0, 0, 0, 0, OTHR, "TEX", TGSI_OPCODE_TEX }, { 1, 4, 1, 0, 0, 0, 0, OTHR, "TXD", TGSI_OPCODE_TXD }, { 1, 2, 1, 0, 0, 0, 0, OTHR, "TXP", TGSI_OPCODE_TXP }, @@ -96,17 +96,17 @@ { 1, 1, 0, 0, 0, 0, 0, CHAN, "UP2US", TGSI_OPCODE_UP2US }, { 1, 1, 0, 0, 0, 0, 0, CHAN, "UP4B", TGSI_OPCODE_UP4B }, { 1, 1, 0, 0, 0, 0, 0, CHAN, "UP4UB", TGSI_OPCODE_UP4UB }, - { 0, 1, 0, 0, 0, 0, 1, NONE, "", 59 }, /* removed */ - { 0, 1, 0, 0, 0, 0, 1, NONE, "", 60 }, /* removed */ + { 1, 1, 0, 0, 0, 0, 1, COMP, "U642F", TGSI_OPCODE_U642F }, + { 1, 1, 0, 0, 0, 0, 1, COMP, "I642F", TGSI_OPCODE_I642F }, { 1, 1, 0, 0, 0, 0, 0, COMP, "ARR", TGSI_OPCODE_ARR }, - { 0, 1, 0, 0, 0, 0, 1, NONE, "", 62 }, /* removed */ + { 1, 1, 0, 0, 0, 0, 1, COMP, "I642D", TGSI_OPCODE_I642D }, { 0, 0, 0, 0, 1, 0, 0, NONE, "CAL", TGSI_OPCODE_CAL }, { 0, 0, 0, 0, 0, 0, 0, NONE, "RET", TGSI_OPCODE_RET }, { 1, 1, 0, 0, 0, 0, 0, COMP, "SSG", TGSI_OPCODE_SSG }, { 1, 3, 0, 0, 0, 0, 0, COMP, "CMP", TGSI_OPCODE_CMP }, { 1, 1, 0, 0, 0, 0, 0, CHAN, "SCS", TGSI_OPCODE_SCS }, { 1, 2, 1, 0, 0, 0, 0, OTHR, "TXB", TGSI_OPCODE_TXB }, - { 0, 1, 0, 0, 0, 0, 1, NONE, "", 69 }, /* removed */ + { 1, 1, 0, 0, 0, 0, 0, OTHR, "FBFETCH", TGSI_OPCODE_FBFETCH }, { 1, 2, 0, 0, 0, 0, 0, COMP, "DIV", TGSI_OPCODE_DIV }, { 1, 2, 0, 0, 0, 0, 0, REPL, "DP2", TGSI_OPCODE_DP2 }, { 1, 2, 1, 0, 0, 0, 0, OTHR, "TXL", TGSI_OPCODE_TXL }, @@ -262,6 +262,32 @@ { 1, 1, 0, 0, 0, 0, 0, COMP, "DFLR", TGSI_OPCODE_DFLR }, { 1, 1, 0, 0, 0, 0, 0, COMP, "DROUND", TGSI_OPCODE_DROUND }, { 1, 1, 0, 0, 0, 0, 0, COMP, "DSSG", TGSI_OPCODE_DSSG }, + { 1, 1, 0, 0, 0, 0, 0, COMP, "VOTE_ANY", TGSI_OPCODE_VOTE_ANY }, + { 1, 1, 0, 0, 0, 0, 0, COMP, "VOTE_ALL", TGSI_OPCODE_VOTE_ALL }, + { 1, 1, 0, 0, 0, 0, 0, COMP, "VOTE_EQ", TGSI_OPCODE_VOTE_EQ }, + { 1, 2, 0, 0, 0, 0, 0, COMP, "U64SEQ", TGSI_OPCODE_U64SEQ }, + { 1, 2, 0, 0, 0, 0, 0, COMP, "U64SNE", TGSI_OPCODE_U64SNE }, + { 1, 2, 0, 0, 0, 0, 0, COMP, "I64SLT", TGSI_OPCODE_I64SLT }, + { 1, 2, 0, 0, 0, 0, 0, COMP, "U64SLT", TGSI_OPCODE_U64SLT }, + { 1, 2, 0, 0, 0, 0, 0, COMP, "I64SGE", TGSI_OPCODE_I64SGE }, + { 1, 2, 0, 0, 0, 0, 0, COMP, "U64SGE", TGSI_OPCODE_U64SGE }, + { 1, 2, 0, 0, 0, 0, 0, COMP, "I64MIN", TGSI_OPCODE_I64MIN }, + { 1, 2, 0, 0, 0, 0, 0, COMP, "U64MIN", TGSI_OPCODE_U64MIN }, + { 1, 2, 0, 0, 0, 0, 0, COMP, "I64MAX", TGSI_OPCODE_I64MAX }, + { 1, 2, 0, 0, 0, 0, 0, COMP, "U64MAX", TGSI_OPCODE_U64MAX }, + { 1, 1, 0, 0, 0, 0, 0, COMP, "I64ABS", TGSI_OPCODE_I64ABS }, + { 1, 1, 0, 0, 0, 0, 0, COMP, "I64SSG", TGSI_OPCODE_I64SSG }, + { 1, 1, 0, 0, 0, 0, 0, COMP, "I64NEG", TGSI_OPCODE_I64NEG }, + { 1, 2, 0, 0, 0, 0, 0, COMP, "U64ADD", TGSI_OPCODE_U64ADD }, + { 1, 2, 0, 0, 0, 0, 0, COMP, "U64MUL", TGSI_OPCODE_U64MUL }, + { 1, 2, 0, 0, 0, 0, 0, COMP, "U64SHL", TGSI_OPCODE_U64SHL }, + { 1, 2, 0, 0, 0, 0, 0, COMP, "I64SHR", TGSI_OPCODE_I64SHR }, + { 1, 2, 0, 0, 0, 0, 0, COMP, "U64SHR", TGSI_OPCODE_U64SHR }, + { 1, 2, 0, 0, 0, 0, 0, COMP, "I64DIV", TGSI_OPCODE_I64DIV }, + { 1, 2, 0, 0, 0, 0, 0, COMP, "U64DIV", TGSI_OPCODE_U64DIV }, + { 1, 2, 0, 0, 0, 0, 0, COMP, "I64MOD", TGSI_OPCODE_I64MOD }, + { 1, 2, 0, 0, 0, 0, 0, COMP, "U64MOD", TGSI_OPCODE_U64MOD }, + { 1, 2, 0, 0, 0, 0, 0, COMP, "DDIV", TGSI_OPCODE_DDIV }, }; const struct tgsi_opcode_info * @@ -379,6 +405,12 @@ case TGSI_OPCODE_DSGE: case TGSI_OPCODE_DSLT: case TGSI_OPCODE_DSNE: + case TGSI_OPCODE_U64SEQ: + case TGSI_OPCODE_U64SNE: + case TGSI_OPCODE_U64SLT: + case TGSI_OPCODE_U64SGE: + case TGSI_OPCODE_I64SLT: + case TGSI_OPCODE_I64SGE: return TGSI_TYPE_SIGNED; case TGSI_OPCODE_DADD: case TGSI_OPCODE_DABS: @@ -386,6 +418,7 @@ case TGSI_OPCODE_DNEG: case TGSI_OPCODE_DMUL: case TGSI_OPCODE_DMAX: + case TGSI_OPCODE_DDIV: case TGSI_OPCODE_DMIN: case TGSI_OPCODE_DRCP: case TGSI_OPCODE_DSQRT: @@ -402,7 +435,33 @@ case TGSI_OPCODE_F2D: case TGSI_OPCODE_I2D: case TGSI_OPCODE_U2D: + case TGSI_OPCODE_U642D: + case TGSI_OPCODE_I642D: return TGSI_TYPE_DOUBLE; + case TGSI_OPCODE_U64MAX: + case TGSI_OPCODE_U64MIN: + case TGSI_OPCODE_U64ADD: + case TGSI_OPCODE_U64MUL: + case TGSI_OPCODE_U64DIV: + case TGSI_OPCODE_U64MOD: + case TGSI_OPCODE_U64SHL: + case TGSI_OPCODE_U64SHR: + case TGSI_OPCODE_F2U64: + case TGSI_OPCODE_D2U64: + return TGSI_TYPE_UNSIGNED64; + case TGSI_OPCODE_I64MAX: + case TGSI_OPCODE_I64MIN: + case TGSI_OPCODE_I64ABS: + case TGSI_OPCODE_I64SSG: + case TGSI_OPCODE_I64NEG: + case TGSI_OPCODE_I64SHR: + case TGSI_OPCODE_I64DIV: + case TGSI_OPCODE_I64MOD: + case TGSI_OPCODE_F2I64: + case TGSI_OPCODE_U2I64: + case TGSI_OPCODE_I2I64: + case TGSI_OPCODE_D2I64: + return TGSI_TYPE_SIGNED64; default: return TGSI_TYPE_FLOAT; } @@ -427,10 +486,13 @@ case TGSI_OPCODE_SAMPLE_I_MS: case TGSI_OPCODE_UMUL_HI: case TGSI_OPCODE_UP2H: + case TGSI_OPCODE_U2I64: + case TGSI_OPCODE_MEMBAR: return TGSI_TYPE_UNSIGNED; case TGSI_OPCODE_IMUL_HI: case TGSI_OPCODE_I2F: case TGSI_OPCODE_I2D: + case TGSI_OPCODE_I2I64: return TGSI_TYPE_SIGNED; case TGSI_OPCODE_ARL: case TGSI_OPCODE_ARR: @@ -443,6 +505,8 @@ case TGSI_OPCODE_FSLT: case TGSI_OPCODE_FSNE: case TGSI_OPCODE_UCMP: + case TGSI_OPCODE_F2U64: + case TGSI_OPCODE_F2I64: return TGSI_TYPE_FLOAT; case TGSI_OPCODE_D2F: case TGSI_OPCODE_D2U: @@ -451,7 +515,21 @@ case TGSI_OPCODE_DSGE: case TGSI_OPCODE_DSLT: case TGSI_OPCODE_DSNE: + case TGSI_OPCODE_D2U64: + case TGSI_OPCODE_D2I64: return TGSI_TYPE_DOUBLE; + case TGSI_OPCODE_U64SEQ: + case TGSI_OPCODE_U64SNE: + case TGSI_OPCODE_U64SLT: + case TGSI_OPCODE_U64SGE: + case TGSI_OPCODE_U642F: + case TGSI_OPCODE_U642D: + return TGSI_TYPE_UNSIGNED64; + case TGSI_OPCODE_I64SLT: + case TGSI_OPCODE_I64SGE: + case TGSI_OPCODE_I642F: + case TGSI_OPCODE_I642D: + return TGSI_TYPE_SIGNED64; default: return tgsi_opcode_infer_type(opcode); } diff -Nru mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_info.h mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_info.h --- mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_info.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_info.h 2017-06-01 10:37:10.000000000 +0000 @@ -98,9 +98,19 @@ TGSI_TYPE_UNSIGNED, TGSI_TYPE_SIGNED, TGSI_TYPE_FLOAT, - TGSI_TYPE_DOUBLE + TGSI_TYPE_DOUBLE, + TGSI_TYPE_UNSIGNED64, + TGSI_TYPE_SIGNED64, }; +static inline bool tgsi_type_is_64bit(enum tgsi_opcode_type type) +{ + if (type == TGSI_TYPE_DOUBLE || type == TGSI_TYPE_UNSIGNED64 || + type == TGSI_TYPE_SIGNED64) + return true; + return false; +} + enum tgsi_opcode_type tgsi_opcode_infer_src_type( uint opcode ); diff -Nru mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_lowering.c mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_lowering.c --- mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_lowering.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_lowering.c 2017-06-01 10:37:10.000000000 +0000 @@ -468,12 +468,13 @@ /* SUB dst, src, tmpA */ new_inst = tgsi_default_full_instruction(); - new_inst.Instruction.Opcode = TGSI_OPCODE_SUB; + new_inst.Instruction.Opcode = TGSI_OPCODE_ADD; new_inst.Instruction.NumDstRegs = 1; reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_XYZW); new_inst.Instruction.NumSrcRegs = 2; reg_src(&new_inst.Src[0], src, SWIZ(X, Y, Z, W)); reg_src(&new_inst.Src[1], &ctx->tmp[A].src, SWIZ(X, Y, Z, W)); + new_inst.Src[1].Register.Negate = 1; tctx->emit_instruction(tctx, &new_inst); } } @@ -689,12 +690,13 @@ /* SUB tmpA.x, src.x, tmpA.x */ new_inst = tgsi_default_full_instruction(); - new_inst.Instruction.Opcode = TGSI_OPCODE_SUB; + new_inst.Instruction.Opcode = TGSI_OPCODE_ADD; new_inst.Instruction.NumDstRegs = 1; reg_dst(&new_inst.Dst[0], &ctx->tmp[A].dst, TGSI_WRITEMASK_X); new_inst.Instruction.NumSrcRegs = 2; reg_src(&new_inst.Src[0], src, SWIZ(X, _, _, _)); reg_src(&new_inst.Src[1], &ctx->tmp[A].src, SWIZ(X, _, _, _)); + new_inst.Src[1].Register.Negate = 1; tctx->emit_instruction(tctx, &new_inst); } else { /* FLR tmpA.x, src.x */ @@ -722,12 +724,13 @@ if (dst->Register.WriteMask & TGSI_WRITEMASK_Y) { /* SUB dst.y, src.x, tmpA.x */ new_inst = tgsi_default_full_instruction(); - new_inst.Instruction.Opcode = TGSI_OPCODE_SUB; + new_inst.Instruction.Opcode = TGSI_OPCODE_ADD; new_inst.Instruction.NumDstRegs = 1; reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_Y); new_inst.Instruction.NumSrcRegs = 2; reg_src(&new_inst.Src[0], src, SWIZ(_, X, _, _)); reg_src(&new_inst.Src[1], &ctx->tmp[A].src, SWIZ(_, X, _, _)); + new_inst.Src[1].Register.Negate = 1; tctx->emit_instruction(tctx, &new_inst); } @@ -822,12 +825,13 @@ /* SUB tmpA.y, tmpA.x, tmpA.y */ new_inst = tgsi_default_full_instruction(); - new_inst.Instruction.Opcode = TGSI_OPCODE_SUB; + new_inst.Instruction.Opcode = TGSI_OPCODE_ADD; new_inst.Instruction.NumDstRegs = 1; reg_dst(&new_inst.Dst[0], &ctx->tmp[A].dst, TGSI_WRITEMASK_Y); new_inst.Instruction.NumSrcRegs = 2; reg_src(&new_inst.Src[0], &ctx->tmp[A].src, SWIZ(_, X, _, _)); reg_src(&new_inst.Src[1], &ctx->tmp[A].src, SWIZ(_, Y, _, _)); + new_inst.Src[1].Register.Negate = 1; tctx->emit_instruction(tctx, &new_inst); } else { /* FLR tmpA.y, tmpA.x */ @@ -1072,15 +1076,14 @@ /* FLR: SUB dst, src, tmpA CEIL: ADD dst, src, tmpA */ new_inst = tgsi_default_full_instruction(); - if (opcode == TGSI_OPCODE_CEIL) - new_inst.Instruction.Opcode = TGSI_OPCODE_ADD; - else - new_inst.Instruction.Opcode = TGSI_OPCODE_SUB; + new_inst.Instruction.Opcode = TGSI_OPCODE_ADD; new_inst.Instruction.NumDstRegs = 1; reg_dst(&new_inst.Dst[0], dst, TGSI_WRITEMASK_XYZW); new_inst.Instruction.NumSrcRegs = 2; reg_src(&new_inst.Src[0], src0, SWIZ(X, Y, Z, W)); reg_src(&new_inst.Src[1], &ctx->tmp[A].src, SWIZ(X, Y, Z, W)); + if (opcode == TGSI_OPCODE_FLR) + new_inst.Src[1].Register.Negate = 1; tctx->emit_instruction(tctx, &new_inst); } } @@ -1124,7 +1127,7 @@ tctx->emit_instruction(tctx, &new_inst); new_inst = tgsi_default_full_instruction(); - new_inst.Instruction.Opcode = TGSI_OPCODE_SUB; + new_inst.Instruction.Opcode = TGSI_OPCODE_ADD; new_inst.Instruction.NumDstRegs = 1; reg_dst(&new_inst.Dst[0], &ctx->tmp[A].dst, TGSI_WRITEMASK_XYZW); new_inst.Instruction.NumSrcRegs = 2; @@ -1132,6 +1135,7 @@ new_inst.Src[0].Register.Absolute = true; new_inst.Src[0].Register.Negate = false; reg_src(&new_inst.Src[1], &ctx->tmp[A].src, SWIZ(X, Y, Z, W)); + new_inst.Src[1].Register.Negate = 1; tctx->emit_instruction(tctx, &new_inst); } else { new_inst = tgsi_default_full_instruction(); diff -Nru mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h --- mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h 2017-06-01 10:37:10.000000000 +0000 @@ -73,7 +73,6 @@ OP12(SLT) OP12(SGE) OP13(MAD) -OP12(SUB) OP13(LRP) OP11(SQRT) OP13(DP2A) @@ -85,7 +84,6 @@ OP11(LG2) OP12(POW) OP12(XPD) -OP11(ABS) OP12(DPH) OP11(COS) OP11(DDX) diff -Nru mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_parse.c mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_parse.c --- mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_parse.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_parse.c 2017-06-01 10:37:10.000000000 +0000 @@ -155,12 +155,14 @@ break; case TGSI_IMM_UINT32: + case TGSI_IMM_UINT64: for (i = 0; i < imm_count; i++) { next_token(ctx, &imm->u[i].Uint); } break; case TGSI_IMM_INT32: + case TGSI_IMM_INT64: for (i = 0; i < imm_count; i++) { next_token(ctx, &imm->u[i].Int); } diff -Nru mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_point_sprite.c mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_point_sprite.c --- mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_point_sprite.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_point_sprite.c 2017-06-01 10:37:10.000000000 +0000 @@ -96,7 +96,7 @@ unsigned stream_out_point_pos:1; // set if to stream out original point pos unsigned aa_point:1; // set if doing aa point unsigned out_tmp_index[PIPE_MAX_SHADER_OUTPUTS]; - int max_generic; + int max_generic; // max generic semantic index }; static inline struct psprite_transform_context * @@ -133,7 +133,7 @@ else if (decl->Semantic.Name == TGSI_SEMANTIC_GENERIC && decl->Semantic.Index < 32) { ts->point_coord_decl |= 1 << decl->Semantic.Index; - ts->max_generic = MAX2(ts->max_generic, decl->Semantic.Index); + ts->max_generic = MAX2(ts->max_generic, (int)decl->Semantic.Index); } ts->num_out = MAX2(ts->num_out, decl->Range.Last + 1); } @@ -216,7 +216,7 @@ if (en & 0x1) { tgsi_transform_output_decl(ctx, ts->num_out++, TGSI_SEMANTIC_GENERIC, i, 0); - ts->max_generic = MAX2(ts->max_generic, i); + ts->max_generic = MAX2(ts->max_generic, (int)i); } } } @@ -295,7 +295,7 @@ tgsi_transform_op2_swz_inst(ctx, TGSI_OPCODE_MUL, TGSI_FILE_TEMPORARY, ts->point_scale_tmp, TGSI_WRITEMASK_X, TGSI_FILE_TEMPORARY, ts->point_size_tmp, TGSI_SWIZZLE_X, - TGSI_FILE_TEMPORARY, ts->point_pos_tmp, TGSI_SWIZZLE_W); + TGSI_FILE_TEMPORARY, ts->point_pos_tmp, TGSI_SWIZZLE_W, false); /* MUL point_scale.xy, point_scale.xx, inverseViewport.xy */ inst = tgsi_default_full_instruction(); @@ -323,15 +323,15 @@ TGSI_FILE_IMMEDIATE, ts->point_imm, TGSI_SWIZZLE_Y, TGSI_FILE_TEMPORARY, ts->point_size_tmp, - TGSI_SWIZZLE_X); + TGSI_SWIZZLE_X, false); - tgsi_transform_op2_swz_inst(ctx, TGSI_OPCODE_SUB, + tgsi_transform_op2_swz_inst(ctx, TGSI_OPCODE_ADD, TGSI_FILE_TEMPORARY, ts->point_coord_k, TGSI_WRITEMASK_X, TGSI_FILE_IMMEDIATE, ts->point_imm, TGSI_SWIZZLE_Z, TGSI_FILE_TEMPORARY, ts->point_coord_k, - TGSI_SWIZZLE_X); + TGSI_SWIZZLE_X, true); } @@ -442,13 +442,13 @@ tgsi_transform_op2_swz_inst(ctx, TGSI_OPCODE_MAX, TGSI_FILE_TEMPORARY, ts->point_size_tmp, TGSI_WRITEMASK_X, TGSI_FILE_TEMPORARY, ts->point_size_tmp, TGSI_SWIZZLE_X, - TGSI_FILE_IMMEDIATE, ts->point_imm, TGSI_SWIZZLE_Y); + TGSI_FILE_IMMEDIATE, ts->point_imm, TGSI_SWIZZLE_Y, false); /* MIN point_size_tmp.x, point_size_tmp.x, point_ivp.w */ tgsi_transform_op2_swz_inst(ctx, TGSI_OPCODE_MIN, TGSI_FILE_TEMPORARY, ts->point_size_tmp, TGSI_WRITEMASK_X, TGSI_FILE_TEMPORARY, ts->point_size_tmp, TGSI_SWIZZLE_X, - TGSI_FILE_CONSTANT, ts->point_ivp, TGSI_SWIZZLE_W); + TGSI_FILE_CONSTANT, ts->point_ivp, TGSI_SWIZZLE_W, false); } else if (inst->Dst[0].Register.File == TGSI_FILE_OUTPUT && inst->Dst[0].Register.Index == ts->point_pos_out) { diff -Nru mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_sanity.c mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_sanity.c --- mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_sanity.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_sanity.c 2017-06-01 10:37:10.000000000 +0000 @@ -559,6 +559,7 @@ const struct tgsi_token *tokens ) { struct sanity_check_ctx ctx; + boolean retval; ctx.iter.prolog = prolog; ctx.iter.iterate_instruction = iter_instruction; @@ -580,11 +581,12 @@ ctx.implied_array_size = 0; ctx.print = debug_get_option_print_sanity(); - if (!tgsi_iterate_shader( tokens, &ctx.iter )) - return FALSE; - + retval = tgsi_iterate_shader( tokens, &ctx.iter ); regs_hash_destroy(ctx.regs_decl); regs_hash_destroy(ctx.regs_used); regs_hash_destroy(ctx.regs_ind_used); + if (retval == FALSE) + return FALSE; + return ctx.errors == 0; } diff -Nru mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_scan.c mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_scan.c --- mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_scan.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_scan.c 2017-06-01 10:37:10.000000000 +0000 @@ -54,6 +54,16 @@ } +static bool +is_mem_query_inst(unsigned opcode) +{ + return opcode == TGSI_OPCODE_RESQ || + opcode == TGSI_OPCODE_TXQ || + opcode == TGSI_OPCODE_TXQS || + opcode == TGSI_OPCODE_TXQ_LZ || + opcode == TGSI_OPCODE_LODQ; +} + /** * Is the opcode a "true" texture instruction which samples from a * texture map? @@ -61,10 +71,7 @@ static bool is_texture_inst(unsigned opcode) { - return (opcode != TGSI_OPCODE_TXQ && - opcode != TGSI_OPCODE_TXQS && - opcode != TGSI_OPCODE_TXQ_LZ && - opcode != TGSI_OPCODE_LODQ && + return (!is_mem_query_inst(opcode) && tgsi_get_opcode_info(opcode)->is_tex); } @@ -96,12 +103,193 @@ static void +scan_src_operand(struct tgsi_shader_info *info, + const struct tgsi_full_instruction *fullinst, + const struct tgsi_full_src_register *src, + unsigned src_index, + unsigned usage_mask, + bool is_interp_instruction, + bool *is_mem_inst) +{ + int ind = src->Register.Index; + + /* Mark which inputs are effectively used */ + if (src->Register.File == TGSI_FILE_INPUT) { + if (src->Register.Indirect) { + for (ind = 0; ind < info->num_inputs; ++ind) { + info->input_usage_mask[ind] |= usage_mask; + } + } else { + assert(ind >= 0); + assert(ind < PIPE_MAX_SHADER_INPUTS); + info->input_usage_mask[ind] |= usage_mask; + } + + if (info->processor == PIPE_SHADER_FRAGMENT) { + unsigned name, index, input; + + if (src->Register.Indirect && src->Indirect.ArrayID) + input = info->input_array_first[src->Indirect.ArrayID]; + else + input = src->Register.Index; + + name = info->input_semantic_name[input]; + index = info->input_semantic_index[input]; + + if (name == TGSI_SEMANTIC_POSITION && + (src->Register.SwizzleX == TGSI_SWIZZLE_Z || + src->Register.SwizzleY == TGSI_SWIZZLE_Z || + src->Register.SwizzleZ == TGSI_SWIZZLE_Z || + src->Register.SwizzleW == TGSI_SWIZZLE_Z)) + info->reads_z = TRUE; + + if (name == TGSI_SEMANTIC_COLOR) { + unsigned mask = + (1 << src->Register.SwizzleX) | + (1 << src->Register.SwizzleY) | + (1 << src->Register.SwizzleZ) | + (1 << src->Register.SwizzleW); + + info->colors_read |= mask << (index * 4); + } + + /* Process only interpolated varyings. Don't include POSITION. + * Don't include integer varyings, because they are not + * interpolated. Don't process inputs interpolated by INTERP + * opcodes. Those are tracked separately. + */ + if ((!is_interp_instruction || src_index != 0) && + (name == TGSI_SEMANTIC_GENERIC || + name == TGSI_SEMANTIC_TEXCOORD || + name == TGSI_SEMANTIC_COLOR || + name == TGSI_SEMANTIC_BCOLOR || + name == TGSI_SEMANTIC_FOG || + name == TGSI_SEMANTIC_CLIPDIST)) { + switch (info->input_interpolate[input]) { + case TGSI_INTERPOLATE_COLOR: + case TGSI_INTERPOLATE_PERSPECTIVE: + switch (info->input_interpolate_loc[input]) { + case TGSI_INTERPOLATE_LOC_CENTER: + info->uses_persp_center = TRUE; + break; + case TGSI_INTERPOLATE_LOC_CENTROID: + info->uses_persp_centroid = TRUE; + break; + case TGSI_INTERPOLATE_LOC_SAMPLE: + info->uses_persp_sample = TRUE; + break; + } + break; + case TGSI_INTERPOLATE_LINEAR: + switch (info->input_interpolate_loc[input]) { + case TGSI_INTERPOLATE_LOC_CENTER: + info->uses_linear_center = TRUE; + break; + case TGSI_INTERPOLATE_LOC_CENTROID: + info->uses_linear_centroid = TRUE; + break; + case TGSI_INTERPOLATE_LOC_SAMPLE: + info->uses_linear_sample = TRUE; + break; + } + break; + /* TGSI_INTERPOLATE_CONSTANT doesn't do any interpolation. */ + } + } + } + } + + /* check for indirect register reads */ + if (src->Register.Indirect) { + info->indirect_files |= (1 << src->Register.File); + info->indirect_files_read |= (1 << src->Register.File); + + /* record indirect constant buffer indexing */ + if (src->Register.File == TGSI_FILE_CONSTANT) { + if (src->Register.Dimension) { + if (src->Dimension.Indirect) + info->const_buffers_indirect = info->const_buffers_declared; + else + info->const_buffers_indirect |= 1u << src->Dimension.Index; + } else { + info->const_buffers_indirect |= 1; + } + } + } + + if (src->Register.Dimension && src->Dimension.Indirect) + info->dim_indirect_files |= 1u << src->Register.File; + + /* Texture samplers */ + if (src->Register.File == TGSI_FILE_SAMPLER) { + const unsigned index = src->Register.Index; + + assert(fullinst->Instruction.Texture); + assert(index < ARRAY_SIZE(info->is_msaa_sampler)); + assert(index < PIPE_MAX_SAMPLERS); + + if (is_texture_inst(fullinst->Instruction.Opcode)) { + const unsigned target = fullinst->Texture.Texture; + assert(target < TGSI_TEXTURE_UNKNOWN); + /* for texture instructions, check that the texture instruction + * target matches the previous sampler view declaration (if there + * was one.) + */ + if (info->sampler_targets[index] == TGSI_TEXTURE_UNKNOWN) { + /* probably no sampler view declaration */ + info->sampler_targets[index] = target; + } else { + /* Make sure the texture instruction's sampler/target info + * agrees with the sampler view declaration. + */ + assert(info->sampler_targets[index] == target); + } + /* MSAA samplers */ + if (target == TGSI_TEXTURE_2D_MSAA || + target == TGSI_TEXTURE_2D_ARRAY_MSAA) { + info->is_msaa_sampler[src->Register.Index] = TRUE; + } + } + } + + if (is_memory_file(src->Register.File) && + !is_mem_query_inst(fullinst->Instruction.Opcode)) { + *is_mem_inst = true; + + if (tgsi_get_opcode_info(fullinst->Instruction.Opcode)->is_store) { + info->writes_memory = TRUE; + + if (src->Register.File == TGSI_FILE_IMAGE) { + if (src->Register.Indirect) + info->images_writemask = info->images_declared; + else + info->images_writemask |= 1 << src->Register.Index; + } else if (src->Register.File == TGSI_FILE_BUFFER) { + if (src->Register.Indirect) + info->shader_buffers_atomic = info->shader_buffers_declared; + else + info->shader_buffers_atomic |= 1 << src->Register.Index; + } + } else { + if (src->Register.File == TGSI_FILE_BUFFER) { + if (src->Register.Indirect) + info->shader_buffers_load = info->shader_buffers_declared; + else + info->shader_buffers_load |= 1 << src->Register.Index; + } + } + } +} + + +static void scan_instruction(struct tgsi_shader_info *info, const struct tgsi_full_instruction *fullinst, unsigned *current_depth) { unsigned i; bool is_mem_inst = false; + bool is_interp_instruction = false; assert(fullinst->Instruction.Opcode < TGSI_OPCODE_LAST); info->opcode_count[fullinst->Instruction.Opcode]++; @@ -127,6 +315,8 @@ const struct tgsi_full_src_register *src0 = &fullinst->Src[0]; unsigned input; + is_interp_instruction = true; + if (src0->Register.Indirect && src0->Indirect.ArrayID) input = info->input_array_first[src0->Indirect.ArrayID]; else @@ -173,97 +363,24 @@ info->uses_doubles = TRUE; for (i = 0; i < fullinst->Instruction.NumSrcRegs; i++) { - const struct tgsi_full_src_register *src = &fullinst->Src[i]; - int ind = src->Register.Index; - - /* Mark which inputs are effectively used */ - if (src->Register.File == TGSI_FILE_INPUT) { - unsigned usage_mask; - usage_mask = tgsi_util_get_inst_usage_mask(fullinst, i); - if (src->Register.Indirect) { - for (ind = 0; ind < info->num_inputs; ++ind) { - info->input_usage_mask[ind] |= usage_mask; - } - } else { - assert(ind >= 0); - assert(ind < PIPE_MAX_SHADER_INPUTS); - info->input_usage_mask[ind] |= usage_mask; - } - - if (info->processor == PIPE_SHADER_FRAGMENT && - !src->Register.Indirect) { - unsigned name = - info->input_semantic_name[src->Register.Index]; - unsigned index = - info->input_semantic_index[src->Register.Index]; - - if (name == TGSI_SEMANTIC_POSITION && - (src->Register.SwizzleX == TGSI_SWIZZLE_Z || - src->Register.SwizzleY == TGSI_SWIZZLE_Z || - src->Register.SwizzleZ == TGSI_SWIZZLE_Z || - src->Register.SwizzleW == TGSI_SWIZZLE_Z)) - info->reads_z = TRUE; - - if (name == TGSI_SEMANTIC_COLOR) { - unsigned mask = - (1 << src->Register.SwizzleX) | - (1 << src->Register.SwizzleY) | - (1 << src->Register.SwizzleZ) | - (1 << src->Register.SwizzleW); - - info->colors_read |= mask << (index * 4); - } - } - } - - /* check for indirect register reads */ - if (src->Register.Indirect) { - info->indirect_files |= (1 << src->Register.File); - info->indirect_files_read |= (1 << src->Register.File); - } - - /* Texture samplers */ - if (src->Register.File == TGSI_FILE_SAMPLER) { - const unsigned index = src->Register.Index; - - assert(fullinst->Instruction.Texture); - assert(index < ARRAY_SIZE(info->is_msaa_sampler)); - assert(index < PIPE_MAX_SAMPLERS); - - if (is_texture_inst(fullinst->Instruction.Opcode)) { - const unsigned target = fullinst->Texture.Texture; - assert(target < TGSI_TEXTURE_UNKNOWN); - /* for texture instructions, check that the texture instruction - * target matches the previous sampler view declaration (if there - * was one.) - */ - if (info->sampler_targets[index] == TGSI_TEXTURE_UNKNOWN) { - /* probably no sampler view declaration */ - info->sampler_targets[index] = target; - } else { - /* Make sure the texture instruction's sampler/target info - * agrees with the sampler view declaration. - */ - assert(info->sampler_targets[index] == target); - } - /* MSAA samplers */ - if (target == TGSI_TEXTURE_2D_MSAA || - target == TGSI_TEXTURE_2D_ARRAY_MSAA) { - info->is_msaa_sampler[src->Register.Index] = TRUE; - } - } - } - - if (is_memory_file(src->Register.File)) { - is_mem_inst = true; - - if (tgsi_get_opcode_info(fullinst->Instruction.Opcode)->is_store) { - info->writes_memory = TRUE; - - if (src->Register.File == TGSI_FILE_IMAGE && - !src->Register.Indirect) - info->images_writemask |= 1 << src->Register.Index; - } + scan_src_operand(info, fullinst, &fullinst->Src[i], i, + tgsi_util_get_inst_usage_mask(fullinst, i), + is_interp_instruction, &is_mem_inst); + } + + if (fullinst->Instruction.Texture) { + for (i = 0; i < fullinst->Texture.NumOffsets; i++) { + struct tgsi_full_src_register src = {{0}}; + + src.Register.File = fullinst->TexOffsets[i].File; + src.Register.Index = fullinst->TexOffsets[i].Index; + src.Register.SwizzleX = fullinst->TexOffsets[i].SwizzleX; + src.Register.SwizzleY = fullinst->TexOffsets[i].SwizzleY; + src.Register.SwizzleZ = fullinst->TexOffsets[i].SwizzleZ; + + /* The usage mask is suboptimal but should be safe. */ + scan_src_operand(info, fullinst, &src, 0, TGSI_WRITEMASK_XYZ, + false, &is_mem_inst); } } @@ -275,15 +392,26 @@ info->indirect_files_written |= (1 << dst->Register.File); } + if (dst->Register.Dimension && dst->Dimension.Indirect) + info->dim_indirect_files |= 1u << dst->Register.File; + if (is_memory_file(dst->Register.File)) { assert(fullinst->Instruction.Opcode == TGSI_OPCODE_STORE); is_mem_inst = true; info->writes_memory = TRUE; - if (dst->Register.File == TGSI_FILE_IMAGE && - !dst->Register.Indirect) - info->images_writemask |= 1 << dst->Register.Index; + if (dst->Register.File == TGSI_FILE_IMAGE) { + if (dst->Register.Indirect) + info->images_writemask = info->images_declared; + else + info->images_writemask |= 1 << dst->Register.Index; + } else if (dst->Register.File == TGSI_FILE_BUFFER) { + if (dst->Register.Indirect) + info->shader_buffers_store = info->shader_buffers_declared; + else + info->shader_buffers_store |= 1 << dst->Register.Index; + } } } @@ -327,22 +455,37 @@ unsigned semName = fulldecl->Semantic.Name; unsigned semIndex = fulldecl->Semantic.Index + (reg - fulldecl->Range.First); + int buffer; + unsigned index, target, type; /* only first 32 regs will appear in this bitfield */ info->file_mask[file] |= (1 << reg); info->file_count[file]++; info->file_max[file] = MAX2(info->file_max[file], (int)reg); - if (file == TGSI_FILE_CONSTANT) { - int buffer = 0; + switch (file) { + case TGSI_FILE_CONSTANT: + buffer = 0; if (fulldecl->Declaration.Dimension) buffer = fulldecl->Dim.Index2D; info->const_file_max[buffer] = MAX2(info->const_file_max[buffer], (int)reg); - } - else if (file == TGSI_FILE_INPUT) { + info->const_buffers_declared |= 1u << buffer; + break; + + case TGSI_FILE_IMAGE: + info->images_declared |= 1u << reg; + if (fulldecl->Image.Resource == TGSI_TEXTURE_BUFFER) + info->images_buffers |= 1 << reg; + break; + + case TGSI_FILE_BUFFER: + info->shader_buffers_declared |= 1u << reg; + break; + + case TGSI_FILE_INPUT: info->input_semantic_name[reg] = (ubyte) semName; info->input_semantic_index[reg] = (ubyte) semIndex; info->input_interpolate[reg] = (ubyte)fulldecl->Interp.Interpolate; @@ -350,54 +493,7 @@ info->input_cylindrical_wrap[reg] = (ubyte)fulldecl->Interp.CylindricalWrap; /* Vertex shaders can have inputs with holes between them. */ - if (info->processor == PIPE_SHADER_VERTEX) - info->num_inputs = MAX2(info->num_inputs, reg + 1); - else { - info->num_inputs++; - assert(reg < info->num_inputs); - } - - /* Only interpolated varyings. Don't include POSITION. - * Don't include integer varyings, because they are not - * interpolated. - */ - if (semName == TGSI_SEMANTIC_GENERIC || - semName == TGSI_SEMANTIC_TEXCOORD || - semName == TGSI_SEMANTIC_COLOR || - semName == TGSI_SEMANTIC_BCOLOR || - semName == TGSI_SEMANTIC_FOG || - semName == TGSI_SEMANTIC_CLIPDIST) { - switch (fulldecl->Interp.Interpolate) { - case TGSI_INTERPOLATE_COLOR: - case TGSI_INTERPOLATE_PERSPECTIVE: - switch (fulldecl->Interp.Location) { - case TGSI_INTERPOLATE_LOC_CENTER: - info->uses_persp_center = TRUE; - break; - case TGSI_INTERPOLATE_LOC_CENTROID: - info->uses_persp_centroid = TRUE; - break; - case TGSI_INTERPOLATE_LOC_SAMPLE: - info->uses_persp_sample = TRUE; - break; - } - break; - case TGSI_INTERPOLATE_LINEAR: - switch (fulldecl->Interp.Location) { - case TGSI_INTERPOLATE_LOC_CENTER: - info->uses_linear_center = TRUE; - break; - case TGSI_INTERPOLATE_LOC_CENTROID: - info->uses_linear_centroid = TRUE; - break; - case TGSI_INTERPOLATE_LOC_SAMPLE: - info->uses_linear_sample = TRUE; - break; - } - break; - /* TGSI_INTERPOLATE_CONSTANT doesn't do any interpolation. */ - } - } + info->num_inputs = MAX2(info->num_inputs, reg + 1); if (semName == TGSI_SEMANTIC_PRIMID) info->uses_primid = TRUE; @@ -407,9 +503,10 @@ else if (semName == TGSI_SEMANTIC_FACE) info->uses_frontface = TRUE; } - } - else if (file == TGSI_FILE_SYSTEM_VALUE) { - unsigned index = fulldecl->Range.First; + break; + + case TGSI_FILE_SYSTEM_VALUE: + index = fulldecl->Range.First; info->system_value_semantic_name[index] = semName; info->num_system_values = MAX2(info->num_system_values, index + 1); @@ -443,71 +540,88 @@ info->reads_samplemask = TRUE; break; } - } - else if (file == TGSI_FILE_OUTPUT) { + break; + + case TGSI_FILE_OUTPUT: info->output_semantic_name[reg] = (ubyte) semName; info->output_semantic_index[reg] = (ubyte) semIndex; - info->num_outputs++; - assert(reg < info->num_outputs); - - if (semName == TGSI_SEMANTIC_COLOR) - info->colors_written |= 1 << semIndex; + info->output_usagemask[reg] |= fulldecl->Declaration.UsageMask; + info->num_outputs = MAX2(info->num_outputs, reg + 1); - if (procType == PIPE_SHADER_VERTEX || - procType == PIPE_SHADER_GEOMETRY || - procType == PIPE_SHADER_TESS_CTRL || - procType == PIPE_SHADER_TESS_EVAL) { - switch (semName) { - case TGSI_SEMANTIC_VIEWPORT_INDEX: - info->writes_viewport_index = TRUE; - break; - case TGSI_SEMANTIC_LAYER: - info->writes_layer = TRUE; - break; - case TGSI_SEMANTIC_PSIZE: - info->writes_psize = TRUE; - break; - case TGSI_SEMANTIC_CLIPVERTEX: - info->writes_clipvertex = TRUE; - break; - } + if (fulldecl->Declaration.UsageMask & TGSI_WRITEMASK_X) { + info->output_streams[reg] |= (ubyte)fulldecl->Semantic.StreamX; + info->num_stream_output_components[fulldecl->Semantic.StreamX]++; + } + if (fulldecl->Declaration.UsageMask & TGSI_WRITEMASK_Y) { + info->output_streams[reg] |= (ubyte)fulldecl->Semantic.StreamY << 2; + info->num_stream_output_components[fulldecl->Semantic.StreamY]++; + } + if (fulldecl->Declaration.UsageMask & TGSI_WRITEMASK_Z) { + info->output_streams[reg] |= (ubyte)fulldecl->Semantic.StreamZ << 4; + info->num_stream_output_components[fulldecl->Semantic.StreamZ]++; + } + if (fulldecl->Declaration.UsageMask & TGSI_WRITEMASK_W) { + info->output_streams[reg] |= (ubyte)fulldecl->Semantic.StreamW << 6; + info->num_stream_output_components[fulldecl->Semantic.StreamW]++; } - if (procType == PIPE_SHADER_FRAGMENT) { - switch (semName) { - case TGSI_SEMANTIC_POSITION: - info->writes_z = TRUE; - break; - case TGSI_SEMANTIC_STENCIL: - info->writes_stencil = TRUE; - break; - case TGSI_SEMANTIC_SAMPLEMASK: - info->writes_samplemask = TRUE; - break; - } + switch (semName) { + case TGSI_SEMANTIC_PRIMID: + info->writes_primid = true; + break; + case TGSI_SEMANTIC_VIEWPORT_INDEX: + info->writes_viewport_index = true; + break; + case TGSI_SEMANTIC_LAYER: + info->writes_layer = true; + break; + case TGSI_SEMANTIC_PSIZE: + info->writes_psize = true; + break; + case TGSI_SEMANTIC_CLIPVERTEX: + info->writes_clipvertex = true; + break; + case TGSI_SEMANTIC_COLOR: + info->colors_written |= 1 << semIndex; + break; + case TGSI_SEMANTIC_STENCIL: + info->writes_stencil = true; + break; + case TGSI_SEMANTIC_SAMPLEMASK: + info->writes_samplemask = true; + break; + case TGSI_SEMANTIC_EDGEFLAG: + info->writes_edgeflag = true; + break; + case TGSI_SEMANTIC_POSITION: + if (procType == PIPE_SHADER_FRAGMENT) + info->writes_z = true; + else + info->writes_position = true; + break; } + break; - if (procType == PIPE_SHADER_VERTEX) { - if (semName == TGSI_SEMANTIC_EDGEFLAG) { - info->writes_edgeflag = TRUE; - } - } - } else if (file == TGSI_FILE_SAMPLER) { + case TGSI_FILE_SAMPLER: STATIC_ASSERT(sizeof(info->samplers_declared) * 8 >= PIPE_MAX_SAMPLERS); info->samplers_declared |= 1u << reg; - } else if (file == TGSI_FILE_SAMPLER_VIEW) { - unsigned target = fulldecl->SamplerView.Resource; + break; + + case TGSI_FILE_SAMPLER_VIEW: + target = fulldecl->SamplerView.Resource; + type = fulldecl->SamplerView.ReturnTypeX; + assert(target < TGSI_TEXTURE_UNKNOWN); if (info->sampler_targets[reg] == TGSI_TEXTURE_UNKNOWN) { /* Save sampler target for this sampler index */ info->sampler_targets[reg] = target; + info->sampler_type[reg] = type; } else { /* if previously declared, make sure targets agree */ assert(info->sampler_targets[reg] == target); + assert(info->sampler_type[reg] == type); } - } else if (file == TGSI_FILE_IMAGE) { - if (fulldecl->Image.Resource == TGSI_TEXTURE_BUFFER) - info->images_buffers |= 1 << reg; + break; } } } @@ -635,6 +749,82 @@ tgsi_parse_free(&parse); } +/** + * Collect information about the arrays of a given register file. + * + * @param tokens TGSI shader + * @param file the register file to scan through + * @param max_array_id number of entries in @p arrays; should be equal to the + * highest array id, i.e. tgsi_shader_info::array_max[file]. + * @param arrays info for array of each ID will be written to arrays[ID - 1]. + */ +void +tgsi_scan_arrays(const struct tgsi_token *tokens, + unsigned file, + unsigned max_array_id, + struct tgsi_array_info *arrays) +{ + struct tgsi_parse_context parse; + + if (tgsi_parse_init(&parse, tokens) != TGSI_PARSE_OK) { + debug_printf("tgsi_parse_init() failed in tgsi_scan_arrays()!\n"); + return; + } + + memset(arrays, 0, sizeof(arrays[0]) * max_array_id); + + while (!tgsi_parse_end_of_tokens(&parse)) { + struct tgsi_full_instruction *inst; + + tgsi_parse_token(&parse); + + if (parse.FullToken.Token.Type == TGSI_TOKEN_TYPE_DECLARATION) { + struct tgsi_full_declaration *decl = &parse.FullToken.FullDeclaration; + + if (decl->Declaration.Array && decl->Declaration.File == file && + decl->Array.ArrayID > 0 && decl->Array.ArrayID <= max_array_id) { + struct tgsi_array_info *array = &arrays[decl->Array.ArrayID - 1]; + assert(!array->declared); + array->declared = true; + array->range = decl->Range; + } + } + + if (parse.FullToken.Token.Type != TGSI_TOKEN_TYPE_INSTRUCTION) + continue; + + inst = &parse.FullToken.FullInstruction; + for (unsigned i = 0; i < inst->Instruction.NumDstRegs; i++) { + const struct tgsi_full_dst_register *dst = &inst->Dst[i]; + if (dst->Register.File != file) + continue; + + if (dst->Register.Indirect) { + if (dst->Indirect.ArrayID > 0 && + dst->Indirect.ArrayID <= max_array_id) { + arrays[dst->Indirect.ArrayID - 1].writemask |= dst->Register.WriteMask; + } else { + /* Indirect writes without an ArrayID can write anywhere. */ + for (unsigned j = 0; j < max_array_id; ++j) + arrays[j].writemask |= dst->Register.WriteMask; + } + } else { + /* Check whether the write falls into any of the arrays anyway. */ + for (unsigned j = 0; j < max_array_id; ++j) { + struct tgsi_array_info *array = &arrays[j]; + if (array->declared && + dst->Register.Index >= array->range.First && + dst->Register.Index <= array->range.Last) + array->writemask |= dst->Register.WriteMask; + } + } + } + } + + tgsi_parse_free(&parse); + + return; +} /** diff -Nru mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_scan.h mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_scan.h --- mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_scan.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_scan.h 2017-06-01 10:37:10.000000000 +0000 @@ -54,6 +54,8 @@ ubyte input_cylindrical_wrap[PIPE_MAX_SHADER_INPUTS]; ubyte output_semantic_name[PIPE_MAX_SHADER_OUTPUTS]; /**< TGSI_SEMANTIC_x */ ubyte output_semantic_index[PIPE_MAX_SHADER_OUTPUTS]; + ubyte output_usagemask[PIPE_MAX_SHADER_OUTPUTS]; + ubyte output_streams[PIPE_MAX_SHADER_OUTPUTS]; ubyte num_system_values; ubyte system_value_semantic_name[PIPE_MAX_SHADER_INPUTS]; @@ -64,8 +66,11 @@ uint file_count[TGSI_FILE_COUNT]; /**< number of declared registers */ int file_max[TGSI_FILE_COUNT]; /**< highest index of declared registers */ int const_file_max[PIPE_MAX_CONSTANT_BUFFERS]; + unsigned const_buffers_declared; /**< bitmask of declared const buffers */ unsigned samplers_declared; /**< bitmask of declared samplers */ ubyte sampler_targets[PIPE_MAX_SHADER_SAMPLER_VIEWS]; /**< TGSI_TEXTURE_x values */ + ubyte sampler_type[PIPE_MAX_SHADER_SAMPLER_VIEWS]; /**< TGSI_RETURN_TYPE_x */ + ubyte num_stream_output_components[4]; ubyte input_array_first[PIPE_MAX_SHADER_INPUTS]; ubyte input_array_last[PIPE_MAX_SHADER_INPUTS]; @@ -108,8 +113,10 @@ boolean uses_primid; boolean uses_frontface; boolean uses_invocationid; + boolean writes_position; boolean writes_psize; boolean writes_clipvertex; + boolean writes_primid; boolean writes_viewport_index; boolean writes_layer; boolean writes_memory; /**< contains stores or atomics to buffers or images */ @@ -120,6 +127,8 @@ unsigned culldist_writemask; unsigned num_written_culldistance; unsigned num_written_clipdistance; + + unsigned images_declared; /**< bitmask of declared images */ /** * Bitmask indicating which images are written to (STORE / ATOM*). * Indirect image accesses are not reflected in this mask. @@ -129,6 +138,10 @@ * Bitmask indicating which declared image is a buffer. */ unsigned images_buffers; + unsigned shader_buffers_declared; /**< bitmask of declared shader buffers */ + unsigned shader_buffers_load; /**< bitmask of shader buffers using loads */ + unsigned shader_buffers_store; /**< bitmask of shader buffers using stores */ + unsigned shader_buffers_atomic; /**< bitmask of shader buffers using atomics */ /** * Bitmask indicating which register files are accessed with * indirect addressing. The bits are (1 << TGSI_FILE_x), etc. @@ -140,6 +153,8 @@ */ unsigned indirect_files_read; unsigned indirect_files_written; + unsigned dim_indirect_files; /**< shader resource indexing */ + unsigned const_buffers_indirect; /**< const buffers using indirect addressing */ unsigned properties[TGSI_PROPERTY_COUNT]; /* index with TGSI_PROPERTY_ */ @@ -149,10 +164,27 @@ unsigned max_depth; }; +struct tgsi_array_info +{ + /** Whether an array with this ID was declared. */ + bool declared; + + /** The OR of all writemasks used to write to this array. */ + ubyte writemask; + + /** The range with which the array was declared. */ + struct tgsi_declaration_range range; +}; + extern void tgsi_scan_shader(const struct tgsi_token *tokens, struct tgsi_shader_info *info); +void +tgsi_scan_arrays(const struct tgsi_token *tokens, + unsigned file, + unsigned max_array_id, + struct tgsi_array_info *arrays); extern boolean tgsi_is_passthrough_shader(const struct tgsi_token *tokens); diff -Nru mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_strings.c mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_strings.c --- mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_strings.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_strings.c 2017-06-01 10:37:10.000000000 +0000 @@ -99,6 +99,7 @@ "HELPER_INVOCATION", "BASEINSTANCE", "DRAWID", + "WORK_DIM", }; const char *tgsi_texture_names[TGSI_TEXTURE_COUNT] = diff -Nru mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_text.c mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_text.c --- mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_text.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_text.c 2017-06-01 10:37:10.000000000 +0000 @@ -208,14 +208,17 @@ return FALSE; } -static boolean parse_identifier( const char **pcur, char *ret ) +static boolean parse_identifier( const char **pcur, char *ret, size_t len ) { const char *cur = *pcur; int i = 0; if (is_alpha_underscore( cur )) { ret[i++] = *cur++; - while (is_alpha_underscore( cur ) || is_digit( cur )) + while (is_alpha_underscore( cur ) || is_digit( cur )) { + if (i == len - 1) + return FALSE; ret[i++] = *cur++; + } ret[i++] = '\0'; *pcur = cur; return TRUE; @@ -295,6 +298,42 @@ return TRUE; } +static boolean parse_int64( const char **pcur, uint32_t *val0, uint32_t *val1) +{ + const char *cur = *pcur; + union { + int64_t i64val; + uint32_t uval[2]; + } v; + + v.i64val = strtoll(cur, (char**)pcur, 0); + if (*pcur == cur) + return FALSE; + + *val0 = v.uval[0]; + *val1 = v.uval[1]; + + return TRUE; +} + +static boolean parse_uint64( const char **pcur, uint32_t *val0, uint32_t *val1) +{ + const char *cur = *pcur; + union { + uint64_t u64val; + uint32_t uval[2]; + } v; + + v.u64val = strtoull(cur, (char**)pcur, 0); + if (*pcur == cur) + return FALSE; + + *val0 = v.uval[0]; + *val1 = v.uval[1]; + + return TRUE; +} + struct translate_ctx { const char *text; @@ -1228,6 +1267,14 @@ ret = parse_double(&ctx->cur, &values[i].Uint, &values[i+1].Uint); i++; break; + case TGSI_IMM_INT64: + ret = parse_int64(&ctx->cur, &values[i].Uint, &values[i+1].Uint); + i++; + break; + case TGSI_IMM_UINT64: + ret = parse_uint64(&ctx->cur, &values[i].Uint, &values[i+1].Uint); + i++; + break; case TGSI_IMM_FLOAT32: ret = parse_float(&ctx->cur, &values[i].Float); break; @@ -1502,6 +1549,54 @@ cur = ctx->cur; eat_opt_white( &cur ); + if (*cur == ',' && + file == TGSI_FILE_OUTPUT && ctx->processor == PIPE_SHADER_GEOMETRY) { + cur++; + eat_opt_white(&cur); + if (str_match_nocase_whole(&cur, "STREAM")) { + uint stream[4]; + + eat_opt_white(&cur); + if (*cur != '(') { + report_error(ctx, "Expected '('"); + return FALSE; + } + cur++; + + for (int i = 0; i < 4; ++i) { + eat_opt_white(&cur); + if (!parse_uint(&cur, &stream[i])) { + report_error(ctx, "Expected literal integer"); + return FALSE; + } + + eat_opt_white(&cur); + if (i < 3) { + if (*cur != ',') { + report_error(ctx, "Expected ','"); + return FALSE; + } + cur++; + } + } + + if (*cur != ')') { + report_error(ctx, "Expected ')'"); + return FALSE; + } + cur++; + + decl.Semantic.StreamX = stream[0]; + decl.Semantic.StreamY = stream[1]; + decl.Semantic.StreamZ = stream[2]; + decl.Semantic.StreamW = stream[3]; + + ctx->cur = cur; + } + } + + cur = ctx->cur; + eat_opt_white( &cur ); if (*cur == ',' && !is_vs_input) { uint i; @@ -1695,7 +1790,7 @@ report_error( ctx, "Syntax error" ); return FALSE; } - if (!parse_identifier( &ctx->cur, id )) { + if (!parse_identifier( &ctx->cur, id, sizeof(id) )) { report_error( ctx, "Syntax error" ); return FALSE; } diff -Nru mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_transform.h mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_transform.h --- mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_transform.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_transform.h 2017-06-01 10:37:10.000000000 +0000 @@ -281,7 +281,8 @@ unsigned src0_file, unsigned src0_index, unsigned src1_file, - unsigned src1_index) + unsigned src1_index, + bool src1_negate) { struct tgsi_full_instruction inst; @@ -296,6 +297,7 @@ inst.Src[0].Register.Index = src0_index; inst.Src[1].Register.File = src1_file; inst.Src[1].Register.Index = src1_index; + inst.Src[1].Register.Negate = src1_negate; ctx->emit_instruction(ctx, &inst); } @@ -388,7 +390,8 @@ unsigned src0_swizzle, unsigned src1_file, unsigned src1_index, - unsigned src1_swizzle) + unsigned src1_swizzle, + bool src1_negate) { struct tgsi_full_instruction inst; @@ -403,6 +406,7 @@ inst.Src[0].Register.Index = src0_index; inst.Src[1].Register.File = src1_file; inst.Src[1].Register.Index = src1_index; + inst.Src[1].Register.Negate = src1_negate; switch (dst_writemask) { case TGSI_WRITEMASK_X: inst.Src[0].Register.SwizzleX = src0_swizzle; diff -Nru mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_ureg.c mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_ureg.c --- mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_ureg.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_ureg.c 2017-06-01 10:37:10.000000000 +0000 @@ -77,9 +77,9 @@ unsigned count; }; -#define UREG_MAX_INPUT PIPE_MAX_SHADER_INPUTS +#define UREG_MAX_INPUT (4 * PIPE_MAX_SHADER_INPUTS) #define UREG_MAX_SYSTEM_VALUE PIPE_MAX_ATTRIBS -#define UREG_MAX_OUTPUT PIPE_MAX_SHADER_OUTPUTS +#define UREG_MAX_OUTPUT (4 * PIPE_MAX_SHADER_OUTPUTS) #define UREG_MAX_CONSTANT_RANGE 32 #define UREG_MAX_IMMEDIATE 4096 #define UREG_MAX_ADDR 3 @@ -108,6 +108,7 @@ unsigned semantic_index; unsigned interp; unsigned char cylindrical_wrap; + unsigned char usage_mask; unsigned interp_location; unsigned first; unsigned last; @@ -126,6 +127,7 @@ struct { unsigned semantic_name; unsigned semantic_index; + unsigned streams; unsigned usage_mask; /* = TGSI_WRITEMASK_* */ unsigned first; unsigned last; @@ -269,25 +271,33 @@ } struct ureg_src -ureg_DECL_fs_input_cyl_centroid(struct ureg_program *ureg, +ureg_DECL_fs_input_cyl_centroid_layout(struct ureg_program *ureg, unsigned semantic_name, unsigned semantic_index, unsigned interp_mode, unsigned cylindrical_wrap, unsigned interp_location, + unsigned index, + unsigned usage_mask, unsigned array_id, unsigned array_size) { unsigned i; + assert(usage_mask != 0); + assert(usage_mask <= TGSI_WRITEMASK_XYZW); + for (i = 0; i < ureg->nr_inputs; i++) { if (ureg->input[i].semantic_name == semantic_name && ureg->input[i].semantic_index == semantic_index) { assert(ureg->input[i].interp == interp_mode); assert(ureg->input[i].cylindrical_wrap == cylindrical_wrap); assert(ureg->input[i].interp_location == interp_location); - assert(ureg->input[i].array_id == array_id); - goto out; + if (ureg->input[i].array_id == array_id) { + ureg->input[i].usage_mask |= usage_mask; + goto out; + } + assert((ureg->input[i].usage_mask & usage_mask) == 0); } } @@ -298,10 +308,11 @@ ureg->input[i].interp = interp_mode; ureg->input[i].cylindrical_wrap = cylindrical_wrap; ureg->input[i].interp_location = interp_location; - ureg->input[i].first = ureg->nr_input_regs; - ureg->input[i].last = ureg->nr_input_regs + array_size - 1; + ureg->input[i].first = index; + ureg->input[i].last = index + array_size - 1; ureg->input[i].array_id = array_id; - ureg->nr_input_regs += array_size; + ureg->input[i].usage_mask = usage_mask; + ureg->nr_input_regs = MAX2(ureg->nr_input_regs, index + array_size); ureg->nr_inputs++; } else { set_bad(ureg); @@ -312,6 +323,21 @@ array_id); } +struct ureg_src +ureg_DECL_fs_input_cyl_centroid(struct ureg_program *ureg, + unsigned semantic_name, + unsigned semantic_index, + unsigned interp_mode, + unsigned cylindrical_wrap, + unsigned interp_location, + unsigned array_id, + unsigned array_size) +{ + return ureg_DECL_fs_input_cyl_centroid_layout(ureg, + semantic_name, semantic_index, interp_mode, cylindrical_wrap, interp_location, + ureg->nr_input_regs, TGSI_WRITEMASK_XYZW, array_id, array_size); +} + struct ureg_src ureg_DECL_vs_input( struct ureg_program *ureg, @@ -326,6 +352,21 @@ struct ureg_src +ureg_DECL_input_layout(struct ureg_program *ureg, + unsigned semantic_name, + unsigned semantic_index, + unsigned index, + unsigned usage_mask, + unsigned array_id, + unsigned array_size) +{ + return ureg_DECL_fs_input_cyl_centroid_layout(ureg, + semantic_name, semantic_index, 0, 0, 0, + index, usage_mask, array_id, array_size); +} + + +struct ureg_src ureg_DECL_input(struct ureg_program *ureg, unsigned semantic_name, unsigned semantic_index, @@ -365,9 +406,11 @@ } -struct ureg_dst -ureg_DECL_output_masked(struct ureg_program *ureg, - unsigned name, +struct ureg_dst +ureg_DECL_output_layout(struct ureg_program *ureg, + unsigned semantic_name, + unsigned semantic_index, + unsigned streams, unsigned index, unsigned usage_mask, unsigned array_id, @@ -376,36 +419,58 @@ unsigned i; assert(usage_mask != 0); + assert(!(streams & 0x03) || (usage_mask & 1)); + assert(!(streams & 0x0c) || (usage_mask & 2)); + assert(!(streams & 0x30) || (usage_mask & 4)); + assert(!(streams & 0xc0) || (usage_mask & 8)); for (i = 0; i < ureg->nr_outputs; i++) { - if (ureg->output[i].semantic_name == name && - ureg->output[i].semantic_index == index) { - assert(ureg->output[i].array_id == array_id); - ureg->output[i].usage_mask |= usage_mask; - goto out; + if (ureg->output[i].semantic_name == semantic_name && + ureg->output[i].semantic_index == semantic_index) { + if (ureg->output[i].array_id == array_id) { + ureg->output[i].usage_mask |= usage_mask; + goto out; + } + assert((ureg->output[i].usage_mask & usage_mask) == 0); } } if (ureg->nr_outputs < UREG_MAX_OUTPUT) { - ureg->output[i].semantic_name = name; - ureg->output[i].semantic_index = index; + ureg->output[i].semantic_name = semantic_name; + ureg->output[i].semantic_index = semantic_index; ureg->output[i].usage_mask = usage_mask; - ureg->output[i].first = ureg->nr_output_regs; - ureg->output[i].last = ureg->nr_output_regs + array_size - 1; + ureg->output[i].first = index; + ureg->output[i].last = index + array_size - 1; ureg->output[i].array_id = array_id; - ureg->nr_output_regs += array_size; + ureg->nr_output_regs = MAX2(ureg->nr_output_regs, index + array_size); ureg->nr_outputs++; } else { set_bad( ureg ); + i = 0; } out: + ureg->output[i].streams |= streams; + return ureg_dst_array_register(TGSI_FILE_OUTPUT, ureg->output[i].first, array_id); } +struct ureg_dst +ureg_DECL_output_masked(struct ureg_program *ureg, + unsigned name, + unsigned index, + unsigned usage_mask, + unsigned array_id, + unsigned array_size) +{ + return ureg_DECL_output_layout(ureg, name, index, 0, + ureg->nr_output_regs, usage_mask, array_id, array_size); +} + + struct ureg_dst ureg_DECL_output(struct ureg_program *ureg, unsigned name, @@ -457,7 +522,7 @@ } -/* A one-dimensional, depricated version of ureg_DECL_constant2D(). +/* A one-dimensional, deprecated version of ureg_DECL_constant2D(). * * Constant operands declared with this function must be addressed * with a one-dimensional index. @@ -792,7 +857,9 @@ unsigned nr2 = *pnr2; unsigned i, j; - if (type == TGSI_IMM_FLOAT64) + if (type == TGSI_IMM_FLOAT64 || + type == TGSI_IMM_UINT64 || + type == TGSI_IMM_INT64) return match_or_expand_immediate64(v, type, nr, v2, pnr2, swizzle); *swizzle = 0; @@ -871,7 +938,9 @@ /* Make sure that all referenced elements are from this immediate. * Has the effect of making size-one immediates into scalars. */ - if (type == TGSI_IMM_FLOAT64) { + if (type == TGSI_IMM_FLOAT64 || + type == TGSI_IMM_UINT64 || + type == TGSI_IMM_INT64) { for (j = nr; j < 4; j+=2) { swizzle |= (swizzle & 0xf) << (j * 2); } @@ -971,6 +1040,43 @@ return decl_immediate(ureg, (const unsigned *)v, nr, TGSI_IMM_INT32); } +struct ureg_src +ureg_DECL_immediate_uint64( struct ureg_program *ureg, + const uint64_t *v, + unsigned nr ) +{ + union { + unsigned u[4]; + uint64_t u64[2]; + } fu; + unsigned int i; + + assert((nr / 2) < 3); + for (i = 0; i < nr / 2; i++) { + fu.u64[i] = v[i]; + } + + return decl_immediate(ureg, fu.u, nr, TGSI_IMM_UINT64); +} + +struct ureg_src +ureg_DECL_immediate_int64( struct ureg_program *ureg, + const int64_t *v, + unsigned nr ) +{ + union { + unsigned u[4]; + int64_t i64[2]; + } fu; + unsigned int i; + + assert((nr / 2) < 3); + for (i = 0; i < nr / 2; i++) { + fu.i64[i] = v[i]; + } + + return decl_immediate(ureg, fu.u, nr, TGSI_IMM_INT64); +} void ureg_emit_src( struct ureg_program *ureg, @@ -1457,6 +1563,7 @@ unsigned last, unsigned semantic_name, unsigned semantic_index, + unsigned streams, unsigned usage_mask, unsigned array_id) { @@ -1477,6 +1584,10 @@ out[2].value = 0; out[2].decl_semantic.Name = semantic_name; out[2].decl_semantic.Index = semantic_index; + out[2].decl_semantic.StreamX = streams & 3; + out[2].decl_semantic.StreamY = (streams >> 2) & 3; + out[2].decl_semantic.StreamZ = (streams >> 4) & 3; + out[2].decl_semantic.StreamW = (streams >> 6) & 3; if (array_id) { out[3].value = 0; @@ -1495,7 +1606,8 @@ unsigned interpolate, unsigned cylindrical_wrap, unsigned interpolate_location, - unsigned array_id) + unsigned array_id, + unsigned usage_mask) { union tgsi_any_token *out = get_tokens(ureg, DOMAIN_DECL, array_id ? 5 : 4); @@ -1504,7 +1616,7 @@ out[0].decl.Type = TGSI_TOKEN_TYPE_DECLARATION; out[0].decl.NrTokens = 4; out[0].decl.File = file; - out[0].decl.UsageMask = TGSI_WRITEMASK_XYZW; /* FIXME! */ + out[0].decl.UsageMask = usage_mask; out[0].decl.Interpolate = 1; out[0].decl.Semantic = 1; out[0].decl.Array = array_id != 0; @@ -1751,7 +1863,8 @@ ureg->input[i].interp, ureg->input[i].cylindrical_wrap, ureg->input[i].interp_location, - ureg->input[i].array_id); + ureg->input[i].array_id, + ureg->input[i].usage_mask); } } else { @@ -1765,7 +1878,8 @@ (j - ureg->input[i].first), ureg->input[i].interp, ureg->input[i].cylindrical_wrap, - ureg->input[i].interp_location, 0); + ureg->input[i].interp_location, 0, + ureg->input[i].usage_mask); } } } @@ -1778,6 +1892,7 @@ ureg->input[i].last, ureg->input[i].semantic_name, ureg->input[i].semantic_index, + 0, TGSI_WRITEMASK_XYZW, ureg->input[i].array_id); } @@ -1791,6 +1906,7 @@ ureg->input[i].semantic_name, ureg->input[i].semantic_index + (j - ureg->input[i].first), + 0, TGSI_WRITEMASK_XYZW, 0); } } @@ -1804,6 +1920,7 @@ i, ureg->system_value[i].semantic_name, ureg->system_value[i].semantic_index, + 0, TGSI_WRITEMASK_XYZW, 0); } @@ -1815,6 +1932,7 @@ ureg->output[i].last, ureg->output[i].semantic_name, ureg->output[i].semantic_index, + ureg->output[i].streams, ureg->output[i].usage_mask, ureg->output[i].array_id); } @@ -1828,6 +1946,7 @@ ureg->output[i].semantic_name, ureg->output[i].semantic_index + (j - ureg->output[i].first), + ureg->output[i].streams, ureg->output[i].usage_mask, 0); } } diff -Nru mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_ureg.h mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_ureg.h --- mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_ureg.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_ureg.h 2017-06-01 10:37:10.000000000 +0000 @@ -173,6 +173,18 @@ */ struct ureg_src +ureg_DECL_fs_input_cyl_centroid_layout(struct ureg_program *, + unsigned semantic_name, + unsigned semantic_index, + unsigned interp_mode, + unsigned cylindrical_wrap, + unsigned interp_location, + unsigned index, + unsigned usage_mask, + unsigned array_id, + unsigned array_size); + +struct ureg_src ureg_DECL_fs_input_cyl_centroid(struct ureg_program *, unsigned semantic_name, unsigned semantic_index, @@ -215,6 +227,15 @@ unsigned index ); struct ureg_src +ureg_DECL_input_layout(struct ureg_program *, + unsigned semantic_name, + unsigned semantic_index, + unsigned index, + unsigned usage_mask, + unsigned array_id, + unsigned array_size); + +struct ureg_src ureg_DECL_input(struct ureg_program *, unsigned semantic_name, unsigned semantic_index, @@ -227,6 +248,16 @@ unsigned semantic_index); struct ureg_dst +ureg_DECL_output_layout(struct ureg_program *, + unsigned semantic_name, + unsigned semantic_index, + unsigned streams, + unsigned index, + unsigned usage_mask, + unsigned array_id, + unsigned array_size); + +struct ureg_dst ureg_DECL_output_masked(struct ureg_program *, unsigned semantic_name, unsigned semantic_index, @@ -271,6 +302,16 @@ const int *v, unsigned nr ); +struct ureg_src +ureg_DECL_immediate_uint64( struct ureg_program *, + const uint64_t *v, + unsigned nr ); + +struct ureg_src +ureg_DECL_immediate_int64( struct ureg_program *, + const int64_t *v, + unsigned nr ); + void ureg_DECL_constant2D(struct ureg_program *ureg, unsigned first, diff -Nru mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_util.c mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_util.c --- mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_util.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_util.c 2017-06-01 10:37:10.000000000 +0000 @@ -192,7 +192,6 @@ case TGSI_OPCODE_SLT: case TGSI_OPCODE_SGE: case TGSI_OPCODE_MAD: - case TGSI_OPCODE_SUB: case TGSI_OPCODE_LRP: case TGSI_OPCODE_FMA: case TGSI_OPCODE_FRC: @@ -201,7 +200,6 @@ case TGSI_OPCODE_FLR: case TGSI_OPCODE_ROUND: case TGSI_OPCODE_POW: - case TGSI_OPCODE_ABS: case TGSI_OPCODE_COS: case TGSI_OPCODE_SIN: case TGSI_OPCODE_DDX: diff -Nru mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_util.h mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_util.h --- mesa-12.0.6/src/gallium/auxiliary/tgsi/tgsi_util.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/tgsi/tgsi_util.h 2017-06-01 10:37:10.000000000 +0000 @@ -32,6 +32,8 @@ extern "C" { #endif +#include "pipe/p_shader_tokens.h" + struct tgsi_src_register; struct tgsi_full_src_register; struct tgsi_full_instruction; diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_bitcast.h mesa-17.0.7/src/gallium/auxiliary/util/u_bitcast.h --- mesa-12.0.6/src/gallium/auxiliary/util/u_bitcast.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_bitcast.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,59 @@ +/************************************************************************** + * + * Copyright © 2016 Intel Corporation + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#ifndef U_BITCAST_H_ +#define U_BITCAST_H_ + +#include + +#include "c99_compat.h" + +#ifdef __cplusplus +extern "C" { +#endif + +static inline unsigned +u_bitcast_f2u(float f) +{ + unsigned u; + memcpy(&u, &f, sizeof(u)); + return u; +} + +static inline float +u_bitcast_u2f(unsigned u) +{ + float f; + memcpy(&f, &u, sizeof(f)); + return f; +} + +#ifdef __cplusplus +} +#endif + +#endif /* U_BITCAST_H_ */ diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_blit.c mesa-17.0.7/src/gallium/auxiliary/util/u_blit.c --- mesa-12.0.6/src/gallium/auxiliary/util/u_blit.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_blit.c 2017-06-01 10:37:10.000000000 +0000 @@ -180,11 +180,13 @@ if (!ctx->fs[pipe_tex][writemask][idx]) { unsigned tgsi_tex = util_pipe_tex_to_tgsi_tex(pipe_tex, 0); + /* OpenGL does not allow blits from signed to unsigned integer + * or vice versa. */ ctx->fs[pipe_tex][writemask][idx] = util_make_fragment_tex_shader_writemask(ctx->pipe, tgsi_tex, TGSI_INTERPOLATE_LINEAR, writemask, - stype); + stype, stype); } cso_set_fragment_shader_handle(ctx->cso, ctx->fs[pipe_tex][writemask][idx]); diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_blitter.c mesa-17.0.7/src/gallium/auxiliary/util/u_blitter.c --- mesa-12.0.6/src/gallium/auxiliary/util/u_blitter.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_blitter.c 2017-06-01 10:37:10.000000000 +0000 @@ -78,11 +78,10 @@ void *fs_write_one_cbuf; void *fs_write_all_cbufs; - /* FS which outputs a color from a texture, - where the index is PIPE_TEXTURE_* to be sampled. */ - void *fs_texfetch_col[PIPE_MAX_TEXTURE_TYPES]; - void *fs_texfetch_col_uint[PIPE_MAX_TEXTURE_TYPES]; - void *fs_texfetch_col_sint[PIPE_MAX_TEXTURE_TYPES]; + /* FS which outputs a color from a texture. + * The first index indicates the texture type / destination type, + * the second index is the PIPE_TEXTURE_* to be sampled. */ + void *fs_texfetch_col[5][PIPE_MAX_TEXTURE_TYPES]; /* FS which outputs a depth from a texture, where the index is PIPE_TEXTURE_* to be sampled. */ @@ -91,17 +90,13 @@ void *fs_texfetch_stencil[PIPE_MAX_TEXTURE_TYPES]; /* FS which outputs one sample from a multisample texture. */ - void *fs_texfetch_col_msaa[PIPE_MAX_TEXTURE_TYPES]; - void *fs_texfetch_col_msaa_uint[PIPE_MAX_TEXTURE_TYPES]; - void *fs_texfetch_col_msaa_sint[PIPE_MAX_TEXTURE_TYPES]; + void *fs_texfetch_col_msaa[5][PIPE_MAX_TEXTURE_TYPES]; void *fs_texfetch_depth_msaa[PIPE_MAX_TEXTURE_TYPES]; void *fs_texfetch_depthstencil_msaa[PIPE_MAX_TEXTURE_TYPES]; void *fs_texfetch_stencil_msaa[PIPE_MAX_TEXTURE_TYPES]; /* FS which outputs an average of all samples. */ void *fs_resolve[PIPE_MAX_TEXTURE_TYPES][NUM_RESOLVE_FRAG_SHADERS][2]; - void *fs_resolve_sint[PIPE_MAX_TEXTURE_TYPES][NUM_RESOLVE_FRAG_SHADERS][2]; - void *fs_resolve_uint[PIPE_MAX_TEXTURE_TYPES][NUM_RESOLVE_FRAG_SHADERS][2]; /* Blend state. */ void *blend[PIPE_MASK_RGBA+1][2]; /**< blend state with writemask */ @@ -285,6 +280,7 @@ ctx->rs_discard_state = pipe->create_rasterizer_state(pipe, &rs_state); } + ctx->base.cb_slot = 0; /* 0 for now */ ctx->base.vb_slot = 0; /* 0 for now */ /* vertex elements states */ @@ -457,12 +453,13 @@ } for (i = 0; i < PIPE_MAX_TEXTURE_TYPES; i++) { - if (ctx->fs_texfetch_col[i]) - ctx->delete_fs_state(pipe, ctx->fs_texfetch_col[i]); - if (ctx->fs_texfetch_col_sint[i]) - ctx->delete_fs_state(pipe, ctx->fs_texfetch_col_sint[i]); - if (ctx->fs_texfetch_col_uint[i]) - ctx->delete_fs_state(pipe, ctx->fs_texfetch_col_uint[i]); + for (unsigned type = 0; type < ARRAY_SIZE(ctx->fs_texfetch_col); ++type) { + if (ctx->fs_texfetch_col[type][i]) + ctx->delete_fs_state(pipe, ctx->fs_texfetch_col[type][i]); + if (ctx->fs_texfetch_col_msaa[type][i]) + ctx->delete_fs_state(pipe, ctx->fs_texfetch_col_msaa[type][i]); + } + if (ctx->fs_texfetch_depth[i]) ctx->delete_fs_state(pipe, ctx->fs_texfetch_depth[i]); if (ctx->fs_texfetch_depthstencil[i]) @@ -470,12 +467,6 @@ if (ctx->fs_texfetch_stencil[i]) ctx->delete_fs_state(pipe, ctx->fs_texfetch_stencil[i]); - if (ctx->fs_texfetch_col_msaa[i]) - ctx->delete_fs_state(pipe, ctx->fs_texfetch_col_msaa[i]); - if (ctx->fs_texfetch_col_msaa_sint[i]) - ctx->delete_fs_state(pipe, ctx->fs_texfetch_col_msaa_sint[i]); - if (ctx->fs_texfetch_col_msaa_uint[i]) - ctx->delete_fs_state(pipe, ctx->fs_texfetch_col_msaa_uint[i]); if (ctx->fs_texfetch_depth_msaa[i]) ctx->delete_fs_state(pipe, ctx->fs_texfetch_depth_msaa[i]); if (ctx->fs_texfetch_depthstencil_msaa[i]) @@ -487,16 +478,6 @@ for (f = 0; f < 2; f++) if (ctx->fs_resolve[i][j][f]) ctx->delete_fs_state(pipe, ctx->fs_resolve[i][j][f]); - - for (j = 0; j< ARRAY_SIZE(ctx->fs_resolve_sint[i]); j++) - for (f = 0; f < 2; f++) - if (ctx->fs_resolve_sint[i][j][f]) - ctx->delete_fs_state(pipe, ctx->fs_resolve_sint[i][j][f]); - - for (j = 0; j< ARRAY_SIZE(ctx->fs_resolve_uint[i]); j++) - for (f = 0; f < 2; f++) - if (ctx->fs_resolve_uint[i][j][f]) - ctx->delete_fs_state(pipe, ctx->fs_resolve_uint[i][j][f]); } if (ctx->fs_empty) @@ -522,26 +503,26 @@ ctx->has_texture_multisample = supported; } -static void blitter_set_running_flag(struct blitter_context_priv *ctx) +void util_blitter_set_running_flag(struct blitter_context *blitter) { - if (ctx->base.running) { + if (blitter->running) { _debug_printf("u_blitter:%i: Caught recursion. This is a driver bug.\n", __LINE__); } - ctx->base.running = TRUE; + blitter->running = TRUE; - ctx->base.pipe->set_active_query_state(ctx->base.pipe, false); + blitter->pipe->set_active_query_state(blitter->pipe, false); } -static void blitter_unset_running_flag(struct blitter_context_priv *ctx) +void util_blitter_unset_running_flag(struct blitter_context *blitter) { - if (!ctx->base.running) { + if (!blitter->running) { _debug_printf("u_blitter:%i: Caught recursion. This is a driver bug.\n", __LINE__); } - ctx->base.running = FALSE; + blitter->running = FALSE; - ctx->base.pipe->set_active_query_state(ctx->base.pipe, true); + blitter->pipe->set_active_query_state(blitter->pipe, true); } static void blitter_check_saved_vertex_states(struct blitter_context_priv *ctx) @@ -555,8 +536,9 @@ assert(ctx->base.saved_rs_state != INVALID_PTR); } -static void blitter_restore_vertex_states(struct blitter_context_priv *ctx) +void util_blitter_restore_vertex_states(struct blitter_context *blitter) { + struct blitter_context_priv *ctx = (struct blitter_context_priv*)blitter; struct pipe_context *pipe = ctx->base.pipe; unsigned i; @@ -613,8 +595,9 @@ assert(ctx->base.saved_blend_state != INVALID_PTR); } -static void blitter_restore_fragment_states(struct blitter_context_priv *ctx) +void util_blitter_restore_fragment_states(struct blitter_context *blitter) { + struct blitter_context_priv *ctx = (struct blitter_context_priv*)blitter; struct pipe_context *pipe = ctx->base.pipe; /* Fragment shader. */ @@ -656,8 +639,9 @@ } } -static void blitter_restore_render_cond(struct blitter_context_priv *ctx) +void util_blitter_restore_render_cond(struct blitter_context *blitter) { + struct blitter_context_priv *ctx = (struct blitter_context_priv*)blitter; struct pipe_context *pipe = ctx->base.pipe; if (ctx->base.saved_render_cond_query) { @@ -668,8 +652,9 @@ } } -static void blitter_restore_fb_state(struct blitter_context_priv *ctx) +void util_blitter_restore_fb_state(struct blitter_context *blitter) { + struct blitter_context_priv *ctx = (struct blitter_context_priv*)blitter; struct pipe_context *pipe = ctx->base.pipe; pipe->set_framebuffer_state(pipe, &ctx->base.saved_fb_state); @@ -682,8 +667,9 @@ assert(ctx->base.saved_num_sampler_views != ~0u); } -static void blitter_restore_textures(struct blitter_context_priv *ctx) +void util_blitter_restore_textures(struct blitter_context *blitter) { + struct blitter_context_priv *ctx = (struct blitter_context_priv*)blitter; struct pipe_context *pipe = ctx->base.pipe; unsigned i; @@ -705,6 +691,15 @@ ctx->base.saved_num_sampler_views = ~0; } +void util_blitter_restore_constant_buffer_state(struct blitter_context *blitter) +{ + struct pipe_context *pipe = blitter->pipe; + + pipe->set_constant_buffer(pipe, PIPE_SHADER_FRAGMENT, blitter->cb_slot, + &blitter->saved_fs_constant_buffer); + pipe_resource_reference(&blitter->saved_fs_constant_buffer.buffer, NULL); +} + static void blitter_set_rectangle(struct blitter_context_priv *ctx, int x1, int y1, int x2, int y2, float depth) @@ -869,7 +864,8 @@ } static void *blitter_get_fs_texfetch_col(struct blitter_context_priv *ctx, - enum pipe_format format, + enum pipe_format src_format, + enum pipe_format dst_format, enum pipe_texture_target target, unsigned src_nr_samples, unsigned dst_nr_samples, @@ -878,31 +874,53 @@ struct pipe_context *pipe = ctx->base.pipe; unsigned tgsi_tex = util_pipe_tex_to_tgsi_tex(target, src_nr_samples); enum tgsi_return_type stype; + enum tgsi_return_type dtype; + unsigned type; assert(target < PIPE_MAX_TEXTURE_TYPES); - if (util_format_is_pure_uint(format)) + if (util_format_is_pure_uint(src_format)) { stype = TGSI_RETURN_TYPE_UINT; - else if (util_format_is_pure_sint(format)) + if (util_format_is_pure_uint(dst_format)) { + dtype = TGSI_RETURN_TYPE_UINT; + type = 0; + } else { + assert(util_format_is_pure_sint(dst_format)); + dtype = TGSI_RETURN_TYPE_SINT; + type = 1; + } + } else if (util_format_is_pure_sint(src_format)) { stype = TGSI_RETURN_TYPE_SINT; - else - stype = TGSI_RETURN_TYPE_FLOAT; + if (util_format_is_pure_sint(dst_format)) { + dtype = TGSI_RETURN_TYPE_SINT; + type = 2; + } else { + assert(util_format_is_pure_uint(dst_format)); + dtype = TGSI_RETURN_TYPE_UINT; + type = 3; + } + } else { + assert(!util_format_is_pure_uint(dst_format) && + !util_format_is_pure_sint(dst_format)); + dtype = stype = TGSI_RETURN_TYPE_FLOAT; + type = 4; + } if (src_nr_samples > 1) { void **shader; - if (dst_nr_samples <= 1) { + /* OpenGL requires that integer textures just copy 1 sample instead + * of averaging. + */ + if (dst_nr_samples <= 1 && + stype != TGSI_RETURN_TYPE_UINT && + stype != TGSI_RETURN_TYPE_SINT) { /* The destination has one sample, so we'll do color resolve. */ unsigned index = GET_MSAA_RESOLVE_FS_IDX(src_nr_samples); assert(filter < 2); - if (stype == TGSI_RETURN_TYPE_UINT) - shader = &ctx->fs_resolve_uint[target][index][filter]; - else if (stype == TGSI_RETURN_TYPE_SINT) - shader = &ctx->fs_resolve_sint[target][index][filter]; - else - shader = &ctx->fs_resolve[target][index][filter]; + shader = &ctx->fs_resolve[target][index][filter]; if (!*shader) { assert(!ctx->cached_all_shaders); @@ -922,37 +940,25 @@ /* The destination has multiple samples, we'll do * an MSAA->MSAA copy. */ - if (stype == TGSI_RETURN_TYPE_UINT) - shader = &ctx->fs_texfetch_col_msaa_uint[target]; - else if (stype == TGSI_RETURN_TYPE_SINT) - shader = &ctx->fs_texfetch_col_msaa_sint[target]; - else - shader = &ctx->fs_texfetch_col_msaa[target]; + shader = &ctx->fs_texfetch_col_msaa[type][target]; /* Create the fragment shader on-demand. */ if (!*shader) { assert(!ctx->cached_all_shaders); - *shader = util_make_fs_blit_msaa_color(pipe, tgsi_tex, stype); + *shader = util_make_fs_blit_msaa_color(pipe, tgsi_tex, stype, dtype); } } return *shader; } else { - void **shader; - - if (stype == TGSI_RETURN_TYPE_UINT) - shader = &ctx->fs_texfetch_col_uint[target]; - else if (stype == TGSI_RETURN_TYPE_SINT) - shader = &ctx->fs_texfetch_col_sint[target]; - else - shader = &ctx->fs_texfetch_col[target]; + void **shader = &ctx->fs_texfetch_col[type][target]; /* Create the fragment shader on-demand. */ if (!*shader) { assert(!ctx->cached_all_shaders); *shader = util_make_fragment_tex_shader(pipe, tgsi_tex, TGSI_INTERPOLATE_LINEAR, - stype); + stype, dtype); } return *shader; @@ -1114,11 +1120,20 @@ /* If samples == 1, the shaders read one texel. If samples >= 1, * they read one sample. */ - blitter_get_fs_texfetch_col(ctx, PIPE_FORMAT_R32_FLOAT, target, + blitter_get_fs_texfetch_col(ctx, PIPE_FORMAT_R32_FLOAT, + PIPE_FORMAT_R32_FLOAT, target, + samples, samples, 0); + blitter_get_fs_texfetch_col(ctx, PIPE_FORMAT_R32_UINT, + PIPE_FORMAT_R32_UINT, target, samples, samples, 0); - blitter_get_fs_texfetch_col(ctx, PIPE_FORMAT_R32_UINT, target, + blitter_get_fs_texfetch_col(ctx, PIPE_FORMAT_R32_UINT, + PIPE_FORMAT_R32_SINT, target, samples, samples, 0); - blitter_get_fs_texfetch_col(ctx, PIPE_FORMAT_R32_SINT, target, + blitter_get_fs_texfetch_col(ctx, PIPE_FORMAT_R32_SINT, + PIPE_FORMAT_R32_SINT, target, + samples, samples, 0); + blitter_get_fs_texfetch_col(ctx, PIPE_FORMAT_R32_SINT, + PIPE_FORMAT_R32_UINT, target, samples, samples, 0); blitter_get_fs_texfetch_depth(ctx, target, samples); if (ctx->has_stencil_export) { @@ -1138,11 +1153,14 @@ } for (f = 0; f < 2; f++) { - blitter_get_fs_texfetch_col(ctx, PIPE_FORMAT_R32_FLOAT, target, + blitter_get_fs_texfetch_col(ctx, PIPE_FORMAT_R32_FLOAT, + PIPE_FORMAT_R32_FLOAT, target, j, 1, f); - blitter_get_fs_texfetch_col(ctx, PIPE_FORMAT_R32_UINT, target, + blitter_get_fs_texfetch_col(ctx, PIPE_FORMAT_R32_UINT, + PIPE_FORMAT_R32_UINT, target, j, 1, f); - blitter_get_fs_texfetch_col(ctx, PIPE_FORMAT_R32_SINT, target, + blitter_get_fs_texfetch_col(ctx, PIPE_FORMAT_R32_SINT, + PIPE_FORMAT_R32_SINT, target, j, 1, f); } } @@ -1265,21 +1283,15 @@ return ctx->blend_clear[index]; } -static void util_blitter_clear_custom(struct blitter_context *blitter, - unsigned width, unsigned height, - unsigned num_layers, - unsigned clear_buffers, - const union pipe_color_union *color, - double depth, unsigned stencil, - void *custom_blend, void *custom_dsa) +void util_blitter_common_clear_setup(struct blitter_context *blitter, + unsigned width, unsigned height, + unsigned clear_buffers, + void *custom_blend, void *custom_dsa) { struct blitter_context_priv *ctx = (struct blitter_context_priv*)blitter; struct pipe_context *pipe = ctx->base.pipe; - struct pipe_stencil_ref sr = { { 0 } }; - assert(ctx->has_layered || num_layers <= 1); - - blitter_set_running_flag(ctx); + util_blitter_set_running_flag(blitter); blitter_check_saved_vertex_states(ctx); blitter_check_saved_fragment_states(ctx); blitter_disable_render_cond(ctx); @@ -1303,14 +1315,32 @@ pipe->bind_depth_stencil_alpha_state(pipe, ctx->dsa_keep_depth_stencil); } + pipe->set_sample_mask(pipe, ~0); + blitter_set_dst_dimensions(ctx, width, height); +} + +static void util_blitter_clear_custom(struct blitter_context *blitter, + unsigned width, unsigned height, + unsigned num_layers, + unsigned clear_buffers, + const union pipe_color_union *color, + double depth, unsigned stencil, + void *custom_blend, void *custom_dsa) +{ + struct blitter_context_priv *ctx = (struct blitter_context_priv*)blitter; + struct pipe_context *pipe = ctx->base.pipe; + struct pipe_stencil_ref sr = { { 0 } }; + + assert(ctx->has_layered || num_layers <= 1); + + util_blitter_common_clear_setup(blitter, width, height, clear_buffers, + custom_blend, custom_dsa); + sr.ref_value[0] = stencil & 0xff; pipe->set_stencil_ref(pipe, &sr); pipe->bind_vertex_elements_state(pipe, ctx->velem_state); bind_fs_write_all_cbufs(ctx); - pipe->set_sample_mask(pipe, ~0); - - blitter_set_dst_dimensions(ctx, width, height); if (num_layers > 1 && ctx->has_layered) { blitter_set_common_draw_rect_state(ctx, FALSE, TRUE); @@ -1323,10 +1353,10 @@ UTIL_BLITTER_ATTRIB_COLOR, color); } - blitter_restore_vertex_states(ctx); - blitter_restore_fragment_states(ctx); - blitter_restore_render_cond(ctx); - blitter_unset_running_flag(ctx); + util_blitter_restore_vertex_states(blitter); + util_blitter_restore_fragment_states(blitter); + util_blitter_restore_render_cond(blitter); + util_blitter_unset_running_flag(blitter); } void util_blitter_clear(struct blitter_context *blitter, @@ -1344,9 +1374,9 @@ unsigned width, unsigned height, double depth, void *custom_dsa) { - static const union pipe_color_union color; - util_blitter_clear_custom(blitter, width, height, 0, 0, &color, depth, 0, - NULL, custom_dsa); + static const union pipe_color_union color; + util_blitter_clear_custom(blitter, width, height, 0, 0, &color, depth, 0, + NULL, custom_dsa); } void util_blitter_default_dst_texture(struct pipe_surface *dst_templ, @@ -1354,11 +1384,11 @@ unsigned dstlevel, unsigned dstz) { - memset(dst_templ, 0, sizeof(*dst_templ)); - dst_templ->format = util_format_linear(dst->format); - dst_templ->u.tex.level = dstlevel; - dst_templ->u.tex.first_layer = dstz; - dst_templ->u.tex.last_layer = dstz; + memset(dst_templ, 0, sizeof(*dst_templ)); + dst_templ->format = util_format_linear(dst->format); + dst_templ->u.tex.level = dstlevel; + dst_templ->u.tex.first_layer = dstz; + dst_templ->u.tex.last_layer = dstz; } static struct pipe_surface * @@ -1380,19 +1410,19 @@ struct pipe_resource *src, unsigned srclevel) { - memset(src_templ, 0, sizeof(*src_templ)); - src_templ->target = src->target; - src_templ->format = util_format_linear(src->format); - src_templ->u.tex.first_level = srclevel; - src_templ->u.tex.last_level = srclevel; - src_templ->u.tex.first_layer = 0; - src_templ->u.tex.last_layer = - src->target == PIPE_TEXTURE_3D ? u_minify(src->depth0, srclevel) - 1 - : src->array_size - 1; - src_templ->swizzle_r = PIPE_SWIZZLE_X; - src_templ->swizzle_g = PIPE_SWIZZLE_Y; - src_templ->swizzle_b = PIPE_SWIZZLE_Z; - src_templ->swizzle_a = PIPE_SWIZZLE_W; + memset(src_templ, 0, sizeof(*src_templ)); + src_templ->target = src->target; + src_templ->format = util_format_linear(src->format); + src_templ->u.tex.first_level = srclevel; + src_templ->u.tex.last_level = srclevel; + src_templ->u.tex.first_layer = 0; + src_templ->u.tex.last_layer = + src->target == PIPE_TEXTURE_3D ? u_minify(src->depth0, srclevel) - 1 + : src->array_size - 1; + src_templ->swizzle_r = PIPE_SWIZZLE_X; + src_templ->swizzle_g = PIPE_SWIZZLE_Y; + src_templ->swizzle_b = PIPE_SWIZZLE_Z; + src_templ->swizzle_a = PIPE_SWIZZLE_W; } static boolean is_blit_generic_supported(struct blitter_context *blitter, @@ -1513,6 +1543,135 @@ pipe_sampler_view_reference(&src_view, NULL); } +static void do_blits(struct blitter_context_priv *ctx, + struct pipe_surface *dst, + const struct pipe_box *dstbox, + struct pipe_sampler_view *src, + unsigned src_width0, + unsigned src_height0, + const struct pipe_box *srcbox, + bool is_zsbuf) +{ + struct pipe_context *pipe = ctx->base.pipe; + unsigned src_samples = src->texture->nr_samples; + unsigned dst_samples = dst->texture->nr_samples; + enum pipe_texture_target src_target = src->texture->target; + struct pipe_framebuffer_state fb_state = {0}; + + /* Initialize framebuffer state. */ + fb_state.width = dst->width; + fb_state.height = dst->height; + fb_state.nr_cbufs = is_zsbuf ? 0 : 1; + + blitter_set_dst_dimensions(ctx, fb_state.width, fb_state.height); + + if ((src_target == PIPE_TEXTURE_1D || + src_target == PIPE_TEXTURE_2D || + src_target == PIPE_TEXTURE_RECT) && + src_samples <= 1) { + /* Draw the quad with the draw_rectangle callback. */ + + /* Set texture coordinates. - use a pipe color union + * for interface purposes. + * XXX pipe_color_union is a wrong name since we use that to set + * texture coordinates too. + */ + union pipe_color_union coord; + get_texcoords(src, src_width0, src_height0, srcbox->x, srcbox->y, + srcbox->x+srcbox->width, srcbox->y+srcbox->height, coord.f); + + /* Set framebuffer state. */ + if (is_zsbuf) { + fb_state.zsbuf = dst; + } else { + fb_state.cbufs[0] = dst; + } + pipe->set_framebuffer_state(pipe, &fb_state); + + /* Draw. */ + pipe->set_sample_mask(pipe, ~0); + ctx->base.draw_rectangle(&ctx->base, dstbox->x, dstbox->y, + dstbox->x + dstbox->width, + dstbox->y + dstbox->height, 0, + UTIL_BLITTER_ATTRIB_TEXCOORD, &coord); + } else { + /* Draw the quad with the generic codepath. */ + int dst_z; + for (dst_z = 0; dst_z < dstbox->depth; dst_z++) { + struct pipe_surface *old; + float dst2src_scale = srcbox->depth / (float)dstbox->depth; + + /* Scale Z properly if the blit is scaled. + * + * When downscaling, we want the coordinates centered, so that + * mipmapping works for 3D textures. For example, when generating + * a 4x4x4 level, this wouldn't average the pixels: + * + * src Z: 0 1 2 3 4 5 6 7 + * dst Z: 0 1 2 3 + * + * Because the pixels are not centered below the pixels of the higher + * level. Therefore, we want this: + * src Z: 0 1 2 3 4 5 6 7 + * dst Z: 0 1 2 3 + * + * dst_offset defines the offset needed for centering the pixels and + * it works with any scaling (not just 2x). + */ + float dst_offset = ((srcbox->depth - 1) - + (dstbox->depth - 1) * dst2src_scale) * 0.5; + float src_z = (dst_z + dst_offset) * dst2src_scale; + + /* Set framebuffer state. */ + if (is_zsbuf) { + fb_state.zsbuf = dst; + } else { + fb_state.cbufs[0] = dst; + } + pipe->set_framebuffer_state(pipe, &fb_state); + + /* See if we need to blit a multisample or singlesample buffer. */ + if (src_samples == dst_samples && dst_samples > 1) { + /* MSAA copy. */ + unsigned i, max_sample = dst_samples - 1; + + for (i = 0; i <= max_sample; i++) { + pipe->set_sample_mask(pipe, 1 << i); + blitter_set_texcoords(ctx, src, src_width0, src_height0, + srcbox->z + src_z, + i, srcbox->x, srcbox->y, + srcbox->x + srcbox->width, + srcbox->y + srcbox->height); + blitter_draw(ctx, dstbox->x, dstbox->y, + dstbox->x + dstbox->width, + dstbox->y + dstbox->height, 0, 1); + } + } else { + /* Normal copy, MSAA upsampling, or MSAA resolve. */ + pipe->set_sample_mask(pipe, ~0); + blitter_set_texcoords(ctx, src, src_width0, src_height0, + srcbox->z + src_z, 0, + srcbox->x, srcbox->y, + srcbox->x + srcbox->width, + srcbox->y + srcbox->height); + blitter_draw(ctx, dstbox->x, dstbox->y, + dstbox->x + dstbox->width, + dstbox->y + dstbox->height, 0, 1); + } + + /* Get the next surface or (if this is the last iteration) + * just unreference the last one. */ + old = dst; + if (dst_z < dstbox->depth-1) { + dst = ctx->base.get_next_surface_layer(ctx->base.pipe, dst); + } + if (dst_z) { + pipe_surface_reference(&old, NULL); + } + } + } +} + void util_blitter_blit_generic(struct blitter_context *blitter, struct pipe_surface *dst, const struct pipe_box *dstbox, @@ -1525,7 +1684,6 @@ { struct blitter_context_priv *ctx = (struct blitter_context_priv*)blitter; struct pipe_context *pipe = ctx->base.pipe; - struct pipe_framebuffer_state fb_state = {0}; enum pipe_texture_target src_target = src->texture->target; unsigned src_samples = src->texture->nr_samples; unsigned dst_samples = dst->texture->nr_samples; @@ -1560,20 +1718,13 @@ } /* Check whether the states are properly saved. */ - blitter_set_running_flag(ctx); + util_blitter_set_running_flag(blitter); blitter_check_saved_vertex_states(ctx); blitter_check_saved_fragment_states(ctx); blitter_check_saved_textures(ctx); blitter_check_saved_fb_state(ctx); blitter_disable_render_cond(ctx); - /* Initialize framebuffer state. */ - fb_state.width = dst->width; - fb_state.height = dst->height; - fb_state.nr_cbufs = blit_depth || blit_stencil ? 0 : 1; - fb_state.cbufs[0] = NULL; - fb_state.zsbuf = NULL; - if (blit_depth || blit_stencil) { pipe->bind_blend_state(pipe, ctx->blend[0][0]); @@ -1603,7 +1754,7 @@ pipe->bind_blend_state(pipe, ctx->blend[colormask][alpha_blend]); pipe->bind_depth_stencil_alpha_state(pipe, ctx->dsa_keep_depth_stencil); ctx->bind_fs_state(pipe, - blitter_get_fs_texfetch_col(ctx, src->format, src_target, + blitter_get_fs_texfetch_col(ctx, src->format, dst->format, src_target, src_samples, dst_samples, filter)); } @@ -1668,123 +1819,19 @@ } blitter_set_common_draw_rect_state(ctx, scissor != NULL, FALSE); - blitter_set_dst_dimensions(ctx, dst->width, dst->height); - - if ((src_target == PIPE_TEXTURE_1D || - src_target == PIPE_TEXTURE_2D || - src_target == PIPE_TEXTURE_RECT) && - src_samples <= 1) { - /* Draw the quad with the draw_rectangle callback. */ - - /* Set texture coordinates. - use a pipe color union - * for interface purposes. - * XXX pipe_color_union is a wrong name since we use that to set - * texture coordinates too. - */ - union pipe_color_union coord; - get_texcoords(src, src_width0, src_height0, srcbox->x, srcbox->y, - srcbox->x+srcbox->width, srcbox->y+srcbox->height, coord.f); - /* Set framebuffer state. */ - if (blit_depth || blit_stencil) { - fb_state.zsbuf = dst; - } else { - fb_state.cbufs[0] = dst; - } - pipe->set_framebuffer_state(pipe, &fb_state); - - /* Draw. */ - pipe->set_sample_mask(pipe, ~0); - blitter->draw_rectangle(blitter, dstbox->x, dstbox->y, - dstbox->x + dstbox->width, - dstbox->y + dstbox->height, 0, - UTIL_BLITTER_ATTRIB_TEXCOORD, &coord); - } else { - /* Draw the quad with the generic codepath. */ - int dst_z; - for (dst_z = 0; dst_z < dstbox->depth; dst_z++) { - struct pipe_surface *old; - float dst2src_scale = srcbox->depth / (float)dstbox->depth; - - /* Scale Z properly if the blit is scaled. - * - * When downscaling, we want the coordinates centered, so that - * mipmapping works for 3D textures. For example, when generating - * a 4x4x4 level, this wouldn't average the pixels: - * - * src Z: 0 1 2 3 4 5 6 7 - * dst Z: 0 1 2 3 - * - * Because the pixels are not centered below the pixels of the higher - * level. Therefore, we want this: - * src Z: 0 1 2 3 4 5 6 7 - * dst Z: 0 1 2 3 - * - * dst_offset defines the offset needed for centering the pixels and - * it works with any scaling (not just 2x). - */ - float dst_offset = ((srcbox->depth - 1) - - (dstbox->depth - 1) * dst2src_scale) * 0.5; - float src_z = (dst_z + dst_offset) * dst2src_scale; - - /* Set framebuffer state. */ - if (blit_depth || blit_stencil) { - fb_state.zsbuf = dst; - } else { - fb_state.cbufs[0] = dst; - } - pipe->set_framebuffer_state(pipe, &fb_state); + do_blits(ctx, dst, dstbox, src, src_width0, src_height0, + srcbox, blit_depth || blit_stencil); - /* See if we need to blit a multisample or singlesample buffer. */ - if (src_samples == dst_samples && dst_samples > 1) { - /* MSAA copy. */ - unsigned i, max_sample = dst_samples - 1; - - for (i = 0; i <= max_sample; i++) { - pipe->set_sample_mask(pipe, 1 << i); - blitter_set_texcoords(ctx, src, src_width0, src_height0, - srcbox->z + src_z, - i, srcbox->x, srcbox->y, - srcbox->x + srcbox->width, - srcbox->y + srcbox->height); - blitter_draw(ctx, dstbox->x, dstbox->y, - dstbox->x + dstbox->width, - dstbox->y + dstbox->height, 0, 1); - } - } else { - /* Normal copy, MSAA upsampling, or MSAA resolve. */ - pipe->set_sample_mask(pipe, ~0); - blitter_set_texcoords(ctx, src, src_width0, src_height0, - srcbox->z + src_z, 0, - srcbox->x, srcbox->y, - srcbox->x + srcbox->width, - srcbox->y + srcbox->height); - blitter_draw(ctx, dstbox->x, dstbox->y, - dstbox->x + dstbox->width, - dstbox->y + dstbox->height, 0, 1); - } - - /* Get the next surface or (if this is the last iteration) - * just unreference the last one. */ - old = dst; - if (dst_z < dstbox->depth-1) { - dst = ctx->base.get_next_surface_layer(ctx->base.pipe, dst); - } - if (dst_z) { - pipe_surface_reference(&old, NULL); - } - } - } - - blitter_restore_vertex_states(ctx); - blitter_restore_fragment_states(ctx); - blitter_restore_textures(ctx); - blitter_restore_fb_state(ctx); + util_blitter_restore_vertex_states(blitter); + util_blitter_restore_fragment_states(blitter); + util_blitter_restore_textures(blitter); + util_blitter_restore_fb_state(blitter); if (scissor) { pipe->set_scissor_states(pipe, 0, 1, &ctx->base.saved_scissor); } - blitter_restore_render_cond(ctx); - blitter_unset_running_flag(ctx); + util_blitter_restore_render_cond(blitter); + util_blitter_unset_running_flag(blitter); } void @@ -1820,6 +1867,107 @@ pipe_sampler_view_reference(&src_view, NULL); } +void util_blitter_generate_mipmap(struct blitter_context *blitter, + struct pipe_resource *tex, + enum pipe_format format, + unsigned base_level, unsigned last_level, + unsigned first_layer, unsigned last_layer) +{ + struct blitter_context_priv *ctx = (struct blitter_context_priv*)blitter; + struct pipe_context *pipe = ctx->base.pipe; + struct pipe_surface dst_templ, *dst_view; + struct pipe_sampler_view src_templ, *src_view; + boolean is_depth; + void *sampler_state; + const struct util_format_description *desc = + util_format_description(format); + unsigned src_level; + + assert(tex->nr_samples <= 1); + assert(!util_format_has_stencil(desc)); + + is_depth = desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS; + + /* Check whether the states are properly saved. */ + util_blitter_set_running_flag(blitter); + blitter_check_saved_vertex_states(ctx); + blitter_check_saved_fragment_states(ctx); + blitter_check_saved_textures(ctx); + blitter_check_saved_fb_state(ctx); + blitter_disable_render_cond(ctx); + + /* Set states. */ + if (is_depth) { + pipe->bind_blend_state(pipe, ctx->blend[0][0]); + pipe->bind_depth_stencil_alpha_state(pipe, + ctx->dsa_write_depth_keep_stencil); + ctx->bind_fs_state(pipe, + blitter_get_fs_texfetch_depth(ctx, tex->target, 1)); + } else { + pipe->bind_blend_state(pipe, ctx->blend[PIPE_MASK_RGBA][0]); + pipe->bind_depth_stencil_alpha_state(pipe, ctx->dsa_keep_depth_stencil); + ctx->bind_fs_state(pipe, + blitter_get_fs_texfetch_col(ctx, tex->format, tex->format, tex->target, + 1, 1, PIPE_TEX_FILTER_LINEAR)); + } + + if (tex->target == PIPE_TEXTURE_RECT) { + sampler_state = ctx->sampler_state_rect_linear; + } else { + sampler_state = ctx->sampler_state_linear; + } + pipe->bind_sampler_states(pipe, PIPE_SHADER_FRAGMENT, + 0, 1, &sampler_state); + + pipe->bind_vertex_elements_state(pipe, ctx->velem_state); + blitter_set_common_draw_rect_state(ctx, FALSE, FALSE); + + for (src_level = base_level; src_level < last_level; src_level++) { + struct pipe_box dstbox = {0}, srcbox = {0}; + unsigned dst_level = src_level + 1; + + dstbox.width = u_minify(tex->width0, dst_level); + dstbox.height = u_minify(tex->height0, dst_level); + + srcbox.width = u_minify(tex->width0, src_level); + srcbox.height = u_minify(tex->height0, src_level); + + if (tex->target == PIPE_TEXTURE_3D) { + dstbox.depth = util_max_layer(tex, dst_level) + 1; + srcbox.depth = util_max_layer(tex, src_level) + 1; + } else { + dstbox.z = srcbox.z = first_layer; + dstbox.depth = srcbox.depth = last_layer - first_layer + 1; + } + + /* Initialize the surface. */ + util_blitter_default_dst_texture(&dst_templ, tex, dst_level, + first_layer); + dst_templ.format = format; + dst_view = pipe->create_surface(pipe, tex, &dst_templ); + + /* Initialize the sampler view. */ + util_blitter_default_src_texture(&src_templ, tex, src_level); + src_templ.format = format; + src_view = pipe->create_sampler_view(pipe, tex, &src_templ); + + pipe->set_sampler_views(pipe, PIPE_SHADER_FRAGMENT, 0, 1, &src_view); + + do_blits(ctx, dst_view, &dstbox, src_view, tex->width0, tex->height0, + &srcbox, is_depth); + + pipe_surface_reference(&dst_view, NULL); + pipe_sampler_view_reference(&src_view, NULL); + } + + util_blitter_restore_vertex_states(blitter); + util_blitter_restore_fragment_states(blitter); + util_blitter_restore_textures(blitter); + util_blitter_restore_fb_state(blitter); + util_blitter_restore_render_cond(blitter); + util_blitter_unset_running_flag(blitter); +} + /* Clear a region of a color surface to a constant value. */ void util_blitter_clear_render_target(struct blitter_context *blitter, struct pipe_surface *dstsurf, @@ -1837,7 +1985,7 @@ return; /* check the saved state */ - blitter_set_running_flag(ctx); + util_blitter_set_running_flag(blitter); blitter_check_saved_vertex_states(ctx); blitter_check_saved_fragment_states(ctx); blitter_check_saved_fb_state(ctx); @@ -1872,11 +2020,11 @@ UTIL_BLITTER_ATTRIB_COLOR, color); } - blitter_restore_vertex_states(ctx); - blitter_restore_fragment_states(ctx); - blitter_restore_fb_state(ctx); - blitter_restore_render_cond(ctx); - blitter_unset_running_flag(ctx); + util_blitter_restore_vertex_states(blitter); + util_blitter_restore_fragment_states(blitter); + util_blitter_restore_fb_state(blitter); + util_blitter_restore_render_cond(blitter); + util_blitter_unset_running_flag(blitter); } /* Clear a region of a depth stencil surface. */ @@ -1899,7 +2047,7 @@ return; /* check the saved state */ - blitter_set_running_flag(ctx); + util_blitter_set_running_flag(blitter); blitter_check_saved_vertex_states(ctx); blitter_check_saved_fragment_states(ctx); blitter_check_saved_fb_state(ctx); @@ -1950,11 +2098,11 @@ UTIL_BLITTER_ATTRIB_NONE, NULL); } - blitter_restore_vertex_states(ctx); - blitter_restore_fragment_states(ctx); - blitter_restore_fb_state(ctx); - blitter_restore_render_cond(ctx); - blitter_unset_running_flag(ctx); + util_blitter_restore_vertex_states(blitter); + util_blitter_restore_fragment_states(blitter); + util_blitter_restore_fb_state(blitter); + util_blitter_restore_render_cond(blitter); + util_blitter_unset_running_flag(blitter); } /* draw a rectangle across a region using a custom dsa stage - for r600g */ @@ -1973,7 +2121,7 @@ return; /* check the saved state */ - blitter_set_running_flag(ctx); + util_blitter_set_running_flag(blitter); blitter_check_saved_vertex_states(ctx); blitter_check_saved_fragment_states(ctx); blitter_check_saved_fb_state(ctx); @@ -2009,11 +2157,11 @@ blitter->draw_rectangle(blitter, 0, 0, zsurf->width, zsurf->height, depth, UTIL_BLITTER_ATTRIB_NONE, NULL); - blitter_restore_vertex_states(ctx); - blitter_restore_fragment_states(ctx); - blitter_restore_fb_state(ctx); - blitter_restore_render_cond(ctx); - blitter_unset_running_flag(ctx); + util_blitter_restore_vertex_states(blitter); + util_blitter_restore_fragment_states(blitter); + util_blitter_restore_fb_state(blitter); + util_blitter_restore_render_cond(blitter); + util_blitter_unset_running_flag(blitter); } void util_blitter_copy_buffer(struct blitter_context *blitter, @@ -2053,7 +2201,7 @@ return; } - blitter_set_running_flag(ctx); + util_blitter_set_running_flag(blitter); blitter_check_saved_vertex_states(ctx); blitter_disable_render_cond(ctx); @@ -2077,9 +2225,9 @@ util_draw_arrays(pipe, PIPE_PRIM_POINTS, 0, size / 4); - blitter_restore_vertex_states(ctx); - blitter_restore_render_cond(ctx); - blitter_unset_running_flag(ctx); + util_blitter_restore_vertex_states(blitter); + util_blitter_restore_render_cond(blitter); + util_blitter_unset_running_flag(blitter); pipe_so_target_reference(&so_target, NULL); } @@ -2123,7 +2271,7 @@ vb.stride = 0; - blitter_set_running_flag(ctx); + util_blitter_set_running_flag(blitter); blitter_check_saved_vertex_states(ctx); blitter_disable_render_cond(ctx); @@ -2145,9 +2293,9 @@ util_draw_arrays(pipe, PIPE_PRIM_POINTS, 0, size / 4); out: - blitter_restore_vertex_states(ctx); - blitter_restore_render_cond(ctx); - blitter_unset_running_flag(ctx); + util_blitter_restore_vertex_states(blitter); + util_blitter_restore_render_cond(blitter); + util_blitter_unset_running_flag(blitter); pipe_so_target_reference(&so_target, NULL); pipe_resource_reference(&vb.buffer, NULL); } @@ -2168,7 +2316,7 @@ struct pipe_framebuffer_state fb_state; struct pipe_surface *srcsurf, *dstsurf, surf_tmpl; - blitter_set_running_flag(ctx); + util_blitter_set_running_flag(blitter); blitter_check_saved_vertex_states(ctx); blitter_check_saved_fragment_states(ctx); blitter_disable_render_cond(ctx); @@ -2207,11 +2355,11 @@ blitter_set_dst_dimensions(ctx, src->width0, src->height0); blitter->draw_rectangle(blitter, 0, 0, src->width0, src->height0, 0, 0, NULL); - blitter_restore_fb_state(ctx); - blitter_restore_vertex_states(ctx); - blitter_restore_fragment_states(ctx); - blitter_restore_render_cond(ctx); - blitter_unset_running_flag(ctx); + util_blitter_restore_fb_state(blitter); + util_blitter_restore_vertex_states(blitter); + util_blitter_restore_fragment_states(blitter); + util_blitter_restore_render_cond(blitter); + util_blitter_unset_running_flag(blitter); pipe_surface_reference(&srcsurf, NULL); pipe_surface_reference(&dstsurf, NULL); @@ -2230,7 +2378,7 @@ return; /* check the saved state */ - blitter_set_running_flag(ctx); + util_blitter_set_running_flag(blitter); blitter_check_saved_vertex_states(ctx); blitter_check_saved_fragment_states(ctx); blitter_check_saved_fb_state(ctx); @@ -2258,9 +2406,9 @@ blitter->draw_rectangle(blitter, 0, 0, dstsurf->width, dstsurf->height, 0, 0, NULL); - blitter_restore_vertex_states(ctx); - blitter_restore_fragment_states(ctx); - blitter_restore_fb_state(ctx); - blitter_restore_render_cond(ctx); - blitter_unset_running_flag(ctx); + util_blitter_restore_vertex_states(blitter); + util_blitter_restore_fragment_states(blitter); + util_blitter_restore_fb_state(blitter); + util_blitter_restore_render_cond(blitter); + util_blitter_unset_running_flag(blitter); } diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_blitter.h mesa-17.0.7/src/gallium/auxiliary/util/u_blitter.h --- mesa-12.0.6/src/gallium/auxiliary/util/u_blitter.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_blitter.h 2017-06-01 10:37:10.000000000 +0000 @@ -111,6 +111,9 @@ unsigned saved_num_sampler_views; struct pipe_sampler_view *saved_sampler_views[PIPE_MAX_SAMPLERS]; + unsigned cb_slot; + struct pipe_constant_buffer saved_fs_constant_buffer; + unsigned vb_slot; struct pipe_vertex_buffer saved_vertex_buffer; @@ -246,6 +249,12 @@ void util_blitter_blit(struct blitter_context *blitter, const struct pipe_blit_info *info); +void util_blitter_generate_mipmap(struct blitter_context *blitter, + struct pipe_resource *tex, + enum pipe_format format, + unsigned base_level, unsigned last_level, + unsigned first_layer, unsigned last_layer); + /** * Helper function to initialize a view for copy_texture_view. * The parameters must match copy_texture_view. @@ -480,6 +489,17 @@ } static inline void +util_blitter_save_fragment_constant_buffer_slot( + struct blitter_context *blitter, + struct pipe_constant_buffer *constant_buffers) +{ + pipe_resource_reference(&blitter->saved_fs_constant_buffer.buffer, + constant_buffers[blitter->cb_slot].buffer); + memcpy(&blitter->saved_fs_constant_buffer, &constant_buffers[blitter->cb_slot], + sizeof(struct pipe_constant_buffer)); +} + +static inline void util_blitter_save_vertex_buffer_slot(struct blitter_context *blitter, struct pipe_vertex_buffer *vertex_buffers) { @@ -522,6 +542,21 @@ blitter->saved_render_cond_cond = condition; } +void util_blitter_common_clear_setup(struct blitter_context *blitter, + unsigned width, unsigned height, + unsigned clear_buffers, + void *custom_blend, void *custom_dsa); + +void util_blitter_set_running_flag(struct blitter_context *blitter); +void util_blitter_unset_running_flag(struct blitter_context *blitter); + +void util_blitter_restore_vertex_states(struct blitter_context *blitter); +void util_blitter_restore_fragment_states(struct blitter_context *blitter); +void util_blitter_restore_render_cond(struct blitter_context *blitter); +void util_blitter_restore_fb_state(struct blitter_context *blitter); +void util_blitter_restore_textures(struct blitter_context *blitter); +void util_blitter_restore_constant_buffer_state(struct blitter_context *blitter); + #ifdef __cplusplus } #endif diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_box.h mesa-17.0.7/src/gallium/auxiliary/util/u_box.h --- mesa-12.0.6/src/gallium/auxiliary/util/u_box.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_box.h 2017-06-01 10:37:10.000000000 +0000 @@ -4,10 +4,8 @@ #include "pipe/p_state.h" #include "util/u_math.h" -static inline -void u_box_1d( unsigned x, - unsigned w, - struct pipe_box *box ) +static inline void +u_box_1d(unsigned x, unsigned w, struct pipe_box *box) { box->x = x; box->y = 0; @@ -17,12 +15,8 @@ box->depth = 1; } -static inline -void u_box_2d( unsigned x, - unsigned y, - unsigned w, - unsigned h, - struct pipe_box *box ) +static inline void +u_box_2d(unsigned x,unsigned y, unsigned w, unsigned h, struct pipe_box *box) { box->x = x; box->y = y; @@ -32,10 +26,8 @@ box->depth = 1; } -static inline -void u_box_origin_2d( unsigned w, - unsigned h, - struct pipe_box *box ) +static inline void +u_box_origin_2d(unsigned w, unsigned h, struct pipe_box *box) { box->x = 0; box->y = 0; @@ -45,13 +37,9 @@ box->depth = 1; } -static inline -void u_box_2d_zslice( unsigned x, - unsigned y, - unsigned z, - unsigned w, - unsigned h, - struct pipe_box *box ) +static inline void +u_box_2d_zslice(unsigned x, unsigned y, unsigned z, + unsigned w, unsigned h, struct pipe_box *box) { box->x = x; box->y = y; @@ -61,14 +49,10 @@ box->depth = 1; } -static inline -void u_box_3d( unsigned x, - unsigned y, - unsigned z, - unsigned w, - unsigned h, - unsigned d, - struct pipe_box *box ) +static inline void +u_box_3d(unsigned x, unsigned y, unsigned z, + unsigned w, unsigned h, unsigned d, + struct pipe_box *box) { box->x = x; box->y = y; diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_clear.h mesa-17.0.7/src/gallium/auxiliary/util/u_clear.h --- mesa-12.0.6/src/gallium/auxiliary/util/u_clear.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_clear.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,63 +0,0 @@ -/************************************************************************** - * - * Copyright 2009 VMware, Inc. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE - * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ - -/* Authors: - * Michel Dänzer - */ - - -#include "pipe/p_context.h" -#include "pipe/p_state.h" - - -/** - * Clear the given buffers to the specified values. - * No masking, no scissor (clear entire buffer). - */ -static inline void -util_clear(struct pipe_context *pipe, - struct pipe_framebuffer_state *framebuffer, unsigned buffers, - const union pipe_color_union *color, double depth, unsigned stencil) -{ - unsigned i; - - for (i = 0; i < framebuffer->nr_cbufs; i++) { - if (buffers & (PIPE_CLEAR_COLOR0 << i)) { - struct pipe_surface *ps = framebuffer->cbufs[i]; - - if (ps) { - pipe->clear_render_target(pipe, ps, color, 0, 0, ps->width, ps->height); - } - } - } - - if (buffers & PIPE_CLEAR_DEPTHSTENCIL) { - struct pipe_surface *ps = framebuffer->zsbuf; - pipe->clear_depth_stencil(pipe, ps, buffers & PIPE_CLEAR_DEPTHSTENCIL, - depth, stencil, - 0, 0, ps->width, ps->height); - } -} diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_cpu_detect.c mesa-17.0.7/src/gallium/auxiliary/util/u_cpu_detect.c --- mesa-12.0.6/src/gallium/auxiliary/util/u_cpu_detect.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_cpu_detect.c 2017-06-01 10:37:10.000000000 +0000 @@ -369,6 +369,7 @@ ((regs2[2] >> 27) & 1) && // OSXSAVE ((xgetbv() & 6) == 6); // XMM & YMM util_cpu_caps.has_f16c = ((regs2[2] >> 29) & 1) && util_cpu_caps.has_avx; + util_cpu_caps.has_fma = ((regs2[2] >> 12) & 1) && util_cpu_caps.has_avx; util_cpu_caps.has_mmx2 = util_cpu_caps.has_sse; /* SSE cpus supports mmxext too */ #if defined(PIPE_ARCH_X86_64) util_cpu_caps.has_daz = 1; @@ -387,6 +388,23 @@ util_cpu_caps.has_avx2 = (regs7[1] >> 5) & 1; } + // check for avx512 + if (((regs2[2] >> 27) & 1) && // OSXSAVE + (xgetbv() & (0x7 << 5)) && // OPMASK: upper-256 enabled by OS + ((xgetbv() & 6) == 6)) { // XMM/YMM enabled by OS + uint32_t regs3[4]; + cpuid(0x00000007, regs3); + util_cpu_caps.has_avx512f = (regs3[1] >> 16) & 1; + util_cpu_caps.has_avx512dq = (regs3[1] >> 17) & 1; + util_cpu_caps.has_avx512ifma = (regs3[1] >> 21) & 1; + util_cpu_caps.has_avx512pf = (regs3[1] >> 26) & 1; + util_cpu_caps.has_avx512er = (regs3[1] >> 27) & 1; + util_cpu_caps.has_avx512cd = (regs3[1] >> 28) & 1; + util_cpu_caps.has_avx512bw = (regs3[1] >> 30) & 1; + util_cpu_caps.has_avx512vl = (regs3[1] >> 31) & 1; + util_cpu_caps.has_avx512vbmi = (regs3[2] >> 1) & 1; + } + if (regs[1] == 0x756e6547 && regs[2] == 0x6c65746e && regs[3] == 0x49656e69) { /* GenuineIntel */ util_cpu_caps.has_intel = 1; @@ -454,6 +472,15 @@ debug_printf("util_cpu_caps.has_xop = %u\n", util_cpu_caps.has_xop); debug_printf("util_cpu_caps.has_altivec = %u\n", util_cpu_caps.has_altivec); debug_printf("util_cpu_caps.has_daz = %u\n", util_cpu_caps.has_daz); + debug_printf("util_cpu_caps.has_avx512f = %u\n", util_cpu_caps.has_avx512f); + debug_printf("util_cpu_caps.has_avx512dq = %u\n", util_cpu_caps.has_avx512dq); + debug_printf("util_cpu_caps.has_avx512ifma = %u\n", util_cpu_caps.has_avx512ifma); + debug_printf("util_cpu_caps.has_avx512pf = %u\n", util_cpu_caps.has_avx512pf); + debug_printf("util_cpu_caps.has_avx512er = %u\n", util_cpu_caps.has_avx512er); + debug_printf("util_cpu_caps.has_avx512cd = %u\n", util_cpu_caps.has_avx512cd); + debug_printf("util_cpu_caps.has_avx512bw = %u\n", util_cpu_caps.has_avx512bw); + debug_printf("util_cpu_caps.has_avx512vl = %u\n", util_cpu_caps.has_avx512vl); + debug_printf("util_cpu_caps.has_avx512vbmi = %u\n", util_cpu_caps.has_avx512vbmi); } #endif diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_cpu_detect.h mesa-17.0.7/src/gallium/auxiliary/util/u_cpu_detect.h --- mesa-12.0.6/src/gallium/auxiliary/util/u_cpu_detect.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_cpu_detect.h 2017-06-01 10:37:10.000000000 +0000 @@ -66,11 +66,22 @@ unsigned has_avx:1; unsigned has_avx2:1; unsigned has_f16c:1; + unsigned has_fma:1; unsigned has_3dnow:1; unsigned has_3dnow_ext:1; unsigned has_xop:1; unsigned has_altivec:1; unsigned has_daz:1; + + unsigned has_avx512f:1; + unsigned has_avx512dq:1; + unsigned has_avx512ifma:1; + unsigned has_avx512pf:1; + unsigned has_avx512er:1; + unsigned has_avx512cd:1; + unsigned has_avx512bw:1; + unsigned has_avx512vl:1; + unsigned has_avx512vbmi:1; }; extern struct util_cpu_caps diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_debug.c mesa-17.0.7/src/gallium/auxiliary/util/u_debug.c --- mesa-12.0.6/src/gallium/auxiliary/util/u_debug.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_debug.c 2017-06-01 10:37:10.000000000 +0000 @@ -203,25 +203,16 @@ const char *str; str = os_get_option(name); - if (!str) + if (!str) { result = dfault; - else { - long sign; - char c; - c = *str++; - if (c == '-') { - sign = -1; - c = *str++; - } - else { - sign = 1; - } - result = 0; - while ('0' <= c && c <= '9') { - result = result*10 + (c - '0'); - c = *str++; + } else { + char *endptr; + + result = strtol(str, &endptr, 0); + if (str == endptr) { + /* Restore the default value when no digits were found. */ + result = dfault; } - result *= sign; } if (debug_get_option_should_print()) @@ -526,8 +517,6 @@ DEBUG_NAMED_VALUE(PIPE_BIND_INDEX_BUFFER), DEBUG_NAMED_VALUE(PIPE_BIND_CONSTANT_BUFFER), DEBUG_NAMED_VALUE(PIPE_BIND_DISPLAY_TARGET), - DEBUG_NAMED_VALUE(PIPE_BIND_TRANSFER_WRITE), - DEBUG_NAMED_VALUE(PIPE_BIND_TRANSFER_READ), DEBUG_NAMED_VALUE(PIPE_BIND_STREAM_OUTPUT), DEBUG_NAMED_VALUE(PIPE_BIND_CURSOR), DEBUG_NAMED_VALUE(PIPE_BIND_CUSTOM), diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_debug.h mesa-17.0.7/src/gallium/auxiliary/util/u_debug.h --- mesa-12.0.6/src/gallium/auxiliary/util/u_debug.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_debug.h 2017-06-01 10:37:10.000000000 +0000 @@ -39,13 +39,13 @@ #define U_DEBUG_H_ +#include "os/os_misc.h" + #if defined(PIPE_OS_HAIKU) /* Haiku provides debug_printf in libroot with OS.h */ #include #endif -#include "os/os_misc.h" - #include "pipe/p_format.h" #include "pipe/p_defines.h" diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_dump.h mesa-17.0.7/src/gallium/auxiliary/util/u_dump.h --- mesa-12.0.6/src/gallium/auxiliary/util/u_dump.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_dump.h 2017-06-01 10:37:10.000000000 +0000 @@ -159,6 +159,9 @@ util_dump_image_view(FILE *stream, const struct pipe_image_view *state); void +util_dump_shader_buffer(FILE *stream, const struct pipe_shader_buffer *state); + +void util_dump_sampler_view(FILE *stream, const struct pipe_sampler_view *state); void diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_dump_state.c mesa-17.0.7/src/gallium/auxiliary/util/u_dump_state.c --- mesa-12.0.6/src/gallium/auxiliary/util/u_dump_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_dump_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -722,8 +722,8 @@ util_dump_member(stream, format, state, format); if (state->resource->target == PIPE_BUFFER) { - util_dump_member(stream, uint, state, u.buf.first_element); - util_dump_member(stream, uint, state, u.buf.last_element); + util_dump_member(stream, uint, state, u.buf.offset); + util_dump_member(stream, uint, state, u.buf.size); } else { util_dump_member(stream, uint, state, u.tex.first_layer); @@ -736,6 +736,25 @@ void +util_dump_shader_buffer(FILE *stream, const struct pipe_shader_buffer *state) +{ + if (!state) { + util_dump_null(stream); + return; + } + + util_dump_struct_begin(stream, "pipe_shader_buffer"); + + util_dump_member(stream, ptr, state, buffer); + util_dump_member(stream, uint, state, buffer_offset); + util_dump_member(stream, uint, state, buffer_size); + + util_dump_struct_end(stream); + +} + + +void util_dump_sampler_view(FILE *stream, const struct pipe_sampler_view *state) { if (!state) { @@ -750,8 +769,8 @@ util_dump_member(stream, ptr, state, texture); if (state->target == PIPE_BUFFER) { - util_dump_member(stream, uint, state, u.buf.first_element); - util_dump_member(stream, uint, state, u.buf.last_element); + util_dump_member(stream, uint, state, u.buf.offset); + util_dump_member(stream, uint, state, u.buf.size); } else { util_dump_member(stream, uint, state, u.tex.first_layer); diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_format.c mesa-17.0.7/src/gallium/auxiliary/util/u_format.c --- mesa-12.0.6/src/gallium/auxiliary/util/u_format.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_format.c 2017-06-01 10:37:10.000000000 +0000 @@ -457,6 +457,30 @@ format_desc->pack_rgba_sint(dst_row, dst_stride, src_row, src_stride, w, h); } +/** + * Check if we can safely memcopy from the source format to the dest format. + * This basically covers the cases of a "used" channel copied to a typeless + * channel, plus some 1-channel cases. + * Examples of compatible copy formats include: + * b8g8r8a8_unorm -> b8g8r8x8_unorm + * a8r8g8b8_unorm -> x8r8g8b8_unorm + * b5g5r5a1_unorm -> b5g5r5x1_unorm + * b4g4r4a4_unorm -> b4g4r4x4_unorm + * l8_unorm -> r8_unorm + * i8_unorm -> l8_unorm + * i8_unorm -> a8_unorm + * i8_unorm -> r8_unorm + * l16_unorm -> r16_unorm + * z24_unorm_s8_uint -> z24x8_unorm + * s8_uint_z24_unorm -> x8z24_unorm + * r8g8b8a8_unorm -> r8g8b8x8_unorm + * a8b8g8r8_srgb -> x8b8g8r8_srgb + * b8g8r8a8_srgb -> b8g8r8x8_srgb + * a8r8g8b8_srgb -> x8r8g8b8_srgb + * a8b8g8r8_unorm -> x8b8g8r8_unorm + * r10g10b10a2_uscaled -> r10g10b10x2_uscaled + * r10sg10sb10sa2u_norm -> r10g10b10x2_snorm + */ boolean util_is_format_compatible(const struct util_format_description *src_desc, const struct util_format_description *dst_desc) @@ -537,6 +561,11 @@ return TRUE; return FALSE; + case UTIL_FORMAT_LAYOUT_ETC: + if (format_desc->format == PIPE_FORMAT_ETC1_RGB8) + return TRUE; + return FALSE; + case UTIL_FORMAT_LAYOUT_PLAIN: /* * For these we can find a generic rule. diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_format_other.c mesa-17.0.7/src/gallium/auxiliary/util/u_format_other.c --- mesa-12.0.6/src/gallium/auxiliary/util/u_format_other.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_format_other.c 2017-06-01 10:37:10.000000000 +0000 @@ -28,8 +28,8 @@ #include "u_math.h" #include "u_format_other.h" -#include "u_format_rgb9e5.h" -#include "u_format_r11g11b10f.h" +#include "util/format_rgb9e5.h" +#include "util/format_r11g11b10f.h" void diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_format_r11g11b10f.h mesa-17.0.7/src/gallium/auxiliary/util/u_format_r11g11b10f.h --- mesa-12.0.6/src/gallium/auxiliary/util/u_format_r11g11b10f.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_format_r11g11b10f.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,232 +0,0 @@ -/* - * Copyright (C) 2011 Marek Olšák - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -/* Based on code from The OpenGL Programming Guide / 7th Edition, Appendix J. - * Available here: http://www.opengl-redbook.com/appendices/ - * The algorithm in the book contains a bug though, which is fixed in the code - * below. - */ - -#define UF11(e, m) ((e << 6) | (m)) -#define UF11_EXPONENT_BIAS 15 -#define UF11_EXPONENT_BITS 0x1F -#define UF11_EXPONENT_SHIFT 6 -#define UF11_MANTISSA_BITS 0x3F -#define UF11_MANTISSA_SHIFT (23 - UF11_EXPONENT_SHIFT) -#define UF11_MAX_EXPONENT (UF11_EXPONENT_BITS << UF11_EXPONENT_SHIFT) - -#define UF10(e, m) ((e << 5) | (m)) -#define UF10_EXPONENT_BIAS 15 -#define UF10_EXPONENT_BITS 0x1F -#define UF10_EXPONENT_SHIFT 5 -#define UF10_MANTISSA_BITS 0x1F -#define UF10_MANTISSA_SHIFT (23 - UF10_EXPONENT_SHIFT) -#define UF10_MAX_EXPONENT (UF10_EXPONENT_BITS << UF10_EXPONENT_SHIFT) - -#define F32_INFINITY 0x7f800000 - -static inline unsigned f32_to_uf11(float val) -{ - union { - float f; - uint32_t ui; - } f32 = {val}; - - uint16_t uf11 = 0; - - /* Decode little-endian 32-bit floating-point value */ - int sign = (f32.ui >> 16) & 0x8000; - /* Map exponent to the range [-127,128] */ - int exponent = ((f32.ui >> 23) & 0xff) - 127; - int mantissa = f32.ui & 0x007fffff; - - if (exponent == 128) { /* Infinity or NaN */ - /* From the GL_EXT_packed_float spec: - * - * "Additionally: negative infinity is converted to zero; positive - * infinity is converted to positive infinity; and both positive and - * negative NaN are converted to positive NaN." - */ - uf11 = UF11_MAX_EXPONENT; - if (mantissa) { - uf11 |= 1; /* NaN */ - } else { - if (sign) - uf11 = 0; /* 0.0 */ - } - } else if (sign) { - return 0; - } else if (val > 65024.0f) { - /* From the GL_EXT_packed_float spec: - * - * "Likewise, finite positive values greater than 65024 (the maximum - * finite representable unsigned 11-bit floating-point value) are - * converted to 65024." - */ - uf11 = UF11(30, 63); - } - else if (exponent > -15) { /* Representable value */ - exponent += UF11_EXPONENT_BIAS; - mantissa >>= UF11_MANTISSA_SHIFT; - uf11 = exponent << UF11_EXPONENT_SHIFT | mantissa; - } - - return uf11; -} - -static inline float uf11_to_f32(uint16_t val) -{ - union { - float f; - uint32_t ui; - } f32; - - int exponent = (val & 0x07c0) >> UF11_EXPONENT_SHIFT; - int mantissa = (val & 0x003f); - - f32.f = 0.0; - - if (exponent == 0) { - if (mantissa != 0) { - const float scale = 1.0 / (1 << 20); - f32.f = scale * mantissa; - } - } - else if (exponent == 31) { - f32.ui = F32_INFINITY | mantissa; - } - else { - float scale, decimal; - exponent -= 15; - if (exponent < 0) { - scale = 1.0f / (1 << -exponent); - } - else { - scale = (float) (1 << exponent); - } - decimal = 1.0f + (float) mantissa / 64; - f32.f = scale * decimal; - } - - return f32.f; -} - -static inline unsigned f32_to_uf10(float val) -{ - union { - float f; - uint32_t ui; - } f32 = {val}; - - uint16_t uf10 = 0; - - /* Decode little-endian 32-bit floating-point value */ - int sign = (f32.ui >> 16) & 0x8000; - /* Map exponent to the range [-127,128] */ - int exponent = ((f32.ui >> 23) & 0xff) - 127; - int mantissa = f32.ui & 0x007fffff; - - if (exponent == 128) { - /* From the GL_EXT_packed_float spec: - * - * "Additionally: negative infinity is converted to zero; positive - * infinity is converted to positive infinity; and both positive and - * negative NaN are converted to positive NaN." - */ - uf10 = UF10_MAX_EXPONENT; - if (mantissa) { - uf10 |= 1; /* NaN */ - } else { - if (sign) - uf10 = 0; /* 0.0 */ - } - } else if (sign) { - return 0; - } else if (val > 64512.0f) { - /* From the GL_EXT_packed_float spec: - * - * "Likewise, finite positive values greater than 64512 (the maximum - * finite representable unsigned 10-bit floating-point value) are - * converted to 64512." - */ - uf10 = UF10(30, 31); - } - else if (exponent > -15) { /* Representable value */ - exponent += UF10_EXPONENT_BIAS; - mantissa >>= UF10_MANTISSA_SHIFT; - uf10 = exponent << UF10_EXPONENT_SHIFT | mantissa; - } - - return uf10; -} - -static inline float uf10_to_f32(uint16_t val) -{ - union { - float f; - uint32_t ui; - } f32; - - int exponent = (val & 0x03e0) >> UF10_EXPONENT_SHIFT; - int mantissa = (val & 0x001f); - - f32.f = 0.0; - - if (exponent == 0) { - if (mantissa != 0) { - const float scale = 1.0 / (1 << 19); - f32.f = scale * mantissa; - } - } - else if (exponent == 31) { - f32.ui = F32_INFINITY | mantissa; - } - else { - float scale, decimal; - exponent -= 15; - if (exponent < 0) { - scale = 1.0f / (1 << -exponent); - } - else { - scale = (float) (1 << exponent); - } - decimal = 1.0f + (float) mantissa / 32; - f32.f = scale * decimal; - } - - return f32.f; -} - -static inline unsigned float3_to_r11g11b10f(const float rgb[3]) -{ - return ( f32_to_uf11(rgb[0]) & 0x7ff) | - ((f32_to_uf11(rgb[1]) & 0x7ff) << 11) | - ((f32_to_uf10(rgb[2]) & 0x3ff) << 22); -} - -static inline void r11g11b10f_to_float3(unsigned rgb, float retval[3]) -{ - retval[0] = uf11_to_f32( rgb & 0x7ff); - retval[1] = uf11_to_f32((rgb >> 11) & 0x7ff); - retval[2] = uf10_to_f32((rgb >> 22) & 0x3ff); -} diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_format_rgb9e5.h mesa-17.0.7/src/gallium/auxiliary/util/u_format_rgb9e5.h --- mesa-12.0.6/src/gallium/auxiliary/util/u_format_rgb9e5.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_format_rgb9e5.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,161 +0,0 @@ -/* - * Copyright (C) 2011 Marek Olšák - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -/* Copied from EXT_texture_shared_exponent and edited, getting rid of - * expensive float math bits too. */ - -#ifndef RGB9E5_H -#define RGB9E5_H - -#include - -#include "c99_math.h" - -#define RGB9E5_EXPONENT_BITS 5 -#define RGB9E5_MANTISSA_BITS 9 -#define RGB9E5_EXP_BIAS 15 -#define RGB9E5_MAX_VALID_BIASED_EXP 31 - -#define MAX_RGB9E5_EXP (RGB9E5_MAX_VALID_BIASED_EXP - RGB9E5_EXP_BIAS) -#define RGB9E5_MANTISSA_VALUES (1< 0x7f800000) - /* catches neg, NaNs */ - return 0; - else if (f.raw >= max.raw) - return max.raw; - else - return f.raw; -} - -static inline unsigned float3_to_rgb9e5(const float rgb[3]) -{ - rgb9e5 retval; - int rm, gm, bm, exp_shared; - float754 revdenom = {0}; - float754 rc, bc, gc, maxrgb; - - rc.raw = rgb9e5_ClampRange(rgb[0]); - gc.raw = rgb9e5_ClampRange(rgb[1]); - bc.raw = rgb9e5_ClampRange(rgb[2]); - maxrgb.raw = MAX3(rc.raw, gc.raw, bc.raw); - - /* - * Compared to what the spec suggests, instead of conditionally adjusting - * the exponent after the fact do it here by doing the equivalent of +0.5 - - * the int add will spill over into the exponent in this case. - */ - maxrgb.raw += maxrgb.raw & (1 << (23-9)); - exp_shared = MAX2((maxrgb.raw >> 23), -RGB9E5_EXP_BIAS - 1 + 127) + - 1 + RGB9E5_EXP_BIAS - 127; - revdenom.field.biasedexponent = 127 - (exp_shared - RGB9E5_EXP_BIAS - - RGB9E5_MANTISSA_BITS) + 1; - assert(exp_shared <= RGB9E5_MAX_VALID_BIASED_EXP); - - /* - * The spec uses strict round-up behavior (d3d10 disagrees, but in any case - * must match what is done above for figuring out exponent). - * We avoid the doubles ((int) rc * revdenom + 0.5) by doing the rounding - * ourselves (revdenom was adjusted by +1, above). - */ - rm = (int) (rc.value * revdenom.value); - gm = (int) (gc.value * revdenom.value); - bm = (int) (bc.value * revdenom.value); - rm = (rm & 1) + (rm >> 1); - gm = (gm & 1) + (gm >> 1); - bm = (bm & 1) + (bm >> 1); - - assert(rm <= MAX_RGB9E5_MANTISSA); - assert(gm <= MAX_RGB9E5_MANTISSA); - assert(bm <= MAX_RGB9E5_MANTISSA); - assert(rm >= 0); - assert(gm >= 0); - assert(bm >= 0); - - retval.field.r = rm; - retval.field.g = gm; - retval.field.b = bm; - retval.field.biasedexponent = exp_shared; - - return retval.raw; -} - -static inline void rgb9e5_to_float3(unsigned rgb, float retval[3]) -{ - rgb9e5 v; - int exponent; - float754 scale = {0}; - - v.raw = rgb; - exponent = v.field.biasedexponent - RGB9E5_EXP_BIAS - RGB9E5_MANTISSA_BITS; - scale.field.biasedexponent = exponent + 127; - - retval[0] = v.field.r * scale.value; - retval[1] = v.field.g * scale.value; - retval[2] = v.field.b * scale.value; -} - -#endif diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_format_s3tc.c mesa-17.0.7/src/gallium/auxiliary/util/u_format_s3tc.c --- mesa-12.0.6/src/gallium/auxiliary/util/u_format_s3tc.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_format_s3tc.c 2017-06-01 10:37:10.000000000 +0000 @@ -32,6 +32,8 @@ #if defined(_WIN32) || defined(WIN32) #define DXTN_LIBNAME "dxtn.dll" +#elif defined(__CYGWIN__) +#define DXTN_LIBNAME "cygtxc_dxtn.dll" #elif defined(__APPLE__) #define DXTN_LIBNAME "libtxc_dxtn.dylib" #else diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_framebuffer.c mesa-17.0.7/src/gallium/auxiliary/util/u_framebuffer.c --- mesa-12.0.6/src/gallium/auxiliary/util/u_framebuffer.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_framebuffer.c 2017-06-01 10:37:10.000000000 +0000 @@ -86,22 +86,37 @@ { unsigned i; - dst->width = src->width; - dst->height = src->height; + if (src) { + dst->width = src->width; + dst->height = src->height; - dst->samples = src->samples; - dst->layers = src->layers; + dst->samples = src->samples; + dst->layers = src->layers; - for (i = 0; i < src->nr_cbufs; i++) - pipe_surface_reference(&dst->cbufs[i], src->cbufs[i]); + for (i = 0; i < src->nr_cbufs; i++) + pipe_surface_reference(&dst->cbufs[i], src->cbufs[i]); - /* Set remaining dest cbuf pointers to NULL */ - for ( ; i < ARRAY_SIZE(dst->cbufs); i++) - pipe_surface_reference(&dst->cbufs[i], NULL); + /* Set remaining dest cbuf pointers to NULL */ + for ( ; i < ARRAY_SIZE(dst->cbufs); i++) + pipe_surface_reference(&dst->cbufs[i], NULL); - dst->nr_cbufs = src->nr_cbufs; + dst->nr_cbufs = src->nr_cbufs; - pipe_surface_reference(&dst->zsbuf, src->zsbuf); + pipe_surface_reference(&dst->zsbuf, src->zsbuf); + } else { + dst->width = 0; + dst->height = 0; + + dst->samples = 0; + dst->layers = 0; + + for (i = 0 ; i < ARRAY_SIZE(dst->cbufs); i++) + pipe_surface_reference(&dst->cbufs[i], NULL); + + dst->nr_cbufs = 0; + + pipe_surface_reference(&dst->zsbuf, NULL); + } } diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_hash.c mesa-17.0.7/src/gallium/auxiliary/util/u_hash.c --- mesa-12.0.6/src/gallium/auxiliary/util/u_hash.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_hash.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,121 +0,0 @@ -/************************************************************************** - * - * Copyright 2008 VMware, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE - * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ - -/** - * @file - * Hash functions implementation. - * - * @author Jose Fonseca - */ - - -#include "u_hash.h" - - -static const uint32_t -util_crc32_table[256] = { - 0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, - 0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3, - 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988, - 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91, - 0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de, - 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7, - 0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, - 0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5, - 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172, - 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, - 0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940, - 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59, - 0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, - 0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f, - 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924, - 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, - 0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a, - 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433, - 0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, - 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01, - 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, - 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, - 0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c, - 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65, - 0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, - 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb, - 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0, - 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9, - 0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086, - 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f, - 0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, - 0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad, - 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a, - 0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683, - 0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8, - 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1, - 0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, - 0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7, - 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc, - 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, - 0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252, - 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b, - 0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, - 0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79, - 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, - 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, - 0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, - 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d, - 0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, - 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713, - 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, - 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, - 0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e, - 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777, - 0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, - 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45, - 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2, - 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, - 0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0, - 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9, - 0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, - 0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf, - 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94, - 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d -}; - - -/** - * @sa http://www.w3.org/TR/PNG/#D-CRCAppendix - */ -uint32_t -util_hash_crc32(const void *data, size_t size) -{ - uint8_t *p = (uint8_t *)data; - uint32_t crc = 0xffffffff; - - while (size--) - crc = util_crc32_table[(crc ^ *p++) & 0xff] ^ (crc >> 8); - - return crc; -} diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_hash.h mesa-17.0.7/src/gallium/auxiliary/util/u_hash.h --- mesa-12.0.6/src/gallium/auxiliary/util/u_hash.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_hash.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,55 +0,0 @@ -/************************************************************************** - * - * Copyright 2008 VMware, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE - * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ - -/** - * @file - * Hash functions. - * - * @author Jose Fonseca - */ - -#ifndef U_HASH_H_ -#define U_HASH_H_ - - -#include "pipe/p_compiler.h" - - -#ifdef __cplusplus -extern "C" { -#endif - - -uint32_t -util_hash_crc32(const void *data, size_t size); - - -#ifdef __cplusplus -} -#endif - -#endif /* U_HASH_H_ */ diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_index_modify.c mesa-17.0.7/src/gallium/auxiliary/util/u_index_modify.c --- mesa-12.0.6/src/gallium/auxiliary/util/u_index_modify.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_index_modify.c 2017-06-01 10:37:10.000000000 +0000 @@ -28,6 +28,7 @@ void util_shorten_ubyte_elts_to_userptr(struct pipe_context *context, struct pipe_index_buffer *ib, + unsigned add_transfer_flags, int index_bias, unsigned start, unsigned count, @@ -43,7 +44,7 @@ } else { in_map = pipe_buffer_map(context, ib->buffer, PIPE_TRANSFER_READ | - PIPE_TRANSFER_UNSYNCHRONIZED, + add_transfer_flags, &src_transfer); } in_map += start; @@ -58,37 +59,11 @@ pipe_buffer_unmap(context, src_transfer); } -void util_shorten_ubyte_elts(struct pipe_context *context, - struct pipe_index_buffer *ib, - struct pipe_resource **out_buf, - int index_bias, - unsigned start, - unsigned count) -{ - struct pipe_resource* new_elts; - unsigned short *out_map; - struct pipe_transfer *dst_transfer; - - new_elts = pipe_buffer_create(context->screen, - PIPE_BIND_INDEX_BUFFER, - PIPE_USAGE_DEFAULT, - 2 * count); - - out_map = pipe_buffer_map(context, new_elts, PIPE_TRANSFER_WRITE, - &dst_transfer); - util_shorten_ubyte_elts_to_userptr(context, ib, index_bias, - start, count, out_map); - pipe_buffer_unmap(context, dst_transfer); - - pipe_resource_reference(out_buf, NULL); - *out_buf = new_elts; -} - - /* Ushort indices. */ void util_rebuild_ushort_elts_to_userptr(struct pipe_context *context, struct pipe_index_buffer *ib, + unsigned add_transfer_flags, int index_bias, unsigned start, unsigned count, void *out) @@ -103,7 +78,7 @@ } else { in_map = pipe_buffer_map(context, ib->buffer, PIPE_TRANSFER_READ | - PIPE_TRANSFER_UNSYNCHRONIZED, + add_transfer_flags, &in_transfer); } in_map += start; @@ -118,36 +93,11 @@ pipe_buffer_unmap(context, in_transfer); } -void util_rebuild_ushort_elts(struct pipe_context *context, - struct pipe_index_buffer *ib, - struct pipe_resource **out_buf, - int index_bias, - unsigned start, unsigned count) -{ - struct pipe_transfer *out_transfer = NULL; - struct pipe_resource *new_elts; - unsigned short *out_map; - - new_elts = pipe_buffer_create(context->screen, - PIPE_BIND_INDEX_BUFFER, - PIPE_USAGE_DEFAULT, - 2 * count); - - out_map = pipe_buffer_map(context, new_elts, - PIPE_TRANSFER_WRITE, &out_transfer); - util_rebuild_ushort_elts_to_userptr(context, ib, index_bias, - start, count, out_map); - pipe_buffer_unmap(context, out_transfer); - - pipe_resource_reference(out_buf, NULL); - *out_buf = new_elts; -} - - /* Uint indices. */ void util_rebuild_uint_elts_to_userptr(struct pipe_context *context, struct pipe_index_buffer *ib, + unsigned add_transfer_flags, int index_bias, unsigned start, unsigned count, void *out) @@ -162,7 +112,7 @@ } else { in_map = pipe_buffer_map(context, ib->buffer, PIPE_TRANSFER_READ | - PIPE_TRANSFER_UNSYNCHRONIZED, + add_transfer_flags, &in_transfer); } in_map += start; @@ -176,28 +126,3 @@ if (in_transfer) pipe_buffer_unmap(context, in_transfer); } - -void util_rebuild_uint_elts(struct pipe_context *context, - struct pipe_index_buffer *ib, - struct pipe_resource **out_buf, - int index_bias, - unsigned start, unsigned count) -{ - struct pipe_transfer *out_transfer = NULL; - struct pipe_resource *new_elts; - unsigned int *out_map; - - new_elts = pipe_buffer_create(context->screen, - PIPE_BIND_INDEX_BUFFER, - PIPE_USAGE_DEFAULT, - 2 * count); - - out_map = pipe_buffer_map(context, new_elts, - PIPE_TRANSFER_WRITE, &out_transfer); - util_rebuild_uint_elts_to_userptr(context, ib, index_bias, - start, count, out_map); - pipe_buffer_unmap(context, out_transfer); - - pipe_resource_reference(out_buf, NULL); - *out_buf = new_elts; -} diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_index_modify.h mesa-17.0.7/src/gallium/auxiliary/util/u_index_modify.h --- mesa-12.0.6/src/gallium/auxiliary/util/u_index_modify.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_index_modify.h 2017-06-01 10:37:10.000000000 +0000 @@ -29,44 +29,24 @@ void util_shorten_ubyte_elts_to_userptr(struct pipe_context *context, struct pipe_index_buffer *ib, + unsigned add_transfer_flags, int index_bias, unsigned start, unsigned count, void *out); -void util_shorten_ubyte_elts(struct pipe_context *context, - struct pipe_index_buffer *ib, - struct pipe_resource **out_buf, - int index_bias, - unsigned start, - unsigned count); - - - void util_rebuild_ushort_elts_to_userptr(struct pipe_context *context, struct pipe_index_buffer *ib, + unsigned add_transfer_flags, int index_bias, unsigned start, unsigned count, void *out); -void util_rebuild_ushort_elts(struct pipe_context *context, - struct pipe_index_buffer *ib, - struct pipe_resource **out_buf, - int index_bias, - unsigned start, unsigned count); - - - void util_rebuild_uint_elts_to_userptr(struct pipe_context *context, struct pipe_index_buffer *ib, + unsigned add_transfer_flags, int index_bias, unsigned start, unsigned count, void *out); -void util_rebuild_uint_elts(struct pipe_context *context, - struct pipe_index_buffer *ib, - struct pipe_resource **out_buf, - int index_bias, - unsigned start, unsigned count); - #endif diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_inlines.h mesa-17.0.7/src/gallium/auxiliary/util/u_inlines.h --- mesa-12.0.6/src/gallium/auxiliary/util/u_inlines.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_inlines.h 2017-06-01 10:37:10.000000000 +0000 @@ -136,8 +136,10 @@ struct pipe_resource *old_tex = *ptr; if (pipe_reference_described(&(*ptr)->reference, &tex->reference, - (debug_reference_descriptor)debug_describe_resource)) + (debug_reference_descriptor)debug_describe_resource)) { + pipe_resource_reference(&old_tex->next, NULL); old_tex->screen->resource_destroy(old_tex->screen, old_tex); + } *ptr = tex; } @@ -339,25 +341,8 @@ unsigned size, const void *data) { - struct pipe_box box; - unsigned access = PIPE_TRANSFER_WRITE; - - if (offset == 0 && size == buf->width0) { - access |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE; - } else { - access |= PIPE_TRANSFER_DISCARD_RANGE; - } - - u_box_1d(offset, size, &box); - - pipe->transfer_inline_write( pipe, - buf, - 0, - access, - &box, - data, - size, - 0); + /* Don't set any other usage bits. Drivers should derive them. */ + pipe->buffer_subdata(pipe, buf, PIPE_TRANSFER_WRITE, offset, size, data); } /** @@ -372,18 +357,10 @@ unsigned offset, unsigned size, const void *data) { - struct pipe_box box; - - u_box_1d(offset, size, &box); - - pipe->transfer_inline_write(pipe, - buf, - 0, - (PIPE_TRANSFER_WRITE | - PIPE_TRANSFER_UNSYNCHRONIZED), - &box, - data, - 0, 0); + pipe->buffer_subdata(pipe, buf, + (PIPE_TRANSFER_WRITE | + PIPE_TRANSFER_UNSYNCHRONIZED), + offset, size, data); } @@ -626,10 +603,17 @@ util_copy_image_view(struct pipe_image_view *dst, const struct pipe_image_view *src) { - pipe_resource_reference(&dst->resource, src->resource); - dst->format = src->format; - dst->access = src->access; - dst->u = src->u; + if (src) { + pipe_resource_reference(&dst->resource, src->resource); + dst->format = src->format; + dst->access = src->access; + dst->u = src->u; + } else { + pipe_resource_reference(&dst->resource, NULL); + dst->format = PIPE_FORMAT_NONE; + dst->access = 0; + memset(&dst->u, 0, sizeof(dst->u)); + } } static inline unsigned @@ -650,6 +634,18 @@ } } +static inline bool +util_texrange_covers_whole_level(const struct pipe_resource *tex, + unsigned level, unsigned x, unsigned y, + unsigned z, unsigned width, + unsigned height, unsigned depth) +{ + return x == 0 && y == 0 && z == 0 && + width == u_minify(tex->width0, level) && + height == u_minify(tex->height0, level) && + depth == util_max_layer(tex, level) + 1; +} + #ifdef __cplusplus } #endif diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_math.h mesa-17.0.7/src/gallium/auxiliary/util/u_math.h --- mesa-12.0.6/src/gallium/auxiliary/util/u_math.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_math.h 2017-06-01 10:37:10.000000000 +0000 @@ -46,14 +46,7 @@ #include #include -#ifdef PIPE_OS_UNIX -#include /* for ffs */ -#endif - -#if defined(_MSC_VER) -#include -#endif - +#include "util/bitscan.h" #ifdef __cplusplus extern "C" { @@ -354,210 +347,6 @@ /** - * Find first bit set in word. Least significant bit is 1. - * Return 0 if no bits set. - */ -#ifndef FFS_DEFINED -#define FFS_DEFINED 1 - -#if defined(_MSC_VER) && (_M_IX86 || _M_AMD64 || _M_IA64) -static inline -unsigned long ffs( unsigned long u ) -{ - unsigned long i; - if (_BitScanForward(&i, u)) - return i + 1; - else - return 0; -} -#elif defined(PIPE_CC_MSVC) && defined(PIPE_ARCH_X86) -static inline -unsigned ffs( unsigned u ) -{ - unsigned i; - - if (u == 0) { - return 0; - } - - __asm bsf eax, [u] - __asm inc eax - __asm mov [i], eax - - return i; -} -#elif defined(__MINGW32__) || defined(PIPE_OS_ANDROID) || \ - defined(HAVE___BUILTIN_FFS) -#define ffs __builtin_ffs -#endif - -#ifdef HAVE___BUILTIN_FFSLL -#define ffsll __builtin_ffsll -#else -static inline int -ffsll(long long int val) -{ - int bit; - - bit = ffs((unsigned) (val & 0xffffffff)); - if (bit != 0) - return bit; - - bit = ffs((unsigned) (val >> 32)); - if (bit != 0) - return 32 + bit; - - return 0; -} -#endif - -#endif /* FFS_DEFINED */ - -/** - * Find first bit set in long long. Least significant bit is 1. - * Return 0 if no bits set. - */ -#ifndef FFSLL_DEFINED -#define FFSLL_DEFINED 1 - -#if defined(__MINGW32__) || defined(PIPE_OS_ANDROID) || \ - defined(HAVE___BUILTIN_FFSLL) -#define ffsll __builtin_ffsll -#endif - -#endif /* FFSLL_DEFINED */ - -/** - * Find last bit set in a word. The least significant bit is 1. - * Return 0 if no bits are set. - */ -static inline unsigned -util_last_bit(unsigned u) -{ -#if defined(HAVE___BUILTIN_CLZ) - return u == 0 ? 0 : 32 - __builtin_clz(u); -#else - unsigned r = 0; - while (u) { - r++; - u >>= 1; - } - return r; -#endif -} - -/** - * Find last bit set in a word. The least significant bit is 1. - * Return 0 if no bits are set. - */ -static inline unsigned -util_last_bit64(uint64_t u) -{ -#if defined(HAVE___BUILTIN_CLZLL) - return u == 0 ? 0 : 64 - __builtin_clzll(u); -#else - unsigned r = 0; - while (u) { - r++; - u >>= 1; - } - return r; -#endif -} - -/** - * Find last bit in a word that does not match the sign bit. The least - * significant bit is 1. - * Return 0 if no bits are set. - */ -static inline unsigned -util_last_bit_signed(int i) -{ - if (i >= 0) - return util_last_bit(i); - else - return util_last_bit(~(unsigned)i); -} - -/* Destructively loop over all of the bits in a mask as in: - * - * while (mymask) { - * int i = u_bit_scan(&mymask); - * ... process element i - * } - * - */ -static inline int -u_bit_scan(unsigned *mask) -{ - int i = ffs(*mask) - 1; - *mask &= ~(1u << i); - return i; -} - -#ifndef _MSC_VER -static inline int -u_bit_scan64(uint64_t *mask) -{ - int i = ffsll(*mask) - 1; - *mask &= ~(1llu << i); - return i; -} -#endif - -/* For looping over a bitmask when you want to loop over consecutive bits - * manually, for example: - * - * while (mask) { - * int start, count, i; - * - * u_bit_scan_consecutive_range(&mask, &start, &count); - * - * for (i = 0; i < count; i++) - * ... process element (start+i) - * } - */ -static inline void -u_bit_scan_consecutive_range(unsigned *mask, int *start, int *count) -{ - if (*mask == 0xffffffff) { - *start = 0; - *count = 32; - *mask = 0; - return; - } - *start = ffs(*mask) - 1; - *count = ffs(~(*mask >> *start)) - 1; - *mask &= ~(((1u << *count) - 1) << *start); -} - -static inline void -u_bit_scan_consecutive_range64(uint64_t *mask, int *start, int *count) -{ - if (*mask == ~0llu) { - *start = 0; - *count = 64; - *mask = 0; - return; - } - *start = ffsll(*mask) - 1; - *count = ffsll(~(*mask >> *start)) - 1; - *mask &= ~(((1llu << *count) - 1) << *start); -} - -/* Returns a bitfield in which the first count bits starting at start are - * set. - */ -static inline unsigned -u_bit_consecutive(unsigned start, unsigned count) -{ - assert(start + count <= 32); - if (count == 32) - return ~0; - return ((1u << count) - 1) << start; -} - -/** * Return float bits. */ static inline unsigned @@ -640,6 +429,18 @@ #endif } +/** + * Returns the ceiling of log n base 2, and 0 when n == 0. Equivalently, + * returns the smallest x such that n <= 2**x. + */ +static inline unsigned +util_logbase2_ceil(unsigned n) +{ + if (n <= 1) + return 0; + + return 1 + util_logbase2(n - 1); +} /** * Returns the smallest power of two >= x diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_memory.h mesa-17.0.7/src/gallium/auxiliary/util/u_memory.h --- mesa-12.0.6/src/gallium/auxiliary/util/u_memory.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_memory.h 2017-06-01 10:37:10.000000000 +0000 @@ -63,6 +63,14 @@ #define align_malloc(_size, _alignment) os_malloc_aligned(_size, _alignment) #define align_free(_ptr) os_free_aligned(_ptr) +static inline void * +align_calloc(size_t size, unsigned long alignment) +{ + void *ptr = align_malloc(size, alignment); + if (ptr) + memset(ptr, 0, size); + return ptr; +} /** * Duplicate a block of memory. diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_pstipple.c mesa-17.0.7/src/gallium/auxiliary/util/u_pstipple.c --- mesa-12.0.6/src/gallium/auxiliary/util/u_pstipple.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_pstipple.c 2017-06-01 10:37:10.000000000 +0000 @@ -344,7 +344,7 @@ TGSI_FILE_TEMPORARY, texTemp, TGSI_WRITEMASK_XYZW, pctx->wincoordFile, wincoordInput, - TGSI_FILE_IMMEDIATE, pctx->numImmed); + TGSI_FILE_IMMEDIATE, pctx->numImmed, false); /* TEX texTemp, texTemp, sampler, 2D; */ tgsi_transform_tex_inst(ctx, diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_queue.c mesa-17.0.7/src/gallium/auxiliary/util/u_queue.c --- mesa-12.0.6/src/gallium/auxiliary/util/u_queue.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_queue.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,326 @@ +/* + * Copyright © 2016 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +#include "u_queue.h" +#include "u_memory.h" +#include "u_string.h" +#include "os/os_time.h" + +static void util_queue_killall_and_wait(struct util_queue *queue); + +/**************************************************************************** + * Wait for all queues to assert idle when exit() is called. + * + * Otherwise, C++ static variable destructors can be called while threads + * are using the static variables. + */ + +static once_flag atexit_once_flag = ONCE_FLAG_INIT; +static struct list_head queue_list; +pipe_static_mutex(exit_mutex); + +static void +atexit_handler(void) +{ + struct util_queue *iter; + + pipe_mutex_lock(exit_mutex); + /* Wait for all queues to assert idle. */ + LIST_FOR_EACH_ENTRY(iter, &queue_list, head) { + util_queue_killall_and_wait(iter); + } + pipe_mutex_unlock(exit_mutex); +} + +static void +global_init(void) +{ + LIST_INITHEAD(&queue_list); + atexit(atexit_handler); +} + +static void +add_to_atexit_list(struct util_queue *queue) +{ + call_once(&atexit_once_flag, global_init); + + pipe_mutex_lock(exit_mutex); + LIST_ADD(&queue->head, &queue_list); + pipe_mutex_unlock(exit_mutex); +} + +static void +remove_from_atexit_list(struct util_queue *queue) +{ + struct util_queue *iter, *tmp; + + pipe_mutex_lock(exit_mutex); + LIST_FOR_EACH_ENTRY_SAFE(iter, tmp, &queue_list, head) { + if (iter == queue) { + LIST_DEL(&iter->head); + break; + } + } + pipe_mutex_unlock(exit_mutex); +} + +/**************************************************************************** + * util_queue implementation + */ + +static void +util_queue_fence_signal(struct util_queue_fence *fence) +{ + pipe_mutex_lock(fence->mutex); + fence->signalled = true; + pipe_condvar_broadcast(fence->cond); + pipe_mutex_unlock(fence->mutex); +} + +void +util_queue_job_wait(struct util_queue_fence *fence) +{ + pipe_mutex_lock(fence->mutex); + while (!fence->signalled) + pipe_condvar_wait(fence->cond, fence->mutex); + pipe_mutex_unlock(fence->mutex); +} + +struct thread_input { + struct util_queue *queue; + int thread_index; +}; + +static PIPE_THREAD_ROUTINE(util_queue_thread_func, input) +{ + struct util_queue *queue = ((struct thread_input*)input)->queue; + int thread_index = ((struct thread_input*)input)->thread_index; + + FREE(input); + + if (queue->name) { + char name[16]; + util_snprintf(name, sizeof(name), "%s:%i", queue->name, thread_index); + pipe_thread_setname(name); + } + + while (1) { + struct util_queue_job job; + + pipe_mutex_lock(queue->lock); + assert(queue->num_queued >= 0 && queue->num_queued <= queue->max_jobs); + + /* wait if the queue is empty */ + while (!queue->kill_threads && queue->num_queued == 0) + pipe_condvar_wait(queue->has_queued_cond, queue->lock); + + if (queue->kill_threads) { + pipe_mutex_unlock(queue->lock); + break; + } + + job = queue->jobs[queue->read_idx]; + memset(&queue->jobs[queue->read_idx], 0, sizeof(struct util_queue_job)); + queue->read_idx = (queue->read_idx + 1) % queue->max_jobs; + + queue->num_queued--; + pipe_condvar_signal(queue->has_space_cond); + pipe_mutex_unlock(queue->lock); + + if (job.job) { + job.execute(job.job, thread_index); + util_queue_fence_signal(job.fence); + if (job.cleanup) + job.cleanup(job.job, thread_index); + } + } + + /* signal remaining jobs before terminating */ + pipe_mutex_lock(queue->lock); + while (queue->jobs[queue->read_idx].job) { + util_queue_fence_signal(queue->jobs[queue->read_idx].fence); + + queue->jobs[queue->read_idx].job = NULL; + queue->read_idx = (queue->read_idx + 1) % queue->max_jobs; + } + queue->num_queued = 0; /* reset this when exiting the thread */ + pipe_mutex_unlock(queue->lock); + return 0; +} + +bool +util_queue_init(struct util_queue *queue, + const char *name, + unsigned max_jobs, + unsigned num_threads) +{ + unsigned i; + + memset(queue, 0, sizeof(*queue)); + queue->name = name; + queue->num_threads = num_threads; + queue->max_jobs = max_jobs; + + queue->jobs = (struct util_queue_job*) + CALLOC(max_jobs, sizeof(struct util_queue_job)); + if (!queue->jobs) + goto fail; + + pipe_mutex_init(queue->lock); + + queue->num_queued = 0; + pipe_condvar_init(queue->has_queued_cond); + pipe_condvar_init(queue->has_space_cond); + + queue->threads = (pipe_thread*)CALLOC(num_threads, sizeof(pipe_thread)); + if (!queue->threads) + goto fail; + + /* start threads */ + for (i = 0; i < num_threads; i++) { + struct thread_input *input = MALLOC_STRUCT(thread_input); + input->queue = queue; + input->thread_index = i; + + queue->threads[i] = pipe_thread_create(util_queue_thread_func, input); + + if (!queue->threads[i]) { + FREE(input); + + if (i == 0) { + /* no threads created, fail */ + goto fail; + } else { + /* at least one thread created, so use it */ + queue->num_threads = i; + break; + } + } + } + + add_to_atexit_list(queue); + return true; + +fail: + FREE(queue->threads); + + if (queue->jobs) { + pipe_condvar_destroy(queue->has_space_cond); + pipe_condvar_destroy(queue->has_queued_cond); + pipe_mutex_destroy(queue->lock); + FREE(queue->jobs); + } + /* also util_queue_is_initialized can be used to check for success */ + memset(queue, 0, sizeof(*queue)); + return false; +} + +static void +util_queue_killall_and_wait(struct util_queue *queue) +{ + unsigned i; + + /* Signal all threads to terminate. */ + pipe_mutex_lock(queue->lock); + queue->kill_threads = 1; + pipe_condvar_broadcast(queue->has_queued_cond); + pipe_mutex_unlock(queue->lock); + + for (i = 0; i < queue->num_threads; i++) + pipe_thread_wait(queue->threads[i]); + queue->num_threads = 0; +} + +void +util_queue_destroy(struct util_queue *queue) +{ + util_queue_killall_and_wait(queue); + remove_from_atexit_list(queue); + + pipe_condvar_destroy(queue->has_space_cond); + pipe_condvar_destroy(queue->has_queued_cond); + pipe_mutex_destroy(queue->lock); + FREE(queue->jobs); + FREE(queue->threads); +} + +void +util_queue_fence_init(struct util_queue_fence *fence) +{ + memset(fence, 0, sizeof(*fence)); + pipe_mutex_init(fence->mutex); + pipe_condvar_init(fence->cond); + fence->signalled = true; +} + +void +util_queue_fence_destroy(struct util_queue_fence *fence) +{ + assert(fence->signalled); + pipe_condvar_destroy(fence->cond); + pipe_mutex_destroy(fence->mutex); +} + +void +util_queue_add_job(struct util_queue *queue, + void *job, + struct util_queue_fence *fence, + util_queue_execute_func execute, + util_queue_execute_func cleanup) +{ + struct util_queue_job *ptr; + + assert(fence->signalled); + + pipe_mutex_lock(queue->lock); + if (queue->kill_threads) { + pipe_mutex_unlock(queue->lock); + /* well no good option here, but any leaks will be + * short-lived as things are shutting down.. + */ + return; + } + + fence->signalled = false; + + assert(queue->num_queued >= 0 && queue->num_queued <= queue->max_jobs); + + /* if the queue is full, wait until there is space */ + while (queue->num_queued == queue->max_jobs) + pipe_condvar_wait(queue->has_space_cond, queue->lock); + + ptr = &queue->jobs[queue->write_idx]; + assert(ptr->job == NULL); + ptr->job = job; + ptr->fence = fence; + ptr->execute = execute; + ptr->cleanup = cleanup; + queue->write_idx = (queue->write_idx + 1) % queue->max_jobs; + + queue->num_queued++; + pipe_condvar_signal(queue->has_queued_cond); + pipe_mutex_unlock(queue->lock); +} diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_queue.h mesa-17.0.7/src/gallium/auxiliary/util/u_queue.h --- mesa-12.0.6/src/gallium/auxiliary/util/u_queue.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_queue.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,105 @@ +/* + * Copyright © 2016 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS + * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + */ + +/* Job queue with execution in a separate thread. + * + * Jobs can be added from any thread. After that, the wait call can be used + * to wait for completion of the job. + */ + +#ifndef U_QUEUE_H +#define U_QUEUE_H + +#include "os/os_thread.h" +#include "util/list.h" + +/* Job completion fence. + * Put this into your job structure. + */ +struct util_queue_fence { + pipe_mutex mutex; + pipe_condvar cond; + int signalled; +}; + +typedef void (*util_queue_execute_func)(void *job, int thread_index); + +struct util_queue_job { + void *job; + struct util_queue_fence *fence; + util_queue_execute_func execute; + util_queue_execute_func cleanup; +}; + +/* Put this into your context. */ +struct util_queue { + const char *name; + pipe_mutex lock; + pipe_condvar has_queued_cond; + pipe_condvar has_space_cond; + pipe_thread *threads; + int num_queued; + unsigned num_threads; + int kill_threads; + int max_jobs; + int write_idx, read_idx; /* ring buffer pointers */ + struct util_queue_job *jobs; + + /* for cleanup at exit(), protected by exit_mutex */ + struct list_head head; +}; + +bool util_queue_init(struct util_queue *queue, + const char *name, + unsigned max_jobs, + unsigned num_threads); +void util_queue_destroy(struct util_queue *queue); +void util_queue_fence_init(struct util_queue_fence *fence); +void util_queue_fence_destroy(struct util_queue_fence *fence); + +/* optional cleanup callback is called after fence is signaled: */ +void util_queue_add_job(struct util_queue *queue, + void *job, + struct util_queue_fence *fence, + util_queue_execute_func execute, + util_queue_execute_func cleanup); + +void util_queue_job_wait(struct util_queue_fence *fence); + +/* util_queue needs to be cleared to zeroes for this to work */ +static inline bool +util_queue_is_initialized(struct util_queue *queue) +{ + return queue->threads != NULL; +} + +static inline bool +util_queue_fence_is_signalled(struct util_queue_fence *fence) +{ + return fence->signalled != 0; +} + +#endif diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_simple_shaders.c mesa-17.0.7/src/gallium/auxiliary/util/u_simple_shaders.c --- mesa-12.0.6/src/gallium/auxiliary/util/u_simple_shaders.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_simple_shaders.c 2017-06-01 10:37:10.000000000 +0000 @@ -41,6 +41,7 @@ #include "util/u_simple_shaders.h" #include "util/u_debug.h" #include "util/u_memory.h" +#include "util/u_string.h" #include "tgsi/tgsi_dump.h" #include "tgsi/tgsi_strings.h" #include "tgsi/tgsi_ureg.h" @@ -207,8 +208,10 @@ /** * Make simple fragment texture shader: * IMM {0,0,0,1} // (if writemask != 0xf) - * MOV OUT[0], IMM[0] // (if writemask != 0xf) - * TEX OUT[0].writemask, IN[0], SAMP[0], 2D; + * MOV TEMP[0], IMM[0] // (if writemask != 0xf) + * TEX TEMP[0].writemask, IN[0], SAMP[0], 2D; + * .. optional SINT <-> UINT clamping .. + * MOV OUT[0], TEMP[0] * END; * * \param tex_target one of PIPE_TEXTURE_x @@ -220,13 +223,16 @@ unsigned tex_target, unsigned interp_mode, unsigned writemask, - enum tgsi_return_type stype) + enum tgsi_return_type stype, + enum tgsi_return_type dtype) { struct ureg_program *ureg; struct ureg_src sampler; struct ureg_src tex; + struct ureg_dst temp; struct ureg_dst out; + assert((stype == TGSI_RETURN_TYPE_FLOAT) == (dtype == TGSI_RETURN_TYPE_FLOAT)); assert(interp_mode == TGSI_INTERPOLATE_LINEAR || interp_mode == TGSI_INTERPOLATE_PERSPECTIVE); @@ -246,6 +252,8 @@ TGSI_SEMANTIC_COLOR, 0 ); + temp = ureg_DECL_temporary(ureg); + if (writemask != TGSI_WRITEMASK_XYZW) { struct ureg_src imm = ureg_imm4f( ureg, 0, 0, 0, 1 ); @@ -254,13 +262,28 @@ if (tex_target == TGSI_TEXTURE_BUFFER) ureg_TXF(ureg, - ureg_writemask(out, writemask), + ureg_writemask(temp, writemask), tex_target, tex, sampler); else ureg_TEX(ureg, - ureg_writemask(out, writemask), + ureg_writemask(temp, writemask), tex_target, tex, sampler); + if (stype != dtype) { + if (stype == TGSI_RETURN_TYPE_SINT) { + assert(dtype == TGSI_RETURN_TYPE_UINT); + + ureg_IMAX(ureg, temp, ureg_src(temp), ureg_imm1i(ureg, 0)); + } else { + assert(stype == TGSI_RETURN_TYPE_UINT); + assert(dtype == TGSI_RETURN_TYPE_SINT); + + ureg_UMIN(ureg, temp, ureg_src(temp), ureg_imm1u(ureg, (1u << 31) - 1)); + } + } + + ureg_MOV(ureg, out, ureg_src(temp)); + ureg_END( ureg ); return ureg_create_shader_and_destroy( ureg, pipe ); @@ -275,13 +298,14 @@ void * util_make_fragment_tex_shader(struct pipe_context *pipe, unsigned tex_target, unsigned interp_mode, - enum tgsi_return_type stype) + enum tgsi_return_type stype, + enum tgsi_return_type dtype) { return util_make_fragment_tex_shader_writemask( pipe, tex_target, interp_mode, TGSI_WRITEMASK_XYZW, - stype ); + stype, dtype ); } @@ -545,7 +569,9 @@ unsigned tgsi_tex, const char *samp_type, const char *output_semantic, - const char *output_mask) + const char *output_mask, + const char *conversion_decl, + const char *conversion) { static const char shader_templ[] = "FRAG\n" @@ -554,9 +580,12 @@ "DCL SVIEW[0], %s, %s\n" "DCL OUT[0], %s\n" "DCL TEMP[0]\n" + "%s" "F2U TEMP[0], IN[0]\n" - "TXF OUT[0]%s, TEMP[0], SAMP[0], %s\n" + "TXF TEMP[0], TEMP[0], SAMP[0], %s\n" + "%s" + "MOV OUT[0]%s, TEMP[0]\n" "END\n"; const char *type = tgsi_texture_names[tgsi_tex]; @@ -567,8 +596,8 @@ assert(tgsi_tex == TGSI_TEXTURE_2D_MSAA || tgsi_tex == TGSI_TEXTURE_2D_ARRAY_MSAA); - sprintf(text, shader_templ, type, samp_type, - output_semantic, output_mask, type); + util_snprintf(text, sizeof(text), shader_templ, type, samp_type, + output_semantic, conversion_decl, type, conversion, output_mask); if (!tgsi_text_translate(text, tokens, ARRAY_SIZE(tokens))) { puts(text); @@ -592,19 +621,35 @@ void * util_make_fs_blit_msaa_color(struct pipe_context *pipe, unsigned tgsi_tex, - enum tgsi_return_type stype) + enum tgsi_return_type stype, + enum tgsi_return_type dtype) { const char *samp_type; + const char *conversion_decl = ""; + const char *conversion = ""; - if (stype == TGSI_RETURN_TYPE_UINT) + if (stype == TGSI_RETURN_TYPE_UINT) { samp_type = "UINT"; - else if (stype == TGSI_RETURN_TYPE_SINT) + + if (dtype == TGSI_RETURN_TYPE_SINT) { + conversion_decl = "IMM[0] UINT32 {2147483647, 0, 0, 0}\n"; + conversion = "UMIN TEMP[0], TEMP[0], IMM[0].xxxx\n"; + } + } else if (stype == TGSI_RETURN_TYPE_SINT) { samp_type = "SINT"; - else + + if (dtype == TGSI_RETURN_TYPE_UINT) { + conversion_decl = "IMM[0] INT32 {0, 0, 0, 0}\n"; + conversion = "IMAX TEMP[0], TEMP[0], IMM[0].xxxx\n"; + } + } else { + assert(dtype == TGSI_RETURN_TYPE_FLOAT); samp_type = "FLOAT"; + } return util_make_fs_blit_msaa_gen(pipe, tgsi_tex, samp_type, - "COLOR[0]", ""); + "COLOR[0]", "", conversion_decl, + conversion); } @@ -618,7 +663,7 @@ unsigned tgsi_tex) { return util_make_fs_blit_msaa_gen(pipe, tgsi_tex, "FLOAT", - "POSITION", ".z"); + "POSITION", ".z", "", ""); } @@ -632,7 +677,7 @@ unsigned tgsi_tex) { return util_make_fs_blit_msaa_gen(pipe, tgsi_tex, "UINT", - "STENCIL", ".y"); + "STENCIL", ".y", "", ""); } diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_simple_shaders.h mesa-17.0.7/src/gallium/auxiliary/util/u_simple_shaders.h --- mesa-12.0.6/src/gallium/auxiliary/util/u_simple_shaders.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_simple_shaders.h 2017-06-01 10:37:10.000000000 +0000 @@ -73,12 +73,14 @@ unsigned tex_target, unsigned interp_mode, unsigned writemask, - enum tgsi_return_type stype); + enum tgsi_return_type stype, + enum tgsi_return_type dtype); extern void * util_make_fragment_tex_shader(struct pipe_context *pipe, unsigned tex_target, unsigned interp_mode, - enum tgsi_return_type stype); + enum tgsi_return_type stype, + enum tgsi_return_type dtype); extern void * util_make_fragment_tex_shader_writedepth(struct pipe_context *pipe, @@ -118,7 +120,8 @@ extern void * util_make_fs_blit_msaa_color(struct pipe_context *pipe, unsigned tgsi_tex, - enum tgsi_return_type stype); + enum tgsi_return_type stype, + enum tgsi_return_type dtype); extern void * diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_slab.c mesa-17.0.7/src/gallium/auxiliary/util/u_slab.c --- mesa-12.0.6/src/gallium/auxiliary/util/u_slab.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_slab.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,171 +0,0 @@ -/* - * Copyright 2010 Marek Olšák - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * on the rights to use, copy, modify, merge, publish, distribute, sub - * license, and/or sell copies of the Software, and to permit persons to whom - * the Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. */ - -#include "util/u_slab.h" - -#include "util/u_math.h" -#include "util/u_memory.h" -#include "util/simple_list.h" - -#include - -#define UTIL_SLAB_MAGIC 0xcafe4321 - -/* The block is either allocated memory or free space. */ -struct util_slab_block { - /* The header. */ - /* The first next free block. */ - struct util_slab_block *next_free; - - intptr_t magic; - - /* Memory after the last member is dedicated to the block itself. - * The allocated size is always larger than this structure. */ -}; - -static struct util_slab_block * -util_slab_get_block(struct util_slab_mempool *pool, - struct util_slab_page *page, unsigned index) -{ - return (struct util_slab_block*) - ((uint8_t*)page + sizeof(struct util_slab_page) + - (pool->block_size * index)); -} - -static void util_slab_add_new_page(struct util_slab_mempool *pool) -{ - struct util_slab_page *page; - struct util_slab_block *block; - unsigned i; - - page = MALLOC(pool->page_size); - insert_at_tail(&pool->list, page); - - /* Mark all blocks as free. */ - for (i = 0; i < pool->num_blocks-1; i++) { - block = util_slab_get_block(pool, page, i); - block->next_free = util_slab_get_block(pool, page, i+1); - block->magic = UTIL_SLAB_MAGIC; - } - - block = util_slab_get_block(pool, page, pool->num_blocks-1); - block->next_free = pool->first_free; - block->magic = UTIL_SLAB_MAGIC; - pool->first_free = util_slab_get_block(pool, page, 0); - pool->num_pages++; - -#if 0 - fprintf(stderr, "New page! Num of pages: %i\n", pool->num_pages); -#endif -} - -static void *util_slab_alloc_st(struct util_slab_mempool *pool) -{ - struct util_slab_block *block; - - if (!pool->first_free) - util_slab_add_new_page(pool); - - block = pool->first_free; - assert(block->magic == UTIL_SLAB_MAGIC); - pool->first_free = block->next_free; - - return (uint8_t*)block + sizeof(struct util_slab_block); -} - -static void util_slab_free_st(struct util_slab_mempool *pool, void *ptr) -{ - struct util_slab_block *block = - (struct util_slab_block*) - ((uint8_t*)ptr - sizeof(struct util_slab_block)); - - assert(block->magic == UTIL_SLAB_MAGIC); - block->next_free = pool->first_free; - pool->first_free = block; -} - -static void *util_slab_alloc_mt(struct util_slab_mempool *pool) -{ - void *mem; - - pipe_mutex_lock(pool->mutex); - mem = util_slab_alloc_st(pool); - pipe_mutex_unlock(pool->mutex); - return mem; -} - -static void util_slab_free_mt(struct util_slab_mempool *pool, void *ptr) -{ - pipe_mutex_lock(pool->mutex); - util_slab_free_st(pool, ptr); - pipe_mutex_unlock(pool->mutex); -} - -void util_slab_set_thread_safety(struct util_slab_mempool *pool, - enum util_slab_threading threading) -{ - pool->threading = threading; - - if (threading) { - pool->alloc = util_slab_alloc_mt; - pool->free = util_slab_free_mt; - } else { - pool->alloc = util_slab_alloc_st; - pool->free = util_slab_free_st; - } -} - -void util_slab_create(struct util_slab_mempool *pool, - unsigned item_size, - unsigned num_blocks, - enum util_slab_threading threading) -{ - item_size = align(item_size, sizeof(intptr_t)); - - pool->num_pages = 0; - pool->num_blocks = num_blocks; - pool->block_size = sizeof(struct util_slab_block) + item_size; - pool->block_size = align(pool->block_size, sizeof(intptr_t)); - pool->page_size = sizeof(struct util_slab_page) + - num_blocks * pool->block_size; - pool->first_free = NULL; - - make_empty_list(&pool->list); - - pipe_mutex_init(pool->mutex); - - util_slab_set_thread_safety(pool, threading); -} - -void util_slab_destroy(struct util_slab_mempool *pool) -{ - struct util_slab_page *page, *temp; - - if (pool->list.next) { - foreach_s(page, temp, &pool->list) { - remove_from_list(page); - FREE(page); - } - } - - pipe_mutex_destroy(pool->mutex); -} diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_slab.h mesa-17.0.7/src/gallium/auxiliary/util/u_slab.h --- mesa-12.0.6/src/gallium/auxiliary/util/u_slab.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_slab.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,96 +0,0 @@ -/* - * Copyright 2010 Marek Olšák - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * on the rights to use, copy, modify, merge, publish, distribute, sub - * license, and/or sell copies of the Software, and to permit persons to whom - * the Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. */ - -/** - * @file - * Simple slab allocator for equally sized memory allocations. - * util_slab_alloc and util_slab_free have time complexity in O(1). - * - * Good for allocations which have very low lifetime and are allocated - * and freed very often. Use a profiler first to know if it's worth using it! - * - * Candidates: transfer_map - * - * @author Marek Olšák - */ - -#ifndef U_SLAB_H -#define U_SLAB_H - -#include "os/os_thread.h" - -enum util_slab_threading { - UTIL_SLAB_SINGLETHREADED = FALSE, - UTIL_SLAB_MULTITHREADED = TRUE -}; - -/* The page is an array of blocks (allocations). */ -struct util_slab_page { - /* The header (linked-list pointers). */ - struct util_slab_page *prev, *next; - - /* Memory after the last member is dedicated to the page itself. - * The allocated size is always larger than this structure. */ -}; - -struct util_slab_mempool { - /* Public members. */ - void *(*alloc)(struct util_slab_mempool *pool); - void (*free)(struct util_slab_mempool *pool, void *ptr); - - /* Private members. */ - struct util_slab_block *first_free; - - struct util_slab_page list; - - unsigned block_size; - unsigned page_size; - unsigned num_blocks; - unsigned num_pages; - enum util_slab_threading threading; - - pipe_mutex mutex; -}; - -void util_slab_create(struct util_slab_mempool *pool, - unsigned item_size, - unsigned num_blocks, - enum util_slab_threading threading); - -void util_slab_destroy(struct util_slab_mempool *pool); - -void util_slab_set_thread_safety(struct util_slab_mempool *pool, - enum util_slab_threading threading); - -static inline void * -util_slab_alloc(struct util_slab_mempool *pool) -{ - return pool->alloc(pool); -} - -static inline void -util_slab_free(struct util_slab_mempool *pool, void *ptr) -{ - pool->free(pool, ptr); -} - -#endif diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_staging.c mesa-17.0.7/src/gallium/auxiliary/util/u_staging.c --- mesa-12.0.6/src/gallium/auxiliary/util/u_staging.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_staging.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,136 +0,0 @@ -/************************************************************************** - * - * Copyright 2010 Luca Barbieri - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial - * portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE - * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION - * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ - -#include "util/u_staging.h" -#include "pipe/p_context.h" -#include "util/u_memory.h" -#include "util/u_inlines.h" - - -static void -util_staging_resource_template(struct pipe_resource *pt, unsigned width, - unsigned height, unsigned depth, - struct pipe_resource *template) -{ - memset(template, 0, sizeof(struct pipe_resource)); - if (pt->target != PIPE_BUFFER && depth <= 1) - template->target = PIPE_TEXTURE_RECT; - else - template->target = pt->target; - template->format = pt->format; - template->width0 = width; - template->height0 = height; - template->depth0 = depth; - template->array_size = 1; - template->last_level = 0; - template->nr_samples = pt->nr_samples; - template->bind = 0; - template->usage = PIPE_USAGE_STAGING; - template->flags = 0; -} - - -struct util_staging_transfer * -util_staging_transfer_init(struct pipe_context *pipe, - struct pipe_resource *pt, - unsigned level, enum pipe_resource_usage usage, - const struct pipe_box *box, - boolean direct, struct util_staging_transfer *tx) -{ - struct pipe_screen *pscreen = pipe->screen; - struct pipe_resource staging_resource_template; - - pipe_resource_reference(&tx->base.resource, pt); - tx->base.level = level; - tx->base.usage = usage; - tx->base.box = *box; - - if (direct) { - tx->staging_resource = pt; - return tx; - } - - util_staging_resource_template(pt, box->width, box->height, - box->depth, &staging_resource_template); - tx->staging_resource = pscreen->resource_create(pscreen, - &staging_resource_template); - if (!tx->staging_resource) { - pipe_resource_reference(&tx->base.resource, NULL); - FREE(tx); - return NULL; - } - - if (usage & PIPE_TRANSFER_READ) { - /* XXX this looks wrong dst is always the same but looping over src z? */ - int zi; - struct pipe_box sbox; - sbox.x = box->x; - sbox.y = box->y; - sbox.z = box->z; - sbox.width = box->width; - sbox.height = box->height; - sbox.depth = 1; - for (zi = 0; zi < box->depth; ++zi) { - sbox.z = sbox.z + zi; - pipe->resource_copy_region(pipe, tx->staging_resource, 0, 0, 0, 0, - tx->base.resource, level, &sbox); - } - } - - return tx; -} - - -void -util_staging_transfer_destroy(struct pipe_context *pipe, - struct pipe_transfer *ptx) -{ - struct util_staging_transfer *tx = (struct util_staging_transfer *)ptx; - - if (tx->staging_resource != tx->base.resource) { - if (tx->base.usage & PIPE_TRANSFER_WRITE) { - /* XXX this looks wrong src is always the same but looping over dst z? */ - int zi; - struct pipe_box sbox; - sbox.x = 0; - sbox.y = 0; - sbox.z = 0; - sbox.width = tx->base.box.width; - sbox.height = tx->base.box.height; - sbox.depth = 1; - for (zi = 0; zi < tx->base.box.depth; ++zi) - pipe->resource_copy_region(pipe, tx->base.resource, tx->base.level, - tx->base.box.x, tx->base.box.y, - tx->base.box.z + zi, - tx->staging_resource, 0, &sbox); - } - - pipe_resource_reference(&tx->staging_resource, NULL); - } - - pipe_resource_reference(&ptx->resource, NULL); - FREE(ptx); -} diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_staging.h mesa-17.0.7/src/gallium/auxiliary/util/u_staging.h --- mesa-12.0.6/src/gallium/auxiliary/util/u_staging.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_staging.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,67 +0,0 @@ -/************************************************************************** - * - * Copyright 2010 Luca Barbieri - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial - * portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE - * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION - * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ - -/* Direct3D 10/11 has no concept of transfers. Applications instead - * create resources with a STAGING or DYNAMIC usage, copy between them - * and the real resource and use Map to map the STAGING/DYNAMIC resource. - * - * This util module allows to implement Gallium drivers as a Direct3D - * driver would be implemented: transfers allocate a resource with - * PIPE_USAGE_STAGING, and copy the data between it and the real resource - * with resource_copy_region. - */ - -#ifndef U_STAGING_H -#define U_STAGING_H - -#include "pipe/p_state.h" - -struct util_staging_transfer { - struct pipe_transfer base; - - /* if direct, same as base.resource, otherwise the temporary staging - * resource - */ - struct pipe_resource *staging_resource; -}; - -/* user must be stride, slice_stride and offset. - * pt->usage == PIPE_USAGE_DYNAMIC || pt->usage == PIPE_USAGE_STAGING - * should be a good value to pass for direct staging resource is currently - * created with PIPE_USAGE_STAGING - */ -struct util_staging_transfer * -util_staging_transfer_init(struct pipe_context *pipe, - struct pipe_resource *pt, - unsigned level, enum pipe_resource_usage usage, - const struct pipe_box *box, - boolean direct, struct util_staging_transfer *tx); - -void -util_staging_transfer_destroy(struct pipe_context *pipe, - struct pipe_transfer *ptx); - -#endif diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_suballoc.c mesa-17.0.7/src/gallium/auxiliary/util/u_suballoc.c --- mesa-12.0.6/src/gallium/auxiliary/util/u_suballoc.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_suballoc.c 2017-06-01 10:37:10.000000000 +0000 @@ -41,7 +41,6 @@ struct pipe_context *pipe; unsigned size; /* Size of the whole buffer, in bytes. */ - unsigned alignment; /* Alignment of each sub-allocation. */ unsigned bind; /* Bitmask of PIPE_BIND_* flags. */ enum pipe_resource_usage usage; boolean zero_buffer_memory; /* If the buffer contents should be zeroed. */ @@ -58,8 +57,7 @@ * cleared to 0 after the allocation. */ struct u_suballocator * -u_suballocator_create(struct pipe_context *pipe, unsigned size, - unsigned alignment, unsigned bind, +u_suballocator_create(struct pipe_context *pipe, unsigned size, unsigned bind, enum pipe_resource_usage usage, boolean zero_buffer_memory) { @@ -68,8 +66,7 @@ return NULL; allocator->pipe = pipe; - allocator->size = align(size, alignment); - allocator->alignment = alignment; + allocator->size = size; allocator->bind = bind; allocator->usage = usage; allocator->zero_buffer_memory = zero_buffer_memory; @@ -85,17 +82,18 @@ void u_suballocator_alloc(struct u_suballocator *allocator, unsigned size, - unsigned *out_offset, struct pipe_resource **outbuf) + unsigned alignment, unsigned *out_offset, + struct pipe_resource **outbuf) { - unsigned alloc_size = align(size, allocator->alignment); + allocator->offset = align(allocator->offset, alignment); /* Don't allow allocations larger than the buffer size. */ - if (alloc_size > allocator->size) + if (size > allocator->size) goto fail; /* Make sure we have enough space in the buffer. */ if (!allocator->buffer || - allocator->offset + alloc_size > allocator->size) { + allocator->offset + size > allocator->size) { /* Allocate a new buffer. */ pipe_resource_reference(&allocator->buffer, NULL); allocator->offset = 0; @@ -117,15 +115,15 @@ } } - assert(allocator->offset % allocator->alignment == 0); + assert(allocator->offset % alignment == 0); assert(allocator->offset < allocator->buffer->width0); - assert(allocator->offset + alloc_size <= allocator->buffer->width0); + assert(allocator->offset + size <= allocator->buffer->width0); /* Return the buffer. */ *out_offset = allocator->offset; pipe_resource_reference(outbuf, allocator->buffer); - allocator->offset += alloc_size; + allocator->offset += size; return; fail: diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_suballoc.h mesa-17.0.7/src/gallium/auxiliary/util/u_suballoc.h --- mesa-12.0.6/src/gallium/auxiliary/util/u_suballoc.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_suballoc.h 2017-06-01 10:37:10.000000000 +0000 @@ -34,8 +34,7 @@ struct u_suballocator; struct u_suballocator * -u_suballocator_create(struct pipe_context *pipe, unsigned size, - unsigned alignment, unsigned bind, +u_suballocator_create(struct pipe_context *pipe, unsigned size, unsigned bind, enum pipe_resource_usage usage, boolean zero_buffer_memory); @@ -44,6 +43,7 @@ void u_suballocator_alloc(struct u_suballocator *allocator, unsigned size, - unsigned *out_offset, struct pipe_resource **outbuf); + unsigned alignment, unsigned *out_offset, + struct pipe_resource **outbuf); #endif diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_surface.c mesa-17.0.7/src/gallium/auxiliary/util/u_surface.c --- mesa-12.0.6/src/gallium/auxiliary/util/u_surface.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_surface.c 2017-06-01 10:37:10.000000000 +0000 @@ -240,6 +240,11 @@ /** * Fallback function for pipe->resource_copy_region(). + * We support copying between different formats (including compressed/ + * uncompressed) if the bytes per block or pixel matches. If copying + * compressed -> uncompressed, the dst region is reduced by the block + * width, height. If copying uncompressed -> compressed, the dest region + * is expanded by the block width, height. See GL_ARB_copy_image. * Note: (X,Y)=(0,0) is always the upper-left corner. */ void @@ -249,14 +254,15 @@ unsigned dst_x, unsigned dst_y, unsigned dst_z, struct pipe_resource *src, unsigned src_level, - const struct pipe_box *src_box) + const struct pipe_box *src_box_in) { struct pipe_transfer *src_trans, *dst_trans; uint8_t *dst_map; const uint8_t *src_map; MAYBE_UNUSED enum pipe_format src_format; enum pipe_format dst_format; - struct pipe_box dst_box; + struct pipe_box src_box, dst_box; + unsigned src_bs, dst_bs, src_bw, dst_bw, src_bh, dst_bh; assert(src && dst); if (!src || !dst) @@ -268,47 +274,108 @@ src_format = src->format; dst_format = dst->format; - assert(util_format_get_blocksize(dst_format) == util_format_get_blocksize(src_format)); - assert(util_format_get_blockwidth(dst_format) == util_format_get_blockwidth(src_format)); - assert(util_format_get_blockheight(dst_format) == util_format_get_blockheight(src_format)); + /* init src box */ + src_box = *src_box_in; + + /* init dst box */ + dst_box.x = dst_x; + dst_box.y = dst_y; + dst_box.z = dst_z; + dst_box.width = src_box.width; + dst_box.height = src_box.height; + dst_box.depth = src_box.depth; + + src_bs = util_format_get_blocksize(src_format); + src_bw = util_format_get_blockwidth(src_format); + src_bh = util_format_get_blockheight(src_format); + dst_bs = util_format_get_blocksize(dst_format); + dst_bw = util_format_get_blockwidth(dst_format); + dst_bh = util_format_get_blockheight(dst_format); + + /* Note: all box positions and sizes are in pixels */ + if (src_bw > 1 && dst_bw == 1) { + /* Copy from compressed to uncompressed. + * Shrink dest box by the src block size. + */ + dst_box.width /= src_bw; + dst_box.height /= src_bh; + } + else if (src_bw == 1 && dst_bw > 1) { + /* Copy from uncompressed to compressed. + * Expand dest box by the dest block size. + */ + dst_box.width *= dst_bw; + dst_box.height *= dst_bh; + } + else { + /* compressed -> compressed or uncompressed -> uncompressed copy */ + assert(src_bw == dst_bw); + assert(src_bh == dst_bh); + } + + assert(src_bs == dst_bs); + if (src_bs != dst_bs) { + /* This can happen if we fail to do format checking before hand. + * Don't crash below. + */ + return; + } + + /* check that region boxes are block aligned */ + assert(src_box.x % src_bw == 0); + assert(src_box.y % src_bh == 0); + assert(src_box.width % src_bw == 0 || + src_box.x + src_box.width == u_minify(src->width0, src_level)); + assert(src_box.height % src_bh == 0 || + src_box.y + src_box.height == u_minify(src->height0, src_level)); + assert(dst_box.x % dst_bw == 0); + assert(dst_box.y % dst_bh == 0); + assert(dst_box.width % dst_bw == 0 || + dst_box.x + dst_box.width == u_minify(dst->width0, dst_level)); + assert(dst_box.height % dst_bh == 0 || + dst_box.y + dst_box.height == u_minify(dst->height0, dst_level)); + + /* check that region boxes are not out of bounds */ + assert(src_box.x + src_box.width <= u_minify(src->width0, src_level)); + assert(src_box.y + src_box.height <= u_minify(src->height0, src_level)); + assert(dst_box.x + dst_box.width <= u_minify(dst->width0, dst_level)); + assert(dst_box.y + dst_box.height <= u_minify(dst->height0, dst_level)); + + /* check that total number of src, dest bytes match */ + assert((src_box.width / src_bw) * (src_box.height / src_bh) * src_bs == + (dst_box.width / dst_bw) * (dst_box.height / dst_bh) * dst_bs); src_map = pipe->transfer_map(pipe, src, src_level, PIPE_TRANSFER_READ, - src_box, &src_trans); + &src_box, &src_trans); assert(src_map); if (!src_map) { goto no_src_map; } - dst_box.x = dst_x; - dst_box.y = dst_y; - dst_box.z = dst_z; - dst_box.width = src_box->width; - dst_box.height = src_box->height; - dst_box.depth = src_box->depth; - dst_map = pipe->transfer_map(pipe, dst, dst_level, - PIPE_TRANSFER_WRITE | PIPE_TRANSFER_DISCARD_RANGE, - &dst_box, &dst_trans); + PIPE_TRANSFER_WRITE | + PIPE_TRANSFER_DISCARD_RANGE, &dst_box, + &dst_trans); assert(dst_map); if (!dst_map) { goto no_dst_map; } if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) { - assert(src_box->height == 1); - assert(src_box->depth == 1); - memcpy(dst_map, src_map, src_box->width); + assert(src_box.height == 1); + assert(src_box.depth == 1); + memcpy(dst_map, src_map, src_box.width); } else { util_copy_box(dst_map, - dst_format, + src_format, dst_trans->stride, dst_trans->layer_stride, 0, 0, 0, - src_box->width, src_box->height, src_box->depth, + src_box.width, src_box.height, src_box.depth, src_map, src_trans->stride, src_trans->layer_stride, 0, 0, 0); @@ -619,45 +686,54 @@ return res->nr_samples ? res->nr_samples : 1; } + /** - * Try to do a blit using resource_copy_region. The function calls - * resource_copy_region if the blit description is compatible with it. - * - * It returns TRUE if the blit was done using resource_copy_region. - * - * It returns FALSE otherwise and the caller must fall back to a more generic - * codepath for the blit operation. (e.g. by using u_blitter) + * Check if a blit() command can be implemented with a resource_copy_region(). + * If tight_format_check is true, only allow the resource_copy_region() if + * the blit src/dst formats are identical, ignoring the resource formats. + * Otherwise, check for format casting and compatibility. */ boolean -util_try_blit_via_copy_region(struct pipe_context *ctx, - const struct pipe_blit_info *blit) +util_can_blit_via_copy_region(const struct pipe_blit_info *blit, + boolean tight_format_check) { - unsigned mask = util_format_get_mask(blit->dst.format); + const struct util_format_description *src_desc, *dst_desc; - /* No format conversions. */ - if (blit->src.resource->format != blit->src.format || - blit->dst.resource->format != blit->dst.format || - !util_is_format_compatible( - util_format_description(blit->src.resource->format), - util_format_description(blit->dst.resource->format))) { - return FALSE; + src_desc = util_format_description(blit->src.resource->format); + dst_desc = util_format_description(blit->dst.resource->format); + + if (tight_format_check) { + /* no format conversions allowed */ + if (blit->src.format != blit->dst.format) { + return FALSE; + } + } + else { + /* do loose format compatibility checking */ + if (blit->src.resource->format != blit->src.format || + blit->dst.resource->format != blit->dst.format || + !util_is_format_compatible(src_desc, dst_desc)) { + return FALSE; + } } - /* No masks, no filtering, no scissor. */ + unsigned mask = util_format_get_mask(blit->dst.format); + + /* No masks, no filtering, no scissor, no blending */ if ((blit->mask & mask) != mask || blit->filter != PIPE_TEX_FILTER_NEAREST || - blit->scissor_enable) { + blit->scissor_enable || + blit->num_window_rectangles > 0 || + blit->alpha_blend) { return FALSE; } - /* No flipping. */ - if (blit->src.box.width < 0 || - blit->src.box.height < 0 || - blit->src.box.depth < 0) { - return FALSE; - } + /* Only the src box can have negative dims for flipping */ + assert(blit->dst.box.width >= 1); + assert(blit->dst.box.height >= 1); + assert(blit->dst.box.depth >= 1); - /* No scaling. */ + /* No scaling or flipping */ if (blit->src.box.width != blit->dst.box.width || blit->src.box.height != blit->dst.box.height || blit->src.box.depth != blit->dst.box.depth) { @@ -678,12 +754,32 @@ return FALSE; } - if (blit->alpha_blend) - return FALSE; - - ctx->resource_copy_region(ctx, blit->dst.resource, blit->dst.level, - blit->dst.box.x, blit->dst.box.y, blit->dst.box.z, - blit->src.resource, blit->src.level, - &blit->src.box); return TRUE; } + + +/** + * Try to do a blit using resource_copy_region. The function calls + * resource_copy_region if the blit description is compatible with it. + * + * It returns TRUE if the blit was done using resource_copy_region. + * + * It returns FALSE otherwise and the caller must fall back to a more generic + * codepath for the blit operation. (e.g. by using u_blitter) + */ +boolean +util_try_blit_via_copy_region(struct pipe_context *ctx, + const struct pipe_blit_info *blit) +{ + if (util_can_blit_via_copy_region(blit, FALSE)) { + ctx->resource_copy_region(ctx, blit->dst.resource, blit->dst.level, + blit->dst.box.x, blit->dst.box.y, + blit->dst.box.z, + blit->src.resource, blit->src.level, + &blit->src.box); + return TRUE; + } + else { + return FALSE; + } +} diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_surface.h mesa-17.0.7/src/gallium/auxiliary/util/u_surface.h --- mesa-12.0.6/src/gallium/auxiliary/util/u_surface.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_surface.h 2017-06-01 10:37:10.000000000 +0000 @@ -98,6 +98,10 @@ unsigned dstx, unsigned dsty, unsigned width, unsigned height); +boolean +util_can_blit_via_copy_region(const struct pipe_blit_info *blit, + boolean tight_format_check); + extern boolean util_try_blit_via_copy_region(struct pipe_context *ctx, const struct pipe_blit_info *blit); diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_tests.c mesa-17.0.7/src/gallium/auxiliary/util/u_tests.c --- mesa-12.0.6/src/gallium/auxiliary/util/u_tests.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_tests.c 2017-06-01 10:37:10.000000000 +0000 @@ -374,6 +374,7 @@ /* Fragment shader. */ fs = util_make_fragment_tex_shader(ctx, tgsi_tex_target, TGSI_INTERPOLATE_LINEAR, + TGSI_RETURN_TYPE_FLOAT, TGSI_RETURN_TYPE_FLOAT); cso_set_fragment_shader_handle(cso, fs); diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_transfer.c mesa-17.0.7/src/gallium/auxiliary/util/u_transfer.c --- mesa-12.0.6/src/gallium/auxiliary/util/u_transfer.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_transfer.c 2017-06-01 10:37:10.000000000 +0000 @@ -4,34 +4,58 @@ #include "util/u_transfer.h" #include "util/u_memory.h" -/* One-shot transfer operation with data supplied in a user - * pointer. XXX: strides?? - */ -void u_default_transfer_inline_write( struct pipe_context *pipe, - struct pipe_resource *resource, - unsigned level, - unsigned usage, - const struct pipe_box *box, - const void *data, - unsigned stride, - unsigned layer_stride) +void u_default_buffer_subdata(struct pipe_context *pipe, + struct pipe_resource *resource, + unsigned usage, unsigned offset, + unsigned size, const void *data) { struct pipe_transfer *transfer = NULL; + struct pipe_box box; uint8_t *map = NULL; assert(!(usage & PIPE_TRANSFER_READ)); - /* the write flag is implicit by the nature of transfer_inline_write */ + /* the write flag is implicit by the nature of buffer_subdata */ usage |= PIPE_TRANSFER_WRITE; - /* transfer_inline_write implicitly discards the rewritten buffer range */ - if (resource->target == PIPE_BUFFER && - box->x == 0 && box->width == resource->width0) { + /* buffer_subdata implicitly discards the rewritten buffer range */ + if (offset == 0 && size == resource->width0) { usage |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE; } else { usage |= PIPE_TRANSFER_DISCARD_RANGE; } + u_box_1d(offset, size, &box); + + map = pipe->transfer_map(pipe, resource, 0, usage, &box, &transfer); + if (!map) + return; + + memcpy(map, data, size); + pipe_transfer_unmap(pipe, transfer); +} + +void u_default_texture_subdata(struct pipe_context *pipe, + struct pipe_resource *resource, + unsigned level, + unsigned usage, + const struct pipe_box *box, + const void *data, + unsigned stride, + unsigned layer_stride) +{ + struct pipe_transfer *transfer = NULL; + const uint8_t *src_data = data; + uint8_t *map = NULL; + + assert(!(usage & PIPE_TRANSFER_READ)); + + /* the write flag is implicit by the nature of texture_subdata */ + usage |= PIPE_TRANSFER_WRITE; + + /* texture_subdata implicitly discards the rewritten buffer range */ + usage |= PIPE_TRANSFER_DISCARD_RANGE; + map = pipe->transfer_map(pipe, resource, level, @@ -40,28 +64,18 @@ if (!map) return; - if (resource->target == PIPE_BUFFER) { - assert(box->height == 1); - assert(box->depth == 1); - - memcpy(map, data, box->width); - } - else { - const uint8_t *src_data = data; - - util_copy_box(map, - resource->format, - transfer->stride, /* bytes */ - transfer->layer_stride, /* bytes */ - 0, 0, 0, - box->width, - box->height, - box->depth, - src_data, - stride, /* bytes */ - layer_stride, /* bytes */ - 0, 0, 0); - } + util_copy_box(map, + resource->format, + transfer->stride, /* bytes */ + transfer->layer_stride, /* bytes */ + 0, 0, 0, + box->width, + box->height, + box->depth, + src_data, + stride, /* bytes */ + layer_stride, /* bytes */ + 0, 0, 0); pipe_transfer_unmap(pipe, transfer); } @@ -97,6 +111,7 @@ } boolean u_resource_get_handle_vtbl(struct pipe_screen *screen, + struct pipe_context *ctx, struct pipe_resource *resource, struct winsys_handle *handle, unsigned usage) @@ -138,27 +153,3 @@ struct u_resource *ur = u_resource(transfer->resource); ur->vtbl->transfer_unmap(pipe, transfer); } - -void u_transfer_inline_write_vtbl( struct pipe_context *pipe, - struct pipe_resource *resource, - unsigned level, - unsigned usage, - const struct pipe_box *box, - const void *data, - unsigned stride, - unsigned layer_stride) -{ - struct u_resource *ur = u_resource(resource); - ur->vtbl->transfer_inline_write(pipe, - resource, - level, - usage, - box, - data, - stride, - layer_stride); -} - - - - diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_transfer.h mesa-17.0.7/src/gallium/auxiliary/util/u_transfer.h --- mesa-12.0.6/src/gallium/auxiliary/util/u_transfer.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_transfer.h 2017-06-01 10:37:10.000000000 +0000 @@ -14,14 +14,19 @@ struct pipe_resource *resource, struct winsys_handle *handle); -void u_default_transfer_inline_write( struct pipe_context *pipe, - struct pipe_resource *resource, - unsigned level, - unsigned usage, - const struct pipe_box *box, - const void *data, - unsigned stride, - unsigned layer_stride); +void u_default_buffer_subdata(struct pipe_context *pipe, + struct pipe_resource *resource, + unsigned usage, unsigned offset, + unsigned size, const void *data); + +void u_default_texture_subdata(struct pipe_context *pipe, + struct pipe_resource *resource, + unsigned level, + unsigned usage, + const struct pipe_box *box, + const void *data, + unsigned stride, + unsigned layer_stride); void u_default_transfer_flush_region( struct pipe_context *pipe, struct pipe_transfer *transfer, @@ -58,15 +63,6 @@ void (*transfer_unmap)( struct pipe_context *, struct pipe_transfer *transfer ); - - void (*transfer_inline_write)( struct pipe_context *pipe, - struct pipe_resource *resource, - unsigned level, - unsigned usage, - const struct pipe_box *box, - const void *data, - unsigned stride, - unsigned layer_stride); }; @@ -77,6 +73,7 @@ boolean u_resource_get_handle_vtbl(struct pipe_screen *screen, + struct pipe_context *ctx, struct pipe_resource *resource, struct winsys_handle *handle, unsigned usage); @@ -98,13 +95,4 @@ void u_transfer_unmap_vtbl( struct pipe_context *rm_ctx, struct pipe_transfer *transfer ); -void u_transfer_inline_write_vtbl( struct pipe_context *rm_ctx, - struct pipe_resource *resource, - unsigned level, - unsigned usage, - const struct pipe_box *box, - const void *data, - unsigned stride, - unsigned layer_stride); - #endif diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_vbuf.c mesa-17.0.7/src/gallium/auxiliary/util/u_vbuf.c --- mesa-12.0.6/src/gallium/auxiliary/util/u_vbuf.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_vbuf.c 2017-06-01 10:37:10.000000000 +0000 @@ -627,6 +627,7 @@ for (i = 0; i < mgr->ve->count; i++) { struct translate_key *k; struct translate_element *te; + enum pipe_format output_format = mgr->ve->native_format[i]; unsigned bit, vb_index = mgr->ve->ve[i].vertex_buffer_index; bit = 1 << vb_index; @@ -644,7 +645,8 @@ } } assert(type < VB_NUM); - assert(translate_is_output_format_supported(mgr->ve->native_format[i])); + if (mgr->ve->ve[i].src_format != output_format) + assert(translate_is_output_format_supported(output_format)); /*printf("velem=%i type=%i\n", i, type);*/ /* Add the vertex element. */ @@ -657,7 +659,7 @@ te->input_buffer = vb_index; te->input_format = mgr->ve->ve[i].src_format; te->input_offset = mgr->ve->ve[i].src_offset; - te->output_format = mgr->ve->native_format[i]; + te->output_format = output_format; te->output_offset = k->output_stride; k->output_stride += mgr->ve->native_format_size[i]; diff -Nru mesa-12.0.6/src/gallium/auxiliary/util/u_video.h mesa-17.0.7/src/gallium/auxiliary/util/u_video.h --- mesa-12.0.6/src/gallium/auxiliary/util/u_video.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/util/u_video.h 2017-06-01 10:37:10.000000000 +0000 @@ -130,6 +130,43 @@ } static inline void +u_copy_yv12_img_to_nv12_surf(ubyte *const *src, + ubyte *dst, + unsigned width, + unsigned height, + unsigned src_stride, + unsigned dst_stride, + int field) +{ + if (field == 0) { + ubyte *src_0 = src[field]; + for (int i = 0; i < height ; i++) { + memcpy(dst, src_0, width); + dst += dst_stride; + src_0 += src_stride; + } + } else if (field == 1) { + const ubyte *src_1 = src[field]; + const ubyte *src_2 = src[field+1]; + bool odd = true; + for (unsigned i = 0; i < height ; i++) { + for (unsigned j = 0; j < width*2 ; j++) { + if (odd == false) { + dst[j] = src_1[j/2]; + odd = true; + } else { + dst[j] = src_2[j/2]; + odd = false; + } + } + dst += dst_stride; + src_1 += src_stride; + src_2 += src_stride; + } + } +} + +static inline void u_copy_swap422_packed(void *const *destination_data, uint32_t const *destination_pitches, int src_plane, int src_field, diff -Nru mesa-12.0.6/src/gallium/auxiliary/vl/vl_bicubic_filter.c mesa-17.0.7/src/gallium/auxiliary/vl/vl_bicubic_filter.c --- mesa-12.0.6/src/gallium/auxiliary/vl/vl_bicubic_filter.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/vl/vl_bicubic_filter.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,459 @@ +/************************************************************************** + * + * Copyright 2016 Nayan Deshmukh. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#include + +#include "pipe/p_context.h" + +#include "tgsi/tgsi_ureg.h" + +#include "util/u_draw.h" +#include "util/u_memory.h" +#include "util/u_math.h" +#include "util/u_rect.h" + +#include "vl_types.h" +#include "vl_vertex_buffers.h" +#include "vl_bicubic_filter.h" + +enum VS_OUTPUT +{ + VS_O_VPOS = 0, + VS_O_VTEX = 0 +}; + +static void * +create_vert_shader(struct vl_bicubic_filter *filter) +{ + struct ureg_program *shader; + struct ureg_src i_vpos; + struct ureg_dst o_vpos, o_vtex; + + shader = ureg_create(PIPE_SHADER_VERTEX); + if (!shader) + return NULL; + + i_vpos = ureg_DECL_vs_input(shader, 0); + o_vpos = ureg_DECL_output(shader, TGSI_SEMANTIC_POSITION, VS_O_VPOS); + o_vtex = ureg_DECL_output(shader, TGSI_SEMANTIC_GENERIC, VS_O_VTEX); + + ureg_MOV(shader, o_vpos, i_vpos); + ureg_MOV(shader, o_vtex, i_vpos); + + ureg_END(shader); + + return ureg_create_shader_and_destroy(shader, filter->pipe); +} + +static void +create_frag_shader_cubic_interpolater(struct ureg_program *shader, struct ureg_src tex_a, + struct ureg_src tex_b, struct ureg_src tex_c, + struct ureg_src tex_d, struct ureg_src t, + struct ureg_dst o_fragment) +{ + struct ureg_dst temp[11]; + struct ureg_dst t_2; + unsigned i; + + for(i = 0; i < 11; ++i) + temp[i] = ureg_DECL_temporary(shader); + t_2 = ureg_DECL_temporary(shader); + + /* + * |temp[0]| | 0 2 0 0 | |tex_a| + * |temp[1]| = | -1 0 1 0 |* |tex_b| + * |temp[2]| | 2 -5 4 -1 | |tex_c| + * |temp[3]| | -1 3 -3 1 | |tex_d| + */ + ureg_MUL(shader, temp[0], tex_b, ureg_imm1f(shader, 2.0f)); + + ureg_MUL(shader, temp[1], tex_a, ureg_imm1f(shader, -1.0f)); + ureg_MAD(shader, temp[1], tex_c, ureg_imm1f(shader, 1.0f), + ureg_src(temp[1])); + + ureg_MUL(shader, temp[2], tex_a, ureg_imm1f(shader, 2.0f)); + ureg_MAD(shader, temp[2], tex_b, ureg_imm1f(shader, -5.0f), + ureg_src(temp[2])); + ureg_MAD(shader, temp[2], tex_c, ureg_imm1f(shader, 4.0f), + ureg_src(temp[2])); + ureg_MAD(shader, temp[2], tex_d, ureg_imm1f(shader, -1.0f), + ureg_src(temp[2])); + + ureg_MUL(shader, temp[3], tex_a, ureg_imm1f(shader, -1.0f)); + ureg_MAD(shader, temp[3], tex_b, ureg_imm1f(shader, 3.0f), + ureg_src(temp[3])); + ureg_MAD(shader, temp[3], tex_c, ureg_imm1f(shader, -3.0f), + ureg_src(temp[3])); + ureg_MAD(shader, temp[3], tex_d, ureg_imm1f(shader, 1.0f), + ureg_src(temp[3])); + + /* + * t_2 = t*t + * o_fragment = 0.5*|1 t t^2 t^3|*|temp[0]| + * |temp[1]| + * |temp[2]| + * |temp[3]| + */ + + ureg_MUL(shader, t_2, t, t); + ureg_MUL(shader, temp[4], ureg_src(t_2), t); + + ureg_MUL(shader, temp[4], ureg_src(temp[4]), + ureg_src(temp[3])); + ureg_MUL(shader, temp[5], ureg_src(t_2), + ureg_src(temp[2])); + ureg_MUL(shader, temp[6], t, + ureg_src(temp[1])); + ureg_MUL(shader, temp[7], ureg_imm1f(shader, 1.0f), + ureg_src(temp[0])); + ureg_ADD(shader, temp[8], ureg_src(temp[4]), + ureg_src(temp[5])); + ureg_ADD(shader, temp[9], ureg_src(temp[6]), + ureg_src(temp[7])); + + ureg_ADD(shader, temp[10], ureg_src(temp[8]), + ureg_src(temp[9])); + ureg_MUL(shader, o_fragment, ureg_src(temp[10]), + ureg_imm1f(shader, 0.5f)); + + + for(i = 0; i < 11; ++i) + ureg_release_temporary(shader, temp[i]); + ureg_release_temporary(shader, t_2); +} + +static void * +create_frag_shader(struct vl_bicubic_filter *filter, unsigned video_width, + unsigned video_height, struct vertex2f *offsets) +{ + struct pipe_screen *screen = filter->pipe->screen; + struct ureg_program *shader; + struct ureg_src i_vtex, vtex; + struct ureg_src sampler; + struct ureg_src half_pixel; + struct ureg_dst t_array[23]; + struct ureg_dst o_fragment; + struct ureg_dst t; + unsigned i; + + if (screen->get_shader_param( + screen, PIPE_SHADER_FRAGMENT, PIPE_SHADER_CAP_MAX_TEMPS) < 23) { + + return NULL; + } + + shader = ureg_create(PIPE_SHADER_FRAGMENT); + if (!shader) { + return NULL; + } + + i_vtex = ureg_DECL_fs_input(shader, TGSI_SEMANTIC_GENERIC, VS_O_VTEX, TGSI_INTERPOLATE_LINEAR); + sampler = ureg_DECL_sampler(shader, 0); + + for (i = 0; i < 23; ++i) + t_array[i] = ureg_DECL_temporary(shader); + t = ureg_DECL_temporary(shader); + + half_pixel = ureg_DECL_constant(shader, 0); + o_fragment = ureg_DECL_output(shader, TGSI_SEMANTIC_COLOR, 0); + + /* + * temp = (i_vtex - (0.5/dst_size)) * i_size) + * t = frac(temp) + * vtex = floor(i_vtex)/i_size + */ + ureg_ADD(shader, ureg_writemask(t_array[21], TGSI_WRITEMASK_XY), + i_vtex, ureg_negate(half_pixel)); + ureg_MUL(shader, ureg_writemask(t_array[22], TGSI_WRITEMASK_XY), + ureg_src(t_array[21]), ureg_imm2f(shader, video_width, video_height)); + ureg_FRC(shader, ureg_writemask(t, TGSI_WRITEMASK_XY), + ureg_src(t_array[22])); + + ureg_FLR(shader, ureg_writemask(t_array[22], TGSI_WRITEMASK_XY), + ureg_src(t_array[22])); + ureg_DIV(shader, ureg_writemask(t_array[22], TGSI_WRITEMASK_XY), + ureg_src(t_array[22]), ureg_imm2f(shader, video_width, video_height)); + ureg_ADD(shader, ureg_writemask(t_array[22], TGSI_WRITEMASK_XY), + ureg_src(t_array[22]), half_pixel); + + /* + * t_array[0..*] = vtex + offset[0..*] + * t_array[0..*] = tex(t_array[0..*], sampler) + * t_array[16+i] = cubic_interpolate(t_array[4*i..4*i+3], t_x) + * o_fragment = cubic_interpolate(t_array[16..19], t_y) + */ + vtex = ureg_src(t_array[22]); + for (i = 0; i < 16; ++i) { + ureg_ADD(shader, ureg_writemask(t_array[i], TGSI_WRITEMASK_XY), + vtex, ureg_imm2f(shader, offsets[i].x, offsets[i].y)); + ureg_MOV(shader, ureg_writemask(t_array[i], TGSI_WRITEMASK_ZW), + ureg_imm1f(shader, 0.0f)); + } + + for (i = 0; i < 16; ++i) { + ureg_TEX(shader, t_array[i], TGSI_TEXTURE_2D, ureg_src(t_array[i]), sampler); + } + + for(i = 0; i < 4; ++i) + create_frag_shader_cubic_interpolater(shader, ureg_src(t_array[4*i]), + ureg_src(t_array[4*i+1]), ureg_src(t_array[4*i+2]), ureg_src(t_array[4*i+3]), + ureg_scalar(ureg_src(t), TGSI_SWIZZLE_X), t_array[16+i]); + + create_frag_shader_cubic_interpolater(shader, ureg_src(t_array[16]), + ureg_src(t_array[17]), ureg_src(t_array[18]), ureg_src(t_array[19]), + ureg_scalar(ureg_src(t), TGSI_SWIZZLE_Y), o_fragment); + + for(i = 0; i < 23; ++i) + ureg_release_temporary(shader, t_array[i]); + ureg_release_temporary(shader, t); + + ureg_END(shader); + + return ureg_create_shader_and_destroy(shader, filter->pipe); +} + +bool +vl_bicubic_filter_init(struct vl_bicubic_filter *filter, struct pipe_context *pipe, + unsigned width, unsigned height) +{ + struct pipe_rasterizer_state rs_state; + struct pipe_blend_state blend; + struct vertex2f offsets[16]; + struct pipe_sampler_state sampler; + struct pipe_vertex_element ve; + unsigned i; + + assert(filter && pipe); + assert(width && height); + + memset(filter, 0, sizeof(*filter)); + filter->pipe = pipe; + + memset(&rs_state, 0, sizeof(rs_state)); + rs_state.half_pixel_center = true; + rs_state.bottom_edge_rule = true; + rs_state.depth_clip = 1; + filter->rs_state = pipe->create_rasterizer_state(pipe, &rs_state); + if (!filter->rs_state) + goto error_rs_state; + + memset(&blend, 0, sizeof blend); + blend.rt[0].rgb_func = PIPE_BLEND_ADD; + blend.rt[0].rgb_src_factor = PIPE_BLENDFACTOR_ONE; + blend.rt[0].rgb_dst_factor = PIPE_BLENDFACTOR_ONE; + blend.rt[0].alpha_func = PIPE_BLEND_ADD; + blend.rt[0].alpha_src_factor = PIPE_BLENDFACTOR_ONE; + blend.rt[0].alpha_dst_factor = PIPE_BLENDFACTOR_ONE; + blend.logicop_func = PIPE_LOGICOP_CLEAR; + blend.rt[0].colormask = PIPE_MASK_RGBA; + filter->blend = pipe->create_blend_state(pipe, &blend); + if (!filter->blend) + goto error_blend; + + memset(&sampler, 0, sizeof(sampler)); + sampler.wrap_s = PIPE_TEX_WRAP_CLAMP_TO_EDGE; + sampler.wrap_t = PIPE_TEX_WRAP_CLAMP_TO_EDGE; + sampler.wrap_r = PIPE_TEX_WRAP_CLAMP_TO_EDGE; + sampler.min_img_filter = PIPE_TEX_FILTER_NEAREST; + sampler.min_mip_filter = PIPE_TEX_MIPFILTER_NONE; + sampler.mag_img_filter = PIPE_TEX_FILTER_NEAREST; + sampler.compare_mode = PIPE_TEX_COMPARE_NONE; + sampler.compare_func = PIPE_FUNC_ALWAYS; + sampler.normalized_coords = 1; + filter->sampler = pipe->create_sampler_state(pipe, &sampler); + if (!filter->sampler) + goto error_sampler; + + filter->quad = vl_vb_upload_quads(pipe); + if(!filter->quad.buffer) + goto error_quad; + + memset(&ve, 0, sizeof(ve)); + ve.src_offset = 0; + ve.instance_divisor = 0; + ve.vertex_buffer_index = 0; + ve.src_format = PIPE_FORMAT_R32G32_FLOAT; + filter->ves = pipe->create_vertex_elements_state(pipe, 1, &ve); + if (!filter->ves) + goto error_ves; + + offsets[0].x = -1.0f; offsets[0].y = -1.0f; + offsets[1].x = 0.0f; offsets[1].y = -1.0f; + offsets[2].x = 1.0f; offsets[2].y = -1.0f; + offsets[3].x = 2.0f; offsets[3].y = -1.0f; + + offsets[4].x = -1.0f; offsets[4].y = 0.0f; + offsets[5].x = 0.0f; offsets[5].y = 0.0f; + offsets[6].x = 1.0f; offsets[6].y = 0.0f; + offsets[7].x = 2.0f; offsets[7].y = 0.0f; + + offsets[8].x = -1.0f; offsets[8].y = 1.0f; + offsets[9].x = 0.0f; offsets[9].y = 1.0f; + offsets[10].x = 1.0f; offsets[10].y = 1.0f; + offsets[11].x = 2.0f; offsets[11].y = 1.0f; + + offsets[12].x = -1.0f; offsets[12].y = 2.0f; + offsets[13].x = 0.0f; offsets[13].y = 2.0f; + offsets[14].x = 1.0f; offsets[14].y = 2.0f; + offsets[15].x = 2.0f; offsets[15].y = 2.0f; + + for (i = 0; i < 16; ++i) { + offsets[i].x /= width; + offsets[i].y /= height; + } + + filter->vs = create_vert_shader(filter); + if (!filter->vs) + goto error_vs; + + filter->fs = create_frag_shader(filter, width, height, offsets); + if (!filter->fs) + goto error_fs; + + return true; + +error_fs: + pipe->delete_vs_state(pipe, filter->vs); + +error_vs: + pipe->delete_vertex_elements_state(pipe, filter->ves); + +error_ves: + pipe_resource_reference(&filter->quad.buffer, NULL); + +error_quad: + pipe->delete_sampler_state(pipe, filter->sampler); + +error_sampler: + pipe->delete_blend_state(pipe, filter->blend); + +error_blend: + pipe->delete_rasterizer_state(pipe, filter->rs_state); + +error_rs_state: + return false; +} + +void +vl_bicubic_filter_cleanup(struct vl_bicubic_filter *filter) +{ + assert(filter); + + filter->pipe->delete_sampler_state(filter->pipe, filter->sampler); + filter->pipe->delete_blend_state(filter->pipe, filter->blend); + filter->pipe->delete_rasterizer_state(filter->pipe, filter->rs_state); + filter->pipe->delete_vertex_elements_state(filter->pipe, filter->ves); + pipe_resource_reference(&filter->quad.buffer, NULL); + + filter->pipe->delete_vs_state(filter->pipe, filter->vs); + filter->pipe->delete_fs_state(filter->pipe, filter->fs); +} + +void +vl_bicubic_filter_render(struct vl_bicubic_filter *filter, + struct pipe_sampler_view *src, + struct pipe_surface *dst, + struct u_rect *dst_area, + struct u_rect *dst_clip) +{ + struct pipe_viewport_state viewport; + struct pipe_framebuffer_state fb_state; + struct pipe_scissor_state scissor; + union pipe_color_union clear_color; + struct pipe_transfer *buf_transfer; + struct pipe_resource *surface_size; + assert(filter && src && dst); + + if (dst_clip) { + scissor.minx = dst_clip->x0; + scissor.miny = dst_clip->y0; + scissor.maxx = dst_clip->x1; + scissor.maxy = dst_clip->y1; + } else { + scissor.minx = 0; + scissor.miny = 0; + scissor.maxx = dst->width; + scissor.maxy = dst->height; + } + + clear_color.f[0] = clear_color.f[1] = 0.0f; + clear_color.f[2] = clear_color.f[3] = 0.0f; + surface_size = pipe_buffer_create + ( + filter->pipe->screen, + PIPE_BIND_CONSTANT_BUFFER, + PIPE_USAGE_DEFAULT, + 2*sizeof(float) + ); + + + memset(&viewport, 0, sizeof(viewport)); + if(dst_area){ + viewport.scale[0] = dst_area->x1 - dst_area->x0; + viewport.scale[1] = dst_area->y1 - dst_area->y0; + viewport.translate[0] = dst_area->x0; + viewport.translate[1] = dst_area->y0; + } else { + viewport.scale[0] = dst->width; + viewport.scale[1] = dst->height; + } + viewport.scale[2] = 1; + + float *ptr = pipe_buffer_map(filter->pipe, surface_size, + PIPE_TRANSFER_WRITE | PIPE_TRANSFER_DISCARD_RANGE, + &buf_transfer); + + ptr[0] = 0.5f/viewport.scale[0]; + ptr[1] = 0.5f/viewport.scale[1]; + + pipe_buffer_unmap(filter->pipe, buf_transfer); + + memset(&fb_state, 0, sizeof(fb_state)); + fb_state.width = dst->width; + fb_state.height = dst->height; + fb_state.nr_cbufs = 1; + fb_state.cbufs[0] = dst; + + filter->pipe->set_scissor_states(filter->pipe, 0, 1, &scissor); + filter->pipe->clear_render_target(filter->pipe, dst, &clear_color, + 0, 0, dst->width, dst->height, false); + pipe_set_constant_buffer(filter->pipe, PIPE_SHADER_FRAGMENT, 0, surface_size); + filter->pipe->bind_rasterizer_state(filter->pipe, filter->rs_state); + filter->pipe->bind_blend_state(filter->pipe, filter->blend); + filter->pipe->bind_sampler_states(filter->pipe, PIPE_SHADER_FRAGMENT, + 0, 1, &filter->sampler); + filter->pipe->set_sampler_views(filter->pipe, PIPE_SHADER_FRAGMENT, + 0, 1, &src); + filter->pipe->bind_vs_state(filter->pipe, filter->vs); + filter->pipe->bind_fs_state(filter->pipe, filter->fs); + filter->pipe->set_framebuffer_state(filter->pipe, &fb_state); + filter->pipe->set_viewport_states(filter->pipe, 0, 1, &viewport); + filter->pipe->set_vertex_buffers(filter->pipe, 0, 1, &filter->quad); + filter->pipe->bind_vertex_elements_state(filter->pipe, filter->ves); + + util_draw_arrays(filter->pipe, PIPE_PRIM_QUADS, 0, 4); +} diff -Nru mesa-12.0.6/src/gallium/auxiliary/vl/vl_bicubic_filter.h mesa-17.0.7/src/gallium/auxiliary/vl/vl_bicubic_filter.h --- mesa-12.0.6/src/gallium/auxiliary/vl/vl_bicubic_filter.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/vl/vl_bicubic_filter.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,63 @@ +/************************************************************************** + * + * Copyright 2016 Nayan Deshmukh. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +/* implementation of bicubic interpolation filters */ + +#ifndef vl_bicubic_filter_h +#define vl_bicubic_filter_h + +#include "pipe/p_state.h" + +struct vl_bicubic_filter +{ + struct pipe_context *pipe; + struct pipe_vertex_buffer quad; + + void *rs_state; + void *blend; + void *sampler; + void *ves; + void *vs, *fs; +}; + +bool +vl_bicubic_filter_init(struct vl_bicubic_filter *filter, struct pipe_context *pipe, + unsigned width, unsigned height); + +void +vl_bicubic_filter_cleanup(struct vl_bicubic_filter *filter); + + +void +vl_bicubic_filter_render(struct vl_bicubic_filter *filter, + struct pipe_sampler_view *src, + struct pipe_surface *dst, + struct u_rect *dst_area, + struct u_rect *dst_clip); + + +#endif /* vl_bicubic_filter_h */ diff -Nru mesa-12.0.6/src/gallium/auxiliary/vl/vl_compositor.c mesa-17.0.7/src/gallium/auxiliary/vl/vl_compositor.c --- mesa-12.0.6/src/gallium/auxiliary/vl/vl_compositor.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/vl/vl_compositor.c 2017-06-01 10:37:10.000000000 +0000 @@ -125,78 +125,25 @@ return ureg_create_shader_and_destroy(shader, c->pipe); } -static void * -create_frag_shader_video_buffer(struct vl_compositor *c) -{ - struct ureg_program *shader; - struct ureg_src tc; - struct ureg_src csc[3]; - struct ureg_src sampler[3]; - struct ureg_dst texel; - struct ureg_dst fragment; - unsigned i; - - shader = ureg_create(PIPE_SHADER_FRAGMENT); - if (!shader) - return false; - - tc = ureg_DECL_fs_input(shader, TGSI_SEMANTIC_GENERIC, VS_O_VTEX, TGSI_INTERPOLATE_LINEAR); - for (i = 0; i < 3; ++i) { - csc[i] = ureg_DECL_constant(shader, i); - sampler[i] = ureg_DECL_sampler(shader, i); - } - texel = ureg_DECL_temporary(shader); - fragment = ureg_DECL_output(shader, TGSI_SEMANTIC_COLOR, 0); - - /* - * texel.xyz = tex(tc, sampler[i]) - * fragment = csc * texel - */ - for (i = 0; i < 3; ++i) - ureg_TEX(shader, ureg_writemask(texel, TGSI_WRITEMASK_X << i), TGSI_TEXTURE_2D_ARRAY, tc, sampler[i]); - - ureg_MOV(shader, ureg_writemask(texel, TGSI_WRITEMASK_W), ureg_imm1f(shader, 1.0f)); - - for (i = 0; i < 3; ++i) - ureg_DP4(shader, ureg_writemask(fragment, TGSI_WRITEMASK_X << i), csc[i], ureg_src(texel)); - - ureg_MOV(shader, ureg_writemask(fragment, TGSI_WRITEMASK_W), ureg_imm1f(shader, 1.0f)); - - ureg_release_temporary(shader, texel); - ureg_END(shader); - - return ureg_create_shader_and_destroy(shader, c->pipe); -} - -static void * -create_frag_shader_weave(struct vl_compositor *c) +static void +create_frag_shader_weave(struct ureg_program *shader, struct ureg_dst fragment) { - struct ureg_program *shader; struct ureg_src i_tc[2]; - struct ureg_src csc[3]; struct ureg_src sampler[3]; struct ureg_dst t_tc[2]; struct ureg_dst t_texel[2]; - struct ureg_dst o_fragment; unsigned i, j; - shader = ureg_create(PIPE_SHADER_FRAGMENT); - if (!shader) - return false; - i_tc[0] = ureg_DECL_fs_input(shader, TGSI_SEMANTIC_GENERIC, VS_O_VTOP, TGSI_INTERPOLATE_LINEAR); i_tc[1] = ureg_DECL_fs_input(shader, TGSI_SEMANTIC_GENERIC, VS_O_VBOTTOM, TGSI_INTERPOLATE_LINEAR); - for (i = 0; i < 3; ++i) { - csc[i] = ureg_DECL_constant(shader, i); + for (i = 0; i < 3; ++i) sampler[i] = ureg_DECL_sampler(shader, i); - } for (i = 0; i < 2; ++i) { t_tc[i] = ureg_DECL_temporary(shader); t_texel[i] = ureg_DECL_temporary(shader); } - o_fragment = ureg_DECL_output(shader, TGSI_SEMANTIC_COLOR, 0); /* calculate the texture offsets * t_tc.x = i_tc.x @@ -204,8 +151,8 @@ */ for (i = 0; i < 2; ++i) { ureg_MOV(shader, ureg_writemask(t_tc[i], TGSI_WRITEMASK_X), i_tc[i]); - ureg_SUB(shader, ureg_writemask(t_tc[i], TGSI_WRITEMASK_YZ), - i_tc[i], ureg_imm1f(shader, 0.5f)); + ureg_ADD(shader, ureg_writemask(t_tc[i], TGSI_WRITEMASK_YZ), + i_tc[i], ureg_imm1f(shader, -0.5f)); ureg_ROUND(shader, ureg_writemask(t_tc[i], TGSI_WRITEMASK_YZ), ureg_src(t_tc[i])); ureg_MOV(shader, ureg_writemask(t_tc[i], TGSI_WRITEMASK_W), ureg_imm1f(shader, i ? 1.0f : 0.0f)); @@ -239,23 +186,135 @@ ureg_src(t_tc[0]), ureg_negate(i_tc[0])); ureg_MUL(shader, ureg_writemask(t_tc[0], TGSI_WRITEMASK_YZ), ureg_abs(ureg_src(t_tc[0])), ureg_imm1f(shader, 2.0f)); - ureg_LRP(shader, t_texel[0], ureg_swizzle(ureg_src(t_tc[0]), + ureg_LRP(shader, fragment, ureg_swizzle(ureg_src(t_tc[0]), TGSI_SWIZZLE_Y, TGSI_SWIZZLE_Z, TGSI_SWIZZLE_Z, TGSI_SWIZZLE_Z), ureg_src(t_texel[0]), ureg_src(t_texel[1])); - /* and finally do colour space transformation + for (i = 0; i < 2; ++i) { + ureg_release_temporary(shader, t_texel[i]); + ureg_release_temporary(shader, t_tc[i]); + } +} + +static void +create_frag_shader_csc(struct ureg_program *shader, struct ureg_dst texel, + struct ureg_dst fragment) +{ + struct ureg_src csc[3]; + struct ureg_src lumakey; + struct ureg_dst temp[2]; + unsigned i; + + for (i = 0; i < 3; ++i) + csc[i] = ureg_DECL_constant(shader, i); + + lumakey = ureg_DECL_constant(shader, 3); + + for (i = 0; i < 2; ++i) + temp[i] = ureg_DECL_temporary(shader); + + ureg_MOV(shader, ureg_writemask(texel, TGSI_WRITEMASK_W), + ureg_imm1f(shader, 1.0f)); + + for (i = 0; i < 3; ++i) + ureg_DP4(shader, ureg_writemask(fragment, TGSI_WRITEMASK_X << i), csc[i], + ureg_src(texel)); + + ureg_MOV(shader, ureg_writemask(temp[0], TGSI_WRITEMASK_W), + ureg_scalar(ureg_src(texel), TGSI_SWIZZLE_Z)); + ureg_SLE(shader, ureg_writemask(temp[1],TGSI_WRITEMASK_W), + ureg_src(temp[0]), ureg_scalar(lumakey, TGSI_SWIZZLE_X)); + ureg_SGT(shader, ureg_writemask(temp[0],TGSI_WRITEMASK_W), + ureg_src(temp[0]), ureg_scalar(lumakey, TGSI_SWIZZLE_Y)); + ureg_MAX(shader, ureg_writemask(fragment, TGSI_WRITEMASK_W), + ureg_src(temp[0]), ureg_src(temp[1])); + + for (i = 0; i < 2; ++i) + ureg_release_temporary(shader, temp[i]); +} + +static void * +create_frag_shader_video_buffer(struct vl_compositor *c) +{ + struct ureg_program *shader; + struct ureg_src tc; + struct ureg_src sampler[3]; + struct ureg_dst texel; + struct ureg_dst fragment; + unsigned i; + + shader = ureg_create(PIPE_SHADER_FRAGMENT); + if (!shader) + return false; + + tc = ureg_DECL_fs_input(shader, TGSI_SEMANTIC_GENERIC, VS_O_VTEX, TGSI_INTERPOLATE_LINEAR); + for (i = 0; i < 3; ++i) + sampler[i] = ureg_DECL_sampler(shader, i); + + texel = ureg_DECL_temporary(shader); + fragment = ureg_DECL_output(shader, TGSI_SEMANTIC_COLOR, 0); + + /* + * texel.xyz = tex(tc, sampler[i]) * fragment = csc * texel */ - ureg_MOV(shader, ureg_writemask(t_texel[0], TGSI_WRITEMASK_W), ureg_imm1f(shader, 1.0f)); for (i = 0; i < 3; ++i) - ureg_DP4(shader, ureg_writemask(o_fragment, TGSI_WRITEMASK_X << i), csc[i], ureg_src(t_texel[0])); + ureg_TEX(shader, ureg_writemask(texel, TGSI_WRITEMASK_X << i), TGSI_TEXTURE_2D_ARRAY, tc, sampler[i]); - ureg_MOV(shader, ureg_writemask(o_fragment, TGSI_WRITEMASK_W), ureg_imm1f(shader, 1.0f)); + create_frag_shader_csc(shader, texel, fragment); - for (i = 0; i < 2; ++i) { - ureg_release_temporary(shader, t_texel[i]); - ureg_release_temporary(shader, t_tc[i]); - } + ureg_release_temporary(shader, texel); + ureg_END(shader); + + return ureg_create_shader_and_destroy(shader, c->pipe); +} + +static void * +create_frag_shader_weave_rgb(struct vl_compositor *c) +{ + struct ureg_program *shader; + struct ureg_dst texel, fragment; + + shader = ureg_create(PIPE_SHADER_FRAGMENT); + if (!shader) + return false; + + texel = ureg_DECL_temporary(shader); + fragment = ureg_DECL_output(shader, TGSI_SEMANTIC_COLOR, 0); + + create_frag_shader_weave(shader, texel); + create_frag_shader_csc(shader, texel, fragment); + + ureg_release_temporary(shader, texel); + + ureg_END(shader); + + return ureg_create_shader_and_destroy(shader, c->pipe); +} + +static void * +create_frag_shader_weave_yuv(struct vl_compositor *c, bool y) +{ + struct ureg_program *shader; + struct ureg_dst texel, fragment; + + shader = ureg_create(PIPE_SHADER_FRAGMENT); + if (!shader) + return false; + + texel = ureg_DECL_temporary(shader); + fragment = ureg_DECL_output(shader, TGSI_SEMANTIC_COLOR, 0); + + create_frag_shader_weave(shader, texel); + + if (y) + ureg_MOV(shader, ureg_writemask(fragment, TGSI_WRITEMASK_X), ureg_src(texel)); + else + ureg_MOV(shader, ureg_writemask(fragment, TGSI_WRITEMASK_XY), + ureg_swizzle(ureg_src(texel), TGSI_SWIZZLE_Y, + TGSI_SWIZZLE_Z, TGSI_SWIZZLE_W, TGSI_SWIZZLE_W)); + + ureg_release_temporary(shader, texel); ureg_END(shader); @@ -355,12 +414,19 @@ return false; } - c->fs_weave = create_frag_shader_weave(c); - if (!c->fs_weave) { + c->fs_weave_rgb = create_frag_shader_weave_rgb(c); + if (!c->fs_weave_rgb) { debug_printf("Unable to create YCbCr-to-RGB weave fragment shader.\n"); return false; } + c->fs_weave_yuv.y = create_frag_shader_weave_yuv(c, true); + c->fs_weave_yuv.uv = create_frag_shader_weave_yuv(c, false); + if (!c->fs_weave_yuv.y || !c->fs_weave_yuv.uv) { + debug_printf("Unable to create YCbCr i-to-YCbCr p weave fragment shader.\n"); + return false; + } + c->fs_palette.yuv = create_frag_shader_palette(c, true); if (!c->fs_palette.yuv) { debug_printf("Unable to create YUV-Palette-to-RGB fragment shader.\n"); @@ -388,7 +454,9 @@ c->pipe->delete_vs_state(c->pipe, c->vs); c->pipe->delete_fs_state(c->pipe, c->fs_video_buffer); - c->pipe->delete_fs_state(c->pipe, c->fs_weave); + c->pipe->delete_fs_state(c->pipe, c->fs_weave_rgb); + c->pipe->delete_fs_state(c->pipe, c->fs_weave_yuv.y); + c->pipe->delete_fs_state(c->pipe, c->fs_weave_yuv.uv); c->pipe->delete_fs_state(c->pipe, c->fs_palette.yuv); c->pipe->delete_fs_state(c->pipe, c->fs_palette.rgb); c->pipe->delete_fs_state(c->pipe, c->fs_rgba); @@ -851,23 +919,31 @@ cleanup_pipe_state(c); } -void -vl_compositor_set_csc_matrix(struct vl_compositor_state *s, vl_csc_matrix const *matrix) +bool +vl_compositor_set_csc_matrix(struct vl_compositor_state *s, + vl_csc_matrix const *matrix, + float luma_min, float luma_max) { struct pipe_transfer *buf_transfer; assert(s); - memcpy - ( - pipe_buffer_map(s->pipe, s->csc_matrix, - PIPE_TRANSFER_WRITE | PIPE_TRANSFER_DISCARD_RANGE, - &buf_transfer), - matrix, - sizeof(vl_csc_matrix) - ); + float *ptr = pipe_buffer_map(s->pipe, s->csc_matrix, + PIPE_TRANSFER_WRITE | PIPE_TRANSFER_DISCARD_RANGE, + &buf_transfer); + + if (!ptr) + return false; + + memcpy(ptr, matrix, sizeof(vl_csc_matrix)); + + ptr += sizeof(vl_csc_matrix)/sizeof(float); + ptr[0] = luma_min; + ptr[1] = luma_max; pipe_buffer_unmap(s->pipe, buf_transfer); + + return true; } void @@ -945,7 +1021,7 @@ float half_a_line = 0.5f / s->layers[layer].zw.y; switch(deinterlace) { case VL_COMPOSITOR_WEAVE: - s->layers[layer].fs = c->fs_weave; + s->layers[layer].fs = c->fs_weave_rgb; break; case VL_COMPOSITOR_BOB_TOP: @@ -1040,6 +1116,36 @@ } void +vl_compositor_set_yuv_layer(struct vl_compositor_state *s, + struct vl_compositor *c, + unsigned layer, + struct pipe_video_buffer *buffer, + struct u_rect *src_rect, + struct u_rect *dst_rect, + bool y) +{ + struct pipe_sampler_view **sampler_views; + unsigned i; + + assert(s && c && buffer); + + assert(layer < VL_COMPOSITOR_MAX_LAYERS); + + s->used_layers |= 1 << layer; + sampler_views = buffer->get_sampler_view_components(buffer); + for (i = 0; i < 3; ++i) { + s->layers[layer].samplers[i] = c->sampler_linear; + pipe_sampler_view_reference(&s->layers[layer].sampler_views[i], sampler_views[i]); + } + + calc_src_and_dst(&s->layers[layer], buffer->width, buffer->height, + src_rect ? *src_rect : default_rect(&s->layers[layer]), + dst_rect ? *dst_rect : default_rect(&s->layers[layer])); + + s->layers[layer].fs = (y) ? c->fs_weave_yuv.y : c->fs_weave_yuv.uv; +} + +void vl_compositor_render(struct vl_compositor_state *s, struct vl_compositor *c, struct pipe_surface *dst_surface, @@ -1067,7 +1173,7 @@ (dirty_area->x0 < dirty_area->x1 || dirty_area->y0 < dirty_area->y1)) { c->pipe->clear_render_target(c->pipe, dst_surface, &s->clear_color, - 0, 0, dst_surface->width, dst_surface->height); + 0, 0, dst_surface->width, dst_surface->height, false); dirty_area->x0 = dirty_area->y0 = MAX_DIRTY; dirty_area->x1 = dirty_area->y1 = MIN_DIRTY; } @@ -1142,13 +1248,17 @@ pipe->screen, PIPE_BIND_CONSTANT_BUFFER, PIPE_USAGE_DEFAULT, - sizeof(csc_matrix) + sizeof(csc_matrix) + 2*sizeof(float) ); + if (!s->csc_matrix) + return false; + vl_compositor_clear_layers(s); vl_csc_get_matrix(VL_CSC_COLOR_STANDARD_IDENTITY, NULL, true, &csc_matrix); - vl_compositor_set_csc_matrix(s, (const vl_csc_matrix *)&csc_matrix); + if (!vl_compositor_set_csc_matrix(s, (const vl_csc_matrix *)&csc_matrix, 1.0f, 0.0f)) + return false; return true; } diff -Nru mesa-12.0.6/src/gallium/auxiliary/vl/vl_compositor.h mesa-17.0.7/src/gallium/auxiliary/vl/vl_compositor.h --- mesa-12.0.6/src/gallium/auxiliary/vl/vl_compositor.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/vl/vl_compositor.h 2017-06-01 10:37:10.000000000 +0000 @@ -113,10 +113,15 @@ void *vs; void *fs_video_buffer; - void *fs_weave; + void *fs_weave_rgb; void *fs_rgba; struct { + void *y; + void *uv; + } fs_weave_yuv; + + struct { void *rgb; void *yuv; } fs_palette; @@ -137,8 +142,10 @@ /** * set yuv -> rgba conversion matrix */ -void -vl_compositor_set_csc_matrix(struct vl_compositor_state *settings, const vl_csc_matrix *matrix); +bool +vl_compositor_set_csc_matrix(struct vl_compositor_state *settings, + const vl_csc_matrix *matrix, + float luma_min, float luma_max); /** * reset dirty area, so it's cleared with the clear colour @@ -234,6 +241,18 @@ unsigned layer, enum vl_compositor_rotation rotate); +/** + * set a layer of y or uv to render + */ +void +vl_compositor_set_yuv_layer(struct vl_compositor_state *s, + struct vl_compositor *c, + unsigned layer, + struct pipe_video_buffer *buffer, + struct u_rect *src_rect, + struct u_rect *dst_rect, + bool y); + /*@}*/ /** diff -Nru mesa-12.0.6/src/gallium/auxiliary/vl/vl_deint_filter.c mesa-17.0.7/src/gallium/auxiliary/vl/vl_deint_filter.c --- mesa-12.0.6/src/gallium/auxiliary/vl/vl_deint_filter.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/vl/vl_deint_filter.c 2017-06-01 10:37:10.000000000 +0000 @@ -173,21 +173,21 @@ // cur vs prev2 ureg_TEX(shader, t_a, TGSI_TEXTURE_2D_ARRAY, ureg_src(t_comp_bot), sampler_cur); ureg_TEX(shader, t_b, TGSI_TEXTURE_2D_ARRAY, ureg_src(t_comp_bot), sampler_prevprev); - ureg_SUB(shader, ureg_writemask(t_diff, TGSI_WRITEMASK_X), ureg_src(t_a), ureg_src(t_b)); + ureg_ADD(shader, ureg_writemask(t_diff, TGSI_WRITEMASK_X), ureg_src(t_a), ureg_negate(ureg_src(t_b))); // prev vs next ureg_TEX(shader, t_a, TGSI_TEXTURE_2D_ARRAY, ureg_src(t_comp_top), sampler_prev); ureg_TEX(shader, t_b, TGSI_TEXTURE_2D_ARRAY, ureg_src(t_comp_top), sampler_next); - ureg_SUB(shader, ureg_writemask(t_diff, TGSI_WRITEMASK_Y), ureg_src(t_a), ureg_src(t_b)); + ureg_ADD(shader, ureg_writemask(t_diff, TGSI_WRITEMASK_Y), ureg_src(t_a), ureg_negate(ureg_src(t_b))); } else { /* interpolating bottom field -> current field is a top field */ // cur vs prev2 ureg_TEX(shader, t_a, TGSI_TEXTURE_2D_ARRAY, ureg_src(t_comp_top), sampler_cur); ureg_TEX(shader, t_b, TGSI_TEXTURE_2D_ARRAY, ureg_src(t_comp_top), sampler_prevprev); - ureg_SUB(shader, ureg_writemask(t_diff, TGSI_WRITEMASK_X), ureg_src(t_a), ureg_src(t_b)); + ureg_ADD(shader, ureg_writemask(t_diff, TGSI_WRITEMASK_X), ureg_src(t_a), ureg_negate(ureg_src(t_b))); // prev vs next ureg_TEX(shader, t_a, TGSI_TEXTURE_2D_ARRAY, ureg_src(t_comp_bot), sampler_prev); ureg_TEX(shader, t_b, TGSI_TEXTURE_2D_ARRAY, ureg_src(t_comp_bot), sampler_next); - ureg_SUB(shader, ureg_writemask(t_diff, TGSI_WRITEMASK_Y), ureg_src(t_a), ureg_src(t_b)); + ureg_ADD(shader, ureg_writemask(t_diff, TGSI_WRITEMASK_Y), ureg_src(t_a), ureg_negate(ureg_src(t_b))); } // absolute maximum of differences @@ -447,7 +447,8 @@ struct pipe_sampler_view *sampler_views[4]; struct pipe_surface **dst_surfaces; const unsigned *plane_order; - int i, j; + int i; + unsigned j; assert(filter && prevprev && prev && cur && next && field <= 1); diff -Nru mesa-12.0.6/src/gallium/auxiliary/vl/vl_idct.c mesa-17.0.7/src/gallium/auxiliary/vl/vl_idct.c --- mesa-12.0.6/src/gallium/auxiliary/vl/vl_idct.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/vl/vl_idct.c 2017-06-01 10:37:10.000000000 +0000 @@ -321,13 +321,11 @@ create_stage1_frag_shader(struct vl_idct *idct) { struct ureg_program *shader; - struct ureg_src l_addr[2], r_addr[2]; - struct ureg_dst l[4][2], r[2]; struct ureg_dst *fragment; - - int i, j; + unsigned i; + int j; shader = ureg_create(PIPE_SHADER_FRAGMENT); if (!shader) diff -Nru mesa-12.0.6/src/gallium/auxiliary/vl/vl_matrix_filter.c mesa-17.0.7/src/gallium/auxiliary/vl/vl_matrix_filter.c --- mesa-12.0.6/src/gallium/auxiliary/vl/vl_matrix_filter.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/vl/vl_matrix_filter.c 2017-06-01 10:37:10.000000000 +0000 @@ -85,7 +85,7 @@ struct ureg_dst t_sum; struct ureg_dst o_fragment; bool first; - int i; + unsigned i; shader = ureg_create(PIPE_SHADER_FRAGMENT); if (!shader) { diff -Nru mesa-12.0.6/src/gallium/auxiliary/vl/vl_median_filter.c mesa-17.0.7/src/gallium/auxiliary/vl/vl_median_filter.c --- mesa-12.0.6/src/gallium/auxiliary/vl/vl_median_filter.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/vl/vl_median_filter.c 2017-06-01 10:37:10.000000000 +0000 @@ -84,7 +84,7 @@ struct ureg_dst *t_array = MALLOC(sizeof(struct ureg_dst) * num_offsets); struct ureg_dst o_fragment; const unsigned median = num_offsets >> 1; - int i, j; + unsigned i, j; assert(num_offsets & 1); /* we need an odd number of offsets */ if (!(num_offsets & 1)) { /* yeah, we REALLY need an odd number of offsets!!! */ @@ -158,7 +158,8 @@ generate_offsets(enum vl_median_filter_shape shape, unsigned size, struct vertex2f **offsets, unsigned *num_offsets) { - int i = 0, half_size; + unsigned i = 0; + int half_size; struct vertex2f v; assert(offsets && num_offsets); diff -Nru mesa-12.0.6/src/gallium/auxiliary/vl/vl_mpeg12_bitstream.c mesa-17.0.7/src/gallium/auxiliary/vl/vl_mpeg12_bitstream.c --- mesa-12.0.6/src/gallium/auxiliary/vl/vl_mpeg12_bitstream.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/vl/vl_mpeg12_bitstream.c 2017-06-01 10:37:10.000000000 +0000 @@ -583,12 +583,12 @@ break; } - for(i=0; i<(1 << (17 - coeff.length)); ++i) + for(i = 0; i < (1u << (17 - coeff.length)); ++i) dst[src->bitcode << 1 | i] = coeff; if (has_sign) { coeff.level = -coeff.level; - for(; i<(1 << (18 - coeff.length)); ++i) + for(; i < (1u << (18 - coeff.length)); ++i) dst[src->bitcode << 1 | i] = coeff; } } diff -Nru mesa-12.0.6/src/gallium/auxiliary/vl/vl_rbsp.h mesa-17.0.7/src/gallium/auxiliary/vl/vl_rbsp.h --- mesa-12.0.6/src/gallium/auxiliary/vl/vl_rbsp.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/vl/vl_rbsp.h 2017-06-01 10:37:10.000000000 +0000 @@ -50,22 +50,34 @@ */ static inline void vl_rbsp_init(struct vl_rbsp *rbsp, struct vl_vlc *nal, unsigned num_bits) { - unsigned bits_left = vl_vlc_bits_left(nal); + unsigned valid, bits_left = vl_vlc_bits_left(nal); + int i; /* copy the position */ rbsp->nal = *nal; - rbsp->escaped = 0; - /* search for the end of the NAL unit */ while (vl_vlc_search_byte(nal, num_bits, 0x00)) { if (vl_vlc_peekbits(nal, 24) == 0x000001 || vl_vlc_peekbits(nal, 32) == 0x00000001) { vl_vlc_limit(&rbsp->nal, bits_left - vl_vlc_bits_left(nal)); - return; + break; } vl_vlc_eatbits(nal, 8); } + + valid = vl_vlc_valid_bits(&rbsp->nal); + /* search for the emulation prevention three byte */ + for (i = 24; i <= valid; i += 8) { + if ((vl_vlc_peekbits(&rbsp->nal, i) & 0xffffff) == 0x3) { + vl_vlc_removebits(&rbsp->nal, i - 8, 8); + i += 8; + } + } + + valid = vl_vlc_valid_bits(&rbsp->nal); + + rbsp->escaped = (valid >= 16) ? 16 : ((valid >= 8) ? 8 : 0); } /** diff -Nru mesa-12.0.6/src/gallium/auxiliary/vl/vl_video_buffer.c mesa-17.0.7/src/gallium/auxiliary/vl/vl_video_buffer.c --- mesa-12.0.6/src/gallium/auxiliary/vl/vl_video_buffer.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/vl/vl_video_buffer.c 2017-06-01 10:37:10.000000000 +0000 @@ -250,7 +250,7 @@ templ->height0 = tmpl->height; templ->depth0 = depth; templ->array_size = array_size; - templ->bind = PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_RENDER_TARGET; + templ->bind = PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_RENDER_TARGET | tmpl->bind; templ->usage = usage; vl_video_buffer_adjust_size(&templ->width0, &templ->height0, plane, diff -Nru mesa-12.0.6/src/gallium/auxiliary/vl/vl_vlc.h mesa-17.0.7/src/gallium/auxiliary/vl/vl_vlc.h --- mesa-12.0.6/src/gallium/auxiliary/vl/vl_vlc.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/vl/vl_vlc.h 2017-06-01 10:37:10.000000000 +0000 @@ -79,7 +79,7 @@ } for(; src_size > 0; --src_size, ++src) { - for(i=0; i<(1 << (bits - src->entry.length)); ++i) + for(i = 0; i < (1u << (bits - src->entry.length)); ++i) dst[src->bitcode >> (16 - bits) | i] = src->entry; } } @@ -293,7 +293,7 @@ { /* make sure we are on a byte boundary */ assert((vl_vlc_valid_bits(vlc) % 8) == 0); - assert(num_bits == ~0 || (num_bits % 8) == 0); + assert(num_bits == ~0u || (num_bits % 8) == 0); /* deplete the bit buffer */ while (vl_vlc_valid_bits(vlc) > 0) { @@ -305,7 +305,7 @@ vl_vlc_eatbits(vlc, 8); - if (num_bits != ~0) { + if (num_bits != ~0u) { num_bits -= 8; if (num_bits == 0) return FALSE; @@ -332,7 +332,7 @@ } ++vlc->data; - if (num_bits != ~0) { + if (num_bits != ~0u) { num_bits -= 8; if (num_bits == 0) { vl_vlc_align_data_ptr(vlc); diff -Nru mesa-12.0.6/src/gallium/auxiliary/vl/vl_winsys_dri3.c mesa-17.0.7/src/gallium/auxiliary/vl/vl_winsys_dri3.c --- mesa-12.0.6/src/gallium/auxiliary/vl/vl_winsys_dri3.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/vl/vl_winsys_dri3.c 2017-06-01 10:37:10.000000000 +0000 @@ -31,6 +31,7 @@ #include #include #include +#include #include "loader.h" @@ -49,6 +50,7 @@ struct vl_dri3_buffer { struct pipe_resource *texture; + struct pipe_resource *linear_texture; uint32_t pixmap; uint32_t sync_fence; @@ -66,10 +68,16 @@ uint32_t width, height, depth; + xcb_present_event_t eid; xcb_special_event_t *special_event; + struct pipe_context *pipe; + struct pipe_resource *output_texture; + uint32_t clip_width, clip_height; + struct vl_dri3_buffer *back_buffers[BACK_BUFFER_NUM]; int cur_back; + int next_back; struct u_rect dirty_areas[BACK_BUFFER_NUM]; @@ -81,6 +89,7 @@ int64_t last_ust, ns_frame, last_msc, next_msc; bool flushed; + int is_different_gpu; }; static void @@ -100,7 +109,10 @@ xcb_free_pixmap(scrn->conn, buffer->pixmap); xcb_sync_destroy_fence(scrn->conn, buffer->sync_fence); xshmfence_unmap_shm(buffer->shm_fence); - pipe_resource_reference(&buffer->texture, NULL); + if (!scrn->output_texture) + pipe_resource_reference(&buffer->texture, NULL); + if (buffer->linear_texture) + pipe_resource_reference(&buffer->linear_texture, NULL); FREE(buffer); } @@ -208,7 +220,7 @@ xcb_sync_fence_t sync_fence; struct xshmfence *shm_fence; int buffer_fd, fence_fd; - struct pipe_resource templ; + struct pipe_resource templ, *pixmap_buffer_texture; struct winsys_handle whandle; unsigned usage; @@ -225,33 +237,55 @@ goto close_fd; memset(&templ, 0, sizeof(templ)); - templ.bind = PIPE_BIND_RENDER_TARGET | PIPE_BIND_SAMPLER_VIEW | - PIPE_BIND_SCANOUT | PIPE_BIND_SHARED; + templ.bind = PIPE_BIND_RENDER_TARGET | PIPE_BIND_SAMPLER_VIEW; templ.format = PIPE_FORMAT_B8G8R8X8_UNORM; templ.target = PIPE_TEXTURE_2D; templ.last_level = 0; - templ.width0 = scrn->width; - templ.height0 = scrn->height; + templ.width0 = (scrn->output_texture) ? + scrn->output_texture->width0 : scrn->width; + templ.height0 = (scrn->output_texture) ? + scrn->output_texture->height0 : scrn->height; templ.depth0 = 1; templ.array_size = 1; - buffer->texture = scrn->base.pscreen->resource_create(scrn->base.pscreen, - &templ); - if (!buffer->texture) - goto unmap_shm; + if (scrn->is_different_gpu) { + buffer->texture = (scrn->output_texture) ? scrn->output_texture : + scrn->base.pscreen->resource_create(scrn->base.pscreen, &templ); + if (!buffer->texture) + goto unmap_shm; + + templ.bind |= PIPE_BIND_SCANOUT | PIPE_BIND_SHARED | + PIPE_BIND_LINEAR; + buffer->linear_texture = + scrn->base.pscreen->resource_create(scrn->base.pscreen, &templ); + pixmap_buffer_texture = buffer->linear_texture; + + if (!buffer->linear_texture) + goto no_linear_texture; + } else { + templ.bind |= PIPE_BIND_SCANOUT | PIPE_BIND_SHARED; + buffer->texture = (scrn->output_texture) ? scrn->output_texture : + scrn->base.pscreen->resource_create(scrn->base.pscreen, &templ); + if (!buffer->texture) + goto unmap_shm; + pixmap_buffer_texture = buffer->texture; + } memset(&whandle, 0, sizeof(whandle)); whandle.type= DRM_API_HANDLE_TYPE_FD; usage = PIPE_HANDLE_USAGE_EXPLICIT_FLUSH | PIPE_HANDLE_USAGE_READ; - scrn->base.pscreen->resource_get_handle(scrn->base.pscreen, - buffer->texture, &whandle, + scrn->base.pscreen->resource_get_handle(scrn->base.pscreen, NULL, + pixmap_buffer_texture, &whandle, usage); buffer_fd = whandle.handle; buffer->pitch = whandle.stride; + buffer->width = templ.width0; + buffer->height = templ.height0; + xcb_dri3_pixmap_from_buffer(scrn->conn, (pixmap = xcb_generate_id(scrn->conn)), scrn->drawable, 0, - scrn->width, scrn->height, buffer->pitch, + buffer->width, buffer->height, buffer->pitch, scrn->depth, 32, buffer_fd); xcb_dri3_fence_from_fd(scrn->conn, @@ -263,13 +297,13 @@ buffer->pixmap = pixmap; buffer->sync_fence = sync_fence; buffer->shm_fence = shm_fence; - buffer->width = scrn->width; - buffer->height = scrn->height; xshmfence_trigger(buffer->shm_fence); return buffer; +no_linear_texture: + pipe_resource_reference(&buffer->texture, NULL); unmap_shm: xshmfence_unmap_shm(shm_fence); close_fd: @@ -284,6 +318,8 @@ { struct vl_dri3_buffer *buffer; struct pipe_resource *texture = NULL; + bool allocate_new_buffer = false; + int b, id; assert(scrn); @@ -292,8 +328,46 @@ return NULL; buffer = scrn->back_buffers[scrn->cur_back]; - if (!buffer || buffer->width != scrn->width || - buffer->height != scrn->height) { + if (scrn->output_texture) { + if (!buffer || buffer->width < scrn->width || + buffer->height < scrn->height) + allocate_new_buffer = true; + else if (scrn->is_different_gpu) + /* In case of different gpu we can reuse the linear + * texture so we only need to set the external + * texture for copying + */ + buffer->texture = scrn->output_texture; + else { + /* In case of a single gpu we search if the texture is + * already present as buffer if not we get the + * handle and pixmap for the texture that is set + */ + for (b = 0; b < BACK_BUFFER_NUM; b++) { + id = (b + scrn->cur_back) % BACK_BUFFER_NUM; + buffer = scrn->back_buffers[id]; + if (buffer && !buffer->busy && + buffer->texture == scrn->output_texture) { + scrn->cur_back = id; + break; + } + } + + if (b == BACK_BUFFER_NUM) { + allocate_new_buffer = true; + scrn->cur_back = scrn->next_back; + scrn->next_back = (scrn->next_back + 1) % BACK_BUFFER_NUM; + buffer = scrn->back_buffers[scrn->cur_back]; + } + } + + } else { + if (!buffer || buffer->width != scrn->width || + buffer->height != scrn->height) + allocate_new_buffer = true; + } + + if (allocate_new_buffer) { struct vl_dri3_buffer *new_buffer; new_buffer = dri3_alloc_back_buffer(scrn); @@ -303,7 +377,8 @@ if (buffer) dri3_free_back_buffer(scrn, buffer); - vl_compositor_reset_dirty_area(&scrn->dirty_areas[scrn->cur_back]); + if (!scrn->output_texture) + vl_compositor_reset_dirty_area(&scrn->dirty_areas[scrn->cur_back]); buffer = new_buffer; scrn->back_buffers[scrn->cur_back] = buffer; } @@ -322,7 +397,6 @@ xcb_get_geometry_reply_t *geom_reply; xcb_void_cookie_t cookie; xcb_generic_error_t *error; - xcb_present_event_t peid; bool ret = true; assert(drawable); @@ -345,12 +419,16 @@ if (scrn->special_event) { xcb_unregister_for_special_event(scrn->conn, scrn->special_event); scrn->special_event = NULL; + cookie = xcb_present_select_input_checked(scrn->conn, scrn->eid, + scrn->drawable, + XCB_PRESENT_EVENT_MASK_NO_EVENT); + xcb_discard_reply(scrn->conn, cookie.sequence); } scrn->is_pixmap = false; - peid = xcb_generate_id(scrn->conn); + scrn->eid = xcb_generate_id(scrn->conn); cookie = - xcb_present_select_input_checked(scrn->conn, peid, scrn->drawable, + xcb_present_select_input_checked(scrn->conn, scrn->eid, scrn->drawable, XCB_PRESENT_EVENT_MASK_CONFIGURE_NOTIFY | XCB_PRESENT_EVENT_MASK_COMPLETE_NOTIFY | XCB_PRESENT_EVENT_MASK_IDLE_NOTIFY); @@ -369,7 +447,7 @@ free(error); } else scrn->special_event = - xcb_register_for_special_xge(scrn->conn, &xcb_present_id, peid, 0); + xcb_register_for_special_xge(scrn->conn, &xcb_present_id, scrn->eid, 0); dri3_flush_present_events(scrn); @@ -470,6 +548,9 @@ struct vl_dri3_screen *scrn = (struct vl_dri3_screen *)context_private; uint32_t options = XCB_PRESENT_OPTION_NONE; struct vl_dri3_buffer *back; + struct pipe_box src_box; + xcb_xfixes_region_t region; + xcb_rectangle_t rectangle; back = scrn->back_buffers[scrn->cur_back]; if (!back) @@ -481,6 +562,24 @@ return; } + rectangle.x = 0; + rectangle.y = 0; + rectangle.width = (scrn->output_texture) ? scrn->clip_width : scrn->width; + rectangle.height = (scrn->output_texture) ? scrn->clip_height : scrn->height; + + region = xcb_generate_id(scrn->conn); + xcb_xfixes_create_region(scrn->conn, region, 2, &rectangle); + + if (scrn->is_different_gpu) { + u_box_origin_2d(back->width, back->height, &src_box); + scrn->pipe->resource_copy_region(scrn->pipe, + back->linear_texture, + 0, 0, 0, 0, + back->texture, + 0, &src_box); + + scrn->pipe->flush(scrn->pipe, NULL, 0); + } xshmfence_reset(back->shm_fence); back->busy = true; @@ -488,7 +587,7 @@ scrn->drawable, back->pixmap, (uint32_t)(++scrn->send_sbc), - 0, 0, 0, 0, + 0, region, 0, 0, None, None, back->sync_fence, options, @@ -587,6 +686,20 @@ } static void +vl_dri3_screen_set_back_texture_from_output(struct vl_screen *vscreen, + struct pipe_resource *buffer, + uint32_t width, uint32_t height) +{ + struct vl_dri3_screen *scrn = (struct vl_dri3_screen *)vscreen; + + assert(scrn); + + scrn->output_texture = buffer; + scrn->clip_width = (width) ? width : scrn->width; + scrn->clip_height = (height) ? height : scrn->height; +} + +static void vl_dri3_screen_destroy(struct vl_screen *vscreen) { struct vl_dri3_screen *scrn = (struct vl_dri3_screen *)vscreen; @@ -609,8 +722,16 @@ } } - if (scrn->special_event) + if (scrn->special_event) { + xcb_void_cookie_t cookie = + xcb_present_select_input_checked(scrn->conn, scrn->eid, + scrn->drawable, + XCB_PRESENT_EVENT_MASK_NO_EVENT); + + xcb_discard_reply(scrn->conn, cookie.sequence); xcb_unregister_for_special_event(scrn->conn, scrn->special_event); + } + scrn->pipe->destroy(scrn->pipe); scrn->base.pscreen->destroy(scrn->base.pscreen); pipe_loader_release(&scrn->base.dev, 1); FREE(scrn); @@ -627,7 +748,9 @@ xcb_dri3_open_reply_t *open_reply; xcb_get_geometry_cookie_t geom_cookie; xcb_get_geometry_reply_t *geom_reply; - int is_different_gpu; + xcb_xfixes_query_version_cookie_t xfixes_cookie; + xcb_xfixes_query_version_reply_t *xfixes_reply; + xcb_generic_error_t *error; int fd; assert(display); @@ -642,12 +765,26 @@ xcb_prefetch_extension_data(scrn->conn , &xcb_dri3_id); xcb_prefetch_extension_data(scrn->conn, &xcb_present_id); + xcb_prefetch_extension_data (scrn->conn, &xcb_xfixes_id); extension = xcb_get_extension_data(scrn->conn, &xcb_dri3_id); if (!(extension && extension->present)) goto free_screen; extension = xcb_get_extension_data(scrn->conn, &xcb_present_id); if (!(extension && extension->present)) goto free_screen; + extension = xcb_get_extension_data(scrn->conn, &xcb_xfixes_id); + if (!(extension && extension->present)) + goto free_screen; + + xfixes_cookie = xcb_xfixes_query_version(scrn->conn, XCB_XFIXES_MAJOR_VERSION, + XCB_XFIXES_MINOR_VERSION); + xfixes_reply = xcb_xfixes_query_version_reply(scrn->conn, xfixes_cookie, &error); + if (!xfixes_reply || error || xfixes_reply->major_version < 2) { + free(error); + free(xfixes_reply); + goto free_screen; + } + free(xfixes_reply); open_cookie = xcb_dri3_open(scrn->conn, RootWindow(display, screen), None); open_reply = xcb_dri3_open_reply(scrn->conn, open_cookie, NULL); @@ -666,10 +803,7 @@ fcntl(fd, F_SETFD, FD_CLOEXEC); free(open_reply); - fd = loader_get_user_preferred_fd(fd, &is_different_gpu); - /* TODO support different GPU */ - if (is_different_gpu) - goto close_fd; + fd = loader_get_user_preferred_fd(fd, &scrn->is_different_gpu); geom_cookie = xcb_get_geometry(scrn->conn, RootWindow(display, screen)); geom_reply = xcb_get_geometry_reply(scrn->conn, geom_cookie, NULL); @@ -688,6 +822,11 @@ if (!scrn->base.pscreen) goto release_pipe; + scrn->pipe = scrn->base.pscreen->context_create(scrn->base.pscreen, + &scrn->base, 0); + if (!scrn->pipe) + goto no_context; + scrn->base.destroy = vl_dri3_screen_destroy; scrn->base.texture_from_drawable = vl_dri3_screen_texture_from_drawable; scrn->base.get_dirty_area = vl_dri3_screen_get_dirty_area; @@ -695,9 +834,13 @@ scrn->base.set_next_timestamp = vl_dri3_screen_set_next_timestamp; scrn->base.get_private = vl_dri3_screen_get_private; scrn->base.pscreen->flush_frontbuffer = vl_dri3_flush_frontbuffer; + scrn->base.set_back_texture_from_output = vl_dri3_screen_set_back_texture_from_output; + scrn->next_back = 1; return &scrn->base; +no_context: + scrn->base.pscreen->destroy(scrn->base.pscreen); release_pipe: if (scrn->base.dev) { pipe_loader_release(&scrn->base.dev, 1); diff -Nru mesa-12.0.6/src/gallium/auxiliary/vl/vl_winsys_dri.c mesa-17.0.7/src/gallium/auxiliary/vl/vl_winsys_dri.c --- mesa-12.0.6/src/gallium/auxiliary/vl/vl_winsys_dri.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/vl/vl_winsys_dri.c 2017-06-01 10:37:10.000000000 +0000 @@ -46,7 +46,7 @@ #include "state_tracker/drm_driver.h" #include "util/u_memory.h" -#include "util/u_hash.h" +#include "util/crc32.h" #include "util/u_hash_table.h" #include "util/u_inlines.h" @@ -326,6 +326,7 @@ xcb_dri2_authenticate_cookie_t authenticate_cookie; xcb_dri2_authenticate_reply_t *authenticate = NULL; xcb_screen_iterator_t s; + xcb_screen_t *xcb_screen; xcb_generic_error_t *error = NULL; char *device_name; int fd, device_name_length; @@ -357,6 +358,9 @@ goto free_query; s = xcb_setup_roots_iterator(xcb_get_setup(scrn->conn)); + xcb_screen = get_xcb_screen(s, screen); + if (!xcb_screen) + goto free_query; driverType = XCB_DRI2_DRIVER_TYPE_DRI; #ifdef DRI2DriverPrimeShift @@ -374,7 +378,7 @@ #endif connect_cookie = xcb_dri2_connect_unchecked(scrn->conn, - get_xcb_screen(s, screen)->root, + xcb_screen->root, driverType); connect = xcb_dri2_connect_reply(scrn->conn, connect_cookie, NULL); if (connect == NULL || @@ -396,7 +400,7 @@ goto close_fd; authenticate_cookie = xcb_dri2_authenticate_unchecked(scrn->conn, - get_xcb_screen(s, screen)->root, + xcb_screen->root, magic); authenticate = xcb_dri2_authenticate_reply(scrn->conn, authenticate_cookie, NULL); diff -Nru mesa-12.0.6/src/gallium/auxiliary/vl/vl_winsys.h mesa-17.0.7/src/gallium/auxiliary/vl/vl_winsys.h --- mesa-12.0.6/src/gallium/auxiliary/vl/vl_winsys.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/vl/vl_winsys.h 2017-06-01 10:37:10.000000000 +0000 @@ -59,6 +59,11 @@ void * (*get_private)(struct vl_screen *vscreen); + void + (*set_back_texture_from_output)(struct vl_screen *vscreen, + struct pipe_resource *buffer, + uint32_t width, uint32_t height); + struct pipe_screen *pscreen; struct pipe_loader_device *dev; }; diff -Nru mesa-12.0.6/src/gallium/auxiliary/vl/vl_zscan.c mesa-17.0.7/src/gallium/auxiliary/vl/vl_zscan.c --- mesa-12.0.6/src/gallium/auxiliary/vl/vl_zscan.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/auxiliary/vl/vl_zscan.c 2017-06-01 10:37:10.000000000 +0000 @@ -99,15 +99,12 @@ create_vert_shader(struct vl_zscan *zscan) { struct ureg_program *shader; - struct ureg_src scale; struct ureg_src vrect, vpos, block_num; - struct ureg_dst tmp; struct ureg_dst o_vpos; struct ureg_dst *o_vtex; - - signed i; + unsigned i; shader = ureg_create(PIPE_SHADER_VERTEX); if (!shader) @@ -155,7 +152,7 @@ for (i = 0; i < zscan->num_channels; ++i) { ureg_ADD(shader, ureg_writemask(tmp, TGSI_WRITEMASK_X), ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_Y), ureg_imm1f(shader, 1.0f / (zscan->blocks_per_line * VL_BLOCK_WIDTH) - * (i - (signed)zscan->num_channels / 2))); + * ((signed)i - (signed)zscan->num_channels / 2))); ureg_MAD(shader, ureg_writemask(o_vtex[i], TGSI_WRITEMASK_X), vrect, ureg_imm1f(shader, 1.0f / zscan->blocks_per_line), ureg_src(tmp)); diff -Nru mesa-12.0.6/src/gallium/docs/source/context.rst mesa-17.0.7/src/gallium/docs/source/context.rst --- mesa-12.0.6/src/gallium/docs/source/context.rst 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/docs/source/context.rst 2017-06-01 10:37:10.000000000 +0000 @@ -79,6 +79,17 @@ should be the same as the number of set viewports and can be up to PIPE_MAX_VIEWPORTS. * ``set_viewport_states`` +* ``set_window_rectangles`` sets the window rectangles to be used for + rendering, as defined by GL_EXT_window_rectangles. There are two + modes - include and exclude, which define whether the supplied + rectangles are to be used for including fragments or excluding + them. All of the rectangles are ORed together, so in exclude mode, + any fragment inside any rectangle would be culled, while in include + mode, any fragment outside all rectangles would be culled. xmin/ymin + are inclusive, while xmax/ymax are exclusive (same as scissor states + above). Note that this only applies to draws, not clears or + blits. (Blits have their own way to pass the requisite rectangles + in.) * ``set_tess_state`` configures the default tessellation parameters: * ``default_outer_level`` is the default value for the outer tessellation levels. This corresponds to GL's ``PATCH_DEFAULT_OUTER_LEVEL``. @@ -220,12 +231,16 @@ ``clear_render_target`` clears a single color rendertarget with the specified color value. While it is only possible to clear one surface at a time (which can include several layers), this surface need not be bound to the framebuffer. +If render_condition_enabled is false, any current rendering condition is ignored +and the clear will be unconditional. ``clear_depth_stencil`` clears a single depth, stencil or depth/stencil surface with the specified depth and stencil values (for combined depth/stencil buffers, -is is also possible to only clear one or the other part). While it is only +it is also possible to only clear one or the other part). While it is only possible to clear one surface at a time (which can include several layers), this surface need not be bound to the framebuffer. +If render_condition_enabled is false, any current rendering condition is ignored +and the clear will be unconditional. ``clear_texture`` clears a non-PIPE_BUFFER resource's specified level and bounding box with a clear value provided in that resource's native @@ -417,9 +432,10 @@ (typically an occlusion query, or streamout overflow predicate). The ``render_condition`` function specifies the query which should be checked prior to rendering anything. Functions always honoring render_condition include -(and are limited to) draw_vbo, clear, clear_render_target, clear_depth_stencil. -The blit function (but not resource_copy_region, which seems inconsistent) -can also optionally honor the current render condition. +(and are limited to) draw_vbo and clear. +The blit, clear_render_target and clear_depth_stencil functions (but +not resource_copy_region, which seems inconsistent) can also optionally honor +the current render condition. If ``render_condition`` is called with ``query`` = NULL, conditional rendering is disabled and drawing takes place normally. @@ -452,6 +468,14 @@ ``flush`` +PIPE_FLUSH_END_OF_FRAME: Whether the flush marks the end of frame. + +PIPE_FLUSH_DEFERRED: It is not required to flush right away, but it is required +to return a valid fence. If fence_finish is called with the returned fence +and the context is still unflushed, and the ctx parameter of fence_finish is +equal to the context where the fence was created, fence_finish will flush +the context. + ``flush_resource`` @@ -492,9 +516,9 @@ ``blit`` blits a region of a resource to a region of another resource, including scaling, format conversion, and up-/downsampling, as well as a destination clip -rectangle (scissors). It can also optionally honor the current render condition -(but either way the blit itself never contributes anything to queries currently -gathering data). +rectangle (scissors) and window rectangles. It can also optionally honor the +current render condition (but either way the blit itself never contributes +anything to queries currently gathering data). As opposed to manually drawing a textured quad, this lets the pipe driver choose the optimal method for blitting (like using a special 2D engine), and usually offers, for example, accelerated stencil-only copies even where @@ -517,8 +541,9 @@ the transfer object. The pointer into the resource should be considered invalid and discarded. -``transfer_inline_write`` performs a simplified transfer for simple writes. -Basically transfer_map, data write, and transfer_unmap all in one. +``texture_subdata`` and ``buffer_subdata`` perform a simplified +transfer for simple writes. Basically transfer_map, data write, and +transfer_unmap all in one. The box parameter to some of these functions defines a 1D, 2D or 3D @@ -553,7 +578,8 @@ %%%%%%%%%%%%%%% This function flushes all pending writes to the currently-set surfaces and -invalidates all read caches of the currently-set samplers. +invalidates all read caches of the currently-set samplers. This can be used +for both regular textures as well as for framebuffers read via FBFETCH. @@ -667,3 +693,41 @@ It returns TRUE if mipmap generation succeeds, otherwise it returns FALSE. Mipmap generation may fail when it is not supported for particular texture types or formats. + +Device resets +^^^^^^^^^^^^^ + +The state tracker can query or request notifications of when the GPU +is reset for whatever reason (application error, driver error). When +a GPU reset happens, the context becomes unusable and all related state +should be considered lost and undefined. Despite that, context +notifications are single-shot, i.e. subsequent calls to +``get_device_reset_status`` will return PIPE_NO_RESET. + +* ``get_device_reset_status`` queries whether a device reset has happened + since the last call or since the last notification by callback. +* ``set_device_reset_callback`` sets a callback which will be called when + a device reset is detected. The callback is only called synchronously. + +Using several contexts +---------------------- + +Several contexts from the same screen can be used at the same time. Objects +created on one context cannot be used in another context, but the objects +created by the screen methods can be used by all contexts. + +Transfers +^^^^^^^^^ +A transfer on one context is not expected to synchronize properly with +rendering on other contexts, thus only areas not yet used for rendering should +be locked. + +A flush is required after transfer_unmap to expect other contexts to see the +uploaded data, unless: + +* Using persistent mapping. Associated with coherent mapping, unmapping the + resource is also not required to use it in other contexts. Without coherent + mapping, memory_barrier(PIPE_BARRIER_MAPPED_BUFFER) should be called on the + context that has mapped the resource. No flush is required. + +* Mapping the resource with PIPE_TRANSFER_MAP_DIRECTLY. diff -Nru mesa-12.0.6/src/gallium/docs/source/cso/blend.rst mesa-17.0.7/src/gallium/docs/source/cso/blend.rst --- mesa-12.0.6/src/gallium/docs/source/cso/blend.rst 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/docs/source/cso/blend.rst 2017-06-01 10:37:10.000000000 +0000 @@ -88,6 +88,18 @@ the first member of the rt array contains valid data. rt Contains the per-rendertarget blend state. +alpha_to_coverage + If enabled, the fragment's alpha value is used to override the fragment's + coverage mask. The coverage mask will be all zeros if the alpha value is + zero. The coverage mask will be all ones if the alpha value is one. + Otherwise, the number of bits set in the coverage mask will be proportional + to the alpha value. Note that this step happens regardless of whether + multisample is enabled or the destination buffer is multisampled. +alpha_to_one + If enabled, the fragment's alpha value will be set to one. As with + alpha_to_coverage, this step happens regardless of whether multisample + is enabled or the destination buffer is multisampled. + Per-rendertarget Members ------------------------ diff -Nru mesa-12.0.6/src/gallium/docs/source/cso/rasterizer.rst mesa-17.0.7/src/gallium/docs/source/cso/rasterizer.rst --- mesa-12.0.6/src/gallium/docs/source/cso/rasterizer.rst 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/docs/source/cso/rasterizer.rst 2017-06-01 10:37:10.000000000 +0000 @@ -127,6 +127,12 @@ offset_units Specifies the polygon offset bias +offset_units_unscaled + Specifies the unit of the polygon offset bias. If false, use the + GL/D3D1X behaviour. If true, offset_units is a floating point offset + which isn't scaled (D3D9). Note that GL/D3D1X behaviour has different + formula whether the depth buffer is unorm or float, which is not + the case for D3D9. offset_scale Specifies the polygon offset scale offset_clamp diff -Nru mesa-12.0.6/src/gallium/docs/source/drivers/openswr/faq.rst mesa-17.0.7/src/gallium/docs/source/drivers/openswr/faq.rst --- mesa-12.0.6/src/gallium/docs/source/drivers/openswr/faq.rst 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/docs/source/drivers/openswr/faq.rst 2017-06-01 10:37:10.000000000 +0000 @@ -5,7 +5,7 @@ -------------------------------- Good question, given there are already three (swrast, softpipe, -llvmpipe) in the Mesa3D tree. Two important reasons for this: +llvmpipe) in the Mesa tree. Two important reasons for this: * Architecture - given our focus on scientific visualization, our workloads are much different than the typical game; we have heavy @@ -16,7 +16,7 @@ * Historical - Intel had developed a high performance software graphics stack for internal purposes. Later we adapted this graphics stack for use in visualization and decided to move forward - with Mesa3D to provide a high quality API layer while at the same + with Mesa to provide a high quality API layer while at the same time benefiting from the excellent performance the software rasterizerizer gives us. diff -Nru mesa-12.0.6/src/gallium/docs/source/screen.rst mesa-17.0.7/src/gallium/docs/source/screen.rst --- mesa-12.0.6/src/gallium/docs/source/screen.rst 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/docs/source/screen.rst 2017-06-01 10:37:10.000000000 +0000 @@ -136,8 +136,8 @@ PIPE_BUFFER. In other words, the pointer returned by transfer_map is always aligned to this value. * ``PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT``: Describes the required - alignment for pipe_sampler_view::u.buf.first_element, in bytes. - If a driver does not support first/last_element, it should return 0. + alignment for pipe_sampler_view::u.buf.offset, in bytes. + If a driver does not support offset/size, it should return 0. * ``PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY``: Whether the driver only supports R, RG, RGB and RGBA formats for PIPE_BUFFER sampler views. When this is the case it should be assumed that the swizzle parameters @@ -340,6 +340,37 @@ extension and thus implements proper support for culling planes. * ``PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES``: Whether primitive restart is supported for patch primitives. +* ``PIPE_CAP_TGSI_VOTE``: Whether the ``VOTE_*`` ops can be used in shaders. +* ``PIPE_CAP_MAX_WINDOW_RECTANGLES``: The maxium number of window rectangles + supported in ``set_window_rectangles``. +* ``PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED``: If true, the driver implements support + for ``pipe_rasterizer_state::offset_units_unscaled``. +* ``PIPE_CAP_VIEWPORT_SUBPIXEL_BITS``: Number of bits of subpixel precision for + floating point viewport bounds. +* ``PIPE_CAP_MIXED_COLOR_DEPTH_BITS``: Whether there is non-fallback + support for color/depth format combinations that use a different + number of bits. For the purpose of this cap, Z24 is treated as + 32-bit. If set to off, that means that a B5G6R5 + Z24 or RGBA8 + Z16 + combination will require a driver fallback, and should not be + advertised in the GLX/EGL config list. +* ``PIPE_CAP_TGSI_ARRAY_COMPONENTS``: If true, the driver interprets the + UsageMask of input and output declarations and allows declaring arrays + in overlapping ranges. The components must be a contiguous range, e.g. a + UsageMask of xy or yzw is allowed, but xz or yw isn't. Declarations with + overlapping locations must have matching semantic names and indices, and + equal interpolation qualifiers. + Components may overlap, notably when the gaps in an array of dvec3 are + filled in. +* ``PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS``: Whether interleaved stream + output mode is able to interleave across buffers. This is required for + ARB_transform_feedback3. +* ``PIPE_CAP_TGSI_CAN_READ_OUTPUTS``: Whether every TGSI shader stage can read + from the output file. +* ``PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY``: Tell the GLSL compiler to use + the minimum amount of optimizations just to be able to do all the linking + and lowering. +* ``PIPE_CAP_TGSI_FS_FBFETCH``: Whether a fragment shader can use the FBFETCH + opcode to retrieve the current value in the framebuffer. .. _pipe_capf: @@ -439,6 +470,10 @@ * ``PIPE_SHADER_CAP_SUPPORTED_IRS``: Supported representations of the program. It should be a mask of ``pipe_shader_ir`` bits. * ``PIPE_SHADER_CAP_MAX_SHADER_IMAGES``: Maximum number of image units. +* ``PIPE_SHADER_CAP_LOWER_IF_THRESHOLD``: IF and ELSE branches with a lower + cost than this value should be lowered by the state tracker for better + performance. This is a tunable for the GLSL compiler and the behavior is + specific to the compiler. .. _pipe_compute_cap: @@ -483,6 +518,12 @@ non-zero means yes, zero means no. Value type: ``uint32_t`` * ``PIPE_COMPUTE_CAP_SUBGROUP_SIZE``: The size of a basic execution unit in threads. Also known as wavefront size, warp size or SIMD width. +* ``PIPE_COMPUTE_CAP_ADDRESS_BITS``: The default compute device address space + size specified as an unsigned integer value in bits. +* ``PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK``: Maximum variable number + of threads that a single block can contain. This is similar to + PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK, except that the variable size is not + known a compile-time but at dispatch-time. .. _pipe_bind: @@ -514,8 +555,6 @@ * ``PIPE_BIND_VERTEX_BUFFER``: A vertex buffer. * ``PIPE_BIND_INDEX_BUFFER``: An vertex index/element buffer. * ``PIPE_BIND_CONSTANT_BUFFER``: A buffer of shader constants. -* ``PIPE_BIND_TRANSFER_WRITE``: A transfer object which will be written to. -* ``PIPE_BIND_TRANSFER_READ``: A transfer object which will be read from. * ``PIPE_BIND_STREAM_OUTPUT``: A stream output buffer. * ``PIPE_BIND_CUSTOM``: * ``PIPE_BIND_SCANOUT``: A front color buffer or scanout buffer. @@ -703,3 +742,13 @@ The function returns non-zero on success. The driver-specific query group is described with the pipe_driver_query_group_info structure. + + +Thread safety +------------- + +Screen methods are required to be thread safe. While gallium rendering +contexts are not required to be thread safe, it is required to be safe to use +different contexts created with the same screen in different threads without +locks. It is also required to be safe using screen methods in a thread, while +using one of its contexts in another (without locks). diff -Nru mesa-12.0.6/src/gallium/docs/source/tgsi.rst mesa-17.0.7/src/gallium/docs/source/tgsi.rst --- mesa-12.0.6/src/gallium/docs/source/tgsi.rst 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/docs/source/tgsi.rst 2017-06-01 10:37:10.000000000 +0000 @@ -1583,48 +1583,43 @@ .. opcode:: IBFE - Signed Bitfield Extract - See SM5 instruction of the same name. Extracts a set of bits from the input, - and sign-extends them if the high bit of the extracted window is set. + Like GLSL bitfieldExtract. Extracts a set of bits from the input, and + sign-extends them if the high bit of the extracted window is set. Pseudocode:: def ibfe(value, offset, bits): - offset = offset & 0x1f - bits = bits & 0x1f + if offset < 0 or bits < 0 or offset + bits > 32: + return undefined if bits == 0: return 0 # Note: >> sign-extends - if width + offset < 32: - return (value << (32 - offset - bits)) >> (32 - bits) - else: - return value >> offset + return (value << (32 - offset - bits)) >> (32 - bits) .. opcode:: UBFE - Unsigned Bitfield Extract - See SM5 instruction of the same name. Extracts a set of bits from the input, - without any sign-extension. + Like GLSL bitfieldExtract. Extracts a set of bits from the input, without + any sign-extension. Pseudocode:: def ubfe(value, offset, bits): - offset = offset & 0x1f - bits = bits & 0x1f + if offset < 0 or bits < 0 or offset + bits > 32: + return undefined if bits == 0: return 0 # Note: >> does not sign-extend - if width + offset < 32: - return (value << (32 - offset - bits)) >> (32 - bits) - else: - return value >> offset + return (value << (32 - offset - bits)) >> (32 - bits) .. opcode:: BFI - Bitfield Insert - See SM5 instruction of the same name. Replaces a bit region of 'base' with - the low bits of 'insert'. + Like GLSL bitfieldInsert. Replaces a bit region of 'base' with the low bits + of 'insert'. Pseudocode:: def bfi(base, insert, offset, bits): - offset = offset & 0x1f - bits = bits & 0x1f + if offset < 0 or bits < 0 or offset + bits > 32: + return undefined + # << defined such that mask == ~0 when bits == 32, offset == 0 mask = ((1 << bits) - 1) << offset return ((insert << offset) & mask) | (base & ~mask) @@ -2010,6 +2005,15 @@ dst.zw = src0.zw \times src1.zw + src2.zw +.. opcode:: DDIV - Divide + +.. math:: + + dst.xy = \frac{src0.xy}{src1.xy} + + dst.zw = \frac{src0.zw}{src1.zw} + + .. opcode:: DRCP - Reciprocal .. math:: @@ -2082,6 +2086,246 @@ dst.y = unsigned(src0.zw) +64-bit Integer ISA +^^^^^^^^^^^^^^^^^^ + +The 64-bit integer opcodes reinterpret four-component vectors into +two-component vectors with 64-bits in each component. + +.. opcode:: I64ABS - 64-bit Integer Absolute Value + + dst.xy = |src0.xy| + dst.zw = |src0.zw| + +.. opcode:: I64NEG - 64-bit Integer Negate + + Two's complement. + +.. math:: + + dst.xy = -src.xy + dst.zw = -src.zw + +.. opcode:: I64SSG - 64-bit Integer Set Sign + +.. math:: + + dst.xy = (src0.xy < 0) ? -1 : (src0.xy > 0) ? 1 : 0 + dst.zw = (src0.zw < 0) ? -1 : (src0.zw > 0) ? 1 : 0 + +.. opcode:: U64ADD - 64-bit Integer Add + +.. math:: + + dst.xy = src0.xy + src1.xy + dst.zw = src0.zw + src1.zw + +.. opcode:: U64MUL - 64-bit Integer Multiply + +.. math:: + + dst.xy = src0.xy * src1.xy + dst.zw = src0.zw * src1.zw + +.. opcode:: U64SEQ - 64-bit Integer Set on Equal + +.. math:: + + dst.x = src0.xy == src1.xy ? \sim 0 : 0 + dst.z = src0.zw == src1.zw ? \sim 0 : 0 + +.. opcode:: U64SNE - 64-bit Integer Set on Not Equal + +.. math:: + + dst.x = src0.xy != src1.xy ? \sim 0 : 0 + dst.z = src0.zw != src1.zw ? \sim 0 : 0 + +.. opcode:: U64SLT - 64-bit Unsigned Integer Set on Less Than + +.. math:: + + dst.x = src0.xy < src1.xy ? \sim 0 : 0 + dst.z = src0.zw < src1.zw ? \sim 0 : 0 + +.. opcode:: U64SGE - 64-bit Unsigned Integer Set on Greater Equal + +.. math:: + + dst.x = src0.xy >= src1.xy ? \sim 0 : 0 + dst.z = src0.zw >= src1.zw ? \sim 0 : 0 + +.. opcode:: I64SLT - 64-bit Signed Integer Set on Less Than + +.. math:: + + dst.x = src0.xy < src1.xy ? \sim 0 : 0 + dst.z = src0.zw < src1.zw ? \sim 0 : 0 + +.. opcode:: I64SGE - 64-bit Signed Integer Set on Greater Equal + +.. math:: + + dst.x = src0.xy >= src1.xy ? \sim 0 : 0 + dst.z = src0.zw >= src1.zw ? \sim 0 : 0 + +.. opcode:: I64MIN - Minimum of 64-bit Signed Integers + +.. math:: + + dst.xy = min(src0.xy, src1.xy) + dst.zw = min(src0.zw, src1.zw) + +.. opcode:: U64MIN - Minimum of 64-bit Unsigned Integers + +.. math:: + + dst.xy = min(src0.xy, src1.xy) + dst.zw = min(src0.zw, src1.zw) + +.. opcode:: I64MAX - Maximum of 64-bit Signed Integers + +.. math:: + + dst.xy = max(src0.xy, src1.xy) + dst.zw = max(src0.zw, src1.zw) + +.. opcode:: U64MAX - Maximum of 64-bit Unsigned Integers + +.. math:: + + dst.xy = max(src0.xy, src1.xy) + dst.zw = max(src0.zw, src1.zw) + +.. opcode:: U64SHL - Shift Left 64-bit Unsigned Integer + + The shift count is masked with 0x3f before the shift is applied. + +.. math:: + + dst.xy = src0.xy << (0x3f \& src1.x) + dst.zw = src0.zw << (0x3f \& src1.y) + +.. opcode:: I64SHR - Arithmetic Shift Right (of 64-bit Signed Integer) + + The shift count is masked with 0x3f before the shift is applied. + +.. math:: + + dst.xy = src0.xy >> (0x3f \& src1.x) + dst.zw = src0.zw >> (0x3f \& src1.y) + +.. opcode:: U64SHR - Logical Shift Right (of 64-bit Unsigned Integer) + + The shift count is masked with 0x3f before the shift is applied. + +.. math:: + + dst.xy = src0.xy >> (unsigned) (0x3f \& src1.x) + dst.zw = src0.zw >> (unsigned) (0x3f \& src1.y) + +.. opcode:: I64DIV - 64-bit Signed Integer Division + +.. math:: + + dst.xy = src0.xy \ src1.xy + dst.zw = src0.zw \ src1.zw + +.. opcode:: U64DIV - 64-bit Unsigned Integer Division + +.. math:: + + dst.xy = src0.xy \ src1.xy + dst.zw = src0.zw \ src1.zw + +.. opcode:: U64MOD - 64-bit Unsigned Integer Remainder + +.. math:: + + dst.xy = src0.xy \bmod src1.xy + dst.zw = src0.zw \bmod src1.zw + +.. opcode:: I64MOD - 64-bit Signed Integer Remainder + +.. math:: + + dst.xy = src0.xy \bmod src1.xy + dst.zw = src0.zw \bmod src1.zw + +.. opcode:: F2U64 - Float to 64-bit Unsigned Int + +.. math:: + + dst.xy = (uint64_t) src0.x + dst.zw = (uint64_t) src0.y + +.. opcode:: F2I64 - Float to 64-bit Int + +.. math:: + + dst.xy = (int64_t) src0.x + dst.zw = (int64_t) src0.y + +.. opcode:: U2I64 - Unsigned Integer to 64-bit Integer + + This is a zero extension. + +.. math:: + + dst.xy = (uint64_t) src0.x + dst.zw = (uint64_t) src0.y + +.. opcode:: I2I64 - Signed Integer to 64-bit Integer + + This is a sign extension. + +.. math:: + + dst.xy = (int64_t) src0.x + dst.zw = (int64_t) src0.y + +.. opcode:: D2U64 - Double to 64-bit Unsigned Int + +.. math:: + + dst.xy = (uint64_t) src0.xy + dst.zw = (uint64_t) src0.zw + +.. opcode:: D2I64 - Double to 64-bit Int + +.. math:: + + dst.xy = (int64_t) src0.xy + dst.zw = (int64_t) src0.zw + +.. opcode:: U642F - 64-bit unsigned integer to float + +.. math:: + + dst.x = (float) src0.xy + dst.y = (float) src0.zw + +.. opcode:: I642F - 64-bit Int to Float + +.. math:: + + dst.x = (float) src0.xy + dst.y = (float) src0.zw + +.. opcode:: U642D - 64-bit unsigned integer to double + +.. math:: + + dst.xy = (double) src0.xy + dst.zw = (double) src0.zw + +.. opcode:: I642D - 64-bit Int to double + +.. math:: + + dst.xy = (double) src0.xy + dst.zw = (double) src0.zw + .. _samplingopcodes: Resource Sampling Opcodes @@ -2326,6 +2570,19 @@ image, while .w will contain the number of samples for multi-sampled images. +.. opcode:: FBFETCH - Load data from framebuffer + + Syntax: ``FBFETCH dst, output`` + + Example: ``FBFETCH TEMP[0], OUT[0]`` + + This is only valid on ``COLOR`` semantic outputs. Returns the color + of the current position in the framebuffer from before this fragment + shader invocation. May return the same value from multiple calls for + a particular output within a single invocation. Note that result may + be undefined if a fragment is drawn multiple times without a blend + barrier in between. + .. _threadsyncopcodes: @@ -2557,6 +2814,23 @@ resource[offset] = (dst_x > src_x ? dst_x : src_x) +.. _voteopcodes: + +Vote opcodes +^^^^^^^^^^^^ + +These opcodes compare the given value across the shader invocations +running in the current SIMD group. The details of exactly which +invocations get compared are implementation-defined, and it would be a +correct implementation to only ever consider the current thread's +value. (i.e. SIMD group of 1). The argument is treated as a boolean. + +.. opcode:: VOTE_ANY - Value is set in any of the current invocations + +.. opcode:: VOTE_ALL - Value is set in all of the current invocations + +.. opcode:: VOTE_EQ - Value is the same in all of the current invocations + Explanation of symbols used ------------------------------ @@ -3029,6 +3303,42 @@ component is used. +TGSI_SEMANTIC_WORK_DIM +"""""""""""""""""""""" + +For compute shaders started via opencl this retrieves the work_dim +parameter to the clEnqueueNDRangeKernel call with which the shader +was started. + + +TGSI_SEMANTIC_GRID_SIZE +""""""""""""""""""""""" + +For compute shaders, this semantic indicates the maximum (x, y, z) dimensions +of a grid of thread blocks. + + +TGSI_SEMANTIC_BLOCK_ID +"""""""""""""""""""""" + +For compute shaders, this semantic indicates the (x, y, z) coordinates of the +current block inside of the grid. + + +TGSI_SEMANTIC_BLOCK_SIZE +"""""""""""""""""""""""" + +For compute shaders, this semantic indicates the maximum (x, y, z) dimensions +of a block in threads. + + +TGSI_SEMANTIC_THREAD_ID +""""""""""""""""""""""" + +For compute shaders, this semantic indicates the (x, y, z) coordinates of the +current thread inside of the block. + + Declaration Interpolate ^^^^^^^^^^^^^^^^^^^^^^^ diff -Nru mesa-12.0.6/src/gallium/drivers/ddebug/dd_context.c mesa-17.0.7/src/gallium/drivers/ddebug/dd_context.c --- mesa-12.0.6/src/gallium/drivers/ddebug/dd_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/ddebug/dd_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -27,6 +27,7 @@ #include "dd_pipe.h" #include "tgsi/tgsi_parse.h" +#include "util/u_inlines.h" #include "util/u_memory.h" @@ -85,6 +86,32 @@ return query; } +static struct pipe_query * +dd_context_create_batch_query(struct pipe_context *_pipe, unsigned num_queries, + unsigned *query_types) +{ + struct pipe_context *pipe = dd_context(_pipe)->pipe; + struct pipe_query *query; + + query = pipe->create_batch_query(pipe, num_queries, query_types); + + /* Wrap query object. */ + if (query) { + struct dd_query *dd_query = CALLOC_STRUCT(dd_query); + if (dd_query) { + /* no special handling for batch queries yet */ + dd_query->type = query_types[0]; + dd_query->query = query; + query = (struct pipe_query *)dd_query; + } else { + pipe->destroy_query(pipe, query); + query = NULL; + } + } + + return query; +} + static void dd_context_destroy_query(struct pipe_context *_pipe, struct pipe_query *query) @@ -138,11 +165,12 @@ { struct dd_context *dctx = dd_context(_pipe); struct pipe_context *pipe = dctx->pipe; + struct dd_draw_state *dstate = &dctx->draw_state; pipe->render_condition(pipe, dd_query_unwrap(query), condition, mode); - dctx->render_cond.query = dd_query(query); - dctx->render_cond.condition = condition; - dctx->render_cond.mode = mode; + dstate->render_cond.query = dd_query(query); + dstate->render_cond.condition = condition; + dstate->render_cond.mode = mode; } @@ -173,7 +201,7 @@ struct pipe_context *pipe = dctx->pipe; \ struct dd_state *hstate = state; \ \ - dctx->shortname = hstate; \ + dctx->draw_state.shortname = hstate; \ pipe->bind_##name##_state(pipe, hstate ? hstate->cso : NULL); \ } @@ -202,13 +230,14 @@ DD_CSO_DELETE(sampler) static void -dd_context_bind_sampler_states(struct pipe_context *_pipe, unsigned shader, +dd_context_bind_sampler_states(struct pipe_context *_pipe, + enum pipe_shader_type shader, unsigned start, unsigned count, void **states) { struct dd_context *dctx = dd_context(_pipe); struct pipe_context *pipe = dctx->pipe; - memcpy(&dctx->sampler_states[shader][start], states, + memcpy(&dctx->draw_state.sampler_states[shader][start], states, sizeof(void*) * count); if (states) { @@ -258,7 +287,7 @@ struct pipe_context *pipe = dctx->pipe; \ struct dd_state *hstate = state; \ \ - dctx->shaders[PIPE_SHADER_##NAME] = hstate; \ + dctx->draw_state.shaders[PIPE_SHADER_##NAME] = hstate; \ pipe->bind_##name##_state(pipe, hstate ? hstate->cso : NULL); \ } \ \ @@ -328,7 +357,7 @@ struct dd_context *dctx = dd_context(_pipe); \ struct pipe_context *pipe = dctx->pipe; \ \ - dctx->name = deref; \ + dctx->draw_state.name = deref; \ pipe->set_##name(pipe, ref); \ } @@ -343,13 +372,13 @@ static void dd_context_set_constant_buffer(struct pipe_context *_pipe, uint shader, uint index, - struct pipe_constant_buffer *constant_buffer) + const struct pipe_constant_buffer *constant_buffer) { struct dd_context *dctx = dd_context(_pipe); struct pipe_context *pipe = dctx->pipe; - safe_memcpy(&dctx->constant_buffers[shader][index], constant_buffer, - sizeof(*constant_buffer)); + safe_memcpy(&dctx->draw_state.constant_buffers[shader][index], + constant_buffer, sizeof(*constant_buffer)); pipe->set_constant_buffer(pipe, shader, index, constant_buffer); } @@ -361,7 +390,7 @@ struct dd_context *dctx = dd_context(_pipe); struct pipe_context *pipe = dctx->pipe; - safe_memcpy(&dctx->scissors[start_slot], states, + safe_memcpy(&dctx->draw_state.scissors[start_slot], states, sizeof(*states) * num_scissors); pipe->set_scissor_states(pipe, start_slot, num_scissors, states); } @@ -374,7 +403,7 @@ struct dd_context *dctx = dd_context(_pipe); struct pipe_context *pipe = dctx->pipe; - safe_memcpy(&dctx->viewports[start_slot], states, + safe_memcpy(&dctx->draw_state.viewports[start_slot], states, sizeof(*states) * num_viewports); pipe->set_viewport_states(pipe, start_slot, num_viewports, states); } @@ -386,8 +415,10 @@ struct dd_context *dctx = dd_context(_pipe); struct pipe_context *pipe = dctx->pipe; - memcpy(dctx->tess_default_levels, default_outer_level, sizeof(float) * 4); - memcpy(dctx->tess_default_levels+4, default_inner_level, sizeof(float) * 2); + memcpy(dctx->draw_state.tess_default_levels, default_outer_level, + sizeof(float) * 4); + memcpy(dctx->draw_state.tess_default_levels+4, default_inner_level, + sizeof(float) * 2); pipe->set_tess_state(pipe, default_outer_level, default_inner_level); } @@ -476,27 +507,29 @@ */ static void -dd_context_set_sampler_views(struct pipe_context *_pipe, unsigned shader, +dd_context_set_sampler_views(struct pipe_context *_pipe, + enum pipe_shader_type shader, unsigned start, unsigned num, struct pipe_sampler_view **views) { struct dd_context *dctx = dd_context(_pipe); struct pipe_context *pipe = dctx->pipe; - safe_memcpy(&dctx->sampler_views[shader][start], views, + safe_memcpy(&dctx->draw_state.sampler_views[shader][start], views, sizeof(views[0]) * num); pipe->set_sampler_views(pipe, shader, start, num, views); } static void -dd_context_set_shader_images(struct pipe_context *_pipe, unsigned shader, +dd_context_set_shader_images(struct pipe_context *_pipe, + enum pipe_shader_type shader, unsigned start, unsigned num, - struct pipe_image_view *views) + const struct pipe_image_view *views) { struct dd_context *dctx = dd_context(_pipe); struct pipe_context *pipe = dctx->pipe; - safe_memcpy(&dctx->shader_images[shader][start], views, + safe_memcpy(&dctx->draw_state.shader_images[shader][start], views, sizeof(views[0]) * num); pipe->set_shader_images(pipe, shader, start, num, views); } @@ -504,12 +537,12 @@ static void dd_context_set_shader_buffers(struct pipe_context *_pipe, unsigned shader, unsigned start, unsigned num_buffers, - struct pipe_shader_buffer *buffers) + const struct pipe_shader_buffer *buffers) { struct dd_context *dctx = dd_context(_pipe); struct pipe_context *pipe = dctx->pipe; - safe_memcpy(&dctx->shader_buffers[shader][start], buffers, + safe_memcpy(&dctx->draw_state.shader_buffers[shader][start], buffers, sizeof(buffers[0]) * num_buffers); pipe->set_shader_buffers(pipe, shader, start, num_buffers, buffers); } @@ -522,7 +555,7 @@ struct dd_context *dctx = dd_context(_pipe); struct pipe_context *pipe = dctx->pipe; - safe_memcpy(&dctx->vertex_buffers[start], buffers, + safe_memcpy(&dctx->draw_state.vertex_buffers[start], buffers, sizeof(buffers[0]) * num_buffers); pipe->set_vertex_buffers(pipe, start, num_buffers, buffers); } @@ -534,7 +567,7 @@ struct dd_context *dctx = dd_context(_pipe); struct pipe_context *pipe = dctx->pipe; - safe_memcpy(&dctx->index_buffer, ib, sizeof(*ib)); + safe_memcpy(&dctx->draw_state.index_buffer, ib, sizeof(*ib)); pipe->set_index_buffer(pipe, ib); } @@ -546,10 +579,11 @@ { struct dd_context *dctx = dd_context(_pipe); struct pipe_context *pipe = dctx->pipe; + struct dd_draw_state *dstate = &dctx->draw_state; - dctx->num_so_targets = num_targets; - safe_memcpy(dctx->so_targets, tgs, sizeof(*tgs) * num_targets); - safe_memcpy(dctx->so_offsets, offsets, sizeof(*offsets) * num_targets); + dstate->num_so_targets = num_targets; + safe_memcpy(dstate->so_targets, tgs, sizeof(*tgs) * num_targets); + safe_memcpy(dstate->so_offsets, offsets, sizeof(*offsets) * num_targets); pipe->set_stream_output_targets(pipe, num_targets, tgs, offsets); } @@ -559,6 +593,19 @@ struct dd_context *dctx = dd_context(_pipe); struct pipe_context *pipe = dctx->pipe; + if (dctx->thread) { + pipe_mutex_lock(dctx->mutex); + dctx->kill_thread = 1; + pipe_mutex_unlock(dctx->mutex); + pipe_thread_wait(dctx->thread); + pipe_mutex_destroy(dctx->mutex); + assert(!dctx->records); + } + + if (dctx->fence) { + pipe->transfer_unmap(pipe, dctx->fence_transfer); + pipe_resource_reference(&dctx->fence, NULL); + } pipe->destroy(pipe); FREE(dctx); } @@ -599,17 +646,28 @@ } static void -dd_context_transfer_inline_write(struct pipe_context *_pipe, - struct pipe_resource *resource, - unsigned level, unsigned usage, - const struct pipe_box *box, - const void *data, unsigned stride, - unsigned layer_stride) +dd_context_buffer_subdata(struct pipe_context *_pipe, + struct pipe_resource *resource, + unsigned usage, unsigned offset, + unsigned size, const void *data) { struct pipe_context *pipe = dd_context(_pipe)->pipe; - pipe->transfer_inline_write(pipe, resource, level, usage, box, data, - stride, layer_stride); + pipe->buffer_subdata(pipe, resource, usage, offset, size, data); +} + +static void +dd_context_texture_subdata(struct pipe_context *_pipe, + struct pipe_resource *resource, + unsigned level, unsigned usage, + const struct pipe_box *box, + const void *data, unsigned stride, + unsigned layer_stride) +{ + struct pipe_context *pipe = dd_context(_pipe)->pipe; + + pipe->texture_subdata(pipe, resource, level, usage, box, data, + stride, layer_stride); } @@ -618,11 +676,11 @@ */ static void -dd_context_texture_barrier(struct pipe_context *_pipe) +dd_context_texture_barrier(struct pipe_context *_pipe, unsigned flags) { struct pipe_context *pipe = dd_context(_pipe)->pipe; - pipe->texture_barrier(pipe); + pipe->texture_barrier(pipe, flags); } static void @@ -662,6 +720,26 @@ } static void +dd_context_set_device_reset_callback(struct pipe_context *_pipe, + const struct pipe_device_reset_callback *cb) +{ + struct pipe_context *pipe = dd_context(_pipe)->pipe; + + return pipe->set_device_reset_callback(pipe, cb); +} + +static void +dd_context_emit_string_marker(struct pipe_context *_pipe, + const char *string, int len) +{ + struct dd_context *dctx = dd_context(_pipe); + struct pipe_context *pipe = dctx->pipe; + + pipe->emit_string_marker(pipe, string, len); + dd_parse_apitrace_marker(string, len, &dctx->draw_state.apitrace_call_number); +} + +static void dd_context_dump_debug_state(struct pipe_context *_pipe, FILE *stream, unsigned flags) { @@ -679,10 +757,8 @@ return NULL; dctx = CALLOC_STRUCT(dd_context); - if (!dctx) { - pipe->destroy(pipe); - return NULL; - } + if (!dctx) + goto fail; dctx->pipe = pipe; dctx->base.priv = pipe->priv; /* expose wrapped priv data */ @@ -692,6 +768,7 @@ CTX_INIT(render_condition); CTX_INIT(create_query); + CTX_INIT(create_batch_query); CTX_INIT(destroy_query); CTX_INIT(begin_query); CTX_INIT(end_query); @@ -756,23 +833,58 @@ CTX_INIT(transfer_map); CTX_INIT(transfer_flush_region); CTX_INIT(transfer_unmap); - CTX_INIT(transfer_inline_write); + CTX_INIT(buffer_subdata); + CTX_INIT(texture_subdata); CTX_INIT(texture_barrier); CTX_INIT(memory_barrier); /* create_video_codec */ /* create_video_buffer */ - /* create_compute_state */ - /* bind_compute_state */ - /* delete_compute_state */ /* set_compute_resources */ /* set_global_binding */ CTX_INIT(get_sample_position); CTX_INIT(invalidate_resource); CTX_INIT(get_device_reset_status); + CTX_INIT(set_device_reset_callback); CTX_INIT(dump_debug_state); + CTX_INIT(emit_string_marker); dd_init_draw_functions(dctx); - dctx->sample_mask = ~0; + dctx->draw_state.sample_mask = ~0; + + if (dscreen->mode == DD_DETECT_HANGS_PIPELINED) { + dctx->fence = pipe_buffer_create(dscreen->screen, PIPE_BIND_CUSTOM, + PIPE_USAGE_STAGING, 4); + if (!dctx->fence) + goto fail; + + dctx->mapped_fence = pipe_buffer_map(pipe, dctx->fence, + PIPE_TRANSFER_READ_WRITE | + PIPE_TRANSFER_PERSISTENT | + PIPE_TRANSFER_COHERENT, + &dctx->fence_transfer); + if (!dctx->mapped_fence) + goto fail; + + *dctx->mapped_fence = 0; + + pipe_mutex_init(dctx->mutex); + dctx->thread = pipe_thread_create(dd_thread_pipelined_hang_detect, dctx); + if (!dctx->thread) { + pipe_mutex_destroy(dctx->mutex); + goto fail; + } + } + return &dctx->base; + +fail: + if (dctx) { + if (dctx->mapped_fence) + pipe_transfer_unmap(pipe, dctx->fence_transfer); + pipe_resource_reference(&dctx->fence, NULL); + FREE(dctx); + } + pipe->destroy(pipe); + return NULL; } diff -Nru mesa-12.0.6/src/gallium/drivers/ddebug/dd_draw.c mesa-17.0.7/src/gallium/drivers/ddebug/dd_draw.c --- mesa-12.0.6/src/gallium/drivers/ddebug/dd_draw.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/ddebug/dd_draw.c 2017-06-01 10:37:10.000000000 +0000 @@ -29,97 +29,72 @@ #include "util/u_dump.h" #include "util/u_format.h" +#include "util/u_framebuffer.h" +#include "util/u_helpers.h" +#include "util/u_inlines.h" +#include "util/u_memory.h" +#include "tgsi/tgsi_parse.h" #include "tgsi/tgsi_scan.h" +#include "os/os_time.h" +#include -enum call_type -{ - CALL_DRAW_VBO, - CALL_LAUNCH_GRID, - CALL_RESOURCE_COPY_REGION, - CALL_BLIT, - CALL_FLUSH_RESOURCE, - CALL_CLEAR, - CALL_CLEAR_BUFFER, - CALL_CLEAR_RENDER_TARGET, - CALL_CLEAR_DEPTH_STENCIL, -}; - -struct call_resource_copy_region -{ - struct pipe_resource *dst; - unsigned dst_level; - unsigned dstx, dsty, dstz; - struct pipe_resource *src; - unsigned src_level; - const struct pipe_box *src_box; -}; - -struct call_clear -{ - unsigned buffers; - const union pipe_color_union *color; - double depth; - unsigned stencil; -}; - -struct call_clear_buffer -{ - struct pipe_resource *res; - unsigned offset; - unsigned size; - const void *clear_value; - int clear_value_size; -}; - -struct dd_call -{ - enum call_type type; - - union { - struct pipe_draw_info draw_vbo; - struct pipe_grid_info launch_grid; - struct call_resource_copy_region resource_copy_region; - struct pipe_blit_info blit; - struct pipe_resource *flush_resource; - struct call_clear clear; - struct call_clear_buffer clear_buffer; - } info; -}; - static FILE * -dd_get_file_stream(struct dd_context *dctx) +dd_get_file_stream(struct dd_screen *dscreen, unsigned apitrace_call_number) { - struct dd_screen *dscreen = dd_screen(dctx->base.screen); - struct pipe_screen *screen = dctx->pipe->screen; + struct pipe_screen *screen = dscreen->screen; + char cmd_line[4096]; + FILE *f = dd_get_debug_file(dscreen->verbose); if (!f) return NULL; + if (os_get_command_line(cmd_line, sizeof(cmd_line))) + fprintf(f, "Command: %s\n", cmd_line); fprintf(f, "Driver vendor: %s\n", screen->get_vendor(screen)); fprintf(f, "Device vendor: %s\n", screen->get_device_vendor(screen)); fprintf(f, "Device name: %s\n\n", screen->get_name(screen)); + + if (apitrace_call_number) + fprintf(f, "Last apitrace call: %u\n\n", + apitrace_call_number); return f; } static void +dd_dump_dmesg(FILE *f) +{ + char line[2000]; + FILE *p = popen("dmesg | tail -n60", "r"); + + if (!p) + return; + + fprintf(f, "\nLast 60 lines of dmesg:\n\n"); + while (fgets(line, sizeof(line), p)) + fputs(line, f); + + pclose(p); +} + +static void dd_close_file_stream(FILE *f) { fclose(f); } static unsigned -dd_num_active_viewports(struct dd_context *dctx) +dd_num_active_viewports(struct dd_draw_state *dstate) { struct tgsi_shader_info info; const struct tgsi_token *tokens; - if (dctx->shaders[PIPE_SHADER_GEOMETRY]) - tokens = dctx->shaders[PIPE_SHADER_GEOMETRY]->state.shader.tokens; - else if (dctx->shaders[PIPE_SHADER_TESS_EVAL]) - tokens = dctx->shaders[PIPE_SHADER_TESS_EVAL]->state.shader.tokens; - else if (dctx->shaders[PIPE_SHADER_VERTEX]) - tokens = dctx->shaders[PIPE_SHADER_VERTEX]->state.shader.tokens; + if (dstate->shaders[PIPE_SHADER_GEOMETRY]) + tokens = dstate->shaders[PIPE_SHADER_GEOMETRY]->state.shader.tokens; + else if (dstate->shaders[PIPE_SHADER_TESS_EVAL]) + tokens = dstate->shaders[PIPE_SHADER_TESS_EVAL]->state.shader.tokens; + else if (dstate->shaders[PIPE_SHADER_VERTEX]) + tokens = dstate->shaders[PIPE_SHADER_VERTEX]->state.shader.tokens; else return 1; @@ -210,19 +185,19 @@ } static void -dd_dump_render_condition(struct dd_context *dctx, FILE *f) +dd_dump_render_condition(struct dd_draw_state *dstate, FILE *f) { - if (dctx->render_cond.query) { + if (dstate->render_cond.query) { fprintf(f, "render condition:\n"); - DUMP_M(query, &dctx->render_cond, query); - DUMP_M(uint, &dctx->render_cond, condition); - DUMP_M(uint, &dctx->render_cond, mode); + DUMP_M(query, &dstate->render_cond, query); + DUMP_M(uint, &dstate->render_cond, condition); + DUMP_M(uint, &dstate->render_cond, mode); fprintf(f, "\n"); } } static void -dd_dump_draw_vbo(struct dd_context *dctx, struct pipe_draw_info *info, FILE *f) +dd_dump_draw_vbo(struct dd_draw_state *dstate, struct pipe_draw_info *info, FILE *f) { int sh, i; const char *shader_str[PIPE_SHADER_TYPES]; @@ -236,9 +211,9 @@ DUMP(draw_info, info); if (info->indexed) { - DUMP(index_buffer, &dctx->index_buffer); - if (dctx->index_buffer.buffer) - DUMP_M(resource, &dctx->index_buffer, buffer); + DUMP(index_buffer, &dstate->index_buffer); + if (dstate->index_buffer.buffer) + DUMP_M(resource, &dstate->index_buffer, buffer); } if (info->count_from_stream_output) DUMP_M(stream_output_target, info, @@ -249,31 +224,31 @@ /* TODO: dump active queries */ - dd_dump_render_condition(dctx, f); + dd_dump_render_condition(dstate, f); for (i = 0; i < PIPE_MAX_ATTRIBS; i++) - if (dctx->vertex_buffers[i].buffer || - dctx->vertex_buffers[i].user_buffer) { - DUMP_I(vertex_buffer, &dctx->vertex_buffers[i], i); - if (dctx->vertex_buffers[i].buffer) - DUMP_M(resource, &dctx->vertex_buffers[i], buffer); + if (dstate->vertex_buffers[i].buffer || + dstate->vertex_buffers[i].user_buffer) { + DUMP_I(vertex_buffer, &dstate->vertex_buffers[i], i); + if (dstate->vertex_buffers[i].buffer) + DUMP_M(resource, &dstate->vertex_buffers[i], buffer); } - if (dctx->velems) { + if (dstate->velems) { print_named_value(f, "num vertex elements", - dctx->velems->state.velems.count); - for (i = 0; i < dctx->velems->state.velems.count; i++) { + dstate->velems->state.velems.count); + for (i = 0; i < dstate->velems->state.velems.count; i++) { fprintf(f, " "); - DUMP_I(vertex_element, &dctx->velems->state.velems.velems[i], i); + DUMP_I(vertex_element, &dstate->velems->state.velems.velems[i], i); } } - print_named_value(f, "num stream output targets", dctx->num_so_targets); - for (i = 0; i < dctx->num_so_targets; i++) - if (dctx->so_targets[i]) { - DUMP_I(stream_output_target, dctx->so_targets[i], i); - DUMP_M(resource, dctx->so_targets[i], buffer); - fprintf(f, " offset = %i\n", dctx->so_offsets[i]); + print_named_value(f, "num stream output targets", dstate->num_so_targets); + for (i = 0; i < dstate->num_so_targets; i++) + if (dstate->so_targets[i]) { + DUMP_I(stream_output_target, dstate->so_targets[i], i); + DUMP_M(resource, dstate->so_targets[i], buffer); + fprintf(f, " offset = %i\n", dstate->so_offsets[i]); } fprintf(f, "\n"); @@ -282,106 +257,117 @@ continue; if (sh == PIPE_SHADER_TESS_CTRL && - !dctx->shaders[PIPE_SHADER_TESS_CTRL] && - dctx->shaders[PIPE_SHADER_TESS_EVAL]) + !dstate->shaders[PIPE_SHADER_TESS_CTRL] && + dstate->shaders[PIPE_SHADER_TESS_EVAL]) fprintf(f, "tess_state: {default_outer_level = {%f, %f, %f, %f}, " "default_inner_level = {%f, %f}}\n", - dctx->tess_default_levels[0], - dctx->tess_default_levels[1], - dctx->tess_default_levels[2], - dctx->tess_default_levels[3], - dctx->tess_default_levels[4], - dctx->tess_default_levels[5]); + dstate->tess_default_levels[0], + dstate->tess_default_levels[1], + dstate->tess_default_levels[2], + dstate->tess_default_levels[3], + dstate->tess_default_levels[4], + dstate->tess_default_levels[5]); if (sh == PIPE_SHADER_FRAGMENT) - if (dctx->rs) { - unsigned num_viewports = dd_num_active_viewports(dctx); + if (dstate->rs) { + unsigned num_viewports = dd_num_active_viewports(dstate); - if (dctx->rs->state.rs.clip_plane_enable) - DUMP(clip_state, &dctx->clip_state); + if (dstate->rs->state.rs.clip_plane_enable) + DUMP(clip_state, &dstate->clip_state); for (i = 0; i < num_viewports; i++) - DUMP_I(viewport_state, &dctx->viewports[i], i); + DUMP_I(viewport_state, &dstate->viewports[i], i); - if (dctx->rs->state.rs.scissor) + if (dstate->rs->state.rs.scissor) for (i = 0; i < num_viewports; i++) - DUMP_I(scissor_state, &dctx->scissors[i], i); + DUMP_I(scissor_state, &dstate->scissors[i], i); - DUMP(rasterizer_state, &dctx->rs->state.rs); + DUMP(rasterizer_state, &dstate->rs->state.rs); - if (dctx->rs->state.rs.poly_stipple_enable) - DUMP(poly_stipple, &dctx->polygon_stipple); + if (dstate->rs->state.rs.poly_stipple_enable) + DUMP(poly_stipple, &dstate->polygon_stipple); fprintf(f, "\n"); } - if (!dctx->shaders[sh]) + if (!dstate->shaders[sh]) continue; fprintf(f, COLOR_SHADER "begin shader: %s" COLOR_RESET "\n", shader_str[sh]); - DUMP(shader_state, &dctx->shaders[sh]->state.shader); + DUMP(shader_state, &dstate->shaders[sh]->state.shader); for (i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) - if (dctx->constant_buffers[sh][i].buffer || - dctx->constant_buffers[sh][i].user_buffer) { - DUMP_I(constant_buffer, &dctx->constant_buffers[sh][i], i); - if (dctx->constant_buffers[sh][i].buffer) - DUMP_M(resource, &dctx->constant_buffers[sh][i], buffer); + if (dstate->constant_buffers[sh][i].buffer || + dstate->constant_buffers[sh][i].user_buffer) { + DUMP_I(constant_buffer, &dstate->constant_buffers[sh][i], i); + if (dstate->constant_buffers[sh][i].buffer) + DUMP_M(resource, &dstate->constant_buffers[sh][i], buffer); } for (i = 0; i < PIPE_MAX_SAMPLERS; i++) - if (dctx->sampler_states[sh][i]) - DUMP_I(sampler_state, &dctx->sampler_states[sh][i]->state.sampler, i); + if (dstate->sampler_states[sh][i]) + DUMP_I(sampler_state, &dstate->sampler_states[sh][i]->state.sampler, i); for (i = 0; i < PIPE_MAX_SAMPLERS; i++) - if (dctx->sampler_views[sh][i]) { - DUMP_I(sampler_view, dctx->sampler_views[sh][i], i); - DUMP_M(resource, dctx->sampler_views[sh][i], texture); + if (dstate->sampler_views[sh][i]) { + DUMP_I(sampler_view, dstate->sampler_views[sh][i], i); + DUMP_M(resource, dstate->sampler_views[sh][i], texture); } - /* TODO: print shader images */ - /* TODO: print shader buffers */ + for (i = 0; i < PIPE_MAX_SHADER_IMAGES; i++) + if (dstate->shader_images[sh][i].resource) { + DUMP_I(image_view, &dstate->shader_images[sh][i], i); + if (dstate->shader_images[sh][i].resource) + DUMP_M(resource, &dstate->shader_images[sh][i], resource); + } + + for (i = 0; i < PIPE_MAX_SHADER_BUFFERS; i++) + if (dstate->shader_buffers[sh][i].buffer) { + DUMP_I(shader_buffer, &dstate->shader_buffers[sh][i], i); + if (dstate->shader_buffers[sh][i].buffer) + DUMP_M(resource, &dstate->shader_buffers[sh][i], buffer); + } fprintf(f, COLOR_SHADER "end shader: %s" COLOR_RESET "\n\n", shader_str[sh]); } - if (dctx->dsa) - DUMP(depth_stencil_alpha_state, &dctx->dsa->state.dsa); - DUMP(stencil_ref, &dctx->stencil_ref); - - if (dctx->blend) - DUMP(blend_state, &dctx->blend->state.blend); - DUMP(blend_color, &dctx->blend_color); + if (dstate->dsa) + DUMP(depth_stencil_alpha_state, &dstate->dsa->state.dsa); + DUMP(stencil_ref, &dstate->stencil_ref); + + if (dstate->blend) + DUMP(blend_state, &dstate->blend->state.blend); + DUMP(blend_color, &dstate->blend_color); - print_named_value(f, "min_samples", dctx->min_samples); - print_named_xvalue(f, "sample_mask", dctx->sample_mask); + print_named_value(f, "min_samples", dstate->min_samples); + print_named_xvalue(f, "sample_mask", dstate->sample_mask); fprintf(f, "\n"); - DUMP(framebuffer_state, &dctx->framebuffer_state); - for (i = 0; i < dctx->framebuffer_state.nr_cbufs; i++) - if (dctx->framebuffer_state.cbufs[i]) { + DUMP(framebuffer_state, &dstate->framebuffer_state); + for (i = 0; i < dstate->framebuffer_state.nr_cbufs; i++) + if (dstate->framebuffer_state.cbufs[i]) { fprintf(f, " " COLOR_STATE "cbufs[%i]:" COLOR_RESET "\n ", i); - DUMP(surface, dctx->framebuffer_state.cbufs[i]); + DUMP(surface, dstate->framebuffer_state.cbufs[i]); fprintf(f, " "); - DUMP(resource, dctx->framebuffer_state.cbufs[i]->texture); + DUMP(resource, dstate->framebuffer_state.cbufs[i]->texture); } - if (dctx->framebuffer_state.zsbuf) { + if (dstate->framebuffer_state.zsbuf) { fprintf(f, " " COLOR_STATE "zsbuf:" COLOR_RESET "\n "); - DUMP(surface, dctx->framebuffer_state.zsbuf); + DUMP(surface, dstate->framebuffer_state.zsbuf); fprintf(f, " "); - DUMP(resource, dctx->framebuffer_state.zsbuf->texture); + DUMP(resource, dstate->framebuffer_state.zsbuf->texture); } fprintf(f, "\n"); } static void -dd_dump_launch_grid(struct dd_context *dctx, struct pipe_grid_info *info, FILE *f) +dd_dump_launch_grid(struct dd_draw_state *dstate, struct pipe_grid_info *info, FILE *f) { fprintf(f, "%s:\n", __func__+8); /* TODO */ } static void -dd_dump_resource_copy_region(struct dd_context *dctx, +dd_dump_resource_copy_region(struct dd_draw_state *dstate, struct call_resource_copy_region *info, FILE *f) { @@ -393,11 +379,11 @@ DUMP_M(uint, info, dstz); DUMP_M(resource, info, src); DUMP_M(uint, info, src_level); - DUMP_M(box, info, src_box); + DUMP_M_ADDR(box, info, src_box); } static void -dd_dump_blit(struct dd_context *dctx, struct pipe_blit_info *info, FILE *f) +dd_dump_blit(struct dd_draw_state *dstate, struct pipe_blit_info *info, FILE *f) { fprintf(f, "%s:\n", __func__+8); DUMP_M(resource, info, dst.resource); @@ -417,11 +403,18 @@ DUMP_M(uint, info, render_condition_enable); if (info->render_condition_enable) - dd_dump_render_condition(dctx, f); + dd_dump_render_condition(dstate, f); +} + +static void +dd_dump_generate_mipmap(struct dd_draw_state *dstate, FILE *f) +{ + fprintf(f, "%s:\n", __func__+8); + /* TODO */ } static void -dd_dump_flush_resource(struct dd_context *dctx, struct pipe_resource *res, +dd_dump_flush_resource(struct dd_draw_state *dstate, struct pipe_resource *res, FILE *f) { fprintf(f, "%s:\n", __func__+8); @@ -429,17 +422,17 @@ } static void -dd_dump_clear(struct dd_context *dctx, struct call_clear *info, FILE *f) +dd_dump_clear(struct dd_draw_state *dstate, struct call_clear *info, FILE *f) { fprintf(f, "%s:\n", __func__+8); DUMP_M(uint, info, buffers); - DUMP_M(color_union, info, color); + DUMP_M_ADDR(color_union, info, color); DUMP_M(double, info, depth); DUMP_M(hex, info, stencil); } static void -dd_dump_clear_buffer(struct dd_context *dctx, struct call_clear_buffer *info, +dd_dump_clear_buffer(struct dd_draw_state *dstate, struct call_clear_buffer *info, FILE *f) { int i; @@ -458,14 +451,14 @@ } static void -dd_dump_clear_render_target(struct dd_context *dctx, FILE *f) +dd_dump_clear_render_target(struct dd_draw_state *dstate, FILE *f) { fprintf(f, "%s:\n", __func__+8); /* TODO */ } static void -dd_dump_clear_depth_stencil(struct dd_context *dctx, FILE *f) +dd_dump_clear_depth_stencil(struct dd_draw_state *dstate, FILE *f) { fprintf(f, "%s:\n", __func__+8); /* TODO */ @@ -483,43 +476,57 @@ } static void -dd_dump_call(struct dd_context *dctx, struct dd_call *call, unsigned flags) +dd_dump_call(FILE *f, struct dd_draw_state *state, struct dd_call *call) { - FILE *f = dd_get_file_stream(dctx); - - if (!f) - return; - switch (call->type) { case CALL_DRAW_VBO: - dd_dump_draw_vbo(dctx, &call->info.draw_vbo, f); + dd_dump_draw_vbo(state, &call->info.draw_vbo, f); break; case CALL_LAUNCH_GRID: - dd_dump_launch_grid(dctx, &call->info.launch_grid, f); + dd_dump_launch_grid(state, &call->info.launch_grid, f); break; case CALL_RESOURCE_COPY_REGION: - dd_dump_resource_copy_region(dctx, &call->info.resource_copy_region, f); + dd_dump_resource_copy_region(state, + &call->info.resource_copy_region, f); break; case CALL_BLIT: - dd_dump_blit(dctx, &call->info.blit, f); + dd_dump_blit(state, &call->info.blit, f); break; case CALL_FLUSH_RESOURCE: - dd_dump_flush_resource(dctx, call->info.flush_resource, f); + dd_dump_flush_resource(state, call->info.flush_resource, f); break; case CALL_CLEAR: - dd_dump_clear(dctx, &call->info.clear, f); + dd_dump_clear(state, &call->info.clear, f); break; case CALL_CLEAR_BUFFER: - dd_dump_clear_buffer(dctx, &call->info.clear_buffer, f); + dd_dump_clear_buffer(state, &call->info.clear_buffer, f); break; case CALL_CLEAR_RENDER_TARGET: - dd_dump_clear_render_target(dctx, f); + dd_dump_clear_render_target(state, f); break; case CALL_CLEAR_DEPTH_STENCIL: - dd_dump_clear_depth_stencil(dctx, f); + dd_dump_clear_depth_stencil(state, f); + break; + case CALL_GENERATE_MIPMAP: + dd_dump_generate_mipmap(state, f); + break; } +} + +static void +dd_write_report(struct dd_context *dctx, struct dd_call *call, unsigned flags, + bool dump_dmesg) +{ + FILE *f = dd_get_file_stream(dd_screen(dctx->base.screen), + dctx->draw_state.apitrace_call_number); + + if (!f) + return; + dd_dump_call(f, &dctx->draw_state, call); dd_dump_driver_state(dctx, f, flags); + if (dump_dmesg) + dd_dump_dmesg(f); dd_close_file_stream(f); } @@ -530,7 +537,7 @@ fprintf(stderr, "dd: Aborting the process...\n"); fflush(stdout); fflush(stderr); - abort(); + exit(1); } static bool @@ -552,7 +559,7 @@ if (!fence) return false; - idle = screen->fence_finish(screen, fence, timeout_ms * 1000000); + idle = screen->fence_finish(screen, pipe, fence, timeout_ms * 1000000); screen->fence_reference(screen, &fence, NULL); if (!idle) fprintf(stderr, "dd: GPU hang detected!\n"); @@ -565,11 +572,17 @@ const char *cause) { if (dd_flush_and_check_hang(dctx, fence, flags)) { - FILE *f = dd_get_file_stream(dctx); + FILE *f = dd_get_file_stream(dd_screen(dctx->base.screen), + dctx->draw_state.apitrace_call_number); if (f) { fprintf(f, "dd: %s.\n", cause); - dd_dump_driver_state(dctx, f, PIPE_DEBUG_DEVICE_IS_HUNG); + dd_dump_driver_state(dctx, f, + PIPE_DUMP_DEVICE_STATUS_REGISTERS | + PIPE_DUMP_CURRENT_STATES | + PIPE_DUMP_CURRENT_SHADERS | + PIPE_DUMP_LAST_COMMAND_BUFFER); + dd_dump_dmesg(f); dd_close_file_stream(f); } @@ -579,6 +592,462 @@ } static void +dd_unreference_copy_of_call(struct dd_call *dst) +{ + switch (dst->type) { + case CALL_DRAW_VBO: + pipe_so_target_reference(&dst->info.draw_vbo.count_from_stream_output, NULL); + pipe_resource_reference(&dst->info.draw_vbo.indirect, NULL); + pipe_resource_reference(&dst->info.draw_vbo.indirect_params, NULL); + break; + case CALL_LAUNCH_GRID: + pipe_resource_reference(&dst->info.launch_grid.indirect, NULL); + break; + case CALL_RESOURCE_COPY_REGION: + pipe_resource_reference(&dst->info.resource_copy_region.dst, NULL); + pipe_resource_reference(&dst->info.resource_copy_region.src, NULL); + break; + case CALL_BLIT: + pipe_resource_reference(&dst->info.blit.dst.resource, NULL); + pipe_resource_reference(&dst->info.blit.src.resource, NULL); + break; + case CALL_FLUSH_RESOURCE: + pipe_resource_reference(&dst->info.flush_resource, NULL); + break; + case CALL_CLEAR: + break; + case CALL_CLEAR_BUFFER: + pipe_resource_reference(&dst->info.clear_buffer.res, NULL); + break; + case CALL_CLEAR_RENDER_TARGET: + break; + case CALL_CLEAR_DEPTH_STENCIL: + break; + case CALL_GENERATE_MIPMAP: + pipe_resource_reference(&dst->info.generate_mipmap.res, NULL); + break; + } +} + +static void +dd_copy_call(struct dd_call *dst, struct dd_call *src) +{ + dst->type = src->type; + + switch (src->type) { + case CALL_DRAW_VBO: + pipe_so_target_reference(&dst->info.draw_vbo.count_from_stream_output, + src->info.draw_vbo.count_from_stream_output); + pipe_resource_reference(&dst->info.draw_vbo.indirect, + src->info.draw_vbo.indirect); + pipe_resource_reference(&dst->info.draw_vbo.indirect_params, + src->info.draw_vbo.indirect_params); + dst->info.draw_vbo = src->info.draw_vbo; + break; + case CALL_LAUNCH_GRID: + pipe_resource_reference(&dst->info.launch_grid.indirect, + src->info.launch_grid.indirect); + dst->info.launch_grid = src->info.launch_grid; + break; + case CALL_RESOURCE_COPY_REGION: + pipe_resource_reference(&dst->info.resource_copy_region.dst, + src->info.resource_copy_region.dst); + pipe_resource_reference(&dst->info.resource_copy_region.src, + src->info.resource_copy_region.src); + dst->info.resource_copy_region = src->info.resource_copy_region; + break; + case CALL_BLIT: + pipe_resource_reference(&dst->info.blit.dst.resource, + src->info.blit.dst.resource); + pipe_resource_reference(&dst->info.blit.src.resource, + src->info.blit.src.resource); + dst->info.blit = src->info.blit; + break; + case CALL_FLUSH_RESOURCE: + pipe_resource_reference(&dst->info.flush_resource, + src->info.flush_resource); + break; + case CALL_CLEAR: + dst->info.clear = src->info.clear; + break; + case CALL_CLEAR_BUFFER: + pipe_resource_reference(&dst->info.clear_buffer.res, + src->info.clear_buffer.res); + dst->info.clear_buffer = src->info.clear_buffer; + break; + case CALL_CLEAR_RENDER_TARGET: + break; + case CALL_CLEAR_DEPTH_STENCIL: + break; + case CALL_GENERATE_MIPMAP: + pipe_resource_reference(&dst->info.generate_mipmap.res, + src->info.generate_mipmap.res); + dst->info.generate_mipmap = src->info.generate_mipmap; + break; + } +} + +static void +dd_init_copy_of_draw_state(struct dd_draw_state_copy *state) +{ + unsigned i,j; + + /* Just clear pointers to gallium objects. Don't clear the whole structure, + * because it would kill performance with its size of 130 KB. + */ + memset(&state->base.index_buffer, 0, + sizeof(state->base.index_buffer)); + memset(state->base.vertex_buffers, 0, + sizeof(state->base.vertex_buffers)); + memset(state->base.so_targets, 0, + sizeof(state->base.so_targets)); + memset(state->base.constant_buffers, 0, + sizeof(state->base.constant_buffers)); + memset(state->base.sampler_views, 0, + sizeof(state->base.sampler_views)); + memset(state->base.shader_images, 0, + sizeof(state->base.shader_images)); + memset(state->base.shader_buffers, 0, + sizeof(state->base.shader_buffers)); + memset(&state->base.framebuffer_state, 0, + sizeof(state->base.framebuffer_state)); + + memset(state->shaders, 0, sizeof(state->shaders)); + + state->base.render_cond.query = &state->render_cond; + + for (i = 0; i < PIPE_SHADER_TYPES; i++) { + state->base.shaders[i] = &state->shaders[i]; + for (j = 0; j < PIPE_MAX_SAMPLERS; j++) + state->base.sampler_states[i][j] = &state->sampler_states[i][j]; + } + + state->base.velems = &state->velems; + state->base.rs = &state->rs; + state->base.dsa = &state->dsa; + state->base.blend = &state->blend; +} + +static void +dd_unreference_copy_of_draw_state(struct dd_draw_state_copy *state) +{ + struct dd_draw_state *dst = &state->base; + unsigned i,j; + + util_set_index_buffer(&dst->index_buffer, NULL); + + for (i = 0; i < ARRAY_SIZE(dst->vertex_buffers); i++) + pipe_resource_reference(&dst->vertex_buffers[i].buffer, NULL); + for (i = 0; i < ARRAY_SIZE(dst->so_targets); i++) + pipe_so_target_reference(&dst->so_targets[i], NULL); + + for (i = 0; i < PIPE_SHADER_TYPES; i++) { + if (dst->shaders[i]) + tgsi_free_tokens(dst->shaders[i]->state.shader.tokens); + + for (j = 0; j < PIPE_MAX_CONSTANT_BUFFERS; j++) + pipe_resource_reference(&dst->constant_buffers[i][j].buffer, NULL); + for (j = 0; j < PIPE_MAX_SAMPLERS; j++) + pipe_sampler_view_reference(&dst->sampler_views[i][j], NULL); + for (j = 0; j < PIPE_MAX_SHADER_IMAGES; j++) + pipe_resource_reference(&dst->shader_images[i][j].resource, NULL); + for (j = 0; j < PIPE_MAX_SHADER_BUFFERS; j++) + pipe_resource_reference(&dst->shader_buffers[i][j].buffer, NULL); + } + + util_unreference_framebuffer_state(&dst->framebuffer_state); +} + +static void +dd_copy_draw_state(struct dd_draw_state *dst, struct dd_draw_state *src) +{ + unsigned i,j; + + if (src->render_cond.query) { + *dst->render_cond.query = *src->render_cond.query; + dst->render_cond.condition = src->render_cond.condition; + dst->render_cond.mode = src->render_cond.mode; + } else { + dst->render_cond.query = NULL; + } + + util_set_index_buffer(&dst->index_buffer, &src->index_buffer); + + for (i = 0; i < ARRAY_SIZE(src->vertex_buffers); i++) { + pipe_resource_reference(&dst->vertex_buffers[i].buffer, + src->vertex_buffers[i].buffer); + memcpy(&dst->vertex_buffers[i], &src->vertex_buffers[i], + sizeof(src->vertex_buffers[i])); + } + + dst->num_so_targets = src->num_so_targets; + for (i = 0; i < ARRAY_SIZE(src->so_targets); i++) + pipe_so_target_reference(&dst->so_targets[i], src->so_targets[i]); + memcpy(dst->so_offsets, src->so_offsets, sizeof(src->so_offsets)); + + for (i = 0; i < PIPE_SHADER_TYPES; i++) { + if (!src->shaders[i]) { + dst->shaders[i] = NULL; + continue; + } + + if (src->shaders[i]) { + dst->shaders[i]->state.shader = src->shaders[i]->state.shader; + dst->shaders[i]->state.shader.tokens = + tgsi_dup_tokens(src->shaders[i]->state.shader.tokens); + } else { + dst->shaders[i] = NULL; + } + + for (j = 0; j < PIPE_MAX_CONSTANT_BUFFERS; j++) { + pipe_resource_reference(&dst->constant_buffers[i][j].buffer, + src->constant_buffers[i][j].buffer); + memcpy(&dst->constant_buffers[i][j], &src->constant_buffers[i][j], + sizeof(src->constant_buffers[i][j])); + } + + for (j = 0; j < PIPE_MAX_SAMPLERS; j++) { + pipe_sampler_view_reference(&dst->sampler_views[i][j], + src->sampler_views[i][j]); + if (src->sampler_states[i][j]) + dst->sampler_states[i][j]->state.sampler = + src->sampler_states[i][j]->state.sampler; + else + dst->sampler_states[i][j] = NULL; + } + + for (j = 0; j < PIPE_MAX_SHADER_IMAGES; j++) { + pipe_resource_reference(&dst->shader_images[i][j].resource, + src->shader_images[i][j].resource); + memcpy(&dst->shader_images[i][j], &src->shader_images[i][j], + sizeof(src->shader_images[i][j])); + } + + for (j = 0; j < PIPE_MAX_SHADER_BUFFERS; j++) { + pipe_resource_reference(&dst->shader_buffers[i][j].buffer, + src->shader_buffers[i][j].buffer); + memcpy(&dst->shader_buffers[i][j], &src->shader_buffers[i][j], + sizeof(src->shader_buffers[i][j])); + } + } + + if (src->velems) + dst->velems->state.velems = src->velems->state.velems; + else + dst->velems = NULL; + + if (src->rs) + dst->rs->state.rs = src->rs->state.rs; + else + dst->rs = NULL; + + if (src->dsa) + dst->dsa->state.dsa = src->dsa->state.dsa; + else + dst->dsa = NULL; + + if (src->blend) + dst->blend->state.blend = src->blend->state.blend; + else + dst->blend = NULL; + + dst->blend_color = src->blend_color; + dst->stencil_ref = src->stencil_ref; + dst->sample_mask = src->sample_mask; + dst->min_samples = src->min_samples; + dst->clip_state = src->clip_state; + util_copy_framebuffer_state(&dst->framebuffer_state, &src->framebuffer_state); + memcpy(dst->scissors, src->scissors, sizeof(src->scissors)); + memcpy(dst->viewports, src->viewports, sizeof(src->viewports)); + memcpy(dst->tess_default_levels, src->tess_default_levels, + sizeof(src->tess_default_levels)); + dst->apitrace_call_number = src->apitrace_call_number; +} + +static void +dd_free_record(struct dd_draw_record **record) +{ + struct dd_draw_record *next = (*record)->next; + + dd_unreference_copy_of_call(&(*record)->call); + dd_unreference_copy_of_draw_state(&(*record)->draw_state); + FREE((*record)->driver_state_log); + FREE(*record); + *record = next; +} + +static void +dd_dump_record(struct dd_context *dctx, struct dd_draw_record *record, + uint32_t hw_sequence_no, int64_t now) +{ + FILE *f = dd_get_file_stream(dd_screen(dctx->base.screen), + record->draw_state.base.apitrace_call_number); + if (!f) + return; + + fprintf(f, "Draw call sequence # = %u\n", record->sequence_no); + fprintf(f, "HW reached sequence # = %u\n", hw_sequence_no); + fprintf(f, "Elapsed time = %"PRIi64" ms\n\n", + (now - record->timestamp) / 1000); + + dd_dump_call(f, &record->draw_state.base, &record->call); + fprintf(f, "%s\n", record->driver_state_log); + + dctx->pipe->dump_debug_state(dctx->pipe, f, + PIPE_DUMP_DEVICE_STATUS_REGISTERS); + dd_dump_dmesg(f); + fclose(f); +} + +PIPE_THREAD_ROUTINE(dd_thread_pipelined_hang_detect, input) +{ + struct dd_context *dctx = (struct dd_context *)input; + struct dd_screen *dscreen = dd_screen(dctx->base.screen); + + pipe_mutex_lock(dctx->mutex); + + while (!dctx->kill_thread) { + struct dd_draw_record **record = &dctx->records; + + /* Loop over all records. */ + while (*record) { + int64_t now; + + /* If the fence has been signalled, release the record and all older + * records. + */ + if (*dctx->mapped_fence >= (*record)->sequence_no) { + while (*record) + dd_free_record(record); + break; + } + + /* The fence hasn't been signalled. Check the timeout. */ + now = os_time_get(); + if (os_time_timeout((*record)->timestamp, + (*record)->timestamp + dscreen->timeout_ms * 1000, + now)) { + fprintf(stderr, "GPU hang detected.\n"); + + /* Get the oldest unsignalled draw call. */ + while ((*record)->next && + *dctx->mapped_fence < (*record)->next->sequence_no) + record = &(*record)->next; + + dd_dump_record(dctx, *record, *dctx->mapped_fence, now); + dd_kill_process(); + } + + record = &(*record)->next; + } + + /* Unlock and sleep before starting all over again. */ + pipe_mutex_unlock(dctx->mutex); + os_time_sleep(10000); /* 10 ms */ + pipe_mutex_lock(dctx->mutex); + } + + /* Thread termination. */ + while (dctx->records) + dd_free_record(&dctx->records); + + pipe_mutex_unlock(dctx->mutex); + return 0; +} + +static char * +dd_get_driver_shader_log(struct dd_context *dctx) +{ +#if defined(PIPE_OS_LINUX) + FILE *f; + char *buf; + int written_bytes; + + if (!dctx->max_log_buffer_size) + dctx->max_log_buffer_size = 16 * 1024; + + /* Keep increasing the buffer size until there is enough space. + * + * open_memstream can resize automatically, but it's VERY SLOW. + * fmemopen is much faster. + */ + while (1) { + buf = malloc(dctx->max_log_buffer_size); + buf[0] = 0; + + f = fmemopen(buf, dctx->max_log_buffer_size, "a"); + if (!f) { + free(buf); + return NULL; + } + + dd_dump_driver_state(dctx, f, PIPE_DUMP_CURRENT_SHADERS); + written_bytes = ftell(f); + fclose(f); + + /* Return if the backing buffer is large enough. */ + if (written_bytes < dctx->max_log_buffer_size - 1) + break; + + /* Try again. */ + free(buf); + dctx->max_log_buffer_size *= 2; + } + + return buf; +#else + /* Return an empty string. */ + return (char*)calloc(1, 4); +#endif +} + +static void +dd_pipelined_process_draw(struct dd_context *dctx, struct dd_call *call) +{ + struct pipe_context *pipe = dctx->pipe; + struct dd_draw_record *record; + char *log; + + /* Make a record of the draw call. */ + record = MALLOC_STRUCT(dd_draw_record); + if (!record) + return; + + /* Create the log. */ + log = dd_get_driver_shader_log(dctx); + if (!log) { + FREE(record); + return; + } + + /* Update the fence with the GPU. + * + * radeonsi/clear_buffer waits in the command processor until shaders are + * idle before writing to memory. That's a necessary condition for isolating + * draw calls. + */ + dctx->sequence_no++; + pipe->clear_buffer(pipe, dctx->fence, 0, 4, &dctx->sequence_no, 4); + + /* Initialize the record. */ + record->timestamp = os_time_get(); + record->sequence_no = dctx->sequence_no; + record->driver_state_log = log; + + memset(&record->call, 0, sizeof(record->call)); + dd_copy_call(&record->call, call); + + dd_init_copy_of_draw_state(&record->draw_state); + dd_copy_draw_state(&record->draw_state.base, &dctx->draw_state); + + /* Add the record to the list. */ + pipe_mutex_lock(dctx->mutex); + record->next = dctx->records; + dctx->records = record; + pipe_mutex_unlock(dctx->mutex); +} + +static void dd_context_flush(struct pipe_context *_pipe, struct pipe_fence_handle **fence, unsigned flags) { @@ -590,7 +1059,9 @@ dd_flush_and_handle_hang(dctx, fence, flags, "GPU hang detected in pipe->flush()"); break; + case DD_DETECT_HANGS_PIPELINED: /* nothing to do here */ case DD_DUMP_ALL_CALLS: + case DD_DUMP_APITRACE_CALL: pipe->flush(pipe, fence, flags); break; default: @@ -622,16 +1093,39 @@ case DD_DETECT_HANGS: if (!dscreen->no_flush && dd_flush_and_check_hang(dctx, NULL, 0)) { - dd_dump_call(dctx, call, PIPE_DEBUG_DEVICE_IS_HUNG); + dd_write_report(dctx, call, + PIPE_DUMP_DEVICE_STATUS_REGISTERS | + PIPE_DUMP_CURRENT_STATES | + PIPE_DUMP_CURRENT_SHADERS | + PIPE_DUMP_LAST_COMMAND_BUFFER, + true); /* Terminate the process to prevent future hangs. */ dd_kill_process(); } break; + case DD_DETECT_HANGS_PIPELINED: + dd_pipelined_process_draw(dctx, call); + break; case DD_DUMP_ALL_CALLS: if (!dscreen->no_flush) pipe->flush(pipe, NULL, 0); - dd_dump_call(dctx, call, 0); + dd_write_report(dctx, call, + PIPE_DUMP_CURRENT_STATES | + PIPE_DUMP_CURRENT_SHADERS | + PIPE_DUMP_LAST_COMMAND_BUFFER, + false); + break; + case DD_DUMP_APITRACE_CALL: + if (dscreen->apitrace_dump_call == + dctx->draw_state.apitrace_call_number) { + dd_write_report(dctx, call, + PIPE_DUMP_CURRENT_STATES | + PIPE_DUMP_CURRENT_SHADERS, + false); + /* No need to continue. */ + exit(0); + } break; default: assert(0); @@ -695,7 +1189,7 @@ call.info.resource_copy_region.dstz = dstz; call.info.resource_copy_region.src = src; call.info.resource_copy_region.src_level = src_level; - call.info.resource_copy_region.src_box = src_box; + call.info.resource_copy_region.src_box = *src_box; dd_before_draw(dctx); pipe->resource_copy_region(pipe, @@ -719,6 +1213,35 @@ dd_after_draw(dctx, &call); } +static boolean +dd_context_generate_mipmap(struct pipe_context *_pipe, + struct pipe_resource *res, + enum pipe_format format, + unsigned base_level, + unsigned last_level, + unsigned first_layer, + unsigned last_layer) +{ + struct dd_context *dctx = dd_context(_pipe); + struct pipe_context *pipe = dctx->pipe; + struct dd_call call; + boolean result; + + call.type = CALL_GENERATE_MIPMAP; + call.info.generate_mipmap.res = res; + call.info.generate_mipmap.format = format; + call.info.generate_mipmap.base_level = base_level; + call.info.generate_mipmap.last_level = last_level; + call.info.generate_mipmap.first_layer = first_layer; + call.info.generate_mipmap.last_layer = last_layer; + + dd_before_draw(dctx); + result = pipe->generate_mipmap(pipe, res, format, base_level, last_level, + first_layer, last_layer); + dd_after_draw(dctx, &call); + return result; +} + static void dd_context_flush_resource(struct pipe_context *_pipe, struct pipe_resource *resource) @@ -746,7 +1269,7 @@ call.type = CALL_CLEAR; call.info.clear.buffers = buffers; - call.info.clear.color = color; + call.info.clear.color = *color; call.info.clear.depth = depth; call.info.clear.stencil = stencil; @@ -760,7 +1283,8 @@ struct pipe_surface *dst, const union pipe_color_union *color, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct dd_context *dctx = dd_context(_pipe); struct pipe_context *pipe = dctx->pipe; @@ -769,7 +1293,8 @@ call.type = CALL_CLEAR_RENDER_TARGET; dd_before_draw(dctx); - pipe->clear_render_target(pipe, dst, color, dstx, dsty, width, height); + pipe->clear_render_target(pipe, dst, color, dstx, dsty, width, height, + render_condition_enabled); dd_after_draw(dctx, &call); } @@ -777,7 +1302,8 @@ dd_context_clear_depth_stencil(struct pipe_context *_pipe, struct pipe_surface *dst, unsigned clear_flags, double depth, unsigned stencil, unsigned dstx, - unsigned dsty, unsigned width, unsigned height) + unsigned dsty, unsigned width, unsigned height, + bool render_condition_enabled) { struct dd_context *dctx = dd_context(_pipe); struct pipe_context *pipe = dctx->pipe; @@ -787,7 +1313,8 @@ dd_before_draw(dctx); pipe->clear_depth_stencil(pipe, dst, clear_flags, depth, stencil, - dstx, dsty, width, height); + dstx, dsty, width, height, + render_condition_enabled); dd_after_draw(dctx, &call); } @@ -825,5 +1352,5 @@ CTX_INIT(clear_depth_stencil); CTX_INIT(clear_buffer); CTX_INIT(flush_resource); - /* launch_grid */ + CTX_INIT(generate_mipmap); } diff -Nru mesa-12.0.6/src/gallium/drivers/ddebug/dd_pipe.h mesa-17.0.7/src/gallium/drivers/ddebug/dd_pipe.h --- mesa-12.0.6/src/gallium/drivers/ddebug/dd_pipe.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/ddebug/dd_pipe.h 2017-06-01 10:37:10.000000000 +0000 @@ -32,10 +32,13 @@ #include "pipe/p_state.h" #include "pipe/p_screen.h" #include "dd_util.h" +#include "os/os_thread.h" enum dd_mode { DD_DETECT_HANGS, - DD_DUMP_ALL_CALLS + DD_DETECT_HANGS_PIPELINED, + DD_DUMP_ALL_CALLS, + DD_DUMP_APITRACE_CALL, }; struct dd_screen @@ -47,6 +50,73 @@ bool no_flush; bool verbose; unsigned skip_count; + unsigned apitrace_dump_call; +}; + +enum call_type +{ + CALL_DRAW_VBO, + CALL_LAUNCH_GRID, + CALL_RESOURCE_COPY_REGION, + CALL_BLIT, + CALL_FLUSH_RESOURCE, + CALL_CLEAR, + CALL_CLEAR_BUFFER, + CALL_CLEAR_RENDER_TARGET, + CALL_CLEAR_DEPTH_STENCIL, + CALL_GENERATE_MIPMAP, +}; + +struct call_resource_copy_region +{ + struct pipe_resource *dst; + unsigned dst_level; + unsigned dstx, dsty, dstz; + struct pipe_resource *src; + unsigned src_level; + struct pipe_box src_box; +}; + +struct call_clear +{ + unsigned buffers; + union pipe_color_union color; + double depth; + unsigned stencil; +}; + +struct call_clear_buffer +{ + struct pipe_resource *res; + unsigned offset; + unsigned size; + const void *clear_value; + int clear_value_size; +}; + +struct call_generate_mipmap { + struct pipe_resource *res; + enum pipe_format format; + unsigned base_level; + unsigned last_level; + unsigned first_layer; + unsigned last_layer; +}; + +struct dd_call +{ + enum call_type type; + + union { + struct pipe_draw_info draw_vbo; + struct pipe_grid_info launch_grid; + struct call_resource_copy_region resource_copy_region; + struct pipe_blit_info blit; + struct pipe_resource *flush_resource; + struct call_clear clear; + struct call_clear_buffer clear_buffer; + struct call_generate_mipmap generate_mipmap; + } info; }; struct dd_query @@ -72,11 +142,8 @@ } state; }; -struct dd_context +struct dd_draw_state { - struct pipe_context base; - struct pipe_context *pipe; - struct { struct dd_query *query; bool condition; @@ -113,7 +180,69 @@ struct pipe_viewport_state viewports[PIPE_MAX_VIEWPORTS]; float tess_default_levels[6]; + unsigned apitrace_call_number; +}; + +struct dd_draw_state_copy +{ + struct dd_draw_state base; + + /* dd_draw_state_copy does not reference real CSOs. Instead, it points to + * these variables, which serve as storage. + */ + struct dd_query render_cond; + struct dd_state shaders[PIPE_SHADER_TYPES]; + struct dd_state sampler_states[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; + struct dd_state velems; + struct dd_state rs; + struct dd_state dsa; + struct dd_state blend; +}; + +struct dd_draw_record { + struct dd_draw_record *next; + + int64_t timestamp; + uint32_t sequence_no; + + struct dd_call call; + struct dd_draw_state_copy draw_state; + char *driver_state_log; +}; + +struct dd_context +{ + struct pipe_context base; + struct pipe_context *pipe; + + struct dd_draw_state draw_state; unsigned num_draw_calls; + + /* Pipelined hang detection. + * + * This is without unnecessary flushes and waits. There is a memory-based + * fence that is incremented by clear_buffer every draw call. Driver fences + * are not used. + * + * After each draw call, a new dd_draw_record is created that contains + * a copy of all states, the output of pipe_context::dump_debug_state, + * and it has a fence number assigned. That's done without knowing whether + * that draw call is problematic or not. The record is added into the list + * of all records. + * + * An independent, separate thread loops over the list of records and checks + * their fences. Records with signalled fences are freed. On fence timeout, + * the thread dumps the record of the oldest unsignalled fence. + */ + pipe_thread thread; + pipe_mutex mutex; + int kill_thread; + struct pipe_resource *fence; + struct pipe_transfer *fence_transfer; + uint32_t *mapped_fence; + uint32_t sequence_no; + struct dd_draw_record *records; + int max_log_buffer_size; }; @@ -122,6 +251,7 @@ void dd_init_draw_functions(struct dd_context *dctx); +PIPE_THREAD_ROUTINE(dd_thread_pipelined_hang_detect, input); static inline struct dd_context * diff -Nru mesa-12.0.6/src/gallium/drivers/ddebug/dd_screen.c mesa-17.0.7/src/gallium/drivers/ddebug/dd_screen.c --- mesa-12.0.6/src/gallium/drivers/ddebug/dd_screen.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/ddebug/dd_screen.c 2017-06-01 10:37:10.000000000 +0000 @@ -237,13 +237,15 @@ static boolean dd_screen_resource_get_handle(struct pipe_screen *_screen, + struct pipe_context *_pipe, struct pipe_resource *resource, struct winsys_handle *handle, unsigned usage) { struct pipe_screen *screen = dd_screen(_screen)->screen; + struct pipe_context *pipe = _pipe ? dd_context(_pipe)->pipe : NULL; - return screen->resource_get_handle(screen, resource, handle, usage); + return screen->resource_get_handle(screen, pipe, resource, handle, usage); } @@ -263,12 +265,14 @@ static boolean dd_screen_fence_finish(struct pipe_screen *_screen, + struct pipe_context *_ctx, struct pipe_fence_handle *fence, uint64_t timeout) { struct pipe_screen *screen = dd_screen(_screen)->screen; + struct pipe_context *ctx = _ctx ? dd_context(_ctx)->pipe : NULL; - return screen->fence_finish(screen, fence, timeout); + return screen->fence_finish(screen, ctx, fence, timeout); } @@ -290,13 +294,17 @@ ddebug_screen_create(struct pipe_screen *screen) { struct dd_screen *dscreen; - const char *option = debug_get_option("GALLIUM_DDEBUG", NULL); - bool dump_always = option && !strncmp(option, "always", 6); - bool no_flush = option && strstr(option, "noflush"); - bool help = option && !strcmp(option, "help"); + const char *option; + bool no_flush; unsigned timeout = 0; + unsigned apitrace_dump_call = 0; + enum dd_mode mode; - if (help) { + option = debug_get_option("GALLIUM_DDEBUG", NULL); + if (!option) + return screen; + + if (!strcmp(option, "help")) { puts("Gallium driver debugger"); puts(""); puts("Usage:"); @@ -310,6 +318,14 @@ puts(" fence timeout and dump context and driver information into"); puts(" $HOME/"DD_DIR"/ when a hang is detected."); puts(""); + puts(" GALLIUM_DDEBUG=\"pipelined [timeout in ms] [verbose]\""); + puts(" Detect a device hang after every draw call based on the given fence"); + puts(" timeout without flushes and dump context and driver information into"); + puts(" $HOME/"DD_DIR"/ when a hang is detected."); + puts(""); + puts(" GALLIUM_DDEBUG=\"apitrace [call#] [verbose]\""); + puts(" Dump apitrace draw call information into $HOME/"DD_DIR"/. Implies 'noflush'."); + puts(""); puts(" If 'noflush' is specified, do not flush on every draw call. In hang"); puts(" detection mode, this only detect hangs in pipe->flush."); puts(" If 'verbose' is specified, additional information is written to stderr."); @@ -320,10 +336,27 @@ exit(0); } - if (!option) - return screen; - if (!dump_always && sscanf(option, "%u", &timeout) != 1) - return screen; + no_flush = strstr(option, "noflush") != NULL; + + if (!strncmp(option, "always", 6)) { + mode = DD_DUMP_ALL_CALLS; + } else if (!strncmp(option, "apitrace", 8)) { + mode = DD_DUMP_APITRACE_CALL; + no_flush = true; + + if (sscanf(option+8, "%u", &apitrace_dump_call) != 1) + return screen; + } else if (!strncmp(option, "pipelined", 8)) { + mode = DD_DETECT_HANGS_PIPELINED; + + if (sscanf(option+10, "%u", &timeout) != 1) + return screen; + } else { + mode = DD_DETECT_HANGS; + + if (sscanf(option, "%u", &timeout) != 1) + return screen; + } dscreen = CALLOC_STRUCT(dd_screen); if (!dscreen) @@ -363,17 +396,22 @@ dscreen->screen = screen; dscreen->timeout_ms = timeout; - dscreen->mode = dump_always ? DD_DUMP_ALL_CALLS : DD_DETECT_HANGS; + dscreen->mode = mode; dscreen->no_flush = no_flush; dscreen->verbose = strstr(option, "verbose") != NULL; + dscreen->apitrace_dump_call = apitrace_dump_call; switch (dscreen->mode) { case DD_DUMP_ALL_CALLS: fprintf(stderr, "Gallium debugger active. Logging all calls.\n"); break; case DD_DETECT_HANGS: + case DD_DETECT_HANGS_PIPELINED: fprintf(stderr, "Gallium debugger active. " - "The hang detection timout is %i ms.\n", timeout); + "The hang detection timeout is %i ms.\n", timeout); + break; + case DD_DUMP_APITRACE_CALL: + fprintf(stderr, "Gallium debugger active. Going to dump an apitrace call.\n"); break; default: assert(0); diff -Nru mesa-12.0.6/src/gallium/drivers/ddebug/dd_util.h mesa-17.0.7/src/gallium/drivers/ddebug/dd_util.h --- mesa-12.0.6/src/gallium/drivers/ddebug/dd_util.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/ddebug/dd_util.h 2017-06-01 10:37:10.000000000 +0000 @@ -33,6 +33,7 @@ #include #include +#include "c99_alloca.h" #include "os/os_process.h" #include "util/u_debug.h" @@ -71,4 +72,27 @@ return f; } +static inline void +dd_parse_apitrace_marker(const char *string, int len, unsigned *call_number) +{ + unsigned num; + char *s; + + if (len <= 0) + return; + + /* Make it zero-terminated. */ + s = alloca(len + 1); + memcpy(s, string, len); + s[len] = 0; + + /* Parse the number. */ + errno = 0; + num = strtol(s, NULL, 10); + if (errno) + return; + + *call_number = num; +} + #endif /* DD_UTIL_H */ diff -Nru mesa-12.0.6/src/gallium/drivers/ddebug/Makefile.in mesa-17.0.7/src/gallium/drivers/ddebug/Makefile.in --- mesa-12.0.6/src/gallium/drivers/ddebug/Makefile.in 2017-01-24 01:41:46.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/ddebug/Makefile.in 2017-06-01 10:37:20.000000000 +0000 @@ -89,10 +89,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -192,6 +195,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -206,6 +211,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -235,10 +241,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -288,11 +295,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -332,8 +336,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -370,8 +372,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -380,7 +380,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -388,13 +387,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -423,6 +423,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -540,12 +541,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -557,7 +554,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ $(GALLIUM_DRIVER_CFLAGS) diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/Automake.inc mesa-17.0.7/src/gallium/drivers/etnaviv/Automake.inc --- mesa-12.0.6/src/gallium/drivers/etnaviv/Automake.inc 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/Automake.inc 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,11 @@ +if HAVE_GALLIUM_ETNAVIV + +TARGET_DRIVERS += etnaviv +TARGET_CPPFLAGS += -DGALLIUM_ETNAVIV +TARGET_LIB_DEPS += \ + $(top_builddir)/src/gallium/winsys/etnaviv/drm/libetnavivdrm.la \ + $(top_builddir)/src/gallium/drivers/etnaviv/libetnaviv.la \ + $(ETNAVIV_LIBS) \ + $(LIBDRM_LIBS) + +endif diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_asm.c mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_asm.c --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_asm.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_asm.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,107 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + */ + +#include "etnaviv_asm.h" +#include "etnaviv_debug.h" +#include "etnaviv_util.h" + +/* An instruction can only read from one distinct uniform. + * This function verifies this property and returns true if the instruction + * is deemed correct and false otherwise. + */ +static bool +check_uniforms(const struct etna_inst *inst) +{ + unsigned uni_rgroup = -1; + unsigned uni_reg = -1; + bool conflict = false; + + for (unsigned i = 0; i < ETNA_NUM_SRC; i++) { + const struct etna_inst_src *src = &inst->src[i]; + + if (!etna_rgroup_is_uniform(src->rgroup)) + continue; + + if (uni_reg == -1) { /* first uniform used */ + uni_rgroup = src->rgroup; + uni_reg = src->reg; + } else { /* second or later; check that it is a re-use */ + if (uni_rgroup != src->rgroup || uni_reg != src->reg) { + conflict = true; + } + } + } + + return !conflict; +} + +int +etna_assemble(uint32_t *out, const struct etna_inst *inst) +{ + /* cannot have both src2 and imm */ + if (inst->imm && inst->src[2].use) + return 1; + + if (!check_uniforms(inst)) + BUG("error: generating instruction that accesses two different uniforms"); + + out[0] = VIV_ISA_WORD_0_OPCODE(inst->opcode) | + VIV_ISA_WORD_0_COND(inst->cond) | + COND(inst->sat, VIV_ISA_WORD_0_SAT) | + COND(inst->dst.use, VIV_ISA_WORD_0_DST_USE) | + VIV_ISA_WORD_0_DST_AMODE(inst->dst.amode) | + VIV_ISA_WORD_0_DST_REG(inst->dst.reg) | + VIV_ISA_WORD_0_DST_COMPS(inst->dst.comps) | + VIV_ISA_WORD_0_TEX_ID(inst->tex.id); + out[1] = VIV_ISA_WORD_1_TEX_AMODE(inst->tex.amode) | + VIV_ISA_WORD_1_TEX_SWIZ(inst->tex.swiz) | + COND(inst->src[0].use, VIV_ISA_WORD_1_SRC0_USE) | + VIV_ISA_WORD_1_SRC0_REG(inst->src[0].reg) | + COND(inst->type & 0x4, VIV_ISA_WORD_1_TYPE_BIT2) | + VIV_ISA_WORD_1_SRC0_SWIZ(inst->src[0].swiz) | + COND(inst->src[0].neg, VIV_ISA_WORD_1_SRC0_NEG) | + COND(inst->src[0].abs, VIV_ISA_WORD_1_SRC0_ABS); + out[2] = VIV_ISA_WORD_2_SRC0_AMODE(inst->src[0].amode) | + VIV_ISA_WORD_2_SRC0_RGROUP(inst->src[0].rgroup) | + COND(inst->src[1].use, VIV_ISA_WORD_2_SRC1_USE) | + VIV_ISA_WORD_2_SRC1_REG(inst->src[1].reg) | + VIV_ISA_WORD_2_SRC1_SWIZ(inst->src[1].swiz) | + COND(inst->src[1].neg, VIV_ISA_WORD_2_SRC1_NEG) | + COND(inst->src[1].abs, VIV_ISA_WORD_2_SRC1_ABS) | + VIV_ISA_WORD_2_SRC1_AMODE(inst->src[1].amode) | + VIV_ISA_WORD_2_TYPE_BIT01(inst->type & 0x3); + out[3] = VIV_ISA_WORD_3_SRC1_RGROUP(inst->src[1].rgroup) | + COND(inst->src[2].use, VIV_ISA_WORD_3_SRC2_USE) | + VIV_ISA_WORD_3_SRC2_REG(inst->src[2].reg) | + VIV_ISA_WORD_3_SRC2_SWIZ(inst->src[2].swiz) | + COND(inst->src[2].neg, VIV_ISA_WORD_3_SRC2_NEG) | + COND(inst->src[2].abs, VIV_ISA_WORD_3_SRC2_ABS) | + VIV_ISA_WORD_3_SRC2_AMODE(inst->src[2].amode) | + VIV_ISA_WORD_3_SRC2_RGROUP(inst->src[2].rgroup); + out[3] |= VIV_ISA_WORD_3_SRC2_IMM(inst->imm); + + return 0; +} diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_asm.h mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_asm.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_asm.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_asm.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,133 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + */ + +#ifndef H_ETNAVIV_ASM +#define H_ETNAVIV_ASM + +#include +#include "hw/isa.xml.h" + +/* Size of an instruction in 32-bit words */ +#define ETNA_INST_SIZE (4) +/* Number of source operands per instruction */ +#define ETNA_NUM_SRC (3) + +/* Broadcast swizzle to all four components */ +#define INST_SWIZ_BROADCAST(x) \ + (INST_SWIZ_X(x) | INST_SWIZ_Y(x) | INST_SWIZ_Z(x) | INST_SWIZ_W(x)) +/* Identity (NOP) swizzle */ +#define INST_SWIZ_IDENTITY \ + (INST_SWIZ_X(0) | INST_SWIZ_Y(1) | INST_SWIZ_Z(2) | INST_SWIZ_W(3)) +/* Fully specified swizzle */ +#define INST_SWIZ(x,y,z,w) \ + (INST_SWIZ_X(x) | INST_SWIZ_Y(y) | INST_SWIZ_Z(z) | INST_SWIZ_W(w)) +#define SWIZZLE(c0,c1,c2,c3) \ + INST_SWIZ(INST_SWIZ_COMP_##c0, \ + INST_SWIZ_COMP_##c1, \ + INST_SWIZ_COMP_##c2, \ + INST_SWIZ_COMP_##c3) + +/*** operands ***/ + +/* destination operand */ +struct etna_inst_dst { + unsigned use:1; /* 0: not in use, 1: in use */ + unsigned amode:3; /* INST_AMODE_* */ + unsigned reg:7; /* register number 0..127 */ + unsigned comps:4; /* INST_COMPS_* */ +}; + +/* texture operand */ +struct etna_inst_tex { + unsigned id:5; /* sampler id */ + unsigned amode:3; /* INST_AMODE_* */ + unsigned swiz:8; /* INST_SWIZ */ +}; + +/* source operand */ +struct etna_inst_src { + unsigned use:1; /* 0: not in use, 1: in use */ + unsigned reg:9; /* register or uniform number 0..511 */ + unsigned swiz:8; /* INST_SWIZ */ + unsigned neg:1; /* negate (flip sign) if set */ + unsigned abs:1; /* absolute (remove sign) if set */ + unsigned amode:3; /* INST_AMODE_* */ + unsigned rgroup:3; /* INST_RGROUP_* */ +}; + +/*** instruction ***/ +struct etna_inst { + uint8_t opcode; /* INST_OPCODE_* */ + uint8_t type; /* INST_TYPE_* */ + unsigned cond:5; /* INST_CONDITION_* */ + unsigned sat:1; /* saturate result between 0..1 */ + struct etna_inst_dst dst; /* destination operand */ + struct etna_inst_tex tex; /* texture operand */ + struct etna_inst_src src[ETNA_NUM_SRC]; /* source operand */ + unsigned imm; /* takes place of src[2] for BRANCH/CALL */ +}; + +/* Compose two swizzles (computes swz1.swz2) */ +static inline uint32_t inst_swiz_compose(uint32_t swz1, uint32_t swz2) +{ + return INST_SWIZ_X((swz1 >> (((swz2 >> 0)&3)*2))&3) | + INST_SWIZ_Y((swz1 >> (((swz2 >> 2)&3)*2))&3) | + INST_SWIZ_Z((swz1 >> (((swz2 >> 4)&3)*2))&3) | + INST_SWIZ_W((swz1 >> (((swz2 >> 6)&3)*2))&3); +}; + +/* Return whether the rgroup is one of the uniforms */ +static inline int +etna_rgroup_is_uniform(unsigned rgroup) +{ + return rgroup == INST_RGROUP_UNIFORM_0 || + rgroup == INST_RGROUP_UNIFORM_1; +} + +/** + * Build vivante instruction from structure with + * opcode, cond, sat, dst_use, dst_amode, + * dst_reg, dst_comps, tex_id, tex_amode, tex_swiz, + * src[0-2]_reg, use, swiz, neg, abs, amode, rgroup, + * imm + * + * Return 0 if successful, and a non-zero + * value otherwise. + */ +int +etna_assemble(uint32_t *out, const struct etna_inst *inst); + +/** + * Set field imm of already-assembled instruction. + * This is used for filling in jump destinations in a separate pass. + */ +static inline void +etna_assemble_set_imm(uint32_t *out, uint32_t imm) +{ + out[3] |= VIV_ISA_WORD_3_SRC2_IMM(imm); +} + +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_blend.c mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_blend.c --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_blend.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_blend.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,109 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + */ + +#include "etnaviv_blend.h" + +#include "etnaviv_context.h" +#include "etnaviv_translate.h" +#include "pipe/p_defines.h" +#include "util/u_memory.h" + +void * +etna_blend_state_create(struct pipe_context *pctx, + const struct pipe_blend_state *so) +{ + const struct pipe_rt_blend_state *rt0 = &so->rt[0]; + struct etna_blend_state *co = CALLOC_STRUCT(etna_blend_state); + + if (!co) + return NULL; + + co->base = *so; + + /* Enable blending if + * - blend enabled in blend state + * - NOT source factor is ONE and destination factor ZERO for both rgb and + * alpha (which would mean that blending is effectively disabled) + */ + bool enable = rt0->blend_enable && + !(rt0->rgb_src_factor == PIPE_BLENDFACTOR_ONE && + rt0->rgb_dst_factor == PIPE_BLENDFACTOR_ZERO && + rt0->alpha_src_factor == PIPE_BLENDFACTOR_ONE && + rt0->alpha_dst_factor == PIPE_BLENDFACTOR_ZERO); + + /* Enable separate alpha if + * - Blending enabled (see above) + * - NOT source factor is equal to destination factor for both rgb abd + * alpha (which would effectively that mean alpha is not separate) + */ + bool separate_alpha = enable && + !(rt0->rgb_src_factor == rt0->alpha_src_factor && + rt0->rgb_dst_factor == rt0->alpha_dst_factor); + + /* If the complete render target is written, set full_overwrite: + * - The color mask is 1111 + * - No blending is used + */ + bool full_overwrite = (rt0->colormask == 15) && !enable; + + if (enable) { + co->PE_ALPHA_CONFIG = + VIVS_PE_ALPHA_CONFIG_BLEND_ENABLE_COLOR | + COND(separate_alpha, VIVS_PE_ALPHA_CONFIG_BLEND_SEPARATE_ALPHA) | + VIVS_PE_ALPHA_CONFIG_SRC_FUNC_COLOR(translate_blend_factor(rt0->rgb_src_factor)) | + VIVS_PE_ALPHA_CONFIG_SRC_FUNC_ALPHA(translate_blend_factor(rt0->alpha_src_factor)) | + VIVS_PE_ALPHA_CONFIG_DST_FUNC_COLOR(translate_blend_factor(rt0->rgb_dst_factor)) | + VIVS_PE_ALPHA_CONFIG_DST_FUNC_ALPHA(translate_blend_factor(rt0->alpha_dst_factor)) | + VIVS_PE_ALPHA_CONFIG_EQ_COLOR(translate_blend(rt0->rgb_func)) | + VIVS_PE_ALPHA_CONFIG_EQ_ALPHA(translate_blend(rt0->alpha_func)); + } else { + co->PE_ALPHA_CONFIG = 0; + } + + co->PE_COLOR_FORMAT = + VIVS_PE_COLOR_FORMAT_COMPONENTS(rt0->colormask) | + COND(full_overwrite, VIVS_PE_COLOR_FORMAT_OVERWRITE); + + co->PE_LOGIC_OP = + VIVS_PE_LOGIC_OP_OP(so->logicop_enable ? so->logicop_func : LOGIC_OP_COPY) | + 0x000E4000 /* ??? */; + + /* independent_blend_enable not needed: only one rt supported */ + /* XXX alpha_to_coverage / alpha_to_one? */ + /* Set dither registers based on dither status. These registers set the + * dither pattern, + * for now, set the same values as the blob. + */ + if (so->dither) { + co->PE_DITHER[0] = 0x6e4ca280; + co->PE_DITHER[1] = 0x5d7f91b3; + } else { + co->PE_DITHER[0] = 0xffffffff; + co->PE_DITHER[1] = 0xffffffff; + } + + return co; +} diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_blend.h mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_blend.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_blend.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_blend.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + */ + +#ifndef H_ETNAVIV_BLEND +#define H_ETNAVIV_BLEND + +#include "pipe/p_context.h" +#include "pipe/p_state.h" + +struct etna_blend_state { + struct pipe_blend_state base; + + uint32_t PE_ALPHA_CONFIG; + uint32_t PE_COLOR_FORMAT; + uint32_t PE_LOGIC_OP; + uint32_t PE_DITHER[2]; +}; + +static inline struct etna_blend_state * +etna_blend_state(struct pipe_blend_state *blend) +{ + return (struct etna_blend_state *)blend; +} + +void * +etna_blend_state_create(struct pipe_context *pctx, + const struct pipe_blend_state *so); + +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,640 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + */ + +#include "etnaviv_clear_blit.h" + +#include "hw/common.xml.h" + +#include "etnaviv_context.h" +#include "etnaviv_emit.h" +#include "etnaviv_emit.h" +#include "etnaviv_format.h" +#include "etnaviv_resource.h" +#include "etnaviv_surface.h" +#include "etnaviv_translate.h" + +#include "pipe/p_defines.h" +#include "pipe/p_state.h" +#include "util/u_blitter.h" +#include "util/u_inlines.h" +#include "util/u_memory.h" +#include "util/u_surface.h" + +/* Save current state for blitter operation */ +static void +etna_blit_save_state(struct etna_context *ctx) +{ + util_blitter_save_vertex_buffer_slot(ctx->blitter, ctx->vertex_buffer.vb); + util_blitter_save_vertex_elements(ctx->blitter, ctx->vertex_elements); + util_blitter_save_vertex_shader(ctx->blitter, ctx->vs); + util_blitter_save_rasterizer(ctx->blitter, ctx->rasterizer); + util_blitter_save_viewport(ctx->blitter, &ctx->viewport_s); + util_blitter_save_scissor(ctx->blitter, &ctx->scissor_s); + util_blitter_save_fragment_shader(ctx->blitter, ctx->fs); + util_blitter_save_blend(ctx->blitter, ctx->blend); + util_blitter_save_depth_stencil_alpha(ctx->blitter, ctx->zsa); + util_blitter_save_stencil_ref(ctx->blitter, &ctx->stencil_ref_s); + util_blitter_save_sample_mask(ctx->blitter, ctx->sample_mask); + util_blitter_save_framebuffer(ctx->blitter, &ctx->framebuffer_s); + util_blitter_save_fragment_sampler_states(ctx->blitter, + ctx->num_fragment_samplers, (void **)ctx->sampler); + util_blitter_save_fragment_sampler_views(ctx->blitter, + ctx->num_fragment_sampler_views, ctx->sampler_view); +} + +/* Generate clear command for a surface (non-fast clear case) */ +void +etna_rs_gen_clear_surface(struct etna_context *ctx, struct etna_surface *surf, + uint32_t clear_value) +{ + struct etna_resource *dst = etna_resource(surf->base.texture); + uint32_t format = translate_rs_format(surf->base.format); + + if (format == ETNA_NO_MATCH) { + BUG("etna_rs_gen_clear_surface: Unhandled clear fmt %s", util_format_name(surf->base.format)); + format = RS_FORMAT_A8R8G8B8; + assert(0); + } + + /* use tiled clear if width is multiple of 16 */ + bool tiled_clear = (surf->surf.padded_width & ETNA_RS_WIDTH_MASK) == 0 && + (surf->surf.padded_height & ETNA_RS_HEIGHT_MASK) == 0; + + etna_compile_rs_state( ctx, &surf->clear_command, &(struct rs_state) { + .source_format = format, + .dest_format = format, + .dest = dst->bo, + .dest_offset = surf->surf.offset, + .dest_stride = surf->surf.stride, + .dest_padded_height = surf->surf.padded_height, + .dest_tiling = tiled_clear ? dst->layout : ETNA_LAYOUT_LINEAR, + .dither = {0xffffffff, 0xffffffff}, + .width = surf->surf.padded_width, /* These must be padded to 16x4 if !LINEAR, otherwise RS will hang */ + .height = surf->surf.padded_height, + .clear_value = {clear_value}, + .clear_mode = VIVS_RS_CLEAR_CONTROL_MODE_ENABLED1, + .clear_bits = 0xffff + }); +} + +static void +etna_blit_clear_color(struct pipe_context *pctx, struct pipe_surface *dst, + const union pipe_color_union *color) +{ + struct etna_context *ctx = etna_context(pctx); + struct etna_surface *surf = etna_surface(dst); + uint32_t new_clear_value = translate_clear_color(surf->base.format, color); + + if (surf->surf.ts_size) { /* TS: use precompiled clear command */ + ctx->framebuffer.TS_COLOR_CLEAR_VALUE = new_clear_value; + + if (!DBG_ENABLED(ETNA_DBG_NO_AUTODISABLE) && + VIV_FEATURE(ctx->screen, chipMinorFeatures1, AUTO_DISABLE)) { + /* Set number of color tiles to be filled */ + etna_set_state(ctx->stream, VIVS_TS_COLOR_AUTO_DISABLE_COUNT, + surf->surf.padded_width * surf->surf.padded_height / 16); + ctx->framebuffer.TS_MEM_CONFIG |= VIVS_TS_MEM_CONFIG_COLOR_AUTO_DISABLE; + } + + ctx->dirty |= ETNA_DIRTY_TS; + } else if (unlikely(new_clear_value != surf->level->clear_value)) { /* Queue normal RS clear for non-TS surfaces */ + /* If clear color changed, re-generate stored command */ + etna_rs_gen_clear_surface(ctx, surf, new_clear_value); + } + + etna_submit_rs_state(ctx, &surf->clear_command); + surf->level->clear_value = new_clear_value; + resource_written(ctx, surf->base.texture); + etna_resource(surf->base.texture)->seqno++; +} + +static void +etna_blit_clear_zs(struct pipe_context *pctx, struct pipe_surface *dst, + unsigned buffers, double depth, unsigned stencil) +{ + struct etna_context *ctx = etna_context(pctx); + struct etna_surface *surf = etna_surface(dst); + uint32_t new_clear_value = translate_clear_depth_stencil(surf->base.format, depth, stencil); + uint32_t new_clear_bits = 0, clear_bits_depth, clear_bits_stencil; + + /* Get the channels to clear */ + switch (surf->base.format) { + case PIPE_FORMAT_Z16_UNORM: + clear_bits_depth = 0xffff; + clear_bits_stencil = 0; + break; + case PIPE_FORMAT_X8Z24_UNORM: + case PIPE_FORMAT_S8_UINT_Z24_UNORM: + clear_bits_depth = 0xeeee; + clear_bits_stencil = 0x1111; + break; + default: + clear_bits_depth = clear_bits_stencil = 0xffff; + break; + } + + if (buffers & PIPE_CLEAR_DEPTH) + new_clear_bits |= clear_bits_depth; + if (buffers & PIPE_CLEAR_STENCIL) + new_clear_bits |= clear_bits_stencil; + + /* FIXME: when tile status is enabled, this becomes more complex as + * we may separately clear the depth from the stencil. In this case, + * we want to resolve the surface, and avoid using the tile status. + * We may be better off recording the pending clear operation, + * delaying the actual clear to the first use. This way, we can merge + * consecutive clears together. */ + if (surf->surf.ts_size) { /* TS: use precompiled clear command */ + /* Set new clear depth value */ + ctx->framebuffer.TS_DEPTH_CLEAR_VALUE = new_clear_value; + if (!DBG_ENABLED(ETNA_DBG_NO_AUTODISABLE) && + VIV_FEATURE(ctx->screen, chipMinorFeatures1, AUTO_DISABLE)) { + /* Set number of depth tiles to be filled */ + etna_set_state(ctx->stream, VIVS_TS_DEPTH_AUTO_DISABLE_COUNT, + surf->surf.padded_width * surf->surf.padded_height / 16); + ctx->framebuffer.TS_MEM_CONFIG |= VIVS_TS_MEM_CONFIG_DEPTH_AUTO_DISABLE; + } + + ctx->dirty |= ETNA_DIRTY_TS; + } else { + if (unlikely(new_clear_value != surf->level->clear_value)) { /* Queue normal RS clear for non-TS surfaces */ + /* If clear depth value changed, re-generate stored command */ + etna_rs_gen_clear_surface(ctx, surf, new_clear_value); + } + /* Update the channels to be cleared */ + etna_modify_rs_clearbits(&surf->clear_command, new_clear_bits); + } + + etna_submit_rs_state(ctx, &surf->clear_command); + surf->level->clear_value = new_clear_value; + resource_written(ctx, surf->base.texture); + etna_resource(surf->base.texture)->seqno++; +} + +static void +etna_clear(struct pipe_context *pctx, unsigned buffers, + const union pipe_color_union *color, double depth, unsigned stencil) +{ + struct etna_context *ctx = etna_context(pctx); + + /* Flush color and depth cache before clearing anything. + * This is especially important when coming from another surface, as + * otherwise it may clear part of the old surface instead. */ + etna_set_state(ctx->stream, VIVS_GL_FLUSH_CACHE, VIVS_GL_FLUSH_CACHE_COLOR | VIVS_GL_FLUSH_CACHE_DEPTH); + etna_stall(ctx->stream, SYNC_RECIPIENT_RA, SYNC_RECIPIENT_PE); + + /* Preparation: Flush the TS if needed. This must be done after flushing + * color and depth, otherwise it can result in crashes */ + bool need_ts_flush = false; + if ((buffers & PIPE_CLEAR_COLOR) && ctx->framebuffer_s.nr_cbufs) { + struct etna_surface *surf = etna_surface(ctx->framebuffer_s.cbufs[0]); + if (surf->surf.ts_size) + need_ts_flush = true; + } + if ((buffers & PIPE_CLEAR_DEPTHSTENCIL) && ctx->framebuffer_s.zsbuf != NULL) { + struct etna_surface *surf = etna_surface(ctx->framebuffer_s.zsbuf); + + if (surf->surf.ts_size) + need_ts_flush = true; + } + + if (need_ts_flush) + etna_set_state(ctx->stream, VIVS_TS_FLUSH_CACHE, VIVS_TS_FLUSH_CACHE_FLUSH); + + /* No need to set up the TS here as RS clear operations (in contrast to + * resolve and copy) do not require the TS state. + */ + if (buffers & PIPE_CLEAR_COLOR) { + for (int idx = 0; idx < ctx->framebuffer_s.nr_cbufs; ++idx) { + etna_blit_clear_color(pctx, ctx->framebuffer_s.cbufs[idx], + &color[idx]); + } + } + + /* Flush the color and depth caches before each RS clear operation + * This fixes a hang on GC600. */ + if (buffers & PIPE_CLEAR_DEPTHSTENCIL && buffers & PIPE_CLEAR_COLOR) + etna_set_state(ctx->stream, VIVS_GL_FLUSH_CACHE, + VIVS_GL_FLUSH_CACHE_COLOR | VIVS_GL_FLUSH_CACHE_DEPTH); + + if ((buffers & PIPE_CLEAR_DEPTHSTENCIL) && ctx->framebuffer_s.zsbuf != NULL) + etna_blit_clear_zs(pctx, ctx->framebuffer_s.zsbuf, buffers, depth, stencil); + + etna_stall(ctx->stream, SYNC_RECIPIENT_RA, SYNC_RECIPIENT_PE); +} + +static void +etna_clear_render_target(struct pipe_context *pctx, struct pipe_surface *dst, + const union pipe_color_union *color, unsigned dstx, + unsigned dsty, unsigned width, unsigned height, + bool render_condition_enabled) +{ + struct etna_context *ctx = etna_context(pctx); + + /* XXX could fall back to RS when target area is full screen / resolveable + * and no TS. */ + etna_blit_save_state(ctx); + util_blitter_clear_render_target(ctx->blitter, dst, color, dstx, dsty, width, height); +} + +static void +etna_clear_depth_stencil(struct pipe_context *pctx, struct pipe_surface *dst, + unsigned clear_flags, double depth, unsigned stencil, + unsigned dstx, unsigned dsty, unsigned width, + unsigned height, bool render_condition_enabled) +{ + struct etna_context *ctx = etna_context(pctx); + + /* XXX could fall back to RS when target area is full screen / resolveable + * and no TS. */ + etna_blit_save_state(ctx); + util_blitter_clear_depth_stencil(ctx->blitter, dst, clear_flags, depth, + stencil, dstx, dsty, width, height); +} + +static void +etna_resource_copy_region(struct pipe_context *pctx, struct pipe_resource *dst, + unsigned dst_level, unsigned dstx, unsigned dsty, + unsigned dstz, struct pipe_resource *src, + unsigned src_level, const struct pipe_box *src_box) +{ + struct etna_context *ctx = etna_context(pctx); + + /* The resource must be of the same format. */ + assert(src->format == dst->format); + /* Resources with nr_samples > 1 are not allowed. */ + assert(src->nr_samples <= 1 && dst->nr_samples <= 1); + + /* XXX we can use the RS as a literal copy engine here + * the only complexity is tiling; the size of the boxes needs to be aligned + * to the tile size + * how to handle the case where a resource is copied from/to a non-aligned + * position? + * from non-aligned: can fall back to rendering-based copy? + * to non-aligned: can fall back to rendering-based copy? + * XXX this goes wrong when source surface is supertiled. + */ + if (util_blitter_is_copy_supported(ctx->blitter, dst, src)) { + etna_blit_save_state(ctx); + util_blitter_copy_texture(ctx->blitter, dst, dst_level, dstx, dsty, dstz, + src, src_level, src_box); + } else { + util_resource_copy_region(pctx, dst, dst_level, dstx, dsty, dstz, src, + src_level, src_box); + } +} + +static bool +etna_manual_blit(struct etna_resource *dst, struct etna_resource_level *dst_lev, + unsigned int dst_offset, struct etna_resource *src, + struct etna_resource_level *src_lev, unsigned int src_offset, + const struct pipe_blit_info *blit_info) +{ + void *smap, *srow, *dmap, *drow; + size_t tile_size; + + assert(src->layout == ETNA_LAYOUT_TILED); + assert(dst->layout == ETNA_LAYOUT_TILED); + assert(src->base.nr_samples == 0); + assert(dst->base.nr_samples == 0); + + tile_size = util_format_get_blocksize(blit_info->src.format) * 4 * 4; + + smap = etna_bo_map(src->bo); + if (!smap) + return false; + + dmap = etna_bo_map(dst->bo); + if (!dmap) + return false; + + srow = smap + src_offset; + drow = dmap + dst_offset; + + etna_bo_cpu_prep(src->bo, DRM_ETNA_PREP_READ); + etna_bo_cpu_prep(dst->bo, DRM_ETNA_PREP_WRITE); + + for (int y = 0; y < blit_info->src.box.height; y += 4) { + memcpy(drow, srow, tile_size * blit_info->src.box.width); + srow += src_lev->stride * 4; + drow += dst_lev->stride * 4; + } + + etna_bo_cpu_fini(dst->bo); + etna_bo_cpu_fini(src->bo); + + return true; +} + +static bool +etna_try_rs_blit(struct pipe_context *pctx, + const struct pipe_blit_info *blit_info) +{ + struct etna_context *ctx = etna_context(pctx); + struct etna_resource *src = etna_resource(blit_info->src.resource); + struct etna_resource *dst = etna_resource(blit_info->dst.resource); + struct compiled_rs_state copy_to_screen; + uint32_t ts_mem_config = 0; + int msaa_xscale = 1, msaa_yscale = 1; + + /* Ensure that the level is valid */ + assert(blit_info->src.level <= src->base.last_level); + assert(blit_info->dst.level <= dst->base.last_level); + + if (!translate_samples_to_xyscale(src->base.nr_samples, &msaa_xscale, &msaa_yscale, NULL)) + return FALSE; + + /* The width/height are in pixels; they do not change as a result of + * multi-sampling. So, when blitting from a 4x multisampled surface + * to a non-multisampled surface, the width and height will be + * identical. As we do not support scaling, reject different sizes. */ + if (blit_info->dst.box.width != blit_info->src.box.width || + blit_info->dst.box.height != blit_info->src.box.height) { + DBG("scaling requested: source %dx%d destination %dx%d", + blit_info->src.box.width, blit_info->src.box.height, + blit_info->dst.box.width, blit_info->dst.box.height); + return FALSE; + } + + /* No masks - RS can't copy specific channels */ + unsigned mask = util_format_get_mask(blit_info->dst.format); + if ((blit_info->mask & mask) != mask) { + DBG("sub-mask requested: 0x%02x vs format mask 0x%02x", blit_info->mask, mask); + return FALSE; + } + + unsigned src_format = etna_compatible_rs_format(blit_info->src.format); + unsigned dst_format = etna_compatible_rs_format(blit_info->src.format); + if (translate_rs_format(src_format) == ETNA_NO_MATCH || + translate_rs_format(dst_format) == ETNA_NO_MATCH || + blit_info->scissor_enable || blit_info->src.box.x != 0 || + blit_info->src.box.y != 0 || blit_info->dst.box.x != 0 || + blit_info->dst.box.y != 0 || + blit_info->dst.box.depth != blit_info->src.box.depth || + blit_info->dst.box.depth != 1) { + return FALSE; + } + + /* Ensure that the Z coordinate is sane */ + if (dst->base.target != PIPE_TEXTURE_CUBE) + assert(blit_info->dst.box.z == 0); + if (src->base.target != PIPE_TEXTURE_CUBE) + assert(blit_info->src.box.z == 0); + + assert(blit_info->src.box.z < src->base.array_size); + assert(blit_info->dst.box.z < dst->base.array_size); + + struct etna_resource_level *src_lev = &src->levels[blit_info->src.level]; + struct etna_resource_level *dst_lev = &dst->levels[blit_info->dst.level]; + + /* we may be given coordinates up to the padded width to avoid + * any alignment issues with different tiling formats */ + assert((blit_info->src.box.x + blit_info->src.box.width) * msaa_xscale <= src_lev->padded_width); + assert((blit_info->src.box.y + blit_info->src.box.height) * msaa_yscale <= src_lev->padded_height); + assert(blit_info->dst.box.x + blit_info->dst.box.width <= dst_lev->padded_width); + assert(blit_info->dst.box.y + blit_info->dst.box.height <= dst_lev->padded_height); + + unsigned src_offset = + src_lev->offset + blit_info->src.box.z * src_lev->layer_stride; + unsigned dst_offset = + dst_lev->offset + blit_info->dst.box.z * dst_lev->layer_stride; + + if (src_lev->padded_width <= ETNA_RS_WIDTH_MASK || + dst_lev->padded_width <= ETNA_RS_WIDTH_MASK || + src_lev->padded_height <= ETNA_RS_HEIGHT_MASK || + dst_lev->padded_height <= ETNA_RS_HEIGHT_MASK) + goto manual; + + /* If the width is not aligned to the RS width, but is within our + * padding, adjust the width to suite the RS width restriction. + * Note: the RS width/height are converted to source samples here. */ + unsigned int width = blit_info->src.box.width * msaa_xscale; + unsigned int height = blit_info->src.box.height * msaa_yscale; + unsigned int w_align = ETNA_RS_WIDTH_MASK + 1; + unsigned int h_align = (ETNA_RS_HEIGHT_MASK + 1) * ctx->specs.pixel_pipes; + + if (width & (w_align - 1) && width >= src_lev->width * msaa_xscale && width >= dst_lev->width) + width = align(width, w_align); + + if (height & (h_align - 1) && height >= src_lev->height * msaa_yscale && height >= dst_lev->height) + height = align(height, h_align); + + /* The padded dimensions are in samples */ + if (width > src_lev->padded_width || + width > dst_lev->padded_width * msaa_xscale || + height > src_lev->padded_height || + height > dst_lev->padded_height * msaa_yscale) + goto manual; + + if (src->base.nr_samples > 1) { + uint32_t msaa_format = translate_msaa_format(src_format); + assert(msaa_format != ETNA_NO_MATCH); + ts_mem_config |= VIVS_TS_MEM_CONFIG_MSAA | msaa_format; + } + + uint32_t to_flush = 0; + + if (src->base.bind & PIPE_BIND_RENDER_TARGET) + to_flush |= VIVS_GL_FLUSH_CACHE_COLOR; + if (src->base.bind & PIPE_BIND_DEPTH_STENCIL) + to_flush |= VIVS_GL_FLUSH_CACHE_DEPTH; + + if (to_flush) { + etna_set_state(ctx->stream, VIVS_GL_FLUSH_CACHE, to_flush); + etna_stall(ctx->stream, SYNC_RECIPIENT_RA, SYNC_RECIPIENT_PE); + } + + /* Set up color TS to source surface before blit, if needed */ + if (src->levels[blit_info->src.level].ts_size) { + struct etna_reloc reloc; + unsigned ts_offset = + src_lev->ts_offset + blit_info->src.box.z * src_lev->ts_layer_stride; + + etna_set_state(ctx->stream, VIVS_TS_MEM_CONFIG, + VIVS_TS_MEM_CONFIG_COLOR_FAST_CLEAR | ts_mem_config); + + memset(&reloc, 0, sizeof(struct etna_reloc)); + reloc.bo = src->ts_bo; + reloc.offset = ts_offset; + reloc.flags = ETNA_RELOC_READ; + etna_set_state_reloc(ctx->stream, VIVS_TS_COLOR_STATUS_BASE, &reloc); + + memset(&reloc, 0, sizeof(struct etna_reloc)); + reloc.bo = src->bo; + reloc.offset = src_offset; + reloc.flags = ETNA_RELOC_READ; + etna_set_state_reloc(ctx->stream, VIVS_TS_COLOR_SURFACE_BASE, &reloc); + + etna_set_state(ctx->stream, VIVS_TS_COLOR_CLEAR_VALUE, + src->levels[blit_info->src.level].clear_value); + } else { + etna_set_state(ctx->stream, VIVS_TS_MEM_CONFIG, ts_mem_config); + } + ctx->dirty |= ETNA_DIRTY_TS; + + /* Kick off RS here */ + etna_compile_rs_state(ctx, ©_to_screen, &(struct rs_state) { + .source_format = translate_rs_format(src_format), + .source_tiling = src->layout, + .source = src->bo, + .source_offset = src_offset, + .source_stride = src_lev->stride, + .source_padded_height = src_lev->padded_height, + .dest_format = translate_rs_format(dst_format), + .dest_tiling = dst->layout, + .dest = dst->bo, + .dest_offset = dst_offset, + .dest_stride = dst_lev->stride, + .dest_padded_height = dst_lev->padded_height, + .downsample_x = msaa_xscale > 1, + .downsample_y = msaa_yscale > 1, + .swap_rb = translate_rb_src_dst_swap(src->base.format, dst->base.format), + .dither = {0xffffffff, 0xffffffff}, // XXX dither when going from 24 to 16 bit? + .clear_mode = VIVS_RS_CLEAR_CONTROL_MODE_DISABLED, + .width = width, + .height = height + }); + + etna_submit_rs_state(ctx, ©_to_screen); + resource_written(ctx, &dst->base); + dst->seqno++; + + return TRUE; + +manual: + if (src->layout == ETNA_LAYOUT_TILED && dst->layout == ETNA_LAYOUT_TILED) { + etna_resource_wait(pctx, dst); + etna_resource_wait(pctx, src); + return etna_manual_blit(dst, dst_lev, dst_offset, src, src_lev, src_offset, blit_info); + } + + return FALSE; +} + +static void +etna_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info) +{ + /* This is a more extended version of resource_copy_region */ + /* TODO Some cases can be handled by RS; if not, fall back to rendering or + * even CPU copy block of pixels from info->src to info->dst + * (resource, level, box, format); + * function is used for scaling, flipping in x and y direction (negative + * width/height), format conversion, mask and filter and even a scissor rectangle + * + * What can the RS do for us: + * convert between tiling formats (layouts) + * downsample 2x in x and y + * convert between a limited number of pixel formats + * + * For the rest, fall back to util_blitter + * XXX this goes wrong when source surface is supertiled. */ + struct etna_context *ctx = etna_context(pctx); + struct pipe_blit_info info = *blit_info; + + if (info.src.resource->nr_samples > 1 && + info.dst.resource->nr_samples <= 1 && + !util_format_is_depth_or_stencil(info.src.resource->format) && + !util_format_is_pure_integer(info.src.resource->format)) { + DBG("color resolve unimplemented"); + return; + } + + if (etna_try_rs_blit(pctx, blit_info)) + return; + + if (util_try_blit_via_copy_region(pctx, blit_info)) + return; + + if (info.mask & PIPE_MASK_S) { + DBG("cannot blit stencil, skipping"); + info.mask &= ~PIPE_MASK_S; + } + + if (!util_blitter_is_blit_supported(ctx->blitter, &info)) { + DBG("blit unsupported %s -> %s", + util_format_short_name(info.src.resource->format), + util_format_short_name(info.dst.resource->format)); + return; + } + + etna_blit_save_state(ctx); + util_blitter_blit(ctx->blitter, &info); +} + +static void +etna_flush_resource(struct pipe_context *pctx, struct pipe_resource *prsc) +{ + struct etna_resource *rsc = etna_resource(prsc); + + if (rsc->scanout) + etna_copy_resource(pctx, rsc->scanout->prime, prsc, 0, 0); +} + +void +etna_copy_resource(struct pipe_context *pctx, struct pipe_resource *dst, + struct pipe_resource *src, int first_level, int last_level) +{ + struct etna_resource *src_priv = etna_resource(src); + struct etna_resource *dst_priv = etna_resource(dst); + + assert(src->format == dst->format); + assert(src->array_size == dst->array_size); + assert(last_level <= dst->last_level && last_level <= src->last_level); + + struct pipe_blit_info blit = {}; + blit.mask = util_format_get_mask(dst->format); + blit.filter = PIPE_TEX_FILTER_NEAREST; + blit.src.resource = src; + blit.src.format = src->format; + blit.dst.resource = dst; + blit.dst.format = dst->format; + blit.dst.box.depth = blit.src.box.depth = 1; + + /* Copy each level and each layer */ + for (int level = first_level; level <= last_level; level++) { + blit.src.level = blit.dst.level = level; + blit.src.box.width = blit.dst.box.width = + MIN2(src_priv->levels[level].width, dst_priv->levels[level].width); + blit.src.box.height = blit.dst.box.height = + MIN2(src_priv->levels[level].height, dst_priv->levels[level].height); + + for (int layer = 0; layer < dst->array_size; layer++) { + blit.src.box.z = blit.dst.box.z = layer; + pctx->blit(pctx, &blit); + } + } +} + +void +etna_clear_blit_init(struct pipe_context *pctx) +{ + pctx->clear = etna_clear; + pctx->clear_render_target = etna_clear_render_target; + pctx->clear_depth_stencil = etna_clear_depth_stencil; + pctx->resource_copy_region = etna_resource_copy_region; + pctx->blit = etna_blit; + pctx->flush_resource = etna_flush_resource; +} diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_clear_blit.h mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_clear_blit.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_clear_blit.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_clear_blit.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2012-2013 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + */ + +#ifndef H_ETNAVIV_CLEAR_BLIT +#define H_ETNAVIV_CLEAR_BLIT + +#include + +struct etna_context; +struct etna_surface; + +#include "pipe/p_context.h" + +void +etna_rs_gen_clear_surface(struct etna_context *ctx, struct etna_surface *surf, + uint32_t clear_value); + +void +etna_copy_resource(struct pipe_context *pctx, struct pipe_resource *dst, + struct pipe_resource *src, int first_level, int last_level); + +void +etna_clear_blit_init(struct pipe_context *pctx); + +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_compiler.c mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_compiler.c --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_compiler.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_compiler.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,2567 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + */ + +/* TGSI->Vivante shader ISA conversion */ + +/* What does the compiler return (see etna_shader_object)? + * 1) instruction data + * 2) input-to-temporary mapping (fixed for ps) + * *) in case of ps, semantic -> varying id mapping + * *) for each varying: number of components used (r, rg, rgb, rgba) + * 3) temporary-to-output mapping (in case of vs, fixed for ps) + * 4) for each input/output: possible semantic (position, color, glpointcoord, ...) + * 5) immediates base offset, immediates data + * 6) used texture units (and possibly the TGSI_TEXTURE_* type); not needed to + * configure the hw, but useful for error checking + * 7) enough information to add the z=(z+w)/2.0 necessary for older chips + * (output reg id is enough) + * + * Empty shaders are not allowed, should always at least generate a NOP. Also + * if there is a label at the end of the shader, an extra NOP should be + * generated as jump target. + * + * TODO + * * Use an instruction scheduler + * * Indirect access to uniforms / temporaries using amode + */ + +#include "etnaviv_compiler.h" + +#include "etnaviv_asm.h" +#include "etnaviv_context.h" +#include "etnaviv_debug.h" +#include "etnaviv_disasm.h" +#include "etnaviv_uniforms.h" +#include "etnaviv_util.h" + +#include "pipe/p_shader_tokens.h" +#include "tgsi/tgsi_info.h" +#include "tgsi/tgsi_iterate.h" +#include "tgsi/tgsi_lowering.h" +#include "tgsi/tgsi_strings.h" +#include "tgsi/tgsi_util.h" +#include "util/u_math.h" +#include "util/u_memory.h" + +#include +#include +#include +#include + +#define ETNA_MAX_INNER_TEMPS 2 + +static const float sincos_const[2][4] = { + { + 2., -1., 4., -4., + }, + { + 1. / (2. * M_PI), 0.75, 0.5, 0.0, + }, +}; + +/* Native register description structure */ +struct etna_native_reg { + unsigned valid : 1; + unsigned is_tex : 1; /* is texture unit, overrides rgroup */ + unsigned rgroup : 3; + unsigned id : 9; +}; + +/* Register description */ +struct etna_reg_desc { + enum tgsi_file_type file; /* IN, OUT, TEMP, ... */ + int idx; /* index into file */ + bool active; /* used in program */ + int first_use; /* instruction id of first use (scope begin) */ + int last_use; /* instruction id of last use (scope end, inclusive) */ + + struct etna_native_reg native; /* native register to map to */ + unsigned usage_mask : 4; /* usage, per channel */ + bool has_semantic; /* register has associated TGSI semantic */ + struct tgsi_declaration_semantic semantic; /* TGSI semantic */ + struct tgsi_declaration_interp interp; /* Interpolation type */ +}; + +/* Label information structure */ +struct etna_compile_label { + int inst_idx; /* Instruction id that label points to */ +}; + +enum etna_compile_frame_type { + ETNA_COMPILE_FRAME_IF, /* IF/ELSE/ENDIF */ + ETNA_COMPILE_FRAME_LOOP, +}; + +/* nesting scope frame (LOOP, IF, ...) during compilation + */ +struct etna_compile_frame { + enum etna_compile_frame_type type; + struct etna_compile_label *lbl_else; + struct etna_compile_label *lbl_endif; + struct etna_compile_label *lbl_loop_bgn; + struct etna_compile_label *lbl_loop_end; +}; + +struct etna_compile_file { + /* Number of registers in each TGSI file (max register+1) */ + size_t reg_size; + /* Register descriptions, per register index */ + struct etna_reg_desc *reg; +}; + +#define array_insert(arr, val) \ + do { \ + if (arr##_count == arr##_sz) { \ + arr##_sz = MAX2(2 * arr##_sz, 16); \ + arr = realloc(arr, arr##_sz * sizeof(arr[0])); \ + } \ + arr[arr##_count++] = val; \ + } while (0) + + +/* scratch area for compiling shader, freed after compilation finishes */ +struct etna_compile { + const struct tgsi_token *tokens; + bool free_tokens; + + struct tgsi_shader_info info; + + /* Register descriptions, per TGSI file, per register index */ + struct etna_compile_file file[TGSI_FILE_COUNT]; + + /* Keep track of TGSI register declarations */ + struct etna_reg_desc decl[ETNA_MAX_DECL]; + uint total_decls; + + /* Bitmap of dead instructions which are removed in a separate pass */ + bool dead_inst[ETNA_MAX_TOKENS]; + + /* Immediate data */ + enum etna_immediate_contents imm_contents[ETNA_MAX_IMM]; + uint32_t imm_data[ETNA_MAX_IMM]; + uint32_t imm_base; /* base of immediates (in 32 bit units) */ + uint32_t imm_size; /* size of immediates (in 32 bit units) */ + + /* Next free native register, for register allocation */ + uint32_t next_free_native; + + /* Temporary register for use within translated TGSI instruction, + * only allocated when needed. + */ + int inner_temps; /* number of inner temps used; only up to one available at + this point */ + struct etna_native_reg inner_temp[ETNA_MAX_INNER_TEMPS]; + + /* Fields for handling nested conditionals */ + struct etna_compile_frame frame_stack[ETNA_MAX_DEPTH]; + int frame_sp; + struct etna_compile_label *lbl_usage[ETNA_MAX_INSTRUCTIONS]; + + unsigned labels_count, labels_sz; + struct etna_compile_label *labels; + + /* Code generation */ + int inst_ptr; /* current instruction pointer */ + uint32_t code[ETNA_MAX_INSTRUCTIONS * ETNA_INST_SIZE]; + + /* I/O */ + + /* Number of varyings (PS only) */ + int num_varyings; + + /* GPU hardware specs */ + const struct etna_specs *specs; +}; + +static struct etna_reg_desc * +etna_get_dst_reg(struct etna_compile *c, struct tgsi_dst_register dst) +{ + return &c->file[dst.File].reg[dst.Index]; +} + +static struct etna_reg_desc * +etna_get_src_reg(struct etna_compile *c, struct tgsi_src_register src) +{ + return &c->file[src.File].reg[src.Index]; +} + +static struct etna_native_reg +etna_native_temp(unsigned reg) +{ + return (struct etna_native_reg) { + .valid = 1, + .rgroup = INST_RGROUP_TEMP, + .id = reg + }; +} + +/** Register allocation **/ +enum reg_sort_order { + FIRST_USE_ASC, + FIRST_USE_DESC, + LAST_USE_ASC, + LAST_USE_DESC +}; + +/* Augmented register description for sorting */ +struct sort_rec { + struct etna_reg_desc *ptr; + int key; +}; + +static int +sort_rec_compar(const struct sort_rec *a, const struct sort_rec *b) +{ + if (a->key < b->key) + return -1; + + if (a->key > b->key) + return 1; + + return 0; +} + +/* create an index on a register set based on certain criteria. */ +static int +sort_registers(struct sort_rec *sorted, struct etna_compile_file *file, + enum reg_sort_order so) +{ + struct etna_reg_desc *regs = file->reg; + int ptr = 0; + + /* pre-populate keys from active registers */ + for (int idx = 0; idx < file->reg_size; ++idx) { + /* only interested in active registers now; will only assign inactive ones + * if no space in active ones */ + if (regs[idx].active) { + sorted[ptr].ptr = ®s[idx]; + + switch (so) { + case FIRST_USE_ASC: + sorted[ptr].key = regs[idx].first_use; + break; + case LAST_USE_ASC: + sorted[ptr].key = regs[idx].last_use; + break; + case FIRST_USE_DESC: + sorted[ptr].key = -regs[idx].first_use; + break; + case LAST_USE_DESC: + sorted[ptr].key = -regs[idx].last_use; + break; + } + ptr++; + } + } + + /* sort index by key */ + qsort(sorted, ptr, sizeof(struct sort_rec), + (int (*)(const void *, const void *))sort_rec_compar); + + return ptr; +} + +/* Allocate a new, unused, native temp register */ +static struct etna_native_reg +alloc_new_native_reg(struct etna_compile *c) +{ + assert(c->next_free_native < ETNA_MAX_TEMPS); + return etna_native_temp(c->next_free_native++); +} + +/* assign TEMPs to native registers */ +static void +assign_temporaries_to_native(struct etna_compile *c, + struct etna_compile_file *file) +{ + struct etna_reg_desc *temps = file->reg; + + for (int idx = 0; idx < file->reg_size; ++idx) + temps[idx].native = alloc_new_native_reg(c); +} + +/* assign inputs and outputs to temporaries + * Gallium assumes that the hardware has separate registers for taking input and + * output, however Vivante GPUs use temporaries both for passing in inputs and + * passing back outputs. + * Try to re-use temporary registers where possible. */ +static void +assign_inouts_to_temporaries(struct etna_compile *c, uint file) +{ + bool mode_inputs = (file == TGSI_FILE_INPUT); + int inout_ptr = 0, num_inouts; + int temp_ptr = 0, num_temps; + struct sort_rec inout_order[ETNA_MAX_TEMPS]; + struct sort_rec temps_order[ETNA_MAX_TEMPS]; + num_inouts = sort_registers(inout_order, &c->file[file], + mode_inputs ? LAST_USE_ASC : FIRST_USE_ASC); + num_temps = sort_registers(temps_order, &c->file[TGSI_FILE_TEMPORARY], + mode_inputs ? FIRST_USE_ASC : LAST_USE_ASC); + + while (inout_ptr < num_inouts && temp_ptr < num_temps) { + struct etna_reg_desc *inout = inout_order[inout_ptr].ptr; + struct etna_reg_desc *temp = temps_order[temp_ptr].ptr; + + if (!inout->active || inout->native.valid) { /* Skip if already a native register assigned */ + inout_ptr++; + continue; + } + + /* last usage of this input is before or in same instruction of first use + * of temporary? */ + if (mode_inputs ? (inout->last_use <= temp->first_use) + : (inout->first_use >= temp->last_use)) { + /* assign it and advance to next input */ + inout->native = temp->native; + inout_ptr++; + } + + temp_ptr++; + } + + /* if we couldn't reuse current ones, allocate new temporaries */ + for (inout_ptr = 0; inout_ptr < num_inouts; ++inout_ptr) { + struct etna_reg_desc *inout = inout_order[inout_ptr].ptr; + + if (inout->active && !inout->native.valid) + inout->native = alloc_new_native_reg(c); + } +} + +/* Allocate an immediate with a certain value and return the index. If + * there is already an immediate with that value, return that. + */ +static struct etna_inst_src +alloc_imm(struct etna_compile *c, enum etna_immediate_contents contents, + uint32_t value) +{ + int idx; + + /* Could use a hash table to speed this up */ + for (idx = 0; idx < c->imm_size; ++idx) { + if (c->imm_contents[idx] == contents && c->imm_data[idx] == value) + break; + } + + /* look if there is an unused slot */ + if (idx == c->imm_size) { + for (idx = 0; idx < c->imm_size; ++idx) { + if (c->imm_contents[idx] == ETNA_IMMEDIATE_UNUSED) + break; + } + } + + /* allocate new immediate */ + if (idx == c->imm_size) { + assert(c->imm_size < ETNA_MAX_IMM); + idx = c->imm_size++; + c->imm_data[idx] = value; + c->imm_contents[idx] = contents; + } + + /* swizzle so that component with value is returned in all components */ + idx += c->imm_base; + struct etna_inst_src imm_src = { + .use = 1, + .rgroup = INST_RGROUP_UNIFORM_0, + .reg = idx / 4, + .swiz = INST_SWIZ_BROADCAST(idx & 3) + }; + + return imm_src; +} + +static struct etna_inst_src +alloc_imm_u32(struct etna_compile *c, uint32_t value) +{ + return alloc_imm(c, ETNA_IMMEDIATE_CONSTANT, value); +} + +static struct etna_inst_src +alloc_imm_vec4u(struct etna_compile *c, enum etna_immediate_contents contents, + const uint32_t *values) +{ + struct etna_inst_src imm_src = { }; + int idx, i; + + for (idx = 0; idx + 3 < c->imm_size; idx += 4) { + /* What if we can use a uniform with a different swizzle? */ + for (i = 0; i < 4; i++) + if (c->imm_contents[idx + i] != contents || c->imm_data[idx + i] != values[i]) + break; + if (i == 4) + break; + } + + if (idx + 3 >= c->imm_size) { + idx = align(c->imm_size, 4); + assert(idx + 4 <= ETNA_MAX_IMM); + + for (i = 0; i < 4; i++) { + c->imm_data[idx + i] = values[i]; + c->imm_contents[idx + i] = contents; + } + + c->imm_size = idx + 4; + } + + assert((c->imm_base & 3) == 0); + idx += c->imm_base; + imm_src.use = 1; + imm_src.rgroup = INST_RGROUP_UNIFORM_0; + imm_src.reg = idx / 4; + imm_src.swiz = INST_SWIZ_IDENTITY; + + return imm_src; +} + +static uint32_t +get_imm_u32(struct etna_compile *c, const struct etna_inst_src *imm, + unsigned swiz_idx) +{ + assert(imm->use == 1 && imm->rgroup == INST_RGROUP_UNIFORM_0); + unsigned int idx = imm->reg * 4 + ((imm->swiz >> (swiz_idx * 2)) & 3); + + return c->imm_data[idx]; +} + +/* Allocate immediate with a certain float value. If there is already an + * immediate with that value, return that. + */ +static struct etna_inst_src +alloc_imm_f32(struct etna_compile *c, float value) +{ + return alloc_imm_u32(c, fui(value)); +} + +static struct etna_inst_src +etna_imm_vec4f(struct etna_compile *c, const float *vec4) +{ + uint32_t val[4]; + + for (int i = 0; i < 4; i++) + val[i] = fui(vec4[i]); + + return alloc_imm_vec4u(c, ETNA_IMMEDIATE_CONSTANT, val); +} + +/* Pass -- check register file declarations and immediates */ +static void +etna_compile_parse_declarations(struct etna_compile *c) +{ + struct tgsi_parse_context ctx = { }; + unsigned status = TGSI_PARSE_OK; + status = tgsi_parse_init(&ctx, c->tokens); + assert(status == TGSI_PARSE_OK); + + while (!tgsi_parse_end_of_tokens(&ctx)) { + tgsi_parse_token(&ctx); + + switch (ctx.FullToken.Token.Type) { + case TGSI_TOKEN_TYPE_IMMEDIATE: { + /* immediates are handled differently from other files; they are + * not declared explicitly, and always add four components */ + const struct tgsi_full_immediate *imm = &ctx.FullToken.FullImmediate; + assert(c->imm_size <= (ETNA_MAX_IMM - 4)); + + for (int i = 0; i < 4; ++i) { + unsigned idx = c->imm_size++; + + c->imm_data[idx] = imm->u[i].Uint; + c->imm_contents[idx] = ETNA_IMMEDIATE_CONSTANT; + } + } + break; + } + } + + tgsi_parse_free(&ctx); +} + +/* Allocate register declarations for the registers in all register files */ +static void +etna_allocate_decls(struct etna_compile *c) +{ + uint idx = 0; + + for (int x = 0; x < TGSI_FILE_COUNT; ++x) { + c->file[x].reg = &c->decl[idx]; + c->file[x].reg_size = c->info.file_max[x] + 1; + + for (int sub = 0; sub < c->file[x].reg_size; ++sub) { + c->decl[idx].file = x; + c->decl[idx].idx = sub; + idx++; + } + } + + c->total_decls = idx; +} + +/* Pass -- check and record usage of temporaries, inputs, outputs */ +static void +etna_compile_pass_check_usage(struct etna_compile *c) +{ + struct tgsi_parse_context ctx = { }; + unsigned status = TGSI_PARSE_OK; + status = tgsi_parse_init(&ctx, c->tokens); + assert(status == TGSI_PARSE_OK); + + for (int idx = 0; idx < c->total_decls; ++idx) { + c->decl[idx].active = false; + c->decl[idx].first_use = c->decl[idx].last_use = -1; + } + + int inst_idx = 0; + while (!tgsi_parse_end_of_tokens(&ctx)) { + tgsi_parse_token(&ctx); + /* find out max register #s used + * For every register mark first and last instruction index where it's + * used this allows finding ranges where the temporary can be borrowed + * as input and/or output register + * + * XXX in the case of loops this needs special care, or even be completely + * disabled, as + * the last usage of a register inside a loop means it can still be used + * on next loop + * iteration (execution is no longer * chronological). The register can + * only be + * declared "free" after the loop finishes. + * + * Same for inputs: the first usage of a register inside a loop doesn't + * mean that the register + * won't have been overwritten in previous iteration. The register can + * only be declared free before the loop + * starts. + * The proper way would be to do full dominator / post-dominator analysis + * (especially with more complicated + * control flow such as direct branch instructions) but not for now... + */ + switch (ctx.FullToken.Token.Type) { + case TGSI_TOKEN_TYPE_DECLARATION: { + /* Declaration: fill in file details */ + const struct tgsi_full_declaration *decl = &ctx.FullToken.FullDeclaration; + struct etna_compile_file *file = &c->file[decl->Declaration.File]; + + for (int idx = decl->Range.First; idx <= decl->Range.Last; ++idx) { + file->reg[idx].usage_mask = 0; // we'll compute this ourselves + file->reg[idx].has_semantic = decl->Declaration.Semantic; + file->reg[idx].semantic = decl->Semantic; + file->reg[idx].interp = decl->Interp; + } + } break; + case TGSI_TOKEN_TYPE_INSTRUCTION: { + /* Instruction: iterate over operands of instruction */ + const struct tgsi_full_instruction *inst = &ctx.FullToken.FullInstruction; + + /* iterate over destination registers */ + for (int idx = 0; idx < inst->Instruction.NumDstRegs; ++idx) { + struct etna_reg_desc *reg_desc = &c->file[inst->Dst[idx].Register.File].reg[inst->Dst[idx].Register.Index]; + + if (reg_desc->first_use == -1) + reg_desc->first_use = inst_idx; + + reg_desc->last_use = inst_idx; + reg_desc->active = true; + } + + /* iterate over source registers */ + for (int idx = 0; idx < inst->Instruction.NumSrcRegs; ++idx) { + struct etna_reg_desc *reg_desc = &c->file[inst->Src[idx].Register.File].reg[inst->Src[idx].Register.Index]; + + if (reg_desc->first_use == -1) + reg_desc->first_use = inst_idx; + + reg_desc->last_use = inst_idx; + reg_desc->active = true; + /* accumulate usage mask for register, this is used to determine how + * many slots for varyings + * should be allocated */ + reg_desc->usage_mask |= tgsi_util_get_inst_usage_mask(inst, idx); + } + inst_idx += 1; + } break; + default: + break; + } + } + + tgsi_parse_free(&ctx); +} + +/* assign inputs that need to be assigned to specific registers */ +static void +assign_special_inputs(struct etna_compile *c) +{ + if (c->info.processor == PIPE_SHADER_FRAGMENT) { + /* never assign t0 as it is the position output, start assigning at t1 */ + c->next_free_native = 1; + + /* hardwire TGSI_SEMANTIC_POSITION (input and output) to t0 */ + for (int idx = 0; idx < c->total_decls; ++idx) { + struct etna_reg_desc *reg = &c->decl[idx]; + + if (reg->active && reg->semantic.Name == TGSI_SEMANTIC_POSITION) + reg->native = etna_native_temp(0); + } + } +} + +/* Check that a move instruction does not swizzle any of the components + * that it writes. + */ +static bool +etna_mov_check_no_swizzle(const struct tgsi_dst_register dst, + const struct tgsi_src_register src) +{ + return (!(dst.WriteMask & TGSI_WRITEMASK_X) || src.SwizzleX == TGSI_SWIZZLE_X) && + (!(dst.WriteMask & TGSI_WRITEMASK_Y) || src.SwizzleY == TGSI_SWIZZLE_Y) && + (!(dst.WriteMask & TGSI_WRITEMASK_Z) || src.SwizzleZ == TGSI_SWIZZLE_Z) && + (!(dst.WriteMask & TGSI_WRITEMASK_W) || src.SwizzleW == TGSI_SWIZZLE_W); +} + +/* Pass -- optimize outputs + * Mesa tends to generate code like this at the end if their shaders + * MOV OUT[1], TEMP[2] + * MOV OUT[0], TEMP[0] + * MOV OUT[2], TEMP[1] + * Recognize if + * a) there is only a single assignment to an output register and + * b) the temporary is not used after that + * Also recognize direct assignment of IN to OUT (passthrough) + **/ +static void +etna_compile_pass_optimize_outputs(struct etna_compile *c) +{ + struct tgsi_parse_context ctx = { }; + int inst_idx = 0; + unsigned status = TGSI_PARSE_OK; + status = tgsi_parse_init(&ctx, c->tokens); + assert(status == TGSI_PARSE_OK); + + while (!tgsi_parse_end_of_tokens(&ctx)) { + tgsi_parse_token(&ctx); + + switch (ctx.FullToken.Token.Type) { + case TGSI_TOKEN_TYPE_INSTRUCTION: { + const struct tgsi_full_instruction *inst = &ctx.FullToken.FullInstruction; + + /* iterate over operands */ + switch (inst->Instruction.Opcode) { + case TGSI_OPCODE_MOV: { + /* We are only interested in eliminating MOVs which write to + * the shader outputs. Test for this early. */ + if (inst->Dst[0].Register.File != TGSI_FILE_OUTPUT) + break; + /* Elimination of a MOV must have no visible effect on the + * resulting shader: this means the MOV must not swizzle or + * saturate, and its source must not have the negate or + * absolute modifiers. */ + if (!etna_mov_check_no_swizzle(inst->Dst[0].Register, inst->Src[0].Register) || + inst->Instruction.Saturate || inst->Src[0].Register.Negate || + inst->Src[0].Register.Absolute) + break; + + uint out_idx = inst->Dst[0].Register.Index; + uint in_idx = inst->Src[0].Register.Index; + /* assignment of temporary to output -- + * and the output doesn't yet have a native register assigned + * and the last use of the temporary is this instruction + * and the MOV does not do a swizzle + */ + if (inst->Src[0].Register.File == TGSI_FILE_TEMPORARY && + !c->file[TGSI_FILE_OUTPUT].reg[out_idx].native.valid && + c->file[TGSI_FILE_TEMPORARY].reg[in_idx].last_use == inst_idx) { + c->file[TGSI_FILE_OUTPUT].reg[out_idx].native = + c->file[TGSI_FILE_TEMPORARY].reg[in_idx].native; + /* prevent temp from being re-used for the rest of the shader */ + c->file[TGSI_FILE_TEMPORARY].reg[in_idx].last_use = ETNA_MAX_TOKENS; + /* mark this MOV instruction as a no-op */ + c->dead_inst[inst_idx] = true; + } + /* direct assignment of input to output -- + * and the input or output doesn't yet have a native register + * assigned + * and the output is only used in this instruction, + * allocate a new register, and associate both input and output to + * it + * and the MOV does not do a swizzle + */ + if (inst->Src[0].Register.File == TGSI_FILE_INPUT && + !c->file[TGSI_FILE_INPUT].reg[in_idx].native.valid && + !c->file[TGSI_FILE_OUTPUT].reg[out_idx].native.valid && + c->file[TGSI_FILE_OUTPUT].reg[out_idx].last_use == inst_idx && + c->file[TGSI_FILE_OUTPUT].reg[out_idx].first_use == inst_idx) { + c->file[TGSI_FILE_OUTPUT].reg[out_idx].native = + c->file[TGSI_FILE_INPUT].reg[in_idx].native = + alloc_new_native_reg(c); + /* mark this MOV instruction as a no-op */ + c->dead_inst[inst_idx] = true; + } + } break; + default:; + } + inst_idx += 1; + } break; + } + } + + tgsi_parse_free(&ctx); +} + +/* Get a temporary to be used within one TGSI instruction. + * The first time that this function is called the temporary will be allocated. + * Each call to this function will return the same temporary. + */ +static struct etna_native_reg +etna_compile_get_inner_temp(struct etna_compile *c) +{ + int inner_temp = c->inner_temps; + + if (inner_temp < ETNA_MAX_INNER_TEMPS) { + if (!c->inner_temp[inner_temp].valid) + c->inner_temp[inner_temp] = alloc_new_native_reg(c); + + /* alloc_new_native_reg() handles lack of registers */ + c->inner_temps += 1; + } else { + BUG("Too many inner temporaries (%i) requested in one instruction", + inner_temp + 1); + } + + return c->inner_temp[inner_temp]; +} + +static struct etna_inst_dst +etna_native_to_dst(struct etna_native_reg native, unsigned comps) +{ + /* Can only assign to temporaries */ + assert(native.valid && !native.is_tex && native.rgroup == INST_RGROUP_TEMP); + + struct etna_inst_dst rv = { + .comps = comps, + .use = 1, + .reg = native.id, + }; + + return rv; +} + +static struct etna_inst_src +etna_native_to_src(struct etna_native_reg native, uint32_t swizzle) +{ + assert(native.valid && !native.is_tex); + + struct etna_inst_src rv = { + .use = 1, + .swiz = swizzle, + .rgroup = native.rgroup, + .reg = native.id, + .amode = INST_AMODE_DIRECT, + }; + + return rv; +} + +static inline struct etna_inst_src +negate(struct etna_inst_src src) +{ + src.neg = !src.neg; + + return src; +} + +static inline struct etna_inst_src +absolute(struct etna_inst_src src) +{ + src.abs = 1; + + return src; +} + +static inline struct etna_inst_src +swizzle(struct etna_inst_src src, unsigned swizzle) +{ + src.swiz = inst_swiz_compose(src.swiz, swizzle); + + return src; +} + +/* Emit instruction and append it to program */ +static void +emit_inst(struct etna_compile *c, struct etna_inst *inst) +{ + assert(c->inst_ptr <= ETNA_MAX_INSTRUCTIONS); + + /* Check for uniform conflicts (each instruction can only access one + * uniform), + * if detected, use an intermediate temporary */ + unsigned uni_rgroup = -1; + unsigned uni_reg = -1; + + for (int src = 0; src < ETNA_NUM_SRC; ++src) { + if (etna_rgroup_is_uniform(inst->src[src].rgroup)) { + if (uni_reg == -1) { /* first unique uniform used */ + uni_rgroup = inst->src[src].rgroup; + uni_reg = inst->src[src].reg; + } else { /* second or later; check that it is a re-use */ + if (uni_rgroup != inst->src[src].rgroup || + uni_reg != inst->src[src].reg) { + DBG_F(ETNA_DBG_COMPILER_MSGS, "perf warning: instruction that " + "accesses different uniforms, " + "need to generate extra MOV"); + struct etna_native_reg inner_temp = etna_compile_get_inner_temp(c); + + /* Generate move instruction to temporary */ + etna_assemble(&c->code[c->inst_ptr * 4], &(struct etna_inst) { + .opcode = INST_OPCODE_MOV, + .dst = etna_native_to_dst(inner_temp, INST_COMPS_X | INST_COMPS_Y | + INST_COMPS_Z | INST_COMPS_W), + .src[2] = inst->src[src] + }); + + c->inst_ptr++; + + /* Modify instruction to use temp register instead of uniform */ + inst->src[src].use = 1; + inst->src[src].rgroup = INST_RGROUP_TEMP; + inst->src[src].reg = inner_temp.id; + inst->src[src].swiz = INST_SWIZ_IDENTITY; /* swizzling happens on MOV */ + inst->src[src].neg = 0; /* negation happens on MOV */ + inst->src[src].abs = 0; /* abs happens on MOV */ + inst->src[src].amode = 0; /* amode effects happen on MOV */ + } + } + } + } + + /* Finally assemble the actual instruction */ + etna_assemble(&c->code[c->inst_ptr * 4], inst); + c->inst_ptr++; +} + +static unsigned int +etna_amode(struct tgsi_ind_register indirect) +{ + assert(indirect.File == TGSI_FILE_ADDRESS); + assert(indirect.Index == 0); + + switch (indirect.Swizzle) { + case TGSI_SWIZZLE_X: + return INST_AMODE_ADD_A_X; + case TGSI_SWIZZLE_Y: + return INST_AMODE_ADD_A_Y; + case TGSI_SWIZZLE_Z: + return INST_AMODE_ADD_A_Z; + case TGSI_SWIZZLE_W: + return INST_AMODE_ADD_A_W; + default: + assert(!"Invalid swizzle"); + } +} + +/* convert destination operand */ +static struct etna_inst_dst +convert_dst(struct etna_compile *c, const struct tgsi_full_dst_register *in) +{ + struct etna_inst_dst rv = { + /// XXX .amode + .comps = in->Register.WriteMask, + }; + + if (in->Register.File == TGSI_FILE_ADDRESS) { + assert(in->Register.Index == 0); + rv.reg = in->Register.Index; + rv.use = 0; + } else { + rv = etna_native_to_dst(etna_get_dst_reg(c, in->Register)->native, + in->Register.WriteMask); + } + + if (in->Register.Indirect) + rv.amode = etna_amode(in->Indirect); + + return rv; +} + +/* convert texture operand */ +static struct etna_inst_tex +convert_tex(struct etna_compile *c, const struct tgsi_full_src_register *in, + const struct tgsi_instruction_texture *tex) +{ + struct etna_native_reg native_reg = etna_get_src_reg(c, in->Register)->native; + struct etna_inst_tex rv = { + // XXX .amode (to allow for an array of samplers?) + .swiz = INST_SWIZ_IDENTITY + }; + + assert(native_reg.is_tex && native_reg.valid); + rv.id = native_reg.id; + + return rv; +} + +/* convert source operand */ +static struct etna_inst_src +etna_create_src(const struct tgsi_full_src_register *tgsi, + const struct etna_native_reg *native) +{ + const struct tgsi_src_register *reg = &tgsi->Register; + struct etna_inst_src rv = { + .use = 1, + .swiz = INST_SWIZ(reg->SwizzleX, reg->SwizzleY, reg->SwizzleZ, reg->SwizzleW), + .neg = reg->Negate, + .abs = reg->Absolute, + .rgroup = native->rgroup, + .reg = native->id, + .amode = INST_AMODE_DIRECT, + }; + + assert(native->valid && !native->is_tex); + + if (reg->Indirect) + rv.amode = etna_amode(tgsi->Indirect); + + return rv; +} + +static struct etna_inst_src +etna_mov_src_to_temp(struct etna_compile *c, struct etna_inst_src src, + struct etna_native_reg temp) +{ + struct etna_inst mov = { }; + + mov.opcode = INST_OPCODE_MOV; + mov.sat = 0; + mov.dst = etna_native_to_dst(temp, INST_COMPS_X | INST_COMPS_Y | + INST_COMPS_Z | INST_COMPS_W); + mov.src[2] = src; + emit_inst(c, &mov); + + src.swiz = INST_SWIZ_IDENTITY; + src.neg = src.abs = 0; + src.rgroup = temp.rgroup; + src.reg = temp.id; + + return src; +} + +static struct etna_inst_src +etna_mov_src(struct etna_compile *c, struct etna_inst_src src) +{ + struct etna_native_reg temp = etna_compile_get_inner_temp(c); + + return etna_mov_src_to_temp(c, src, temp); +} + +static bool +etna_src_uniforms_conflict(struct etna_inst_src a, struct etna_inst_src b) +{ + return etna_rgroup_is_uniform(a.rgroup) && + etna_rgroup_is_uniform(b.rgroup) && + (a.rgroup != b.rgroup || a.reg != b.reg); +} + +/* create a new label */ +static struct etna_compile_label * +alloc_new_label(struct etna_compile *c) +{ + struct etna_compile_label label = { + .inst_idx = -1, /* start by point to no specific instruction */ + }; + + array_insert(c->labels, label); + + return &c->labels[c->labels_count - 1]; +} + +/* place label at current instruction pointer */ +static void +label_place(struct etna_compile *c, struct etna_compile_label *label) +{ + label->inst_idx = c->inst_ptr; +} + +/* mark label use at current instruction. + * target of the label will be filled in in the marked instruction's src2.imm + * slot as soon + * as the value becomes known. + */ +static void +label_mark_use(struct etna_compile *c, struct etna_compile_label *label) +{ + assert(c->inst_ptr < ETNA_MAX_INSTRUCTIONS); + c->lbl_usage[c->inst_ptr] = label; +} + +/* walk the frame stack and return first frame with matching type */ +static struct etna_compile_frame * +find_frame(struct etna_compile *c, enum etna_compile_frame_type type) +{ + for (int sp = c->frame_sp; sp >= 0; sp--) + if (c->frame_stack[sp].type == type) + return &c->frame_stack[sp]; + + assert(0); + return NULL; +} + +struct instr_translater { + void (*fxn)(const struct instr_translater *t, struct etna_compile *c, + const struct tgsi_full_instruction *inst, + struct etna_inst_src *src); + unsigned tgsi_opc; + uint8_t opc; + + /* tgsi src -> etna src swizzle */ + int src[3]; + + unsigned cond; +}; + +static void +trans_instr(const struct instr_translater *t, struct etna_compile *c, + const struct tgsi_full_instruction *inst, struct etna_inst_src *src) +{ + const struct tgsi_opcode_info *info = tgsi_get_opcode_info(inst->Instruction.Opcode); + struct etna_inst instr = { }; + + instr.opcode = t->opc; + instr.cond = t->cond; + instr.sat = inst->Instruction.Saturate; + + assert(info->num_dst <= 1); + if (info->num_dst) + instr.dst = convert_dst(c, &inst->Dst[0]); + + assert(info->num_src <= ETNA_NUM_SRC); + + for (unsigned i = 0; i < info->num_src; i++) { + int swizzle = t->src[i]; + + assert(swizzle != -1); + instr.src[swizzle] = src[i]; + } + + emit_inst(c, &instr); +} + +static void +trans_min_max(const struct instr_translater *t, struct etna_compile *c, + const struct tgsi_full_instruction *inst, + struct etna_inst_src *src) +{ + emit_inst(c, &(struct etna_inst) { + .opcode = INST_OPCODE_SELECT, + .cond = t->cond, + .sat = inst->Instruction.Saturate, + .dst = convert_dst(c, &inst->Dst[0]), + .src[0] = src[0], + .src[1] = src[1], + .src[2] = src[0], + }); +} + +static void +trans_if(const struct instr_translater *t, struct etna_compile *c, + const struct tgsi_full_instruction *inst, struct etna_inst_src *src) +{ + struct etna_compile_frame *f = &c->frame_stack[c->frame_sp++]; + struct etna_inst_src imm_0 = alloc_imm_f32(c, 0.0f); + + /* push IF to stack */ + f->type = ETNA_COMPILE_FRAME_IF; + /* create "else" label */ + f->lbl_else = alloc_new_label(c); + f->lbl_endif = NULL; + + /* We need to avoid the emit_inst() below becoming two instructions */ + if (etna_src_uniforms_conflict(src[0], imm_0)) + src[0] = etna_mov_src(c, src[0]); + + /* mark position in instruction stream of label reference so that it can be + * filled in in next pass */ + label_mark_use(c, f->lbl_else); + + /* create conditional branch to label if src0 EQ 0 */ + emit_inst(c, &(struct etna_inst){ + .opcode = INST_OPCODE_BRANCH, + .cond = INST_CONDITION_EQ, + .src[0] = src[0], + .src[1] = imm_0, + /* imm is filled in later */ + }); +} + +static void +trans_else(const struct instr_translater *t, struct etna_compile *c, + const struct tgsi_full_instruction *inst, struct etna_inst_src *src) +{ + assert(c->frame_sp > 0); + struct etna_compile_frame *f = &c->frame_stack[c->frame_sp - 1]; + assert(f->type == ETNA_COMPILE_FRAME_IF); + + /* create "endif" label, and branch to endif label */ + f->lbl_endif = alloc_new_label(c); + label_mark_use(c, f->lbl_endif); + emit_inst(c, &(struct etna_inst) { + .opcode = INST_OPCODE_BRANCH, + .cond = INST_CONDITION_TRUE, + /* imm is filled in later */ + }); + + /* mark "else" label at this position in instruction stream */ + label_place(c, f->lbl_else); +} + +static void +trans_endif(const struct instr_translater *t, struct etna_compile *c, + const struct tgsi_full_instruction *inst, struct etna_inst_src *src) +{ + assert(c->frame_sp > 0); + struct etna_compile_frame *f = &c->frame_stack[--c->frame_sp]; + assert(f->type == ETNA_COMPILE_FRAME_IF); + + /* assign "endif" or "else" (if no ELSE) label to current position in + * instruction stream, pop IF */ + if (f->lbl_endif != NULL) + label_place(c, f->lbl_endif); + else + label_place(c, f->lbl_else); +} + +static void +trans_loop_bgn(const struct instr_translater *t, struct etna_compile *c, + const struct tgsi_full_instruction *inst, + struct etna_inst_src *src) +{ + struct etna_compile_frame *f = &c->frame_stack[c->frame_sp++]; + + /* push LOOP to stack */ + f->type = ETNA_COMPILE_FRAME_LOOP; + f->lbl_loop_bgn = alloc_new_label(c); + f->lbl_loop_end = alloc_new_label(c); + + label_place(c, f->lbl_loop_bgn); +} + +static void +trans_loop_end(const struct instr_translater *t, struct etna_compile *c, + const struct tgsi_full_instruction *inst, + struct etna_inst_src *src) +{ + assert(c->frame_sp > 0); + struct etna_compile_frame *f = &c->frame_stack[--c->frame_sp]; + assert(f->type == ETNA_COMPILE_FRAME_LOOP); + + /* mark position in instruction stream of label reference so that it can be + * filled in in next pass */ + label_mark_use(c, f->lbl_loop_bgn); + + /* create branch to loop_bgn label */ + emit_inst(c, &(struct etna_inst) { + .opcode = INST_OPCODE_BRANCH, + .cond = INST_CONDITION_TRUE, + .src[0] = src[0], + /* imm is filled in later */ + }); + + label_place(c, f->lbl_loop_end); +} + +static void +trans_brk(const struct instr_translater *t, struct etna_compile *c, + const struct tgsi_full_instruction *inst, struct etna_inst_src *src) +{ + assert(c->frame_sp > 0); + struct etna_compile_frame *f = find_frame(c, ETNA_COMPILE_FRAME_LOOP); + + /* mark position in instruction stream of label reference so that it can be + * filled in in next pass */ + label_mark_use(c, f->lbl_loop_end); + + /* create branch to loop_end label */ + emit_inst(c, &(struct etna_inst) { + .opcode = INST_OPCODE_BRANCH, + .cond = INST_CONDITION_TRUE, + .src[0] = src[0], + /* imm is filled in later */ + }); +} + +static void +trans_cont(const struct instr_translater *t, struct etna_compile *c, + const struct tgsi_full_instruction *inst, struct etna_inst_src *src) +{ + assert(c->frame_sp > 0); + struct etna_compile_frame *f = find_frame(c, ETNA_COMPILE_FRAME_LOOP); + + /* mark position in instruction stream of label reference so that it can be + * filled in in next pass */ + label_mark_use(c, f->lbl_loop_bgn); + + /* create branch to loop_end label */ + emit_inst(c, &(struct etna_inst) { + .opcode = INST_OPCODE_BRANCH, + .cond = INST_CONDITION_TRUE, + .src[0] = src[0], + /* imm is filled in later */ + }); +} + +static void +trans_deriv(const struct instr_translater *t, struct etna_compile *c, + const struct tgsi_full_instruction *inst, struct etna_inst_src *src) +{ + emit_inst(c, &(struct etna_inst) { + .opcode = t->opc, + .sat = inst->Instruction.Saturate, + .dst = convert_dst(c, &inst->Dst[0]), + .src[0] = src[0], + .src[2] = src[0], + }); +} + +static void +trans_arl(const struct instr_translater *t, struct etna_compile *c, + const struct tgsi_full_instruction *inst, struct etna_inst_src *src) +{ + struct etna_native_reg temp = etna_compile_get_inner_temp(c); + struct etna_inst arl = { }; + struct etna_inst_dst dst; + + dst = etna_native_to_dst(temp, INST_COMPS_X | INST_COMPS_Y | INST_COMPS_Z | + INST_COMPS_W); + + if (c->specs->has_sign_floor_ceil) { + struct etna_inst floor = { }; + + floor.opcode = INST_OPCODE_FLOOR; + floor.src[2] = src[0]; + floor.dst = dst; + + emit_inst(c, &floor); + } else { + struct etna_inst floor[2] = { }; + + floor[0].opcode = INST_OPCODE_FRC; + floor[0].sat = inst->Instruction.Saturate; + floor[0].dst = dst; + floor[0].src[2] = src[0]; + + floor[1].opcode = INST_OPCODE_ADD; + floor[1].sat = inst->Instruction.Saturate; + floor[1].dst = dst; + floor[1].src[0] = src[0]; + floor[1].src[2].use = 1; + floor[1].src[2].swiz = INST_SWIZ_IDENTITY; + floor[1].src[2].neg = 1; + floor[1].src[2].rgroup = temp.rgroup; + floor[1].src[2].reg = temp.id; + + emit_inst(c, &floor[0]); + emit_inst(c, &floor[1]); + } + + arl.opcode = INST_OPCODE_MOVAR; + arl.sat = inst->Instruction.Saturate; + arl.dst = convert_dst(c, &inst->Dst[0]); + arl.src[2] = etna_native_to_src(temp, INST_SWIZ_IDENTITY); + + emit_inst(c, &arl); +} + +static void +trans_lrp(const struct instr_translater *t, struct etna_compile *c, + const struct tgsi_full_instruction *inst, struct etna_inst_src *src) +{ + /* dst = src0 * src1 + (1 - src0) * src2 + * => src0 * src1 - (src0 - 1) * src2 + * => src0 * src1 - (src0 * src2 - src2) + * MAD tTEMP.xyzw, tSRC0.xyzw, tSRC2.xyzw, -tSRC2.xyzw + * MAD tDST.xyzw, tSRC0.xyzw, tSRC1.xyzw, -tTEMP.xyzw + */ + struct etna_native_reg temp = etna_compile_get_inner_temp(c); + if (etna_src_uniforms_conflict(src[0], src[1]) || + etna_src_uniforms_conflict(src[0], src[2])) { + src[0] = etna_mov_src(c, src[0]); + } + + struct etna_inst mad[2] = { }; + mad[0].opcode = INST_OPCODE_MAD; + mad[0].sat = 0; + mad[0].dst = etna_native_to_dst(temp, INST_COMPS_X | INST_COMPS_Y | + INST_COMPS_Z | INST_COMPS_W); + mad[0].src[0] = src[0]; + mad[0].src[1] = src[2]; + mad[0].src[2] = negate(src[2]); + mad[1].opcode = INST_OPCODE_MAD; + mad[1].sat = inst->Instruction.Saturate; + mad[1].dst = convert_dst(c, &inst->Dst[0]), mad[1].src[0] = src[0]; + mad[1].src[1] = src[1]; + mad[1].src[2] = negate(etna_native_to_src(temp, INST_SWIZ_IDENTITY)); + + emit_inst(c, &mad[0]); + emit_inst(c, &mad[1]); +} + +static void +trans_lit(const struct instr_translater *t, struct etna_compile *c, + const struct tgsi_full_instruction *inst, struct etna_inst_src *src) +{ + /* SELECT.LT tmp._y__, 0, src.yyyy, 0 + * - can be eliminated if src.y is a uniform and >= 0 + * SELECT.GT tmp.___w, 128, src.wwww, 128 + * SELECT.LT tmp.___w, -128, tmp.wwww, -128 + * - can be eliminated if src.w is a uniform and fits clamp + * LOG tmp.x, void, void, tmp.yyyy + * MUL tmp.x, tmp.xxxx, tmp.wwww, void + * LITP dst, undef, src.xxxx, tmp.xxxx + */ + struct etna_native_reg inner_temp = etna_compile_get_inner_temp(c); + struct etna_inst_src src_y = { }; + + if (!etna_rgroup_is_uniform(src[0].rgroup)) { + src_y = etna_native_to_src(inner_temp, SWIZZLE(Y, Y, Y, Y)); + + struct etna_inst ins = { }; + ins.opcode = INST_OPCODE_SELECT; + ins.cond = INST_CONDITION_LT; + ins.dst = etna_native_to_dst(inner_temp, INST_COMPS_Y); + ins.src[0] = ins.src[2] = alloc_imm_f32(c, 0.0); + ins.src[1] = swizzle(src[0], SWIZZLE(Y, Y, Y, Y)); + emit_inst(c, &ins); + } else if (uif(get_imm_u32(c, &src[0], 1)) < 0) + src_y = alloc_imm_f32(c, 0.0); + else + src_y = swizzle(src[0], SWIZZLE(Y, Y, Y, Y)); + + struct etna_inst_src src_w = { }; + + if (!etna_rgroup_is_uniform(src[0].rgroup)) { + src_w = etna_native_to_src(inner_temp, SWIZZLE(W, W, W, W)); + + struct etna_inst ins = { }; + ins.opcode = INST_OPCODE_SELECT; + ins.cond = INST_CONDITION_GT; + ins.dst = etna_native_to_dst(inner_temp, INST_COMPS_W); + ins.src[0] = ins.src[2] = alloc_imm_f32(c, 128.); + ins.src[1] = swizzle(src[0], SWIZZLE(W, W, W, W)); + emit_inst(c, &ins); + ins.cond = INST_CONDITION_LT; + ins.src[0].neg = !ins.src[0].neg; + ins.src[2].neg = !ins.src[2].neg; + ins.src[1] = src_w; + emit_inst(c, &ins); + } else if (uif(get_imm_u32(c, &src[0], 3)) < -128.) + src_w = alloc_imm_f32(c, -128.); + else if (uif(get_imm_u32(c, &src[0], 3)) > 128.) + src_w = alloc_imm_f32(c, 128.); + else + src_w = swizzle(src[0], SWIZZLE(W, W, W, W)); + + struct etna_inst ins[3] = { }; + ins[0].opcode = INST_OPCODE_LOG; + ins[0].dst = etna_native_to_dst(inner_temp, INST_COMPS_X); + ins[0].src[2] = src_y; + + emit_inst(c, &ins[0]); + emit_inst(c, &(struct etna_inst) { + .opcode = INST_OPCODE_MUL, + .sat = 0, + .dst = etna_native_to_dst(inner_temp, INST_COMPS_X), + .src[0] = etna_native_to_src(inner_temp, SWIZZLE(X, X, X, X)), + .src[1] = src_w, + }); + emit_inst(c, &(struct etna_inst) { + .opcode = INST_OPCODE_LITP, + .sat = 0, + .dst = convert_dst(c, &inst->Dst[0]), + .src[0] = swizzle(src[0], SWIZZLE(X, X, X, X)), + .src[1] = swizzle(src[0], SWIZZLE(X, X, X, X)), + .src[2] = etna_native_to_src(inner_temp, SWIZZLE(X, X, X, X)), + }); +} + +static void +trans_ssg(const struct instr_translater *t, struct etna_compile *c, + const struct tgsi_full_instruction *inst, struct etna_inst_src *src) +{ + if (c->specs->has_sign_floor_ceil) { + emit_inst(c, &(struct etna_inst){ + .opcode = INST_OPCODE_SIGN, + .sat = inst->Instruction.Saturate, + .dst = convert_dst(c, &inst->Dst[0]), + .src[2] = src[0], + }); + } else { + struct etna_native_reg temp = etna_compile_get_inner_temp(c); + struct etna_inst ins[2] = { }; + + ins[0].opcode = INST_OPCODE_SET; + ins[0].cond = INST_CONDITION_NZ; + ins[0].dst = etna_native_to_dst(temp, INST_COMPS_X | INST_COMPS_Y | + INST_COMPS_Z | INST_COMPS_W); + ins[0].src[0] = src[0]; + + ins[1].opcode = INST_OPCODE_SELECT; + ins[1].cond = INST_CONDITION_LZ; + ins[1].sat = inst->Instruction.Saturate; + ins[1].dst = convert_dst(c, &inst->Dst[0]); + ins[1].src[0] = src[0]; + ins[1].src[2] = etna_native_to_src(temp, INST_SWIZ_IDENTITY); + ins[1].src[1] = negate(ins[1].src[2]); + + emit_inst(c, &ins[0]); + emit_inst(c, &ins[1]); + } +} + +static void +trans_trig(const struct instr_translater *t, struct etna_compile *c, + const struct tgsi_full_instruction *inst, struct etna_inst_src *src) +{ + if (c->specs->has_new_sin_cos) { /* Alternative SIN/COS */ + /* On newer chips alternative SIN/COS instructions are implemented, + * which: + * - Need their input scaled by 1/pi instead of 2/pi + * - Output an x and y component, which need to be multiplied to + * get the result + */ + /* TGSI lowering should deal with SCS */ + assert(inst->Instruction.Opcode != TGSI_OPCODE_SCS); + + struct etna_native_reg temp = etna_compile_get_inner_temp(c); /* only using .xyz */ + emit_inst(c, &(struct etna_inst) { + .opcode = INST_OPCODE_MUL, + .sat = 0, + .dst = etna_native_to_dst(temp, INST_COMPS_Z), + .src[0] = src[0], /* any swizzling happens here */ + .src[1] = alloc_imm_f32(c, 1.0f / M_PI), + }); + emit_inst(c, &(struct etna_inst) { + .opcode = inst->Instruction.Opcode == TGSI_OPCODE_COS + ? INST_OPCODE_COS + : INST_OPCODE_SIN, + .sat = 0, + .dst = etna_native_to_dst(temp, INST_COMPS_X | INST_COMPS_Y), + .src[2] = etna_native_to_src(temp, SWIZZLE(Z, Z, Z, Z)), + .tex = { .amode=1 }, /* Unknown bit needs to be set */ + }); + emit_inst(c, &(struct etna_inst) { + .opcode = INST_OPCODE_MUL, + .sat = inst->Instruction.Saturate, + .dst = convert_dst(c, &inst->Dst[0]), + .src[0] = etna_native_to_src(temp, SWIZZLE(X, X, X, X)), + .src[1] = etna_native_to_src(temp, SWIZZLE(Y, Y, Y, Y)), + }); + + } else if (c->specs->has_sin_cos_sqrt) { + /* TGSI lowering should deal with SCS */ + assert(inst->Instruction.Opcode != TGSI_OPCODE_SCS); + + struct etna_native_reg temp = etna_compile_get_inner_temp(c); + /* add divide by PI/2, using a temp register. GC2000 + * fails with src==dst for the trig instruction. */ + emit_inst(c, &(struct etna_inst) { + .opcode = INST_OPCODE_MUL, + .sat = 0, + .dst = etna_native_to_dst(temp, INST_COMPS_X | INST_COMPS_Y | + INST_COMPS_Z | INST_COMPS_W), + .src[0] = src[0], /* any swizzling happens here */ + .src[1] = alloc_imm_f32(c, 2.0f / M_PI), + }); + emit_inst(c, &(struct etna_inst) { + .opcode = inst->Instruction.Opcode == TGSI_OPCODE_COS + ? INST_OPCODE_COS + : INST_OPCODE_SIN, + .sat = inst->Instruction.Saturate, + .dst = convert_dst(c, &inst->Dst[0]), + .src[2] = etna_native_to_src(temp, INST_SWIZ_IDENTITY), + }); + } else { + /* Implement Nick's fast sine/cosine. Taken from: + * http://forum.devmaster.net/t/fast-and-accurate-sine-cosine/9648 + * A=(1/2*PI 0 1/2*PI 0) B=(0.75 0 0.5 0) C=(-4 4 X X) + * MAD t.x_zw, src.xxxx, A, B + * FRC t.x_z_, void, void, t.xwzw + * MAD t.x_z_, t.xwzw, 2, -1 + * MUL t._y__, t.wzww, |t.wzww|, void (for sin/scs) + * DP3 t.x_z_, t.zyww, C, void (for sin) + * DP3 t.__z_, t.zyww, C, void (for scs) + * MUL t._y__, t.wxww, |t.wxww|, void (for cos/scs) + * DP3 t.x_z_, t.xyww, C, void (for cos) + * DP3 t.x___, t.xyww, C, void (for scs) + * MAD t._y_w, t,xxzz, |t.xxzz|, -t.xxzz + * MAD dst, t.ywyw, .2225, t.xzxz + * + * TODO: we don't set dst.zw correctly for SCS. + */ + struct etna_inst *p, ins[9] = { }; + struct etna_native_reg t0 = etna_compile_get_inner_temp(c); + struct etna_inst_src t0s = etna_native_to_src(t0, INST_SWIZ_IDENTITY); + struct etna_inst_src sincos[3], in = src[0]; + sincos[0] = etna_imm_vec4f(c, sincos_const[0]); + sincos[1] = etna_imm_vec4f(c, sincos_const[1]); + + /* A uniform source will cause the inner temp limit to + * be exceeded. Explicitly deal with that scenario. + */ + if (etna_rgroup_is_uniform(src[0].rgroup)) { + struct etna_inst ins = { }; + ins.opcode = INST_OPCODE_MOV; + ins.dst = etna_native_to_dst(t0, INST_COMPS_X); + ins.src[2] = in; + emit_inst(c, &ins); + in = t0s; + } + + ins[0].opcode = INST_OPCODE_MAD; + ins[0].dst = etna_native_to_dst(t0, INST_COMPS_X | INST_COMPS_Z | INST_COMPS_W); + ins[0].src[0] = swizzle(in, SWIZZLE(X, X, X, X)); + ins[0].src[1] = swizzle(sincos[1], SWIZZLE(X, W, X, W)); /* 1/2*PI */ + ins[0].src[2] = swizzle(sincos[1], SWIZZLE(Y, W, Z, W)); /* 0.75, 0, 0.5, 0 */ + + ins[1].opcode = INST_OPCODE_FRC; + ins[1].dst = etna_native_to_dst(t0, INST_COMPS_X | INST_COMPS_Z); + ins[1].src[2] = swizzle(t0s, SWIZZLE(X, W, Z, W)); + + ins[2].opcode = INST_OPCODE_MAD; + ins[2].dst = etna_native_to_dst(t0, INST_COMPS_X | INST_COMPS_Z); + ins[2].src[0] = swizzle(t0s, SWIZZLE(X, W, Z, W)); + ins[2].src[1] = swizzle(sincos[0], SWIZZLE(X, X, X, X)); /* 2 */ + ins[2].src[2] = swizzle(sincos[0], SWIZZLE(Y, Y, Y, Y)); /* -1 */ + + unsigned mul_swiz, dp3_swiz; + if (inst->Instruction.Opcode == TGSI_OPCODE_SIN) { + mul_swiz = SWIZZLE(W, Z, W, W); + dp3_swiz = SWIZZLE(Z, Y, W, W); + } else { + mul_swiz = SWIZZLE(W, X, W, W); + dp3_swiz = SWIZZLE(X, Y, W, W); + } + + ins[3].opcode = INST_OPCODE_MUL; + ins[3].dst = etna_native_to_dst(t0, INST_COMPS_Y); + ins[3].src[0] = swizzle(t0s, mul_swiz); + ins[3].src[1] = absolute(ins[3].src[0]); + + ins[4].opcode = INST_OPCODE_DP3; + ins[4].dst = etna_native_to_dst(t0, INST_COMPS_X | INST_COMPS_Z); + ins[4].src[0] = swizzle(t0s, dp3_swiz); + ins[4].src[1] = swizzle(sincos[0], SWIZZLE(Z, W, W, W)); + + if (inst->Instruction.Opcode == TGSI_OPCODE_SCS) { + ins[5] = ins[3]; + ins[6] = ins[4]; + ins[4].dst.comps = INST_COMPS_X; + ins[6].dst.comps = INST_COMPS_Z; + ins[5].src[0] = swizzle(t0s, SWIZZLE(W, Z, W, W)); + ins[6].src[0] = swizzle(t0s, SWIZZLE(Z, Y, W, W)); + ins[5].src[1] = absolute(ins[5].src[0]); + p = &ins[7]; + } else { + p = &ins[5]; + } + + p->opcode = INST_OPCODE_MAD; + p->dst = etna_native_to_dst(t0, INST_COMPS_Y | INST_COMPS_W); + p->src[0] = swizzle(t0s, SWIZZLE(X, X, Z, Z)); + p->src[1] = absolute(p->src[0]); + p->src[2] = negate(p->src[0]); + + p++; + p->opcode = INST_OPCODE_MAD; + p->sat = inst->Instruction.Saturate; + p->dst = convert_dst(c, &inst->Dst[0]), + p->src[0] = swizzle(t0s, SWIZZLE(Y, W, Y, W)); + p->src[1] = alloc_imm_f32(c, 0.2225); + p->src[2] = swizzle(t0s, SWIZZLE(X, Z, X, Z)); + + for (int i = 0; &ins[i] <= p; i++) + emit_inst(c, &ins[i]); + } +} + +static void +trans_dph(const struct instr_translater *t, struct etna_compile *c, + const struct tgsi_full_instruction *inst, struct etna_inst_src *src) +{ + /* + DP3 tmp.xyzw, src0.xyzw, src1,xyzw, void + ADD dst.xyzw, tmp.xyzw, void, src1.wwww + */ + struct etna_native_reg temp = etna_compile_get_inner_temp(c); + struct etna_inst ins[2] = { }; + + ins[0].opcode = INST_OPCODE_DP3; + ins[0].dst = etna_native_to_dst(temp, INST_COMPS_X | INST_COMPS_Y | + INST_COMPS_Z | INST_COMPS_W); + ins[0].src[0] = src[0]; + ins[0].src[1] = src[1]; + + ins[1].opcode = INST_OPCODE_ADD; + ins[1].sat = inst->Instruction.Saturate; + ins[1].dst = convert_dst(c, &inst->Dst[0]); + ins[1].src[0] = etna_native_to_src(temp, INST_SWIZ_IDENTITY); + ins[1].src[2] = swizzle(src[1], SWIZZLE(W, W, W, W)); + + emit_inst(c, &ins[0]); + emit_inst(c, &ins[1]); +} + +static void +trans_sampler(const struct instr_translater *t, struct etna_compile *c, + const struct tgsi_full_instruction *inst, + struct etna_inst_src *src) +{ + /* There is no native support for GL texture rectangle coordinates, so + * we have to rescale from ([0, width], [0, height]) to ([0, 1], [0, 1]). */ + if (inst->Texture.Texture == TGSI_TEXTURE_RECT) { + uint32_t unit = inst->Src[1].Register.Index; + struct etna_inst ins[2] = { }; + struct etna_native_reg temp = etna_compile_get_inner_temp(c); + + ins[0].opcode = INST_OPCODE_MUL; + ins[0].dst = etna_native_to_dst(temp, INST_COMPS_X); + ins[0].src[0] = src[0]; + ins[0].src[1] = alloc_imm(c, ETNA_IMMEDIATE_TEXRECT_SCALE_X, unit); + + ins[1].opcode = INST_OPCODE_MUL; + ins[1].dst = etna_native_to_dst(temp, INST_COMPS_Y); + ins[1].src[0] = src[0]; + ins[1].src[1] = alloc_imm(c, ETNA_IMMEDIATE_TEXRECT_SCALE_Y, unit); + + emit_inst(c, &ins[0]); + emit_inst(c, &ins[1]); + + src[0] = etna_native_to_src(temp, INST_SWIZ_IDENTITY); /* temp.xyzw */ + } + + switch (inst->Instruction.Opcode) { + case TGSI_OPCODE_TEX: + emit_inst(c, &(struct etna_inst) { + .opcode = INST_OPCODE_TEXLD, + .sat = 0, + .dst = convert_dst(c, &inst->Dst[0]), + .tex = convert_tex(c, &inst->Src[1], &inst->Texture), + .src[0] = src[0], + }); + break; + + case TGSI_OPCODE_TXB: + emit_inst(c, &(struct etna_inst) { + .opcode = INST_OPCODE_TEXLDB, + .sat = 0, + .dst = convert_dst(c, &inst->Dst[0]), + .tex = convert_tex(c, &inst->Src[1], &inst->Texture), + .src[0] = src[0], + }); + break; + + case TGSI_OPCODE_TXL: + emit_inst(c, &(struct etna_inst) { + .opcode = INST_OPCODE_TEXLDL, + .sat = 0, + .dst = convert_dst(c, &inst->Dst[0]), + .tex = convert_tex(c, &inst->Src[1], &inst->Texture), + .src[0] = src[0], + }); + break; + + case TGSI_OPCODE_TXP: { /* divide src.xyz by src.w */ + struct etna_native_reg temp = etna_compile_get_inner_temp(c); + + emit_inst(c, &(struct etna_inst) { + .opcode = INST_OPCODE_RCP, + .sat = 0, + .dst = etna_native_to_dst(temp, INST_COMPS_W), /* tmp.w */ + .src[2] = swizzle(src[0], SWIZZLE(W, W, W, W)), + }); + emit_inst(c, &(struct etna_inst) { + .opcode = INST_OPCODE_MUL, + .sat = 0, + .dst = etna_native_to_dst(temp, INST_COMPS_X | INST_COMPS_Y | + INST_COMPS_Z), /* tmp.xyz */ + .src[0] = etna_native_to_src(temp, SWIZZLE(W, W, W, W)), + .src[1] = src[0], /* src.xyzw */ + }); + emit_inst(c, &(struct etna_inst) { + .opcode = INST_OPCODE_TEXLD, + .sat = 0, + .dst = convert_dst(c, &inst->Dst[0]), + .tex = convert_tex(c, &inst->Src[1], &inst->Texture), + .src[0] = etna_native_to_src(temp, INST_SWIZ_IDENTITY), /* tmp.xyzw */ + }); + } break; + + default: + BUG("Unhandled instruction %s", + tgsi_get_opcode_name(inst->Instruction.Opcode)); + assert(0); + break; + } +} + +static void +trans_dummy(const struct instr_translater *t, struct etna_compile *c, + const struct tgsi_full_instruction *inst, struct etna_inst_src *src) +{ + /* nothing to do */ +} + +static const struct instr_translater translaters[TGSI_OPCODE_LAST] = { +#define INSTR(n, f, ...) \ + [TGSI_OPCODE_##n] = {.fxn = (f), .tgsi_opc = TGSI_OPCODE_##n, ##__VA_ARGS__} + + INSTR(MOV, trans_instr, .opc = INST_OPCODE_MOV, .src = {2, -1, -1}), + INSTR(RCP, trans_instr, .opc = INST_OPCODE_RCP, .src = {2, -1, -1}), + INSTR(RSQ, trans_instr, .opc = INST_OPCODE_RSQ, .src = {2, -1, -1}), + INSTR(MUL, trans_instr, .opc = INST_OPCODE_MUL, .src = {0, 1, -1}), + INSTR(ADD, trans_instr, .opc = INST_OPCODE_ADD, .src = {0, 2, -1}), + INSTR(DP3, trans_instr, .opc = INST_OPCODE_DP3, .src = {0, 1, -1}), + INSTR(DP4, trans_instr, .opc = INST_OPCODE_DP4, .src = {0, 1, -1}), + INSTR(DST, trans_instr, .opc = INST_OPCODE_DST, .src = {0, 1, -1}), + INSTR(MAD, trans_instr, .opc = INST_OPCODE_MAD, .src = {0, 1, 2}), + INSTR(EX2, trans_instr, .opc = INST_OPCODE_EXP, .src = {2, -1, -1}), + INSTR(LG2, trans_instr, .opc = INST_OPCODE_LOG, .src = {2, -1, -1}), + INSTR(SQRT, trans_instr, .opc = INST_OPCODE_SQRT, .src = {2, -1, -1}), + INSTR(FRC, trans_instr, .opc = INST_OPCODE_FRC, .src = {2, -1, -1}), + INSTR(CEIL, trans_instr, .opc = INST_OPCODE_CEIL, .src = {2, -1, -1}), + INSTR(FLR, trans_instr, .opc = INST_OPCODE_FLOOR, .src = {2, -1, -1}), + INSTR(CMP, trans_instr, .opc = INST_OPCODE_SELECT, .src = {0, 1, 2}, .cond = INST_CONDITION_LZ), + + INSTR(KILL, trans_instr, .opc = INST_OPCODE_TEXKILL), + INSTR(KILL_IF, trans_instr, .opc = INST_OPCODE_TEXKILL, .src = {0, -1, -1}, .cond = INST_CONDITION_LZ), + + INSTR(DDX, trans_deriv, .opc = INST_OPCODE_DSX), + INSTR(DDY, trans_deriv, .opc = INST_OPCODE_DSY), + + INSTR(IF, trans_if), + INSTR(ELSE, trans_else), + INSTR(ENDIF, trans_endif), + + INSTR(BGNLOOP, trans_loop_bgn), + INSTR(ENDLOOP, trans_loop_end), + INSTR(BRK, trans_brk), + INSTR(CONT, trans_cont), + + INSTR(MIN, trans_min_max, .opc = INST_OPCODE_SELECT, .cond = INST_CONDITION_GT), + INSTR(MAX, trans_min_max, .opc = INST_OPCODE_SELECT, .cond = INST_CONDITION_LT), + + INSTR(ARL, trans_arl), + INSTR(LRP, trans_lrp), + INSTR(LIT, trans_lit), + INSTR(SSG, trans_ssg), + INSTR(DPH, trans_dph), + + INSTR(SIN, trans_trig), + INSTR(COS, trans_trig), + INSTR(SCS, trans_trig), + + INSTR(SLT, trans_instr, .opc = INST_OPCODE_SET, .src = {0, 1, -1}, .cond = INST_CONDITION_LT), + INSTR(SGE, trans_instr, .opc = INST_OPCODE_SET, .src = {0, 1, -1}, .cond = INST_CONDITION_GE), + INSTR(SEQ, trans_instr, .opc = INST_OPCODE_SET, .src = {0, 1, -1}, .cond = INST_CONDITION_EQ), + INSTR(SGT, trans_instr, .opc = INST_OPCODE_SET, .src = {0, 1, -1}, .cond = INST_CONDITION_GT), + INSTR(SLE, trans_instr, .opc = INST_OPCODE_SET, .src = {0, 1, -1}, .cond = INST_CONDITION_LE), + INSTR(SNE, trans_instr, .opc = INST_OPCODE_SET, .src = {0, 1, -1}, .cond = INST_CONDITION_NE), + + INSTR(TEX, trans_sampler), + INSTR(TXB, trans_sampler), + INSTR(TXL, trans_sampler), + INSTR(TXP, trans_sampler), + + INSTR(NOP, trans_dummy), + INSTR(END, trans_dummy), +}; + +/* Pass -- compile instructions */ +static void +etna_compile_pass_generate_code(struct etna_compile *c) +{ + struct tgsi_parse_context ctx = { }; + unsigned status = tgsi_parse_init(&ctx, c->tokens); + assert(status == TGSI_PARSE_OK); + + int inst_idx = 0; + while (!tgsi_parse_end_of_tokens(&ctx)) { + const struct tgsi_full_instruction *inst = 0; + + /* No inner temps used yet for this instruction, clear counter */ + c->inner_temps = 0; + + tgsi_parse_token(&ctx); + + switch (ctx.FullToken.Token.Type) { + case TGSI_TOKEN_TYPE_INSTRUCTION: + /* iterate over operands */ + inst = &ctx.FullToken.FullInstruction; + if (c->dead_inst[inst_idx]) { /* skip dead instructions */ + inst_idx++; + continue; + } + + /* Lookup the TGSI information and generate the source arguments */ + struct etna_inst_src src[ETNA_NUM_SRC]; + memset(src, 0, sizeof(src)); + + const struct tgsi_opcode_info *tgsi = tgsi_get_opcode_info(inst->Instruction.Opcode); + + for (int i = 0; i < tgsi->num_src && i < ETNA_NUM_SRC; i++) { + const struct tgsi_full_src_register *reg = &inst->Src[i]; + const struct etna_native_reg *n = &etna_get_src_reg(c, reg->Register)->native; + + if (!n->valid || n->is_tex) + continue; + + src[i] = etna_create_src(reg, n); + } + + const unsigned opc = inst->Instruction.Opcode; + const struct instr_translater *t = &translaters[opc]; + + if (t->fxn) { + t->fxn(t, c, inst, src); + + inst_idx += 1; + } else { + BUG("Unhandled instruction %s", tgsi_get_opcode_name(opc)); + assert(0); + } + break; + } + } + tgsi_parse_free(&ctx); +} + +/* Look up register by semantic */ +static struct etna_reg_desc * +find_decl_by_semantic(struct etna_compile *c, uint file, uint name, uint index) +{ + for (int idx = 0; idx < c->file[file].reg_size; ++idx) { + struct etna_reg_desc *reg = &c->file[file].reg[idx]; + + if (reg->semantic.Name == name && reg->semantic.Index == index) + return reg; + } + + return NULL; /* not found */ +} + +/** Add ADD and MUL instruction to bring Z/W to 0..1 if -1..1 if needed: + * - this is a vertex shader + * - and this is an older GPU + */ +static void +etna_compile_add_z_div_if_needed(struct etna_compile *c) +{ + if (c->info.processor == PIPE_SHADER_VERTEX && c->specs->vs_need_z_div) { + /* find position out */ + struct etna_reg_desc *pos_reg = + find_decl_by_semantic(c, TGSI_FILE_OUTPUT, TGSI_SEMANTIC_POSITION, 0); + + if (pos_reg != NULL) { + /* + * ADD tX.__z_, tX.zzzz, void, tX.wwww + * MUL tX.__z_, tX.zzzz, 0.5, void + */ + emit_inst(c, &(struct etna_inst) { + .opcode = INST_OPCODE_ADD, + .dst = etna_native_to_dst(pos_reg->native, INST_COMPS_Z), + .src[0] = etna_native_to_src(pos_reg->native, SWIZZLE(Z, Z, Z, Z)), + .src[2] = etna_native_to_src(pos_reg->native, SWIZZLE(W, W, W, W)), + }); + emit_inst(c, &(struct etna_inst) { + .opcode = INST_OPCODE_MUL, + .dst = etna_native_to_dst(pos_reg->native, INST_COMPS_Z), + .src[0] = etna_native_to_src(pos_reg->native, SWIZZLE(Z, Z, Z, Z)), + .src[1] = alloc_imm_f32(c, 0.5f), + }); + } + } +} + +/** add a NOP to the shader if + * a) the shader is empty + * or + * b) there is a label at the end of the shader + */ +static void +etna_compile_add_nop_if_needed(struct etna_compile *c) +{ + bool label_at_last_inst = false; + + for (int idx = 0; idx < c->labels_count; ++idx) { + if (c->labels[idx].inst_idx == c->inst_ptr) + label_at_last_inst = true; + + } + + if (c->inst_ptr == 0 || label_at_last_inst) + emit_inst(c, &(struct etna_inst){.opcode = INST_OPCODE_NOP}); +} + +static void +assign_uniforms(struct etna_compile_file *file, unsigned base) +{ + for (int idx = 0; idx < file->reg_size; ++idx) { + file->reg[idx].native.valid = 1; + file->reg[idx].native.rgroup = INST_RGROUP_UNIFORM_0; + file->reg[idx].native.id = base + idx; + } +} + +/* Allocate CONST and IMM to native ETNA_RGROUP_UNIFORM(x). + * CONST must be consecutive as const buffers are supposed to be consecutive, + * and before IMM, as this is + * more convenient because is possible for the compilation process itself to + * generate extra + * immediates for constants such as pi, one, zero. + */ +static void +assign_constants_and_immediates(struct etna_compile *c) +{ + assign_uniforms(&c->file[TGSI_FILE_CONSTANT], 0); + /* immediates start after the constants */ + c->imm_base = c->file[TGSI_FILE_CONSTANT].reg_size * 4; + assign_uniforms(&c->file[TGSI_FILE_IMMEDIATE], c->imm_base / 4); + DBG_F(ETNA_DBG_COMPILER_MSGS, "imm base: %i size: %i", c->imm_base, + c->imm_size); +} + +/* Assign declared samplers to native texture units */ +static void +assign_texture_units(struct etna_compile *c) +{ + uint tex_base = 0; + + if (c->info.processor == PIPE_SHADER_VERTEX) + tex_base = c->specs->vertex_sampler_offset; + + for (int idx = 0; idx < c->file[TGSI_FILE_SAMPLER].reg_size; ++idx) { + c->file[TGSI_FILE_SAMPLER].reg[idx].native.valid = 1; + c->file[TGSI_FILE_SAMPLER].reg[idx].native.is_tex = 1; // overrides rgroup + c->file[TGSI_FILE_SAMPLER].reg[idx].native.id = tex_base + idx; + } +} + +/* Additional pass to fill in branch targets. This pass should be last + * as no instruction reordering or removing/addition can be done anymore + * once the branch targets are computed. + */ +static void +etna_compile_fill_in_labels(struct etna_compile *c) +{ + for (int idx = 0; idx < c->inst_ptr; ++idx) { + if (c->lbl_usage[idx]) + etna_assemble_set_imm(&c->code[idx * 4], c->lbl_usage[idx]->inst_idx); + } +} + +/* compare two etna_native_reg structures, return true if equal */ +static bool +cmp_etna_native_reg(const struct etna_native_reg to, + const struct etna_native_reg from) +{ + return to.valid == from.valid && to.is_tex == from.is_tex && + to.rgroup == from.rgroup && to.id == from.id; +} + +/* go through all declarations and swap native registers *to* and *from* */ +static void +swap_native_registers(struct etna_compile *c, const struct etna_native_reg to, + const struct etna_native_reg from) +{ + if (cmp_etna_native_reg(from, to)) + return; /* Nothing to do */ + + for (int idx = 0; idx < c->total_decls; ++idx) { + if (cmp_etna_native_reg(c->decl[idx].native, from)) { + c->decl[idx].native = to; + } else if (cmp_etna_native_reg(c->decl[idx].native, to)) { + c->decl[idx].native = from; + } + } +} + +/* For PS we need to permute so that inputs are always in temporary 0..N-1. + * Semantic POS is always t0. If that semantic is not used, avoid t0. + */ +static void +permute_ps_inputs(struct etna_compile *c) +{ + /* Special inputs: + * gl_FragCoord VARYING_SLOT_POS TGSI_SEMANTIC_POSITION + * gl_PointCoord VARYING_SLOT_PNTC TGSI_SEMANTIC_PCOORD + */ + uint native_idx = 1; + + for (int idx = 0; idx < c->file[TGSI_FILE_INPUT].reg_size; ++idx) { + struct etna_reg_desc *reg = &c->file[TGSI_FILE_INPUT].reg[idx]; + uint input_id; + assert(reg->has_semantic); + + if (!reg->active || reg->semantic.Name == TGSI_SEMANTIC_POSITION) + continue; + + input_id = native_idx++; + swap_native_registers(c, etna_native_temp(input_id), + c->file[TGSI_FILE_INPUT].reg[idx].native); + } + + c->num_varyings = native_idx - 1; + + if (native_idx > c->next_free_native) + c->next_free_native = native_idx; +} + +/* fill in ps inputs into shader object */ +static void +fill_in_ps_inputs(struct etna_shader *sobj, struct etna_compile *c) +{ + struct etna_shader_io_file *sf = &sobj->infile; + + sf->num_reg = 0; + + for (int idx = 0; idx < c->file[TGSI_FILE_INPUT].reg_size; ++idx) { + struct etna_reg_desc *reg = &c->file[TGSI_FILE_INPUT].reg[idx]; + + if (reg->native.id > 0) { + assert(sf->num_reg < ETNA_NUM_INPUTS); + sf->reg[sf->num_reg].reg = reg->native.id; + sf->reg[sf->num_reg].semantic = reg->semantic; + /* convert usage mask to number of components (*=wildcard) + * .r (0..1) -> 1 component + * .*g (2..3) -> 2 component + * .**b (4..7) -> 3 components + * .***a (8..15) -> 4 components + */ + sf->reg[sf->num_reg].num_components = util_last_bit(reg->usage_mask); + sf->num_reg++; + } + } + + assert(sf->num_reg == c->num_varyings); + sobj->input_count_unk8 = 31; /* XXX what is this */ +} + +/* fill in output mapping for ps into shader object */ +static void +fill_in_ps_outputs(struct etna_shader *sobj, struct etna_compile *c) +{ + sobj->outfile.num_reg = 0; + + for (int idx = 0; idx < c->file[TGSI_FILE_OUTPUT].reg_size; ++idx) { + struct etna_reg_desc *reg = &c->file[TGSI_FILE_OUTPUT].reg[idx]; + + switch (reg->semantic.Name) { + case TGSI_SEMANTIC_COLOR: /* FRAG_RESULT_COLOR */ + sobj->ps_color_out_reg = reg->native.id; + break; + case TGSI_SEMANTIC_POSITION: /* FRAG_RESULT_DEPTH */ + sobj->ps_depth_out_reg = reg->native.id; /* =always native reg 0, only z component should be assigned */ + break; + default: + assert(0); /* only outputs supported are COLOR and POSITION at the moment */ + } + } +} + +/* fill in inputs for vs into shader object */ +static void +fill_in_vs_inputs(struct etna_shader *sobj, struct etna_compile *c) +{ + struct etna_shader_io_file *sf = &sobj->infile; + + sf->num_reg = 0; + for (int idx = 0; idx < c->file[TGSI_FILE_INPUT].reg_size; ++idx) { + struct etna_reg_desc *reg = &c->file[TGSI_FILE_INPUT].reg[idx]; + assert(sf->num_reg < ETNA_NUM_INPUTS); + /* XXX exclude inputs with special semantics such as gl_frontFacing */ + sf->reg[sf->num_reg].reg = reg->native.id; + sf->reg[sf->num_reg].semantic = reg->semantic; + sf->reg[sf->num_reg].num_components = util_last_bit(reg->usage_mask); + sf->num_reg++; + } + + sobj->input_count_unk8 = (sf->num_reg + 19) / 16; /* XXX what is this */ +} + +/* build two-level output index [Semantic][Index] for fast linking */ +static void +build_output_index(struct etna_shader *sobj) +{ + int total = 0; + int offset = 0; + + for (int name = 0; name < TGSI_SEMANTIC_COUNT; ++name) + total += sobj->output_count_per_semantic[name]; + + sobj->output_per_semantic_list = CALLOC(total, sizeof(struct etna_shader_inout *)); + + for (int name = 0; name < TGSI_SEMANTIC_COUNT; ++name) { + sobj->output_per_semantic[name] = &sobj->output_per_semantic_list[offset]; + offset += sobj->output_count_per_semantic[name]; + } + + for (int idx = 0; idx < sobj->outfile.num_reg; ++idx) { + sobj->output_per_semantic[sobj->outfile.reg[idx].semantic.Name] + [sobj->outfile.reg[idx].semantic.Index] = + &sobj->outfile.reg[idx]; + } +} + +/* fill in outputs for vs into shader object */ +static void +fill_in_vs_outputs(struct etna_shader *sobj, struct etna_compile *c) +{ + struct etna_shader_io_file *sf = &sobj->outfile; + + sf->num_reg = 0; + for (int idx = 0; idx < c->file[TGSI_FILE_OUTPUT].reg_size; ++idx) { + struct etna_reg_desc *reg = &c->file[TGSI_FILE_OUTPUT].reg[idx]; + assert(sf->num_reg < ETNA_NUM_INPUTS); + + switch (reg->semantic.Name) { + case TGSI_SEMANTIC_POSITION: + sobj->vs_pos_out_reg = reg->native.id; + break; + case TGSI_SEMANTIC_PSIZE: + sobj->vs_pointsize_out_reg = reg->native.id; + break; + default: + sf->reg[sf->num_reg].reg = reg->native.id; + sf->reg[sf->num_reg].semantic = reg->semantic; + sf->reg[sf->num_reg].num_components = 4; // XXX reg->num_components; + sf->num_reg++; + sobj->output_count_per_semantic[reg->semantic.Name] = + MAX2(reg->semantic.Index + 1, + sobj->output_count_per_semantic[reg->semantic.Name]); + } + } + + /* build two-level index for linking */ + build_output_index(sobj); + + /* fill in "mystery meat" load balancing value. This value determines how + * work is scheduled between VS and PS + * in the unified shader architecture. More precisely, it is determined from + * the number of VS outputs, as well as chip-specific + * vertex output buffer size, vertex cache size, and the number of shader + * cores. + * + * XXX this is a conservative estimate, the "optimal" value is only known for + * sure at link time because some + * outputs may be unused and thus unmapped. Then again, in the general use + * case with GLSL the vertex and fragment + * shaders are linked already before submitting to Gallium, thus all outputs + * are used. + */ + int half_out = (c->file[TGSI_FILE_OUTPUT].reg_size + 1) / 2; + assert(half_out); + + uint32_t b = ((20480 / (c->specs->vertex_output_buffer_size - + 2 * half_out * c->specs->vertex_cache_size)) + + 9) / + 10; + uint32_t a = (b + 256 / (c->specs->shader_core_count * half_out)) / 2; + sobj->vs_load_balancing = VIVS_VS_LOAD_BALANCING_A(MIN2(a, 255)) | + VIVS_VS_LOAD_BALANCING_B(MIN2(b, 255)) | + VIVS_VS_LOAD_BALANCING_C(0x3f) | + VIVS_VS_LOAD_BALANCING_D(0x0f); +} + +static bool +etna_compile_check_limits(struct etna_compile *c) +{ + int max_uniforms = (c->info.processor == PIPE_SHADER_VERTEX) + ? c->specs->max_vs_uniforms + : c->specs->max_ps_uniforms; + /* round up number of uniforms, including immediates, in units of four */ + int num_uniforms = c->imm_base / 4 + (c->imm_size + 3) / 4; + + if (c->inst_ptr > c->specs->max_instructions) { + DBG("Number of instructions (%d) exceeds maximum %d", c->inst_ptr, + c->specs->max_instructions); + return false; + } + + if (c->next_free_native > c->specs->max_registers) { + DBG("Number of registers (%d) exceeds maximum %d", c->next_free_native, + c->specs->max_registers); + return false; + } + + if (num_uniforms > max_uniforms) { + DBG("Number of uniforms (%d) exceeds maximum %d", num_uniforms, + max_uniforms); + return false; + } + + if (c->num_varyings > c->specs->max_varyings) { + DBG("Number of varyings (%d) exceeds maximum %d", c->num_varyings, + c->specs->max_varyings); + return false; + } + + if (c->imm_base > c->specs->num_constants) { + DBG("Number of constants (%d) exceeds maximum %d", c->imm_base, + c->specs->num_constants); + } + + return true; +} + +static void +copy_uniform_state_to_shader(struct etna_compile *c, struct etna_shader *sobj) +{ + uint32_t count = c->imm_size; + struct etna_shader_uniform_info *uinfo = &sobj->uniforms; + + uinfo->const_count = c->imm_base; + uinfo->imm_count = count; + uinfo->imm_data = mem_dup(c->imm_data, count * sizeof(*c->imm_data)); + uinfo->imm_contents = mem_dup(c->imm_contents, count * sizeof(*c->imm_contents)); + + etna_set_shader_uniforms_dirty_flags(sobj); +} + +struct etna_shader * +etna_compile_shader(const struct etna_specs *specs, + const struct tgsi_token *tokens) +{ + /* Create scratch space that may be too large to fit on stack + */ + bool ret; + struct etna_compile *c; + struct etna_shader *shader; + + struct tgsi_lowering_config lconfig = { + .lower_SCS = specs->has_sin_cos_sqrt, + .lower_FLR = !specs->has_sign_floor_ceil, + .lower_CEIL = !specs->has_sign_floor_ceil, + .lower_POW = true, + .lower_EXP = true, + .lower_LOG = true, + .lower_DP2 = true, + .lower_DP2A = true, + .lower_TRUNC = true, + .lower_XPD = true + }; + + c = CALLOC_STRUCT(etna_compile); + if (!c) + return NULL; + + shader = CALLOC_STRUCT(etna_shader); + if (!shader) + goto out; + + c->specs = specs; + c->tokens = tgsi_transform_lowering(&lconfig, tokens, &c->info); + c->free_tokens = !!c->tokens; + if (!c->tokens) { + /* no lowering */ + c->tokens = tokens; + } + + /* Build a map from gallium register to native registers for files + * CONST, SAMP, IMM, OUT, IN, TEMP. + * SAMP will map as-is for fragment shaders, there will be a +8 offset for + * vertex shaders. + */ + /* Pass one -- check register file declarations and immediates */ + etna_compile_parse_declarations(c); + + etna_allocate_decls(c); + + /* Pass two -- check usage of temporaries, inputs, outputs */ + etna_compile_pass_check_usage(c); + + assign_special_inputs(c); + + /* Assign native temp register to TEMPs */ + assign_temporaries_to_native(c, &c->file[TGSI_FILE_TEMPORARY]); + + /* optimize outputs */ + etna_compile_pass_optimize_outputs(c); + + /* XXX assign special inputs: gl_FrontFacing (VARYING_SLOT_FACE) + * this is part of RGROUP_INTERNAL + */ + + /* assign inputs: last usage of input should be <= first usage of temp */ + /* potential optimization case: + * if single MOV TEMP[y], IN[x] before which temp y is not used, and + * after which IN[x] + * is not read, temp[y] can be used as input register as-is + */ + /* sort temporaries by first use + * sort inputs by last usage + * iterate over inputs, temporaries + * if last usage of input <= first usage of temp: + * assign input to temp + * advance input, temporary pointer + * else + * advance temporary pointer + * + * potential problem: instruction with multiple inputs of which one is the + * temp and the other is the input; + * however, as the temp is not used before this, how would this make + * sense? uninitialized temporaries have an undefined + * value, so this would be ok + */ + assign_inouts_to_temporaries(c, TGSI_FILE_INPUT); + + /* assign outputs: first usage of output should be >= last usage of temp */ + /* potential optimization case: + * if single MOV OUT[x], TEMP[y] (with full write mask, or at least + * writing all components that are used in + * the shader) after which temp y is no longer used temp[y] can be + * used as output register as-is + * + * potential problem: instruction with multiple outputs of which one is the + * temp and the other is the output; + * however, as the temp is not used after this, how would this make + * sense? could just discard the output value + */ + /* sort temporaries by last use + * sort outputs by first usage + * iterate over outputs, temporaries + * if first usage of output >= last usage of temp: + * assign output to temp + * advance output, temporary pointer + * else + * advance temporary pointer + */ + assign_inouts_to_temporaries(c, TGSI_FILE_OUTPUT); + + assign_constants_and_immediates(c); + assign_texture_units(c); + + /* list declarations */ + for (int x = 0; x < c->total_decls; ++x) { + DBG_F(ETNA_DBG_COMPILER_MSGS, "%i: %s,%d active=%i first_use=%i " + "last_use=%i native=%i usage_mask=%x " + "has_semantic=%i", + x, tgsi_file_name(c->decl[x].file), c->decl[x].idx, + c->decl[x].active, c->decl[x].first_use, c->decl[x].last_use, + c->decl[x].native.valid ? c->decl[x].native.id : -1, + c->decl[x].usage_mask, c->decl[x].has_semantic); + if (c->decl[x].has_semantic) + DBG_F(ETNA_DBG_COMPILER_MSGS, " semantic_name=%s semantic_idx=%i", + tgsi_semantic_names[c->decl[x].semantic.Name], + c->decl[x].semantic.Index); + } + /* XXX for PS we need to permute so that inputs are always in temporary + * 0..N-1. + * There is no "switchboard" for varyings (AFAIK!). The output color, + * however, can be routed + * from an arbitrary temporary. + */ + if (c->info.processor == PIPE_SHADER_FRAGMENT) + permute_ps_inputs(c); + + + /* list declarations */ + for (int x = 0; x < c->total_decls; ++x) { + DBG_F(ETNA_DBG_COMPILER_MSGS, "%i: %s,%d active=%i first_use=%i " + "last_use=%i native=%i usage_mask=%x " + "has_semantic=%i", + x, tgsi_file_name(c->decl[x].file), c->decl[x].idx, + c->decl[x].active, c->decl[x].first_use, c->decl[x].last_use, + c->decl[x].native.valid ? c->decl[x].native.id : -1, + c->decl[x].usage_mask, c->decl[x].has_semantic); + if (c->decl[x].has_semantic) + DBG_F(ETNA_DBG_COMPILER_MSGS, " semantic_name=%s semantic_idx=%i", + tgsi_semantic_names[c->decl[x].semantic.Name], + c->decl[x].semantic.Index); + } + + /* pass 3: generate instructions */ + etna_compile_pass_generate_code(c); + etna_compile_add_z_div_if_needed(c); + etna_compile_add_nop_if_needed(c); + etna_compile_fill_in_labels(c); + + ret = etna_compile_check_limits(c); + if (!ret) { + FREE(shader); + shader = NULL; + goto out; + } + + /* fill in output structure */ + shader->processor = c->info.processor; + shader->code_size = c->inst_ptr * 4; + shader->code = mem_dup(c->code, c->inst_ptr * 16); + shader->num_temps = c->next_free_native; + shader->vs_pos_out_reg = -1; + shader->vs_pointsize_out_reg = -1; + shader->ps_color_out_reg = -1; + shader->ps_depth_out_reg = -1; + copy_uniform_state_to_shader(c, shader); + + if (c->info.processor == PIPE_SHADER_VERTEX) { + fill_in_vs_inputs(shader, c); + fill_in_vs_outputs(shader, c); + } else if (c->info.processor == PIPE_SHADER_FRAGMENT) { + fill_in_ps_inputs(shader, c); + fill_in_ps_outputs(shader, c); + } + +out: + if (c->free_tokens) + FREE((void *)c->tokens); + + FREE(c->labels); + FREE(c); + + return shader; +} + +extern const char *tgsi_swizzle_names[]; +void +etna_dump_shader(const struct etna_shader *shader) +{ + if (shader->processor == PIPE_SHADER_VERTEX) + printf("VERT\n"); + else + printf("FRAG\n"); + + + etna_disasm(shader->code, shader->code_size, PRINT_RAW); + + printf("num temps: %i\n", shader->num_temps); + printf("num const: %i\n", shader->uniforms.const_count); + printf("immediates:\n"); + for (int idx = 0; idx < shader->uniforms.imm_count; ++idx) { + printf(" [%i].%s = %f (0x%08x)\n", + (idx + shader->uniforms.const_count) / 4, + tgsi_swizzle_names[idx % 4], + *((float *)&shader->uniforms.imm_data[idx]), + shader->uniforms.imm_data[idx]); + } + printf("inputs:\n"); + for (int idx = 0; idx < shader->infile.num_reg; ++idx) { + printf(" [%i] name=%s index=%i comps=%i\n", shader->infile.reg[idx].reg, + tgsi_semantic_names[shader->infile.reg[idx].semantic.Name], + shader->infile.reg[idx].semantic.Index, + shader->infile.reg[idx].num_components); + } + printf("outputs:\n"); + for (int idx = 0; idx < shader->outfile.num_reg; ++idx) { + printf(" [%i] name=%s index=%i comps=%i\n", shader->outfile.reg[idx].reg, + tgsi_semantic_names[shader->outfile.reg[idx].semantic.Name], + shader->outfile.reg[idx].semantic.Index, + shader->outfile.reg[idx].num_components); + } + printf("special:\n"); + if (shader->processor == PIPE_SHADER_VERTEX) { + printf(" vs_pos_out_reg=%i\n", shader->vs_pos_out_reg); + printf(" vs_pointsize_out_reg=%i\n", shader->vs_pointsize_out_reg); + printf(" vs_load_balancing=0x%08x\n", shader->vs_load_balancing); + } else { + printf(" ps_color_out_reg=%i\n", shader->ps_color_out_reg); + printf(" ps_depth_out_reg=%i\n", shader->ps_depth_out_reg); + } + printf(" input_count_unk8=0x%08x\n", shader->input_count_unk8); +} + +void +etna_destroy_shader(struct etna_shader *shader) +{ + assert(shader); + + FREE(shader->code); + FREE(shader->uniforms.imm_data); + FREE(shader->uniforms.imm_contents); + FREE(shader->output_per_semantic_list); + FREE(shader); +} + +static const struct etna_shader_inout * +etna_shader_vs_lookup(const struct etna_shader *sobj, + const struct etna_shader_inout *in) +{ + if (in->semantic.Index < sobj->output_count_per_semantic[in->semantic.Name]) + return sobj->output_per_semantic[in->semantic.Name][in->semantic.Index]; + + return NULL; +} + +bool +etna_link_shader(struct etna_shader_link_info *info, + const struct etna_shader *vs, const struct etna_shader *fs) +{ + /* For each fragment input we need to find the associated vertex shader + * output, which can be found by matching on semantic name and index. A + * binary search could be used because the vs outputs are sorted by their + * semantic index and grouped by semantic type by fill_in_vs_outputs. + */ + assert(fs->infile.num_reg < ETNA_NUM_INPUTS); + + for (int idx = 0; idx < fs->infile.num_reg; ++idx) { + const struct etna_shader_inout *fsio = &fs->infile.reg[idx]; + const struct etna_shader_inout *vsio = etna_shader_vs_lookup(vs, fsio); + struct etna_varying *varying; + + assert(fsio->reg > 0 && fsio->reg <= ARRAY_SIZE(info->varyings)); + + if (fsio->reg > info->num_varyings) + info->num_varyings = fsio->reg; + + varying = &info->varyings[fsio->reg - 1]; + varying->num_components = fsio->num_components; + + if (fsio->semantic.Name == TGSI_SEMANTIC_COLOR) /* colors affected by flat shading */ + varying->pa_attributes = 0x200; + else /* texture coord or other bypasses flat shading */ + varying->pa_attributes = 0x2f1; + + if (fsio->semantic.Name == TGSI_SEMANTIC_PCOORD) { + varying->use[0] = VARYING_COMPONENT_USE_POINTCOORD_X; + varying->use[1] = VARYING_COMPONENT_USE_POINTCOORD_Y; + varying->use[2] = VARYING_COMPONENT_USE_USED; + varying->use[3] = VARYING_COMPONENT_USE_USED; + varying->reg = 0; /* replaced by point coord -- doesn't matter */ + continue; + } + + if (vsio == NULL) + return true; /* not found -- link error */ + + varying->use[0] = VARYING_COMPONENT_USE_USED; + varying->use[1] = VARYING_COMPONENT_USE_USED; + varying->use[2] = VARYING_COMPONENT_USE_USED; + varying->use[3] = VARYING_COMPONENT_USE_USED; + varying->reg = vsio->reg; + } + + assert(info->num_varyings == fs->infile.num_reg); + + return false; +} diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_compiler_cmdline.c mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_compiler_cmdline.c --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_compiler_cmdline.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_compiler_cmdline.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,146 @@ +/* + * Copyright (c) 2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Rob Clark + * Christian Gmeiner + */ + +#include +#include +#include +#include +#include + +#include "tgsi/tgsi_dump.h" +#include "tgsi/tgsi_parse.h" +#include "tgsi/tgsi_text.h" + +#include "etnaviv_compiler.h" +#include "etnaviv_debug.h" +#include "etnaviv_internal.h" + +static const struct etna_specs specs_gc2000 = { + .vs_need_z_div = 0, + .has_sin_cos_sqrt = 1, + .has_sign_floor_ceil = 1, + .vertex_sampler_offset = 8, + .vertex_output_buffer_size = 512, + .vertex_cache_size = 16, + .shader_core_count = 4, + .max_instructions = 512, + .max_varyings = 12, + .max_registers = 64, + .max_vs_uniforms = 168, + .max_ps_uniforms = 128, + .num_constants = 168, +}; + +static int +read_file(const char *filename, void **ptr, size_t *size) +{ + int fd, ret; + struct stat st; + + *ptr = MAP_FAILED; + + fd = open(filename, O_RDONLY); + if (fd == -1) { + warnx("couldn't open `%s'", filename); + return 1; + } + + ret = fstat(fd, &st); + if (ret) + errx(1, "couldn't stat `%s'", filename); + + *size = st.st_size; + *ptr = mmap(NULL, st.st_size, PROT_READ, MAP_SHARED, fd, 0); + if (*ptr == MAP_FAILED) + errx(1, "couldn't map `%s'", filename); + + close(fd); + + return 0; +} + +static void +print_usage(void) +{ + printf("Usage: etnaviv_compiler [OPTIONS]... FILE\n"); + printf(" --verbose - verbose compiler/debug messages\n"); + printf(" --help - show this message\n"); +} + +int +main(int argc, char **argv) +{ + int ret = 0, n = 1; + const char *filename; + struct tgsi_token toks[65536]; + struct tgsi_parse_context parse; + struct etna_shader *shader_obj; + void *ptr; + size_t size; + + etna_mesa_debug = ETNA_DBG_MSGS; + + while (n < argc) { + if (!strcmp(argv[n], "--verbose")) { + etna_mesa_debug |= ETNA_DBG_COMPILER_MSGS; + n++; + continue; + } + + if (!strcmp(argv[n], "--help")) { + print_usage(); + return 0; + } + + break; + } + + filename = argv[n]; + + ret = read_file(filename, &ptr, &size); + if (ret) { + print_usage(); + return ret; + } + + debug_printf("%s\n", (char *)ptr); + + if (!tgsi_text_translate(ptr, toks, ARRAY_SIZE(toks))) + errx(1, "could not parse `%s'", filename); + + tgsi_parse_init(&parse, toks); + + shader_obj = etna_compile_shader(&specs_gc2000, toks); + + if (shader_obj == NULL) { + fprintf(stderr, "compiler failed!\n"); + return 1; + } + + etna_dump_shader(shader_obj); + etna_destroy_shader(shader_obj); +} diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_compiler.h mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_compiler.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_compiler.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_compiler.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,120 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + */ + +#ifndef H_ETNAVIV_COMPILER +#define H_ETNAVIV_COMPILER + +#include "etnaviv_context.h" +#include "etnaviv_internal.h" +#include "pipe/p_compiler.h" +#include "pipe/p_shader_tokens.h" + +/* XXX some of these are pretty arbitrary limits, may be better to switch + * to dynamic allocation at some point. + */ +#define ETNA_MAX_TEMPS (64) /* max temp register count of all Vivante hw */ +#define ETNA_MAX_TOKENS (2048) +#define ETNA_MAX_IMM (1024) /* max const+imm in 32-bit words */ +#define ETNA_MAX_DECL (2048) /* max declarations */ +#define ETNA_MAX_DEPTH (32) +#define ETNA_MAX_INSTRUCTIONS (2048) + +/* compiler output per input/output */ +struct etna_shader_inout { + int reg; /* native register */ + struct tgsi_declaration_semantic semantic; /* tgsi semantic name and index */ + int num_components; +}; + +struct etna_shader_io_file { + size_t num_reg; + struct etna_shader_inout reg[ETNA_NUM_INPUTS]; +}; + +/* shader object, for linking */ +struct etna_shader { + uint processor; /* TGSI_PROCESSOR_... */ + uint32_t code_size; /* code size in uint32 words */ + uint32_t *code; + unsigned num_temps; + + struct etna_shader_uniform_info uniforms; + + /* ETNA_DIRTY_* flags that, when set in context dirty, mean that the + * uniforms have to get (partial) reloaded. */ + uint32_t uniforms_dirty_bits; + + /* inputs (for linking) for fs, the inputs must be in register 1..N */ + struct etna_shader_io_file infile; + + /* outputs (for linking) */ + struct etna_shader_io_file outfile; + + /* index into outputs (for linking) */ + int output_count_per_semantic[TGSI_SEMANTIC_COUNT]; + struct etna_shader_inout * *output_per_semantic_list; /* list of pointers to outputs */ + struct etna_shader_inout **output_per_semantic[TGSI_SEMANTIC_COUNT]; + + /* special outputs (vs only) */ + int vs_pos_out_reg; /* VS position output */ + int vs_pointsize_out_reg; /* VS point size output */ + uint32_t vs_load_balancing; + + /* special outputs (ps only) */ + int ps_color_out_reg; /* color output register */ + int ps_depth_out_reg; /* depth output register */ + + /* unknown input property (XX_INPUT_COUNT, field UNK8) */ + uint32_t input_count_unk8; +}; + +struct etna_varying { + uint32_t pa_attributes; + uint8_t num_components; + uint8_t use[4]; + uint8_t reg; +}; + +struct etna_shader_link_info { + /* each PS input is annotated with the VS output reg */ + unsigned num_varyings; + struct etna_varying varyings[ETNA_NUM_INPUTS]; +}; + +struct etna_shader * +etna_compile_shader(const struct etna_specs *specs, const struct tgsi_token *tokens); + +void +etna_dump_shader(const struct etna_shader *shader); + +bool +etna_link_shader(struct etna_shader_link_info *info, + const struct etna_shader *vs, const struct etna_shader *fs); + +void +etna_destroy_shader(struct etna_shader *shader); + +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_context.c mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_context.c --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_context.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,323 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + * Christian Gmeiner + */ + +#include "etnaviv_context.h" + +#include "etnaviv_blend.h" +#include "etnaviv_clear_blit.h" +#include "etnaviv_compiler.h" +#include "etnaviv_debug.h" +#include "etnaviv_emit.h" +#include "etnaviv_fence.h" +#include "etnaviv_query.h" +#include "etnaviv_rasterizer.h" +#include "etnaviv_screen.h" +#include "etnaviv_shader.h" +#include "etnaviv_state.h" +#include "etnaviv_surface.h" +#include "etnaviv_texture.h" +#include "etnaviv_transfer.h" +#include "etnaviv_translate.h" +#include "etnaviv_zsa.h" + +#include "pipe/p_context.h" +#include "pipe/p_state.h" +#include "util/u_blitter.h" +#include "util/u_memory.h" +#include "util/u_prim.h" + +#include "hw/common.xml.h" + +static void +etna_context_destroy(struct pipe_context *pctx) +{ + struct etna_context *ctx = etna_context(pctx); + + if (ctx->primconvert) + util_primconvert_destroy(ctx->primconvert); + + if (ctx->blitter) + util_blitter_destroy(ctx->blitter); + + if (ctx->stream) + etna_cmd_stream_del(ctx->stream); + + slab_destroy_child(&ctx->transfer_pool); + + FREE(pctx); +} + +/* Update render state where needed based on draw operation */ +static void +etna_update_state_for_draw(struct etna_context *ctx, const struct pipe_draw_info *info) +{ + /* Handle primitive restart: + * - If not an indexed draw, we don't care about the state of the primitive restart bit. + * - Otherwise, set the bit in INDEX_STREAM_CONTROL in the index buffer state + * accordingly + * - If the value of the INDEX_STREAM_CONTROL register changed due to this, or + * primitive restart is enabled and the restart index changed, mark the index + * buffer state as dirty + */ + + if (info->indexed) { + uint32_t new_control = ctx->index_buffer.FE_INDEX_STREAM_CONTROL; + + if (info->primitive_restart) + new_control |= VIVS_FE_INDEX_STREAM_CONTROL_PRIMITIVE_RESTART; + else + new_control &= ~VIVS_FE_INDEX_STREAM_CONTROL_PRIMITIVE_RESTART; + + if (ctx->index_buffer.FE_INDEX_STREAM_CONTROL != new_control || + (info->primitive_restart && ctx->index_buffer.FE_PRIMITIVE_RESTART_INDEX != info->restart_index)) { + ctx->index_buffer.FE_INDEX_STREAM_CONTROL = new_control; + ctx->index_buffer.FE_PRIMITIVE_RESTART_INDEX = info->restart_index; + ctx->dirty |= ETNA_DIRTY_INDEX_BUFFER; + } + } +} + + +static void +etna_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info) +{ + struct etna_context *ctx = etna_context(pctx); + struct pipe_framebuffer_state *pfb = &ctx->framebuffer_s; + uint32_t draw_mode; + unsigned i; + + if (ctx->vertex_elements == NULL || ctx->vertex_elements->num_elements == 0) + return; /* Nothing to do */ + + if (!(ctx->prim_hwsupport & (1 << info->mode))) { + struct primconvert_context *primconvert = ctx->primconvert; + util_primconvert_save_index_buffer(primconvert, &ctx->index_buffer.ib); + util_primconvert_save_rasterizer_state(primconvert, ctx->rasterizer); + util_primconvert_draw_vbo(primconvert, info); + return; + } + + int prims = u_decomposed_prims_for_vertices(info->mode, info->count); + if (unlikely(prims <= 0)) { + DBG("Invalid draw primitive mode=%i or no primitives to be drawn", info->mode); + return; + } + + draw_mode = translate_draw_mode(info->mode); + if (draw_mode == ETNA_NO_MATCH) { + BUG("Unsupported draw mode"); + return; + } + + if (info->indexed && !ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.bo) { + BUG("Unsupported or no index buffer"); + return; + } + + /* Update any derived state */ + if (!etna_state_update(ctx)) + return; + + /* + * Figure out the buffers/features we need: + */ + if (etna_depth_enabled(ctx)) + resource_written(ctx, pfb->zsbuf->texture); + + if (etna_stencil_enabled(ctx)) + resource_written(ctx, pfb->zsbuf->texture); + + for (i = 0; i < pfb->nr_cbufs; i++) { + struct pipe_resource *surf; + + if (!pfb->cbufs[i]) + continue; + + surf = pfb->cbufs[i]->texture; + resource_written(ctx, surf); + } + + /* Mark constant buffers as being read */ + resource_read(ctx, ctx->constant_buffer[PIPE_SHADER_VERTEX].buffer); + resource_read(ctx, ctx->constant_buffer[PIPE_SHADER_FRAGMENT].buffer); + + /* Mark VBOs as being read */ + for (i = 0; i < ctx->vertex_buffer.count; i++) { + assert(!ctx->vertex_buffer.vb[i].user_buffer); + resource_read(ctx, ctx->vertex_buffer.vb[i].buffer); + } + + /* Mark index buffer as being read */ + resource_read(ctx, ctx->index_buffer.ib.buffer); + + /* Mark textures as being read */ + for (i = 0; i < PIPE_MAX_SAMPLERS; i++) + if (ctx->sampler_view[i]) + resource_read(ctx, ctx->sampler_view[i]->texture); + + ctx->stats.prims_emitted += u_reduced_prims_for_vertices(info->mode, info->count); + ctx->stats.draw_calls++; + + /* Update state for this draw operation */ + etna_update_state_for_draw(ctx, info); + + /* First, sync state, then emit DRAW_PRIMITIVES or DRAW_INDEXED_PRIMITIVES */ + etna_emit_state(ctx); + + if (info->indexed) + etna_draw_indexed_primitives(ctx->stream, draw_mode, info->start, prims, info->index_bias); + else + etna_draw_primitives(ctx->stream, draw_mode, info->start, prims); + + if (DBG_ENABLED(ETNA_DBG_DRAW_STALL)) { + /* Stall the FE after every draw operation. This allows better + * debug of GPU hang conditions, as the FE will indicate which + * draw op has caused the hang. */ + etna_stall(ctx->stream, SYNC_RECIPIENT_FE, SYNC_RECIPIENT_PE); + } + + if (DBG_ENABLED(ETNA_DBG_FLUSH_ALL)) + pctx->flush(pctx, NULL, 0); + + if (ctx->framebuffer.cbuf) + etna_resource(ctx->framebuffer.cbuf->texture)->seqno++; + if (ctx->framebuffer.zsbuf) + etna_resource(ctx->framebuffer.zsbuf->texture)->seqno++; +} + +static void +etna_flush(struct pipe_context *pctx, struct pipe_fence_handle **fence, + enum pipe_flush_flags flags) +{ + struct etna_context *ctx = etna_context(pctx); + + etna_cmd_stream_flush(ctx->stream); + + if (fence) + *fence = etna_fence_create(pctx); +} + +static void +etna_cmd_stream_reset_notify(struct etna_cmd_stream *stream, void *priv) +{ + struct etna_context *ctx = priv; + struct etna_resource *rsc, *rsc_tmp; + + etna_set_state(stream, VIVS_GL_API_MODE, VIVS_GL_API_MODE_OPENGL); + etna_set_state(stream, VIVS_GL_VERTEX_ELEMENT_CONFIG, 0x00000001); + etna_set_state(stream, VIVS_RA_EARLY_DEPTH, 0x00000031); + etna_set_state(stream, VIVS_PA_W_CLIP_LIMIT, 0x34000001); + + ctx->dirty = ~0L; + + /* go through all the used resources and clear their status flag */ + LIST_FOR_EACH_ENTRY_SAFE(rsc, rsc_tmp, &ctx->used_resources, list) + { + debug_assert(rsc->status != 0); + rsc->status = 0; + rsc->pending_ctx = NULL; + list_delinit(&rsc->list); + } + + assert(LIST_IS_EMPTY(&ctx->used_resources)); +} + +struct pipe_context * +etna_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags) +{ + struct etna_context *ctx = CALLOC_STRUCT(etna_context); + struct etna_screen *screen; + struct pipe_context *pctx; + + if (ctx == NULL) + return NULL; + + pctx = &ctx->base; + pctx->priv = ctx; + pctx->screen = pscreen; + + screen = etna_screen(pscreen); + ctx->stream = etna_cmd_stream_new(screen->pipe, 0x2000, &etna_cmd_stream_reset_notify, ctx); + if (ctx->stream == NULL) + goto fail; + + /* context ctxate setup */ + ctx->specs = screen->specs; + ctx->screen = screen; + /* need some sane default in case state tracker doesn't set some state: */ + ctx->sample_mask = 0xffff; + + list_inithead(&ctx->used_resources); + + /* Set sensible defaults for state */ + etna_cmd_stream_reset_notify(ctx->stream, ctx); + + pctx->destroy = etna_context_destroy; + pctx->draw_vbo = etna_draw_vbo; + pctx->flush = etna_flush; + + /* creation of compile states */ + pctx->create_blend_state = etna_blend_state_create; + pctx->create_rasterizer_state = etna_rasterizer_state_create; + pctx->create_depth_stencil_alpha_state = etna_zsa_state_create; + + etna_clear_blit_init(pctx); + etna_query_context_init(pctx); + etna_state_init(pctx); + etna_surface_init(pctx); + etna_shader_init(pctx); + etna_texture_init(pctx); + etna_transfer_init(pctx); + + ctx->blitter = util_blitter_create(pctx); + if (!ctx->blitter) + goto fail; + + /* Generate the bitmask of supported draw primitives. */ + ctx->prim_hwsupport = 1 << PIPE_PRIM_POINTS | + 1 << PIPE_PRIM_LINES | + 1 << PIPE_PRIM_LINE_STRIP | + 1 << PIPE_PRIM_TRIANGLES | + 1 << PIPE_PRIM_TRIANGLE_STRIP | + 1 << PIPE_PRIM_TRIANGLE_FAN; + + if (VIV_FEATURE(ctx->screen, chipMinorFeatures2, LINE_LOOP)) + ctx->prim_hwsupport |= 1 << PIPE_PRIM_LINE_LOOP; + + ctx->primconvert = util_primconvert_create(pctx, ctx->prim_hwsupport); + if (!ctx->primconvert) + goto fail; + + slab_create_child(&ctx->transfer_pool, &screen->transfer_pool); + + return pctx; + +fail: + pctx->destroy(pctx); + + return NULL; +} diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_context.h mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_context.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_context.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_context.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,194 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + * Christian Gmeiner + */ + +#ifndef H_ETNAVIV_CONTEXT +#define H_ETNAVIV_CONTEXT + +#include + +#include "etnaviv_resource.h" +#include "etnaviv_tiling.h" +#include "indices/u_primconvert.h" +#include "pipe/p_context.h" +#include "pipe/p_defines.h" +#include "pipe/p_format.h" +#include "pipe/p_shader_tokens.h" +#include "pipe/p_state.h" +#include "util/slab.h" + +struct pipe_screen; +struct etna_shader; + +struct etna_index_buffer { + struct pipe_index_buffer ib; + struct etna_reloc FE_INDEX_STREAM_BASE_ADDR; + uint32_t FE_INDEX_STREAM_CONTROL; + uint32_t FE_PRIMITIVE_RESTART_INDEX; +}; + +struct etna_shader_input { + int vs_reg; /* VS input register */ +}; + +enum etna_varying_special { + ETNA_VARYING_VSOUT = 0, /* from VS */ + ETNA_VARYING_POINTCOORD, /* point texture coord */ +}; + +struct etna_shader_varying { + int num_components; + enum etna_varying_special special; + int pa_attributes; + int vs_reg; /* VS output register */ +}; + +struct etna_transfer { + struct pipe_transfer base; + struct pipe_resource *rsc; + void *staging; +}; + +struct etna_vertexbuf_state { + struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS]; + struct compiled_set_vertex_buffer cvb[PIPE_MAX_ATTRIBS]; + unsigned count; + uint32_t enabled_mask; +}; + +enum etna_immediate_contents { + ETNA_IMMEDIATE_UNUSED = 0, + ETNA_IMMEDIATE_CONSTANT, + ETNA_IMMEDIATE_TEXRECT_SCALE_X, + ETNA_IMMEDIATE_TEXRECT_SCALE_Y, +}; + +struct etna_shader_uniform_info { + enum etna_immediate_contents *imm_contents; + uint32_t *imm_data; + uint32_t imm_count; + uint32_t const_count; +}; + +struct etna_context { + struct pipe_context base; + + struct etna_specs specs; + struct etna_screen *screen; + struct etna_cmd_stream *stream; + + /* which state objects need to be re-emit'd: */ + enum { + ETNA_DIRTY_BLEND = (1 << 0), + ETNA_DIRTY_SAMPLERS = (1 << 1), + ETNA_DIRTY_RASTERIZER = (1 << 2), + ETNA_DIRTY_ZSA = (1 << 3), + ETNA_DIRTY_VERTEX_ELEMENTS = (1 << 4), + ETNA_DIRTY_BLEND_COLOR = (1 << 6), + ETNA_DIRTY_STENCIL_REF = (1 << 7), + ETNA_DIRTY_SAMPLE_MASK = (1 << 8), + ETNA_DIRTY_VIEWPORT = (1 << 9), + ETNA_DIRTY_FRAMEBUFFER = (1 << 10), + ETNA_DIRTY_SCISSOR = (1 << 11), + ETNA_DIRTY_SAMPLER_VIEWS = (1 << 12), + ETNA_DIRTY_CONSTBUF = (1 << 13), + ETNA_DIRTY_VERTEX_BUFFERS = (1 << 14), + ETNA_DIRTY_INDEX_BUFFER = (1 << 15), + ETNA_DIRTY_SHADER = (1 << 16), + ETNA_DIRTY_TS = (1 << 17), + ETNA_DIRTY_TEXTURE_CACHES = (1 << 18), + } dirty; + + uint32_t prim_hwsupport; + struct primconvert_context *primconvert; + + /* list of resources used by currently-unsubmitted renders */ + struct list_head used_resources; + + struct slab_child_pool transfer_pool; + struct blitter_context *blitter; + + /* compiled bindable state */ + unsigned sample_mask; + struct pipe_blend_state *blend; + unsigned num_fragment_samplers; + uint32_t active_samplers; + struct pipe_sampler_state *sampler[PIPE_MAX_SAMPLERS]; + struct pipe_rasterizer_state *rasterizer; + struct pipe_depth_stencil_alpha_state *zsa; + struct compiled_vertex_elements_state *vertex_elements; + struct compiled_shader_state shader_state; + + /* to simplify the emit process we store pre compiled state objects, + * which got 'compiled' during state change. */ + struct compiled_blend_color blend_color; + struct compiled_stencil_ref stencil_ref; + struct compiled_framebuffer_state framebuffer; + struct compiled_scissor_state scissor; + struct compiled_viewport_state viewport; + unsigned num_fragment_sampler_views; + uint32_t active_sampler_views; + struct pipe_sampler_view *sampler_view[PIPE_MAX_SAMPLERS]; + struct pipe_constant_buffer constant_buffer[PIPE_SHADER_TYPES]; + struct etna_vertexbuf_state vertex_buffer; + struct etna_index_buffer index_buffer; + + /* pointers to the bound state. these are mainly kept around for the blitter */ + struct etna_shader *vs; + struct etna_shader *fs; + + /* saved parameter-like state. these are mainly kept around for the blitter */ + struct pipe_framebuffer_state framebuffer_s; + struct pipe_stencil_ref stencil_ref_s; + struct pipe_viewport_state viewport_s; + struct pipe_scissor_state scissor_s; + + /* cached state of entire GPU */ + struct etna_3d_state gpu3d; + + /* stats/counters */ + struct { + uint64_t prims_emitted; + uint64_t draw_calls; + } stats; +}; + +static inline struct etna_context * +etna_context(struct pipe_context *pctx) +{ + return (struct etna_context *)pctx; +} + +static inline struct etna_transfer * +etna_transfer(struct pipe_transfer *p) +{ + return (struct etna_transfer *)p; +} + +struct pipe_context * +etna_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags); + +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_debug.h mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_debug.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_debug.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_debug.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,79 @@ +/* + * Copyright (c) 2012-2013 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/* Common debug stuffl */ +#ifndef H_ETNA_DEBUG +#define H_ETNA_DEBUG + +#include "util/u_debug.h" + +#include +#include +#include + +/* Logging */ +#define ETNA_DBG_MSGS 0x1 /* Warnings and non-fatal errors */ +#define ETNA_DBG_FRAME_MSGS 0x2 +#define ETNA_DBG_RESOURCE_MSGS 0x4 +#define ETNA_DBG_COMPILER_MSGS 0x8 +#define ETNA_DBG_LINKER_MSGS 0x10 +#define ETNA_DBG_DUMP_SHADERS 0x20 + +/* Bypasses */ +#define ETNA_DBG_NO_TS 0x1000 /* Disable TS */ +#define ETNA_DBG_NO_AUTODISABLE 0x2000 /* Disable autodisable */ +#define ETNA_DBG_NO_SUPERTILE 0x4000 /* Disable supertile */ +#define ETNA_DBG_NO_EARLY_Z 0x8000 /* Disable early z */ +#define ETNA_DBG_CFLUSH_ALL 0x10000 /* Flush before every state update + draw call */ +#define ETNA_DBG_MSAA_2X 0x20000 /* Force 2X MSAA for screen */ +#define ETNA_DBG_MSAA_4X 0x40000 /* Force 4X MSAA for screen */ +#define ETNA_DBG_FINISH_ALL 0x80000 /* Finish on every flush */ +#define ETNA_DBG_FLUSH_ALL 0x100000 /* Flush after every rendered primitive */ +#define ETNA_DBG_ZERO 0x200000 /* Zero all resources after allocation */ +#define ETNA_DBG_DRAW_STALL 0x400000 /* Stall FE/PE after every draw op */ + +extern int etna_mesa_debug; /* set in etna_screen.c from ETNA_DEBUG */ + +#define DBG_ENABLED(flag) unlikely(etna_mesa_debug & (flag)) + +#define DBG_F(flag, fmt, ...) \ + do { \ + if (etna_mesa_debug & (flag)) \ + debug_printf("%s:%d: " fmt "\n", __FUNCTION__, __LINE__, \ + ##__VA_ARGS__); \ + } while (0) + +#define DBG(fmt, ...) \ + do { \ + if (etna_mesa_debug & ETNA_DBG_MSGS) \ + debug_printf("%s:%d: " fmt "\n", __FUNCTION__, __LINE__, \ + ##__VA_ARGS__); \ + } while (0) + +/* A serious bug, show this even in non-debug mode */ +#define BUG(fmt, ...) \ + do { \ + printf("%s:%d: " fmt "\n", __FUNCTION__, __LINE__, ##__VA_ARGS__); \ + } while (0) + +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_disasm.c mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_disasm.c --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_disasm.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_disasm.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,612 @@ +/* + * Copyright (c) 2016 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Christian Gmeiner + */ + +#include "etnaviv_disasm.h" + +#include +#include +#include +#include + +#include "hw/isa.xml.h" + +struct instr { + /* dword0: */ + uint32_t opc : 6; + uint32_t cond : 5; + uint32_t sat : 1; + uint32_t dst_use : 1; + uint32_t dst_amode : 3; + uint32_t dst_reg : 7; + uint32_t dst_comps : 4; + uint32_t tex_id : 5; + + /* dword1: */ + uint32_t tex_amode : 3; + uint32_t tex_swiz : 8; + uint32_t src0_use : 1; + uint32_t src0_reg : 9; + uint32_t type_bit2 : 1; + uint32_t src0_swiz : 8; + uint32_t src0_neg : 1; + uint32_t src0_abs : 1; + + /* dword2: */ + uint32_t src0_amode : 3; + uint32_t src0_rgroup : 3; + uint32_t src1_use : 1; + uint32_t src1_reg : 9; + uint32_t opcode_bit6 : 1; + uint32_t src1_swiz : 8; + uint32_t src1_neg : 1; + uint32_t src1_abs : 1; + uint32_t src1_amode : 3; + uint32_t type_bit01 : 2; + + /* dword3: */ + union { + struct { + uint32_t src1_rgroup : 3; + uint32_t src2_use : 1; + uint32_t src2_reg : 9; + uint32_t unk3_13 : 1; + uint32_t src2_swiz : 8; + uint32_t src2_neg : 1; + uint32_t src2_abs : 1; + uint32_t unk3_24 : 1; + uint32_t src2_amode : 3; + uint32_t src2_rgroup : 3; + uint32_t unk3_31 : 1; + }; + uint32_t dword3; + }; +}; + +struct dst_operand { + bool use; + uint8_t amode; + uint16_t reg; + uint8_t comps; +}; + +struct src_operand { + bool use; + bool neg; + bool abs; + uint8_t rgroup; + uint16_t reg; + uint8_t swiz; + uint8_t amode; +}; + +struct tex_operand { + uint8_t id; + uint8_t amode; + uint8_t swiz; +}; + +struct opc_operands { + struct dst_operand *dst; + struct tex_operand *tex; + struct src_operand *src0; + struct src_operand *src1; + struct src_operand *src2; + + int imm; +}; + +static void +printf_type(uint8_t type) +{ + switch(type) { + case INST_TYPE_F32: + /* as f32 is the default print nothing */ + break; + + case INST_TYPE_S32: + printf(".s32"); + break; + + case INST_TYPE_S8: + printf(".s8"); + break; + + case INST_TYPE_U16: + printf(".u16"); + break; + + case INST_TYPE_F16: + printf(".f16"); + break; + + case INST_TYPE_S16: + printf(".s16"); + break; + + case INST_TYPE_U32: + printf(".u32"); + break; + + case INST_TYPE_U8: + printf(".u8"); + break; + + default: + abort(); + break; + } +} + +static void +print_condition(uint8_t condition) +{ + switch (condition) { + case INST_CONDITION_TRUE: + break; + + case INST_CONDITION_GT: + printf(".GT"); + break; + + case INST_CONDITION_LT: + printf(".LT"); + break; + + case INST_CONDITION_GE: + printf(".GE"); + break; + + case INST_CONDITION_LE: + printf(".LE"); + break; + + case INST_CONDITION_EQ: + printf(".EQ"); + break; + + case INST_CONDITION_NE: + printf(".NE"); + break; + + case INST_CONDITION_AND: + printf(".AND"); + break; + + case INST_CONDITION_OR: + printf(".OR"); + break; + + case INST_CONDITION_XOR: + printf(".XOR"); + break; + + case INST_CONDITION_NOT: + printf(".NOT"); + break; + + case INST_CONDITION_NZ: + printf(".NZ"); + break; + + case INST_CONDITION_GEZ: + printf(".GEZ"); + break; + + case INST_CONDITION_GZ: + printf(".GZ"); + break; + + case INST_CONDITION_LEZ: + printf(".LEZ"); + break; + + case INST_CONDITION_LZ: + printf(".LZ"); + break; + + default: + abort(); + break; + } +} + +static void +print_rgroup(uint8_t rgoup) +{ + switch (rgoup) { + case INST_RGROUP_TEMP: + printf("t"); + break; + + case INST_RGROUP_INTERNAL: + printf("i"); + break; + + case INST_RGROUP_UNIFORM_0: + case INST_RGROUP_UNIFORM_1: + printf("u"); + break; + } +} + +static void +print_components(uint8_t components) +{ + if (components == 15) + return; + + printf("."); + if (components & INST_COMPS_X) + printf("x"); + else + printf("_"); + + if (components & INST_COMPS_Y) + printf("y"); + else + printf("_"); + + if (components & INST_COMPS_Z) + printf("z"); + else + printf("_"); + + if (components & INST_COMPS_W) + printf("w"); + else + printf("_"); +} + +static inline void +print_swiz_comp(uint8_t swiz_comp) +{ + switch (swiz_comp) { + case INST_SWIZ_COMP_X: + printf("x"); + break; + + case INST_SWIZ_COMP_Y: + printf("y"); + break; + + case INST_SWIZ_COMP_Z: + printf("z"); + break; + + case INST_SWIZ_COMP_W: + printf("w"); + break; + + default: + abort(); + break; + } +} + +static void +print_swiz(uint8_t swiz) +{ + // if a null swizzle + if (swiz == 0xe4) + return; + + const unsigned x = swiz & 0x3; + const unsigned y = (swiz & 0x0C) >> 2; + const unsigned z = (swiz & 0x30) >> 4; + const unsigned w = (swiz & 0xc0) >> 6; + + printf("."); + print_swiz_comp(x); + print_swiz_comp(y); + print_swiz_comp(z); + print_swiz_comp(w); +} + +static void +print_amode(uint8_t amode) +{ + switch (amode) { + case INST_AMODE_DIRECT: + /* nothing to output */ + break; + + case INST_AMODE_ADD_A_X: + printf("[a.x]"); + break; + + case INST_AMODE_ADD_A_Y: + printf("[a.y]"); + break; + + case INST_AMODE_ADD_A_Z: + printf("[a.z]"); + break; + + case INST_AMODE_ADD_A_W: + printf("[a.w]"); + break; + + default: + abort(); + break; + } +} + +static void +print_dst(struct dst_operand *dst, bool sep) +{ + if (dst->use) { + printf("t%u", dst->reg); + print_amode(dst->amode); + print_components(dst->comps); + } else { + printf("void"); + } + + if (sep) + printf(", "); +} + +static void +print_tex(struct tex_operand *tex, bool sep) +{ + printf("tex%u", tex->id); + print_amode(tex->amode); + print_swiz(tex->swiz); + + if (sep) + printf(", "); +} + +static void +print_src(struct src_operand *src, bool sep) +{ + if (src->use) { + if (src->neg) + printf("-"); + + if (src->abs) + printf("|"); + + if (src->rgroup == INST_RGROUP_UNIFORM_1) + src->reg += 128; + + print_rgroup(src->rgroup); + printf("%u", src->reg); + print_amode(src->amode); + print_swiz(src->swiz); + + if (src->abs) + printf("|"); + } else { + printf("void"); + } + + if (sep) + printf(", "); +} + +static void +print_opc_default(struct opc_operands *operands) +{ + print_dst(operands->dst, true); + print_src(operands->src0, true); + print_src(operands->src1, true); + print_src(operands->src2, false); +} + +static void +print_opc_mov(struct opc_operands *operands) +{ + // dst (areg) + printf("a%u", operands->dst->reg); + print_components(operands->dst->comps); + printf(", "); + + print_src(operands->src0, true); + print_src(operands->src1, true); + print_src(operands->src2, false); +} + +static void +print_opc_tex(struct opc_operands *operands) +{ + print_dst(operands->dst, true); + print_tex(operands->tex, true); + print_src(operands->src0, true); + print_src(operands->src1, true); + print_src(operands->src2, false); +} + +static void +print_opc_imm(struct opc_operands *operands) +{ + print_dst(operands->dst, true); + print_src(operands->src0, true); + print_src(operands->src1, true); + printf("label_%04d", operands->imm); +} + +#define OPC_BITS 7 + +static const struct opc_info { + const char *name; + void (*print)(struct opc_operands *operands); +} opcs[1 << OPC_BITS] = { +#define OPC(opc) [INST_OPCODE_##opc] = {#opc, print_opc_default} +#define OPC_MOV(opc) [INST_OPCODE_##opc] = {#opc, print_opc_mov} +#define OPC_TEX(opc) [INST_OPCODE_##opc] = {#opc, print_opc_tex} +#define OPC_IMM(opc) [INST_OPCODE_##opc] = {#opc, print_opc_imm} + OPC(NOP), + OPC(ADD), + OPC(MAD), + OPC(MUL), + OPC(DST), + OPC(DP3), + OPC(DP4), + OPC(DSX), + OPC(DSY), + OPC(MOV), + OPC_MOV(MOVAR), + OPC_MOV(MOVAF), + OPC(RCP), + OPC(RSQ), + OPC(LITP), + OPC(SELECT), + OPC(SET), + OPC(EXP), + OPC(LOG), + OPC(FRC), + OPC_IMM(CALL), + OPC(RET), + OPC_IMM(BRANCH), + OPC_TEX(TEXKILL), + OPC_TEX(TEXLD), + OPC_TEX(TEXLDB), + OPC_TEX(TEXLDD), + OPC_TEX(TEXLDL), + OPC_TEX(TEXLDPCF), + OPC(REP), + OPC(ENDREP), + OPC(LOOP), + OPC(ENDLOOP), + OPC(SQRT), + OPC(SIN), + OPC(COS), + OPC(FLOOR), + OPC(CEIL), + OPC(SIGN), + OPC(I2F), + OPC(CMP), + OPC(LOAD), + OPC(STORE), + OPC(IMULLO0), + OPC(IMULHI0), + OPC(LEADZERO), + OPC(LSHIFT), + OPC(RSHIFT), + OPC(ROTATE), + OPC(OR), + OPC(AND), + OPC(XOR), + OPC(NOT), +}; + +static void +print_instr(uint32_t *dwords, int n, enum debug_t debug) +{ + struct instr *instr = (struct instr *)dwords; + const unsigned opc = instr->opc | (instr->opcode_bit6 << 6); + const char *name = opcs[opc].name; + + printf("%04d: ", n); + if (debug & PRINT_RAW) + printf("%08x %08x %08x %08x ", dwords[0], dwords[1], dwords[2], + dwords[3]); + + if (name) { + + struct dst_operand dst = { + .use = instr->dst_use, + .amode = instr->dst_amode, + .reg = instr->dst_reg, + .comps = instr->dst_comps + }; + + struct tex_operand tex = { + .id = instr->tex_id, + .amode = instr->tex_amode, + .swiz = instr->tex_swiz, + }; + + struct src_operand src0 = { + .use = instr->src0_use, + .neg = instr->src0_neg, + .abs = instr->src0_abs, + .rgroup = instr->src0_rgroup, + .reg = instr->src0_reg, + .swiz = instr->src0_swiz, + .amode = instr->src0_amode, + }; + + struct src_operand src1 = { + .use = instr->src1_use, + .neg = instr->src1_neg, + .abs = instr->src1_abs, + .rgroup = instr->src1_rgroup, + .reg = instr->src1_reg, + .swiz = instr->src1_swiz, + .amode = instr->src1_amode, + }; + + struct src_operand src2 = { + .use = instr->src2_use, + .neg = instr->src2_neg, + .abs = instr->src2_abs, + .rgroup = instr->src2_rgroup, + .reg = instr->src2_reg, + .swiz = instr->src2_swiz, + .amode = instr->src2_amode, + }; + + int imm = (instr->dword3 & VIV_ISA_WORD_3_SRC2_IMM__MASK) + >> VIV_ISA_WORD_3_SRC2_IMM__SHIFT; + + struct opc_operands operands = { + .dst = &dst, + .tex = &tex, + .src0 = &src0, + .src1 = &src1, + .src2 = &src2, + .imm = imm, + }; + + uint8_t type = instr->type_bit01 | (instr->type_bit2 << 2); + + printf("%s", name); + printf_type(type); + if (instr->sat) + printf(".SAT"); + print_condition(instr->cond); + printf(" "); + opcs[opc].print(&operands); + } else { + printf("unknown (%d)", instr->opc); + } + + printf("\n"); +} + +void +etna_disasm(uint32_t *dwords, int sizedwords, enum debug_t debug) +{ + unsigned i; + + assert((sizedwords % 2) == 0); + + for (i = 0; i < sizedwords; i += 4) + print_instr(&dwords[i], i / 4, debug); +} diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_disasm.h mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_disasm.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_disasm.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_disasm.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,40 @@ +/* + * Copyright (c) 2016 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Christian Gmeiner + */ + +#ifndef H_ETNAVIV_DISASM +#define H_ETNAVIV_DISASM + +#include + +/* bitmask of print flags */ +enum debug_t { + PRINT_RAW = 0x1, /* dump raw hexdump */ +}; + +void +etna_disasm(uint32_t *dwords, int sizedwords, enum debug_t debug); + +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_emit.c mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_emit.c --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_emit.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_emit.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,787 @@ +/* + * Copyright (c) 2014-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + */ + +#include "etnaviv_emit.h" + +#include "etnaviv_blend.h" +#include "etnaviv_compiler.h" +#include "etnaviv_context.h" +#include "etnaviv_rasterizer.h" +#include "etnaviv_resource.h" +#include "etnaviv_rs.h" +#include "etnaviv_screen.h" +#include "etnaviv_shader.h" +#include "etnaviv_texture.h" +#include "etnaviv_translate.h" +#include "etnaviv_uniforms.h" +#include "etnaviv_util.h" +#include "etnaviv_zsa.h" +#include "hw/common.xml.h" +#include "hw/state.xml.h" +#include "util/u_math.h" + +struct etna_coalesce { + uint32_t start; + uint32_t last_reg; + uint32_t last_fixp; +}; + +/* Queue a STALL command (queues 2 words) */ +static inline void +CMD_STALL(struct etna_cmd_stream *stream, uint32_t from, uint32_t to) +{ + etna_cmd_stream_emit(stream, VIV_FE_STALL_HEADER_OP_STALL); + etna_cmd_stream_emit(stream, VIV_FE_STALL_TOKEN_FROM(from) | VIV_FE_STALL_TOKEN_TO(to)); +} + +void +etna_stall(struct etna_cmd_stream *stream, uint32_t from, uint32_t to) +{ + etna_cmd_stream_reserve(stream, 4); + + etna_emit_load_state(stream, VIVS_GL_SEMAPHORE_TOKEN >> 2, 1, 0); + etna_cmd_stream_emit(stream, VIVS_GL_SEMAPHORE_TOKEN_FROM(from) | VIVS_GL_SEMAPHORE_TOKEN_TO(to)); + + if (from == SYNC_RECIPIENT_FE) { + /* if the frontend is to be stalled, queue a STALL frontend command */ + CMD_STALL(stream, from, to); + } else { + /* otherwise, load the STALL token state */ + etna_emit_load_state(stream, VIVS_GL_STALL_TOKEN >> 2, 1, 0); + etna_cmd_stream_emit(stream, VIVS_GL_STALL_TOKEN_FROM(from) | VIVS_GL_STALL_TOKEN_TO(to)); + } +} + +static void +etna_coalesce_start(struct etna_cmd_stream *stream, + struct etna_coalesce *coalesce) +{ + coalesce->start = etna_cmd_stream_offset(stream); + coalesce->last_reg = 0; + coalesce->last_fixp = 0; +} + +static void +etna_coalesce_end(struct etna_cmd_stream *stream, + struct etna_coalesce *coalesce) +{ + uint32_t end = etna_cmd_stream_offset(stream); + uint32_t size = end - coalesce->start; + + if (size) { + uint32_t offset = coalesce->start - 1; + uint32_t value = etna_cmd_stream_get(stream, offset); + + value |= VIV_FE_LOAD_STATE_HEADER_COUNT(size); + etna_cmd_stream_set(stream, offset, value); + } + + /* append needed padding */ + if (end % 2 == 1) + etna_cmd_stream_emit(stream, 0xdeadbeef); +} + +static void +check_coalsence(struct etna_cmd_stream *stream, struct etna_coalesce *coalesce, + uint32_t reg, uint32_t fixp) +{ + if (coalesce->last_reg != 0) { + if (((coalesce->last_reg + 4) != reg) || (coalesce->last_fixp != fixp)) { + etna_coalesce_end(stream, coalesce); + etna_emit_load_state(stream, reg >> 2, 0, fixp); + coalesce->start = etna_cmd_stream_offset(stream); + } + } else { + etna_emit_load_state(stream, reg >> 2, 0, fixp); + coalesce->start = etna_cmd_stream_offset(stream); + } + + coalesce->last_reg = reg; + coalesce->last_fixp = fixp; +} + +static inline void +etna_coalsence_emit(struct etna_cmd_stream *stream, + struct etna_coalesce *coalesce, uint32_t reg, + uint32_t value) +{ + check_coalsence(stream, coalesce, reg, 0); + etna_cmd_stream_emit(stream, value); +} + +static inline void +etna_coalsence_emit_fixp(struct etna_cmd_stream *stream, + struct etna_coalesce *coalesce, uint32_t reg, + uint32_t value) +{ + check_coalsence(stream, coalesce, reg, 1); + etna_cmd_stream_emit(stream, value); +} + +static inline void +etna_coalsence_emit_reloc(struct etna_cmd_stream *stream, + struct etna_coalesce *coalesce, uint32_t reg, + const struct etna_reloc *r) +{ + if (r->bo) { + check_coalsence(stream, coalesce, reg, 0); + etna_cmd_stream_reloc(stream, r); + } +} + +#define EMIT_STATE(state_name, src_value) \ + etna_coalsence_emit(stream, &coalesce, VIVS_##state_name, src_value) + +#define EMIT_STATE_FIXP(state_name, src_value) \ + etna_coalsence_emit_fixp(stream, &coalesce, VIVS_##state_name, src_value) + +#define EMIT_STATE_RELOC(state_name, src_value) \ + etna_coalsence_emit_reloc(stream, &coalesce, VIVS_##state_name, src_value) + +/* submit RS state, without any processing and no dependence on context + * except TS if this is a source-to-destination blit. */ +void +etna_submit_rs_state(struct etna_context *ctx, + const struct compiled_rs_state *cs) +{ + struct etna_screen *screen = etna_screen(ctx->base.screen); + struct etna_cmd_stream *stream = ctx->stream; + struct etna_coalesce coalesce; + + if (screen->specs.pixel_pipes == 1) { + etna_cmd_stream_reserve(stream, 22); + etna_coalesce_start(stream, &coalesce); + /* 0/1 */ EMIT_STATE(RS_CONFIG, cs->RS_CONFIG); + /* 2 */ EMIT_STATE_RELOC(RS_SOURCE_ADDR, &cs->source[0]); + /* 3 */ EMIT_STATE(RS_SOURCE_STRIDE, cs->RS_SOURCE_STRIDE); + /* 4 */ EMIT_STATE_RELOC(RS_DEST_ADDR, &cs->dest[0]); + /* 5 */ EMIT_STATE(RS_DEST_STRIDE, cs->RS_DEST_STRIDE); + /* 6/7 */ EMIT_STATE(RS_WINDOW_SIZE, cs->RS_WINDOW_SIZE); + /* 8/9 */ EMIT_STATE(RS_DITHER(0), cs->RS_DITHER[0]); + /*10 */ EMIT_STATE(RS_DITHER(1), cs->RS_DITHER[1]); + /*11 - pad */ + /*12/13*/ EMIT_STATE(RS_CLEAR_CONTROL, cs->RS_CLEAR_CONTROL); + /*14 */ EMIT_STATE(RS_FILL_VALUE(0), cs->RS_FILL_VALUE[0]); + /*15 */ EMIT_STATE(RS_FILL_VALUE(1), cs->RS_FILL_VALUE[1]); + /*16 */ EMIT_STATE(RS_FILL_VALUE(2), cs->RS_FILL_VALUE[2]); + /*17 */ EMIT_STATE(RS_FILL_VALUE(3), cs->RS_FILL_VALUE[3]); + /*18/19*/ EMIT_STATE(RS_EXTRA_CONFIG, cs->RS_EXTRA_CONFIG); + /*20/21*/ EMIT_STATE(RS_KICKER, 0xbeebbeeb); + etna_coalesce_end(stream, &coalesce); + } else if (screen->specs.pixel_pipes == 2) { + etna_cmd_stream_reserve(stream, 34); /* worst case - both pipes multi=1 */ + etna_coalesce_start(stream, &coalesce); + /* 0/1 */ EMIT_STATE(RS_CONFIG, cs->RS_CONFIG); + /* 2/3 */ EMIT_STATE(RS_SOURCE_STRIDE, cs->RS_SOURCE_STRIDE); + /* 4/5 */ EMIT_STATE(RS_DEST_STRIDE, cs->RS_DEST_STRIDE); + /* 6/7 */ EMIT_STATE_RELOC(RS_PIPE_SOURCE_ADDR(0), &cs->source[0]); + if (cs->RS_SOURCE_STRIDE & VIVS_RS_SOURCE_STRIDE_MULTI) { + /*8 */ EMIT_STATE_RELOC(RS_PIPE_SOURCE_ADDR(1), &cs->source[1]); + /*9 - pad */ + } + /*10/11*/ EMIT_STATE_RELOC(RS_PIPE_DEST_ADDR(0), &cs->dest[0]); + if (cs->RS_DEST_STRIDE & VIVS_RS_DEST_STRIDE_MULTI) { + /*12*/ EMIT_STATE_RELOC(RS_PIPE_DEST_ADDR(1), &cs->dest[1]); + /*13 - pad */ + } + /*14/15*/ EMIT_STATE(RS_PIPE_OFFSET(0), cs->RS_PIPE_OFFSET[0]); + /*16 */ EMIT_STATE(RS_PIPE_OFFSET(1), cs->RS_PIPE_OFFSET[1]); + /*17 - pad */ + /*18/19*/ EMIT_STATE(RS_WINDOW_SIZE, cs->RS_WINDOW_SIZE); + /*20/21*/ EMIT_STATE(RS_DITHER(0), cs->RS_DITHER[0]); + /*22 */ EMIT_STATE(RS_DITHER(1), cs->RS_DITHER[1]); + /*23 - pad */ + /*24/25*/ EMIT_STATE(RS_CLEAR_CONTROL, cs->RS_CLEAR_CONTROL); + /*26 */ EMIT_STATE(RS_FILL_VALUE(0), cs->RS_FILL_VALUE[0]); + /*27 */ EMIT_STATE(RS_FILL_VALUE(1), cs->RS_FILL_VALUE[1]); + /*28 */ EMIT_STATE(RS_FILL_VALUE(2), cs->RS_FILL_VALUE[2]); + /*29 */ EMIT_STATE(RS_FILL_VALUE(3), cs->RS_FILL_VALUE[3]); + /*30/31*/ EMIT_STATE(RS_EXTRA_CONFIG, cs->RS_EXTRA_CONFIG); + /*32/33*/ EMIT_STATE(RS_KICKER, 0xbeebbeeb); + etna_coalesce_end(stream, &coalesce); + } else { + abort(); + } +} + +/* Create bit field that specifies which samplers are active and thus need to be + * programmed + * 32 bits is enough for 32 samplers. As far as I know this is the upper bound + * supported on any Vivante hw + * up to GC4000. + */ +static uint32_t +active_samplers_bits(struct etna_context *ctx) +{ + return ctx->active_sampler_views & ctx->active_samplers; +} + +#define ETNA_3D_CONTEXT_SIZE (400) /* keep this number above "Total state updates (fixed)" from gen_weave_state tool */ + +static unsigned +required_stream_size(struct etna_context *ctx) +{ + unsigned size = ETNA_3D_CONTEXT_SIZE; + + /* stall + flush */ + size += 2 + 4; + + /* vertex elements */ + size += ctx->vertex_elements->num_elements + 1; + + /* uniforms - worst case (2 words per uniform load) */ + size += ctx->vs->uniforms.const_count * 2; + size += ctx->fs->uniforms.const_count * 2; + + /* shader */ + size += ctx->shader_state.vs_inst_mem_size + 1; + size += ctx->shader_state.ps_inst_mem_size + 1; + + /* DRAW_INDEXED_PRIMITIVES command */ + size += 6; + + /* reserve for alignment etc. */ + size += 64; + + return size; +} + +/* Weave state before draw operation. This function merges all the compiled + * state blocks under the context into one device register state. Parts of + * this state that are changed since last call (dirty) will be uploaded as + * state changes in the command buffer. */ +void +etna_emit_state(struct etna_context *ctx) +{ + struct etna_cmd_stream *stream = ctx->stream; + uint32_t active_samplers = active_samplers_bits(ctx); + + /* Pre-reserve the command buffer space which we are likely to need. + * This must cover all the state emitted below, and the following + * draw command. */ + etna_cmd_stream_reserve(stream, required_stream_size(ctx)); + + uint32_t dirty = ctx->dirty; + + /* Pre-processing: see what caches we need to flush before making state changes. */ + uint32_t to_flush = 0; + if (unlikely(dirty & (ETNA_DIRTY_BLEND))) { + /* Need flush COLOR when changing PE.COLOR_FORMAT.OVERWRITE. */ +#if 0 + /* TODO*/ + if ((ctx->gpu3d.PE_COLOR_FORMAT & VIVS_PE_COLOR_FORMAT_OVERWRITE) != + (etna_blend_state(ctx->blend)->PE_COLOR_FORMAT & VIVS_PE_COLOR_FORMAT_OVERWRITE)) +#endif + to_flush |= VIVS_GL_FLUSH_CACHE_COLOR; + } + if (unlikely(dirty & (ETNA_DIRTY_TEXTURE_CACHES))) + to_flush |= VIVS_GL_FLUSH_CACHE_TEXTURE; + if (unlikely(dirty & (ETNA_DIRTY_FRAMEBUFFER))) /* Framebuffer config changed? */ + to_flush |= VIVS_GL_FLUSH_CACHE_COLOR | VIVS_GL_FLUSH_CACHE_DEPTH; + if (DBG_ENABLED(ETNA_DBG_CFLUSH_ALL)) + to_flush |= VIVS_GL_FLUSH_CACHE_TEXTURE | VIVS_GL_FLUSH_CACHE_COLOR | VIVS_GL_FLUSH_CACHE_DEPTH; + + if (to_flush) { + etna_set_state(stream, VIVS_GL_FLUSH_CACHE, to_flush); + etna_stall(stream, SYNC_RECIPIENT_RA, SYNC_RECIPIENT_PE); + } + + /* If MULTI_SAMPLE_CONFIG.MSAA_SAMPLES changed, clobber affected shader + * state to make sure it is always rewritten. */ + if (unlikely(dirty & (ETNA_DIRTY_FRAMEBUFFER))) { + if ((ctx->gpu3d.GL_MULTI_SAMPLE_CONFIG & VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_SAMPLES__MASK) != + (ctx->framebuffer.GL_MULTI_SAMPLE_CONFIG & VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_SAMPLES__MASK)) { + /* XXX what does the GPU set these states to on MSAA samples change? + * Does it do the right thing? + * (increase/decrease as necessary) or something else? Just set some + * invalid value until we know for + * sure. */ + ctx->gpu3d.PS_INPUT_COUNT = 0xffffffff; + ctx->gpu3d.PS_TEMP_REGISTER_CONTROL = 0xffffffff; + } + } + + /* Update vertex elements. This is different from any of the other states, in that + * a) the number of vertex elements written matters: so write only active ones + * b) the vertex element states must all be written: do not skip entries that stay the same */ + if (dirty & (ETNA_DIRTY_VERTEX_ELEMENTS)) { + /* Special case: vertex elements must always be sent in full if changed */ + /*00600*/ etna_set_state_multi(stream, VIVS_FE_VERTEX_ELEMENT_CONFIG(0), + ctx->vertex_elements->num_elements, + ctx->vertex_elements->FE_VERTEX_ELEMENT_CONFIG); + } + + /* The following code is originally generated by gen_merge_state.py, to + * emit state in increasing order of address (this makes it possible to merge + * consecutive register updates into one SET_STATE command) + * + * There have been some manual changes, where the weaving operation is not + * simply bitwise or: + * - scissor fixp + * - num vertex elements + * - scissor handling + * - num samplers + * - texture lod + * - ETNA_DIRTY_TS + * - removed ETNA_DIRTY_BASE_SETUP statements -- these are guaranteed to not + * change anyway + * - PS / framebuffer interaction for MSAA + * - move update of GL_MULTI_SAMPLE_CONFIG first + * - add unlikely()/likely() + */ + struct etna_coalesce coalesce; + + etna_coalesce_start(stream, &coalesce); + + /* begin only EMIT_STATE -- make sure no new etna_reserve calls are done here + * directly + * or indirectly */ + /* multi sample config is set first, and outside of the normal sorting + * order, as changing the multisample state clobbers PS.INPUT_COUNT (and + * possibly PS.TEMP_REGISTER_CONTROL). + */ + if (unlikely(dirty & (ETNA_DIRTY_FRAMEBUFFER | ETNA_DIRTY_SAMPLE_MASK))) { + uint32_t val = VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_ENABLES(ctx->sample_mask); + val |= ctx->framebuffer.GL_MULTI_SAMPLE_CONFIG; + + /*03818*/ EMIT_STATE(GL_MULTI_SAMPLE_CONFIG, val); + } + if (likely(dirty & (ETNA_DIRTY_INDEX_BUFFER)) && + ctx->index_buffer.ib.buffer) { + /*00644*/ EMIT_STATE_RELOC(FE_INDEX_STREAM_BASE_ADDR, &ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR); + /*00648*/ EMIT_STATE(FE_INDEX_STREAM_CONTROL, ctx->index_buffer.FE_INDEX_STREAM_CONTROL); + } + if (likely(dirty & (ETNA_DIRTY_VERTEX_BUFFERS))) { + /*0064C*/ EMIT_STATE_RELOC(FE_VERTEX_STREAM_BASE_ADDR, &ctx->vertex_buffer.cvb[0].FE_VERTEX_STREAM_BASE_ADDR); + /*00650*/ EMIT_STATE(FE_VERTEX_STREAM_CONTROL, ctx->vertex_buffer.cvb[0].FE_VERTEX_STREAM_CONTROL); + } + if (likely(dirty & (ETNA_DIRTY_INDEX_BUFFER))) { + /*00674*/ EMIT_STATE(FE_PRIMITIVE_RESTART_INDEX, ctx->index_buffer.FE_PRIMITIVE_RESTART_INDEX); + } + if (likely(dirty & (ETNA_DIRTY_VERTEX_BUFFERS))) { + for (int x = 1; x < ctx->vertex_buffer.count; ++x) { + /*00680*/ EMIT_STATE_RELOC(FE_VERTEX_STREAMS_BASE_ADDR(x), &ctx->vertex_buffer.cvb[x].FE_VERTEX_STREAM_BASE_ADDR); + } + for (int x = 1; x < ctx->vertex_buffer.count; ++x) { + if (ctx->vertex_buffer.cvb[x].FE_VERTEX_STREAM_BASE_ADDR.bo) { + /*006A0*/ EMIT_STATE(FE_VERTEX_STREAMS_CONTROL(x), ctx->vertex_buffer.cvb[x].FE_VERTEX_STREAM_CONTROL); + } + } + } + if (unlikely(dirty & (ETNA_DIRTY_SHADER))) { + /*00800*/ EMIT_STATE(VS_END_PC, ctx->shader_state.VS_END_PC); + } + if (unlikely(dirty & (ETNA_DIRTY_SHADER | ETNA_DIRTY_RASTERIZER))) { + bool point_size_per_vertex = + etna_rasterizer_state(ctx->rasterizer)->point_size_per_vertex; + + /*00804*/ EMIT_STATE(VS_OUTPUT_COUNT, + point_size_per_vertex + ? ctx->shader_state.VS_OUTPUT_COUNT_PSIZE + : ctx->shader_state.VS_OUTPUT_COUNT); + } + if (unlikely(dirty & (ETNA_DIRTY_VERTEX_ELEMENTS | ETNA_DIRTY_SHADER))) { + /*00808*/ EMIT_STATE(VS_INPUT_COUNT, ctx->shader_state.VS_INPUT_COUNT); + /*0080C*/ EMIT_STATE(VS_TEMP_REGISTER_CONTROL, ctx->shader_state.VS_TEMP_REGISTER_CONTROL); + } + if (unlikely(dirty & (ETNA_DIRTY_SHADER))) { + for (int x = 0; x < 4; ++x) { + /*00810*/ EMIT_STATE(VS_OUTPUT(x), ctx->shader_state.VS_OUTPUT[x]); + } + } + if (unlikely(dirty & (ETNA_DIRTY_VERTEX_ELEMENTS | ETNA_DIRTY_SHADER))) { + for (int x = 0; x < 4; ++x) { + /*00820*/ EMIT_STATE(VS_INPUT(x), ctx->shader_state.VS_INPUT[x]); + } + } + if (unlikely(dirty & (ETNA_DIRTY_SHADER))) { + /*00830*/ EMIT_STATE(VS_LOAD_BALANCING, ctx->shader_state.VS_LOAD_BALANCING); + /*00838*/ EMIT_STATE(VS_START_PC, ctx->shader_state.VS_START_PC); + if (ctx->specs.has_shader_range_registers) { + /*0085C*/ EMIT_STATE(VS_RANGE, (ctx->shader_state.vs_inst_mem_size / 4 - 1) << 16); + } + } + if (unlikely(dirty & (ETNA_DIRTY_VIEWPORT))) { + /*00A00*/ EMIT_STATE_FIXP(PA_VIEWPORT_SCALE_X, ctx->viewport.PA_VIEWPORT_SCALE_X); + /*00A04*/ EMIT_STATE_FIXP(PA_VIEWPORT_SCALE_Y, ctx->viewport.PA_VIEWPORT_SCALE_Y); + /*00A08*/ EMIT_STATE(PA_VIEWPORT_SCALE_Z, ctx->viewport.PA_VIEWPORT_SCALE_Z); + /*00A0C*/ EMIT_STATE_FIXP(PA_VIEWPORT_OFFSET_X, ctx->viewport.PA_VIEWPORT_OFFSET_X); + /*00A10*/ EMIT_STATE_FIXP(PA_VIEWPORT_OFFSET_Y, ctx->viewport.PA_VIEWPORT_OFFSET_Y); + /*00A14*/ EMIT_STATE(PA_VIEWPORT_OFFSET_Z, ctx->viewport.PA_VIEWPORT_OFFSET_Z); + } + if (unlikely(dirty & (ETNA_DIRTY_RASTERIZER))) { + struct etna_rasterizer_state *rasterizer = etna_rasterizer_state(ctx->rasterizer); + + /*00A18*/ EMIT_STATE(PA_LINE_WIDTH, rasterizer->PA_LINE_WIDTH); + /*00A1C*/ EMIT_STATE(PA_POINT_SIZE, rasterizer->PA_POINT_SIZE); + /*00A28*/ EMIT_STATE(PA_SYSTEM_MODE, rasterizer->PA_SYSTEM_MODE); + } + if (unlikely(dirty & (ETNA_DIRTY_SHADER))) { + /*00A30*/ EMIT_STATE(PA_ATTRIBUTE_ELEMENT_COUNT, ctx->shader_state.PA_ATTRIBUTE_ELEMENT_COUNT); + } + if (unlikely(dirty & (ETNA_DIRTY_RASTERIZER | ETNA_DIRTY_SHADER))) { + uint32_t val = etna_rasterizer_state(ctx->rasterizer)->PA_CONFIG; + /*00A34*/ EMIT_STATE(PA_CONFIG, val & ctx->shader_state.PA_CONFIG); + } + if (unlikely(dirty & (ETNA_DIRTY_RASTERIZER))) { + struct etna_rasterizer_state *rasterizer = etna_rasterizer_state(ctx->rasterizer); + /*00A38*/ EMIT_STATE(PA_WIDE_LINE_WIDTH0, rasterizer->PA_LINE_WIDTH); + /*00A3C*/ EMIT_STATE(PA_WIDE_LINE_WIDTH1, rasterizer->PA_LINE_WIDTH); + } + if (unlikely(dirty & (ETNA_DIRTY_SHADER))) { + for (int x = 0; x < 10; ++x) { + /*00A40*/ EMIT_STATE(PA_SHADER_ATTRIBUTES(x), ctx->shader_state.PA_SHADER_ATTRIBUTES[x]); + } + } + if (unlikely(dirty & (ETNA_DIRTY_SCISSOR | ETNA_DIRTY_FRAMEBUFFER | + ETNA_DIRTY_RASTERIZER | ETNA_DIRTY_VIEWPORT))) { + /* this is a bit of a mess: rasterizer.scissor determines whether to use + * only the framebuffer scissor, or specific scissor state, and the + * viewport clips too so the logic spans four CSOs */ + struct etna_rasterizer_state *rasterizer = etna_rasterizer_state(ctx->rasterizer); + + uint32_t scissor_left = + MAX2(ctx->framebuffer.SE_SCISSOR_LEFT, ctx->viewport.SE_SCISSOR_LEFT); + uint32_t scissor_top = + MAX2(ctx->framebuffer.SE_SCISSOR_TOP, ctx->viewport.SE_SCISSOR_TOP); + uint32_t scissor_right = + MIN2(ctx->framebuffer.SE_SCISSOR_RIGHT, ctx->viewport.SE_SCISSOR_RIGHT); + uint32_t scissor_bottom = + MIN2(ctx->framebuffer.SE_SCISSOR_BOTTOM, ctx->viewport.SE_SCISSOR_BOTTOM); + + if (rasterizer->scissor) { + scissor_left = MAX2(ctx->scissor.SE_SCISSOR_LEFT, scissor_left); + scissor_top = MAX2(ctx->scissor.SE_SCISSOR_TOP, scissor_top); + scissor_right = MIN2(ctx->scissor.SE_SCISSOR_RIGHT, scissor_right); + scissor_bottom = MIN2(ctx->scissor.SE_SCISSOR_BOTTOM, scissor_bottom); + } + + /*00C00*/ EMIT_STATE_FIXP(SE_SCISSOR_LEFT, scissor_left); + /*00C04*/ EMIT_STATE_FIXP(SE_SCISSOR_TOP, scissor_top); + /*00C08*/ EMIT_STATE_FIXP(SE_SCISSOR_RIGHT, scissor_right); + /*00C0C*/ EMIT_STATE_FIXP(SE_SCISSOR_BOTTOM, scissor_bottom); + } + if (unlikely(dirty & (ETNA_DIRTY_RASTERIZER))) { + struct etna_rasterizer_state *rasterizer = etna_rasterizer_state(ctx->rasterizer); + + /*00C10*/ EMIT_STATE(SE_DEPTH_SCALE, rasterizer->SE_DEPTH_SCALE); + /*00C14*/ EMIT_STATE(SE_DEPTH_BIAS, rasterizer->SE_DEPTH_BIAS); + /*00C18*/ EMIT_STATE(SE_CONFIG, rasterizer->SE_CONFIG); + } + if (unlikely(dirty & (ETNA_DIRTY_SCISSOR | ETNA_DIRTY_FRAMEBUFFER | + ETNA_DIRTY_RASTERIZER | ETNA_DIRTY_VIEWPORT))) { + struct etna_rasterizer_state *rasterizer = etna_rasterizer_state(ctx->rasterizer); + + uint32_t clip_right = + MIN2(ctx->framebuffer.SE_CLIP_RIGHT, ctx->viewport.SE_CLIP_RIGHT); + uint32_t clip_bottom = + MIN2(ctx->framebuffer.SE_CLIP_BOTTOM, ctx->viewport.SE_CLIP_BOTTOM); + + if (rasterizer->scissor) { + clip_right = MIN2(ctx->scissor.SE_CLIP_RIGHT, clip_right); + clip_bottom = MIN2(ctx->scissor.SE_CLIP_BOTTOM, clip_bottom); + } + + /*00C20*/ EMIT_STATE_FIXP(SE_CLIP_RIGHT, clip_right); + /*00C24*/ EMIT_STATE_FIXP(SE_CLIP_BOTTOM, clip_bottom); + } + if (unlikely(dirty & (ETNA_DIRTY_SHADER))) { + /*00E00*/ EMIT_STATE(RA_CONTROL, ctx->shader_state.RA_CONTROL); + } + if (unlikely(dirty & (ETNA_DIRTY_FRAMEBUFFER))) { + /*00E04*/ EMIT_STATE(RA_MULTISAMPLE_UNK00E04, ctx->framebuffer.RA_MULTISAMPLE_UNK00E04); + for (int x = 0; x < 4; ++x) { + /*00E10*/ EMIT_STATE(RA_MULTISAMPLE_UNK00E10(x), ctx->framebuffer.RA_MULTISAMPLE_UNK00E10[x]); + } + for (int x = 0; x < 16; ++x) { + /*00E40*/ EMIT_STATE(RA_CENTROID_TABLE(x), ctx->framebuffer.RA_CENTROID_TABLE[x]); + } + } + if (unlikely(dirty & (ETNA_DIRTY_SHADER | ETNA_DIRTY_FRAMEBUFFER))) { + /*01000*/ EMIT_STATE(PS_END_PC, ctx->shader_state.PS_END_PC); + /*01004*/ EMIT_STATE(PS_OUTPUT_REG, ctx->shader_state.PS_OUTPUT_REG); + /*01008*/ EMIT_STATE(PS_INPUT_COUNT, + ctx->framebuffer.msaa_mode + ? ctx->shader_state.PS_INPUT_COUNT_MSAA + : ctx->shader_state.PS_INPUT_COUNT); + /*0100C*/ EMIT_STATE(PS_TEMP_REGISTER_CONTROL, + ctx->framebuffer.msaa_mode + ? ctx->shader_state.PS_TEMP_REGISTER_CONTROL_MSAA + : ctx->shader_state.PS_TEMP_REGISTER_CONTROL); + /*01010*/ EMIT_STATE(PS_CONTROL, ctx->shader_state.PS_CONTROL); + /*01018*/ EMIT_STATE(PS_START_PC, ctx->shader_state.PS_START_PC); + if (ctx->specs.has_shader_range_registers) { + /*0101C*/ EMIT_STATE(PS_RANGE, ((ctx->shader_state.ps_inst_mem_size / 4 - 1 + 0x100) << 16) | + 0x100); + } + } + if (unlikely(dirty & (ETNA_DIRTY_ZSA | ETNA_DIRTY_FRAMEBUFFER))) { + uint32_t val = etna_zsa_state(ctx->zsa)->PE_DEPTH_CONFIG; + /*01400*/ EMIT_STATE(PE_DEPTH_CONFIG, val | ctx->framebuffer.PE_DEPTH_CONFIG); + } + if (unlikely(dirty & (ETNA_DIRTY_VIEWPORT))) { + /*01404*/ EMIT_STATE(PE_DEPTH_NEAR, ctx->viewport.PE_DEPTH_NEAR); + /*01408*/ EMIT_STATE(PE_DEPTH_FAR, ctx->viewport.PE_DEPTH_FAR); + } + if (unlikely(dirty & (ETNA_DIRTY_FRAMEBUFFER))) { + /*0140C*/ EMIT_STATE(PE_DEPTH_NORMALIZE, ctx->framebuffer.PE_DEPTH_NORMALIZE); + + if (ctx->specs.pixel_pipes == 1) { + /*01410*/ EMIT_STATE_RELOC(PE_DEPTH_ADDR, &ctx->framebuffer.PE_DEPTH_ADDR); + } + + /*01414*/ EMIT_STATE(PE_DEPTH_STRIDE, ctx->framebuffer.PE_DEPTH_STRIDE); + } + if (unlikely(dirty & (ETNA_DIRTY_ZSA))) { + uint32_t val = etna_zsa_state(ctx->zsa)->PE_STENCIL_OP; + /*01418*/ EMIT_STATE(PE_STENCIL_OP, val); + } + if (unlikely(dirty & (ETNA_DIRTY_ZSA | ETNA_DIRTY_STENCIL_REF))) { + uint32_t val = etna_zsa_state(ctx->zsa)->PE_STENCIL_CONFIG; + /*0141C*/ EMIT_STATE(PE_STENCIL_CONFIG, val | ctx->stencil_ref.PE_STENCIL_CONFIG); + } + if (unlikely(dirty & (ETNA_DIRTY_ZSA))) { + uint32_t val = etna_zsa_state(ctx->zsa)->PE_ALPHA_OP; + /*01420*/ EMIT_STATE(PE_ALPHA_OP, val); + } + if (unlikely(dirty & (ETNA_DIRTY_BLEND_COLOR))) { + /*01424*/ EMIT_STATE(PE_ALPHA_BLEND_COLOR, ctx->blend_color.PE_ALPHA_BLEND_COLOR); + } + if (unlikely(dirty & (ETNA_DIRTY_BLEND))) { + uint32_t val = etna_blend_state(ctx->blend)->PE_ALPHA_CONFIG; + /*01428*/ EMIT_STATE(PE_ALPHA_CONFIG, val); + } + if (unlikely(dirty & (ETNA_DIRTY_BLEND | ETNA_DIRTY_FRAMEBUFFER))) { + uint32_t val; + /* Use the components and overwrite bits in framebuffer.PE_COLOR_FORMAT + * as a mask to enable the bits from blend PE_COLOR_FORMAT */ + val = ~(VIVS_PE_COLOR_FORMAT_COMPONENTS__MASK | + VIVS_PE_COLOR_FORMAT_OVERWRITE); + val |= etna_blend_state(ctx->blend)->PE_COLOR_FORMAT; + val &= ctx->framebuffer.PE_COLOR_FORMAT; + /*0142C*/ EMIT_STATE(PE_COLOR_FORMAT, val); + } + if (unlikely(dirty & (ETNA_DIRTY_FRAMEBUFFER))) { + if (ctx->specs.pixel_pipes == 1) { + /*01430*/ EMIT_STATE_RELOC(PE_COLOR_ADDR, &ctx->framebuffer.PE_COLOR_ADDR); + /*01434*/ EMIT_STATE(PE_COLOR_STRIDE, ctx->framebuffer.PE_COLOR_STRIDE); + /*01454*/ EMIT_STATE(PE_HDEPTH_CONTROL, ctx->framebuffer.PE_HDEPTH_CONTROL); + } else if (ctx->specs.pixel_pipes == 2) { + /*01434*/ EMIT_STATE(PE_COLOR_STRIDE, ctx->framebuffer.PE_COLOR_STRIDE); + /*01454*/ EMIT_STATE(PE_HDEPTH_CONTROL, ctx->framebuffer.PE_HDEPTH_CONTROL); + /*01460*/ EMIT_STATE_RELOC(PE_PIPE_COLOR_ADDR(0), &ctx->framebuffer.PE_PIPE_COLOR_ADDR[0]); + /*01464*/ EMIT_STATE_RELOC(PE_PIPE_COLOR_ADDR(1), &ctx->framebuffer.PE_PIPE_COLOR_ADDR[1]); + /*01480*/ EMIT_STATE_RELOC(PE_PIPE_DEPTH_ADDR(0), &ctx->framebuffer.PE_PIPE_DEPTH_ADDR[0]); + /*01484*/ EMIT_STATE_RELOC(PE_PIPE_DEPTH_ADDR(1), &ctx->framebuffer.PE_PIPE_DEPTH_ADDR[1]); + } else { + abort(); + } + } + if (unlikely(dirty & (ETNA_DIRTY_STENCIL_REF))) { + /*014A0*/ EMIT_STATE(PE_STENCIL_CONFIG_EXT, ctx->stencil_ref.PE_STENCIL_CONFIG_EXT); + } + if (unlikely(dirty & (ETNA_DIRTY_BLEND))) { + struct etna_blend_state *blend = etna_blend_state(ctx->blend); + + /*014A4*/ EMIT_STATE(PE_LOGIC_OP, blend->PE_LOGIC_OP); + for (int x = 0; x < 2; ++x) { + /*014A8*/ EMIT_STATE(PE_DITHER(x), blend->PE_DITHER[x]); + } + } + if (unlikely(dirty & (ETNA_DIRTY_FRAMEBUFFER | ETNA_DIRTY_TS))) { + /*01654*/ EMIT_STATE(TS_MEM_CONFIG, ctx->framebuffer.TS_MEM_CONFIG); + /*01658*/ EMIT_STATE_RELOC(TS_COLOR_STATUS_BASE, &ctx->framebuffer.TS_COLOR_STATUS_BASE); + /*0165C*/ EMIT_STATE_RELOC(TS_COLOR_SURFACE_BASE, &ctx->framebuffer.TS_COLOR_SURFACE_BASE); + /*01660*/ EMIT_STATE(TS_COLOR_CLEAR_VALUE, ctx->framebuffer.TS_COLOR_CLEAR_VALUE); + /*01664*/ EMIT_STATE_RELOC(TS_DEPTH_STATUS_BASE, &ctx->framebuffer.TS_DEPTH_STATUS_BASE); + /*01668*/ EMIT_STATE_RELOC(TS_DEPTH_SURFACE_BASE, &ctx->framebuffer.TS_DEPTH_SURFACE_BASE); + /*0166C*/ EMIT_STATE(TS_DEPTH_CLEAR_VALUE, ctx->framebuffer.TS_DEPTH_CLEAR_VALUE); + } + if (unlikely(dirty & (ETNA_DIRTY_SAMPLER_VIEWS | ETNA_DIRTY_SAMPLERS))) { + for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) { + uint32_t val = 0; /* 0 == sampler inactive */ + + /* set active samplers to their configuration value (determined by both + * the sampler state and sampler view) */ + if ((1 << x) & active_samplers) { + struct etna_sampler_state *ss = etna_sampler_state(ctx->sampler[x]); + struct etna_sampler_view *sv = etna_sampler_view(ctx->sampler_view[x]); + + val = (ss->TE_SAMPLER_CONFIG0 & sv->TE_SAMPLER_CONFIG0_MASK) | + sv->TE_SAMPLER_CONFIG0; + } + + /*02000*/ EMIT_STATE(TE_SAMPLER_CONFIG0(x), val); + } + } + if (unlikely(dirty & (ETNA_DIRTY_SAMPLER_VIEWS))) { + struct etna_sampler_view *sv; + + for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) { + if ((1 << x) & active_samplers) { + sv = etna_sampler_view(ctx->sampler_view[x]); + /*02040*/ EMIT_STATE(TE_SAMPLER_SIZE(x), sv->TE_SAMPLER_SIZE); + } + } + for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) { + if ((1 << x) & active_samplers) { + sv = etna_sampler_view(ctx->sampler_view[x]); + /*02080*/ EMIT_STATE(TE_SAMPLER_LOG_SIZE(x), sv->TE_SAMPLER_LOG_SIZE); + } + } + } + if (unlikely(dirty & (ETNA_DIRTY_SAMPLER_VIEWS | ETNA_DIRTY_SAMPLERS))) { + struct etna_sampler_state *ss; + struct etna_sampler_view *sv; + + for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) { + if ((1 << x) & active_samplers) { + ss = etna_sampler_state(ctx->sampler[x]); + sv = etna_sampler_view(ctx->sampler_view[x]); + + /* min and max lod is determined both by the sampler and the view */ + /*020C0*/ EMIT_STATE(TE_SAMPLER_LOD_CONFIG(x), + ss->TE_SAMPLER_LOD_CONFIG | + VIVS_TE_SAMPLER_LOD_CONFIG_MAX(MIN2(ss->max_lod, sv->max_lod)) | + VIVS_TE_SAMPLER_LOD_CONFIG_MIN(MAX2(ss->min_lod, sv->min_lod))); + } + } + for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) { + if ((1 << x) & active_samplers) { + ss = etna_sampler_state(ctx->sampler[x]); + sv = etna_sampler_view(ctx->sampler_view[x]); + + /*021C0*/ EMIT_STATE(TE_SAMPLER_CONFIG1(x), ss->TE_SAMPLER_CONFIG1 | + sv->TE_SAMPLER_CONFIG1); + } + } + } + if (unlikely(dirty & (ETNA_DIRTY_SAMPLER_VIEWS))) { + for (int y = 0; y < VIVS_TE_SAMPLER_LOD_ADDR__LEN; ++y) { + for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) { + if ((1 << x) & active_samplers) { + struct etna_sampler_view *sv = etna_sampler_view(ctx->sampler_view[x]); + /*02400*/ EMIT_STATE_RELOC(TE_SAMPLER_LOD_ADDR(x, y),&sv->TE_SAMPLER_LOD_ADDR[y]); + } + } + } + } + if (unlikely(dirty & (ETNA_DIRTY_SHADER))) { + /*0381C*/ EMIT_STATE(GL_VARYING_TOTAL_COMPONENTS, ctx->shader_state.GL_VARYING_TOTAL_COMPONENTS); + /*03820*/ EMIT_STATE(GL_VARYING_NUM_COMPONENTS, ctx->shader_state.GL_VARYING_NUM_COMPONENTS); + for (int x = 0; x < 2; ++x) { + /*03828*/ EMIT_STATE(GL_VARYING_COMPONENT_USE(x), ctx->shader_state.GL_VARYING_COMPONENT_USE[x]); + } + } + etna_coalesce_end(stream, &coalesce); + /* end only EMIT_STATE */ + + /* Insert a FE/PE stall as changing the shader instructions (and maybe + * the uniforms) can corrupt the previous in-progress draw operation. + * Observed with amoeba on GC2000 during the right-to-left rendering + * of PI, and can cause GPU hangs immediately after. + * I summise that this is because the "new" locations at 0xc000 are not + * properly protected against updates as other states seem to be. Hence, + * we detect the "new" vertex shader instruction offset to apply this. */ + if (ctx->dirty & (ETNA_DIRTY_SHADER | ETNA_DIRTY_CONSTBUF) && ctx->specs.vs_offset > 0x4000) + etna_stall(ctx->stream, SYNC_RECIPIENT_FE, SYNC_RECIPIENT_PE); + + /* We need to update the uniform cache only if one of the following bits are + * set in ctx->dirty: + * - ETNA_DIRTY_SHADER + * - ETNA_DIRTY_CONSTBUF + * - uniforms_dirty_bits + * + * In case of ETNA_DIRTY_SHADER we need load all uniforms from the cache. In + * all + * other cases we can load on the changed uniforms. + */ + static const uint32_t uniform_dirty_bits = + ETNA_DIRTY_SHADER | ETNA_DIRTY_CONSTBUF; + + if (dirty & (uniform_dirty_bits | ctx->fs->uniforms_dirty_bits)) + etna_uniforms_write( + ctx, ctx->vs, &ctx->constant_buffer[PIPE_SHADER_VERTEX], + ctx->shader_state.VS_UNIFORMS, &ctx->shader_state.vs_uniforms_size); + + if (dirty & (uniform_dirty_bits | ctx->vs->uniforms_dirty_bits)) + etna_uniforms_write( + ctx, ctx->fs, &ctx->constant_buffer[PIPE_SHADER_FRAGMENT], + ctx->shader_state.PS_UNIFORMS, &ctx->shader_state.ps_uniforms_size); + + /**** Large dynamically-sized state ****/ + if (dirty & (ETNA_DIRTY_SHADER)) { + /* Special case: a new shader was loaded; simply re-load all uniforms and + * shader code at once */ + /*04000 or 0C000*/ + etna_set_state_multi(stream, ctx->specs.vs_offset, + ctx->shader_state.vs_inst_mem_size, + ctx->shader_state.VS_INST_MEM); + /*06000 or 0D000*/ + etna_set_state_multi(stream, ctx->specs.ps_offset, + ctx->shader_state.ps_inst_mem_size, + ctx->shader_state.PS_INST_MEM); + /*05000*/ etna_set_state_multi(stream, VIVS_VS_UNIFORMS(0), + ctx->shader_state.vs_uniforms_size, + ctx->shader_state.VS_UNIFORMS); + /*07000*/ etna_set_state_multi(stream, VIVS_PS_UNIFORMS(0), + ctx->shader_state.ps_uniforms_size, + ctx->shader_state.PS_UNIFORMS); + + /* Copy uniforms to gpu3d, so that incremental updates to uniforms are + * possible as long as the + * same shader remains bound */ + ctx->gpu3d.vs_uniforms_size = ctx->shader_state.vs_uniforms_size; + ctx->gpu3d.ps_uniforms_size = ctx->shader_state.ps_uniforms_size; + memcpy(ctx->gpu3d.VS_UNIFORMS, ctx->shader_state.VS_UNIFORMS, + ctx->shader_state.vs_uniforms_size * 4); + memcpy(ctx->gpu3d.PS_UNIFORMS, ctx->shader_state.PS_UNIFORMS, + ctx->shader_state.ps_uniforms_size * 4); + } else { + etna_coalesce_start(stream, &coalesce); + for (int x = 0; x < ctx->vs->uniforms.const_count; ++x) { + if (ctx->gpu3d.VS_UNIFORMS[x] != ctx->shader_state.VS_UNIFORMS[x]) { + /*05000*/ EMIT_STATE(VS_UNIFORMS(x), ctx->shader_state.VS_UNIFORMS[x]); + ctx->gpu3d.VS_UNIFORMS[x] = ctx->shader_state.VS_UNIFORMS[x]; + } + } + etna_coalesce_end(stream, &coalesce); + + etna_coalesce_start(stream, &coalesce); + for (int x = 0; x < ctx->fs->uniforms.const_count; ++x) { + if (ctx->gpu3d.PS_UNIFORMS[x] != ctx->shader_state.PS_UNIFORMS[x]) { + /*07000*/ EMIT_STATE(PS_UNIFORMS(x), ctx->shader_state.PS_UNIFORMS[x]); + ctx->gpu3d.PS_UNIFORMS[x] = ctx->shader_state.PS_UNIFORMS[x]; + } + } + etna_coalesce_end(stream, &coalesce); + } +/**** End of state update ****/ +#undef EMIT_STATE +#undef EMIT_STATE_FIXP +#undef EMIT_STATE_RELOC + ctx->dirty = 0; +} diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_emit.h mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_emit.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_emit.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_emit.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,123 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + */ + +#ifndef H_ETNA_EMIT +#define H_ETNA_EMIT + +#include "etnaviv_screen.h" +#include "etnaviv_util.h" +#include "hw/cmdstream.xml.h" + +struct etna_context; +struct compiled_rs_state; + +static inline void +etna_emit_load_state(struct etna_cmd_stream *stream, const uint16_t offset, + const uint16_t count, const int fixp) +{ + uint32_t v; + + v = VIV_FE_LOAD_STATE_HEADER_OP_LOAD_STATE | + COND(fixp, VIV_FE_LOAD_STATE_HEADER_FIXP) | + VIV_FE_LOAD_STATE_HEADER_OFFSET(offset) | + (VIV_FE_LOAD_STATE_HEADER_COUNT(count) & + VIV_FE_LOAD_STATE_HEADER_COUNT__MASK); + + etna_cmd_stream_emit(stream, v); +} + +static inline void +etna_set_state(struct etna_cmd_stream *stream, uint32_t address, uint32_t value) +{ + etna_cmd_stream_reserve(stream, 2); + etna_emit_load_state(stream, address >> 2, 1, 0); + etna_cmd_stream_emit(stream, value); +} + +static inline void +etna_set_state_reloc(struct etna_cmd_stream *stream, uint32_t address, + struct etna_reloc *reloc) +{ + etna_cmd_stream_reserve(stream, 2); + etna_emit_load_state(stream, address >> 2, 1, 0); + etna_cmd_stream_reloc(stream, reloc); +} + +static inline void +etna_set_state_multi(struct etna_cmd_stream *stream, uint32_t base, + uint32_t num, const uint32_t *values) +{ + if (num == 0) + return; + + etna_cmd_stream_reserve(stream, 1 + num + 1); /* 1 extra for potential alignment */ + etna_emit_load_state(stream, base >> 2, num, 0); + + for (uint32_t i = 0; i < num; i++) + etna_cmd_stream_emit(stream, values[i]); + + /* add potential padding */ + if ((num % 2) == 0) + etna_cmd_stream_emit(stream, 0); +} + +void +etna_stall(struct etna_cmd_stream *stream, uint32_t from, uint32_t to); + +void +etna_submit_rs_state(struct etna_context *ctx, const struct compiled_rs_state *cs); + +static inline void +etna_draw_primitives(struct etna_cmd_stream *stream, uint32_t primitive_type, + uint32_t start, uint32_t count) +{ + etna_cmd_stream_reserve(stream, 4); + + etna_cmd_stream_emit(stream, VIV_FE_DRAW_PRIMITIVES_HEADER_OP_DRAW_PRIMITIVES); + etna_cmd_stream_emit(stream, primitive_type); + etna_cmd_stream_emit(stream, start); + etna_cmd_stream_emit(stream, count); +} + +static inline void +etna_draw_indexed_primitives(struct etna_cmd_stream *stream, + uint32_t primitive_type, uint32_t start, + uint32_t count, uint32_t offset) +{ + etna_cmd_stream_reserve(stream, 5 + 1); + + etna_cmd_stream_emit(stream, VIV_FE_DRAW_INDEXED_PRIMITIVES_HEADER_OP_DRAW_INDEXED_PRIMITIVES); + etna_cmd_stream_emit(stream, primitive_type); + etna_cmd_stream_emit(stream, start); + etna_cmd_stream_emit(stream, count); + etna_cmd_stream_emit(stream, offset); + etna_cmd_stream_emit(stream, 0); +} + +void +etna_emit_state(struct etna_context *ctx); + +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_fence.c mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_fence.c --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_fence.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_fence.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + * Rob Clark + */ + +#include "etnaviv_fence.h" +#include "etnaviv_context.h" +#include "etnaviv_screen.h" + +#include "util/u_inlines.h" +#include "util/u_memory.h" + +struct pipe_fence_handle { + struct pipe_reference reference; + struct etna_context *ctx; + struct etna_screen *screen; + uint32_t timestamp; +}; + +static void +etna_screen_fence_reference(struct pipe_screen *pscreen, + struct pipe_fence_handle **ptr, + struct pipe_fence_handle *fence) +{ + if (pipe_reference(&(*ptr)->reference, &fence->reference)) + FREE(*ptr); + + *ptr = fence; +} + +static boolean +etna_screen_fence_finish(struct pipe_screen *pscreen, struct pipe_context *ctx, + struct pipe_fence_handle *fence, uint64_t timeout) +{ + if (etna_pipe_wait_ns(fence->screen->pipe, fence->timestamp, timeout)) + return false; + + return true; +} + +struct pipe_fence_handle * +etna_fence_create(struct pipe_context *pctx) +{ + struct pipe_fence_handle *fence; + struct etna_context *ctx = etna_context(pctx); + + fence = CALLOC_STRUCT(pipe_fence_handle); + if (!fence) + return NULL; + + pipe_reference_init(&fence->reference, 1); + + fence->ctx = ctx; + fence->screen = ctx->screen; + fence->timestamp = etna_cmd_stream_timestamp(ctx->stream); + + return fence; +} + +void +etna_fence_screen_init(struct pipe_screen *pscreen) +{ + pscreen->fence_reference = etna_screen_fence_reference; + pscreen->fence_finish = etna_screen_fence_finish; +} diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_fence.h mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_fence.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_fence.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_fence.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + * Rob Clark + */ + +#ifndef ETNAVIV_FENCE_H_ +#define ETNAVIV_FENCE_H_ + +#include "pipe/p_context.h" + +struct pipe_fence_handle * +etna_fence_create(struct pipe_context *pctx); + +void +etna_fence_screen_init(struct pipe_screen *pscreen); + +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_format.c mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_format.c --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_format.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_format.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,270 @@ +/* + * Copyright (c) 2016 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Christian Gmeiner + */ + +#include "etnaviv_format.h" + +#include "hw/state.xml.h" +#include "hw/state_3d.xml.h" + +#include "pipe/p_defines.h" + +/* Specifies the table of all the formats and their features. Also supplies + * the helpers that look up various data in those tables. + */ + +struct etna_format { + unsigned vtx; + unsigned tex; + unsigned rs; + boolean present; +}; + +#define RS_FORMAT_NONE ~0 + +#define RS_FORMAT_MASK 0xf +#define RS_FORMAT(x) ((x) & RS_FORMAT_MASK) +#define RS_FORMAT_RB_SWAP 0x10 + +#define RS_FORMAT_X8B8G8R8 (RS_FORMAT_X8R8G8B8 | RS_FORMAT_RB_SWAP) +#define RS_FORMAT_A8B8G8R8 (RS_FORMAT_A8R8G8B8 | RS_FORMAT_RB_SWAP) + +/* vertex + texture */ +#define VT(pipe, vtxfmt, texfmt, rsfmt) \ + [PIPE_FORMAT_##pipe] = { \ + .vtx = VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_##vtxfmt, \ + .tex = TEXTURE_FORMAT_##texfmt, \ + .rs = RS_FORMAT_##rsfmt, \ + .present = 1, \ + } + +/* texture-only */ +#define _T(pipe, fmt, rsfmt) \ + [PIPE_FORMAT_##pipe] = { \ + .vtx = ETNA_NO_MATCH, \ + .tex = TEXTURE_FORMAT_##fmt, \ + .rs = RS_FORMAT_##rsfmt, \ + .present = 1, \ + } + +/* vertex-only */ +#define V_(pipe, fmt, rsfmt) \ + [PIPE_FORMAT_##pipe] = { \ + .vtx = VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_##fmt, \ + .tex = ETNA_NO_MATCH, \ + .rs = RS_FORMAT_##rsfmt, \ + .present = 1, \ + } + +static struct etna_format formats[PIPE_FORMAT_COUNT] = { + /* 8-bit */ + V_(R8_UNORM, UNSIGNED_BYTE, NONE), + V_(R8_SNORM, BYTE, NONE), + V_(R8_UINT, UNSIGNED_BYTE, NONE), + V_(R8_SINT, BYTE, NONE), + V_(R8_USCALED, UNSIGNED_BYTE, NONE), + V_(R8_SSCALED, BYTE, NONE), + + _T(A8_UNORM, A8, NONE), + _T(L8_UNORM, L8, NONE), + _T(I8_UNORM, I8, NONE), + + /* 16-bit */ + V_(R16_UNORM, UNSIGNED_SHORT, NONE), + V_(R16_SNORM, SHORT, NONE), + V_(R16_UINT, UNSIGNED_SHORT, NONE), + V_(R16_SINT, SHORT, NONE), + V_(R16_USCALED, UNSIGNED_SHORT, NONE), + V_(R16_SSCALED, SHORT, NONE), + V_(R16_FLOAT, HALF_FLOAT, NONE), + + _T(B4G4R4A4_UNORM, A4R4G4B4, A4R4G4B4), + _T(B4G4R4X4_UNORM, X4R4G4B4, X4R4G4B4), + + _T(L8A8_UNORM, A8L8, NONE), + + _T(Z16_UNORM, D16, A4R4G4B4), + _T(B5G6R5_UNORM, R5G6B5, R5G6B5), + _T(B5G5R5A1_UNORM, A1R5G5B5, A1R5G5B5), + _T(B5G5R5X1_UNORM, X1R5G5B5, X1R5G5B5), + + V_(R8G8_UNORM, UNSIGNED_BYTE, NONE), + V_(R8G8_SNORM, BYTE, NONE), + V_(R8G8_UINT, UNSIGNED_BYTE, NONE), + V_(R8G8_SINT, BYTE, NONE), + V_(R8G8_USCALED, UNSIGNED_BYTE, NONE), + V_(R8G8_SSCALED, BYTE, NONE), + + /* 24-bit */ + V_(R8G8B8_UNORM, UNSIGNED_BYTE, NONE), + V_(R8G8B8_SNORM, BYTE, NONE), + V_(R8G8B8_UINT, UNSIGNED_BYTE, NONE), + V_(R8G8B8_SINT, BYTE, NONE), + V_(R8G8B8_USCALED, UNSIGNED_BYTE, NONE), + V_(R8G8B8_SSCALED, BYTE, NONE), + + /* 32-bit */ + V_(R32_UNORM, UNSIGNED_INT, NONE), + V_(R32_SNORM, INT, NONE), + V_(R32_SINT, INT, NONE), + V_(R32_UINT, UNSIGNED_INT, NONE), + V_(R32_USCALED, UNSIGNED_INT, NONE), + V_(R32_SSCALED, INT, NONE), + V_(R32_FLOAT, FLOAT, NONE), + V_(R32_FIXED, FIXED, NONE), + + V_(R16G16_UNORM, UNSIGNED_SHORT, NONE), + V_(R16G16_SNORM, SHORT, NONE), + V_(R16G16_UINT, UNSIGNED_SHORT, NONE), + V_(R16G16_SINT, SHORT, NONE), + V_(R16G16_USCALED, UNSIGNED_SHORT, NONE), + V_(R16G16_SSCALED, SHORT, NONE), + V_(R16G16_FLOAT, HALF_FLOAT, NONE), + + V_(A8B8G8R8_UNORM, UNSIGNED_BYTE, NONE), + + V_(R8G8B8A8_UNORM, UNSIGNED_BYTE, A8B8G8R8), + V_(R8G8B8A8_SNORM, BYTE, A8B8G8R8), + _T(R8G8B8X8_UNORM, X8B8G8R8, X8B8G8R8), + V_(R8G8B8A8_UINT, UNSIGNED_BYTE, A8B8G8R8), + V_(R8G8B8A8_SINT, BYTE, A8B8G8R8), + V_(R8G8B8A8_USCALED, UNSIGNED_BYTE, A8B8G8R8), + V_(R8G8B8A8_SSCALED, BYTE, A8B8G8R8), + + _T(R8G8B8A8_UNORM, A8B8G8R8, A8B8G8R8), + _T(R8G8B8X8_UNORM, X8B8G8R8, X8B8G8R8), + + _T(B8G8R8A8_UNORM, A8R8G8B8, A8R8G8B8), + _T(B8G8R8X8_UNORM, X8R8G8B8, X8R8G8B8), + + V_(R10G10B10A2_UNORM, UNSIGNED_INT_10_10_10_2, NONE), + V_(R10G10B10A2_SNORM, INT_10_10_10_2, NONE), + V_(R10G10B10A2_USCALED, UNSIGNED_INT_10_10_10_2, NONE), + V_(R10G10B10A2_SSCALED, INT_10_10_10_2, NONE), + + _T(X8Z24_UNORM, D24S8, A8R8G8B8), + _T(S8_UINT_Z24_UNORM, D24S8, A8R8G8B8), + + /* 48-bit */ + V_(R16G16B16_UNORM, UNSIGNED_SHORT, NONE), + V_(R16G16B16_SNORM, SHORT, NONE), + V_(R16G16B16_UINT, UNSIGNED_SHORT, NONE), + V_(R16G16B16_SINT, SHORT, NONE), + V_(R16G16B16_USCALED, UNSIGNED_SHORT, NONE), + V_(R16G16B16_SSCALED, SHORT, NONE), + V_(R16G16B16_FLOAT, HALF_FLOAT, NONE), + + /* 64-bit */ + V_(R16G16B16A16_UNORM, UNSIGNED_SHORT, NONE), + V_(R16G16B16A16_SNORM, SHORT, NONE), + V_(R16G16B16A16_UINT, UNSIGNED_SHORT, NONE), + V_(R16G16B16A16_SINT, SHORT, NONE), + V_(R16G16B16A16_USCALED, UNSIGNED_SHORT, NONE), + V_(R16G16B16A16_SSCALED, SHORT, NONE), + V_(R16G16B16A16_FLOAT, HALF_FLOAT, NONE), + + V_(R32G32_UNORM, UNSIGNED_INT, NONE), + V_(R32G32_SNORM, INT, NONE), + V_(R32G32_UINT, UNSIGNED_INT, NONE), + V_(R32G32_SINT, INT, NONE), + V_(R32G32_USCALED, UNSIGNED_INT, NONE), + V_(R32G32_SSCALED, INT, NONE), + V_(R32G32_FLOAT, FLOAT, NONE), + V_(R32G32_FIXED, FIXED, NONE), + + /* 96-bit */ + V_(R32G32B32_UNORM, UNSIGNED_INT, NONE), + V_(R32G32B32_SNORM, INT, NONE), + V_(R32G32B32_UINT, UNSIGNED_INT, NONE), + V_(R32G32B32_SINT, INT, NONE), + V_(R32G32B32_USCALED, UNSIGNED_INT, NONE), + V_(R32G32B32_SSCALED, INT, NONE), + V_(R32G32B32_FLOAT, FLOAT, NONE), + V_(R32G32B32_FIXED, FIXED, NONE), + + /* 128-bit */ + V_(R32G32B32A32_UNORM, UNSIGNED_INT, NONE), + V_(R32G32B32A32_SNORM, INT, NONE), + V_(R32G32B32A32_UINT, UNSIGNED_INT, NONE), + V_(R32G32B32A32_SINT, INT, NONE), + V_(R32G32B32A32_USCALED, UNSIGNED_INT, NONE), + V_(R32G32B32A32_SSCALED, INT, NONE), + V_(R32G32B32A32_FLOAT, FLOAT, NONE), + V_(R32G32B32A32_FIXED, FIXED, NONE), + + /* compressed */ + _T(ETC1_RGB8, ETC1, NONE), + + _T(DXT1_RGB, DXT1, NONE), + _T(DXT1_RGBA, DXT1, NONE), + _T(DXT3_RGBA, DXT2_DXT3, NONE), + _T(DXT3_RGBA, DXT2_DXT3, NONE), + _T(DXT5_RGBA, DXT4_DXT5, NONE), + + /* YUV */ + _T(YUYV, YUY2, YUY2), + _T(UYVY, UYVY, NONE), +}; + +uint32_t +translate_texture_format(enum pipe_format fmt) +{ + /* XXX with TEXTURE_FORMAT_EXT and swizzle on newer chips we can + * support much more */ + if (!formats[fmt].present) + return ETNA_NO_MATCH; + + return formats[fmt].tex; +} + +uint32_t +translate_rs_format(enum pipe_format fmt) +{ + if (!formats[fmt].present) + return ETNA_NO_MATCH; + + if (formats[fmt].rs == ETNA_NO_MATCH) + return ETNA_NO_MATCH; + + return RS_FORMAT(formats[fmt].rs); +} + +int +translate_rs_format_rb_swap(enum pipe_format fmt) +{ + assert(formats[fmt].present); + + return formats[fmt].rs & RS_FORMAT_RB_SWAP; +} + +/* Return type flags for vertex element format */ +uint32_t +translate_vertex_format_type(enum pipe_format fmt) +{ + if (!formats[fmt].present) + return ETNA_NO_MATCH; + + return formats[fmt].vtx; +} diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_format.h mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_format.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_format.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_format.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2016 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Christian Gmeiner + */ + +#ifndef ETNAVIV_FORMAT_H_ +#define ETNAVIV_FORMAT_H_ + +#include "util/u_format.h" +#include + +#define ETNA_NO_MATCH (~0) + +uint32_t +translate_texture_format(enum pipe_format fmt); + +uint32_t +translate_rs_format(enum pipe_format fmt); + +int +translate_rs_format_rb_swap(enum pipe_format fmt); + +uint32_t +translate_vertex_format_type(enum pipe_format fmt); + +#endif /* ETNAVIV_FORMAT_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_internal.h mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_internal.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_internal.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_internal.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,278 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef H_ETNA_INTERNAL +#define H_ETNA_INTERNAL + +#include +#include +#include + +#include "hw/state.xml.h" +#include "hw/state_3d.xml.h" + +#include + +#define ETNA_NUM_INPUTS (16) +#define ETNA_NUM_VARYINGS 8 +#define ETNA_NUM_LOD (14) +#define ETNA_NUM_LAYERS (6) +#define ETNA_MAX_UNIFORMS (256) +#define ETNA_MAX_PIXELPIPES 2 + +/* All RS operations must have width%16 = 0 */ +#define ETNA_RS_WIDTH_MASK (16 - 1) +/* RS tiled operations must have height%4 = 0 */ +#define ETNA_RS_HEIGHT_MASK (3) +/* PE render targets must be aligned to 64 bytes */ +#define ETNA_PE_ALIGNMENT (64) + +/* These demarcate the margin (fixp16) between the computed sizes and the + value sent to the chip. These have been set to the numbers used by the + Vivante driver on gc2000. They used to be -1 for scissor right and bottom. I + am not sure whether older hardware was relying on these or they were just a + guess. But if so, these need to be moved to the _specs structure. +*/ +#define ETNA_SE_SCISSOR_MARGIN_RIGHT (0x1119) +#define ETNA_SE_SCISSOR_MARGIN_BOTTOM (0x1111) +#define ETNA_SE_CLIP_MARGIN_RIGHT (0xffff) +#define ETNA_SE_CLIP_MARGIN_BOTTOM (0xffff) + +/* GPU chip 3D specs */ +struct etna_specs { + /* supports SUPERTILE (64x64) tiling? */ + unsigned can_supertile : 1; + /* needs z=(z+w)/2, for older GCxxx */ + unsigned vs_need_z_div : 1; + /* supports trigonometric instructions */ + unsigned has_sin_cos_sqrt : 1; + /* has SIGN/FLOOR/CEIL instructions */ + unsigned has_sign_floor_ceil : 1; + /* can use VS_RANGE, PS_RANGE registers*/ + unsigned has_shader_range_registers : 1; + /* has the new sin/cos functions */ + unsigned has_new_sin_cos : 1; + /* can use any kind of wrapping mode on npot textures */ + unsigned npot_tex_any_wrap; + /* number of bits per TS tile */ + unsigned bits_per_tile; + /* clear value for TS (dependent on bits_per_tile) */ + uint32_t ts_clear_value; + /* base of vertex texture units */ + unsigned vertex_sampler_offset; + /* number of fragment sampler units */ + unsigned fragment_sampler_count; + /* number of vertex sampler units */ + unsigned vertex_sampler_count; + /* size of vertex shader output buffer */ + unsigned vertex_output_buffer_size; + /* maximum number of vertex element configurations */ + unsigned vertex_max_elements; + /* size of a cached vertex (?) */ + unsigned vertex_cache_size; + /* number of shader cores */ + unsigned shader_core_count; + /* number of vertex streams */ + unsigned stream_count; + /* vertex shader memory address*/ + uint32_t vs_offset; + /* pixel shader memory address*/ + uint32_t ps_offset; + /* vertex/fragment shader max instructions */ + uint32_t max_instructions; + /* maximum number of varyings */ + unsigned max_varyings; + /* maximum number of registers */ + unsigned max_registers; + /* maximum vertex uniforms */ + unsigned max_vs_uniforms; + /* maximum pixel uniforms */ + unsigned max_ps_uniforms; + /* maximum texture size */ + unsigned max_texture_size; + /* maximum texture size */ + unsigned max_rendertarget_size; + /* available pixel pipes */ + unsigned pixel_pipes; + /* number of constants */ + unsigned num_constants; +}; + +/* Compiled Gallium state. All the different compiled state atoms are woven + * together and uploaded only when it is necessary to synchronize the state, + * for example before rendering. */ + +/* Compiled pipe_blend_color */ +struct compiled_blend_color { + uint32_t PE_ALPHA_BLEND_COLOR; +}; + +/* Compiled pipe_stencil_ref */ +struct compiled_stencil_ref { + uint32_t PE_STENCIL_CONFIG; + uint32_t PE_STENCIL_CONFIG_EXT; +}; + +/* Compiled pipe_scissor_state */ +struct compiled_scissor_state { + uint32_t SE_SCISSOR_LEFT; + uint32_t SE_SCISSOR_TOP; + uint32_t SE_SCISSOR_RIGHT; + uint32_t SE_SCISSOR_BOTTOM; + uint32_t SE_CLIP_RIGHT; + uint32_t SE_CLIP_BOTTOM; +}; + +/* Compiled pipe_viewport_state */ +struct compiled_viewport_state { + uint32_t PA_VIEWPORT_SCALE_X; + uint32_t PA_VIEWPORT_SCALE_Y; + uint32_t PA_VIEWPORT_SCALE_Z; + uint32_t PA_VIEWPORT_OFFSET_X; + uint32_t PA_VIEWPORT_OFFSET_Y; + uint32_t PA_VIEWPORT_OFFSET_Z; + uint32_t SE_SCISSOR_LEFT; + uint32_t SE_SCISSOR_TOP; + uint32_t SE_SCISSOR_RIGHT; + uint32_t SE_SCISSOR_BOTTOM; + uint32_t SE_CLIP_RIGHT; + uint32_t SE_CLIP_BOTTOM; + uint32_t PE_DEPTH_NEAR; + uint32_t PE_DEPTH_FAR; +}; + +/* Compiled pipe_framebuffer_state */ +struct compiled_framebuffer_state { + struct pipe_surface *cbuf, *zsbuf; /* keep reference to surfaces */ + uint32_t GL_MULTI_SAMPLE_CONFIG; + uint32_t PE_COLOR_FORMAT; + uint32_t PE_DEPTH_CONFIG; + struct etna_reloc PE_DEPTH_ADDR; + struct etna_reloc PE_PIPE_DEPTH_ADDR[ETNA_MAX_PIXELPIPES]; + uint32_t PE_DEPTH_STRIDE; + uint32_t PE_HDEPTH_CONTROL; + uint32_t PE_DEPTH_NORMALIZE; + struct etna_reloc PE_COLOR_ADDR; + struct etna_reloc PE_PIPE_COLOR_ADDR[ETNA_MAX_PIXELPIPES]; + uint32_t PE_COLOR_STRIDE; + uint32_t SE_SCISSOR_LEFT; + uint32_t SE_SCISSOR_TOP; + uint32_t SE_SCISSOR_RIGHT; + uint32_t SE_SCISSOR_BOTTOM; + uint32_t SE_CLIP_RIGHT; + uint32_t SE_CLIP_BOTTOM; + uint32_t RA_MULTISAMPLE_UNK00E04; + uint32_t RA_MULTISAMPLE_UNK00E10[VIVS_RA_MULTISAMPLE_UNK00E10__LEN]; + uint32_t RA_CENTROID_TABLE[VIVS_RA_CENTROID_TABLE__LEN]; + uint32_t TS_MEM_CONFIG; + uint32_t TS_DEPTH_CLEAR_VALUE; + struct etna_reloc TS_DEPTH_STATUS_BASE; + struct etna_reloc TS_DEPTH_SURFACE_BASE; + uint32_t TS_COLOR_CLEAR_VALUE; + struct etna_reloc TS_COLOR_STATUS_BASE; + struct etna_reloc TS_COLOR_SURFACE_BASE; + bool msaa_mode; /* adds input (and possible temp) to PS */ +}; + +/* Compiled context->create_vertex_elements_state */ +struct compiled_vertex_elements_state { + unsigned num_elements; + uint32_t FE_VERTEX_ELEMENT_CONFIG[VIVS_FE_VERTEX_ELEMENT_CONFIG__LEN]; +}; + +/* Compiled context->set_vertex_buffer result */ +struct compiled_set_vertex_buffer { + uint32_t FE_VERTEX_STREAM_CONTROL; + struct etna_reloc FE_VERTEX_STREAM_BASE_ADDR; +}; + +/* Compiled linked VS+PS shader state */ +struct compiled_shader_state { + uint32_t RA_CONTROL; + uint32_t PA_ATTRIBUTE_ELEMENT_COUNT; + uint32_t PA_CONFIG; + uint32_t PA_SHADER_ATTRIBUTES[VIVS_PA_SHADER_ATTRIBUTES__LEN]; + uint32_t VS_END_PC; + uint32_t VS_OUTPUT_COUNT; /* number of outputs if point size per vertex disabled */ + uint32_t VS_OUTPUT_COUNT_PSIZE; /* number of outputs of point size per vertex enabled */ + uint32_t VS_INPUT_COUNT; + uint32_t VS_TEMP_REGISTER_CONTROL; + uint32_t VS_OUTPUT[4]; + uint32_t VS_INPUT[4]; + uint32_t VS_LOAD_BALANCING; + uint32_t VS_START_PC; + uint32_t PS_END_PC; + uint32_t PS_OUTPUT_REG; + uint32_t PS_INPUT_COUNT; + uint32_t PS_INPUT_COUNT_MSAA; /* Adds an input */ + uint32_t PS_TEMP_REGISTER_CONTROL; + uint32_t PS_TEMP_REGISTER_CONTROL_MSAA; /* Adds a temporary if needed to make space for extra input */ + uint32_t PS_CONTROL; + uint32_t PS_START_PC; + uint32_t GL_VARYING_TOTAL_COMPONENTS; + uint32_t GL_VARYING_NUM_COMPONENTS; + uint32_t GL_VARYING_COMPONENT_USE[2]; + unsigned vs_inst_mem_size; + unsigned vs_uniforms_size; + unsigned ps_inst_mem_size; + unsigned ps_uniforms_size; + uint32_t *VS_INST_MEM; + uint32_t VS_UNIFORMS[ETNA_MAX_UNIFORMS * 4]; + uint32_t *PS_INST_MEM; + uint32_t PS_UNIFORMS[ETNA_MAX_UNIFORMS * 4]; +}; + +/* state of some 3d and common registers relevant to etna driver */ +struct etna_3d_state { + unsigned vs_uniforms_size; + unsigned ps_uniforms_size; + + uint32_t /*01008*/ PS_INPUT_COUNT; + uint32_t /*0100C*/ PS_TEMP_REGISTER_CONTROL; + uint32_t /*03818*/ GL_MULTI_SAMPLE_CONFIG; + uint32_t /*05000*/ VS_UNIFORMS[VIVS_VS_UNIFORMS__LEN]; + uint32_t /*07000*/ PS_UNIFORMS[VIVS_PS_UNIFORMS__LEN]; +}; + +/* Helpers to assist creating and setting bitarrays (eg, for varyings). + * field_size must be a power of two, and <= 32. */ +#define DEFINE_ETNA_BITARRAY(name, num, field_size) \ + uint32_t name[(num) * (field_size) / 32] + +static inline void +etna_bitarray_set(uint32_t *array, size_t array_size, size_t field_size, + size_t index, uint32_t value) +{ + size_t shift = (index * field_size) % 32; + size_t offset = (index * field_size) / 32; + + assert(index < array_size * 32 / field_size); + assert(value < 1 << field_size); + + array[offset] |= value << shift; +} + +#define etna_bitarray_set(array, field_size, index, value) \ + etna_bitarray_set((array), ARRAY_SIZE(array), field_size, index, value) + +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_query.c mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_query.c --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_query.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_query.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,120 @@ +/* + * Copyright (c) 2016 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Rob Clark + * Christian Gmeiner + */ + +#include "pipe/p_screen.h" + +#include "etnaviv_context.h" +#include "etnaviv_query.h" +#include "etnaviv_query_sw.h" + +static struct pipe_query * +etna_create_query(struct pipe_context *pctx, unsigned query_type, + unsigned index) +{ + struct etna_context *ctx = etna_context(pctx); + struct etna_query *q; + + q = etna_sw_create_query(ctx, query_type); + + return (struct pipe_query *)q; +} + +static void +etna_destroy_query(struct pipe_context *pctx, struct pipe_query *pq) +{ + struct etna_query *q = etna_query(pq); + + q->funcs->destroy_query(etna_context(pctx), q); +} + +static boolean +etna_begin_query(struct pipe_context *pctx, struct pipe_query *pq) +{ + struct etna_query *q = etna_query(pq); + + return q->funcs->begin_query(etna_context(pctx), q); +} + +static bool +etna_end_query(struct pipe_context *pctx, struct pipe_query *pq) +{ + struct etna_query *q = etna_query(pq); + + q->funcs->end_query(etna_context(pctx), q); + return true; +} + +static boolean +etna_get_query_result(struct pipe_context *pctx, struct pipe_query *pq, + boolean wait, union pipe_query_result *result) +{ + struct etna_query *q = etna_query(pq); + + return q->funcs->get_query_result(etna_context(pctx), q, wait, result); +} + +static int +etna_get_driver_query_info(struct pipe_screen *pscreen, unsigned index, + struct pipe_driver_query_info *info) +{ + struct pipe_driver_query_info list[] = { + {"prims-emitted", PIPE_QUERY_PRIMITIVES_EMITTED, { 0 }}, + {"draw-calls", ETNA_QUERY_DRAW_CALLS, { 0 }}, + }; + + if (!info) + return ARRAY_SIZE(list); + + if (index >= ARRAY_SIZE(list)) + return 0; + + *info = list[index]; + + return 1; +} + +static void +etna_set_active_query_state(struct pipe_context *pipe, boolean enable) +{ +} + +void +etna_query_screen_init(struct pipe_screen *pscreen) +{ + pscreen->get_driver_query_info = etna_get_driver_query_info; +} + +void +etna_query_context_init(struct pipe_context *pctx) +{ + pctx->create_query = etna_create_query; + pctx->destroy_query = etna_destroy_query; + pctx->begin_query = etna_begin_query; + pctx->end_query = etna_end_query; + pctx->get_query_result = etna_get_query_result; + pctx->set_active_query_state = etna_set_active_query_state; +} diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_query.h mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_query.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_query.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_query.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2016 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Rob Clark + * Christian Gmeiner + */ + +#ifndef H_ETNAVIV_QUERY +#define H_ETNAVIV_QUERY + +#include "pipe/p_context.h" + +struct etna_context; +struct etna_query; + +struct etna_query_funcs { + void (*destroy_query)(struct etna_context *ctx, struct etna_query *q); + boolean (*begin_query)(struct etna_context *ctx, struct etna_query *q); + void (*end_query)(struct etna_context *ctx, struct etna_query *q); + boolean (*get_query_result)(struct etna_context *ctx, struct etna_query *q, + boolean wait, union pipe_query_result *result); +}; + +struct etna_query { + const struct etna_query_funcs *funcs; + bool active; + int type; +}; + +static inline struct etna_query * +etna_query(struct pipe_query *pq) +{ + return (struct etna_query *)pq; +} + +#define ETNA_QUERY_DRAW_CALLS (PIPE_QUERY_DRIVER_SPECIFIC + 0) + +void +etna_query_screen_init(struct pipe_screen *pscreen); + +void +etna_query_context_init(struct pipe_context *pctx); + +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_query_sw.c mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_query_sw.c --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_query_sw.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_query_sw.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,123 @@ +/* + * Copyright (c) 2016 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Rob Clark + * Christian Gmeiner + */ + +#include "os/os_time.h" +#include "pipe/p_state.h" +#include "util/u_inlines.h" +#include "util/u_memory.h" +#include "util/u_string.h" + +#include "etnaviv_context.h" +#include "etnaviv_query_sw.h" + +static void +etna_sw_destroy_query(struct etna_context *ctx, struct etna_query *q) +{ + struct etna_sw_query *sq = etna_sw_query(q); + + FREE(sq); +} + +static uint64_t +read_counter(struct etna_context *ctx, int type) +{ + switch (type) { + case PIPE_QUERY_PRIMITIVES_EMITTED: + return ctx->stats.prims_emitted; + case ETNA_QUERY_DRAW_CALLS: + return ctx->stats.draw_calls; + } + + return 0; +} + +static boolean +etna_sw_begin_query(struct etna_context *ctx, struct etna_query *q) +{ + struct etna_sw_query *sq = etna_sw_query(q); + + q->active = true; + sq->begin_value = read_counter(ctx, q->type); + + return true; +} + +static void +etna_sw_end_query(struct etna_context *ctx, struct etna_query *q) +{ + struct etna_sw_query *sq = etna_sw_query(q); + + q->active = false; + sq->end_value = read_counter(ctx, q->type); +} + +static boolean +etna_sw_get_query_result(struct etna_context *ctx, struct etna_query *q, + boolean wait, union pipe_query_result *result) +{ + struct etna_sw_query *sq = etna_sw_query(q); + + if (q->active) + return false; + + util_query_clear_result(result, q->type); + result->u64 = sq->end_value - sq->begin_value; + + return true; +} + +static const struct etna_query_funcs sw_query_funcs = { + .destroy_query = etna_sw_destroy_query, + .begin_query = etna_sw_begin_query, + .end_query = etna_sw_end_query, + .get_query_result = etna_sw_get_query_result, +}; + +struct etna_query * +etna_sw_create_query(struct etna_context *ctx, unsigned query_type) +{ + struct etna_sw_query *sq; + struct etna_query *q; + + switch (query_type) { + case PIPE_QUERY_PRIMITIVES_EMITTED: + case ETNA_QUERY_DRAW_CALLS: + break; + default: + return NULL; + } + + sq = CALLOC_STRUCT(etna_sw_query); + if (!sq) + return NULL; + + q = &sq->base; + q->funcs = &sw_query_funcs; + q->type = query_type; + + return q; +} diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_query_sw.h mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_query_sw.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_query_sw.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_query_sw.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2016 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Rob Clark + * Christian Gmeiner + */ + +#ifndef H_ETNAVIV_QUERY_SW +#define H_ETNAVIV_QUERY_SW + +#include "etnaviv_query.h" + +struct etna_sw_query { + struct etna_query base; + uint64_t begin_value, end_value; +}; + +static inline struct etna_sw_query * +etna_sw_query(struct etna_query *q) +{ + return (struct etna_sw_query *)q; +} + +struct etna_query * +etna_sw_create_query(struct etna_context *ctx, unsigned query_type); + +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_rasterizer.c mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_rasterizer.c --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_rasterizer.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_rasterizer.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include "etnaviv_rasterizer.h" +#include "etnaviv_context.h" +#include "etnaviv_screen.h" + +#include "hw/common.xml.h" + +#include "etnaviv_translate.h" +#include "util/u_math.h" +#include "util/u_memory.h" + +void * +etna_rasterizer_state_create(struct pipe_context *pctx, + const struct pipe_rasterizer_state *so) +{ + struct etna_rasterizer_state *cs; + struct etna_context *ctx = etna_context(pctx); + + /* Disregard flatshading on GC880+, as a HW bug there seem to disable all + * varying interpolation if it's enabled */ + bool flatshade = ctx->screen->model < 880 ? so->flatshade : false; + + if (so->fill_front != so->fill_back) + DBG("Different front and back fill mode not supported"); + + cs = CALLOC_STRUCT(etna_rasterizer_state); + if (!cs) + return NULL; + + cs->base = *so; + + cs->PA_CONFIG = (flatshade ? VIVS_PA_CONFIG_SHADE_MODEL_FLAT : VIVS_PA_CONFIG_SHADE_MODEL_SMOOTH) | + translate_cull_face(so->cull_face, so->front_ccw) | + translate_polygon_mode(so->fill_front) | + COND(so->point_quad_rasterization, VIVS_PA_CONFIG_POINT_SPRITE_ENABLE) | + COND(so->point_size_per_vertex, VIVS_PA_CONFIG_POINT_SIZE_ENABLE) | + COND(VIV_FEATURE(ctx->screen, chipMinorFeatures1, WIDE_LINE), VIVS_PA_CONFIG_WIDE_LINE); + cs->PA_LINE_WIDTH = fui(so->line_width / 2.0f); + cs->PA_POINT_SIZE = fui(so->point_size / 2.0f); + cs->SE_DEPTH_SCALE = fui(so->offset_scale); + cs->SE_DEPTH_BIAS = fui(so->offset_units) / 65535.0f; + cs->SE_CONFIG = COND(so->line_last_pixel, VIVS_SE_CONFIG_LAST_PIXEL_ENABLE); + /* XXX anything else? */ + /* XXX bottom_edge_rule */ + cs->PA_SYSTEM_MODE = + COND(so->half_pixel_center, VIVS_PA_SYSTEM_MODE_UNK0 | VIVS_PA_SYSTEM_MODE_UNK4); + + /* so->scissor overrides the scissor, defaulting to the whole framebuffer, + * with the scissor state */ + cs->scissor = so->scissor; + + /* point size per vertex adds a vertex shader output */ + cs->point_size_per_vertex = so->point_size_per_vertex; + + assert(!so->clip_halfz); /* could be supported with shader magic, actually + D3D z is default on older gc */ + + return cs; +} diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_rasterizer.h mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_rasterizer.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_rasterizer.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_rasterizer.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + */ + +#ifndef H_ETNAVIV_RASTERIZER +#define H_ETNAVIV_RASTERIZER + +#include "pipe/p_context.h" +#include "pipe/p_state.h" + +struct etna_rasterizer_state { + struct pipe_rasterizer_state base; + + uint32_t PA_CONFIG; + uint32_t PA_LINE_WIDTH; + uint32_t PA_POINT_SIZE; + uint32_t PA_SYSTEM_MODE; + uint32_t SE_DEPTH_SCALE; + uint32_t SE_DEPTH_BIAS; + uint32_t SE_CONFIG; + bool point_size_per_vertex; + bool scissor; +}; + +static inline struct etna_rasterizer_state * +etna_rasterizer_state(struct pipe_rasterizer_state *rast) +{ + return (struct etna_rasterizer_state *)rast; +} + +void * +etna_rasterizer_state_create(struct pipe_context *pctx, + const struct pipe_rasterizer_state *so); + +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_resource.c mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_resource.c --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_resource.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_resource.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,441 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + */ + +#include "etnaviv_resource.h" + +#include "hw/common.xml.h" + +#include "etnaviv_context.h" +#include "etnaviv_debug.h" +#include "etnaviv_screen.h" +#include "etnaviv_translate.h" + +#include "util/u_inlines.h" +#include "util/u_memory.h" + +/* A tile is 4x4 pixels, having 'screen->specs.bits_per_tile' of tile status. + * So, in a buffer of N pixels, there are N / (4 * 4) tiles. + * We need N * screen->specs.bits_per_tile / (4 * 4) bits of tile status, or + * N * screen->specs.bits_per_tile / (4 * 4 * 8) bytes. + */ +bool +etna_screen_resource_alloc_ts(struct pipe_screen *pscreen, + struct etna_resource *rsc) +{ + struct etna_screen *screen = etna_screen(pscreen); + size_t rt_ts_size, ts_layer_stride, pixels; + + assert(!rsc->ts_bo); + + /* TS only for level 0 -- XXX is this formula correct? */ + pixels = rsc->levels[0].layer_stride / util_format_get_blocksize(rsc->base.format); + ts_layer_stride = align(pixels * screen->specs.bits_per_tile / 0x80, 0x100); + rt_ts_size = ts_layer_stride * rsc->base.array_size; + if (rt_ts_size == 0) + return true; + + DBG_F(ETNA_DBG_RESOURCE_MSGS, "%p: Allocating tile status of size %zu", + rsc, rt_ts_size); + + struct etna_bo *rt_ts; + rt_ts = etna_bo_new(screen->dev, rt_ts_size, DRM_ETNA_GEM_CACHE_WC); + + if (unlikely(!rt_ts)) { + BUG("Problem allocating tile status for resource"); + return false; + } + + rsc->ts_bo = rt_ts; + rsc->levels[0].ts_offset = 0; + rsc->levels[0].ts_layer_stride = ts_layer_stride; + rsc->levels[0].ts_size = rt_ts_size; + + /* It is important to initialize the TS, as random pattern + * can result in crashes. Do this on the CPU as this only happens once + * per surface anyway and it's a small area, so it may not be worth + * queuing this to the GPU. */ + void *ts_map = etna_bo_map(rt_ts); + memset(ts_map, screen->specs.ts_clear_value, rt_ts_size); + + return true; +} + +static boolean +etna_screen_can_create_resource(struct pipe_screen *pscreen, + const struct pipe_resource *templat) +{ + struct etna_screen *screen = etna_screen(pscreen); + if (!translate_samples_to_xyscale(templat->nr_samples, NULL, NULL, NULL)) + return false; + + /* templat->bind is not set here, so we must use the minimum sizes */ + uint max_size = + MIN2(screen->specs.max_rendertarget_size, screen->specs.max_texture_size); + + if (templat->width0 > max_size || templat->height0 > max_size) + return false; + + return true; +} + +static unsigned +setup_miptree(struct etna_resource *rsc, unsigned paddingX, unsigned paddingY, + unsigned msaa_xscale, unsigned msaa_yscale) +{ + struct pipe_resource *prsc = &rsc->base; + unsigned level, size = 0; + unsigned width = prsc->width0; + unsigned height = prsc->height0; + unsigned depth = prsc->depth0; + + for (level = 0; level <= prsc->last_level; level++) { + struct etna_resource_level *mip = &rsc->levels[level]; + + mip->width = width; + mip->height = height; + mip->padded_width = align(width * msaa_xscale, paddingX); + mip->padded_height = align(height * msaa_yscale, paddingY); + mip->stride = util_format_get_stride(prsc->format, mip->padded_width); + mip->offset = size; + mip->layer_stride = mip->stride * util_format_get_nblocksy(prsc->format, mip->padded_height); + mip->size = prsc->array_size * mip->layer_stride; + + /* align levels to 64 bytes to be able to render to them */ + size += align(mip->size, ETNA_PE_ALIGNMENT) * depth; + + width = u_minify(width, 1); + height = u_minify(height, 1); + depth = u_minify(depth, 1); + } + + return size; +} + +/* Create a new resource object, using the given template info */ +struct pipe_resource * +etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout, + const struct pipe_resource *templat) +{ + struct etna_screen *screen = etna_screen(pscreen); + unsigned size; + + DBG_F(ETNA_DBG_RESOURCE_MSGS, + "target=%d, format=%s, %ux%ux%u, array_size=%u, " + "last_level=%u, nr_samples=%u, usage=%u, bind=%x, flags=%x", + templat->target, util_format_name(templat->format), templat->width0, + templat->height0, templat->depth0, templat->array_size, + templat->last_level, templat->nr_samples, templat->usage, + templat->bind, templat->flags); + + /* Determine scaling for antialiasing, allow override using debug flag */ + int nr_samples = templat->nr_samples; + if ((templat->bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) && + !(templat->bind & PIPE_BIND_SAMPLER_VIEW)) { + if (DBG_ENABLED(ETNA_DBG_MSAA_2X)) + nr_samples = 2; + if (DBG_ENABLED(ETNA_DBG_MSAA_4X)) + nr_samples = 4; + } + + int msaa_xscale = 1, msaa_yscale = 1; + if (!translate_samples_to_xyscale(nr_samples, &msaa_xscale, &msaa_yscale, NULL)) { + /* Number of samples not supported */ + return NULL; + } + + /* If we have the TEXTURE_HALIGN feature, we can always align to the + * resolve engine's width. If not, we must not align resources used + * only for textures. */ + bool rs_align = VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN) || + !etna_resource_sampler_only(templat); + + /* Determine needed padding (alignment of height/width) */ + unsigned paddingX = 0, paddingY = 0; + unsigned halign = TEXTURE_HALIGN_FOUR; + etna_layout_multiple(layout, screen->specs.pixel_pipes, rs_align, &paddingX, + &paddingY, &halign); + assert(paddingX && paddingY); + + if (templat->target != PIPE_BUFFER) { + unsigned min_paddingY = 4 * screen->specs.pixel_pipes; + if (paddingY < min_paddingY) + paddingY = min_paddingY; + } + + struct etna_resource *rsc = CALLOC_STRUCT(etna_resource); + + if (!rsc) + return NULL; + + rsc->base = *templat; + rsc->base.screen = pscreen; + rsc->base.nr_samples = nr_samples; + rsc->layout = layout; + rsc->halign = halign; + + pipe_reference_init(&rsc->base.reference, 1); + list_inithead(&rsc->list); + + size = setup_miptree(rsc, paddingX, paddingY, msaa_xscale, msaa_yscale); + + uint32_t flags = DRM_ETNA_GEM_CACHE_WC; + if (templat->bind & PIPE_BIND_VERTEX_BUFFER) + flags |= DRM_ETNA_GEM_FORCE_MMU; + struct etna_bo *bo = etna_bo_new(screen->dev, size, flags); + if (unlikely(bo == NULL)) { + BUG("Problem allocating video memory for resource"); + return NULL; + } + + rsc->bo = bo; + rsc->ts_bo = 0; /* TS is only created when first bound to surface */ + + if (templat->bind & PIPE_BIND_SCANOUT) + rsc->scanout = renderonly_scanout_for_resource(&rsc->base, screen->ro); + + if (DBG_ENABLED(ETNA_DBG_ZERO)) { + void *map = etna_bo_map(bo); + memset(map, 0, size); + } + + return &rsc->base; +} + +static struct pipe_resource * +etna_resource_create(struct pipe_screen *pscreen, + const struct pipe_resource *templat) +{ + struct etna_screen *screen = etna_screen(pscreen); + + /* Figure out what tiling to use -- for now, assume that textures cannot be + * supertiled, and cannot be linear. + * There is a feature flag SUPERTILED_TEXTURE (not supported on any known hw) + * that may allow this, as well + * as LINEAR_TEXTURE_SUPPORT (supported on gc880 and gc2000 at least), but + * not sure how it works. + * Buffers always have LINEAR layout. + */ + unsigned layout = ETNA_LAYOUT_LINEAR; + if (etna_resource_sampler_only(templat)) { + /* The buffer is only used for texturing, so create something + * directly compatible with the sampler. Such a buffer can + * never be rendered to. */ + layout = ETNA_LAYOUT_TILED; + + if (util_format_is_compressed(templat->format)) + layout = ETNA_LAYOUT_LINEAR; + } else if (templat->target != PIPE_BUFFER) { + bool want_multitiled = screen->specs.pixel_pipes > 1; + bool want_supertiled = screen->specs.can_supertile && !DBG_ENABLED(ETNA_DBG_NO_SUPERTILE); + + /* Keep single byte blocksized resources as tiled, since we + * are unable to use the RS blit to de-tile them. However, + * if they're used as a render target or depth/stencil, they + * must be multi-tiled for GPUs with multiple pixel pipes. + * Ignore depth/stencil here, but it is an error for a render + * target. + */ + if (util_format_get_blocksize(templat->format) == 1 && + !(templat->bind & PIPE_BIND_DEPTH_STENCIL)) { + assert(!(templat->bind & PIPE_BIND_RENDER_TARGET && want_multitiled)); + want_multitiled = want_supertiled = false; + } + + layout = ETNA_LAYOUT_BIT_TILE; + if (want_multitiled) + layout |= ETNA_LAYOUT_BIT_MULTI; + if (want_supertiled) + layout |= ETNA_LAYOUT_BIT_SUPER; + } + + if (templat->target == PIPE_TEXTURE_3D) + layout = ETNA_LAYOUT_LINEAR; + + return etna_resource_alloc(pscreen, layout, templat); +} + +static void +etna_resource_destroy(struct pipe_screen *pscreen, struct pipe_resource *prsc) +{ + struct etna_resource *rsc = etna_resource(prsc); + + if (rsc->bo) + etna_bo_del(rsc->bo); + + if (rsc->ts_bo) + etna_bo_del(rsc->ts_bo); + + if (rsc->scanout) + renderonly_scanout_destroy(rsc->scanout, etna_screen(pscreen)->ro); + + list_delinit(&rsc->list); + + pipe_resource_reference(&rsc->texture, NULL); + + FREE(rsc); +} + +static struct pipe_resource * +etna_resource_from_handle(struct pipe_screen *pscreen, + const struct pipe_resource *tmpl, + struct winsys_handle *handle, unsigned usage) +{ + struct etna_screen *screen = etna_screen(pscreen); + struct etna_resource *rsc = CALLOC_STRUCT(etna_resource); + struct etna_resource_level *level = &rsc->levels[0]; + struct pipe_resource *prsc = &rsc->base; + struct pipe_resource *ptiled = NULL; + + DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, " + "nr_samples=%u, usage=%u, bind=%x, flags=%x", + tmpl->target, util_format_name(tmpl->format), tmpl->width0, + tmpl->height0, tmpl->depth0, tmpl->array_size, tmpl->last_level, + tmpl->nr_samples, tmpl->usage, tmpl->bind, tmpl->flags); + + if (!rsc) + return NULL; + + *prsc = *tmpl; + + pipe_reference_init(&prsc->reference, 1); + list_inithead(&rsc->list); + prsc->screen = pscreen; + + rsc->bo = etna_screen_bo_from_handle(pscreen, handle, &level->stride); + if (!rsc->bo) + goto fail; + + level->width = tmpl->width0; + level->height = tmpl->height0; + + /* We will be using the RS to copy with this resource, so we must + * ensure that it is appropriately aligned for the RS requirements. */ + unsigned paddingX = ETNA_RS_WIDTH_MASK + 1; + unsigned paddingY = (ETNA_RS_HEIGHT_MASK + 1) * screen->specs.pixel_pipes; + + level->padded_width = align(level->width, paddingX); + level->padded_height = align(level->height, paddingY); + + /* The DDX must give us a BO which conforms to our padding size. + * The stride of the BO must be greater or equal to our padded + * stride. The size of the BO must accomodate the padded height. */ + if (level->stride < util_format_get_stride(tmpl->format, level->padded_width)) { + BUG("BO stride is too small for RS engine width padding"); + goto fail; + } + if (etna_bo_size(rsc->bo) < level->stride * level->padded_height) { + BUG("BO size is too small for RS engine height padding"); + goto fail; + } + + if (handle->type == DRM_API_HANDLE_TYPE_SHARED && tmpl->bind & PIPE_BIND_RENDER_TARGET) { + /* Render targets are linear in Xorg but must be tiled + * here. It would be nice if dri_drawable_get_format() + * set scanout for these buffers too. */ + struct etna_resource *tiled; + + ptiled = etna_resource_create(pscreen, tmpl); + if (!ptiled) + goto fail; + + tiled = etna_resource(ptiled); + tiled->scanout = renderonly_scanout_for_prime(prsc, screen->ro); + if (!tiled->scanout) + goto fail; + + return ptiled; + } + + return prsc; + +fail: + etna_resource_destroy(pscreen, prsc); + if (ptiled) + etna_resource_destroy(pscreen, ptiled); + + return NULL; +} + +static boolean +etna_resource_get_handle(struct pipe_screen *pscreen, + struct pipe_context *pctx, + struct pipe_resource *prsc, + struct winsys_handle *handle, unsigned usage) +{ + struct etna_resource *rsc = etna_resource(prsc); + + if (renderonly_get_handle(rsc->scanout, handle)) + return TRUE; + + return etna_screen_bo_get_handle(pscreen, rsc->bo, rsc->levels[0].stride, + handle); +} + +void +etna_resource_used(struct etna_context *ctx, struct pipe_resource *prsc, + enum etna_resource_status status) +{ + struct etna_resource *rsc; + + if (!prsc) + return; + + rsc = etna_resource(prsc); + rsc->status |= status; + + /* TODO resources can actually be shared across contexts, + * so I'm not sure a single list-head will do the trick? */ + debug_assert((rsc->pending_ctx == ctx) || !rsc->pending_ctx); + list_delinit(&rsc->list); + list_addtail(&rsc->list, &ctx->used_resources); + rsc->pending_ctx = ctx; +} + +void +etna_resource_wait(struct pipe_context *pctx, struct etna_resource *rsc) +{ + if (rsc->status & ETNA_PENDING_WRITE) { + struct pipe_fence_handle *fence; + struct pipe_screen *pscreen = pctx->screen; + + pctx->flush(pctx, &fence, 0); + + if (!pscreen->fence_finish(pscreen, pctx, fence, 5000000000ULL)) + BUG("fence timed out (hung GPU?)"); + + pscreen->fence_reference(pscreen, &fence, NULL); + } +} + +void +etna_resource_screen_init(struct pipe_screen *pscreen) +{ + pscreen->can_create_resource = etna_screen_can_create_resource; + pscreen->resource_create = etna_resource_create; + pscreen->resource_from_handle = etna_resource_from_handle; + pscreen->resource_get_handle = etna_resource_get_handle; + pscreen->resource_destroy = etna_resource_destroy; +} diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_resource.h mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_resource.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_resource.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_resource.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,148 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + */ + +#ifndef H_ETNAVIV_RESOURCE +#define H_ETNAVIV_RESOURCE + +#include "etnaviv_internal.h" +#include "etnaviv_tiling.h" +#include "pipe/p_state.h" +#include "util/list.h" + +struct pipe_screen; + +struct etna_resource_level { + unsigned width, padded_width; /* in pixels */ + unsigned height, padded_height; /* in samples */ + unsigned offset; /* offset into memory area */ + uint32_t stride; /* row stride */ + uint32_t layer_stride; /* layer stride */ + unsigned size; /* total size of memory area */ + + uint32_t ts_offset; + uint32_t ts_layer_stride; + uint32_t ts_size; + uint32_t clear_value; /* clear value of resource level (mainly for TS) */ +}; + +/* status of queued up but not flushed reads and write operations. + * In _transfer_map() we need to know if queued up rendering needs + * to be flushed to preserve the order of cpu and gpu access. */ +enum etna_resource_status { + ETNA_PENDING_WRITE = 0x01, + ETNA_PENDING_READ = 0x02, +}; + +struct etna_resource { + struct pipe_resource base; + struct renderonly_scanout *scanout; + uint32_t seqno; + + /* only lod 0 used for non-texture buffers */ + /* Layout for surface (tiled, multitiled, split tiled, ...) */ + enum etna_surface_layout layout; + /* Horizontal alignment for texture unit (TEXTURE_HALIGN_*) */ + unsigned halign; + struct etna_bo *bo; /* Surface video memory */ + struct etna_bo *ts_bo; /* Tile status video memory */ + + struct etna_resource_level levels[ETNA_NUM_LOD]; + + /* When we are rendering to a texture, we need a differently tiled resource */ + struct pipe_resource *texture; + + enum etna_resource_status status; + + /* resources accessed by queued but not flushed draws are tracked + * in the used_resources list. */ + struct list_head list; + struct etna_context *pending_ctx; +}; + +/* returns TRUE if a is newer than b */ +static inline bool +etna_resource_newer(struct etna_resource *a, struct etna_resource *b) +{ + return (int)(a->seqno - b->seqno) > 0; +} + +/* returns TRUE if a is older than b */ +static inline bool +etna_resource_older(struct etna_resource *a, struct etna_resource *b) +{ + return (int)(a->seqno - b->seqno) < 0; +} + +/* is the resource only used on the sampler? */ +static inline bool +etna_resource_sampler_only(const struct pipe_resource *pres) +{ + return (pres->bind & (PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_RENDER_TARGET | + PIPE_BIND_DEPTH_STENCIL | PIPE_BIND_BLENDABLE)) == + PIPE_BIND_SAMPLER_VIEW; +} + +static inline struct etna_resource * +etna_resource(struct pipe_resource *p) +{ + return (struct etna_resource *)p; +} + +void +etna_resource_used(struct etna_context *ctx, struct pipe_resource *prsc, + enum etna_resource_status status); + +void +etna_resource_wait(struct pipe_context *ctx, struct etna_resource *rsc); + +static inline void +resource_read(struct etna_context *ctx, struct pipe_resource *prsc) +{ + etna_resource_used(ctx, prsc, ETNA_PENDING_READ); +} + +static inline void +resource_written(struct etna_context *ctx, struct pipe_resource *prsc) +{ + etna_resource_used(ctx, prsc, ETNA_PENDING_WRITE); +} + +/* Allocate Tile Status for an etna resource. + * Tile status is a cache of the clear status per tile. This means a smaller + * surface has to be cleared which is faster. + * This is also called "fast clear". */ +bool +etna_screen_resource_alloc_ts(struct pipe_screen *pscreen, + struct etna_resource *prsc); + +struct pipe_resource * +etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout, + const struct pipe_resource *templat); + +void +etna_resource_screen_init(struct pipe_screen *pscreen); + +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_rs.c mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_rs.c --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_rs.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_rs.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,127 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + */ + +#include "etnaviv_rs.h" +#include "etnaviv_screen.h" +#include "etnaviv_tiling.h" +#include "etnaviv_util.h" + +#include "hw/common.xml.h" +#include "hw/state.xml.h" +#include "hw/state_3d.xml.h" + +#include + +void +etna_compile_rs_state(struct etna_context *ctx, struct compiled_rs_state *cs, + const struct rs_state *rs) +{ + memset(cs, 0, sizeof(*cs)); + + /* TILED and SUPERTILED layout have their strides multiplied with 4 in RS */ + unsigned source_stride_shift = COND(rs->source_tiling != ETNA_LAYOUT_LINEAR, 2); + unsigned dest_stride_shift = COND(rs->dest_tiling != ETNA_LAYOUT_LINEAR, 2); + + /* tiling == ETNA_LAYOUT_MULTI_TILED or ETNA_LAYOUT_MULTI_SUPERTILED? */ + int source_multi = COND(rs->source_tiling & ETNA_LAYOUT_BIT_MULTI, 1); + int dest_multi = COND(rs->dest_tiling & ETNA_LAYOUT_BIT_MULTI, 1); + + /* Vivante RS needs widths to be a multiple of 16 or bad things + * happen, such as scribbing over memory, or the GPU hanging, + * even for non-tiled formats. As this is serious, use abort(). + */ + if (rs->width & ETNA_RS_WIDTH_MASK) + abort(); + + /* TODO could just pre-generate command buffer, would simply submit to one memcpy */ + cs->RS_CONFIG = VIVS_RS_CONFIG_SOURCE_FORMAT(rs->source_format) | + COND(rs->downsample_x, VIVS_RS_CONFIG_DOWNSAMPLE_X) | + COND(rs->downsample_y, VIVS_RS_CONFIG_DOWNSAMPLE_Y) | + COND(rs->source_tiling & 1, VIVS_RS_CONFIG_SOURCE_TILED) | + VIVS_RS_CONFIG_DEST_FORMAT(rs->dest_format) | + COND(rs->dest_tiling & 1, VIVS_RS_CONFIG_DEST_TILED) | + COND(rs->swap_rb, VIVS_RS_CONFIG_SWAP_RB) | + COND(rs->flip, VIVS_RS_CONFIG_FLIP); + + cs->RS_SOURCE_STRIDE = (rs->source_stride << source_stride_shift) | + COND(rs->source_tiling & 2, VIVS_RS_SOURCE_STRIDE_TILING) | + COND(source_multi, VIVS_RS_SOURCE_STRIDE_MULTI); + + cs->source[0].bo = rs->source; + cs->source[0].offset = rs->source_offset; + cs->source[0].flags = ETNA_RELOC_READ; + + cs->dest[0].bo = rs->dest; + cs->dest[0].offset = rs->dest_offset; + cs->dest[0].flags = ETNA_RELOC_WRITE; + + cs->RS_DEST_STRIDE = (rs->dest_stride << dest_stride_shift) | + COND(rs->dest_tiling & 2, VIVS_RS_DEST_STRIDE_TILING) | + COND(dest_multi, VIVS_RS_DEST_STRIDE_MULTI); + + if (ctx->specs.pixel_pipes == 1) { + cs->RS_WINDOW_SIZE = VIVS_RS_WINDOW_SIZE_WIDTH(rs->width) | + VIVS_RS_WINDOW_SIZE_HEIGHT(rs->height); + } else if (ctx->specs.pixel_pipes == 2) { + assert((rs->height & 7) == 0); /* GPU hangs happen if height not 8-aligned */ + + if (source_multi) { + cs->source[1].bo = rs->source; + cs->source[1].offset = rs->source_offset + rs->source_stride * rs->source_padded_height / 2; + cs->source[1].flags = ETNA_RELOC_READ; + } + + if (dest_multi) { + cs->dest[1].bo = rs->dest; + cs->dest[1].offset = rs->dest_offset + rs->dest_stride * rs->dest_padded_height / 2; + cs->dest[1].flags = ETNA_RELOC_WRITE; + } + + cs->RS_WINDOW_SIZE = VIVS_RS_WINDOW_SIZE_WIDTH(rs->width) | + VIVS_RS_WINDOW_SIZE_HEIGHT(rs->height / 2); + } else { + abort(); + } + + cs->RS_PIPE_OFFSET[0] = VIVS_RS_PIPE_OFFSET_X(0) | VIVS_RS_PIPE_OFFSET_Y(0); + cs->RS_PIPE_OFFSET[1] = VIVS_RS_PIPE_OFFSET_X(0) | VIVS_RS_PIPE_OFFSET_Y(rs->height / 2); + cs->RS_DITHER[0] = rs->dither[0]; + cs->RS_DITHER[1] = rs->dither[1]; + cs->RS_CLEAR_CONTROL = VIVS_RS_CLEAR_CONTROL_BITS(rs->clear_bits) | rs->clear_mode; + cs->RS_FILL_VALUE[0] = rs->clear_value[0]; + cs->RS_FILL_VALUE[1] = rs->clear_value[1]; + cs->RS_FILL_VALUE[2] = rs->clear_value[2]; + cs->RS_FILL_VALUE[3] = rs->clear_value[3]; + cs->RS_EXTRA_CONFIG = VIVS_RS_EXTRA_CONFIG_AA(rs->aa) | + VIVS_RS_EXTRA_CONFIG_ENDIAN(rs->endian_mode); +} + +void +etna_modify_rs_clearbits(struct compiled_rs_state *cs, uint32_t clear_bits) +{ + cs->RS_CLEAR_CONTROL &= ~VIVS_RS_CLEAR_CONTROL_BITS__MASK; + cs->RS_CLEAR_CONTROL |= VIVS_RS_CLEAR_CONTROL_BITS(clear_bits); +} diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_rs.h mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_rs.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_rs.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_rs.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,86 @@ +/* + * Copyright (c) 2012-2013 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + */ + +#ifndef H_ETNAVIV_RS +#define H_ETNAVIV_RS + +#include "etnaviv_context.h" +#include + +struct rs_state { + uint8_t downsample_x : 1; /* Downsample in x direction */ + uint8_t downsample_y : 1; /* Downsample in y direction */ + + uint8_t source_format; /* RS_FORMAT_XXX */ + uint8_t source_tiling; /* ETNA_LAYOUT_XXX */ + uint8_t dest_tiling; /* ETNA_LAYOUT_XXX */ + uint8_t dest_format; /* RS_FORMAT_XXX */ + uint8_t swap_rb; + uint8_t flip; + struct etna_bo *source; + uint32_t source_offset; + uint32_t source_stride; + uint32_t source_padded_height; /* total padded height */ + struct etna_bo *dest; + uint32_t dest_offset; + uint32_t dest_stride; + uint32_t dest_padded_height; /* total padded height */ + uint16_t width; /* source width */ + uint16_t height; /* source height */ + uint32_t dither[2]; + uint32_t clear_bits; + uint32_t clear_mode; /* VIVS_RS_CLEAR_CONTROL_MODE_XXX */ + uint32_t clear_value[4]; + uint8_t aa; + uint8_t endian_mode; /* ENDIAN_MODE_XXX */ +}; + +/* treat this as opaque structure */ +struct compiled_rs_state { + uint32_t RS_CONFIG; + uint32_t RS_SOURCE_STRIDE; + uint32_t RS_DEST_STRIDE; + uint32_t RS_WINDOW_SIZE; + uint32_t RS_DITHER[2]; + uint32_t RS_CLEAR_CONTROL; + uint32_t RS_FILL_VALUE[4]; + uint32_t RS_EXTRA_CONFIG; + uint32_t RS_PIPE_OFFSET[2]; + + struct etna_reloc source[2]; + struct etna_reloc dest[2]; +}; + +/* compile RS state struct */ +void +etna_compile_rs_state(struct etna_context *ctx, struct compiled_rs_state *cs, + const struct rs_state *rs); + +/* modify the clear bits value in the compiled RS state */ +void +etna_modify_rs_clearbits(struct compiled_rs_state *cs, uint32_t clear_bits); + +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_screen.c mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_screen.c --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_screen.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_screen.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,809 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + * Christian Gmeiner + */ + +#include "etnaviv_screen.h" + +#include "hw/common.xml.h" + +#include "etnaviv_compiler.h" +#include "etnaviv_context.h" +#include "etnaviv_debug.h" +#include "etnaviv_fence.h" +#include "etnaviv_format.h" +#include "etnaviv_query.h" +#include "etnaviv_resource.h" +#include "etnaviv_translate.h" + +#include "os/os_time.h" +#include "util/u_math.h" +#include "util/u_memory.h" +#include "util/u_string.h" + +#include "state_tracker/drm_driver.h" + +static const struct debug_named_value debug_options[] = { + {"dbg_msgs", ETNA_DBG_MSGS, "Print debug messages"}, + {"frame_msgs", ETNA_DBG_FRAME_MSGS, "Print frame messages"}, + {"resource_msgs", ETNA_DBG_RESOURCE_MSGS, "Print resource messages"}, + {"compiler_msgs", ETNA_DBG_COMPILER_MSGS, "Print compiler messages"}, + {"linker_msgs", ETNA_DBG_LINKER_MSGS, "Print linker messages"}, + {"dump_shaders", ETNA_DBG_DUMP_SHADERS, "Dump shaders"}, + {"no_ts", ETNA_DBG_NO_TS, "Disable TS"}, + {"no_autodisable", ETNA_DBG_NO_AUTODISABLE, "Disable autodisable"}, + {"no_supertile", ETNA_DBG_NO_SUPERTILE, "Disable supertiles"}, + {"no_early_z", ETNA_DBG_NO_EARLY_Z, "Disable early z"}, + {"cflush_all", ETNA_DBG_CFLUSH_ALL, "Flush every cash before state update"}, + {"msaa2x", ETNA_DBG_MSAA_2X, "Force 2x msaa"}, + {"msaa4x", ETNA_DBG_MSAA_4X, "Force 4x msaa"}, + {"flush_all", ETNA_DBG_FLUSH_ALL, "Flush after every rendered primitive"}, + {"zero", ETNA_DBG_ZERO, "Zero all resources after allocation"}, + {"draw_stall", ETNA_DBG_DRAW_STALL, "Stall FE/PE after each rendered primitive"}, + DEBUG_NAMED_VALUE_END +}; + +DEBUG_GET_ONCE_FLAGS_OPTION(etna_mesa_debug, "ETNA_MESA_DEBUG", debug_options, 0) +int etna_mesa_debug = 0; + +static void +etna_screen_destroy(struct pipe_screen *pscreen) +{ + struct etna_screen *screen = etna_screen(pscreen); + + if (screen->pipe) + etna_pipe_del(screen->pipe); + + if (screen->gpu) + etna_gpu_del(screen->gpu); + + if (screen->ro) + FREE(screen->ro); + + if (screen->dev) + etna_device_del(screen->dev); + + FREE(screen); +} + +static const char * +etna_screen_get_name(struct pipe_screen *pscreen) +{ + struct etna_screen *priv = etna_screen(pscreen); + static char buffer[128]; + + util_snprintf(buffer, sizeof(buffer), "Vivante GC%x rev %04x", priv->model, + priv->revision); + + return buffer; +} + +static const char * +etna_screen_get_vendor(struct pipe_screen *pscreen) +{ + return "etnaviv"; +} + +static const char * +etna_screen_get_device_vendor(struct pipe_screen *pscreen) +{ + return "Vivante"; +} + +static int +etna_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) +{ + struct etna_screen *screen = etna_screen(pscreen); + + switch (param) { + /* Supported features (boolean caps). */ + case PIPE_CAP_TWO_SIDED_STENCIL: + case PIPE_CAP_ANISOTROPIC_FILTER: + case PIPE_CAP_POINT_SPRITE: + case PIPE_CAP_TEXTURE_SHADOW_MAP: + case PIPE_CAP_BLEND_EQUATION_SEPARATE: + case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT: + case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER: + case PIPE_CAP_SM3: + case PIPE_CAP_TEXTURE_BARRIER: + case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION: + case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY: + case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY: + case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY: + case PIPE_CAP_USER_CONSTANT_BUFFERS: + case PIPE_CAP_TGSI_TEXCOORD: + case PIPE_CAP_VERTEX_COLOR_UNCLAMPED: + return 1; + + /* Memory */ + case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: + return 256; + case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT: + return 4; /* XXX could easily be supported */ + case PIPE_CAP_GLSL_FEATURE_LEVEL: + return 120; + + case PIPE_CAP_NPOT_TEXTURES: + return true; /* VIV_FEATURE(priv->dev, chipMinorFeatures1, + NON_POWER_OF_TWO); */ + + case PIPE_CAP_PRIMITIVE_RESTART: + return VIV_FEATURE(screen, chipMinorFeatures1, HALTI0); + + case PIPE_CAP_ENDIANNESS: + return PIPE_ENDIAN_LITTLE; /* on most Viv hw this is configurable (feature + ENDIANNESS_CONFIG) */ + + /* Unsupported features. */ + case PIPE_CAP_SEAMLESS_CUBE_MAP: + case PIPE_CAP_TEXTURE_SWIZZLE: /* XXX supported on gc2000 */ + case PIPE_CAP_COMPUTE: /* XXX supported on gc2000 */ + case PIPE_CAP_MIXED_COLORBUFFER_FORMATS: /* only one colorbuffer supported, so mixing makes no sense */ + case PIPE_CAP_CONDITIONAL_RENDER: /* no occlusion queries */ + case PIPE_CAP_TGSI_INSTANCEID: /* no idea, really */ + case PIPE_CAP_START_INSTANCE: /* instancing not supported AFAIK */ + case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR: /* instancing not supported AFAIK */ + case PIPE_CAP_SHADER_STENCIL_EXPORT: /* Fragment shader cannot export stencil value */ + case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS: /* no dual-source supported */ + case PIPE_CAP_TEXTURE_MULTISAMPLE: /* no texture multisample */ + case PIPE_CAP_TEXTURE_MIRROR_CLAMP: /* only mirrored repeat */ + case PIPE_CAP_INDEP_BLEND_ENABLE: + case PIPE_CAP_INDEP_BLEND_FUNC: + case PIPE_CAP_DEPTH_CLIP_DISABLE: + case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE: + case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT: + case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: + case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS: /* Don't skip strict max uniform limit check */ + case PIPE_CAP_FRAGMENT_COLOR_CLAMPED: + case PIPE_CAP_VERTEX_COLOR_CLAMPED: + case PIPE_CAP_USER_VERTEX_BUFFERS: + case PIPE_CAP_USER_INDEX_BUFFERS: + case PIPE_CAP_TEXTURE_BUFFER_OBJECTS: + case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT: + case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY: + case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES: /* TODO: test me out with piglit */ + case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT: + case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS: + case PIPE_CAP_TEXTURE_GATHER_SM5: + case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT: + case PIPE_CAP_FAKE_SW_MSAA: + case PIPE_CAP_TEXTURE_QUERY_LOD: + case PIPE_CAP_SAMPLE_SHADING: + case PIPE_CAP_TEXTURE_GATHER_OFFSETS: + case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION: + case PIPE_CAP_DRAW_INDIRECT: + case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE: + case PIPE_CAP_CONDITIONAL_RENDER_INVERTED: + case PIPE_CAP_SAMPLER_VIEW_TARGET: + case PIPE_CAP_CLIP_HALFZ: + case PIPE_CAP_VERTEXID_NOBASE: + case PIPE_CAP_POLYGON_OFFSET_CLAMP: + case PIPE_CAP_MULTISAMPLE_Z_RESOLVE: + case PIPE_CAP_RESOURCE_FROM_USER_MEMORY: + case PIPE_CAP_DEVICE_RESET_STATUS_QUERY: + case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS: + case PIPE_CAP_TEXTURE_FLOAT_LINEAR: + case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR: + case PIPE_CAP_DEPTH_BOUNDS_TEST: + case PIPE_CAP_TGSI_TXQS: + case PIPE_CAP_FORCE_PERSAMPLE_INTERP: + case PIPE_CAP_SHAREABLE_SHADERS: + case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS: + case PIPE_CAP_CLEAR_TEXTURE: + case PIPE_CAP_DRAW_PARAMETERS: + case PIPE_CAP_TGSI_PACK_HALF_FLOAT: + case PIPE_CAP_MULTI_DRAW_INDIRECT: + case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS: + case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL: + case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL: + case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT: + case PIPE_CAP_INVALIDATE_BUFFER: + case PIPE_CAP_GENERATE_MIPMAP: + case PIPE_CAP_STRING_MARKER: + case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS: + case PIPE_CAP_QUERY_BUFFER_OBJECT: + case PIPE_CAP_QUERY_MEMORY_INFO: + case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT: + case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR: + case PIPE_CAP_CULL_DISTANCE: + case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES: + case PIPE_CAP_TGSI_VOTE: + case PIPE_CAP_MAX_WINDOW_RECTANGLES: + case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED: + case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS: + case PIPE_CAP_MIXED_COLOR_DEPTH_BITS: + case PIPE_CAP_TGSI_ARRAY_COMPONENTS: + case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS: + case PIPE_CAP_TGSI_CAN_READ_OUTPUTS: + case PIPE_CAP_NATIVE_FENCE_FD: + case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY: + case PIPE_CAP_TGSI_FS_FBFETCH: + return 0; + + /* Stream output. */ + case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS: + case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME: + case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS: + case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS: + return 0; + + /* Geometry shader output, unsupported. */ + case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES: + case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS: + case PIPE_CAP_MAX_VERTEX_STREAMS: + return 0; + + case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE: + return 128; + + /* Texturing. */ + case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: + case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: + { + int log2_max_tex_size = util_last_bit(screen->specs.max_texture_size); + assert(log2_max_tex_size > 0); + return log2_max_tex_size; + } + case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: /* 3D textures not supported - fake it */ + return 5; + case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS: + return 0; + case PIPE_CAP_CUBE_MAP_ARRAY: + return 0; + case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET: + case PIPE_CAP_MIN_TEXEL_OFFSET: + return -8; + case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET: + case PIPE_CAP_MAX_TEXEL_OFFSET: + return 7; + case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK: + return 0; + case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE: + return 65536; + + /* Render targets. */ + case PIPE_CAP_MAX_RENDER_TARGETS: + return 1; + + /* Viewports and scissors. */ + case PIPE_CAP_MAX_VIEWPORTS: + return 1; + + /* Timer queries. */ + case PIPE_CAP_QUERY_TIME_ELAPSED: + case PIPE_CAP_OCCLUSION_QUERY: + return 0; + case PIPE_CAP_QUERY_TIMESTAMP: + return 1; + case PIPE_CAP_QUERY_PIPELINE_STATISTICS: + return 0; + + /* Preferences */ + case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER: + return 0; + + case PIPE_CAP_PCI_GROUP: + case PIPE_CAP_PCI_BUS: + case PIPE_CAP_PCI_DEVICE: + case PIPE_CAP_PCI_FUNCTION: + return 0; + case PIPE_CAP_VENDOR_ID: + case PIPE_CAP_DEVICE_ID: + return 0xFFFFFFFF; + case PIPE_CAP_ACCELERATED: + return 1; + case PIPE_CAP_VIDEO_MEMORY: + return 0; + case PIPE_CAP_UMA: + return 1; + } + + debug_printf("unknown param %d", param); + return 0; +} + +static float +etna_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param) +{ + switch (param) { + case PIPE_CAPF_MAX_LINE_WIDTH: + case PIPE_CAPF_MAX_LINE_WIDTH_AA: + case PIPE_CAPF_MAX_POINT_WIDTH: + case PIPE_CAPF_MAX_POINT_WIDTH_AA: + return 8192.0f; + case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY: + return 16.0f; + case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS: + return 16.0f; + case PIPE_CAPF_GUARD_BAND_LEFT: + case PIPE_CAPF_GUARD_BAND_TOP: + case PIPE_CAPF_GUARD_BAND_RIGHT: + case PIPE_CAPF_GUARD_BAND_BOTTOM: + return 0.0f; + } + + debug_printf("unknown paramf %d", param); + return 0; +} + +static int +etna_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, + enum pipe_shader_cap param) +{ + struct etna_screen *screen = etna_screen(pscreen); + + switch (shader) { + case PIPE_SHADER_FRAGMENT: + case PIPE_SHADER_VERTEX: + break; + case PIPE_SHADER_COMPUTE: + case PIPE_SHADER_GEOMETRY: + case PIPE_SHADER_TESS_CTRL: + case PIPE_SHADER_TESS_EVAL: + return 0; + default: + DBG("unknown shader type %d", shader); + return 0; + } + + switch (param) { + case PIPE_SHADER_CAP_MAX_INSTRUCTIONS: + case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS: + case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS: + case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS: + return ETNA_MAX_TOKENS; + case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH: + return ETNA_MAX_DEPTH; /* XXX */ + case PIPE_SHADER_CAP_MAX_INPUTS: + /* Maximum number of inputs for the vertex shader is the number + * of vertex elements - each element defines one vertex shader + * input register. For the fragment shader, this is the number + * of varyings. */ + return shader == PIPE_SHADER_FRAGMENT ? screen->specs.max_varyings + : screen->specs.vertex_max_elements; + case PIPE_SHADER_CAP_MAX_OUTPUTS: + return 16; /* see VIVS_VS_OUTPUT */ + case PIPE_SHADER_CAP_MAX_TEMPS: + return 64; /* Max native temporaries. */ + case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: + return 1; + case PIPE_SHADER_CAP_MAX_PREDS: + return 0; /* nothing uses this */ + case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: + return 1; + case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: + case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: + case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: + case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: + return 1; + case PIPE_SHADER_CAP_SUBROUTINES: + return 0; + case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED: + return VIV_FEATURE(screen, chipMinorFeatures0, HAS_SQRT_TRIG); + case PIPE_SHADER_CAP_INTEGERS: + return 0; + case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: + case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS: + return shader == PIPE_SHADER_FRAGMENT + ? screen->specs.fragment_sampler_count + : screen->specs.vertex_sampler_count; + case PIPE_SHADER_CAP_PREFERRED_IR: + return PIPE_SHADER_IR_TGSI; + case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE: + return 4096; + case PIPE_SHADER_CAP_DOUBLES: + case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED: + case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED: + case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED: + case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: + return false; + case PIPE_SHADER_CAP_SUPPORTED_IRS: + return 0; + case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: + return 32; + case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: + case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: + case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: + return 0; + } + + debug_printf("unknown shader param %d", param); + return 0; +} + +static uint64_t +etna_screen_get_timestamp(struct pipe_screen *pscreen) +{ + return os_time_get_nano(); +} + +static bool +gpu_supports_texure_format(struct etna_screen *screen, uint32_t fmt) +{ + if (fmt == TEXTURE_FORMAT_ETC1) + return VIV_FEATURE(screen, chipFeatures, ETC1_TEXTURE_COMPRESSION); + + if (fmt >= TEXTURE_FORMAT_DXT1 && fmt <= TEXTURE_FORMAT_DXT4_DXT5) + return VIV_FEATURE(screen, chipFeatures, DXT_TEXTURE_COMPRESSION); + + return true; +} + +static boolean +etna_screen_is_format_supported(struct pipe_screen *pscreen, + enum pipe_format format, + enum pipe_texture_target target, + unsigned sample_count, unsigned usage) +{ + struct etna_screen *screen = etna_screen(pscreen); + unsigned allowed = 0; + + if (target != PIPE_BUFFER && + target != PIPE_TEXTURE_1D && + target != PIPE_TEXTURE_2D && + target != PIPE_TEXTURE_3D && + target != PIPE_TEXTURE_CUBE && + target != PIPE_TEXTURE_RECT) + return FALSE; + + if (usage & PIPE_BIND_RENDER_TARGET) { + /* If render target, must be RS-supported format that is not rb swapped. + * Exposing rb swapped (or other swizzled) formats for rendering would + * involve swizzing in the pixel shader. + */ + if (translate_rs_format(format) != ETNA_NO_MATCH && !translate_rs_format_rb_swap(format)) { + /* Validate MSAA; number of samples must be allowed, and render target + * must have MSAA'able format. */ + if (sample_count > 1) { + if (translate_samples_to_xyscale(sample_count, NULL, NULL, NULL) && + translate_msaa_format(format) != ETNA_NO_MATCH) { + allowed |= PIPE_BIND_RENDER_TARGET; + } + } else { + allowed |= PIPE_BIND_RENDER_TARGET; + } + } + } + + if (usage & PIPE_BIND_DEPTH_STENCIL) { + if (translate_depth_format(format) != ETNA_NO_MATCH) + allowed |= PIPE_BIND_DEPTH_STENCIL; + } + + if (usage & PIPE_BIND_SAMPLER_VIEW) { + uint32_t fmt = translate_texture_format(format); + + if (!gpu_supports_texure_format(screen, fmt)) + fmt = ETNA_NO_MATCH; + + if (sample_count < 2 && fmt != ETNA_NO_MATCH) + allowed |= PIPE_BIND_SAMPLER_VIEW; + } + + if (usage & PIPE_BIND_VERTEX_BUFFER) { + if (translate_vertex_format_type(format) != ETNA_NO_MATCH) + allowed |= PIPE_BIND_VERTEX_BUFFER; + } + + if (usage & PIPE_BIND_INDEX_BUFFER) { + /* must be supported index format */ + if (format == PIPE_FORMAT_I8_UINT || format == PIPE_FORMAT_I16_UINT || + (format == PIPE_FORMAT_I32_UINT && + VIV_FEATURE(screen, chipFeatures, 32_BIT_INDICES))) { + allowed |= PIPE_BIND_INDEX_BUFFER; + } + } + + /* Always allowed */ + allowed |= + usage & (PIPE_BIND_DISPLAY_TARGET | PIPE_BIND_SCANOUT | PIPE_BIND_SHARED); + + if (usage != allowed) { + DBG("not supported: format=%s, target=%d, sample_count=%d, " + "usage=%x, allowed=%x", + util_format_name(format), target, sample_count, usage, allowed); + } + + return usage == allowed; +} + +static boolean +etna_get_specs(struct etna_screen *screen) +{ + uint64_t val; + uint32_t instruction_count; + + if (etna_gpu_get_param(screen->gpu, ETNA_GPU_INSTRUCTION_COUNT, &val)) { + DBG("could not get ETNA_GPU_INSTRUCTION_COUNT"); + goto fail; + } + instruction_count = val; + + if (etna_gpu_get_param(screen->gpu, ETNA_GPU_VERTEX_OUTPUT_BUFFER_SIZE, + &val)) { + DBG("could not get ETNA_GPU_VERTEX_OUTPUT_BUFFER_SIZE"); + goto fail; + } + screen->specs.vertex_output_buffer_size = val; + + if (etna_gpu_get_param(screen->gpu, ETNA_GPU_VERTEX_CACHE_SIZE, &val)) { + DBG("could not get ETNA_GPU_VERTEX_CACHE_SIZE"); + goto fail; + } + screen->specs.vertex_cache_size = val; + + if (etna_gpu_get_param(screen->gpu, ETNA_GPU_SHADER_CORE_COUNT, &val)) { + DBG("could not get ETNA_GPU_SHADER_CORE_COUNT"); + goto fail; + } + screen->specs.shader_core_count = val; + + if (etna_gpu_get_param(screen->gpu, ETNA_GPU_STREAM_COUNT, &val)) { + DBG("could not get ETNA_GPU_STREAM_COUNT"); + goto fail; + } + screen->specs.stream_count = val; + + if (etna_gpu_get_param(screen->gpu, ETNA_GPU_REGISTER_MAX, &val)) { + DBG("could not get ETNA_GPU_REGISTER_MAX"); + goto fail; + } + screen->specs.max_registers = val; + + if (etna_gpu_get_param(screen->gpu, ETNA_GPU_PIXEL_PIPES, &val)) { + DBG("could not get ETNA_GPU_PIXEL_PIPES"); + goto fail; + } + screen->specs.pixel_pipes = val; + + if (etna_gpu_get_param(screen->gpu, ETNA_GPU_NUM_CONSTANTS, &val)) { + DBG("could not get %s", "ETNA_GPU_NUM_CONSTANTS"); + goto fail; + } + if (val == 0) { + fprintf(stderr, "Warning: zero num constants (update kernel?)\n"); + val = 168; + } + screen->specs.num_constants = val; + + screen->specs.can_supertile = + VIV_FEATURE(screen, chipMinorFeatures0, SUPER_TILED); + screen->specs.bits_per_tile = + VIV_FEATURE(screen, chipMinorFeatures0, 2BITPERTILE) ? 2 : 4; + screen->specs.ts_clear_value = + VIV_FEATURE(screen, chipMinorFeatures0, 2BITPERTILE) ? 0x55555555 + : 0x11111111; + + /* vertex and fragment samplers live in one address space */ + screen->specs.vertex_sampler_offset = 8; + screen->specs.fragment_sampler_count = 8; + screen->specs.vertex_sampler_count = 4; + screen->specs.vs_need_z_div = + screen->model < 0x1000 && screen->model != 0x880; + screen->specs.has_sin_cos_sqrt = + VIV_FEATURE(screen, chipMinorFeatures0, HAS_SQRT_TRIG); + screen->specs.has_sign_floor_ceil = + VIV_FEATURE(screen, chipMinorFeatures0, HAS_SIGN_FLOOR_CEIL); + screen->specs.has_shader_range_registers = + screen->model >= 0x1000 || screen->model == 0x880; + screen->specs.npot_tex_any_wrap = + VIV_FEATURE(screen, chipMinorFeatures1, NON_POWER_OF_TWO); + screen->specs.has_new_sin_cos = + VIV_FEATURE(screen, chipMinorFeatures3, HAS_FAST_TRANSCENDENTALS); + + if (instruction_count > 256) { /* unified instruction memory? */ + screen->specs.vs_offset = 0xC000; + screen->specs.ps_offset = 0xD000; /* like vivante driver */ + screen->specs.max_instructions = 256; + } else { + screen->specs.vs_offset = 0x4000; + screen->specs.ps_offset = 0x6000; + screen->specs.max_instructions = instruction_count / 2; + } + + if (VIV_FEATURE(screen, chipMinorFeatures1, HALTI0)) { + screen->specs.max_varyings = 12; + screen->specs.vertex_max_elements = 16; + } else { + screen->specs.max_varyings = 8; + /* Etna_viv documentation seems confused over the correct value + * here so choose the lower to be safe: HALTI0 says 16 i.s.o. + * 10, but VERTEX_ELEMENT_CONFIG register says 16 i.s.o. 12. */ + screen->specs.vertex_max_elements = 10; + } + + /* Etna_viv documentation does not indicate where varyings above 8 are + * stored. Moreover, if we are passed more than 8 varyings, we will + * walk off the end of some arrays. Limit the maximum number of varyings. */ + if (screen->specs.max_varyings > ETNA_NUM_VARYINGS) + screen->specs.max_varyings = ETNA_NUM_VARYINGS; + + /* from QueryShaderCaps in kernel driver */ + if (screen->model < chipModel_GC4000) { + screen->specs.max_vs_uniforms = 168; + screen->specs.max_ps_uniforms = 64; + } else { + screen->specs.max_vs_uniforms = 256; + screen->specs.max_ps_uniforms = 256; + } + + screen->specs.max_texture_size = + VIV_FEATURE(screen, chipMinorFeatures0, TEXTURE_8K) ? 8192 : 2048; + screen->specs.max_rendertarget_size = + VIV_FEATURE(screen, chipMinorFeatures0, RENDERTARGET_8K) ? 8192 : 2048; + + return true; + +fail: + return false; +} + +boolean +etna_screen_bo_get_handle(struct pipe_screen *pscreen, struct etna_bo *bo, + unsigned stride, struct winsys_handle *whandle) +{ + whandle->stride = stride; + + if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) { + return etna_bo_get_name(bo, &whandle->handle) == 0; + } else if (whandle->type == DRM_API_HANDLE_TYPE_KMS) { + whandle->handle = etna_bo_handle(bo); + return TRUE; + } else if (whandle->type == DRM_API_HANDLE_TYPE_FD) { + whandle->handle = etna_bo_dmabuf(bo); + return TRUE; + } else { + return FALSE; + } +} + +struct etna_bo * +etna_screen_bo_from_handle(struct pipe_screen *pscreen, + struct winsys_handle *whandle, unsigned *out_stride) +{ + struct etna_screen *screen = etna_screen(pscreen); + struct etna_bo *bo; + + if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) { + bo = etna_bo_from_name(screen->dev, whandle->handle); + } else if (whandle->type == DRM_API_HANDLE_TYPE_FD) { + bo = etna_bo_from_dmabuf(screen->dev, whandle->handle); + } else { + DBG("Attempt to import unsupported handle type %d", whandle->type); + return NULL; + } + + if (!bo) { + DBG("ref name 0x%08x failed", whandle->handle); + return NULL; + } + + *out_stride = whandle->stride; + + return bo; +} + +struct pipe_screen * +etna_screen_create(struct etna_device *dev, struct etna_gpu *gpu, + struct renderonly *ro) +{ + struct etna_screen *screen = CALLOC_STRUCT(etna_screen); + struct pipe_screen *pscreen; + uint64_t val; + + if (!screen) + return NULL; + + pscreen = &screen->base; + screen->dev = dev; + screen->gpu = gpu; + screen->ro = renderonly_dup(ro); + + if (!screen->ro) { + DBG("could not create renderonly object"); + goto fail; + } + + etna_mesa_debug = debug_get_option_etna_mesa_debug(); + + /* FIXME: Disable tile status for stability at the moment */ + etna_mesa_debug |= ETNA_DBG_NO_TS; + + screen->pipe = etna_pipe_new(gpu, ETNA_PIPE_3D); + if (!screen->pipe) { + DBG("could not create 3d pipe"); + goto fail; + } + + if (etna_gpu_get_param(screen->gpu, ETNA_GPU_MODEL, &val)) { + DBG("could not get ETNA_GPU_MODEL"); + goto fail; + } + screen->model = val; + + if (etna_gpu_get_param(screen->gpu, ETNA_GPU_REVISION, &val)) { + DBG("could not get ETNA_GPU_REVISION"); + goto fail; + } + screen->revision = val; + + if (etna_gpu_get_param(screen->gpu, ETNA_GPU_FEATURES_0, &val)) { + DBG("could not get ETNA_GPU_FEATURES_0"); + goto fail; + } + screen->features[0] = val; + + if (etna_gpu_get_param(screen->gpu, ETNA_GPU_FEATURES_1, &val)) { + DBG("could not get ETNA_GPU_FEATURES_1"); + goto fail; + } + screen->features[1] = val; + + if (etna_gpu_get_param(screen->gpu, ETNA_GPU_FEATURES_2, &val)) { + DBG("could not get ETNA_GPU_FEATURES_2"); + goto fail; + } + screen->features[2] = val; + + if (etna_gpu_get_param(screen->gpu, ETNA_GPU_FEATURES_3, &val)) { + DBG("could not get ETNA_GPU_FEATURES_3"); + goto fail; + } + screen->features[3] = val; + + if (etna_gpu_get_param(screen->gpu, ETNA_GPU_FEATURES_4, &val)) { + DBG("could not get ETNA_GPU_FEATURES_4"); + goto fail; + } + screen->features[4] = val; + + if (!etna_get_specs(screen)) + goto fail; + + pscreen->destroy = etna_screen_destroy; + pscreen->get_param = etna_screen_get_param; + pscreen->get_paramf = etna_screen_get_paramf; + pscreen->get_shader_param = etna_screen_get_shader_param; + + pscreen->get_name = etna_screen_get_name; + pscreen->get_vendor = etna_screen_get_vendor; + pscreen->get_device_vendor = etna_screen_get_device_vendor; + + pscreen->get_timestamp = etna_screen_get_timestamp; + pscreen->context_create = etna_context_create; + pscreen->is_format_supported = etna_screen_is_format_supported; + + etna_fence_screen_init(pscreen); + etna_query_screen_init(pscreen); + etna_resource_screen_init(pscreen); + + slab_create_parent(&screen->transfer_pool, sizeof(struct etna_transfer), 16); + + return pscreen; + +fail: + etna_screen_destroy(pscreen); + return NULL; +} diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_screen.h mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_screen.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_screen.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_screen.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,95 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + * Christian Gmeiner + */ + +#ifndef H_ETNAVIV_SCREEN +#define H_ETNAVIV_SCREEN + +#include "etnaviv_internal.h" + +#include "os/os_thread.h" +#include "pipe/p_screen.h" +#include "renderonly/renderonly.h" +#include "util/slab.h" + +struct etna_bo; + +/* Enum with indices for each of the feature words */ +enum viv_features_word { + viv_chipFeatures = 0, + viv_chipMinorFeatures0 = 1, + viv_chipMinorFeatures1 = 2, + viv_chipMinorFeatures2 = 3, + viv_chipMinorFeatures3 = 4, + VIV_FEATURES_WORD_COUNT /* Must be last */ +}; + +/** Convenience macro to probe features from state.xml.h: + * VIV_FEATURE(chipFeatures, FAST_CLEAR) + * VIV_FEATURE(chipMinorFeatures1, AUTO_DISABLE) + */ +#define VIV_FEATURE(screen, word, feature) \ + ((screen->features[viv_ ## word] & (word ## _ ## feature)) != 0) + +struct etna_screen { + struct pipe_screen base; + + int refcnt; + void *winsys_priv; + + struct etna_device *dev; + struct etna_gpu *gpu; + struct etna_pipe *pipe; + struct renderonly *ro; + + struct slab_parent_pool transfer_pool; + + uint32_t model; + uint32_t revision; + uint32_t features[5]; + + struct etna_specs specs; +}; + +static inline struct etna_screen * +etna_screen(struct pipe_screen *pscreen) +{ + return (struct etna_screen *)pscreen; +} + +boolean +etna_screen_bo_get_handle(struct pipe_screen *pscreen, struct etna_bo *bo, + unsigned stride, struct winsys_handle *whandle); + +struct etna_bo * +etna_screen_bo_from_handle(struct pipe_screen *pscreen, + struct winsys_handle *whandle, unsigned *out_stride); + +struct pipe_screen * +etna_screen_create(struct etna_device *dev, struct etna_gpu *gpu, + struct renderonly *ro); + +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_shader.c mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_shader.c --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_shader.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_shader.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,285 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + */ + +#include "etnaviv_shader.h" + +#include "etnaviv_compiler.h" +#include "etnaviv_context.h" +#include "etnaviv_debug.h" +#include "etnaviv_util.h" + +#include "util/u_math.h" +#include "util/u_memory.h" + +/* Link vs and fs together: fill in shader_state from vs and fs + * as this function is called every time a new fs or vs is bound, the goal is to + * do little processing as possible here, and to precompute as much as possible in + * the vs/fs shader_object. + * + * XXX we could cache the link result for a certain set of VS/PS; usually a pair + * of VS and PS will be used together anyway. + */ +static bool +etna_link_shaders(struct etna_context *ctx, struct compiled_shader_state *cs, + const struct etna_shader *vs, const struct etna_shader *fs) +{ + struct etna_shader_link_info link = { }; + + assert(vs->processor == PIPE_SHADER_VERTEX); + assert(fs->processor == PIPE_SHADER_FRAGMENT); + +#ifdef DEBUG + if (DBG_ENABLED(ETNA_DBG_DUMP_SHADERS)) { + etna_dump_shader(vs); + etna_dump_shader(fs); + } +#endif + + if (etna_link_shader(&link, vs, fs)) { + /* linking failed: some fs inputs do not have corresponding + * vs outputs */ + assert(0); + + return false; + } + + if (DBG_ENABLED(ETNA_DBG_LINKER_MSGS)) { + debug_printf("link result:\n"); + debug_printf(" vs -> fs comps use pa_attr\n"); + + for (int idx = 0; idx < link.num_varyings; ++idx) + debug_printf(" t%-2u -> t%-2u %-5.*s %u,%u,%u,%u 0x%08x\n", + link.varyings[idx].reg, idx + 1, + link.varyings[idx].num_components, "xyzw", + link.varyings[idx].use[0], link.varyings[idx].use[1], + link.varyings[idx].use[2], link.varyings[idx].use[3], + link.varyings[idx].pa_attributes); + } + + /* set last_varying_2x flag if the last varying has 1 or 2 components */ + bool last_varying_2x = false; + if (link.num_varyings > 0 && link.varyings[link.num_varyings - 1].num_components <= 2) + last_varying_2x = true; + + cs->RA_CONTROL = VIVS_RA_CONTROL_UNK0 | + COND(last_varying_2x, VIVS_RA_CONTROL_LAST_VARYING_2X); + + cs->PA_ATTRIBUTE_ELEMENT_COUNT = VIVS_PA_ATTRIBUTE_ELEMENT_COUNT_COUNT(link.num_varyings); + for (int idx = 0; idx < link.num_varyings; ++idx) + cs->PA_SHADER_ATTRIBUTES[idx] = link.varyings[idx].pa_attributes; + + cs->VS_END_PC = vs->code_size / 4; + cs->VS_OUTPUT_COUNT = 1 + link.num_varyings; /* position + varyings */ + + /* vs outputs (varyings) */ + DEFINE_ETNA_BITARRAY(vs_output, 16, 8) = {0}; + int varid = 0; + etna_bitarray_set(vs_output, 8, varid++, vs->vs_pos_out_reg); + for (int idx = 0; idx < link.num_varyings; ++idx) + etna_bitarray_set(vs_output, 8, varid++, link.varyings[idx].reg); + if (vs->vs_pointsize_out_reg >= 0) + etna_bitarray_set(vs_output, 8, varid++, vs->vs_pointsize_out_reg); /* pointsize is last */ + + for (int idx = 0; idx < ARRAY_SIZE(cs->VS_OUTPUT); ++idx) + cs->VS_OUTPUT[idx] = vs_output[idx]; + + if (vs->vs_pointsize_out_reg != -1) { + /* vertex shader outputs point coordinate, provide extra output and make + * sure PA config is + * not masked */ + cs->PA_CONFIG = ~0; + cs->VS_OUTPUT_COUNT_PSIZE = cs->VS_OUTPUT_COUNT + 1; + } else { + /* vertex shader does not output point coordinate, make sure thate + * POINT_SIZE_ENABLE is masked + * and no extra output is given */ + cs->PA_CONFIG = ~VIVS_PA_CONFIG_POINT_SIZE_ENABLE; + cs->VS_OUTPUT_COUNT_PSIZE = cs->VS_OUTPUT_COUNT; + } + + cs->VS_LOAD_BALANCING = vs->vs_load_balancing; + cs->VS_START_PC = 0; + + cs->PS_END_PC = fs->code_size / 4; + cs->PS_OUTPUT_REG = fs->ps_color_out_reg; + cs->PS_INPUT_COUNT = + VIVS_PS_INPUT_COUNT_COUNT(link.num_varyings + 1) | /* Number of inputs plus position */ + VIVS_PS_INPUT_COUNT_UNK8(fs->input_count_unk8); + cs->PS_TEMP_REGISTER_CONTROL = + VIVS_PS_TEMP_REGISTER_CONTROL_NUM_TEMPS(MAX2(fs->num_temps, link.num_varyings + 1)); + cs->PS_CONTROL = VIVS_PS_CONTROL_UNK1; /* XXX when can we set BYPASS? */ + cs->PS_START_PC = 0; + + /* Precompute PS_INPUT_COUNT and TEMP_REGISTER_CONTROL in the case of MSAA + * mode, avoids some fumbling in sync_context. */ + cs->PS_INPUT_COUNT_MSAA = + VIVS_PS_INPUT_COUNT_COUNT(link.num_varyings + 2) | /* MSAA adds another input */ + VIVS_PS_INPUT_COUNT_UNK8(fs->input_count_unk8); + cs->PS_TEMP_REGISTER_CONTROL_MSAA = + VIVS_PS_TEMP_REGISTER_CONTROL_NUM_TEMPS(MAX2(fs->num_temps, link.num_varyings + 2)); + + uint32_t total_components = 0; + DEFINE_ETNA_BITARRAY(num_components, ETNA_NUM_VARYINGS, 4) = {0}; + DEFINE_ETNA_BITARRAY(component_use, 4 * ETNA_NUM_VARYINGS, 2) = {0}; + for (int idx = 0; idx < link.num_varyings; ++idx) { + const struct etna_varying *varying = &link.varyings[idx]; + + etna_bitarray_set(num_components, 4, idx, varying->num_components); + for (int comp = 0; comp < varying->num_components; ++comp) { + etna_bitarray_set(component_use, 2, total_components, varying->use[comp]); + total_components += 1; + } + } + + cs->GL_VARYING_TOTAL_COMPONENTS = + VIVS_GL_VARYING_TOTAL_COMPONENTS_NUM(align(total_components, 2)); + cs->GL_VARYING_NUM_COMPONENTS = num_components[0]; + cs->GL_VARYING_COMPONENT_USE[0] = component_use[0]; + cs->GL_VARYING_COMPONENT_USE[1] = component_use[1]; + + /* reference instruction memory */ + cs->vs_inst_mem_size = vs->code_size; + cs->VS_INST_MEM = vs->code; + cs->ps_inst_mem_size = fs->code_size; + cs->PS_INST_MEM = fs->code; + + return true; +} + +bool +etna_shader_link(struct etna_context *ctx) +{ + if (!ctx->vs || !ctx->fs) + return false; + + /* re-link vs and fs if needed */ + return etna_link_shaders(ctx, &ctx->shader_state, ctx->vs, ctx->fs); +} + +static bool +etna_shader_update_vs_inputs(struct etna_context *ctx, + struct compiled_shader_state *cs, + const struct etna_shader *vs, + const struct compiled_vertex_elements_state *ves) +{ + unsigned num_temps, cur_temp, num_vs_inputs; + + if (!vs) + return false; + + /* Number of vertex elements determines number of VS inputs. Otherwise, + * the GPU crashes. Allocate any unused vertex elements to VS temporary + * registers. */ + num_vs_inputs = MAX2(ves->num_elements, vs->infile.num_reg); + if (num_vs_inputs != ves->num_elements) { + BUG("Number of elements %u does not match the number of VS inputs %zu", + ctx->vertex_elements->num_elements, ctx->vs->infile.num_reg); + return false; + } + + cur_temp = vs->num_temps; + num_temps = num_vs_inputs - vs->infile.num_reg + cur_temp; + + cs->VS_INPUT_COUNT = VIVS_VS_INPUT_COUNT_COUNT(num_vs_inputs) | + VIVS_VS_INPUT_COUNT_UNK8(vs->input_count_unk8); + cs->VS_TEMP_REGISTER_CONTROL = + VIVS_VS_TEMP_REGISTER_CONTROL_NUM_TEMPS(num_temps); + + /* vs inputs (attributes) */ + DEFINE_ETNA_BITARRAY(vs_input, 16, 8) = {0}; + for (int idx = 0; idx < num_vs_inputs; ++idx) { + if (idx < vs->infile.num_reg) + etna_bitarray_set(vs_input, 8, idx, vs->infile.reg[idx].reg); + else + etna_bitarray_set(vs_input, 8, idx, cur_temp++); + } + + for (int idx = 0; idx < ARRAY_SIZE(cs->VS_INPUT); ++idx) + cs->VS_INPUT[idx] = vs_input[idx]; + + return true; +} + +bool +etna_shader_update_vertex(struct etna_context *ctx) +{ + return etna_shader_update_vs_inputs(ctx, &ctx->shader_state, ctx->vs, + ctx->vertex_elements); +} + +static void * +etna_create_shader_state(struct pipe_context *pctx, + const struct pipe_shader_state *pss) +{ + struct etna_context *ctx = etna_context(pctx); + + return etna_compile_shader(&ctx->specs, pss->tokens); +} + +static void +etna_delete_shader_state(struct pipe_context *pctx, void *ss) +{ + etna_destroy_shader(ss); +} + +static void +etna_bind_fs_state(struct pipe_context *pctx, void *fss_) +{ + struct etna_context *ctx = etna_context(pctx); + struct etna_shader *fss = fss_; + + if (ctx->fs == fss) /* skip if already bound */ + return; + + assert(fss == NULL || fss->processor == PIPE_SHADER_FRAGMENT); + ctx->fs = fss; + ctx->dirty |= ETNA_DIRTY_SHADER; +} + +static void +etna_bind_vs_state(struct pipe_context *pctx, void *vss_) +{ + struct etna_context *ctx = etna_context(pctx); + struct etna_shader *vss = vss_; + + if (ctx->vs == vss) /* skip if already bound */ + return; + + assert(vss == NULL || vss->processor == PIPE_SHADER_VERTEX); + ctx->vs = vss; + ctx->dirty |= ETNA_DIRTY_SHADER; +} + +void +etna_shader_init(struct pipe_context *pctx) +{ + pctx->create_fs_state = etna_create_shader_state; + pctx->bind_fs_state = etna_bind_fs_state; + pctx->delete_fs_state = etna_delete_shader_state; + pctx->create_vs_state = etna_create_shader_state; + pctx->bind_vs_state = etna_bind_vs_state; + pctx->delete_vs_state = etna_delete_shader_state; +} diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_shader.h mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_shader.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_shader.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_shader.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + */ + +#ifndef H_ETNAVIV_SHADER +#define H_ETNAVIV_SHADER + +#include "pipe/p_state.h" + +struct etna_context; +struct etna_shader; +struct compiled_shader_state; + +bool +etna_shader_link(struct etna_context *ctx); + +bool +etna_shader_update_vertex(struct etna_context *ctx); + +void +etna_shader_init(struct pipe_context *pctx); + +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_state.c mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_state.c --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_state.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,662 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + * Christian Gmeiner + */ + +#include "etnaviv_state.h" + +#include "hw/common.xml.h" + +#include "etnaviv_clear_blit.h" +#include "etnaviv_context.h" +#include "etnaviv_format.h" +#include "etnaviv_shader.h" +#include "etnaviv_surface.h" +#include "etnaviv_translate.h" +#include "etnaviv_util.h" +#include "util/u_helpers.h" +#include "util/u_inlines.h" +#include "util/u_math.h" +#include "util/u_memory.h" + +static void +etna_set_blend_color(struct pipe_context *pctx, const struct pipe_blend_color *bc) +{ + struct etna_context *ctx = etna_context(pctx); + struct compiled_blend_color *cs = &ctx->blend_color; + + cs->PE_ALPHA_BLEND_COLOR = + VIVS_PE_ALPHA_BLEND_COLOR_R(etna_cfloat_to_uint8(bc->color[0])) | + VIVS_PE_ALPHA_BLEND_COLOR_G(etna_cfloat_to_uint8(bc->color[1])) | + VIVS_PE_ALPHA_BLEND_COLOR_B(etna_cfloat_to_uint8(bc->color[2])) | + VIVS_PE_ALPHA_BLEND_COLOR_A(etna_cfloat_to_uint8(bc->color[3])); + ctx->dirty |= ETNA_DIRTY_BLEND_COLOR; +} + +static void +etna_set_stencil_ref(struct pipe_context *pctx, const struct pipe_stencil_ref *sr) +{ + struct etna_context *ctx = etna_context(pctx); + struct compiled_stencil_ref *cs = &ctx->stencil_ref; + + ctx->stencil_ref_s = *sr; + + cs->PE_STENCIL_CONFIG = VIVS_PE_STENCIL_CONFIG_REF_FRONT(sr->ref_value[0]); + /* rest of bits weaved in from depth_stencil_alpha */ + cs->PE_STENCIL_CONFIG_EXT = + VIVS_PE_STENCIL_CONFIG_EXT_REF_BACK(sr->ref_value[0]); + ctx->dirty |= ETNA_DIRTY_STENCIL_REF; +} + +static void +etna_set_clip_state(struct pipe_context *pctx, const struct pipe_clip_state *pcs) +{ + /* NOOP */ +} + +static void +etna_set_sample_mask(struct pipe_context *pctx, unsigned sample_mask) +{ + struct etna_context *ctx = etna_context(pctx); + + ctx->sample_mask = sample_mask; + ctx->dirty |= ETNA_DIRTY_SAMPLE_MASK; +} + +static void +etna_set_constant_buffer(struct pipe_context *pctx, uint shader, uint index, + const struct pipe_constant_buffer *cb) +{ + struct etna_context *ctx = etna_context(pctx); + + if (unlikely(index > 0)) { + DBG("Unhandled buffer index %i", index); + return; + } + + + util_copy_constant_buffer(&ctx->constant_buffer[shader], cb); + + /* Note that the state tracker can unbind constant buffers by + * passing NULL here. */ + if (unlikely(!cb)) + return; + + /* there is no support for ARB_uniform_buffer_object */ + assert(cb->buffer == NULL && cb->user_buffer != NULL); + + ctx->dirty |= ETNA_DIRTY_CONSTBUF; +} + +static void +etna_update_render_resource(struct pipe_context *pctx, struct pipe_resource *pres) +{ + struct etna_resource *res = etna_resource(pres); + + if (res->texture && etna_resource_older(res, etna_resource(res->texture))) { + /* The render buffer is older than the texture buffer. Copy it over. */ + etna_copy_resource(pctx, pres, res->texture, 0, pres->last_level); + res->seqno = etna_resource(res->texture)->seqno; + } +} + +static void +etna_set_framebuffer_state(struct pipe_context *pctx, + const struct pipe_framebuffer_state *sv) +{ + struct etna_context *ctx = etna_context(pctx); + struct compiled_framebuffer_state *cs = &ctx->framebuffer; + int nr_samples_color = -1; + int nr_samples_depth = -1; + + /* Set up TS as well. Warning: this state is used by both the RS and PE */ + uint32_t ts_mem_config = 0; + + if (sv->nr_cbufs > 0) { /* at least one color buffer? */ + struct etna_surface *cbuf = etna_surface(sv->cbufs[0]); + struct etna_resource *res = etna_resource(cbuf->base.texture); + bool color_supertiled = (res->layout & ETNA_LAYOUT_BIT_SUPER) != 0; + + assert(res->layout & ETNA_LAYOUT_BIT_TILE); /* Cannot render to linear surfaces */ + etna_update_render_resource(pctx, cbuf->base.texture); + + pipe_surface_reference(&cs->cbuf, &cbuf->base); + cs->PE_COLOR_FORMAT = + VIVS_PE_COLOR_FORMAT_FORMAT(translate_rs_format(cbuf->base.format)) | + VIVS_PE_COLOR_FORMAT_COMPONENTS__MASK | + VIVS_PE_COLOR_FORMAT_OVERWRITE | + COND(color_supertiled, VIVS_PE_COLOR_FORMAT_SUPER_TILED); + /* VIVS_PE_COLOR_FORMAT_COMPONENTS() and + * VIVS_PE_COLOR_FORMAT_OVERWRITE comes from blend_state + * but only if we set the bits above. */ + /* merged with depth_stencil_alpha */ + if ((cbuf->surf.offset & 63) || + (((cbuf->surf.stride * 4) & 63) && cbuf->surf.height > 4)) { + /* XXX Must make temporary surface here. + * Need the same mechanism on gc2000 when we want to do mipmap + * generation by + * rendering to levels > 1 due to multitiled / tiled conversion. */ + BUG("Alignment error, trying to render to offset %08x with tile " + "stride %i", + cbuf->surf.offset, cbuf->surf.stride * 4); + } + + if (ctx->specs.pixel_pipes == 1) { + cs->PE_COLOR_ADDR = cbuf->reloc[0]; + cs->PE_COLOR_ADDR.flags = ETNA_RELOC_READ | ETNA_RELOC_WRITE; + } else { + /* Rendered textures must always be multi-tiled */ + assert(res->layout & ETNA_LAYOUT_BIT_MULTI); + for (int i = 0; i < ctx->specs.pixel_pipes; i++) { + cs->PE_PIPE_COLOR_ADDR[i] = cbuf->reloc[i]; + cs->PE_PIPE_COLOR_ADDR[i].flags = ETNA_RELOC_READ | ETNA_RELOC_WRITE; + } + } + cs->PE_COLOR_STRIDE = cbuf->surf.stride; + + if (cbuf->surf.ts_size) { + ts_mem_config |= VIVS_TS_MEM_CONFIG_COLOR_FAST_CLEAR; + cs->TS_COLOR_CLEAR_VALUE = cbuf->level->clear_value; + + cs->TS_COLOR_STATUS_BASE = cbuf->ts_reloc; + cs->TS_COLOR_STATUS_BASE.flags = ETNA_RELOC_READ | ETNA_RELOC_WRITE; + + cs->TS_COLOR_SURFACE_BASE = cbuf->reloc[0]; + cs->TS_COLOR_SURFACE_BASE.flags = ETNA_RELOC_READ | ETNA_RELOC_WRITE; + } + + /* MSAA */ + if (cbuf->base.texture->nr_samples > 1) + ts_mem_config |= + VIVS_TS_MEM_CONFIG_MSAA | translate_msaa_format(cbuf->base.format); + + nr_samples_color = cbuf->base.texture->nr_samples; + } else { + pipe_surface_reference(&cs->cbuf, NULL); + /* Clearing VIVS_PE_COLOR_FORMAT_COMPONENTS__MASK and + * VIVS_PE_COLOR_FORMAT_OVERWRITE prevents us from overwriting the + * color target */ + cs->PE_COLOR_FORMAT = 0; + cs->PE_COLOR_STRIDE = 0; + cs->TS_COLOR_STATUS_BASE.bo = NULL; + cs->TS_COLOR_SURFACE_BASE.bo = NULL; + + for (int i = 0; i < ETNA_MAX_PIXELPIPES; i++) + cs->PE_PIPE_COLOR_ADDR[i].bo = NULL; + } + + if (sv->zsbuf != NULL) { + struct etna_surface *zsbuf = etna_surface(sv->zsbuf); + struct etna_resource *res = etna_resource(zsbuf->base.texture); + + etna_update_render_resource(pctx, zsbuf->base.texture); + + pipe_surface_reference(&cs->zsbuf, &zsbuf->base); + assert(res->layout &ETNA_LAYOUT_BIT_TILE); /* Cannot render to linear surfaces */ + + uint32_t depth_format = translate_depth_format(zsbuf->base.format); + unsigned depth_bits = + depth_format == VIVS_PE_DEPTH_CONFIG_DEPTH_FORMAT_D16 ? 16 : 24; + bool depth_supertiled = (res->layout & ETNA_LAYOUT_BIT_SUPER) != 0; + + cs->PE_DEPTH_CONFIG = + depth_format | + COND(depth_supertiled, VIVS_PE_DEPTH_CONFIG_SUPER_TILED) | + VIVS_PE_DEPTH_CONFIG_DEPTH_MODE_Z; + /* VIVS_PE_DEPTH_CONFIG_ONLY_DEPTH */ + /* merged with depth_stencil_alpha */ + + if (ctx->specs.pixel_pipes == 1) { + cs->PE_DEPTH_ADDR = zsbuf->reloc[0]; + cs->PE_DEPTH_ADDR.flags = ETNA_RELOC_READ | ETNA_RELOC_WRITE; + } else { + for (int i = 0; i < ctx->specs.pixel_pipes; i++) { + cs->PE_PIPE_DEPTH_ADDR[i] = zsbuf->reloc[i]; + cs->PE_PIPE_DEPTH_ADDR[i].flags = ETNA_RELOC_READ | ETNA_RELOC_WRITE; + } + } + + cs->PE_DEPTH_STRIDE = zsbuf->surf.stride; + cs->PE_HDEPTH_CONTROL = VIVS_PE_HDEPTH_CONTROL_FORMAT_DISABLED; + cs->PE_DEPTH_NORMALIZE = fui(exp2f(depth_bits) - 1.0f); + + if (zsbuf->surf.ts_size) { + ts_mem_config |= VIVS_TS_MEM_CONFIG_DEPTH_FAST_CLEAR; + cs->TS_DEPTH_CLEAR_VALUE = zsbuf->level->clear_value; + + cs->TS_DEPTH_STATUS_BASE = zsbuf->ts_reloc; + cs->TS_DEPTH_STATUS_BASE.flags = ETNA_RELOC_READ | ETNA_RELOC_WRITE; + + cs->TS_DEPTH_SURFACE_BASE = zsbuf->reloc[0]; + cs->TS_DEPTH_SURFACE_BASE.flags = ETNA_RELOC_READ | ETNA_RELOC_WRITE; + } + + ts_mem_config |= COND(depth_bits == 16, VIVS_TS_MEM_CONFIG_DEPTH_16BPP); + + /* MSAA */ + if (zsbuf->base.texture->nr_samples > 1) + /* XXX VIVS_TS_MEM_CONFIG_DEPTH_COMPRESSION; + * Disable without MSAA for now, as it causes corruption in glquake. */ + ts_mem_config |= VIVS_TS_MEM_CONFIG_DEPTH_COMPRESSION; + + nr_samples_depth = zsbuf->base.texture->nr_samples; + } else { + pipe_surface_reference(&cs->zsbuf, NULL); + cs->PE_DEPTH_CONFIG = VIVS_PE_DEPTH_CONFIG_DEPTH_MODE_NONE; + cs->PE_DEPTH_ADDR.bo = NULL; + cs->PE_DEPTH_STRIDE = 0; + cs->TS_DEPTH_STATUS_BASE.bo = NULL; + cs->TS_DEPTH_SURFACE_BASE.bo = NULL; + + for (int i = 0; i < ETNA_MAX_PIXELPIPES; i++) + cs->PE_PIPE_DEPTH_ADDR[i].bo = NULL; + } + + /* MSAA setup */ + if (nr_samples_depth != -1 && nr_samples_color != -1 && + nr_samples_depth != nr_samples_color) { + BUG("Number of samples in color and depth texture must match (%i and %i respectively)", + nr_samples_color, nr_samples_depth); + } + + switch (MAX2(nr_samples_depth, nr_samples_color)) { + case 0: + case 1: /* Are 0 and 1 samples allowed? */ + cs->GL_MULTI_SAMPLE_CONFIG = + VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_SAMPLES_NONE; + cs->msaa_mode = false; + break; + case 2: + cs->GL_MULTI_SAMPLE_CONFIG = VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_SAMPLES_2X; + cs->msaa_mode = true; /* Add input to PS */ + cs->RA_MULTISAMPLE_UNK00E04 = 0x0; + cs->RA_MULTISAMPLE_UNK00E10[0] = 0x0000aa22; + cs->RA_CENTROID_TABLE[0] = 0x66aa2288; + cs->RA_CENTROID_TABLE[1] = 0x88558800; + cs->RA_CENTROID_TABLE[2] = 0x88881100; + cs->RA_CENTROID_TABLE[3] = 0x33888800; + break; + case 4: + cs->GL_MULTI_SAMPLE_CONFIG = VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_SAMPLES_4X; + cs->msaa_mode = true; /* Add input to PS */ + cs->RA_MULTISAMPLE_UNK00E04 = 0x0; + cs->RA_MULTISAMPLE_UNK00E10[0] = 0xeaa26e26; + cs->RA_MULTISAMPLE_UNK00E10[1] = 0xe6ae622a; + cs->RA_MULTISAMPLE_UNK00E10[2] = 0xaaa22a22; + cs->RA_CENTROID_TABLE[0] = 0x4a6e2688; + cs->RA_CENTROID_TABLE[1] = 0x888888a2; + cs->RA_CENTROID_TABLE[2] = 0x888888ea; + cs->RA_CENTROID_TABLE[3] = 0x888888c6; + cs->RA_CENTROID_TABLE[4] = 0x46622a88; + cs->RA_CENTROID_TABLE[5] = 0x888888ae; + cs->RA_CENTROID_TABLE[6] = 0x888888e6; + cs->RA_CENTROID_TABLE[7] = 0x888888ca; + cs->RA_CENTROID_TABLE[8] = 0x262a2288; + cs->RA_CENTROID_TABLE[9] = 0x886688a2; + cs->RA_CENTROID_TABLE[10] = 0x888866aa; + cs->RA_CENTROID_TABLE[11] = 0x668888a6; + break; + } + + /* Scissor setup */ + cs->SE_SCISSOR_LEFT = 0; /* affected by rasterizer and scissor state as well */ + cs->SE_SCISSOR_TOP = 0; + cs->SE_SCISSOR_RIGHT = (sv->width << 16) + ETNA_SE_SCISSOR_MARGIN_RIGHT; + cs->SE_SCISSOR_BOTTOM = (sv->height << 16) + ETNA_SE_SCISSOR_MARGIN_BOTTOM; + cs->SE_CLIP_RIGHT = (sv->width << 16) + ETNA_SE_CLIP_MARGIN_RIGHT; + cs->SE_CLIP_BOTTOM = (sv->height << 16) + ETNA_SE_CLIP_MARGIN_BOTTOM; + + cs->TS_MEM_CONFIG = ts_mem_config; + + ctx->framebuffer_s = *sv; /* keep copy of original structure */ + ctx->dirty |= ETNA_DIRTY_FRAMEBUFFER; +} + +static void +etna_set_polygon_stipple(struct pipe_context *pctx, + const struct pipe_poly_stipple *stipple) +{ + /* NOP */ +} + +static void +etna_set_scissor_states(struct pipe_context *pctx, unsigned start_slot, + unsigned num_scissors, const struct pipe_scissor_state *ss) +{ + struct etna_context *ctx = etna_context(pctx); + struct compiled_scissor_state *cs = &ctx->scissor; + assert(ss->minx <= ss->maxx); + assert(ss->miny <= ss->maxy); + + /* note that this state is only used when rasterizer_state->scissor is on */ + ctx->scissor_s = *ss; + cs->SE_SCISSOR_LEFT = (ss->minx << 16); + cs->SE_SCISSOR_TOP = (ss->miny << 16); + cs->SE_SCISSOR_RIGHT = (ss->maxx << 16) + ETNA_SE_SCISSOR_MARGIN_RIGHT; + cs->SE_SCISSOR_BOTTOM = (ss->maxy << 16) + ETNA_SE_SCISSOR_MARGIN_BOTTOM; + cs->SE_CLIP_RIGHT = (ss->maxx << 16) + ETNA_SE_CLIP_MARGIN_RIGHT; + cs->SE_CLIP_BOTTOM = (ss->maxy << 16) + ETNA_SE_CLIP_MARGIN_BOTTOM; + + ctx->dirty |= ETNA_DIRTY_SCISSOR; +} + +static void +etna_set_viewport_states(struct pipe_context *pctx, unsigned start_slot, + unsigned num_scissors, const struct pipe_viewport_state *vs) +{ + struct etna_context *ctx = etna_context(pctx); + struct compiled_viewport_state *cs = &ctx->viewport; + + ctx->viewport_s = *vs; + /** + * For Vivante GPU, viewport z transformation is 0..1 to 0..1 instead of + * -1..1 to 0..1. + * scaling and translation to 0..1 already happened, so remove that + * + * z' = (z * 2 - 1) * scale + translate + * = z * (2 * scale) + (translate - scale) + * + * scale' = 2 * scale + * translate' = translate - scale + */ + + /* must be fixp as v4 state deltas assume it is */ + cs->PA_VIEWPORT_SCALE_X = etna_f32_to_fixp16(vs->scale[0]); + cs->PA_VIEWPORT_SCALE_Y = etna_f32_to_fixp16(vs->scale[1]); + cs->PA_VIEWPORT_SCALE_Z = fui(vs->scale[2] * 2.0f); + cs->PA_VIEWPORT_OFFSET_X = etna_f32_to_fixp16(vs->translate[0]); + cs->PA_VIEWPORT_OFFSET_Y = etna_f32_to_fixp16(vs->translate[1]); + cs->PA_VIEWPORT_OFFSET_Z = fui(vs->translate[2] - vs->scale[2]); + + /* Compute scissor rectangle (fixp) from viewport. + * Make sure left is always < right and top always < bottom. + */ + cs->SE_SCISSOR_LEFT = etna_f32_to_fixp16(MAX2(vs->translate[0] - fabsf(vs->scale[0]), 0.0f)); + cs->SE_SCISSOR_TOP = etna_f32_to_fixp16(MAX2(vs->translate[1] - fabsf(vs->scale[1]), 0.0f)); + uint32_t right_fixp = etna_f32_to_fixp16(MAX2(vs->translate[0] + fabsf(vs->scale[0]), 0.0f)); + uint32_t bottom_fixp = etna_f32_to_fixp16(MAX2(vs->translate[1] + fabsf(vs->scale[1]), 0.0f)); + cs->SE_SCISSOR_RIGHT = right_fixp + ETNA_SE_SCISSOR_MARGIN_RIGHT; + cs->SE_SCISSOR_BOTTOM = bottom_fixp + ETNA_SE_SCISSOR_MARGIN_BOTTOM; + cs->SE_CLIP_RIGHT = right_fixp + ETNA_SE_CLIP_MARGIN_RIGHT; + cs->SE_CLIP_BOTTOM = bottom_fixp + ETNA_SE_CLIP_MARGIN_BOTTOM; + + cs->PE_DEPTH_NEAR = fui(0.0); /* not affected if depth mode is Z (as in GL) */ + cs->PE_DEPTH_FAR = fui(1.0); + ctx->dirty |= ETNA_DIRTY_VIEWPORT; +} + +static void +etna_set_vertex_buffers(struct pipe_context *pctx, unsigned start_slot, + unsigned num_buffers, const struct pipe_vertex_buffer *vb) +{ + struct etna_context *ctx = etna_context(pctx); + struct etna_vertexbuf_state *so = &ctx->vertex_buffer; + + util_set_vertex_buffers_mask(so->vb, &so->enabled_mask, vb, start_slot, num_buffers); + so->count = util_last_bit(so->enabled_mask); + + for (unsigned idx = start_slot; idx < start_slot + num_buffers; ++idx) { + struct compiled_set_vertex_buffer *cs = &so->cvb[idx]; + struct pipe_vertex_buffer *vbi = &so->vb[idx]; + + assert(!vbi->user_buffer); /* XXX support user_buffer using + etna_usermem_map */ + + if (vbi->buffer) { /* GPU buffer */ + cs->FE_VERTEX_STREAM_BASE_ADDR.bo = etna_resource(vbi->buffer)->bo; + cs->FE_VERTEX_STREAM_BASE_ADDR.offset = vbi->buffer_offset; + cs->FE_VERTEX_STREAM_BASE_ADDR.flags = ETNA_RELOC_READ; + cs->FE_VERTEX_STREAM_CONTROL = + FE_VERTEX_STREAM_CONTROL_VERTEX_STRIDE(vbi->stride); + } else { + cs->FE_VERTEX_STREAM_BASE_ADDR.bo = NULL; + cs->FE_VERTEX_STREAM_CONTROL = 0; + } + } + + ctx->dirty |= ETNA_DIRTY_VERTEX_BUFFERS; +} + +static void +etna_set_index_buffer(struct pipe_context *pctx, const struct pipe_index_buffer *ib) +{ + struct etna_context *ctx = etna_context(pctx); + uint32_t ctrl; + + if (ib) { + pipe_resource_reference(&ctx->index_buffer.ib.buffer, ib->buffer); + memcpy(&ctx->index_buffer.ib, ib, sizeof(ctx->index_buffer.ib)); + ctrl = translate_index_size(ctx->index_buffer.ib.index_size); + } else { + pipe_resource_reference(&ctx->index_buffer.ib.buffer, NULL); + ctrl = 0; + } + + if (ctx->index_buffer.ib.buffer && ctrl != ETNA_NO_MATCH) { + ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.bo = etna_resource(ctx->index_buffer.ib.buffer)->bo; + ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.offset = ctx->index_buffer.ib.offset; + ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.flags = ETNA_RELOC_READ; + ctx->index_buffer.FE_INDEX_STREAM_CONTROL = ctrl; + } else { + ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.bo = NULL; + ctx->index_buffer.FE_INDEX_STREAM_CONTROL = 0; + } + + ctx->dirty |= ETNA_DIRTY_INDEX_BUFFER; +} + +static void +etna_blend_state_bind(struct pipe_context *pctx, void *bs) +{ + struct etna_context *ctx = etna_context(pctx); + + ctx->blend = bs; + ctx->dirty |= ETNA_DIRTY_BLEND; +} + +static void +etna_blend_state_delete(struct pipe_context *pctx, void *bs) +{ + FREE(bs); +} + +static void +etna_rasterizer_state_bind(struct pipe_context *pctx, void *rs) +{ + struct etna_context *ctx = etna_context(pctx); + + ctx->rasterizer = rs; + ctx->dirty |= ETNA_DIRTY_RASTERIZER; +} + +static void +etna_rasterizer_state_delete(struct pipe_context *pctx, void *rs) +{ + FREE(rs); +} + +static void +etna_zsa_state_bind(struct pipe_context *pctx, void *zs) +{ + struct etna_context *ctx = etna_context(pctx); + + ctx->zsa = zs; + ctx->dirty |= ETNA_DIRTY_ZSA; +} + +static void +etna_zsa_state_delete(struct pipe_context *pctx, void *zs) +{ + FREE(zs); +} + +/** Create vertex element states, which define a layout for fetching + * vertices for rendering. + */ +static void * +etna_vertex_elements_state_create(struct pipe_context *pctx, + unsigned num_elements, const struct pipe_vertex_element *elements) +{ + struct etna_context *ctx = etna_context(pctx); + struct compiled_vertex_elements_state *cs = CALLOC_STRUCT(compiled_vertex_elements_state); + + if (!cs) + return NULL; + + if (num_elements > ctx->specs.vertex_max_elements) { + BUG("number of elements (%u) exceeds chip maximum (%u)", num_elements, + ctx->specs.vertex_max_elements); + return NULL; + } + + /* XXX could minimize number of consecutive stretches here by sorting, and + * permuting the inputs in shader or does Mesa do this already? */ + + /* Check that vertex element binding is compatible with hardware; thus + * elements[idx].vertex_buffer_index are < stream_count. If not, the binding + * uses more streams than is supported, and u_vbuf should have done some + * reorganization for compatibility. */ + + /* TODO: does mesa this for us? */ + bool incompatible = false; + for (unsigned idx = 0; idx < num_elements; ++idx) { + if (elements[idx].vertex_buffer_index >= ctx->specs.stream_count || elements[idx].instance_divisor > 0) + incompatible = true; + } + + cs->num_elements = num_elements; + if (incompatible || num_elements == 0) { + DBG("Error: zero vertex elements, or more vertex buffers used than supported"); + FREE(cs); + return NULL; + } + + unsigned start_offset = 0; /* start of current consecutive stretch */ + bool nonconsecutive = true; /* previous value of nonconsecutive */ + + for (unsigned idx = 0; idx < num_elements; ++idx) { + unsigned element_size = util_format_get_blocksize(elements[idx].src_format); + unsigned end_offset = elements[idx].src_offset + element_size; + uint32_t format_type, normalize; + + if (nonconsecutive) + start_offset = elements[idx].src_offset; + + /* maximum vertex size is 256 bytes */ + assert(element_size != 0 && end_offset <= 256); + + /* check whether next element is consecutive to this one */ + nonconsecutive = (idx == (num_elements - 1)) || + elements[idx + 1].vertex_buffer_index != elements[idx].vertex_buffer_index || + end_offset != elements[idx + 1].src_offset; + + format_type = translate_vertex_format_type(elements[idx].src_format); + normalize = translate_vertex_format_normalize(elements[idx].src_format); + + assert(format_type != ETNA_NO_MATCH); + assert(normalize != ETNA_NO_MATCH); + + cs->FE_VERTEX_ELEMENT_CONFIG[idx] = + COND(nonconsecutive, VIVS_FE_VERTEX_ELEMENT_CONFIG_NONCONSECUTIVE) | + format_type | + VIVS_FE_VERTEX_ELEMENT_CONFIG_NUM(util_format_get_nr_components(elements[idx].src_format)) | + normalize | VIVS_FE_VERTEX_ELEMENT_CONFIG_ENDIAN(ENDIAN_MODE_NO_SWAP) | + VIVS_FE_VERTEX_ELEMENT_CONFIG_STREAM(elements[idx].vertex_buffer_index) | + VIVS_FE_VERTEX_ELEMENT_CONFIG_START(elements[idx].src_offset) | + VIVS_FE_VERTEX_ELEMENT_CONFIG_END(end_offset - start_offset); + } + + return cs; +} + +static void +etna_vertex_elements_state_delete(struct pipe_context *pctx, void *ve) +{ + FREE(ve); +} + +static void +etna_vertex_elements_state_bind(struct pipe_context *pctx, void *ve) +{ + struct etna_context *ctx = etna_context(pctx); + + ctx->vertex_elements = ve; + ctx->dirty |= ETNA_DIRTY_VERTEX_ELEMENTS; +} + +struct etna_state_updater { + bool (*update)(struct etna_context *ctx); + uint32_t dirty; +}; + +static const struct etna_state_updater etna_state_updates[] = { + { + etna_shader_update_vertex, ETNA_DIRTY_SHADER | ETNA_DIRTY_VERTEX_ELEMENTS, + }, + { + etna_shader_link, ETNA_DIRTY_SHADER, + } +}; + +bool +etna_state_update(struct etna_context *ctx) +{ + for (unsigned int i = 0; i < ARRAY_SIZE(etna_state_updates); i++) + if (ctx->dirty & etna_state_updates[i].dirty) + if (!etna_state_updates[i].update(ctx)) + return false; + + return true; +} + +void +etna_state_init(struct pipe_context *pctx) +{ + pctx->set_blend_color = etna_set_blend_color; + pctx->set_stencil_ref = etna_set_stencil_ref; + pctx->set_clip_state = etna_set_clip_state; + pctx->set_sample_mask = etna_set_sample_mask; + pctx->set_constant_buffer = etna_set_constant_buffer; + pctx->set_framebuffer_state = etna_set_framebuffer_state; + pctx->set_polygon_stipple = etna_set_polygon_stipple; + pctx->set_scissor_states = etna_set_scissor_states; + pctx->set_viewport_states = etna_set_viewport_states; + + pctx->set_vertex_buffers = etna_set_vertex_buffers; + pctx->set_index_buffer = etna_set_index_buffer; + + pctx->bind_blend_state = etna_blend_state_bind; + pctx->delete_blend_state = etna_blend_state_delete; + + pctx->bind_rasterizer_state = etna_rasterizer_state_bind; + pctx->delete_rasterizer_state = etna_rasterizer_state_delete; + + pctx->bind_depth_stencil_alpha_state = etna_zsa_state_bind; + pctx->delete_depth_stencil_alpha_state = etna_zsa_state_delete; + + pctx->create_vertex_elements_state = etna_vertex_elements_state_create; + pctx->delete_vertex_elements_state = etna_vertex_elements_state_delete; + pctx->bind_vertex_elements_state = etna_vertex_elements_state_bind; +} diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_state.h mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_state.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_state.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_state.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + * Christian Gmeiner + */ + +#ifndef ETNAVIV_STATE_H_ +#define ETNAVIV_STATE_H_ + +#include "etnaviv_context.h" +#include "pipe/p_context.h" + +static inline bool +etna_depth_enabled(struct etna_context *ctx) +{ + return ctx->zsa && ctx->zsa->depth.enabled; +} + +static inline bool +etna_stencil_enabled(struct etna_context *ctx) +{ + return ctx->zsa && ctx->zsa->stencil[0].enabled; +} + +bool +etna_state_update(struct etna_context *ctx); + +void +etna_state_init(struct pipe_context *pctx); + +#endif /* ETNAVIV_STATE_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_surface.c mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_surface.c --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_surface.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_surface.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,152 @@ +/* + * Copyright (c) 2012-2013 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + */ + +#include "etnaviv_surface.h" +#include "etnaviv_screen.h" + +#include "etnaviv_clear_blit.h" +#include "etnaviv_context.h" +#include "etnaviv_translate.h" +#include "pipe/p_defines.h" +#include "pipe/p_state.h" +#include "util/u_inlines.h" +#include "util/u_memory.h" + +#include "hw/common.xml.h" + +static struct pipe_surface * +etna_create_surface(struct pipe_context *pctx, struct pipe_resource *prsc, + const struct pipe_surface *templat) +{ + struct etna_context *ctx = etna_context(pctx); + struct etna_resource *rsc = etna_resource(prsc); + struct etna_surface *surf = CALLOC_STRUCT(etna_surface); + + if (!surf) + return NULL; + + assert(templat->u.tex.first_layer == templat->u.tex.last_layer); + unsigned layer = templat->u.tex.first_layer; + unsigned level = templat->u.tex.level; + assert(layer < rsc->base.array_size); + + surf->base.context = pctx; + + pipe_reference_init(&surf->base.reference, 1); + pipe_resource_reference(&surf->base.texture, &rsc->base); + + /* Allocate a TS for the resource if there isn't one yet, + * and it is allowed by the hw (width is a multiple of 16). + * Avoid doing this for GPUs with MC1.0, as kernel sources + * indicate the tile status module bypasses the memory + * offset and MMU. */ + + /* XXX for now, don't do TS for render textures as this path + * is not stable. */ + if (VIV_FEATURE(ctx->screen, chipFeatures, FAST_CLEAR) && + VIV_FEATURE(ctx->screen, chipMinorFeatures0, MC20) && + !DBG_ENABLED(ETNA_DBG_NO_TS) && !rsc->ts_bo && + !(rsc->base.bind & (PIPE_BIND_SAMPLER_VIEW)) && + (rsc->levels[level].padded_width & ETNA_RS_WIDTH_MASK) == 0 && + (rsc->levels[level].padded_height & ETNA_RS_HEIGHT_MASK) == 0) { + etna_screen_resource_alloc_ts(pctx->screen, rsc); + } + + surf->base.texture = &rsc->base; + surf->base.format = rsc->base.format; + surf->base.width = rsc->levels[level].width; + surf->base.height = rsc->levels[level].height; + surf->base.writable = templat->writable; /* what is this for anyway */ + surf->base.u = templat->u; + + surf->level = &rsc->levels[level]; /* Keep pointer to actual level to set + * clear color on underlying resource + * instead of surface */ + surf->surf = rsc->levels [level]; /* Make copy of level to narrow down + * address to layer */ + + /* XXX we don't really need a copy but it's convenient */ + surf->surf.offset += layer * surf->surf.layer_stride; + + struct etna_resource_level *lev = &rsc->levels[level]; + + /* Setup template relocations for this surface */ + surf->reloc[0].bo = rsc->bo; + surf->reloc[0].offset = surf->surf.offset; + surf->reloc[0].flags = 0; + surf->reloc[1].bo = rsc->bo; + surf->reloc[1].offset = surf->surf.offset + lev->stride * lev->padded_height / 2; + surf->reloc[1].flags = 0; + + if (surf->surf.ts_size) { + unsigned int layer_offset = layer * surf->surf.ts_layer_stride; + assert(layer_offset < surf->surf.ts_size); + + surf->surf.ts_offset += layer_offset; + surf->surf.ts_size -= layer_offset; + + surf->ts_reloc.bo = rsc->ts_bo; + surf->ts_reloc.offset = surf->surf.ts_offset; + surf->ts_reloc.flags = 0; + + /* This (ab)uses the RS as a plain buffer memset(). + * Currently uses a fixed row size of 64 bytes. Some benchmarking with + * different sizes may be in order. */ + struct etna_bo *ts_bo = etna_resource(surf->base.texture)->ts_bo; + etna_compile_rs_state(ctx, &surf->clear_command, &(struct rs_state) { + .source_format = RS_FORMAT_A8R8G8B8, + .dest_format = RS_FORMAT_A8R8G8B8, + .dest = ts_bo, + .dest_offset = surf->surf.ts_offset, + .dest_stride = 0x40, + .dest_tiling = ETNA_LAYOUT_TILED, + .dither = {0xffffffff, 0xffffffff}, + .width = 16, + .height = etna_align_up(surf->surf.ts_size / 0x40, 4), + .clear_value = {ctx->specs.ts_clear_value}, + .clear_mode = VIVS_RS_CLEAR_CONTROL_MODE_ENABLED1, + .clear_bits = 0xffff + }); + } else { + etna_rs_gen_clear_surface(ctx, surf, surf->level->clear_value); + } + + return &surf->base; +} + +static void +etna_surface_destroy(struct pipe_context *pctx, struct pipe_surface *psurf) +{ + pipe_resource_reference(&psurf->texture, NULL); + FREE(psurf); +} + +void +etna_surface_init(struct pipe_context *pctx) +{ + pctx->create_surface = etna_create_surface; + pctx->surface_destroy = etna_surface_destroy; +} diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_surface.h mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_surface.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_surface.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_surface.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + */ + +#ifndef H_ETNAVIV_SURFACE +#define H_ETNAVIV_SURFACE + +#include "etnaviv_resource.h" +#include "etnaviv_rs.h" +#include "etnaviv_tiling.h" +#include "pipe/p_state.h" + +struct etna_surface { + struct pipe_surface base; + + struct etna_resource_level surf; + struct compiled_rs_state clear_command; + /* Keep pointer to resource level, for fast clear */ + struct etna_resource_level *level; + struct etna_reloc reloc[ETNA_MAX_PIXELPIPES]; + struct etna_reloc ts_reloc; +}; + +static inline struct etna_surface * +etna_surface(struct pipe_surface *p) +{ + return (struct etna_surface *)p; +} + +void +etna_surface_init(struct pipe_context *pctx); + +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_texture.c mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_texture.c --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_texture.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_texture.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,338 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + */ + +#include "etnaviv_texture.h" + +#include "hw/common.xml.h" + +#include "etnaviv_clear_blit.h" +#include "etnaviv_context.h" +#include "etnaviv_emit.h" +#include "etnaviv_format.h" +#include "etnaviv_translate.h" +#include "util/u_inlines.h" +#include "util/u_memory.h" + +static void * +etna_create_sampler_state(struct pipe_context *pipe, + const struct pipe_sampler_state *ss) +{ + struct etna_sampler_state *cs = CALLOC_STRUCT(etna_sampler_state); + + if (!cs) + return NULL; + + cs->TE_SAMPLER_CONFIG0 = + VIVS_TE_SAMPLER_CONFIG0_UWRAP(translate_texture_wrapmode(ss->wrap_s)) | + VIVS_TE_SAMPLER_CONFIG0_VWRAP(translate_texture_wrapmode(ss->wrap_t)) | + VIVS_TE_SAMPLER_CONFIG0_MIN(translate_texture_filter(ss->min_img_filter)) | + VIVS_TE_SAMPLER_CONFIG0_MIP(translate_texture_mipfilter(ss->min_mip_filter)) | + VIVS_TE_SAMPLER_CONFIG0_MAG(translate_texture_filter(ss->mag_img_filter)) | + COND(ss->normalized_coords, VIVS_TE_SAMPLER_CONFIG0_ROUND_UV); + cs->TE_SAMPLER_CONFIG1 = 0; /* VIVS_TE_SAMPLER_CONFIG1 (swizzle, extended + format) fully determined by sampler view */ + cs->TE_SAMPLER_LOD_CONFIG = + COND(ss->lod_bias != 0.0, VIVS_TE_SAMPLER_LOD_CONFIG_BIAS_ENABLE) | + VIVS_TE_SAMPLER_LOD_CONFIG_BIAS(etna_float_to_fixp55(ss->lod_bias)); + + if (ss->min_mip_filter != PIPE_TEX_MIPFILTER_NONE) { + cs->min_lod = etna_float_to_fixp55(ss->min_lod); + cs->max_lod = etna_float_to_fixp55(ss->max_lod); + } else { + /* when not mipmapping, we need to set max/min lod so that always + * lowest LOD is selected */ + cs->min_lod = cs->max_lod = etna_float_to_fixp55(ss->min_lod); + } + + return cs; +} + +static void +etna_bind_sampler_states(struct pipe_context *pctx, unsigned shader, + unsigned start_slot, unsigned num_samplers, + void **samplers) +{ + /* bind fragment sampler */ + struct etna_context *ctx = etna_context(pctx); + int offset; + + switch (shader) { + case PIPE_SHADER_FRAGMENT: + offset = 0; + ctx->num_fragment_samplers = num_samplers; + break; + case PIPE_SHADER_VERTEX: + offset = ctx->specs.vertex_sampler_offset; + break; + default: + assert(!"Invalid shader"); + return; + } + + uint32_t mask = 1 << offset; + for (int idx = 0; idx < num_samplers; ++idx, mask <<= 1) { + ctx->sampler[offset + idx] = samplers[idx]; + if (samplers[idx]) + ctx->active_samplers |= mask; + else + ctx->active_samplers &= ~mask; + } + + ctx->dirty |= ETNA_DIRTY_SAMPLERS; +} + +static void +etna_delete_sampler_state(struct pipe_context *pctx, void *ss) +{ + FREE(ss); +} + +static void +etna_update_sampler_source(struct pipe_sampler_view *view) +{ + struct etna_resource *res = etna_resource(view->texture); + + if (res->texture && etna_resource_older(etna_resource(res->texture), res)) { + /* Texture is older than render buffer, copy the texture using RS */ + etna_copy_resource(view->context, res->texture, view->texture, 0, + view->texture->last_level); + etna_resource(res->texture)->seqno = res->seqno; + } +} + +static bool +etna_resource_sampler_compatible(struct etna_resource *res) +{ + if (util_format_is_compressed(res->base.format)) + return true; + + /* The sampler (as we currently know it) only accepts tiled layouts */ + if (res->layout != ETNA_LAYOUT_TILED) + return false; + + /* If we have HALIGN support, we can allow for the RS padding */ + struct etna_screen *screen = etna_screen(res->base.screen); + if (VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN)) + return true; + + /* Non-HALIGN GPUs only accept 4x4 tile-aligned textures */ + if (res->halign != TEXTURE_HALIGN_FOUR) + return false; + + return true; +} + +static struct pipe_sampler_view * +etna_create_sampler_view(struct pipe_context *pctx, struct pipe_resource *prsc, + const struct pipe_sampler_view *so) +{ + struct etna_sampler_view *sv = CALLOC_STRUCT(etna_sampler_view); + struct etna_resource *res = etna_resource(prsc); + struct etna_context *ctx = etna_context(pctx); + + if (!sv) + return NULL; + + if (!etna_resource_sampler_compatible(res)) { + /* The original resource is not compatible with the sampler. + * Allocate an appropriately tiled texture. */ + if (!res->texture) { + struct pipe_resource templat = *prsc; + + templat.bind &= ~(PIPE_BIND_DEPTH_STENCIL | PIPE_BIND_RENDER_TARGET | + PIPE_BIND_BLENDABLE); + res->texture = + etna_resource_alloc(pctx->screen, ETNA_LAYOUT_TILED, &templat); + } + + if (!res->texture) { + free(sv); + return NULL; + } + res = etna_resource(res->texture); + } + + sv->base = *so; + pipe_reference(NULL, &prsc->reference); + sv->base.texture = prsc; + sv->base.reference.count = 1; + sv->base.context = pctx; + + /* merged with sampler state */ + sv->TE_SAMPLER_CONFIG0 = + VIVS_TE_SAMPLER_CONFIG0_FORMAT(translate_texture_format(sv->base.format)); + sv->TE_SAMPLER_CONFIG0_MASK = 0xffffffff; + + switch (sv->base.target) { + case PIPE_TEXTURE_1D: + /* For 1D textures, we will have a height of 1, so we can use 2D + * but set T wrap to repeat */ + sv->TE_SAMPLER_CONFIG0_MASK = ~VIVS_TE_SAMPLER_CONFIG0_VWRAP__MASK; + sv->TE_SAMPLER_CONFIG0 |= VIVS_TE_SAMPLER_CONFIG0_VWRAP(TEXTURE_WRAPMODE_REPEAT); + case PIPE_TEXTURE_2D: + case PIPE_TEXTURE_RECT: + sv->TE_SAMPLER_CONFIG0 |= VIVS_TE_SAMPLER_CONFIG0_TYPE(TEXTURE_TYPE_2D); + break; + case PIPE_TEXTURE_CUBE: + sv->TE_SAMPLER_CONFIG0 |= VIVS_TE_SAMPLER_CONFIG0_TYPE(TEXTURE_TYPE_CUBE_MAP); + break; + default: + BUG("Unhandled texture target"); + free(sv); + return NULL; + } + + sv->TE_SAMPLER_CONFIG1 = VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_R(so->swizzle_r) | + VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_G(so->swizzle_g) | + VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_B(so->swizzle_b) | + VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_A(so->swizzle_a) | + VIVS_TE_SAMPLER_CONFIG1_HALIGN(res->halign); + sv->TE_SAMPLER_SIZE = VIVS_TE_SAMPLER_SIZE_WIDTH(res->base.width0) | + VIVS_TE_SAMPLER_SIZE_HEIGHT(res->base.height0); + sv->TE_SAMPLER_LOG_SIZE = + VIVS_TE_SAMPLER_LOG_SIZE_WIDTH(etna_log2_fixp55(res->base.width0)) | + VIVS_TE_SAMPLER_LOG_SIZE_HEIGHT(etna_log2_fixp55(res->base.height0)); + + /* Set up levels-of-detail */ + for (int lod = 0; lod <= res->base.last_level; ++lod) { + sv->TE_SAMPLER_LOD_ADDR[lod].bo = res->bo; + sv->TE_SAMPLER_LOD_ADDR[lod].offset = res->levels[lod].offset; + sv->TE_SAMPLER_LOD_ADDR[lod].flags = ETNA_RELOC_READ; + } + sv->min_lod = sv->base.u.tex.first_level << 5; + sv->max_lod = MIN2(sv->base.u.tex.last_level, res->base.last_level) << 5; + + /* Workaround for npot textures -- it appears that only CLAMP_TO_EDGE is + * supported when the appropriate capability is not set. */ + if (!ctx->specs.npot_tex_any_wrap && + (!util_is_power_of_two(res->base.width0) || !util_is_power_of_two(res->base.height0))) { + sv->TE_SAMPLER_CONFIG0_MASK = ~(VIVS_TE_SAMPLER_CONFIG0_UWRAP__MASK | + VIVS_TE_SAMPLER_CONFIG0_VWRAP__MASK); + sv->TE_SAMPLER_CONFIG0 |= + VIVS_TE_SAMPLER_CONFIG0_UWRAP(TEXTURE_WRAPMODE_CLAMP_TO_EDGE) | + VIVS_TE_SAMPLER_CONFIG0_VWRAP(TEXTURE_WRAPMODE_CLAMP_TO_EDGE); + } + + return &sv->base; +} + +static void +etna_sampler_view_destroy(struct pipe_context *pctx, + struct pipe_sampler_view *view) +{ + pipe_resource_reference(&view->texture, NULL); + FREE(view); +} + +static void +set_sampler_views(struct etna_context *ctx, unsigned start, unsigned end, + unsigned nr, struct pipe_sampler_view **views) +{ + unsigned i, j; + uint32_t mask = 1 << start; + + for (i = start, j = 0; j < nr; i++, j++, mask <<= 1) { + pipe_sampler_view_reference(&ctx->sampler_view[i], views[j]); + if (views[j]) + ctx->active_sampler_views |= mask; + else + ctx->active_sampler_views &= ~mask; + } + + for (; i < end; i++, mask <<= 1) { + pipe_sampler_view_reference(&ctx->sampler_view[i], NULL); + ctx->active_sampler_views &= ~mask; + } +} + +static inline void +etna_fragtex_set_sampler_views(struct etna_context *ctx, unsigned nr, + struct pipe_sampler_view **views) +{ + unsigned start = 0; + unsigned end = start + ctx->specs.fragment_sampler_count; + + set_sampler_views(ctx, start, end, nr, views); + ctx->num_fragment_sampler_views = nr; +} + + +static inline void +etna_vertex_set_sampler_views(struct etna_context *ctx, unsigned nr, + struct pipe_sampler_view **views) +{ + unsigned start = ctx->specs.vertex_sampler_offset; + unsigned end = start + ctx->specs.vertex_sampler_count; + + set_sampler_views(ctx, start, end, nr, views); +} + +static void +etna_set_sampler_views(struct pipe_context *pctx, unsigned shader, + unsigned start_slot, unsigned num_views, + struct pipe_sampler_view **views) +{ + struct etna_context *ctx = etna_context(pctx); + assert(start_slot == 0); + + ctx->dirty |= ETNA_DIRTY_SAMPLER_VIEWS | ETNA_DIRTY_TEXTURE_CACHES; + + for (unsigned idx = 0; idx < num_views; ++idx) { + if (views[idx]) + etna_update_sampler_source(views[idx]); + } + + switch (shader) { + case PIPE_SHADER_FRAGMENT: + etna_fragtex_set_sampler_views(ctx, num_views, views); + break; + case PIPE_SHADER_VERTEX: + etna_vertex_set_sampler_views(ctx, num_views, views); + break; + default:; + } +} + +static void +etna_texture_barrier(struct pipe_context *pctx, unsigned flags) +{ + struct etna_context *ctx = etna_context(pctx); + /* clear color and texture cache to make sure that texture unit reads + * what has been written */ + etna_set_state(ctx->stream, VIVS_GL_FLUSH_CACHE, VIVS_GL_FLUSH_CACHE_COLOR | VIVS_GL_FLUSH_CACHE_TEXTURE); +} + +void +etna_texture_init(struct pipe_context *pctx) +{ + pctx->create_sampler_state = etna_create_sampler_state; + pctx->bind_sampler_states = etna_bind_sampler_states; + pctx->delete_sampler_state = etna_delete_sampler_state; + pctx->set_sampler_views = etna_set_sampler_views; + pctx->create_sampler_view = etna_create_sampler_view; + pctx->sampler_view_destroy = etna_sampler_view_destroy; + pctx->texture_barrier = etna_texture_barrier; +} diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_texture.h mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_texture.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_texture.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_texture.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,75 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + */ + +#ifndef H_ETNAVIV_TEXTURE +#define H_ETNAVIV_TEXTURE + +#include + +#include "pipe/p_context.h" +#include "pipe/p_state.h" + +#include "hw/state_3d.xml.h" + +struct etna_sampler_state { + struct pipe_sampler_state base; + + /* sampler offset +4*sampler, interleave when committing state */ + uint32_t TE_SAMPLER_CONFIG0; + uint32_t TE_SAMPLER_CONFIG1; + uint32_t TE_SAMPLER_LOD_CONFIG; + unsigned min_lod, max_lod; +}; + +static inline struct etna_sampler_state * +etna_sampler_state(struct pipe_sampler_state *samp) +{ + return (struct etna_sampler_state *)samp; +} + +struct etna_sampler_view { + struct pipe_sampler_view base; + + /* sampler offset +4*sampler, interleave when committing state */ + uint32_t TE_SAMPLER_CONFIG0; + uint32_t TE_SAMPLER_CONFIG0_MASK; + uint32_t TE_SAMPLER_CONFIG1; + uint32_t TE_SAMPLER_SIZE; + uint32_t TE_SAMPLER_LOG_SIZE; + struct etna_reloc TE_SAMPLER_LOD_ADDR[VIVS_TE_SAMPLER_LOD_ADDR__LEN]; + unsigned min_lod, max_lod; /* 5.5 fixp */ +}; + +static inline struct etna_sampler_view * +etna_sampler_view(struct pipe_sampler_view *view) +{ + return (struct etna_sampler_view *)view; +} + +void +etna_texture_init(struct pipe_context *pctx); + +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_tiling.c mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_tiling.c --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_tiling.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_tiling.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,96 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + */ + +#include "etnaviv_tiling.h" + +#include +#include + +#define TEX_TILE_WIDTH (4) +#define TEX_TILE_HEIGHT (4) +#define TEX_TILE_WORDS (TEX_TILE_WIDTH * TEX_TILE_HEIGHT) + +#define DO_TILE(type) \ + src_stride /= sizeof(type); \ + dst_stride = (dst_stride * TEX_TILE_HEIGHT) / sizeof(type); \ + for (unsigned srcy = 0; srcy < height; ++srcy) { \ + unsigned dsty = basey + srcy; \ + unsigned ty = (dsty / TEX_TILE_HEIGHT) * dst_stride + \ + (dsty % TEX_TILE_HEIGHT) * TEX_TILE_WIDTH; \ + for (unsigned srcx = 0; srcx < width; ++srcx) { \ + unsigned dstx = basex + srcx; \ + ((type *)dest)[ty + (dstx / TEX_TILE_WIDTH) * TEX_TILE_WORDS + \ + (dstx % TEX_TILE_WIDTH)] = \ + ((type *)src)[srcy * src_stride + srcx]; \ + } \ + } + +#define DO_UNTILE(type) \ + src_stride = (src_stride * TEX_TILE_HEIGHT) / sizeof(type); \ + dst_stride /= sizeof(type); \ + for (unsigned dsty = 0; dsty < height; ++dsty) { \ + unsigned srcy = basey + dsty; \ + unsigned sy = (srcy / TEX_TILE_HEIGHT) * src_stride + \ + (srcy % TEX_TILE_HEIGHT) * TEX_TILE_WIDTH; \ + for (unsigned dstx = 0; dstx < width; ++dstx) { \ + unsigned srcx = basex + dstx; \ + ((type *)dest)[dsty * dst_stride + dstx] = \ + ((type *)src)[sy + (srcx / TEX_TILE_WIDTH) * TEX_TILE_WORDS + \ + (srcx % TEX_TILE_WIDTH)]; \ + } \ + } + +void +etna_texture_tile(void *dest, void *src, unsigned basex, unsigned basey, + unsigned dst_stride, unsigned width, unsigned height, + unsigned src_stride, unsigned elmtsize) +{ + if (elmtsize == 4) { + DO_TILE(uint32_t) + } else if (elmtsize == 2) { + DO_TILE(uint16_t) + } else if (elmtsize == 1) { + DO_TILE(uint8_t) + } else { + printf("etna_texture_tile: unhandled element size %i\n", elmtsize); + } +} + +void +etna_texture_untile(void *dest, void *src, unsigned basex, unsigned basey, + unsigned src_stride, unsigned width, unsigned height, + unsigned dst_stride, unsigned elmtsize) +{ + if (elmtsize == 4) { + DO_UNTILE(uint32_t); + } else if (elmtsize == 2) { + DO_UNTILE(uint16_t); + } else if (elmtsize == 1) { + DO_UNTILE(uint8_t); + } else { + printf("etna_texture_tile: unhandled element size %i\n", elmtsize); + } +} diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_tiling.h mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_tiling.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_tiling.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_tiling.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + */ + +#ifndef H_ETNAVIV_TILING +#define H_ETNAVIV_TILING + +#include + +/* texture or surface layout */ +enum etna_surface_layout { + ETNA_LAYOUT_BIT_TILE = (1 << 0), + ETNA_LAYOUT_BIT_SUPER = (1 << 1), + ETNA_LAYOUT_BIT_MULTI = (1 << 2), + ETNA_LAYOUT_LINEAR = 0, + ETNA_LAYOUT_TILED = ETNA_LAYOUT_BIT_TILE, + ETNA_LAYOUT_SUPER_TILED = ETNA_LAYOUT_BIT_TILE | ETNA_LAYOUT_BIT_SUPER, + ETNA_LAYOUT_MULTI_TILED = ETNA_LAYOUT_BIT_TILE | ETNA_LAYOUT_BIT_MULTI, + ETNA_LAYOUT_MULTI_SUPERTILED = ETNA_LAYOUT_BIT_TILE | ETNA_LAYOUT_BIT_SUPER | ETNA_LAYOUT_BIT_MULTI, +}; + +void +etna_texture_tile(void *dest, void *src, unsigned basex, unsigned basey, + unsigned dst_stride, unsigned width, unsigned height, + unsigned src_stride, unsigned elmtsize); +void +etna_texture_untile(void *dest, void *src, unsigned basex, unsigned basey, + unsigned src_stride, unsigned width, unsigned height, + unsigned dst_stride, unsigned elmtsize); + +/* XXX from/to supertiling (can have different layouts, may be better + * to leave to RS) */ + +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_transfer.c mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_transfer.c --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_transfer.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_transfer.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,355 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + */ + +#include "etnaviv_transfer.h" +#include "etnaviv_clear_blit.h" +#include "etnaviv_context.h" +#include "etnaviv_debug.h" + +#include "pipe/p_defines.h" +#include "pipe/p_format.h" +#include "pipe/p_screen.h" +#include "pipe/p_state.h" +#include "util/u_format.h" +#include "util/u_inlines.h" +#include "util/u_memory.h" +#include "util/u_surface.h" +#include "util/u_transfer.h" + +/* Compute offset into a 1D/2D/3D buffer of a certain box. + * This box must be aligned to the block width and height of the + * underlying format. */ +static inline size_t +etna_compute_offset(enum pipe_format format, const struct pipe_box *box, + size_t stride, size_t layer_stride) +{ + return box->z * layer_stride + + box->y / util_format_get_blockheight(format) * stride + + box->x / util_format_get_blockwidth(format) * + util_format_get_blocksize(format); +} + +static void +etna_transfer_unmap(struct pipe_context *pctx, struct pipe_transfer *ptrans) +{ + struct etna_context *ctx = etna_context(pctx); + struct etna_transfer *trans = etna_transfer(ptrans); + struct etna_resource *rsc = etna_resource(ptrans->resource); + + /* XXX + * When writing to a resource that is already in use, replace the resource + * with a completely new buffer + * and free the old one using a fenced free. + * The most tricky case to implement will be: tiled or supertiled surface, + * partial write, target not aligned to 4/64. */ + assert(ptrans->level <= rsc->base.last_level); + + if (rsc->texture && !etna_resource_newer(rsc, etna_resource(rsc->texture))) + rsc = etna_resource(rsc->texture); /* switch to using the texture resource */ + + if (ptrans->usage & PIPE_TRANSFER_WRITE) { + if (trans->rsc) { + /* We have a temporary resource due to either tile status or + * tiling format. Write back the updated buffer contents. + * FIXME: we need to invalidate the tile status. */ + etna_copy_resource(pctx, ptrans->resource, trans->rsc, ptrans->level, + trans->rsc->last_level); + } else if (trans->staging) { + /* map buffer object */ + struct etna_resource_level *res_level = &rsc->levels[ptrans->level]; + void *mapped = etna_bo_map(rsc->bo) + res_level->offset; + + if (rsc->layout == ETNA_LAYOUT_LINEAR || rsc->layout == ETNA_LAYOUT_TILED) { + if (rsc->layout == ETNA_LAYOUT_TILED && !util_format_is_compressed(rsc->base.format)) { + etna_texture_tile( + mapped + ptrans->box.z * res_level->layer_stride, + trans->staging, ptrans->box.x, ptrans->box.y, + res_level->stride, ptrans->box.width, ptrans->box.height, + ptrans->stride, util_format_get_blocksize(rsc->base.format)); + } else { /* non-tiled or compressed format */ + util_copy_box(mapped, rsc->base.format, res_level->stride, + res_level->layer_stride, ptrans->box.x, + ptrans->box.y, ptrans->box.z, ptrans->box.width, + ptrans->box.height, ptrans->box.depth, + trans->staging, ptrans->stride, + ptrans->layer_stride, 0, 0, 0 /* src x,y,z */); + } + } else { + BUG("unsupported tiling %i", rsc->layout); + } + + FREE(trans->staging); + } + + rsc->seqno++; + etna_bo_cpu_fini(rsc->bo); + + if (rsc->base.bind & PIPE_BIND_SAMPLER_VIEW) { + /* XXX do we need to flush the CPU cache too or start a write barrier + * to make sure the GPU sees it? */ + ctx->dirty |= ETNA_DIRTY_TEXTURE_CACHES; + } + } + + pipe_resource_reference(&trans->rsc, NULL); + pipe_resource_reference(&ptrans->resource, NULL); + slab_free(&ctx->transfer_pool, trans); +} + +static void * +etna_transfer_map(struct pipe_context *pctx, struct pipe_resource *prsc, + unsigned level, + unsigned usage, + const struct pipe_box *box, + struct pipe_transfer **out_transfer) +{ + struct etna_context *ctx = etna_context(pctx); + struct etna_resource *rsc = etna_resource(prsc); + struct etna_transfer *trans; + struct pipe_transfer *ptrans; + enum pipe_format format = prsc->format; + + trans = slab_alloc(&ctx->transfer_pool); + if (!trans) + return NULL; + + /* slab_alloc() doesn't zero */ + memset(trans, 0, sizeof(*trans)); + + ptrans = &trans->base; + pipe_resource_reference(&ptrans->resource, prsc); + ptrans->level = level; + ptrans->usage = usage; + ptrans->box = *box; + + assert(level <= prsc->last_level); + + if (rsc->texture && !etna_resource_newer(rsc, etna_resource(rsc->texture))) { + /* We have a texture resource which is the same age or newer than the + * render resource. Use the texture resource, which avoids bouncing + * pixels between the two resources, and we can de-tile it in s/w. */ + rsc = etna_resource(rsc->texture); + } else if (rsc->ts_bo || + (rsc->layout != ETNA_LAYOUT_LINEAR && + util_format_get_blocksize(format) > 1 && + /* HALIGN 4 resources are incompatible with the resolve engine, + * so fall back to using software to detile this resource. */ + rsc->halign != TEXTURE_HALIGN_FOUR)) { + /* If the surface has tile status, we need to resolve it first. + * The strategy we implement here is to use the RS to copy the + * depth buffer, filling in the "holes" where the tile status + * indicates that it's clear. We also do this for tiled + * resources, but only if the RS can blit them. */ + if (usage & PIPE_TRANSFER_MAP_DIRECTLY) { + slab_free(&ctx->transfer_pool, trans); + BUG("unsupported transfer flags %#x with tile status/tiled layout", usage); + return NULL; + } + + if (prsc->depth0 > 1) { + slab_free(&ctx->transfer_pool, trans); + BUG("resource has depth >1 with tile status"); + return NULL; + } + + struct pipe_resource templ = *prsc; + templ.nr_samples = 0; + templ.bind = PIPE_BIND_RENDER_TARGET; + + trans->rsc = etna_resource_alloc(pctx->screen, ETNA_LAYOUT_LINEAR, &templ); + if (!trans->rsc) { + slab_free(&ctx->transfer_pool, trans); + return NULL; + } + + etna_copy_resource(pctx, trans->rsc, prsc, level, trans->rsc->last_level); + + /* Switch to using the temporary resource instead */ + rsc = etna_resource(trans->rsc); + } + + struct etna_resource_level *res_level = &rsc->levels[level]; + + /* Always sync if we have the temporary resource. The PIPE_TRANSFER_READ + * case could be optimised if we knew whether the resource has outstanding + * rendering. */ + if (usage & PIPE_TRANSFER_READ || trans->rsc) + etna_resource_wait(pctx, rsc); + + /* XXX we don't handle PIPE_TRANSFER_FLUSH_EXPLICIT; this flag can be ignored + * when mapping in-place, + * but when not in place we need to fire off the copy operation in + * transfer_flush_region (currently + * a no-op) instead of unmap. Need to handle this to support + * ARB_map_buffer_range extension at least. + */ + /* XXX we don't take care of current operations on the resource; which can + be, at some point in the pipeline + which is not yet executed: + + - bound as surface + - bound through vertex buffer + - bound through index buffer + - bound in sampler view + - used in clear_render_target / clear_depth_stencil operation + - used in blit + - used in resource_copy_region + + How do other drivers record this information over course of the rendering + pipeline? + Is it necessary at all? Only in case we want to provide a fast path and + map the resource directly + (and for PIPE_TRANSFER_MAP_DIRECTLY) and we don't want to force a sync. + We also need to know whether the resource is in use to determine if a sync + is needed (or just do it + always, but that comes at the expense of performance). + + A conservative approximation without too much overhead would be to mark + all resources that have + been bound at some point as busy. A drawback would be that accessing + resources that have + been bound but are no longer in use for a while still carry a performance + penalty. On the other hand, + the program could be using PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE or + PIPE_TRANSFER_UNSYNCHRONIZED to + avoid this in the first place... + + A) We use an in-pipe copy engine, and queue the copy operation after unmap + so that the copy + will be performed when all current commands have been executed. + Using the RS is possible, not sure if always efficient. This can also + do any kind of tiling for us. + Only possible when PIPE_TRANSFER_DISCARD_RANGE is set. + B) We discard the entire resource (or at least, the mipmap level) and + allocate new memory for it. + Only possible when mapping the entire resource or + PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE is set. + */ + + /* No need to allocate a buffer for copying if the resource is not in use, + * and no tiling is needed, can just return a direct pointer. + */ + bool in_place = rsc->layout == ETNA_LAYOUT_LINEAR || + (rsc->layout == ETNA_LAYOUT_TILED && + util_format_is_compressed(prsc->format)); + + /* Ignore PIPE_TRANSFER_UNSYNCHRONIZED and PIPE_TRANSFER_DONTBLOCK here. + * It appears that Gallium operates the index/vertex buffers in a + * circular fashion, and the CPU can catch up with the GPU and starts + * overwriting yet-to-be-processed entries, causing rendering corruption. */ + uint32_t prep_flags = 0; + + if (usage & PIPE_TRANSFER_READ) + prep_flags |= DRM_ETNA_PREP_READ; + if (usage & PIPE_TRANSFER_WRITE) + prep_flags |= DRM_ETNA_PREP_WRITE; + + if (etna_bo_cpu_prep(rsc->bo, prep_flags)) + goto fail_prep; + + /* map buffer object */ + void *mapped = etna_bo_map(rsc->bo); + if (!mapped) + goto fail; + + *out_transfer = ptrans; + + if (in_place) { + ptrans->stride = res_level->stride; + ptrans->layer_stride = res_level->layer_stride; + + return mapped + res_level->offset + + etna_compute_offset(prsc->format, box, res_level->stride, + res_level->layer_stride); + } else { + unsigned divSizeX = util_format_get_blockwidth(format); + unsigned divSizeY = util_format_get_blockheight(format); + + /* No direct mappings of tiled, since we need to manually + * tile/untile. + */ + if (usage & PIPE_TRANSFER_MAP_DIRECTLY) + goto fail; + + mapped += res_level->offset; + ptrans->stride = align(box->width, divSizeX) * util_format_get_blocksize(format); /* row stride in bytes */ + ptrans->layer_stride = align(box->height, divSizeY) * ptrans->stride; + size_t size = ptrans->layer_stride * box->depth; + + trans->staging = MALLOC(size); + if (!trans->staging) + goto fail; + + if (usage & PIPE_TRANSFER_READ) { + /* untile or copy resource for reading */ + if (rsc->layout == ETNA_LAYOUT_LINEAR || rsc->layout == ETNA_LAYOUT_TILED) { + if (rsc->layout == ETNA_LAYOUT_TILED && !util_format_is_compressed(rsc->base.format)) { + etna_texture_untile(trans->staging, + mapped + ptrans->box.z * res_level->layer_stride, + ptrans->box.x, ptrans->box.y, res_level->stride, + ptrans->box.width, ptrans->box.height, ptrans->stride, + util_format_get_blocksize(rsc->base.format)); + } else { /* non-tiled or compressed format */ + util_copy_box(trans->staging, rsc->base.format, ptrans->stride, + ptrans->layer_stride, 0, 0, 0, /* dst x,y,z */ + ptrans->box.width, ptrans->box.height, + ptrans->box.depth, mapped, res_level->stride, + res_level->layer_stride, ptrans->box.x, + ptrans->box.y, ptrans->box.z); + } + } else /* TODO supertiling */ + { + BUG("unsupported tiling %i for reading", rsc->layout); + } + } + + return trans->staging; + } + +fail: + etna_bo_cpu_fini(rsc->bo); +fail_prep: + etna_transfer_unmap(pctx, ptrans); + return NULL; +} + +static void +etna_transfer_flush_region(struct pipe_context *pctx, + struct pipe_transfer *transfer, + const struct pipe_box *box) +{ + /* NOOP for now */ +} + +void +etna_transfer_init(struct pipe_context *pctx) +{ + pctx->transfer_map = etna_transfer_map; + pctx->transfer_flush_region = etna_transfer_flush_region; + pctx->transfer_unmap = etna_transfer_unmap; + pctx->buffer_subdata = u_default_buffer_subdata; + pctx->texture_subdata = u_default_texture_subdata; +} diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_transfer.h mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_transfer.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_transfer.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_transfer.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + */ + +#ifndef H_ETNAVIV_TRANSFER +#define H_ETNAVIV_TRANSFER + +#include "pipe/p_state.h" + +void +etna_transfer_init(struct pipe_context *pctx); + +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_translate.h mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_translate.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_translate.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_translate.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,516 @@ +/* + * Copyright (c) 2012-2013 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +/* inlined translation functions between gallium and vivante */ +#ifndef H_TRANSLATE +#define H_TRANSLATE + +#include "pipe/p_defines.h" +#include "pipe/p_format.h" +#include "pipe/p_state.h" + +#include "etnaviv_debug.h" +#include "etnaviv_format.h" +#include "etnaviv_tiling.h" +#include "etnaviv_util.h" +#include "hw/cmdstream.xml.h" +#include "hw/state.xml.h" +#include "hw/state_3d.xml.h" + +#include "util/u_format.h" + +#include + +/* Returned when there is no match of pipe value to etna value */ +#define ETNA_NO_MATCH (~0) + +static inline uint32_t +translate_cull_face(unsigned cull_face, unsigned front_ccw) +{ + switch (cull_face) { + case PIPE_FACE_NONE: + return VIVS_PA_CONFIG_CULL_FACE_MODE_OFF; + case PIPE_FACE_BACK: + return front_ccw ? VIVS_PA_CONFIG_CULL_FACE_MODE_CW + : VIVS_PA_CONFIG_CULL_FACE_MODE_CCW; + case PIPE_FACE_FRONT: + return front_ccw ? VIVS_PA_CONFIG_CULL_FACE_MODE_CCW + : VIVS_PA_CONFIG_CULL_FACE_MODE_CW; + default: + DBG("Unhandled cull face mode %i", cull_face); + return ETNA_NO_MATCH; + } +} + +static inline uint32_t +translate_polygon_mode(unsigned polygon_mode) +{ + switch (polygon_mode) { + case PIPE_POLYGON_MODE_FILL: + return VIVS_PA_CONFIG_FILL_MODE_SOLID; + case PIPE_POLYGON_MODE_LINE: + return VIVS_PA_CONFIG_FILL_MODE_WIREFRAME; + case PIPE_POLYGON_MODE_POINT: + return VIVS_PA_CONFIG_FILL_MODE_POINT; + default: + DBG("Unhandled polygon mode %i", polygon_mode); + return ETNA_NO_MATCH; + } +} + +static inline uint32_t +translate_stencil_mode(bool enable_0, bool enable_1) +{ + if (enable_0) { + return enable_1 ? VIVS_PE_STENCIL_CONFIG_MODE_TWO_SIDED + : VIVS_PE_STENCIL_CONFIG_MODE_ONE_SIDED; + } else { + return VIVS_PE_STENCIL_CONFIG_MODE_DISABLED; + } +} + +static inline uint32_t +translate_stencil_op(unsigned stencil_op) +{ + switch (stencil_op) { + case PIPE_STENCIL_OP_KEEP: + return STENCIL_OP_KEEP; + case PIPE_STENCIL_OP_ZERO: + return STENCIL_OP_ZERO; + case PIPE_STENCIL_OP_REPLACE: + return STENCIL_OP_REPLACE; + case PIPE_STENCIL_OP_INCR: + return STENCIL_OP_INCR; + case PIPE_STENCIL_OP_DECR: + return STENCIL_OP_DECR; + case PIPE_STENCIL_OP_INCR_WRAP: + return STENCIL_OP_INCR_WRAP; + case PIPE_STENCIL_OP_DECR_WRAP: + return STENCIL_OP_DECR_WRAP; + case PIPE_STENCIL_OP_INVERT: + return STENCIL_OP_INVERT; + default: + DBG("Unhandled stencil op: %i", stencil_op); + return ETNA_NO_MATCH; + } +} + +static inline uint32_t +translate_blend(unsigned blend) +{ + switch (blend) { + case PIPE_BLEND_ADD: + return BLEND_EQ_ADD; + case PIPE_BLEND_SUBTRACT: + return BLEND_EQ_SUBTRACT; + case PIPE_BLEND_REVERSE_SUBTRACT: + return BLEND_EQ_REVERSE_SUBTRACT; + case PIPE_BLEND_MIN: + return BLEND_EQ_MIN; + case PIPE_BLEND_MAX: + return BLEND_EQ_MAX; + default: + DBG("Unhandled blend: %i", blend); + return ETNA_NO_MATCH; + } +} + +static inline uint32_t +translate_blend_factor(unsigned blend_factor) +{ + switch (blend_factor) { + case PIPE_BLENDFACTOR_ONE: + return BLEND_FUNC_ONE; + case PIPE_BLENDFACTOR_SRC_COLOR: + return BLEND_FUNC_SRC_COLOR; + case PIPE_BLENDFACTOR_SRC_ALPHA: + return BLEND_FUNC_SRC_ALPHA; + case PIPE_BLENDFACTOR_DST_ALPHA: + return BLEND_FUNC_DST_ALPHA; + case PIPE_BLENDFACTOR_DST_COLOR: + return BLEND_FUNC_DST_COLOR; + case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE: + return BLEND_FUNC_SRC_ALPHA_SATURATE; + case PIPE_BLENDFACTOR_CONST_COLOR: + return BLEND_FUNC_CONSTANT_COLOR; + case PIPE_BLENDFACTOR_CONST_ALPHA: + return BLEND_FUNC_CONSTANT_ALPHA; + case PIPE_BLENDFACTOR_ZERO: + return BLEND_FUNC_ZERO; + case PIPE_BLENDFACTOR_INV_SRC_COLOR: + return BLEND_FUNC_ONE_MINUS_SRC_COLOR; + case PIPE_BLENDFACTOR_INV_SRC_ALPHA: + return BLEND_FUNC_ONE_MINUS_SRC_ALPHA; + case PIPE_BLENDFACTOR_INV_DST_ALPHA: + return BLEND_FUNC_ONE_MINUS_DST_ALPHA; + case PIPE_BLENDFACTOR_INV_DST_COLOR: + return BLEND_FUNC_ONE_MINUS_DST_COLOR; + case PIPE_BLENDFACTOR_INV_CONST_COLOR: + return BLEND_FUNC_ONE_MINUS_CONSTANT_COLOR; + case PIPE_BLENDFACTOR_INV_CONST_ALPHA: + return BLEND_FUNC_ONE_MINUS_CONSTANT_ALPHA; + case PIPE_BLENDFACTOR_SRC1_COLOR: + case PIPE_BLENDFACTOR_SRC1_ALPHA: + case PIPE_BLENDFACTOR_INV_SRC1_COLOR: + case PIPE_BLENDFACTOR_INV_SRC1_ALPHA: + default: + DBG("Unhandled blend factor: %i", blend_factor); + return ETNA_NO_MATCH; + } +} + +static inline uint32_t +translate_texture_wrapmode(unsigned wrap) +{ + switch (wrap) { + case PIPE_TEX_WRAP_REPEAT: + return TEXTURE_WRAPMODE_REPEAT; + case PIPE_TEX_WRAP_CLAMP: + return TEXTURE_WRAPMODE_CLAMP_TO_EDGE; + case PIPE_TEX_WRAP_CLAMP_TO_EDGE: + return TEXTURE_WRAPMODE_CLAMP_TO_EDGE; + case PIPE_TEX_WRAP_CLAMP_TO_BORDER: + return TEXTURE_WRAPMODE_CLAMP_TO_EDGE; /* XXX */ + case PIPE_TEX_WRAP_MIRROR_REPEAT: + return TEXTURE_WRAPMODE_MIRRORED_REPEAT; + case PIPE_TEX_WRAP_MIRROR_CLAMP: + return TEXTURE_WRAPMODE_MIRRORED_REPEAT; /* XXX */ + case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE: + return TEXTURE_WRAPMODE_MIRRORED_REPEAT; /* XXX */ + case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER: + return TEXTURE_WRAPMODE_MIRRORED_REPEAT; /* XXX */ + default: + DBG("Unhandled texture wrapmode: %i", wrap); + return ETNA_NO_MATCH; + } +} + +static inline uint32_t +translate_texture_mipfilter(unsigned filter) +{ + switch (filter) { + case PIPE_TEX_MIPFILTER_NEAREST: + return TEXTURE_FILTER_NEAREST; + case PIPE_TEX_MIPFILTER_LINEAR: + return TEXTURE_FILTER_LINEAR; + case PIPE_TEX_MIPFILTER_NONE: + return TEXTURE_FILTER_NONE; + default: + DBG("Unhandled texture mipfilter: %i", filter); + return ETNA_NO_MATCH; + } +} + +static inline uint32_t +translate_texture_filter(unsigned filter) +{ + switch (filter) { + case PIPE_TEX_FILTER_NEAREST: + return TEXTURE_FILTER_NEAREST; + case PIPE_TEX_FILTER_LINEAR: + return TEXTURE_FILTER_LINEAR; + /* What about anisotropic? */ + default: + DBG("Unhandled texture filter: %i", filter); + return ETNA_NO_MATCH; + } +} + +/* return a RS "compatible" format for use when copying */ +static inline enum pipe_format +etna_compatible_rs_format(enum pipe_format fmt) +{ + /* YUYV and UYVY are blocksize 4, but 2 bytes per pixel */ + if (fmt == PIPE_FORMAT_YUYV || fmt == PIPE_FORMAT_UYVY) + return PIPE_FORMAT_B4G4R4A4_UNORM; + + switch (util_format_get_blocksize(fmt)) { + case 2: + return PIPE_FORMAT_B4G4R4A4_UNORM; + case 4: + return PIPE_FORMAT_B8G8R8A8_UNORM; + default: + return fmt; + } +} + +static inline int +translate_rb_src_dst_swap(enum pipe_format src, enum pipe_format dst) +{ + return translate_rs_format_rb_swap(src) ^ translate_rs_format_rb_swap(dst); +} + +static inline uint32_t +translate_depth_format(enum pipe_format fmt) +{ + /* Note: Pipe format convention is LSB to MSB, VIVS is MSB to LSB */ + switch (fmt) { + case PIPE_FORMAT_Z16_UNORM: + return VIVS_PE_DEPTH_CONFIG_DEPTH_FORMAT_D16; + case PIPE_FORMAT_X8Z24_UNORM: + return VIVS_PE_DEPTH_CONFIG_DEPTH_FORMAT_D24S8; + case PIPE_FORMAT_S8_UINT_Z24_UNORM: + return VIVS_PE_DEPTH_CONFIG_DEPTH_FORMAT_D24S8; + default: + return ETNA_NO_MATCH; + } +} + +/* render target format for MSAA */ +static inline uint32_t +translate_msaa_format(enum pipe_format fmt) +{ + /* Note: Pipe format convention is LSB to MSB, VIVS is MSB to LSB */ + switch (fmt) { + case PIPE_FORMAT_B4G4R4X4_UNORM: + return VIVS_TS_MEM_CONFIG_MSAA_FORMAT_A4R4G4B4; + case PIPE_FORMAT_B4G4R4A4_UNORM: + return VIVS_TS_MEM_CONFIG_MSAA_FORMAT_A4R4G4B4; + case PIPE_FORMAT_B5G5R5X1_UNORM: + return VIVS_TS_MEM_CONFIG_MSAA_FORMAT_A1R5G5B5; + case PIPE_FORMAT_B5G5R5A1_UNORM: + return VIVS_TS_MEM_CONFIG_MSAA_FORMAT_A1R5G5B5; + case PIPE_FORMAT_B5G6R5_UNORM: + return VIVS_TS_MEM_CONFIG_MSAA_FORMAT_R5G6B5; + case PIPE_FORMAT_B8G8R8X8_UNORM: + return VIVS_TS_MEM_CONFIG_MSAA_FORMAT_X8R8G8B8; + case PIPE_FORMAT_B8G8R8A8_UNORM: + return VIVS_TS_MEM_CONFIG_MSAA_FORMAT_A8R8G8B8; + /* MSAA with YUYV not supported */ + default: + return ETNA_NO_MATCH; + } +} + +/* Return normalization flag for vertex element format */ +static inline uint32_t +translate_vertex_format_normalize(enum pipe_format fmt) +{ + const struct util_format_description *desc = util_format_description(fmt); + if (!desc) + return VIVS_FE_VERTEX_ELEMENT_CONFIG_NORMALIZE_OFF; + + /* assumes that normalization of channel 0 holds for all channels; + * this holds for all vertex formats that we support */ + return desc->channel[0].normalized + ? VIVS_FE_VERTEX_ELEMENT_CONFIG_NORMALIZE_ON + : VIVS_FE_VERTEX_ELEMENT_CONFIG_NORMALIZE_OFF; +} + +static inline uint32_t +translate_index_size(unsigned index_size) +{ + switch (index_size) { + case 1: + return VIVS_FE_INDEX_STREAM_CONTROL_TYPE_UNSIGNED_CHAR; + case 2: + return VIVS_FE_INDEX_STREAM_CONTROL_TYPE_UNSIGNED_SHORT; + case 4: + return VIVS_FE_INDEX_STREAM_CONTROL_TYPE_UNSIGNED_INT; + default: + DBG("Unhandled index size %i", index_size); + return ETNA_NO_MATCH; + } +} + +static inline uint32_t +translate_draw_mode(unsigned mode) +{ + switch (mode) { + case PIPE_PRIM_POINTS: + return PRIMITIVE_TYPE_POINTS; + case PIPE_PRIM_LINES: + return PRIMITIVE_TYPE_LINES; + case PIPE_PRIM_LINE_LOOP: + return PRIMITIVE_TYPE_LINE_LOOP; + case PIPE_PRIM_LINE_STRIP: + return PRIMITIVE_TYPE_LINE_STRIP; + case PIPE_PRIM_TRIANGLES: + return PRIMITIVE_TYPE_TRIANGLES; + case PIPE_PRIM_TRIANGLE_STRIP: + return PRIMITIVE_TYPE_TRIANGLE_STRIP; + case PIPE_PRIM_TRIANGLE_FAN: + return PRIMITIVE_TYPE_TRIANGLE_FAN; + case PIPE_PRIM_QUADS: + return PRIMITIVE_TYPE_QUADS; + default: + DBG("Unhandled draw mode primitive %i", mode); + return ETNA_NO_MATCH; + } +} + +/* Get size multiple for size of texture/rendertarget with a certain layout + * This is affected by many different parameters: + * - A horizontal multiple of 16 is used when possible as resolve can be used + * at the cost of only a little bit extra memory usage. + * - If the surface is to be used with the resolve engine, set rs_align true. + * If set, a horizontal multiple of 16 will be used for tiled and linear, + * otherwise one of 16. However, such a surface will be incompatible + * with the samplers if the GPU does hot support the HALIGN feature. + * - If the surface is supertiled, horizontal and vertical multiple is always 64 + * - If the surface is multi tiled or supertiled, make sure that the vertical size + * is a multiple of the number of pixel pipes as well. + * */ +static inline void +etna_layout_multiple(unsigned layout, unsigned pixel_pipes, bool rs_align, + unsigned *paddingX, unsigned *paddingY, unsigned *halign) +{ + switch (layout) { + case ETNA_LAYOUT_LINEAR: + *paddingX = rs_align ? 16 : 4; + *paddingY = 1; + *halign = rs_align ? TEXTURE_HALIGN_SIXTEEN : TEXTURE_HALIGN_FOUR; + break; + case ETNA_LAYOUT_TILED: + *paddingX = rs_align ? 16 : 4; + *paddingY = 4; + *halign = rs_align ? TEXTURE_HALIGN_SIXTEEN : TEXTURE_HALIGN_FOUR; + break; + case ETNA_LAYOUT_SUPER_TILED: + *paddingX = 64; + *paddingY = 64; + *halign = TEXTURE_HALIGN_SUPER_TILED; + break; + case ETNA_LAYOUT_MULTI_TILED: + *paddingX = 16; + *paddingY = 4 * pixel_pipes; + *halign = TEXTURE_HALIGN_SPLIT_TILED; + break; + case ETNA_LAYOUT_MULTI_SUPERTILED: + *paddingX = 64; + *paddingY = 64 * pixel_pipes; + *halign = TEXTURE_HALIGN_SPLIT_SUPER_TILED; + break; + default: + DBG("Unhandled layout %i", layout); + } +} + +/* return 32-bit clear pattern for color */ +static inline uint32_t +translate_clear_color(enum pipe_format format, + const union pipe_color_union *color) +{ + uint32_t clear_value = 0; + + // XXX util_pack_color + switch (format) { + case PIPE_FORMAT_B8G8R8A8_UNORM: + case PIPE_FORMAT_B8G8R8X8_UNORM: + clear_value = etna_cfloat_to_uintN(color->f[2], 8) | + (etna_cfloat_to_uintN(color->f[1], 8) << 8) | + (etna_cfloat_to_uintN(color->f[0], 8) << 16) | + (etna_cfloat_to_uintN(color->f[3], 8) << 24); + break; + case PIPE_FORMAT_B4G4R4X4_UNORM: + case PIPE_FORMAT_B4G4R4A4_UNORM: + clear_value = etna_cfloat_to_uintN(color->f[2], 4) | + (etna_cfloat_to_uintN(color->f[1], 4) << 4) | + (etna_cfloat_to_uintN(color->f[0], 4) << 8) | + (etna_cfloat_to_uintN(color->f[3], 4) << 12); + clear_value |= clear_value << 16; + break; + case PIPE_FORMAT_B5G5R5X1_UNORM: + case PIPE_FORMAT_B5G5R5A1_UNORM: + clear_value = etna_cfloat_to_uintN(color->f[2], 5) | + (etna_cfloat_to_uintN(color->f[1], 5) << 5) | + (etna_cfloat_to_uintN(color->f[0], 5) << 10) | + (etna_cfloat_to_uintN(color->f[3], 1) << 15); + clear_value |= clear_value << 16; + break; + case PIPE_FORMAT_B5G6R5_UNORM: + clear_value = etna_cfloat_to_uintN(color->f[2], 5) | + (etna_cfloat_to_uintN(color->f[1], 6) << 5) | + (etna_cfloat_to_uintN(color->f[0], 5) << 11); + clear_value |= clear_value << 16; + break; + default: + DBG("Unhandled pipe format for color clear: %i", format); + } + + return clear_value; +} + +static inline uint32_t +translate_clear_depth_stencil(enum pipe_format format, float depth, + unsigned stencil) +{ + uint32_t clear_value = 0; + + // XXX util_pack_color + switch (format) { + case PIPE_FORMAT_Z16_UNORM: + clear_value = etna_cfloat_to_uintN(depth, 16); + clear_value |= clear_value << 16; + break; + case PIPE_FORMAT_X8Z24_UNORM: + case PIPE_FORMAT_S8_UINT_Z24_UNORM: + clear_value = (etna_cfloat_to_uintN(depth, 24) << 8) | (stencil & 0xFF); + break; + default: + DBG("Unhandled pipe format for depth stencil clear: %i", format); + } + return clear_value; +} + +/* Convert MSAA number of samples to x and y scaling factor and + * VIVS_GL_MULTI_SAMPLE_CONFIG value. + * Return true if supported and false otherwise. */ +static inline bool +translate_samples_to_xyscale(int num_samples, int *xscale_out, int *yscale_out, + uint32_t *config_out) +{ + int xscale, yscale; + uint32_t config; + + switch (num_samples) { + case 0: + case 1: + xscale = 1; + yscale = 1; + config = VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_SAMPLES_NONE; + break; + case 2: + xscale = 2; + yscale = 1; + config = VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_SAMPLES_2X; + break; + case 4: + xscale = 2; + yscale = 2; + config = VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_SAMPLES_4X; + break; + default: + return false; + } + + if (xscale_out) + *xscale_out = xscale; + if (yscale_out) + *yscale_out = yscale; + if (config_out) + *config_out = config; + + return true; +} + +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_uniforms.c mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_uniforms.c --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_uniforms.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_uniforms.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,118 @@ +/* + * Copyright (c) 2016 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Christian Gmeiner + */ + +#include "etnaviv_uniforms.h" + +#include "etnaviv_compiler.h" +#include "etnaviv_context.h" +#include "etnaviv_util.h" +#include "pipe/p_defines.h" +#include "util/u_math.h" + +static unsigned +get_const_idx(const struct etna_context *ctx, bool frag, unsigned samp_id) +{ + if (frag) + return samp_id; + + return samp_id + ctx->specs.vertex_sampler_offset; +} + +static uint32_t +get_texrect_scale(const struct etna_context *ctx, bool frag, + enum etna_immediate_contents contents, uint32_t data) +{ + unsigned index = get_const_idx(ctx, frag, data); + struct pipe_sampler_view *texture = ctx->sampler_view[index]; + uint32_t dim; + + if (contents == ETNA_IMMEDIATE_TEXRECT_SCALE_X) + dim = texture->texture->width0; + else + dim = texture->texture->height0; + + return fui(1.0f / dim); +} + +void +etna_uniforms_write(const struct etna_context *ctx, + const struct etna_shader *sobj, + struct pipe_constant_buffer *cb, uint32_t *uniforms, + unsigned *size) +{ + const struct etna_shader_uniform_info *uinfo = &sobj->uniforms; + bool frag = false; + + if (cb->user_buffer) { + unsigned size = MIN2(cb->buffer_size, uinfo->const_count * 4); + + memcpy(uniforms, cb->user_buffer, size); + } + + if (sobj == ctx->fs) + frag = true; + + for (uint32_t i = 0; i < uinfo->imm_count; i++) { + switch (uinfo->imm_contents[i]) { + case ETNA_IMMEDIATE_CONSTANT: + uniforms[i + uinfo->const_count] = uinfo->imm_data[i]; + break; + + case ETNA_IMMEDIATE_TEXRECT_SCALE_X: + case ETNA_IMMEDIATE_TEXRECT_SCALE_Y: + uniforms[i + uinfo->const_count] = + get_texrect_scale(ctx, frag, uinfo->imm_contents[i], uinfo->imm_data[i]); + break; + + case ETNA_IMMEDIATE_UNUSED: + /* nothing to do */ + break; + } + } + + *size = uinfo->const_count + uinfo->imm_count; +} + +void +etna_set_shader_uniforms_dirty_flags(struct etna_shader *sobj) +{ + uint32_t dirty = 0; + + for (uint32_t i = 0; i < sobj->uniforms.imm_count; i++) { + switch (sobj->uniforms.imm_contents[i]) { + case ETNA_IMMEDIATE_UNUSED: + case ETNA_IMMEDIATE_CONSTANT: + break; + + case ETNA_IMMEDIATE_TEXRECT_SCALE_X: + case ETNA_IMMEDIATE_TEXRECT_SCALE_Y: + dirty |= ETNA_DIRTY_SAMPLER_VIEWS; + break; + } + } + + sobj->uniforms_dirty_bits = dirty; +} diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_uniforms.h mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_uniforms.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_uniforms.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_uniforms.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2016 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Christian Gmeiner + */ + +#ifndef ETNAVIV_UNIFORMS_H_ +#define ETNAVIV_UNIFORMS_H_ + +#include + +struct etna_context; +struct etna_shader; +struct pipe_constant_buffer; + +void +etna_uniforms_write(const struct etna_context *ctx, + const struct etna_shader *sobj, + struct pipe_constant_buffer *cb, uint32_t *uniforms, + unsigned *size); + +void +etna_set_shader_uniforms_dirty_flags(struct etna_shader *sobj); + +#endif /* ETNAVIV_UNIFORMS_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_util.h mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_util.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_util.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_util.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,108 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/* Misc util */ +#ifndef H_ETNA_UTIL +#define H_ETNA_UTIL + +#include + +/* for conditionally setting boolean flag(s): */ +#define COND(bool, val) ((bool) ? (val) : 0) + +/* align to a value divisable by granularity >= value, works only for powers of two */ +static inline uint32_t +etna_align_up(uint32_t value, uint32_t granularity) +{ + return (value + (granularity - 1)) & (~(granularity - 1)); +} + +static inline uint32_t +etna_bits_ones(unsigned num) +{ + return (1 << num) - 1; +} + +/* clamped float [0.0 .. 1.0] -> [0 .. 255] */ +static inline uint8_t +etna_cfloat_to_uint8(float f) +{ + if (f <= 0.0f) + return 0; + + if (f >= (1.0f - 1.0f / 256.0f)) + return 255; + + return f * 256.0f; +} + +/* clamped float [0.0 .. 1.0] -> [0 .. (1<= (1.0f - 1.0f / (1 << bits))) + return (1 << bits) - 1; + + return f * (1 << bits); +} + +/* 1/log10(2) */ +#define RCPLOG2 (1.4426950408889634f) + +/* float to fixp 5.5 */ +static inline uint32_t +etna_float_to_fixp55(float f) +{ + if (f >= 15.953125f) + return 511; + + if (f < -16.0f) + return 512; + + return (int32_t)(f * 32.0f + 0.5f); +} + +/* texture size to log2 in fixp 5.5 format */ +static inline uint32_t +etna_log2_fixp55(unsigned width) +{ + return etna_float_to_fixp55(logf((float)width) * RCPLOG2); +} + +/* float to fixp 16.16 */ +static inline uint32_t +etna_f32_to_fixp16(float f) +{ + if (f >= (32768.0f - 1.0f / 65536.0f)) + return 0x7fffffff; + + if (f < -32768.0f) + return 0x80000000; + + return (int32_t)(f * 65536.0f + 0.5f); +} + +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_zsa.c mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_zsa.c --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_zsa.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_zsa.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,123 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + */ + +#include "etnaviv_zsa.h" + +#include "etnaviv_context.h" +#include "etnaviv_translate.h" +#include "util/u_memory.h" + +void * +etna_zsa_state_create(struct pipe_context *pctx, + const struct pipe_depth_stencil_alpha_state *so) +{ + struct etna_zsa_state *cs = CALLOC_STRUCT(etna_zsa_state); + + if (!cs) + return NULL; + + cs->base = *so; + + /* XXX does stencil[0] / stencil[1] order depend on rs->front_ccw? */ + bool early_z = true; + bool disable_zs = + (!so->depth.enabled || so->depth.func == PIPE_FUNC_ALWAYS) && + !so->depth.writemask; + +/* Set operations to KEEP if write mask is 0. + * When we don't do this, the depth buffer is written for the entire primitive + * instead of just where the stencil condition holds (GC600 rev 0x0019, without + * feature CORRECT_STENCIL). + * Not sure if this is a hardware bug or just a strange edge case. */ +#if 0 /* TODO: It looks like a hardware bug */ + for(int i=0; i<2; ++i) + { + if(so->stencil[i].writemask == 0) + { + so->stencil[i].fail_op = so->stencil[i].zfail_op = so->stencil[i].zpass_op = PIPE_STENCIL_OP_KEEP; + } + } +#endif + + /* Determine whether to enable early z reject. Don't enable it when any of + * the stencil-modifying functions is used. */ + if (so->stencil[0].enabled) { + if (so->stencil[0].func != PIPE_FUNC_ALWAYS || + (so->stencil[1].enabled && so->stencil[1].func != PIPE_FUNC_ALWAYS)) + disable_zs = false; + + if (so->stencil[0].fail_op != PIPE_STENCIL_OP_KEEP || + so->stencil[0].zfail_op != PIPE_STENCIL_OP_KEEP || + so->stencil[0].zpass_op != PIPE_STENCIL_OP_KEEP) { + disable_zs = early_z = false; + } else if (so->stencil[1].enabled) { + if (so->stencil[1].fail_op != PIPE_STENCIL_OP_KEEP || + so->stencil[1].zfail_op != PIPE_STENCIL_OP_KEEP || + so->stencil[1].zpass_op != PIPE_STENCIL_OP_KEEP) { + disable_zs = early_z = false; + } + } + } + + /* Disable early z reject when no depth test is enabled. + * This avoids having to sample depth even though we know it's going to + * succeed. */ + if (so->depth.enabled == false || so->depth.func == PIPE_FUNC_ALWAYS) + early_z = false; + + if (DBG_ENABLED(ETNA_DBG_NO_EARLY_Z)) + early_z = false; + + /* compare funcs have 1 to 1 mapping */ + cs->PE_DEPTH_CONFIG = + VIVS_PE_DEPTH_CONFIG_DEPTH_FUNC(so->depth.enabled ? so->depth.func + : PIPE_FUNC_ALWAYS) | + COND(so->depth.writemask, VIVS_PE_DEPTH_CONFIG_WRITE_ENABLE) | + COND(early_z, VIVS_PE_DEPTH_CONFIG_EARLY_Z) | + COND(disable_zs, VIVS_PE_DEPTH_CONFIG_DISABLE_ZS); + cs->PE_ALPHA_OP = + COND(so->alpha.enabled, VIVS_PE_ALPHA_OP_ALPHA_TEST) | + VIVS_PE_ALPHA_OP_ALPHA_FUNC(so->alpha.func) | + VIVS_PE_ALPHA_OP_ALPHA_REF(etna_cfloat_to_uint8(so->alpha.ref_value)); + cs->PE_STENCIL_OP = + VIVS_PE_STENCIL_OP_FUNC_FRONT(so->stencil[0].func) | + VIVS_PE_STENCIL_OP_FUNC_BACK(so->stencil[1].func) | + VIVS_PE_STENCIL_OP_FAIL_FRONT(translate_stencil_op(so->stencil[0].fail_op)) | + VIVS_PE_STENCIL_OP_FAIL_BACK(translate_stencil_op(so->stencil[1].fail_op)) | + VIVS_PE_STENCIL_OP_DEPTH_FAIL_FRONT(translate_stencil_op(so->stencil[0].zfail_op)) | + VIVS_PE_STENCIL_OP_DEPTH_FAIL_BACK(translate_stencil_op(so->stencil[1].zfail_op)) | + VIVS_PE_STENCIL_OP_PASS_FRONT(translate_stencil_op(so->stencil[0].zpass_op)) | + VIVS_PE_STENCIL_OP_PASS_BACK(translate_stencil_op(so->stencil[1].zpass_op)); + cs->PE_STENCIL_CONFIG = + translate_stencil_mode(so->stencil[0].enabled, so->stencil[1].enabled) | + VIVS_PE_STENCIL_CONFIG_MASK_FRONT(so->stencil[0].valuemask) | + VIVS_PE_STENCIL_CONFIG_WRITE_MASK_FRONT(so->stencil[0].writemask); + /* XXX back masks in VIVS_PE_DEPTH_CONFIG_EXT? */ + /* XXX VIVS_PE_STENCIL_CONFIG_REF_FRONT comes from pipe_stencil_ref */ + + /* XXX does alpha/stencil test affect PE_COLOR_FORMAT_OVERWRITE? */ + return cs; +} diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_zsa.h mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_zsa.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/etnaviv_zsa.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/etnaviv_zsa.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2012-2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Wladimir J. van der Laan + */ + +#ifndef H_ETNAVIV_ZSA +#define H_ETNAVIV_ZSA + +#include "pipe/p_context.h" +#include "pipe/p_state.h" + +struct etna_zsa_state { + struct pipe_depth_stencil_alpha_state base; + + uint32_t PE_DEPTH_CONFIG; + uint32_t PE_ALPHA_OP; + uint32_t PE_STENCIL_OP; + uint32_t PE_STENCIL_CONFIG; +}; + +static inline struct etna_zsa_state * +etna_zsa_state(struct pipe_depth_stencil_alpha_state *zsa) +{ + return (struct etna_zsa_state *)zsa; +} + +void * +etna_zsa_state_create(struct pipe_context *pctx, + const struct pipe_depth_stencil_alpha_state *so); + +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/hw/cmdstream.xml.h mesa-17.0.7/src/gallium/drivers/etnaviv/hw/cmdstream.xml.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/hw/cmdstream.xml.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/hw/cmdstream.xml.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,270 @@ +#ifndef CMDSTREAM_XML +#define CMDSTREAM_XML + +/* Autogenerated file, DO NOT EDIT manually! + +This file was generated by the rules-ng-ng headergen tool in this git repository: +http://0x04.net/cgit/index.cgi/rules-ng-ng +git clone git://0x04.net/rules-ng-ng + +The rules-ng-ng source files this header was generated from are: +- cmdstream.xml ( 14094 bytes, from 2016-11-16 18:54:37) +- copyright.xml ( 1597 bytes, from 2016-10-02 14:26:13) +- common.xml ( 23422 bytes, from 2016-11-16 18:54:37) + +Copyright (C) 2012-2016 by the following authors: +- Wladimir J. van der Laan +- Christian Gmeiner +- Lucas Stach +- Russell King + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +the rights to use, copy, modify, merge, publish, distribute, sub license, +and/or sell copies of the Software, and to permit persons to whom the +Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the +next paragraph) shall be included in all copies or substantial portions +of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +DEALINGS IN THE SOFTWARE. +*/ + + +#define FE_OPCODE_LOAD_STATE 0x00000001 +#define FE_OPCODE_END 0x00000002 +#define FE_OPCODE_NOP 0x00000003 +#define FE_OPCODE_DRAW_2D 0x00000004 +#define FE_OPCODE_DRAW_PRIMITIVES 0x00000005 +#define FE_OPCODE_DRAW_INDEXED_PRIMITIVES 0x00000006 +#define FE_OPCODE_WAIT 0x00000007 +#define FE_OPCODE_LINK 0x00000008 +#define FE_OPCODE_STALL 0x00000009 +#define FE_OPCODE_CALL 0x0000000a +#define FE_OPCODE_RETURN 0x0000000b +#define FE_OPCODE_DRAW_INSTANCED 0x0000000c +#define FE_OPCODE_CHIP_SELECT 0x0000000d +#define PRIMITIVE_TYPE_POINTS 0x00000001 +#define PRIMITIVE_TYPE_LINES 0x00000002 +#define PRIMITIVE_TYPE_LINE_STRIP 0x00000003 +#define PRIMITIVE_TYPE_TRIANGLES 0x00000004 +#define PRIMITIVE_TYPE_TRIANGLE_STRIP 0x00000005 +#define PRIMITIVE_TYPE_TRIANGLE_FAN 0x00000006 +#define PRIMITIVE_TYPE_LINE_LOOP 0x00000007 +#define PRIMITIVE_TYPE_QUADS 0x00000008 +#define VIV_FE_LOAD_STATE 0x00000000 + +#define VIV_FE_LOAD_STATE_HEADER 0x00000000 +#define VIV_FE_LOAD_STATE_HEADER_OP__MASK 0xf8000000 +#define VIV_FE_LOAD_STATE_HEADER_OP__SHIFT 27 +#define VIV_FE_LOAD_STATE_HEADER_OP_LOAD_STATE 0x08000000 +#define VIV_FE_LOAD_STATE_HEADER_FIXP 0x04000000 +#define VIV_FE_LOAD_STATE_HEADER_COUNT__MASK 0x03ff0000 +#define VIV_FE_LOAD_STATE_HEADER_COUNT__SHIFT 16 +#define VIV_FE_LOAD_STATE_HEADER_COUNT(x) (((x) << VIV_FE_LOAD_STATE_HEADER_COUNT__SHIFT) & VIV_FE_LOAD_STATE_HEADER_COUNT__MASK) +#define VIV_FE_LOAD_STATE_HEADER_OFFSET__MASK 0x0000ffff +#define VIV_FE_LOAD_STATE_HEADER_OFFSET__SHIFT 0 +#define VIV_FE_LOAD_STATE_HEADER_OFFSET(x) (((x) << VIV_FE_LOAD_STATE_HEADER_OFFSET__SHIFT) & VIV_FE_LOAD_STATE_HEADER_OFFSET__MASK) +#define VIV_FE_LOAD_STATE_HEADER_OFFSET__SHR 2 + +#define VIV_FE_END 0x00000000 + +#define VIV_FE_END_HEADER 0x00000000 +#define VIV_FE_END_HEADER_EVENT_ID__MASK 0x0000001f +#define VIV_FE_END_HEADER_EVENT_ID__SHIFT 0 +#define VIV_FE_END_HEADER_EVENT_ID(x) (((x) << VIV_FE_END_HEADER_EVENT_ID__SHIFT) & VIV_FE_END_HEADER_EVENT_ID__MASK) +#define VIV_FE_END_HEADER_EVENT_ENABLE 0x00000100 +#define VIV_FE_END_HEADER_OP__MASK 0xf8000000 +#define VIV_FE_END_HEADER_OP__SHIFT 27 +#define VIV_FE_END_HEADER_OP_END 0x10000000 + +#define VIV_FE_NOP 0x00000000 + +#define VIV_FE_NOP_HEADER 0x00000000 +#define VIV_FE_NOP_HEADER_OP__MASK 0xf8000000 +#define VIV_FE_NOP_HEADER_OP__SHIFT 27 +#define VIV_FE_NOP_HEADER_OP_NOP 0x18000000 + +#define VIV_FE_DRAW_2D 0x00000000 + +#define VIV_FE_DRAW_2D_HEADER 0x00000000 +#define VIV_FE_DRAW_2D_HEADER_COUNT__MASK 0x0000ff00 +#define VIV_FE_DRAW_2D_HEADER_COUNT__SHIFT 8 +#define VIV_FE_DRAW_2D_HEADER_COUNT(x) (((x) << VIV_FE_DRAW_2D_HEADER_COUNT__SHIFT) & VIV_FE_DRAW_2D_HEADER_COUNT__MASK) +#define VIV_FE_DRAW_2D_HEADER_DATA_COUNT__MASK 0x07ff0000 +#define VIV_FE_DRAW_2D_HEADER_DATA_COUNT__SHIFT 16 +#define VIV_FE_DRAW_2D_HEADER_DATA_COUNT(x) (((x) << VIV_FE_DRAW_2D_HEADER_DATA_COUNT__SHIFT) & VIV_FE_DRAW_2D_HEADER_DATA_COUNT__MASK) +#define VIV_FE_DRAW_2D_HEADER_OP__MASK 0xf8000000 +#define VIV_FE_DRAW_2D_HEADER_OP__SHIFT 27 +#define VIV_FE_DRAW_2D_HEADER_OP_DRAW_2D 0x20000000 + +#define VIV_FE_DRAW_2D_TOP_LEFT 0x00000008 +#define VIV_FE_DRAW_2D_TOP_LEFT_X__MASK 0x0000ffff +#define VIV_FE_DRAW_2D_TOP_LEFT_X__SHIFT 0 +#define VIV_FE_DRAW_2D_TOP_LEFT_X(x) (((x) << VIV_FE_DRAW_2D_TOP_LEFT_X__SHIFT) & VIV_FE_DRAW_2D_TOP_LEFT_X__MASK) +#define VIV_FE_DRAW_2D_TOP_LEFT_Y__MASK 0xffff0000 +#define VIV_FE_DRAW_2D_TOP_LEFT_Y__SHIFT 16 +#define VIV_FE_DRAW_2D_TOP_LEFT_Y(x) (((x) << VIV_FE_DRAW_2D_TOP_LEFT_Y__SHIFT) & VIV_FE_DRAW_2D_TOP_LEFT_Y__MASK) + +#define VIV_FE_DRAW_2D_BOTTOM_RIGHT 0x0000000c +#define VIV_FE_DRAW_2D_BOTTOM_RIGHT_X__MASK 0x0000ffff +#define VIV_FE_DRAW_2D_BOTTOM_RIGHT_X__SHIFT 0 +#define VIV_FE_DRAW_2D_BOTTOM_RIGHT_X(x) (((x) << VIV_FE_DRAW_2D_BOTTOM_RIGHT_X__SHIFT) & VIV_FE_DRAW_2D_BOTTOM_RIGHT_X__MASK) +#define VIV_FE_DRAW_2D_BOTTOM_RIGHT_Y__MASK 0xffff0000 +#define VIV_FE_DRAW_2D_BOTTOM_RIGHT_Y__SHIFT 16 +#define VIV_FE_DRAW_2D_BOTTOM_RIGHT_Y(x) (((x) << VIV_FE_DRAW_2D_BOTTOM_RIGHT_Y__SHIFT) & VIV_FE_DRAW_2D_BOTTOM_RIGHT_Y__MASK) + +#define VIV_FE_DRAW_PRIMITIVES 0x00000000 + +#define VIV_FE_DRAW_PRIMITIVES_HEADER 0x00000000 +#define VIV_FE_DRAW_PRIMITIVES_HEADER_OP__MASK 0xf8000000 +#define VIV_FE_DRAW_PRIMITIVES_HEADER_OP__SHIFT 27 +#define VIV_FE_DRAW_PRIMITIVES_HEADER_OP_DRAW_PRIMITIVES 0x28000000 + +#define VIV_FE_DRAW_PRIMITIVES_COMMAND 0x00000004 +#define VIV_FE_DRAW_PRIMITIVES_COMMAND_TYPE__MASK 0x000000ff +#define VIV_FE_DRAW_PRIMITIVES_COMMAND_TYPE__SHIFT 0 +#define VIV_FE_DRAW_PRIMITIVES_COMMAND_TYPE(x) (((x) << VIV_FE_DRAW_PRIMITIVES_COMMAND_TYPE__SHIFT) & VIV_FE_DRAW_PRIMITIVES_COMMAND_TYPE__MASK) + +#define VIV_FE_DRAW_PRIMITIVES_START 0x00000008 + +#define VIV_FE_DRAW_PRIMITIVES_COUNT 0x0000000c + +#define VIV_FE_DRAW_INDEXED_PRIMITIVES 0x00000000 + +#define VIV_FE_DRAW_INDEXED_PRIMITIVES_HEADER 0x00000000 +#define VIV_FE_DRAW_INDEXED_PRIMITIVES_HEADER_OP__MASK 0xf8000000 +#define VIV_FE_DRAW_INDEXED_PRIMITIVES_HEADER_OP__SHIFT 27 +#define VIV_FE_DRAW_INDEXED_PRIMITIVES_HEADER_OP_DRAW_INDEXED_PRIMITIVES 0x30000000 + +#define VIV_FE_DRAW_INDEXED_PRIMITIVES_COMMAND 0x00000004 +#define VIV_FE_DRAW_INDEXED_PRIMITIVES_COMMAND_TYPE__MASK 0x000000ff +#define VIV_FE_DRAW_INDEXED_PRIMITIVES_COMMAND_TYPE__SHIFT 0 +#define VIV_FE_DRAW_INDEXED_PRIMITIVES_COMMAND_TYPE(x) (((x) << VIV_FE_DRAW_INDEXED_PRIMITIVES_COMMAND_TYPE__SHIFT) & VIV_FE_DRAW_INDEXED_PRIMITIVES_COMMAND_TYPE__MASK) + +#define VIV_FE_DRAW_INDEXED_PRIMITIVES_START 0x00000008 + +#define VIV_FE_DRAW_INDEXED_PRIMITIVES_COUNT 0x0000000c + +#define VIV_FE_DRAW_INDEXED_PRIMITIVES_OFFSET 0x00000010 + +#define VIV_FE_WAIT 0x00000000 + +#define VIV_FE_WAIT_HEADER 0x00000000 +#define VIV_FE_WAIT_HEADER_DELAY__MASK 0x0000ffff +#define VIV_FE_WAIT_HEADER_DELAY__SHIFT 0 +#define VIV_FE_WAIT_HEADER_DELAY(x) (((x) << VIV_FE_WAIT_HEADER_DELAY__SHIFT) & VIV_FE_WAIT_HEADER_DELAY__MASK) +#define VIV_FE_WAIT_HEADER_OP__MASK 0xf8000000 +#define VIV_FE_WAIT_HEADER_OP__SHIFT 27 +#define VIV_FE_WAIT_HEADER_OP_WAIT 0x38000000 + +#define VIV_FE_LINK 0x00000000 + +#define VIV_FE_LINK_HEADER 0x00000000 +#define VIV_FE_LINK_HEADER_PREFETCH__MASK 0x0000ffff +#define VIV_FE_LINK_HEADER_PREFETCH__SHIFT 0 +#define VIV_FE_LINK_HEADER_PREFETCH(x) (((x) << VIV_FE_LINK_HEADER_PREFETCH__SHIFT) & VIV_FE_LINK_HEADER_PREFETCH__MASK) +#define VIV_FE_LINK_HEADER_OP__MASK 0xf8000000 +#define VIV_FE_LINK_HEADER_OP__SHIFT 27 +#define VIV_FE_LINK_HEADER_OP_LINK 0x40000000 + +#define VIV_FE_LINK_ADDRESS 0x00000004 + +#define VIV_FE_STALL 0x00000000 + +#define VIV_FE_STALL_HEADER 0x00000000 +#define VIV_FE_STALL_HEADER_OP__MASK 0xf8000000 +#define VIV_FE_STALL_HEADER_OP__SHIFT 27 +#define VIV_FE_STALL_HEADER_OP_STALL 0x48000000 + +#define VIV_FE_STALL_TOKEN 0x00000004 +#define VIV_FE_STALL_TOKEN_FROM__MASK 0x0000001f +#define VIV_FE_STALL_TOKEN_FROM__SHIFT 0 +#define VIV_FE_STALL_TOKEN_FROM(x) (((x) << VIV_FE_STALL_TOKEN_FROM__SHIFT) & VIV_FE_STALL_TOKEN_FROM__MASK) +#define VIV_FE_STALL_TOKEN_TO__MASK 0x00001f00 +#define VIV_FE_STALL_TOKEN_TO__SHIFT 8 +#define VIV_FE_STALL_TOKEN_TO(x) (((x) << VIV_FE_STALL_TOKEN_TO__SHIFT) & VIV_FE_STALL_TOKEN_TO__MASK) + +#define VIV_FE_CALL 0x00000000 + +#define VIV_FE_CALL_HEADER 0x00000000 +#define VIV_FE_CALL_HEADER_PREFETCH__MASK 0x0000ffff +#define VIV_FE_CALL_HEADER_PREFETCH__SHIFT 0 +#define VIV_FE_CALL_HEADER_PREFETCH(x) (((x) << VIV_FE_CALL_HEADER_PREFETCH__SHIFT) & VIV_FE_CALL_HEADER_PREFETCH__MASK) +#define VIV_FE_CALL_HEADER_OP__MASK 0xf8000000 +#define VIV_FE_CALL_HEADER_OP__SHIFT 27 +#define VIV_FE_CALL_HEADER_OP_CALL 0x50000000 + +#define VIV_FE_CALL_ADDRESS 0x00000004 + +#define VIV_FE_CALL_RETURN_PREFETCH 0x00000008 + +#define VIV_FE_CALL_RETURN_ADDRESS 0x0000000c + +#define VIV_FE_RETURN 0x00000000 + +#define VIV_FE_RETURN_HEADER 0x00000000 +#define VIV_FE_RETURN_HEADER_OP__MASK 0xf8000000 +#define VIV_FE_RETURN_HEADER_OP__SHIFT 27 +#define VIV_FE_RETURN_HEADER_OP_RETURN 0x58000000 + +#define VIV_FE_CHIP_SELECT 0x00000000 + +#define VIV_FE_CHIP_SELECT_HEADER 0x00000000 +#define VIV_FE_CHIP_SELECT_HEADER_OP__MASK 0xf8000000 +#define VIV_FE_CHIP_SELECT_HEADER_OP__SHIFT 27 +#define VIV_FE_CHIP_SELECT_HEADER_OP_CHIP_SELECT 0x68000000 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP15 0x00008000 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP14 0x00004000 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP13 0x00002000 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP12 0x00001000 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP11 0x00000800 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP10 0x00000400 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP9 0x00000200 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP8 0x00000100 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP7 0x00000080 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP6 0x00000040 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP5 0x00000020 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP4 0x00000010 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP3 0x00000008 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP2 0x00000004 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP1 0x00000002 +#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP0 0x00000001 + +#define VIV_FE_DRAW_INSTANCED 0x00000000 + +#define VIV_FE_DRAW_INSTANCED_HEADER 0x00000000 +#define VIV_FE_DRAW_INSTANCED_HEADER_OP__MASK 0xf8000000 +#define VIV_FE_DRAW_INSTANCED_HEADER_OP__SHIFT 27 +#define VIV_FE_DRAW_INSTANCED_HEADER_OP_DRAW_INSTANCED 0x60000000 +#define VIV_FE_DRAW_INSTANCED_HEADER_INDEXED 0x00100000 +#define VIV_FE_DRAW_INSTANCED_HEADER_TYPE__MASK 0x000f0000 +#define VIV_FE_DRAW_INSTANCED_HEADER_TYPE__SHIFT 16 +#define VIV_FE_DRAW_INSTANCED_HEADER_TYPE(x) (((x) << VIV_FE_DRAW_INSTANCED_HEADER_TYPE__SHIFT) & VIV_FE_DRAW_INSTANCED_HEADER_TYPE__MASK) +#define VIV_FE_DRAW_INSTANCED_HEADER_INSTANCE_COUNT_LO__MASK 0x0000ffff +#define VIV_FE_DRAW_INSTANCED_HEADER_INSTANCE_COUNT_LO__SHIFT 0 +#define VIV_FE_DRAW_INSTANCED_HEADER_INSTANCE_COUNT_LO(x) (((x) << VIV_FE_DRAW_INSTANCED_HEADER_INSTANCE_COUNT_LO__SHIFT) & VIV_FE_DRAW_INSTANCED_HEADER_INSTANCE_COUNT_LO__MASK) + +#define VIV_FE_DRAW_INSTANCED_COUNT 0x00000004 +#define VIV_FE_DRAW_INSTANCED_COUNT_INSTANCE_COUNT_HI__MASK 0xff000000 +#define VIV_FE_DRAW_INSTANCED_COUNT_INSTANCE_COUNT_HI__SHIFT 24 +#define VIV_FE_DRAW_INSTANCED_COUNT_INSTANCE_COUNT_HI(x) (((x) << VIV_FE_DRAW_INSTANCED_COUNT_INSTANCE_COUNT_HI__SHIFT) & VIV_FE_DRAW_INSTANCED_COUNT_INSTANCE_COUNT_HI__MASK) +#define VIV_FE_DRAW_INSTANCED_COUNT_VERTEX_COUNT__MASK 0x00ffffff +#define VIV_FE_DRAW_INSTANCED_COUNT_VERTEX_COUNT__SHIFT 0 +#define VIV_FE_DRAW_INSTANCED_COUNT_VERTEX_COUNT(x) (((x) << VIV_FE_DRAW_INSTANCED_COUNT_VERTEX_COUNT__SHIFT) & VIV_FE_DRAW_INSTANCED_COUNT_VERTEX_COUNT__MASK) + +#define VIV_FE_DRAW_INSTANCED_START 0x00000008 +#define VIV_FE_DRAW_INSTANCED_START_INDEX__MASK 0xffffffff +#define VIV_FE_DRAW_INSTANCED_START_INDEX__SHIFT 0 +#define VIV_FE_DRAW_INSTANCED_START_INDEX(x) (((x) << VIV_FE_DRAW_INSTANCED_START_INDEX__SHIFT) & VIV_FE_DRAW_INSTANCED_START_INDEX__MASK) + + +#endif /* CMDSTREAM_XML */ diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/hw/common.xml.h mesa-17.0.7/src/gallium/drivers/etnaviv/hw/common.xml.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/hw/common.xml.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/hw/common.xml.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,320 @@ +#ifndef COMMON_XML +#define COMMON_XML + +/* Autogenerated file, DO NOT EDIT manually! + +This file was generated by the rules-ng-ng headergen tool in this git repository: +http://0x04.net/cgit/index.cgi/rules-ng-ng +git clone git://0x04.net/rules-ng-ng + +The rules-ng-ng source files this header was generated from are: +- state.xml ( 19792 bytes, from 2016-11-16 18:54:37) +- common.xml ( 23422 bytes, from 2016-11-16 18:54:37) +- state_hi.xml ( 25653 bytes, from 2016-10-02 14:26:13) +- copyright.xml ( 1597 bytes, from 2016-10-02 14:26:13) +- state_2d.xml ( 51552 bytes, from 2016-10-02 14:26:13) +- state_3d.xml ( 57579 bytes, from 2016-11-16 18:54:37) +- state_vg.xml ( 5975 bytes, from 2016-10-02 14:26:13) + +Copyright (C) 2012-2016 by the following authors: +- Wladimir J. van der Laan +- Christian Gmeiner +- Lucas Stach +- Russell King + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +the rights to use, copy, modify, merge, publish, distribute, sub license, +and/or sell copies of the Software, and to permit persons to whom the +Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the +next paragraph) shall be included in all copies or substantial portions +of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +DEALINGS IN THE SOFTWARE. +*/ + + +#define PIPE_ID_PIPE_3D 0x00000000 +#define PIPE_ID_PIPE_2D 0x00000001 +#define SYNC_RECIPIENT_FE 0x00000001 +#define SYNC_RECIPIENT_RA 0x00000005 +#define SYNC_RECIPIENT_PE 0x00000007 +#define SYNC_RECIPIENT_DE 0x0000000b +#define SYNC_RECIPIENT_VG 0x0000000f +#define SYNC_RECIPIENT_TESSELATOR 0x00000010 +#define SYNC_RECIPIENT_VG2 0x00000011 +#define SYNC_RECIPIENT_TESSELATOR2 0x00000012 +#define SYNC_RECIPIENT_VG3 0x00000013 +#define SYNC_RECIPIENT_TESSELATOR3 0x00000014 +#define ENDIAN_MODE_NO_SWAP 0x00000000 +#define ENDIAN_MODE_SWAP_16 0x00000001 +#define ENDIAN_MODE_SWAP_32 0x00000002 +#define chipModel_GC200 0x00000200 +#define chipModel_GC300 0x00000300 +#define chipModel_GC320 0x00000320 +#define chipModel_GC328 0x00000328 +#define chipModel_GC350 0x00000350 +#define chipModel_GC355 0x00000355 +#define chipModel_GC400 0x00000400 +#define chipModel_GC410 0x00000410 +#define chipModel_GC420 0x00000420 +#define chipModel_GC428 0x00000428 +#define chipModel_GC450 0x00000450 +#define chipModel_GC500 0x00000500 +#define chipModel_GC520 0x00000520 +#define chipModel_GC530 0x00000530 +#define chipModel_GC600 0x00000600 +#define chipModel_GC700 0x00000700 +#define chipModel_GC800 0x00000800 +#define chipModel_GC860 0x00000860 +#define chipModel_GC880 0x00000880 +#define chipModel_GC1000 0x00001000 +#define chipModel_GC1500 0x00001500 +#define chipModel_GC2000 0x00002000 +#define chipModel_GC2100 0x00002100 +#define chipModel_GC2200 0x00002200 +#define chipModel_GC2500 0x00002500 +#define chipModel_GC3000 0x00003000 +#define chipModel_GC4000 0x00004000 +#define chipModel_GC5000 0x00005000 +#define chipModel_GC5200 0x00005200 +#define chipModel_GC6400 0x00006400 +#define RGBA_BITS_R 0x00000001 +#define RGBA_BITS_G 0x00000002 +#define RGBA_BITS_B 0x00000004 +#define RGBA_BITS_A 0x00000008 +#define chipFeatures_FAST_CLEAR 0x00000001 +#define chipFeatures_SPECIAL_ANTI_ALIASING 0x00000002 +#define chipFeatures_PIPE_3D 0x00000004 +#define chipFeatures_DXT_TEXTURE_COMPRESSION 0x00000008 +#define chipFeatures_DEBUG_MODE 0x00000010 +#define chipFeatures_Z_COMPRESSION 0x00000020 +#define chipFeatures_YUV420_SCALER 0x00000040 +#define chipFeatures_MSAA 0x00000080 +#define chipFeatures_DC 0x00000100 +#define chipFeatures_PIPE_2D 0x00000200 +#define chipFeatures_ETC1_TEXTURE_COMPRESSION 0x00000400 +#define chipFeatures_FAST_SCALER 0x00000800 +#define chipFeatures_HIGH_DYNAMIC_RANGE 0x00001000 +#define chipFeatures_YUV420_TILER 0x00002000 +#define chipFeatures_MODULE_CG 0x00004000 +#define chipFeatures_MIN_AREA 0x00008000 +#define chipFeatures_NO_EARLY_Z 0x00010000 +#define chipFeatures_NO_422_TEXTURE 0x00020000 +#define chipFeatures_BUFFER_INTERLEAVING 0x00040000 +#define chipFeatures_BYTE_WRITE_2D 0x00080000 +#define chipFeatures_NO_SCALER 0x00100000 +#define chipFeatures_YUY2_AVERAGING 0x00200000 +#define chipFeatures_HALF_PE_CACHE 0x00400000 +#define chipFeatures_HALF_TX_CACHE 0x00800000 +#define chipFeatures_YUY2_RENDER_TARGET 0x01000000 +#define chipFeatures_MEM32 0x02000000 +#define chipFeatures_PIPE_VG 0x04000000 +#define chipFeatures_VGTS 0x08000000 +#define chipFeatures_FE20 0x10000000 +#define chipFeatures_BYTE_WRITE_3D 0x20000000 +#define chipFeatures_RS_YUV_TARGET 0x40000000 +#define chipFeatures_32_BIT_INDICES 0x80000000 +#define chipMinorFeatures0_FLIP_Y 0x00000001 +#define chipMinorFeatures0_DUAL_RETURN_BUS 0x00000002 +#define chipMinorFeatures0_ENDIANNESS_CONFIG 0x00000004 +#define chipMinorFeatures0_TEXTURE_8K 0x00000008 +#define chipMinorFeatures0_CORRECT_TEXTURE_CONVERTER 0x00000010 +#define chipMinorFeatures0_SPECIAL_MSAA_LOD 0x00000020 +#define chipMinorFeatures0_FAST_CLEAR_FLUSH 0x00000040 +#define chipMinorFeatures0_2DPE20 0x00000080 +#define chipMinorFeatures0_CORRECT_AUTO_DISABLE 0x00000100 +#define chipMinorFeatures0_RENDERTARGET_8K 0x00000200 +#define chipMinorFeatures0_2BITPERTILE 0x00000400 +#define chipMinorFeatures0_SEPARATE_TILE_STATUS_WHEN_INTERLEAVED 0x00000800 +#define chipMinorFeatures0_SUPER_TILED 0x00001000 +#define chipMinorFeatures0_VG_20 0x00002000 +#define chipMinorFeatures0_TS_EXTENDED_COMMANDS 0x00004000 +#define chipMinorFeatures0_COMPRESSION_FIFO_FIXED 0x00008000 +#define chipMinorFeatures0_HAS_SIGN_FLOOR_CEIL 0x00010000 +#define chipMinorFeatures0_VG_FILTER 0x00020000 +#define chipMinorFeatures0_VG_21 0x00040000 +#define chipMinorFeatures0_SHADER_HAS_W 0x00080000 +#define chipMinorFeatures0_HAS_SQRT_TRIG 0x00100000 +#define chipMinorFeatures0_MORE_MINOR_FEATURES 0x00200000 +#define chipMinorFeatures0_MC20 0x00400000 +#define chipMinorFeatures0_MSAA_SIDEBAND 0x00800000 +#define chipMinorFeatures0_BUG_FIXES0 0x01000000 +#define chipMinorFeatures0_VAA 0x02000000 +#define chipMinorFeatures0_BYPASS_IN_MSAA 0x04000000 +#define chipMinorFeatures0_HZ 0x08000000 +#define chipMinorFeatures0_NEW_TEXTURE 0x10000000 +#define chipMinorFeatures0_2D_A8_TARGET 0x20000000 +#define chipMinorFeatures0_CORRECT_STENCIL 0x40000000 +#define chipMinorFeatures0_ENHANCE_VR 0x80000000 +#define chipMinorFeatures1_RSUV_SWIZZLE 0x00000001 +#define chipMinorFeatures1_V2_COMPRESSION 0x00000002 +#define chipMinorFeatures1_VG_DOUBLE_BUFFER 0x00000004 +#define chipMinorFeatures1_EXTRA_EVENT_STATES 0x00000008 +#define chipMinorFeatures1_NO_STRIPING_NEEDED 0x00000010 +#define chipMinorFeatures1_TEXTURE_STRIDE 0x00000020 +#define chipMinorFeatures1_BUG_FIXES3 0x00000040 +#define chipMinorFeatures1_AUTO_DISABLE 0x00000080 +#define chipMinorFeatures1_AUTO_RESTART_TS 0x00000100 +#define chipMinorFeatures1_DISABLE_PE_GATING 0x00000200 +#define chipMinorFeatures1_L2_WINDOWING 0x00000400 +#define chipMinorFeatures1_HALF_FLOAT 0x00000800 +#define chipMinorFeatures1_PIXEL_DITHER 0x00001000 +#define chipMinorFeatures1_TWO_STENCIL_REFERENCE 0x00002000 +#define chipMinorFeatures1_EXTENDED_PIXEL_FORMAT 0x00004000 +#define chipMinorFeatures1_CORRECT_MIN_MAX_DEPTH 0x00008000 +#define chipMinorFeatures1_2D_DITHER 0x00010000 +#define chipMinorFeatures1_BUG_FIXES5 0x00020000 +#define chipMinorFeatures1_NEW_2D 0x00040000 +#define chipMinorFeatures1_NEW_FP 0x00080000 +#define chipMinorFeatures1_TEXTURE_HALIGN 0x00100000 +#define chipMinorFeatures1_NON_POWER_OF_TWO 0x00200000 +#define chipMinorFeatures1_LINEAR_TEXTURE_SUPPORT 0x00400000 +#define chipMinorFeatures1_HALTI0 0x00800000 +#define chipMinorFeatures1_CORRECT_OVERFLOW_VG 0x01000000 +#define chipMinorFeatures1_NEGATIVE_LOG_FIX 0x02000000 +#define chipMinorFeatures1_RESOLVE_OFFSET 0x04000000 +#define chipMinorFeatures1_OK_TO_GATE_AXI_CLOCK 0x08000000 +#define chipMinorFeatures1_MMU_VERSION 0x10000000 +#define chipMinorFeatures1_WIDE_LINE 0x20000000 +#define chipMinorFeatures1_BUG_FIXES6 0x40000000 +#define chipMinorFeatures1_FC_FLUSH_STALL 0x80000000 +#define chipMinorFeatures2_LINE_LOOP 0x00000001 +#define chipMinorFeatures2_LOGIC_OP 0x00000002 +#define chipMinorFeatures2_SEAMLESS_CUBE_MAP 0x00000004 +#define chipMinorFeatures2_SUPERTILED_TEXTURE 0x00000008 +#define chipMinorFeatures2_LINEAR_PE 0x00000010 +#define chipMinorFeatures2_RECT_PRIMITIVE 0x00000020 +#define chipMinorFeatures2_COMPOSITION 0x00000040 +#define chipMinorFeatures2_CORRECT_AUTO_DISABLE_COUNT 0x00000080 +#define chipMinorFeatures2_PE_SWIZZLE 0x00000100 +#define chipMinorFeatures2_END_EVENT 0x00000200 +#define chipMinorFeatures2_S1S8 0x00000400 +#define chipMinorFeatures2_HALTI1 0x00000800 +#define chipMinorFeatures2_RGB888 0x00001000 +#define chipMinorFeatures2_TX__YUV_ASSEMBLER 0x00002000 +#define chipMinorFeatures2_DYNAMIC_FREQUENCY_SCALING 0x00004000 +#define chipMinorFeatures2_EXTRA_TEXTURE_STATE 0x00008000 +#define chipMinorFeatures2_FULL_DIRECTFB 0x00010000 +#define chipMinorFeatures2_2D_TILING 0x00020000 +#define chipMinorFeatures2_THREAD_WALKER_IN_PS 0x00040000 +#define chipMinorFeatures2_TILE_FILLER 0x00080000 +#define chipMinorFeatures2_YUV_STANDARD 0x00100000 +#define chipMinorFeatures2_2D_MULTI_SOURCE_BLIT 0x00200000 +#define chipMinorFeatures2_YUV_CONVERSION 0x00400000 +#define chipMinorFeatures2_FLUSH_FIXED_2D 0x00800000 +#define chipMinorFeatures2_INTERLEAVER 0x01000000 +#define chipMinorFeatures2_MIXED_STREAMS 0x02000000 +#define chipMinorFeatures2_2D_420_L2CACHE 0x04000000 +#define chipMinorFeatures2_BUG_FIXES7 0x08000000 +#define chipMinorFeatures2_2D_NO_INDEX8_BRUSH 0x10000000 +#define chipMinorFeatures2_TEXTURE_TILED_READ 0x20000000 +#define chipMinorFeatures2_DECOMPRESS_Z16 0x40000000 +#define chipMinorFeatures2_BUG_FIXES8 0x80000000 +#define chipMinorFeatures3_ROTATION_STALL_FIX 0x00000001 +#define chipMinorFeatures3_OCL_ONLY 0x00000002 +#define chipMinorFeatures3_2D_MULTI_SOURCE_BLT_EX 0x00000004 +#define chipMinorFeatures3_INSTRUCTION_CACHE 0x00000008 +#define chipMinorFeatures3_GEOMETRY_SHADER 0x00000010 +#define chipMinorFeatures3_TEX_COMPRESSION_SUPERTILED 0x00000020 +#define chipMinorFeatures3_GENERICS 0x00000040 +#define chipMinorFeatures3_BUG_FIXES9 0x00000080 +#define chipMinorFeatures3_FAST_MSAA 0x00000100 +#define chipMinorFeatures3_WCLIP 0x00000200 +#define chipMinorFeatures3_BUG_FIXES10 0x00000400 +#define chipMinorFeatures3_UNIFIED_SAMPLERS 0x00000800 +#define chipMinorFeatures3_BUG_FIXES11 0x00001000 +#define chipMinorFeatures3_PERFORMANCE_COUNTERS 0x00002000 +#define chipMinorFeatures3_HAS_FAST_TRANSCENDENTALS 0x00004000 +#define chipMinorFeatures3_BUG_FIXES12 0x00008000 +#define chipMinorFeatures3_BUG_FIXES13 0x00010000 +#define chipMinorFeatures3_DE_ENHANCEMENTS1 0x00020000 +#define chipMinorFeatures3_ACE 0x00040000 +#define chipMinorFeatures3_TX_ENHANCEMENTS1 0x00080000 +#define chipMinorFeatures3_SH_ENHANCEMENTS1 0x00100000 +#define chipMinorFeatures3_SH_ENHANCEMENTS2 0x00200000 +#define chipMinorFeatures3_UNK22 0x00400000 +#define chipMinorFeatures3_2D_FC_SOURCE 0x00800000 +#define chipMinorFeatures3_UNK24 0x01000000 +#define chipMinorFeatures3_UNK25 0x02000000 +#define chipMinorFeatures3_NEW_HZ 0x04000000 +#define chipMinorFeatures3_UNK27 0x08000000 +#define chipMinorFeatures3_UNK28 0x10000000 +#define chipMinorFeatures3_SH_ENHANCEMENTS3 0x20000000 +#define chipMinorFeatures3_UNK30 0x40000000 +#define chipMinorFeatures3_UNK31 0x80000000 +#define chipMinorFeatures4_UNK0 0x00000001 +#define chipMinorFeatures4_PE_ENHANCEMENTS2 0x00000002 +#define chipMinorFeatures4_FRUSTUM_CLIP_FIX 0x00000004 +#define chipMinorFeatures4_UNK3 0x00000008 +#define chipMinorFeatures4_UNK4 0x00000010 +#define chipMinorFeatures4_2D_GAMMA 0x00000020 +#define chipMinorFeatures4_SINGLE_BUFFER 0x00000040 +#define chipMinorFeatures4_UNK7 0x00000080 +#define chipMinorFeatures4_UNK8 0x00000100 +#define chipMinorFeatures4_UNK9 0x00000200 +#define chipMinorFeatures4_UNK10 0x00000400 +#define chipMinorFeatures4_TX_LERP_PRECISION_FIX 0x00000800 +#define chipMinorFeatures4_2D_COLOR_SPACE_CONVERSION 0x00001000 +#define chipMinorFeatures4_TEXTURE_ASTC 0x00002000 +#define chipMinorFeatures4_UNK14 0x00004000 +#define chipMinorFeatures4_UNK15 0x00008000 +#define chipMinorFeatures4_HALTI2 0x00010000 +#define chipMinorFeatures4_UNK17 0x00020000 +#define chipMinorFeatures4_SMALL_MSAA 0x00040000 +#define chipMinorFeatures4_UNK19 0x00080000 +#define chipMinorFeatures4_NEW_RA 0x00100000 +#define chipMinorFeatures4_2D_OPF_YUV_OUTPUT 0x00200000 +#define chipMinorFeatures4_2D_MULTI_SOURCE_BLT_EX2 0x00400000 +#define chipMinorFeatures4_NO_USER_CSC 0x00800000 +#define chipMinorFeatures4_ZFIXES 0x01000000 +#define chipMinorFeatures4_BUG_FIXES18 0x02000000 +#define chipMinorFeatures4_2D_COMPRESSION 0x04000000 +#define chipMinorFeatures4_PROBE 0x08000000 +#define chipMinorFeatures4_UNK28 0x10000000 +#define chipMinorFeatures4_2D_SUPER_TILE_VERSION 0x20000000 +#define chipMinorFeatures4_UNK30 0x40000000 +#define chipMinorFeatures4_UNK31 0x80000000 +#define chipMinorFeatures5_UNK0 0x00000001 +#define chipMinorFeatures5_UNK1 0x00000002 +#define chipMinorFeatures5_UNK2 0x00000004 +#define chipMinorFeatures5_UNK3 0x00000008 +#define chipMinorFeatures5_EEZ 0x00000010 +#define chipMinorFeatures5_UNK5 0x00000020 +#define chipMinorFeatures5_UNK6 0x00000040 +#define chipMinorFeatures5_UNK7 0x00000080 +#define chipMinorFeatures5_UNK8 0x00000100 +#define chipMinorFeatures5_HALTI3 0x00000200 +#define chipMinorFeatures5_UNK10 0x00000400 +#define chipMinorFeatures5_2D_ONE_PASS_FILTER_TAP 0x00000800 +#define chipMinorFeatures5_UNK12 0x00001000 +#define chipMinorFeatures5_SEPARATE_SRC_DST 0x00002000 +#define chipMinorFeatures5_HALTI4 0x00004000 +#define chipMinorFeatures5_UNK15 0x00008000 +#define chipMinorFeatures5_ANDROID_ONLY 0x00010000 +#define chipMinorFeatures5_HAS_PRODUCTID 0x00020000 +#define chipMinorFeatures5_UNK18 0x00040000 +#define chipMinorFeatures5_UNK19 0x00080000 +#define chipMinorFeatures5_PE_DITHER_FIX2 0x00100000 +#define chipMinorFeatures5_UNK21 0x00200000 +#define chipMinorFeatures5_UNK22 0x00400000 +#define chipMinorFeatures5_UNK23 0x00800000 +#define chipMinorFeatures5_UNK24 0x01000000 +#define chipMinorFeatures5_UNK25 0x02000000 +#define chipMinorFeatures5_UNK26 0x04000000 +#define chipMinorFeatures5_RS_DEPTHSTENCIL_NATIVE_SUPPORT 0x08000000 +#define chipMinorFeatures5_V2_MSAA_COMP_FIX 0x10000000 +#define chipMinorFeatures5_UNK29 0x20000000 +#define chipMinorFeatures5_UNK30 0x40000000 +#define chipMinorFeatures5_UNK31 0x80000000 + +#endif /* COMMON_XML */ diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/hw/isa.xml.h mesa-17.0.7/src/gallium/drivers/etnaviv/hw/isa.xml.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/hw/isa.xml.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/hw/isa.xml.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,239 @@ +#ifndef ISA_XML +#define ISA_XML + +/* Autogenerated file, DO NOT EDIT manually! + +This file was generated by the rules-ng-ng headergen tool in this git repository: +http://0x04.net/cgit/index.cgi/rules-ng-ng +git clone git://0x04.net/rules-ng-ng + +The rules-ng-ng source files this header was generated from are: +- isa.xml ( 24392 bytes, from 2016-11-16 18:54:37) +- copyright.xml ( 1597 bytes, from 2016-10-02 14:26:13) + +Copyright (C) 2012-2016 by the following authors: +- Wladimir J. van der Laan +- Christian Gmeiner +- Lucas Stach +- Russell King + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +the rights to use, copy, modify, merge, publish, distribute, sub license, +and/or sell copies of the Software, and to permit persons to whom the +Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the +next paragraph) shall be included in all copies or substantial portions +of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +DEALINGS IN THE SOFTWARE. +*/ + + +#define INST_OPCODE_NOP 0x00000000 +#define INST_OPCODE_ADD 0x00000001 +#define INST_OPCODE_MAD 0x00000002 +#define INST_OPCODE_MUL 0x00000003 +#define INST_OPCODE_DST 0x00000004 +#define INST_OPCODE_DP3 0x00000005 +#define INST_OPCODE_DP4 0x00000006 +#define INST_OPCODE_DSX 0x00000007 +#define INST_OPCODE_DSY 0x00000008 +#define INST_OPCODE_MOV 0x00000009 +#define INST_OPCODE_MOVAR 0x0000000a +#define INST_OPCODE_MOVAF 0x0000000b +#define INST_OPCODE_RCP 0x0000000c +#define INST_OPCODE_RSQ 0x0000000d +#define INST_OPCODE_LITP 0x0000000e +#define INST_OPCODE_SELECT 0x0000000f +#define INST_OPCODE_SET 0x00000010 +#define INST_OPCODE_EXP 0x00000011 +#define INST_OPCODE_LOG 0x00000012 +#define INST_OPCODE_FRC 0x00000013 +#define INST_OPCODE_CALL 0x00000014 +#define INST_OPCODE_RET 0x00000015 +#define INST_OPCODE_BRANCH 0x00000016 +#define INST_OPCODE_TEXKILL 0x00000017 +#define INST_OPCODE_TEXLD 0x00000018 +#define INST_OPCODE_TEXLDB 0x00000019 +#define INST_OPCODE_TEXLDD 0x0000001a +#define INST_OPCODE_TEXLDL 0x0000001b +#define INST_OPCODE_TEXLDPCF 0x0000001c +#define INST_OPCODE_REP 0x0000001d +#define INST_OPCODE_ENDREP 0x0000001e +#define INST_OPCODE_LOOP 0x0000001f +#define INST_OPCODE_ENDLOOP 0x00000020 +#define INST_OPCODE_SQRT 0x00000021 +#define INST_OPCODE_SIN 0x00000022 +#define INST_OPCODE_COS 0x00000023 +#define INST_OPCODE_FLOOR 0x00000025 +#define INST_OPCODE_CEIL 0x00000026 +#define INST_OPCODE_SIGN 0x00000027 +#define INST_OPCODE_I2F 0x0000002d +#define INST_OPCODE_CMP 0x00000031 +#define INST_OPCODE_LOAD 0x00000032 +#define INST_OPCODE_STORE 0x00000033 +#define INST_OPCODE_IMULLO0 0x0000003c +#define INST_OPCODE_IMULHI0 0x00000040 +#define INST_OPCODE_IMADLO0 0x0000004c +#define INST_OPCODE_LEADZERO 0x00000058 +#define INST_OPCODE_LSHIFT 0x00000059 +#define INST_OPCODE_RSHIFT 0x0000005a +#define INST_OPCODE_ROTATE 0x0000005b +#define INST_OPCODE_OR 0x0000005c +#define INST_OPCODE_AND 0x0000005d +#define INST_OPCODE_XOR 0x0000005e +#define INST_OPCODE_NOT 0x0000005f +#define INST_CONDITION_TRUE 0x00000000 +#define INST_CONDITION_GT 0x00000001 +#define INST_CONDITION_LT 0x00000002 +#define INST_CONDITION_GE 0x00000003 +#define INST_CONDITION_LE 0x00000004 +#define INST_CONDITION_EQ 0x00000005 +#define INST_CONDITION_NE 0x00000006 +#define INST_CONDITION_AND 0x00000007 +#define INST_CONDITION_OR 0x00000008 +#define INST_CONDITION_XOR 0x00000009 +#define INST_CONDITION_NOT 0x0000000a +#define INST_CONDITION_NZ 0x0000000b +#define INST_CONDITION_GEZ 0x0000000c +#define INST_CONDITION_GZ 0x0000000d +#define INST_CONDITION_LEZ 0x0000000e +#define INST_CONDITION_LZ 0x0000000f +#define INST_RGROUP_TEMP 0x00000000 +#define INST_RGROUP_INTERNAL 0x00000001 +#define INST_RGROUP_UNIFORM_0 0x00000002 +#define INST_RGROUP_UNIFORM_1 0x00000003 +#define INST_AMODE_DIRECT 0x00000000 +#define INST_AMODE_ADD_A_X 0x00000001 +#define INST_AMODE_ADD_A_Y 0x00000002 +#define INST_AMODE_ADD_A_Z 0x00000003 +#define INST_AMODE_ADD_A_W 0x00000004 +#define INST_SWIZ_COMP_X 0x00000000 +#define INST_SWIZ_COMP_Y 0x00000001 +#define INST_SWIZ_COMP_Z 0x00000002 +#define INST_SWIZ_COMP_W 0x00000003 +#define INST_TYPE_F32 0x00000000 +#define INST_TYPE_S32 0x00000001 +#define INST_TYPE_S8 0x00000002 +#define INST_TYPE_U16 0x00000003 +#define INST_TYPE_F16 0x00000004 +#define INST_TYPE_S16 0x00000005 +#define INST_TYPE_U32 0x00000006 +#define INST_TYPE_U8 0x00000007 +#define INST_COMPS_X 0x00000001 +#define INST_COMPS_Y 0x00000002 +#define INST_COMPS_Z 0x00000004 +#define INST_COMPS_W 0x00000008 +#define INST_SWIZ_X__MASK 0x00000003 +#define INST_SWIZ_X__SHIFT 0 +#define INST_SWIZ_X(x) (((x) << INST_SWIZ_X__SHIFT) & INST_SWIZ_X__MASK) +#define INST_SWIZ_Y__MASK 0x0000000c +#define INST_SWIZ_Y__SHIFT 2 +#define INST_SWIZ_Y(x) (((x) << INST_SWIZ_Y__SHIFT) & INST_SWIZ_Y__MASK) +#define INST_SWIZ_Z__MASK 0x00000030 +#define INST_SWIZ_Z__SHIFT 4 +#define INST_SWIZ_Z(x) (((x) << INST_SWIZ_Z__SHIFT) & INST_SWIZ_Z__MASK) +#define INST_SWIZ_W__MASK 0x000000c0 +#define INST_SWIZ_W__SHIFT 6 +#define INST_SWIZ_W(x) (((x) << INST_SWIZ_W__SHIFT) & INST_SWIZ_W__MASK) +#define VIV_ISA_WORD_0 0x00000000 +#define VIV_ISA_WORD_0_OPCODE__MASK 0x0000003f +#define VIV_ISA_WORD_0_OPCODE__SHIFT 0 +#define VIV_ISA_WORD_0_OPCODE(x) (((x) << VIV_ISA_WORD_0_OPCODE__SHIFT) & VIV_ISA_WORD_0_OPCODE__MASK) +#define VIV_ISA_WORD_0_COND__MASK 0x000007c0 +#define VIV_ISA_WORD_0_COND__SHIFT 6 +#define VIV_ISA_WORD_0_COND(x) (((x) << VIV_ISA_WORD_0_COND__SHIFT) & VIV_ISA_WORD_0_COND__MASK) +#define VIV_ISA_WORD_0_SAT 0x00000800 +#define VIV_ISA_WORD_0_DST_USE 0x00001000 +#define VIV_ISA_WORD_0_DST_AMODE__MASK 0x0000e000 +#define VIV_ISA_WORD_0_DST_AMODE__SHIFT 13 +#define VIV_ISA_WORD_0_DST_AMODE(x) (((x) << VIV_ISA_WORD_0_DST_AMODE__SHIFT) & VIV_ISA_WORD_0_DST_AMODE__MASK) +#define VIV_ISA_WORD_0_DST_REG__MASK 0x007f0000 +#define VIV_ISA_WORD_0_DST_REG__SHIFT 16 +#define VIV_ISA_WORD_0_DST_REG(x) (((x) << VIV_ISA_WORD_0_DST_REG__SHIFT) & VIV_ISA_WORD_0_DST_REG__MASK) +#define VIV_ISA_WORD_0_DST_COMPS__MASK 0x07800000 +#define VIV_ISA_WORD_0_DST_COMPS__SHIFT 23 +#define VIV_ISA_WORD_0_DST_COMPS(x) (((x) << VIV_ISA_WORD_0_DST_COMPS__SHIFT) & VIV_ISA_WORD_0_DST_COMPS__MASK) +#define VIV_ISA_WORD_0_TEX_ID__MASK 0xf8000000 +#define VIV_ISA_WORD_0_TEX_ID__SHIFT 27 +#define VIV_ISA_WORD_0_TEX_ID(x) (((x) << VIV_ISA_WORD_0_TEX_ID__SHIFT) & VIV_ISA_WORD_0_TEX_ID__MASK) + +#define VIV_ISA_WORD_1 0x00000004 +#define VIV_ISA_WORD_1_TEX_AMODE__MASK 0x00000007 +#define VIV_ISA_WORD_1_TEX_AMODE__SHIFT 0 +#define VIV_ISA_WORD_1_TEX_AMODE(x) (((x) << VIV_ISA_WORD_1_TEX_AMODE__SHIFT) & VIV_ISA_WORD_1_TEX_AMODE__MASK) +#define VIV_ISA_WORD_1_TEX_SWIZ__MASK 0x000007f8 +#define VIV_ISA_WORD_1_TEX_SWIZ__SHIFT 3 +#define VIV_ISA_WORD_1_TEX_SWIZ(x) (((x) << VIV_ISA_WORD_1_TEX_SWIZ__SHIFT) & VIV_ISA_WORD_1_TEX_SWIZ__MASK) +#define VIV_ISA_WORD_1_SRC0_USE 0x00000800 +#define VIV_ISA_WORD_1_SRC0_REG__MASK 0x001ff000 +#define VIV_ISA_WORD_1_SRC0_REG__SHIFT 12 +#define VIV_ISA_WORD_1_SRC0_REG(x) (((x) << VIV_ISA_WORD_1_SRC0_REG__SHIFT) & VIV_ISA_WORD_1_SRC0_REG__MASK) +#define VIV_ISA_WORD_1_TYPE_BIT2 0x00200000 +#define VIV_ISA_WORD_1_SRC0_SWIZ__MASK 0x3fc00000 +#define VIV_ISA_WORD_1_SRC0_SWIZ__SHIFT 22 +#define VIV_ISA_WORD_1_SRC0_SWIZ(x) (((x) << VIV_ISA_WORD_1_SRC0_SWIZ__SHIFT) & VIV_ISA_WORD_1_SRC0_SWIZ__MASK) +#define VIV_ISA_WORD_1_SRC0_NEG 0x40000000 +#define VIV_ISA_WORD_1_SRC0_ABS 0x80000000 + +#define VIV_ISA_WORD_2 0x00000008 +#define VIV_ISA_WORD_2_SRC0_AMODE__MASK 0x00000007 +#define VIV_ISA_WORD_2_SRC0_AMODE__SHIFT 0 +#define VIV_ISA_WORD_2_SRC0_AMODE(x) (((x) << VIV_ISA_WORD_2_SRC0_AMODE__SHIFT) & VIV_ISA_WORD_2_SRC0_AMODE__MASK) +#define VIV_ISA_WORD_2_SRC0_RGROUP__MASK 0x00000038 +#define VIV_ISA_WORD_2_SRC0_RGROUP__SHIFT 3 +#define VIV_ISA_WORD_2_SRC0_RGROUP(x) (((x) << VIV_ISA_WORD_2_SRC0_RGROUP__SHIFT) & VIV_ISA_WORD_2_SRC0_RGROUP__MASK) +#define VIV_ISA_WORD_2_SRC1_USE 0x00000040 +#define VIV_ISA_WORD_2_SRC1_REG__MASK 0x0000ff80 +#define VIV_ISA_WORD_2_SRC1_REG__SHIFT 7 +#define VIV_ISA_WORD_2_SRC1_REG(x) (((x) << VIV_ISA_WORD_2_SRC1_REG__SHIFT) & VIV_ISA_WORD_2_SRC1_REG__MASK) +#define VIV_ISA_WORD_2_OPCODE_BIT6 0x00010000 +#define VIV_ISA_WORD_2_SRC1_SWIZ__MASK 0x01fe0000 +#define VIV_ISA_WORD_2_SRC1_SWIZ__SHIFT 17 +#define VIV_ISA_WORD_2_SRC1_SWIZ(x) (((x) << VIV_ISA_WORD_2_SRC1_SWIZ__SHIFT) & VIV_ISA_WORD_2_SRC1_SWIZ__MASK) +#define VIV_ISA_WORD_2_SRC1_NEG 0x02000000 +#define VIV_ISA_WORD_2_SRC1_ABS 0x04000000 +#define VIV_ISA_WORD_2_SRC1_AMODE__MASK 0x38000000 +#define VIV_ISA_WORD_2_SRC1_AMODE__SHIFT 27 +#define VIV_ISA_WORD_2_SRC1_AMODE(x) (((x) << VIV_ISA_WORD_2_SRC1_AMODE__SHIFT) & VIV_ISA_WORD_2_SRC1_AMODE__MASK) +#define VIV_ISA_WORD_2_TYPE_BIT01__MASK 0xc0000000 +#define VIV_ISA_WORD_2_TYPE_BIT01__SHIFT 30 +#define VIV_ISA_WORD_2_TYPE_BIT01(x) (((x) << VIV_ISA_WORD_2_TYPE_BIT01__SHIFT) & VIV_ISA_WORD_2_TYPE_BIT01__MASK) + +#define VIV_ISA_WORD_3 0x0000000c +#define VIV_ISA_WORD_3_SRC1_RGROUP__MASK 0x00000007 +#define VIV_ISA_WORD_3_SRC1_RGROUP__SHIFT 0 +#define VIV_ISA_WORD_3_SRC1_RGROUP(x) (((x) << VIV_ISA_WORD_3_SRC1_RGROUP__SHIFT) & VIV_ISA_WORD_3_SRC1_RGROUP__MASK) +#define VIV_ISA_WORD_3_SRC2_IMM__MASK 0x003fff80 +#define VIV_ISA_WORD_3_SRC2_IMM__SHIFT 7 +#define VIV_ISA_WORD_3_SRC2_IMM(x) (((x) << VIV_ISA_WORD_3_SRC2_IMM__SHIFT) & VIV_ISA_WORD_3_SRC2_IMM__MASK) +#define VIV_ISA_WORD_3_SRC2_USE 0x00000008 +#define VIV_ISA_WORD_3_SRC2_REG__MASK 0x00001ff0 +#define VIV_ISA_WORD_3_SRC2_REG__SHIFT 4 +#define VIV_ISA_WORD_3_SRC2_REG(x) (((x) << VIV_ISA_WORD_3_SRC2_REG__SHIFT) & VIV_ISA_WORD_3_SRC2_REG__MASK) +#define VIV_ISA_WORD_3_UNK3_13 0x00002000 +#define VIV_ISA_WORD_3_SRC2_SWIZ__MASK 0x003fc000 +#define VIV_ISA_WORD_3_SRC2_SWIZ__SHIFT 14 +#define VIV_ISA_WORD_3_SRC2_SWIZ(x) (((x) << VIV_ISA_WORD_3_SRC2_SWIZ__SHIFT) & VIV_ISA_WORD_3_SRC2_SWIZ__MASK) +#define VIV_ISA_WORD_3_SRC2_NEG 0x00400000 +#define VIV_ISA_WORD_3_SRC2_ABS 0x00800000 +#define VIV_ISA_WORD_3_UNK3_24 0x01000000 +#define VIV_ISA_WORD_3_SRC2_AMODE__MASK 0x0e000000 +#define VIV_ISA_WORD_3_SRC2_AMODE__SHIFT 25 +#define VIV_ISA_WORD_3_SRC2_AMODE(x) (((x) << VIV_ISA_WORD_3_SRC2_AMODE__SHIFT) & VIV_ISA_WORD_3_SRC2_AMODE__MASK) +#define VIV_ISA_WORD_3_SRC2_RGROUP__MASK 0x70000000 +#define VIV_ISA_WORD_3_SRC2_RGROUP__SHIFT 28 +#define VIV_ISA_WORD_3_SRC2_RGROUP(x) (((x) << VIV_ISA_WORD_3_SRC2_RGROUP__SHIFT) & VIV_ISA_WORD_3_SRC2_RGROUP__MASK) +#define VIV_ISA_WORD_3_UNK3_31 0x80000000 + + +#endif /* ISA_XML */ diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/hw/state_3d.xml.h mesa-17.0.7/src/gallium/drivers/etnaviv/hw/state_3d.xml.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/hw/state_3d.xml.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/hw/state_3d.xml.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,1231 @@ +#ifndef STATE_3D_XML +#define STATE_3D_XML + +/* Autogenerated file, DO NOT EDIT manually! + +This file was generated by the rules-ng-ng headergen tool in this git repository: +http://0x04.net/cgit/index.cgi/rules-ng-ng +git clone git://0x04.net/rules-ng-ng + +The rules-ng-ng source files this header was generated from are: +- state.xml ( 19792 bytes, from 2016-11-16 18:54:37) +- common.xml ( 23422 bytes, from 2016-11-16 18:54:37) +- state_hi.xml ( 25653 bytes, from 2016-10-02 14:26:13) +- copyright.xml ( 1597 bytes, from 2016-10-02 14:26:13) +- state_2d.xml ( 51552 bytes, from 2016-10-02 14:26:13) +- state_3d.xml ( 57579 bytes, from 2016-11-16 18:54:37) +- state_vg.xml ( 5975 bytes, from 2016-10-02 14:26:13) + +Copyright (C) 2012-2016 by the following authors: +- Wladimir J. van der Laan +- Christian Gmeiner +- Lucas Stach +- Russell King + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +the rights to use, copy, modify, merge, publish, distribute, sub license, +and/or sell copies of the Software, and to permit persons to whom the +Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the +next paragraph) shall be included in all copies or substantial portions +of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +DEALINGS IN THE SOFTWARE. +*/ + + +#define COMPARE_FUNC_NEVER 0x00000000 +#define COMPARE_FUNC_LESS 0x00000001 +#define COMPARE_FUNC_EQUAL 0x00000002 +#define COMPARE_FUNC_LEQUAL 0x00000003 +#define COMPARE_FUNC_GREATER 0x00000004 +#define COMPARE_FUNC_NOTEQUAL 0x00000005 +#define COMPARE_FUNC_GEQUAL 0x00000006 +#define COMPARE_FUNC_ALWAYS 0x00000007 +#define STENCIL_OP_KEEP 0x00000000 +#define STENCIL_OP_ZERO 0x00000001 +#define STENCIL_OP_REPLACE 0x00000002 +#define STENCIL_OP_INCR 0x00000003 +#define STENCIL_OP_DECR 0x00000004 +#define STENCIL_OP_INVERT 0x00000005 +#define STENCIL_OP_INCR_WRAP 0x00000006 +#define STENCIL_OP_DECR_WRAP 0x00000007 +#define BLEND_EQ_ADD 0x00000000 +#define BLEND_EQ_SUBTRACT 0x00000001 +#define BLEND_EQ_REVERSE_SUBTRACT 0x00000002 +#define BLEND_EQ_MIN 0x00000003 +#define BLEND_EQ_MAX 0x00000004 +#define BLEND_FUNC_ZERO 0x00000000 +#define BLEND_FUNC_ONE 0x00000001 +#define BLEND_FUNC_SRC_COLOR 0x00000002 +#define BLEND_FUNC_ONE_MINUS_SRC_COLOR 0x00000003 +#define BLEND_FUNC_SRC_ALPHA 0x00000004 +#define BLEND_FUNC_ONE_MINUS_SRC_ALPHA 0x00000005 +#define BLEND_FUNC_DST_ALPHA 0x00000006 +#define BLEND_FUNC_ONE_MINUS_DST_ALPHA 0x00000007 +#define BLEND_FUNC_DST_COLOR 0x00000008 +#define BLEND_FUNC_ONE_MINUS_DST_COLOR 0x00000009 +#define BLEND_FUNC_SRC_ALPHA_SATURATE 0x0000000a +#define BLEND_FUNC_CONSTANT_ALPHA 0x0000000b +#define BLEND_FUNC_ONE_MINUS_CONSTANT_ALPHA 0x0000000c +#define BLEND_FUNC_CONSTANT_COLOR 0x0000000d +#define BLEND_FUNC_ONE_MINUS_CONSTANT_COLOR 0x0000000e +#define RS_FORMAT_X4R4G4B4 0x00000000 +#define RS_FORMAT_A4R4G4B4 0x00000001 +#define RS_FORMAT_X1R5G5B5 0x00000002 +#define RS_FORMAT_A1R5G5B5 0x00000003 +#define RS_FORMAT_R5G6B5 0x00000004 +#define RS_FORMAT_X8R8G8B8 0x00000005 +#define RS_FORMAT_A8R8G8B8 0x00000006 +#define RS_FORMAT_YUY2 0x00000007 +#define TEXTURE_FORMAT_NONE 0x00000000 +#define TEXTURE_FORMAT_A8 0x00000001 +#define TEXTURE_FORMAT_L8 0x00000002 +#define TEXTURE_FORMAT_I8 0x00000003 +#define TEXTURE_FORMAT_A8L8 0x00000004 +#define TEXTURE_FORMAT_A4R4G4B4 0x00000005 +#define TEXTURE_FORMAT_X4R4G4B4 0x00000006 +#define TEXTURE_FORMAT_A8R8G8B8 0x00000007 +#define TEXTURE_FORMAT_X8R8G8B8 0x00000008 +#define TEXTURE_FORMAT_A8B8G8R8 0x00000009 +#define TEXTURE_FORMAT_X8B8G8R8 0x0000000a +#define TEXTURE_FORMAT_R5G6B5 0x0000000b +#define TEXTURE_FORMAT_A1R5G5B5 0x0000000c +#define TEXTURE_FORMAT_X1R5G5B5 0x0000000d +#define TEXTURE_FORMAT_YUY2 0x0000000e +#define TEXTURE_FORMAT_UYVY 0x0000000f +#define TEXTURE_FORMAT_D16 0x00000010 +#define TEXTURE_FORMAT_D24S8 0x00000011 +#define TEXTURE_FORMAT_DXT1 0x00000013 +#define TEXTURE_FORMAT_DXT2_DXT3 0x00000014 +#define TEXTURE_FORMAT_DXT4_DXT5 0x00000015 +#define TEXTURE_FORMAT_ETC1 0x0000001e +#define TEXTURE_FORMAT_EXT_NONE 0x00000000 +#define TEXTURE_FORMAT_EXT_A16F 0x00000007 +#define TEXTURE_FORMAT_EXT_A16L16F 0x00000008 +#define TEXTURE_FORMAT_EXT_A16B16G16R16F 0x00000009 +#define TEXTURE_FORMAT_EXT_A32F 0x0000000a +#define TEXTURE_FORMAT_EXT_A32L32F 0x0000000b +#define TEXTURE_FORMAT_EXT_A2B10G10R10 0x0000000c +#define TEXTURE_FILTER_NONE 0x00000000 +#define TEXTURE_FILTER_NEAREST 0x00000001 +#define TEXTURE_FILTER_LINEAR 0x00000002 +#define TEXTURE_FILTER_ANISOTROPIC 0x00000003 +#define TEXTURE_TYPE_NONE 0x00000000 +#define TEXTURE_TYPE_2D 0x00000002 +#define TEXTURE_TYPE_CUBE_MAP 0x00000005 +#define TEXTURE_WRAPMODE_REPEAT 0x00000000 +#define TEXTURE_WRAPMODE_MIRRORED_REPEAT 0x00000001 +#define TEXTURE_WRAPMODE_CLAMP_TO_EDGE 0x00000002 +#define TEXTURE_FACE_POS_X 0x00000000 +#define TEXTURE_FACE_NEG_X 0x00000001 +#define TEXTURE_FACE_POS_Y 0x00000002 +#define TEXTURE_FACE_NEG_Y 0x00000003 +#define TEXTURE_FACE_POS_Z 0x00000004 +#define TEXTURE_FACE_NEG_Z 0x00000005 +#define TEXTURE_SWIZZLE_RED 0x00000000 +#define TEXTURE_SWIZZLE_GREEN 0x00000001 +#define TEXTURE_SWIZZLE_BLUE 0x00000002 +#define TEXTURE_SWIZZLE_ALPHA 0x00000003 +#define TEXTURE_SWIZZLE_ZERO 0x00000004 +#define TEXTURE_SWIZZLE_ONE 0x00000005 +#define TEXTURE_HALIGN_FOUR 0x00000000 +#define TEXTURE_HALIGN_SIXTEEN 0x00000001 +#define TEXTURE_HALIGN_SUPER_TILED 0x00000002 +#define TEXTURE_HALIGN_SPLIT_TILED 0x00000003 +#define TEXTURE_HALIGN_SPLIT_SUPER_TILED 0x00000004 +#define LOGIC_OP_CLEAR 0x00000000 +#define LOGIC_OP_NOR 0x00000001 +#define LOGIC_OP_AND_INVERTED 0x00000002 +#define LOGIC_OP_COPY_INVERTED 0x00000003 +#define LOGIC_OP_AND_REVERSE 0x00000004 +#define LOGIC_OP_INVERT 0x00000005 +#define LOGIC_OP_XOR 0x00000006 +#define LOGIC_OP_NAND 0x00000007 +#define LOGIC_OP_AND 0x00000008 +#define LOGIC_OP_EQUIV 0x00000009 +#define LOGIC_OP_NOOP 0x0000000a +#define LOGIC_OP_OR_INVERTED 0x0000000b +#define LOGIC_OP_COPY 0x0000000c +#define LOGIC_OP_OR_REVERSE 0x0000000d +#define LOGIC_OP_OR 0x0000000e +#define LOGIC_OP_SET 0x0000000f +#define VIVS_VS 0x00000000 + +#define VIVS_VS_END_PC 0x00000800 + +#define VIVS_VS_OUTPUT_COUNT 0x00000804 + +#define VIVS_VS_INPUT_COUNT 0x00000808 +#define VIVS_VS_INPUT_COUNT_COUNT__MASK 0x0000000f +#define VIVS_VS_INPUT_COUNT_COUNT__SHIFT 0 +#define VIVS_VS_INPUT_COUNT_COUNT(x) (((x) << VIVS_VS_INPUT_COUNT_COUNT__SHIFT) & VIVS_VS_INPUT_COUNT_COUNT__MASK) +#define VIVS_VS_INPUT_COUNT_UNK8__MASK 0x00001f00 +#define VIVS_VS_INPUT_COUNT_UNK8__SHIFT 8 +#define VIVS_VS_INPUT_COUNT_UNK8(x) (((x) << VIVS_VS_INPUT_COUNT_UNK8__SHIFT) & VIVS_VS_INPUT_COUNT_UNK8__MASK) + +#define VIVS_VS_TEMP_REGISTER_CONTROL 0x0000080c +#define VIVS_VS_TEMP_REGISTER_CONTROL_NUM_TEMPS__MASK 0x0000003f +#define VIVS_VS_TEMP_REGISTER_CONTROL_NUM_TEMPS__SHIFT 0 +#define VIVS_VS_TEMP_REGISTER_CONTROL_NUM_TEMPS(x) (((x) << VIVS_VS_TEMP_REGISTER_CONTROL_NUM_TEMPS__SHIFT) & VIVS_VS_TEMP_REGISTER_CONTROL_NUM_TEMPS__MASK) + +#define VIVS_VS_OUTPUT(i0) (0x00000810 + 0x4*(i0)) +#define VIVS_VS_OUTPUT__ESIZE 0x00000004 +#define VIVS_VS_OUTPUT__LEN 0x00000004 +#define VIVS_VS_OUTPUT_O0__MASK 0x000000ff +#define VIVS_VS_OUTPUT_O0__SHIFT 0 +#define VIVS_VS_OUTPUT_O0(x) (((x) << VIVS_VS_OUTPUT_O0__SHIFT) & VIVS_VS_OUTPUT_O0__MASK) +#define VIVS_VS_OUTPUT_O1__MASK 0x0000ff00 +#define VIVS_VS_OUTPUT_O1__SHIFT 8 +#define VIVS_VS_OUTPUT_O1(x) (((x) << VIVS_VS_OUTPUT_O1__SHIFT) & VIVS_VS_OUTPUT_O1__MASK) +#define VIVS_VS_OUTPUT_O2__MASK 0x00ff0000 +#define VIVS_VS_OUTPUT_O2__SHIFT 16 +#define VIVS_VS_OUTPUT_O2(x) (((x) << VIVS_VS_OUTPUT_O2__SHIFT) & VIVS_VS_OUTPUT_O2__MASK) +#define VIVS_VS_OUTPUT_O3__MASK 0xff000000 +#define VIVS_VS_OUTPUT_O3__SHIFT 24 +#define VIVS_VS_OUTPUT_O3(x) (((x) << VIVS_VS_OUTPUT_O3__SHIFT) & VIVS_VS_OUTPUT_O3__MASK) + +#define VIVS_VS_INPUT(i0) (0x00000820 + 0x4*(i0)) +#define VIVS_VS_INPUT__ESIZE 0x00000004 +#define VIVS_VS_INPUT__LEN 0x00000004 +#define VIVS_VS_INPUT_I0__MASK 0x000000ff +#define VIVS_VS_INPUT_I0__SHIFT 0 +#define VIVS_VS_INPUT_I0(x) (((x) << VIVS_VS_INPUT_I0__SHIFT) & VIVS_VS_INPUT_I0__MASK) +#define VIVS_VS_INPUT_I1__MASK 0x0000ff00 +#define VIVS_VS_INPUT_I1__SHIFT 8 +#define VIVS_VS_INPUT_I1(x) (((x) << VIVS_VS_INPUT_I1__SHIFT) & VIVS_VS_INPUT_I1__MASK) +#define VIVS_VS_INPUT_I2__MASK 0x00ff0000 +#define VIVS_VS_INPUT_I2__SHIFT 16 +#define VIVS_VS_INPUT_I2(x) (((x) << VIVS_VS_INPUT_I2__SHIFT) & VIVS_VS_INPUT_I2__MASK) +#define VIVS_VS_INPUT_I3__MASK 0xff000000 +#define VIVS_VS_INPUT_I3__SHIFT 24 +#define VIVS_VS_INPUT_I3(x) (((x) << VIVS_VS_INPUT_I3__SHIFT) & VIVS_VS_INPUT_I3__MASK) + +#define VIVS_VS_LOAD_BALANCING 0x00000830 +#define VIVS_VS_LOAD_BALANCING_A__MASK 0x000000ff +#define VIVS_VS_LOAD_BALANCING_A__SHIFT 0 +#define VIVS_VS_LOAD_BALANCING_A(x) (((x) << VIVS_VS_LOAD_BALANCING_A__SHIFT) & VIVS_VS_LOAD_BALANCING_A__MASK) +#define VIVS_VS_LOAD_BALANCING_B__MASK 0x0000ff00 +#define VIVS_VS_LOAD_BALANCING_B__SHIFT 8 +#define VIVS_VS_LOAD_BALANCING_B(x) (((x) << VIVS_VS_LOAD_BALANCING_B__SHIFT) & VIVS_VS_LOAD_BALANCING_B__MASK) +#define VIVS_VS_LOAD_BALANCING_C__MASK 0x00ff0000 +#define VIVS_VS_LOAD_BALANCING_C__SHIFT 16 +#define VIVS_VS_LOAD_BALANCING_C(x) (((x) << VIVS_VS_LOAD_BALANCING_C__SHIFT) & VIVS_VS_LOAD_BALANCING_C__MASK) +#define VIVS_VS_LOAD_BALANCING_D__MASK 0xff000000 +#define VIVS_VS_LOAD_BALANCING_D__SHIFT 24 +#define VIVS_VS_LOAD_BALANCING_D(x) (((x) << VIVS_VS_LOAD_BALANCING_D__SHIFT) & VIVS_VS_LOAD_BALANCING_D__MASK) + +#define VIVS_VS_PERF_COUNTER 0x00000834 + +#define VIVS_VS_START_PC 0x00000838 + +#define VIVS_VS_UNK00850 0x00000850 + +#define VIVS_VS_UNK00854 0x00000854 + +#define VIVS_VS_UNK00858 0x00000858 + +#define VIVS_VS_RANGE 0x0000085c +#define VIVS_VS_RANGE_LOW__MASK 0x0000ffff +#define VIVS_VS_RANGE_LOW__SHIFT 0 +#define VIVS_VS_RANGE_LOW(x) (((x) << VIVS_VS_RANGE_LOW__SHIFT) & VIVS_VS_RANGE_LOW__MASK) +#define VIVS_VS_RANGE_HIGH__MASK 0xffff0000 +#define VIVS_VS_RANGE_HIGH__SHIFT 16 +#define VIVS_VS_RANGE_HIGH(x) (((x) << VIVS_VS_RANGE_HIGH__SHIFT) & VIVS_VS_RANGE_HIGH__MASK) + +#define VIVS_VS_NEW_UNK00860 0x00000860 + +#define VIVS_VS_UNK00864 0x00000864 + +#define VIVS_VS_UNK00868 0x00000868 + +#define VIVS_VS_UNK0086C 0x0000086c + +#define VIVS_VS_INST_MEM(i0) (0x00004000 + 0x4*(i0)) +#define VIVS_VS_INST_MEM__ESIZE 0x00000004 +#define VIVS_VS_INST_MEM__LEN 0x00000400 + +#define VIVS_VS_UNIFORMS(i0) (0x00005000 + 0x4*(i0)) +#define VIVS_VS_UNIFORMS__ESIZE 0x00000004 +#define VIVS_VS_UNIFORMS__LEN 0x00000400 + +#define VIVS_CL 0x00000000 + +#define VIVS_CL_CONFIG 0x00000900 +#define VIVS_CL_CONFIG_DIMENSIONS__MASK 0x00000003 +#define VIVS_CL_CONFIG_DIMENSIONS__SHIFT 0 +#define VIVS_CL_CONFIG_DIMENSIONS(x) (((x) << VIVS_CL_CONFIG_DIMENSIONS__SHIFT) & VIVS_CL_CONFIG_DIMENSIONS__MASK) +#define VIVS_CL_CONFIG_TRAVERSE_ORDER__MASK 0x00000070 +#define VIVS_CL_CONFIG_TRAVERSE_ORDER__SHIFT 4 +#define VIVS_CL_CONFIG_TRAVERSE_ORDER(x) (((x) << VIVS_CL_CONFIG_TRAVERSE_ORDER__SHIFT) & VIVS_CL_CONFIG_TRAVERSE_ORDER__MASK) +#define VIVS_CL_CONFIG_ENABLE_SWATH_X 0x00000100 +#define VIVS_CL_CONFIG_ENABLE_SWATH_Y 0x00000200 +#define VIVS_CL_CONFIG_ENABLE_SWATH_Z 0x00000400 +#define VIVS_CL_CONFIG_SWATH_SIZE_X__MASK 0x0000f000 +#define VIVS_CL_CONFIG_SWATH_SIZE_X__SHIFT 12 +#define VIVS_CL_CONFIG_SWATH_SIZE_X(x) (((x) << VIVS_CL_CONFIG_SWATH_SIZE_X__SHIFT) & VIVS_CL_CONFIG_SWATH_SIZE_X__MASK) +#define VIVS_CL_CONFIG_SWATH_SIZE_Y__MASK 0x000f0000 +#define VIVS_CL_CONFIG_SWATH_SIZE_Y__SHIFT 16 +#define VIVS_CL_CONFIG_SWATH_SIZE_Y(x) (((x) << VIVS_CL_CONFIG_SWATH_SIZE_Y__SHIFT) & VIVS_CL_CONFIG_SWATH_SIZE_Y__MASK) +#define VIVS_CL_CONFIG_SWATH_SIZE_Z__MASK 0x00f00000 +#define VIVS_CL_CONFIG_SWATH_SIZE_Z__SHIFT 20 +#define VIVS_CL_CONFIG_SWATH_SIZE_Z(x) (((x) << VIVS_CL_CONFIG_SWATH_SIZE_Z__SHIFT) & VIVS_CL_CONFIG_SWATH_SIZE_Z__MASK) +#define VIVS_CL_CONFIG_VALUE_ORDER__MASK 0x07000000 +#define VIVS_CL_CONFIG_VALUE_ORDER__SHIFT 24 +#define VIVS_CL_CONFIG_VALUE_ORDER(x) (((x) << VIVS_CL_CONFIG_VALUE_ORDER__SHIFT) & VIVS_CL_CONFIG_VALUE_ORDER__MASK) + +#define VIVS_CL_GLOBAL_X 0x00000904 +#define VIVS_CL_GLOBAL_X_SIZE__MASK 0x0000ffff +#define VIVS_CL_GLOBAL_X_SIZE__SHIFT 0 +#define VIVS_CL_GLOBAL_X_SIZE(x) (((x) << VIVS_CL_GLOBAL_X_SIZE__SHIFT) & VIVS_CL_GLOBAL_X_SIZE__MASK) +#define VIVS_CL_GLOBAL_X_OFFSET__MASK 0xffff0000 +#define VIVS_CL_GLOBAL_X_OFFSET__SHIFT 16 +#define VIVS_CL_GLOBAL_X_OFFSET(x) (((x) << VIVS_CL_GLOBAL_X_OFFSET__SHIFT) & VIVS_CL_GLOBAL_X_OFFSET__MASK) + +#define VIVS_CL_GLOBAL_Y 0x00000908 +#define VIVS_CL_GLOBAL_Y_SIZE__MASK 0x0000ffff +#define VIVS_CL_GLOBAL_Y_SIZE__SHIFT 0 +#define VIVS_CL_GLOBAL_Y_SIZE(x) (((x) << VIVS_CL_GLOBAL_Y_SIZE__SHIFT) & VIVS_CL_GLOBAL_Y_SIZE__MASK) +#define VIVS_CL_GLOBAL_Y_OFFSET__MASK 0xffff0000 +#define VIVS_CL_GLOBAL_Y_OFFSET__SHIFT 16 +#define VIVS_CL_GLOBAL_Y_OFFSET(x) (((x) << VIVS_CL_GLOBAL_Y_OFFSET__SHIFT) & VIVS_CL_GLOBAL_Y_OFFSET__MASK) + +#define VIVS_CL_GLOBAL_Z 0x0000090c +#define VIVS_CL_GLOBAL_Z_SIZE__MASK 0x0000ffff +#define VIVS_CL_GLOBAL_Z_SIZE__SHIFT 0 +#define VIVS_CL_GLOBAL_Z_SIZE(x) (((x) << VIVS_CL_GLOBAL_Z_SIZE__SHIFT) & VIVS_CL_GLOBAL_Z_SIZE__MASK) +#define VIVS_CL_GLOBAL_Z_OFFSET__MASK 0xffff0000 +#define VIVS_CL_GLOBAL_Z_OFFSET__SHIFT 16 +#define VIVS_CL_GLOBAL_Z_OFFSET(x) (((x) << VIVS_CL_GLOBAL_Z_OFFSET__SHIFT) & VIVS_CL_GLOBAL_Z_OFFSET__MASK) + +#define VIVS_CL_WORKGROUP_X 0x00000910 +#define VIVS_CL_WORKGROUP_X_SIZE__MASK 0x000003ff +#define VIVS_CL_WORKGROUP_X_SIZE__SHIFT 0 +#define VIVS_CL_WORKGROUP_X_SIZE(x) (((x) << VIVS_CL_WORKGROUP_X_SIZE__SHIFT) & VIVS_CL_WORKGROUP_X_SIZE__MASK) +#define VIVS_CL_WORKGROUP_X_COUNT__MASK 0xffff0000 +#define VIVS_CL_WORKGROUP_X_COUNT__SHIFT 16 +#define VIVS_CL_WORKGROUP_X_COUNT(x) (((x) << VIVS_CL_WORKGROUP_X_COUNT__SHIFT) & VIVS_CL_WORKGROUP_X_COUNT__MASK) + +#define VIVS_CL_WORKGROUP_Y 0x00000914 +#define VIVS_CL_WORKGROUP_Y_SIZE__MASK 0x000003ff +#define VIVS_CL_WORKGROUP_Y_SIZE__SHIFT 0 +#define VIVS_CL_WORKGROUP_Y_SIZE(x) (((x) << VIVS_CL_WORKGROUP_Y_SIZE__SHIFT) & VIVS_CL_WORKGROUP_Y_SIZE__MASK) +#define VIVS_CL_WORKGROUP_Y_COUNT__MASK 0xffff0000 +#define VIVS_CL_WORKGROUP_Y_COUNT__SHIFT 16 +#define VIVS_CL_WORKGROUP_Y_COUNT(x) (((x) << VIVS_CL_WORKGROUP_Y_COUNT__SHIFT) & VIVS_CL_WORKGROUP_Y_COUNT__MASK) + +#define VIVS_CL_WORKGROUP_Z 0x00000918 +#define VIVS_CL_WORKGROUP_Z_SIZE__MASK 0x000003ff +#define VIVS_CL_WORKGROUP_Z_SIZE__SHIFT 0 +#define VIVS_CL_WORKGROUP_Z_SIZE(x) (((x) << VIVS_CL_WORKGROUP_Z_SIZE__SHIFT) & VIVS_CL_WORKGROUP_Z_SIZE__MASK) +#define VIVS_CL_WORKGROUP_Z_COUNT__MASK 0xffff0000 +#define VIVS_CL_WORKGROUP_Z_COUNT__SHIFT 16 +#define VIVS_CL_WORKGROUP_Z_COUNT(x) (((x) << VIVS_CL_WORKGROUP_Z_COUNT__SHIFT) & VIVS_CL_WORKGROUP_Z_COUNT__MASK) + +#define VIVS_CL_THREAD_ALLOCATION 0x0000091c + +#define VIVS_CL_KICKER 0x00000920 + +#define VIVS_CL_UNK00924 0x00000924 + +#define VIVS_PA 0x00000000 + +#define VIVS_PA_VIEWPORT_SCALE_X 0x00000a00 + +#define VIVS_PA_VIEWPORT_SCALE_Y 0x00000a04 + +#define VIVS_PA_VIEWPORT_SCALE_Z 0x00000a08 + +#define VIVS_PA_VIEWPORT_OFFSET_X 0x00000a0c + +#define VIVS_PA_VIEWPORT_OFFSET_Y 0x00000a10 + +#define VIVS_PA_VIEWPORT_OFFSET_Z 0x00000a14 + +#define VIVS_PA_LINE_WIDTH 0x00000a18 + +#define VIVS_PA_POINT_SIZE 0x00000a1c + +#define VIVS_PA_SYSTEM_MODE 0x00000a28 +#define VIVS_PA_SYSTEM_MODE_UNK0 0x00000001 +#define VIVS_PA_SYSTEM_MODE_UNK4 0x00000010 + +#define VIVS_PA_W_CLIP_LIMIT 0x00000a2c + +#define VIVS_PA_ATTRIBUTE_ELEMENT_COUNT 0x00000a30 +#define VIVS_PA_ATTRIBUTE_ELEMENT_COUNT_UNK0__MASK 0x000000ff +#define VIVS_PA_ATTRIBUTE_ELEMENT_COUNT_UNK0__SHIFT 0 +#define VIVS_PA_ATTRIBUTE_ELEMENT_COUNT_UNK0(x) (((x) << VIVS_PA_ATTRIBUTE_ELEMENT_COUNT_UNK0__SHIFT) & VIVS_PA_ATTRIBUTE_ELEMENT_COUNT_UNK0__MASK) +#define VIVS_PA_ATTRIBUTE_ELEMENT_COUNT_COUNT__MASK 0x0000ff00 +#define VIVS_PA_ATTRIBUTE_ELEMENT_COUNT_COUNT__SHIFT 8 +#define VIVS_PA_ATTRIBUTE_ELEMENT_COUNT_COUNT(x) (((x) << VIVS_PA_ATTRIBUTE_ELEMENT_COUNT_COUNT__SHIFT) & VIVS_PA_ATTRIBUTE_ELEMENT_COUNT_COUNT__MASK) + +#define VIVS_PA_CONFIG 0x00000a34 +#define VIVS_PA_CONFIG_POINT_SIZE_ENABLE 0x00000004 +#define VIVS_PA_CONFIG_POINT_SIZE_ENABLE_MASK 0x00000008 +#define VIVS_PA_CONFIG_POINT_SPRITE_ENABLE 0x00000010 +#define VIVS_PA_CONFIG_POINT_SPRITE_ENABLE_MASK 0x00000020 +#define VIVS_PA_CONFIG_CULL_FACE_MODE__MASK 0x00000300 +#define VIVS_PA_CONFIG_CULL_FACE_MODE__SHIFT 8 +#define VIVS_PA_CONFIG_CULL_FACE_MODE_OFF 0x00000000 +#define VIVS_PA_CONFIG_CULL_FACE_MODE_CW 0x00000100 +#define VIVS_PA_CONFIG_CULL_FACE_MODE_CCW 0x00000200 +#define VIVS_PA_CONFIG_CULL_FACE_MODE_MASK 0x00000400 +#define VIVS_PA_CONFIG_FILL_MODE__MASK 0x00003000 +#define VIVS_PA_CONFIG_FILL_MODE__SHIFT 12 +#define VIVS_PA_CONFIG_FILL_MODE_POINT 0x00000000 +#define VIVS_PA_CONFIG_FILL_MODE_WIREFRAME 0x00001000 +#define VIVS_PA_CONFIG_FILL_MODE_SOLID 0x00002000 +#define VIVS_PA_CONFIG_FILL_MODE_MASK 0x00004000 +#define VIVS_PA_CONFIG_SHADE_MODEL__MASK 0x00030000 +#define VIVS_PA_CONFIG_SHADE_MODEL__SHIFT 16 +#define VIVS_PA_CONFIG_SHADE_MODEL_FLAT 0x00000000 +#define VIVS_PA_CONFIG_SHADE_MODEL_SMOOTH 0x00010000 +#define VIVS_PA_CONFIG_SHADE_MODEL_MASK 0x00040000 +#define VIVS_PA_CONFIG_WIDE_LINE 0x00400000 +#define VIVS_PA_CONFIG_WIDE_LINE_MASK 0x00800000 + +#define VIVS_PA_WIDE_LINE_WIDTH0 0x00000a38 + +#define VIVS_PA_WIDE_LINE_WIDTH1 0x00000a3c + +#define VIVS_PA_SHADER_ATTRIBUTES(i0) (0x00000a40 + 0x4*(i0)) +#define VIVS_PA_SHADER_ATTRIBUTES__ESIZE 0x00000004 +#define VIVS_PA_SHADER_ATTRIBUTES__LEN 0x0000000a +#define VIVS_PA_SHADER_ATTRIBUTES_BYPASS_FLAT 0x00000001 +#define VIVS_PA_SHADER_ATTRIBUTES_UNK4__MASK 0x000000f0 +#define VIVS_PA_SHADER_ATTRIBUTES_UNK4__SHIFT 4 +#define VIVS_PA_SHADER_ATTRIBUTES_UNK4(x) (((x) << VIVS_PA_SHADER_ATTRIBUTES_UNK4__SHIFT) & VIVS_PA_SHADER_ATTRIBUTES_UNK4__MASK) +#define VIVS_PA_SHADER_ATTRIBUTES_UNK8__MASK 0x00000f00 +#define VIVS_PA_SHADER_ATTRIBUTES_UNK8__SHIFT 8 +#define VIVS_PA_SHADER_ATTRIBUTES_UNK8(x) (((x) << VIVS_PA_SHADER_ATTRIBUTES_UNK8__SHIFT) & VIVS_PA_SHADER_ATTRIBUTES_UNK8__MASK) + +#define VIVS_PA_VIEWPORT_UNK00A80 0x00000a80 + +#define VIVS_PA_VIEWPORT_UNK00A84 0x00000a84 + +#define VIVS_PA_FLAGS 0x00000a88 +#define VIVS_PA_FLAGS_UNK24 0x01000000 +#define VIVS_PA_FLAGS_ZCONVERT_BYPASS 0x40000000 + +#define VIVS_PA_ZFARCLIPPING 0x00000a8c + +#define VIVS_SE 0x00000000 + +#define VIVS_SE_SCISSOR_LEFT 0x00000c00 + +#define VIVS_SE_SCISSOR_TOP 0x00000c04 + +#define VIVS_SE_SCISSOR_RIGHT 0x00000c08 + +#define VIVS_SE_SCISSOR_BOTTOM 0x00000c0c + +#define VIVS_SE_DEPTH_SCALE 0x00000c10 + +#define VIVS_SE_DEPTH_BIAS 0x00000c14 + +#define VIVS_SE_CONFIG 0x00000c18 +#define VIVS_SE_CONFIG_LAST_PIXEL_ENABLE 0x00000001 + +#define VIVS_SE_UNK00C1C 0x00000c1c + +#define VIVS_SE_CLIP_RIGHT 0x00000c20 + +#define VIVS_SE_CLIP_BOTTOM 0x00000c24 + +#define VIVS_RA 0x00000000 + +#define VIVS_RA_CONTROL 0x00000e00 +#define VIVS_RA_CONTROL_UNK0 0x00000001 +#define VIVS_RA_CONTROL_LAST_VARYING_2X 0x00000002 + +#define VIVS_RA_MULTISAMPLE_UNK00E04 0x00000e04 + +#define VIVS_RA_EARLY_DEPTH 0x00000e08 + +#define VIVS_RA_UNK00E0C 0x00000e0c + +#define VIVS_RA_MULTISAMPLE_UNK00E10(i0) (0x00000e10 + 0x4*(i0)) +#define VIVS_RA_MULTISAMPLE_UNK00E10__ESIZE 0x00000004 +#define VIVS_RA_MULTISAMPLE_UNK00E10__LEN 0x00000004 + +#define VIVS_RA_HDEPTH_CONTROL 0x00000e20 +#define VIVS_RA_HDEPTH_CONTROL_UNK0 0x00000001 +#define VIVS_RA_HDEPTH_CONTROL_COMPARE__MASK 0x00007000 +#define VIVS_RA_HDEPTH_CONTROL_COMPARE__SHIFT 12 +#define VIVS_RA_HDEPTH_CONTROL_COMPARE(x) (((x) << VIVS_RA_HDEPTH_CONTROL_COMPARE__SHIFT) & VIVS_RA_HDEPTH_CONTROL_COMPARE__MASK) + +#define VIVS_RA_CENTROID_TABLE(i0) (0x00000e40 + 0x4*(i0)) +#define VIVS_RA_CENTROID_TABLE__ESIZE 0x00000004 +#define VIVS_RA_CENTROID_TABLE__LEN 0x00000010 + +#define VIVS_PS 0x00000000 + +#define VIVS_PS_END_PC 0x00001000 + +#define VIVS_PS_OUTPUT_REG 0x00001004 + +#define VIVS_PS_INPUT_COUNT 0x00001008 +#define VIVS_PS_INPUT_COUNT_COUNT__MASK 0x0000000f +#define VIVS_PS_INPUT_COUNT_COUNT__SHIFT 0 +#define VIVS_PS_INPUT_COUNT_COUNT(x) (((x) << VIVS_PS_INPUT_COUNT_COUNT__SHIFT) & VIVS_PS_INPUT_COUNT_COUNT__MASK) +#define VIVS_PS_INPUT_COUNT_UNK8__MASK 0x00001f00 +#define VIVS_PS_INPUT_COUNT_UNK8__SHIFT 8 +#define VIVS_PS_INPUT_COUNT_UNK8(x) (((x) << VIVS_PS_INPUT_COUNT_UNK8__SHIFT) & VIVS_PS_INPUT_COUNT_UNK8__MASK) + +#define VIVS_PS_TEMP_REGISTER_CONTROL 0x0000100c +#define VIVS_PS_TEMP_REGISTER_CONTROL_NUM_TEMPS__MASK 0x0000003f +#define VIVS_PS_TEMP_REGISTER_CONTROL_NUM_TEMPS__SHIFT 0 +#define VIVS_PS_TEMP_REGISTER_CONTROL_NUM_TEMPS(x) (((x) << VIVS_PS_TEMP_REGISTER_CONTROL_NUM_TEMPS__SHIFT) & VIVS_PS_TEMP_REGISTER_CONTROL_NUM_TEMPS__MASK) + +#define VIVS_PS_CONTROL 0x00001010 +#define VIVS_PS_CONTROL_BYPASS 0x00000001 +#define VIVS_PS_CONTROL_UNK1 0x00000002 + +#define VIVS_PS_PERF_COUNTER 0x00001014 + +#define VIVS_PS_START_PC 0x00001018 + +#define VIVS_PS_RANGE 0x0000101c +#define VIVS_PS_RANGE_LOW__MASK 0x0000ffff +#define VIVS_PS_RANGE_LOW__SHIFT 0 +#define VIVS_PS_RANGE_LOW(x) (((x) << VIVS_PS_RANGE_LOW__SHIFT) & VIVS_PS_RANGE_LOW__MASK) +#define VIVS_PS_RANGE_HIGH__MASK 0xffff0000 +#define VIVS_PS_RANGE_HIGH__SHIFT 16 +#define VIVS_PS_RANGE_HIGH(x) (((x) << VIVS_PS_RANGE_HIGH__SHIFT) & VIVS_PS_RANGE_HIGH__MASK) + +#define VIVS_PS_UNK01024 0x00001024 + +#define VIVS_PS_UNK01028 0x00001028 + +#define VIVS_PS_UNK01030 0x00001030 + +#define VIVS_PS_INST_MEM(i0) (0x00006000 + 0x4*(i0)) +#define VIVS_PS_INST_MEM__ESIZE 0x00000004 +#define VIVS_PS_INST_MEM__LEN 0x00000400 + +#define VIVS_PS_UNIFORMS(i0) (0x00007000 + 0x4*(i0)) +#define VIVS_PS_UNIFORMS__ESIZE 0x00000004 +#define VIVS_PS_UNIFORMS__LEN 0x00000400 + +#define VIVS_PE 0x00000000 + +#define VIVS_PE_DEPTH_CONFIG 0x00001400 +#define VIVS_PE_DEPTH_CONFIG_DEPTH_MODE__MASK 0x00000003 +#define VIVS_PE_DEPTH_CONFIG_DEPTH_MODE__SHIFT 0 +#define VIVS_PE_DEPTH_CONFIG_DEPTH_MODE_NONE 0x00000000 +#define VIVS_PE_DEPTH_CONFIG_DEPTH_MODE_Z 0x00000001 +#define VIVS_PE_DEPTH_CONFIG_DEPTH_MODE_W 0x00000002 +#define VIVS_PE_DEPTH_CONFIG_DEPTH_MODE_MASK 0x00000008 +#define VIVS_PE_DEPTH_CONFIG_DEPTH_FORMAT__MASK 0x00000010 +#define VIVS_PE_DEPTH_CONFIG_DEPTH_FORMAT__SHIFT 4 +#define VIVS_PE_DEPTH_CONFIG_DEPTH_FORMAT_D16 0x00000000 +#define VIVS_PE_DEPTH_CONFIG_DEPTH_FORMAT_D24S8 0x00000010 +#define VIVS_PE_DEPTH_CONFIG_DEPTH_FORMAT_MASK 0x00000020 +#define VIVS_PE_DEPTH_CONFIG_DEPTH_FUNC__MASK 0x00000700 +#define VIVS_PE_DEPTH_CONFIG_DEPTH_FUNC__SHIFT 8 +#define VIVS_PE_DEPTH_CONFIG_DEPTH_FUNC(x) (((x) << VIVS_PE_DEPTH_CONFIG_DEPTH_FUNC__SHIFT) & VIVS_PE_DEPTH_CONFIG_DEPTH_FUNC__MASK) +#define VIVS_PE_DEPTH_CONFIG_DEPTH_FUNC_MASK 0x00000800 +#define VIVS_PE_DEPTH_CONFIG_WRITE_ENABLE 0x00001000 +#define VIVS_PE_DEPTH_CONFIG_WRITE_ENABLE_MASK 0x00002000 +#define VIVS_PE_DEPTH_CONFIG_EARLY_Z 0x00010000 +#define VIVS_PE_DEPTH_CONFIG_EARLY_Z_MASK 0x00020000 +#define VIVS_PE_DEPTH_CONFIG_UNK18 0x00040000 +#define VIVS_PE_DEPTH_CONFIG_ONLY_DEPTH 0x00100000 +#define VIVS_PE_DEPTH_CONFIG_ONLY_DEPTH_MASK 0x00200000 +#define VIVS_PE_DEPTH_CONFIG_DISABLE_ZS 0x01000000 +#define VIVS_PE_DEPTH_CONFIG_DISABLE_ZS_MASK 0x02000000 +#define VIVS_PE_DEPTH_CONFIG_SUPER_TILED 0x04000000 +#define VIVS_PE_DEPTH_CONFIG_SUPER_TILED_MASK 0x08000000 + +#define VIVS_PE_DEPTH_NEAR 0x00001404 + +#define VIVS_PE_DEPTH_FAR 0x00001408 + +#define VIVS_PE_DEPTH_NORMALIZE 0x0000140c + +#define VIVS_PE_DEPTH_ADDR 0x00001410 + +#define VIVS_PE_DEPTH_STRIDE 0x00001414 + +#define VIVS_PE_STENCIL_OP 0x00001418 +#define VIVS_PE_STENCIL_OP_FUNC_FRONT__MASK 0x00000007 +#define VIVS_PE_STENCIL_OP_FUNC_FRONT__SHIFT 0 +#define VIVS_PE_STENCIL_OP_FUNC_FRONT(x) (((x) << VIVS_PE_STENCIL_OP_FUNC_FRONT__SHIFT) & VIVS_PE_STENCIL_OP_FUNC_FRONT__MASK) +#define VIVS_PE_STENCIL_OP_FUNC_FRONT_MASK 0x00000008 +#define VIVS_PE_STENCIL_OP_PASS_FRONT__MASK 0x00000070 +#define VIVS_PE_STENCIL_OP_PASS_FRONT__SHIFT 4 +#define VIVS_PE_STENCIL_OP_PASS_FRONT(x) (((x) << VIVS_PE_STENCIL_OP_PASS_FRONT__SHIFT) & VIVS_PE_STENCIL_OP_PASS_FRONT__MASK) +#define VIVS_PE_STENCIL_OP_PASS_FRONT_MASK 0x00000080 +#define VIVS_PE_STENCIL_OP_FAIL_FRONT__MASK 0x00000700 +#define VIVS_PE_STENCIL_OP_FAIL_FRONT__SHIFT 8 +#define VIVS_PE_STENCIL_OP_FAIL_FRONT(x) (((x) << VIVS_PE_STENCIL_OP_FAIL_FRONT__SHIFT) & VIVS_PE_STENCIL_OP_FAIL_FRONT__MASK) +#define VIVS_PE_STENCIL_OP_FAIL_FRONT_MASK 0x00000800 +#define VIVS_PE_STENCIL_OP_DEPTH_FAIL_FRONT__MASK 0x00007000 +#define VIVS_PE_STENCIL_OP_DEPTH_FAIL_FRONT__SHIFT 12 +#define VIVS_PE_STENCIL_OP_DEPTH_FAIL_FRONT(x) (((x) << VIVS_PE_STENCIL_OP_DEPTH_FAIL_FRONT__SHIFT) & VIVS_PE_STENCIL_OP_DEPTH_FAIL_FRONT__MASK) +#define VIVS_PE_STENCIL_OP_DEPTH_FAIL_FRONT_MASK 0x00008000 +#define VIVS_PE_STENCIL_OP_FUNC_BACK__MASK 0x00070000 +#define VIVS_PE_STENCIL_OP_FUNC_BACK__SHIFT 16 +#define VIVS_PE_STENCIL_OP_FUNC_BACK(x) (((x) << VIVS_PE_STENCIL_OP_FUNC_BACK__SHIFT) & VIVS_PE_STENCIL_OP_FUNC_BACK__MASK) +#define VIVS_PE_STENCIL_OP_FUNC_BACK_MASK 0x00080000 +#define VIVS_PE_STENCIL_OP_PASS_BACK__MASK 0x00700000 +#define VIVS_PE_STENCIL_OP_PASS_BACK__SHIFT 20 +#define VIVS_PE_STENCIL_OP_PASS_BACK(x) (((x) << VIVS_PE_STENCIL_OP_PASS_BACK__SHIFT) & VIVS_PE_STENCIL_OP_PASS_BACK__MASK) +#define VIVS_PE_STENCIL_OP_PASS_BACK_MASK 0x00800000 +#define VIVS_PE_STENCIL_OP_FAIL_BACK__MASK 0x07000000 +#define VIVS_PE_STENCIL_OP_FAIL_BACK__SHIFT 24 +#define VIVS_PE_STENCIL_OP_FAIL_BACK(x) (((x) << VIVS_PE_STENCIL_OP_FAIL_BACK__SHIFT) & VIVS_PE_STENCIL_OP_FAIL_BACK__MASK) +#define VIVS_PE_STENCIL_OP_FAIL_BACK_MASK 0x08000000 +#define VIVS_PE_STENCIL_OP_DEPTH_FAIL_BACK__MASK 0x70000000 +#define VIVS_PE_STENCIL_OP_DEPTH_FAIL_BACK__SHIFT 28 +#define VIVS_PE_STENCIL_OP_DEPTH_FAIL_BACK(x) (((x) << VIVS_PE_STENCIL_OP_DEPTH_FAIL_BACK__SHIFT) & VIVS_PE_STENCIL_OP_DEPTH_FAIL_BACK__MASK) +#define VIVS_PE_STENCIL_OP_DEPTH_FAIL_BACK_MASK 0x80000000 + +#define VIVS_PE_STENCIL_CONFIG 0x0000141c +#define VIVS_PE_STENCIL_CONFIG_MODE__MASK 0x00000003 +#define VIVS_PE_STENCIL_CONFIG_MODE__SHIFT 0 +#define VIVS_PE_STENCIL_CONFIG_MODE_DISABLED 0x00000000 +#define VIVS_PE_STENCIL_CONFIG_MODE_ONE_SIDED 0x00000001 +#define VIVS_PE_STENCIL_CONFIG_MODE_TWO_SIDED 0x00000002 +#define VIVS_PE_STENCIL_CONFIG_MODE_MASK 0x00000010 +#define VIVS_PE_STENCIL_CONFIG_REF_FRONT_MASK 0x00000020 +#define VIVS_PE_STENCIL_CONFIG_MASK_FRONT_MASK 0x00000040 +#define VIVS_PE_STENCIL_CONFIG_WRITE_MASK_MASK 0x00000080 +#define VIVS_PE_STENCIL_CONFIG_REF_FRONT__MASK 0x0000ff00 +#define VIVS_PE_STENCIL_CONFIG_REF_FRONT__SHIFT 8 +#define VIVS_PE_STENCIL_CONFIG_REF_FRONT(x) (((x) << VIVS_PE_STENCIL_CONFIG_REF_FRONT__SHIFT) & VIVS_PE_STENCIL_CONFIG_REF_FRONT__MASK) +#define VIVS_PE_STENCIL_CONFIG_MASK_FRONT__MASK 0x00ff0000 +#define VIVS_PE_STENCIL_CONFIG_MASK_FRONT__SHIFT 16 +#define VIVS_PE_STENCIL_CONFIG_MASK_FRONT(x) (((x) << VIVS_PE_STENCIL_CONFIG_MASK_FRONT__SHIFT) & VIVS_PE_STENCIL_CONFIG_MASK_FRONT__MASK) +#define VIVS_PE_STENCIL_CONFIG_WRITE_MASK_FRONT__MASK 0xff000000 +#define VIVS_PE_STENCIL_CONFIG_WRITE_MASK_FRONT__SHIFT 24 +#define VIVS_PE_STENCIL_CONFIG_WRITE_MASK_FRONT(x) (((x) << VIVS_PE_STENCIL_CONFIG_WRITE_MASK_FRONT__SHIFT) & VIVS_PE_STENCIL_CONFIG_WRITE_MASK_FRONT__MASK) + +#define VIVS_PE_ALPHA_OP 0x00001420 +#define VIVS_PE_ALPHA_OP_ALPHA_TEST 0x00000001 +#define VIVS_PE_ALPHA_OP_ALPHA_TEST_MASK 0x00000002 +#define VIVS_PE_ALPHA_OP_ALPHA_FUNC__MASK 0x00000070 +#define VIVS_PE_ALPHA_OP_ALPHA_FUNC__SHIFT 4 +#define VIVS_PE_ALPHA_OP_ALPHA_FUNC(x) (((x) << VIVS_PE_ALPHA_OP_ALPHA_FUNC__SHIFT) & VIVS_PE_ALPHA_OP_ALPHA_FUNC__MASK) +#define VIVS_PE_ALPHA_OP_ALPHA_FUNC_MASK 0x00000080 +#define VIVS_PE_ALPHA_OP_ALPHA_REF__MASK 0x0000ff00 +#define VIVS_PE_ALPHA_OP_ALPHA_REF__SHIFT 8 +#define VIVS_PE_ALPHA_OP_ALPHA_REF(x) (((x) << VIVS_PE_ALPHA_OP_ALPHA_REF__SHIFT) & VIVS_PE_ALPHA_OP_ALPHA_REF__MASK) +#define VIVS_PE_ALPHA_OP_ALPHA_REF_MASKFUNC_MASK 0x00010000 + +#define VIVS_PE_ALPHA_BLEND_COLOR 0x00001424 +#define VIVS_PE_ALPHA_BLEND_COLOR_B__MASK 0x000000ff +#define VIVS_PE_ALPHA_BLEND_COLOR_B__SHIFT 0 +#define VIVS_PE_ALPHA_BLEND_COLOR_B(x) (((x) << VIVS_PE_ALPHA_BLEND_COLOR_B__SHIFT) & VIVS_PE_ALPHA_BLEND_COLOR_B__MASK) +#define VIVS_PE_ALPHA_BLEND_COLOR_G__MASK 0x0000ff00 +#define VIVS_PE_ALPHA_BLEND_COLOR_G__SHIFT 8 +#define VIVS_PE_ALPHA_BLEND_COLOR_G(x) (((x) << VIVS_PE_ALPHA_BLEND_COLOR_G__SHIFT) & VIVS_PE_ALPHA_BLEND_COLOR_G__MASK) +#define VIVS_PE_ALPHA_BLEND_COLOR_R__MASK 0x00ff0000 +#define VIVS_PE_ALPHA_BLEND_COLOR_R__SHIFT 16 +#define VIVS_PE_ALPHA_BLEND_COLOR_R(x) (((x) << VIVS_PE_ALPHA_BLEND_COLOR_R__SHIFT) & VIVS_PE_ALPHA_BLEND_COLOR_R__MASK) +#define VIVS_PE_ALPHA_BLEND_COLOR_A__MASK 0xff000000 +#define VIVS_PE_ALPHA_BLEND_COLOR_A__SHIFT 24 +#define VIVS_PE_ALPHA_BLEND_COLOR_A(x) (((x) << VIVS_PE_ALPHA_BLEND_COLOR_A__SHIFT) & VIVS_PE_ALPHA_BLEND_COLOR_A__MASK) + +#define VIVS_PE_ALPHA_CONFIG 0x00001428 +#define VIVS_PE_ALPHA_CONFIG_BLEND_ENABLE_COLOR 0x00000001 +#define VIVS_PE_ALPHA_CONFIG_BLEND_ENABLE_COLOR_MASK 0x00000002 +#define VIVS_PE_ALPHA_CONFIG_SRC_FUNC_COLOR_MASK 0x00000004 +#define VIVS_PE_ALPHA_CONFIG_DST_FUNC_COLOR_MASK 0x00000008 +#define VIVS_PE_ALPHA_CONFIG_SRC_FUNC_COLOR__MASK 0x000000f0 +#define VIVS_PE_ALPHA_CONFIG_SRC_FUNC_COLOR__SHIFT 4 +#define VIVS_PE_ALPHA_CONFIG_SRC_FUNC_COLOR(x) (((x) << VIVS_PE_ALPHA_CONFIG_SRC_FUNC_COLOR__SHIFT) & VIVS_PE_ALPHA_CONFIG_SRC_FUNC_COLOR__MASK) +#define VIVS_PE_ALPHA_CONFIG_DST_FUNC_COLOR__MASK 0x00000f00 +#define VIVS_PE_ALPHA_CONFIG_DST_FUNC_COLOR__SHIFT 8 +#define VIVS_PE_ALPHA_CONFIG_DST_FUNC_COLOR(x) (((x) << VIVS_PE_ALPHA_CONFIG_DST_FUNC_COLOR__SHIFT) & VIVS_PE_ALPHA_CONFIG_DST_FUNC_COLOR__MASK) +#define VIVS_PE_ALPHA_CONFIG_EQ_COLOR__MASK 0x00007000 +#define VIVS_PE_ALPHA_CONFIG_EQ_COLOR__SHIFT 12 +#define VIVS_PE_ALPHA_CONFIG_EQ_COLOR(x) (((x) << VIVS_PE_ALPHA_CONFIG_EQ_COLOR__SHIFT) & VIVS_PE_ALPHA_CONFIG_EQ_COLOR__MASK) +#define VIVS_PE_ALPHA_CONFIG_EQ_COLOR_MASK 0x00008000 +#define VIVS_PE_ALPHA_CONFIG_BLEND_SEPARATE_ALPHA 0x00010000 +#define VIVS_PE_ALPHA_CONFIG_BLEND_SEPARATE_ALPHA_MASK 0x00020000 +#define VIVS_PE_ALPHA_CONFIG_SRC_FUNC_ALPHA_MASK 0x00040000 +#define VIVS_PE_ALPHA_CONFIG_DST_FUNC_ALPHA_MASK 0x00080000 +#define VIVS_PE_ALPHA_CONFIG_SRC_FUNC_ALPHA__MASK 0x00f00000 +#define VIVS_PE_ALPHA_CONFIG_SRC_FUNC_ALPHA__SHIFT 20 +#define VIVS_PE_ALPHA_CONFIG_SRC_FUNC_ALPHA(x) (((x) << VIVS_PE_ALPHA_CONFIG_SRC_FUNC_ALPHA__SHIFT) & VIVS_PE_ALPHA_CONFIG_SRC_FUNC_ALPHA__MASK) +#define VIVS_PE_ALPHA_CONFIG_DST_FUNC_ALPHA__MASK 0x0f000000 +#define VIVS_PE_ALPHA_CONFIG_DST_FUNC_ALPHA__SHIFT 24 +#define VIVS_PE_ALPHA_CONFIG_DST_FUNC_ALPHA(x) (((x) << VIVS_PE_ALPHA_CONFIG_DST_FUNC_ALPHA__SHIFT) & VIVS_PE_ALPHA_CONFIG_DST_FUNC_ALPHA__MASK) +#define VIVS_PE_ALPHA_CONFIG_EQ_ALPHA__MASK 0x70000000 +#define VIVS_PE_ALPHA_CONFIG_EQ_ALPHA__SHIFT 28 +#define VIVS_PE_ALPHA_CONFIG_EQ_ALPHA(x) (((x) << VIVS_PE_ALPHA_CONFIG_EQ_ALPHA__SHIFT) & VIVS_PE_ALPHA_CONFIG_EQ_ALPHA__MASK) +#define VIVS_PE_ALPHA_CONFIG_EQ_ALPHA_MASK 0x80000000 + +#define VIVS_PE_COLOR_FORMAT 0x0000142c +#define VIVS_PE_COLOR_FORMAT_FORMAT__MASK 0x0000000f +#define VIVS_PE_COLOR_FORMAT_FORMAT__SHIFT 0 +#define VIVS_PE_COLOR_FORMAT_FORMAT(x) (((x) << VIVS_PE_COLOR_FORMAT_FORMAT__SHIFT) & VIVS_PE_COLOR_FORMAT_FORMAT__MASK) +#define VIVS_PE_COLOR_FORMAT_FORMAT_MASK 0x00000010 +#define VIVS_PE_COLOR_FORMAT_COMPONENTS__MASK 0x00000f00 +#define VIVS_PE_COLOR_FORMAT_COMPONENTS__SHIFT 8 +#define VIVS_PE_COLOR_FORMAT_COMPONENTS(x) (((x) << VIVS_PE_COLOR_FORMAT_COMPONENTS__SHIFT) & VIVS_PE_COLOR_FORMAT_COMPONENTS__MASK) +#define VIVS_PE_COLOR_FORMAT_COMPONENTS_MASK 0x00001000 +#define VIVS_PE_COLOR_FORMAT_OVERWRITE 0x00010000 +#define VIVS_PE_COLOR_FORMAT_OVERWRITE_MASK 0x00020000 +#define VIVS_PE_COLOR_FORMAT_SUPER_TILED 0x00100000 +#define VIVS_PE_COLOR_FORMAT_SUPER_TILED_MASK 0x00200000 +#define VIVS_PE_COLOR_FORMAT_UNK25 0x02000000 +#define VIVS_PE_COLOR_FORMAT_UNK26 0x04000000 + +#define VIVS_PE_COLOR_ADDR 0x00001430 + +#define VIVS_PE_COLOR_STRIDE 0x00001434 + +#define VIVS_PE_HDEPTH_CONTROL 0x00001454 +#define VIVS_PE_HDEPTH_CONTROL_FORMAT__MASK 0x0000000f +#define VIVS_PE_HDEPTH_CONTROL_FORMAT__SHIFT 0 +#define VIVS_PE_HDEPTH_CONTROL_FORMAT_DISABLED 0x00000000 +#define VIVS_PE_HDEPTH_CONTROL_FORMAT_D16 0x00000005 +#define VIVS_PE_HDEPTH_CONTROL_FORMAT_D24S8 0x00000008 + +#define VIVS_PE_HDEPTH_ADDR 0x00001458 + +#define VIVS_PE_UNK0145C 0x0000145c + +#define VIVS_PE_PIPE(i0) (0x00000000 + 0x4*(i0)) +#define VIVS_PE_PIPE__ESIZE 0x00000004 +#define VIVS_PE_PIPE__LEN 0x00000008 + +#define VIVS_PE_PIPE_COLOR_ADDR(i0) (0x00001460 + 0x4*(i0)) + +#define VIVS_PE_PIPE_DEPTH_ADDR(i0) (0x00001480 + 0x4*(i0)) + +#define VIVS_PE_PIPE_ADDR_UNK01500(i0) (0x00001500 + 0x4*(i0)) + +#define VIVS_PE_PIPE_ADDR_UNK01520(i0) (0x00001520 + 0x4*(i0)) + +#define VIVS_PE_STENCIL_CONFIG_EXT 0x000014a0 +#define VIVS_PE_STENCIL_CONFIG_EXT_REF_BACK__MASK 0x000000ff +#define VIVS_PE_STENCIL_CONFIG_EXT_REF_BACK__SHIFT 0 +#define VIVS_PE_STENCIL_CONFIG_EXT_REF_BACK(x) (((x) << VIVS_PE_STENCIL_CONFIG_EXT_REF_BACK__SHIFT) & VIVS_PE_STENCIL_CONFIG_EXT_REF_BACK__MASK) +#define VIVS_PE_STENCIL_CONFIG_EXT_REF_BACK_MASK 0x00000100 +#define VIVS_PE_STENCIL_CONFIG_EXT_UNK16_MASK 0x00000200 +#define VIVS_PE_STENCIL_CONFIG_EXT_UNK16__MASK 0xffff0000 +#define VIVS_PE_STENCIL_CONFIG_EXT_UNK16__SHIFT 16 +#define VIVS_PE_STENCIL_CONFIG_EXT_UNK16(x) (((x) << VIVS_PE_STENCIL_CONFIG_EXT_UNK16__SHIFT) & VIVS_PE_STENCIL_CONFIG_EXT_UNK16__MASK) + +#define VIVS_PE_LOGIC_OP 0x000014a4 +#define VIVS_PE_LOGIC_OP_OP__MASK 0x0000000f +#define VIVS_PE_LOGIC_OP_OP__SHIFT 0 +#define VIVS_PE_LOGIC_OP_OP(x) (((x) << VIVS_PE_LOGIC_OP_OP__SHIFT) & VIVS_PE_LOGIC_OP_OP__MASK) +#define VIVS_PE_LOGIC_OP_OP_MASK 0x00000010 + +#define VIVS_PE_DITHER(i0) (0x000014a8 + 0x4*(i0)) +#define VIVS_PE_DITHER__ESIZE 0x00000004 +#define VIVS_PE_DITHER__LEN 0x00000002 + +#define VIVS_PE_ALPHA_COLOR_EXT0 0x000014b0 +#define VIVS_PE_ALPHA_COLOR_EXT0_B__MASK 0x0000ffff +#define VIVS_PE_ALPHA_COLOR_EXT0_B__SHIFT 0 +#define VIVS_PE_ALPHA_COLOR_EXT0_B(x) (((x) << VIVS_PE_ALPHA_COLOR_EXT0_B__SHIFT) & VIVS_PE_ALPHA_COLOR_EXT0_B__MASK) +#define VIVS_PE_ALPHA_COLOR_EXT0_G__MASK 0xffff0000 +#define VIVS_PE_ALPHA_COLOR_EXT0_G__SHIFT 16 +#define VIVS_PE_ALPHA_COLOR_EXT0_G(x) (((x) << VIVS_PE_ALPHA_COLOR_EXT0_G__SHIFT) & VIVS_PE_ALPHA_COLOR_EXT0_G__MASK) + +#define VIVS_PE_ALPHA_COLOR_EXT1 0x000014b4 +#define VIVS_PE_ALPHA_COLOR_EXT1_R__MASK 0x0000ffff +#define VIVS_PE_ALPHA_COLOR_EXT1_R__SHIFT 0 +#define VIVS_PE_ALPHA_COLOR_EXT1_R(x) (((x) << VIVS_PE_ALPHA_COLOR_EXT1_R__SHIFT) & VIVS_PE_ALPHA_COLOR_EXT1_R__MASK) +#define VIVS_PE_ALPHA_COLOR_EXT1_A__MASK 0xffff0000 +#define VIVS_PE_ALPHA_COLOR_EXT1_A__SHIFT 16 +#define VIVS_PE_ALPHA_COLOR_EXT1_A(x) (((x) << VIVS_PE_ALPHA_COLOR_EXT1_A__SHIFT) & VIVS_PE_ALPHA_COLOR_EXT1_A__MASK) + +#define VIVS_PE_STENCIL_CONFIG_EXT2 0x000014b8 +#define VIVS_PE_STENCIL_CONFIG_EXT2_MASK_BACK__MASK 0x000000ff +#define VIVS_PE_STENCIL_CONFIG_EXT2_MASK_BACK__SHIFT 0 +#define VIVS_PE_STENCIL_CONFIG_EXT2_MASK_BACK(x) (((x) << VIVS_PE_STENCIL_CONFIG_EXT2_MASK_BACK__SHIFT) & VIVS_PE_STENCIL_CONFIG_EXT2_MASK_BACK__MASK) +#define VIVS_PE_STENCIL_CONFIG_EXT2_WRITE_MASK_BACK__MASK 0x0000ff00 +#define VIVS_PE_STENCIL_CONFIG_EXT2_WRITE_MASK_BACK__SHIFT 8 +#define VIVS_PE_STENCIL_CONFIG_EXT2_WRITE_MASK_BACK(x) (((x) << VIVS_PE_STENCIL_CONFIG_EXT2_WRITE_MASK_BACK__SHIFT) & VIVS_PE_STENCIL_CONFIG_EXT2_WRITE_MASK_BACK__MASK) + +#define VIVS_PE_UNK01580(i0) (0x00001580 + 0x4*(i0)) +#define VIVS_PE_UNK01580__ESIZE 0x00000004 +#define VIVS_PE_UNK01580__LEN 0x00000003 + +#define VIVS_CO 0x00000000 + +#define VIVS_CO_UNK03008 0x00003008 + +#define VIVS_CO_KICKER 0x0000300c + +#define VIVS_CO_UNK03010 0x00003010 + +#define VIVS_CO_UNK03014 0x00003014 + +#define VIVS_CO_UNK03018 0x00003018 + +#define VIVS_CO_UNK0301C 0x0000301c + +#define VIVS_CO_UNK03020 0x00003020 + +#define VIVS_CO_UNK03024 0x00003024 + +#define VIVS_CO_UNK03040 0x00003040 + +#define VIVS_CO_UNK03044 0x00003044 + +#define VIVS_CO_UNK03048 0x00003048 + +#define VIVS_CO_SAMPLER(i0) (0x00000000 + 0x4*(i0)) +#define VIVS_CO_SAMPLER__ESIZE 0x00000004 +#define VIVS_CO_SAMPLER__LEN 0x00000008 + +#define VIVS_CO_SAMPLER_UNK03060(i0) (0x00003060 + 0x4*(i0)) + +#define VIVS_CO_SAMPLER_UNK03080(i0) (0x00003080 + 0x4*(i0)) + +#define VIVS_CO_SAMPLER_UNK030A0(i0) (0x000030a0 + 0x4*(i0)) + +#define VIVS_CO_SAMPLER_UNK030C0(i0) (0x000030c0 + 0x4*(i0)) + +#define VIVS_CO_SAMPLER_UNK030E0(i0) (0x000030e0 + 0x4*(i0)) + +#define VIVS_CO_SAMPLER_UNK03100(i0) (0x00003100 + 0x4*(i0)) + +#define VIVS_CO_SAMPLER_UNK03120(i0) (0x00003120 + 0x4*(i0)) + +#define VIVS_CO_SAMPLER_UNK03140(i0) (0x00003140 + 0x4*(i0)) + +#define VIVS_CO_SAMPLER_UNK03160(i0) (0x00003160 + 0x4*(i0)) + +#define VIVS_CO_SAMPLER_UNK03180(i0) (0x00003180 + 0x4*(i0)) + +#define VIVS_CO_SAMPLER_UNK031A0(i0) (0x000031a0 + 0x4*(i0)) + +#define VIVS_CO_SAMPLER_UNK031C0(i0) (0x000031c0 + 0x4*(i0)) + +#define VIVS_CO_SAMPLER_UNK031E0(i0) (0x000031e0 + 0x4*(i0)) + +#define VIVS_CO_ADDR_UNK03200(i0) (0x00003200 + 0x20*(i0)) +#define VIVS_CO_ADDR_UNK03200__ESIZE 0x00000020 +#define VIVS_CO_ADDR_UNK03200__LEN 0x00000008 + +#define VIVS_CO_ADDR_UNK03200_PPIPE(i0, i1) (0x00003200 + 0x20*(i0) + 0x4*(i1)) +#define VIVS_CO_ADDR_UNK03200_PPIPE__ESIZE 0x00000004 +#define VIVS_CO_ADDR_UNK03200_PPIPE__LEN 0x00000008 + +#define VIVS_RS 0x00000000 + +#define VIVS_RS_KICKER 0x00001600 + +#define VIVS_RS_CONFIG 0x00001604 +#define VIVS_RS_CONFIG_SOURCE_FORMAT__MASK 0x0000001f +#define VIVS_RS_CONFIG_SOURCE_FORMAT__SHIFT 0 +#define VIVS_RS_CONFIG_SOURCE_FORMAT(x) (((x) << VIVS_RS_CONFIG_SOURCE_FORMAT__SHIFT) & VIVS_RS_CONFIG_SOURCE_FORMAT__MASK) +#define VIVS_RS_CONFIG_DOWNSAMPLE_X 0x00000020 +#define VIVS_RS_CONFIG_DOWNSAMPLE_Y 0x00000040 +#define VIVS_RS_CONFIG_SOURCE_TILED 0x00000080 +#define VIVS_RS_CONFIG_DEST_FORMAT__MASK 0x00001f00 +#define VIVS_RS_CONFIG_DEST_FORMAT__SHIFT 8 +#define VIVS_RS_CONFIG_DEST_FORMAT(x) (((x) << VIVS_RS_CONFIG_DEST_FORMAT__SHIFT) & VIVS_RS_CONFIG_DEST_FORMAT__MASK) +#define VIVS_RS_CONFIG_DEST_TILED 0x00004000 +#define VIVS_RS_CONFIG_SWAP_RB 0x20000000 +#define VIVS_RS_CONFIG_FLIP 0x40000000 + +#define VIVS_RS_SOURCE_ADDR 0x00001608 + +#define VIVS_RS_SOURCE_STRIDE 0x0000160c +#define VIVS_RS_SOURCE_STRIDE_STRIDE__MASK 0x0003ffff +#define VIVS_RS_SOURCE_STRIDE_STRIDE__SHIFT 0 +#define VIVS_RS_SOURCE_STRIDE_STRIDE(x) (((x) << VIVS_RS_SOURCE_STRIDE_STRIDE__SHIFT) & VIVS_RS_SOURCE_STRIDE_STRIDE__MASK) +#define VIVS_RS_SOURCE_STRIDE_MULTI 0x40000000 +#define VIVS_RS_SOURCE_STRIDE_TILING 0x80000000 + +#define VIVS_RS_DEST_ADDR 0x00001610 + +#define VIVS_RS_DEST_STRIDE 0x00001614 +#define VIVS_RS_DEST_STRIDE_STRIDE__MASK 0x0003ffff +#define VIVS_RS_DEST_STRIDE_STRIDE__SHIFT 0 +#define VIVS_RS_DEST_STRIDE_STRIDE(x) (((x) << VIVS_RS_DEST_STRIDE_STRIDE__SHIFT) & VIVS_RS_DEST_STRIDE_STRIDE__MASK) +#define VIVS_RS_DEST_STRIDE_MULTI 0x40000000 +#define VIVS_RS_DEST_STRIDE_TILING 0x80000000 + +#define VIVS_RS_WINDOW_SIZE 0x00001620 +#define VIVS_RS_WINDOW_SIZE_HEIGHT__MASK 0xffff0000 +#define VIVS_RS_WINDOW_SIZE_HEIGHT__SHIFT 16 +#define VIVS_RS_WINDOW_SIZE_HEIGHT(x) (((x) << VIVS_RS_WINDOW_SIZE_HEIGHT__SHIFT) & VIVS_RS_WINDOW_SIZE_HEIGHT__MASK) +#define VIVS_RS_WINDOW_SIZE_WIDTH__MASK 0x0000ffff +#define VIVS_RS_WINDOW_SIZE_WIDTH__SHIFT 0 +#define VIVS_RS_WINDOW_SIZE_WIDTH(x) (((x) << VIVS_RS_WINDOW_SIZE_WIDTH__SHIFT) & VIVS_RS_WINDOW_SIZE_WIDTH__MASK) + +#define VIVS_RS_DITHER(i0) (0x00001630 + 0x4*(i0)) +#define VIVS_RS_DITHER__ESIZE 0x00000004 +#define VIVS_RS_DITHER__LEN 0x00000002 + +#define VIVS_RS_CLEAR_CONTROL 0x0000163c +#define VIVS_RS_CLEAR_CONTROL_BITS__MASK 0x0000ffff +#define VIVS_RS_CLEAR_CONTROL_BITS__SHIFT 0 +#define VIVS_RS_CLEAR_CONTROL_BITS(x) (((x) << VIVS_RS_CLEAR_CONTROL_BITS__SHIFT) & VIVS_RS_CLEAR_CONTROL_BITS__MASK) +#define VIVS_RS_CLEAR_CONTROL_MODE__MASK 0x00030000 +#define VIVS_RS_CLEAR_CONTROL_MODE__SHIFT 16 +#define VIVS_RS_CLEAR_CONTROL_MODE_DISABLED 0x00000000 +#define VIVS_RS_CLEAR_CONTROL_MODE_ENABLED1 0x00010000 +#define VIVS_RS_CLEAR_CONTROL_MODE_ENABLED4 0x00020000 +#define VIVS_RS_CLEAR_CONTROL_MODE_ENABLED4_2 0x00030000 + +#define VIVS_RS_FILL_VALUE(i0) (0x00001640 + 0x4*(i0)) +#define VIVS_RS_FILL_VALUE__ESIZE 0x00000004 +#define VIVS_RS_FILL_VALUE__LEN 0x00000004 + +#define VIVS_RS_EXTRA_CONFIG 0x000016a0 +#define VIVS_RS_EXTRA_CONFIG_AA__MASK 0x00000003 +#define VIVS_RS_EXTRA_CONFIG_AA__SHIFT 0 +#define VIVS_RS_EXTRA_CONFIG_AA(x) (((x) << VIVS_RS_EXTRA_CONFIG_AA__SHIFT) & VIVS_RS_EXTRA_CONFIG_AA__MASK) +#define VIVS_RS_EXTRA_CONFIG_ENDIAN__MASK 0x00000300 +#define VIVS_RS_EXTRA_CONFIG_ENDIAN__SHIFT 8 +#define VIVS_RS_EXTRA_CONFIG_ENDIAN(x) (((x) << VIVS_RS_EXTRA_CONFIG_ENDIAN__SHIFT) & VIVS_RS_EXTRA_CONFIG_ENDIAN__MASK) +#define VIVS_RS_EXTRA_CONFIG_UNK20 0x00100000 +#define VIVS_RS_EXTRA_CONFIG_UNK28 0x10000000 + +#define VIVS_RS_UNK016B0 0x000016b0 + +#define VIVS_RS_UNK016B4 0x000016b4 + +#define VIVS_RS_UNK016B8 0x000016b8 +#define VIVS_RS_UNK016B8_UNK0 0x00000001 + +#define VIVS_RS_UNK016BC 0x000016bc + +#define VIVS_RS_PIPE(i0) (0x00000000 + 0x4*(i0)) +#define VIVS_RS_PIPE__ESIZE 0x00000004 +#define VIVS_RS_PIPE__LEN 0x00000008 + +#define VIVS_RS_PIPE_SOURCE_ADDR(i0) (0x000016c0 + 0x4*(i0)) + +#define VIVS_RS_PIPE_DEST_ADDR(i0) (0x000016e0 + 0x4*(i0)) + +#define VIVS_RS_PIPE_OFFSET(i0) (0x00001700 + 0x4*(i0)) +#define VIVS_RS_PIPE_OFFSET_X__MASK 0x0000ffff +#define VIVS_RS_PIPE_OFFSET_X__SHIFT 0 +#define VIVS_RS_PIPE_OFFSET_X(x) (((x) << VIVS_RS_PIPE_OFFSET_X__SHIFT) & VIVS_RS_PIPE_OFFSET_X__MASK) +#define VIVS_RS_PIPE_OFFSET_Y__MASK 0xffff0000 +#define VIVS_RS_PIPE_OFFSET_Y__SHIFT 16 +#define VIVS_RS_PIPE_OFFSET_Y(x) (((x) << VIVS_RS_PIPE_OFFSET_Y__SHIFT) & VIVS_RS_PIPE_OFFSET_Y__MASK) + +#define VIVS_TS 0x00000000 + +#define VIVS_TS_FLUSH_CACHE 0x00001650 +#define VIVS_TS_FLUSH_CACHE_FLUSH 0x00000001 + +#define VIVS_TS_MEM_CONFIG 0x00001654 +#define VIVS_TS_MEM_CONFIG_DEPTH_FAST_CLEAR 0x00000001 +#define VIVS_TS_MEM_CONFIG_COLOR_FAST_CLEAR 0x00000002 +#define VIVS_TS_MEM_CONFIG_DEPTH_16BPP 0x00000008 +#define VIVS_TS_MEM_CONFIG_DEPTH_AUTO_DISABLE 0x00000010 +#define VIVS_TS_MEM_CONFIG_COLOR_AUTO_DISABLE 0x00000020 +#define VIVS_TS_MEM_CONFIG_DEPTH_COMPRESSION 0x00000040 +#define VIVS_TS_MEM_CONFIG_MSAA 0x00000080 +#define VIVS_TS_MEM_CONFIG_MSAA_FORMAT__MASK 0x00000f00 +#define VIVS_TS_MEM_CONFIG_MSAA_FORMAT__SHIFT 8 +#define VIVS_TS_MEM_CONFIG_MSAA_FORMAT_A4R4G4B4 0x00000000 +#define VIVS_TS_MEM_CONFIG_MSAA_FORMAT_A1R5G5B5 0x00000100 +#define VIVS_TS_MEM_CONFIG_MSAA_FORMAT_R5G6B5 0x00000200 +#define VIVS_TS_MEM_CONFIG_MSAA_FORMAT_A8R8G8B8 0x00000300 +#define VIVS_TS_MEM_CONFIG_MSAA_FORMAT_X8R8G8B8 0x00000400 +#define VIVS_TS_MEM_CONFIG_UNK12 0x00001000 +#define VIVS_TS_MEM_CONFIG_HDEPTH_AUTO_DISABLE 0x00002000 + +#define VIVS_TS_COLOR_STATUS_BASE 0x00001658 + +#define VIVS_TS_COLOR_SURFACE_BASE 0x0000165c + +#define VIVS_TS_COLOR_CLEAR_VALUE 0x00001660 + +#define VIVS_TS_DEPTH_STATUS_BASE 0x00001664 + +#define VIVS_TS_DEPTH_SURFACE_BASE 0x00001668 + +#define VIVS_TS_DEPTH_CLEAR_VALUE 0x0000166c + +#define VIVS_TS_DEPTH_AUTO_DISABLE_COUNT 0x00001670 + +#define VIVS_TS_COLOR_AUTO_DISABLE_COUNT 0x00001674 + +#define VIVS_TS_HDEPTH_STATUS_BASE 0x000016a4 + +#define VIVS_TS_HDEPTH_CLEAR_VALUE 0x000016a8 + +#define VIVS_TS_HDEPTH_SIZE 0x000016ac + +#define VIVS_TS_SAMPLER(i0) (0x00000000 + 0x4*(i0)) +#define VIVS_TS_SAMPLER__ESIZE 0x00000004 +#define VIVS_TS_SAMPLER__LEN 0x00000008 + +#define VIVS_TS_SAMPLER_CONFIG(i0) (0x00001720 + 0x4*(i0)) +#define VIVS_TS_SAMPLER_CONFIG_ENABLE__MASK 0x00000003 +#define VIVS_TS_SAMPLER_CONFIG_ENABLE__SHIFT 0 +#define VIVS_TS_SAMPLER_CONFIG_ENABLE(x) (((x) << VIVS_TS_SAMPLER_CONFIG_ENABLE__SHIFT) & VIVS_TS_SAMPLER_CONFIG_ENABLE__MASK) +#define VIVS_TS_SAMPLER_CONFIG_FORMAT__MASK 0x000000f0 +#define VIVS_TS_SAMPLER_CONFIG_FORMAT__SHIFT 4 +#define VIVS_TS_SAMPLER_CONFIG_FORMAT(x) (((x) << VIVS_TS_SAMPLER_CONFIG_FORMAT__SHIFT) & VIVS_TS_SAMPLER_CONFIG_FORMAT__MASK) + +#define VIVS_TS_SAMPLER_STATUS_BASE(i0) (0x00001740 + 0x4*(i0)) + +#define VIVS_TS_SAMPLER_CLEAR_VALUE(i0) (0x00001760 + 0x4*(i0)) + +#define VIVS_YUV 0x00000000 + +#define VIVS_YUV_UNK01678 0x00001678 + +#define VIVS_YUV_UNK0167C 0x0000167c + +#define VIVS_YUV_UNK01680 0x00001680 + +#define VIVS_YUV_UNK01684 0x00001684 + +#define VIVS_YUV_UNK01688 0x00001688 + +#define VIVS_YUV_UNK0168C 0x0000168c + +#define VIVS_YUV_UNK01690 0x00001690 + +#define VIVS_YUV_UNK01694 0x00001694 + +#define VIVS_YUV_UNK01698 0x00001698 + +#define VIVS_YUV_UNK0169C 0x0000169c + +#define VIVS_TE 0x00000000 + +#define VIVS_TE_SAMPLER(i0) (0x00000000 + 0x4*(i0)) +#define VIVS_TE_SAMPLER__ESIZE 0x00000004 +#define VIVS_TE_SAMPLER__LEN 0x0000000c + +#define VIVS_TE_SAMPLER_CONFIG0(i0) (0x00002000 + 0x4*(i0)) +#define VIVS_TE_SAMPLER_CONFIG0_TYPE__MASK 0x00000007 +#define VIVS_TE_SAMPLER_CONFIG0_TYPE__SHIFT 0 +#define VIVS_TE_SAMPLER_CONFIG0_TYPE(x) (((x) << VIVS_TE_SAMPLER_CONFIG0_TYPE__SHIFT) & VIVS_TE_SAMPLER_CONFIG0_TYPE__MASK) +#define VIVS_TE_SAMPLER_CONFIG0_UWRAP__MASK 0x00000018 +#define VIVS_TE_SAMPLER_CONFIG0_UWRAP__SHIFT 3 +#define VIVS_TE_SAMPLER_CONFIG0_UWRAP(x) (((x) << VIVS_TE_SAMPLER_CONFIG0_UWRAP__SHIFT) & VIVS_TE_SAMPLER_CONFIG0_UWRAP__MASK) +#define VIVS_TE_SAMPLER_CONFIG0_VWRAP__MASK 0x00000060 +#define VIVS_TE_SAMPLER_CONFIG0_VWRAP__SHIFT 5 +#define VIVS_TE_SAMPLER_CONFIG0_VWRAP(x) (((x) << VIVS_TE_SAMPLER_CONFIG0_VWRAP__SHIFT) & VIVS_TE_SAMPLER_CONFIG0_VWRAP__MASK) +#define VIVS_TE_SAMPLER_CONFIG0_MIN__MASK 0x00000180 +#define VIVS_TE_SAMPLER_CONFIG0_MIN__SHIFT 7 +#define VIVS_TE_SAMPLER_CONFIG0_MIN(x) (((x) << VIVS_TE_SAMPLER_CONFIG0_MIN__SHIFT) & VIVS_TE_SAMPLER_CONFIG0_MIN__MASK) +#define VIVS_TE_SAMPLER_CONFIG0_MIP__MASK 0x00000600 +#define VIVS_TE_SAMPLER_CONFIG0_MIP__SHIFT 9 +#define VIVS_TE_SAMPLER_CONFIG0_MIP(x) (((x) << VIVS_TE_SAMPLER_CONFIG0_MIP__SHIFT) & VIVS_TE_SAMPLER_CONFIG0_MIP__MASK) +#define VIVS_TE_SAMPLER_CONFIG0_MAG__MASK 0x00001800 +#define VIVS_TE_SAMPLER_CONFIG0_MAG__SHIFT 11 +#define VIVS_TE_SAMPLER_CONFIG0_MAG(x) (((x) << VIVS_TE_SAMPLER_CONFIG0_MAG__SHIFT) & VIVS_TE_SAMPLER_CONFIG0_MAG__MASK) +#define VIVS_TE_SAMPLER_CONFIG0_FORMAT__MASK 0x0003e000 +#define VIVS_TE_SAMPLER_CONFIG0_FORMAT__SHIFT 13 +#define VIVS_TE_SAMPLER_CONFIG0_FORMAT(x) (((x) << VIVS_TE_SAMPLER_CONFIG0_FORMAT__SHIFT) & VIVS_TE_SAMPLER_CONFIG0_FORMAT__MASK) +#define VIVS_TE_SAMPLER_CONFIG0_ROUND_UV 0x00080000 +#define VIVS_TE_SAMPLER_CONFIG0_ENDIAN__MASK 0x00c00000 +#define VIVS_TE_SAMPLER_CONFIG0_ENDIAN__SHIFT 22 +#define VIVS_TE_SAMPLER_CONFIG0_ENDIAN(x) (((x) << VIVS_TE_SAMPLER_CONFIG0_ENDIAN__SHIFT) & VIVS_TE_SAMPLER_CONFIG0_ENDIAN__MASK) +#define VIVS_TE_SAMPLER_CONFIG0_ANISOTROPY__MASK 0xff000000 +#define VIVS_TE_SAMPLER_CONFIG0_ANISOTROPY__SHIFT 24 +#define VIVS_TE_SAMPLER_CONFIG0_ANISOTROPY(x) (((x) << VIVS_TE_SAMPLER_CONFIG0_ANISOTROPY__SHIFT) & VIVS_TE_SAMPLER_CONFIG0_ANISOTROPY__MASK) + +#define VIVS_TE_SAMPLER_SIZE(i0) (0x00002040 + 0x4*(i0)) +#define VIVS_TE_SAMPLER_SIZE_WIDTH__MASK 0x0000ffff +#define VIVS_TE_SAMPLER_SIZE_WIDTH__SHIFT 0 +#define VIVS_TE_SAMPLER_SIZE_WIDTH(x) (((x) << VIVS_TE_SAMPLER_SIZE_WIDTH__SHIFT) & VIVS_TE_SAMPLER_SIZE_WIDTH__MASK) +#define VIVS_TE_SAMPLER_SIZE_HEIGHT__MASK 0xffff0000 +#define VIVS_TE_SAMPLER_SIZE_HEIGHT__SHIFT 16 +#define VIVS_TE_SAMPLER_SIZE_HEIGHT(x) (((x) << VIVS_TE_SAMPLER_SIZE_HEIGHT__SHIFT) & VIVS_TE_SAMPLER_SIZE_HEIGHT__MASK) + +#define VIVS_TE_SAMPLER_LOG_SIZE(i0) (0x00002080 + 0x4*(i0)) +#define VIVS_TE_SAMPLER_LOG_SIZE_WIDTH__MASK 0x000003ff +#define VIVS_TE_SAMPLER_LOG_SIZE_WIDTH__SHIFT 0 +#define VIVS_TE_SAMPLER_LOG_SIZE_WIDTH(x) (((x) << VIVS_TE_SAMPLER_LOG_SIZE_WIDTH__SHIFT) & VIVS_TE_SAMPLER_LOG_SIZE_WIDTH__MASK) +#define VIVS_TE_SAMPLER_LOG_SIZE_HEIGHT__MASK 0x000ffc00 +#define VIVS_TE_SAMPLER_LOG_SIZE_HEIGHT__SHIFT 10 +#define VIVS_TE_SAMPLER_LOG_SIZE_HEIGHT(x) (((x) << VIVS_TE_SAMPLER_LOG_SIZE_HEIGHT__SHIFT) & VIVS_TE_SAMPLER_LOG_SIZE_HEIGHT__MASK) + +#define VIVS_TE_SAMPLER_LOD_CONFIG(i0) (0x000020c0 + 0x4*(i0)) +#define VIVS_TE_SAMPLER_LOD_CONFIG_BIAS_ENABLE 0x00000001 +#define VIVS_TE_SAMPLER_LOD_CONFIG_MAX__MASK 0x000007fe +#define VIVS_TE_SAMPLER_LOD_CONFIG_MAX__SHIFT 1 +#define VIVS_TE_SAMPLER_LOD_CONFIG_MAX(x) (((x) << VIVS_TE_SAMPLER_LOD_CONFIG_MAX__SHIFT) & VIVS_TE_SAMPLER_LOD_CONFIG_MAX__MASK) +#define VIVS_TE_SAMPLER_LOD_CONFIG_MIN__MASK 0x001ff800 +#define VIVS_TE_SAMPLER_LOD_CONFIG_MIN__SHIFT 11 +#define VIVS_TE_SAMPLER_LOD_CONFIG_MIN(x) (((x) << VIVS_TE_SAMPLER_LOD_CONFIG_MIN__SHIFT) & VIVS_TE_SAMPLER_LOD_CONFIG_MIN__MASK) +#define VIVS_TE_SAMPLER_LOD_CONFIG_BIAS__MASK 0x7fe00000 +#define VIVS_TE_SAMPLER_LOD_CONFIG_BIAS__SHIFT 21 +#define VIVS_TE_SAMPLER_LOD_CONFIG_BIAS(x) (((x) << VIVS_TE_SAMPLER_LOD_CONFIG_BIAS__SHIFT) & VIVS_TE_SAMPLER_LOD_CONFIG_BIAS__MASK) + +#define VIVS_TE_SAMPLER_UNK02100(i0) (0x00002100 + 0x4*(i0)) + +#define VIVS_TE_SAMPLER_UNK02140(i0) (0x00002140 + 0x4*(i0)) + +#define VIVS_TE_SAMPLER_UNK02180(i0) (0x00002180 + 0x4*(i0)) + +#define VIVS_TE_SAMPLER_CONFIG1(i0) (0x000021c0 + 0x4*(i0)) +#define VIVS_TE_SAMPLER_CONFIG1_FORMAT_EXT__MASK 0x0000001f +#define VIVS_TE_SAMPLER_CONFIG1_FORMAT_EXT__SHIFT 0 +#define VIVS_TE_SAMPLER_CONFIG1_FORMAT_EXT(x) (((x) << VIVS_TE_SAMPLER_CONFIG1_FORMAT_EXT__SHIFT) & VIVS_TE_SAMPLER_CONFIG1_FORMAT_EXT__MASK) +#define VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_R__MASK 0x00000700 +#define VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_R__SHIFT 8 +#define VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_R(x) (((x) << VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_R__SHIFT) & VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_R__MASK) +#define VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_G__MASK 0x00007000 +#define VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_G__SHIFT 12 +#define VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_G(x) (((x) << VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_G__SHIFT) & VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_G__MASK) +#define VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_B__MASK 0x00070000 +#define VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_B__SHIFT 16 +#define VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_B(x) (((x) << VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_B__SHIFT) & VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_B__MASK) +#define VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_A__MASK 0x00700000 +#define VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_A__SHIFT 20 +#define VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_A(x) (((x) << VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_A__SHIFT) & VIVS_TE_SAMPLER_CONFIG1_SWIZZLE_A__MASK) +#define VIVS_TE_SAMPLER_CONFIG1_HALIGN__MASK 0x1c000000 +#define VIVS_TE_SAMPLER_CONFIG1_HALIGN__SHIFT 26 +#define VIVS_TE_SAMPLER_CONFIG1_HALIGN(x) (((x) << VIVS_TE_SAMPLER_CONFIG1_HALIGN__SHIFT) & VIVS_TE_SAMPLER_CONFIG1_HALIGN__MASK) + +#define VIVS_TE_SAMPLER_UNK02200(i0) (0x00002200 + 0x4*(i0)) + +#define VIVS_TE_SAMPLER_UNK02240(i0) (0x00002240 + 0x4*(i0)) + +#define VIVS_TE_SAMPLER_LOD_ADDR(i0, i1) (0x00002400 + 0x4*(i0) + 0x40*(i1)) +#define VIVS_TE_SAMPLER_LOD_ADDR__ESIZE 0x00000040 +#define VIVS_TE_SAMPLER_LOD_ADDR__LEN 0x0000000e + +#define VIVS_NTE 0x00000000 + +#define VIVS_NTE_SAMPLER(i0) (0x00010000 + 0x4*(i0)) +#define VIVS_NTE_SAMPLER__ESIZE 0x00000004 +#define VIVS_NTE_SAMPLER__LEN 0x00000020 + +#define VIVS_NTE_SAMPLER_CONFIG0(i0) (0x00010000 + 0x4*(i0)) +#define VIVS_NTE_SAMPLER_CONFIG0_TYPE__MASK 0x00000007 +#define VIVS_NTE_SAMPLER_CONFIG0_TYPE__SHIFT 0 +#define VIVS_NTE_SAMPLER_CONFIG0_TYPE(x) (((x) << VIVS_NTE_SAMPLER_CONFIG0_TYPE__SHIFT) & VIVS_NTE_SAMPLER_CONFIG0_TYPE__MASK) +#define VIVS_NTE_SAMPLER_CONFIG0_UWRAP__MASK 0x00000018 +#define VIVS_NTE_SAMPLER_CONFIG0_UWRAP__SHIFT 3 +#define VIVS_NTE_SAMPLER_CONFIG0_UWRAP(x) (((x) << VIVS_NTE_SAMPLER_CONFIG0_UWRAP__SHIFT) & VIVS_NTE_SAMPLER_CONFIG0_UWRAP__MASK) +#define VIVS_NTE_SAMPLER_CONFIG0_VWRAP__MASK 0x00000060 +#define VIVS_NTE_SAMPLER_CONFIG0_VWRAP__SHIFT 5 +#define VIVS_NTE_SAMPLER_CONFIG0_VWRAP(x) (((x) << VIVS_NTE_SAMPLER_CONFIG0_VWRAP__SHIFT) & VIVS_NTE_SAMPLER_CONFIG0_VWRAP__MASK) +#define VIVS_NTE_SAMPLER_CONFIG0_MIN__MASK 0x00000180 +#define VIVS_NTE_SAMPLER_CONFIG0_MIN__SHIFT 7 +#define VIVS_NTE_SAMPLER_CONFIG0_MIN(x) (((x) << VIVS_NTE_SAMPLER_CONFIG0_MIN__SHIFT) & VIVS_NTE_SAMPLER_CONFIG0_MIN__MASK) +#define VIVS_NTE_SAMPLER_CONFIG0_MIP__MASK 0x00000600 +#define VIVS_NTE_SAMPLER_CONFIG0_MIP__SHIFT 9 +#define VIVS_NTE_SAMPLER_CONFIG0_MIP(x) (((x) << VIVS_NTE_SAMPLER_CONFIG0_MIP__SHIFT) & VIVS_NTE_SAMPLER_CONFIG0_MIP__MASK) +#define VIVS_NTE_SAMPLER_CONFIG0_MAG__MASK 0x00001800 +#define VIVS_NTE_SAMPLER_CONFIG0_MAG__SHIFT 11 +#define VIVS_NTE_SAMPLER_CONFIG0_MAG(x) (((x) << VIVS_NTE_SAMPLER_CONFIG0_MAG__SHIFT) & VIVS_NTE_SAMPLER_CONFIG0_MAG__MASK) +#define VIVS_NTE_SAMPLER_CONFIG0_FORMAT__MASK 0x0003e000 +#define VIVS_NTE_SAMPLER_CONFIG0_FORMAT__SHIFT 13 +#define VIVS_NTE_SAMPLER_CONFIG0_FORMAT(x) (((x) << VIVS_NTE_SAMPLER_CONFIG0_FORMAT__SHIFT) & VIVS_NTE_SAMPLER_CONFIG0_FORMAT__MASK) +#define VIVS_NTE_SAMPLER_CONFIG0_ROUND_UV 0x00080000 +#define VIVS_NTE_SAMPLER_CONFIG0_ENDIAN__MASK 0x00c00000 +#define VIVS_NTE_SAMPLER_CONFIG0_ENDIAN__SHIFT 22 +#define VIVS_NTE_SAMPLER_CONFIG0_ENDIAN(x) (((x) << VIVS_NTE_SAMPLER_CONFIG0_ENDIAN__SHIFT) & VIVS_NTE_SAMPLER_CONFIG0_ENDIAN__MASK) +#define VIVS_NTE_SAMPLER_CONFIG0_ANISOTROPY__MASK 0xff000000 +#define VIVS_NTE_SAMPLER_CONFIG0_ANISOTROPY__SHIFT 24 +#define VIVS_NTE_SAMPLER_CONFIG0_ANISOTROPY(x) (((x) << VIVS_NTE_SAMPLER_CONFIG0_ANISOTROPY__SHIFT) & VIVS_NTE_SAMPLER_CONFIG0_ANISOTROPY__MASK) + +#define VIVS_NTE_SAMPLER_SIZE(i0) (0x00010080 + 0x4*(i0)) +#define VIVS_NTE_SAMPLER_SIZE_WIDTH__MASK 0x0000ffff +#define VIVS_NTE_SAMPLER_SIZE_WIDTH__SHIFT 0 +#define VIVS_NTE_SAMPLER_SIZE_WIDTH(x) (((x) << VIVS_NTE_SAMPLER_SIZE_WIDTH__SHIFT) & VIVS_NTE_SAMPLER_SIZE_WIDTH__MASK) +#define VIVS_NTE_SAMPLER_SIZE_HEIGHT__MASK 0xffff0000 +#define VIVS_NTE_SAMPLER_SIZE_HEIGHT__SHIFT 16 +#define VIVS_NTE_SAMPLER_SIZE_HEIGHT(x) (((x) << VIVS_NTE_SAMPLER_SIZE_HEIGHT__SHIFT) & VIVS_NTE_SAMPLER_SIZE_HEIGHT__MASK) + +#define VIVS_NTE_SAMPLER_LOG_SIZE(i0) (0x00010100 + 0x4*(i0)) +#define VIVS_NTE_SAMPLER_LOG_SIZE_WIDTH__MASK 0x000003ff +#define VIVS_NTE_SAMPLER_LOG_SIZE_WIDTH__SHIFT 0 +#define VIVS_NTE_SAMPLER_LOG_SIZE_WIDTH(x) (((x) << VIVS_NTE_SAMPLER_LOG_SIZE_WIDTH__SHIFT) & VIVS_NTE_SAMPLER_LOG_SIZE_WIDTH__MASK) +#define VIVS_NTE_SAMPLER_LOG_SIZE_HEIGHT__MASK 0x000ffc00 +#define VIVS_NTE_SAMPLER_LOG_SIZE_HEIGHT__SHIFT 10 +#define VIVS_NTE_SAMPLER_LOG_SIZE_HEIGHT(x) (((x) << VIVS_NTE_SAMPLER_LOG_SIZE_HEIGHT__SHIFT) & VIVS_NTE_SAMPLER_LOG_SIZE_HEIGHT__MASK) + +#define VIVS_NTE_SAMPLER_LOD_CONFIG(i0) (0x00010180 + 0x4*(i0)) +#define VIVS_NTE_SAMPLER_LOD_CONFIG_BIAS_ENABLE 0x00000001 +#define VIVS_NTE_SAMPLER_LOD_CONFIG_MAX__MASK 0x000007fe +#define VIVS_NTE_SAMPLER_LOD_CONFIG_MAX__SHIFT 1 +#define VIVS_NTE_SAMPLER_LOD_CONFIG_MAX(x) (((x) << VIVS_NTE_SAMPLER_LOD_CONFIG_MAX__SHIFT) & VIVS_NTE_SAMPLER_LOD_CONFIG_MAX__MASK) +#define VIVS_NTE_SAMPLER_LOD_CONFIG_MIN__MASK 0x001ff800 +#define VIVS_NTE_SAMPLER_LOD_CONFIG_MIN__SHIFT 11 +#define VIVS_NTE_SAMPLER_LOD_CONFIG_MIN(x) (((x) << VIVS_NTE_SAMPLER_LOD_CONFIG_MIN__SHIFT) & VIVS_NTE_SAMPLER_LOD_CONFIG_MIN__MASK) +#define VIVS_NTE_SAMPLER_LOD_CONFIG_BIAS__MASK 0x7fe00000 +#define VIVS_NTE_SAMPLER_LOD_CONFIG_BIAS__SHIFT 21 +#define VIVS_NTE_SAMPLER_LOD_CONFIG_BIAS(x) (((x) << VIVS_NTE_SAMPLER_LOD_CONFIG_BIAS__SHIFT) & VIVS_NTE_SAMPLER_LOD_CONFIG_BIAS__MASK) + +#define VIVS_NTE_SAMPLER_UNK10200(i0) (0x00010200 + 0x4*(i0)) + +#define VIVS_NTE_SAMPLER_UNK10280(i0) (0x00010280 + 0x4*(i0)) + +#define VIVS_NTE_SAMPLER_UNK10300(i0) (0x00010300 + 0x4*(i0)) + +#define VIVS_NTE_SAMPLER_CONFIG1(i0) (0x00010380 + 0x4*(i0)) +#define VIVS_NTE_SAMPLER_CONFIG1_FORMAT_EXT__MASK 0x0000001f +#define VIVS_NTE_SAMPLER_CONFIG1_FORMAT_EXT__SHIFT 0 +#define VIVS_NTE_SAMPLER_CONFIG1_FORMAT_EXT(x) (((x) << VIVS_NTE_SAMPLER_CONFIG1_FORMAT_EXT__SHIFT) & VIVS_NTE_SAMPLER_CONFIG1_FORMAT_EXT__MASK) +#define VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_R__MASK 0x00000700 +#define VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_R__SHIFT 8 +#define VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_R(x) (((x) << VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_R__SHIFT) & VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_R__MASK) +#define VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_G__MASK 0x00007000 +#define VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_G__SHIFT 12 +#define VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_G(x) (((x) << VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_G__SHIFT) & VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_G__MASK) +#define VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_B__MASK 0x00070000 +#define VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_B__SHIFT 16 +#define VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_B(x) (((x) << VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_B__SHIFT) & VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_B__MASK) +#define VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_A__MASK 0x00700000 +#define VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_A__SHIFT 20 +#define VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_A(x) (((x) << VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_A__SHIFT) & VIVS_NTE_SAMPLER_CONFIG1_SWIZZLE_A__MASK) +#define VIVS_NTE_SAMPLER_CONFIG1_HALIGN__MASK 0x1c000000 +#define VIVS_NTE_SAMPLER_CONFIG1_HALIGN__SHIFT 26 +#define VIVS_NTE_SAMPLER_CONFIG1_HALIGN(x) (((x) << VIVS_NTE_SAMPLER_CONFIG1_HALIGN__SHIFT) & VIVS_NTE_SAMPLER_CONFIG1_HALIGN__MASK) + +#define VIVS_NTE_SAMPLER_UNK10400(i0) (0x00010400 + 0x4*(i0)) + +#define VIVS_NTE_SAMPLER_UNK10480(i0) (0x00010480 + 0x4*(i0)) + +#define VIVS_NTE_SAMPLER_ADDR(i0) (0x00010800 + 0x40*(i0)) +#define VIVS_NTE_SAMPLER_ADDR__ESIZE 0x00000040 +#define VIVS_NTE_SAMPLER_ADDR__LEN 0x00000020 + +#define VIVS_NTE_SAMPLER_ADDR_LOD(i0, i1) (0x00010800 + 0x40*(i0) + 0x4*(i1)) +#define VIVS_NTE_SAMPLER_ADDR_LOD__ESIZE 0x00000004 +#define VIVS_NTE_SAMPLER_ADDR_LOD__LEN 0x0000000e + +#define VIVS_NTE_UNK12000(i0) (0x00012000 + 0x4*(i0)) +#define VIVS_NTE_UNK12000__ESIZE 0x00000004 +#define VIVS_NTE_UNK12000__LEN 0x00000100 + +#define VIVS_NTE_UNK12400(i0) (0x00012400 + 0x4*(i0)) +#define VIVS_NTE_UNK12400__ESIZE 0x00000004 +#define VIVS_NTE_UNK12400__LEN 0x00000100 + +#define VIVS_SH 0x00000000 + +#define VIVS_SH_UNK20000(i0) (0x00020000 + 0x4*(i0)) +#define VIVS_SH_UNK20000__ESIZE 0x00000004 +#define VIVS_SH_UNK20000__LEN 0x00002000 + +#define VIVS_SH_INST_MEM(i0) (0x0000c000 + 0x4*(i0)) +#define VIVS_SH_INST_MEM__ESIZE 0x00000004 +#define VIVS_SH_INST_MEM__LEN 0x00001000 + +#define VIVS_SH_UNK0C000_MIRROR(i0) (0x00008000 + 0x4*(i0)) +#define VIVS_SH_UNK0C000_MIRROR__ESIZE 0x00000004 +#define VIVS_SH_UNK0C000_MIRROR__LEN 0x00001000 + +#define VIVS_SH_UNIFORMS(i0) (0x00030000 + 0x4*(i0)) +#define VIVS_SH_UNIFORMS__ESIZE 0x00000004 +#define VIVS_SH_UNIFORMS__LEN 0x00000400 + + +#endif /* STATE_3D_XML */ diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/hw/state.xml.h mesa-17.0.7/src/gallium/drivers/etnaviv/hw/state.xml.h --- mesa-12.0.6/src/gallium/drivers/etnaviv/hw/state.xml.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/hw/state.xml.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,397 @@ +#ifndef STATE_XML +#define STATE_XML + +/* Autogenerated file, DO NOT EDIT manually! + +This file was generated by the rules-ng-ng headergen tool in this git repository: +http://0x04.net/cgit/index.cgi/rules-ng-ng +git clone git://0x04.net/rules-ng-ng + +The rules-ng-ng source files this header was generated from are: +- state.xml ( 19792 bytes, from 2016-11-16 18:54:37) +- common.xml ( 23422 bytes, from 2016-11-16 18:54:37) +- state_hi.xml ( 25653 bytes, from 2016-10-02 14:26:13) +- copyright.xml ( 1597 bytes, from 2016-10-02 14:26:13) +- state_2d.xml ( 51552 bytes, from 2016-10-02 14:26:13) +- state_3d.xml ( 57579 bytes, from 2016-11-16 18:54:37) +- state_vg.xml ( 5975 bytes, from 2016-10-02 14:26:13) + +Copyright (C) 2012-2016 by the following authors: +- Wladimir J. van der Laan +- Christian Gmeiner +- Lucas Stach +- Russell King + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +the rights to use, copy, modify, merge, publish, distribute, sub license, +and/or sell copies of the Software, and to permit persons to whom the +Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the +next paragraph) shall be included in all copies or substantial portions +of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +DEALINGS IN THE SOFTWARE. +*/ + + +#define VARYING_COMPONENT_USE_UNUSED 0x00000000 +#define VARYING_COMPONENT_USE_USED 0x00000001 +#define VARYING_COMPONENT_USE_POINTCOORD_X 0x00000002 +#define VARYING_COMPONENT_USE_POINTCOORD_Y 0x00000003 +#define FE_VERTEX_STREAM_CONTROL_VERTEX_STRIDE__MASK 0x000000ff +#define FE_VERTEX_STREAM_CONTROL_VERTEX_STRIDE__SHIFT 0 +#define FE_VERTEX_STREAM_CONTROL_VERTEX_STRIDE(x) (((x) << FE_VERTEX_STREAM_CONTROL_VERTEX_STRIDE__SHIFT) & FE_VERTEX_STREAM_CONTROL_VERTEX_STRIDE__MASK) +#define FE_VERTEX_STREAM_CONTROL_VERTEX_DIVISOR__MASK 0x00ff0000 +#define FE_VERTEX_STREAM_CONTROL_VERTEX_DIVISOR__SHIFT 16 +#define FE_VERTEX_STREAM_CONTROL_VERTEX_DIVISOR(x) (((x) << FE_VERTEX_STREAM_CONTROL_VERTEX_DIVISOR__SHIFT) & FE_VERTEX_STREAM_CONTROL_VERTEX_DIVISOR__MASK) +#define VIVS_FE 0x00000000 + +#define VIVS_FE_VERTEX_ELEMENT_CONFIG(i0) (0x00000600 + 0x4*(i0)) +#define VIVS_FE_VERTEX_ELEMENT_CONFIG__ESIZE 0x00000004 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG__LEN 0x00000010 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE__MASK 0x0000000f +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE__SHIFT 0 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_BYTE 0x00000000 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_UNSIGNED_BYTE 0x00000001 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_SHORT 0x00000002 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_UNSIGNED_SHORT 0x00000003 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_INT 0x00000004 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_UNSIGNED_INT 0x00000005 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_FLOAT 0x00000008 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_HALF_FLOAT 0x00000009 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_FIXED 0x0000000b +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_INT_10_10_10_2 0x0000000c +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_UNSIGNED_INT_10_10_10_2 0x0000000d +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_ENDIAN__MASK 0x00000030 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_ENDIAN__SHIFT 4 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_ENDIAN(x) (((x) << VIVS_FE_VERTEX_ELEMENT_CONFIG_ENDIAN__SHIFT) & VIVS_FE_VERTEX_ELEMENT_CONFIG_ENDIAN__MASK) +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_NONCONSECUTIVE 0x00000080 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_STREAM__MASK 0x00000700 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_STREAM__SHIFT 8 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_STREAM(x) (((x) << VIVS_FE_VERTEX_ELEMENT_CONFIG_STREAM__SHIFT) & VIVS_FE_VERTEX_ELEMENT_CONFIG_STREAM__MASK) +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_NUM__MASK 0x00003000 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_NUM__SHIFT 12 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_NUM(x) (((x) << VIVS_FE_VERTEX_ELEMENT_CONFIG_NUM__SHIFT) & VIVS_FE_VERTEX_ELEMENT_CONFIG_NUM__MASK) +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_NORMALIZE__MASK 0x0000c000 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_NORMALIZE__SHIFT 14 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_NORMALIZE_OFF 0x00000000 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_NORMALIZE_ON 0x00008000 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_START__MASK 0x00ff0000 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_START__SHIFT 16 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_START(x) (((x) << VIVS_FE_VERTEX_ELEMENT_CONFIG_START__SHIFT) & VIVS_FE_VERTEX_ELEMENT_CONFIG_START__MASK) +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_END__MASK 0xff000000 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_END__SHIFT 24 +#define VIVS_FE_VERTEX_ELEMENT_CONFIG_END(x) (((x) << VIVS_FE_VERTEX_ELEMENT_CONFIG_END__SHIFT) & VIVS_FE_VERTEX_ELEMENT_CONFIG_END__MASK) + +#define VIVS_FE_CMD_STREAM_BASE_ADDR 0x00000640 + +#define VIVS_FE_INDEX_STREAM_BASE_ADDR 0x00000644 + +#define VIVS_FE_INDEX_STREAM_CONTROL 0x00000648 +#define VIVS_FE_INDEX_STREAM_CONTROL_TYPE__MASK 0x00000003 +#define VIVS_FE_INDEX_STREAM_CONTROL_TYPE__SHIFT 0 +#define VIVS_FE_INDEX_STREAM_CONTROL_TYPE_UNSIGNED_CHAR 0x00000000 +#define VIVS_FE_INDEX_STREAM_CONTROL_TYPE_UNSIGNED_SHORT 0x00000001 +#define VIVS_FE_INDEX_STREAM_CONTROL_TYPE_UNSIGNED_INT 0x00000002 +#define VIVS_FE_INDEX_STREAM_CONTROL_PRIMITIVE_RESTART 0x00000100 + +#define VIVS_FE_VERTEX_STREAM_BASE_ADDR 0x0000064c + +#define VIVS_FE_VERTEX_STREAM_CONTROL 0x00000650 + +#define VIVS_FE_COMMAND_ADDRESS 0x00000654 + +#define VIVS_FE_COMMAND_CONTROL 0x00000658 +#define VIVS_FE_COMMAND_CONTROL_PREFETCH__MASK 0x0000ffff +#define VIVS_FE_COMMAND_CONTROL_PREFETCH__SHIFT 0 +#define VIVS_FE_COMMAND_CONTROL_PREFETCH(x) (((x) << VIVS_FE_COMMAND_CONTROL_PREFETCH__SHIFT) & VIVS_FE_COMMAND_CONTROL_PREFETCH__MASK) +#define VIVS_FE_COMMAND_CONTROL_ENABLE 0x00010000 + +#define VIVS_FE_DMA_STATUS 0x0000065c + +#define VIVS_FE_DMA_DEBUG_STATE 0x00000660 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE__MASK 0x0000001f +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE__SHIFT 0 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_IDLE 0x00000000 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_DEC 0x00000001 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_ADR0 0x00000002 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_LOAD0 0x00000003 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_ADR1 0x00000004 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_LOAD1 0x00000005 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_3DADR 0x00000006 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_3DCMD 0x00000007 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_3DCNTL 0x00000008 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_3DIDXCNTL 0x00000009 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_INITREQDMA 0x0000000a +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_DRAWIDX 0x0000000b +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_DRAW 0x0000000c +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_2DRECT0 0x0000000d +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_2DRECT1 0x0000000e +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_2DDATA0 0x0000000f +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_2DDATA1 0x00000010 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_WAITFIFO 0x00000011 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_WAIT 0x00000012 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_LINK 0x00000013 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_END 0x00000014 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_STALL 0x00000015 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_DMA_STATE__MASK 0x00000300 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_DMA_STATE__SHIFT 8 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_DMA_STATE_IDLE 0x00000000 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_DMA_STATE_START 0x00000100 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_DMA_STATE_REQ 0x00000200 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_DMA_STATE_END 0x00000300 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_FETCH_STATE__MASK 0x00000c00 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_FETCH_STATE__SHIFT 10 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_FETCH_STATE_IDLE 0x00000000 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_FETCH_STATE_RAMVALID 0x00000400 +#define VIVS_FE_DMA_DEBUG_STATE_CMD_FETCH_STATE_VALID 0x00000800 +#define VIVS_FE_DMA_DEBUG_STATE_REQ_DMA_STATE__MASK 0x00003000 +#define VIVS_FE_DMA_DEBUG_STATE_REQ_DMA_STATE__SHIFT 12 +#define VIVS_FE_DMA_DEBUG_STATE_REQ_DMA_STATE_IDLE 0x00000000 +#define VIVS_FE_DMA_DEBUG_STATE_REQ_DMA_STATE_WAITIDX 0x00001000 +#define VIVS_FE_DMA_DEBUG_STATE_REQ_DMA_STATE_CAL 0x00002000 +#define VIVS_FE_DMA_DEBUG_STATE_CAL_STATE__MASK 0x0000c000 +#define VIVS_FE_DMA_DEBUG_STATE_CAL_STATE__SHIFT 14 +#define VIVS_FE_DMA_DEBUG_STATE_CAL_STATE_IDLE 0x00000000 +#define VIVS_FE_DMA_DEBUG_STATE_CAL_STATE_LDADR 0x00004000 +#define VIVS_FE_DMA_DEBUG_STATE_CAL_STATE_IDXCALC 0x00008000 +#define VIVS_FE_DMA_DEBUG_STATE_VE_REQ_STATE__MASK 0x00030000 +#define VIVS_FE_DMA_DEBUG_STATE_VE_REQ_STATE__SHIFT 16 +#define VIVS_FE_DMA_DEBUG_STATE_VE_REQ_STATE_IDLE 0x00000000 +#define VIVS_FE_DMA_DEBUG_STATE_VE_REQ_STATE_CKCACHE 0x00010000 +#define VIVS_FE_DMA_DEBUG_STATE_VE_REQ_STATE_MISS 0x00020000 + +#define VIVS_FE_DMA_ADDRESS 0x00000664 + +#define VIVS_FE_DMA_LOW 0x00000668 + +#define VIVS_FE_DMA_HIGH 0x0000066c + +#define VIVS_FE_AUTO_FLUSH 0x00000670 + +#define VIVS_FE_PRIMITIVE_RESTART_INDEX 0x00000674 + +#define VIVS_FE_UNK00678 0x00000678 + +#define VIVS_FE_UNK0067C 0x0000067c + +#define VIVS_FE_VERTEX_STREAMS(i0) (0x00000000 + 0x4*(i0)) +#define VIVS_FE_VERTEX_STREAMS__ESIZE 0x00000004 +#define VIVS_FE_VERTEX_STREAMS__LEN 0x00000008 + +#define VIVS_FE_VERTEX_STREAMS_BASE_ADDR(i0) (0x00000680 + 0x4*(i0)) + +#define VIVS_FE_VERTEX_STREAMS_CONTROL(i0) (0x000006a0 + 0x4*(i0)) + +#define VIVS_FE_UNK00700(i0) (0x00000700 + 0x4*(i0)) +#define VIVS_FE_UNK00700__ESIZE 0x00000004 +#define VIVS_FE_UNK00700__LEN 0x00000010 + +#define VIVS_FE_UNK00740(i0) (0x00000740 + 0x4*(i0)) +#define VIVS_FE_UNK00740__ESIZE 0x00000004 +#define VIVS_FE_UNK00740__LEN 0x00000010 + +#define VIVS_FE_UNK00780(i0) (0x00000780 + 0x4*(i0)) +#define VIVS_FE_UNK00780__ESIZE 0x00000004 +#define VIVS_FE_UNK00780__LEN 0x00000010 + +#define VIVS_GL 0x00000000 + +#define VIVS_GL_PIPE_SELECT 0x00003800 +#define VIVS_GL_PIPE_SELECT_PIPE__MASK 0x00000001 +#define VIVS_GL_PIPE_SELECT_PIPE__SHIFT 0 +#define VIVS_GL_PIPE_SELECT_PIPE(x) (((x) << VIVS_GL_PIPE_SELECT_PIPE__SHIFT) & VIVS_GL_PIPE_SELECT_PIPE__MASK) + +#define VIVS_GL_EVENT 0x00003804 +#define VIVS_GL_EVENT_EVENT_ID__MASK 0x0000001f +#define VIVS_GL_EVENT_EVENT_ID__SHIFT 0 +#define VIVS_GL_EVENT_EVENT_ID(x) (((x) << VIVS_GL_EVENT_EVENT_ID__SHIFT) & VIVS_GL_EVENT_EVENT_ID__MASK) +#define VIVS_GL_EVENT_FROM_FE 0x00000020 +#define VIVS_GL_EVENT_FROM_PE 0x00000040 +#define VIVS_GL_EVENT_SOURCE__MASK 0x00001f00 +#define VIVS_GL_EVENT_SOURCE__SHIFT 8 +#define VIVS_GL_EVENT_SOURCE(x) (((x) << VIVS_GL_EVENT_SOURCE__SHIFT) & VIVS_GL_EVENT_SOURCE__MASK) + +#define VIVS_GL_SEMAPHORE_TOKEN 0x00003808 +#define VIVS_GL_SEMAPHORE_TOKEN_FROM__MASK 0x0000001f +#define VIVS_GL_SEMAPHORE_TOKEN_FROM__SHIFT 0 +#define VIVS_GL_SEMAPHORE_TOKEN_FROM(x) (((x) << VIVS_GL_SEMAPHORE_TOKEN_FROM__SHIFT) & VIVS_GL_SEMAPHORE_TOKEN_FROM__MASK) +#define VIVS_GL_SEMAPHORE_TOKEN_TO__MASK 0x00001f00 +#define VIVS_GL_SEMAPHORE_TOKEN_TO__SHIFT 8 +#define VIVS_GL_SEMAPHORE_TOKEN_TO(x) (((x) << VIVS_GL_SEMAPHORE_TOKEN_TO__SHIFT) & VIVS_GL_SEMAPHORE_TOKEN_TO__MASK) + +#define VIVS_GL_FLUSH_CACHE 0x0000380c +#define VIVS_GL_FLUSH_CACHE_DEPTH 0x00000001 +#define VIVS_GL_FLUSH_CACHE_COLOR 0x00000002 +#define VIVS_GL_FLUSH_CACHE_TEXTURE 0x00000004 +#define VIVS_GL_FLUSH_CACHE_PE2D 0x00000008 +#define VIVS_GL_FLUSH_CACHE_TEXTUREVS 0x00000010 +#define VIVS_GL_FLUSH_CACHE_SHADER_L1 0x00000020 +#define VIVS_GL_FLUSH_CACHE_SHADER_L2 0x00000040 + +#define VIVS_GL_FLUSH_MMU 0x00003810 +#define VIVS_GL_FLUSH_MMU_FLUSH_FEMMU 0x00000001 +#define VIVS_GL_FLUSH_MMU_FLUSH_UNK1 0x00000002 +#define VIVS_GL_FLUSH_MMU_FLUSH_UNK2 0x00000004 +#define VIVS_GL_FLUSH_MMU_FLUSH_PEMMU 0x00000008 +#define VIVS_GL_FLUSH_MMU_FLUSH_UNK4 0x00000010 + +#define VIVS_GL_VERTEX_ELEMENT_CONFIG 0x00003814 + +#define VIVS_GL_MULTI_SAMPLE_CONFIG 0x00003818 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_SAMPLES__MASK 0x00000003 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_SAMPLES__SHIFT 0 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_SAMPLES_NONE 0x00000000 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_SAMPLES_2X 0x00000001 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_SAMPLES_4X 0x00000002 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_SAMPLES_MASK 0x00000008 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_ENABLES__MASK 0x000000f0 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_ENABLES__SHIFT 4 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_ENABLES(x) (((x) << VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_ENABLES__SHIFT) & VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_ENABLES__MASK) +#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_ENABLES_MASK 0x00000100 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_UNK12__MASK 0x00007000 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_UNK12__SHIFT 12 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_UNK12(x) (((x) << VIVS_GL_MULTI_SAMPLE_CONFIG_UNK12__SHIFT) & VIVS_GL_MULTI_SAMPLE_CONFIG_UNK12__MASK) +#define VIVS_GL_MULTI_SAMPLE_CONFIG_UNK12_MASK 0x00008000 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_UNK16__MASK 0x00030000 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_UNK16__SHIFT 16 +#define VIVS_GL_MULTI_SAMPLE_CONFIG_UNK16(x) (((x) << VIVS_GL_MULTI_SAMPLE_CONFIG_UNK16__SHIFT) & VIVS_GL_MULTI_SAMPLE_CONFIG_UNK16__MASK) +#define VIVS_GL_MULTI_SAMPLE_CONFIG_UNK16_MASK 0x00080000 + +#define VIVS_GL_VARYING_TOTAL_COMPONENTS 0x0000381c +#define VIVS_GL_VARYING_TOTAL_COMPONENTS_NUM__MASK 0x000000ff +#define VIVS_GL_VARYING_TOTAL_COMPONENTS_NUM__SHIFT 0 +#define VIVS_GL_VARYING_TOTAL_COMPONENTS_NUM(x) (((x) << VIVS_GL_VARYING_TOTAL_COMPONENTS_NUM__SHIFT) & VIVS_GL_VARYING_TOTAL_COMPONENTS_NUM__MASK) + +#define VIVS_GL_VARYING_NUM_COMPONENTS 0x00003820 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR0__MASK 0x00000007 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR0__SHIFT 0 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR0(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR0__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR0__MASK) +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR1__MASK 0x00000070 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR1__SHIFT 4 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR1(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR1__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR1__MASK) +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR2__MASK 0x00000700 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR2__SHIFT 8 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR2(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR2__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR2__MASK) +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR3__MASK 0x00007000 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR3__SHIFT 12 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR3(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR3__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR3__MASK) +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR4__MASK 0x00070000 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR4__SHIFT 16 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR4(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR4__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR4__MASK) +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR5__MASK 0x00700000 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR5__SHIFT 20 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR5(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR5__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR5__MASK) +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR6__MASK 0x07000000 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR6__SHIFT 24 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR6(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR6__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR6__MASK) +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR7__MASK 0x70000000 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR7__SHIFT 28 +#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR7(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR7__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR7__MASK) + +#define VIVS_GL_VARYING_COMPONENT_USE(i0) (0x00003828 + 0x4*(i0)) +#define VIVS_GL_VARYING_COMPONENT_USE__ESIZE 0x00000004 +#define VIVS_GL_VARYING_COMPONENT_USE__LEN 0x00000002 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP0__MASK 0x00000003 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP0__SHIFT 0 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP0(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP0__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP0__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP1__MASK 0x0000000c +#define VIVS_GL_VARYING_COMPONENT_USE_COMP1__SHIFT 2 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP1(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP1__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP1__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP2__MASK 0x00000030 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP2__SHIFT 4 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP2(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP2__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP2__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP3__MASK 0x000000c0 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP3__SHIFT 6 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP3(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP3__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP3__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP4__MASK 0x00000300 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP4__SHIFT 8 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP4(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP4__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP4__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP5__MASK 0x00000c00 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP5__SHIFT 10 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP5(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP5__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP5__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP6__MASK 0x00003000 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP6__SHIFT 12 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP6(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP6__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP6__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP7__MASK 0x0000c000 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP7__SHIFT 14 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP7(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP7__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP7__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP8__MASK 0x00030000 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP8__SHIFT 16 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP8(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP8__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP8__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP9__MASK 0x000c0000 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP9__SHIFT 18 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP9(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP9__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP9__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP10__MASK 0x00300000 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP10__SHIFT 20 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP10(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP10__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP10__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP11__MASK 0x00c00000 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP11__SHIFT 22 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP11(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP11__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP11__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP12__MASK 0x03000000 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP12__SHIFT 24 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP12(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP12__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP12__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP13__MASK 0x0c000000 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP13__SHIFT 26 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP13(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP13__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP13__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP14__MASK 0x30000000 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP14__SHIFT 28 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP14(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP14__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP14__MASK) +#define VIVS_GL_VARYING_COMPONENT_USE_COMP15__MASK 0xc0000000 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP15__SHIFT 30 +#define VIVS_GL_VARYING_COMPONENT_USE_COMP15(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP15__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP15__MASK) + +#define VIVS_GL_UNK03834 0x00003834 + +#define VIVS_GL_UNK03838 0x00003838 + +#define VIVS_GL_API_MODE 0x0000384c +#define VIVS_GL_API_MODE_OPENGL 0x00000000 +#define VIVS_GL_API_MODE_OPENVG 0x00000001 +#define VIVS_GL_API_MODE_OPENCL 0x00000002 + +#define VIVS_GL_CONTEXT_POINTER 0x00003850 + +#define VIVS_GL_UNK03854 0x00003854 + +#define VIVS_GL_UNK03A00 0x00003a00 + +#define VIVS_GL_STALL_TOKEN 0x00003c00 +#define VIVS_GL_STALL_TOKEN_FROM__MASK 0x0000001f +#define VIVS_GL_STALL_TOKEN_FROM__SHIFT 0 +#define VIVS_GL_STALL_TOKEN_FROM(x) (((x) << VIVS_GL_STALL_TOKEN_FROM__SHIFT) & VIVS_GL_STALL_TOKEN_FROM__MASK) +#define VIVS_GL_STALL_TOKEN_TO__MASK 0x00001f00 +#define VIVS_GL_STALL_TOKEN_TO__SHIFT 8 +#define VIVS_GL_STALL_TOKEN_TO(x) (((x) << VIVS_GL_STALL_TOKEN_TO__SHIFT) & VIVS_GL_STALL_TOKEN_TO__MASK) +#define VIVS_GL_STALL_TOKEN_FLIP0 0x40000000 +#define VIVS_GL_STALL_TOKEN_FLIP1 0x80000000 + +#define VIVS_NFE 0x00000000 + +#define VIVS_NFE_UNK14600(i0) (0x00014600 + 0x4*(i0)) +#define VIVS_NFE_UNK14600__ESIZE 0x00000004 +#define VIVS_NFE_UNK14600__LEN 0x00000010 + +#define VIVS_NFE_UNK14640(i0) (0x00014640 + 0x4*(i0)) +#define VIVS_NFE_UNK14640__ESIZE 0x00000004 +#define VIVS_NFE_UNK14640__LEN 0x00000010 + +#define VIVS_NFE_UNK14680(i0) (0x00014680 + 0x4*(i0)) +#define VIVS_NFE_UNK14680__ESIZE 0x00000004 +#define VIVS_NFE_UNK14680__LEN 0x00000010 + +#define VIVS_DUMMY 0x00000000 + +#define VIVS_DUMMY_DUMMY 0x0003fffc + + +#endif /* STATE_XML */ diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/Makefile.am mesa-17.0.7/src/gallium/drivers/etnaviv/Makefile.am --- mesa-12.0.6/src/gallium/drivers/etnaviv/Makefile.am 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,44 @@ +# Copyright © 2013 W.J. van der Laan +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT +# HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +# DEALINGS IN THE SOFTWARE. + +include Makefile.sources +include $(top_srcdir)/src/gallium/Automake.inc + +noinst_LTLIBRARIES = libetnaviv.la + +AM_CPPFLAGS = \ + $(GALLIUM_DRIVER_CFLAGS) \ + $(ETNAVIV_CFLAGS) + +libetnaviv_la_SOURCES = $(C_SOURCES) + +noinst_PROGRAMS = etnaviv_compiler + +etnaviv_compiler_SOURCES = \ + etnaviv_compiler_cmdline.c + +etnaviv_compiler_LDADD = \ + libetnaviv.la \ + $(top_builddir)/src/gallium/auxiliary/libgallium.la \ + $(top_builddir)/src/util/libmesautil.la \ + $(GALLIUM_COMMON_LIB_DEPS) \ + $(ETNAVIV_LIBS) diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/Makefile.in mesa-17.0.7/src/gallium/drivers/etnaviv/Makefile.in --- mesa-12.0.6/src/gallium/drivers/etnaviv/Makefile.in 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/Makefile.in 2017-06-01 10:37:20.000000000 +0000 @@ -0,0 +1,998 @@ +# Makefile.in generated by automake 1.15 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994-2014 Free Software Foundation, Inc. + +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +# PARTICULAR PURPOSE. + +@SET_MAKE@ + +# Copyright © 2013 W.J. van der Laan +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT +# HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +# DEALINGS IN THE SOFTWARE. + + +VPATH = @srcdir@ +am__is_gnu_make = { \ + if test -z '$(MAKELEVEL)'; then \ + false; \ + elif test -n '$(MAKE_HOST)'; then \ + true; \ + elif test -n '$(MAKE_VERSION)' && test -n '$(CURDIR)'; then \ + true; \ + else \ + false; \ + fi; \ +} +am__make_running_with_option = \ + case $${target_option-} in \ + ?) ;; \ + *) echo "am__make_running_with_option: internal error: invalid" \ + "target option '$${target_option-}' specified" >&2; \ + exit 1;; \ + esac; \ + has_opt=no; \ + sane_makeflags=$$MAKEFLAGS; \ + if $(am__is_gnu_make); then \ + sane_makeflags=$$MFLAGS; \ + else \ + case $$MAKEFLAGS in \ + *\\[\ \ ]*) \ + bs=\\; \ + sane_makeflags=`printf '%s\n' "$$MAKEFLAGS" \ + | sed "s/$$bs$$bs[$$bs $$bs ]*//g"`;; \ + esac; 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@srcdir@ +sysconfdir = @sysconfdir@ +target = @target@ +target_alias = @target_alias@ +target_cpu = @target_cpu@ +target_os = @target_os@ +target_vendor = @target_vendor@ +top_build_prefix = @top_build_prefix@ +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ +C_SOURCES := \ + hw/cmdstream.xml.h \ + hw/common.xml.h \ + hw/isa.xml.h \ + hw/state_3d.xml.h \ + hw/state.xml.h \ + \ + etnaviv_asm.c \ + etnaviv_asm.h \ + etnaviv_blend.c \ + etnaviv_blend.h \ + etnaviv_clear_blit.c \ + etnaviv_clear_blit.h \ + etnaviv_compiler.c \ + etnaviv_compiler.h \ + etnaviv_context.c \ + etnaviv_context.h \ + etnaviv_debug.h \ + etnaviv_disasm.c \ + etnaviv_disasm.h \ + etnaviv_emit.c \ + etnaviv_emit.h \ + etnaviv_fence.c \ + etnaviv_fence.h \ + etnaviv_format.c \ + etnaviv_format.h \ + etnaviv_internal.h \ + etnaviv_query.c \ + etnaviv_query.h \ + etnaviv_query_sw.c \ + etnaviv_query_sw.h \ + etnaviv_rasterizer.c \ + etnaviv_rasterizer.h \ + etnaviv_resource.c \ + etnaviv_resource.h \ + etnaviv_rs.c \ + etnaviv_rs.h \ + etnaviv_screen.c \ + etnaviv_screen.h \ + etnaviv_shader.c \ + etnaviv_shader.h \ + etnaviv_state.c \ + etnaviv_state.h \ + etnaviv_surface.c \ + etnaviv_surface.h \ + etnaviv_texture.c \ + etnaviv_texture.h \ + etnaviv_tiling.c \ + etnaviv_tiling.h \ + etnaviv_transfer.c \ + etnaviv_transfer.h \ + etnaviv_translate.h \ + etnaviv_uniforms.c \ + etnaviv_uniforms.h \ + etnaviv_util.h \ + etnaviv_zsa.c \ + etnaviv_zsa.h + +GALLIUM_CFLAGS = \ + -I$(top_srcdir)/include \ + -I$(top_srcdir)/src \ + -I$(top_srcdir)/src/gallium/include \ + -I$(top_srcdir)/src/gallium/auxiliary \ + $(DEFINES) + + +# src/gallium/auxiliary must appear before src/gallium/drivers +# because there are stupidly two rbug_context.h files in +# different directories, and which one is included by the +# preprocessor is determined by the ordering of the -I flags. +GALLIUM_DRIVER_CFLAGS = \ + -I$(srcdir)/include \ + -I$(top_srcdir)/src \ + -I$(top_srcdir)/include \ + -I$(top_srcdir)/src/gallium/include \ + -I$(top_srcdir)/src/gallium/auxiliary \ + -I$(top_srcdir)/src/gallium/drivers \ + -I$(top_srcdir)/src/gallium/winsys \ + $(DEFINES) \ + $(VISIBILITY_CFLAGS) + +GALLIUM_DRIVER_CXXFLAGS = \ + -I$(srcdir)/include \ + -I$(top_srcdir)/src \ + -I$(top_srcdir)/include \ + -I$(top_srcdir)/src/gallium/include \ + -I$(top_srcdir)/src/gallium/auxiliary \ + -I$(top_srcdir)/src/gallium/drivers \ + -I$(top_srcdir)/src/gallium/winsys \ + $(DEFINES) \ + $(VISIBILITY_CXXFLAGS) + +GALLIUM_TARGET_CFLAGS = \ + -I$(top_srcdir)/src \ + -I$(top_srcdir)/include \ + -I$(top_srcdir)/src/loader \ + -I$(top_srcdir)/src/gallium/include \ + -I$(top_srcdir)/src/gallium/auxiliary \ + -I$(top_srcdir)/src/gallium/drivers \ + -I$(top_srcdir)/src/gallium/winsys \ + $(DEFINES) \ + $(PTHREAD_CFLAGS) \ + $(LIBDRM_CFLAGS) \ + $(VISIBILITY_CFLAGS) + +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) +GALLIUM_WINSYS_CFLAGS = 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html html-am info info-am install install-am \ + install-data install-data-am install-dvi install-dvi-am \ + install-exec install-exec-am install-html install-html-am \ + install-info install-info-am install-man install-pdf \ + install-pdf-am install-ps install-ps-am install-strip \ + installcheck installcheck-am installdirs maintainer-clean \ + maintainer-clean-generic mostlyclean mostlyclean-compile \ + mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \ + tags tags-am uninstall uninstall-am + +.PRECIOUS: Makefile + + +# Tell versions [3.59,3.63) of GNU make to not export all variables. +# Otherwise a system limit (for SysV at least) may be exceeded. +.NOEXPORT: diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/Makefile.sources mesa-17.0.7/src/gallium/drivers/etnaviv/Makefile.sources --- mesa-12.0.6/src/gallium/drivers/etnaviv/Makefile.sources 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/Makefile.sources 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,57 @@ +C_SOURCES := \ + hw/cmdstream.xml.h \ + hw/common.xml.h \ + hw/isa.xml.h \ + hw/state_3d.xml.h \ + hw/state.xml.h \ + \ + etnaviv_asm.c \ + etnaviv_asm.h \ + etnaviv_blend.c \ + etnaviv_blend.h \ + etnaviv_clear_blit.c \ + etnaviv_clear_blit.h \ + etnaviv_compiler.c \ + etnaviv_compiler.h \ + etnaviv_context.c \ + etnaviv_context.h \ + etnaviv_debug.h \ + etnaviv_disasm.c \ + etnaviv_disasm.h \ + etnaviv_emit.c \ + etnaviv_emit.h \ + etnaviv_fence.c \ + etnaviv_fence.h \ + etnaviv_format.c \ + etnaviv_format.h \ + etnaviv_internal.h \ + etnaviv_query.c \ + etnaviv_query.h \ + etnaviv_query_sw.c \ + etnaviv_query_sw.h \ + etnaviv_rasterizer.c \ + etnaviv_rasterizer.h \ + etnaviv_resource.c \ + etnaviv_resource.h \ + etnaviv_rs.c \ + etnaviv_rs.h \ + etnaviv_screen.c \ + etnaviv_screen.h \ + etnaviv_shader.c \ + etnaviv_shader.h \ + etnaviv_state.c \ + etnaviv_state.h \ + etnaviv_surface.c \ + etnaviv_surface.h \ + etnaviv_texture.c \ + etnaviv_texture.h \ + etnaviv_tiling.c \ + etnaviv_tiling.h \ + etnaviv_transfer.c \ + etnaviv_transfer.h \ + etnaviv_translate.h \ + etnaviv_uniforms.c \ + etnaviv_uniforms.h \ + etnaviv_util.h \ + etnaviv_zsa.c \ + etnaviv_zsa.h diff -Nru mesa-12.0.6/src/gallium/drivers/etnaviv/README mesa-17.0.7/src/gallium/drivers/etnaviv/README --- mesa-12.0.6/src/gallium/drivers/etnaviv/README 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/etnaviv/README 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,13 @@ +Notes for the etnaviv gallium driver +------------------------------------ + +There are two ways how this driver might get used: + +- application opens kms device (kmscube, weston, ..) +- X via xf86-video-armada + +For the kms device case we provide a renderonly based driver like +imx where all the magic for buffer import and export between kms +and renderonly GPU is handled automaticly. + +For X/xf86-video-armada we need to provide etnaviv_dri.so. diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h mesa-17.0.7/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h --- mesa-12.0.6/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h 2017-06-01 10:37:10.000000000 +0000 @@ -8,16 +8,17 @@ git clone https://github.com/freedreno/envytools.git The rules-ng-ng source files this header was generated from are: -- /home/robclark/src/freedreno/envytools/rnndb/adreno.xml ( 398 bytes, from 2015-09-24 17:25:31) +- /home/robclark/src/freedreno/envytools/rnndb/adreno.xml ( 431 bytes, from 2016-04-26 17:56:44) - /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2016-02-10 17:07:21) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32901 bytes, from 2015-05-20 20:03:14) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 11518 bytes, from 2016-02-10 21:03:25) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 16185 bytes, from 2016-03-05 03:08:05) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83967 bytes, from 2016-02-10 17:07:21) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 110685 bytes, from 2016-04-25 17:56:43) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32907 bytes, from 2016-11-26 23:01:08) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 12025 bytes, from 2016-11-26 23:01:08) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 23277 bytes, from 2016-12-24 05:01:47) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2016-11-26 23:01:08) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 110757 bytes, from 2016-12-26 17:51:07) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 100594 bytes, from 2017-01-20 23:03:30) - /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2015-09-24 17:30:00) -Copyright (C) 2013-2015 by the following authors: +Copyright (C) 2013-2016 by the following authors: - Rob Clark (robclark) - Ilia Mirkin (imirkin) @@ -206,12 +207,12 @@ }; enum a2xx_rb_blend_opcode { - BLEND_DST_PLUS_SRC = 0, - BLEND_SRC_MINUS_DST = 1, - BLEND_MIN_DST_SRC = 2, - BLEND_MAX_DST_SRC = 3, - BLEND_DST_MINUS_SRC = 4, - BLEND_DST_PLUS_SRC_BIAS = 5, + BLEND2_DST_PLUS_SRC = 0, + BLEND2_SRC_MINUS_DST = 1, + BLEND2_MIN_DST_SRC = 2, + BLEND2_MAX_DST_SRC = 3, + BLEND2_DST_MINUS_SRC = 4, + BLEND2_DST_PLUS_SRC_BIAS = 5, }; enum adreno_mmu_clnt_beh { @@ -444,12 +445,14 @@ #define A2XX_A220_VSC_BIN_SIZE_WIDTH__SHIFT 0 static inline uint32_t A2XX_A220_VSC_BIN_SIZE_WIDTH(uint32_t val) { + assert(!(val & 0x1f)); return ((val >> 5) << A2XX_A220_VSC_BIN_SIZE_WIDTH__SHIFT) & A2XX_A220_VSC_BIN_SIZE_WIDTH__MASK; } #define A2XX_A220_VSC_BIN_SIZE_HEIGHT__MASK 0x000003e0 #define A2XX_A220_VSC_BIN_SIZE_HEIGHT__SHIFT 5 static inline uint32_t A2XX_A220_VSC_BIN_SIZE_HEIGHT(uint32_t val) { + assert(!(val & 0x1f)); return ((val >> 5) << A2XX_A220_VSC_BIN_SIZE_HEIGHT__SHIFT) & A2XX_A220_VSC_BIN_SIZE_HEIGHT__MASK; } @@ -620,6 +623,7 @@ #define A2XX_RB_COLOR_INFO_BASE__SHIFT 12 static inline uint32_t A2XX_RB_COLOR_INFO_BASE(uint32_t val) { + assert(!(val & 0x3ff)); return ((val >> 10) << A2XX_RB_COLOR_INFO_BASE__SHIFT) & A2XX_RB_COLOR_INFO_BASE__MASK; } @@ -634,6 +638,7 @@ #define A2XX_RB_DEPTH_INFO_DEPTH_BASE__SHIFT 12 static inline uint32_t A2XX_RB_DEPTH_INFO_DEPTH_BASE(uint32_t val) { + assert(!(val & 0x3ff)); return ((val >> 10) << A2XX_RB_DEPTH_INFO_DEPTH_BASE__SHIFT) & A2XX_RB_DEPTH_INFO_DEPTH_BASE__MASK; } @@ -1431,6 +1436,7 @@ #define A2XX_RB_COPY_DEST_PITCH__SHIFT 0 static inline uint32_t A2XX_RB_COPY_DEST_PITCH(uint32_t val) { + assert(!(val & 0x1f)); return ((val >> 5) << A2XX_RB_COPY_DEST_PITCH__SHIFT) & A2XX_RB_COPY_DEST_PITCH__MASK; } @@ -1538,6 +1544,7 @@ #define A2XX_SQ_TEX_0_PITCH__SHIFT 22 static inline uint32_t A2XX_SQ_TEX_0_PITCH(uint32_t val) { + assert(!(val & 0x1f)); return ((val >> 5) << A2XX_SQ_TEX_0_PITCH__SHIFT) & A2XX_SQ_TEX_0_PITCH__MASK; } diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a2xx/disasm-a2xx.c mesa-17.0.7/src/gallium/drivers/freedreno/a2xx/disasm-a2xx.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a2xx/disasm-a2xx.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a2xx/disasm-a2xx.c 2017-06-01 10:37:10.000000000 +0000 @@ -111,6 +111,8 @@ case 0: name = "gl_FragColor"; break; } break; + case SHADER_COMPUTE: + unreachable("not reached"); } /* if we had a symbol table here, we could look * up the name of the varying.. diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a2xx/fd2_blend.c mesa-17.0.7/src/gallium/drivers/freedreno/a2xx/fd2_blend.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a2xx/fd2_blend.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a2xx/fd2_blend.c 2017-06-01 10:37:10.000000000 +0000 @@ -40,15 +40,15 @@ { switch (func) { case PIPE_BLEND_ADD: - return BLEND_DST_PLUS_SRC; + return BLEND2_DST_PLUS_SRC; case PIPE_BLEND_MIN: - return BLEND_MIN_DST_SRC; + return BLEND2_MIN_DST_SRC; case PIPE_BLEND_MAX: - return BLEND_MAX_DST_SRC; + return BLEND2_MAX_DST_SRC; case PIPE_BLEND_SUBTRACT: - return BLEND_SRC_MINUS_DST; + return BLEND2_SRC_MINUS_DST; case PIPE_BLEND_REVERSE_SUBTRACT: - return BLEND_DST_MINUS_SRC; + return BLEND2_DST_MINUS_SRC; default: DBG("invalid blend func: %x", func); return 0; diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c mesa-17.0.7/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c 2017-06-01 10:37:10.000000000 +0000 @@ -402,10 +402,10 @@ swiz[3] = swiz_vals[src->SwizzleW]; swiz[4] = '\0'; - if ((ctx->need_sync & (uint64_t)(1 << num)) && + if ((ctx->need_sync & ((uint64_t)1 << num)) && !(flags & IR2_REG_CONST)) { alu->sync = true; - ctx->need_sync &= ~(uint64_t)(1 << num); + ctx->need_sync &= ~((uint64_t)1 << num); } return ir2_reg_create(alu, num, swiz, flags); @@ -1080,11 +1080,6 @@ case TGSI_OPCODE_POW: translate_pow(ctx, inst); break; - case TGSI_OPCODE_ABS: - instr = ir2_instr_create_alu(cf, MAXv, ~0); - add_regs_vector_1(ctx, inst, instr); - instr->regs[1]->flags |= IR2_REG_NEGATE; /* src0 */ - break; case TGSI_OPCODE_COS: case TGSI_OPCODE_SIN: translate_trig(ctx, inst, opc); diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a2xx/fd2_context.c mesa-17.0.7/src/gallium/drivers/freedreno/a2xx/fd2_context.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a2xx/fd2_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a2xx/fd2_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -120,7 +120,5 @@ /* construct vertex state used for solid ops (clear, and gmem<->mem) */ fd2_ctx->solid_vertexbuf = create_solid_vertexbuf(pctx); - fd2_emit_setup(&fd2_ctx->base); - return pctx; } diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a2xx/fd2_draw.c mesa-17.0.7/src/gallium/drivers/freedreno/a2xx/fd2_draw.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a2xx/fd2_draw.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a2xx/fd2_draw.c 2017-06-01 10:37:10.000000000 +0000 @@ -76,13 +76,13 @@ // NOTE I believe the 0x78 (or 0x9c in solid_vp) relates to the // CONST(20,0) (or CONST(26,0) in soliv_vp) - fd2_emit_vertex_bufs(ctx->ring, 0x78, bufs, vtx->num_elements); + fd2_emit_vertex_bufs(ctx->batch->draw, 0x78, bufs, vtx->num_elements); } static bool fd2_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info) { - struct fd_ringbuffer *ring = ctx->ring; + struct fd_ringbuffer *ring = ctx->batch->draw; if (ctx->dirty & FD_DIRTY_VTXBUF) emit_vertexbufs(ctx); @@ -107,7 +107,7 @@ OUT_RING(ring, info->max_index); /* VGT_MAX_VTX_INDX */ OUT_RING(ring, info->min_index); /* VGT_MIN_VTX_INDX */ - fd_draw_emit(ctx, ring, ctx->primtypes[info->mode], + fd_draw_emit(ctx->batch, ring, ctx->primtypes[info->mode], IGNORE_VISIBILITY, info); OUT_PKT3(ring, CP_SET_CONSTANT, 2); @@ -125,8 +125,8 @@ const union pipe_color_union *color, double depth, unsigned stencil) { struct fd2_context *fd2_ctx = fd2_context(ctx); - struct fd_ringbuffer *ring = ctx->ring; - struct pipe_framebuffer_state *fb = &ctx->framebuffer; + struct fd_ringbuffer *ring = ctx->batch->draw; + struct pipe_framebuffer_state *fb = &ctx->batch->framebuffer; uint32_t reg, colr = 0; if ((buffers & PIPE_CLEAR_COLOR) && fb->nr_cbufs) @@ -266,7 +266,7 @@ OUT_RING(ring, 3); /* VGT_MAX_VTX_INDX */ OUT_RING(ring, 0); /* VGT_MIN_VTX_INDX */ - fd_draw(ctx, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY, + fd_draw(ctx->batch, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY, DI_SRC_SEL_AUTO_INDEX, 3, 0, INDEX_SIZE_IGN, 0, 0, NULL); OUT_PKT3(ring, CP_SET_CONSTANT, 2); diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a2xx/fd2_emit.c mesa-17.0.7/src/gallium/drivers/freedreno/a2xx/fd2_emit.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a2xx/fd2_emit.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a2xx/fd2_emit.c 2017-06-01 10:37:10.000000000 +0000 @@ -184,7 +184,7 @@ { struct fd2_blend_stateobj *blend = fd2_blend_stateobj(ctx->blend); struct fd2_zsa_stateobj *zsa = fd2_zsa_stateobj(ctx->zsa); - struct fd_ringbuffer *ring = ctx->ring; + struct fd_ringbuffer *ring = ctx->batch->draw; /* NOTE: we probably want to eventually refactor this so each state * object handles emitting it's own state.. although the mapping of @@ -250,10 +250,10 @@ OUT_RING(ring, xy2d(scissor->maxx, /* PA_SC_WINDOW_SCISSOR_BR */ scissor->maxy)); - ctx->max_scissor.minx = MIN2(ctx->max_scissor.minx, scissor->minx); - ctx->max_scissor.miny = MIN2(ctx->max_scissor.miny, scissor->miny); - ctx->max_scissor.maxx = MAX2(ctx->max_scissor.maxx, scissor->maxx); - ctx->max_scissor.maxy = MAX2(ctx->max_scissor.maxy, scissor->maxy); + ctx->batch->max_scissor.minx = MIN2(ctx->batch->max_scissor.minx, scissor->minx); + ctx->batch->max_scissor.miny = MIN2(ctx->batch->max_scissor.miny, scissor->miny); + ctx->batch->max_scissor.maxx = MAX2(ctx->batch->max_scissor.maxx, scissor->maxx); + ctx->batch->max_scissor.maxy = MAX2(ctx->batch->max_scissor.maxy, scissor->maxy); } if (dirty & FD_DIRTY_VIEWPORT) { @@ -316,10 +316,8 @@ /* emit per-context initialization: */ void -fd2_emit_setup(struct fd_context *ctx) +fd2_emit_restore(struct fd_context *ctx, struct fd_ringbuffer *ring) { - struct fd_ringbuffer *ring = ctx->ring; - OUT_PKT0(ring, REG_A2XX_TP0_CHICKEN, 1); OUT_RING(ring, 0x00000002); @@ -442,16 +440,12 @@ OUT_RING(ring, 0x00000000); /* RB_BLEND_GREEN */ OUT_RING(ring, 0x00000000); /* RB_BLEND_BLUE */ OUT_RING(ring, 0x000000ff); /* RB_BLEND_ALPHA */ - - fd_ringbuffer_flush(ring); - fd_ringmarker_mark(ctx->draw_start); } static void -fd2_emit_ib(struct fd_ringbuffer *ring, struct fd_ringmarker *start, - struct fd_ringmarker *end) +fd2_emit_ib(struct fd_ringbuffer *ring, struct fd_ringbuffer *target) { - __OUT_IB(ring, false, start, end); + __OUT_IB(ring, false, target); } void diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a2xx/fd2_emit.h mesa-17.0.7/src/gallium/drivers/freedreno/a2xx/fd2_emit.h --- mesa-12.0.6/src/gallium/drivers/freedreno/a2xx/fd2_emit.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a2xx/fd2_emit.h 2017-06-01 10:37:10.000000000 +0000 @@ -43,7 +43,7 @@ void fd2_emit_vertex_bufs(struct fd_ringbuffer *ring, uint32_t val, struct fd2_vertex_buf *vbufs, uint32_t n); void fd2_emit_state(struct fd_context *ctx, uint32_t dirty); -void fd2_emit_setup(struct fd_context *ctx); +void fd2_emit_restore(struct fd_context *ctx, struct fd_ringbuffer *ring); void fd2_emit_init(struct pipe_context *pctx); diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c mesa-17.0.7/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c 2017-06-01 10:37:10.000000000 +0000 @@ -56,10 +56,10 @@ /* transfer from gmem to system memory (ie. normal RAM) */ static void -emit_gmem2mem_surf(struct fd_context *ctx, uint32_t base, +emit_gmem2mem_surf(struct fd_batch *batch, uint32_t base, struct pipe_surface *psurf) { - struct fd_ringbuffer *ring = ctx->ring; + struct fd_ringbuffer *ring = batch->gmem; struct fd_resource *rsc = fd_resource(psurf->texture); uint32_t swap = fmt2swap(psurf->format); @@ -90,16 +90,17 @@ OUT_RING(ring, 3); /* VGT_MAX_VTX_INDX */ OUT_RING(ring, 0); /* VGT_MIN_VTX_INDX */ - fd_draw(ctx, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY, + fd_draw(batch, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY, DI_SRC_SEL_AUTO_INDEX, 3, 0, INDEX_SIZE_IGN, 0, 0, NULL); } static void -fd2_emit_tile_gmem2mem(struct fd_context *ctx, struct fd_tile *tile) +fd2_emit_tile_gmem2mem(struct fd_batch *batch, struct fd_tile *tile) { + struct fd_context *ctx = batch->ctx; struct fd2_context *fd2_ctx = fd2_context(ctx); - struct fd_ringbuffer *ring = ctx->ring; - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; + struct fd_ringbuffer *ring = batch->gmem; + struct pipe_framebuffer_state *pfb = &batch->framebuffer; fd2_emit_vertex_bufs(ring, 0x9c, (struct fd2_vertex_buf[]) { { .prsc = fd2_ctx->solid_vertexbuf, .size = 48 }, @@ -159,11 +160,11 @@ OUT_RING(ring, A2XX_RB_COPY_DEST_OFFSET_X(tile->xoff) | A2XX_RB_COPY_DEST_OFFSET_Y(tile->yoff)); - if (ctx->resolve & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)) - emit_gmem2mem_surf(ctx, tile->bin_w * tile->bin_h, pfb->zsbuf); + if (batch->resolve & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)) + emit_gmem2mem_surf(batch, tile->bin_w * tile->bin_h, pfb->zsbuf); - if (ctx->resolve & FD_BUFFER_COLOR) - emit_gmem2mem_surf(ctx, 0, pfb->cbufs[0]); + if (batch->resolve & FD_BUFFER_COLOR) + emit_gmem2mem_surf(batch, 0, pfb->cbufs[0]); OUT_PKT3(ring, CP_SET_CONSTANT, 2); OUT_RING(ring, CP_REG(REG_A2XX_RB_MODECONTROL)); @@ -173,10 +174,10 @@ /* transfer from system memory to gmem */ static void -emit_mem2gmem_surf(struct fd_context *ctx, uint32_t base, +emit_mem2gmem_surf(struct fd_batch *batch, uint32_t base, struct pipe_surface *psurf) { - struct fd_ringbuffer *ring = ctx->ring; + struct fd_ringbuffer *ring = batch->gmem; struct fd_resource *rsc = fd_resource(psurf->texture); uint32_t swiz; @@ -212,16 +213,17 @@ OUT_RING(ring, 3); /* VGT_MAX_VTX_INDX */ OUT_RING(ring, 0); /* VGT_MIN_VTX_INDX */ - fd_draw(ctx, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY, + fd_draw(batch, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY, DI_SRC_SEL_AUTO_INDEX, 3, 0, INDEX_SIZE_IGN, 0, 0, NULL); } static void -fd2_emit_tile_mem2gmem(struct fd_context *ctx, struct fd_tile *tile) +fd2_emit_tile_mem2gmem(struct fd_batch *batch, struct fd_tile *tile) { + struct fd_context *ctx = batch->ctx; struct fd2_context *fd2_ctx = fd2_context(ctx); - struct fd_ringbuffer *ring = ctx->ring; - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; + struct fd_ringbuffer *ring = batch->gmem; + struct pipe_framebuffer_state *pfb = &batch->framebuffer; unsigned bin_w = tile->bin_w; unsigned bin_h = tile->bin_h; float x0, y0, x1, y1; @@ -317,25 +319,28 @@ OUT_RING(ring, CP_REG(REG_A2XX_PA_CL_CLIP_CNTL)); OUT_RING(ring, 0x00000000); - if (fd_gmem_needs_restore(ctx, tile, FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)) - emit_mem2gmem_surf(ctx, bin_w * bin_h, pfb->zsbuf); + if (fd_gmem_needs_restore(batch, tile, FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)) + emit_mem2gmem_surf(batch, bin_w * bin_h, pfb->zsbuf); - if (fd_gmem_needs_restore(ctx, tile, FD_BUFFER_COLOR)) - emit_mem2gmem_surf(ctx, 0, pfb->cbufs[0]); + if (fd_gmem_needs_restore(batch, tile, FD_BUFFER_COLOR)) + emit_mem2gmem_surf(batch, 0, pfb->cbufs[0]); /* TODO blob driver seems to toss in a CACHE_FLUSH after each DRAW_INDX.. */ } /* before first tile */ static void -fd2_emit_tile_init(struct fd_context *ctx) +fd2_emit_tile_init(struct fd_batch *batch) { - struct fd_ringbuffer *ring = ctx->ring; - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; + struct fd_context *ctx = batch->ctx; + struct fd_ringbuffer *ring = batch->gmem; + struct pipe_framebuffer_state *pfb = &batch->framebuffer; struct fd_gmem_stateobj *gmem = &ctx->gmem; enum pipe_format format = pipe_surface_format(pfb->cbufs[0]); uint32_t reg; + fd2_emit_restore(ctx, ring); + OUT_PKT3(ring, CP_SET_CONSTANT, 4); OUT_RING(ring, CP_REG(REG_A2XX_RB_SURFACE_INFO)); OUT_RING(ring, gmem->bin_w); /* RB_SURFACE_INFO */ @@ -349,10 +354,10 @@ /* before mem2gmem */ static void -fd2_emit_tile_prep(struct fd_context *ctx, struct fd_tile *tile) +fd2_emit_tile_prep(struct fd_batch *batch, struct fd_tile *tile) { - struct fd_ringbuffer *ring = ctx->ring; - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; + struct fd_ringbuffer *ring = batch->gmem; + struct pipe_framebuffer_state *pfb = &batch->framebuffer; enum pipe_format format = pipe_surface_format(pfb->cbufs[0]); OUT_PKT3(ring, CP_SET_CONSTANT, 2); @@ -371,10 +376,10 @@ /* before IB to rendering cmds: */ static void -fd2_emit_tile_renderprep(struct fd_context *ctx, struct fd_tile *tile) +fd2_emit_tile_renderprep(struct fd_batch *batch, struct fd_tile *tile) { - struct fd_ringbuffer *ring = ctx->ring; - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; + struct fd_ringbuffer *ring = batch->gmem; + struct pipe_framebuffer_state *pfb = &batch->framebuffer; enum pipe_format format = pipe_surface_format(pfb->cbufs[0]); OUT_PKT3(ring, CP_SET_CONSTANT, 2); diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a2xx/fd2_screen.c mesa-17.0.7/src/gallium/drivers/freedreno/a2xx/fd2_screen.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a2xx/fd2_screen.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a2xx/fd2_screen.c 2017-06-01 10:37:10.000000000 +0000 @@ -61,7 +61,7 @@ if ((usage & (PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_VERTEX_BUFFER)) && - (fd2_pipe2surface(format) != ~0)) { + (fd2_pipe2surface(format) != (enum a2xx_sq_surfaceformat)~0)) { retval |= usage & (PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_VERTEX_BUFFER); } @@ -70,7 +70,7 @@ PIPE_BIND_DISPLAY_TARGET | PIPE_BIND_SCANOUT | PIPE_BIND_SHARED)) && - (fd2_pipe2color(format) != ~0)) { + (fd2_pipe2color(format) != (enum a2xx_colorformatx)~0)) { retval |= usage & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DISPLAY_TARGET | PIPE_BIND_SCANOUT | @@ -78,20 +78,15 @@ } if ((usage & PIPE_BIND_DEPTH_STENCIL) && - (fd_pipe2depth(format) != ~0)) { + (fd_pipe2depth(format) != (enum adreno_rb_depth_format)~0)) { retval |= PIPE_BIND_DEPTH_STENCIL; } if ((usage & PIPE_BIND_INDEX_BUFFER) && - (fd_pipe2index(format) != ~0)) { + (fd_pipe2index(format) != (enum pc_di_index_size)~0)) { retval |= PIPE_BIND_INDEX_BUFFER; } - if (usage & PIPE_BIND_TRANSFER_READ) - retval |= PIPE_BIND_TRANSFER_READ; - if (usage & PIPE_BIND_TRANSFER_WRITE) - retval |= PIPE_BIND_TRANSFER_WRITE; - if (retval != usage) { DBG("not supported: format=%s, target=%d, sample_count=%d, " "usage=%x, retval=%x", util_format_name(format), diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a2xx/fd2_texture.c mesa-17.0.7/src/gallium/drivers/freedreno/a2xx/fd2_texture.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a2xx/fd2_texture.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a2xx/fd2_texture.c 2017-06-01 10:37:10.000000000 +0000 @@ -103,7 +103,7 @@ static void fd2_sampler_states_bind(struct pipe_context *pctx, - unsigned shader, unsigned start, + enum pipe_shader_type shader, unsigned start, unsigned nr, void **hwcso) { if (!hwcso) diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a2xx/ir-a2xx.c mesa-17.0.7/src/gallium/drivers/freedreno/a2xx/ir-a2xx.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a2xx/ir-a2xx.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a2xx/ir-a2xx.c 2017-06-01 10:37:10.000000000 +0000 @@ -403,7 +403,7 @@ assert((src2_reg->flags & IR2_REG_EXPORT) == 0); assert(!src2_reg->swizzle || (strlen(src2_reg->swizzle) == 4)); - if (instr->alu.vector_opc == ~0) { + if (instr->alu.vector_opc == (instr_vector_opc_t)~0) { alu->vector_opc = MAXv; alu->vector_write_mask = 0; } else { @@ -431,7 +431,7 @@ alu->vector_clamp = instr->alu.vector_clamp; alu->scalar_clamp = instr->alu.scalar_clamp; - if (instr->alu.scalar_opc != ~0) { + if (instr->alu.scalar_opc != (instr_scalar_opc_t)~0) { struct ir2_register *sdst_reg = instr->regs[reg++]; reg_update_stats(sdst_reg, info, true); diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a2xx/ir-a2xx.h mesa-17.0.7/src/gallium/drivers/freedreno/a2xx/ir-a2xx.h --- mesa-12.0.6/src/gallium/drivers/freedreno/a2xx/ir-a2xx.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a2xx/ir-a2xx.h 2017-06-01 10:37:10.000000000 +0000 @@ -158,7 +158,7 @@ ir2_instr_create_vtx_fetch(struct ir2_cf *cf, int ci, int cis, enum a2xx_sq_surfaceformat fmt, bool is_signed, int stride) { - struct ir2_instruction *instr = instr = ir2_instr_create(cf, IR2_FETCH); + struct ir2_instruction *instr = ir2_instr_create(cf, IR2_FETCH); instr->fetch.opc = VTX_FETCH; instr->fetch.const_idx = ci; instr->fetch.const_idx_sel = cis; @@ -170,7 +170,7 @@ static inline struct ir2_instruction * ir2_instr_create_tex_fetch(struct ir2_cf *cf, int ci) { - struct ir2_instruction *instr = instr = ir2_instr_create(cf, IR2_FETCH); + struct ir2_instruction *instr = ir2_instr_create(cf, IR2_FETCH); instr->fetch.opc = TEX_FETCH; instr->fetch.const_idx = ci; return instr; diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h --- mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h 2017-06-01 10:37:10.000000000 +0000 @@ -8,13 +8,14 @@ git clone https://github.com/freedreno/envytools.git The rules-ng-ng source files this header was generated from are: -- /home/robclark/src/freedreno/envytools/rnndb/adreno.xml ( 398 bytes, from 2015-09-24 17:25:31) +- /home/robclark/src/freedreno/envytools/rnndb/adreno.xml ( 431 bytes, from 2016-04-26 17:56:44) - /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2016-02-10 17:07:21) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32901 bytes, from 2015-05-20 20:03:14) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 11518 bytes, from 2016-02-10 21:03:25) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 16185 bytes, from 2016-03-05 03:08:05) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83967 bytes, from 2016-02-10 17:07:21) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 110685 bytes, from 2016-04-25 17:56:43) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32907 bytes, from 2016-11-26 23:01:08) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 12025 bytes, from 2016-11-26 23:01:08) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 23277 bytes, from 2016-12-24 05:01:47) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2016-11-26 23:01:08) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 110757 bytes, from 2016-12-26 17:51:07) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 100594 bytes, from 2017-01-20 23:03:30) - /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2015-09-24 17:30:00) Copyright (C) 2013-2016 by the following authors: @@ -129,10 +130,14 @@ TFMT_Z16_UNORM = 9, TFMT_X8Z24_UNORM = 10, TFMT_Z32_FLOAT = 11, - TFMT_NV12_UV_TILED = 17, - TFMT_NV12_Y_TILED = 19, - TFMT_NV12_UV = 21, - TFMT_NV12_Y = 23, + TFMT_UV_64X32 = 16, + TFMT_VU_64X32 = 17, + TFMT_Y_64X32 = 18, + TFMT_NV12_64X32 = 19, + TFMT_UV_LINEAR = 20, + TFMT_VU_LINEAR = 21, + TFMT_Y_LINEAR = 22, + TFMT_NV12_LINEAR = 23, TFMT_I420_Y = 24, TFMT_I420_U = 26, TFMT_I420_V = 27, @@ -525,14 +530,6 @@ UCHE_UCHEPERF_ACTIVE_CYCLES = 20, }; -enum a3xx_rb_blend_opcode { - BLEND_DST_PLUS_SRC = 0, - BLEND_SRC_MINUS_DST = 1, - BLEND_DST_MINUS_SRC = 2, - BLEND_MIN_DST_SRC = 3, - BLEND_MAX_DST_SRC = 4, -}; - enum a3xx_intp_mode { SMOOTH = 0, FLAT = 1, @@ -1167,6 +1164,7 @@ #define A3XX_RB_RENDER_CONTROL_BIN_WIDTH__SHIFT 4 static inline uint32_t A3XX_RB_RENDER_CONTROL_BIN_WIDTH(uint32_t val) { + assert(!(val & 0x1f)); return ((val >> 5) << A3XX_RB_RENDER_CONTROL_BIN_WIDTH__SHIFT) & A3XX_RB_RENDER_CONTROL_BIN_WIDTH__MASK; } #define A3XX_RB_RENDER_CONTROL_DISABLE_COLOR_PIPE 0x00001000 @@ -1265,6 +1263,7 @@ #define A3XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH__SHIFT 17 static inline uint32_t A3XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH(uint32_t val) { + assert(!(val & 0x1f)); return ((val >> 5) << A3XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH__SHIFT) & A3XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH__MASK; } @@ -1273,6 +1272,7 @@ #define A3XX_RB_MRT_BUF_BASE_COLOR_BUF_BASE__SHIFT 4 static inline uint32_t A3XX_RB_MRT_BUF_BASE_COLOR_BUF_BASE(uint32_t val) { + assert(!(val & 0x1f)); return ((val >> 5) << A3XX_RB_MRT_BUF_BASE_COLOR_BUF_BASE__SHIFT) & A3XX_RB_MRT_BUF_BASE_COLOR_BUF_BASE__MASK; } @@ -1393,17 +1393,19 @@ { return ((val) << A3XX_RB_COPY_CONTROL_MODE__SHIFT) & A3XX_RB_COPY_CONTROL_MODE__MASK; } +#define A3XX_RB_COPY_CONTROL_MSAA_SRGB_DOWNSAMPLE 0x00000080 #define A3XX_RB_COPY_CONTROL_FASTCLEAR__MASK 0x00000f00 #define A3XX_RB_COPY_CONTROL_FASTCLEAR__SHIFT 8 static inline uint32_t A3XX_RB_COPY_CONTROL_FASTCLEAR(uint32_t val) { return ((val) << A3XX_RB_COPY_CONTROL_FASTCLEAR__SHIFT) & A3XX_RB_COPY_CONTROL_FASTCLEAR__MASK; } -#define A3XX_RB_COPY_CONTROL_UNK12 0x00001000 +#define A3XX_RB_COPY_CONTROL_DEPTH32_RESOLVE 0x00001000 #define A3XX_RB_COPY_CONTROL_GMEM_BASE__MASK 0xffffc000 #define A3XX_RB_COPY_CONTROL_GMEM_BASE__SHIFT 14 static inline uint32_t A3XX_RB_COPY_CONTROL_GMEM_BASE(uint32_t val) { + assert(!(val & 0x3fff)); return ((val >> 14) << A3XX_RB_COPY_CONTROL_GMEM_BASE__SHIFT) & A3XX_RB_COPY_CONTROL_GMEM_BASE__MASK; } @@ -1412,6 +1414,7 @@ #define A3XX_RB_COPY_DEST_BASE_BASE__SHIFT 4 static inline uint32_t A3XX_RB_COPY_DEST_BASE_BASE(uint32_t val) { + assert(!(val & 0x1f)); return ((val >> 5) << A3XX_RB_COPY_DEST_BASE_BASE__SHIFT) & A3XX_RB_COPY_DEST_BASE_BASE__MASK; } @@ -1420,6 +1423,7 @@ #define A3XX_RB_COPY_DEST_PITCH_PITCH__SHIFT 0 static inline uint32_t A3XX_RB_COPY_DEST_PITCH_PITCH(uint32_t val) { + assert(!(val & 0x1f)); return ((val >> 5) << A3XX_RB_COPY_DEST_PITCH_PITCH__SHIFT) & A3XX_RB_COPY_DEST_PITCH_PITCH__MASK; } @@ -1488,6 +1492,7 @@ #define A3XX_RB_DEPTH_INFO_DEPTH_BASE__SHIFT 11 static inline uint32_t A3XX_RB_DEPTH_INFO_DEPTH_BASE(uint32_t val) { + assert(!(val & 0xfff)); return ((val >> 12) << A3XX_RB_DEPTH_INFO_DEPTH_BASE__SHIFT) & A3XX_RB_DEPTH_INFO_DEPTH_BASE__MASK; } @@ -1496,6 +1501,7 @@ #define A3XX_RB_DEPTH_PITCH__SHIFT 0 static inline uint32_t A3XX_RB_DEPTH_PITCH(uint32_t val) { + assert(!(val & 0x7)); return ((val >> 3) << A3XX_RB_DEPTH_PITCH__SHIFT) & A3XX_RB_DEPTH_PITCH__MASK; } @@ -1559,6 +1565,7 @@ #define A3XX_RB_STENCIL_INFO_STENCIL_BASE__SHIFT 11 static inline uint32_t A3XX_RB_STENCIL_INFO_STENCIL_BASE(uint32_t val) { + assert(!(val & 0xfff)); return ((val >> 12) << A3XX_RB_STENCIL_INFO_STENCIL_BASE__SHIFT) & A3XX_RB_STENCIL_INFO_STENCIL_BASE__MASK; } @@ -1567,6 +1574,7 @@ #define A3XX_RB_STENCIL_PITCH__SHIFT 0 static inline uint32_t A3XX_RB_STENCIL_PITCH(uint32_t val) { + assert(!(val & 0x7)); return ((val >> 3) << A3XX_RB_STENCIL_PITCH__SHIFT) & A3XX_RB_STENCIL_PITCH__MASK; } @@ -2484,6 +2492,7 @@ #define A3XX_SP_VS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS__SHIFT 5 static inline uint32_t A3XX_SP_VS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS(uint32_t val) { + assert(!(val & 0x1f)); return ((val >> 5) << A3XX_SP_VS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS__SHIFT) & A3XX_SP_VS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS__MASK; } @@ -2622,6 +2631,7 @@ #define A3XX_SP_FS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS__SHIFT 5 static inline uint32_t A3XX_SP_FS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS(uint32_t val) { + assert(!(val & 0x1f)); return ((val >> 5) << A3XX_SP_FS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS__SHIFT) & A3XX_SP_FS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS__MASK; } @@ -2802,12 +2812,14 @@ #define A3XX_VSC_BIN_SIZE_WIDTH__SHIFT 0 static inline uint32_t A3XX_VSC_BIN_SIZE_WIDTH(uint32_t val) { + assert(!(val & 0x1f)); return ((val >> 5) << A3XX_VSC_BIN_SIZE_WIDTH__SHIFT) & A3XX_VSC_BIN_SIZE_WIDTH__MASK; } #define A3XX_VSC_BIN_SIZE_HEIGHT__MASK 0x000003e0 #define A3XX_VSC_BIN_SIZE_HEIGHT__SHIFT 5 static inline uint32_t A3XX_VSC_BIN_SIZE_HEIGHT(uint32_t val) { + assert(!(val & 0x1f)); return ((val >> 5) << A3XX_VSC_BIN_SIZE_HEIGHT__SHIFT) & A3XX_VSC_BIN_SIZE_HEIGHT__MASK; } @@ -3204,6 +3216,7 @@ #define A3XX_TEX_CONST_3_LAYERSZ1__SHIFT 0 static inline uint32_t A3XX_TEX_CONST_3_LAYERSZ1(uint32_t val) { + assert(!(val & 0xfff)); return ((val >> 12) << A3XX_TEX_CONST_3_LAYERSZ1__SHIFT) & A3XX_TEX_CONST_3_LAYERSZ1__MASK; } #define A3XX_TEX_CONST_3_DEPTH__MASK 0x0ffe0000 @@ -3216,6 +3229,7 @@ #define A3XX_TEX_CONST_3_LAYERSZ2__SHIFT 28 static inline uint32_t A3XX_TEX_CONST_3_LAYERSZ2(uint32_t val) { + assert(!(val & 0xfff)); return ((val >> 12) << A3XX_TEX_CONST_3_LAYERSZ2__SHIFT) & A3XX_TEX_CONST_3_LAYERSZ2__MASK; } diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/fd3_context.c mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/fd3_context.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/fd3_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/fd3_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -43,51 +43,18 @@ { struct fd3_context *fd3_ctx = fd3_context(fd_context(pctx)); - util_dynarray_fini(&fd3_ctx->rbrc_patches); - fd_bo_del(fd3_ctx->vs_pvt_mem); fd_bo_del(fd3_ctx->fs_pvt_mem); fd_bo_del(fd3_ctx->vsc_size_mem); - pctx->delete_vertex_elements_state(pctx, fd3_ctx->solid_vbuf_state.vtx); - pctx->delete_vertex_elements_state(pctx, fd3_ctx->blit_vbuf_state.vtx); - - pipe_resource_reference(&fd3_ctx->solid_vbuf, NULL); - pipe_resource_reference(&fd3_ctx->blit_texcoord_vbuf, NULL); + fd_context_cleanup_common_vbos(&fd3_ctx->base); u_upload_destroy(fd3_ctx->border_color_uploader); fd_context_destroy(pctx); } -/* TODO we could combine a few of these small buffers (solid_vbuf, - * blit_texcoord_vbuf, and vsc_size_mem, into a single buffer and - * save a tiny bit of memory - */ - -static struct pipe_resource * -create_solid_vertexbuf(struct pipe_context *pctx) -{ - static const float init_shader_const[] = { - -1.000000, +1.000000, +1.000000, - +1.000000, -1.000000, +1.000000, - }; - struct pipe_resource *prsc = pipe_buffer_create(pctx->screen, - PIPE_BIND_CUSTOM, PIPE_USAGE_IMMUTABLE, sizeof(init_shader_const)); - pipe_buffer_write(pctx, prsc, 0, - sizeof(init_shader_const), init_shader_const); - return prsc; -} - -static struct pipe_resource * -create_blit_texcoord_vertexbuf(struct pipe_context *pctx) -{ - struct pipe_resource *prsc = pipe_buffer_create(pctx->screen, - PIPE_BIND_CUSTOM, PIPE_USAGE_DYNAMIC, 16); - return prsc; -} - -static const uint8_t primtypes[PIPE_PRIM_MAX] = { +static const uint8_t primtypes[] = { [PIPE_PRIM_POINTS] = DI_PT_POINTLIST, [PIPE_PRIM_LINES] = DI_PT_LINELIST, [PIPE_PRIM_LINE_STRIP] = DI_PT_LINESTRIP, @@ -95,6 +62,7 @@ [PIPE_PRIM_TRIANGLES] = DI_PT_TRILIST, [PIPE_PRIM_TRIANGLE_STRIP] = DI_PT_TRISTRIP, [PIPE_PRIM_TRIANGLE_FAN] = DI_PT_TRIFAN, + [PIPE_PRIM_MAX] = DI_PT_RECTLIST, /* internal clear blits */ }; struct pipe_context * @@ -127,8 +95,6 @@ if (!pctx) return NULL; - util_dynarray_init(&fd3_ctx->rbrc_patches); - fd3_ctx->vs_pvt_mem = fd_bo_new(screen->dev, 0x2000, DRM_FREEDRENO_GEM_TYPE_KMEM); @@ -138,36 +104,7 @@ fd3_ctx->vsc_size_mem = fd_bo_new(screen->dev, 0x1000, DRM_FREEDRENO_GEM_TYPE_KMEM); - fd3_ctx->solid_vbuf = create_solid_vertexbuf(pctx); - fd3_ctx->blit_texcoord_vbuf = create_blit_texcoord_vertexbuf(pctx); - - /* setup solid_vbuf_state: */ - fd3_ctx->solid_vbuf_state.vtx = pctx->create_vertex_elements_state( - pctx, 1, (struct pipe_vertex_element[]){{ - .vertex_buffer_index = 0, - .src_offset = 0, - .src_format = PIPE_FORMAT_R32G32B32_FLOAT, - }}); - fd3_ctx->solid_vbuf_state.vertexbuf.count = 1; - fd3_ctx->solid_vbuf_state.vertexbuf.vb[0].stride = 12; - fd3_ctx->solid_vbuf_state.vertexbuf.vb[0].buffer = fd3_ctx->solid_vbuf; - - /* setup blit_vbuf_state: */ - fd3_ctx->blit_vbuf_state.vtx = pctx->create_vertex_elements_state( - pctx, 2, (struct pipe_vertex_element[]){{ - .vertex_buffer_index = 0, - .src_offset = 0, - .src_format = PIPE_FORMAT_R32G32_FLOAT, - }, { - .vertex_buffer_index = 1, - .src_offset = 0, - .src_format = PIPE_FORMAT_R32G32B32_FLOAT, - }}); - fd3_ctx->blit_vbuf_state.vertexbuf.count = 2; - fd3_ctx->blit_vbuf_state.vertexbuf.vb[0].stride = 8; - fd3_ctx->blit_vbuf_state.vertexbuf.vb[0].buffer = fd3_ctx->blit_texcoord_vbuf; - fd3_ctx->blit_vbuf_state.vertexbuf.vb[1].stride = 12; - fd3_ctx->blit_vbuf_state.vertexbuf.vb[1].buffer = fd3_ctx->solid_vbuf; + fd_context_setup_common_vbos(&fd3_ctx->base); fd3_query_context_init(pctx); diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/fd3_context.h mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/fd3_context.h --- mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/fd3_context.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/fd3_context.h 2017-06-01 10:37:10.000000000 +0000 @@ -41,11 +41,6 @@ struct fd3_context { struct fd_context base; - /* Keep track of writes to RB_RENDER_CONTROL which need to be patched - * once we know whether or not to use GMEM, and GMEM tile pitch. - */ - struct util_dynarray rbrc_patches; - struct fd_bo *vs_pvt_mem, *fs_pvt_mem; /* This only needs to be 4 * num_of_pipes bytes (ie. 32 bytes). We @@ -53,26 +48,6 @@ */ struct fd_bo *vsc_size_mem; - /* vertex buf used for clear/gmem->mem vertices, and mem->gmem - * vertices: - */ - struct pipe_resource *solid_vbuf; - - /* vertex buf used for mem->gmem tex coords: - */ - struct pipe_resource *blit_texcoord_vbuf; - - /* vertex state for solid_vbuf: - * - solid_vbuf / 12 / R32G32B32_FLOAT - */ - struct fd_vertex_state solid_vbuf_state; - - /* vertex state for blit_prog: - * - blit_texcoord_vbuf / 8 / R32G32_FLOAT - * - solid_vbuf / 12 / R32G32B32_FLOAT - */ - struct fd_vertex_state blit_vbuf_state; - struct u_upload_mgr *border_color_uploader; struct pipe_resource *border_color_buf; diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/fd3_draw.c mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/fd3_draw.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/fd3_draw.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/fd3_draw.c 2017-06-01 10:37:10.000000000 +0000 @@ -84,8 +84,7 @@ (info->mode == PIPE_PRIM_POINTS)) primtype = DI_PT_POINTLIST_PSIZE; - fd_draw_emit(ctx, ring, - primtype, + fd_draw_emit(ctx->batch, ring, primtype, emit->key.binning_pass ? IGNORE_VISIBILITY : USE_VISIBILITY, info); } @@ -125,6 +124,9 @@ if (last_key->half_precision != key->half_precision) ctx->dirty |= FD_SHADER_DIRTY_FP; + if (last_key->ucp_enables != key->ucp_enables) + ctx->dirty |= FD_SHADER_DIRTY_FP | FD_SHADER_DIRTY_VP; + fd3_ctx->last_key = *key; } } @@ -142,9 +144,8 @@ .color_two_side = ctx->rasterizer->light_twoside, .vclamp_color = ctx->rasterizer->clamp_vertex_color, .fclamp_color = ctx->rasterizer->clamp_fragment_color, - // TODO set .half_precision based on render target format, - // ie. float16 and smaller use half, float32 use full.. - .half_precision = !!(fd_mesa_debug & FD_DBG_FRAGHALF), + .half_precision = ctx->in_blit && + fd_half_precision(&ctx->batch->framebuffer), .has_per_samp = (fd3_ctx->fsaturate || fd3_ctx->vsaturate), .vsaturate_s = fd3_ctx->vsaturate_s, .vsaturate_t = fd3_ctx->vsaturate_t, @@ -172,219 +173,21 @@ emit.key.binning_pass = false; emit.dirty = dirty; - draw_impl(ctx, ctx->ring, &emit); + draw_impl(ctx, ctx->batch->draw, &emit); /* and now binning pass: */ emit.key.binning_pass = true; emit.dirty = dirty & ~(FD_DIRTY_BLEND); emit.vp = NULL; /* we changed key so need to refetch vp */ emit.fp = NULL; - draw_impl(ctx, ctx->binning_ring, &emit); + draw_impl(ctx, ctx->batch->binning, &emit); return true; } -/* clear operations ignore viewport state, so we need to reset it - * based on framebuffer state: - */ -static void -reset_viewport(struct fd_ringbuffer *ring, struct pipe_framebuffer_state *pfb) -{ - float half_width = pfb->width * 0.5f; - float half_height = pfb->height * 0.5f; - - OUT_PKT0(ring, REG_A3XX_GRAS_CL_VPORT_XOFFSET, 4); - OUT_RING(ring, A3XX_GRAS_CL_VPORT_XOFFSET(half_width - 0.5)); - OUT_RING(ring, A3XX_GRAS_CL_VPORT_XSCALE(half_width)); - OUT_RING(ring, A3XX_GRAS_CL_VPORT_YOFFSET(half_height - 0.5)); - OUT_RING(ring, A3XX_GRAS_CL_VPORT_YSCALE(-half_height)); -} - -/* binning pass cmds for a clear: - * NOTE: newer blob drivers don't use binning for clear, which is probably - * preferable since it is low vtx count. However that doesn't seem to - * actually work for me. Not sure if it is depending on support for - * clear pass (rather than using solid-fill shader), or something else - * that newer blob is doing differently. Once that is figured out, we - * can remove fd3_clear_binning(). - */ -static void -fd3_clear_binning(struct fd_context *ctx, unsigned dirty) -{ - struct fd3_context *fd3_ctx = fd3_context(ctx); - struct fd_ringbuffer *ring = ctx->binning_ring; - struct fd3_emit emit = { - .debug = &ctx->debug, - .vtx = &fd3_ctx->solid_vbuf_state, - .prog = &ctx->solid_prog, - .key = { - .binning_pass = true, - .half_precision = true, - }, - .dirty = dirty, - }; - - fd3_emit_state(ctx, ring, &emit); - fd3_emit_vertex_bufs(ring, &emit); - reset_viewport(ring, &ctx->framebuffer); - - OUT_PKT0(ring, REG_A3XX_PC_PRIM_VTX_CNTL, 1); - OUT_RING(ring, A3XX_PC_PRIM_VTX_CNTL_STRIDE_IN_VPC(0) | - A3XX_PC_PRIM_VTX_CNTL_POLYMODE_FRONT_PTYPE(PC_DRAW_TRIANGLES) | - A3XX_PC_PRIM_VTX_CNTL_POLYMODE_BACK_PTYPE(PC_DRAW_TRIANGLES) | - A3XX_PC_PRIM_VTX_CNTL_PROVOKING_VTX_LAST); - OUT_PKT0(ring, REG_A3XX_VFD_INDEX_MIN, 4); - OUT_RING(ring, 0); /* VFD_INDEX_MIN */ - OUT_RING(ring, 2); /* VFD_INDEX_MAX */ - OUT_RING(ring, 0); /* VFD_INSTANCEID_OFFSET */ - OUT_RING(ring, 0); /* VFD_INDEX_OFFSET */ - OUT_PKT0(ring, REG_A3XX_PC_RESTART_INDEX, 1); - OUT_RING(ring, 0xffffffff); /* PC_RESTART_INDEX */ - - fd_event_write(ctx, ring, PERFCOUNTER_STOP); - - fd_draw(ctx, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY, - DI_SRC_SEL_AUTO_INDEX, 2, 0, INDEX_SIZE_IGN, 0, 0, NULL); -} - -static void -fd3_clear(struct fd_context *ctx, unsigned buffers, - const union pipe_color_union *color, double depth, unsigned stencil) -{ - struct fd3_context *fd3_ctx = fd3_context(ctx); - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; - struct fd_ringbuffer *ring = ctx->ring; - unsigned dirty = ctx->dirty; - unsigned i; - struct fd3_emit emit = { - .debug = &ctx->debug, - .vtx = &fd3_ctx->solid_vbuf_state, - .prog = &ctx->solid_prog, - .key = { - .half_precision = fd_half_precision(pfb), - }, - }; - - dirty &= FD_DIRTY_FRAMEBUFFER | FD_DIRTY_SCISSOR; - dirty |= FD_DIRTY_PROG; - emit.dirty = dirty; - - fd3_clear_binning(ctx, dirty); - - /* emit generic state now: */ - fd3_emit_state(ctx, ring, &emit); - reset_viewport(ring, &ctx->framebuffer); - - OUT_PKT0(ring, REG_A3XX_RB_BLEND_ALPHA, 1); - OUT_RING(ring, A3XX_RB_BLEND_ALPHA_UINT(0xff) | - A3XX_RB_BLEND_ALPHA_FLOAT(1.0)); - - OUT_PKT0(ring, REG_A3XX_RB_RENDER_CONTROL, 1); - OUT_RINGP(ring, A3XX_RB_RENDER_CONTROL_ALPHA_TEST_FUNC(FUNC_NEVER), - &fd3_ctx->rbrc_patches); - - if (buffers & PIPE_CLEAR_DEPTH) { - OUT_PKT0(ring, REG_A3XX_RB_DEPTH_CONTROL, 1); - OUT_RING(ring, A3XX_RB_DEPTH_CONTROL_Z_WRITE_ENABLE | - A3XX_RB_DEPTH_CONTROL_Z_ENABLE | - A3XX_RB_DEPTH_CONTROL_ZFUNC(FUNC_ALWAYS)); - - fd_wfi(ctx, ring); - OUT_PKT0(ring, REG_A3XX_GRAS_CL_VPORT_ZOFFSET, 2); - OUT_RING(ring, A3XX_GRAS_CL_VPORT_ZOFFSET(0.0)); - OUT_RING(ring, A3XX_GRAS_CL_VPORT_ZSCALE(depth)); - ctx->dirty |= FD_DIRTY_VIEWPORT; - } else { - OUT_PKT0(ring, REG_A3XX_RB_DEPTH_CONTROL, 1); - OUT_RING(ring, A3XX_RB_DEPTH_CONTROL_ZFUNC(FUNC_NEVER)); - } - - if (buffers & PIPE_CLEAR_STENCIL) { - OUT_PKT0(ring, REG_A3XX_RB_STENCILREFMASK, 2); - OUT_RING(ring, A3XX_RB_STENCILREFMASK_STENCILREF(stencil) | - A3XX_RB_STENCILREFMASK_STENCILMASK(stencil) | - A3XX_RB_STENCILREFMASK_STENCILWRITEMASK(0xff)); - OUT_RING(ring, A3XX_RB_STENCILREFMASK_STENCILREF(0) | - A3XX_RB_STENCILREFMASK_STENCILMASK(0) | - 0xff000000 | // XXX ??? - A3XX_RB_STENCILREFMASK_STENCILWRITEMASK(0xff)); - - OUT_PKT0(ring, REG_A3XX_RB_STENCIL_CONTROL, 1); - OUT_RING(ring, A3XX_RB_STENCIL_CONTROL_STENCIL_ENABLE | - A3XX_RB_STENCIL_CONTROL_FUNC(FUNC_ALWAYS) | - A3XX_RB_STENCIL_CONTROL_FAIL(STENCIL_KEEP) | - A3XX_RB_STENCIL_CONTROL_ZPASS(STENCIL_REPLACE) | - A3XX_RB_STENCIL_CONTROL_ZFAIL(STENCIL_KEEP) | - A3XX_RB_STENCIL_CONTROL_FUNC_BF(FUNC_NEVER) | - A3XX_RB_STENCIL_CONTROL_FAIL_BF(STENCIL_KEEP) | - A3XX_RB_STENCIL_CONTROL_ZPASS_BF(STENCIL_KEEP) | - A3XX_RB_STENCIL_CONTROL_ZFAIL_BF(STENCIL_KEEP)); - } else { - OUT_PKT0(ring, REG_A3XX_RB_STENCILREFMASK, 2); - OUT_RING(ring, A3XX_RB_STENCILREFMASK_STENCILREF(0) | - A3XX_RB_STENCILREFMASK_STENCILMASK(0) | - A3XX_RB_STENCILREFMASK_STENCILWRITEMASK(0)); - OUT_RING(ring, A3XX_RB_STENCILREFMASK_BF_STENCILREF(0) | - A3XX_RB_STENCILREFMASK_BF_STENCILMASK(0) | - A3XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(0)); - - OUT_PKT0(ring, REG_A3XX_RB_STENCIL_CONTROL, 1); - OUT_RING(ring, A3XX_RB_STENCIL_CONTROL_FUNC(FUNC_NEVER) | - A3XX_RB_STENCIL_CONTROL_FAIL(STENCIL_KEEP) | - A3XX_RB_STENCIL_CONTROL_ZPASS(STENCIL_KEEP) | - A3XX_RB_STENCIL_CONTROL_ZFAIL(STENCIL_KEEP) | - A3XX_RB_STENCIL_CONTROL_FUNC_BF(FUNC_NEVER) | - A3XX_RB_STENCIL_CONTROL_FAIL_BF(STENCIL_KEEP) | - A3XX_RB_STENCIL_CONTROL_ZPASS_BF(STENCIL_KEEP) | - A3XX_RB_STENCIL_CONTROL_ZFAIL_BF(STENCIL_KEEP)); - } - - for (i = 0; i < A3XX_MAX_RENDER_TARGETS; i++) { - OUT_PKT0(ring, REG_A3XX_RB_MRT_CONTROL(i), 1); - OUT_RING(ring, A3XX_RB_MRT_CONTROL_ROP_CODE(ROP_COPY) | - A3XX_RB_MRT_CONTROL_DITHER_MODE(DITHER_ALWAYS) | - COND(buffers & (PIPE_CLEAR_COLOR0 << i), - A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE(0xf))); - - OUT_PKT0(ring, REG_A3XX_RB_MRT_BLEND_CONTROL(i), 1); - OUT_RING(ring, A3XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(FACTOR_ONE) | - A3XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(BLEND_DST_PLUS_SRC) | - A3XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(FACTOR_ZERO) | - A3XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(FACTOR_ONE) | - A3XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(BLEND_DST_PLUS_SRC) | - A3XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(FACTOR_ZERO)); - } - - OUT_PKT0(ring, REG_A3XX_GRAS_SU_MODE_CONTROL, 1); - OUT_RING(ring, A3XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH(0)); - - fd3_emit_vertex_bufs(ring, &emit); - - fd3_emit_const(ring, SHADER_FRAGMENT, 0, 0, 4, color->ui, NULL); - - OUT_PKT0(ring, REG_A3XX_PC_PRIM_VTX_CNTL, 1); - OUT_RING(ring, A3XX_PC_PRIM_VTX_CNTL_STRIDE_IN_VPC(0) | - A3XX_PC_PRIM_VTX_CNTL_POLYMODE_FRONT_PTYPE(PC_DRAW_TRIANGLES) | - A3XX_PC_PRIM_VTX_CNTL_POLYMODE_BACK_PTYPE(PC_DRAW_TRIANGLES) | - A3XX_PC_PRIM_VTX_CNTL_PROVOKING_VTX_LAST); - OUT_PKT0(ring, REG_A3XX_VFD_INDEX_MIN, 4); - OUT_RING(ring, 0); /* VFD_INDEX_MIN */ - OUT_RING(ring, 2); /* VFD_INDEX_MAX */ - OUT_RING(ring, 0); /* VFD_INSTANCEID_OFFSET */ - OUT_RING(ring, 0); /* VFD_INDEX_OFFSET */ - OUT_PKT0(ring, REG_A3XX_PC_RESTART_INDEX, 1); - OUT_RING(ring, 0xffffffff); /* PC_RESTART_INDEX */ - - fd_event_write(ctx, ring, PERFCOUNTER_STOP); - - fd_draw(ctx, ring, DI_PT_RECTLIST, USE_VISIBILITY, - DI_SRC_SEL_AUTO_INDEX, 2, 0, INDEX_SIZE_IGN, 0, 0, NULL); -} - void fd3_draw_init(struct pipe_context *pctx) { struct fd_context *ctx = fd_context(pctx); ctx->draw_vbo = fd3_draw_vbo; - ctx->clear = fd3_clear; } diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/fd3_emit.c mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/fd3_emit.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/fd3_emit.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/fd3_emit.c 2017-06-01 10:37:10.000000000 +0000 @@ -54,7 +54,7 @@ * prsc or dwords: buffer containing constant values * sizedwords: size of const value buffer */ -void +static void fd3_emit_const(struct fd_ringbuffer *ring, enum shader_t type, uint32_t regid, uint32_t offset, uint32_t sizedwords, const uint32_t *dwords, struct pipe_resource *prsc) @@ -94,32 +94,35 @@ static void fd3_emit_const_bo(struct fd_ringbuffer *ring, enum shader_t type, boolean write, - uint32_t regid, uint32_t num, struct fd_bo **bos, uint32_t *offsets) + uint32_t regid, uint32_t num, struct pipe_resource **prscs, uint32_t *offsets) { + uint32_t anum = align(num, 4); uint32_t i; debug_assert((regid % 4) == 0); - debug_assert((num % 4) == 0); - OUT_PKT3(ring, CP_LOAD_STATE, 2 + num); + OUT_PKT3(ring, CP_LOAD_STATE, 2 + anum); OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(regid/2) | CP_LOAD_STATE_0_STATE_SRC(SS_DIRECT) | CP_LOAD_STATE_0_STATE_BLOCK(sb[type]) | - CP_LOAD_STATE_0_NUM_UNIT(num/2)); + CP_LOAD_STATE_0_NUM_UNIT(anum/2)); OUT_RING(ring, CP_LOAD_STATE_1_EXT_SRC_ADDR(0) | CP_LOAD_STATE_1_STATE_TYPE(ST_CONSTANTS)); for (i = 0; i < num; i++) { - if (bos[i]) { + if (prscs[i]) { if (write) { - OUT_RELOCW(ring, bos[i], offsets[i], 0, 0); + OUT_RELOCW(ring, fd_resource(prscs[i])->bo, offsets[i], 0, 0); } else { - OUT_RELOC(ring, bos[i], offsets[i], 0, 0); + OUT_RELOC(ring, fd_resource(prscs[i])->bo, offsets[i], 0, 0); } } else { OUT_RING(ring, 0xbad00000 | (i << 16)); } } + + for (; i < anum; i++) + OUT_RING(ring, 0xffffffff); } #define VERT_TEX_OFF 0 @@ -143,16 +146,8 @@ [SB_FRAG_TEX] = REG_A3XX_TPL1_TP_FS_BORDER_COLOR_BASE_ADDR, }; struct fd3_context *fd3_ctx = fd3_context(ctx); - unsigned i, j, off; - void *ptr; - - u_upload_alloc(fd3_ctx->border_color_uploader, - 0, BORDER_COLOR_UPLOAD_SIZE, - BORDER_COLOR_UPLOAD_SIZE, &off, - &fd3_ctx->border_color_buf, - &ptr); - - fd_setup_border_colors(tex, ptr, tex_off[sb]); + bool needs_border = false; + unsigned i, j; if (tex->num_samplers > 0) { /* output sampler state: */ @@ -171,6 +166,8 @@ OUT_RING(ring, sampler->texsamp0); OUT_RING(ring, sampler->texsamp1); + + needs_border |= sampler->needs_border; } } @@ -213,8 +210,7 @@ &dummy_view; struct fd_resource *rsc = fd_resource(view->base.texture); if (rsc && rsc->base.b.target == PIPE_BUFFER) { - OUT_RELOC(ring, rsc->bo, view->base.u.buf.first_element * - util_format_get_blocksize(view->base.format), 0, 0); + OUT_RELOC(ring, rsc->bo, view->base.u.buf.offset, 0, 0); j = 1; } else { unsigned start = fd_sampler_first_level(&view->base); @@ -234,10 +230,23 @@ } } - OUT_PKT0(ring, bcolor_reg[sb], 1); - OUT_RELOC(ring, fd_resource(fd3_ctx->border_color_buf)->bo, off, 0, 0); + if (needs_border) { + unsigned off; + void *ptr; + + u_upload_alloc(fd3_ctx->border_color_uploader, + 0, BORDER_COLOR_UPLOAD_SIZE, + BORDER_COLOR_UPLOAD_SIZE, &off, + &fd3_ctx->border_color_buf, + &ptr); + + fd_setup_border_colors(tex, ptr, tex_off[sb]); + + OUT_PKT0(ring, bcolor_reg[sb], 1); + OUT_RELOC(ring, fd_resource(fd3_ctx->border_color_buf)->bo, off, 0, 0); - u_upload_unmap(fd3_ctx->border_color_uploader); + u_upload_unmap(fd3_ctx->border_color_uploader); + } } /* emit texture state for mem->gmem restore operation.. eventually it would @@ -293,13 +302,13 @@ } struct fd_resource *rsc = fd_resource(psurf[i]->texture); - enum pipe_format format = fd3_gmem_restore_format(psurf[i]->format); + enum pipe_format format = fd_gmem_restore_format(psurf[i]->format); /* The restore blit_zs shader expects stencil in sampler 0, and depth * in sampler 1 */ if (rsc->stencil && i == 0) { rsc = rsc->stencil; - format = fd3_gmem_restore_format(rsc->base.b.format); + format = fd_gmem_restore_format(rsc->base.b.format); } /* note: PIPE_BUFFER disallowed for surfaces */ @@ -510,7 +519,7 @@ */ OUT_PKT0(ring, REG_A3XX_RB_RENDER_CONTROL, 1); - OUT_RINGP(ring, val, &fd3_context(ctx)->rbrc_patches); + OUT_RINGP(ring, val, &ctx->batch->rbrc_patches); } if (dirty & (FD_DIRTY_ZSA | FD_DIRTY_STENCIL_REF)) { @@ -587,7 +596,7 @@ int i = ffs(planes) - 1; planes &= ~(1U << i); - fd_wfi(ctx, ring); + fd_wfi(ctx->batch, ring); OUT_PKT0(ring, REG_A3XX_GRAS_CL_USER_PLANE(count++), 4); OUT_RING(ring, fui(ctx->ucp.ucp[i][0])); OUT_RING(ring, fui(ctx->ucp.ucp[i][1])); @@ -648,14 +657,14 @@ OUT_RING(ring, A3XX_GRAS_SC_WINDOW_SCISSOR_BR_X(maxx - 1) | A3XX_GRAS_SC_WINDOW_SCISSOR_BR_Y(maxy - 1)); - ctx->max_scissor.minx = MIN2(ctx->max_scissor.minx, minx); - ctx->max_scissor.miny = MIN2(ctx->max_scissor.miny, miny); - ctx->max_scissor.maxx = MAX2(ctx->max_scissor.maxx, maxx); - ctx->max_scissor.maxy = MAX2(ctx->max_scissor.maxy, maxy); + ctx->batch->max_scissor.minx = MIN2(ctx->batch->max_scissor.minx, minx); + ctx->batch->max_scissor.miny = MIN2(ctx->batch->max_scissor.miny, miny); + ctx->batch->max_scissor.maxx = MAX2(ctx->batch->max_scissor.maxx, maxx); + ctx->batch->max_scissor.maxy = MAX2(ctx->batch->max_scissor.maxy, maxy); } if (dirty & FD_DIRTY_VIEWPORT) { - fd_wfi(ctx, ring); + fd_wfi(ctx->batch, ring); OUT_PKT0(ring, REG_A3XX_GRAS_CL_VPORT_XOFFSET, 6); OUT_RING(ring, A3XX_GRAS_CL_VPORT_XOFFSET(ctx->viewport.translate[0] - 0.5)); OUT_RING(ring, A3XX_GRAS_CL_VPORT_XSCALE(ctx->viewport.scale[0])); @@ -668,9 +677,9 @@ if (dirty & (FD_DIRTY_VIEWPORT | FD_DIRTY_RASTERIZER | FD_DIRTY_FRAMEBUFFER)) { float zmin, zmax; int depth = 24; - if (ctx->framebuffer.zsbuf) { + if (ctx->batch->framebuffer.zsbuf) { depth = util_format_get_component_bits( - pipe_surface_format(ctx->framebuffer.zsbuf), + pipe_surface_format(ctx->batch->framebuffer.zsbuf), UTIL_FORMAT_COLORSPACE_ZS, 0); } util_viewport_zmin_zmax(&ctx->viewport, ctx->rasterizer->clip_halfz, @@ -690,7 +699,7 @@ } if (dirty & (FD_DIRTY_PROG | FD_DIRTY_FRAMEBUFFER | FD_DIRTY_BLEND_DUAL)) { - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; + struct pipe_framebuffer_state *pfb = &ctx->batch->framebuffer; int nr_cbufs = pfb->nr_cbufs; if (fd3_blend_stateobj(ctx->blend)->rb_render_control & A3XX_RB_RENDER_CONTROL_DUAL_COLOR_IN_ENABLE) @@ -714,7 +723,8 @@ uint32_t i; for (i = 0; i < ARRAY_SIZE(blend->rb_mrt); i++) { - enum pipe_format format = pipe_surface_format(ctx->framebuffer.cbufs[i]); + enum pipe_format format = + pipe_surface_format(ctx->batch->framebuffer.cbufs[i]); const struct util_format_description *desc = util_format_description(format); bool is_float = util_format_is_float(format); @@ -774,7 +784,7 @@ } if (dirty & (FD_DIRTY_VERTTEX | FD_DIRTY_FRAGTEX)) - fd_wfi(ctx, ring); + fd_wfi(ctx->batch, ring); if (dirty & FD_DIRTY_VERTTEX) { if (vp->has_samp) @@ -797,10 +807,10 @@ * state, there could have been a context switch between ioctls): */ void -fd3_emit_restore(struct fd_context *ctx) +fd3_emit_restore(struct fd_batch *batch, struct fd_ringbuffer *ring) { + struct fd_context *ctx = batch->ctx; struct fd3_context *fd3_ctx = fd3_context(ctx); - struct fd_ringbuffer *ring = ctx->ring; int i; if (ctx->screen->gpu_id == 320) { @@ -810,7 +820,7 @@ OUT_RING(ring, 0x00000000); } - fd_wfi(ctx, ring); + fd_wfi(batch, ring); OUT_PKT3(ring, CP_INVALIDATE_STATE, 1); OUT_RING(ring, 0x00007fff); @@ -880,7 +890,7 @@ OUT_RING(ring, A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_STARTENTRY(0) | A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_ENDENTRY(0)); - fd3_emit_cache_flush(ctx, ring); + fd3_emit_cache_flush(batch, ring); OUT_PKT0(ring, REG_A3XX_GRAS_CL_CLIP_CNTL, 1); OUT_RING(ring, 0x00000000); /* GRAS_CL_CLIP_CNTL */ @@ -917,7 +927,7 @@ OUT_PKT0(ring, REG_A3XX_PC_VSTREAM_CONTROL, 1); OUT_RING(ring, 0x00000000); - fd_event_write(ctx, ring, CACHE_FLUSH); + fd_event_write(batch, ring, CACHE_FLUSH); if (is_a3xx_p0(ctx->screen)) { OUT_PKT3(ring, CP_DRAW_INDX, 3); @@ -933,18 +943,15 @@ OUT_RING(ring, 0x00000000); OUT_RING(ring, 0x00000000); - fd_wfi(ctx, ring); - - fd_hw_query_enable(ctx, ring); + fd_wfi(batch, ring); - ctx->needs_rb_fbd = true; + fd_hw_query_enable(batch, ring); } static void -fd3_emit_ib(struct fd_ringbuffer *ring, struct fd_ringmarker *start, - struct fd_ringmarker *end) +fd3_emit_ib(struct fd_ringbuffer *ring, struct fd_ringbuffer *target) { - __OUT_IB(ring, true, start, end); + __OUT_IB(ring, true, target); } void diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/fd3_emit.h mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/fd3_emit.h --- mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/fd3_emit.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/fd3_emit.h 2017-06-01 10:37:10.000000000 +0000 @@ -38,10 +38,6 @@ struct fd_ringbuffer; -void fd3_emit_const(struct fd_ringbuffer *ring, enum shader_t type, - uint32_t regid, uint32_t offset, uint32_t sizedwords, - const uint32_t *dwords, struct pipe_resource *prsc); - void fd3_emit_gmem_restore_tex(struct fd_ringbuffer *ring, struct pipe_surface **psurf, int bufs); @@ -93,14 +89,14 @@ void fd3_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring, struct fd3_emit *emit); -void fd3_emit_restore(struct fd_context *ctx); +void fd3_emit_restore(struct fd_batch *batch, struct fd_ringbuffer *ring); void fd3_emit_init(struct pipe_context *pctx); static inline void -fd3_emit_cache_flush(struct fd_context *ctx, struct fd_ringbuffer *ring) +fd3_emit_cache_flush(struct fd_batch *batch, struct fd_ringbuffer *ring) { - fd_wfi(ctx, ring); + fd_wfi(batch, ring); OUT_PKT0(ring, REG_A3XX_UCHE_CACHE_INVALIDATE0_REG, 2); OUT_RING(ring, A3XX_UCHE_CACHE_INVALIDATE0_REG_ADDR(0)); OUT_RING(ring, A3XX_UCHE_CACHE_INVALIDATE1_REG_ADDR(0) | diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/fd3_format.c mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/fd3_format.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/fd3_format.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/fd3_format.c 2017-06-01 10:37:10.000000000 +0000 @@ -348,27 +348,6 @@ return util_format_get_nblocksx(format, width); } -/* we need to special case a bit the depth/stencil restore, because we are - * using the texture sampler to blit into the depth/stencil buffer, *not* - * into a color buffer. Otherwise fd3_tex_swiz() will do the wrong thing, - * as it is assuming that you are sampling into normal render target.. - */ -enum pipe_format -fd3_gmem_restore_format(enum pipe_format format) -{ - switch (format) { - case PIPE_FORMAT_Z24X8_UNORM: - case PIPE_FORMAT_Z24_UNORM_S8_UINT: - return PIPE_FORMAT_R8G8B8A8_UNORM; - case PIPE_FORMAT_Z16_UNORM: - return PIPE_FORMAT_R8G8_UNORM; - case PIPE_FORMAT_S8_UINT: - return PIPE_FORMAT_R8_UNORM; - default: - return format; - } -} - enum a3xx_color_fmt fd3_fs_output_format(enum pipe_format format) { diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/fd3_format.h mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/fd3_format.h --- mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/fd3_format.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/fd3_format.h 2017-06-01 10:37:10.000000000 +0000 @@ -34,7 +34,6 @@ enum a3xx_tex_fmt fd3_pipe2tex(enum pipe_format format); enum a3xx_tex_fetchsize fd3_pipe2fetchsize(enum pipe_format format); enum a3xx_color_fmt fd3_pipe2color(enum pipe_format format); -enum pipe_format fd3_gmem_restore_format(enum pipe_format format); enum a3xx_color_fmt fd3_fs_output_format(enum pipe_format format); enum a3xx_color_swap fd3_pipe2swap(enum pipe_format format); unsigned fd3_pipe2nblocksx(enum pipe_format format, unsigned width); diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c 2017-06-01 10:37:10.000000000 +0000 @@ -79,7 +79,8 @@ if (rsc->stencil) { rsc = rsc->stencil; pformat = rsc->base.b.format; - bases++; + if (bases) + bases++; } slice = fd_resource_slice(rsc, psurf->u.tex.level); format = fd3_pipe2color(pformat); @@ -127,9 +128,9 @@ } static bool -use_hw_binning(struct fd_context *ctx) +use_hw_binning(struct fd_batch *batch) { - struct fd_gmem_stateobj *gmem = &ctx->gmem; + struct fd_gmem_stateobj *gmem = &batch->ctx->gmem; /* workaround: combining scissor optimization and hw binning * seems problematic. Seems like we end up with a mismatch @@ -148,20 +149,23 @@ if (gmem->minx || gmem->miny) return false; + if ((gmem->maxpw * gmem->maxph) > 32) + return false; + return fd_binning_enabled && ((gmem->nbins_x * gmem->nbins_y) > 2); } /* workaround for (hlsq?) lockup with hw binning on a3xx patchlevel 0 */ -static void update_vsc_pipe(struct fd_context *ctx); +static void update_vsc_pipe(struct fd_batch *batch); static void -emit_binning_workaround(struct fd_context *ctx) +emit_binning_workaround(struct fd_batch *batch) { - struct fd3_context *fd3_ctx = fd3_context(ctx); + struct fd_context *ctx = batch->ctx; struct fd_gmem_stateobj *gmem = &ctx->gmem; - struct fd_ringbuffer *ring = ctx->ring; + struct fd_ringbuffer *ring = batch->gmem; struct fd3_emit emit = { .debug = &ctx->debug, - .vtx = &fd3_ctx->solid_vbuf_state, + .vtx = &ctx->solid_vbuf_state, .prog = &ctx->solid_prog, .key = { .half_precision = true, @@ -180,7 +184,7 @@ OUT_RING(ring, A3XX_RB_COPY_CONTROL_MSAA_RESOLVE(MSAA_ONE) | A3XX_RB_COPY_CONTROL_MODE(0) | A3XX_RB_COPY_CONTROL_GMEM_BASE(0)); - OUT_RELOCW(ring, fd_resource(fd3_ctx->solid_vbuf)->bo, 0x20, 0, -1); /* RB_COPY_DEST_BASE */ + OUT_RELOCW(ring, fd_resource(ctx->solid_vbuf)->bo, 0x20, 0, -1); /* RB_COPY_DEST_BASE */ OUT_RING(ring, A3XX_RB_COPY_DEST_PITCH_PITCH(128)); OUT_RING(ring, A3XX_RB_COPY_DEST_INFO_TILE(LINEAR) | A3XX_RB_COPY_DEST_INFO_FORMAT(RB_R8G8B8A8_UNORM) | @@ -255,7 +259,7 @@ OUT_RING(ring, A3XX_GRAS_SC_SCREEN_SCISSOR_BR_X(31) | A3XX_GRAS_SC_SCREEN_SCISSOR_BR_Y(0)); - fd_wfi(ctx, ring); + fd_wfi(batch, ring); OUT_PKT0(ring, REG_A3XX_GRAS_CL_VPORT_XOFFSET, 6); OUT_RING(ring, A3XX_GRAS_CL_VPORT_XOFFSET(0.0)); OUT_RING(ring, A3XX_GRAS_CL_VPORT_XSCALE(1.0)); @@ -282,7 +286,7 @@ OUT_RING(ring, 2); /* NumIndices */ OUT_RING(ring, 2); OUT_RING(ring, 1); - fd_reset_wfi(ctx); + fd_reset_wfi(batch); OUT_PKT0(ring, REG_A3XX_HLSQ_CONTROL_0_REG, 1); OUT_RING(ring, A3XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(TWO_QUADS)); @@ -290,7 +294,7 @@ OUT_PKT0(ring, REG_A3XX_VFD_PERFCOUNTER0_SELECT, 1); OUT_RING(ring, 0x00000000); - fd_wfi(ctx, ring); + fd_wfi(batch, ring); OUT_PKT0(ring, REG_A3XX_VSC_BIN_SIZE, 1); OUT_RING(ring, A3XX_VSC_BIN_SIZE_WIDTH(gmem->bin_w) | A3XX_VSC_BIN_SIZE_HEIGHT(gmem->bin_h)); @@ -307,12 +311,12 @@ /* transfer from gmem to system memory (ie. normal RAM) */ static void -emit_gmem2mem_surf(struct fd_context *ctx, +emit_gmem2mem_surf(struct fd_batch *batch, enum adreno_rb_copy_control_mode mode, bool stencil, uint32_t base, struct pipe_surface *psurf) { - struct fd_ringbuffer *ring = ctx->ring; + struct fd_ringbuffer *ring = batch->gmem; struct fd_resource *rsc = fd_resource(psurf->texture); enum pipe_format format = psurf->format; if (stencil) { @@ -331,7 +335,7 @@ A3XX_RB_COPY_CONTROL_GMEM_BASE(base) | COND(format == PIPE_FORMAT_Z32_FLOAT || format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT, - A3XX_RB_COPY_CONTROL_UNK12)); + A3XX_RB_COPY_CONTROL_DEPTH32_RESOLVE)); OUT_RELOCW(ring, rsc->bo, offset, 0, -1); /* RB_COPY_DEST_BASE */ OUT_RING(ring, A3XX_RB_COPY_DEST_PITCH_PITCH(slice->pitch * rsc->cpp)); @@ -341,19 +345,19 @@ A3XX_RB_COPY_DEST_INFO_ENDIAN(ENDIAN_NONE) | A3XX_RB_COPY_DEST_INFO_SWAP(fd3_pipe2swap(format))); - fd_draw(ctx, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY, + fd_draw(batch, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY, DI_SRC_SEL_AUTO_INDEX, 2, 0, INDEX_SIZE_IGN, 0, 0, NULL); } static void -fd3_emit_tile_gmem2mem(struct fd_context *ctx, struct fd_tile *tile) +fd3_emit_tile_gmem2mem(struct fd_batch *batch, struct fd_tile *tile) { - struct fd3_context *fd3_ctx = fd3_context(ctx); - struct fd_ringbuffer *ring = ctx->ring; - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; + struct fd_context *ctx = batch->ctx; + struct fd_ringbuffer *ring = batch->gmem; + struct pipe_framebuffer_state *pfb = &batch->framebuffer; struct fd3_emit emit = { .debug = &ctx->debug, - .vtx = &fd3_ctx->solid_vbuf_state, + .vtx = &ctx->solid_vbuf_state, .prog = &ctx->solid_prog, .key = { .half_precision = true, @@ -390,7 +394,7 @@ OUT_PKT0(ring, REG_A3XX_GRAS_CL_CLIP_CNTL, 1); OUT_RING(ring, 0x00000000); /* GRAS_CL_CLIP_CNTL */ - fd_wfi(ctx, ring); + fd_wfi(batch, ring); OUT_PKT0(ring, REG_A3XX_GRAS_CL_VPORT_XOFFSET, 6); OUT_RING(ring, A3XX_GRAS_CL_VPORT_XOFFSET((float)pfb->width/2.0 - 0.5)); OUT_RING(ring, A3XX_GRAS_CL_VPORT_XSCALE((float)pfb->width/2.0)); @@ -436,23 +440,23 @@ fd3_program_emit(ring, &emit, 0, NULL); fd3_emit_vertex_bufs(ring, &emit); - if (ctx->resolve & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)) { + if (batch->resolve & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)) { struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture); - if (!rsc->stencil || ctx->resolve & FD_BUFFER_DEPTH) - emit_gmem2mem_surf(ctx, RB_COPY_DEPTH_STENCIL, false, + if (!rsc->stencil || batch->resolve & FD_BUFFER_DEPTH) + emit_gmem2mem_surf(batch, RB_COPY_DEPTH_STENCIL, false, ctx->gmem.zsbuf_base[0], pfb->zsbuf); - if (rsc->stencil && ctx->resolve & FD_BUFFER_STENCIL) - emit_gmem2mem_surf(ctx, RB_COPY_DEPTH_STENCIL, true, + if (rsc->stencil && batch->resolve & FD_BUFFER_STENCIL) + emit_gmem2mem_surf(batch, RB_COPY_DEPTH_STENCIL, true, ctx->gmem.zsbuf_base[1], pfb->zsbuf); } - if (ctx->resolve & FD_BUFFER_COLOR) { + if (batch->resolve & FD_BUFFER_COLOR) { for (i = 0; i < pfb->nr_cbufs; i++) { if (!pfb->cbufs[i]) continue; - if (!(ctx->resolve & (PIPE_CLEAR_COLOR0 << i))) + if (!(batch->resolve & (PIPE_CLEAR_COLOR0 << i))) continue; - emit_gmem2mem_surf(ctx, RB_COPY_RESOLVE, false, + emit_gmem2mem_surf(batch, RB_COPY_RESOLVE, false, ctx->gmem.cbuf_base[i], pfb->cbufs[i]); } } @@ -471,10 +475,10 @@ /* transfer from system memory to gmem */ static void -emit_mem2gmem_surf(struct fd_context *ctx, uint32_t bases[], +emit_mem2gmem_surf(struct fd_batch *batch, uint32_t bases[], struct pipe_surface **psurf, uint32_t bufs, uint32_t bin_w) { - struct fd_ringbuffer *ring = ctx->ring; + struct fd_ringbuffer *ring = batch->gmem; struct pipe_surface *zsbufs[2]; assert(bufs > 0); @@ -501,7 +505,7 @@ OUT_PKT0(ring, REG_A3XX_RB_DEPTH_INFO, 2); OUT_RING(ring, A3XX_RB_DEPTH_INFO_DEPTH_BASE(bases[0]) | A3XX_RB_DEPTH_INFO_DEPTH_FORMAT(DEPTHX_32)); - OUT_RING(ring, A3XX_RB_DEPTH_PITCH(4 * ctx->gmem.bin_w)); + OUT_RING(ring, A3XX_RB_DEPTH_PITCH(4 * batch->ctx->gmem.bin_w)); if (psurf[0]->format == PIPE_FORMAT_Z32_FLOAT) { OUT_PKT0(ring, REG_A3XX_RB_MRT_CONTROL(0), 1); @@ -522,20 +526,20 @@ fd3_emit_gmem_restore_tex(ring, psurf, bufs); - fd_draw(ctx, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY, + fd_draw(batch, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY, DI_SRC_SEL_AUTO_INDEX, 2, 0, INDEX_SIZE_IGN, 0, 0, NULL); } static void -fd3_emit_tile_mem2gmem(struct fd_context *ctx, struct fd_tile *tile) +fd3_emit_tile_mem2gmem(struct fd_batch *batch, struct fd_tile *tile) { - struct fd3_context *fd3_ctx = fd3_context(ctx); + struct fd_context *ctx = batch->ctx; struct fd_gmem_stateobj *gmem = &ctx->gmem; - struct fd_ringbuffer *ring = ctx->ring; - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; + struct fd_ringbuffer *ring = batch->gmem; + struct pipe_framebuffer_state *pfb = &batch->framebuffer; struct fd3_emit emit = { .debug = &ctx->debug, - .vtx = &fd3_ctx->blit_vbuf_state, + .vtx = &ctx->blit_vbuf_state, .sprite_coord_enable = 1, /* NOTE: They all use the same VP, this is for vtx bufs. */ .prog = &ctx->blit_prog[0], @@ -555,13 +559,13 @@ y1 = ((float)tile->yoff + bin_h) / ((float)pfb->height); OUT_PKT3(ring, CP_MEM_WRITE, 5); - OUT_RELOCW(ring, fd_resource(fd3_ctx->blit_texcoord_vbuf)->bo, 0, 0, 0); + OUT_RELOCW(ring, fd_resource(ctx->blit_texcoord_vbuf)->bo, 0, 0, 0); OUT_RING(ring, fui(x0)); OUT_RING(ring, fui(y0)); OUT_RING(ring, fui(x1)); OUT_RING(ring, fui(y1)); - fd3_emit_cache_flush(ctx, ring); + fd3_emit_cache_flush(batch, ring); for (i = 0; i < 4; i++) { OUT_PKT0(ring, REG_A3XX_RB_MRT_CONTROL(i), 1); @@ -582,7 +586,7 @@ OUT_RING(ring, A3XX_RB_RENDER_CONTROL_ALPHA_TEST_FUNC(FUNC_ALWAYS) | A3XX_RB_RENDER_CONTROL_BIN_WIDTH(gmem->bin_w)); - fd_wfi(ctx, ring); + fd_wfi(batch, ring); OUT_PKT0(ring, REG_A3XX_RB_DEPTH_CONTROL, 1); OUT_RING(ring, A3XX_RB_DEPTH_CONTROL_ZFUNC(FUNC_LESS)); @@ -593,7 +597,7 @@ OUT_PKT0(ring, REG_A3XX_GRAS_CL_CLIP_CNTL, 1); OUT_RING(ring, A3XX_GRAS_CL_CLIP_CNTL_IJ_PERSP_CENTER); /* GRAS_CL_CLIP_CNTL */ - fd_wfi(ctx, ring); + fd_wfi(batch, ring); OUT_PKT0(ring, REG_A3XX_GRAS_CL_VPORT_XOFFSET, 6); OUT_RING(ring, A3XX_GRAS_CL_VPORT_XOFFSET((float)bin_w/2.0 - 0.5)); OUT_RING(ring, A3XX_GRAS_CL_VPORT_XSCALE((float)bin_w/2.0)); @@ -654,14 +658,14 @@ bin_w = gmem->bin_w; bin_h = gmem->bin_h; - if (fd_gmem_needs_restore(ctx, tile, FD_BUFFER_COLOR)) { + if (fd_gmem_needs_restore(batch, tile, FD_BUFFER_COLOR)) { emit.prog = &ctx->blit_prog[pfb->nr_cbufs - 1]; emit.fp = NULL; /* frag shader changed so clear cache */ fd3_program_emit(ring, &emit, pfb->nr_cbufs, pfb->cbufs); - emit_mem2gmem_surf(ctx, gmem->cbuf_base, pfb->cbufs, pfb->nr_cbufs, bin_w); + emit_mem2gmem_surf(batch, gmem->cbuf_base, pfb->cbufs, pfb->nr_cbufs, bin_w); } - if (fd_gmem_needs_restore(ctx, tile, FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)) { + if (fd_gmem_needs_restore(batch, tile, FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)) { if (pfb->zsbuf->format != PIPE_FORMAT_Z32_FLOAT_S8X24_UINT && pfb->zsbuf->format != PIPE_FORMAT_Z32_FLOAT) { /* Non-float can use a regular color write. It's split over 8-bit @@ -679,7 +683,7 @@ } emit.fp = NULL; /* frag shader changed so clear cache */ fd3_program_emit(ring, &emit, 1, &pfb->zsbuf); - emit_mem2gmem_surf(ctx, gmem->zsbuf_base, &pfb->zsbuf, 1, bin_w); + emit_mem2gmem_surf(batch, gmem->zsbuf_base, &pfb->zsbuf, 1, bin_w); } OUT_PKT0(ring, REG_A3XX_GRAS_SC_CONTROL, 1); @@ -694,34 +698,33 @@ } static void -patch_draws(struct fd_context *ctx, enum pc_di_vis_cull_mode vismode) +patch_draws(struct fd_batch *batch, enum pc_di_vis_cull_mode vismode) { unsigned i; - for (i = 0; i < fd_patch_num_elements(&ctx->draw_patches); i++) { - struct fd_cs_patch *patch = fd_patch_element(&ctx->draw_patches, i); + for (i = 0; i < fd_patch_num_elements(&batch->draw_patches); i++) { + struct fd_cs_patch *patch = fd_patch_element(&batch->draw_patches, i); *patch->cs = patch->val | DRAW(0, 0, 0, vismode, 0); } - util_dynarray_resize(&ctx->draw_patches, 0); + util_dynarray_resize(&batch->draw_patches, 0); } static void -patch_rbrc(struct fd_context *ctx, uint32_t val) +patch_rbrc(struct fd_batch *batch, uint32_t val) { - struct fd3_context *fd3_ctx = fd3_context(ctx); unsigned i; - for (i = 0; i < fd_patch_num_elements(&fd3_ctx->rbrc_patches); i++) { - struct fd_cs_patch *patch = fd_patch_element(&fd3_ctx->rbrc_patches, i); + for (i = 0; i < fd_patch_num_elements(&batch->rbrc_patches); i++) { + struct fd_cs_patch *patch = fd_patch_element(&batch->rbrc_patches, i); *patch->cs = patch->val | val; } - util_dynarray_resize(&fd3_ctx->rbrc_patches, 0); + util_dynarray_resize(&batch->rbrc_patches, 0); } /* for rendering directly to system memory: */ static void -fd3_emit_sysmem_prep(struct fd_context *ctx) +fd3_emit_sysmem_prep(struct fd_batch *batch) { - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; - struct fd_ringbuffer *ring = ctx->ring; + struct pipe_framebuffer_state *pfb = &batch->framebuffer; + struct fd_ringbuffer *ring = batch->gmem; uint32_t i, pitch = 0; for (i = 0; i < pfb->nr_cbufs; i++) { @@ -731,7 +734,7 @@ pitch = fd_resource(psurf->texture)->slices[psurf->u.tex.level].pitch; } - fd3_emit_restore(ctx); + fd3_emit_restore(batch, ring); OUT_PKT0(ring, REG_A3XX_RB_FRAME_BUFFER_DIMENSION, 1); OUT_RING(ring, A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(pfb->width) | @@ -756,15 +759,16 @@ A3XX_RB_MODE_CONTROL_MARB_CACHE_SPLIT_MODE | A3XX_RB_MODE_CONTROL_MRT(MAX2(1, pfb->nr_cbufs) - 1)); - patch_draws(ctx, IGNORE_VISIBILITY); - patch_rbrc(ctx, A3XX_RB_RENDER_CONTROL_BIN_WIDTH(pitch)); + patch_draws(batch, IGNORE_VISIBILITY); + patch_rbrc(batch, A3XX_RB_RENDER_CONTROL_BIN_WIDTH(pitch)); } static void -update_vsc_pipe(struct fd_context *ctx) +update_vsc_pipe(struct fd_batch *batch) { + struct fd_context *ctx = batch->ctx; struct fd3_context *fd3_ctx = fd3_context(ctx); - struct fd_ringbuffer *ring = ctx->ring; + struct fd_ringbuffer *ring = batch->gmem; int i; OUT_PKT0(ring, REG_A3XX_VSC_SIZE_ADDRESS, 1); @@ -789,11 +793,12 @@ } static void -emit_binning_pass(struct fd_context *ctx) +emit_binning_pass(struct fd_batch *batch) { + struct fd_context *ctx = batch->ctx; struct fd_gmem_stateobj *gmem = &ctx->gmem; - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; - struct fd_ringbuffer *ring = ctx->ring; + struct pipe_framebuffer_state *pfb = &batch->framebuffer; + struct fd_ringbuffer *ring = batch->gmem; int i; uint32_t x1 = gmem->minx; @@ -802,8 +807,8 @@ uint32_t y2 = gmem->miny + gmem->height - 1; if (ctx->screen->gpu_id == 320) { - emit_binning_workaround(ctx); - fd_wfi(ctx, ring); + emit_binning_workaround(batch); + fd_wfi(batch, ring); OUT_PKT3(ring, CP_INVALIDATE_STATE, 1); OUT_RING(ring, 0x00007fff); } @@ -856,10 +861,10 @@ A3XX_PC_VSTREAM_CONTROL_N(0)); /* emit IB to binning drawcmds: */ - ctx->emit_ib(ring, ctx->binning_start, ctx->binning_end); - fd_reset_wfi(ctx); + ctx->emit_ib(ring, batch->binning); + fd_reset_wfi(batch); - fd_wfi(ctx, ring); + fd_wfi(batch, ring); /* and then put stuff back the way it was: */ @@ -888,8 +893,8 @@ A3XX_RB_RENDER_CONTROL_ALPHA_TEST_FUNC(FUNC_NEVER) | A3XX_RB_RENDER_CONTROL_BIN_WIDTH(gmem->bin_w)); - fd_event_write(ctx, ring, CACHE_FLUSH); - fd_wfi(ctx, ring); + fd_event_write(batch, ring, CACHE_FLUSH); + fd_wfi(batch, ring); if (ctx->screen->gpu_id == 320) { /* dummy-draw workaround: */ @@ -898,7 +903,7 @@ OUT_RING(ring, DRAW(1, DI_SRC_SEL_AUTO_INDEX, INDEX_SIZE_IGN, IGNORE_VISIBILITY, 0)); OUT_RING(ring, 0); /* NumIndices */ - fd_reset_wfi(ctx); + fd_reset_wfi(batch); } OUT_PKT3(ring, CP_NOP, 4); @@ -907,22 +912,23 @@ OUT_RING(ring, 0x00000000); OUT_RING(ring, 0x00000000); - fd_wfi(ctx, ring); + fd_wfi(batch, ring); if (ctx->screen->gpu_id == 320) { - emit_binning_workaround(ctx); + emit_binning_workaround(batch); } } /* before first tile */ static void -fd3_emit_tile_init(struct fd_context *ctx) +fd3_emit_tile_init(struct fd_batch *batch) { - struct fd_ringbuffer *ring = ctx->ring; - struct fd_gmem_stateobj *gmem = &ctx->gmem; + struct fd_ringbuffer *ring = batch->gmem; + struct pipe_framebuffer_state *pfb = &batch->framebuffer; + struct fd_gmem_stateobj *gmem = &batch->ctx->gmem; uint32_t rb_render_control; - fd3_emit_restore(ctx); + fd3_emit_restore(batch, ring); /* note: use gmem->bin_w/h, the bin_w/h parameters may be truncated * at the right and bottom edge tiles @@ -931,37 +937,34 @@ OUT_RING(ring, A3XX_VSC_BIN_SIZE_WIDTH(gmem->bin_w) | A3XX_VSC_BIN_SIZE_HEIGHT(gmem->bin_h)); - update_vsc_pipe(ctx); + update_vsc_pipe(batch); - if (use_hw_binning(ctx)) { + fd_wfi(batch, ring); + OUT_PKT0(ring, REG_A3XX_RB_FRAME_BUFFER_DIMENSION, 1); + OUT_RING(ring, A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(pfb->width) | + A3XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(pfb->height)); + + if (use_hw_binning(batch)) { /* emit hw binning pass: */ - emit_binning_pass(ctx); + emit_binning_pass(batch); - patch_draws(ctx, USE_VISIBILITY); + patch_draws(batch, USE_VISIBILITY); } else { - patch_draws(ctx, IGNORE_VISIBILITY); + patch_draws(batch, IGNORE_VISIBILITY); } rb_render_control = A3XX_RB_RENDER_CONTROL_ENABLE_GMEM | A3XX_RB_RENDER_CONTROL_BIN_WIDTH(gmem->bin_w); - patch_rbrc(ctx, rb_render_control); + patch_rbrc(batch, rb_render_control); } /* before mem2gmem */ static void -fd3_emit_tile_prep(struct fd_context *ctx, struct fd_tile *tile) +fd3_emit_tile_prep(struct fd_batch *batch, struct fd_tile *tile) { - struct fd_ringbuffer *ring = ctx->ring; - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; - - if (ctx->needs_rb_fbd) { - fd_wfi(ctx, ring); - OUT_PKT0(ring, REG_A3XX_RB_FRAME_BUFFER_DIMENSION, 1); - OUT_RING(ring, A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(pfb->width) | - A3XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(pfb->height)); - ctx->needs_rb_fbd = false; - } + struct fd_ringbuffer *ring = batch->gmem; + struct pipe_framebuffer_state *pfb = &batch->framebuffer; OUT_PKT0(ring, REG_A3XX_RB_MODE_CONTROL, 1); OUT_RING(ring, A3XX_RB_MODE_CONTROL_RENDER_MODE(RB_RENDERING_PASS) | @@ -971,12 +974,13 @@ /* before IB to rendering cmds: */ static void -fd3_emit_tile_renderprep(struct fd_context *ctx, struct fd_tile *tile) +fd3_emit_tile_renderprep(struct fd_batch *batch, struct fd_tile *tile) { + struct fd_context *ctx = batch->ctx; struct fd3_context *fd3_ctx = fd3_context(ctx); - struct fd_ringbuffer *ring = ctx->ring; + struct fd_ringbuffer *ring = batch->gmem; struct fd_gmem_stateobj *gmem = &ctx->gmem; - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; + struct pipe_framebuffer_state *pfb = &batch->framebuffer; uint32_t x1 = tile->xoff; uint32_t y1 = tile->yoff; @@ -1003,13 +1007,13 @@ OUT_RING(ring, 0x00000000); } - if (use_hw_binning(ctx)) { + if (use_hw_binning(batch)) { struct fd_vsc_pipe *pipe = &ctx->pipe[tile->p]; assert(pipe->w * pipe->h); - fd_event_write(ctx, ring, HLSQ_FLUSH); - fd_wfi(ctx, ring); + fd_event_write(batch, ring, HLSQ_FLUSH); + fd_wfi(batch, ring); OUT_PKT0(ring, REG_A3XX_PC_VSTREAM_CONTROL, 1); OUT_RING(ring, A3XX_PC_VSTREAM_CONTROL_SIZE(pipe->w * pipe->h) | diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/fd3_program.c mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/fd3_program.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/fd3_program.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/fd3_program.c 2017-06-01 10:37:10.000000000 +0000 @@ -151,7 +151,7 @@ uint32_t fpbuffersz, vpbuffersz, fsoff; uint32_t pos_regid, posz_regid, psize_regid, color_regid[4] = {0}; int constmode; - int i, j, k; + int i, j; debug_assert(nr <= ARRAY_SIZE(color_regid)); @@ -275,45 +275,34 @@ A3XX_SP_VS_PARAM_REG_PSIZEREGID(psize_regid) | A3XX_SP_VS_PARAM_REG_TOTALVSOUTVAR(fp->varying_in)); - for (i = 0, j = -1; (i < 8) && (j < (int)fp->inputs_count); i++) { + struct ir3_shader_linkage l = {0}; + ir3_link_shaders(&l, vp, fp); + + for (i = 0, j = 0; (i < 16) && (j < l.cnt); i++) { uint32_t reg = 0; OUT_PKT0(ring, REG_A3XX_SP_VS_OUT_REG(i), 1); - j = ir3_next_varying(fp, j); - if (j < fp->inputs_count) { - k = ir3_find_output(vp, fp->inputs[j].slot); - reg |= A3XX_SP_VS_OUT_REG_A_REGID(vp->outputs[k].regid); - reg |= A3XX_SP_VS_OUT_REG_A_COMPMASK(fp->inputs[j].compmask); - } - - j = ir3_next_varying(fp, j); - if (j < fp->inputs_count) { - k = ir3_find_output(vp, fp->inputs[j].slot); - reg |= A3XX_SP_VS_OUT_REG_B_REGID(vp->outputs[k].regid); - reg |= A3XX_SP_VS_OUT_REG_B_COMPMASK(fp->inputs[j].compmask); - } + reg |= A3XX_SP_VS_OUT_REG_A_REGID(l.var[j].regid); + reg |= A3XX_SP_VS_OUT_REG_A_COMPMASK(l.var[j].compmask); + j++; + + reg |= A3XX_SP_VS_OUT_REG_B_REGID(l.var[j].regid); + reg |= A3XX_SP_VS_OUT_REG_B_COMPMASK(l.var[j].compmask); + j++; OUT_RING(ring, reg); } - for (i = 0, j = -1; (i < 4) && (j < (int)fp->inputs_count); i++) { + for (i = 0, j = 0; (i < 8) && (j < l.cnt); i++) { uint32_t reg = 0; OUT_PKT0(ring, REG_A3XX_SP_VS_VPC_DST_REG(i), 1); - j = ir3_next_varying(fp, j); - if (j < fp->inputs_count) - reg |= A3XX_SP_VS_VPC_DST_REG_OUTLOC0(fp->inputs[j].inloc); - j = ir3_next_varying(fp, j); - if (j < fp->inputs_count) - reg |= A3XX_SP_VS_VPC_DST_REG_OUTLOC1(fp->inputs[j].inloc); - j = ir3_next_varying(fp, j); - if (j < fp->inputs_count) - reg |= A3XX_SP_VS_VPC_DST_REG_OUTLOC2(fp->inputs[j].inloc); - j = ir3_next_varying(fp, j); - if (j < fp->inputs_count) - reg |= A3XX_SP_VS_VPC_DST_REG_OUTLOC3(fp->inputs[j].inloc); + reg |= A3XX_SP_VS_VPC_DST_REG_OUTLOC0(l.var[j++].loc + 8); + reg |= A3XX_SP_VS_VPC_DST_REG_OUTLOC1(l.var[j++].loc + 8); + reg |= A3XX_SP_VS_VPC_DST_REG_OUTLOC2(l.var[j++].loc + 8); + reg |= A3XX_SP_VS_VPC_DST_REG_OUTLOC3(l.var[j++].loc + 8); OUT_RING(ring, reg); } @@ -402,12 +391,9 @@ */ unsigned compmask = fp->inputs[j].compmask; - /* TODO might be cleaner to just +8 in SP_VS_VPC_DST_REG - * instead.. rather than -8 everywhere else.. - */ - uint32_t inloc = fp->inputs[j].inloc - 8; + uint32_t inloc = fp->inputs[j].inloc; - if ((fp->inputs[j].interpolate == INTERP_QUALIFIER_FLAT) || + if ((fp->inputs[j].interpolate == INTERP_MODE_FLAT) || (fp->inputs[j].rasterflat && emit->rasterflat)) { uint32_t loc = inloc; diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/fd3_query.c mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/fd3_query.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/fd3_query.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/fd3_query.c 2017-06-01 10:37:10.000000000 +0000 @@ -46,10 +46,10 @@ */ static struct fd_hw_sample * -occlusion_get_sample(struct fd_context *ctx, struct fd_ringbuffer *ring) +occlusion_get_sample(struct fd_batch *batch, struct fd_ringbuffer *ring) { struct fd_hw_sample *samp = - fd_hw_sample_init(ctx, sizeof(struct fd_rb_samp_ctrs)); + fd_hw_sample_init(batch, sizeof(struct fd_rb_samp_ctrs)); /* Set RB_SAMPLE_COUNT_ADDR to samp->offset plus value of * HW_QUERY_BASE_REG register: @@ -68,7 +68,7 @@ INDEX_SIZE_IGN, USE_VISIBILITY, 0)); OUT_RING(ring, 0); /* NumIndices */ - fd_event_write(ctx, ring, ZPASS_DONE); + fd_event_write(batch, ring, ZPASS_DONE); OUT_PKT0(ring, REG_A3XX_RBBM_PERFCTR_CTL, 1); OUT_RING(ring, A3XX_RBBM_PERFCTR_CTL_ENABLE); diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/fd3_screen.c mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/fd3_screen.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/fd3_screen.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/fd3_screen.c 2017-06-01 10:37:10.000000000 +0000 @@ -52,12 +52,12 @@ } if ((usage & PIPE_BIND_VERTEX_BUFFER) && - (fd3_pipe2vtx(format) != ~0)) { + (fd3_pipe2vtx(format) != (enum a3xx_vtx_fmt)~0)) { retval |= PIPE_BIND_VERTEX_BUFFER; } if ((usage & PIPE_BIND_SAMPLER_VIEW) && - (fd3_pipe2tex(format) != ~0)) { + (fd3_pipe2tex(format) != (enum a3xx_tex_fmt)~0)) { retval |= PIPE_BIND_SAMPLER_VIEW; } @@ -66,8 +66,8 @@ PIPE_BIND_SCANOUT | PIPE_BIND_SHARED | PIPE_BIND_BLENDABLE)) && - (fd3_pipe2color(format) != ~0) && - (fd3_pipe2tex(format) != ~0)) { + (fd3_pipe2color(format) != (enum a3xx_color_fmt)~0) && + (fd3_pipe2tex(format) != (enum a3xx_tex_fmt)~0)) { retval |= usage & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DISPLAY_TARGET | PIPE_BIND_SCANOUT | @@ -77,21 +77,16 @@ } if ((usage & PIPE_BIND_DEPTH_STENCIL) && - (fd_pipe2depth(format) != ~0) && - (fd3_pipe2tex(format) != ~0)) { + (fd_pipe2depth(format) != (enum adreno_rb_depth_format)~0) && + (fd3_pipe2tex(format) != (enum a3xx_tex_fmt)~0)) { retval |= PIPE_BIND_DEPTH_STENCIL; } if ((usage & PIPE_BIND_INDEX_BUFFER) && - (fd_pipe2index(format) != ~0)) { + (fd_pipe2index(format) != (enum pc_di_index_size)~0)) { retval |= PIPE_BIND_INDEX_BUFFER; } - if (usage & PIPE_BIND_TRANSFER_READ) - retval |= PIPE_BIND_TRANSFER_READ; - if (usage & PIPE_BIND_TRANSFER_WRITE) - retval |= PIPE_BIND_TRANSFER_WRITE; - if (retval != usage) { DBG("not supported: format=%s, target=%d, sample_count=%d, " "usage=%x, retval=%x", util_format_name(format), diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/fd3_texture.c mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/fd3_texture.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/fd3_texture.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/fd3_texture.c 2017-06-01 10:37:10.000000000 +0000 @@ -36,7 +36,7 @@ #include "fd3_format.h" static enum a3xx_tex_clamp -tex_clamp(unsigned wrap, bool clamp_to_edge) +tex_clamp(unsigned wrap, bool clamp_to_edge, bool *needs_border) { /* Hardware does not support _CLAMP, but we emulate it: */ if (wrap == PIPE_TEX_WRAP_CLAMP) { @@ -50,6 +50,7 @@ case PIPE_TEX_WRAP_CLAMP_TO_EDGE: return A3XX_TEX_CLAMP_TO_EDGE; case PIPE_TEX_WRAP_CLAMP_TO_BORDER: + *needs_border = true; return A3XX_TEX_CLAMP_TO_BORDER; case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE: /* only works for PoT.. need to emulate otherwise! */ @@ -113,6 +114,7 @@ so->saturate_r = (cso->wrap_r == PIPE_TEX_WRAP_CLAMP); } + so->needs_border = false; so->texsamp0 = COND(!cso->normalized_coords, A3XX_TEX_SAMP_0_UNNORM_COORDS) | COND(!cso->seamless_cube_map, A3XX_TEX_SAMP_0_CUBEMAPSEAMLESSFILTOFF) | @@ -120,9 +122,9 @@ A3XX_TEX_SAMP_0_XY_MAG(tex_filter(cso->mag_img_filter, aniso)) | A3XX_TEX_SAMP_0_XY_MIN(tex_filter(cso->min_img_filter, aniso)) | A3XX_TEX_SAMP_0_ANISO(aniso) | - A3XX_TEX_SAMP_0_WRAP_S(tex_clamp(cso->wrap_s, clamp_to_edge)) | - A3XX_TEX_SAMP_0_WRAP_T(tex_clamp(cso->wrap_t, clamp_to_edge)) | - A3XX_TEX_SAMP_0_WRAP_R(tex_clamp(cso->wrap_r, clamp_to_edge)); + A3XX_TEX_SAMP_0_WRAP_S(tex_clamp(cso->wrap_s, clamp_to_edge, &so->needs_border)) | + A3XX_TEX_SAMP_0_WRAP_T(tex_clamp(cso->wrap_t, clamp_to_edge, &so->needs_border)) | + A3XX_TEX_SAMP_0_WRAP_R(tex_clamp(cso->wrap_r, clamp_to_edge, &so->needs_border)); if (cso->compare_mode) so->texsamp0 |= A3XX_TEX_SAMP_0_COMPARE_FUNC(cso->compare_func); /* maps 1:1 */ @@ -141,7 +143,7 @@ static void fd3_sampler_states_bind(struct pipe_context *pctx, - unsigned shader, unsigned start, + enum pipe_shader_type shader, unsigned start, unsigned nr, void **hwcso) { struct fd_context *ctx = fd_context(pctx); @@ -232,6 +234,8 @@ fd3_tex_swiz(cso->format, cso->swizzle_r, cso->swizzle_g, cso->swizzle_b, cso->swizzle_a); + if (prsc->target == PIPE_BUFFER || util_format_is_pure_integer(cso->format)) + so->texconst0 |= A3XX_TEX_CONST_0_NOCONVERT; if (util_format_is_srgb(cso->format)) so->texconst0 |= A3XX_TEX_CONST_0_SRGB; @@ -239,8 +243,7 @@ lvl = 0; so->texconst1 = A3XX_TEX_CONST_1_FETCHSIZE(fd3_pipe2fetchsize(cso->format)) | - A3XX_TEX_CONST_1_WIDTH(cso->u.buf.last_element - - cso->u.buf.first_element + 1) | + A3XX_TEX_CONST_1_WIDTH(cso->u.buf.size / util_format_get_blocksize(cso->format)) | A3XX_TEX_CONST_1_HEIGHT(1); } else { unsigned miplevels; diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/fd3_texture.h mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/fd3_texture.h --- mesa-12.0.6/src/gallium/drivers/freedreno/a3xx/fd3_texture.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a3xx/fd3_texture.h 2017-06-01 10:37:10.000000000 +0000 @@ -41,6 +41,7 @@ struct pipe_sampler_state base; uint32_t texsamp0, texsamp1; bool saturate_s, saturate_t, saturate_r; + bool needs_border; }; static inline struct fd3_sampler_stateobj * diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h --- mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h 2017-06-01 10:37:10.000000000 +0000 @@ -8,13 +8,14 @@ git clone https://github.com/freedreno/envytools.git The rules-ng-ng source files this header was generated from are: -- /home/robclark/src/freedreno/envytools/rnndb/adreno.xml ( 398 bytes, from 2015-09-24 17:25:31) +- /home/robclark/src/freedreno/envytools/rnndb/adreno.xml ( 431 bytes, from 2016-04-26 17:56:44) - /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2016-02-10 17:07:21) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32901 bytes, from 2015-05-20 20:03:14) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 11518 bytes, from 2016-02-10 21:03:25) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 16185 bytes, from 2016-03-05 03:08:05) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83967 bytes, from 2016-02-10 17:07:21) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 110685 bytes, from 2016-04-25 17:56:43) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32907 bytes, from 2016-11-26 23:01:08) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 12025 bytes, from 2016-11-26 23:01:08) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 23277 bytes, from 2016-12-24 05:01:47) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2016-11-26 23:01:08) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 110757 bytes, from 2016-12-26 17:51:07) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 100594 bytes, from 2017-01-20 23:03:30) - /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2015-09-24 17:30:00) Copyright (C) 2013-2016 by the following authors: @@ -92,17 +93,10 @@ enum a4xx_tile_mode { TILE4_LINEAR = 0, + TILE4_2 = 2, TILE4_3 = 3, }; -enum a4xx_rb_blend_opcode { - BLEND_DST_PLUS_SRC = 0, - BLEND_SRC_MINUS_DST = 1, - BLEND_DST_MINUS_SRC = 2, - BLEND_MIN_DST_SRC = 3, - BLEND_MAX_DST_SRC = 4, -}; - enum a4xx_vtx_fmt { VFMT4_32_FLOAT = 1, VFMT4_32_32_FLOAT = 2, @@ -935,12 +929,14 @@ #define A4XX_RB_MODE_CONTROL_WIDTH__SHIFT 0 static inline uint32_t A4XX_RB_MODE_CONTROL_WIDTH(uint32_t val) { + assert(!(val & 0x1f)); return ((val >> 5) << A4XX_RB_MODE_CONTROL_WIDTH__SHIFT) & A4XX_RB_MODE_CONTROL_WIDTH__MASK; } #define A4XX_RB_MODE_CONTROL_HEIGHT__MASK 0x00003f00 #define A4XX_RB_MODE_CONTROL_HEIGHT__SHIFT 8 static inline uint32_t A4XX_RB_MODE_CONTROL_HEIGHT(uint32_t val) { + assert(!(val & 0x1f)); return ((val >> 5) << A4XX_RB_MODE_CONTROL_HEIGHT__SHIFT) & A4XX_RB_MODE_CONTROL_HEIGHT__MASK; } #define A4XX_RB_MODE_CONTROL_ENABLE_GMEM 0x00010000 @@ -1025,6 +1021,7 @@ #define A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH__SHIFT 14 static inline uint32_t A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH(uint32_t val) { + assert(!(val & 0xf)); return ((val >> 4) << A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH__SHIFT) & A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH__MASK; } @@ -1047,7 +1044,7 @@ } #define A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__MASK 0x000000e0 #define A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__SHIFT 5 -static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(enum a4xx_rb_blend_opcode val) +static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(enum a3xx_rb_blend_opcode val) { return ((val) << A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__SHIFT) & A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__MASK; } @@ -1065,7 +1062,7 @@ } #define A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__MASK 0x00e00000 #define A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__SHIFT 21 -static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(enum a4xx_rb_blend_opcode val) +static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(enum a3xx_rb_blend_opcode val) { return ((val) << A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__SHIFT) & A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__MASK; } @@ -1224,6 +1221,7 @@ #define A4XX_RB_SAMPLE_COUNT_CONTROL_ADDR__SHIFT 2 static inline uint32_t A4XX_RB_SAMPLE_COUNT_CONTROL_ADDR(uint32_t val) { + assert(!(val & 0x3)); return ((val >> 2) << A4XX_RB_SAMPLE_COUNT_CONTROL_ADDR__SHIFT) & A4XX_RB_SAMPLE_COUNT_CONTROL_ADDR__MASK; } @@ -1300,6 +1298,7 @@ #define A4XX_RB_COPY_CONTROL_GMEM_BASE__SHIFT 14 static inline uint32_t A4XX_RB_COPY_CONTROL_GMEM_BASE(uint32_t val) { + assert(!(val & 0x3fff)); return ((val >> 14) << A4XX_RB_COPY_CONTROL_GMEM_BASE__SHIFT) & A4XX_RB_COPY_CONTROL_GMEM_BASE__MASK; } @@ -1308,6 +1307,7 @@ #define A4XX_RB_COPY_DEST_BASE_BASE__SHIFT 5 static inline uint32_t A4XX_RB_COPY_DEST_BASE_BASE(uint32_t val) { + assert(!(val & 0x1f)); return ((val >> 5) << A4XX_RB_COPY_DEST_BASE_BASE__SHIFT) & A4XX_RB_COPY_DEST_BASE_BASE__MASK; } @@ -1316,6 +1316,7 @@ #define A4XX_RB_COPY_DEST_PITCH_PITCH__SHIFT 0 static inline uint32_t A4XX_RB_COPY_DEST_PITCH_PITCH(uint32_t val) { + assert(!(val & 0x1f)); return ((val >> 5) << A4XX_RB_COPY_DEST_PITCH_PITCH__SHIFT) & A4XX_RB_COPY_DEST_PITCH_PITCH__MASK; } @@ -1394,6 +1395,7 @@ #define A4XX_RB_DEPTH_INFO_DEPTH_BASE__SHIFT 12 static inline uint32_t A4XX_RB_DEPTH_INFO_DEPTH_BASE(uint32_t val) { + assert(!(val & 0xfff)); return ((val >> 12) << A4XX_RB_DEPTH_INFO_DEPTH_BASE__SHIFT) & A4XX_RB_DEPTH_INFO_DEPTH_BASE__MASK; } @@ -1402,6 +1404,7 @@ #define A4XX_RB_DEPTH_PITCH__SHIFT 0 static inline uint32_t A4XX_RB_DEPTH_PITCH(uint32_t val) { + assert(!(val & 0x1f)); return ((val >> 5) << A4XX_RB_DEPTH_PITCH__SHIFT) & A4XX_RB_DEPTH_PITCH__MASK; } @@ -1410,6 +1413,7 @@ #define A4XX_RB_DEPTH_PITCH2__SHIFT 0 static inline uint32_t A4XX_RB_DEPTH_PITCH2(uint32_t val) { + assert(!(val & 0x1f)); return ((val >> 5) << A4XX_RB_DEPTH_PITCH2__SHIFT) & A4XX_RB_DEPTH_PITCH2__MASK; } @@ -1475,6 +1479,7 @@ #define A4XX_RB_STENCIL_INFO_STENCIL_BASE__SHIFT 12 static inline uint32_t A4XX_RB_STENCIL_INFO_STENCIL_BASE(uint32_t val) { + assert(!(val & 0xfff)); return ((val >> 12) << A4XX_RB_STENCIL_INFO_STENCIL_BASE__SHIFT) & A4XX_RB_STENCIL_INFO_STENCIL_BASE__MASK; } @@ -1483,6 +1488,7 @@ #define A4XX_RB_STENCIL_PITCH__SHIFT 0 static inline uint32_t A4XX_RB_STENCIL_PITCH(uint32_t val) { + assert(!(val & 0x1f)); return ((val >> 5) << A4XX_RB_STENCIL_PITCH__SHIFT) & A4XX_RB_STENCIL_PITCH__MASK; } @@ -2205,11 +2211,23 @@ #define REG_A4XX_CP_DRAW_STATE_ADDR 0x00000232 -#define REG_A4XX_CP_PROTECT_REG_0 0x00000240 - static inline uint32_t REG_A4XX_CP_PROTECT(uint32_t i0) { return 0x00000240 + 0x1*i0; } static inline uint32_t REG_A4XX_CP_PROTECT_REG(uint32_t i0) { return 0x00000240 + 0x1*i0; } +#define A4XX_CP_PROTECT_REG_BASE_ADDR__MASK 0x0001ffff +#define A4XX_CP_PROTECT_REG_BASE_ADDR__SHIFT 0 +static inline uint32_t A4XX_CP_PROTECT_REG_BASE_ADDR(uint32_t val) +{ + return ((val) << A4XX_CP_PROTECT_REG_BASE_ADDR__SHIFT) & A4XX_CP_PROTECT_REG_BASE_ADDR__MASK; +} +#define A4XX_CP_PROTECT_REG_MASK_LEN__MASK 0x1f000000 +#define A4XX_CP_PROTECT_REG_MASK_LEN__SHIFT 24 +static inline uint32_t A4XX_CP_PROTECT_REG_MASK_LEN(uint32_t val) +{ + return ((val) << A4XX_CP_PROTECT_REG_MASK_LEN__SHIFT) & A4XX_CP_PROTECT_REG_MASK_LEN__MASK; +} +#define A4XX_CP_PROTECT_REG_TRAP_WRITE 0x20000000 +#define A4XX_CP_PROTECT_REG_TRAP_READ 0x40000000 #define REG_A4XX_CP_PROTECT_CTRL 0x00000250 @@ -2300,7 +2318,7 @@ { return ((val) << A4XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A4XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT__MASK; } -#define A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT__MASK 0x0003fc00 +#define A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT__MASK 0x0000fc00 #define A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT 10 static inline uint32_t A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val) { @@ -2448,7 +2466,7 @@ { return ((val) << A4XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A4XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT__MASK; } -#define A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT__MASK 0x0003fc00 +#define A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT__MASK 0x0000fc00 #define A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT 10 static inline uint32_t A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val) { @@ -2832,12 +2850,14 @@ #define A4XX_VSC_BIN_SIZE_WIDTH__SHIFT 0 static inline uint32_t A4XX_VSC_BIN_SIZE_WIDTH(uint32_t val) { + assert(!(val & 0x1f)); return ((val >> 5) << A4XX_VSC_BIN_SIZE_WIDTH__SHIFT) & A4XX_VSC_BIN_SIZE_WIDTH__MASK; } #define A4XX_VSC_BIN_SIZE_HEIGHT__MASK 0x000003e0 #define A4XX_VSC_BIN_SIZE_HEIGHT__SHIFT 5 static inline uint32_t A4XX_VSC_BIN_SIZE_HEIGHT(uint32_t val) { + assert(!(val & 0x1f)); return ((val >> 5) << A4XX_VSC_BIN_SIZE_HEIGHT__SHIFT) & A4XX_VSC_BIN_SIZE_HEIGHT__MASK; } @@ -3004,11 +3024,11 @@ static inline uint32_t REG_A4XX_VFD_FETCH_INSTR_1(uint32_t i0) { return 0x0000220b + 0x4*i0; } static inline uint32_t REG_A4XX_VFD_FETCH_INSTR_2(uint32_t i0) { return 0x0000220c + 0x4*i0; } -#define A4XX_VFD_FETCH_INSTR_2_SIZE__MASK 0xfffffff0 -#define A4XX_VFD_FETCH_INSTR_2_SIZE__SHIFT 4 +#define A4XX_VFD_FETCH_INSTR_2_SIZE__MASK 0xffffffff +#define A4XX_VFD_FETCH_INSTR_2_SIZE__SHIFT 0 static inline uint32_t A4XX_VFD_FETCH_INSTR_2_SIZE(uint32_t val) { - return ((val >> 4) << A4XX_VFD_FETCH_INSTR_2_SIZE__SHIFT) & A4XX_VFD_FETCH_INSTR_2_SIZE__MASK; + return ((val) << A4XX_VFD_FETCH_INSTR_2_SIZE__SHIFT) & A4XX_VFD_FETCH_INSTR_2_SIZE__MASK; } static inline uint32_t REG_A4XX_VFD_FETCH_INSTR_3(uint32_t i0) { return 0x0000220d + 0x4*i0; } @@ -3283,6 +3303,7 @@ return ((((int32_t)(val * 4.0))) << A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH__SHIFT) & A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH__MASK; } #define A4XX_GRAS_SU_MODE_CONTROL_POLY_OFFSET 0x00000800 +#define A4XX_GRAS_SU_MODE_CONTROL_MSAA_ENABLE 0x00002000 #define A4XX_GRAS_SU_MODE_CONTROL_RENDERING_PASS 0x00100000 #define REG_A4XX_GRAS_SC_CONTROL 0x0000207b @@ -3700,6 +3721,8 @@ #define REG_A4XX_PC_BINNING_COMMAND 0x00000d00 #define A4XX_PC_BINNING_COMMAND_BINNING_ENABLE 0x00000001 +#define REG_A4XX_PC_TESSFACTOR_ADDR 0x00000d08 + #define REG_A4XX_PC_DRAWCALL_SETUP_OVERRIDE 0x00000d0c #define REG_A4XX_PC_PERFCTR_PC_SEL_0 0x00000d10 @@ -3796,12 +3819,8 @@ { return ((val) << A4XX_PC_HS_PARAM_SPACING__SHIFT) & A4XX_PC_HS_PARAM_SPACING__MASK; } -#define A4XX_PC_HS_PARAM_PRIMTYPE__MASK 0x01800000 -#define A4XX_PC_HS_PARAM_PRIMTYPE__SHIFT 23 -static inline uint32_t A4XX_PC_HS_PARAM_PRIMTYPE(enum adreno_pa_su_sc_draw val) -{ - return ((val) << A4XX_PC_HS_PARAM_PRIMTYPE__SHIFT) & A4XX_PC_HS_PARAM_PRIMTYPE__MASK; -} +#define A4XX_PC_HS_PARAM_CW 0x00800000 +#define A4XX_PC_HS_PARAM_CONNECTED 0x01000000 #define REG_A4XX_VBIF_VERSION 0x00003000 @@ -4015,6 +4034,7 @@ #define A4XX_TEX_CONST_3_LAYERSZ__SHIFT 0 static inline uint32_t A4XX_TEX_CONST_3_LAYERSZ(uint32_t val) { + assert(!(val & 0xfff)); return ((val >> 12) << A4XX_TEX_CONST_3_LAYERSZ__SHIFT) & A4XX_TEX_CONST_3_LAYERSZ__MASK; } #define A4XX_TEX_CONST_3_DEPTH__MASK 0x7ffc0000 @@ -4029,12 +4049,14 @@ #define A4XX_TEX_CONST_4_LAYERSZ__SHIFT 0 static inline uint32_t A4XX_TEX_CONST_4_LAYERSZ(uint32_t val) { + assert(!(val & 0xfff)); return ((val >> 12) << A4XX_TEX_CONST_4_LAYERSZ__SHIFT) & A4XX_TEX_CONST_4_LAYERSZ__MASK; } #define A4XX_TEX_CONST_4_BASE__MASK 0xffffffe0 #define A4XX_TEX_CONST_4_BASE__SHIFT 5 static inline uint32_t A4XX_TEX_CONST_4_BASE(uint32_t val) { + assert(!(val & 0x1f)); return ((val >> 5) << A4XX_TEX_CONST_4_BASE__SHIFT) & A4XX_TEX_CONST_4_BASE__MASK; } diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_blend.c mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_blend.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_blend.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_blend.c 2017-06-01 10:37:10.000000000 +0000 @@ -35,7 +35,7 @@ #include "fd4_context.h" #include "fd4_format.h" -static enum a4xx_rb_blend_opcode +static enum a3xx_rb_blend_opcode blend_func(unsigned func) { switch (func) { diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_context.c mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_context.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -47,45 +47,14 @@ fd_bo_del(fd4_ctx->fs_pvt_mem); fd_bo_del(fd4_ctx->vsc_size_mem); - pctx->delete_vertex_elements_state(pctx, fd4_ctx->solid_vbuf_state.vtx); - pctx->delete_vertex_elements_state(pctx, fd4_ctx->blit_vbuf_state.vtx); - - pipe_resource_reference(&fd4_ctx->solid_vbuf, NULL); - pipe_resource_reference(&fd4_ctx->blit_texcoord_vbuf, NULL); + fd_context_cleanup_common_vbos(&fd4_ctx->base); u_upload_destroy(fd4_ctx->border_color_uploader); fd_context_destroy(pctx); } -/* TODO we could combine a few of these small buffers (solid_vbuf, - * blit_texcoord_vbuf, and vsc_size_mem, into a single buffer and - * save a tiny bit of memory - */ - -static struct pipe_resource * -create_solid_vertexbuf(struct pipe_context *pctx) -{ - static const float init_shader_const[] = { - -1.000000, +1.000000, +1.000000, - +1.000000, -1.000000, +1.000000, - }; - struct pipe_resource *prsc = pipe_buffer_create(pctx->screen, - PIPE_BIND_CUSTOM, PIPE_USAGE_IMMUTABLE, sizeof(init_shader_const)); - pipe_buffer_write(pctx, prsc, 0, - sizeof(init_shader_const), init_shader_const); - return prsc; -} - -static struct pipe_resource * -create_blit_texcoord_vertexbuf(struct pipe_context *pctx) -{ - struct pipe_resource *prsc = pipe_buffer_create(pctx->screen, - PIPE_BIND_CUSTOM, PIPE_USAGE_DYNAMIC, 16); - return prsc; -} - -static const uint8_t primtypes[PIPE_PRIM_MAX] = { +static const uint8_t primtypes[] = { [PIPE_PRIM_POINTS] = DI_PT_POINTLIST, [PIPE_PRIM_LINES] = DI_PT_LINELIST, [PIPE_PRIM_LINE_STRIP] = DI_PT_LINESTRIP, @@ -93,6 +62,7 @@ [PIPE_PRIM_TRIANGLES] = DI_PT_TRILIST, [PIPE_PRIM_TRIANGLE_STRIP] = DI_PT_TRISTRIP, [PIPE_PRIM_TRIANGLE_FAN] = DI_PT_TRIFAN, + [PIPE_PRIM_MAX] = DI_PT_RECTLIST, /* internal clear blits */ }; struct pipe_context * @@ -134,36 +104,7 @@ fd4_ctx->vsc_size_mem = fd_bo_new(screen->dev, 0x1000, DRM_FREEDRENO_GEM_TYPE_KMEM); - fd4_ctx->solid_vbuf = create_solid_vertexbuf(pctx); - fd4_ctx->blit_texcoord_vbuf = create_blit_texcoord_vertexbuf(pctx); - - /* setup solid_vbuf_state: */ - fd4_ctx->solid_vbuf_state.vtx = pctx->create_vertex_elements_state( - pctx, 1, (struct pipe_vertex_element[]){{ - .vertex_buffer_index = 0, - .src_offset = 0, - .src_format = PIPE_FORMAT_R32G32B32_FLOAT, - }}); - fd4_ctx->solid_vbuf_state.vertexbuf.count = 1; - fd4_ctx->solid_vbuf_state.vertexbuf.vb[0].stride = 12; - fd4_ctx->solid_vbuf_state.vertexbuf.vb[0].buffer = fd4_ctx->solid_vbuf; - - /* setup blit_vbuf_state: */ - fd4_ctx->blit_vbuf_state.vtx = pctx->create_vertex_elements_state( - pctx, 2, (struct pipe_vertex_element[]){{ - .vertex_buffer_index = 0, - .src_offset = 0, - .src_format = PIPE_FORMAT_R32G32_FLOAT, - }, { - .vertex_buffer_index = 1, - .src_offset = 0, - .src_format = PIPE_FORMAT_R32G32B32_FLOAT, - }}); - fd4_ctx->blit_vbuf_state.vertexbuf.count = 2; - fd4_ctx->blit_vbuf_state.vertexbuf.vb[0].stride = 8; - fd4_ctx->blit_vbuf_state.vertexbuf.vb[0].buffer = fd4_ctx->blit_texcoord_vbuf; - fd4_ctx->blit_vbuf_state.vertexbuf.vb[1].stride = 12; - fd4_ctx->blit_vbuf_state.vertexbuf.vb[1].buffer = fd4_ctx->solid_vbuf; + fd_context_setup_common_vbos(&fd4_ctx->base); fd4_query_context_init(pctx); diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_context.h mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_context.h --- mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_context.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_context.h 2017-06-01 10:37:10.000000000 +0000 @@ -49,26 +49,6 @@ */ struct fd_bo *vsc_size_mem; - /* vertex buf used for clear/gmem->mem vertices, and mem->gmem - * vertices: - */ - struct pipe_resource *solid_vbuf; - - /* vertex buf used for mem->gmem tex coords: - */ - struct pipe_resource *blit_texcoord_vbuf; - - /* vertex state for solid_vbuf: - * - solid_vbuf / 12 / R32G32B32_FLOAT - */ - struct fd_vertex_state solid_vbuf_state; - - /* vertex state for blit_prog: - * - blit_texcoord_vbuf / 8 / R32G32_FLOAT - * - solid_vbuf / 12 / R32G32B32_FLOAT - */ - struct fd_vertex_state blit_vbuf_state; - struct u_upload_mgr *border_color_uploader; struct pipe_resource *border_color_buf; diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_draw.c mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_draw.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_draw.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_draw.c 2017-06-01 10:37:10.000000000 +0000 @@ -68,8 +68,7 @@ (info->mode == PIPE_PRIM_POINTS)) primtype = DI_PT_POINTLIST_PSIZE; - fd4_draw_emit(ctx, ring, - primtype, + fd4_draw_emit(ctx->batch, ring, primtype, emit->key.binning_pass ? IGNORE_VISIBILITY : USE_VISIBILITY, info); } @@ -114,6 +113,9 @@ if (last_key->rasterflat != key->rasterflat) ctx->dirty |= FD_SHADER_DIRTY_FP; + if (last_key->ucp_enables != key->ucp_enables) + ctx->dirty |= FD_SHADER_DIRTY_FP | FD_SHADER_DIRTY_VP; + fd4_ctx->last_key = *key; } } @@ -132,9 +134,8 @@ .vclamp_color = ctx->rasterizer->clamp_vertex_color, .fclamp_color = ctx->rasterizer->clamp_fragment_color, .rasterflat = ctx->rasterizer->flatshade, - // TODO set .half_precision based on render target format, - // ie. float16 and smaller use half, float32 use full.. - .half_precision = !!(fd_mesa_debug & FD_DBG_FRAGHALF), + .half_precision = ctx->in_blit && + fd_half_precision(&ctx->batch->framebuffer), .ucp_enables = ctx->rasterizer->clip_plane_enable, .has_per_samp = (fd4_ctx->fsaturate || fd4_ctx->vsaturate || fd4_ctx->fastc_srgb || fd4_ctx->vastc_srgb), @@ -164,22 +165,24 @@ emit.key.binning_pass = false; emit.dirty = dirty; + struct fd_ringbuffer *ring = ctx->batch->draw; + if (ctx->rasterizer->rasterizer_discard) { - fd_wfi(ctx, ctx->ring); - OUT_PKT3(ctx->ring, CP_REG_RMW, 3); - OUT_RING(ctx->ring, REG_A4XX_RB_RENDER_CONTROL); - OUT_RING(ctx->ring, ~A4XX_RB_RENDER_CONTROL_DISABLE_COLOR_PIPE); - OUT_RING(ctx->ring, A4XX_RB_RENDER_CONTROL_DISABLE_COLOR_PIPE); + fd_wfi(ctx->batch, ring); + OUT_PKT3(ring, CP_REG_RMW, 3); + OUT_RING(ring, REG_A4XX_RB_RENDER_CONTROL); + OUT_RING(ring, ~A4XX_RB_RENDER_CONTROL_DISABLE_COLOR_PIPE); + OUT_RING(ring, A4XX_RB_RENDER_CONTROL_DISABLE_COLOR_PIPE); } - draw_impl(ctx, ctx->ring, &emit); + draw_impl(ctx, ctx->batch->draw, &emit); if (ctx->rasterizer->rasterizer_discard) { - fd_wfi(ctx, ctx->ring); - OUT_PKT3(ctx->ring, CP_REG_RMW, 3); - OUT_RING(ctx->ring, REG_A4XX_RB_RENDER_CONTROL); - OUT_RING(ctx->ring, ~A4XX_RB_RENDER_CONTROL_DISABLE_COLOR_PIPE); - OUT_RING(ctx->ring, 0); + fd_wfi(ctx->batch, ring); + OUT_PKT3(ring, CP_REG_RMW, 3); + OUT_RING(ring, REG_A4XX_RB_RENDER_CONTROL); + OUT_RING(ring, ~A4XX_RB_RENDER_CONTROL_DISABLE_COLOR_PIPE); + OUT_RING(ring, 0); } /* and now binning pass: */ @@ -187,227 +190,14 @@ emit.dirty = dirty & ~(FD_DIRTY_BLEND); emit.vp = NULL; /* we changed key so need to refetch vp */ emit.fp = NULL; - draw_impl(ctx, ctx->binning_ring, &emit); + draw_impl(ctx, ctx->batch->binning, &emit); return true; } -/* clear operations ignore viewport state, so we need to reset it - * based on framebuffer state: - */ -static void -reset_viewport(struct fd_ringbuffer *ring, struct pipe_framebuffer_state *pfb) -{ - float half_width = pfb->width * 0.5f; - float half_height = pfb->height * 0.5f; - - OUT_PKT0(ring, REG_A4XX_GRAS_CL_VPORT_XOFFSET_0, 4); - OUT_RING(ring, A4XX_GRAS_CL_VPORT_XOFFSET_0(half_width)); - OUT_RING(ring, A4XX_GRAS_CL_VPORT_XSCALE_0(half_width)); - OUT_RING(ring, A4XX_GRAS_CL_VPORT_YOFFSET_0(half_height)); - OUT_RING(ring, A4XX_GRAS_CL_VPORT_YSCALE_0(-half_height)); -} - -/* TODO maybe we should just migrate u_blitter for clear and do it in - * core (so we get normal draw pass state mgmt and binning).. That should - * work well enough for a3xx/a4xx (but maybe not a2xx?) - */ - -static void -fd4_clear_binning(struct fd_context *ctx, unsigned dirty) -{ - struct fd4_context *fd4_ctx = fd4_context(ctx); - struct fd_ringbuffer *ring = ctx->binning_ring; - struct fd4_emit emit = { - .debug = &ctx->debug, - .vtx = &fd4_ctx->solid_vbuf_state, - .prog = &ctx->solid_prog, - .key = { - .binning_pass = true, - .half_precision = true, - }, - .dirty = dirty, - }; - - fd4_emit_state(ctx, ring, &emit); - fd4_emit_vertex_bufs(ring, &emit); - reset_viewport(ring, &ctx->framebuffer); - - OUT_PKT0(ring, REG_A4XX_PC_PRIM_VTX_CNTL, 2); - OUT_RING(ring, A4XX_PC_PRIM_VTX_CNTL_VAROUT(0) | - A4XX_PC_PRIM_VTX_CNTL_PROVOKING_VTX_LAST); - OUT_RING(ring, A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_FRONT_PTYPE(PC_DRAW_TRIANGLES) | - A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_BACK_PTYPE(PC_DRAW_TRIANGLES)); - - OUT_PKT0(ring, REG_A4XX_GRAS_ALPHA_CONTROL, 1); - OUT_RING(ring, 0x00000002); - - fd4_draw(ctx, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY, - DI_SRC_SEL_AUTO_INDEX, 2, 1, INDEX_SIZE_IGN, 0, 0, NULL); -} - -static void -fd4_clear(struct fd_context *ctx, unsigned buffers, - const union pipe_color_union *color, double depth, unsigned stencil) -{ - struct fd4_context *fd4_ctx = fd4_context(ctx); - struct fd_ringbuffer *ring = ctx->ring; - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; - unsigned char mrt_comp[A4XX_MAX_RENDER_TARGETS] = {0}; - unsigned dirty = ctx->dirty; - unsigned i; - struct fd4_emit emit = { - .debug = &ctx->debug, - .vtx = &fd4_ctx->solid_vbuf_state, - .prog = &ctx->solid_prog, - .key = { - .half_precision = fd_half_precision(pfb), - }, - }; - - dirty &= FD_DIRTY_FRAMEBUFFER | FD_DIRTY_SCISSOR; - dirty |= FD_DIRTY_PROG; - emit.dirty = dirty; - - fd4_clear_binning(ctx, dirty); - - OUT_PKT0(ring, REG_A4XX_PC_PRIM_VTX_CNTL, 1); - OUT_RING(ring, A4XX_PC_PRIM_VTX_CNTL_PROVOKING_VTX_LAST); - - /* emit generic state now: */ - fd4_emit_state(ctx, ring, &emit); - reset_viewport(ring, pfb); - - if (buffers & PIPE_CLEAR_DEPTH) { - OUT_PKT0(ring, REG_A4XX_RB_DEPTH_CONTROL, 1); - OUT_RING(ring, A4XX_RB_DEPTH_CONTROL_Z_WRITE_ENABLE | - A4XX_RB_DEPTH_CONTROL_Z_ENABLE | - A4XX_RB_DEPTH_CONTROL_ZFUNC(FUNC_ALWAYS)); - - fd_wfi(ctx, ring); - OUT_PKT0(ring, REG_A4XX_GRAS_CL_VPORT_ZOFFSET_0, 2); - OUT_RING(ring, A4XX_GRAS_CL_VPORT_ZOFFSET_0(0.0)); - OUT_RING(ring, A4XX_GRAS_CL_VPORT_ZSCALE_0(depth)); - ctx->dirty |= FD_DIRTY_VIEWPORT; - } else { - OUT_PKT0(ring, REG_A4XX_RB_DEPTH_CONTROL, 1); - OUT_RING(ring, A4XX_RB_DEPTH_CONTROL_ZFUNC(FUNC_NEVER)); - } - - if (buffers & PIPE_CLEAR_STENCIL) { - OUT_PKT0(ring, REG_A4XX_RB_STENCILREFMASK, 2); - OUT_RING(ring, A4XX_RB_STENCILREFMASK_STENCILREF(stencil) | - A4XX_RB_STENCILREFMASK_STENCILMASK(stencil) | - A4XX_RB_STENCILREFMASK_STENCILWRITEMASK(0xff)); - OUT_RING(ring, A4XX_RB_STENCILREFMASK_STENCILREF(0) | - A4XX_RB_STENCILREFMASK_STENCILMASK(0) | - 0xff000000 | // XXX ??? - A4XX_RB_STENCILREFMASK_STENCILWRITEMASK(0xff)); - - OUT_PKT0(ring, REG_A4XX_RB_STENCIL_CONTROL, 2); - OUT_RING(ring, A4XX_RB_STENCIL_CONTROL_STENCIL_ENABLE | - A4XX_RB_STENCIL_CONTROL_FUNC(FUNC_ALWAYS) | - A4XX_RB_STENCIL_CONTROL_FAIL(STENCIL_KEEP) | - A4XX_RB_STENCIL_CONTROL_ZPASS(STENCIL_REPLACE) | - A4XX_RB_STENCIL_CONTROL_ZFAIL(STENCIL_KEEP) | - A4XX_RB_STENCIL_CONTROL_FUNC_BF(FUNC_NEVER) | - A4XX_RB_STENCIL_CONTROL_FAIL_BF(STENCIL_KEEP) | - A4XX_RB_STENCIL_CONTROL_ZPASS_BF(STENCIL_KEEP) | - A4XX_RB_STENCIL_CONTROL_ZFAIL_BF(STENCIL_KEEP)); - OUT_RING(ring, A4XX_RB_STENCIL_CONTROL2_STENCIL_BUFFER); - } else { - OUT_PKT0(ring, REG_A4XX_RB_STENCILREFMASK, 2); - OUT_RING(ring, A4XX_RB_STENCILREFMASK_STENCILREF(0) | - A4XX_RB_STENCILREFMASK_STENCILMASK(0) | - A4XX_RB_STENCILREFMASK_STENCILWRITEMASK(0)); - OUT_RING(ring, A4XX_RB_STENCILREFMASK_BF_STENCILREF(0) | - A4XX_RB_STENCILREFMASK_BF_STENCILMASK(0) | - A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(0)); - - OUT_PKT0(ring, REG_A4XX_RB_STENCIL_CONTROL, 2); - OUT_RING(ring, A4XX_RB_STENCIL_CONTROL_FUNC(FUNC_NEVER) | - A4XX_RB_STENCIL_CONTROL_FAIL(STENCIL_KEEP) | - A4XX_RB_STENCIL_CONTROL_ZPASS(STENCIL_KEEP) | - A4XX_RB_STENCIL_CONTROL_ZFAIL(STENCIL_KEEP) | - A4XX_RB_STENCIL_CONTROL_FUNC_BF(FUNC_NEVER) | - A4XX_RB_STENCIL_CONTROL_FAIL_BF(STENCIL_KEEP) | - A4XX_RB_STENCIL_CONTROL_ZPASS_BF(STENCIL_KEEP) | - A4XX_RB_STENCIL_CONTROL_ZFAIL_BF(STENCIL_KEEP)); - OUT_RING(ring, 0x00000000); /* RB_STENCIL_CONTROL2 */ - } - - if (buffers & PIPE_CLEAR_COLOR) { - OUT_PKT0(ring, REG_A4XX_RB_ALPHA_CONTROL, 1); - OUT_RING(ring, A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(FUNC_NEVER)); - } - - for (i = 0; i < A4XX_MAX_RENDER_TARGETS; i++) { - mrt_comp[i] = (buffers & (PIPE_CLEAR_COLOR0 << i)) ? 0xf : 0x0; - - OUT_PKT0(ring, REG_A4XX_RB_MRT_CONTROL(i), 1); - OUT_RING(ring, A4XX_RB_MRT_CONTROL_ROP_CODE(ROP_COPY) | - A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE(0xf)); - - OUT_PKT0(ring, REG_A4XX_RB_MRT_BLEND_CONTROL(i), 1); - OUT_RING(ring, A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(FACTOR_ONE) | - A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(BLEND_DST_PLUS_SRC) | - A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(FACTOR_ZERO) | - A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(FACTOR_ONE) | - A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(BLEND_DST_PLUS_SRC) | - A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(FACTOR_ZERO)); - } - - OUT_PKT0(ring, REG_A4XX_RB_RENDER_COMPONENTS, 1); - OUT_RING(ring, A4XX_RB_RENDER_COMPONENTS_RT0(mrt_comp[0]) | - A4XX_RB_RENDER_COMPONENTS_RT1(mrt_comp[1]) | - A4XX_RB_RENDER_COMPONENTS_RT2(mrt_comp[2]) | - A4XX_RB_RENDER_COMPONENTS_RT3(mrt_comp[3]) | - A4XX_RB_RENDER_COMPONENTS_RT4(mrt_comp[4]) | - A4XX_RB_RENDER_COMPONENTS_RT5(mrt_comp[5]) | - A4XX_RB_RENDER_COMPONENTS_RT6(mrt_comp[6]) | - A4XX_RB_RENDER_COMPONENTS_RT7(mrt_comp[7])); - - fd4_emit_vertex_bufs(ring, &emit); - - OUT_PKT0(ring, REG_A4XX_GRAS_ALPHA_CONTROL, 1); - OUT_RING(ring, 0x0); /* XXX GRAS_ALPHA_CONTROL */ - - OUT_PKT0(ring, REG_A4XX_GRAS_CLEAR_CNTL, 1); - OUT_RING(ring, 0x00000000); - - /* until fastclear works: */ - fd4_emit_const(ring, SHADER_FRAGMENT, 0, 0, 4, color->ui, NULL); - - OUT_PKT0(ring, REG_A4XX_VFD_INDEX_OFFSET, 2); - OUT_RING(ring, 0); /* VFD_INDEX_OFFSET */ - OUT_RING(ring, 0); /* ??? UNKNOWN_2209 */ - - OUT_PKT0(ring, REG_A4XX_PC_RESTART_INDEX, 1); - OUT_RING(ring, 0xffffffff); /* PC_RESTART_INDEX */ - - OUT_PKT3(ring, CP_UNKNOWN_1A, 1); - OUT_RING(ring, 0x00000001); - - fd4_draw(ctx, ring, DI_PT_RECTLIST, USE_VISIBILITY, - DI_SRC_SEL_AUTO_INDEX, 2, 1, INDEX_SIZE_IGN, 0, 0, NULL); - - OUT_PKT3(ring, CP_UNKNOWN_1A, 1); - OUT_RING(ring, 0x00000000); - - OUT_PKT0(ring, REG_A4XX_GRAS_CLEAR_CNTL, 1); - OUT_RING(ring, A4XX_GRAS_CLEAR_CNTL_NOT_FASTCLEAR); - - OUT_PKT0(ring, REG_A4XX_GRAS_SC_CONTROL, 1); - OUT_RING(ring, A4XX_GRAS_SC_CONTROL_RENDER_MODE(RB_RENDERING_PASS) | - A4XX_GRAS_SC_CONTROL_MSAA_DISABLE | - A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES(MSAA_ONE) | - A4XX_GRAS_SC_CONTROL_RASTER_MODE(0)); -} - void fd4_draw_init(struct pipe_context *pctx) { struct fd_context *ctx = fd_context(pctx); ctx->draw_vbo = fd4_draw_vbo; - ctx->clear = fd4_clear; } diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_draw.h mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_draw.h --- mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_draw.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_draw.h 2017-06-01 10:37:10.000000000 +0000 @@ -48,13 +48,13 @@ } static inline void -fd4_draw(struct fd_context *ctx, struct fd_ringbuffer *ring, +fd4_draw(struct fd_batch *batch, struct fd_ringbuffer *ring, enum pc_di_primtype primtype, enum pc_di_vis_cull_mode vismode, enum pc_di_src_sel src_sel, uint32_t count, uint32_t instances, enum a4xx_index_size idx_type, uint32_t idx_size, uint32_t idx_offset, - struct fd_bo *idx_bo) + struct pipe_resource *idx_buffer) { /* for debug after a lock up, write a unique counter value * to scratch7 for each draw, to make it easier to match up @@ -64,31 +64,30 @@ */ emit_marker(ring, 7); - OUT_PKT3(ring, CP_DRAW_INDX_OFFSET, idx_bo ? 6 : 3); + OUT_PKT3(ring, CP_DRAW_INDX_OFFSET, idx_buffer ? 6 : 3); if (vismode == USE_VISIBILITY) { /* leave vis mode blank for now, it will be patched up when * we know if we are binning or not */ OUT_RINGP(ring, DRAW4(primtype, src_sel, idx_type, 0), - &ctx->draw_patches); + &batch->draw_patches); } else { OUT_RING(ring, DRAW4(primtype, src_sel, idx_type, vismode)); } OUT_RING(ring, instances); /* NumInstances */ OUT_RING(ring, count); /* NumIndices */ - if (idx_bo) { + if (idx_buffer) { OUT_RING(ring, 0x0); /* XXX */ - OUT_RELOC(ring, idx_bo, idx_offset, 0, 0); + OUT_RELOC(ring, fd_resource(idx_buffer)->bo, idx_offset, 0, 0); OUT_RING (ring, idx_size); } emit_marker(ring, 7); - fd_reset_wfi(ctx); + fd_reset_wfi(batch); } - -static inline enum pc_di_index_size +static inline enum a4xx_index_size fd4_size2indextype(unsigned index_size) { switch (index_size) { @@ -100,37 +99,39 @@ assert(0); return INDEX4_SIZE_32_BIT; } + static inline void -fd4_draw_emit(struct fd_context *ctx, struct fd_ringbuffer *ring, +fd4_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring, enum pc_di_primtype primtype, enum pc_di_vis_cull_mode vismode, const struct pipe_draw_info *info) { - struct pipe_index_buffer *idx = &ctx->indexbuf; - struct fd_bo *idx_bo = NULL; + struct pipe_resource *idx_buffer = NULL; enum a4xx_index_size idx_type; enum pc_di_src_sel src_sel; uint32_t idx_size, idx_offset; if (info->indexed) { + struct pipe_index_buffer *idx = &batch->ctx->indexbuf; + assert(!idx->user_buffer); - idx_bo = fd_resource(idx->buffer)->bo; + idx_buffer = idx->buffer; idx_type = fd4_size2indextype(idx->index_size); idx_size = idx->index_size * info->count; idx_offset = idx->offset + (info->start * idx->index_size); src_sel = DI_SRC_SEL_DMA; } else { - idx_bo = NULL; + idx_buffer = NULL; idx_type = INDEX4_SIZE_32_BIT; idx_size = 0; idx_offset = 0; src_sel = DI_SRC_SEL_AUTO_INDEX; } - fd4_draw(ctx, ring, primtype, vismode, src_sel, + fd4_draw(batch, ring, primtype, vismode, src_sel, info->count, info->instance_count, - idx_type, idx_size, idx_offset, idx_bo); + idx_type, idx_size, idx_offset, idx_buffer); } #endif /* FD4_DRAW_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_emit.c mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_emit.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_emit.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_emit.c 2017-06-01 10:37:10.000000000 +0000 @@ -54,7 +54,7 @@ * prsc or dwords: buffer containing constant values * sizedwords: size of const value buffer */ -void +static void fd4_emit_const(struct fd_ringbuffer *ring, enum shader_t type, uint32_t regid, uint32_t offset, uint32_t sizedwords, const uint32_t *dwords, struct pipe_resource *prsc) @@ -94,32 +94,35 @@ static void fd4_emit_const_bo(struct fd_ringbuffer *ring, enum shader_t type, boolean write, - uint32_t regid, uint32_t num, struct fd_bo **bos, uint32_t *offsets) + uint32_t regid, uint32_t num, struct pipe_resource **prscs, uint32_t *offsets) { + uint32_t anum = align(num, 4); uint32_t i; debug_assert((regid % 4) == 0); - debug_assert((num % 4) == 0); - OUT_PKT3(ring, CP_LOAD_STATE, 2 + num); + OUT_PKT3(ring, CP_LOAD_STATE, 2 + anum); OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(regid/4) | CP_LOAD_STATE_0_STATE_SRC(SS_DIRECT) | CP_LOAD_STATE_0_STATE_BLOCK(sb[type]) | - CP_LOAD_STATE_0_NUM_UNIT(num/4)); + CP_LOAD_STATE_0_NUM_UNIT(anum/4)); OUT_RING(ring, CP_LOAD_STATE_1_EXT_SRC_ADDR(0) | CP_LOAD_STATE_1_STATE_TYPE(ST_CONSTANTS)); for (i = 0; i < num; i++) { - if (bos[i]) { + if (prscs[i]) { if (write) { - OUT_RELOCW(ring, bos[i], offsets[i], 0, 0); + OUT_RELOCW(ring, fd_resource(prscs[i])->bo, offsets[i], 0, 0); } else { - OUT_RELOC(ring, bos[i], offsets[i], 0, 0); + OUT_RELOC(ring, fd_resource(prscs[i])->bo, offsets[i], 0, 0); } } else { OUT_RING(ring, 0xbad00000 | (i << 16)); } } + + for (; i < anum; i++) + OUT_RING(ring, 0xffffffff); } static void @@ -132,16 +135,8 @@ [SB_FRAG_TEX] = REG_A4XX_TPL1_TP_FS_BORDER_COLOR_BASE_ADDR, }; struct fd4_context *fd4_ctx = fd4_context(ctx); - unsigned i, off; - void *ptr; - - u_upload_alloc(fd4_ctx->border_color_uploader, - 0, BORDER_COLOR_UPLOAD_SIZE, - BORDER_COLOR_UPLOAD_SIZE, &off, - &fd4_ctx->border_color_buf, - &ptr); - - fd_setup_border_colors(tex, ptr, 0); + bool needs_border = false; + unsigned i; if (tex->num_samplers > 0) { int num_samplers; @@ -167,6 +162,8 @@ &dummy_sampler; OUT_RING(ring, sampler->texsamp0); OUT_RING(ring, sampler->texsamp1); + + needs_border |= sampler->needs_border; } for (; i < num_samplers; i++) { @@ -236,10 +233,22 @@ debug_assert(v->astc_srgb.count == 0); } - OUT_PKT0(ring, bcolor_reg[sb], 1); - OUT_RELOC(ring, fd_resource(fd4_ctx->border_color_buf)->bo, off, 0, 0); + if (needs_border) { + unsigned off; + void *ptr; + + u_upload_alloc(fd4_ctx->border_color_uploader, + 0, BORDER_COLOR_UPLOAD_SIZE, + BORDER_COLOR_UPLOAD_SIZE, &off, + &fd4_ctx->border_color_buf, + &ptr); + + fd_setup_border_colors(tex, ptr, 0); + OUT_PKT0(ring, bcolor_reg[sb], 1); + OUT_RELOC(ring, fd_resource(fd4_ctx->border_color_buf)->bo, off, 0, 0); - u_upload_unmap(fd4_ctx->border_color_uploader); + u_upload_unmap(fd4_ctx->border_color_uploader); + } } /* emit texture state for mem->gmem restore operation.. eventually it would @@ -285,14 +294,14 @@ for (i = 0; i < nr_bufs; i++) { if (bufs[i]) { struct fd_resource *rsc = fd_resource(bufs[i]->texture); - enum pipe_format format = fd4_gmem_restore_format(bufs[i]->format); + enum pipe_format format = fd_gmem_restore_format(bufs[i]->format); /* The restore blit_zs shader expects stencil in sampler 0, * and depth in sampler 1 */ if (rsc->stencil && (i == 0)) { rsc = rsc->stencil; - format = fd4_gmem_restore_format(rsc->base.b.format); + format = fd_gmem_restore_format(rsc->base.b.format); } /* note: PIPE_BUFFER disallowed for surfaces */ @@ -500,7 +509,7 @@ emit_marker(ring, 5); if ((dirty & FD_DIRTY_FRAMEBUFFER) && !emit->key.binning_pass) { - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; + struct pipe_framebuffer_state *pfb = &ctx->batch->framebuffer; unsigned char mrt_comp[A4XX_MAX_RENDER_TARGETS] = {0}; for (unsigned i = 0; i < A4XX_MAX_RENDER_TARGETS; i++) { @@ -520,7 +529,7 @@ if (dirty & (FD_DIRTY_ZSA | FD_DIRTY_FRAMEBUFFER)) { struct fd4_zsa_stateobj *zsa = fd4_zsa_stateobj(ctx->zsa); - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; + struct pipe_framebuffer_state *pfb = &ctx->batch->framebuffer; uint32_t rb_alpha_control = zsa->rb_alpha_control; if (util_format_is_pure_integer(pipe_surface_format(pfb->cbufs[0]))) @@ -622,14 +631,14 @@ OUT_RING(ring, A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X(scissor->minx) | A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y(scissor->miny)); - ctx->max_scissor.minx = MIN2(ctx->max_scissor.minx, scissor->minx); - ctx->max_scissor.miny = MIN2(ctx->max_scissor.miny, scissor->miny); - ctx->max_scissor.maxx = MAX2(ctx->max_scissor.maxx, scissor->maxx); - ctx->max_scissor.maxy = MAX2(ctx->max_scissor.maxy, scissor->maxy); + ctx->batch->max_scissor.minx = MIN2(ctx->batch->max_scissor.minx, scissor->minx); + ctx->batch->max_scissor.miny = MIN2(ctx->batch->max_scissor.miny, scissor->miny); + ctx->batch->max_scissor.maxx = MAX2(ctx->batch->max_scissor.maxx, scissor->maxx); + ctx->batch->max_scissor.maxy = MAX2(ctx->batch->max_scissor.maxy, scissor->maxy); } if (dirty & FD_DIRTY_VIEWPORT) { - fd_wfi(ctx, ring); + fd_wfi(ctx->batch, ring); OUT_PKT0(ring, REG_A4XX_GRAS_CL_VPORT_XOFFSET_0, 6); OUT_RING(ring, A4XX_GRAS_CL_VPORT_XOFFSET_0(ctx->viewport.translate[0])); OUT_RING(ring, A4XX_GRAS_CL_VPORT_XSCALE_0(ctx->viewport.scale[0])); @@ -642,9 +651,9 @@ if (dirty & (FD_DIRTY_VIEWPORT | FD_DIRTY_RASTERIZER | FD_DIRTY_FRAMEBUFFER)) { float zmin, zmax; int depth = 24; - if (ctx->framebuffer.zsbuf) { + if (ctx->batch->framebuffer.zsbuf) { depth = util_format_get_component_bits( - pipe_surface_format(ctx->framebuffer.zsbuf), + pipe_surface_format(ctx->batch->framebuffer.zsbuf), UTIL_FORMAT_COLORSPACE_ZS, 0); } util_viewport_zmin_zmax(&ctx->viewport, ctx->rasterizer->clip_halfz, @@ -664,7 +673,7 @@ } if (dirty & (FD_DIRTY_PROG | FD_DIRTY_FRAMEBUFFER)) { - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; + struct pipe_framebuffer_state *pfb = &ctx->batch->framebuffer; unsigned n = pfb->nr_cbufs; /* if we have depth/stencil, we need at least on MRT: */ if (pfb->zsbuf) @@ -684,7 +693,7 @@ for (i = 0; i < A4XX_MAX_RENDER_TARGETS; i++) { enum pipe_format format = pipe_surface_format( - ctx->framebuffer.cbufs[i]); + ctx->batch->framebuffer.cbufs[i]); bool is_int = util_format_is_pure_integer(format); bool has_alpha = util_format_has_alpha(format); uint32_t control = blend->rb_mrt[i].control; @@ -757,10 +766,10 @@ * state, there could have been a context switch between ioctls): */ void -fd4_emit_restore(struct fd_context *ctx) +fd4_emit_restore(struct fd_batch *batch, struct fd_ringbuffer *ring) { + struct fd_context *ctx = batch->ctx; struct fd4_context *fd4_ctx = fd4_context(ctx); - struct fd_ringbuffer *ring = ctx->ring; OUT_PKT0(ring, REG_A4XX_RBBM_PERFCTR_CTL, 1); OUT_RING(ring, 0x00000001); @@ -868,10 +877,10 @@ /* we don't use this yet.. probably best to disable.. */ OUT_PKT3(ring, CP_SET_DRAW_STATE, 2); - OUT_RING(ring, CP_SET_DRAW_STATE_0_COUNT(0) | - CP_SET_DRAW_STATE_0_DISABLE_ALL_GROUPS | - CP_SET_DRAW_STATE_0_GROUP_ID(0)); - OUT_RING(ring, CP_SET_DRAW_STATE_1_ADDR(0)); + OUT_RING(ring, CP_SET_DRAW_STATE__0_COUNT(0) | + CP_SET_DRAW_STATE__0_DISABLE_ALL_GROUPS | + CP_SET_DRAW_STATE__0_GROUP_ID(0)); + OUT_RING(ring, CP_SET_DRAW_STATE__1_ADDR_LO(0)); OUT_PKT0(ring, REG_A4XX_SP_VS_PVT_MEM_PARAM, 2); OUT_RING(ring, 0x08000001); /* SP_VS_PVT_MEM_PARAM */ @@ -907,16 +916,13 @@ OUT_PKT0(ring, REG_A4XX_GRAS_ALPHA_CONTROL, 1); OUT_RING(ring, 0x0); - fd_hw_query_enable(ctx, ring); - - ctx->needs_rb_fbd = true; + fd_hw_query_enable(batch, ring); } static void -fd4_emit_ib(struct fd_ringbuffer *ring, struct fd_ringmarker *start, - struct fd_ringmarker *end) +fd4_emit_ib(struct fd_ringbuffer *ring, struct fd_ringbuffer *target) { - __OUT_IB(ring, true, start, end); + __OUT_IB(ring, true, target); } void diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_emit.h mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_emit.h --- mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_emit.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_emit.h 2017-06-01 10:37:10.000000000 +0000 @@ -38,10 +38,6 @@ struct fd_ringbuffer; -void fd4_emit_const(struct fd_ringbuffer *ring, enum shader_t type, - uint32_t regid, uint32_t offset, uint32_t sizedwords, - const uint32_t *dwords, struct pipe_resource *prsc); - void fd4_emit_gmem_restore_tex(struct fd_ringbuffer *ring, unsigned nr_bufs, struct pipe_surface **bufs); @@ -102,7 +98,7 @@ void fd4_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring, struct fd4_emit *emit); -void fd4_emit_restore(struct fd_context *ctx); +void fd4_emit_restore(struct fd_batch *batch, struct fd_ringbuffer *ring); void fd4_emit_init(struct pipe_context *pctx); diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_format.c mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_format.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_format.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_format.c 2017-06-01 10:37:10.000000000 +0000 @@ -394,29 +394,6 @@ } } -/* we need to special case a bit the depth/stencil restore, because we are - * using the texture sampler to blit into the depth/stencil buffer, *not* - * into a color buffer. Otherwise fd4_tex_swiz() will do the wrong thing, - * as it is assuming that you are sampling into normal render target.. - * - * TODO looks like we can probably share w/ a3xx.. - */ -enum pipe_format -fd4_gmem_restore_format(enum pipe_format format) -{ - switch (format) { - case PIPE_FORMAT_Z24X8_UNORM: - case PIPE_FORMAT_Z24_UNORM_S8_UINT: - return PIPE_FORMAT_R8G8B8A8_UNORM; - case PIPE_FORMAT_Z16_UNORM: - return PIPE_FORMAT_R8G8_UNORM; - case PIPE_FORMAT_S8_UINT: - return PIPE_FORMAT_R8_UNORM; - default: - return format; - } -} - enum a4xx_depth_format fd4_pipe2depth(enum pipe_format format) { diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_format.h mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_format.h --- mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_format.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_format.h 2017-06-01 10:37:10.000000000 +0000 @@ -36,7 +36,6 @@ enum a4xx_vtx_fmt fd4_pipe2vtx(enum pipe_format format); enum a4xx_tex_fmt fd4_pipe2tex(enum pipe_format format); enum a4xx_color_fmt fd4_pipe2color(enum pipe_format format); -enum pipe_format fd4_gmem_restore_format(enum pipe_format format); enum a3xx_color_swap fd4_pipe2swap(enum pipe_format format); enum a4xx_tex_fetchsize fd4_pipe2fetchsize(enum pipe_format format); enum a4xx_depth_format fd4_pipe2depth(enum pipe_format format); diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c 2017-06-01 10:37:10.000000000 +0000 @@ -80,7 +80,8 @@ if (rsc->stencil) { rsc = rsc->stencil; pformat = rsc->base.b.format; - bases++; + if (bases) + bases++; } slice = fd_resource_slice(rsc, psurf->u.tex.level); @@ -131,10 +132,10 @@ } static bool -use_hw_binning(struct fd_context *ctx) +use_hw_binning(struct fd_batch *batch) { - struct fd_gmem_stateobj *gmem = &ctx->gmem; - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; + struct fd_gmem_stateobj *gmem = &batch->ctx->gmem; + struct pipe_framebuffer_state *pfb = &batch->framebuffer; /* this seems to be a hw bug.. but this hack fixes piglit fbo-maxsize: */ if ((pfb->width > 4096) && (pfb->height > 4096)) @@ -146,10 +147,10 @@ /* transfer from gmem to system memory (ie. normal RAM) */ static void -emit_gmem2mem_surf(struct fd_context *ctx, bool stencil, +emit_gmem2mem_surf(struct fd_batch *batch, bool stencil, uint32_t base, struct pipe_surface *psurf) { - struct fd_ringbuffer *ring = ctx->ring; + struct fd_ringbuffer *ring = batch->gmem; struct fd_resource *rsc = fd_resource(psurf->texture); enum pipe_format pformat = psurf->format; struct fd_resource_slice *slice; @@ -179,20 +180,20 @@ A4XX_RB_COPY_DEST_INFO_ENDIAN(ENDIAN_NONE) | A4XX_RB_COPY_DEST_INFO_SWAP(fd4_pipe2swap(pformat))); - fd4_draw(ctx, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY, + fd4_draw(batch, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY, DI_SRC_SEL_AUTO_INDEX, 2, 1, INDEX_SIZE_IGN, 0, 0, NULL); } static void -fd4_emit_tile_gmem2mem(struct fd_context *ctx, struct fd_tile *tile) +fd4_emit_tile_gmem2mem(struct fd_batch *batch, struct fd_tile *tile) { - struct fd4_context *fd4_ctx = fd4_context(ctx); + struct fd_context *ctx = batch->ctx; struct fd_gmem_stateobj *gmem = &ctx->gmem; - struct fd_ringbuffer *ring = ctx->ring; - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; + struct fd_ringbuffer *ring = batch->gmem; + struct pipe_framebuffer_state *pfb = &batch->framebuffer; struct fd4_emit emit = { .debug = &ctx->debug, - .vtx = &fd4_ctx->solid_vbuf_state, + .vtx = &ctx->solid_vbuf_state, .prog = &ctx->solid_prog, .key = { .half_precision = true, @@ -226,7 +227,7 @@ OUT_PKT0(ring, REG_A4XX_GRAS_SU_MODE_CONTROL, 1); OUT_RING(ring, A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH(0)); - fd_wfi(ctx, ring); + fd_wfi(batch, ring); OUT_PKT0(ring, REG_A4XX_GRAS_CL_CLIP_CNTL, 1); OUT_RING(ring, 0x80000); /* GRAS_CL_CLIP_CNTL */ @@ -268,22 +269,22 @@ fd4_program_emit(ring, &emit, 0, NULL); fd4_emit_vertex_bufs(ring, &emit); - if (ctx->resolve & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)) { + if (batch->resolve & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)) { struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture); - if (!rsc->stencil || (ctx->resolve & FD_BUFFER_DEPTH)) - emit_gmem2mem_surf(ctx, false, ctx->gmem.zsbuf_base[0], pfb->zsbuf); - if (rsc->stencil && (ctx->resolve & FD_BUFFER_STENCIL)) - emit_gmem2mem_surf(ctx, true, ctx->gmem.zsbuf_base[1], pfb->zsbuf); + if (!rsc->stencil || (batch->resolve & FD_BUFFER_DEPTH)) + emit_gmem2mem_surf(batch, false, ctx->gmem.zsbuf_base[0], pfb->zsbuf); + if (rsc->stencil && (batch->resolve & FD_BUFFER_STENCIL)) + emit_gmem2mem_surf(batch, true, ctx->gmem.zsbuf_base[1], pfb->zsbuf); } - if (ctx->resolve & FD_BUFFER_COLOR) { + if (batch->resolve & FD_BUFFER_COLOR) { unsigned i; for (i = 0; i < pfb->nr_cbufs; i++) { if (!pfb->cbufs[i]) continue; - if (!(ctx->resolve & (PIPE_CLEAR_COLOR0 << i))) + if (!(batch->resolve & (PIPE_CLEAR_COLOR0 << i))) continue; - emit_gmem2mem_surf(ctx, false, gmem->cbuf_base[i], pfb->cbufs[i]); + emit_gmem2mem_surf(batch, false, gmem->cbuf_base[i], pfb->cbufs[i]); } } @@ -297,10 +298,10 @@ /* transfer from system memory to gmem */ static void -emit_mem2gmem_surf(struct fd_context *ctx, uint32_t *bases, +emit_mem2gmem_surf(struct fd_batch *batch, uint32_t *bases, struct pipe_surface **bufs, uint32_t nr_bufs, uint32_t bin_w) { - struct fd_ringbuffer *ring = ctx->ring; + struct fd_ringbuffer *ring = batch->gmem; struct pipe_surface *zsbufs[2]; emit_mrt(ring, nr_bufs, bufs, bases, bin_w, false); @@ -317,20 +318,20 @@ fd4_emit_gmem_restore_tex(ring, nr_bufs, bufs); - fd4_draw(ctx, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY, + fd4_draw(batch, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY, DI_SRC_SEL_AUTO_INDEX, 2, 1, INDEX_SIZE_IGN, 0, 0, NULL); } static void -fd4_emit_tile_mem2gmem(struct fd_context *ctx, struct fd_tile *tile) +fd4_emit_tile_mem2gmem(struct fd_batch *batch, struct fd_tile *tile) { - struct fd4_context *fd4_ctx = fd4_context(ctx); + struct fd_context *ctx = batch->ctx; struct fd_gmem_stateobj *gmem = &ctx->gmem; - struct fd_ringbuffer *ring = ctx->ring; - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; + struct fd_ringbuffer *ring = batch->gmem; + struct pipe_framebuffer_state *pfb = &batch->framebuffer; struct fd4_emit emit = { .debug = &ctx->debug, - .vtx = &fd4_ctx->blit_vbuf_state, + .vtx = &ctx->blit_vbuf_state, .sprite_coord_enable = 1, /* NOTE: They all use the same VP, this is for vtx bufs. */ .prog = &ctx->blit_prog[0], @@ -352,7 +353,7 @@ y1 = ((float)tile->yoff + bin_h) / ((float)pfb->height); OUT_PKT3(ring, CP_MEM_WRITE, 5); - OUT_RELOCW(ring, fd_resource(fd4_ctx->blit_texcoord_vbuf)->bo, 0, 0, 0); + OUT_RELOCW(ring, fd_resource(ctx->blit_texcoord_vbuf)->bo, 0, 0, 0); OUT_RING(ring, fui(x0)); OUT_RING(ring, fui(y0)); OUT_RING(ring, fui(x1)); @@ -454,14 +455,14 @@ bin_w = gmem->bin_w; bin_h = gmem->bin_h; - if (fd_gmem_needs_restore(ctx, tile, FD_BUFFER_COLOR)) { + if (fd_gmem_needs_restore(batch, tile, FD_BUFFER_COLOR)) { emit.prog = &ctx->blit_prog[pfb->nr_cbufs - 1]; emit.fp = NULL; /* frag shader changed so clear cache */ fd4_program_emit(ring, &emit, pfb->nr_cbufs, pfb->cbufs); - emit_mem2gmem_surf(ctx, gmem->cbuf_base, pfb->cbufs, pfb->nr_cbufs, bin_w); + emit_mem2gmem_surf(batch, gmem->cbuf_base, pfb->cbufs, pfb->nr_cbufs, bin_w); } - if (fd_gmem_needs_restore(ctx, tile, FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)) { + if (fd_gmem_needs_restore(batch, tile, FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)) { switch (pfb->zsbuf->format) { case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT: case PIPE_FORMAT_Z32_FLOAT: @@ -492,7 +493,7 @@ } emit.fp = NULL; /* frag shader changed so clear cache */ fd4_program_emit(ring, &emit, 1, &pfb->zsbuf); - emit_mem2gmem_surf(ctx, gmem->zsbuf_base, &pfb->zsbuf, 1, bin_w); + emit_mem2gmem_surf(batch, gmem->zsbuf_base, &pfb->zsbuf, 1, bin_w); } OUT_PKT0(ring, REG_A4XX_GRAS_SC_CONTROL, 1); @@ -507,24 +508,24 @@ } static void -patch_draws(struct fd_context *ctx, enum pc_di_vis_cull_mode vismode) +patch_draws(struct fd_batch *batch, enum pc_di_vis_cull_mode vismode) { unsigned i; - for (i = 0; i < fd_patch_num_elements(&ctx->draw_patches); i++) { - struct fd_cs_patch *patch = fd_patch_element(&ctx->draw_patches, i); + for (i = 0; i < fd_patch_num_elements(&batch->draw_patches); i++) { + struct fd_cs_patch *patch = fd_patch_element(&batch->draw_patches, i); *patch->cs = patch->val | DRAW4(0, 0, 0, vismode); } - util_dynarray_resize(&ctx->draw_patches, 0); + util_dynarray_resize(&batch->draw_patches, 0); } /* for rendering directly to system memory: */ static void -fd4_emit_sysmem_prep(struct fd_context *ctx) +fd4_emit_sysmem_prep(struct fd_batch *batch) { - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; - struct fd_ringbuffer *ring = ctx->ring; + struct pipe_framebuffer_state *pfb = &batch->framebuffer; + struct fd_ringbuffer *ring = batch->gmem; - fd4_emit_restore(ctx); + fd4_emit_restore(batch, ring); OUT_PKT0(ring, REG_A4XX_RB_FRAME_BUFFER_DIMENSION, 1); OUT_RING(ring, A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(pfb->width) | @@ -551,14 +552,15 @@ OUT_PKT0(ring, REG_A4XX_RB_RENDER_CONTROL, 1); OUT_RING(ring, 0x8); - patch_draws(ctx, IGNORE_VISIBILITY); + patch_draws(batch, IGNORE_VISIBILITY); } static void -update_vsc_pipe(struct fd_context *ctx) +update_vsc_pipe(struct fd_batch *batch) { + struct fd_context *ctx = batch->ctx; struct fd4_context *fd4_ctx = fd4_context(ctx); - struct fd_ringbuffer *ring = ctx->ring; + struct fd_ringbuffer *ring = batch->gmem; int i; OUT_PKT0(ring, REG_A4XX_VSC_SIZE_ADDRESS, 1); @@ -591,11 +593,12 @@ } static void -emit_binning_pass(struct fd_context *ctx) +emit_binning_pass(struct fd_batch *batch) { + struct fd_context *ctx = batch->ctx; struct fd_gmem_stateobj *gmem = &ctx->gmem; - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; - struct fd_ringbuffer *ring = ctx->ring; + struct pipe_framebuffer_state *pfb = &batch->framebuffer; + struct fd_ringbuffer *ring = batch->gmem; int i; uint32_t x1 = gmem->minx; @@ -634,10 +637,10 @@ } /* emit IB to binning drawcmds: */ - ctx->emit_ib(ring, ctx->binning_start, ctx->binning_end); + ctx->emit_ib(ring, batch->binning); - fd_reset_wfi(ctx); - fd_wfi(ctx, ring); + fd_reset_wfi(batch); + fd_wfi(batch, ring); /* and then put stuff back the way it was: */ @@ -650,26 +653,32 @@ A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES(MSAA_ONE) | A4XX_GRAS_SC_CONTROL_RASTER_MODE(0)); - fd_event_write(ctx, ring, CACHE_FLUSH); - fd_wfi(ctx, ring); + fd_event_write(batch, ring, CACHE_FLUSH); + fd_wfi(batch, ring); } /* before first tile */ static void -fd4_emit_tile_init(struct fd_context *ctx) +fd4_emit_tile_init(struct fd_batch *batch) { - struct fd_ringbuffer *ring = ctx->ring; - struct fd_gmem_stateobj *gmem = &ctx->gmem; + struct fd_ringbuffer *ring = batch->gmem; + struct pipe_framebuffer_state *pfb = &batch->framebuffer; + struct fd_gmem_stateobj *gmem = &batch->ctx->gmem; - fd4_emit_restore(ctx); + fd4_emit_restore(batch, ring); OUT_PKT0(ring, REG_A4XX_VSC_BIN_SIZE, 1); OUT_RING(ring, A4XX_VSC_BIN_SIZE_WIDTH(gmem->bin_w) | A4XX_VSC_BIN_SIZE_HEIGHT(gmem->bin_h)); - update_vsc_pipe(ctx); + update_vsc_pipe(batch); + + fd_wfi(batch, ring); + OUT_PKT0(ring, REG_A4XX_RB_FRAME_BUFFER_DIMENSION, 1); + OUT_RING(ring, A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(pfb->width) | + A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(pfb->height)); - if (use_hw_binning(ctx)) { + if (use_hw_binning(batch)) { OUT_PKT0(ring, REG_A4XX_RB_MODE_CONTROL, 1); OUT_RING(ring, A4XX_RB_MODE_CONTROL_WIDTH(gmem->bin_w) | A4XX_RB_MODE_CONTROL_HEIGHT(gmem->bin_h)); @@ -680,11 +689,11 @@ 0x8); /* emit hw binning pass: */ - emit_binning_pass(ctx); + emit_binning_pass(batch); - patch_draws(ctx, USE_VISIBILITY); + patch_draws(batch, USE_VISIBILITY); } else { - patch_draws(ctx, IGNORE_VISIBILITY); + patch_draws(batch, IGNORE_VISIBILITY); } OUT_PKT0(ring, REG_A4XX_RB_MODE_CONTROL, 1); @@ -695,10 +704,11 @@ /* before mem2gmem */ static void -fd4_emit_tile_prep(struct fd_context *ctx, struct fd_tile *tile) +fd4_emit_tile_prep(struct fd_batch *batch, struct fd_tile *tile) { - struct fd_ringbuffer *ring = ctx->ring; - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; + struct fd_context *ctx = batch->ctx; + struct fd_ringbuffer *ring = batch->gmem; + struct pipe_framebuffer_state *pfb = &batch->framebuffer; struct fd_gmem_stateobj *gmem = &ctx->gmem; if (pfb->zsbuf) { @@ -738,37 +748,30 @@ } else { OUT_RING(ring, A4XX_GRAS_DEPTH_CONTROL_FORMAT(DEPTH4_NONE)); } - - if (ctx->needs_rb_fbd) { - fd_wfi(ctx, ring); - OUT_PKT0(ring, REG_A4XX_RB_FRAME_BUFFER_DIMENSION, 1); - OUT_RING(ring, A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(pfb->width) | - A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(pfb->height)); - ctx->needs_rb_fbd = false; - } } /* before IB to rendering cmds: */ static void -fd4_emit_tile_renderprep(struct fd_context *ctx, struct fd_tile *tile) +fd4_emit_tile_renderprep(struct fd_batch *batch, struct fd_tile *tile) { + struct fd_context *ctx = batch->ctx; struct fd4_context *fd4_ctx = fd4_context(ctx); - struct fd_ringbuffer *ring = ctx->ring; + struct fd_ringbuffer *ring = batch->gmem; struct fd_gmem_stateobj *gmem = &ctx->gmem; - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; + struct pipe_framebuffer_state *pfb = &batch->framebuffer; uint32_t x1 = tile->xoff; uint32_t y1 = tile->yoff; uint32_t x2 = tile->xoff + tile->bin_w - 1; uint32_t y2 = tile->yoff + tile->bin_h - 1; - if (use_hw_binning(ctx)) { + if (use_hw_binning(batch)) { struct fd_vsc_pipe *pipe = &ctx->pipe[tile->p]; assert(pipe->w * pipe->h); - fd_event_write(ctx, ring, HLSQ_FLUSH); - fd_wfi(ctx, ring); + fd_event_write(batch, ring, HLSQ_FLUSH); + fd_wfi(batch, ring); OUT_PKT0(ring, REG_A4XX_PC_VSTREAM_CONTROL, 1); OUT_RING(ring, A4XX_PC_VSTREAM_CONTROL_SIZE(pipe->w * pipe->h) | diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_program.c mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_program.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_program.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_program.c 2017-06-01 10:37:10.000000000 +0000 @@ -121,6 +121,12 @@ OUT_RELOC(ring, so->bo, 0, CP_LOAD_STATE_1_STATE_TYPE(ST_SHADER), 0); } + + /* for how clever coverity is, it is sometimes rather dull, and + * doesn't realize that the only case where bin==NULL, sz==0: + */ + assume(bin || (sz == 0)); + for (i = 0; i < sz; i++) { OUT_RING(ring, bin[i]); } @@ -214,7 +220,7 @@ uint32_t face_regid, coord_regid, zwcoord_regid; enum a3xx_threadsize fssz; int constmode; - int i, j, k; + int i, j; debug_assert(nr <= ARRAY_SIZE(color_regid)); @@ -336,45 +342,34 @@ A4XX_SP_VS_PARAM_REG_PSIZEREGID(psize_regid) | A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR(s[FS].v->varying_in)); - for (i = 0, j = -1; (i < 16) && (j < (int)s[FS].v->inputs_count); i++) { + struct ir3_shader_linkage l = {0}; + ir3_link_shaders(&l, s[VS].v, s[FS].v); + + for (i = 0, j = 0; (i < 16) && (j < l.cnt); i++) { uint32_t reg = 0; OUT_PKT0(ring, REG_A4XX_SP_VS_OUT_REG(i), 1); - j = ir3_next_varying(s[FS].v, j); - if (j < s[FS].v->inputs_count) { - k = ir3_find_output(s[VS].v, s[FS].v->inputs[j].slot); - reg |= A4XX_SP_VS_OUT_REG_A_REGID(s[VS].v->outputs[k].regid); - reg |= A4XX_SP_VS_OUT_REG_A_COMPMASK(s[FS].v->inputs[j].compmask); - } - - j = ir3_next_varying(s[FS].v, j); - if (j < s[FS].v->inputs_count) { - k = ir3_find_output(s[VS].v, s[FS].v->inputs[j].slot); - reg |= A4XX_SP_VS_OUT_REG_B_REGID(s[VS].v->outputs[k].regid); - reg |= A4XX_SP_VS_OUT_REG_B_COMPMASK(s[FS].v->inputs[j].compmask); - } + reg |= A4XX_SP_VS_OUT_REG_A_REGID(l.var[j].regid); + reg |= A4XX_SP_VS_OUT_REG_A_COMPMASK(l.var[j].compmask); + j++; + + reg |= A4XX_SP_VS_OUT_REG_B_REGID(l.var[j].regid); + reg |= A4XX_SP_VS_OUT_REG_B_COMPMASK(l.var[j].compmask); + j++; OUT_RING(ring, reg); } - for (i = 0, j = -1; (i < 8) && (j < (int)s[FS].v->inputs_count); i++) { + for (i = 0, j = 0; (i < 8) && (j < l.cnt); i++) { uint32_t reg = 0; OUT_PKT0(ring, REG_A4XX_SP_VS_VPC_DST_REG(i), 1); - j = ir3_next_varying(s[FS].v, j); - if (j < s[FS].v->inputs_count) - reg |= A4XX_SP_VS_VPC_DST_REG_OUTLOC0(s[FS].v->inputs[j].inloc); - j = ir3_next_varying(s[FS].v, j); - if (j < s[FS].v->inputs_count) - reg |= A4XX_SP_VS_VPC_DST_REG_OUTLOC1(s[FS].v->inputs[j].inloc); - j = ir3_next_varying(s[FS].v, j); - if (j < s[FS].v->inputs_count) - reg |= A4XX_SP_VS_VPC_DST_REG_OUTLOC2(s[FS].v->inputs[j].inloc); - j = ir3_next_varying(s[FS].v, j); - if (j < s[FS].v->inputs_count) - reg |= A4XX_SP_VS_VPC_DST_REG_OUTLOC3(s[FS].v->inputs[j].inloc); + reg |= A4XX_SP_VS_VPC_DST_REG_OUTLOC0(l.var[j++].loc + 8); + reg |= A4XX_SP_VS_VPC_DST_REG_OUTLOC1(l.var[j++].loc + 8); + reg |= A4XX_SP_VS_VPC_DST_REG_OUTLOC2(l.var[j++].loc + 8); + reg |= A4XX_SP_VS_VPC_DST_REG_OUTLOC3(l.var[j++].loc + 8); OUT_RING(ring, reg); } @@ -509,12 +504,9 @@ */ unsigned compmask = s[FS].v->inputs[j].compmask; - /* TODO might be cleaner to just +8 in SP_VS_VPC_DST_REG - * instead.. rather than -8 everywhere else.. - */ - uint32_t inloc = s[FS].v->inputs[j].inloc - 8; + uint32_t inloc = s[FS].v->inputs[j].inloc; - if ((s[FS].v->inputs[j].interpolate == INTERP_QUALIFIER_FLAT) || + if ((s[FS].v->inputs[j].interpolate == INTERP_MODE_FLAT) || (s[FS].v->inputs[j].rasterflat && emit->rasterflat)) { uint32_t loc = inloc; diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_query.c mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_query.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_query.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_query.c 2017-06-01 10:37:10.000000000 +0000 @@ -48,10 +48,10 @@ */ static struct fd_hw_sample * -occlusion_get_sample(struct fd_context *ctx, struct fd_ringbuffer *ring) +occlusion_get_sample(struct fd_batch *batch, struct fd_ringbuffer *ring) { struct fd_hw_sample *samp = - fd_hw_sample_init(ctx, sizeof(struct fd_rb_samp_ctrs)); + fd_hw_sample_init(batch, sizeof(struct fd_rb_samp_ctrs)); /* low bits of sample addr should be zero (since they are control * flags in RB_SAMPLE_COUNT_CONTROL): @@ -73,7 +73,7 @@ OUT_RING(ring, 1); /* NumInstances */ OUT_RING(ring, 0); /* NumIndices */ - fd_event_write(ctx, ring, ZPASS_DONE); + fd_event_write(batch, ring, ZPASS_DONE); return samp; } @@ -117,24 +117,24 @@ * just hard coded. If we start exposing more countables than we * have counters, we will need to be more clever. */ - fd_wfi(ctx, ring); + fd_wfi(ctx->batch, ring); OUT_PKT0(ring, REG_A4XX_CP_PERFCTR_CP_SEL_0, 1); OUT_RING(ring, CP_ALWAYS_COUNT); } static struct fd_hw_sample * -time_elapsed_get_sample(struct fd_context *ctx, struct fd_ringbuffer *ring) +time_elapsed_get_sample(struct fd_batch *batch, struct fd_ringbuffer *ring) { - struct fd_hw_sample *samp = fd_hw_sample_init(ctx, sizeof(uint64_t)); + struct fd_hw_sample *samp = fd_hw_sample_init(batch, sizeof(uint64_t)); /* use unused part of vsc_size_mem as scratch space, to avoid * extra allocation: */ - struct fd_bo *scratch_bo = fd4_context(ctx)->vsc_size_mem; + struct fd_bo *scratch_bo = fd4_context(batch->ctx)->vsc_size_mem; const int sample_off = 128; const int addr_off = sample_off + 8; - debug_assert(ctx->screen->max_freq > 0); + debug_assert(batch->ctx->screen->max_freq > 0); /* Basic issue is that we need to read counter value to a relative * destination (with per-tile offset) rather than absolute dest @@ -161,7 +161,7 @@ * shot, but that's really just polishing a turd.. */ - fd_wfi(ctx, ring); + fd_wfi(batch, ring); /* copy sample counter _LO and _HI to scratch: */ OUT_PKT3(ring, CP_REG_TO_MEM, 2); @@ -224,6 +224,19 @@ result->u64 += n * 1000000000 / ctx->screen->max_freq; } +static void +timestamp_accumulate_result(struct fd_context *ctx, + const void *start, const void *end, + union pipe_query_result *result) +{ + /* just return the value from fist tile: */ + if (result->u64 != 0) + return; + uint64_t n = *(uint64_t *)start; + /* max_freq is in Hz, convert cycle count to ns: */ + result->u64 = n * 1000000000 / ctx->screen->max_freq; +} + static const struct fd_hw_sample_provider occlusion_counter = { .query_type = PIPE_QUERY_OCCLUSION_COUNTER, .active = FD_STAGE_DRAW, @@ -240,15 +253,30 @@ static const struct fd_hw_sample_provider time_elapsed = { .query_type = PIPE_QUERY_TIME_ELAPSED, - .active = FD_STAGE_DRAW, + .active = FD_STAGE_DRAW | FD_STAGE_CLEAR, .enable = time_elapsed_enable, .get_sample = time_elapsed_get_sample, .accumulate_result = time_elapsed_accumulate_result, }; +/* NOTE: timestamp query isn't going to give terribly sensible results + * on a tiler. But it is needed by qapitrace profile heatmap. If you + * add in a binning pass, the results get even more non-sensical. So + * we just return the timestamp on the first tile and hope that is + * kind of good enough. + */ +static const struct fd_hw_sample_provider timestamp = { + .query_type = PIPE_QUERY_TIMESTAMP, + .active = FD_STAGE_ALL, + .enable = time_elapsed_enable, + .get_sample = time_elapsed_get_sample, + .accumulate_result = timestamp_accumulate_result, +}; + void fd4_query_context_init(struct pipe_context *pctx) { fd_hw_query_register_provider(pctx, &occlusion_counter); fd_hw_query_register_provider(pctx, &occlusion_predicate); fd_hw_query_register_provider(pctx, &time_elapsed); + fd_hw_query_register_provider(pctx, ×tamp); } diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_screen.c mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_screen.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_screen.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_screen.c 2017-06-01 10:37:10.000000000 +0000 @@ -52,14 +52,14 @@ } if ((usage & PIPE_BIND_VERTEX_BUFFER) && - (fd4_pipe2vtx(format) != ~0)) { + (fd4_pipe2vtx(format) != (enum a4xx_vtx_fmt)~0)) { retval |= PIPE_BIND_VERTEX_BUFFER; } if ((usage & PIPE_BIND_SAMPLER_VIEW) && (target == PIPE_BUFFER || util_format_get_blocksize(format) != 12) && - (fd4_pipe2tex(format) != ~0)) { + (fd4_pipe2tex(format) != (enum a4xx_tex_fmt)~0)) { retval |= PIPE_BIND_SAMPLER_VIEW; } @@ -67,8 +67,8 @@ PIPE_BIND_DISPLAY_TARGET | PIPE_BIND_SCANOUT | PIPE_BIND_SHARED)) && - (fd4_pipe2color(format) != ~0) && - (fd4_pipe2tex(format) != ~0)) { + (fd4_pipe2color(format) != (enum a4xx_color_fmt)~0) && + (fd4_pipe2tex(format) != (enum a4xx_tex_fmt)~0)) { retval |= usage & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DISPLAY_TARGET | PIPE_BIND_SCANOUT | @@ -76,21 +76,16 @@ } if ((usage & PIPE_BIND_DEPTH_STENCIL) && - (fd4_pipe2depth(format) != ~0) && - (fd4_pipe2tex(format) != ~0)) { + (fd4_pipe2depth(format) != (enum a4xx_depth_format)~0) && + (fd4_pipe2tex(format) != (enum a4xx_tex_fmt)~0)) { retval |= PIPE_BIND_DEPTH_STENCIL; } if ((usage & PIPE_BIND_INDEX_BUFFER) && - (fd_pipe2index(format) != ~0)) { + (fd_pipe2index(format) != (enum pc_di_index_size)~0)) { retval |= PIPE_BIND_INDEX_BUFFER; } - if (usage & PIPE_BIND_TRANSFER_READ) - retval |= PIPE_BIND_TRANSFER_READ; - if (usage & PIPE_BIND_TRANSFER_WRITE) - retval |= PIPE_BIND_TRANSFER_WRITE; - if (retval != usage) { DBG("not supported: format=%s, target=%d, sample_count=%d, " "usage=%x, retval=%x", util_format_name(format), diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_texture.c mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_texture.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_texture.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_texture.c 2017-06-01 10:37:10.000000000 +0000 @@ -36,7 +36,7 @@ #include "fd4_format.h" static enum a4xx_tex_clamp -tex_clamp(unsigned wrap, bool clamp_to_edge) +tex_clamp(unsigned wrap, bool clamp_to_edge, bool *needs_border) { /* Hardware does not support _CLAMP, but we emulate it: */ if (wrap == PIPE_TEX_WRAP_CLAMP) { @@ -50,6 +50,7 @@ case PIPE_TEX_WRAP_CLAMP_TO_EDGE: return A4XX_TEX_CLAMP_TO_EDGE; case PIPE_TEX_WRAP_CLAMP_TO_BORDER: + *needs_border = true; return A4XX_TEX_CLAMP_TO_BORDER; case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE: /* only works for PoT.. need to emulate otherwise! */ @@ -113,14 +114,15 @@ so->saturate_r = (cso->wrap_r == PIPE_TEX_WRAP_CLAMP); } + so->needs_border = false; so->texsamp0 = COND(miplinear, A4XX_TEX_SAMP_0_MIPFILTER_LINEAR_NEAR) | A4XX_TEX_SAMP_0_XY_MAG(tex_filter(cso->mag_img_filter, aniso)) | A4XX_TEX_SAMP_0_XY_MIN(tex_filter(cso->min_img_filter, aniso)) | A4XX_TEX_SAMP_0_ANISO(aniso) | - A4XX_TEX_SAMP_0_WRAP_S(tex_clamp(cso->wrap_s, clamp_to_edge)) | - A4XX_TEX_SAMP_0_WRAP_T(tex_clamp(cso->wrap_t, clamp_to_edge)) | - A4XX_TEX_SAMP_0_WRAP_R(tex_clamp(cso->wrap_r, clamp_to_edge)); + A4XX_TEX_SAMP_0_WRAP_S(tex_clamp(cso->wrap_s, clamp_to_edge, &so->needs_border)) | + A4XX_TEX_SAMP_0_WRAP_T(tex_clamp(cso->wrap_t, clamp_to_edge, &so->needs_border)) | + A4XX_TEX_SAMP_0_WRAP_R(tex_clamp(cso->wrap_r, clamp_to_edge, &so->needs_border)); so->texsamp1 = // COND(miplinear, A4XX_TEX_SAMP_1_MIPFILTER_LINEAR_FAR) | @@ -142,7 +144,7 @@ static void fd4_sampler_states_bind(struct pipe_context *pctx, - unsigned shader, unsigned start, + enum pipe_shader_type shader, unsigned start, unsigned nr, void **hwcso) { struct fd_context *ctx = fd_context(pctx); @@ -247,8 +249,8 @@ } if (cso->target == PIPE_BUFFER) { - unsigned elements = cso->u.buf.last_element - - cso->u.buf.first_element + 1; + unsigned elements = cso->u.buf.size / util_format_get_blocksize(cso->format); + lvl = 0; so->texconst1 = A4XX_TEX_CONST_1_WIDTH(elements) | @@ -256,8 +258,7 @@ so->texconst2 = A4XX_TEX_CONST_2_FETCHSIZE(fd4_pipe2fetchsize(cso->format)) | A4XX_TEX_CONST_2_PITCH(elements * rsc->cpp); - so->offset = cso->u.buf.first_element * - util_format_get_blocksize(cso->format); + so->offset = cso->u.buf.offset; } else { unsigned miplevels; @@ -307,7 +308,7 @@ } static void -fd4_set_sampler_views(struct pipe_context *pctx, unsigned shader, +fd4_set_sampler_views(struct pipe_context *pctx, enum pipe_shader_type shader, unsigned start, unsigned nr, struct pipe_sampler_view **views) { diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_texture.h mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_texture.h --- mesa-12.0.6/src/gallium/drivers/freedreno/a4xx/fd4_texture.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a4xx/fd4_texture.h 2017-06-01 10:37:10.000000000 +0000 @@ -41,6 +41,7 @@ struct pipe_sampler_state base; uint32_t texsamp0, texsamp1; bool saturate_s, saturate_t, saturate_r; + bool needs_border; }; static inline struct fd4_sampler_stateobj * diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/a5xx.xml.h mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/a5xx.xml.h --- mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/a5xx.xml.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/a5xx.xml.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,3960 @@ +#ifndef A5XX_XML +#define A5XX_XML + +/* Autogenerated file, DO NOT EDIT manually! + +This file was generated by the rules-ng-ng headergen tool in this git repository: +http://github.com/freedreno/envytools/ +git clone https://github.com/freedreno/envytools.git + +The rules-ng-ng source files this header was generated from are: +- /home/robclark/src/freedreno/envytools/rnndb/adreno.xml ( 431 bytes, from 2016-04-26 17:56:44) +- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2016-02-10 17:07:21) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32907 bytes, from 2016-11-26 23:01:08) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 12025 bytes, from 2016-11-26 23:01:08) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 23277 bytes, from 2016-12-24 05:01:47) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2016-11-26 23:01:08) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 110757 bytes, from 2016-12-26 17:51:07) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 100594 bytes, from 2017-01-20 23:03:30) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2015-09-24 17:30:00) + +Copyright (C) 2013-2017 by the following authors: +- Rob Clark (robclark) +- Ilia Mirkin (imirkin) + +Permission is hereby granted, free of charge, to any person obtaining +a copy of this software and associated documentation files (the +"Software"), to deal in the Software without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, sublicense, and/or sell copies of the Software, and to +permit persons to whom the Software is furnished to do so, subject to +the following conditions: + +The above copyright notice and this permission notice (including the +next paragraph) shall be included in all copies or substantial +portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE +LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION +OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION +WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + + +enum a5xx_color_fmt { + RB5_R8_UNORM = 3, + RB5_R8_UINT = 5, + RB5_R8_SINT = 6, + RB5_R4G4B4A4_UNORM = 8, + RB5_R5G5B5A1_UNORM = 10, + RB5_R5G6B5_UNORM = 14, + RB5_R8G8_UNORM = 15, + RB5_R8G8_SNORM = 16, + RB5_R8G8_UINT = 17, + RB5_R8G8_SINT = 18, + RB5_R16_UNORM = 21, + RB5_R16_SNORM = 22, + RB5_R16_FLOAT = 23, + RB5_R16_UINT = 24, + RB5_R16_SINT = 25, + RB5_R8G8B8A8_UNORM = 48, + RB5_R8G8B8_UNORM = 49, + RB5_R8G8B8A8_UINT = 51, + RB5_R8G8B8A8_SINT = 52, + RB5_R10G10B10A2_UNORM = 55, + RB5_R10G10B10A2_UINT = 58, + RB5_R11G11B10_FLOAT = 66, + RB5_R16G16_UNORM = 67, + RB5_R16G16_SNORM = 68, + RB5_R16G16_FLOAT = 69, + RB5_R16G16_UINT = 70, + RB5_R16G16_SINT = 71, + RB5_R32_FLOAT = 74, + RB5_R32_UINT = 75, + RB5_R32_SINT = 76, + RB5_R16G16B16A16_FLOAT = 98, + RB5_R16G16B16A16_UINT = 99, + RB5_R16G16B16A16_SINT = 100, + RB5_R32G32_FLOAT = 103, + RB5_R32G32_UINT = 104, + RB5_R32G32_SINT = 105, + RB5_R32G32B32A32_FLOAT = 130, + RB5_R32G32B32A32_UINT = 131, + RB5_R32G32B32A32_SINT = 132, +}; + +enum a5xx_tile_mode { + TILE5_LINEAR = 0, + TILE5_2 = 2, + TILE5_3 = 3, +}; + +enum a5xx_vtx_fmt { + VFMT5_8_UNORM = 3, + VFMT5_8_SNORM = 4, + VFMT5_8_UINT = 5, + VFMT5_8_SINT = 6, + VFMT5_8_8_UNORM = 15, + VFMT5_8_8_SNORM = 16, + VFMT5_8_8_UINT = 17, + VFMT5_8_8_SINT = 18, + VFMT5_16_UNORM = 21, + VFMT5_16_SNORM = 22, + VFMT5_16_FLOAT = 23, + VFMT5_16_UINT = 24, + VFMT5_16_SINT = 25, + VFMT5_8_8_8_UNORM = 33, + VFMT5_8_8_8_SNORM = 34, + VFMT5_8_8_8_UINT = 35, + VFMT5_8_8_8_SINT = 36, + VFMT5_8_8_8_8_UNORM = 48, + VFMT5_8_8_8_8_SNORM = 50, + VFMT5_8_8_8_8_UINT = 51, + VFMT5_8_8_8_8_SINT = 52, + VFMT5_16_16_UNORM = 67, + VFMT5_16_16_SNORM = 68, + VFMT5_16_16_FLOAT = 69, + VFMT5_16_16_UINT = 70, + VFMT5_16_16_SINT = 71, + VFMT5_32_UNORM = 72, + VFMT5_32_SNORM = 73, + VFMT5_32_FLOAT = 74, + VFMT5_32_UINT = 75, + VFMT5_32_SINT = 76, + VFMT5_32_FIXED = 77, + VFMT5_16_16_16_UNORM = 88, + VFMT5_16_16_16_SNORM = 89, + VFMT5_16_16_16_FLOAT = 90, + VFMT5_16_16_16_UINT = 91, + VFMT5_16_16_16_SINT = 92, + VFMT5_16_16_16_16_UNORM = 96, + VFMT5_16_16_16_16_SNORM = 97, + VFMT5_16_16_16_16_FLOAT = 98, + VFMT5_16_16_16_16_UINT = 99, + VFMT5_16_16_16_16_SINT = 100, + VFMT5_32_32_UNORM = 101, + VFMT5_32_32_SNORM = 102, + VFMT5_32_32_FLOAT = 103, + VFMT5_32_32_UINT = 104, + VFMT5_32_32_SINT = 105, + VFMT5_32_32_FIXED = 106, + VFMT5_32_32_32_UNORM = 112, + VFMT5_32_32_32_SNORM = 113, + VFMT5_32_32_32_UINT = 114, + VFMT5_32_32_32_SINT = 115, + VFMT5_32_32_32_FLOAT = 116, + VFMT5_32_32_32_FIXED = 117, + VFMT5_32_32_32_32_UNORM = 128, + VFMT5_32_32_32_32_SNORM = 129, + VFMT5_32_32_32_32_FLOAT = 130, + VFMT5_32_32_32_32_UINT = 131, + VFMT5_32_32_32_32_SINT = 132, + VFMT5_32_32_32_32_FIXED = 133, +}; + +enum a5xx_tex_fmt { + TFMT5_A8_UNORM = 2, + TFMT5_8_UNORM = 3, + TFMT5_8_UINT = 5, + TFMT5_8_SINT = 6, + TFMT5_4_4_4_4_UNORM = 8, + TFMT5_5_5_5_1_UNORM = 10, + TFMT5_5_6_5_UNORM = 14, + TFMT5_8_8_UNORM = 15, + TFMT5_8_8_SNORM = 16, + TFMT5_8_8_UINT = 17, + TFMT5_8_8_SINT = 18, + TFMT5_L8_A8_UNORM = 19, + TFMT5_16_UNORM = 21, + TFMT5_16_SNORM = 22, + TFMT5_16_FLOAT = 23, + TFMT5_16_UINT = 24, + TFMT5_16_SINT = 25, + TFMT5_8_8_8_8_UNORM = 48, + TFMT5_8_8_8_UNORM = 49, + TFMT5_8_8_8_SNORM = 50, + TFMT5_8_8_8_8_UINT = 51, + TFMT5_8_8_8_8_SINT = 52, + TFMT5_9_9_9_E5_FLOAT = 53, + TFMT5_10_10_10_2_UNORM = 54, + TFMT5_10_10_10_2_UINT = 58, + TFMT5_11_11_10_FLOAT = 66, + TFMT5_16_16_UNORM = 67, + TFMT5_16_16_SNORM = 68, + TFMT5_16_16_FLOAT = 69, + TFMT5_16_16_UINT = 70, + TFMT5_16_16_SINT = 71, + TFMT5_32_FLOAT = 74, + TFMT5_32_UINT = 75, + TFMT5_32_SINT = 76, + TFMT5_16_16_16_16_FLOAT = 98, + TFMT5_16_16_16_16_UINT = 99, + TFMT5_16_16_16_16_SINT = 100, + TFMT5_32_32_FLOAT = 103, + TFMT5_32_32_UINT = 104, + TFMT5_32_32_SINT = 105, + TFMT5_32_32_32_32_FLOAT = 130, + TFMT5_32_32_32_32_UINT = 131, + TFMT5_32_32_32_32_SINT = 132, + TFMT5_X8Z24_UNORM = 160, +}; + +enum a5xx_tex_fetchsize { + TFETCH5_1_BYTE = 0, + TFETCH5_2_BYTE = 1, + TFETCH5_4_BYTE = 2, + TFETCH5_8_BYTE = 3, + TFETCH5_16_BYTE = 4, +}; + +enum a5xx_depth_format { + DEPTH5_NONE = 0, + DEPTH5_16 = 1, + DEPTH5_24_8 = 2, + DEPTH5_32 = 4, +}; + +enum a5xx_blit_buf { + BLIT_MRT0 = 0, + BLIT_MRT1 = 1, + BLIT_MRT2 = 2, + BLIT_MRT3 = 3, + BLIT_MRT4 = 4, + BLIT_MRT5 = 5, + BLIT_MRT6 = 6, + BLIT_MRT7 = 7, + BLIT_ZS = 8, + BLIT_Z32 = 9, +}; + +enum a5xx_tex_filter { + A5XX_TEX_NEAREST = 0, + A5XX_TEX_LINEAR = 1, + A5XX_TEX_ANISO = 2, +}; + +enum a5xx_tex_clamp { + A5XX_TEX_REPEAT = 0, + A5XX_TEX_CLAMP_TO_EDGE = 1, + A5XX_TEX_MIRROR_REPEAT = 2, + A5XX_TEX_CLAMP_TO_BORDER = 3, + A5XX_TEX_MIRROR_CLAMP = 4, +}; + +enum a5xx_tex_aniso { + A5XX_TEX_ANISO_1 = 0, + A5XX_TEX_ANISO_2 = 1, + A5XX_TEX_ANISO_4 = 2, + A5XX_TEX_ANISO_8 = 3, + A5XX_TEX_ANISO_16 = 4, +}; + +enum a5xx_tex_swiz { + A5XX_TEX_X = 0, + A5XX_TEX_Y = 1, + A5XX_TEX_Z = 2, + A5XX_TEX_W = 3, + A5XX_TEX_ZERO = 4, + A5XX_TEX_ONE = 5, +}; + +enum a5xx_tex_type { + A5XX_TEX_1D = 0, + A5XX_TEX_2D = 1, + A5XX_TEX_CUBE = 2, + A5XX_TEX_3D = 3, +}; + +#define A5XX_INT0_RBBM_GPU_IDLE 0x00000001 +#define A5XX_INT0_RBBM_AHB_ERROR 0x00000002 +#define A5XX_INT0_RBBM_TRANSFER_TIMEOUT 0x00000004 +#define A5XX_INT0_RBBM_ME_MS_TIMEOUT 0x00000008 +#define A5XX_INT0_RBBM_PFP_MS_TIMEOUT 0x00000010 +#define A5XX_INT0_RBBM_ETS_MS_TIMEOUT 0x00000020 +#define A5XX_INT0_RBBM_ATB_ASYNC_OVERFLOW 0x00000040 +#define A5XX_INT0_RBBM_GPC_ERROR 0x00000080 +#define A5XX_INT0_CP_SW 0x00000100 +#define A5XX_INT0_CP_HW_ERROR 0x00000200 +#define A5XX_INT0_CP_CCU_FLUSH_DEPTH_TS 0x00000400 +#define A5XX_INT0_CP_CCU_FLUSH_COLOR_TS 0x00000800 +#define A5XX_INT0_CP_CCU_RESOLVE_TS 0x00001000 +#define A5XX_INT0_CP_IB2 0x00002000 +#define A5XX_INT0_CP_IB1 0x00004000 +#define A5XX_INT0_CP_RB 0x00008000 +#define A5XX_INT0_CP_UNUSED_1 0x00010000 +#define A5XX_INT0_CP_RB_DONE_TS 0x00020000 +#define A5XX_INT0_CP_WT_DONE_TS 0x00040000 +#define A5XX_INT0_UNKNOWN_1 0x00080000 +#define A5XX_INT0_CP_CACHE_FLUSH_TS 0x00100000 +#define A5XX_INT0_UNUSED_2 0x00200000 +#define A5XX_INT0_RBBM_ATB_BUS_OVERFLOW 0x00400000 +#define A5XX_INT0_MISC_HANG_DETECT 0x00800000 +#define A5XX_INT0_UCHE_OOB_ACCESS 0x01000000 +#define A5XX_INT0_UCHE_TRAP_INTR 0x02000000 +#define A5XX_INT0_DEBBUS_INTR_0 0x04000000 +#define A5XX_INT0_DEBBUS_INTR_1 0x08000000 +#define A5XX_INT0_GPMU_VOLTAGE_DROOP 0x10000000 +#define A5XX_INT0_GPMU_FIRMWARE 0x20000000 +#define A5XX_INT0_ISDB_CPU_IRQ 0x40000000 +#define A5XX_INT0_ISDB_UNDER_DEBUG 0x80000000 +#define A5XX_CP_INT_CP_OPCODE_ERROR 0x00000001 +#define A5XX_CP_INT_CP_RESERVED_BIT_ERROR 0x00000002 +#define A5XX_CP_INT_CP_HW_FAULT_ERROR 0x00000004 +#define A5XX_CP_INT_CP_DMA_ERROR 0x00000008 +#define A5XX_CP_INT_CP_REGISTER_PROTECTION_ERROR 0x00000010 +#define A5XX_CP_INT_CP_AHB_ERROR 0x00000020 +#define REG_A5XX_CP_RB_BASE 0x00000800 + +#define REG_A5XX_CP_RB_BASE_HI 0x00000801 + +#define REG_A5XX_CP_RB_CNTL 0x00000802 + +#define REG_A5XX_CP_RB_RPTR_ADDR 0x00000804 + +#define REG_A5XX_CP_RB_RPTR_ADDR_HI 0x00000805 + +#define REG_A5XX_CP_RB_RPTR 0x00000806 + +#define REG_A5XX_CP_RB_WPTR 0x00000807 + +#define REG_A5XX_CP_PFP_STAT_ADDR 0x00000808 + +#define REG_A5XX_CP_PFP_STAT_DATA 0x00000809 + +#define REG_A5XX_CP_DRAW_STATE_ADDR 0x0000080b + +#define REG_A5XX_CP_DRAW_STATE_DATA 0x0000080c + +#define REG_A5XX_CP_CRASH_SCRIPT_BASE_LO 0x00000817 + +#define REG_A5XX_CP_CRASH_SCRIPT_BASE_HI 0x00000818 + +#define REG_A5XX_CP_CRASH_DUMP_CNTL 0x00000819 + +#define REG_A5XX_CP_ME_STAT_ADDR 0x0000081a + +#define REG_A5XX_CP_ROQ_THRESHOLDS_1 0x0000081f + +#define REG_A5XX_CP_ROQ_THRESHOLDS_2 0x00000820 + +#define REG_A5XX_CP_ROQ_DBG_ADDR 0x00000821 + +#define REG_A5XX_CP_ROQ_DBG_DATA 0x00000822 + +#define REG_A5XX_CP_MEQ_DBG_ADDR 0x00000823 + +#define REG_A5XX_CP_MEQ_DBG_DATA 0x00000824 + +#define REG_A5XX_CP_MEQ_THRESHOLDS 0x00000825 + +#define REG_A5XX_CP_MERCIU_SIZE 0x00000826 + +#define REG_A5XX_CP_MERCIU_DBG_ADDR 0x00000827 + +#define REG_A5XX_CP_MERCIU_DBG_DATA_1 0x00000828 + +#define REG_A5XX_CP_MERCIU_DBG_DATA_2 0x00000829 + +#define REG_A5XX_CP_PFP_UCODE_DBG_ADDR 0x0000082a + +#define REG_A5XX_CP_PFP_UCODE_DBG_DATA 0x0000082b + +#define REG_A5XX_CP_ME_UCODE_DBG_ADDR 0x0000082f + +#define REG_A5XX_CP_ME_UCODE_DBG_DATA 0x00000830 + +#define REG_A5XX_CP_CNTL 0x00000831 + +#define REG_A5XX_CP_PFP_ME_CNTL 0x00000832 + +#define REG_A5XX_CP_CHICKEN_DBG 0x00000833 + +#define REG_A5XX_CP_PFP_INSTR_BASE_LO 0x00000835 + +#define REG_A5XX_CP_PFP_INSTR_BASE_HI 0x00000836 + +#define REG_A5XX_CP_ME_INSTR_BASE_LO 0x00000838 + +#define REG_A5XX_CP_ME_INSTR_BASE_HI 0x00000839 + +#define REG_A5XX_CP_CONTEXT_SWITCH_CNTL 0x0000083b + +#define REG_A5XX_CP_CONTEXT_SWITCH_RESTORE_ADDR_LO 0x0000083c + +#define REG_A5XX_CP_CONTEXT_SWITCH_RESTORE_ADDR_HI 0x0000083d + +#define REG_A5XX_CP_CONTEXT_SWITCH_SAVE_ADDR_LO 0x0000083e + +#define REG_A5XX_CP_CONTEXT_SWITCH_SAVE_ADDR_HI 0x0000083f + +#define REG_A5XX_CP_CONTEXT_SWITCH_SMMU_INFO_LO 0x00000840 + +#define REG_A5XX_CP_CONTEXT_SWITCH_SMMU_INFO_HI 0x00000841 + +#define REG_A5XX_CP_ADDR_MODE_CNTL 0x00000860 + +#define REG_A5XX_CP_ME_STAT_DATA 0x00000b14 + +#define REG_A5XX_CP_WFI_PEND_CTR 0x00000b15 + +#define REG_A5XX_CP_INTERRUPT_STATUS 0x00000b18 + +#define REG_A5XX_CP_HW_FAULT 0x00000b1a + +#define REG_A5XX_CP_PROTECT_STATUS 0x00000b1c + +#define REG_A5XX_CP_IB1_BASE 0x00000b1f + +#define REG_A5XX_CP_IB1_BASE_HI 0x00000b20 + +#define REG_A5XX_CP_IB1_BUFSZ 0x00000b21 + +#define REG_A5XX_CP_IB2_BASE 0x00000b22 + +#define REG_A5XX_CP_IB2_BASE_HI 0x00000b23 + +#define REG_A5XX_CP_IB2_BUFSZ 0x00000b24 + +static inline uint32_t REG_A5XX_CP_SCRATCH(uint32_t i0) { return 0x00000b78 + 0x1*i0; } + +static inline uint32_t REG_A5XX_CP_SCRATCH_REG(uint32_t i0) { return 0x00000b78 + 0x1*i0; } + +static inline uint32_t REG_A5XX_CP_PROTECT(uint32_t i0) { return 0x00000880 + 0x1*i0; } + +static inline uint32_t REG_A5XX_CP_PROTECT_REG(uint32_t i0) { return 0x00000880 + 0x1*i0; } +#define A5XX_CP_PROTECT_REG_BASE_ADDR__MASK 0x0001ffff +#define A5XX_CP_PROTECT_REG_BASE_ADDR__SHIFT 0 +static inline uint32_t A5XX_CP_PROTECT_REG_BASE_ADDR(uint32_t val) +{ + return ((val) << A5XX_CP_PROTECT_REG_BASE_ADDR__SHIFT) & A5XX_CP_PROTECT_REG_BASE_ADDR__MASK; +} +#define A5XX_CP_PROTECT_REG_MASK_LEN__MASK 0x1f000000 +#define A5XX_CP_PROTECT_REG_MASK_LEN__SHIFT 24 +static inline uint32_t A5XX_CP_PROTECT_REG_MASK_LEN(uint32_t val) +{ + return ((val) << A5XX_CP_PROTECT_REG_MASK_LEN__SHIFT) & A5XX_CP_PROTECT_REG_MASK_LEN__MASK; +} +#define A5XX_CP_PROTECT_REG_TRAP_WRITE 0x20000000 +#define A5XX_CP_PROTECT_REG_TRAP_READ 0x40000000 + +#define REG_A5XX_CP_PROTECT_CNTL 0x000008a0 + +#define REG_A5XX_CP_AHB_FAULT 0x00000b1b + +#define REG_A5XX_CP_PERFCTR_CP_SEL_0 0x00000bb0 + +#define REG_A5XX_CP_PERFCTR_CP_SEL_1 0x00000bb1 + +#define REG_A5XX_CP_PERFCTR_CP_SEL_2 0x00000bb2 + +#define REG_A5XX_CP_PERFCTR_CP_SEL_3 0x00000bb3 + +#define REG_A5XX_CP_PERFCTR_CP_SEL_4 0x00000bb4 + +#define REG_A5XX_CP_PERFCTR_CP_SEL_5 0x00000bb5 + +#define REG_A5XX_CP_PERFCTR_CP_SEL_6 0x00000bb6 + +#define REG_A5XX_CP_PERFCTR_CP_SEL_7 0x00000bb7 + +#define REG_A5XX_VSC_ADDR_MODE_CNTL 0x00000bc1 + +#define REG_A5XX_CP_POWERCTR_CP_SEL_0 0x00000bba + +#define REG_A5XX_CP_POWERCTR_CP_SEL_1 0x00000bbb + +#define REG_A5XX_CP_POWERCTR_CP_SEL_2 0x00000bbc + +#define REG_A5XX_CP_POWERCTR_CP_SEL_3 0x00000bbd + +#define REG_A5XX_RBBM_CFG_DBGBUS_SEL_A 0x00000004 + +#define REG_A5XX_RBBM_CFG_DBGBUS_SEL_B 0x00000005 + +#define REG_A5XX_RBBM_CFG_DBGBUS_SEL_C 0x00000006 + +#define REG_A5XX_RBBM_CFG_DBGBUS_SEL_D 0x00000007 + +#define REG_A5XX_RBBM_CFG_DBGBUS_CNTLT 0x00000008 + +#define REG_A5XX_RBBM_CFG_DBGBUS_CNTLM 0x00000009 + +#define REG_A5XX_RBBM_CFG_DEBBUS_CTLTM_ENABLE_SHIFT 0x00000018 + +#define REG_A5XX_RBBM_CFG_DBGBUS_OPL 0x0000000a + +#define REG_A5XX_RBBM_CFG_DBGBUS_OPE 0x0000000b + +#define REG_A5XX_RBBM_CFG_DBGBUS_IVTL_0 0x0000000c + +#define REG_A5XX_RBBM_CFG_DBGBUS_IVTL_1 0x0000000d + +#define REG_A5XX_RBBM_CFG_DBGBUS_IVTL_2 0x0000000e + +#define REG_A5XX_RBBM_CFG_DBGBUS_IVTL_3 0x0000000f + +#define REG_A5XX_RBBM_CFG_DBGBUS_MASKL_0 0x00000010 + +#define REG_A5XX_RBBM_CFG_DBGBUS_MASKL_1 0x00000011 + +#define REG_A5XX_RBBM_CFG_DBGBUS_MASKL_2 0x00000012 + +#define REG_A5XX_RBBM_CFG_DBGBUS_MASKL_3 0x00000013 + +#define REG_A5XX_RBBM_CFG_DBGBUS_BYTEL_0 0x00000014 + +#define REG_A5XX_RBBM_CFG_DBGBUS_BYTEL_1 0x00000015 + +#define REG_A5XX_RBBM_CFG_DBGBUS_IVTE_0 0x00000016 + +#define REG_A5XX_RBBM_CFG_DBGBUS_IVTE_1 0x00000017 + +#define REG_A5XX_RBBM_CFG_DBGBUS_IVTE_2 0x00000018 + +#define REG_A5XX_RBBM_CFG_DBGBUS_IVTE_3 0x00000019 + +#define REG_A5XX_RBBM_CFG_DBGBUS_MASKE_0 0x0000001a + +#define REG_A5XX_RBBM_CFG_DBGBUS_MASKE_1 0x0000001b + +#define REG_A5XX_RBBM_CFG_DBGBUS_MASKE_2 0x0000001c + +#define REG_A5XX_RBBM_CFG_DBGBUS_MASKE_3 0x0000001d + +#define REG_A5XX_RBBM_CFG_DBGBUS_NIBBLEE 0x0000001e + +#define REG_A5XX_RBBM_CFG_DBGBUS_PTRC0 0x0000001f + +#define REG_A5XX_RBBM_CFG_DBGBUS_PTRC1 0x00000020 + +#define REG_A5XX_RBBM_CFG_DBGBUS_LOADREG 0x00000021 + +#define REG_A5XX_RBBM_CFG_DBGBUS_IDX 0x00000022 + +#define REG_A5XX_RBBM_CFG_DBGBUS_CLRC 0x00000023 + +#define REG_A5XX_RBBM_CFG_DBGBUS_LOADIVT 0x00000024 + +#define REG_A5XX_RBBM_INTERFACE_HANG_INT_CNTL 0x0000002f + +#define REG_A5XX_RBBM_INT_CLEAR_CMD 0x00000037 + +#define REG_A5XX_RBBM_INT_0_MASK 0x00000038 +#define A5XX_RBBM_INT_0_MASK_RBBM_GPU_IDLE 0x00000001 +#define A5XX_RBBM_INT_0_MASK_RBBM_AHB_ERROR 0x00000002 +#define A5XX_RBBM_INT_0_MASK_RBBM_TRANSFER_TIMEOUT 0x00000004 +#define A5XX_RBBM_INT_0_MASK_RBBM_ME_MS_TIMEOUT 0x00000008 +#define A5XX_RBBM_INT_0_MASK_RBBM_PFP_MS_TIMEOUT 0x00000010 +#define A5XX_RBBM_INT_0_MASK_RBBM_ETS_MS_TIMEOUT 0x00000020 +#define A5XX_RBBM_INT_0_MASK_RBBM_ATB_ASYNC_OVERFLOW 0x00000040 +#define A5XX_RBBM_INT_0_MASK_RBBM_GPC_ERROR 0x00000080 +#define A5XX_RBBM_INT_0_MASK_CP_SW 0x00000100 +#define A5XX_RBBM_INT_0_MASK_CP_HW_ERROR 0x00000200 +#define A5XX_RBBM_INT_0_MASK_CP_CCU_FLUSH_DEPTH_TS 0x00000400 +#define A5XX_RBBM_INT_0_MASK_CP_CCU_FLUSH_COLOR_TS 0x00000800 +#define A5XX_RBBM_INT_0_MASK_CP_CCU_RESOLVE_TS 0x00001000 +#define A5XX_RBBM_INT_0_MASK_CP_IB2 0x00002000 +#define A5XX_RBBM_INT_0_MASK_CP_IB1 0x00004000 +#define A5XX_RBBM_INT_0_MASK_CP_RB 0x00008000 +#define A5XX_RBBM_INT_0_MASK_CP_RB_DONE_TS 0x00020000 +#define A5XX_RBBM_INT_0_MASK_CP_WT_DONE_TS 0x00040000 +#define A5XX_RBBM_INT_0_MASK_CP_CACHE_FLUSH_TS 0x00100000 +#define A5XX_RBBM_INT_0_MASK_RBBM_ATB_BUS_OVERFLOW 0x00400000 +#define A5XX_RBBM_INT_0_MASK_MISC_HANG_DETECT 0x00800000 +#define A5XX_RBBM_INT_0_MASK_UCHE_OOB_ACCESS 0x01000000 +#define A5XX_RBBM_INT_0_MASK_UCHE_TRAP_INTR 0x02000000 +#define A5XX_RBBM_INT_0_MASK_DEBBUS_INTR_0 0x04000000 +#define A5XX_RBBM_INT_0_MASK_DEBBUS_INTR_1 0x08000000 +#define A5XX_RBBM_INT_0_MASK_GPMU_VOLTAGE_DROOP 0x10000000 +#define A5XX_RBBM_INT_0_MASK_GPMU_FIRMWARE 0x20000000 +#define A5XX_RBBM_INT_0_MASK_ISDB_CPU_IRQ 0x40000000 +#define A5XX_RBBM_INT_0_MASK_ISDB_UNDER_DEBUG 0x80000000 + +#define REG_A5XX_RBBM_AHB_DBG_CNTL 0x0000003f + +#define REG_A5XX_RBBM_EXT_VBIF_DBG_CNTL 0x00000041 + +#define REG_A5XX_RBBM_SW_RESET_CMD 0x00000043 + +#define REG_A5XX_RBBM_BLOCK_SW_RESET_CMD 0x00000045 + +#define REG_A5XX_RBBM_BLOCK_SW_RESET_CMD2 0x00000046 + +#define REG_A5XX_RBBM_DBG_LO_HI_GPIO 0x00000048 + +#define REG_A5XX_RBBM_EXT_TRACE_BUS_CNTL 0x00000049 + +#define REG_A5XX_RBBM_CLOCK_CNTL_TP0 0x0000004a + +#define REG_A5XX_RBBM_CLOCK_CNTL_TP1 0x0000004b + +#define REG_A5XX_RBBM_CLOCK_CNTL_TP2 0x0000004c + +#define REG_A5XX_RBBM_CLOCK_CNTL_TP3 0x0000004d + +#define REG_A5XX_RBBM_CLOCK_CNTL2_TP0 0x0000004e + +#define REG_A5XX_RBBM_CLOCK_CNTL2_TP1 0x0000004f + +#define REG_A5XX_RBBM_CLOCK_CNTL2_TP2 0x00000050 + +#define REG_A5XX_RBBM_CLOCK_CNTL2_TP3 0x00000051 + +#define REG_A5XX_RBBM_CLOCK_CNTL3_TP0 0x00000052 + +#define REG_A5XX_RBBM_CLOCK_CNTL3_TP1 0x00000053 + +#define REG_A5XX_RBBM_CLOCK_CNTL3_TP2 0x00000054 + +#define REG_A5XX_RBBM_CLOCK_CNTL3_TP3 0x00000055 + +#define REG_A5XX_RBBM_READ_AHB_THROUGH_DBG 0x00000059 + +#define REG_A5XX_RBBM_CLOCK_CNTL_UCHE 0x0000005a + +#define REG_A5XX_RBBM_CLOCK_CNTL2_UCHE 0x0000005b + +#define REG_A5XX_RBBM_CLOCK_CNTL3_UCHE 0x0000005c + +#define REG_A5XX_RBBM_CLOCK_CNTL4_UCHE 0x0000005d + +#define REG_A5XX_RBBM_CLOCK_HYST_UCHE 0x0000005e + +#define REG_A5XX_RBBM_CLOCK_DELAY_UCHE 0x0000005f + +#define REG_A5XX_RBBM_CLOCK_MODE_GPC 0x00000060 + +#define REG_A5XX_RBBM_CLOCK_DELAY_GPC 0x00000061 + +#define REG_A5XX_RBBM_CLOCK_HYST_GPC 0x00000062 + +#define REG_A5XX_RBBM_CLOCK_CNTL_TSE_RAS_RBBM 0x00000063 + +#define REG_A5XX_RBBM_CLOCK_HYST_TSE_RAS_RBBM 0x00000064 + +#define REG_A5XX_RBBM_CLOCK_DELAY_TSE_RAS_RBBM 0x00000065 + +#define REG_A5XX_RBBM_CLOCK_DELAY_HLSQ 0x00000066 + +#define REG_A5XX_RBBM_CLOCK_CNTL 0x00000067 + +#define REG_A5XX_RBBM_CLOCK_CNTL_SP0 0x00000068 + +#define REG_A5XX_RBBM_CLOCK_CNTL_SP1 0x00000069 + +#define REG_A5XX_RBBM_CLOCK_CNTL_SP2 0x0000006a + +#define REG_A5XX_RBBM_CLOCK_CNTL_SP3 0x0000006b + +#define REG_A5XX_RBBM_CLOCK_CNTL2_SP0 0x0000006c + +#define REG_A5XX_RBBM_CLOCK_CNTL2_SP1 0x0000006d + +#define REG_A5XX_RBBM_CLOCK_CNTL2_SP2 0x0000006e + +#define REG_A5XX_RBBM_CLOCK_CNTL2_SP3 0x0000006f + +#define REG_A5XX_RBBM_CLOCK_HYST_SP0 0x00000070 + +#define REG_A5XX_RBBM_CLOCK_HYST_SP1 0x00000071 + +#define REG_A5XX_RBBM_CLOCK_HYST_SP2 0x00000072 + +#define REG_A5XX_RBBM_CLOCK_HYST_SP3 0x00000073 + +#define REG_A5XX_RBBM_CLOCK_DELAY_SP0 0x00000074 + +#define REG_A5XX_RBBM_CLOCK_DELAY_SP1 0x00000075 + +#define REG_A5XX_RBBM_CLOCK_DELAY_SP2 0x00000076 + +#define REG_A5XX_RBBM_CLOCK_DELAY_SP3 0x00000077 + +#define REG_A5XX_RBBM_CLOCK_CNTL_RB0 0x00000078 + +#define REG_A5XX_RBBM_CLOCK_CNTL_RB1 0x00000079 + +#define REG_A5XX_RBBM_CLOCK_CNTL_RB2 0x0000007a + +#define REG_A5XX_RBBM_CLOCK_CNTL_RB3 0x0000007b + +#define REG_A5XX_RBBM_CLOCK_CNTL2_RB0 0x0000007c + +#define REG_A5XX_RBBM_CLOCK_CNTL2_RB1 0x0000007d + +#define REG_A5XX_RBBM_CLOCK_CNTL2_RB2 0x0000007e + +#define REG_A5XX_RBBM_CLOCK_CNTL2_RB3 0x0000007f + +#define REG_A5XX_RBBM_CLOCK_HYST_RAC 0x00000080 + +#define REG_A5XX_RBBM_CLOCK_DELAY_RAC 0x00000081 + +#define REG_A5XX_RBBM_CLOCK_CNTL_CCU0 0x00000082 + +#define REG_A5XX_RBBM_CLOCK_CNTL_CCU1 0x00000083 + +#define REG_A5XX_RBBM_CLOCK_CNTL_CCU2 0x00000084 + +#define REG_A5XX_RBBM_CLOCK_CNTL_CCU3 0x00000085 + +#define REG_A5XX_RBBM_CLOCK_HYST_RB_CCU0 0x00000086 + +#define REG_A5XX_RBBM_CLOCK_HYST_RB_CCU1 0x00000087 + +#define REG_A5XX_RBBM_CLOCK_HYST_RB_CCU2 0x00000088 + +#define REG_A5XX_RBBM_CLOCK_HYST_RB_CCU3 0x00000089 + +#define REG_A5XX_RBBM_CLOCK_CNTL_RAC 0x0000008a + +#define REG_A5XX_RBBM_CLOCK_CNTL2_RAC 0x0000008b + +#define REG_A5XX_RBBM_CLOCK_DELAY_RB_CCU_L1_0 0x0000008c + +#define REG_A5XX_RBBM_CLOCK_DELAY_RB_CCU_L1_1 0x0000008d + +#define REG_A5XX_RBBM_CLOCK_DELAY_RB_CCU_L1_2 0x0000008e + +#define REG_A5XX_RBBM_CLOCK_DELAY_RB_CCU_L1_3 0x0000008f + +#define REG_A5XX_RBBM_CLOCK_HYST_VFD 0x00000090 + +#define REG_A5XX_RBBM_CLOCK_MODE_VFD 0x00000091 + +#define REG_A5XX_RBBM_CLOCK_DELAY_VFD 0x00000092 + +#define REG_A5XX_RBBM_AHB_CNTL0 0x00000093 + +#define REG_A5XX_RBBM_AHB_CNTL1 0x00000094 + +#define REG_A5XX_RBBM_AHB_CNTL2 0x00000095 + +#define REG_A5XX_RBBM_AHB_CMD 0x00000096 + +#define REG_A5XX_RBBM_INTERFACE_HANG_MASK_CNTL11 0x0000009c + +#define REG_A5XX_RBBM_INTERFACE_HANG_MASK_CNTL12 0x0000009d + +#define REG_A5XX_RBBM_INTERFACE_HANG_MASK_CNTL13 0x0000009e + +#define REG_A5XX_RBBM_INTERFACE_HANG_MASK_CNTL14 0x0000009f + +#define REG_A5XX_RBBM_INTERFACE_HANG_MASK_CNTL15 0x000000a0 + +#define REG_A5XX_RBBM_INTERFACE_HANG_MASK_CNTL16 0x000000a1 + +#define REG_A5XX_RBBM_INTERFACE_HANG_MASK_CNTL17 0x000000a2 + +#define REG_A5XX_RBBM_INTERFACE_HANG_MASK_CNTL18 0x000000a3 + +#define REG_A5XX_RBBM_CLOCK_DELAY_TP0 0x000000a4 + +#define REG_A5XX_RBBM_CLOCK_DELAY_TP1 0x000000a5 + +#define REG_A5XX_RBBM_CLOCK_DELAY_TP2 0x000000a6 + +#define REG_A5XX_RBBM_CLOCK_DELAY_TP3 0x000000a7 + +#define REG_A5XX_RBBM_CLOCK_DELAY2_TP0 0x000000a8 + +#define REG_A5XX_RBBM_CLOCK_DELAY2_TP1 0x000000a9 + +#define REG_A5XX_RBBM_CLOCK_DELAY2_TP2 0x000000aa + +#define REG_A5XX_RBBM_CLOCK_DELAY2_TP3 0x000000ab + +#define REG_A5XX_RBBM_CLOCK_DELAY3_TP0 0x000000ac + +#define REG_A5XX_RBBM_CLOCK_DELAY3_TP1 0x000000ad + +#define REG_A5XX_RBBM_CLOCK_DELAY3_TP2 0x000000ae + +#define REG_A5XX_RBBM_CLOCK_DELAY3_TP3 0x000000af + +#define REG_A5XX_RBBM_CLOCK_HYST_TP0 0x000000b0 + +#define REG_A5XX_RBBM_CLOCK_HYST_TP1 0x000000b1 + +#define REG_A5XX_RBBM_CLOCK_HYST_TP2 0x000000b2 + +#define REG_A5XX_RBBM_CLOCK_HYST_TP3 0x000000b3 + +#define REG_A5XX_RBBM_CLOCK_HYST2_TP0 0x000000b4 + +#define REG_A5XX_RBBM_CLOCK_HYST2_TP1 0x000000b5 + +#define REG_A5XX_RBBM_CLOCK_HYST2_TP2 0x000000b6 + +#define REG_A5XX_RBBM_CLOCK_HYST2_TP3 0x000000b7 + +#define REG_A5XX_RBBM_CLOCK_HYST3_TP0 0x000000b8 + +#define REG_A5XX_RBBM_CLOCK_HYST3_TP1 0x000000b9 + +#define REG_A5XX_RBBM_CLOCK_HYST3_TP2 0x000000ba + +#define REG_A5XX_RBBM_CLOCK_HYST3_TP3 0x000000bb + +#define REG_A5XX_RBBM_CLOCK_CNTL_GPMU 0x000000c8 + +#define REG_A5XX_RBBM_CLOCK_DELAY_GPMU 0x000000c9 + +#define REG_A5XX_RBBM_CLOCK_HYST_GPMU 0x000000ca + +#define REG_A5XX_RBBM_PERFCTR_CP_0_LO 0x000003a0 + +#define REG_A5XX_RBBM_PERFCTR_CP_0_HI 0x000003a1 + +#define REG_A5XX_RBBM_PERFCTR_CP_1_LO 0x000003a2 + +#define REG_A5XX_RBBM_PERFCTR_CP_1_HI 0x000003a3 + +#define REG_A5XX_RBBM_PERFCTR_CP_2_LO 0x000003a4 + +#define REG_A5XX_RBBM_PERFCTR_CP_2_HI 0x000003a5 + +#define REG_A5XX_RBBM_PERFCTR_CP_3_LO 0x000003a6 + +#define REG_A5XX_RBBM_PERFCTR_CP_3_HI 0x000003a7 + +#define REG_A5XX_RBBM_PERFCTR_CP_4_LO 0x000003a8 + +#define REG_A5XX_RBBM_PERFCTR_CP_4_HI 0x000003a9 + +#define REG_A5XX_RBBM_PERFCTR_CP_5_LO 0x000003aa + +#define REG_A5XX_RBBM_PERFCTR_CP_5_HI 0x000003ab + +#define REG_A5XX_RBBM_PERFCTR_CP_6_LO 0x000003ac + +#define REG_A5XX_RBBM_PERFCTR_CP_6_HI 0x000003ad + +#define REG_A5XX_RBBM_PERFCTR_CP_7_LO 0x000003ae + +#define REG_A5XX_RBBM_PERFCTR_CP_7_HI 0x000003af + +#define REG_A5XX_RBBM_PERFCTR_RBBM_0_LO 0x000003b0 + +#define REG_A5XX_RBBM_PERFCTR_RBBM_0_HI 0x000003b1 + +#define REG_A5XX_RBBM_PERFCTR_RBBM_1_LO 0x000003b2 + +#define REG_A5XX_RBBM_PERFCTR_RBBM_1_HI 0x000003b3 + +#define REG_A5XX_RBBM_PERFCTR_RBBM_2_LO 0x000003b4 + +#define REG_A5XX_RBBM_PERFCTR_RBBM_2_HI 0x000003b5 + +#define REG_A5XX_RBBM_PERFCTR_RBBM_3_LO 0x000003b6 + +#define REG_A5XX_RBBM_PERFCTR_RBBM_3_HI 0x000003b7 + +#define REG_A5XX_RBBM_PERFCTR_PC_0_LO 0x000003b8 + +#define REG_A5XX_RBBM_PERFCTR_PC_0_HI 0x000003b9 + +#define REG_A5XX_RBBM_PERFCTR_PC_1_LO 0x000003ba + +#define REG_A5XX_RBBM_PERFCTR_PC_1_HI 0x000003bb + +#define REG_A5XX_RBBM_PERFCTR_PC_2_LO 0x000003bc + +#define REG_A5XX_RBBM_PERFCTR_PC_2_HI 0x000003bd + +#define REG_A5XX_RBBM_PERFCTR_PC_3_LO 0x000003be + +#define REG_A5XX_RBBM_PERFCTR_PC_3_HI 0x000003bf + +#define REG_A5XX_RBBM_PERFCTR_PC_4_LO 0x000003c0 + +#define REG_A5XX_RBBM_PERFCTR_PC_4_HI 0x000003c1 + +#define REG_A5XX_RBBM_PERFCTR_PC_5_LO 0x000003c2 + +#define REG_A5XX_RBBM_PERFCTR_PC_5_HI 0x000003c3 + +#define REG_A5XX_RBBM_PERFCTR_PC_6_LO 0x000003c4 + +#define REG_A5XX_RBBM_PERFCTR_PC_6_HI 0x000003c5 + +#define REG_A5XX_RBBM_PERFCTR_PC_7_LO 0x000003c6 + +#define REG_A5XX_RBBM_PERFCTR_PC_7_HI 0x000003c7 + +#define REG_A5XX_RBBM_PERFCTR_VFD_0_LO 0x000003c8 + +#define REG_A5XX_RBBM_PERFCTR_VFD_0_HI 0x000003c9 + +#define REG_A5XX_RBBM_PERFCTR_VFD_1_LO 0x000003ca + +#define REG_A5XX_RBBM_PERFCTR_VFD_1_HI 0x000003cb + +#define REG_A5XX_RBBM_PERFCTR_VFD_2_LO 0x000003cc + +#define REG_A5XX_RBBM_PERFCTR_VFD_2_HI 0x000003cd + +#define REG_A5XX_RBBM_PERFCTR_VFD_3_LO 0x000003ce + +#define REG_A5XX_RBBM_PERFCTR_VFD_3_HI 0x000003cf + +#define REG_A5XX_RBBM_PERFCTR_VFD_4_LO 0x000003d0 + +#define REG_A5XX_RBBM_PERFCTR_VFD_4_HI 0x000003d1 + +#define REG_A5XX_RBBM_PERFCTR_VFD_5_LO 0x000003d2 + +#define REG_A5XX_RBBM_PERFCTR_VFD_5_HI 0x000003d3 + +#define REG_A5XX_RBBM_PERFCTR_VFD_6_LO 0x000003d4 + +#define REG_A5XX_RBBM_PERFCTR_VFD_6_HI 0x000003d5 + +#define REG_A5XX_RBBM_PERFCTR_VFD_7_LO 0x000003d6 + +#define REG_A5XX_RBBM_PERFCTR_VFD_7_HI 0x000003d7 + +#define REG_A5XX_RBBM_PERFCTR_HLSQ_0_LO 0x000003d8 + +#define REG_A5XX_RBBM_PERFCTR_HLSQ_0_HI 0x000003d9 + +#define REG_A5XX_RBBM_PERFCTR_HLSQ_1_LO 0x000003da + +#define REG_A5XX_RBBM_PERFCTR_HLSQ_1_HI 0x000003db + +#define REG_A5XX_RBBM_PERFCTR_HLSQ_2_LO 0x000003dc + +#define REG_A5XX_RBBM_PERFCTR_HLSQ_2_HI 0x000003dd + +#define REG_A5XX_RBBM_PERFCTR_HLSQ_3_LO 0x000003de + +#define REG_A5XX_RBBM_PERFCTR_HLSQ_3_HI 0x000003df + +#define REG_A5XX_RBBM_PERFCTR_HLSQ_4_LO 0x000003e0 + +#define REG_A5XX_RBBM_PERFCTR_HLSQ_4_HI 0x000003e1 + +#define REG_A5XX_RBBM_PERFCTR_HLSQ_5_LO 0x000003e2 + +#define REG_A5XX_RBBM_PERFCTR_HLSQ_5_HI 0x000003e3 + +#define REG_A5XX_RBBM_PERFCTR_HLSQ_6_LO 0x000003e4 + +#define REG_A5XX_RBBM_PERFCTR_HLSQ_6_HI 0x000003e5 + +#define REG_A5XX_RBBM_PERFCTR_HLSQ_7_LO 0x000003e6 + +#define REG_A5XX_RBBM_PERFCTR_HLSQ_7_HI 0x000003e7 + +#define REG_A5XX_RBBM_PERFCTR_VPC_0_LO 0x000003e8 + +#define REG_A5XX_RBBM_PERFCTR_VPC_0_HI 0x000003e9 + +#define REG_A5XX_RBBM_PERFCTR_VPC_1_LO 0x000003ea + +#define REG_A5XX_RBBM_PERFCTR_VPC_1_HI 0x000003eb + +#define REG_A5XX_RBBM_PERFCTR_VPC_2_LO 0x000003ec + +#define REG_A5XX_RBBM_PERFCTR_VPC_2_HI 0x000003ed + +#define REG_A5XX_RBBM_PERFCTR_VPC_3_LO 0x000003ee + +#define REG_A5XX_RBBM_PERFCTR_VPC_3_HI 0x000003ef + +#define REG_A5XX_RBBM_PERFCTR_CCU_0_LO 0x000003f0 + +#define REG_A5XX_RBBM_PERFCTR_CCU_0_HI 0x000003f1 + +#define REG_A5XX_RBBM_PERFCTR_CCU_1_LO 0x000003f2 + +#define REG_A5XX_RBBM_PERFCTR_CCU_1_HI 0x000003f3 + +#define REG_A5XX_RBBM_PERFCTR_CCU_2_LO 0x000003f4 + +#define REG_A5XX_RBBM_PERFCTR_CCU_2_HI 0x000003f5 + +#define REG_A5XX_RBBM_PERFCTR_CCU_3_LO 0x000003f6 + +#define REG_A5XX_RBBM_PERFCTR_CCU_3_HI 0x000003f7 + +#define REG_A5XX_RBBM_PERFCTR_TSE_0_LO 0x000003f8 + +#define REG_A5XX_RBBM_PERFCTR_TSE_0_HI 0x000003f9 + +#define REG_A5XX_RBBM_PERFCTR_TSE_1_LO 0x000003fa + +#define REG_A5XX_RBBM_PERFCTR_TSE_1_HI 0x000003fb + +#define REG_A5XX_RBBM_PERFCTR_TSE_2_LO 0x000003fc + +#define REG_A5XX_RBBM_PERFCTR_TSE_2_HI 0x000003fd + +#define REG_A5XX_RBBM_PERFCTR_TSE_3_LO 0x000003fe + +#define REG_A5XX_RBBM_PERFCTR_TSE_3_HI 0x000003ff + +#define REG_A5XX_RBBM_PERFCTR_RAS_0_LO 0x00000400 + +#define REG_A5XX_RBBM_PERFCTR_RAS_0_HI 0x00000401 + +#define REG_A5XX_RBBM_PERFCTR_RAS_1_LO 0x00000402 + +#define REG_A5XX_RBBM_PERFCTR_RAS_1_HI 0x00000403 + +#define REG_A5XX_RBBM_PERFCTR_RAS_2_LO 0x00000404 + +#define REG_A5XX_RBBM_PERFCTR_RAS_2_HI 0x00000405 + +#define REG_A5XX_RBBM_PERFCTR_RAS_3_LO 0x00000406 + +#define REG_A5XX_RBBM_PERFCTR_RAS_3_HI 0x00000407 + +#define REG_A5XX_RBBM_PERFCTR_UCHE_0_LO 0x00000408 + +#define REG_A5XX_RBBM_PERFCTR_UCHE_0_HI 0x00000409 + +#define REG_A5XX_RBBM_PERFCTR_UCHE_1_LO 0x0000040a + +#define REG_A5XX_RBBM_PERFCTR_UCHE_1_HI 0x0000040b + +#define REG_A5XX_RBBM_PERFCTR_UCHE_2_LO 0x0000040c + +#define REG_A5XX_RBBM_PERFCTR_UCHE_2_HI 0x0000040d + +#define REG_A5XX_RBBM_PERFCTR_UCHE_3_LO 0x0000040e + +#define REG_A5XX_RBBM_PERFCTR_UCHE_3_HI 0x0000040f + +#define REG_A5XX_RBBM_PERFCTR_UCHE_4_LO 0x00000410 + +#define REG_A5XX_RBBM_PERFCTR_UCHE_4_HI 0x00000411 + +#define REG_A5XX_RBBM_PERFCTR_UCHE_5_LO 0x00000412 + +#define REG_A5XX_RBBM_PERFCTR_UCHE_5_HI 0x00000413 + +#define REG_A5XX_RBBM_PERFCTR_UCHE_6_LO 0x00000414 + +#define REG_A5XX_RBBM_PERFCTR_UCHE_6_HI 0x00000415 + +#define REG_A5XX_RBBM_PERFCTR_UCHE_7_LO 0x00000416 + +#define REG_A5XX_RBBM_PERFCTR_UCHE_7_HI 0x00000417 + +#define REG_A5XX_RBBM_PERFCTR_TP_0_LO 0x00000418 + +#define REG_A5XX_RBBM_PERFCTR_TP_0_HI 0x00000419 + +#define REG_A5XX_RBBM_PERFCTR_TP_1_LO 0x0000041a + +#define REG_A5XX_RBBM_PERFCTR_TP_1_HI 0x0000041b + +#define REG_A5XX_RBBM_PERFCTR_TP_2_LO 0x0000041c + +#define REG_A5XX_RBBM_PERFCTR_TP_2_HI 0x0000041d + +#define REG_A5XX_RBBM_PERFCTR_TP_3_LO 0x0000041e + +#define REG_A5XX_RBBM_PERFCTR_TP_3_HI 0x0000041f + +#define REG_A5XX_RBBM_PERFCTR_TP_4_LO 0x00000420 + +#define REG_A5XX_RBBM_PERFCTR_TP_4_HI 0x00000421 + +#define REG_A5XX_RBBM_PERFCTR_TP_5_LO 0x00000422 + +#define REG_A5XX_RBBM_PERFCTR_TP_5_HI 0x00000423 + +#define REG_A5XX_RBBM_PERFCTR_TP_6_LO 0x00000424 + +#define REG_A5XX_RBBM_PERFCTR_TP_6_HI 0x00000425 + +#define REG_A5XX_RBBM_PERFCTR_TP_7_LO 0x00000426 + +#define REG_A5XX_RBBM_PERFCTR_TP_7_HI 0x00000427 + +#define REG_A5XX_RBBM_PERFCTR_SP_0_LO 0x00000428 + +#define REG_A5XX_RBBM_PERFCTR_SP_0_HI 0x00000429 + +#define REG_A5XX_RBBM_PERFCTR_SP_1_LO 0x0000042a + +#define REG_A5XX_RBBM_PERFCTR_SP_1_HI 0x0000042b + +#define REG_A5XX_RBBM_PERFCTR_SP_2_LO 0x0000042c + +#define REG_A5XX_RBBM_PERFCTR_SP_2_HI 0x0000042d + +#define REG_A5XX_RBBM_PERFCTR_SP_3_LO 0x0000042e + +#define REG_A5XX_RBBM_PERFCTR_SP_3_HI 0x0000042f + +#define REG_A5XX_RBBM_PERFCTR_SP_4_LO 0x00000430 + +#define REG_A5XX_RBBM_PERFCTR_SP_4_HI 0x00000431 + +#define REG_A5XX_RBBM_PERFCTR_SP_5_LO 0x00000432 + +#define REG_A5XX_RBBM_PERFCTR_SP_5_HI 0x00000433 + +#define REG_A5XX_RBBM_PERFCTR_SP_6_LO 0x00000434 + +#define REG_A5XX_RBBM_PERFCTR_SP_6_HI 0x00000435 + +#define REG_A5XX_RBBM_PERFCTR_SP_7_LO 0x00000436 + +#define REG_A5XX_RBBM_PERFCTR_SP_7_HI 0x00000437 + +#define REG_A5XX_RBBM_PERFCTR_SP_8_LO 0x00000438 + +#define REG_A5XX_RBBM_PERFCTR_SP_8_HI 0x00000439 + +#define REG_A5XX_RBBM_PERFCTR_SP_9_LO 0x0000043a + +#define REG_A5XX_RBBM_PERFCTR_SP_9_HI 0x0000043b + +#define REG_A5XX_RBBM_PERFCTR_SP_10_LO 0x0000043c + +#define REG_A5XX_RBBM_PERFCTR_SP_10_HI 0x0000043d + +#define REG_A5XX_RBBM_PERFCTR_SP_11_LO 0x0000043e + +#define REG_A5XX_RBBM_PERFCTR_SP_11_HI 0x0000043f + +#define REG_A5XX_RBBM_PERFCTR_RB_0_LO 0x00000440 + +#define REG_A5XX_RBBM_PERFCTR_RB_0_HI 0x00000441 + +#define REG_A5XX_RBBM_PERFCTR_RB_1_LO 0x00000442 + +#define REG_A5XX_RBBM_PERFCTR_RB_1_HI 0x00000443 + +#define REG_A5XX_RBBM_PERFCTR_RB_2_LO 0x00000444 + +#define REG_A5XX_RBBM_PERFCTR_RB_2_HI 0x00000445 + +#define REG_A5XX_RBBM_PERFCTR_RB_3_LO 0x00000446 + +#define REG_A5XX_RBBM_PERFCTR_RB_3_HI 0x00000447 + +#define REG_A5XX_RBBM_PERFCTR_RB_4_LO 0x00000448 + +#define REG_A5XX_RBBM_PERFCTR_RB_4_HI 0x00000449 + +#define REG_A5XX_RBBM_PERFCTR_RB_5_LO 0x0000044a + +#define REG_A5XX_RBBM_PERFCTR_RB_5_HI 0x0000044b + +#define REG_A5XX_RBBM_PERFCTR_RB_6_LO 0x0000044c + +#define REG_A5XX_RBBM_PERFCTR_RB_6_HI 0x0000044d + +#define REG_A5XX_RBBM_PERFCTR_RB_7_LO 0x0000044e + +#define REG_A5XX_RBBM_PERFCTR_RB_7_HI 0x0000044f + +#define REG_A5XX_RBBM_PERFCTR_VSC_0_LO 0x00000450 + +#define REG_A5XX_RBBM_PERFCTR_VSC_0_HI 0x00000451 + +#define REG_A5XX_RBBM_PERFCTR_VSC_1_LO 0x00000452 + +#define REG_A5XX_RBBM_PERFCTR_VSC_1_HI 0x00000453 + +#define REG_A5XX_RBBM_PERFCTR_LRZ_0_LO 0x00000454 + +#define REG_A5XX_RBBM_PERFCTR_LRZ_0_HI 0x00000455 + +#define REG_A5XX_RBBM_PERFCTR_LRZ_1_LO 0x00000456 + +#define REG_A5XX_RBBM_PERFCTR_LRZ_1_HI 0x00000457 + +#define REG_A5XX_RBBM_PERFCTR_LRZ_2_LO 0x00000458 + +#define REG_A5XX_RBBM_PERFCTR_LRZ_2_HI 0x00000459 + +#define REG_A5XX_RBBM_PERFCTR_LRZ_3_LO 0x0000045a + +#define REG_A5XX_RBBM_PERFCTR_LRZ_3_HI 0x0000045b + +#define REG_A5XX_RBBM_PERFCTR_CMP_0_LO 0x0000045c + +#define REG_A5XX_RBBM_PERFCTR_CMP_0_HI 0x0000045d + +#define REG_A5XX_RBBM_PERFCTR_CMP_1_LO 0x0000045e + +#define REG_A5XX_RBBM_PERFCTR_CMP_1_HI 0x0000045f + +#define REG_A5XX_RBBM_PERFCTR_CMP_2_LO 0x00000460 + +#define REG_A5XX_RBBM_PERFCTR_CMP_2_HI 0x00000461 + +#define REG_A5XX_RBBM_PERFCTR_CMP_3_LO 0x00000462 + +#define REG_A5XX_RBBM_PERFCTR_CMP_3_HI 0x00000463 + +#define REG_A5XX_RBBM_PERFCTR_RBBM_SEL_0 0x0000046b + +#define REG_A5XX_RBBM_PERFCTR_RBBM_SEL_1 0x0000046c + +#define REG_A5XX_RBBM_PERFCTR_RBBM_SEL_2 0x0000046d + +#define REG_A5XX_RBBM_PERFCTR_RBBM_SEL_3 0x0000046e + +#define REG_A5XX_RBBM_ALWAYSON_COUNTER_LO 0x000004d2 + +#define REG_A5XX_RBBM_ALWAYSON_COUNTER_HI 0x000004d3 + +#define REG_A5XX_RBBM_STATUS 0x000004f5 +#define A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB 0x80000000 +#define A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB_CP 0x40000000 +#define A5XX_RBBM_STATUS_HLSQ_BUSY 0x20000000 +#define A5XX_RBBM_STATUS_VSC_BUSY 0x10000000 +#define A5XX_RBBM_STATUS_TPL1_BUSY 0x08000000 +#define A5XX_RBBM_STATUS_SP_BUSY 0x04000000 +#define A5XX_RBBM_STATUS_UCHE_BUSY 0x02000000 +#define A5XX_RBBM_STATUS_VPC_BUSY 0x01000000 +#define A5XX_RBBM_STATUS_VFDP_BUSY 0x00800000 +#define A5XX_RBBM_STATUS_VFD_BUSY 0x00400000 +#define A5XX_RBBM_STATUS_TESS_BUSY 0x00200000 +#define A5XX_RBBM_STATUS_PC_VSD_BUSY 0x00100000 +#define A5XX_RBBM_STATUS_PC_DCALL_BUSY 0x00080000 +#define A5XX_RBBM_STATUS_GPMU_SLAVE_BUSY 0x00040000 +#define A5XX_RBBM_STATUS_DCOM_BUSY 0x00020000 +#define A5XX_RBBM_STATUS_COM_BUSY 0x00010000 +#define A5XX_RBBM_STATUS_LRZ_BUZY 0x00008000 +#define A5XX_RBBM_STATUS_A2D_DSP_BUSY 0x00004000 +#define A5XX_RBBM_STATUS_CCUFCHE_BUSY 0x00002000 +#define A5XX_RBBM_STATUS_RB_BUSY 0x00001000 +#define A5XX_RBBM_STATUS_RAS_BUSY 0x00000800 +#define A5XX_RBBM_STATUS_TSE_BUSY 0x00000400 +#define A5XX_RBBM_STATUS_VBIF_BUSY 0x00000200 +#define A5XX_RBBM_STATUS_GPU_BUSY_IGN_AHB_HYST 0x00000100 +#define A5XX_RBBM_STATUS_CP_BUSY_IGN_HYST 0x00000080 +#define A5XX_RBBM_STATUS_CP_BUSY 0x00000040 +#define A5XX_RBBM_STATUS_GPMU_MASTER_BUSY 0x00000020 +#define A5XX_RBBM_STATUS_CP_CRASH_BUSY 0x00000010 +#define A5XX_RBBM_STATUS_CP_ETS_BUSY 0x00000008 +#define A5XX_RBBM_STATUS_CP_PFP_BUSY 0x00000004 +#define A5XX_RBBM_STATUS_CP_ME_BUSY 0x00000002 +#define A5XX_RBBM_STATUS_HI_BUSY 0x00000001 + +#define REG_A5XX_RBBM_STATUS3 0x00000530 + +#define REG_A5XX_RBBM_INT_0_STATUS 0x000004e1 + +#define REG_A5XX_RBBM_AHB_ME_SPLIT_STATUS 0x000004f0 + +#define REG_A5XX_RBBM_AHB_PFP_SPLIT_STATUS 0x000004f1 + +#define REG_A5XX_RBBM_AHB_ETS_SPLIT_STATUS 0x000004f3 + +#define REG_A5XX_RBBM_AHB_ERROR_STATUS 0x000004f4 + +#define REG_A5XX_RBBM_PERFCTR_CNTL 0x00000464 + +#define REG_A5XX_RBBM_PERFCTR_LOAD_CMD0 0x00000465 + +#define REG_A5XX_RBBM_PERFCTR_LOAD_CMD1 0x00000466 + +#define REG_A5XX_RBBM_PERFCTR_LOAD_CMD2 0x00000467 + +#define REG_A5XX_RBBM_PERFCTR_LOAD_CMD3 0x00000468 + +#define REG_A5XX_RBBM_PERFCTR_LOAD_VALUE_LO 0x00000469 + +#define REG_A5XX_RBBM_PERFCTR_LOAD_VALUE_HI 0x0000046a + +#define REG_A5XX_RBBM_PERFCTR_RBBM_SEL_0 0x0000046b + +#define REG_A5XX_RBBM_PERFCTR_RBBM_SEL_1 0x0000046c + +#define REG_A5XX_RBBM_PERFCTR_RBBM_SEL_2 0x0000046d + +#define REG_A5XX_RBBM_PERFCTR_RBBM_SEL_3 0x0000046e + +#define REG_A5XX_RBBM_PERFCTR_GPU_BUSY_MASKED 0x0000046f + +#define REG_A5XX_RBBM_AHB_ERROR 0x000004ed + +#define REG_A5XX_RBBM_CFG_DBGBUS_EVENT_LOGIC 0x00000504 + +#define REG_A5XX_RBBM_CFG_DBGBUS_OVER 0x00000505 + +#define REG_A5XX_RBBM_CFG_DBGBUS_COUNT0 0x00000506 + +#define REG_A5XX_RBBM_CFG_DBGBUS_COUNT1 0x00000507 + +#define REG_A5XX_RBBM_CFG_DBGBUS_COUNT2 0x00000508 + +#define REG_A5XX_RBBM_CFG_DBGBUS_COUNT3 0x00000509 + +#define REG_A5XX_RBBM_CFG_DBGBUS_COUNT4 0x0000050a + +#define REG_A5XX_RBBM_CFG_DBGBUS_COUNT5 0x0000050b + +#define REG_A5XX_RBBM_CFG_DBGBUS_TRACE_ADDR 0x0000050c + +#define REG_A5XX_RBBM_CFG_DBGBUS_TRACE_BUF0 0x0000050d + +#define REG_A5XX_RBBM_CFG_DBGBUS_TRACE_BUF1 0x0000050e + +#define REG_A5XX_RBBM_CFG_DBGBUS_TRACE_BUF2 0x0000050f + +#define REG_A5XX_RBBM_CFG_DBGBUS_TRACE_BUF3 0x00000510 + +#define REG_A5XX_RBBM_CFG_DBGBUS_TRACE_BUF4 0x00000511 + +#define REG_A5XX_RBBM_CFG_DBGBUS_MISR0 0x00000512 + +#define REG_A5XX_RBBM_CFG_DBGBUS_MISR1 0x00000513 + +#define REG_A5XX_RBBM_ISDB_CNT 0x00000533 + +#define REG_A5XX_RBBM_SECVID_TRUST_CONFIG 0x0000f000 + +#define REG_A5XX_RBBM_SECVID_TRUST_CNTL 0x0000f400 + +#define REG_A5XX_RBBM_SECVID_TSB_TRUSTED_BASE_LO 0x0000f800 + +#define REG_A5XX_RBBM_SECVID_TSB_TRUSTED_BASE_HI 0x0000f801 + +#define REG_A5XX_RBBM_SECVID_TSB_TRUSTED_SIZE 0x0000f802 + +#define REG_A5XX_RBBM_SECVID_TSB_CNTL 0x0000f803 + +#define REG_A5XX_RBBM_SECVID_TSB_COMP_STATUS_LO 0x0000f804 + +#define REG_A5XX_RBBM_SECVID_TSB_COMP_STATUS_HI 0x0000f805 + +#define REG_A5XX_RBBM_SECVID_TSB_UCHE_STATUS_LO 0x0000f806 + +#define REG_A5XX_RBBM_SECVID_TSB_UCHE_STATUS_HI 0x0000f807 + +#define REG_A5XX_RBBM_SECVID_TSB_ADDR_MODE_CNTL 0x0000f810 + +#define REG_A5XX_VSC_PIPE_DATA_LENGTH_0 0x00000c00 + +#define REG_A5XX_VSC_PERFCTR_VSC_SEL_0 0x00000c60 + +#define REG_A5XX_VSC_PERFCTR_VSC_SEL_1 0x00000c61 + +#define REG_A5XX_VSC_BIN_SIZE 0x00000cdd +#define A5XX_VSC_BIN_SIZE_WINDOW_OFFSET_DISABLE 0x80000000 +#define A5XX_VSC_BIN_SIZE_X__MASK 0x00007fff +#define A5XX_VSC_BIN_SIZE_X__SHIFT 0 +static inline uint32_t A5XX_VSC_BIN_SIZE_X(uint32_t val) +{ + return ((val) << A5XX_VSC_BIN_SIZE_X__SHIFT) & A5XX_VSC_BIN_SIZE_X__MASK; +} +#define A5XX_VSC_BIN_SIZE_Y__MASK 0x7fff0000 +#define A5XX_VSC_BIN_SIZE_Y__SHIFT 16 +static inline uint32_t A5XX_VSC_BIN_SIZE_Y(uint32_t val) +{ + return ((val) << A5XX_VSC_BIN_SIZE_Y__SHIFT) & A5XX_VSC_BIN_SIZE_Y__MASK; +} + +#define REG_A5XX_GRAS_ADDR_MODE_CNTL 0x00000c81 + +#define REG_A5XX_GRAS_PERFCTR_TSE_SEL_0 0x00000c90 + +#define REG_A5XX_GRAS_PERFCTR_TSE_SEL_1 0x00000c91 + +#define REG_A5XX_GRAS_PERFCTR_TSE_SEL_2 0x00000c92 + +#define REG_A5XX_GRAS_PERFCTR_TSE_SEL_3 0x00000c93 + +#define REG_A5XX_GRAS_PERFCTR_RAS_SEL_0 0x00000c94 + +#define REG_A5XX_GRAS_PERFCTR_RAS_SEL_1 0x00000c95 + +#define REG_A5XX_GRAS_PERFCTR_RAS_SEL_2 0x00000c96 + +#define REG_A5XX_GRAS_PERFCTR_RAS_SEL_3 0x00000c97 + +#define REG_A5XX_GRAS_PERFCTR_LRZ_SEL_0 0x00000c98 + +#define REG_A5XX_GRAS_PERFCTR_LRZ_SEL_1 0x00000c99 + +#define REG_A5XX_GRAS_PERFCTR_LRZ_SEL_2 0x00000c9a + +#define REG_A5XX_GRAS_PERFCTR_LRZ_SEL_3 0x00000c9b + +#define REG_A5XX_RB_DBG_ECO_CNTL 0x00000cc4 + +#define REG_A5XX_RB_ADDR_MODE_CNTL 0x00000cc5 + +#define REG_A5XX_RB_MODE_CNTL 0x00000cc6 + +#define REG_A5XX_RB_CCU_CNTL 0x00000cc7 + +#define REG_A5XX_RB_PERFCTR_RB_SEL_0 0x00000cd0 + +#define REG_A5XX_RB_PERFCTR_RB_SEL_1 0x00000cd1 + +#define REG_A5XX_RB_PERFCTR_RB_SEL_2 0x00000cd2 + +#define REG_A5XX_RB_PERFCTR_RB_SEL_3 0x00000cd3 + +#define REG_A5XX_RB_PERFCTR_RB_SEL_4 0x00000cd4 + +#define REG_A5XX_RB_PERFCTR_RB_SEL_5 0x00000cd5 + +#define REG_A5XX_RB_PERFCTR_RB_SEL_6 0x00000cd6 + +#define REG_A5XX_RB_PERFCTR_RB_SEL_7 0x00000cd7 + +#define REG_A5XX_RB_PERFCTR_CCU_SEL_0 0x00000cd8 + +#define REG_A5XX_RB_PERFCTR_CCU_SEL_1 0x00000cd9 + +#define REG_A5XX_RB_PERFCTR_CCU_SEL_2 0x00000cda + +#define REG_A5XX_RB_PERFCTR_CCU_SEL_3 0x00000cdb + +#define REG_A5XX_RB_POWERCTR_RB_SEL_0 0x00000ce0 + +#define REG_A5XX_RB_POWERCTR_RB_SEL_1 0x00000ce1 + +#define REG_A5XX_RB_POWERCTR_RB_SEL_2 0x00000ce2 + +#define REG_A5XX_RB_POWERCTR_RB_SEL_3 0x00000ce3 + +#define REG_A5XX_RB_POWERCTR_CCU_SEL_0 0x00000ce4 + +#define REG_A5XX_RB_POWERCTR_CCU_SEL_1 0x00000ce5 + +#define REG_A5XX_RB_PERFCTR_CMP_SEL_0 0x00000cec + +#define REG_A5XX_RB_PERFCTR_CMP_SEL_1 0x00000ced + +#define REG_A5XX_RB_PERFCTR_CMP_SEL_2 0x00000cee + +#define REG_A5XX_RB_PERFCTR_CMP_SEL_3 0x00000cef + +#define REG_A5XX_PC_DBG_ECO_CNTL 0x00000d00 +#define A5XX_PC_DBG_ECO_CNTL_TWOPASSUSEWFI 0x00000100 + +#define REG_A5XX_PC_ADDR_MODE_CNTL 0x00000d01 + +#define REG_A5XX_PC_MODE_CNTL 0x00000d02 + +#define REG_A5XX_UNKNOWN_0D08 0x00000d08 + +#define REG_A5XX_UNKNOWN_0D09 0x00000d09 + +#define REG_A5XX_PC_PERFCTR_PC_SEL_0 0x00000d10 + +#define REG_A5XX_PC_PERFCTR_PC_SEL_1 0x00000d11 + +#define REG_A5XX_PC_PERFCTR_PC_SEL_2 0x00000d12 + +#define REG_A5XX_PC_PERFCTR_PC_SEL_3 0x00000d13 + +#define REG_A5XX_PC_PERFCTR_PC_SEL_4 0x00000d14 + +#define REG_A5XX_PC_PERFCTR_PC_SEL_5 0x00000d15 + +#define REG_A5XX_PC_PERFCTR_PC_SEL_6 0x00000d16 + +#define REG_A5XX_PC_PERFCTR_PC_SEL_7 0x00000d17 + +#define REG_A5XX_HLSQ_TIMEOUT_THRESHOLD_0 0x00000e00 + +#define REG_A5XX_HLSQ_TIMEOUT_THRESHOLD_1 0x00000e01 + +#define REG_A5XX_HLSQ_ADDR_MODE_CNTL 0x00000e05 + +#define REG_A5XX_HLSQ_MODE_CNTL 0x00000e06 + +#define REG_A5XX_HLSQ_PERFCTR_HLSQ_SEL_0 0x00000e10 + +#define REG_A5XX_HLSQ_PERFCTR_HLSQ_SEL_1 0x00000e11 + +#define REG_A5XX_HLSQ_PERFCTR_HLSQ_SEL_2 0x00000e12 + +#define REG_A5XX_HLSQ_PERFCTR_HLSQ_SEL_3 0x00000e13 + +#define REG_A5XX_HLSQ_PERFCTR_HLSQ_SEL_4 0x00000e14 + +#define REG_A5XX_HLSQ_PERFCTR_HLSQ_SEL_5 0x00000e15 + +#define REG_A5XX_HLSQ_PERFCTR_HLSQ_SEL_6 0x00000e16 + +#define REG_A5XX_HLSQ_PERFCTR_HLSQ_SEL_7 0x00000e17 + +#define REG_A5XX_HLSQ_SPTP_RDSEL 0x00000f08 + +#define REG_A5XX_HLSQ_DBG_READ_SEL 0x0000bc00 + +#define REG_A5XX_HLSQ_DBG_AHB_READ_APERTURE 0x0000a000 + +#define REG_A5XX_VFD_ADDR_MODE_CNTL 0x00000e41 + +#define REG_A5XX_VFD_MODE_CNTL 0x00000e42 + +#define REG_A5XX_VFD_PERFCTR_VFD_SEL_0 0x00000e50 + +#define REG_A5XX_VFD_PERFCTR_VFD_SEL_1 0x00000e51 + +#define REG_A5XX_VFD_PERFCTR_VFD_SEL_2 0x00000e52 + +#define REG_A5XX_VFD_PERFCTR_VFD_SEL_3 0x00000e53 + +#define REG_A5XX_VFD_PERFCTR_VFD_SEL_4 0x00000e54 + +#define REG_A5XX_VFD_PERFCTR_VFD_SEL_5 0x00000e55 + +#define REG_A5XX_VFD_PERFCTR_VFD_SEL_6 0x00000e56 + +#define REG_A5XX_VFD_PERFCTR_VFD_SEL_7 0x00000e57 + +#define REG_A5XX_VPC_DBG_ECO_CNTL 0x00000e60 + +#define REG_A5XX_VPC_ADDR_MODE_CNTL 0x00000e61 + +#define REG_A5XX_VPC_MODE_CNTL 0x00000e62 + +#define REG_A5XX_VPC_PERFCTR_VPC_SEL_0 0x00000e64 + +#define REG_A5XX_VPC_PERFCTR_VPC_SEL_1 0x00000e65 + +#define REG_A5XX_VPC_PERFCTR_VPC_SEL_2 0x00000e66 + +#define REG_A5XX_VPC_PERFCTR_VPC_SEL_3 0x00000e67 + +#define REG_A5XX_UCHE_ADDR_MODE_CNTL 0x00000e80 + +#define REG_A5XX_UCHE_SVM_CNTL 0x00000e82 + +#define REG_A5XX_UCHE_WRITE_THRU_BASE_LO 0x00000e87 + +#define REG_A5XX_UCHE_WRITE_THRU_BASE_HI 0x00000e88 + +#define REG_A5XX_UCHE_TRAP_BASE_LO 0x00000e89 + +#define REG_A5XX_UCHE_TRAP_BASE_HI 0x00000e8a + +#define REG_A5XX_UCHE_GMEM_RANGE_MIN_LO 0x00000e8b + +#define REG_A5XX_UCHE_GMEM_RANGE_MIN_HI 0x00000e8c + +#define REG_A5XX_UCHE_GMEM_RANGE_MAX_LO 0x00000e8d + +#define REG_A5XX_UCHE_GMEM_RANGE_MAX_HI 0x00000e8e + +#define REG_A5XX_UCHE_DBG_ECO_CNTL_2 0x00000e8f + +#define REG_A5XX_UCHE_DBG_ECO_CNTL 0x00000e90 + +#define REG_A5XX_UCHE_CACHE_INVALIDATE_MIN_LO 0x00000e91 + +#define REG_A5XX_UCHE_CACHE_INVALIDATE_MIN_HI 0x00000e92 + +#define REG_A5XX_UCHE_CACHE_INVALIDATE_MAX_LO 0x00000e93 + +#define REG_A5XX_UCHE_CACHE_INVALIDATE_MAX_HI 0x00000e94 + +#define REG_A5XX_UCHE_CACHE_INVALIDATE 0x00000e95 + +#define REG_A5XX_UCHE_CACHE_WAYS 0x00000e96 + +#define REG_A5XX_UCHE_PERFCTR_UCHE_SEL_0 0x00000ea0 + +#define REG_A5XX_UCHE_PERFCTR_UCHE_SEL_1 0x00000ea1 + +#define REG_A5XX_UCHE_PERFCTR_UCHE_SEL_2 0x00000ea2 + +#define REG_A5XX_UCHE_PERFCTR_UCHE_SEL_3 0x00000ea3 + +#define REG_A5XX_UCHE_PERFCTR_UCHE_SEL_4 0x00000ea4 + +#define REG_A5XX_UCHE_PERFCTR_UCHE_SEL_5 0x00000ea5 + +#define REG_A5XX_UCHE_PERFCTR_UCHE_SEL_6 0x00000ea6 + +#define REG_A5XX_UCHE_PERFCTR_UCHE_SEL_7 0x00000ea7 + +#define REG_A5XX_UCHE_POWERCTR_UCHE_SEL_0 0x00000ea8 + +#define REG_A5XX_UCHE_POWERCTR_UCHE_SEL_1 0x00000ea9 + +#define REG_A5XX_UCHE_POWERCTR_UCHE_SEL_2 0x00000eaa + +#define REG_A5XX_UCHE_POWERCTR_UCHE_SEL_3 0x00000eab + +#define REG_A5XX_UCHE_TRAP_LOG_LO 0x00000eb1 + +#define REG_A5XX_UCHE_TRAP_LOG_HI 0x00000eb2 + +#define REG_A5XX_SP_DBG_ECO_CNTL 0x00000ec0 + +#define REG_A5XX_SP_ADDR_MODE_CNTL 0x00000ec1 + +#define REG_A5XX_SP_MODE_CNTL 0x00000ec2 + +#define REG_A5XX_SP_PERFCTR_SP_SEL_0 0x00000ed0 + +#define REG_A5XX_SP_PERFCTR_SP_SEL_1 0x00000ed1 + +#define REG_A5XX_SP_PERFCTR_SP_SEL_2 0x00000ed2 + +#define REG_A5XX_SP_PERFCTR_SP_SEL_3 0x00000ed3 + +#define REG_A5XX_SP_PERFCTR_SP_SEL_4 0x00000ed4 + +#define REG_A5XX_SP_PERFCTR_SP_SEL_5 0x00000ed5 + +#define REG_A5XX_SP_PERFCTR_SP_SEL_6 0x00000ed6 + +#define REG_A5XX_SP_PERFCTR_SP_SEL_7 0x00000ed7 + +#define REG_A5XX_SP_PERFCTR_SP_SEL_8 0x00000ed8 + +#define REG_A5XX_SP_PERFCTR_SP_SEL_9 0x00000ed9 + +#define REG_A5XX_SP_PERFCTR_SP_SEL_10 0x00000eda + +#define REG_A5XX_SP_PERFCTR_SP_SEL_11 0x00000edb + +#define REG_A5XX_SP_POWERCTR_SP_SEL_0 0x00000edc + +#define REG_A5XX_SP_POWERCTR_SP_SEL_1 0x00000edd + +#define REG_A5XX_SP_POWERCTR_SP_SEL_2 0x00000ede + +#define REG_A5XX_SP_POWERCTR_SP_SEL_3 0x00000edf + +#define REG_A5XX_TPL1_ADDR_MODE_CNTL 0x00000f01 + +#define REG_A5XX_TPL1_MODE_CNTL 0x00000f02 + +#define REG_A5XX_TPL1_PERFCTR_TP_SEL_0 0x00000f10 + +#define REG_A5XX_TPL1_PERFCTR_TP_SEL_1 0x00000f11 + +#define REG_A5XX_TPL1_PERFCTR_TP_SEL_2 0x00000f12 + +#define REG_A5XX_TPL1_PERFCTR_TP_SEL_3 0x00000f13 + +#define REG_A5XX_TPL1_PERFCTR_TP_SEL_4 0x00000f14 + +#define REG_A5XX_TPL1_PERFCTR_TP_SEL_5 0x00000f15 + +#define REG_A5XX_TPL1_PERFCTR_TP_SEL_6 0x00000f16 + +#define REG_A5XX_TPL1_PERFCTR_TP_SEL_7 0x00000f17 + +#define REG_A5XX_TPL1_POWERCTR_TP_SEL_0 0x00000f18 + +#define REG_A5XX_TPL1_POWERCTR_TP_SEL_1 0x00000f19 + +#define REG_A5XX_TPL1_POWERCTR_TP_SEL_2 0x00000f1a + +#define REG_A5XX_TPL1_POWERCTR_TP_SEL_3 0x00000f1b + +#define REG_A5XX_VBIF_VERSION 0x00003000 + +#define REG_A5XX_VBIF_CLKON 0x00003001 + +#define REG_A5XX_VBIF_ABIT_SORT 0x00003028 + +#define REG_A5XX_VBIF_ABIT_SORT_CONF 0x00003029 + +#define REG_A5XX_VBIF_ROUND_ROBIN_QOS_ARB 0x00003049 + +#define REG_A5XX_VBIF_GATE_OFF_WRREQ_EN 0x0000302a + +#define REG_A5XX_VBIF_IN_RD_LIM_CONF0 0x0000302c + +#define REG_A5XX_VBIF_IN_RD_LIM_CONF1 0x0000302d + +#define REG_A5XX_VBIF_XIN_HALT_CTRL0 0x00003080 + +#define REG_A5XX_VBIF_XIN_HALT_CTRL1 0x00003081 + +#define REG_A5XX_VBIF_TEST_BUS_OUT_CTRL 0x00003084 + +#define REG_A5XX_VBIF_TEST_BUS1_CTRL0 0x00003085 + +#define REG_A5XX_VBIF_TEST_BUS1_CTRL1 0x00003086 + +#define REG_A5XX_VBIF_TEST_BUS2_CTRL0 0x00003087 + +#define REG_A5XX_VBIF_TEST_BUS2_CTRL1 0x00003088 + +#define REG_A5XX_VBIF_TEST_BUS_OUT 0x0000308c + +#define REG_A5XX_VBIF_PERF_CNT_SEL0 0x000030d0 + +#define REG_A5XX_VBIF_PERF_CNT_SEL1 0x000030d1 + +#define REG_A5XX_VBIF_PERF_CNT_SEL2 0x000030d2 + +#define REG_A5XX_VBIF_PERF_CNT_SEL3 0x000030d3 + +#define REG_A5XX_VBIF_PERF_CNT_LOW0 0x000030d8 + +#define REG_A5XX_VBIF_PERF_CNT_LOW1 0x000030d9 + +#define REG_A5XX_VBIF_PERF_CNT_LOW2 0x000030da + +#define REG_A5XX_VBIF_PERF_CNT_LOW3 0x000030db + +#define REG_A5XX_VBIF_PERF_CNT_HIGH0 0x000030e0 + +#define REG_A5XX_VBIF_PERF_CNT_HIGH1 0x000030e1 + +#define REG_A5XX_VBIF_PERF_CNT_HIGH2 0x000030e2 + +#define REG_A5XX_VBIF_PERF_CNT_HIGH3 0x000030e3 + +#define REG_A5XX_VBIF_PERF_PWR_CNT_EN0 0x00003100 + +#define REG_A5XX_VBIF_PERF_PWR_CNT_EN1 0x00003101 + +#define REG_A5XX_VBIF_PERF_PWR_CNT_EN2 0x00003102 + +#define REG_A5XX_VBIF_PERF_PWR_CNT_LOW0 0x00003110 + +#define REG_A5XX_VBIF_PERF_PWR_CNT_LOW1 0x00003111 + +#define REG_A5XX_VBIF_PERF_PWR_CNT_LOW2 0x00003112 + +#define REG_A5XX_VBIF_PERF_PWR_CNT_HIGH0 0x00003118 + +#define REG_A5XX_VBIF_PERF_PWR_CNT_HIGH1 0x00003119 + +#define REG_A5XX_VBIF_PERF_PWR_CNT_HIGH2 0x0000311a + +#define REG_A5XX_GPMU_INST_RAM_BASE 0x00008800 + +#define REG_A5XX_GPMU_DATA_RAM_BASE 0x00009800 + +#define REG_A5XX_GPMU_SP_POWER_CNTL 0x0000a881 + +#define REG_A5XX_GPMU_RBCCU_CLOCK_CNTL 0x0000a886 + +#define REG_A5XX_GPMU_RBCCU_POWER_CNTL 0x0000a887 + +#define REG_A5XX_GPMU_SP_PWR_CLK_STATUS 0x0000a88b +#define A5XX_GPMU_SP_PWR_CLK_STATUS_PWR_ON 0x00100000 + +#define REG_A5XX_GPMU_RBCCU_PWR_CLK_STATUS 0x0000a88d +#define A5XX_GPMU_RBCCU_PWR_CLK_STATUS_PWR_ON 0x00100000 + +#define REG_A5XX_GPMU_PWR_COL_STAGGER_DELAY 0x0000a891 + +#define REG_A5XX_GPMU_PWR_COL_INTER_FRAME_CTRL 0x0000a892 + +#define REG_A5XX_GPMU_PWR_COL_INTER_FRAME_HYST 0x0000a893 + +#define REG_A5XX_GPMU_PWR_COL_BINNING_CTRL 0x0000a894 + +#define REG_A5XX_GPMU_CLOCK_THROTTLE_CTRL 0x0000a8a3 + +#define REG_A5XX_GPMU_WFI_CONFIG 0x0000a8c1 + +#define REG_A5XX_GPMU_RBBM_INTR_INFO 0x0000a8d6 + +#define REG_A5XX_GPMU_CM3_SYSRESET 0x0000a8d8 + +#define REG_A5XX_GPMU_GENERAL_0 0x0000a8e0 + +#define REG_A5XX_GPMU_GENERAL_1 0x0000a8e1 + +#define REG_A5XX_SP_POWER_COUNTER_0_LO 0x0000a840 + +#define REG_A5XX_SP_POWER_COUNTER_0_HI 0x0000a841 + +#define REG_A5XX_SP_POWER_COUNTER_1_LO 0x0000a842 + +#define REG_A5XX_SP_POWER_COUNTER_1_HI 0x0000a843 + +#define REG_A5XX_SP_POWER_COUNTER_2_LO 0x0000a844 + +#define REG_A5XX_SP_POWER_COUNTER_2_HI 0x0000a845 + +#define REG_A5XX_SP_POWER_COUNTER_3_LO 0x0000a846 + +#define REG_A5XX_SP_POWER_COUNTER_3_HI 0x0000a847 + +#define REG_A5XX_TP_POWER_COUNTER_0_LO 0x0000a848 + +#define REG_A5XX_TP_POWER_COUNTER_0_HI 0x0000a849 + +#define REG_A5XX_TP_POWER_COUNTER_1_LO 0x0000a84a + +#define REG_A5XX_TP_POWER_COUNTER_1_HI 0x0000a84b + +#define REG_A5XX_TP_POWER_COUNTER_2_LO 0x0000a84c + +#define REG_A5XX_TP_POWER_COUNTER_2_HI 0x0000a84d + +#define REG_A5XX_TP_POWER_COUNTER_3_LO 0x0000a84e + +#define REG_A5XX_TP_POWER_COUNTER_3_HI 0x0000a84f + +#define REG_A5XX_RB_POWER_COUNTER_0_LO 0x0000a850 + +#define REG_A5XX_RB_POWER_COUNTER_0_HI 0x0000a851 + +#define REG_A5XX_RB_POWER_COUNTER_1_LO 0x0000a852 + +#define REG_A5XX_RB_POWER_COUNTER_1_HI 0x0000a853 + +#define REG_A5XX_RB_POWER_COUNTER_2_LO 0x0000a854 + +#define REG_A5XX_RB_POWER_COUNTER_2_HI 0x0000a855 + +#define REG_A5XX_RB_POWER_COUNTER_3_LO 0x0000a856 + +#define REG_A5XX_RB_POWER_COUNTER_3_HI 0x0000a857 + +#define REG_A5XX_CCU_POWER_COUNTER_0_LO 0x0000a858 + +#define REG_A5XX_CCU_POWER_COUNTER_0_HI 0x0000a859 + +#define REG_A5XX_CCU_POWER_COUNTER_1_LO 0x0000a85a + +#define REG_A5XX_CCU_POWER_COUNTER_1_HI 0x0000a85b + +#define REG_A5XX_UCHE_POWER_COUNTER_0_LO 0x0000a85c + +#define REG_A5XX_UCHE_POWER_COUNTER_0_HI 0x0000a85d + +#define REG_A5XX_UCHE_POWER_COUNTER_1_LO 0x0000a85e + +#define REG_A5XX_UCHE_POWER_COUNTER_1_HI 0x0000a85f + +#define REG_A5XX_UCHE_POWER_COUNTER_2_LO 0x0000a860 + +#define REG_A5XX_UCHE_POWER_COUNTER_2_HI 0x0000a861 + +#define REG_A5XX_UCHE_POWER_COUNTER_3_LO 0x0000a862 + +#define REG_A5XX_UCHE_POWER_COUNTER_3_HI 0x0000a863 + +#define REG_A5XX_CP_POWER_COUNTER_0_LO 0x0000a864 + +#define REG_A5XX_CP_POWER_COUNTER_0_HI 0x0000a865 + +#define REG_A5XX_CP_POWER_COUNTER_1_LO 0x0000a866 + +#define REG_A5XX_CP_POWER_COUNTER_1_HI 0x0000a867 + +#define REG_A5XX_CP_POWER_COUNTER_2_LO 0x0000a868 + +#define REG_A5XX_CP_POWER_COUNTER_2_HI 0x0000a869 + +#define REG_A5XX_CP_POWER_COUNTER_3_LO 0x0000a86a + +#define REG_A5XX_CP_POWER_COUNTER_3_HI 0x0000a86b + +#define REG_A5XX_GPMU_POWER_COUNTER_0_LO 0x0000a86c + +#define REG_A5XX_GPMU_POWER_COUNTER_0_HI 0x0000a86d + +#define REG_A5XX_GPMU_POWER_COUNTER_1_LO 0x0000a86e + +#define REG_A5XX_GPMU_POWER_COUNTER_1_HI 0x0000a86f + +#define REG_A5XX_GPMU_POWER_COUNTER_2_LO 0x0000a870 + +#define REG_A5XX_GPMU_POWER_COUNTER_2_HI 0x0000a871 + +#define REG_A5XX_GPMU_POWER_COUNTER_3_LO 0x0000a872 + +#define REG_A5XX_GPMU_POWER_COUNTER_3_HI 0x0000a873 + +#define REG_A5XX_GPMU_POWER_COUNTER_4_LO 0x0000a874 + +#define REG_A5XX_GPMU_POWER_COUNTER_4_HI 0x0000a875 + +#define REG_A5XX_GPMU_POWER_COUNTER_5_LO 0x0000a876 + +#define REG_A5XX_GPMU_POWER_COUNTER_5_HI 0x0000a877 + +#define REG_A5XX_GPMU_POWER_COUNTER_ENABLE 0x0000a878 + +#define REG_A5XX_GPMU_ALWAYS_ON_COUNTER_LO 0x0000a879 + +#define REG_A5XX_GPMU_ALWAYS_ON_COUNTER_HI 0x0000a87a + +#define REG_A5XX_GPMU_ALWAYS_ON_COUNTER_RESET 0x0000a87b + +#define REG_A5XX_GPMU_POWER_COUNTER_SELECT_0 0x0000a87c + +#define REG_A5XX_GPMU_POWER_COUNTER_SELECT_1 0x0000a87d + +#define REG_A5XX_GPMU_CLOCK_THROTTLE_CTRL 0x0000a8a3 + +#define REG_A5XX_GPMU_THROTTLE_UNMASK_FORCE_CTRL 0x0000a8a8 + +#define REG_A5XX_GPMU_TEMP_SENSOR_ID 0x0000ac00 + +#define REG_A5XX_GPMU_TEMP_SENSOR_CONFIG 0x0000ac01 + +#define REG_A5XX_GPMU_TEMP_VAL 0x0000ac02 + +#define REG_A5XX_GPMU_DELTA_TEMP_THRESHOLD 0x0000ac03 + +#define REG_A5XX_GPMU_TEMP_THRESHOLD_INTR_STATUS 0x0000ac05 + +#define REG_A5XX_GPMU_TEMP_THRESHOLD_INTR_EN_MASK 0x0000ac06 + +#define REG_A5XX_GPMU_LEAKAGE_TEMP_COEFF_0_1 0x0000ac40 + +#define REG_A5XX_GPMU_LEAKAGE_TEMP_COEFF_2_3 0x0000ac41 + +#define REG_A5XX_GPMU_LEAKAGE_VTG_COEFF_0_1 0x0000ac42 + +#define REG_A5XX_GPMU_LEAKAGE_VTG_COEFF_2_3 0x0000ac43 + +#define REG_A5XX_GPMU_BASE_LEAKAGE 0x0000ac46 + +#define REG_A5XX_GPMU_GPMU_VOLTAGE 0x0000ac60 + +#define REG_A5XX_GPMU_GPMU_VOLTAGE_INTR_STATUS 0x0000ac61 + +#define REG_A5XX_GPMU_GPMU_VOLTAGE_INTR_EN_MASK 0x0000ac62 + +#define REG_A5XX_GPMU_GPMU_PWR_THRESHOLD 0x0000ac80 + +#define REG_A5XX_GPMU_GPMU_LLM_GLM_SLEEP_CTRL 0x0000acc4 + +#define REG_A5XX_GPMU_GPMU_LLM_GLM_SLEEP_STATUS 0x0000acc5 + +#define REG_A5XX_GDPM_CONFIG1 0x0000b80c + +#define REG_A5XX_GDPM_CONFIG2 0x0000b80d + +#define REG_A5XX_GDPM_INT_EN 0x0000b80f + +#define REG_A5XX_GDPM_INT_MASK 0x0000b811 + +#define REG_A5XX_GPMU_BEC_ENABLE 0x0000b9a0 + +#define REG_A5XX_GPU_CS_SENSOR_GENERAL_STATUS 0x0000c41a + +#define REG_A5XX_GPU_CS_AMP_CALIBRATION_STATUS1_0 0x0000c41d + +#define REG_A5XX_GPU_CS_AMP_CALIBRATION_STATUS1_2 0x0000c41f + +#define REG_A5XX_GPU_CS_AMP_CALIBRATION_STATUS1_4 0x0000c421 + +#define REG_A5XX_GPU_CS_ENABLE_REG 0x0000c520 + +#define REG_A5XX_GPU_CS_AMP_CALIBRATION_CONTROL1 0x0000c557 + +#define REG_A5XX_GRAS_CL_CNTL 0x0000e000 + +#define REG_A5XX_UNKNOWN_E001 0x0000e001 + +#define REG_A5XX_UNKNOWN_E004 0x0000e004 + +#define REG_A5XX_GRAS_CNTL 0x0000e005 +#define A5XX_GRAS_CNTL_VARYING 0x00000001 +#define A5XX_GRAS_CNTL_UNK3 0x00000008 +#define A5XX_GRAS_CNTL_XCOORD 0x00000040 +#define A5XX_GRAS_CNTL_YCOORD 0x00000080 +#define A5XX_GRAS_CNTL_ZCOORD 0x00000100 +#define A5XX_GRAS_CNTL_WCOORD 0x00000200 + +#define REG_A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ 0x0000e006 +#define A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HORZ__MASK 0x000003ff +#define A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HORZ__SHIFT 0 +static inline uint32_t A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HORZ(uint32_t val) +{ + return ((val) << A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HORZ__SHIFT) & A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HORZ__MASK; +} +#define A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VERT__MASK 0x000ffc00 +#define A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VERT__SHIFT 10 +static inline uint32_t A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VERT(uint32_t val) +{ + return ((val) << A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VERT__SHIFT) & A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VERT__MASK; +} + +#define REG_A5XX_GRAS_CL_VPORT_XOFFSET_0 0x0000e010 +#define A5XX_GRAS_CL_VPORT_XOFFSET_0__MASK 0xffffffff +#define A5XX_GRAS_CL_VPORT_XOFFSET_0__SHIFT 0 +static inline uint32_t A5XX_GRAS_CL_VPORT_XOFFSET_0(float val) +{ + return ((fui(val)) << A5XX_GRAS_CL_VPORT_XOFFSET_0__SHIFT) & A5XX_GRAS_CL_VPORT_XOFFSET_0__MASK; +} + +#define REG_A5XX_GRAS_CL_VPORT_XSCALE_0 0x0000e011 +#define A5XX_GRAS_CL_VPORT_XSCALE_0__MASK 0xffffffff +#define A5XX_GRAS_CL_VPORT_XSCALE_0__SHIFT 0 +static inline uint32_t A5XX_GRAS_CL_VPORT_XSCALE_0(float val) +{ + return ((fui(val)) << A5XX_GRAS_CL_VPORT_XSCALE_0__SHIFT) & A5XX_GRAS_CL_VPORT_XSCALE_0__MASK; +} + +#define REG_A5XX_GRAS_CL_VPORT_YOFFSET_0 0x0000e012 +#define A5XX_GRAS_CL_VPORT_YOFFSET_0__MASK 0xffffffff +#define A5XX_GRAS_CL_VPORT_YOFFSET_0__SHIFT 0 +static inline uint32_t A5XX_GRAS_CL_VPORT_YOFFSET_0(float val) +{ + return ((fui(val)) << A5XX_GRAS_CL_VPORT_YOFFSET_0__SHIFT) & A5XX_GRAS_CL_VPORT_YOFFSET_0__MASK; +} + +#define REG_A5XX_GRAS_CL_VPORT_YSCALE_0 0x0000e013 +#define A5XX_GRAS_CL_VPORT_YSCALE_0__MASK 0xffffffff +#define A5XX_GRAS_CL_VPORT_YSCALE_0__SHIFT 0 +static inline uint32_t A5XX_GRAS_CL_VPORT_YSCALE_0(float val) +{ + return ((fui(val)) << A5XX_GRAS_CL_VPORT_YSCALE_0__SHIFT) & A5XX_GRAS_CL_VPORT_YSCALE_0__MASK; +} + +#define REG_A5XX_GRAS_CL_VPORT_ZOFFSET_0 0x0000e014 +#define A5XX_GRAS_CL_VPORT_ZOFFSET_0__MASK 0xffffffff +#define A5XX_GRAS_CL_VPORT_ZOFFSET_0__SHIFT 0 +static inline uint32_t A5XX_GRAS_CL_VPORT_ZOFFSET_0(float val) +{ + return ((fui(val)) << A5XX_GRAS_CL_VPORT_ZOFFSET_0__SHIFT) & A5XX_GRAS_CL_VPORT_ZOFFSET_0__MASK; +} + +#define REG_A5XX_GRAS_CL_VPORT_ZSCALE_0 0x0000e015 +#define A5XX_GRAS_CL_VPORT_ZSCALE_0__MASK 0xffffffff +#define A5XX_GRAS_CL_VPORT_ZSCALE_0__SHIFT 0 +static inline uint32_t A5XX_GRAS_CL_VPORT_ZSCALE_0(float val) +{ + return ((fui(val)) << A5XX_GRAS_CL_VPORT_ZSCALE_0__SHIFT) & A5XX_GRAS_CL_VPORT_ZSCALE_0__MASK; +} + +#define REG_A5XX_GRAS_SU_CNTL 0x0000e090 +#define A5XX_GRAS_SU_CNTL_CULL_FRONT 0x00000001 +#define A5XX_GRAS_SU_CNTL_CULL_BACK 0x00000002 +#define A5XX_GRAS_SU_CNTL_FRONT_CW 0x00000004 +#define A5XX_GRAS_SU_CNTL_LINEHALFWIDTH__MASK 0x000007f8 +#define A5XX_GRAS_SU_CNTL_LINEHALFWIDTH__SHIFT 3 +static inline uint32_t A5XX_GRAS_SU_CNTL_LINEHALFWIDTH(float val) +{ + return ((((int32_t)(val * 4.0))) << A5XX_GRAS_SU_CNTL_LINEHALFWIDTH__SHIFT) & A5XX_GRAS_SU_CNTL_LINEHALFWIDTH__MASK; +} +#define A5XX_GRAS_SU_CNTL_POLY_OFFSET 0x00000800 +#define A5XX_GRAS_SU_CNTL_MSAA_ENABLE 0x00002000 + +#define REG_A5XX_GRAS_SU_POINT_MINMAX 0x0000e091 +#define A5XX_GRAS_SU_POINT_MINMAX_MIN__MASK 0x0000ffff +#define A5XX_GRAS_SU_POINT_MINMAX_MIN__SHIFT 0 +static inline uint32_t A5XX_GRAS_SU_POINT_MINMAX_MIN(float val) +{ + return ((((uint32_t)(val * 16.0))) << A5XX_GRAS_SU_POINT_MINMAX_MIN__SHIFT) & A5XX_GRAS_SU_POINT_MINMAX_MIN__MASK; +} +#define A5XX_GRAS_SU_POINT_MINMAX_MAX__MASK 0xffff0000 +#define A5XX_GRAS_SU_POINT_MINMAX_MAX__SHIFT 16 +static inline uint32_t A5XX_GRAS_SU_POINT_MINMAX_MAX(float val) +{ + return ((((uint32_t)(val * 16.0))) << A5XX_GRAS_SU_POINT_MINMAX_MAX__SHIFT) & A5XX_GRAS_SU_POINT_MINMAX_MAX__MASK; +} + +#define REG_A5XX_GRAS_SU_POINT_SIZE 0x0000e092 +#define A5XX_GRAS_SU_POINT_SIZE__MASK 0xffffffff +#define A5XX_GRAS_SU_POINT_SIZE__SHIFT 0 +static inline uint32_t A5XX_GRAS_SU_POINT_SIZE(float val) +{ + return ((((int32_t)(val * 16.0))) << A5XX_GRAS_SU_POINT_SIZE__SHIFT) & A5XX_GRAS_SU_POINT_SIZE__MASK; +} + +#define REG_A5XX_UNKNOWN_E093 0x0000e093 + +#define REG_A5XX_GRAS_SU_DEPTH_PLANE_CNTL 0x0000e094 +#define A5XX_GRAS_SU_DEPTH_PLANE_CNTL_FRAG_WRITES_Z 0x00000001 +#define A5XX_GRAS_SU_DEPTH_PLANE_CNTL_UNK1 0x00000002 + +#define REG_A5XX_GRAS_SU_POLY_OFFSET_SCALE 0x0000e095 +#define A5XX_GRAS_SU_POLY_OFFSET_SCALE__MASK 0xffffffff +#define A5XX_GRAS_SU_POLY_OFFSET_SCALE__SHIFT 0 +static inline uint32_t A5XX_GRAS_SU_POLY_OFFSET_SCALE(float val) +{ + return ((fui(val)) << A5XX_GRAS_SU_POLY_OFFSET_SCALE__SHIFT) & A5XX_GRAS_SU_POLY_OFFSET_SCALE__MASK; +} + +#define REG_A5XX_GRAS_SU_POLY_OFFSET_OFFSET 0x0000e096 +#define A5XX_GRAS_SU_POLY_OFFSET_OFFSET__MASK 0xffffffff +#define A5XX_GRAS_SU_POLY_OFFSET_OFFSET__SHIFT 0 +static inline uint32_t A5XX_GRAS_SU_POLY_OFFSET_OFFSET(float val) +{ + return ((fui(val)) << A5XX_GRAS_SU_POLY_OFFSET_OFFSET__SHIFT) & A5XX_GRAS_SU_POLY_OFFSET_OFFSET__MASK; +} + +#define REG_A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP 0x0000e097 +#define A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP__MASK 0xffffffff +#define A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP__SHIFT 0 +static inline uint32_t A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP(float val) +{ + return ((fui(val)) << A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP__SHIFT) & A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP__MASK; +} + +#define REG_A5XX_GRAS_SU_DEPTH_BUFFER_INFO 0x0000e098 +#define A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT__MASK 0x00000007 +#define A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT__SHIFT 0 +static inline uint32_t A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT(enum a5xx_depth_format val) +{ + return ((val) << A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT__SHIFT) & A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT__MASK; +} + +#define REG_A5XX_GRAS_SU_CONSERVATIVE_RAS_CNTL 0x0000e099 + +#define REG_A5XX_GRAS_SC_CNTL 0x0000e0a0 +#define A5XX_GRAS_SC_CNTL_SAMPLES_PASSED 0x00008000 + +#define REG_A5XX_GRAS_SC_BIN_CNTL 0x0000e0a1 + +#define REG_A5XX_GRAS_SC_RAS_MSAA_CNTL 0x0000e0a2 +#define A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES__MASK 0x00000003 +#define A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES__SHIFT 0 +static inline uint32_t A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val) +{ + return ((val) << A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES__MASK; +} + +#define REG_A5XX_GRAS_SC_DEST_MSAA_CNTL 0x0000e0a3 +#define A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES__MASK 0x00000003 +#define A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES__SHIFT 0 +static inline uint32_t A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val) +{ + return ((val) << A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES__MASK; +} +#define A5XX_GRAS_SC_DEST_MSAA_CNTL_MSAA_DISABLE 0x00000004 + +#define REG_A5XX_GRAS_SC_SCREEN_SCISSOR_CNTL 0x0000e0a4 + +#define REG_A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0 0x0000e0aa +#define A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_WINDOW_OFFSET_DISABLE 0x80000000 +#define A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X__MASK 0x00007fff +#define A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X__SHIFT 0 +static inline uint32_t A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X(uint32_t val) +{ + return ((val) << A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X__SHIFT) & A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X__MASK; +} +#define A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y__MASK 0x7fff0000 +#define A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y__SHIFT 16 +static inline uint32_t A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y(uint32_t val) +{ + return ((val) << A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y__SHIFT) & A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y__MASK; +} + +#define REG_A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0 0x0000e0ab +#define A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_WINDOW_OFFSET_DISABLE 0x80000000 +#define A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X__MASK 0x00007fff +#define A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X__SHIFT 0 +static inline uint32_t A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X(uint32_t val) +{ + return ((val) << A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X__SHIFT) & A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X__MASK; +} +#define A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y__MASK 0x7fff0000 +#define A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y__SHIFT 16 +static inline uint32_t A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y(uint32_t val) +{ + return ((val) << A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y__SHIFT) & A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y__MASK; +} + +#define REG_A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0 0x0000e0ca +#define A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_WINDOW_OFFSET_DISABLE 0x80000000 +#define A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X__MASK 0x00007fff +#define A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X__SHIFT 0 +static inline uint32_t A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X(uint32_t val) +{ + return ((val) << A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X__SHIFT) & A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X__MASK; +} +#define A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y__MASK 0x7fff0000 +#define A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y__SHIFT 16 +static inline uint32_t A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y(uint32_t val) +{ + return ((val) << A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y__SHIFT) & A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y__MASK; +} + +#define REG_A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0 0x0000e0cb +#define A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_WINDOW_OFFSET_DISABLE 0x80000000 +#define A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_X__MASK 0x00007fff +#define A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_X__SHIFT 0 +static inline uint32_t A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_X(uint32_t val) +{ + return ((val) << A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_X__SHIFT) & A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_X__MASK; +} +#define A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_Y__MASK 0x7fff0000 +#define A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_Y__SHIFT 16 +static inline uint32_t A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_Y(uint32_t val) +{ + return ((val) << A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_Y__SHIFT) & A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_Y__MASK; +} + +#define REG_A5XX_GRAS_SC_WINDOW_SCISSOR_TL 0x0000e0ea +#define A5XX_GRAS_SC_WINDOW_SCISSOR_TL_WINDOW_OFFSET_DISABLE 0x80000000 +#define A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X__MASK 0x00007fff +#define A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X__SHIFT 0 +static inline uint32_t A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X(uint32_t val) +{ + return ((val) << A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X__SHIFT) & A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X__MASK; +} +#define A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__MASK 0x7fff0000 +#define A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__SHIFT 16 +static inline uint32_t A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y(uint32_t val) +{ + return ((val) << A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__SHIFT) & A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__MASK; +} + +#define REG_A5XX_GRAS_SC_WINDOW_SCISSOR_BR 0x0000e0eb +#define A5XX_GRAS_SC_WINDOW_SCISSOR_BR_WINDOW_OFFSET_DISABLE 0x80000000 +#define A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X__MASK 0x00007fff +#define A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X__SHIFT 0 +static inline uint32_t A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X(uint32_t val) +{ + return ((val) << A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X__SHIFT) & A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X__MASK; +} +#define A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__MASK 0x7fff0000 +#define A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__SHIFT 16 +static inline uint32_t A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y(uint32_t val) +{ + return ((val) << A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__SHIFT) & A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__MASK; +} + +#define REG_A5XX_GRAS_LRZ_CNTL 0x0000e100 + +#define REG_A5XX_GRAS_LRZ_BUFFER_BASE_LO 0x0000e101 + +#define REG_A5XX_GRAS_LRZ_BUFFER_BASE_HI 0x0000e102 + +#define REG_A5XX_GRAS_LRZ_BUFFER_PITCH 0x0000e103 + +#define REG_A5XX_GRAS_LRZ_FAST_CLEAR_BUFFER_BASE_LO 0x0000e104 + +#define REG_A5XX_GRAS_LRZ_FAST_CLEAR_BUFFER_BASE_HI 0x0000e105 + +#define REG_A5XX_RB_CNTL 0x0000e140 +#define A5XX_RB_CNTL_WIDTH__MASK 0x000000ff +#define A5XX_RB_CNTL_WIDTH__SHIFT 0 +static inline uint32_t A5XX_RB_CNTL_WIDTH(uint32_t val) +{ + assert(!(val & 0x1f)); + return ((val >> 5) << A5XX_RB_CNTL_WIDTH__SHIFT) & A5XX_RB_CNTL_WIDTH__MASK; +} +#define A5XX_RB_CNTL_HEIGHT__MASK 0x0001fe00 +#define A5XX_RB_CNTL_HEIGHT__SHIFT 9 +static inline uint32_t A5XX_RB_CNTL_HEIGHT(uint32_t val) +{ + assert(!(val & 0x1f)); + return ((val >> 5) << A5XX_RB_CNTL_HEIGHT__SHIFT) & A5XX_RB_CNTL_HEIGHT__MASK; +} +#define A5XX_RB_CNTL_BYPASS 0x00020000 + +#define REG_A5XX_RB_RENDER_CNTL 0x0000e141 +#define A5XX_RB_RENDER_CNTL_SAMPLES_PASSED 0x00000040 +#define A5XX_RB_RENDER_CNTL_FLAG_DEPTH 0x00004000 +#define A5XX_RB_RENDER_CNTL_FLAG_DEPTH2 0x00008000 +#define A5XX_RB_RENDER_CNTL_FLAG_MRTS__MASK 0x00ff0000 +#define A5XX_RB_RENDER_CNTL_FLAG_MRTS__SHIFT 16 +static inline uint32_t A5XX_RB_RENDER_CNTL_FLAG_MRTS(uint32_t val) +{ + return ((val) << A5XX_RB_RENDER_CNTL_FLAG_MRTS__SHIFT) & A5XX_RB_RENDER_CNTL_FLAG_MRTS__MASK; +} +#define A5XX_RB_RENDER_CNTL_FLAG_MRTS2__MASK 0xff000000 +#define A5XX_RB_RENDER_CNTL_FLAG_MRTS2__SHIFT 24 +static inline uint32_t A5XX_RB_RENDER_CNTL_FLAG_MRTS2(uint32_t val) +{ + return ((val) << A5XX_RB_RENDER_CNTL_FLAG_MRTS2__SHIFT) & A5XX_RB_RENDER_CNTL_FLAG_MRTS2__MASK; +} + +#define REG_A5XX_RB_RAS_MSAA_CNTL 0x0000e142 +#define A5XX_RB_RAS_MSAA_CNTL_SAMPLES__MASK 0x00000003 +#define A5XX_RB_RAS_MSAA_CNTL_SAMPLES__SHIFT 0 +static inline uint32_t A5XX_RB_RAS_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val) +{ + return ((val) << A5XX_RB_RAS_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_RB_RAS_MSAA_CNTL_SAMPLES__MASK; +} + +#define REG_A5XX_RB_DEST_MSAA_CNTL 0x0000e143 +#define A5XX_RB_DEST_MSAA_CNTL_SAMPLES__MASK 0x00000003 +#define A5XX_RB_DEST_MSAA_CNTL_SAMPLES__SHIFT 0 +static inline uint32_t A5XX_RB_DEST_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val) +{ + return ((val) << A5XX_RB_DEST_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_RB_DEST_MSAA_CNTL_SAMPLES__MASK; +} +#define A5XX_RB_DEST_MSAA_CNTL_MSAA_DISABLE 0x00000004 + +#define REG_A5XX_RB_RENDER_CONTROL0 0x0000e144 +#define A5XX_RB_RENDER_CONTROL0_VARYING 0x00000001 +#define A5XX_RB_RENDER_CONTROL0_UNK3 0x00000008 +#define A5XX_RB_RENDER_CONTROL0_XCOORD 0x00000040 +#define A5XX_RB_RENDER_CONTROL0_YCOORD 0x00000080 +#define A5XX_RB_RENDER_CONTROL0_ZCOORD 0x00000100 +#define A5XX_RB_RENDER_CONTROL0_WCOORD 0x00000200 + +#define REG_A5XX_RB_RENDER_CONTROL1 0x0000e145 +#define A5XX_RB_RENDER_CONTROL1_FACENESS 0x00000002 + +#define REG_A5XX_RB_FS_OUTPUT_CNTL 0x0000e146 +#define A5XX_RB_FS_OUTPUT_CNTL_MRT__MASK 0x0000000f +#define A5XX_RB_FS_OUTPUT_CNTL_MRT__SHIFT 0 +static inline uint32_t A5XX_RB_FS_OUTPUT_CNTL_MRT(uint32_t val) +{ + return ((val) << A5XX_RB_FS_OUTPUT_CNTL_MRT__SHIFT) & A5XX_RB_FS_OUTPUT_CNTL_MRT__MASK; +} +#define A5XX_RB_FS_OUTPUT_CNTL_FRAG_WRITES_Z 0x00000020 + +#define REG_A5XX_RB_RENDER_COMPONENTS 0x0000e147 +#define A5XX_RB_RENDER_COMPONENTS_RT0__MASK 0x0000000f +#define A5XX_RB_RENDER_COMPONENTS_RT0__SHIFT 0 +static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT0(uint32_t val) +{ + return ((val) << A5XX_RB_RENDER_COMPONENTS_RT0__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT0__MASK; +} +#define A5XX_RB_RENDER_COMPONENTS_RT1__MASK 0x000000f0 +#define A5XX_RB_RENDER_COMPONENTS_RT1__SHIFT 4 +static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT1(uint32_t val) +{ + return ((val) << A5XX_RB_RENDER_COMPONENTS_RT1__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT1__MASK; +} +#define A5XX_RB_RENDER_COMPONENTS_RT2__MASK 0x00000f00 +#define A5XX_RB_RENDER_COMPONENTS_RT2__SHIFT 8 +static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT2(uint32_t val) +{ + return ((val) << A5XX_RB_RENDER_COMPONENTS_RT2__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT2__MASK; +} +#define A5XX_RB_RENDER_COMPONENTS_RT3__MASK 0x0000f000 +#define A5XX_RB_RENDER_COMPONENTS_RT3__SHIFT 12 +static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT3(uint32_t val) +{ + return ((val) << A5XX_RB_RENDER_COMPONENTS_RT3__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT3__MASK; +} +#define A5XX_RB_RENDER_COMPONENTS_RT4__MASK 0x000f0000 +#define A5XX_RB_RENDER_COMPONENTS_RT4__SHIFT 16 +static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT4(uint32_t val) +{ + return ((val) << A5XX_RB_RENDER_COMPONENTS_RT4__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT4__MASK; +} +#define A5XX_RB_RENDER_COMPONENTS_RT5__MASK 0x00f00000 +#define A5XX_RB_RENDER_COMPONENTS_RT5__SHIFT 20 +static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT5(uint32_t val) +{ + return ((val) << A5XX_RB_RENDER_COMPONENTS_RT5__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT5__MASK; +} +#define A5XX_RB_RENDER_COMPONENTS_RT6__MASK 0x0f000000 +#define A5XX_RB_RENDER_COMPONENTS_RT6__SHIFT 24 +static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT6(uint32_t val) +{ + return ((val) << A5XX_RB_RENDER_COMPONENTS_RT6__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT6__MASK; +} +#define A5XX_RB_RENDER_COMPONENTS_RT7__MASK 0xf0000000 +#define A5XX_RB_RENDER_COMPONENTS_RT7__SHIFT 28 +static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT7(uint32_t val) +{ + return ((val) << A5XX_RB_RENDER_COMPONENTS_RT7__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT7__MASK; +} + +static inline uint32_t REG_A5XX_RB_MRT(uint32_t i0) { return 0x0000e150 + 0x7*i0; } + +static inline uint32_t REG_A5XX_RB_MRT_CONTROL(uint32_t i0) { return 0x0000e150 + 0x7*i0; } +#define A5XX_RB_MRT_CONTROL_BLEND 0x00000001 +#define A5XX_RB_MRT_CONTROL_BLEND2 0x00000002 +#define A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE__MASK 0x00000780 +#define A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE__SHIFT 7 +static inline uint32_t A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE(uint32_t val) +{ + return ((val) << A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE__SHIFT) & A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE__MASK; +} + +static inline uint32_t REG_A5XX_RB_MRT_BLEND_CONTROL(uint32_t i0) { return 0x0000e151 + 0x7*i0; } +#define A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR__MASK 0x0000001f +#define A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR__SHIFT 0 +static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(enum adreno_rb_blend_factor val) +{ + return ((val) << A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR__MASK; +} +#define A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__MASK 0x000000e0 +#define A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__SHIFT 5 +static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(enum a3xx_rb_blend_opcode val) +{ + return ((val) << A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__MASK; +} +#define A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR__MASK 0x00001f00 +#define A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR__SHIFT 8 +static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(enum adreno_rb_blend_factor val) +{ + return ((val) << A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR__MASK; +} +#define A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR__MASK 0x001f0000 +#define A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR__SHIFT 16 +static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(enum adreno_rb_blend_factor val) +{ + return ((val) << A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR__MASK; +} +#define A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__MASK 0x00e00000 +#define A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__SHIFT 21 +static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(enum a3xx_rb_blend_opcode val) +{ + return ((val) << A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__MASK; +} +#define A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR__MASK 0x1f000000 +#define A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR__SHIFT 24 +static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(enum adreno_rb_blend_factor val) +{ + return ((val) << A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR__MASK; +} + +static inline uint32_t REG_A5XX_RB_MRT_BUF_INFO(uint32_t i0) { return 0x0000e152 + 0x7*i0; } +#define A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT__MASK 0x000000ff +#define A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT__SHIFT 0 +static inline uint32_t A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT(enum a5xx_color_fmt val) +{ + return ((val) << A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT__SHIFT) & A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT__MASK; +} +#define A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE__MASK 0x00000300 +#define A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE__SHIFT 8 +static inline uint32_t A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(enum a5xx_tile_mode val) +{ + return ((val) << A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE__SHIFT) & A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE__MASK; +} +#define A5XX_RB_MRT_BUF_INFO_COLOR_SWAP__MASK 0x00006000 +#define A5XX_RB_MRT_BUF_INFO_COLOR_SWAP__SHIFT 13 +static inline uint32_t A5XX_RB_MRT_BUF_INFO_COLOR_SWAP(enum a3xx_color_swap val) +{ + return ((val) << A5XX_RB_MRT_BUF_INFO_COLOR_SWAP__SHIFT) & A5XX_RB_MRT_BUF_INFO_COLOR_SWAP__MASK; +} +#define A5XX_RB_MRT_BUF_INFO_COLOR_SRGB 0x00008000 + +static inline uint32_t REG_A5XX_RB_MRT_PITCH(uint32_t i0) { return 0x0000e153 + 0x7*i0; } +#define A5XX_RB_MRT_PITCH__MASK 0xffffffff +#define A5XX_RB_MRT_PITCH__SHIFT 0 +static inline uint32_t A5XX_RB_MRT_PITCH(uint32_t val) +{ + assert(!(val & 0x3f)); + return ((val >> 6) << A5XX_RB_MRT_PITCH__SHIFT) & A5XX_RB_MRT_PITCH__MASK; +} + +static inline uint32_t REG_A5XX_RB_MRT_ARRAY_PITCH(uint32_t i0) { return 0x0000e154 + 0x7*i0; } +#define A5XX_RB_MRT_ARRAY_PITCH__MASK 0xffffffff +#define A5XX_RB_MRT_ARRAY_PITCH__SHIFT 0 +static inline uint32_t A5XX_RB_MRT_ARRAY_PITCH(uint32_t val) +{ + assert(!(val & 0x3f)); + return ((val >> 6) << A5XX_RB_MRT_ARRAY_PITCH__SHIFT) & A5XX_RB_MRT_ARRAY_PITCH__MASK; +} + +static inline uint32_t REG_A5XX_RB_MRT_BASE_LO(uint32_t i0) { return 0x0000e155 + 0x7*i0; } + +static inline uint32_t REG_A5XX_RB_MRT_BASE_HI(uint32_t i0) { return 0x0000e156 + 0x7*i0; } + +#define REG_A5XX_RB_BLEND_RED 0x0000e1a0 +#define A5XX_RB_BLEND_RED_UINT__MASK 0x000000ff +#define A5XX_RB_BLEND_RED_UINT__SHIFT 0 +static inline uint32_t A5XX_RB_BLEND_RED_UINT(uint32_t val) +{ + return ((val) << A5XX_RB_BLEND_RED_UINT__SHIFT) & A5XX_RB_BLEND_RED_UINT__MASK; +} +#define A5XX_RB_BLEND_RED_SINT__MASK 0x0000ff00 +#define A5XX_RB_BLEND_RED_SINT__SHIFT 8 +static inline uint32_t A5XX_RB_BLEND_RED_SINT(uint32_t val) +{ + return ((val) << A5XX_RB_BLEND_RED_SINT__SHIFT) & A5XX_RB_BLEND_RED_SINT__MASK; +} +#define A5XX_RB_BLEND_RED_FLOAT__MASK 0xffff0000 +#define A5XX_RB_BLEND_RED_FLOAT__SHIFT 16 +static inline uint32_t A5XX_RB_BLEND_RED_FLOAT(float val) +{ + return ((util_float_to_half(val)) << A5XX_RB_BLEND_RED_FLOAT__SHIFT) & A5XX_RB_BLEND_RED_FLOAT__MASK; +} + +#define REG_A5XX_RB_BLEND_RED_F32 0x0000e1a1 +#define A5XX_RB_BLEND_RED_F32__MASK 0xffffffff +#define A5XX_RB_BLEND_RED_F32__SHIFT 0 +static inline uint32_t A5XX_RB_BLEND_RED_F32(float val) +{ + return ((fui(val)) << A5XX_RB_BLEND_RED_F32__SHIFT) & A5XX_RB_BLEND_RED_F32__MASK; +} + +#define REG_A5XX_RB_BLEND_GREEN 0x0000e1a2 +#define A5XX_RB_BLEND_GREEN_UINT__MASK 0x000000ff +#define A5XX_RB_BLEND_GREEN_UINT__SHIFT 0 +static inline uint32_t A5XX_RB_BLEND_GREEN_UINT(uint32_t val) +{ + return ((val) << A5XX_RB_BLEND_GREEN_UINT__SHIFT) & A5XX_RB_BLEND_GREEN_UINT__MASK; +} +#define A5XX_RB_BLEND_GREEN_SINT__MASK 0x0000ff00 +#define A5XX_RB_BLEND_GREEN_SINT__SHIFT 8 +static inline uint32_t A5XX_RB_BLEND_GREEN_SINT(uint32_t val) +{ + return ((val) << A5XX_RB_BLEND_GREEN_SINT__SHIFT) & A5XX_RB_BLEND_GREEN_SINT__MASK; +} +#define A5XX_RB_BLEND_GREEN_FLOAT__MASK 0xffff0000 +#define A5XX_RB_BLEND_GREEN_FLOAT__SHIFT 16 +static inline uint32_t A5XX_RB_BLEND_GREEN_FLOAT(float val) +{ + return ((util_float_to_half(val)) << A5XX_RB_BLEND_GREEN_FLOAT__SHIFT) & A5XX_RB_BLEND_GREEN_FLOAT__MASK; +} + +#define REG_A5XX_RB_BLEND_GREEN_F32 0x0000e1a3 +#define A5XX_RB_BLEND_GREEN_F32__MASK 0xffffffff +#define A5XX_RB_BLEND_GREEN_F32__SHIFT 0 +static inline uint32_t A5XX_RB_BLEND_GREEN_F32(float val) +{ + return ((fui(val)) << A5XX_RB_BLEND_GREEN_F32__SHIFT) & A5XX_RB_BLEND_GREEN_F32__MASK; +} + +#define REG_A5XX_RB_BLEND_BLUE 0x0000e1a4 +#define A5XX_RB_BLEND_BLUE_UINT__MASK 0x000000ff +#define A5XX_RB_BLEND_BLUE_UINT__SHIFT 0 +static inline uint32_t A5XX_RB_BLEND_BLUE_UINT(uint32_t val) +{ + return ((val) << A5XX_RB_BLEND_BLUE_UINT__SHIFT) & A5XX_RB_BLEND_BLUE_UINT__MASK; +} +#define A5XX_RB_BLEND_BLUE_SINT__MASK 0x0000ff00 +#define A5XX_RB_BLEND_BLUE_SINT__SHIFT 8 +static inline uint32_t A5XX_RB_BLEND_BLUE_SINT(uint32_t val) +{ + return ((val) << A5XX_RB_BLEND_BLUE_SINT__SHIFT) & A5XX_RB_BLEND_BLUE_SINT__MASK; +} +#define A5XX_RB_BLEND_BLUE_FLOAT__MASK 0xffff0000 +#define A5XX_RB_BLEND_BLUE_FLOAT__SHIFT 16 +static inline uint32_t A5XX_RB_BLEND_BLUE_FLOAT(float val) +{ + return ((util_float_to_half(val)) << A5XX_RB_BLEND_BLUE_FLOAT__SHIFT) & A5XX_RB_BLEND_BLUE_FLOAT__MASK; +} + +#define REG_A5XX_RB_BLEND_BLUE_F32 0x0000e1a5 +#define A5XX_RB_BLEND_BLUE_F32__MASK 0xffffffff +#define A5XX_RB_BLEND_BLUE_F32__SHIFT 0 +static inline uint32_t A5XX_RB_BLEND_BLUE_F32(float val) +{ + return ((fui(val)) << A5XX_RB_BLEND_BLUE_F32__SHIFT) & A5XX_RB_BLEND_BLUE_F32__MASK; +} + +#define REG_A5XX_RB_BLEND_ALPHA 0x0000e1a6 +#define A5XX_RB_BLEND_ALPHA_UINT__MASK 0x000000ff +#define A5XX_RB_BLEND_ALPHA_UINT__SHIFT 0 +static inline uint32_t A5XX_RB_BLEND_ALPHA_UINT(uint32_t val) +{ + return ((val) << A5XX_RB_BLEND_ALPHA_UINT__SHIFT) & A5XX_RB_BLEND_ALPHA_UINT__MASK; +} +#define A5XX_RB_BLEND_ALPHA_SINT__MASK 0x0000ff00 +#define A5XX_RB_BLEND_ALPHA_SINT__SHIFT 8 +static inline uint32_t A5XX_RB_BLEND_ALPHA_SINT(uint32_t val) +{ + return ((val) << A5XX_RB_BLEND_ALPHA_SINT__SHIFT) & A5XX_RB_BLEND_ALPHA_SINT__MASK; +} +#define A5XX_RB_BLEND_ALPHA_FLOAT__MASK 0xffff0000 +#define A5XX_RB_BLEND_ALPHA_FLOAT__SHIFT 16 +static inline uint32_t A5XX_RB_BLEND_ALPHA_FLOAT(float val) +{ + return ((util_float_to_half(val)) << A5XX_RB_BLEND_ALPHA_FLOAT__SHIFT) & A5XX_RB_BLEND_ALPHA_FLOAT__MASK; +} + +#define REG_A5XX_RB_BLEND_ALPHA_F32 0x0000e1a7 +#define A5XX_RB_BLEND_ALPHA_F32__MASK 0xffffffff +#define A5XX_RB_BLEND_ALPHA_F32__SHIFT 0 +static inline uint32_t A5XX_RB_BLEND_ALPHA_F32(float val) +{ + return ((fui(val)) << A5XX_RB_BLEND_ALPHA_F32__SHIFT) & A5XX_RB_BLEND_ALPHA_F32__MASK; +} + +#define REG_A5XX_RB_ALPHA_CONTROL 0x0000e1a8 +#define A5XX_RB_ALPHA_CONTROL_ALPHA_REF__MASK 0x000000ff +#define A5XX_RB_ALPHA_CONTROL_ALPHA_REF__SHIFT 0 +static inline uint32_t A5XX_RB_ALPHA_CONTROL_ALPHA_REF(uint32_t val) +{ + return ((val) << A5XX_RB_ALPHA_CONTROL_ALPHA_REF__SHIFT) & A5XX_RB_ALPHA_CONTROL_ALPHA_REF__MASK; +} +#define A5XX_RB_ALPHA_CONTROL_ALPHA_TEST 0x00000100 +#define A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC__MASK 0x00000e00 +#define A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC__SHIFT 9 +static inline uint32_t A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(enum adreno_compare_func val) +{ + return ((val) << A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC__SHIFT) & A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC__MASK; +} + +#define REG_A5XX_RB_BLEND_CNTL 0x0000e1a9 +#define A5XX_RB_BLEND_CNTL_ENABLE_BLEND__MASK 0x000000ff +#define A5XX_RB_BLEND_CNTL_ENABLE_BLEND__SHIFT 0 +static inline uint32_t A5XX_RB_BLEND_CNTL_ENABLE_BLEND(uint32_t val) +{ + return ((val) << A5XX_RB_BLEND_CNTL_ENABLE_BLEND__SHIFT) & A5XX_RB_BLEND_CNTL_ENABLE_BLEND__MASK; +} +#define A5XX_RB_BLEND_CNTL_INDEPENDENT_BLEND 0x00000100 +#define A5XX_RB_BLEND_CNTL_SAMPLE_MASK__MASK 0xffff0000 +#define A5XX_RB_BLEND_CNTL_SAMPLE_MASK__SHIFT 16 +static inline uint32_t A5XX_RB_BLEND_CNTL_SAMPLE_MASK(uint32_t val) +{ + return ((val) << A5XX_RB_BLEND_CNTL_SAMPLE_MASK__SHIFT) & A5XX_RB_BLEND_CNTL_SAMPLE_MASK__MASK; +} + +#define REG_A5XX_RB_DEPTH_PLANE_CNTL 0x0000e1b0 +#define A5XX_RB_DEPTH_PLANE_CNTL_FRAG_WRITES_Z 0x00000001 +#define A5XX_RB_DEPTH_PLANE_CNTL_UNK1 0x00000002 + +#define REG_A5XX_RB_DEPTH_CNTL 0x0000e1b1 +#define A5XX_RB_DEPTH_CNTL_Z_ENABLE 0x00000001 +#define A5XX_RB_DEPTH_CNTL_Z_WRITE_ENABLE 0x00000002 +#define A5XX_RB_DEPTH_CNTL_ZFUNC__MASK 0x0000001c +#define A5XX_RB_DEPTH_CNTL_ZFUNC__SHIFT 2 +static inline uint32_t A5XX_RB_DEPTH_CNTL_ZFUNC(enum adreno_compare_func val) +{ + return ((val) << A5XX_RB_DEPTH_CNTL_ZFUNC__SHIFT) & A5XX_RB_DEPTH_CNTL_ZFUNC__MASK; +} +#define A5XX_RB_DEPTH_CNTL_Z_TEST_ENABLE 0x00000040 + +#define REG_A5XX_RB_DEPTH_BUFFER_INFO 0x0000e1b2 +#define A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT__MASK 0x00000007 +#define A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT__SHIFT 0 +static inline uint32_t A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT(enum a5xx_depth_format val) +{ + return ((val) << A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT__SHIFT) & A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT__MASK; +} + +#define REG_A5XX_RB_DEPTH_BUFFER_BASE_LO 0x0000e1b3 + +#define REG_A5XX_RB_DEPTH_BUFFER_BASE_HI 0x0000e1b4 + +#define REG_A5XX_RB_DEPTH_BUFFER_PITCH 0x0000e1b5 +#define A5XX_RB_DEPTH_BUFFER_PITCH__MASK 0xffffffff +#define A5XX_RB_DEPTH_BUFFER_PITCH__SHIFT 0 +static inline uint32_t A5XX_RB_DEPTH_BUFFER_PITCH(uint32_t val) +{ + assert(!(val & 0x3f)); + return ((val >> 6) << A5XX_RB_DEPTH_BUFFER_PITCH__SHIFT) & A5XX_RB_DEPTH_BUFFER_PITCH__MASK; +} + +#define REG_A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH 0x0000e1b6 +#define A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH__MASK 0xffffffff +#define A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH__SHIFT 0 +static inline uint32_t A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH(uint32_t val) +{ + assert(!(val & 0x3f)); + return ((val >> 6) << A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH__SHIFT) & A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH__MASK; +} + +#define REG_A5XX_RB_STENCIL_CONTROL 0x0000e1c0 +#define A5XX_RB_STENCIL_CONTROL_STENCIL_ENABLE 0x00000001 +#define A5XX_RB_STENCIL_CONTROL_STENCIL_ENABLE_BF 0x00000002 +#define A5XX_RB_STENCIL_CONTROL_STENCIL_READ 0x00000004 +#define A5XX_RB_STENCIL_CONTROL_FUNC__MASK 0x00000700 +#define A5XX_RB_STENCIL_CONTROL_FUNC__SHIFT 8 +static inline uint32_t A5XX_RB_STENCIL_CONTROL_FUNC(enum adreno_compare_func val) +{ + return ((val) << A5XX_RB_STENCIL_CONTROL_FUNC__SHIFT) & A5XX_RB_STENCIL_CONTROL_FUNC__MASK; +} +#define A5XX_RB_STENCIL_CONTROL_FAIL__MASK 0x00003800 +#define A5XX_RB_STENCIL_CONTROL_FAIL__SHIFT 11 +static inline uint32_t A5XX_RB_STENCIL_CONTROL_FAIL(enum adreno_stencil_op val) +{ + return ((val) << A5XX_RB_STENCIL_CONTROL_FAIL__SHIFT) & A5XX_RB_STENCIL_CONTROL_FAIL__MASK; +} +#define A5XX_RB_STENCIL_CONTROL_ZPASS__MASK 0x0001c000 +#define A5XX_RB_STENCIL_CONTROL_ZPASS__SHIFT 14 +static inline uint32_t A5XX_RB_STENCIL_CONTROL_ZPASS(enum adreno_stencil_op val) +{ + return ((val) << A5XX_RB_STENCIL_CONTROL_ZPASS__SHIFT) & A5XX_RB_STENCIL_CONTROL_ZPASS__MASK; +} +#define A5XX_RB_STENCIL_CONTROL_ZFAIL__MASK 0x000e0000 +#define A5XX_RB_STENCIL_CONTROL_ZFAIL__SHIFT 17 +static inline uint32_t A5XX_RB_STENCIL_CONTROL_ZFAIL(enum adreno_stencil_op val) +{ + return ((val) << A5XX_RB_STENCIL_CONTROL_ZFAIL__SHIFT) & A5XX_RB_STENCIL_CONTROL_ZFAIL__MASK; +} +#define A5XX_RB_STENCIL_CONTROL_FUNC_BF__MASK 0x00700000 +#define A5XX_RB_STENCIL_CONTROL_FUNC_BF__SHIFT 20 +static inline uint32_t A5XX_RB_STENCIL_CONTROL_FUNC_BF(enum adreno_compare_func val) +{ + return ((val) << A5XX_RB_STENCIL_CONTROL_FUNC_BF__SHIFT) & A5XX_RB_STENCIL_CONTROL_FUNC_BF__MASK; +} +#define A5XX_RB_STENCIL_CONTROL_FAIL_BF__MASK 0x03800000 +#define A5XX_RB_STENCIL_CONTROL_FAIL_BF__SHIFT 23 +static inline uint32_t A5XX_RB_STENCIL_CONTROL_FAIL_BF(enum adreno_stencil_op val) +{ + return ((val) << A5XX_RB_STENCIL_CONTROL_FAIL_BF__SHIFT) & A5XX_RB_STENCIL_CONTROL_FAIL_BF__MASK; +} +#define A5XX_RB_STENCIL_CONTROL_ZPASS_BF__MASK 0x1c000000 +#define A5XX_RB_STENCIL_CONTROL_ZPASS_BF__SHIFT 26 +static inline uint32_t A5XX_RB_STENCIL_CONTROL_ZPASS_BF(enum adreno_stencil_op val) +{ + return ((val) << A5XX_RB_STENCIL_CONTROL_ZPASS_BF__SHIFT) & A5XX_RB_STENCIL_CONTROL_ZPASS_BF__MASK; +} +#define A5XX_RB_STENCIL_CONTROL_ZFAIL_BF__MASK 0xe0000000 +#define A5XX_RB_STENCIL_CONTROL_ZFAIL_BF__SHIFT 29 +static inline uint32_t A5XX_RB_STENCIL_CONTROL_ZFAIL_BF(enum adreno_stencil_op val) +{ + return ((val) << A5XX_RB_STENCIL_CONTROL_ZFAIL_BF__SHIFT) & A5XX_RB_STENCIL_CONTROL_ZFAIL_BF__MASK; +} + +#define REG_A5XX_RB_STENCIL_INFO 0x0000e1c1 +#define A5XX_RB_STENCIL_INFO_SEPARATE_STENCIL 0x00000001 + +#define REG_A5XX_RB_STENCIL_BASE_LO 0x0000e1c2 + +#define REG_A5XX_RB_STENCIL_BASE_HI 0x0000e1c3 + +#define REG_A5XX_RB_STENCIL_PITCH 0x0000e1c4 +#define A5XX_RB_STENCIL_PITCH__MASK 0xffffffff +#define A5XX_RB_STENCIL_PITCH__SHIFT 0 +static inline uint32_t A5XX_RB_STENCIL_PITCH(uint32_t val) +{ + assert(!(val & 0x3f)); + return ((val >> 6) << A5XX_RB_STENCIL_PITCH__SHIFT) & A5XX_RB_STENCIL_PITCH__MASK; +} + +#define REG_A5XX_RB_STENCIL_ARRAY_PITCH 0x0000e1c5 +#define A5XX_RB_STENCIL_ARRAY_PITCH__MASK 0xffffffff +#define A5XX_RB_STENCIL_ARRAY_PITCH__SHIFT 0 +static inline uint32_t A5XX_RB_STENCIL_ARRAY_PITCH(uint32_t val) +{ + assert(!(val & 0x3f)); + return ((val >> 6) << A5XX_RB_STENCIL_ARRAY_PITCH__SHIFT) & A5XX_RB_STENCIL_ARRAY_PITCH__MASK; +} + +#define REG_A5XX_RB_STENCILREFMASK 0x0000e1c6 +#define A5XX_RB_STENCILREFMASK_STENCILREF__MASK 0x000000ff +#define A5XX_RB_STENCILREFMASK_STENCILREF__SHIFT 0 +static inline uint32_t A5XX_RB_STENCILREFMASK_STENCILREF(uint32_t val) +{ + return ((val) << A5XX_RB_STENCILREFMASK_STENCILREF__SHIFT) & A5XX_RB_STENCILREFMASK_STENCILREF__MASK; +} +#define A5XX_RB_STENCILREFMASK_STENCILMASK__MASK 0x0000ff00 +#define A5XX_RB_STENCILREFMASK_STENCILMASK__SHIFT 8 +static inline uint32_t A5XX_RB_STENCILREFMASK_STENCILMASK(uint32_t val) +{ + return ((val) << A5XX_RB_STENCILREFMASK_STENCILMASK__SHIFT) & A5XX_RB_STENCILREFMASK_STENCILMASK__MASK; +} +#define A5XX_RB_STENCILREFMASK_STENCILWRITEMASK__MASK 0x00ff0000 +#define A5XX_RB_STENCILREFMASK_STENCILWRITEMASK__SHIFT 16 +static inline uint32_t A5XX_RB_STENCILREFMASK_STENCILWRITEMASK(uint32_t val) +{ + return ((val) << A5XX_RB_STENCILREFMASK_STENCILWRITEMASK__SHIFT) & A5XX_RB_STENCILREFMASK_STENCILWRITEMASK__MASK; +} + +#define REG_A5XX_UNKNOWN_E1C7 0x0000e1c7 + +#define REG_A5XX_RB_WINDOW_OFFSET 0x0000e1d0 +#define A5XX_RB_WINDOW_OFFSET_WINDOW_OFFSET_DISABLE 0x80000000 +#define A5XX_RB_WINDOW_OFFSET_X__MASK 0x00007fff +#define A5XX_RB_WINDOW_OFFSET_X__SHIFT 0 +static inline uint32_t A5XX_RB_WINDOW_OFFSET_X(uint32_t val) +{ + return ((val) << A5XX_RB_WINDOW_OFFSET_X__SHIFT) & A5XX_RB_WINDOW_OFFSET_X__MASK; +} +#define A5XX_RB_WINDOW_OFFSET_Y__MASK 0x7fff0000 +#define A5XX_RB_WINDOW_OFFSET_Y__SHIFT 16 +static inline uint32_t A5XX_RB_WINDOW_OFFSET_Y(uint32_t val) +{ + return ((val) << A5XX_RB_WINDOW_OFFSET_Y__SHIFT) & A5XX_RB_WINDOW_OFFSET_Y__MASK; +} + +#define REG_A5XX_RB_BLIT_CNTL 0x0000e210 +#define A5XX_RB_BLIT_CNTL_BUF__MASK 0x0000000f +#define A5XX_RB_BLIT_CNTL_BUF__SHIFT 0 +static inline uint32_t A5XX_RB_BLIT_CNTL_BUF(enum a5xx_blit_buf val) +{ + return ((val) << A5XX_RB_BLIT_CNTL_BUF__SHIFT) & A5XX_RB_BLIT_CNTL_BUF__MASK; +} + +#define REG_A5XX_RB_RESOLVE_CNTL_1 0x0000e211 +#define A5XX_RB_RESOLVE_CNTL_1_WINDOW_OFFSET_DISABLE 0x80000000 +#define A5XX_RB_RESOLVE_CNTL_1_X__MASK 0x00007fff +#define A5XX_RB_RESOLVE_CNTL_1_X__SHIFT 0 +static inline uint32_t A5XX_RB_RESOLVE_CNTL_1_X(uint32_t val) +{ + return ((val) << A5XX_RB_RESOLVE_CNTL_1_X__SHIFT) & A5XX_RB_RESOLVE_CNTL_1_X__MASK; +} +#define A5XX_RB_RESOLVE_CNTL_1_Y__MASK 0x7fff0000 +#define A5XX_RB_RESOLVE_CNTL_1_Y__SHIFT 16 +static inline uint32_t A5XX_RB_RESOLVE_CNTL_1_Y(uint32_t val) +{ + return ((val) << A5XX_RB_RESOLVE_CNTL_1_Y__SHIFT) & A5XX_RB_RESOLVE_CNTL_1_Y__MASK; +} + +#define REG_A5XX_RB_RESOLVE_CNTL_2 0x0000e212 +#define A5XX_RB_RESOLVE_CNTL_2_WINDOW_OFFSET_DISABLE 0x80000000 +#define A5XX_RB_RESOLVE_CNTL_2_X__MASK 0x00007fff +#define A5XX_RB_RESOLVE_CNTL_2_X__SHIFT 0 +static inline uint32_t A5XX_RB_RESOLVE_CNTL_2_X(uint32_t val) +{ + return ((val) << A5XX_RB_RESOLVE_CNTL_2_X__SHIFT) & A5XX_RB_RESOLVE_CNTL_2_X__MASK; +} +#define A5XX_RB_RESOLVE_CNTL_2_Y__MASK 0x7fff0000 +#define A5XX_RB_RESOLVE_CNTL_2_Y__SHIFT 16 +static inline uint32_t A5XX_RB_RESOLVE_CNTL_2_Y(uint32_t val) +{ + return ((val) << A5XX_RB_RESOLVE_CNTL_2_Y__SHIFT) & A5XX_RB_RESOLVE_CNTL_2_Y__MASK; +} + +#define REG_A5XX_RB_RESOLVE_CNTL_3 0x0000e213 + +#define REG_A5XX_RB_BLIT_DST_LO 0x0000e214 + +#define REG_A5XX_RB_BLIT_DST_HI 0x0000e215 + +#define REG_A5XX_RB_BLIT_DST_PITCH 0x0000e216 +#define A5XX_RB_BLIT_DST_PITCH__MASK 0xffffffff +#define A5XX_RB_BLIT_DST_PITCH__SHIFT 0 +static inline uint32_t A5XX_RB_BLIT_DST_PITCH(uint32_t val) +{ + assert(!(val & 0x3f)); + return ((val >> 6) << A5XX_RB_BLIT_DST_PITCH__SHIFT) & A5XX_RB_BLIT_DST_PITCH__MASK; +} + +#define REG_A5XX_RB_BLIT_DST_ARRAY_PITCH 0x0000e217 +#define A5XX_RB_BLIT_DST_ARRAY_PITCH__MASK 0xffffffff +#define A5XX_RB_BLIT_DST_ARRAY_PITCH__SHIFT 0 +static inline uint32_t A5XX_RB_BLIT_DST_ARRAY_PITCH(uint32_t val) +{ + assert(!(val & 0x3f)); + return ((val >> 6) << A5XX_RB_BLIT_DST_ARRAY_PITCH__SHIFT) & A5XX_RB_BLIT_DST_ARRAY_PITCH__MASK; +} + +#define REG_A5XX_RB_CLEAR_COLOR_DW0 0x0000e218 + +#define REG_A5XX_RB_CLEAR_COLOR_DW1 0x0000e219 + +#define REG_A5XX_RB_CLEAR_COLOR_DW2 0x0000e21a + +#define REG_A5XX_RB_CLEAR_COLOR_DW3 0x0000e21b + +#define REG_A5XX_RB_CLEAR_CNTL 0x0000e21c +#define A5XX_RB_CLEAR_CNTL_FAST_CLEAR 0x00000002 +#define A5XX_RB_CLEAR_CNTL_MASK__MASK 0x000000f0 +#define A5XX_RB_CLEAR_CNTL_MASK__SHIFT 4 +static inline uint32_t A5XX_RB_CLEAR_CNTL_MASK(uint32_t val) +{ + return ((val) << A5XX_RB_CLEAR_CNTL_MASK__SHIFT) & A5XX_RB_CLEAR_CNTL_MASK__MASK; +} + +#define REG_A5XX_RB_DEPTH_FLAG_BUFFER_BASE_LO 0x0000e240 + +#define REG_A5XX_RB_DEPTH_FLAG_BUFFER_BASE_HI 0x0000e241 + +#define REG_A5XX_RB_DEPTH_FLAG_BUFFER_PITCH 0x0000e242 + +static inline uint32_t REG_A5XX_RB_MRT_FLAG_BUFFER(uint32_t i0) { return 0x0000e243 + 0x4*i0; } + +static inline uint32_t REG_A5XX_RB_MRT_FLAG_BUFFER_ADDR_LO(uint32_t i0) { return 0x0000e243 + 0x4*i0; } + +static inline uint32_t REG_A5XX_RB_MRT_FLAG_BUFFER_ADDR_HI(uint32_t i0) { return 0x0000e244 + 0x4*i0; } + +static inline uint32_t REG_A5XX_RB_MRT_FLAG_BUFFER_PITCH(uint32_t i0) { return 0x0000e245 + 0x4*i0; } +#define A5XX_RB_MRT_FLAG_BUFFER_PITCH__MASK 0xffffffff +#define A5XX_RB_MRT_FLAG_BUFFER_PITCH__SHIFT 0 +static inline uint32_t A5XX_RB_MRT_FLAG_BUFFER_PITCH(uint32_t val) +{ + assert(!(val & 0x3f)); + return ((val >> 6) << A5XX_RB_MRT_FLAG_BUFFER_PITCH__SHIFT) & A5XX_RB_MRT_FLAG_BUFFER_PITCH__MASK; +} + +static inline uint32_t REG_A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH(uint32_t i0) { return 0x0000e246 + 0x4*i0; } +#define A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH__MASK 0xffffffff +#define A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH__SHIFT 0 +static inline uint32_t A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH(uint32_t val) +{ + assert(!(val & 0x3f)); + return ((val >> 6) << A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH__SHIFT) & A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH__MASK; +} + +#define REG_A5XX_RB_BLIT_FLAG_DST_LO 0x0000e263 + +#define REG_A5XX_RB_BLIT_FLAG_DST_HI 0x0000e264 + +#define REG_A5XX_RB_BLIT_FLAG_DST_PITCH 0x0000e265 +#define A5XX_RB_BLIT_FLAG_DST_PITCH__MASK 0xffffffff +#define A5XX_RB_BLIT_FLAG_DST_PITCH__SHIFT 0 +static inline uint32_t A5XX_RB_BLIT_FLAG_DST_PITCH(uint32_t val) +{ + assert(!(val & 0x3f)); + return ((val >> 6) << A5XX_RB_BLIT_FLAG_DST_PITCH__SHIFT) & A5XX_RB_BLIT_FLAG_DST_PITCH__MASK; +} + +#define REG_A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH 0x0000e266 +#define A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH__MASK 0xffffffff +#define A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH__SHIFT 0 +static inline uint32_t A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH(uint32_t val) +{ + assert(!(val & 0x3f)); + return ((val >> 6) << A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH__SHIFT) & A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH__MASK; +} + +#define REG_A5XX_VPC_CNTL_0 0x0000e280 +#define A5XX_VPC_CNTL_0_STRIDE_IN_VPC__MASK 0x0000007f +#define A5XX_VPC_CNTL_0_STRIDE_IN_VPC__SHIFT 0 +static inline uint32_t A5XX_VPC_CNTL_0_STRIDE_IN_VPC(uint32_t val) +{ + return ((val) << A5XX_VPC_CNTL_0_STRIDE_IN_VPC__SHIFT) & A5XX_VPC_CNTL_0_STRIDE_IN_VPC__MASK; +} +#define A5XX_VPC_CNTL_0_VARYING 0x00000800 + +static inline uint32_t REG_A5XX_VPC_VARYING_INTERP(uint32_t i0) { return 0x0000e282 + 0x1*i0; } + +static inline uint32_t REG_A5XX_VPC_VARYING_INTERP_MODE(uint32_t i0) { return 0x0000e282 + 0x1*i0; } + +static inline uint32_t REG_A5XX_VPC_VARYING_PS_REPL(uint32_t i0) { return 0x0000e28a + 0x1*i0; } + +static inline uint32_t REG_A5XX_VPC_VARYING_PS_REPL_MODE(uint32_t i0) { return 0x0000e28a + 0x1*i0; } + +#define REG_A5XX_UNKNOWN_E292 0x0000e292 + +#define REG_A5XX_UNKNOWN_E293 0x0000e293 + +static inline uint32_t REG_A5XX_VPC_VAR(uint32_t i0) { return 0x0000e294 + 0x1*i0; } + +static inline uint32_t REG_A5XX_VPC_VAR_DISABLE(uint32_t i0) { return 0x0000e294 + 0x1*i0; } + +#define REG_A5XX_VPC_GS_SIV_CNTL 0x0000e298 + +#define REG_A5XX_UNKNOWN_E29A 0x0000e29a + +#define REG_A5XX_VPC_PACK 0x0000e29d +#define A5XX_VPC_PACK_NUMNONPOSVAR__MASK 0x000000ff +#define A5XX_VPC_PACK_NUMNONPOSVAR__SHIFT 0 +static inline uint32_t A5XX_VPC_PACK_NUMNONPOSVAR(uint32_t val) +{ + return ((val) << A5XX_VPC_PACK_NUMNONPOSVAR__SHIFT) & A5XX_VPC_PACK_NUMNONPOSVAR__MASK; +} +#define A5XX_VPC_PACK_PSIZELOC__MASK 0x0000ff00 +#define A5XX_VPC_PACK_PSIZELOC__SHIFT 8 +static inline uint32_t A5XX_VPC_PACK_PSIZELOC(uint32_t val) +{ + return ((val) << A5XX_VPC_PACK_PSIZELOC__SHIFT) & A5XX_VPC_PACK_PSIZELOC__MASK; +} + +#define REG_A5XX_VPC_FS_PRIMITIVEID_CNTL 0x0000e2a0 + +#define REG_A5XX_VPC_SO_BUF_CNTL 0x0000e2a1 +#define A5XX_VPC_SO_BUF_CNTL_BUF0 0x00000001 +#define A5XX_VPC_SO_BUF_CNTL_BUF1 0x00000008 +#define A5XX_VPC_SO_BUF_CNTL_BUF2 0x00000040 +#define A5XX_VPC_SO_BUF_CNTL_BUF3 0x00000200 +#define A5XX_VPC_SO_BUF_CNTL_ENABLE 0x00008000 + +#define REG_A5XX_VPC_SO_OVERRIDE 0x0000e2a2 +#define A5XX_VPC_SO_OVERRIDE_SO_DISABLE 0x00000001 + +#define REG_A5XX_VPC_SO_CNTL 0x0000e2a3 +#define A5XX_VPC_SO_CNTL_ENABLE 0x00010000 + +#define REG_A5XX_VPC_SO_PROG 0x0000e2a4 +#define A5XX_VPC_SO_PROG_A_BUF__MASK 0x00000003 +#define A5XX_VPC_SO_PROG_A_BUF__SHIFT 0 +static inline uint32_t A5XX_VPC_SO_PROG_A_BUF(uint32_t val) +{ + return ((val) << A5XX_VPC_SO_PROG_A_BUF__SHIFT) & A5XX_VPC_SO_PROG_A_BUF__MASK; +} +#define A5XX_VPC_SO_PROG_A_OFF__MASK 0x000007fc +#define A5XX_VPC_SO_PROG_A_OFF__SHIFT 2 +static inline uint32_t A5XX_VPC_SO_PROG_A_OFF(uint32_t val) +{ + assert(!(val & 0x3)); + return ((val >> 2) << A5XX_VPC_SO_PROG_A_OFF__SHIFT) & A5XX_VPC_SO_PROG_A_OFF__MASK; +} +#define A5XX_VPC_SO_PROG_A_EN 0x00000800 +#define A5XX_VPC_SO_PROG_B_BUF__MASK 0x00003000 +#define A5XX_VPC_SO_PROG_B_BUF__SHIFT 12 +static inline uint32_t A5XX_VPC_SO_PROG_B_BUF(uint32_t val) +{ + return ((val) << A5XX_VPC_SO_PROG_B_BUF__SHIFT) & A5XX_VPC_SO_PROG_B_BUF__MASK; +} +#define A5XX_VPC_SO_PROG_B_OFF__MASK 0x007fc000 +#define A5XX_VPC_SO_PROG_B_OFF__SHIFT 14 +static inline uint32_t A5XX_VPC_SO_PROG_B_OFF(uint32_t val) +{ + assert(!(val & 0x3)); + return ((val >> 2) << A5XX_VPC_SO_PROG_B_OFF__SHIFT) & A5XX_VPC_SO_PROG_B_OFF__MASK; +} +#define A5XX_VPC_SO_PROG_B_EN 0x00800000 + +static inline uint32_t REG_A5XX_VPC_SO(uint32_t i0) { return 0x0000e2a7 + 0x7*i0; } + +static inline uint32_t REG_A5XX_VPC_SO_BUFFER_BASE_LO(uint32_t i0) { return 0x0000e2a7 + 0x7*i0; } + +static inline uint32_t REG_A5XX_VPC_SO_BUFFER_BASE_HI(uint32_t i0) { return 0x0000e2a8 + 0x7*i0; } + +static inline uint32_t REG_A5XX_VPC_SO_BUFFER_SIZE(uint32_t i0) { return 0x0000e2a9 + 0x7*i0; } + +static inline uint32_t REG_A5XX_VPC_SO_NCOMP(uint32_t i0) { return 0x0000e2aa + 0x7*i0; } + +static inline uint32_t REG_A5XX_VPC_SO_BUFFER_OFFSET(uint32_t i0) { return 0x0000e2ab + 0x7*i0; } + +static inline uint32_t REG_A5XX_VPC_SO_FLUSH_BASE_LO(uint32_t i0) { return 0x0000e2ac + 0x7*i0; } + +static inline uint32_t REG_A5XX_VPC_SO_FLUSH_BASE_HI(uint32_t i0) { return 0x0000e2ad + 0x7*i0; } + +#define REG_A5XX_PC_PRIMITIVE_CNTL 0x0000e384 +#define A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC__MASK 0x0000007f +#define A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC__SHIFT 0 +static inline uint32_t A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC(uint32_t val) +{ + return ((val) << A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC__SHIFT) & A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC__MASK; +} + +#define REG_A5XX_PC_PRIM_VTX_CNTL 0x0000e385 +#define A5XX_PC_PRIM_VTX_CNTL_PSIZE 0x00000800 + +#define REG_A5XX_PC_RASTER_CNTL 0x0000e388 + +#define REG_A5XX_UNKNOWN_E389 0x0000e389 + +#define REG_A5XX_PC_RESTART_INDEX 0x0000e38c + +#define REG_A5XX_UNKNOWN_E38D 0x0000e38d + +#define REG_A5XX_PC_GS_PARAM 0x0000e38e + +#define REG_A5XX_PC_HS_PARAM 0x0000e38f + +#define REG_A5XX_PC_POWER_CNTL 0x0000e3b0 + +#define REG_A5XX_VFD_CONTROL_0 0x0000e400 +#define A5XX_VFD_CONTROL_0_VTXCNT__MASK 0x0000003f +#define A5XX_VFD_CONTROL_0_VTXCNT__SHIFT 0 +static inline uint32_t A5XX_VFD_CONTROL_0_VTXCNT(uint32_t val) +{ + return ((val) << A5XX_VFD_CONTROL_0_VTXCNT__SHIFT) & A5XX_VFD_CONTROL_0_VTXCNT__MASK; +} + +#define REG_A5XX_VFD_CONTROL_1 0x0000e401 +#define A5XX_VFD_CONTROL_1_REGID4VTX__MASK 0x000000ff +#define A5XX_VFD_CONTROL_1_REGID4VTX__SHIFT 0 +static inline uint32_t A5XX_VFD_CONTROL_1_REGID4VTX(uint32_t val) +{ + return ((val) << A5XX_VFD_CONTROL_1_REGID4VTX__SHIFT) & A5XX_VFD_CONTROL_1_REGID4VTX__MASK; +} +#define A5XX_VFD_CONTROL_1_REGID4INST__MASK 0x0000ff00 +#define A5XX_VFD_CONTROL_1_REGID4INST__SHIFT 8 +static inline uint32_t A5XX_VFD_CONTROL_1_REGID4INST(uint32_t val) +{ + return ((val) << A5XX_VFD_CONTROL_1_REGID4INST__SHIFT) & A5XX_VFD_CONTROL_1_REGID4INST__MASK; +} + +#define REG_A5XX_VFD_CONTROL_2 0x0000e402 + +#define REG_A5XX_VFD_CONTROL_3 0x0000e403 + +#define REG_A5XX_VFD_CONTROL_4 0x0000e404 + +#define REG_A5XX_VFD_CONTROL_5 0x0000e405 + +#define REG_A5XX_VFD_INDEX_OFFSET 0x0000e408 + +#define REG_A5XX_VFD_INSTANCE_START_OFFSET 0x0000e409 + +static inline uint32_t REG_A5XX_VFD_FETCH(uint32_t i0) { return 0x0000e40a + 0x4*i0; } + +static inline uint32_t REG_A5XX_VFD_FETCH_BASE_LO(uint32_t i0) { return 0x0000e40a + 0x4*i0; } + +static inline uint32_t REG_A5XX_VFD_FETCH_BASE_HI(uint32_t i0) { return 0x0000e40b + 0x4*i0; } + +static inline uint32_t REG_A5XX_VFD_FETCH_SIZE(uint32_t i0) { return 0x0000e40c + 0x4*i0; } + +static inline uint32_t REG_A5XX_VFD_FETCH_STRIDE(uint32_t i0) { return 0x0000e40d + 0x4*i0; } + +static inline uint32_t REG_A5XX_VFD_DECODE(uint32_t i0) { return 0x0000e48a + 0x2*i0; } + +static inline uint32_t REG_A5XX_VFD_DECODE_INSTR(uint32_t i0) { return 0x0000e48a + 0x2*i0; } +#define A5XX_VFD_DECODE_INSTR_IDX__MASK 0x0000001f +#define A5XX_VFD_DECODE_INSTR_IDX__SHIFT 0 +static inline uint32_t A5XX_VFD_DECODE_INSTR_IDX(uint32_t val) +{ + return ((val) << A5XX_VFD_DECODE_INSTR_IDX__SHIFT) & A5XX_VFD_DECODE_INSTR_IDX__MASK; +} +#define A5XX_VFD_DECODE_INSTR_INSTANCED 0x00020000 +#define A5XX_VFD_DECODE_INSTR_FORMAT__MASK 0x3ff00000 +#define A5XX_VFD_DECODE_INSTR_FORMAT__SHIFT 20 +static inline uint32_t A5XX_VFD_DECODE_INSTR_FORMAT(enum a5xx_vtx_fmt val) +{ + return ((val) << A5XX_VFD_DECODE_INSTR_FORMAT__SHIFT) & A5XX_VFD_DECODE_INSTR_FORMAT__MASK; +} +#define A5XX_VFD_DECODE_INSTR_UNK30 0x40000000 +#define A5XX_VFD_DECODE_INSTR_FLOAT 0x80000000 + +static inline uint32_t REG_A5XX_VFD_DECODE_STEP_RATE(uint32_t i0) { return 0x0000e48b + 0x2*i0; } + +static inline uint32_t REG_A5XX_VFD_DEST_CNTL(uint32_t i0) { return 0x0000e4ca + 0x1*i0; } + +static inline uint32_t REG_A5XX_VFD_DEST_CNTL_INSTR(uint32_t i0) { return 0x0000e4ca + 0x1*i0; } +#define A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK__MASK 0x0000000f +#define A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK__SHIFT 0 +static inline uint32_t A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK(uint32_t val) +{ + return ((val) << A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK__SHIFT) & A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK__MASK; +} +#define A5XX_VFD_DEST_CNTL_INSTR_REGID__MASK 0x00000ff0 +#define A5XX_VFD_DEST_CNTL_INSTR_REGID__SHIFT 4 +static inline uint32_t A5XX_VFD_DEST_CNTL_INSTR_REGID(uint32_t val) +{ + return ((val) << A5XX_VFD_DEST_CNTL_INSTR_REGID__SHIFT) & A5XX_VFD_DEST_CNTL_INSTR_REGID__MASK; +} + +#define REG_A5XX_VFD_POWER_CNTL 0x0000e4f0 + +#define REG_A5XX_SP_SP_CNTL 0x0000e580 + +#define REG_A5XX_SP_VS_CONTROL_REG 0x0000e584 +#define A5XX_SP_VS_CONTROL_REG_ENABLED 0x00000001 +#define A5XX_SP_VS_CONTROL_REG_CONSTOBJECTOFFSET__MASK 0x000000fe +#define A5XX_SP_VS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT 1 +static inline uint32_t A5XX_SP_VS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val) +{ + return ((val) << A5XX_SP_VS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_VS_CONTROL_REG_CONSTOBJECTOFFSET__MASK; +} +#define A5XX_SP_VS_CONTROL_REG_SHADEROBJOFFSET__MASK 0x00007f00 +#define A5XX_SP_VS_CONTROL_REG_SHADEROBJOFFSET__SHIFT 8 +static inline uint32_t A5XX_SP_VS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val) +{ + return ((val) << A5XX_SP_VS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_VS_CONTROL_REG_SHADEROBJOFFSET__MASK; +} + +#define REG_A5XX_SP_FS_CONTROL_REG 0x0000e585 +#define A5XX_SP_FS_CONTROL_REG_ENABLED 0x00000001 +#define A5XX_SP_FS_CONTROL_REG_CONSTOBJECTOFFSET__MASK 0x000000fe +#define A5XX_SP_FS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT 1 +static inline uint32_t A5XX_SP_FS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val) +{ + return ((val) << A5XX_SP_FS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_FS_CONTROL_REG_CONSTOBJECTOFFSET__MASK; +} +#define A5XX_SP_FS_CONTROL_REG_SHADEROBJOFFSET__MASK 0x00007f00 +#define A5XX_SP_FS_CONTROL_REG_SHADEROBJOFFSET__SHIFT 8 +static inline uint32_t A5XX_SP_FS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val) +{ + return ((val) << A5XX_SP_FS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_FS_CONTROL_REG_SHADEROBJOFFSET__MASK; +} + +#define REG_A5XX_SP_HS_CONTROL_REG 0x0000e586 +#define A5XX_SP_HS_CONTROL_REG_ENABLED 0x00000001 +#define A5XX_SP_HS_CONTROL_REG_CONSTOBJECTOFFSET__MASK 0x000000fe +#define A5XX_SP_HS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT 1 +static inline uint32_t A5XX_SP_HS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val) +{ + return ((val) << A5XX_SP_HS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_HS_CONTROL_REG_CONSTOBJECTOFFSET__MASK; +} +#define A5XX_SP_HS_CONTROL_REG_SHADEROBJOFFSET__MASK 0x00007f00 +#define A5XX_SP_HS_CONTROL_REG_SHADEROBJOFFSET__SHIFT 8 +static inline uint32_t A5XX_SP_HS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val) +{ + return ((val) << A5XX_SP_HS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_HS_CONTROL_REG_SHADEROBJOFFSET__MASK; +} + +#define REG_A5XX_SP_DS_CONTROL_REG 0x0000e587 +#define A5XX_SP_DS_CONTROL_REG_ENABLED 0x00000001 +#define A5XX_SP_DS_CONTROL_REG_CONSTOBJECTOFFSET__MASK 0x000000fe +#define A5XX_SP_DS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT 1 +static inline uint32_t A5XX_SP_DS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val) +{ + return ((val) << A5XX_SP_DS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_DS_CONTROL_REG_CONSTOBJECTOFFSET__MASK; +} +#define A5XX_SP_DS_CONTROL_REG_SHADEROBJOFFSET__MASK 0x00007f00 +#define A5XX_SP_DS_CONTROL_REG_SHADEROBJOFFSET__SHIFT 8 +static inline uint32_t A5XX_SP_DS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val) +{ + return ((val) << A5XX_SP_DS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_DS_CONTROL_REG_SHADEROBJOFFSET__MASK; +} + +#define REG_A5XX_SP_GS_CONTROL_REG 0x0000e588 +#define A5XX_SP_GS_CONTROL_REG_ENABLED 0x00000001 +#define A5XX_SP_GS_CONTROL_REG_CONSTOBJECTOFFSET__MASK 0x000000fe +#define A5XX_SP_GS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT 1 +static inline uint32_t A5XX_SP_GS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val) +{ + return ((val) << A5XX_SP_GS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_GS_CONTROL_REG_CONSTOBJECTOFFSET__MASK; +} +#define A5XX_SP_GS_CONTROL_REG_SHADEROBJOFFSET__MASK 0x00007f00 +#define A5XX_SP_GS_CONTROL_REG_SHADEROBJOFFSET__SHIFT 8 +static inline uint32_t A5XX_SP_GS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val) +{ + return ((val) << A5XX_SP_GS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_GS_CONTROL_REG_SHADEROBJOFFSET__MASK; +} + +#define REG_A5XX_SP_CS_CONFIG 0x0000e589 + +#define REG_A5XX_SP_VS_CONFIG_MAX_CONST 0x0000e58a + +#define REG_A5XX_SP_FS_CONFIG_MAX_CONST 0x0000e58b + +#define REG_A5XX_SP_VS_CTRL_REG0 0x0000e590 +#define A5XX_SP_VS_CTRL_REG0_THREADSIZE__MASK 0x00000008 +#define A5XX_SP_VS_CTRL_REG0_THREADSIZE__SHIFT 3 +static inline uint32_t A5XX_SP_VS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val) +{ + return ((val) << A5XX_SP_VS_CTRL_REG0_THREADSIZE__SHIFT) & A5XX_SP_VS_CTRL_REG0_THREADSIZE__MASK; +} +#define A5XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT__MASK 0x000003f0 +#define A5XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT 4 +static inline uint32_t A5XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val) +{ + return ((val) << A5XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A5XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT__MASK; +} +#define A5XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT__MASK 0x0000fc00 +#define A5XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT 10 +static inline uint32_t A5XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val) +{ + return ((val) << A5XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A5XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT__MASK; +} +#define A5XX_SP_VS_CTRL_REG0_VARYING 0x00010000 +#define A5XX_SP_VS_CTRL_REG0_PIXLODENABLE 0x00100000 +#define A5XX_SP_VS_CTRL_REG0_BRANCHSTACK__MASK 0xfe000000 +#define A5XX_SP_VS_CTRL_REG0_BRANCHSTACK__SHIFT 25 +static inline uint32_t A5XX_SP_VS_CTRL_REG0_BRANCHSTACK(uint32_t val) +{ + return ((val) << A5XX_SP_VS_CTRL_REG0_BRANCHSTACK__SHIFT) & A5XX_SP_VS_CTRL_REG0_BRANCHSTACK__MASK; +} + +#define REG_A5XX_SP_PRIMITIVE_CNTL 0x0000e592 +#define A5XX_SP_PRIMITIVE_CNTL_VSOUT__MASK 0x0000001f +#define A5XX_SP_PRIMITIVE_CNTL_VSOUT__SHIFT 0 +static inline uint32_t A5XX_SP_PRIMITIVE_CNTL_VSOUT(uint32_t val) +{ + return ((val) << A5XX_SP_PRIMITIVE_CNTL_VSOUT__SHIFT) & A5XX_SP_PRIMITIVE_CNTL_VSOUT__MASK; +} + +static inline uint32_t REG_A5XX_SP_VS_OUT(uint32_t i0) { return 0x0000e593 + 0x1*i0; } + +static inline uint32_t REG_A5XX_SP_VS_OUT_REG(uint32_t i0) { return 0x0000e593 + 0x1*i0; } +#define A5XX_SP_VS_OUT_REG_A_REGID__MASK 0x000000ff +#define A5XX_SP_VS_OUT_REG_A_REGID__SHIFT 0 +static inline uint32_t A5XX_SP_VS_OUT_REG_A_REGID(uint32_t val) +{ + return ((val) << A5XX_SP_VS_OUT_REG_A_REGID__SHIFT) & A5XX_SP_VS_OUT_REG_A_REGID__MASK; +} +#define A5XX_SP_VS_OUT_REG_A_COMPMASK__MASK 0x00000f00 +#define A5XX_SP_VS_OUT_REG_A_COMPMASK__SHIFT 8 +static inline uint32_t A5XX_SP_VS_OUT_REG_A_COMPMASK(uint32_t val) +{ + return ((val) << A5XX_SP_VS_OUT_REG_A_COMPMASK__SHIFT) & A5XX_SP_VS_OUT_REG_A_COMPMASK__MASK; +} +#define A5XX_SP_VS_OUT_REG_B_REGID__MASK 0x00ff0000 +#define A5XX_SP_VS_OUT_REG_B_REGID__SHIFT 16 +static inline uint32_t A5XX_SP_VS_OUT_REG_B_REGID(uint32_t val) +{ + return ((val) << A5XX_SP_VS_OUT_REG_B_REGID__SHIFT) & A5XX_SP_VS_OUT_REG_B_REGID__MASK; +} +#define A5XX_SP_VS_OUT_REG_B_COMPMASK__MASK 0x0f000000 +#define A5XX_SP_VS_OUT_REG_B_COMPMASK__SHIFT 24 +static inline uint32_t A5XX_SP_VS_OUT_REG_B_COMPMASK(uint32_t val) +{ + return ((val) << A5XX_SP_VS_OUT_REG_B_COMPMASK__SHIFT) & A5XX_SP_VS_OUT_REG_B_COMPMASK__MASK; +} + +static inline uint32_t REG_A5XX_SP_VS_VPC_DST(uint32_t i0) { return 0x0000e5a3 + 0x1*i0; } + +static inline uint32_t REG_A5XX_SP_VS_VPC_DST_REG(uint32_t i0) { return 0x0000e5a3 + 0x1*i0; } +#define A5XX_SP_VS_VPC_DST_REG_OUTLOC0__MASK 0x000000ff +#define A5XX_SP_VS_VPC_DST_REG_OUTLOC0__SHIFT 0 +static inline uint32_t A5XX_SP_VS_VPC_DST_REG_OUTLOC0(uint32_t val) +{ + return ((val) << A5XX_SP_VS_VPC_DST_REG_OUTLOC0__SHIFT) & A5XX_SP_VS_VPC_DST_REG_OUTLOC0__MASK; +} +#define A5XX_SP_VS_VPC_DST_REG_OUTLOC1__MASK 0x0000ff00 +#define A5XX_SP_VS_VPC_DST_REG_OUTLOC1__SHIFT 8 +static inline uint32_t A5XX_SP_VS_VPC_DST_REG_OUTLOC1(uint32_t val) +{ + return ((val) << A5XX_SP_VS_VPC_DST_REG_OUTLOC1__SHIFT) & A5XX_SP_VS_VPC_DST_REG_OUTLOC1__MASK; +} +#define A5XX_SP_VS_VPC_DST_REG_OUTLOC2__MASK 0x00ff0000 +#define A5XX_SP_VS_VPC_DST_REG_OUTLOC2__SHIFT 16 +static inline uint32_t A5XX_SP_VS_VPC_DST_REG_OUTLOC2(uint32_t val) +{ + return ((val) << A5XX_SP_VS_VPC_DST_REG_OUTLOC2__SHIFT) & A5XX_SP_VS_VPC_DST_REG_OUTLOC2__MASK; +} +#define A5XX_SP_VS_VPC_DST_REG_OUTLOC3__MASK 0xff000000 +#define A5XX_SP_VS_VPC_DST_REG_OUTLOC3__SHIFT 24 +static inline uint32_t A5XX_SP_VS_VPC_DST_REG_OUTLOC3(uint32_t val) +{ + return ((val) << A5XX_SP_VS_VPC_DST_REG_OUTLOC3__SHIFT) & A5XX_SP_VS_VPC_DST_REG_OUTLOC3__MASK; +} + +#define REG_A5XX_UNKNOWN_E5AB 0x0000e5ab + +#define REG_A5XX_SP_VS_OBJ_START_LO 0x0000e5ac + +#define REG_A5XX_SP_VS_OBJ_START_HI 0x0000e5ad + +#define REG_A5XX_SP_FS_CTRL_REG0 0x0000e5c0 +#define A5XX_SP_FS_CTRL_REG0_THREADSIZE__MASK 0x00000008 +#define A5XX_SP_FS_CTRL_REG0_THREADSIZE__SHIFT 3 +static inline uint32_t A5XX_SP_FS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val) +{ + return ((val) << A5XX_SP_FS_CTRL_REG0_THREADSIZE__SHIFT) & A5XX_SP_FS_CTRL_REG0_THREADSIZE__MASK; +} +#define A5XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT__MASK 0x000003f0 +#define A5XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT 4 +static inline uint32_t A5XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val) +{ + return ((val) << A5XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A5XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT__MASK; +} +#define A5XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT__MASK 0x0000fc00 +#define A5XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT 10 +static inline uint32_t A5XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val) +{ + return ((val) << A5XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A5XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT__MASK; +} +#define A5XX_SP_FS_CTRL_REG0_VARYING 0x00010000 +#define A5XX_SP_FS_CTRL_REG0_PIXLODENABLE 0x00100000 +#define A5XX_SP_FS_CTRL_REG0_BRANCHSTACK__MASK 0xfe000000 +#define A5XX_SP_FS_CTRL_REG0_BRANCHSTACK__SHIFT 25 +static inline uint32_t A5XX_SP_FS_CTRL_REG0_BRANCHSTACK(uint32_t val) +{ + return ((val) << A5XX_SP_FS_CTRL_REG0_BRANCHSTACK__SHIFT) & A5XX_SP_FS_CTRL_REG0_BRANCHSTACK__MASK; +} + +#define REG_A5XX_UNKNOWN_E5C2 0x0000e5c2 + +#define REG_A5XX_SP_FS_OBJ_START_LO 0x0000e5c3 + +#define REG_A5XX_SP_FS_OBJ_START_HI 0x0000e5c4 + +#define REG_A5XX_SP_BLEND_CNTL 0x0000e5c9 + +#define REG_A5XX_SP_FS_OUTPUT_CNTL 0x0000e5ca +#define A5XX_SP_FS_OUTPUT_CNTL_MRT__MASK 0x0000000f +#define A5XX_SP_FS_OUTPUT_CNTL_MRT__SHIFT 0 +static inline uint32_t A5XX_SP_FS_OUTPUT_CNTL_MRT(uint32_t val) +{ + return ((val) << A5XX_SP_FS_OUTPUT_CNTL_MRT__SHIFT) & A5XX_SP_FS_OUTPUT_CNTL_MRT__MASK; +} +#define A5XX_SP_FS_OUTPUT_CNTL_DEPTH_REGID__MASK 0x00001fe0 +#define A5XX_SP_FS_OUTPUT_CNTL_DEPTH_REGID__SHIFT 5 +static inline uint32_t A5XX_SP_FS_OUTPUT_CNTL_DEPTH_REGID(uint32_t val) +{ + return ((val) << A5XX_SP_FS_OUTPUT_CNTL_DEPTH_REGID__SHIFT) & A5XX_SP_FS_OUTPUT_CNTL_DEPTH_REGID__MASK; +} +#define A5XX_SP_FS_OUTPUT_CNTL_SAMPLEMASK_REGID__MASK 0x001fe000 +#define A5XX_SP_FS_OUTPUT_CNTL_SAMPLEMASK_REGID__SHIFT 13 +static inline uint32_t A5XX_SP_FS_OUTPUT_CNTL_SAMPLEMASK_REGID(uint32_t val) +{ + return ((val) << A5XX_SP_FS_OUTPUT_CNTL_SAMPLEMASK_REGID__SHIFT) & A5XX_SP_FS_OUTPUT_CNTL_SAMPLEMASK_REGID__MASK; +} + +static inline uint32_t REG_A5XX_SP_FS_OUTPUT(uint32_t i0) { return 0x0000e5cb + 0x1*i0; } + +static inline uint32_t REG_A5XX_SP_FS_OUTPUT_REG(uint32_t i0) { return 0x0000e5cb + 0x1*i0; } +#define A5XX_SP_FS_OUTPUT_REG_REGID__MASK 0x000000ff +#define A5XX_SP_FS_OUTPUT_REG_REGID__SHIFT 0 +static inline uint32_t A5XX_SP_FS_OUTPUT_REG_REGID(uint32_t val) +{ + return ((val) << A5XX_SP_FS_OUTPUT_REG_REGID__SHIFT) & A5XX_SP_FS_OUTPUT_REG_REGID__MASK; +} +#define A5XX_SP_FS_OUTPUT_REG_HALF_PRECISION 0x00000100 + +static inline uint32_t REG_A5XX_SP_FS_MRT(uint32_t i0) { return 0x0000e5d3 + 0x1*i0; } + +static inline uint32_t REG_A5XX_SP_FS_MRT_REG(uint32_t i0) { return 0x0000e5d3 + 0x1*i0; } +#define A5XX_SP_FS_MRT_REG_COLOR_FORMAT__MASK 0x000000ff +#define A5XX_SP_FS_MRT_REG_COLOR_FORMAT__SHIFT 0 +static inline uint32_t A5XX_SP_FS_MRT_REG_COLOR_FORMAT(enum a5xx_color_fmt val) +{ + return ((val) << A5XX_SP_FS_MRT_REG_COLOR_FORMAT__SHIFT) & A5XX_SP_FS_MRT_REG_COLOR_FORMAT__MASK; +} +#define A5XX_SP_FS_MRT_REG_COLOR_SRGB 0x00000400 + +#define REG_A5XX_UNKNOWN_E5DB 0x0000e5db + +#define REG_A5XX_SP_CS_CNTL_0 0x0000e5f0 + +#define REG_A5XX_UNKNOWN_E600 0x0000e600 + +#define REG_A5XX_UNKNOWN_E640 0x0000e640 + +#define REG_A5XX_TPL1_TP_RAS_MSAA_CNTL 0x0000e704 +#define A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES__MASK 0x00000003 +#define A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES__SHIFT 0 +static inline uint32_t A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val) +{ + return ((val) << A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES__MASK; +} + +#define REG_A5XX_TPL1_TP_DEST_MSAA_CNTL 0x0000e705 +#define A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES__MASK 0x00000003 +#define A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES__SHIFT 0 +static inline uint32_t A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val) +{ + return ((val) << A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES__MASK; +} +#define A5XX_TPL1_TP_DEST_MSAA_CNTL_MSAA_DISABLE 0x00000004 + +#define REG_A5XX_TPL1_TP_BORDER_COLOR_BASE_ADDR_LO 0x0000e706 + +#define REG_A5XX_TPL1_TP_BORDER_COLOR_BASE_ADDR_HI 0x0000e707 + +#define REG_A5XX_TPL1_VS_TEX_COUNT 0x0000e700 + +#define REG_A5XX_TPL1_VS_TEX_SAMP_LO 0x0000e722 + +#define REG_A5XX_TPL1_VS_TEX_SAMP_HI 0x0000e723 + +#define REG_A5XX_TPL1_VS_TEX_CONST_LO 0x0000e72a + +#define REG_A5XX_TPL1_VS_TEX_CONST_HI 0x0000e72b + +#define REG_A5XX_TPL1_FS_TEX_COUNT 0x0000e750 + +#define REG_A5XX_TPL1_FS_TEX_SAMP_LO 0x0000e75a + +#define REG_A5XX_TPL1_FS_TEX_SAMP_HI 0x0000e75b + +#define REG_A5XX_TPL1_FS_TEX_CONST_LO 0x0000e75e + +#define REG_A5XX_TPL1_FS_TEX_CONST_HI 0x0000e75f + +#define REG_A5XX_TPL1_TP_FS_ROTATION_CNTL 0x0000e764 + +#define REG_A5XX_HLSQ_CONTROL_0_REG 0x0000e784 +#define A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE__MASK 0x00000001 +#define A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE__SHIFT 0 +static inline uint32_t A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(enum a3xx_threadsize val) +{ + return ((val) << A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE__SHIFT) & A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE__MASK; +} + +#define REG_A5XX_HLSQ_CONTROL_1_REG 0x0000e785 +#define A5XX_HLSQ_CONTROL_1_REG_PRIMALLOCTHRESHOLD__MASK 0x0000003f +#define A5XX_HLSQ_CONTROL_1_REG_PRIMALLOCTHRESHOLD__SHIFT 0 +static inline uint32_t A5XX_HLSQ_CONTROL_1_REG_PRIMALLOCTHRESHOLD(uint32_t val) +{ + return ((val) << A5XX_HLSQ_CONTROL_1_REG_PRIMALLOCTHRESHOLD__SHIFT) & A5XX_HLSQ_CONTROL_1_REG_PRIMALLOCTHRESHOLD__MASK; +} + +#define REG_A5XX_HLSQ_CONTROL_2_REG 0x0000e786 +#define A5XX_HLSQ_CONTROL_2_REG_FACEREGID__MASK 0x000000ff +#define A5XX_HLSQ_CONTROL_2_REG_FACEREGID__SHIFT 0 +static inline uint32_t A5XX_HLSQ_CONTROL_2_REG_FACEREGID(uint32_t val) +{ + return ((val) << A5XX_HLSQ_CONTROL_2_REG_FACEREGID__SHIFT) & A5XX_HLSQ_CONTROL_2_REG_FACEREGID__MASK; +} + +#define REG_A5XX_HLSQ_CONTROL_3_REG 0x0000e787 +#define A5XX_HLSQ_CONTROL_3_REG_FRAGCOORDXYREGID__MASK 0x000000ff +#define A5XX_HLSQ_CONTROL_3_REG_FRAGCOORDXYREGID__SHIFT 0 +static inline uint32_t A5XX_HLSQ_CONTROL_3_REG_FRAGCOORDXYREGID(uint32_t val) +{ + return ((val) << A5XX_HLSQ_CONTROL_3_REG_FRAGCOORDXYREGID__SHIFT) & A5XX_HLSQ_CONTROL_3_REG_FRAGCOORDXYREGID__MASK; +} + +#define REG_A5XX_HLSQ_CONTROL_4_REG 0x0000e788 +#define A5XX_HLSQ_CONTROL_4_REG_XYCOORDREGID__MASK 0x00ff0000 +#define A5XX_HLSQ_CONTROL_4_REG_XYCOORDREGID__SHIFT 16 +static inline uint32_t A5XX_HLSQ_CONTROL_4_REG_XYCOORDREGID(uint32_t val) +{ + return ((val) << A5XX_HLSQ_CONTROL_4_REG_XYCOORDREGID__SHIFT) & A5XX_HLSQ_CONTROL_4_REG_XYCOORDREGID__MASK; +} +#define A5XX_HLSQ_CONTROL_4_REG_ZWCOORDREGID__MASK 0xff000000 +#define A5XX_HLSQ_CONTROL_4_REG_ZWCOORDREGID__SHIFT 24 +static inline uint32_t A5XX_HLSQ_CONTROL_4_REG_ZWCOORDREGID(uint32_t val) +{ + return ((val) << A5XX_HLSQ_CONTROL_4_REG_ZWCOORDREGID__SHIFT) & A5XX_HLSQ_CONTROL_4_REG_ZWCOORDREGID__MASK; +} + +#define REG_A5XX_HLSQ_UPDATE_CNTL 0x0000e78a + +#define REG_A5XX_HLSQ_VS_CONTROL_REG 0x0000e78b +#define A5XX_HLSQ_VS_CONTROL_REG_ENABLED 0x00000001 +#define A5XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET__MASK 0x000000fe +#define A5XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT 1 +static inline uint32_t A5XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val) +{ + return ((val) << A5XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET__MASK; +} +#define A5XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET__MASK 0x00007f00 +#define A5XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET__SHIFT 8 +static inline uint32_t A5XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val) +{ + return ((val) << A5XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET__MASK; +} + +#define REG_A5XX_HLSQ_FS_CONTROL_REG 0x0000e78c +#define A5XX_HLSQ_FS_CONTROL_REG_ENABLED 0x00000001 +#define A5XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET__MASK 0x000000fe +#define A5XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT 1 +static inline uint32_t A5XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val) +{ + return ((val) << A5XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET__MASK; +} +#define A5XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET__MASK 0x00007f00 +#define A5XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET__SHIFT 8 +static inline uint32_t A5XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val) +{ + return ((val) << A5XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET__MASK; +} + +#define REG_A5XX_HLSQ_HS_CONTROL_REG 0x0000e78d +#define A5XX_HLSQ_HS_CONTROL_REG_ENABLED 0x00000001 +#define A5XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET__MASK 0x000000fe +#define A5XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT 1 +static inline uint32_t A5XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val) +{ + return ((val) << A5XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET__MASK; +} +#define A5XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET__MASK 0x00007f00 +#define A5XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET__SHIFT 8 +static inline uint32_t A5XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val) +{ + return ((val) << A5XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET__MASK; +} + +#define REG_A5XX_HLSQ_DS_CONTROL_REG 0x0000e78e +#define A5XX_HLSQ_DS_CONTROL_REG_ENABLED 0x00000001 +#define A5XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET__MASK 0x000000fe +#define A5XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT 1 +static inline uint32_t A5XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val) +{ + return ((val) << A5XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET__MASK; +} +#define A5XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET__MASK 0x00007f00 +#define A5XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET__SHIFT 8 +static inline uint32_t A5XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val) +{ + return ((val) << A5XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET__MASK; +} + +#define REG_A5XX_HLSQ_GS_CONTROL_REG 0x0000e78f +#define A5XX_HLSQ_GS_CONTROL_REG_ENABLED 0x00000001 +#define A5XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET__MASK 0x000000fe +#define A5XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT 1 +static inline uint32_t A5XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val) +{ + return ((val) << A5XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET__MASK; +} +#define A5XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET__MASK 0x00007f00 +#define A5XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET__SHIFT 8 +static inline uint32_t A5XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val) +{ + return ((val) << A5XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET__MASK; +} + +#define REG_A5XX_HLSQ_CS_CONFIG 0x0000e790 + +#define REG_A5XX_HLSQ_VS_CNTL 0x0000e791 +#define A5XX_HLSQ_VS_CNTL_INSTRLEN__MASK 0xfffffffe +#define A5XX_HLSQ_VS_CNTL_INSTRLEN__SHIFT 1 +static inline uint32_t A5XX_HLSQ_VS_CNTL_INSTRLEN(uint32_t val) +{ + return ((val) << A5XX_HLSQ_VS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_VS_CNTL_INSTRLEN__MASK; +} + +#define REG_A5XX_HLSQ_FS_CNTL 0x0000e792 +#define A5XX_HLSQ_FS_CNTL_INSTRLEN__MASK 0xfffffffe +#define A5XX_HLSQ_FS_CNTL_INSTRLEN__SHIFT 1 +static inline uint32_t A5XX_HLSQ_FS_CNTL_INSTRLEN(uint32_t val) +{ + return ((val) << A5XX_HLSQ_FS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_FS_CNTL_INSTRLEN__MASK; +} + +#define REG_A5XX_HLSQ_HS_CNTL 0x0000e793 +#define A5XX_HLSQ_HS_CNTL_INSTRLEN__MASK 0xfffffffe +#define A5XX_HLSQ_HS_CNTL_INSTRLEN__SHIFT 1 +static inline uint32_t A5XX_HLSQ_HS_CNTL_INSTRLEN(uint32_t val) +{ + return ((val) << A5XX_HLSQ_HS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_HS_CNTL_INSTRLEN__MASK; +} + +#define REG_A5XX_HLSQ_DS_CNTL 0x0000e794 +#define A5XX_HLSQ_DS_CNTL_INSTRLEN__MASK 0xfffffffe +#define A5XX_HLSQ_DS_CNTL_INSTRLEN__SHIFT 1 +static inline uint32_t A5XX_HLSQ_DS_CNTL_INSTRLEN(uint32_t val) +{ + return ((val) << A5XX_HLSQ_DS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_DS_CNTL_INSTRLEN__MASK; +} + +#define REG_A5XX_HLSQ_GS_CNTL 0x0000e795 +#define A5XX_HLSQ_GS_CNTL_INSTRLEN__MASK 0xfffffffe +#define A5XX_HLSQ_GS_CNTL_INSTRLEN__SHIFT 1 +static inline uint32_t A5XX_HLSQ_GS_CNTL_INSTRLEN(uint32_t val) +{ + return ((val) << A5XX_HLSQ_GS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_GS_CNTL_INSTRLEN__MASK; +} + +#define REG_A5XX_HLSQ_CS_CNTL 0x0000e796 +#define A5XX_HLSQ_CS_CNTL_INSTRLEN__MASK 0xfffffffe +#define A5XX_HLSQ_CS_CNTL_INSTRLEN__SHIFT 1 +static inline uint32_t A5XX_HLSQ_CS_CNTL_INSTRLEN(uint32_t val) +{ + return ((val) << A5XX_HLSQ_CS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_CS_CNTL_INSTRLEN__MASK; +} + +#define REG_A5XX_HLSQ_CS_KERNEL_GROUP_X 0x0000e7b9 + +#define REG_A5XX_HLSQ_CS_KERNEL_GROUP_Y 0x0000e7ba + +#define REG_A5XX_HLSQ_CS_KERNEL_GROUP_Z 0x0000e7bb + +#define REG_A5XX_HLSQ_CS_NDRANGE_0 0x0000e7b0 + +#define REG_A5XX_HLSQ_CS_NDRANGE_1 0x0000e7b1 + +#define REG_A5XX_HLSQ_CS_NDRANGE_2 0x0000e7b2 + +#define REG_A5XX_HLSQ_CS_NDRANGE_3 0x0000e7b3 + +#define REG_A5XX_HLSQ_CS_NDRANGE_4 0x0000e7b4 + +#define REG_A5XX_HLSQ_CS_NDRANGE_5 0x0000e7b5 + +#define REG_A5XX_HLSQ_CS_NDRANGE_6 0x0000e7b6 + +#define REG_A5XX_HLSQ_CS_CNTL_0 0x0000e7b7 + +#define REG_A5XX_HLSQ_CS_CNTL_1 0x0000e7b8 + +#define REG_A5XX_UNKNOWN_E7C0 0x0000e7c0 + +#define REG_A5XX_HLSQ_VS_CONSTLEN 0x0000e7c3 + +#define REG_A5XX_HLSQ_VS_INSTRLEN 0x0000e7c4 + +#define REG_A5XX_UNKNOWN_E7C5 0x0000e7c5 + +#define REG_A5XX_UNKNOWN_E7CA 0x0000e7ca + +#define REG_A5XX_HLSQ_FS_CONSTLEN 0x0000e7d7 + +#define REG_A5XX_HLSQ_FS_INSTRLEN 0x0000e7d8 + +#define REG_A5XX_HLSQ_HS_CONSTLEN 0x0000e7c8 + +#define REG_A5XX_HLSQ_HS_INSTRLEN 0x0000e7c9 + +#define REG_A5XX_HLSQ_DS_CONSTLEN 0x0000e7cd + +#define REG_A5XX_HLSQ_DS_INSTRLEN 0x0000e7ce + +#define REG_A5XX_UNKNOWN_E7CF 0x0000e7cf + +#define REG_A5XX_HLSQ_GS_CONSTLEN 0x0000e7d2 + +#define REG_A5XX_HLSQ_GS_INSTRLEN 0x0000e7d3 + +#define REG_A5XX_UNKNOWN_E7D4 0x0000e7d4 + +#define REG_A5XX_UNKNOWN_E7D9 0x0000e7d9 + +#define REG_A5XX_HLSQ_CONTEXT_SWITCH_CS_SW_3 0x0000e7dc + +#define REG_A5XX_HLSQ_CONTEXT_SWITCH_CS_SW_4 0x0000e7dd + +#define REG_A5XX_RB_2D_SRC_SOLID_DW0 0x00002101 + +#define REG_A5XX_RB_2D_SRC_SOLID_DW1 0x00002102 + +#define REG_A5XX_RB_2D_SRC_SOLID_DW2 0x00002103 + +#define REG_A5XX_RB_2D_SRC_SOLID_DW3 0x00002104 + +#define REG_A5XX_RB_2D_SRC_INFO 0x00002107 +#define A5XX_RB_2D_SRC_INFO_COLOR_FORMAT__MASK 0x000000ff +#define A5XX_RB_2D_SRC_INFO_COLOR_FORMAT__SHIFT 0 +static inline uint32_t A5XX_RB_2D_SRC_INFO_COLOR_FORMAT(enum a5xx_color_fmt val) +{ + return ((val) << A5XX_RB_2D_SRC_INFO_COLOR_FORMAT__SHIFT) & A5XX_RB_2D_SRC_INFO_COLOR_FORMAT__MASK; +} +#define A5XX_RB_2D_SRC_INFO_COLOR_SWAP__MASK 0x00000c00 +#define A5XX_RB_2D_SRC_INFO_COLOR_SWAP__SHIFT 10 +static inline uint32_t A5XX_RB_2D_SRC_INFO_COLOR_SWAP(enum a3xx_color_swap val) +{ + return ((val) << A5XX_RB_2D_SRC_INFO_COLOR_SWAP__SHIFT) & A5XX_RB_2D_SRC_INFO_COLOR_SWAP__MASK; +} + +#define REG_A5XX_RB_2D_SRC_LO 0x00002108 + +#define REG_A5XX_RB_2D_SRC_HI 0x00002109 + +#define REG_A5XX_RB_2D_SRC_SIZE 0x0000210a +#define A5XX_RB_2D_SRC_SIZE_PITCH__MASK 0x0000ffff +#define A5XX_RB_2D_SRC_SIZE_PITCH__SHIFT 0 +static inline uint32_t A5XX_RB_2D_SRC_SIZE_PITCH(uint32_t val) +{ + assert(!(val & 0x3f)); + return ((val >> 6) << A5XX_RB_2D_SRC_SIZE_PITCH__SHIFT) & A5XX_RB_2D_SRC_SIZE_PITCH__MASK; +} +#define A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH__MASK 0xffff0000 +#define A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH__SHIFT 16 +static inline uint32_t A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH(uint32_t val) +{ + assert(!(val & 0x3f)); + return ((val >> 6) << A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH__SHIFT) & A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH__MASK; +} + +#define REG_A5XX_RB_2D_DST_INFO 0x00002110 +#define A5XX_RB_2D_DST_INFO_COLOR_FORMAT__MASK 0x000000ff +#define A5XX_RB_2D_DST_INFO_COLOR_FORMAT__SHIFT 0 +static inline uint32_t A5XX_RB_2D_DST_INFO_COLOR_FORMAT(enum a5xx_color_fmt val) +{ + return ((val) << A5XX_RB_2D_DST_INFO_COLOR_FORMAT__SHIFT) & A5XX_RB_2D_DST_INFO_COLOR_FORMAT__MASK; +} +#define A5XX_RB_2D_DST_INFO_COLOR_SWAP__MASK 0x00000c00 +#define A5XX_RB_2D_DST_INFO_COLOR_SWAP__SHIFT 10 +static inline uint32_t A5XX_RB_2D_DST_INFO_COLOR_SWAP(enum a3xx_color_swap val) +{ + return ((val) << A5XX_RB_2D_DST_INFO_COLOR_SWAP__SHIFT) & A5XX_RB_2D_DST_INFO_COLOR_SWAP__MASK; +} + +#define REG_A5XX_RB_2D_DST_LO 0x00002111 + +#define REG_A5XX_RB_2D_DST_HI 0x00002112 + +#define REG_A5XX_RB_2D_DST_SIZE 0x00002113 +#define A5XX_RB_2D_DST_SIZE_PITCH__MASK 0x0000ffff +#define A5XX_RB_2D_DST_SIZE_PITCH__SHIFT 0 +static inline uint32_t A5XX_RB_2D_DST_SIZE_PITCH(uint32_t val) +{ + assert(!(val & 0x3f)); + return ((val >> 6) << A5XX_RB_2D_DST_SIZE_PITCH__SHIFT) & A5XX_RB_2D_DST_SIZE_PITCH__MASK; +} +#define A5XX_RB_2D_DST_SIZE_ARRAY_PITCH__MASK 0xffff0000 +#define A5XX_RB_2D_DST_SIZE_ARRAY_PITCH__SHIFT 16 +static inline uint32_t A5XX_RB_2D_DST_SIZE_ARRAY_PITCH(uint32_t val) +{ + assert(!(val & 0x3f)); + return ((val >> 6) << A5XX_RB_2D_DST_SIZE_ARRAY_PITCH__SHIFT) & A5XX_RB_2D_DST_SIZE_ARRAY_PITCH__MASK; +} + +#define REG_A5XX_RB_2D_SRC_FLAGS_LO 0x00002140 + +#define REG_A5XX_RB_2D_SRC_FLAGS_HI 0x00002141 + +#define REG_A5XX_RB_2D_DST_FLAGS_LO 0x00002143 + +#define REG_A5XX_RB_2D_DST_FLAGS_HI 0x00002144 + +#define REG_A5XX_GRAS_2D_SRC_INFO 0x00002181 +#define A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT__MASK 0x000000ff +#define A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT__SHIFT 0 +static inline uint32_t A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT(enum a5xx_color_fmt val) +{ + return ((val) << A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT__SHIFT) & A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT__MASK; +} +#define A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP__MASK 0x00000c00 +#define A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP__SHIFT 10 +static inline uint32_t A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP(enum a3xx_color_swap val) +{ + return ((val) << A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP__SHIFT) & A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP__MASK; +} + +#define REG_A5XX_GRAS_2D_DST_INFO 0x00002182 +#define A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT__MASK 0x000000ff +#define A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT__SHIFT 0 +static inline uint32_t A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT(enum a5xx_color_fmt val) +{ + return ((val) << A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT__SHIFT) & A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT__MASK; +} +#define A5XX_GRAS_2D_DST_INFO_COLOR_SWAP__MASK 0x00000c00 +#define A5XX_GRAS_2D_DST_INFO_COLOR_SWAP__SHIFT 10 +static inline uint32_t A5XX_GRAS_2D_DST_INFO_COLOR_SWAP(enum a3xx_color_swap val) +{ + return ((val) << A5XX_GRAS_2D_DST_INFO_COLOR_SWAP__SHIFT) & A5XX_GRAS_2D_DST_INFO_COLOR_SWAP__MASK; +} + +#define REG_A5XX_UNKNOWN_2100 0x00002100 + +#define REG_A5XX_UNKNOWN_2180 0x00002180 + +#define REG_A5XX_UNKNOWN_2184 0x00002184 + +#define REG_A5XX_TEX_SAMP_0 0x00000000 +#define A5XX_TEX_SAMP_0_MIPFILTER_LINEAR_NEAR 0x00000001 +#define A5XX_TEX_SAMP_0_XY_MAG__MASK 0x00000006 +#define A5XX_TEX_SAMP_0_XY_MAG__SHIFT 1 +static inline uint32_t A5XX_TEX_SAMP_0_XY_MAG(enum a5xx_tex_filter val) +{ + return ((val) << A5XX_TEX_SAMP_0_XY_MAG__SHIFT) & A5XX_TEX_SAMP_0_XY_MAG__MASK; +} +#define A5XX_TEX_SAMP_0_XY_MIN__MASK 0x00000018 +#define A5XX_TEX_SAMP_0_XY_MIN__SHIFT 3 +static inline uint32_t A5XX_TEX_SAMP_0_XY_MIN(enum a5xx_tex_filter val) +{ + return ((val) << A5XX_TEX_SAMP_0_XY_MIN__SHIFT) & A5XX_TEX_SAMP_0_XY_MIN__MASK; +} +#define A5XX_TEX_SAMP_0_WRAP_S__MASK 0x000000e0 +#define A5XX_TEX_SAMP_0_WRAP_S__SHIFT 5 +static inline uint32_t A5XX_TEX_SAMP_0_WRAP_S(enum a5xx_tex_clamp val) +{ + return ((val) << A5XX_TEX_SAMP_0_WRAP_S__SHIFT) & A5XX_TEX_SAMP_0_WRAP_S__MASK; +} +#define A5XX_TEX_SAMP_0_WRAP_T__MASK 0x00000700 +#define A5XX_TEX_SAMP_0_WRAP_T__SHIFT 8 +static inline uint32_t A5XX_TEX_SAMP_0_WRAP_T(enum a5xx_tex_clamp val) +{ + return ((val) << A5XX_TEX_SAMP_0_WRAP_T__SHIFT) & A5XX_TEX_SAMP_0_WRAP_T__MASK; +} +#define A5XX_TEX_SAMP_0_WRAP_R__MASK 0x00003800 +#define A5XX_TEX_SAMP_0_WRAP_R__SHIFT 11 +static inline uint32_t A5XX_TEX_SAMP_0_WRAP_R(enum a5xx_tex_clamp val) +{ + return ((val) << A5XX_TEX_SAMP_0_WRAP_R__SHIFT) & A5XX_TEX_SAMP_0_WRAP_R__MASK; +} +#define A5XX_TEX_SAMP_0_ANISO__MASK 0x0001c000 +#define A5XX_TEX_SAMP_0_ANISO__SHIFT 14 +static inline uint32_t A5XX_TEX_SAMP_0_ANISO(enum a5xx_tex_aniso val) +{ + return ((val) << A5XX_TEX_SAMP_0_ANISO__SHIFT) & A5XX_TEX_SAMP_0_ANISO__MASK; +} +#define A5XX_TEX_SAMP_0_LOD_BIAS__MASK 0xfff80000 +#define A5XX_TEX_SAMP_0_LOD_BIAS__SHIFT 19 +static inline uint32_t A5XX_TEX_SAMP_0_LOD_BIAS(float val) +{ + return ((((int32_t)(val * 256.0))) << A5XX_TEX_SAMP_0_LOD_BIAS__SHIFT) & A5XX_TEX_SAMP_0_LOD_BIAS__MASK; +} + +#define REG_A5XX_TEX_SAMP_1 0x00000001 +#define A5XX_TEX_SAMP_1_COMPARE_FUNC__MASK 0x0000000e +#define A5XX_TEX_SAMP_1_COMPARE_FUNC__SHIFT 1 +static inline uint32_t A5XX_TEX_SAMP_1_COMPARE_FUNC(enum adreno_compare_func val) +{ + return ((val) << A5XX_TEX_SAMP_1_COMPARE_FUNC__SHIFT) & A5XX_TEX_SAMP_1_COMPARE_FUNC__MASK; +} +#define A5XX_TEX_SAMP_1_CUBEMAPSEAMLESSFILTOFF 0x00000010 +#define A5XX_TEX_SAMP_1_UNNORM_COORDS 0x00000020 +#define A5XX_TEX_SAMP_1_MIPFILTER_LINEAR_FAR 0x00000040 +#define A5XX_TEX_SAMP_1_MAX_LOD__MASK 0x000fff00 +#define A5XX_TEX_SAMP_1_MAX_LOD__SHIFT 8 +static inline uint32_t A5XX_TEX_SAMP_1_MAX_LOD(float val) +{ + return ((((uint32_t)(val * 256.0))) << A5XX_TEX_SAMP_1_MAX_LOD__SHIFT) & A5XX_TEX_SAMP_1_MAX_LOD__MASK; +} +#define A5XX_TEX_SAMP_1_MIN_LOD__MASK 0xfff00000 +#define A5XX_TEX_SAMP_1_MIN_LOD__SHIFT 20 +static inline uint32_t A5XX_TEX_SAMP_1_MIN_LOD(float val) +{ + return ((((uint32_t)(val * 256.0))) << A5XX_TEX_SAMP_1_MIN_LOD__SHIFT) & A5XX_TEX_SAMP_1_MIN_LOD__MASK; +} + +#define REG_A5XX_TEX_SAMP_2 0x00000002 +#define A5XX_TEX_SAMP_2_BCOLOR_OFFSET__MASK 0xfffffff0 +#define A5XX_TEX_SAMP_2_BCOLOR_OFFSET__SHIFT 4 +static inline uint32_t A5XX_TEX_SAMP_2_BCOLOR_OFFSET(uint32_t val) +{ + return ((val) << A5XX_TEX_SAMP_2_BCOLOR_OFFSET__SHIFT) & A5XX_TEX_SAMP_2_BCOLOR_OFFSET__MASK; +} + +#define REG_A5XX_TEX_SAMP_3 0x00000003 + +#define REG_A5XX_TEX_CONST_0 0x00000000 +#define A5XX_TEX_CONST_0_TILE_MODE__MASK 0x00000003 +#define A5XX_TEX_CONST_0_TILE_MODE__SHIFT 0 +static inline uint32_t A5XX_TEX_CONST_0_TILE_MODE(enum a5xx_tile_mode val) +{ + return ((val) << A5XX_TEX_CONST_0_TILE_MODE__SHIFT) & A5XX_TEX_CONST_0_TILE_MODE__MASK; +} +#define A5XX_TEX_CONST_0_SRGB 0x00000004 +#define A5XX_TEX_CONST_0_SWIZ_X__MASK 0x00000070 +#define A5XX_TEX_CONST_0_SWIZ_X__SHIFT 4 +static inline uint32_t A5XX_TEX_CONST_0_SWIZ_X(enum a5xx_tex_swiz val) +{ + return ((val) << A5XX_TEX_CONST_0_SWIZ_X__SHIFT) & A5XX_TEX_CONST_0_SWIZ_X__MASK; +} +#define A5XX_TEX_CONST_0_SWIZ_Y__MASK 0x00000380 +#define A5XX_TEX_CONST_0_SWIZ_Y__SHIFT 7 +static inline uint32_t A5XX_TEX_CONST_0_SWIZ_Y(enum a5xx_tex_swiz val) +{ + return ((val) << A5XX_TEX_CONST_0_SWIZ_Y__SHIFT) & A5XX_TEX_CONST_0_SWIZ_Y__MASK; +} +#define A5XX_TEX_CONST_0_SWIZ_Z__MASK 0x00001c00 +#define A5XX_TEX_CONST_0_SWIZ_Z__SHIFT 10 +static inline uint32_t A5XX_TEX_CONST_0_SWIZ_Z(enum a5xx_tex_swiz val) +{ + return ((val) << A5XX_TEX_CONST_0_SWIZ_Z__SHIFT) & A5XX_TEX_CONST_0_SWIZ_Z__MASK; +} +#define A5XX_TEX_CONST_0_SWIZ_W__MASK 0x0000e000 +#define A5XX_TEX_CONST_0_SWIZ_W__SHIFT 13 +static inline uint32_t A5XX_TEX_CONST_0_SWIZ_W(enum a5xx_tex_swiz val) +{ + return ((val) << A5XX_TEX_CONST_0_SWIZ_W__SHIFT) & A5XX_TEX_CONST_0_SWIZ_W__MASK; +} +#define A5XX_TEX_CONST_0_MIPLVLS__MASK 0x000f0000 +#define A5XX_TEX_CONST_0_MIPLVLS__SHIFT 16 +static inline uint32_t A5XX_TEX_CONST_0_MIPLVLS(uint32_t val) +{ + return ((val) << A5XX_TEX_CONST_0_MIPLVLS__SHIFT) & A5XX_TEX_CONST_0_MIPLVLS__MASK; +} +#define A5XX_TEX_CONST_0_FMT__MASK 0x3fc00000 +#define A5XX_TEX_CONST_0_FMT__SHIFT 22 +static inline uint32_t A5XX_TEX_CONST_0_FMT(enum a5xx_tex_fmt val) +{ + return ((val) << A5XX_TEX_CONST_0_FMT__SHIFT) & A5XX_TEX_CONST_0_FMT__MASK; +} +#define A5XX_TEX_CONST_0_SWAP__MASK 0xc0000000 +#define A5XX_TEX_CONST_0_SWAP__SHIFT 30 +static inline uint32_t A5XX_TEX_CONST_0_SWAP(enum a3xx_color_swap val) +{ + return ((val) << A5XX_TEX_CONST_0_SWAP__SHIFT) & A5XX_TEX_CONST_0_SWAP__MASK; +} + +#define REG_A5XX_TEX_CONST_1 0x00000001 +#define A5XX_TEX_CONST_1_WIDTH__MASK 0x00007fff +#define A5XX_TEX_CONST_1_WIDTH__SHIFT 0 +static inline uint32_t A5XX_TEX_CONST_1_WIDTH(uint32_t val) +{ + return ((val) << A5XX_TEX_CONST_1_WIDTH__SHIFT) & A5XX_TEX_CONST_1_WIDTH__MASK; +} +#define A5XX_TEX_CONST_1_HEIGHT__MASK 0x3fff8000 +#define A5XX_TEX_CONST_1_HEIGHT__SHIFT 15 +static inline uint32_t A5XX_TEX_CONST_1_HEIGHT(uint32_t val) +{ + return ((val) << A5XX_TEX_CONST_1_HEIGHT__SHIFT) & A5XX_TEX_CONST_1_HEIGHT__MASK; +} + +#define REG_A5XX_TEX_CONST_2 0x00000002 +#define A5XX_TEX_CONST_2_FETCHSIZE__MASK 0x0000000f +#define A5XX_TEX_CONST_2_FETCHSIZE__SHIFT 0 +static inline uint32_t A5XX_TEX_CONST_2_FETCHSIZE(enum a5xx_tex_fetchsize val) +{ + return ((val) << A5XX_TEX_CONST_2_FETCHSIZE__SHIFT) & A5XX_TEX_CONST_2_FETCHSIZE__MASK; +} +#define A5XX_TEX_CONST_2_PITCH__MASK 0x1fffff80 +#define A5XX_TEX_CONST_2_PITCH__SHIFT 7 +static inline uint32_t A5XX_TEX_CONST_2_PITCH(uint32_t val) +{ + return ((val) << A5XX_TEX_CONST_2_PITCH__SHIFT) & A5XX_TEX_CONST_2_PITCH__MASK; +} +#define A5XX_TEX_CONST_2_TYPE__MASK 0x60000000 +#define A5XX_TEX_CONST_2_TYPE__SHIFT 29 +static inline uint32_t A5XX_TEX_CONST_2_TYPE(enum a5xx_tex_type val) +{ + return ((val) << A5XX_TEX_CONST_2_TYPE__SHIFT) & A5XX_TEX_CONST_2_TYPE__MASK; +} + +#define REG_A5XX_TEX_CONST_3 0x00000003 +#define A5XX_TEX_CONST_3_ARRAY_PITCH__MASK 0x00003fff +#define A5XX_TEX_CONST_3_ARRAY_PITCH__SHIFT 0 +static inline uint32_t A5XX_TEX_CONST_3_ARRAY_PITCH(uint32_t val) +{ + assert(!(val & 0xfff)); + return ((val >> 12) << A5XX_TEX_CONST_3_ARRAY_PITCH__SHIFT) & A5XX_TEX_CONST_3_ARRAY_PITCH__MASK; +} +#define A5XX_TEX_CONST_3_FLAG 0x10000000 + +#define REG_A5XX_TEX_CONST_4 0x00000004 +#define A5XX_TEX_CONST_4_BASE_LO__MASK 0xffffffe0 +#define A5XX_TEX_CONST_4_BASE_LO__SHIFT 5 +static inline uint32_t A5XX_TEX_CONST_4_BASE_LO(uint32_t val) +{ + assert(!(val & 0x1f)); + return ((val >> 5) << A5XX_TEX_CONST_4_BASE_LO__SHIFT) & A5XX_TEX_CONST_4_BASE_LO__MASK; +} + +#define REG_A5XX_TEX_CONST_5 0x00000005 +#define A5XX_TEX_CONST_5_BASE_HI__MASK 0x0001ffff +#define A5XX_TEX_CONST_5_BASE_HI__SHIFT 0 +static inline uint32_t A5XX_TEX_CONST_5_BASE_HI(uint32_t val) +{ + return ((val) << A5XX_TEX_CONST_5_BASE_HI__SHIFT) & A5XX_TEX_CONST_5_BASE_HI__MASK; +} +#define A5XX_TEX_CONST_5_DEPTH__MASK 0x3ffe0000 +#define A5XX_TEX_CONST_5_DEPTH__SHIFT 17 +static inline uint32_t A5XX_TEX_CONST_5_DEPTH(uint32_t val) +{ + return ((val) << A5XX_TEX_CONST_5_DEPTH__SHIFT) & A5XX_TEX_CONST_5_DEPTH__MASK; +} + +#define REG_A5XX_TEX_CONST_6 0x00000006 + +#define REG_A5XX_TEX_CONST_7 0x00000007 + +#define REG_A5XX_TEX_CONST_8 0x00000008 + +#define REG_A5XX_TEX_CONST_9 0x00000009 + +#define REG_A5XX_TEX_CONST_10 0x0000000a + +#define REG_A5XX_TEX_CONST_11 0x0000000b + + +#endif /* A5XX_XML */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_blend.c mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_blend.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_blend.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_blend.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,144 @@ +/* + * Copyright (C) 2016 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#include "pipe/p_state.h" +#include "util/u_blend.h" +#include "util/u_string.h" +#include "util/u_memory.h" + +#include "fd5_blend.h" +#include "fd5_context.h" +#include "fd5_format.h" + +// XXX move somewhere common.. same across a3xx/a4xx/a5xx.. +static enum a3xx_rb_blend_opcode +blend_func(unsigned func) +{ + switch (func) { + case PIPE_BLEND_ADD: + return BLEND_DST_PLUS_SRC; + case PIPE_BLEND_MIN: + return BLEND_MIN_DST_SRC; + case PIPE_BLEND_MAX: + return BLEND_MAX_DST_SRC; + case PIPE_BLEND_SUBTRACT: + return BLEND_SRC_MINUS_DST; + case PIPE_BLEND_REVERSE_SUBTRACT: + return BLEND_DST_MINUS_SRC; + default: + DBG("invalid blend func: %x", func); + return 0; + } +} + +void * +fd5_blend_state_create(struct pipe_context *pctx, + const struct pipe_blend_state *cso) +{ + struct fd5_blend_stateobj *so; +// enum a3xx_rop_code rop = ROP_COPY; + bool reads_dest = false; + unsigned i, mrt_blend = 0; + + if (cso->logicop_enable) { +// rop = cso->logicop_func; /* maps 1:1 */ + + switch (cso->logicop_func) { + case PIPE_LOGICOP_NOR: + case PIPE_LOGICOP_AND_INVERTED: + case PIPE_LOGICOP_AND_REVERSE: + case PIPE_LOGICOP_INVERT: + case PIPE_LOGICOP_XOR: + case PIPE_LOGICOP_NAND: + case PIPE_LOGICOP_AND: + case PIPE_LOGICOP_EQUIV: + case PIPE_LOGICOP_NOOP: + case PIPE_LOGICOP_OR_INVERTED: + case PIPE_LOGICOP_OR_REVERSE: + case PIPE_LOGICOP_OR: + reads_dest = true; + break; + } + } + + so = CALLOC_STRUCT(fd5_blend_stateobj); + if (!so) + return NULL; + + so->base = *cso; + + for (i = 0; i < ARRAY_SIZE(so->rb_mrt); i++) { + const struct pipe_rt_blend_state *rt; + + if (cso->independent_blend_enable) + rt = &cso->rt[i]; + else + rt = &cso->rt[0]; + + so->rb_mrt[i].blend_control_rgb = + A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(fd_blend_factor(rt->rgb_src_factor)) | + A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(blend_func(rt->rgb_func)) | + A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(fd_blend_factor(rt->rgb_dst_factor)); + + so->rb_mrt[i].blend_control_alpha = + A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(fd_blend_factor(rt->alpha_src_factor)) | + A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(blend_func(rt->alpha_func)) | + A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(fd_blend_factor(rt->alpha_dst_factor)); + + so->rb_mrt[i].blend_control_no_alpha_rgb = + A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(fd_blend_factor(util_blend_dst_alpha_to_one(rt->rgb_src_factor))) | + A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(blend_func(rt->rgb_func)) | + A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(fd_blend_factor(util_blend_dst_alpha_to_one(rt->rgb_dst_factor))); + + + so->rb_mrt[i].control = +// A5XX_RB_MRT_CONTROL_ROP_CODE(rop) | +// COND(cso->logicop_enable, A5XX_RB_MRT_CONTROL_ROP_ENABLE) | + 0x60 | /* XXX set other than RECTLIST clear blits?? */ + A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE(rt->colormask); + + if (rt->blend_enable) { + so->rb_mrt[i].control |= +// A5XX_RB_MRT_CONTROL_READ_DEST_ENABLE | + A5XX_RB_MRT_CONTROL_BLEND | + A5XX_RB_MRT_CONTROL_BLEND2; + mrt_blend |= (1 << i); + } + + if (reads_dest) { +// so->rb_mrt[i].control |= A5XX_RB_MRT_CONTROL_READ_DEST_ENABLE; + mrt_blend |= (1 << i); + } + +// if (cso->dither) +// so->rb_mrt[i].buf_info |= A5XX_RB_MRT_BUF_INFO_DITHER_MODE(DITHER_ALWAYS); + } + + so->rb_blend_cntl = A5XX_RB_BLEND_CNTL_ENABLE_BLEND(mrt_blend) | + COND(cso->independent_blend_enable, A5XX_RB_BLEND_CNTL_INDEPENDENT_BLEND); + + return so; +} diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_blend.h mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_blend.h --- mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_blend.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_blend.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,60 @@ +/* + * Copyright (C) 2016 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#ifndef FD5_BLEND_H_ +#define FD5_BLEND_H_ + +#include "pipe/p_state.h" +#include "pipe/p_context.h" + +#include "freedreno_util.h" + +struct fd5_blend_stateobj { + struct pipe_blend_state base; + + struct { + uint32_t control; + uint32_t buf_info; + /* Blend control bits for color if there is an alpha channel */ + uint32_t blend_control_rgb; + /* Blend control bits for color if there is no alpha channel */ + uint32_t blend_control_no_alpha_rgb; + /* Blend control bits for alpha channel */ + uint32_t blend_control_alpha; + } rb_mrt[A5XX_MAX_RENDER_TARGETS]; + uint32_t rb_blend_cntl; +}; + +static inline struct fd5_blend_stateobj * +fd5_blend_stateobj(struct pipe_blend_state *blend) +{ + return (struct fd5_blend_stateobj *)blend; +} + +void * fd5_blend_state_create(struct pipe_context *pctx, + const struct pipe_blend_state *cso); + +#endif /* FD5_BLEND_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_context.c mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_context.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_context.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,117 @@ +/* + * Copyright (C) 2016 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + + +#include "fd5_context.h" +#include "fd5_blend.h" +#include "fd5_draw.h" +#include "fd5_emit.h" +#include "fd5_gmem.h" +#include "fd5_program.h" +#include "fd5_query.h" +#include "fd5_rasterizer.h" +#include "fd5_texture.h" +#include "fd5_zsa.h" + +static void +fd5_context_destroy(struct pipe_context *pctx) +{ + struct fd5_context *fd5_ctx = fd5_context(fd_context(pctx)); + + fd_bo_del(fd5_ctx->vs_pvt_mem); + fd_bo_del(fd5_ctx->fs_pvt_mem); + fd_bo_del(fd5_ctx->vsc_size_mem); + fd_bo_del(fd5_ctx->blit_mem); + + fd_context_cleanup_common_vbos(&fd5_ctx->base); + + u_upload_destroy(fd5_ctx->border_color_uploader); + + fd_context_destroy(pctx); +} + +static const uint8_t primtypes[] = { + [PIPE_PRIM_POINTS] = DI_PT_POINTLIST, + [PIPE_PRIM_LINES] = DI_PT_LINELIST, + [PIPE_PRIM_LINE_STRIP] = DI_PT_LINESTRIP, + [PIPE_PRIM_LINE_LOOP] = DI_PT_LINELOOP, + [PIPE_PRIM_TRIANGLES] = DI_PT_TRILIST, + [PIPE_PRIM_TRIANGLE_STRIP] = DI_PT_TRISTRIP, + [PIPE_PRIM_TRIANGLE_FAN] = DI_PT_TRIFAN, + [PIPE_PRIM_MAX] = DI_PT_RECTLIST, /* internal clear blits */ +}; + +struct pipe_context * +fd5_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags) +{ + struct fd_screen *screen = fd_screen(pscreen); + struct fd5_context *fd5_ctx = CALLOC_STRUCT(fd5_context); + struct pipe_context *pctx; + + if (!fd5_ctx) + return NULL; + + pctx = &fd5_ctx->base.base; + + fd5_ctx->base.dev = fd_device_ref(screen->dev); + fd5_ctx->base.screen = fd_screen(pscreen); + + pctx->destroy = fd5_context_destroy; + pctx->create_blend_state = fd5_blend_state_create; + pctx->create_rasterizer_state = fd5_rasterizer_state_create; + pctx->create_depth_stencil_alpha_state = fd5_zsa_state_create; + + fd5_draw_init(pctx); + fd5_gmem_init(pctx); + fd5_texture_init(pctx); + fd5_prog_init(pctx); + fd5_emit_init(pctx); + + pctx = fd_context_init(&fd5_ctx->base, pscreen, primtypes, priv); + if (!pctx) + return NULL; + + fd5_ctx->vs_pvt_mem = fd_bo_new(screen->dev, 0x2000, + DRM_FREEDRENO_GEM_TYPE_KMEM); + + fd5_ctx->fs_pvt_mem = fd_bo_new(screen->dev, 0x2000, + DRM_FREEDRENO_GEM_TYPE_KMEM); + + fd5_ctx->vsc_size_mem = fd_bo_new(screen->dev, 0x1000, + DRM_FREEDRENO_GEM_TYPE_KMEM); + + fd5_ctx->blit_mem = fd_bo_new(screen->dev, 0x1000, + DRM_FREEDRENO_GEM_TYPE_KMEM); + + fd_context_setup_common_vbos(&fd5_ctx->base); + + fd5_query_context_init(pctx); + + fd5_ctx->border_color_uploader = u_upload_create(pctx, 4096, 0, + PIPE_USAGE_STREAM); + + return pctx; +} diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_context.h mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_context.h --- mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_context.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_context.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,94 @@ +/* + * Copyright (C) 2016 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#ifndef FD5_CONTEXT_H_ +#define FD5_CONTEXT_H_ + +#include "util/u_upload_mgr.h" + +#include "freedreno_drmif.h" + +#include "freedreno_context.h" + +#include "ir3_shader.h" + +struct fd5_context { + struct fd_context base; + + struct fd_bo *vs_pvt_mem, *fs_pvt_mem; + + /* This only needs to be 4 * num_of_pipes bytes (ie. 32 bytes). We + * could combine it with another allocation. + * + * (upper area used as scratch bo.. see fd5_query) + * + * XXX remove if unneeded after binning r/e.. + */ + struct fd_bo *vsc_size_mem; + + /* TODO not sure what this is for.. probably similar to + * CACHE_FLUSH_TS on kernel side, where value gets written + * to this address synchronized w/ 3d (ie. a way to + * synchronize when the CP is running far ahead) + */ + struct fd_bo *blit_mem; + + struct u_upload_mgr *border_color_uploader; + struct pipe_resource *border_color_buf; + + /* if *any* of bits are set in {v,f}saturate_{s,t,r} */ + bool vsaturate, fsaturate; + + /* bitmask of sampler which needs coords clamped for vertex + * shader: + */ + uint16_t vsaturate_s, vsaturate_t, vsaturate_r; + + /* bitmask of sampler which needs coords clamped for frag + * shader: + */ + uint16_t fsaturate_s, fsaturate_t, fsaturate_r; + + /* bitmask of samplers which need astc srgb workaround: */ + uint16_t vastc_srgb, fastc_srgb; + + /* some state changes require a different shader variant. Keep + * track of this so we know when we need to re-emit shader state + * due to variant change. See fixup_shader_state() + */ + struct ir3_shader_key last_key; +}; + +static inline struct fd5_context * +fd5_context(struct fd_context *ctx) +{ + return (struct fd5_context *)ctx; +} + +struct pipe_context * +fd5_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags); + +#endif /* FD5_CONTEXT_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_draw.c mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_draw.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_draw.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_draw.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,302 @@ +/* + * Copyright (C) 2016 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#include "pipe/p_state.h" +#include "util/u_string.h" +#include "util/u_memory.h" +#include "util/u_prim.h" + +#include "freedreno_state.h" +#include "freedreno_resource.h" + +#include "fd5_draw.h" +#include "fd5_context.h" +#include "fd5_emit.h" +#include "fd5_program.h" +#include "fd5_format.h" +#include "fd5_zsa.h" + + +static void +draw_impl(struct fd_context *ctx, struct fd_ringbuffer *ring, + struct fd5_emit *emit) +{ + const struct pipe_draw_info *info = emit->info; + enum pc_di_primtype primtype = ctx->primtypes[info->mode]; + + fd5_emit_state(ctx, ring, emit); + + if (emit->dirty & (FD_DIRTY_VTXBUF | FD_DIRTY_VTXSTATE)) + fd5_emit_vertex_bufs(ring, emit); + + OUT_PKT4(ring, REG_A5XX_VFD_INDEX_OFFSET, 2); + OUT_RING(ring, info->indexed ? info->index_bias : info->start); /* VFD_INDEX_OFFSET */ + OUT_RING(ring, info->start_instance); /* ??? UNKNOWN_2209 */ + + OUT_PKT4(ring, REG_A5XX_PC_RESTART_INDEX, 1); + OUT_RING(ring, info->primitive_restart ? /* PC_RESTART_INDEX */ + info->restart_index : 0xffffffff); + + fd5_emit_render_cntl(ctx, false); + fd5_draw_emit(ctx->batch, ring, primtype, + emit->key.binning_pass ? IGNORE_VISIBILITY : USE_VISIBILITY, + info); +} + +/* fixup dirty shader state in case some "unrelated" (from the state- + * tracker's perspective) state change causes us to switch to a + * different variant. + */ +static void +fixup_shader_state(struct fd_context *ctx, struct ir3_shader_key *key) +{ + struct fd5_context *fd5_ctx = fd5_context(ctx); + struct ir3_shader_key *last_key = &fd5_ctx->last_key; + + if (!ir3_shader_key_equal(last_key, key)) { + if (last_key->has_per_samp || key->has_per_samp) { + if ((last_key->vsaturate_s != key->vsaturate_s) || + (last_key->vsaturate_t != key->vsaturate_t) || + (last_key->vsaturate_r != key->vsaturate_r) || + (last_key->vastc_srgb != key->vastc_srgb)) + ctx->dirty |= FD_SHADER_DIRTY_VP; + + if ((last_key->fsaturate_s != key->fsaturate_s) || + (last_key->fsaturate_t != key->fsaturate_t) || + (last_key->fsaturate_r != key->fsaturate_r) || + (last_key->fastc_srgb != key->fastc_srgb)) + ctx->dirty |= FD_SHADER_DIRTY_FP; + } + + if (last_key->vclamp_color != key->vclamp_color) + ctx->dirty |= FD_SHADER_DIRTY_VP; + + if (last_key->fclamp_color != key->fclamp_color) + ctx->dirty |= FD_SHADER_DIRTY_FP; + + if (last_key->color_two_side != key->color_two_side) + ctx->dirty |= FD_SHADER_DIRTY_FP; + + if (last_key->half_precision != key->half_precision) + ctx->dirty |= FD_SHADER_DIRTY_FP; + + if (last_key->rasterflat != key->rasterflat) + ctx->dirty |= FD_SHADER_DIRTY_FP; + + if (last_key->ucp_enables != key->ucp_enables) + ctx->dirty |= FD_SHADER_DIRTY_FP | FD_SHADER_DIRTY_VP; + + fd5_ctx->last_key = *key; + } +} + +static bool +fd5_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info) +{ + struct fd5_context *fd5_ctx = fd5_context(ctx); + struct fd5_emit emit = { + .debug = &ctx->debug, + .vtx = &ctx->vtx, + .prog = &ctx->prog, + .info = info, + .key = { + .color_two_side = ctx->rasterizer->light_twoside, + .vclamp_color = ctx->rasterizer->clamp_vertex_color, + .fclamp_color = ctx->rasterizer->clamp_fragment_color, + .rasterflat = ctx->rasterizer->flatshade, + .half_precision = ctx->in_blit && + fd_half_precision(&ctx->batch->framebuffer), + .ucp_enables = ctx->rasterizer->clip_plane_enable, + .has_per_samp = (fd5_ctx->fsaturate || fd5_ctx->vsaturate || + fd5_ctx->fastc_srgb || fd5_ctx->vastc_srgb), + .vsaturate_s = fd5_ctx->vsaturate_s, + .vsaturate_t = fd5_ctx->vsaturate_t, + .vsaturate_r = fd5_ctx->vsaturate_r, + .fsaturate_s = fd5_ctx->fsaturate_s, + .fsaturate_t = fd5_ctx->fsaturate_t, + .fsaturate_r = fd5_ctx->fsaturate_r, + .vastc_srgb = fd5_ctx->vastc_srgb, + .fastc_srgb = fd5_ctx->fastc_srgb, + }, + .rasterflat = ctx->rasterizer->flatshade, + .sprite_coord_enable = ctx->rasterizer->sprite_coord_enable, + .sprite_coord_mode = ctx->rasterizer->sprite_coord_mode, + }; + + fixup_shader_state(ctx, &emit.key); + + unsigned dirty = ctx->dirty; + + /* do regular pass first, since that is more likely to fail compiling: */ + + if (!(fd5_emit_get_vp(&emit) && fd5_emit_get_fp(&emit))) + return false; + + emit.key.binning_pass = false; + emit.dirty = dirty; + + draw_impl(ctx, ctx->batch->draw, &emit); + +// /* and now binning pass: */ +// emit.key.binning_pass = true; +// emit.dirty = dirty & ~(FD_DIRTY_BLEND); +// emit.vp = NULL; /* we changed key so need to refetch vp */ +// emit.fp = NULL; +// draw_impl(ctx, ctx->batch->binning, &emit); + + if (emit.streamout_mask) { + struct fd_ringbuffer *ring = ctx->batch->draw; + + for (unsigned i = 0; i < PIPE_MAX_SO_BUFFERS; i++) { + if (emit.streamout_mask & (1 << i)) { + OUT_PKT7(ring, CP_EVENT_WRITE, 1); + OUT_RING(ring, FLUSH_SO_0 + i); + } + } + } + + return true; +} + +static void +fd5_clear(struct fd_context *ctx, unsigned buffers, + const union pipe_color_union *color, double depth, unsigned stencil) +{ + struct fd_ringbuffer *ring = ctx->batch->draw; + struct pipe_framebuffer_state *pfb = &ctx->batch->framebuffer; + struct pipe_scissor_state *scissor = fd_context_get_scissor(ctx); + + /* TODO handle scissor.. or fallback to slow-clear? */ + + ctx->batch->max_scissor.minx = MIN2(ctx->batch->max_scissor.minx, scissor->minx); + ctx->batch->max_scissor.miny = MIN2(ctx->batch->max_scissor.miny, scissor->miny); + ctx->batch->max_scissor.maxx = MAX2(ctx->batch->max_scissor.maxx, scissor->maxx); + ctx->batch->max_scissor.maxy = MAX2(ctx->batch->max_scissor.maxy, scissor->maxy); + + fd5_emit_render_cntl(ctx, true); + + if (buffers & PIPE_CLEAR_COLOR) { + for (int i = 0; i < pfb->nr_cbufs; i++) { + union util_color uc = {0}; + + if (!pfb->cbufs[i]) + continue; + + if (!(buffers & (PIPE_CLEAR_COLOR0 << i))) + continue; + + enum pipe_format pfmt = pfb->cbufs[i]->format; + + // XXX I think RB_CLEAR_COLOR_DWn wants to take into account SWAP?? + union pipe_color_union swapped; + switch (fd5_pipe2swap(pfmt)) { + case WZYX: + swapped.ui[0] = color->ui[0]; + swapped.ui[1] = color->ui[1]; + swapped.ui[2] = color->ui[2]; + swapped.ui[3] = color->ui[3]; + break; + case WXYZ: + swapped.ui[2] = color->ui[0]; + swapped.ui[1] = color->ui[1]; + swapped.ui[0] = color->ui[2]; + swapped.ui[3] = color->ui[3]; + break; + case ZYXW: + swapped.ui[3] = color->ui[0]; + swapped.ui[0] = color->ui[1]; + swapped.ui[1] = color->ui[2]; + swapped.ui[2] = color->ui[3]; + break; + case XYZW: + swapped.ui[3] = color->ui[0]; + swapped.ui[2] = color->ui[1]; + swapped.ui[1] = color->ui[2]; + swapped.ui[0] = color->ui[3]; + break; + } + + if (util_format_is_pure_uint(pfmt)) { + util_format_write_4ui(pfmt, swapped.ui, 0, &uc, 0, 0, 0, 1, 1); + } else if (util_format_is_pure_sint(pfmt)) { + util_format_write_4i(pfmt, swapped.i, 0, &uc, 0, 0, 0, 1, 1); + } else { + util_pack_color(swapped.f, pfmt, &uc); + } + + OUT_PKT4(ring, REG_A5XX_RB_BLIT_CNTL, 1); + OUT_RING(ring, A5XX_RB_BLIT_CNTL_BUF(BLIT_MRT0 + i)); + + OUT_PKT4(ring, REG_A5XX_RB_CLEAR_CNTL, 1); + OUT_RING(ring, A5XX_RB_CLEAR_CNTL_FAST_CLEAR | + A5XX_RB_CLEAR_CNTL_MASK(0xf)); + + OUT_PKT4(ring, REG_A5XX_RB_CLEAR_COLOR_DW0, 4); + OUT_RING(ring, uc.ui[0]); /* RB_CLEAR_COLOR_DW0 */ + OUT_RING(ring, uc.ui[1]); /* RB_CLEAR_COLOR_DW1 */ + OUT_RING(ring, uc.ui[2]); /* RB_CLEAR_COLOR_DW2 */ + OUT_RING(ring, uc.ui[3]); /* RB_CLEAR_COLOR_DW3 */ + + fd5_emit_blit(ctx, ring); + } + } + + if (pfb->zsbuf && (buffers & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL))) { + uint32_t clear = + util_pack_z_stencil(pfb->zsbuf->format, depth, stencil); + uint32_t mask = 0; + + if (buffers & PIPE_CLEAR_DEPTH) + mask |= 0x1; + + if (buffers & PIPE_CLEAR_STENCIL) + mask |= 0x2; + + OUT_PKT4(ring, REG_A5XX_RB_BLIT_CNTL, 1); + OUT_RING(ring, A5XX_RB_BLIT_CNTL_BUF(BLIT_ZS)); + + OUT_PKT4(ring, REG_A5XX_RB_CLEAR_CNTL, 1); + OUT_RING(ring, A5XX_RB_CLEAR_CNTL_FAST_CLEAR | + A5XX_RB_CLEAR_CNTL_MASK(mask)); + + OUT_PKT4(ring, REG_A5XX_RB_CLEAR_COLOR_DW0, 1); + OUT_RING(ring, clear); /* RB_CLEAR_COLOR_DW0 */ + + fd5_emit_blit(ctx, ring); + } + + /* disable fast clear to not interfere w/ gmem->mem, etc.. */ + OUT_PKT4(ring, REG_A5XX_RB_CLEAR_CNTL, 1); + OUT_RING(ring, 0x00000000); /* RB_CLEAR_CNTL */ +} + +void +fd5_draw_init(struct pipe_context *pctx) +{ + struct fd_context *ctx = fd_context(pctx); + ctx->draw_vbo = fd5_draw_vbo; + ctx->clear = fd5_clear; +} diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_draw.h mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_draw.h --- mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_draw.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_draw.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,113 @@ +/* + * Copyright (C) 2016 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#ifndef FD5_DRAW_H_ +#define FD5_DRAW_H_ + +#include "pipe/p_context.h" + +#include "freedreno_draw.h" + +/* some bits in common w/ a4xx: */ +#include "a4xx/fd4_draw.h" + +void fd5_draw_init(struct pipe_context *pctx); + +static inline void +fd5_draw(struct fd_batch *batch, struct fd_ringbuffer *ring, + enum pc_di_primtype primtype, + enum pc_di_vis_cull_mode vismode, + enum pc_di_src_sel src_sel, uint32_t count, + uint32_t instances, enum a4xx_index_size idx_type, + uint32_t idx_size, uint32_t idx_offset, + struct pipe_resource *idx_buffer) +{ + /* for debug after a lock up, write a unique counter value + * to scratch7 for each draw, to make it easier to match up + * register dumps to cmdstream. The combination of IB + * (scratch6) and DRAW is enough to "triangulate" the + * particular draw that caused lockup. + */ + emit_marker5(ring, 7); + + OUT_PKT7(ring, CP_DRAW_INDX_OFFSET, idx_buffer ? 7 : 3); + if (vismode == USE_VISIBILITY) { + /* leave vis mode blank for now, it will be patched up when + * we know if we are binning or not + */ + OUT_RINGP(ring, DRAW4(primtype, src_sel, idx_type, 0), + &batch->draw_patches); + } else { + OUT_RING(ring, DRAW4(primtype, src_sel, idx_type, vismode)); + } + OUT_RING(ring, instances); /* NumInstances */ + OUT_RING(ring, count); /* NumIndices */ + if (idx_buffer) { + OUT_RING(ring, 0x0); /* XXX */ + OUT_RELOC(ring, fd_resource(idx_buffer)->bo, idx_offset, 0, 0); + OUT_RING (ring, idx_size); + } + + emit_marker5(ring, 7); + + fd_reset_wfi(batch); +} + +static inline void +fd5_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring, + enum pc_di_primtype primtype, + enum pc_di_vis_cull_mode vismode, + const struct pipe_draw_info *info) +{ + struct pipe_resource *idx_buffer = NULL; + enum a4xx_index_size idx_type; + enum pc_di_src_sel src_sel; + uint32_t idx_size, idx_offset; + + if (info->indexed) { + struct pipe_index_buffer *idx = &batch->ctx->indexbuf; + + assert(!idx->user_buffer); + + idx_buffer = idx->buffer; + idx_type = fd4_size2indextype(idx->index_size); + idx_size = idx->index_size * info->count; + idx_offset = idx->offset + (info->start * idx->index_size); + src_sel = DI_SRC_SEL_DMA; + } else { + idx_buffer = NULL; + idx_type = INDEX4_SIZE_32_BIT; + idx_size = 0; + idx_offset = 0; + src_sel = DI_SRC_SEL_AUTO_INDEX; + } + + fd5_draw(batch, ring, primtype, vismode, src_sel, + info->count, info->instance_count, + idx_type, idx_size, idx_offset, idx_buffer); +} + +#endif /* FD5_DRAW_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_emit.c mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_emit.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_emit.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_emit.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,941 @@ +/* + * Copyright (C) 2016 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#include "pipe/p_state.h" +#include "util/u_string.h" +#include "util/u_memory.h" +#include "util/u_helpers.h" +#include "util/u_format.h" +#include "util/u_viewport.h" + +#include "freedreno_resource.h" +#include "freedreno_query_hw.h" + +#include "fd5_emit.h" +#include "fd5_blend.h" +#include "fd5_context.h" +#include "fd5_program.h" +#include "fd5_rasterizer.h" +#include "fd5_texture.h" +#include "fd5_format.h" +#include "fd5_zsa.h" + +static const enum adreno_state_block sb[] = { + [SHADER_VERTEX] = SB_VERT_SHADER, + [SHADER_FRAGMENT] = SB_FRAG_SHADER, +}; + +/* regid: base const register + * prsc or dwords: buffer containing constant values + * sizedwords: size of const value buffer + */ +static void +fd5_emit_const(struct fd_ringbuffer *ring, enum shader_t type, + uint32_t regid, uint32_t offset, uint32_t sizedwords, + const uint32_t *dwords, struct pipe_resource *prsc) +{ + uint32_t i, sz; + enum adreno_state_src src; + + debug_assert((regid % 4) == 0); + debug_assert((sizedwords % 4) == 0); + + if (prsc) { + sz = 0; + src = 0x2; // TODO ?? + } else { + sz = sizedwords; + src = SS_DIRECT; + } + + OUT_PKT7(ring, CP_LOAD_STATE, 3 + sz); + OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(regid/4) | + CP_LOAD_STATE_0_STATE_SRC(src) | + CP_LOAD_STATE_0_STATE_BLOCK(sb[type]) | + CP_LOAD_STATE_0_NUM_UNIT(sizedwords/4)); + if (prsc) { + struct fd_bo *bo = fd_resource(prsc)->bo; + OUT_RELOC(ring, bo, offset, + CP_LOAD_STATE_1_STATE_TYPE(ST_CONSTANTS), 0); + } else { + OUT_RING(ring, CP_LOAD_STATE_1_EXT_SRC_ADDR(0) | + CP_LOAD_STATE_1_STATE_TYPE(ST_CONSTANTS)); + OUT_RING(ring, CP_LOAD_STATE_2_EXT_SRC_ADDR_HI(0)); + dwords = (uint32_t *)&((uint8_t *)dwords)[offset]; + } + for (i = 0; i < sz; i++) { + OUT_RING(ring, dwords[i]); + } +} + +static void +fd5_emit_const_bo(struct fd_ringbuffer *ring, enum shader_t type, boolean write, + uint32_t regid, uint32_t num, struct pipe_resource **prscs, uint32_t *offsets) +{ + uint32_t anum = align(num, 2); + uint32_t i; + + debug_assert((regid % 4) == 0); + + OUT_PKT7(ring, CP_LOAD_STATE, 3 + (2 * anum)); + OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(regid/4) | + CP_LOAD_STATE_0_STATE_SRC(SS_DIRECT) | + CP_LOAD_STATE_0_STATE_BLOCK(sb[type]) | + CP_LOAD_STATE_0_NUM_UNIT(anum/2)); + OUT_RING(ring, CP_LOAD_STATE_1_EXT_SRC_ADDR(0) | + CP_LOAD_STATE_1_STATE_TYPE(ST_CONSTANTS)); + OUT_RING(ring, CP_LOAD_STATE_2_EXT_SRC_ADDR_HI(0)); + + for (i = 0; i < num; i++) { + if (prscs[i]) { + if (write) { + OUT_RELOCW(ring, fd_resource(prscs[i])->bo, offsets[i], 0, 0); + } else { + OUT_RELOC(ring, fd_resource(prscs[i])->bo, offsets[i], 0, 0); + } + } else { + OUT_RING(ring, 0xbad00000 | (i << 16)); + OUT_RING(ring, 0xbad00000 | (i << 16)); + } + } + + for (; i < anum; i++) { + OUT_RING(ring, 0xffffffff); + OUT_RING(ring, 0xffffffff); + } +} + +/* Border color layout is diff from a4xx/a5xx.. if it turns out to be + * the same as a6xx then move this somewhere common ;-) + * + * Entry layout looks like (total size, 0x60 bytes): + * + * offset | description + * -------+------------- + * 0x00 | fp32[0] + * | fp32[1] + * | fp32[2] + * | fp32[3] + * 0x10 | uint16[0] + * | uint16[1] + * | uint16[2] + * | uint16[3] + * 0x18 | int16[0] + * | int16[1] + * | int16[2] + * | int16[3] + * 0x20 | fp16[0] + * | fp16[1] + * | fp16[2] + * | fp16[3] + * 0x28 | ?? maybe padding ?? + * 0x30 | uint8[0] + * | uint8[1] + * | uint8[2] + * | uint8[3] + * 0x34 | int8[0] + * | int8[1] + * | int8[2] + * | int8[3] + * 0x38 | ?? maybe padding ?? + * + * Some uncertainty, because not clear that this actually works properly + * with blob, so who knows.. + */ + +struct PACKED bcolor_entry { + uint32_t fp32[4]; + uint16_t ui16[4]; + int16_t si16[4]; + uint16_t fp16[4]; + uint8_t __pad0[8]; + uint8_t ui8[4]; + int8_t si8[4]; + uint8_t __pad1[40]; +}; + +#define FD5_BORDER_COLOR_SIZE 0x60 +#define FD5_BORDER_COLOR_UPLOAD_SIZE (2 * PIPE_MAX_SAMPLERS * FD5_BORDER_COLOR_SIZE) +#define FD5_BORDER_COLOR_OFFSET 8 /* TODO probably should be dynamic */ + +static void +setup_border_colors(struct fd_texture_stateobj *tex, struct bcolor_entry *entries) +{ + unsigned i, j; + + debug_assert(tex->num_samplers < FD5_BORDER_COLOR_OFFSET); // TODO + + for (i = 0; i < tex->num_samplers; i++) { + struct bcolor_entry *e = &entries[i]; + struct pipe_sampler_state *sampler = tex->samplers[i]; + union pipe_color_union *bc; + + if (!sampler) + continue; + + bc = &sampler->border_color; + + /* + * XXX HACK ALERT XXX + * + * The border colors need to be swizzled in a particular + * format-dependent order. Even though samplers don't know about + * formats, we can assume that with a GL state tracker, there's a + * 1:1 correspondence between sampler and texture. Take advantage + * of that knowledge. + */ + if ((i >= tex->num_textures) || !tex->textures[i]) + continue; + + const struct util_format_description *desc = + util_format_description(tex->textures[i]->format); + + for (j = 0; j < 4; j++) { + int c = desc->swizzle[j]; + + if (c >= 4) + continue; + + if (desc->channel[c].pure_integer) { + float f = bc->i[c]; + + e->fp32[j] = fui(f); + e->fp16[j] = util_float_to_half(f); + e->ui16[j] = bc->ui[c]; + e->si16[j] = bc->i[c]; + e->ui8[j] = bc->ui[c]; + e->si8[j] = bc->i[c]; + } else { + float f = bc->f[c]; + + e->fp32[j] = fui(f); + e->fp16[j] = util_float_to_half(f); + e->ui16[j] = f * 65535.0; + e->si16[j] = f * 32767.5; + e->ui8[j] = f * 255.0; + e->si8[j] = f * 128.0; + } + } + +#ifdef DEBUG + memset(&e->__pad0, 0, sizeof(e->__pad0)); + memset(&e->__pad1, 0, sizeof(e->__pad1)); +#endif + } +} + +static void +emit_border_color(struct fd_context *ctx, struct fd_ringbuffer *ring) +{ + struct fd5_context *fd5_ctx = fd5_context(ctx); + struct bcolor_entry *entries; + unsigned off; + void *ptr; + + STATIC_ASSERT(sizeof(struct bcolor_entry) == FD5_BORDER_COLOR_SIZE); + + u_upload_alloc(fd5_ctx->border_color_uploader, + 0, FD5_BORDER_COLOR_UPLOAD_SIZE, + FD5_BORDER_COLOR_UPLOAD_SIZE, &off, + &fd5_ctx->border_color_buf, + &ptr); + + entries = ptr; + + setup_border_colors(&ctx->verttex, &entries[0]); + setup_border_colors(&ctx->fragtex, &entries[ctx->verttex.num_samplers]); + + OUT_PKT4(ring, REG_A5XX_TPL1_TP_BORDER_COLOR_BASE_ADDR_LO, 2); + OUT_RELOC(ring, fd_resource(fd5_ctx->border_color_buf)->bo, off, 0, 0); + + u_upload_unmap(fd5_ctx->border_color_uploader); +} + +static bool +emit_textures(struct fd_context *ctx, struct fd_ringbuffer *ring, + enum adreno_state_block sb, struct fd_texture_stateobj *tex) +{ + bool needs_border = false; + unsigned bcolor_offset = (sb == SB_FRAG_TEX) ? ctx->verttex.num_samplers : 0; + unsigned i; + + if (tex->num_samplers > 0) { + /* output sampler state: */ + OUT_PKT7(ring, CP_LOAD_STATE, 3 + (4 * tex->num_samplers)); + OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(0) | + CP_LOAD_STATE_0_STATE_SRC(SS_DIRECT) | + CP_LOAD_STATE_0_STATE_BLOCK(sb) | + CP_LOAD_STATE_0_NUM_UNIT(tex->num_samplers)); + OUT_RING(ring, CP_LOAD_STATE_1_STATE_TYPE(ST_SHADER) | + CP_LOAD_STATE_1_EXT_SRC_ADDR(0)); + OUT_RING(ring, CP_LOAD_STATE_2_EXT_SRC_ADDR_HI(0)); + for (i = 0; i < tex->num_samplers; i++) { + static const struct fd5_sampler_stateobj dummy_sampler = {}; + const struct fd5_sampler_stateobj *sampler = tex->samplers[i] ? + fd5_sampler_stateobj(tex->samplers[i]) : + &dummy_sampler; + OUT_RING(ring, sampler->texsamp0); + OUT_RING(ring, sampler->texsamp1); + OUT_RING(ring, sampler->texsamp2 | + A5XX_TEX_SAMP_2_BCOLOR_OFFSET(bcolor_offset)); + OUT_RING(ring, sampler->texsamp3); + + needs_border |= sampler->needs_border; + } + } + + if (tex->num_textures > 0) { + unsigned num_textures = tex->num_textures; + + /* emit texture state: */ + OUT_PKT7(ring, CP_LOAD_STATE, 3 + (12 * num_textures)); + OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(0) | + CP_LOAD_STATE_0_STATE_SRC(SS_DIRECT) | + CP_LOAD_STATE_0_STATE_BLOCK(sb) | + CP_LOAD_STATE_0_NUM_UNIT(num_textures)); + OUT_RING(ring, CP_LOAD_STATE_1_STATE_TYPE(ST_CONSTANTS) | + CP_LOAD_STATE_1_EXT_SRC_ADDR(0)); + OUT_RING(ring, CP_LOAD_STATE_2_EXT_SRC_ADDR_HI(0)); + for (i = 0; i < tex->num_textures; i++) { + static const struct fd5_pipe_sampler_view dummy_view = {}; + const struct fd5_pipe_sampler_view *view = tex->textures[i] ? + fd5_pipe_sampler_view(tex->textures[i]) : + &dummy_view; + + OUT_RING(ring, view->texconst0); + OUT_RING(ring, view->texconst1); + OUT_RING(ring, view->texconst2); + OUT_RING(ring, view->texconst3); + if (view->base.texture) { + struct fd_resource *rsc = fd_resource(view->base.texture); + OUT_RELOC(ring, rsc->bo, view->offset, + (uint64_t)view->texconst5 << 32, 0); + } else { + OUT_RING(ring, 0x00000000); + OUT_RING(ring, view->texconst5); + } + OUT_RING(ring, view->texconst6); + OUT_RING(ring, view->texconst7); + OUT_RING(ring, view->texconst8); + OUT_RING(ring, view->texconst9); + OUT_RING(ring, view->texconst10); + OUT_RING(ring, view->texconst11); + } + } + + return needs_border; +} + +void +fd5_emit_vertex_bufs(struct fd_ringbuffer *ring, struct fd5_emit *emit) +{ + int32_t i, j; + const struct fd_vertex_state *vtx = emit->vtx; + const struct ir3_shader_variant *vp = fd5_emit_get_vp(emit); + + for (i = 0, j = 0; i <= vp->inputs_count; i++) { + if (vp->inputs[i].sysval) + continue; + if (vp->inputs[i].compmask) { + struct pipe_vertex_element *elem = &vtx->vtx->pipe[i]; + const struct pipe_vertex_buffer *vb = + &vtx->vertexbuf.vb[elem->vertex_buffer_index]; + struct fd_resource *rsc = fd_resource(vb->buffer); + enum pipe_format pfmt = elem->src_format; + enum a5xx_vtx_fmt fmt = fd5_pipe2vtx(pfmt); + bool isint = util_format_is_pure_integer(pfmt); + uint32_t off = vb->buffer_offset + elem->src_offset; + uint32_t size = fd_bo_size(rsc->bo) - off; + debug_assert(fmt != ~0); + + OUT_PKT4(ring, REG_A5XX_VFD_FETCH(j), 4); + OUT_RELOC(ring, rsc->bo, off, 0, 0); + OUT_RING(ring, size); /* VFD_FETCH[j].SIZE */ + OUT_RING(ring, vb->stride); /* VFD_FETCH[j].STRIDE */ + + OUT_PKT4(ring, REG_A5XX_VFD_DECODE(j), 2); + OUT_RING(ring, A5XX_VFD_DECODE_INSTR_IDX(j) | + A5XX_VFD_DECODE_INSTR_FORMAT(fmt) | + COND(elem->instance_divisor, A5XX_VFD_DECODE_INSTR_INSTANCED) | + A5XX_VFD_DECODE_INSTR_UNK30 | + COND(!isint, A5XX_VFD_DECODE_INSTR_FLOAT)); + OUT_RING(ring, MAX2(1, elem->instance_divisor)); /* VFD_DECODE[j].STEP_RATE */ + + OUT_PKT4(ring, REG_A5XX_VFD_DEST_CNTL(j), 1); + OUT_RING(ring, A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK(vp->inputs[i].compmask) | + A5XX_VFD_DEST_CNTL_INSTR_REGID(vp->inputs[i].regid)); + + j++; + } + } + + OUT_PKT4(ring, REG_A5XX_VFD_CONTROL_0, 1); + OUT_RING(ring, A5XX_VFD_CONTROL_0_VTXCNT(j)); +} + +void +fd5_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring, + struct fd5_emit *emit) +{ + const struct ir3_shader_variant *vp = fd5_emit_get_vp(emit); + const struct ir3_shader_variant *fp = fd5_emit_get_fp(emit); + uint32_t dirty = emit->dirty; + bool needs_border = false; + + emit_marker5(ring, 5); + + if ((dirty & FD_DIRTY_FRAMEBUFFER) && !emit->key.binning_pass) { + struct pipe_framebuffer_state *pfb = &ctx->batch->framebuffer; + unsigned char mrt_comp[A5XX_MAX_RENDER_TARGETS] = {0}; + + for (unsigned i = 0; i < A5XX_MAX_RENDER_TARGETS; i++) { + mrt_comp[i] = ((i < pfb->nr_cbufs) && pfb->cbufs[i]) ? 0xf : 0; + } + + OUT_PKT4(ring, REG_A5XX_RB_RENDER_COMPONENTS, 1); + OUT_RING(ring, A5XX_RB_RENDER_COMPONENTS_RT0(mrt_comp[0]) | + A5XX_RB_RENDER_COMPONENTS_RT1(mrt_comp[1]) | + A5XX_RB_RENDER_COMPONENTS_RT2(mrt_comp[2]) | + A5XX_RB_RENDER_COMPONENTS_RT3(mrt_comp[3]) | + A5XX_RB_RENDER_COMPONENTS_RT4(mrt_comp[4]) | + A5XX_RB_RENDER_COMPONENTS_RT5(mrt_comp[5]) | + A5XX_RB_RENDER_COMPONENTS_RT6(mrt_comp[6]) | + A5XX_RB_RENDER_COMPONENTS_RT7(mrt_comp[7])); + } + + if (dirty & (FD_DIRTY_ZSA | FD_DIRTY_FRAMEBUFFER)) { + struct fd5_zsa_stateobj *zsa = fd5_zsa_stateobj(ctx->zsa); + struct pipe_framebuffer_state *pfb = &ctx->batch->framebuffer; + uint32_t rb_alpha_control = zsa->rb_alpha_control; + + if (util_format_is_pure_integer(pipe_surface_format(pfb->cbufs[0]))) + rb_alpha_control &= ~A5XX_RB_ALPHA_CONTROL_ALPHA_TEST; + + OUT_PKT4(ring, REG_A5XX_RB_ALPHA_CONTROL, 1); + OUT_RING(ring, rb_alpha_control); + + OUT_PKT4(ring, REG_A5XX_RB_STENCIL_CONTROL, 1); + OUT_RING(ring, zsa->rb_stencil_control); + } + + if (dirty & (FD_DIRTY_ZSA | FD_DIRTY_STENCIL_REF)) { + struct fd5_zsa_stateobj *zsa = fd5_zsa_stateobj(ctx->zsa); + struct pipe_stencil_ref *sr = &ctx->stencil_ref; + + OUT_PKT4(ring, REG_A5XX_RB_STENCILREFMASK, 1); + OUT_RING(ring, zsa->rb_stencilrefmask | + A5XX_RB_STENCILREFMASK_STENCILREF(sr->ref_value[0])); + } + + if (dirty & (FD_DIRTY_ZSA | FD_DIRTY_RASTERIZER | FD_DIRTY_PROG)) { + struct fd5_zsa_stateobj *zsa = fd5_zsa_stateobj(ctx->zsa); + bool fragz = fp->has_kill | fp->writes_pos; + + OUT_PKT4(ring, REG_A5XX_RB_DEPTH_CNTL, 1); + OUT_RING(ring, zsa->rb_depth_cntl); + + OUT_PKT4(ring, REG_A5XX_RB_DEPTH_PLANE_CNTL, 1); + OUT_RING(ring, COND(fragz, A5XX_RB_DEPTH_PLANE_CNTL_FRAG_WRITES_Z) | + COND(fragz && fp->frag_coord, A5XX_RB_DEPTH_PLANE_CNTL_UNK1)); + + OUT_PKT4(ring, REG_A5XX_GRAS_SU_DEPTH_PLANE_CNTL, 1); + OUT_RING(ring, COND(fragz, A5XX_GRAS_SU_DEPTH_PLANE_CNTL_FRAG_WRITES_Z) | + COND(fragz && fp->frag_coord, A5XX_GRAS_SU_DEPTH_PLANE_CNTL_UNK1)); + } + + if (dirty & FD_DIRTY_RASTERIZER) { + struct fd5_rasterizer_stateobj *rasterizer = + fd5_rasterizer_stateobj(ctx->rasterizer); + + OUT_PKT4(ring, REG_A5XX_GRAS_SU_CNTL, 1); + OUT_RING(ring, rasterizer->gras_su_cntl); + + OUT_PKT4(ring, REG_A5XX_GRAS_SU_POINT_MINMAX, 2); + OUT_RING(ring, rasterizer->gras_su_point_minmax); + OUT_RING(ring, rasterizer->gras_su_point_size); + + OUT_PKT4(ring, REG_A5XX_GRAS_SU_POLY_OFFSET_SCALE, 3); + OUT_RING(ring, rasterizer->gras_su_poly_offset_scale); + OUT_RING(ring, rasterizer->gras_su_poly_offset_offset); + OUT_RING(ring, rasterizer->gras_su_poly_offset_clamp); + } + + /* NOTE: since primitive_restart is not actually part of any + * state object, we need to make sure that we always emit + * PRIM_VTX_CNTL.. either that or be more clever and detect + * when it changes. + */ + if (emit->info) { + struct fd5_rasterizer_stateobj *rast = + fd5_rasterizer_stateobj(ctx->rasterizer); + uint32_t val = rast->pc_prim_vtx_cntl; + + val |= COND(vp->writes_psize, A5XX_PC_PRIM_VTX_CNTL_PSIZE); + + OUT_PKT4(ring, REG_A5XX_PC_PRIM_VTX_CNTL, 1); + OUT_RING(ring, val); + } + + if (dirty & FD_DIRTY_SCISSOR) { + struct pipe_scissor_state *scissor = fd_context_get_scissor(ctx); + + OUT_PKT4(ring, REG_A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0, 2); + OUT_RING(ring, A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X(scissor->minx) | + A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y(scissor->miny)); + OUT_RING(ring, A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X(scissor->maxx - 1) | + A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y(scissor->maxy - 1)); + + OUT_PKT4(ring, REG_A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0, 2); + OUT_RING(ring, A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X(scissor->minx) | + A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y(scissor->miny)); + OUT_RING(ring, A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X(scissor->maxx - 1) | + A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y(scissor->maxy - 1)); + + ctx->batch->max_scissor.minx = MIN2(ctx->batch->max_scissor.minx, scissor->minx); + ctx->batch->max_scissor.miny = MIN2(ctx->batch->max_scissor.miny, scissor->miny); + ctx->batch->max_scissor.maxx = MAX2(ctx->batch->max_scissor.maxx, scissor->maxx); + ctx->batch->max_scissor.maxy = MAX2(ctx->batch->max_scissor.maxy, scissor->maxy); + } + + if (dirty & FD_DIRTY_VIEWPORT) { + fd_wfi(ctx->batch, ring); + OUT_PKT4(ring, REG_A5XX_GRAS_CL_VPORT_XOFFSET_0, 6); + OUT_RING(ring, A5XX_GRAS_CL_VPORT_XOFFSET_0(ctx->viewport.translate[0])); + OUT_RING(ring, A5XX_GRAS_CL_VPORT_XSCALE_0(ctx->viewport.scale[0])); + OUT_RING(ring, A5XX_GRAS_CL_VPORT_YOFFSET_0(ctx->viewport.translate[1])); + OUT_RING(ring, A5XX_GRAS_CL_VPORT_YSCALE_0(ctx->viewport.scale[1])); + OUT_RING(ring, A5XX_GRAS_CL_VPORT_ZOFFSET_0(ctx->viewport.translate[2])); + OUT_RING(ring, A5XX_GRAS_CL_VPORT_ZSCALE_0(ctx->viewport.scale[2])); + } + + if (dirty & FD_DIRTY_PROG) + fd5_program_emit(ring, emit); + + if (dirty & (FD_DIRTY_FRAMEBUFFER | FD_DIRTY_RASTERIZER)) { + struct pipe_framebuffer_state *pfb = &ctx->batch->framebuffer; + uint32_t posz_regid = ir3_find_output_regid(fp, FRAG_RESULT_DEPTH); + unsigned nr = pfb->nr_cbufs; + + if (emit->key.binning_pass) + nr = 0; + else if (ctx->rasterizer->rasterizer_discard) + nr = 0; + + OUT_PKT4(ring, REG_A5XX_RB_FS_OUTPUT_CNTL, 1); + OUT_RING(ring, A5XX_RB_FS_OUTPUT_CNTL_MRT(nr) | + COND(fp->writes_pos, A5XX_RB_FS_OUTPUT_CNTL_FRAG_WRITES_Z)); + + OUT_PKT4(ring, REG_A5XX_SP_FS_OUTPUT_CNTL, 1); + OUT_RING(ring, A5XX_SP_FS_OUTPUT_CNTL_MRT(nr) | + A5XX_SP_FS_OUTPUT_CNTL_DEPTH_REGID(posz_regid) | + A5XX_SP_FS_OUTPUT_CNTL_SAMPLEMASK_REGID(regid(63, 0))); + } + + if (emit->prog == &ctx->prog) { /* evil hack to deal sanely with clear path */ + ir3_emit_consts(vp, ring, ctx, emit->info, dirty); + if (!emit->key.binning_pass) + ir3_emit_consts(fp, ring, ctx, emit->info, dirty); + + struct pipe_stream_output_info *info = &vp->shader->stream_output; + if (info->num_outputs) { + struct fd_streamout_stateobj *so = &ctx->streamout; + + for (unsigned i = 0; i < so->num_targets; i++) { + struct pipe_stream_output_target *target = so->targets[i]; + + if (!target) + continue; + + unsigned offset = (so->offsets[i] * info->stride[i] * 4) + + target->buffer_offset; + + OUT_PKT4(ring, REG_A5XX_VPC_SO_BUFFER_BASE_LO(i), 3); + /* VPC_SO[i].BUFFER_BASE_LO: */ + OUT_RELOCW(ring, fd_resource(target->buffer)->bo, 0, 0, 0); + OUT_RING(ring, target->buffer_size + offset); + + OUT_PKT4(ring, REG_A5XX_VPC_SO_BUFFER_OFFSET(i), 3); + OUT_RING(ring, offset); + /* VPC_SO[i].FLUSH_BASE_LO/HI: */ + // TODO just give hw a dummy addr for now.. we should + // be using this an then CP_MEM_TO_REG to set the + // VPC_SO[i].BUFFER_OFFSET for the next draw.. + OUT_RELOCW(ring, fd5_context(ctx)->blit_mem, 0x100, 0, 0); + + emit->streamout_mask |= (1 << i); + } + } + } + + if ((dirty & FD_DIRTY_BLEND)) { + struct fd5_blend_stateobj *blend = fd5_blend_stateobj(ctx->blend); + uint32_t i; + + for (i = 0; i < A5XX_MAX_RENDER_TARGETS; i++) { + enum pipe_format format = pipe_surface_format( + ctx->batch->framebuffer.cbufs[i]); + bool is_int = util_format_is_pure_integer(format); + bool has_alpha = util_format_has_alpha(format); + uint32_t control = blend->rb_mrt[i].control; + uint32_t blend_control = blend->rb_mrt[i].blend_control_alpha; + + if (is_int) { + control &= A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE__MASK; +// control |= A5XX_RB_MRT_CONTROL_ROP_CODE(ROP_COPY); + } + + if (has_alpha) { + blend_control |= blend->rb_mrt[i].blend_control_rgb; + } else { + blend_control |= blend->rb_mrt[i].blend_control_no_alpha_rgb; + control &= ~A5XX_RB_MRT_CONTROL_BLEND2; + } + + OUT_PKT4(ring, REG_A5XX_RB_MRT_CONTROL(i), 1); + OUT_RING(ring, control); + + OUT_PKT4(ring, REG_A5XX_RB_MRT_BLEND_CONTROL(i), 1); + OUT_RING(ring, blend_control); + } + + OUT_PKT4(ring, REG_A5XX_RB_BLEND_CNTL, 1); + OUT_RING(ring, blend->rb_blend_cntl | + A5XX_RB_BLEND_CNTL_SAMPLE_MASK(0xffff)); + + OUT_PKT4(ring, REG_A5XX_SP_BLEND_CNTL, 1); + OUT_RING(ring, 0x00000100); + } + + if (dirty & FD_DIRTY_BLEND_COLOR) { + struct pipe_blend_color *bcolor = &ctx->blend_color; + + OUT_PKT4(ring, REG_A5XX_RB_BLEND_RED, 8); + OUT_RING(ring, A5XX_RB_BLEND_RED_FLOAT(bcolor->color[0]) | + A5XX_RB_BLEND_RED_UINT(bcolor->color[0] * 0xff) | + A5XX_RB_BLEND_RED_SINT(bcolor->color[0] * 0x7f)); + OUT_RING(ring, A5XX_RB_BLEND_RED_F32(bcolor->color[0])); + OUT_RING(ring, A5XX_RB_BLEND_GREEN_FLOAT(bcolor->color[1]) | + A5XX_RB_BLEND_GREEN_UINT(bcolor->color[1] * 0xff) | + A5XX_RB_BLEND_GREEN_SINT(bcolor->color[1] * 0x7f)); + OUT_RING(ring, A5XX_RB_BLEND_RED_F32(bcolor->color[1])); + OUT_RING(ring, A5XX_RB_BLEND_BLUE_FLOAT(bcolor->color[2]) | + A5XX_RB_BLEND_BLUE_UINT(bcolor->color[2] * 0xff) | + A5XX_RB_BLEND_BLUE_SINT(bcolor->color[2] * 0x7f)); + OUT_RING(ring, A5XX_RB_BLEND_BLUE_F32(bcolor->color[2])); + OUT_RING(ring, A5XX_RB_BLEND_ALPHA_FLOAT(bcolor->color[3]) | + A5XX_RB_BLEND_ALPHA_UINT(bcolor->color[3] * 0xff) | + A5XX_RB_BLEND_ALPHA_SINT(bcolor->color[3] * 0x7f)); + OUT_RING(ring, A5XX_RB_BLEND_ALPHA_F32(bcolor->color[3])); + } + + if (dirty & FD_DIRTY_VERTTEX) { + if (vp->has_samp) { + needs_border |= emit_textures(ctx, ring, SB_VERT_TEX, &ctx->verttex); + OUT_PKT4(ring, REG_A5XX_TPL1_VS_TEX_COUNT, 1); + OUT_RING(ring, ctx->verttex.num_textures); + } else { + dirty &= ~FD_DIRTY_VERTTEX; + } + } + + if (dirty & FD_DIRTY_FRAGTEX) { + if (fp->has_samp) { + needs_border |= emit_textures(ctx, ring, SB_FRAG_TEX, &ctx->fragtex); + OUT_PKT4(ring, REG_A5XX_TPL1_FS_TEX_COUNT, 1); + OUT_RING(ring, ctx->fragtex.num_textures); + } else { + dirty &= ~FD_DIRTY_FRAGTEX; + } + } + + if (needs_border) + emit_border_color(ctx, ring); + + ctx->dirty &= ~dirty; +} + +/* emit setup at begin of new cmdstream buffer (don't rely on previous + * state, there could have been a context switch between ioctls): + */ +void +fd5_emit_restore(struct fd_batch *batch, struct fd_ringbuffer *ring) +{ + struct fd_context *ctx = batch->ctx; + + fd5_set_render_mode(ctx, ring, BYPASS); + fd5_cache_flush(batch, ring); + + OUT_PKT4(ring, REG_A5XX_HLSQ_UPDATE_CNTL, 1); + OUT_RING(ring, 0xfffff); + +/* +t7 opcode: CP_PERFCOUNTER_ACTION (50) (4 dwords) +0000000500024048: 70d08003 00000000 001c5000 00000005 +t7 opcode: CP_PERFCOUNTER_ACTION (50) (4 dwords) +0000000500024058: 70d08003 00000010 001c7000 00000005 + +t7 opcode: CP_WAIT_FOR_IDLE (26) (1 dwords) +0000000500024068: 70268000 +*/ + + OUT_PKT4(ring, REG_A5XX_PC_RESTART_INDEX, 1); + OUT_RING(ring, 0xffffffff); + + OUT_PKT4(ring, REG_A5XX_PC_RASTER_CNTL, 1); + OUT_RING(ring, 0x00000012); + + OUT_PKT4(ring, REG_A5XX_GRAS_LRZ_CNTL, 1); + OUT_RING(ring, 0x00000000); + + OUT_PKT4(ring, REG_A5XX_GRAS_SU_POINT_MINMAX, 2); + OUT_RING(ring, A5XX_GRAS_SU_POINT_MINMAX_MIN(1.0) | + A5XX_GRAS_SU_POINT_MINMAX_MAX(4092.0)); + OUT_RING(ring, A5XX_GRAS_SU_POINT_SIZE(0.5)); + + OUT_PKT4(ring, REG_A5XX_GRAS_SU_CONSERVATIVE_RAS_CNTL, 1); + OUT_RING(ring, 0x00000000); /* GRAS_SU_CONSERVATIVE_RAS_CNTL */ + + OUT_PKT4(ring, REG_A5XX_GRAS_SC_SCREEN_SCISSOR_CNTL, 1); + OUT_RING(ring, 0x00000000); /* GRAS_SC_SCREEN_SCISSOR_CNTL */ + + OUT_PKT4(ring, REG_A5XX_SP_VS_CONFIG_MAX_CONST, 1); + OUT_RING(ring, 0); /* SP_VS_CONFIG_MAX_CONST */ + + OUT_PKT4(ring, REG_A5XX_SP_FS_CONFIG_MAX_CONST, 1); + OUT_RING(ring, 0); /* SP_FS_CONFIG_MAX_CONST */ + + OUT_PKT4(ring, REG_A5XX_UNKNOWN_E292, 2); + OUT_RING(ring, 0x00000000); /* UNKNOWN_E292 */ + OUT_RING(ring, 0x00000000); /* UNKNOWN_E293 */ + + OUT_PKT4(ring, REG_A5XX_RB_MODE_CNTL, 1); + OUT_RING(ring, 0x00000044); /* RB_MODE_CNTL */ + + OUT_PKT4(ring, REG_A5XX_RB_DBG_ECO_CNTL, 1); + OUT_RING(ring, 0x00100000); /* RB_DBG_ECO_CNTL */ + + OUT_PKT4(ring, REG_A5XX_VFD_MODE_CNTL, 1); + OUT_RING(ring, 0x00000000); /* VFD_MODE_CNTL */ + + OUT_PKT4(ring, REG_A5XX_PC_MODE_CNTL, 1); + OUT_RING(ring, 0x0000001f); /* PC_MODE_CNTL */ + + OUT_PKT4(ring, REG_A5XX_SP_MODE_CNTL, 1); + OUT_RING(ring, 0x0000001e); /* SP_MODE_CNTL */ + + OUT_PKT4(ring, REG_A5XX_SP_DBG_ECO_CNTL, 1); + OUT_RING(ring, 0x40000800); /* SP_DBG_ECO_CNTL */ + + OUT_PKT4(ring, REG_A5XX_TPL1_MODE_CNTL, 1); + OUT_RING(ring, 0x00000544); /* TPL1_MODE_CNTL */ + + OUT_PKT4(ring, REG_A5XX_HLSQ_TIMEOUT_THRESHOLD_0, 2); + OUT_RING(ring, 0x00000080); /* HLSQ_TIMEOUT_THRESHOLD_0 */ + OUT_RING(ring, 0x00000000); /* HLSQ_TIMEOUT_THRESHOLD_1 */ + + OUT_PKT4(ring, REG_A5XX_VPC_DBG_ECO_CNTL, 1); + OUT_RING(ring, 0x00000400); /* VPC_DBG_ECO_CNTL */ + + OUT_PKT4(ring, REG_A5XX_HLSQ_MODE_CNTL, 1); + OUT_RING(ring, 0x00000001); /* HLSQ_MODE_CNTL */ + + OUT_PKT4(ring, REG_A5XX_VPC_MODE_CNTL, 1); + OUT_RING(ring, 0x00000000); /* VPC_MODE_CNTL */ + + /* we don't use this yet.. probably best to disable.. */ + OUT_PKT7(ring, CP_SET_DRAW_STATE, 3); + OUT_RING(ring, CP_SET_DRAW_STATE__0_COUNT(0) | + CP_SET_DRAW_STATE__0_DISABLE_ALL_GROUPS | + CP_SET_DRAW_STATE__0_GROUP_ID(0)); + OUT_RING(ring, CP_SET_DRAW_STATE__1_ADDR_LO(0)); + OUT_RING(ring, CP_SET_DRAW_STATE__2_ADDR_HI(0)); + + /* other regs not used (yet?) and always seem to have same value: */ + OUT_PKT4(ring, REG_A5XX_GRAS_CL_CNTL, 1); + OUT_RING(ring, 0x00000080); /* GRAS_CL_CNTL */ + + OUT_PKT4(ring, REG_A5XX_GRAS_SU_CONSERVATIVE_RAS_CNTL, 1); + OUT_RING(ring, 0x00000000); /* GRAS_SU_CONSERVATIVE_RAS_CNTL */ + + OUT_PKT4(ring, REG_A5XX_GRAS_SC_BIN_CNTL, 1); + OUT_RING(ring, 0x00000000); /* GRAS_SC_BIN_CNTL */ + + OUT_PKT4(ring, REG_A5XX_GRAS_SC_BIN_CNTL, 1); + OUT_RING(ring, 0x00000000); /* GRAS_SC_BIN_CNTL */ + + OUT_PKT4(ring, REG_A5XX_VPC_FS_PRIMITIVEID_CNTL, 1); + OUT_RING(ring, 0x000000ff); /* VPC_FS_PRIMITIVEID_CNTL */ + + OUT_PKT4(ring, REG_A5XX_VPC_SO_OVERRIDE, 1); + OUT_RING(ring, A5XX_VPC_SO_OVERRIDE_SO_DISABLE); + + OUT_PKT4(ring, REG_A5XX_VPC_SO_BUFFER_BASE_LO(0), 3); + OUT_RING(ring, 0x00000000); /* VPC_SO_BUFFER_BASE_LO_0 */ + OUT_RING(ring, 0x00000000); /* VPC_SO_BUFFER_BASE_HI_0 */ + OUT_RING(ring, 0x00000000); /* VPC_SO_BUFFER_SIZE_0 */ + + OUT_PKT4(ring, REG_A5XX_VPC_SO_FLUSH_BASE_LO(0), 2); + OUT_RING(ring, 0x00000000); /* VPC_SO_FLUSH_BASE_LO_0 */ + OUT_RING(ring, 0x00000000); /* VPC_SO_FLUSH_BASE_HI_0 */ + + OUT_PKT4(ring, REG_A5XX_PC_GS_PARAM, 1); + OUT_RING(ring, 0x00000000); /* PC_GS_PARAM */ + + OUT_PKT4(ring, REG_A5XX_PC_HS_PARAM, 1); + OUT_RING(ring, 0x00000000); /* PC_HS_PARAM */ + + OUT_PKT4(ring, REG_A5XX_TPL1_TP_FS_ROTATION_CNTL, 1); + OUT_RING(ring, 0x00000000); /* TPL1_TP_FS_ROTATION_CNTL */ + + OUT_PKT4(ring, REG_A5XX_UNKNOWN_E001, 1); + OUT_RING(ring, 0x00000000); /* UNKNOWN_E001 */ + + OUT_PKT4(ring, REG_A5XX_UNKNOWN_E004, 1); + OUT_RING(ring, 0x00000000); /* UNKNOWN_E004 */ + + OUT_PKT4(ring, REG_A5XX_UNKNOWN_E093, 1); + OUT_RING(ring, 0x00000000); /* UNKNOWN_E093 */ + + OUT_PKT4(ring, REG_A5XX_UNKNOWN_E1C7, 1); + OUT_RING(ring, 0x00000000); /* UNKNOWN_E1C7 */ + + OUT_PKT4(ring, REG_A5XX_UNKNOWN_E29A, 1); + OUT_RING(ring, 0x00ffff00); /* UNKNOWN_E29A */ + + OUT_PKT4(ring, REG_A5XX_VPC_SO_BUF_CNTL, 1); + OUT_RING(ring, 0x00000000); /* VPC_SO_BUF_CNTL */ + + OUT_PKT4(ring, REG_A5XX_VPC_SO_BUFFER_OFFSET(0), 1); + OUT_RING(ring, 0x00000000); /* UNKNOWN_E2AB */ + + OUT_PKT4(ring, REG_A5XX_UNKNOWN_E389, 1); + OUT_RING(ring, 0x00000000); /* UNKNOWN_E389 */ + + OUT_PKT4(ring, REG_A5XX_UNKNOWN_E38D, 1); + OUT_RING(ring, 0x00000000); /* UNKNOWN_E38D */ + + OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5AB, 1); + OUT_RING(ring, 0x00000000); /* UNKNOWN_E5AB */ + + OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5C2, 1); + OUT_RING(ring, 0x00000000); /* UNKNOWN_E5C2 */ + + OUT_PKT4(ring, REG_A5XX_VPC_SO_BUFFER_BASE_LO(1), 3); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + + OUT_PKT4(ring, REG_A5XX_VPC_SO_BUFFER_OFFSET(1), 6); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + + OUT_PKT4(ring, REG_A5XX_VPC_SO_BUFFER_OFFSET(2), 6); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + + OUT_PKT4(ring, REG_A5XX_VPC_SO_BUFFER_OFFSET(3), 3); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + + OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5DB, 1); + OUT_RING(ring, 0x00000000); + + OUT_PKT4(ring, REG_A5XX_UNKNOWN_E600, 1); + OUT_RING(ring, 0x00000000); + + OUT_PKT4(ring, REG_A5XX_UNKNOWN_E640, 1); + OUT_RING(ring, 0x00000000); + + OUT_PKT4(ring, REG_A5XX_TPL1_VS_TEX_COUNT, 4); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + + OUT_PKT4(ring, REG_A5XX_TPL1_FS_TEX_COUNT, 2); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + + OUT_PKT4(ring, REG_A5XX_UNKNOWN_E7C0, 3); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + + OUT_PKT4(ring, REG_A5XX_UNKNOWN_E7C5, 3); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + + OUT_PKT4(ring, REG_A5XX_UNKNOWN_E7CA, 3); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + + OUT_PKT4(ring, REG_A5XX_UNKNOWN_E7CF, 3); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + + OUT_PKT4(ring, REG_A5XX_UNKNOWN_E7D4, 3); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + + OUT_PKT4(ring, REG_A5XX_UNKNOWN_E7D9, 3); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + OUT_RING(ring, 0x00000000); + + // TODO hacks.. these should not be hardcoded: + OUT_PKT4(ring, REG_A5XX_GRAS_SC_CNTL, 1); + OUT_RING(ring, 0x00000008); /* GRAS_SC_CNTL */ + + fd_hw_query_enable(batch, ring); +} + +static void +fd5_emit_ib(struct fd_ringbuffer *ring, struct fd_ringbuffer *target) +{ + __OUT_IB5(ring, target); +} + +void +fd5_emit_init(struct pipe_context *pctx) +{ + struct fd_context *ctx = fd_context(pctx); + ctx->emit_const = fd5_emit_const; + ctx->emit_const_bo = fd5_emit_const_bo; + ctx->emit_ib = fd5_emit_ib; +} diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_emit.h mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_emit.h --- mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_emit.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_emit.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,164 @@ +/* + * Copyright (C) 2016 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#ifndef FD5_EMIT_H +#define FD5_EMIT_H + +#include "pipe/p_context.h" + +#include "freedreno_context.h" +#include "fd5_context.h" +#include "fd5_format.h" +#include "fd5_program.h" +#include "ir3_shader.h" + +struct fd_ringbuffer; + +/* grouped together emit-state for prog/vertex/state emit: */ +struct fd5_emit { + struct pipe_debug_callback *debug; + const struct fd_vertex_state *vtx; + const struct fd_program_stateobj *prog; + const struct pipe_draw_info *info; + struct ir3_shader_key key; + uint32_t dirty; + + uint32_t sprite_coord_enable; /* bitmask */ + bool sprite_coord_mode; + bool rasterflat; + bool no_decode_srgb; + + /* cached to avoid repeated lookups of same variants: */ + const struct ir3_shader_variant *vp, *fp; + /* TODO: other shader stages.. */ + + unsigned streamout_mask; +}; + +static inline enum a5xx_color_fmt fd5_emit_format(struct pipe_surface *surf) +{ + if (!surf) + return 0; + return fd5_pipe2color(surf->format); +} + +static inline const struct ir3_shader_variant * +fd5_emit_get_vp(struct fd5_emit *emit) +{ + if (!emit->vp) { + struct fd5_shader_stateobj *so = emit->prog->vp; + emit->vp = ir3_shader_variant(so->shader, emit->key, emit->debug); + } + return emit->vp; +} + +static inline const struct ir3_shader_variant * +fd5_emit_get_fp(struct fd5_emit *emit) +{ + if (!emit->fp) { + if (emit->key.binning_pass) { + /* use dummy stateobj to simplify binning vs non-binning: */ + static const struct ir3_shader_variant binning_fp = {}; + emit->fp = &binning_fp; + } else { + struct fd5_shader_stateobj *so = emit->prog->fp; + emit->fp = ir3_shader_variant(so->shader, emit->key, emit->debug); + } + } + return emit->fp; +} + +static inline void +fd5_cache_flush(struct fd_batch *batch, struct fd_ringbuffer *ring) +{ + fd_reset_wfi(batch); + OUT_PKT4(ring, REG_A5XX_UCHE_CACHE_INVALIDATE_MIN_LO, 5); + OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MIN_LO */ + OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MIN_HI */ + OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MAX_LO */ + OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MAX_HI */ + OUT_RING(ring, 0x00000012); /* UCHE_CACHE_INVALIDATE */ + fd_wfi(batch, ring); +} + +static inline void +fd5_set_render_mode(struct fd_context *ctx, struct fd_ringbuffer *ring, + enum render_mode_cmd mode) +{ + /* TODO add preemption support, gmem bypass, etc */ + emit_marker5(ring, 7); + OUT_PKT7(ring, CP_SET_RENDER_MODE, 5); + OUT_RING(ring, CP_SET_RENDER_MODE_0_MODE(mode)); + OUT_RING(ring, 0x00000000); /* ADDR_LO */ + OUT_RING(ring, 0x00000000); /* ADDR_HI */ + OUT_RING(ring, COND(mode == GMEM, CP_SET_RENDER_MODE_3_GMEM_ENABLE)); + OUT_RING(ring, 0x00000000); + emit_marker5(ring, 7); +} + +static inline void +fd5_emit_blit(struct fd_context *ctx, struct fd_ringbuffer *ring) +{ + struct fd5_context *fd5_ctx = fd5_context(ctx); + + emit_marker5(ring, 7); + + OUT_PKT7(ring, CP_EVENT_WRITE, 4); + OUT_RING(ring, CP_EVENT_WRITE_0_EVENT(BLIT)); + OUT_RELOCW(ring, fd5_ctx->blit_mem, 0, 0, 0); /* ADDR_LO/HI */ + OUT_RING(ring, 0x00000000); + + emit_marker5(ring, 7); +} + +static inline void +fd5_emit_render_cntl(struct fd_context *ctx, bool blit) +{ + struct fd_ringbuffer *ring = ctx->batch->draw; + + /* TODO eventually this partially depends on the pfb state, ie. + * which of the cbuf(s)/zsbuf has an UBWC flag buffer.. that part + * we could probably cache and just regenerate if framebuffer + * state is dirty (or something like that).. + * + * Other bits seem to depend on query state, like if samples-passed + * query is active. + */ + OUT_PKT4(ring, REG_A5XX_RB_RENDER_CNTL, 1); + OUT_RING(ring, 0x00000000 | /* RB_RENDER_CNTL */ + COND(!blit, 0x8)); +} + +void fd5_emit_vertex_bufs(struct fd_ringbuffer *ring, struct fd5_emit *emit); + +void fd5_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring, + struct fd5_emit *emit); + +void fd5_emit_restore(struct fd_batch *batch, struct fd_ringbuffer *ring); + +void fd5_emit_init(struct pipe_context *pctx); + +#endif /* FD5_EMIT_H */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_format.c mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_format.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_format.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_format.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,445 @@ +/* + * Copyright (C) 2016 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#include "pipe/p_defines.h" +#include "util/u_format.h" + +#include "fd5_format.h" + + +/* Specifies the table of all the formats and their features. Also supplies + * the helpers that look up various data in those tables. + */ + +struct fd5_format { + enum a5xx_vtx_fmt vtx; + enum a5xx_tex_fmt tex; + enum a5xx_color_fmt rb; + enum a3xx_color_swap swap; + boolean present; +}; + +#define RB5_NONE ~0 + +/* vertex + texture */ +#define VT(pipe, fmt, rbfmt, swapfmt) \ + [PIPE_FORMAT_ ## pipe] = { \ + .present = 1, \ + .vtx = VFMT5_ ## fmt, \ + .tex = TFMT5_ ## fmt, \ + .rb = RB5_ ## rbfmt, \ + .swap = swapfmt \ + } + +/* texture-only */ +#define _T(pipe, fmt, rbfmt, swapfmt) \ + [PIPE_FORMAT_ ## pipe] = { \ + .present = 1, \ + .vtx = ~0, \ + .tex = TFMT5_ ## fmt, \ + .rb = RB5_ ## rbfmt, \ + .swap = swapfmt \ + } + +/* vertex-only */ +#define V_(pipe, fmt, rbfmt, swapfmt) \ + [PIPE_FORMAT_ ## pipe] = { \ + .present = 1, \ + .vtx = VFMT5_ ## fmt, \ + .tex = ~0, \ + .rb = RB5_ ## rbfmt, \ + .swap = swapfmt \ + } + +static struct fd5_format formats[PIPE_FORMAT_COUNT] = { + /* 8-bit */ + VT(R8_UNORM, 8_UNORM, R8_UNORM, WZYX), + V_(R8_SNORM, 8_SNORM, NONE, WZYX), + VT(R8_UINT, 8_UINT, R8_UINT, WZYX), + VT(R8_SINT, 8_SINT, R8_SINT, WZYX), + V_(R8_USCALED, 8_UINT, NONE, WZYX), + V_(R8_SSCALED, 8_UINT, NONE, WZYX), + + _T(A8_UNORM, 8_UNORM, NONE, WZYX), + _T(L8_UNORM, 8_UNORM, R8_UNORM, WZYX), + _T(I8_UNORM, 8_UNORM, NONE, WZYX), + +// _T(A8_UINT, 8_UINT, NONE, WZYX), +// _T(A8_SINT, 8_SINT, NONE, WZYX), +// _T(L8_UINT, 8_UINT, NONE, WZYX), +// _T(L8_SINT, 8_SINT, NONE, WZYX), +// _T(I8_UINT, 8_UINT, NONE, WZYX), +// _T(I8_SINT, 8_SINT, NONE, WZYX), + +// _T(S8_UINT, 8_UINT, R8_UNORM, WZYX), + + /* 16-bit */ + VT(R16_UNORM, 16_UNORM, R16_UNORM, WZYX), + VT(R16_SNORM, 16_SNORM, R16_SNORM, WZYX), + VT(R16_UINT, 16_UINT, R16_UINT, WZYX), + VT(R16_SINT, 16_SINT, R16_SINT, WZYX), + V_(R16_USCALED, 16_UINT, NONE, WZYX), + V_(R16_SSCALED, 16_UINT, NONE, WZYX), + VT(R16_FLOAT, 16_FLOAT, R16_FLOAT, WZYX), + +// _T(A16_UNORM, 16_UNORM, NONE, WZYX), +// _T(A16_SNORM, 16_SNORM, NONE, WZYX), +// _T(A16_UINT, 16_UINT, NONE, WZYX), +// _T(A16_SINT, 16_SINT, NONE, WZYX), +// _T(L16_UNORM, 16_UNORM, NONE, WZYX), +// _T(L16_SNORM, 16_SNORM, NONE, WZYX), +// _T(L16_UINT, 16_UINT, NONE, WZYX), +// _T(L16_SINT, 16_SINT, NONE, WZYX), +// _T(I16_UNORM, 16_UNORM, NONE, WZYX), +// _T(I16_SNORM, 16_SNORM, NONE, WZYX), +// _T(I16_UINT, 16_UINT, NONE, WZYX), +// _T(I16_SINT, 16_SINT, NONE, WZYX), + + VT(R8G8_UNORM, 8_8_UNORM, R8G8_UNORM, WZYX), + VT(R8G8_SNORM, 8_8_SNORM, R8G8_SNORM, WZYX), + VT(R8G8_UINT, 8_8_UINT, R8G8_UINT, WZYX), + VT(R8G8_SINT, 8_8_SINT, R8G8_SINT, WZYX), + V_(R8G8_USCALED, 8_8_UINT, NONE, WZYX), + V_(R8G8_SSCALED, 8_8_SINT, NONE, WZYX), + +// _T(L8A8_UINT, 8_8_UINT, NONE, WZYX), +// _T(L8A8_SINT, 8_8_SINT, NONE, WZYX), + + _T(B5G6R5_UNORM, 5_6_5_UNORM, R5G6B5_UNORM, WXYZ), + _T(B5G5R5A1_UNORM, 5_5_5_1_UNORM, R5G5B5A1_UNORM, WXYZ), + _T(B5G5R5X1_UNORM, 5_5_5_1_UNORM, R5G5B5A1_UNORM, WXYZ), + _T(B4G4R4A4_UNORM, 4_4_4_4_UNORM, R4G4B4A4_UNORM, WXYZ), + + /* 24-bit */ + V_(R8G8B8_UNORM, 8_8_8_UNORM, NONE, WZYX), + V_(R8G8B8_SNORM, 8_8_8_SNORM, NONE, WZYX), + V_(R8G8B8_UINT, 8_8_8_UINT, NONE, WZYX), + V_(R8G8B8_SINT, 8_8_8_SINT, NONE, WZYX), + V_(R8G8B8_USCALED, 8_8_8_UINT, NONE, WZYX), + V_(R8G8B8_SSCALED, 8_8_8_SINT, NONE, WZYX), + + /* 32-bit */ + VT(R32_UINT, 32_UINT, R32_UINT, WZYX), + VT(R32_SINT, 32_SINT, R32_SINT, WZYX), + V_(R32_USCALED, 32_UINT, NONE, WZYX), + V_(R32_SSCALED, 32_UINT, NONE, WZYX), + VT(R32_FLOAT, 32_FLOAT, R32_FLOAT,WZYX), + V_(R32_FIXED, 32_FIXED, NONE, WZYX), + +// _T(A32_UINT, 32_UINT, NONE, WZYX), +// _T(A32_SINT, 32_SINT, NONE, WZYX), +// _T(L32_UINT, 32_UINT, NONE, WZYX), +// _T(L32_SINT, 32_SINT, NONE, WZYX), +// _T(I32_UINT, 32_UINT, NONE, WZYX), +// _T(I32_SINT, 32_SINT, NONE, WZYX), + + VT(R16G16_UNORM, 16_16_UNORM, R16G16_UNORM, WZYX), + VT(R16G16_SNORM, 16_16_SNORM, R16G16_SNORM, WZYX), + VT(R16G16_UINT, 16_16_UINT, R16G16_UINT, WZYX), + VT(R16G16_SINT, 16_16_SINT, R16G16_SINT, WZYX), + V_(R16G16_USCALED, 16_16_UINT, NONE, WZYX), + V_(R16G16_SSCALED, 16_16_SINT, NONE, WZYX), + VT(R16G16_FLOAT, 16_16_FLOAT, R16G16_FLOAT, WZYX), + +// _T(L16A16_UNORM, 16_16_UNORM, NONE, WZYX), +// _T(L16A16_SNORM, 16_16_SNORM, NONE, WZYX), +// _T(L16A16_UINT, 16_16_UINT, NONE, WZYX), +// _T(L16A16_SINT, 16_16_SINT, NONE, WZYX), + + VT(R8G8B8A8_UNORM, 8_8_8_8_UNORM, R8G8B8A8_UNORM, WZYX), + _T(R8G8B8X8_UNORM, 8_8_8_8_UNORM, R8G8B8A8_UNORM, WZYX), + _T(R8G8B8A8_SRGB, 8_8_8_8_UNORM, R8G8B8A8_UNORM, WZYX), + _T(R8G8B8X8_SRGB, 8_8_8_8_UNORM, R8G8B8A8_UNORM, WZYX), + V_(R8G8B8A8_SNORM, 8_8_8_8_SNORM, NONE, WZYX), + V_(R8G8B8A8_UINT, 8_8_8_8_UINT, R8G8B8A8_UINT, WZYX), + V_(R8G8B8A8_SINT, 8_8_8_8_SINT, NONE, WZYX), + V_(R8G8B8A8_USCALED, 8_8_8_8_UINT, NONE, WZYX), + V_(R8G8B8A8_SSCALED, 8_8_8_8_SINT, NONE, WZYX), + + VT(B8G8R8A8_UNORM, 8_8_8_8_UNORM, R8G8B8A8_UNORM, WXYZ), + _T(B8G8R8X8_UNORM, 8_8_8_8_UNORM, R8G8B8A8_UNORM, WXYZ), + VT(B8G8R8A8_SRGB, 8_8_8_8_UNORM, R8G8B8A8_UNORM, WXYZ), + _T(B8G8R8X8_SRGB, 8_8_8_8_UNORM, R8G8B8A8_UNORM, WXYZ), + + VT(A8B8G8R8_UNORM, 8_8_8_8_UNORM, R8G8B8A8_UNORM, XYZW), + _T(X8B8G8R8_UNORM, 8_8_8_8_UNORM, R8G8B8A8_UNORM, XYZW), + _T(A8B8G8R8_SRGB, 8_8_8_8_UNORM, R8G8B8A8_UNORM, XYZW), + _T(X8B8G8R8_SRGB, 8_8_8_8_UNORM, R8G8B8A8_UNORM, XYZW), + + VT(A8R8G8B8_UNORM, 8_8_8_8_UNORM, R8G8B8A8_UNORM, ZYXW), + _T(X8R8G8B8_UNORM, 8_8_8_8_UNORM, R8G8B8A8_UNORM, ZYXW), + _T(A8R8G8B8_SRGB, 8_8_8_8_UNORM, R8G8B8A8_UNORM, ZYXW), + _T(X8R8G8B8_SRGB, 8_8_8_8_UNORM, R8G8B8A8_UNORM, ZYXW), + + _T(R10G10B10A2_UNORM, 10_10_10_2_UNORM, NONE, WZYX), + _T(B10G10R10A2_UNORM, 10_10_10_2_UNORM, NONE, WXYZ), + _T(B10G10R10X2_UNORM, 10_10_10_2_UNORM, NONE, WXYZ), +// V_(R10G10B10A2_SNORM, 10_10_10_2_SNORM, NONE, WZYX), +// V_(B10G10R10A2_SNORM, 10_10_10_2_SNORM, NONE, WXYZ), + _T(R10G10B10A2_UINT, 10_10_10_2_UINT, R10G10B10A2_UINT, WZYX), + _T(B10G10R10A2_UINT, 10_10_10_2_UINT, R10G10B10A2_UINT, WXYZ), +// V_(R10G10B10A2_USCALED, 10_10_10_2_UINT, NONE, WZYX), +// V_(B10G10R10A2_USCALED, 10_10_10_2_UINT, NONE, WXYZ), +// V_(R10G10B10A2_SSCALED, 10_10_10_2_SINT, NONE, WZYX), +// V_(B10G10R10A2_SSCALED, 10_10_10_2_SINT, NONE, WXYZ), + + _T(R11G11B10_FLOAT, 11_11_10_FLOAT, R11G11B10_FLOAT, WZYX), + _T(R9G9B9E5_FLOAT, 9_9_9_E5_FLOAT, NONE, WZYX), + + _T(Z24X8_UNORM, X8Z24_UNORM, R8G8B8A8_UNORM, WZYX), + _T(Z24_UNORM_S8_UINT, X8Z24_UNORM, R8G8B8A8_UNORM, WZYX), + _T(Z32_FLOAT, 32_FLOAT, R8G8B8A8_UNORM, WZYX), + _T(Z32_FLOAT_S8X24_UINT, 32_FLOAT,R8G8B8A8_UNORM, WZYX), + + /* 48-bit */ + V_(R16G16B16_UNORM, 16_16_16_UNORM, NONE, WZYX), + V_(R16G16B16_SNORM, 16_16_16_SNORM, NONE, WZYX), + V_(R16G16B16_UINT, 16_16_16_UINT, NONE, WZYX), + V_(R16G16B16_SINT, 16_16_16_SINT, NONE, WZYX), + V_(R16G16B16_USCALED, 16_16_16_UINT, NONE, WZYX), + V_(R16G16B16_SSCALED, 16_16_16_SINT, NONE, WZYX), + V_(R16G16B16_FLOAT, 16_16_16_FLOAT, NONE, WZYX), + + /* 64-bit */ + V_(R16G16B16A16_UNORM, 16_16_16_16_UNORM, NONE, WZYX), + V_(R16G16B16X16_UNORM, 16_16_16_16_UNORM, NONE, WZYX), + V_(R16G16B16A16_SNORM, 16_16_16_16_SNORM, NONE, WZYX), + V_(R16G16B16X16_SNORM, 16_16_16_16_SNORM, NONE, WZYX), + V_(R16G16B16A16_UINT, 16_16_16_16_UINT, NONE, WZYX), +// _T(R16G16B16X16_UINT, 16_16_16_16_UINT, R16G16B16A16_UINT, WZYX), + V_(R16G16B16A16_SINT, 16_16_16_16_SINT, NONE, WZYX), +// _T(R16G16B16X16_SINT, 16_16_16_16_SINT, R16G16B16A16_SINT, WZYX), + V_(R16G16B16A16_USCALED, 16_16_16_16_UINT, NONE, WZYX), + V_(R16G16B16A16_SSCALED, 16_16_16_16_SINT, NONE, WZYX), + VT(R16G16B16A16_FLOAT, 16_16_16_16_FLOAT, R16G16B16A16_FLOAT, WZYX), + _T(R16G16B16X16_FLOAT, 16_16_16_16_FLOAT, R16G16B16A16_FLOAT, WZYX), + + VT(R32G32_UINT, 32_32_UINT, R32G32_UINT, WZYX), + VT(R32G32_SINT, 32_32_SINT, R32G32_SINT, WZYX), + V_(R32G32_USCALED, 32_32_UINT, NONE, WZYX), + V_(R32G32_SSCALED, 32_32_SINT, NONE, WZYX), + VT(R32G32_FLOAT, 32_32_FLOAT, R32G32_FLOAT,WZYX), + V_(R32G32_FIXED, 32_32_FIXED, NONE, WZYX), + +// _T(L32A32_UINT, 32_32_UINT, NONE, WZYX), +// _T(L32A32_SINT, 32_32_SINT, NONE, WZYX), + + /* 96-bit */ + V_(R32G32B32_UINT, 32_32_32_UINT, NONE, WZYX), + V_(R32G32B32_SINT, 32_32_32_SINT, NONE, WZYX), + V_(R32G32B32_USCALED, 32_32_32_UINT, NONE, WZYX), + V_(R32G32B32_SSCALED, 32_32_32_SINT, NONE, WZYX), + V_(R32G32B32_FLOAT, 32_32_32_FLOAT, NONE, WZYX), + V_(R32G32B32_FIXED, 32_32_32_FIXED, NONE, WZYX), + + /* 128-bit */ + VT(R32G32B32A32_UINT, 32_32_32_32_UINT, R32G32B32A32_UINT, WZYX), + _T(R32G32B32X32_UINT, 32_32_32_32_UINT, R32G32B32A32_UINT, WZYX), + VT(R32G32B32A32_SINT, 32_32_32_32_SINT, R32G32B32A32_SINT, WZYX), + _T(R32G32B32X32_SINT, 32_32_32_32_SINT, R32G32B32A32_SINT, WZYX), + V_(R32G32B32A32_USCALED, 32_32_32_32_UINT, NONE, WZYX), + V_(R32G32B32A32_SSCALED, 32_32_32_32_SINT, NONE, WZYX), + VT(R32G32B32A32_FLOAT, 32_32_32_32_FLOAT, R32G32B32A32_FLOAT, WZYX), + _T(R32G32B32X32_FLOAT, 32_32_32_32_FLOAT, R32G32B32A32_FLOAT, WZYX), + V_(R32G32B32A32_FIXED, 32_32_32_32_FIXED, NONE, WZYX), + + /* compressed */ +// _T(ETC1_RGB8, ETC1, NONE, WZYX), +// _T(ETC2_RGB8, ETC2_RGB8, NONE, WZYX), +// _T(ETC2_SRGB8, ETC2_RGB8, NONE, WZYX), +// _T(ETC2_RGB8A1, ETC2_RGB8A1, NONE, WZYX), +// _T(ETC2_SRGB8A1, ETC2_RGB8A1, NONE, WZYX), +// _T(ETC2_RGBA8, ETC2_RGBA8, NONE, WZYX), +// _T(ETC2_SRGBA8, ETC2_RGBA8, NONE, WZYX), +// _T(ETC2_R11_UNORM, ETC2_R11_UNORM, NONE, WZYX), +// _T(ETC2_R11_SNORM, ETC2_R11_SNORM, NONE, WZYX), +// _T(ETC2_RG11_UNORM, ETC2_RG11_UNORM, NONE, WZYX), +// _T(ETC2_RG11_SNORM, ETC2_RG11_SNORM, NONE, WZYX), + +// _T(DXT1_RGB, DXT1, NONE, WZYX), +// _T(DXT1_SRGB, DXT1, NONE, WZYX), +// _T(DXT1_RGBA, DXT1, NONE, WZYX), +// _T(DXT1_SRGBA, DXT1, NONE, WZYX), +// _T(DXT3_RGBA, DXT3, NONE, WZYX), +// _T(DXT3_SRGBA, DXT3, NONE, WZYX), +// _T(DXT5_RGBA, DXT5, NONE, WZYX), +// _T(DXT5_SRGBA, DXT5, NONE, WZYX), + +// _T(BPTC_RGBA_UNORM, BPTC, NONE, WZYX), +// _T(BPTC_SRGBA, BPTC, NONE, WZYX), +// _T(BPTC_RGB_FLOAT, BPTC_FLOAT, NONE, WZYX), +// _T(BPTC_RGB_UFLOAT, BPTC_UFLOAT, NONE, WZYX), + +// _T(RGTC1_UNORM, RGTC1_UNORM, NONE, WZYX), +// _T(RGTC1_SNORM, RGTC1_SNORM, NONE, WZYX), +// _T(RGTC2_UNORM, RGTC2_UNORM, NONE, WZYX), +// _T(RGTC2_SNORM, RGTC2_SNORM, NONE, WZYX), +// _T(LATC1_UNORM, RGTC1_UNORM, NONE, WZYX), +// _T(LATC1_SNORM, RGTC1_SNORM, NONE, WZYX), +// _T(LATC2_UNORM, RGTC2_UNORM, NONE, WZYX), +// _T(LATC2_SNORM, RGTC2_SNORM, NONE, WZYX), + +// _T(ASTC_4x4, ASTC_4x4, NONE, WZYX), +// _T(ASTC_5x4, ASTC_5x4, NONE, WZYX), +// _T(ASTC_5x5, ASTC_5x5, NONE, WZYX), +// _T(ASTC_6x5, ASTC_6x5, NONE, WZYX), +// _T(ASTC_6x6, ASTC_6x6, NONE, WZYX), +// _T(ASTC_8x5, ASTC_8x5, NONE, WZYX), +// _T(ASTC_8x6, ASTC_8x6, NONE, WZYX), +// _T(ASTC_8x8, ASTC_8x8, NONE, WZYX), +// _T(ASTC_10x5, ASTC_10x5, NONE, WZYX), +// _T(ASTC_10x6, ASTC_10x6, NONE, WZYX), +// _T(ASTC_10x8, ASTC_10x8, NONE, WZYX), +// _T(ASTC_10x10, ASTC_10x10, NONE, WZYX), +// _T(ASTC_12x10, ASTC_12x10, NONE, WZYX), +// _T(ASTC_12x12, ASTC_12x12, NONE, WZYX), + +// _T(ASTC_4x4_SRGB, ASTC_4x4, NONE, WZYX), +// _T(ASTC_5x4_SRGB, ASTC_5x4, NONE, WZYX), +// _T(ASTC_5x5_SRGB, ASTC_5x5, NONE, WZYX), +// _T(ASTC_6x5_SRGB, ASTC_6x5, NONE, WZYX), +// _T(ASTC_6x6_SRGB, ASTC_6x6, NONE, WZYX), +// _T(ASTC_8x5_SRGB, ASTC_8x5, NONE, WZYX), +// _T(ASTC_8x6_SRGB, ASTC_8x6, NONE, WZYX), +// _T(ASTC_8x8_SRGB, ASTC_8x8, NONE, WZYX), +// _T(ASTC_10x5_SRGB, ASTC_10x5, NONE, WZYX), +// _T(ASTC_10x6_SRGB, ASTC_10x6, NONE, WZYX), +// _T(ASTC_10x8_SRGB, ASTC_10x8, NONE, WZYX), +// _T(ASTC_10x10_SRGB, ASTC_10x10, NONE, WZYX), +// _T(ASTC_12x10_SRGB, ASTC_12x10, NONE, WZYX), +// _T(ASTC_12x12_SRGB, ASTC_12x12, NONE, WZYX), +}; + +/* convert pipe format to vertex buffer format: */ +enum a5xx_vtx_fmt +fd5_pipe2vtx(enum pipe_format format) +{ + if (!formats[format].present) + return ~0; + return formats[format].vtx; +} + +/* convert pipe format to texture sampler format: */ +enum a5xx_tex_fmt +fd5_pipe2tex(enum pipe_format format) +{ + if (!formats[format].present) + return ~0; + return formats[format].tex; +} + +/* convert pipe format to MRT / copydest format used for render-target: */ +enum a5xx_color_fmt +fd5_pipe2color(enum pipe_format format) +{ + if (!formats[format].present) + return ~0; + return formats[format].rb; +} + +enum a3xx_color_swap +fd5_pipe2swap(enum pipe_format format) +{ + if (!formats[format].present) + return WZYX; + return formats[format].swap; +} + +// XXX possibly same as a4xx.. +enum a5xx_tex_fetchsize +fd5_pipe2fetchsize(enum pipe_format format) +{ + if (format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT) + format = PIPE_FORMAT_Z32_FLOAT; + + if (util_format_description(format)->layout == UTIL_FORMAT_LAYOUT_ASTC) + return TFETCH5_16_BYTE; + + switch (util_format_get_blocksizebits(format) / util_format_get_blockwidth(format)) { + case 8: return TFETCH5_1_BYTE; + case 16: return TFETCH5_2_BYTE; + case 32: return TFETCH5_4_BYTE; + case 64: return TFETCH5_8_BYTE; + case 96: return TFETCH5_1_BYTE; /* Does this matter? */ + case 128: return TFETCH5_16_BYTE; + default: + debug_printf("Unknown block size for format %s: %d\n", + util_format_name(format), + util_format_get_blocksizebits(format)); + return TFETCH5_1_BYTE; + } +} + +enum a5xx_depth_format +fd5_pipe2depth(enum pipe_format format) +{ + switch (format) { + case PIPE_FORMAT_Z16_UNORM: + return DEPTH5_16; + case PIPE_FORMAT_Z24X8_UNORM: + case PIPE_FORMAT_Z24_UNORM_S8_UINT: + case PIPE_FORMAT_X8Z24_UNORM: + case PIPE_FORMAT_S8_UINT_Z24_UNORM: + return DEPTH5_24_8; + case PIPE_FORMAT_Z32_FLOAT: + case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT: + return DEPTH5_32; + default: + return ~0; + } +} + +static inline enum a5xx_tex_swiz +tex_swiz(unsigned swiz) +{ + switch (swiz) { + default: + case PIPE_SWIZZLE_X: return A5XX_TEX_X; + case PIPE_SWIZZLE_Y: return A5XX_TEX_Y; + case PIPE_SWIZZLE_Z: return A5XX_TEX_Z; + case PIPE_SWIZZLE_W: return A5XX_TEX_W; + case PIPE_SWIZZLE_0: return A5XX_TEX_ZERO; + case PIPE_SWIZZLE_1: return A5XX_TEX_ONE; + } +} + +uint32_t +fd5_tex_swiz(enum pipe_format format, unsigned swizzle_r, unsigned swizzle_g, + unsigned swizzle_b, unsigned swizzle_a) +{ + const struct util_format_description *desc = + util_format_description(format); + unsigned char swiz[4] = { + swizzle_r, swizzle_g, swizzle_b, swizzle_a, + }, rswiz[4]; + + util_format_compose_swizzles(desc->swizzle, swiz, rswiz); + + return A5XX_TEX_CONST_0_SWIZ_X(tex_swiz(rswiz[0])) | + A5XX_TEX_CONST_0_SWIZ_Y(tex_swiz(rswiz[1])) | + A5XX_TEX_CONST_0_SWIZ_Z(tex_swiz(rswiz[2])) | + A5XX_TEX_CONST_0_SWIZ_W(tex_swiz(rswiz[3])); +} diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_format.h mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_format.h --- mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_format.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_format.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,44 @@ +/* + * Copyright (C) 2016 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#ifndef FD5_UTIL_H_ +#define FD5_UTIL_H_ + +#include "freedreno_util.h" + +#include "a5xx.xml.h" + +enum a5xx_vtx_fmt fd5_pipe2vtx(enum pipe_format format); +enum a5xx_tex_fmt fd5_pipe2tex(enum pipe_format format); +enum a5xx_color_fmt fd5_pipe2color(enum pipe_format format); +enum a3xx_color_swap fd5_pipe2swap(enum pipe_format format); +enum a5xx_tex_fetchsize fd5_pipe2fetchsize(enum pipe_format format); +enum a5xx_depth_format fd5_pipe2depth(enum pipe_format format); + +uint32_t fd5_tex_swiz(enum pipe_format format, unsigned swizzle_r, + unsigned swizzle_g, unsigned swizzle_b, unsigned swizzle_a); + +#endif /* FD5_UTIL_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,603 @@ +/* + * Copyright (C) 2016 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#include "pipe/p_state.h" +#include "util/u_string.h" +#include "util/u_memory.h" +#include "util/u_inlines.h" +#include "util/u_format.h" + +#include "freedreno_draw.h" +#include "freedreno_state.h" +#include "freedreno_resource.h" + +#include "fd5_gmem.h" +#include "fd5_context.h" +#include "fd5_draw.h" +#include "fd5_emit.h" +#include "fd5_program.h" +#include "fd5_format.h" +#include "fd5_zsa.h" + +static void +emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs, + struct pipe_surface **bufs, struct fd_gmem_stateobj *gmem) +{ + enum a5xx_tile_mode tile_mode; + unsigned i; + + if (gmem) { + tile_mode = TILE5_2; + } else { + tile_mode = TILE5_LINEAR; + } + + for (i = 0; i < A5XX_MAX_RENDER_TARGETS; i++) { + enum a5xx_color_fmt format = 0; + enum a3xx_color_swap swap = WZYX; + bool srgb = false; + struct fd_resource *rsc = NULL; + struct fd_resource_slice *slice = NULL; + uint32_t stride = 0; + uint32_t size = 0; + uint32_t base = 0; + uint32_t offset = 0; + + if ((i < nr_bufs) && bufs[i]) { + struct pipe_surface *psurf = bufs[i]; + enum pipe_format pformat = psurf->format; + + rsc = fd_resource(psurf->texture); + + slice = fd_resource_slice(rsc, psurf->u.tex.level); + format = fd5_pipe2color(pformat); + swap = fd5_pipe2swap(pformat); + srgb = util_format_is_srgb(pformat); + + debug_assert(psurf->u.tex.first_layer == psurf->u.tex.last_layer); + + offset = fd_resource_offset(rsc, psurf->u.tex.level, + psurf->u.tex.first_layer); + + if (gmem) { + stride = gmem->bin_w * rsc->cpp; + size = stride * gmem->bin_h; + base = gmem->cbuf_base[i]; + } else { + stride = slice->pitch * rsc->cpp; + size = slice->size0; + } + } + + OUT_PKT4(ring, REG_A5XX_RB_MRT_BUF_INFO(i), 5); + OUT_RING(ring, A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT(format) | + A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(tile_mode) | + A5XX_RB_MRT_BUF_INFO_COLOR_SWAP(swap) | + COND(gmem, 0x800) | /* XXX 0x1000 for RECTLIST clear, 0x0 for BLIT.. */ + COND(srgb, A5XX_RB_MRT_BUF_INFO_COLOR_SRGB)); + OUT_RING(ring, A5XX_RB_MRT_PITCH(stride)); + OUT_RING(ring, A5XX_RB_MRT_ARRAY_PITCH(size)); + if (gmem || (i >= nr_bufs) || !bufs[i]) { + OUT_RING(ring, base); /* RB_MRT[i].BASE_LO */ + OUT_RING(ring, 0x00000000); /* RB_MRT[i].BASE_HI */ + } else { + debug_assert((offset + size) <= fd_bo_size(rsc->bo)); + OUT_RELOCW(ring, rsc->bo, offset, 0, 0); /* BASE_LO/HI */ + } + + OUT_PKT4(ring, REG_A5XX_SP_FS_MRT_REG(i), 1); + OUT_RING(ring, A5XX_SP_FS_MRT_REG_COLOR_FORMAT(format) | + COND(srgb, A5XX_SP_FS_MRT_REG_COLOR_SRGB)); + + /* when we support UBWC, these would be the system memory + * addr/pitch/etc: + */ + OUT_PKT4(ring, REG_A5XX_RB_MRT_FLAG_BUFFER(i), 4); + OUT_RING(ring, 0x00000000); /* RB_MRT_FLAG_BUFFER[i].ADDR_LO */ + OUT_RING(ring, 0x00000000); /* RB_MRT_FLAG_BUFFER[i].ADDR_HI */ + OUT_RING(ring, A5XX_RB_MRT_FLAG_BUFFER_PITCH(0)); + OUT_RING(ring, A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH(0)); + } +} + +static void +emit_zs(struct fd_ringbuffer *ring, struct pipe_surface *zsbuf, + struct fd_gmem_stateobj *gmem) +{ + if (zsbuf) { + struct fd_resource *rsc = fd_resource(zsbuf->texture); + enum a5xx_depth_format fmt = fd5_pipe2depth(zsbuf->format); + uint32_t cpp = rsc->cpp; + uint32_t stride = 0; + uint32_t size = 0; + + if (gmem) { + stride = cpp * gmem->bin_w; + size = stride * gmem->bin_h; + } else { + struct fd_resource_slice *slice = fd_resource_slice(rsc, 0); + stride = slice->pitch * rsc->cpp; + size = slice->size0; + } + + OUT_PKT4(ring, REG_A5XX_RB_DEPTH_BUFFER_INFO, 5); + OUT_RING(ring, A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT(fmt)); + if (gmem) { + OUT_RING(ring, gmem->zsbuf_base[0]); /* RB_DEPTH_BUFFER_BASE_LO */ + OUT_RING(ring, 0x00000000); /* RB_DEPTH_BUFFER_BASE_HI */ + } else { + OUT_RELOCW(ring, rsc->bo, 0, 0, 0); /* RB_DEPTH_BUFFER_BASE_LO/HI */ + } + OUT_RING(ring, A5XX_RB_DEPTH_BUFFER_PITCH(stride)); + OUT_RING(ring, A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH(size)); + + OUT_PKT4(ring, REG_A5XX_GRAS_SU_DEPTH_BUFFER_INFO, 1); + OUT_RING(ring, A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT(fmt)); + + OUT_PKT4(ring, REG_A5XX_RB_DEPTH_FLAG_BUFFER_BASE_LO, 3); + OUT_RING(ring, 0x00000000); /* RB_DEPTH_FLAG_BUFFER_BASE_LO */ + OUT_RING(ring, 0x00000000); /* RB_DEPTH_FLAG_BUFFER_BASE_HI */ + OUT_RING(ring, 0x00000000); /* RB_DEPTH_FLAG_BUFFER_PITCH */ + + if (rsc->stencil) { + if (gmem) { + stride = 1 * gmem->bin_w; + size = stride * gmem->bin_h; + } else { + struct fd_resource_slice *slice = fd_resource_slice(rsc->stencil, 0); + stride = slice->pitch * rsc->cpp; + size = slice->size0; + } + + OUT_PKT4(ring, REG_A5XX_RB_STENCIL_INFO, 5); + OUT_RING(ring, A5XX_RB_STENCIL_INFO_SEPARATE_STENCIL); + if (gmem) { + OUT_RING(ring, gmem->zsbuf_base[1]); /* RB_STENCIL_BASE_LO */ + OUT_RING(ring, 0x00000000); /* RB_STENCIL_BASE_HI */ + } else { + OUT_RELOCW(ring, rsc->stencil->bo, 0, 0, 0); /* RB_STENCIL_BASE_LO/HI */ + } + OUT_RING(ring, A5XX_RB_STENCIL_PITCH(stride)); + OUT_RING(ring, A5XX_RB_STENCIL_ARRAY_PITCH(size)); + } else { + OUT_PKT4(ring, REG_A5XX_RB_STENCIL_INFO, 1); + OUT_RING(ring, 0x00000000); /* RB_STENCIL_INFO */ + } + } else { + OUT_PKT4(ring, REG_A5XX_RB_DEPTH_BUFFER_INFO, 5); + OUT_RING(ring, A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT(DEPTH5_NONE)); + OUT_RING(ring, 0x00000000); /* RB_DEPTH_BUFFER_BASE_LO */ + OUT_RING(ring, 0x00000000); /* RB_DEPTH_BUFFER_BASE_HI */ + OUT_RING(ring, 0x00000000); /* RB_DEPTH_BUFFER_PITCH */ + OUT_RING(ring, 0x00000000); /* RB_DEPTH_BUFFER_ARRAY_PITCH */ + + OUT_PKT4(ring, REG_A5XX_GRAS_SU_DEPTH_BUFFER_INFO, 1); + OUT_RING(ring, A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT(DEPTH5_NONE)); + + OUT_PKT4(ring, REG_A5XX_RB_DEPTH_FLAG_BUFFER_BASE_LO, 3); + OUT_RING(ring, 0x00000000); /* RB_DEPTH_FLAG_BUFFER_BASE_LO */ + OUT_RING(ring, 0x00000000); /* RB_DEPTH_FLAG_BUFFER_BASE_HI */ + OUT_RING(ring, 0x00000000); /* RB_DEPTH_FLAG_BUFFER_PITCH */ + + OUT_PKT4(ring, REG_A5XX_RB_STENCIL_INFO, 1); + OUT_RING(ring, 0x00000000); /* RB_STENCIL_INFO */ + } +} + +static void +patch_draws(struct fd_batch *batch, enum pc_di_vis_cull_mode vismode) +{ + unsigned i; + for (i = 0; i < fd_patch_num_elements(&batch->draw_patches); i++) { + struct fd_cs_patch *patch = fd_patch_element(&batch->draw_patches, i); + *patch->cs = patch->val | DRAW4(0, 0, 0, vismode); + } + util_dynarray_resize(&batch->draw_patches, 0); +} + +/* before first tile */ +static void +fd5_emit_tile_init(struct fd_batch *batch) +{ + struct fd_ringbuffer *ring = batch->gmem; + + fd5_emit_restore(batch, ring); + + OUT_PKT7(ring, CP_EVENT_WRITE, 1); + OUT_RING(ring, UNK_26); + + OUT_PKT7(ring, CP_SKIP_IB2_ENABLE_GLOBAL, 1); + OUT_RING(ring, 0x0); + + OUT_PKT4(ring, REG_A5XX_PC_POWER_CNTL, 1); + OUT_RING(ring, 0x00000003); /* PC_POWER_CNTL */ + + OUT_PKT4(ring, REG_A5XX_VFD_POWER_CNTL, 1); + OUT_RING(ring, 0x00000003); /* VFD_POWER_CNTL */ + + /* 0x10000000 for BYPASS.. 0x7c13c080 for GMEM: */ + fd_wfi(batch, ring); + OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); + OUT_RING(ring, 0x7c13c080); /* RB_CCU_CNTL */ + +/* +opcode: CP_PREEMPT_ENABLE_LOCAL (6a) (2 dwords) + */ + + fd5_set_render_mode(batch->ctx, ring, GMEM); +} + +/* before mem2gmem */ +static void +fd5_emit_tile_prep(struct fd_batch *batch, struct fd_tile *tile) +{ + struct fd_ringbuffer *ring = batch->gmem; + + uint32_t x1 = tile->xoff; + uint32_t y1 = tile->yoff; + uint32_t x2 = tile->xoff + tile->bin_w - 1; + uint32_t y2 = tile->yoff + tile->bin_h - 1; + + OUT_PKT4(ring, REG_A5XX_GRAS_SC_WINDOW_SCISSOR_TL, 2); + OUT_RING(ring, A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X(x1) | + A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y(y1)); + OUT_RING(ring, A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X(x2) | + A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y(y2)); + + OUT_PKT4(ring, REG_A5XX_RB_RESOLVE_CNTL_1, 2); + OUT_RING(ring, A5XX_RB_RESOLVE_CNTL_1_X(x1) | + A5XX_RB_RESOLVE_CNTL_1_Y(y1)); + OUT_RING(ring, A5XX_RB_RESOLVE_CNTL_2_X(x2) | + A5XX_RB_RESOLVE_CNTL_2_Y(y2)); + + OUT_PKT4(ring, REG_A5XX_RB_WINDOW_OFFSET, 1); + OUT_RING(ring, A5XX_RB_WINDOW_OFFSET_X(x1) | + A5XX_RB_WINDOW_OFFSET_Y(y1)); +} + + +/* + * transfer from system memory to gmem + */ + +static void +emit_mem2gmem_surf(struct fd_batch *batch, uint32_t base, + struct pipe_surface *psurf, enum a5xx_blit_buf buf) +{ + struct fd_ringbuffer *ring = batch->gmem; + struct fd_gmem_stateobj *gmem = &batch->ctx->gmem; + struct fd_resource *rsc = fd_resource(psurf->texture); + uint32_t stride, size; + + debug_assert(psurf->u.tex.first_layer == psurf->u.tex.last_layer); + + stride = gmem->bin_w * rsc->cpp; + size = stride * gmem->bin_h; + + OUT_PKT4(ring, REG_A5XX_RB_BLIT_FLAG_DST_LO, 4); + OUT_RING(ring, 0x00000000); /* RB_BLIT_FLAG_DST_LO */ + OUT_RING(ring, 0x00000000); /* RB_BLIT_FLAG_DST_HI */ + OUT_RING(ring, 0x00000000); /* RB_BLIT_FLAG_DST_PITCH */ + OUT_RING(ring, 0x00000000); /* RB_BLIT_FLAG_DST_ARRAY_PITCH */ + + OUT_PKT4(ring, REG_A5XX_RB_RESOLVE_CNTL_3, 5); + OUT_RING(ring, 0x00000000); /* RB_RESOLVE_CNTL_3 */ + OUT_RING(ring, base); /* RB_BLIT_DST_LO */ + OUT_RING(ring, 0x00000000); /* RB_BLIT_DST_HI */ + OUT_RING(ring, A5XX_RB_BLIT_DST_PITCH(stride)); + OUT_RING(ring, A5XX_RB_BLIT_DST_ARRAY_PITCH(size)); + + OUT_PKT4(ring, REG_A5XX_RB_BLIT_CNTL, 1); + OUT_RING(ring, A5XX_RB_BLIT_CNTL_BUF(buf)); + + fd5_emit_blit(batch->ctx, ring); +} + +static void +fd5_emit_tile_mem2gmem(struct fd_batch *batch, struct fd_tile *tile) +{ + struct fd_ringbuffer *ring = batch->gmem; + struct fd_context *ctx = batch->ctx; + struct fd_gmem_stateobj *gmem = &ctx->gmem; + struct pipe_framebuffer_state *pfb = &batch->framebuffer; + + /* + * setup mrt and zs with system memory base addresses: + */ + + emit_mrt(ring, pfb->nr_cbufs, pfb->cbufs, NULL); +// emit_zs(ring, pfb->zsbuf, NULL); + + OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); + OUT_RING(ring, A5XX_RB_CNTL_WIDTH(gmem->bin_w) | + A5XX_RB_CNTL_HEIGHT(gmem->bin_h) | + A5XX_RB_CNTL_BYPASS); + + if (fd_gmem_needs_restore(batch, tile, FD_BUFFER_COLOR)) { + unsigned i; + for (i = 0; i < pfb->nr_cbufs; i++) { + if (!pfb->cbufs[i]) + continue; + if (!(batch->restore & (PIPE_CLEAR_COLOR0 << i))) + continue; + emit_mem2gmem_surf(batch, gmem->cbuf_base[i], + pfb->cbufs[i], BLIT_MRT0 + i); + } + } + + if (fd_gmem_needs_restore(batch, tile, FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)) { + struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture); + // XXX BLIT_ZS vs BLIT_Z32 .. need some more cmdstream traces + // with z32_x24s8.. + + // XXX hack import via BLIT_MRT0 instead of BLIT_ZS, since I don't + // know otherwise how to go from linear in sysmem to tiled in gmem. + // possibly we want to flip this around gmem2mem and keep depth + // tiled in sysmem (and fixup sampler state to assume tiled).. this + // might be required for doing depth/stencil in bypass mode? + struct fd_resource_slice *slice = fd_resource_slice(rsc, 0); + enum a5xx_color_fmt format = + fd5_pipe2color(fd_gmem_restore_format(pfb->zsbuf->format)); + + OUT_PKT4(ring, REG_A5XX_RB_MRT_BUF_INFO(0), 5); + OUT_RING(ring, A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT(format) | + A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(TILE5_LINEAR) | + A5XX_RB_MRT_BUF_INFO_COLOR_SWAP(WZYX)); + OUT_RING(ring, A5XX_RB_MRT_PITCH(slice->pitch * rsc->cpp)); + OUT_RING(ring, A5XX_RB_MRT_ARRAY_PITCH(slice->size0)); + OUT_RELOCW(ring, rsc->bo, 0, 0, 0); /* BASE_LO/HI */ + + emit_mem2gmem_surf(batch, ctx->gmem.zsbuf_base[0], pfb->zsbuf, BLIT_MRT0); + } +} + + +/* before IB to rendering cmds: */ +static void +fd5_emit_tile_renderprep(struct fd_batch *batch, struct fd_tile *tile) +{ + struct fd_ringbuffer *ring = batch->gmem; + struct fd_gmem_stateobj *gmem = &batch->ctx->gmem; + struct pipe_framebuffer_state *pfb = &batch->framebuffer; + + OUT_PKT7(ring, CP_SET_VISIBILITY_OVERRIDE, 1); + OUT_RING(ring, 0x1); + + OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); + OUT_RING(ring, A5XX_RB_CNTL_WIDTH(gmem->bin_w) | + A5XX_RB_CNTL_HEIGHT(gmem->bin_h)); + + patch_draws(batch, IGNORE_VISIBILITY); + + emit_zs(ring, pfb->zsbuf, gmem); + emit_mrt(ring, pfb->nr_cbufs, pfb->cbufs, gmem); + + // TODO MSAA + OUT_PKT4(ring, REG_A5XX_TPL1_TP_RAS_MSAA_CNTL, 2); + OUT_RING(ring, A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES(MSAA_ONE)); + OUT_RING(ring, A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES(MSAA_ONE) | + A5XX_TPL1_TP_DEST_MSAA_CNTL_MSAA_DISABLE); + + OUT_PKT4(ring, REG_A5XX_RB_RAS_MSAA_CNTL, 2); + OUT_RING(ring, A5XX_RB_RAS_MSAA_CNTL_SAMPLES(MSAA_ONE)); + OUT_RING(ring, A5XX_RB_DEST_MSAA_CNTL_SAMPLES(MSAA_ONE) | + A5XX_RB_DEST_MSAA_CNTL_MSAA_DISABLE); + + OUT_PKT4(ring, REG_A5XX_GRAS_SC_RAS_MSAA_CNTL, 2); + OUT_RING(ring, A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES(MSAA_ONE)); + OUT_RING(ring, A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES(MSAA_ONE) | + A5XX_GRAS_SC_DEST_MSAA_CNTL_MSAA_DISABLE); +} + + +/* + * transfer from gmem to system memory (ie. normal RAM) + */ + +static void +emit_gmem2mem_surf(struct fd_batch *batch, uint32_t base, + struct pipe_surface *psurf, enum a5xx_blit_buf buf) +{ + struct fd_ringbuffer *ring = batch->gmem; + struct fd_resource *rsc = fd_resource(psurf->texture); + struct fd_resource_slice *slice; + uint32_t offset; + + slice = fd_resource_slice(rsc, psurf->u.tex.level); + offset = fd_resource_offset(rsc, psurf->u.tex.level, + psurf->u.tex.first_layer); + + debug_assert(psurf->u.tex.first_layer == psurf->u.tex.last_layer); + + OUT_PKT4(ring, REG_A5XX_RB_BLIT_FLAG_DST_LO, 4); + OUT_RING(ring, 0x00000000); /* RB_BLIT_FLAG_DST_LO */ + OUT_RING(ring, 0x00000000); /* RB_BLIT_FLAG_DST_HI */ + OUT_RING(ring, 0x00000000); /* RB_BLIT_FLAG_DST_PITCH */ + OUT_RING(ring, 0x00000000); /* RB_BLIT_FLAG_DST_ARRAY_PITCH */ + + OUT_PKT4(ring, REG_A5XX_RB_RESOLVE_CNTL_3, 5); + OUT_RING(ring, 0x00000004); /* XXX RB_RESOLVE_CNTL_3 */ + OUT_RELOCW(ring, rsc->bo, offset, 0, 0); /* RB_BLIT_DST_LO/HI */ + OUT_RING(ring, A5XX_RB_BLIT_DST_PITCH(slice->pitch * rsc->cpp)); + OUT_RING(ring, A5XX_RB_BLIT_DST_ARRAY_PITCH(slice->size0)); + + OUT_PKT4(ring, REG_A5XX_RB_BLIT_CNTL, 1); + OUT_RING(ring, A5XX_RB_BLIT_CNTL_BUF(buf)); + + fd5_emit_blit(batch->ctx, ring); +} + +static void +fd5_emit_tile_gmem2mem(struct fd_batch *batch, struct fd_tile *tile) +{ + struct fd_context *ctx = batch->ctx; + struct fd_gmem_stateobj *gmem = &ctx->gmem; + struct pipe_framebuffer_state *pfb = &batch->framebuffer; + + if (batch->resolve & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)) { + struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture); + // XXX BLIT_ZS vs BLIT_Z32 .. need some more cmdstream traces + // with z32_x24s8.. + if (!rsc->stencil || (batch->resolve & FD_BUFFER_DEPTH)) + emit_gmem2mem_surf(batch, gmem->zsbuf_base[0], pfb->zsbuf, BLIT_ZS); + if (rsc->stencil && (batch->resolve & FD_BUFFER_STENCIL)) + emit_gmem2mem_surf(batch, gmem->zsbuf_base[1], pfb->zsbuf, BLIT_ZS); + } + + if (batch->resolve & FD_BUFFER_COLOR) { + unsigned i; + for (i = 0; i < pfb->nr_cbufs; i++) { + if (!pfb->cbufs[i]) + continue; + if (!(batch->resolve & (PIPE_CLEAR_COLOR0 << i))) + continue; + emit_gmem2mem_surf(batch, gmem->cbuf_base[i], + pfb->cbufs[i], BLIT_MRT0 + i); + } + } +} + +static void +fd5_emit_tile_fini(struct fd_batch *batch) +{ + struct fd_ringbuffer *ring = batch->gmem; + + OUT_PKT7(ring, CP_SKIP_IB2_ENABLE_GLOBAL, 1); + OUT_RING(ring, 0x0); + + OUT_PKT7(ring, CP_EVENT_WRITE, 1); + OUT_RING(ring, UNK_26); + + fd5_cache_flush(batch, ring); + fd5_set_render_mode(batch->ctx, ring, BYPASS); +} + +static void +fd5_emit_sysmem_prep(struct fd_batch *batch) +{ + struct pipe_framebuffer_state *pfb = &batch->framebuffer; + struct fd_ringbuffer *ring = batch->gmem; + + fd5_emit_restore(batch, ring); + + OUT_PKT7(ring, CP_EVENT_WRITE, 1); + OUT_RING(ring, UNK_26); + + OUT_PKT7(ring, CP_SKIP_IB2_ENABLE_GLOBAL, 1); + OUT_RING(ring, 0x0); + + OUT_PKT7(ring, CP_EVENT_WRITE, 1); + OUT_RING(ring, UNK_19); + + OUT_PKT4(ring, REG_A5XX_PC_POWER_CNTL, 1); + OUT_RING(ring, 0x00000003); /* PC_POWER_CNTL */ + + OUT_PKT4(ring, REG_A5XX_VFD_POWER_CNTL, 1); + OUT_RING(ring, 0x00000003); /* VFD_POWER_CNTL */ + + /* 0x10000000 for BYPASS.. 0x7c13c080 for GMEM: */ + fd_wfi(batch, ring); + OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); + OUT_RING(ring, 0x10000000); /* RB_CCU_CNTL */ + + OUT_PKT4(ring, REG_A5XX_GRAS_SC_WINDOW_SCISSOR_TL, 2); + OUT_RING(ring, A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X(0) | + A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y(0)); + OUT_RING(ring, A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X(pfb->width - 1) | + A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y(pfb->height - 1)); + + OUT_PKT4(ring, REG_A5XX_RB_RESOLVE_CNTL_1, 2); + OUT_RING(ring, A5XX_RB_RESOLVE_CNTL_1_X(0) | + A5XX_RB_RESOLVE_CNTL_1_Y(0)); + OUT_RING(ring, A5XX_RB_RESOLVE_CNTL_2_X(pfb->width - 1) | + A5XX_RB_RESOLVE_CNTL_2_Y(pfb->height - 1)); + + OUT_PKT4(ring, REG_A5XX_RB_WINDOW_OFFSET, 1); + OUT_RING(ring, A5XX_RB_WINDOW_OFFSET_X(0) | + A5XX_RB_WINDOW_OFFSET_Y(0)); + + OUT_PKT7(ring, CP_SET_VISIBILITY_OVERRIDE, 1); + OUT_RING(ring, 0x1); + + OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); + OUT_RING(ring, A5XX_RB_CNTL_WIDTH(0) | + A5XX_RB_CNTL_HEIGHT(0) | + A5XX_RB_CNTL_BYPASS); + + patch_draws(batch, IGNORE_VISIBILITY); + + emit_zs(ring, pfb->zsbuf, NULL); + emit_mrt(ring, pfb->nr_cbufs, pfb->cbufs, NULL); + + // TODO MSAA + OUT_PKT4(ring, REG_A5XX_TPL1_TP_RAS_MSAA_CNTL, 2); + OUT_RING(ring, A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES(MSAA_ONE)); + OUT_RING(ring, A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES(MSAA_ONE) | + A5XX_TPL1_TP_DEST_MSAA_CNTL_MSAA_DISABLE); + + OUT_PKT4(ring, REG_A5XX_RB_RAS_MSAA_CNTL, 2); + OUT_RING(ring, A5XX_RB_RAS_MSAA_CNTL_SAMPLES(MSAA_ONE)); + OUT_RING(ring, A5XX_RB_DEST_MSAA_CNTL_SAMPLES(MSAA_ONE) | + A5XX_RB_DEST_MSAA_CNTL_MSAA_DISABLE); + + OUT_PKT4(ring, REG_A5XX_GRAS_SC_RAS_MSAA_CNTL, 2); + OUT_RING(ring, A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES(MSAA_ONE)); + OUT_RING(ring, A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES(MSAA_ONE) | + A5XX_GRAS_SC_DEST_MSAA_CNTL_MSAA_DISABLE); +} + +static void +fd5_emit_sysmem_fini(struct fd_batch *batch) +{ + struct fd5_context *fd5_ctx = fd5_context(batch->ctx); + struct fd_ringbuffer *ring = batch->gmem; + + OUT_PKT7(ring, CP_SKIP_IB2_ENABLE_GLOBAL, 1); + OUT_RING(ring, 0x0); + + OUT_PKT7(ring, CP_EVENT_WRITE, 1); + OUT_RING(ring, UNK_26); + + OUT_PKT7(ring, CP_EVENT_WRITE, 4); + OUT_RING(ring, UNK_1D); + OUT_RELOCW(ring, fd5_ctx->blit_mem, 0, 0, 0); /* ADDR_LO/HI */ + OUT_RING(ring, 0x00000000); +} + +void +fd5_gmem_init(struct pipe_context *pctx) +{ + struct fd_context *ctx = fd_context(pctx); + + ctx->emit_tile_init = fd5_emit_tile_init; + ctx->emit_tile_prep = fd5_emit_tile_prep; + ctx->emit_tile_mem2gmem = fd5_emit_tile_mem2gmem; + ctx->emit_tile_renderprep = fd5_emit_tile_renderprep; + ctx->emit_tile_gmem2mem = fd5_emit_tile_gmem2mem; + ctx->emit_tile_fini = fd5_emit_tile_fini; + ctx->emit_sysmem_prep = fd5_emit_sysmem_prep; + ctx->emit_sysmem_fini = fd5_emit_sysmem_fini; +} diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_gmem.h mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_gmem.h --- mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_gmem.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_gmem.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2015 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#ifndef FD5_GMEM_H_ +#define FD5_GMEM_H_ + +#include "pipe/p_context.h" + +void fd5_gmem_init(struct pipe_context *pctx); + +#endif /* FD5_GMEM_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_program.c mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_program.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_program.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_program.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,738 @@ +/* + * Copyright (C) 2016 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#include "pipe/p_state.h" +#include "util/u_string.h" +#include "util/u_memory.h" +#include "util/u_inlines.h" +#include "util/u_format.h" +#include "util/bitset.h" + +#include "freedreno_program.h" + +#include "fd5_program.h" +#include "fd5_emit.h" +#include "fd5_texture.h" +#include "fd5_format.h" + +static void +delete_shader_stateobj(struct fd5_shader_stateobj *so) +{ + ir3_shader_destroy(so->shader); + free(so); +} + +static struct fd5_shader_stateobj * +create_shader_stateobj(struct pipe_context *pctx, const struct pipe_shader_state *cso, + enum shader_t type) +{ + struct fd_context *ctx = fd_context(pctx); + struct ir3_compiler *compiler = ctx->screen->compiler; + struct fd5_shader_stateobj *so = CALLOC_STRUCT(fd5_shader_stateobj); + so->shader = ir3_shader_create(compiler, cso, type, &ctx->debug); + return so; +} + +static void * +fd5_fp_state_create(struct pipe_context *pctx, + const struct pipe_shader_state *cso) +{ + return create_shader_stateobj(pctx, cso, SHADER_FRAGMENT); +} + +static void +fd5_fp_state_delete(struct pipe_context *pctx, void *hwcso) +{ + struct fd5_shader_stateobj *so = hwcso; + delete_shader_stateobj(so); +} + +static void * +fd5_vp_state_create(struct pipe_context *pctx, + const struct pipe_shader_state *cso) +{ + return create_shader_stateobj(pctx, cso, SHADER_VERTEX); +} + +static void +fd5_vp_state_delete(struct pipe_context *pctx, void *hwcso) +{ + struct fd5_shader_stateobj *so = hwcso; + delete_shader_stateobj(so); +} + +static void +emit_shader(struct fd_ringbuffer *ring, const struct ir3_shader_variant *so) +{ + const struct ir3_info *si = &so->info; + enum adreno_state_block sb; + enum adreno_state_src src; + uint32_t i, sz, *bin; + + if (so->type == SHADER_VERTEX) { + sb = SB_VERT_SHADER; + } else { + sb = SB_FRAG_SHADER; + } + + if (fd_mesa_debug & FD_DBG_DIRECT) { + sz = si->sizedwords; + src = SS_DIRECT; + bin = fd_bo_map(so->bo); + } else { + sz = 0; + src = 2; // enums different on a5xx.. + bin = NULL; + } + + OUT_PKT7(ring, CP_LOAD_STATE, 3 + sz); + OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(0) | + CP_LOAD_STATE_0_STATE_SRC(src) | + CP_LOAD_STATE_0_STATE_BLOCK(sb) | + CP_LOAD_STATE_0_NUM_UNIT(so->instrlen)); + if (bin) { + OUT_RING(ring, CP_LOAD_STATE_1_EXT_SRC_ADDR(0) | + CP_LOAD_STATE_1_STATE_TYPE(ST_SHADER)); + OUT_RING(ring, CP_LOAD_STATE_2_EXT_SRC_ADDR_HI(0)); + } else { + OUT_RELOC(ring, so->bo, 0, + CP_LOAD_STATE_1_STATE_TYPE(ST_SHADER), 0); + } + + /* for how clever coverity is, it is sometimes rather dull, and + * doesn't realize that the only case where bin==NULL, sz==0: + */ + assume(bin || (sz == 0)); + + for (i = 0; i < sz; i++) { + OUT_RING(ring, bin[i]); + } +} + +/* Add any missing varyings needed for stream-out. Otherwise varyings not + * used by fragment shader will be stripped out. + */ +static void +link_stream_out(struct ir3_shader_linkage *l, const struct ir3_shader_variant *v) +{ + const struct pipe_stream_output_info *strmout = &v->shader->stream_output; + + /* + * First, any stream-out varyings not already in linkage map (ie. also + * consumed by frag shader) need to be added: + */ + for (unsigned i = 0; i < strmout->num_outputs; i++) { + const struct pipe_stream_output *out = &strmout->output[i]; + unsigned k = out->register_index; + unsigned compmask = + (1 << (out->num_components + out->start_component)) - 1; + unsigned idx, nextloc = 0; + + /* psize/pos need to be the last entries in linkage map, and will + * get added link_stream_out, so skip over them: + */ + if ((v->outputs[k].slot == VARYING_SLOT_PSIZ) || + (v->outputs[k].slot == VARYING_SLOT_POS)) + continue; + + for (idx = 0; idx < l->cnt; idx++) { + if (l->var[idx].regid == v->outputs[k].regid) + break; + nextloc = MAX2(nextloc, l->var[idx].loc + 4); + } + + /* add if not already in linkage map: */ + if (idx == l->cnt) + ir3_link_add(l, v->outputs[k].regid, compmask, nextloc); + + /* expand component-mask if needed, ie streaming out all components + * but frag shader doesn't consume all components: + */ + if (compmask & ~l->var[idx].compmask) { + l->var[idx].compmask |= compmask; + l->max_loc = MAX2(l->max_loc, + l->var[idx].loc + util_last_bit(l->var[idx].compmask)); + } + } +} + +/* TODO maybe some of this we could pre-compute once rather than having + * so much draw-time logic? + */ +static void +emit_stream_out(struct fd_ringbuffer *ring, const struct ir3_shader_variant *v, + struct ir3_shader_linkage *l) +{ + const struct pipe_stream_output_info *strmout = &v->shader->stream_output; + unsigned ncomp[PIPE_MAX_SO_BUFFERS] = {0}; + unsigned prog[align(l->max_loc, 2) / 2]; + + memset(prog, 0, sizeof(prog)); + + for (unsigned i = 0; i < strmout->num_outputs; i++) { + const struct pipe_stream_output *out = &strmout->output[i]; + unsigned k = out->register_index; + unsigned idx; + + ncomp[out->output_buffer] += out->num_components; + + /* linkage map sorted by order frag shader wants things, so + * a bit less ideal here.. + */ + for (idx = 0; idx < l->cnt; idx++) + if (l->var[idx].regid == v->outputs[k].regid) + break; + + debug_assert(idx < l->cnt); + + for (unsigned j = 0; j < out->num_components; j++) { + unsigned c = j + out->start_component; + unsigned loc = l->var[idx].loc + c; + unsigned off = j + out->dst_offset; /* in dwords */ + + if (loc & 1) { + prog[loc/2] |= A5XX_VPC_SO_PROG_B_EN | + A5XX_VPC_SO_PROG_B_BUF(out->output_buffer) | + A5XX_VPC_SO_PROG_B_OFF(off * 4); + } else { + prog[loc/2] |= A5XX_VPC_SO_PROG_A_EN | + A5XX_VPC_SO_PROG_A_BUF(out->output_buffer) | + A5XX_VPC_SO_PROG_A_OFF(off * 4); + } + } + } + + OUT_PKT7(ring, CP_CONTEXT_REG_BUNCH, 12 + (2 * ARRAY_SIZE(prog))); + OUT_RING(ring, REG_A5XX_VPC_SO_BUF_CNTL); + OUT_RING(ring, A5XX_VPC_SO_BUF_CNTL_ENABLE | + COND(ncomp[0] > 0, A5XX_VPC_SO_BUF_CNTL_BUF0) | + COND(ncomp[1] > 0, A5XX_VPC_SO_BUF_CNTL_BUF1) | + COND(ncomp[2] > 0, A5XX_VPC_SO_BUF_CNTL_BUF2) | + COND(ncomp[3] > 0, A5XX_VPC_SO_BUF_CNTL_BUF3)); + OUT_RING(ring, REG_A5XX_VPC_SO_NCOMP(0)); + OUT_RING(ring, ncomp[0]); + OUT_RING(ring, REG_A5XX_VPC_SO_NCOMP(1)); + OUT_RING(ring, ncomp[1]); + OUT_RING(ring, REG_A5XX_VPC_SO_NCOMP(2)); + OUT_RING(ring, ncomp[2]); + OUT_RING(ring, REG_A5XX_VPC_SO_NCOMP(3)); + OUT_RING(ring, ncomp[3]); + OUT_RING(ring, REG_A5XX_VPC_SO_CNTL); + OUT_RING(ring, A5XX_VPC_SO_CNTL_ENABLE); + for (unsigned i = 0; i < ARRAY_SIZE(prog); i++) { + OUT_RING(ring, REG_A5XX_VPC_SO_PROG); + OUT_RING(ring, prog[i]); + } +} + +struct stage { + const struct ir3_shader_variant *v; + const struct ir3_info *i; + /* const sizes are in units of 4 * vec4 */ + uint8_t constoff; + uint8_t constlen; + /* instr sizes are in units of 16 instructions */ + uint8_t instroff; + uint8_t instrlen; +}; + +enum { + VS = 0, + FS = 1, + HS = 2, + DS = 3, + GS = 4, + MAX_STAGES +}; + +static void +setup_stages(struct fd5_emit *emit, struct stage *s) +{ + unsigned i; + + s[VS].v = fd5_emit_get_vp(emit); + s[FS].v = fd5_emit_get_fp(emit); + + s[HS].v = s[DS].v = s[GS].v = NULL; /* for now */ + + for (i = 0; i < MAX_STAGES; i++) { + if (s[i].v) { + s[i].i = &s[i].v->info; + /* constlen is in units of 4 * vec4: */ + s[i].constlen = align(s[i].v->constlen, 4) / 4; + /* instrlen is already in units of 16 instr.. although + * probably we should ditch that and not make the compiler + * care about instruction group size of a3xx vs a5xx + */ + s[i].instrlen = s[i].v->instrlen; + } else { + s[i].i = NULL; + s[i].constlen = 0; + s[i].instrlen = 0; + } + } + + /* NOTE: at least for gles2, blob partitions VS at bottom of const + * space and FS taking entire remaining space. We probably don't + * need to do that the same way, but for now mimic what the blob + * does to make it easier to diff against register values from blob + * + * NOTE: if VS.instrlen + FS.instrlen > 64, then one or both shaders + * is run from external memory. + */ + if ((s[VS].instrlen + s[FS].instrlen) > 64) { + /* prioritize FS for internal memory: */ + if (s[FS].instrlen < 64) { + /* if FS can fit, kick VS out to external memory: */ + s[VS].instrlen = 0; + } else if (s[VS].instrlen < 64) { + /* otherwise if VS can fit, kick out FS: */ + s[FS].instrlen = 0; + } else { + /* neither can fit, run both from external memory: */ + s[VS].instrlen = 0; + s[FS].instrlen = 0; + } + } + + unsigned constoff = 0; + for (i = 0; i < MAX_STAGES; i++) { + s[i].constoff = constoff; + constoff += s[i].constlen; + } + + s[VS].instroff = 0; + s[FS].instroff = 64 - s[FS].instrlen; + s[HS].instroff = s[DS].instroff = s[GS].instroff = s[FS].instroff; +} + +void +fd5_program_emit(struct fd_ringbuffer *ring, struct fd5_emit *emit) +{ + struct stage s[MAX_STAGES]; + uint32_t pos_regid, psize_regid, color_regid[8]; + uint32_t face_regid, coord_regid, zwcoord_regid; + uint32_t vcoord_regid, vertex_regid, instance_regid; + enum a3xx_threadsize fssz; + uint8_t psize_loc = ~0; + int i, j; + + setup_stages(emit, s); + + fssz = (s[FS].i->max_reg >= 24) ? TWO_QUADS : FOUR_QUADS; + + pos_regid = ir3_find_output_regid(s[VS].v, VARYING_SLOT_POS); + psize_regid = ir3_find_output_regid(s[VS].v, VARYING_SLOT_PSIZ); + vertex_regid = ir3_find_sysval_regid(s[VS].v, SYSTEM_VALUE_VERTEX_ID); + instance_regid = ir3_find_sysval_regid(s[VS].v, SYSTEM_VALUE_INSTANCE_ID); + + if (s[FS].v->color0_mrt) { + color_regid[0] = color_regid[1] = color_regid[2] = color_regid[3] = + color_regid[4] = color_regid[5] = color_regid[6] = color_regid[7] = + ir3_find_output_regid(s[FS].v, FRAG_RESULT_COLOR); + } else { + color_regid[0] = ir3_find_output_regid(s[FS].v, FRAG_RESULT_DATA0); + color_regid[1] = ir3_find_output_regid(s[FS].v, FRAG_RESULT_DATA1); + color_regid[2] = ir3_find_output_regid(s[FS].v, FRAG_RESULT_DATA2); + color_regid[3] = ir3_find_output_regid(s[FS].v, FRAG_RESULT_DATA3); + color_regid[4] = ir3_find_output_regid(s[FS].v, FRAG_RESULT_DATA4); + color_regid[5] = ir3_find_output_regid(s[FS].v, FRAG_RESULT_DATA5); + color_regid[6] = ir3_find_output_regid(s[FS].v, FRAG_RESULT_DATA6); + color_regid[7] = ir3_find_output_regid(s[FS].v, FRAG_RESULT_DATA7); + } + + /* TODO get these dynamically: */ + face_regid = s[FS].v->frag_face ? regid(0,0) : regid(63,0); + coord_regid = s[FS].v->frag_coord ? regid(0,0) : regid(63,0); + zwcoord_regid = s[FS].v->frag_coord ? regid(0,2) : regid(63,0); + vcoord_regid = (s[FS].v->total_in > 0) ? s[FS].v->pos_regid : regid(63,0); + + /* we could probably divide this up into things that need to be + * emitted if frag-prog is dirty vs if vert-prog is dirty.. + */ + + OUT_PKT4(ring, REG_A5XX_HLSQ_VS_CONTROL_REG, 5); + OUT_RING(ring, A5XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET(s[VS].constoff) | + A5XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET(s[VS].instroff) | + COND(s[VS].v, A5XX_HLSQ_VS_CONTROL_REG_ENABLED)); + OUT_RING(ring, A5XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET(s[FS].constoff) | + A5XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET(s[FS].instroff) | + COND(s[FS].v, A5XX_HLSQ_FS_CONTROL_REG_ENABLED)); + OUT_RING(ring, A5XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET(s[HS].constoff) | + A5XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET(s[HS].instroff) | + COND(s[HS].v, A5XX_HLSQ_HS_CONTROL_REG_ENABLED)); + OUT_RING(ring, A5XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET(s[DS].constoff) | + A5XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET(s[DS].instroff) | + COND(s[DS].v, A5XX_HLSQ_DS_CONTROL_REG_ENABLED)); + OUT_RING(ring, A5XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET(s[GS].constoff) | + A5XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET(s[GS].instroff) | + COND(s[GS].v, A5XX_HLSQ_GS_CONTROL_REG_ENABLED)); + + OUT_PKT4(ring, REG_A5XX_HLSQ_CS_CONFIG, 1); + OUT_RING(ring, 0x00000000); + + OUT_PKT4(ring, REG_A5XX_HLSQ_VS_CNTL, 5); + OUT_RING(ring, A5XX_HLSQ_VS_CNTL_INSTRLEN(s[VS].instrlen)); + OUT_RING(ring, A5XX_HLSQ_FS_CNTL_INSTRLEN(s[FS].instrlen)); + OUT_RING(ring, A5XX_HLSQ_HS_CNTL_INSTRLEN(s[HS].instrlen)); + OUT_RING(ring, A5XX_HLSQ_DS_CNTL_INSTRLEN(s[DS].instrlen)); + OUT_RING(ring, A5XX_HLSQ_GS_CNTL_INSTRLEN(s[GS].instrlen)); + + OUT_PKT4(ring, REG_A5XX_SP_VS_CONTROL_REG, 5); + OUT_RING(ring, A5XX_SP_VS_CONTROL_REG_CONSTOBJECTOFFSET(s[VS].constoff) | + A5XX_SP_VS_CONTROL_REG_SHADEROBJOFFSET(s[VS].instroff) | + COND(s[VS].v, A5XX_SP_VS_CONTROL_REG_ENABLED)); + OUT_RING(ring, A5XX_SP_FS_CONTROL_REG_CONSTOBJECTOFFSET(s[FS].constoff) | + A5XX_SP_FS_CONTROL_REG_SHADEROBJOFFSET(s[FS].instroff) | + COND(s[FS].v, A5XX_SP_FS_CONTROL_REG_ENABLED)); + OUT_RING(ring, A5XX_SP_HS_CONTROL_REG_CONSTOBJECTOFFSET(s[HS].constoff) | + A5XX_SP_HS_CONTROL_REG_SHADEROBJOFFSET(s[HS].instroff) | + COND(s[HS].v, A5XX_SP_HS_CONTROL_REG_ENABLED)); + OUT_RING(ring, A5XX_SP_DS_CONTROL_REG_CONSTOBJECTOFFSET(s[DS].constoff) | + A5XX_SP_DS_CONTROL_REG_SHADEROBJOFFSET(s[DS].instroff) | + COND(s[DS].v, A5XX_SP_DS_CONTROL_REG_ENABLED)); + OUT_RING(ring, A5XX_SP_GS_CONTROL_REG_CONSTOBJECTOFFSET(s[GS].constoff) | + A5XX_SP_GS_CONTROL_REG_SHADEROBJOFFSET(s[GS].instroff) | + COND(s[GS].v, A5XX_SP_GS_CONTROL_REG_ENABLED)); + + OUT_PKT4(ring, REG_A5XX_SP_CS_CONFIG, 1); + OUT_RING(ring, 0x00000000); + + OUT_PKT4(ring, REG_A5XX_HLSQ_VS_CONSTLEN, 2); + OUT_RING(ring, s[VS].constlen); /* HLSQ_VS_CONSTLEN */ + OUT_RING(ring, s[VS].instrlen); /* HLSQ_VS_INSTRLEN */ + + OUT_PKT4(ring, REG_A5XX_HLSQ_FS_CONSTLEN, 2); + OUT_RING(ring, s[FS].constlen); /* HLSQ_FS_CONSTLEN */ + OUT_RING(ring, s[FS].instrlen); /* HLSQ_FS_INSTRLEN */ + + OUT_PKT4(ring, REG_A5XX_HLSQ_HS_CONSTLEN, 2); + OUT_RING(ring, s[HS].constlen); /* HLSQ_HS_CONSTLEN */ + OUT_RING(ring, s[HS].instrlen); /* HLSQ_HS_INSTRLEN */ + + OUT_PKT4(ring, REG_A5XX_HLSQ_DS_CONSTLEN, 2); + OUT_RING(ring, s[DS].constlen); /* HLSQ_DS_CONSTLEN */ + OUT_RING(ring, s[DS].instrlen); /* HLSQ_DS_INSTRLEN */ + + OUT_PKT4(ring, REG_A5XX_HLSQ_GS_CONSTLEN, 2); + OUT_RING(ring, s[GS].constlen); /* HLSQ_GS_CONSTLEN */ + OUT_RING(ring, s[GS].instrlen); /* HLSQ_GS_INSTRLEN */ + + OUT_PKT4(ring, REG_A5XX_HLSQ_CONTEXT_SWITCH_CS_SW_3, 2); + OUT_RING(ring, 0x00000000); /* HLSQ_CONTEXT_SWITCH_CS_SW_3 */ + OUT_RING(ring, 0x00000000); /* HLSQ_CONTEXT_SWITCH_CS_SW_4 */ + + OUT_PKT4(ring, REG_A5XX_SP_VS_CTRL_REG0, 1); + OUT_RING(ring, A5XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT(s[VS].i->max_half_reg + 1) | + A5XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(s[VS].i->max_reg + 1) | + 0x6 | /* XXX seems to be always set? */ + A5XX_SP_VS_CTRL_REG0_BRANCHSTACK(0x3) | // XXX need to figure this out somehow.. + COND(s[VS].v->has_samp, A5XX_SP_VS_CTRL_REG0_PIXLODENABLE)); + + struct ir3_shader_linkage l = {0}; + ir3_link_shaders(&l, s[VS].v, s[FS].v); + + if ((s[VS].v->shader->stream_output.num_outputs > 0) && + !emit->key.binning_pass) + link_stream_out(&l, s[VS].v); + + BITSET_DECLARE(varbs, 128) = {0}; + uint32_t *varmask = (uint32_t *)varbs; + + for (i = 0; i < l.cnt; i++) + for (j = 0; j < util_last_bit(l.var[i].compmask); j++) + BITSET_SET(varbs, l.var[i].loc + j); + + OUT_PKT4(ring, REG_A5XX_VPC_VAR_DISABLE(0), 4); + OUT_RING(ring, ~varmask[0]); /* VPC_VAR[0].DISABLE */ + OUT_RING(ring, ~varmask[1]); /* VPC_VAR[1].DISABLE */ + OUT_RING(ring, ~varmask[2]); /* VPC_VAR[2].DISABLE */ + OUT_RING(ring, ~varmask[3]); /* VPC_VAR[3].DISABLE */ + + /* a5xx appends pos/psize to end of the linkage map: */ + if (pos_regid != regid(63,0)) + ir3_link_add(&l, pos_regid, 0xf, l.max_loc); + + if (psize_regid != regid(63,0)) { + psize_loc = l.max_loc; + ir3_link_add(&l, psize_regid, 0x1, l.max_loc); + } + + if ((s[VS].v->shader->stream_output.num_outputs > 0) && + !emit->key.binning_pass) { + emit_stream_out(ring, s[VS].v, &l); + + OUT_PKT4(ring, REG_A5XX_VPC_SO_OVERRIDE, 1); + OUT_RING(ring, 0x00000000); + } else { + OUT_PKT4(ring, REG_A5XX_VPC_SO_OVERRIDE, 1); + OUT_RING(ring, A5XX_VPC_SO_OVERRIDE_SO_DISABLE); + } + + for (i = 0, j = 0; (i < 16) && (j < l.cnt); i++) { + uint32_t reg = 0; + + OUT_PKT4(ring, REG_A5XX_SP_VS_OUT_REG(i), 1); + + reg |= A5XX_SP_VS_OUT_REG_A_REGID(l.var[j].regid); + reg |= A5XX_SP_VS_OUT_REG_A_COMPMASK(l.var[j].compmask); + j++; + + reg |= A5XX_SP_VS_OUT_REG_B_REGID(l.var[j].regid); + reg |= A5XX_SP_VS_OUT_REG_B_COMPMASK(l.var[j].compmask); + j++; + + OUT_RING(ring, reg); + } + + for (i = 0, j = 0; (i < 8) && (j < l.cnt); i++) { + uint32_t reg = 0; + + OUT_PKT4(ring, REG_A5XX_SP_VS_VPC_DST_REG(i), 1); + + reg |= A5XX_SP_VS_VPC_DST_REG_OUTLOC0(l.var[j++].loc); + reg |= A5XX_SP_VS_VPC_DST_REG_OUTLOC1(l.var[j++].loc); + reg |= A5XX_SP_VS_VPC_DST_REG_OUTLOC2(l.var[j++].loc); + reg |= A5XX_SP_VS_VPC_DST_REG_OUTLOC3(l.var[j++].loc); + + OUT_RING(ring, reg); + } + + OUT_PKT4(ring, REG_A5XX_SP_VS_OBJ_START_LO, 2); + OUT_RELOC(ring, s[VS].v->bo, 0, 0, 0); /* SP_VS_OBJ_START_LO/HI */ + + if (s[VS].instrlen) + emit_shader(ring, s[VS].v); + + // TODO depending on other bits in this reg (if any) set somewhere else? + OUT_PKT4(ring, REG_A5XX_PC_PRIM_VTX_CNTL, 1); + OUT_RING(ring, COND(s[VS].v->writes_psize, A5XX_PC_PRIM_VTX_CNTL_PSIZE)); + + if (emit->key.binning_pass) { + OUT_PKT4(ring, REG_A5XX_SP_FS_OBJ_START_LO, 2); + OUT_RING(ring, 0x00000000); /* SP_FS_OBJ_START_LO */ + OUT_RING(ring, 0x00000000); /* SP_FS_OBJ_START_HI */ + } else { + // TODO if some of these other bits depend on something other than + // program state we should probably move these next three regs: + + OUT_PKT4(ring, REG_A5XX_SP_PRIMITIVE_CNTL, 1); + OUT_RING(ring, A5XX_SP_PRIMITIVE_CNTL_VSOUT(l.cnt)); + + OUT_PKT4(ring, REG_A5XX_VPC_CNTL_0, 1); + OUT_RING(ring, A5XX_VPC_CNTL_0_STRIDE_IN_VPC(l.max_loc) | + COND(s[FS].v->total_in > 0, A5XX_VPC_CNTL_0_VARYING) | + COND(s[FS].v->frag_coord, A5XX_VPC_CNTL_0_VARYING) | + 0x10000); // XXX + + OUT_PKT4(ring, REG_A5XX_PC_PRIMITIVE_CNTL, 1); + OUT_RING(ring, A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC(l.max_loc) | + 0x400); // XXX + + OUT_PKT4(ring, REG_A5XX_SP_FS_OBJ_START_LO, 2); + OUT_RELOC(ring, s[FS].v->bo, 0, 0, 0); /* SP_FS_OBJ_START_LO/HI */ + } + + OUT_PKT4(ring, REG_A5XX_HLSQ_CONTROL_0_REG, 5); + OUT_RING(ring, A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(fssz) | + 0x00000880); /* XXX HLSQ_CONTROL_0 */ + OUT_RING(ring, A5XX_HLSQ_CONTROL_1_REG_PRIMALLOCTHRESHOLD(63)); + OUT_RING(ring, A5XX_HLSQ_CONTROL_2_REG_FACEREGID(face_regid) | + 0xfcfcfc00); /* XXX */ + OUT_RING(ring, A5XX_HLSQ_CONTROL_3_REG_FRAGCOORDXYREGID(vcoord_regid) | + 0xfcfcfc00); /* XXX */ + OUT_RING(ring, A5XX_HLSQ_CONTROL_4_REG_XYCOORDREGID(coord_regid) | + A5XX_HLSQ_CONTROL_4_REG_ZWCOORDREGID(zwcoord_regid) | + 0x0000fcfc); /* XXX */ + + OUT_PKT4(ring, REG_A5XX_SP_FS_CTRL_REG0, 1); + OUT_RING(ring, COND(s[FS].v->total_in > 0, A5XX_SP_FS_CTRL_REG0_VARYING) | + COND(s[FS].v->frag_coord, A5XX_SP_FS_CTRL_REG0_VARYING) | + 0x40006 | /* XXX set pretty much everywhere */ + A5XX_SP_FS_CTRL_REG0_THREADSIZE(fssz) | + A5XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT(s[FS].i->max_half_reg + 1) | + A5XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(s[FS].i->max_reg + 1) | + A5XX_SP_FS_CTRL_REG0_BRANCHSTACK(0x3) | // XXX need to figure this out somehow.. + COND(s[FS].v->has_samp, A5XX_SP_FS_CTRL_REG0_PIXLODENABLE)); + + OUT_PKT4(ring, REG_A5XX_HLSQ_UPDATE_CNTL, 1); + OUT_RING(ring, 0x020fffff); /* XXX */ + + OUT_PKT4(ring, REG_A5XX_VPC_GS_SIV_CNTL, 1); + OUT_RING(ring, 0x0000ffff); /* XXX */ + + OUT_PKT4(ring, REG_A5XX_SP_SP_CNTL, 1); + OUT_RING(ring, 0x00000010); /* XXX */ + + OUT_PKT4(ring, REG_A5XX_GRAS_CNTL, 1); + OUT_RING(ring, COND(s[FS].v->total_in > 0, A5XX_GRAS_CNTL_VARYING) | + COND(s[FS].v->frag_coord, A5XX_GRAS_CNTL_XCOORD | + A5XX_GRAS_CNTL_YCOORD | + A5XX_GRAS_CNTL_ZCOORD | + A5XX_GRAS_CNTL_WCOORD | + A5XX_GRAS_CNTL_UNK3) | + COND(s[FS].v->frag_face, A5XX_GRAS_CNTL_UNK3)); + + OUT_PKT4(ring, REG_A5XX_RB_RENDER_CONTROL0, 2); + OUT_RING(ring, COND(s[FS].v->total_in > 0, A5XX_RB_RENDER_CONTROL0_VARYING) | + COND(s[FS].v->frag_coord, A5XX_RB_RENDER_CONTROL0_XCOORD | + A5XX_RB_RENDER_CONTROL0_YCOORD | + A5XX_RB_RENDER_CONTROL0_ZCOORD | + A5XX_RB_RENDER_CONTROL0_WCOORD | + A5XX_RB_RENDER_CONTROL0_UNK3) | + COND(s[FS].v->frag_face, A5XX_RB_RENDER_CONTROL0_UNK3)); + OUT_RING(ring, COND(s[FS].v->frag_face, A5XX_RB_RENDER_CONTROL1_FACENESS)); + + OUT_PKT4(ring, REG_A5XX_SP_FS_OUTPUT_REG(0), 8); + for (i = 0; i < 8; i++) { + OUT_RING(ring, A5XX_SP_FS_OUTPUT_REG_REGID(color_regid[i]) | + COND(emit->key.half_precision, + A5XX_SP_FS_OUTPUT_REG_HALF_PRECISION)); + } + + if (emit->key.binning_pass) { + OUT_PKT4(ring, REG_A5XX_VPC_PACK, 1); + OUT_RING(ring, A5XX_VPC_PACK_NUMNONPOSVAR(0)); + } else { + uint32_t vinterp[8], vpsrepl[8]; + + memset(vinterp, 0, sizeof(vinterp)); + memset(vpsrepl, 0, sizeof(vpsrepl)); + + /* looks like we need to do int varyings in the frag + * shader on a5xx (no flatshad reg? or a420.0 bug?): + * + * (sy)(ss)nop + * (sy)ldlv.u32 r0.x,l[r0.x], 1 + * ldlv.u32 r0.y,l[r0.x+1], 1 + * (ss)bary.f (ei)r63.x, 0, r0.x + * (ss)(rpt1)cov.s32f16 hr0.x, (r)r0.x + * (rpt5)nop + * sam (f16)(xyzw)hr0.x, hr0.x, s#0, t#0 + * + * Possibly on later a5xx variants we'll be able to use + * something like the code below instead of workaround + * in the shader: + */ + /* figure out VARYING_INTERP / VARYING_PS_REPL register values: */ + for (j = -1; (j = ir3_next_varying(s[FS].v, j)) < (int)s[FS].v->inputs_count; ) { + /* NOTE: varyings are packed, so if compmask is 0xb + * then first, third, and fourth component occupy + * three consecutive varying slots: + */ + unsigned compmask = s[FS].v->inputs[j].compmask; + + uint32_t inloc = s[FS].v->inputs[j].inloc; + + if ((s[FS].v->inputs[j].interpolate == INTERP_MODE_FLAT) || + (s[FS].v->inputs[j].rasterflat && emit->rasterflat)) { + uint32_t loc = inloc; + + for (i = 0; i < 4; i++) { + if (compmask & (1 << i)) { + vinterp[loc / 16] |= 1 << ((loc % 16) * 2); + //flatshade[loc / 32] |= 1 << (loc % 32); + loc++; + } + } + } + + gl_varying_slot slot = s[FS].v->inputs[j].slot; + + /* since we don't enable PIPE_CAP_TGSI_TEXCOORD: */ + if (slot >= VARYING_SLOT_VAR0) { + unsigned texmask = 1 << (slot - VARYING_SLOT_VAR0); + /* Replace the .xy coordinates with S/T from the point sprite. Set + * interpolation bits for .zw such that they become .01 + */ + if (emit->sprite_coord_enable & texmask) { + /* mask is two 2-bit fields, where: + * '01' -> S + * '10' -> T + * '11' -> 1 - T (flip mode) + */ + unsigned mask = emit->sprite_coord_mode ? 0b1101 : 0b1001; + uint32_t loc = inloc; + if (compmask & 0x1) { + vpsrepl[loc / 16] |= ((mask >> 0) & 0x3) << ((loc % 16) * 2); + loc++; + } + if (compmask & 0x2) { + vpsrepl[loc / 16] |= ((mask >> 2) & 0x3) << ((loc % 16) * 2); + loc++; + } + if (compmask & 0x4) { + /* .z <- 0.0f */ + vinterp[loc / 16] |= 0b10 << ((loc % 16) * 2); + loc++; + } + if (compmask & 0x8) { + /* .w <- 1.0f */ + vinterp[loc / 16] |= 0b11 << ((loc % 16) * 2); + loc++; + } + } + } + } + + OUT_PKT4(ring, REG_A5XX_VPC_PACK, 1); + OUT_RING(ring, A5XX_VPC_PACK_NUMNONPOSVAR(s[FS].v->total_in) | + A5XX_VPC_PACK_PSIZELOC(psize_loc)); + + OUT_PKT4(ring, REG_A5XX_VPC_VARYING_INTERP_MODE(0), 8); + for (i = 0; i < 8; i++) + OUT_RING(ring, vinterp[i]); /* VPC_VARYING_INTERP[i].MODE */ + + OUT_PKT4(ring, REG_A5XX_VPC_VARYING_PS_REPL_MODE(0), 8); + for (i = 0; i < 8; i++) + OUT_RING(ring, vpsrepl[i]); /* VPC_VARYING_PS_REPL[i] */ + } + + if (!emit->key.binning_pass) + if (s[FS].instrlen) + emit_shader(ring, s[FS].v); + + OUT_PKT4(ring, REG_A5XX_VFD_CONTROL_1, 5); + OUT_RING(ring, A5XX_VFD_CONTROL_1_REGID4VTX(vertex_regid) | + A5XX_VFD_CONTROL_1_REGID4INST(instance_regid) | + 0xfc0000); + OUT_RING(ring, 0x0000fcfc); /* VFD_CONTROL_2 */ + OUT_RING(ring, 0x0000fcfc); /* VFD_CONTROL_3 */ + OUT_RING(ring, 0x000000fc); /* VFD_CONTROL_4 */ + OUT_RING(ring, 0x00000000); /* VFD_CONTROL_5 */ +} + +void +fd5_prog_init(struct pipe_context *pctx) +{ + pctx->create_fs_state = fd5_fp_state_create; + pctx->delete_fs_state = fd5_fp_state_delete; + + pctx->create_vs_state = fd5_vp_state_create; + pctx->delete_vs_state = fd5_vp_state_delete; + + fd_prog_init(pctx); +} diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_program.h mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_program.h --- mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_program.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_program.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,44 @@ +/* + * Copyright (C) 2016 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#ifndef FD5_PROGRAM_H_ +#define FD5_PROGRAM_H_ + +#include "pipe/p_context.h" +#include "freedreno_context.h" +#include "ir3_shader.h" + +struct fd5_shader_stateobj { + struct ir3_shader *shader; +}; + +struct fd5_emit; + +void fd5_program_emit(struct fd_ringbuffer *ring, struct fd5_emit *emit); + +void fd5_prog_init(struct pipe_context *pctx); + +#endif /* FD5_PROGRAM_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_query.c mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_query.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_query.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_query.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,32 @@ +/* + * Copyright (C) 2016 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#include "fd5_query.h" + +void fd5_query_context_init(struct pipe_context *pctx) +{ + /* TODO */ +} diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_query.h mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_query.h --- mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_query.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_query.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2016 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#ifndef FD5_QUERY_H_ +#define FD5_QUERY_H_ + +#include "pipe/p_context.h" + +void fd5_query_context_init(struct pipe_context *pctx); + +#endif /* FD5_QUERY_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_rasterizer.c mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_rasterizer.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_rasterizer.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_rasterizer.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,99 @@ +/* + * Copyright (C) 2016 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + + +#include "pipe/p_state.h" +#include "util/u_string.h" +#include "util/u_memory.h" + +#include "fd5_rasterizer.h" +#include "fd5_context.h" +#include "fd5_format.h" + +void * +fd5_rasterizer_state_create(struct pipe_context *pctx, + const struct pipe_rasterizer_state *cso) +{ + struct fd5_rasterizer_stateobj *so; + float psize_min, psize_max; + + so = CALLOC_STRUCT(fd5_rasterizer_stateobj); + if (!so) + return NULL; + + so->base = *cso; + + if (cso->point_size_per_vertex) { + psize_min = util_get_min_point_size(cso); + psize_max = 4092; + } else { + /* Force the point size to be as if the vertex output was disabled. */ + psize_min = cso->point_size; + psize_max = cso->point_size; + } + + so->gras_cl_clip_cntl = 0x80000; /* ??? */ + so->gras_su_point_minmax = + A5XX_GRAS_SU_POINT_MINMAX_MIN(psize_min) | + A5XX_GRAS_SU_POINT_MINMAX_MAX(psize_max); + so->gras_su_point_size = A5XX_GRAS_SU_POINT_SIZE(cso->point_size); + so->gras_su_poly_offset_scale = + A5XX_GRAS_SU_POLY_OFFSET_SCALE(cso->offset_scale); + so->gras_su_poly_offset_offset = + A5XX_GRAS_SU_POLY_OFFSET_OFFSET(cso->offset_units); + so->gras_su_poly_offset_clamp = + A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP(cso->offset_clamp); + + so->gras_su_cntl = + A5XX_GRAS_SU_CNTL_LINEHALFWIDTH(cso->line_width/2.0); +// so->pc_prim_vtx_cntl2 = +// A5XX_PC_PRIM_VTX_CNTL2_POLYMODE_FRONT_PTYPE(fd_polygon_mode(cso->fill_front)) | +// A5XX_PC_PRIM_VTX_CNTL2_POLYMODE_BACK_PTYPE(fd_polygon_mode(cso->fill_back)); + +// if (cso->fill_front != PIPE_POLYGON_MODE_FILL || +// cso->fill_back != PIPE_POLYGON_MODE_FILL) +// so->pc_prim_vtx_cntl2 |= A5XX_PC_PRIM_VTX_CNTL2_POLYMODE_ENABLE; + + if (cso->cull_face & PIPE_FACE_FRONT) + so->gras_su_cntl |= A5XX_GRAS_SU_CNTL_CULL_FRONT; + if (cso->cull_face & PIPE_FACE_BACK) + so->gras_su_cntl |= A5XX_GRAS_SU_CNTL_CULL_BACK; + if (!cso->front_ccw) + so->gras_su_cntl |= A5XX_GRAS_SU_CNTL_FRONT_CW; +// if (!cso->flatshade_first) +// so->pc_prim_vtx_cntl |= A5XX_PC_PRIM_VTX_CNTL_PROVOKING_VTX_LAST; + + if (cso->offset_tri) + so->gras_su_cntl |= A5XX_GRAS_SU_CNTL_POLY_OFFSET; + +// if (!cso->depth_clip) +// so->gras_cl_clip_cntl |= A5XX_GRAS_CL_CLIP_CNTL_ZNEAR_CLIP_DISABLE | +// A5XX_GRAS_CL_CLIP_CNTL_ZFAR_CLIP_DISABLE; +// if (cso->clip_halfz) +// so->gras_cl_clip_cntl |= A5XX_GRAS_CL_CLIP_CNTL_ZERO_GB_SCALE_Z; + + return so; +} diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_rasterizer.h mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_rasterizer.h --- mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_rasterizer.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_rasterizer.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,57 @@ +/* + * Copyright (C) 2016 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#ifndef FD5_RASTERIZER_H_ +#define FD5_RASTERIZER_H_ + +#include "pipe/p_state.h" +#include "pipe/p_context.h" + +struct fd5_rasterizer_stateobj { + struct pipe_rasterizer_state base; + + uint32_t gras_su_point_minmax; + uint32_t gras_su_point_size; + uint32_t gras_su_poly_offset_scale; + uint32_t gras_su_poly_offset_offset; + uint32_t gras_su_poly_offset_clamp; + + uint32_t gras_su_cntl; + uint32_t gras_cl_clip_cntl; + uint32_t pc_prim_vtx_cntl; + uint32_t pc_prim_vtx_cntl2; +}; + +static inline struct fd5_rasterizer_stateobj * +fd5_rasterizer_stateobj(struct pipe_rasterizer_state *rast) +{ + return (struct fd5_rasterizer_stateobj *)rast; +} + +void * fd5_rasterizer_state_create(struct pipe_context *pctx, + const struct pipe_rasterizer_state *cso); + +#endif /* FD5_RASTERIZER_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_screen.c mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_screen.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_screen.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_screen.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,104 @@ +/* + * Copyright (C) 2016 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#include "pipe/p_screen.h" +#include "util/u_format.h" + +#include "fd5_screen.h" +#include "fd5_context.h" +#include "fd5_format.h" +#include "ir3_compiler.h" + +static boolean +fd5_screen_is_format_supported(struct pipe_screen *pscreen, + enum pipe_format format, + enum pipe_texture_target target, + unsigned sample_count, + unsigned usage) +{ + unsigned retval = 0; + + if ((target >= PIPE_MAX_TEXTURE_TYPES) || + (sample_count > 1) || /* TODO add MSAA */ + !util_format_is_supported(format, usage)) { + DBG("not supported: format=%s, target=%d, sample_count=%d, usage=%x", + util_format_name(format), target, sample_count, usage); + return FALSE; + } + + if ((usage & PIPE_BIND_VERTEX_BUFFER) && + (fd5_pipe2vtx(format) != (enum a5xx_vtx_fmt)~0)) { + retval |= PIPE_BIND_VERTEX_BUFFER; + } + + if ((usage & PIPE_BIND_SAMPLER_VIEW) && + (target == PIPE_BUFFER || + util_format_get_blocksize(format) != 12) && + (fd5_pipe2tex(format) != (enum a5xx_tex_fmt)~0)) { + retval |= PIPE_BIND_SAMPLER_VIEW; + } + + if ((usage & (PIPE_BIND_RENDER_TARGET | + PIPE_BIND_DISPLAY_TARGET | + PIPE_BIND_SCANOUT | + PIPE_BIND_SHARED)) && + (fd5_pipe2color(format) != (enum a5xx_color_fmt)~0) && + (fd5_pipe2tex(format) != (enum a5xx_tex_fmt)~0)) { + retval |= usage & (PIPE_BIND_RENDER_TARGET | + PIPE_BIND_DISPLAY_TARGET | + PIPE_BIND_SCANOUT | + PIPE_BIND_SHARED); + } + + if ((usage & PIPE_BIND_DEPTH_STENCIL) && + (fd5_pipe2depth(format) != (enum a5xx_depth_format)~0) && + (fd5_pipe2tex(format) != (enum a5xx_tex_fmt)~0)) { + retval |= PIPE_BIND_DEPTH_STENCIL; + } + + if ((usage & PIPE_BIND_INDEX_BUFFER) && + (fd_pipe2index(format) != (enum pc_di_index_size)~0)) { + retval |= PIPE_BIND_INDEX_BUFFER; + } + + if (retval != usage) { + DBG("not supported: format=%s, target=%d, sample_count=%d, " + "usage=%x, retval=%x", util_format_name(format), + target, sample_count, usage, retval); + } + + return retval == usage; +} + +void +fd5_screen_init(struct pipe_screen *pscreen) +{ + struct fd_screen *screen = fd_screen(pscreen); + screen->max_rts = A5XX_MAX_RENDER_TARGETS; + screen->compiler = ir3_compiler_create(screen->dev, screen->gpu_id); + pscreen->context_create = fd5_context_create; + pscreen->is_format_supported = fd5_screen_is_format_supported; +} diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_screen.h mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_screen.h --- mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_screen.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_screen.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2016 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#ifndef FD5_SCREEN_H_ +#define FD5_SCREEN_H_ + +#include "pipe/p_screen.h" + +void fd5_screen_init(struct pipe_screen *pscreen); + +#endif /* FD5_SCREEN_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_texture.c mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_texture.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_texture.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_texture.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,353 @@ +/* + * Copyright (C) 2016 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#include "pipe/p_state.h" +#include "util/u_string.h" +#include "util/u_memory.h" +#include "util/u_inlines.h" +#include "util/u_format.h" + +#include "fd5_texture.h" +#include "fd5_format.h" + +static enum a5xx_tex_clamp +tex_clamp(unsigned wrap, bool clamp_to_edge, bool *needs_border) +{ + /* Hardware does not support _CLAMP, but we emulate it: */ + if (wrap == PIPE_TEX_WRAP_CLAMP) { + wrap = (clamp_to_edge) ? + PIPE_TEX_WRAP_CLAMP_TO_EDGE : PIPE_TEX_WRAP_CLAMP_TO_BORDER; + } + + switch (wrap) { + case PIPE_TEX_WRAP_REPEAT: + return A5XX_TEX_REPEAT; + case PIPE_TEX_WRAP_CLAMP_TO_EDGE: + return A5XX_TEX_CLAMP_TO_EDGE; + case PIPE_TEX_WRAP_CLAMP_TO_BORDER: + *needs_border = true; + return A5XX_TEX_CLAMP_TO_BORDER; + case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE: + /* only works for PoT.. need to emulate otherwise! */ + return A5XX_TEX_MIRROR_CLAMP; + case PIPE_TEX_WRAP_MIRROR_REPEAT: + return A5XX_TEX_MIRROR_REPEAT; + case PIPE_TEX_WRAP_MIRROR_CLAMP: + case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER: + /* these two we could perhaps emulate, but we currently + * just don't advertise PIPE_CAP_TEXTURE_MIRROR_CLAMP + */ + default: + DBG("invalid wrap: %u", wrap); + return 0; + } +} + +static enum a5xx_tex_filter +tex_filter(unsigned filter, bool aniso) +{ + switch (filter) { + case PIPE_TEX_FILTER_NEAREST: + return A5XX_TEX_NEAREST; + case PIPE_TEX_FILTER_LINEAR: + return aniso ? A5XX_TEX_ANISO : A5XX_TEX_LINEAR; + default: + DBG("invalid filter: %u", filter); + return 0; + } +} + +static void * +fd5_sampler_state_create(struct pipe_context *pctx, + const struct pipe_sampler_state *cso) +{ + struct fd5_sampler_stateobj *so = CALLOC_STRUCT(fd5_sampler_stateobj); + unsigned aniso = util_last_bit(MIN2(cso->max_anisotropy >> 1, 8)); + bool miplinear = false; + bool clamp_to_edge; + + if (!so) + return NULL; + + so->base = *cso; + + if (cso->min_mip_filter == PIPE_TEX_MIPFILTER_LINEAR) + miplinear = true; + + /* + * For nearest filtering, _CLAMP means _CLAMP_TO_EDGE; for linear + * filtering, _CLAMP means _CLAMP_TO_BORDER while additionally + * clamping the texture coordinates to [0.0, 1.0]. + * + * The clamping will be taken care of in the shaders. There are two + * filters here, but let the minification one has a say. + */ + clamp_to_edge = (cso->min_img_filter == PIPE_TEX_FILTER_NEAREST); + if (!clamp_to_edge) { + so->saturate_s = (cso->wrap_s == PIPE_TEX_WRAP_CLAMP); + so->saturate_t = (cso->wrap_t == PIPE_TEX_WRAP_CLAMP); + so->saturate_r = (cso->wrap_r == PIPE_TEX_WRAP_CLAMP); + } + + so->needs_border = false; + so->texsamp0 = + COND(miplinear, A5XX_TEX_SAMP_0_MIPFILTER_LINEAR_NEAR) | + A5XX_TEX_SAMP_0_XY_MAG(tex_filter(cso->mag_img_filter, aniso)) | + A5XX_TEX_SAMP_0_XY_MIN(tex_filter(cso->min_img_filter, aniso)) | + A5XX_TEX_SAMP_0_ANISO(aniso) | + A5XX_TEX_SAMP_0_WRAP_S(tex_clamp(cso->wrap_s, clamp_to_edge, &so->needs_border)) | + A5XX_TEX_SAMP_0_WRAP_T(tex_clamp(cso->wrap_t, clamp_to_edge, &so->needs_border)) | + A5XX_TEX_SAMP_0_WRAP_R(tex_clamp(cso->wrap_r, clamp_to_edge, &so->needs_border)); + + so->texsamp1 = + COND(miplinear, A5XX_TEX_SAMP_1_MIPFILTER_LINEAR_FAR) | + COND(!cso->seamless_cube_map, A5XX_TEX_SAMP_1_CUBEMAPSEAMLESSFILTOFF) | + COND(!cso->normalized_coords, A5XX_TEX_SAMP_1_UNNORM_COORDS); + + if (cso->min_mip_filter != PIPE_TEX_MIPFILTER_NONE) { + so->texsamp0 |= A5XX_TEX_SAMP_0_LOD_BIAS(cso->lod_bias); + so->texsamp1 |= + A5XX_TEX_SAMP_1_MIN_LOD(cso->min_lod) | + A5XX_TEX_SAMP_1_MAX_LOD(cso->max_lod); + } + + if (cso->compare_mode) + so->texsamp1 |= A5XX_TEX_SAMP_1_COMPARE_FUNC(cso->compare_func); /* maps 1:1 */ + + return so; +} + +static void +fd5_sampler_states_bind(struct pipe_context *pctx, + enum pipe_shader_type shader, unsigned start, + unsigned nr, void **hwcso) +{ + struct fd_context *ctx = fd_context(pctx); + struct fd5_context *fd5_ctx = fd5_context(ctx); + uint16_t saturate_s = 0, saturate_t = 0, saturate_r = 0; + unsigned i; + + if (!hwcso) + nr = 0; + + for (i = 0; i < nr; i++) { + if (hwcso[i]) { + struct fd5_sampler_stateobj *sampler = + fd5_sampler_stateobj(hwcso[i]); + if (sampler->saturate_s) + saturate_s |= (1 << i); + if (sampler->saturate_t) + saturate_t |= (1 << i); + if (sampler->saturate_r) + saturate_r |= (1 << i); + } + } + + fd_sampler_states_bind(pctx, shader, start, nr, hwcso); + + if (shader == PIPE_SHADER_FRAGMENT) { + fd5_ctx->fsaturate = + (saturate_s != 0) || + (saturate_t != 0) || + (saturate_r != 0); + fd5_ctx->fsaturate_s = saturate_s; + fd5_ctx->fsaturate_t = saturate_t; + fd5_ctx->fsaturate_r = saturate_r; + } else if (shader == PIPE_SHADER_VERTEX) { + fd5_ctx->vsaturate = + (saturate_s != 0) || + (saturate_t != 0) || + (saturate_r != 0); + fd5_ctx->vsaturate_s = saturate_s; + fd5_ctx->vsaturate_t = saturate_t; + fd5_ctx->vsaturate_r = saturate_r; + } +} + +static enum a5xx_tex_type +tex_type(unsigned target) +{ + switch (target) { + default: + assert(0); + case PIPE_BUFFER: + case PIPE_TEXTURE_1D: + case PIPE_TEXTURE_1D_ARRAY: + return A5XX_TEX_1D; + case PIPE_TEXTURE_RECT: + case PIPE_TEXTURE_2D: + case PIPE_TEXTURE_2D_ARRAY: + return A5XX_TEX_2D; + case PIPE_TEXTURE_3D: + return A5XX_TEX_3D; + case PIPE_TEXTURE_CUBE: + case PIPE_TEXTURE_CUBE_ARRAY: + return A5XX_TEX_CUBE; + } +} + +static bool +use_astc_srgb_workaround(struct pipe_context *pctx, enum pipe_format format) +{ + return (fd_screen(pctx->screen)->gpu_id == 420) && + (util_format_description(format)->layout == UTIL_FORMAT_LAYOUT_ASTC); +} + +static struct pipe_sampler_view * +fd5_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc, + const struct pipe_sampler_view *cso) +{ + struct fd5_pipe_sampler_view *so = CALLOC_STRUCT(fd5_pipe_sampler_view); + struct fd_resource *rsc = fd_resource(prsc); + unsigned lvl, layers; + uint32_t sz2 = 0; + + if (!so) + return NULL; + + so->base = *cso; + pipe_reference(NULL, &prsc->reference); + so->base.texture = prsc; + so->base.reference.count = 1; + so->base.context = pctx; + + so->texconst0 = + A5XX_TEX_CONST_0_FMT(fd5_pipe2tex(cso->format)) | + fd5_tex_swiz(cso->format, cso->swizzle_r, cso->swizzle_g, + cso->swizzle_b, cso->swizzle_a); + + if (util_format_is_srgb(cso->format)) { + if (use_astc_srgb_workaround(pctx, cso->format)) + so->astc_srgb = true; + so->texconst0 |= A5XX_TEX_CONST_0_SRGB; + } + + if (cso->target == PIPE_BUFFER) { + unsigned elements = cso->u.buf.size / util_format_get_blocksize(cso->format); + + lvl = 0; + so->texconst1 = + A5XX_TEX_CONST_1_WIDTH(elements) | + A5XX_TEX_CONST_1_HEIGHT(1); + so->texconst2 = + A5XX_TEX_CONST_2_FETCHSIZE(fd5_pipe2fetchsize(cso->format)) | + A5XX_TEX_CONST_2_PITCH(elements * rsc->cpp); + so->offset = cso->u.buf.offset; + } else { + unsigned miplevels; + + lvl = fd_sampler_first_level(cso); + miplevels = fd_sampler_last_level(cso) - lvl; + layers = cso->u.tex.last_layer - cso->u.tex.first_layer + 1; + + so->texconst0 |= A5XX_TEX_CONST_0_MIPLVLS(miplevels); + so->texconst1 = + A5XX_TEX_CONST_1_WIDTH(u_minify(prsc->width0, lvl)) | + A5XX_TEX_CONST_1_HEIGHT(u_minify(prsc->height0, lvl)); + so->texconst2 = + A5XX_TEX_CONST_2_FETCHSIZE(fd5_pipe2fetchsize(cso->format)) | + A5XX_TEX_CONST_2_PITCH( + util_format_get_nblocksx( + cso->format, rsc->slices[lvl].pitch) * rsc->cpp); + so->offset = fd_resource_offset(rsc, lvl, cso->u.tex.first_layer); + } + + so->texconst2 |= A5XX_TEX_CONST_2_TYPE(tex_type(cso->target)); + + switch (cso->target) { + case PIPE_TEXTURE_1D: + case PIPE_TEXTURE_2D: + so->texconst3 = + A5XX_TEX_CONST_3_ARRAY_PITCH(rsc->layer_size); + so->texconst5 = + A5XX_TEX_CONST_5_DEPTH(1); + break; + case PIPE_TEXTURE_1D_ARRAY: + case PIPE_TEXTURE_2D_ARRAY: + so->texconst3 = + A5XX_TEX_CONST_3_ARRAY_PITCH(rsc->layer_size); + so->texconst5 = + A5XX_TEX_CONST_5_DEPTH(layers); + break; + case PIPE_TEXTURE_CUBE: + case PIPE_TEXTURE_CUBE_ARRAY: + so->texconst3 = + A5XX_TEX_CONST_3_ARRAY_PITCH(rsc->layer_size); + so->texconst5 = + A5XX_TEX_CONST_5_DEPTH(layers / 6); + break; + case PIPE_TEXTURE_3D: + while (lvl < cso->u.tex.last_level && sz2 != rsc->slices[lvl+1].size0) + sz2 = rsc->slices[++lvl].size0; + so->texconst3 = + A5XX_TEX_CONST_3_ARRAY_PITCH(rsc->slices[lvl].size0); + so->texconst5 = + A5XX_TEX_CONST_5_DEPTH(u_minify(prsc->depth0, lvl)); + break; + default: + so->texconst3 = 0x00000000; + break; + } + + return &so->base; +} + +static void +fd5_set_sampler_views(struct pipe_context *pctx, enum pipe_shader_type shader, + unsigned start, unsigned nr, + struct pipe_sampler_view **views) +{ + struct fd_context *ctx = fd_context(pctx); + struct fd5_context *fd5_ctx = fd5_context(ctx); + uint16_t astc_srgb = 0; + unsigned i; + + for (i = 0; i < nr; i++) { + if (views[i]) { + struct fd5_pipe_sampler_view *view = + fd5_pipe_sampler_view(views[i]); + if (view->astc_srgb) + astc_srgb |= (1 << i); + } + } + + fd_set_sampler_views(pctx, shader, start, nr, views); + + if (shader == PIPE_SHADER_FRAGMENT) { + fd5_ctx->fastc_srgb = astc_srgb; + } else if (shader == PIPE_SHADER_VERTEX) { + fd5_ctx->vastc_srgb = astc_srgb; + } +} + +void +fd5_texture_init(struct pipe_context *pctx) +{ + pctx->create_sampler_state = fd5_sampler_state_create; + pctx->bind_sampler_states = fd5_sampler_states_bind; + pctx->create_sampler_view = fd5_sampler_view_create; + pctx->set_sampler_views = fd5_set_sampler_views; +} diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_texture.h mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_texture.h --- mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_texture.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_texture.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,70 @@ +/* + * Copyright (C) 2016 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#ifndef FD5_TEXTURE_H_ +#define FD5_TEXTURE_H_ + +#include "pipe/p_context.h" + +#include "freedreno_texture.h" +#include "freedreno_resource.h" + +#include "fd5_context.h" +#include "fd5_format.h" + +struct fd5_sampler_stateobj { + struct pipe_sampler_state base; + uint32_t texsamp0, texsamp1, texsamp2, texsamp3; + bool saturate_s, saturate_t, saturate_r; + bool needs_border; +}; + +static inline struct fd5_sampler_stateobj * +fd5_sampler_stateobj(struct pipe_sampler_state *samp) +{ + return (struct fd5_sampler_stateobj *)samp; +} + +struct fd5_pipe_sampler_view { + struct pipe_sampler_view base; + uint32_t texconst0, texconst1, texconst2, texconst3, texconst5; + uint32_t texconst6, texconst7, texconst8, texconst9, texconst10, texconst11; + uint32_t offset; + bool astc_srgb; +}; + +static inline struct fd5_pipe_sampler_view * +fd5_pipe_sampler_view(struct pipe_sampler_view *pview) +{ + return (struct fd5_pipe_sampler_view *)pview; +} + +unsigned fd5_get_const_idx(struct fd_context *ctx, + struct fd_texture_stateobj *tex, unsigned samp_id); + +void fd5_texture_init(struct pipe_context *pctx); + +#endif /* FD5_TEXTURE_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_zsa.c mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_zsa.c --- mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_zsa.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_zsa.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,99 @@ +/* + * Copyright (C) 2016 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + + +#include "pipe/p_state.h" +#include "util/u_string.h" +#include "util/u_memory.h" + +#include "fd5_zsa.h" +#include "fd5_context.h" +#include "fd5_format.h" + +void * +fd5_zsa_state_create(struct pipe_context *pctx, + const struct pipe_depth_stencil_alpha_state *cso) +{ + struct fd5_zsa_stateobj *so; + + so = CALLOC_STRUCT(fd5_zsa_stateobj); + if (!so) + return NULL; + + so->base = *cso; + + so->rb_depth_cntl |= + A5XX_RB_DEPTH_CNTL_ZFUNC(cso->depth.func); /* maps 1:1 */ + + if (cso->depth.enabled) + so->rb_depth_cntl |= + A5XX_RB_DEPTH_CNTL_Z_ENABLE | + A5XX_RB_DEPTH_CNTL_Z_TEST_ENABLE; + + if (cso->depth.writemask) + so->rb_depth_cntl |= A5XX_RB_DEPTH_CNTL_Z_WRITE_ENABLE; + + if (cso->stencil[0].enabled) { + const struct pipe_stencil_state *s = &cso->stencil[0]; + + so->rb_stencil_control |= + A5XX_RB_STENCIL_CONTROL_STENCIL_READ | + A5XX_RB_STENCIL_CONTROL_STENCIL_ENABLE | + A5XX_RB_STENCIL_CONTROL_FUNC(s->func) | /* maps 1:1 */ + A5XX_RB_STENCIL_CONTROL_FAIL(fd_stencil_op(s->fail_op)) | + A5XX_RB_STENCIL_CONTROL_ZPASS(fd_stencil_op(s->zpass_op)) | + A5XX_RB_STENCIL_CONTROL_ZFAIL(fd_stencil_op(s->zfail_op)); + so->rb_stencilrefmask |= + A5XX_RB_STENCILREFMASK_STENCILWRITEMASK(s->writemask) | + A5XX_RB_STENCILREFMASK_STENCILMASK(s->valuemask); + + if (cso->stencil[1].enabled) { + const struct pipe_stencil_state *bs = &cso->stencil[1]; + + so->rb_stencil_control |= + A5XX_RB_STENCIL_CONTROL_STENCIL_ENABLE_BF | + A5XX_RB_STENCIL_CONTROL_FUNC_BF(bs->func) | /* maps 1:1 */ + A5XX_RB_STENCIL_CONTROL_FAIL_BF(fd_stencil_op(bs->fail_op)) | + A5XX_RB_STENCIL_CONTROL_ZPASS_BF(fd_stencil_op(bs->zpass_op)) | + A5XX_RB_STENCIL_CONTROL_ZFAIL_BF(fd_stencil_op(bs->zfail_op)); +// so->rb_stencilrefmask_bf |= +// A5XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(bs->writemask) | +// A5XX_RB_STENCILREFMASK_BF_STENCILMASK(bs->valuemask); + } + } + + if (cso->alpha.enabled) { + uint32_t ref = cso->alpha.ref_value * 255.0; + so->rb_alpha_control = + A5XX_RB_ALPHA_CONTROL_ALPHA_TEST | + A5XX_RB_ALPHA_CONTROL_ALPHA_REF(ref) | + A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(cso->alpha.func); +// so->rb_depth_control |= +// A5XX_RB_DEPTH_CONTROL_EARLY_Z_DISABLE; + } + + return so; +} diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_zsa.h mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_zsa.h --- mesa-12.0.6/src/gallium/drivers/freedreno/a5xx/fd5_zsa.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/a5xx/fd5_zsa.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,54 @@ +/* + * Copyright (C) 2016 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#ifndef FD5_ZSA_H_ +#define FD5_ZSA_H_ + + +#include "pipe/p_state.h" +#include "pipe/p_context.h" + +#include "freedreno_util.h" + +struct fd5_zsa_stateobj { + struct pipe_depth_stencil_alpha_state base; + + uint32_t rb_alpha_control; + uint32_t rb_depth_cntl; + uint32_t rb_stencil_control; + uint32_t rb_stencilrefmask; +}; + +static inline struct fd5_zsa_stateobj * +fd5_zsa_stateobj(struct pipe_depth_stencil_alpha_state *zsa) +{ + return (struct fd5_zsa_stateobj *)zsa; +} + +void * fd5_zsa_state_create(struct pipe_context *pctx, + const struct pipe_depth_stencil_alpha_state *cso); + +#endif /* FD5_ZSA_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/adreno_common.xml.h mesa-17.0.7/src/gallium/drivers/freedreno/adreno_common.xml.h --- mesa-12.0.6/src/gallium/drivers/freedreno/adreno_common.xml.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/adreno_common.xml.h 2017-06-01 10:37:10.000000000 +0000 @@ -8,13 +8,14 @@ git clone https://github.com/freedreno/envytools.git The rules-ng-ng source files this header was generated from are: -- /home/robclark/src/freedreno/envytools/rnndb/adreno.xml ( 398 bytes, from 2015-09-24 17:25:31) +- /home/robclark/src/freedreno/envytools/rnndb/adreno.xml ( 431 bytes, from 2016-04-26 17:56:44) - /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2016-02-10 17:07:21) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32901 bytes, from 2015-05-20 20:03:14) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 11518 bytes, from 2016-02-10 21:03:25) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 16185 bytes, from 2016-03-05 03:08:05) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83967 bytes, from 2016-02-10 17:07:21) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 110685 bytes, from 2016-04-25 17:56:43) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32907 bytes, from 2016-11-26 23:01:08) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 12025 bytes, from 2016-11-26 23:01:08) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 23277 bytes, from 2016-12-24 05:01:47) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2016-11-26 23:01:08) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 110757 bytes, from 2016-12-26 17:51:07) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 100594 bytes, from 2017-01-20 23:03:30) - /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2015-09-24 17:30:00) Copyright (C) 2013-2016 by the following authors: @@ -174,6 +175,14 @@ XYZW = 3, }; +enum a3xx_rb_blend_opcode { + BLEND_DST_PLUS_SRC = 0, + BLEND_SRC_MINUS_DST = 1, + BLEND_DST_MINUS_SRC = 2, + BLEND_MIN_DST_SRC = 3, + BLEND_MAX_DST_SRC = 4, +}; + #define REG_AXXX_CP_RB_BASE 0x000001c0 #define REG_AXXX_CP_RB_CNTL 0x000001c1 @@ -210,6 +219,7 @@ #define AXXX_CP_RB_RPTR_ADDR_ADDR__SHIFT 2 static inline uint32_t AXXX_CP_RB_RPTR_ADDR_ADDR(uint32_t val) { + assert(!(val & 0x3)); return ((val >> 2) << AXXX_CP_RB_RPTR_ADDR_ADDR__SHIFT) & AXXX_CP_RB_RPTR_ADDR_ADDR__MASK; } diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/adreno_pm4.xml.h mesa-17.0.7/src/gallium/drivers/freedreno/adreno_pm4.xml.h --- mesa-12.0.6/src/gallium/drivers/freedreno/adreno_pm4.xml.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/adreno_pm4.xml.h 2017-06-01 10:37:10.000000000 +0000 @@ -8,13 +8,14 @@ git clone https://github.com/freedreno/envytools.git The rules-ng-ng source files this header was generated from are: -- /home/robclark/src/freedreno/envytools/rnndb/adreno.xml ( 398 bytes, from 2015-09-24 17:25:31) +- /home/robclark/src/freedreno/envytools/rnndb/adreno.xml ( 431 bytes, from 2016-04-26 17:56:44) - /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2016-02-10 17:07:21) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32901 bytes, from 2015-05-20 20:03:14) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 11518 bytes, from 2016-02-10 21:03:25) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 16185 bytes, from 2016-03-05 03:08:05) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83967 bytes, from 2016-02-10 17:07:21) -- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 110685 bytes, from 2016-04-25 17:56:43) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 32907 bytes, from 2016-11-26 23:01:08) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 12025 bytes, from 2016-11-26 23:01:08) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 23277 bytes, from 2016-12-24 05:01:47) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2016-11-26 23:01:08) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 110757 bytes, from 2016-12-26 17:51:07) +- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 100594 bytes, from 2017-01-20 23:03:30) - /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2015-09-24 17:30:00) Copyright (C) 2013-2016 by the following authors: @@ -58,6 +59,7 @@ RST_PIX_CNT = 13, RST_VTX_CNT = 14, TILE_FLUSH = 15, + STAT_EVENT = 16, CACHE_FLUSH_AND_INV_TS_EVENT = 20, ZPASS_DONE = 21, CACHE_FLUSH_AND_INV_EVENT = 22, @@ -65,6 +67,18 @@ PERFCOUNTER_STOP = 24, VS_FETCH_DONE = 27, FACENESS_FLUSH = 28, + FLUSH_SO_0 = 17, + FLUSH_SO_1 = 18, + FLUSH_SO_2 = 19, + FLUSH_SO_3 = 20, + UNK_19 = 25, + UNK_1C = 28, + UNK_1D = 29, + BLIT = 30, + UNK_25 = 37, + UNK_26 = 38, + UNK_2C = 44, + UNK_2D = 45, }; enum pc_di_primtype { @@ -82,7 +96,6 @@ DI_PT_LINESTRIP_ADJ = 11, DI_PT_TRI_ADJ = 12, DI_PT_TRISTRIP_ADJ = 13, - DI_PT_PATCHES = 34, }; enum pc_di_src_sel { @@ -110,11 +123,15 @@ CP_TYPE1_PKT = 0x40000000, CP_TYPE2_PKT = 0x80000000, CP_TYPE3_PKT = 0xc0000000, + CP_TYPE4_PKT = 0x40000000, + CP_TYPE7_PKT = 0x70000000, }; enum adreno_pm4_type3_packets { CP_ME_INIT = 72, CP_NOP = 16, + CP_PREEMPT_ENABLE = 28, + CP_PREEMPT_TOKEN = 30, CP_INDIRECT_BUFFER = 63, CP_INDIRECT_BUFFER_PFD = 55, CP_WAIT_FOR_IDLE = 38, @@ -163,6 +180,7 @@ CP_TEST_TWO_MEMS = 113, CP_REG_WR_NO_CTXT = 120, CP_RECORD_PFP_TIMESTAMP = 17, + CP_SET_SECURE_MODE = 102, CP_WAIT_FOR_ME = 19, CP_SET_DRAW_STATE = 67, CP_DRAW_INDX_OFFSET = 56, @@ -178,6 +196,23 @@ CP_WAIT_MEM_WRITES = 18, CP_COND_REG_EXEC = 71, CP_MEM_TO_REG = 66, + CP_EXEC_CS = 51, + CP_PERFCOUNTER_ACTION = 80, + CP_SMMU_TABLE_UPDATE = 83, + CP_CONTEXT_REG_BUNCH = 92, + CP_YIELD_ENABLE = 28, + CP_SKIP_IB2_ENABLE_GLOBAL = 29, + CP_SKIP_IB2_ENABLE_LOCAL = 35, + CP_SET_SUBDRAW_SIZE = 53, + CP_SET_VISIBILITY_OVERRIDE = 100, + CP_PREEMPT_ENABLE_GLOBAL = 105, + CP_PREEMPT_ENABLE_LOCAL = 106, + CP_CONTEXT_SWITCH_YIELD = 107, + CP_SET_RENDER_MODE = 108, + CP_COMPUTE_CHECKPOINT = 110, + CP_MEM_TO_MEM = 115, + CP_BLIT = 44, + CP_UNK_39 = 57, IN_IB_PREFETCH_END = 23, IN_SUBBLK_PREFETCH = 31, IN_INSTR_PREFETCH = 32, @@ -196,6 +231,7 @@ SB_VERT_SHADER = 4, SB_GEOM_SHADER = 5, SB_FRAG_SHADER = 6, + SB_COMPUTE_SHADER = 7, }; enum adreno_state_type { @@ -218,6 +254,18 @@ INDEX4_SIZE_32_BIT = 2, }; +enum render_mode_cmd { + BYPASS = 1, + BINNING = 2, + GMEM = 3, + BLIT2D = 5, +}; + +enum cp_blit_cmd { + BLIT_OP_FILL = 0, + BLIT_OP_COPY = 1, +}; + #define REG_CP_LOAD_STATE_0 0x00000000 #define CP_LOAD_STATE_0_DST_OFF__MASK 0x0000ffff #define CP_LOAD_STATE_0_DST_OFF__SHIFT 0 @@ -255,9 +303,18 @@ #define CP_LOAD_STATE_1_EXT_SRC_ADDR__SHIFT 2 static inline uint32_t CP_LOAD_STATE_1_EXT_SRC_ADDR(uint32_t val) { + assert(!(val & 0x3)); return ((val >> 2) << CP_LOAD_STATE_1_EXT_SRC_ADDR__SHIFT) & CP_LOAD_STATE_1_EXT_SRC_ADDR__MASK; } +#define REG_CP_LOAD_STATE_2 0x00000002 +#define CP_LOAD_STATE_2_EXT_SRC_ADDR_HI__MASK 0xffffffff +#define CP_LOAD_STATE_2_EXT_SRC_ADDR_HI__SHIFT 0 +static inline uint32_t CP_LOAD_STATE_2_EXT_SRC_ADDR_HI(uint32_t val) +{ + return ((val) << CP_LOAD_STATE_2_EXT_SRC_ADDR_HI__SHIFT) & CP_LOAD_STATE_2_EXT_SRC_ADDR_HI__MASK; +} + #define REG_CP_DRAW_INDX_0 0x00000000 #define CP_DRAW_INDX_0_VIZ_QUERY__MASK 0xffffffff #define CP_DRAW_INDX_0_VIZ_QUERY__SHIFT 0 @@ -442,30 +499,40 @@ return ((val) << CP_DRAW_INDX_OFFSET_5_INDX_SIZE__SHIFT) & CP_DRAW_INDX_OFFSET_5_INDX_SIZE__MASK; } -#define REG_CP_SET_DRAW_STATE_0 0x00000000 -#define CP_SET_DRAW_STATE_0_COUNT__MASK 0x0000ffff -#define CP_SET_DRAW_STATE_0_COUNT__SHIFT 0 -static inline uint32_t CP_SET_DRAW_STATE_0_COUNT(uint32_t val) -{ - return ((val) << CP_SET_DRAW_STATE_0_COUNT__SHIFT) & CP_SET_DRAW_STATE_0_COUNT__MASK; -} -#define CP_SET_DRAW_STATE_0_DIRTY 0x00010000 -#define CP_SET_DRAW_STATE_0_DISABLE 0x00020000 -#define CP_SET_DRAW_STATE_0_DISABLE_ALL_GROUPS 0x00040000 -#define CP_SET_DRAW_STATE_0_LOAD_IMMED 0x00080000 -#define CP_SET_DRAW_STATE_0_GROUP_ID__MASK 0x1f000000 -#define CP_SET_DRAW_STATE_0_GROUP_ID__SHIFT 24 -static inline uint32_t CP_SET_DRAW_STATE_0_GROUP_ID(uint32_t val) -{ - return ((val) << CP_SET_DRAW_STATE_0_GROUP_ID__SHIFT) & CP_SET_DRAW_STATE_0_GROUP_ID__MASK; -} - -#define REG_CP_SET_DRAW_STATE_1 0x00000001 -#define CP_SET_DRAW_STATE_1_ADDR__MASK 0xffffffff -#define CP_SET_DRAW_STATE_1_ADDR__SHIFT 0 -static inline uint32_t CP_SET_DRAW_STATE_1_ADDR(uint32_t val) +static inline uint32_t REG_CP_SET_DRAW_STATE_(uint32_t i0) { return 0x00000000 + 0x3*i0; } + +static inline uint32_t REG_CP_SET_DRAW_STATE__0(uint32_t i0) { return 0x00000000 + 0x3*i0; } +#define CP_SET_DRAW_STATE__0_COUNT__MASK 0x0000ffff +#define CP_SET_DRAW_STATE__0_COUNT__SHIFT 0 +static inline uint32_t CP_SET_DRAW_STATE__0_COUNT(uint32_t val) +{ + return ((val) << CP_SET_DRAW_STATE__0_COUNT__SHIFT) & CP_SET_DRAW_STATE__0_COUNT__MASK; +} +#define CP_SET_DRAW_STATE__0_DIRTY 0x00010000 +#define CP_SET_DRAW_STATE__0_DISABLE 0x00020000 +#define CP_SET_DRAW_STATE__0_DISABLE_ALL_GROUPS 0x00040000 +#define CP_SET_DRAW_STATE__0_LOAD_IMMED 0x00080000 +#define CP_SET_DRAW_STATE__0_GROUP_ID__MASK 0x1f000000 +#define CP_SET_DRAW_STATE__0_GROUP_ID__SHIFT 24 +static inline uint32_t CP_SET_DRAW_STATE__0_GROUP_ID(uint32_t val) +{ + return ((val) << CP_SET_DRAW_STATE__0_GROUP_ID__SHIFT) & CP_SET_DRAW_STATE__0_GROUP_ID__MASK; +} + +static inline uint32_t REG_CP_SET_DRAW_STATE__1(uint32_t i0) { return 0x00000001 + 0x3*i0; } +#define CP_SET_DRAW_STATE__1_ADDR_LO__MASK 0xffffffff +#define CP_SET_DRAW_STATE__1_ADDR_LO__SHIFT 0 +static inline uint32_t CP_SET_DRAW_STATE__1_ADDR_LO(uint32_t val) +{ + return ((val) << CP_SET_DRAW_STATE__1_ADDR_LO__SHIFT) & CP_SET_DRAW_STATE__1_ADDR_LO__MASK; +} + +static inline uint32_t REG_CP_SET_DRAW_STATE__2(uint32_t i0) { return 0x00000002 + 0x3*i0; } +#define CP_SET_DRAW_STATE__2_ADDR_HI__MASK 0xffffffff +#define CP_SET_DRAW_STATE__2_ADDR_HI__SHIFT 0 +static inline uint32_t CP_SET_DRAW_STATE__2_ADDR_HI(uint32_t val) { - return ((val) << CP_SET_DRAW_STATE_1_ADDR__SHIFT) & CP_SET_DRAW_STATE_1_ADDR__MASK; + return ((val) << CP_SET_DRAW_STATE__2_ADDR_HI__SHIFT) & CP_SET_DRAW_STATE__2_ADDR_HI__MASK; } #define REG_CP_SET_BIN_0 0x00000000 @@ -538,5 +605,192 @@ return ((val) << CP_REG_TO_MEM_1_DEST__SHIFT) & CP_REG_TO_MEM_1_DEST__MASK; } +#define REG_CP_DISPATCH_COMPUTE_0 0x00000000 + +#define REG_CP_DISPATCH_COMPUTE_1 0x00000001 +#define CP_DISPATCH_COMPUTE_1_X__MASK 0xffffffff +#define CP_DISPATCH_COMPUTE_1_X__SHIFT 0 +static inline uint32_t CP_DISPATCH_COMPUTE_1_X(uint32_t val) +{ + return ((val) << CP_DISPATCH_COMPUTE_1_X__SHIFT) & CP_DISPATCH_COMPUTE_1_X__MASK; +} + +#define REG_CP_DISPATCH_COMPUTE_2 0x00000002 +#define CP_DISPATCH_COMPUTE_2_Y__MASK 0xffffffff +#define CP_DISPATCH_COMPUTE_2_Y__SHIFT 0 +static inline uint32_t CP_DISPATCH_COMPUTE_2_Y(uint32_t val) +{ + return ((val) << CP_DISPATCH_COMPUTE_2_Y__SHIFT) & CP_DISPATCH_COMPUTE_2_Y__MASK; +} + +#define REG_CP_DISPATCH_COMPUTE_3 0x00000003 +#define CP_DISPATCH_COMPUTE_3_Z__MASK 0xffffffff +#define CP_DISPATCH_COMPUTE_3_Z__SHIFT 0 +static inline uint32_t CP_DISPATCH_COMPUTE_3_Z(uint32_t val) +{ + return ((val) << CP_DISPATCH_COMPUTE_3_Z__SHIFT) & CP_DISPATCH_COMPUTE_3_Z__MASK; +} + +#define REG_CP_SET_RENDER_MODE_0 0x00000000 +#define CP_SET_RENDER_MODE_0_MODE__MASK 0x000001ff +#define CP_SET_RENDER_MODE_0_MODE__SHIFT 0 +static inline uint32_t CP_SET_RENDER_MODE_0_MODE(enum render_mode_cmd val) +{ + return ((val) << CP_SET_RENDER_MODE_0_MODE__SHIFT) & CP_SET_RENDER_MODE_0_MODE__MASK; +} + +#define REG_CP_SET_RENDER_MODE_1 0x00000001 +#define CP_SET_RENDER_MODE_1_ADDR_0_LO__MASK 0xffffffff +#define CP_SET_RENDER_MODE_1_ADDR_0_LO__SHIFT 0 +static inline uint32_t CP_SET_RENDER_MODE_1_ADDR_0_LO(uint32_t val) +{ + return ((val) << CP_SET_RENDER_MODE_1_ADDR_0_LO__SHIFT) & CP_SET_RENDER_MODE_1_ADDR_0_LO__MASK; +} + +#define REG_CP_SET_RENDER_MODE_2 0x00000002 +#define CP_SET_RENDER_MODE_2_ADDR_0_HI__MASK 0xffffffff +#define CP_SET_RENDER_MODE_2_ADDR_0_HI__SHIFT 0 +static inline uint32_t CP_SET_RENDER_MODE_2_ADDR_0_HI(uint32_t val) +{ + return ((val) << CP_SET_RENDER_MODE_2_ADDR_0_HI__SHIFT) & CP_SET_RENDER_MODE_2_ADDR_0_HI__MASK; +} + +#define REG_CP_SET_RENDER_MODE_3 0x00000003 +#define CP_SET_RENDER_MODE_3_GMEM_ENABLE 0x00000010 + +#define REG_CP_SET_RENDER_MODE_4 0x00000004 + +#define REG_CP_SET_RENDER_MODE_5 0x00000005 +#define CP_SET_RENDER_MODE_5_ADDR_1_LEN__MASK 0xffffffff +#define CP_SET_RENDER_MODE_5_ADDR_1_LEN__SHIFT 0 +static inline uint32_t CP_SET_RENDER_MODE_5_ADDR_1_LEN(uint32_t val) +{ + return ((val) << CP_SET_RENDER_MODE_5_ADDR_1_LEN__SHIFT) & CP_SET_RENDER_MODE_5_ADDR_1_LEN__MASK; +} + +#define REG_CP_SET_RENDER_MODE_6 0x00000006 +#define CP_SET_RENDER_MODE_6_ADDR_1_LO__MASK 0xffffffff +#define CP_SET_RENDER_MODE_6_ADDR_1_LO__SHIFT 0 +static inline uint32_t CP_SET_RENDER_MODE_6_ADDR_1_LO(uint32_t val) +{ + return ((val) << CP_SET_RENDER_MODE_6_ADDR_1_LO__SHIFT) & CP_SET_RENDER_MODE_6_ADDR_1_LO__MASK; +} + +#define REG_CP_SET_RENDER_MODE_7 0x00000007 +#define CP_SET_RENDER_MODE_7_ADDR_1_HI__MASK 0xffffffff +#define CP_SET_RENDER_MODE_7_ADDR_1_HI__SHIFT 0 +static inline uint32_t CP_SET_RENDER_MODE_7_ADDR_1_HI(uint32_t val) +{ + return ((val) << CP_SET_RENDER_MODE_7_ADDR_1_HI__SHIFT) & CP_SET_RENDER_MODE_7_ADDR_1_HI__MASK; +} + +#define REG_CP_PERFCOUNTER_ACTION_0 0x00000000 + +#define REG_CP_PERFCOUNTER_ACTION_1 0x00000001 +#define CP_PERFCOUNTER_ACTION_1_ADDR_0_LO__MASK 0xffffffff +#define CP_PERFCOUNTER_ACTION_1_ADDR_0_LO__SHIFT 0 +static inline uint32_t CP_PERFCOUNTER_ACTION_1_ADDR_0_LO(uint32_t val) +{ + return ((val) << CP_PERFCOUNTER_ACTION_1_ADDR_0_LO__SHIFT) & CP_PERFCOUNTER_ACTION_1_ADDR_0_LO__MASK; +} + +#define REG_CP_PERFCOUNTER_ACTION_2 0x00000002 +#define CP_PERFCOUNTER_ACTION_2_ADDR_0_HI__MASK 0xffffffff +#define CP_PERFCOUNTER_ACTION_2_ADDR_0_HI__SHIFT 0 +static inline uint32_t CP_PERFCOUNTER_ACTION_2_ADDR_0_HI(uint32_t val) +{ + return ((val) << CP_PERFCOUNTER_ACTION_2_ADDR_0_HI__SHIFT) & CP_PERFCOUNTER_ACTION_2_ADDR_0_HI__MASK; +} + +#define REG_CP_EVENT_WRITE_0 0x00000000 +#define CP_EVENT_WRITE_0_EVENT__MASK 0x000000ff +#define CP_EVENT_WRITE_0_EVENT__SHIFT 0 +static inline uint32_t CP_EVENT_WRITE_0_EVENT(enum vgt_event_type val) +{ + return ((val) << CP_EVENT_WRITE_0_EVENT__SHIFT) & CP_EVENT_WRITE_0_EVENT__MASK; +} + +#define REG_CP_EVENT_WRITE_1 0x00000001 +#define CP_EVENT_WRITE_1_ADDR_0_LO__MASK 0xffffffff +#define CP_EVENT_WRITE_1_ADDR_0_LO__SHIFT 0 +static inline uint32_t CP_EVENT_WRITE_1_ADDR_0_LO(uint32_t val) +{ + return ((val) << CP_EVENT_WRITE_1_ADDR_0_LO__SHIFT) & CP_EVENT_WRITE_1_ADDR_0_LO__MASK; +} + +#define REG_CP_EVENT_WRITE_2 0x00000002 +#define CP_EVENT_WRITE_2_ADDR_0_HI__MASK 0xffffffff +#define CP_EVENT_WRITE_2_ADDR_0_HI__SHIFT 0 +static inline uint32_t CP_EVENT_WRITE_2_ADDR_0_HI(uint32_t val) +{ + return ((val) << CP_EVENT_WRITE_2_ADDR_0_HI__SHIFT) & CP_EVENT_WRITE_2_ADDR_0_HI__MASK; +} + +#define REG_CP_EVENT_WRITE_3 0x00000003 + +#define REG_CP_BLIT_0 0x00000000 +#define CP_BLIT_0_OP__MASK 0x0000000f +#define CP_BLIT_0_OP__SHIFT 0 +static inline uint32_t CP_BLIT_0_OP(enum cp_blit_cmd val) +{ + return ((val) << CP_BLIT_0_OP__SHIFT) & CP_BLIT_0_OP__MASK; +} + +#define REG_CP_BLIT_1 0x00000001 +#define CP_BLIT_1_SRC_X1__MASK 0x0000ffff +#define CP_BLIT_1_SRC_X1__SHIFT 0 +static inline uint32_t CP_BLIT_1_SRC_X1(uint32_t val) +{ + return ((val) << CP_BLIT_1_SRC_X1__SHIFT) & CP_BLIT_1_SRC_X1__MASK; +} +#define CP_BLIT_1_SRC_Y1__MASK 0xffff0000 +#define CP_BLIT_1_SRC_Y1__SHIFT 16 +static inline uint32_t CP_BLIT_1_SRC_Y1(uint32_t val) +{ + return ((val) << CP_BLIT_1_SRC_Y1__SHIFT) & CP_BLIT_1_SRC_Y1__MASK; +} + +#define REG_CP_BLIT_2 0x00000002 +#define CP_BLIT_2_SRC_X2__MASK 0x0000ffff +#define CP_BLIT_2_SRC_X2__SHIFT 0 +static inline uint32_t CP_BLIT_2_SRC_X2(uint32_t val) +{ + return ((val) << CP_BLIT_2_SRC_X2__SHIFT) & CP_BLIT_2_SRC_X2__MASK; +} +#define CP_BLIT_2_SRC_Y2__MASK 0xffff0000 +#define CP_BLIT_2_SRC_Y2__SHIFT 16 +static inline uint32_t CP_BLIT_2_SRC_Y2(uint32_t val) +{ + return ((val) << CP_BLIT_2_SRC_Y2__SHIFT) & CP_BLIT_2_SRC_Y2__MASK; +} + +#define REG_CP_BLIT_3 0x00000003 +#define CP_BLIT_3_DST_X1__MASK 0x0000ffff +#define CP_BLIT_3_DST_X1__SHIFT 0 +static inline uint32_t CP_BLIT_3_DST_X1(uint32_t val) +{ + return ((val) << CP_BLIT_3_DST_X1__SHIFT) & CP_BLIT_3_DST_X1__MASK; +} +#define CP_BLIT_3_DST_Y1__MASK 0xffff0000 +#define CP_BLIT_3_DST_Y1__SHIFT 16 +static inline uint32_t CP_BLIT_3_DST_Y1(uint32_t val) +{ + return ((val) << CP_BLIT_3_DST_Y1__SHIFT) & CP_BLIT_3_DST_Y1__MASK; +} + +#define REG_CP_BLIT_4 0x00000004 +#define CP_BLIT_4_DST_X2__MASK 0x0000ffff +#define CP_BLIT_4_DST_X2__SHIFT 0 +static inline uint32_t CP_BLIT_4_DST_X2(uint32_t val) +{ + return ((val) << CP_BLIT_4_DST_X2__SHIFT) & CP_BLIT_4_DST_X2__MASK; +} +#define CP_BLIT_4_DST_Y2__MASK 0xffff0000 +#define CP_BLIT_4_DST_Y2__SHIFT 16 +static inline uint32_t CP_BLIT_4_DST_Y2(uint32_t val) +{ + return ((val) << CP_BLIT_4_DST_Y2__SHIFT) & CP_BLIT_4_DST_Y2__MASK; +} + #endif /* ADRENO_PM4_XML */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_batch.c mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_batch.c --- mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_batch.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_batch.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,424 @@ +/* + * Copyright (C) 2016 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#include "util/list.h" +#include "util/set.h" +#include "util/hash_table.h" +#include "util/u_string.h" + +#include "freedreno_batch.h" +#include "freedreno_context.h" +#include "freedreno_resource.h" +#include "freedreno_query_hw.h" + +static void +batch_init(struct fd_batch *batch) +{ + struct fd_context *ctx = batch->ctx; + unsigned size = 0; + + if (ctx->screen->reorder) + util_queue_fence_init(&batch->flush_fence); + + /* if kernel is too old to support unlimited # of cmd buffers, we + * have no option but to allocate large worst-case sizes so that + * we don't need to grow the ringbuffer. Performance is likely to + * suffer, but there is no good alternative. + */ + if ((fd_device_version(ctx->screen->dev) < FD_VERSION_UNLIMITED_CMDS) || + (fd_mesa_debug & FD_DBG_NOGROW)){ + size = 0x100000; + } + + batch->draw = fd_ringbuffer_new(ctx->screen->pipe, size); + batch->binning = fd_ringbuffer_new(ctx->screen->pipe, size); + batch->gmem = fd_ringbuffer_new(ctx->screen->pipe, size); + + fd_ringbuffer_set_parent(batch->gmem, NULL); + fd_ringbuffer_set_parent(batch->draw, batch->gmem); + fd_ringbuffer_set_parent(batch->binning, batch->gmem); + + batch->in_fence_fd = -1; + + batch->cleared = batch->partial_cleared = 0; + batch->restore = batch->resolve = 0; + batch->needs_flush = false; + batch->gmem_reason = 0; + batch->num_draws = 0; + batch->stage = FD_STAGE_NULL; + + fd_reset_wfi(batch); + + /* reset maximal bounds: */ + batch->max_scissor.minx = batch->max_scissor.miny = ~0; + batch->max_scissor.maxx = batch->max_scissor.maxy = 0; + + util_dynarray_init(&batch->draw_patches); + + if (is_a3xx(ctx->screen)) + util_dynarray_init(&batch->rbrc_patches); + + assert(batch->resources->entries == 0); + + util_dynarray_init(&batch->samples); +} + +struct fd_batch * +fd_batch_create(struct fd_context *ctx) +{ + struct fd_batch *batch = CALLOC_STRUCT(fd_batch); + + if (!batch) + return NULL; + + DBG("%p", batch); + + pipe_reference_init(&batch->reference, 1); + batch->ctx = ctx; + + batch->resources = _mesa_set_create(NULL, _mesa_hash_pointer, + _mesa_key_pointer_equal); + + batch_init(batch); + + return batch; +} + +static void +batch_fini(struct fd_batch *batch) +{ + pipe_resource_reference(&batch->query_buf, NULL); + + if (batch->in_fence_fd != -1) + close(batch->in_fence_fd); + + fd_ringbuffer_del(batch->draw); + fd_ringbuffer_del(batch->binning); + fd_ringbuffer_del(batch->gmem); + + util_dynarray_fini(&batch->draw_patches); + + if (is_a3xx(batch->ctx->screen)) + util_dynarray_fini(&batch->rbrc_patches); + + while (batch->samples.size > 0) { + struct fd_hw_sample *samp = + util_dynarray_pop(&batch->samples, struct fd_hw_sample *); + fd_hw_sample_reference(batch->ctx, &samp, NULL); + } + util_dynarray_fini(&batch->samples); + + if (batch->ctx->screen->reorder) + util_queue_fence_destroy(&batch->flush_fence); +} + +static void +batch_flush_reset_dependencies(struct fd_batch *batch, bool flush) +{ + struct fd_batch_cache *cache = &batch->ctx->screen->batch_cache; + struct fd_batch *dep; + + foreach_batch(dep, cache, batch->dependents_mask) { + if (flush) + fd_batch_flush(dep, false); + fd_batch_reference(&dep, NULL); + } + + batch->dependents_mask = 0; +} + +static void +batch_reset_resources_locked(struct fd_batch *batch) +{ + struct set_entry *entry; + + pipe_mutex_assert_locked(batch->ctx->screen->lock); + + set_foreach(batch->resources, entry) { + struct fd_resource *rsc = (struct fd_resource *)entry->key; + _mesa_set_remove(batch->resources, entry); + debug_assert(rsc->batch_mask & (1 << batch->idx)); + rsc->batch_mask &= ~(1 << batch->idx); + if (rsc->write_batch == batch) + fd_batch_reference_locked(&rsc->write_batch, NULL); + } +} + +static void +batch_reset_resources(struct fd_batch *batch) +{ + pipe_mutex_lock(batch->ctx->screen->lock); + batch_reset_resources_locked(batch); + pipe_mutex_unlock(batch->ctx->screen->lock); +} + +static void +batch_reset(struct fd_batch *batch) +{ + DBG("%p", batch); + + fd_batch_sync(batch); + + batch_flush_reset_dependencies(batch, false); + batch_reset_resources(batch); + + batch_fini(batch); + batch_init(batch); +} + +void +fd_batch_reset(struct fd_batch *batch) +{ + if (batch->needs_flush) + batch_reset(batch); +} + +void +__fd_batch_destroy(struct fd_batch *batch) +{ + DBG("%p", batch); + + util_copy_framebuffer_state(&batch->framebuffer, NULL); + + pipe_mutex_lock(batch->ctx->screen->lock); + fd_bc_invalidate_batch(batch, true); + pipe_mutex_unlock(batch->ctx->screen->lock); + + batch_fini(batch); + + batch_reset_resources(batch); + debug_assert(batch->resources->entries == 0); + _mesa_set_destroy(batch->resources, NULL); + + batch_flush_reset_dependencies(batch, false); + debug_assert(batch->dependents_mask == 0); + + free(batch); +} + +void +__fd_batch_describe(char* buf, const struct fd_batch *batch) +{ + util_sprintf(buf, "fd_batch<%u>", batch->seqno); +} + +void +fd_batch_sync(struct fd_batch *batch) +{ + if (!batch->ctx->screen->reorder) + return; + util_queue_job_wait(&batch->flush_fence); +} + +static void +batch_flush_func(void *job, int id) +{ + struct fd_batch *batch = job; + + fd_gmem_render_tiles(batch); + batch_reset_resources(batch); +} + +static void +batch_cleanup_func(void *job, int id) +{ + struct fd_batch *batch = job; + fd_batch_reference(&batch, NULL); +} + +static void +batch_flush(struct fd_batch *batch) +{ + DBG("%p: needs_flush=%d", batch, batch->needs_flush); + + if (!batch->needs_flush) + return; + + batch->needs_flush = false; + + /* close out the draw cmds by making sure any active queries are + * paused: + */ + fd_hw_query_set_stage(batch, batch->draw, FD_STAGE_NULL); + + batch->ctx->dirty = ~0; + batch_flush_reset_dependencies(batch, true); + + if (batch->ctx->screen->reorder) { + struct fd_batch *tmp = NULL; + fd_batch_reference(&tmp, batch); + + if (!util_queue_is_initialized(&batch->ctx->flush_queue)) + util_queue_init(&batch->ctx->flush_queue, "flush_queue", 16, 1); + + util_queue_add_job(&batch->ctx->flush_queue, + batch, &batch->flush_fence, + batch_flush_func, batch_cleanup_func); + } else { + fd_gmem_render_tiles(batch); + batch_reset_resources(batch); + } + + debug_assert(batch->reference.count > 0); + + if (batch == batch->ctx->batch) { + batch_reset(batch); + } else { + pipe_mutex_lock(batch->ctx->screen->lock); + fd_bc_invalidate_batch(batch, false); + pipe_mutex_unlock(batch->ctx->screen->lock); + } +} + +/* NOTE: could drop the last ref to batch */ +void +fd_batch_flush(struct fd_batch *batch, bool sync) +{ + /* NOTE: we need to hold an extra ref across the body of flush, + * since the last ref to this batch could be dropped when cleaning + * up used_resources + */ + struct fd_batch *tmp = NULL; + fd_batch_reference(&tmp, batch); + batch_flush(tmp); + if (sync) + fd_batch_sync(tmp); + fd_batch_reference(&tmp, NULL); +} + +/* does 'batch' depend directly or indirectly on 'other' ? */ +static bool +batch_depends_on(struct fd_batch *batch, struct fd_batch *other) +{ + struct fd_batch_cache *cache = &batch->ctx->screen->batch_cache; + struct fd_batch *dep; + + if (batch->dependents_mask & (1 << other->idx)) + return true; + + foreach_batch(dep, cache, batch->dependents_mask) + if (batch_depends_on(batch, dep)) + return true; + + return false; +} + +static void +batch_add_dep(struct fd_batch *batch, struct fd_batch *dep) +{ + if (batch->dependents_mask & (1 << dep->idx)) + return; + + /* if the new depedency already depends on us, we need to flush + * to avoid a loop in the dependency graph. + */ + if (batch_depends_on(dep, batch)) { + DBG("%p: flush forced on %p!", batch, dep); + pipe_mutex_unlock(batch->ctx->screen->lock); + fd_batch_flush(dep, false); + pipe_mutex_lock(batch->ctx->screen->lock); + } else { + struct fd_batch *other = NULL; + fd_batch_reference_locked(&other, dep); + batch->dependents_mask |= (1 << dep->idx); + DBG("%p: added dependency on %p", batch, dep); + } +} + +void +fd_batch_resource_used(struct fd_batch *batch, struct fd_resource *rsc, bool write) +{ + pipe_mutex_assert_locked(batch->ctx->screen->lock); + + if (rsc->stencil) + fd_batch_resource_used(batch, rsc->stencil, write); + + DBG("%p: %s %p", batch, write ? "write" : "read", rsc); + + /* note, invalidate write batch, to avoid further writes to rsc + * resulting in a write-after-read hazard. + */ + + if (write) { + /* if we are pending read or write by any other batch: */ + if (rsc->batch_mask != (1 << batch->idx)) { + struct fd_batch_cache *cache = &batch->ctx->screen->batch_cache; + struct fd_batch *dep; + foreach_batch(dep, cache, rsc->batch_mask) { + struct fd_batch *b = NULL; + /* note that batch_add_dep could flush and unref dep, so + * we need to hold a reference to keep it live for the + * fd_bc_invalidate_batch() + */ + fd_batch_reference(&b, dep); + batch_add_dep(batch, b); + fd_bc_invalidate_batch(b, false); + fd_batch_reference_locked(&b, NULL); + } + } + fd_batch_reference_locked(&rsc->write_batch, batch); + } else { + if (rsc->write_batch) { + batch_add_dep(batch, rsc->write_batch); + fd_bc_invalidate_batch(rsc->write_batch, false); + } + } + + if (rsc->batch_mask & (1 << batch->idx)) + return; + + debug_assert(!_mesa_set_search(batch->resources, rsc)); + + _mesa_set_add(batch->resources, rsc); + rsc->batch_mask |= (1 << batch->idx); +} + +void +fd_batch_check_size(struct fd_batch *batch) +{ + if (fd_device_version(batch->ctx->screen->dev) >= FD_VERSION_UNLIMITED_CMDS) + return; + + struct fd_ringbuffer *ring = batch->draw; + if (((ring->cur - ring->start) > (ring->size/4 - 0x1000)) || + (fd_mesa_debug & FD_DBG_FLUSH)) + fd_batch_flush(batch, true); +} + +/* emit a WAIT_FOR_IDLE only if needed, ie. if there has not already + * been one since last draw: + */ +void +fd_wfi(struct fd_batch *batch, struct fd_ringbuffer *ring) +{ + if (batch->needs_wfi) { + if (batch->ctx->screen->gpu_id >= 500) + OUT_WFI5(ring); + else + OUT_WFI(ring); + batch->needs_wfi = false; + } +} diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_batch_cache.c mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_batch_cache.c --- mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_batch_cache.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_batch_cache.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,389 @@ +/* + * Copyright (C) 2016 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#include "util/hash_table.h" +#include "util/set.h" +#include "util/list.h" +#include "util/u_string.h" + +#include "freedreno_batch.h" +#include "freedreno_batch_cache.h" +#include "freedreno_context.h" +#include "freedreno_resource.h" + +/* Overview: + * + * The batch cache provides lookup for mapping pipe_framebuffer_state + * to a batch. + * + * It does this via hashtable, with key that roughly matches the + * pipe_framebuffer_state, as described below. + * + * Batch Cache hashtable key: + * + * To serialize the key, and to avoid dealing with holding a reference to + * pipe_surface's (which hold a reference to pipe_resource and complicate + * the whole refcnting thing), the key is variable length and inline's the + * pertinent details of the pipe_surface. + * + * Batch: + * + * Each batch needs to hold a reference to each resource it depends on (ie. + * anything that needs a mem2gmem). And a weak reference to resources it + * renders to. (If both src[n] and dst[n] are not NULL then they are the + * same.) + * + * When a resource is destroyed, we need to remove entries in the batch + * cache that reference the resource, to avoid dangling pointer issues. + * So each resource holds a hashset of batches which have reference them + * in their hashtable key. + * + * When a batch has weak reference to no more resources (ie. all the + * surfaces it rendered to are destroyed) the batch can be destroyed. + * Could happen in an app that renders and never uses the result. More + * common scenario, I think, will be that some, but not all, of the + * surfaces are destroyed before the batch is submitted. + * + * If (for example), batch writes to zsbuf but that surface is destroyed + * before batch is submitted, we can skip gmem2mem (but still need to + * alloc gmem space as before. If the batch depended on previous contents + * of that surface, it would be holding a reference so the surface would + * not have been destroyed. + */ + +struct key { + uint32_t width, height, layers; + uint16_t samples, num_surfs; + struct fd_context *ctx; + struct { + struct pipe_resource *texture; + union pipe_surface_desc u; + uint16_t pos, format; + } surf[0]; +}; + +static struct key * +key_alloc(unsigned num_surfs) +{ + struct key *key = + CALLOC_VARIANT_LENGTH_STRUCT(key, sizeof(key->surf[0]) * num_surfs); + return key; +} + +static uint32_t +key_hash(const void *_key) +{ + const struct key *key = _key; + uint32_t hash = _mesa_fnv32_1a_offset_bias; + hash = _mesa_fnv32_1a_accumulate_block(hash, key, offsetof(struct key, surf[0])); + hash = _mesa_fnv32_1a_accumulate_block(hash, key->surf, sizeof(key->surf[0]) * key->num_surfs); + return hash; +} + +static bool +key_equals(const void *_a, const void *_b) +{ + const struct key *a = _a; + const struct key *b = _b; + return (memcmp(a, b, offsetof(struct key, surf[0])) == 0) && + (memcmp(a->surf, b->surf, sizeof(a->surf[0]) * a->num_surfs) == 0); +} + +void +fd_bc_init(struct fd_batch_cache *cache) +{ + cache->ht = _mesa_hash_table_create(NULL, key_hash, key_equals); +} + +void +fd_bc_fini(struct fd_batch_cache *cache) +{ + _mesa_hash_table_destroy(cache->ht, NULL); +} + +void +fd_bc_flush(struct fd_batch_cache *cache, struct fd_context *ctx) +{ + struct hash_entry *entry; + struct fd_batch *last_batch = NULL; + + pipe_mutex_lock(ctx->screen->lock); + + hash_table_foreach(cache->ht, entry) { + struct fd_batch *batch = NULL; + fd_batch_reference_locked(&batch, (struct fd_batch *)entry->data); + if (batch->ctx == ctx) { + pipe_mutex_unlock(ctx->screen->lock); + fd_batch_reference(&last_batch, batch); + fd_batch_flush(batch, false); + pipe_mutex_lock(ctx->screen->lock); + } + fd_batch_reference_locked(&batch, NULL); + } + + pipe_mutex_unlock(ctx->screen->lock); + + if (last_batch) { + fd_batch_sync(last_batch); + fd_batch_reference(&last_batch, NULL); + } +} + +void +fd_bc_invalidate_context(struct fd_context *ctx) +{ + struct fd_batch_cache *cache = &ctx->screen->batch_cache; + struct fd_batch *batch; + + pipe_mutex_lock(ctx->screen->lock); + + foreach_batch(batch, cache, cache->batch_mask) { + if (batch->ctx == ctx) + fd_batch_reference_locked(&batch, NULL); + } + + pipe_mutex_unlock(ctx->screen->lock); +} + +void +fd_bc_invalidate_batch(struct fd_batch *batch, bool destroy) +{ + if (!batch) + return; + + struct fd_batch_cache *cache = &batch->ctx->screen->batch_cache; + struct key *key = (struct key *)batch->key; + + pipe_mutex_assert_locked(batch->ctx->screen->lock); + + if (destroy) { + cache->batches[batch->idx] = NULL; + cache->batch_mask &= ~(1 << batch->idx); + } + + if (!key) + return; + + DBG("%p: key=%p", batch, batch->key); + for (unsigned idx = 0; idx < key->num_surfs; idx++) { + struct fd_resource *rsc = fd_resource(key->surf[idx].texture); + rsc->bc_batch_mask &= ~(1 << batch->idx); + } + + struct hash_entry *entry = + _mesa_hash_table_search_pre_hashed(cache->ht, batch->hash, key); + _mesa_hash_table_remove(cache->ht, entry); + + batch->key = NULL; + free(key); +} + +void +fd_bc_invalidate_resource(struct fd_resource *rsc, bool destroy) +{ + struct fd_screen *screen = fd_screen(rsc->base.b.screen); + struct fd_batch *batch; + + pipe_mutex_lock(screen->lock); + + if (destroy) { + foreach_batch(batch, &screen->batch_cache, rsc->batch_mask) { + struct set_entry *entry = _mesa_set_search(batch->resources, rsc); + _mesa_set_remove(batch->resources, entry); + } + rsc->batch_mask = 0; + + fd_batch_reference_locked(&rsc->write_batch, NULL); + } + + foreach_batch(batch, &screen->batch_cache, rsc->bc_batch_mask) + fd_bc_invalidate_batch(batch, false); + + rsc->bc_batch_mask = 0; + + pipe_mutex_unlock(screen->lock); +} + +struct fd_batch * +fd_bc_alloc_batch(struct fd_batch_cache *cache, struct fd_context *ctx) +{ + struct fd_batch *batch; + uint32_t idx; + + pipe_mutex_lock(ctx->screen->lock); + + while ((idx = ffs(~cache->batch_mask)) == 0) { +#if 0 + for (unsigned i = 0; i < ARRAY_SIZE(cache->batches); i++) { + batch = cache->batches[i]; + debug_printf("%d: needs_flush=%d, depends:", batch->idx, batch->needs_flush); + struct set_entry *entry; + set_foreach(batch->dependencies, entry) { + struct fd_batch *dep = (struct fd_batch *)entry->key; + debug_printf(" %d", dep->idx); + } + debug_printf("\n"); + } +#endif + /* TODO: is LRU the better policy? Or perhaps the batch that + * depends on the fewest other batches? + */ + struct fd_batch *flush_batch = NULL; + for (unsigned i = 0; i < ARRAY_SIZE(cache->batches); i++) { + if ((cache->batches[i] == ctx->batch) || + !cache->batches[i]->needs_flush) + continue; + if (!flush_batch || (cache->batches[i]->seqno < flush_batch->seqno)) + fd_batch_reference_locked(&flush_batch, cache->batches[i]); + } + + /* we can drop lock temporarily here, since we hold a ref, + * flush_batch won't disappear under us. + */ + pipe_mutex_unlock(ctx->screen->lock); + DBG("%p: too many batches! flush forced!", flush_batch); + fd_batch_flush(flush_batch, true); + pipe_mutex_lock(ctx->screen->lock); + + /* While the resources get cleaned up automatically, the flush_batch + * doesn't get removed from the dependencies of other batches, so + * it won't be unref'd and will remain in the table. + * + * TODO maybe keep a bitmask of batches that depend on me, to make + * this easier: + */ + for (unsigned i = 0; i < ARRAY_SIZE(cache->batches); i++) { + struct fd_batch *other = cache->batches[i]; + if (!other) + continue; + if (other->dependents_mask & (1 << flush_batch->idx)) { + other->dependents_mask &= ~(1 << flush_batch->idx); + struct fd_batch *ref = flush_batch; + fd_batch_reference_locked(&ref, NULL); + } + } + + fd_batch_reference_locked(&flush_batch, NULL); + } + + idx--; /* bit zero returns 1 for ffs() */ + + batch = fd_batch_create(ctx); + if (!batch) + goto out; + + batch->seqno = cache->cnt++; + batch->idx = idx; + cache->batch_mask |= (1 << idx); + + debug_assert(cache->batches[idx] == NULL); + cache->batches[idx] = batch; + +out: + pipe_mutex_unlock(ctx->screen->lock); + + return batch; +} + +static struct fd_batch * +batch_from_key(struct fd_batch_cache *cache, struct key *key, + struct fd_context *ctx) +{ + struct fd_batch *batch = NULL; + uint32_t hash = key_hash(key); + struct hash_entry *entry = + _mesa_hash_table_search_pre_hashed(cache->ht, hash, key); + + if (entry) { + free(key); + fd_batch_reference(&batch, (struct fd_batch *)entry->data); + return batch; + } + + batch = fd_bc_alloc_batch(cache, ctx); +#ifdef DEBUG + DBG("%p: hash=0x%08x, %ux%u, %u layers, %u samples", batch, hash, + key->width, key->height, key->layers, key->samples); + for (unsigned idx = 0; idx < key->num_surfs; idx++) { + DBG("%p: surf[%u]: %p (%s) (%u,%u / %u,%u,%u)", batch, key->surf[idx].pos, + key->surf[idx].texture, util_format_name(key->surf[idx].format), + key->surf[idx].u.buf.first_element, key->surf[idx].u.buf.last_element, + key->surf[idx].u.tex.first_layer, key->surf[idx].u.tex.last_layer, + key->surf[idx].u.tex.level); + } +#endif + if (!batch) + return NULL; + + pipe_mutex_lock(ctx->screen->lock); + + _mesa_hash_table_insert_pre_hashed(cache->ht, hash, key, batch); + batch->key = key; + batch->hash = hash; + + for (unsigned idx = 0; idx < key->num_surfs; idx++) { + struct fd_resource *rsc = fd_resource(key->surf[idx].texture); + rsc->bc_batch_mask = (1 << batch->idx); + } + + pipe_mutex_unlock(ctx->screen->lock); + + return batch; +} + +static void +key_surf(struct key *key, unsigned idx, unsigned pos, struct pipe_surface *psurf) +{ + key->surf[idx].texture = psurf->texture; + key->surf[idx].u = psurf->u; + key->surf[idx].pos = pos; + key->surf[idx].format = psurf->format; +} + +struct fd_batch * +fd_batch_from_fb(struct fd_batch_cache *cache, struct fd_context *ctx, + const struct pipe_framebuffer_state *pfb) +{ + unsigned idx = 0, n = pfb->nr_cbufs + (pfb->zsbuf ? 1 : 0); + struct key *key = key_alloc(n); + + key->width = pfb->width; + key->height = pfb->height; + key->layers = pfb->layers; + key->samples = pfb->samples; + key->ctx = ctx; + + if (pfb->zsbuf) + key_surf(key, idx++, 0, pfb->zsbuf); + + for (unsigned i = 0; i < pfb->nr_cbufs; i++) + if (pfb->cbufs[i]) + key_surf(key, idx++, i + 1, pfb->cbufs[i]); + + key->num_surfs = idx; + + return batch_from_key(cache, key, ctx); +} diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_batch_cache.h mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_batch_cache.h --- mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_batch_cache.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_batch_cache.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,75 @@ +/* + * Copyright (C) 2016 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#ifndef FREEDRENO_BATCH_CACHE_H_ +#define FREEDRENO_BATCH_CACHE_H_ + +#include "pipe/p_state.h" + +struct fd_resource; +struct fd_batch; +struct fd_context; + +struct hash_table; + +struct fd_batch_cache { + struct hash_table *ht; + unsigned cnt; + + /* set of active batches.. there is an upper limit on the number of + * in-flight batches, for two reasons: + * 1) to avoid big spikes in number of batches in edge cases, such as + * game startup (ie, lots of texture uploads, but no usages yet of + * the textures), etc. + * 2) so we can use a simple bitmask in fd_resource to track which + * batches have reference to the resource + */ + struct fd_batch *batches[32]; + uint32_t batch_mask; +}; + +/* note: if batches get unref'd in the body of the loop, they are removed + * from the various masks.. but since we copy the mask at the beginning of + * the loop into _m, we need the &= at the end of the loop to make sure + * we don't have stale bits in _m + */ +#define foreach_batch(batch, cache, mask) \ + for (uint32_t _m = (mask); _m && ((batch) = (cache)->batches[u_bit_scan(&_m)]); _m &= (mask)) + +void fd_bc_init(struct fd_batch_cache *cache); +void fd_bc_fini(struct fd_batch_cache *cache); + +void fd_bc_flush(struct fd_batch_cache *cache, struct fd_context *ctx); + +void fd_bc_invalidate_context(struct fd_context *ctx); +void fd_bc_invalidate_batch(struct fd_batch *batch, bool destroy); +void fd_bc_invalidate_resource(struct fd_resource *rsc, bool destroy); +struct fd_batch * fd_bc_alloc_batch(struct fd_batch_cache *cache, struct fd_context *ctx); + +struct fd_batch * fd_batch_from_fb(struct fd_batch_cache *cache, + struct fd_context *ctx, const struct pipe_framebuffer_state *pfb); + +#endif /* FREEDRENO_BATCH_CACHE_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_batch.h mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_batch.h --- mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_batch.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_batch.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,280 @@ +/* + * Copyright (C) 2016 Rob Clark + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Rob Clark + */ + +#ifndef FREEDRENO_BATCH_H_ +#define FREEDRENO_BATCH_H_ + +#include "util/u_inlines.h" +#include "util/u_queue.h" +#include "util/list.h" + +#include "freedreno_util.h" + +struct fd_context; +struct fd_resource; +enum fd_resource_status; + +/* Bitmask of stages in rendering that a particular query query is + * active. Queries will be automatically started/stopped (generating + * additional fd_hw_sample_period's) on entrance/exit from stages that + * are applicable to the query. + * + * NOTE: set the stage to NULL at end of IB to ensure no query is still + * active. Things aren't going to work out the way you want if a query + * is active across IB's (or between tile IB and draw IB) + */ +enum fd_render_stage { + FD_STAGE_NULL = 0x01, + FD_STAGE_DRAW = 0x02, + FD_STAGE_CLEAR = 0x04, + /* used for driver internal draws (ie. util_blitter_blit()): */ + FD_STAGE_BLIT = 0x08, + FD_STAGE_ALL = 0xff, +}; + +#define MAX_HW_SAMPLE_PROVIDERS 4 +struct fd_hw_sample_provider; +struct fd_hw_sample; + +/* A batch tracks everything about a cmdstream batch/submit, including the + * ringbuffers used for binning, draw, and gmem cmds, list of associated + * fd_resource-s, etc. + */ +struct fd_batch { + struct pipe_reference reference; + unsigned seqno; + unsigned idx; + + int in_fence_fd; + bool needs_out_fence_fd; + + struct fd_context *ctx; + + struct util_queue_fence flush_fence; + + /* do we need to mem2gmem before rendering. We don't, if for example, + * there was a glClear() that invalidated the entire previous buffer + * contents. Keep track of which buffer(s) are cleared, or needs + * restore. Masks of PIPE_CLEAR_* + * + * The 'cleared' bits will be set for buffers which are *entirely* + * cleared, and 'partial_cleared' bits will be set if you must + * check cleared_scissor. + */ + enum { + /* align bitmask values w/ PIPE_CLEAR_*.. since that is convenient.. */ + FD_BUFFER_COLOR = PIPE_CLEAR_COLOR, + FD_BUFFER_DEPTH = PIPE_CLEAR_DEPTH, + FD_BUFFER_STENCIL = PIPE_CLEAR_STENCIL, + FD_BUFFER_ALL = FD_BUFFER_COLOR | FD_BUFFER_DEPTH | FD_BUFFER_STENCIL, + } cleared, partial_cleared, restore, resolve; + + bool needs_flush : 1; + bool blit : 1; + bool back_blit : 1; /* only blit so far is resource shadowing back-blit */ + + /* Keep track if WAIT_FOR_IDLE is needed for registers we need + * to update via RMW: + */ + bool needs_wfi : 1; + + /* To decide whether to render to system memory, keep track of the + * number of draws, and whether any of them require multisample, + * depth_test (or depth write), stencil_test, blending, and + * color_logic_Op (since those functions are disabled when by- + * passing GMEM. + */ + enum { + FD_GMEM_CLEARS_DEPTH_STENCIL = 0x01, + FD_GMEM_DEPTH_ENABLED = 0x02, + FD_GMEM_STENCIL_ENABLED = 0x04, + + FD_GMEM_MSAA_ENABLED = 0x08, + FD_GMEM_BLEND_ENABLED = 0x10, + FD_GMEM_LOGICOP_ENABLED = 0x20, + } gmem_reason; + unsigned num_draws; /* number of draws in current batch */ + + /* Track the maximal bounds of the scissor of all the draws within a + * batch. Used at the tile rendering step (fd_gmem_render_tiles(), + * mem2gmem/gmem2mem) to avoid needlessly moving data in/out of gmem. + */ + struct pipe_scissor_state max_scissor; + + /* Track the cleared scissor for color/depth/stencil, so we know + * which, if any, tiles need to be restored (mem2gmem). Only valid + * if the corresponding bit in ctx->cleared is set. + */ + struct { + struct pipe_scissor_state color, depth, stencil; + } cleared_scissor; + + /* Keep track of DRAW initiators that need to be patched up depending + * on whether we using binning or not: + */ + struct util_dynarray draw_patches; + + /* Keep track of writes to RB_RENDER_CONTROL which need to be patched + * once we know whether or not to use GMEM, and GMEM tile pitch. + * + * (only for a3xx.. but having gen specific subclasses of fd_batch + * seemed overkill for now) + */ + struct util_dynarray rbrc_patches; + + struct pipe_framebuffer_state framebuffer; + + /** draw pass cmdstream: */ + struct fd_ringbuffer *draw; + /** binning pass cmdstream: */ + struct fd_ringbuffer *binning; + /** tiling/gmem (IB0) cmdstream: */ + struct fd_ringbuffer *gmem; + + /** + * hw query related state: + */ + /*@{*/ + /* next sample offset.. incremented for each sample in the batch/ + * submit, reset to zero on next submit. + */ + uint32_t next_sample_offset; + + /* cached samples (in case multiple queries need to reference + * the same sample snapshot) + */ + struct fd_hw_sample *sample_cache[MAX_HW_SAMPLE_PROVIDERS]; + + /* which sample providers were active in the current batch: */ + uint32_t active_providers; + + /* tracking for current stage, to know when to start/stop + * any active queries: + */ + enum fd_render_stage stage; + + /* list of samples in current batch: */ + struct util_dynarray samples; + + /* current query result bo and tile stride: */ + struct pipe_resource *query_buf; + uint32_t query_tile_stride; + /*@}*/ + + + /* Set of resources used by currently-unsubmitted batch (read or + * write).. does not hold a reference to the resource. + */ + struct set *resources; + + /** key in batch-cache (if not null): */ + const void *key; + uint32_t hash; + + /** set of dependent batches.. holds refs to dependent batches: */ + uint32_t dependents_mask; +}; + +struct fd_batch * fd_batch_create(struct fd_context *ctx); + +void fd_batch_reset(struct fd_batch *batch); +void fd_batch_sync(struct fd_batch *batch); +void fd_batch_flush(struct fd_batch *batch, bool sync); +void fd_batch_resource_used(struct fd_batch *batch, struct fd_resource *rsc, bool write); +void fd_batch_check_size(struct fd_batch *batch); + +/* not called directly: */ +void __fd_batch_describe(char* buf, const struct fd_batch *batch); +void __fd_batch_destroy(struct fd_batch *batch); + +/* + * NOTE the rule is, you need to hold the screen->lock when destroying + * a batch.. so either use fd_batch_reference() (which grabs the lock + * for you) if you don't hold the lock, or fd_batch_reference_locked() + * if you do hold the lock. + * + * WARNING the _locked() version can briefly drop the lock. Without + * recursive mutexes, I'm not sure there is much else we can do (since + * __fd_batch_destroy() needs to unref resources) + */ + +static inline void +fd_batch_reference(struct fd_batch **ptr, struct fd_batch *batch) +{ + struct fd_batch *old_batch = *ptr; + if (pipe_reference_described(&(*ptr)->reference, &batch->reference, + (debug_reference_descriptor)__fd_batch_describe)) + __fd_batch_destroy(old_batch); + *ptr = batch; +} + +/* fwd-decl prototypes to untangle header dependency :-/ */ +static inline void fd_context_assert_locked(struct fd_context *ctx); +static inline void fd_context_lock(struct fd_context *ctx); +static inline void fd_context_unlock(struct fd_context *ctx); + +static inline void +fd_batch_reference_locked(struct fd_batch **ptr, struct fd_batch *batch) +{ + struct fd_batch *old_batch = *ptr; + + if (old_batch) + fd_context_assert_locked(old_batch->ctx); + else if (batch) + fd_context_assert_locked(batch->ctx); + + if (pipe_reference_described(&(*ptr)->reference, &batch->reference, + (debug_reference_descriptor)__fd_batch_describe)) { + struct fd_context *ctx = old_batch->ctx; + fd_context_unlock(ctx); + __fd_batch_destroy(old_batch); + fd_context_lock(ctx); + } + *ptr = batch; +} + +#include "freedreno_context.h" + +static inline void +fd_reset_wfi(struct fd_batch *batch) +{ + batch->needs_wfi = true; +} + +void fd_wfi(struct fd_batch *batch, struct fd_ringbuffer *ring); + +/* emit a CP_EVENT_WRITE: + */ +static inline void +fd_event_write(struct fd_batch *batch, struct fd_ringbuffer *ring, + enum vgt_event_type evt) +{ + OUT_PKT3(ring, CP_EVENT_WRITE, 1); + OUT_RING(ring, evt); + fd_reset_wfi(batch); +} + +#endif /* FREEDRENO_BATCH_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_context.c mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_context.c --- mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -38,106 +38,31 @@ #include "freedreno_query_hw.h" #include "freedreno_util.h" -static struct fd_ringbuffer *next_rb(struct fd_context *ctx) -{ - struct fd_ringbuffer *ring; - uint32_t ts; - - /* grab next ringbuffer: */ - ring = ctx->rings[(ctx->rings_idx++) % ARRAY_SIZE(ctx->rings)]; - - /* wait for new rb to be idle: */ - ts = fd_ringbuffer_timestamp(ring); - if (ts) { - DBG("wait: %u", ts); - fd_pipe_wait(ctx->screen->pipe, ts); - } - - fd_ringbuffer_reset(ring); - - return ring; -} - static void -fd_context_next_rb(struct pipe_context *pctx) -{ - struct fd_context *ctx = fd_context(pctx); - struct fd_ringbuffer *ring; - - fd_ringmarker_del(ctx->draw_start); - fd_ringmarker_del(ctx->draw_end); - - ring = next_rb(ctx); - - ctx->draw_start = fd_ringmarker_new(ring); - ctx->draw_end = fd_ringmarker_new(ring); - - fd_ringbuffer_set_parent(ring, NULL); - ctx->ring = ring; - - fd_ringmarker_del(ctx->binning_start); - fd_ringmarker_del(ctx->binning_end); - - ring = next_rb(ctx); - - ctx->binning_start = fd_ringmarker_new(ring); - ctx->binning_end = fd_ringmarker_new(ring); - - fd_ringbuffer_set_parent(ring, ctx->ring); - ctx->binning_ring = ring; -} - -/* emit accumulated render cmds, needed for example if render target has - * changed, or for flush() - */ -void -fd_context_render(struct pipe_context *pctx) +fd_context_flush(struct pipe_context *pctx, struct pipe_fence_handle **fence, + unsigned flags) { struct fd_context *ctx = fd_context(pctx); - struct fd_resource *rsc, *rsc_tmp; - - DBG("needs_flush: %d", ctx->needs_flush); - - if (!ctx->needs_flush) - return; - - fd_gmem_render_tiles(ctx); - DBG("%p/%p/%p", ctx->ring->start, ctx->ring->cur, ctx->ring->end); + if (flags & PIPE_FLUSH_FENCE_FD) + ctx->batch->needs_out_fence_fd = true; - /* if size in dwords is more than half the buffer size, then wait and - * wrap around: - */ - if ((ctx->ring->cur - ctx->ring->start) > ctx->ring->size/8) - fd_context_next_rb(pctx); - - ctx->needs_flush = false; - ctx->cleared = ctx->partial_cleared = ctx->restore = ctx->resolve = 0; - ctx->gmem_reason = 0; - ctx->num_draws = 0; - - /* go through all the used resources and clear their reading flag */ - LIST_FOR_EACH_ENTRY_SAFE(rsc, rsc_tmp, &ctx->used_resources, list) { - debug_assert(rsc->status != 0); - rsc->status = 0; - rsc->pending_ctx = NULL; - list_delinit(&rsc->list); + if (!ctx->screen->reorder) { + fd_batch_flush(ctx->batch, true); + } else { + fd_bc_flush(&ctx->screen->batch_cache, ctx); } - assert(LIST_IS_EMPTY(&ctx->used_resources)); -} - -static void -fd_context_flush(struct pipe_context *pctx, struct pipe_fence_handle **fence, - unsigned flags) -{ - struct fd_ringbuffer *ring = fd_context(pctx)->ring; - - fd_context_render(pctx); - if (fence) { - fd_screen_fence_ref(pctx->screen, fence, NULL); - *fence = fd_fence_create(pctx, fd_ringbuffer_timestamp(ring)); + /* if there hasn't been any rendering submitted yet, we might not + * have actually created a fence + */ + if (!ctx->last_fence || ctx->batch->needs_out_fence_fd) { + ctx->batch->needs_flush = true; + fd_gmem_render_noop(ctx->batch); + fd_batch_reset(ctx->batch); + } + fd_fence_ref(pctx->screen, fence, ctx->last_fence); } } @@ -149,13 +74,21 @@ fd_emit_string_marker(struct pipe_context *pctx, const char *string, int len) { struct fd_context *ctx = fd_context(pctx); - struct fd_ringbuffer *ring = ctx->ring; + struct fd_ringbuffer *ring; const uint32_t *buf = (const void *)string; + if (!ctx->batch) + return; + + ring = ctx->batch->draw; + /* max packet size is 0x3fff dwords: */ len = MIN2(len, 0x3fff * 4); - OUT_PKT3(ring, CP_NOP, align(len, 4) / 4); + if (ctx->screen->gpu_id >= 500) + OUT_PKT7(ring, CP_NOP, align(len, 4) / 4); + else + OUT_PKT3(ring, CP_NOP, align(len, 4) / 4); while (len >= 4) { OUT_RING(ring, *buf); buf++; @@ -178,26 +111,27 @@ DBG(""); + if (ctx->screen->reorder) + util_queue_destroy(&ctx->flush_queue); + + fd_batch_reference(&ctx->batch, NULL); /* unref current batch */ + fd_bc_invalidate_context(ctx); + + fd_fence_ref(pctx->screen, &ctx->last_fence, NULL); + fd_prog_fini(pctx); fd_hw_query_fini(pctx); - util_dynarray_fini(&ctx->draw_patches); - if (ctx->blitter) util_blitter_destroy(ctx->blitter); + if (ctx->clear_rs_state) + pctx->delete_rasterizer_state(pctx, ctx->clear_rs_state); + if (ctx->primconvert) util_primconvert_destroy(ctx->primconvert); - util_slab_destroy(&ctx->transfer_pool); - - fd_ringmarker_del(ctx->draw_start); - fd_ringmarker_del(ctx->draw_end); - fd_ringmarker_del(ctx->binning_start); - fd_ringmarker_del(ctx->binning_end); - - for (i = 0; i < ARRAY_SIZE(ctx->rings); i++) - fd_ringbuffer_del(ctx->rings[i]); + slab_destroy_child(&ctx->transfer_pool); for (i = 0; i < ARRAY_SIZE(ctx->pipe); i++) { struct fd_vsc_pipe *pipe = &ctx->pipe[i]; @@ -208,6 +142,12 @@ fd_device_del(ctx->dev); + if (fd_mesa_debug & (FD_DBG_BSTAT | FD_DBG_MSGS)) { + printf("batch_total=%u, batch_sysmem=%u, batch_gmem=%u, batch_restore=%u\n", + (uint32_t)ctx->stats.batch_total, (uint32_t)ctx->stats.batch_sysmem, + (uint32_t)ctx->stats.batch_gmem, (uint32_t)ctx->stats.batch_restore); + } + FREE(ctx); } @@ -223,6 +163,82 @@ memset(&ctx->debug, 0, sizeof(ctx->debug)); } +/* TODO we could combine a few of these small buffers (solid_vbuf, + * blit_texcoord_vbuf, and vsc_size_mem, into a single buffer and + * save a tiny bit of memory + */ + +static struct pipe_resource * +create_solid_vertexbuf(struct pipe_context *pctx) +{ + static const float init_shader_const[] = { + -1.000000, +1.000000, +1.000000, + +1.000000, -1.000000, +1.000000, + }; + struct pipe_resource *prsc = pipe_buffer_create(pctx->screen, + PIPE_BIND_CUSTOM, PIPE_USAGE_IMMUTABLE, sizeof(init_shader_const)); + pipe_buffer_write(pctx, prsc, 0, + sizeof(init_shader_const), init_shader_const); + return prsc; +} + +static struct pipe_resource * +create_blit_texcoord_vertexbuf(struct pipe_context *pctx) +{ + struct pipe_resource *prsc = pipe_buffer_create(pctx->screen, + PIPE_BIND_CUSTOM, PIPE_USAGE_DYNAMIC, 16); + return prsc; +} + +void +fd_context_setup_common_vbos(struct fd_context *ctx) +{ + struct pipe_context *pctx = &ctx->base; + + ctx->solid_vbuf = create_solid_vertexbuf(pctx); + ctx->blit_texcoord_vbuf = create_blit_texcoord_vertexbuf(pctx); + + /* setup solid_vbuf_state: */ + ctx->solid_vbuf_state.vtx = pctx->create_vertex_elements_state( + pctx, 1, (struct pipe_vertex_element[]){{ + .vertex_buffer_index = 0, + .src_offset = 0, + .src_format = PIPE_FORMAT_R32G32B32_FLOAT, + }}); + ctx->solid_vbuf_state.vertexbuf.count = 1; + ctx->solid_vbuf_state.vertexbuf.vb[0].stride = 12; + ctx->solid_vbuf_state.vertexbuf.vb[0].buffer = ctx->solid_vbuf; + + /* setup blit_vbuf_state: */ + ctx->blit_vbuf_state.vtx = pctx->create_vertex_elements_state( + pctx, 2, (struct pipe_vertex_element[]){{ + .vertex_buffer_index = 0, + .src_offset = 0, + .src_format = PIPE_FORMAT_R32G32_FLOAT, + }, { + .vertex_buffer_index = 1, + .src_offset = 0, + .src_format = PIPE_FORMAT_R32G32B32_FLOAT, + }}); + ctx->blit_vbuf_state.vertexbuf.count = 2; + ctx->blit_vbuf_state.vertexbuf.vb[0].stride = 8; + ctx->blit_vbuf_state.vertexbuf.vb[0].buffer = ctx->blit_texcoord_vbuf; + ctx->blit_vbuf_state.vertexbuf.vb[1].stride = 12; + ctx->blit_vbuf_state.vertexbuf.vb[1].buffer = ctx->solid_vbuf; +} + +void +fd_context_cleanup_common_vbos(struct fd_context *ctx) +{ + struct pipe_context *pctx = &ctx->base; + + pctx->delete_vertex_elements_state(pctx, ctx->solid_vbuf_state.vtx); + pctx->delete_vertex_elements_state(pctx, ctx->blit_vbuf_state.vtx); + + pipe_resource_reference(&ctx->solid_vbuf, NULL); + pipe_resource_reference(&ctx->blit_texcoord_vbuf, NULL); +} + struct pipe_context * fd_context_init(struct fd_context *ctx, struct pipe_screen *pscreen, const uint8_t *primtypes, void *priv) @@ -250,20 +266,18 @@ pctx->flush = fd_context_flush; pctx->emit_string_marker = fd_emit_string_marker; pctx->set_debug_callback = fd_set_debug_callback; + pctx->create_fence_fd = fd_create_fence_fd; + pctx->fence_server_sync = fd_fence_server_sync; - for (i = 0; i < ARRAY_SIZE(ctx->rings); i++) { - ctx->rings[i] = fd_ringbuffer_new(screen->pipe, 0x100000); - if (!ctx->rings[i]) - goto fail; + /* TODO what about compute? Ideally it creates it's own independent + * batches per compute job (since it isn't using tiling, so no point + * in getting involved with the re-ordering madness).. + */ + if (!screen->reorder) { + ctx->batch = fd_bc_alloc_batch(&screen->batch_cache, ctx); } - fd_context_next_rb(pctx); - fd_reset_wfi(ctx); - - util_dynarray_init(&ctx->draw_patches); - - util_slab_create(&ctx->transfer_pool, sizeof(struct fd_transfer), - 16, UTIL_SLAB_SINGLETHREADED); + slab_create_child(&ctx->transfer_pool, &screen->transfer_pool); fd_draw_init(pctx); fd_resource_context_init(pctx); diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_context.h mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_context.h --- mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_context.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_context.h 2017-06-01 10:37:10.000000000 +0000 @@ -33,9 +33,10 @@ #include "indices/u_primconvert.h" #include "util/u_blitter.h" #include "util/list.h" -#include "util/u_slab.h" +#include "util/slab.h" #include "util/u_string.h" +#include "freedreno_batch.h" #include "freedreno_screen.h" #include "freedreno_gmem.h" #include "freedreno_util.h" @@ -47,9 +48,10 @@ struct fd_texture_stateobj { struct pipe_sampler_view *textures[PIPE_MAX_SAMPLERS]; unsigned num_textures; + unsigned valid_textures; struct pipe_sampler_state *samplers[PIPE_MAX_SAMPLERS]; unsigned num_samplers; - unsigned dirty_samplers; + unsigned valid_samplers; }; struct fd_program_stateobj { @@ -105,33 +107,6 @@ struct fd_vertexbuf_stateobj vertexbuf; }; -/* Bitmask of stages in rendering that a particular query query is - * active. Queries will be automatically started/stopped (generating - * additional fd_hw_sample_period's) on entrance/exit from stages that - * are applicable to the query. - * - * NOTE: set the stage to NULL at end of IB to ensure no query is still - * active. Things aren't going to work out the way you want if a query - * is active across IB's (or between tile IB and draw IB) - */ -enum fd_render_stage { - FD_STAGE_NULL = 0x00, - FD_STAGE_DRAW = 0x01, - FD_STAGE_CLEAR = 0x02, - /* TODO before queries which include MEM2GMEM or GMEM2MEM will - * work we will need to call fd_hw_query_prepare() from somewhere - * appropriate so that queries in the tiling IB get backed with - * memory to write results to. - */ - FD_STAGE_MEM2GMEM = 0x04, - FD_STAGE_GMEM2MEM = 0x08, - /* used for driver internal draws (ie. util_blitter_blit()): */ - FD_STAGE_BLIT = 0x10, -}; - -#define MAX_HW_SAMPLE_PROVIDERS 4 -struct fd_hw_sample_provider; -struct fd_hw_sample; struct fd_context { struct pipe_context base; @@ -139,52 +114,25 @@ struct fd_device *dev; struct fd_screen *screen; + struct util_queue flush_queue; + struct blitter_context *blitter; + void *clear_rs_state; struct primconvert_context *primconvert; /* slab for pipe_transfer allocations: */ - struct util_slab_mempool transfer_pool; + struct slab_child_pool transfer_pool; /* slabs for fd_hw_sample and fd_hw_sample_period allocations: */ - struct util_slab_mempool sample_pool; - struct util_slab_mempool sample_period_pool; - - /* next sample offset.. incremented for each sample in the batch/ - * submit, reset to zero on next submit. - */ - uint32_t next_sample_offset; + struct slab_mempool sample_pool; + struct slab_mempool sample_period_pool; /* sample-providers for hw queries: */ const struct fd_hw_sample_provider *sample_providers[MAX_HW_SAMPLE_PROVIDERS]; - /* cached samples (in case multiple queries need to reference - * the same sample snapshot) - */ - struct fd_hw_sample *sample_cache[MAX_HW_SAMPLE_PROVIDERS]; - - /* which sample providers were active in the current batch: */ - uint32_t active_providers; - - /* tracking for current stage, to know when to start/stop - * any active queries: - */ - enum fd_render_stage stage; - /* list of active queries: */ struct list_head active_queries; - /* list of queries that are not active, but were active in the - * current submit: - */ - struct list_head current_queries; - - /* current query result bo and tile stride: */ - struct fd_bo *query_bo; - uint32_t query_tile_stride; - - /* list of resources used by currently-unsubmitted renders */ - struct list_head used_resources; - /* table with PIPE_PRIM_MAX entries mapping PIPE_PRIM_x to * DI_PT_x value to use for draw initiator. There are some * slight differences between generation: @@ -199,42 +147,6 @@ struct fd_program_stateobj blit_prog[MAX_RENDER_TARGETS]; // TODO move to screen? struct fd_program_stateobj blit_z, blit_zs; - /* do we need to mem2gmem before rendering. We don't, if for example, - * there was a glClear() that invalidated the entire previous buffer - * contents. Keep track of which buffer(s) are cleared, or needs - * restore. Masks of PIPE_CLEAR_* - * - * The 'cleared' bits will be set for buffers which are *entirely* - * cleared, and 'partial_cleared' bits will be set if you must - * check cleared_scissor. - */ - enum { - /* align bitmask values w/ PIPE_CLEAR_*.. since that is convenient.. */ - FD_BUFFER_COLOR = PIPE_CLEAR_COLOR, - FD_BUFFER_DEPTH = PIPE_CLEAR_DEPTH, - FD_BUFFER_STENCIL = PIPE_CLEAR_STENCIL, - FD_BUFFER_ALL = FD_BUFFER_COLOR | FD_BUFFER_DEPTH | FD_BUFFER_STENCIL, - } cleared, partial_cleared, restore, resolve; - - bool needs_flush; - - /* To decide whether to render to system memory, keep track of the - * number of draws, and whether any of them require multisample, - * depth_test (or depth write), stencil_test, blending, and - * color_logic_Op (since those functions are disabled when by- - * passing GMEM. - */ - enum { - FD_GMEM_CLEARS_DEPTH_STENCIL = 0x01, - FD_GMEM_DEPTH_ENABLED = 0x02, - FD_GMEM_STENCIL_ENABLED = 0x04, - - FD_GMEM_MSAA_ENABLED = 0x08, - FD_GMEM_BLEND_ENABLED = 0x10, - FD_GMEM_LOGICOP_ENABLED = 0x20, - } gmem_reason; - unsigned num_draws; /* number of draws in current batch */ - /* Stats/counters: */ struct { @@ -244,49 +156,26 @@ uint64_t batch_total, batch_sysmem, batch_gmem, batch_restore; } stats; - /* we can't really sanely deal with wraparound point in ringbuffer - * and because of the way tiling works we can't really flush at - * arbitrary points (without a big performance hit). When we get - * too close to the end of the current ringbuffer, cycle to the next - * one (and wait for pending rendering from next rb to complete). - * We want the # of ringbuffers to be high enough that we don't - * normally have to wait before resetting to the start of the next - * rb. - */ - struct fd_ringbuffer *rings[8]; - unsigned rings_idx; - - /* NOTE: currently using a single ringbuffer for both draw and - * tiling commands, we need to make sure we need to leave enough - * room at the end to append the tiling commands when we flush. - * 0x7000 dwords should be a couple times more than we ever need - * so should be a nice conservative threshold. - */ -#define FD_TILING_COMMANDS_DWORDS 0x7000 - - /* normal draw/clear cmds: */ - struct fd_ringbuffer *ring; - struct fd_ringmarker *draw_start, *draw_end; - - /* binning pass draw/clear cmds: */ - struct fd_ringbuffer *binning_ring; - struct fd_ringmarker *binning_start, *binning_end; - - /* Keep track if WAIT_FOR_IDLE is needed for registers we need - * to update via RMW: - */ - bool needs_wfi; - - /* Do we need to re-emit RB_FRAME_BUFFER_DIMENSION? At least on a3xx - * it is not a banked context register, so it needs a WFI to update. - * Keep track if it has actually changed, to avoid unneeded WFI. - * */ - bool needs_rb_fbd; + /* Current batch.. the rule here is that you can deref ctx->batch + * in codepaths from pipe_context entrypoints. But not in code- + * paths from fd_batch_flush() (basically, the stuff that gets + * called from GMEM code), since in those code-paths the batch + * you care about is not necessarily the same as ctx->batch. + */ + struct fd_batch *batch; + + struct pipe_fence_handle *last_fence; - /* Keep track of DRAW initiators that need to be patched up depending - * on whether we using binning or not: + /* Are we in process of shadowing a resource? Used to detect recursion + * in transfer_map, and skip unneeded synchronization. */ - struct util_dynarray draw_patches; + bool in_shadow : 1; + + /* Ie. in blit situation where we no longer care about previous framebuffer + * contents. Main point is to eliminate blits from fd_try_shadow_resource(). + * For example, in case of texture upload + gen-mipmaps. + */ + bool in_blit : 1; struct pipe_scissor_state scissor; @@ -296,22 +185,11 @@ */ struct pipe_scissor_state disabled_scissor; - /* Track the maximal bounds of the scissor of all the draws within a - * batch. Used at the tile rendering step (fd_gmem_render_tiles(), - * mem2gmem/gmem2mem) to avoid needlessly moving data in/out of gmem. - */ - struct pipe_scissor_state max_scissor; - - /* Track the cleared scissor for color/depth/stencil, so we know - * which, if any, tiles need to be restored (mem2gmem). Only valid - * if the corresponding bit in ctx->cleared is set. - */ - struct { - struct pipe_scissor_state color, depth, stencil; - } cleared_scissor; - /* Current gmem/tiling configuration.. gets updated on render_tiles() * if out of date with current maximal-scissor/cpp: + * + * (NOTE: this is kind of related to the batch, but moving it there + * means we'd always have to recalc tiles ever batch) */ struct fd_gmem_stateobj gmem; struct fd_vsc_pipe pipe[8]; @@ -360,7 +238,6 @@ struct pipe_blend_color blend_color; struct pipe_stencil_ref stencil_ref; unsigned sample_mask; - struct pipe_framebuffer_state framebuffer; struct pipe_poly_stipple stipple; struct pipe_viewport_state viewport; struct fd_constbuf_stateobj constbuf[PIPE_SHADER_TYPES]; @@ -375,14 +252,16 @@ struct pipe_debug_callback debug; /* GMEM/tile handling fxns: */ - void (*emit_tile_init)(struct fd_context *ctx); - void (*emit_tile_prep)(struct fd_context *ctx, struct fd_tile *tile); - void (*emit_tile_mem2gmem)(struct fd_context *ctx, struct fd_tile *tile); - void (*emit_tile_renderprep)(struct fd_context *ctx, struct fd_tile *tile); - void (*emit_tile_gmem2mem)(struct fd_context *ctx, struct fd_tile *tile); + void (*emit_tile_init)(struct fd_batch *batch); + void (*emit_tile_prep)(struct fd_batch *batch, struct fd_tile *tile); + void (*emit_tile_mem2gmem)(struct fd_batch *batch, struct fd_tile *tile); + void (*emit_tile_renderprep)(struct fd_batch *batch, struct fd_tile *tile); + void (*emit_tile_gmem2mem)(struct fd_batch *batch, struct fd_tile *tile); + void (*emit_tile_fini)(struct fd_batch *batch); /* optional */ /* optional, for GMEM bypass: */ - void (*emit_sysmem_prep)(struct fd_context *ctx); + void (*emit_sysmem_prep)(struct fd_batch *batch); + void (*emit_sysmem_fini)(struct fd_batch *batch); /* draw: */ bool (*draw_vbo)(struct fd_context *ctx, const struct pipe_draw_info *info); @@ -393,12 +272,33 @@ void (*emit_const)(struct fd_ringbuffer *ring, enum shader_t type, uint32_t regid, uint32_t offset, uint32_t sizedwords, const uint32_t *dwords, struct pipe_resource *prsc); + /* emit bo addresses as constant: */ void (*emit_const_bo)(struct fd_ringbuffer *ring, enum shader_t type, boolean write, - uint32_t regid, uint32_t num, struct fd_bo **bos, uint32_t *offsets); + uint32_t regid, uint32_t num, struct pipe_resource **prscs, uint32_t *offsets); /* indirect-branch emit: */ - void (*emit_ib)(struct fd_ringbuffer *ring, struct fd_ringmarker *start, - struct fd_ringmarker *end); + void (*emit_ib)(struct fd_ringbuffer *ring, struct fd_ringbuffer *target); + + /* + * Common pre-cooked VBO state (used for a3xx and later): + */ + + /* for clear/gmem->mem vertices, and mem->gmem */ + struct pipe_resource *solid_vbuf; + + /* for mem->gmem tex coords: */ + struct pipe_resource *blit_texcoord_vbuf; + + /* vertex state for solid_vbuf: + * - solid_vbuf / 12 / R32G32B32_FLOAT + */ + struct fd_vertex_state solid_vbuf_state; + + /* vertex state for blit_prog: + * - blit_texcoord_vbuf / 8 / R32G32_FLOAT + * - solid_vbuf / 12 / R32G32B32_FLOAT + */ + struct fd_vertex_state blit_vbuf_state; }; static inline struct fd_context * @@ -407,55 +307,45 @@ return (struct fd_context *)pctx; } -static inline struct pipe_scissor_state * -fd_context_get_scissor(struct fd_context *ctx) +static inline void +fd_context_assert_locked(struct fd_context *ctx) { - if (ctx->rasterizer && ctx->rasterizer->scissor) - return &ctx->scissor; - return &ctx->disabled_scissor; + pipe_mutex_assert_locked(ctx->screen->lock); } -static inline bool -fd_supported_prim(struct fd_context *ctx, unsigned prim) +static inline void +fd_context_lock(struct fd_context *ctx) { - return (1 << prim) & ctx->primtype_mask; + pipe_mutex_lock(ctx->screen->lock); } static inline void -fd_reset_wfi(struct fd_context *ctx) +fd_context_unlock(struct fd_context *ctx) { - ctx->needs_wfi = true; + pipe_mutex_unlock(ctx->screen->lock); } -/* emit a WAIT_FOR_IDLE only if needed, ie. if there has not already - * been one since last draw: - */ -static inline void -fd_wfi(struct fd_context *ctx, struct fd_ringbuffer *ring) +static inline struct pipe_scissor_state * +fd_context_get_scissor(struct fd_context *ctx) { - if (ctx->needs_wfi) { - OUT_WFI(ring); - ctx->needs_wfi = false; - } + if (ctx->rasterizer && ctx->rasterizer->scissor) + return &ctx->scissor; + return &ctx->disabled_scissor; } -/* emit a CP_EVENT_WRITE: - */ -static inline void -fd_event_write(struct fd_context *ctx, struct fd_ringbuffer *ring, - enum vgt_event_type evt) +static inline bool +fd_supported_prim(struct fd_context *ctx, unsigned prim) { - OUT_PKT3(ring, CP_EVENT_WRITE, 1); - OUT_RING(ring, evt); - fd_reset_wfi(ctx); + return (1 << prim) & ctx->primtype_mask; } +void fd_context_setup_common_vbos(struct fd_context *ctx); +void fd_context_cleanup_common_vbos(struct fd_context *ctx); + struct pipe_context * fd_context_init(struct fd_context *ctx, struct pipe_screen *pscreen, const uint8_t *primtypes, void *priv); -void fd_context_render(struct pipe_context *pctx); - void fd_context_destroy(struct pipe_context *pctx); #endif /* FREEDRENO_CONTEXT_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_draw.c mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_draw.c --- mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_draw.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_draw.c 2017-06-01 10:37:10.000000000 +0000 @@ -40,45 +40,27 @@ #include "freedreno_util.h" static void -resource_used(struct fd_context *ctx, struct pipe_resource *prsc, - enum fd_resource_status status) +resource_read(struct fd_batch *batch, struct pipe_resource *prsc) { - struct fd_resource *rsc; - if (!prsc) return; - - rsc = fd_resource(prsc); - rsc->status |= status; - if (rsc->stencil) - rsc->stencil->status |= status; - - /* TODO resources can actually be shared across contexts, - * so I'm not sure a single list-head will do the trick? - */ - debug_assert((rsc->pending_ctx == ctx) || !rsc->pending_ctx); - list_delinit(&rsc->list); - list_addtail(&rsc->list, &ctx->used_resources); - rsc->pending_ctx = ctx; + fd_batch_resource_used(batch, fd_resource(prsc), false); } static void -resource_read(struct fd_context *ctx, struct pipe_resource *prsc) +resource_written(struct fd_batch *batch, struct pipe_resource *prsc) { - resource_used(ctx, prsc, FD_PENDING_READ); -} - -static void -resource_written(struct fd_context *ctx, struct pipe_resource *prsc) -{ - resource_used(ctx, prsc, FD_PENDING_WRITE); + if (!prsc) + return; + fd_batch_resource_used(batch, fd_resource(prsc), true); } static void fd_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info) { struct fd_context *ctx = fd_context(pctx); - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; + struct fd_batch *batch = ctx->batch; + struct pipe_framebuffer_state *pfb = &batch->framebuffer; struct pipe_scissor_state *scissor = fd_context_get_scissor(ctx); unsigned i, prims, buffers = 0; @@ -102,24 +84,39 @@ return; } + if (ctx->in_blit) { + fd_batch_reset(batch); + ctx->dirty = ~0; + } + + batch->blit = ctx->in_blit; + batch->back_blit = ctx->in_shadow; + + /* NOTE: needs to be before resource_written(batch->query_buf), otherwise + * query_buf may not be created yet. + */ + fd_hw_query_set_stage(batch, batch->draw, FD_STAGE_DRAW); + /* * Figure out the buffers/features we need: */ + pipe_mutex_lock(ctx->screen->lock); + if (fd_depth_enabled(ctx)) { buffers |= FD_BUFFER_DEPTH; - resource_written(ctx, pfb->zsbuf->texture); - ctx->gmem_reason |= FD_GMEM_DEPTH_ENABLED; + resource_written(batch, pfb->zsbuf->texture); + batch->gmem_reason |= FD_GMEM_DEPTH_ENABLED; } if (fd_stencil_enabled(ctx)) { buffers |= FD_BUFFER_STENCIL; - resource_written(ctx, pfb->zsbuf->texture); - ctx->gmem_reason |= FD_GMEM_STENCIL_ENABLED; + resource_written(batch, pfb->zsbuf->texture); + batch->gmem_reason |= FD_GMEM_STENCIL_ENABLED; } if (fd_logicop_enabled(ctx)) - ctx->gmem_reason |= FD_GMEM_LOGICOP_ENABLED; + batch->gmem_reason |= FD_GMEM_LOGICOP_ENABLED; for (i = 0; i < pfb->nr_cbufs; i++) { struct pipe_resource *surf; @@ -129,45 +126,46 @@ surf = pfb->cbufs[i]->texture; - resource_written(ctx, surf); + resource_written(batch, surf); buffers |= PIPE_CLEAR_COLOR0 << i; if (surf->nr_samples > 1) - ctx->gmem_reason |= FD_GMEM_MSAA_ENABLED; + batch->gmem_reason |= FD_GMEM_MSAA_ENABLED; if (fd_blend_enabled(ctx, i)) - ctx->gmem_reason |= FD_GMEM_BLEND_ENABLED; + batch->gmem_reason |= FD_GMEM_BLEND_ENABLED; } - /* Skip over buffer 0, that is sent along with the command stream */ - for (i = 1; i < PIPE_MAX_CONSTANT_BUFFERS; i++) { - resource_read(ctx, ctx->constbuf[PIPE_SHADER_VERTEX].cb[i].buffer); - resource_read(ctx, ctx->constbuf[PIPE_SHADER_FRAGMENT].cb[i].buffer); - } + foreach_bit(i, ctx->constbuf[PIPE_SHADER_VERTEX].enabled_mask) + resource_read(batch, ctx->constbuf[PIPE_SHADER_VERTEX].cb[i].buffer); + foreach_bit(i, ctx->constbuf[PIPE_SHADER_FRAGMENT].enabled_mask) + resource_read(batch, ctx->constbuf[PIPE_SHADER_FRAGMENT].cb[i].buffer); /* Mark VBOs as being read */ - for (i = 0; i < ctx->vtx.vertexbuf.count; i++) { + foreach_bit(i, ctx->vtx.vertexbuf.enabled_mask) { assert(!ctx->vtx.vertexbuf.vb[i].user_buffer); - resource_read(ctx, ctx->vtx.vertexbuf.vb[i].buffer); + resource_read(batch, ctx->vtx.vertexbuf.vb[i].buffer); } /* Mark index buffer as being read */ - resource_read(ctx, ctx->indexbuf.buffer); + resource_read(batch, ctx->indexbuf.buffer); /* Mark textures as being read */ - for (i = 0; i < ctx->verttex.num_textures; i++) - if (ctx->verttex.textures[i]) - resource_read(ctx, ctx->verttex.textures[i]->texture); - for (i = 0; i < ctx->fragtex.num_textures; i++) - if (ctx->fragtex.textures[i]) - resource_read(ctx, ctx->fragtex.textures[i]->texture); + foreach_bit(i, ctx->verttex.valid_textures) + resource_read(batch, ctx->verttex.textures[i]->texture); + foreach_bit(i, ctx->fragtex.valid_textures) + resource_read(batch, ctx->fragtex.textures[i]->texture); /* Mark streamout buffers as being written.. */ for (i = 0; i < ctx->streamout.num_targets; i++) if (ctx->streamout.targets[i]) - resource_written(ctx, ctx->streamout.targets[i]->buffer); + resource_written(batch, ctx->streamout.targets[i]->buffer); + + resource_written(batch, batch->query_buf); + + pipe_mutex_unlock(ctx->screen->lock); - ctx->num_draws++; + batch->num_draws++; prims = u_reduced_prims_for_vertices(info->mode, info->count); @@ -184,17 +182,17 @@ ctx->stats.prims_generated += prims; /* any buffers that haven't been cleared yet, we need to restore: */ - ctx->restore |= buffers & (FD_BUFFER_ALL & ~ctx->cleared); + batch->restore |= buffers & (FD_BUFFER_ALL & ~batch->cleared); /* and any buffers used, need to be resolved: */ - ctx->resolve |= buffers; + batch->resolve |= buffers; - DBG("%x num_draws=%u (%s/%s)", buffers, ctx->num_draws, + DBG("%p: %x %ux%u num_draws=%u (%s/%s)", batch, buffers, + pfb->width, pfb->height, batch->num_draws, util_format_short_name(pipe_surface_format(pfb->cbufs[0])), util_format_short_name(pipe_surface_format(pfb->zsbuf))); - fd_hw_query_set_stage(ctx, ctx->ring, FD_STAGE_DRAW); if (ctx->draw_vbo(ctx, info)) - ctx->needs_flush = true; + batch->needs_flush = true; for (i = 0; i < ctx->streamout.num_targets; i++) ctx->streamout.offsets[i] += info->count; @@ -202,18 +200,74 @@ if (fd_mesa_debug & FD_DBG_DDRAW) ctx->dirty = 0xffffffff; - /* if an app (or, well, piglit test) does many thousands of draws - * without flush (or anything which implicitly flushes, like - * changing render targets), we can exceed the ringbuffer size. - * Since we don't currently have a sane way to wrapparound, and - * we use the same buffer for both draw and tiling commands, for - * now we need to do this hack and trigger flush if we are running - * low on remaining space for cmds: - */ - if (((ctx->ring->cur - ctx->ring->start) > - (ctx->ring->size/4 - FD_TILING_COMMANDS_DWORDS)) || - (fd_mesa_debug & FD_DBG_FLUSH)) - fd_context_render(pctx); + fd_batch_check_size(batch); +} + +/* Generic clear implementation (partially) using u_blitter: */ +static void +fd_blitter_clear(struct pipe_context *pctx, unsigned buffers, + const union pipe_color_union *color, double depth, unsigned stencil) +{ + struct fd_context *ctx = fd_context(pctx); + struct pipe_framebuffer_state *pfb = &ctx->batch->framebuffer; + struct blitter_context *blitter = ctx->blitter; + + fd_blitter_pipe_begin(ctx, false, true, FD_STAGE_CLEAR); + + util_blitter_common_clear_setup(blitter, pfb->width, pfb->height, + buffers, NULL, NULL); + + struct pipe_stencil_ref sr = { + .ref_value = { stencil & 0xff } + }; + pctx->set_stencil_ref(pctx, &sr); + + struct pipe_constant_buffer cb = { + .buffer_size = 16, + .user_buffer = &color->ui, + }; + pctx->set_constant_buffer(pctx, PIPE_SHADER_FRAGMENT, 0, &cb); + + if (!ctx->clear_rs_state) { + const struct pipe_rasterizer_state tmpl = { + .cull_face = PIPE_FACE_NONE, + .half_pixel_center = 1, + .bottom_edge_rule = 1, + .flatshade = 1, + .depth_clip = 1, + }; + ctx->clear_rs_state = pctx->create_rasterizer_state(pctx, &tmpl); + } + pctx->bind_rasterizer_state(pctx, ctx->clear_rs_state); + + struct pipe_viewport_state vp = { + .scale = { 0.5f * pfb->width, -0.5f * pfb->height, depth }, + .translate = { 0.5f * pfb->width, 0.5f * pfb->height, 0.0f }, + }; + pctx->set_viewport_states(pctx, 0, 1, &vp); + + pctx->bind_vertex_elements_state(pctx, ctx->solid_vbuf_state.vtx); + pctx->set_vertex_buffers(pctx, blitter->vb_slot, 1, + &ctx->solid_vbuf_state.vertexbuf.vb[0]); + pctx->set_stream_output_targets(pctx, 0, NULL, NULL); + pctx->bind_vs_state(pctx, ctx->solid_prog.vp); + pctx->bind_fs_state(pctx, ctx->solid_prog.fp); + + struct pipe_draw_info info = { + .mode = PIPE_PRIM_MAX, /* maps to DI_PT_RECTLIST */ + .count = 2, + .max_index = 1, + .instance_count = 1, + }; + ctx->draw_vbo(ctx, &info); + + util_blitter_restore_constant_buffer_state(blitter); + util_blitter_restore_vertex_states(blitter); + util_blitter_restore_fragment_states(blitter); + util_blitter_restore_render_cond(blitter); + util_blitter_unset_running_flag(blitter); + + fd_blitter_pipe_end(ctx); } /* TODO figure out how to make better use of existing state mechanism @@ -227,7 +281,8 @@ const union pipe_color_union *color, double depth, unsigned stencil) { struct fd_context *ctx = fd_context(pctx); - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; + struct fd_batch *batch = ctx->batch; + struct pipe_framebuffer_state *pfb = &batch->framebuffer; struct pipe_scissor_state *scissor = fd_context_get_scissor(ctx); unsigned cleared_buffers; int i; @@ -236,6 +291,11 @@ if (!fd_render_condition_check(pctx)) return; + if (ctx->in_blit) { + fd_batch_reset(batch); + ctx->dirty = ~0; + } + /* for bookkeeping about which buffers have been cleared (and thus * can fully or partially skip mem2gmem) we need to ignore buffers * that have already had a draw, in case apps do silly things like @@ -243,38 +303,53 @@ * something like alpha-test causes side effects from the draw in * the depth buffer, etc) */ - cleared_buffers = buffers & (FD_BUFFER_ALL & ~ctx->restore); + cleared_buffers = buffers & (FD_BUFFER_ALL & ~batch->restore); /* do we have full-screen scissor? */ if (!memcmp(scissor, &ctx->disabled_scissor, sizeof(*scissor))) { - ctx->cleared |= cleared_buffers; + batch->cleared |= cleared_buffers; } else { - ctx->partial_cleared |= cleared_buffers; + batch->partial_cleared |= cleared_buffers; if (cleared_buffers & PIPE_CLEAR_COLOR) - ctx->cleared_scissor.color = *scissor; + batch->cleared_scissor.color = *scissor; if (cleared_buffers & PIPE_CLEAR_DEPTH) - ctx->cleared_scissor.depth = *scissor; + batch->cleared_scissor.depth = *scissor; if (cleared_buffers & PIPE_CLEAR_STENCIL) - ctx->cleared_scissor.stencil = *scissor; + batch->cleared_scissor.stencil = *scissor; } - ctx->resolve |= buffers; - ctx->needs_flush = true; + batch->resolve |= buffers; + batch->needs_flush = true; + + pipe_mutex_lock(ctx->screen->lock); if (buffers & PIPE_CLEAR_COLOR) for (i = 0; i < pfb->nr_cbufs; i++) if (buffers & (PIPE_CLEAR_COLOR0 << i)) - resource_written(ctx, pfb->cbufs[i]->texture); + resource_written(batch, pfb->cbufs[i]->texture); if (buffers & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) { - resource_written(ctx, pfb->zsbuf->texture); - ctx->gmem_reason |= FD_GMEM_CLEARS_DEPTH_STENCIL; + resource_written(batch, pfb->zsbuf->texture); + batch->gmem_reason |= FD_GMEM_CLEARS_DEPTH_STENCIL; } - DBG("%x depth=%f, stencil=%u (%s/%s)", buffers, depth, stencil, + resource_written(batch, batch->query_buf); + + pipe_mutex_unlock(ctx->screen->lock); + + DBG("%p: %x %ux%u depth=%f, stencil=%u (%s/%s)", batch, buffers, + pfb->width, pfb->height, depth, stencil, util_format_short_name(pipe_surface_format(pfb->cbufs[0])), util_format_short_name(pipe_surface_format(pfb->zsbuf))); - fd_hw_query_set_stage(ctx, ctx->ring, FD_STAGE_CLEAR); + /* if per-gen backend doesn't implement ctx->clear() generic + * blitter clear: + */ + if (!ctx->clear) { + fd_blitter_clear(pctx, buffers, color, depth, stencil); + return; + } + + fd_hw_query_set_stage(batch, batch->draw, FD_STAGE_CLEAR); ctx->clear(ctx, buffers, color, depth, stencil); @@ -294,7 +369,8 @@ static void fd_clear_render_target(struct pipe_context *pctx, struct pipe_surface *ps, const union pipe_color_union *color, - unsigned x, unsigned y, unsigned w, unsigned h) + unsigned x, unsigned y, unsigned w, unsigned h, + bool render_condition_enabled) { DBG("TODO: x=%u, y=%u, w=%u, h=%u", x, y, w, h); } @@ -302,7 +378,8 @@ static void fd_clear_depth_stencil(struct pipe_context *pctx, struct pipe_surface *ps, unsigned buffers, double depth, unsigned stencil, - unsigned x, unsigned y, unsigned w, unsigned h) + unsigned x, unsigned y, unsigned w, unsigned h, + bool render_condition_enabled) { DBG("TODO: buffers=%u, depth=%f, stencil=%u, x=%u, y=%u, w=%u, h=%u", buffers, depth, stencil, x, y, w, h); @@ -311,8 +388,6 @@ void fd_draw_init(struct pipe_context *pctx) { - list_inithead(&fd_context(pctx)->used_resources); - pctx->draw_vbo = fd_draw_vbo; pctx->clear = fd_clear; pctx->clear_render_target = fd_clear_render_target; diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_draw.h mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_draw.h --- mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_draw.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_draw.h 2017-06-01 10:37:10.000000000 +0000 @@ -42,14 +42,14 @@ void fd_draw_init(struct pipe_context *pctx); static inline void -fd_draw(struct fd_context *ctx, struct fd_ringbuffer *ring, +fd_draw(struct fd_batch *batch, struct fd_ringbuffer *ring, enum pc_di_primtype primtype, enum pc_di_vis_cull_mode vismode, enum pc_di_src_sel src_sel, uint32_t count, uint8_t instances, enum pc_di_index_size idx_type, uint32_t idx_size, uint32_t idx_offset, - struct fd_bo *idx_bo) + struct pipe_resource *idx_buffer) { /* for debug after a lock up, write a unique counter value * to scratch7 for each draw, to make it easier to match up @@ -59,7 +59,7 @@ */ emit_marker(ring, 7); - if (is_a3xx_p0(ctx->screen)) { + if (is_a3xx_p0(batch->ctx->screen)) { /* dummy-draw workaround: */ OUT_PKT3(ring, CP_DRAW_INDX, 3); OUT_RING(ring, 0x00000000); @@ -74,26 +74,26 @@ OUT_RING(ring, 0); } - OUT_PKT3(ring, CP_DRAW_INDX, idx_bo ? 5 : 3); + OUT_PKT3(ring, CP_DRAW_INDX, idx_buffer ? 5 : 3); OUT_RING(ring, 0x00000000); /* viz query info. */ if (vismode == USE_VISIBILITY) { /* leave vis mode blank for now, it will be patched up when * we know if we are binning or not */ OUT_RINGP(ring, DRAW(primtype, src_sel, idx_type, 0, instances), - &ctx->draw_patches); + &batch->draw_patches); } else { OUT_RING(ring, DRAW(primtype, src_sel, idx_type, vismode, instances)); } OUT_RING(ring, count); /* NumIndices */ - if (idx_bo) { - OUT_RELOC(ring, idx_bo, idx_offset, 0, 0); + if (idx_buffer) { + OUT_RELOC(ring, fd_resource(idx_buffer)->bo, idx_offset, 0, 0); OUT_RING (ring, idx_size); } emit_marker(ring, 7); - fd_reset_wfi(ctx); + fd_reset_wfi(batch); } @@ -112,36 +112,37 @@ /* this is same for a2xx/a3xx, so split into helper: */ static inline void -fd_draw_emit(struct fd_context *ctx, struct fd_ringbuffer *ring, +fd_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring, enum pc_di_primtype primtype, enum pc_di_vis_cull_mode vismode, const struct pipe_draw_info *info) { - struct pipe_index_buffer *idx = &ctx->indexbuf; - struct fd_bo *idx_bo = NULL; + struct pipe_resource *idx_buffer = NULL; enum pc_di_index_size idx_type = INDEX_SIZE_IGN; enum pc_di_src_sel src_sel; uint32_t idx_size, idx_offset; if (info->indexed) { + struct pipe_index_buffer *idx = &batch->ctx->indexbuf; + assert(!idx->user_buffer); - idx_bo = fd_resource(idx->buffer)->bo; + idx_buffer = idx->buffer; idx_type = size2indextype(idx->index_size); idx_size = idx->index_size * info->count; idx_offset = idx->offset + (info->start * idx->index_size); src_sel = DI_SRC_SEL_DMA; } else { - idx_bo = NULL; + idx_buffer = NULL; idx_type = INDEX_SIZE_IGN; idx_size = 0; idx_offset = 0; src_sel = DI_SRC_SEL_AUTO_INDEX; } - fd_draw(ctx, ring, primtype, vismode, src_sel, + fd_draw(batch, ring, primtype, vismode, src_sel, info->count, info->instance_count - 1, - idx_type, idx_size, idx_offset, idx_bo); + idx_type, idx_size, idx_offset, idx_buffer); } #endif /* FREEDRENO_DRAW_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_fence.c mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_fence.c --- mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_fence.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_fence.c 2017-06-01 10:37:10.000000000 +0000 @@ -26,6 +26,8 @@ * Rob Clark */ +#include + #include "util/u_inlines.h" #include "freedreno_fence.h" @@ -36,35 +38,70 @@ struct pipe_reference reference; struct fd_context *ctx; struct fd_screen *screen; + int fence_fd; uint32_t timestamp; }; -void -fd_screen_fence_ref(struct pipe_screen *pscreen, +static void fd_fence_destroy(struct pipe_fence_handle *fence) +{ + if (fence->fence_fd != -1) + close(fence->fence_fd); + FREE(fence); +} + +void fd_fence_ref(struct pipe_screen *pscreen, struct pipe_fence_handle **ptr, struct pipe_fence_handle *pfence) { if (pipe_reference(&(*ptr)->reference, &pfence->reference)) - FREE(*ptr); + fd_fence_destroy(*ptr); *ptr = pfence; } -boolean fd_screen_fence_finish(struct pipe_screen *screen, +boolean fd_fence_finish(struct pipe_screen *pscreen, + struct pipe_context *ctx, struct pipe_fence_handle *fence, uint64_t timeout) { + if (fence->fence_fd != -1) { + int ret = sync_wait(fence->fence_fd, timeout / 1000000); + return ret == 0; + } + if (fd_pipe_wait_timeout(fence->screen->pipe, fence->timestamp, timeout)) return false; return true; } -struct pipe_fence_handle * fd_fence_create(struct pipe_context *pctx, - uint32_t timestamp) +void fd_create_fence_fd(struct pipe_context *pctx, + struct pipe_fence_handle **pfence, int fd) +{ + *pfence = fd_fence_create(fd_context(pctx), 0, dup(fd)); +} + +void fd_fence_server_sync(struct pipe_context *pctx, + struct pipe_fence_handle *fence) { - struct pipe_fence_handle *fence; struct fd_context *ctx = fd_context(pctx); + struct fd_batch *batch = ctx->batch; + + if (sync_accumulate("freedreno", &batch->in_fence_fd, fence->fence_fd)) { + /* error */ + } +} + +int fd_fence_get_fd(struct pipe_screen *pscreen, + struct pipe_fence_handle *fence) +{ + return dup(fence->fence_fd); +} + +struct pipe_fence_handle * fd_fence_create(struct fd_context *ctx, + uint32_t timestamp, int fence_fd) +{ + struct pipe_fence_handle *fence; fence = CALLOC_STRUCT(pipe_fence_handle); if (!fence) @@ -75,6 +112,7 @@ fence->ctx = ctx; fence->screen = ctx->screen; fence->timestamp = timestamp; + fence->fence_fd = fence_fd; return fence; } diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_fence.h mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_fence.h --- mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_fence.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_fence.h 2017-06-01 10:37:10.000000000 +0000 @@ -31,13 +31,22 @@ #include "pipe/p_context.h" -void fd_screen_fence_ref(struct pipe_screen *pscreen, +void fd_fence_ref(struct pipe_screen *pscreen, struct pipe_fence_handle **ptr, struct pipe_fence_handle *pfence); -boolean fd_screen_fence_finish(struct pipe_screen *screen, +boolean fd_fence_finish(struct pipe_screen *screen, + struct pipe_context *ctx, struct pipe_fence_handle *pfence, uint64_t timeout); -struct pipe_fence_handle * fd_fence_create(struct pipe_context *pctx, - uint32_t timestamp); +void fd_create_fence_fd(struct pipe_context *pctx, + struct pipe_fence_handle **pfence, int fd); +void fd_fence_server_sync(struct pipe_context *pctx, + struct pipe_fence_handle *fence); +int fd_fence_get_fd(struct pipe_screen *pscreen, + struct pipe_fence_handle *pfence); + +struct fd_context; +struct pipe_fence_handle * fd_fence_create(struct fd_context *ctx, + uint32_t timestamp, int fence_fd); #endif /* FREEDRENO_FENCE_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_gmem.c mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_gmem.c --- mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_gmem.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_gmem.c 2017-06-01 10:37:10.000000000 +0000 @@ -34,6 +34,7 @@ #include "freedreno_gmem.h" #include "freedreno_context.h" +#include "freedreno_fence.h" #include "freedreno_resource.h" #include "freedreno_query_hw.h" #include "freedreno_util.h" @@ -67,11 +68,11 @@ * resolve. */ -static uint32_t bin_width(struct fd_context *ctx) +static uint32_t bin_width(struct fd_screen *screen) { - if (is_a4xx(ctx->screen)) + if (is_a4xx(screen) || is_a5xx(screen)) return 1024; - if (is_a3xx(ctx->screen)) + if (is_a3xx(screen)) return 992; return 512; } @@ -103,20 +104,23 @@ } static void -calculate_tiles(struct fd_context *ctx) +calculate_tiles(struct fd_batch *batch) { + struct fd_context *ctx = batch->ctx; struct fd_gmem_stateobj *gmem = &ctx->gmem; - struct pipe_scissor_state *scissor = &ctx->max_scissor; - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; - uint32_t gmem_size = ctx->screen->gmemsize_bytes; + struct pipe_scissor_state *scissor = &batch->max_scissor; + struct pipe_framebuffer_state *pfb = &batch->framebuffer; + const uint32_t gmem_alignw = ctx->screen->gmem_alignw; + const uint32_t gmem_alignh = ctx->screen->gmem_alignh; + const uint32_t gmem_size = ctx->screen->gmemsize_bytes; uint32_t minx, miny, width, height; uint32_t nbins_x = 1, nbins_y = 1; uint32_t bin_w, bin_h; - uint32_t max_width = bin_width(ctx); + uint32_t max_width = bin_width(ctx->screen); uint8_t cbuf_cpp[MAX_RENDER_TARGETS] = {0}, zsbuf_cpp[2] = {0}; uint32_t i, j, t, xoff, yoff; uint32_t tpp_x, tpp_y; - bool has_zs = !!(ctx->resolve & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)); + bool has_zs = !!(batch->resolve & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)); int tile_n[ARRAY_SIZE(ctx->pipe)]; if (has_zs) { @@ -145,21 +149,22 @@ width = pfb->width; height = pfb->height; } else { - minx = scissor->minx & ~31; /* round down to multiple of 32 */ - miny = scissor->miny & ~31; + /* round down to multiple of alignment: */ + minx = scissor->minx & ~(gmem_alignw - 1); + miny = scissor->miny & ~(gmem_alignh - 1); width = scissor->maxx - minx; height = scissor->maxy - miny; } - bin_w = align(width, 32); - bin_h = align(height, 32); + bin_w = align(width, gmem_alignw); + bin_h = align(height, gmem_alignh); /* first, find a bin width that satisfies the maximum width * restrictions: */ while (bin_w > max_width) { nbins_x++; - bin_w = align(width / nbins_x, 32); + bin_w = align(width / nbins_x, gmem_alignw); } if (fd_mesa_debug & FD_DBG_MSGS) { @@ -176,10 +181,10 @@ while (total_size(cbuf_cpp, zsbuf_cpp, bin_w, bin_h, gmem) > gmem_size) { if (bin_w > bin_h) { nbins_x++; - bin_w = align(width / nbins_x, 32); + bin_w = align(width / nbins_x, gmem_alignw); } else { nbins_y++; - bin_h = align(height / nbins_y, 32); + bin_h = align(height / nbins_y, gmem_alignh); } } @@ -214,6 +219,9 @@ div_round_up(nbins_x, tpp_x)) > 8) tpp_x += 1; + gmem->maxpw = tpp_x; + gmem->maxph = tpp_y; + /* configure pipes: */ xoff = yoff = 0; for (i = 0; i < ARRAY_SIZE(ctx->pipe); i++) { @@ -302,14 +310,15 @@ } static void -render_tiles(struct fd_context *ctx) +render_tiles(struct fd_batch *batch) { + struct fd_context *ctx = batch->ctx; struct fd_gmem_stateobj *gmem = &ctx->gmem; int i; - ctx->emit_tile_init(ctx); + ctx->emit_tile_init(batch); - if (ctx->restore) + if (batch->restore) ctx->stats.batch_restore++; for (i = 0; i < (gmem->nbins_x * gmem->nbins_y); i++) { @@ -318,101 +327,115 @@ DBG("bin_h=%d, yoff=%d, bin_w=%d, xoff=%d", tile->bin_h, tile->yoff, tile->bin_w, tile->xoff); - ctx->emit_tile_prep(ctx, tile); + ctx->emit_tile_prep(batch, tile); - if (ctx->restore) { - fd_hw_query_set_stage(ctx, ctx->ring, FD_STAGE_MEM2GMEM); - ctx->emit_tile_mem2gmem(ctx, tile); - fd_hw_query_set_stage(ctx, ctx->ring, FD_STAGE_NULL); + if (batch->restore) { + ctx->emit_tile_mem2gmem(batch, tile); } - ctx->emit_tile_renderprep(ctx, tile); + ctx->emit_tile_renderprep(batch, tile); - fd_hw_query_prepare_tile(ctx, i, ctx->ring); + fd_hw_query_prepare_tile(batch, i, batch->gmem); /* emit IB to drawcmds: */ - ctx->emit_ib(ctx->ring, ctx->draw_start, ctx->draw_end); - fd_reset_wfi(ctx); + ctx->emit_ib(batch->gmem, batch->draw); + fd_reset_wfi(batch); /* emit gmem2mem to transfer tile back to system memory: */ - fd_hw_query_set_stage(ctx, ctx->ring, FD_STAGE_GMEM2MEM); - ctx->emit_tile_gmem2mem(ctx, tile); - fd_hw_query_set_stage(ctx, ctx->ring, FD_STAGE_NULL); + ctx->emit_tile_gmem2mem(batch, tile); } + + if (ctx->emit_tile_fini) + ctx->emit_tile_fini(batch); } static void -render_sysmem(struct fd_context *ctx) +render_sysmem(struct fd_batch *batch) { - ctx->emit_sysmem_prep(ctx); + struct fd_context *ctx = batch->ctx; + + ctx->emit_sysmem_prep(batch); - fd_hw_query_prepare_tile(ctx, 0, ctx->ring); + fd_hw_query_prepare_tile(batch, 0, batch->gmem); /* emit IB to drawcmds: */ - ctx->emit_ib(ctx->ring, ctx->draw_start, ctx->draw_end); - fd_reset_wfi(ctx); + ctx->emit_ib(batch->gmem, batch->draw); + fd_reset_wfi(batch); + + if (ctx->emit_sysmem_fini) + ctx->emit_sysmem_fini(batch); +} + +static void +flush_ring(struct fd_batch *batch) +{ + struct fd_context *ctx = batch->ctx; + int out_fence_fd = -1; + + fd_ringbuffer_flush2(batch->gmem, batch->in_fence_fd, + batch->needs_out_fence_fd ? &out_fence_fd : NULL); + + fd_fence_ref(&ctx->screen->base, &ctx->last_fence, NULL); + ctx->last_fence = fd_fence_create(ctx, + fd_ringbuffer_timestamp(batch->gmem), out_fence_fd); } void -fd_gmem_render_tiles(struct fd_context *ctx) +fd_gmem_render_tiles(struct fd_batch *batch) { - struct pipe_framebuffer_state *pfb = &ctx->framebuffer; + struct fd_context *ctx = batch->ctx; + struct pipe_framebuffer_state *pfb = &batch->framebuffer; bool sysmem = false; if (ctx->emit_sysmem_prep) { - if (ctx->cleared || ctx->gmem_reason || (ctx->num_draws > 5)) { + if (batch->cleared || batch->gmem_reason || (batch->num_draws > 5)) { DBG("GMEM: cleared=%x, gmem_reason=%x, num_draws=%u", - ctx->cleared, ctx->gmem_reason, ctx->num_draws); + batch->cleared, batch->gmem_reason, batch->num_draws); } else if (!(fd_mesa_debug & FD_DBG_NOBYPASS)) { sysmem = true; } } - /* close out the draw cmds by making sure any active queries are - * paused: - */ - fd_hw_query_set_stage(ctx, ctx->ring, FD_STAGE_NULL); - - /* mark the end of the clear/draw cmds before emitting per-tile cmds: */ - fd_ringmarker_mark(ctx->draw_end); - fd_ringmarker_mark(ctx->binning_end); - - fd_reset_wfi(ctx); + fd_reset_wfi(batch); ctx->stats.batch_total++; if (sysmem) { - DBG("rendering sysmem (%s/%s)", + DBG("%p: rendering sysmem %ux%u (%s/%s)", + batch, pfb->width, pfb->height, util_format_short_name(pipe_surface_format(pfb->cbufs[0])), util_format_short_name(pipe_surface_format(pfb->zsbuf))); - fd_hw_query_prepare(ctx, 1); - render_sysmem(ctx); + fd_hw_query_prepare(batch, 1); + render_sysmem(batch); ctx->stats.batch_sysmem++; } else { struct fd_gmem_stateobj *gmem = &ctx->gmem; - calculate_tiles(ctx); - DBG("rendering %dx%d tiles (%s/%s)", gmem->nbins_x, gmem->nbins_y, + calculate_tiles(batch); + DBG("%p: rendering %dx%d tiles %ux%u (%s/%s)", + batch, pfb->width, pfb->height, gmem->nbins_x, gmem->nbins_y, util_format_short_name(pipe_surface_format(pfb->cbufs[0])), util_format_short_name(pipe_surface_format(pfb->zsbuf))); - fd_hw_query_prepare(ctx, gmem->nbins_x * gmem->nbins_y); - render_tiles(ctx); + fd_hw_query_prepare(batch, gmem->nbins_x * gmem->nbins_y); + render_tiles(batch); ctx->stats.batch_gmem++; } - /* GPU executes starting from tile cmds, which IB back to draw cmds: */ - fd_ringmarker_flush(ctx->draw_end); - - /* mark start for next draw/binning cmds: */ - fd_ringmarker_mark(ctx->draw_start); - fd_ringmarker_mark(ctx->binning_start); - - fd_reset_wfi(ctx); + flush_ring(batch); +} - /* reset maximal bounds: */ - ctx->max_scissor.minx = ctx->max_scissor.miny = ~0; - ctx->max_scissor.maxx = ctx->max_scissor.maxy = 0; +/* special case for when we need to create a fence but have no rendering + * to flush.. just emit a no-op string-marker packet. + */ +void +fd_gmem_render_noop(struct fd_batch *batch) +{ + struct fd_context *ctx = batch->ctx; + struct pipe_context *pctx = &ctx->base; - ctx->dirty = ~0; + pctx->emit_string_marker(pctx, "noop", 4); + /* emit IB to drawcmds (which contain the string marker): */ + ctx->emit_ib(batch->gmem, batch->draw); + flush_ring(batch); } /* tile needs restore if it isn't completely contained within the @@ -435,26 +458,26 @@ * case would be a single clear. */ bool -fd_gmem_needs_restore(struct fd_context *ctx, struct fd_tile *tile, +fd_gmem_needs_restore(struct fd_batch *batch, struct fd_tile *tile, uint32_t buffers) { - if (!(ctx->restore & buffers)) + if (!(batch->restore & buffers)) return false; /* if buffers partially cleared, then slow-path to figure out * if this particular tile needs restoring: */ if ((buffers & FD_BUFFER_COLOR) && - (ctx->partial_cleared & FD_BUFFER_COLOR) && - skip_restore(&ctx->cleared_scissor.color, tile)) + (batch->partial_cleared & FD_BUFFER_COLOR) && + skip_restore(&batch->cleared_scissor.color, tile)) return false; if ((buffers & FD_BUFFER_DEPTH) && - (ctx->partial_cleared & FD_BUFFER_DEPTH) && - skip_restore(&ctx->cleared_scissor.depth, tile)) + (batch->partial_cleared & FD_BUFFER_DEPTH) && + skip_restore(&batch->cleared_scissor.depth, tile)) return false; if ((buffers & FD_BUFFER_STENCIL) && - (ctx->partial_cleared & FD_BUFFER_STENCIL) && - skip_restore(&ctx->cleared_scissor.stencil, tile)) + (batch->partial_cleared & FD_BUFFER_STENCIL) && + skip_restore(&batch->cleared_scissor.stencil, tile)) return false; return true; diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_gmem.h mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_gmem.h --- mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_gmem.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_gmem.h 2017-06-01 10:37:10.000000000 +0000 @@ -57,13 +57,15 @@ uint16_t bin_w, nbins_x; uint16_t minx, miny; uint16_t width, height; + uint16_t maxpw, maxph; /* maximum pipe width/height */ }; -struct fd_context; +struct fd_batch; -void fd_gmem_render_tiles(struct fd_context *ctx); +void fd_gmem_render_tiles(struct fd_batch *batch); +void fd_gmem_render_noop(struct fd_batch *batch); -bool fd_gmem_needs_restore(struct fd_context *ctx, struct fd_tile *tile, +bool fd_gmem_needs_restore(struct fd_batch *batch, struct fd_tile *tile, uint32_t buffers); #endif /* FREEDRENO_GMEM_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_program.c mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_program.c --- mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_program.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_program.c 2017-06-01 10:37:10.000000000 +0000 @@ -81,7 +81,8 @@ .tokens = toks, }; - tgsi_text_translate(src, toks, ARRAY_SIZE(toks)); + bool ret = tgsi_text_translate(src, toks, ARRAY_SIZE(toks)); + assume(ret); if (frag) return pctx->create_fs_state(pctx, &cso); diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_query_hw.c mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_query_hw.c --- mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_query_hw.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_query_hw.c 2017-06-01 10:37:10.000000000 +0000 @@ -32,6 +32,7 @@ #include "freedreno_query_hw.h" #include "freedreno_context.h" +#include "freedreno_resource.h" #include "freedreno_util.h" struct fd_hw_sample_period { @@ -47,37 +48,48 @@ return 0; case PIPE_QUERY_OCCLUSION_PREDICATE: return 1; + /* TODO currently queries only emitted in main pass (not in binning pass).. + * which is fine for occlusion query, but pretty much not anything else. + */ case PIPE_QUERY_TIME_ELAPSED: return 2; + case PIPE_QUERY_TIMESTAMP: + return 3; default: return -1; } } static struct fd_hw_sample * -get_sample(struct fd_context *ctx, struct fd_ringbuffer *ring, +get_sample(struct fd_batch *batch, struct fd_ringbuffer *ring, unsigned query_type) { + struct fd_context *ctx = batch->ctx; struct fd_hw_sample *samp = NULL; int idx = pidx(query_type); - if (!ctx->sample_cache[idx]) { - ctx->sample_cache[idx] = - ctx->sample_providers[idx]->get_sample(ctx, ring); + assume(idx >= 0); /* query never would have been created otherwise */ + + if (!batch->sample_cache[idx]) { + struct fd_hw_sample *new_samp = + ctx->sample_providers[idx]->get_sample(batch, ring); + fd_hw_sample_reference(ctx, &batch->sample_cache[idx], new_samp); + util_dynarray_append(&batch->samples, struct fd_hw_sample *, new_samp); + batch->needs_flush = true; } - fd_hw_sample_reference(ctx, &samp, ctx->sample_cache[idx]); + fd_hw_sample_reference(ctx, &samp, batch->sample_cache[idx]); return samp; } static void -clear_sample_cache(struct fd_context *ctx) +clear_sample_cache(struct fd_batch *batch) { int i; - for (i = 0; i < ARRAY_SIZE(ctx->sample_cache); i++) - fd_hw_sample_reference(ctx, &ctx->sample_cache[i], NULL); + for (i = 0; i < ARRAY_SIZE(batch->sample_cache); i++) + fd_hw_sample_reference(batch->ctx, &batch->sample_cache[i], NULL); } static bool @@ -88,40 +100,44 @@ static void -resume_query(struct fd_context *ctx, struct fd_hw_query *hq, +resume_query(struct fd_batch *batch, struct fd_hw_query *hq, struct fd_ringbuffer *ring) { int idx = pidx(hq->provider->query_type); + DBG("%p", hq); + assert(idx >= 0); /* query never would have been created otherwise */ assert(!hq->period); - ctx->active_providers |= (1 << idx); - hq->period = util_slab_alloc(&ctx->sample_period_pool); + batch->active_providers |= (1 << idx); + hq->period = slab_alloc_st(&batch->ctx->sample_period_pool); list_inithead(&hq->period->list); - hq->period->start = get_sample(ctx, ring, hq->base.type); - /* NOTE: util_slab_alloc() does not zero out the buffer: */ + hq->period->start = get_sample(batch, ring, hq->base.type); + /* NOTE: slab_alloc_st() does not zero out the buffer: */ hq->period->end = NULL; } static void -pause_query(struct fd_context *ctx, struct fd_hw_query *hq, +pause_query(struct fd_batch *batch, struct fd_hw_query *hq, struct fd_ringbuffer *ring) { int idx = pidx(hq->provider->query_type); + DBG("%p", hq); + assert(idx >= 0); /* query never would have been created otherwise */ assert(hq->period && !hq->period->end); - assert(ctx->active_providers & (1 << idx)); - hq->period->end = get_sample(ctx, ring, hq->base.type); - list_addtail(&hq->period->list, &hq->current_periods); + assert(batch->active_providers & (1 << idx)); + hq->period->end = get_sample(batch, ring, hq->base.type); + list_addtail(&hq->period->list, &hq->periods); hq->period = NULL; } static void -destroy_periods(struct fd_context *ctx, struct list_head *list) +destroy_periods(struct fd_context *ctx, struct fd_hw_query *hq) { struct fd_hw_sample_period *period, *s; - LIST_FOR_EACH_ENTRY_SAFE(period, s, list, list) { + LIST_FOR_EACH_ENTRY_SAFE(period, s, &hq->periods, list) { fd_hw_sample_reference(ctx, &period->start, NULL); fd_hw_sample_reference(ctx, &period->end, NULL); list_del(&period->list); - util_slab_free(&ctx->sample_period_pool, period); + slab_free_st(&ctx->sample_period_pool, period); } } @@ -130,8 +146,9 @@ { struct fd_hw_query *hq = fd_hw_query(q); - destroy_periods(ctx, &hq->periods); - destroy_periods(ctx, &hq->current_periods); + DBG("%p: active=%d", q, q->active); + + destroy_periods(ctx, hq); list_del(&hq->list); free(hq); @@ -140,42 +157,53 @@ static boolean fd_hw_begin_query(struct fd_context *ctx, struct fd_query *q) { + struct fd_batch *batch = ctx->batch; struct fd_hw_query *hq = fd_hw_query(q); + + DBG("%p: active=%d", q, q->active); + if (q->active) return false; /* begin_query() should clear previous results: */ - destroy_periods(ctx, &hq->periods); + destroy_periods(ctx, hq); - if (is_active(hq, ctx->stage)) - resume_query(ctx, hq, ctx->ring); + if (batch && is_active(hq, batch->stage)) + resume_query(batch, hq, batch->draw); q->active = true; /* add to active list: */ - list_del(&hq->list); + assert(list_empty(&hq->list)); list_addtail(&hq->list, &ctx->active_queries); - return true; + + return true; } static void fd_hw_end_query(struct fd_context *ctx, struct fd_query *q) { + struct fd_batch *batch = ctx->batch; struct fd_hw_query *hq = fd_hw_query(q); + /* there are a couple special cases, which don't have * a matching ->begin_query(): */ if (skip_begin_query(q->type) && !q->active) { fd_hw_begin_query(ctx, q); } + + DBG("%p: active=%d", q, q->active); + if (!q->active) return; - if (is_active(hq, ctx->stage)) - pause_query(ctx, hq, ctx->ring); + + if (batch && is_active(hq, batch->stage)) + pause_query(batch, hq, batch->draw); + q->active = false; - /* move to current list: */ - list_del(&hq->list); - list_addtail(&hq->list, &ctx->current_queries); + /* remove from active list: */ + list_delinit(&hq->list); } /* helper to get ptr to specified sample: */ @@ -192,30 +220,17 @@ const struct fd_hw_sample_provider *p = hq->provider; struct fd_hw_sample_period *period; + DBG("%p: wait=%d, active=%d", q, wait, q->active); + if (q->active) return false; - /* if the app tries to read back the query result before the - * batch is submitted, that forces us to flush so that there - * are actually results to wait for: - */ - if (!LIST_IS_EMPTY(&hq->list)) { - /* if app didn't actually trigger any cmdstream, then - * we have nothing to do: - */ - if (!ctx->needs_flush) - return true; - DBG("reading query result forces flush!"); - fd_context_render(&ctx->base); - } - util_query_clear_result(result, q->type); if (LIST_IS_EMPTY(&hq->periods)) return true; assert(LIST_IS_EMPTY(&hq->list)); - assert(LIST_IS_EMPTY(&hq->current_periods)); assert(!hq->period); /* if !wait, then check the last sample (the one most likely to @@ -227,12 +242,29 @@ period = LIST_ENTRY(struct fd_hw_sample_period, hq->periods.prev, list); - ret = fd_bo_cpu_prep(period->end->bo, ctx->screen->pipe, + struct fd_resource *rsc = fd_resource(period->end->prsc); + + if (pending(rsc, false)) { + /* piglit spec@arb_occlusion_query@occlusion_query_conform + * test, and silly apps perhaps, get stuck in a loop trying + * to get query result forever with wait==false.. we don't + * wait to flush unnecessarily but we also don't want to + * spin forever: + */ + if (hq->no_wait_cnt++ > 5) + fd_batch_flush(rsc->write_batch, false); + return false; + } + + if (!rsc->bo) + return false; + + ret = fd_bo_cpu_prep(rsc->bo, ctx->screen->pipe, DRM_FREEDRENO_PREP_READ | DRM_FREEDRENO_PREP_NOSYNC); if (ret) return false; - fd_bo_cpu_fini(period->end->bo); + fd_bo_cpu_fini(rsc->bo); } /* sum the result across all sample periods: */ @@ -242,22 +274,28 @@ unsigned i; /* start and end samples should be from same batch: */ - assert(start->bo == end->bo); + assert(start->prsc == end->prsc); assert(start->num_tiles == end->num_tiles); - for (i = 0; i < start->num_tiles; i++) { - void *ptr; + struct fd_resource *rsc = fd_resource(start->prsc); + + if (rsc->write_batch) + fd_batch_flush(rsc->write_batch, true); - fd_bo_cpu_prep(start->bo, ctx->screen->pipe, - DRM_FREEDRENO_PREP_READ); + /* some piglit tests at least do query with no draws, I guess: */ + if (!rsc->bo) + continue; - ptr = fd_bo_map(start->bo); + fd_bo_cpu_prep(rsc->bo, ctx->screen->pipe, DRM_FREEDRENO_PREP_READ); + void *ptr = fd_bo_map(rsc->bo); + + for (i = 0; i < start->num_tiles; i++) { p->accumulate_result(ctx, sampptr(period->start, i, ptr), sampptr(period->end, i, ptr), result); - - fd_bo_cpu_fini(start->bo); } + + fd_bo_cpu_fini(rsc->bo); } return true; @@ -284,10 +322,11 @@ if (!hq) return NULL; + DBG("%p: query_type=%u", hq, query_type); + hq->provider = ctx->sample_providers[idx]; list_inithead(&hq->periods); - list_inithead(&hq->current_periods); list_inithead(&hq->list); q = &hq->base; @@ -298,125 +337,91 @@ } struct fd_hw_sample * -fd_hw_sample_init(struct fd_context *ctx, uint32_t size) +fd_hw_sample_init(struct fd_batch *batch, uint32_t size) { - struct fd_hw_sample *samp = util_slab_alloc(&ctx->sample_pool); + struct fd_hw_sample *samp = slab_alloc_st(&batch->ctx->sample_pool); pipe_reference_init(&samp->reference, 1); samp->size = size; debug_assert(util_is_power_of_two(size)); - ctx->next_sample_offset = align(ctx->next_sample_offset, size); - samp->offset = ctx->next_sample_offset; - /* NOTE: util_slab_alloc() does not zero out the buffer: */ - samp->bo = NULL; + batch->next_sample_offset = align(batch->next_sample_offset, size); + samp->offset = batch->next_sample_offset; + /* NOTE: slab_alloc_st() does not zero out the buffer: */ + samp->prsc = NULL; samp->num_tiles = 0; samp->tile_stride = 0; - ctx->next_sample_offset += size; - return samp; -} - -void -__fd_hw_sample_destroy(struct fd_context *ctx, struct fd_hw_sample *samp) -{ - if (samp->bo) - fd_bo_del(samp->bo); - util_slab_free(&ctx->sample_pool, samp); -} + batch->next_sample_offset += size; -static void -prepare_sample(struct fd_hw_sample *samp, struct fd_bo *bo, - uint32_t num_tiles, uint32_t tile_stride) -{ - if (samp->bo) { - assert(samp->bo == bo); - assert(samp->num_tiles == num_tiles); - assert(samp->tile_stride == tile_stride); - return; + if (!batch->query_buf) { + struct pipe_screen *pscreen = &batch->ctx->screen->base; + struct pipe_resource templ = { + .target = PIPE_BUFFER, + .format = PIPE_FORMAT_R8_UNORM, + .bind = PIPE_BIND_QUERY_BUFFER, + .width0 = 0, /* create initially zero size buffer */ + .height0 = 1, + .depth0 = 1, + .array_size = 1, + .last_level = 0, + .nr_samples = 1, + }; + batch->query_buf = pscreen->resource_create(pscreen, &templ); } - samp->bo = fd_bo_ref(bo); - samp->num_tiles = num_tiles; - samp->tile_stride = tile_stride; -} - -static void -prepare_query(struct fd_hw_query *hq, struct fd_bo *bo, - uint32_t num_tiles, uint32_t tile_stride) -{ - struct fd_hw_sample_period *period, *s; - /* prepare all the samples in the query: */ - LIST_FOR_EACH_ENTRY_SAFE(period, s, &hq->current_periods, list) { - prepare_sample(period->start, bo, num_tiles, tile_stride); - prepare_sample(period->end, bo, num_tiles, tile_stride); + pipe_resource_reference(&samp->prsc, batch->query_buf); - /* move from current_periods list to periods list: */ - list_del(&period->list); - list_addtail(&period->list, &hq->periods); - } + return samp; } -static void -prepare_queries(struct fd_context *ctx, struct fd_bo *bo, - uint32_t num_tiles, uint32_t tile_stride, - struct list_head *list, bool remove) -{ - struct fd_hw_query *hq, *s; - LIST_FOR_EACH_ENTRY_SAFE(hq, s, list, list) { - prepare_query(hq, bo, num_tiles, tile_stride); - if (remove) - list_delinit(&hq->list); - } +void +__fd_hw_sample_destroy(struct fd_context *ctx, struct fd_hw_sample *samp) +{ + pipe_resource_reference(&samp->prsc, NULL); + slab_free_st(&ctx->sample_pool, samp); } /* called from gmem code once total storage requirements are known (ie. * number of samples times number of tiles) */ void -fd_hw_query_prepare(struct fd_context *ctx, uint32_t num_tiles) +fd_hw_query_prepare(struct fd_batch *batch, uint32_t num_tiles) { - uint32_t tile_stride = ctx->next_sample_offset; - struct fd_bo *bo; + uint32_t tile_stride = batch->next_sample_offset; - if (ctx->query_bo) - fd_bo_del(ctx->query_bo); + if (tile_stride > 0) + fd_resource_resize(batch->query_buf, tile_stride * num_tiles); - if (tile_stride > 0) { - bo = fd_bo_new(ctx->dev, tile_stride * num_tiles, - DRM_FREEDRENO_GEM_CACHE_WCOMBINE | - DRM_FREEDRENO_GEM_TYPE_KMEM); - } else { - bo = NULL; - } - - ctx->query_bo = bo; - ctx->query_tile_stride = tile_stride; + batch->query_tile_stride = tile_stride; - prepare_queries(ctx, bo, num_tiles, tile_stride, - &ctx->active_queries, false); - prepare_queries(ctx, bo, num_tiles, tile_stride, - &ctx->current_queries, true); + while (batch->samples.size > 0) { + struct fd_hw_sample *samp = + util_dynarray_pop(&batch->samples, struct fd_hw_sample *); + samp->num_tiles = num_tiles; + samp->tile_stride = tile_stride; + fd_hw_sample_reference(batch->ctx, &samp, NULL); + } /* reset things for next batch: */ - ctx->next_sample_offset = 0; + batch->next_sample_offset = 0; } void -fd_hw_query_prepare_tile(struct fd_context *ctx, uint32_t n, +fd_hw_query_prepare_tile(struct fd_batch *batch, uint32_t n, struct fd_ringbuffer *ring) { - uint32_t tile_stride = ctx->query_tile_stride; + uint32_t tile_stride = batch->query_tile_stride; uint32_t offset = tile_stride * n; /* bail if no queries: */ if (tile_stride == 0) return; - fd_wfi(ctx, ring); + fd_wfi(batch, ring); OUT_PKT0 (ring, HW_QUERY_BASE_REG, 1); - OUT_RELOCW(ring, ctx->query_bo, offset, 0, 0); + OUT_RELOCW(ring, fd_resource(batch->query_buf)->bo, offset, 0, 0); } void -fd_hw_query_set_stage(struct fd_context *ctx, struct fd_ringbuffer *ring, +fd_hw_query_set_stage(struct fd_batch *batch, struct fd_ringbuffer *ring, enum fd_render_stage stage) { /* special case: internal blits (like mipmap level generation) @@ -425,24 +430,24 @@ * don't enable queries which should be paused during internal * blits: */ - if ((ctx->stage == FD_STAGE_BLIT) && + if ((batch->stage == FD_STAGE_BLIT) && (stage != FD_STAGE_NULL)) return; - if (stage != ctx->stage) { + if (stage != batch->stage) { struct fd_hw_query *hq; - LIST_FOR_EACH_ENTRY(hq, &ctx->active_queries, list) { - bool was_active = is_active(hq, ctx->stage); + LIST_FOR_EACH_ENTRY(hq, &batch->ctx->active_queries, list) { + bool was_active = is_active(hq, batch->stage); bool now_active = is_active(hq, stage); if (now_active && !was_active) - resume_query(ctx, hq, ring); + resume_query(batch, hq, ring); else if (was_active && !now_active) - pause_query(ctx, hq, ring); + pause_query(batch, hq, ring); } } - clear_sample_cache(ctx); - ctx->stage = stage; + clear_sample_cache(batch); + batch->stage = stage; } /* call the provider->enable() for all the hw queries that were active @@ -450,16 +455,17 @@ * for the duration of the batch. */ void -fd_hw_query_enable(struct fd_context *ctx, struct fd_ringbuffer *ring) +fd_hw_query_enable(struct fd_batch *batch, struct fd_ringbuffer *ring) { + struct fd_context *ctx = batch->ctx; for (int idx = 0; idx < MAX_HW_SAMPLE_PROVIDERS; idx++) { - if (ctx->active_providers & (1 << idx)) { + if (batch->active_providers & (1 << idx)) { assert(ctx->sample_providers[idx]); if (ctx->sample_providers[idx]->enable) ctx->sample_providers[idx]->enable(ctx, ring); } } - ctx->active_providers = 0; /* clear it for next frame */ + batch->active_providers = 0; /* clear it for next frame */ } void @@ -480,12 +486,11 @@ { struct fd_context *ctx = fd_context(pctx); - util_slab_create(&ctx->sample_pool, sizeof(struct fd_hw_sample), - 16, UTIL_SLAB_SINGLETHREADED); - util_slab_create(&ctx->sample_period_pool, sizeof(struct fd_hw_sample_period), - 16, UTIL_SLAB_SINGLETHREADED); + slab_create(&ctx->sample_pool, sizeof(struct fd_hw_sample), + 16); + slab_create(&ctx->sample_period_pool, sizeof(struct fd_hw_sample_period), + 16); list_inithead(&ctx->active_queries); - list_inithead(&ctx->current_queries); } void @@ -493,6 +498,6 @@ { struct fd_context *ctx = fd_context(pctx); - util_slab_destroy(&ctx->sample_pool); - util_slab_destroy(&ctx->sample_period_pool); + slab_destroy(&ctx->sample_pool); + slab_destroy(&ctx->sample_period_pool); } diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_query_hw.h mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_query_hw.h --- mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_query_hw.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_query_hw.h 2017-06-01 10:37:10.000000000 +0000 @@ -84,7 +84,7 @@ /* when a new sample is required, emit appropriate cmdstream * and return a sample object: */ - struct fd_hw_sample *(*get_sample)(struct fd_context *ctx, + struct fd_hw_sample *(*get_sample)(struct fd_batch *batch, struct fd_ringbuffer *ring); /* accumulate the results from specified sample period: */ @@ -107,7 +107,7 @@ * This way we can defer allocation until total # of requested * samples, and total # of tiles, is known. */ - struct fd_bo *bo; + struct pipe_resource *prsc; uint32_t num_tiles; uint32_t tile_stride; }; @@ -119,18 +119,17 @@ const struct fd_hw_sample_provider *provider; - /* list of fd_hw_sample_period in previous submits: */ + /* list of fd_hw_sample_periods: */ struct list_head periods; - /* list of fd_hw_sample_period's in current submit: */ - struct list_head current_periods; - /* if active and not paused, the current sample period (not * yet added to current_periods): */ struct fd_hw_sample_period *period; - struct list_head list; /* list-node in ctx->active_queries */ + struct list_head list; /* list-node in batch->active_queries */ + + int no_wait_cnt; /* see fd_hw_get_query_result */ }; static inline struct fd_hw_query * @@ -141,15 +140,15 @@ struct fd_query * fd_hw_create_query(struct fd_context *ctx, unsigned query_type); /* helper for sample providers: */ -struct fd_hw_sample * fd_hw_sample_init(struct fd_context *ctx, uint32_t size); +struct fd_hw_sample * fd_hw_sample_init(struct fd_batch *batch, uint32_t size); /* don't call directly, use fd_hw_sample_reference() */ void __fd_hw_sample_destroy(struct fd_context *ctx, struct fd_hw_sample *samp); -void fd_hw_query_prepare(struct fd_context *ctx, uint32_t num_tiles); -void fd_hw_query_prepare_tile(struct fd_context *ctx, uint32_t n, +void fd_hw_query_prepare(struct fd_batch *batch, uint32_t num_tiles); +void fd_hw_query_prepare_tile(struct fd_batch *batch, uint32_t n, struct fd_ringbuffer *ring); -void fd_hw_query_set_stage(struct fd_context *ctx, +void fd_hw_query_set_stage(struct fd_batch *batch, struct fd_ringbuffer *ring, enum fd_render_stage stage); -void fd_hw_query_enable(struct fd_context *ctx, struct fd_ringbuffer *ring); +void fd_hw_query_enable(struct fd_batch *batch, struct fd_ringbuffer *ring); void fd_hw_query_register_provider(struct pipe_context *pctx, const struct fd_hw_sample_provider *provider); void fd_hw_query_init(struct pipe_context *pctx); @@ -163,8 +162,7 @@ if (pipe_reference(&(*ptr)->reference, &samp->reference)) __fd_hw_sample_destroy(ctx, old_samp); - if (ptr) - *ptr = samp; + *ptr = samp; } #endif /* FREEDRENO_QUERY_HW_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_resource.c mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_resource.c --- mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_resource.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_resource.c 2017-06-01 10:37:10.000000000 +0000 @@ -33,8 +33,10 @@ #include "util/u_transfer.h" #include "util/u_string.h" #include "util/u_surface.h" +#include "util/set.h" #include "freedreno_resource.h" +#include "freedreno_batch_cache.h" #include "freedreno_screen.h" #include "freedreno_surface.h" #include "freedreno_context.h" @@ -46,13 +48,6 @@ /* XXX this should go away, needed for 'struct winsys_handle' */ #include "state_tracker/drm_driver.h" -static bool -pending(struct fd_resource *rsc, enum fd_resource_status status) -{ - return (rsc->status & status) || - (rsc->stencil && (rsc->stencil->status & status)); -} - static void fd_invalidate_resource(struct fd_context *ctx, struct pipe_resource *prsc) { @@ -108,10 +103,183 @@ rsc->bo = fd_bo_new(screen->dev, size, flags); rsc->timestamp = 0; - rsc->status = 0; - rsc->pending_ctx = NULL; - list_delinit(&rsc->list); util_range_set_empty(&rsc->valid_buffer_range); + fd_bc_invalidate_resource(rsc, true); +} + +static void +do_blit(struct fd_context *ctx, const struct pipe_blit_info *blit, bool fallback) +{ + /* TODO size threshold too?? */ + if ((blit->src.resource->target != PIPE_BUFFER) && !fallback) { + /* do blit on gpu: */ + fd_blitter_pipe_begin(ctx, false, true, FD_STAGE_BLIT); + util_blitter_blit(ctx->blitter, blit); + fd_blitter_pipe_end(ctx); + } else { + /* do blit on cpu: */ + util_resource_copy_region(&ctx->base, + blit->dst.resource, blit->dst.level, blit->dst.box.x, + blit->dst.box.y, blit->dst.box.z, + blit->src.resource, blit->src.level, &blit->src.box); + } +} + +static bool +fd_try_shadow_resource(struct fd_context *ctx, struct fd_resource *rsc, + unsigned level, unsigned usage, const struct pipe_box *box) +{ + struct pipe_context *pctx = &ctx->base; + struct pipe_resource *prsc = &rsc->base.b; + bool fallback = false; + + if (prsc->next) + return false; + + /* TODO: somehow munge dimensions and format to copy unsupported + * render target format to something that is supported? + */ + if (!pctx->screen->is_format_supported(pctx->screen, + prsc->format, prsc->target, prsc->nr_samples, + PIPE_BIND_RENDER_TARGET)) + fallback = true; + + /* these cases should be handled elsewhere.. just for future + * reference in case this gets split into a more generic(ish) + * helper. + */ + debug_assert(!(usage & PIPE_TRANSFER_READ)); + debug_assert(!(usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE)); + + /* if we do a gpu blit to clone the whole resource, we'll just + * end up stalling on that.. so only allow if we can discard + * current range (and blit, possibly cpu or gpu, the rest) + */ + if (!(usage & PIPE_TRANSFER_DISCARD_RANGE)) + return false; + + bool whole_level = util_texrange_covers_whole_level(prsc, level, + box->x, box->y, box->z, box->width, box->height, box->depth); + + /* TODO need to be more clever about current level */ + if ((prsc->target >= PIPE_TEXTURE_2D) && !whole_level) + return false; + + struct pipe_resource *pshadow = + pctx->screen->resource_create(pctx->screen, prsc); + + if (!pshadow) + return false; + + assert(!ctx->in_shadow); + ctx->in_shadow = true; + + /* get rid of any references that batch-cache might have to us (which + * should empty/destroy rsc->batches hashset) + */ + fd_bc_invalidate_resource(rsc, false); + + pipe_mutex_lock(ctx->screen->lock); + + /* Swap the backing bo's, so shadow becomes the old buffer, + * blit from shadow to new buffer. From here on out, we + * cannot fail. + * + * Note that we need to do it in this order, otherwise if + * we go down cpu blit path, the recursive transfer_map() + * sees the wrong status.. + */ + struct fd_resource *shadow = fd_resource(pshadow); + + DBG("shadow: %p (%d) -> %p (%d)\n", rsc, rsc->base.b.reference.count, + shadow, shadow->base.b.reference.count); + + /* TODO valid_buffer_range?? */ + swap(rsc->bo, shadow->bo); + swap(rsc->timestamp, shadow->timestamp); + swap(rsc->write_batch, shadow->write_batch); + + /* at this point, the newly created shadow buffer is not referenced + * by any batches, but the existing rsc (probably) is. We need to + * transfer those references over: + */ + debug_assert(shadow->batch_mask == 0); + struct fd_batch *batch; + foreach_batch(batch, &ctx->screen->batch_cache, rsc->batch_mask) { + struct set_entry *entry = _mesa_set_search(batch->resources, rsc); + _mesa_set_remove(batch->resources, entry); + _mesa_set_add(batch->resources, shadow); + } + swap(rsc->batch_mask, shadow->batch_mask); + + pipe_mutex_unlock(ctx->screen->lock); + + struct pipe_blit_info blit = {0}; + blit.dst.resource = prsc; + blit.dst.format = prsc->format; + blit.src.resource = pshadow; + blit.src.format = pshadow->format; + blit.mask = util_format_get_mask(prsc->format); + blit.filter = PIPE_TEX_FILTER_NEAREST; + +#define set_box(field, val) do { \ + blit.dst.field = (val); \ + blit.src.field = (val); \ + } while (0) + + /* blit the other levels in their entirety: */ + for (unsigned l = 0; l <= prsc->last_level; l++) { + if (l == level) + continue; + + /* just blit whole level: */ + set_box(level, l); + set_box(box.width, u_minify(prsc->width0, l)); + set_box(box.height, u_minify(prsc->height0, l)); + set_box(box.depth, u_minify(prsc->depth0, l)); + + do_blit(ctx, &blit, fallback); + } + + /* deal w/ current level specially, since we might need to split + * it up into a couple blits: + */ + if (!whole_level) { + set_box(level, level); + + switch (prsc->target) { + case PIPE_BUFFER: + case PIPE_TEXTURE_1D: + set_box(box.y, 0); + set_box(box.z, 0); + set_box(box.height, 1); + set_box(box.depth, 1); + + if (box->x > 0) { + set_box(box.x, 0); + set_box(box.width, box->x); + + do_blit(ctx, &blit, fallback); + } + if ((box->x + box->width) < u_minify(prsc->width0, level)) { + set_box(box.x, box->x + box->width); + set_box(box.width, u_minify(prsc->width0, level) - (box->x + box->width)); + + do_blit(ctx, &blit, fallback); + } + break; + case PIPE_TEXTURE_2D: + /* TODO */ + default: + unreachable("TODO"); + } + } + + ctx->in_shadow = false; + + pipe_resource_reference(&pshadow, NULL); + + return true; } static unsigned @@ -260,7 +428,7 @@ ptrans->box.x + ptrans->box.width); pipe_resource_reference(&ptrans->resource, NULL); - util_slab_free(&ctx->transfer_pool, ptrans); + slab_free(&ctx->transfer_pool, ptrans); free(trans->staging); } @@ -286,11 +454,11 @@ DBG("prsc=%p, level=%u, usage=%x, box=%dx%d+%d,%d", prsc, level, usage, box->width, box->height, box->x, box->y); - ptrans = util_slab_alloc(&ctx->transfer_pool); + ptrans = slab_alloc(&ctx->transfer_pool); if (!ptrans) return NULL; - /* util_slab_alloc() doesn't zero: */ + /* slab_alloc_st() doesn't zero: */ trans = fd_transfer(ptrans); memset(trans, 0, sizeof(*trans)); @@ -301,6 +469,9 @@ ptrans->stride = util_format_get_nblocksx(format, slice->pitch) * rsc->cpp; ptrans->layer_stride = rsc->layer_first ? rsc->layer_size : slice->size0; + if (ctx->in_shadow && !(usage & PIPE_TRANSFER_READ)) + usage |= PIPE_TRANSFER_UNSYNCHRONIZED; + if (usage & PIPE_TRANSFER_READ) op |= DRM_FREEDRENO_PREP_READ; @@ -320,21 +491,67 @@ * to wait. */ } else if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) { + struct fd_batch *write_batch = NULL; + + /* hold a reference, so it doesn't disappear under us: */ + fd_batch_reference(&write_batch, rsc->write_batch); + + if ((usage & PIPE_TRANSFER_WRITE) && write_batch && + write_batch->back_blit) { + /* if only thing pending is a back-blit, we can discard it: */ + fd_batch_reset(write_batch); + } + /* If the GPU is writing to the resource, or if it is reading from the * resource and we're trying to write to it, flush the renders. */ - if (((ptrans->usage & PIPE_TRANSFER_WRITE) && - pending(rsc, FD_PENDING_READ | FD_PENDING_WRITE)) || - pending(rsc, FD_PENDING_WRITE)) - fd_context_render(pctx); + bool needs_flush = pending(rsc, !!(usage & PIPE_TRANSFER_WRITE)); + bool busy = needs_flush || (0 != fd_bo_cpu_prep(rsc->bo, + ctx->screen->pipe, op | DRM_FREEDRENO_PREP_NOSYNC)); + + /* if we need to flush/stall, see if we can make a shadow buffer + * to avoid this: + * + * TODO we could go down this path !reorder && !busy_for_read + * ie. we only *don't* want to go down this path if the blit + * will trigger a flush! + */ + if (ctx->screen->reorder && busy && !(usage & PIPE_TRANSFER_READ)) { + if (fd_try_shadow_resource(ctx, rsc, level, usage, box)) { + needs_flush = busy = false; + fd_invalidate_resource(ctx, prsc); + } + } + + if (needs_flush) { + if (usage & PIPE_TRANSFER_WRITE) { + struct fd_batch *batch, *last_batch = NULL; + foreach_batch(batch, &ctx->screen->batch_cache, rsc->batch_mask) { + fd_batch_reference(&last_batch, batch); + fd_batch_flush(batch, false); + } + if (last_batch) { + fd_batch_sync(last_batch); + fd_batch_reference(&last_batch, NULL); + } + assert(rsc->batch_mask == 0); + } else { + fd_batch_flush(write_batch, true); + } + assert(!rsc->write_batch); + } + + fd_batch_reference(&write_batch, NULL); /* The GPU keeps track of how the various bo's are being used, and * will wait if necessary for the proper operation to have * completed. */ - ret = fd_bo_cpu_prep(rsc->bo, ctx->screen->pipe, op); - if (ret) - goto fail; + if (busy) { + ret = fd_bo_cpu_prep(rsc->bo, ctx->screen->pipe, op); + if (ret) + goto fail; + } } buf = fd_bo_map(rsc->bo); @@ -451,9 +668,9 @@ struct pipe_resource *prsc) { struct fd_resource *rsc = fd_resource(prsc); + fd_bc_invalidate_resource(rsc, true); if (rsc->bo) fd_bo_del(rsc->bo); - list_delinit(&rsc->list); util_range_destroy(&rsc->valid_buffer_range); FREE(rsc); } @@ -476,7 +693,6 @@ .transfer_map = fd_resource_transfer_map, .transfer_flush_region = fd_resource_transfer_flush_region, .transfer_unmap = fd_resource_transfer_unmap, - .transfer_inline_write = u_default_transfer_inline_write, }; static uint32_t @@ -484,6 +700,7 @@ { struct pipe_resource *prsc = &rsc->base.b; enum util_format_layout layout = util_format_description(format)->layout; + uint32_t pitchalign = fd_screen(prsc->screen)->gmem_alignw; uint32_t level, size = 0; uint32_t width = prsc->width0; uint32_t height = prsc->height0; @@ -499,9 +716,9 @@ if (layout == UTIL_FORMAT_LAYOUT_ASTC) slice->pitch = width = - util_align_npot(width, 32 * util_format_get_blockwidth(format)); + util_align_npot(width, pitchalign * util_format_get_blockwidth(format)); else - slice->pitch = width = align(width, 32); + slice->pitch = width = align(width, pitchalign); slice->offset = size; blocks = util_format_get_nblocks(format, width, height); /* 1d array and 2d array textures must all have the same layer size @@ -545,6 +762,20 @@ } } +/* special case to resize query buf after allocated.. */ +void +fd_resource_resize(struct pipe_resource *prsc, uint32_t sz) +{ + struct fd_resource *rsc = fd_resource(prsc); + + debug_assert(prsc->width0 == 0); + debug_assert(prsc->target == PIPE_BUFFER); + debug_assert(prsc->bind == PIPE_BIND_QUERY_BUFFER); + + prsc->width0 = sz; + realloc_bo(rsc, setup_slices(rsc, 1, prsc->format)); +} + /** * Create a new texture object, using the given template info. */ @@ -557,8 +788,8 @@ enum pipe_format format = tmpl->format; uint32_t size, alignment; - DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, " - "nr_samples=%u, usage=%u, bind=%x, flags=%x", + DBG("%p: target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, " + "nr_samples=%u, usage=%u, bind=%x, flags=%x", prsc, tmpl->target, util_format_name(format), tmpl->width0, tmpl->height0, tmpl->depth0, tmpl->array_size, tmpl->last_level, tmpl->nr_samples, @@ -570,7 +801,7 @@ *prsc = *tmpl; pipe_reference_init(&prsc->reference, 1); - list_inithead(&rsc->list); + prsc->screen = pscreen; util_range_init(&rsc->valid_buffer_range); @@ -588,7 +819,7 @@ assert(rsc->cpp); alignment = slice_alignment(pscreen, tmpl); - if (is_a4xx(fd_screen(pscreen))) { + if (is_a4xx(fd_screen(pscreen)) || is_a5xx(fd_screen(pscreen))) { switch (tmpl->target) { case PIPE_TEXTURE_3D: rsc->layer_first = false; @@ -602,6 +833,15 @@ size = setup_slices(rsc, alignment, format); + /* special case for hw-query buffer, which we need to allocate before we + * know the size: + */ + if (size == 0) { + /* note, semi-intention == instead of & */ + debug_assert(prsc->bind == PIPE_BIND_QUERY_BUFFER); + return prsc; + } + if (rsc->layer_first) { rsc->layer_size = align(size, 4096); size = rsc->layer_size * prsc->array_size; @@ -643,6 +883,7 @@ struct fd_resource *rsc = CALLOC_STRUCT(fd_resource); struct fd_resource_slice *slice = &rsc->slices[0]; struct pipe_resource *prsc = &rsc->base.b; + uint32_t pitchalign = fd_screen(pscreen)->gmem_alignw; DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, " "nr_samples=%u, usage=%u, bind=%x, flags=%x", @@ -657,19 +898,24 @@ *prsc = *tmpl; pipe_reference_init(&prsc->reference, 1); - list_inithead(&rsc->list); + prsc->screen = pscreen; util_range_init(&rsc->valid_buffer_range); - rsc->bo = fd_screen_bo_from_handle(pscreen, handle, &slice->pitch); + rsc->bo = fd_screen_bo_from_handle(pscreen, handle); if (!rsc->bo) goto fail; rsc->base.vtbl = &fd_resource_vtbl; rsc->cpp = util_format_get_blocksize(tmpl->format); - slice->pitch /= rsc->cpp; + slice->pitch = handle->stride / rsc->cpp; slice->offset = handle->offset; + slice->size0 = handle->stride * prsc->height0; + + if ((slice->pitch < align(prsc->width0, pitchalign)) || + (slice->pitch & (pitchalign - 1))) + goto fail; assert(rsc->cpp); @@ -680,9 +926,6 @@ return NULL; } -static void fd_blitter_pipe_begin(struct fd_context *ctx, bool render_cond); -static void fd_blitter_pipe_end(struct fd_context *ctx); - /** * _copy_region using pipe (3d engine) */ @@ -702,7 +945,8 @@ if (!util_blitter_is_copy_supported(ctx->blitter, dst, src)) return false; - fd_blitter_pipe_begin(ctx, false); + /* TODO we could discard if dst box covers dst level fully.. */ + fd_blitter_pipe_begin(ctx, false, false, FD_STAGE_BLIT); util_blitter_copy_texture(ctx->blitter, dst, dst_level, dstx, dsty, dstz, src, src_level, src_box); @@ -772,6 +1016,7 @@ { struct fd_context *ctx = fd_context(pctx); struct pipe_blit_info info = *blit_info; + bool discard = false; if (info.src.resource->nr_samples > 1 && info.dst.resource->nr_samples <= 1 && @@ -784,6 +1029,13 @@ if (info.render_condition_enable && !fd_render_condition_check(pctx)) return; + if (!info.scissor_enable && !info.alpha_blend) { + discard = util_texrange_covers_whole_level(info.dst.resource, + info.dst.level, info.dst.box.x, info.dst.box.y, + info.dst.box.z, info.dst.box.width, + info.dst.box.height, info.dst.box.depth); + } + if (util_try_blit_via_copy_region(pctx, &info)) { return; /* done */ } @@ -800,14 +1052,17 @@ return; } - fd_blitter_pipe_begin(ctx, info.render_condition_enable); + fd_blitter_pipe_begin(ctx, info.render_condition_enable, discard, FD_STAGE_BLIT); util_blitter_blit(ctx->blitter, &info); fd_blitter_pipe_end(ctx); } -static void -fd_blitter_pipe_begin(struct fd_context *ctx, bool render_cond) +void +fd_blitter_pipe_begin(struct fd_context *ctx, bool render_cond, bool discard, + enum fd_render_stage stage) { + util_blitter_save_fragment_constant_buffer_slot(ctx->blitter, + ctx->constbuf[PIPE_SHADER_FRAGMENT].cb); util_blitter_save_vertex_buffer_slot(ctx->blitter, ctx->vtx.vertexbuf.vb); util_blitter_save_vertex_elements(ctx->blitter, ctx->vtx.vtx); util_blitter_save_vertex_shader(ctx->blitter, ctx->prog.vp); @@ -821,7 +1076,8 @@ util_blitter_save_depth_stencil_alpha(ctx->blitter, ctx->zsa); util_blitter_save_stencil_ref(ctx->blitter, &ctx->stencil_ref); util_blitter_save_sample_mask(ctx->blitter, ctx->sample_mask); - util_blitter_save_framebuffer(ctx->blitter, &ctx->framebuffer); + util_blitter_save_framebuffer(ctx->blitter, + ctx->batch ? &ctx->batch->framebuffer : NULL); util_blitter_save_fragment_sampler_states(ctx->blitter, ctx->fragtex.num_samplers, (void **)ctx->fragtex.samplers); @@ -831,13 +1087,18 @@ util_blitter_save_render_condition(ctx->blitter, ctx->cond_query, ctx->cond_cond, ctx->cond_mode); - fd_hw_query_set_stage(ctx, ctx->ring, FD_STAGE_BLIT); + if (ctx->batch) + fd_hw_query_set_stage(ctx->batch, ctx->batch->draw, stage); + + ctx->in_blit = discard; } -static void +void fd_blitter_pipe_end(struct fd_context *ctx) { - fd_hw_query_set_stage(ctx, ctx->ring, FD_STAGE_NULL); + if (ctx->batch) + fd_hw_query_set_stage(ctx->batch, ctx->batch->draw, FD_STAGE_NULL); + ctx->in_blit = false; } static void @@ -845,8 +1106,10 @@ { struct fd_resource *rsc = fd_resource(prsc); - if (pending(rsc, FD_PENDING_WRITE | FD_PENDING_READ)) - fd_context_render(pctx); + if (rsc->write_batch) + fd_batch_flush(rsc->write_batch, true); + + assert(!rsc->write_batch); } void @@ -864,7 +1127,8 @@ pctx->transfer_map = u_transfer_map_vtbl; pctx->transfer_flush_region = u_transfer_flush_region_vtbl; pctx->transfer_unmap = u_transfer_unmap_vtbl; - pctx->transfer_inline_write = u_transfer_inline_write_vtbl; + pctx->buffer_subdata = u_default_buffer_subdata; + pctx->texture_subdata = u_default_texture_subdata; pctx->create_surface = fd_create_surface; pctx->surface_destroy = fd_surface_destroy; pctx->resource_copy_region = fd_resource_copy_region; diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_resource.h mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_resource.h --- mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_resource.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_resource.h 2017-06-01 10:37:10.000000000 +0000 @@ -33,6 +33,7 @@ #include "util/u_range.h" #include "util/u_transfer.h" +#include "freedreno_batch.h" #include "freedreno_util.h" /* Texture Layout on a3xx: @@ -60,14 +61,7 @@ uint32_t size0; /* size of first layer in slice */ }; -/* status of queued up but not flushed reads and write operations. - * In _transfer_map() we need to know if queued up rendering needs - * to be flushed to preserve the order of cpu and gpu access. - */ -enum fd_resource_status { - FD_PENDING_WRITE = 0x01, - FD_PENDING_READ = 0x02, -}; +struct set; struct fd_resource { struct u_resource base; @@ -85,13 +79,23 @@ /* TODO rename to secondary or auxiliary? */ struct fd_resource *stencil; - /* pending read/write state: */ - enum fd_resource_status status; - /* resources accessed by queued but not flushed draws are tracked - * in the used_resources list. + /* bitmask of in-flight batches which reference this resource. Note + * that the batch doesn't hold reference to resources (but instead + * the fd_ringbuffer holds refs to the underlying fd_bo), but in case + * the resource is destroyed we need to clean up the batch's weak + * references to us. + */ + uint32_t batch_mask; + + /* reference to batch that writes this resource: */ + struct fd_batch *write_batch; + + /* Set of batches whose batch-cache key references this resource. + * We need to track this to know which batch-cache entries to + * invalidate if, for example, the resource is invalidated or + * shadowed. */ - struct list_head list; - struct fd_context *pending_ctx; + uint32_t bc_batch_mask; }; static inline struct fd_resource * @@ -100,6 +104,23 @@ return (struct fd_resource *)ptex; } +static inline bool +pending(struct fd_resource *rsc, bool write) +{ + /* if we have a pending GPU write, we are busy in any case: */ + if (rsc->write_batch) + return true; + + /* if CPU wants to write, but we are pending a GPU read, we are busy: */ + if (write && rsc->batch_mask) + return true; + + if (rsc->stencil && pending(rsc->stencil, write)) + return true; + + return false; +} + struct fd_transfer { struct pipe_transfer base; void *staging; @@ -133,9 +154,15 @@ return offset; } +void fd_blitter_pipe_begin(struct fd_context *ctx, bool render_cond, bool discard, + enum fd_render_stage stage); +void fd_blitter_pipe_end(struct fd_context *ctx); + void fd_resource_screen_init(struct pipe_screen *pscreen); void fd_resource_context_init(struct pipe_context *pctx); +void fd_resource_resize(struct pipe_resource *prsc, uint32_t sz); + bool fd_render_condition_check(struct pipe_context *pctx); #endif /* FREEDRENO_RESOURCE_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_screen.c mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_screen.c --- mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_screen.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_screen.c 2017-06-01 10:37:10.000000000 +0000 @@ -53,6 +53,7 @@ #include "a2xx/fd2_screen.h" #include "a3xx/fd3_screen.h" #include "a4xx/fd4_screen.h" +#include "a5xx/fd5_screen.h" #include "ir3/ir3_nir.h" @@ -75,6 +76,9 @@ {"flush", FD_DBG_FLUSH, "Force flush after every draw"}, {"deqp", FD_DBG_DEQP, "Enable dEQP hacks"}, {"nir", FD_DBG_NIR, "Prefer NIR as native IR"}, + {"reorder", FD_DBG_REORDER,"Enable reordering for draws/blits"}, + {"bstat", FD_DBG_BSTAT, "Print batch stats at context destroy"}, + {"nogrow", FD_DBG_NOGROW, "Disable \"growable\" cmdstream buffers, even if kernel supports it"}, DEBUG_NAMED_VALUE_END }; @@ -109,8 +113,18 @@ static uint64_t fd_screen_get_timestamp(struct pipe_screen *pscreen) { - int64_t cpu_time = os_time_get() * 1000; - return cpu_time + fd_screen(pscreen)->cpu_gpu_time_delta; + struct fd_screen *screen = fd_screen(pscreen); + + if (screen->has_timestamp) { + uint64_t n; + fd_pipe_get_param(screen->pipe, FD_TIMESTAMP, &n); + debug_assert(screen->max_freq > 0); + return n * 1000000000 / screen->max_freq; + } else { + int64_t cpu_time = os_time_get() * 1000; + return cpu_time + screen->cpu_gpu_time_delta; + } + } static void @@ -124,6 +138,12 @@ if (screen->dev) fd_device_del(screen->dev); + fd_bc_fini(&screen->batch_cache); + + slab_destroy_parent(&screen->transfer_pool); + + pipe_mutex_destroy(screen->lock); + free(screen); } @@ -156,12 +176,17 @@ case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY: case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY: case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY: - case PIPE_CAP_USER_CONSTANT_BUFFERS: case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT: - case PIPE_CAP_VERTEXID_NOBASE: case PIPE_CAP_STRING_MARKER: + case PIPE_CAP_MIXED_COLOR_DEPTH_BITS: return 1; + case PIPE_CAP_VERTEXID_NOBASE: + return is_a3xx(screen) || is_a4xx(screen); + + case PIPE_CAP_USER_CONSTANT_BUFFERS: + return is_a4xx(screen) ? 0 : 1; + case PIPE_CAP_SHADER_STENCIL_EXPORT: case PIPE_CAP_TGSI_TEXCOORD: case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER: @@ -190,13 +215,14 @@ case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE: case PIPE_CAP_DEPTH_CLIP_DISABLE: case PIPE_CAP_CLIP_HALFZ: - return is_a3xx(screen) || is_a4xx(screen); + return is_a3xx(screen) || is_a4xx(screen) || is_a5xx(screen); case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY: return 0; case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT: if (is_a3xx(screen)) return 16; if (is_a4xx(screen)) return 32; + if (is_a5xx(screen)) return 32; return 0; case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE: /* We could possibly emulate more by pretending 2d/rect textures and @@ -204,6 +230,7 @@ */ if (is_a3xx(screen)) return 8192; if (is_a4xx(screen)) return 16384; + if (is_a5xx(screen)) return 16384; return 0; case PIPE_CAP_TEXTURE_FLOAT_LINEAR: @@ -211,10 +238,10 @@ case PIPE_CAP_START_INSTANCE: case PIPE_CAP_SAMPLER_VIEW_TARGET: case PIPE_CAP_TEXTURE_QUERY_LOD: - return is_a4xx(screen); + return is_a4xx(screen) || is_a5xx(screen); case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: - return 256; + return 64; case PIPE_CAP_GLSL_FEATURE_LEVEL: if (glsl120) @@ -262,6 +289,14 @@ case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR: case PIPE_CAP_CULL_DISTANCE: case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES: + case PIPE_CAP_TGSI_VOTE: + case PIPE_CAP_MAX_WINDOW_RECTANGLES: + case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED: + case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS: + case PIPE_CAP_TGSI_ARRAY_COMPONENTS: + case PIPE_CAP_TGSI_CAN_READ_OUTPUTS: + case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY: + case PIPE_CAP_TGSI_FS_FBFETCH: return 0; case PIPE_CAP_MAX_VIEWPORTS: @@ -281,6 +316,7 @@ return PIPE_MAX_SO_BUFFERS; return 0; case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME: + case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS: if (is_ir3(screen)) return 1; return 0; @@ -307,7 +343,7 @@ return 11; case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS: - return (is_a3xx(screen) || is_a4xx(screen)) ? 256 : 0; + return (is_a3xx(screen) || is_a4xx(screen) || is_a5xx(screen)) ? 256 : 0; /* Render targets. */ case PIPE_CAP_MAX_RENDER_TARGETS: @@ -316,11 +352,11 @@ return is_a3xx(screen) ? 1 : 0; /* Queries. */ - case PIPE_CAP_QUERY_TIMESTAMP: case PIPE_CAP_QUERY_BUFFER_OBJECT: return 0; case PIPE_CAP_OCCLUSION_QUERY: - return is_a3xx(screen) || is_a4xx(screen); + return is_a3xx(screen) || is_a4xx(screen) || is_a5xx(screen); + case PIPE_CAP_QUERY_TIMESTAMP: case PIPE_CAP_QUERY_TIME_ELAPSED: /* only a4xx, requires new enough kernel so we know max_freq: */ return (screen->max_freq > 0) && is_a4xx(screen); @@ -350,6 +386,8 @@ return 10; case PIPE_CAP_UMA: return 1; + case PIPE_CAP_NATIVE_FENCE_FD: + return fd_device_version(screen->dev) >= FD_VERSION_FENCE_FD; } debug_printf("unknown param %d\n", param); return 0; @@ -427,7 +465,7 @@ * split between VS and FS. Use lower limit of 256 to * avoid getting into impossible situations: */ - return ((is_a3xx(screen) || is_a4xx(screen)) ? 4096 : 64) * sizeof(float[4]); + return ((is_a3xx(screen) || is_a4xx(screen) || is_a5xx(screen)) ? 4096 : 64) * sizeof(float[4]); case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: return is_ir3(screen) ? 16 : 1; case PIPE_SHADER_CAP_MAX_PREDS: @@ -472,6 +510,7 @@ return 32; case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: + case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: return 0; } debug_printf("unknown shader param %d\n", param); @@ -513,8 +552,7 @@ struct fd_bo * fd_screen_bo_from_handle(struct pipe_screen *pscreen, - struct winsys_handle *whandle, - unsigned *out_stride) + struct winsys_handle *whandle) { struct fd_screen *screen = fd_screen(pscreen); struct fd_bo *bo; @@ -535,8 +573,6 @@ return NULL; } - *out_stride = whandle->stride; - return bo; } @@ -589,6 +625,8 @@ screen->max_freq = 0; } else { screen->max_freq = val; + if (fd_pipe_get_param(screen->pipe, FD_TIMESTAMP, &val) == 0) + screen->has_timestamp = true; } if (fd_pipe_get_param(screen->pipe, FD_GPU_ID, &val)) { @@ -639,11 +677,34 @@ case 430: fd4_screen_init(pscreen); break; + case 530: + fd5_screen_init(pscreen); + break; default: debug_printf("unsupported GPU: a%03d\n", screen->gpu_id); goto fail; } + if (screen->gpu_id >= 500) { + screen->gmem_alignw = 64; + screen->gmem_alignh = 32; + } else { + screen->gmem_alignw = 32; + screen->gmem_alignh = 32; + } + + /* NOTE: don't enable reordering on a2xx, since completely untested. + * Also, don't enable if we have too old of a kernel to support + * growable cmdstream buffers, since memory requirement for cmdstream + * buffers would be too much otherwise. + */ + if ((screen->gpu_id >= 300) && (fd_device_version(dev) >= FD_VERSION_UNLIMITED_CMDS)) + screen->reorder = !!(fd_mesa_debug & FD_DBG_REORDER); + + fd_bc_init(&screen->batch_cache); + + pipe_mutex_init(screen->lock); + pscreen->destroy = fd_screen_destroy; pscreen->get_param = fd_screen_get_param; pscreen->get_paramf = fd_screen_get_paramf; @@ -659,8 +720,11 @@ pscreen->get_timestamp = fd_screen_get_timestamp; - pscreen->fence_reference = fd_screen_fence_ref; - pscreen->fence_finish = fd_screen_fence_finish; + pscreen->fence_reference = fd_fence_ref; + pscreen->fence_finish = fd_fence_finish; + pscreen->fence_get_fd = fd_fence_get_fd; + + slab_create_parent(&screen->transfer_pool, sizeof(struct fd_transfer), 16); util_format_s3tc_init(); diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_screen.h mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_screen.h --- mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_screen.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_screen.h 2017-06-01 10:37:10.000000000 +0000 @@ -34,14 +34,18 @@ #include "pipe/p_screen.h" #include "util/u_memory.h" +#include "util/slab.h" +#include "os/os_thread.h" -typedef uint32_t u32; +#include "freedreno_batch_cache.h" struct fd_bo; struct fd_screen { struct pipe_screen base; + pipe_mutex lock; + /* it would be tempting to use pipe_reference here, but that * really doesn't work well if it isn't the first member of * the struct, so not quite so awesome to be adding refcnting @@ -52,12 +56,16 @@ /* place for winsys to stash it's own stuff: */ void *winsys_priv; + struct slab_parent_pool transfer_pool; + uint32_t gmemsize_bytes; uint32_t device_id; uint32_t gpu_id; /* 220, 305, etc */ uint32_t chip_id; /* coreid:8 majorrev:8 minorrev:8 patch:8 */ uint32_t max_freq; uint32_t max_rts; /* max # of render targets */ + uint32_t gmem_alignw, gmem_alignh; + bool has_timestamp; void *compiler; /* currently unused for a2xx */ @@ -65,6 +73,10 @@ struct fd_pipe *pipe; int64_t cpu_gpu_time_delta; + + struct fd_batch_cache batch_cache; + + bool reorder; }; static inline struct fd_screen * @@ -78,8 +90,7 @@ unsigned stride, struct winsys_handle *whandle); struct fd_bo * fd_screen_bo_from_handle(struct pipe_screen *pscreen, - struct winsys_handle *whandle, - unsigned *out_stride); + struct winsys_handle *whandle); struct pipe_screen * fd_screen_create(struct fd_device *dev); @@ -103,11 +114,17 @@ return (screen->gpu_id >= 400) && (screen->gpu_id < 500); } +static inline boolean +is_a5xx(struct fd_screen *screen) +{ + return (screen->gpu_id >= 500) && (screen->gpu_id < 600); +} + /* is it using the ir3 compiler (shader isa introduced with a3xx)? */ static inline boolean is_ir3(struct fd_screen *screen) { - return is_a3xx(screen) || is_a4xx(screen); + return is_a3xx(screen) || is_a4xx(screen) || is_a5xx(screen); } #endif /* FREEDRENO_SCREEN_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_state.c mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_state.c --- mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -37,6 +37,7 @@ #include "freedreno_resource.h" #include "freedreno_texture.h" #include "freedreno_gmem.h" +#include "freedreno_query_hw.h" #include "freedreno_util.h" /* All the generic state handling.. In case of CSO's that are specific @@ -89,26 +90,22 @@ */ static void fd_set_constant_buffer(struct pipe_context *pctx, uint shader, uint index, - struct pipe_constant_buffer *cb) + const struct pipe_constant_buffer *cb) { struct fd_context *ctx = fd_context(pctx); struct fd_constbuf_stateobj *so = &ctx->constbuf[shader]; + util_copy_constant_buffer(&so->cb[index], cb); + /* Note that the state tracker can unbind constant buffers by * passing NULL here. */ if (unlikely(!cb)) { so->enabled_mask &= ~(1 << index); so->dirty_mask &= ~(1 << index); - pipe_resource_reference(&so->cb[index].buffer, NULL); return; } - pipe_resource_reference(&so->cb[index].buffer, cb->buffer); - so->cb[index].buffer_offset = cb->buffer_offset; - so->cb[index].buffer_size = cb->buffer_size; - so->cb[index].user_buffer = cb->user_buffer; - so->enabled_mask |= 1 << index; so->dirty_mask |= 1 << index; ctx->dirty |= FD_DIRTY_CONSTBUF; @@ -119,16 +116,39 @@ const struct pipe_framebuffer_state *framebuffer) { struct fd_context *ctx = fd_context(pctx); - struct pipe_framebuffer_state *cso = &ctx->framebuffer; + struct pipe_framebuffer_state *cso; + + if (ctx->screen->reorder) { + struct fd_batch *batch, *old_batch = NULL; + + fd_batch_reference(&old_batch, ctx->batch); - DBG("%d: cbufs[0]=%p, zsbuf=%p", ctx->needs_flush, - framebuffer->cbufs[0], framebuffer->zsbuf); + if (likely(old_batch)) + fd_hw_query_set_stage(old_batch, old_batch->draw, FD_STAGE_NULL); + + batch = fd_batch_from_fb(&ctx->screen->batch_cache, ctx, framebuffer); + fd_batch_reference(&ctx->batch, NULL); + fd_reset_wfi(batch); + ctx->batch = batch; + ctx->dirty = ~0; + + if (old_batch && old_batch->blit && !old_batch->back_blit) { + /* for blits, there is not really much point in hanging on + * to the uncommitted batch (ie. you probably don't blit + * multiple times to the same surface), so we might as + * well go ahead and flush this one: + */ + fd_batch_flush(old_batch, false); + } - fd_context_render(pctx); + fd_batch_reference(&old_batch, NULL); + } else { + DBG("%d: cbufs[0]=%p, zsbuf=%p", ctx->batch->needs_flush, + framebuffer->cbufs[0], framebuffer->zsbuf); + fd_batch_flush(ctx->batch, false); + } - if ((cso->width != framebuffer->width) || - (cso->height != framebuffer->height)) - ctx->needs_rb_fbd = true; + cso = &ctx->batch->framebuffer; util_copy_framebuffer_state(cso, framebuffer); @@ -187,14 +207,16 @@ * we need to mark VTXSTATE as dirty as well to trigger patching * and re-emitting the vtx shader: */ - for (i = 0; i < count; i++) { - bool new_enabled = vb && (vb[i].buffer || vb[i].user_buffer); - bool old_enabled = so->vb[i].buffer || so->vb[i].user_buffer; - uint32_t new_stride = vb ? vb[i].stride : 0; - uint32_t old_stride = so->vb[i].stride; - if ((new_enabled != old_enabled) || (new_stride != old_stride)) { - ctx->dirty |= FD_DIRTY_VTXSTATE; - break; + if (ctx->screen->gpu_id < 300) { + for (i = 0; i < count; i++) { + bool new_enabled = vb && (vb[i].buffer || vb[i].user_buffer); + bool old_enabled = so->vb[i].buffer || so->vb[i].user_buffer; + uint32_t new_stride = vb ? vb[i].stride : 0; + uint32_t old_stride = so->vb[i].stride; + if ((new_enabled != old_enabled) || (new_stride != old_stride)) { + ctx->dirty |= FD_DIRTY_VTXSTATE; + break; + } } } @@ -318,6 +340,7 @@ unsigned buffer_size) { struct pipe_stream_output_target *target; + struct fd_resource *rsc = fd_resource(prsc); target = CALLOC_STRUCT(pipe_stream_output_target); if (!target) @@ -330,6 +353,10 @@ target->buffer_offset = buffer_offset; target->buffer_size = buffer_size; + assert(rsc->base.b.target == PIPE_BUFFER); + util_range_add(&rsc->valid_buffer_range, + buffer_offset, buffer_offset + buffer_size); + return target; } diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_texture.c mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_texture.c --- mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_texture.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_texture.c 2017-06-01 10:37:10.000000000 +0000 @@ -50,75 +50,64 @@ } static void bind_sampler_states(struct fd_texture_stateobj *tex, - unsigned nr, void **hwcso) + unsigned start, unsigned nr, void **hwcso) { unsigned i; - unsigned new_nr = 0; for (i = 0; i < nr; i++) { - if (hwcso[i]) - new_nr = i + 1; - tex->samplers[i] = hwcso[i]; - tex->dirty_samplers |= (1 << i); - } - - for (; i < tex->num_samplers; i++) { - tex->samplers[i] = NULL; - tex->dirty_samplers |= (1 << i); + unsigned p = i + start; + tex->samplers[p] = hwcso[i]; + if (tex->samplers[p]) + tex->valid_samplers |= (1 << p); + else + tex->valid_samplers &= ~(1 << p); } - tex->num_samplers = new_nr; + tex->num_samplers = util_last_bit(tex->valid_samplers); } static void set_sampler_views(struct fd_texture_stateobj *tex, - unsigned nr, struct pipe_sampler_view **views) + unsigned start, unsigned nr, struct pipe_sampler_view **views) { unsigned i; - unsigned new_nr = 0; for (i = 0; i < nr; i++) { - if (views[i]) - new_nr = i + 1; - pipe_sampler_view_reference(&tex->textures[i], views[i]); - tex->dirty_samplers |= (1 << i); + struct pipe_sampler_view *view = views ? views[i] : NULL; + unsigned p = i + start; + pipe_sampler_view_reference(&tex->textures[p], view); + if (tex->textures[p]) + tex->valid_textures |= (1 << p); + else + tex->valid_textures &= ~(1 << p); } - for (; i < tex->num_textures; i++) { - pipe_sampler_view_reference(&tex->textures[i], NULL); - tex->dirty_samplers |= (1 << i); - } - - tex->num_textures = new_nr; + tex->num_textures = util_last_bit(tex->valid_textures); } void fd_sampler_states_bind(struct pipe_context *pctx, - unsigned shader, unsigned start, + enum pipe_shader_type shader, unsigned start, unsigned nr, void **hwcso) { struct fd_context *ctx = fd_context(pctx); - assert(start == 0); - if (shader == PIPE_SHADER_FRAGMENT) { - bind_sampler_states(&ctx->fragtex, nr, hwcso); + bind_sampler_states(&ctx->fragtex, start, nr, hwcso); ctx->dirty |= FD_DIRTY_FRAGTEX; } else if (shader == PIPE_SHADER_VERTEX) { - bind_sampler_states(&ctx->verttex, nr, hwcso); + bind_sampler_states(&ctx->verttex, start, nr, hwcso); ctx->dirty |= FD_DIRTY_VERTTEX; } } void -fd_set_sampler_views(struct pipe_context *pctx, unsigned shader, +fd_set_sampler_views(struct pipe_context *pctx, enum pipe_shader_type shader, unsigned start, unsigned nr, struct pipe_sampler_view **views) { struct fd_context *ctx = fd_context(pctx); - assert(start == 0); - switch (shader) { case PIPE_SHADER_FRAGMENT: /* on a2xx, since there is a flat address space for textures/samplers, @@ -130,11 +119,11 @@ if (nr != ctx->fragtex.num_textures) ctx->dirty |= FD_DIRTY_TEXSTATE; - set_sampler_views(&ctx->fragtex, nr, views); + set_sampler_views(&ctx->fragtex, start, nr, views); ctx->dirty |= FD_DIRTY_FRAGTEX; break; case PIPE_SHADER_VERTEX: - set_sampler_views(&ctx->verttex, nr, views); + set_sampler_views(&ctx->verttex, start, nr, views); ctx->dirty |= FD_DIRTY_VERTTEX; break; default: diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_texture.h mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_texture.h --- mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_texture.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_texture.h 2017-06-01 10:37:10.000000000 +0000 @@ -35,7 +35,8 @@ unsigned shader, unsigned start, unsigned nr, void **hwcso); -void fd_set_sampler_views(struct pipe_context *pctx, unsigned shader, +void fd_set_sampler_views(struct pipe_context *pctx, + enum pipe_shader_type shader, unsigned start, unsigned nr, struct pipe_sampler_view **views); @@ -55,7 +56,7 @@ * | fp16[3] / * 0x08: | padding * 0x10: | int16[0] \ - * | int16[1] |___ swizzled int16 channels for for "small integer" + * | int16[1] |___ swizzled int16 channels for "small integer" * | int16[2] | formats (<= 16 bits per component, integer) * | int16[3] / * 0x18: | padding diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_util.c mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_util.c --- mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_util.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_util.c 2017-06-01 10:37:10.000000000 +0000 @@ -67,6 +67,26 @@ } } +/* we need to special case a bit the depth/stencil restore, because we are + * using the texture sampler to blit into the depth/stencil buffer, *not* + * into a color buffer. Otherwise fdN_tex_swiz() will do the wrong thing, + * as it is assuming that you are sampling into normal render target.. + */ +enum pipe_format +fd_gmem_restore_format(enum pipe_format format) +{ + switch (format) { + case PIPE_FORMAT_Z24X8_UNORM: + case PIPE_FORMAT_Z24_UNORM_S8_UINT: + return PIPE_FORMAT_R8G8B8A8_UNORM; + case PIPE_FORMAT_Z16_UNORM: + return PIPE_FORMAT_R8G8_UNORM; + case PIPE_FORMAT_S8_UINT: + return PIPE_FORMAT_R8_UNORM; + default: + return format; + } +} enum adreno_rb_blend_factor fd_blend_factor(unsigned factor) diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_util.h mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_util.h --- mesa-12.0.6/src/gallium/drivers/freedreno/freedreno_util.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/freedreno_util.h 2017-06-01 10:37:10.000000000 +0000 @@ -46,6 +46,7 @@ enum adreno_rb_depth_format fd_pipe2depth(enum pipe_format format); enum pc_di_index_size fd_pipe2index(enum pipe_format format); +enum pipe_format fd_gmem_restore_format(enum pipe_format format); enum adreno_rb_blend_factor fd_blend_factor(unsigned factor); enum adreno_pa_su_sc_draw fd_polygon_mode(unsigned mode); enum adreno_stencil_op fd_stencil_op(unsigned op); @@ -57,8 +58,9 @@ #define A2XX_MAX_RENDER_TARGETS 1 #define A3XX_MAX_RENDER_TARGETS 4 #define A4XX_MAX_RENDER_TARGETS 8 +#define A5XX_MAX_RENDER_TARGETS 8 -#define MAX_RENDER_TARGETS A4XX_MAX_RENDER_TARGETS +#define MAX_RENDER_TARGETS A5XX_MAX_RENDER_TARGETS #define FD_DBG_MSGS 0x0001 #define FD_DBG_DISASM 0x0002 @@ -75,6 +77,9 @@ #define FD_DBG_FLUSH 0x1000 #define FD_DBG_DEQP 0x2000 #define FD_DBG_NIR 0x4000 +#define FD_DBG_REORDER 0x8000 +#define FD_DBG_BSTAT 0x10000 +#define FD_DBG_NOGROW 0x20000 extern int fd_mesa_debug; extern bool fd_binning_enabled; @@ -174,6 +179,7 @@ #define LOG_DWORDS 0 static inline void emit_marker(struct fd_ringbuffer *ring, int scratch_idx); +static inline void emit_marker5(struct fd_ringbuffer *ring, int scratch_idx); static inline void OUT_RING(struct fd_ringbuffer *ring, uint32_t data) @@ -182,7 +188,7 @@ DBG("ring[%p]: OUT_RING %04x: %08x", ring, (uint32_t)(ring->cur - ring->last_start), data); } - *(ring->cur++) = data; + fd_ringbuffer_emit(ring, data); } /* like OUT_RING() but appends a cmdstream patch point to 'buf' */ @@ -200,67 +206,123 @@ })); } +/* + * NOTE: OUT_RELOC*() is 2 dwords (64b) on a5xx+ + */ + static inline void OUT_RELOC(struct fd_ringbuffer *ring, struct fd_bo *bo, - uint32_t offset, uint32_t or, int32_t shift) + uint32_t offset, uint64_t or, int32_t shift) { if (LOG_DWORDS) { DBG("ring[%p]: OUT_RELOC %04x: %p+%u << %d", ring, (uint32_t)(ring->cur - ring->last_start), bo, offset, shift); } debug_assert(offset < fd_bo_size(bo)); - fd_ringbuffer_reloc(ring, &(struct fd_reloc){ + fd_ringbuffer_reloc2(ring, &(struct fd_reloc){ .bo = bo, .flags = FD_RELOC_READ, .offset = offset, .or = or, .shift = shift, + .orhi = or >> 32, }); } static inline void OUT_RELOCW(struct fd_ringbuffer *ring, struct fd_bo *bo, - uint32_t offset, uint32_t or, int32_t shift) + uint32_t offset, uint64_t or, int32_t shift) { if (LOG_DWORDS) { DBG("ring[%p]: OUT_RELOCW %04x: %p+%u << %d", ring, (uint32_t)(ring->cur - ring->last_start), bo, offset, shift); } debug_assert(offset < fd_bo_size(bo)); - fd_ringbuffer_reloc(ring, &(struct fd_reloc){ + fd_ringbuffer_reloc2(ring, &(struct fd_reloc){ .bo = bo, .flags = FD_RELOC_READ | FD_RELOC_WRITE, .offset = offset, .or = or, .shift = shift, + .orhi = or >> 32, }); } static inline void BEGIN_RING(struct fd_ringbuffer *ring, uint32_t ndwords) { - if ((ring->cur + ndwords) >= ring->end) { - /* this probably won't really work if we have multiple tiles.. - * but it is ok for 2d.. we might need different behavior - * depending on 2d or 3d pipe. - */ - DBG("uh oh.."); - } + if (ring->cur + ndwords >= ring->end) + fd_ringbuffer_grow(ring, ndwords); +} + +static inline uint32_t +__gpu_id(struct fd_ringbuffer *ring) +{ + uint64_t val; + fd_pipe_get_param(ring->pipe, FD_GPU_ID, &val); + return val; } static inline void OUT_PKT0(struct fd_ringbuffer *ring, uint16_t regindx, uint16_t cnt) { + debug_assert(__gpu_id(ring) < 500); BEGIN_RING(ring, cnt+1); OUT_RING(ring, CP_TYPE0_PKT | ((cnt-1) << 16) | (regindx & 0x7FFF)); } static inline void +OUT_PKT2(struct fd_ringbuffer *ring) +{ + debug_assert(__gpu_id(ring) < 500); + BEGIN_RING(ring, 1); + OUT_RING(ring, CP_TYPE2_PKT); +} + +static inline void OUT_PKT3(struct fd_ringbuffer *ring, uint8_t opcode, uint16_t cnt) { + debug_assert(__gpu_id(ring) < 500); BEGIN_RING(ring, cnt+1); OUT_RING(ring, CP_TYPE3_PKT | ((cnt-1) << 16) | ((opcode & 0xFF) << 8)); } +/* + * Starting with a5xx, pkt4/pkt7 are used instead of pkt0/pkt3 + */ + +static inline unsigned +_odd_parity_bit(unsigned val) +{ + /* See: http://graphics.stanford.edu/~seander/bithacks.html#ParityParallel + * note that we want odd parity so 0x6996 is inverted. + */ + val ^= val >> 16; + val ^= val >> 8; + val ^= val >> 4; + val &= 0xf; + return (~0x6996 >> val) & 1; +} + +static inline void +OUT_PKT4(struct fd_ringbuffer *ring, uint16_t regindx, uint16_t cnt) +{ + BEGIN_RING(ring, cnt+1); + OUT_RING(ring, CP_TYPE4_PKT | cnt | + (_odd_parity_bit(cnt) << 7) | + ((regindx & 0x3ffff) << 8) | + ((_odd_parity_bit(regindx) << 27))); +} + +static inline void +OUT_PKT7(struct fd_ringbuffer *ring, uint8_t opcode, uint16_t cnt) +{ + BEGIN_RING(ring, cnt+1); + OUT_RING(ring, CP_TYPE7_PKT | cnt | + (_odd_parity_bit(cnt) << 15) | + ((opcode & 0x7f) << 16) | + ((_odd_parity_bit(opcode) << 23))); +} + static inline void OUT_WFI(struct fd_ringbuffer *ring) { @@ -269,12 +331,17 @@ } static inline void -__OUT_IB(struct fd_ringbuffer *ring, bool prefetch, - struct fd_ringmarker *start, struct fd_ringmarker *end) +OUT_WFI5(struct fd_ringbuffer *ring) { - uint32_t dwords = fd_ringmarker_dwords(start, end); + OUT_PKT7(ring, CP_WAIT_FOR_IDLE, 0); +} - assert(dwords > 0); +static inline void +__OUT_IB(struct fd_ringbuffer *ring, bool prefetch, struct fd_ringbuffer *target) +{ + unsigned count = fd_ringbuffer_cmd_count(target); + + debug_assert(__gpu_id(ring) < 500); /* for debug after a lock up, write a unique counter value * to scratch6 for each IB, to make it easier to match up @@ -284,14 +351,46 @@ */ emit_marker(ring, 6); - OUT_PKT3(ring, prefetch ? CP_INDIRECT_BUFFER_PFE : CP_INDIRECT_BUFFER_PFD, 2); - fd_ringbuffer_emit_reloc_ring(ring, start, end); - OUT_RING(ring, dwords); + for (unsigned i = 0; i < count; i++) { + uint32_t dwords; + OUT_PKT3(ring, prefetch ? CP_INDIRECT_BUFFER_PFE : CP_INDIRECT_BUFFER_PFD, 2); + dwords = fd_ringbuffer_emit_reloc_ring_full(ring, target, i) / 4; + assert(dwords > 0); + OUT_RING(ring, dwords); + OUT_PKT2(ring); + } emit_marker(ring, 6); } +static inline void +__OUT_IB5(struct fd_ringbuffer *ring, struct fd_ringbuffer *target) +{ + unsigned count = fd_ringbuffer_cmd_count(target); + + /* for debug after a lock up, write a unique counter value + * to scratch6 for each IB, to make it easier to match up + * register dumps to cmdstream. The combination of IB and + * DRAW (scratch7) is enough to "triangulate" the particular + * draw that caused lockup. + */ + emit_marker5(ring, 6); + + for (unsigned i = 0; i < count; i++) { + uint32_t dwords; + OUT_PKT7(ring, CP_INDIRECT_BUFFER, 3); + dwords = fd_ringbuffer_emit_reloc_ring_full(ring, target, i) / 4; + assert(dwords > 0); + OUT_RING(ring, dwords); + } + + emit_marker5(ring, 6); +} + /* CP_SCRATCH_REG4 is used to hold base address for query results: */ +// XXX annoyingly scratch regs move on a5xx.. and additionally different +// packet types.. so freedreno_query_hw is going to need a bit of +// rework.. #define HW_QUERY_BASE_REG REG_AXXX_CP_SCRATCH_REG4 static inline void @@ -306,6 +405,21 @@ OUT_RING(ring, ++marker_cnt); } +static inline void +emit_marker5(struct fd_ringbuffer *ring, int scratch_idx) +{ + extern unsigned marker_cnt; +//XXX unsigned reg = REG_A5XX_CP_SCRATCH_REG(scratch_idx); + unsigned reg = 0x00000b78 + scratch_idx; + assert(reg != HW_QUERY_BASE_REG); + if (reg == HW_QUERY_BASE_REG) + return; + OUT_WFI5(ring); + OUT_PKT4(ring, reg, 1); + OUT_RING(ring, ++marker_cnt); + OUT_WFI5(ring); +} + /* helper to get numeric value from environment variable.. mostly * just leaving this here because it is helpful to brute-force figure * out unknown formats, etc, which blob driver does not support: @@ -326,4 +440,13 @@ return uc.ui[0]; } +/* + * swap - swap value of @a and @b + */ +#define swap(a, b) \ + do { __typeof(a) __tmp = (a); (a) = (b); (b) = __tmp; } while (0) + +#define foreach_bit(b, mask) \ + for (uint32_t _m = (mask); _m && ({(b) = u_bit_scan(&_m); 1;});) + #endif /* FREEDRENO_UTIL_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/ir3/instr-a3xx.h mesa-17.0.7/src/gallium/drivers/freedreno/ir3/instr-a3xx.h --- mesa-12.0.6/src/gallium/drivers/freedreno/ir3/instr-a3xx.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/ir3/instr-a3xx.h 2017-06-01 10:37:10.000000000 +0000 @@ -296,6 +296,9 @@ int32_t immed : 20; uint32_t dummy1 : 12; } a4xx; + struct PACKED { + uint32_t immed : 32; + } a5xx; }; /* dword1: */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/ir3/ir3.c mesa-17.0.7/src/gallium/drivers/freedreno/ir3/ir3.c --- mesa-12.0.6/src/gallium/drivers/freedreno/ir3/ir3.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/ir3/ir3.c 2017-06-01 10:37:10.000000000 +0000 @@ -40,13 +40,13 @@ */ void * ir3_alloc(struct ir3 *shader, int sz) { - return ralloc_size(shader, sz); + return rzalloc_size(shader, sz); /* TODO: don't use rzalloc */ } struct ir3 * ir3_create(struct ir3_compiler *compiler, unsigned nin, unsigned nout) { - struct ir3 *shader = ralloc(compiler, struct ir3); + struct ir3 *shader = rzalloc(compiler, struct ir3); shader->compiler = compiler; shader->ninputs = nin; @@ -129,7 +129,9 @@ { instr_cat0_t *cat0 = ptr; - if (info->gpu_id >= 400) { + if (info->gpu_id >= 500) { + cat0->a5xx.immed = instr->cat0.immed; + } else if (info->gpu_id >= 400) { cat0->a4xx.immed = instr->cat0.immed; } else { cat0->a3xx.immed = instr->cat0.immed; @@ -428,12 +430,14 @@ iassert(!((dst->flags ^ type_flags(instr->cat5.type)) & IR3_REG_HALF)); + assume(src1 || !src2); + assume(src2 || !src3); + if (src1) { cat5->full = ! (src1->flags & IR3_REG_HALF); cat5->src1 = reg(src1, info, instr->repeat, IR3_REG_HALF); } - if (instr->flags & IR3_INSTR_S2EN) { if (src2) { iassert(!((src1->flags ^ src2->flags) & IR3_REG_HALF)); @@ -571,7 +575,7 @@ } } - /* need a integer number of instruction "groups" (sets of 16 + /* need an integer number of instruction "groups" (sets of 16 * instructions on a4xx or sets of 4 instructions on a3xx), * so pad out w/ NOPs if needed: (NOTE each instruction is 64bits) */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c mesa-17.0.7/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c --- mesa-12.0.6/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c 2017-06-01 10:37:10.000000000 +0000 @@ -60,7 +60,7 @@ int st_glsl_type_size(const struct glsl_type *type); static nir_shader * -load_glsl(const char *filename, gl_shader_stage stage) +load_glsl(unsigned num_files, char* const* files, gl_shader_stage stage) { static const struct standalone_options options = { .glsl_version = 140, @@ -68,9 +68,9 @@ }; struct gl_shader_program *prog; - prog = standalone_compile_shader(&options, 1, (char * const*)&filename); + prog = standalone_compile_shader(&options, num_files, files); if (!prog) - errx(1, "couldn't parse `%s'", filename); + errx(1, "couldn't parse `%s'", files[0]); nir_shader *nir = glsl_to_nir(prog, stage, ir3_get_compiler_options()); @@ -93,7 +93,7 @@ // TODO nir_assign_var_locations?? NIR_PASS_V(nir, nir_lower_system_values); - NIR_PASS_V(nir, nir_lower_io, nir_var_all, st_glsl_type_size); + NIR_PASS_V(nir, nir_lower_io, nir_var_all, st_glsl_type_size, 0); NIR_PASS_V(nir, nir_lower_samplers, prog); return nir; @@ -129,7 +129,7 @@ static void print_usage(void) { - printf("Usage: ir3_compiler [OPTIONS]... \n"); + printf("Usage: ir3_compiler [OPTIONS]... \n"); printf(" --verbose - verbose compiler/debug messages\n"); printf(" --binning-pass - generate binning pass shader (VERT)\n"); printf(" --color-two-side - emulate two-sided color (FRAG)\n"); @@ -147,7 +147,9 @@ int main(int argc, char **argv) { int ret = 0, n = 1; - const char *filename; + char *filenames[2]; + int num_files = 0; + unsigned stage = 0; struct ir3_shader_variant v; struct ir3_shader s; struct ir3_shader_key key = {}; @@ -264,38 +266,59 @@ } debug_printf("\n"); - filename = argv[n]; + while (n < argc) { + char *filename = argv[n]; + char *ext = rindex(filename, '.'); - ret = read_file(filename, &ptr, &size); - if (ret) { - print_usage(); - return ret; - } + if (strcmp(ext, ".tgsi") == 0) { + if (num_files != 0) + errx(1, "in TGSI mode, only a single file may be specified"); + s.from_tgsi = true; + } else if (strcmp(ext, ".frag") == 0) { + if (s.from_tgsi) + errx(1, "cannot mix GLSL and TGSI"); + if (num_files >= ARRAY_SIZE(filenames)) + errx(1, "too many GLSL files"); + stage = MESA_SHADER_FRAGMENT; + } else if (strcmp(ext, ".vert") == 0) { + if (s.from_tgsi) + errx(1, "cannot mix GLSL and TGSI"); + if (num_files >= ARRAY_SIZE(filenames)) + errx(1, "too many GLSL files"); + stage = MESA_SHADER_VERTEX; + } else { + print_usage(); + return -1; + } - if (fd_mesa_debug & FD_DBG_OPTMSGS) - debug_printf("%s\n", (char *)ptr); + filenames[num_files++] = filename; - nir_shader *nir; + n++; + } - char *ext = rindex(filename, '.'); + nir_shader *nir; - if (strcmp(ext, ".tgsi") == 0) { + if (s.from_tgsi) { struct tgsi_token toks[65536]; + ret = read_file(filenames[0], &ptr, &size); + if (ret) { + print_usage(); + return ret; + } + + if (fd_mesa_debug & FD_DBG_OPTMSGS) + debug_printf("%s\n", (char *)ptr); + if (!tgsi_text_translate(ptr, toks, ARRAY_SIZE(toks))) - errx(1, "could not parse `%s'", filename); + errx(1, "could not parse `%s'", filenames[0]); if (fd_mesa_debug & FD_DBG_OPTMSGS) tgsi_dump(toks, 0); nir = ir3_tgsi_to_nir(toks); - s.from_tgsi = true; - } else if (strcmp(ext, ".frag") == 0) { - nir = load_glsl(filename, MESA_SHADER_FRAGMENT); - s.from_tgsi = false; - } else if (strcmp(ext, ".vert") == 0) { - nir = load_glsl(filename, MESA_SHADER_FRAGMENT); - s.from_tgsi = false; + } else if (num_files > 0) { + nir = load_glsl(num_files, filenames, stage); } else { print_usage(); return -1; diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c mesa-17.0.7/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c --- mesa-12.0.6/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c 2017-06-01 10:37:10.000000000 +0000 @@ -119,6 +119,11 @@ bool error; }; +/* gpu pointer size in units of 32bit registers/slots */ +static unsigned pointer_size(struct ir3_compile *ctx) +{ + return (ctx->compiler->gpu_id >= 500) ? 2 : 1; +} static struct ir3_instruction * create_immed(struct ir3_block *block, uint32_t val); static struct ir3_block * get_block(struct ir3_compile *ctx, nir_block *nblock); @@ -181,31 +186,47 @@ nir_print_shader(ctx->s, stdout); } - so->first_driver_param = so->first_immediate = ctx->s->num_uniforms; + so->num_uniforms = ctx->s->num_uniforms; + so->num_ubos = ctx->s->info->num_ubos; - /* Layout of constant registers: + /* Layout of constant registers, each section aligned to vec4. Note + * that pointer size (ubo, etc) changes depending on generation. * - * num_uniform * vec4 - user consts - * 4 * vec4 - UBO addresses + * user consts + * UBO addresses * if (vertex shader) { - * N * vec4 - driver params (IR3_DP_*) - * 1 * vec4 - stream-out addresses + * driver params (IR3_DP_*) + * if (stream_output.num_outputs > 0) + * stream-out addresses * } + * immediates * - * TODO this could be made more dynamic, to at least skip sections - * that we don't need.. + * Immediates go last mostly because they are inserted in the CP pass + * after the nir -> ir3 frontend. */ + unsigned constoff = align(ctx->s->num_uniforms, 4); + unsigned ptrsz = pointer_size(ctx); - /* reserve 4 (vec4) slots for ubo base addresses: */ - so->first_immediate += 4; + memset(&so->constbase, ~0, sizeof(so->constbase)); + + if (so->num_ubos > 0) { + so->constbase.ubo = constoff; + constoff += align(ctx->s->info->num_ubos * ptrsz, 4) / 4; + } if (so->type == SHADER_VERTEX) { - /* driver params (see ir3_driver_param): */ - so->first_immediate += IR3_DP_COUNT/4; /* convert to vec4 */ - /* one (vec4) slot for stream-output base addresses: */ - so->first_immediate++; + so->constbase.driver_param = constoff; + constoff += align(IR3_DP_COUNT, 4) / 4; + + if ((compiler->gpu_id < 500) && + so->shader->stream_output.num_outputs > 0) { + so->constbase.tfbo = constoff; + constoff += align(PIPE_MAX_SO_BUFFERS * ptrsz, 4) / 4; + } } + so->constbase.immediate = constoff; + return ctx; } @@ -235,7 +256,7 @@ declare_var(struct ir3_compile *ctx, nir_variable *var) { unsigned length = glsl_get_length(var->type) * 4; /* always vec4, at least with ttn */ - struct ir3_array *arr = ralloc(ctx, struct ir3_array); + struct ir3_array *arr = rzalloc(ctx, struct ir3_array); arr->id = ++ctx->num_arrays; arr->length = length; arr->var = var; @@ -282,7 +303,7 @@ return __get_dst(ctx, dst, n); } -static struct ir3_instruction ** +static struct ir3_instruction * const * get_src(struct ir3_compile *ctx, nir_src *src) { struct hash_entry *entry; @@ -571,54 +592,12 @@ } } -/* NOTE: this creates the "TGSI" style fragface (ie. input slot - * VARYING_SLOT_FACE). For NIR style nir_intrinsic_load_front_face - * we can just use the value from hw directly (since it is boolean) - */ -static struct ir3_instruction * -create_frag_face(struct ir3_compile *ctx, unsigned comp) -{ - struct ir3_block *block = ctx->block; - struct ir3_instruction *instr; - - switch (comp) { - case 0: /* .x */ - compile_assert(ctx, !ctx->frag_face); - - ctx->frag_face = create_input(block, 0); - ctx->frag_face->regs[0]->flags |= IR3_REG_HALF; - - /* for faceness, we always get -1 or 0 (int).. but TGSI expects - * positive vs negative float.. and piglit further seems to - * expect -1.0 or 1.0: - * - * mul.s tmp, hr0.x, 2 - * add.s tmp, tmp, 1 - * mov.s32f32, dst, tmp - * - */ - instr = ir3_MUL_S(block, ctx->frag_face, 0, - create_immed(block, 2), 0); - instr = ir3_ADD_S(block, instr, 0, - create_immed(block, 1), 0); - instr = ir3_COV(block, instr, TYPE_S32, TYPE_F32); - - return instr; - case 1: /* .y */ - case 2: /* .z */ - return create_immed(block, fui(0.0)); - default: - case 3: /* .w */ - return create_immed(block, fui(1.0)); - } -} - static struct ir3_instruction * create_driver_param(struct ir3_compile *ctx, enum ir3_driver_param dp) { /* first four vec4 sysval's reserved for UBOs: */ /* NOTE: dp is in scalar, but there can be >4 dp components: */ - unsigned n = ctx->so->first_driver_param + IR3_DRIVER_PARAM_OFF; + unsigned n = ctx->so->constbase.driver_param; unsigned r = regid(n + dp / 4, dp % 4); return create_uniform(ctx, r); } @@ -1014,21 +993,28 @@ struct ir3_instruction **dst) { struct ir3_block *b = ctx->block; - struct ir3_instruction *addr, *src0, *src1; + struct ir3_instruction *base_lo, *base_hi, *addr, *src0, *src1; nir_const_value *const_offset; /* UBO addresses are the first driver params: */ - unsigned ubo = regid(ctx->so->first_driver_param + IR3_UBOS_OFF, 0); + unsigned ubo = regid(ctx->so->constbase.ubo, 0); + const unsigned ptrsz = pointer_size(ctx); + int off = 0; /* First src is ubo index, which could either be an immed or not: */ src0 = get_src(ctx, &intr->src[0])[0]; if (is_same_type_mov(src0) && (src0->regs[1]->flags & IR3_REG_IMMED)) { - addr = create_uniform(ctx, ubo + src0->regs[1]->iim_val); + base_lo = create_uniform(ctx, ubo + (src0->regs[1]->iim_val * ptrsz)); + base_hi = create_uniform(ctx, ubo + (src0->regs[1]->iim_val * ptrsz) + 1); } else { - addr = create_uniform_indirect(ctx, ubo, get_addr(ctx, src0)); + base_lo = create_uniform_indirect(ctx, ubo, get_addr(ctx, src0)); + base_hi = create_uniform_indirect(ctx, ubo + 1, get_addr(ctx, src0)); } + /* note: on 32bit gpu's base_hi is ignored and DCE'd */ + addr = base_lo; + const_offset = nir_src_as_const_value(intr->src[1]); if (const_offset) { off += const_offset->u32[0]; @@ -1050,6 +1036,20 @@ off -= off2; } + if (ptrsz == 2) { + struct ir3_instruction *carry; + + /* handle 32b rollover, ie: + * if (addr < base_lo) + * base_hi++ + */ + carry = ir3_CMPS_U(b, addr, 0, base_lo, 0); + carry->cat2.condition = IR3_COND_LT; + base_hi = ir3_ADD_S(b, base_hi, 0, carry, 0); + + addr = create_collect(b, (struct ir3_instruction*[]){ addr, base_hi }, 2); + } + for (int i = 0; i < intr->num_components; i++) { struct ir3_instruction *load = ir3_LDG(b, addr, 0, create_immed(b, 1), 0); @@ -1105,7 +1105,8 @@ nir_deref_var *dvar = intr->variables[0]; nir_deref_array *darr = nir_deref_as_array(dvar->deref.child); struct ir3_array *arr = get_var(ctx, dvar->var); - struct ir3_instruction *addr, **src; + struct ir3_instruction *addr; + struct ir3_instruction * const *src; unsigned wrmask = nir_intrinsic_write_mask(intr); compile_assert(ctx, dvar->deref.child && @@ -1146,7 +1147,7 @@ so->inputs[n].slot = slot; so->inputs[n].compmask = 1; so->inputs[n].regid = r; - so->inputs[n].interpolate = INTERP_QUALIFIER_FLAT; + so->inputs[n].interpolate = INTERP_MODE_FLAT; so->total_in++; ctx->ir->ninputs = MAX2(ctx->ir->ninputs, r + 1); @@ -1157,7 +1158,8 @@ emit_intrinsic(struct ir3_compile *ctx, nir_intrinsic_instr *intr) { const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic]; - struct ir3_instruction **dst, **src; + struct ir3_instruction **dst; + struct ir3_instruction * const *src; struct ir3_block *b = ctx->block; nir_const_value *const_offset; int idx; @@ -1244,10 +1246,12 @@ dst[0] = ctx->basevertex; break; case nir_intrinsic_load_vertex_id_zero_base: + case nir_intrinsic_load_vertex_id: if (!ctx->vertex_id) { + gl_system_value sv = (intr->intrinsic == nir_intrinsic_load_vertex_id) ? + SYSTEM_VALUE_VERTEX_ID : SYSTEM_VALUE_VERTEX_ID_ZERO_BASE; ctx->vertex_id = create_input(b, 0); - add_sysval_input(ctx, SYSTEM_VALUE_VERTEX_ID_ZERO_BASE, - ctx->vertex_id); + add_sysval_input(ctx, sv, ctx->vertex_id); } dst[0] = ctx->vertex_id; break; @@ -1385,7 +1389,8 @@ { struct ir3_block *b = ctx->block; struct ir3_instruction **dst, *sam, *src0[12], *src1[4]; - struct ir3_instruction **coord, *lod, *compare, *proj, **off, **ddx, **ddy; + struct ir3_instruction * const *coord, * const *off, * const *ddx, * const *ddy; + struct ir3_instruction *lod, *compare, *proj; bool has_bias = false, has_lod = false, has_proj = false, has_off = false; unsigned i, coords, flags; unsigned nsrc0 = 0, nsrc1 = 0; @@ -1411,7 +1416,7 @@ lod = get_src(ctx, &tex->src[i].src)[0]; has_lod = true; break; - case nir_tex_src_comparitor: /* shadow comparator */ + case nir_tex_src_comparator: /* shadow comparator */ compare = get_src(ctx, &tex->src[i].src)[0]; break; case nir_tex_src_projector: @@ -1455,17 +1460,6 @@ tex_info(tex, &flags, &coords); - /* scale up integer coords for TXF based on the LOD */ - if (ctx->unminify_coords && (opc == OPC_ISAML)) { - assert(has_lod); - for (i = 0; i < coords; i++) - coord[i] = ir3_SHL_B(b, coord[i], 0, lod, 0); - } - - /* the array coord for cube arrays needs 0.5 added to it */ - if (ctx->array_index_add_half && tex->is_array && (opc != OPC_ISAML)) - coord[coords] = ir3_ADD_F(b, coord[coords], 0, create_immed(b, fui(0.5)), 0); - /* * lay out the first argument in the proper order: * - actual coordinates first @@ -1479,7 +1473,16 @@ /* insert tex coords: */ for (i = 0; i < coords; i++) - src0[nsrc0++] = coord[i]; + src0[i] = coord[i]; + + nsrc0 = i; + + /* scale up integer coords for TXF based on the LOD */ + if (ctx->unminify_coords && (opc == OPC_ISAML)) { + assert(has_lod); + for (i = 0; i < coords; i++) + src0[i] = ir3_SHL_B(b, src0[i], 0, lod, 0); + } if (coords == 1) { /* hw doesn't do 1d, so we treat it as 2d with @@ -1492,8 +1495,15 @@ if (tex->is_shadow && tex->op != nir_texop_lod) src0[nsrc0++] = compare; - if (tex->is_array && tex->op != nir_texop_lod) - src0[nsrc0++] = coord[coords]; + if (tex->is_array && tex->op != nir_texop_lod) { + struct ir3_instruction *idx = coord[coords]; + + /* the array coord for cube arrays needs 0.5 added to it */ + if (ctx->array_index_add_half && (opc != OPC_ISAML)) + idx = ir3_ADD_F(b, idx, 0, create_immed(b, fui(0.5)), 0); + + src0[nsrc0++] = idx; + } if (has_proj) { src0[nsrc0++] = proj; @@ -1621,7 +1631,8 @@ emit_tex_txs(struct ir3_compile *ctx, nir_tex_instr *tex) { struct ir3_block *b = ctx->block; - struct ir3_instruction **dst, *sam, *lod; + struct ir3_instruction **dst, *sam; + struct ir3_instruction *lod; unsigned flags, coords; tex_info(tex, &flags, &coords); @@ -1938,7 +1949,7 @@ unsigned stride = strmout->stride[i]; struct ir3_instruction *base, *off; - base = create_uniform(ctx, regid(v->first_driver_param + IR3_TFBOS_OFF, i)); + base = create_uniform(ctx, regid(v->constbase.tfbo, i)); /* 24-bit should be enough: */ off = ir3_MUL_U(ctx->block, vtxcnt, 0, @@ -1993,7 +2004,8 @@ * out, we guarantee that all exit paths flow into the stream- * out instructions. */ - if ((ctx->so->shader->stream_output.num_outputs > 0) && + if ((ctx->compiler->gpu_id < 500) && + (ctx->so->shader->stream_output.num_outputs > 0) && !ctx->so->key.binning_pass) { debug_assert(ctx->so->type == SHADER_VERTEX); emit_stream_out(ctx); @@ -2044,10 +2056,6 @@ so->inputs[n].slot = VARYING_SLOT_VAR8; so->inputs[n].bary = true; instr = create_frag_input(ctx, false); - } else if (slot == VARYING_SLOT_FACE) { - so->inputs[n].bary = false; - so->frag_face = true; - instr = create_frag_face(ctx, i); } else { bool use_ldlv = false; @@ -2055,7 +2063,7 @@ * we need to do flat vs smooth shading depending on * rast state: */ - if (in->data.interpolation == INTERP_QUALIFIER_NONE) { + if (in->data.interpolation == INTERP_MODE_NONE) { switch (slot) { case VARYING_SLOT_COL0: case VARYING_SLOT_COL1: @@ -2069,7 +2077,7 @@ } if (ctx->flat_bypass) { - if ((so->inputs[n].interpolate == INTERP_QUALIFIER_FLAT) || + if ((so->inputs[n].interpolate == INTERP_MODE_FLAT) || (so->inputs[n].rasterflat && ctx->so->key.rasterflat)) use_ldlv = true; } @@ -2145,10 +2153,8 @@ case VARYING_SLOT_FOGC: case VARYING_SLOT_CLIP_DIST0: case VARYING_SLOT_CLIP_DIST1: - break; case VARYING_SLOT_CLIP_VERTEX: - /* handled entirely in nir_lower_clip: */ - return; + break; default: if (slot >= VARYING_SLOT_VAR0) break; @@ -2188,16 +2194,7 @@ emit_instructions(struct ir3_compile *ctx) { unsigned ninputs, noutputs; - nir_function_impl *fxn = NULL; - - /* Find the main function: */ - nir_foreach_function(function, ctx->s) { - compile_assert(ctx, strcmp(function->name, "main") == 0); - compile_assert(ctx, function->impl); - fxn = function->impl; - break; - } - + nir_function_impl *fxn = nir_shader_get_entrypoint(ctx->s); ninputs = (max_drvloc(&ctx->s->inputs) + 1) * 4; noutputs = (max_drvloc(&ctx->s->outputs) + 1) * 4; @@ -2498,21 +2495,15 @@ /* fixup input/outputs: */ for (i = 0; i < so->outputs_count; i++) { so->outputs[i].regid = ir->outputs[i*4]->regs[0]->num; - /* preserve hack for depth output.. tgsi writes depth to .z, - * but what we give the hw is the scalar register: - */ - if (so->shader->from_tgsi && (so->type == SHADER_FRAGMENT) && - (so->outputs[i].slot == FRAG_RESULT_DEPTH)) - so->outputs[i].regid += 2; } /* Note that some or all channels of an input may be unused: */ actual_in = 0; inloc = 0; for (i = 0; i < so->inputs_count; i++) { - unsigned j, regid = ~0, compmask = 0; + unsigned j, regid = ~0, compmask = 0, maxcomp = 0; so->inputs[i].ncomp = 0; - so->inputs[i].inloc = inloc + 8; + so->inputs[i].inloc = inloc; for (j = 0; j < 4; j++) { struct ir3_instruction *in = inputs[(i*4) + j]; if (in && !(in->flags & IR3_INSTR_UNUSED)) { @@ -2523,14 +2514,19 @@ if ((so->type == SHADER_FRAGMENT) && so->inputs[i].bary) { /* assign inloc: */ assert(in->regs[1]->flags & IR3_REG_IMMED); - in->regs[1]->iim_val = inloc++; + in->regs[1]->iim_val = inloc + j; + maxcomp = j + 1; } } } - if ((so->type == SHADER_FRAGMENT) && compmask && so->inputs[i].bary) + if ((so->type == SHADER_FRAGMENT) && compmask && so->inputs[i].bary) { so->varying_in++; + so->inputs[i].compmask = (1 << maxcomp) - 1; + inloc += maxcomp; + } else { + so->inputs[i].compmask = compmask; + } so->inputs[i].regid = regid; - so->inputs[i].compmask = compmask; } if (ctx->astc_srgb) diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/ir3/ir3_cp.c mesa-17.0.7/src/gallium/drivers/freedreno/ir3/ir3_cp.c --- mesa-12.0.6/src/gallium/drivers/freedreno/ir3/ir3_cp.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/ir3/ir3_cp.c 2017-06-01 10:37:10.000000000 +0000 @@ -296,7 +296,7 @@ new_flags &= ~IR3_REG_IMMED; new_flags |= IR3_REG_CONST; reg->flags = new_flags; - reg->num = i + (4 * ctx->so->first_immediate); + reg->num = i + (4 * ctx->so->constbase.immediate); return reg; } diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/ir3/ir3_nir.c mesa-17.0.7/src/gallium/drivers/freedreno/ir3/ir3_nir.c --- mesa-12.0.6/src/gallium/drivers/freedreno/ir3/ir3_nir.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/ir3/ir3_nir.c 2017-06-01 10:37:10.000000000 +0000 @@ -82,6 +82,27 @@ #define OPT_V(nir, pass, ...) NIR_PASS_V(nir, pass, ##__VA_ARGS__) +static void +ir3_optimize_loop(nir_shader *s) +{ + bool progress; + do { + progress = false; + + OPT_V(s, nir_lower_vars_to_ssa); + progress |= OPT(s, nir_lower_alu_to_scalar); + progress |= OPT(s, nir_lower_phis_to_scalar); + + progress |= OPT(s, nir_copy_prop); + progress |= OPT(s, nir_opt_dce); + progress |= OPT(s, nir_opt_cse); + progress |= OPT(s, ir3_nir_lower_if_else); + progress |= OPT(s, nir_opt_algebraic); + progress |= OPT(s, nir_opt_constant_folding); + + } while (progress); +} + struct nir_shader * ir3_optimize_nir(struct ir3_shader *shader, nir_shader *s, const struct ir3_shader_key *key) @@ -89,7 +110,6 @@ struct nir_lower_tex_options tex_options = { .lower_rect = 0, }; - bool progress; if (key) { switch (shader->type) { @@ -122,7 +142,7 @@ } OPT_V(s, nir_opt_global_to_local); - OPT_V(s, nir_convert_to_ssa); + OPT_V(s, nir_lower_regs_to_ssa); if (key) { if (s->stage == MESA_SHADER_VERTEX) { @@ -145,24 +165,15 @@ } OPT_V(s, nir_lower_tex, &tex_options); - OPT_V(s, nir_lower_idiv); OPT_V(s, nir_lower_load_const_to_scalar); - do { - progress = false; - - OPT_V(s, nir_lower_vars_to_ssa); - OPT_V(s, nir_lower_alu_to_scalar); - OPT_V(s, nir_lower_phis_to_scalar); - - progress |= OPT(s, nir_copy_prop); - progress |= OPT(s, nir_opt_dce); - progress |= OPT(s, nir_opt_cse); - progress |= OPT(s, ir3_nir_lower_if_else); - progress |= OPT(s, nir_opt_algebraic); - progress |= OPT(s, nir_opt_constant_folding); + ir3_optimize_loop(s); - } while (progress); + /* do idiv lowering after first opt loop to give a chance for + * divide by immed power-of-two to be caught first: + */ + if (OPT(s, nir_lower_idiv)) + ir3_optimize_loop(s); OPT_V(s, nir_remove_dead_variables, nir_var_local); diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/ir3/ir3_nir_lower_if_else.c mesa-17.0.7/src/gallium/drivers/freedreno/ir3/ir3_nir_lower_if_else.c --- mesa-12.0.6/src/gallium/drivers/freedreno/ir3/ir3_nir_lower_if_else.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/ir3/ir3_nir_lower_if_else.c 2017-06-01 10:37:10.000000000 +0000 @@ -224,17 +224,14 @@ return false; nir_if *if_stmt = nir_cf_node_as_if(prev_node); - nir_cf_node *then_node = nir_if_first_then_node(if_stmt); - nir_cf_node *else_node = nir_if_first_else_node(if_stmt); + nir_block *then_block = nir_if_first_then_block(if_stmt); + nir_block *else_block = nir_if_first_else_block(if_stmt); /* We can only have one block in each side ... */ - if (nir_if_last_then_node(if_stmt) != then_node || - nir_if_last_else_node(if_stmt) != else_node) + if (nir_if_last_then_block(if_stmt) != then_block || + nir_if_last_else_block(if_stmt) != else_block) return false; - nir_block *then_block = nir_cf_node_as_block(then_node); - nir_block *else_block = nir_cf_node_as_block(else_node); - /* ... and those blocks must only contain "allowed" instructions. */ if (!block_check_for_allowed_instrs(then_block) || !block_check_for_allowed_instrs(else_block)) diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/ir3/ir3_nir_trig.c mesa-17.0.7/src/gallium/drivers/freedreno/ir3/ir3_nir_trig.c --- mesa-12.0.6/src/gallium/drivers/freedreno/ir3/ir3_nir_trig.c 2017-01-24 01:43:29.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/ir3/ir3_nir_trig.c 2017-06-01 10:38:07.000000000 +0000 @@ -15,160 +15,204 @@ #endif +#include "compiler/nir/nir_search_helpers.h" static const nir_search_variable search1_0 = { { nir_search_value_variable, 0 }, 0, /* x */ false, nir_type_invalid, + NULL, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_expression search1 = { { nir_search_value_expression, 0 }, false, nir_op_fcos, { &search1_0.value }, + NULL, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_constant replace1_0_0_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x401921fb3fa6defc /* 6.283185 */ }, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_constant replace1_0_0_1_0_0_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x3fc45f30e7ff583a /* 0.159155 */ }, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_variable replace1_0_0_1_0_0_1 = { { nir_search_value_variable, 0 }, 0, /* x */ false, nir_type_invalid, + NULL, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_expression replace1_0_0_1_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, { &replace1_0_0_1_0_0_0.value, &replace1_0_0_1_0_0_1.value }, + NULL, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_constant replace1_0_0_1_0_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x3fe0000000000000 /* 0.5 */ }, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_expression replace1_0_0_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, { &replace1_0_0_1_0_0.value, &replace1_0_0_1_0_1.value }, + NULL, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_expression replace1_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ffract, { &replace1_0_0_1_0.value }, + NULL, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_expression replace1_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, { &replace1_0_0_0.value, &replace1_0_0_1.value }, + NULL, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_constant replace1_0_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x400921fb82c2bd7f /* 3.141593 */ }, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_expression replace1_0 = { { nir_search_value_expression, 0 }, false, nir_op_fsub, { &replace1_0_0.value, &replace1_0_1.value }, + NULL, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_expression replace1 = { { nir_search_value_expression, 0 }, false, nir_op_fcos, { &replace1_0.value }, + NULL, }; static const struct transform ir3_nir_apply_trig_workarounds_fcos_xforms[] = { { &search1, &replace1.value, 0 }, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_variable search0_0 = { { nir_search_value_variable, 0 }, 0, /* x */ false, nir_type_invalid, + NULL, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_expression search0 = { { nir_search_value_expression, 0 }, false, nir_op_fsin, { &search0_0.value }, + NULL, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_constant replace0_0_0_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x401921fb3fa6defc /* 6.283185 */ }, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_constant replace0_0_0_1_0_0_0 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x3fc45f30e7ff583a /* 0.159155 */ }, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_variable replace0_0_0_1_0_0_1 = { { nir_search_value_variable, 0 }, 0, /* x */ false, nir_type_invalid, + NULL, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_expression replace0_0_0_1_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, { &replace0_0_0_1_0_0_0.value, &replace0_0_0_1_0_0_1.value }, + NULL, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_constant replace0_0_0_1_0_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x3fe0000000000000 /* 0.5 */ }, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_expression replace0_0_0_1_0 = { { nir_search_value_expression, 0 }, false, nir_op_fadd, { &replace0_0_0_1_0_0.value, &replace0_0_0_1_0_1.value }, + NULL, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_expression replace0_0_0_1 = { { nir_search_value_expression, 0 }, false, nir_op_ffract, { &replace0_0_0_1_0.value }, + NULL, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_expression replace0_0_0 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, { &replace0_0_0_0.value, &replace0_0_0_1.value }, + NULL, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_constant replace0_0_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x400921fb82c2bd7f /* 3.141593 */ }, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_expression replace0_0 = { { nir_search_value_expression, 0 }, false, nir_op_fsub, { &replace0_0_0.value, &replace0_0_1.value }, + NULL, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_expression replace0 = { { nir_search_value_expression, 0 }, false, nir_op_fsin, { &replace0_0.value }, + NULL, }; static const struct transform ir3_nir_apply_trig_workarounds_fsin_xforms[] = { diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/ir3/ir3_shader.c mesa-17.0.7/src/gallium/drivers/freedreno/ir3/ir3_shader.c --- mesa-12.0.6/src/gallium/drivers/freedreno/ir3/ir3_shader.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/ir3/ir3_shader.c 2017-06-01 10:37:10.000000000 +0000 @@ -294,7 +294,6 @@ tgsi_dump(cso->tokens, 0); } nir = ir3_tgsi_to_nir(cso->tokens); - shader->from_tgsi = true; } /* do first pass optimization, ignoring the key: */ shader->nir = ir3_optimize_nir(shader, nir, NULL); @@ -309,7 +308,8 @@ * (as otherwise nothing will trigger the shader to be * actually compiled) */ - static struct ir3_shader_key key = {0}; + static struct ir3_shader_key key; + memset(&key, 0, sizeof(key)); ir3_shader_variant(shader, key, debug); } return shader; @@ -366,7 +366,7 @@ } for (i = 0; i < so->immediates_count; i++) { - debug_printf("@const(c%d.x)\t", so->first_immediate + i); + debug_printf("@const(c%d.x)\t", so->constbase.immediate + i); debug_printf("0x%08x, 0x%08x, 0x%08x, 0x%08x\n", so->immediates[i].val[0], so->immediates[i].val[1], @@ -472,7 +472,7 @@ uint64_t ir3_shader_outputs(const struct ir3_shader *so) { - return so->nir->info.outputs_written; + return so->nir->info->outputs_written; } /* This has to reach into the fd_context a bit more than the rest of @@ -503,7 +503,7 @@ * the user consts early to avoid HLSQ lockup caused by * writing too many consts */ - uint32_t max_const = MIN2(v->first_driver_param, v->constlen); + uint32_t max_const = MIN2(v->num_uniforms, v->constlen); // I expect that size should be a multiple of vec4's: assert(size == align(size, 4)); @@ -514,7 +514,7 @@ size = MIN2(size, 4 * max_const); if (size > 0) { - fd_wfi(ctx, ring); + fd_wfi(ctx->batch, ring); ctx->emit_const(ring, v->type, 0, cb->buffer_offset, size, cb->user_buffer, cb->buffer); @@ -527,11 +527,11 @@ emit_ubos(struct fd_context *ctx, const struct ir3_shader_variant *v, struct fd_ringbuffer *ring, struct fd_constbuf_stateobj *constbuf) { - uint32_t offset = v->first_driver_param + IR3_UBOS_OFF; + uint32_t offset = v->constbase.ubo; if (v->constlen > offset) { - uint32_t params = MIN2(4, v->constlen - offset) * 4; + uint32_t params = v->num_ubos; uint32_t offsets[params]; - struct fd_bo *bos[params]; + struct pipe_resource *prscs[params]; for (uint32_t i = 0; i < params; i++) { const uint32_t index = i + 1; /* UBOs start at index 1 */ @@ -540,15 +540,15 @@ if ((constbuf->enabled_mask & (1 << index)) && cb->buffer) { offsets[i] = cb->buffer_offset; - bos[i] = fd_resource(cb->buffer)->bo; + prscs[i] = cb->buffer; } else { offsets[i] = 0; - bos[i] = NULL; + prscs[i] = NULL; } } - fd_wfi(ctx, ring); - ctx->emit_const_bo(ring, v->type, false, offset * 4, params, bos, offsets); + fd_wfi(ctx->batch, ring); + ctx->emit_const_bo(ring, v->type, false, offset * 4, params, prscs, offsets); } } @@ -557,7 +557,7 @@ struct fd_ringbuffer *ring) { int size = v->immediates_count; - uint32_t base = v->first_immediate; + uint32_t base = v->constbase.immediate; /* truncate size to avoid writing constants that shader * does not use: @@ -569,7 +569,7 @@ size *= 4; if (size > 0) { - fd_wfi(ctx, ring); + fd_wfi(ctx->batch, ring); ctx->emit_const(ring, v->type, base, 0, size, v->immediates[0].val, NULL); } @@ -581,13 +581,13 @@ struct fd_ringbuffer *ring) { /* streamout addresses after driver-params: */ - uint32_t offset = v->first_driver_param + IR3_TFBOS_OFF; + uint32_t offset = v->constbase.tfbo; if (v->constlen > offset) { struct fd_streamout_stateobj *so = &ctx->streamout; struct pipe_stream_output_info *info = &v->shader->stream_output; uint32_t params = 4; uint32_t offsets[params]; - struct fd_bo *bos[params]; + struct pipe_resource *prscs[params]; for (uint32_t i = 0; i < params; i++) { struct pipe_stream_output_target *target = so->targets[i]; @@ -595,15 +595,15 @@ if (target) { offsets[i] = (so->offsets[i] * info->stride[i] * 4) + target->buffer_offset; - bos[i] = fd_resource(target->buffer)->bo; + prscs[i] = target->buffer; } else { offsets[i] = 0; - bos[i] = NULL; + prscs[i] = NULL; } } - fd_wfi(ctx, ring); - ctx->emit_const_bo(ring, v->type, true, offset * 4, params, bos, offsets); + fd_wfi(ctx->batch, ring); + ctx->emit_const_bo(ring, v->type, true, offset * 4, params, prscs, offsets); } } @@ -614,6 +614,8 @@ struct pipe_stream_output_info *info = &v->shader->stream_output; uint32_t maxvtxcnt = 0x7fffffff; + if (ctx->screen->gpu_id >= 500) + return 0; if (v->key.binning_pass) return 0; if (v->shader->stream_output.num_outputs == 0) @@ -680,8 +682,8 @@ /* emit driver params every time: */ /* TODO skip emit if shader doesn't use driver params to avoid WFI.. */ if (info && (v->type == SHADER_VERTEX)) { - uint32_t offset = v->first_driver_param + IR3_DRIVER_PARAM_OFF; - if (v->constlen >= offset) { + uint32_t offset = v->constbase.driver_param; + if (v->constlen > offset) { uint32_t vertex_params[IR3_DP_COUNT] = { [IR3_DP_VTXID_BASE] = info->indexed ? info->index_bias : info->start, @@ -704,7 +706,7 @@ vertex_params_size = ARRAY_SIZE(vertex_params); } - fd_wfi(ctx, ring); + fd_wfi(ctx->batch, ring); ctx->emit_const(ring, SHADER_VERTEX, offset * 4, 0, vertex_params_size, vertex_params, NULL); diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/ir3/ir3_shader.h mesa-17.0.7/src/gallium/drivers/freedreno/ir3/ir3_shader.h --- mesa-12.0.6/src/gallium/drivers/freedreno/ir3/ir3_shader.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/ir3/ir3_shader.h 2017-06-01 10:37:10.000000000 +0000 @@ -31,6 +31,7 @@ #include "pipe/p_state.h" #include "compiler/shader_enums.h" +#include "util/bitscan.h" #include "ir3.h" #include "disasm.h" @@ -46,22 +47,6 @@ IR3_DP_COUNT = 36 /* must be aligned to vec4 */ }; -/* Layout of constant registers: - * - * num_uniform * vec4 - user consts - * 4 * vec4 - UBO addresses - * if (vertex shader) { - * N * vec4 - driver params (IR3_DP_*) - * 1 * vec4 - stream-out addresses - * } - * - * TODO this could be made more dynamic, to at least skip sections - * that we don't need.. - */ -#define IR3_UBOS_OFF 0 /* UBOs after user consts */ -#define IR3_DRIVER_PARAM_OFF 4 /* driver params after UBOs */ -#define IR3_TFBOS_OFF (IR3_DRIVER_PARAM_OFF + IR3_DP_COUNT/4) - /* Configuration key used to identify a shader variant.. different * shader variants can be used to implement features not supported * in hw (two sided color), binning-pass vertex shader, etc. @@ -142,6 +127,12 @@ */ unsigned constlen; + /* number of uniforms (in vec4), not including built-in compiler + * constants, etc. + */ + unsigned num_uniforms; + unsigned num_ubos; + /* About Linkage: * + Let the frag shader determine the position/compmask for the * varyings, since it is the place where we know if the varying @@ -180,16 +171,10 @@ uint8_t regid; uint8_t compmask; uint8_t ncomp; - /* In theory inloc of fs should match outloc of vs. Or - * rather the outloc of the vs is 8 plus the offset passed - * to bary.f. Presumably that +8 is to account for - * gl_Position/gl_PointSize? - * - * NOTE inloc is currently aligned to 4 (we don't try - * to pack varyings). Changing this would likely break - * assumptions in few places (like setting up of flat - * shading in fd3_program) so be sure to check all the - * spots where inloc is used. + /* location of input (ie. offset passed to bary.f, etc). This + * matches the SP_VS_VPC_DST_REG.OUTLOCn value (a3xx and a4xx + * have the OUTLOCn value offset by 8, presumably to account + * for gl_Position/gl_PointSize) */ uint8_t inloc; /* vertex shader specific: */ @@ -197,7 +182,7 @@ /* fragment shader specific: */ bool bary : 1; /* fetched varying (vs one loaded into reg) */ bool rasterflat : 1; /* special handling for emit->rasterflat */ - enum glsl_interp_qualifier interpolate; + enum glsl_interp_mode interpolate; } inputs[16 + 2]; /* +POSITION +FACE */ /* sum of input components (scalar). For frag shaders, it only counts @@ -216,12 +201,18 @@ /* do we have kill instructions: */ bool has_kill; - /* const reg # of first immediate, ie. 1 == c1 - * (not regid, because TGSI thinks in terms of vec4 registers, - * not scalar registers) + /* Layout of constant registers, each section (in vec4). Pointer size + * is 32b (a3xx, a4xx), or 64b (a5xx+), which effects the size of the + * UBO and stream-out consts. */ - unsigned first_driver_param; - unsigned first_immediate; + struct { + /* user const start at zero */ + unsigned ubo; + unsigned driver_param; + unsigned tfbo; + unsigned immediate; + } constbase; + unsigned immediates_count; struct { uint32_t val[4]; @@ -344,6 +335,52 @@ return i; } +struct ir3_shader_linkage { + uint8_t max_loc; + uint8_t cnt; + struct { + uint8_t regid; + uint8_t compmask; + uint8_t loc; + } var[32]; +}; + +static inline void +ir3_link_add(struct ir3_shader_linkage *l, uint8_t regid, uint8_t compmask, uint8_t loc) +{ + int i = l->cnt++; + + debug_assert(i < ARRAY_SIZE(l->var)); + + l->var[i].regid = regid; + l->var[i].compmask = compmask; + l->var[i].loc = loc; + l->max_loc = MAX2(l->max_loc, loc + util_last_bit(compmask)); +} + +static inline void +ir3_link_shaders(struct ir3_shader_linkage *l, + const struct ir3_shader_variant *vs, + const struct ir3_shader_variant *fs) +{ + int j = -1, k; + + while (l->cnt < ARRAY_SIZE(l->var)) { + j = ir3_next_varying(fs, j); + + if (j >= fs->inputs_count) + break; + + if (fs->inputs[j].inloc >= fs->total_in) + continue; + + k = ir3_find_output(vs, fs->inputs[j].slot); + + ir3_link_add(l, vs->outputs[k].regid, + fs->inputs[j].compmask, fs->inputs[j].inloc); + } +} + static inline uint32_t ir3_find_output_regid(const struct ir3_shader_variant *so, unsigned slot) { @@ -354,4 +391,14 @@ return regid(63, 0); } +static inline uint32_t +ir3_find_sysval_regid(const struct ir3_shader_variant *so, unsigned slot) +{ + int j; + for (j = 0; j < so->inputs_count; j++) + if (so->inputs[j].sysval && (so->inputs[j].slot == slot)) + return so->inputs[j].regid; + return regid(63, 0); +} + #endif /* IR3_SHADER_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/Makefile.am mesa-17.0.7/src/gallium/drivers/freedreno/Makefile.am --- mesa-12.0.6/src/gallium/drivers/freedreno/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -9,6 +9,7 @@ $(GALLIUM_DRIVER_CFLAGS) \ $(FREEDRENO_CFLAGS) +MKDIR_GEN = $(AM_V_at)$(MKDIR_P) $(@D) ir3/ir3_nir_trig.c: ir3/ir3_nir_trig.py $(top_srcdir)/src/compiler/nir/nir_algebraic.py $(MKDIR_GEN) $(AM_V_GEN) PYTHONPATH=$(top_srcdir)/src/compiler/nir $(PYTHON2) $(PYTHON_FLAGS) $(srcdir)/ir3/ir3_nir_trig.py > $@ || ($(RM) $@; false) @@ -20,6 +21,7 @@ $(a2xx_SOURCES) \ $(a3xx_SOURCES) \ $(a4xx_SOURCES) \ + $(a5xx_SOURCES) \ $(ir3_SOURCES) \ $(ir3_GENERATED_FILES) diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/Makefile.in mesa-17.0.7/src/gallium/drivers/freedreno/Makefile.in --- mesa-12.0.6/src/gallium/drivers/freedreno/Makefile.in 2017-01-24 01:41:46.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/Makefile.in 2017-06-01 10:37:20.000000000 +0000 @@ -90,10 +90,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -118,9 +121,10 @@ CONFIG_CLEAN_VPATH_FILES = LTLIBRARIES = $(noinst_LTLIBRARIES) libfreedreno_la_LIBADD = -am__objects_1 = freedreno_context.lo freedreno_draw.lo \ - freedreno_fence.lo freedreno_gmem.lo freedreno_program.lo \ - freedreno_query.lo freedreno_query_hw.lo freedreno_query_sw.lo \ +am__objects_1 = freedreno_batch.lo freedreno_batch_cache.lo \ + freedreno_context.lo freedreno_draw.lo freedreno_fence.lo \ + freedreno_gmem.lo freedreno_program.lo freedreno_query.lo \ + freedreno_query_hw.lo freedreno_query_sw.lo \ freedreno_resource.lo freedreno_screen.lo freedreno_state.lo \ freedreno_surface.lo freedreno_texture.lo freedreno_util.lo am__dirstamp = $(am__leading_dot)dirstamp @@ -137,15 +141,19 @@ a4xx/fd4_emit.lo a4xx/fd4_format.lo a4xx/fd4_gmem.lo \ a4xx/fd4_program.lo a4xx/fd4_query.lo a4xx/fd4_rasterizer.lo \ a4xx/fd4_screen.lo a4xx/fd4_texture.lo a4xx/fd4_zsa.lo -am__objects_5 = ir3/disasm-a3xx.lo ir3/ir3.lo ir3/ir3_compiler_nir.lo \ +am__objects_5 = a5xx/fd5_blend.lo a5xx/fd5_context.lo a5xx/fd5_draw.lo \ + a5xx/fd5_emit.lo a5xx/fd5_format.lo a5xx/fd5_gmem.lo \ + a5xx/fd5_program.lo a5xx/fd5_query.lo a5xx/fd5_rasterizer.lo \ + a5xx/fd5_screen.lo a5xx/fd5_texture.lo a5xx/fd5_zsa.lo +am__objects_6 = ir3/disasm-a3xx.lo ir3/ir3.lo ir3/ir3_compiler_nir.lo \ ir3/ir3_compiler.lo ir3/ir3_cp.lo ir3/ir3_depth.lo \ ir3/ir3_group.lo ir3/ir3_legalize.lo ir3/ir3_nir.lo \ ir3/ir3_nir_lower_if_else.lo ir3/ir3_print.lo ir3/ir3_ra.lo \ ir3/ir3_sched.lo ir3/ir3_shader.lo -am__objects_6 = ir3/ir3_nir_trig.lo +am__objects_7 = ir3/ir3_nir_trig.lo am_libfreedreno_la_OBJECTS = $(am__objects_1) $(am__objects_2) \ $(am__objects_3) $(am__objects_4) $(am__objects_5) \ - $(am__objects_6) + $(am__objects_6) $(am__objects_7) libfreedreno_la_OBJECTS = $(am_libfreedreno_la_OBJECTS) AM_V_lt = $(am__v_lt_@AM_V@) am__v_lt_ = $(am__v_lt_@AM_DEFAULT_V@) @@ -155,15 +163,17 @@ am_ir3_compiler_OBJECTS = ir3/ir3_cmdline.$(OBJEXT) ir3_compiler_OBJECTS = $(am_ir3_compiler_OBJECTS) am__DEPENDENCIES_1 = -am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ - $(am__DEPENDENCIES_1) +@HAVE_LIBDRM_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) +am__DEPENDENCIES_3 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_2) ir3_compiler_DEPENDENCIES = libfreedreno.la \ $(top_builddir)/src/gallium/auxiliary/libgallium.la \ $(top_builddir)/src/compiler/nir/libnir.la \ $(top_builddir)/src/compiler/glsl/libstandalone.la \ $(top_builddir)/src/util/libmesautil.la \ $(top_builddir)/src/mesa/libmesagallium.la \ - $(am__DEPENDENCIES_2) $(am__DEPENDENCIES_1) + $(am__DEPENDENCIES_3) $(am__DEPENDENCIES_1) AM_V_P = $(am__v_P_@AM_V@) am__v_P_ = $(am__v_P_@AM_DEFAULT_V@) am__v_P_0 = false @@ -252,6 +262,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -266,6 +278,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -295,10 +308,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -348,11 +362,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -392,8 +403,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -430,8 +439,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -440,7 +447,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -448,13 +454,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -483,6 +490,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -549,6 +557,10 @@ adreno_common.xml.h \ adreno_pm4.xml.h \ disasm.h \ + freedreno_batch.c \ + freedreno_batch.h \ + freedreno_batch_cache.c \ + freedreno_batch_cache.h \ freedreno_context.c \ freedreno_context.h \ freedreno_draw.c \ @@ -663,6 +675,33 @@ a4xx/fd4_zsa.c \ a4xx/fd4_zsa.h +a5xx_SOURCES := \ + a5xx/a5xx.xml.h \ + a5xx/fd5_blend.c \ + a5xx/fd5_blend.h \ + a5xx/fd5_context.c \ + a5xx/fd5_context.h \ + a5xx/fd5_draw.c \ + a5xx/fd5_draw.h \ + a5xx/fd5_emit.c \ + a5xx/fd5_emit.h \ + a5xx/fd5_format.c \ + a5xx/fd5_format.h \ + a5xx/fd5_gmem.c \ + a5xx/fd5_gmem.h \ + a5xx/fd5_program.c \ + a5xx/fd5_program.h \ + a5xx/fd5_query.c \ + a5xx/fd5_query.h \ + a5xx/fd5_rasterizer.c \ + a5xx/fd5_rasterizer.h \ + a5xx/fd5_screen.c \ + a5xx/fd5_screen.h \ + a5xx/fd5_texture.c \ + a5xx/fd5_texture.h \ + a5xx/fd5_zsa.c \ + a5xx/fd5_zsa.h + ir3_SOURCES := \ ir3/disasm-a3xx.c \ ir3/instr-a3xx.h \ @@ -734,12 +773,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -751,7 +786,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ -Wno-packed-bitfield-compat \ -I$(top_srcdir)/src/gallium/drivers/freedreno/ir3 \ @@ -760,12 +795,14 @@ $(GALLIUM_DRIVER_CFLAGS) \ $(FREEDRENO_CFLAGS) +MKDIR_GEN = $(AM_V_at)$(MKDIR_P) $(@D) noinst_LTLIBRARIES = libfreedreno.la libfreedreno_la_SOURCES = \ $(C_SOURCES) \ $(a2xx_SOURCES) \ $(a3xx_SOURCES) \ $(a4xx_SOURCES) \ + $(a5xx_SOURCES) \ $(ir3_SOURCES) \ $(ir3_GENERATED_FILES) @@ -909,6 +946,30 @@ a4xx/fd4_texture.lo: a4xx/$(am__dirstamp) \ a4xx/$(DEPDIR)/$(am__dirstamp) a4xx/fd4_zsa.lo: a4xx/$(am__dirstamp) a4xx/$(DEPDIR)/$(am__dirstamp) +a5xx/$(am__dirstamp): + @$(MKDIR_P) a5xx + @: > a5xx/$(am__dirstamp) +a5xx/$(DEPDIR)/$(am__dirstamp): + @$(MKDIR_P) a5xx/$(DEPDIR) + @: > a5xx/$(DEPDIR)/$(am__dirstamp) +a5xx/fd5_blend.lo: a5xx/$(am__dirstamp) a5xx/$(DEPDIR)/$(am__dirstamp) +a5xx/fd5_context.lo: a5xx/$(am__dirstamp) \ + a5xx/$(DEPDIR)/$(am__dirstamp) +a5xx/fd5_draw.lo: a5xx/$(am__dirstamp) a5xx/$(DEPDIR)/$(am__dirstamp) +a5xx/fd5_emit.lo: a5xx/$(am__dirstamp) a5xx/$(DEPDIR)/$(am__dirstamp) +a5xx/fd5_format.lo: a5xx/$(am__dirstamp) \ + a5xx/$(DEPDIR)/$(am__dirstamp) +a5xx/fd5_gmem.lo: a5xx/$(am__dirstamp) a5xx/$(DEPDIR)/$(am__dirstamp) +a5xx/fd5_program.lo: a5xx/$(am__dirstamp) \ + a5xx/$(DEPDIR)/$(am__dirstamp) +a5xx/fd5_query.lo: a5xx/$(am__dirstamp) a5xx/$(DEPDIR)/$(am__dirstamp) +a5xx/fd5_rasterizer.lo: a5xx/$(am__dirstamp) \ + a5xx/$(DEPDIR)/$(am__dirstamp) +a5xx/fd5_screen.lo: a5xx/$(am__dirstamp) \ + a5xx/$(DEPDIR)/$(am__dirstamp) +a5xx/fd5_texture.lo: a5xx/$(am__dirstamp) \ + a5xx/$(DEPDIR)/$(am__dirstamp) +a5xx/fd5_zsa.lo: a5xx/$(am__dirstamp) a5xx/$(DEPDIR)/$(am__dirstamp) ir3/$(am__dirstamp): @$(MKDIR_P) ir3 @: > ir3/$(am__dirstamp) @@ -959,6 +1020,8 @@ -rm -f a3xx/*.lo -rm -f a4xx/*.$(OBJEXT) -rm -f a4xx/*.lo + -rm -f a5xx/*.$(OBJEXT) + -rm -f a5xx/*.lo -rm -f ir3/*.$(OBJEXT) -rm -f ir3/*.lo @@ -966,6 +1029,8 @@ -rm -f *.tab.c @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/dummy.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/freedreno_batch.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/freedreno_batch_cache.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/freedreno_context.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/freedreno_draw.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/freedreno_fence.Plo@am__quote@ @@ -1018,6 +1083,18 @@ @AMDEP_TRUE@@am__include@ @am__quote@a4xx/$(DEPDIR)/fd4_screen.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@a4xx/$(DEPDIR)/fd4_texture.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@a4xx/$(DEPDIR)/fd4_zsa.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@a5xx/$(DEPDIR)/fd5_blend.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@a5xx/$(DEPDIR)/fd5_context.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@a5xx/$(DEPDIR)/fd5_draw.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@a5xx/$(DEPDIR)/fd5_emit.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@a5xx/$(DEPDIR)/fd5_format.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@a5xx/$(DEPDIR)/fd5_gmem.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@a5xx/$(DEPDIR)/fd5_program.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@a5xx/$(DEPDIR)/fd5_query.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@a5xx/$(DEPDIR)/fd5_rasterizer.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@a5xx/$(DEPDIR)/fd5_screen.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@a5xx/$(DEPDIR)/fd5_texture.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@a5xx/$(DEPDIR)/fd5_zsa.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@ir3/$(DEPDIR)/disasm-a3xx.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@ir3/$(DEPDIR)/ir3.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@ir3/$(DEPDIR)/ir3_cmdline.Po@am__quote@ @@ -1091,6 +1168,7 @@ -rm -rf a2xx/.libs a2xx/_libs -rm -rf a3xx/.libs a3xx/_libs -rm -rf a4xx/.libs a4xx/_libs + -rm -rf a5xx/.libs a5xx/_libs -rm -rf ir3/.libs ir3/_libs ID: $(am__tagged_files) @@ -1214,6 +1292,8 @@ -rm -f a3xx/$(am__dirstamp) -rm -f a4xx/$(DEPDIR)/$(am__dirstamp) -rm -f a4xx/$(am__dirstamp) + -rm -f a5xx/$(DEPDIR)/$(am__dirstamp) + -rm -f a5xx/$(am__dirstamp) -rm -f ir3/$(DEPDIR)/$(am__dirstamp) -rm -f ir3/$(am__dirstamp) @@ -1227,7 +1307,7 @@ clean-noinstPROGRAMS mostlyclean-am distclean: distclean-am - -rm -rf ./$(DEPDIR) a2xx/$(DEPDIR) a3xx/$(DEPDIR) a4xx/$(DEPDIR) ir3/$(DEPDIR) + -rm -rf ./$(DEPDIR) a2xx/$(DEPDIR) a3xx/$(DEPDIR) a4xx/$(DEPDIR) a5xx/$(DEPDIR) ir3/$(DEPDIR) -rm -f Makefile distclean-am: clean-am distclean-compile distclean-generic \ distclean-tags @@ -1273,7 +1353,7 @@ installcheck-am: maintainer-clean: maintainer-clean-am - -rm -rf ./$(DEPDIR) a2xx/$(DEPDIR) a3xx/$(DEPDIR) a4xx/$(DEPDIR) ir3/$(DEPDIR) + -rm -rf ./$(DEPDIR) a2xx/$(DEPDIR) a3xx/$(DEPDIR) a4xx/$(DEPDIR) a5xx/$(DEPDIR) ir3/$(DEPDIR) -rm -f Makefile maintainer-clean-am: distclean-am maintainer-clean-generic @@ -1310,7 +1390,6 @@ .PRECIOUS: Makefile - ir3/ir3_nir_trig.c: ir3/ir3_nir_trig.py $(top_srcdir)/src/compiler/nir/nir_algebraic.py $(MKDIR_GEN) $(AM_V_GEN) PYTHONPATH=$(top_srcdir)/src/compiler/nir $(PYTHON2) $(PYTHON_FLAGS) $(srcdir)/ir3/ir3_nir_trig.py > $@ || ($(RM) $@; false) diff -Nru mesa-12.0.6/src/gallium/drivers/freedreno/Makefile.sources mesa-17.0.7/src/gallium/drivers/freedreno/Makefile.sources --- mesa-12.0.6/src/gallium/drivers/freedreno/Makefile.sources 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/freedreno/Makefile.sources 2017-06-01 10:37:10.000000000 +0000 @@ -2,6 +2,10 @@ adreno_common.xml.h \ adreno_pm4.xml.h \ disasm.h \ + freedreno_batch.c \ + freedreno_batch.h \ + freedreno_batch_cache.c \ + freedreno_batch_cache.h \ freedreno_context.c \ freedreno_context.h \ freedreno_draw.c \ @@ -116,6 +120,33 @@ a4xx/fd4_zsa.c \ a4xx/fd4_zsa.h +a5xx_SOURCES := \ + a5xx/a5xx.xml.h \ + a5xx/fd5_blend.c \ + a5xx/fd5_blend.h \ + a5xx/fd5_context.c \ + a5xx/fd5_context.h \ + a5xx/fd5_draw.c \ + a5xx/fd5_draw.h \ + a5xx/fd5_emit.c \ + a5xx/fd5_emit.h \ + a5xx/fd5_format.c \ + a5xx/fd5_format.h \ + a5xx/fd5_gmem.c \ + a5xx/fd5_gmem.h \ + a5xx/fd5_program.c \ + a5xx/fd5_program.h \ + a5xx/fd5_query.c \ + a5xx/fd5_query.h \ + a5xx/fd5_rasterizer.c \ + a5xx/fd5_rasterizer.h \ + a5xx/fd5_screen.c \ + a5xx/fd5_screen.h \ + a5xx/fd5_texture.c \ + a5xx/fd5_texture.h \ + a5xx/fd5_zsa.c \ + a5xx/fd5_zsa.h + ir3_SOURCES := \ ir3/disasm-a3xx.c \ ir3/instr-a3xx.h \ diff -Nru mesa-12.0.6/src/gallium/drivers/i915/i915_clear.c mesa-17.0.7/src/gallium/drivers/i915/i915_clear.c --- mesa-12.0.6/src/gallium/drivers/i915/i915_clear.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/i915/i915_clear.c 2017-06-01 10:37:10.000000000 +0000 @@ -30,7 +30,6 @@ */ -#include "util/u_clear.h" #include "util/u_format.h" #include "util/u_pack_color.h" #include "i915_context.h" @@ -221,8 +220,27 @@ const union pipe_color_union *color, double depth, unsigned stencil) { - util_clear(pipe, &i915_context(pipe)->framebuffer, buffers, color, depth, - stencil); + struct pipe_framebuffer_state *framebuffer = + &i915_context(pipe)->framebuffer; + unsigned i; + + for (i = 0; i < framebuffer->nr_cbufs; i++) { + if (buffers & (PIPE_CLEAR_COLOR0 << i)) { + struct pipe_surface *ps = framebuffer->cbufs[i]; + + if (ps) { + pipe->clear_render_target(pipe, ps, color, 0, 0, ps->width, + ps->height, true); + } + } + } + + if (buffers & PIPE_CLEAR_DEPTHSTENCIL) { + struct pipe_surface *ps = framebuffer->zsbuf; + pipe->clear_depth_stencil(pipe, ps, buffers & PIPE_CLEAR_DEPTHSTENCIL, + depth, stencil, + 0, 0, ps->width, ps->height, true); + } } void diff -Nru mesa-12.0.6/src/gallium/drivers/i915/i915_context.c mesa-17.0.7/src/gallium/drivers/i915/i915_context.c --- mesa-12.0.6/src/gallium/drivers/i915/i915_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/i915/i915_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -177,10 +177,10 @@ i915->base.draw_vbo = i915_draw_vbo; /* init this before draw */ - util_slab_create(&i915->transfer_pool, sizeof(struct pipe_transfer), - 16, UTIL_SLAB_SINGLETHREADED); - util_slab_create(&i915->texture_transfer_pool, sizeof(struct i915_transfer), - 16, UTIL_SLAB_SINGLETHREADED); + slab_create(&i915->transfer_pool, sizeof(struct pipe_transfer), + 16); + slab_create(&i915->texture_transfer_pool, sizeof(struct i915_transfer), + 16); /* Batch stream debugging is a bit hacked up at the moment: */ diff -Nru mesa-12.0.6/src/gallium/drivers/i915/i915_context.h mesa-17.0.7/src/gallium/drivers/i915/i915_context.h --- mesa-12.0.6/src/gallium/drivers/i915/i915_context.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/i915/i915_context.h 2017-06-01 10:37:10.000000000 +0000 @@ -37,7 +37,7 @@ #include "tgsi/tgsi_scan.h" -#include "util/u_slab.h" +#include "util/slab.h" #include "util/u_blitter.h" @@ -278,8 +278,8 @@ struct i915_winsys_buffer *validation_buffers[2 + 1 + I915_TEX_UNITS]; int num_validation_buffers; - struct util_slab_mempool transfer_pool; - struct util_slab_mempool texture_transfer_pool; + struct slab_mempool transfer_pool; + struct slab_mempool texture_transfer_pool; /* state for tracking flushes */ int last_fired_vertices; diff -Nru mesa-12.0.6/src/gallium/drivers/i915/i915_fpc_optimize.c mesa-17.0.7/src/gallium/drivers/i915/i915_fpc_optimize.c --- mesa-12.0.6/src/gallium/drivers/i915/i915_fpc_optimize.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/i915/i915_fpc_optimize.c 2017-06-01 10:37:10.000000000 +0000 @@ -76,7 +76,6 @@ unsigned num_dst; unsigned num_src; } op_table [TGSI_OPCODE_LAST] = { - [ TGSI_OPCODE_ABS ] = { false, false, 0, 1, 1 }, [ TGSI_OPCODE_ADD ] = { false, true, TGSI_SWIZZLE_ZERO, 1, 2 }, [ TGSI_OPCODE_CEIL ] = { false, false, 0, 1, 1 }, [ TGSI_OPCODE_CMP ] = { false, false, 0, 1, 2 }, @@ -116,7 +115,6 @@ [ TGSI_OPCODE_SLT ] = { false, false, 0, 1, 2 }, [ TGSI_OPCODE_SNE ] = { false, false, 0, 1, 2 }, [ TGSI_OPCODE_SSG ] = { false, false, 0, 1, 1 }, - [ TGSI_OPCODE_SUB ] = { false, false, 0, 1, 2 }, [ TGSI_OPCODE_TEX ] = { true, false, 0, 1, 2 }, [ TGSI_OPCODE_TRUNC ] = { false, false, 0, 1, 1 }, [ TGSI_OPCODE_TXB ] = { true, false, 0, 1, 2 }, diff -Nru mesa-12.0.6/src/gallium/drivers/i915/i915_fpc_translate.c mesa-17.0.7/src/gallium/drivers/i915/i915_fpc_translate.c --- mesa-12.0.6/src/gallium/drivers/i915/i915_fpc_translate.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/i915/i915_fpc_translate.c 2017-06-01 10:37:10.000000000 +0000 @@ -500,15 +500,6 @@ uint tmp = 0; switch (inst->Instruction.Opcode) { - case TGSI_OPCODE_ABS: - src0 = src_vector(p, &inst->Src[0], fs); - i915_emit_arith(p, - A0_MAX, - get_result_vector(p, &inst->Dst[0]), - get_result_flags(inst), 0, - src0, negate(src0, 1, 1, 1, 1), 0); - break; - case TGSI_OPCODE_ADD: emit_simple_arith(p, inst, A0_ADD, 2, fs); break; @@ -585,7 +576,7 @@ case TGSI_OPCODE_DDX: case TGSI_OPCODE_DDY: /* XXX We just output 0 here */ - debug_printf("Punting DDX/DDX\n"); + debug_printf("Punting DDX/DDY\n"); src0 = get_result_vector(p, &inst->Dst[0]); i915_emit_arith(p, A0_MOV, @@ -1031,17 +1022,6 @@ negate(tmp, 1, 1, 1, 1), 0); break; - case TGSI_OPCODE_SUB: - src0 = src_vector(p, &inst->Src[0], fs); - src1 = src_vector(p, &inst->Src[1], fs); - - i915_emit_arith(p, - A0_ADD, - get_result_vector(p, &inst->Dst[0]), - get_result_flags(inst), 0, - src0, negate(src1, 1, 1, 1, 1), 0); - break; - case TGSI_OPCODE_TEX: emit_tex(p, inst, T0_TEXLD, fs); break; diff -Nru mesa-12.0.6/src/gallium/drivers/i915/i915_resource_buffer.c mesa-17.0.7/src/gallium/drivers/i915/i915_resource_buffer.c --- mesa-12.0.6/src/gallium/drivers/i915/i915_resource_buffer.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/i915/i915_resource_buffer.c 2017-06-01 10:37:10.000000000 +0000 @@ -70,7 +70,7 @@ { struct i915_context *i915 = i915_context(pipe); struct i915_buffer *buffer = i915_buffer(resource); - struct pipe_transfer *transfer = util_slab_alloc(&i915->transfer_pool); + struct pipe_transfer *transfer = slab_alloc_st(&i915->transfer_pool); if (!transfer) return NULL; @@ -89,24 +89,18 @@ struct pipe_transfer *transfer) { struct i915_context *i915 = i915_context(pipe); - util_slab_free(&i915->transfer_pool, transfer); + slab_free_st(&i915->transfer_pool, transfer); } -static void -i915_buffer_transfer_inline_write( struct pipe_context *rm_ctx, - struct pipe_resource *resource, - unsigned level, - unsigned usage, - const struct pipe_box *box, - const void *data, - unsigned stride, - unsigned layer_stride) +void +i915_buffer_subdata(struct pipe_context *rm_ctx, + struct pipe_resource *resource, + unsigned usage, unsigned offset, + unsigned size, const void *data) { struct i915_buffer *buffer = i915_buffer(resource); - memcpy(buffer->data + box->x, - data, - box->width); + memcpy(buffer->data + offset, data, size); } @@ -117,7 +111,6 @@ i915_buffer_transfer_map, /* transfer_map */ u_default_transfer_flush_region, /* transfer_flush_region */ i915_buffer_transfer_unmap, /* transfer_unmap */ - i915_buffer_transfer_inline_write /* transfer_inline_write */ }; diff -Nru mesa-12.0.6/src/gallium/drivers/i915/i915_resource.c mesa-17.0.7/src/gallium/drivers/i915/i915_resource.c --- mesa-12.0.6/src/gallium/drivers/i915/i915_resource.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/i915/i915_resource.c 2017-06-01 10:37:10.000000000 +0000 @@ -39,7 +39,8 @@ i915->base.transfer_map = u_transfer_map_vtbl; i915->base.transfer_flush_region = u_transfer_flush_region_vtbl; i915->base.transfer_unmap = u_transfer_unmap_vtbl; - i915->base.transfer_inline_write = u_transfer_inline_write_vtbl; + i915->base.buffer_subdata = i915_buffer_subdata; + i915->base.texture_subdata = u_default_texture_subdata; } void diff -Nru mesa-12.0.6/src/gallium/drivers/i915/i915_resource.h mesa-17.0.7/src/gallium/drivers/i915/i915_resource.h --- mesa-12.0.6/src/gallium/drivers/i915/i915_resource.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/i915/i915_resource.h 2017-06-01 10:37:10.000000000 +0000 @@ -129,4 +129,10 @@ i915_buffer_create(struct pipe_screen *screen, const struct pipe_resource *template); +void +i915_buffer_subdata(struct pipe_context *rm_ctx, + struct pipe_resource *resource, + unsigned usage, unsigned offset, + unsigned size, const void *data); + #endif /* I915_RESOURCE_H */ diff -Nru mesa-12.0.6/src/gallium/drivers/i915/i915_resource_texture.c mesa-17.0.7/src/gallium/drivers/i915/i915_resource_texture.c --- mesa-12.0.6/src/gallium/drivers/i915/i915_resource_texture.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/i915/i915_resource_texture.c 2017-06-01 10:37:10.000000000 +0000 @@ -721,7 +721,7 @@ { struct i915_context *i915 = i915_context(pipe); struct i915_texture *tex = i915_texture(resource); - struct i915_transfer *transfer = util_slab_alloc(&i915->texture_transfer_pool); + struct i915_transfer *transfer = slab_alloc_st(&i915->texture_transfer_pool); boolean use_staging_texture = FALSE; struct i915_winsys *iws = i915_screen(pipe->screen)->iws; enum pipe_format format = resource->format; @@ -814,11 +814,11 @@ pipe_resource_reference(&itransfer->staging_texture, NULL); } - util_slab_free(&i915->texture_transfer_pool, itransfer); + slab_free_st(&i915->texture_transfer_pool, itransfer); } #if 0 -static void i915_transfer_inline_write( struct pipe_context *pipe, +static void i915_texture_subdata(struct pipe_context *pipe, struct pipe_resource *resource, unsigned level, unsigned usage, @@ -913,7 +913,6 @@ i915_texture_transfer_map, /* transfer_map */ u_default_transfer_flush_region, /* transfer_flush_region */ i915_texture_transfer_unmap, /* transfer_unmap */ - u_default_transfer_inline_write /* transfer_inline_write */ }; diff -Nru mesa-12.0.6/src/gallium/drivers/i915/i915_screen.c mesa-17.0.7/src/gallium/drivers/i915/i915_screen.c --- mesa-12.0.6/src/gallium/drivers/i915/i915_screen.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/i915/i915_screen.c 2017-06-01 10:37:10.000000000 +0000 @@ -201,6 +201,7 @@ case PIPE_CAP_USER_VERTEX_BUFFERS: case PIPE_CAP_USER_INDEX_BUFFERS: case PIPE_CAP_USER_CONSTANT_BUFFERS: + case PIPE_CAP_MIXED_COLOR_DEPTH_BITS: return 1; /* Unsupported features (boolean caps). */ @@ -273,10 +274,15 @@ case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR: case PIPE_CAP_CULL_DISTANCE: case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES: + case PIPE_CAP_TGSI_VOTE: + case PIPE_CAP_MAX_WINDOW_RECTANGLES: + case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED: + case PIPE_CAP_TGSI_ARRAY_COMPONENTS: return 0; case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS: case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME: + case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS: case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY: case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY: case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY: @@ -287,6 +293,11 @@ case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS: case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE: case PIPE_CAP_SAMPLER_VIEW_TARGET: + case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS: + case PIPE_CAP_TGSI_CAN_READ_OUTPUTS: + case PIPE_CAP_NATIVE_FENCE_FD: + case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY: + case PIPE_CAP_TGSI_FS_FBFETCH: return 0; case PIPE_CAP_MAX_VIEWPORTS: @@ -496,6 +507,7 @@ static boolean i915_fence_finish(struct pipe_screen *screen, + struct pipe_context *ctx, struct pipe_fence_handle *fence, uint64_t timeout) { diff -Nru mesa-12.0.6/src/gallium/drivers/i915/i915_state.c mesa-17.0.7/src/gallium/drivers/i915/i915_state.c --- mesa-12.0.6/src/gallium/drivers/i915/i915_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/i915/i915_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -358,7 +358,8 @@ static void -i915_bind_sampler_states(struct pipe_context *pipe, unsigned shader, +i915_bind_sampler_states(struct pipe_context *pipe, + enum pipe_shader_type shader, unsigned start, unsigned num_samplers, void **samplers) { @@ -675,7 +676,7 @@ static void i915_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, - struct pipe_constant_buffer *cb) + const struct pipe_constant_buffer *cb) { struct i915_context *i915 = i915_context(pipe); struct pipe_resource *buf = cb ? cb->buffer : NULL; @@ -793,7 +794,7 @@ static void -i915_set_sampler_views(struct pipe_context *pipe, unsigned shader, +i915_set_sampler_views(struct pipe_context *pipe, enum pipe_shader_type shader, unsigned start, unsigned num, struct pipe_sampler_view **views) { diff -Nru mesa-12.0.6/src/gallium/drivers/i915/i915_state_derived.c mesa-17.0.7/src/gallium/drivers/i915/i915_state_derived.c --- mesa-12.0.6/src/gallium/drivers/i915/i915_state_derived.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/i915/i915_state_derived.c 2017-06-01 10:37:10.000000000 +0000 @@ -145,7 +145,12 @@ uint hwtc; if (texCoords[i]) { hwtc = TEXCOORDFMT_4D; - src = draw_find_shader_output(i915->draw, TGSI_SEMANTIC_GENERIC, fs->generic_mapping[i]); + if (fs->generic_mapping[i] == I915_SEMANTIC_POS) { + src = draw_find_shader_output(i915->draw, TGSI_SEMANTIC_POSITION, 0); + } + else { + src = draw_find_shader_output(i915->draw, TGSI_SEMANTIC_GENERIC, fs->generic_mapping[i]); + } draw_emit_vertex_attr(&vinfo, EMIT_4F, src); } else { diff -Nru mesa-12.0.6/src/gallium/drivers/i915/i915_surface.c mesa-17.0.7/src/gallium/drivers/i915/i915_surface.c --- mesa-12.0.6/src/gallium/drivers/i915/i915_surface.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/i915/i915_surface.c 2017-06-01 10:37:10.000000000 +0000 @@ -134,7 +134,8 @@ struct pipe_surface *dst, const union pipe_color_union *color, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct i915_context *i915 = i915_context(pipe); struct pipe_framebuffer_state fb_state; @@ -166,7 +167,8 @@ double depth, unsigned stencil, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct i915_context *i915 = i915_context(pipe); struct pipe_framebuffer_state fb_state; @@ -281,7 +283,8 @@ struct pipe_surface *dst, const union pipe_color_union *color, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct i915_texture *tex = i915_texture(dst->texture); struct pipe_resource *pt = &tex->b.b; @@ -309,7 +312,8 @@ double depth, unsigned stencil, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct i915_texture *tex = i915_texture(dst->texture); struct pipe_resource *pt = &tex->b.b; diff -Nru mesa-12.0.6/src/gallium/drivers/i915/Makefile.in mesa-17.0.7/src/gallium/drivers/i915/Makefile.in --- mesa-12.0.6/src/gallium/drivers/i915/Makefile.in 2017-01-24 01:41:46.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/i915/Makefile.in 2017-06-01 10:37:20.000000000 +0000 @@ -111,10 +111,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -221,6 +224,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -235,6 +240,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -264,10 +270,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -317,11 +324,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -361,8 +365,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -399,8 +401,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -409,7 +409,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -417,13 +416,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -452,6 +452,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -604,12 +605,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -621,7 +618,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ $(GALLIUM_DRIVER_CFLAGS) diff -Nru mesa-12.0.6/src/gallium/drivers/ilo/ilo_blit.c mesa-17.0.7/src/gallium/drivers/ilo/ilo_blit.c --- mesa-12.0.6/src/gallium/drivers/ilo/ilo_blit.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/ilo/ilo_blit.c 2017-06-01 10:37:10.000000000 +0000 @@ -83,7 +83,8 @@ struct pipe_surface *dst, const union pipe_color_union *color, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct ilo_context *ilo = ilo_context(pipe); @@ -110,7 +111,8 @@ double depth, unsigned stencil, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct ilo_context *ilo = ilo_context(pipe); diff -Nru mesa-12.0.6/src/gallium/drivers/ilo/ilo_context.c mesa-17.0.7/src/gallium/drivers/ilo/ilo_context.c --- mesa-12.0.6/src/gallium/drivers/ilo/ilo_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/ilo/ilo_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -129,7 +129,7 @@ if (ilo->cp) ilo_cp_destroy(ilo->cp); - util_slab_destroy(&ilo->transfer_mempool); + slab_destroy(&ilo->transfer_mempool); FREE(ilo); } @@ -151,8 +151,8 @@ * initialize first, otherwise it may not be safe to call * ilo_context_destroy() on errors */ - util_slab_create(&ilo->transfer_mempool, - sizeof(struct ilo_transfer), 64, UTIL_SLAB_SINGLETHREADED); + slab_create(&ilo->transfer_mempool, + sizeof(struct ilo_transfer), 64); ilo->shader_cache = ilo_shader_cache_create(); ilo->cp = ilo_cp_create(ilo->dev, ilo->winsys, ilo->shader_cache); diff -Nru mesa-12.0.6/src/gallium/drivers/ilo/ilo_context.h mesa-17.0.7/src/gallium/drivers/ilo/ilo_context.h --- mesa-12.0.6/src/gallium/drivers/ilo/ilo_context.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/ilo/ilo_context.h 2017-06-01 10:37:10.000000000 +0000 @@ -29,7 +29,7 @@ #define ILO_CONTEXT_H #include "pipe/p_context.h" -#include "util/u_slab.h" +#include "util/slab.h" #include "ilo_common.h" #include "ilo_cp.h" @@ -50,7 +50,7 @@ struct intel_winsys *winsys; struct ilo_dev *dev; - struct util_slab_mempool transfer_mempool; + struct slab_mempool transfer_mempool; struct ilo_cp *cp; diff -Nru mesa-12.0.6/src/gallium/drivers/ilo/ilo_draw.c mesa-17.0.7/src/gallium/drivers/ilo/ilo_draw.c --- mesa-12.0.6/src/gallium/drivers/ilo/ilo_draw.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/ilo/ilo_draw.c 2017-06-01 10:37:10.000000000 +0000 @@ -603,7 +603,7 @@ } static void -ilo_texture_barrier(struct pipe_context *pipe) +ilo_texture_barrier(struct pipe_context *pipe, unsigned flags) { struct ilo_context *ilo = ilo_context(pipe); diff -Nru mesa-12.0.6/src/gallium/drivers/ilo/ilo_resource.c mesa-17.0.7/src/gallium/drivers/ilo/ilo_resource.c --- mesa-12.0.6/src/gallium/drivers/ilo/ilo_resource.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/ilo/ilo_resource.c 2017-06-01 10:37:10.000000000 +0000 @@ -204,7 +204,7 @@ * images when the image size is greater than one-fourth of the mappable * aperture. */ - if (templ->bind & (PIPE_BIND_TRANSFER_WRITE | PIPE_BIND_TRANSFER_READ)) + if (templ->usage == PIPE_USAGE_STAGING) info->prefer_linear_threshold = dev->aperture_mappable / 4; info->bind_surface_sampler = (templ->bind & PIPE_BIND_SAMPLER_VIEW); @@ -725,6 +725,7 @@ static boolean ilo_resource_get_handle(struct pipe_screen *screen, + struct pipe_context *ctx, struct pipe_resource *res, struct winsys_handle *handle, unsigned usage) diff -Nru mesa-12.0.6/src/gallium/drivers/ilo/ilo_screen.c mesa-17.0.7/src/gallium/drivers/ilo/ilo_screen.c --- mesa-12.0.6/src/gallium/drivers/ilo/ilo_screen.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/ilo/ilo_screen.c 2017-06-01 10:37:10.000000000 +0000 @@ -199,6 +199,7 @@ uint32_t max_compute_units; uint32_t images_supported; uint32_t subgroup_size; + uint32_t address_bits; } val; const void *ptr; int size; @@ -266,6 +267,11 @@ ptr = &val.max_input_size; size = sizeof(val.max_input_size); break; + case PIPE_COMPUTE_CAP_ADDRESS_BITS: + val.address_bits = 32; + ptr = &val.address_bits; + size = sizeof(val.address_bits); + break; case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE: val.max_mem_alloc_size = 1u << 31; @@ -297,6 +303,8 @@ ptr = &val.subgroup_size; size = sizeof(val.subgroup_size); break; + case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK: + /* fallthrough */ default: ptr = NULL; size = 0; @@ -391,6 +399,7 @@ case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS: return ILO_MAX_SO_BINDINGS; case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME: + case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS: if (ilo_dev_gen(&is->dev) >= ILO_GEN(7)) return is->dev.has_gen7_sol_reset; else @@ -450,6 +459,7 @@ case PIPE_CAP_ENDIANNESS: return PIPE_ENDIAN_LITTLE; case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES: + case PIPE_CAP_MIXED_COLOR_DEPTH_BITS: return true; case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT: case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES: @@ -502,6 +512,15 @@ case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR: case PIPE_CAP_CULL_DISTANCE: case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES: + case PIPE_CAP_TGSI_VOTE: + case PIPE_CAP_MAX_WINDOW_RECTANGLES: + case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED: + case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS: + case PIPE_CAP_TGSI_ARRAY_COMPONENTS: + case PIPE_CAP_TGSI_CAN_READ_OUTPUTS: + case PIPE_CAP_NATIVE_FENCE_FD: + case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY: + case PIPE_CAP_TGSI_FS_FBFETCH: return 0; case PIPE_CAP_VENDOR_ID: @@ -692,6 +711,7 @@ static boolean ilo_screen_fence_finish(struct pipe_screen *screen, + struct pipe_context *ctx, struct pipe_fence_handle *fence, uint64_t timeout) { diff -Nru mesa-12.0.6/src/gallium/drivers/ilo/ilo_state.c mesa-17.0.7/src/gallium/drivers/ilo/ilo_state.c --- mesa-12.0.6/src/gallium/drivers/ilo/ilo_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/ilo/ilo_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -1052,7 +1052,8 @@ } static void -ilo_bind_sampler_states(struct pipe_context *pipe, unsigned shader, +ilo_bind_sampler_states(struct pipe_context *pipe, + enum pipe_shader_type shader, unsigned start, unsigned count, void **samplers) { struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector; @@ -1536,7 +1537,7 @@ static void ilo_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, - struct pipe_constant_buffer *buf) + const struct pipe_constant_buffer *buf) { const struct ilo_dev *dev = ilo_context(pipe)->dev; struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector; @@ -1801,7 +1802,7 @@ } static void -ilo_set_sampler_views(struct pipe_context *pipe, unsigned shader, +ilo_set_sampler_views(struct pipe_context *pipe, enum pipe_shader_type shader, unsigned start, unsigned count, struct pipe_sampler_view **views) { @@ -1845,13 +1846,16 @@ case PIPE_SHADER_COMPUTE: vec->dirty |= ILO_DIRTY_VIEW_CS; break; + default: + assert(!"unexpected shader type"); + break; } } static void -ilo_set_shader_images(struct pipe_context *pipe, unsigned shader, +ilo_set_shader_images(struct pipe_context *pipe, enum pipe_shader_type shader, unsigned start, unsigned count, - struct pipe_image_view *views) + const struct pipe_image_view *views) { #if 0 struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector; @@ -2015,9 +2019,8 @@ memset(&info, 0, sizeof(info)); info.vma = ilo_resource_get_vma(res); - info.offset = templ->u.buf.first_element * info.struct_size; - info.size = (templ->u.buf.last_element - - templ->u.buf.first_element + 1) * info.struct_size; + info.offset = templ->u.buf.offset; + info.size = templ->u.buf.size; info.access = ILO_STATE_SURFACE_ACCESS_SAMPLER; info.format = ilo_format_translate_color(dev, templ->format); info.format_size = util_format_get_blocksize(templ->format); diff -Nru mesa-12.0.6/src/gallium/drivers/ilo/ilo_transfer.c mesa-17.0.7/src/gallium/drivers/ilo/ilo_transfer.c --- mesa-12.0.6/src/gallium/drivers/ilo/ilo_transfer.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/ilo/ilo_transfer.c 2017-06-01 10:37:10.000000000 +0000 @@ -180,7 +180,6 @@ templ.array_size = box->depth; templ.nr_samples = 1; templ.usage = PIPE_USAGE_STAGING; - templ.bind = PIPE_BIND_TRANSFER_WRITE; if (xfer->base.usage & PIPE_TRANSFER_FLUSH_EXPLICIT) { templ.flags = PIPE_RESOURCE_FLAG_MAP_PERSISTENT | @@ -1111,7 +1110,7 @@ templ = *res; templ.width0 = size; templ.usage = PIPE_USAGE_STAGING; - templ.bind = PIPE_BIND_TRANSFER_WRITE; + templ.bind = 0; staging = ilo->base.screen->resource_create(ilo->base.screen, &templ); if (staging) { const struct ilo_vma *staging_vma = ilo_resource_get_vma(staging); @@ -1184,7 +1183,7 @@ pipe_resource_reference(&xfer->base.resource, NULL); - util_slab_free(&ilo->transfer_mempool, xfer); + slab_free_st(&ilo->transfer_mempool, xfer); } static void * @@ -1200,7 +1199,7 @@ void *ptr; /* note that xfer is not zero'd */ - xfer = util_slab_alloc(&ilo->transfer_mempool); + xfer = slab_alloc_st(&ilo->transfer_mempool); if (!xfer) { *transfer = NULL; return NULL; @@ -1226,7 +1225,7 @@ if (!ptr) { pipe_resource_reference(&xfer->base.resource, NULL); - util_slab_free(&ilo->transfer_mempool, xfer); + slab_free_st(&ilo->transfer_mempool, xfer); *transfer = NULL; return NULL; } @@ -1236,32 +1235,15 @@ return ptr; } -static void -ilo_transfer_inline_write(struct pipe_context *pipe, - struct pipe_resource *res, - unsigned level, - unsigned usage, - const struct pipe_box *box, - const void *data, - unsigned stride, - unsigned layer_stride) -{ - if (likely(res->target == PIPE_BUFFER) && - !(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) { - /* they should specify just an offset and a size */ - assert(level == 0); - assert(box->y == 0); - assert(box->z == 0); - assert(box->height == 1); - assert(box->depth == 1); - - buf_pwrite(ilo_context(pipe), res, - usage, box->x, box->width, data); - } - else { - u_default_transfer_inline_write(pipe, res, - level, usage, box, data, stride, layer_stride); - } +static void ilo_buffer_subdata(struct pipe_context *pipe, + struct pipe_resource *resource, + unsigned usage, unsigned offset, + unsigned size, const void *data) +{ + if (usage & PIPE_TRANSFER_UNSYNCHRONIZED) + u_default_buffer_subdata(pipe, resource, usage, offset, size, data); + else + buf_pwrite(ilo_context(pipe), resource, usage, offset, size, data); } /** @@ -1273,5 +1255,6 @@ ilo->base.transfer_map = ilo_transfer_map; ilo->base.transfer_flush_region = ilo_transfer_flush_region; ilo->base.transfer_unmap = ilo_transfer_unmap; - ilo->base.transfer_inline_write = ilo_transfer_inline_write; + ilo->base.buffer_subdata = ilo_buffer_subdata; + ilo->base.texture_subdata = u_default_texture_subdata; } diff -Nru mesa-12.0.6/src/gallium/drivers/ilo/Makefile.in mesa-17.0.7/src/gallium/drivers/ilo/Makefile.in --- mesa-12.0.6/src/gallium/drivers/ilo/Makefile.in 2017-01-24 01:41:46.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/ilo/Makefile.in 2017-06-01 10:37:20.000000000 +0000 @@ -113,10 +113,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -239,6 +242,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -253,6 +258,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -282,10 +288,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -335,11 +342,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -379,8 +383,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -417,8 +419,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -427,7 +427,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -435,13 +434,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -470,6 +470,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -700,12 +701,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -717,7 +714,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CPPFLAGS = \ $(GALLIUM_DRIVER_CFLAGS) diff -Nru mesa-12.0.6/src/gallium/drivers/ilo/shader/toy_compiler.c mesa-17.0.7/src/gallium/drivers/ilo/shader/toy_compiler.c --- mesa-12.0.6/src/gallium/drivers/ilo/shader/toy_compiler.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/ilo/shader/toy_compiler.c 2017-06-01 10:37:10.000000000 +0000 @@ -491,9 +491,9 @@ struct toy_inst *inst, *next; LIST_FOR_EACH_ENTRY_SAFE(inst, next, &tc->instructions, list) - util_slab_free(&tc->mempool, inst); + slab_free_st(&tc->mempool, inst); - util_slab_destroy(&tc->mempool); + slab_destroy(&tc->mempool); } /** @@ -543,8 +543,8 @@ tc_init_inst_templ(tc); - util_slab_create(&tc->mempool, sizeof(struct toy_inst), - 64, UTIL_SLAB_SINGLETHREADED); + slab_create(&tc->mempool, sizeof(struct toy_inst), + 64); list_inithead(&tc->instructions); /* instructions are added to the tail */ diff -Nru mesa-12.0.6/src/gallium/drivers/ilo/shader/toy_compiler.h mesa-17.0.7/src/gallium/drivers/ilo/shader/toy_compiler.h --- mesa-12.0.6/src/gallium/drivers/ilo/shader/toy_compiler.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/ilo/shader/toy_compiler.h 2017-06-01 10:37:10.000000000 +0000 @@ -29,7 +29,7 @@ #define TOY_COMPILER_H #include "genhw/genhw.h" -#include "util/u_slab.h" +#include "util/slab.h" #include "ilo_common.h" #include "toy_compiler_reg.h" @@ -153,7 +153,7 @@ const struct ilo_dev *dev; struct toy_inst templ; - struct util_slab_mempool mempool; + struct slab_mempool mempool; struct list_head instructions; struct list_head *iter, *iter_next; @@ -209,7 +209,7 @@ { struct toy_inst *new_inst; - new_inst = util_slab_alloc(&tc->mempool); + new_inst = slab_alloc_st(&tc->mempool); if (!new_inst) return NULL; @@ -236,7 +236,7 @@ tc_discard_inst(struct toy_compiler *tc, struct toy_inst *inst) { list_del(&inst->list); - util_slab_free(&tc->mempool, inst); + slab_free_st(&tc->mempool, inst); } /** diff -Nru mesa-12.0.6/src/gallium/drivers/ilo/shader/toy_tgsi.c mesa-17.0.7/src/gallium/drivers/ilo/shader/toy_tgsi.c --- mesa-12.0.6/src/gallium/drivers/ilo/shader/toy_tgsi.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/ilo/shader/toy_tgsi.c 2017-06-01 10:37:10.000000000 +0000 @@ -50,7 +50,6 @@ [TGSI_OPCODE_MAX] = { GEN6_OPCODE_SEL, 1, 2 }, /* a later pass will move src[2] to accumulator */ [TGSI_OPCODE_MAD] = { GEN6_OPCODE_MAC, 1, 3 }, - [TGSI_OPCODE_SUB] = { GEN6_OPCODE_ADD, 1, 2 }, [TGSI_OPCODE_SQRT] = { TOY_OPCODE_SQRT, 1, 1 }, [TGSI_OPCODE_FRC] = { GEN6_OPCODE_FRC, 1, 1 }, [TGSI_OPCODE_FLR] = { GEN6_OPCODE_RNDD, 1, 1 }, @@ -58,7 +57,6 @@ [TGSI_OPCODE_EX2] = { TOY_OPCODE_EXP, 1, 1 }, [TGSI_OPCODE_LG2] = { TOY_OPCODE_LOG, 1, 1 }, [TGSI_OPCODE_POW] = { TOY_OPCODE_POW, 1, 2 }, - [TGSI_OPCODE_ABS] = { GEN6_OPCODE_MOV, 1, 1 }, [TGSI_OPCODE_DPH] = { GEN6_OPCODE_DPH, 1, 2 }, [TGSI_OPCODE_COS] = { TOY_OPCODE_COS, 1, 1 }, [TGSI_OPCODE_KILL] = { TOY_OPCODE_KIL, 0, 0 }, @@ -145,10 +143,6 @@ case TGSI_OPCODE_UMAX: cond_modifier = GEN6_COND_GE; break; - case TGSI_OPCODE_SUB: - src[1] = tsrc_negate(src[1]); - break; - case TGSI_OPCODE_ABS: case TGSI_OPCODE_IABS: src[0] = tsrc_absolute(src[0]); break; @@ -778,7 +772,6 @@ [TGSI_OPCODE_SLT] = aos_set_on_cond, [TGSI_OPCODE_SGE] = aos_set_on_cond, [TGSI_OPCODE_MAD] = aos_simple, - [TGSI_OPCODE_SUB] = aos_simple, [TGSI_OPCODE_LRP] = aos_LRP, [TGSI_OPCODE_SQRT] = aos_simple, [TGSI_OPCODE_DP2A] = aos_DP2A, @@ -790,7 +783,6 @@ [TGSI_OPCODE_LG2] = aos_simple, [TGSI_OPCODE_POW] = aos_simple, [TGSI_OPCODE_XPD] = aos_XPD, - [TGSI_OPCODE_ABS] = aos_simple, [TGSI_OPCODE_DPH] = aos_simple, [TGSI_OPCODE_COS] = aos_simple, [TGSI_OPCODE_DDX] = aos_unsupported, @@ -1321,7 +1313,6 @@ [TGSI_OPCODE_SLT] = soa_per_channel, [TGSI_OPCODE_SGE] = soa_per_channel, [TGSI_OPCODE_MAD] = soa_per_channel, - [TGSI_OPCODE_SUB] = soa_per_channel, [TGSI_OPCODE_LRP] = soa_per_channel, [TGSI_OPCODE_SQRT] = soa_scalar_replicate, [TGSI_OPCODE_DP2A] = soa_dot_product, @@ -1333,7 +1324,6 @@ [TGSI_OPCODE_LG2] = soa_scalar_replicate, [TGSI_OPCODE_POW] = soa_scalar_replicate, [TGSI_OPCODE_XPD] = soa_XPD, - [TGSI_OPCODE_ABS] = soa_per_channel, [TGSI_OPCODE_DPH] = soa_dot_product, [TGSI_OPCODE_COS] = soa_scalar_replicate, [TGSI_OPCODE_DDX] = soa_partial_derivative, diff -Nru mesa-12.0.6/src/gallium/drivers/imx/Automake.inc mesa-17.0.7/src/gallium/drivers/imx/Automake.inc --- mesa-12.0.6/src/gallium/drivers/imx/Automake.inc 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/imx/Automake.inc 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,9 @@ +if HAVE_GALLIUM_IMX + +TARGET_DRIVERS += imx-drm +TARGET_CPPFLAGS += -DGALLIUM_IMX +TARGET_LIB_DEPS += \ + $(top_builddir)/src/gallium/winsys/imx/drm/libimxdrm.la \ + $(LIBDRM_LIBS) + +endif diff -Nru mesa-12.0.6/src/gallium/drivers/imx/Makefile.am mesa-17.0.7/src/gallium/drivers/imx/Makefile.am --- mesa-12.0.6/src/gallium/drivers/imx/Makefile.am 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/imx/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,8 @@ +include $(top_srcdir)/src/gallium/Automake.inc + +AM_CPPFLAGS = \ + $(GALLIUM_CFLAGS) + +noinst_LTLIBRARIES = libimx.la + +libimx_la_SOURCES = diff -Nru mesa-12.0.6/src/gallium/drivers/imx/Makefile.in mesa-17.0.7/src/gallium/drivers/imx/Makefile.in --- mesa-12.0.6/src/gallium/drivers/imx/Makefile.in 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/imx/Makefile.in 2017-06-01 10:37:20.000000000 +0000 @@ -0,0 +1,750 @@ +# Makefile.in generated by automake 1.15 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994-2014 Free Software Foundation, Inc. + +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited 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maintainer-clean-generic mostlyclean mostlyclean-compile \ + mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \ + tags-am uninstall uninstall-am + +.PRECIOUS: Makefile + + +# Tell versions [3.59,3.63) of GNU make to not export all variables. +# Otherwise a system limit (for SysV at least) may be exceeded. +.NOEXPORT: diff -Nru mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_bld_blend_aos.c mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_bld_blend_aos.c --- mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_bld_blend_aos.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_bld_blend_aos.c 2017-06-01 10:37:10.000000000 +0000 @@ -74,6 +74,7 @@ LLVMValueRef dst; LLVMValueRef const_; LLVMValueRef const_alpha; + boolean has_dst_alpha; LLVMValueRef inv_src; LLVMValueRef inv_src_alpha; @@ -115,10 +116,10 @@ return bld->base.one; else { /* - * if there's separate src_alpha there's no dst alpha hence the complement - * is zero but for unclamped float inputs min can be non-zero (negative). + * If there's no dst alpha the complement is zero but for unclamped + * float inputs min can be non-zero (negative). */ - if (bld->src_alpha) { + if (!bld->has_dst_alpha) { if (!bld->saturate) bld->saturate = lp_build_min(&bld->base, src_alpha, bld->base.zero); } @@ -264,7 +265,8 @@ if (alpha_swizzle != PIPE_SWIZZLE_NONE) { rgb_swizzle = lp_build_blend_factor_swizzle(rgb_factor); alpha_factor_ = lp_build_blend_factor_unswizzled(bld, alpha_factor, TRUE); - return lp_build_blend_swizzle(bld, rgb_factor_, alpha_factor_, rgb_swizzle, alpha_swizzle, num_channels); + return lp_build_blend_swizzle(bld, rgb_factor_, alpha_factor_, rgb_swizzle, + alpha_swizzle, num_channels); } else { return rgb_factor_; } @@ -327,6 +329,7 @@ bld.src_alpha = src_alpha; bld.src1_alpha = src1_alpha; bld.const_alpha = const_alpha; + bld.has_dst_alpha = FALSE; /* Find the alpha channel if not provided seperately */ if (!src_alpha) { @@ -335,6 +338,14 @@ alpha_swizzle = i; } } + /* + * Note that we may get src_alpha included from source (and 4 channels) + * even if the destination doesn't have an alpha channel (for rgbx + * formats). Generally this shouldn't make much of a difference (we're + * relying on blend factors being sanitized already if there's no + * dst alpha). + */ + bld.has_dst_alpha = desc->swizzle[3] <= PIPE_SWIZZLE_W; } if (blend->logicop_enable) { @@ -347,7 +358,9 @@ } else if (!state->blend_enable) { result = src; } else { - boolean rgb_alpha_same = (state->rgb_src_factor == state->rgb_dst_factor && state->alpha_src_factor == state->alpha_dst_factor) || nr_channels == 1; + boolean rgb_alpha_same = (state->rgb_src_factor == state->rgb_dst_factor && + state->alpha_src_factor == state->alpha_dst_factor) || + nr_channels == 1; src_factor = lp_build_blend_factor(&bld, state->rgb_src_factor, state->alpha_src_factor, @@ -370,7 +383,8 @@ rgb_alpha_same, false); - if(state->rgb_func != state->alpha_func && nr_channels > 1 && alpha_swizzle != PIPE_SWIZZLE_NONE) { + if(state->rgb_func != state->alpha_func && nr_channels > 1 && + alpha_swizzle != PIPE_SWIZZLE_NONE) { LLVMValueRef alpha; alpha = lp_build_blend(&bld.base, @@ -397,7 +411,8 @@ if (!util_format_colormask_full(desc, state->colormask)) { LLVMValueRef color_mask; - color_mask = lp_build_const_mask_aos_swizzled(gallivm, bld.base.type, state->colormask, nr_channels, swizzle); + color_mask = lp_build_const_mask_aos_swizzled(gallivm, bld.base.type, + state->colormask, nr_channels, swizzle); lp_build_name(color_mask, "color_mask"); /* Combine with input mask if necessary */ diff -Nru mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_bld_depth.c mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_bld_depth.c --- mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_bld_depth.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_bld_depth.c 2017-06-01 10:37:10.000000000 +0000 @@ -963,16 +963,48 @@ if (stencil[0].enabled) { if (face) { - LLVMValueRef zero = lp_build_const_int32(gallivm, 0); + if (0) { + /* + * XXX: the scalar expansion below produces atrocious code + * (basically producing a 64bit scalar value, then moving the 2 + * 32bit pieces separately to simd, plus 4 shuffles, which is + * seriously lame). But the scalar-simd transitions are always + * tricky, so no big surprise there. + * This here would be way better, however llvm has some serious + * trouble later using it in the select, probably because it will + * recognize the expression as constant and move the simd value + * away (out of the loop) - and then it will suddenly try + * constructing i1 high-bit masks out of it later... + * (Try piglit stencil-twoside.) + * Note this is NOT due to using SExt/Trunc, it fails exactly the + * same even when using native compare/select. + * I cannot reproduce this problem when using stand-alone compiler + * though, suggesting some problem with optimization passes... + * (With stand-alone compilation, the construction of this mask + * value, no matter if the easy 3 instruction here or the complex + * 16+ one below, never gets separated from where it's used.) + * The scalar code still has the same problem, but the generated + * code looks a bit better at least for some reason, even if + * mostly by luck (the fundamental issue clearly is the same). + */ + front_facing = lp_build_broadcast(gallivm, s_bld.vec_type, face); + /* front_facing = face != 0 ? ~0 : 0 */ + front_facing = lp_build_compare(gallivm, s_bld.type, + PIPE_FUNC_NOTEQUAL, + front_facing, s_bld.zero); + } else { + LLVMValueRef zero = lp_build_const_int32(gallivm, 0); - /* front_facing = face != 0 ? ~0 : 0 */ - front_facing = LLVMBuildICmp(builder, LLVMIntNE, face, zero, ""); - front_facing = LLVMBuildSExt(builder, front_facing, - LLVMIntTypeInContext(gallivm->context, - s_bld.type.length*s_bld.type.width), - ""); - front_facing = LLVMBuildBitCast(builder, front_facing, - s_bld.int_vec_type, ""); + /* front_facing = face != 0 ? ~0 : 0 */ + front_facing = LLVMBuildICmp(builder, LLVMIntNE, face, zero, ""); + front_facing = LLVMBuildSExt(builder, front_facing, + LLVMIntTypeInContext(gallivm->context, + s_bld.type.length*s_bld.type.width), + ""); + front_facing = LLVMBuildBitCast(builder, front_facing, + s_bld.int_vec_type, ""); + + } } s_pass_mask = lp_build_stencil_test(&s_bld, stencil, diff -Nru mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_bld_interp.c mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_bld_interp.c --- mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_bld_interp.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_bld_interp.c 2017-06-01 10:37:10.000000000 +0000 @@ -307,10 +307,8 @@ /* * a = a0 + (x * dadx + y * dady) */ - dadx = LLVMBuildFMul(builder, dadx, pixoffx, ""); - dady = LLVMBuildFMul(builder, dady, pixoffy, ""); - a = LLVMBuildFAdd(builder, a, dadx, ""); - a = LLVMBuildFAdd(builder, a, dady, ""); + a = lp_build_fmuladd(builder, dadx, pixoffx, a); + a = lp_build_fmuladd(builder, dady, pixoffy, a); if (interp == LP_INTERP_PERSPECTIVE) { if (oow == NULL) { @@ -340,10 +338,18 @@ break; } - if ((attrib == 0) && (chan == 2)){ + if ((attrib == 0) && (chan == 2) && !bld->depth_clamp){ /* FIXME: Depth values can exceed 1.0, due to the fact that * setup interpolation coefficients refer to (0,0) which causes - * precision loss. So we must clamp to 1.0 here to avoid artifacts + * precision loss. So we must clamp to 1.0 here to avoid artifacts. + * Note though values outside [0,1] are perfectly valid with + * depth clip disabled. + * XXX: If depth clip is disabled but we force depth clamp + * we may get values larger than 1.0 in the fs (but not in + * depth test). Not sure if that's an issue... + * Also, on a similar note, it is not obvious if the depth values + * appearing in fs (with depth clip disabled) should be clamped + * to [0,1], clamped to near/far or not be clamped at all... */ a = lp_build_min(coeff_bld, a, coeff_bld->one); } @@ -437,13 +443,10 @@ */ if (interp != LP_INTERP_CONSTANT && interp != LP_INTERP_FACING) { - LLVMValueRef axaos, ayaos; - axaos = LLVMBuildFMul(builder, lp_build_broadcast_scalar(setup_bld, bld->x), - dadxaos, ""); - ayaos = LLVMBuildFMul(builder, lp_build_broadcast_scalar(setup_bld, bld->y), - dadyaos, ""); - a0aos = LLVMBuildFAdd(builder, a0aos, ayaos, ""); - a0aos = LLVMBuildFAdd(builder, a0aos, axaos, ""); + LLVMValueRef x = lp_build_broadcast_scalar(setup_bld, bld->x); + LLVMValueRef y = lp_build_broadcast_scalar(setup_bld, bld->y); + a0aos = lp_build_fmuladd(builder, x, dadxaos, a0aos); + a0aos = lp_build_fmuladd(builder, y, dadyaos, a0aos); } /* @@ -638,10 +641,18 @@ } #endif - if (attrib == 0 && chan == 2) { + if (attrib == 0 && chan == 2 && !bld->depth_clamp) { /* FIXME: Depth values can exceed 1.0, due to the fact that * setup interpolation coefficients refer to (0,0) which causes - * precision loss. So we must clamp to 1.0 here to avoid artifacts + * precision loss. So we must clamp to 1.0 here to avoid artifacts. + * Note though values outside [0,1] are perfectly valid with + * depth clip disabled.. + * XXX: If depth clip is disabled but we force depth clamp + * we may get values larger than 1.0 in the fs (but not in + * depth test). Not sure if that's an issue... + * Also, on a similar note, it is not obvious if the depth values + * appearing in fs (with depth clip disabled) should be clamped + * to [0,1], clamped to near/far or not be clamped at all... */ a = lp_build_min(coeff_bld, a, coeff_bld->one); } @@ -682,6 +693,7 @@ unsigned num_inputs, const struct lp_shader_input *inputs, boolean pixel_center_integer, + boolean depth_clamp, LLVMBuilderRef builder, struct lp_type type, LLVMValueRef a0_ptr, @@ -743,6 +755,7 @@ } else { bld->pos_offset = 0.5; } + bld->depth_clamp = depth_clamp; pos_init(bld, x0, y0); diff -Nru mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_bld_interp.h mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_bld_interp.h --- mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_bld_interp.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_bld_interp.h 2017-06-01 10:37:10.000000000 +0000 @@ -85,6 +85,7 @@ unsigned mask[1 + PIPE_MAX_SHADER_INPUTS]; /**< TGSI_WRITE_MASK_x */ enum lp_interp interp[1 + PIPE_MAX_SHADER_INPUTS]; boolean simple_interp; + boolean depth_clamp; double pos_offset; @@ -116,6 +117,7 @@ unsigned num_inputs, const struct lp_shader_input *inputs, boolean pixel_center_integer, + boolean depth_clamp, LLVMBuilderRef builder, struct lp_type type, LLVMValueRef a0_ptr, diff -Nru mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_flush.c mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_flush.c --- mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_flush.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_flush.c 2017-06-01 10:37:10.000000000 +0000 @@ -82,7 +82,8 @@ struct pipe_fence_handle *fence = NULL; llvmpipe_flush(pipe, &fence, reason); if (fence) { - pipe->screen->fence_finish(pipe->screen, fence, PIPE_TIMEOUT_INFINITE); + pipe->screen->fence_finish(pipe->screen, NULL, fence, + PIPE_TIMEOUT_INFINITE); pipe->screen->fence_reference(pipe->screen, &fence, NULL); } } diff -Nru mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_screen.c mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_screen.c --- mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_screen.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_screen.c 2017-06-01 10:37:10.000000000 +0000 @@ -109,6 +109,7 @@ switch (param) { case PIPE_CAP_NPOT_TEXTURES: case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES: + case PIPE_CAP_MIXED_COLOR_DEPTH_BITS: return 1; case PIPE_CAP_TWO_SIDED_STENCIL: return 1; @@ -199,6 +200,7 @@ case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE: return 2048; case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME: + case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS: return 1; case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS: return 0; @@ -264,6 +266,7 @@ case PIPE_CAP_FAKE_SW_MSAA: return 1; case PIPE_CAP_CONDITIONAL_RENDER_INVERTED: + case PIPE_CAP_TGSI_ARRAY_COMPONENTS: return 1; case PIPE_CAP_VENDOR_ID: @@ -279,6 +282,12 @@ if (!os_get_total_physical_memory(&system_memory)) return 0; + if (sizeof(void *) == 4) + /* Cap to 2 GB on 32 bits system. We do this because llvmpipe does + * eat application memory, which is quite limited on 32 bits. App + * shouldn't expect too much available memory. */ + system_memory = MIN2(system_memory, 2048 << 20); + return (int)(system_memory >> 20); } case PIPE_CAP_UMA: @@ -293,6 +302,8 @@ return 1; case PIPE_CAP_CULL_DISTANCE: return 1; + case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS: + return 1; case PIPE_CAP_MULTISAMPLE_Z_RESOLVE: case PIPE_CAP_RESOURCE_FROM_USER_MEMORY: case PIPE_CAP_DEVICE_RESET_STATUS_QUERY: @@ -301,7 +312,6 @@ case PIPE_CAP_TGSI_TXQS: case PIPE_CAP_FORCE_PERSAMPLE_INTERP: case PIPE_CAP_SHAREABLE_SHADERS: - case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS: case PIPE_CAP_CLEAR_TEXTURE: case PIPE_CAP_DRAW_PARAMETERS: case PIPE_CAP_TGSI_PACK_HALF_FLOAT: @@ -324,6 +334,14 @@ case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT: case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR: case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES: + case PIPE_CAP_TGSI_VOTE: + case PIPE_CAP_MAX_WINDOW_RECTANGLES: + case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED: + case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS: + case PIPE_CAP_TGSI_CAN_READ_OUTPUTS: + case PIPE_CAP_NATIVE_FENCE_FD: + case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY: + case PIPE_CAP_TGSI_FS_FBFETCH: return 0; } /* should only get here on unhandled cases */ @@ -449,19 +467,20 @@ if (!format_desc->is_array && !format_desc->is_bitmask && format != PIPE_FORMAT_R11G11B10_FLOAT) return FALSE; + } - /* - * XXX refuse formats known to crash in generate_unswizzled_blend(). - * These include all 3-channel 24bit RGB8 variants, plus 48bit - * (except those using floats) 3-channel RGB16 variants (the latter - * seems to be more of a llvm bug though). - * The mesa state tracker only seems to use these for SINT/UINT formats. + if ((bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_SAMPLER_VIEW)) && + ((bind & PIPE_BIND_DISPLAY_TARGET) == 0)) { + /* Disable all 3-channel formats, where channel size != 32 bits. + * In some cases we run into crashes (in generate_unswizzled_blend()), + * for 3-channel RGB16 variants, there was an apparent LLVM bug. + * In any case, disabling the shallower 3-channel formats avoids a + * number of issues with GL_ARB_copy_image support. */ - if (format_desc->is_array && format_desc->nr_channels == 3) { - if (format_desc->block.bits == 24 || (format_desc->block.bits == 48 && - !util_format_is_float(format))) { - return FALSE; - } + if (format_desc->is_array && + format_desc->nr_channels == 3 && + format_desc->block.bits != 96) { + return FALSE; } } @@ -566,6 +585,7 @@ */ static boolean llvmpipe_fence_finish(struct pipe_screen *screen, + struct pipe_context *ctx, struct pipe_fence_handle *fence_handle, uint64_t timeout) { diff -Nru mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_setup.c mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_setup.c --- mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_setup.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_setup.c 2017-06-01 10:37:10.000000000 +0000 @@ -39,6 +39,7 @@ #include "util/u_inlines.h" #include "util/u_memory.h" #include "util/u_pack_color.h" +#include "util/u_viewport.h" #include "draw/draw_pipe.h" #include "os/os_time.h" #include "lp_context.h" @@ -771,15 +772,8 @@ for (i = 0; i < num_viewports; i++) { float min_depth; float max_depth; - - if (lp->rasterizer->clip_halfz == 0) { - float half_depth = viewports[i].scale[2]; - min_depth = viewports[i].translate[2] - half_depth; - max_depth = min_depth + half_depth * 2.0f; - } else { - min_depth = viewports[i].translate[2]; - max_depth = min_depth + viewports[i].scale[2]; - } + util_viewport_zmin_zmax(&viewports[i], lp->rasterizer->clip_halfz, + &min_depth, &max_depth); if (setup->viewports[i].min_depth != min_depth || setup->viewports[i].max_depth != max_depth) { @@ -889,8 +883,8 @@ } else { /* - * For buffers, we don't have first_element, instead adjust - * last_element (stored as width) plus the base pointer. + * For buffers, we don't have "offset", instead adjust + * the size (stored as width) plus the base pointer. */ unsigned view_blocksize = util_format_get_blocksize(view->format); /* probably don't really need to fill that out */ @@ -899,12 +893,10 @@ jit_tex->img_stride[0] = 0; /* everything specified in number of elements here. */ - jit_tex->width = view->u.buf.last_element - view->u.buf.first_element + 1; - jit_tex->base = (uint8_t *)jit_tex->base + view->u.buf.first_element * - view_blocksize; + jit_tex->width = view->u.buf.size / view_blocksize; + jit_tex->base = (uint8_t *)jit_tex->base + view->u.buf.offset; /* XXX Unsure if we need to sanitize parameters? */ - assert(view->u.buf.first_element <= view->u.buf.last_element); - assert(view->u.buf.last_element * view_blocksize < res->width0); + assert(view->u.buf.offset + view->u.buf.size <= res->width0); } } } diff -Nru mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_state_derived.c mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_state_derived.c --- mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_state_derived.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_state_derived.c 2017-06-01 10:37:10.000000000 +0000 @@ -116,7 +116,7 @@ /* * Note that we'd actually want to skip position (as we won't use * the attribute in the fs) but can't. The reason is that we don't - * actually have a input/output map for setup (even though it looks + * actually have an input/output map for setup (even though it looks * like we do...). Could adjust for this though even without a map * (in llvmpipe_create_fs_state()). */ @@ -235,7 +235,7 @@ llvmpipe->stencil_ref.ref_value); } - if (llvmpipe->dirty & LP_NEW_CONSTANTS) + if (llvmpipe->dirty & LP_NEW_FS_CONSTANTS) lp_setup_set_fs_constants(llvmpipe->setup, ARRAY_SIZE(llvmpipe->constants[PIPE_SHADER_FRAGMENT]), llvmpipe->constants[PIPE_SHADER_FRAGMENT]); diff -Nru mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_state_fs.c mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_state_fs.c --- mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_state_fs.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_state_fs.c 2017-06-01 10:37:10.000000000 +0000 @@ -127,7 +127,7 @@ struct lp_type mask_type; LLVMTypeRef i32t = LLVMInt32TypeInContext(gallivm->context); LLVMValueRef bits[16]; - LLVMValueRef mask; + LLVMValueRef mask, bits_vec; int shift, i; /* @@ -179,15 +179,15 @@ bits[4*i + 2] = LLVMConstInt(i32t, 1ULL << (j + 4), 0); bits[4*i + 3] = LLVMConstInt(i32t, 1ULL << (j + 5), 0); } - mask = LLVMBuildAnd(builder, mask, LLVMConstVector(bits, fs_type.length), ""); + bits_vec = LLVMConstVector(bits, fs_type.length); + mask = LLVMBuildAnd(builder, mask, bits_vec, ""); /* - * mask = mask != 0 ? ~0 : 0 + * mask = mask == bits ? ~0 : 0 */ mask = lp_build_compare(gallivm, - mask_type, PIPE_FUNC_NOTEQUAL, - mask, - lp_build_const_int_vec(gallivm, mask_type, 0)); + mask_type, PIPE_FUNC_EQUAL, + mask, bits_vec); return mask; } @@ -238,6 +238,54 @@ } +static LLVMValueRef +lp_build_depth_clamp(struct gallivm_state *gallivm, + LLVMBuilderRef builder, + struct lp_type type, + LLVMValueRef context_ptr, + LLVMValueRef thread_data_ptr, + LLVMValueRef z) +{ + LLVMValueRef viewport, min_depth, max_depth; + LLVMValueRef viewport_index; + struct lp_build_context f32_bld; + + assert(type.floating); + lp_build_context_init(&f32_bld, gallivm, type); + + /* + * Assumes clamping of the viewport index will occur in setup/gs. Value + * is passed through the rasterization stage via lp_rast_shader_inputs. + * + * See: draw_clamp_viewport_idx and lp_clamp_viewport_idx for clamping + * semantics. + */ + viewport_index = lp_jit_thread_data_raster_state_viewport_index(gallivm, + thread_data_ptr); + + /* + * Load the min and max depth from the lp_jit_context.viewports + * array of lp_jit_viewport structures. + */ + viewport = lp_llvm_viewport(context_ptr, gallivm, viewport_index); + + /* viewports[viewport_index].min_depth */ + min_depth = LLVMBuildExtractElement(builder, viewport, + lp_build_const_int32(gallivm, LP_JIT_VIEWPORT_MIN_DEPTH), ""); + min_depth = lp_build_broadcast_scalar(&f32_bld, min_depth); + + /* viewports[viewport_index].max_depth */ + max_depth = LLVMBuildExtractElement(builder, viewport, + lp_build_const_int32(gallivm, LP_JIT_VIEWPORT_MAX_DEPTH), ""); + max_depth = lp_build_broadcast_scalar(&f32_bld, max_depth); + + /* + * Clamp to the min and max depth values for the given viewport. + */ + return lp_build_clamp(&f32_bld, z, min_depth, max_depth); +} + + /** * Generate the fragment shader, depth/stencil test, and alpha tests. */ @@ -383,6 +431,13 @@ z = interp->pos[2]; if (depth_mode & EARLY_DEPTH_TEST) { + /* + * Clamp according to ARB_depth_clamp semantics. + */ + if (key->depth_clamp) { + z = lp_build_depth_clamp(gallivm, builder, type, context_ptr, + thread_data_ptr, z); + } lp_build_depth_stencil_load_swizzled(gallivm, type, zs_format_desc, key->resource_1d, depth_ptr, depth_stride, @@ -471,51 +526,13 @@ 0); if (pos0 != -1 && outputs[pos0][2]) { z = LLVMBuildLoad(builder, outputs[pos0][2], "output.z"); - - /* - * Clamp according to ARB_depth_clamp semantics. - */ - if (key->depth_clamp) { - LLVMValueRef viewport, min_depth, max_depth; - LLVMValueRef viewport_index; - struct lp_build_context f32_bld; - - assert(type.floating); - lp_build_context_init(&f32_bld, gallivm, type); - - /* - * Assumes clamping of the viewport index will occur in setup/gs. Value - * is passed through the rasterization stage via lp_rast_shader_inputs. - * - * See: draw_clamp_viewport_idx and lp_clamp_viewport_idx for clamping - * semantics. - */ - viewport_index = lp_jit_thread_data_raster_state_viewport_index(gallivm, - thread_data_ptr); - - /* - * Load the min and max depth from the lp_jit_context.viewports - * array of lp_jit_viewport structures. - */ - viewport = lp_llvm_viewport(context_ptr, gallivm, viewport_index); - - /* viewports[viewport_index].min_depth */ - min_depth = LLVMBuildExtractElement(builder, viewport, - lp_build_const_int32(gallivm, LP_JIT_VIEWPORT_MIN_DEPTH), - ""); - min_depth = lp_build_broadcast_scalar(&f32_bld, min_depth); - - /* viewports[viewport_index].max_depth */ - max_depth = LLVMBuildExtractElement(builder, viewport, - lp_build_const_int32(gallivm, LP_JIT_VIEWPORT_MAX_DEPTH), - ""); - max_depth = lp_build_broadcast_scalar(&f32_bld, max_depth); - - /* - * Clamp to the min and max depth values for the given viewport. - */ - z = lp_build_clamp(&f32_bld, z, min_depth, max_depth); - } + } + /* + * Clamp according to ARB_depth_clamp semantics. + */ + if (key->depth_clamp) { + z = lp_build_depth_clamp(gallivm, builder, type, context_ptr, + thread_data_ptr, z); } if (s_out != -1 && outputs[s_out][1]) { @@ -717,6 +734,10 @@ } } else if (twiddle) { /* Twiddle pixels across elements of array */ + /* + * XXX: we should avoid this in some cases, but would need to tell + * lp_build_conv to reorder (or deal with it ourselves). + */ lp_bld_quad_twiddle(gallivm, type, src, src_count, dst); } else { /* Do nothing */ @@ -747,6 +768,94 @@ } +/* + * Untwiddle and transpose, much like the above. + * However, this is after conversion, so we get packed vectors. + * At this time only handle 4x16i8 rgba / 2x16i8 rg / 1x16i8 r data, + * the vectors will look like: + * r0r1r4r5r2r3r6r7r8r9r12... (albeit color channels may + * be swizzled here). Extending to 16bit should be trivial. + * Should also be extended to handle twice wide vectors with AVX2... + */ +static void +fs_twiddle_transpose(struct gallivm_state *gallivm, + struct lp_type type, + LLVMValueRef *src, + unsigned src_count, + LLVMValueRef *dst) +{ + unsigned i, j; + struct lp_type type64, type16, type32; + LLVMTypeRef type64_t, type8_t, type16_t, type32_t; + LLVMBuilderRef builder = gallivm->builder; + LLVMValueRef tmp[4], shuf[8]; + for (j = 0; j < 2; j++) { + shuf[j*4 + 0] = lp_build_const_int32(gallivm, j*4 + 0); + shuf[j*4 + 1] = lp_build_const_int32(gallivm, j*4 + 2); + shuf[j*4 + 2] = lp_build_const_int32(gallivm, j*4 + 1); + shuf[j*4 + 3] = lp_build_const_int32(gallivm, j*4 + 3); + } + + assert(src_count == 4 || src_count == 2 || src_count == 1); + assert(type.width == 8); + assert(type.length == 16); + + type8_t = lp_build_vec_type(gallivm, type); + + type64 = type; + type64.length /= 8; + type64.width *= 8; + type64_t = lp_build_vec_type(gallivm, type64); + + type16 = type; + type16.length /= 2; + type16.width *= 2; + type16_t = lp_build_vec_type(gallivm, type16); + + type32 = type; + type32.length /= 4; + type32.width *= 4; + type32_t = lp_build_vec_type(gallivm, type32); + + lp_build_transpose_aos_n(gallivm, type, src, src_count, tmp); + + if (src_count == 1) { + /* transpose was no-op, just untwiddle */ + LLVMValueRef shuf_vec; + shuf_vec = LLVMConstVector(shuf, 8); + tmp[0] = LLVMBuildBitCast(builder, src[0], type16_t, ""); + tmp[0] = LLVMBuildShuffleVector(builder, tmp[0], tmp[0], shuf_vec, ""); + dst[0] = LLVMBuildBitCast(builder, tmp[0], type8_t, ""); + } else if (src_count == 2) { + LLVMValueRef shuf_vec; + shuf_vec = LLVMConstVector(shuf, 4); + + for (i = 0; i < 2; i++) { + tmp[i] = LLVMBuildBitCast(builder, tmp[i], type32_t, ""); + tmp[i] = LLVMBuildShuffleVector(builder, tmp[i], tmp[i], shuf_vec, ""); + dst[i] = LLVMBuildBitCast(builder, tmp[i], type8_t, ""); + } + } else { + for (j = 0; j < 2; j++) { + LLVMValueRef lo, hi, lo2, hi2; + /* + * Note that if we only really have 3 valid channels (rgb) + * and we don't need alpha we could substitute a undef here + * for the respective channel (causing llvm to drop conversion + * for alpha). + */ + /* we now have rgba0rgba1rgba4rgba5 etc, untwiddle */ + lo2 = LLVMBuildBitCast(builder, tmp[j*2], type64_t, ""); + hi2 = LLVMBuildBitCast(builder, tmp[j*2 + 1], type64_t, ""); + lo = lp_build_interleave2(gallivm, type64, lo2, hi2, 0); + hi = lp_build_interleave2(gallivm, type64, lo2, hi2, 1); + dst[j*2] = LLVMBuildBitCast(builder, lo, type8_t, ""); + dst[j*2 + 1] = LLVMBuildBitCast(builder, hi, type8_t, ""); + } + } +} + + /** * Load an unswizzled block of pixels from memory */ @@ -782,7 +891,8 @@ gep[1] = LLVMBuildAdd(builder, bx, by, ""); dst_ptr = LLVMBuildGEP(builder, base_ptr, gep, 2, ""); - dst_ptr = LLVMBuildBitCast(builder, dst_ptr, LLVMPointerType(lp_build_vec_type(gallivm, dst_type), 0), ""); + dst_ptr = LLVMBuildBitCast(builder, dst_ptr, + LLVMPointerType(lp_build_vec_type(gallivm, dst_type), 0), ""); dst[i] = LLVMBuildLoad(builder, dst_ptr, ""); @@ -826,7 +936,8 @@ gep[1] = LLVMBuildAdd(builder, bx, by, ""); src_ptr = LLVMBuildGEP(builder, base_ptr, gep, 2, ""); - src_ptr = LLVMBuildBitCast(builder, src_ptr, LLVMPointerType(lp_build_vec_type(gallivm, src_type), 0), ""); + src_ptr = LLVMBuildBitCast(builder, src_ptr, + LLVMPointerType(lp_build_vec_type(gallivm, src_type), 0), ""); src_ptr = LLVMBuildStore(builder, src[i], src_ptr); @@ -1079,7 +1190,7 @@ lp_build_const_int_vec(gallivm, src_type, db), ""); - if (db < src_bits) { + if (db <= src_bits) { /* Enough bits in src to fill the remainder */ LLVMValueRef lower = LLVMBuildLShr(builder, src, @@ -1137,7 +1248,7 @@ LLVMBuilderRef builder = gallivm->builder; struct lp_type blend_type; struct lp_type mem_type; - unsigned i, j, k; + unsigned i, j; unsigned pixels = block_size / num_srcs; bool is_arith; @@ -1250,9 +1361,7 @@ unsigned from_lsb = src_fmt->nr_channels - j - 1; #endif - for (k = 0; k < src_fmt->channel[j].size; ++k) { - mask |= 1 << k; - } + mask = (1 << src_fmt->channel[j].size) - 1; /* Extract bits from source */ chans[j] = LLVMBuildLShr(builder, @@ -1443,7 +1552,8 @@ /* Extract bits */ chans[j] = LLVMBuildLShr(builder, dst[i], - lp_build_const_int_vec(gallivm, src_type, from_lsb * blend_type.width), + lp_build_const_int_vec(gallivm, src_type, + from_lsb * blend_type.width), ""); chans[j] = LLVMBuildAnd(builder, @@ -1531,7 +1641,8 @@ /* If there is a src for each pixel broadcast the alpha across whole row */ if (src_count == block_size) { for (i = 0; i < src_count; ++i) { - src_alpha[i] = lp_build_broadcast(gallivm, lp_build_vec_type(gallivm, row_type), src_alpha[i]); + src_alpha[i] = lp_build_broadcast(gallivm, + lp_build_vec_type(gallivm, row_type), src_alpha[i]); } } else { unsigned pixels = block_size / src_count; @@ -1617,6 +1728,7 @@ struct lp_type blend_type; struct lp_type row_type; struct lp_type dst_type; + struct lp_type ls_type; unsigned char swizzle[TGSI_NUM_CHANNELS]; unsigned vector_width; @@ -1636,6 +1748,7 @@ util_blend_state_is_dual(&variant->key.blend, 0); const boolean is_1d = variant->key.resource_1d; + boolean twiddle_after_convert = FALSE; unsigned num_fullblock_fs = is_1d ? 2 * num_fs : num_fs; LLVMValueRef fpstate = 0; @@ -1731,13 +1844,23 @@ } /* If 3 channels then pad to include alpha for 4 element transpose */ - if (dst_channels == 3 && !has_alpha) { + if (dst_channels == 3) { + assert (!has_alpha); for (i = 0; i < TGSI_NUM_CHANNELS; i++) { if (swizzle[i] > TGSI_NUM_CHANNELS) swizzle[i] = 3; } if (out_format_desc->nr_channels == 4) { dst_channels = 4; + /* + * We use alpha from the color conversion, not separate one. + * We had to include it for transpose, hence it will get converted + * too (albeit when doing transpose after conversion, that would + * no longer be the case necessarily). + * (It works only with 4 channel dsts, e.g. rgbx formats, because + * otherwise we really have padding, not alpha, included.) + */ + has_alpha = true; } } @@ -1769,6 +1892,7 @@ /* * XXX If we include that here maybe could actually use it instead of * separate alpha for blending? + * (Difficult though we actually convert pad channels, not alpha.) */ if (dst_channels == 3 && !has_alpha) { fs_src[i][3] = alpha; @@ -1776,11 +1900,14 @@ /* We split the row_mask and row_alpha as we want 128bit interleave */ if (fs_type.length == 8) { - src_mask[i*2 + 0] = lp_build_extract_range(gallivm, fs_mask[i], 0, src_channels); - src_mask[i*2 + 1] = lp_build_extract_range(gallivm, fs_mask[i], src_channels, src_channels); + src_mask[i*2 + 0] = lp_build_extract_range(gallivm, fs_mask[i], + 0, src_channels); + src_mask[i*2 + 1] = lp_build_extract_range(gallivm, fs_mask[i], + src_channels, src_channels); src_alpha[i*2 + 0] = lp_build_extract_range(gallivm, alpha, 0, src_channels); - src_alpha[i*2 + 1] = lp_build_extract_range(gallivm, alpha, src_channels, src_channels); + src_alpha[i*2 + 1] = lp_build_extract_range(gallivm, alpha, + src_channels, src_channels); } else { src_mask[i] = fs_mask[i]; src_alpha[i] = alpha; @@ -1811,7 +1938,8 @@ } if (fs_type.length == 8) { src1_alpha[i*2 + 0] = lp_build_extract_range(gallivm, alpha, 0, src_channels); - src1_alpha[i*2 + 1] = lp_build_extract_range(gallivm, alpha, src_channels, src_channels); + src1_alpha[i*2 + 1] = lp_build_extract_range(gallivm, alpha, + src_channels, src_channels); } else { src1_alpha[i] = alpha; } @@ -1838,13 +1966,44 @@ } /* + * We actually should generally do conversion first (for non-1d cases) + * when the blend format is 8 or 16 bits. The reason is obvious, + * there's 2 or 4 times less vectors to deal with for the interleave... + * Albeit for the AVX (not AVX2) case there's no benefit with 16 bit + * vectors (as it can do 32bit unpack with 256bit vectors, but 8/16bit + * unpack only with 128bit vectors). + * Note: for 16bit sizes really need matching pack conversion code + */ + if (!is_1d && dst_channels != 3 && dst_type.width == 8) { + twiddle_after_convert = TRUE; + } + + /* * Pixel twiddle from fragment shader order to memory order */ - src_count = generate_fs_twiddle(gallivm, fs_type, num_fullblock_fs, - dst_channels, fs_src, src, pad_inline); - if (dual_source_blend) { - generate_fs_twiddle(gallivm, fs_type, num_fullblock_fs, dst_channels, - fs_src1, src1, pad_inline); + if (!twiddle_after_convert) { + src_count = generate_fs_twiddle(gallivm, fs_type, num_fullblock_fs, + dst_channels, fs_src, src, pad_inline); + if (dual_source_blend) { + generate_fs_twiddle(gallivm, fs_type, num_fullblock_fs, dst_channels, + fs_src1, src1, pad_inline); + } + } else { + src_count = num_fullblock_fs * dst_channels; + /* + * We reorder things a bit here, so the cases for 4-wide and 8-wide + * (AVX) turn out the same later when untwiddling/transpose (albeit + * for true AVX2 path untwiddle needs to be different). + * For now just order by colors first (so we can use unpack later). + */ + for (j = 0; j < num_fullblock_fs; j++) { + for (i = 0; i < dst_channels; i++) { + src[i*num_fullblock_fs + j] = fs_src[j][i]; + if (dual_source_blend) { + src1[i*num_fullblock_fs + j] = fs_src1[j][i]; + } + } + } } src_channels = dst_channels < 3 ? dst_channels : 4; @@ -1888,13 +2047,21 @@ assert(bits == 128 || bits == 256); } + if (twiddle_after_convert) { + fs_twiddle_transpose(gallivm, row_type, src, src_count, src); + if (dual_source_blend) { + fs_twiddle_transpose(gallivm, row_type, src1, src_count, src1); + } + } /* * Blend Colour conversion */ blend_color = lp_jit_context_f_blend_color(gallivm, context_ptr); - blend_color = LLVMBuildPointerCast(builder, blend_color, LLVMPointerType(lp_build_vec_type(gallivm, fs_type), 0), ""); - blend_color = LLVMBuildLoad(builder, LLVMBuildGEP(builder, blend_color, &i32_zero, 1, ""), ""); + blend_color = LLVMBuildPointerCast(builder, blend_color, + LLVMPointerType(lp_build_vec_type(gallivm, fs_type), 0), ""); + blend_color = LLVMBuildLoad(builder, LLVMBuildGEP(builder, blend_color, + &i32_zero, 1, ""), ""); /* Convert */ lp_build_conv(gallivm, fs_type, blend_type, &blend_color, 1, &blend_color, 1); @@ -1971,13 +2138,19 @@ mask_type.length = pixels; mask_type.width = row_type.width * dst_channels; - src_mask[i] = LLVMBuildIntCast(builder, src_mask[i], lp_build_int_vec_type(gallivm, mask_type), ""); + /* + * If mask_type width is smaller than 32bit, this doesn't quite + * generate the most efficient code (could use some pack). + */ + src_mask[i] = LLVMBuildIntCast(builder, src_mask[i], + lp_build_int_vec_type(gallivm, mask_type), ""); mask_type.length *= dst_channels; mask_type.width /= dst_channels; } - src_mask[i] = LLVMBuildBitCast(builder, src_mask[i], lp_build_int_vec_type(gallivm, mask_type), ""); + src_mask[i] = LLVMBuildBitCast(builder, src_mask[i], + lp_build_int_vec_type(gallivm, mask_type), ""); src_mask[i] = lp_build_pad_vector(gallivm, src_mask[i], row_type.length); } @@ -2042,17 +2215,41 @@ */ dst_alignment = MIN2(16, dst_alignment); + ls_type = dst_type; + + if (dst_count > src_count) { + if ((dst_type.width == 8 || dst_type.width == 16) && + util_is_power_of_two(dst_type.length) && + dst_type.length * dst_type.width < 128) { + /* + * Never try to load values as 4xi8 which we will then + * concatenate to larger vectors. This gives llvm a real + * headache (the problem is the type legalizer (?) will + * try to load that as 4xi8 zext to 4xi32 to fill the vector, + * then the shuffles to concatenate are more or less impossible + * - llvm is easily capable of generating a sequence of 32 + * pextrb/pinsrb instructions for that. Albeit it appears to + * be fixed in llvm 4.0. So, load and concatenate with 32bit + * width to avoid the trouble (16bit seems not as bad, llvm + * probably recognizes the load+shuffle as only one shuffle + * is necessary, but we can do just the same anyway). + */ + ls_type.length = dst_type.length * dst_type.width / 32; + ls_type.width = 32; + } + } + if (is_1d) { load_unswizzled_block(gallivm, color_ptr, stride, block_width, 1, - dst, dst_type, dst_count / 4, dst_alignment); + dst, ls_type, dst_count / 4, dst_alignment); for (i = dst_count / 4; i < dst_count; i++) { - dst[i] = lp_build_undef(gallivm, dst_type); + dst[i] = lp_build_undef(gallivm, ls_type); } } else { load_unswizzled_block(gallivm, color_ptr, stride, block_width, block_height, - dst, dst_type, dst_count, dst_alignment); + dst, ls_type, dst_count, dst_alignment); } @@ -2067,7 +2264,24 @@ * on all 16 pixels in that single vector at once. */ if (dst_count > src_count) { - lp_build_concat_n(gallivm, dst_type, dst, 4, dst, src_count); + if (ls_type.length != dst_type.length && ls_type.length == 1) { + LLVMTypeRef elem_type = lp_build_elem_type(gallivm, ls_type); + LLVMTypeRef ls_vec_type = LLVMVectorType(elem_type, 1); + for (i = 0; i < dst_count; i++) { + dst[i] = LLVMBuildBitCast(builder, dst[i], ls_vec_type, ""); + } + } + + lp_build_concat_n(gallivm, ls_type, dst, 4, dst, src_count); + + if (ls_type.length != dst_type.length) { + struct lp_type tmp_type = dst_type; + tmp_type.length = dst_type.length * 4 / src_count; + for (i = 0; i < src_count; i++) { + dst[i] = LLVMBuildBitCast(builder, dst[i], + lp_build_vec_type(gallivm, tmp_type), ""); + } + } } /* @@ -2082,7 +2296,8 @@ * It seems some cleanup could be done here (like skipping conversion/blend * when not needed). */ - convert_to_blend_type(gallivm, block_size, out_format_desc, dst_type, row_type, dst, src_count); + convert_to_blend_type(gallivm, block_size, out_format_desc, dst_type, + row_type, dst, src_count); /* * FIXME: Really should get logic ops / masks out of generic blend / row @@ -2108,7 +2323,8 @@ pad_inline ? 4 : dst_channels); } - convert_from_blend_type(gallivm, block_size, out_format_desc, row_type, dst_type, dst, src_count); + convert_from_blend_type(gallivm, block_size, out_format_desc, + row_type, dst_type, dst, src_count); /* Split the blend rows back to memory rows */ if (dst_count > src_count) { @@ -2279,7 +2495,7 @@ */ for(i = 0; i < ARRAY_SIZE(arg_types); ++i) if(LLVMGetTypeKind(arg_types[i]) == LLVMPointerTypeKind) - LLVMAddAttribute(LLVMGetParam(function, i), LLVMNoAliasAttribute); + lp_add_function_attr(function, i + 1, LP_FUNC_ATTR_NOALIAS); context_ptr = LLVMGetParam(function, 0); x = LLVMGetParam(function, 1); @@ -2344,6 +2560,7 @@ shader->info.base.num_inputs, inputs, pixel_center_integer, + key->depth_clamp, builder, fs_type, a0_ptr, dadx_ptr, dady_ptr, x, y); @@ -2458,8 +2675,10 @@ for (i = 0; i < key->nr_cbufs; ++i) { debug_printf("cbuf_format[%u] = %s\n", i, util_format_name(key->cbuf_format[i])); } - if (key->depth.enabled) { + if (key->depth.enabled || key->stencil[0].enabled) { debug_printf("depth.format = %s\n", util_format_name(key->zsbuf_format)); + } + if (key->depth.enabled) { debug_printf("depth.func = %s\n", util_dump_func(key->depth.func, TRUE)); debug_printf("depth.writemask = %u\n", key->depth.writemask); } @@ -2836,7 +3055,7 @@ static void llvmpipe_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, - struct pipe_constant_buffer *cb) + const struct pipe_constant_buffer *cb) { struct llvmpipe_context *llvmpipe = llvmpipe_context(pipe); struct pipe_resource *constants = cb ? cb->buffer : NULL; @@ -2847,6 +3066,13 @@ /* note: reference counting */ util_copy_constant_buffer(&llvmpipe->constants[shader][index], cb); + if (constants) { + if (!(constants->bind & PIPE_BIND_CONSTANT_BUFFER)) { + debug_printf("Illegal set constant without bind flag\n"); + constants->bind |= PIPE_BIND_CONSTANT_BUFFER; + } + } + if (shader == PIPE_SHADER_VERTEX || shader == PIPE_SHADER_GEOMETRY) { /* Pass the constants to the 'draw' module */ @@ -2869,8 +3095,9 @@ draw_set_mapped_constant_buffer(llvmpipe->draw, shader, index, data, size); } - - llvmpipe->dirty |= LP_NEW_CONSTANTS; + else { + llvmpipe->dirty |= LP_NEW_FS_CONSTANTS; + } if (cb && cb->user_buffer) { pipe_resource_reference(&constants, NULL); @@ -2941,6 +3168,13 @@ * depth_clip == 0 implies depth clamping is enabled. * * When clip_halfz is enabled, then always clamp the depth values. + * + * XXX: This is incorrect for GL, but correct for d3d10 (depth + * clamp is always active in d3d10, regardless if depth clip is + * enabled or not). + * (GL has an always-on [0,1] clamp on fs depth output instead + * to ensure the depth values stay in range. Doesn't look like + * we do that, though...) */ if (lp->rasterizer->clip_halfz) { key->depth_clamp = 1; diff -Nru mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_state.h mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_state.h --- mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_state.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_state.h 2017-06-01 10:37:10.000000000 +0000 @@ -46,7 +46,7 @@ #define LP_NEW_STIPPLE 0x40 #define LP_NEW_FRAMEBUFFER 0x80 #define LP_NEW_DEPTH_STENCIL_ALPHA 0x100 -#define LP_NEW_CONSTANTS 0x200 +#define LP_NEW_FS_CONSTANTS 0x200 #define LP_NEW_SAMPLER 0x400 #define LP_NEW_SAMPLER_VIEW 0x800 #define LP_NEW_VERTEX 0x1000 diff -Nru mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_state_sampler.c mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_state_sampler.c --- mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_state_sampler.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_state_sampler.c 2017-06-01 10:37:10.000000000 +0000 @@ -66,7 +66,7 @@ static void llvmpipe_bind_sampler_states(struct pipe_context *pipe, - unsigned shader, + enum pipe_shader_type shader, unsigned start, unsigned num, void **samplers) @@ -106,7 +106,7 @@ static void llvmpipe_set_sampler_views(struct pipe_context *pipe, - unsigned shader, + enum pipe_shader_type shader, unsigned start, unsigned num, struct pipe_sampler_view **views) @@ -169,11 +169,13 @@ { struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view); /* - * XXX we REALLY want to see the correct bind flag here but the OpenGL - * state tracker can't guarantee that at least for texture buffer objects. + * XXX: bind flags from OpenGL state tracker are notoriously unreliable. + * This looks unfixable, so fix the bind flags instead when it happens. */ - if (!(texture->bind & PIPE_BIND_SAMPLER_VIEW)) + if (!(texture->bind & PIPE_BIND_SAMPLER_VIEW)) { debug_printf("Illegal sampler view creation without bind flag\n"); + texture->bind |= PIPE_BIND_SAMPLER_VIEW; + } if (view) { *view = *templ; @@ -306,11 +308,9 @@ img_stride[0] = 0; /* everything specified in number of elements here. */ - width0 = view->u.buf.last_element - view->u.buf.first_element + 1; - addr = (uint8_t *)addr + view->u.buf.first_element * - view_blocksize; - assert(view->u.buf.first_element <= view->u.buf.last_element); - assert(view->u.buf.last_element * view_blocksize < res->width0); + width0 = view->u.buf.size / view_blocksize; + addr = (uint8_t *)addr + view->u.buf.offset; + assert(view->u.buf.offset + view->u.buf.size <= res->width0); } } else { diff -Nru mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_state_setup.c mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_state_setup.c --- mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_state_setup.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_state_setup.c 2017-06-01 10:37:10.000000000 +0000 @@ -624,8 +624,7 @@ int i; for(i = 0; i < nr_args; ++i) if(LLVMGetTypeKind(arg_types[i]) == LLVMPointerTypeKind) - LLVMAddAttribute(LLVMGetParam(function, i), - LLVMNoAliasAttribute); + lp_add_function_attr(function, i + 1, LP_FUNC_ATTR_NOALIAS); } static void diff -Nru mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_surface.c mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_surface.c --- mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_surface.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_surface.c 2017-06-01 10:37:10.000000000 +0000 @@ -131,8 +131,15 @@ { struct pipe_surface *ps; - if (!(pt->bind & (PIPE_BIND_DEPTH_STENCIL | PIPE_BIND_RENDER_TARGET))) + if (!(pt->bind & (PIPE_BIND_DEPTH_STENCIL | PIPE_BIND_RENDER_TARGET))) { debug_printf("Illegal surface creation without bind flag\n"); + if (util_format_is_depth_or_stencil(surf_tmpl->format)) { + pt->bind |= PIPE_BIND_DEPTH_STENCIL; + } + else { + pt->bind |= PIPE_BIND_RENDER_TARGET; + } + } ps = CALLOC_STRUCT(pipe_surface); if (ps) { @@ -183,11 +190,12 @@ struct pipe_surface *dst, const union pipe_color_union *color, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct llvmpipe_context *llvmpipe = llvmpipe_context(pipe); - if (!llvmpipe_check_render_cond(llvmpipe)) + if (render_condition_enabled && !llvmpipe_check_render_cond(llvmpipe)) return; util_clear_render_target(pipe, dst, color, @@ -202,11 +210,12 @@ double depth, unsigned stencil, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct llvmpipe_context *llvmpipe = llvmpipe_context(pipe); - if (!llvmpipe_check_render_cond(llvmpipe)) + if (render_condition_enabled && !llvmpipe_check_render_cond(llvmpipe)) return; util_clear_depth_stencil(pipe, dst, clear_flags, diff -Nru mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_texture.c mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_texture.c --- mesa-12.0.6/src/gallium/drivers/llvmpipe/lp_texture.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/llvmpipe/lp_texture.c 2017-06-01 10:37:10.000000000 +0000 @@ -485,6 +485,7 @@ static boolean llvmpipe_resource_get_handle(struct pipe_screen *screen, + struct pipe_context *ctx, struct pipe_resource *pt, struct winsys_handle *whandle, unsigned usage) @@ -542,14 +543,14 @@ } } - /* Check if we're mapping the current constant buffer */ + /* Check if we're mapping a current constant buffer */ if ((usage & PIPE_TRANSFER_WRITE) && (resource->bind & PIPE_BIND_CONSTANT_BUFFER)) { unsigned i; for (i = 0; i < ARRAY_SIZE(llvmpipe->constants[PIPE_SHADER_FRAGMENT]); ++i) { if (resource == llvmpipe->constants[PIPE_SHADER_FRAGMENT][i].buffer) { /* constants may have changed */ - llvmpipe->dirty |= LP_NEW_CONSTANTS; + llvmpipe->dirty |= LP_NEW_FS_CONSTANTS; break; } } @@ -640,13 +641,6 @@ unsigned level) { struct llvmpipe_context *llvmpipe = llvmpipe_context( pipe ); - - /* - * XXX checking only resources with the right bind flags - * is unsafe since with opengl state tracker we can end up - * with resources bound to places they weren't supposed to be - * (buffers bound as sampler views is one possibility here). - */ if (!(presource->bind & (PIPE_BIND_DEPTH_STENCIL | PIPE_BIND_RENDER_TARGET | PIPE_BIND_SAMPLER_VIEW))) @@ -687,6 +681,7 @@ /** * Create buffer which wraps user-space data. + * XXX unreachable. */ struct pipe_resource * llvmpipe_user_buffer_create(struct pipe_screen *screen, @@ -822,5 +817,6 @@ pipe->transfer_unmap = llvmpipe_transfer_unmap; pipe->transfer_flush_region = u_default_transfer_flush_region; - pipe->transfer_inline_write = u_default_transfer_inline_write; + pipe->buffer_subdata = u_default_buffer_subdata; + pipe->texture_subdata = u_default_texture_subdata; } diff -Nru mesa-12.0.6/src/gallium/drivers/llvmpipe/Makefile.am mesa-17.0.7/src/gallium/drivers/llvmpipe/Makefile.am --- mesa-12.0.6/src/gallium/drivers/llvmpipe/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/llvmpipe/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -54,7 +54,8 @@ $(top_builddir)/src/util/libmesautil.la \ $(LLVM_LIBS) \ $(DLOPEN_LIBS) \ - $(PTHREAD_LIBS) + $(PTHREAD_LIBS) \ + $(CLOCK_LIB) lp_test_format_SOURCES = lp_test_format.c lp_test_main.c lp_test_format_LDADD = $(TEST_LIBS) diff -Nru mesa-12.0.6/src/gallium/drivers/llvmpipe/Makefile.in mesa-17.0.7/src/gallium/drivers/llvmpipe/Makefile.in --- mesa-12.0.6/src/gallium/drivers/llvmpipe/Makefile.in 2017-01-24 01:41:46.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/llvmpipe/Makefile.in 2017-06-01 10:37:20.000000000 +0000 @@ -112,10 +112,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -172,7 +175,8 @@ am__DEPENDENCIES_2 = libllvmpipe.la \ $(top_builddir)/src/gallium/auxiliary/libgallium.la \ $(top_builddir)/src/util/libmesautil.la $(am__DEPENDENCIES_1) \ - $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_1) lp_test_arit_DEPENDENCIES = $(am__DEPENDENCIES_2) am_lp_test_blend_OBJECTS = lp_test_blend.$(OBJEXT) \ lp_test_main.$(OBJEXT) @@ -490,6 +494,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -504,6 +510,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -533,10 +540,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -586,11 +594,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -630,8 +635,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -668,8 +671,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -678,7 +679,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -686,13 +686,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -721,6 +722,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -902,12 +904,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -919,7 +917,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ $(GALLIUM_DRIVER_CFLAGS) \ $(LLVM_CFLAGS) \ @@ -941,7 +939,8 @@ $(top_builddir)/src/util/libmesautil.la \ $(LLVM_LIBS) \ $(DLOPEN_LIBS) \ - $(PTHREAD_LIBS) + $(PTHREAD_LIBS) \ + $(CLOCK_LIB) lp_test_format_SOURCES = lp_test_format.c lp_test_main.c lp_test_format_LDADD = $(TEST_LIBS) diff -Nru mesa-12.0.6/src/gallium/drivers/noop/Makefile.in mesa-17.0.7/src/gallium/drivers/noop/Makefile.in --- mesa-12.0.6/src/gallium/drivers/noop/Makefile.in 2017-01-24 01:41:46.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/noop/Makefile.in 2017-06-01 10:37:20.000000000 +0000 @@ -94,10 +94,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -197,6 +200,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -211,6 +216,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -240,10 +246,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -293,11 +300,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -337,8 +341,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -375,8 +377,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -385,7 +385,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -393,13 +392,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -428,6 +428,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -542,12 +543,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -559,7 +556,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ $(GALLIUM_DRIVER_CFLAGS) diff -Nru mesa-12.0.6/src/gallium/drivers/noop/noop_pipe.c mesa-17.0.7/src/gallium/drivers/noop/noop_pipe.c --- mesa-12.0.6/src/gallium/drivers/noop/noop_pipe.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/noop/noop_pipe.c 2017-06-01 10:37:10.000000000 +0000 @@ -36,26 +36,26 @@ void noop_init_state_functions(struct pipe_context *ctx); struct noop_pipe_screen { - struct pipe_screen pscreen; - struct pipe_screen *oscreen; + struct pipe_screen pscreen; + struct pipe_screen *oscreen; }; /* * query */ struct noop_query { - unsigned query; + unsigned query; }; static struct pipe_query *noop_create_query(struct pipe_context *ctx, unsigned query_type, unsigned index) { - struct noop_query *query = CALLOC_STRUCT(noop_query); + struct noop_query *query = CALLOC_STRUCT(noop_query); - return (struct pipe_query *)query; + return (struct pipe_query *)query; } static void noop_destroy_query(struct pipe_context *ctx, struct pipe_query *query) { - FREE(query); + FREE(query); } static boolean noop_begin_query(struct pipe_context *ctx, struct pipe_query *query) @@ -69,14 +69,14 @@ } static boolean noop_get_query_result(struct pipe_context *ctx, - struct pipe_query *query, - boolean wait, - union pipe_query_result *vresult) + struct pipe_query *query, + boolean wait, + union pipe_query_result *vresult) { - uint64_t *result = (uint64_t*)vresult; + uint64_t *result = (uint64_t*)vresult; - *result = 0; - return TRUE; + *result = 0; + return TRUE; } static void @@ -89,66 +89,79 @@ * resource */ struct noop_resource { - struct pipe_resource base; - unsigned size; - char *data; - struct sw_displaytarget *dt; + struct pipe_resource base; + unsigned size; + char *data; + struct sw_displaytarget *dt; }; static struct pipe_resource *noop_resource_create(struct pipe_screen *screen, - const struct pipe_resource *templ) + const struct pipe_resource *templ) { - struct noop_resource *nresource; - unsigned stride; + struct noop_resource *nresource; + unsigned stride; - nresource = CALLOC_STRUCT(noop_resource); - if (!nresource) - return NULL; - - stride = util_format_get_stride(templ->format, templ->width0); - nresource->base = *templ; - nresource->base.screen = screen; - nresource->size = stride * templ->height0 * templ->depth0; - nresource->data = MALLOC(nresource->size); - pipe_reference_init(&nresource->base.reference, 1); - if (nresource->data == NULL) { - FREE(nresource); - return NULL; - } - return &nresource->base; + nresource = CALLOC_STRUCT(noop_resource); + if (!nresource) + return NULL; + + stride = util_format_get_stride(templ->format, templ->width0); + nresource->base = *templ; + nresource->base.screen = screen; + nresource->size = stride * templ->height0 * templ->depth0; + nresource->data = MALLOC(nresource->size); + pipe_reference_init(&nresource->base.reference, 1); + if (nresource->data == NULL) { + FREE(nresource); + return NULL; + } + return &nresource->base; } static struct pipe_resource *noop_resource_from_handle(struct pipe_screen *screen, - const struct pipe_resource *templ, - struct winsys_handle *handle, + const struct pipe_resource *templ, + struct winsys_handle *handle, unsigned usage) { - struct noop_pipe_screen *noop_screen = (struct noop_pipe_screen*)screen; - struct pipe_screen *oscreen = noop_screen->oscreen; - struct pipe_resource *result; - struct pipe_resource *noop_resource; - - result = oscreen->resource_from_handle(oscreen, templ, handle, usage); - noop_resource = noop_resource_create(screen, result); - pipe_resource_reference(&result, NULL); - return noop_resource; + struct noop_pipe_screen *noop_screen = (struct noop_pipe_screen*)screen; + struct pipe_screen *oscreen = noop_screen->oscreen; + struct pipe_resource *result; + struct pipe_resource *noop_resource; + + result = oscreen->resource_from_handle(oscreen, templ, handle, usage); + noop_resource = noop_resource_create(screen, result); + pipe_resource_reference(&result, NULL); + return noop_resource; } -static boolean noop_resource_get_handle(struct pipe_screen *screen, - struct pipe_resource *resource, - struct winsys_handle *handle, +static boolean noop_resource_get_handle(struct pipe_screen *pscreen, + struct pipe_context *ctx, + struct pipe_resource *resource, + struct winsys_handle *handle, unsigned usage) { - return FALSE; + struct noop_pipe_screen *noop_screen = (struct noop_pipe_screen*)pscreen; + struct pipe_screen *screen = noop_screen->oscreen; + struct pipe_resource *tex; + bool result; + + /* resource_get_handle musn't fail. Just create something and return it. */ + tex = screen->resource_create(screen, resource); + if (!tex) + return false; + + result = screen->resource_get_handle(screen, NULL, tex, handle, usage); + pipe_resource_reference(&tex, NULL); + return result; } static void noop_resource_destroy(struct pipe_screen *screen, - struct pipe_resource *resource) + struct pipe_resource *resource) { - struct noop_resource *nresource = (struct noop_resource *)resource; + struct noop_resource *nresource = (struct noop_resource *)resource; - FREE(nresource->data); - FREE(resource); + FREE(nresource->data); + FREE(resource); } @@ -167,7 +180,7 @@ transfer = CALLOC_STRUCT(pipe_transfer); if (!transfer) - return NULL; + return NULL; pipe_resource_reference(&transfer->resource, resource); transfer->level = level; transfer->usage = usage; @@ -180,26 +193,33 @@ } static void noop_transfer_flush_region(struct pipe_context *pipe, - struct pipe_transfer *transfer, - const struct pipe_box *box) + struct pipe_transfer *transfer, + const struct pipe_box *box) { } static void noop_transfer_unmap(struct pipe_context *pipe, - struct pipe_transfer *transfer) + struct pipe_transfer *transfer) { pipe_resource_reference(&transfer->resource, NULL); FREE(transfer); } -static void noop_transfer_inline_write(struct pipe_context *pipe, - struct pipe_resource *resource, - unsigned level, - unsigned usage, - const struct pipe_box *box, - const void *data, - unsigned stride, - unsigned layer_stride) +static void noop_buffer_subdata(struct pipe_context *pipe, + struct pipe_resource *resource, + unsigned usage, unsigned offset, + unsigned size, const void *data) +{ +} + +static void noop_texture_subdata(struct pipe_context *pipe, + struct pipe_resource *resource, + unsigned level, + unsigned usage, + const struct pipe_box *box, + const void *data, + unsigned stride, + unsigned layer_stride) { } @@ -208,35 +228,37 @@ * clear/copy */ static void noop_clear(struct pipe_context *ctx, unsigned buffers, - const union pipe_color_union *color, double depth, unsigned stencil) + const union pipe_color_union *color, double depth, unsigned stencil) { } static void noop_clear_render_target(struct pipe_context *ctx, - struct pipe_surface *dst, - const union pipe_color_union *color, - unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + struct pipe_surface *dst, + const union pipe_color_union *color, + unsigned dstx, unsigned dsty, + unsigned width, unsigned height, + bool render_condition_enabled) { } static void noop_clear_depth_stencil(struct pipe_context *ctx, - struct pipe_surface *dst, - unsigned clear_flags, - double depth, - unsigned stencil, - unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + struct pipe_surface *dst, + unsigned clear_flags, + double depth, + unsigned stencil, + unsigned dstx, unsigned dsty, + unsigned width, unsigned height, + bool render_condition_enabled) { } static void noop_resource_copy_region(struct pipe_context *ctx, - struct pipe_resource *dst, - unsigned dst_level, - unsigned dstx, unsigned dsty, unsigned dstz, - struct pipe_resource *src, - unsigned src_level, - const struct pipe_box *src_box) + struct pipe_resource *dst, + unsigned dst_level, + unsigned dstx, unsigned dsty, unsigned dstz, + struct pipe_resource *src, + unsigned src_level, + const struct pipe_box *src_box) { } @@ -261,43 +283,58 @@ struct pipe_fence_handle **fence, unsigned flags) { + if (fence) + *fence = NULL; } static void noop_destroy_context(struct pipe_context *ctx) { - FREE(ctx); + FREE(ctx); +} + +static boolean noop_generate_mipmap(struct pipe_context *ctx, + struct pipe_resource *resource, + enum pipe_format format, + unsigned base_level, + unsigned last_level, + unsigned first_layer, + unsigned last_layer) +{ + return true; } static struct pipe_context *noop_create_context(struct pipe_screen *screen, void *priv, unsigned flags) { - struct pipe_context *ctx = CALLOC_STRUCT(pipe_context); + struct pipe_context *ctx = CALLOC_STRUCT(pipe_context); - if (!ctx) - return NULL; - ctx->screen = screen; - ctx->priv = priv; - ctx->destroy = noop_destroy_context; - ctx->flush = noop_flush; - ctx->clear = noop_clear; - ctx->clear_render_target = noop_clear_render_target; - ctx->clear_depth_stencil = noop_clear_depth_stencil; - ctx->resource_copy_region = noop_resource_copy_region; - ctx->blit = noop_blit; - ctx->flush_resource = noop_flush_resource; - ctx->create_query = noop_create_query; - ctx->destroy_query = noop_destroy_query; - ctx->begin_query = noop_begin_query; - ctx->end_query = noop_end_query; - ctx->get_query_result = noop_get_query_result; - ctx->set_active_query_state = noop_set_active_query_state; - ctx->transfer_map = noop_transfer_map; - ctx->transfer_flush_region = noop_transfer_flush_region; - ctx->transfer_unmap = noop_transfer_unmap; - ctx->transfer_inline_write = noop_transfer_inline_write; - noop_init_state_functions(ctx); + if (!ctx) + return NULL; + ctx->screen = screen; + ctx->priv = priv; + ctx->destroy = noop_destroy_context; + ctx->flush = noop_flush; + ctx->clear = noop_clear; + ctx->clear_render_target = noop_clear_render_target; + ctx->clear_depth_stencil = noop_clear_depth_stencil; + ctx->resource_copy_region = noop_resource_copy_region; + ctx->generate_mipmap = noop_generate_mipmap; + ctx->blit = noop_blit; + ctx->flush_resource = noop_flush_resource; + ctx->create_query = noop_create_query; + ctx->destroy_query = noop_destroy_query; + ctx->begin_query = noop_begin_query; + ctx->end_query = noop_end_query; + ctx->get_query_result = noop_get_query_result; + ctx->set_active_query_state = noop_set_active_query_state; + ctx->transfer_map = noop_transfer_map; + ctx->transfer_flush_region = noop_transfer_flush_region; + ctx->transfer_unmap = noop_transfer_unmap; + ctx->buffer_subdata = noop_buffer_subdata; + ctx->texture_subdata = noop_texture_subdata; + noop_init_state_functions(ctx); - return ctx; + return ctx; } @@ -305,105 +342,142 @@ * pipe_screen */ static void noop_flush_frontbuffer(struct pipe_screen *_screen, - struct pipe_resource *resource, - unsigned level, unsigned layer, - void *context_private, struct pipe_box *box) + struct pipe_resource *resource, + unsigned level, unsigned layer, + void *context_private, struct pipe_box *box) { } static const char *noop_get_vendor(struct pipe_screen* pscreen) { - return "X.Org"; + return "X.Org"; } static const char *noop_get_device_vendor(struct pipe_screen* pscreen) { - return "NONE"; + return "NONE"; } static const char *noop_get_name(struct pipe_screen* pscreen) { - return "NOOP"; + return "NOOP"; } static int noop_get_param(struct pipe_screen* pscreen, enum pipe_cap param) { - struct pipe_screen *screen = ((struct noop_pipe_screen*)pscreen)->oscreen; + struct pipe_screen *screen = ((struct noop_pipe_screen*)pscreen)->oscreen; - return screen->get_param(screen, param); + return screen->get_param(screen, param); } static float noop_get_paramf(struct pipe_screen* pscreen, - enum pipe_capf param) + enum pipe_capf param) { - struct pipe_screen *screen = ((struct noop_pipe_screen*)pscreen)->oscreen; + struct pipe_screen *screen = ((struct noop_pipe_screen*)pscreen)->oscreen; - return screen->get_paramf(screen, param); + return screen->get_paramf(screen, param); } static int noop_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enum pipe_shader_cap param) { - struct pipe_screen *screen = ((struct noop_pipe_screen*)pscreen)->oscreen; + struct pipe_screen *screen = ((struct noop_pipe_screen*)pscreen)->oscreen; + + return screen->get_shader_param(screen, shader, param); +} + +static int noop_get_compute_param(struct pipe_screen *pscreen, + enum pipe_shader_ir ir_type, + enum pipe_compute_cap param, + void *ret) +{ + struct pipe_screen *screen = ((struct noop_pipe_screen*)pscreen)->oscreen; - return screen->get_shader_param(screen, shader, param); + return screen->get_compute_param(screen, ir_type, param, ret); } static boolean noop_is_format_supported(struct pipe_screen* pscreen, - enum pipe_format format, - enum pipe_texture_target target, - unsigned sample_count, + enum pipe_format format, + enum pipe_texture_target target, + unsigned sample_count, unsigned usage) { - struct pipe_screen *screen = ((struct noop_pipe_screen*)pscreen)->oscreen; + struct pipe_screen *screen = ((struct noop_pipe_screen*)pscreen)->oscreen; - return screen->is_format_supported(screen, format, target, sample_count, usage); + return screen->is_format_supported(screen, format, target, sample_count, usage); } static uint64_t noop_get_timestamp(struct pipe_screen *pscreen) { - return 0; + return 0; } static void noop_destroy_screen(struct pipe_screen *screen) { - struct noop_pipe_screen *noop_screen = (struct noop_pipe_screen*)screen; - struct pipe_screen *oscreen = noop_screen->oscreen; + struct noop_pipe_screen *noop_screen = (struct noop_pipe_screen*)screen; + struct pipe_screen *oscreen = noop_screen->oscreen; + + oscreen->destroy(oscreen); + FREE(screen); +} + +static void noop_fence_reference(struct pipe_screen *screen, + struct pipe_fence_handle **ptr, + struct pipe_fence_handle *fence) +{ +} + +static boolean noop_fence_finish(struct pipe_screen *screen, + struct pipe_context *ctx, + struct pipe_fence_handle *fence, + uint64_t timeout) +{ + return true; +} + +static void noop_query_memory_info(struct pipe_screen *pscreen, + struct pipe_memory_info *info) +{ + struct noop_pipe_screen *noop_screen = (struct noop_pipe_screen*)pscreen; + struct pipe_screen *screen = noop_screen->oscreen; - oscreen->destroy(oscreen); - FREE(screen); + screen->query_memory_info(screen, info); } struct pipe_screen *noop_screen_create(struct pipe_screen *oscreen) { - struct noop_pipe_screen *noop_screen; - struct pipe_screen *screen; + struct noop_pipe_screen *noop_screen; + struct pipe_screen *screen; - if (!debug_get_option_noop()) { - return oscreen; - } - - noop_screen = CALLOC_STRUCT(noop_pipe_screen); - if (!noop_screen) { - return NULL; - } - noop_screen->oscreen = oscreen; - screen = &noop_screen->pscreen; - - screen->destroy = noop_destroy_screen; - screen->get_name = noop_get_name; - screen->get_vendor = noop_get_vendor; - screen->get_device_vendor = noop_get_device_vendor; - screen->get_param = noop_get_param; - screen->get_shader_param = noop_get_shader_param; - screen->get_paramf = noop_get_paramf; - screen->is_format_supported = noop_is_format_supported; - screen->context_create = noop_create_context; - screen->resource_create = noop_resource_create; - screen->resource_from_handle = noop_resource_from_handle; - screen->resource_get_handle = noop_resource_get_handle; - screen->resource_destroy = noop_resource_destroy; - screen->flush_frontbuffer = noop_flush_frontbuffer; - screen->get_timestamp = noop_get_timestamp; + if (!debug_get_option_noop()) { + return oscreen; + } + + noop_screen = CALLOC_STRUCT(noop_pipe_screen); + if (!noop_screen) { + return NULL; + } + noop_screen->oscreen = oscreen; + screen = &noop_screen->pscreen; + + screen->destroy = noop_destroy_screen; + screen->get_name = noop_get_name; + screen->get_vendor = noop_get_vendor; + screen->get_device_vendor = noop_get_device_vendor; + screen->get_param = noop_get_param; + screen->get_shader_param = noop_get_shader_param; + screen->get_compute_param = noop_get_compute_param; + screen->get_paramf = noop_get_paramf; + screen->is_format_supported = noop_is_format_supported; + screen->context_create = noop_create_context; + screen->resource_create = noop_resource_create; + screen->resource_from_handle = noop_resource_from_handle; + screen->resource_get_handle = noop_resource_get_handle; + screen->resource_destroy = noop_resource_destroy; + screen->flush_frontbuffer = noop_flush_frontbuffer; + screen->get_timestamp = noop_get_timestamp; + screen->fence_reference = noop_fence_reference; + screen->fence_finish = noop_fence_finish; + screen->query_memory_info = noop_query_memory_info; - return screen; + return screen; } diff -Nru mesa-12.0.6/src/gallium/drivers/noop/noop_state.c mesa-17.0.7/src/gallium/drivers/noop/noop_state.c --- mesa-12.0.6/src/gallium/drivers/noop/noop_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/noop/noop_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -34,115 +34,98 @@ { } +static void noop_launch_grid(struct pipe_context *ctx, + const struct pipe_grid_info *info) +{ +} + static void noop_set_blend_color(struct pipe_context *ctx, - const struct pipe_blend_color *state) + const struct pipe_blend_color *state) { } static void *noop_create_blend_state(struct pipe_context *ctx, - const struct pipe_blend_state *state) + const struct pipe_blend_state *state) { - struct pipe_blend_state *nstate = CALLOC_STRUCT(pipe_blend_state); - - if (!nstate) { - return NULL; - } - *nstate = *state; - return nstate; + return MALLOC(1); } static void *noop_create_dsa_state(struct pipe_context *ctx, - const struct pipe_depth_stencil_alpha_state *state) + const struct pipe_depth_stencil_alpha_state *state) { - struct pipe_depth_stencil_alpha_state *nstate = CALLOC_STRUCT(pipe_depth_stencil_alpha_state); - - if (!nstate) { - return NULL; - } - *nstate = *state; - return nstate; + return MALLOC(1); } static void *noop_create_rs_state(struct pipe_context *ctx, - const struct pipe_rasterizer_state *state) + const struct pipe_rasterizer_state *state) { - struct pipe_rasterizer_state *nstate = CALLOC_STRUCT(pipe_rasterizer_state); - - if (!nstate) { - return NULL; - } - *nstate = *state; - return nstate; + return MALLOC(1); } static void *noop_create_sampler_state(struct pipe_context *ctx, - const struct pipe_sampler_state *state) + const struct pipe_sampler_state *state) { - struct pipe_sampler_state *nstate = CALLOC_STRUCT(pipe_sampler_state); - - if (!nstate) { - return NULL; - } - *nstate = *state; - return nstate; + return MALLOC(1); } static struct pipe_sampler_view *noop_create_sampler_view(struct pipe_context *ctx, - struct pipe_resource *texture, - const struct pipe_sampler_view *state) + struct pipe_resource *texture, + const struct pipe_sampler_view *state) { - struct pipe_sampler_view *sampler_view = CALLOC_STRUCT(pipe_sampler_view); + struct pipe_sampler_view *sampler_view = CALLOC_STRUCT(pipe_sampler_view); - if (!sampler_view) - return NULL; - /* initialize base object */ - pipe_resource_reference(&sampler_view->texture, texture); - pipe_reference_init(&sampler_view->reference, 1); - sampler_view->context = ctx; - return sampler_view; + if (!sampler_view) + return NULL; + /* initialize base object */ + pipe_resource_reference(&sampler_view->texture, texture); + pipe_reference_init(&sampler_view->reference, 1); + sampler_view->context = ctx; + return sampler_view; } static struct pipe_surface *noop_create_surface(struct pipe_context *ctx, - struct pipe_resource *texture, - const struct pipe_surface *surf_tmpl) + struct pipe_resource *texture, + const struct pipe_surface *surf_tmpl) { - struct pipe_surface *surface = CALLOC_STRUCT(pipe_surface); + struct pipe_surface *surface = CALLOC_STRUCT(pipe_surface); - if (!surface) - return NULL; - pipe_reference_init(&surface->reference, 1); - pipe_resource_reference(&surface->texture, texture); - surface->context = ctx; - surface->format = surf_tmpl->format; - surface->width = texture->width0; - surface->height = texture->height0; - surface->texture = texture; - surface->u.tex.first_layer = surf_tmpl->u.tex.first_layer; - surface->u.tex.last_layer = surf_tmpl->u.tex.last_layer; - surface->u.tex.level = surf_tmpl->u.tex.level; + if (!surface) + return NULL; + pipe_reference_init(&surface->reference, 1); + pipe_resource_reference(&surface->texture, texture); + surface->context = ctx; + surface->format = surf_tmpl->format; + surface->width = texture->width0; + surface->height = texture->height0; + surface->texture = texture; + surface->u.tex.first_layer = surf_tmpl->u.tex.first_layer; + surface->u.tex.last_layer = surf_tmpl->u.tex.last_layer; + surface->u.tex.level = surf_tmpl->u.tex.level; - return surface; + return surface; } -static void noop_set_sampler_views(struct pipe_context *ctx, unsigned shader, +static void noop_set_sampler_views(struct pipe_context *ctx, + enum pipe_shader_type shader, unsigned start, unsigned count, struct pipe_sampler_view **views) { } -static void noop_bind_sampler_states(struct pipe_context *ctx, unsigned shader, +static void noop_bind_sampler_states(struct pipe_context *ctx, + enum pipe_shader_type shader, unsigned start, unsigned count, void **states) { } static void noop_set_clip_state(struct pipe_context *ctx, - const struct pipe_clip_state *state) + const struct pipe_clip_state *state) { } static void noop_set_polygon_stipple(struct pipe_context *ctx, - const struct pipe_poly_stipple *state) + const struct pipe_poly_stipple *state) { } @@ -158,7 +141,7 @@ } static void noop_set_stencil_ref(struct pipe_context *ctx, - const struct pipe_stencil_ref *state) + const struct pipe_stencil_ref *state) { } @@ -170,30 +153,30 @@ } static void noop_set_framebuffer_state(struct pipe_context *ctx, - const struct pipe_framebuffer_state *state) + const struct pipe_framebuffer_state *state) { } static void noop_set_constant_buffer(struct pipe_context *ctx, - uint shader, uint index, - struct pipe_constant_buffer *cb) + uint shader, uint index, + const struct pipe_constant_buffer *cb) { } static void noop_sampler_view_destroy(struct pipe_context *ctx, - struct pipe_sampler_view *state) + struct pipe_sampler_view *state) { - pipe_resource_reference(&state->texture, NULL); - FREE(state); + pipe_resource_reference(&state->texture, NULL); + FREE(state); } static void noop_surface_destroy(struct pipe_context *ctx, - struct pipe_surface *surface) + struct pipe_surface *surface) { - pipe_resource_reference(&surface->texture, NULL); - FREE(surface); + pipe_resource_reference(&surface->texture, NULL); + FREE(surface); } static void noop_bind_state(struct pipe_context *ctx, void *state) @@ -202,49 +185,37 @@ static void noop_delete_state(struct pipe_context *ctx, void *state) { - FREE(state); -} - -static void noop_delete_vertex_element(struct pipe_context *ctx, void *state) -{ - FREE(state); + FREE(state); } - static void noop_set_index_buffer(struct pipe_context *ctx, - const struct pipe_index_buffer *ib) + const struct pipe_index_buffer *ib) { } static void noop_set_vertex_buffers(struct pipe_context *ctx, - unsigned start_slot, unsigned count, - const struct pipe_vertex_buffer *buffers) + unsigned start_slot, unsigned count, + const struct pipe_vertex_buffer *buffers) { } static void *noop_create_vertex_elements(struct pipe_context *ctx, - unsigned count, - const struct pipe_vertex_element *state) + unsigned count, + const struct pipe_vertex_element *state) { - struct pipe_vertex_element *nstate = CALLOC_STRUCT(pipe_vertex_element); - - if (!nstate) { - return NULL; - } - *nstate = *state; - return nstate; + return MALLOC(1); } static void *noop_create_shader_state(struct pipe_context *ctx, - const struct pipe_shader_state *state) + const struct pipe_shader_state *state) { - struct pipe_shader_state *nstate = CALLOC_STRUCT(pipe_shader_state); + return MALLOC(1); +} - if (!nstate) { - return NULL; - } - *nstate = *state; - return nstate; +static void *noop_create_compute_state(struct pipe_context *ctx, + const struct pipe_compute_state *state) +{ + return MALLOC(1); } static struct pipe_stream_output_target *noop_create_stream_output_target( @@ -265,16 +236,16 @@ } static void noop_stream_output_target_destroy(struct pipe_context *ctx, - struct pipe_stream_output_target *t) + struct pipe_stream_output_target *t) { pipe_resource_reference(&t->buffer, NULL); FREE(t); } static void noop_set_stream_output_targets(struct pipe_context *ctx, - unsigned num_targets, - struct pipe_stream_output_target **targets, - const unsigned *offsets) + unsigned num_targets, + struct pipe_stream_output_target **targets, + const unsigned *offsets) { } @@ -282,45 +253,58 @@ void noop_init_state_functions(struct pipe_context *ctx) { - ctx->create_blend_state = noop_create_blend_state; - ctx->create_depth_stencil_alpha_state = noop_create_dsa_state; - ctx->create_fs_state = noop_create_shader_state; - ctx->create_rasterizer_state = noop_create_rs_state; - ctx->create_sampler_state = noop_create_sampler_state; - ctx->create_sampler_view = noop_create_sampler_view; - ctx->create_surface = noop_create_surface; - ctx->create_vertex_elements_state = noop_create_vertex_elements; - ctx->create_vs_state = noop_create_shader_state; - ctx->bind_blend_state = noop_bind_state; - ctx->bind_depth_stencil_alpha_state = noop_bind_state; - ctx->bind_sampler_states = noop_bind_sampler_states; - ctx->bind_fs_state = noop_bind_state; - ctx->bind_rasterizer_state = noop_bind_state; - ctx->bind_vertex_elements_state = noop_bind_state; - ctx->bind_vs_state = noop_bind_state; - ctx->delete_blend_state = noop_delete_state; - ctx->delete_depth_stencil_alpha_state = noop_delete_state; - ctx->delete_fs_state = noop_delete_state; - ctx->delete_rasterizer_state = noop_delete_state; - ctx->delete_sampler_state = noop_delete_state; - ctx->delete_vertex_elements_state = noop_delete_vertex_element; - ctx->delete_vs_state = noop_delete_state; - ctx->set_blend_color = noop_set_blend_color; - ctx->set_clip_state = noop_set_clip_state; - ctx->set_constant_buffer = noop_set_constant_buffer; - ctx->set_sampler_views = noop_set_sampler_views; - ctx->set_framebuffer_state = noop_set_framebuffer_state; - ctx->set_polygon_stipple = noop_set_polygon_stipple; - ctx->set_sample_mask = noop_set_sample_mask; - ctx->set_scissor_states = noop_set_scissor_states; - ctx->set_stencil_ref = noop_set_stencil_ref; - ctx->set_vertex_buffers = noop_set_vertex_buffers; - ctx->set_index_buffer = noop_set_index_buffer; - ctx->set_viewport_states = noop_set_viewport_states; - ctx->sampler_view_destroy = noop_sampler_view_destroy; - ctx->surface_destroy = noop_surface_destroy; - ctx->draw_vbo = noop_draw_vbo; - ctx->create_stream_output_target = noop_create_stream_output_target; - ctx->stream_output_target_destroy = noop_stream_output_target_destroy; - ctx->set_stream_output_targets = noop_set_stream_output_targets; + ctx->create_blend_state = noop_create_blend_state; + ctx->create_depth_stencil_alpha_state = noop_create_dsa_state; + ctx->create_fs_state = noop_create_shader_state; + ctx->create_rasterizer_state = noop_create_rs_state; + ctx->create_sampler_state = noop_create_sampler_state; + ctx->create_sampler_view = noop_create_sampler_view; + ctx->create_surface = noop_create_surface; + ctx->create_vertex_elements_state = noop_create_vertex_elements; + ctx->create_compute_state = noop_create_compute_state; + ctx->create_tcs_state = noop_create_shader_state; + ctx->create_tes_state = noop_create_shader_state; + ctx->create_gs_state = noop_create_shader_state; + ctx->create_vs_state = noop_create_shader_state; + ctx->bind_blend_state = noop_bind_state; + ctx->bind_depth_stencil_alpha_state = noop_bind_state; + ctx->bind_sampler_states = noop_bind_sampler_states; + ctx->bind_fs_state = noop_bind_state; + ctx->bind_rasterizer_state = noop_bind_state; + ctx->bind_vertex_elements_state = noop_bind_state; + ctx->bind_compute_state = noop_bind_state; + ctx->bind_tcs_state = noop_bind_state; + ctx->bind_tes_state = noop_bind_state; + ctx->bind_gs_state = noop_bind_state; + ctx->bind_vs_state = noop_bind_state; + ctx->delete_blend_state = noop_delete_state; + ctx->delete_depth_stencil_alpha_state = noop_delete_state; + ctx->delete_fs_state = noop_delete_state; + ctx->delete_rasterizer_state = noop_delete_state; + ctx->delete_sampler_state = noop_delete_state; + ctx->delete_vertex_elements_state = noop_delete_state; + ctx->delete_compute_state = noop_delete_state; + ctx->delete_tcs_state = noop_delete_state; + ctx->delete_tes_state = noop_delete_state; + ctx->delete_gs_state = noop_delete_state; + ctx->delete_vs_state = noop_delete_state; + ctx->set_blend_color = noop_set_blend_color; + ctx->set_clip_state = noop_set_clip_state; + ctx->set_constant_buffer = noop_set_constant_buffer; + ctx->set_sampler_views = noop_set_sampler_views; + ctx->set_framebuffer_state = noop_set_framebuffer_state; + ctx->set_polygon_stipple = noop_set_polygon_stipple; + ctx->set_sample_mask = noop_set_sample_mask; + ctx->set_scissor_states = noop_set_scissor_states; + ctx->set_stencil_ref = noop_set_stencil_ref; + ctx->set_vertex_buffers = noop_set_vertex_buffers; + ctx->set_index_buffer = noop_set_index_buffer; + ctx->set_viewport_states = noop_set_viewport_states; + ctx->sampler_view_destroy = noop_sampler_view_destroy; + ctx->surface_destroy = noop_surface_destroy; + ctx->draw_vbo = noop_draw_vbo; + ctx->launch_grid = noop_launch_grid; + ctx->create_stream_output_target = noop_create_stream_output_target; + ctx->stream_output_target_destroy = noop_stream_output_target_destroy; + ctx->set_stream_output_targets = noop_set_stream_output_targets; } diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/codegen/lib/gm107.asm mesa-17.0.7/src/gallium/drivers/nouveau/codegen/lib/gm107.asm --- mesa-12.0.6/src/gallium/drivers/nouveau/codegen/lib/gm107.asm 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/codegen/lib/gm107.asm 2017-06-01 10:37:10.000000000 +0000 @@ -11,39 +11,39 @@ // SIZE: 22 / 14 * 8 bytes // gm107_div_u32: - sched 0x7e0 0x7e0 0x7e0 + sched (st 0xd wr 0x0 wt 0x3f) (st 0x1 wt 0x1) (st 0x6) flo u32 $r2 $r1 lop xor 1 $r2 $r2 0x1f mov $r3 0x1 0xf - sched 0x7e0 0x7e0 0x7e0 + sched (st 0x1) (st 0xf wr 0x0) (st 0x6 wr 0x0 wt 0x1) shl $r2 $r3 $r2 i2i u32 u32 $r1 neg $r1 imul u32 u32 $r3 $r1 $r2 - sched 0x7e0 0x7e0 0x7e0 + sched (st 0x6 wr 0x0 wt 0x1) (st 0x6 wr 0x0 wt 0x1) (st 0x6 wr 0x0 wt 0x1) imad u32 u32 hi $r2 $r2 $r3 $r2 imul u32 u32 $r3 $r1 $r2 imad u32 u32 hi $r2 $r2 $r3 $r2 - sched 0x7e0 0x7e0 0x7e0 + sched (st 0x6 wr 0x0 wt 0x1) (st 0x6 wr 0x0 wt 0x1) (st 0x6 wr 0x0 wt 0x1) imul u32 u32 $r3 $r1 $r2 imad u32 u32 hi $r2 $r2 $r3 $r2 imul u32 u32 $r3 $r1 $r2 - sched 0x7e0 0x7e0 0x7e0 + sched (st 0x6 wr 0x0 wt 0x1) (st 0x6 wr 0x0 wt 0x1) (st 0x6 wr 0x0 wt 0x1) imad u32 u32 hi $r2 $r2 $r3 $r2 imul u32 u32 $r3 $r1 $r2 imad u32 u32 hi $r2 $r2 $r3 $r2 - sched 0x7e0 0x7e0 0x7e0 + sched (st 0x6) (st 0x6 wr 0x0 rd 0x1 wt 0x1) (st 0xf wr 0x0 rd 0x1 wt 0x2) mov $r3 $r0 0xf imul u32 u32 hi $r0 $r0 $r2 i2i u32 u32 $r2 neg $r1 - sched 0x7e0 0x7e0 0x7e0 + sched (st 0x6 wr 0x0 wt 0x3) (st 0xd wt 0x1) (st 0x1) imad u32 u32 $r1 $r1 $r0 $r3 isetp ge u32 and $p0 1 $r1 $r2 1 $p0 iadd $r1 $r1 neg $r2 - sched 0x7e0 0x7e0 0x7e0 + sched (st 0x5) (st 0xd) (st 0x1) $p0 iadd $r0 $r0 0x1 $p0 isetp ge u32 and $p0 1 $r1 $r2 1 $p0 iadd $r1 $r1 neg $r2 - sched 0x7e0 0x7e0 0x7e0 + sched (st 0x1) (st 0xf) (st 0xf) $p0 iadd $r0 $r0 0x1 ret nop 0 @@ -55,47 +55,47 @@ // CLOBBER: $r2 - $r3, $p0 - $p3 // gm107_div_s32: - sched 0x7e0 0x7e0 0x7e0 + sched (st 0xd wt 0x3f) (st 0x1) (st 0x1 wr 0x0) isetp lt and $p2 0x1 $r0 0 1 isetp lt xor $p3 1 $r1 0 $p2 i2i s32 s32 $r0 abs $r0 - sched 0x7e0 0x7e0 0x7e0 + sched (st 0xf wr 0x1) (st 0xd wr 0x1 wt 0x2) (st 0x1 wt 0x2) i2i s32 s32 $r1 abs $r1 flo u32 $r2 $r1 lop xor 1 $r2 $r2 0x1f - sched 0x7e0 0x7e0 0x7e0 + sched (st 0x6) (st 0x1) (st 0xf wr 0x1) mov $r3 0x1 0xf shl $r2 $r3 $r2 i2i u32 u32 $r1 neg $r1 - sched 0x7e0 0x7e0 0x7e0 + sched (st 0x6 wr 0x1 wt 0x2) (st 0x6 wr 0x1 wt 0x2) (st 0x6 wr 0x1 wt 0x2) imul u32 u32 $r3 $r1 $r2 imad u32 u32 hi $r2 $r2 $r3 $r2 imul u32 u32 $r3 $r1 $r2 - sched 0x7e0 0x7e0 0x7e0 + sched (st 0x6 wr 0x1 wt 0x2) (st 0x6 wr 0x1 wt 0x2) (st 0x6 wr 0x1 wt 0x2) imad u32 u32 hi $r2 $r2 $r3 $r2 imul u32 u32 $r3 $r1 $r2 imad u32 u32 hi $r2 $r2 $r3 $r2 - sched 0x7e0 0x7e0 0x7e0 + sched (st 0x6 wr 0x1 wt 0x2) (st 0x6 wr 0x1 wt 0x2) (st 0x6 wr 0x1 wt 0x2) imul u32 u32 $r3 $r1 $r2 imad u32 u32 hi $r2 $r2 $r3 $r2 imul u32 u32 $r3 $r1 $r2 - sched 0x7e0 0x7e0 0x7e0 + sched (st 0x6 wr 0x1 rd 0x2 wt 0x2) (st 0x2 wt 0x5) (st 0x6 wr 0x0 rd 0x1 wt 0x2) imad u32 u32 hi $r2 $r2 $r3 $r2 mov $r3 $r0 0xf imul u32 u32 hi $r0 $r0 $r2 - sched 0x7e0 0x7e0 0x7e0 + sched (st 0xf wr 0x1 rd 0x2 wt 0x2) (st 0x6 wr 0x0 wt 0x5) (st 0xd wt 0x3) i2i u32 u32 $r2 neg $r1 imad u32 u32 $r1 $r1 $r0 $r3 isetp ge u32 and $p0 1 $r1 $r2 1 - sched 0x7e0 0x7e0 0x7e0 + sched (st 0x1) (st 0x5) (st 0xd) $p0 iadd $r1 $r1 neg $r2 $p0 iadd $r0 $r0 0x1 $p0 isetp ge u32 and $p0 1 $r1 $r2 1 - sched 0x7e0 0x7e0 0x7e0 + sched (st 0x1) (st 0x2) (st 0xf wr 0x0) $p0 iadd $r1 $r1 neg $r2 $p0 iadd $r0 $r0 0x1 $p3 i2i s32 s32 $r0 neg $r0 - sched 0x7e0 0x7e0 0x7e0 + sched (st 0xf wr 0x1) (st 0xf wt 0x3) (st 0xf) $p2 i2i s32 s32 $r1 neg $r1 ret nop 0 @@ -103,7 +103,7 @@ // STUB gm107_rcp_f64: gm107_rsq_f64: - sched 0x7e0 0x7e0 0x7e0 + sched (st 0x0) (st 0x0) (st 0x0) ret nop 0 nop 0 diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/codegen/lib/gm107.asm.h mesa-17.0.7/src/gallium/drivers/nouveau/codegen/lib/gm107.asm.h --- mesa-12.0.6/src/gallium/drivers/nouveau/codegen/lib/gm107.asm.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/codegen/lib/gm107.asm.h 2017-06-01 10:37:10.000000000 +0000 @@ -1,83 +1,83 @@ uint64_t gm107_builtin_code[] = { /* 0x0000: gm107_div_u32 */ - 0x001f8000fc0007e0, + 0x001f9801fc21ff0d, 0x5c30000000170002, 0x3847040001f70202, 0x3898078000170003, - 0x001f8000fc0007e0, + 0x003c1800e1e007e1, 0x5c48000000270302, 0x5ce0200000170a01, 0x5c38000000270103, - 0x001f8000fc0007e0, + 0x003c1801e0c00f06, 0x5a40010000370202, 0x5c38000000270103, 0x5a40010000370202, - 0x001f8000fc0007e0, + 0x003c1801e0c00f06, 0x5c38000000270103, 0x5a40010000370202, 0x5c38000000270103, - 0x001f8000fc0007e0, + 0x003c1801e0c00f06, 0x5a40010000370202, 0x5c38000000270103, 0x5a40010000370202, - 0x001f8000fc0007e0, + 0x00443c0120c007e6, 0x5c98078000070003, 0x5c38008000270000, 0x5ce0200000170a02, - 0x001f8000fc0007e0, + 0x001f8401fda01f06, 0x5a00018000070101, 0x5b6c038000270107, 0x5c11000000200101, - 0x001f8000fc0007e0, + 0x001f8400fda007e5, 0x3810000000100000, 0x5b6c038000200107, 0x5c11000000200101, - 0x001f8000fc0007e0, + 0x001fbc00fde007e1, 0x3810000000100000, 0xe32000000007000f, 0x50b0000000070f00, /* 0x0120: gm107_div_s32 */ - 0x001f8000fc0007e0, + 0x001c0400fc21ffed, 0x5b6303800ff70017, 0x5b6341000ff7011f, 0x5ce2000000073a00, - 0x001f8000fc0007e0, + 0x005f8402e5a0072f, 0x5ce2000000173a01, 0x5c30000000170002, 0x3847040001f70202, - 0x001f8000fc0007e0, + 0x001cbc00fc2007e6, 0x3898078000170003, 0x5c48000000270302, 0x5ce0200000170a01, - 0x001f8000fc0007e0, + 0x005c9802e4c01726, 0x5c38000000270103, 0x5a40010000370202, 0x5c38000000270103, - 0x001f8000fc0007e0, + 0x005c9802e4c01726, 0x5a40010000370202, 0x5c38000000270103, 0x5a40010000370202, - 0x001f8000fc0007e0, + 0x005c9802e4c01726, 0x5c38000000270103, 0x5a40010000370202, 0x5c38000000270103, - 0x001f8000fc0007e0, + 0x00441805fc401226, 0x5a40010000370202, 0x5c98078000070003, 0x5c38008000270000, - 0x001f8000fc0007e0, + 0x007fb405e0c0122f, 0x5ce0200000170a02, 0x5a00018000070101, 0x5b6c038000270107, - 0x001f8000fc0007e0, + 0x001fb400fca007e1, 0x5c11000000200101, 0x3810000000100000, 0x5b6c038000200107, - 0x001f8000fc0007e0, + 0x001c3c00fc4007e1, 0x5c11000000200101, 0x3810000000100000, 0x5ce0200000033a00, - 0x001f8000fc0007e0, + 0x001fbc03fde0072f, 0x5ce0200000123a01, 0xe32000000007000f, 0x50b0000000070f00, diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp --- mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -870,22 +870,22 @@ return false; } -static bool -insnCheckCommutationDefSrc(const Instruction *a, const Instruction *b) +bool +Instruction::canCommuteDefSrc(const Instruction *i) const { - for (int d = 0; a->defExists(d); ++d) - for (int s = 0; b->srcExists(s); ++s) - if (a->getDef(d)->interfers(b->getSrc(s))) + for (int d = 0; defExists(d); ++d) + for (int s = 0; i->srcExists(s); ++s) + if (getDef(d)->interfers(i->getSrc(s))) return false; return true; } -static bool -insnCheckCommutationDefDef(const Instruction *a, const Instruction *b) +bool +Instruction::canCommuteDefDef(const Instruction *i) const { - for (int d = 0; a->defExists(d); ++d) - for (int c = 0; b->defExists(c); ++c) - if (a->getDef(d)->interfers(b->getDef(c))) + for (int d = 0; defExists(d); ++d) + for (int c = 0; i->defExists(c); ++c) + if (getDef(d)->interfers(i->getDef(c))) return false; return true; } @@ -893,10 +893,9 @@ bool Instruction::isCommutationLegal(const Instruction *i) const { - bool ret = insnCheckCommutationDefDef(this, i); - ret = ret && insnCheckCommutationDefSrc(this, i); - ret = ret && insnCheckCommutationDefSrc(i, this); - return ret; + return canCommuteDefDef(i) && + canCommuteDefSrc(i) && + i->canCommuteDefSrc(this); } TexInstruction::TexInstruction(Function *fn, operation op) @@ -1012,6 +1011,8 @@ { "RG8_SNORM", 2, { 8, 8, 0, 0 }, SNORM }, { "R16_SNORM", 1, { 16, 0, 0, 0 }, SNORM }, { "R8_SNORM", 1, { 8, 0, 0, 0 }, SNORM }, + + { "BGRA8", 4, { 8, 8, 8, 8 }, UNORM, true }, }; void diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h --- mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h 2017-06-01 10:37:10.000000000 +0000 @@ -75,8 +75,6 @@ uint32_t offset; }; -#define NVISA_GF100_CHIPSET_C0 0xc0 -#define NVISA_GF100_CHIPSET_D0 0xd0 #define NVISA_GK104_CHIPSET 0xe0 #define NVISA_GK20A_CHIPSET 0xea #define NVISA_GM107_CHIPSET 0x110 @@ -148,6 +146,7 @@ bool usesDiscard; bool persampleInvocation; bool usesSampleMaskIn; + bool readsFramebuffer; } fp; struct { uint32_t inputOffset; /* base address for user args */ @@ -166,6 +165,7 @@ uint8_t auxCBSlot; /* driver constant buffer slot */ uint16_t ucpBase; /* base address for UCPs */ uint16_t drawInfoBase; /* base address for draw parameters */ + uint16_t alphaRefBase; /* base address for alpha test values */ uint8_t pointSize; /* output index for PointSize */ uint8_t instanceId; /* system value index of InstanceID */ uint8_t vertexId; /* system value index of VertexID */ @@ -179,6 +179,7 @@ bool fp64; /* program uses fp64 math */ bool nv50styleSurfaces; /* generate gX[] access for raw buffers */ uint16_t texBindBase; /* base address for tex handles (nve4) */ + uint16_t fbtexBindBase; /* base address for fbtex handle (nve4) */ uint16_t suInfoBase; /* base address for surface info (nve4) */ uint16_t bufInfoBase; /* base address for buffer info */ uint16_t sampleInfoBase; /* base address for sample positions */ @@ -206,7 +207,8 @@ extern void nv50_ir_apply_fixups(void *fixupData, uint32_t *code, - bool force_per_sample, bool flatshade); + bool force_per_sample, bool flatshade, + uint8_t alphatest); /* obtain code that will be shared among programs */ extern void nv50_ir_get_target_library(uint32_t chipset, diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp --- mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -96,6 +96,7 @@ void emitDMUL(const Instruction *); void emitIMAD(const Instruction *); void emitISAD(const Instruction *); + void emitSHLADD(const Instruction *); void emitFMAD(const Instruction *); void emitDMAD(const Instruction *); void emitMADSP(const Instruction *i); @@ -721,7 +722,6 @@ } } -// TODO: shl-add void CodeEmitterGK110::emitIMAD(const Instruction *i) { @@ -757,6 +757,54 @@ } void +CodeEmitterGK110::emitSHLADD(const Instruction *i) +{ + uint8_t addOp = (i->src(0).mod.neg() << 1) | i->src(2).mod.neg(); + const ImmediateValue *imm = i->src(1).get()->asImm(); + assert(imm); + + if (i->src(2).getFile() == FILE_IMMEDIATE) { + code[0] = 0x1; + code[1] = 0xc0c << 20; + } else { + code[0] = 0x2; + code[1] = 0x20c << 20; + } + code[1] |= addOp << 19; + + emitPredicate(i); + + defId(i->def(0), 2); + srcId(i->src(0), 10); + + if (i->flagsDef >= 0) + code[1] |= 1 << 18; + + assert(!(imm->reg.data.u32 & 0xffffffe0)); + code[1] |= imm->reg.data.u32 << 10; + + switch (i->src(2).getFile()) { + case FILE_GPR: + assert(code[0] & 0x2); + code[1] |= 0xc << 28; + srcId(i->src(2), 23); + break; + case FILE_MEMORY_CONST: + assert(code[0] & 0x2); + code[1] |= 0x4 << 28; + setCAddress14(i->src(2)); + break; + case FILE_IMMEDIATE: + assert(code[0] & 0x1); + setShortImmediate(i, 2); + break; + default: + assert(!"bad src2 file"); + break; + } +} + +void CodeEmitterGK110::emitNOT(const Instruction *i) { code[0] = 0x0003fc02; // logop(mov2) dst, 0, not src @@ -1478,16 +1526,31 @@ void CodeEmitterGK110::emitVOTE(const Instruction *i) { - assert(i->src(0).getFile() == FILE_PREDICATE && - i->def(1).getFile() == FILE_PREDICATE); + assert(i->src(0).getFile() == FILE_PREDICATE); code[0] = 0x00000002; code[1] = 0x86c00000 | (i->subOp << 19); emitPredicate(i); - defId(i->def(0), 2); - defId(i->def(1), 48); + unsigned rp = 0; + for (int d = 0; i->defExists(d); d++) { + if (i->def(d).getFile() == FILE_PREDICATE) { + assert(!(rp & 2)); + rp |= 2; + defId(i->def(d), 48); + } else if (i->def(d).getFile() == FILE_GPR) { + assert(!(rp & 1)); + rp |= 1; + defId(i->def(d), 2); + } else { + assert(!"Unhandled def"); + } + } + if (!(rp & 1)) + code[0] |= 255 << 2; + if (!(rp & 2)) + code[1] |= 7 << 16; if (i->src(0).mod == Modifier(NV50_IR_MOD_NOT)) code[1] |= 1 << 13; srcId(i->src(0), 42); @@ -2388,6 +2451,9 @@ case OP_SAD: emitISAD(insn); break; + case OP_SHLADD: + emitSHLADD(insn); + break; case OP_NOT: emitNOT(insn); break; diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp --- mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -24,6 +24,8 @@ #include "codegen/nv50_ir_target_gm107.h" +//#define GM107_DEBUG_SCHED_DATA + namespace nv50_ir { class CodeEmitterGM107 : public CodeEmitter @@ -152,6 +154,7 @@ void emitIADD(); void emitIMUL(); void emitIMAD(); + void emitISCADD(); void emitIMNMX(); void emitICMP(); void emitISET(); @@ -179,6 +182,7 @@ void emitIPA(); void emitATOM(); void emitATOMS(); + void emitRED(); void emitCCTL(); void emitPIXLD(); @@ -200,6 +204,12 @@ void emitMEMBAR(); void emitVOTE(); + + void emitSUTarget(); + void emitSUHandle(const int s); + void emitSUSTx(); + void emitSULDx(); + void emitSUREDx(); }; /******************************************************************************* @@ -1807,6 +1817,34 @@ } void +CodeEmitterGM107::emitISCADD() +{ + switch (insn->src(2).getFile()) { + case FILE_GPR: + emitInsn(0x5c180000); + emitGPR (0x14, insn->src(2)); + break; + case FILE_MEMORY_CONST: + emitInsn(0x4c180000); + emitCBUF(0x22, -1, 0x14, 16, 2, insn->src(2)); + break; + case FILE_IMMEDIATE: + emitInsn(0x38180000); + emitIMMD(0x14, 19, insn->src(2)); + break; + default: + assert(!"bad src1 file"); + break; + } + emitNEG (0x31, insn->src(0)); + emitNEG (0x30, insn->src(2)); + emitCC (0x2f); + emitIMMD(0x27, 5, insn->src(1)); + emitGPR (0x08, insn->src(0)); + emitGPR (0x00, insn->def(0)); +} + +void CodeEmitterGM107::emitIMNMX() { switch (insn->src(1).getFile()) { @@ -2456,11 +2494,34 @@ emitField(0x34, 4, subOp); emitGPR (0x14, insn->src(1)); - emitADDR (0x08, 0x12, 22, 0, insn->src(0)); + emitADDR (0x08, 0x1e, 22, 2, insn->src(0)); emitGPR (0x00, insn->def(0)); } void +CodeEmitterGM107::emitRED() +{ + unsigned dType; + + switch (insn->dType) { + case TYPE_U32: dType = 0; break; + case TYPE_S32: dType = 1; break; + case TYPE_U64: dType = 2; break; + case TYPE_F32: dType = 3; break; + case TYPE_B128: dType = 4; break; + case TYPE_S64: dType = 5; break; + default: assert(!"unexpected dType"); dType = 0; break; + } + + emitInsn (0xebf80000); + emitField(0x30, 1, insn->src(0).getIndirect(0)->getSize() == 8); + emitField(0x17, 3, insn->subOp); + emitField(0x14, 3, dType); + emitADDR (0x08, 0x1c, 20, 0, insn->src(0)); + emitGPR (0x00, insn->src(1)); +} + +void CodeEmitterGM107::emitCCTL() { unsigned width; @@ -2794,25 +2855,164 @@ void CodeEmitterGM107::emitVOTE() { - int subOp; + assert(insn->src(0).getFile() == FILE_PREDICATE); - assert(insn->src(0).getFile() == FILE_PREDICATE && - insn->def(1).getFile() == FILE_PREDICATE); + int r = -1, p = -1; + for (int i = 0; insn->defExists(i); i++) { + if (insn->def(i).getFile() == FILE_GPR) + r = i; + else if (insn->def(i).getFile() == FILE_PREDICATE) + p = i; + } - switch (insn->subOp) { - case NV50_IR_SUBOP_VOTE_ANY: subOp = 1; break; + emitInsn (0x50d80000); + emitField(0x30, 2, insn->subOp); + if (r >= 0) + emitGPR (0x00, insn->def(r)); + else + emitGPR (0x00); + if (p >= 0) + emitPRED (0x2d, insn->def(p)); + else + emitPRED (0x2d); + emitField(0x2a, 1, insn->src(0).mod == Modifier(NV50_IR_MOD_NOT)); + emitPRED (0x27, insn->src(0)); +} + +void +CodeEmitterGM107::emitSUTarget() +{ + const TexInstruction *insn = this->insn->asTex(); + int target = 0; + + assert(insn->op >= OP_SULDB && insn->op <= OP_SUREDP); + + if (insn->tex.target == TEX_TARGET_BUFFER) { + target = 2; + } else if (insn->tex.target == TEX_TARGET_1D_ARRAY) { + target = 4; + } else if (insn->tex.target == TEX_TARGET_2D || + insn->tex.target == TEX_TARGET_RECT) { + target = 6; + } else if (insn->tex.target == TEX_TARGET_2D_ARRAY || + insn->tex.target == TEX_TARGET_CUBE || + insn->tex.target == TEX_TARGET_CUBE_ARRAY) { + target = 8; + } else if (insn->tex.target == TEX_TARGET_3D) { + target = 10; + } else { + assert(insn->tex.target == TEX_TARGET_1D); + } + emitField(0x20, 4, target); +} + +void +CodeEmitterGM107::emitSUHandle(const int s) +{ + const TexInstruction *insn = this->insn->asTex(); + + assert(insn->op >= OP_SULDB && insn->op <= OP_SUREDP); + + if (insn->src(s).getFile() == FILE_GPR) { + emitGPR(0x27, insn->src(s)); + } else { + ImmediateValue *imm = insn->getSrc(s)->asImm(); + assert(imm); + emitField(0x33, 1, 1); + emitField(0x24, 13, imm->reg.data.u32); + } +} + +void +CodeEmitterGM107::emitSUSTx() +{ + const TexInstruction *insn = this->insn->asTex(); + + emitInsn(0xeb200000); + if (insn->op == OP_SUSTB) + emitField(0x34, 1, 1); + emitSUTarget(); + + emitLDSTc(0x18); + emitField(0x14, 4, 0xf); // rgba + emitGPR (0x08, insn->src(0)); + emitGPR (0x00, insn->src(1)); + + emitSUHandle(2); +} + +void +CodeEmitterGM107::emitSULDx() +{ + const TexInstruction *insn = this->insn->asTex(); + int type = 0; + + emitInsn(0xeb000000); + if (insn->op == OP_SULDB) + emitField(0x34, 1, 1); + emitSUTarget(); + + switch (insn->dType) { + case TYPE_S8: type = 1; break; + case TYPE_U16: type = 2; break; + case TYPE_S16: type = 3; break; + case TYPE_U32: type = 4; break; + case TYPE_U64: type = 5; break; + case TYPE_B128: type = 6; break; default: - assert(insn->subOp == NV50_IR_SUBOP_VOTE_ALL); - subOp = 0; + assert(insn->dType == TYPE_U8); break; } + emitLDSTc(0x18); + emitField(0x14, 3, type); + emitGPR (0x00, insn->def(0)); + emitGPR (0x08, insn->src(0)); - emitInsn (0x50d80000); - emitField(0x30, 2, subOp); + emitSUHandle(1); +} + +void +CodeEmitterGM107::emitSUREDx() +{ + const TexInstruction *insn = this->insn->asTex(); + uint8_t type = 0, subOp; + + if (insn->subOp == NV50_IR_SUBOP_ATOM_CAS) + emitInsn(0xeac00000); + else + emitInsn(0xea600000); + + if (insn->op == OP_SUREDB) + emitField(0x34, 1, 1); + emitSUTarget(); + + // destination type + switch (insn->dType) { + case TYPE_S32: type = 1; break; + case TYPE_U64: type = 2; break; + case TYPE_F32: type = 3; break; + case TYPE_S64: type = 5; break; + default: + assert(insn->dType == TYPE_U32); + break; + } + + // atomic operation + if (insn->subOp == NV50_IR_SUBOP_ATOM_CAS) { + subOp = 0; + } else if (insn->subOp == NV50_IR_SUBOP_ATOM_EXCH) { + subOp = 8; + } else { + subOp = insn->subOp; + } + + emitField(0x24, 3, type); + emitField(0x1d, 4, subOp); + emitGPR (0x14, insn->src(1)); + emitGPR (0x08, insn->src(0)); emitGPR (0x00, insn->def(0)); - emitPRED (0x2d, insn->def(1)); - emitField(0x2a, 1, insn->src(0).mod == Modifier(NV50_IR_MOD_NOT)); - emitPRED (0x27, insn->src(0)); + + emitSUHandle(2); } /******************************************************************************* @@ -2953,6 +3153,9 @@ emitIMAD(); } break; + case OP_SHLADD: + emitISCADD(); + break; case OP_MIN: case OP_MAX: if (isFloatType(insn->dType)) { @@ -3060,7 +3263,10 @@ if (insn->src(0).getFile() == FILE_MEMORY_SHARED) emitATOMS(); else - emitATOM(); + if (!insn->defExists(0) && insn->subOp < NV50_IR_SUBOP_ATOM_CAS) + emitRED(); + else + emitATOM(); break; case OP_CCTL: emitCCTL(); @@ -3129,6 +3335,18 @@ case OP_VOTE: emitVOTE(); break; + case OP_SUSTB: + case OP_SUSTP: + emitSUSTx(); + break; + case OP_SULDB: + case OP_SULDP: + emitSULDx(); + break; + case OP_SUREDB: + case OP_SUREDP: + emitSUREDx(); + break; default: assert(!"invalid opcode"); emitNOP(); @@ -3158,20 +3376,781 @@ class SchedDataCalculatorGM107 : public Pass { public: - SchedDataCalculatorGM107(const Target *targ) : targ(targ) {} + SchedDataCalculatorGM107(const TargetGM107 *targ) : targ(targ) {} + private: - const Target *targ; - bool visit(BasicBlock *bb); + struct RegScores + { + struct ScoreData { + int r[256]; + int p[8]; + int c; + } rd, wr; + int base; + + void rebase(const int base) + { + const int delta = this->base - base; + if (!delta) + return; + this->base = 0; + + for (int i = 0; i < 256; ++i) { + rd.r[i] += delta; + wr.r[i] += delta; + } + for (int i = 0; i < 8; ++i) { + rd.p[i] += delta; + wr.p[i] += delta; + } + rd.c += delta; + wr.c += delta; + } + void wipe() + { + memset(&rd, 0, sizeof(rd)); + memset(&wr, 0, sizeof(wr)); + } + int getLatest(const ScoreData& d) const + { + int max = 0; + for (int i = 0; i < 256; ++i) + if (d.r[i] > max) + max = d.r[i]; + for (int i = 0; i < 8; ++i) + if (d.p[i] > max) + max = d.p[i]; + if (d.c > max) + max = d.c; + return max; + } + inline int getLatestRd() const + { + return getLatest(rd); + } + inline int getLatestWr() const + { + return getLatest(wr); + } + inline int getLatest() const + { + return MAX2(getLatestRd(), getLatestWr()); + } + void setMax(const RegScores *that) + { + for (int i = 0; i < 256; ++i) { + rd.r[i] = MAX2(rd.r[i], that->rd.r[i]); + wr.r[i] = MAX2(wr.r[i], that->wr.r[i]); + } + for (int i = 0; i < 8; ++i) { + rd.p[i] = MAX2(rd.p[i], that->rd.p[i]); + wr.p[i] = MAX2(wr.p[i], that->wr.p[i]); + } + rd.c = MAX2(rd.c, that->rd.c); + wr.c = MAX2(wr.c, that->wr.c); + } + void print(int cycle) + { + for (int i = 0; i < 256; ++i) { + if (rd.r[i] > cycle) + INFO("rd $r%i @ %i\n", i, rd.r[i]); + if (wr.r[i] > cycle) + INFO("wr $r%i @ %i\n", i, wr.r[i]); + } + for (int i = 0; i < 8; ++i) { + if (rd.p[i] > cycle) + INFO("rd $p%i @ %i\n", i, rd.p[i]); + if (wr.p[i] > cycle) + INFO("wr $p%i @ %i\n", i, wr.p[i]); + } + if (rd.c > cycle) + INFO("rd $c @ %i\n", rd.c); + if (wr.c > cycle) + INFO("wr $c @ %i\n", wr.c); + } + }; + + RegScores *score; // for current BB + std::vector scoreBoards; + + const TargetGM107 *targ; + bool visit(Function *); + bool visit(BasicBlock *); + + void commitInsn(const Instruction *, int); + int calcDelay(const Instruction *, int) const; + void setDelay(Instruction *, int, const Instruction *); + void recordWr(const Value *, int, int); + void checkRd(const Value *, int, int&) const; + + inline void emitYield(Instruction *); + inline void emitStall(Instruction *, uint8_t); + inline void emitReuse(Instruction *, uint8_t); + inline void emitWrDepBar(Instruction *, uint8_t); + inline void emitRdDepBar(Instruction *, uint8_t); + inline void emitWtDepBar(Instruction *, uint8_t); + + inline int getStall(const Instruction *) const; + inline int getWrDepBar(const Instruction *) const; + inline int getRdDepBar(const Instruction *) const; + inline int getWtDepBar(const Instruction *) const; + + void setReuseFlag(Instruction *); + + inline void printSchedInfo(int, const Instruction *) const; + + struct LiveBarUse { + LiveBarUse(Instruction *insn, Instruction *usei) + : insn(insn), usei(usei) { } + Instruction *insn; + Instruction *usei; + }; + + struct LiveBarDef { + LiveBarDef(Instruction *insn, Instruction *defi) + : insn(insn), defi(defi) { } + Instruction *insn; + Instruction *defi; + }; + + bool insertBarriers(BasicBlock *); + + Instruction *findFirstUse(const Instruction *) const; + Instruction *findFirstDef(const Instruction *) const; + + bool needRdDepBar(const Instruction *) const; + bool needWrDepBar(const Instruction *) const; }; +inline void +SchedDataCalculatorGM107::emitStall(Instruction *insn, uint8_t cnt) +{ + assert(cnt < 16); + insn->sched |= cnt; +} + +inline void +SchedDataCalculatorGM107::emitYield(Instruction *insn) +{ + insn->sched |= 1 << 4; +} + +inline void +SchedDataCalculatorGM107::emitWrDepBar(Instruction *insn, uint8_t id) +{ + assert(id < 6); + if ((insn->sched & 0xe0) == 0xe0) + insn->sched ^= 0xe0; + insn->sched |= id << 5; +} + +inline void +SchedDataCalculatorGM107::emitRdDepBar(Instruction *insn, uint8_t id) +{ + assert(id < 6); + if ((insn->sched & 0x700) == 0x700) + insn->sched ^= 0x700; + insn->sched |= id << 8; +} + +inline void +SchedDataCalculatorGM107::emitWtDepBar(Instruction *insn, uint8_t id) +{ + assert(id < 6); + insn->sched |= 1 << (11 + id); +} + +inline void +SchedDataCalculatorGM107::emitReuse(Instruction *insn, uint8_t id) +{ + assert(id < 4); + insn->sched |= 1 << (17 + id); +} + +inline void +SchedDataCalculatorGM107::printSchedInfo(int cycle, + const Instruction *insn) const +{ + uint8_t st, yl, wr, rd, wt, ru; + + st = (insn->sched & 0x00000f) >> 0; + yl = (insn->sched & 0x000010) >> 4; + wr = (insn->sched & 0x0000e0) >> 5; + rd = (insn->sched & 0x000700) >> 8; + wt = (insn->sched & 0x01f800) >> 11; + ru = (insn->sched & 0x1e0000) >> 17; + + INFO("cycle %i, (st 0x%x, yl 0x%x, wr 0x%x, rd 0x%x, wt 0x%x, ru 0x%x)\n", + cycle, st, yl, wr, rd, wt, ru); +} + +inline int +SchedDataCalculatorGM107::getStall(const Instruction *insn) const +{ + return insn->sched & 0xf; +} + +inline int +SchedDataCalculatorGM107::getWrDepBar(const Instruction *insn) const +{ + return (insn->sched & 0x0000e0) >> 5; +} + +inline int +SchedDataCalculatorGM107::getRdDepBar(const Instruction *insn) const +{ + return (insn->sched & 0x000700) >> 8; +} + +inline int +SchedDataCalculatorGM107::getWtDepBar(const Instruction *insn) const +{ + return (insn->sched & 0x01f800) >> 11; +} + +// Emit the reuse flag which allows to make use of the new memory hierarchy +// introduced since Maxwell, the operand reuse cache. +// +// It allows to reduce bank conflicts by caching operands. Each time you issue +// an instruction, that flag can tell the hw which operands are going to be +// re-used by the next instruction. Note that the next instruction has to use +// the same GPR id in the same operand slot. +void +SchedDataCalculatorGM107::setReuseFlag(Instruction *insn) +{ + Instruction *next = insn->next; + BitSet defs(255, 1); + + if (!targ->isReuseSupported(insn)) + return; + + for (int d = 0; insn->defExists(d); ++d) { + const Value *def = insn->def(d).rep(); + if (insn->def(d).getFile() != FILE_GPR) + continue; + if (typeSizeof(insn->dType) != 4 || def->reg.data.id == 255) + continue; + defs.set(def->reg.data.id); + } + + for (int s = 0; insn->srcExists(s); s++) { + const Value *src = insn->src(s).rep(); + if (insn->src(s).getFile() != FILE_GPR) + continue; + if (typeSizeof(insn->sType) != 4 || src->reg.data.id == 255) + continue; + if (defs.test(src->reg.data.id)) + continue; + if (!next->srcExists(s) || next->src(s).getFile() != FILE_GPR) + continue; + if (src->reg.data.id != next->getSrc(s)->reg.data.id) + continue; + assert(s < 4); + emitReuse(insn, s); + } +} + +void +SchedDataCalculatorGM107::recordWr(const Value *v, int cycle, int ready) +{ + int a = v->reg.data.id, b; + + switch (v->reg.file) { + case FILE_GPR: + b = a + v->reg.size / 4; + for (int r = a; r < b; ++r) + score->rd.r[r] = ready; + break; + case FILE_PREDICATE: + // To immediately use a predicate set by any instructions, the minimum + // number of stall counts is 13. + score->rd.p[a] = cycle + 13; + break; + case FILE_FLAGS: + score->rd.c = ready; + break; + default: + break; + } +} + +void +SchedDataCalculatorGM107::checkRd(const Value *v, int cycle, int &delay) const +{ + int a = v->reg.data.id, b; + int ready = cycle; + + switch (v->reg.file) { + case FILE_GPR: + b = a + v->reg.size / 4; + for (int r = a; r < b; ++r) + ready = MAX2(ready, score->rd.r[r]); + break; + case FILE_PREDICATE: + ready = MAX2(ready, score->rd.p[a]); + break; + case FILE_FLAGS: + ready = MAX2(ready, score->rd.c); + break; + default: + break; + } + if (cycle < ready) + delay = MAX2(delay, ready - cycle); +} + +void +SchedDataCalculatorGM107::commitInsn(const Instruction *insn, int cycle) +{ + const int ready = cycle + targ->getLatency(insn); + + for (int d = 0; insn->defExists(d); ++d) + recordWr(insn->getDef(d), cycle, ready); + +#ifdef GM107_DEBUG_SCHED_DATA + score->print(cycle); +#endif +} + +#define GM107_MIN_ISSUE_DELAY 0x1 +#define GM107_MAX_ISSUE_DELAY 0xf + +int +SchedDataCalculatorGM107::calcDelay(const Instruction *insn, int cycle) const +{ + int delay = 0, ready = cycle; + + for (int s = 0; insn->srcExists(s); ++s) + checkRd(insn->getSrc(s), cycle, delay); + + // TODO: make use of getReadLatency()! + + return MAX2(delay, ready - cycle); +} + +void +SchedDataCalculatorGM107::setDelay(Instruction *insn, int delay, + const Instruction *next) +{ + const OpClass cl = targ->getOpClass(insn->op); + int wr, rd; + + if (insn->op == OP_EXIT || + insn->op == OP_BAR || + insn->op == OP_MEMBAR) { + delay = GM107_MAX_ISSUE_DELAY; + } else + if (insn->op == OP_QUADON || + insn->op == OP_QUADPOP) { + delay = 0xd; + } else + if (cl == OPCLASS_FLOW || insn->join) { + delay = 0xd; + } + + if (!next || !targ->canDualIssue(insn, next)) { + delay = CLAMP(delay, GM107_MIN_ISSUE_DELAY, GM107_MAX_ISSUE_DELAY); + } else { + delay = 0x0; // dual-issue + } + + wr = getWrDepBar(insn); + rd = getRdDepBar(insn); + + if (delay == GM107_MIN_ISSUE_DELAY && (wr & rd) != 7) { + // Barriers take one additional clock cycle to become active on top of + // the clock consumed by the instruction producing it. + if (!next || insn->bb != next->bb) { + delay = 0x2; + } else { + int wt = getWtDepBar(next); + if ((wt & (1 << wr)) | (wt & (1 << rd))) + delay = 0x2; + } + } + + emitStall(insn, delay); +} + + +// Return true when the given instruction needs to emit a read dependency +// barrier (for WaR hazards) because it doesn't operate at a fixed latency, and +// setting the maximum number of stall counts is not enough. +bool +SchedDataCalculatorGM107::needRdDepBar(const Instruction *insn) const +{ + BitSet srcs(255, 1), defs(255, 1); + int a, b; + + if (!targ->isBarrierRequired(insn)) + return false; + + // Do not emit a read dependency barrier when the instruction doesn't use + // any GPR (like st s[0x4] 0x0) as input because it's unnecessary. + for (int s = 0; insn->srcExists(s); ++s) { + const Value *src = insn->src(s).rep(); + if (insn->src(s).getFile() != FILE_GPR) + continue; + if (src->reg.data.id == 255) + continue; + + a = src->reg.data.id; + b = a + src->reg.size / 4; + for (int r = a; r < b; ++r) + srcs.set(r); + } + + if (!srcs.popCount()) + return false; + + // Do not emit a read dependency barrier when the output GPRs are equal to + // the input GPRs (like rcp $r0 $r0) because a write dependency barrier will + // be produced and WaR hazards are prevented. + for (int d = 0; insn->defExists(d); ++d) { + const Value *def = insn->def(d).rep(); + if (insn->def(d).getFile() != FILE_GPR) + continue; + if (def->reg.data.id == 255) + continue; + + a = def->reg.data.id; + b = a + def->reg.size / 4; + for (int r = a; r < b; ++r) + defs.set(r); + } + + srcs.andNot(defs); + if (!srcs.popCount()) + return false; + + return true; +} + +// Return true when the given instruction needs to emit a write dependency +// barrier (for RaW hazards) because it doesn't operate at a fixed latency, and +// setting the maximum number of stall counts is not enough. This is only legal +// if the instruction output something. +bool +SchedDataCalculatorGM107::needWrDepBar(const Instruction *insn) const +{ + if (!targ->isBarrierRequired(insn)) + return false; + + for (int d = 0; insn->defExists(d); ++d) { + if (insn->def(d).getFile() == FILE_GPR || + insn->def(d).getFile() == FILE_PREDICATE) + return true; + } + return false; +} + +// Find the next instruction inside the same basic block which uses the output +// of the given instruction in order to avoid RaW hazards. +Instruction * +SchedDataCalculatorGM107::findFirstUse(const Instruction *bari) const +{ + Instruction *insn, *next; + int minGPR, maxGPR; + + if (!bari->defExists(0)) + return NULL; + + minGPR = bari->def(0).rep()->reg.data.id; + maxGPR = minGPR + bari->def(0).rep()->reg.size / 4 - 1; + + for (insn = bari->next; insn != NULL; insn = next) { + next = insn->next; + + for (int s = 0; insn->srcExists(s); ++s) { + const Value *src = insn->src(s).rep(); + if (bari->def(0).getFile() == FILE_GPR) { + if (insn->src(s).getFile() != FILE_GPR || + src->reg.data.id + src->reg.size / 4 - 1 < minGPR || + src->reg.data.id > maxGPR) + continue; + return insn; + } else + if (bari->def(0).getFile() == FILE_PREDICATE) { + if (insn->src(s).getFile() != FILE_PREDICATE || + src->reg.data.id != minGPR) + continue; + return insn; + } + } + } + return NULL; +} + +// Find the next instruction inside the same basic block which overwrites, at +// least, one source of the given instruction in order to avoid WaR hazards. +Instruction * +SchedDataCalculatorGM107::findFirstDef(const Instruction *bari) const +{ + Instruction *insn, *next; + int minGPR, maxGPR; + + for (insn = bari->next; insn != NULL; insn = next) { + next = insn->next; + + for (int d = 0; insn->defExists(d); ++d) { + const Value *def = insn->def(d).rep(); + if (insn->def(d).getFile() != FILE_GPR) + continue; + + minGPR = def->reg.data.id; + maxGPR = minGPR + def->reg.size / 4 - 1; + + for (int s = 0; bari->srcExists(s); ++s) { + const Value *src = bari->src(s).rep(); + if (bari->src(s).getFile() != FILE_GPR || + src->reg.data.id + src->reg.size / 4 - 1 < minGPR || + src->reg.data.id > maxGPR) + continue; + return insn; + } + } + } + return NULL; +} + +// Dependency barriers: +// This pass is a bit ugly and could probably be improved by performing a +// better allocation. +// +// The main idea is to avoid WaR and RaW hazards by emitting read/write +// dependency barriers using the control codes. +bool +SchedDataCalculatorGM107::insertBarriers(BasicBlock *bb) +{ + std::list live_uses; + std::list live_defs; + Instruction *insn, *next; + BitSet bars(6, 1); + int bar_id; + + for (insn = bb->getEntry(); insn != NULL; insn = next) { + Instruction *usei = NULL, *defi = NULL; + bool need_wr_bar, need_rd_bar; + + next = insn->next; + + // Expire old barrier uses. + for (std::list::iterator it = live_uses.begin(); + it != live_uses.end();) { + if (insn->serial >= it->usei->serial) { + int wr = getWrDepBar(it->insn); + emitWtDepBar(insn, wr); + bars.clr(wr); // free barrier + it = live_uses.erase(it); + continue; + } + ++it; + } + + // Expire old barrier defs. + for (std::list::iterator it = live_defs.begin(); + it != live_defs.end();) { + if (insn->serial >= it->defi->serial) { + int rd = getRdDepBar(it->insn); + emitWtDepBar(insn, rd); + bars.clr(rd); // free barrier + it = live_defs.erase(it); + continue; + } + ++it; + } + + need_wr_bar = needWrDepBar(insn); + need_rd_bar = needRdDepBar(insn); + + if (need_wr_bar) { + // When the instruction requires to emit a write dependency barrier + // (all which write something at a variable latency), find the next + // instruction which reads the outputs. + usei = findFirstUse(insn); + + // Allocate and emit a new barrier. + bar_id = bars.findFreeRange(1); + if (bar_id == -1) + bar_id = 5; + bars.set(bar_id); + emitWrDepBar(insn, bar_id); + if (usei) + live_uses.push_back(LiveBarUse(insn, usei)); + } + + if (need_rd_bar) { + // When the instruction requires to emit a read dependency barrier + // (all which read something at a variable latency), find the next + // instruction which will write the inputs. + defi = findFirstDef(insn); + + if (usei && defi && usei->serial <= defi->serial) + continue; + + // Allocate and emit a new barrier. + bar_id = bars.findFreeRange(1); + if (bar_id == -1) + bar_id = 5; + bars.set(bar_id); + emitRdDepBar(insn, bar_id); + if (defi) + live_defs.push_back(LiveBarDef(insn, defi)); + } + } + + // Remove unnecessary barrier waits. + BitSet alive_bars(6, 1); + for (insn = bb->getEntry(); insn != NULL; insn = next) { + int wr, rd, wt; + + next = insn->next; + + wr = getWrDepBar(insn); + rd = getRdDepBar(insn); + wt = getWtDepBar(insn); + + for (int idx = 0; idx < 6; ++idx) { + if (!(wt & (1 << idx))) + continue; + if (!alive_bars.test(idx)) { + insn->sched &= ~(1 << (11 + idx)); + } else { + alive_bars.clr(idx); + } + } + + if (wr < 6) + alive_bars.set(wr); + if (rd < 6) + alive_bars.set(rd); + } + + return true; +} + +bool +SchedDataCalculatorGM107::visit(Function *func) +{ + ArrayList insns; + + func->orderInstructions(insns); + + scoreBoards.resize(func->cfg.getSize()); + for (size_t i = 0; i < scoreBoards.size(); ++i) + scoreBoards[i].wipe(); + return true; +} + bool SchedDataCalculatorGM107::visit(BasicBlock *bb) { + Instruction *insn, *next = NULL; + int cycle = 0; + for (Instruction *insn = bb->getEntry(); insn; insn = insn->next) { /*XXX*/ insn->sched = 0x7e0; } + if (!debug_get_bool_option("NV50_PROG_SCHED", true)) + return true; + + // Insert read/write dependency barriers for instructions which don't + // operate at a fixed latency. + insertBarriers(bb); + + score = &scoreBoards.at(bb->getId()); + + for (Graph::EdgeIterator ei = bb->cfg.incident(); !ei.end(); ei.next()) { + // back branches will wait until all target dependencies are satisfied + if (ei.getType() == Graph::Edge::BACK) // sched would be uninitialized + continue; + BasicBlock *in = BasicBlock::get(ei.getNode()); + score->setMax(&scoreBoards.at(in->getId())); + } + +#ifdef GM107_DEBUG_SCHED_DATA + INFO("=== BB:%i initial scores\n", bb->getId()); + score->print(cycle); +#endif + + // Because barriers are allocated locally (intra-BB), we have to make sure + // that all produced barriers have been consumed before entering inside a + // new basic block. The best way is to do a global allocation pre RA but + // it's really more difficult, especially because of the phi nodes. Anyways, + // it seems like that waiting on a barrier which has already been consumed + // doesn't add any additional cost, it's just not elegant! + Instruction *start = bb->getEntry(); + if (start && bb->cfg.incidentCount() > 0) { + for (int b = 0; b < 6; b++) + emitWtDepBar(start, b); + } + + for (insn = bb->getEntry(); insn && insn->next; insn = insn->next) { + next = insn->next; + + commitInsn(insn, cycle); + int delay = calcDelay(next, cycle); + setDelay(insn, delay, next); + cycle += getStall(insn); + + setReuseFlag(insn); + + // XXX: The yield flag seems to destroy a bunch of things when it is + // set on every instruction, need investigation. + //emitYield(insn); + +#ifdef GM107_DEBUG_SCHED_DATA + printSchedInfo(cycle, insn); + insn->print(); + next->print(); +#endif + } + + if (!insn) + return true; + commitInsn(insn, cycle); + + int bbDelay = -1; + +#ifdef GM107_DEBUG_SCHED_DATA + fprintf(stderr, "last instruction is : "); + insn->print(); + fprintf(stderr, "cycle=%d\n", cycle); +#endif + + for (Graph::EdgeIterator ei = bb->cfg.outgoing(); !ei.end(); ei.next()) { + BasicBlock *out = BasicBlock::get(ei.getNode()); + + if (ei.getType() != Graph::Edge::BACK) { + // Only test the first instruction of the outgoing block. + next = out->getEntry(); + if (next) { + bbDelay = MAX2(bbDelay, calcDelay(next, cycle)); + } else { + // When the outgoing BB is empty, make sure to set the number of + // stall counts needed by the instruction because we don't know the + // next instruction. + bbDelay = MAX2(bbDelay, targ->getLatency(insn)); + } + } else { + // Wait until all dependencies are satisfied. + const int regsFree = score->getLatest(); + next = out->getFirst(); + for (int c = cycle; next && c < regsFree; next = next->next) { + bbDelay = MAX2(bbDelay, calcDelay(next, c)); + c += getStall(next); + } + next = NULL; + } + } + if (bb->cfg.outgoingCount() != 1) + next = NULL; + setDelay(insn, bbDelay, next); + cycle += getStall(insn); + + score->rebase(cycle); // common base for initializing out blocks' scores return true; } @@ -3182,7 +4161,7 @@ void CodeEmitterGM107::prepareEmission(Function *func) { - SchedDataCalculatorGM107 sched(targ); + SchedDataCalculatorGM107 sched(targGM107); CodeEmitter::prepareEmission(func); sched.run(func, true, true); } diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp --- mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -911,6 +911,7 @@ defId(i->def(0), 2); srcAddr8(i->src(0), 16); + setAReg16(i, 0); if (i->encSize != 8 && i->getInterpMode() == NV50_IR_INTERP_FLAT) { code[0] |= 1 << 8; @@ -1264,6 +1265,28 @@ } } +static void +alphatestSet(const FixupEntry *entry, uint32_t *code, const FixupData& data) +{ + int loc = entry->loc; + int enc; + + switch (data.alphatest) { + case PIPE_FUNC_NEVER: enc = 0x0; break; + case PIPE_FUNC_LESS: enc = 0x1; break; + case PIPE_FUNC_EQUAL: enc = 0x2; break; + case PIPE_FUNC_LEQUAL: enc = 0x3; break; + case PIPE_FUNC_GREATER: enc = 0x4; break; + case PIPE_FUNC_NOTEQUAL: enc = 0x5; break; + case PIPE_FUNC_GEQUAL: enc = 0x6; break; + default: + case PIPE_FUNC_ALWAYS: enc = 0xf; break; + } + + code[loc + 1] &= ~(0x1f << 14); + code[loc + 1] |= enc << 14; +} + void CodeEmitterNV50::emitSET(const Instruction *i) { @@ -1293,6 +1316,10 @@ if (i->src(1).mod.abs()) code[1] |= 0x00080000; emitForm_MAD(i); + + if (i->subOp == 1) { + addInterp(0, 0, alphatestSet); + } } void diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp --- mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -58,6 +58,7 @@ void setImmediateS8(const ValueRef&); void setSUConst16(const Instruction *, const int s); void setSUPred(const Instruction *, const int s); + void setPDSTL(const Instruction *, const int d); void emitCondCode(CondCode cc, int pos); void emitInterpMode(const Instruction *); @@ -101,6 +102,7 @@ void emitDMUL(const Instruction *); void emitIMAD(const Instruction *); void emitISAD(const Instruction *); + void emitSHLADD(const Instruction *a); void emitFMAD(const Instruction *); void emitDMAD(const Instruction *); void emitMADSP(const Instruction *); @@ -372,6 +374,16 @@ code[0] |= (s8 >> 6) << 8; } +void CodeEmitterNVC0::setPDSTL(const Instruction *i, const int d) +{ + assert(d < 0 || (i->defExists(d) && i->def(d).getFile() == FILE_PREDICATE)); + + uint32_t pred = d >= 0 ? DDATA(i->def(d)).id : 7; + + code[0] |= (pred & 3) << 8; + code[1] |= (pred & 4) << (26 - 2); +} + void CodeEmitterNVC0::emitForm_A(const Instruction *i, uint64_t opc) { @@ -536,6 +548,10 @@ if (i->saturate) code[0] |= 1 << 5; + + if (i->dnz) + code[0] |= 1 << 7; + else if (i->ftz) code[0] |= 1 << 6; } else { @@ -698,16 +714,15 @@ uint32_t addOp = 0; assert(!i->src(0).mod.abs() && !i->src(1).mod.abs()); - assert(!i->src(0).mod.neg() || !i->src(1).mod.neg()); if (i->src(0).mod.neg()) addOp |= 0x200; if (i->src(1).mod.neg()) addOp |= 0x100; - if (i->op == OP_SUB) { + if (i->op == OP_SUB) addOp ^= 0x100; - assert(addOp != 0x300); // would be add-plus-one - } + + assert(addOp != 0x300); // would be add-plus-one if (i->encSize == 8) { if (isLIMM(i->src(1), TYPE_U32)) { @@ -732,7 +747,6 @@ } } -// TODO: shl-add void CodeEmitterNVC0::emitIMAD(const Instruction *i) { @@ -760,6 +774,45 @@ } void +CodeEmitterNVC0::emitSHLADD(const Instruction *i) +{ + uint8_t addOp = (i->src(0).mod.neg() << 1) | i->src(2).mod.neg(); + const ImmediateValue *imm = i->src(1).get()->asImm(); + assert(imm); + + code[0] = 0x00000003; + code[1] = 0x40000000 | addOp << 23; + + emitPredicate(i); + + defId(i->def(0), 14); + srcId(i->src(0), 20); + + if (i->flagsDef >= 0) + code[1] |= 1 << 16; + + assert(!(imm->reg.data.u32 & 0xffffffe0)); + code[0] |= imm->reg.data.u32 << 5; + + switch (i->src(2).getFile()) { + case FILE_GPR: + srcId(i->src(2), 26); + break; + case FILE_MEMORY_CONST: + code[1] |= 0x4000; + code[1] |= i->getSrc(2)->reg.fileIndex << 10; + setAddress16(i->src(2)); + break; + case FILE_IMMEDIATE: + setImmediate(i, 2); + break; + default: + assert(!"bad src2 file"); + break; + } +} + +void CodeEmitterNVC0::emitMADSP(const Instruction *i) { assert(targ->getChipset() >= NVISA_GK104_CHIPSET); @@ -1822,7 +1875,7 @@ if (i->src(0).getFile() == FILE_MEMORY_SHARED && i->subOp == NV50_IR_SUBOP_STORE_UNLOCKED) { assert(i->defExists(0)); - defId(i->def(0), 8); + setPDSTL(i, 0); } } @@ -1894,7 +1947,7 @@ if (p >= 0) { if (targ->getChipset() >= NVISA_GK104_CHIPSET) - defId(i->def(p), 8); + setPDSTL(i, p); else defId(i->def(p), 32 + 18); } @@ -2471,16 +2524,31 @@ void CodeEmitterNVC0::emitVOTE(const Instruction *i) { - assert(i->src(0).getFile() == FILE_PREDICATE && - i->def(1).getFile() == FILE_PREDICATE); + assert(i->src(0).getFile() == FILE_PREDICATE); code[0] = 0x00000004 | (i->subOp << 5); code[1] = 0x48000000; emitPredicate(i); - defId(i->def(0), 14); - defId(i->def(1), 32 + 22); + unsigned rp = 0; + for (int d = 0; i->defExists(d); d++) { + if (i->def(d).getFile() == FILE_PREDICATE) { + assert(!(rp & 2)); + rp |= 2; + defId(i->def(d), 32 + 22); + } else if (i->def(d).getFile() == FILE_GPR) { + assert(!(rp & 1)); + rp |= 1; + defId(i->def(d), 14); + } else { + assert(!"Unhandled def"); + } + } + if (!(rp & 1)) + code[0] |= 63 << 14; + if (!(rp & 2)) + code[1] |= 7 << 22; if (i->src(0).mod == Modifier(NV50_IR_MOD_NOT)) code[0] |= 1 << 23; srcId(i->src(0), 20); @@ -2589,6 +2657,9 @@ case OP_SAD: emitISAD(insn); break; + case OP_SHLADD: + emitSHLADD(insn); + break; case OP_NOT: emitNOT(insn); break; diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp --- mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -438,6 +438,7 @@ case TGSI_SEMANTIC_BASEVERTEX: return nv50_ir::SV_BASEVERTEX; case TGSI_SEMANTIC_BASEINSTANCE: return nv50_ir::SV_BASEINSTANCE; case TGSI_SEMANTIC_DRAWID: return nv50_ir::SV_DRAWID; + case TGSI_SEMANTIC_WORK_DIM: return nv50_ir::SV_WORK_DIM; default: assert(0); return nv50_ir::SV_CLOCK; @@ -537,6 +538,8 @@ FMT_CASE(R8G8_SNORM, RG8_SNORM); FMT_CASE(R16_SNORM, R16_SNORM); FMT_CASE(R8_SNORM, R8_SNORM); + + FMT_CASE(B8G8R8A8_UNORM, BGRA8); } assert(!"Unexpected format"); @@ -578,6 +581,9 @@ case TGSI_OPCODE_UBFE: case TGSI_OPCODE_UMSB: case TGSI_OPCODE_UP2H: + case TGSI_OPCODE_VOTE_ALL: + case TGSI_OPCODE_VOTE_ANY: + case TGSI_OPCODE_VOTE_EQ: return nv50_ir::TYPE_U32; case TGSI_OPCODE_I2F: case TGSI_OPCODE_I2D: @@ -606,6 +612,7 @@ case TGSI_OPCODE_DNEG: case TGSI_OPCODE_DADD: case TGSI_OPCODE_DMUL: + case TGSI_OPCODE_DDIV: case TGSI_OPCODE_DMAX: case TGSI_OPCODE_DMIN: case TGSI_OPCODE_DSLT: @@ -717,7 +724,6 @@ NV50_IR_OPCODE_CASE(SGE, SET); NV50_IR_OPCODE_CASE(MAD, MAD); NV50_IR_OPCODE_CASE(FMA, FMA); - NV50_IR_OPCODE_CASE(SUB, SUB); NV50_IR_OPCODE_CASE(FLR, FLOOR); NV50_IR_OPCODE_CASE(ROUND, CVT); @@ -725,8 +731,6 @@ NV50_IR_OPCODE_CASE(LG2, LG2); NV50_IR_OPCODE_CASE(POW, POW); - NV50_IR_OPCODE_CASE(ABS, ABS); - NV50_IR_OPCODE_CASE(COS, COS); NV50_IR_OPCODE_CASE(DDX, DFDX); NV50_IR_OPCODE_CASE(DDX_FINE, DFDX); @@ -807,6 +811,7 @@ NV50_IR_OPCODE_CASE(DNEG, NEG); NV50_IR_OPCODE_CASE(DADD, ADD); NV50_IR_OPCODE_CASE(DMUL, MUL); + NV50_IR_OPCODE_CASE(DDIV, DIV); NV50_IR_OPCODE_CASE(DMAX, MAX); NV50_IR_OPCODE_CASE(DMIN, MIN); NV50_IR_OPCODE_CASE(DSLT, SET); @@ -865,6 +870,10 @@ NV50_IR_OPCODE_CASE(IMSB, BFIND); NV50_IR_OPCODE_CASE(UMSB, BFIND); + NV50_IR_OPCODE_CASE(VOTE_ALL, VOTE); + NV50_IR_OPCODE_CASE(VOTE_ANY, VOTE); + NV50_IR_OPCODE_CASE(VOTE_EQ, VOTE); + NV50_IR_OPCODE_CASE(END, EXIT); default: @@ -891,6 +900,9 @@ case TGSI_OPCODE_IMUL_HI: case TGSI_OPCODE_UMUL_HI: return NV50_IR_SUBOP_MUL_HIGH; + case TGSI_OPCODE_VOTE_ALL: return NV50_IR_SUBOP_VOTE_ALL; + case TGSI_OPCODE_VOTE_ANY: return NV50_IR_SUBOP_VOTE_ANY; + case TGSI_OPCODE_VOTE_EQ: return NV50_IR_SUBOP_VOTE_UNI; default: return 0; } @@ -1028,7 +1040,7 @@ if (info->type == PIPE_SHADER_FRAGMENT) { info->prop.fp.writesDepth = scan.writes_z; - info->prop.fp.usesDiscard = scan.uses_kill; + info->prop.fp.usesDiscard = scan.uses_kill || info->io.alphaRefBase; } else if (info->type == PIPE_SHADER_GEOMETRY) { info->prop.gp.instanceCount = 1; // default value @@ -1113,6 +1125,7 @@ break; case TGSI_PROPERTY_FS_COORD_ORIGIN: case TGSI_PROPERTY_FS_COORD_PIXEL_CENTER: + case TGSI_PROPERTY_FS_DEPTH_LAYOUT: // we don't care break; case TGSI_PROPERTY_VS_PROHIBIT_UCPS: @@ -1446,6 +1459,9 @@ if (insn.getOpcode() == TGSI_OPCODE_BARRIER) info->numBarriers = 1; + if (insn.getOpcode() == TGSI_OPCODE_FBFETCH) + info->prop.fp.readsFramebuffer = true; + if (insn.dstCount()) { Instruction::DstRegister dst = insn.getDst(0); @@ -1561,6 +1577,7 @@ void handleTEX(Value *dst0[4], int R, int S, int L, int C, int Dx, int Dy); void handleTXF(Value *dst0[4], int R, int L_M); void handleTXQ(Value *dst0[4], enum TexQuery, int R); + void handleFBFETCH(Value *dst0[4]); void handleLIT(Value *dst0[4]); void handleUserClipPlanes(); @@ -2213,6 +2230,11 @@ if (tgsi.getOpcode() == TGSI_OPCODE_SAMPLE_C_LZ) texi->tex.levelZero = true; + if (prog->getType() != Program::TYPE_FRAGMENT && + (tgsi.getOpcode() == TGSI_OPCODE_TEX || + tgsi.getOpcode() == TGSI_OPCODE_TEX2 || + tgsi.getOpcode() == TGSI_OPCODE_TXP)) + texi->tex.levelZero = true; if (tgsi.getOpcode() == TGSI_OPCODE_TG4 && !tgt.isShadow()) texi->tex.gatherComp = tgsi.getSrc(1).getValueU32(0, info); @@ -2265,6 +2287,40 @@ } void +Converter::handleFBFETCH(Value *dst[4]) +{ + TexInstruction *texi = new_TexInstruction(func, OP_TXF); + unsigned int c, d; + + texi->tex.target = TEX_TARGET_2D_MS_ARRAY; + texi->tex.levelZero = 1; + texi->tex.useOffsets = 0; + + for (c = 0, d = 0; c < 4; ++c) { + if (dst[c]) { + texi->setDef(d++, dst[c]); + texi->tex.mask |= 1 << c; + } + } + + Value *x = mkOp1v(OP_RDSV, TYPE_F32, getScratch(), mkSysVal(SV_POSITION, 0)); + Value *y = mkOp1v(OP_RDSV, TYPE_F32, getScratch(), mkSysVal(SV_POSITION, 1)); + Value *z = mkOp1v(OP_RDSV, TYPE_U32, getScratch(), mkSysVal(SV_LAYER, 0)); + Value *ms = mkOp1v(OP_RDSV, TYPE_U32, getScratch(), mkSysVal(SV_SAMPLE_INDEX, 0)); + + mkCvt(OP_CVT, TYPE_U32, x, TYPE_F32, x)->rnd = ROUND_Z; + mkCvt(OP_CVT, TYPE_U32, y, TYPE_F32, y)->rnd = ROUND_Z; + texi->setSrc(0, x); + texi->setSrc(1, y); + texi->setSrc(2, z); + texi->setSrc(3, ms); + + texi->tex.r = texi->tex.s = -1; + + bb->insertTail(texi); +} + +void Converter::handleLIT(Value *dst0[4]) { Value *val0 = NULL; @@ -2419,6 +2475,9 @@ for (int c = 0; c < arg; ++c) coords.push_back(fetchSrc(s, c)); + + if (t.isMS()) + coords.push_back(fetchSrc(s, 3)); } // For raw loads, granularity is 4 byte. @@ -2777,8 +2836,8 @@ Value *offset = NULL, *ptr = NULL, *w = NULL; Symbol *sym[4] = { NULL }; bool linear; - operation op; - int c, mode; + operation op = OP_NOP; + int c, mode = 0; tgsi::Instruction::SrcRegister src = tgsi.getSrc(0); @@ -2847,8 +2906,8 @@ // and then convert to s32. Value *offs[2]; for (c = 0; c < 2; c++) { - offs[c] = fetchSrc(1, c); - mkOp2(OP_MIN, TYPE_F32, offs[c], offs[c], loadImm(NULL, 0.4375f)); + offs[c] = getScratch(); + mkOp2(OP_MIN, TYPE_F32, offs[c], fetchSrc(1, c), loadImm(NULL, 0.4375f)); mkOp2(OP_MAX, TYPE_F32, offs[c], offs[c], loadImm(NULL, -0.5f)); mkOp2(OP_MUL, TYPE_F32, offs[c], offs[c], loadImm(NULL, 4096.0f)); mkCvt(OP_CVT, TYPE_S32, offs[c], TYPE_F32, offs[c]); @@ -2968,7 +3027,6 @@ case TGSI_OPCODE_SHL: case TGSI_OPCODE_ISHR: case TGSI_OPCODE_USHR: - case TGSI_OPCODE_SUB: case TGSI_OPCODE_XOR: FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) { src0 = fetchSrc(0, c); @@ -2989,7 +3047,6 @@ } break; case TGSI_OPCODE_MOV: - case TGSI_OPCODE_ABS: case TGSI_OPCODE_CEIL: case TGSI_OPCODE_FLR: case TGSI_OPCODE_TRUNC: @@ -3228,6 +3285,17 @@ mkCmp(op, tgsi.getSetCond(), dstTy, dst0[c], srcTy, src0, src1); } break; + case TGSI_OPCODE_VOTE_ALL: + case TGSI_OPCODE_VOTE_ANY: + case TGSI_OPCODE_VOTE_EQ: + val0 = new_LValue(func, FILE_PREDICATE); + FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) { + mkCmp(OP_SET, CC_NE, TYPE_U32, val0, TYPE_U32, fetchSrc(0, c), zero); + mkOp1(op, dstTy, val0, val0) + ->subOp = tgsi::opcodeToSubOp(tgsi.getOpcode()); + mkCvt(OP_CVT, TYPE_U32, dst0[c], TYPE_U8, val0); + } + break; case TGSI_OPCODE_KILL_IF: val0 = new_LValue(func, FILE_PREDICATE); mask = 0; @@ -3293,6 +3361,9 @@ handleTXQ(dst0, TXQ_TYPE, 0); std::swap(dst0[0], dst0[2]); break; + case TGSI_OPCODE_FBFETCH: + handleFBFETCH(dst0); + break; case TGSI_OPCODE_F2I: case TGSI_OPCODE_F2U: FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) @@ -3479,10 +3550,13 @@ if (!isEndOfSubroutine(ip + 1)) { // insert a PRERET at the entry if this is an early return // (only needed for sharing code in the epilogue) - BasicBlock *pos = getBB(); - setPosition(BasicBlock::get(func->cfg.getRoot()), false); - mkFlow(OP_PRERET, leave, CC_ALWAYS, NULL)->fixed = 1; - setPosition(pos, true); + BasicBlock *root = BasicBlock::get(func->cfg.getRoot()); + if (root->getEntry() == NULL || root->getEntry()->op != OP_PRERET) { + BasicBlock *pos = getBB(); + setPosition(root, false); + mkFlow(OP_PRERET, leave, CC_ALWAYS, NULL)->fixed = 1; + setPosition(pos, true); + } } mkFlow(OP_RET, NULL, CC_ALWAYS, NULL)->fixed = 1; bb->cfg.attach(&leave->cfg, Graph::Edge::CROSS); @@ -3525,12 +3599,15 @@ geni->subOp = tgsi::opcodeToSubOp(tgsi.getOpcode()); break; case TGSI_OPCODE_MEMBAR: + { + uint32_t level = tgsi.getSrc(0).getValueU32(0, info); geni = mkOp(OP_MEMBAR, TYPE_NONE, NULL); geni->fixed = 1; - if (tgsi.getSrc(0).getValueU32(0, info) & TGSI_MEMBAR_THREAD_GROUP) + if (!(level & ~(TGSI_MEMBAR_THREAD_GROUP | TGSI_MEMBAR_SHARED))) geni->subOp = NV50_IR_SUBOP_MEMBAR(M, CTA); else geni->subOp = NV50_IR_SUBOP_MEMBAR(M, GL); + } break; case TGSI_OPCODE_ATOMUADD: case TGSI_OPCODE_ATOMXCHG: @@ -3574,16 +3651,17 @@ case TGSI_OPCODE_UBFE: FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) { src0 = fetchSrc(0, c); + val0 = getScratch(); if (tgsi.getSrc(1).getFile() == TGSI_FILE_IMMEDIATE && tgsi.getSrc(2).getFile() == TGSI_FILE_IMMEDIATE) { - src1 = loadImm(NULL, tgsi.getSrc(2).getValueU32(c, info) << 8 | - tgsi.getSrc(1).getValueU32(c, info)); + loadImm(val0, (tgsi.getSrc(2).getValueU32(c, info) << 8) | + tgsi.getSrc(1).getValueU32(c, info)); } else { src1 = fetchSrc(1, c); src2 = fetchSrc(2, c); - mkOp3(OP_INSBF, TYPE_U32, src1, src2, mkImm(0x808), src1); + mkOp3(OP_INSBF, TYPE_U32, val0, src2, mkImm(0x808), src1); } - mkOp2(OP_EXTBF, dstTy, dst0[c], src0, src1); + mkOp2(OP_EXTBF, dstTy, dst0[c], src0, val0); } break; case TGSI_OPCODE_BFI: @@ -3592,16 +3670,18 @@ src1 = fetchSrc(1, c); src2 = fetchSrc(2, c); src3 = fetchSrc(3, c); - mkOp3(OP_INSBF, TYPE_U32, src2, src3, mkImm(0x808), src2); - mkOp3(OP_INSBF, TYPE_U32, dst0[c], src1, src2, src0); + val0 = getScratch(); + mkOp3(OP_INSBF, TYPE_U32, val0, src3, mkImm(0x808), src2); + mkOp3(OP_INSBF, TYPE_U32, dst0[c], src1, val0, src0); } break; case TGSI_OPCODE_LSB: FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) { src0 = fetchSrc(0, c); - geni = mkOp2(OP_EXTBF, TYPE_U32, src0, src0, mkImm(0x2000)); + val0 = getScratch(); + geni = mkOp2(OP_EXTBF, TYPE_U32, val0, src0, mkImm(0x2000)); geni->subOp = NV50_IR_SUBOP_EXTBF_REV; - geni = mkOp1(OP_BFIND, TYPE_U32, dst0[c], src0); + geni = mkOp1(OP_BFIND, TYPE_U32, dst0[c], val0); geni->subOp = NV50_IR_SUBOP_BFIND_SAMT; } break; @@ -3711,6 +3791,7 @@ } case TGSI_OPCODE_DADD: case TGSI_OPCODE_DMUL: + case TGSI_OPCODE_DDIV: case TGSI_OPCODE_DMAX: case TGSI_OPCODE_DMIN: FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) { @@ -3834,6 +3915,28 @@ void Converter::exportOutputs() { + if (info->io.alphaRefBase) { + for (unsigned int i = 0; i < info->numOutputs; ++i) { + if (info->out[i].sn != TGSI_SEMANTIC_COLOR || + info->out[i].si != 0) + continue; + const unsigned int c = 3; + if (!oData.exists(sub.cur->values, i, c)) + continue; + Value *val = oData.load(sub.cur->values, i, c, NULL); + if (!val) + continue; + + Symbol *ref = mkSymbol(FILE_MEMORY_CONST, info->io.auxCBSlot, + TYPE_U32, info->io.alphaRefBase); + Value *pred = new_LValue(func, FILE_PREDICATE); + mkCmp(OP_SET, CC_TR, TYPE_U32, pred, TYPE_F32, val, + mkLoadv(TYPE_U32, ref, NULL)) + ->subOp = 1; + mkOp(OP_DISCARD, TYPE_NONE, NULL)->setPredicate(CC_NOT_P, pred); + } + } + for (unsigned int i = 0; i < info->numOutputs; ++i) { for (unsigned int c = 0; c < 4; ++c) { if (!oData.exists(sub.cur->values, i, c)) diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_graph.h mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_graph.h --- mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_graph.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_graph.h 2017-06-01 10:37:10.000000000 +0000 @@ -147,7 +147,7 @@ public: Graph(); - ~Graph(); // does *not* free the nodes (make it an option ?) + virtual ~Graph(); // does *not* free the nodes (make it an option ?) inline Node *getRoot() const { return root; } diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir.h mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir.h --- mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir.h 2017-06-01 10:37:10.000000000 +0000 @@ -57,6 +57,7 @@ OP_MAD, OP_FMA, OP_SAD, // abs(src0 - src1) + src2 + OP_SHLADD, OP_ABS, OP_NEG, OP_NOT, @@ -412,6 +413,8 @@ FMT_R16_SNORM, FMT_R8_SNORM, + FMT_BGRA8, + IMG_FORMAT_COUNT, }; @@ -461,6 +464,7 @@ SV_BASEVERTEX, SV_BASEINSTANCE, SV_DRAWID, + SV_WORK_DIM, SV_UNDEFINED, SV_LAST }; @@ -831,6 +835,10 @@ bool isActionEqual(const Instruction *) const; bool isResultEqual(const Instruction *) const; + // check whether the defs interfere with srcs and defs of another instruction + bool canCommuteDefDef(const Instruction *) const; + bool canCommuteDefSrc(const Instruction *) const; + void print() const; inline CmpInstruction *asCmp(); @@ -966,6 +974,7 @@ uint8_t components; uint8_t bits[4]; ImgType type; + bool bgra; }; static const struct ImgFormatDesc formatTable[IMG_FORMAT_COUNT]; diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_inlines.h mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_inlines.h --- mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_inlines.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_inlines.h 2017-06-01 10:37:10.000000000 +0000 @@ -126,7 +126,7 @@ static inline bool isSignedIntType(DataType ty) { - return (ty == TYPE_S8 || ty == TYPE_S16 || ty == TYPE_S32); + return (ty == TYPE_S8 || ty == TYPE_S16 || ty == TYPE_S32 || ty == TYPE_S64); } static inline bool isSignedType(DataType ty) @@ -136,6 +136,7 @@ case TYPE_U8: case TYPE_U16: case TYPE_U32: + case TYPE_U64: case TYPE_B96: case TYPE_B128: return false; @@ -147,6 +148,7 @@ static inline DataType intTypeToSigned(DataType ty) { switch (ty) { + case TYPE_U64: return TYPE_S64; case TYPE_U32: return TYPE_S32; case TYPE_U16: return TYPE_S16; case TYPE_U8: return TYPE_S8; diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp --- mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -41,6 +41,55 @@ ((QOP_##q << 6) | (QOP_##r << 4) | \ (QOP_##s << 2) | (QOP_##t << 0)) +void +GM107LegalizeSSA::handlePFETCH(Instruction *i) +{ + Value *src0; + + if (i->src(0).getFile() == FILE_GPR && !i->srcExists(1)) + return; + + bld.setPosition(i, false); + src0 = bld.getSSA(); + + if (i->srcExists(1)) + bld.mkOp2(OP_ADD , TYPE_U32, src0, i->getSrc(0), i->getSrc(1)); + else + bld.mkOp1(OP_MOV , TYPE_U32, src0, i->getSrc(0)); + + i->setSrc(0, src0); + i->setSrc(1, NULL); +} + +void +GM107LegalizeSSA::handleLOAD(Instruction *i) +{ + if (i->src(0).getFile() != FILE_MEMORY_CONST) + return; + if (i->src(0).isIndirect(0)) + return; + if (typeSizeof(i->dType) != 4) + return; + + i->op = OP_MOV; +} + +bool +GM107LegalizeSSA::visit(Instruction *i) +{ + switch (i->op) { + case OP_PFETCH: + handlePFETCH(i); + break; + case OP_LOAD: + handleLOAD(i); + break; + default: + break; + } + return true; +} + bool GM107LoweringPass::handleManualTXD(TexInstruction *i) { diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.h mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.h --- mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.h 2017-06-01 10:37:10.000000000 +0000 @@ -15,4 +15,13 @@ bool handlePOPCNT(Instruction *); }; +class GM107LegalizeSSA : public NVC0LegalizeSSA +{ +private: + virtual bool visit(Instruction *); + + void handlePFETCH(Instruction *); + void handleLOAD(Instruction *); +}; + } // namespace nv50_ir diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp --- mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -115,6 +115,38 @@ i->ftz = true; } +void +NVC0LegalizeSSA::handleTEXLOD(TexInstruction *i) +{ + if (i->tex.levelZero) + return; + + ImmediateValue lod; + + // The LOD argument comes right after the coordinates (before depth bias, + // offsets, etc). + int arg = i->tex.target.getArgCount(); + + // SM30+ stores the indirect handle as a separate arg, which comes before + // the LOD. + if (prog->getTarget()->getChipset() >= NVISA_GK104_CHIPSET && + i->tex.rIndirectSrc >= 0) + arg++; + // SM20 stores indirect handle combined with array coordinate + if (prog->getTarget()->getChipset() < NVISA_GK104_CHIPSET && + !i->tex.target.isArray() && + i->tex.rIndirectSrc >= 0) + arg++; + + if (!i->src(arg).getImmediate(lod) || !lod.isInteger(0)) + return; + + if (i->op == OP_TXL) + i->op = OP_TEX; + i->tex.levelZero = true; + i->moveSources(arg + 1, -1); +} + bool NVC0LegalizeSSA::visit(Function *fn) { @@ -128,21 +160,25 @@ Instruction *next; for (Instruction *i = bb->getEntry(); i; i = next) { next = i->next; - if (i->sType == TYPE_F32) { - if (prog->getType() != Program::TYPE_COMPUTE) - handleFTZ(i); - continue; - } + + if (i->sType == TYPE_F32 && prog->getType() != Program::TYPE_COMPUTE) + handleFTZ(i); + switch (i->op) { case OP_DIV: case OP_MOD: - handleDIV(i); + if (i->sType != TYPE_F32) + handleDIV(i); break; case OP_RCP: case OP_RSQ: if (i->dType == TYPE_F64) handleRCPRSQ(i); break; + case OP_TXL: + case OP_TXF: + handleTEXLOD(i->asTex()); + break; default: break; } @@ -154,7 +190,8 @@ : rZero(NULL), carry(NULL), pOne(NULL), - needTexBar(prog->getTarget()->getChipset() >= 0xe0) + needTexBar(prog->getTarget()->getChipset() >= 0xe0 && + prog->getTarget()->getChipset() < 0x110) { } @@ -484,6 +521,8 @@ for (int s = 0; i->srcExists(s); ++s) { if (s == 2 && i->op == OP_SUCLAMP) continue; + if (s == 1 && i->op == OP_SHLADD) + continue; ImmediateValue *imm = i->getSrc(s)->asImm(); if (imm) { if (i->op == OP_SELP && s == 2) { @@ -598,7 +637,6 @@ NVC0LoweringPass::NVC0LoweringPass(Program *prog) : targ(prog->getTarget()) { bld.setProgram(prog); - gMemBase = NULL; } bool @@ -628,6 +666,10 @@ { uint8_t b = prog->driver->io.auxCBSlot; uint32_t off = prog->driver->io.texBindBase + slot * 4; + + if (ptr) + ptr = bld.mkOp2v(OP_SHL, TYPE_U32, bld.getSSA(), ptr, bld.mkImm(2)); + return bld. mkLoadv(TYPE_U32, bld.mkSymbol(FILE_MEMORY_CONST, b, TYPE_U32, off), ptr); } @@ -703,16 +745,16 @@ if (i->tex.rIndirectSrc >= 0 || i->tex.sIndirectSrc >= 0) { // XXX this ignores tsc, and assumes a 1:1 mapping assert(i->tex.rIndirectSrc >= 0); - Value *hnd = loadTexHandle( - bld.mkOp2v(OP_SHL, TYPE_U32, bld.getSSA(), - i->getIndirectR(), bld.mkImm(2)), - i->tex.r); + Value *hnd = loadTexHandle(i->getIndirectR(), i->tex.r); i->tex.r = 0xff; i->tex.s = 0x1f; i->setIndirectR(hnd); i->setIndirectS(NULL); } else if (i->tex.r == i->tex.s || i->op == OP_TXF) { - i->tex.r += prog->driver->io.texBindBase / 4; + if (i->tex.r == 0xffff) + i->tex.r = prog->driver->io.fbtexBindBase / 4; + else + i->tex.r += prog->driver->io.texBindBase / 4; i->tex.s = 0; // only a single cX[] value possible here } else { Value *hnd = bld.getScratch(); @@ -768,6 +810,11 @@ Value *ticRel = i->getIndirectR(); Value *tscRel = i->getIndirectS(); + if (i->tex.r == 0xffff) { + i->tex.r = 0x20; + i->tex.s = 0x10; + } + if (ticRel) { i->setSrc(i->tex.rIndirectSrc, NULL); if (i->tex.r) @@ -1066,10 +1113,7 @@ txq->moveSources(0, 1); txq->setSrc(0, src); } else { - Value *hnd = loadTexHandle( - bld.mkOp2v(OP_SHL, TYPE_U32, bld.getSSA(), - txq->getIndirectR(), bld.mkImm(2)), - txq->tex.r); + Value *hnd = loadTexHandle(txq->getIndirectR(), txq->tex.r); txq->tex.r = 0xff; txq->tex.s = 0x1f; @@ -1463,30 +1507,6 @@ } inline Value * -NVC0LoweringPass::loadSuInfo32(Value *ptr, uint32_t off) -{ - return loadResInfo32(ptr, off, prog->driver->io.suInfoBase); -} - -inline Value * -NVC0LoweringPass::loadSuInfo64(Value *ptr, uint32_t off) -{ - return loadResInfo64(ptr, off, prog->driver->io.suInfoBase); -} - -inline Value * -NVC0LoweringPass::loadSuLength32(Value *ptr, uint32_t off) -{ - return loadResLength32(ptr, off, prog->driver->io.suInfoBase); -} - -inline Value * -NVC0LoweringPass::loadBufInfo32(Value *ptr, uint32_t off) -{ - return loadResInfo32(ptr, off, prog->driver->io.bufInfoBase); -} - -inline Value * NVC0LoweringPass::loadBufInfo64(Value *ptr, uint32_t off) { return loadResInfo64(ptr, off, prog->driver->io.bufInfoBase); @@ -1499,12 +1519,6 @@ } inline Value * -NVC0LoweringPass::loadUboInfo32(Value *ptr, uint32_t off) -{ - return loadResInfo32(ptr, off, prog->driver->io.uboInfoBase); -} - -inline Value * NVC0LoweringPass::loadUboInfo64(Value *ptr, uint32_t off) { return loadResInfo64(ptr, off, prog->driver->io.uboInfoBase); @@ -1528,31 +1542,47 @@ /* On nvc0, surface info is obtained via the surface binding points passed * to the SULD/SUST instructions. * On nve4, surface info is stored in c[] and is used by various special - * instructions, e.g. for clamping coordiantes or generating an address. + * instructions, e.g. for clamping coordinates or generating an address. * They couldn't just have added an equivalent to TIC now, couldn't they ? */ -#define NVE4_SU_INFO_ADDR 0x00 -#define NVE4_SU_INFO_FMT 0x04 -#define NVE4_SU_INFO_DIM_X 0x08 -#define NVE4_SU_INFO_PITCH 0x0c -#define NVE4_SU_INFO_DIM_Y 0x10 -#define NVE4_SU_INFO_ARRAY 0x14 -#define NVE4_SU_INFO_DIM_Z 0x18 -#define NVE4_SU_INFO_UNK1C 0x1c -#define NVE4_SU_INFO_WIDTH 0x20 -#define NVE4_SU_INFO_HEIGHT 0x24 -#define NVE4_SU_INFO_DEPTH 0x28 -#define NVE4_SU_INFO_TARGET 0x2c -#define NVE4_SU_INFO_BSIZE 0x30 -#define NVE4_SU_INFO_RAW_X 0x34 -#define NVE4_SU_INFO_MS_X 0x38 -#define NVE4_SU_INFO_MS_Y 0x3c - -#define NVE4_SU_INFO__STRIDE 0x40 - -#define NVE4_SU_INFO_DIM(i) (0x08 + (i) * 8) -#define NVE4_SU_INFO_SIZE(i) (0x20 + (i) * 4) -#define NVE4_SU_INFO_MS(i) (0x38 + (i) * 4) +#define NVC0_SU_INFO_ADDR 0x00 +#define NVC0_SU_INFO_FMT 0x04 +#define NVC0_SU_INFO_DIM_X 0x08 +#define NVC0_SU_INFO_PITCH 0x0c +#define NVC0_SU_INFO_DIM_Y 0x10 +#define NVC0_SU_INFO_ARRAY 0x14 +#define NVC0_SU_INFO_DIM_Z 0x18 +#define NVC0_SU_INFO_UNK1C 0x1c +#define NVC0_SU_INFO_WIDTH 0x20 +#define NVC0_SU_INFO_HEIGHT 0x24 +#define NVC0_SU_INFO_DEPTH 0x28 +#define NVC0_SU_INFO_TARGET 0x2c +#define NVC0_SU_INFO_BSIZE 0x30 +#define NVC0_SU_INFO_RAW_X 0x34 +#define NVC0_SU_INFO_MS_X 0x38 +#define NVC0_SU_INFO_MS_Y 0x3c + +#define NVC0_SU_INFO__STRIDE 0x40 + +#define NVC0_SU_INFO_DIM(i) (0x08 + (i) * 8) +#define NVC0_SU_INFO_SIZE(i) (0x20 + (i) * 4) +#define NVC0_SU_INFO_MS(i) (0x38 + (i) * 4) + +inline Value * +NVC0LoweringPass::loadSuInfo32(Value *ptr, int slot, uint32_t off) +{ + uint32_t base = slot * NVC0_SU_INFO__STRIDE; + + if (ptr) { + ptr = bld.mkOp2v(OP_ADD, TYPE_U32, bld.getSSA(), ptr, bld.mkImm(slot)); + ptr = bld.mkOp2v(OP_AND, TYPE_U32, bld.getSSA(), ptr, bld.mkImm(7)); + ptr = bld.mkOp2v(OP_SHL, TYPE_U32, bld.getSSA(), ptr, bld.mkImm(6)); + base = 0; + } + off += base; + + return loadResInfo32(ptr, off, prog->driver->io.suInfoBase); +} static inline uint16_t getSuClampSubOp(const TexInstruction *su, int c) { @@ -1579,44 +1609,39 @@ bool NVC0LoweringPass::handleSUQ(TexInstruction *suq) { + int mask = suq->tex.mask; int dim = suq->tex.target.getDim(); int arg = dim + (suq->tex.target.isArray() || suq->tex.target.isCube()); - uint8_t s = prog->driver->io.auxCBSlot; Value *ind = suq->getIndirectR(); - uint32_t base; - int c; + int slot = suq->tex.r; + int c, d; - base = prog->driver->io.suInfoBase + suq->tex.r * NVE4_SU_INFO__STRIDE; + for (c = 0, d = 0; c < 3; ++c, mask >>= 1) { + if (c >= arg || !(mask & 1)) + continue; - if (ind) - ind = bld.mkOp2v(OP_SHL, TYPE_U32, bld.getScratch(), - ind, bld.mkImm(6)); + int offset; - for (c = 0; c < arg; ++c) { - if (suq->defExists(c)) { - int offset; - - if (c == 1 && suq->tex.target == TEX_TARGET_1D_ARRAY) { - offset = base + NVE4_SU_INFO_SIZE(2); - } else { - offset = base + NVE4_SU_INFO_SIZE(c); - } - bld.mkLoad(TYPE_U32, suq->getDef(c), - bld.mkSymbol(FILE_MEMORY_CONST, s, TYPE_U32, offset), ind); + if (c == 1 && suq->tex.target == TEX_TARGET_1D_ARRAY) { + offset = NVC0_SU_INFO_SIZE(2); + } else { + offset = NVC0_SU_INFO_SIZE(c); } - } - - if (suq->tex.target.isCube()) { - if (suq->defExists(2)) { - bld.mkOp2(OP_DIV, TYPE_U32, suq->getDef(2), suq->getDef(2), + bld.mkMov(suq->getDef(d++), loadSuInfo32(ind, slot, offset)); + if (c == 2 && suq->tex.target.isCube()) + bld.mkOp2(OP_DIV, TYPE_U32, suq->getDef(d - 1), suq->getDef(d - 1), bld.loadImm(NULL, 6)); - } } - if (suq->defExists(3)) { - // .w contains the number of samples for multi-sampled images but we - // don't support them for now. - bld.mkMov(suq->getDef(3), bld.loadImm(NULL, 1)); + if (mask & 1) { + if (suq->tex.target.isMS()) { + Value *ms_x = loadSuInfo32(ind, slot, NVC0_SU_INFO_MS(0)); + Value *ms_y = loadSuInfo32(ind, slot, NVC0_SU_INFO_MS(1)); + Value *ms = bld.mkOp2v(OP_ADD, TYPE_U32, bld.getScratch(), ms_x, ms_y); + bld.mkOp2(OP_SHL, TYPE_U32, suq->getDef(d++), bld.loadImm(NULL, 1), ms); + } else { + bld.mkMov(suq->getDef(d++), bld.loadImm(NULL, 1)); + } } bld.remove(suq); @@ -1626,8 +1651,8 @@ void NVC0LoweringPass::adjustCoordinatesMS(TexInstruction *tex) { - const uint16_t base = tex->tex.r * NVE4_SU_INFO__STRIDE; const int arg = tex->tex.target.getArgCount(); + int slot = tex->tex.r; if (tex->tex.target == TEX_TARGET_2D_MS) tex->tex.target = TEX_TARGET_2D; @@ -1642,17 +1667,10 @@ Value *s = tex->getSrc(arg - 1); Value *tx = bld.getSSA(), *ty = bld.getSSA(), *ts = bld.getSSA(); - Value *ind = NULL; + Value *ind = tex->getIndirectR(); - if (tex->tex.rIndirectSrc >= 0) { - assert(tex->tex.r == 0); - // FIXME: out of bounds - ind = bld.mkOp2v(OP_SHL, TYPE_U32, bld.getSSA(), - tex->getIndirectR(), bld.mkImm(6)); - } - - Value *ms_x = loadSuInfo32(ind, base + NVE4_SU_INFO_MS(0)); - Value *ms_y = loadSuInfo32(ind, base + NVE4_SU_INFO_MS(1)); + Value *ms_x = loadSuInfo32(ind, slot, NVC0_SU_INFO_MS(0)); + Value *ms_y = loadSuInfo32(ind, slot, NVC0_SU_INFO_MS(1)); bld.mkOp2(OP_SHL, TYPE_U32, tx, x, ms_x); bld.mkOp2(OP_SHL, TYPE_U32, ty, y, ms_y); @@ -1680,10 +1698,9 @@ const bool atom = su->op == OP_SUREDB || su->op == OP_SUREDP; const bool raw = su->op == OP_SULDB || su->op == OP_SUSTB || su->op == OP_SUREDB; - const int idx = su->tex.r; + const int slot = su->tex.r; const int dim = su->tex.target.getDim(); const int arg = dim + (su->tex.target.isArray() || su->tex.target.isCube()); - uint16_t base = idx * NVE4_SU_INFO__STRIDE; int c; Value *zero = bld.mkImm(0); Value *p1 = NULL; @@ -1691,7 +1708,7 @@ Value *src[3]; Value *bf, *eau, *off; Value *addr, *pred; - Value *ind = NULL; + Value *ind = su->getIndirectR(); off = bld.getScratch(4); bf = bld.getScratch(4); @@ -1702,17 +1719,6 @@ adjustCoordinatesMS(su); - if (su->tex.rIndirectSrc >= 0) { - ind = su->getIndirectR(); - if (su->tex.r > 0) { - ind = bld.mkOp2v(OP_ADD, TYPE_U32, bld.getSSA(), ind, - bld.loadImm(NULL, su->tex.r)); - } - ind = bld.mkOp2v(OP_AND, TYPE_U32, bld.getSSA(), ind, bld.mkImm(7)); - ind = bld.mkOp2v(OP_SHL, TYPE_U32, bld.getSSA(), ind, bld.mkImm(6)); - base = 0; - } - // calculate clamped coordinates for (c = 0; c < arg; ++c) { int dimc = c; @@ -1724,9 +1730,9 @@ src[c] = bld.getScratch(); if (c == 0 && raw) - v = loadSuInfo32(ind, base + NVE4_SU_INFO_RAW_X); + v = loadSuInfo32(ind, slot, NVC0_SU_INFO_RAW_X); else - v = loadSuInfo32(ind, base + NVE4_SU_INFO_DIM(dimc)); + v = loadSuInfo32(ind, slot, NVC0_SU_INFO_DIM(dimc)); bld.mkOp3(OP_SUCLAMP, TYPE_S32, src[c], su->getSrc(c), v, zero) ->subOp = getSuClampSubOp(su, dimc); } @@ -1748,16 +1754,16 @@ bld.mkOp2(OP_AND, TYPE_U32, off, src[0], bld.loadImm(NULL, 0xffff)); } else if (dim == 3) { - v = loadSuInfo32(ind, base + NVE4_SU_INFO_UNK1C); + v = loadSuInfo32(ind, slot, NVC0_SU_INFO_UNK1C); bld.mkOp3(OP_MADSP, TYPE_U32, off, src[2], v, src[1]) ->subOp = NV50_IR_SUBOP_MADSP(4,2,8); // u16l u16l u16l - v = loadSuInfo32(ind, base + NVE4_SU_INFO_PITCH); + v = loadSuInfo32(ind, slot, NVC0_SU_INFO_PITCH); bld.mkOp3(OP_MADSP, TYPE_U32, off, off, v, src[0]) ->subOp = NV50_IR_SUBOP_MADSP(0,2,8); // u32 u16l u16l } else { assert(dim == 2); - v = loadSuInfo32(ind, base + NVE4_SU_INFO_PITCH); + v = loadSuInfo32(ind, slot, NVC0_SU_INFO_PITCH); bld.mkOp3(OP_MADSP, TYPE_U32, off, src[1], v, src[0]) ->subOp = (su->tex.target.isArray() || su->tex.target.isCube()) ? NV50_IR_SUBOP_MADSP_SD : NV50_IR_SUBOP_MADSP(4,2,8); // u16l u16l u16l @@ -1768,7 +1774,7 @@ if (raw) { bf = src[0]; } else { - v = loadSuInfo32(ind, base + NVE4_SU_INFO_FMT); + v = loadSuInfo32(ind, slot, NVC0_SU_INFO_FMT); bld.mkOp3(OP_VSHL, TYPE_U32, bf, src[0], v, zero) ->subOp = NV50_IR_SUBOP_V1(7,6,8|2); } @@ -1785,7 +1791,7 @@ case 2: z = off; if (!su->tex.target.isArray() && !su->tex.target.isCube()) { - z = loadSuInfo32(ind, base + NVE4_SU_INFO_UNK1C); + z = loadSuInfo32(ind, slot, NVC0_SU_INFO_UNK1C); subOp = NV50_IR_SUBOP_SUBFM_3D; } break; @@ -1800,7 +1806,7 @@ } // part 2 - v = loadSuInfo32(ind, base + NVE4_SU_INFO_ADDR); + v = loadSuInfo32(ind, slot, NVC0_SU_INFO_ADDR); if (su->tex.target == TEX_TARGET_BUFFER) { eau = v; @@ -1809,7 +1815,7 @@ } // add array layer offset if (su->tex.target.isArray() || su->tex.target.isCube()) { - v = loadSuInfo32(ind, base + NVE4_SU_INFO_ARRAY); + v = loadSuInfo32(ind, slot, NVC0_SU_INFO_ARRAY); if (dim == 1) bld.mkOp3(OP_MADSP, TYPE_U32, eau, src[1], v, eau) ->subOp = NV50_IR_SUBOP_MADSP(4,0,0); // u16 u24 u32 @@ -1849,7 +1855,7 @@ // let's just set it 0 for raw access and hope it works v = raw ? - bld.mkImm(0) : loadSuInfo32(ind, base + NVE4_SU_INFO_FMT); + bld.mkImm(0) : loadSuInfo32(ind, slot, NVC0_SU_INFO_FMT); // get rid of old coordinate sources, make space for fmt info and predicate su->moveSources(arg, 3 - arg); @@ -1862,7 +1868,7 @@ CmpInstruction *pred1 = bld.mkCmp(OP_SET, CC_EQ, TYPE_U32, bld.getSSA(1, FILE_PREDICATE), TYPE_U32, bld.mkImm(0), - loadSuInfo32(ind, base + NVE4_SU_INFO_ADDR)); + loadSuInfo32(ind, slot, NVC0_SU_INFO_ADDR)); if (su->op != OP_SUSTP && su->tex.format) { const TexInstruction::ImgFormatDesc *format = su->tex.format; @@ -1873,7 +1879,7 @@ assert(format->components != 0); bld.mkCmp(OP_SET_OR, CC_NE, TYPE_U32, pred1->getDef(0), TYPE_U32, bld.loadImm(NULL, blockwidth / 8), - loadSuInfo32(ind, base + NVE4_SU_INFO_BSIZE), + loadSuInfo32(ind, slot, NVC0_SU_INFO_BSIZE), pred1->getDef(0)); } su->setPredicate(CC_NOT_P, pred1->getDef(0)); @@ -1990,6 +1996,10 @@ bld.mkCvt(OP_CVT, TYPE_F32, typedDst[i], TYPE_F16, typedDst[i]); } } + + if (format->bgra) { + std::swap(typedDst[0], typedDst[2]); + } } void @@ -2001,23 +2011,14 @@ convertSurfaceFormat(su); if (su->op == OP_SUREDB || su->op == OP_SUREDP) { - Value *pred = su->getSrc(2); - CondCode cc = CC_NOT_P; - if (su->getPredicate()) { - pred = bld.getScratch(1, FILE_PREDICATE); - cc = su->cc; - if (cc == CC_NOT_P) { - bld.mkOp2(OP_OR, TYPE_U8, pred, su->getPredicate(), su->getSrc(2)); - } else { - bld.mkOp2(OP_AND, TYPE_U8, pred, su->getPredicate(), su->getSrc(2)); - pred->getInsn()->src(1).mod = Modifier(NV50_IR_MOD_NOT); - } - } + assert(su->getPredicate()); + Value *pred = + bld.mkOp2v(OP_OR, TYPE_U8, bld.getScratch(1, FILE_PREDICATE), + su->getPredicate(), su->getSrc(2)); + Instruction *red = bld.mkOp(OP_ATOM, su->dType, bld.getSSA()); red->subOp = su->subOp; - if (!gMemBase) - gMemBase = bld.mkSymbol(FILE_MEMORY_GLOBAL, 0, TYPE_U32, 0); - red->setSrc(0, gMemBase); + red->setSrc(0, bld.mkSymbol(FILE_MEMORY_GLOBAL, 0, TYPE_U32, 0)); red->setSrc(1, su->getSrc(3)); if (su->subOp == NV50_IR_SUBOP_ATOM_CAS) red->setSrc(2, su->getSrc(4)); @@ -2027,8 +2028,8 @@ // performed Instruction *mov = bld.mkMov(bld.getSSA(), bld.loadImm(NULL, 0)); - assert(cc == CC_NOT_P); - red->setPredicate(cc, pred); + assert(su->cc == CC_NOT_P); + red->setPredicate(su->cc, pred); mov->setPredicate(CC_P, pred); bld.mkOp2(OP_UNION, TYPE_U32, su->getDef(0), @@ -2045,26 +2046,18 @@ void NVC0LoweringPass::processSurfaceCoordsNVC0(TexInstruction *su) { - const int idx = su->tex.r; + const int slot = su->tex.r; const int dim = su->tex.target.getDim(); const int arg = dim + (su->tex.target.isArray() || su->tex.target.isCube()); - uint16_t base = idx * NVE4_SU_INFO__STRIDE; int c; Value *zero = bld.mkImm(0); Value *src[3]; Value *v; - Value *ind = NULL; + Value *ind = su->getIndirectR(); - if (su->tex.rIndirectSrc >= 0) { - ind = su->getIndirectR(); - if (su->tex.r > 0) { - ind = bld.mkOp2v(OP_ADD, TYPE_U32, bld.getSSA(), ind, - bld.loadImm(NULL, su->tex.r)); - } - ind = bld.mkOp2v(OP_AND, TYPE_U32, bld.getSSA(), ind, bld.mkImm(7)); - ind = bld.mkOp2v(OP_SHL, TYPE_U32, bld.getSSA(), ind, bld.mkImm(6)); - base = 0; - } + bld.setPosition(su, false); + + adjustCoordinatesMS(su); if (ind) { Value *ptr; @@ -2081,13 +2074,13 @@ // calculate pixel offset if (su->op == OP_SULDP || su->op == OP_SUREDP) { - v = loadSuInfo32(ind, base + NVE4_SU_INFO_BSIZE); + v = loadSuInfo32(ind, slot, NVC0_SU_INFO_BSIZE); su->setSrc(0, bld.mkOp2v(OP_MUL, TYPE_U32, bld.getSSA(), src[0], v)); } // add array layer offset if (su->tex.target.isArray() || su->tex.target.isCube()) { - v = loadSuInfo32(ind, base + NVE4_SU_INFO_ARRAY); + v = loadSuInfo32(ind, slot, NVC0_SU_INFO_ARRAY); assert(dim > 1); su->setSrc(2, bld.mkOp2v(OP_MUL, TYPE_U32, bld.getSSA(), src[2], v)); } @@ -2096,7 +2089,7 @@ CmpInstruction *pred = bld.mkCmp(OP_SET, CC_EQ, TYPE_U32, bld.getSSA(1, FILE_PREDICATE), TYPE_U32, bld.mkImm(0), - loadSuInfo32(ind, base + NVE4_SU_INFO_ADDR)); + loadSuInfo32(ind, slot, NVC0_SU_INFO_ADDR)); if (su->op != OP_SUSTP && su->tex.format) { const TexInstruction::ImgFormatDesc *format = su->tex.format; int blockwidth = format->bits[0] + format->bits[1] + @@ -2106,7 +2099,7 @@ // make sure that the format doesn't mismatch when it's not FMT_NONE bld.mkCmp(OP_SET_OR, CC_NE, TYPE_U32, pred->getDef(0), TYPE_U32, bld.loadImm(NULL, blockwidth / 8), - loadSuInfo32(ind, base + NVE4_SU_INFO_BSIZE), + loadSuInfo32(ind, slot, NVC0_SU_INFO_BSIZE), pred->getDef(0)); } su->setPredicate(CC_NOT_P, pred->getDef(0)); @@ -2166,6 +2159,78 @@ } } +void +NVC0LoweringPass::processSurfaceCoordsGM107(TexInstruction *su) +{ + const int slot = su->tex.r; + const int dim = su->tex.target.getDim(); + const int arg = dim + (su->tex.target.isArray() || su->tex.target.isCube()); + Value *ind = su->getIndirectR(); + int pos = 0; + + bld.setPosition(su, false); + + // add texture handle + switch (su->op) { + case OP_SUSTP: + pos = 4; + break; + case OP_SUREDP: + pos = (su->subOp == NV50_IR_SUBOP_ATOM_CAS) ? 2 : 1; + break; + default: + assert(pos == 0); + break; + } + su->setSrc(arg + pos, loadTexHandle(ind, slot + 32)); + + // prevent read fault when the image is not actually bound + CmpInstruction *pred = + bld.mkCmp(OP_SET, CC_EQ, TYPE_U32, bld.getSSA(1, FILE_PREDICATE), + TYPE_U32, bld.mkImm(0), + loadSuInfo32(ind, slot, NVC0_SU_INFO_ADDR)); + if (su->op != OP_SUSTP && su->tex.format) { + const TexInstruction::ImgFormatDesc *format = su->tex.format; + int blockwidth = format->bits[0] + format->bits[1] + + format->bits[2] + format->bits[3]; + + assert(format->components != 0); + // make sure that the format doesn't mismatch when it's not FMT_NONE + bld.mkCmp(OP_SET_OR, CC_NE, TYPE_U32, pred->getDef(0), + TYPE_U32, bld.loadImm(NULL, blockwidth / 8), + loadSuInfo32(ind, slot, NVC0_SU_INFO_BSIZE), + pred->getDef(0)); + } + su->setPredicate(CC_NOT_P, pred->getDef(0)); +} + +void +NVC0LoweringPass::handleSurfaceOpGM107(TexInstruction *su) +{ + processSurfaceCoordsGM107(su); + + if (su->op == OP_SULDP) + convertSurfaceFormat(su); + + if (su->op == OP_SUREDP) { + Value *def = su->getDef(0); + + su->op = OP_SUREDB; + su->setDef(0, bld.getSSA()); + + bld.setPosition(su, true); + + // make sure to initialize dst value when the atomic operation is not + // performed + Instruction *mov = bld.mkMov(bld.getSSA(), bld.loadImm(NULL, 0)); + + assert(su->cc == CC_NOT_P); + mov->setPredicate(CC_P, su->getPredicate()); + + bld.mkOp2(OP_UNION, TYPE_U32, def, su->getDef(0), mov->getDef(0)); + } +} + bool NVC0LoweringPass::handleWRSV(Instruction *i) { @@ -2216,41 +2281,40 @@ int8_t fileIndex = i->getSrc(0)->reg.fileIndex - 1; Value *ind = i->getIndirect(0, 1); + if (!ind && fileIndex == -1) + return; + if (ind) { // Clamp the UBO index when an indirect access is used to avoid // loading information from the wrong place in the driver cb. + // TODO - synchronize the max with the driver. ind = bld.mkOp2v(OP_MIN, TYPE_U32, ind, bld.mkOp2v(OP_ADD, TYPE_U32, bld.getSSA(), ind, bld.loadImm(NULL, fileIndex)), - bld.loadImm(NULL, 12)); + bld.loadImm(NULL, 13)); + fileIndex = 0; } - if (i->src(0).isIndirect(1)) { - Value *offset = bld.loadImm(NULL, i->getSrc(0)->reg.data.offset + typeSizeof(i->sType)); - Value *ptr = loadUboInfo64(ind, fileIndex * 16); - Value *length = loadUboLength32(ind, fileIndex * 16); - Value *pred = new_LValue(func, FILE_PREDICATE); - if (i->src(0).isIndirect(0)) { - bld.mkOp2(OP_ADD, TYPE_U64, ptr, ptr, i->getIndirect(0, 0)); - bld.mkOp2(OP_ADD, TYPE_U32, offset, offset, i->getIndirect(0, 0)); - } - i->getSrc(0)->reg.file = FILE_MEMORY_GLOBAL; - i->setIndirect(0, 1, NULL); - i->setIndirect(0, 0, ptr); - bld.mkCmp(OP_SET, CC_GT, TYPE_U32, pred, TYPE_U32, offset, length); - i->setPredicate(CC_NOT_P, pred); - if (i->defExists(0)) { - bld.mkMov(i->getDef(0), bld.mkImm(0)); - } - } else if (fileIndex >= 0) { - Value *ptr = loadUboInfo64(ind, fileIndex * 16); - if (i->src(0).isIndirect(0)) { - bld.mkOp2(OP_ADD, TYPE_U64, ptr, ptr, i->getIndirect(0, 0)); - } - i->getSrc(0)->reg.file = FILE_MEMORY_GLOBAL; - i->setIndirect(0, 1, NULL); - i->setIndirect(0, 0, ptr); + Value *offset = bld.loadImm(NULL, i->getSrc(0)->reg.data.offset + typeSizeof(i->sType)); + Value *ptr = loadUboInfo64(ind, fileIndex * 16); + Value *length = loadUboLength32(ind, fileIndex * 16); + Value *pred = new_LValue(func, FILE_PREDICATE); + if (i->src(0).isIndirect(0)) { + bld.mkOp2(OP_ADD, TYPE_U64, ptr, ptr, i->getIndirect(0, 0)); + bld.mkOp2(OP_ADD, TYPE_U32, offset, offset, i->getIndirect(0, 0)); } + i->getSrc(0)->reg.file = FILE_MEMORY_GLOBAL; + i->setIndirect(0, 1, NULL); + i->setIndirect(0, 0, ptr); + bld.mkCmp(OP_SET, CC_GT, TYPE_U32, pred, TYPE_U32, offset, length); + i->setPredicate(CC_NOT_P, pred); + Value *zero, *dst = i->getDef(0); + i->setDef(0, bld.getSSA()); + + bld.setPosition(i, true); + bld.mkMov((zero = bld.getSSA()), bld.mkImm(0)) + ->setPredicate(CC_P, pred); + bld.mkOp2(OP_UNION, TYPE_U32, dst, i->getDef(0), zero); } else if (i->src(0).isIndirect(1)) { Value *ptr; if (i->src(0).isIndirect(0)) @@ -2391,6 +2455,8 @@ i->setSrc(0, bld.mkImm(sv == SV_GRIDID ? 0 : 1)); return true; } + // Fallthrough + case SV_WORK_DIM: addr += prog->driver->prop.cp.gridInfoBase; bld.mkLoad(TYPE_U32, i->getDef(0), bld.mkSymbol(FILE_MEMORY_CONST, prog->driver->io.auxCBSlot, @@ -2450,9 +2516,13 @@ default: if (prog->getType() == Program::TYPE_TESSELLATION_EVAL && !i->perPatch) vtx = bld.mkOp1v(OP_PFETCH, TYPE_U32, bld.getSSA(), bld.mkImm(0)); - ld = bld.mkFetch(i->getDef(0), i->dType, - FILE_SHADER_INPUT, addr, i->getIndirect(0, 0), vtx); - ld->perPatch = i->perPatch; + if (prog->getType() == Program::TYPE_FRAGMENT) { + bld.mkInterp(NV50_IR_INTERP_FLAT, i->getDef(0), addr, NULL); + } else { + ld = bld.mkFetch(i->getDef(0), i->dType, + FILE_SHADER_INPUT, addr, i->getIndirect(0, 0), vtx); + ld->perPatch = i->perPatch; + } break; } bld.getBB()->remove(i); @@ -2656,7 +2726,9 @@ case OP_SUSTP: case OP_SUREDB: case OP_SUREDP: - if (targ->getChipset() >= NVISA_GK104_CHIPSET) + if (targ->getChipset() >= NVISA_GM107_CHIPSET) + handleSurfaceOpGM107(i->asTex()); + else if (targ->getChipset() >= NVISA_GK104_CHIPSET) handleSurfaceOpNVE4(i->asTex()); else handleSurfaceOpNVC0(i->asTex()); @@ -2673,13 +2745,30 @@ /* Kepler+ has a special opcode to compute a new base address to be used * for indirect loads. + * + * Maxwell+ has an additional similar requirement for indirect + * interpolation ops in frag shaders. */ - if (targ->getChipset() >= NVISA_GK104_CHIPSET && !i->perPatch && - (i->op == OP_VFETCH || i->op == OP_EXPORT) && i->src(0).isIndirect(0)) { + bool doAfetch = false; + if (targ->getChipset() >= NVISA_GK104_CHIPSET && + !i->perPatch && + (i->op == OP_VFETCH || i->op == OP_EXPORT) && + i->src(0).isIndirect(0)) { + doAfetch = true; + } + if (targ->getChipset() >= NVISA_GM107_CHIPSET && + (i->op == OP_LINTERP || i->op == OP_PINTERP) && + i->src(0).isIndirect(0)) { + doAfetch = true; + } + + if (doAfetch) { + Value *addr = cloneShallow(func, i->getSrc(0)); Instruction *afetch = bld.mkOp1(OP_AFETCH, TYPE_U32, bld.getSSA(), - cloneShallow(func, i->getSrc(0))); + i->getSrc(0)); afetch->setIndirect(0, 0, i->getIndirect(0, 0)); - i->src(0).get()->reg.data.offset = 0; + addr->reg.data.offset = 0; + i->setSrc(0, addr); i->setIndirect(0, 0, afetch->getDef(0)); } diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h --- mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h 2017-06-01 10:37:10.000000000 +0000 @@ -35,8 +35,9 @@ void handleDIV(Instruction *); // integer division, modulus void handleRCPRSQ(Instruction *); // double precision float recip/rsqrt void handleFTZ(Instruction *); + void handleTEXLOD(TexInstruction *); -private: +protected: BuildUtil bld; }; @@ -106,6 +107,7 @@ bool handleSUQ(TexInstruction *); bool handleATOM(Instruction *); bool handleCasExch(Instruction *, bool needCctl); + void handleSurfaceOpGM107(TexInstruction *); void handleSurfaceOpNVE4(TexInstruction *); void handleSurfaceOpNVC0(TexInstruction *); void handleSharedATOM(Instruction *); @@ -126,19 +128,16 @@ Value *loadResInfo32(Value *ptr, uint32_t off, uint16_t base); Value *loadResInfo64(Value *ptr, uint32_t off, uint16_t base); Value *loadResLength32(Value *ptr, uint32_t off, uint16_t base); - Value *loadSuInfo32(Value *ptr, uint32_t off); - Value *loadSuInfo64(Value *ptr, uint32_t off); - Value *loadSuLength32(Value *ptr, uint32_t off); - Value *loadBufInfo32(Value *ptr, uint32_t off); + Value *loadSuInfo32(Value *ptr, int slot, uint32_t off); Value *loadBufInfo64(Value *ptr, uint32_t off); Value *loadBufLength32(Value *ptr, uint32_t off); - Value *loadUboInfo32(Value *ptr, uint32_t off); Value *loadUboInfo64(Value *ptr, uint32_t off); Value *loadUboLength32(Value *ptr, uint32_t off); Value *loadMsInfo32(Value *ptr, uint32_t off); Value *loadTexHandle(Value *ptr, unsigned int slot); void adjustCoordinatesMS(TexInstruction *); + void processSurfaceCoordsGM107(TexInstruction *); void processSurfaceCoordsNVE4(TexInstruction *); void processSurfaceCoordsNVC0(TexInstruction *); void convertSurfaceFormat(TexInstruction *); diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp --- mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -192,10 +192,14 @@ { const Target *targ = prog->getTarget(); if (!targ->getOpInfo(insn).commutative) - if (insn->op != OP_SET && insn->op != OP_SLCT) + if (insn->op != OP_SET && insn->op != OP_SLCT && insn->op != OP_SUB) return; if (insn->src(1).getFile() != FILE_GPR) return; + // This is the special OP_SET used for alphatesting, we can't reverse its + // arguments as that will confuse the fixup code. + if (insn->op == OP_SET && insn->subOp) + return; Instruction *i0 = insn->getSrc(0)->getInsn(); Instruction *i1 = insn->getSrc(1)->getInsn(); @@ -228,6 +232,11 @@ else if (insn->op == OP_SLCT) insn->asCmp()->setCond = inverseCondCode(insn->asCmp()->setCond); + else + if (insn->op == OP_SUB) { + insn->src(0).mod = insn->src(0).mod ^ Modifier(NV50_IR_MOD_NEG); + insn->src(1).mod = insn->src(1).mod ^ Modifier(NV50_IR_MOD_NEG); + } } bool @@ -567,6 +576,16 @@ return; } break; + case OP_SUB: + switch (i->dType) { + case TYPE_F32: res.data.f32 = a->data.f32 - b->data.f32; break; + case TYPE_F64: res.data.f64 = a->data.f64 - b->data.f64; break; + case TYPE_S32: + case TYPE_U32: res.data.u32 = a->data.u32 - b->data.u32; break; + default: + return; + } + break; case OP_POW: switch (i->dType) { case TYPE_F32: res.data.f32 = pow(a->data.f32, b->data.f32); break; @@ -759,6 +778,9 @@ } break; } + case OP_SHLADD: + res.data.u32 = (a->data.u32 << b->data.u32) + c->data.u32; + break; default: return; } @@ -888,6 +910,14 @@ return; } break; + case OP_SHLADD: + if (imm2.isInteger(0)) { + i->op = OP_SHL; + i->setSrc(2, NULL); + foldCount++; + return; + } + break; default: return; } @@ -896,11 +926,30 @@ void ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s) { + const Target *target = prog->getTarget(); const int t = !s; const operation op = i->op; Instruction *newi = i; switch (i->op) { + case OP_SPLIT: { + bld.setPosition(i, false); + + uint8_t size = i->getDef(0)->reg.size; + uint32_t mask = (1ULL << size) - 1; + assert(size <= 32); + + uint64_t val = imm0.reg.data.u64; + for (int8_t d = 0; i->defExists(d); ++d) { + Value *def = i->getDef(d); + assert(def->reg.size == size); + + newi = bld.mkMov(def, bld.mkImm((uint32_t)(val & mask)), TYPE_U32); + val >>= size; + } + delete_Instruction(prog, i); + break; + } case OP_MUL: if (i->dType == TYPE_F32) tryCollapseChainedMULs(i, s, imm0); @@ -997,15 +1046,24 @@ i->src(1).mod = i->src(2).mod; i->setSrc(2, NULL); i->op = OP_ADD; + } else + if (s == 1 && !imm0.isNegative() && imm0.isPow2() && + target->isOpSupported(OP_SHLADD, i->dType)) { + i->op = OP_SHLADD; + imm0.applyLog2(); + i->setSrc(1, new_ImmediateValue(prog, imm0.reg.data.u32)); } break; case OP_ADD: + case OP_SUB: if (i->usesFlags()) break; if (imm0.isInteger(0)) { if (s == 0) { i->setSrc(0, i->getSrc(1)); i->src(0).mod = i->src(1).mod; + if (i->op == OP_SUB) + i->src(0).mod = i->src(0).mod ^ Modifier(NV50_IR_MOD_NEG); } i->setSrc(1, NULL); i->op = i->src(0).mod.getOp(); @@ -1202,6 +1260,17 @@ i->op = OP_EXTBF; i->setSrc(0, src->getSrc(0)); i->setSrc(1, new_ImmediateValue(prog, ext)); + } else if (src->op == OP_SHL && + src->src(1).getImmediate(imm1) && + i->src(t).mod == Modifier(0) && + util_is_power_of_two(~imm0.reg.data.u32 + 1) && + util_last_bit(~imm0.reg.data.u32) <= imm1.reg.data.u32) { + i->op = OP_MOV; + i->setSrc(s, NULL); + if (t) { + i->setSrc(0, i->getSrc(t)); + i->setSrc(t, NULL); + } } } break; @@ -2092,6 +2161,90 @@ // ============================================================================= +// ADD(SHL(a, b), c) -> SHLADD(a, b, c) +class LateAlgebraicOpt : public Pass +{ +private: + virtual bool visit(Instruction *); + + void handleADD(Instruction *); + bool tryADDToSHLADD(Instruction *); +}; + +void +LateAlgebraicOpt::handleADD(Instruction *add) +{ + Value *src0 = add->getSrc(0); + Value *src1 = add->getSrc(1); + + if (src0->reg.file != FILE_GPR || src1->reg.file != FILE_GPR) + return; + + if (prog->getTarget()->isOpSupported(OP_SHLADD, add->dType)) + tryADDToSHLADD(add); +} + +// ADD(SHL(a, b), c) -> SHLADD(a, b, c) +bool +LateAlgebraicOpt::tryADDToSHLADD(Instruction *add) +{ + Value *src0 = add->getSrc(0); + Value *src1 = add->getSrc(1); + ImmediateValue imm; + Instruction *shl; + Value *src; + int s; + + if (add->saturate || add->usesFlags() || typeSizeof(add->dType) == 8 + || isFloatType(add->dType)) + return false; + + if (src0->getUniqueInsn() && src0->getUniqueInsn()->op == OP_SHL) + s = 0; + else + if (src1->getUniqueInsn() && src1->getUniqueInsn()->op == OP_SHL) + s = 1; + else + return false; + + src = add->getSrc(s); + shl = src->getUniqueInsn(); + + if (shl->bb != add->bb || shl->usesFlags() || shl->subOp || shl->src(0).mod) + return false; + + if (!shl->src(1).getImmediate(imm)) + return false; + + add->op = OP_SHLADD; + add->setSrc(2, add->src(!s)); + // SHL can't have any modifiers, but the ADD source may have had + // one. Preserve it. + add->setSrc(0, shl->getSrc(0)); + if (s == 1) + add->src(0).mod = add->src(1).mod; + add->setSrc(1, new_ImmediateValue(shl->bb->getProgram(), imm.reg.data.u32)); + add->src(1).mod = Modifier(0); + + return true; +} + +bool +LateAlgebraicOpt::visit(Instruction *i) +{ + switch (i->op) { + case OP_ADD: + handleADD(i); + break; + default: + break; + } + + return true; +} + +// ============================================================================= + static inline void updateLdStOffset(Instruction *ldst, int32_t offset, Function *fn) { @@ -2826,6 +2979,7 @@ insn = insn->prev; if (insn && !insn->getPredicate() && !insn->asFlow() && + insn->op != OP_DISCARD && insn->op != OP_TEXBAR && !isTextureOp(insn->op) && // probably just nve4 !isSurfaceOp(insn->op) && // not confirmed @@ -3180,7 +3334,7 @@ for (ir = bb->getFirst(); ir; ir = ir->next) ir->serial = serial++; - for (ir = bb->getEntry(); ir; ir = next) { + for (ir = bb->getFirst(); ir; ir = next) { int s; Value *src = NULL; @@ -3396,6 +3550,7 @@ RUN_PASS(2, AlgebraicOpt, run); RUN_PASS(2, ModifierFolding, run); // before load propagation -> less checks RUN_PASS(1, ConstantFolding, foldAll); + RUN_PASS(2, LateAlgebraicOpt, run); RUN_PASS(1, LoadPropagation, run); RUN_PASS(1, IndirectPropagation, run); RUN_PASS(2, MemoryOpt, run); diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp --- mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -86,6 +86,7 @@ "mad", "fma", "sad", + "shladd", "abs", "neg", "not", @@ -210,6 +211,36 @@ "", "3d" }; +static const char *shflOpStr[] = +{ + "idx", "up", "down", "bfly" +}; + +static const char *pixldOpStr[] = +{ + "count", "covmask", "offset", "cent_offset", "sampleid" +}; + +static const char *rcprsqOpStr[] = +{ + "", "64h" +}; + +static const char *emitOpStr[] = +{ + "", "restart" +}; + +static const char *cctlOpStr[] = +{ + "", "", "", "", "", "iv", "ivall" +}; + +static const char *barOpStr[] = +{ + "sync", "arrive", "red and", "red or", "red popc" +}; + static const char *DataTypeStr[] = { "-", @@ -289,6 +320,10 @@ "VERTEX_STRIDE", "INVOCATION_INFO", "THREAD_KILL", + "BASEVERTEX", + "BASEINSTANCE", + "DRAWID", + "WORK_DIM", "?", "(INVALID)" }; @@ -546,6 +581,7 @@ PRINT("%s ", interpStr[ipa]); switch (op) { case OP_SUREDP: + case OP_SUREDB: case OP_ATOM: if (subOp < ARRAY_SIZE(atomSubOpStr)) PRINT("%s ", atomSubOpStr[subOp]); @@ -559,6 +595,31 @@ if (subOp < ARRAY_SIZE(subfmOpStr)) PRINT("%s ", subfmOpStr[subOp]); break; + case OP_SHFL: + if (subOp < ARRAY_SIZE(shflOpStr)) + PRINT("%s ", shflOpStr[subOp]); + break; + case OP_PIXLD: + if (subOp < ARRAY_SIZE(pixldOpStr)) + PRINT("%s ", pixldOpStr[subOp]); + break; + case OP_RCP: + case OP_RSQ: + if (subOp < ARRAY_SIZE(rcprsqOpStr)) + PRINT("%s ", rcprsqOpStr[subOp]); + break; + case OP_EMIT: + if (subOp < ARRAY_SIZE(emitOpStr)) + PRINT("%s ", emitOpStr[subOp]); + break; + case OP_CCTL: + if (subOp < ARRAY_SIZE(cctlOpStr)) + PRINT("%s ", cctlOpStr[subOp]); + break; + case OP_BAR: + if (subOp < ARRAY_SIZE(barOpStr)) + PRINT("%s ", barOpStr[subOp]); + break; default: if (subOp) PRINT("(SUBOP:%u) ", subOp); diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp --- mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -101,7 +101,7 @@ return (size < 4) ? u : ((u << unit[f]) / 4); } - void print() const; + void print(DataFile f) const; const bool restrictedGPR16Range; @@ -156,10 +156,10 @@ } void -RegisterSet::print() const +RegisterSet::print(DataFile f) const { INFO("GPR:"); - bits[FILE_GPR].print(); + bits[f].print(); INFO("\n"); } @@ -771,7 +771,7 @@ bool coalesce(ArrayList&); bool doCoalesce(ArrayList&, unsigned int mask); void calculateSpillWeights(); - void simplify(); + bool simplify(); bool selectRegisters(); void cleanup(const bool success); @@ -969,6 +969,7 @@ case 0x100: case 0x110: case 0x120: + case 0x130: ret = doCoalesce(insns, JOIN_MASK_UNION); break; default: @@ -1304,7 +1305,7 @@ (node->degree < node->degreeLimit) ? "" : "(spill)"); } -void +bool GCRA::simplify() { for (;;) { @@ -1329,11 +1330,11 @@ } if (isinf(bestScore)) { ERROR("no viable spill candidates left\n"); - break; + return false; } simplifyNode(best); } else { - break; + return true; } } } @@ -1424,7 +1425,7 @@ continue; LValue *lval = node->getValue(); if (prog->dbgFlags & NV50_IR_DEBUG_REG_ALLOC) - regs.print(); + regs.print(node->f); bool ret = regs.assign(node->reg, node->f, node->colors); if (ret) { INFO_DBG(prog->dbgFlags, REG_ALLOC, "assigned reg %i\n", node->reg); @@ -1492,7 +1493,9 @@ buildRIG(insns); calculateSpillWeights(); - simplify(); + ret = simplify(); + if (!ret) + goto out; ret = selectRegisters(); if (!ret) { @@ -2094,8 +2097,29 @@ textureMask(tex); condenseDefs(tex); - if (tex->op == OP_SUSTB || tex->op == OP_SUSTP) { - condenseSrcs(tex, 3, (3 + typeSizeof(tex->dType) / 4) - 1); + if (isSurfaceOp(tex->op)) { + int s = tex->tex.target.getDim() + + (tex->tex.target.isArray() || tex->tex.target.isCube()); + int n = 0; + + switch (tex->op) { + case OP_SUSTB: + case OP_SUSTP: + n = 4; + break; + case OP_SUREDB: + case OP_SUREDP: + if (tex->subOp == NV50_IR_SUBOP_ATOM_CAS) + n = 2; + break; + default: + break; + } + + if (s > 1) + condenseSrcs(tex, 0, s - 1); + if (n > 1) + condenseSrcs(tex, 1, n); // do not condense the tex handle } else if (isTextureOp(tex->op)) { if (tex->op != OP_TXQ) { @@ -2236,6 +2260,7 @@ break; case 0x110: case 0x120: + case 0x130: texConstraintGM107(tex); break; default: diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_target.cpp mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_target.cpp --- mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_target.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_target.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -30,7 +30,7 @@ 0, 0, // NOP, PHI 0, 0, 0, 0, // UNION, SPLIT, MERGE, CONSTRAINT 1, 1, 2, // MOV, LOAD, STORE - 2, 2, 2, 2, 2, 3, 3, 3, // ADD, SUB, MUL, DIV, MOD, MAD, FMA, SAD + 2, 2, 2, 2, 2, 3, 3, 3, 3, // ADD, SUB, MUL, DIV, MOD, MAD, FMA, SAD, SHLADD 1, 1, 1, // ABS, NEG, NOT 2, 2, 2, 2, 2, // AND, OR, XOR, SHL, SHR 2, 2, 1, // MAX, MIN, SAT @@ -70,10 +70,10 @@ OPCLASS_MOVE, OPCLASS_LOAD, OPCLASS_STORE, - // ADD, SUB, MUL; DIV, MOD; MAD, FMA, SAD + // ADD, SUB, MUL; DIV, MOD; MAD, FMA, SAD, SHLADD OPCLASS_ARITH, OPCLASS_ARITH, OPCLASS_ARITH, OPCLASS_ARITH, OPCLASS_ARITH, - OPCLASS_ARITH, OPCLASS_ARITH, OPCLASS_ARITH, + OPCLASS_ARITH, OPCLASS_ARITH, OPCLASS_ARITH, OPCLASS_ARITH, // ABS, NEG; NOT, AND, OR, XOR; SHL, SHR OPCLASS_CONVERT, OPCLASS_CONVERT, OPCLASS_LOGIC, OPCLASS_LOGIC, OPCLASS_LOGIC, OPCLASS_LOGIC, @@ -150,6 +150,7 @@ switch (chipset & ~0xf) { case 0x110: case 0x120: + case 0x130: return getTargetGM107(chipset); case 0xc0: case 0xd0: @@ -505,14 +506,16 @@ void nv50_ir_apply_fixups(void *fixupData, uint32_t *code, - bool force_persample_interp, bool flatshade) + bool force_persample_interp, bool flatshade, + uint8_t alphatest) { nv50_ir::FixupInfo *info = reinterpret_cast( fixupData); // force_persample_interp: all non-flat -> per-sample // flatshade: all color -> flat - nv50_ir::FixupData data(force_persample_interp, flatshade); + // alphatest: PIPE_FUNC_* to use with alphatest + nv50_ir::FixupData data(force_persample_interp, flatshade, alphatest); for (unsigned i = 0; i < info->count; ++i) info->entry[i].apply(&info->entry[i], code, data); } diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_target_gm107.cpp mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_target_gm107.cpp --- mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_target_gm107.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_target_gm107.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -68,6 +68,259 @@ return true; } +// Return true when an instruction supports the reuse flag. When supported, the +// hardware will use the operand reuse cache introduced since Maxwell, which +// should try to reduce bank conflicts by caching values for the subsequent +// instructions. Note that the next instructions have to use the same GPR id in +// the same operand slot. +bool +TargetGM107::isReuseSupported(const Instruction *insn) const +{ + const OpClass cl = getOpClass(insn->op); + + // TODO: double-check! + switch (cl) { + case OPCLASS_ARITH: + case OPCLASS_COMPARE: + case OPCLASS_LOGIC: + case OPCLASS_MOVE: + case OPCLASS_SHIFT: + return true; + case OPCLASS_BITFIELD: + if (insn->op == OP_INSBF || insn->op == OP_EXTBF) + return true; + break; + default: + break; + } + return false; +} + +// Return true when an instruction requires to set up a barrier because it +// doesn't operate at a fixed latency. Variable latency instructions are memory +// operations, double precision operations, special function unit operations +// and other low throughput instructions. +bool +TargetGM107::isBarrierRequired(const Instruction *insn) const +{ + const OpClass cl = getOpClass(insn->op); + + if (insn->dType == TYPE_F64 || insn->sType == TYPE_F64) + return true; + + switch (cl) { + case OPCLASS_ATOMIC: + case OPCLASS_LOAD: + case OPCLASS_STORE: + case OPCLASS_SURFACE: + case OPCLASS_TEXTURE: + return true; + case OPCLASS_SFU: + switch (insn->op) { + case OP_COS: + case OP_EX2: + case OP_LG2: + case OP_LINTERP: + case OP_PINTERP: + case OP_RCP: + case OP_RSQ: + case OP_SIN: + return true; + default: + break; + } + break; + case OPCLASS_BITFIELD: + switch (insn->op) { + case OP_BFIND: + case OP_POPCNT: + return true; + default: + break; + } + break; + case OPCLASS_CONTROL: + switch (insn->op) { + case OP_EMIT: + case OP_RESTART: + return true; + default: + break; + } + break; + case OPCLASS_OTHER: + switch (insn->op) { + case OP_AFETCH: + case OP_PFETCH: + case OP_PIXLD: + case OP_RDSV: + case OP_SHFL: + return true; + default: + break; + } + break; + case OPCLASS_ARITH: + // TODO: IMUL/IMAD require barriers too, use of XMAD instead! + if ((insn->op == OP_MUL || insn->op == OP_MAD) && + !isFloatType(insn->dType)) + return true; + break; + case OPCLASS_CONVERT: + if (insn->def(0).getFile() != FILE_PREDICATE && + insn->src(0).getFile() != FILE_PREDICATE) + return true; + break; + default: + break; + } + return false; +} + +bool +TargetGM107::canDualIssue(const Instruction *a, const Instruction *b) const +{ + // TODO + return false; +} + +// Return the number of stall counts needed to complete a single instruction. +// On Maxwell GPUs, the pipeline depth is 6, but some instructions require +// different number of stall counts like memory operations. +int +TargetGM107::getLatency(const Instruction *insn) const +{ + // TODO: better values! This should be good enough for now though. + switch (insn->op) { + case OP_EMIT: + case OP_EXPORT: + case OP_PIXLD: + case OP_RESTART: + case OP_STORE: + case OP_SUSTB: + case OP_SUSTP: + return 1; + case OP_SHFL: + return 2; + case OP_ADD: + case OP_AND: + case OP_EXTBF: + case OP_FMA: + case OP_INSBF: + case OP_MAD: + case OP_MAX: + case OP_MIN: + case OP_MOV: + case OP_MUL: + case OP_NOT: + case OP_OR: + case OP_PREEX2: + case OP_PRESIN: + case OP_QUADOP: + case OP_SELP: + case OP_SET: + case OP_SET_AND: + case OP_SET_OR: + case OP_SET_XOR: + case OP_SHL: + case OP_SHLADD: + case OP_SHR: + case OP_SLCT: + case OP_SUB: + case OP_VOTE: + case OP_XOR: + if (insn->dType != TYPE_F64) + return 6; + break; + case OP_ABS: + case OP_CEIL: + case OP_CVT: + case OP_FLOOR: + case OP_NEG: + case OP_SAT: + case OP_TRUNC: + if (insn->op == OP_CVT && (insn->def(0).getFile() == FILE_PREDICATE || + insn->src(0).getFile() == FILE_PREDICATE)) + return 6; + break; + case OP_BFIND: + case OP_COS: + case OP_EX2: + case OP_LG2: + case OP_POPCNT: + case OP_QUADON: + case OP_QUADPOP: + case OP_RCP: + case OP_RSQ: + case OP_SIN: + return 13; + default: + break; + } + // Use the maximum number of stall counts for other instructions. + return 15; +} + +// Return the operand read latency which is the number of stall counts before +// an instruction can read its sources. For memory operations like ATOM, LOAD +// and STORE, the memory access has to be indirect. +int +TargetGM107::getReadLatency(const Instruction *insn) const +{ + switch (insn->op) { + case OP_ABS: + case OP_BFIND: + case OP_CEIL: + case OP_COS: + case OP_EX2: + case OP_FLOOR: + case OP_LG2: + case OP_NEG: + case OP_POPCNT: + case OP_RCP: + case OP_RSQ: + case OP_SAT: + case OP_SIN: + case OP_SULDB: + case OP_SULDP: + case OP_SUREDB: + case OP_SUREDP: + case OP_SUSTB: + case OP_SUSTP: + case OP_TRUNC: + return 4; + case OP_CVT: + if (insn->def(0).getFile() != FILE_PREDICATE && + insn->src(0).getFile() != FILE_PREDICATE) + return 4; + break; + case OP_ATOM: + case OP_LOAD: + case OP_STORE: + if (insn->src(0).isIndirect(0)) { + switch (insn->src(0).getFile()) { + case FILE_MEMORY_SHARED: + case FILE_MEMORY_CONST: + return 2; + case FILE_MEMORY_GLOBAL: + case FILE_MEMORY_LOCAL: + return 4; + default: + break; + } + } + break; + case OP_EXPORT: + case OP_PFETCH: + case OP_SHFL: + case OP_VFETCH: + return 2; + default: + break; + } + return 0; +} + bool TargetGM107::runLegalizePass(Program *prog, CGStage stage) const { @@ -80,7 +333,7 @@ return pass.run(prog, false, true); } else if (stage == CG_STAGE_SSA) { - NVC0LegalizeSSA pass; + GM107LegalizeSSA pass; return pass.run(prog, false, true); } return false; diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_target_gm107.h mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_target_gm107.h --- mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_target_gm107.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_target_gm107.h 2017-06-01 10:37:10.000000000 +0000 @@ -16,6 +16,13 @@ virtual uint32_t getBuiltinOffset(int) const; virtual bool isOpSupported(operation, DataType) const; + virtual bool isReuseSupported(const Instruction *) const; + + virtual bool isBarrierRequired(const Instruction *) const; + + virtual bool canDualIssue(const Instruction *, const Instruction *) const; + virtual int getLatency(const Instruction *) const; + virtual int getReadLatency(const Instruction *) const; }; } // namespace nv50_ir diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_target.h mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_target.h --- mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_target.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_target.h 2017-06-01 10:37:10.000000000 +0000 @@ -59,10 +59,11 @@ }; struct FixupData { - FixupData(bool force, bool flat) : - force_persample_interp(force), flatshade(flat) {} + FixupData(bool force, bool flat, uint8_t alphatest) : + force_persample_interp(force), flatshade(flat), alphatest(alphatest) {} bool force_persample_interp; bool flatshade; + uint8_t alphatest; }; struct FixupEntry; @@ -174,6 +175,8 @@ virtual void parseDriverInfo(const struct nv50_ir_prog_info *info) { threads = info->prop.cp.numThreads; + if (threads == 0) + threads = info->target >= NVISA_GK104_CHIPSET ? 1024 : 512; } virtual bool runLegalizePass(Program *, CGStage stage) const = 0; diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp --- mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -113,13 +113,14 @@ static const uint32_t commutative[(OP_LAST + 31) / 32] = { - // ADD,MAD,MUL,AND,OR,XOR,MAX,MIN - 0x0670ca00, 0x0000003f, 0x00000000, 0x00000000 + // ADD, MUL, MAD, FMA, AND, OR, XOR, MAX, MIN, SET_AND, SET_OR, SET_XOR, + // SET, SELP, SLCT + 0x0ce0ca00, 0x0000007e, 0x00000000, 0x00000000 }; static const uint32_t shortForm[(OP_LAST + 31) / 32] = { - // MOV,ADD,SUB,MUL,MAD,SAD,L/PINTERP,RCP,TEX,TXF - 0x00014e40, 0x00000040, 0x00000930, 0x00000000 + // MOV, ADD, SUB, MUL, MAD, SAD, RCP, L/PINTERP, TEX, TXF + 0x00014e40, 0x00000080, 0x00001260, 0x00000000 }; static const operation noDestList[] = { @@ -437,6 +438,7 @@ case OP_EXTBF: case OP_EXIT: // want exit modifier instead (on NOP if required) case OP_MEMBAR: + case OP_SHLADD: return false; case OP_SAD: return ty == TYPE_S32; diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp --- mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -105,6 +105,8 @@ { OP_MAX, 0x3, 0x3, 0x0, 0x0, 0x2, 0x2 }, { OP_MIN, 0x3, 0x3, 0x0, 0x0, 0x2, 0x2 }, { OP_MAD, 0x7, 0x0, 0x0, 0x8, 0x6, 0x2 | 0x8 }, // special c[] constraint + { OP_FMA, 0x7, 0x0, 0x0, 0x8, 0x6, 0x2 | 0x8 }, // keep the same as OP_MAD + { OP_SHLADD, 0x5, 0x0, 0x0, 0x0, 0x4, 0x6 }, { OP_MADSP, 0x0, 0x0, 0x0, 0x0, 0x6, 0x2 }, { OP_ABS, 0x0, 0x0, 0x0, 0x0, 0x1, 0x0 }, { OP_NEG, 0x0, 0x1, 0x0, 0x0, 0x1, 0x0 }, @@ -156,14 +158,15 @@ static const uint32_t commutative[(OP_LAST + 31) / 32] = { - // ADD, MAD, MUL, AND, OR, XOR, MAX, MIN - 0x0670ca00, 0x0000003f, 0x00000000, 0x00000000 + // ADD, MUL, MAD, FMA, AND, OR, XOR, MAX, MIN, SET_AND, SET_OR, SET_XOR, + // SET, SELP, SLCT + 0x0ce0ca00, 0x0000007e, 0x00000000, 0x00000000 }; static const uint32_t shortForm[(OP_LAST + 31) / 32] = { - // ADD, MAD, MUL, AND, OR, XOR, PRESIN, PREEX2, SFN, CVT, PINTERP, MOV - 0x0670ca00, 0x00000000, 0x00000000, 0x00000000 + // ADD, MUL, MAD, FMA, AND, OR, XOR, MAX, MIN + 0x0ce0ca00, 0x00000000, 0x00000000, 0x00000000 }; static const operation noDest[] = @@ -295,6 +298,7 @@ case SV_NTID: return kepler ? (0x00 + idx * 4) : ~0; case SV_NCTAID: return kepler ? (0x0c + idx * 4) : ~0; case SV_GRIDID: return kepler ? 0x18 : ~0; + case SV_WORK_DIM: return 0x1c; case SV_SAMPLE_INDEX: return 0; case SV_SAMPLE_POS: return 0; case SV_SAMPLE_MASK: return 0; @@ -331,6 +335,8 @@ if (i->src(k).getFile() == FILE_IMMEDIATE) { if (k == 2 && i->op == OP_SUCLAMP) // special case continue; + if (k == 1 && i->op == OP_SHLADD) // special case + continue; if (i->getSrc(k)->reg.data.u64 != 0) return false; } else @@ -401,8 +407,13 @@ { if (ty == TYPE_NONE) return false; - if (file == FILE_MEMORY_CONST && getChipset() >= 0xe0) // wrong encoding ? - return typeSizeof(ty) <= 8; + if (file == FILE_MEMORY_CONST) { + if (getChipset() >= NVISA_GM107_CHIPSET) + return typeSizeof(ty) <= 4; + else + if (getChipset() >= NVISA_GK104_CHIPSET) // wrong encoding ? + return typeSizeof(ty) <= 8; + } if (ty == TYPE_B96) return false; return true; @@ -449,6 +460,12 @@ if (s == 0) return insn->src(1).mod.neg() ? false : true; break; + case OP_SHLADD: + if (s == 1) + return false; + if (insn->src(s ? 0 : 2).mod.neg()) + return false; + break; default: return false; } @@ -614,13 +631,29 @@ // not if the 2nd instruction isn't necessarily executed if (clA == OPCLASS_TEXTURE || clA == OPCLASS_FLOW) return false; + + // Check that a and b don't write to the same sources, nor that b reads + // anything that a writes. + if (!a->canCommuteDefDef(b) || !a->canCommuteDefSrc(b)) + return false; + // anything with MOV if (a->op == OP_MOV || b->op == OP_MOV) return true; if (clA == clB) { - // only F32 arith or integer additions - if (clA != OPCLASS_ARITH) + switch (clA) { + // there might be more + case OPCLASS_COMPARE: + if ((a->op == OP_MIN || a->op == OP_MAX) && + (b->op == OP_MIN || b->op == OP_MAX)) + break; return false; + case OPCLASS_ARITH: + break; + default: + return false; + } + // only F32 arith or integer additions return (a->dType == TYPE_F32 || a->op == OP_ADD || b->dType == TYPE_F32 || b->op == OP_ADD); } diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_util.cpp mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_util.cpp --- mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_util.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_util.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -297,8 +297,8 @@ unsigned int i; for (i = 0; i < (size + 31) / 32; ++i) data[i] = val; - if (val) - data[i] &= ~(0xffffffff << (size % 32)); // BE ? + if (val && i) + data[i - 1] &= (1 << (size % 32)) - 1; } void BitSet::setOr(BitSet *pA, BitSet *pB) diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_util.h mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_util.h --- mesa-12.0.6/src/gallium/drivers/nouveau/codegen/nv50_ir_util.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/codegen/nv50_ir_util.h 2017-06-01 10:37:10.000000000 +0000 @@ -94,7 +94,11 @@ virtual void reset() { assert(0); } // only for graph iterators }; +#if __cplusplus >= 201103L +typedef std::unique_ptr IteratorRef; +#else typedef std::auto_ptr IteratorRef; +#endif class ManipIterator : public Iterator { @@ -199,7 +203,7 @@ virtual void erase(); virtual bool insert(void *data); - // move item to a another list, no consistency with its iterators though + // move item to another list, no consistency with its iterators though void moveToList(DLList&); private: diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/Makefile.in mesa-17.0.7/src/gallium/drivers/nouveau/Makefile.in --- mesa-12.0.6/src/gallium/drivers/nouveau/Makefile.in 2017-01-24 01:41:46.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/Makefile.in 2017-06-01 10:37:20.000000000 +0000 @@ -112,10 +112,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -201,11 +204,13 @@ am_nouveau_compiler_OBJECTS = nouveau_compiler.$(OBJEXT) nouveau_compiler_OBJECTS = $(am_nouveau_compiler_OBJECTS) am__DEPENDENCIES_1 = -am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ - $(am__DEPENDENCIES_1) +@HAVE_LIBDRM_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) +am__DEPENDENCIES_3 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_2) nouveau_compiler_DEPENDENCIES = libnouveau.la \ $(top_builddir)/src/gallium/auxiliary/libgallium.la \ - $(top_builddir)/src/util/libmesautil.la $(am__DEPENDENCIES_2) + $(top_builddir)/src/util/libmesautil.la $(am__DEPENDENCIES_3) AM_V_P = $(am__v_P_@AM_V@) am__v_P_ = $(am__v_P_@AM_DEFAULT_V@) am__v_P_0 = false @@ -294,6 +299,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -308,6 +315,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -337,10 +345,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -390,11 +399,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -434,8 +440,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -472,8 +476,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -482,7 +484,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -490,13 +491,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -525,6 +527,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -829,12 +832,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -846,7 +845,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CPPFLAGS = \ $(GALLIUM_DRIVER_CFLAGS) \ $(LIBDRM_CFLAGS) \ diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nouveau_buffer.c mesa-17.0.7/src/gallium/drivers/nouveau/nouveau_buffer.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nouveau_buffer.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nouveau_buffer.c 2017-06-01 10:37:10.000000000 +0000 @@ -163,7 +163,7 @@ return tx->map; } -/* Copies data from the resource into the the transfer's temporary GART +/* Copies data from the resource into the transfer's temporary GART * buffer. Also updates buf->data if present. * * Maybe just migrate to GART right away if we actually need to do this. */ @@ -406,9 +406,6 @@ !util_ranges_intersect(&buf->valid_buffer_range, box->x, box->x + box->width)) usage |= PIPE_TRANSFER_DISCARD_RANGE | PIPE_TRANSFER_UNSYNCHRONIZED; - if (usage & PIPE_TRANSFER_PERSISTENT) - usage |= PIPE_TRANSFER_UNSYNCHRONIZED; - if (buf->domain == NOUVEAU_BO_VRAM) { if (usage & NOUVEAU_TRANSFER_DISCARD) { /* Set up a staging area for the user to write to. It will be copied @@ -476,7 +473,8 @@ * complete its operation, or set up a staging area to perform our work in. */ if (nouveau_buffer_busy(buf, usage & PIPE_TRANSFER_READ_WRITE)) { - if (unlikely(usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE)) { + if (unlikely(usage & (PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE | + PIPE_TRANSFER_PERSISTENT))) { /* Discarding was not possible, must sync because * subsequent transfers might use UNSYNCHRONIZED. */ nouveau_buffer_sync(nv, buf, usage & PIPE_TRANSFER_READ_WRITE); @@ -634,7 +632,6 @@ nouveau_buffer_transfer_map, /* transfer_map */ nouveau_buffer_transfer_flush_region, /* transfer_flush_region */ nouveau_buffer_transfer_unmap, /* transfer_unmap */ - u_default_transfer_inline_write /* transfer_inline_write */ }; struct pipe_resource * diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nouveau_compiler.c mesa-17.0.7/src/gallium/drivers/nouveau/nouveau_compiler.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nouveau_compiler.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nouveau_compiler.c 2017-06-01 10:37:10.000000000 +0000 @@ -142,7 +142,7 @@ const char *filename = NULL; FILE *f; char text[65536] = {0}; - unsigned size, *code; + unsigned size = 0, *code = NULL; for (i = 1; i < argc; i++) { if (!strcmp(argv[i], "-a")) diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nouveau_fence.c mesa-17.0.7/src/gallium/drivers/nouveau/nouveau_fence.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nouveau_fence.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nouveau_fence.c 2017-06-01 10:37:10.000000000 +0000 @@ -30,8 +30,7 @@ #endif bool -nouveau_fence_new(struct nouveau_screen *screen, struct nouveau_fence **fence, - bool emit) +nouveau_fence_new(struct nouveau_screen *screen, struct nouveau_fence **fence) { *fence = CALLOC_STRUCT(nouveau_fence); if (!*fence) @@ -41,9 +40,6 @@ (*fence)->ref = 1; LIST_INITHEAD(&(*fence)->work); - if (emit) - nouveau_fence_emit(*fence); - return true; } @@ -242,7 +238,7 @@ nouveau_fence_ref(NULL, &screen->fence.current); - nouveau_fence_new(screen, &screen->fence.current, false); + nouveau_fence_new(screen, &screen->fence.current); } void diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nouveau_fence.h mesa-17.0.7/src/gallium/drivers/nouveau/nouveau_fence.h --- mesa-12.0.6/src/gallium/drivers/nouveau/nouveau_fence.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nouveau_fence.h 2017-06-01 10:37:10.000000000 +0000 @@ -32,8 +32,7 @@ void nouveau_fence_emit(struct nouveau_fence *); void nouveau_fence_del(struct nouveau_fence *); -bool nouveau_fence_new(struct nouveau_screen *, struct nouveau_fence **, - bool emit); +bool nouveau_fence_new(struct nouveau_screen *, struct nouveau_fence **); bool nouveau_fence_work(struct nouveau_fence *, void (*)(void *), void *); void nouveau_fence_update(struct nouveau_screen *, bool flushed); void nouveau_fence_next(struct nouveau_screen *); diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nouveau_screen.c mesa-17.0.7/src/gallium/drivers/nouveau/nouveau_screen.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nouveau_screen.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nouveau_screen.c 2017-06-01 10:37:10.000000000 +0000 @@ -70,6 +70,7 @@ static boolean nouveau_screen_fence_finish(struct pipe_screen *screen, + struct pipe_context *ctx, struct pipe_fence_handle *pfence, uint64_t timeout) { diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv30/nv30_clear.c mesa-17.0.7/src/gallium/drivers/nouveau/nv30/nv30_clear.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nv30/nv30_clear.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv30/nv30_clear.c 2017-06-01 10:37:10.000000000 +0000 @@ -101,7 +101,8 @@ static void nv30_clear_render_target(struct pipe_context *pipe, struct pipe_surface *ps, const union pipe_color_union *color, - unsigned x, unsigned y, unsigned w, unsigned h) + unsigned x, unsigned y, unsigned w, unsigned h, + bool render_condition_enabled) { struct nv30_context *nv30 = nv30_context(pipe); struct nv30_surface *sf = nv30_surface(ps); @@ -160,7 +161,8 @@ static void nv30_clear_depth_stencil(struct pipe_context *pipe, struct pipe_surface *ps, unsigned buffers, double depth, unsigned stencil, - unsigned x, unsigned y, unsigned w, unsigned h) + unsigned x, unsigned y, unsigned w, unsigned h, + bool render_condition_enabled) { struct nv30_context *nv30 = nv30_context(pipe); struct nv30_surface *sf = nv30_surface(ps); diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv30/nv30_draw.c mesa-17.0.7/src/gallium/drivers/nouveau/nv30/nv30_draw.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nv30/nv30_draw.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv30/nv30_draw.c 2017-06-01 10:37:10.000000000 +0000 @@ -354,6 +354,9 @@ BEGIN_NV04(push, NV30_3D(DEPTH_RANGE_NEAR), 2); PUSH_DATAf(push, 0.0); PUSH_DATAf(push, 1.0); + BEGIN_NV04(push, NV30_3D(VIEWPORT_HORIZ), 2); + PUSH_DATA (push, nv30->framebuffer.width << 16); + PUSH_DATA (push, nv30->framebuffer.height << 16); BEGIN_NV04(push, NV30_3D(VTXFMT(0)), 16); PUSH_DATAp(push, r->vtxfmt, 16); diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv30/nv30_fragtex.c mesa-17.0.7/src/gallium/drivers/nouveau/nv30/nv30_fragtex.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nv30/nv30_fragtex.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv30/nv30_fragtex.c 2017-06-01 10:37:10.000000000 +0000 @@ -196,7 +196,7 @@ static void -nv30_set_sampler_views(struct pipe_context *pipe, unsigned shader, +nv30_set_sampler_views(struct pipe_context *pipe, enum pipe_shader_type shader, unsigned start, unsigned nr, struct pipe_sampler_view **views) { diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv30/nv30_miptree.c mesa-17.0.7/src/gallium/drivers/nouveau/nv30/nv30_miptree.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nv30/nv30_miptree.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv30/nv30_miptree.c 2017-06-01 10:37:10.000000000 +0000 @@ -358,7 +358,6 @@ nv30_miptree_transfer_map, u_default_transfer_flush_region, nv30_miptree_transfer_unmap, - u_default_transfer_inline_write }; struct pipe_resource * diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv30/nv30_resource.c mesa-17.0.7/src/gallium/drivers/nouveau/nv30/nv30_resource.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nv30/nv30_resource.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv30/nv30_resource.c 2017-06-01 10:37:10.000000000 +0000 @@ -90,7 +90,8 @@ pipe->transfer_map = u_transfer_map_vtbl; pipe->transfer_flush_region = u_transfer_flush_region_vtbl; pipe->transfer_unmap = u_transfer_unmap_vtbl; - pipe->transfer_inline_write = u_transfer_inline_write_vtbl; + pipe->buffer_subdata = u_default_buffer_subdata; + pipe->texture_subdata = u_default_texture_subdata; pipe->create_surface = nv30_miptree_surface_new; pipe->surface_destroy = nv30_miptree_surface_del; pipe->resource_copy_region = nv30_resource_copy_region; diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv30/nv30_screen.c mesa-17.0.7/src/gallium/drivers/nouveau/nv30/nv30_screen.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nv30/nv30_screen.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv30/nv30_screen.c 2017-06-01 10:37:10.000000000 +0000 @@ -119,6 +119,7 @@ case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR: /* XXX: yes? */ case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS: case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME: + case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS: case PIPE_CAP_MIN_TEXEL_OFFSET: case PIPE_CAP_MAX_TEXEL_OFFSET: case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET: @@ -196,6 +197,16 @@ case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR: case PIPE_CAP_CULL_DISTANCE: case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES: + case PIPE_CAP_TGSI_VOTE: + case PIPE_CAP_MAX_WINDOW_RECTANGLES: + case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED: + case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS: + case PIPE_CAP_MIXED_COLOR_DEPTH_BITS: + case PIPE_CAP_TGSI_ARRAY_COMPONENTS: + case PIPE_CAP_TGSI_CAN_READ_OUTPUTS: + case PIPE_CAP_NATIVE_FENCE_FD: + case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY: + case PIPE_CAP_TGSI_FS_FBFETCH: return 0; case PIPE_CAP_VENDOR_ID: @@ -293,6 +304,7 @@ case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: + case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: return 0; default: debug_printf("unknown vertex shader param %d\n", param); @@ -341,6 +353,7 @@ case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: + case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: return 0; default: debug_printf("unknown fragment shader param %d\n", param); @@ -369,10 +382,8 @@ return false; } - /* transfers & shared are always supported */ - bindings &= ~(PIPE_BIND_TRANSFER_READ | - PIPE_BIND_TRANSFER_WRITE | - PIPE_BIND_SHARED); + /* shared is always supported */ + bindings &= ~PIPE_BIND_SHARED; return (nv30_format_info(pscreen, format)->bindings & bindings) == bindings; } @@ -724,6 +735,6 @@ nouveau_pushbuf_kick(push, push->channel); - nouveau_fence_new(&screen->base, &screen->base.fence.current, false); + nouveau_fence_new(&screen->base, &screen->base.fence.current); return &screen->base; } diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv30/nv30_state.c mesa-17.0.7/src/gallium/drivers/nouveau/nv30/nv30_state.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nv30/nv30_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv30/nv30_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -327,7 +327,7 @@ static void nv30_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, - struct pipe_constant_buffer *cb) + const struct pipe_constant_buffer *cb) { struct nv30_context *nv30 = nv30_context(pipe); struct pipe_resource *buf = cb ? cb->buffer : NULL; diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv30/nv30_state_validate.c mesa-17.0.7/src/gallium/drivers/nouveau/nv30/nv30_state_validate.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nv30/nv30_state_validate.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv30/nv30_state_validate.c 2017-06-01 10:37:10.000000000 +0000 @@ -107,9 +107,6 @@ PUSH_DATA (push, w << 16); PUSH_DATA (push, h << 16); PUSH_DATA (push, rt_format); - BEGIN_NV04(push, NV30_3D(VIEWPORT_HORIZ), 2); - PUSH_DATA (push, w << 16); - PUSH_DATA (push, h << 16); BEGIN_NV04(push, NV30_3D(VIEWPORT_TX_ORIGIN), 4); PUSH_DATA (push, (y << 16) | x); PUSH_DATA (push, 0); @@ -250,6 +247,11 @@ struct nouveau_pushbuf *push = nv30->base.pushbuf; struct pipe_viewport_state *vp = &nv30->viewport; + unsigned x = CLAMP(vp->translate[0] - fabsf(vp->scale[0]), 0, 4095); + unsigned y = CLAMP(vp->translate[1] - fabsf(vp->scale[1]), 0, 4095); + unsigned w = CLAMP(2.0f * fabsf(vp->scale[0]), 0, 4096); + unsigned h = CLAMP(2.0f * fabsf(vp->scale[1]), 0, 4096); + BEGIN_NV04(push, NV30_3D(VIEWPORT_TRANSLATE_X), 8); PUSH_DATAf(push, vp->translate[0]); PUSH_DATAf(push, vp->translate[1]); @@ -258,10 +260,14 @@ PUSH_DATAf(push, vp->scale[0]); PUSH_DATAf(push, vp->scale[1]); PUSH_DATAf(push, vp->scale[2]); - PUSH_DATAf(push, 1.0f); + PUSH_DATAf(push, 0.0f); BEGIN_NV04(push, NV30_3D(DEPTH_RANGE_NEAR), 2); PUSH_DATAf(push, vp->translate[2] - fabsf(vp->scale[2])); PUSH_DATAf(push, vp->translate[2] + fabsf(vp->scale[2])); + + BEGIN_NV04(push, NV30_3D(VIEWPORT_HORIZ), 2); + PUSH_DATA (push, (w << 16) | x); + PUSH_DATA (push, (h << 16) | y); } static void diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv30/nv30_texture.c mesa-17.0.7/src/gallium/drivers/nouveau/nv30/nv30_texture.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nv30/nv30_texture.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv30/nv30_texture.c 2017-06-01 10:37:10.000000000 +0000 @@ -188,7 +188,7 @@ static void nv30_bind_sampler_states(struct pipe_context *pipe, - unsigned shader, unsigned start_slot, + enum pipe_shader_type shader, unsigned start_slot, unsigned num_samplers, void **samplers) { switch (shader) { @@ -198,6 +198,9 @@ case PIPE_SHADER_FRAGMENT: nv30_fragtex_sampler_states_bind(pipe, num_samplers, samplers); break; + default: + assert(!"unexpected shader type"); + break; } } diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv30/nv30_transfer.c mesa-17.0.7/src/gallium/drivers/nouveau/nv30/nv30_transfer.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nv30/nv30_transfer.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv30/nv30_transfer.c 2017-06-01 10:37:10.000000000 +0000 @@ -664,8 +664,7 @@ {} }; - method = methods - 1; - while ((++method)->possible) { + for (method = methods; method->possible; method++) { if (method->possible(nv30, filter, src, dst)) { method->execute(nv30, filter, src, dst); return; diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv30/nvfx_fragprog.c mesa-17.0.7/src/gallium/drivers/nouveau/nv30/nvfx_fragprog.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nv30/nvfx_fragprog.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv30/nvfx_fragprog.c 2017-06-01 10:37:10.000000000 +0000 @@ -533,9 +533,6 @@ sat = finst->Instruction.Saturate; switch (finst->Instruction.Opcode) { - case TGSI_OPCODE_ABS: - nvfx_fp_emit(fpc, arith(sat, MOV, dst, mask, abs(src[0]), none, none)); - break; case TGSI_OPCODE_ADD: nvfx_fp_emit(fpc, arith(sat, ADD, dst, mask, src[0], src[1], none)); break; @@ -753,9 +750,6 @@ } break; } - case TGSI_OPCODE_SUB: - nvfx_fp_emit(fpc, arith(sat, ADD, dst, mask, src[0], neg(src[1]), none)); - break; case TGSI_OPCODE_TEX: nvfx_fp_emit(fpc, tex(sat, TEX, unit, dst, mask, src[0], none, none)); break; diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv30/nvfx_vertprog.c mesa-17.0.7/src/gallium/drivers/nouveau/nv30/nvfx_vertprog.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nv30/nvfx_vertprog.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv30/nvfx_vertprog.c 2017-06-01 10:37:10.000000000 +0000 @@ -549,9 +549,6 @@ } switch (finst->Instruction.Opcode) { - case TGSI_OPCODE_ABS: - nvfx_vp_emit(vpc, arith(sat, VEC, MOV, dst, mask, abs(src[0]), none, none)); - break; case TGSI_OPCODE_ADD: nvfx_vp_emit(vpc, arith(sat, VEC, ADD, dst, mask, src[0], none, src[1])); break; @@ -675,9 +672,6 @@ case TGSI_OPCODE_SSG: nvfx_vp_emit(vpc, arith(sat, VEC, SSG, dst, mask, src[0], none, none)); break; - case TGSI_OPCODE_SUB: - nvfx_vp_emit(vpc, arith(sat, VEC, ADD, dst, mask, src[0], none, neg(src[1]))); - break; case TGSI_OPCODE_TRUNC: tmp = nvfx_src(temp(vpc)); insn = arith(0, VEC, MOV, none.reg, mask, src[0], none, none); diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv50/g80_defs.xml.h mesa-17.0.7/src/gallium/drivers/nouveau/nv50/g80_defs.xml.h --- mesa-12.0.6/src/gallium/drivers/nouveau/nv50/g80_defs.xml.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv50/g80_defs.xml.h 2017-06-01 10:37:10.000000000 +0000 @@ -177,6 +177,7 @@ #define GK104_IMAGE_FORMAT_RG32_FLOAT 0x0000000d #define GK104_IMAGE_FORMAT_RG32_SINT 0x0000000e #define GK104_IMAGE_FORMAT_RG32_UINT 0x0000000f +#define GK104_IMAGE_FORMAT_BGRA8_UNORM 0x00000011 #define GK104_IMAGE_FORMAT_RGB10_A2_UNORM 0x00000013 #define GK104_IMAGE_FORMAT_RGB10_A2_UINT 0x00000015 #define GK104_IMAGE_FORMAT_RGBA8_UNORM 0x00000018 diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_context.c mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_context.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -43,7 +43,7 @@ } static void -nv50_texture_barrier(struct pipe_context *pipe) +nv50_texture_barrier(struct pipe_context *pipe, unsigned flags) { struct nouveau_pushbuf *push = nv50_context(pipe)->base.pushbuf; @@ -310,14 +310,7 @@ nv50->base.screen = &screen->base; nv50->base.copy_data = nv50_m2mf_copy_linear; nv50->base.push_data = nv50_sifc_linear_u8; - /* FIXME: Make it possible to use this again. The problem is that there is - * some clever logic in the card that allows for multiple renders to happen - * when there are only constbuf changes. However that relies on the - * constbuf updates happening to the right constbuf slots. Currently - * implementation just makes it go through a separate slot which doesn't - * properly update the right constbuf data. nv50->base.push_cb = nv50_cb_push; - */ nv50->screen = screen; pipe->screen = pscreen; diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_context.h mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_context.h --- mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_context.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_context.h 2017-06-01 10:37:10.000000000 +0000 @@ -47,6 +47,7 @@ #define NV50_NEW_3D_SAMPLERS (1 << 20) #define NV50_NEW_3D_STRMOUT (1 << 21) #define NV50_NEW_3D_MIN_SAMPLES (1 << 22) +#define NV50_NEW_3D_WINDOW_RECTS (1 << 23) #define NV50_NEW_3D_CONTEXT (1 << 31) #define NV50_NEW_CP_PROGRAM (1 << 0) @@ -96,7 +97,10 @@ /* Sample position pairs for the current output MS level */ #define NV50_CB_AUX_SAMPLE_OFFSET 0x300 #define NV50_CB_AUX_SAMPLE_OFFSET_SIZE (4 * 8 * 2) -/* next spot: 0x340 */ +/* Alpha test ref value */ +#define NV50_CB_AUX_ALPHATEST_OFFSET 0x340 +#define NV50_CB_AUX_ALPHATEST_SIZE (4) +/* next spot: 0x344 */ /* 4 32-bit floats for the vertex runout, put at the end */ #define NV50_CB_AUX_RUNOUT_OFFSET (NV50_CB_AUX_SIZE - 0x10) @@ -168,6 +172,7 @@ struct pipe_viewport_state viewports[NV50_MAX_VIEWPORTS]; unsigned viewports_dirty; struct pipe_clip_state clip; + struct nv50_window_rect_stateobj window_rect; unsigned sample_mask; unsigned min_samples; @@ -281,8 +286,7 @@ unsigned size); void nv50_cb_push(struct nouveau_context *nv, - struct nouveau_bo *bo, unsigned domain, - unsigned base, unsigned size, + struct nv04_resource *res, unsigned offset, unsigned words, const uint32_t *data); /* nv50_vbo.c */ diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_formats.c mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_formats.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_formats.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_formats.c 2017-06-01 10:37:10.000000000 +0000 @@ -50,6 +50,7 @@ #define U_IB PIPE_BIND_BLENDABLE | U_IR #define U_TD PIPE_BIND_SCANOUT | PIPE_BIND_DISPLAY_TARGET | U_TB #define U_TZ PIPE_BIND_DEPTH_STENCIL | U_T +#define U_ID U_TD | U_I #if NOUVEAU_DRIVER == 0xc0 # define U_TC U_TB # define U_IC U_IB @@ -122,7 +123,7 @@ const struct nv50_format nv50_format_table[PIPE_FORMAT_COUNT] = #endif { - C4(A, B8G8R8A8_UNORM, BGRA8_UNORM, B, G, R, A, UNORM, A8B8G8R8, TD), + C4(A, B8G8R8A8_UNORM, BGRA8_UNORM, B, G, R, A, UNORM, A8B8G8R8, ID), F3(A, B8G8R8X8_UNORM, BGRX8_UNORM, B, G, R, xx, UNORM, A8B8G8R8, TD), C4(A, B8G8R8A8_SRGB, BGRA8_SRGB, B, G, R, A, UNORM, A8B8G8R8, TD), F3(A, B8G8R8X8_SRGB, BGRX8_SRGB, B, G, R, xx, UNORM, A8B8G8R8, TD), diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_miptree.c mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_miptree.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_miptree.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_miptree.c 2017-06-01 10:37:10.000000000 +0000 @@ -204,7 +204,6 @@ nv50_miptree_transfer_map, /* transfer_map */ u_default_transfer_flush_region, /* transfer_flush_region */ nv50_miptree_transfer_unmap, /* transfer_unmap */ - u_default_transfer_inline_write /* transfer_inline_write */ }; static inline bool diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_program.c mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_program.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_program.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_program.c 2017-06-01 10:37:10.000000000 +0000 @@ -337,6 +337,8 @@ info->io.auxCBSlot = 15; info->io.ucpBase = NV50_CB_AUX_UCP_OFFSET; info->io.genUserClip = prog->vp.clpd_nr; + if (prog->fp.alphatest) + info->io.alphaRefBase = NV50_CB_AUX_ALPHATEST_OFFSET; info->io.suInfoBase = NV50_CB_AUX_TEX_MS_OFFSET; info->io.sampleInfoBase = NV50_CB_AUX_SAMPLE_OFFSET; @@ -491,7 +493,8 @@ if (prog->interps) nv50_ir_apply_fixups(prog->interps, prog->code, prog->fp.force_persample_interp, - false /* flatshade */); + false /* flatshade */, + prog->fp.alphatest - 1); nv50_sifc_linear_u8(&nv50->base, nv50->screen->code, (prog_type << NV50_CODE_BO_SIZE_LOG2) + prog->code_base, diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_program.h mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_program.h --- mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_program.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_program.h 2017-06-01 10:37:10.000000000 +0000 @@ -59,7 +59,6 @@ unsigned code_size; unsigned code_base; uint32_t *immd; - unsigned immd_size; unsigned parm_size; /* size limit of uniform buffer */ uint32_t tls_space; /* required local memory per thread */ @@ -90,6 +89,7 @@ uint32_t colors; /* 0x1904 */ uint8_t has_samplemask; uint8_t force_persample_interp; + uint8_t alphatest; } fp; struct { diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_query.c mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_query.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_query.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_query.c 2017-06-01 10:37:10.000000000 +0000 @@ -208,13 +208,11 @@ if (screen->base.class_3d >= NV84_3D_CLASS) { info->name = "MP counters"; - /* Because we can't expose the number of hardware counters needed - * for each different query, we don't want to allow more than one - * active query simultaneously to avoid failure when the maximum - * number of counters is reached. Note that these groups of GPU - * counters are currently only used by AMD_performance_monitor. - */ - info->max_active_queries = 1; + /* Expose the maximum number of hardware counters available, + * although some queries use more than one counter. Expect failures + * in that case but as performance counters are for developers, + * this should not have a real impact. */ + info->max_active_queries = 4; info->num_queries = NV50_HW_SM_QUERY_COUNT; return 1; } @@ -224,7 +222,7 @@ if (screen->compute) { if (screen->base.class_3d >= NV84_3D_CLASS) { info->name = "Performance metrics"; - info->max_active_queries = 1; + info->max_active_queries = 2; /* A metric uses at least 2 queries */ info->num_queries = NV50_HW_METRIC_QUERY_COUNT; return 1; } diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_resource.c mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_resource.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_resource.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_resource.c 2017-06-01 10:37:10.000000000 +0000 @@ -97,7 +97,8 @@ pcontext->transfer_map = u_transfer_map_vtbl; pcontext->transfer_flush_region = u_transfer_flush_region_vtbl; pcontext->transfer_unmap = u_transfer_unmap_vtbl; - pcontext->transfer_inline_write = u_transfer_inline_write_vtbl; + pcontext->buffer_subdata = u_default_buffer_subdata; + pcontext->texture_subdata = u_default_texture_subdata; pcontext->create_surface = nv50_surface_create; pcontext->surface_destroy = nv50_surface_destroy; pcontext->invalidate_resource = nv50_invalidate_resource; diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_screen.c mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_screen.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_screen.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_screen.c 2017-06-01 10:37:10.000000000 +0000 @@ -75,10 +75,8 @@ sample_count > 1) return false; - /* transfers & shared are always supported */ - bindings &= ~(PIPE_BIND_TRANSFER_READ | - PIPE_BIND_TRANSFER_WRITE | - PIPE_BIND_LINEAR | + /* shared is always supported */ + bindings &= ~(PIPE_BIND_LINEAR | PIPE_BIND_SHARED); return (( nv50_format_table[format].usage | @@ -141,6 +139,8 @@ return PIPE_ENDIAN_LITTLE; case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS: return (class_3d >= NVA3_3D_CLASS) ? 4 : 0; + case PIPE_CAP_MAX_WINDOW_RECTANGLES: + return NV50_MAX_WINDOW_RECTANGLES; /* supported caps */ case PIPE_CAP_TEXTURE_MIRROR_CLAMP: @@ -148,6 +148,7 @@ case PIPE_CAP_TEXTURE_SHADOW_MAP: case PIPE_CAP_NPOT_TEXTURES: case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES: + case PIPE_CAP_MIXED_COLOR_DEPTH_BITS: case PIPE_CAP_ANISOTROPIC_FILTER: case PIPE_CAP_TEXTURE_BUFFER_OBJECTS: case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT: @@ -196,6 +197,7 @@ case PIPE_CAP_INVALIDATE_BUFFER: case PIPE_CAP_STRING_MARKER: case PIPE_CAP_CULL_DISTANCE: + case PIPE_CAP_TGSI_ARRAY_COMPONENTS: return 1; case PIPE_CAP_SEAMLESS_CUBE_MAP: return 1; /* class_3d >= NVA0_3D_CLASS; */ @@ -249,6 +251,14 @@ case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT: case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR: case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES: + case PIPE_CAP_TGSI_VOTE: + case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED: + case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS: + case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS: + case PIPE_CAP_TGSI_CAN_READ_OUTPUTS: + case PIPE_CAP_NATIVE_FENCE_FD: + case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY: + case PIPE_CAP_TGSI_FS_FBFETCH: return 0; case PIPE_CAP_VENDOR_ID: @@ -305,9 +315,9 @@ return 65536; case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: return NV50_MAX_PIPE_CONSTBUFS; - case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: return shader != PIPE_SHADER_FRAGMENT; + case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: return 1; @@ -339,6 +349,7 @@ case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: case PIPE_SHADER_CAP_SUPPORTED_IRS: case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: + case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: return 0; default: NOUVEAU_ERR("unknown PIPE_SHADER_CAP %d\n", param); @@ -412,6 +423,10 @@ RET((uint32_t []) { screen->mp_count }); case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY: RET((uint32_t []) { 512 }); /* FIXME: arbitrary limit */ + case PIPE_COMPUTE_CAP_ADDRESS_BITS: + RET((uint32_t []) { 32 }); + case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK: + RET((uint64_t []) { 0 }); default: return 0; } @@ -1002,7 +1017,7 @@ goto fail; } - nouveau_fence_new(&screen->base, &screen->base.fence.current, false); + nouveau_fence_new(&screen->base, &screen->base.fence.current); return &screen->base; diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_screen.h mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_screen.h --- mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_screen.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_screen.h 2017-06-01 10:37:10.000000000 +0000 @@ -23,6 +23,8 @@ #define NV50_MAX_VIEWPORTS 16 +#define NV50_MAX_WINDOW_RECTANGLES 8 + #define NV50_MAX_GLOBALS 16 #define ONE_TEMP_SIZE (4/*vector*/ * sizeof(float)) diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_shader_state.c mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_shader_state.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_shader_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_shader_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -99,6 +99,7 @@ BCTX_REFN(nv50->bufctx_3d, 3D_CB(s, i), res, RD); nv50->cb_dirty = 1; /* Force cache flush for UBO. */ + res->cb_bindings[s] |= 1 << i; } else { BEGIN_NV04(push, NV50_3D(SET_PROGRAM_CB), 1); PUSH_DATA (push, (i << 8) | p | 0); @@ -173,6 +174,42 @@ struct nv50_program *fp = nv50->fragprog; struct pipe_rasterizer_state *rast = &nv50->rast->pipe; + if (nv50->zsa && nv50->zsa->pipe.alpha.enabled) { + struct pipe_framebuffer_state *fb = &nv50->framebuffer; + bool blendable = fb->nr_cbufs == 0 || !fb->cbufs[0] || + nv50->screen->base.base.is_format_supported( + &nv50->screen->base.base, + fb->cbufs[0]->format, + fb->cbufs[0]->texture->target, + fb->cbufs[0]->texture->nr_samples, + PIPE_BIND_BLENDABLE); + /* If we already have alphatest code, we have to keep updating + * it. However we only have to have different code if the current RT0 is + * non-blendable. Otherwise we just set it to always pass and use the + * hardware alpha test. + */ + if (fp->fp.alphatest || !blendable) { + uint8_t alphatest = PIPE_FUNC_ALWAYS + 1; + if (!blendable) + alphatest = nv50->zsa->pipe.alpha.func + 1; + if (!fp->fp.alphatest) + nv50_program_destroy(nv50, fp); + else if (fp->mem && fp->fp.alphatest != alphatest) + nouveau_heap_free(&fp->mem); + + fp->fp.alphatest = alphatest; + } + } else if (fp->fp.alphatest && fp->fp.alphatest != PIPE_FUNC_ALWAYS + 1) { + /* Alpha test is disabled but we have a shader where it's filled + * in. Make sure to reset the function to 'always', otherwise it'll end + * up discarding fragments incorrectly. + */ + if (fp->mem) + nouveau_heap_free(&fp->mem); + + fp->fp.alphatest = PIPE_FUNC_ALWAYS + 1; + } + if (fp->fp.force_persample_interp != rast->force_persample_interp) { /* Force the program to be reuploaded, which will trigger interp fixups * to get applied diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_state.c mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_state.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -119,6 +119,7 @@ struct nv50_blend_stateobj *so = CALLOC_STRUCT(nv50_blend_stateobj); int i; bool emit_common_func = cso->rt[0].blend_enable; + uint32_t ms; if (nv50_context(pipe)->screen->tesla->oclass >= NVA3_3D_CLASS) { SB_BEGIN_3D(so, BLEND_INDEPENDENT, 1); @@ -190,6 +191,15 @@ SB_DATA (so, nv50_colormask(cso->rt[0].colormask)); } + ms = 0; + if (cso->alpha_to_coverage) + ms |= NV50_3D_MULTISAMPLE_CTRL_ALPHA_TO_COVERAGE; + if (cso->alpha_to_one) + ms |= NV50_3D_MULTISAMPLE_CTRL_ALPHA_TO_ONE; + + SB_BEGIN_3D(so, MULTISAMPLE_CTRL, 1); + SB_DATA (so, ms); + assert(so->size <= ARRAY_SIZE(so->state)); return so; } @@ -416,6 +426,11 @@ SB_DATA (so, 0); } + SB_BEGIN_3D(so, CB_ADDR, 1); + SB_DATA (so, NV50_CB_AUX_ALPHATEST_OFFSET << (8 - 2) | NV50_CB_AUX); + SB_BEGIN_3D(so, CB_DATA(0), 1); + SB_DATA (so, fui(cso->alpha.ref_value)); + assert(so->size <= ARRAY_SIZE(so->state)); return (void *)so; } @@ -628,7 +643,7 @@ static void nv50_bind_sampler_states(struct pipe_context *pipe, - unsigned shader, unsigned start, + enum pipe_shader_type shader, unsigned start, unsigned num_samplers, void **samplers) { assert(start == 0); @@ -642,6 +657,9 @@ case PIPE_SHADER_FRAGMENT: nv50_fp_sampler_states_bind(pipe, num_samplers, samplers); break; + default: + assert(!"unexpected shader type"); + break; } } @@ -704,7 +722,7 @@ } static void -nv50_set_sampler_views(struct pipe_context *pipe, unsigned shader, +nv50_set_sampler_views(struct pipe_context *pipe, enum pipe_shader_type shader, unsigned start, unsigned nr, struct pipe_sampler_view **views) { @@ -842,7 +860,7 @@ static void nv50_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, - struct pipe_constant_buffer *cb) + const struct pipe_constant_buffer *cb) { struct nv50_context *nv50 = nv50_context(pipe); struct pipe_resource *res = cb ? cb->buffer : NULL; @@ -856,9 +874,10 @@ if (nv50->constbuf[s][i].user) nv50->constbuf[s][i].u.buf = NULL; else - if (nv50->constbuf[s][i].u.buf) + if (nv50->constbuf[s][i].u.buf) { nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_3D_CB(s, i)); - + nv04_resource(nv50->constbuf[s][i].u.buf)->cb_bindings[s] &= ~(1 << i); + } pipe_resource_reference(&nv50->constbuf[s][i].u.buf, res); nv50->constbuf[s][i].user = (cb && cb->user_buffer) ? true : false; @@ -1001,6 +1020,22 @@ } static void +nv50_set_window_rectangles(struct pipe_context *pipe, + boolean include, + unsigned num_rectangles, + const struct pipe_scissor_state *rectangles) +{ + struct nv50_context *nv50 = nv50_context(pipe); + + nv50->window_rect.inclusive = include; + nv50->window_rect.rects = MIN2(num_rectangles, NV50_MAX_WINDOW_RECTANGLES); + memcpy(nv50->window_rect.rect, rectangles, + sizeof(struct pipe_scissor_state) * nv50->window_rect.rects); + + nv50->dirty_3d |= NV50_NEW_3D_WINDOW_RECTS; +} + +static void nv50_set_vertex_buffers(struct pipe_context *pipe, unsigned start_slot, unsigned count, const struct pipe_vertex_buffer *vb) @@ -1298,6 +1333,7 @@ pipe->set_polygon_stipple = nv50_set_polygon_stipple; pipe->set_scissor_states = nv50_set_scissor_states; pipe->set_viewport_states = nv50_set_viewport_states; + pipe->set_window_rectangles = nv50_set_window_rectangles; pipe->create_vertex_elements_state = nv50_vertex_state_create; pipe->delete_vertex_elements_state = nv50_vertex_state_delete; diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_stateobj.h mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_stateobj.h --- mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_stateobj.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_stateobj.h 2017-06-01 10:37:10.000000000 +0000 @@ -19,7 +19,7 @@ struct nv50_blend_stateobj { struct pipe_blend_state pipe; int size; - uint32_t state[82]; // TODO: allocate less if !independent_blend_enable + uint32_t state[84]; // TODO: allocate less if !independent_blend_enable }; struct nv50_rasterizer_stateobj { @@ -31,7 +31,7 @@ struct nv50_zsa_stateobj { struct pipe_depth_stencil_alpha_state pipe; int size; - uint32_t state[34]; + uint32_t state[38]; }; struct nv50_constbuf { @@ -62,6 +62,12 @@ struct nv50_vertex_element element[0]; }; +struct nv50_window_rect_stateobj { + bool inclusive; + unsigned rects; + struct pipe_scissor_state rect[PIPE_MAX_WINDOW_RECTANGLES]; +}; + struct nv50_so_target { struct pipe_stream_output_target pipe; struct pipe_query *pq; diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c 2017-06-01 10:37:10.000000000 +0000 @@ -1,5 +1,4 @@ -#include "util/u_format.h" #include "util/u_viewport.h" #include "nv50/nv50_context.h" @@ -283,6 +282,32 @@ nv50->viewports_dirty = 0; } +static void +nv50_validate_window_rects(struct nv50_context *nv50) +{ + struct nouveau_pushbuf *push = nv50->base.pushbuf; + bool enable = nv50->window_rect.rects > 0 || nv50->window_rect.inclusive; + int i; + + BEGIN_NV04(push, NV50_3D(CLIP_RECTS_EN), 1); + PUSH_DATA (push, enable); + if (!enable) + return; + + BEGIN_NV04(push, NV50_3D(CLIP_RECTS_MODE), 1); + PUSH_DATA (push, !nv50->window_rect.inclusive); + BEGIN_NV04(push, NV50_3D(CLIP_RECT_HORIZ(0)), NV50_MAX_WINDOW_RECTANGLES * 2); + for (i = 0; i < nv50->window_rect.rects; i++) { + struct pipe_scissor_state *s = &nv50->window_rect.rect[i]; + PUSH_DATA(push, (s->maxx << 16) | s->minx); + PUSH_DATA(push, (s->maxy << 16) | s->miny); + } + for (; i < NV50_MAX_WINDOW_RECTANGLES; i++) { + PUSH_DATA(push, 0); + PUSH_DATA(push, 0); + } +} + static inline void nv50_check_program_ucps(struct nv50_context *nv50, struct nv50_program *vp, uint8_t mask) @@ -322,25 +347,6 @@ } static void -nv50_validate_derived_3(struct nv50_context *nv50) -{ - struct nouveau_pushbuf *push = nv50->base.pushbuf; - struct pipe_framebuffer_state *fb = &nv50->framebuffer; - uint32_t ms = 0; - - if ((!fb->nr_cbufs || !fb->cbufs[0] || - !util_format_is_pure_integer(fb->cbufs[0]->format)) && nv50->blend) { - if (nv50->blend->pipe.alpha_to_coverage) - ms |= NV50_3D_MULTISAMPLE_CTRL_ALPHA_TO_COVERAGE; - if (nv50->blend->pipe.alpha_to_one) - ms |= NV50_3D_MULTISAMPLE_CTRL_ALPHA_TO_ONE; - } - - BEGIN_NV04(push, NV50_3D(MULTISAMPLE_CTRL), 1); - PUSH_DATA (push, ms); -} - -static void nv50_validate_clip(struct nv50_context *nv50) { struct nouveau_pushbuf *push = nv50->base.pushbuf; @@ -497,17 +503,18 @@ { nv50_validate_scissor, NV50_NEW_3D_SCISSOR }, #endif { nv50_validate_viewport, NV50_NEW_3D_VIEWPORT }, + { nv50_validate_window_rects, NV50_NEW_3D_WINDOW_RECTS }, { nv50_vertprog_validate, NV50_NEW_3D_VERTPROG }, { nv50_gmtyprog_validate, NV50_NEW_3D_GMTYPROG }, { nv50_fragprog_validate, NV50_NEW_3D_FRAGPROG | NV50_NEW_3D_RASTERIZER | - NV50_NEW_3D_MIN_SAMPLES }, + NV50_NEW_3D_MIN_SAMPLES | NV50_NEW_3D_ZSA | + NV50_NEW_3D_FRAMEBUFFER}, { nv50_fp_linkage_validate, NV50_NEW_3D_FRAGPROG | NV50_NEW_3D_VERTPROG | NV50_NEW_3D_GMTYPROG | NV50_NEW_3D_RASTERIZER }, { nv50_gp_linkage_validate, NV50_NEW_3D_GMTYPROG | NV50_NEW_3D_VERTPROG }, { nv50_validate_derived_rs, NV50_NEW_3D_FRAGPROG | NV50_NEW_3D_RASTERIZER | NV50_NEW_3D_VERTPROG | NV50_NEW_3D_GMTYPROG }, { nv50_validate_derived_2, NV50_NEW_3D_ZSA | NV50_NEW_3D_FRAMEBUFFER }, - { nv50_validate_derived_3, NV50_NEW_3D_BLEND | NV50_NEW_3D_FRAMEBUFFER }, { nv50_validate_clip, NV50_NEW_3D_CLIP | NV50_NEW_3D_RASTERIZER | NV50_NEW_3D_VERTPROG | NV50_NEW_3D_GMTYPROG }, { nv50_constbufs_validate, NV50_NEW_3D_CONSTBUF }, diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_surface.c mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_surface.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_surface.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_surface.c 2017-06-01 10:37:10.000000000 +0000 @@ -277,7 +277,8 @@ struct pipe_surface *dst, const union pipe_color_union *color, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct nv50_context *nv50 = nv50_context(pipe); struct nouveau_pushbuf *push = nv50->base.pushbuf; @@ -341,8 +342,10 @@ PUSH_DATA (push, (width << 16) | dstx); PUSH_DATA (push, (height << 16) | dsty); - BEGIN_NV04(push, NV50_3D(COND_MODE), 1); - PUSH_DATA (push, NV50_3D_COND_MODE_ALWAYS); + if (!render_condition_enabled) { + BEGIN_NV04(push, NV50_3D(COND_MODE), 1); + PUSH_DATA (push, NV50_3D_COND_MODE_ALWAYS); + } BEGIN_NI04(push, NV50_3D(CLEAR_BUFFERS), sf->depth); for (z = 0; z < sf->depth; ++z) { @@ -350,8 +353,10 @@ (z << NV50_3D_CLEAR_BUFFERS_LAYER__SHIFT)); } - BEGIN_NV04(push, NV50_3D(COND_MODE), 1); - PUSH_DATA (push, nv50->cond_condmode); + if (!render_condition_enabled) { + BEGIN_NV04(push, NV50_3D(COND_MODE), 1); + PUSH_DATA (push, nv50->cond_condmode); + } nv50->dirty_3d |= NV50_NEW_3D_FRAMEBUFFER | NV50_NEW_3D_SCISSOR; } @@ -363,7 +368,8 @@ double depth, unsigned stencil, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct nv50_context *nv50 = nv50_context(pipe); struct nouveau_pushbuf *push = nv50->base.pushbuf; @@ -424,8 +430,10 @@ PUSH_DATA (push, (width << 16) | dstx); PUSH_DATA (push, (height << 16) | dsty); - BEGIN_NV04(push, NV50_3D(COND_MODE), 1); - PUSH_DATA (push, NV50_3D_COND_MODE_ALWAYS); + if (!render_condition_enabled) { + BEGIN_NV04(push, NV50_3D(COND_MODE), 1); + PUSH_DATA (push, NV50_3D_COND_MODE_ALWAYS); + } BEGIN_NI04(push, NV50_3D(CLEAR_BUFFERS), sf->depth); for (z = 0; z < sf->depth; ++z) { @@ -433,8 +441,10 @@ (z << NV50_3D_CLEAR_BUFFERS_LAYER__SHIFT)); } - BEGIN_NV04(push, NV50_3D(COND_MODE), 1); - PUSH_DATA (push, nv50->cond_condmode); + if (!render_condition_enabled) { + BEGIN_NV04(push, NV50_3D(COND_MODE), 1); + PUSH_DATA (push, nv50->cond_condmode); + } nv50->dirty_3d |= NV50_NEW_3D_FRAMEBUFFER | NV50_NEW_3D_SCISSOR; } @@ -472,7 +482,7 @@ desc->unpack_s_8uint(&stencil, 0, data, 0, 1, 1); } pipe->clear_depth_stencil(pipe, sf, clear, depth, stencil, - box->x, box->y, box->width, box->height); + box->x, box->y, box->width, box->height, false); } else { union pipe_color_union color; @@ -508,7 +518,7 @@ } pipe->clear_render_target(pipe, sf, &color, - box->x, box->y, box->width, box->height); + box->x, box->y, box->width, box->height, false); } pipe->surface_destroy(pipe, sf); } @@ -825,6 +835,7 @@ enum pipe_texture_target target; struct { struct pipe_framebuffer_state fb; + struct nv50_window_rect_stateobj window_rect; struct nv50_rasterizer_stateobj *rast; struct nv50_program *vp; struct nv50_program *gp; @@ -1210,7 +1221,8 @@ } static void -nv50_blitctx_pre_blit(struct nv50_blitctx *ctx) +nv50_blitctx_pre_blit(struct nv50_blitctx *ctx, + const struct pipe_blit_info *info) { struct nv50_context *nv50 = ctx->nv50; struct nv50_blitter *blitter = nv50->screen->blitter; @@ -1229,6 +1241,7 @@ ctx->saved.fp = nv50->fragprog; ctx->saved.min_samples = nv50->min_samples; + ctx->saved.window_rect = nv50->window_rect; nv50->rast = &ctx->rast; @@ -1236,6 +1249,13 @@ nv50->gmtyprog = NULL; nv50->fragprog = ctx->fp; + nv50->window_rect.rects = + MIN2(info->num_window_rectangles, NV50_MAX_WINDOW_RECTANGLES); + nv50->window_rect.inclusive = info->window_rectangle_include; + if (nv50->window_rect.rects) + memcpy(nv50->window_rect.rect, info->window_rectangles, + sizeof(struct pipe_scissor_state) * nv50->window_rect.rects); + for (s = 0; s < 3; ++s) { ctx->saved.num_textures[s] = nv50->num_textures[s]; ctx->saved.num_samplers[s] = nv50->num_samplers[s]; @@ -1261,7 +1281,7 @@ nv50->dirty_3d = NV50_NEW_3D_FRAMEBUFFER | NV50_NEW_3D_MIN_SAMPLES | NV50_NEW_3D_VERTPROG | NV50_NEW_3D_FRAGPROG | NV50_NEW_3D_GMTYPROG | - NV50_NEW_3D_TEXTURES | NV50_NEW_3D_SAMPLERS; + NV50_NEW_3D_TEXTURES | NV50_NEW_3D_SAMPLERS | NV50_NEW_3D_WINDOW_RECTS; } static void @@ -1285,6 +1305,7 @@ nv50->fragprog = blit->saved.fp; nv50->min_samples = blit->saved.min_samples; + nv50->window_rect = blit->saved.window_rect; pipe_sampler_view_reference(&nv50->textures[2][0], NULL); pipe_sampler_view_reference(&nv50->textures[2][1], NULL); @@ -1308,7 +1329,7 @@ nv50->dirty_3d = blit->saved.dirty_3d | (NV50_NEW_3D_FRAMEBUFFER | NV50_NEW_3D_SCISSOR | NV50_NEW_3D_SAMPLE_MASK | NV50_NEW_3D_RASTERIZER | NV50_NEW_3D_ZSA | NV50_NEW_3D_BLEND | - NV50_NEW_3D_TEXTURES | NV50_NEW_3D_SAMPLERS | + NV50_NEW_3D_TEXTURES | NV50_NEW_3D_SAMPLERS | NV50_NEW_3D_WINDOW_RECTS | NV50_NEW_3D_VERTPROG | NV50_NEW_3D_GMTYPROG | NV50_NEW_3D_FRAGPROG); nv50->scissors_dirty |= 1; @@ -1336,7 +1357,7 @@ blit->render_condition_enable = info->render_condition_enable; nv50_blit_select_fp(blit, info); - nv50_blitctx_pre_blit(blit); + nv50_blitctx_pre_blit(blit, info); nv50_blit_set_dst(blit, dst, info->dst.level, -1, info->dst.format); nv50_blit_set_src(blit, src, info->src.level, -1, info->src.format, @@ -1688,6 +1709,9 @@ info->dst.resource->nr_samples <= 1) eng3d = true; + if (info->num_window_rectangles > 0 || info->window_rectangle_include) + eng3d = true; + /* FIXME: can't make this work with eng2d anymore */ if ((info->src.resource->nr_samples | 1) != (info->dst.resource->nr_samples | 1)) diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_tex.c mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_tex.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_tex.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_tex.c 2017-06-01 10:37:10.000000000 +0000 @@ -131,11 +131,11 @@ if (unlikely(!nouveau_bo_memtype(nv04_resource(texture)->bo))) { if (target == PIPE_BUFFER) { - addr += view->pipe.u.buf.first_element * desc->block.bits / 8; + addr += view->pipe.u.buf.offset; tic[2] |= G80_TIC_2_LAYOUT_PITCH | G80_TIC_2_TEXTURE_TYPE_ONE_D_BUFFER; tic[3] = 0; tic[4] = /* width */ - view->pipe.u.buf.last_element - view->pipe.u.buf.first_element + 1; + view->pipe.u.buf.size / (desc->block.bits / 8); tic[5] = 0; } else { tic[2] |= G80_TIC_2_LAYOUT_PITCH | G80_TIC_2_TEXTURE_TYPE_TWO_D_NO_MIPMAP; @@ -224,8 +224,7 @@ uint64_t address = res->address; if (res->base.target != PIPE_BUFFER) return; - address += tic->pipe.u.buf.first_element * - util_format_get_blocksize(tic->pipe.format); + address += tic->pipe.u.buf.offset; if (tic->tic[1] == (uint32_t)address && (tic->tic[2] & 0xff) == address >> 32) return; diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_transfer.c mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_transfer.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_transfer.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_transfer.c 2017-06-01 10:37:10.000000000 +0000 @@ -371,32 +371,24 @@ FREE(tx); } -void -nv50_cb_push(struct nouveau_context *nv, - struct nouveau_bo *bo, unsigned domain, - unsigned base, unsigned size, - unsigned offset, unsigned words, const uint32_t *data) +static void +nv50_cb_bo_push(struct nouveau_context *nv, + struct nouveau_bo *bo, unsigned domain, + unsigned bufid, + unsigned offset, unsigned words, + const uint32_t *data) { struct nouveau_pushbuf *push = nv->pushbuf; - struct nouveau_bufctx *bctx = nv50_context(&nv->pipe)->bufctx; assert(!(offset & 3)); - size = align(size, 0x100); - - nouveau_bufctx_refn(bctx, 0, bo, NOUVEAU_BO_WR | domain); - nouveau_pushbuf_bufctx(push, bctx); - nouveau_pushbuf_validate(push); while (words) { unsigned nr = MIN2(words, NV04_PFIFO_MAX_PACKET_LEN); - PUSH_SPACE(push, nr + 7); - BEGIN_NV04(push, NV50_3D(CB_DEF_ADDRESS_HIGH), 3); - PUSH_DATAh(push, bo->offset + base); - PUSH_DATA (push, bo->offset + base); - PUSH_DATA (push, (NV50_CB_TMP << 16) | (size & 0xffff)); + PUSH_SPACE(push, nr + 3); + PUSH_REFN (push, bo, NOUVEAU_BO_WR | domain); BEGIN_NV04(push, NV50_3D(CB_ADDR), 1); - PUSH_DATA (push, (offset << 6) | NV50_CB_TMP); + PUSH_DATA (push, (offset << 6) | bufid); BEGIN_NI04(push, NV50_3D(CB_DATA(0)), nr); PUSH_DATAp(push, data, nr); @@ -404,6 +396,41 @@ data += nr; offset += nr * 4; } +} + +void +nv50_cb_push(struct nouveau_context *nv, + struct nv04_resource *res, + unsigned offset, unsigned words, const uint32_t *data) +{ + struct nv50_context *nv50 = nv50_context(&nv->pipe); + struct nv50_constbuf *cb = NULL; + int s, bufid; + /* Go through all the constbuf binding points of this buffer and try to + * find one which contains the region to be updated. + */ + /* XXX compute? */ + for (s = 0; s < 3 && !cb; s++) { + uint16_t bindings = res->cb_bindings[s]; + while (bindings) { + int i = ffs(bindings) - 1; + uint32_t cb_offset = nv50->constbuf[s][i].offset; + + bindings &= ~(1 << i); + if (cb_offset <= offset && + cb_offset + nv50->constbuf[s][i].size >= offset + words * 4) { + cb = &nv50->constbuf[s][i]; + bufid = s * 16 + i; + break; + } + } + } - nouveau_bufctx_reset(bctx, 0); + if (cb) { + nv50_cb_bo_push(nv, res->bo, res->domain, + bufid, offset - cb->offset, words, data); + } else { + nv->push_data(nv, res->bo, res->offset + offset, res->domain, + words * 4, data); + } } diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_vbo.c mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_vbo.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv50_vbo.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv50_vbo.c 2017-06-01 10:37:10.000000000 +0000 @@ -702,6 +702,7 @@ prim |= NV50_3D_VERTEX_BEGIN_GL_INSTANCE_NEXT; } } + NOUVEAU_DRV_STAT(&nv50->screen->base, draw_calls_indexed, 1); } static void diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv84_video.c mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv84_video.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nv50/nv84_video.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv50/nv84_video.c 2017-06-01 10:37:10.000000000 +0000 @@ -482,16 +482,16 @@ mip.base.domain = NOUVEAU_BO_VRAM; mip.base.bo = dec->mbring; mip.base.address = dec->mbring->offset; - context->clear_render_target(context, &surf.base, &color, 0, 0, 64, 4760); + context->clear_render_target(context, &surf.base, &color, 0, 0, 64, 4760, false); surf.offset = dec->vpring->size / 2 - 0x1000; surf.width = 1024; surf.height = 1; mip.level[0].pitch = surf.width * 4; mip.base.bo = dec->vpring; mip.base.address = dec->vpring->offset; - context->clear_render_target(context, &surf.base, &color, 0, 0, 1024, 1); + context->clear_render_target(context, &surf.base, &color, 0, 0, 1024, 1, false); surf.offset = dec->vpring->size - 0x1000; - context->clear_render_target(context, &surf.base, &color, 0, 0, 1024, 1); + context->clear_render_target(context, &surf.base, &color, 0, 0, 1024, 1, false); PUSH_SPACE(screen->pushbuf, 5); PUSH_REFN(screen->pushbuf, dec->fence, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR); diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/mme/com9097.mme mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/mme/com9097.mme --- mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/mme/com9097.mme 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/mme/com9097.mme 2017-06-01 10:37:10.000000000 +0000 @@ -255,7 +255,7 @@ parm $r4 maddr 0x5f7 /* INDEX_BATCH_FIRST, start */ parm $r4 send $r4 /* index_bias, send start */ maddr 0x18e3 /* CB_POS */ - send 0x180 /* 256 + 128 */ + send 0x1a0 /* 256 + 160 */ braz $r2 #dei_end parm $r5 send $r4 /* start_instance, send index_bias */ send $r5 /* send start_instance */ @@ -311,7 +311,7 @@ braz $r3 #dai_end parm $r4 send $r4 /* start_instance */ maddr 0x18e3 /* CB_POS */ - send 0x180 /* 256 + 128 */ + send 0x1a0 /* 256 + 160 */ send 0x0 /* send 0 as base_vertex */ send $r4 /* send start_instance */ send $r6 /* draw id */ @@ -374,7 +374,7 @@ parm $r4 maddr 0x5f7 /* INDEX_BATCH_FIRST, start */ parm $r4 send $r4 /* index_bias, send start */ maddr 0x18e3 /* CB_POS */ - send 0x180 /* 256 + 128 */ + send 0x1a0 /* 256 + 160 */ braz $r2 #deic_end parm $r5 send $r4 /* start_instance, send index_bias */ send $r5 /* send start_instance */ @@ -455,7 +455,7 @@ braz $r3 #daic_end parm $r4 send $r4 /* start_instance */ maddr 0x18e3 /* CB_POS */ - send 0x180 /* 256 + 128 */ + send 0x1a0 /* 256 + 160 */ send 0x0 /* send 0 as base_vertex */ send $r4 /* send start_instance */ send $r6 /* draw id */ diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/mme/com9097.mme.h mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/mme/com9097.mme.h --- mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/mme/com9097.mme.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/mme/com9097.mme.h 2017-06-01 10:37:10.000000000 +0000 @@ -140,7 +140,7 @@ 0x017dc451, 0x00002431, 0x0638c021, - 0x00600041, + 0x00680041, 0x0004d007, 0x00002531, 0x00002841, @@ -185,7 +185,7 @@ 0x0004d807, 0x00002431, 0x0638c021, - 0x00600041, + 0x00680041, 0x00000041, 0x00002041, 0x00003041, @@ -233,7 +233,7 @@ 0x017dc451, 0x00002431, 0x0638c021, - 0x00600041, + 0x00680041, 0x0004d007, 0x00002531, 0x00002841, @@ -300,7 +300,7 @@ 0x0004d807, 0x00002431, 0x0638c021, - 0x00600041, + 0x00680041, 0x00000041, 0x00002041, 0x00003041, diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_compute.c mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_compute.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_compute.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_compute.c 2017-06-01 10:37:10.000000000 +0000 @@ -113,6 +113,30 @@ PUSH_DATA (push, screen->txc->offset + 65536); PUSH_DATA (push, NVC0_TSC_MAX_ENTRIES - 1); + /* MS sample coordinate offsets */ + BEGIN_NVC0(push, NVC0_CP(CB_SIZE), 3); + PUSH_DATA (push, NVC0_CB_AUX_SIZE); + PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(5)); + PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(5)); + BEGIN_1IC0(push, NVC0_CP(CB_POS), 1 + 2 * 8); + PUSH_DATA (push, NVC0_CB_AUX_MS_INFO); + PUSH_DATA (push, 0); /* 0 */ + PUSH_DATA (push, 0); + PUSH_DATA (push, 1); /* 1 */ + PUSH_DATA (push, 0); + PUSH_DATA (push, 0); /* 2 */ + PUSH_DATA (push, 1); + PUSH_DATA (push, 1); /* 3 */ + PUSH_DATA (push, 1); + PUSH_DATA (push, 2); /* 4 */ + PUSH_DATA (push, 0); + PUSH_DATA (push, 3); /* 5 */ + PUSH_DATA (push, 0); + PUSH_DATA (push, 2); /* 6 */ + PUSH_DATA (push, 1); + PUSH_DATA (push, 3); /* 7 */ + PUSH_DATA (push, 1); + return 0; } @@ -229,7 +253,7 @@ struct nvc0_screen *screen = nvc0->screen; BEGIN_NVC0(push, NVC0_CP(CB_SIZE), 3); - PUSH_DATA (push, 2048); + PUSH_DATA (push, NVC0_CB_AUX_SIZE); PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(5)); PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(5)); BEGIN_NVC0(push, NVC0_CP(CB_BIND), 1); @@ -247,7 +271,7 @@ int i; BEGIN_NVC0(push, NVC0_CP(CB_SIZE), 3); - PUSH_DATA (push, 2048); + PUSH_DATA (push, NVC0_CB_AUX_SIZE); PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s)); PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s)); BEGIN_1IC0(push, NVC0_CP(CB_POS), 1 + 4 * NVC0_MAX_BUFFERS); @@ -264,6 +288,7 @@ BCTX_REFN(nvc0->bufctx_cp, CP_BUF, res, RDWR); util_range_add(&res->valid_buffer_range, nvc0->buffers[s][i].buffer_offset, + nvc0->buffers[s][i].buffer_offset + nvc0->buffers[s][i].buffer_size); } else { PUSH_DATA (push, 0); @@ -356,7 +381,8 @@ } static void -nvc0_compute_upload_input(struct nvc0_context *nvc0, const void *input) +nvc0_compute_upload_input(struct nvc0_context *nvc0, + const struct pipe_grid_info *info) { struct nouveau_pushbuf *push = nvc0->base.pushbuf; struct nvc0_screen *screen = nvc0->screen; @@ -375,13 +401,23 @@ /* NOTE: size is limited to 4 KiB, which is < NV04_PFIFO_MAX_PACKET_LEN */ BEGIN_1IC0(push, NVC0_CP(CB_POS), 1 + cp->parm_size / 4); PUSH_DATA (push, 0); - PUSH_DATAp(push, input, cp->parm_size / 4); + PUSH_DATAp(push, info->input, cp->parm_size / 4); nvc0_compute_invalidate_constbufs(nvc0); - - BEGIN_NVC0(push, NVC0_CP(FLUSH), 1); - PUSH_DATA (push, NVC0_COMPUTE_FLUSH_CB); } + + BEGIN_NVC0(push, NVC0_CP(CB_SIZE), 3); + PUSH_DATA (push, NVC0_CB_AUX_SIZE); + PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(5)); + PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(5)); + + BEGIN_1IC0(push, NVC0_CP(CB_POS), 1 + 1); + /* (7) as we only upload work_dim on nvc0, the rest uses special regs */ + PUSH_DATA (push, NVC0_CB_AUX_GRID_INFO(7)); + PUSH_DATA (push, info->work_dim); + + BEGIN_NVC0(push, NVC0_CP(FLUSH), 1); + PUSH_DATA (push, NVC0_COMPUTE_FLUSH_CB); } void @@ -398,7 +434,7 @@ return; } - nvc0_compute_upload_input(nvc0, info->input); + nvc0_compute_upload_input(nvc0, info); BEGIN_NVC0(push, NVC0_CP(CP_START_ID), 1); PUSH_DATA (push, nvc0_program_symbol_offset(cp, info->pc)); diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_context.c mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_context.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -44,7 +44,7 @@ } static void -nvc0_texture_barrier(struct pipe_context *pipe) +nvc0_texture_barrier(struct pipe_context *pipe, unsigned flags) { struct nouveau_pushbuf *push = nvc0_context(pipe)->base.pushbuf; @@ -161,8 +161,11 @@ for (i = 0; i < NVC0_MAX_BUFFERS; ++i) pipe_resource_reference(&nvc0->buffers[s][i].buffer, NULL); - for (i = 0; i < NVC0_MAX_IMAGES; ++i) + for (i = 0; i < NVC0_MAX_IMAGES; ++i) { pipe_resource_reference(&nvc0->images[s][i].resource, NULL); + if (nvc0->screen->base.class_3d >= GM107_3D_CLASS) + pipe_sampler_view_reference(&nvc0->images_tic[s][i], NULL); + } } for (s = 0; s < 2; ++s) { @@ -436,11 +439,11 @@ flags = NV_VRAM_DOMAIN(&screen->base) | NOUVEAU_BO_RD; - BCTX_REFN_bo(nvc0->bufctx_3d, 3D_SCREEN, flags, screen->text); + BCTX_REFN_bo(nvc0->bufctx_3d, 3D_TEXT, flags, screen->text); BCTX_REFN_bo(nvc0->bufctx_3d, 3D_SCREEN, flags, screen->uniform_bo); BCTX_REFN_bo(nvc0->bufctx_3d, 3D_SCREEN, flags, screen->txc); if (screen->compute) { - BCTX_REFN_bo(nvc0->bufctx_cp, CP_SCREEN, flags, screen->text); + BCTX_REFN_bo(nvc0->bufctx_cp, CP_TEXT, flags, screen->text); BCTX_REFN_bo(nvc0->bufctx_cp, CP_SCREEN, flags, screen->uniform_bo); BCTX_REFN_bo(nvc0->bufctx_cp, CP_SCREEN, flags, screen->txc); } diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_context.h mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_context.h --- mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_context.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_context.h 2017-06-01 10:37:10.000000000 +0000 @@ -27,6 +27,7 @@ #include "nv50/nv50_2d.xml.h" #include "nvc0/nvc0_m2mf.xml.h" #include "nvc0/nve4_p2mf.xml.h" +#include "nvc0/nvc0_compute.xml.h" #include "nvc0/nvc0_macros.h" /* NOTE: must keep NVC0_NEW_3D_...PROG in consecutive bits in this order */ @@ -58,6 +59,7 @@ #define NVC0_NEW_3D_TESSFACTOR (1 << 25) #define NVC0_NEW_3D_BUFFERS (1 << 26) #define NVC0_NEW_3D_DRIVERCONST (1 << 27) +#define NVC0_NEW_3D_WINDOW_RECTS (1 << 28) #define NVC0_NEW_CP_PROGRAM (1 << 0) #define NVC0_NEW_CP_SURFACES (1 << 1) @@ -80,7 +82,8 @@ #define NVC0_BIND_3D_BUF 246 #define NVC0_BIND_3D_SCREEN 247 #define NVC0_BIND_3D_TLS 249 -#define NVC0_BIND_3D_COUNT 250 +#define NVC0_BIND_3D_TEXT 250 +#define NVC0_BIND_3D_COUNT 251 /* compute bufctx (during launch_grid) */ #define NVC0_BIND_CP_CB(i) ( 0 + (i)) @@ -91,7 +94,8 @@ #define NVC0_BIND_CP_SCREEN 51 #define NVC0_BIND_CP_QUERY 52 #define NVC0_BIND_CP_BUF 53 -#define NVC0_BIND_CP_COUNT 54 +#define NVC0_BIND_CP_TEXT 54 +#define NVC0_BIND_CP_COUNT 55 /* bufctx for other operations */ #define NVC0_BIND_2D 0 @@ -103,41 +107,44 @@ #define NVC0_CB_USR_SIZE (6 << 16) /* 6 driver constbuts, at 2K each */ #define NVC0_CB_AUX_INFO(s) NVC0_CB_USR_SIZE + (s << 11) -#define NVC0_CB_AUX_SIZE (6 << 11) +#define NVC0_CB_AUX_SIZE (1 << 11) /* XXX: Figure out what this UNK data is. */ #define NVC0_CB_AUX_UNK_INFO 0x000 #define NVC0_CB_AUX_UNK_SIZE (8 * 4) -/* 32 textures handles, at 1 32-bits integer each */ +/* 40 textures handles (8 for GM107+ images only), at 1 32-bits integer each */ #define NVC0_CB_AUX_TEX_INFO(i) 0x020 + (i) * 4 -#define NVC0_CB_AUX_TEX_SIZE (32 * 4) +#define NVC0_CB_AUX_TEX_SIZE (40 * 4) /* 8 sets of 32-bits coordinate offsets */ -#define NVC0_CB_AUX_MS_INFO 0x0a0 /* CP */ +#define NVC0_CB_AUX_MS_INFO 0x0c0 #define NVC0_CB_AUX_MS_SIZE (8 * 2 * 4) -/* block/grid size, at 3 32-bits integers each and gridid */ -#define NVC0_CB_AUX_GRID_INFO 0x0e0 /* CP */ -#define NVC0_CB_AUX_GRID_SIZE (7 * 4) +/* block/grid size, at 3 32-bits integers each, gridid and work_dim */ +#define NVC0_CB_AUX_GRID_INFO(i) 0x100 + (i) * 4 /* CP */ +#define NVC0_CB_AUX_GRID_SIZE (8 * 4) +/* FB texture handle */ +#define NVC0_CB_AUX_FB_TEX_INFO 0x100 /* FP */ +#define NVC0_CB_AUX_FB_TEX_SIZE (4) /* 8 user clip planes, at 4 32-bits floats each */ -#define NVC0_CB_AUX_UCP_INFO 0x100 +#define NVC0_CB_AUX_UCP_INFO 0x120 #define NVC0_CB_AUX_UCP_SIZE (PIPE_MAX_CLIP_PLANES * 4 * 4) /* 13 ubos, at 4 32-bits integer each */ -#define NVC0_CB_AUX_UBO_INFO(i) 0x100 + (i) * 4 * 4 /* CP */ +#define NVC0_CB_AUX_UBO_INFO(i) 0x120 + (i) * 4 * 4 /* CP */ #define NVC0_CB_AUX_UBO_SIZE ((NVC0_MAX_PIPE_CONSTBUFS - 1) * 4 * 4) /* 8 sets of 32-bits integer pairs sample offsets */ -#define NVC0_CB_AUX_SAMPLE_INFO 0x180 /* FP */ +#define NVC0_CB_AUX_SAMPLE_INFO 0x1a0 /* FP */ #define NVC0_CB_AUX_SAMPLE_SIZE (8 * 4 * 2) /* draw parameters (index bais, base instance, drawid) */ -#define NVC0_CB_AUX_DRAW_INFO 0x180 /* VP */ +#define NVC0_CB_AUX_DRAW_INFO 0x1a0 /* VP */ /* 32 user buffers, at 4 32-bits integers each */ -#define NVC0_CB_AUX_BUF_INFO(i) 0x200 + (i) * 4 * 4 +#define NVC0_CB_AUX_BUF_INFO(i) 0x220 + (i) * 4 * 4 #define NVC0_CB_AUX_BUF_SIZE (NVC0_MAX_BUFFERS * 4 * 4) /* 8 surfaces, at 16 32-bits integers each */ -#define NVC0_CB_AUX_SU_INFO(i) 0x400 + (i) * 16 * 4 +#define NVC0_CB_AUX_SU_INFO(i) 0x420 + (i) * 16 * 4 #define NVC0_CB_AUX_SU_SIZE (NVC0_MAX_IMAGES * 16 * 4) /* 1 64-bits address and 1 32-bits sequence */ -#define NVC0_CB_AUX_MP_INFO 0x600 +#define NVC0_CB_AUX_MP_INFO 0x620 #define NVC0_CB_AUX_MP_SIZE 3 * 4 /* 4 32-bits floats for the vertex runout, put at the end */ -#define NVC0_CB_AUX_RUNOUT_INFO NVC0_CB_USR_SIZE + NVC0_CB_AUX_SIZE +#define NVC0_CB_AUX_RUNOUT_INFO NVC0_CB_USR_SIZE + (NVC0_CB_AUX_SIZE * 6) struct nvc0_blitctx; @@ -202,6 +209,7 @@ unsigned num_samplers[6]; uint32_t samplers_dirty[6]; bool seamless_cube_map; + struct pipe_sampler_view *fbtexture; uint32_t tex_handles[6][PIPE_MAX_SAMPLERS]; /* for nve4 */ @@ -214,6 +222,7 @@ struct pipe_viewport_state viewports[NVC0_MAX_VIEWPORTS]; unsigned viewports_dirty; struct pipe_clip_state clip; + struct nvc0_window_rect_stateobj window_rect; unsigned sample_mask; unsigned min_samples; @@ -244,6 +253,7 @@ uint32_t buffers_valid[6]; struct pipe_image_view images[6][NVC0_MAX_IMAGES]; + struct pipe_sampler_view *images_tic[6][NVC0_MAX_IMAGES]; /* GM107+ */ uint16_t images_dirty[6]; uint16_t images_valid[6]; @@ -286,7 +296,7 @@ /* nvc0_program.c */ bool nvc0_program_translate(struct nvc0_program *, uint16_t chipset, struct pipe_debug_callback *); -bool nvc0_program_upload_code(struct nvc0_context *, struct nvc0_program *); +bool nvc0_program_upload(struct nvc0_context *, struct nvc0_program *); void nvc0_program_destroy(struct nvc0_context *, struct nvc0_program *); void nvc0_program_library_upload(struct nvc0_context *); uint32_t nvc0_program_symbol_offset(const struct nvc0_program *, @@ -348,6 +358,9 @@ nvc0_create_sampler_view(struct pipe_context *, struct pipe_resource *, const struct pipe_sampler_view *); +struct pipe_sampler_view * +gm107_create_texture_view_from_image(struct pipe_context *, + const struct pipe_image_view *); /* nvc0_transfer.c */ void diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c 2017-06-01 10:37:10.000000000 +0000 @@ -240,7 +240,6 @@ nvc0_miptree_transfer_map, /* transfer_map */ u_default_transfer_flush_region, /* transfer_flush_region */ nvc0_miptree_transfer_unmap, /* transfer_unmap */ - u_default_transfer_inline_write /* transfer_inline_write */ }; struct pipe_resource * diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_program.c mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_program.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_program.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_program.c 2017-06-01 10:37:10.000000000 +0000 @@ -346,6 +346,15 @@ nvc0_vtgp_gen_header(tcp, info); + if (info->target >= NVISA_GM107_CHIPSET) { + /* On GM107+, the number of output patch components has moved in the TCP + * header, but it seems like blob still also uses the old position. + * Also, the high 8-bits are located inbetween the min/max parallel + * field and has to be set after updating the outputs. */ + tcp->hdr[3] = (opcs & 0x0f) << 28; + tcp->hdr[4] |= (opcs & 0xf0) << 16; + } + nvc0_tp_get_tess_mode(tcp, info); return 0; @@ -477,6 +486,11 @@ fp->fp.early_z = info->prop.fp.earlyFragTests; fp->fp.sample_mask_in = info->prop.fp.usesSampleMaskIn; + fp->fp.reads_framebuffer = info->prop.fp.readsFramebuffer; + + /* Mark position xy and layer as read */ + if (fp->fp.reads_framebuffer) + fp->hdr[5] |= 0x32000000; return 0; } @@ -556,42 +570,40 @@ info->bin.sourceRep = NV50_PROGRAM_IR_TGSI; info->bin.source = (void *)prog->pipe.tokens; +#ifdef DEBUG + info->target = debug_get_num_option("NV50_PROG_CHIPSET", chipset); + info->optLevel = debug_get_num_option("NV50_PROG_OPTIMIZE", 3); + info->dbgFlags = debug_get_num_option("NV50_PROG_DEBUG", 0); +#else + info->optLevel = 3; +#endif + info->io.genUserClip = prog->vp.num_ucps; info->io.auxCBSlot = 15; + info->io.msInfoCBSlot = 15; info->io.ucpBase = NVC0_CB_AUX_UCP_INFO; info->io.drawInfoBase = NVC0_CB_AUX_DRAW_INFO; + info->io.msInfoBase = NVC0_CB_AUX_MS_INFO; + info->io.bufInfoBase = NVC0_CB_AUX_BUF_INFO(0); + info->io.suInfoBase = NVC0_CB_AUX_SU_INFO(0); + if (info->target >= NVISA_GK104_CHIPSET) { + info->io.texBindBase = NVC0_CB_AUX_TEX_INFO(0); + info->io.fbtexBindBase = NVC0_CB_AUX_FB_TEX_INFO; + } if (prog->type == PIPE_SHADER_COMPUTE) { - if (chipset >= NVISA_GK104_CHIPSET) { + if (info->target >= NVISA_GK104_CHIPSET) { info->io.auxCBSlot = 7; - info->io.texBindBase = NVC0_CB_AUX_TEX_INFO(0); - info->prop.cp.gridInfoBase = NVC0_CB_AUX_GRID_INFO; + info->io.msInfoCBSlot = 7; info->io.uboInfoBase = NVC0_CB_AUX_UBO_INFO(0); } - info->io.msInfoCBSlot = 0; - info->io.msInfoBase = NVC0_CB_AUX_MS_INFO; - info->io.bufInfoBase = NVC0_CB_AUX_BUF_INFO(0); - info->io.suInfoBase = NVC0_CB_AUX_SU_INFO(0); + info->prop.cp.gridInfoBase = NVC0_CB_AUX_GRID_INFO(0); } else { - if (chipset >= NVISA_GK104_CHIPSET) { - info->io.texBindBase = NVC0_CB_AUX_TEX_INFO(0); - } info->io.sampleInfoBase = NVC0_CB_AUX_SAMPLE_INFO; - info->io.bufInfoBase = NVC0_CB_AUX_BUF_INFO(0); - info->io.suInfoBase = NVC0_CB_AUX_SU_INFO(0); - info->io.msInfoCBSlot = 15; - info->io.msInfoBase = 0; /* TODO */ } info->assignSlots = nvc0_program_assign_varying_slots; -#ifdef DEBUG - info->optLevel = debug_get_num_option("NV50_PROG_OPTIMIZE", 3); - info->dbgFlags = debug_get_num_option("NV50_PROG_DEBUG", 0); -#else - info->optLevel = 3; -#endif - ret = nv50_ir_generate_code(info); if (ret) { NOUVEAU_ERR("shader translation failed: %i\n", ret); @@ -602,8 +614,6 @@ prog->code = info->bin.code; prog->code_size = info->bin.codeSize; - prog->immd_data = info->immd.buf; - prog->immd_size = info->immd.bufSize; prog->relocs = info->bin.relocData; prog->fixups = info->bin.fixupData; prog->num_gprs = MAX2(4, (info->bin.maxGPR + 1)); @@ -675,28 +685,24 @@ prog->type, info->bin.tlsSpace, prog->num_gprs, info->bin.instructions, info->bin.codeSize); +#ifdef DEBUG + if (debug_get_option("NV50_PROG_CHIPSET", NULL) && info->dbgFlags) + nvc0_program_dump(prog); +#endif + out: FREE(info); return !ret; } -bool -nvc0_program_upload_code(struct nvc0_context *nvc0, struct nvc0_program *prog) +static inline int +nvc0_program_alloc_code(struct nvc0_context *nvc0, struct nvc0_program *prog) { struct nvc0_screen *screen = nvc0->screen; const bool is_cp = prog->type == PIPE_SHADER_COMPUTE; int ret; uint32_t size = prog->code_size + (is_cp ? 0 : NVC0_SHADER_HEADER_SIZE); - uint32_t lib_pos = screen->lib_code->start; - uint32_t code_pos; - /* c[] bindings need to be aligned to 0x100, but we could use relocations - * to save space. */ - if (prog->immd_size) { - prog->immd_base = size; - size = align(size, 0x40); - size += prog->immd_size + 0xc0; /* add 0xc0 for align 0x40 -> 0x100 */ - } /* On Fermi, SP_START_ID must be aligned to 0x40. * On Kepler, the first instruction must be aligned to 0x80 because * latency information is expected only at certain positions. @@ -706,27 +712,9 @@ size = align(size, 0x40); ret = nouveau_heap_alloc(screen->text_heap, size, prog, &prog->mem); - if (ret) { - struct nouveau_heap *heap = screen->text_heap; - /* Note that the code library, which is allocated before anything else, - * does not have a priv pointer. We can stop once we hit it. - */ - while (heap->next && heap->next->priv) { - struct nvc0_program *evict = heap->next->priv; - nouveau_heap_free(&evict->mem); - } - debug_printf("WARNING: out of code space, evicting all shaders.\n"); - ret = nouveau_heap_alloc(heap, size, prog, &prog->mem); - if (ret) { - NOUVEAU_ERR("shader too large (0x%x) to fit in code space ?\n", size); - return false; - } - IMMED_NVC0(nvc0->base.pushbuf, NVC0_3D(SERIALIZE), 0); - } + if (ret) + return ret; prog->code_base = prog->mem->start; - prog->immd_base = align(prog->mem->start + prog->immd_base, 0x100); - assert((prog->immd_size == 0) || (prog->immd_base + prog->immd_size <= - prog->mem->start + prog->mem->size)); if (!is_cp) { if (screen->base.class_3d >= NVE4_3D_CLASS) { @@ -740,22 +728,32 @@ break; } } - code_pos = prog->code_base + NVC0_SHADER_HEADER_SIZE; } else { if (screen->base.class_3d >= NVE4_3D_CLASS) { if (prog->mem->start & 0x40) prog->code_base += 0x40; assert((prog->code_base & 0x7f) == 0x00); } - code_pos = prog->code_base; } + return 0; +} + +static inline void +nvc0_program_upload_code(struct nvc0_context *nvc0, struct nvc0_program *prog) +{ + struct nvc0_screen *screen = nvc0->screen; + const bool is_cp = prog->type == PIPE_SHADER_COMPUTE; + uint32_t code_pos = prog->code_base + (is_cp ? 0 : NVC0_SHADER_HEADER_SIZE); + if (prog->relocs) - nv50_ir_relocate_code(prog->relocs, prog->code, code_pos, lib_pos, 0); + nv50_ir_relocate_code(prog->relocs, prog->code, code_pos, + screen->lib_code->start, 0); if (prog->fixups) { nv50_ir_apply_fixups(prog->fixups, prog->code, prog->fp.force_persample_interp, - prog->fp.flatshade); + prog->fp.flatshade, + 0 /* alphatest */); for (int i = 0; i < 2; i++) { unsigned mask = prog->fp.color_interp[i] >> 4; unsigned interp = prog->fp.color_interp[i] & 3; @@ -770,21 +768,102 @@ } } + if (!is_cp) + nvc0->base.push_data(&nvc0->base, screen->text, prog->code_base, + NV_VRAM_DOMAIN(&screen->base), + NVC0_SHADER_HEADER_SIZE, prog->hdr); + + nvc0->base.push_data(&nvc0->base, screen->text, code_pos, + NV_VRAM_DOMAIN(&screen->base), prog->code_size, + prog->code); +} + +bool +nvc0_program_upload(struct nvc0_context *nvc0, struct nvc0_program *prog) +{ + struct nvc0_screen *screen = nvc0->screen; + const bool is_cp = prog->type == PIPE_SHADER_COMPUTE; + int ret; + uint32_t size = prog->code_size + (is_cp ? 0 : NVC0_SHADER_HEADER_SIZE); + + ret = nvc0_program_alloc_code(nvc0, prog); + if (ret) { + struct nouveau_heap *heap = screen->text_heap; + struct nvc0_program *progs[] = { /* Sorted accordingly to SP_START_ID */ + nvc0->compprog, nvc0->vertprog, nvc0->tctlprog, + nvc0->tevlprog, nvc0->gmtyprog, nvc0->fragprog + }; + + /* Note that the code library, which is allocated before anything else, + * does not have a priv pointer. We can stop once we hit it. + */ + while (heap->next && heap->next->priv) { + struct nvc0_program *evict = heap->next->priv; + nouveau_heap_free(&evict->mem); + } + debug_printf("WARNING: out of code space, evicting all shaders.\n"); + + /* Make sure to synchronize before deleting the code segment. */ + IMMED_NVC0(nvc0->base.pushbuf, NVC0_3D(SERIALIZE), 0); + + if ((screen->text->size << 1) <= (1 << 23)) { + ret = nvc0_screen_resize_text_area(screen, screen->text->size << 1); + if (ret) { + NOUVEAU_ERR("Error allocating TEXT area: %d\n", ret); + return false; + } + nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_3D_TEXT); + BCTX_REFN_bo(nvc0->bufctx_3d, 3D_TEXT, + NV_VRAM_DOMAIN(&screen->base) | NOUVEAU_BO_RD, + screen->text); + if (screen->compute) { + nouveau_bufctx_reset(nvc0->bufctx_cp, NVC0_BIND_CP_TEXT); + BCTX_REFN_bo(nvc0->bufctx_cp, CP_TEXT, + NV_VRAM_DOMAIN(&screen->base) | NOUVEAU_BO_RD, + screen->text); + } + + /* Re-upload the builtin function into the new code segment. */ + nvc0_program_library_upload(nvc0); + } + + ret = nvc0_program_alloc_code(nvc0, prog); + if (ret) { + NOUVEAU_ERR("shader too large (0x%x) to fit in code space ?\n", size); + return false; + } + + /* All currently bound shaders have to be reuploaded. */ + for (int i = 0; i < ARRAY_SIZE(progs); i++) { + if (!progs[i] || progs[i] == prog) + continue; + + ret = nvc0_program_alloc_code(nvc0, progs[i]); + if (ret) { + NOUVEAU_ERR("failed to re-upload a shader after code eviction.\n"); + return false; + } + nvc0_program_upload_code(nvc0, progs[i]); + + if (progs[i]->type == PIPE_SHADER_COMPUTE) { + /* Caches have to be invalidated but the CP_START_ID will be + * updated in the launch_grid functions. */ + BEGIN_NVC0(nvc0->base.pushbuf, NVC0_CP(FLUSH), 1); + PUSH_DATA (nvc0->base.pushbuf, NVC0_COMPUTE_FLUSH_CODE); + } else { + BEGIN_NVC0(nvc0->base.pushbuf, NVC0_3D(SP_START_ID(i)), 1); + PUSH_DATA (nvc0->base.pushbuf, progs[i]->code_base); + } + } + } + + nvc0_program_upload_code(nvc0, prog); + #ifdef DEBUG if (debug_get_bool_option("NV50_PROG_DEBUG", false)) nvc0_program_dump(prog); #endif - if (!is_cp) - nvc0->base.push_data(&nvc0->base, screen->text, prog->code_base, - NV_VRAM_DOMAIN(&screen->base), NVC0_SHADER_HEADER_SIZE, prog->hdr); - nvc0->base.push_data(&nvc0->base, screen->text, code_pos, - NV_VRAM_DOMAIN(&screen->base), prog->code_size, prog->code); - if (prog->immd_size) - nvc0->base.push_data(&nvc0->base, - screen->text, prog->immd_base, NV_VRAM_DOMAIN(&screen->base), - prog->immd_size, prog->immd_data); - BEGIN_NVC0(nvc0->base.pushbuf, NVC0_3D(MEM_BARRIER), 1); PUSH_DATA (nvc0->base.pushbuf, 0x1011); @@ -827,7 +906,6 @@ if (prog->mem) nouveau_heap_free(&prog->mem); FREE(prog->code); /* may be 0 for hardcoded shaders */ - FREE(prog->immd_data); FREE(prog->relocs); FREE(prog->fixups); if (prog->type == PIPE_SHADER_COMPUTE && prog->cp.syms) diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_program.h mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_program.h --- mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_program.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_program.h 2017-06-01 10:37:10.000000000 +0000 @@ -26,11 +26,8 @@ uint8_t num_gprs; uint32_t *code; - uint32_t *immd_data; unsigned code_base; unsigned code_size; - unsigned immd_base; - unsigned immd_size; /* size of immediate array data */ unsigned parm_size; /* size of non-bindable uniforms (c0[]) */ uint32_t hdr[20]; @@ -52,6 +49,7 @@ bool sample_mask_in; bool force_persample_interp; bool flatshade; + bool reads_framebuffer; } fp; struct { uint32_t tess_mode; /* ~0 if defined by the other stage */ diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_query.c mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_query.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_query.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_query.c 2017-06-01 10:37:10.000000000 +0000 @@ -142,15 +142,17 @@ nvc0->cond_mode = mode; if (!pq) { - PUSH_SPACE(push, 1); + PUSH_SPACE(push, 2); IMMED_NVC0(push, NVC0_3D(COND_MODE), cond); + if (nvc0->screen->compute) + IMMED_NVC0(push, NVC0_CP(COND_MODE), cond); return; } if (wait) nvc0_hw_query_fifo_wait(nvc0, q); - PUSH_SPACE(push, 7); + PUSH_SPACE(push, 10); PUSH_REFN (push, hq->bo, NOUVEAU_BO_GART | NOUVEAU_BO_RD); BEGIN_NVC0(push, NVC0_3D(COND_ADDRESS_HIGH), 3); PUSH_DATAh(push, hq->bo->offset + hq->offset); @@ -159,6 +161,12 @@ BEGIN_NVC0(push, NVC0_2D(COND_ADDRESS_HIGH), 2); PUSH_DATAh(push, hq->bo->offset + hq->offset); PUSH_DATA (push, hq->bo->offset + hq->offset); + if (nvc0->screen->compute) { + BEGIN_NVC0(push, NVC0_CP(COND_ADDRESS_HIGH), 3); + PUSH_DATAh(push, hq->bo->offset + hq->offset); + PUSH_DATA (push, hq->bo->offset + hq->offset); + PUSH_DATA (push, cond); + } } int @@ -205,7 +213,7 @@ if (screen->base.drm->version >= 0x01000101) { if (screen->compute) { - if (screen->base.class_3d <= NVF0_3D_CLASS) { + if (screen->base.class_3d <= GM200_3D_CLASS) { count += 2; } } @@ -218,22 +226,20 @@ if (screen->compute) { info->name = "MP counters"; - /* Because we can't expose the number of hardware counters needed for - * each different query, we don't want to allow more than one active - * query simultaneously to avoid failure when the maximum number of - * counters is reached. Note that these groups of GPU counters are - * currently only used by AMD_performance_monitor. - */ - info->max_active_queries = 1; + /* Expose the maximum number of hardware counters available, although + * some queries use more than one counter. Expect failures in that + * case but as performance counters are for developers, this should + * not have a real impact. */ + info->max_active_queries = 8; info->num_queries = nvc0_hw_sm_get_num_queries(screen); return 1; } } else if (id == NVC0_HW_METRIC_QUERY_GROUP) { if (screen->compute) { - if (screen->base.class_3d <= NVF0_3D_CLASS) { + if (screen->base.class_3d <= GM200_3D_CLASS) { info->name = "Performance metrics"; - info->max_active_queries = 1; + info->max_active_queries = 4; /* A metric uses at least 2 queries */ info->num_queries = nvc0_hw_metric_get_num_queries(screen); return 1; } diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.c mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.c 2017-06-01 10:37:10.000000000 +0000 @@ -34,8 +34,8 @@ _Q(ACHIEVED_OCCUPANCY, "metric-achieved_occupancy", PERCENTAGE, - "Ratio of the average active warps per active cycle to the maximum number " - "of warps supported on a multiprocessor"), + "Ratio of the average active warps per active cycle to the maximum " + "number of warps supported on a multiprocessor"), _Q(BRANCH_EFFICIENCY, "metric-branch_efficiency", @@ -70,8 +70,8 @@ _Q(ISSUE_SLOT_UTILIZATION, "metric-issue_slot_utilization", PERCENTAGE, - "Percentage of issue slots that issued at least one instruction, averaged " - "across all cycles"), + "Percentage of issue slots that issued at least one instruction, " + "averaged across all cycles"), _Q(IPC, "metric-ipc", @@ -83,6 +83,19 @@ UINT64, "Average number of replays due to shared memory conflicts for each " "instruction executed"), + + _Q(WARP_EXECUTION_EFFICIENCY, + "metric-warp_execution_efficiency", + PERCENTAGE, + "Ratio of the average active threads per warp to the maximum number of " + "threads per warp supported on a multiprocessor"), + + _Q(WARP_NONPRED_EXECUTION_EFFICIENCY, + "metric-warp_nonpred_execution_efficiency", + PERCENTAGE, + "Ratio of the average active threads per warp executing non-predicated " + "instructions to the maximum number of threads per warp supported on a " + "multiprocessor"), }; #undef _Q @@ -178,9 +191,9 @@ &sm20_branch_efficiency, &sm20_inst_per_wrap, &sm20_inst_replay_overhead, + &sm20_ipc, &sm20_issued_ipc, &sm20_issue_slot_utilization, - &sm20_ipc, }; /* ==== Compute capability 2.1 (GF108+ except GF110) ==== */ @@ -249,32 +262,14 @@ &sm21_inst_issued, &sm20_inst_per_wrap, &sm21_inst_replay_overhead, + &sm20_ipc, &sm21_issued_ipc, &sm21_issue_slots, &sm21_issue_slot_utilization, - &sm20_ipc, }; /* ==== Compute capability 3.0 (GK104/GK106/GK107) ==== */ static const struct nvc0_hw_metric_query_cfg -sm30_achieved_occupancy = -{ - .type = NVC0_HW_METRIC_QUERY_ACHIEVED_OCCUPANCY, - .queries[0] = _SM(ACTIVE_WARPS), - .queries[1] = _SM(ACTIVE_CYCLES), - .num_queries = 2, -}; - -static const struct nvc0_hw_metric_query_cfg -sm30_branch_efficiency = -{ - .type = NVC0_HW_METRIC_QUERY_BRANCH_EFFICIENCY, - .queries[0] = _SM(BRANCH), - .queries[1] = _SM(DIVERGENT_BRANCH), - .num_queries = 2, -}; - -static const struct nvc0_hw_metric_query_cfg sm30_inst_issued = { .type = NVC0_HW_METRIC_QUERY_INST_ISSUED, @@ -284,15 +279,6 @@ }; static const struct nvc0_hw_metric_query_cfg -sm30_inst_per_wrap = -{ - .type = NVC0_HW_METRIC_QUERY_INST_PER_WRAP, - .queries[0] = _SM(INST_EXECUTED), - .queries[1] = _SM(WARPS_LAUNCHED), - .num_queries = 2, -}; - -static const struct nvc0_hw_metric_query_cfg sm30_inst_replay_overhead = { .type = NVC0_HW_METRIC_QUERY_INST_REPLAY_OVERHEAD, @@ -332,15 +318,6 @@ }; static const struct nvc0_hw_metric_query_cfg -sm30_ipc = -{ - .type = NVC0_HW_METRIC_QUERY_IPC, - .queries[0] = _SM(INST_EXECUTED), - .queries[1] = _SM(ACTIVE_CYCLES), - .num_queries = 2, -}; - -static const struct nvc0_hw_metric_query_cfg sm30_shared_replay_overhead = { .type = NVC0_HW_METRIC_QUERY_SHARED_REPLAY_OVERHEAD, @@ -350,32 +327,69 @@ .num_queries = 3, }; +static const struct nvc0_hw_metric_query_cfg +sm30_warp_execution_efficiency = +{ + .type = NVC0_HW_METRIC_QUERY_WARP_EXECUTION_EFFICIENCY, + .queries[0] = _SM(INST_EXECUTED), + .queries[1] = _SM(TH_INST_EXECUTED), + .num_queries = 2, +}; + static const struct nvc0_hw_metric_query_cfg *sm30_hw_metric_queries[] = { - &sm30_achieved_occupancy, - &sm30_branch_efficiency, + &sm20_achieved_occupancy, + &sm20_branch_efficiency, &sm30_inst_issued, - &sm30_inst_per_wrap, + &sm20_inst_per_wrap, &sm30_inst_replay_overhead, + &sm20_ipc, &sm30_issued_ipc, &sm30_issue_slots, &sm30_issue_slot_utilization, - &sm30_ipc, &sm30_shared_replay_overhead, + &sm30_warp_execution_efficiency, +}; + +/* ==== Compute capability 3.5 (GK110/GK208) ==== */ +static const struct nvc0_hw_metric_query_cfg +sm35_warp_nonpred_execution_efficiency = +{ + .type = NVC0_HW_METRIC_QUERY_WARP_NONPRED_EXECUTION_EFFICIENCY, + .queries[0] = _SM(INST_EXECUTED), + .queries[1] = _SM(NOT_PRED_OFF_INST_EXECUTED), + .num_queries = 2, }; -/* ==== Compute capability 3.5 (GK110) ==== */ static const struct nvc0_hw_metric_query_cfg *sm35_hw_metric_queries[] = { - &sm30_achieved_occupancy, + &sm20_achieved_occupancy, &sm30_inst_issued, - &sm30_inst_per_wrap, + &sm20_inst_per_wrap, &sm30_inst_replay_overhead, + &sm20_ipc, &sm30_issued_ipc, - &sm30_inst_issued, + &sm30_issue_slots, &sm30_issue_slot_utilization, - &sm30_ipc, &sm30_shared_replay_overhead, + &sm30_warp_execution_efficiency, + &sm35_warp_nonpred_execution_efficiency, +}; + +/* ==== Compute capability 5.0 (GM107/GM108) ==== */ +static const struct nvc0_hw_metric_query_cfg *sm50_hw_metric_queries[] = +{ + &sm20_achieved_occupancy, + &sm20_branch_efficiency, + &sm30_inst_issued, + &sm20_inst_per_wrap, + &sm30_inst_replay_overhead, + &sm20_ipc, + &sm30_issued_ipc, + &sm30_issue_slots, + &sm30_issue_slot_utilization, + &sm30_warp_execution_efficiency, + &sm35_warp_nonpred_execution_efficiency, }; #undef _SM @@ -386,6 +400,9 @@ struct nouveau_device *dev = screen->base.device; switch (screen->base.class_3d) { + case GM200_3D_CLASS: + case GM107_3D_CLASS: + return sm50_hw_metric_queries; case NVF0_3D_CLASS: return sm35_hw_metric_queries; case NVE4_3D_CLASS: @@ -405,6 +422,9 @@ struct nouveau_device *dev = screen->base.device; switch (screen->base.class_3d) { + case GM200_3D_CLASS: + case GM107_3D_CLASS: + return ARRAY_SIZE(sm50_hw_metric_queries); case NVF0_3D_CLASS: return ARRAY_SIZE(sm35_hw_metric_queries); case NVE4_3D_CLASS: @@ -609,6 +629,12 @@ if (res64[2]) return (res64[0] + res64[1]) / (double)res64[2]; break; + case NVC0_HW_METRIC_QUERY_WARP_EXECUTION_EFFICIENCY: + /* thread_inst_executed / (inst_executed * max. number of threads per + * wrap) * 100 */ + if (res64[0]) + return (res64[1] / ((double)res64[0] * 32)) * 100; + break; default: debug_printf("invalid metric type: %d\n", hq->base.type - NVC0_HW_METRIC_QUERY(0)); @@ -617,6 +643,22 @@ return 0; } +static uint64_t +sm35_hw_metric_calc_result(struct nvc0_hw_query *hq, uint64_t res64[8]) +{ + switch (hq->base.type - NVC0_HW_METRIC_QUERY(0)) { + case NVC0_HW_METRIC_QUERY_WARP_NONPRED_EXECUTION_EFFICIENCY: + /* not_predicated_off_thread_inst_executed / (inst_executed * max. number + * of threads per wrap) * 100 */ + if (res64[0]) + return (res64[1] / ((double)res64[0] * 32)) * 100; + break; + default: + return sm30_hw_metric_calc_result(hq, res64); + } + return 0; +} + static boolean nvc0_hw_metric_get_query_result(struct nvc0_context *nvc0, struct nvc0_hw_query *hq, boolean wait, @@ -640,7 +682,11 @@ } switch (screen->base.class_3d) { + case GM200_3D_CLASS: + case GM107_3D_CLASS: case NVF0_3D_CLASS: + value = sm35_hw_metric_calc_result(hq, res64); + break; case NVE4_3D_CLASS: value = sm30_hw_metric_calc_result(hq, res64); break; @@ -712,7 +758,7 @@ if (id < count) { if (screen->compute) { - if (screen->base.class_3d <= NVF0_3D_CLASS) { + if (screen->base.class_3d <= GM200_3D_CLASS) { const struct nvc0_hw_metric_query_cfg **queries = nvc0_hw_metric_get_queries(screen); const struct nvc0_hw_metric_cfg *cfg = diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.h mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.h --- mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.h 2017-06-01 10:37:10.000000000 +0000 @@ -32,6 +32,8 @@ NVC0_HW_METRIC_QUERY_ISSUE_SLOT_UTILIZATION, NVC0_HW_METRIC_QUERY_IPC, NVC0_HW_METRIC_QUERY_SHARED_REPLAY_OVERHEAD, + NVC0_HW_METRIC_QUERY_WARP_EXECUTION_EFFICIENCY, + NVC0_HW_METRIC_QUERY_WARP_NONPRED_EXECUTION_EFFICIENCY, NVC0_HW_METRIC_QUERY_COUNT }; diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c 2017-06-01 10:37:10.000000000 +0000 @@ -37,6 +37,12 @@ const char *name; const char *desc; } nvc0_hw_sm_queries[] = { + _Q(ACTIVE_CTAS, + "active_ctas", + "Accumulated number of active blocks per cycle. For every cycle it " + "increments by the number of active blocks in the cycle which can be in " + "the range 0 to 32."), + _Q(ACTIVE_CYCLES, "active_cycles", "Number of cycles a multiprocessor has at least one active warp"), @@ -81,6 +87,20 @@ "128 bytes. For each extra cache line access the counter is incremented " "by 1"), + _Q(GLOBAL_ATOM_CAS, + "global_atom_cas", + "Number of ATOM.CAS instructions executed per warp."), + + _Q(GLOBAL_LD, + "global_load", + "Number of executed load instructions where state space is specified as " + "global, increments per warp on a multiprocessor."), + + _Q(GLOBAL_ST, + "global_store", + "Number of executed store instructions where state space is specified as " + "global, increments per warp on a multiprocessor."), + _Q(GST_TRANSACTIONS, "global_store_transaction", "Number of global store transactions. Increments by 1 per transaction. " @@ -114,6 +134,11 @@ "inst_issued", "Number of instructions issued including replays"), + _Q(INST_ISSUED0, + "inst_issued0", + "Number of cycles that did not issue any instruction, increments per " + "warp."), + _Q(INST_ISSUED1, "inst_issued1", "Number of single instruction issued per cycle"), @@ -260,11 +285,24 @@ "User profiled generic trigger that can be inserted in any place of the " "code to collect the related information. Increments per warp."), + _Q(SHARED_ATOM, + "shared_atom", + "Number of ATOMS instructions executed per warp."), + + _Q(SHARED_ATOM_CAS, + "shared_atom_cas", + "Number of ATOMS.CAS instructions executed per warp."), + _Q(SHARED_LD, "shared_load", "Number of executed load instructions where state space is specified as " "shared, increments per warp on a multiprocessor"), + _Q(SHARED_LD_BANK_CONFLICT, + "shared_load_bank_conflict", + "Number of shared load bank conflict generated when the addresses for " + "two or more shared memory load requests fall in the same memory bank."), + _Q(SHARED_LD_REPLAY, "shared_load_replay", "Replays caused due to shared load bank conflict (when the addresses for " @@ -273,11 +311,23 @@ "threads in the warp executing that instruction exceed the number of words " "that can be loaded in one cycle (256 bytes)"), + _Q(SHARED_LD_TRANSACTIONS, + "shared_ld_transactions", + "Number of transactions for shared load accesses. Maximum transaction " + "size in maxwell is 128 bytes, any warp accessing more that 128 bytes " + "will cause multiple transactions for a shared load instruction. This " + "also includes extra transactions caused by shared bank conflicts."), + _Q(SHARED_ST, "shared_store", "Number of executed store instructions where state space is specified as " "shared, increments per warp on a multiprocessor"), + _Q(SHARED_ST_BANK_CONFLICT, + "shared_store_bank_conflict", + "Number of shared store bank conflict generated when the addresses for " + "two or more shared memory store requests fall in the same memory bank."), + _Q(SHARED_ST_REPLAY, "shared_store_replay", "Replays caused due to shared store bank conflict (when the addresses for " @@ -286,6 +336,13 @@ "threads in the warp executing that instruction exceed the number of words " "that can be stored in one cycle"), + _Q(SHARED_ST_TRANSACTIONS, + "shared_st_transactions", + "Number of transactions for shared store accesses. Maximum transaction " + "size in maxwell is 128 bytes, any warp accessing more that 128 bytes " + "will cause multiple transactions for a shared store instruction. This " + "also includes extra transactions caused by shared bank conflicts."), + _Q(SM_CTA_LAUNCHED, "sm_cta_launched", "Number of thread blocks launched on a multiprocessor"), @@ -372,9 +429,9 @@ * mov b32 $r6 $pm6 * mov b32 $r7 $pm7 * set $p0 0x1 eq u32 $r8 0x0 - * mov b32 $r10 c7[0x600] + * mov b32 $r10 c7[0x620] * ext u32 $r8 $r12 0x414 - * mov b32 $r11 c7[0x604] + * mov b32 $r11 c7[0x624] * sched 0x04 0x2e 0x04 0x20 0x20 0x28 0x04 * ext u32 $r9 $r12 0x208 * (not $p0) exit @@ -392,7 +449,7 @@ * add b32 $r12 $c $r12 $r9 * st b128 wt g[$r10d] $r0q * sched 0x4 0x2c 0x20 0x04 0x2e 0x00 0x00 - * mov b32 $r0 c7[0x608] + * mov b32 $r0 c7[0x628] * add b32 $r13 $r13 0x0 $c * $p1 st b128 wt g[$r12d+0x40] $r4q * st b32 wt g[$r12d+0x50] $r0 @@ -410,9 +467,9 @@ 0x2c00000028019c04ULL, 0x2c0000002c01dc04ULL, 0x190e0000fc81dc03ULL, - 0x28005c1800029de4ULL, + 0x28005c1880029de4ULL, 0x7000c01050c21c03ULL, - 0x28005c181002dde4ULL, + 0x28005c189002dde4ULL, 0x204282020042e047ULL, 0x7000c00820c25c03ULL, 0x80000000000021e7ULL, @@ -430,7 +487,7 @@ 0x4801000024c31c03ULL, 0x9400000000a01fc5ULL, 0x200002e04202c047ULL, - 0x28005c1820001de4ULL, + 0x28005c18a0001de4ULL, 0x0800000000d35c42ULL, 0x9400000100c107c5ULL, 0x9400000140c01f85ULL, @@ -453,9 +510,9 @@ 0x86400000051c001aULL, 0x86400000059c001eULL, 0xdb201c007f9c201eULL, - 0x64c03ce0c01c002aULL, + 0x64c03ce0c41c002aULL, 0xc00000020a1c3021ULL, - 0x64c03ce0c09c002eULL, + 0x64c03ce0c49c002eULL, 0x0810a0808010b810ULL, 0xc0000001041c3025ULL, 0x180000000020003cULL, @@ -473,13 +530,61 @@ 0xe0840000049c3032ULL, 0xfe800000001c2800ULL, 0x080000b81080b010ULL, - 0x64c03ce0c11c0002ULL, + 0x64c03ce0c51c0002ULL, 0xe08040007f9c3436ULL, 0xfe80000020043010ULL, 0xfc800000281c3000ULL, 0x18000000001c003cULL, }; +static const uint64_t gm107_read_hw_sm_counters_code[] = +{ + 0x001d0400e4200701ULL, /* sched (st 0x1 wr 0x0) (st 0x1 wr 0x1) (st 0x1 wr 0x2) */ + 0xf0c8000002170008ULL, /* mov $r8 $tidx */ + 0xf0c800000037000cULL, /* mov $r12 $virtid */ + 0xf0c8000000470000ULL, /* mov $r0 $pm0 */ + 0x001e8400f0200761ULL, /* sched (st 0x1 wr 0x3) (st 0x1 wr 0x4) (st 0x1 wr 0x5) */ + 0xf0c8000000570001ULL, /* mov $r1 $pm1 */ + 0xf0c8000000670002ULL, /* mov $r2 $pm2 */ + 0xf0c8000000770003ULL, /* mov $r3 $pm3 */ + 0x001e8400f42007a1ULL, /* sched (st 0x1 wr 0x5) (st 0x1 wr 0x5) (st 0x1 wr 0x5) */ + 0xf0c8000000870004ULL, /* mov $r4 $pm4 */ + 0xf0c8000000970005ULL, /* mov $r5 $pm5 */ + 0xf0c8000000a70006ULL, /* mov $r6 $pm6 */ + 0x001f8401fc2007a1ULL, /* sched (st 0x1 wr 0x5) (st 0x1 wt 0x1) (st 0x1) */ + 0xf0c8000000b70007ULL, /* mov $r7 $pm7 */ + 0x5b6403800087ff07ULL, /* isetp eq u32 and $p0 0x1 0x0 $r8 0x1 */ + 0x4c98079c1887000aULL, /* mov $r10 c7[0x620] 0xf */ + 0x001fa400fc2017e1ULL, /* sched (st 0x1 wt 0x2) (st 0x1) (st 0x9) */ + 0x3800000091470c08ULL, /* bfe u32 $r8 $r12 0x914 */ + 0x4c98079c1897000bULL, /* mov $r11 c7[0x624] 0xf */ + 0x3800000020870c09ULL, /* bfe u32 $r9 $r12 0x208 */ + 0x001c1800fc2007edULL, /* sched (st 0xd) (st 0x1) (st 0x6 wr 0x0) */ + 0xe30000000008000fULL, /* not $p0 exit */ + 0x5b6403800097ff0fULL, /* isetp eq u32 and $p1 0x1 0x0 $r9 0x1 */ + 0x3838000006070808ULL, /* imul u32 u32 $r8 $r8 0x60 */ + 0x003f8400e0c00726ULL, /* sched (st 0x6 wr 0x1) (st 0x6 wr 0x0) (st 0x1 wt 0x1) */ + 0x383800000107090cULL, /* imul u32 u32 $r12 $r9 0x10 */ + 0x383800000047090dULL, /* imul u32 u32 $r13 $r9 0x4 */ + 0x5c10000000d70809ULL, /* iadd $r9 $r8 $r13 */ + 0x001f8400fcc017e1ULL, /* sched (st 0x1 wt 0x2) (st 0x6) (st 0x1) */ + 0x5c10000000c70808ULL, /* iadd $r8 $r8 $r12 */ + 0x5c98078000a7000cULL, /* mov $r12 $r10 0xf */ + 0x5c10800000870a0aULL, /* iadd cc $r10 $r10 $r8 */ + 0x001f8400fc2007e6ULL, /* sched (st 0x6) (st 0x1) (st 0x1) */ + 0x5c98078000b7000dULL, /* mov $r13 $r11 0xf */ + 0x5c1008000ff70b0bULL, /* iadd x $r11 $r11 0x0 */ + 0x5c10800000970c0cULL, /* iadd cc $r12 $r12 $r9 */ + 0x003f983c1c4007e1ULL, /* sched (st 0x1) (st 0x2 rd 0x0 wt 0x3c) (st 0x6 wt 0x1) */ + 0x5c1008000ff70d0dULL, /* iadd x $r13 $r13 0x0 */ + 0xbfd0000000070a00ULL, /* st e wt b128 g[$r10] $r0 0x1 */ + 0x4c98079c18a70000ULL, /* mov $r0 c7[0x628] 0xf */ + 0x001fbc00fc2007e6ULL, /* sched (st 0x1) (st 0x1) (st 0xf) */ + 0xbfd0000004010c04ULL, /* $p1 st e wt b128 g[$r12+0x40] $r4 0x1 */ + 0xbf90000005070c00ULL, /* st e wt b32 g[$r12+0x50] $r0 0x1 */ + 0xe30000000007000fULL, /* exit */ +}; + /* For simplicity, we will allocate as many group slots as we allocate counter * slots. This means that a single counter which wants to source from 2 groups * will have to be declared as using 2 counter slots. This shouldn't really be @@ -504,8 +609,8 @@ uint8_t norm[2]; /* normalization num,denom */ }; -#define _CA(f, m, g, s) { f, NVE4_COMPUTE_MP_PM_FUNC_MODE_##m, 0, NVE4_COMPUTE_MP_PM_A_SIGSEL_##g, 0, s } -#define _CB(f, m, g, s) { f, NVE4_COMPUTE_MP_PM_FUNC_MODE_##m, 1, NVE4_COMPUTE_MP_PM_B_SIGSEL_##g, 0, s } +#define _CA(f, m, g, s) { f, NVE4_COMPUTE_MP_PM_FUNC_MODE_##m, 0, g, 0, s } +#define _CB(f, m, g, s) { f, NVE4_COMPUTE_MP_PM_FUNC_MODE_##m, 1, g, 0, s } #define _Q(n, c) [NVE4_HW_SM_QUERY_##n] = c /* ==== Compute capability 3.0 (GK104:GK110) ==== */ @@ -513,7 +618,7 @@ sm30_active_cycles = { .type = NVC0_HW_SM_QUERY_ACTIVE_CYCLES, - .ctr[0] = _CB(0x0001, B6, WARP, 0x00000000), + .ctr[0] = _CB(0x0001, B6, 0x02, 0x00000000), .num_counters = 1, .norm = { 1, 1 }, }; @@ -522,7 +627,7 @@ sm30_active_warps = { .type = NVC0_HW_SM_QUERY_ACTIVE_WARPS, - .ctr[0] = _CB(0x003f, B6, WARP, 0x31483104), + .ctr[0] = _CB(0x003f, B6, 0x02, 0x31483104), .num_counters = 1, .norm = { 2, 1 }, }; @@ -531,7 +636,7 @@ sm30_atom_cas_count = { .type = NVC0_HW_SM_QUERY_ATOM_CAS_COUNT, - .ctr[0] = _CA(0x0001, B6, BRANCH, 0x000000004), + .ctr[0] = _CA(0x0001, B6, 0x1c, 0x000000004), .num_counters = 1, .norm = { 1, 1 }, }; @@ -540,7 +645,7 @@ sm30_atom_count = { .type = NVC0_HW_SM_QUERY_ATOM_COUNT, - .ctr[0] = _CA(0x0001, B6, BRANCH, 0x00000000), + .ctr[0] = _CA(0x0001, B6, 0x1c, 0x00000000), .num_counters = 1, .norm = { 1, 1 }, }; @@ -549,7 +654,7 @@ sm30_branch = { .type = NVC0_HW_SM_QUERY_BRANCH, - .ctr[0] = _CA(0x0001, B6, BRANCH, 0x0000000c), + .ctr[0] = _CA(0x0001, B6, 0x1c, 0x0000000c), .num_counters = 1, .norm = { 1, 1 }, }; @@ -558,7 +663,7 @@ sm30_divergent_branch = { .type = NVC0_HW_SM_QUERY_DIVERGENT_BRANCH, - .ctr[0] = _CA(0x0001, B6, BRANCH, 0x00000010), + .ctr[0] = _CA(0x0001, B6, 0x1c, 0x00000010), .num_counters = 1, .norm = { 1, 1 }, }; @@ -567,7 +672,7 @@ sm30_gld_request = { .type = NVC0_HW_SM_QUERY_GLD_REQUEST, - .ctr[0] = _CA(0x0001, B6, LDST, 0x00000010), + .ctr[0] = _CA(0x0001, B6, 0x1b, 0x00000010), .num_counters = 1, .norm = { 1, 1 }, }; @@ -576,7 +681,7 @@ sm30_gld_mem_div_replay = { .type = NVC0_HW_SM_QUERY_GLD_MEM_DIV_REPLAY, - .ctr[0] = _CB(0x0001, B6, REPLAY, 0x00000010), + .ctr[0] = _CB(0x0001, B6, 0x08, 0x00000010), .num_counters = 1, .norm = { 1, 1 }, }; @@ -585,7 +690,7 @@ sm30_gst_transactions = { .type = NVC0_HW_SM_QUERY_GST_TRANSACTIONS, - .ctr[0] = _CB(0x0001, B6, MEM, 0x00000004), + .ctr[0] = _CB(0x0001, B6, 0x11, 0x00000004), .num_counters = 1, .norm = { 1, 1 }, }; @@ -594,7 +699,7 @@ sm30_gst_mem_div_replay = { .type = NVC0_HW_SM_QUERY_GST_MEM_DIV_REPLAY, - .ctr[0] = _CB(0x0001, B6, REPLAY, 0x00000014), + .ctr[0] = _CB(0x0001, B6, 0x08, 0x00000014), .num_counters = 1, .norm = { 1, 1 }, }; @@ -603,7 +708,7 @@ sm30_gred_count = { .type = NVC0_HW_SM_QUERY_GRED_COUNT, - .ctr[0] = _CA(0x0001, B6, BRANCH, 0x00000008), + .ctr[0] = _CA(0x0001, B6, 0x1c, 0x00000008), .num_counters = 1, .norm = { 1, 1 }, }; @@ -612,7 +717,7 @@ sm30_gst_request = { .type = NVC0_HW_SM_QUERY_GST_REQUEST, - .ctr[0] = _CA(0x0001, B6, LDST, 0x00000014), + .ctr[0] = _CA(0x0001, B6, 0x1b, 0x00000014), .num_counters = 1, .norm = { 1, 1 }, }; @@ -621,7 +726,7 @@ sm30_inst_executed = { .type = NVC0_HW_SM_QUERY_INST_EXECUTED, - .ctr[0] = _CA(0x0003, B6, EXEC, 0x00000398), + .ctr[0] = _CA(0x0003, B6, 0x04, 0x00000398), .num_counters = 1, .norm = { 1, 1 }, }; @@ -630,7 +735,7 @@ sm30_inst_issued1 = { .type = NVC0_HW_SM_QUERY_INST_ISSUED1, - .ctr[0] = _CA(0x0001, B6, ISSUE, 0x00000004), + .ctr[0] = _CA(0x0001, B6, 0x05, 0x00000004), .num_counters = 1, .norm = { 1, 1 }, }; @@ -639,7 +744,7 @@ sm30_inst_issued2 = { .type = NVC0_HW_SM_QUERY_INST_ISSUED2, - .ctr[0] = _CA(0x0001, B6, ISSUE, 0x00000008), + .ctr[0] = _CA(0x0001, B6, 0x05, 0x00000008), .num_counters = 1, .norm = { 1, 1 }, }; @@ -648,7 +753,7 @@ sm30_l1_gld_hit = { .type = NVC0_HW_SM_QUERY_L1_GLD_HIT, - .ctr[0] = _CB(0x0001, B6, L1, 0x00000010), + .ctr[0] = _CB(0x0001, B6, 0x10, 0x00000010), .num_counters = 1, .norm = { 1, 1 }, }; @@ -657,7 +762,7 @@ sm30_l1_gld_miss = { .type = NVC0_HW_SM_QUERY_L1_GLD_MISS, - .ctr[0] = _CB(0x0001, B6, L1, 0x00000014), + .ctr[0] = _CB(0x0001, B6, 0x10, 0x00000014), .num_counters = 1, .norm = { 1, 1 }, }; @@ -666,7 +771,7 @@ sm30_l1_gld_transactions = { .type = NVC0_HW_SM_QUERY_L1_GLD_TRANSACTIONS, - .ctr[0] = _CB(0x0001, B6, UNK0F, 0x00000000), + .ctr[0] = _CB(0x0001, B6, 0x0f, 0x00000000), .num_counters = 1, .norm = { 1, 1 }, }; @@ -675,7 +780,7 @@ sm30_l1_gst_transactions = { .type = NVC0_HW_SM_QUERY_L1_GST_TRANSACTIONS, - .ctr[0] = _CB(0x0001, B6, UNK0F, 0x00000004), + .ctr[0] = _CB(0x0001, B6, 0x0f, 0x00000004), .num_counters = 1, .norm = { 1, 1 }, }; @@ -684,7 +789,7 @@ sm30_l1_local_ld_hit = { .type = NVC0_HW_SM_QUERY_L1_LOCAL_LD_HIT, - .ctr[0] = _CB(0x0001, B6, L1, 0x00000000), + .ctr[0] = _CB(0x0001, B6, 0x10, 0x00000000), .num_counters = 1, .norm = { 1, 1 }, }; @@ -693,7 +798,7 @@ sm30_l1_local_ld_miss = { .type = NVC0_HW_SM_QUERY_L1_LOCAL_LD_MISS, - .ctr[0] = _CB(0x0001, B6, L1, 0x00000004), + .ctr[0] = _CB(0x0001, B6, 0x10, 0x00000004), .num_counters = 1, .norm = { 1, 1 }, }; @@ -702,7 +807,7 @@ sm30_l1_local_st_hit = { .type = NVC0_HW_SM_QUERY_L1_LOCAL_ST_HIT, - .ctr[0] = _CB(0x0001, B6, L1, 0x00000008), + .ctr[0] = _CB(0x0001, B6, 0x10, 0x00000008), .num_counters = 1, .norm = { 1, 1 }, }; @@ -711,7 +816,7 @@ sm30_l1_local_st_miss = { .type = NVC0_HW_SM_QUERY_L1_LOCAL_ST_MISS, - .ctr[0] = _CB(0x0001, B6, L1, 0x0000000c), + .ctr[0] = _CB(0x0001, B6, 0x10, 0x0000000c), .num_counters = 1, .norm = { 1, 1 }, }; @@ -720,7 +825,7 @@ sm30_l1_shared_ld_transactions = { .type = NVC0_HW_SM_QUERY_L1_SHARED_LD_TRANSACTIONS, - .ctr[0] = _CB(0x0001, B6, TRANSACTION, 0x00000008), + .ctr[0] = _CB(0x0001, B6, 0x0e, 0x00000008), .num_counters = 1, .norm = { 1, 1 }, }; @@ -729,7 +834,7 @@ sm30_l1_shared_st_transactions = { .type = NVC0_HW_SM_QUERY_L1_SHARED_ST_TRANSACTIONS, - .ctr[0] = _CB(0x0001, B6, TRANSACTION, 0x0000000c), + .ctr[0] = _CB(0x0001, B6, 0x0e, 0x0000000c), .num_counters = 1, .norm = { 1, 1 }, }; @@ -738,7 +843,7 @@ sm30_local_ld = { .type = NVC0_HW_SM_QUERY_LOCAL_LD, - .ctr[0] = _CA(0x0001, B6, LDST, 0x00000008), + .ctr[0] = _CA(0x0001, B6, 0x1b, 0x00000008), .num_counters = 1, .norm = { 1, 1 }, }; @@ -747,7 +852,7 @@ sm30_local_ld_transactions = { .type = NVC0_HW_SM_QUERY_LOCAL_LD_TRANSACTIONS, - .ctr[0] = _CB(0x0001, B6, TRANSACTION, 0x00000000), + .ctr[0] = _CB(0x0001, B6, 0x0e, 0x00000000), .num_counters = 1, .norm = { 1, 1 }, }; @@ -756,7 +861,7 @@ sm30_local_st = { .type = NVC0_HW_SM_QUERY_LOCAL_ST, - .ctr[0] = _CA(0x0001, B6, LDST, 0x0000000c), + .ctr[0] = _CA(0x0001, B6, 0x1b, 0x0000000c), .num_counters = 1, .norm = { 1, 1 }, }; @@ -765,7 +870,7 @@ sm30_local_st_transactions = { .type = NVC0_HW_SM_QUERY_LOCAL_ST_TRANSACTIONS, - .ctr[0] = _CB(0x0001, B6, TRANSACTION, 0x00000004), + .ctr[0] = _CB(0x0001, B6, 0x0e, 0x00000004), .num_counters = 1, .norm = { 1, 1 }, }; @@ -774,7 +879,7 @@ sm30_prof_trigger_0 = { .type = NVC0_HW_SM_QUERY_PROF_TRIGGER_0, - .ctr[0] = _CA(0x0001, B6, USER, 0x00000000), + .ctr[0] = _CA(0x0001, B6, 0x01, 0x00000000), .num_counters = 1, .norm = { 1, 1 }, }; @@ -783,7 +888,7 @@ sm30_prof_trigger_1 = { .type = NVC0_HW_SM_QUERY_PROF_TRIGGER_1, - .ctr[0] = _CA(0x0001, B6, USER, 0x00000004), + .ctr[0] = _CA(0x0001, B6, 0x01, 0x00000004), .num_counters = 1, .norm = { 1, 1 }, }; @@ -792,7 +897,7 @@ sm30_prof_trigger_2 = { .type = NVC0_HW_SM_QUERY_PROF_TRIGGER_2, - .ctr[0] = _CA(0x0001, B6, USER, 0x00000008), + .ctr[0] = _CA(0x0001, B6, 0x01, 0x00000008), .num_counters = 1, .norm = { 1, 1 }, }; @@ -801,7 +906,7 @@ sm30_prof_trigger_3 = { .type = NVC0_HW_SM_QUERY_PROF_TRIGGER_3, - .ctr[0] = _CA(0x0001, B6, USER, 0x0000000c), + .ctr[0] = _CA(0x0001, B6, 0x01, 0x0000000c), .num_counters = 1, .norm = { 1, 1 }, }; @@ -810,7 +915,7 @@ sm30_prof_trigger_4 = { .type = NVC0_HW_SM_QUERY_PROF_TRIGGER_4, - .ctr[0] = _CA(0x0001, B6, USER, 0x00000010), + .ctr[0] = _CA(0x0001, B6, 0x01, 0x00000010), .num_counters = 1, .norm = { 1, 1 }, }; @@ -819,7 +924,7 @@ sm30_prof_trigger_5 = { .type = NVC0_HW_SM_QUERY_PROF_TRIGGER_5, - .ctr[0] = _CA(0x0001, B6, USER, 0x00000014), + .ctr[0] = _CA(0x0001, B6, 0x01, 0x00000014), .num_counters = 1, .norm = { 1, 1 }, }; @@ -828,7 +933,7 @@ sm30_prof_trigger_6 = { .type = NVC0_HW_SM_QUERY_PROF_TRIGGER_6, - .ctr[0] = _CA(0x0001, B6, USER, 0x00000018), + .ctr[0] = _CA(0x0001, B6, 0x01, 0x00000018), .num_counters = 1, .norm = { 1, 1 }, }; @@ -837,7 +942,7 @@ sm30_prof_trigger_7 = { .type = NVC0_HW_SM_QUERY_PROF_TRIGGER_7, - .ctr[0] = _CA(0x0001, B6, USER, 0x0000001c), + .ctr[0] = _CA(0x0001, B6, 0x01, 0x0000001c), .num_counters = 1, .norm = { 1, 1 }, }; @@ -846,7 +951,7 @@ sm30_shared_ld = { .type = NVC0_HW_SM_QUERY_SHARED_LD, - .ctr[0] = _CA(0x0001, B6, LDST, 0x00000000), + .ctr[0] = _CA(0x0001, B6, 0x1b, 0x00000000), .num_counters = 1, .norm = { 1, 1 }, }; @@ -855,7 +960,7 @@ sm30_shared_ld_replay = { .type = NVC0_HW_SM_QUERY_SHARED_LD_REPLAY, - .ctr[0] = _CB(0x0001, B6, REPLAY, 0x00000008), + .ctr[0] = _CB(0x0001, B6, 0x08, 0x00000008), .num_counters = 1, .norm = { 1, 1 }, }; @@ -864,7 +969,7 @@ sm30_shared_st = { .type = NVC0_HW_SM_QUERY_SHARED_ST, - .ctr[0] = _CA(0x0001, B6, LDST, 0x00000004), + .ctr[0] = _CA(0x0001, B6, 0x1b, 0x00000004), .num_counters = 1, .norm = { 1, 1 }, }; @@ -873,7 +978,7 @@ sm30_shared_st_replay = { .type = NVC0_HW_SM_QUERY_SHARED_ST_REPLAY, - .ctr[0] = _CB(0x0001, B6, REPLAY, 0x0000000c), + .ctr[0] = _CB(0x0001, B6, 0x08, 0x0000000c), .num_counters = 1, .norm = { 1, 1 }, }; @@ -882,7 +987,7 @@ sm30_sm_cta_launched = { .type = NVC0_HW_SM_QUERY_SM_CTA_LAUNCHED, - .ctr[0] = _CB(0x0001, B6, WARP, 0x0000001c), + .ctr[0] = _CB(0x0001, B6, 0x02, 0x0000001c), .num_counters = 1, .norm = { 1, 1 }, }; @@ -891,7 +996,7 @@ sm30_threads_launched = { .type = NVC0_HW_SM_QUERY_THREADS_LAUNCHED, - .ctr[0] = _CA(0x003f, B6, LAUNCH, 0x398a4188), + .ctr[0] = _CA(0x003f, B6, 0x03, 0x398a4188), .num_counters = 1, .norm = { 1, 1 }, }; @@ -900,7 +1005,7 @@ sm30_uncached_gld_transactions = { .type = NVC0_HW_SM_QUERY_UNCACHED_GLD_TRANSACTIONS, - .ctr[0] = _CB(0x0001, B6, MEM, 0x00000000), + .ctr[0] = _CB(0x0001, B6, 0x11, 0x00000000), .num_counters = 1, .norm = { 1, 1 }, }; @@ -909,7 +1014,7 @@ sm30_warps_launched = { .type = NVC0_HW_SM_QUERY_WARPS_LAUNCHED, - .ctr[0] = _CA(0x0001, B6, LAUNCH, 0x00000004), + .ctr[0] = _CA(0x0001, B6, 0x03, 0x00000004), .num_counters = 1, .norm = { 1, 1 }, }; @@ -972,7 +1077,7 @@ sm35_atom_cas_count = { .type = NVC0_HW_SM_QUERY_ATOM_CAS_COUNT, - .ctr[0] = _CA(0x0001, B6, UNK1A, 0x00000014), + .ctr[0] = _CA(0x0001, B6, 0x1a, 0x00000014), .num_counters = 1, .norm = { 1, 1 }, }; @@ -981,7 +1086,7 @@ sm35_atom_count = { .type = NVC0_HW_SM_QUERY_ATOM_COUNT, - .ctr[0] = _CA(0x0001, B6, UNK1A, 0x00000010), + .ctr[0] = _CA(0x0001, B6, 0x1a, 0x00000010), .num_counters = 1, .norm = { 1, 1 }, }; @@ -990,7 +1095,7 @@ sm35_gred_count = { .type = NVC0_HW_SM_QUERY_GRED_COUNT, - .ctr[0] = _CA(0x0001, B6, UNK1A, 0x00000018), + .ctr[0] = _CA(0x0001, B6, 0x1a, 0x00000018), .num_counters = 1, .norm = { 1, 1 }, }; @@ -999,7 +1104,7 @@ sm35_not_pred_off_inst_executed = { .type = NVC0_HW_SM_QUERY_NOT_PRED_OFF_INST_EXECUTED, - .ctr[0] = _CA(0x003f, B6, UNK14, 0x29062080), + .ctr[0] = _CA(0x003f, B6, 0x14, 0x29062080), .num_counters = 1, .norm = { 1, 1 }, }; @@ -1008,8 +1113,8 @@ sm35_shared_ld_replay = { .type = NVC0_HW_SM_QUERY_SHARED_LD_REPLAY, - .ctr[0] = _CB(0xaaaa, LOGOP, UNK13, 0x00000018), - .ctr[1] = _CB(0x8888, LOGOP, REPLAY, 0x00000151), + .ctr[0] = _CB(0xaaaa, LOGOP, 0x13, 0x00000018), + .ctr[1] = _CB(0x8888, LOGOP, 0x08, 0x00000151), .num_counters = 2, .norm = { 1, 1 }, }; @@ -1018,8 +1123,8 @@ sm35_shared_st_replay = { .type = NVC0_HW_SM_QUERY_SHARED_ST_REPLAY, - .ctr[0] = _CB(0xaaaa, LOGOP, UNK13, 0x00000018), - .ctr[1] = _CB(0x8888, LOGOP, REPLAY, 0x000001d1), + .ctr[0] = _CB(0xaaaa, LOGOP, 0x13, 0x00000018), + .ctr[1] = _CB(0x8888, LOGOP, 0x08, 0x000001d1), .num_counters = 2, .norm = { 1, 1 }, }; @@ -1028,7 +1133,7 @@ sm35_th_inst_executed = { .type = NVC0_HW_SM_QUERY_TH_INST_EXECUTED, - .ctr[0] = _CA(0x003f, B6, UNK11, 0x29062080), + .ctr[0] = _CA(0x003f, B6, 0x11, 0x29062080), .num_counters = 1, .norm = { 1, 1 }, }; @@ -1082,6 +1187,556 @@ &sm30_warps_launched, }; +/* ==== Compute capability 5.0 (GM107/GM108) ==== */ +static const struct nvc0_hw_sm_query_cfg +sm50_active_ctas = +{ + .type = NVC0_HW_SM_QUERY_ACTIVE_CTAS, + .ctr[0] = _CB(0x003f, B6, 0x01, 0x29062080), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_active_cycles = +{ + .type = NVC0_HW_SM_QUERY_ACTIVE_CYCLES, + .ctr[0] = _CB(0x0001, B6, 0x00, 0x00000004), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_active_warps = +{ + .type = NVC0_HW_SM_QUERY_ACTIVE_WARPS, + .ctr[0] = _CB(0x003f, B6, 0x00, 0x398a4188), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_atom_count = +{ + .type = NVC0_HW_SM_QUERY_ATOM_COUNT, + .ctr[0] = _CA(0x0001, B6, 0x14, 0x00000004), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_branch = +{ + .type = NVC0_HW_SM_QUERY_BRANCH, + .ctr[0] = _CA(0x0001, B6, 0x1a, 0x00000010), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_divergent_branch = +{ + .type = NVC0_HW_SM_QUERY_DIVERGENT_BRANCH, + .ctr[0] = _CA(0x0001, B6, 0x1a, 0x00000004), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_global_atom_cas = +{ + .type = NVC0_HW_SM_QUERY_GLOBAL_ATOM_CAS, + .ctr[0] = _CA(0x0001, B6, 0x14, 0x00000000), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_global_ld = +{ + .type = NVC0_HW_SM_QUERY_GLOBAL_LD, + .ctr[0] = _CA(0x0001, B6, 0x14, 0x0000000c), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_global_st = +{ + .type = NVC0_HW_SM_QUERY_GLOBAL_ST, + .ctr[0] = _CA(0x0001, B6, 0x14, 0x00000010), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_gred_count = +{ + .type = NVC0_HW_SM_QUERY_GRED_COUNT, + .ctr[0] = _CA(0x0001, B6, 0x14, 0x00000008), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_inst_executed = +{ + .type = NVC0_HW_SM_QUERY_INST_EXECUTED, + .ctr[0] = _CA(0x0003, B6, 0x02, 0x00000398), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_inst_issued0 = +{ + .type = NVC0_HW_SM_QUERY_INST_ISSUED0, + .ctr[0] = _CA(0x0001, B6, 0x02, 0x0000000c), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_inst_issued1 = +{ + .type = NVC0_HW_SM_QUERY_INST_ISSUED1, + .ctr[0] = _CA(0x0001, B6, 0x02, 0x00000010), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_inst_issued2 = +{ + .type = NVC0_HW_SM_QUERY_INST_ISSUED2, + .ctr[0] = _CA(0x0001, B6, 0x02, 0x00000014), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_local_ld = +{ + .type = NVC0_HW_SM_QUERY_LOCAL_LD, + .ctr[0] = _CA(0x0001, B6, 0x13, 0x00000004), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_local_st = +{ + .type = NVC0_HW_SM_QUERY_LOCAL_ST, + .ctr[0] = _CA(0x0001, B6, 0x13, 0x00000000), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_not_pred_off_inst_executed = +{ + .type = NVC0_HW_SM_QUERY_NOT_PRED_OFF_INST_EXECUTED, + .ctr[0] = _CA(0x003f, B6, 0x05, 0x29062080), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_prof_trigger_0 = +{ + .type = NVC0_HW_SM_QUERY_PROF_TRIGGER_0, + .ctr[0] = _CA(0x0001, B6, 0x00, 0x00000000), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_prof_trigger_1 = +{ + .type = NVC0_HW_SM_QUERY_PROF_TRIGGER_1, + .ctr[0] = _CA(0x0001, B6, 0x00, 0x00000004), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_prof_trigger_2 = +{ + .type = NVC0_HW_SM_QUERY_PROF_TRIGGER_2, + .ctr[0] = _CA(0x0001, B6, 0x00, 0x00000008), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_prof_trigger_3 = +{ + .type = NVC0_HW_SM_QUERY_PROF_TRIGGER_3, + .ctr[0] = _CA(0x0001, B6, 0x00, 0x0000000c), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_prof_trigger_4 = +{ + .type = NVC0_HW_SM_QUERY_PROF_TRIGGER_4, + .ctr[0] = _CA(0x0001, B6, 0x00, 0x00000010), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_prof_trigger_5 = +{ + .type = NVC0_HW_SM_QUERY_PROF_TRIGGER_5, + .ctr[0] = _CA(0x0001, B6, 0x00, 0x00000014), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_prof_trigger_6 = +{ + .type = NVC0_HW_SM_QUERY_PROF_TRIGGER_6, + .ctr[0] = _CA(0x0001, B6, 0x00, 0x00000018), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_prof_trigger_7 = +{ + .type = NVC0_HW_SM_QUERY_PROF_TRIGGER_7, + .ctr[0] = _CA(0x0001, B6, 0x00, 0x0000001c), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_shared_atom = +{ + .type = NVC0_HW_SM_QUERY_SHARED_ATOM, + .ctr[0] = _CA(0x0001, B6, 0x13, 0x00000014), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_shared_atom_cas = +{ + .type = NVC0_HW_SM_QUERY_SHARED_ATOM_CAS, + .ctr[0] = _CA(0x0001, B6, 0x13, 0x00000010), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_shared_ld = +{ + .type = NVC0_HW_SM_QUERY_SHARED_LD, + .ctr[0] = _CA(0x0001, B6, 0x13, 0x00000008), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_shared_ld_bank_conflict = +{ + .type = NVC0_HW_SM_QUERY_SHARED_LD_BANK_CONFLICT, + .ctr[0] = _CB(0x0001, B6, 0x0e, 0x00000000), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_shared_ld_transactions = +{ + .type = NVC0_HW_SM_QUERY_SHARED_LD_TRANSACTIONS, + .ctr[0] = _CB(0x0001, B6, 0x0e, 0x00000008), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_shared_st = +{ + .type = NVC0_HW_SM_QUERY_SHARED_ST, + .ctr[0] = _CA(0x0001, B6, 0x13, 0x0000000c), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_shared_st_bank_conflict = +{ + .type = NVC0_HW_SM_QUERY_SHARED_ST_BANK_CONFLICT, + .ctr[0] = _CB(0x0001, B6, 0x0e, 0x00000004), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_shared_st_transactions = +{ + .type = NVC0_HW_SM_QUERY_SHARED_ST_TRANSACTIONS, + .ctr[0] = _CB(0x0001, B6, 0x0e, 0x0000000c), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_sm_cta_launched = +{ + .type = NVC0_HW_SM_QUERY_SM_CTA_LAUNCHED, + .ctr[0] = _CB(0x0001, B6, 0x01, 0x00000018), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_th_inst_executed = +{ + .type = NVC0_HW_SM_QUERY_TH_INST_EXECUTED, + .ctr[0] = _CA(0x003f, B6, 0x04, 0x29062080), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm50_warps_launched = +{ + .type = NVC0_HW_SM_QUERY_WARPS_LAUNCHED, + .ctr[0] = _CA(0x0001, B6, 0x02, 0x00000008), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg *sm50_hw_sm_queries[] = +{ + &sm50_active_ctas, + &sm50_active_cycles, + &sm50_active_warps, + &sm50_atom_count, + &sm50_branch, + &sm50_divergent_branch, + &sm50_global_atom_cas, + &sm50_global_ld, + &sm50_global_st, + &sm50_gred_count, + &sm50_inst_executed, + &sm50_inst_issued0, + &sm50_inst_issued1, + &sm50_inst_issued2, + &sm50_local_ld, + &sm50_local_st, + &sm50_not_pred_off_inst_executed, + &sm50_prof_trigger_0, + &sm50_prof_trigger_1, + &sm50_prof_trigger_2, + &sm50_prof_trigger_3, + &sm50_prof_trigger_4, + &sm50_prof_trigger_5, + &sm50_prof_trigger_6, + &sm50_prof_trigger_7, + &sm50_shared_atom, + &sm50_shared_atom_cas, + &sm50_shared_ld, + &sm50_shared_ld_bank_conflict, + &sm50_shared_ld_transactions, + &sm50_shared_st, + &sm50_shared_st_bank_conflict, + &sm50_shared_st_transactions, + &sm50_sm_cta_launched, + &sm50_th_inst_executed, + &sm50_warps_launched, +}; + +/* ==== Compute capability 5.2 (GM200/GM204/GM206) ==== */ +static const struct nvc0_hw_sm_query_cfg +sm52_atom_count = +{ + .type = NVC0_HW_SM_QUERY_ATOM_COUNT, + .ctr[0] = _CA(0x0001, B6, 0x0a, 0x0000001c), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm52_global_atom_cas = +{ + .type = NVC0_HW_SM_QUERY_GLOBAL_ATOM_CAS, + .ctr[0] = _CA(0x0001, B6, 0x0a, 0x00000018), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm52_global_ld = +{ + .type = NVC0_HW_SM_QUERY_GLOBAL_LD, + .ctr[0] = _CA(0x0001, B6, 0x0b, 0x00000018), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm52_global_st = +{ + .type = NVC0_HW_SM_QUERY_GLOBAL_ST, + .ctr[0] = _CA(0x0001, B6, 0x0b, 0x0000001c), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm52_gred_count = +{ + .type = NVC0_HW_SM_QUERY_GRED_COUNT, + .ctr[0] = _CA(0x0001, B6, 0x0f, 0x00000018), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm52_inst_executed = +{ + .type = NVC0_HW_SM_QUERY_INST_EXECUTED, + .ctr[0] = _CA(0x0003, B6, 0x03, 0x0000020c), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm52_inst_issued0 = +{ + .type = NVC0_HW_SM_QUERY_INST_ISSUED0, + .ctr[0] = _CA(0x0001, B6, 0x03, 0x00000000), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm52_inst_issued1 = +{ + .type = NVC0_HW_SM_QUERY_INST_ISSUED1, + .ctr[0] = _CA(0x0001, B6, 0x03, 0x00000004), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm52_inst_issued2 = +{ + .type = NVC0_HW_SM_QUERY_INST_ISSUED2, + .ctr[0] = _CA(0x0001, B6, 0x03, 0x00000008), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm52_local_ld = +{ + .type = NVC0_HW_SM_QUERY_LOCAL_LD, + .ctr[0] = _CA(0x0001, B6, 0x06, 0x0000001c), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm52_local_st = +{ + .type = NVC0_HW_SM_QUERY_LOCAL_ST, + .ctr[0] = _CA(0x0001, B6, 0x06, 0x00000018), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm52_shared_atom = +{ + .type = NVC0_HW_SM_QUERY_SHARED_ATOM, + .ctr[0] = _CA(0x0001, B6, 0x08, 0x0000001c), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm52_shared_atom_cas = +{ + .type = NVC0_HW_SM_QUERY_SHARED_ATOM_CAS, + .ctr[0] = _CA(0x0001, B6, 0x08, 0x00000018), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm52_shared_ld = +{ + .type = NVC0_HW_SM_QUERY_SHARED_LD, + .ctr[0] = _CA(0x0001, B6, 0x07, 0x00000018), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm52_shared_st = +{ + .type = NVC0_HW_SM_QUERY_SHARED_ST, + .ctr[0] = _CA(0x0001, B6, 0x07, 0x0000001c), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg +sm52_warps_launched = +{ + .type = NVC0_HW_SM_QUERY_WARPS_LAUNCHED, + .ctr[0] = _CA(0x0001, B6, 0x02, 0x0000001c), + .num_counters = 1, + .norm = { 1, 1 }, +}; + +static const struct nvc0_hw_sm_query_cfg *sm52_hw_sm_queries[] = +{ + &sm50_active_ctas, + &sm50_active_cycles, + &sm50_active_warps, + &sm52_atom_count, + &sm50_branch, + &sm50_divergent_branch, + &sm52_global_atom_cas, + &sm52_global_ld, + &sm52_global_st, + &sm52_gred_count, + &sm52_inst_executed, + &sm52_inst_issued0, + &sm52_inst_issued1, + &sm52_inst_issued2, + &sm52_local_ld, + &sm52_local_st, + &sm50_not_pred_off_inst_executed, + &sm50_prof_trigger_0, + &sm50_prof_trigger_1, + &sm50_prof_trigger_2, + &sm50_prof_trigger_3, + &sm50_prof_trigger_4, + &sm50_prof_trigger_5, + &sm50_prof_trigger_6, + &sm50_prof_trigger_7, + &sm52_shared_atom, + &sm52_shared_atom_cas, + &sm52_shared_ld, + &sm50_shared_ld_bank_conflict, + &sm50_shared_ld_transactions, + &sm52_shared_st, + &sm50_shared_st_bank_conflict, + &sm50_shared_st_transactions, + &sm50_sm_cta_launched, + &sm50_th_inst_executed, + &sm52_warps_launched, +}; + #undef _Q #undef _CA #undef _CB @@ -1105,14 +1760,14 @@ * mov b32 $r6 $pm6 * mov b32 $r7 $pm7 * set $p0 0x1 eq u32 $r8 0x0 - * mov b32 $r10 c15[0x600] - * mov b32 $r11 c15[0x604] + * mov b32 $r10 c15[0x620] + * mov b32 $r11 c15[0x624] * ext u32 $r8 $r9 0x414 * (not $p0) exit * mul $r8 u32 $r8 u32 48 * add b32 $r10 $c $r10 $r8 * add b32 $r11 $r11 0x0 $c - * mov b32 $r8 c15[0x608] + * mov b32 $r8 c15[0x628] * st b128 wt g[$r10d+0x00] $r0q * st b128 wt g[$r10d+0x10] $r4q * st b32 wt g[$r10d+0x20] $r8 @@ -1128,14 +1783,14 @@ 0x2c00000028019c04ULL, 0x2c0000002c01dc04ULL, 0x190e0000fc81dc03ULL, - 0x28007c1800029de4ULL, - 0x28007c181002dde4ULL, + 0x28007c1880029de4ULL, + 0x28007c189002dde4ULL, 0x7000c01050921c03ULL, 0x80000000000021e7ULL, 0x10000000c0821c02ULL, 0x4801000020a29c03ULL, 0x0800000000b2dc42ULL, - 0x28007c1820021de4ULL, + 0x28007c18a0021de4ULL, 0x9400000000a01fc5ULL, 0x9400000040a11fc5ULL, 0x9400000080a21f85ULL, @@ -1580,6 +2235,10 @@ struct nouveau_device *dev = screen->base.device; switch (screen->base.class_3d) { + case GM200_3D_CLASS: + return sm52_hw_sm_queries; + case GM107_3D_CLASS: + return sm50_hw_sm_queries; case NVF0_3D_CLASS: return sm35_hw_sm_queries; case NVE4_3D_CLASS: @@ -1599,6 +2258,10 @@ struct nouveau_device *dev = screen->base.device; switch (screen->base.class_3d) { + case GM200_3D_CLASS: + return ARRAY_SIZE(sm52_hw_sm_queries); + case GM107_3D_CLASS: + return ARRAY_SIZE(sm50_hw_sm_queries); case NVF0_3D_CLASS: return ARRAY_SIZE(sm35_hw_sm_queries); case NVE4_3D_CLASS: @@ -1710,6 +2373,18 @@ BEGIN_NVC0(push, NVE4_CP(MP_PM_SET(c)), 1); PUSH_DATA (push, 0); } + + if (screen->base.class_3d >= GM107_3D_CLASS) { + /* Enable mask for counters, it's 8-bits value where 0:3 is for domain A + * and 4:7 for domain B. For example, the mask for active_warps should be + * 0x70 because it uses 3 counters in domain B. However, let's always + * enable all counters because we don't want to track which ones is + * enabled or not, and this allows to monitor multiple queries at the + * same time. */ + BEGIN_NVC0(push, SUBC_CP(0x33e0), 1); + PUSH_DATA (push, 0xff); + } + return true; } @@ -1795,6 +2470,11 @@ prog->translated = true; prog->parm_size = 12; + if (screen->base.class_3d >= GM107_3D_CLASS) { + prog->code = (uint32_t *)gm107_read_hw_sm_counters_code; + prog->code_size = sizeof(gm107_read_hw_sm_counters_code); + prog->num_gprs = 14; + } else if (screen->base.class_3d == NVE4_3D_CLASS || screen->base.class_3d == NVF0_3D_CLASS) { if (screen->base.class_3d == NVE4_3D_CLASS) { @@ -1836,7 +2516,7 @@ PUSH_DATA (push, NVE4_COMPUTE_UPLOAD_EXEC_LINEAR | (0x20 << 1)); } else { BEGIN_NVC0(push, NVC0_CP(CB_SIZE), 3); - PUSH_DATA (push, 2048); + PUSH_DATA (push, NVC0_CB_AUX_SIZE); PUSH_DATAh(push, address); PUSH_DATA (push, address); BEGIN_1IC0(push, NVC0_CP(CB_POS), 1 + 3); @@ -1885,6 +2565,9 @@ } } + if (screen->base.class_3d >= GM107_3D_CLASS) + IMMED_NVC0(push, SUBC_CP(0x33e0), 0); + BCTX_REFN_bo(nvc0->bufctx_cp, CP_QUERY, NOUVEAU_BO_GART | NOUVEAU_BO_WR, hq->bo); @@ -2121,7 +2804,7 @@ if (id < count) { if (screen->compute) { - if (screen->base.class_3d <= NVF0_3D_CLASS) { + if (screen->base.class_3d <= GM200_3D_CLASS) { const struct nvc0_hw_sm_query_cfg **queries = nvc0_hw_sm_get_queries(screen); diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.h mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.h --- mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.h 2017-06-01 10:37:10.000000000 +0000 @@ -21,7 +21,8 @@ #define NVC0_HW_SM_QUERY_LAST NVC0_HW_SM_QUERY(NVC0_HW_SM_QUERY_COUNT - 1) enum nvc0_hw_sm_queries { - NVC0_HW_SM_QUERY_ACTIVE_CYCLES = 0, + NVC0_HW_SM_QUERY_ACTIVE_CTAS = 0, + NVC0_HW_SM_QUERY_ACTIVE_CYCLES, NVC0_HW_SM_QUERY_ACTIVE_WARPS, NVC0_HW_SM_QUERY_ATOM_CAS_COUNT, NVC0_HW_SM_QUERY_ATOM_COUNT, @@ -29,12 +30,16 @@ NVC0_HW_SM_QUERY_DIVERGENT_BRANCH, NVC0_HW_SM_QUERY_GLD_REQUEST, NVC0_HW_SM_QUERY_GLD_MEM_DIV_REPLAY, + NVC0_HW_SM_QUERY_GLOBAL_ATOM_CAS, + NVC0_HW_SM_QUERY_GLOBAL_LD, + NVC0_HW_SM_QUERY_GLOBAL_ST, NVC0_HW_SM_QUERY_GST_TRANSACTIONS, NVC0_HW_SM_QUERY_GST_MEM_DIV_REPLAY, NVC0_HW_SM_QUERY_GRED_COUNT, NVC0_HW_SM_QUERY_GST_REQUEST, NVC0_HW_SM_QUERY_INST_EXECUTED, NVC0_HW_SM_QUERY_INST_ISSUED, + NVC0_HW_SM_QUERY_INST_ISSUED0, NVC0_HW_SM_QUERY_INST_ISSUED1, NVC0_HW_SM_QUERY_INST_ISSUED2, NVC0_HW_SM_QUERY_INST_ISSUED1_0, @@ -64,10 +69,16 @@ NVC0_HW_SM_QUERY_PROF_TRIGGER_5, NVC0_HW_SM_QUERY_PROF_TRIGGER_6, NVC0_HW_SM_QUERY_PROF_TRIGGER_7, + NVC0_HW_SM_QUERY_SHARED_ATOM, + NVC0_HW_SM_QUERY_SHARED_ATOM_CAS, NVC0_HW_SM_QUERY_SHARED_LD, + NVC0_HW_SM_QUERY_SHARED_LD_BANK_CONFLICT, NVC0_HW_SM_QUERY_SHARED_LD_REPLAY, + NVC0_HW_SM_QUERY_SHARED_LD_TRANSACTIONS, NVC0_HW_SM_QUERY_SHARED_ST, + NVC0_HW_SM_QUERY_SHARED_ST_BANK_CONFLICT, NVC0_HW_SM_QUERY_SHARED_ST_REPLAY, + NVC0_HW_SM_QUERY_SHARED_ST_TRANSACTIONS, NVC0_HW_SM_QUERY_SM_CTA_LAUNCHED, NVC0_HW_SM_QUERY_THREADS_LAUNCHED, NVC0_HW_SM_QUERY_TH_INST_EXECUTED, diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_resource.c mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_resource.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_resource.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_resource.c 2017-06-01 10:37:10.000000000 +0000 @@ -49,7 +49,8 @@ pcontext->transfer_map = u_transfer_map_vtbl; pcontext->transfer_flush_region = u_transfer_flush_region_vtbl; pcontext->transfer_unmap = u_transfer_unmap_vtbl; - pcontext->transfer_inline_write = u_transfer_inline_write_vtbl; + pcontext->buffer_subdata = u_default_buffer_subdata; + pcontext->texture_subdata = u_default_texture_subdata; pcontext->create_surface = nvc0_surface_create; pcontext->surface_destroy = nv50_surface_destroy; pcontext->invalidate_resource = nv50_invalidate_resource; diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c 2017-06-01 10:37:10.000000000 +0000 @@ -38,6 +38,8 @@ #include "nvc0/mme/com9097.mme.h" #include "nvc0/mme/com90c0.mme.h" +#include "nv50/g80_texture.xml.h" + static boolean nvc0_screen_is_format_supported(struct pipe_screen *pscreen, enum pipe_format format, @@ -84,12 +86,17 @@ nouveau_screen(pscreen)->class_3d != NVEA_3D_CLASS) return false; - /* transfers & shared are always supported */ - bindings &= ~(PIPE_BIND_TRANSFER_READ | - PIPE_BIND_TRANSFER_WRITE | - PIPE_BIND_LINEAR | + /* shared is always supported */ + bindings &= ~(PIPE_BIND_LINEAR | PIPE_BIND_SHARED); + if (bindings & PIPE_BIND_SHADER_IMAGE && sample_count > 1 && + nouveau_screen(pscreen)->class_3d >= GM107_3D_CLASS) { + /* MS images are currently unsupported on Maxwell because they have to + * be handled explicitly. */ + return false; + } + return (( nvc0_format_table[format].usage | nvc0_vertex_format[format].usage) & bindings) == bindings; } @@ -120,9 +127,7 @@ case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE: return 128 * 1024 * 1024; case PIPE_CAP_GLSL_FEATURE_LEVEL: - if (class_3d <= NVF0_3D_CLASS) - return 430; - return 410; + return 430; case PIPE_CAP_MAX_RENDER_TARGETS: return 8; case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS: @@ -142,7 +147,9 @@ case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: return 256; case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT: - return 16; /* 256 for binding as RT, but that's not possible in GL */ + if (class_3d < GM107_3D_CLASS) + return 256; /* IMAGE bindings require alignment to 256 */ + return 16; case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT: return 16; case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT: @@ -157,6 +164,8 @@ return PIPE_ENDIAN_LITTLE; case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS: return 30; + case PIPE_CAP_MAX_WINDOW_RECTANGLES: + return NVC0_MAX_WINDOW_RECTANGLES; /* supported caps */ case PIPE_CAP_TEXTURE_MIRROR_CLAMP: @@ -164,6 +173,7 @@ case PIPE_CAP_TEXTURE_SHADOW_MAP: case PIPE_CAP_NPOT_TEXTURES: case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES: + case PIPE_CAP_MIXED_COLOR_DEPTH_BITS: case PIPE_CAP_ANISOTROPIC_FILTER: case PIPE_CAP_SEAMLESS_CUBE_MAP: case PIPE_CAP_CUBE_MAP_ARRAY: @@ -181,6 +191,7 @@ case PIPE_CAP_QUERY_TIME_ELAPSED: case PIPE_CAP_OCCLUSION_QUERY: case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME: + case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS: case PIPE_CAP_QUERY_PIPELINE_STATISTICS: case PIPE_CAP_BLEND_EQUATION_SEPARATE: case PIPE_CAP_INDEP_BLEND_ENABLE: @@ -230,13 +241,18 @@ case PIPE_CAP_CULL_DISTANCE: case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES: case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR: + case PIPE_CAP_TGSI_VOTE: + case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED: + case PIPE_CAP_TGSI_ARRAY_COMPONENTS: return 1; + case PIPE_CAP_COMPUTE: + return (class_3d < GP100_3D_CLASS); case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE: return (class_3d >= NVE4_3D_CLASS) ? 1 : 0; - case PIPE_CAP_COMPUTE: - return 1; case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER: return nouveau_screen(pscreen)->vram_domain & NOUVEAU_BO_VRAM ? 1 : 0; + case PIPE_CAP_TGSI_FS_FBFETCH: + return class_3d >= NVE4_3D_CLASS; /* needs testing on fermi */ /* unsupported caps */ case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT: @@ -261,6 +277,10 @@ case PIPE_CAP_PCI_BUS: case PIPE_CAP_PCI_DEVICE: case PIPE_CAP_PCI_FUNCTION: + case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS: + case PIPE_CAP_TGSI_CAN_READ_OUTPUTS: + case PIPE_CAP_NATIVE_FENCE_FD: + case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY: return 0; case PIPE_CAP_VENDOR_ID: @@ -296,11 +316,8 @@ case PIPE_SHADER_GEOMETRY: case PIPE_SHADER_FRAGMENT: case PIPE_SHADER_COMPUTE: - break; case PIPE_SHADER_TESS_CTRL: case PIPE_SHADER_TESS_EVAL: - if (class_3d >= GM107_3D_CLASS) - return 0; break; default: return 0; @@ -341,7 +358,6 @@ case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: return shader != PIPE_SHADER_FRAGMENT; case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: - return shader != PIPE_SHADER_FRAGMENT || class_3d < GM107_3D_CLASS; case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: return 1; @@ -365,6 +381,7 @@ return 1; case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED: case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: + case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: return 0; case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: return NVC0_MAX_BUFFERS; @@ -375,11 +392,10 @@ case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: return 32; case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: - if (class_3d == NVE4_3D_CLASS || class_3d == NVF0_3D_CLASS) + if (class_3d >= NVE4_3D_CLASS) + return NVC0_MAX_IMAGES; + if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE) return NVC0_MAX_IMAGES; - if (class_3d < NVE4_3D_CLASS) - if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE) - return NVC0_MAX_IMAGES; return 0; default: NOUVEAU_ERR("unknown PIPE_SHADER_CAP %d\n", param); @@ -441,6 +457,12 @@ RET(((uint64_t []) { 1024, 1024, 64 })); case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK: RET((uint64_t []) { 1024 }); + case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK: + if (obj_class >= NVE4_COMPUTE_CLASS) { + RET((uint64_t []) { 1024 }); + } else { + RET((uint64_t []) { 512 }); + } case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE: /* g[] */ RET((uint64_t []) { 1ULL << 40 }); case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE: /* s[] */ @@ -469,6 +491,8 @@ RET((uint32_t []) { screen->mp_count_compute }); case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY: RET((uint32_t []) { 512 }); /* FIXME: arbitrary limit */ + case PIPE_COMPUTE_CAP_ADDRESS_BITS: + RET((uint32_t []) { 64 }); default: return 0; } @@ -516,6 +540,7 @@ nouveau_heap_destroy(&screen->lib_code); nouveau_heap_destroy(&screen->text_heap); + FREE(screen->default_tsc); FREE(screen->tic.entries); nouveau_object_del(&screen->eng3d); @@ -654,12 +679,14 @@ case 0x110: case 0x120: return nve4_screen_compute_setup(screen, screen->base.pushbuf); + case 0x130: + return 0; default: return -1; } } -bool +static int nvc0_screen_resize_tls_area(struct nvc0_screen *screen, uint32_t lpos, uint32_t lneg, uint32_t cstack) { @@ -669,7 +696,7 @@ if (size >= (1 << 20)) { NOUVEAU_ERR("requested TLS size too large: 0x%"PRIx64"\n", size); - return false; + return -1; } size *= (screen->base.device->chipset >= 0xe0) ? 64 : 48; /* max warps */ @@ -680,13 +707,47 @@ ret = nouveau_bo_new(screen->base.device, NV_VRAM_DOMAIN(&screen->base), 1 << 17, size, NULL, &bo); - if (ret) { - NOUVEAU_ERR("failed to allocate TLS area, size: 0x%"PRIx64"\n", size); - return false; - } + if (ret) + return ret; nouveau_bo_ref(NULL, &screen->tls); screen->tls = bo; - return true; + return 0; +} + +int +nvc0_screen_resize_text_area(struct nvc0_screen *screen, uint64_t size) +{ + struct nouveau_pushbuf *push = screen->base.pushbuf; + struct nouveau_bo *bo; + int ret; + + ret = nouveau_bo_new(screen->base.device, NV_VRAM_DOMAIN(&screen->base), + 1 << 17, size, NULL, &bo); + if (ret) + return ret; + + nouveau_bo_ref(NULL, &screen->text); + screen->text = bo; + + nouveau_heap_destroy(&screen->lib_code); + nouveau_heap_destroy(&screen->text_heap); + + /* XXX: getting a page fault at the end of the code buffer every few + * launches, don't use the last 256 bytes to work around them - prefetch ? + */ + nouveau_heap_init(&screen->text_heap, 0, size - 0x100); + + /* update the code segment setup */ + BEGIN_NVC0(push, NVC0_3D(CODE_ADDRESS_HIGH), 2); + PUSH_DATAh(push, screen->text->offset); + PUSH_DATA (push, screen->text->offset); + if (screen->compute) { + BEGIN_NVC0(push, NVC0_CP(CODE_ADDRESS_HIGH), 2); + PUSH_DATAh(push, screen->text->offset); + PUSH_DATA (push, screen->text->offset); + } + + return 0; } #define FAIL_SCREEN_INIT(str, err) \ @@ -716,6 +777,7 @@ case 0x100: case 0x110: case 0x120: + case 0x130: break; default: return NULL; @@ -728,10 +790,8 @@ pscreen->destroy = nvc0_screen_destroy; ret = nouveau_screen_init(&screen->base, dev); - if (ret) { - nvc0_screen_destroy(pscreen); - return NULL; - } + if (ret) + FAIL_SCREEN_INIT("Base screen init failed: %d\n", ret); chan = screen->base.channel; push = screen->base.pushbuf; push->user_priv = screen; @@ -768,7 +828,7 @@ ret = nouveau_bo_new(dev, flags, 0, 4096, NULL, &screen->fence.bo); if (ret) - goto fail; + FAIL_SCREEN_INIT("Error allocating fence BO: %d\n", ret); nouveau_bo_map(screen->fence.bo, 0, NULL); screen->fence.map = screen->fence.bo->map; screen->base.fence.emit = nvc0_screen_fence_emit; @@ -784,6 +844,7 @@ PUSH_DATA (push, screen->nvsw->handle); switch (dev->chipset & ~0xf) { + case 0x130: case 0x120: case 0x110: case 0x100: @@ -836,6 +897,9 @@ PUSH_DATA (push, screen->fence.bo->offset + 16); switch (dev->chipset & ~0xf) { + case 0x130: + obj_class = GP100_3D_CLASS; + break; case 0x120: obj_class = GM200_3D_CLASS; break; @@ -896,7 +960,7 @@ screen->base.drm->version >= 0x01000101); BEGIN_NVC0(push, NVC0_3D(RT_COMP_ENABLE(0)), 8); for (i = 0; i < 8; ++i) - PUSH_DATA(push, screen->base.drm->version >= 0x01000101); + PUSH_DATA(push, screen->base.drm->version >= 0x01000101); BEGIN_NVC0(push, NVC0_3D(RT_CONTROL), 1); PUSH_DATA (push, 1); @@ -936,46 +1000,17 @@ nvc0_magic_3d_init(push, screen->eng3d->oclass); - ret = nouveau_bo_new(dev, NV_VRAM_DOMAIN(&screen->base), 1 << 17, 1 << 20, NULL, - &screen->text); + ret = nvc0_screen_resize_text_area(screen, 1 << 19); if (ret) - goto fail; - - /* XXX: getting a page fault at the end of the code buffer every few - * launches, don't use the last 256 bytes to work around them - prefetch ? - */ - nouveau_heap_init(&screen->text_heap, 0, (1 << 20) - 0x100); + FAIL_SCREEN_INIT("Error allocating TEXT area: %d\n", ret); ret = nouveau_bo_new(dev, NV_VRAM_DOMAIN(&screen->base), 1 << 12, 7 << 16, NULL, &screen->uniform_bo); if (ret) - goto fail; + FAIL_SCREEN_INIT("Error allocating uniform BO: %d\n", ret); PUSH_REFN (push, screen->uniform_bo, NV_VRAM_DOMAIN(&screen->base) | NOUVEAU_BO_WR); - for (i = 0; i < 5; ++i) { - /* TIC and TSC entries for each unit (nve4+ only) */ - /* auxiliary constants (6 user clip planes, base instance id) */ - BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3); - PUSH_DATA (push, 2048); - PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(i)); - PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(i)); - BEGIN_NVC0(push, NVC0_3D(CB_BIND(i)), 1); - PUSH_DATA (push, (15 << 4) | 1); - if (screen->eng3d->oclass >= NVE4_3D_CLASS) { - unsigned j; - BEGIN_1IC0(push, NVC0_3D(CB_POS), 9); - PUSH_DATA (push, NVC0_CB_AUX_UNK_INFO); - for (j = 0; j < 8; ++j) - PUSH_DATA(push, j); - } else { - BEGIN_NVC0(push, NVC0_3D(TEX_LIMITS(i)), 1); - PUSH_DATA (push, 0x54); - } - } - BEGIN_NVC0(push, NVC0_3D(LINKED_TSC), 1); - PUSH_DATA (push, 0); - /* return { 0.0, 0.0, 0.0, 0.0 } for out-of-bounds vtxbuf access */ BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3); PUSH_DATA (push, 256); @@ -993,10 +1028,8 @@ if (screen->base.drm->version >= 0x01000101) { ret = nouveau_getparam(dev, NOUVEAU_GETPARAM_GRAPH_UNITS, &value); - if (ret) { - NOUVEAU_ERR("NOUVEAU_GETPARAM_GRAPH_UNITS failed.\n"); - goto fail; - } + if (ret) + FAIL_SCREEN_INIT("NOUVEAU_GETPARAM_GRAPH_UNITS failed: %d\n", ret); } else { if (dev->chipset >= 0xe0 && dev->chipset < 0xf0) value = (8 << 8) | 4; @@ -1007,11 +1040,10 @@ screen->mp_count = value >> 8; screen->mp_count_compute = screen->mp_count; - nvc0_screen_resize_tls_area(screen, 128 * 16, 0, 0x200); + ret = nvc0_screen_resize_tls_area(screen, 128 * 16, 0, 0x200); + if (ret) + FAIL_SCREEN_INIT("Error allocating TLS area: %d\n", ret); - BEGIN_NVC0(push, NVC0_3D(CODE_ADDRESS_HIGH), 2); - PUSH_DATAh(push, screen->text->offset); - PUSH_DATA (push, screen->text->offset); BEGIN_NVC0(push, NVC0_3D(TEMP_ADDRESS_HIGH), 4); PUSH_DATAh(push, screen->tls->offset); PUSH_DATA (push, screen->tls->offset); @@ -1030,7 +1062,7 @@ ret = nouveau_bo_new(dev, NV_VRAM_DOMAIN(&screen->base), 1 << 17, 1 << 20, NULL, &screen->poly_cache); if (ret) - goto fail; + FAIL_SCREEN_INIT("Error allocating poly cache BO: %d\n", ret); BEGIN_NVC0(push, NVC0_3D(VERTEX_QUARANTINE_ADDRESS_HIGH), 3); PUSH_DATAh(push, screen->poly_cache->offset); @@ -1041,7 +1073,7 @@ ret = nouveau_bo_new(dev, NV_VRAM_DOMAIN(&screen->base), 1 << 17, 1 << 17, NULL, &screen->txc); if (ret) - goto fail; + FAIL_SCREEN_INIT("Error allocating txc BO: %d\n", ret); BEGIN_NVC0(push, NVC0_3D(TIC_ADDRESS_HIGH), 3); PUSH_DATAh(push, screen->txc->offset); @@ -1148,6 +1180,50 @@ if (nvc0_screen_init_compute(screen)) goto fail; + /* XXX: Compute and 3D are somehow aliased on Fermi. */ + for (i = 0; i < 5; ++i) { + /* TIC and TSC entries for each unit (nve4+ only) */ + /* auxiliary constants (6 user clip planes, base instance id) */ + BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3); + PUSH_DATA (push, NVC0_CB_AUX_SIZE); + PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(i)); + PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(i)); + BEGIN_NVC0(push, NVC0_3D(CB_BIND(i)), 1); + PUSH_DATA (push, (15 << 4) | 1); + if (screen->eng3d->oclass >= NVE4_3D_CLASS) { + unsigned j; + BEGIN_1IC0(push, NVC0_3D(CB_POS), 9); + PUSH_DATA (push, NVC0_CB_AUX_UNK_INFO); + for (j = 0; j < 8; ++j) + PUSH_DATA(push, j); + } else { + BEGIN_NVC0(push, NVC0_3D(TEX_LIMITS(i)), 1); + PUSH_DATA (push, 0x54); + } + + /* MS sample coordinate offsets: these do not work with _ALT modes ! */ + BEGIN_1IC0(push, NVC0_3D(CB_POS), 1 + 2 * 8); + PUSH_DATA (push, NVC0_CB_AUX_MS_INFO); + PUSH_DATA (push, 0); /* 0 */ + PUSH_DATA (push, 0); + PUSH_DATA (push, 1); /* 1 */ + PUSH_DATA (push, 0); + PUSH_DATA (push, 0); /* 2 */ + PUSH_DATA (push, 1); + PUSH_DATA (push, 1); /* 3 */ + PUSH_DATA (push, 1); + PUSH_DATA (push, 2); /* 4 */ + PUSH_DATA (push, 0); + PUSH_DATA (push, 3); /* 5 */ + PUSH_DATA (push, 0); + PUSH_DATA (push, 2); /* 6 */ + PUSH_DATA (push, 1); + PUSH_DATA (push, 3); /* 7 */ + PUSH_DATA (push, 1); + } + BEGIN_NVC0(push, NVC0_3D(LINKED_TSC), 1); + PUSH_DATA (push, 0); + PUSH_KICK (push); screen->tic.entries = CALLOC(4096, sizeof(void *)); @@ -1156,7 +1232,10 @@ if (!nvc0_blitter_create(screen)) goto fail; - nouveau_fence_new(&screen->base, &screen->base.fence.current, false); + screen->default_tsc = CALLOC_STRUCT(nv50_tsc_entry); + screen->default_tsc->tsc[0] = G80_TSC_0_SRGB_CONVERSION; + + nouveau_fence_new(&screen->base, &screen->base.fence.current); return &screen->base; diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h --- mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h 2017-06-01 10:37:10.000000000 +0000 @@ -14,8 +14,8 @@ #define NVC0_TIC_MAX_ENTRIES 2048 #define NVC0_TSC_MAX_ENTRIES 2048 -/* doesn't count reserved slots (for auxiliary constants, immediates, etc.) */ -#define NVC0_MAX_PIPE_CONSTBUFS 14 +/* doesn't count driver-reserved slot */ +#define NVC0_MAX_PIPE_CONSTBUFS 15 #define NVC0_MAX_SURFACE_SLOTS 16 @@ -25,6 +25,8 @@ #define NVC0_MAX_IMAGES 8 +#define NVC0_MAX_WINDOW_RECTANGLES 8 + struct nvc0_context; struct nvc0_blitter; @@ -48,7 +50,6 @@ uint8_t num_textures[6]; uint8_t num_samplers[6]; uint8_t tls_required; /* bitmask of shader types using l[] */ - uint8_t c14_bound; /* whether immediate array constbuf is bound */ uint8_t clip_enable; uint32_t clip_mode; uint32_t uniform_buffer_bound[6]; @@ -79,6 +80,8 @@ struct nvc0_blitter *blitter; + struct nv50_tsc_entry *default_tsc; + struct { void **entries; int next; @@ -134,8 +137,7 @@ int nve4_screen_compute_setup(struct nvc0_screen *, struct nouveau_pushbuf *); int nvc0_screen_compute_setup(struct nvc0_screen *, struct nouveau_pushbuf *); -bool nvc0_screen_resize_tls_area(struct nvc0_screen *, uint32_t lpos, - uint32_t lneg, uint32_t cstack); +int nvc0_screen_resize_text_area(struct nvc0_screen *, uint64_t); static inline void nvc0_resource_fence(struct nv04_resource *res, uint32_t flags) diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -34,8 +34,6 @@ nvc0_program_update_context_state(struct nvc0_context *nvc0, struct nvc0_program *prog, int stage) { - struct nouveau_pushbuf *push = nvc0->base.pushbuf; - if (prog && prog->need_tls) { const uint32_t flags = NV_VRAM_DOMAIN(&nvc0->screen->base) | NOUVEAU_BO_RDWR; if (!nvc0->state.tls_required) @@ -46,24 +44,6 @@ nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_3D_TLS); nvc0->state.tls_required &= ~(1 << stage); } - - if (prog && prog->immd_size) { - BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3); - /* NOTE: may overlap code of a different shader */ - PUSH_DATA (push, align(prog->immd_size, 0x100)); - PUSH_DATAh(push, nvc0->screen->text->offset + prog->immd_base); - PUSH_DATA (push, nvc0->screen->text->offset + prog->immd_base); - BEGIN_NVC0(push, NVC0_3D(CB_BIND(stage)), 1); - PUSH_DATA (push, (14 << 4) | 1); - - nvc0->state.c14_bound |= 1 << stage; - } else - if (nvc0->state.c14_bound & (1 << stage)) { - BEGIN_NVC0(push, NVC0_3D(CB_BIND(stage)), 1); - PUSH_DATA (push, (14 << 4) | 0); - - nvc0->state.c14_bound &= ~(1 << stage); - } } static inline bool @@ -80,7 +60,7 @@ } if (likely(prog->code_size)) - return nvc0_program_upload_code(nvc0, prog); + return nvc0_program_upload(nvc0, prog); return true; /* stream output info only */ } diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_state.c mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_state.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -91,6 +91,7 @@ struct nvc0_blend_stateobj *so = CALLOC_STRUCT(nvc0_blend_stateobj); int i; int r; /* reference */ + uint32_t ms; uint8_t blend_en = 0; bool indep_masks = false; bool indep_funcs = false; @@ -176,6 +177,15 @@ } } + ms = 0; + if (cso->alpha_to_coverage) + ms |= NVC0_3D_MULTISAMPLE_CTRL_ALPHA_TO_COVERAGE; + if (cso->alpha_to_one) + ms |= NVC0_3D_MULTISAMPLE_CTRL_ALPHA_TO_ONE; + + SB_BEGIN_3D(so, MULTISAMPLE_CTRL, 1); + SB_DATA (so, ms); + assert(so->size <= ARRAY_SIZE(so->state)); return so; } @@ -283,8 +293,10 @@ if (cso->offset_point || cso->offset_line || cso->offset_tri) { SB_BEGIN_3D(so, POLYGON_OFFSET_FACTOR, 1); SB_DATA (so, fui(cso->offset_scale)); - SB_BEGIN_3D(so, POLYGON_OFFSET_UNITS, 1); - SB_DATA (so, fui(cso->offset_units * 2.0f)); + if (!cso->offset_units_unscaled) { + SB_BEGIN_3D(so, POLYGON_OFFSET_UNITS, 1); + SB_DATA (so, fui(cso->offset_units * 2.0f)); + } SB_BEGIN_3D(so, POLYGON_OFFSET_CLAMP, 1); SB_DATA (so, fui(cso->offset_clamp)); } @@ -424,7 +436,8 @@ } static inline void -nvc0_stage_sampler_states_bind(struct nvc0_context *nvc0, int s, +nvc0_stage_sampler_states_bind(struct nvc0_context *nvc0, + unsigned s, unsigned nr, void **hwcso) { unsigned i; @@ -448,83 +461,22 @@ } nvc0->num_samplers[s] = nr; - - nvc0->dirty_3d |= NVC0_NEW_3D_SAMPLERS; } static void -nvc0_stage_sampler_states_bind_range(struct nvc0_context *nvc0, - const unsigned s, - unsigned start, unsigned nr, void **cso) +nvc0_bind_sampler_states(struct pipe_context *pipe, + enum pipe_shader_type shader, + unsigned start, unsigned nr, void **samplers) { - const unsigned end = start + nr; - int last_valid = -1; - unsigned i; - - if (cso) { - for (i = start; i < end; ++i) { - const unsigned p = i - start; - if (cso[p]) - last_valid = i; - if (cso[p] == nvc0->samplers[s][i]) - continue; - nvc0->samplers_dirty[s] |= 1 << i; - - if (nvc0->samplers[s][i]) - nvc0_screen_tsc_unlock(nvc0->screen, nvc0->samplers[s][i]); - nvc0->samplers[s][i] = cso[p]; - } - } else { - for (i = start; i < end; ++i) { - if (nvc0->samplers[s][i]) { - nvc0_screen_tsc_unlock(nvc0->screen, nvc0->samplers[s][i]); - nvc0->samplers[s][i] = NULL; - nvc0->samplers_dirty[s] |= 1 << i; - } - } - } + const unsigned s = nvc0_shader_stage(shader); - if (nvc0->num_samplers[s] <= end) { - if (last_valid < 0) { - for (i = start; i && !nvc0->samplers[s][i - 1]; --i); - nvc0->num_samplers[s] = i; - } else { - nvc0->num_samplers[s] = last_valid + 1; - } - } -} + assert(start == 0); + nvc0_stage_sampler_states_bind(nvc0_context(pipe), s, nr, samplers); -static void -nvc0_bind_sampler_states(struct pipe_context *pipe, unsigned shader, - unsigned start, unsigned nr, void **s) -{ - switch (shader) { - case PIPE_SHADER_VERTEX: - assert(start == 0); - nvc0_stage_sampler_states_bind(nvc0_context(pipe), 0, nr, s); - break; - case PIPE_SHADER_TESS_CTRL: - assert(start == 0); - nvc0_stage_sampler_states_bind(nvc0_context(pipe), 1, nr, s); - break; - case PIPE_SHADER_TESS_EVAL: - assert(start == 0); - nvc0_stage_sampler_states_bind(nvc0_context(pipe), 2, nr, s); - break; - case PIPE_SHADER_GEOMETRY: - assert(start == 0); - nvc0_stage_sampler_states_bind(nvc0_context(pipe), 3, nr, s); - break; - case PIPE_SHADER_FRAGMENT: - assert(start == 0); - nvc0_stage_sampler_states_bind(nvc0_context(pipe), 4, nr, s); - break; - case PIPE_SHADER_COMPUTE: - nvc0_stage_sampler_states_bind_range(nvc0_context(pipe), 5, - start, nr, s); + if (s == 5) nvc0_context(pipe)->dirty_cp |= NVC0_NEW_CP_SAMPLERS; - break; - } + else + nvc0_context(pipe)->dirty_3d |= NVC0_NEW_3D_SAMPLERS; } @@ -566,7 +518,10 @@ } if (old) { - nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_3D_TEX(s, i)); + if (s == 5) + nouveau_bufctx_reset(nvc0->bufctx_cp, NVC0_BIND_CP_TEX(i)); + else + nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_3D_TEX(s, i)); nvc0_screen_tic_unlock(nvc0->screen, old); } @@ -576,111 +531,34 @@ for (i = nr; i < nvc0->num_textures[s]; ++i) { struct nv50_tic_entry *old = nv50_tic_entry(nvc0->textures[s][i]); if (old) { - nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_3D_TEX(s, i)); + if (s == 5) + nouveau_bufctx_reset(nvc0->bufctx_cp, NVC0_BIND_CP_TEX(i)); + else + nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_3D_TEX(s, i)); nvc0_screen_tic_unlock(nvc0->screen, old); pipe_sampler_view_reference(&nvc0->textures[s][i], NULL); } } nvc0->num_textures[s] = nr; - - nvc0->dirty_3d |= NVC0_NEW_3D_TEXTURES; } static void -nvc0_stage_set_sampler_views_range(struct nvc0_context *nvc0, const unsigned s, - unsigned start, unsigned nr, - struct pipe_sampler_view **views) -{ - struct nouveau_bufctx *bctx = (s == 5) ? nvc0->bufctx_cp : nvc0->bufctx_3d; - const unsigned end = start + nr; - const unsigned bin = (s == 5) ? NVC0_BIND_CP_TEX(0) : NVC0_BIND_3D_TEX(s, 0); - int last_valid = -1; - unsigned i; - - if (views) { - for (i = start; i < end; ++i) { - const unsigned p = i - start; - if (views[p]) - last_valid = i; - if (views[p] == nvc0->textures[s][i]) - continue; - nvc0->textures_dirty[s] |= 1 << i; - - if (views[p] && views[p]->texture) { - struct pipe_resource *res = views[p]->texture; - if (res->target == PIPE_BUFFER && - (res->flags & PIPE_RESOURCE_FLAG_MAP_COHERENT)) - nvc0->textures_coherent[s] |= 1 << i; - else - nvc0->textures_coherent[s] &= ~(1 << i); - } else { - nvc0->textures_coherent[s] &= ~(1 << i); - } - - if (nvc0->textures[s][i]) { - struct nv50_tic_entry *old = nv50_tic_entry(nvc0->textures[s][i]); - nouveau_bufctx_reset(bctx, bin + i); - nvc0_screen_tic_unlock(nvc0->screen, old); - } - pipe_sampler_view_reference(&nvc0->textures[s][i], views[p]); - } - } else { - for (i = start; i < end; ++i) { - struct nv50_tic_entry *old = nv50_tic_entry(nvc0->textures[s][i]); - if (!old) - continue; - nvc0->textures_dirty[s] |= 1 << i; - - nvc0_screen_tic_unlock(nvc0->screen, old); - pipe_sampler_view_reference(&nvc0->textures[s][i], NULL); - nouveau_bufctx_reset(bctx, bin + i); - } - } - - if (nvc0->num_textures[s] <= end) { - if (last_valid < 0) { - for (i = start; i && !nvc0->textures[s][i - 1]; --i); - nvc0->num_textures[s] = i; - } else { - nvc0->num_textures[s] = last_valid + 1; - } - } -} - -static void -nvc0_set_sampler_views(struct pipe_context *pipe, unsigned shader, +nvc0_set_sampler_views(struct pipe_context *pipe, enum pipe_shader_type shader, unsigned start, unsigned nr, struct pipe_sampler_view **views) { + const unsigned s = nvc0_shader_stage(shader); + assert(start == 0); - switch (shader) { - case PIPE_SHADER_VERTEX: - nvc0_stage_set_sampler_views(nvc0_context(pipe), 0, nr, views); - break; - case PIPE_SHADER_TESS_CTRL: - nvc0_stage_set_sampler_views(nvc0_context(pipe), 1, nr, views); - break; - case PIPE_SHADER_TESS_EVAL: - nvc0_stage_set_sampler_views(nvc0_context(pipe), 2, nr, views); - break; - case PIPE_SHADER_GEOMETRY: - nvc0_stage_set_sampler_views(nvc0_context(pipe), 3, nr, views); - break; - case PIPE_SHADER_FRAGMENT: - nvc0_stage_set_sampler_views(nvc0_context(pipe), 4, nr, views); - break; - case PIPE_SHADER_COMPUTE: - nvc0_stage_set_sampler_views_range(nvc0_context(pipe), 5, - start, nr, views); + nvc0_stage_set_sampler_views(nvc0_context(pipe), s, nr, views); + + if (s == 5) nvc0_context(pipe)->dirty_cp |= NVC0_NEW_CP_TEXTURES; - break; - default: - ; - } + else + nvc0_context(pipe)->dirty_3d |= NVC0_NEW_3D_TEXTURES; } - /* ============================= SHADERS ======================================= */ @@ -817,6 +695,10 @@ prog->pipe.tokens = tgsi_dup_tokens((const struct tgsi_token *)cso->prog); + prog->translated = nvc0_program_translate( + prog, nvc0_context(pipe)->screen->base.device->chipset, + &nouveau_context(pipe)->debug); + return (void *)prog; } @@ -831,7 +713,7 @@ static void nvc0_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, - struct pipe_constant_buffer *cb) + const struct pipe_constant_buffer *cb) { struct nvc0_context *nvc0 = nvc0_context(pipe); struct pipe_resource *res = cb ? cb->buffer : NULL; @@ -1000,6 +882,22 @@ } static void +nvc0_set_window_rectangles(struct pipe_context *pipe, + boolean include, + unsigned num_rectangles, + const struct pipe_scissor_state *rectangles) +{ + struct nvc0_context *nvc0 = nvc0_context(pipe); + + nvc0->window_rect.inclusive = include; + nvc0->window_rect.rects = MIN2(num_rectangles, NVC0_MAX_WINDOW_RECTANGLES); + memcpy(nvc0->window_rect.rect, rectangles, + sizeof(struct pipe_scissor_state) * nvc0->window_rect.rects); + + nvc0->dirty_3d |= NVC0_NEW_3D_WINDOW_RECTS; +} + +static void nvc0_set_tess_state(struct pipe_context *pipe, const float default_tess_outer[4], const float default_tess_inner[2]) @@ -1234,7 +1132,7 @@ static bool nvc0_bind_images_range(struct nvc0_context *nvc0, const unsigned s, unsigned start, unsigned nr, - struct pipe_image_view *pimages) + const struct pipe_image_view *pimages) { const unsigned end = start + nr; unsigned mask = 0; @@ -1253,8 +1151,8 @@ if (img->resource == NULL) continue; if (img->resource->target == PIPE_BUFFER && - img->u.buf.first_element == pimages[p].u.buf.first_element && - img->u.buf.last_element == pimages[p].u.buf.last_element) + img->u.buf.offset == pimages[p].u.buf.offset && + img->u.buf.size == pimages[p].u.buf.size) continue; if (img->resource->target != PIPE_BUFFER && img->u.tex.first_layer == pimages[p].u.tex.first_layer && @@ -1278,6 +1176,19 @@ pipe_resource_reference( &img->resource, pimages[p].resource); + + if (nvc0->screen->base.class_3d >= GM107_3D_CLASS) { + if (nvc0->images_tic[s][i]) { + struct nv50_tic_entry *old = + nv50_tic_entry(nvc0->images_tic[s][i]); + nvc0_screen_tic_unlock(nvc0->screen, old); + pipe_sampler_view_reference(&nvc0->images_tic[s][i], NULL); + } + + nvc0->images_tic[s][i] = + gm107_create_texture_view_from_image(&nvc0->base.pipe, + &pimages[p]); + } } if (!mask) return false; @@ -1285,8 +1196,16 @@ mask = ((1 << nr) - 1) << start; if (!(nvc0->images_valid[s] & mask)) return false; - for (i = start; i < end; ++i) + for (i = start; i < end; ++i) { pipe_resource_reference(&nvc0->images[s][i].resource, NULL); + if (nvc0->screen->base.class_3d >= GM107_3D_CLASS) { + struct nv50_tic_entry *old = nv50_tic_entry(nvc0->images_tic[s][i]); + if (old) { + nvc0_screen_tic_unlock(nvc0->screen, old); + pipe_sampler_view_reference(&nvc0->images_tic[s][i], NULL); + } + } + } nvc0->images_valid[s] &= ~mask; } nvc0->images_dirty[s] |= mask; @@ -1300,9 +1219,10 @@ } static void -nvc0_set_shader_images(struct pipe_context *pipe, unsigned shader, +nvc0_set_shader_images(struct pipe_context *pipe, + enum pipe_shader_type shader, unsigned start, unsigned nr, - struct pipe_image_view *images) + const struct pipe_image_view *images) { const unsigned s = nvc0_shader_stage(shader); if (!nvc0_bind_images_range(nvc0_context(pipe), s, start, nr, images)) @@ -1316,8 +1236,8 @@ static bool nvc0_bind_buffers_range(struct nvc0_context *nvc0, const unsigned t, - unsigned start, unsigned nr, - struct pipe_shader_buffer *pbuffers) + unsigned start, unsigned nr, + const struct pipe_shader_buffer *pbuffers) { const unsigned end = start + nr; unsigned mask = 0; @@ -1365,9 +1285,9 @@ static void nvc0_set_shader_buffers(struct pipe_context *pipe, - unsigned shader, + enum pipe_shader_type shader, unsigned start, unsigned nr, - struct pipe_shader_buffer *buffers) + const struct pipe_shader_buffer *buffers) { const unsigned s = nvc0_shader_stage(shader); if (!nvc0_bind_buffers_range(nvc0_context(pipe), s, start, nr, buffers)) @@ -1490,6 +1410,7 @@ pipe->set_polygon_stipple = nvc0_set_polygon_stipple; pipe->set_scissor_states = nvc0_set_scissor_states; pipe->set_viewport_states = nvc0_set_viewport_states; + pipe->set_window_rectangles = nvc0_set_window_rectangles; pipe->set_tess_state = nvc0_set_tess_state; pipe->create_vertex_elements_state = nvc0_vertex_state_create; diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_stateobj.h mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_stateobj.h --- mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_stateobj.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_stateobj.h 2017-06-01 10:37:10.000000000 +0000 @@ -17,7 +17,7 @@ struct nvc0_blend_stateobj { struct pipe_blend_state pipe; int size; - uint32_t state[70]; + uint32_t state[72]; }; struct nvc0_rasterizer_stateobj { @@ -61,6 +61,12 @@ struct nvc0_vertex_element element[0]; }; +struct nvc0_window_rect_stateobj { + bool inclusive; + unsigned rects; + struct pipe_scissor_state rect[PIPE_MAX_WINDOW_RECTANGLES]; +}; + struct nvc0_so_target { struct pipe_stream_output_target pipe; struct pipe_query *pq; diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c 2017-06-01 10:37:10.000000000 +0000 @@ -1,5 +1,4 @@ -#include "util/u_format.h" #include "util/u_framebuffer.h" #include "util/u_math.h" #include "util/u_viewport.h" @@ -75,142 +74,142 @@ static void nvc0_validate_fb(struct nvc0_context *nvc0) { - struct nouveau_pushbuf *push = nvc0->base.pushbuf; - struct pipe_framebuffer_state *fb = &nvc0->framebuffer; - struct nvc0_screen *screen = nvc0->screen; - unsigned i, ms; - unsigned ms_mode = NVC0_3D_MULTISAMPLE_MODE_MS1; - unsigned nr_cbufs = fb->nr_cbufs; - bool serialize = false; - - nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_3D_FB); - - BEGIN_NVC0(push, NVC0_3D(SCREEN_SCISSOR_HORIZ), 2); - PUSH_DATA (push, fb->width << 16); - PUSH_DATA (push, fb->height << 16); - - for (i = 0; i < fb->nr_cbufs; ++i) { - struct nv50_surface *sf; - struct nv04_resource *res; - struct nouveau_bo *bo; - - if (!fb->cbufs[i]) { - nvc0_fb_set_null_rt(push, i, 0); - continue; - } - - sf = nv50_surface(fb->cbufs[i]); - res = nv04_resource(sf->base.texture); - bo = res->bo; - - BEGIN_NVC0(push, NVC0_3D(RT_ADDRESS_HIGH(i)), 9); - PUSH_DATAh(push, res->address + sf->offset); - PUSH_DATA (push, res->address + sf->offset); - if (likely(nouveau_bo_memtype(bo))) { - struct nv50_miptree *mt = nv50_miptree(sf->base.texture); - - assert(sf->base.texture->target != PIPE_BUFFER); - - PUSH_DATA(push, sf->width); - PUSH_DATA(push, sf->height); - PUSH_DATA(push, nvc0_format_table[sf->base.format].rt); - PUSH_DATA(push, (mt->layout_3d << 16) | - mt->level[sf->base.u.tex.level].tile_mode); - PUSH_DATA(push, sf->base.u.tex.first_layer + sf->depth); - PUSH_DATA(push, mt->layer_stride >> 2); - PUSH_DATA(push, sf->base.u.tex.first_layer); - - ms_mode = mt->ms_mode; - } else { - if (res->base.target == PIPE_BUFFER) { - PUSH_DATA(push, 262144); - PUSH_DATA(push, 1); - } else { - PUSH_DATA(push, nv50_miptree(sf->base.texture)->level[0].pitch); - PUSH_DATA(push, sf->height); - } - PUSH_DATA(push, nvc0_format_table[sf->base.format].rt); - PUSH_DATA(push, 1 << 12); - PUSH_DATA(push, 1); - PUSH_DATA(push, 0); - PUSH_DATA(push, 0); - - nvc0_resource_fence(res, NOUVEAU_BO_WR); - - assert(!fb->zsbuf); - } - - if (res->status & NOUVEAU_BUFFER_STATUS_GPU_READING) - serialize = true; - res->status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING; - res->status &= ~NOUVEAU_BUFFER_STATUS_GPU_READING; - - /* only register for writing, otherwise we'd always serialize here */ - BCTX_REFN(nvc0->bufctx_3d, 3D_FB, res, WR); - } - - if (fb->zsbuf) { - struct nv50_miptree *mt = nv50_miptree(fb->zsbuf->texture); - struct nv50_surface *sf = nv50_surface(fb->zsbuf); - int unk = mt->base.base.target == PIPE_TEXTURE_2D; - - BEGIN_NVC0(push, NVC0_3D(ZETA_ADDRESS_HIGH), 5); - PUSH_DATAh(push, mt->base.address + sf->offset); - PUSH_DATA (push, mt->base.address + sf->offset); - PUSH_DATA (push, nvc0_format_table[fb->zsbuf->format].rt); - PUSH_DATA (push, mt->level[sf->base.u.tex.level].tile_mode); - PUSH_DATA (push, mt->layer_stride >> 2); - BEGIN_NVC0(push, NVC0_3D(ZETA_ENABLE), 1); - PUSH_DATA (push, 1); - BEGIN_NVC0(push, NVC0_3D(ZETA_HORIZ), 3); - PUSH_DATA (push, sf->width); - PUSH_DATA (push, sf->height); - PUSH_DATA (push, (unk << 16) | - (sf->base.u.tex.first_layer + sf->depth)); - BEGIN_NVC0(push, NVC0_3D(ZETA_BASE_LAYER), 1); - PUSH_DATA (push, sf->base.u.tex.first_layer); - - ms_mode = mt->ms_mode; - - if (mt->base.status & NOUVEAU_BUFFER_STATUS_GPU_READING) - serialize = true; - mt->base.status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING; - mt->base.status &= ~NOUVEAU_BUFFER_STATUS_GPU_READING; - - BCTX_REFN(nvc0->bufctx_3d, 3D_FB, &mt->base, WR); - } else { - BEGIN_NVC0(push, NVC0_3D(ZETA_ENABLE), 1); - PUSH_DATA (push, 0); - } - - if (nr_cbufs == 0 && !fb->zsbuf) { - assert(util_is_power_of_two(fb->samples)); - assert(fb->samples <= 8); - - nvc0_fb_set_null_rt(push, 0, fb->layers); - - if (fb->samples > 1) - ms_mode = ffs(fb->samples) - 1; - nr_cbufs = 1; - } - - BEGIN_NVC0(push, NVC0_3D(RT_CONTROL), 1); - PUSH_DATA (push, (076543210 << 4) | nr_cbufs); - IMMED_NVC0(push, NVC0_3D(MULTISAMPLE_MODE), ms_mode); - - ms = 1 << ms_mode; - BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3); - PUSH_DATA (push, 2048); - PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(4)); - PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(4)); - BEGIN_1IC0(push, NVC0_3D(CB_POS), 1 + 2 * ms); - PUSH_DATA (push, NVC0_CB_AUX_SAMPLE_INFO); - for (i = 0; i < ms; i++) { - float xy[2]; - nvc0->base.pipe.get_sample_position(&nvc0->base.pipe, ms, i, xy); - PUSH_DATAf(push, xy[0]); - PUSH_DATAf(push, xy[1]); - } + struct nouveau_pushbuf *push = nvc0->base.pushbuf; + struct pipe_framebuffer_state *fb = &nvc0->framebuffer; + struct nvc0_screen *screen = nvc0->screen; + unsigned i, ms; + unsigned ms_mode = NVC0_3D_MULTISAMPLE_MODE_MS1; + unsigned nr_cbufs = fb->nr_cbufs; + bool serialize = false; + + nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_3D_FB); + + BEGIN_NVC0(push, NVC0_3D(SCREEN_SCISSOR_HORIZ), 2); + PUSH_DATA (push, fb->width << 16); + PUSH_DATA (push, fb->height << 16); + + for (i = 0; i < fb->nr_cbufs; ++i) { + struct nv50_surface *sf; + struct nv04_resource *res; + struct nouveau_bo *bo; + + if (!fb->cbufs[i]) { + nvc0_fb_set_null_rt(push, i, 0); + continue; + } + + sf = nv50_surface(fb->cbufs[i]); + res = nv04_resource(sf->base.texture); + bo = res->bo; + + BEGIN_NVC0(push, NVC0_3D(RT_ADDRESS_HIGH(i)), 9); + PUSH_DATAh(push, res->address + sf->offset); + PUSH_DATA (push, res->address + sf->offset); + if (likely(nouveau_bo_memtype(bo))) { + struct nv50_miptree *mt = nv50_miptree(sf->base.texture); + + assert(sf->base.texture->target != PIPE_BUFFER); + + PUSH_DATA(push, sf->width); + PUSH_DATA(push, sf->height); + PUSH_DATA(push, nvc0_format_table[sf->base.format].rt); + PUSH_DATA(push, (mt->layout_3d << 16) | + mt->level[sf->base.u.tex.level].tile_mode); + PUSH_DATA(push, sf->base.u.tex.first_layer + sf->depth); + PUSH_DATA(push, mt->layer_stride >> 2); + PUSH_DATA(push, sf->base.u.tex.first_layer); + + ms_mode = mt->ms_mode; + } else { + if (res->base.target == PIPE_BUFFER) { + PUSH_DATA(push, 262144); + PUSH_DATA(push, 1); + } else { + PUSH_DATA(push, nv50_miptree(sf->base.texture)->level[0].pitch); + PUSH_DATA(push, sf->height); + } + PUSH_DATA(push, nvc0_format_table[sf->base.format].rt); + PUSH_DATA(push, 1 << 12); + PUSH_DATA(push, 1); + PUSH_DATA(push, 0); + PUSH_DATA(push, 0); + + nvc0_resource_fence(res, NOUVEAU_BO_WR); + + assert(!fb->zsbuf); + } + + if (res->status & NOUVEAU_BUFFER_STATUS_GPU_READING) + serialize = true; + res->status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING; + res->status &= ~NOUVEAU_BUFFER_STATUS_GPU_READING; + + /* only register for writing, otherwise we'd always serialize here */ + BCTX_REFN(nvc0->bufctx_3d, 3D_FB, res, WR); + } + + if (fb->zsbuf) { + struct nv50_miptree *mt = nv50_miptree(fb->zsbuf->texture); + struct nv50_surface *sf = nv50_surface(fb->zsbuf); + int unk = mt->base.base.target == PIPE_TEXTURE_2D; + + BEGIN_NVC0(push, NVC0_3D(ZETA_ADDRESS_HIGH), 5); + PUSH_DATAh(push, mt->base.address + sf->offset); + PUSH_DATA (push, mt->base.address + sf->offset); + PUSH_DATA (push, nvc0_format_table[fb->zsbuf->format].rt); + PUSH_DATA (push, mt->level[sf->base.u.tex.level].tile_mode); + PUSH_DATA (push, mt->layer_stride >> 2); + BEGIN_NVC0(push, NVC0_3D(ZETA_ENABLE), 1); + PUSH_DATA (push, 1); + BEGIN_NVC0(push, NVC0_3D(ZETA_HORIZ), 3); + PUSH_DATA (push, sf->width); + PUSH_DATA (push, sf->height); + PUSH_DATA (push, (unk << 16) | + (sf->base.u.tex.first_layer + sf->depth)); + BEGIN_NVC0(push, NVC0_3D(ZETA_BASE_LAYER), 1); + PUSH_DATA (push, sf->base.u.tex.first_layer); + + ms_mode = mt->ms_mode; + + if (mt->base.status & NOUVEAU_BUFFER_STATUS_GPU_READING) + serialize = true; + mt->base.status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING; + mt->base.status &= ~NOUVEAU_BUFFER_STATUS_GPU_READING; + + BCTX_REFN(nvc0->bufctx_3d, 3D_FB, &mt->base, WR); + } else { + BEGIN_NVC0(push, NVC0_3D(ZETA_ENABLE), 1); + PUSH_DATA (push, 0); + } + + if (nr_cbufs == 0 && !fb->zsbuf) { + assert(util_is_power_of_two(fb->samples)); + assert(fb->samples <= 8); + + nvc0_fb_set_null_rt(push, 0, fb->layers); + + if (fb->samples > 1) + ms_mode = ffs(fb->samples) - 1; + nr_cbufs = 1; + } + + BEGIN_NVC0(push, NVC0_3D(RT_CONTROL), 1); + PUSH_DATA (push, (076543210 << 4) | nr_cbufs); + IMMED_NVC0(push, NVC0_3D(MULTISAMPLE_MODE), ms_mode); + + ms = 1 << ms_mode; + BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3); + PUSH_DATA (push, NVC0_CB_AUX_SIZE); + PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(4)); + PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(4)); + BEGIN_1IC0(push, NVC0_3D(CB_POS), 1 + 2 * ms); + PUSH_DATA (push, NVC0_CB_AUX_SAMPLE_INFO); + for (i = 0; i < ms; i++) { + float xy[2]; + nvc0->base.pipe.get_sample_position(&nvc0->base.pipe, ms, i, xy); + PUSH_DATAf(push, xy[0]); + PUSH_DATAf(push, xy[1]); + } if (screen->base.class_3d >= GM200_3D_CLASS) { const uint8_t (*ptr)[2] = nvc0_get_sample_locations(ms); @@ -225,10 +224,10 @@ PUSH_DATAp(push, val, 4); } - if (serialize) - IMMED_NVC0(push, NVC0_3D(SERIALIZE), 0); + if (serialize) + IMMED_NVC0(push, NVC0_3D(SERIALIZE), 0); - NOUVEAU_DRV_STAT(&nvc0->screen->base, gpu_serialize_count, serialize); + NOUVEAU_DRV_STAT(&nvc0->screen->base, gpu_serialize_count, serialize); } static void @@ -344,6 +343,30 @@ nvc0->viewports_dirty = 0; } +static void +nvc0_validate_window_rects(struct nvc0_context *nvc0) +{ + struct nouveau_pushbuf *push = nvc0->base.pushbuf; + bool enable = nvc0->window_rect.rects > 0 || nvc0->window_rect.inclusive; + int i; + + IMMED_NVC0(push, NVC0_3D(CLIP_RECTS_EN), enable); + if (!enable) + return; + + IMMED_NVC0(push, NVC0_3D(CLIP_RECTS_MODE), !nvc0->window_rect.inclusive); + BEGIN_NVC0(push, NVC0_3D(CLIP_RECT_HORIZ(0)), NVC0_MAX_WINDOW_RECTANGLES * 2); + for (i = 0; i < nvc0->window_rect.rects; i++) { + struct pipe_scissor_state *s = &nvc0->window_rect.rect[i]; + PUSH_DATA(push, (s->maxx << 16) | s->minx); + PUSH_DATA(push, (s->maxy << 16) | s->miny); + } + for (; i < NVC0_MAX_WINDOW_RECTANGLES; i++) { + PUSH_DATA(push, 0); + PUSH_DATA(push, 0); + } +} + static inline void nvc0_upload_uclip_planes(struct nvc0_context *nvc0, unsigned s) { @@ -351,7 +374,7 @@ struct nvc0_screen *screen = nvc0->screen; BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3); - PUSH_DATA (push, 2048); + PUSH_DATA (push, NVC0_CB_AUX_SIZE); PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s)); PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s)); BEGIN_1IC0(push, NVC0_3D(CB_POS), PIPE_MAX_CLIP_PLANES * 4 + 1); @@ -521,7 +544,7 @@ for (s = 0; s < 5; s++) { BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3); - PUSH_DATA (push, 2048); + PUSH_DATA (push, NVC0_CB_AUX_SIZE); PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s)); PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s)); BEGIN_1IC0(push, NVC0_3D(CB_POS), 1 + 4 * NVC0_MAX_BUFFERS); @@ -537,6 +560,7 @@ BCTX_REFN(nvc0->bufctx_3d, 3D_BUF, res, RDWR); util_range_add(&res->valid_buffer_range, nvc0->buffers[s][i].buffer_offset, + nvc0->buffers[s][i].buffer_offset + nvc0->buffers[s][i].buffer_size); } else { PUSH_DATA (push, 0); @@ -580,7 +604,9 @@ // If we're using the incoming sample mask and doing sample shading, we // have to do sample shading "to the max", otherwise there's no way to // tell which sets of samples are covered by the current invocation. - if (nvc0->fragprog->fp.sample_mask_in) + // Similarly for reading the framebuffer. + if (nvc0->fragprog->fp.sample_mask_in || + nvc0->fragprog->fp.reads_framebuffer) samples = util_framebuffer_get_num_samples(&nvc0->framebuffer); samples |= NVC0_3D_SAMPLE_SHADING_ENABLE; } @@ -597,7 +623,7 @@ for (i = 0; i < 5; ++i) { BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3); - PUSH_DATA (push, 2048); + PUSH_DATA (push, NVC0_CB_AUX_SIZE); PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(i)); PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(i)); BEGIN_NVC0(push, NVC0_3D(CB_BIND(i)), 1); @@ -608,7 +634,7 @@ } static void -nvc0_validate_derived_1(struct nvc0_context *nvc0) +nvc0_validate_fp_zsa_rast(struct nvc0_context *nvc0) { struct nouveau_pushbuf *push = nvc0->base.pushbuf; bool rasterizer_discard; @@ -633,7 +659,7 @@ * nvc0_validate_fb, otherwise that will override the RT count setting. */ static void -nvc0_validate_derived_2(struct nvc0_context *nvc0) +nvc0_validate_zsa_fb(struct nvc0_context *nvc0) { struct nouveau_pushbuf *push = nvc0->base.pushbuf; @@ -647,24 +673,25 @@ } static void -nvc0_validate_derived_3(struct nvc0_context *nvc0) +nvc0_validate_rast_fb(struct nvc0_context *nvc0) { struct nouveau_pushbuf *push = nvc0->base.pushbuf; struct pipe_framebuffer_state *fb = &nvc0->framebuffer; - uint32_t ms = 0; + struct pipe_rasterizer_state *rast = &nvc0->rast->pipe; - if ((!fb->nr_cbufs || !fb->cbufs[0] || - !util_format_is_pure_integer(fb->cbufs[0]->format)) && nvc0->blend) { - if (nvc0->blend->pipe.alpha_to_coverage) - ms |= NVC0_3D_MULTISAMPLE_CTRL_ALPHA_TO_COVERAGE; - if (nvc0->blend->pipe.alpha_to_one) - ms |= NVC0_3D_MULTISAMPLE_CTRL_ALPHA_TO_ONE; - } + if (!rast) + return; - BEGIN_NVC0(push, NVC0_3D(MULTISAMPLE_CTRL), 1); - PUSH_DATA (push, ms); + if (rast->offset_units_unscaled) { + BEGIN_NVC0(push, NVC0_3D(POLYGON_OFFSET_UNITS), 1); + if (fb->zsbuf && fb->zsbuf->format == PIPE_FORMAT_Z16_UNORM) + PUSH_DATAf(push, rast->offset_units * (1 << 16)); + else + PUSH_DATAf(push, rast->offset_units * (1 << 24)); + } } + static void nvc0_validate_tess_state(struct nvc0_context *nvc0) { @@ -675,6 +702,93 @@ PUSH_DATAp(push, nvc0->default_tess_inner, 2); } +/* If we have a frag shader bound which tries to read from the framebuffer, we + * have to make sure that the fb is bound as a texture in the expected + * location. For Fermi, that's in the special driver slot 16, while for Kepler + * it's a regular binding stored in the driver constbuf. + */ +static void +nvc0_validate_fbread(struct nvc0_context *nvc0) +{ + struct nouveau_pushbuf *push = nvc0->base.pushbuf; + struct nvc0_screen *screen = nvc0->screen; + struct pipe_context *pipe = &nvc0->base.pipe; + struct pipe_sampler_view *old_view = nvc0->fbtexture; + struct pipe_sampler_view *new_view = NULL; + + if (nvc0->fragprog && + nvc0->fragprog->fp.reads_framebuffer && + nvc0->framebuffer.nr_cbufs && + nvc0->framebuffer.cbufs[0]) { + struct pipe_sampler_view tmpl; + struct pipe_surface *sf = nvc0->framebuffer.cbufs[0]; + + tmpl.target = PIPE_TEXTURE_2D_ARRAY; + tmpl.format = sf->format; + tmpl.u.tex.first_level = tmpl.u.tex.last_level = sf->u.tex.level; + tmpl.u.tex.first_layer = sf->u.tex.first_layer; + tmpl.u.tex.last_layer = sf->u.tex.last_layer; + tmpl.swizzle_r = PIPE_SWIZZLE_X; + tmpl.swizzle_g = PIPE_SWIZZLE_Y; + tmpl.swizzle_b = PIPE_SWIZZLE_Z; + tmpl.swizzle_a = PIPE_SWIZZLE_W; + + /* Bail if it's the same parameters */ + if (old_view && old_view->texture == sf->texture && + old_view->format == sf->format && + old_view->u.tex.first_level == sf->u.tex.level && + old_view->u.tex.first_layer == sf->u.tex.first_layer && + old_view->u.tex.last_layer == sf->u.tex.last_layer) + return; + + new_view = pipe->create_sampler_view(pipe, sf->texture, &tmpl); + } else if (old_view == NULL) { + return; + } + + if (old_view) + pipe_sampler_view_reference(&nvc0->fbtexture, NULL); + nvc0->fbtexture = new_view; + + if (screen->default_tsc->id < 0) { + struct nv50_tsc_entry *tsc = nv50_tsc_entry(screen->default_tsc); + tsc->id = nvc0_screen_tsc_alloc(screen, tsc); + nvc0->base.push_data(&nvc0->base, screen->txc, 65536 + tsc->id * 32, + NV_VRAM_DOMAIN(&screen->base), 32, tsc->tsc); + screen->tsc.lock[tsc->id / 32] |= 1 << (tsc->id % 32); + + IMMED_NVC0(push, NVC0_3D(TSC_FLUSH), 0); + if (screen->base.class_3d < NVE4_3D_CLASS) { + BEGIN_NVC0(push, NVC0_3D(BIND_TSC2(0)), 1); + PUSH_DATA (push, (tsc->id << 12) | 1); + } + } + + if (new_view) { + struct nv50_tic_entry *tic = nv50_tic_entry(new_view); + assert(tic->id < 0); + tic->id = nvc0_screen_tic_alloc(screen, tic); + nvc0->base.push_data(&nvc0->base, screen->txc, tic->id * 32, + NV_VRAM_DOMAIN(&screen->base), 32, tic->tic); + screen->tic.lock[tic->id / 32] |= 1 << (tic->id % 32); + + if (screen->base.class_3d >= NVE4_3D_CLASS) { + BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3); + PUSH_DATA (push, NVC0_CB_AUX_SIZE); + PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(4)); + PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(4)); + BEGIN_1IC0(push, NVC0_3D(CB_POS), 1 + 1); + PUSH_DATA (push, NVC0_CB_AUX_FB_TEX_INFO); + PUSH_DATA (push, (screen->default_tsc->id << 20) | tic->id); + } else { + BEGIN_NVC0(push, NVC0_3D(BIND_TIC2(0)), 1); + PUSH_DATA (push, (tic->id << 9) | 1); + } + + IMMED_NVC0(push, NVC0_3D(TIC_FLUSH), 0); + } +} + static void nvc0_switch_pipe_context(struct nvc0_context *ctx_to) { @@ -734,6 +848,7 @@ { nvc0_validate_stipple, NVC0_NEW_3D_STIPPLE }, { nvc0_validate_scissor, NVC0_NEW_3D_SCISSOR | NVC0_NEW_3D_RASTERIZER }, { nvc0_validate_viewport, NVC0_NEW_3D_VIEWPORT }, + { nvc0_validate_window_rects, NVC0_NEW_3D_WINDOW_RECTS }, { nvc0_vertprog_validate, NVC0_NEW_3D_VERTPROG }, { nvc0_tctlprog_validate, NVC0_NEW_3D_TCTLPROG }, { nvc0_tevlprog_validate, NVC0_NEW_3D_TEVLPROG }, @@ -743,10 +858,10 @@ NVC0_NEW_3D_FRAGPROG | NVC0_NEW_3D_FRAMEBUFFER }, { nvc0_fragprog_validate, NVC0_NEW_3D_FRAGPROG | NVC0_NEW_3D_RASTERIZER }, - { nvc0_validate_derived_1, NVC0_NEW_3D_FRAGPROG | NVC0_NEW_3D_ZSA | + { nvc0_validate_fp_zsa_rast, NVC0_NEW_3D_FRAGPROG | NVC0_NEW_3D_ZSA | NVC0_NEW_3D_RASTERIZER }, - { nvc0_validate_derived_2, NVC0_NEW_3D_ZSA | NVC0_NEW_3D_FRAMEBUFFER }, - { nvc0_validate_derived_3, NVC0_NEW_3D_BLEND | NVC0_NEW_3D_FRAMEBUFFER }, + { nvc0_validate_zsa_fb, NVC0_NEW_3D_ZSA | NVC0_NEW_3D_FRAMEBUFFER }, + { nvc0_validate_rast_fb, NVC0_NEW_3D_RASTERIZER | NVC0_NEW_3D_FRAMEBUFFER }, { nvc0_validate_clip, NVC0_NEW_3D_CLIP | NVC0_NEW_3D_RASTERIZER | NVC0_NEW_3D_VERTPROG | NVC0_NEW_3D_TEVLPROG | @@ -755,6 +870,8 @@ { nvc0_validate_textures, NVC0_NEW_3D_TEXTURES }, { nvc0_validate_samplers, NVC0_NEW_3D_SAMPLERS }, { nve4_set_tex_handles, NVC0_NEW_3D_TEXTURES | NVC0_NEW_3D_SAMPLERS }, + { nvc0_validate_fbread, NVC0_NEW_3D_FRAGPROG | + NVC0_NEW_3D_FRAMEBUFFER }, { nvc0_vertex_arrays_validate, NVC0_NEW_3D_VERTEX | NVC0_NEW_3D_ARRAYS }, { nvc0_validate_surfaces, NVC0_NEW_3D_SURFACES }, { nvc0_validate_buffers, NVC0_NEW_3D_BUFFERS }, diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c 2017-06-01 10:37:10.000000000 +0000 @@ -280,7 +280,8 @@ struct pipe_surface *dst, const union pipe_color_union *color, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct nvc0_context *nvc0 = nvc0_context(pipe); struct nouveau_pushbuf *push = nvc0->base.pushbuf; @@ -343,7 +344,8 @@ nvc0_resource_fence(res, NOUVEAU_BO_WR); } - IMMED_NVC0(push, NVC0_3D(COND_MODE), NVC0_3D_COND_MODE_ALWAYS); + if (!render_condition_enabled) + IMMED_NVC0(push, NVC0_3D(COND_MODE), NVC0_3D_COND_MODE_ALWAYS); BEGIN_NIC0(push, NVC0_3D(CLEAR_BUFFERS), sf->depth); for (z = 0; z < sf->depth; ++z) { @@ -351,7 +353,8 @@ (z << NVC0_3D_CLEAR_BUFFERS_LAYER__SHIFT)); } - IMMED_NVC0(push, NVC0_3D(COND_MODE), nvc0->cond_condmode); + if (!render_condition_enabled) + IMMED_NVC0(push, NVC0_3D(COND_MODE), nvc0->cond_condmode); nvc0->dirty_3d |= NVC0_NEW_3D_FRAMEBUFFER; } @@ -619,7 +622,8 @@ double depth, unsigned stencil, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct nvc0_context *nvc0 = nvc0_context(pipe); struct nouveau_pushbuf *push = nvc0->base.pushbuf; @@ -668,7 +672,8 @@ PUSH_DATA (push, dst->u.tex.first_layer); IMMED_NVC0(push, NVC0_3D(MULTISAMPLE_MODE), mt->ms_mode); - IMMED_NVC0(push, NVC0_3D(COND_MODE), NVC0_3D_COND_MODE_ALWAYS); + if (!render_condition_enabled) + IMMED_NVC0(push, NVC0_3D(COND_MODE), NVC0_3D_COND_MODE_ALWAYS); BEGIN_NIC0(push, NVC0_3D(CLEAR_BUFFERS), sf->depth); for (z = 0; z < sf->depth; ++z) { @@ -676,7 +681,8 @@ (z << NVC0_3D_CLEAR_BUFFERS_LAYER__SHIFT)); } - IMMED_NVC0(push, NVC0_3D(COND_MODE), nvc0->cond_condmode); + if (!render_condition_enabled) + IMMED_NVC0(push, NVC0_3D(COND_MODE), nvc0->cond_condmode); nvc0->dirty_3d |= NVC0_NEW_3D_FRAMEBUFFER; } @@ -782,6 +788,7 @@ enum pipe_texture_target target; struct { struct pipe_framebuffer_state fb; + struct nvc0_window_rect_stateobj window_rect; struct nvc0_rasterizer_stateobj *rast; struct nvc0_program *vp; struct nvc0_program *tcp; @@ -829,12 +836,20 @@ }; static const uint32_t code_gm107[] = { - 0xfc0007e0, 0x001f8000, /* sched 0x7e0 0x7e0 0x7e0 */ - 0x0807ff04, 0xefd8ff80, /* ld b64 $r4 a[0x80] 0x0 */ - 0x0907ff00, 0xefd97f80, /* ld b96 $r0 a[0x90] 0x0 */ - 0x0707ff04, 0xeff0ff80, /* st b64 a[0x70] $r4 0x0 */ - 0xfc0007e0, 0x00000000, /* sched 0x7e0 0x7e0 0x0 */ - 0x0807ff00, 0xeff17f80, /* st b96 a[0x80] $r0 0x0 */ + 0xe4200701, 0x001d0400, /* sched (st 0x1 wr 0x0) (st 0x1 wr 0x1) (st 0x1 wr 0x2) */ + 0x0807ff00, 0xefd87f80, /* ld b32 $r0 a[0x80] 0x0 */ + 0x0847ff01, 0xefd87f80, /* ld b32 $r1 a[0x84] 0x0 */ + 0x0907ff02, 0xefd87f80, /* ld b32 $r2 a[0x90] 0x0 */ + 0xf0200761, 0x003f8400, /* sched (st 0x1 wr 0x3) (st 0x1 wr 0x4) (st 0x1 wt 0x1) */ + 0x0947ff03, 0xefd87f80, /* ld b32 $r3 a[0x94] 0x0 */ + 0x0987ff04, 0xefd87f80, /* ld b32 $r4 a[0x98] 0x0 */ + 0x0707ff00, 0xeff07f80, /* st b32 a[0x70] $r0 0x0 */ + 0xfc2017e1, 0x011f8404, /* sched (st 0x1 wt 0x2) (st 0x1 wt 0x4) (st 0x1 wt 0x8) */ + 0x0747ff01, 0xeff07f80, /* st b32 a[0x74] $r1 0x0 */ + 0x0807ff02, 0xeff07f80, /* st b32 a[0x80] $r2 0x0 */ + 0x0847ff03, 0xeff07f80, /* st b32 a[0x84] $r3 0x0 */ + 0xfde087e1, 0x001f8000, /* sched (st 0x1 wt 0x10) (st 0xf) (st 0x0) */ + 0x0887ff04, 0xeff07f80, /* st b32 a[0x88] $r4 0x0 */ 0x0007000f, 0xe3000000, /* exit */ }; @@ -1035,7 +1050,8 @@ } static void -nvc0_blitctx_pre_blit(struct nvc0_blitctx *ctx) +nvc0_blitctx_pre_blit(struct nvc0_blitctx *ctx, + const struct pipe_blit_info *info) { struct nvc0_context *nvc0 = ctx->nvc0; struct nvc0_blitter *blitter = nvc0->screen->blitter; @@ -1058,6 +1074,7 @@ ctx->saved.fp = nvc0->fragprog; ctx->saved.min_samples = nvc0->min_samples; + ctx->saved.window_rect = nvc0->window_rect; nvc0->rast = &ctx->rast; @@ -1067,6 +1084,13 @@ nvc0->gmtyprog = NULL; nvc0->fragprog = ctx->fp; + nvc0->window_rect.rects = + MIN2(info->num_window_rectangles, NVC0_MAX_WINDOW_RECTANGLES); + nvc0->window_rect.inclusive = info->window_rectangle_include; + if (nvc0->window_rect.rects) + memcpy(nvc0->window_rect.rect, info->window_rectangles, + sizeof(struct pipe_scissor_state) * nvc0->window_rect.rects); + for (s = 0; s <= 4; ++s) { ctx->saved.num_textures[s] = nvc0->num_textures[s]; ctx->saved.num_samplers[s] = nvc0->num_samplers[s]; @@ -1099,7 +1123,7 @@ nvc0->dirty_3d = NVC0_NEW_3D_FRAMEBUFFER | NVC0_NEW_3D_MIN_SAMPLES | NVC0_NEW_3D_VERTPROG | NVC0_NEW_3D_FRAGPROG | NVC0_NEW_3D_TCTLPROG | NVC0_NEW_3D_TEVLPROG | NVC0_NEW_3D_GMTYPROG | - NVC0_NEW_3D_TEXTURES | NVC0_NEW_3D_SAMPLERS; + NVC0_NEW_3D_TEXTURES | NVC0_NEW_3D_SAMPLERS | NVC0_NEW_3D_WINDOW_RECTS; } static void @@ -1127,6 +1151,7 @@ nvc0->fragprog = blit->saved.fp; nvc0->min_samples = blit->saved.min_samples; + nvc0->window_rect = blit->saved.window_rect; pipe_sampler_view_reference(&nvc0->textures[4][0], NULL); pipe_sampler_view_reference(&nvc0->textures[4][1], NULL); @@ -1158,7 +1183,7 @@ nvc0->dirty_3d = blit->saved.dirty_3d | (NVC0_NEW_3D_FRAMEBUFFER | NVC0_NEW_3D_SCISSOR | NVC0_NEW_3D_SAMPLE_MASK | NVC0_NEW_3D_RASTERIZER | NVC0_NEW_3D_ZSA | NVC0_NEW_3D_BLEND | - NVC0_NEW_3D_VIEWPORT | + NVC0_NEW_3D_VIEWPORT | NVC0_NEW_3D_WINDOW_RECTS | NVC0_NEW_3D_TEXTURES | NVC0_NEW_3D_SAMPLERS | NVC0_NEW_3D_VERTPROG | NVC0_NEW_3D_FRAGPROG | NVC0_NEW_3D_TCTLPROG | NVC0_NEW_3D_TEVLPROG | NVC0_NEW_3D_GMTYPROG | @@ -1191,7 +1216,7 @@ blit->render_condition_enable = info->render_condition_enable; nvc0_blit_select_fp(blit, info); - nvc0_blitctx_pre_blit(blit); + nvc0_blitctx_pre_blit(blit, info); nvc0_blit_set_dst(blit, dst, info->dst.level, -1, info->dst.format); nvc0_blit_set_src(blit, src, info->src.level, -1, info->src.format, @@ -1606,6 +1631,9 @@ info->src.box.height != -info->dst.box.height)) eng3d = true; + if (info->num_window_rectangles > 0 || info->window_rectangle_include) + eng3d = true; + if (nvc0->screen->num_occlusion_queries_active) IMMED_NVC0(push, NVC0_3D(SAMPLECNT_ENABLE), 0); diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c 2017-06-01 10:37:10.000000000 +0000 @@ -132,9 +132,9 @@ if (unlikely(!nouveau_bo_memtype(nv04_resource(texture)->bo))) { if (texture->target == PIPE_BUFFER) { assert(!(tic[5] & GM107_TIC2_5_NORMALIZED_COORDS)); - width = view->pipe.u.buf.last_element - view->pipe.u.buf.first_element; + width = view->pipe.u.buf.size / (desc->block.bits / 8) - 1; address += - view->pipe.u.buf.first_element * desc->block.bits / 8; + view->pipe.u.buf.offset; tic[2] = GM107_TIC2_2_HEADER_VERSION_ONE_D_BUFFER; tic[3] |= width >> 16; tic[4] |= GM107_TIC2_4_TEXTURE_TYPE_ONE_D_BUFFER; @@ -236,6 +236,42 @@ return &view->pipe; } +struct pipe_sampler_view * +gm107_create_texture_view_from_image(struct pipe_context *pipe, + const struct pipe_image_view *view) +{ + struct nv04_resource *res = nv04_resource(view->resource); + struct pipe_sampler_view templ = {}; + enum pipe_texture_target target; + uint32_t flags = 0; + + if (!res) + return NULL; + target = res->base.target; + + if (target == PIPE_TEXTURE_CUBE || target == PIPE_TEXTURE_CUBE_ARRAY) + target = PIPE_TEXTURE_2D_ARRAY; + + templ.format = view->format; + templ.swizzle_r = PIPE_SWIZZLE_X; + templ.swizzle_g = PIPE_SWIZZLE_Y; + templ.swizzle_b = PIPE_SWIZZLE_Z; + templ.swizzle_a = PIPE_SWIZZLE_W; + + if (target == PIPE_BUFFER) { + templ.u.buf.offset = view->u.buf.offset; + templ.u.buf.size = view->u.buf.size; + } else { + templ.u.tex.first_layer = view->u.tex.first_layer; + templ.u.tex.last_layer = view->u.tex.last_layer; + templ.u.tex.first_level = templ.u.tex.last_level = view->u.tex.level; + } + + flags = NV50_TEXVIEW_SCALED_COORDS; + + return nvc0_create_texture_view(pipe, &res->base, &templ, flags, target); +} + static struct pipe_sampler_view * gf100_create_texture_view(struct pipe_context *pipe, struct pipe_resource *texture, @@ -308,11 +344,11 @@ if (texture->target == PIPE_BUFFER) { assert(!(tic[2] & G80_TIC_2_NORMALIZED_COORDS)); address += - view->pipe.u.buf.first_element * desc->block.bits / 8; + view->pipe.u.buf.offset; tic[2] |= G80_TIC_2_LAYOUT_PITCH | G80_TIC_2_TEXTURE_TYPE_ONE_D_BUFFER; tic[3] = 0; tic[4] = /* width */ - view->pipe.u.buf.last_element - view->pipe.u.buf.first_element + 1; + view->pipe.u.buf.size / (desc->block.bits / 8); tic[5] = 0; } else { /* must be 2D texture without mip maps */ @@ -420,8 +456,7 @@ uint64_t address = res->address; if (res->base.target != PIPE_BUFFER) return; - address += tic->pipe.u.buf.first_element * - util_format_get_blocksize(tic->pipe.format); + address += tic->pipe.u.buf.offset; if (tic->tic[1] == (uint32_t)address && (tic->tic[2] & 0xff) == address >> 32) return; @@ -438,7 +473,6 @@ { uint32_t commands[32]; struct nouveau_pushbuf *push = nvc0->base.pushbuf; - struct nouveau_bo *txc = nvc0->screen->txc; unsigned i; unsigned n = 0; bool need_flush = false; @@ -459,18 +493,9 @@ if (tic->id < 0) { tic->id = nvc0_screen_tic_alloc(nvc0->screen, tic); - PUSH_SPACE(push, 17); - BEGIN_NVC0(push, NVC0_M2MF(OFFSET_OUT_HIGH), 2); - PUSH_DATAh(push, txc->offset + (tic->id * 32)); - PUSH_DATA (push, txc->offset + (tic->id * 32)); - BEGIN_NVC0(push, NVC0_M2MF(LINE_LENGTH_IN), 2); - PUSH_DATA (push, 32); - PUSH_DATA (push, 1); - BEGIN_NVC0(push, NVC0_M2MF(EXEC), 1); - PUSH_DATA (push, 0x100111); - BEGIN_NIC0(push, NVC0_M2MF(DATA), 8); - PUSH_DATAp(push, &tic->tic[0], 8); - + nvc0_m2mf_push_linear(&nvc0->base, nvc0->screen->txc, tic->id * 32, + NV_VRAM_DOMAIN(&nvc0->screen->base), 32, + tic->tic); need_flush = true; } else if (res->status & NOUVEAU_BUFFER_STATUS_GPU_WRITING) { @@ -515,7 +540,6 @@ static bool nve4_validate_tic(struct nvc0_context *nvc0, unsigned s) { - struct nouveau_bo *txc = nvc0->screen->txc; struct nouveau_pushbuf *push = nvc0->base.pushbuf; unsigned i; bool need_flush = false; @@ -535,17 +559,9 @@ if (tic->id < 0) { tic->id = nvc0_screen_tic_alloc(nvc0->screen, tic); - PUSH_SPACE(push, 16); - BEGIN_NVC0(push, NVE4_P2MF(UPLOAD_DST_ADDRESS_HIGH), 2); - PUSH_DATAh(push, txc->offset + (tic->id * 32)); - PUSH_DATA (push, txc->offset + (tic->id * 32)); - BEGIN_NVC0(push, NVE4_P2MF(UPLOAD_LINE_LENGTH_IN), 2); - PUSH_DATA (push, 32); - PUSH_DATA (push, 1); - BEGIN_1IC0(push, NVE4_P2MF(UPLOAD_EXEC), 9); - PUSH_DATA (push, 0x1001); - PUSH_DATAp(push, &tic->tic[0], 8); - + nve4_p2mf_push_linear(&nvc0->base, nvc0->screen->txc, tic->id * 32, + NV_VRAM_DOMAIN(&nvc0->screen->base), 32, + tic->tic); need_flush = true; } else if (res->status & NOUVEAU_BUFFER_STATUS_GPU_WRITING) { @@ -647,8 +663,6 @@ bool nve4_validate_tsc(struct nvc0_context *nvc0, int s) { - struct nouveau_bo *txc = nvc0->screen->txc; - struct nouveau_pushbuf *push = nvc0->base.pushbuf; unsigned i; bool need_flush = false; @@ -662,17 +676,10 @@ if (tsc->id < 0) { tsc->id = nvc0_screen_tsc_alloc(nvc0->screen, tsc); - PUSH_SPACE(push, 16); - BEGIN_NVC0(push, NVE4_P2MF(UPLOAD_DST_ADDRESS_HIGH), 2); - PUSH_DATAh(push, txc->offset + 65536 + (tsc->id * 32)); - PUSH_DATA (push, txc->offset + 65536 + (tsc->id * 32)); - BEGIN_NVC0(push, NVE4_P2MF(UPLOAD_LINE_LENGTH_IN), 2); - PUSH_DATA (push, 32); - PUSH_DATA (push, 1); - BEGIN_1IC0(push, NVE4_P2MF(UPLOAD_EXEC), 9); - PUSH_DATA (push, 0x1001); - PUSH_DATAp(push, &tsc->tsc[0], 8); - + nve4_p2mf_push_linear(&nvc0->base, nvc0->screen->txc, + 65536 + tsc->id * 32, + NV_VRAM_DOMAIN(&nvc0->screen->base), + 32, tsc->tsc); need_flush = true; } nvc0->screen->tsc.lock[tsc->id / 32] |= 1 << (tsc->id % 32); @@ -731,7 +738,7 @@ if (!dirty) continue; BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3); - PUSH_DATA (push, 2048); + PUSH_DATA (push, NVC0_CB_AUX_SIZE); PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s)); PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s)); do { @@ -762,7 +769,7 @@ *width = *height = *depth = 1; if (res->base.target == PIPE_BUFFER) { - *width = view->u.buf.last_element - view->u.buf.first_element + 1; + *width = view->u.buf.size / util_format_get_blocksize(view->format); return; } @@ -793,17 +800,12 @@ nvc0_mark_image_range_valid(const struct pipe_image_view *view) { struct nv04_resource *res = (struct nv04_resource *)view->resource; - const struct util_format_description *desc; - unsigned stride; assert(view->resource->target == PIPE_BUFFER); - desc = util_format_description(view->format); - stride = desc->block.bits / 8; - util_range_add(&res->valid_buffer_range, - stride * (view->u.buf.first_element), - stride * (view->u.buf.last_element + 1)); + view->u.buf.offset, + view->u.buf.offset + view->u.buf.size); } void @@ -889,9 +891,7 @@ #endif if (res->base.target == PIPE_BUFFER) { - unsigned blocksize = util_format_get_blocksize(view->format); - - address += view->u.buf.first_element * blocksize; + address += view->u.buf.offset; info[0] = address >> 8; info[2] = width - 1; @@ -924,11 +924,11 @@ address += lvl->offset; info[0] = address >> 8; - info[2] = width - 1; + info[2] = (width << mt->ms_x) - 1; /* NOTE: this is really important: */ info[2] |= (0xff & nve4_su_format_aux_map[view->format]) << 22; info[3] = (0x88 << 24) | (lvl->pitch / 64); - info[4] = height - 1; + info[4] = (height << mt->ms_y) - 1; info[4] |= (lvl->tile_mode & 0x0f0) << 25; info[4] |= NVC0_TILE_SHIFT_Y(lvl->tile_mode) << 22; info[5] = mt->layer_stride >> 8; @@ -1016,7 +1016,7 @@ if (res->base.target == PIPE_BUFFER) { unsigned blocksize = util_format_get_blocksize(view->format); - address += view->u.buf.first_element * blocksize; + address += view->u.buf.offset; assert(!(address & 0xff)); if (view->access & PIPE_IMAGE_ACCESS_WRITE) @@ -1047,8 +1047,8 @@ PUSH_DATAh(push, address); PUSH_DATA (push, address); - PUSH_DATA (push, width); - PUSH_DATA (push, height); + PUSH_DATA (push, width << mt->ms_x); + PUSH_DATA (push, height << mt->ms_y); PUSH_DATA (push, rt); PUSH_DATA (push, lvl->tile_mode & 0xff); /* mask out z-tiling */ } @@ -1071,7 +1071,7 @@ BEGIN_NVC0(push, NVC0_CP(CB_SIZE), 3); else BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3); - PUSH_DATA (push, 2048); + PUSH_DATA (push, NVC0_CB_AUX_SIZE); PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s)); PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s)); if (s == 5) @@ -1095,6 +1095,51 @@ nvc0->images_dirty[5] |= nvc0->images_valid[5]; } +static void +gm107_validate_surfaces(struct nvc0_context *nvc0, + struct pipe_image_view *view, int stage, int slot) +{ + struct nv04_resource *res = nv04_resource(view->resource); + struct nouveau_pushbuf *push = nvc0->base.pushbuf; + struct nvc0_screen *screen = nvc0->screen; + struct nv50_tic_entry *tic; + + tic = nv50_tic_entry(nvc0->images_tic[stage][slot]); + + res = nv04_resource(tic->pipe.texture); + nvc0_update_tic(nvc0, tic, res); + + if (tic->id < 0) { + tic->id = nvc0_screen_tic_alloc(nvc0->screen, tic); + + /* upload the texture view */ + nve4_p2mf_push_linear(&nvc0->base, nvc0->screen->txc, tic->id * 32, + NV_VRAM_DOMAIN(&nvc0->screen->base), 32, tic->tic); + + BEGIN_NVC0(push, NVC0_3D(TIC_FLUSH), 1); + PUSH_DATA (push, 0); + } else + if (res->status & NOUVEAU_BUFFER_STATUS_GPU_WRITING) { + BEGIN_NVC0(push, NVC0_3D(TEX_CACHE_CTL), 1); + PUSH_DATA (push, (tic->id << 4) | 1); + } + nvc0->screen->tic.lock[tic->id / 32] |= 1 << (tic->id % 32); + + res->status &= ~NOUVEAU_BUFFER_STATUS_GPU_WRITING; + res->status |= NOUVEAU_BUFFER_STATUS_GPU_READING; + + BCTX_REFN(nvc0->bufctx_3d, 3D_SUF, res, RD); + + /* upload the texture handle */ + BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3); + PUSH_DATA (push, NVC0_CB_AUX_SIZE); + PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(stage)); + PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(stage)); + BEGIN_NVC0(push, NVC0_3D(CB_POS), 2); + PUSH_DATA (push, NVC0_CB_AUX_TEX_INFO(slot + 32)); + PUSH_DATA (push, tic->id); +} + static inline void nve4_update_surface_bindings(struct nvc0_context *nvc0) { @@ -1106,15 +1151,16 @@ if (!nvc0->images_dirty[s]) continue; - BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3); - PUSH_DATA (push, 2048); - PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s)); - PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s)); - BEGIN_1IC0(push, NVC0_3D(CB_POS), 1 + 16 * NVC0_MAX_IMAGES); - PUSH_DATA (push, NVC0_CB_AUX_SU_INFO(0)); - for (i = 0; i < NVC0_MAX_IMAGES; ++i) { struct pipe_image_view *view = &nvc0->images[s][i]; + + BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3); + PUSH_DATA (push, NVC0_CB_AUX_SIZE); + PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s)); + PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s)); + BEGIN_1IC0(push, NVC0_3D(CB_POS), 1 + 16); + PUSH_DATA (push, NVC0_CB_AUX_SU_INFO(i)); + if (view->resource) { struct nv04_resource *res = nv04_resource(view->resource); @@ -1125,6 +1171,9 @@ nve4_set_surface_info(push, view, nvc0); BCTX_REFN(nvc0->bufctx_3d, 3D_SUF, res, RDWR); + + if (nvc0->screen->base.class_3d >= GM107_3D_CLASS) + gm107_validate_surfaces(nvc0, view, s, i); } else { for (j = 0; j < 16; j++) PUSH_DATA(push, 0); @@ -1154,6 +1203,7 @@ [PIPE_FORMAT_R16G16B16A16_SNORM] = GK104_IMAGE_FORMAT_RGBA16_SNORM, [PIPE_FORMAT_R16G16B16A16_SINT] = GK104_IMAGE_FORMAT_RGBA16_SINT, [PIPE_FORMAT_R16G16B16A16_UINT] = GK104_IMAGE_FORMAT_RGBA16_UINT, + [PIPE_FORMAT_B8G8R8A8_UNORM] = GK104_IMAGE_FORMAT_BGRA8_UNORM, [PIPE_FORMAT_R8G8B8A8_UNORM] = GK104_IMAGE_FORMAT_RGBA8_UNORM, [PIPE_FORMAT_R8G8B8A8_SNORM] = GK104_IMAGE_FORMAT_RGBA8_SNORM, [PIPE_FORMAT_R8G8B8A8_SINT] = GK104_IMAGE_FORMAT_RGBA8_SINT, @@ -1208,6 +1258,7 @@ [PIPE_FORMAT_R10G10B10A2_UNORM] = 0x2a24, [PIPE_FORMAT_R10G10B10A2_UINT] = 0x2a24, + [PIPE_FORMAT_B8G8R8A8_UNORM] = 0x2a24, [PIPE_FORMAT_R8G8B8A8_UNORM] = 0x2a24, [PIPE_FORMAT_R8G8B8A8_SNORM] = 0x2a24, [PIPE_FORMAT_R8G8B8A8_SINT] = 0x2a24, diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c 2017-06-01 10:37:10.000000000 +0000 @@ -835,7 +835,7 @@ /* Queue things up to let the macros write params to the driver constbuf */ BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3); - PUSH_DATA (push, 2048); + PUSH_DATA (push, NVC0_CB_AUX_SIZE); PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(0)); PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(0)); BEGIN_NVC0(push, NVC0_3D(CB_POS), 1); @@ -976,19 +976,17 @@ nvc0_state_validate_3d(nvc0, ~0); - if (nvc0->vertprog->vp.need_draw_parameters) { + if (nvc0->vertprog->vp.need_draw_parameters && !info->indirect) { PUSH_SPACE(push, 9); BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3); - PUSH_DATA (push, 2048); + PUSH_DATA (push, NVC0_CB_AUX_SIZE); PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(0)); PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(0)); - if (!info->indirect) { - BEGIN_1IC0(push, NVC0_3D(CB_POS), 1 + 3); - PUSH_DATA (push, NVC0_CB_AUX_DRAW_INFO); - PUSH_DATA (push, info->index_bias); - PUSH_DATA (push, info->start_instance); - PUSH_DATA (push, info->drawid); - } + BEGIN_1IC0(push, NVC0_3D(CB_POS), 1 + 3); + PUSH_DATA (push, NVC0_CB_AUX_DRAW_INFO); + PUSH_DATA (push, info->index_bias); + PUSH_DATA (push, info->start_instance); + PUSH_DATA (push, info->drawid); } if (nvc0->screen->base.class_3d < NVE4_3D_CLASS && diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nve4_compute.c mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nve4_compute.c --- mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nve4_compute.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nve4_compute.c 2017-06-01 10:37:10.000000000 +0000 @@ -188,29 +188,93 @@ } static void -nve4_compute_validate_surfaces(struct nvc0_context *nvc0) +gm107_compute_validate_surfaces(struct nvc0_context *nvc0, + struct pipe_image_view *view, int slot) { + struct nv04_resource *res = nv04_resource(view->resource); struct nouveau_pushbuf *push = nvc0->base.pushbuf; + struct nvc0_screen *screen = nvc0->screen; + struct nouveau_bo *txc = nvc0->screen->txc; + struct nv50_tic_entry *tic; uint64_t address; const int s = 5; - int i, j; - if (!nvc0->images_dirty[s]) - return; + tic = nv50_tic_entry(nvc0->images_tic[s][slot]); - address = nvc0->screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s); + res = nv04_resource(tic->pipe.texture); + nvc0_update_tic(nvc0, tic, res); + + if (tic->id < 0) { + tic->id = nvc0_screen_tic_alloc(nvc0->screen, tic); + + /* upload the texture view */ + PUSH_SPACE(push, 16); + BEGIN_NVC0(push, NVE4_CP(UPLOAD_DST_ADDRESS_HIGH), 2); + PUSH_DATAh(push, txc->offset + (tic->id * 32)); + PUSH_DATA (push, txc->offset + (tic->id * 32)); + BEGIN_NVC0(push, NVE4_CP(UPLOAD_LINE_LENGTH_IN), 2); + PUSH_DATA (push, 32); + PUSH_DATA (push, 1); + BEGIN_1IC0(push, NVE4_CP(UPLOAD_EXEC), 9); + PUSH_DATA (push, NVE4_COMPUTE_UPLOAD_EXEC_LINEAR | (0x20 << 1)); + PUSH_DATAp(push, &tic->tic[0], 8); + + BEGIN_NIC0(push, NVE4_CP(TIC_FLUSH), 1); + PUSH_DATA (push, (tic->id << 4) | 1); + } else + if (res->status & NOUVEAU_BUFFER_STATUS_GPU_WRITING) { + BEGIN_NIC0(push, NVE4_CP(TEX_CACHE_CTL), 1); + PUSH_DATA (push, (tic->id << 4) | 1); + } + nvc0->screen->tic.lock[tic->id / 32] |= 1 << (tic->id % 32); + + res->status &= ~NOUVEAU_BUFFER_STATUS_GPU_WRITING; + res->status |= NOUVEAU_BUFFER_STATUS_GPU_READING; + + BCTX_REFN(nvc0->bufctx_cp, CP_SUF, res, RD); + address = screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s); + + /* upload the texture handle */ BEGIN_NVC0(push, NVE4_CP(UPLOAD_DST_ADDRESS_HIGH), 2); - PUSH_DATAh(push, address + NVC0_CB_AUX_SU_INFO(0)); - PUSH_DATA (push, address + NVC0_CB_AUX_SU_INFO(0)); + PUSH_DATAh(push, address + NVC0_CB_AUX_TEX_INFO(slot + 32)); + PUSH_DATA (push, address + NVC0_CB_AUX_TEX_INFO(slot + 32)); BEGIN_NVC0(push, NVE4_CP(UPLOAD_LINE_LENGTH_IN), 2); - PUSH_DATA (push, 16 * NVC0_MAX_IMAGES * 4); + PUSH_DATA (push, 4); PUSH_DATA (push, 0x1); - BEGIN_1IC0(push, NVE4_CP(UPLOAD_EXEC), 1 + 16 * NVC0_MAX_IMAGES); + BEGIN_1IC0(push, NVE4_CP(UPLOAD_EXEC), 2); PUSH_DATA (push, NVE4_COMPUTE_UPLOAD_EXEC_LINEAR | (0x20 << 1)); + PUSH_DATA (push, tic->id); + + BEGIN_NVC0(push, NVE4_CP(FLUSH), 1); + PUSH_DATA (push, NVE4_COMPUTE_FLUSH_CB); +} + +static void +nve4_compute_validate_surfaces(struct nvc0_context *nvc0) +{ + struct nouveau_pushbuf *push = nvc0->base.pushbuf; + uint64_t address; + const int s = 5; + int i, j; + + if (!nvc0->images_dirty[s]) + return; + + address = nvc0->screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s); for (i = 0; i < NVC0_MAX_IMAGES; ++i) { struct pipe_image_view *view = &nvc0->images[s][i]; + + BEGIN_NVC0(push, NVE4_CP(UPLOAD_DST_ADDRESS_HIGH), 2); + PUSH_DATAh(push, address + NVC0_CB_AUX_SU_INFO(i)); + PUSH_DATA (push, address + NVC0_CB_AUX_SU_INFO(i)); + BEGIN_NVC0(push, NVE4_CP(UPLOAD_LINE_LENGTH_IN), 2); + PUSH_DATA (push, 16 * 4); + PUSH_DATA (push, 0x1); + BEGIN_1IC0(push, NVE4_CP(UPLOAD_EXEC), 1 + 16); + PUSH_DATA (push, NVE4_COMPUTE_UPLOAD_EXEC_LINEAR | (0x20 << 1)); + if (view->resource) { struct nv04_resource *res = nv04_resource(view->resource); @@ -221,6 +285,9 @@ nve4_set_surface_info(push, view, nvc0); BCTX_REFN(nvc0->bufctx_cp, CP_SUF, res, RDWR); + + if (nvc0->screen->base.class_3d >= GM107_3D_CLASS) + gm107_compute_validate_surfaces(nvc0, view, i); } else { for (j = 0; j < 16; j++) PUSH_DATA(push, 0); @@ -377,6 +444,7 @@ BCTX_REFN(nvc0->bufctx_cp, CP_BUF, res, RDWR); util_range_add(&res->valid_buffer_range, nvc0->buffers[s][i].buffer_offset, + nvc0->buffers[s][i].buffer_offset + nvc0->buffers[s][i].buffer_size); } else { PUSH_DATA (push, 0); @@ -437,31 +505,32 @@ PUSH_DATAp(push, info->input, cp->parm_size / 4); } BEGIN_NVC0(push, NVE4_CP(UPLOAD_DST_ADDRESS_HIGH), 2); - PUSH_DATAh(push, address + NVC0_CB_AUX_GRID_INFO); - PUSH_DATA (push, address + NVC0_CB_AUX_GRID_INFO); + PUSH_DATAh(push, address + NVC0_CB_AUX_GRID_INFO(0)); + PUSH_DATA (push, address + NVC0_CB_AUX_GRID_INFO(0)); BEGIN_NVC0(push, NVE4_CP(UPLOAD_LINE_LENGTH_IN), 2); - PUSH_DATA (push, 7 * 4); + PUSH_DATA (push, 8 * 4); PUSH_DATA (push, 0x1); if (unlikely(info->indirect)) { struct nv04_resource *res = nv04_resource(info->indirect); uint32_t offset = res->offset + info->indirect_offset; - nouveau_pushbuf_space(push, 16, 0, 1); + nouveau_pushbuf_space(push, 32, 0, 1); PUSH_REFN(push, res->bo, NOUVEAU_BO_RD | res->domain); - BEGIN_1IC0(push, NVE4_CP(UPLOAD_EXEC), 1 + 7); + BEGIN_1IC0(push, NVE4_CP(UPLOAD_EXEC), 1 + 8); PUSH_DATA (push, NVE4_COMPUTE_UPLOAD_EXEC_LINEAR | (0x20 << 1)); PUSH_DATAp(push, info->block, 3); nouveau_pushbuf_data(push, res->bo, offset, NVC0_IB_ENTRY_1_NO_PREFETCH | 3 * 4); } else { - BEGIN_1IC0(push, NVE4_CP(UPLOAD_EXEC), 1 + 7); + BEGIN_1IC0(push, NVE4_CP(UPLOAD_EXEC), 1 + 8); PUSH_DATA (push, NVE4_COMPUTE_UPLOAD_EXEC_LINEAR | (0x20 << 1)); PUSH_DATAp(push, info->block, 3); PUSH_DATAp(push, info->grid, 3); } PUSH_DATA (push, 0); + PUSH_DATA (push, info->work_dim); BEGIN_NVC0(push, NVE4_CP(FLUSH), 1); PUSH_DATA (push, NVE4_COMPUTE_FLUSH_CB); @@ -586,7 +655,7 @@ PUSH_DATA (push, 8); PUSH_DATA (push, 1); - nouveau_pushbuf_space(push, 16, 0, 1); + nouveau_pushbuf_space(push, 32, 0, 1); PUSH_REFN(push, res->bo, NOUVEAU_BO_RD | res->domain); BEGIN_1IC0(push, NVE4_CP(UPLOAD_EXEC), 1 + (8 / 4)); @@ -747,6 +816,7 @@ debug_printf("barrier count: %u\n", desc->bar_alloc); debug_printf("$r count: %u\n", desc->gpr_alloc); debug_printf("cache split: %s\n", nve4_cache_split_name(desc->cache_split)); + debug_printf("linked tsc: %d\n", desc->linked_tsc); for (i = 0; i < 8; ++i) { uint64_t address; diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nve4_compute.h mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nve4_compute.h --- mesa-12.0.6/src/gallium/drivers/nouveau/nvc0/nve4_compute.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nvc0/nve4_compute.h 2017-06-01 10:37:10.000000000 +0000 @@ -8,7 +8,10 @@ { u32 unk0[8]; u32 entry; - u32 unk9[3]; + u32 unk9[2]; + u32 unk11_0 : 30; + u32 linked_tsc : 1; + u32 unk11_31 : 1; u32 griddim_x : 31; u32 unk12 : 1; u16 griddim_y; @@ -48,7 +51,7 @@ memset(desc, 0, sizeof(*desc)); desc->unk0[7] = 0xbc000000; - desc->unk9[2] = 0x44014000; + desc->unk11_0 = 0x04014000; desc->unk47_20 = 0x300; } diff -Nru mesa-12.0.6/src/gallium/drivers/nouveau/nv_object.xml.h mesa-17.0.7/src/gallium/drivers/nouveau/nv_object.xml.h --- mesa-12.0.6/src/gallium/drivers/nouveau/nv_object.xml.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/nouveau/nv_object.xml.h 2017-06-01 10:37:10.000000000 +0000 @@ -193,6 +193,7 @@ #define NVEA_3D_CLASS 0x0000a297 #define GM107_3D_CLASS 0x0000b097 #define GM200_3D_CLASS 0x0000b197 +#define GP100_3D_CLASS 0x0000c097 #define NV50_2D_CLASS 0x0000502d #define NVC0_2D_CLASS 0x0000902d #define NV50_COMPUTE_CLASS 0x000050c0 diff -Nru mesa-12.0.6/src/gallium/drivers/r300/compiler/radeon_dataflow.c mesa-17.0.7/src/gallium/drivers/r300/compiler/radeon_dataflow.c --- mesa-12.0.6/src/gallium/drivers/r300/compiler/radeon_dataflow.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r300/compiler/radeon_dataflow.c 2017-06-01 10:37:10.000000000 +0000 @@ -850,7 +850,7 @@ * of the loop it reads the value written by instruction 0 and in all other * iterations it reads the value written by instruction 3. * - * @param read_cb This function will be called for for every instruction that + * @param read_cb This function will be called for every instruction that * has been determined to be a reader of writer. * @param write_cb This function will be called for every instruction after * writer. diff -Nru mesa-12.0.6/src/gallium/drivers/r300/compiler/radeon_inline_literals.c mesa-17.0.7/src/gallium/drivers/r300/compiler/radeon_inline_literals.c --- mesa-12.0.6/src/gallium/drivers/r300/compiler/radeon_inline_literals.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r300/compiler/radeon_inline_literals.c 2017-06-01 10:37:10.000000000 +0000 @@ -28,6 +28,7 @@ #include "radeon_dataflow.h" #include "radeon_program.h" #include "radeon_program_constants.h" +#include "util/u_bitcast.h" #include #define VERBOSE 0 @@ -45,7 +46,7 @@ */ static int ieee_754_to_r300_float(float f, unsigned char *r300_float_out) { - unsigned float_bits = *((unsigned *)&f); + unsigned float_bits = u_bitcast_f2u(f); /* XXX: Handle big-endian */ unsigned mantissa = float_bits & 0x007fffff; unsigned biased_exponent = (float_bits & 0x7f800000) >> 23; diff -Nru mesa-12.0.6/src/gallium/drivers/r300/compiler/radeon_vert_fc.c mesa-17.0.7/src/gallium/drivers/r300/compiler/radeon_vert_fc.c --- mesa-12.0.6/src/gallium/drivers/r300/compiler/radeon_vert_fc.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r300/compiler/radeon_vert_fc.c 2017-06-01 10:37:10.000000000 +0000 @@ -134,7 +134,7 @@ } else { fc_state->PredStack[fc_state->LoopDepth] = fc_state->PredicateReg; - /* Copy the the current predicate value to this loop's + /* Copy the current predicate value to this loop's * predicate register */ /* Use the old predicate value for src0 */ diff -Nru mesa-12.0.6/src/gallium/drivers/r300/Makefile.in mesa-17.0.7/src/gallium/drivers/r300/Makefile.in --- mesa-12.0.6/src/gallium/drivers/r300/Makefile.in 2017-01-24 01:41:47.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r300/Makefile.in 2017-06-01 10:37:20.000000000 +0000 @@ -89,10 +89,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -165,11 +168,13 @@ am_r300_compiler_tests_OBJECTS = $(am__objects_2) r300_compiler_tests_OBJECTS = $(am_r300_compiler_tests_OBJECTS) am__DEPENDENCIES_1 = -am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ - $(am__DEPENDENCIES_1) +@HAVE_LIBDRM_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) +am__DEPENDENCIES_3 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_2) r300_compiler_tests_DEPENDENCIES = libr300.la \ $(top_builddir)/src/gallium/auxiliary/libgallium.la \ - $(top_builddir)/src/util/libmesautil.la $(am__DEPENDENCIES_2) + $(top_builddir)/src/util/libmesautil.la $(am__DEPENDENCIES_3) AM_V_P = $(am__v_P_@AM_V@) am__v_P_ = $(am__v_P_@AM_DEFAULT_V@) am__v_P_0 = false @@ -443,6 +448,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -457,6 +464,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -486,10 +494,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -539,11 +548,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -583,8 +589,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -621,8 +625,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -631,7 +633,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -639,13 +640,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -674,6 +676,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -894,12 +897,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -911,7 +910,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/src/mesa/program \ diff -Nru mesa-12.0.6/src/gallium/drivers/r300/r300_blit.c mesa-17.0.7/src/gallium/drivers/r300/r300_blit.c --- mesa-12.0.6/src/gallium/drivers/r300/r300_blit.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r300/r300_blit.c 2017-06-01 10:37:10.000000000 +0000 @@ -382,7 +382,7 @@ r300_get_num_cs_end_dwords(r300); /* Reserve CS space. */ - if (dwords > (r300->cs->max_dw - r300->cs->cdw)) { + if (!r300->rws->cs_check_space(r300->cs, dwords)) { r300_flush(&r300->context, RADEON_FLUSH_ASYNC, NULL); } @@ -430,11 +430,13 @@ struct pipe_surface *dst, const union pipe_color_union *color, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct r300_context *r300 = r300_context(pipe); - r300_blitter_begin(r300, R300_CLEAR_SURFACE); + r300_blitter_begin(r300, R300_CLEAR_SURFACE | + (render_condition_enabled ? 0 : R300_IGNORE_RENDER_COND)); util_blitter_clear_render_target(r300->blitter, dst, color, dstx, dsty, width, height); r300_blitter_end(r300); @@ -447,7 +449,8 @@ double depth, unsigned stencil, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct r300_context *r300 = r300_context(pipe); struct pipe_framebuffer_state *fb = @@ -460,7 +463,8 @@ } /* XXX Do not decompress ZMask of the currently-set zbuffer. */ - r300_blitter_begin(r300, R300_CLEAR_SURFACE); + r300_blitter_begin(r300, R300_CLEAR_SURFACE | + (render_condition_enabled ? 0 : R300_IGNORE_RENDER_COND)); util_blitter_clear_depth_stencil(r300->blitter, dst, clear_flags, depth, stencil, dstx, dsty, width, height); r300_blitter_end(r300); diff -Nru mesa-12.0.6/src/gallium/drivers/r300/r300_context.c mesa-17.0.7/src/gallium/drivers/r300/r300_context.c --- mesa-12.0.6/src/gallium/drivers/r300/r300_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r300/r300_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -100,7 +100,7 @@ rc_destroy_regalloc_state(&r300->fs_regalloc_state); /* XXX: No way to tell if this was initialized or not? */ - util_slab_destroy(&r300->pool_transfers); + slab_destroy_child(&r300->pool_transfers); /* Free the structs allocated in r300_setup_atoms() */ if (r300->aa_state.state) { @@ -385,9 +385,7 @@ r300->context.destroy = r300_destroy_context; - util_slab_create(&r300->pool_transfers, - sizeof(struct pipe_transfer), 64, - UTIL_SLAB_SINGLETHREADED); + slab_create_child(&r300->pool_transfers, &r300screen->pool_transfers); r300->ctx = rws->ctx_create(rws); if (!r300->ctx) diff -Nru mesa-12.0.6/src/gallium/drivers/r300/r300_context.h mesa-17.0.7/src/gallium/drivers/r300/r300_context.h --- mesa-12.0.6/src/gallium/drivers/r300/r300_context.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r300/r300_context.h 2017-06-01 10:37:10.000000000 +0000 @@ -596,7 +596,7 @@ unsigned nr_vertex_buffers; struct u_upload_mgr *uploader; - struct util_slab_mempool pool_transfers; + struct slab_child_pool pool_transfers; /* Stat counter. */ uint64_t flush_counter; diff -Nru mesa-12.0.6/src/gallium/drivers/r300/r300_cs.h mesa-17.0.7/src/gallium/drivers/r300/r300_cs.h --- mesa-12.0.6/src/gallium/drivers/r300/r300_cs.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r300/r300_cs.h 2017-06-01 10:37:10.000000000 +0000 @@ -46,7 +46,7 @@ #ifdef DEBUG #define BEGIN_CS(size) do { \ - assert(size <= (cs_copy->max_dw - cs_copy->cdw)); \ + assert(size <= (cs_copy->current.max_dw - cs_copy->current.cdw)); \ cs_count = size; \ } while (0) @@ -72,7 +72,7 @@ */ #define OUT_CS(value) do { \ - cs_copy->buf[cs_copy->cdw++] = (value); \ + cs_copy->current.buf[cs_copy->current.cdw++] = (value); \ CS_USED_DW(1); \ } while (0) @@ -96,8 +96,8 @@ OUT_CS(CP_PACKET3(op, count)) #define OUT_CS_TABLE(values, count) do { \ - memcpy(cs_copy->buf + cs_copy->cdw, (values), (count) * 4); \ - cs_copy->cdw += (count); \ + memcpy(cs_copy->current.buf + cs_copy->current.cdw, (values), (count) * 4); \ + cs_copy->current.cdw += (count); \ CS_USED_DW(count); \ } while (0) @@ -120,8 +120,8 @@ #define WRITE_CS_TABLE(values, count) do { \ assert(cs_count == 0); \ - memcpy(cs_copy->buf + cs_copy->cdw, (values), (count) * 4); \ - cs_copy->cdw += (count); \ + memcpy(cs_copy->current.buf + cs_copy->current.cdw, (values), (count) * 4); \ + cs_copy->current.cdw += (count); \ } while (0) #endif /* R300_CS_H */ diff -Nru mesa-12.0.6/src/gallium/drivers/r300/r300_emit.c mesa-17.0.7/src/gallium/drivers/r300/r300_emit.c --- mesa-12.0.6/src/gallium/drivers/r300/r300_emit.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r300/r300_emit.c 2017-06-01 10:37:10.000000000 +0000 @@ -1321,7 +1321,7 @@ tex = r300_resource(fb->cbufs[i]->texture); assert(tex && tex->buf && "cbuf is marked, but NULL!"); r300->rws->cs_add_buffer(r300->cs, tex->buf, - RADEON_USAGE_READWRITE, + RADEON_USAGE_READWRITE | RADEON_USAGE_SYNCHRONIZED, r300_surface(fb->cbufs[i])->domain, tex->b.b.nr_samples > 1 ? RADEON_PRIO_COLOR_BUFFER_MSAA : @@ -1332,7 +1332,7 @@ tex = r300_resource(fb->zsbuf->texture); assert(tex && tex->buf && "zsbuf is marked, but NULL!"); r300->rws->cs_add_buffer(r300->cs, tex->buf, - RADEON_USAGE_READWRITE, + RADEON_USAGE_READWRITE | RADEON_USAGE_SYNCHRONIZED, r300_surface(fb->zsbuf)->domain, tex->b.b.nr_samples > 1 ? RADEON_PRIO_DEPTH_BUFFER_MSAA : @@ -1343,7 +1343,7 @@ if (r300->aa_state.dirty) { if (aa->dest) { r300->rws->cs_add_buffer(r300->cs, aa->dest->buf, - RADEON_USAGE_WRITE, + RADEON_USAGE_WRITE | RADEON_USAGE_SYNCHRONIZED, aa->dest->domain, RADEON_PRIO_COLOR_BUFFER); } @@ -1356,19 +1356,22 @@ } tex = r300_resource(texstate->sampler_views[i]->base.texture); - r300->rws->cs_add_buffer(r300->cs, tex->buf, RADEON_USAGE_READ, + r300->rws->cs_add_buffer(r300->cs, tex->buf, + RADEON_USAGE_READ | RADEON_USAGE_SYNCHRONIZED, tex->domain, RADEON_PRIO_SAMPLER_TEXTURE); } } /* ...occlusion query buffer... */ if (r300->query_current) r300->rws->cs_add_buffer(r300->cs, r300->query_current->buf, - RADEON_USAGE_WRITE, RADEON_DOMAIN_GTT, + RADEON_USAGE_WRITE | RADEON_USAGE_SYNCHRONIZED, + RADEON_DOMAIN_GTT, RADEON_PRIO_QUERY); /* ...vertex buffer for SWTCL path... */ if (r300->vbo) r300->rws->cs_add_buffer(r300->cs, r300->vbo, - RADEON_USAGE_READ, RADEON_DOMAIN_GTT, + RADEON_USAGE_READ | RADEON_USAGE_SYNCHRONIZED, + RADEON_DOMAIN_GTT, RADEON_PRIO_VERTEX_BUFFER); /* ...vertex buffers for HWTCL path... */ if (do_validate_vertex_buffers && r300->vertex_arrays_dirty) { @@ -1383,7 +1386,7 @@ continue; r300->rws->cs_add_buffer(r300->cs, r300_resource(buf)->buf, - RADEON_USAGE_READ, + RADEON_USAGE_READ | RADEON_USAGE_SYNCHRONIZED, r300_resource(buf)->domain, RADEON_PRIO_SAMPLER_BUFFER); } @@ -1391,7 +1394,7 @@ /* ...and index buffer for HWTCL path. */ if (index_buffer) r300->rws->cs_add_buffer(r300->cs, r300_resource(index_buffer)->buf, - RADEON_USAGE_READ, + RADEON_USAGE_READ | RADEON_USAGE_SYNCHRONIZED, r300_resource(index_buffer)->domain, RADEON_PRIO_INDEX_BUFFER); diff -Nru mesa-12.0.6/src/gallium/drivers/r300/r300_flush.c mesa-17.0.7/src/gallium/drivers/r300/r300_flush.c --- mesa-12.0.6/src/gallium/drivers/r300/r300_flush.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r300/r300_flush.c 2017-06-01 10:37:10.000000000 +0000 @@ -78,8 +78,6 @@ { struct r300_context *r300 = r300_context(pipe); - flags |= RADEON_FLUSH_KEEP_TILING_FLAGS; - if (r300->dirty_hw) { r300_flush_and_cleanup(r300, flags, fence); } else { diff -Nru mesa-12.0.6/src/gallium/drivers/r300/r300_render.c mesa-17.0.7/src/gallium/drivers/r300/r300_render.c --- mesa-12.0.6/src/gallium/drivers/r300/r300_render.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r300/r300_render.c 2017-06-01 10:37:10.000000000 +0000 @@ -215,7 +215,7 @@ cs_dwords += r300_get_num_cs_end_dwords(r300); /* Reserve requested CS space. */ - if (cs_dwords > (r300->cs->max_dw - r300->cs->cdw)) { + if (!r300->rws->cs_check_space(r300->cs, cs_dwords)) { r300_flush(&r300->context, RADEON_FLUSH_ASYNC, NULL); flushed = TRUE; } diff -Nru mesa-12.0.6/src/gallium/drivers/r300/r300_render_translate.c mesa-17.0.7/src/gallium/drivers/r300/r300_render_translate.c --- mesa-12.0.6/src/gallium/drivers/r300/r300_render_translate.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r300/r300_render_translate.c 2017-06-01 10:37:10.000000000 +0000 @@ -41,7 +41,7 @@ &out_offset, out_buffer, &ptr); util_shorten_ubyte_elts_to_userptr( - &r300->context, ib, index_offset, + &r300->context, ib, PIPE_TRANSFER_UNSYNCHRONIZED, index_offset, *start, count, ptr); *index_size = 2; @@ -55,6 +55,7 @@ &out_offset, out_buffer, &ptr); util_rebuild_ushort_elts_to_userptr(&r300->context, ib, + PIPE_TRANSFER_UNSYNCHRONIZED, index_offset, *start, count, ptr); @@ -69,6 +70,7 @@ &out_offset, out_buffer, &ptr); util_rebuild_uint_elts_to_userptr(&r300->context, ib, + PIPE_TRANSFER_UNSYNCHRONIZED, index_offset, *start, count, ptr); diff -Nru mesa-12.0.6/src/gallium/drivers/r300/r300_resource.c mesa-17.0.7/src/gallium/drivers/r300/r300_resource.c --- mesa-12.0.6/src/gallium/drivers/r300/r300_resource.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r300/r300_resource.c 2017-06-01 10:37:10.000000000 +0000 @@ -43,7 +43,8 @@ r300->context.transfer_map = u_transfer_map_vtbl; r300->context.transfer_flush_region = u_default_transfer_flush_region; r300->context.transfer_unmap = u_transfer_unmap_vtbl; - r300->context.transfer_inline_write = u_default_transfer_inline_write; + r300->context.buffer_subdata = u_default_buffer_subdata; + r300->context.texture_subdata = u_default_texture_subdata; r300->context.create_surface = r300_create_surface; r300->context.surface_destroy = r300_surface_destroy; } diff -Nru mesa-12.0.6/src/gallium/drivers/r300/r300_screen_buffer.c mesa-17.0.7/src/gallium/drivers/r300/r300_screen_buffer.c --- mesa-12.0.6/src/gallium/drivers/r300/r300_screen_buffer.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r300/r300_screen_buffer.c 2017-06-01 10:37:10.000000000 +0000 @@ -77,7 +77,7 @@ struct pipe_transfer *transfer; uint8_t *map; - transfer = util_slab_alloc(&r300->pool_transfers); + transfer = slab_alloc(&r300->pool_transfers); transfer->resource = resource; transfer->level = level; transfer->usage = usage; @@ -129,7 +129,7 @@ map = rws->buffer_map(rbuf->buf, r300->cs, usage); if (!map) { - util_slab_free(&r300->pool_transfers, transfer); + slab_free(&r300->pool_transfers, transfer); return NULL; } @@ -142,7 +142,7 @@ { struct r300_context *r300 = r300_context(pipe); - util_slab_free(&r300->pool_transfers, transfer); + slab_free(&r300->pool_transfers, transfer); } static const struct u_resource_vtbl r300_buffer_vtbl = @@ -152,7 +152,6 @@ r300_buffer_transfer_map, /* transfer_map */ NULL, /* transfer_flush_region */ r300_buffer_transfer_unmap, /* transfer_unmap */ - NULL /* transfer_inline_write */ }; struct pipe_resource *r300_buffer_create(struct pipe_screen *screen, diff -Nru mesa-12.0.6/src/gallium/drivers/r300/r300_screen.c mesa-17.0.7/src/gallium/drivers/r300/r300_screen.c --- mesa-12.0.6/src/gallium/drivers/r300/r300_screen.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r300/r300_screen.c 2017-06-01 10:37:10.000000000 +0000 @@ -95,6 +95,7 @@ /* Supported features (boolean caps). */ case PIPE_CAP_NPOT_TEXTURES: case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES: + case PIPE_CAP_MIXED_COLOR_DEPTH_BITS: case PIPE_CAP_TWO_SIDED_STENCIL: case PIPE_CAP_ANISOTROPIC_FILTER: case PIPE_CAP_POINT_SPRITE: @@ -164,6 +165,7 @@ case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS: case PIPE_CAP_MAX_VERTEX_STREAMS: case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME: + case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS: case PIPE_CAP_FRAGMENT_COLOR_CLAMPED: case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION: case PIPE_CAP_COMPUTE: @@ -218,6 +220,15 @@ case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR: case PIPE_CAP_CULL_DISTANCE: case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES: + case PIPE_CAP_TGSI_VOTE: + case PIPE_CAP_MAX_WINDOW_RECTANGLES: + case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED: + case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS: + case PIPE_CAP_TGSI_ARRAY_COMPONENTS: + case PIPE_CAP_TGSI_CAN_READ_OUTPUTS: + case PIPE_CAP_NATIVE_FENCE_FD: + case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY: + case PIPE_CAP_TGSI_FS_FBFETCH: return 0; /* SWTCL-only features. */ @@ -332,6 +343,7 @@ case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED: case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: + case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: return 0; case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: return 32; @@ -394,6 +406,7 @@ case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED: case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: + case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: return 0; case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: return 32; @@ -659,12 +672,6 @@ } } - /* Transfers are always supported. */ - if (usage & PIPE_BIND_TRANSFER_READ) - retval |= PIPE_BIND_TRANSFER_READ; - if (usage & PIPE_BIND_TRANSFER_WRITE) - retval |= PIPE_BIND_TRANSFER_WRITE; - return retval == usage; } @@ -677,6 +684,7 @@ return; pipe_mutex_destroy(r300screen->cmask_mutex); + slab_destroy_parent(&r300screen->pool_transfers); if (rws) rws->destroy(rws); @@ -694,6 +702,7 @@ } static boolean r300_fence_finish(struct pipe_screen *screen, + struct pipe_context *ctx, struct pipe_fence_handle *fence, uint64_t timeout) { @@ -738,6 +747,8 @@ r300_init_screen_resource_functions(r300screen); + slab_create_parent(&r300screen->pool_transfers, sizeof(struct pipe_transfer), 64); + util_format_s3tc_init(); pipe_mutex_init(r300screen->cmask_mutex); diff -Nru mesa-12.0.6/src/gallium/drivers/r300/r300_screen.h mesa-17.0.7/src/gallium/drivers/r300/r300_screen.h --- mesa-12.0.6/src/gallium/drivers/r300/r300_screen.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r300/r300_screen.h 2017-06-01 10:37:10.000000000 +0000 @@ -27,7 +27,7 @@ #include "r300_chipset.h" #include "radeon/radeon_winsys.h" #include "pipe/p_screen.h" -#include "util/u_slab.h" +#include "util/slab.h" #include "os/os_thread.h" #include @@ -44,6 +44,8 @@ /** Combination of DBG_xxx flags */ unsigned debug; + struct slab_parent_pool pool_transfers; + /* The MSAA texture with CMASK access; */ struct pipe_resource *cmask_resource; pipe_mutex cmask_mutex; diff -Nru mesa-12.0.6/src/gallium/drivers/r300/r300_state.c mesa-17.0.7/src/gallium/drivers/r300/r300_state.c --- mesa-12.0.6/src/gallium/drivers/r300/r300_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r300/r300_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -1469,7 +1469,7 @@ } static void r300_bind_sampler_states(struct pipe_context* pipe, - unsigned shader, + enum pipe_shader_type shader, unsigned start, unsigned count, void** states) { @@ -1522,7 +1522,8 @@ return R300_TX_CACHE(num + index); } -static void r300_set_sampler_views(struct pipe_context* pipe, unsigned shader, +static void r300_set_sampler_views(struct pipe_context* pipe, + enum pipe_shader_type shader, unsigned start, unsigned count, struct pipe_sampler_view** views) { @@ -2003,7 +2004,7 @@ static void r300_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, - struct pipe_constant_buffer *cb) + const struct pipe_constant_buffer *cb) { struct r300_context* r300 = r300_context(pipe); struct r300_constant_buffer *cbuf; @@ -2067,7 +2068,7 @@ } } -static void r300_texture_barrier(struct pipe_context *pipe) +static void r300_texture_barrier(struct pipe_context *pipe, unsigned flags) { struct r300_context *r300 = r300_context(pipe); diff -Nru mesa-12.0.6/src/gallium/drivers/r300/r300_texture.c mesa-17.0.7/src/gallium/drivers/r300/r300_texture.c --- mesa-12.0.6/src/gallium/drivers/r300/r300_texture.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r300/r300_texture.c 2017-06-01 10:37:10.000000000 +0000 @@ -47,6 +47,11 @@ */ static enum pipe_format r300_unbyteswap_array_format(enum pipe_format format) { + /* FIXME: Disabled on little endian because of a reported regression: + * https://bugs.freedesktop.org/show_bug.cgi?id=98869 */ + if (PIPE_ENDIAN_NATIVE != PIPE_ENDIAN_BIG) + return format; + /* Only BGRA 8888 array formats are supported for simplicity of * the implementation. */ switch (format) { @@ -1036,6 +1041,7 @@ } boolean r300_resource_get_handle(struct pipe_screen* screen, + struct pipe_context *ctx, struct pipe_resource *texture, struct winsys_handle *whandle, unsigned usage) @@ -1058,7 +1064,6 @@ r300_texture_transfer_map, /* transfer_map */ NULL, /* transfer_flush_region */ r300_texture_transfer_unmap, /* transfer_unmap */ - NULL /* transfer_inline_write */ }; /* The common texture constructor. */ @@ -1114,7 +1119,7 @@ /* Create the backing buffer if needed. */ if (!tex->buf) { tex->buf = rws->buffer_create(rws, tex->tex.size_in_bytes, 2048, - tex->domain, 0); + tex->domain, RADEON_FLAG_HANDLE); if (!tex->buf) { goto fail; diff -Nru mesa-12.0.6/src/gallium/drivers/r300/r300_texture.h mesa-17.0.7/src/gallium/drivers/r300/r300_texture.h --- mesa-12.0.6/src/gallium/drivers/r300/r300_texture.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r300/r300_texture.h 2017-06-01 10:37:10.000000000 +0000 @@ -62,6 +62,7 @@ struct r300_texture_format_state *out); boolean r300_resource_get_handle(struct pipe_screen* screen, + struct pipe_context *ctx, struct pipe_resource *texture, struct winsys_handle *whandle, unsigned usage); diff -Nru mesa-12.0.6/src/gallium/drivers/r300/r300_tgsi_to_rc.c mesa-17.0.7/src/gallium/drivers/r300/r300_tgsi_to_rc.c --- mesa-12.0.6/src/gallium/drivers/r300/r300_tgsi_to_rc.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r300/r300_tgsi_to_rc.c 2017-06-01 10:37:10.000000000 +0000 @@ -50,7 +50,6 @@ case TGSI_OPCODE_SLT: return RC_OPCODE_SLT; case TGSI_OPCODE_SGE: return RC_OPCODE_SGE; case TGSI_OPCODE_MAD: return RC_OPCODE_MAD; - case TGSI_OPCODE_SUB: return RC_OPCODE_SUB; case TGSI_OPCODE_LRP: return RC_OPCODE_LRP; /* case TGSI_OPCODE_DP2A: return RC_OPCODE_DP2A; */ case TGSI_OPCODE_FRC: return RC_OPCODE_FRC; @@ -61,7 +60,6 @@ case TGSI_OPCODE_LG2: return RC_OPCODE_LG2; case TGSI_OPCODE_POW: return RC_OPCODE_POW; case TGSI_OPCODE_XPD: return RC_OPCODE_XPD; - case TGSI_OPCODE_ABS: return RC_OPCODE_ABS; case TGSI_OPCODE_DPH: return RC_OPCODE_DPH; case TGSI_OPCODE_COS: return RC_OPCODE_COS; case TGSI_OPCODE_DDX: return RC_OPCODE_DDX; diff -Nru mesa-12.0.6/src/gallium/drivers/r600/evergreen_compute.c mesa-17.0.7/src/gallium/drivers/r600/evergreen_compute.c --- mesa-12.0.6/src/gallium/drivers/r600/evergreen_compute.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r600/evergreen_compute.c 2017-06-01 10:37:10.000000000 +0000 @@ -46,9 +46,6 @@ #include "evergreen_compute_internal.h" #include "compute_memory_pool.h" #include "sb/sb_public.h" -#ifdef HAVE_OPENCL -#include "radeon/radeon_llvm_util.h" -#endif #include "radeon/radeon_elf_util.h" #include @@ -90,9 +87,7 @@ assert(size); buffer = pipe_buffer_create((struct pipe_screen*) screen, - PIPE_BIND_CUSTOM, - PIPE_USAGE_IMMUTABLE, - size); + 0, PIPE_USAGE_IMMUTABLE, size); return (struct r600_resource *)buffer; } @@ -242,7 +237,7 @@ } static void *evergreen_create_compute_state(struct pipe_context *ctx, - const const struct pipe_compute_state *cso) + const struct pipe_compute_state *cso) { struct r600_context *rctx = (struct r600_context *)ctx; struct r600_pipe_compute *shader = CALLOC_STRUCT(r600_pipe_compute); @@ -338,7 +333,7 @@ if (!shader->kernel_param) { /* Add space for the grid dimensions */ shader->kernel_param = (struct r600_resource *) - pipe_buffer_create(ctx->screen, PIPE_BIND_CUSTOM, + pipe_buffer_create(ctx->screen, 0, PIPE_USAGE_IMMUTABLE, input_size); } @@ -372,7 +367,11 @@ ctx->transfer_unmap(ctx, transfer); - /* ID=0 is reserved for the parameters */ + /* ID=0 and ID=3 are reserved for the parameters. + * LLVM will preferably use ID=0, but it does not work for dynamic + * indices. */ + evergreen_cs_set_vertex_buffer(rctx, 3, 0, + (struct pipe_resource*)shader->kernel_param); evergreen_cs_set_constant_buffer(rctx, 0, 0, input_size, (struct pipe_resource*)shader->kernel_param); } @@ -583,7 +582,7 @@ radeon_emit(cs, PKT3C(PKT3_NOP, 0, 0)); radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, code_bo, RADEON_USAGE_READ, - RADEON_PRIO_USER_SHADER)); + RADEON_PRIO_SHADER_BINARY)); } static void evergreen_launch_grid(struct pipe_context *ctx, @@ -618,9 +617,9 @@ start, count); for (unsigned i = 0; i < count; i++) { - /* The First three vertex buffers are reserved for parameters and + /* The First four vertex buffers are reserved for parameters and * global buffers. */ - unsigned vtx_id = 3 + i; + unsigned vtx_id = 4 + i; if (resources[i]) { struct r600_resource_global *buffer = (struct r600_resource_global*) @@ -976,18 +975,6 @@ assert(0 && "TODO"); } -static void r600_compute_global_transfer_inline_write(struct pipe_context *pipe, - struct pipe_resource *resource, - unsigned level, - unsigned usage, - const struct pipe_box *box, - const void *data, - unsigned stride, - unsigned layer_stride) -{ - assert(0 && "TODO"); -} - static void r600_compute_global_buffer_destroy(struct pipe_screen *screen, struct pipe_resource *res) { @@ -1013,7 +1000,6 @@ r600_compute_global_transfer_map, /* transfer_map */ r600_compute_global_transfer_flush_region,/* transfer_flush_region */ r600_compute_global_transfer_unmap, /* transfer_unmap */ - r600_compute_global_transfer_inline_write /* transfer_inline_write */ }; struct pipe_resource *r600_compute_global_buffer_create(struct pipe_screen *screen, diff -Nru mesa-12.0.6/src/gallium/drivers/r600/evergreen_compute_internal.h mesa-17.0.7/src/gallium/drivers/r600/evergreen_compute_internal.h --- mesa-12.0.6/src/gallium/drivers/r600/evergreen_compute_internal.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r600/evergreen_compute_internal.h 2017-06-01 10:37:10.000000000 +0000 @@ -27,7 +27,6 @@ #include "r600_asm.h" #ifdef HAVE_OPENCL -#include "radeon/radeon_llvm.h" #include #endif diff -Nru mesa-12.0.6/src/gallium/drivers/r600/evergreend.h mesa-17.0.7/src/gallium/drivers/r600/evergreend.h --- mesa-12.0.6/src/gallium/drivers/r600/evergreend.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r600/evergreend.h 2017-06-01 10:37:10.000000000 +0000 @@ -88,6 +88,7 @@ #define WAIT_REG_MEM_EQUAL 3 #define PKT3_MEM_WRITE 0x3D #define PKT3_INDIRECT_BUFFER 0x32 +#define PKT3_PFP_SYNC_ME 0x42 #define PKT3_SURFACE_SYNC 0x43 #define PKT3_ME_INITIALIZE 0x44 #define PKT3_COND_WRITE 0x45 diff -Nru mesa-12.0.6/src/gallium/drivers/r600/evergreen_hw_context.c mesa-17.0.7/src/gallium/drivers/r600/evergreen_hw_context.c --- mesa-12.0.6/src/gallium/drivers/r600/evergreen_hw_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r600/evergreen_hw_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -77,7 +77,6 @@ src_offset += csize << shift; size -= csize; } - r600_dma_emit_wait_idle(&rctx->b); } /* The max number of bytes to copy per packet. */ @@ -85,7 +84,8 @@ void evergreen_cp_dma_clear_buffer(struct r600_context *rctx, struct pipe_resource *dst, uint64_t offset, - unsigned size, uint32_t clear_value) + unsigned size, uint32_t clear_value, + enum r600_coherency coher) { struct radeon_winsys_cs *cs = rctx->b.gfx.cs; @@ -101,15 +101,7 @@ offset += r600_resource(dst)->gpu_address; /* Flush the cache where the resource is bound. */ - rctx->b.flags |= R600_CONTEXT_INV_CONST_CACHE | - R600_CONTEXT_INV_VERTEX_CACHE | - R600_CONTEXT_INV_TEX_CACHE | - R600_CONTEXT_FLUSH_AND_INV | - R600_CONTEXT_FLUSH_AND_INV_CB | - R600_CONTEXT_FLUSH_AND_INV_DB | - R600_CONTEXT_FLUSH_AND_INV_CB_META | - R600_CONTEXT_FLUSH_AND_INV_DB_META | - R600_CONTEXT_STREAMOUT_FLUSH | + rctx->b.flags |= r600_get_flush_flags(coher) | R600_CONTEXT_WAIT_3D_IDLE; while (size) { @@ -117,7 +109,9 @@ unsigned byte_count = MIN2(size, CP_DMA_MAX_BYTE_COUNT); unsigned reloc; - r600_need_cs_space(rctx, 10 + (rctx->b.flags ? R600_MAX_FLUSH_CS_DWORDS : 0), FALSE); + r600_need_cs_space(rctx, + 10 + (rctx->b.flags ? R600_MAX_FLUSH_CS_DWORDS : 0) + + R600_MAX_PFP_SYNC_ME_DWORDS, FALSE); /* Flush the caches for the first copy only. */ if (rctx->b.flags) { @@ -148,9 +142,11 @@ offset += byte_count; } - /* Invalidate the read caches. */ - rctx->b.flags |= R600_CONTEXT_INV_CONST_CACHE | - R600_CONTEXT_INV_VERTEX_CACHE | - R600_CONTEXT_INV_TEX_CACHE; + /* CP DMA is executed in ME, but index buffers are read by PFP. + * This ensures that ME (CP DMA) is idle before PFP starts fetching + * indices. If we wanted to execute CP DMA in PFP, this packet + * should precede it. + */ + if (coher == R600_COHERENCY_SHADER) + r600_emit_pfp_sync_me(rctx); } - diff -Nru mesa-12.0.6/src/gallium/drivers/r600/evergreen_state.c mesa-17.0.7/src/gallium/drivers/r600/evergreen_state.c --- mesa-12.0.6/src/gallium/drivers/r600/evergreen_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r600/evergreen_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -294,11 +294,6 @@ retval |= PIPE_BIND_VERTEX_BUFFER; } - if (usage & PIPE_BIND_TRANSFER_READ) - retval |= PIPE_BIND_TRANSFER_READ; - if (usage & PIPE_BIND_TRANSFER_WRITE) - retval |= PIPE_BIND_TRANSFER_WRITE; - if ((usage & PIPE_BIND_LINEAR) && !util_format_is_compressed(format) && !(usage & PIPE_BIND_DEPTH_STENCIL)) @@ -482,7 +477,6 @@ S_028A0C_LINE_PATTERN(state->line_stipple_pattern) | S_028A0C_REPEAT_COUNT(state->line_stipple_factor) : 0; rs->pa_cl_clip_cntl = - S_028810_PS_UCP_MODE(3) | S_028810_DX_CLIP_SPACE_DEF(state->clip_halfz) | S_028810_ZCLIP_NEAR_DISABLE(!state->depth_clip) | S_028810_ZCLIP_FAR_DISABLE(!state->depth_clip) | @@ -494,6 +488,7 @@ rs->offset_units = state->offset_units; rs->offset_scale = state->offset_scale * 16.0f; rs->offset_enable = state->offset_point || state->offset_line || state->offset_tri; + rs->offset_units_unscaled = state->offset_units_unscaled; if (state->point_size_per_vertex) { psize_min = util_get_min_point_size(state); @@ -614,8 +609,8 @@ unsigned swizzle_res; unsigned char swizzle[4]; const struct util_format_description *desc; - unsigned offset = view->base.u.buf.first_element * stride; - unsigned size = (view->base.u.buf.last_element - view->base.u.buf.first_element + 1) * stride; + unsigned offset = view->base.u.buf.offset; + unsigned size = view->base.u.buf.size; swizzle[0] = view->base.swizzle_r; swizzle[1] = view->base.swizzle_g; @@ -653,7 +648,7 @@ view->tex_resource_words[7] = S_03001C_TYPE(V_03001C_SQ_TEX_VTX_VALID_BUFFER); if (tmp->resource.gpu_address) - LIST_ADDTAIL(&view->list, &rctx->b.texture_buffers); + LIST_ADDTAIL(&view->list, &rctx->texture_buffers); return &view->base; } @@ -703,14 +698,16 @@ surflevel = tmp->surface.level; /* Texturing with separate depth and stencil. */ - if (tmp->is_depth && !tmp->is_flushing_texture) { + if (tmp->db_compatible) { switch (pipe_format) { case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT: pipe_format = PIPE_FORMAT_Z32_FLOAT; break; case PIPE_FORMAT_X8Z24_UNORM: case PIPE_FORMAT_S8_UINT_Z24_UNORM: - /* Z24 is always stored like this. */ + /* Z24 is always stored like this for DB + * compatibility. + */ pipe_format = PIPE_FORMAT_Z24X8_UNORM; break; case PIPE_FORMAT_X24S8_UINT: @@ -725,7 +722,7 @@ } if (R600_BIG_ENDIAN) - do_endian_swap = !(tmp->is_depth && !tmp->is_flushing_texture); + do_endian_swap = !tmp->db_compatible; format = r600_translate_texformat(ctx->screen, pipe_format, swizzle, @@ -869,7 +866,7 @@ S_03001C_BANK_HEIGHT(bankh) | S_03001C_MACRO_TILE_ASPECT(macro_aspect) | S_03001C_NUM_BANKS(nbanks) | - S_03001C_DEPTH_SAMPLE_ORDER(tmp->is_depth && !tmp->is_flushing_texture); + S_03001C_DEPTH_SAMPLE_ORDER(tmp->db_compatible); return &view->base; } @@ -1089,7 +1086,7 @@ } if (R600_BIG_ENDIAN) - do_endian_swap = !(rtex->is_depth && !rtex->is_flushing_texture); + do_endian_swap = !rtex->db_compatible; format = r600_translate_colorformat(rctx->b.chip_class, surf->base.format, do_endian_swap); @@ -1224,27 +1221,6 @@ surf->db_depth_slice = S_02805C_SLICE_TILE_MAX(levelinfo->nblk_x * levelinfo->nblk_y / 64 - 1); - switch (surf->base.format) { - case PIPE_FORMAT_Z24X8_UNORM: - case PIPE_FORMAT_Z24_UNORM_S8_UINT: - case PIPE_FORMAT_X8Z24_UNORM: - case PIPE_FORMAT_S8_UINT_Z24_UNORM: - surf->pa_su_poly_offset_db_fmt_cntl = - S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS((char)-24); - break; - case PIPE_FORMAT_Z32_FLOAT: - case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT: - surf->pa_su_poly_offset_db_fmt_cntl = - S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS((char)-23) | - S_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(1); - break; - case PIPE_FORMAT_Z16_UNORM: - surf->pa_su_poly_offset_db_fmt_cntl = - S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS((char)-16); - break; - default:; - } - if (rtex->surface.flags & RADEON_SURF_SBUFFER) { uint64_t stencil_offset; unsigned stile_split = rtex->surface.stencil_tile_split; @@ -1288,20 +1264,17 @@ struct r600_texture *rtex; uint32_t i, log_samples; - if (rctx->framebuffer.state.nr_cbufs) { - rctx->b.flags |= R600_CONTEXT_WAIT_3D_IDLE | R600_CONTEXT_FLUSH_AND_INV; - rctx->b.flags |= R600_CONTEXT_FLUSH_AND_INV_CB | - R600_CONTEXT_FLUSH_AND_INV_CB_META; - } - if (rctx->framebuffer.state.zsbuf) { - rctx->b.flags |= R600_CONTEXT_WAIT_3D_IDLE | R600_CONTEXT_FLUSH_AND_INV; - rctx->b.flags |= R600_CONTEXT_FLUSH_AND_INV_DB; - - rtex = (struct r600_texture*)rctx->framebuffer.state.zsbuf->texture; - if (rtex->htile_buffer) { - rctx->b.flags |= R600_CONTEXT_FLUSH_AND_INV_DB_META; - } - } + /* Flush TC when changing the framebuffer state, because the only + * client not using TC that can change textures is the framebuffer. + * Other places don't typically have to flush TC. + */ + rctx->b.flags |= R600_CONTEXT_WAIT_3D_IDLE | + R600_CONTEXT_FLUSH_AND_INV | + R600_CONTEXT_FLUSH_AND_INV_CB | + R600_CONTEXT_FLUSH_AND_INV_CB_META | + R600_CONTEXT_FLUSH_AND_INV_DB | + R600_CONTEXT_FLUSH_AND_INV_DB_META | + R600_CONTEXT_INV_TEX_CACHE; util_copy_framebuffer_state(&rctx->framebuffer.state, state); @@ -1329,7 +1302,7 @@ rctx->framebuffer.export_16bpc = false; } - if (rtex->fmask.size && rtex->cmask.size) { + if (rtex->fmask.size) { rctx->framebuffer.compressed_cb_mask |= 1 << i; } } @@ -1571,7 +1544,7 @@ &rctx->b.gfx, (struct r600_resource*)cb->base.texture, RADEON_USAGE_READWRITE, - tex->surface.nsamples > 1 ? + tex->resource.b.b.nr_samples > 1 ? RADEON_PRIO_COLOR_BUFFER_MSAA : RADEON_PRIO_COLOR_BUFFER); @@ -1632,8 +1605,6 @@ RADEON_PRIO_DEPTH_BUFFER_MSAA : RADEON_PRIO_DEPTH_BUFFER); - radeon_set_context_reg(cs, R_028B78_PA_SU_POLY_OFFSET_DB_FMT_CNTL, - zb->pa_su_poly_offset_db_fmt_cntl); radeon_set_context_reg(cs, R_028008_DB_DEPTH_VIEW, zb->db_depth_view); radeon_set_context_reg_seq(cs, R_028040_DB_Z_INFO, 8); @@ -1675,8 +1646,14 @@ if (rctx->b.chip_class == EVERGREEN) { evergreen_emit_msaa_state(rctx, rctx->framebuffer.nr_samples, rctx->ps_iter_samples); } else { - cayman_emit_msaa_sample_locs(cs, rctx->framebuffer.nr_samples); - cayman_emit_msaa_config(cs, rctx->framebuffer.nr_samples, rctx->ps_iter_samples, 0); + unsigned sc_mode_cntl_1 = + EG_S_028A4C_FORCE_EOV_CNTDWN_ENABLE(1) | + EG_S_028A4C_FORCE_EOV_REZ_ENABLE(1); + + if (rctx->framebuffer.nr_samples > 1) + cayman_emit_msaa_sample_locs(cs, rctx->framebuffer.nr_samples); + cayman_emit_msaa_config(cs, rctx->framebuffer.nr_samples, + rctx->ps_iter_samples, 0, sc_mode_cntl_1); } } @@ -1686,18 +1663,28 @@ struct r600_poly_offset_state *state = (struct r600_poly_offset_state*)a; float offset_units = state->offset_units; float offset_scale = state->offset_scale; + uint32_t pa_su_poly_offset_db_fmt_cntl = 0; - switch (state->zs_format) { - case PIPE_FORMAT_Z24X8_UNORM: - case PIPE_FORMAT_Z24_UNORM_S8_UINT: - case PIPE_FORMAT_X8Z24_UNORM: - case PIPE_FORMAT_S8_UINT_Z24_UNORM: - offset_units *= 2.0f; - break; - case PIPE_FORMAT_Z16_UNORM: - offset_units *= 4.0f; - break; - default:; + if (!state->offset_units_unscaled) { + switch (state->zs_format) { + case PIPE_FORMAT_Z24X8_UNORM: + case PIPE_FORMAT_Z24_UNORM_S8_UINT: + case PIPE_FORMAT_X8Z24_UNORM: + case PIPE_FORMAT_S8_UINT_Z24_UNORM: + offset_units *= 2.0f; + pa_su_poly_offset_db_fmt_cntl = + S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS((char)-24); + break; + case PIPE_FORMAT_Z16_UNORM: + offset_units *= 4.0f; + pa_su_poly_offset_db_fmt_cntl = + S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS((char)-16); + break; + default: + pa_su_poly_offset_db_fmt_cntl = + S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS((char)-23) | + S_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(1); + } } radeon_set_context_reg_seq(cs, R_028B80_PA_SU_POLY_OFFSET_FRONT_SCALE, 4); @@ -1705,6 +1692,9 @@ radeon_emit(cs, fui(offset_units)); radeon_emit(cs, fui(offset_scale)); radeon_emit(cs, fui(offset_units)); + + radeon_set_context_reg(cs, R_028B78_PA_SU_POLY_OFFSET_DB_FMT_CNTL, + pa_su_poly_offset_db_fmt_cntl); } static void evergreen_emit_cb_misc_state(struct r600_context *rctx, struct r600_atom *atom) @@ -2162,7 +2152,7 @@ radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, shader->buffer, RADEON_USAGE_READ, - RADEON_PRIO_INTERNAL_SHADER)); + RADEON_PRIO_SHADER_BINARY)); } static void evergreen_emit_shader_stages(struct r600_context *rctx, struct r600_atom *a) @@ -2286,7 +2276,7 @@ radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, rbuffer, RADEON_USAGE_READWRITE, - RADEON_PRIO_RINGS_STREAMOUT)); + RADEON_PRIO_SHADER_RINGS)); radeon_set_config_reg(cs, R_008C44_SQ_ESGS_RING_SIZE, state->esgs_ring.buffer_size >> 8); @@ -2296,7 +2286,7 @@ radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, rbuffer, RADEON_USAGE_READWRITE, - RADEON_PRIO_RINGS_STREAMOUT)); + RADEON_PRIO_SHADER_RINGS)); radeon_set_config_reg(cs, R_008C4C_SQ_GSVS_RING_SIZE, state->gsvs_ring.buffer_size >> 8); } else { @@ -2335,7 +2325,7 @@ static void cayman_init_atom_start_cs(struct r600_context *rctx) { struct r600_command_buffer *cb = &rctx->start_cs_cmd; - int tmp, i; + int i; r600_init_command_buffer(cb, 338); @@ -2427,12 +2417,6 @@ r600_store_context_reg(cb, R_028200_PA_SC_WINDOW_OFFSET, 0); r600_store_context_reg(cb, R_02820C_PA_SC_CLIPRECT_RULE, 0xFFFF); - r600_store_context_reg_seq(cb, R_0282D0_PA_SC_VPORT_ZMIN_0, 2 * R600_MAX_VIEWPORTS); - for (tmp = 0; tmp < R600_MAX_VIEWPORTS; tmp++) { - r600_store_value(cb, 0); /* R_0282D0_PA_SC_VPORT_ZMIN_0 */ - r600_store_value(cb, fui(1.0)); /* R_0282D4_PA_SC_VPORT_ZMAX_0 */ - } - r600_store_context_reg(cb, R_028230_PA_SC_EDGERULE, 0xAAAAAAAA); r600_store_context_reg(cb, R_028820_PA_CL_NANINF_CNTL, 0); @@ -2837,12 +2821,6 @@ r600_store_context_reg(cb, R_02820C_PA_SC_CLIPRECT_RULE, 0xFFFF); r600_store_context_reg(cb, R_028230_PA_SC_EDGERULE, 0xAAAAAAAA); - r600_store_context_reg_seq(cb, R_0282D0_PA_SC_VPORT_ZMIN_0, 2 * R600_MAX_VIEWPORTS); - for (tmp = 0; tmp < R600_MAX_VIEWPORTS; tmp++) { - r600_store_value(cb, 0); /* R_0282D0_PA_SC_VPORT_ZMIN_0 */ - r600_store_value(cb, fui(1.0)); /* R_0282D4_PA_SC_VPORT_ZMAX_0 */ - } - r600_store_context_reg(cb, R_0286DC_SPI_FOG_CNTL, 0); r600_store_context_reg(cb, R_028820_PA_CL_NANINF_CNTL, 0); @@ -3403,7 +3381,7 @@ * dma packet will be using the copy_height which is always smaller or equal * to the linear height */ - height = rsrc->surface.level[src_level].npix_y; + height = u_minify(rsrc->resource.b.b.height0, src_level); detile = 1; x = src_x; y = src_y; @@ -3428,7 +3406,7 @@ * dma packet will be using the copy_height which is always smaller or equal * to the linear height */ - height = rdst->surface.level[dst_level].npix_y; + height = u_minify(rdst->resource.b.b.height0, dst_level); detile = 0; x = dst_x; y = dst_y; @@ -3475,7 +3453,6 @@ addr += cheight * pitch; y += cheight; } - r600_dma_emit_wait_idle(&rctx->b); } static void evergreen_dma_copy(struct pipe_context *ctx, @@ -3514,10 +3491,10 @@ dst_y = util_format_get_nblocksy(src->format, dst_y); bpp = rdst->surface.bpe; - dst_pitch = rdst->surface.level[dst_level].pitch_bytes; - src_pitch = rsrc->surface.level[src_level].pitch_bytes; - src_w = rsrc->surface.level[src_level].npix_x; - dst_w = rdst->surface.level[dst_level].npix_x; + dst_pitch = rdst->surface.level[dst_level].nblk_x * rdst->surface.bpe; + src_pitch = rsrc->surface.level[src_level].nblk_x * rsrc->surface.bpe; + src_w = u_minify(rsrc->resource.b.b.width0, src_level); + dst_w = u_minify(rdst->resource.b.b.width0, dst_level); copy_height = src_box->height / rsrc->surface.blk_h; dst_mode = rdst->surface.level[dst_level].mode; @@ -3645,7 +3622,7 @@ r600_init_atom(rctx, &rctx->db_misc_state.atom, id++, evergreen_emit_db_misc_state, 10); r600_init_atom(rctx, &rctx->db_state.atom, id++, evergreen_emit_db_state, 14); r600_init_atom(rctx, &rctx->dsa_state.atom, id++, r600_emit_cso_state, 0); - r600_init_atom(rctx, &rctx->poly_offset_state.atom, id++, evergreen_emit_polygon_offset, 6); + r600_init_atom(rctx, &rctx->poly_offset_state.atom, id++, evergreen_emit_polygon_offset, 9); r600_init_atom(rctx, &rctx->rasterizer_state.atom, id++, r600_emit_cso_state, 0); r600_add_atom(rctx, &rctx->b.scissors.atom, id++); r600_add_atom(rctx, &rctx->b.viewports.atom, id++); diff -Nru mesa-12.0.6/src/gallium/drivers/r600/Makefile.am mesa-17.0.7/src/gallium/drivers/r600/Makefile.am --- mesa-12.0.6/src/gallium/drivers/r600/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r600/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -3,11 +3,13 @@ AM_CFLAGS = \ $(GALLIUM_DRIVER_CFLAGS) \ - $(RADEON_CFLAGS) + $(RADEON_CFLAGS) \ + -I$(top_srcdir)/src/amd/common AM_CXXFLAGS = \ $(GALLIUM_DRIVER_CXXFLAGS) \ - $(RADEON_CFLAGS) + $(RADEON_CFLAGS) \ + -I$(top_srcdir)/src/amd/common noinst_LTLIBRARIES = libr600.la diff -Nru mesa-12.0.6/src/gallium/drivers/r600/Makefile.in mesa-17.0.7/src/gallium/drivers/r600/Makefile.in --- mesa-12.0.6/src/gallium/drivers/r600/Makefile.in 2017-01-24 01:41:47.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r600/Makefile.in 2017-06-01 10:37:20.000000000 +0000 @@ -89,18 +89,21 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) -@NEED_RADEON_LLVM_TRUE@am__append_3 = \ +@NEED_RADEON_LLVM_TRUE@am__append_4 = \ @NEED_RADEON_LLVM_TRUE@ $(LLVM_CFLAGS) \ @NEED_RADEON_LLVM_TRUE@ -I$(top_srcdir)/src/gallium/drivers/radeon/ -@HAVE_GALLIUM_COMPUTE_TRUE@am__append_4 = \ +@HAVE_GALLIUM_COMPUTE_TRUE@am__append_5 = \ @HAVE_GALLIUM_COMPUTE_TRUE@ -DHAVE_OPENCL subdir = src/gallium/drivers/r600 @@ -231,6 +234,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -245,6 +250,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -274,10 +280,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -327,11 +334,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -371,8 +375,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -409,8 +411,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -419,7 +419,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -427,13 +426,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -462,6 +462,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -638,12 +639,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -655,12 +652,13 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) -AM_CFLAGS = $(GALLIUM_DRIVER_CFLAGS) $(RADEON_CFLAGS) $(am__append_3) \ - $(am__append_4) + $(am__append_2) $(am__append_3) +AM_CFLAGS = $(GALLIUM_DRIVER_CFLAGS) $(RADEON_CFLAGS) \ + -I$(top_srcdir)/src/amd/common $(am__append_4) $(am__append_5) AM_CXXFLAGS = \ $(GALLIUM_DRIVER_CXXFLAGS) \ - $(RADEON_CFLAGS) + $(RADEON_CFLAGS) \ + -I$(top_srcdir)/src/amd/common noinst_LTLIBRARIES = libr600.la libr600_la_SOURCES = \ diff -Nru mesa-12.0.6/src/gallium/drivers/r600/r600_asm.c mesa-17.0.7/src/gallium/drivers/r600/r600_asm.c --- mesa-12.0.6/src/gallium/drivers/r600/r600_asm.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r600/r600_asm.c 2017-06-01 10:37:10.000000000 +0000 @@ -27,6 +27,7 @@ #include "r600d.h" #include +#include "util/u_bitcast.h" #include "util/u_dump.h" #include "util/u_memory.h" #include "util/u_math.h" @@ -1956,7 +1957,7 @@ need_chan = 1; break; case V_SQ_ALU_SRC_LITERAL: - o += fprintf(stderr, "[0x%08X %f]", src->value, *(float*)&src->value); + o += fprintf(stderr, "[0x%08X %f]", src->value, u_bitcast_u2f(src->value)); break; case V_SQ_ALU_SRC_0_5: o += fprintf(stderr, "0.5"); @@ -2343,6 +2344,12 @@ return; } + if (pformat == PIPE_FORMAT_B5G6R5_UNORM) { + *format = FMT_5_6_5; + *endian = r600_endian_swap(16); + return; + } + desc = util_format_description(pformat); if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN) { goto out_unknown; @@ -2615,7 +2622,8 @@ return NULL; } - u_suballocator_alloc(rctx->allocator_fetch_shader, fs_size, &shader->offset, + u_suballocator_alloc(rctx->allocator_fetch_shader, fs_size, 256, + &shader->offset, (struct pipe_resource**)&shader->buffer); if (!shader->buffer) { r600_bytecode_clear(&bc); diff -Nru mesa-12.0.6/src/gallium/drivers/r600/r600_blit.c mesa-17.0.7/src/gallium/drivers/r600/r600_blit.c --- mesa-12.0.6/src/gallium/drivers/r600/r600_blit.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r600/r600_blit.c 2017-06-01 10:37:10.000000000 +0000 @@ -275,10 +275,9 @@ rview = (struct r600_pipe_sampler_view*)view; tex = (struct r600_texture *)view->texture; - assert(tex->is_depth && !tex->is_flushing_texture); + assert(tex->db_compatible); - if (rctx->b.chip_class >= EVERGREEN || - r600_can_read_depth(tex)) { + if (r600_can_sample_zs(tex, rview->is_stencil_sampler)) { r600_blit_decompress_depth_in_place(rctx, tex, rview->is_stencil_sampler, view->u.tex.first_level, view->u.tex.last_level, @@ -373,9 +372,8 @@ struct r600_context *rctx = (struct r600_context *)ctx; struct r600_texture *rtex = (struct r600_texture*)tex; - if (rtex->is_depth && !rtex->is_flushing_texture) { - if (rctx->b.chip_class >= EVERGREEN || - r600_can_read_depth(rtex)) { + if (rtex->db_compatible) { + if (r600_can_sample_zs(rtex, false)) { r600_blit_decompress_depth_in_place(rctx, rtex, false, level, level, first_layer, last_layer); @@ -475,11 +473,13 @@ struct pipe_surface *dst, const union pipe_color_union *color, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct r600_context *rctx = (struct r600_context *)ctx; - r600_blitter_begin(ctx, R600_CLEAR_SURFACE); + r600_blitter_begin(ctx, R600_CLEAR_SURFACE | + (render_condition_enabled ? 0 : R600_DISABLE_RENDER_COND)); util_blitter_clear_render_target(rctx->blitter, dst, color, dstx, dsty, width, height); r600_blitter_end(ctx); @@ -491,11 +491,13 @@ double depth, unsigned stencil, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct r600_context *rctx = (struct r600_context *)ctx; - r600_blitter_begin(ctx, R600_CLEAR_SURFACE); + r600_blitter_begin(ctx, R600_CLEAR_SURFACE | + (render_condition_enabled ? 0 : R600_DISABLE_RENDER_COND)); util_blitter_clear_depth_stencil(rctx->blitter, dst, clear_flags, depth, stencil, dstx, dsty, width, height); r600_blitter_end(ctx); @@ -519,12 +521,6 @@ } else { util_resource_copy_region(ctx, dst, 0, dstx, 0, 0, src, 0, src_box); } - - /* The index buffer (VGT) doesn't seem to see the result of the copying. - * Can we somehow flush the index buffer cache? Starting a new IB seems - * to do the trick. */ - if (rctx->b.chip_class <= R700) - rctx->b.gfx.flush(ctx, RADEON_FLUSH_ASYNC, NULL); } /** @@ -589,7 +585,7 @@ if (rctx->screen->b.has_cp_dma && rctx->b.chip_class >= EVERGREEN && offset % 4 == 0 && size % 4 == 0) { - evergreen_cp_dma_clear_buffer(rctx, dst, offset, size, value); + evergreen_cp_dma_clear_buffer(rctx, dst, offset, size, value, coher); } else if (rctx->screen->b.has_streamout && offset % 4 == 0 && size % 4 == 0) { union pipe_color_union clear_value; clear_value.ui[0] = value; @@ -756,42 +752,6 @@ pipe_sampler_view_reference(&src_view, NULL); } -/* For MSAA integer resolving to work, we change the format to NORM using this function. */ -static enum pipe_format int_to_norm_format(enum pipe_format format) -{ - switch (format) { -#define REPLACE_FORMAT_SIGN(format,sign) \ - case PIPE_FORMAT_##format##_##sign##INT: \ - return PIPE_FORMAT_##format##_##sign##NORM -#define REPLACE_FORMAT(format) \ - REPLACE_FORMAT_SIGN(format, U); \ - REPLACE_FORMAT_SIGN(format, S) - - REPLACE_FORMAT_SIGN(B10G10R10A2, U); - REPLACE_FORMAT(R8); - REPLACE_FORMAT(R8G8); - REPLACE_FORMAT(R8G8B8X8); - REPLACE_FORMAT(R8G8B8A8); - REPLACE_FORMAT(A8); - REPLACE_FORMAT(I8); - REPLACE_FORMAT(L8); - REPLACE_FORMAT(L8A8); - REPLACE_FORMAT(R16); - REPLACE_FORMAT(R16G16); - REPLACE_FORMAT(R16G16B16X16); - REPLACE_FORMAT(R16G16B16A16); - REPLACE_FORMAT(A16); - REPLACE_FORMAT(I16); - REPLACE_FORMAT(L16); - REPLACE_FORMAT(L16A16); - -#undef REPLACE_FORMAT -#undef REPLACE_FORMAT_SIGN - default: - return format; - } -} - static bool do_hardware_msaa_resolve(struct pipe_context *ctx, const struct pipe_blit_info *info) { @@ -799,19 +759,25 @@ struct r600_texture *dst = (struct r600_texture*)info->dst.resource; unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level); unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level); - enum pipe_format format = int_to_norm_format(info->dst.format); + enum pipe_format format = info->src.format; unsigned sample_mask = rctx->b.chip_class == CAYMAN ? ~0 : ((1ull << MAX2(1, info->src.resource->nr_samples)) - 1); + struct pipe_resource *tmp, templ; + struct pipe_blit_info blit; + + /* Check basic requirements for hw resolve. */ + if (!(info->src.resource->nr_samples > 1 && + info->dst.resource->nr_samples <= 1 && + !util_format_is_pure_integer(format) && + !util_format_is_depth_or_stencil(format) && + util_max_layer(info->src.resource, 0) == 0)) + return false; - if (info->src.resource->nr_samples > 1 && - info->dst.resource->nr_samples <= 1 && - util_max_layer(info->src.resource, 0) == 0 && - util_max_layer(info->dst.resource, info->dst.level) == 0 && + /* Check the remaining requirements for hw resolve. */ + if (util_max_layer(info->dst.resource, info->dst.level) == 0 && util_is_format_compatible(util_format_description(info->src.format), util_format_description(info->dst.format)) && - !util_format_is_pure_integer(format) && - !util_format_is_depth_or_stencil(format) && !info->scissor_enable && (info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA && dst_width == info->src.resource->width0 && @@ -839,18 +805,75 @@ r600_blitter_end(ctx); return true; } - return false; + + /* Shader-based resolve is VERY SLOW. Instead, resolve into + * a temporary texture and blit. + */ + memset(&templ, 0, sizeof(templ)); + templ.target = PIPE_TEXTURE_2D; + templ.format = info->src.resource->format; + templ.width0 = info->src.resource->width0; + templ.height0 = info->src.resource->height0; + templ.depth0 = 1; + templ.array_size = 1; + templ.usage = PIPE_USAGE_DEFAULT; + templ.flags = R600_RESOURCE_FLAG_FORCE_TILING; + + tmp = ctx->screen->resource_create(ctx->screen, &templ); + if (!tmp) + return false; + + /* resolve */ + r600_blitter_begin(ctx, R600_COLOR_RESOLVE | + (info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND)); + util_blitter_custom_resolve_color(rctx->blitter, tmp, 0, 0, + info->src.resource, info->src.box.z, + sample_mask, rctx->custom_blend_resolve, + format); + r600_blitter_end(ctx); + + /* blit */ + blit = *info; + blit.src.resource = tmp; + blit.src.box.z = 0; + + r600_blitter_begin(ctx, R600_BLIT | + (info->render_condition_enable ? 0 : R600_DISABLE_RENDER_COND)); + util_blitter_blit(rctx->blitter, &blit); + r600_blitter_end(ctx); + + pipe_resource_reference(&tmp, NULL); + return true; } static void r600_blit(struct pipe_context *ctx, const struct pipe_blit_info *info) { struct r600_context *rctx = (struct r600_context*)ctx; + struct r600_texture *rdst = (struct r600_texture *)info->dst.resource; if (do_hardware_msaa_resolve(ctx, info)) { return; } + /* Using SDMA for copying to a linear texture in GTT is much faster. + * This improves DRI PRIME performance. + * + * resource_copy_region can't do this yet, because dma_copy calls it + * on failure (recursion). + */ + if (rdst->surface.level[info->dst.level].mode == + RADEON_SURF_MODE_LINEAR_ALIGNED && + rctx->b.dma_copy && + util_can_blit_via_copy_region(info, false)) { + rctx->b.dma_copy(ctx, info->dst.resource, info->dst.level, + info->dst.box.x, info->dst.box.y, + info->dst.box.z, + info->src.resource, info->src.level, + &info->src.box); + return; + } + assert(util_blitter_is_blit_supported(rctx->blitter, info)); /* The driver doesn't decompress resources automatically while diff -Nru mesa-12.0.6/src/gallium/drivers/r600/r600d.h mesa-17.0.7/src/gallium/drivers/r600/r600d.h --- mesa-12.0.6/src/gallium/drivers/r600/r600d.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r600/r600d.h 2017-06-01 10:37:10.000000000 +0000 @@ -96,8 +96,13 @@ #define COPY_DW_DST_IS_MEM (1 << 1) #define PKT3_WAIT_REG_MEM 0x3C #define WAIT_REG_MEM_EQUAL 3 +#define WAIT_REG_MEM_GEQUAL 5 +#define WAIT_REG_MEM_MEMORY (1 << 4) +#define WAIT_REG_MEM_PFP (1 << 8) #define PKT3_MEM_WRITE 0x3D +#define MEM_WRITE_32_BITS (1 << 18) #define PKT3_INDIRECT_BUFFER 0x32 +#define PKT3_PFP_SYNC_ME 0x42 /* EG+ */ #define PKT3_SURFACE_SYNC 0x43 #define PKT3_ME_INITIALIZE 0x44 #define PKT3_COND_WRITE 0x45 diff -Nru mesa-12.0.6/src/gallium/drivers/r600/r600_hw_context.c mesa-17.0.7/src/gallium/drivers/r600/r600_hw_context.c --- mesa-12.0.6/src/gallium/drivers/r600/r600_hw_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r600/r600_hw_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -37,7 +37,8 @@ if (radeon_emitted(ctx->b.dma.cs, 0)) ctx->b.dma.flush(ctx, RADEON_FLUSH_ASYNC, NULL); - if (!ctx->b.ws->cs_memory_below_limit(ctx->b.gfx.cs, ctx->b.vram, ctx->b.gtt)) { + if (!radeon_cs_memory_below_limit(ctx->b.screen, ctx->b.gfx.cs, + ctx->b.vram, ctx->b.gtt)) { ctx->b.gtt = 0; ctx->b.vram = 0; ctx->b.gfx.flush(ctx, RADEON_FLUSH_ASYNC, NULL); @@ -47,9 +48,7 @@ ctx->b.gtt = 0; ctx->b.vram = 0; - /* The number of dwords we already used in the CS so far. */ - num_dw += ctx->b.gfx.cs->cdw; - + /* Check available space in CS. */ if (count_draw_in) { uint64_t mask; @@ -82,7 +81,7 @@ num_dw += 10; /* Flush if there's not enough space. */ - if (num_dw > ctx->b.gfx.cs->max_dw) { + if (!ctx->b.ws->cs_check_space(ctx->b.gfx.cs, num_dw)) { ctx->b.gfx.flush(ctx, RADEON_FLUSH_ASYNC, NULL); } } @@ -97,6 +96,10 @@ return; } + /* Ensure coherency between streamout and shaders. */ + if (rctx->b.flags & R600_CONTEXT_STREAMOUT_FLUSH) + rctx->b.flags |= r600_get_flush_flags(R600_COHERENCY_SHADER); + if (rctx->b.flags & R600_CONTEXT_WAIT_3D_IDLE) { wait_until |= S_008040_WAIT_3D_IDLE(1); } @@ -250,8 +253,12 @@ { struct r600_context *ctx = context; struct radeon_winsys_cs *cs = ctx->b.gfx.cs; + struct radeon_winsys *ws = ctx->b.ws; + + if (!radeon_emitted(cs, ctx->b.initial_gfx_cs_size)) + return; - if (!radeon_emitted(cs, ctx->b.initial_gfx_cs_size) && !fence) + if (r600_check_device_reset(&ctx->b)) return; r600_preflush_suspend_features(&ctx->b); @@ -272,11 +279,11 @@ radeon_set_context_reg(cs, R_028350_SX_MISC, 0); } - /* force to keep tiling flags */ - flags |= RADEON_FLUSH_KEEP_TILING_FLAGS; - /* Flush the CS. */ - ctx->b.ws->cs_flush(cs, flags, fence); + ws->cs_flush(cs, flags, &ctx->b.last_gfx_fence); + if (fence) + ws->fence_reference(fence, ctx->b.last_gfx_fence); + ctx->b.num_gfx_cs_flushes++; r600_begin_new_cs(ctx); } @@ -363,7 +370,68 @@ ctx->last_primitive_type = -1; ctx->last_start_instance = -1; - ctx->b.initial_gfx_cs_size = ctx->b.gfx.cs->cdw; + assert(!ctx->b.gfx.cs->prev_dw); + ctx->b.initial_gfx_cs_size = ctx->b.gfx.cs->current.cdw; +} + +void r600_emit_pfp_sync_me(struct r600_context *rctx) +{ + struct radeon_winsys_cs *cs = rctx->b.gfx.cs; + + if (rctx->b.chip_class >= EVERGREEN && + rctx->b.screen->info.drm_minor >= 46) { + radeon_emit(cs, PKT3(PKT3_PFP_SYNC_ME, 0, 0)); + radeon_emit(cs, 0); + } else { + /* Emulate PFP_SYNC_ME by writing a value to memory in ME and + * waiting for it in PFP. + */ + struct r600_resource *buf = NULL; + unsigned offset, reloc; + uint64_t va; + + /* 16-byte address alignment is required by WAIT_REG_MEM. */ + u_suballocator_alloc(rctx->b.allocator_zeroed_memory, 4, 16, + &offset, (struct pipe_resource**)&buf); + if (!buf) { + /* This is too heavyweight, but will work. */ + rctx->b.gfx.flush(rctx, RADEON_FLUSH_ASYNC, NULL); + return; + } + + reloc = radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, buf, + RADEON_USAGE_READWRITE, + RADEON_PRIO_FENCE); + + va = buf->gpu_address + offset; + assert(va % 16 == 0); + + /* Write 1 to memory in ME. */ + radeon_emit(cs, PKT3(PKT3_MEM_WRITE, 3, 0)); + radeon_emit(cs, va); + radeon_emit(cs, ((va >> 32) & 0xff) | MEM_WRITE_32_BITS); + radeon_emit(cs, 1); + radeon_emit(cs, 0); + + radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); + radeon_emit(cs, reloc); + + /* Wait in PFP (PFP can only do GEQUAL against memory). */ + radeon_emit(cs, PKT3(PKT3_WAIT_REG_MEM, 5, 0)); + radeon_emit(cs, WAIT_REG_MEM_GEQUAL | + WAIT_REG_MEM_MEMORY | + WAIT_REG_MEM_PFP); + radeon_emit(cs, va); + radeon_emit(cs, va >> 32); + radeon_emit(cs, 1); /* reference value */ + radeon_emit(cs, 0xffffffff); /* mask */ + radeon_emit(cs, 4); /* poll interval */ + + radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); + radeon_emit(cs, reloc); + + r600_resource_reference(&buf, NULL); + } } /* The max number of bytes to copy per packet. */ @@ -389,15 +457,7 @@ src_offset += r600_resource(src)->gpu_address; /* Flush the caches where the resources are bound. */ - rctx->b.flags |= R600_CONTEXT_INV_CONST_CACHE | - R600_CONTEXT_INV_VERTEX_CACHE | - R600_CONTEXT_INV_TEX_CACHE | - R600_CONTEXT_FLUSH_AND_INV | - R600_CONTEXT_FLUSH_AND_INV_CB | - R600_CONTEXT_FLUSH_AND_INV_DB | - R600_CONTEXT_FLUSH_AND_INV_CB_META | - R600_CONTEXT_FLUSH_AND_INV_DB_META | - R600_CONTEXT_STREAMOUT_FLUSH | + rctx->b.flags |= r600_get_flush_flags(R600_COHERENCY_SHADER) | R600_CONTEXT_WAIT_3D_IDLE; /* There are differences between R700 and EG in CP DMA, @@ -407,7 +467,9 @@ unsigned byte_count = MIN2(size, CP_DMA_MAX_BYTE_COUNT); unsigned src_reloc, dst_reloc; - r600_need_cs_space(rctx, 10 + (rctx->b.flags ? R600_MAX_FLUSH_CS_DWORDS : 0), FALSE); + r600_need_cs_space(rctx, + 10 + (rctx->b.flags ? R600_MAX_FLUSH_CS_DWORDS : 0) + + 3 + R600_MAX_PFP_SYNC_ME_DWORDS, FALSE); /* Flush the caches for the first copy only. */ if (rctx->b.flags) { @@ -442,10 +504,17 @@ dst_offset += byte_count; } - /* Invalidate the read caches. */ - rctx->b.flags |= R600_CONTEXT_INV_CONST_CACHE | - R600_CONTEXT_INV_VERTEX_CACHE | - R600_CONTEXT_INV_TEX_CACHE; + /* CP_DMA_CP_SYNC doesn't wait for idle on R6xx, but this does. */ + if (rctx->b.chip_class == R600) + radeon_set_config_reg(cs, R_008040_WAIT_UNTIL, + S_008040_WAIT_CP_DMA_IDLE(1)); + + /* CP DMA is executed in ME, but index buffers are read by PFP. + * This ensures that ME (CP DMA) is idle before PFP starts fetching + * indices. If we wanted to execute CP DMA in PFP, this packet + * should precede it. + */ + r600_emit_pfp_sync_me(rctx); } void r600_dma_copy_buffer(struct r600_context *rctx, @@ -486,5 +555,4 @@ src_offset += csize << 2; size -= csize; } - r600_dma_emit_wait_idle(&rctx->b); } diff -Nru mesa-12.0.6/src/gallium/drivers/r600/r600_pipe.c mesa-17.0.7/src/gallium/drivers/r600/r600_pipe.c --- mesa-12.0.6/src/gallium/drivers/r600/r600_pipe.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r600/r600_pipe.c 2017-06-01 10:37:10.000000000 +0000 @@ -71,8 +71,8 @@ r600_sb_context_destroy(rctx->sb_context); - pipe_resource_reference((struct pipe_resource**)&rctx->dummy_cmask, NULL); - pipe_resource_reference((struct pipe_resource**)&rctx->dummy_fmask, NULL); + r600_resource_reference(&rctx->dummy_cmask, NULL); + r600_resource_reference(&rctx->dummy_fmask, NULL); for (sh = 0; sh < PIPE_SHADER_TYPES; sh++) { rctx->b.b.set_constant_buffer(&rctx->b.b, sh, R600_BUFFER_INFO_CONST_BUFFER, NULL); @@ -129,10 +129,11 @@ rctx->b.b.destroy = r600_destroy_context; rctx->b.set_atom_dirty = (void *)r600_set_atom_dirty; - if (!r600_common_context_init(&rctx->b, &rscreen->b)) + if (!r600_common_context_init(&rctx->b, &rscreen->b, flags)) goto fail; rctx->screen = rscreen; + LIST_INITHEAD(&rctx->texture_buffers); r600_init_blit_functions(rctx); @@ -187,7 +188,7 @@ r600_context_gfx_flush, rctx); rctx->b.gfx.flush = r600_context_gfx_flush; - rctx->allocator_fetch_shader = u_suballocator_create(&rctx->b.b, 64 * 1024, 256, + rctx->allocator_fetch_shader = u_suballocator_create(&rctx->b.b, 64 * 1024, 0, PIPE_USAGE_DEFAULT, FALSE); if (!rctx->allocator_fetch_shader) goto fail; @@ -234,6 +235,7 @@ /* Supported features (boolean caps). */ case PIPE_CAP_NPOT_TEXTURES: case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES: + case PIPE_CAP_MIXED_COLOR_DEPTH_BITS: case PIPE_CAP_TWO_SIDED_STENCIL: case PIPE_CAP_ANISOTROPIC_FILTER: case PIPE_CAP_POINT_SPRITE: @@ -282,6 +284,8 @@ case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS: case PIPE_CAP_QUERY_MEMORY_INFO: case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT: + case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED: + case PIPE_CAP_CLEAR_TEXTURE: return 1; case PIPE_CAP_DEVICE_RESET_STATUS_QUERY: @@ -300,7 +304,7 @@ return 0; case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE: - return MIN2(rscreen->b.info.vram_size, 0xFFFFFFFF); + return MIN2(rscreen->b.info.max_alloc_size, INT_MAX); case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT: return R600_MAP_BUFFER_ALIGNMENT; @@ -332,6 +336,7 @@ case PIPE_CAP_TEXTURE_QUERY_LOD: case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE: case PIPE_CAP_SAMPLER_VIEW_TARGET: + case PIPE_CAP_TGSI_PACK_HALF_FLOAT: return family >= CHIP_CEDAR ? 1 : 0; case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS: return family >= CHIP_CEDAR ? 4 : 0; @@ -354,9 +359,7 @@ case PIPE_CAP_DEPTH_BOUNDS_TEST: case PIPE_CAP_FORCE_PERSAMPLE_INTERP: case PIPE_CAP_SHAREABLE_SHADERS: - case PIPE_CAP_CLEAR_TEXTURE: case PIPE_CAP_DRAW_PARAMETERS: - case PIPE_CAP_TGSI_PACK_HALF_FLOAT: case PIPE_CAP_MULTI_DRAW_INDIRECT: case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS: case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL: @@ -368,6 +371,13 @@ case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR: case PIPE_CAP_CULL_DISTANCE: case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES: + case PIPE_CAP_TGSI_VOTE: + case PIPE_CAP_MAX_WINDOW_RECTANGLES: + case PIPE_CAP_TGSI_ARRAY_COMPONENTS: + case PIPE_CAP_TGSI_CAN_READ_OUTPUTS: + case PIPE_CAP_NATIVE_FENCE_FD: + case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY: + case PIPE_CAP_TGSI_FS_FBFETCH: return 0; case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS: @@ -379,6 +389,7 @@ case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS: return rscreen->b.has_streamout ? 4 : 0; case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME: + case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS: return rscreen->b.has_streamout ? 1 : 0; case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS: case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS: @@ -416,6 +427,8 @@ case PIPE_CAP_MAX_VIEWPORTS: return R600_MAX_VIEWPORTS; + case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS: + return 8; /* Timer queries, present when the clock frequency is non zero. */ case PIPE_CAP_QUERY_TIME_ELAPSED: @@ -506,7 +519,7 @@ pscreen->get_compute_param(pscreen, PIPE_SHADER_IR_TGSI, PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE, &max_const_buffer_size); - return max_const_buffer_size; + return MIN2(max_const_buffer_size, INT_MAX); } else { return R600_MAX_CONST_BUFFER_SIZE; @@ -540,16 +553,19 @@ } case PIPE_SHADER_CAP_SUPPORTED_IRS: return 0; + case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED: case PIPE_SHADER_CAP_DOUBLES: - if (rscreen->b.family == CHIP_CYPRESS || - rscreen->b.family == CHIP_CAYMAN || rscreen->b.family == CHIP_ARUBA) + if (rscreen->b.family == CHIP_ARUBA || + rscreen->b.family == CHIP_CAYMAN || + rscreen->b.family == CHIP_CYPRESS || + rscreen->b.family == CHIP_HEMLOCK) return 1; return 0; case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED: case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED: - case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED: case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: + case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: return 0; case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: /* due to a bug in the shader compiler, some loops hang @@ -672,6 +688,12 @@ rscreen->b.has_cp_dma = rscreen->b.info.drm_minor >= 27 && !(rscreen->b.debug_flags & DBG_NO_CP_DMA); + rscreen->b.barrier_flags.cp_to_L2 = + R600_CONTEXT_INV_VERTEX_CACHE | + R600_CONTEXT_INV_TEX_CACHE | + R600_CONTEXT_INV_CONST_CACHE; + rscreen->b.barrier_flags.compute_to_L2 = R600_CONTEXT_PS_PARTIAL_FLUSH; + rscreen->global_pool = compute_memory_pool_new(rscreen); /* Create the auxiliary context. This must be done last. */ diff -Nru mesa-12.0.6/src/gallium/drivers/r600/r600_pipe.h mesa-17.0.7/src/gallium/drivers/r600/r600_pipe.h --- mesa-12.0.6/src/gallium/drivers/r600/r600_pipe.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r600/r600_pipe.h 2017-06-01 10:37:10.000000000 +0000 @@ -57,6 +57,7 @@ /* the number of CS dwords for flushing and drawing */ #define R600_MAX_FLUSH_CS_DWORDS 18 #define R600_MAX_DRAW_CS_DWORDS 58 +#define R600_MAX_PFP_SYNC_ME_DWORDS 16 #define R600_MAX_USER_CONST_BUFFERS 13 #define R600_MAX_DRIVER_CONST_BUFFERS 3 @@ -272,6 +273,7 @@ float offset_units; float offset_scale; bool offset_enable; + bool offset_units_unscaled; bool scissor_enable; bool multisample_enable; bool clip_halfz; @@ -282,6 +284,7 @@ enum pipe_format zs_format; float offset_units; float offset_scale; + bool offset_units_unscaled; }; struct r600_blend_state { @@ -498,6 +501,11 @@ unsigned zwritemask; int ps_iter_samples; + /* The list of all texture buffer objects in this context. + * This list is walked when a buffer is invalidated/reallocated and + * the GPU addresses are updated. */ + struct list_head texture_buffers; + /* Index buffer. */ struct pipe_index_buffer index_buffer; @@ -519,9 +527,9 @@ static inline void r600_emit_command_buffer(struct radeon_winsys_cs *cs, struct r600_command_buffer *cb) { - assert(cs->cdw + cb->num_dw <= cs->max_dw); - memcpy(cs->buf + cs->cdw, cb->buf, 4 * cb->num_dw); - cs->cdw += cb->num_dw; + assert(cs->current.cdw + cb->num_dw <= cs->current.max_dw); + memcpy(cs->current.buf + cs->current.cdw, cb->buf, 4 * cb->num_dw); + cs->current.cdw += cb->num_dw; } static inline void r600_set_atom_dirty(struct r600_context *rctx, @@ -664,13 +672,15 @@ void r600_begin_new_cs(struct r600_context *ctx); void r600_flush_emit(struct r600_context *ctx); void r600_need_cs_space(struct r600_context *ctx, unsigned num_dw, boolean count_draw_in); +void r600_emit_pfp_sync_me(struct r600_context *rctx); void r600_cp_dma_copy_buffer(struct r600_context *rctx, struct pipe_resource *dst, uint64_t dst_offset, struct pipe_resource *src, uint64_t src_offset, unsigned size); void evergreen_cp_dma_clear_buffer(struct r600_context *rctx, struct pipe_resource *dst, uint64_t offset, - unsigned size, uint32_t clear_value); + unsigned size, uint32_t clear_value, + enum r600_coherency coher); void r600_dma_copy_buffer(struct r600_context *rctx, struct pipe_resource *dst, struct pipe_resource *src, @@ -875,13 +885,13 @@ { radeon_set_context_reg_seq(cs, reg, num); /* Set the compute bit on the packet header */ - cs->buf[cs->cdw - 2] |= RADEON_CP_PACKET3_COMPUTE_MODE; + cs->current.buf[cs->current.cdw - 2] |= RADEON_CP_PACKET3_COMPUTE_MODE; } static inline void radeon_set_ctl_const_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num) { assert(reg >= R600_CTL_CONST_OFFSET); - assert(cs->cdw+2+num <= cs->max_dw); + assert(cs->current.cdw + 2 + num <= cs->current.max_dw); radeon_emit(cs, PKT3(PKT3_SET_CTL_CONST, num, 0)); radeon_emit(cs, (reg - R600_CTL_CONST_OFFSET) >> 2); } @@ -922,12 +932,21 @@ x >= 4096 ? 0xffff : x * 16; } -/* Return if the depth format can be read without the DB->CB copy on r6xx-r7xx. */ -static inline bool r600_can_read_depth(struct r600_texture *rtex) +static inline unsigned r600_get_flush_flags(enum r600_coherency coher) { - return rtex->resource.b.b.nr_samples <= 1 && - (rtex->resource.b.b.format == PIPE_FORMAT_Z16_UNORM || - rtex->resource.b.b.format == PIPE_FORMAT_Z32_FLOAT); + switch (coher) { + default: + case R600_COHERENCY_NONE: + return 0; + case R600_COHERENCY_SHADER: + return R600_CONTEXT_INV_CONST_CACHE | + R600_CONTEXT_INV_VERTEX_CACHE | + R600_CONTEXT_INV_TEX_CACHE | + R600_CONTEXT_STREAMOUT_FLUSH; + case R600_COHERENCY_CB_META: + return R600_CONTEXT_FLUSH_AND_INV_CB | + R600_CONTEXT_FLUSH_AND_INV_CB_META; + } } #define V_028A6C_OUTPRIM_TYPE_POINTLIST 0 diff -Nru mesa-12.0.6/src/gallium/drivers/r600/r600_shader.c mesa-17.0.7/src/gallium/drivers/r600/r600_shader.c --- mesa-12.0.6/src/gallium/drivers/r600/r600_shader.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r600/r600_shader.c 2017-06-01 10:37:10.000000000 +0000 @@ -33,6 +33,7 @@ #include "tgsi/tgsi_parse.h" #include "tgsi/tgsi_scan.h" #include "tgsi/tgsi_dump.h" +#include "util/u_bitcast.h" #include "util/u_memory.h" #include "util/u_math.h" #include @@ -136,7 +137,7 @@ if (shader->bo == NULL) { shader->bo = (struct r600_resource*) - pipe_buffer_create(ctx->screen, PIPE_BIND_CUSTOM, PIPE_USAGE_IMMUTABLE, shader->shader.bc.ndw * 4); + pipe_buffer_create(ctx->screen, 0, PIPE_USAGE_IMMUTABLE, shader->shader.bc.ndw * 4); if (shader->bo == NULL) { return -ENOMEM; } @@ -288,7 +289,7 @@ void r600_pipe_shader_destroy(struct pipe_context *ctx, struct r600_pipe_shader *shader) { - pipe_resource_reference((struct pipe_resource**)&shader->bo, NULL); + r600_resource_reference(&shader->bo, NULL); r600_bytecode_clear(&shader->shader.bc); r600_release_command_buffer(&shader->command_buffer); } @@ -2923,7 +2924,7 @@ struct pipe_stream_output_info so = pipeshader->selector->so; struct tgsi_full_immediate *immediate; struct r600_shader_ctx ctx; - struct r600_bytecode_output output[32]; + struct r600_bytecode_output output[ARRAY_SIZE(shader->output)]; unsigned output_done, noutput; unsigned opcode; int i, j, k, r = 0; @@ -3803,9 +3804,6 @@ /* handle some special cases */ if (i == 1 || i == 3) { switch (ctx->parse.FullToken.FullInstruction.Instruction.Opcode) { - case TGSI_OPCODE_SUB: - r600_bytecode_src_toggle_neg(&alu.src[1]); - break; case TGSI_OPCODE_DABS: r600_bytecode_src_set_abs(&alu.src[0]); break; @@ -3930,17 +3928,6 @@ r600_bytecode_src(&alu.src[0], &ctx->src[1], i); r600_bytecode_src(&alu.src[1], &ctx->src[0], i); } - /* handle some special cases */ - switch (inst->Instruction.Opcode) { - case TGSI_OPCODE_SUB: - r600_bytecode_src_toggle_neg(&alu.src[1]); - break; - case TGSI_OPCODE_ABS: - r600_bytecode_src_set_abs(&alu.src[0]); - break; - default: - break; - } if (i == lasti || trans_only) { alu.last = 1; } @@ -4198,42 +4185,64 @@ return 0; } -static int cayman_emit_double_instr(struct r600_shader_ctx *ctx) +static int cayman_emit_unary_double_raw(struct r600_bytecode *bc, + unsigned op, + int dst_reg, + struct r600_shader_src *src, + bool abs) { - struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction; - int i, r; struct r600_bytecode_alu alu; - int last_slot = 3; - int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask); - int t1 = ctx->temp_reg; + const int last_slot = 3; + int r; /* these have to write the result to X/Y by the looks of it */ - for (i = 0 ; i < last_slot; i++) { + for (int i = 0 ; i < last_slot; i++) { memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.op = ctx->inst_info->op; - - /* should only be one src regs */ - assert (inst->Instruction.NumSrcRegs == 1); + alu.op = op; - r600_bytecode_src(&alu.src[0], &ctx->src[0], 1); - r600_bytecode_src(&alu.src[1], &ctx->src[0], 0); + r600_bytecode_src(&alu.src[0], src, 1); + r600_bytecode_src(&alu.src[1], src, 0); - /* RSQ should take the absolute value of src */ - if (ctx->parse.FullToken.FullInstruction.Instruction.Opcode == TGSI_OPCODE_DRSQ || - ctx->parse.FullToken.FullInstruction.Instruction.Opcode == TGSI_OPCODE_DSQRT) { + if (abs) r600_bytecode_src_set_abs(&alu.src[1]); - } - alu.dst.sel = t1; + + alu.dst.sel = dst_reg; alu.dst.chan = i; alu.dst.write = (i == 0 || i == 1); - if (ctx->bc->chip_class != CAYMAN || i == last_slot - 1) + if (bc->chip_class != CAYMAN || i == last_slot - 1) alu.last = 1; - r = r600_bytecode_add_alu(ctx->bc, &alu); + r = r600_bytecode_add_alu(bc, &alu); if (r) return r; } + return 0; +} + +static int cayman_emit_double_instr(struct r600_shader_ctx *ctx) +{ + struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction; + int i, r; + struct r600_bytecode_alu alu; + int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask); + int t1 = ctx->temp_reg; + + /* should only be one src regs */ + assert(inst->Instruction.NumSrcRegs == 1); + + /* only support one double at a time */ + assert(inst->Dst[0].Register.WriteMask == TGSI_WRITEMASK_XY || + inst->Dst[0].Register.WriteMask == TGSI_WRITEMASK_ZW); + + r = cayman_emit_unary_double_raw( + ctx->bc, ctx->inst_info->op, t1, + &ctx->src[0], + ctx->parse.FullToken.FullInstruction.Instruction.Opcode == TGSI_OPCODE_DRSQ || + ctx->parse.FullToken.FullInstruction.Instruction.Opcode == TGSI_OPCODE_DSQRT); + if (r) + return r; + for (i = 0 ; i <= lasti; i++) { if (!(inst->Dst[0].Register.WriteMask & (1 << i))) continue; @@ -4339,25 +4348,27 @@ int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask); int t1 = ctx->temp_reg; - for (k = 0; k < 2; k++) { - if (!(inst->Dst[0].Register.WriteMask & (0x3 << (k * 2)))) - continue; + /* t1 would get overwritten below if we actually tried to + * multiply two pairs of doubles at a time. */ + assert(inst->Dst[0].Register.WriteMask == TGSI_WRITEMASK_XY || + inst->Dst[0].Register.WriteMask == TGSI_WRITEMASK_ZW); - for (i = 0; i < 4; i++) { - memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - alu.op = ctx->inst_info->op; - for (j = 0; j < inst->Instruction.NumSrcRegs; j++) { - r600_bytecode_src(&alu.src[j], &ctx->src[j], k * 2 + ((i == 3) ? 0 : 1)); - } - alu.dst.sel = t1; - alu.dst.chan = i; - alu.dst.write = 1; - if (i == 3) - alu.last = 1; - r = r600_bytecode_add_alu(ctx->bc, &alu); - if (r) - return r; + k = inst->Dst[0].Register.WriteMask == TGSI_WRITEMASK_XY ? 0 : 1; + + for (i = 0; i < 4; i++) { + memset(&alu, 0, sizeof(struct r600_bytecode_alu)); + alu.op = ctx->inst_info->op; + for (j = 0; j < inst->Instruction.NumSrcRegs; j++) { + r600_bytecode_src(&alu.src[j], &ctx->src[j], k * 2 + ((i == 3) ? 0 : 1)); } + alu.dst.sel = t1; + alu.dst.chan = i; + alu.dst.write = 1; + if (i == 3) + alu.last = 1; + r = r600_bytecode_add_alu(ctx->bc, &alu); + if (r) + return r; } for (i = 0; i <= lasti; i++) { @@ -4380,16 +4391,69 @@ } /* + * Emit RECIP_64 + MUL_64 to implement division. + */ +static int cayman_ddiv_instr(struct r600_shader_ctx *ctx) +{ + struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction; + int r; + struct r600_bytecode_alu alu; + int t1 = ctx->temp_reg; + int k; + + /* Only support one double at a time. This is the same constraint as + * in DMUL lowering. */ + assert(inst->Dst[0].Register.WriteMask == TGSI_WRITEMASK_XY || + inst->Dst[0].Register.WriteMask == TGSI_WRITEMASK_ZW); + + k = inst->Dst[0].Register.WriteMask == TGSI_WRITEMASK_XY ? 0 : 1; + + r = cayman_emit_unary_double_raw(ctx->bc, ALU_OP2_RECIP_64, t1, &ctx->src[1], false); + if (r) + return r; + + for (int i = 0; i < 4; i++) { + memset(&alu, 0, sizeof(struct r600_bytecode_alu)); + alu.op = ALU_OP2_MUL_64; + + r600_bytecode_src(&alu.src[0], &ctx->src[0], k * 2 + ((i == 3) ? 0 : 1)); + + alu.src[1].sel = t1; + alu.src[1].chan = (i == 3) ? 0 : 1; + + alu.dst.sel = t1; + alu.dst.chan = i; + alu.dst.write = 1; + if (i == 3) + alu.last = 1; + r = r600_bytecode_add_alu(ctx->bc, &alu); + if (r) + return r; + } + + for (int i = 0; i < 2; i++) { + memset(&alu, 0, sizeof(struct r600_bytecode_alu)); + alu.op = ALU_OP1_MOV; + alu.src[0].sel = t1; + alu.src[0].chan = i; + tgsi_dst(ctx, &inst->Dst[0], k * 2 + i, &alu.dst); + alu.dst.write = 1; + if (i == 1) + alu.last = 1; + r = r600_bytecode_add_alu(ctx->bc, &alu); + if (r) + return r; + } + return 0; +} + +/* * r600 - trunc to -PI..PI range * r700 - normalize by dividing by 2PI * see fdo bug 27901 */ static int tgsi_setup_trig(struct r600_shader_ctx *ctx) { - static float half_inv_pi = 1.0 /(3.1415926535 * 2); - static float double_pi = 3.1415926535 * 2; - static float neg_pi = -3.1415926535; - int r; struct r600_bytecode_alu alu; @@ -4405,7 +4469,7 @@ alu.src[1].sel = V_SQ_ALU_SRC_LITERAL; alu.src[1].chan = 0; - alu.src[1].value = *(uint32_t *)&half_inv_pi; + alu.src[1].value = u_bitcast_f2u(0.5f * M_1_PI); alu.src[2].sel = V_SQ_ALU_SRC_0_5; alu.src[2].chan = 0; alu.last = 1; @@ -4444,8 +4508,8 @@ alu.src[2].chan = 0; if (ctx->bc->chip_class == R600) { - alu.src[1].value = *(uint32_t *)&double_pi; - alu.src[2].value = *(uint32_t *)&neg_pi; + alu.src[1].value = u_bitcast_f2u(2.0f * M_PI); + alu.src[2].value = u_bitcast_f2u(-M_PI); } else { alu.src[1].sel = V_SQ_ALU_SRC_1; alu.src[2].sel = V_SQ_ALU_SRC_0_5; @@ -6704,7 +6768,6 @@ static int tgsi_tex(struct r600_shader_ctx *ctx) { - static float one_point_five = 1.5f; struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction; struct r600_bytecode_tex tex; struct r600_bytecode_alu alu; @@ -6906,7 +6969,7 @@ alu.src[2].sel = V_SQ_ALU_SRC_LITERAL; alu.src[2].chan = 0; - alu.src[2].value = *(uint32_t *)&one_point_five; + alu.src[2].value = u_bitcast_f2u(1.5f); alu.dst.sel = ctx->temp_reg; alu.dst.chan = 0; @@ -6927,7 +6990,7 @@ alu.src[2].sel = V_SQ_ALU_SRC_LITERAL; alu.src[2].chan = 0; - alu.src[2].value = *(uint32_t *)&one_point_five; + alu.src[2].value = u_bitcast_f2u(1.5f); alu.dst.sel = ctx->temp_reg; alu.dst.chan = 1; @@ -6961,7 +7024,6 @@ inst->Texture.Texture == TGSI_TEXTURE_SHADOWCUBE_ARRAY) { if (ctx->bc->chip_class >= EVERGREEN) { int mytmp = r600_get_temp(ctx); - static const float eight = 8.0f; memset(&alu, 0, sizeof(struct r600_bytecode_alu)); alu.op = ALU_OP1_MOV; alu.src[0].sel = ctx->temp_reg; @@ -6981,7 +7043,7 @@ r600_bytecode_src(&alu.src[0], &ctx->src[0], 3); alu.src[1].sel = V_SQ_ALU_SRC_LITERAL; alu.src[1].chan = 0; - alu.src[1].value = *(uint32_t *)&eight; + alu.src[1].value = u_bitcast_f2u(8.0f); alu.src[2].sel = mytmp; alu.src[2].chan = 0; alu.dst.sel = ctx->temp_reg; @@ -8891,6 +8953,105 @@ return 0; } +static int tgsi_pk2h(struct r600_shader_ctx *ctx) +{ + struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction; + struct r600_bytecode_alu alu; + int r, i; + int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask); + + /* temp.xy = f32_to_f16(src) */ + memset(&alu, 0, sizeof(struct r600_bytecode_alu)); + alu.op = ALU_OP1_FLT32_TO_FLT16; + alu.dst.chan = 0; + alu.dst.sel = ctx->temp_reg; + alu.dst.write = 1; + r600_bytecode_src(&alu.src[0], &ctx->src[0], 0); + r = r600_bytecode_add_alu(ctx->bc, &alu); + if (r) + return r; + alu.dst.chan = 1; + r600_bytecode_src(&alu.src[0], &ctx->src[0], 1); + alu.last = 1; + r = r600_bytecode_add_alu(ctx->bc, &alu); + if (r) + return r; + + /* dst.x = temp.y * 0x10000 + temp.x */ + for (i = 0; i < lasti + 1; i++) { + if (!(inst->Dst[0].Register.WriteMask & (1 << i))) + continue; + + memset(&alu, 0, sizeof(struct r600_bytecode_alu)); + alu.op = ALU_OP3_MULADD_UINT24; + alu.is_op3 = 1; + tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst); + alu.last = i == lasti; + alu.src[0].sel = ctx->temp_reg; + alu.src[0].chan = 1; + alu.src[1].sel = V_SQ_ALU_SRC_LITERAL; + alu.src[1].value = 0x10000; + alu.src[2].sel = ctx->temp_reg; + alu.src[2].chan = 0; + r = r600_bytecode_add_alu(ctx->bc, &alu); + if (r) + return r; + } + + return 0; +} + +static int tgsi_up2h(struct r600_shader_ctx *ctx) +{ + struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction; + struct r600_bytecode_alu alu; + int r, i; + int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask); + + /* temp.x = src.x */ + /* note: no need to mask out the high bits */ + memset(&alu, 0, sizeof(struct r600_bytecode_alu)); + alu.op = ALU_OP1_MOV; + alu.dst.chan = 0; + alu.dst.sel = ctx->temp_reg; + alu.dst.write = 1; + r600_bytecode_src(&alu.src[0], &ctx->src[0], 0); + r = r600_bytecode_add_alu(ctx->bc, &alu); + if (r) + return r; + + /* temp.y = src.x >> 16 */ + memset(&alu, 0, sizeof(struct r600_bytecode_alu)); + alu.op = ALU_OP2_LSHR_INT; + alu.dst.chan = 1; + alu.dst.sel = ctx->temp_reg; + alu.dst.write = 1; + r600_bytecode_src(&alu.src[0], &ctx->src[0], 0); + alu.src[1].sel = V_SQ_ALU_SRC_LITERAL; + alu.src[1].value = 16; + alu.last = 1; + r = r600_bytecode_add_alu(ctx->bc, &alu); + if (r) + return r; + + /* dst.wz = dst.xy = f16_to_f32(temp.xy) */ + for (i = 0; i < lasti + 1; i++) { + if (!(inst->Dst[0].Register.WriteMask & (1 << i))) + continue; + memset(&alu, 0, sizeof(struct r600_bytecode_alu)); + tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst); + alu.op = ALU_OP1_FLT16_TO_FLT32; + alu.src[0].sel = ctx->temp_reg; + alu.src[0].chan = i % 2; + alu.last = i == lasti; + r = r600_bytecode_add_alu(ctx->bc, &alu); + if (r) + return r; + } + + return 0; +} + static const struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = { [TGSI_OPCODE_ARL] = { ALU_OP0_NOP, tgsi_r600_arl}, [TGSI_OPCODE_MOV] = { ALU_OP1_MOV, tgsi_op2}, @@ -8915,7 +9076,6 @@ [TGSI_OPCODE_SLT] = { ALU_OP2_SETGT, tgsi_op2_swap}, [TGSI_OPCODE_SGE] = { ALU_OP2_SETGE, tgsi_op2}, [TGSI_OPCODE_MAD] = { ALU_OP3_MULADD, tgsi_op3}, - [TGSI_OPCODE_SUB] = { ALU_OP2_ADD, tgsi_op2}, [TGSI_OPCODE_LRP] = { ALU_OP0_NOP, tgsi_lrp}, [TGSI_OPCODE_FMA] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_SQRT] = { ALU_OP1_SQRT_IEEE, tgsi_trans_srcx_replicate}, @@ -8931,7 +9091,7 @@ [TGSI_OPCODE_POW] = { ALU_OP0_NOP, tgsi_pow}, [TGSI_OPCODE_XPD] = { ALU_OP0_NOP, tgsi_xpd}, [32] = { ALU_OP0_NOP, tgsi_unsupported}, - [TGSI_OPCODE_ABS] = { ALU_OP1_MOV, tgsi_op2}, + [33] = { ALU_OP0_NOP, tgsi_unsupported}, [34] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_DPH] = { ALU_OP2_DOT4, tgsi_dp}, [TGSI_OPCODE_COS] = { ALU_OP1_COS, tgsi_trig}, @@ -9003,20 +9163,20 @@ [TGSI_OPCODE_ENDSUB] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_TXQ_LZ] = { FETCH_OP_GET_TEXTURE_RESINFO, tgsi_tex}, [TGSI_OPCODE_TXQS] = { FETCH_OP_GET_NUMBER_OF_SAMPLES, tgsi_tex}, - [105] = { ALU_OP0_NOP, tgsi_unsupported}, + [TGSI_OPCODE_RESQ] = { ALU_OP0_NOP, tgsi_unsupported}, [106] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_NOP] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_FSEQ] = { ALU_OP2_SETE_DX10, tgsi_op2}, [TGSI_OPCODE_FSGE] = { ALU_OP2_SETGE_DX10, tgsi_op2}, [TGSI_OPCODE_FSLT] = { ALU_OP2_SETGT_DX10, tgsi_op2_swap}, [TGSI_OPCODE_FSNE] = { ALU_OP2_SETNE_DX10, tgsi_op2_swap}, - [112] = { ALU_OP0_NOP, tgsi_unsupported}, + [TGSI_OPCODE_MEMBAR] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_CALLNZ] = { ALU_OP0_NOP, tgsi_unsupported}, [114] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_BREAKC] = { ALU_OP0_NOP, tgsi_loop_breakc}, [TGSI_OPCODE_KILL_IF] = { ALU_OP2_KILLGT, tgsi_kill}, /* conditional kill */ [TGSI_OPCODE_END] = { ALU_OP0_NOP, tgsi_end}, /* aka HALT */ - [118] = { ALU_OP0_NOP, tgsi_unsupported}, + [TGSI_OPCODE_DFMA] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_F2I] = { ALU_OP1_FLT_TO_INT, tgsi_op2_trans}, [TGSI_OPCODE_IDIV] = { ALU_OP0_NOP, tgsi_idiv}, [TGSI_OPCODE_IMAX] = { ALU_OP2_MAX_INT, tgsi_op2}, @@ -9114,9 +9274,8 @@ [TGSI_OPCODE_SLT] = { ALU_OP2_SETGT, tgsi_op2_swap}, [TGSI_OPCODE_SGE] = { ALU_OP2_SETGE, tgsi_op2}, [TGSI_OPCODE_MAD] = { ALU_OP3_MULADD, tgsi_op3}, - [TGSI_OPCODE_SUB] = { ALU_OP2_ADD, tgsi_op2}, [TGSI_OPCODE_LRP] = { ALU_OP0_NOP, tgsi_lrp}, - [TGSI_OPCODE_FMA] = { ALU_OP0_NOP, tgsi_unsupported}, + [TGSI_OPCODE_FMA] = { ALU_OP3_FMA, tgsi_op3}, [TGSI_OPCODE_SQRT] = { ALU_OP1_SQRT_IEEE, tgsi_trans_srcx_replicate}, [TGSI_OPCODE_DP2A] = { ALU_OP0_NOP, tgsi_unsupported}, [22] = { ALU_OP0_NOP, tgsi_unsupported}, @@ -9130,14 +9289,14 @@ [TGSI_OPCODE_POW] = { ALU_OP0_NOP, tgsi_pow}, [TGSI_OPCODE_XPD] = { ALU_OP0_NOP, tgsi_xpd}, [32] = { ALU_OP0_NOP, tgsi_unsupported}, - [TGSI_OPCODE_ABS] = { ALU_OP1_MOV, tgsi_op2}, + [33] = { ALU_OP0_NOP, tgsi_unsupported}, [34] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_DPH] = { ALU_OP2_DOT4, tgsi_dp}, [TGSI_OPCODE_COS] = { ALU_OP1_COS, tgsi_trig}, [TGSI_OPCODE_DDX] = { FETCH_OP_GET_GRADIENTS_H, tgsi_tex}, [TGSI_OPCODE_DDY] = { FETCH_OP_GET_GRADIENTS_V, tgsi_tex}, [TGSI_OPCODE_KILL] = { ALU_OP2_KILLGT, tgsi_kill}, /* unconditional kill */ - [TGSI_OPCODE_PK2H] = { ALU_OP0_NOP, tgsi_unsupported}, + [TGSI_OPCODE_PK2H] = { ALU_OP0_NOP, tgsi_pk2h}, [TGSI_OPCODE_PK2US] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_PK4B] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_PK4UB] = { ALU_OP0_NOP, tgsi_unsupported}, @@ -9152,7 +9311,7 @@ [TGSI_OPCODE_TEX] = { FETCH_OP_SAMPLE, tgsi_tex}, [TGSI_OPCODE_TXD] = { FETCH_OP_SAMPLE_G, tgsi_tex}, [TGSI_OPCODE_TXP] = { FETCH_OP_SAMPLE, tgsi_tex}, - [TGSI_OPCODE_UP2H] = { ALU_OP0_NOP, tgsi_unsupported}, + [TGSI_OPCODE_UP2H] = { ALU_OP0_NOP, tgsi_up2h}, [TGSI_OPCODE_UP2US] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_UP4B] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_UP4UB] = { ALU_OP0_NOP, tgsi_unsupported}, @@ -9202,20 +9361,20 @@ [TGSI_OPCODE_ENDSUB] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_TXQ_LZ] = { FETCH_OP_GET_TEXTURE_RESINFO, tgsi_tex}, [TGSI_OPCODE_TXQS] = { FETCH_OP_GET_NUMBER_OF_SAMPLES, tgsi_tex}, - [105] = { ALU_OP0_NOP, tgsi_unsupported}, + [TGSI_OPCODE_RESQ] = { ALU_OP0_NOP, tgsi_unsupported}, [106] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_NOP] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_FSEQ] = { ALU_OP2_SETE_DX10, tgsi_op2}, [TGSI_OPCODE_FSGE] = { ALU_OP2_SETGE_DX10, tgsi_op2}, [TGSI_OPCODE_FSLT] = { ALU_OP2_SETGT_DX10, tgsi_op2_swap}, [TGSI_OPCODE_FSNE] = { ALU_OP2_SETNE_DX10, tgsi_op2_swap}, - [112] = { ALU_OP0_NOP, tgsi_unsupported}, + [TGSI_OPCODE_MEMBAR] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_CALLNZ] = { ALU_OP0_NOP, tgsi_unsupported}, [114] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_BREAKC] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_KILL_IF] = { ALU_OP2_KILLGT, tgsi_kill}, /* conditional kill */ [TGSI_OPCODE_END] = { ALU_OP0_NOP, tgsi_end}, /* aka HALT */ - [118] = { ALU_OP0_NOP, tgsi_unsupported}, + /* Refer below for TGSI_OPCODE_DFMA */ [TGSI_OPCODE_F2I] = { ALU_OP1_FLT_TO_INT, tgsi_f2i}, [TGSI_OPCODE_IDIV] = { ALU_OP0_NOP, tgsi_idiv}, [TGSI_OPCODE_IMAX] = { ALU_OP2_MAX_INT, tgsi_op2}, @@ -9298,6 +9457,7 @@ [TGSI_OPCODE_DNEG] = { ALU_OP2_ADD_64, tgsi_dneg}, [TGSI_OPCODE_DADD] = { ALU_OP2_ADD_64, tgsi_op2_64}, [TGSI_OPCODE_DMUL] = { ALU_OP2_MUL_64, cayman_mul_double_instr}, + [TGSI_OPCODE_DDIV] = { 0, cayman_ddiv_instr }, [TGSI_OPCODE_DMAX] = { ALU_OP2_MAX_64, tgsi_op2_64}, [TGSI_OPCODE_DMIN] = { ALU_OP2_MIN_64, tgsi_op2_64}, [TGSI_OPCODE_DSLT] = { ALU_OP2_SETGT_64, tgsi_op2_64_single_dest_s}, @@ -9307,6 +9467,7 @@ [TGSI_OPCODE_DRCP] = { ALU_OP2_RECIP_64, cayman_emit_double_instr}, [TGSI_OPCODE_DSQRT] = { ALU_OP2_SQRT_64, cayman_emit_double_instr}, [TGSI_OPCODE_DMAD] = { ALU_OP3_FMA_64, tgsi_op3_64}, + [TGSI_OPCODE_DFMA] = { ALU_OP3_FMA_64, tgsi_op3_64}, [TGSI_OPCODE_DFRAC] = { ALU_OP1_FRACT_64, tgsi_op2_64}, [TGSI_OPCODE_DLDEXP] = { ALU_OP2_LDEXP_64, tgsi_op2_64}, [TGSI_OPCODE_DFRACEXP] = { ALU_OP1_FREXP_64, tgsi_dfracexp}, @@ -9336,9 +9497,8 @@ [TGSI_OPCODE_SLT] = { ALU_OP2_SETGT, tgsi_op2_swap}, [TGSI_OPCODE_SGE] = { ALU_OP2_SETGE, tgsi_op2}, [TGSI_OPCODE_MAD] = { ALU_OP3_MULADD, tgsi_op3}, - [TGSI_OPCODE_SUB] = { ALU_OP2_ADD, tgsi_op2}, [TGSI_OPCODE_LRP] = { ALU_OP0_NOP, tgsi_lrp}, - [TGSI_OPCODE_FMA] = { ALU_OP0_NOP, tgsi_unsupported}, + [TGSI_OPCODE_FMA] = { ALU_OP3_FMA, tgsi_op3}, [TGSI_OPCODE_SQRT] = { ALU_OP1_SQRT_IEEE, cayman_emit_float_instr}, [TGSI_OPCODE_DP2A] = { ALU_OP0_NOP, tgsi_unsupported}, [22] = { ALU_OP0_NOP, tgsi_unsupported}, @@ -9352,14 +9512,14 @@ [TGSI_OPCODE_POW] = { ALU_OP0_NOP, cayman_pow}, [TGSI_OPCODE_XPD] = { ALU_OP0_NOP, tgsi_xpd}, [32] = { ALU_OP0_NOP, tgsi_unsupported}, - [TGSI_OPCODE_ABS] = { ALU_OP1_MOV, tgsi_op2}, + [33] = { ALU_OP0_NOP, tgsi_unsupported}, [34] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_DPH] = { ALU_OP2_DOT4, tgsi_dp}, [TGSI_OPCODE_COS] = { ALU_OP1_COS, cayman_trig}, [TGSI_OPCODE_DDX] = { FETCH_OP_GET_GRADIENTS_H, tgsi_tex}, [TGSI_OPCODE_DDY] = { FETCH_OP_GET_GRADIENTS_V, tgsi_tex}, [TGSI_OPCODE_KILL] = { ALU_OP2_KILLGT, tgsi_kill}, /* unconditional kill */ - [TGSI_OPCODE_PK2H] = { ALU_OP0_NOP, tgsi_unsupported}, + [TGSI_OPCODE_PK2H] = { ALU_OP0_NOP, tgsi_pk2h}, [TGSI_OPCODE_PK2US] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_PK4B] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_PK4UB] = { ALU_OP0_NOP, tgsi_unsupported}, @@ -9374,7 +9534,7 @@ [TGSI_OPCODE_TEX] = { FETCH_OP_SAMPLE, tgsi_tex}, [TGSI_OPCODE_TXD] = { FETCH_OP_SAMPLE_G, tgsi_tex}, [TGSI_OPCODE_TXP] = { FETCH_OP_SAMPLE, tgsi_tex}, - [TGSI_OPCODE_UP2H] = { ALU_OP0_NOP, tgsi_unsupported}, + [TGSI_OPCODE_UP2H] = { ALU_OP0_NOP, tgsi_up2h}, [TGSI_OPCODE_UP2US] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_UP4B] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_UP4UB] = { ALU_OP0_NOP, tgsi_unsupported}, @@ -9424,20 +9584,20 @@ [TGSI_OPCODE_ENDSUB] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_TXQ_LZ] = { FETCH_OP_GET_TEXTURE_RESINFO, tgsi_tex}, [TGSI_OPCODE_TXQS] = { FETCH_OP_GET_NUMBER_OF_SAMPLES, tgsi_tex}, - [105] = { ALU_OP0_NOP, tgsi_unsupported}, + [TGSI_OPCODE_RESQ] = { ALU_OP0_NOP, tgsi_unsupported}, [106] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_NOP] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_FSEQ] = { ALU_OP2_SETE_DX10, tgsi_op2}, [TGSI_OPCODE_FSGE] = { ALU_OP2_SETGE_DX10, tgsi_op2}, [TGSI_OPCODE_FSLT] = { ALU_OP2_SETGT_DX10, tgsi_op2_swap}, [TGSI_OPCODE_FSNE] = { ALU_OP2_SETNE_DX10, tgsi_op2_swap}, - [112] = { ALU_OP0_NOP, tgsi_unsupported}, + [TGSI_OPCODE_MEMBAR] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_CALLNZ] = { ALU_OP0_NOP, tgsi_unsupported}, [114] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_BREAKC] = { ALU_OP0_NOP, tgsi_unsupported}, [TGSI_OPCODE_KILL_IF] = { ALU_OP2_KILLGT, tgsi_kill}, /* conditional kill */ [TGSI_OPCODE_END] = { ALU_OP0_NOP, tgsi_end}, /* aka HALT */ - [118] = { ALU_OP0_NOP, tgsi_unsupported}, + /* Refer below for TGSI_OPCODE_DFMA */ [TGSI_OPCODE_F2I] = { ALU_OP1_FLT_TO_INT, tgsi_op2}, [TGSI_OPCODE_IDIV] = { ALU_OP0_NOP, tgsi_idiv}, [TGSI_OPCODE_IMAX] = { ALU_OP2_MAX_INT, tgsi_op2}, @@ -9520,6 +9680,7 @@ [TGSI_OPCODE_DNEG] = { ALU_OP2_ADD_64, tgsi_dneg}, [TGSI_OPCODE_DADD] = { ALU_OP2_ADD_64, tgsi_op2_64}, [TGSI_OPCODE_DMUL] = { ALU_OP2_MUL_64, cayman_mul_double_instr}, + [TGSI_OPCODE_DDIV] = { 0, cayman_ddiv_instr }, [TGSI_OPCODE_DMAX] = { ALU_OP2_MAX_64, tgsi_op2_64}, [TGSI_OPCODE_DMIN] = { ALU_OP2_MIN_64, tgsi_op2_64}, [TGSI_OPCODE_DSLT] = { ALU_OP2_SETGT_64, tgsi_op2_64_single_dest_s}, @@ -9529,6 +9690,7 @@ [TGSI_OPCODE_DRCP] = { ALU_OP2_RECIP_64, cayman_emit_double_instr}, [TGSI_OPCODE_DSQRT] = { ALU_OP2_SQRT_64, cayman_emit_double_instr}, [TGSI_OPCODE_DMAD] = { ALU_OP3_FMA_64, tgsi_op3_64}, + [TGSI_OPCODE_DFMA] = { ALU_OP3_FMA_64, tgsi_op3_64}, [TGSI_OPCODE_DFRAC] = { ALU_OP1_FRACT_64, tgsi_op2_64}, [TGSI_OPCODE_DLDEXP] = { ALU_OP2_LDEXP_64, tgsi_op2_64}, [TGSI_OPCODE_DFRACEXP] = { ALU_OP1_FREXP_64, tgsi_dfracexp}, diff -Nru mesa-12.0.6/src/gallium/drivers/r600/r600_state.c mesa-17.0.7/src/gallium/drivers/r600/r600_state.c --- mesa-12.0.6/src/gallium/drivers/r600/r600_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r600/r600_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -235,11 +235,6 @@ retval |= PIPE_BIND_VERTEX_BUFFER; } - if (usage & PIPE_BIND_TRANSFER_READ) - retval |= PIPE_BIND_TRANSFER_READ; - if (usage & PIPE_BIND_TRANSFER_WRITE) - retval |= PIPE_BIND_TRANSFER_WRITE; - if ((usage & PIPE_BIND_LINEAR) && !util_format_is_compressed(format) && !(usage & PIPE_BIND_DEPTH_STENCIL)) @@ -254,16 +249,26 @@ struct r600_poly_offset_state *state = (struct r600_poly_offset_state*)a; float offset_units = state->offset_units; float offset_scale = state->offset_scale; + uint32_t pa_su_poly_offset_db_fmt_cntl = 0; - switch (state->zs_format) { - case PIPE_FORMAT_Z24X8_UNORM: - case PIPE_FORMAT_Z24_UNORM_S8_UINT: - offset_units *= 2.0f; - break; - case PIPE_FORMAT_Z16_UNORM: - offset_units *= 4.0f; - break; - default:; + if (!state->offset_units_unscaled) { + switch (state->zs_format) { + case PIPE_FORMAT_Z24X8_UNORM: + case PIPE_FORMAT_Z24_UNORM_S8_UINT: + offset_units *= 2.0f; + pa_su_poly_offset_db_fmt_cntl = + S_028DF8_POLY_OFFSET_NEG_NUM_DB_BITS((char)-24); + break; + case PIPE_FORMAT_Z16_UNORM: + offset_units *= 4.0f; + pa_su_poly_offset_db_fmt_cntl = + S_028DF8_POLY_OFFSET_NEG_NUM_DB_BITS((char)-16); + break; + default: + pa_su_poly_offset_db_fmt_cntl = + S_028DF8_POLY_OFFSET_NEG_NUM_DB_BITS((char)-23) | + S_028DF8_POLY_OFFSET_DB_IS_FLOAT_FMT(1); + } } radeon_set_context_reg_seq(cs, R_028E00_PA_SU_POLY_OFFSET_FRONT_SCALE, 4); @@ -271,6 +276,9 @@ radeon_emit(cs, fui(offset_units)); radeon_emit(cs, fui(offset_scale)); radeon_emit(cs, fui(offset_units)); + + radeon_set_context_reg(cs, R_028DF8_PA_SU_POLY_OFFSET_DB_FMT_CNTL, + pa_su_poly_offset_db_fmt_cntl); } static uint32_t r600_get_blend_control(const struct pipe_blend_state *state, unsigned i) @@ -468,7 +476,6 @@ S_028A0C_LINE_PATTERN(state->line_stipple_pattern) | S_028A0C_REPEAT_COUNT(state->line_stipple_factor) : 0; rs->pa_cl_clip_cntl = - S_028810_PS_UCP_MODE(3) | S_028810_DX_CLIP_SPACE_DEF(state->clip_halfz) | S_028810_ZCLIP_NEAR_DISABLE(!state->depth_clip) | S_028810_ZCLIP_FAR_DISABLE(!state->depth_clip) | @@ -483,6 +490,7 @@ rs->offset_units = state->offset_units; rs->offset_scale = state->offset_scale * 16.0f; rs->offset_enable = state->offset_point || state->offset_line || state->offset_tri; + rs->offset_units_unscaled = state->offset_units_unscaled; if (state->point_size_per_vertex) { psize_min = util_get_min_point_size(state); @@ -619,8 +627,8 @@ struct r600_texture *tmp = (struct r600_texture*)view->base.texture; int stride = util_format_get_blocksize(view->base.format); unsigned format, num_format, format_comp, endian; - uint64_t offset = view->base.u.buf.first_element * stride; - unsigned size = (view->base.u.buf.last_element - view->base.u.buf.first_element + 1) * stride; + uint64_t offset = view->base.u.buf.offset; + unsigned size = view->base.u.buf.size; r600_vertex_data_type(view->base.format, &format, &num_format, &format_comp, @@ -683,7 +691,7 @@ swizzle[3] = state->swizzle_a; if (R600_BIG_ENDIAN) - do_endian_swap = !(tmp->is_depth && !tmp->is_flushing_texture); + do_endian_swap = !tmp->db_compatible; format = r600_translate_texformat(ctx->screen, state->format, swizzle, @@ -694,7 +702,13 @@ return NULL; } - if (tmp->is_depth && !tmp->is_flushing_texture && !r600_can_read_depth(tmp)) { + if (state->format == PIPE_FORMAT_X24S8_UINT || + state->format == PIPE_FORMAT_S8X24_UINT || + state->format == PIPE_FORMAT_X32_S8X24_UINT || + state->format == PIPE_FORMAT_S8_UINT) + view->is_stencil_sampler = true; + + if (tmp->is_depth && !r600_can_sample_zs(tmp, view->is_stencil_sampler)) { if (!r600_init_flushed_depth_texture(ctx, texture, NULL)) { FREE(view); return NULL; @@ -732,12 +746,6 @@ break; } - if (state->format == PIPE_FORMAT_X24S8_UINT || - state->format == PIPE_FORMAT_S8X24_UINT || - state->format == PIPE_FORMAT_X32_S8X24_UINT || - state->format == PIPE_FORMAT_S8_UINT) - view->is_stencil_sampler = true; - view->tex_resource = &tmp->resource; view->tex_resource_words[0] = (S_038000_DIM(r600_tex_dim(texture->target, texture->nr_samples)) | S_038000_TILE_MODE(array_mode) | @@ -748,7 +756,7 @@ S_038004_TEX_DEPTH(depth - 1) | S_038004_DATA_FORMAT(format)); view->tex_resource_words[2] = tmp->surface.level[offset_level].offset >> 8; - if (offset_level >= tmp->surface.last_level) { + if (offset_level >= tmp->resource.b.b.last_level) { view->tex_resource_words[3] = tmp->surface.level[offset_level].offset >> 8; } else { view->tex_resource_words[3] = tmp->surface.level[offset_level + 1].offset >> 8; @@ -794,26 +802,6 @@ { } -static struct r600_resource *r600_buffer_create_helper(struct r600_screen *rscreen, - unsigned size, unsigned alignment) -{ - struct pipe_resource buffer; - - memset(&buffer, 0, sizeof buffer); - buffer.target = PIPE_BUFFER; - buffer.format = PIPE_FORMAT_R8_UNORM; - buffer.bind = PIPE_BIND_CUSTOM; - buffer.usage = PIPE_USAGE_DEFAULT; - buffer.flags = 0; - buffer.width0 = size; - buffer.height0 = 1; - buffer.depth0 = 1; - buffer.array_size = 1; - - return (struct r600_resource*) - r600_buffer_create(&rscreen->b.b, &buffer, alignment); -} - static void r600_init_color_surface(struct r600_context *rctx, struct r600_surface *surf, bool force_cmask_fmask) @@ -830,7 +818,7 @@ int i; bool blend_bypass = 0, blend_clamp = 1, do_endian_swap = FALSE; - if (rtex->is_depth && !rtex->is_flushing_texture && !r600_can_read_depth(rtex)) { + if (rtex->db_compatible && !r600_can_sample_zs(rtex, false)) { r600_init_flushed_depth_texture(&rctx->b.b, surf->base.texture, NULL); rtex = rtex->flushed_depth_texture; assert(rtex); @@ -883,7 +871,7 @@ } if (R600_BIG_ENDIAN) - do_endian_swap = !(rtex->is_depth && !rtex->is_flushing_texture); + do_endian_swap = !rtex->db_compatible; format = r600_translate_colorformat(rctx->b.chip_class, surf->base.format, do_endian_swap); @@ -955,10 +943,8 @@ surf->cb_color_cmask = surf->cb_color_base; surf->cb_color_mask = 0; - pipe_resource_reference((struct pipe_resource**)&surf->cb_buffer_cmask, - &rtex->resource.b.b); - pipe_resource_reference((struct pipe_resource**)&surf->cb_buffer_fmask, - &rtex->resource.b.b); + r600_resource_reference(&surf->cb_buffer_cmask, &rtex->resource); + r600_resource_reference(&surf->cb_buffer_fmask, &rtex->resource); if (rtex->cmask.size) { surf->cb_color_cmask = rtex->cmask.offset >> 8; @@ -991,27 +977,30 @@ struct pipe_transfer *transfer; void *ptr; - pipe_resource_reference((struct pipe_resource**)&rctx->dummy_cmask, NULL); - rctx->dummy_cmask = r600_buffer_create_helper(rscreen, cmask.size, cmask.alignment); + r600_resource_reference(&rctx->dummy_cmask, NULL); + rctx->dummy_cmask = (struct r600_resource*) + r600_aligned_buffer_create(&rscreen->b.b, 0, + PIPE_USAGE_DEFAULT, + cmask.size, cmask.alignment); /* Set the contents to 0xCC. */ ptr = pipe_buffer_map(&rctx->b.b, &rctx->dummy_cmask->b.b, PIPE_TRANSFER_WRITE, &transfer); memset(ptr, 0xCC, cmask.size); pipe_buffer_unmap(&rctx->b.b, transfer); } - pipe_resource_reference((struct pipe_resource**)&surf->cb_buffer_cmask, - &rctx->dummy_cmask->b.b); + r600_resource_reference(&surf->cb_buffer_cmask, rctx->dummy_cmask); /* FMASK. */ if (!rctx->dummy_fmask || rctx->dummy_fmask->b.b.width0 < fmask.size || rctx->dummy_fmask->buf->alignment % fmask.alignment != 0) { - pipe_resource_reference((struct pipe_resource**)&rctx->dummy_fmask, NULL); - rctx->dummy_fmask = r600_buffer_create_helper(rscreen, fmask.size, fmask.alignment); - + r600_resource_reference(&rctx->dummy_fmask, NULL); + rctx->dummy_fmask = (struct r600_resource*) + r600_aligned_buffer_create(&rscreen->b.b, 0, + PIPE_USAGE_DEFAULT, + fmask.size, fmask.alignment); } - pipe_resource_reference((struct pipe_resource**)&surf->cb_buffer_fmask, - &rctx->dummy_fmask->b.b); + r600_resource_reference(&surf->cb_buffer_fmask, rctx->dummy_fmask); /* Init the registers. */ color_info |= S_0280A0_TILE_MODE(V_0280A0_FRAG_ENABLE); @@ -1060,25 +1049,6 @@ surf->db_depth_size = S_028000_PITCH_TILE_MAX(pitch) | S_028000_SLICE_TILE_MAX(slice); surf->db_prefetch_limit = (rtex->surface.level[level].nblk_y / 8) - 1; - switch (surf->base.format) { - case PIPE_FORMAT_Z24X8_UNORM: - case PIPE_FORMAT_Z24_UNORM_S8_UINT: - surf->pa_su_poly_offset_db_fmt_cntl = - S_028DF8_POLY_OFFSET_NEG_NUM_DB_BITS((char)-24); - break; - case PIPE_FORMAT_Z32_FLOAT: - case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT: - surf->pa_su_poly_offset_db_fmt_cntl = - S_028DF8_POLY_OFFSET_NEG_NUM_DB_BITS((char)-23) | - S_028DF8_POLY_OFFSET_DB_IS_FLOAT_FMT(1); - break; - case PIPE_FORMAT_Z16_UNORM: - surf->pa_su_poly_offset_db_fmt_cntl = - S_028DF8_POLY_OFFSET_NEG_NUM_DB_BITS((char)-16); - break; - default:; - } - /* use htile only for first level */ if (rtex->htile_buffer && !level) { surf->db_htile_data_base = 0; @@ -1100,20 +1070,17 @@ struct r600_texture *rtex; unsigned i; - if (rctx->framebuffer.state.nr_cbufs) { - rctx->b.flags |= R600_CONTEXT_WAIT_3D_IDLE | R600_CONTEXT_FLUSH_AND_INV; - rctx->b.flags |= R600_CONTEXT_FLUSH_AND_INV_CB | - R600_CONTEXT_FLUSH_AND_INV_CB_META; - } - if (rctx->framebuffer.state.zsbuf) { - rctx->b.flags |= R600_CONTEXT_WAIT_3D_IDLE | R600_CONTEXT_FLUSH_AND_INV; - rctx->b.flags |= R600_CONTEXT_FLUSH_AND_INV_DB; - - rtex = (struct r600_texture*)rctx->framebuffer.state.zsbuf->texture; - if (rctx->b.chip_class >= R700 && rtex->htile_buffer) { - rctx->b.flags |= R600_CONTEXT_FLUSH_AND_INV_DB_META; - } - } + /* Flush TC when changing the framebuffer state, because the only + * client not using TC that can change textures is the framebuffer. + * Other places don't typically have to flush TC. + */ + rctx->b.flags |= R600_CONTEXT_WAIT_3D_IDLE | + R600_CONTEXT_FLUSH_AND_INV | + R600_CONTEXT_FLUSH_AND_INV_CB | + R600_CONTEXT_FLUSH_AND_INV_CB_META | + R600_CONTEXT_FLUSH_AND_INV_DB | + R600_CONTEXT_FLUSH_AND_INV_DB_META | + R600_CONTEXT_INV_TEX_CACHE; /* Set the new state. */ util_copy_framebuffer_state(&rctx->framebuffer.state, state); @@ -1154,7 +1121,7 @@ rctx->framebuffer.export_16bpc = false; } - if (rtex->fmask.size && rtex->cmask.size) { + if (rtex->fmask.size) { rctx->framebuffer.compressed_cb_mask |= 1 << i; } } @@ -1461,9 +1428,6 @@ RADEON_PRIO_DEPTH_BUFFER_MSAA : RADEON_PRIO_DEPTH_BUFFER); - radeon_set_context_reg(cs, R_028DF8_PA_SU_POLY_OFFSET_DB_FMT_CNTL, - surf->pa_su_poly_offset_db_fmt_cntl); - radeon_set_context_reg_seq(cs, R_028000_DB_DEPTH_SIZE, 2); radeon_emit(cs, surf->db_depth_size); /* R_028000_DB_DEPTH_SIZE */ radeon_emit(cs, surf->db_depth_view); /* R_028004_DB_DEPTH_VIEW */ @@ -1926,7 +1890,7 @@ radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, shader->buffer, RADEON_USAGE_READ, - RADEON_PRIO_INTERNAL_SHADER)); + RADEON_PRIO_SHADER_BINARY)); } static void r600_emit_shader_stages(struct r600_context *rctx, struct r600_atom *a) @@ -1980,7 +1944,7 @@ radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, rbuffer, RADEON_USAGE_READWRITE, - RADEON_PRIO_RINGS_STREAMOUT)); + RADEON_PRIO_SHADER_RINGS)); radeon_set_config_reg(cs, R_008C44_SQ_ESGS_RING_SIZE, state->esgs_ring.buffer_size >> 8); @@ -1989,7 +1953,7 @@ radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, rbuffer, RADEON_USAGE_READWRITE, - RADEON_PRIO_RINGS_STREAMOUT)); + RADEON_PRIO_SHADER_RINGS)); radeon_set_config_reg(cs, R_008C4C_SQ_GSVS_RING_SIZE, state->gsvs_ring.buffer_size >> 8); } else { @@ -2390,12 +2354,6 @@ r600_store_context_reg(cb, R_028820_PA_CL_NANINF_CNTL, 0); r600_store_context_reg(cb, R_028A48_PA_SC_MPASS_PS_CNTL, 0); - r600_store_context_reg_seq(cb, R_0282D0_PA_SC_VPORT_ZMIN_0, 2 * R600_MAX_VIEWPORTS); - for (tmp = 0; tmp < R600_MAX_VIEWPORTS; tmp++) { - r600_store_value(cb, 0); /* R_0282D0_PA_SC_VPORT_ZMIN_0 */ - r600_store_value(cb, fui(1.0)); /* R_0282D4_PA_SC_VPORT_ZMAX_0 */ - } - r600_store_context_reg(cb, R_028200_PA_SC_WINDOW_OFFSET, 0); r600_store_context_reg(cb, R_02820C_PA_SC_CLIPRECT_RULE, 0xFFFF); @@ -2884,7 +2842,7 @@ * dma packet will be using the copy_height which is always smaller or equal * to the linear height */ - height = rsrc->surface.level[src_level].npix_y; + height = u_minify(rsrc->resource.b.b.height0, src_level); detile = 1; x = src_x; y = src_y; @@ -2903,7 +2861,7 @@ * dma packet will be using the copy_height which is always smaller or equal * to the linear height */ - height = rdst->surface.level[dst_level].npix_y; + height = u_minify(rdst->resource.b.b.height0, dst_level); detile = 0; x = dst_x; y = dst_y; @@ -2946,7 +2904,6 @@ addr += cheight * pitch; y += cheight; } - r600_dma_emit_wait_idle(&rctx->b); return TRUE; } @@ -2989,10 +2946,10 @@ dst_y = util_format_get_nblocksy(src->format, dst_y); bpp = rdst->surface.bpe; - dst_pitch = rdst->surface.level[dst_level].pitch_bytes; - src_pitch = rsrc->surface.level[src_level].pitch_bytes; - src_w = rsrc->surface.level[src_level].npix_x; - dst_w = rdst->surface.level[dst_level].npix_x; + dst_pitch = rdst->surface.level[dst_level].nblk_x * rdst->surface.bpe; + src_pitch = rsrc->surface.level[src_level].nblk_x * rsrc->surface.bpe; + src_w = u_minify(rsrc->resource.b.b.width0, src_level); + dst_w = u_minify(rdst->resource.b.b.width0, dst_level); copy_height = src_box->height / rsrc->surface.blk_h; dst_mode = rdst->surface.level[dst_level].mode; @@ -3089,7 +3046,7 @@ r600_init_atom(rctx, &rctx->db_misc_state.atom, id++, r600_emit_db_misc_state, 7); r600_init_atom(rctx, &rctx->db_state.atom, id++, r600_emit_db_state, 11); r600_init_atom(rctx, &rctx->dsa_state.atom, id++, r600_emit_cso_state, 0); - r600_init_atom(rctx, &rctx->poly_offset_state.atom, id++, r600_emit_polygon_offset, 6); + r600_init_atom(rctx, &rctx->poly_offset_state.atom, id++, r600_emit_polygon_offset, 9); r600_init_atom(rctx, &rctx->rasterizer_state.atom, id++, r600_emit_cso_state, 0); r600_add_atom(rctx, &rctx->b.scissors.atom, id++); r600_add_atom(rctx, &rctx->b.viewports.atom, id++); diff -Nru mesa-12.0.6/src/gallium/drivers/r600/r600_state_common.c mesa-17.0.7/src/gallium/drivers/r600/r600_state_common.c --- mesa-12.0.6/src/gallium/drivers/r600/r600_state_common.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r600/r600_state_common.c 2017-06-01 10:37:10.000000000 +0000 @@ -91,7 +91,7 @@ radeon_set_context_reg(cs, R_028438_SX_ALPHA_REF, alpha_ref); } -static void r600_texture_barrier(struct pipe_context *ctx) +static void r600_texture_barrier(struct pipe_context *ctx, unsigned flags) { struct r600_context *rctx = (struct r600_context *)ctx; @@ -350,9 +350,11 @@ if (rs->offset_enable && (rs->offset_units != rctx->poly_offset_state.offset_units || - rs->offset_scale != rctx->poly_offset_state.offset_scale)) { + rs->offset_scale != rctx->poly_offset_state.offset_scale || + rs->offset_units_unscaled != rctx->poly_offset_state.offset_units_unscaled)) { rctx->poly_offset_state.offset_units = rs->offset_units; rctx->poly_offset_state.offset_scale = rs->offset_scale; + rctx->poly_offset_state.offset_units_unscaled = rs->offset_units_unscaled; r600_mark_atom_dirty(rctx, &rctx->poly_offset_state.atom); } @@ -406,7 +408,7 @@ } static void r600_bind_sampler_states(struct pipe_context *pipe, - unsigned shader, + enum pipe_shader_type shader, unsigned start, unsigned count, void **states) { @@ -512,7 +514,7 @@ static void r600_delete_vertex_elements(struct pipe_context *ctx, void *state) { struct r600_fetch_shader *shader = (struct r600_fetch_shader*)state; - pipe_resource_reference((struct pipe_resource**)&shader->buffer, NULL); + r600_resource_reference(&shader->buffer, NULL); FREE(shader); } @@ -533,7 +535,6 @@ void r600_vertex_buffers_dirty(struct r600_context *rctx) { if (rctx->vertex_buffer_state.dirty_mask) { - rctx->b.flags |= R600_CONTEXT_INV_VERTEX_CACHE; rctx->vertex_buffer_state.atom.num_dw = (rctx->b.chip_class >= EVERGREEN ? 12 : 11) * util_bitcount(rctx->vertex_buffer_state.dirty_mask); r600_mark_atom_dirty(rctx, &rctx->vertex_buffer_state.atom); @@ -590,14 +591,14 @@ struct r600_samplerview_state *state) { if (state->dirty_mask) { - rctx->b.flags |= R600_CONTEXT_INV_TEX_CACHE; state->atom.num_dw = (rctx->b.chip_class >= EVERGREEN ? 14 : 13) * util_bitcount(state->dirty_mask); r600_mark_atom_dirty(rctx, &state->atom); } } -static void r600_set_sampler_views(struct pipe_context *pipe, unsigned shader, +static void r600_set_sampler_views(struct pipe_context *pipe, + enum pipe_shader_type shader, unsigned start, unsigned count, struct pipe_sampler_view **views) { @@ -640,7 +641,7 @@ (struct r600_texture*)rviews[i]->base.texture; bool is_buffer = rviews[i]->base.texture->target == PIPE_BUFFER; - if (!is_buffer && rtex->is_depth && !rtex->is_flushing_texture) { + if (!is_buffer && rtex->db_compatible) { dst->views.compressed_depthtex_mask |= 1 << i; } else { dst->views.compressed_depthtex_mask &= ~(1 << i); @@ -1048,7 +1049,6 @@ void r600_constant_buffers_dirty(struct r600_context *rctx, struct r600_constbuf_state *state) { if (state->dirty_mask) { - rctx->b.flags |= R600_CONTEXT_INV_CONST_CACHE; state->atom.num_dw = rctx->b.chip_class >= EVERGREEN ? util_bitcount(state->dirty_mask)*20 : util_bitcount(state->dirty_mask)*19; r600_mark_atom_dirty(rctx, &state->atom); @@ -1056,7 +1056,7 @@ } static void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index, - struct pipe_constant_buffer *input) + const struct pipe_constant_buffer *input) { struct r600_context *rctx = (struct r600_context *)ctx; struct r600_constbuf_state *state = &rctx->constbuf_state[shader]; @@ -1326,14 +1326,14 @@ if (enable && !rctx->gs_rings.esgs_ring.buffer) { unsigned size = 0x1C000; rctx->gs_rings.esgs_ring.buffer = - pipe_buffer_create(rctx->b.b.screen, PIPE_BIND_CUSTOM, + pipe_buffer_create(rctx->b.b.screen, 0, PIPE_USAGE_DEFAULT, size); rctx->gs_rings.esgs_ring.buffer_size = size; size = 0x4000000; rctx->gs_rings.gsvs_ring.buffer = - pipe_buffer_create(rctx->b.b.screen, PIPE_BIND_CUSTOM, + pipe_buffer_create(rctx->b.b.screen, 0, PIPE_USAGE_DEFAULT, size); rctx->gs_rings.gsvs_ring.buffer_size = size; } @@ -1740,7 +1740,7 @@ &out_offset, &out_buffer, &ptr); util_shorten_ubyte_elts_to_userptr( - &rctx->b.b, &ib, 0, ib.offset + start, count, ptr); + &rctx->b.b, &ib, 0, 0, ib.offset + start, count, ptr); pipe_resource_reference(&ib.buffer, NULL); ib.user_buffer = NULL; @@ -2157,7 +2157,7 @@ r600_emit_command_buffer(cs, &shader->command_buffer); radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, shader->bo, - RADEON_USAGE_READ, RADEON_PRIO_USER_SHADER)); + RADEON_USAGE_READ, RADEON_PRIO_SHADER_BINARY)); } unsigned r600_get_swizzle_combined(const unsigned char *swizzle_format, @@ -2782,12 +2782,11 @@ { struct r600_context *rctx = (struct r600_context*)ctx; struct r600_resource *rbuffer = r600_resource(buf); - unsigned i, shader, mask, alignment = rbuffer->buf->alignment; + unsigned i, shader, mask; struct r600_pipe_sampler_view *view; /* Reallocate the buffer in the same pipe_resource. */ - r600_init_resource(&rctx->screen->b, rbuffer, rbuffer->b.b.width0, - alignment); + r600_alloc_resource(&rctx->screen->b, rbuffer); /* We changed the buffer, now we need to bind it where the old one was bound. */ /* Vertex buffers. */ @@ -2830,10 +2829,9 @@ } /* Texture buffer objects - update the virtual addresses in descriptors. */ - LIST_FOR_EACH_ENTRY(view, &rctx->b.texture_buffers, list) { + LIST_FOR_EACH_ENTRY(view, &rctx->texture_buffers, list) { if (view->base.texture == &rbuffer->b.b) { - unsigned stride = util_format_get_blocksize(view->base.format); - uint64_t offset = (uint64_t)view->base.u.buf.first_element * stride; + uint64_t offset = view->base.u.buf.offset; uint64_t va = rbuffer->gpu_address + offset; view->tex_resource_words[0] = va; diff -Nru mesa-12.0.6/src/gallium/drivers/r600/r600_uvd.c mesa-17.0.7/src/gallium/drivers/r600/r600_uvd.c --- mesa-12.0.6/src/gallium/drivers/r600/r600_uvd.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r600/r600_uvd.c 2017-06-01 10:37:10.000000000 +0000 @@ -131,7 +131,7 @@ error: for (i = 0; i < VL_NUM_COMPONENTS; ++i) - pipe_resource_reference((struct pipe_resource **)&resources[i], NULL); + r600_texture_reference(&resources[i], NULL); return NULL; } diff -Nru mesa-12.0.6/src/gallium/drivers/r600/sb/sb_dce_cleanup.cpp mesa-17.0.7/src/gallium/drivers/r600/sb/sb_dce_cleanup.cpp --- mesa-12.0.6/src/gallium/drivers/r600/sb/sb_dce_cleanup.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r600/sb/sb_dce_cleanup.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -30,6 +30,18 @@ namespace r600_sb { +int dce_cleanup::run() { + int r; + + // Run cleanup for as long as there are unused nodes. + do { + nodes_changed = false; + r = vpass::run(); + } while (r == 0 && nodes_changed); + + return r; +} + bool dce_cleanup::visit(node& n, bool enter) { if (enter) { } else { @@ -110,7 +122,18 @@ void dce_cleanup::cleanup_dst(node& n) { if (!cleanup_dst_vec(n.dst) && remove_unused && !n.dst.empty() && !(n.flags & NF_DONT_KILL) && n.parent) + { + // Delete use references to the removed node from the src values. + for (vvec::iterator I = n.src.begin(), E = n.src.end(); I != E; ++I) { + value* v = *I; + if (v && v->def && v->uses.size()) + { + v->remove_use(&n); + } + } n.remove(); + nodes_changed = true; + } } bool dce_cleanup::visit(container_node& n, bool enter) { @@ -130,7 +153,7 @@ if (v->gvn_source && v->gvn_source->is_dead()) v->gvn_source = NULL; - if (v->is_dead() || (remove_unused && !v->is_rel() && !v->uses)) + if (v->is_dead() || (remove_unused && !v->is_rel() && !v->uses.size())) v = NULL; else alive = true; diff -Nru mesa-12.0.6/src/gallium/drivers/r600/sb/sb_gcm.cpp mesa-17.0.7/src/gallium/drivers/r600/sb/sb_gcm.cpp --- mesa-12.0.6/src/gallium/drivers/r600/sb/sb_gcm.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r600/sb/sb_gcm.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -199,10 +199,9 @@ sblog << "\n"; ); - use_info *u = v->uses; - while (u) { + for (uselist::iterator I = v->uses.begin(), E = v->uses.end(); I != E; ++I) { + use_info *u = *I; if (u->op->parent != &pending) { - u = u->next; continue; } @@ -212,6 +211,7 @@ sblog << "\n"; ); + assert(uses[u->op] > 0); if (--uses[u->op] == 0) { GCM_DUMP( sblog << "td released : "; @@ -222,7 +222,6 @@ pending.remove_node(u->op); ready.push_back(u->op); } - u = u->next; } } diff -Nru mesa-12.0.6/src/gallium/drivers/r600/sb/sb_ir.cpp mesa-17.0.7/src/gallium/drivers/r600/sb/sb_ir.cpp --- mesa-12.0.6/src/gallium/drivers/r600/sb/sb_ir.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r600/sb/sb_ir.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -255,7 +255,7 @@ void node::remove() {parent->remove_node(this); } -value_hash node::hash_src() { +value_hash node::hash_src() const { value_hash h = 12345; @@ -269,7 +269,7 @@ } -value_hash node::hash() { +value_hash node::hash() const { if (parent && parent->subtype == NST_LOOP_PHI_CONTAINER) return 47451; diff -Nru mesa-12.0.6/src/gallium/drivers/r600/sb/sb_ir.h mesa-17.0.7/src/gallium/drivers/r600/sb/sb_ir.h --- mesa-12.0.6/src/gallium/drivers/r600/sb/sb_ir.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r600/sb/sb_ir.h 2017-06-01 10:37:10.000000000 +0000 @@ -263,8 +263,6 @@ } }; -class value; - enum value_kind { VLK_REG, VLK_REL_REG, @@ -433,8 +431,6 @@ return l; } -struct value; - sb_ostream& operator << (sb_ostream &o, value &v); typedef uint32_t value_hash; @@ -450,15 +446,16 @@ }; struct use_info { - use_info *next; node *op; use_kind kind; int arg; - use_info(node *n, use_kind kind, int arg, use_info* next) - : next(next), op(n), kind(kind), arg(arg) {} + use_info(node *n, use_kind kind, int arg) + : op(n), kind(kind), arg(arg) {} }; +typedef std::list< use_info * > uselist; + enum constraint_kind { CK_SAME_REG, CK_PACKED_BS, @@ -467,7 +464,7 @@ class shader; class sb_value_pool; -class ra_chunk; +struct ra_chunk; class ra_constraint; class value { @@ -502,7 +499,7 @@ value_hash ghash; node *def, *adef; - use_info *uses; + uselist uses; ra_constraint *constraint; ra_chunk *chunk; @@ -589,6 +586,7 @@ } void add_use(node *n, use_kind kind, int arg); + void remove_use(const node *n); value_hash hash(); value_hash rel_hash(); @@ -794,8 +792,8 @@ void replace_with(node *n); void remove(); - virtual value_hash hash(); - value_hash hash_src(); + virtual value_hash hash() const; + value_hash hash_src() const; virtual bool fold_dispatch(expr_handler *ex); diff -Nru mesa-12.0.6/src/gallium/drivers/r600/sb/sb_pass.h mesa-17.0.7/src/gallium/drivers/r600/sb/sb_pass.h --- mesa-12.0.6/src/gallium/drivers/r600/sb/sb_pass.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r600/sb/sb_pass.h 2017-06-01 10:37:10.000000000 +0000 @@ -124,7 +124,9 @@ public: dce_cleanup(shader &s) : vpass(s), - remove_unused(s.dce_flags & DF_REMOVE_UNUSED) {} + remove_unused(s.dce_flags & DF_REMOVE_UNUSED), nodes_changed(false) {} + + virtual int run(); virtual bool visit(node &n, bool enter); virtual bool visit(alu_group_node &n, bool enter); @@ -140,6 +142,8 @@ void cleanup_dst(node &n); bool cleanup_dst_vec(vvec &vv); + // Did we alter/remove nodes during a single pass? + bool nodes_changed; }; diff -Nru mesa-12.0.6/src/gallium/drivers/r600/sb/sb_valtable.cpp mesa-17.0.7/src/gallium/drivers/r600/sb/sb_valtable.cpp --- mesa-12.0.6/src/gallium/drivers/r600/sb/sb_valtable.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/r600/sb/sb_valtable.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -220,17 +220,33 @@ dump::dump_op(n); sblog << " kind " << kind << " arg " << arg << "\n"; } - uses = new use_info(n, kind, arg, uses); + uses.push_back(new use_info(n, kind, arg)); } -unsigned value::use_count() { - use_info *u = uses; - unsigned c = 0; - while (u) { - ++c; - u = u->next; +struct use_node_comp { + explicit use_node_comp(const node *n) : n(n) {} + bool operator() (const use_info *u) { + return u->op->hash() == n->hash(); + } + + private: + const node *n; +}; + +void value::remove_use(const node *n) { + uselist::iterator it = + std::find_if(uses.begin(), uses.end(), use_node_comp(n)); + + if (it != uses.end()) + { + // TODO assert((*it)->kind == kind) ? + // TODO assert((*it)->arg == arg) ? + uses.erase(it); } - return c; +} + +unsigned value::use_count() { + return uses.size(); } bool value::is_global() { @@ -274,13 +290,7 @@ } void value::delete_uses() { - use_info *u, *c = uses; - while (c) { - u = c->next; - delete c; - c = u; - } - uses = NULL; + uses.erase(uses.begin(), uses.end()); } void ra_constraint::update_values() { @@ -468,7 +478,7 @@ bool r600_sb::sb_value_set::contains(value* v) { unsigned b = v->uid - 1; if (b < bs.size()) - return bs.get(v->uid - 1); + return bs.get(b); else return false; } diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/cayman_msaa.c mesa-17.0.7/src/gallium/drivers/radeon/cayman_msaa.c --- mesa-12.0.6/src/gallium/drivers/radeon/cayman_msaa.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/cayman_msaa.c 2017-06-01 10:37:10.000000000 +0000 @@ -202,10 +202,19 @@ } void cayman_emit_msaa_config(struct radeon_winsys_cs *cs, int nr_samples, - int ps_iter_samples, int overrast_samples) + int ps_iter_samples, int overrast_samples, + unsigned sc_mode_cntl_1) { int setup_samples = nr_samples > 1 ? nr_samples : overrast_samples > 1 ? overrast_samples : 0; + /* Required by OpenGL line rasterization. + * + * TODO: We should also enable perpendicular endcaps for AA lines, + * but that requires implementing line stippling in the pixel + * shader. SC can only do line stippling with axis-aligned + * endcaps. + */ + unsigned sc_line_cntl = S_028BDC_DX10_DIAMOND_TEST_ENA(1); if (setup_samples > 1) { /* indexed by log2(nr_samples) */ @@ -221,7 +230,7 @@ util_logbase2(util_next_power_of_two(ps_iter_samples)); radeon_set_context_reg_seq(cs, CM_R_028BDC_PA_SC_LINE_CNTL, 2); - radeon_emit(cs, S_028BDC_LAST_PIXEL(1) | + radeon_emit(cs, sc_line_cntl | S_028BDC_EXPAND_LINE_WIDTH(1)); /* CM_R_028BDC_PA_SC_LINE_CNTL */ radeon_emit(cs, S_028BE0_MSAA_NUM_SAMPLES(log_samples) | S_028BE0_MAX_SAMPLE_DIST(max_dist[log_samples]) | @@ -237,27 +246,24 @@ S_028804_STATIC_ANCHOR_ASSOCIATIONS(1)); radeon_set_context_reg(cs, EG_R_028A4C_PA_SC_MODE_CNTL_1, EG_S_028A4C_PS_ITER_SAMPLE(ps_iter_samples > 1) | - EG_S_028A4C_FORCE_EOV_CNTDWN_ENABLE(1) | - EG_S_028A4C_FORCE_EOV_REZ_ENABLE(1)); + sc_mode_cntl_1); } else if (overrast_samples > 1) { radeon_set_context_reg(cs, CM_R_028804_DB_EQAA, S_028804_HIGH_QUALITY_INTERSECTIONS(1) | S_028804_STATIC_ANCHOR_ASSOCIATIONS(1) | S_028804_OVERRASTERIZATION_AMOUNT(log_samples)); radeon_set_context_reg(cs, EG_R_028A4C_PA_SC_MODE_CNTL_1, - EG_S_028A4C_FORCE_EOV_CNTDWN_ENABLE(1) | - EG_S_028A4C_FORCE_EOV_REZ_ENABLE(1)); + sc_mode_cntl_1); } } else { radeon_set_context_reg_seq(cs, CM_R_028BDC_PA_SC_LINE_CNTL, 2); - radeon_emit(cs, S_028BDC_LAST_PIXEL(1)); /* CM_R_028BDC_PA_SC_LINE_CNTL */ + radeon_emit(cs, sc_line_cntl); /* CM_R_028BDC_PA_SC_LINE_CNTL */ radeon_emit(cs, 0); /* CM_R_028BE0_PA_SC_AA_CONFIG */ radeon_set_context_reg(cs, CM_R_028804_DB_EQAA, S_028804_HIGH_QUALITY_INTERSECTIONS(1) | S_028804_STATIC_ANCHOR_ASSOCIATIONS(1)); radeon_set_context_reg(cs, EG_R_028A4C_PA_SC_MODE_CNTL_1, - EG_S_028A4C_FORCE_EOV_CNTDWN_ENABLE(1) | - EG_S_028A4C_FORCE_EOV_REZ_ENABLE(1)); + sc_mode_cntl_1); } } diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/Makefile.in mesa-17.0.7/src/gallium/drivers/radeon/Makefile.in --- mesa-12.0.6/src/gallium/drivers/radeon/Makefile.in 2017-01-24 01:41:47.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/Makefile.in 2017-06-01 10:37:20.000000000 +0000 @@ -89,18 +89,21 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) -@NEED_RADEON_LLVM_TRUE@am__append_3 = \ +@NEED_RADEON_LLVM_TRUE@am__append_4 = \ @NEED_RADEON_LLVM_TRUE@ $(LLVM_CFLAGS) \ @NEED_RADEON_LLVM_TRUE@ $(LIBELF_CFLAGS) -@NEED_RADEON_LLVM_TRUE@am__append_4 = \ +@NEED_RADEON_LLVM_TRUE@am__append_5 = \ @NEED_RADEON_LLVM_TRUE@ $(LLVM_C_FILES) subdir = src/gallium/drivers/radeon @@ -128,23 +131,20 @@ @NEED_RADEON_LLVM_TRUE@ $(am__DEPENDENCIES_1) \ @NEED_RADEON_LLVM_TRUE@ $(am__DEPENDENCIES_1) am__libradeon_la_SOURCES_DIST = cayman_msaa.c r600_buffer_common.c \ - r600_cs.h r600d_common.h r600_gpu_load.c r600_perfcounter.c \ + r600_cs.h r600_gpu_load.c r600_perfcounter.c \ r600_pipe_common.c r600_pipe_common.h r600_query.c \ r600_query.h r600_streamout.c r600_test_dma.c r600_texture.c \ r600_viewport.c radeon_uvd.c radeon_uvd.h radeon_vce_40_2_2.c \ radeon_vce_50.c radeon_vce_52.c radeon_vce.c radeon_vce.h \ radeon_video.c radeon_video.h radeon_winsys.h \ - radeon_elf_util.c radeon_elf_util.h radeon_llvm_emit.c \ - radeon_llvm_emit.h radeon_llvm.h radeon_llvm_util.c \ - radeon_llvm_util.h radeon_setup_tgsi_llvm.c + radeon_elf_util.c radeon_elf_util.h am__objects_1 = cayman_msaa.lo r600_buffer_common.lo r600_gpu_load.lo \ r600_perfcounter.lo r600_pipe_common.lo r600_query.lo \ r600_streamout.lo r600_test_dma.lo r600_texture.lo \ r600_viewport.lo radeon_uvd.lo radeon_vce_40_2_2.lo \ radeon_vce_50.lo radeon_vce_52.lo radeon_vce.lo \ radeon_video.lo -am__objects_2 = radeon_elf_util.lo radeon_llvm_emit.lo \ - radeon_llvm_util.lo radeon_setup_tgsi_llvm.lo +am__objects_2 = radeon_elf_util.lo @NEED_RADEON_LLVM_TRUE@am__objects_3 = $(am__objects_2) am_libradeon_la_OBJECTS = $(am__objects_1) $(am__objects_3) libradeon_la_OBJECTS = $(am_libradeon_la_OBJECTS) @@ -224,6 +224,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -238,6 +240,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -267,10 +270,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -320,11 +324,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -364,8 +365,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -402,8 +401,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -412,7 +409,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -420,13 +416,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -455,6 +452,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -521,7 +519,6 @@ cayman_msaa.c \ r600_buffer_common.c \ r600_cs.h \ - r600d_common.h \ r600_gpu_load.c \ r600_perfcounter.c \ r600_pipe_common.c \ @@ -545,13 +542,7 @@ LLVM_C_FILES := \ radeon_elf_util.c \ - radeon_elf_util.h \ - radeon_llvm_emit.c \ - radeon_llvm_emit.h \ - radeon_llvm.h \ - radeon_llvm_util.c \ - radeon_llvm_util.h \ - radeon_setup_tgsi_llvm.c + radeon_elf_util.h GALLIUM_CFLAGS = \ -I$(top_srcdir)/include \ @@ -600,12 +591,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -617,12 +604,12 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = $(GALLIUM_DRIVER_CFLAGS) $(RADEON_CFLAGS) \ - -Wstrict-overflow=0 $(am__append_3) + -Wstrict-overflow=0 $(am__append_4) # ^^ disable warnings about overflows (os_time_timeout) noinst_LTLIBRARIES = libradeon.la -libradeon_la_SOURCES = $(C_SOURCES) $(am__append_4) +libradeon_la_SOURCES = $(C_SOURCES) $(am__append_5) @NEED_RADEON_LLVM_TRUE@libradeon_la_LIBADD = \ @NEED_RADEON_LLVM_TRUE@ $(CLOCK_LIB) \ @NEED_RADEON_LLVM_TRUE@ $(LLVM_LIBS) \ @@ -700,9 +687,6 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/r600_texture.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/r600_viewport.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/radeon_elf_util.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/radeon_llvm_emit.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/radeon_llvm_util.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/radeon_setup_tgsi_llvm.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/radeon_uvd.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/radeon_vce.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/radeon_vce_40_2_2.Plo@am__quote@ diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/Makefile.sources mesa-17.0.7/src/gallium/drivers/radeon/Makefile.sources --- mesa-12.0.6/src/gallium/drivers/radeon/Makefile.sources 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/Makefile.sources 2017-06-01 10:37:10.000000000 +0000 @@ -2,7 +2,6 @@ cayman_msaa.c \ r600_buffer_common.c \ r600_cs.h \ - r600d_common.h \ r600_gpu_load.c \ r600_perfcounter.c \ r600_pipe_common.c \ @@ -26,10 +25,4 @@ LLVM_C_FILES := \ radeon_elf_util.c \ - radeon_elf_util.h \ - radeon_llvm_emit.c \ - radeon_llvm_emit.h \ - radeon_llvm.h \ - radeon_llvm_util.c \ - radeon_llvm_util.h \ - radeon_setup_tgsi_llvm.c + radeon_elf_util.h diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/r600_buffer_common.c mesa-17.0.7/src/gallium/drivers/radeon/r600_buffer_common.c --- mesa-12.0.6/src/gallium/drivers/radeon/r600_buffer_common.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/r600_buffer_common.c 2017-06-01 10:37:10.000000000 +0000 @@ -30,18 +30,18 @@ #include #include -boolean r600_rings_is_buffer_referenced(struct r600_common_context *ctx, - struct pb_buffer *buf, - enum radeon_bo_usage usage) +bool r600_rings_is_buffer_referenced(struct r600_common_context *ctx, + struct pb_buffer *buf, + enum radeon_bo_usage usage) { if (ctx->ws->cs_is_buffer_referenced(ctx->gfx.cs, buf, usage)) { - return TRUE; + return true; } if (radeon_emitted(ctx->dma.cs, 0) && ctx->ws->cs_is_buffer_referenced(ctx->dma.cs, buf, usage)) { - return TRUE; + return true; } - return FALSE; + return false; } void *r600_buffer_map_sync_with_rings(struct r600_common_context *ctx, @@ -99,20 +99,23 @@ return ctx->ws->buffer_map(resource->buf, NULL, usage); } -bool r600_init_resource(struct r600_common_screen *rscreen, - struct r600_resource *res, - uint64_t size, unsigned alignment) +void r600_init_resource_fields(struct r600_common_screen *rscreen, + struct r600_resource *res, + uint64_t size, unsigned alignment) { struct r600_texture *rtex = (struct r600_texture*)res; - struct pb_buffer *old_buf, *new_buf; - enum radeon_bo_flag flags = 0; + + res->bo_size = size; + res->bo_alignment = alignment; + res->flags = 0; switch (res->b.b.usage) { case PIPE_USAGE_STREAM: - flags = RADEON_FLAG_GTT_WC; + res->flags = RADEON_FLAG_GTT_WC; /* fall through */ case PIPE_USAGE_STAGING: - /* Transfers are likely to occur more often with these resources. */ + /* Transfers are likely to occur more often with these + * resources. */ res->domains = RADEON_DOMAIN_GTT; break; case PIPE_USAGE_DYNAMIC: @@ -122,60 +125,78 @@ if (rscreen->info.drm_major == 2 && rscreen->info.drm_minor < 40) { res->domains = RADEON_DOMAIN_GTT; - flags |= RADEON_FLAG_GTT_WC; + res->flags |= RADEON_FLAG_GTT_WC; break; } - flags |= RADEON_FLAG_CPU_ACCESS; + res->flags |= RADEON_FLAG_CPU_ACCESS; /* fall through */ case PIPE_USAGE_DEFAULT: case PIPE_USAGE_IMMUTABLE: default: - /* Not listing GTT here improves performance in some apps. */ + /* Not listing GTT here improves performance in some + * apps. */ res->domains = RADEON_DOMAIN_VRAM; - flags |= RADEON_FLAG_GTT_WC; + res->flags |= RADEON_FLAG_GTT_WC; break; } if (res->b.b.target == PIPE_BUFFER && res->b.b.flags & (PIPE_RESOURCE_FLAG_MAP_PERSISTENT | PIPE_RESOURCE_FLAG_MAP_COHERENT)) { - /* Use GTT for all persistent mappings with older kernels, - * because they didn't always flush the HDP cache before CS - * execution. + /* Use GTT for all persistent mappings with older + * kernels, because they didn't always flush the HDP + * cache before CS execution. * - * Write-combined CPU mappings are fine, the kernel ensures all CPU - * writes finish before the GPU executes a command stream. + * Write-combined CPU mappings are fine, the kernel + * ensures all CPU writes finish before the GPU + * executes a command stream. */ if (rscreen->info.drm_major == 2 && rscreen->info.drm_minor < 40) res->domains = RADEON_DOMAIN_GTT; else if (res->domains & RADEON_DOMAIN_VRAM) - flags |= RADEON_FLAG_CPU_ACCESS; + res->flags |= RADEON_FLAG_CPU_ACCESS; } /* Tiled textures are unmappable. Always put them in VRAM. */ if (res->b.b.target != PIPE_BUFFER && - rtex->surface.level[0].mode >= RADEON_SURF_MODE_1D) { + !rtex->surface.is_linear) { res->domains = RADEON_DOMAIN_VRAM; - flags &= ~RADEON_FLAG_CPU_ACCESS; - flags |= RADEON_FLAG_NO_CPU_ACCESS | + res->flags &= ~RADEON_FLAG_CPU_ACCESS; + res->flags |= RADEON_FLAG_NO_CPU_ACCESS | RADEON_FLAG_GTT_WC; } - /* If VRAM is just stolen system memory, allow both VRAM and GTT, - * whichever has free space. If a buffer is evicted from VRAM to GTT, - * it will stay there. + /* If VRAM is just stolen system memory, allow both VRAM and + * GTT, whichever has free space. If a buffer is evicted from + * VRAM to GTT, it will stay there. */ if (!rscreen->info.has_dedicated_vram && res->domains == RADEON_DOMAIN_VRAM) res->domains = RADEON_DOMAIN_VRAM_GTT; if (rscreen->debug_flags & DBG_NO_WC) - flags &= ~RADEON_FLAG_GTT_WC; + res->flags &= ~RADEON_FLAG_GTT_WC; + + /* Set expected VRAM and GART usage for the buffer. */ + res->vram_usage = 0; + res->gart_usage = 0; + + if (res->domains & RADEON_DOMAIN_VRAM) + res->vram_usage = size; + else if (res->domains & RADEON_DOMAIN_GTT) + res->gart_usage = size; +} + +bool r600_alloc_resource(struct r600_common_screen *rscreen, + struct r600_resource *res) +{ + struct pb_buffer *old_buf, *new_buf; /* Allocate a new resource. */ - new_buf = rscreen->ws->buffer_create(rscreen->ws, size, alignment, - res->domains, flags); + new_buf = rscreen->ws->buffer_create(rscreen->ws, res->bo_size, + res->bo_alignment, + res->domains, res->flags); if (!new_buf) { return false; } @@ -197,6 +218,7 @@ util_range_set_empty(&res->valid_buffer_range); res->TC_L2_dirty = false; + /* Print debug information. */ if (rscreen->debug_flags & DBG_VM && res->b.b.target == PIPE_BUFFER) { fprintf(stderr, "VM start=0x%"PRIX64" end=0x%"PRIX64" | Buffer %"PRIu64" bytes\n", res->gpu_address, res->gpu_address + res->buf->size, @@ -261,7 +283,7 @@ unsigned offset) { struct r600_common_context *rctx = (struct r600_common_context*)ctx; - struct r600_transfer *transfer = util_slab_alloc(&rctx->pool_transfers); + struct r600_transfer *transfer = slab_alloc(&rctx->pool_transfers); transfer->transfer.resource = resource; transfer->transfer.level = level; @@ -355,26 +377,27 @@ usage |= PIPE_TRANSFER_UNSYNCHRONIZED; } } - /* Using a staging buffer in GTT for larger reads is much faster. */ + /* Use a staging buffer in cached GTT for reads. */ else if ((usage & PIPE_TRANSFER_READ) && - !(usage & (PIPE_TRANSFER_WRITE | - PIPE_TRANSFER_PERSISTENT)) && - rbuffer->domains & RADEON_DOMAIN_VRAM && + !(usage & PIPE_TRANSFER_PERSISTENT) && + (rbuffer->domains & RADEON_DOMAIN_VRAM || + rbuffer->flags & RADEON_FLAG_GTT_WC) && r600_can_dma_copy_buffer(rctx, 0, box->x, box->width)) { struct r600_resource *staging; staging = (struct r600_resource*) pipe_buffer_create( - ctx->screen, PIPE_BIND_TRANSFER_READ, PIPE_USAGE_STAGING, + ctx->screen, 0, PIPE_USAGE_STAGING, box->width + (box->x % R600_MAP_BUFFER_ALIGNMENT)); if (staging) { /* Copy the VRAM buffer to the staging buffer. */ rctx->dma_copy(ctx, &staging->b.b, 0, box->x % R600_MAP_BUFFER_ALIGNMENT, - 0, 0, resource, level, box); + 0, 0, resource, 0, box); - data = r600_buffer_map_sync_with_rings(rctx, staging, PIPE_TRANSFER_READ); + data = r600_buffer_map_sync_with_rings(rctx, staging, + usage & ~PIPE_TRANSFER_UNSYNCHRONIZED); if (!data) { - pipe_resource_reference((struct pipe_resource **)&staging, NULL); + r600_resource_reference(&staging, NULL); return NULL; } data += box->x % R600_MAP_BUFFER_ALIGNMENT; @@ -398,7 +421,6 @@ struct pipe_transfer *transfer, const struct pipe_box *box) { - struct r600_common_context *rctx = (struct r600_common_context*)ctx; struct r600_transfer *rtransfer = (struct r600_transfer*)transfer; struct r600_resource *rbuffer = r600_resource(transfer->resource); @@ -414,7 +436,7 @@ u_box_1d(soffset, box->width, &dma_box); /* Copy the staging buffer into the original one. */ - rctx->dma_copy(ctx, dst, 0, box->x, 0, 0, src, 0, &dma_box); + ctx->resource_copy_region(ctx, dst, 0, box->x, 0, 0, src, 0, &dma_box); } util_range_add(&rbuffer->valid_buffer_range, box->x, @@ -445,9 +467,31 @@ r600_buffer_do_flush_region(ctx, transfer, &transfer->box); if (rtransfer->staging) - pipe_resource_reference((struct pipe_resource**)&rtransfer->staging, NULL); + r600_resource_reference(&rtransfer->staging, NULL); - util_slab_free(&rctx->pool_transfers, transfer); + slab_free(&rctx->pool_transfers, transfer); +} + +void r600_buffer_subdata(struct pipe_context *ctx, + struct pipe_resource *buffer, + unsigned usage, unsigned offset, + unsigned size, const void *data) +{ + struct pipe_transfer *transfer = NULL; + struct pipe_box box; + uint8_t *map = NULL; + + u_box_1d(offset, size, &box); + map = r600_buffer_transfer_map(ctx, buffer, 0, + PIPE_TRANSFER_WRITE | + PIPE_TRANSFER_DISCARD_RANGE | + usage, + &box, &transfer); + if (!map) + return; + + memcpy(map, data, size); + r600_buffer_transfer_unmap(ctx, transfer); } static const struct u_resource_vtbl r600_buffer_vtbl = @@ -457,7 +501,6 @@ r600_buffer_transfer_map, /* transfer_map */ r600_buffer_flush_region, /* transfer_flush_region */ r600_buffer_transfer_unmap, /* transfer_unmap */ - NULL /* transfer_inline_write */ }; static struct r600_resource * @@ -469,10 +512,12 @@ rbuffer = MALLOC_STRUCT(r600_resource); rbuffer->b.b = *templ; + rbuffer->b.b.next = NULL; pipe_reference_init(&rbuffer->b.b.reference, 1); rbuffer->b.b.screen = screen; rbuffer->b.vtbl = &r600_buffer_vtbl; rbuffer->buf = NULL; + rbuffer->bind_history = 0; rbuffer->TC_L2_dirty = false; rbuffer->is_shared = false; util_range_init(&rbuffer->valid_buffer_range); @@ -486,7 +531,12 @@ struct r600_common_screen *rscreen = (struct r600_common_screen*)screen; struct r600_resource *rbuffer = r600_alloc_buffer_struct(screen, templ); - if (!r600_init_resource(rscreen, rbuffer, templ->width0, alignment)) { + r600_init_resource_fields(rscreen, rbuffer, templ->width0, alignment); + + if (templ->bind & PIPE_BIND_SHARED) + rbuffer->flags |= RADEON_FLAG_HANDLE; + + if (!r600_alloc_resource(rscreen, rbuffer)) { FREE(rbuffer); return NULL; } diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/r600_cs.h mesa-17.0.7/src/gallium/drivers/radeon/r600_cs.h --- mesa-12.0.6/src/gallium/drivers/radeon/r600_cs.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/r600_cs.h 2017-06-01 10:37:10.000000000 +0000 @@ -31,7 +31,30 @@ #define R600_CS_H #include "r600_pipe_common.h" -#include "r600d_common.h" +#include "amd/common/r600d_common.h" + +/** + * Return true if there is enough memory in VRAM and GTT for the buffers + * added so far. + * + * \param vram VRAM memory size not added to the buffer list yet + * \param gtt GTT memory size not added to the buffer list yet + */ +static inline bool +radeon_cs_memory_below_limit(struct r600_common_screen *screen, + struct radeon_winsys_cs *cs, + uint64_t vram, uint64_t gtt) +{ + vram += cs->used_vram; + gtt += cs->used_gart; + + /* Anything that goes above the VRAM size should go to GTT. */ + if (vram > screen->info.vram_size) + gtt += vram - screen->info.vram_size; + + /* Now we just need to check if we have enough GTT. */ + return gtt < screen->info.gart_size * 0.7; +} /** * Add a buffer to the buffer list for the given command stream (CS). @@ -50,8 +73,44 @@ enum radeon_bo_priority priority) { assert(usage); - return rctx->ws->cs_add_buffer(ring->cs, rbo->buf, usage, - rbo->domains, priority) * 4; + return rctx->ws->cs_add_buffer( + ring->cs, rbo->buf, + (enum radeon_bo_usage)(usage | RADEON_USAGE_SYNCHRONIZED), + rbo->domains, priority) * 4; +} + +/** + * Same as above, but also checks memory usage and flushes the context + * accordingly. + * + * When this SHOULD NOT be used: + * + * - if r600_context_add_resource_size has been called for the buffer + * followed by *_need_cs_space for checking the memory usage + * + * - if r600_need_dma_space has been called for the buffer + * + * - when emitting state packets and draw packets (because preceding packets + * can't be re-emitted at that point) + * + * - if shader resource "enabled_mask" is not up-to-date or there is + * a different constraint disallowing a context flush + */ +static inline unsigned +radeon_add_to_buffer_list_check_mem(struct r600_common_context *rctx, + struct r600_ring *ring, + struct r600_resource *rbo, + enum radeon_bo_usage usage, + enum radeon_bo_priority priority, + bool check_mem) +{ + if (check_mem && + !radeon_cs_memory_below_limit(rctx->screen, ring->cs, + rctx->vram + rbo->vram_usage, + rctx->gtt + rbo->gart_usage)) + ring->flush(rctx, RADEON_FLUSH_ASYNC, NULL); + + return radeon_add_to_buffer_list(rctx, ring, rbo, usage, priority); } static inline void r600_emit_reloc(struct r600_common_context *rctx, @@ -72,7 +131,7 @@ static inline void radeon_set_config_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num) { assert(reg < R600_CONTEXT_REG_OFFSET); - assert(cs->cdw+2+num <= cs->max_dw); + assert(cs->current.cdw + 2 + num <= cs->current.max_dw); radeon_emit(cs, PKT3(PKT3_SET_CONFIG_REG, num, 0)); radeon_emit(cs, (reg - R600_CONFIG_REG_OFFSET) >> 2); } @@ -86,7 +145,7 @@ static inline void radeon_set_context_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num) { assert(reg >= R600_CONTEXT_REG_OFFSET); - assert(cs->cdw+2+num <= cs->max_dw); + assert(cs->current.cdw + 2 + num <= cs->current.max_dw); radeon_emit(cs, PKT3(PKT3_SET_CONTEXT_REG, num, 0)); radeon_emit(cs, (reg - R600_CONTEXT_REG_OFFSET) >> 2); } @@ -102,7 +161,7 @@ unsigned value) { assert(reg >= R600_CONTEXT_REG_OFFSET); - assert(cs->cdw + 3 <= cs->max_dw); + assert(cs->current.cdw + 3 <= cs->current.max_dw); radeon_emit(cs, PKT3(PKT3_SET_CONTEXT_REG, 1, 0)); radeon_emit(cs, (reg - R600_CONTEXT_REG_OFFSET) >> 2 | (idx << 28)); radeon_emit(cs, value); @@ -111,7 +170,7 @@ static inline void radeon_set_sh_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num) { assert(reg >= SI_SH_REG_OFFSET && reg < SI_SH_REG_END); - assert(cs->cdw+2+num <= cs->max_dw); + assert(cs->current.cdw + 2 + num <= cs->current.max_dw); radeon_emit(cs, PKT3(PKT3_SET_SH_REG, num, 0)); radeon_emit(cs, (reg - SI_SH_REG_OFFSET) >> 2); } @@ -125,7 +184,7 @@ static inline void radeon_set_uconfig_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num) { assert(reg >= CIK_UCONFIG_REG_OFFSET && reg < CIK_UCONFIG_REG_END); - assert(cs->cdw+2+num <= cs->max_dw); + assert(cs->current.cdw + 2 + num <= cs->current.max_dw); radeon_emit(cs, PKT3(PKT3_SET_UCONFIG_REG, num, 0)); radeon_emit(cs, (reg - CIK_UCONFIG_REG_OFFSET) >> 2); } @@ -141,7 +200,7 @@ unsigned value) { assert(reg >= CIK_UCONFIG_REG_OFFSET && reg < CIK_UCONFIG_REG_END); - assert(cs->cdw + 3 <= cs->max_dw); + assert(cs->current.cdw + 3 <= cs->current.max_dw); radeon_emit(cs, PKT3(PKT3_SET_UCONFIG_REG, 1, 0)); radeon_emit(cs, (reg - CIK_UCONFIG_REG_OFFSET) >> 2 | (idx << 28)); radeon_emit(cs, value); diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/r600d_common.h mesa-17.0.7/src/gallium/drivers/radeon/r600d_common.h --- mesa-12.0.6/src/gallium/drivers/radeon/r600d_common.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/r600d_common.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,247 +0,0 @@ -/* - * Copyright 2013 Advanced Micro Devices, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * on the rights to use, copy, modify, merge, publish, distribute, sub - * license, and/or sell copies of the Software, and to permit persons to whom - * the Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: Marek Olšák - */ - -#ifndef R600D_COMMON_H -#define R600D_COMMON_H - -#define R600_CONFIG_REG_OFFSET 0x08000 -#define R600_CONTEXT_REG_OFFSET 0x28000 -#define SI_SH_REG_OFFSET 0x0000B000 -#define SI_SH_REG_END 0x0000C000 -#define CIK_UCONFIG_REG_OFFSET 0x00030000 -#define CIK_UCONFIG_REG_END 0x00038000 - -#define PKT_TYPE_S(x) (((unsigned)(x) & 0x3) << 30) -#define PKT_COUNT_S(x) (((unsigned)(x) & 0x3FFF) << 16) -#define PKT3_IT_OPCODE_S(x) (((unsigned)(x) & 0xFF) << 8) -#define PKT3_PREDICATE(x) (((x) >> 0) & 0x1) -#define PKT3(op, count, predicate) (PKT_TYPE_S(3) | PKT_COUNT_S(count) | PKT3_IT_OPCODE_S(op) | PKT3_PREDICATE(predicate)) - -#define RADEON_CP_PACKET3_COMPUTE_MODE 0x00000002 - -#define PKT3_NOP 0x10 -#define PKT3_SET_PREDICATION 0x20 -#define PKT3_STRMOUT_BUFFER_UPDATE 0x34 -#define STRMOUT_STORE_BUFFER_FILLED_SIZE 1 -#define STRMOUT_OFFSET_SOURCE(x) (((unsigned)(x) & 0x3) << 1) -#define STRMOUT_OFFSET_FROM_PACKET 0 -#define STRMOUT_OFFSET_FROM_VGT_FILLED_SIZE 1 -#define STRMOUT_OFFSET_FROM_MEM 2 -#define STRMOUT_OFFSET_NONE 3 -#define STRMOUT_SELECT_BUFFER(x) (((unsigned)(x) & 0x3) << 8) -#define PKT3_WAIT_REG_MEM 0x3C -#define WAIT_REG_MEM_EQUAL 3 -#define WAIT_REG_MEM_MEM_SPACE(x) (((unsigned)(x) & 0x3) << 4) -#define PKT3_EVENT_WRITE 0x46 -#define PKT3_EVENT_WRITE_EOP 0x47 -#define EOP_DATA_SEL(x) ((x) << 29) - /* 0 - discard - * 1 - send low 32bit data - * 2 - send 64bit data - * 3 - send 64bit GPU counter value - * 4 - send 64bit sys counter value - */ -#define PKT3_SET_CONFIG_REG 0x68 -#define PKT3_SET_CONTEXT_REG 0x69 -#define PKT3_STRMOUT_BASE_UPDATE 0x72 /* r700 only */ -#define PKT3_SURFACE_BASE_UPDATE 0x73 /* r600 only */ -#define SURFACE_BASE_UPDATE_DEPTH (1 << 0) -#define SURFACE_BASE_UPDATE_COLOR(x) (2 << (x)) -#define SURFACE_BASE_UPDATE_COLOR_NUM(x) (((1 << x) - 1) << 1) -#define SURFACE_BASE_UPDATE_STRMOUT(x) (0x200 << (x)) -#define PKT3_SET_SH_REG 0x76 /* SI and later */ -#define PKT3_SET_UCONFIG_REG 0x79 /* CIK and later */ - -#define EVENT_TYPE_SAMPLE_STREAMOUTSTATS1 0x1 /* EG and later */ -#define EVENT_TYPE_SAMPLE_STREAMOUTSTATS2 0x2 /* EG and later */ -#define EVENT_TYPE_SAMPLE_STREAMOUTSTATS3 0x3 /* EG and later */ -#define EVENT_TYPE_PS_PARTIAL_FLUSH 0x10 -#define EVENT_TYPE_CACHE_FLUSH_AND_INV_TS_EVENT 0x14 -#define EVENT_TYPE_ZPASS_DONE 0x15 -#define EVENT_TYPE_CACHE_FLUSH_AND_INV_EVENT 0x16 -#define EVENT_TYPE_PERFCOUNTER_START 0x17 -#define EVENT_TYPE_PERFCOUNTER_STOP 0x18 -#define EVENT_TYPE_PIPELINESTAT_START 25 -#define EVENT_TYPE_PIPELINESTAT_STOP 26 -#define EVENT_TYPE_PERFCOUNTER_SAMPLE 0x1B -#define EVENT_TYPE_SAMPLE_PIPELINESTAT 30 -#define EVENT_TYPE_SO_VGTSTREAMOUT_FLUSH 0x1f -#define EVENT_TYPE_SAMPLE_STREAMOUTSTATS 0x20 -#define EVENT_TYPE_BOTTOM_OF_PIPE_TS 40 -#define EVENT_TYPE_FLUSH_AND_INV_DB_META 0x2c /* supported on r700+ */ -#define EVENT_TYPE_FLUSH_AND_INV_CB_META 46 /* supported on r700+ */ -#define EVENT_TYPE(x) ((x) << 0) -#define EVENT_INDEX(x) ((x) << 8) - /* 0 - any non-TS event - * 1 - ZPASS_DONE - * 2 - SAMPLE_PIPELINESTAT - * 3 - SAMPLE_STREAMOUTSTAT* - * 4 - *S_PARTIAL_FLUSH - * 5 - TS events - */ - -#define PREDICATION_OP_CLEAR 0x0 -#define PREDICATION_OP_ZPASS 0x1 -#define PREDICATION_OP_PRIMCOUNT 0x2 -#define PRED_OP(x) ((x) << 16) -#define PREDICATION_CONTINUE (1 << 31) -#define PREDICATION_HINT_WAIT (0 << 12) -#define PREDICATION_HINT_NOWAIT_DRAW (1 << 12) -#define PREDICATION_DRAW_NOT_VISIBLE (0 << 8) -#define PREDICATION_DRAW_VISIBLE (1 << 8) - -/* R600-R700*/ -#define R_008490_CP_STRMOUT_CNTL 0x008490 -#define S_008490_OFFSET_UPDATE_DONE(x) (((unsigned)(x) & 0x1) << 0) -#define R_028AB0_VGT_STRMOUT_EN 0x028AB0 -#define S_028AB0_STREAMOUT(x) (((unsigned)(x) & 0x1) << 0) -#define G_028AB0_STREAMOUT(x) (((x) >> 0) & 0x1) -#define C_028AB0_STREAMOUT 0xFFFFFFFE -#define R_028B20_VGT_STRMOUT_BUFFER_EN 0x028B20 -#define S_028B20_BUFFER_0_EN(x) (((unsigned)(x) & 0x1) << 0) -#define G_028B20_BUFFER_0_EN(x) (((x) >> 0) & 0x1) -#define C_028B20_BUFFER_0_EN 0xFFFFFFFE -#define S_028B20_BUFFER_1_EN(x) (((unsigned)(x) & 0x1) << 1) -#define G_028B20_BUFFER_1_EN(x) (((x) >> 1) & 0x1) -#define C_028B20_BUFFER_1_EN 0xFFFFFFFD -#define S_028B20_BUFFER_2_EN(x) (((unsigned)(x) & 0x1) << 2) -#define G_028B20_BUFFER_2_EN(x) (((x) >> 2) & 0x1) -#define C_028B20_BUFFER_2_EN 0xFFFFFFFB -#define S_028B20_BUFFER_3_EN(x) (((unsigned)(x) & 0x1) << 3) -#define G_028B20_BUFFER_3_EN(x) (((x) >> 3) & 0x1) -#define C_028B20_BUFFER_3_EN 0xFFFFFFF7 -#define R_028AD0_VGT_STRMOUT_BUFFER_SIZE_0 0x028AD0 - -#define V_0280A0_SWAP_STD 0x00000000 -#define V_0280A0_SWAP_ALT 0x00000001 -#define V_0280A0_SWAP_STD_REV 0x00000002 -#define V_0280A0_SWAP_ALT_REV 0x00000003 - -/* EG+ */ -#define R_0084FC_CP_STRMOUT_CNTL 0x0084FC -#define S_0084FC_OFFSET_UPDATE_DONE(x) (((unsigned)(x) & 0x1) << 0) -#define R_028B94_VGT_STRMOUT_CONFIG 0x028B94 -#define S_028B94_STREAMOUT_0_EN(x) (((unsigned)(x) & 0x1) << 0) -#define G_028B94_STREAMOUT_0_EN(x) (((x) >> 0) & 0x1) -#define C_028B94_STREAMOUT_0_EN 0xFFFFFFFE -#define S_028B94_STREAMOUT_1_EN(x) (((unsigned)(x) & 0x1) << 1) -#define G_028B94_STREAMOUT_1_EN(x) (((x) >> 1) & 0x1) -#define C_028B94_STREAMOUT_1_EN 0xFFFFFFFD -#define S_028B94_STREAMOUT_2_EN(x) (((unsigned)(x) & 0x1) << 2) -#define G_028B94_STREAMOUT_2_EN(x) (((x) >> 2) & 0x1) -#define C_028B94_STREAMOUT_2_EN 0xFFFFFFFB -#define S_028B94_STREAMOUT_3_EN(x) (((unsigned)(x) & 0x1) << 3) -#define G_028B94_STREAMOUT_3_EN(x) (((x) >> 3) & 0x1) -#define C_028B94_STREAMOUT_3_EN 0xFFFFFFF7 -#define S_028B94_RAST_STREAM(x) (((unsigned)(x) & 0x07) << 4) -#define G_028B94_RAST_STREAM(x) (((x) >> 4) & 0x07) -#define C_028B94_RAST_STREAM 0xFFFFFF8F -#define S_028B94_RAST_STREAM_MASK(x) (((unsigned)(x) & 0x0F) << 8) /* SI+ */ -#define G_028B94_RAST_STREAM_MASK(x) (((x) >> 8) & 0x0F) -#define C_028B94_RAST_STREAM_MASK 0xFFFFF0FF -#define S_028B94_USE_RAST_STREAM_MASK(x) (((unsigned)(x) & 0x1) << 31) /* SI+ */ -#define G_028B94_USE_RAST_STREAM_MASK(x) (((x) >> 31) & 0x1) -#define C_028B94_USE_RAST_STREAM_MASK 0x7FFFFFFF -#define R_028B98_VGT_STRMOUT_BUFFER_CONFIG 0x028B98 -#define S_028B98_STREAM_0_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028B98_STREAM_0_BUFFER_EN(x) (((x) >> 0) & 0x0F) -#define C_028B98_STREAM_0_BUFFER_EN 0xFFFFFFF0 -#define S_028B98_STREAM_1_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 4) -#define G_028B98_STREAM_1_BUFFER_EN(x) (((x) >> 4) & 0x0F) -#define C_028B98_STREAM_1_BUFFER_EN 0xFFFFFF0F -#define S_028B98_STREAM_2_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028B98_STREAM_2_BUFFER_EN(x) (((x) >> 8) & 0x0F) -#define C_028B98_STREAM_2_BUFFER_EN 0xFFFFF0FF -#define S_028B98_STREAM_3_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 12) -#define G_028B98_STREAM_3_BUFFER_EN(x) (((x) >> 12) & 0x0F) -#define C_028B98_STREAM_3_BUFFER_EN 0xFFFF0FFF - -#define EG_R_028A4C_PA_SC_MODE_CNTL_1 0x028A4C -#define EG_S_028A4C_PS_ITER_SAMPLE(x) (((unsigned)(x) & 0x1) << 16) -#define EG_S_028A4C_FORCE_EOV_CNTDWN_ENABLE(x) (((unsigned)(x) & 0x1) << 25) -#define EG_S_028A4C_FORCE_EOV_REZ_ENABLE(x) (((unsigned)(x) & 0x1) << 26) - -#define CM_R_028804_DB_EQAA 0x00028804 -#define S_028804_MAX_ANCHOR_SAMPLES(x) (((unsigned)(x) & 0x7) << 0) -#define S_028804_PS_ITER_SAMPLES(x) (((unsigned)(x) & 0x7) << 4) -#define S_028804_MASK_EXPORT_NUM_SAMPLES(x) (((unsigned)(x) & 0x7) << 8) -#define S_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((unsigned)(x) & 0x7) << 12) -#define S_028804_HIGH_QUALITY_INTERSECTIONS(x) (((unsigned)(x) & 0x1) << 16) -#define S_028804_INCOHERENT_EQAA_READS(x) (((unsigned)(x) & 0x1) << 17) -#define S_028804_INTERPOLATE_COMP_Z(x) (((unsigned)(x) & 0x1) << 18) -#define S_028804_INTERPOLATE_SRC_Z(x) (((unsigned)(x) & 0x1) << 19) -#define S_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((unsigned)(x) & 0x1) << 20) -#define S_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((unsigned)(x) & 0x1) << 21) -#define S_028804_OVERRASTERIZATION_AMOUNT(x) (((unsigned)(x) & 0x07) << 24) -#define S_028804_ENABLE_POSTZ_OVERRASTERIZATION(x) (((unsigned)(x) & 0x1) << 27) -#define CM_R_028BDC_PA_SC_LINE_CNTL 0x28bdc -#define S_028BDC_EXPAND_LINE_WIDTH(x) (((unsigned)(x) & 0x1) << 9) -#define G_028BDC_EXPAND_LINE_WIDTH(x) (((x) >> 9) & 0x1) -#define C_028BDC_EXPAND_LINE_WIDTH 0xFFFFFDFF -#define S_028BDC_LAST_PIXEL(x) (((unsigned)(x) & 0x1) << 10) -#define G_028BDC_LAST_PIXEL(x) (((x) >> 10) & 0x1) -#define C_028BDC_LAST_PIXEL 0xFFFFFBFF -#define CM_R_028BE0_PA_SC_AA_CONFIG 0x28be0 -#define S_028BE0_MSAA_NUM_SAMPLES(x) (((unsigned)(x) & 0x7) << 0) -#define S_028BE0_AA_MASK_CENTROID_DTMN(x) (((unsigned)(x) & 0x1) << 4) -#define S_028BE0_MAX_SAMPLE_DIST(x) (((unsigned)(x) & 0xf) << 13) -#define S_028BE0_MSAA_EXPOSED_SAMPLES(x) (((unsigned)(x) & 0x7) << 20) -#define S_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((unsigned)(x) & 0x3) << 24) -#define CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 0x28bf8 -#define CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0 0x28c08 -#define CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0 0x28c18 -#define CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0 0x28c28 - -#define EG_S_028C70_FAST_CLEAR(x) (((unsigned)(x) & 0x1) << 17) -#define SI_S_028C70_FAST_CLEAR(x) (((unsigned)(x) & 0x1) << 13) -#define VI_S_028C70_DCC_ENABLE(x) (((unsigned)(x) & 0x1) << 28) - -/*CIK+*/ -#define R_0300FC_CP_STRMOUT_CNTL 0x0300FC - -#define R600_R_028C0C_PA_CL_GB_VERT_CLIP_ADJ 0x028C0C -#define CM_R_028BE8_PA_CL_GB_VERT_CLIP_ADJ 0x28be8 -#define R_02843C_PA_CL_VPORT_XSCALE 0x02843C - -#define R_028250_PA_SC_VPORT_SCISSOR_0_TL 0x028250 -#define S_028250_TL_X(x) (((unsigned)(x) & 0x7FFF) << 0) -#define G_028250_TL_X(x) (((x) >> 0) & 0x7FFF) -#define C_028250_TL_X 0xFFFF8000 -#define S_028250_TL_Y(x) (((unsigned)(x) & 0x7FFF) << 16) -#define G_028250_TL_Y(x) (((x) >> 16) & 0x7FFF) -#define C_028250_TL_Y 0x8000FFFF -#define S_028250_WINDOW_OFFSET_DISABLE(x) (((unsigned)(x) & 0x1) << 31) -#define G_028250_WINDOW_OFFSET_DISABLE(x) (((x) >> 31) & 0x1) -#define C_028250_WINDOW_OFFSET_DISABLE 0x7FFFFFFF -#define S_028254_BR_X(x) (((unsigned)(x) & 0x7FFF) << 0) -#define G_028254_BR_X(x) (((x) >> 0) & 0x7FFF) -#define C_028254_BR_X 0xFFFF8000 -#define S_028254_BR_Y(x) (((unsigned)(x) & 0x7FFF) << 16) -#define G_028254_BR_Y(x) (((x) >> 16) & 0x7FFF) -#define C_028254_BR_Y 0x8000FFFF -#define R_0282D0_PA_SC_VPORT_ZMIN_0 0x0282D0 -#define R_0282D4_PA_SC_VPORT_ZMAX_0 0x0282D4 - -#endif diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/r600_gpu_load.c mesa-17.0.7/src/gallium/drivers/radeon/r600_gpu_load.c --- mesa-12.0.6/src/gallium/drivers/radeon/r600_gpu_load.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/r600_gpu_load.c 2017-06-01 10:37:10.000000000 +0000 @@ -42,14 +42,25 @@ #define SAMPLES_PER_SEC 10000 #define GRBM_STATUS 0x8010 +#define SPI_BUSY(x) (((x) >> 22) & 0x1) #define GUI_ACTIVE(x) (((x) >> 31) & 0x1) -static bool r600_is_gpu_busy(struct r600_common_screen *rscreen) +static void r600_update_grbm_counters(struct r600_common_screen *rscreen, + union r600_grbm_counters *counters) { uint32_t value = 0; rscreen->ws->read_registers(rscreen->ws, GRBM_STATUS, 1, &value); - return GUI_ACTIVE(value); + + if (SPI_BUSY(value)) + p_atomic_inc(&counters->named.spi_busy); + else + p_atomic_inc(&counters->named.spi_idle); + + if (GUI_ACTIVE(value)) + p_atomic_inc(&counters->named.gui_busy); + else + p_atomic_inc(&counters->named.gui_idle); } static PIPE_THREAD_ROUTINE(r600_gpu_load_thread, param) @@ -77,10 +88,7 @@ last_time = cur_time; /* Update the counters. */ - if (r600_is_gpu_busy(rscreen)) - p_atomic_inc(&rscreen->gpu_load_counter_busy); - else - p_atomic_inc(&rscreen->gpu_load_counter_idle); + r600_update_grbm_counters(rscreen, &rscreen->grbm_counters); } p_atomic_dec(&rscreen->gpu_load_stop_thread); return 0; @@ -96,7 +104,8 @@ rscreen->gpu_load_thread = 0; } -static uint64_t r600_gpu_load_read_counter(struct r600_common_screen *rscreen) +static uint64_t r600_read_counter(struct r600_common_screen *rscreen, + unsigned busy_index) { /* Start the thread if needed. */ if (!rscreen->gpu_load_thread) { @@ -108,34 +117,55 @@ pipe_mutex_unlock(rscreen->gpu_load_mutex); } - /* The busy counter is in the lower 32 bits. - * The idle counter is in the upper 32 bits. */ - return p_atomic_read(&rscreen->gpu_load_counter_busy) | - ((uint64_t)p_atomic_read(&rscreen->gpu_load_counter_idle) << 32); -} + unsigned busy = p_atomic_read(&rscreen->grbm_counters.array[busy_index]); + unsigned idle = p_atomic_read(&rscreen->grbm_counters.array[busy_index + 1]); -/** - * Just return the counters. - */ -uint64_t r600_gpu_load_begin(struct r600_common_screen *rscreen) -{ - return r600_gpu_load_read_counter(rscreen); + return busy | ((uint64_t)idle << 32); } -unsigned r600_gpu_load_end(struct r600_common_screen *rscreen, uint64_t begin) +static unsigned r600_end_counter(struct r600_common_screen *rscreen, + uint64_t begin, unsigned busy_index) { - uint64_t end = r600_gpu_load_read_counter(rscreen); + uint64_t end = r600_read_counter(rscreen, busy_index); unsigned busy = (end & 0xffffffff) - (begin & 0xffffffff); unsigned idle = (end >> 32) - (begin >> 32); - /* Calculate the GPU load. + /* Calculate the % of time the busy counter was being incremented. * - * If no counters have been incremented, return the current load. + * If no counters were incremented, return the current counter status. * It's for the case when the load is queried faster than * the counters are updated. */ - if (idle || busy) + if (idle || busy) { return busy*100 / (busy + idle); - else - return r600_is_gpu_busy(rscreen) ? 100 : 0; + } else { + union r600_grbm_counters counters; + + memset(&counters, 0, sizeof(counters)); + r600_update_grbm_counters(rscreen, &counters); + return counters.array[busy_index] ? 100 : 0; + } +} + +#define BUSY_INDEX(rscreen, field) (&rscreen->grbm_counters.named.field##_busy - \ + rscreen->grbm_counters.array) + +uint64_t r600_begin_counter_spi(struct r600_common_screen *rscreen) +{ + return r600_read_counter(rscreen, BUSY_INDEX(rscreen, spi)); +} + +unsigned r600_end_counter_spi(struct r600_common_screen *rscreen, uint64_t begin) +{ + return r600_end_counter(rscreen, begin, BUSY_INDEX(rscreen, spi)); +} + +uint64_t r600_begin_counter_gui(struct r600_common_screen *rscreen) +{ + return r600_read_counter(rscreen, BUSY_INDEX(rscreen, gui)); +} + +unsigned r600_end_counter_gui(struct r600_common_screen *rscreen, uint64_t begin) +{ + return r600_end_counter(rscreen, begin, BUSY_INDEX(rscreen, gui)); } diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/r600_perfcounter.c mesa-17.0.7/src/gallium/drivers/radeon/r600_perfcounter.c --- mesa-12.0.6/src/gallium/drivers/radeon/r600_perfcounter.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/r600_perfcounter.c 2017-06-01 10:37:10.000000000 +0000 @@ -28,7 +28,7 @@ #include "util/u_memory.h" #include "r600_query.h" #include "r600_pipe_common.h" -#include "r600d_common.h" +#include "amd/common/r600d_common.h" /* Max counters per HW block */ #define R600_QUERY_MAX_COUNTERS 16 @@ -115,6 +115,14 @@ r600_query_hw_destroy(ctx, rquery); } +static bool r600_pc_query_prepare_buffer(struct r600_common_context *ctx, + struct r600_query_hw *hwquery, + struct r600_resource *buffer) +{ + /* no-op */ + return true; +} + static void r600_pc_query_emit_start(struct r600_common_context *ctx, struct r600_query_hw *hwquery, struct r600_resource *buffer, uint64_t va) @@ -215,6 +223,7 @@ }; static struct r600_query_hw_ops batch_query_hw_ops = { + .prepare_buffer = r600_pc_query_prepare_buffer, .emit_start = r600_pc_query_emit_start, .emit_stop = r600_pc_query_emit_stop, .clear_result = r600_pc_query_clear_result, @@ -418,8 +427,8 @@ return NULL; } -static boolean r600_init_block_names(struct r600_common_screen *screen, - struct r600_perfcounter_block *block) +static bool r600_init_block_names(struct r600_common_screen *screen, + struct r600_perfcounter_block *block) { unsigned i, j, k; unsigned groups_shader = 1, groups_se = 1, groups_instance = 1; @@ -452,7 +461,7 @@ block->group_names = MALLOC(block->num_groups * block->group_name_stride); if (!block->group_names) - return FALSE; + return false; groupname = block->group_names; for (i = 0; i < groups_shader; ++i) { @@ -487,7 +496,7 @@ block->selector_names = MALLOC(block->num_groups * block->num_selectors * block->selector_name_stride); if (!block->selector_names) - return FALSE; + return false; groupname = block->group_names; p = block->selector_names; @@ -499,7 +508,7 @@ groupname += block->group_name_stride; } - return TRUE; + return true; } int r600_get_perfcounter_info(struct r600_common_screen *screen, @@ -536,7 +545,7 @@ info->query_type = R600_QUERY_FIRST_PERFCOUNTER + index; info->max_value.u64 = 0; info->type = PIPE_DRIVER_QUERY_TYPE_UINT64; - info->result_type = PIPE_DRIVER_QUERY_RESULT_TYPE_CUMULATIVE; + info->result_type = PIPE_DRIVER_QUERY_RESULT_TYPE_AVERAGE; info->group_id = base_gid + sub / block->num_selectors; info->flags = PIPE_DRIVER_QUERY_FLAG_BATCH; if (sub > 0 && sub + 1 < block->num_selectors * block->num_groups) @@ -577,17 +586,17 @@ rscreen->perfcounters->cleanup(rscreen); } -boolean r600_perfcounters_init(struct r600_perfcounters *pc, - unsigned num_blocks) +bool r600_perfcounters_init(struct r600_perfcounters *pc, + unsigned num_blocks) { pc->blocks = CALLOC(num_blocks, sizeof(struct r600_perfcounter_block)); if (!pc->blocks) - return FALSE; + return false; - pc->separate_se = debug_get_bool_option("RADEON_PC_SEPARATE_SE", FALSE); - pc->separate_instance = debug_get_bool_option("RADEON_PC_SEPARATE_INSTANCE", FALSE); + pc->separate_se = debug_get_bool_option("RADEON_PC_SEPARATE_SE", false); + pc->separate_instance = debug_get_bool_option("RADEON_PC_SEPARATE_INSTANCE", false); - return TRUE; + return true; } void r600_perfcounters_add_block(struct r600_common_screen *rscreen, diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/r600_pipe_common.c mesa-17.0.7/src/gallium/drivers/radeon/r600_pipe_common.c --- mesa-12.0.6/src/gallium/drivers/radeon/r600_pipe_common.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/r600_pipe_common.c 2017-06-01 10:37:10.000000000 +0000 @@ -43,10 +43,20 @@ #define HAVE_LLVM 0 #endif +#ifndef MESA_LLVM_VERSION_PATCH +#define MESA_LLVM_VERSION_PATCH 0 +#endif + struct r600_multi_fence { struct pipe_reference reference; struct pipe_fence_handle *gfx; struct pipe_fence_handle *sdma; + + /* If the context wasn't flushed at fence creation, this is non-NULL. */ + struct { + struct r600_common_context *ctx; + unsigned ib_index; + } gfx_unflushed; }; /* @@ -67,12 +77,89 @@ FREE(b->global_symbol_offsets); FREE(b->relocs); FREE(b->disasm_string); + FREE(b->llvm_ir_string); } /* * pipe_context */ +/** + * Write an EOP event. + * + * \param event EVENT_TYPE_* + * \param event_flags Optional cache flush flags (TC) + * \param data_sel 1 = fence, 3 = timestamp + * \param buf Buffer + * \param va GPU address + * \param old_value Previous fence value (for a bug workaround) + * \param new_value Fence value to write for this event. + */ +void r600_gfx_write_event_eop(struct r600_common_context *ctx, + unsigned event, unsigned event_flags, + unsigned data_sel, + struct r600_resource *buf, uint64_t va, + uint32_t old_fence, uint32_t new_fence) +{ + struct radeon_winsys_cs *cs = ctx->gfx.cs; + unsigned op = EVENT_TYPE(event) | + EVENT_INDEX(5) | + event_flags; + + if (ctx->chip_class == CIK || + ctx->chip_class == VI) { + /* Two EOP events are required to make all engines go idle + * (and optional cache flushes executed) before the timestamp + * is written. + */ + radeon_emit(cs, PKT3(PKT3_EVENT_WRITE_EOP, 4, 0)); + radeon_emit(cs, op); + radeon_emit(cs, va); + radeon_emit(cs, ((va >> 32) & 0xffff) | EOP_DATA_SEL(data_sel)); + radeon_emit(cs, old_fence); /* immediate data */ + radeon_emit(cs, 0); /* unused */ + } + + radeon_emit(cs, PKT3(PKT3_EVENT_WRITE_EOP, 4, 0)); + radeon_emit(cs, op); + radeon_emit(cs, va); + radeon_emit(cs, ((va >> 32) & 0xffff) | EOP_DATA_SEL(data_sel)); + radeon_emit(cs, new_fence); /* immediate data */ + radeon_emit(cs, 0); /* unused */ + + if (buf) + r600_emit_reloc(ctx, &ctx->gfx, buf, RADEON_USAGE_WRITE, + RADEON_PRIO_QUERY); +} + +unsigned r600_gfx_write_fence_dwords(struct r600_common_screen *screen) +{ + unsigned dwords = 6; + + if (screen->chip_class == CIK || + screen->chip_class == VI) + dwords *= 2; + + if (!screen->info.has_virtual_memory) + dwords += 2; + + return dwords; +} + +void r600_gfx_wait_fence(struct r600_common_context *ctx, + uint64_t va, uint32_t ref, uint32_t mask) +{ + struct radeon_winsys_cs *cs = ctx->gfx.cs; + + radeon_emit(cs, PKT3(PKT3_WAIT_REG_MEM, 5, 0)); + radeon_emit(cs, WAIT_REG_MEM_EQUAL | WAIT_REG_MEM_MEM_SPACE(1)); + radeon_emit(cs, va); + radeon_emit(cs, va >> 32); + radeon_emit(cs, ref); /* reference value */ + radeon_emit(cs, mask); /* mask */ + radeon_emit(cs, 4); /* poll interval */ +} + void r600_draw_rectangle(struct blitter_context *blitter, int x1, int y1, int x2, int y2, float depth, enum blitter_attrib_type type, @@ -137,22 +224,34 @@ pipe_resource_reference(&buf, NULL); } +static void r600_dma_emit_wait_idle(struct r600_common_context *rctx) +{ + struct radeon_winsys_cs *cs = rctx->dma.cs; + + /* NOP waits for idle on Evergreen and later. */ + if (rctx->chip_class >= CIK) + radeon_emit(cs, 0x00000000); /* NOP */ + else if (rctx->chip_class >= EVERGREEN) + radeon_emit(cs, 0xf0000000); /* NOP */ + else { + /* TODO: R600-R700 should use the FENCE packet. + * CS checker support is required. */ + } +} + void r600_need_dma_space(struct r600_common_context *ctx, unsigned num_dw, struct r600_resource *dst, struct r600_resource *src) { - uint64_t vram = 0, gtt = 0; + uint64_t vram = ctx->dma.cs->used_vram; + uint64_t gtt = ctx->dma.cs->used_gart; if (dst) { - if (dst->domains & RADEON_DOMAIN_VRAM) - vram += dst->buf->size; - else if (dst->domains & RADEON_DOMAIN_GTT) - gtt += dst->buf->size; + vram += dst->vram_usage; + gtt += dst->gart_usage; } if (src) { - if (src->domains & RADEON_DOMAIN_VRAM) - vram += src->buf->size; - else if (src->domains & RADEON_DOMAIN_GTT) - gtt += src->buf->size; + vram += src->vram_usage; + gtt += src->gart_usage; } /* Flush the GFX IB if DMA depends on it. */ @@ -167,13 +266,35 @@ /* Flush if there's not enough space, or if the memory usage per IB * is too large. + * + * IBs using too little memory are limited by the IB submission overhead. + * IBs using too much memory are limited by the kernel/TTM overhead. + * Too long IBs create CPU-GPU pipeline bubbles and add latency. + * + * This heuristic makes sure that DMA requests are executed + * very soon after the call is made and lowers memory usage. + * It improves texture upload performance by keeping the DMA + * engine busy while uploads are being submitted. */ - if ((num_dw + ctx->dma.cs->cdw) > ctx->dma.cs->max_dw || - !ctx->ws->cs_memory_below_limit(ctx->dma.cs, vram, gtt)) { + num_dw++; /* for emit_wait_idle below */ + if (!ctx->ws->cs_check_space(ctx->dma.cs, num_dw) || + ctx->dma.cs->used_vram + ctx->dma.cs->used_gart > 64 * 1024 * 1024 || + !radeon_cs_memory_below_limit(ctx->screen, ctx->dma.cs, vram, gtt)) { ctx->dma.flush(ctx, RADEON_FLUSH_ASYNC, NULL); - assert((num_dw + ctx->dma.cs->cdw) <= ctx->dma.cs->max_dw); + assert((num_dw + ctx->dma.cs->current.cdw) <= ctx->dma.cs->current.max_dw); } + /* Wait for idle if either buffer has been used in the IB before to + * prevent read-after-write hazards. + */ + if ((dst && + ctx->ws->cs_is_buffer_referenced(ctx->dma.cs, dst->buf, + RADEON_USAGE_READWRITE)) || + (src && + ctx->ws->cs_is_buffer_referenced(ctx->dma.cs, src->buf, + RADEON_USAGE_WRITE))) + r600_dma_emit_wait_idle(ctx); + /* If GPUVM is not supported, the CS checker needs 2 entries * in the buffer list per packet, which has to be done manually. */ @@ -187,44 +308,9 @@ RADEON_USAGE_READ, RADEON_PRIO_SDMA_BUFFER); } -} -/* This is required to prevent read-after-write hazards. */ -void r600_dma_emit_wait_idle(struct r600_common_context *rctx) -{ - struct radeon_winsys_cs *cs = rctx->dma.cs; - - /* done at the end of DMA calls, so increment this. */ - rctx->num_dma_calls++; - - /* IBs using too little memory are limited by the IB submission overhead. - * IBs using too much memory are limited by the kernel/TTM overhead. - * Too long IBs create CPU-GPU pipeline bubbles and add latency. - * - * This heuristic makes sure that DMA requests are executed - * very soon after the call is made and lowers memory usage. - * It improves texture upload performance by keeping the DMA - * engine busy while uploads are being submitted. - */ - if (rctx->ws->cs_query_memory_usage(rctx->dma.cs) > 64 * 1024 * 1024) { - rctx->dma.flush(rctx, RADEON_FLUSH_ASYNC, NULL); - return; - } - - r600_need_dma_space(rctx, 1, NULL, NULL); - - if (!radeon_emitted(cs, 0)) /* empty queue */ - return; - - /* NOP waits for idle on Evergreen and later. */ - if (rctx->chip_class >= CIK) - radeon_emit(cs, 0x00000000); /* NOP */ - else if (rctx->chip_class >= EVERGREEN) - radeon_emit(cs, 0xf0000000); /* NOP */ - else { - /* TODO: R600-R700 should use the FENCE packet. - * CS checker support is required. */ - } + /* this function is called before all DMA calls, so increment this. */ + ctx->num_dma_calls++; } static void r600_memory_barrier(struct pipe_context *ctx, unsigned flags) @@ -262,29 +348,57 @@ { struct pipe_screen *screen = ctx->screen; struct r600_common_context *rctx = (struct r600_common_context *)ctx; + struct radeon_winsys *ws = rctx->ws; unsigned rflags = 0; struct pipe_fence_handle *gfx_fence = NULL; struct pipe_fence_handle *sdma_fence = NULL; + bool deferred_fence = false; if (flags & PIPE_FLUSH_END_OF_FRAME) rflags |= RADEON_FLUSH_END_OF_FRAME; + if (flags & PIPE_FLUSH_DEFERRED) + rflags |= RADEON_FLUSH_ASYNC; - if (rctx->dma.cs) { + /* DMA IBs are preambles to gfx IBs, therefore must be flushed first. */ + if (rctx->dma.cs) rctx->dma.flush(rctx, rflags, fence ? &sdma_fence : NULL); + + if (!radeon_emitted(rctx->gfx.cs, rctx->initial_gfx_cs_size)) { + if (fence) + ws->fence_reference(&gfx_fence, rctx->last_gfx_fence); + if (!(rflags & RADEON_FLUSH_ASYNC)) + ws->cs_sync_flush(rctx->gfx.cs); + } else { + /* Instead of flushing, create a deferred fence. Constraints: + * - The state tracker must allow a deferred flush. + * - The state tracker must request a fence. + * Thread safety in fence_finish must be ensured by the state tracker. + */ + if (flags & PIPE_FLUSH_DEFERRED && fence) { + gfx_fence = rctx->ws->cs_get_next_fence(rctx->gfx.cs); + deferred_fence = true; + } else { + rctx->gfx.flush(rctx, rflags, fence ? &gfx_fence : NULL); + } } - rctx->gfx.flush(rctx, rflags, fence ? &gfx_fence : NULL); /* Both engines can signal out of order, so we need to keep both fences. */ - if (gfx_fence || sdma_fence) { + if (fence) { struct r600_multi_fence *multi_fence = CALLOC_STRUCT(r600_multi_fence); if (!multi_fence) return; multi_fence->reference.count = 1; + /* If both fences are NULL, fence_finish will always return true. */ multi_fence->gfx = gfx_fence; multi_fence->sdma = sdma_fence; + if (deferred_fence) { + multi_fence->gfx_unflushed.ctx = rctx; + multi_fence->gfx_unflushed.ib_index = rctx->num_gfx_cs_flushes; + } + screen->fence_reference(screen, fence, NULL); *fence = (struct pipe_fence_handle*)multi_fence; } @@ -295,11 +409,81 @@ { struct r600_common_context *rctx = (struct r600_common_context *)ctx; struct radeon_winsys_cs *cs = rctx->dma.cs; + struct radeon_saved_cs saved; + bool check_vm = + (rctx->screen->debug_flags & DBG_CHECK_VM) && + rctx->check_vm_faults; + + if (!radeon_emitted(cs, 0)) { + if (fence) + rctx->ws->fence_reference(fence, rctx->last_sdma_fence); + return; + } + + if (check_vm) + radeon_save_cs(rctx->ws, cs, &saved); - if (radeon_emitted(cs, 0)) - rctx->ws->cs_flush(cs, flags, &rctx->last_sdma_fence); + rctx->ws->cs_flush(cs, flags, &rctx->last_sdma_fence); if (fence) rctx->ws->fence_reference(fence, rctx->last_sdma_fence); + + if (check_vm) { + /* Use conservative timeout 800ms, after which we won't wait any + * longer and assume the GPU is hung. + */ + rctx->ws->fence_wait(rctx->ws, rctx->last_sdma_fence, 800*1000*1000); + + rctx->check_vm_faults(rctx, &saved, RING_DMA); + radeon_clear_saved_cs(&saved); + } +} + +/** + * Store a linearized copy of all chunks of \p cs together with the buffer + * list in \p saved. + */ +void radeon_save_cs(struct radeon_winsys *ws, struct radeon_winsys_cs *cs, + struct radeon_saved_cs *saved) +{ + void *buf; + unsigned i; + + /* Save the IB chunks. */ + saved->num_dw = cs->prev_dw + cs->current.cdw; + saved->ib = MALLOC(4 * saved->num_dw); + if (!saved->ib) + goto oom; + + buf = saved->ib; + for (i = 0; i < cs->num_prev; ++i) { + memcpy(buf, cs->prev[i].buf, cs->prev[i].cdw * 4); + buf += cs->prev[i].cdw; + } + memcpy(buf, cs->current.buf, cs->current.cdw * 4); + + /* Save the buffer list. */ + saved->bo_count = ws->cs_get_buffer_list(cs, NULL); + saved->bo_list = CALLOC(saved->bo_count, + sizeof(saved->bo_list[0])); + if (!saved->bo_list) { + FREE(saved->ib); + goto oom; + } + ws->cs_get_buffer_list(cs, saved->bo_list); + + return; + +oom: + fprintf(stderr, "%s: out of memory\n", __func__); + memset(saved, 0, sizeof(*saved)); +} + +void radeon_clear_saved_cs(struct radeon_saved_cs *saved) +{ + FREE(saved->ib); + FREE(saved->bo_list); + + memset(saved, 0, sizeof(*saved)); } static enum pipe_reset_status r600_get_reset_status(struct pipe_context *ctx) @@ -326,12 +510,51 @@ memset(&rctx->debug, 0, sizeof(rctx->debug)); } +static void r600_set_device_reset_callback(struct pipe_context *ctx, + const struct pipe_device_reset_callback *cb) +{ + struct r600_common_context *rctx = (struct r600_common_context *)ctx; + + if (cb) + rctx->device_reset_callback = *cb; + else + memset(&rctx->device_reset_callback, 0, + sizeof(rctx->device_reset_callback)); +} + +bool r600_check_device_reset(struct r600_common_context *rctx) +{ + enum pipe_reset_status status; + + if (!rctx->device_reset_callback.reset) + return false; + + if (!rctx->b.get_device_reset_status) + return false; + + status = rctx->b.get_device_reset_status(&rctx->b); + if (status == PIPE_NO_RESET) + return false; + + rctx->device_reset_callback.reset(rctx->device_reset_callback.data, status); + return true; +} + +static void r600_dma_clear_buffer_fallback(struct pipe_context *ctx, + struct pipe_resource *dst, + uint64_t offset, uint64_t size, + unsigned value) +{ + struct r600_common_context *rctx = (struct r600_common_context *)ctx; + + rctx->clear_buffer(ctx, dst, offset, size, value, R600_COHERENCY_NONE); +} + bool r600_common_context_init(struct r600_common_context *rctx, - struct r600_common_screen *rscreen) + struct r600_common_screen *rscreen, + unsigned context_flags) { - util_slab_create(&rctx->pool_transfers, - sizeof(struct r600_transfer), 64, - UTIL_SLAB_SINGLETHREADED); + slab_create_child(&rctx->pool_transfers, &rscreen->pool_transfers); rctx->screen = rscreen; rctx->ws = rscreen->ws; @@ -349,10 +572,20 @@ rctx->b.transfer_map = u_transfer_map_vtbl; rctx->b.transfer_flush_region = u_transfer_flush_region_vtbl; rctx->b.transfer_unmap = u_transfer_unmap_vtbl; - rctx->b.transfer_inline_write = u_default_transfer_inline_write; - rctx->b.memory_barrier = r600_memory_barrier; + rctx->b.texture_subdata = u_default_texture_subdata; + rctx->b.memory_barrier = r600_memory_barrier; rctx->b.flush = r600_flush_from_st; rctx->b.set_debug_callback = r600_set_debug_callback; + rctx->dma_clear_buffer = r600_dma_clear_buffer_fallback; + + /* evergreen_compute.c has a special codepath for global buffers. + * Everything else can use the direct path. + */ + if ((rscreen->chip_class == EVERGREEN || rscreen->chip_class == CAYMAN) && + (context_flags & PIPE_CONTEXT_COMPUTE_ONLY)) + rctx->b.buffer_subdata = u_default_buffer_subdata; + else + rctx->b.buffer_subdata = r600_buffer_subdata; if (rscreen->info.drm_major == 2 && rscreen->info.drm_minor >= 43) { rctx->b.get_device_reset_status = r600_get_reset_status; @@ -361,7 +594,7 @@ RADEON_GPU_RESET_COUNTER); } - LIST_INITHEAD(&rctx->texture_buffers); + rctx->b.set_device_reset_callback = r600_set_device_reset_callback; r600_init_context_texture_functions(rctx); r600_init_viewport_functions(rctx); @@ -369,10 +602,10 @@ r600_query_init(rctx); cayman_init_msaa(&rctx->b); - rctx->allocator_so_filled_size = + rctx->allocator_zeroed_memory = u_suballocator_create(&rctx->b, rscreen->info.gart_page_size, - 4, 0, PIPE_USAGE_DEFAULT, TRUE); - if (!rctx->allocator_so_filled_size) + 0, PIPE_USAGE_DEFAULT, true); + if (!rctx->allocator_zeroed_memory) return false; rctx->uploader = u_upload_create(&rctx->b, 1024 * 1024, @@ -397,6 +630,23 @@ void r600_common_context_cleanup(struct r600_common_context *rctx) { + unsigned i,j; + + /* Release DCC stats. */ + for (i = 0; i < ARRAY_SIZE(rctx->dcc_stats); i++) { + assert(!rctx->dcc_stats[i].query_active); + + for (j = 0; j < ARRAY_SIZE(rctx->dcc_stats[i].ps_stats); j++) + if (rctx->dcc_stats[i].ps_stats[j]) + rctx->b.destroy_query(&rctx->b, + rctx->dcc_stats[i].ps_stats[j]); + + r600_texture_reference(&rctx->dcc_stats[i].tex, NULL); + } + + if (rctx->query_result_shader) + rctx->b.delete_compute_state(&rctx->b, rctx->query_result_shader); + if (rctx->gfx.cs) rctx->ws->cs_destroy(rctx->gfx.cs); if (rctx->dma.cs) @@ -408,36 +658,15 @@ u_upload_destroy(rctx->uploader); } - util_slab_destroy(&rctx->pool_transfers); + slab_destroy_child(&rctx->pool_transfers); - if (rctx->allocator_so_filled_size) { - u_suballocator_destroy(rctx->allocator_so_filled_size); + if (rctx->allocator_zeroed_memory) { + u_suballocator_destroy(rctx->allocator_zeroed_memory); } + rctx->ws->fence_reference(&rctx->last_gfx_fence, NULL); rctx->ws->fence_reference(&rctx->last_sdma_fence, NULL); } -void r600_context_add_resource_size(struct pipe_context *ctx, struct pipe_resource *r) -{ - struct r600_common_context *rctx = (struct r600_common_context *)ctx; - struct r600_resource *rr = (struct r600_resource *)r; - - if (!r) { - return; - } - - /* - * The idea is to compute a gross estimate of memory requirement of - * each draw call. After each draw call, memory will be precisely - * accounted. So the uncertainty is only on the current draw call. - * In practice this gave very good estimate (+/- 10% of the target - * memory limit). - */ - if (rr->domains & RADEON_DOMAIN_VRAM) - rctx->vram += rr->buf->size; - else if (rr->domains & RADEON_DOMAIN_GTT) - rctx->gtt += rr->buf->size; -} - /* * pipe_screen */ @@ -461,6 +690,8 @@ { "notgsi", DBG_NO_TGSI, "Don't print the TGSI"}, { "noasm", DBG_NO_ASM, "Don't print disassembled shaders"}, { "preoptir", DBG_PREOPT_IR, "Print the LLVM IR before initial optimizations" }, + { "checkir", DBG_CHECK_IR, "Enable additional sanity checks on shader IR" }, + { "nooptvariant", DBG_NO_OPT_VARIANT, "Disable compiling optimized shader variants." }, { "testdma", DBG_TEST_DMA, "Invoke SDMA tests and exit." }, @@ -482,6 +713,8 @@ { "sisched", DBG_SI_SCHED, "Enable LLVM SI Machine Instruction Scheduler." }, { "mono", DBG_MONOLITHIC_SHADERS, "Use old-style monolithic shaders compiled on demand" }, { "noce", DBG_NO_CE, "Disable the constant engine"}, + { "unsafemath", DBG_UNSAFE_MATH, "Enable unsafe math shader optimizations" }, + { "nodccfb", DBG_NO_DCC_FB, "Disable separate DCC on the main framebuffer" }, DEBUG_NAMED_VALUE_END /* must be last */ }; @@ -540,6 +773,7 @@ case CHIP_FIJI: return "AMD FIJI"; case CHIP_POLARIS10: return "AMD POLARIS10"; case CHIP_POLARIS11: return "AMD POLARIS11"; + case CHIP_POLARIS12: return "AMD POLARIS12"; case CHIP_STONEY: return "AMD STONEY"; default: return "AMD unknown"; } @@ -664,21 +898,17 @@ case CHIP_TONGA: return "tonga"; case CHIP_ICELAND: return "iceland"; case CHIP_CARRIZO: return "carrizo"; -#if HAVE_LLVM <= 0x0307 - case CHIP_FIJI: return "tonga"; - case CHIP_STONEY: return "carrizo"; -#else - case CHIP_FIJI: return "fiji"; - case CHIP_STONEY: return "stoney"; -#endif -#if HAVE_LLVM <= 0x0308 - case CHIP_POLARIS10: return "tonga"; - case CHIP_POLARIS11: return "tonga"; -#else - case CHIP_POLARIS10: return "polaris10"; - case CHIP_POLARIS11: return "polaris11"; -#endif - default: return ""; + case CHIP_FIJI: + return HAVE_LLVM >= 0x0308 ? "fiji" : "carrizo"; + case CHIP_STONEY: + return HAVE_LLVM >= 0x0308 ? "stoney" : "carrizo"; + case CHIP_POLARIS10: + return HAVE_LLVM >= 0x0309 ? "polaris10" : "carrizo"; + case CHIP_POLARIS11: + case CHIP_POLARIS12: /* same as polaris11 */ + return HAVE_LLVM >= 0x0309 ? "polaris11" : "carrizo"; + default: + return ""; } } @@ -697,7 +927,11 @@ if (rscreen->family <= CHIP_ARUBA) { triple = "r600--"; } else { - triple = "amdgcn--"; + if (HAVE_LLVM < 0x0400) { + triple = "amdgcn--"; + } else { + triple = "amdgcn-mesa-mesa3d"; + } } switch(rscreen->family) { /* Clang < 3.6 is missing Hainan in its list of @@ -755,6 +989,14 @@ *max_threads_per_block = 256; } return sizeof(uint64_t); + case PIPE_COMPUTE_CAP_ADDRESS_BITS: + if (ret) { + uint32_t *address_bits = ret; + address_bits[0] = 32; + if (rscreen->chip_class >= SI) + address_bits[0] = 64; + } + return 1 * sizeof(uint32_t); case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE: if (ret) { @@ -772,8 +1014,8 @@ * 4 * MAX_MEM_ALLOC_SIZE. */ *max_global_size = MIN2(4 * max_mem_alloc_size, - rscreen->info.gart_size + - rscreen->info.vram_size); + MAX2(rscreen->info.gart_size, + rscreen->info.vram_size)); } return sizeof(uint64_t); @@ -797,10 +1039,7 @@ if (ret) { uint64_t *max_mem_alloc_size = ret; - /* XXX: The limit in older kernels is 256 MB. We - * should add a query here for newer kernels. - */ - *max_mem_alloc_size = 256 * 1024 * 1024; + *max_mem_alloc_size = rscreen->info.max_alloc_size; } return sizeof(uint64_t); @@ -832,6 +1071,16 @@ *subgroup_size = r600_wavefront_size(rscreen->family); } return sizeof(uint32_t); + case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK: + if (ret) { + uint64_t *max_variable_threads_per_block = ret; + if (rscreen->chip_class >= SI && HAVE_LLVM >= 0x309 && + ir_type == PIPE_SHADER_IR_TGSI) + *max_variable_threads_per_block = SI_MAX_VARIABLE_THREADS_PER_BLOCK; + else + *max_variable_threads_per_block = 0; + } + return sizeof(uint64_t); } fprintf(stderr, "unknown PIPE_COMPUTE_CAP %d\n", param); @@ -863,11 +1112,14 @@ } static boolean r600_fence_finish(struct pipe_screen *screen, + struct pipe_context *ctx, struct pipe_fence_handle *fence, uint64_t timeout) { struct radeon_winsys *rws = ((struct r600_common_screen*)screen)->ws; struct r600_multi_fence *rfence = (struct r600_multi_fence *)fence; + struct r600_common_context *rctx = + ctx ? (struct r600_common_context*)ctx : NULL; int64_t abs_timeout = os_time_get_absolute_timeout(timeout); if (rfence->sdma) { @@ -884,6 +1136,23 @@ if (!rfence->gfx) return true; + /* Flush the gfx IB if it hasn't been flushed yet. */ + if (rctx && + rfence->gfx_unflushed.ctx == rctx && + rfence->gfx_unflushed.ib_index == rctx->num_gfx_cs_flushes) { + rctx->gfx.flush(rctx, timeout ? 0 : RADEON_FLUSH_ASYNC, NULL); + rfence->gfx_unflushed.ctx = NULL; + + if (!timeout) + return false; + + /* Recompute the timeout after all that. */ + if (timeout && timeout != PIPE_TIMEOUT_INFINITE) { + int64_t time = os_time_get_nano(); + timeout = abs_timeout > time ? abs_timeout - time : 0; + } + } + return rws->fence_wait(rws, rfence->gfx, timeout); } @@ -919,18 +1188,20 @@ info->device_memory_evicted = ws->query_value(ws, RADEON_NUM_BYTES_MOVED) / 1024; - /* Just return the number of evicted 64KB pages. */ - info->nr_device_memory_evictions = info->device_memory_evicted / 64; + + if (rscreen->info.drm_major == 3 && rscreen->info.drm_minor >= 4) + info->nr_device_memory_evictions = + ws->query_value(ws, RADEON_NUM_EVICTIONS); + else + /* Just return the number of evicted 64KB pages. */ + info->nr_device_memory_evictions = info->device_memory_evicted / 64; } struct pipe_resource *r600_resource_create_common(struct pipe_screen *screen, const struct pipe_resource *templ) { - struct r600_common_screen *rscreen = (struct r600_common_screen*)screen; - if (templ->target == PIPE_BUFFER) { - return r600_buffer_create(screen, templ, - rscreen->info.gart_page_size); + return r600_buffer_create(screen, templ, 256); } else { return r600_texture_create(screen, templ); } @@ -948,11 +1219,11 @@ snprintf(kernel_version, sizeof(kernel_version), " / %s", uname_data.release); -#if HAVE_LLVM - snprintf(llvm_string, sizeof(llvm_string), - ", LLVM %i.%i.%i", (HAVE_LLVM >> 8) & 0xff, - HAVE_LLVM & 0xff, MESA_LLVM_VERSION_PATCH); -#endif + if (HAVE_LLVM > 0) { + snprintf(llvm_string, sizeof(llvm_string), + ", LLVM %i.%i.%i", (HAVE_LLVM >> 8) & 0xff, + HAVE_LLVM & 0xff, MESA_LLVM_VERSION_PATCH); + } snprintf(rscreen->renderer_string, sizeof(rscreen->renderer_string), "%s (DRM %i.%i.%i%s%s)", @@ -988,6 +1259,8 @@ rscreen->chip_class = rscreen->info.chip_class; rscreen->debug_flags = debug_get_flags_option("R600_DEBUG", common_debug_options, 0); + slab_create_parent(&rscreen->pool_transfers, sizeof(struct r600_transfer), 64); + rscreen->force_aniso = MIN2(16, debug_get_num_option("R600_TEX_ANISO", -1)); if (rscreen->force_aniso >= 0) { printf("radeon: Forcing anisotropy filter to %ix\n", @@ -1006,10 +1279,15 @@ printf("chip_class = %i\n", rscreen->info.chip_class); printf("gart_size = %i MB\n", (int)DIV_ROUND_UP(rscreen->info.gart_size, 1024*1024)); printf("vram_size = %i MB\n", (int)DIV_ROUND_UP(rscreen->info.vram_size, 1024*1024)); + printf("max_alloc_size = %i MB\n", + (int)DIV_ROUND_UP(rscreen->info.max_alloc_size, 1024*1024)); printf("has_virtual_memory = %i\n", rscreen->info.has_virtual_memory); printf("gfx_ib_pad_with_type2 = %i\n", rscreen->info.gfx_ib_pad_with_type2); printf("has_sdma = %i\n", rscreen->info.has_sdma); printf("has_uvd = %i\n", rscreen->info.has_uvd); + printf("me_fw_version = %i\n", rscreen->info.me_fw_version); + printf("pfp_fw_version = %i\n", rscreen->info.pfp_fw_version); + printf("ce_fw_version = %i\n", rscreen->info.ce_fw_version); printf("vce_fw_version = %i\n", rscreen->info.vce_fw_version); printf("vce_harvest_config = %i\n", rscreen->info.vce_harvest_config); printf("clock_crystal_freq = %i\n", rscreen->info.clock_crystal_freq); @@ -1042,6 +1320,8 @@ pipe_mutex_destroy(rscreen->aux_context_lock); rscreen->aux_context->destroy(rscreen->aux_context); + slab_destroy_parent(&rscreen->pool_transfers); + rscreen->ws->destroy(rscreen->ws); FREE(rscreen); } @@ -1067,14 +1347,19 @@ } } +bool r600_extra_shader_checks(struct r600_common_screen *rscreen, unsigned processor) +{ + return (rscreen->debug_flags & DBG_CHECK_IR) || + r600_can_dump_shader(rscreen, processor); +} + void r600_screen_clear_buffer(struct r600_common_screen *rscreen, struct pipe_resource *dst, - uint64_t offset, uint64_t size, unsigned value, - enum r600_coherency coher) + uint64_t offset, uint64_t size, unsigned value) { struct r600_common_context *rctx = (struct r600_common_context*)rscreen->aux_context; pipe_mutex_lock(rscreen->aux_context_lock); - rctx->clear_buffer(&rctx->b, dst, offset, size, value, coher); + rctx->dma_clear_buffer(&rctx->b, dst, offset, size, value); rscreen->aux_context->flush(rscreen->aux_context, NULL, 0); pipe_mutex_unlock(rscreen->aux_context_lock); } diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/r600_pipe_common.h mesa-17.0.7/src/gallium/drivers/radeon/r600_pipe_common.h --- mesa-12.0.6/src/gallium/drivers/radeon/r600_pipe_common.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/r600_pipe_common.h 2017-06-01 10:37:10.000000000 +0000 @@ -39,7 +39,7 @@ #include "util/u_blitter.h" #include "util/list.h" #include "util/u_range.h" -#include "util/u_slab.h" +#include "util/slab.h" #include "util/u_suballoc.h" #include "util/u_transfer.h" @@ -48,6 +48,7 @@ #define R600_RESOURCE_FLAG_TRANSFER (PIPE_RESOURCE_FLAG_DRV_PRIV << 0) #define R600_RESOURCE_FLAG_FLUSHED_DEPTH (PIPE_RESOURCE_FLAG_DRV_PRIV << 1) #define R600_RESOURCE_FLAG_FORCE_TILING (PIPE_RESOURCE_FLAG_DRV_PRIV << 2) +#define R600_RESOURCE_FLAG_DISABLE_DCC (PIPE_RESOURCE_FLAG_DRV_PRIV << 3) #define R600_CONTEXT_STREAMOUT_FLUSH (1u << 0) /* Pipeline & streamout query controls. */ @@ -77,6 +78,8 @@ #define DBG_NO_TGSI (1 << 13) #define DBG_NO_ASM (1 << 14) #define DBG_PREOPT_IR (1 << 15) +#define DBG_CHECK_IR (1 << 16) +#define DBG_NO_OPT_VARIANT (1 << 17) /* gaps */ #define DBG_TEST_DMA (1 << 20) /* Bits 21-31 are reserved for the r600g driver. */ @@ -98,10 +101,14 @@ #define DBG_SI_SCHED (1llu << 46) #define DBG_MONOLITHIC_SHADERS (1llu << 47) #define DBG_NO_CE (1llu << 48) +#define DBG_UNSAFE_MATH (1llu << 49) +#define DBG_NO_DCC_FB (1llu << 50) #define R600_MAP_BUFFER_ALIGNMENT 64 #define R600_MAX_VIEWPORTS 16 +#define SI_MAX_VARIABLE_THREADS_PER_BLOCK 1024 + enum r600_coherency { R600_COHERENCY_NONE, /* no cache flushes needed */ R600_COHERENCY_SHADER, @@ -117,6 +124,7 @@ struct r600_common_context; struct r600_perfcounters; struct tgsi_shader_info; +struct r600_qbo_state; struct radeon_shader_reloc { char name[32]; @@ -152,6 +160,7 @@ /** Disassembled shader in a string. */ char *disasm_string; + char *llvm_ir_string; }; void radeon_shader_binary_init(struct radeon_shader_binary *b); @@ -166,9 +175,16 @@ /* Winsys objects. */ struct pb_buffer *buf; uint64_t gpu_address; - - /* Resource state. */ + /* Memory usage if the buffer placement is optimal. */ + uint64_t vram_usage; + uint64_t gart_usage; + + /* Resource properties. */ + uint64_t bo_size; + unsigned bo_alignment; enum radeon_bo_domain domains; + enum radeon_bo_flag flags; + unsigned bind_history; /* The buffer range which is initialized (with a write transfer, * streamout, DMA, or as a random access target). The rest of @@ -217,30 +233,23 @@ uint64_t offset; uint64_t size; unsigned alignment; - unsigned pitch; - unsigned height; - unsigned xalign; - unsigned yalign; unsigned slice_tile_max; unsigned base_address_reg; }; -struct r600_htile_info { - unsigned pitch; - unsigned height; - unsigned xalign; - unsigned yalign; -}; - struct r600_texture { struct r600_resource resource; uint64_t size; + unsigned num_level0_transfers; + enum pipe_format db_render_format; bool is_depth; + bool db_compatible; + bool can_sample_z; + bool can_sample_s; unsigned dirty_level_mask; /* each bit says if that mipmap is compressed */ unsigned stencil_dirty_level_mask; /* each bit says if that mipmap is compressed */ struct r600_texture *flushed_depth_texture; - boolean is_flushing_texture; struct radeon_surf surface; /* Colorbuffer compression and fast clear. */ @@ -250,16 +259,50 @@ uint64_t dcc_offset; /* 0 = disabled */ unsigned cb_color_info; /* fast clear enable bit */ unsigned color_clear_value[2]; + unsigned last_msaa_resolve_target_micro_mode; /* Depth buffer compression and fast clear. */ - struct r600_htile_info htile; struct r600_resource *htile_buffer; + bool tc_compatible_htile; bool depth_cleared; /* if it was cleared at least once */ float depth_clear_value; bool stencil_cleared; /* if it was cleared at least once */ uint8_t stencil_clear_value; bool non_disp_tiling; /* R600-Cayman only */ + + /* Whether the texture is a displayable back buffer and needs DCC + * decompression, which is expensive. Therefore, it's enabled only + * if statistics suggest that it will pay off and it's allocated + * separately. It can't be bound as a sampler by apps. Limited to + * target == 2D and last_level == 0. If enabled, dcc_offset contains + * the absolute GPUVM address, not the relative one. + */ + struct r600_resource *dcc_separate_buffer; + /* When DCC is temporarily disabled, the separate buffer is here. */ + struct r600_resource *last_dcc_separate_buffer; + /* We need to track DCC dirtiness, because st/dri usually calls + * flush_resource twice per frame (not a bug) and we don't wanna + * decompress DCC twice. Also, the dirty tracking must be done even + * if DCC isn't used, because it's required by the DCC usage analysis + * for a possible future enablement. + */ + bool separate_dcc_dirty; + /* Statistics gathering for the DCC enablement heuristic. */ + bool dcc_gather_statistics; + /* Estimate of how much this color buffer is written to in units of + * full-screen draws: ps_invocations / (width * height) + * Shader kills, late Z, and blending with trivial discards make it + * inaccurate (we need to count CB updates, not PS invocations). + */ + unsigned ps_draw_ratio; + /* The number of clears since the last DCC usage analysis. */ + unsigned num_slow_clears; + + /* Counter that should be non-zero if the texture is bound to a + * framebuffer. Implemented in radeonsi only. + */ + uint32_t framebuffers_bound; }; struct r600_surface { @@ -272,6 +315,7 @@ bool alphatest_bypass; bool export_16bpc; bool color_is_int8; + bool color_is_int10; /* Color registers. */ unsigned cb_color_info; @@ -281,7 +325,6 @@ unsigned cb_color_dim; /* EG only */ unsigned cb_color_pitch; /* EG and later */ unsigned cb_color_slice; /* EG and later */ - unsigned cb_dcc_base; /* VI and later */ unsigned cb_color_attrib; /* EG and later */ unsigned cb_dcc_control; /* VI and later */ unsigned cb_color_fmask; /* CB_COLORn_FMASK (EG and later) or CB_COLORn_FRAG (r600) */ @@ -308,7 +351,16 @@ unsigned db_htile_surface; unsigned db_htile_data_base; unsigned db_preload_control; /* EG and later */ - unsigned pa_su_poly_offset_db_fmt_cntl; +}; + +union r600_grbm_counters { + struct { + unsigned spi_busy; + unsigned spi_idle; + unsigned gui_busy; + unsigned gui_idle; + } named; + unsigned array[0]; }; struct r600_common_screen { @@ -321,6 +373,8 @@ bool has_cp_dma; bool has_streamout; + struct slab_parent_pool pool_transfers; + /* Texture filter settings. */ int force_aniso; /* -1 = disabled */ @@ -337,15 +391,15 @@ * are loading shaders on demand. This is a monotonic counter. */ unsigned num_shaders_created; + unsigned num_shader_cache_hits; /* GPU load thread. */ pipe_mutex gpu_load_mutex; pipe_thread gpu_load_thread; - unsigned gpu_load_counter_busy; - unsigned gpu_load_counter_idle; + union r600_grbm_counters grbm_counters; volatile unsigned gpu_load_stop_thread; /* bool */ - char renderer_string[64]; + char renderer_string[100]; /* Performance counters. */ struct r600_perfcounters *perfcounters; @@ -363,6 +417,24 @@ */ unsigned compressed_colortex_counter; + /* Atomically increment this counter when an existing texture's + * backing buffer or tile mode parameters have changed that requires + * recomputation of shader descriptors. + */ + unsigned dirty_tex_descriptor_counter; + + struct { + /* Context flags to set so that all writes from earlier jobs + * in the CP are seen by L2 clients. + */ + unsigned cp_to_L2; + + /* Context flags to set so that all writes from earlier + * compute jobs are seen by L2 clients. + */ + unsigned compute_to_L2; + } barrier_flags; + void (*query_opaque_metadata)(struct r600_common_screen *rscreen, struct r600_texture *rtex, struct radeon_bo_metadata *md); @@ -445,6 +517,15 @@ struct pipe_fence_handle **fence); }; +/* Saved CS data for debugging features. */ +struct radeon_saved_cs { + uint32_t *ib; + unsigned num_dw; + + struct radeon_bo_list_item *bo_list; + unsigned bo_count; +}; + struct r600_common_context { struct pipe_context b; /* base class */ @@ -455,15 +536,18 @@ enum chip_class chip_class; struct r600_ring gfx; struct r600_ring dma; + struct pipe_fence_handle *last_gfx_fence; struct pipe_fence_handle *last_sdma_fence; + unsigned num_gfx_cs_flushes; unsigned initial_gfx_cs_size; unsigned gpu_reset_counter; unsigned last_dirty_fb_counter; unsigned last_compressed_colortex_counter; + unsigned last_dirty_tex_descriptor_counter; struct u_upload_mgr *uploader; - struct u_suballocator *allocator_so_filled_size; - struct util_slab_mempool pool_transfers; + struct u_suballocator *allocator_zeroed_memory; + struct slab_child_pool pool_transfers; /* Current unaccounted memory usage. */ uint64_t vram; @@ -492,13 +576,25 @@ unsigned max_db; /* for OQ */ /* Misc stats. */ unsigned num_draw_calls; + unsigned num_spill_draw_calls; + unsigned num_compute_calls; + unsigned num_spill_compute_calls; unsigned num_dma_calls; + unsigned num_cp_dma_calls; + unsigned num_vs_flushes; + unsigned num_ps_flushes; + unsigned num_cs_flushes; + unsigned num_fb_cache_flushes; + unsigned num_L2_invalidates; + unsigned num_L2_writebacks; + uint64_t num_alloc_tex_transfer_bytes; + unsigned last_tex_ps_draw_ratio; /* for query */ /* Render condition. */ struct r600_atom render_cond_atom; struct pipe_query *render_cond; unsigned render_cond_mode; - boolean render_cond_invert; + bool render_cond_invert; bool render_cond_force_off; /* for u_blitter */ /* MSAA sample locations. @@ -510,12 +606,29 @@ float sample_locations_8x[8][2]; float sample_locations_16x[16][2]; - /* The list of all texture buffer objects in this context. - * This list is walked when a buffer is invalidated/reallocated and - * the GPU addresses are updated. */ - struct list_head texture_buffers; + /* Statistics gathering for the DCC enablement heuristic. It can't be + * in r600_texture because r600_texture can be shared by multiple + * contexts. This is for back buffers only. We shouldn't get too many + * of those. + * + * X11 DRI3 rotates among a finite set of back buffers. They should + * all fit in this array. If they don't, separate DCC might never be + * enabled by DCC stat gathering. + */ + struct { + struct r600_texture *tex; + /* Query queue: 0 = usually active, 1 = waiting, 2 = readback. */ + struct pipe_query *ps_stats[3]; + /* If all slots are used and another slot is needed, + * the least recently used slot is evicted based on this. */ + int64_t last_use_timestamp; + bool query_active; + } dcc_stats[5]; struct pipe_debug_callback debug; + struct pipe_device_reset_callback device_reset_callback; + + void *query_result_shader; /* Copy one resource to another using async DMA. */ void (*dma_copy)(struct pipe_context *ctx, @@ -526,6 +639,9 @@ unsigned src_level, const struct pipe_box *src_box); + void (*dma_clear_buffer)(struct pipe_context *ctx, struct pipe_resource *dst, + uint64_t offset, uint64_t size, unsigned value); + void (*clear_buffer)(struct pipe_context *ctx, struct pipe_resource *dst, uint64_t offset, uint64_t size, unsigned value, enum r600_coherency coher); @@ -547,24 +663,36 @@ /* Enable or disable occlusion queries. */ void (*set_occlusion_query_state)(struct pipe_context *ctx, bool enable); + void (*save_qbo_state)(struct pipe_context *ctx, struct r600_qbo_state *st); + /* This ensures there is enough space in the command stream. */ void (*need_gfx_cs_space)(struct pipe_context *ctx, unsigned num_dw, bool include_draw_vbo); void (*set_atom_dirty)(struct r600_common_context *ctx, struct r600_atom *atom, bool dirty); + + void (*check_vm_faults)(struct r600_common_context *ctx, + struct radeon_saved_cs *saved, + enum ring_type ring); }; /* r600_buffer.c */ -boolean r600_rings_is_buffer_referenced(struct r600_common_context *ctx, - struct pb_buffer *buf, - enum radeon_bo_usage usage); +bool r600_rings_is_buffer_referenced(struct r600_common_context *ctx, + struct pb_buffer *buf, + enum radeon_bo_usage usage); void *r600_buffer_map_sync_with_rings(struct r600_common_context *ctx, struct r600_resource *resource, unsigned usage); -bool r600_init_resource(struct r600_common_screen *rscreen, - struct r600_resource *res, - uint64_t size, unsigned alignment); +void r600_buffer_subdata(struct pipe_context *ctx, + struct pipe_resource *buffer, + unsigned usage, unsigned offset, + unsigned size, const void *data); +void r600_init_resource_fields(struct r600_common_screen *rscreen, + struct r600_resource *res, + uint64_t size, unsigned alignment); +bool r600_alloc_resource(struct r600_common_screen *rscreen, + struct r600_resource *res); struct pipe_resource *r600_buffer_create(struct pipe_screen *screen, const struct pipe_resource *templ, unsigned alignment); @@ -582,6 +710,14 @@ struct pipe_resource *resource); /* r600_common_pipe.c */ +void r600_gfx_write_event_eop(struct r600_common_context *ctx, + unsigned event, unsigned event_flags, + unsigned data_sel, + struct r600_resource *buf, uint64_t va, + uint32_t old_fence, uint32_t new_fence); +unsigned r600_gfx_write_fence_dwords(struct r600_common_screen *screen); +void r600_gfx_wait_fence(struct r600_common_context *ctx, + uint64_t va, uint32_t ref, uint32_t mask); void r600_draw_rectangle(struct blitter_context *blitter, int x1, int y1, int x2, int y2, float depth, enum blitter_attrib_type type, @@ -592,25 +728,31 @@ void r600_preflush_suspend_features(struct r600_common_context *ctx); void r600_postflush_resume_features(struct r600_common_context *ctx); bool r600_common_context_init(struct r600_common_context *rctx, - struct r600_common_screen *rscreen); + struct r600_common_screen *rscreen, + unsigned context_flags); void r600_common_context_cleanup(struct r600_common_context *rctx); -void r600_context_add_resource_size(struct pipe_context *ctx, struct pipe_resource *r); bool r600_can_dump_shader(struct r600_common_screen *rscreen, unsigned processor); +bool r600_extra_shader_checks(struct r600_common_screen *rscreen, + unsigned processor); void r600_screen_clear_buffer(struct r600_common_screen *rscreen, struct pipe_resource *dst, - uint64_t offset, uint64_t size, unsigned value, - enum r600_coherency coher); + uint64_t offset, uint64_t size, unsigned value); struct pipe_resource *r600_resource_create_common(struct pipe_screen *screen, const struct pipe_resource *templ); const char *r600_get_llvm_processor_name(enum radeon_family family); void r600_need_dma_space(struct r600_common_context *ctx, unsigned num_dw, struct r600_resource *dst, struct r600_resource *src); -void r600_dma_emit_wait_idle(struct r600_common_context *rctx); +void radeon_save_cs(struct radeon_winsys *ws, struct radeon_winsys_cs *cs, + struct radeon_saved_cs *saved); +void radeon_clear_saved_cs(struct radeon_saved_cs *saved); +bool r600_check_device_reset(struct r600_common_context *rctx); /* r600_gpu_load.c */ void r600_gpu_load_kill_thread(struct r600_common_screen *rscreen); -uint64_t r600_gpu_load_begin(struct r600_common_screen *rscreen); -unsigned r600_gpu_load_end(struct r600_common_screen *rscreen, uint64_t begin); +uint64_t r600_begin_counter_spi(struct r600_common_screen *rscreen); +unsigned r600_end_counter_spi(struct r600_common_screen *rscreen, uint64_t begin); +uint64_t r600_begin_counter_gui(struct r600_common_screen *rscreen); +unsigned r600_end_counter_gui(struct r600_common_screen *rscreen, uint64_t begin); /* r600_perfcounters.c */ void r600_perfcounters_destroy(struct r600_common_screen *rscreen); @@ -657,17 +799,32 @@ void r600_print_texture_info(struct r600_texture *rtex, FILE *f); struct pipe_resource *r600_texture_create(struct pipe_screen *screen, const struct pipe_resource *templ); +bool vi_dcc_formats_compatible(enum pipe_format format1, + enum pipe_format format2); +void vi_dcc_disable_if_incompatible_format(struct r600_common_context *rctx, + struct pipe_resource *tex, + unsigned level, + enum pipe_format view_format); struct pipe_surface *r600_create_surface_custom(struct pipe_context *pipe, struct pipe_resource *texture, const struct pipe_surface *templ, unsigned width, unsigned height); unsigned r600_translate_colorswap(enum pipe_format format, bool do_endian_swap); +void vi_separate_dcc_start_query(struct pipe_context *ctx, + struct r600_texture *tex); +void vi_separate_dcc_stop_query(struct pipe_context *ctx, + struct r600_texture *tex); +void vi_separate_dcc_process_and_reset_stats(struct pipe_context *ctx, + struct r600_texture *tex); +void vi_dcc_clear_level(struct r600_common_context *rctx, + struct r600_texture *rtex, + unsigned level, unsigned clear_value); void evergreen_do_fast_color_clear(struct r600_common_context *rctx, struct pipe_framebuffer_state *fb, struct r600_atom *fb_state, unsigned *buffers, unsigned *dirty_cbufs, const union pipe_color_union *color); -void r600_texture_disable_dcc(struct r600_common_screen *rscreen, +bool r600_texture_disable_dcc(struct r600_common_context *rctx, struct r600_texture *rtex); void r600_init_screen_texture_functions(struct r600_common_screen *rscreen); void r600_init_context_texture_functions(struct r600_common_context *rctx); @@ -691,7 +848,8 @@ void cayman_init_msaa(struct pipe_context *ctx); void cayman_emit_msaa_sample_locs(struct radeon_winsys_cs *cs, int nr_samples); void cayman_emit_msaa_config(struct radeon_winsys_cs *cs, int nr_samples, - int ps_iter_samples, int overrast_samples); + int ps_iter_samples, int overrast_samples, + unsigned sc_mode_cntl_1); /* Inline helpers. */ @@ -708,6 +866,25 @@ (struct pipe_resource *)res); } +static inline void +r600_texture_reference(struct r600_texture **ptr, struct r600_texture *res) +{ + pipe_resource_reference((struct pipe_resource **)ptr, &res->resource.b.b); +} + +static inline void +r600_context_add_resource_size(struct pipe_context *ctx, struct pipe_resource *r) +{ + struct r600_common_context *rctx = (struct r600_common_context *)ctx; + struct r600_resource *res = (struct r600_resource *)r; + + if (res) { + /* Add memory usage for need_gfx_cs_space */ + rctx->vram += res->vram_usage; + rctx->gtt += res->gart_usage; + } +} + static inline bool r600_get_strmout_en(struct r600_common_context *rctx) { return rctx->streamout.streamout_enabled || @@ -774,6 +951,13 @@ return RADEON_PRIO_SAMPLER_TEXTURE; } +static inline bool +r600_can_sample_zs(struct r600_texture *tex, bool stencil_sampler) +{ + return (stencil_sampler && tex->can_sample_s) || + (!stencil_sampler && tex->can_sample_z); +} + #define COMPUTE_DBG(rscreen, fmt, args...) \ do { \ if ((rscreen->b.debug_flags & DBG_COMPUTE)) fprintf(stderr, fmt, ##args); \ diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/r600_query.c mesa-17.0.7/src/gallium/drivers/radeon/r600_query.c --- mesa-12.0.6/src/gallium/drivers/radeon/r600_query.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/r600_query.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,6 +25,17 @@ #include "r600_query.h" #include "r600_cs.h" #include "util/u_memory.h" +#include "util/u_upload_mgr.h" + +#include "tgsi/tgsi_text.h" + +struct r600_hw_query_params { + unsigned start_offset; + unsigned end_offset; + unsigned fence_offset; + unsigned pair_stride; + unsigned pair_count; +}; /* Queries without buffer handling or suspend/resume. */ struct r600_query_sw { @@ -51,9 +62,13 @@ switch (type) { case R600_QUERY_REQUESTED_VRAM: return RADEON_REQUESTED_VRAM_MEMORY; case R600_QUERY_REQUESTED_GTT: return RADEON_REQUESTED_GTT_MEMORY; + case R600_QUERY_MAPPED_VRAM: return RADEON_MAPPED_VRAM; + case R600_QUERY_MAPPED_GTT: return RADEON_MAPPED_GTT; case R600_QUERY_BUFFER_WAIT_TIME: return RADEON_BUFFER_WAIT_TIME_NS; - case R600_QUERY_NUM_CS_FLUSHES: return RADEON_NUM_CS_FLUSHES; + case R600_QUERY_NUM_GFX_IBS: return RADEON_NUM_GFX_IBS; + case R600_QUERY_NUM_SDMA_IBS: return RADEON_NUM_SDMA_IBS; case R600_QUERY_NUM_BYTES_MOVED: return RADEON_NUM_BYTES_MOVED; + case R600_QUERY_NUM_EVICTIONS: return RADEON_NUM_EVICTIONS; case R600_QUERY_VRAM_USAGE: return RADEON_VRAM_USAGE; case R600_QUERY_GTT_USAGE: return RADEON_GTT_USAGE; case R600_QUERY_GPU_TEMPERATURE: return RADEON_GPU_TEMPERATURE; @@ -63,8 +78,8 @@ } } -static boolean r600_query_sw_begin(struct r600_common_context *rctx, - struct r600_query *rquery) +static bool r600_query_sw_begin(struct r600_common_context *rctx, + struct r600_query *rquery) { struct r600_query_sw *query = (struct r600_query_sw *)rquery; @@ -75,24 +90,65 @@ case R600_QUERY_DRAW_CALLS: query->begin_result = rctx->num_draw_calls; break; + case R600_QUERY_SPILL_DRAW_CALLS: + query->begin_result = rctx->num_spill_draw_calls; + break; + case R600_QUERY_COMPUTE_CALLS: + query->begin_result = rctx->num_compute_calls; + break; + case R600_QUERY_SPILL_COMPUTE_CALLS: + query->begin_result = rctx->num_spill_compute_calls; + break; + case R600_QUERY_DMA_CALLS: + query->begin_result = rctx->num_dma_calls; + break; + case R600_QUERY_CP_DMA_CALLS: + query->begin_result = rctx->num_cp_dma_calls; + break; + case R600_QUERY_NUM_VS_FLUSHES: + query->begin_result = rctx->num_vs_flushes; + break; + case R600_QUERY_NUM_PS_FLUSHES: + query->begin_result = rctx->num_ps_flushes; + break; + case R600_QUERY_NUM_CS_FLUSHES: + query->begin_result = rctx->num_cs_flushes; + break; + case R600_QUERY_NUM_FB_CACHE_FLUSHES: + query->begin_result = rctx->num_fb_cache_flushes; + break; + case R600_QUERY_NUM_L2_INVALIDATES: + query->begin_result = rctx->num_L2_invalidates; + break; + case R600_QUERY_NUM_L2_WRITEBACKS: + query->begin_result = rctx->num_L2_writebacks; + break; case R600_QUERY_REQUESTED_VRAM: case R600_QUERY_REQUESTED_GTT: + case R600_QUERY_MAPPED_VRAM: + case R600_QUERY_MAPPED_GTT: case R600_QUERY_VRAM_USAGE: case R600_QUERY_GTT_USAGE: case R600_QUERY_GPU_TEMPERATURE: case R600_QUERY_CURRENT_GPU_SCLK: case R600_QUERY_CURRENT_GPU_MCLK: + case R600_QUERY_BACK_BUFFER_PS_DRAW_RATIO: query->begin_result = 0; break; case R600_QUERY_BUFFER_WAIT_TIME: - case R600_QUERY_NUM_CS_FLUSHES: - case R600_QUERY_NUM_BYTES_MOVED: { + case R600_QUERY_NUM_GFX_IBS: + case R600_QUERY_NUM_SDMA_IBS: + case R600_QUERY_NUM_BYTES_MOVED: + case R600_QUERY_NUM_EVICTIONS: { enum radeon_value_id ws_id = winsys_id_from_type(query->b.type); query->begin_result = rctx->ws->query_value(rctx->ws, ws_id); break; } case R600_QUERY_GPU_LOAD: - query->begin_result = r600_gpu_load_begin(rctx->screen); + query->begin_result = r600_begin_counter_gui(rctx->screen); + break; + case R600_QUERY_GPU_SHADERS_BUSY: + query->begin_result = r600_begin_counter_spi(rctx->screen); break; case R600_QUERY_NUM_COMPILATIONS: query->begin_result = p_atomic_read(&rctx->screen->num_compilations); @@ -100,6 +156,10 @@ case R600_QUERY_NUM_SHADERS_CREATED: query->begin_result = p_atomic_read(&rctx->screen->num_shaders_created); break; + case R600_QUERY_NUM_SHADER_CACHE_HITS: + query->begin_result = + p_atomic_read(&rctx->screen->num_shader_cache_hits); + break; case R600_QUERY_GPIN_ASIC_ID: case R600_QUERY_GPIN_NUM_SIMD: case R600_QUERY_GPIN_NUM_RB: @@ -110,7 +170,7 @@ unreachable("r600_query_sw_begin: bad query type"); } - return TRUE; + return true; } static bool r600_query_sw_end(struct r600_common_context *rctx, @@ -122,28 +182,70 @@ case PIPE_QUERY_TIMESTAMP_DISJOINT: break; case PIPE_QUERY_GPU_FINISHED: - rctx->b.flush(&rctx->b, &query->fence, 0); + rctx->b.flush(&rctx->b, &query->fence, PIPE_FLUSH_DEFERRED); break; case R600_QUERY_DRAW_CALLS: query->end_result = rctx->num_draw_calls; break; + case R600_QUERY_SPILL_DRAW_CALLS: + query->end_result = rctx->num_spill_draw_calls; + break; + case R600_QUERY_COMPUTE_CALLS: + query->end_result = rctx->num_compute_calls; + break; + case R600_QUERY_SPILL_COMPUTE_CALLS: + query->end_result = rctx->num_spill_compute_calls; + break; + case R600_QUERY_DMA_CALLS: + query->end_result = rctx->num_dma_calls; + break; + case R600_QUERY_CP_DMA_CALLS: + query->end_result = rctx->num_cp_dma_calls; + break; + case R600_QUERY_NUM_VS_FLUSHES: + query->end_result = rctx->num_vs_flushes; + break; + case R600_QUERY_NUM_PS_FLUSHES: + query->end_result = rctx->num_ps_flushes; + break; + case R600_QUERY_NUM_CS_FLUSHES: + query->end_result = rctx->num_cs_flushes; + break; + case R600_QUERY_NUM_FB_CACHE_FLUSHES: + query->end_result = rctx->num_fb_cache_flushes; + break; + case R600_QUERY_NUM_L2_INVALIDATES: + query->end_result = rctx->num_L2_invalidates; + break; + case R600_QUERY_NUM_L2_WRITEBACKS: + query->end_result = rctx->num_L2_writebacks; + break; case R600_QUERY_REQUESTED_VRAM: case R600_QUERY_REQUESTED_GTT: + case R600_QUERY_MAPPED_VRAM: + case R600_QUERY_MAPPED_GTT: case R600_QUERY_VRAM_USAGE: case R600_QUERY_GTT_USAGE: case R600_QUERY_GPU_TEMPERATURE: case R600_QUERY_CURRENT_GPU_SCLK: case R600_QUERY_CURRENT_GPU_MCLK: case R600_QUERY_BUFFER_WAIT_TIME: - case R600_QUERY_NUM_CS_FLUSHES: - case R600_QUERY_NUM_BYTES_MOVED: { + case R600_QUERY_NUM_GFX_IBS: + case R600_QUERY_NUM_SDMA_IBS: + case R600_QUERY_NUM_BYTES_MOVED: + case R600_QUERY_NUM_EVICTIONS: { enum radeon_value_id ws_id = winsys_id_from_type(query->b.type); query->end_result = rctx->ws->query_value(rctx->ws, ws_id); break; } case R600_QUERY_GPU_LOAD: - query->end_result = r600_gpu_load_end(rctx->screen, - query->begin_result); + query->end_result = r600_end_counter_gui(rctx->screen, + query->begin_result); + query->begin_result = 0; + break; + case R600_QUERY_GPU_SHADERS_BUSY: + query->end_result = r600_end_counter_spi(rctx->screen, + query->begin_result); query->begin_result = 0; break; case R600_QUERY_NUM_COMPILATIONS: @@ -152,6 +254,13 @@ case R600_QUERY_NUM_SHADERS_CREATED: query->end_result = p_atomic_read(&rctx->screen->num_shaders_created); break; + case R600_QUERY_BACK_BUFFER_PS_DRAW_RATIO: + query->end_result = rctx->last_tex_ps_draw_ratio; + break; + case R600_QUERY_NUM_SHADER_CACHE_HITS: + query->end_result = + p_atomic_read(&rctx->screen->num_shader_cache_hits); + break; case R600_QUERY_GPIN_ASIC_ID: case R600_QUERY_GPIN_NUM_SIMD: case R600_QUERY_GPIN_NUM_RB: @@ -165,10 +274,10 @@ return true; } -static boolean r600_query_sw_get_result(struct r600_common_context *rctx, - struct r600_query *rquery, - boolean wait, - union pipe_query_result *result) +static bool r600_query_sw_get_result(struct r600_common_context *rctx, + struct r600_query *rquery, + bool wait, + union pipe_query_result *result) { struct r600_query_sw *query = (struct r600_query_sw *)rquery; @@ -177,30 +286,30 @@ /* Convert from cycles per millisecond to cycles per second (Hz). */ result->timestamp_disjoint.frequency = (uint64_t)rctx->screen->info.clock_crystal_freq * 1000; - result->timestamp_disjoint.disjoint = FALSE; - return TRUE; + result->timestamp_disjoint.disjoint = false; + return true; case PIPE_QUERY_GPU_FINISHED: { struct pipe_screen *screen = rctx->b.screen; - result->b = screen->fence_finish(screen, query->fence, + result->b = screen->fence_finish(screen, &rctx->b, query->fence, wait ? PIPE_TIMEOUT_INFINITE : 0); return result->b; } case R600_QUERY_GPIN_ASIC_ID: result->u32 = 0; - return TRUE; + return true; case R600_QUERY_GPIN_NUM_SIMD: result->u32 = rctx->screen->info.num_good_compute_units; - return TRUE; + return true; case R600_QUERY_GPIN_NUM_RB: result->u32 = rctx->screen->info.num_render_backends; - return TRUE; + return true; case R600_QUERY_GPIN_NUM_SPI: result->u32 = 1; /* all supported chips have one SPI per SE */ - return TRUE; + return true; case R600_QUERY_GPIN_NUM_SE: result->u32 = rctx->screen->info.max_se; - return TRUE; + return true; } result->u64 = query->end_result - query->begin_result; @@ -216,14 +325,16 @@ break; } - return TRUE; + return true; } + static struct r600_query_ops sw_query_ops = { .destroy = r600_query_sw_destroy, .begin = r600_query_sw_begin, .end = r600_query_sw_end, - .get_result = r600_query_sw_get_result + .get_result = r600_query_sw_get_result, + .get_result_resource = NULL }; static struct pipe_query *r600_query_sw_create(struct pipe_context *ctx, @@ -251,11 +362,11 @@ while (prev) { struct r600_query_buffer *qbuf = prev; prev = prev->previous; - pipe_resource_reference((struct pipe_resource**)&qbuf->buf, NULL); + r600_resource_reference(&qbuf->buf, NULL); FREE(qbuf); } - pipe_resource_reference((struct pipe_resource**)&query->buffer.buf, NULL); + r600_resource_reference(&query->buffer.buf, NULL); FREE(rquery); } @@ -263,23 +374,21 @@ struct r600_query_hw *query) { unsigned buf_size = MAX2(query->result_size, - ctx->screen->info.gart_page_size); + ctx->screen->info.min_alloc_size); /* Queries are normally read by the CPU after * being written by the gpu, hence staging is probably a good * usage pattern. */ struct r600_resource *buf = (struct r600_resource*) - pipe_buffer_create(ctx->b.screen, PIPE_BIND_CUSTOM, + pipe_buffer_create(ctx->b.screen, 0, PIPE_USAGE_STAGING, buf_size); if (!buf) return NULL; - if (query->flags & R600_QUERY_HW_FLAG_PREDICATE) { - if (!query->ops->prepare_buffer(ctx, query, buf)) { - pipe_resource_reference((struct pipe_resource **)&buf, NULL); - return NULL; - } + if (!query->ops->prepare_buffer(ctx, query, buf)) { + r600_resource_reference(&buf, NULL); + return NULL; } return buf; @@ -304,7 +413,7 @@ unsigned i, j; /* Set top bits for unused backends. */ - num_results = buffer->b.b.width0 / (16 * ctx->max_db); + num_results = buffer->b.b.width0 / query->result_size; for (j = 0; j < num_results; j++) { for (i = 0; i < ctx->max_db; i++) { if (!(ctx->backend_mask & (1<buffer.buf = r600_new_query_buffer(rctx, query); if (!query->buffer.buf) - return FALSE; + return false; - return TRUE; + return true; } static struct pipe_query *r600_query_hw_create(struct r600_common_context *rctx, @@ -374,18 +492,18 @@ case PIPE_QUERY_OCCLUSION_COUNTER: case PIPE_QUERY_OCCLUSION_PREDICATE: query->result_size = 16 * rctx->max_db; + query->result_size += 16; /* for the fence + alignment */ query->num_cs_dw_begin = 6; - query->num_cs_dw_end = 6; - query->flags |= R600_QUERY_HW_FLAG_PREDICATE; + query->num_cs_dw_end = 6 + r600_gfx_write_fence_dwords(rctx->screen); break; case PIPE_QUERY_TIME_ELAPSED: - query->result_size = 16; + query->result_size = 24; query->num_cs_dw_begin = 8; - query->num_cs_dw_end = 8; + query->num_cs_dw_end = 8 + r600_gfx_write_fence_dwords(rctx->screen); break; case PIPE_QUERY_TIMESTAMP: - query->result_size = 8; - query->num_cs_dw_end = 8; + query->result_size = 16; + query->num_cs_dw_end = 8 + r600_gfx_write_fence_dwords(rctx->screen); query->flags = R600_QUERY_HW_FLAG_NO_START; break; case PIPE_QUERY_PRIMITIVES_EMITTED: @@ -397,13 +515,13 @@ query->num_cs_dw_begin = 6; query->num_cs_dw_end = 6; query->stream = index; - query->flags |= R600_QUERY_HW_FLAG_PREDICATE; break; case PIPE_QUERY_PIPELINE_STATISTICS: /* 11 values on EG, 8 on R600. */ query->result_size = (rctx->chip_class >= EVERGREEN ? 11 : 8) * 16; + query->result_size += 8; /* for the fence + alignment */ query->num_cs_dw_begin = 6; - query->num_cs_dw_end = 6; + query->num_cs_dw_end = 6 + r600_gfx_write_fence_dwords(rctx->screen); break; default: assert(0); @@ -482,12 +600,8 @@ radeon_emit(cs, (va >> 32) & 0xFFFF); break; case PIPE_QUERY_TIME_ELAPSED: - radeon_emit(cs, PKT3(PKT3_EVENT_WRITE_EOP, 4, 0)); - radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_BOTTOM_OF_PIPE_TS) | EVENT_INDEX(5)); - radeon_emit(cs, va); - radeon_emit(cs, (3 << 29) | ((va >> 32) & 0xFFFF)); - radeon_emit(cs, 0); - radeon_emit(cs, 0); + r600_gfx_write_event_eop(ctx, EVENT_TYPE_BOTTOM_OF_PIPE_TS, + 0, 3, NULL, va, 0, 0); break; case PIPE_QUERY_PIPELINE_STATISTICS: radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0)); @@ -514,7 +628,7 @@ r600_update_prims_generated_query_state(ctx, query->b.type, 1); ctx->need_gfx_cs_space(&ctx->b, query->num_cs_dw_begin + query->num_cs_dw_end, - TRUE); + true); /* Get a new query buffer if needed. */ if (query->buffer.results_end + query->result_size > query->buffer.buf->b.b.width0) { @@ -541,6 +655,7 @@ uint64_t va) { struct radeon_winsys_cs *cs = ctx->gfx.cs; + uint64_t fence_va = 0; switch (query->b.type) { case PIPE_QUERY_OCCLUSION_COUNTER: @@ -550,6 +665,8 @@ radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_ZPASS_DONE) | EVENT_INDEX(1)); radeon_emit(cs, va); radeon_emit(cs, (va >> 32) & 0xFFFF); + + fence_va = va + ctx->max_db * 16 - 8; break; case PIPE_QUERY_PRIMITIVES_EMITTED: case PIPE_QUERY_PRIMITIVES_GENERATED: @@ -562,28 +679,34 @@ radeon_emit(cs, (va >> 32) & 0xFFFF); break; case PIPE_QUERY_TIME_ELAPSED: - va += query->result_size/2; + va += 8; /* fall through */ case PIPE_QUERY_TIMESTAMP: - radeon_emit(cs, PKT3(PKT3_EVENT_WRITE_EOP, 4, 0)); - radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_BOTTOM_OF_PIPE_TS) | EVENT_INDEX(5)); - radeon_emit(cs, va); - radeon_emit(cs, (3 << 29) | ((va >> 32) & 0xFFFF)); - radeon_emit(cs, 0); - radeon_emit(cs, 0); + r600_gfx_write_event_eop(ctx, EVENT_TYPE_BOTTOM_OF_PIPE_TS, + 0, 3, NULL, va, 0, 0); + fence_va = va + 8; break; - case PIPE_QUERY_PIPELINE_STATISTICS: - va += query->result_size/2; + case PIPE_QUERY_PIPELINE_STATISTICS: { + unsigned sample_size = (query->result_size - 8) / 2; + + va += sample_size; radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0)); radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_SAMPLE_PIPELINESTAT) | EVENT_INDEX(2)); radeon_emit(cs, va); radeon_emit(cs, (va >> 32) & 0xFFFF); + + fence_va = va + sample_size; break; + } default: assert(0); } r600_emit_reloc(ctx, &ctx->gfx, query->buffer.buf, RADEON_USAGE_WRITE, RADEON_PRIO_QUERY); + + if (fence_va) + r600_gfx_write_event_eop(ctx, EVENT_TYPE_BOTTOM_OF_PIPE_TS, 0, 1, + query->buffer.buf, fence_va, 0, 0x80000000); } static void r600_query_hw_emit_stop(struct r600_common_context *ctx, @@ -596,7 +719,7 @@ /* The queries which need begin already called this in begin_query. */ if (query->flags & R600_QUERY_HW_FLAG_NO_START) { - ctx->need_gfx_cs_space(&ctx->b, query->num_cs_dw_end, FALSE); + ctx->need_gfx_cs_space(&ctx->b, query->num_cs_dw_end, false); } /* emit end query */ @@ -700,8 +823,8 @@ return rquery->ops->begin(rctx, rquery); } -static void r600_query_hw_reset_buffers(struct r600_common_context *rctx, - struct r600_query_hw *query) +void r600_query_hw_reset_buffers(struct r600_common_context *rctx, + struct r600_query_hw *query) { struct r600_query_buffer *prev = query->buffer.previous; @@ -709,28 +832,26 @@ while (prev) { struct r600_query_buffer *qbuf = prev; prev = prev->previous; - pipe_resource_reference((struct pipe_resource**)&qbuf->buf, NULL); + r600_resource_reference(&qbuf->buf, NULL); FREE(qbuf); } query->buffer.results_end = 0; query->buffer.previous = NULL; - if (query->flags & R600_QUERY_HW_FLAG_PREDICATE) { - /* Obtain a new buffer if the current one can't be mapped without a stall. */ - if (r600_rings_is_buffer_referenced(rctx, query->buffer.buf->buf, RADEON_USAGE_READWRITE) || - !rctx->ws->buffer_wait(query->buffer.buf->buf, 0, RADEON_USAGE_READWRITE)) { - pipe_resource_reference((struct pipe_resource**)&query->buffer.buf, NULL); - query->buffer.buf = r600_new_query_buffer(rctx, query); - } else { - if (!query->ops->prepare_buffer(rctx, query, query->buffer.buf)) - pipe_resource_reference((struct pipe_resource**)&query->buffer.buf, NULL); - } + /* Obtain a new buffer if the current one can't be mapped without a stall. */ + if (r600_rings_is_buffer_referenced(rctx, query->buffer.buf->buf, RADEON_USAGE_READWRITE) || + !rctx->ws->buffer_wait(query->buffer.buf->buf, 0, RADEON_USAGE_READWRITE)) { + r600_resource_reference(&query->buffer.buf, NULL); + query->buffer.buf = r600_new_query_buffer(rctx, query); + } else { + if (!query->ops->prepare_buffer(rctx, query, query->buffer.buf)) + r600_resource_reference(&query->buffer.buf, NULL); } } -boolean r600_query_hw_begin(struct r600_common_context *rctx, - struct r600_query *rquery) +bool r600_query_hw_begin(struct r600_common_context *rctx, + struct r600_query *rquery) { struct r600_query_hw *query = (struct r600_query_hw *)rquery; @@ -739,7 +860,8 @@ return false; } - r600_query_hw_reset_buffers(rctx, query); + if (!(query->flags & R600_QUERY_HW_FLAG_BEGIN_RESUMES)) + r600_query_hw_reset_buffers(rctx, query); r600_query_hw_emit_start(rctx, query); if (!query->buffer.buf) @@ -776,6 +898,61 @@ return true; } +static void r600_get_hw_query_params(struct r600_common_context *rctx, + struct r600_query_hw *rquery, int index, + struct r600_hw_query_params *params) +{ + params->pair_stride = 0; + params->pair_count = 1; + + switch (rquery->b.type) { + case PIPE_QUERY_OCCLUSION_COUNTER: + case PIPE_QUERY_OCCLUSION_PREDICATE: + params->start_offset = 0; + params->end_offset = 8; + params->fence_offset = rctx->max_db * 16; + params->pair_stride = 16; + params->pair_count = rctx->max_db; + break; + case PIPE_QUERY_TIME_ELAPSED: + params->start_offset = 0; + params->end_offset = 8; + params->fence_offset = 16; + break; + case PIPE_QUERY_TIMESTAMP: + params->start_offset = 0; + params->end_offset = 0; + params->fence_offset = 8; + break; + case PIPE_QUERY_PRIMITIVES_EMITTED: + params->start_offset = 8; + params->end_offset = 24; + params->fence_offset = params->end_offset + 4; + break; + case PIPE_QUERY_PRIMITIVES_GENERATED: + params->start_offset = 0; + params->end_offset = 16; + params->fence_offset = params->end_offset + 4; + break; + case PIPE_QUERY_SO_STATISTICS: + params->start_offset = 8 - index * 8; + params->end_offset = 24 - index * 8; + params->fence_offset = params->end_offset + 4; + break; + case PIPE_QUERY_PIPELINE_STATISTICS: + { + /* Offsets apply to EG+ */ + static const unsigned offsets[] = {56, 48, 24, 32, 40, 16, 8, 0, 64, 72, 80}; + params->start_offset = offsets[index]; + params->end_offset = 88 + offsets[index]; + params->fence_offset = 2 * 88; + break; + } + default: + unreachable("r600_get_hw_query_params unsupported"); + } +} + static unsigned r600_query_read_result(void *map, unsigned start_index, unsigned end_index, bool test_status_bit) { @@ -801,20 +978,18 @@ { switch (query->b.type) { case PIPE_QUERY_OCCLUSION_COUNTER: { - unsigned results_base = 0; - while (results_base != query->result_size) { + for (unsigned i = 0; i < ctx->max_db; ++i) { + unsigned results_base = i * 16; result->u64 += r600_query_read_result(buffer + results_base, 0, 2, true); - results_base += 16; } break; } case PIPE_QUERY_OCCLUSION_PREDICATE: { - unsigned results_base = 0; - while (results_base != query->result_size) { + for (unsigned i = 0; i < ctx->max_db; ++i) { + unsigned results_base = i * 16; result->b = result->b || r600_query_read_result(buffer + results_base, 0, 2, true) != 0; - results_base += 16; } break; } @@ -822,12 +997,8 @@ result->u64 += r600_query_read_result(buffer, 0, 2, false); break; case PIPE_QUERY_TIMESTAMP: - { - uint32_t *current_result = (uint32_t*)buffer; - result->u64 = (uint64_t)current_result[0] | - (uint64_t)current_result[1] << 32; + result->u64 = *(uint64_t*)buffer; break; - } case PIPE_QUERY_PRIMITIVES_EMITTED: /* SAMPLE_STREAMOUTSTATS stores this structure: * { @@ -926,15 +1097,30 @@ return rquery->ops->get_result(rctx, rquery, wait, result); } +static void r600_get_query_result_resource(struct pipe_context *ctx, + struct pipe_query *query, + boolean wait, + enum pipe_query_value_type result_type, + int index, + struct pipe_resource *resource, + unsigned offset) +{ + struct r600_common_context *rctx = (struct r600_common_context *)ctx; + struct r600_query *rquery = (struct r600_query *)query; + + rquery->ops->get_result_resource(rctx, rquery, wait, result_type, index, + resource, offset); +} + static void r600_query_hw_clear_result(struct r600_query_hw *query, union pipe_query_result *result) { util_query_clear_result(result, query->b.type); } -boolean r600_query_hw_get_result(struct r600_common_context *rctx, - struct r600_query *rquery, - boolean wait, union pipe_query_result *result) +bool r600_query_hw_get_result(struct r600_common_context *rctx, + struct r600_query *rquery, + bool wait, union pipe_query_result *result) { struct r600_query_hw *query = (struct r600_query_hw *)rquery; struct r600_query_buffer *qbuf; @@ -949,7 +1135,7 @@ PIPE_TRANSFER_READ | (wait ? 0 : PIPE_TRANSFER_DONTBLOCK)); if (!map) - return FALSE; + return false; while (results_base != qbuf->results_end) { query->ops->add_result(rctx, query, map + results_base, @@ -963,7 +1149,366 @@ rquery->type == PIPE_QUERY_TIMESTAMP) { result->u64 = (1000000 * result->u64) / rctx->screen->info.clock_crystal_freq; } - return TRUE; + return true; +} + +/* Create the compute shader that is used to collect the results. + * + * One compute grid with a single thread is launched for every query result + * buffer. The thread (optionally) reads a previous summary buffer, then + * accumulates data from the query result buffer, and writes the result either + * to a summary buffer to be consumed by the next grid invocation or to the + * user-supplied buffer. + * + * Data layout: + * + * CONST + * 0.x = end_offset + * 0.y = result_stride + * 0.z = result_count + * 0.w = bit field: + * 1: read previously accumulated values + * 2: write accumulated values for chaining + * 4: write result available + * 8: convert result to boolean (0/1) + * 16: only read one dword and use that as result + * 32: apply timestamp conversion + * 64: store full 64 bits result + * 128: store signed 32 bits result + * 1.x = fence_offset + * 1.y = pair_stride + * 1.z = pair_count + * + * BUFFER[0] = query result buffer + * BUFFER[1] = previous summary buffer + * BUFFER[2] = next summary buffer or user-supplied buffer + */ +static void r600_create_query_result_shader(struct r600_common_context *rctx) +{ + /* TEMP[0].xy = accumulated result so far + * TEMP[0].z = result not available + * + * TEMP[1].x = current result index + * TEMP[1].y = current pair index + */ + static const char text_tmpl[] = + "COMP\n" + "PROPERTY CS_FIXED_BLOCK_WIDTH 1\n" + "PROPERTY CS_FIXED_BLOCK_HEIGHT 1\n" + "PROPERTY CS_FIXED_BLOCK_DEPTH 1\n" + "DCL BUFFER[0]\n" + "DCL BUFFER[1]\n" + "DCL BUFFER[2]\n" + "DCL CONST[0..1]\n" + "DCL TEMP[0..5]\n" + "IMM[0] UINT32 {0, 31, 2147483647, 4294967295}\n" + "IMM[1] UINT32 {1, 2, 4, 8}\n" + "IMM[2] UINT32 {16, 32, 64, 128}\n" + "IMM[3] UINT32 {1000000, 0, %u, 0}\n" /* for timestamp conversion */ + + "AND TEMP[5], CONST[0].wwww, IMM[2].xxxx\n" + "UIF TEMP[5]\n" + /* Check result availability. */ + "LOAD TEMP[1].x, BUFFER[0], CONST[1].xxxx\n" + "ISHR TEMP[0].z, TEMP[1].xxxx, IMM[0].yyyy\n" + "MOV TEMP[1], TEMP[0].zzzz\n" + "NOT TEMP[0].z, TEMP[0].zzzz\n" + + /* Load result if available. */ + "UIF TEMP[1]\n" + "LOAD TEMP[0].xy, BUFFER[0], IMM[0].xxxx\n" + "ENDIF\n" + "ELSE\n" + /* Load previously accumulated result if requested. */ + "MOV TEMP[0], IMM[0].xxxx\n" + "AND TEMP[4], CONST[0].wwww, IMM[1].xxxx\n" + "UIF TEMP[4]\n" + "LOAD TEMP[0].xyz, BUFFER[1], IMM[0].xxxx\n" + "ENDIF\n" + + "MOV TEMP[1].x, IMM[0].xxxx\n" + "BGNLOOP\n" + /* Break if accumulated result so far is not available. */ + "UIF TEMP[0].zzzz\n" + "BRK\n" + "ENDIF\n" + + /* Break if result_index >= result_count. */ + "USGE TEMP[5], TEMP[1].xxxx, CONST[0].zzzz\n" + "UIF TEMP[5]\n" + "BRK\n" + "ENDIF\n" + + /* Load fence and check result availability */ + "UMAD TEMP[5].x, TEMP[1].xxxx, CONST[0].yyyy, CONST[1].xxxx\n" + "LOAD TEMP[5].x, BUFFER[0], TEMP[5].xxxx\n" + "ISHR TEMP[0].z, TEMP[5].xxxx, IMM[0].yyyy\n" + "NOT TEMP[0].z, TEMP[0].zzzz\n" + "UIF TEMP[0].zzzz\n" + "BRK\n" + "ENDIF\n" + + "MOV TEMP[1].y, IMM[0].xxxx\n" + "BGNLOOP\n" + /* Load start and end. */ + "UMUL TEMP[5].x, TEMP[1].xxxx, CONST[0].yyyy\n" + "UMAD TEMP[5].x, TEMP[1].yyyy, CONST[1].yyyy, TEMP[5].xxxx\n" + "LOAD TEMP[2].xy, BUFFER[0], TEMP[5].xxxx\n" + + "UADD TEMP[5].x, TEMP[5].xxxx, CONST[0].xxxx\n" + "LOAD TEMP[3].xy, BUFFER[0], TEMP[5].xxxx\n" + + "U64ADD TEMP[3].xy, TEMP[3], -TEMP[2]\n" + "U64ADD TEMP[0].xy, TEMP[0], TEMP[3]\n" + + /* Increment pair index */ + "UADD TEMP[1].y, TEMP[1].yyyy, IMM[1].xxxx\n" + "USGE TEMP[5], TEMP[1].yyyy, CONST[1].zzzz\n" + "UIF TEMP[5]\n" + "BRK\n" + "ENDIF\n" + "ENDLOOP\n" + + /* Increment result index */ + "UADD TEMP[1].x, TEMP[1].xxxx, IMM[1].xxxx\n" + "ENDLOOP\n" + "ENDIF\n" + + "AND TEMP[4], CONST[0].wwww, IMM[1].yyyy\n" + "UIF TEMP[4]\n" + /* Store accumulated data for chaining. */ + "STORE BUFFER[2].xyz, IMM[0].xxxx, TEMP[0]\n" + "ELSE\n" + "AND TEMP[4], CONST[0].wwww, IMM[1].zzzz\n" + "UIF TEMP[4]\n" + /* Store result availability. */ + "NOT TEMP[0].z, TEMP[0]\n" + "AND TEMP[0].z, TEMP[0].zzzz, IMM[1].xxxx\n" + "STORE BUFFER[2].x, IMM[0].xxxx, TEMP[0].zzzz\n" + + "AND TEMP[4], CONST[0].wwww, IMM[2].zzzz\n" + "UIF TEMP[4]\n" + "STORE BUFFER[2].y, IMM[0].xxxx, IMM[0].xxxx\n" + "ENDIF\n" + "ELSE\n" + /* Store result if it is available. */ + "NOT TEMP[4], TEMP[0].zzzz\n" + "UIF TEMP[4]\n" + /* Apply timestamp conversion */ + "AND TEMP[4], CONST[0].wwww, IMM[2].yyyy\n" + "UIF TEMP[4]\n" + "U64MUL TEMP[0].xy, TEMP[0], IMM[3].xyxy\n" + "U64DIV TEMP[0].xy, TEMP[0], IMM[3].zwzw\n" + "ENDIF\n" + + /* Convert to boolean */ + "AND TEMP[4], CONST[0].wwww, IMM[1].wwww\n" + "UIF TEMP[4]\n" + "U64SNE TEMP[0].x, TEMP[0].xyxy, IMM[0].xxxx\n" + "AND TEMP[0].x, TEMP[0].xxxx, IMM[1].xxxx\n" + "MOV TEMP[0].y, IMM[0].xxxx\n" + "ENDIF\n" + + "AND TEMP[4], CONST[0].wwww, IMM[2].zzzz\n" + "UIF TEMP[4]\n" + "STORE BUFFER[2].xy, IMM[0].xxxx, TEMP[0].xyxy\n" + "ELSE\n" + /* Clamping */ + "UIF TEMP[0].yyyy\n" + "MOV TEMP[0].x, IMM[0].wwww\n" + "ENDIF\n" + + "AND TEMP[4], CONST[0].wwww, IMM[2].wwww\n" + "UIF TEMP[4]\n" + "UMIN TEMP[0].x, TEMP[0].xxxx, IMM[0].zzzz\n" + "ENDIF\n" + + "STORE BUFFER[2].x, IMM[0].xxxx, TEMP[0].xxxx\n" + "ENDIF\n" + "ENDIF\n" + "ENDIF\n" + "ENDIF\n" + + "END\n"; + + char text[sizeof(text_tmpl) + 32]; + struct tgsi_token tokens[1024]; + struct pipe_compute_state state = {}; + + /* Hard code the frequency into the shader so that the backend can + * use the full range of optimizations for divide-by-constant. + */ + snprintf(text, sizeof(text), text_tmpl, + rctx->screen->info.clock_crystal_freq); + + if (!tgsi_text_translate(text, tokens, ARRAY_SIZE(tokens))) { + assert(false); + return; + } + + state.ir_type = PIPE_SHADER_IR_TGSI; + state.prog = tokens; + + rctx->query_result_shader = rctx->b.create_compute_state(&rctx->b, &state); +} + +static void r600_restore_qbo_state(struct r600_common_context *rctx, + struct r600_qbo_state *st) +{ + rctx->b.bind_compute_state(&rctx->b, st->saved_compute); + + rctx->b.set_constant_buffer(&rctx->b, PIPE_SHADER_COMPUTE, 0, &st->saved_const0); + pipe_resource_reference(&st->saved_const0.buffer, NULL); + + rctx->b.set_shader_buffers(&rctx->b, PIPE_SHADER_COMPUTE, 0, 3, st->saved_ssbo); + for (unsigned i = 0; i < 3; ++i) + pipe_resource_reference(&st->saved_ssbo[i].buffer, NULL); +} + +static void r600_query_hw_get_result_resource(struct r600_common_context *rctx, + struct r600_query *rquery, + bool wait, + enum pipe_query_value_type result_type, + int index, + struct pipe_resource *resource, + unsigned offset) +{ + struct r600_query_hw *query = (struct r600_query_hw *)rquery; + struct r600_query_buffer *qbuf; + struct r600_query_buffer *qbuf_prev; + struct pipe_resource *tmp_buffer = NULL; + unsigned tmp_buffer_offset = 0; + struct r600_qbo_state saved_state = {}; + struct pipe_grid_info grid = {}; + struct pipe_constant_buffer constant_buffer = {}; + struct pipe_shader_buffer ssbo[3]; + struct r600_hw_query_params params; + struct { + uint32_t end_offset; + uint32_t result_stride; + uint32_t result_count; + uint32_t config; + uint32_t fence_offset; + uint32_t pair_stride; + uint32_t pair_count; + } consts; + + if (!rctx->query_result_shader) { + r600_create_query_result_shader(rctx); + if (!rctx->query_result_shader) + return; + } + + if (query->buffer.previous) { + u_suballocator_alloc(rctx->allocator_zeroed_memory, 16, 16, + &tmp_buffer_offset, &tmp_buffer); + if (!tmp_buffer) + return; + } + + rctx->save_qbo_state(&rctx->b, &saved_state); + + r600_get_hw_query_params(rctx, query, index >= 0 ? index : 0, ¶ms); + consts.end_offset = params.end_offset - params.start_offset; + consts.fence_offset = params.fence_offset - params.start_offset; + consts.result_stride = query->result_size; + consts.pair_stride = params.pair_stride; + consts.pair_count = params.pair_count; + + constant_buffer.buffer_size = sizeof(consts); + constant_buffer.user_buffer = &consts; + + ssbo[1].buffer = tmp_buffer; + ssbo[1].buffer_offset = tmp_buffer_offset; + ssbo[1].buffer_size = 16; + + ssbo[2] = ssbo[1]; + + rctx->b.bind_compute_state(&rctx->b, rctx->query_result_shader); + + grid.block[0] = 1; + grid.block[1] = 1; + grid.block[2] = 1; + grid.grid[0] = 1; + grid.grid[1] = 1; + grid.grid[2] = 1; + + consts.config = 0; + if (index < 0) + consts.config |= 4; + if (query->b.type == PIPE_QUERY_OCCLUSION_PREDICATE || + query->b.type == PIPE_QUERY_SO_OVERFLOW_PREDICATE) + consts.config |= 8; + else if (query->b.type == PIPE_QUERY_TIMESTAMP || + query->b.type == PIPE_QUERY_TIME_ELAPSED) + consts.config |= 32; + + switch (result_type) { + case PIPE_QUERY_TYPE_U64: + case PIPE_QUERY_TYPE_I64: + consts.config |= 64; + break; + case PIPE_QUERY_TYPE_I32: + consts.config |= 128; + break; + case PIPE_QUERY_TYPE_U32: + break; + } + + rctx->flags |= rctx->screen->barrier_flags.cp_to_L2; + + for (qbuf = &query->buffer; qbuf; qbuf = qbuf_prev) { + if (query->b.type != PIPE_QUERY_TIMESTAMP) { + qbuf_prev = qbuf->previous; + consts.result_count = qbuf->results_end / query->result_size; + consts.config &= ~3; + if (qbuf != &query->buffer) + consts.config |= 1; + if (qbuf->previous) + consts.config |= 2; + } else { + /* Only read the last timestamp. */ + qbuf_prev = NULL; + consts.result_count = 0; + consts.config |= 16; + params.start_offset += qbuf->results_end - query->result_size; + } + + rctx->b.set_constant_buffer(&rctx->b, PIPE_SHADER_COMPUTE, 0, &constant_buffer); + + ssbo[0].buffer = &qbuf->buf->b.b; + ssbo[0].buffer_offset = params.start_offset; + ssbo[0].buffer_size = qbuf->results_end - params.start_offset; + + if (!qbuf->previous) { + ssbo[2].buffer = resource; + ssbo[2].buffer_offset = offset; + ssbo[2].buffer_size = 8; + + ((struct r600_resource *)resource)->TC_L2_dirty = true; + } + + rctx->b.set_shader_buffers(&rctx->b, PIPE_SHADER_COMPUTE, 0, 3, ssbo); + + if (wait && qbuf == &query->buffer) { + uint64_t va; + + /* Wait for result availability. Wait only for readiness + * of the last entry, since the fence writes should be + * serialized in the CP. + */ + va = qbuf->buf->gpu_address + qbuf->results_end - query->result_size; + va += params.fence_offset; + + r600_gfx_wait_fence(rctx, va, 0x80000000, 0x80000000); + } + + rctx->b.launch_grid(&rctx->b, &grid); + rctx->flags |= rctx->screen->barrier_flags.compute_to_L2; + } + + r600_restore_qbo_state(rctx, &saved_state); + pipe_resource_reference(&tmp_buffer, NULL); } static void r600_render_condition(struct pipe_context *ctx, @@ -1033,7 +1578,7 @@ assert(ctx->num_cs_dw_queries_suspend == 0); /* Check CS space here. Resuming must not be interrupted by flushes. */ - ctx->need_gfx_cs_space(&ctx->b, num_cs_dw, TRUE); + ctx->need_gfx_cs_space(&ctx->b, num_cs_dw, true); LIST_FOR_EACH_ENTRY(query, &ctx->active_queries, list) { r600_query_hw_emit_start(ctx, query); @@ -1078,7 +1623,7 @@ /* create buffer for event data */ buffer = (struct r600_resource*) - pipe_buffer_create(ctx->b.screen, PIPE_BIND_CUSTOM, + pipe_buffer_create(ctx->b.screen, 0, PIPE_USAGE_STAGING, ctx->max_db*16); if (!buffer) goto err; @@ -1108,7 +1653,7 @@ } } - pipe_resource_reference((struct pipe_resource**)&buffer, NULL); + r600_resource_reference(&buffer, NULL); if (mask != 0) { ctx->backend_mask = mask; @@ -1139,14 +1684,31 @@ static struct pipe_driver_query_info r600_driver_query_list[] = { X("num-compilations", NUM_COMPILATIONS, UINT64, CUMULATIVE), X("num-shaders-created", NUM_SHADERS_CREATED, UINT64, CUMULATIVE), + X("num-shader-cache-hits", NUM_SHADER_CACHE_HITS, UINT64, CUMULATIVE), X("draw-calls", DRAW_CALLS, UINT64, AVERAGE), + X("spill-draw-calls", SPILL_DRAW_CALLS, UINT64, AVERAGE), + X("compute-calls", COMPUTE_CALLS, UINT64, AVERAGE), + X("spill-compute-calls", SPILL_COMPUTE_CALLS, UINT64, AVERAGE), + X("dma-calls", DMA_CALLS, UINT64, AVERAGE), + X("cp-dma-calls", CP_DMA_CALLS, UINT64, AVERAGE), + X("num-vs-flushes", NUM_VS_FLUSHES, UINT64, AVERAGE), + X("num-ps-flushes", NUM_PS_FLUSHES, UINT64, AVERAGE), + X("num-cs-flushes", NUM_CS_FLUSHES, UINT64, AVERAGE), + X("num-fb-cache-flushes", NUM_FB_CACHE_FLUSHES, UINT64, AVERAGE), + X("num-L2-invalidates", NUM_L2_INVALIDATES, UINT64, AVERAGE), + X("num-L2-writebacks", NUM_L2_WRITEBACKS, UINT64, AVERAGE), X("requested-VRAM", REQUESTED_VRAM, BYTES, AVERAGE), X("requested-GTT", REQUESTED_GTT, BYTES, AVERAGE), + X("mapped-VRAM", MAPPED_VRAM, BYTES, AVERAGE), + X("mapped-GTT", MAPPED_GTT, BYTES, AVERAGE), X("buffer-wait-time", BUFFER_WAIT_TIME, MICROSECONDS, CUMULATIVE), - X("num-cs-flushes", NUM_CS_FLUSHES, UINT64, CUMULATIVE), + X("num-GFX-IBs", NUM_GFX_IBS, UINT64, AVERAGE), + X("num-SDMA-IBs", NUM_SDMA_IBS, UINT64, AVERAGE), X("num-bytes-moved", NUM_BYTES_MOVED, BYTES, CUMULATIVE), + X("num-evictions", NUM_EVICTIONS, UINT64, CUMULATIVE), X("VRAM-usage", VRAM_USAGE, BYTES, AVERAGE), X("GTT-usage", GTT_USAGE, BYTES, AVERAGE), + X("back-buffer-ps-draw-ratio", BACK_BUFFER_PS_DRAW_RATIO, UINT64, AVERAGE), /* GPIN queries are for the benefit of old versions of GPUPerfStudio, * which use it as a fallback path to detect the GPU type. @@ -1162,6 +1724,7 @@ /* The following queries must be at the end of the list because their * availability is adjusted dynamically based on the DRM version. */ X("GPU-load", GPU_LOAD, UINT64, AVERAGE), + X("GPU-shaders-busy", GPU_SHADERS_BUSY, UINT64, AVERAGE), X("temperature", GPU_TEMPERATURE, UINT64, AVERAGE), X("shader-clock", CURRENT_GPU_SCLK, HZ, AVERAGE), X("memory-clock", CURRENT_GPU_MCLK, HZ, AVERAGE), @@ -1178,7 +1741,7 @@ else if (rscreen->info.drm_major == 3) return ARRAY_SIZE(r600_driver_query_list) - 3; else - return ARRAY_SIZE(r600_driver_query_list) - 4; + return ARRAY_SIZE(r600_driver_query_list) - 5; } static int r600_get_driver_query_info(struct pipe_screen *screen, @@ -1203,10 +1766,12 @@ switch (info->query_type) { case R600_QUERY_REQUESTED_VRAM: case R600_QUERY_VRAM_USAGE: + case R600_QUERY_MAPPED_VRAM: info->max_value.u64 = rscreen->info.vram_size; break; case R600_QUERY_REQUESTED_GTT: case R600_QUERY_GTT_USAGE: + case R600_QUERY_MAPPED_GTT: info->max_value.u64 = rscreen->info.gart_size; break; case R600_QUERY_GPU_TEMPERATURE: @@ -1258,6 +1823,7 @@ rctx->b.begin_query = r600_begin_query; rctx->b.end_query = r600_end_query; rctx->b.get_query_result = r600_get_query_result; + rctx->b.get_query_result_resource = r600_get_query_result_resource; rctx->render_cond_atom.emit = r600_emit_query_predication; if (((struct r600_common_screen*)rctx->b.screen)->info.num_render_backends > 0) diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/r600_query.h mesa-17.0.7/src/gallium/drivers/radeon/r600_query.h --- mesa-12.0.6/src/gallium/drivers/radeon/r600_query.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/r600_query.h 2017-06-01 10:37:10.000000000 +0000 @@ -29,10 +29,12 @@ #define R600_QUERY_H #include "pipe/p_defines.h" +#include "pipe/p_state.h" #include "util/list.h" struct pipe_context; struct pipe_query; +struct pipe_resource; struct r600_common_context; struct r600_common_screen; @@ -42,19 +44,37 @@ enum { R600_QUERY_DRAW_CALLS = PIPE_QUERY_DRIVER_SPECIFIC, + R600_QUERY_SPILL_DRAW_CALLS, + R600_QUERY_COMPUTE_CALLS, + R600_QUERY_SPILL_COMPUTE_CALLS, + R600_QUERY_DMA_CALLS, + R600_QUERY_CP_DMA_CALLS, + R600_QUERY_NUM_VS_FLUSHES, + R600_QUERY_NUM_PS_FLUSHES, + R600_QUERY_NUM_CS_FLUSHES, + R600_QUERY_NUM_FB_CACHE_FLUSHES, + R600_QUERY_NUM_L2_INVALIDATES, + R600_QUERY_NUM_L2_WRITEBACKS, R600_QUERY_REQUESTED_VRAM, R600_QUERY_REQUESTED_GTT, + R600_QUERY_MAPPED_VRAM, + R600_QUERY_MAPPED_GTT, R600_QUERY_BUFFER_WAIT_TIME, - R600_QUERY_NUM_CS_FLUSHES, + R600_QUERY_NUM_GFX_IBS, + R600_QUERY_NUM_SDMA_IBS, R600_QUERY_NUM_BYTES_MOVED, + R600_QUERY_NUM_EVICTIONS, R600_QUERY_VRAM_USAGE, R600_QUERY_GTT_USAGE, R600_QUERY_GPU_TEMPERATURE, R600_QUERY_CURRENT_GPU_SCLK, R600_QUERY_CURRENT_GPU_MCLK, R600_QUERY_GPU_LOAD, + R600_QUERY_GPU_SHADERS_BUSY, R600_QUERY_NUM_COMPILATIONS, R600_QUERY_NUM_SHADERS_CREATED, + R600_QUERY_BACK_BUFFER_PS_DRAW_RATIO, + R600_QUERY_NUM_SHADER_CACHE_HITS, R600_QUERY_GPIN_ASIC_ID, R600_QUERY_GPIN_NUM_SIMD, R600_QUERY_GPIN_NUM_RB, @@ -71,11 +91,17 @@ struct r600_query_ops { void (*destroy)(struct r600_common_context *, struct r600_query *); - boolean (*begin)(struct r600_common_context *, struct r600_query *); + bool (*begin)(struct r600_common_context *, struct r600_query *); bool (*end)(struct r600_common_context *, struct r600_query *); - boolean (*get_result)(struct r600_common_context *, - struct r600_query *, boolean wait, - union pipe_query_result *result); + bool (*get_result)(struct r600_common_context *, + struct r600_query *, bool wait, + union pipe_query_result *result); + void (*get_result_resource)(struct r600_common_context *, + struct r600_query *, bool wait, + enum pipe_query_value_type result_type, + int index, + struct pipe_resource *resource, + unsigned offset); }; struct r600_query { @@ -87,7 +113,9 @@ enum { R600_QUERY_HW_FLAG_NO_START = (1 << 0), - R600_QUERY_HW_FLAG_PREDICATE = (1 << 1), + /* gap */ + /* whether begin_query doesn't clear the result */ + R600_QUERY_HW_FLAG_BEGIN_RESUMES = (1 << 2), }; struct r600_query_hw_ops { @@ -136,18 +164,18 @@ unsigned stream; }; -boolean r600_query_hw_init(struct r600_common_context *rctx, - struct r600_query_hw *query); +bool r600_query_hw_init(struct r600_common_context *rctx, + struct r600_query_hw *query); void r600_query_hw_destroy(struct r600_common_context *rctx, struct r600_query *rquery); -boolean r600_query_hw_begin(struct r600_common_context *rctx, - struct r600_query *rquery); +bool r600_query_hw_begin(struct r600_common_context *rctx, + struct r600_query *rquery); bool r600_query_hw_end(struct r600_common_context *rctx, struct r600_query *rquery); -boolean r600_query_hw_get_result(struct r600_common_context *rctx, - struct r600_query *rquery, - boolean wait, - union pipe_query_result *result); +bool r600_query_hw_get_result(struct r600_common_context *rctx, + struct r600_query *rquery, + bool wait, + union pipe_query_result *result); /* Performance counters */ enum { @@ -229,8 +257,8 @@ void (*cleanup)(struct r600_common_screen *); - boolean separate_se; - boolean separate_instance; + bool separate_se; + bool separate_instance; }; struct pipe_query *r600_create_batch_query(struct pipe_context *ctx, @@ -244,12 +272,20 @@ unsigned index, struct pipe_driver_query_group_info *info); -boolean r600_perfcounters_init(struct r600_perfcounters *, unsigned num_blocks); +bool r600_perfcounters_init(struct r600_perfcounters *, unsigned num_blocks); void r600_perfcounters_add_block(struct r600_common_screen *, struct r600_perfcounters *, const char *name, unsigned flags, unsigned counters, unsigned selectors, unsigned instances, void *data); void r600_perfcounters_do_destroy(struct r600_perfcounters *); +void r600_query_hw_reset_buffers(struct r600_common_context *rctx, + struct r600_query_hw *query); + +struct r600_qbo_state { + void *saved_compute; + struct pipe_constant_buffer saved_const0; + struct pipe_shader_buffer saved_ssbo[3]; +}; #endif /* R600_QUERY_H */ diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/r600_streamout.c mesa-17.0.7/src/gallium/drivers/radeon/r600_streamout.c --- mesa-12.0.6/src/gallium/drivers/radeon/r600_streamout.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/r600_streamout.c 2017-06-01 10:37:10.000000000 +0000 @@ -46,7 +46,7 @@ return NULL; } - u_suballocator_alloc(rctx->allocator_so_filled_size, 4, + u_suballocator_alloc(rctx->allocator_zeroed_memory, 4, 4, &t->buf_filled_size_offset, (struct pipe_resource**)&t->buf_filled_size); if (!t->buf_filled_size) { @@ -70,7 +70,7 @@ { struct r600_so_target *t = (struct r600_so_target*)target; pipe_resource_reference(&t->b.buffer, NULL); - pipe_resource_reference((struct pipe_resource**)&t->buf_filled_size, NULL); + r600_resource_reference(&t->buf_filled_size, NULL); FREE(t); } @@ -218,7 +218,7 @@ radeon_emit(cs, va >> 8); /* BUFFER_BASE */ r600_emit_reloc(rctx, &rctx->gfx, r600_resource(t[i]->b.buffer), - RADEON_USAGE_WRITE, RADEON_PRIO_RINGS_STREAMOUT); + RADEON_USAGE_WRITE, RADEON_PRIO_SHADER_RW_BUFFER); /* R7xx requires this packet after updating BUFFER_BASE. * Without this, R7xx locks up. */ @@ -228,7 +228,7 @@ radeon_emit(cs, va >> 8); r600_emit_reloc(rctx, &rctx->gfx, r600_resource(t[i]->b.buffer), - RADEON_USAGE_WRITE, RADEON_PRIO_RINGS_STREAMOUT); + RADEON_USAGE_WRITE, RADEON_PRIO_SHADER_RW_BUFFER); } } diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/r600_test_dma.c mesa-17.0.7/src/gallium/drivers/radeon/r600_test_dma.c --- mesa-12.0.6/src/gallium/drivers/radeon/r600_test_dma.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/r600_test_dma.c 2017-06-01 10:37:10.000000000 +0000 @@ -301,7 +301,7 @@ set_random_pixels(ctx, src, &src_cpu); /* clear dst pixels */ - rctx->clear_buffer(ctx, dst, 0, rdst->surface.bo_size, 0, true); + rctx->clear_buffer(ctx, dst, 0, rdst->surface.surf_size, 0, true); memset(dst_cpu.ptr, 0, dst_cpu.layer_stride * tdst.array_size); /* preparation */ @@ -331,8 +331,8 @@ dstz = rand() % (tdst.array_size - depth + 1); /* special code path to hit the tiled partial copies */ - if (rsrc->surface.level[0].mode >= RADEON_SURF_MODE_1D && - rdst->surface.level[0].mode >= RADEON_SURF_MODE_1D && + if (!rsrc->surface.is_linear && + !rdst->surface.is_linear && rand() & 1) { if (max_width < 8 || max_height < 8) continue; @@ -345,6 +345,9 @@ dstx = rand() % (tdst.width0 - width + 1) & ~0x7; dsty = rand() % (tdst.height0 - height + 1) & ~0x7; } else { + /* just make sure that it doesn't divide by zero */ + assert(max_width > 0 && max_height > 0); + width = (rand() % max_width) + 1; height = (rand() % max_height) + 1; @@ -356,8 +359,8 @@ } /* special code path to hit out-of-bounds reads in L2T */ - if (rsrc->surface.level[0].mode == RADEON_SURF_MODE_LINEAR_ALIGNED && - rdst->surface.level[0].mode >= RADEON_SURF_MODE_1D && + if (rsrc->surface.is_linear && + !rdst->surface.is_linear && rand() % 4 == 0) { srcx = 0; srcy = 0; diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/r600_texture.c mesa-17.0.7/src/gallium/drivers/radeon/r600_texture.c --- mesa-12.0.6/src/gallium/drivers/radeon/r600_texture.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/r600_texture.c 2017-06-01 10:37:10.000000000 +0000 @@ -26,29 +26,22 @@ */ #include "r600_pipe_common.h" #include "r600_cs.h" +#include "r600_query.h" #include "util/u_format.h" #include "util/u_memory.h" #include "util/u_pack_color.h" +#include "util/u_surface.h" +#include "os/os_time.h" #include #include -static void r600_texture_discard_dcc(struct r600_common_screen *rscreen, - struct r600_texture *rtex); static void r600_texture_discard_cmask(struct r600_common_screen *rscreen, struct r600_texture *rtex); +static enum radeon_surf_mode +r600_choose_tiling(struct r600_common_screen *rscreen, + const struct pipe_resource *templ); -static bool range_covers_whole_texture(struct pipe_resource *tex, - unsigned level, unsigned x, unsigned y, - unsigned z, unsigned width, - unsigned height, unsigned depth) -{ - return x == 0 && y == 0 && z == 0 && - width == u_minify(tex->width0, level) && - height == u_minify(tex->height0, level) && - depth == util_max_layer(tex, level) + 1; -} - bool r600_prepare_for_dma_blit(struct r600_common_context *rctx, struct r600_texture *rdst, unsigned dst_level, unsigned dstx, @@ -60,8 +53,7 @@ if (!rctx->dma.cs) return false; - if (util_format_get_blocksizebits(rdst->resource.b.b.format) != - util_format_get_blocksizebits(rsrc->resource.b.b.format)) + if (rdst->surface.bpe != rsrc->surface.bpe) return false; /* MSAA: Blits don't exist in the real world. */ @@ -78,32 +70,23 @@ /* DCC as: * src: Use the 3D path. DCC decompression is expensive. - * dst: If overwriting the whole texture, discard DCC and use SDMA. - * Otherwise, use the 3D path. + * dst: Use the 3D path to compress the pixels with DCC. */ - if (rsrc->dcc_offset) + if ((rsrc->dcc_offset && src_level < rsrc->surface.num_dcc_levels) || + (rdst->dcc_offset && dst_level < rdst->surface.num_dcc_levels)) return false; - if (rdst->dcc_offset) { - /* We can't discard DCC if the texture has been exported. */ - if (rdst->resource.is_shared || - !range_covers_whole_texture(&rdst->resource.b.b, dst_level, - dstx, dsty, dstz, src_box->width, - src_box->height, src_box->depth)) - return false; - - r600_texture_discard_dcc(rctx->screen, rdst); - } - /* CMASK as: * src: Both texture and SDMA paths need decompression. Use SDMA. * dst: If overwriting the whole texture, discard CMASK and use * SDMA. Otherwise, use the 3D path. */ if (rdst->cmask.size && rdst->dirty_level_mask & (1 << dst_level)) { - if (!range_covers_whole_texture(&rdst->resource.b.b, dst_level, - dstx, dsty, dstz, src_box->width, - src_box->height, src_box->depth)) + /* The CMASK clear is only enabled for the first level. */ + assert(dst_level == 0); + if (!util_texrange_covers_whole_level(&rdst->resource.b.b, dst_level, + dstx, dsty, dstz, src_box->width, + src_box->height, src_box->depth)) return false; r600_texture_discard_cmask(rctx->screen, rdst); @@ -197,129 +180,100 @@ static unsigned r600_texture_get_offset(struct r600_texture *rtex, unsigned level, const struct pipe_box *box) { - enum pipe_format format = rtex->resource.b.b.format; - return rtex->surface.level[level].offset + box->z * rtex->surface.level[level].slice_size + - box->y / util_format_get_blockheight(format) * rtex->surface.level[level].pitch_bytes + - box->x / util_format_get_blockwidth(format) * util_format_get_blocksize(format); + (box->y / rtex->surface.blk_h * + rtex->surface.level[level].nblk_x + + box->x / rtex->surface.blk_w) * rtex->surface.bpe; } static int r600_init_surface(struct r600_common_screen *rscreen, struct radeon_surf *surface, const struct pipe_resource *ptex, - unsigned array_mode, - bool is_flushed_depth) + enum radeon_surf_mode array_mode, + unsigned pitch_in_bytes_override, + unsigned offset, + bool is_imported, + bool is_scanout, + bool is_flushed_depth, + bool tc_compatible_htile) { const struct util_format_description *desc = util_format_description(ptex->format); bool is_depth, is_stencil; + int r; + unsigned i, bpe, flags = 0; is_depth = util_format_has_depth(desc); is_stencil = util_format_has_stencil(desc); - surface->npix_x = ptex->width0; - surface->npix_y = ptex->height0; - surface->npix_z = ptex->depth0; - surface->blk_w = util_format_get_blockwidth(ptex->format); - surface->blk_h = util_format_get_blockheight(ptex->format); - surface->blk_d = 1; - surface->array_size = 1; - surface->last_level = ptex->last_level; - if (rscreen->chip_class >= EVERGREEN && !is_flushed_depth && ptex->format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT) { - surface->bpe = 4; /* stencil is allocated separately on evergreen */ + bpe = 4; /* stencil is allocated separately on evergreen */ } else { - surface->bpe = util_format_get_blocksize(ptex->format); + bpe = util_format_get_blocksize(ptex->format); /* align byte per element on dword */ - if (surface->bpe == 3) { - surface->bpe = 4; + if (bpe == 3) { + bpe = 4; } } - surface->nsamples = ptex->nr_samples ? ptex->nr_samples : 1; - surface->flags = RADEON_SURF_SET(array_mode, MODE); - - switch (ptex->target) { - case PIPE_TEXTURE_1D: - surface->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_1D, TYPE); - break; - case PIPE_TEXTURE_RECT: - case PIPE_TEXTURE_2D: - surface->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_2D, TYPE); - break; - case PIPE_TEXTURE_3D: - surface->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_3D, TYPE); - break; - case PIPE_TEXTURE_1D_ARRAY: - surface->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_1D_ARRAY, TYPE); - surface->array_size = ptex->array_size; - break; - case PIPE_TEXTURE_CUBE_ARRAY: /* cube array layout like 2d array */ - assert(ptex->array_size % 6 == 0); - case PIPE_TEXTURE_2D_ARRAY: - surface->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_2D_ARRAY, TYPE); - surface->array_size = ptex->array_size; - break; - case PIPE_TEXTURE_CUBE: - surface->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_CUBEMAP, TYPE); - break; - case PIPE_BUFFER: - default: - return -EINVAL; - } - if (ptex->bind & PIPE_BIND_SCANOUT) { - surface->flags |= RADEON_SURF_SCANOUT; - } - if (!is_flushed_depth && is_depth) { - surface->flags |= RADEON_SURF_ZBUFFER; + flags |= RADEON_SURF_ZBUFFER; - if (is_stencil) { - surface->flags |= RADEON_SURF_SBUFFER | - RADEON_SURF_HAS_SBUFFER_MIPTREE; + if (tc_compatible_htile && + array_mode == RADEON_SURF_MODE_2D) { + /* TC-compatible HTILE only supports Z32_FLOAT. + * Promote Z16 to Z32. DB->CB copies will convert + * the format for transfers. + */ + bpe = 4; + flags |= RADEON_SURF_TC_COMPATIBLE_HTILE; } - } - if (rscreen->chip_class >= SI) { - surface->flags |= RADEON_SURF_HAS_TILE_MODE_INDEX; + + if (is_stencil) + flags |= RADEON_SURF_SBUFFER; } if (rscreen->chip_class >= VI && - ptex->format == PIPE_FORMAT_R9G9B9E5_FLOAT) - surface->flags |= RADEON_SURF_DISABLE_DCC; - - return 0; -} + (ptex->flags & R600_RESOURCE_FLAG_DISABLE_DCC || + ptex->format == PIPE_FORMAT_R9G9B9E5_FLOAT)) + flags |= RADEON_SURF_DISABLE_DCC; + + if (ptex->bind & PIPE_BIND_SCANOUT || is_scanout) { + /* This should catch bugs in gallium users setting incorrect flags. */ + assert(ptex->nr_samples <= 1 && + ptex->array_size == 1 && + ptex->depth0 == 1 && + ptex->last_level == 0 && + !(flags & RADEON_SURF_Z_OR_SBUFFER)); + + flags |= RADEON_SURF_SCANOUT; + } + + if (is_imported) + flags |= RADEON_SURF_IMPORTED; + if (!(ptex->flags & R600_RESOURCE_FLAG_FORCE_TILING)) + flags |= RADEON_SURF_OPTIMIZE_FOR_SPACE; -static int r600_setup_surface(struct pipe_screen *screen, - struct r600_texture *rtex, - unsigned pitch_in_bytes_override, - unsigned offset) -{ - struct r600_common_screen *rscreen = (struct r600_common_screen*)screen; - unsigned i; - int r; - - r = rscreen->ws->surface_init(rscreen->ws, &rtex->surface); + r = rscreen->ws->surface_init(rscreen->ws, ptex, flags, bpe, + array_mode, surface); if (r) { return r; } - rtex->size = rtex->surface.bo_size; - - if (pitch_in_bytes_override && pitch_in_bytes_override != rtex->surface.level[0].pitch_bytes) { + if (pitch_in_bytes_override && + pitch_in_bytes_override != surface->level[0].nblk_x * bpe) { /* old ddx on evergreen over estimate alignment for 1d, only 1 level * for those */ - rtex->surface.level[0].nblk_x = pitch_in_bytes_override / rtex->surface.bpe; - rtex->surface.level[0].pitch_bytes = pitch_in_bytes_override; - rtex->surface.level[0].slice_size = pitch_in_bytes_override * rtex->surface.level[0].nblk_y; + surface->level[0].nblk_x = pitch_in_bytes_override / bpe; + surface->level[0].slice_size = pitch_in_bytes_override * surface->level[0].nblk_y; } if (offset) { - for (i = 0; i < ARRAY_SIZE(rtex->surface.level); ++i) - rtex->surface.level[i].offset += offset; + for (i = 0; i < ARRAY_SIZE(surface->level); ++i) + surface->level[i].offset += offset; } return 0; } @@ -340,7 +294,7 @@ metadata->tile_split = surface->tile_split; metadata->mtilea = surface->mtilea; metadata->num_banks = surface->num_banks; - metadata->stride = surface->level[0].pitch_bytes; + metadata->stride = surface->level[0].nblk_x * surface->bpe; metadata->scanout = (surface->flags & RADEON_SURF_SCANOUT) != 0; } @@ -349,15 +303,20 @@ p_atomic_inc(&rscreen->dirty_fb_counter); } -static void r600_eliminate_fast_color_clear(struct r600_common_screen *rscreen, - struct r600_texture *rtex) +static void r600_eliminate_fast_color_clear(struct r600_common_context *rctx, + struct r600_texture *rtex) { - struct pipe_context *ctx = rscreen->aux_context; + struct r600_common_screen *rscreen = rctx->screen; + struct pipe_context *ctx = &rctx->b; + + if (ctx == rscreen->aux_context) + pipe_mutex_lock(rscreen->aux_context_lock); - pipe_mutex_lock(rscreen->aux_context_lock); ctx->flush_resource(ctx, &rtex->resource.b.b); ctx->flush(ctx, NULL, 0); - pipe_mutex_unlock(rscreen->aux_context_lock); + + if (ctx == rscreen->aux_context) + pipe_mutex_unlock(rscreen->aux_context_lock); } static void r600_texture_discard_cmask(struct r600_common_screen *rscreen, @@ -371,6 +330,7 @@ /* Disable CMASK. */ memset(&rtex->cmask, 0, sizeof(rtex->cmask)); rtex->cmask.base_address_reg = rtex->resource.gpu_address >> 8; + rtex->dirty_level_mask = 0; if (rscreen->chip_class >= SI) rtex->cb_color_info &= ~SI_S_028C70_FAST_CLEAR(1); @@ -378,48 +338,161 @@ rtex->cb_color_info &= ~EG_S_028C70_FAST_CLEAR(1); if (rtex->cmask_buffer != &rtex->resource) - pipe_resource_reference((struct pipe_resource**)&rtex->cmask_buffer, NULL); + r600_resource_reference(&rtex->cmask_buffer, NULL); /* Notify all contexts about the change. */ r600_dirty_all_framebuffer_states(rscreen); p_atomic_inc(&rscreen->compressed_colortex_counter); } -static void r600_texture_discard_dcc(struct r600_common_screen *rscreen, +static bool r600_can_disable_dcc(struct r600_texture *rtex) +{ + /* We can't disable DCC if it can be written by another process. */ + return rtex->dcc_offset && + (!rtex->resource.is_shared || + !(rtex->resource.external_usage & PIPE_HANDLE_USAGE_WRITE)); +} + +static bool r600_texture_discard_dcc(struct r600_common_screen *rscreen, struct r600_texture *rtex) { + if (!r600_can_disable_dcc(rtex)) + return false; + + assert(rtex->dcc_separate_buffer == NULL); + /* Disable DCC. */ rtex->dcc_offset = 0; - rtex->cb_color_info &= ~VI_S_028C70_DCC_ENABLE(1); /* Notify all contexts about the change. */ r600_dirty_all_framebuffer_states(rscreen); + return true; } -void r600_texture_disable_dcc(struct r600_common_screen *rscreen, +/** + * Disable DCC for the texture. (first decompress, then discard metadata). + * + * There is unresolved multi-context synchronization issue between + * screen::aux_context and the current context. If applications do this with + * multiple contexts, it's already undefined behavior for them and we don't + * have to worry about that. The scenario is: + * + * If context 1 disables DCC and context 2 has queued commands that write + * to the texture via CB with DCC enabled, and the order of operations is + * as follows: + * context 2 queues draw calls rendering to the texture, but doesn't flush + * context 1 disables DCC and flushes + * context 1 & 2 reset descriptors and FB state + * context 2 flushes (new compressed tiles written by the draw calls) + * context 1 & 2 read garbage, because DCC is disabled, yet there are + * compressed tiled + * + * \param rctx the current context if you have one, or rscreen->aux_context + * if you don't. + */ +bool r600_texture_disable_dcc(struct r600_common_context *rctx, struct r600_texture *rtex) { - struct r600_common_context *rctx = - (struct r600_common_context *)rscreen->aux_context; + struct r600_common_screen *rscreen = rctx->screen; - if (!rtex->dcc_offset) - return; + if (!r600_can_disable_dcc(rtex)) + return false; + + if (&rctx->b == rscreen->aux_context) + pipe_mutex_lock(rscreen->aux_context_lock); /* Decompress DCC. */ - pipe_mutex_lock(rscreen->aux_context_lock); rctx->decompress_dcc(&rctx->b, rtex); rctx->b.flush(&rctx->b, NULL, 0); - pipe_mutex_unlock(rscreen->aux_context_lock); - r600_texture_discard_dcc(rscreen, rtex); + if (&rctx->b == rscreen->aux_context) + pipe_mutex_unlock(rscreen->aux_context_lock); + + return r600_texture_discard_dcc(rscreen, rtex); +} + +static void r600_degrade_tile_mode_to_linear(struct r600_common_context *rctx, + struct r600_texture *rtex, + bool invalidate_storage) +{ + struct pipe_screen *screen = rctx->b.screen; + struct r600_texture *new_tex; + struct pipe_resource templ = rtex->resource.b.b; + unsigned i; + + templ.bind |= PIPE_BIND_LINEAR; + + /* r600g doesn't react to dirty_tex_descriptor_counter */ + if (rctx->chip_class < SI) + return; + + if (rtex->resource.is_shared || + rtex->surface.is_linear) + return; + + /* This fails with MSAA, depth, and compressed textures. */ + if (r600_choose_tiling(rctx->screen, &templ) != + RADEON_SURF_MODE_LINEAR_ALIGNED) + return; + + new_tex = (struct r600_texture*)screen->resource_create(screen, &templ); + if (!new_tex) + return; + + /* Copy the pixels to the new texture. */ + if (!invalidate_storage) { + for (i = 0; i <= templ.last_level; i++) { + struct pipe_box box; + + u_box_3d(0, 0, 0, + u_minify(templ.width0, i), u_minify(templ.height0, i), + util_max_layer(&templ, i) + 1, &box); + + rctx->dma_copy(&rctx->b, &new_tex->resource.b.b, i, 0, 0, 0, + &rtex->resource.b.b, i, &box); + } + } + + r600_texture_discard_cmask(rctx->screen, rtex); + r600_texture_discard_dcc(rctx->screen, rtex); + + /* Replace the structure fields of rtex. */ + rtex->resource.b.b.bind = templ.bind; + pb_reference(&rtex->resource.buf, new_tex->resource.buf); + rtex->resource.gpu_address = new_tex->resource.gpu_address; + rtex->resource.vram_usage = new_tex->resource.vram_usage; + rtex->resource.gart_usage = new_tex->resource.gart_usage; + rtex->resource.bo_size = new_tex->resource.bo_size; + rtex->resource.bo_alignment = new_tex->resource.bo_alignment; + rtex->resource.domains = new_tex->resource.domains; + rtex->resource.flags = new_tex->resource.flags; + rtex->size = new_tex->size; + rtex->surface = new_tex->surface; + rtex->non_disp_tiling = new_tex->non_disp_tiling; + rtex->cb_color_info = new_tex->cb_color_info; + rtex->cmask = new_tex->cmask; /* needed even without CMASK */ + + assert(!rtex->htile_buffer); + assert(!rtex->cmask.size); + assert(!rtex->fmask.size); + assert(!rtex->dcc_offset); + assert(!rtex->is_depth); + + r600_texture_reference(&new_tex, NULL); + + r600_dirty_all_framebuffer_states(rctx->screen); + p_atomic_inc(&rctx->screen->dirty_tex_descriptor_counter); } static boolean r600_texture_get_handle(struct pipe_screen* screen, + struct pipe_context *ctx, struct pipe_resource *resource, struct winsys_handle *whandle, unsigned usage) { struct r600_common_screen *rscreen = (struct r600_common_screen*)screen; + struct r600_common_context *rctx = (struct r600_common_context*) + (ctx ? ctx : rscreen->aux_context); struct r600_resource *res = (struct r600_resource*)resource; struct r600_texture *rtex = (struct r600_texture*)resource; struct radeon_bo_metadata metadata; @@ -438,20 +511,20 @@ * access. */ if (usage & PIPE_HANDLE_USAGE_WRITE && rtex->dcc_offset) { - r600_texture_disable_dcc(rscreen, rtex); - update_metadata = true; + if (r600_texture_disable_dcc(rctx, rtex)) + update_metadata = true; } if (!(usage & PIPE_HANDLE_USAGE_EXPLICIT_FLUSH) && - rtex->cmask.size) { + (rtex->cmask.size || rtex->dcc_offset)) { /* Eliminate fast clear (both CMASK and DCC) */ - r600_eliminate_fast_color_clear(rscreen, rtex); + r600_eliminate_fast_color_clear(rctx, rtex); /* Disable CMASK if flush_resource isn't going * to be called. */ - r600_texture_discard_cmask(rscreen, rtex); - update_metadata = true; + if (rtex->cmask.size) + r600_texture_discard_cmask(rscreen, rtex); } /* Set metadata. */ @@ -478,7 +551,8 @@ } return rscreen->ws->buffer_get_handle(res->buf, - rtex->surface.level[0].pitch_bytes, + rtex->surface.level[0].nblk_x * + rtex->surface.bpe, rtex->surface.level[0].offset, rtex->surface.level[0].slice_size, whandle); @@ -490,14 +564,15 @@ struct r600_texture *rtex = (struct r600_texture*)ptex; struct r600_resource *resource = &rtex->resource; - if (rtex->flushed_depth_texture) - pipe_resource_reference((struct pipe_resource **)&rtex->flushed_depth_texture, NULL); + r600_texture_reference(&rtex->flushed_depth_texture, NULL); - pipe_resource_reference((struct pipe_resource**)&rtex->htile_buffer, NULL); + r600_resource_reference(&rtex->htile_buffer, NULL); if (rtex->cmask_buffer != &rtex->resource) { - pipe_resource_reference((struct pipe_resource**)&rtex->cmask_buffer, NULL); + r600_resource_reference(&rtex->cmask_buffer, NULL); } pb_reference(&resource->buf, NULL); + r600_resource_reference(&rtex->dcc_separate_buffer, NULL); + r600_resource_reference(&rtex->last_dcc_separate_buffer, NULL); FREE(rtex); } @@ -510,35 +585,33 @@ struct r600_fmask_info *out) { /* FMASK is allocated like an ordinary texture. */ - struct radeon_surf fmask = rtex->surface; + struct pipe_resource templ = rtex->resource.b.b; + struct radeon_surf fmask = {}; + unsigned flags, bpe; memset(out, 0, sizeof(*out)); - fmask.bo_alignment = 0; - fmask.bo_size = 0; - fmask.nsamples = 1; - fmask.flags |= RADEON_SURF_FMASK; - - /* Force 2D tiling if it wasn't set. This may occur when creating - * FMASK for MSAA resolve on R6xx. On R6xx, the single-sample - * destination buffer must have an FMASK too. */ - fmask.flags = RADEON_SURF_CLR(fmask.flags, MODE); - fmask.flags |= RADEON_SURF_SET(RADEON_SURF_MODE_2D, MODE); + templ.nr_samples = 1; + flags = rtex->surface.flags | RADEON_SURF_FMASK; - if (rscreen->chip_class >= SI) { - fmask.flags |= RADEON_SURF_HAS_TILE_MODE_INDEX; + if (rscreen->chip_class <= CAYMAN) { + /* Use the same parameters and tile mode. */ + fmask.bankw = rtex->surface.bankw; + fmask.bankh = rtex->surface.bankh; + fmask.mtilea = rtex->surface.mtilea; + fmask.tile_split = rtex->surface.tile_split; + + if (nr_samples <= 4) + fmask.bankh = 4; } switch (nr_samples) { case 2: case 4: - fmask.bpe = 1; - if (rscreen->chip_class <= CAYMAN) { - fmask.bankh = 4; - } + bpe = 1; break; case 8: - fmask.bpe = 4; + bpe = 4; break; default: R600_ERR("Invalid sample count for FMASK allocation.\n"); @@ -549,10 +622,11 @@ * This can be fixed by writing a separate FMASK allocator specifically * for R600-R700 asics. */ if (rscreen->chip_class <= R700) { - fmask.bpe *= 2; + bpe *= 2; } - if (rscreen->ws->surface_init(rscreen->ws, &fmask)) { + if (rscreen->ws->surface_init(rscreen->ws, &templ, flags, bpe, + RADEON_SURF_MODE_2D, &fmask)) { R600_ERR("Got error in surface_init while allocating FMASK.\n"); return; } @@ -566,8 +640,8 @@ out->tile_mode_index = fmask.tiling_index[0]; out->pitch_in_pixels = fmask.level[0].nblk_x; out->bank_height = fmask.bankh; - out->alignment = MAX2(256, fmask.bo_alignment); - out->size = fmask.bo_size; + out->alignment = MAX2(256, fmask.surf_alignment); + out->size = fmask.surf_size; } static void r600_texture_allocate_fmask(struct r600_common_screen *rscreen, @@ -598,8 +672,8 @@ unsigned macro_tile_width = util_next_power_of_two(sqrt_pixels_per_macro_tile); unsigned macro_tile_height = pixels_per_macro_tile / macro_tile_width; - unsigned pitch_elements = align(rtex->surface.npix_x, macro_tile_width); - unsigned height = align(rtex->surface.npix_y, macro_tile_height); + unsigned pitch_elements = align(rtex->resource.b.b.width0, macro_tile_width); + unsigned height = align(rtex->resource.b.b.height0, macro_tile_height); unsigned base_align = num_pipes * pipe_interleave_bytes; unsigned slice_bytes = @@ -608,10 +682,6 @@ assert(macro_tile_width % 128 == 0); assert(macro_tile_height % 128 == 0); - out->pitch = pitch_elements; - out->height = height; - out->xalign = macro_tile_width; - out->yalign = macro_tile_height; out->slice_tile_max = ((pitch_elements * height) / (128*128)) - 1; out->alignment = MAX2(256, base_align); out->size = (util_max_layer(&rtex->resource.b.b, 0) + 1) * @@ -650,17 +720,13 @@ unsigned base_align = num_pipes * pipe_interleave_bytes; - unsigned width = align(rtex->surface.npix_x, cl_width*8); - unsigned height = align(rtex->surface.npix_y, cl_height*8); + unsigned width = align(rtex->resource.b.b.width0, cl_width*8); + unsigned height = align(rtex->resource.b.b.height0, cl_height*8); unsigned slice_elements = (width * height) / (8*8); /* Each element of CMASK is a nibble. */ unsigned slice_bytes = slice_elements / 2; - out->pitch = width; - out->height = height; - out->xalign = cl_width * 8; - out->yalign = cl_height * 8; out->slice_tile_max = (width * height) / (128*128); if (out->slice_tile_max) out->slice_tile_max -= 1; @@ -722,29 +788,30 @@ p_atomic_inc(&rscreen->compressed_colortex_counter); } -static unsigned r600_texture_get_htile_size(struct r600_common_screen *rscreen, - struct r600_texture *rtex, - unsigned *base_align) +static void r600_texture_get_htile_size(struct r600_common_screen *rscreen, + struct r600_texture *rtex) { unsigned cl_width, cl_height, width, height; - unsigned slice_elements, slice_bytes, pipe_interleave_bytes; + unsigned slice_elements, slice_bytes, pipe_interleave_bytes, base_align; unsigned num_pipes = rscreen->info.num_tile_pipes; + rtex->surface.htile_size = 0; + if (rscreen->chip_class <= EVERGREEN && rscreen->info.drm_major == 2 && rscreen->info.drm_minor < 26) - return 0; + return; /* HW bug on R6xx. */ if (rscreen->chip_class == R600 && - (rtex->surface.level[0].npix_x > 7680 || - rtex->surface.level[0].npix_y > 7680)) - return 0; + (rtex->resource.b.b.width0 > 7680 || + rtex->resource.b.b.height0 > 7680)) + return; /* HTILE is broken with 1D tiling on old kernels and CIK. */ if (rscreen->chip_class >= CIK && rtex->surface.level[0].mode == RADEON_SURF_MODE_1D && rscreen->info.drm_major == 2 && rscreen->info.drm_minor < 38) - return 0; + return; /* Overalign HTILE on P2 configs to work around GPU hangs in * piglit/depthstencil-render-miplevels 585. @@ -779,47 +846,51 @@ break; default: assert(0); - return 0; + return; } - width = align(rtex->surface.npix_x, cl_width * 8); - height = align(rtex->surface.npix_y, cl_height * 8); + width = align(rtex->resource.b.b.width0, cl_width * 8); + height = align(rtex->resource.b.b.height0, cl_height * 8); slice_elements = (width * height) / (8 * 8); slice_bytes = slice_elements * 4; pipe_interleave_bytes = rscreen->info.pipe_interleave_bytes; - *base_align = num_pipes * pipe_interleave_bytes; - - rtex->htile.pitch = width; - rtex->htile.height = height; - rtex->htile.xalign = cl_width * 8; - rtex->htile.yalign = cl_height * 8; + base_align = num_pipes * pipe_interleave_bytes; - return (util_max_layer(&rtex->resource.b.b, 0) + 1) * - align(slice_bytes, *base_align); + rtex->surface.htile_alignment = base_align; + rtex->surface.htile_size = + (util_max_layer(&rtex->resource.b.b, 0) + 1) * + align(slice_bytes, base_align); } static void r600_texture_allocate_htile(struct r600_common_screen *rscreen, struct r600_texture *rtex) { - unsigned alignment = 0; - unsigned htile_size = r600_texture_get_htile_size(rscreen, rtex, - &alignment); + uint32_t clear_value; + + if (rtex->tc_compatible_htile) { + clear_value = 0x0000030F; + } else { + r600_texture_get_htile_size(rscreen, rtex); + clear_value = 0; + } - if (!htile_size) + if (!rtex->surface.htile_size) return; rtex->htile_buffer = (struct r600_resource*) r600_aligned_buffer_create(&rscreen->b, 0, PIPE_USAGE_DEFAULT, - htile_size, alignment); + rtex->surface.htile_size, + rtex->surface.htile_alignment); if (rtex->htile_buffer == NULL) { /* this is not a fatal error as we can still keep rendering * without htile buffer */ R600_ERR("Failed to create buffer object for htile buffer.\n"); } else { - r600_screen_clear_buffer(rscreen, &rtex->htile_buffer->b.b, 0, - htile_size, 0, R600_COHERENCY_NONE); + r600_screen_clear_buffer(rscreen, &rtex->htile_buffer->b.b, + 0, rtex->surface.htile_size, + clear_value); } } @@ -828,18 +899,18 @@ int i; fprintf(f, " Info: npix_x=%u, npix_y=%u, npix_z=%u, blk_w=%u, " - "blk_h=%u, blk_d=%u, array_size=%u, last_level=%u, " + "blk_h=%u, array_size=%u, last_level=%u, " "bpe=%u, nsamples=%u, flags=0x%x, %s\n", - rtex->surface.npix_x, rtex->surface.npix_y, - rtex->surface.npix_z, rtex->surface.blk_w, - rtex->surface.blk_h, rtex->surface.blk_d, - rtex->surface.array_size, rtex->surface.last_level, - rtex->surface.bpe, rtex->surface.nsamples, + rtex->resource.b.b.width0, rtex->resource.b.b.height0, + rtex->resource.b.b.depth0, rtex->surface.blk_w, + rtex->surface.blk_h, + rtex->resource.b.b.array_size, rtex->resource.b.b.last_level, + rtex->surface.bpe, rtex->resource.b.b.nr_samples, rtex->surface.flags, util_format_short_name(rtex->resource.b.b.format)); - fprintf(f, " Layout: size=%"PRIu64", alignment=%"PRIu64", bankw=%u, " + fprintf(f, " Layout: size=%"PRIu64", alignment=%u, bankw=%u, " "bankh=%u, nbanks=%u, mtilea=%u, tilesplit=%u, pipeconfig=%u, scanout=%u\n", - rtex->surface.bo_size, rtex->surface.bo_alignment, rtex->surface.bankw, + rtex->surface.surf_size, rtex->surface.surf_alignment, rtex->surface.bankw, rtex->surface.bankh, rtex->surface.num_banks, rtex->surface.mtilea, rtex->surface.tile_split, rtex->surface.pipe_config, (rtex->surface.flags & RADEON_SURF_SCANOUT) != 0); @@ -852,32 +923,33 @@ rtex->fmask.slice_tile_max, rtex->fmask.tile_mode_index); if (rtex->cmask.size) - fprintf(f, " CMask: offset=%"PRIu64", size=%"PRIu64", alignment=%u, pitch=%u, " - "height=%u, xalign=%u, yalign=%u, slice_tile_max=%u\n", + fprintf(f, " CMask: offset=%"PRIu64", size=%"PRIu64", alignment=%u, " + "slice_tile_max=%u\n", rtex->cmask.offset, rtex->cmask.size, rtex->cmask.alignment, - rtex->cmask.pitch, rtex->cmask.height, rtex->cmask.xalign, - rtex->cmask.yalign, rtex->cmask.slice_tile_max); + rtex->cmask.slice_tile_max); if (rtex->htile_buffer) - fprintf(f, " HTile: size=%u, alignment=%u, pitch=%u, height=%u, " - "xalign=%u, yalign=%u\n", + fprintf(f, " HTile: size=%u, alignment=%u, TC_compatible = %u\n", rtex->htile_buffer->b.b.width0, - rtex->htile_buffer->buf->alignment, rtex->htile.pitch, - rtex->htile.height, rtex->htile.xalign, rtex->htile.yalign); + rtex->htile_buffer->buf->alignment, + rtex->tc_compatible_htile); if (rtex->dcc_offset) { - fprintf(f, " DCC: offset=%"PRIu64", size=%"PRIu64", alignment=%"PRIu64"\n", + fprintf(f, " DCC: offset=%"PRIu64", size=%"PRIu64", alignment=%u\n", rtex->dcc_offset, rtex->surface.dcc_size, rtex->surface.dcc_alignment); - for (i = 0; i <= rtex->surface.last_level; i++) - fprintf(f, " DCCLevel[%i]: offset=%"PRIu64"\n", - i, rtex->surface.level[i].dcc_offset); + for (i = 0; i <= rtex->resource.b.b.last_level; i++) + fprintf(f, " DCCLevel[%i]: enabled=%u, offset=%"PRIu64", " + "fast_clear_size=%"PRIu64"\n", + i, i < rtex->surface.num_dcc_levels, + rtex->surface.level[i].dcc_offset, + rtex->surface.level[i].dcc_fast_clear_size); } - for (i = 0; i <= rtex->surface.last_level; i++) + for (i = 0; i <= rtex->resource.b.b.last_level; i++) fprintf(f, " Level[%i]: offset=%"PRIu64", slice_size=%"PRIu64", " "npix_x=%u, npix_y=%u, npix_z=%u, nblk_x=%u, nblk_y=%u, " - "nblk_z=%u, pitch_bytes=%u, mode=%u\n", + "mode=%u, tiling_index = %u\n", i, rtex->surface.level[i].offset, rtex->surface.level[i].slice_size, u_minify(rtex->resource.b.b.width0, i), @@ -885,18 +957,17 @@ u_minify(rtex->resource.b.b.depth0, i), rtex->surface.level[i].nblk_x, rtex->surface.level[i].nblk_y, - rtex->surface.level[i].nblk_z, - rtex->surface.level[i].pitch_bytes, - rtex->surface.level[i].mode); + rtex->surface.level[i].mode, + rtex->surface.tiling_index[i]); if (rtex->surface.flags & RADEON_SURF_SBUFFER) { - for (i = 0; i <= rtex->surface.last_level; i++) { - fprintf(f, " StencilLayout: tilesplit=%u\n", - rtex->surface.stencil_tile_split); + fprintf(f, " StencilLayout: tilesplit=%u\n", + rtex->surface.stencil_tile_split); + for (i = 0; i <= rtex->resource.b.b.last_level; i++) { fprintf(f, " StencilLevel[%i]: offset=%"PRIu64", " "slice_size=%"PRIu64", npix_x=%u, " "npix_y=%u, npix_z=%u, nblk_x=%u, nblk_y=%u, " - "nblk_z=%u, pitch_bytes=%u, mode=%u\n", + "mode=%u, tiling_index = %u\n", i, rtex->surface.stencil_level[i].offset, rtex->surface.stencil_level[i].slice_size, u_minify(rtex->resource.b.b.width0, i), @@ -904,9 +975,8 @@ u_minify(rtex->resource.b.b.depth0, i), rtex->surface.stencil_level[i].nblk_x, rtex->surface.stencil_level[i].nblk_y, - rtex->surface.stencil_level[i].nblk_z, - rtex->surface.stencil_level[i].pitch_bytes, - rtex->surface.stencil_level[i].mode); + rtex->surface.stencil_level[i].mode, + rtex->surface.stencil_tiling_index[i]); } } } @@ -915,8 +985,6 @@ static struct r600_texture * r600_texture_create_object(struct pipe_screen *screen, const struct pipe_resource *base, - unsigned pitch_in_bytes_override, - unsigned offset, struct pb_buffer *buf, struct radeon_surf *surface) { @@ -930,6 +998,7 @@ resource = &rtex->resource; resource->b.b = *base; + resource->b.b.next = NULL; resource->b.vtbl = &r600_texture_vtbl; pipe_reference_init(&resource->b.b.reference, 1); resource->b.b.screen = screen; @@ -938,22 +1007,50 @@ rtex->is_depth = util_format_has_depth(util_format_description(rtex->resource.b.b.format)); rtex->surface = *surface; - if (r600_setup_surface(screen, rtex, pitch_in_bytes_override, offset)) { - FREE(rtex); - return NULL; - } + rtex->size = rtex->surface.surf_size; + + rtex->tc_compatible_htile = rtex->surface.htile_size != 0 && + (rtex->surface.flags & + RADEON_SURF_TC_COMPATIBLE_HTILE); + + /* TC-compatible HTILE only supports Z32_FLOAT. */ + if (rtex->tc_compatible_htile) + rtex->db_render_format = PIPE_FORMAT_Z32_FLOAT; + else + rtex->db_render_format = base->format; /* Tiled depth textures utilize the non-displayable tile order. * This must be done after r600_setup_surface. * Applies to R600-Cayman. */ rtex->non_disp_tiling = rtex->is_depth && rtex->surface.level[0].mode >= RADEON_SURF_MODE_1D; + /* Applies to GCN. */ + rtex->last_msaa_resolve_target_micro_mode = rtex->surface.micro_tile_mode; + + /* Disable separate DCC at the beginning. DRI2 doesn't reuse buffers + * between frames, so the only thing that can enable separate DCC + * with DRI2 is multiple slow clears within a frame. + */ + rtex->ps_draw_ratio = 0; if (rtex->is_depth) { + if (base->flags & (R600_RESOURCE_FLAG_TRANSFER | + R600_RESOURCE_FLAG_FLUSHED_DEPTH) || + rscreen->chip_class >= EVERGREEN) { + rtex->can_sample_z = !rtex->surface.depth_adjusted; + rtex->can_sample_s = !rtex->surface.stencil_adjusted; + } else { + if (rtex->resource.b.b.nr_samples <= 1 && + (rtex->resource.b.b.format == PIPE_FORMAT_Z16_UNORM || + rtex->resource.b.b.format == PIPE_FORMAT_Z32_FLOAT)) + rtex->can_sample_z = true; + } + if (!(base->flags & (R600_RESOURCE_FLAG_TRANSFER | - R600_RESOURCE_FLAG_FLUSHED_DEPTH)) && - !(rscreen->debug_flags & DBG_NO_HYPERZ)) { + R600_RESOURCE_FLAG_FLUSHED_DEPTH))) { + rtex->db_compatible = true; - r600_texture_allocate_htile(rscreen, rtex); + if (!(rscreen->debug_flags & DBG_NO_HYPERZ)) + r600_texture_allocate_htile(rscreen, rtex); } } else { if (base->nr_samples > 1) { @@ -973,32 +1070,42 @@ * apply_opaque_metadata later. */ if (rtex->surface.dcc_size && - (buf || !(rscreen->debug_flags & DBG_NO_DCC))) { + (buf || !(rscreen->debug_flags & DBG_NO_DCC)) && + !(rtex->surface.flags & RADEON_SURF_SCANOUT)) { /* Reserve space for the DCC buffer. */ rtex->dcc_offset = align64(rtex->size, rtex->surface.dcc_alignment); rtex->size = rtex->dcc_offset + rtex->surface.dcc_size; - rtex->cb_color_info |= VI_S_028C70_DCC_ENABLE(1); } } /* Now create the backing buffer. */ if (!buf) { - if (!r600_init_resource(rscreen, resource, rtex->size, - rtex->surface.bo_alignment)) { + r600_init_resource_fields(rscreen, resource, rtex->size, + rtex->surface.surf_alignment); + + resource->flags |= RADEON_FLAG_HANDLE; + + if (!r600_alloc_resource(rscreen, resource)) { FREE(rtex); return NULL; } } else { resource->buf = buf; resource->gpu_address = rscreen->ws->buffer_get_virtual_address(resource->buf); + resource->bo_size = buf->size; + resource->bo_alignment = buf->alignment; resource->domains = rscreen->ws->buffer_get_initial_domain(resource->buf); + if (resource->domains & RADEON_DOMAIN_VRAM) + resource->vram_usage = buf->size; + else if (resource->domains & RADEON_DOMAIN_GTT) + resource->gart_usage = buf->size; } if (rtex->cmask.size) { /* Initialize the cmask to 0xCC (= compressed state). */ r600_screen_clear_buffer(rscreen, &rtex->cmask_buffer->b.b, rtex->cmask.offset, rtex->cmask.size, - 0xCCCCCCCC, R600_COHERENCY_NONE); + 0xCCCCCCCC); } /* Initialize DCC only if the texture is not being imported. */ @@ -1006,7 +1113,7 @@ r600_screen_clear_buffer(rscreen, &rtex->resource.b.b, rtex->dcc_offset, rtex->surface.dcc_size, - 0xFFFFFFFF, R600_COHERENCY_NONE); + 0xFFFFFFFF); } /* Initialize the CMASK base register value. */ @@ -1024,13 +1131,15 @@ if (rscreen->debug_flags & DBG_TEX) { puts("Texture:"); r600_print_texture_info(rtex, stdout); + fflush(stdout); } return rtex; } -static unsigned r600_choose_tiling(struct r600_common_screen *rscreen, - const struct pipe_resource *templ) +static enum radeon_surf_mode +r600_choose_tiling(struct r600_common_screen *rscreen, + const struct pipe_resource *templ) { const struct util_format_description *desc = util_format_description(templ->format); bool force_tiling = templ->flags & R600_RESOURCE_FLAG_FORCE_TILING; @@ -1098,20 +1207,27 @@ { struct r600_common_screen *rscreen = (struct r600_common_screen*)screen; struct radeon_surf surface = {0}; + bool is_flushed_depth = templ->flags & R600_RESOURCE_FLAG_FLUSHED_DEPTH; + bool tc_compatible_htile = + rscreen->chip_class >= VI && + (templ->flags & PIPE_RESOURCE_FLAG_TEXTURING_MORE_LIKELY) && + !(rscreen->debug_flags & DBG_NO_HYPERZ) && + !is_flushed_depth && + templ->nr_samples <= 1 && /* TC-compat HTILE is less efficient with MSAA */ + util_format_is_depth_or_stencil(templ->format); + int r; r = r600_init_surface(rscreen, &surface, templ, - r600_choose_tiling(rscreen, templ), - templ->flags & R600_RESOURCE_FLAG_FLUSHED_DEPTH); + r600_choose_tiling(rscreen, templ), 0, 0, + false, false, is_flushed_depth, + tc_compatible_htile); if (r) { return NULL; } - r = rscreen->ws->surface_best(rscreen->ws, &surface); - if (r) { - return NULL; - } - return (struct pipe_resource *)r600_texture_create_object(screen, templ, 0, - 0, NULL, &surface); + + return (struct pipe_resource *) + r600_texture_create_object(screen, templ, NULL, &surface); } static struct pipe_resource *r600_texture_from_handle(struct pipe_screen *screen, @@ -1153,16 +1269,13 @@ else array_mode = RADEON_SURF_MODE_LINEAR_ALIGNED; - r = r600_init_surface(rscreen, &surface, templ, array_mode, false); + r = r600_init_surface(rscreen, &surface, templ, array_mode, stride, + offset, true, metadata.scanout, false, false); if (r) { return NULL; } - if (metadata.scanout) - surface.flags |= RADEON_SURF_SCANOUT; - - rtex = r600_texture_create_object(screen, templ, stride, - offset, buf, &surface); + rtex = r600_texture_create_object(screen, templ, buf, &surface); if (!rtex) return NULL; @@ -1183,12 +1296,44 @@ struct pipe_resource resource; struct r600_texture **flushed_depth_texture = staging ? staging : &rtex->flushed_depth_texture; + enum pipe_format pipe_format = texture->format; - if (!staging && rtex->flushed_depth_texture) - return true; /* it's ready */ + if (!staging) { + if (rtex->flushed_depth_texture) + return true; /* it's ready */ + + if (!rtex->can_sample_z && rtex->can_sample_s) { + switch (pipe_format) { + case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT: + /* Save memory by not allocating the S plane. */ + pipe_format = PIPE_FORMAT_Z32_FLOAT; + break; + case PIPE_FORMAT_Z24_UNORM_S8_UINT: + case PIPE_FORMAT_S8_UINT_Z24_UNORM: + /* Save memory bandwidth by not copying the + * stencil part during flush. + * + * This potentially increases memory bandwidth + * if an application uses both Z and S texturing + * simultaneously (a flushed Z24S8 texture + * would be stored compactly), but how often + * does that really happen? + */ + pipe_format = PIPE_FORMAT_Z24X8_UNORM; + break; + default:; + } + } else if (!rtex->can_sample_s && rtex->can_sample_z) { + assert(util_format_has_stencil(util_format_description(pipe_format))); + /* DB->CB copies to an 8bpp surface don't work. */ + pipe_format = PIPE_FORMAT_X24S8_UINT; + } + } + + memset(&resource, 0, sizeof(resource)); resource.target = texture->target; - resource.format = texture->format; + resource.format = pipe_format; resource.width0 = texture->width0; resource.height0 = texture->height0; resource.depth0 = texture->depth0; @@ -1208,7 +1353,6 @@ return false; } - (*flushed_depth_texture)->is_flushing_texture = TRUE; (*flushed_depth_texture)->non_disp_tiling = false; return true; } @@ -1241,6 +1385,44 @@ } } +static bool r600_can_invalidate_texture(struct r600_common_screen *rscreen, + struct r600_texture *rtex, + unsigned transfer_usage, + const struct pipe_box *box) +{ + /* r600g doesn't react to dirty_tex_descriptor_counter */ + return rscreen->chip_class >= SI && + !rtex->resource.is_shared && + !(transfer_usage & PIPE_TRANSFER_READ) && + rtex->resource.b.b.last_level == 0 && + util_texrange_covers_whole_level(&rtex->resource.b.b, 0, + box->x, box->y, box->z, + box->width, box->height, + box->depth); +} + +static void r600_texture_invalidate_storage(struct r600_common_context *rctx, + struct r600_texture *rtex) +{ + struct r600_common_screen *rscreen = rctx->screen; + + /* There is no point in discarding depth and tiled buffers. */ + assert(!rtex->is_depth); + assert(rtex->surface.is_linear); + + /* Reallocate the buffer in the same pipe_resource. */ + r600_alloc_resource(rscreen, &rtex->resource); + + /* Initialize the CMASK base address (needed even without CMASK). */ + rtex->cmask.base_address_reg = + (rtex->resource.gpu_address + rtex->cmask.offset) >> 8; + + r600_dirty_all_framebuffer_states(rscreen); + p_atomic_inc(&rscreen->dirty_tex_descriptor_counter); + + rctx->num_alloc_tex_transfer_bytes += rtex->size; +} + static void *r600_texture_transfer_map(struct pipe_context *ctx, struct pipe_resource *texture, unsigned level, @@ -1251,31 +1433,57 @@ struct r600_common_context *rctx = (struct r600_common_context*)ctx; struct r600_texture *rtex = (struct r600_texture*)texture; struct r600_transfer *trans; - boolean use_staging_texture = FALSE; struct r600_resource *buf; unsigned offset = 0; char *map; + bool use_staging_texture = false; assert(!(texture->flags & R600_RESOURCE_FLAG_TRANSFER)); - /* We cannot map a tiled texture directly because the data is - * in a different order, therefore we do detiling using a blit. - * - * Also, use a temporary in GTT memory for read transfers, as - * the CPU is much happier reading out of cached system memory - * than uncached VRAM. - */ - if (rtex->surface.level[0].mode >= RADEON_SURF_MODE_1D) { - use_staging_texture = TRUE; - } else if ((usage & PIPE_TRANSFER_READ) && - rtex->resource.domains & RADEON_DOMAIN_VRAM) { - /* Untiled buffers in VRAM, which is slow for CPU reads */ - use_staging_texture = TRUE; - } else if (!(usage & PIPE_TRANSFER_READ) && - (r600_rings_is_buffer_referenced(rctx, rtex->resource.buf, RADEON_USAGE_READWRITE) || - !rctx->ws->buffer_wait(rtex->resource.buf, 0, RADEON_USAGE_READWRITE))) { - /* Use a staging texture for uploads if the underlying BO is busy. */ - use_staging_texture = TRUE; + /* Depth textures use staging unconditionally. */ + if (!rtex->is_depth) { + /* Degrade the tile mode if we get too many transfers on APUs. + * On dGPUs, the staging texture is always faster. + * Only count uploads that are at least 4x4 pixels large. + */ + if (!rctx->screen->info.has_dedicated_vram && + level == 0 && + box->width >= 4 && box->height >= 4 && + p_atomic_inc_return(&rtex->num_level0_transfers) == 10) { + bool can_invalidate = + r600_can_invalidate_texture(rctx->screen, rtex, + usage, box); + + r600_degrade_tile_mode_to_linear(rctx, rtex, + can_invalidate); + } + + /* Tiled textures need to be converted into a linear texture for CPU + * access. The staging texture is always linear and is placed in GART. + * + * Reading from VRAM is slow, always use the staging texture in + * this case. + * + * Use the staging texture for uploads if the underlying BO + * is busy. + */ + if (!rtex->surface.is_linear) + use_staging_texture = true; + else if (usage & PIPE_TRANSFER_READ) + use_staging_texture = (rtex->resource.domains & + RADEON_DOMAIN_VRAM) != 0; + /* Write & linear only: */ + else if (r600_rings_is_buffer_referenced(rctx, rtex->resource.buf, + RADEON_USAGE_READWRITE) || + !rctx->ws->buffer_wait(rtex->resource.buf, 0, + RADEON_USAGE_READWRITE)) { + /* It's busy. */ + if (r600_can_invalidate_texture(rctx->screen, rtex, + usage, box)) + r600_texture_invalidate_storage(rctx, rtex); + else + use_staging_texture = true; + } } trans = CALLOC_STRUCT(r600_transfer); @@ -1341,7 +1549,8 @@ offset = r600_texture_get_offset(staging_depth, level, box); } - trans->transfer.stride = staging_depth->surface.level[level].pitch_bytes; + trans->transfer.stride = staging_depth->surface.level[level].nblk_x * + staging_depth->surface.bpe; trans->transfer.layer_stride = staging_depth->surface.level[level].slice_size; trans->staging = (struct r600_resource*)staging_depth; buf = trans->staging; @@ -1362,7 +1571,8 @@ return NULL; } trans->staging = &staging->resource; - trans->transfer.stride = staging->surface.level[0].pitch_bytes; + trans->transfer.stride = staging->surface.level[0].nblk_x * + staging->surface.bpe; trans->transfer.layer_stride = staging->surface.level[0].slice_size; if (usage & PIPE_TRANSFER_READ) @@ -1373,14 +1583,15 @@ buf = trans->staging; } else { /* the resource is mapped directly */ - trans->transfer.stride = rtex->surface.level[level].pitch_bytes; + trans->transfer.stride = rtex->surface.level[level].nblk_x * + rtex->surface.bpe; trans->transfer.layer_stride = rtex->surface.level[level].slice_size; offset = r600_texture_get_offset(rtex, level, box); buf = &rtex->resource; } if (!(map = r600_buffer_map_sync_with_rings(rctx, buf, usage))) { - pipe_resource_reference((struct pipe_resource**)&trans->staging, NULL); + r600_resource_reference(&trans->staging, NULL); FREE(trans); return NULL; } @@ -1392,6 +1603,7 @@ static void r600_texture_transfer_unmap(struct pipe_context *ctx, struct pipe_transfer* transfer) { + struct r600_common_context *rctx = (struct r600_common_context*)ctx; struct r600_transfer *rtransfer = (struct r600_transfer*)transfer; struct pipe_resource *texture = transfer->resource; struct r600_texture *rtex = (struct r600_texture*)texture; @@ -1407,8 +1619,28 @@ } } - if (rtransfer->staging) - pipe_resource_reference((struct pipe_resource**)&rtransfer->staging, NULL); + if (rtransfer->staging) { + rctx->num_alloc_tex_transfer_bytes += rtransfer->staging->buf->size; + r600_resource_reference(&rtransfer->staging, NULL); + } + + /* Heuristic for {upload, draw, upload, draw, ..}: + * + * Flush the gfx IB if we've allocated too much texture storage. + * + * The idea is that we don't want to build IBs that use too much + * memory and put pressure on the kernel memory manager and we also + * want to make temporary and invalidated buffers go idle ASAP to + * decrease the total memory usage or make them reusable. The memory + * usage will be slightly higher than given here because of the buffer + * cache in the winsys. + * + * The result is that the kernel memory manager is never a bottleneck. + */ + if (rctx->num_alloc_tex_transfer_bytes > rctx->screen->info.gart_size / 4) { + rctx->gfx.flush(rctx, RADEON_FLUSH_ASYNC, NULL); + rctx->num_alloc_tex_transfer_bytes = 0; + } FREE(transfer); } @@ -1420,14 +1652,112 @@ r600_texture_transfer_map, /* transfer_map */ u_default_transfer_flush_region, /* transfer_flush_region */ r600_texture_transfer_unmap, /* transfer_unmap */ - NULL /* transfer_inline_write */ }; +/* DCC channel type categories within which formats can be reinterpreted + * while keeping the same DCC encoding. The swizzle must also match. */ +enum dcc_channel_type { + dcc_channel_float32, + dcc_channel_uint32, + dcc_channel_sint32, + dcc_channel_float16, + dcc_channel_uint16, + dcc_channel_sint16, + dcc_channel_uint_10_10_10_2, + dcc_channel_uint8, + dcc_channel_sint8, + dcc_channel_incompatible, +}; + +/* Return the type of DCC encoding. */ +static enum dcc_channel_type +vi_get_dcc_channel_type(const struct util_format_description *desc) +{ + int i; + + /* Find the first non-void channel. */ + for (i = 0; i < desc->nr_channels; i++) + if (desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) + break; + if (i == desc->nr_channels) + return dcc_channel_incompatible; + + switch (desc->channel[i].size) { + case 32: + if (desc->channel[i].type == UTIL_FORMAT_TYPE_FLOAT) + return dcc_channel_float32; + if (desc->channel[i].type == UTIL_FORMAT_TYPE_UNSIGNED) + return dcc_channel_uint32; + return dcc_channel_sint32; + case 16: + if (desc->channel[i].type == UTIL_FORMAT_TYPE_FLOAT) + return dcc_channel_float16; + if (desc->channel[i].type == UTIL_FORMAT_TYPE_UNSIGNED) + return dcc_channel_uint16; + return dcc_channel_sint16; + case 10: + return dcc_channel_uint_10_10_10_2; + case 8: + if (desc->channel[i].type == UTIL_FORMAT_TYPE_UNSIGNED) + return dcc_channel_uint8; + return dcc_channel_sint8; + default: + return dcc_channel_incompatible; + } +} + +/* Return if it's allowed to reinterpret one format as another with DCC enabled. */ +bool vi_dcc_formats_compatible(enum pipe_format format1, + enum pipe_format format2) +{ + const struct util_format_description *desc1, *desc2; + enum dcc_channel_type type1, type2; + int i; + + if (format1 == format2) + return true; + + desc1 = util_format_description(format1); + desc2 = util_format_description(format2); + + if (desc1->nr_channels != desc2->nr_channels) + return false; + + /* Swizzles must be the same. */ + for (i = 0; i < desc1->nr_channels; i++) + if (desc1->swizzle[i] <= PIPE_SWIZZLE_W && + desc2->swizzle[i] <= PIPE_SWIZZLE_W && + desc1->swizzle[i] != desc2->swizzle[i]) + return false; + + type1 = vi_get_dcc_channel_type(desc1); + type2 = vi_get_dcc_channel_type(desc2); + + return type1 != dcc_channel_incompatible && + type2 != dcc_channel_incompatible && + type1 == type2; +} + +void vi_dcc_disable_if_incompatible_format(struct r600_common_context *rctx, + struct pipe_resource *tex, + unsigned level, + enum pipe_format view_format) +{ + struct r600_texture *rtex = (struct r600_texture *)tex; + + if (rtex->dcc_offset && + level < rtex->surface.num_dcc_levels && + !vi_dcc_formats_compatible(tex->format, view_format)) + if (!r600_texture_disable_dcc(rctx, (struct r600_texture*)tex)) + rctx->decompress_dcc(&rctx->b, rtex); +} + struct pipe_surface *r600_create_surface_custom(struct pipe_context *pipe, struct pipe_resource *texture, const struct pipe_surface *templ, unsigned width, unsigned height) { + struct r600_common_context *rctx = (struct r600_common_context*)pipe; struct r600_surface *surface = CALLOC_STRUCT(r600_surface); if (!surface) @@ -1443,6 +1773,12 @@ surface->base.width = width; surface->base.height = height; surface->base.u = templ->u; + + if (texture->target != PIPE_BUFFER) + vi_dcc_disable_if_incompatible_format(rctx, texture, + templ->u.tex.level, + templ->format); + return &surface->base; } @@ -1481,12 +1817,77 @@ struct pipe_surface *surface) { struct r600_surface *surf = (struct r600_surface*)surface; - pipe_resource_reference((struct pipe_resource**)&surf->cb_buffer_fmask, NULL); - pipe_resource_reference((struct pipe_resource**)&surf->cb_buffer_cmask, NULL); + r600_resource_reference(&surf->cb_buffer_fmask, NULL); + r600_resource_reference(&surf->cb_buffer_cmask, NULL); pipe_resource_reference(&surface->texture, NULL); FREE(surface); } +static void r600_clear_texture(struct pipe_context *pipe, + struct pipe_resource *tex, + unsigned level, + const struct pipe_box *box, + const void *data) +{ + struct pipe_screen *screen = pipe->screen; + struct r600_texture *rtex = (struct r600_texture*)tex; + struct pipe_surface tmpl = {{0}}; + struct pipe_surface *sf; + const struct util_format_description *desc = + util_format_description(tex->format); + + tmpl.format = tex->format; + tmpl.u.tex.first_layer = box->z; + tmpl.u.tex.last_layer = box->z + box->depth - 1; + tmpl.u.tex.level = level; + sf = pipe->create_surface(pipe, tex, &tmpl); + if (!sf) + return; + + if (rtex->is_depth) { + unsigned clear; + float depth; + uint8_t stencil = 0; + + /* Depth is always present. */ + clear = PIPE_CLEAR_DEPTH; + desc->unpack_z_float(&depth, 0, data, 0, 1, 1); + + if (rtex->surface.flags & RADEON_SURF_SBUFFER) { + clear |= PIPE_CLEAR_STENCIL; + desc->unpack_s_8uint(&stencil, 0, data, 0, 1, 1); + } + + pipe->clear_depth_stencil(pipe, sf, clear, depth, stencil, + box->x, box->y, + box->width, box->height, false); + } else { + union pipe_color_union color; + + /* pipe_color_union requires the full vec4 representation. */ + if (util_format_is_pure_uint(tex->format)) + desc->unpack_rgba_uint(color.ui, 0, data, 0, 1, 1); + else if (util_format_is_pure_sint(tex->format)) + desc->unpack_rgba_sint(color.i, 0, data, 0, 1, 1); + else + desc->unpack_rgba_float(color.f, 0, data, 0, 1, 1); + + if (screen->is_format_supported(screen, tex->format, + tex->target, 0, + PIPE_BIND_RENDER_TARGET)) { + pipe->clear_render_target(pipe, sf, &color, + box->x, box->y, + box->width, box->height, false); + } else { + /* Software fallback - just for R9G9B9E5_FLOAT */ + util_clear_render_target(pipe, sf, &color, + box->x, box->y, + box->width, box->height); + } + } + pipe_surface_reference(&sf, NULL); +} + unsigned r600_translate_colorswap(enum pipe_format format, bool do_endian_swap) { const struct util_format_description *desc = util_format_description(format); @@ -1547,6 +1948,245 @@ return ~0U; } +/* PIPELINE_STAT-BASED DCC ENABLEMENT FOR DISPLAYABLE SURFACES */ + +static void vi_dcc_clean_up_context_slot(struct r600_common_context *rctx, + int slot) +{ + int i; + + if (rctx->dcc_stats[slot].query_active) + vi_separate_dcc_stop_query(&rctx->b, + rctx->dcc_stats[slot].tex); + + for (i = 0; i < ARRAY_SIZE(rctx->dcc_stats[slot].ps_stats); i++) + if (rctx->dcc_stats[slot].ps_stats[i]) { + rctx->b.destroy_query(&rctx->b, + rctx->dcc_stats[slot].ps_stats[i]); + rctx->dcc_stats[slot].ps_stats[i] = NULL; + } + + r600_texture_reference(&rctx->dcc_stats[slot].tex, NULL); +} + +/** + * Return the per-context slot where DCC statistics queries for the texture live. + */ +static unsigned vi_get_context_dcc_stats_index(struct r600_common_context *rctx, + struct r600_texture *tex) +{ + int i, empty_slot = -1; + + /* Remove zombie textures (textures kept alive by this array only). */ + for (i = 0; i < ARRAY_SIZE(rctx->dcc_stats); i++) + if (rctx->dcc_stats[i].tex && + rctx->dcc_stats[i].tex->resource.b.b.reference.count == 1) + vi_dcc_clean_up_context_slot(rctx, i); + + /* Find the texture. */ + for (i = 0; i < ARRAY_SIZE(rctx->dcc_stats); i++) { + /* Return if found. */ + if (rctx->dcc_stats[i].tex == tex) { + rctx->dcc_stats[i].last_use_timestamp = os_time_get(); + return i; + } + + /* Record the first seen empty slot. */ + if (empty_slot == -1 && !rctx->dcc_stats[i].tex) + empty_slot = i; + } + + /* Not found. Remove the oldest member to make space in the array. */ + if (empty_slot == -1) { + int oldest_slot = 0; + + /* Find the oldest slot. */ + for (i = 1; i < ARRAY_SIZE(rctx->dcc_stats); i++) + if (rctx->dcc_stats[oldest_slot].last_use_timestamp > + rctx->dcc_stats[i].last_use_timestamp) + oldest_slot = i; + + /* Clean up the oldest slot. */ + vi_dcc_clean_up_context_slot(rctx, oldest_slot); + empty_slot = oldest_slot; + } + + /* Add the texture to the new slot. */ + r600_texture_reference(&rctx->dcc_stats[empty_slot].tex, tex); + rctx->dcc_stats[empty_slot].last_use_timestamp = os_time_get(); + return empty_slot; +} + +static struct pipe_query * +vi_create_resuming_pipestats_query(struct pipe_context *ctx) +{ + struct r600_query_hw *query = (struct r600_query_hw*) + ctx->create_query(ctx, PIPE_QUERY_PIPELINE_STATISTICS, 0); + + query->flags |= R600_QUERY_HW_FLAG_BEGIN_RESUMES; + return (struct pipe_query*)query; +} + +/** + * Called when binding a color buffer. + */ +void vi_separate_dcc_start_query(struct pipe_context *ctx, + struct r600_texture *tex) +{ + struct r600_common_context *rctx = (struct r600_common_context*)ctx; + unsigned i = vi_get_context_dcc_stats_index(rctx, tex); + + assert(!rctx->dcc_stats[i].query_active); + + if (!rctx->dcc_stats[i].ps_stats[0]) + rctx->dcc_stats[i].ps_stats[0] = vi_create_resuming_pipestats_query(ctx); + + /* begin or resume the query */ + ctx->begin_query(ctx, rctx->dcc_stats[i].ps_stats[0]); + rctx->dcc_stats[i].query_active = true; +} + +/** + * Called when unbinding a color buffer. + */ +void vi_separate_dcc_stop_query(struct pipe_context *ctx, + struct r600_texture *tex) +{ + struct r600_common_context *rctx = (struct r600_common_context*)ctx; + unsigned i = vi_get_context_dcc_stats_index(rctx, tex); + + assert(rctx->dcc_stats[i].query_active); + assert(rctx->dcc_stats[i].ps_stats[0]); + + /* pause or end the query */ + ctx->end_query(ctx, rctx->dcc_stats[i].ps_stats[0]); + rctx->dcc_stats[i].query_active = false; +} + +static bool vi_should_enable_separate_dcc(struct r600_texture *tex) +{ + /* The minimum number of fullscreen draws per frame that is required + * to enable DCC. */ + return tex->ps_draw_ratio + tex->num_slow_clears >= 5; +} + +/* Called by fast clear. */ +static void vi_separate_dcc_try_enable(struct r600_common_context *rctx, + struct r600_texture *tex) +{ + /* The intent is to use this with shared displayable back buffers, + * but it's not strictly limited only to them. + */ + if (!tex->resource.is_shared || + !(tex->resource.external_usage & PIPE_HANDLE_USAGE_EXPLICIT_FLUSH) || + tex->resource.b.b.target != PIPE_TEXTURE_2D || + tex->resource.b.b.last_level > 0 || + !tex->surface.dcc_size) + return; + + if (tex->dcc_offset) + return; /* already enabled */ + + /* Enable the DCC stat gathering. */ + if (!tex->dcc_gather_statistics) { + tex->dcc_gather_statistics = true; + vi_separate_dcc_start_query(&rctx->b, tex); + } + + if (!vi_should_enable_separate_dcc(tex)) + return; /* stats show that DCC decompression is too expensive */ + + assert(tex->surface.num_dcc_levels); + assert(!tex->dcc_separate_buffer); + + r600_texture_discard_cmask(rctx->screen, tex); + + /* Get a DCC buffer. */ + if (tex->last_dcc_separate_buffer) { + assert(tex->dcc_gather_statistics); + assert(!tex->dcc_separate_buffer); + tex->dcc_separate_buffer = tex->last_dcc_separate_buffer; + tex->last_dcc_separate_buffer = NULL; + } else { + tex->dcc_separate_buffer = (struct r600_resource*) + r600_aligned_buffer_create(rctx->b.screen, 0, + PIPE_USAGE_DEFAULT, + tex->surface.dcc_size, + tex->surface.dcc_alignment); + if (!tex->dcc_separate_buffer) + return; + } + + /* dcc_offset is the absolute GPUVM address. */ + tex->dcc_offset = tex->dcc_separate_buffer->gpu_address; + + /* no need to flag anything since this is called by fast clear that + * flags framebuffer state + */ +} + +/** + * Called by pipe_context::flush_resource, the place where DCC decompression + * takes place. + */ +void vi_separate_dcc_process_and_reset_stats(struct pipe_context *ctx, + struct r600_texture *tex) +{ + struct r600_common_context *rctx = (struct r600_common_context*)ctx; + struct pipe_query *tmp; + unsigned i = vi_get_context_dcc_stats_index(rctx, tex); + bool query_active = rctx->dcc_stats[i].query_active; + bool disable = false; + + if (rctx->dcc_stats[i].ps_stats[2]) { + union pipe_query_result result; + + /* Read the results. */ + ctx->get_query_result(ctx, rctx->dcc_stats[i].ps_stats[2], + true, &result); + r600_query_hw_reset_buffers(rctx, + (struct r600_query_hw*) + rctx->dcc_stats[i].ps_stats[2]); + + /* Compute the approximate number of fullscreen draws. */ + tex->ps_draw_ratio = + result.pipeline_statistics.ps_invocations / + (tex->resource.b.b.width0 * tex->resource.b.b.height0); + rctx->last_tex_ps_draw_ratio = tex->ps_draw_ratio; + + disable = tex->dcc_separate_buffer && + !vi_should_enable_separate_dcc(tex); + } + + tex->num_slow_clears = 0; + + /* stop the statistics query for ps_stats[0] */ + if (query_active) + vi_separate_dcc_stop_query(ctx, tex); + + /* Move the queries in the queue by one. */ + tmp = rctx->dcc_stats[i].ps_stats[2]; + rctx->dcc_stats[i].ps_stats[2] = rctx->dcc_stats[i].ps_stats[1]; + rctx->dcc_stats[i].ps_stats[1] = rctx->dcc_stats[i].ps_stats[0]; + rctx->dcc_stats[i].ps_stats[0] = tmp; + + /* create and start a new query as ps_stats[0] */ + if (query_active) + vi_separate_dcc_start_query(ctx, tex); + + if (disable) { + assert(!tex->last_dcc_separate_buffer); + tex->last_dcc_separate_buffer = tex->dcc_separate_buffer; + tex->dcc_separate_buffer = NULL; + tex->dcc_offset = 0; + /* no need to flag anything since this is called after + * decompression that re-sets framebuffer state + */ + } +} + +/* FAST COLOR CLEAR */ + static void evergreen_set_clear_color(struct r600_texture *rtex, enum pipe_format surface_format, const union pipe_color_union *color) @@ -1555,7 +2195,16 @@ memset(&uc, 0, sizeof(uc)); - if (util_format_is_pure_uint(surface_format)) { + if (rtex->surface.bpe == 16) { + /* DCC fast clear only: + * CLEAR_WORD0 = R = G = B + * CLEAR_WORD1 = A + */ + assert(color->ui[0] == color->ui[1] && + color->ui[0] == color->ui[2]); + uc.ui[0] = color->ui[0]; + uc.ui[1] = color->ui[3]; + } else if (util_format_is_pure_uint(surface_format)) { util_format_write_4ui(surface_format, color->ui, 0, &uc, 0, 0, 0, 1, 1); } else if (util_format_is_pure_sint(surface_format)) { util_format_write_4i(surface_format, color->i, 0, &uc, 0, 0, 0, 1, 1); @@ -1566,7 +2215,7 @@ memcpy(rtex->color_clear_value, &uc, 2 * sizeof(uint32_t)); } -static void vi_get_fast_clear_parameters(enum pipe_format surface_format, +static bool vi_get_fast_clear_parameters(enum pipe_format surface_format, const union pipe_color_union *color, uint32_t* reset_value, bool* clear_words_needed) @@ -1578,6 +2227,11 @@ int extra_channel; const struct util_format_description *desc = util_format_description(surface_format); + if (desc->block.bits == 128 && + (color->ui[0] != color->ui[1] || + color->ui[0] != color->ui[2])) + return false; + *clear_words_needed = true; *reset_value = 0x20202020U; @@ -1592,12 +2246,12 @@ surface_format == PIPE_FORMAT_B5G6R5_SRGB) { extra_channel = -1; } else if (desc->layout == UTIL_FORMAT_LAYOUT_PLAIN) { - if(r600_translate_colorswap(surface_format, FALSE) <= 1) + if(r600_translate_colorswap(surface_format, false) <= 1) extra_channel = desc->nr_channels - 1; else extra_channel = 0; } else - return; + return true; for (i = 0; i < 4; ++i) { int index = desc->swizzle[i] - PIPE_SWIZZLE_X; @@ -1606,18 +2260,26 @@ desc->swizzle[i] > PIPE_SWIZZLE_W) continue; - if (util_format_is_pure_sint(surface_format)) { + if (desc->channel[i].pure_integer && + desc->channel[i].type == UTIL_FORMAT_TYPE_SIGNED) { + /* Use the maximum value for clamping the clear color. */ + int max = u_bit_consecutive(0, desc->channel[i].size - 1); + values[i] = color->i[i] != 0; - if (color->i[i] != 0 && color->i[i] != INT32_MAX) - return; - } else if (util_format_is_pure_uint(surface_format)) { + if (color->i[i] != 0 && MIN2(color->i[i], max) != max) + return true; + } else if (desc->channel[i].pure_integer && + desc->channel[i].type == UTIL_FORMAT_TYPE_UNSIGNED) { + /* Use the maximum value for clamping the clear color. */ + unsigned max = u_bit_consecutive(0, desc->channel[i].size); + values[i] = color->ui[i] != 0U; - if (color->ui[i] != 0U && color->ui[i] != UINT32_MAX) - return; + if (color->ui[i] != 0U && MIN2(color->ui[i], max) != max) + return true; } else { values[i] = color->f[i] != 0.0F; if (color->f[i] != 0.0F && color->f[i] != 1.0F) - return; + return true; } if (index == extra_channel) @@ -1631,7 +2293,7 @@ desc->swizzle[i] - PIPE_SWIZZLE_X != extra_channel && desc->swizzle[i] >= PIPE_SWIZZLE_X && desc->swizzle[i] <= PIPE_SWIZZLE_W) - return; + return true; *clear_words_needed = false; if (main_value) @@ -1639,6 +2301,108 @@ if (extra_value) *reset_value |= 0x40404040U; + return true; +} + +void vi_dcc_clear_level(struct r600_common_context *rctx, + struct r600_texture *rtex, + unsigned level, unsigned clear_value) +{ + struct pipe_resource *dcc_buffer; + uint64_t dcc_offset; + + assert(rtex->dcc_offset && level < rtex->surface.num_dcc_levels); + + if (rtex->dcc_separate_buffer) { + dcc_buffer = &rtex->dcc_separate_buffer->b.b; + dcc_offset = 0; + } else { + dcc_buffer = &rtex->resource.b.b; + dcc_offset = rtex->dcc_offset; + } + + dcc_offset += rtex->surface.level[level].dcc_offset; + + rctx->clear_buffer(&rctx->b, dcc_buffer, dcc_offset, + rtex->surface.level[level].dcc_fast_clear_size, + clear_value, R600_COHERENCY_CB_META); +} + +/* Set the same micro tile mode as the destination of the last MSAA resolve. + * This allows hitting the MSAA resolve fast path, which requires that both + * src and dst micro tile modes match. + */ +static void si_set_optimal_micro_tile_mode(struct r600_common_screen *rscreen, + struct r600_texture *rtex) +{ + if (rtex->resource.is_shared || + rtex->resource.b.b.nr_samples <= 1 || + rtex->surface.micro_tile_mode == rtex->last_msaa_resolve_target_micro_mode) + return; + + assert(rtex->surface.level[0].mode == RADEON_SURF_MODE_2D); + assert(rtex->resource.b.b.last_level == 0); + + /* These magic numbers were copied from addrlib. It doesn't use any + * definitions for them either. They are all 2D_TILED_THIN1 modes with + * different bpp and micro tile mode. + */ + if (rscreen->chip_class >= CIK) { + switch (rtex->last_msaa_resolve_target_micro_mode) { + case RADEON_MICRO_MODE_DISPLAY: + rtex->surface.tiling_index[0] = 10; + break; + case RADEON_MICRO_MODE_THIN: + rtex->surface.tiling_index[0] = 14; + break; + case RADEON_MICRO_MODE_ROTATED: + rtex->surface.tiling_index[0] = 28; + break; + default: /* depth, thick */ + assert(!"unexpected micro mode"); + return; + } + } else { /* SI */ + switch (rtex->last_msaa_resolve_target_micro_mode) { + case RADEON_MICRO_MODE_DISPLAY: + switch (rtex->surface.bpe) { + case 1: + rtex->surface.tiling_index[0] = 10; + break; + case 2: + rtex->surface.tiling_index[0] = 11; + break; + default: /* 4, 8 */ + rtex->surface.tiling_index[0] = 12; + break; + } + break; + case RADEON_MICRO_MODE_THIN: + switch (rtex->surface.bpe) { + case 1: + rtex->surface.tiling_index[0] = 14; + break; + case 2: + rtex->surface.tiling_index[0] = 15; + break; + case 4: + rtex->surface.tiling_index[0] = 16; + break; + default: /* 8, 16 */ + rtex->surface.tiling_index[0] = 17; + break; + } + break; + default: /* depth, thick */ + assert(!"unexpected micro mode"); + return; + } + } + + rtex->surface.micro_tile_mode = rtex->last_msaa_resolve_target_micro_mode; + + p_atomic_inc(&rscreen->dirty_fb_counter); + p_atomic_inc(&rscreen->dirty_tex_descriptor_counter); } void evergreen_do_fast_color_clear(struct r600_common_context *rctx, @@ -1670,11 +2434,6 @@ tex = (struct r600_texture *)fb->cbufs[i]->texture; - /* 128-bit formats are unusupported */ - if (util_format_get_blocksizebits(fb->cbufs[i]->format) > 64) { - continue; - } - /* the clear is allowed if all layers are bound */ if (fb->cbufs[i]->u.tex.first_layer != 0 || fb->cbufs[i]->u.tex.last_layer != util_max_layer(&tex->resource.b.b, 0)) { @@ -1687,7 +2446,7 @@ } /* only supported on tiled surfaces */ - if (tex->surface.level[0].mode < RADEON_SURF_MODE_1D) { + if (tex->surface.is_linear) { continue; } @@ -1700,29 +2459,53 @@ continue; /* fast color clear with 1D tiling doesn't work on old kernels and CIK */ - if (tex->surface.level[0].mode == RADEON_SURF_MODE_1D && - rctx->chip_class >= CIK && + if (rctx->chip_class == CIK && + tex->surface.level[0].mode == RADEON_SURF_MODE_1D && rctx->screen->info.drm_major == 2 && rctx->screen->info.drm_minor < 38) { continue; } - if (tex->dcc_offset) { + /* Fast clear is the most appropriate place to enable DCC for + * displayable surfaces. + */ + if (rctx->chip_class >= VI && + !(rctx->screen->debug_flags & DBG_NO_DCC_FB)) { + vi_separate_dcc_try_enable(rctx, tex); + + /* Stoney can't do a CMASK-based clear, so all clears are + * considered to be hypothetically slow clears, which + * is weighed when determining to enable separate DCC. + */ + if (tex->dcc_gather_statistics && + rctx->family == CHIP_STONEY) + tex->num_slow_clears++; + } + + /* Try to clear DCC first, otherwise try CMASK. */ + if (tex->dcc_offset && tex->surface.num_dcc_levels) { uint32_t reset_value; bool clear_words_needed; if (rctx->screen->debug_flags & DBG_NO_DCC_CLEAR) continue; - vi_get_fast_clear_parameters(fb->cbufs[i]->format, color, &reset_value, &clear_words_needed); + if (!vi_get_fast_clear_parameters(fb->cbufs[i]->format, + color, &reset_value, + &clear_words_needed)) + continue; - rctx->clear_buffer(&rctx->b, &tex->resource.b.b, - tex->dcc_offset, tex->surface.dcc_size, - reset_value, R600_COHERENCY_CB_META); + vi_dcc_clear_level(rctx, tex, 0, reset_value); if (clear_words_needed) tex->dirty_level_mask |= 1 << fb->cbufs[i]->u.tex.level; + tex->separate_dcc_dirty = true; } else { + /* 128-bit formats are unusupported */ + if (tex->surface.bpe > 8) { + continue; + } + /* Stoney/RB+ doesn't work with CMASK fast clear. */ if (rctx->family == CHIP_STONEY) continue; @@ -1741,6 +2524,10 @@ tex->dirty_level_mask |= 1 << fb->cbufs[i]->u.tex.level; } + /* We can change the micro tile mode before a full clear. */ + if (rctx->screen->chip_class >= SI) + si_set_optimal_micro_tile_mode(rctx->screen, tex); + evergreen_set_clear_color(tex, fb->cbufs[i]->format, color); if (dirty_cbufs) @@ -1760,4 +2547,5 @@ { rctx->b.create_surface = r600_create_surface; rctx->b.surface_destroy = r600_surface_destroy; + rctx->b.clear_texture = r600_clear_texture; } diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/radeon_llvm_emit.c mesa-17.0.7/src/gallium/drivers/radeon/radeon_llvm_emit.c --- mesa-12.0.6/src/gallium/drivers/radeon/radeon_llvm_emit.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/radeon_llvm_emit.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,264 +0,0 @@ -/* - * Copyright 2011 Advanced Micro Devices, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - * - * Authors: Tom Stellard - * - */ - -#include "radeon_llvm_emit.h" -#include "radeon_elf_util.h" -#include "c11/threads.h" -#include "gallivm/lp_bld_misc.h" -#include "util/u_debug.h" -#include "util/u_memory.h" -#include "pipe/p_shader_tokens.h" -#include "pipe/p_state.h" - -#include -#include -#include - -#include -#include -#include - -#define CPU_STRING_LEN 30 -#define FS_STRING_LEN 30 -#define TRIPLE_STRING_LEN 7 - -/** - * Shader types for the LLVM backend. - */ -enum radeon_llvm_shader_type { - RADEON_LLVM_SHADER_PS = 0, - RADEON_LLVM_SHADER_VS = 1, - RADEON_LLVM_SHADER_GS = 2, - RADEON_LLVM_SHADER_CS = 3, -}; - -enum radeon_llvm_calling_convention { - RADEON_LLVM_AMDGPU_VS = 87, - RADEON_LLVM_AMDGPU_GS = 88, - RADEON_LLVM_AMDGPU_PS = 89, - RADEON_LLVM_AMDGPU_CS = 90, -}; - -void radeon_llvm_add_attribute(LLVMValueRef F, const char *name, int value) -{ - char str[16]; - - snprintf(str, sizeof(str), "%i", value); - LLVMAddTargetDependentFunctionAttr(F, name, str); -} - -/** - * Set the shader type we want to compile - * - * @param type shader type to set - */ -void radeon_llvm_shader_type(LLVMValueRef F, unsigned type) -{ - enum radeon_llvm_shader_type llvm_type; - enum radeon_llvm_calling_convention calling_conv; - - switch (type) { - case PIPE_SHADER_VERTEX: - case PIPE_SHADER_TESS_CTRL: - case PIPE_SHADER_TESS_EVAL: - llvm_type = RADEON_LLVM_SHADER_VS; - calling_conv = RADEON_LLVM_AMDGPU_VS; - break; - case PIPE_SHADER_GEOMETRY: - llvm_type = RADEON_LLVM_SHADER_GS; - calling_conv = RADEON_LLVM_AMDGPU_GS; - break; - case PIPE_SHADER_FRAGMENT: - llvm_type = RADEON_LLVM_SHADER_PS; - calling_conv = RADEON_LLVM_AMDGPU_PS; - break; - case PIPE_SHADER_COMPUTE: - llvm_type = RADEON_LLVM_SHADER_CS; - calling_conv = RADEON_LLVM_AMDGPU_CS; - break; - default: - unreachable("Unhandle shader type"); - } - - if (HAVE_LLVM >= 0x309) - LLVMSetFunctionCallConv(F, calling_conv); - else - radeon_llvm_add_attribute(F, "ShaderType", llvm_type); -} - -static void init_r600_target() -{ - gallivm_init_llvm_targets(); -#if HAVE_LLVM < 0x0307 - LLVMInitializeR600TargetInfo(); - LLVMInitializeR600Target(); - LLVMInitializeR600TargetMC(); - LLVMInitializeR600AsmPrinter(); -#else - LLVMInitializeAMDGPUTargetInfo(); - LLVMInitializeAMDGPUTarget(); - LLVMInitializeAMDGPUTargetMC(); - LLVMInitializeAMDGPUAsmPrinter(); - -#endif -} - -static once_flag init_r600_target_once_flag = ONCE_FLAG_INIT; - -LLVMTargetRef radeon_llvm_get_r600_target(const char *triple) -{ - LLVMTargetRef target = NULL; - char *err_message = NULL; - - call_once(&init_r600_target_once_flag, init_r600_target); - - if (LLVMGetTargetFromTriple(triple, &target, &err_message)) { - fprintf(stderr, "Cannot find target for triple %s ", triple); - if (err_message) { - fprintf(stderr, "%s\n", err_message); - } - LLVMDisposeMessage(err_message); - return NULL; - } - return target; -} - -struct radeon_llvm_diagnostics { - struct pipe_debug_callback *debug; - unsigned retval; -}; - -static void radeonDiagnosticHandler(LLVMDiagnosticInfoRef di, void *context) -{ - struct radeon_llvm_diagnostics *diag = (struct radeon_llvm_diagnostics *)context; - LLVMDiagnosticSeverity severity = LLVMGetDiagInfoSeverity(di); - char *description = LLVMGetDiagInfoDescription(di); - const char *severity_str = NULL; - - switch (severity) { - case LLVMDSError: - severity_str = "error"; - break; - case LLVMDSWarning: - severity_str = "warning"; - break; - case LLVMDSRemark: - severity_str = "remark"; - break; - case LLVMDSNote: - severity_str = "note"; - break; - default: - severity_str = "unknown"; - } - - pipe_debug_message(diag->debug, SHADER_INFO, - "LLVM diagnostic (%s): %s", severity_str, description); - - if (severity == LLVMDSError) { - diag->retval = 1; - fprintf(stderr,"LLVM triggered Diagnostic Handler: %s\n", description); - } - - LLVMDisposeMessage(description); -} - -/** - * Compile an LLVM module to machine code. - * - * @returns 0 for success, 1 for failure - */ -unsigned radeon_llvm_compile(LLVMModuleRef M, struct radeon_shader_binary *binary, - const char *gpu_family, - LLVMTargetMachineRef tm, - struct pipe_debug_callback *debug) -{ - struct radeon_llvm_diagnostics diag; - char cpu[CPU_STRING_LEN]; - char fs[FS_STRING_LEN]; - char *err; - bool dispose_tm = false; - LLVMContextRef llvm_ctx; - LLVMMemoryBufferRef out_buffer; - unsigned buffer_size; - const char *buffer_data; - char triple[TRIPLE_STRING_LEN]; - LLVMBool mem_err; - - diag.debug = debug; - diag.retval = 0; - - if (!tm) { - strncpy(triple, "r600--", TRIPLE_STRING_LEN); - LLVMTargetRef target = radeon_llvm_get_r600_target(triple); - if (!target) { - return 1; - } - strncpy(cpu, gpu_family, CPU_STRING_LEN); - memset(fs, 0, sizeof(fs)); - strncpy(fs, "+DumpCode", FS_STRING_LEN); - tm = LLVMCreateTargetMachine(target, triple, cpu, fs, - LLVMCodeGenLevelDefault, LLVMRelocDefault, - LLVMCodeModelDefault); - dispose_tm = true; - } - - /* Setup Diagnostic Handler*/ - llvm_ctx = LLVMGetModuleContext(M); - - LLVMContextSetDiagnosticHandler(llvm_ctx, radeonDiagnosticHandler, &diag); - - /* Compile IR*/ - mem_err = LLVMTargetMachineEmitToMemoryBuffer(tm, M, LLVMObjectFile, &err, - &out_buffer); - - /* Process Errors/Warnings */ - if (mem_err) { - fprintf(stderr, "%s: %s", __FUNCTION__, err); - pipe_debug_message(debug, SHADER_INFO, - "LLVM emit error: %s", err); - FREE(err); - diag.retval = 1; - goto out; - } - - /* Extract Shader Code*/ - buffer_size = LLVMGetBufferSize(out_buffer); - buffer_data = LLVMGetBufferStart(out_buffer); - - radeon_elf_read(buffer_data, buffer_size, binary); - - /* Clean up */ - LLVMDisposeMemoryBuffer(out_buffer); - -out: - if (dispose_tm) { - LLVMDisposeTargetMachine(tm); - } - if (diag.retval != 0) - pipe_debug_message(debug, SHADER_INFO, "LLVM compile failed"); - return diag.retval; -} diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/radeon_llvm_emit.h mesa-17.0.7/src/gallium/drivers/radeon/radeon_llvm_emit.h --- mesa-12.0.6/src/gallium/drivers/radeon/radeon_llvm_emit.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/radeon_llvm_emit.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,47 +0,0 @@ -/* - * Copyright 2012 Advanced Micro Devices, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - * - * Authors: Tom Stellard - * - */ - -#ifndef RADEON_LLVM_EMIT_H -#define RADEON_LLVM_EMIT_H - -#include -#include -#include - -struct pipe_debug_callback; -struct radeon_shader_binary; - -void radeon_llvm_add_attribute(LLVMValueRef F, const char *name, int value); -void radeon_llvm_shader_type(LLVMValueRef F, unsigned type); - -LLVMTargetRef radeon_llvm_get_r600_target(const char *triple); - -unsigned radeon_llvm_compile(LLVMModuleRef M, struct radeon_shader_binary *binary, - const char *gpu_family, - LLVMTargetMachineRef tm, - struct pipe_debug_callback *debug); - -#endif /* RADEON_LLVM_EMIT_H */ diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/radeon_llvm.h mesa-17.0.7/src/gallium/drivers/radeon/radeon_llvm.h --- mesa-12.0.6/src/gallium/drivers/radeon/radeon_llvm.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/radeon_llvm.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,192 +0,0 @@ -/* - * Copyright 2011 Advanced Micro Devices, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - * - * Authors: Tom Stellard - * - */ - -#ifndef RADEON_LLVM_H -#define RADEON_LLVM_H - -#include -#include "gallivm/lp_bld_init.h" -#include "gallivm/lp_bld_tgsi.h" - -#define RADEON_LLVM_MAX_INPUTS 32 * 4 -#define RADEON_LLVM_MAX_OUTPUTS 32 * 4 - -#define RADEON_LLVM_INITIAL_CF_DEPTH 4 - -#define RADEON_LLVM_MAX_SYSTEM_VALUES 4 - -struct radeon_llvm_branch { - LLVMBasicBlockRef endif_block; - LLVMBasicBlockRef if_block; - LLVMBasicBlockRef else_block; - unsigned has_else; -}; - -struct radeon_llvm_loop { - LLVMBasicBlockRef loop_block; - LLVMBasicBlockRef endloop_block; -}; - -struct radeon_llvm_context { - struct lp_build_tgsi_soa_context soa; - - /*=== Front end configuration ===*/ - - /* Instructions that are not described by any of the TGSI opcodes. */ - - /** This function is responsible for initilizing the inputs array and will be - * called once for each input declared in the TGSI shader. - */ - void (*load_input)(struct radeon_llvm_context *, - unsigned input_index, - const struct tgsi_full_declaration *decl); - - void (*load_system_value)(struct radeon_llvm_context *, - unsigned index, - const struct tgsi_full_declaration *decl); - - void (*declare_memory_region)(struct radeon_llvm_context *, - const struct tgsi_full_declaration *decl); - - /** This array contains the input values for the shader. Typically these - * values will be in the form of a target intrinsic that will inform the - * backend how to load the actual inputs to the shader. - */ - LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS]; - LLVMValueRef outputs[RADEON_LLVM_MAX_OUTPUTS][TGSI_NUM_CHANNELS]; - - /** This pointer is used to contain the temporary values. - * The amount of temporary used in tgsi can't be bound to a max value and - * thus we must allocate this array at runtime. - */ - LLVMValueRef *temps; - unsigned temps_count; - LLVMValueRef system_values[RADEON_LLVM_MAX_SYSTEM_VALUES]; - - /*=== Private Members ===*/ - - struct radeon_llvm_branch *branch; - struct radeon_llvm_loop *loop; - - unsigned branch_depth; - unsigned branch_depth_max; - unsigned loop_depth; - unsigned loop_depth_max; - - struct tgsi_declaration_range *arrays; - - LLVMValueRef main_fn; - LLVMTypeRef return_type; - - struct gallivm_state gallivm; -}; - -static inline LLVMTypeRef tgsi2llvmtype( - struct lp_build_tgsi_context * bld_base, - enum tgsi_opcode_type type) -{ - LLVMContextRef ctx = bld_base->base.gallivm->context; - - switch (type) { - case TGSI_TYPE_UNSIGNED: - case TGSI_TYPE_SIGNED: - return LLVMInt32TypeInContext(ctx); - case TGSI_TYPE_DOUBLE: - return LLVMDoubleTypeInContext(ctx); - case TGSI_TYPE_UNTYPED: - case TGSI_TYPE_FLOAT: - return LLVMFloatTypeInContext(ctx); - default: break; - } - return 0; -} - -static inline LLVMValueRef bitcast( - struct lp_build_tgsi_context * bld_base, - enum tgsi_opcode_type type, - LLVMValueRef value -) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - LLVMTypeRef dst_type = tgsi2llvmtype(bld_base, type); - - if (dst_type) - return LLVMBuildBitCast(builder, value, dst_type, ""); - else - return value; -} - - -void radeon_llvm_emit_prepare_cube_coords(struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data, - LLVMValueRef *coords_arg, - LLVMValueRef *derivs_arg); - -void radeon_llvm_context_init(struct radeon_llvm_context * ctx, - const char *triple); - -void radeon_llvm_create_func(struct radeon_llvm_context * ctx, - LLVMTypeRef *return_types, unsigned num_return_elems, - LLVMTypeRef *ParamTypes, unsigned ParamCount); - -void radeon_llvm_dispose(struct radeon_llvm_context * ctx); - -inline static struct radeon_llvm_context * radeon_llvm_context( - struct lp_build_tgsi_context * bld_base) -{ - return (struct radeon_llvm_context*)bld_base; -} - -unsigned radeon_llvm_reg_index_soa(unsigned index, unsigned chan); - -void radeon_llvm_finalize_module(struct radeon_llvm_context * ctx); - -void -build_tgsi_intrinsic_nomem( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data); - -LLVMValueRef -radeon_llvm_emit_fetch_double(struct lp_build_tgsi_context *bld_base, - LLVMValueRef ptr, - LLVMValueRef ptr2); - -LLVMValueRef radeon_llvm_saturate(struct lp_build_tgsi_context *bld_base, - LLVMValueRef value); - -LLVMValueRef radeon_llvm_emit_fetch(struct lp_build_tgsi_context *bld_base, - const struct tgsi_full_src_register *reg, - enum tgsi_opcode_type type, - unsigned swizzle); - -void radeon_llvm_emit_store( - struct lp_build_tgsi_context * bld_base, - const struct tgsi_full_instruction * inst, - const struct tgsi_opcode_info * info, - LLVMValueRef dst[4]); - -#endif /* RADEON_LLVM_H */ diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/radeon_llvm_util.c mesa-17.0.7/src/gallium/drivers/radeon/radeon_llvm_util.c --- mesa-12.0.6/src/gallium/drivers/radeon/radeon_llvm_util.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/radeon_llvm_util.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,124 +0,0 @@ -/* - * Copyright 2012, 2013 Advanced Micro Devices, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - * - * Authors: Tom Stellard - * - */ - -#include "radeon_llvm_util.h" -#include "util/u_memory.h" - -#include -#include -#include -#include -#include - -LLVMModuleRef radeon_llvm_parse_bitcode(LLVMContextRef ctx, - const char * bitcode, unsigned bitcode_len) -{ - LLVMMemoryBufferRef buf; - LLVMModuleRef module; - - buf = LLVMCreateMemoryBufferWithMemoryRangeCopy((const char*)bitcode, - bitcode_len, "radeon"); - LLVMParseBitcodeInContext(ctx, buf, &module, NULL); - LLVMDisposeMemoryBuffer(buf); - return module; -} - -unsigned radeon_llvm_get_num_kernels(LLVMContextRef ctx, - const char *bitcode, unsigned bitcode_len) -{ - LLVMModuleRef mod = radeon_llvm_parse_bitcode(ctx, bitcode, bitcode_len); - return LLVMGetNamedMetadataNumOperands(mod, "opencl.kernels"); -} - -static void radeon_llvm_optimize(LLVMModuleRef mod) -{ -#if HAVE_LLVM < 0x0309 - const char *data_layout = LLVMGetDataLayout(mod); - LLVMTargetDataRef TD = LLVMCreateTargetData(data_layout); -#endif - LLVMPassManagerBuilderRef builder = LLVMPassManagerBuilderCreate(); - LLVMPassManagerRef pass_manager = LLVMCreatePassManager(); - - /* Functions calls are not supported yet, so we need to inline - * everything. The most efficient way to do this is to add - * the always_inline attribute to all non-kernel functions - * and then run the Always Inline pass. The Always Inline - * pass will automaically inline functions with this attribute - * and does not perform the expensive cost analysis that the normal - * inliner does. - */ - - LLVMValueRef fn; - for (fn = LLVMGetFirstFunction(mod); fn; fn = LLVMGetNextFunction(fn)) { - /* All the non-kernel functions have internal linkage */ - if (LLVMGetLinkage(fn) == LLVMInternalLinkage) { - LLVMAddFunctionAttr(fn, LLVMAlwaysInlineAttribute); - } - } - -#if HAVE_LLVM < 0x0309 - LLVMAddTargetData(TD, pass_manager); -#endif - LLVMAddAlwaysInlinerPass(pass_manager); - LLVMPassManagerBuilderPopulateModulePassManager(builder, pass_manager); - - LLVMRunPassManager(pass_manager, mod); - LLVMPassManagerBuilderDispose(builder); - LLVMDisposePassManager(pass_manager); -#if HAVE_LLVM < 0x0309 - LLVMDisposeTargetData(TD); -#endif -} - -LLVMModuleRef radeon_llvm_get_kernel_module(LLVMContextRef ctx, unsigned index, - const char *bitcode, unsigned bitcode_len) -{ - LLVMModuleRef mod; - unsigned num_kernels; - LLVMValueRef *kernel_metadata; - unsigned i; - - mod = radeon_llvm_parse_bitcode(ctx, bitcode, bitcode_len); - num_kernels = LLVMGetNamedMetadataNumOperands(mod, "opencl.kernels"); - kernel_metadata = MALLOC(num_kernels * sizeof(LLVMValueRef)); - LLVMGetNamedMetadataOperands(mod, "opencl.kernels", kernel_metadata); - for (i = 0; i < num_kernels; i++) { - LLVMValueRef kernel_signature, *kernel_function; - unsigned num_kernel_md_operands; - if (i == index) { - continue; - } - kernel_signature = kernel_metadata[i]; - num_kernel_md_operands = LLVMGetMDNodeNumOperands(kernel_signature); - kernel_function = MALLOC(num_kernel_md_operands * sizeof (LLVMValueRef)); - LLVMGetMDNodeOperands(kernel_signature, kernel_function); - LLVMDeleteFunction(*kernel_function); - FREE(kernel_function); - } - FREE(kernel_metadata); - radeon_llvm_optimize(mod); - return mod; -} diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/radeon_llvm_util.h mesa-17.0.7/src/gallium/drivers/radeon/radeon_llvm_util.h --- mesa-12.0.6/src/gallium/drivers/radeon/radeon_llvm_util.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/radeon_llvm_util.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,39 +0,0 @@ -/* - * Copyright 2012, 2013 Advanced Micro Devices, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - * - * Authors: Tom Stellard - * - */ - -#ifndef RADEON_LLVM_UTIL_H -#define RADEON_LLVM_UTIL_H - -#include - -LLVMModuleRef radeon_llvm_parse_bitcode(LLVMContextRef ctx, - const char * bitcode, unsigned bitcode_len); -unsigned radeon_llvm_get_num_kernels(LLVMContextRef ctx, - const char *bitcode, unsigned bitcode_len); -LLVMModuleRef radeon_llvm_get_kernel_module(LLVMContextRef ctx, unsigned index, - const char *bitcode, unsigned bitcode_len); - -#endif diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c mesa-17.0.7/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c --- mesa-12.0.6/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,1753 +0,0 @@ -/* - * Copyright 2011 Advanced Micro Devices, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - * - * Authors: Tom Stellard - * - */ -#include "radeon_llvm.h" - -#include "gallivm/lp_bld_const.h" -#include "gallivm/lp_bld_gather.h" -#include "gallivm/lp_bld_flow.h" -#include "gallivm/lp_bld_init.h" -#include "gallivm/lp_bld_intr.h" -#include "gallivm/lp_bld_misc.h" -#include "gallivm/lp_bld_swizzle.h" -#include "tgsi/tgsi_info.h" -#include "tgsi/tgsi_parse.h" -#include "util/u_math.h" -#include "util/u_memory.h" -#include "util/u_debug.h" - -#include -#include - -static struct radeon_llvm_loop * get_current_loop(struct radeon_llvm_context * ctx) -{ - return ctx->loop_depth > 0 ? ctx->loop + (ctx->loop_depth - 1) : NULL; -} - -static struct radeon_llvm_branch * get_current_branch( - struct radeon_llvm_context * ctx) -{ - return ctx->branch_depth > 0 ? - ctx->branch + (ctx->branch_depth - 1) : NULL; -} - -unsigned radeon_llvm_reg_index_soa(unsigned index, unsigned chan) -{ - return (index * 4) + chan; -} - -static LLVMValueRef emit_swizzle( - struct lp_build_tgsi_context * bld_base, - LLVMValueRef value, - unsigned swizzle_x, - unsigned swizzle_y, - unsigned swizzle_z, - unsigned swizzle_w) -{ - LLVMValueRef swizzles[4]; - LLVMTypeRef i32t = - LLVMInt32TypeInContext(bld_base->base.gallivm->context); - - swizzles[0] = LLVMConstInt(i32t, swizzle_x, 0); - swizzles[1] = LLVMConstInt(i32t, swizzle_y, 0); - swizzles[2] = LLVMConstInt(i32t, swizzle_z, 0); - swizzles[3] = LLVMConstInt(i32t, swizzle_w, 0); - - return LLVMBuildShuffleVector(bld_base->base.gallivm->builder, - value, - LLVMGetUndef(LLVMTypeOf(value)), - LLVMConstVector(swizzles, 4), ""); -} - -static struct tgsi_declaration_range -get_array_range(struct lp_build_tgsi_context *bld_base, - unsigned File, const struct tgsi_ind_register *reg) -{ - struct radeon_llvm_context * ctx = radeon_llvm_context(bld_base); - - if (File != TGSI_FILE_TEMPORARY || reg->ArrayID == 0 || - reg->ArrayID > bld_base->info->array_max[TGSI_FILE_TEMPORARY]) { - struct tgsi_declaration_range range; - range.First = 0; - range.Last = bld_base->info->file_max[File]; - return range; - } - - return ctx->arrays[reg->ArrayID - 1]; -} - -static LLVMValueRef -emit_array_index( - struct lp_build_tgsi_soa_context *bld, - const struct tgsi_ind_register *reg, - unsigned offset) -{ - struct gallivm_state * gallivm = bld->bld_base.base.gallivm; - - LLVMValueRef addr = LLVMBuildLoad(gallivm->builder, bld->addr[reg->Index][reg->Swizzle], ""); - return LLVMBuildAdd(gallivm->builder, addr, lp_build_const_int32(gallivm, offset), ""); -} - -LLVMValueRef -radeon_llvm_emit_fetch_double( - struct lp_build_tgsi_context *bld_base, - LLVMValueRef ptr, - LLVMValueRef ptr2) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - LLVMValueRef result; - - result = LLVMGetUndef(LLVMVectorType(LLVMIntTypeInContext(bld_base->base.gallivm->context, 32), bld_base->base.type.length * 2)); - - result = LLVMBuildInsertElement(builder, - result, - bitcast(bld_base, TGSI_TYPE_UNSIGNED, ptr), - bld_base->int_bld.zero, ""); - result = LLVMBuildInsertElement(builder, - result, - bitcast(bld_base, TGSI_TYPE_UNSIGNED, ptr2), - bld_base->int_bld.one, ""); - return bitcast(bld_base, TGSI_TYPE_DOUBLE, result); -} - -static LLVMValueRef -emit_array_fetch( - struct lp_build_tgsi_context *bld_base, - unsigned File, enum tgsi_opcode_type type, - struct tgsi_declaration_range range, - unsigned swizzle) -{ - struct lp_build_tgsi_soa_context *bld = lp_soa_context(bld_base); - struct gallivm_state * gallivm = bld->bld_base.base.gallivm; - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - - unsigned i, size = range.Last - range.First + 1; - LLVMTypeRef vec = LLVMVectorType(tgsi2llvmtype(bld_base, type), size); - LLVMValueRef result = LLVMGetUndef(vec); - - struct tgsi_full_src_register tmp_reg = {}; - tmp_reg.Register.File = File; - - for (i = 0; i < size; ++i) { - tmp_reg.Register.Index = i + range.First; - LLVMValueRef temp = radeon_llvm_emit_fetch(bld_base, &tmp_reg, type, swizzle); - result = LLVMBuildInsertElement(builder, result, temp, - lp_build_const_int32(gallivm, i), ""); - } - return result; -} - -static bool uses_temp_indirect_addressing( - struct lp_build_tgsi_context *bld_base) -{ - struct lp_build_tgsi_soa_context *bld = lp_soa_context(bld_base); - return (bld->indirect_files & (1 << TGSI_FILE_TEMPORARY)); -} - -LLVMValueRef radeon_llvm_emit_fetch(struct lp_build_tgsi_context *bld_base, - const struct tgsi_full_src_register *reg, - enum tgsi_opcode_type type, - unsigned swizzle) -{ - struct radeon_llvm_context * ctx = radeon_llvm_context(bld_base); - struct lp_build_tgsi_soa_context *bld = lp_soa_context(bld_base); - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - LLVMValueRef result = NULL, ptr, ptr2; - - if (swizzle == ~0) { - LLVMValueRef values[TGSI_NUM_CHANNELS]; - unsigned chan; - for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) { - values[chan] = radeon_llvm_emit_fetch(bld_base, reg, type, chan); - } - return lp_build_gather_values(bld_base->base.gallivm, values, - TGSI_NUM_CHANNELS); - } - - if (reg->Register.Indirect) { - struct tgsi_declaration_range range = get_array_range(bld_base, - reg->Register.File, ®->Indirect); - return LLVMBuildExtractElement(builder, - emit_array_fetch(bld_base, reg->Register.File, type, range, swizzle), - emit_array_index(bld, ®->Indirect, reg->Register.Index - range.First), - ""); - } - - switch(reg->Register.File) { - case TGSI_FILE_IMMEDIATE: { - LLVMTypeRef ctype = tgsi2llvmtype(bld_base, type); - if (type == TGSI_TYPE_DOUBLE) { - result = LLVMGetUndef(LLVMVectorType(LLVMIntTypeInContext(bld_base->base.gallivm->context, 32), bld_base->base.type.length * 2)); - result = LLVMConstInsertElement(result, - bld->immediates[reg->Register.Index][swizzle], - bld_base->int_bld.zero); - result = LLVMConstInsertElement(result, - bld->immediates[reg->Register.Index][swizzle + 1], - bld_base->int_bld.one); - return LLVMConstBitCast(result, ctype); - } else { - return LLVMConstBitCast(bld->immediates[reg->Register.Index][swizzle], ctype); - } - } - - case TGSI_FILE_INPUT: - result = ctx->inputs[radeon_llvm_reg_index_soa(reg->Register.Index, swizzle)]; - if (type == TGSI_TYPE_DOUBLE) { - ptr = result; - ptr2 = ctx->inputs[radeon_llvm_reg_index_soa(reg->Register.Index, swizzle + 1)]; - return radeon_llvm_emit_fetch_double(bld_base, ptr, ptr2); - } - break; - - case TGSI_FILE_TEMPORARY: - if (reg->Register.Index >= ctx->temps_count) - return LLVMGetUndef(tgsi2llvmtype(bld_base, type)); - if (uses_temp_indirect_addressing(bld_base)) { - ptr = lp_get_temp_ptr_soa(bld, reg->Register.Index, swizzle); - break; - } - ptr = ctx->temps[reg->Register.Index * TGSI_NUM_CHANNELS + swizzle]; - if (type == TGSI_TYPE_DOUBLE) { - ptr2 = ctx->temps[reg->Register.Index * TGSI_NUM_CHANNELS + swizzle + 1]; - return radeon_llvm_emit_fetch_double(bld_base, - LLVMBuildLoad(builder, ptr, ""), - LLVMBuildLoad(builder, ptr2, "")); - } - result = LLVMBuildLoad(builder, ptr, ""); - break; - - case TGSI_FILE_OUTPUT: - ptr = lp_get_output_ptr(bld, reg->Register.Index, swizzle); - if (type == TGSI_TYPE_DOUBLE) { - ptr2 = lp_get_output_ptr(bld, reg->Register.Index, swizzle + 1); - return radeon_llvm_emit_fetch_double(bld_base, - LLVMBuildLoad(builder, ptr, ""), - LLVMBuildLoad(builder, ptr2, "")); - } - result = LLVMBuildLoad(builder, ptr, ""); - break; - - default: - return LLVMGetUndef(tgsi2llvmtype(bld_base, type)); - } - - return bitcast(bld_base, type, result); -} - -static LLVMValueRef fetch_system_value( - struct lp_build_tgsi_context * bld_base, - const struct tgsi_full_src_register *reg, - enum tgsi_opcode_type type, - unsigned swizzle) -{ - struct radeon_llvm_context * ctx = radeon_llvm_context(bld_base); - struct gallivm_state *gallivm = bld_base->base.gallivm; - - LLVMValueRef cval = ctx->system_values[reg->Register.Index]; - if (LLVMGetTypeKind(LLVMTypeOf(cval)) == LLVMVectorTypeKind) { - cval = LLVMBuildExtractElement(gallivm->builder, cval, - lp_build_const_int32(gallivm, swizzle), ""); - } - return bitcast(bld_base, type, cval); -} - -static LLVMValueRef si_build_alloca_undef(struct gallivm_state *gallivm, - LLVMTypeRef type, - const char *name) -{ - LLVMValueRef ptr = lp_build_alloca(gallivm, type, name); - LLVMBuildStore(gallivm->builder, LLVMGetUndef(type), ptr); - return ptr; -} - -static void emit_declaration( - struct lp_build_tgsi_context * bld_base, - const struct tgsi_full_declaration *decl) -{ - struct radeon_llvm_context * ctx = radeon_llvm_context(bld_base); - unsigned first, last, i, idx; - switch(decl->Declaration.File) { - case TGSI_FILE_ADDRESS: - { - unsigned idx; - for (idx = decl->Range.First; idx <= decl->Range.Last; idx++) { - unsigned chan; - for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) { - ctx->soa.addr[idx][chan] = si_build_alloca_undef( - &ctx->gallivm, - ctx->soa.bld_base.uint_bld.elem_type, ""); - } - } - break; - } - - case TGSI_FILE_TEMPORARY: - if (decl->Declaration.Array) { - if (!ctx->arrays) { - int size = bld_base->info->array_max[TGSI_FILE_TEMPORARY]; - ctx->arrays = MALLOC(sizeof(ctx->arrays[0]) * size); - } - - ctx->arrays[decl->Array.ArrayID - 1] = decl->Range; - } - if (uses_temp_indirect_addressing(bld_base)) { - lp_emit_declaration_soa(bld_base, decl); - break; - } - first = decl->Range.First; - last = decl->Range.Last; - if (!ctx->temps_count) { - ctx->temps_count = bld_base->info->file_max[TGSI_FILE_TEMPORARY] + 1; - ctx->temps = MALLOC(TGSI_NUM_CHANNELS * ctx->temps_count * sizeof(LLVMValueRef)); - } - for (idx = first; idx <= last; idx++) { - for (i = 0; i < TGSI_NUM_CHANNELS; i++) { - ctx->temps[idx * TGSI_NUM_CHANNELS + i] = - si_build_alloca_undef(bld_base->base.gallivm, - bld_base->base.vec_type, - "temp"); - } - } - break; - - case TGSI_FILE_INPUT: - { - unsigned idx; - for (idx = decl->Range.First; idx <= decl->Range.Last; idx++) { - if (ctx->load_input) - ctx->load_input(ctx, idx, decl); - } - } - break; - - case TGSI_FILE_SYSTEM_VALUE: - { - unsigned idx; - for (idx = decl->Range.First; idx <= decl->Range.Last; idx++) { - ctx->load_system_value(ctx, idx, decl); - } - } - break; - - case TGSI_FILE_OUTPUT: - { - unsigned idx; - for (idx = decl->Range.First; idx <= decl->Range.Last; idx++) { - unsigned chan; - assert(idx < RADEON_LLVM_MAX_OUTPUTS); - for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) { - ctx->soa.outputs[idx][chan] = si_build_alloca_undef( - &ctx->gallivm, - ctx->soa.bld_base.base.elem_type, ""); - } - } - break; - } - - case TGSI_FILE_MEMORY: - ctx->declare_memory_region(ctx, decl); - break; - - default: - break; - } -} - -LLVMValueRef radeon_llvm_saturate(struct lp_build_tgsi_context *bld_base, - LLVMValueRef value) -{ - struct lp_build_emit_data clamp_emit_data; - - memset(&clamp_emit_data, 0, sizeof(clamp_emit_data)); - clamp_emit_data.arg_count = 3; - clamp_emit_data.args[0] = value; - clamp_emit_data.args[2] = bld_base->base.one; - clamp_emit_data.args[1] = bld_base->base.zero; - - return lp_build_emit_llvm(bld_base, TGSI_OPCODE_CLAMP, - &clamp_emit_data); -} - -void radeon_llvm_emit_store( - struct lp_build_tgsi_context * bld_base, - const struct tgsi_full_instruction * inst, - const struct tgsi_opcode_info * info, - LLVMValueRef dst[4]) -{ - struct radeon_llvm_context * ctx = radeon_llvm_context(bld_base); - struct lp_build_tgsi_soa_context *bld = lp_soa_context(bld_base); - struct gallivm_state *gallivm = bld->bld_base.base.gallivm; - const struct tgsi_full_dst_register *reg = &inst->Dst[0]; - LLVMBuilderRef builder = bld->bld_base.base.gallivm->builder; - LLVMValueRef temp_ptr, temp_ptr2 = NULL; - unsigned chan, chan_index; - boolean is_vec_store = FALSE; - enum tgsi_opcode_type dtype = tgsi_opcode_infer_dst_type(inst->Instruction.Opcode); - - if (dst[0]) { - LLVMTypeKind k = LLVMGetTypeKind(LLVMTypeOf(dst[0])); - is_vec_store = (k == LLVMVectorTypeKind); - } - - if (is_vec_store) { - LLVMValueRef values[4] = {}; - TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst, chan) { - LLVMValueRef index = lp_build_const_int32(gallivm, chan); - values[chan] = LLVMBuildExtractElement(gallivm->builder, - dst[0], index, ""); - } - bld_base->emit_store(bld_base, inst, info, values); - return; - } - - TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( inst, chan_index ) { - LLVMValueRef value = dst[chan_index]; - - if (dtype == TGSI_TYPE_DOUBLE && (chan_index == 1 || chan_index == 3)) - continue; - if (inst->Instruction.Saturate) - value = radeon_llvm_saturate(bld_base, value); - - if (reg->Register.File == TGSI_FILE_ADDRESS) { - temp_ptr = bld->addr[reg->Register.Index][chan_index]; - LLVMBuildStore(builder, value, temp_ptr); - continue; - } - - if (dtype != TGSI_TYPE_DOUBLE) - value = bitcast(bld_base, TGSI_TYPE_FLOAT, value); - - if (reg->Register.Indirect) { - struct tgsi_declaration_range range = get_array_range(bld_base, - reg->Register.File, ®->Indirect); - - unsigned i, size = range.Last - range.First + 1; - LLVMValueRef array = LLVMBuildInsertElement(builder, - emit_array_fetch(bld_base, reg->Register.File, TGSI_TYPE_FLOAT, range, chan_index), - value, emit_array_index(bld, ®->Indirect, reg->Register.Index - range.First), ""); - - for (i = 0; i < size; ++i) { - switch(reg->Register.File) { - case TGSI_FILE_OUTPUT: - temp_ptr = bld->outputs[i + range.First][chan_index]; - break; - - case TGSI_FILE_TEMPORARY: - if (range.First + i >= ctx->temps_count) - continue; - if (uses_temp_indirect_addressing(bld_base)) - temp_ptr = lp_get_temp_ptr_soa(bld, i + range.First, chan_index); - else - temp_ptr = ctx->temps[(i + range.First) * TGSI_NUM_CHANNELS + chan_index]; - break; - - default: - return; - } - value = LLVMBuildExtractElement(builder, array, - lp_build_const_int32(gallivm, i), ""); - LLVMBuildStore(builder, value, temp_ptr); - } - - } else { - switch(reg->Register.File) { - case TGSI_FILE_OUTPUT: - temp_ptr = bld->outputs[reg->Register.Index][chan_index]; - if (dtype == TGSI_TYPE_DOUBLE) - temp_ptr2 = bld->outputs[reg->Register.Index][chan_index + 1]; - break; - - case TGSI_FILE_TEMPORARY: - if (reg->Register.Index >= ctx->temps_count) - continue; - if (uses_temp_indirect_addressing(bld_base)) { - temp_ptr = NULL; - break; - } - temp_ptr = ctx->temps[ TGSI_NUM_CHANNELS * reg->Register.Index + chan_index]; - if (dtype == TGSI_TYPE_DOUBLE) - temp_ptr2 = ctx->temps[ TGSI_NUM_CHANNELS * reg->Register.Index + chan_index + 1]; - - break; - - default: - return; - } - if (dtype != TGSI_TYPE_DOUBLE) - LLVMBuildStore(builder, value, temp_ptr); - else { - LLVMValueRef ptr = LLVMBuildBitCast(builder, value, - LLVMVectorType(LLVMIntTypeInContext(bld_base->base.gallivm->context, 32), 2), ""); - LLVMValueRef val2; - value = LLVMBuildExtractElement(builder, ptr, - bld_base->uint_bld.zero, ""); - val2 = LLVMBuildExtractElement(builder, ptr, - bld_base->uint_bld.one, ""); - - LLVMBuildStore(builder, bitcast(bld_base, TGSI_TYPE_FLOAT, value), temp_ptr); - LLVMBuildStore(builder, bitcast(bld_base, TGSI_TYPE_FLOAT, val2), temp_ptr2); - } - } - } -} - -/* Emit a branch to the given default target for the current block if - * applicable -- that is, if the current block does not already contain a - * branch from a break or continue. - */ -static void emit_default_branch(LLVMBuilderRef builder, LLVMBasicBlockRef target) -{ - if (!LLVMGetBasicBlockTerminator(LLVMGetInsertBlock(builder))) - LLVMBuildBr(builder, target); -} - -static void bgnloop_emit( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - struct radeon_llvm_context * ctx = radeon_llvm_context(bld_base); - struct gallivm_state * gallivm = bld_base->base.gallivm; - LLVMBasicBlockRef loop_block; - LLVMBasicBlockRef endloop_block; - endloop_block = LLVMAppendBasicBlockInContext(gallivm->context, - ctx->main_fn, "ENDLOOP"); - loop_block = LLVMInsertBasicBlockInContext(gallivm->context, - endloop_block, "LOOP"); - LLVMBuildBr(gallivm->builder, loop_block); - LLVMPositionBuilderAtEnd(gallivm->builder, loop_block); - - if (++ctx->loop_depth > ctx->loop_depth_max) { - unsigned new_max = ctx->loop_depth_max << 1; - - if (!new_max) - new_max = RADEON_LLVM_INITIAL_CF_DEPTH; - - ctx->loop = REALLOC(ctx->loop, ctx->loop_depth_max * - sizeof(ctx->loop[0]), - new_max * sizeof(ctx->loop[0])); - ctx->loop_depth_max = new_max; - } - - ctx->loop[ctx->loop_depth - 1].loop_block = loop_block; - ctx->loop[ctx->loop_depth - 1].endloop_block = endloop_block; -} - -static void brk_emit( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - struct radeon_llvm_context * ctx = radeon_llvm_context(bld_base); - struct gallivm_state * gallivm = bld_base->base.gallivm; - struct radeon_llvm_loop * current_loop = get_current_loop(ctx); - - LLVMBuildBr(gallivm->builder, current_loop->endloop_block); -} - -static void cont_emit( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - struct radeon_llvm_context * ctx = radeon_llvm_context(bld_base); - struct gallivm_state * gallivm = bld_base->base.gallivm; - struct radeon_llvm_loop * current_loop = get_current_loop(ctx); - - LLVMBuildBr(gallivm->builder, current_loop->loop_block); -} - -static void else_emit( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - struct radeon_llvm_context * ctx = radeon_llvm_context(bld_base); - struct gallivm_state * gallivm = bld_base->base.gallivm; - struct radeon_llvm_branch * current_branch = get_current_branch(ctx); - - emit_default_branch(gallivm->builder, current_branch->endif_block); - current_branch->has_else = 1; - LLVMPositionBuilderAtEnd(gallivm->builder, current_branch->else_block); -} - -static void endif_emit( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - struct radeon_llvm_context * ctx = radeon_llvm_context(bld_base); - struct gallivm_state * gallivm = bld_base->base.gallivm; - struct radeon_llvm_branch * current_branch = get_current_branch(ctx); - - emit_default_branch(gallivm->builder, current_branch->endif_block); - - /* Need to fixup an empty else block if there was no ELSE opcode. */ - if (!LLVMGetBasicBlockTerminator(current_branch->else_block)) { - LLVMPositionBuilderAtEnd(gallivm->builder, current_branch->else_block); - LLVMBuildBr(gallivm->builder, current_branch->endif_block); - } - - LLVMPositionBuilderAtEnd(gallivm->builder, current_branch->endif_block); - ctx->branch_depth--; -} - -static void endloop_emit( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - struct radeon_llvm_context * ctx = radeon_llvm_context(bld_base); - struct gallivm_state * gallivm = bld_base->base.gallivm; - struct radeon_llvm_loop * current_loop = get_current_loop(ctx); - - emit_default_branch(gallivm->builder, current_loop->loop_block); - - LLVMPositionBuilderAtEnd(gallivm->builder, current_loop->endloop_block); - ctx->loop_depth--; -} - -static void if_cond_emit( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data, - LLVMValueRef cond) -{ - struct radeon_llvm_context * ctx = radeon_llvm_context(bld_base); - struct gallivm_state * gallivm = bld_base->base.gallivm; - LLVMBasicBlockRef if_block, else_block, endif_block; - - endif_block = LLVMAppendBasicBlockInContext(gallivm->context, - ctx->main_fn, "ENDIF"); - if_block = LLVMInsertBasicBlockInContext(gallivm->context, - endif_block, "IF"); - else_block = LLVMInsertBasicBlockInContext(gallivm->context, - endif_block, "ELSE"); - LLVMBuildCondBr(gallivm->builder, cond, if_block, else_block); - LLVMPositionBuilderAtEnd(gallivm->builder, if_block); - - if (++ctx->branch_depth > ctx->branch_depth_max) { - unsigned new_max = ctx->branch_depth_max << 1; - - if (!new_max) - new_max = RADEON_LLVM_INITIAL_CF_DEPTH; - - ctx->branch = REALLOC(ctx->branch, ctx->branch_depth_max * - sizeof(ctx->branch[0]), - new_max * sizeof(ctx->branch[0])); - ctx->branch_depth_max = new_max; - } - - ctx->branch[ctx->branch_depth - 1].endif_block = endif_block; - ctx->branch[ctx->branch_depth - 1].if_block = if_block; - ctx->branch[ctx->branch_depth - 1].else_block = else_block; - ctx->branch[ctx->branch_depth - 1].has_else = 0; -} - -static void if_emit( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - struct gallivm_state * gallivm = bld_base->base.gallivm; - LLVMValueRef cond; - - cond = LLVMBuildFCmp(gallivm->builder, LLVMRealUNE, - emit_data->args[0], - bld_base->base.zero, ""); - - if_cond_emit(action, bld_base, emit_data, cond); -} - -static void uif_emit( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - struct gallivm_state * gallivm = bld_base->base.gallivm; - LLVMValueRef cond; - - cond = LLVMBuildICmp(gallivm->builder, LLVMIntNE, - bitcast(bld_base, TGSI_TYPE_UNSIGNED, emit_data->args[0]), - bld_base->int_bld.zero, ""); - - if_cond_emit(action, bld_base, emit_data, cond); -} - -static void kill_if_fetch_args( - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - const struct tgsi_full_instruction * inst = emit_data->inst; - struct gallivm_state *gallivm = bld_base->base.gallivm; - LLVMBuilderRef builder = gallivm->builder; - unsigned i; - LLVMValueRef conds[TGSI_NUM_CHANNELS]; - - for (i = 0; i < TGSI_NUM_CHANNELS; i++) { - LLVMValueRef value = lp_build_emit_fetch(bld_base, inst, 0, i); - conds[i] = LLVMBuildFCmp(builder, LLVMRealOLT, value, - bld_base->base.zero, ""); - } - - /* Or the conditions together */ - for (i = TGSI_NUM_CHANNELS - 1; i > 0; i--) { - conds[i - 1] = LLVMBuildOr(builder, conds[i], conds[i - 1], ""); - } - - emit_data->dst_type = LLVMVoidTypeInContext(gallivm->context); - emit_data->arg_count = 1; - emit_data->args[0] = LLVMBuildSelect(builder, conds[0], - lp_build_const_float(gallivm, -1.0f), - bld_base->base.zero, ""); -} - -static void kil_emit( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - unsigned i; - for (i = 0; i < emit_data->arg_count; i++) { - emit_data->output[i] = lp_build_intrinsic_unary( - bld_base->base.gallivm->builder, - action->intr_name, - emit_data->dst_type, emit_data->args[i]); - } -} - -static void radeon_llvm_cube_to_2d_coords(struct lp_build_tgsi_context *bld_base, - LLVMValueRef *in, LLVMValueRef *out) -{ - struct gallivm_state * gallivm = bld_base->base.gallivm; - LLVMBuilderRef builder = gallivm->builder; - LLVMTypeRef type = bld_base->base.elem_type; - LLVMValueRef coords[4]; - LLVMValueRef mad_args[3]; - LLVMValueRef v, cube_vec; - unsigned i; - - cube_vec = lp_build_gather_values(bld_base->base.gallivm, in, 4); - v = lp_build_intrinsic(builder, "llvm.AMDGPU.cube", LLVMVectorType(type, 4), - &cube_vec, 1, LLVMReadNoneAttribute); - - for (i = 0; i < 4; ++i) - coords[i] = LLVMBuildExtractElement(builder, v, - lp_build_const_int32(gallivm, i), ""); - - coords[2] = lp_build_intrinsic(builder, "llvm.fabs.f32", - type, &coords[2], 1, LLVMReadNoneAttribute); - coords[2] = lp_build_emit_llvm_unary(bld_base, TGSI_OPCODE_RCP, coords[2]); - - mad_args[1] = coords[2]; - mad_args[2] = LLVMConstReal(type, 1.5); - - mad_args[0] = coords[0]; - coords[0] = lp_build_emit_llvm_ternary(bld_base, TGSI_OPCODE_MAD, - mad_args[0], mad_args[1], mad_args[2]); - - mad_args[0] = coords[1]; - coords[1] = lp_build_emit_llvm_ternary(bld_base, TGSI_OPCODE_MAD, - mad_args[0], mad_args[1], mad_args[2]); - - /* apply xyz = yxw swizzle to cooords */ - out[0] = coords[1]; - out[1] = coords[0]; - out[2] = coords[3]; -} - -void radeon_llvm_emit_prepare_cube_coords( - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data, - LLVMValueRef *coords_arg, - LLVMValueRef *derivs_arg) -{ - - unsigned target = emit_data->inst->Texture.Texture; - unsigned opcode = emit_data->inst->Instruction.Opcode; - struct gallivm_state * gallivm = bld_base->base.gallivm; - LLVMBuilderRef builder = gallivm->builder; - LLVMValueRef coords[4]; - unsigned i; - - radeon_llvm_cube_to_2d_coords(bld_base, coords_arg, coords); - - if (opcode == TGSI_OPCODE_TXD && derivs_arg) { - LLVMValueRef derivs[4]; - int axis; - - /* Convert cube derivatives to 2D derivatives. */ - for (axis = 0; axis < 2; axis++) { - LLVMValueRef shifted_cube_coords[4], shifted_coords[4]; - - /* Shift the cube coordinates by the derivatives to get - * the cube coordinates of the "neighboring pixel". - */ - for (i = 0; i < 3; i++) - shifted_cube_coords[i] = - LLVMBuildFAdd(builder, coords_arg[i], - derivs_arg[axis*3+i], ""); - shifted_cube_coords[3] = LLVMGetUndef(bld_base->base.elem_type); - - /* Project the shifted cube coordinates onto the face. */ - radeon_llvm_cube_to_2d_coords(bld_base, shifted_cube_coords, - shifted_coords); - - /* Subtract both sets of 2D coordinates to get 2D derivatives. - * This won't work if the shifted coordinates ended up - * in a different face. - */ - for (i = 0; i < 2; i++) - derivs[axis * 2 + i] = - LLVMBuildFSub(builder, shifted_coords[i], - coords[i], ""); - } - - memcpy(derivs_arg, derivs, sizeof(derivs)); - } - - if (target == TGSI_TEXTURE_CUBE_ARRAY || - target == TGSI_TEXTURE_SHADOWCUBE_ARRAY) { - /* for cube arrays coord.z = coord.w(array_index) * 8 + face */ - /* coords_arg.w component - array_index for cube arrays */ - coords[2] = lp_build_emit_llvm_ternary(bld_base, TGSI_OPCODE_MAD, - coords_arg[3], lp_build_const_float(gallivm, 8.0), coords[2]); - } - - /* Preserve compare/lod/bias. Put it in coords.w. */ - if (opcode == TGSI_OPCODE_TEX2 || - opcode == TGSI_OPCODE_TXB2 || - opcode == TGSI_OPCODE_TXL2) { - coords[3] = coords_arg[4]; - } else if (opcode == TGSI_OPCODE_TXB || - opcode == TGSI_OPCODE_TXL || - target == TGSI_TEXTURE_SHADOWCUBE) { - coords[3] = coords_arg[3]; - } - - memcpy(coords_arg, coords, sizeof(coords)); -} - -static void emit_icmp( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - unsigned pred; - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - LLVMContextRef context = bld_base->base.gallivm->context; - - switch (emit_data->inst->Instruction.Opcode) { - case TGSI_OPCODE_USEQ: pred = LLVMIntEQ; break; - case TGSI_OPCODE_USNE: pred = LLVMIntNE; break; - case TGSI_OPCODE_USGE: pred = LLVMIntUGE; break; - case TGSI_OPCODE_USLT: pred = LLVMIntULT; break; - case TGSI_OPCODE_ISGE: pred = LLVMIntSGE; break; - case TGSI_OPCODE_ISLT: pred = LLVMIntSLT; break; - default: - assert(!"unknown instruction"); - pred = 0; - break; - } - - LLVMValueRef v = LLVMBuildICmp(builder, pred, - emit_data->args[0], emit_data->args[1],""); - - v = LLVMBuildSExtOrBitCast(builder, v, - LLVMInt32TypeInContext(context), ""); - - emit_data->output[emit_data->chan] = v; -} - -static void emit_ucmp( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - - LLVMValueRef arg0 = LLVMBuildBitCast(builder, emit_data->args[0], - bld_base->uint_bld.elem_type, ""); - - LLVMValueRef v = LLVMBuildICmp(builder, LLVMIntNE, arg0, - bld_base->uint_bld.zero, ""); - - emit_data->output[emit_data->chan] = - LLVMBuildSelect(builder, v, emit_data->args[1], emit_data->args[2], ""); -} - -static void emit_cmp(const struct lp_build_tgsi_action *action, - struct lp_build_tgsi_context *bld_base, - struct lp_build_emit_data *emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - LLVMValueRef cond, *args = emit_data->args; - - cond = LLVMBuildFCmp(builder, LLVMRealOLT, args[0], - bld_base->base.zero, ""); - - emit_data->output[emit_data->chan] = - LLVMBuildSelect(builder, cond, args[1], args[2], ""); -} - -static void emit_set_cond( - const struct lp_build_tgsi_action *action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - LLVMRealPredicate pred; - LLVMValueRef cond; - - /* Use ordered for everything but NE (which is usual for - * float comparisons) - */ - switch (emit_data->inst->Instruction.Opcode) { - case TGSI_OPCODE_SGE: pred = LLVMRealOGE; break; - case TGSI_OPCODE_SEQ: pred = LLVMRealOEQ; break; - case TGSI_OPCODE_SLE: pred = LLVMRealOLE; break; - case TGSI_OPCODE_SLT: pred = LLVMRealOLT; break; - case TGSI_OPCODE_SNE: pred = LLVMRealUNE; break; - case TGSI_OPCODE_SGT: pred = LLVMRealOGT; break; - default: assert(!"unknown instruction"); pred = 0; break; - } - - cond = LLVMBuildFCmp(builder, - pred, emit_data->args[0], emit_data->args[1], ""); - - emit_data->output[emit_data->chan] = LLVMBuildSelect(builder, - cond, bld_base->base.one, bld_base->base.zero, ""); -} - -static void emit_fcmp( - const struct lp_build_tgsi_action *action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - LLVMContextRef context = bld_base->base.gallivm->context; - LLVMRealPredicate pred; - - /* Use ordered for everything but NE (which is usual for - * float comparisons) - */ - switch (emit_data->inst->Instruction.Opcode) { - case TGSI_OPCODE_FSEQ: pred = LLVMRealOEQ; break; - case TGSI_OPCODE_FSGE: pred = LLVMRealOGE; break; - case TGSI_OPCODE_FSLT: pred = LLVMRealOLT; break; - case TGSI_OPCODE_FSNE: pred = LLVMRealUNE; break; - default: assert(!"unknown instruction"); pred = 0; break; - } - - LLVMValueRef v = LLVMBuildFCmp(builder, pred, - emit_data->args[0], emit_data->args[1],""); - - v = LLVMBuildSExtOrBitCast(builder, v, - LLVMInt32TypeInContext(context), ""); - - emit_data->output[emit_data->chan] = v; -} - -static void emit_dcmp( - const struct lp_build_tgsi_action *action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - LLVMContextRef context = bld_base->base.gallivm->context; - LLVMRealPredicate pred; - - /* Use ordered for everything but NE (which is usual for - * float comparisons) - */ - switch (emit_data->inst->Instruction.Opcode) { - case TGSI_OPCODE_DSEQ: pred = LLVMRealOEQ; break; - case TGSI_OPCODE_DSGE: pred = LLVMRealOGE; break; - case TGSI_OPCODE_DSLT: pred = LLVMRealOLT; break; - case TGSI_OPCODE_DSNE: pred = LLVMRealUNE; break; - default: assert(!"unknown instruction"); pred = 0; break; - } - - LLVMValueRef v = LLVMBuildFCmp(builder, pred, - emit_data->args[0], emit_data->args[1],""); - - v = LLVMBuildSExtOrBitCast(builder, v, - LLVMInt32TypeInContext(context), ""); - - emit_data->output[emit_data->chan] = v; -} - -static void emit_not( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - LLVMValueRef v = bitcast(bld_base, TGSI_TYPE_UNSIGNED, - emit_data->args[0]); - emit_data->output[emit_data->chan] = LLVMBuildNot(builder, v, ""); -} - -static void emit_arl( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - LLVMValueRef floor_index = lp_build_emit_llvm_unary(bld_base, TGSI_OPCODE_FLR, emit_data->args[0]); - emit_data->output[emit_data->chan] = LLVMBuildFPToSI(builder, - floor_index, bld_base->base.int_elem_type , ""); -} - -static void emit_and( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - emit_data->output[emit_data->chan] = LLVMBuildAnd(builder, - emit_data->args[0], emit_data->args[1], ""); -} - -static void emit_or( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - emit_data->output[emit_data->chan] = LLVMBuildOr(builder, - emit_data->args[0], emit_data->args[1], ""); -} - -static void emit_uadd( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - emit_data->output[emit_data->chan] = LLVMBuildAdd(builder, - emit_data->args[0], emit_data->args[1], ""); -} - -static void emit_udiv( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - emit_data->output[emit_data->chan] = LLVMBuildUDiv(builder, - emit_data->args[0], emit_data->args[1], ""); -} - -static void emit_idiv( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - emit_data->output[emit_data->chan] = LLVMBuildSDiv(builder, - emit_data->args[0], emit_data->args[1], ""); -} - -static void emit_mod( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - emit_data->output[emit_data->chan] = LLVMBuildSRem(builder, - emit_data->args[0], emit_data->args[1], ""); -} - -static void emit_umod( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - emit_data->output[emit_data->chan] = LLVMBuildURem(builder, - emit_data->args[0], emit_data->args[1], ""); -} - -static void emit_shl( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - emit_data->output[emit_data->chan] = LLVMBuildShl(builder, - emit_data->args[0], emit_data->args[1], ""); -} - -static void emit_ushr( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - emit_data->output[emit_data->chan] = LLVMBuildLShr(builder, - emit_data->args[0], emit_data->args[1], ""); -} -static void emit_ishr( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - emit_data->output[emit_data->chan] = LLVMBuildAShr(builder, - emit_data->args[0], emit_data->args[1], ""); -} - -static void emit_xor( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - emit_data->output[emit_data->chan] = LLVMBuildXor(builder, - emit_data->args[0], emit_data->args[1], ""); -} - -static void emit_ssg( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - - LLVMValueRef cmp, val; - - if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_ISSG) { - cmp = LLVMBuildICmp(builder, LLVMIntSGT, emit_data->args[0], bld_base->int_bld.zero, ""); - val = LLVMBuildSelect(builder, cmp, bld_base->int_bld.one, emit_data->args[0], ""); - cmp = LLVMBuildICmp(builder, LLVMIntSGE, val, bld_base->int_bld.zero, ""); - val = LLVMBuildSelect(builder, cmp, val, LLVMConstInt(bld_base->int_bld.elem_type, -1, true), ""); - } else { // float SSG - cmp = LLVMBuildFCmp(builder, LLVMRealOGT, emit_data->args[0], bld_base->base.zero, ""); - val = LLVMBuildSelect(builder, cmp, bld_base->base.one, emit_data->args[0], ""); - cmp = LLVMBuildFCmp(builder, LLVMRealOGE, val, bld_base->base.zero, ""); - val = LLVMBuildSelect(builder, cmp, val, LLVMConstReal(bld_base->base.elem_type, -1), ""); - } - - emit_data->output[emit_data->chan] = val; -} - -static void emit_ineg( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - emit_data->output[emit_data->chan] = LLVMBuildNeg(builder, - emit_data->args[0], ""); -} - -static void emit_dneg( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - emit_data->output[emit_data->chan] = LLVMBuildFNeg(builder, - emit_data->args[0], ""); -} - -static void emit_frac( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - char *intr; - - if (emit_data->info->opcode == TGSI_OPCODE_FRC) - intr = "llvm.floor.f32"; - else if (emit_data->info->opcode == TGSI_OPCODE_DFRAC) - intr = "llvm.floor.f64"; - else { - assert(0); - return; - } - - LLVMValueRef floor = lp_build_intrinsic(builder, intr, emit_data->dst_type, - &emit_data->args[0], 1, - LLVMReadNoneAttribute); - emit_data->output[emit_data->chan] = LLVMBuildFSub(builder, - emit_data->args[0], floor, ""); -} - -static void emit_f2i( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - emit_data->output[emit_data->chan] = LLVMBuildFPToSI(builder, - emit_data->args[0], bld_base->int_bld.elem_type, ""); -} - -static void emit_f2u( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - emit_data->output[emit_data->chan] = LLVMBuildFPToUI(builder, - emit_data->args[0], bld_base->uint_bld.elem_type, ""); -} - -static void emit_i2f( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - emit_data->output[emit_data->chan] = LLVMBuildSIToFP(builder, - emit_data->args[0], bld_base->base.elem_type, ""); -} - -static void emit_u2f( - const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - emit_data->output[emit_data->chan] = LLVMBuildUIToFP(builder, - emit_data->args[0], bld_base->base.elem_type, ""); -} - -static void emit_immediate(struct lp_build_tgsi_context * bld_base, - const struct tgsi_full_immediate *imm) -{ - unsigned i; - struct radeon_llvm_context * ctx = radeon_llvm_context(bld_base); - - for (i = 0; i < 4; ++i) { - ctx->soa.immediates[ctx->soa.num_immediates][i] = - LLVMConstInt(bld_base->uint_bld.elem_type, imm->u[i].Uint, false ); - } - - ctx->soa.num_immediates++; -} - -void -build_tgsi_intrinsic_nomem(const struct lp_build_tgsi_action *action, - struct lp_build_tgsi_context *bld_base, - struct lp_build_emit_data *emit_data) -{ - struct lp_build_context * base = &bld_base->base; - emit_data->output[emit_data->chan] = - lp_build_intrinsic(base->gallivm->builder, action->intr_name, - emit_data->dst_type, emit_data->args, - emit_data->arg_count, LLVMReadNoneAttribute); -} - -static void emit_bfi(const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - struct gallivm_state *gallivm = bld_base->base.gallivm; - LLVMBuilderRef builder = gallivm->builder; - LLVMValueRef bfi_args[3]; - - // Calculate the bitmask: (((1 << src3) - 1) << src2 - bfi_args[0] = LLVMBuildShl(builder, - LLVMBuildSub(builder, - LLVMBuildShl(builder, - bld_base->int_bld.one, - emit_data->args[3], ""), - bld_base->int_bld.one, ""), - emit_data->args[2], ""); - - bfi_args[1] = LLVMBuildShl(builder, emit_data->args[1], - emit_data->args[2], ""); - - bfi_args[2] = emit_data->args[0]; - - /* Calculate: - * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2) - * Use the right-hand side, which the LLVM backend can convert to V_BFI. - */ - emit_data->output[emit_data->chan] = - LLVMBuildXor(builder, bfi_args[2], - LLVMBuildAnd(builder, bfi_args[0], - LLVMBuildXor(builder, bfi_args[1], bfi_args[2], - ""), ""), ""); -} - -/* this is ffs in C */ -static void emit_lsb(const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - struct gallivm_state *gallivm = bld_base->base.gallivm; - LLVMBuilderRef builder = gallivm->builder; - LLVMValueRef args[2] = { - emit_data->args[0], - - /* The value of 1 means that ffs(x=0) = undef, so LLVM won't - * add special code to check for x=0. The reason is that - * the LLVM behavior for x=0 is different from what we - * need here. However, LLVM also assumes that ffs(x) is - * in [0, 31], but GLSL expects that ffs(0) = -1, so - * a conditional assignment to handle 0 is still required. - */ - LLVMConstInt(LLVMInt1TypeInContext(gallivm->context), 1, 0) - }; - - LLVMValueRef lsb = - lp_build_intrinsic(gallivm->builder, "llvm.cttz.i32", - emit_data->dst_type, args, ARRAY_SIZE(args), - LLVMReadNoneAttribute); - - /* TODO: We need an intrinsic to skip this conditional. */ - /* Check for zero: */ - emit_data->output[emit_data->chan] = - LLVMBuildSelect(builder, - LLVMBuildICmp(builder, LLVMIntEQ, args[0], - bld_base->uint_bld.zero, ""), - lp_build_const_int32(gallivm, -1), lsb, ""); -} - -/* Find the last bit set. */ -static void emit_umsb(const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - struct gallivm_state *gallivm = bld_base->base.gallivm; - LLVMBuilderRef builder = gallivm->builder; - LLVMValueRef args[2] = { - emit_data->args[0], - /* Don't generate code for handling zero: */ - lp_build_const_int32(gallivm, 1) - }; - - LLVMValueRef msb = - lp_build_intrinsic(builder, "llvm.ctlz.i32", - emit_data->dst_type, args, ARRAY_SIZE(args), - LLVMReadNoneAttribute); - - /* The HW returns the last bit index from MSB, but TGSI wants - * the index from LSB. Invert it by doing "31 - msb". */ - msb = LLVMBuildSub(builder, lp_build_const_int32(gallivm, 31), - msb, ""); - - /* Check for zero: */ - emit_data->output[emit_data->chan] = - LLVMBuildSelect(builder, - LLVMBuildICmp(builder, LLVMIntEQ, args[0], - bld_base->uint_bld.zero, ""), - lp_build_const_int32(gallivm, -1), msb, ""); -} - -/* Find the last bit opposite of the sign bit. */ -static void emit_imsb(const struct lp_build_tgsi_action * action, - struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - struct gallivm_state *gallivm = bld_base->base.gallivm; - LLVMBuilderRef builder = gallivm->builder; - LLVMValueRef arg = emit_data->args[0]; - - LLVMValueRef msb = - lp_build_intrinsic(builder, "llvm.AMDGPU.flbit.i32", - emit_data->dst_type, &arg, 1, - LLVMReadNoneAttribute); - - /* The HW returns the last bit index from MSB, but TGSI wants - * the index from LSB. Invert it by doing "31 - msb". */ - msb = LLVMBuildSub(builder, lp_build_const_int32(gallivm, 31), - msb, ""); - - /* If arg == 0 || arg == -1 (0xffffffff), return -1. */ - LLVMValueRef all_ones = lp_build_const_int32(gallivm, -1); - - LLVMValueRef cond = - LLVMBuildOr(builder, - LLVMBuildICmp(builder, LLVMIntEQ, arg, - bld_base->uint_bld.zero, ""), - LLVMBuildICmp(builder, LLVMIntEQ, arg, - all_ones, ""), ""); - - emit_data->output[emit_data->chan] = - LLVMBuildSelect(builder, cond, all_ones, msb, ""); -} - -static void emit_iabs(const struct lp_build_tgsi_action *action, - struct lp_build_tgsi_context *bld_base, - struct lp_build_emit_data *emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - - emit_data->output[emit_data->chan] = - lp_build_emit_llvm_binary(bld_base, TGSI_OPCODE_IMAX, - emit_data->args[0], - LLVMBuildNeg(builder, - emit_data->args[0], "")); -} - -static void emit_minmax_int(const struct lp_build_tgsi_action *action, - struct lp_build_tgsi_context *bld_base, - struct lp_build_emit_data *emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - LLVMIntPredicate op; - - switch (emit_data->info->opcode) { - default: - assert(0); - case TGSI_OPCODE_IMAX: - op = LLVMIntSGT; - break; - case TGSI_OPCODE_IMIN: - op = LLVMIntSLT; - break; - case TGSI_OPCODE_UMAX: - op = LLVMIntUGT; - break; - case TGSI_OPCODE_UMIN: - op = LLVMIntULT; - break; - } - - emit_data->output[emit_data->chan] = - LLVMBuildSelect(builder, - LLVMBuildICmp(builder, op, emit_data->args[0], - emit_data->args[1], ""), - emit_data->args[0], - emit_data->args[1], ""); -} - -static void pk2h_fetch_args(struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - emit_data->args[0] = lp_build_emit_fetch(bld_base, emit_data->inst, - 0, TGSI_CHAN_X); - emit_data->args[1] = lp_build_emit_fetch(bld_base, emit_data->inst, - 0, TGSI_CHAN_Y); -} - -static void emit_pk2h(const struct lp_build_tgsi_action *action, - struct lp_build_tgsi_context *bld_base, - struct lp_build_emit_data *emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - LLVMContextRef context = bld_base->base.gallivm->context; - struct lp_build_context *uint_bld = &bld_base->uint_bld; - LLVMTypeRef fp16, i16; - LLVMValueRef const16, comp[2]; - unsigned i; - - fp16 = LLVMHalfTypeInContext(context); - i16 = LLVMInt16TypeInContext(context); - const16 = lp_build_const_int32(uint_bld->gallivm, 16); - - for (i = 0; i < 2; i++) { - comp[i] = LLVMBuildFPTrunc(builder, emit_data->args[i], fp16, ""); - comp[i] = LLVMBuildBitCast(builder, comp[i], i16, ""); - comp[i] = LLVMBuildZExt(builder, comp[i], uint_bld->elem_type, ""); - } - - comp[1] = LLVMBuildShl(builder, comp[1], const16, ""); - comp[0] = LLVMBuildOr(builder, comp[0], comp[1], ""); - - emit_data->output[emit_data->chan] = comp[0]; -} - -static void up2h_fetch_args(struct lp_build_tgsi_context * bld_base, - struct lp_build_emit_data * emit_data) -{ - emit_data->args[0] = lp_build_emit_fetch(bld_base, emit_data->inst, - 0, TGSI_CHAN_X); -} - -static void emit_up2h(const struct lp_build_tgsi_action *action, - struct lp_build_tgsi_context *bld_base, - struct lp_build_emit_data *emit_data) -{ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - LLVMContextRef context = bld_base->base.gallivm->context; - struct lp_build_context *uint_bld = &bld_base->uint_bld; - LLVMTypeRef fp16, i16; - LLVMValueRef const16, input, val; - unsigned i; - - fp16 = LLVMHalfTypeInContext(context); - i16 = LLVMInt16TypeInContext(context); - const16 = lp_build_const_int32(uint_bld->gallivm, 16); - input = emit_data->args[0]; - - for (i = 0; i < 2; i++) { - val = i == 1 ? LLVMBuildLShr(builder, input, const16, "") : input; - val = LLVMBuildTrunc(builder, val, i16, ""); - val = LLVMBuildBitCast(builder, val, fp16, ""); - emit_data->output[i] = - LLVMBuildFPExt(builder, val, bld_base->base.elem_type, ""); - } -} - -void radeon_llvm_context_init(struct radeon_llvm_context * ctx, const char *triple) -{ - struct lp_type type; - - /* Initialize the gallivm object: - * We are only using the module, context, and builder fields of this struct. - * This should be enough for us to be able to pass our gallivm struct to the - * helper functions in the gallivm module. - */ - memset(&ctx->gallivm, 0, sizeof (ctx->gallivm)); - memset(&ctx->soa, 0, sizeof(ctx->soa)); - ctx->gallivm.context = LLVMContextCreate(); - ctx->gallivm.module = LLVMModuleCreateWithNameInContext("tgsi", - ctx->gallivm.context); - LLVMSetTarget(ctx->gallivm.module, triple); - ctx->gallivm.builder = LLVMCreateBuilderInContext(ctx->gallivm.context); - - struct lp_build_tgsi_context * bld_base = &ctx->soa.bld_base; - - type.floating = TRUE; - type.fixed = FALSE; - type.sign = TRUE; - type.norm = FALSE; - type.width = 32; - type.length = 1; - - lp_build_context_init(&bld_base->base, &ctx->gallivm, type); - lp_build_context_init(&ctx->soa.bld_base.uint_bld, &ctx->gallivm, lp_uint_type(type)); - lp_build_context_init(&ctx->soa.bld_base.int_bld, &ctx->gallivm, lp_int_type(type)); - { - struct lp_type dbl_type; - dbl_type = type; - dbl_type.width *= 2; - lp_build_context_init(&ctx->soa.bld_base.dbl_bld, &ctx->gallivm, dbl_type); - } - - bld_base->soa = 1; - bld_base->emit_store = radeon_llvm_emit_store; - bld_base->emit_swizzle = emit_swizzle; - bld_base->emit_declaration = emit_declaration; - bld_base->emit_immediate = emit_immediate; - - bld_base->emit_fetch_funcs[TGSI_FILE_IMMEDIATE] = radeon_llvm_emit_fetch; - bld_base->emit_fetch_funcs[TGSI_FILE_INPUT] = radeon_llvm_emit_fetch; - bld_base->emit_fetch_funcs[TGSI_FILE_TEMPORARY] = radeon_llvm_emit_fetch; - bld_base->emit_fetch_funcs[TGSI_FILE_OUTPUT] = radeon_llvm_emit_fetch; - bld_base->emit_fetch_funcs[TGSI_FILE_SYSTEM_VALUE] = fetch_system_value; - - /* Allocate outputs */ - ctx->soa.outputs = ctx->outputs; - - lp_set_default_actions(bld_base); - - bld_base->op_actions[TGSI_OPCODE_ABS].emit = build_tgsi_intrinsic_nomem; - bld_base->op_actions[TGSI_OPCODE_ABS].intr_name = "llvm.fabs.f32"; - bld_base->op_actions[TGSI_OPCODE_AND].emit = emit_and; - bld_base->op_actions[TGSI_OPCODE_ARL].emit = emit_arl; - bld_base->op_actions[TGSI_OPCODE_BFI].emit = emit_bfi; - bld_base->op_actions[TGSI_OPCODE_BGNLOOP].emit = bgnloop_emit; - bld_base->op_actions[TGSI_OPCODE_BREV].emit = build_tgsi_intrinsic_nomem; - bld_base->op_actions[TGSI_OPCODE_BREV].intr_name = - HAVE_LLVM >= 0x0308 ? "llvm.bitreverse.i32" : "llvm.AMDGPU.brev"; - bld_base->op_actions[TGSI_OPCODE_BRK].emit = brk_emit; - bld_base->op_actions[TGSI_OPCODE_CEIL].emit = build_tgsi_intrinsic_nomem; - bld_base->op_actions[TGSI_OPCODE_CEIL].intr_name = "llvm.ceil.f32"; - bld_base->op_actions[TGSI_OPCODE_CLAMP].emit = build_tgsi_intrinsic_nomem; - bld_base->op_actions[TGSI_OPCODE_CLAMP].intr_name = - HAVE_LLVM >= 0x0308 ? "llvm.AMDGPU.clamp." : "llvm.AMDIL.clamp."; - bld_base->op_actions[TGSI_OPCODE_CMP].emit = emit_cmp; - bld_base->op_actions[TGSI_OPCODE_CONT].emit = cont_emit; - bld_base->op_actions[TGSI_OPCODE_COS].emit = build_tgsi_intrinsic_nomem; - bld_base->op_actions[TGSI_OPCODE_COS].intr_name = "llvm.cos.f32"; - bld_base->op_actions[TGSI_OPCODE_DABS].emit = build_tgsi_intrinsic_nomem; - bld_base->op_actions[TGSI_OPCODE_DABS].intr_name = "llvm.fabs.f64"; - bld_base->op_actions[TGSI_OPCODE_DFMA].emit = build_tgsi_intrinsic_nomem; - bld_base->op_actions[TGSI_OPCODE_DFMA].intr_name = "llvm.fma.f64"; - bld_base->op_actions[TGSI_OPCODE_DFRAC].emit = emit_frac; - bld_base->op_actions[TGSI_OPCODE_DNEG].emit = emit_dneg; - bld_base->op_actions[TGSI_OPCODE_DSEQ].emit = emit_dcmp; - bld_base->op_actions[TGSI_OPCODE_DSGE].emit = emit_dcmp; - bld_base->op_actions[TGSI_OPCODE_DSLT].emit = emit_dcmp; - bld_base->op_actions[TGSI_OPCODE_DSNE].emit = emit_dcmp; - bld_base->op_actions[TGSI_OPCODE_DRSQ].emit = build_tgsi_intrinsic_nomem; - bld_base->op_actions[TGSI_OPCODE_DRSQ].intr_name = "llvm.AMDGPU.rsq.f64"; - bld_base->op_actions[TGSI_OPCODE_DSQRT].emit = build_tgsi_intrinsic_nomem; - bld_base->op_actions[TGSI_OPCODE_DSQRT].intr_name = "llvm.sqrt.f64"; - bld_base->op_actions[TGSI_OPCODE_ELSE].emit = else_emit; - bld_base->op_actions[TGSI_OPCODE_ENDIF].emit = endif_emit; - bld_base->op_actions[TGSI_OPCODE_ENDLOOP].emit = endloop_emit; - bld_base->op_actions[TGSI_OPCODE_EX2].emit = build_tgsi_intrinsic_nomem; - bld_base->op_actions[TGSI_OPCODE_EX2].intr_name = - HAVE_LLVM >= 0x0308 ? "llvm.exp2.f32" : "llvm.AMDIL.exp."; - bld_base->op_actions[TGSI_OPCODE_FLR].emit = build_tgsi_intrinsic_nomem; - bld_base->op_actions[TGSI_OPCODE_FLR].intr_name = "llvm.floor.f32"; - bld_base->op_actions[TGSI_OPCODE_FMA].emit = build_tgsi_intrinsic_nomem; - bld_base->op_actions[TGSI_OPCODE_FMA].intr_name = "llvm.fma.f32"; - bld_base->op_actions[TGSI_OPCODE_FRC].emit = emit_frac; - bld_base->op_actions[TGSI_OPCODE_F2I].emit = emit_f2i; - bld_base->op_actions[TGSI_OPCODE_F2U].emit = emit_f2u; - bld_base->op_actions[TGSI_OPCODE_FSEQ].emit = emit_fcmp; - bld_base->op_actions[TGSI_OPCODE_FSGE].emit = emit_fcmp; - bld_base->op_actions[TGSI_OPCODE_FSLT].emit = emit_fcmp; - bld_base->op_actions[TGSI_OPCODE_FSNE].emit = emit_fcmp; - bld_base->op_actions[TGSI_OPCODE_IABS].emit = emit_iabs; - bld_base->op_actions[TGSI_OPCODE_IBFE].emit = build_tgsi_intrinsic_nomem; - bld_base->op_actions[TGSI_OPCODE_IBFE].intr_name = "llvm.AMDGPU.bfe.i32"; - bld_base->op_actions[TGSI_OPCODE_IDIV].emit = emit_idiv; - bld_base->op_actions[TGSI_OPCODE_IF].emit = if_emit; - bld_base->op_actions[TGSI_OPCODE_UIF].emit = uif_emit; - bld_base->op_actions[TGSI_OPCODE_IMAX].emit = emit_minmax_int; - bld_base->op_actions[TGSI_OPCODE_IMIN].emit = emit_minmax_int; - bld_base->op_actions[TGSI_OPCODE_IMSB].emit = emit_imsb; - bld_base->op_actions[TGSI_OPCODE_INEG].emit = emit_ineg; - bld_base->op_actions[TGSI_OPCODE_ISHR].emit = emit_ishr; - bld_base->op_actions[TGSI_OPCODE_ISGE].emit = emit_icmp; - bld_base->op_actions[TGSI_OPCODE_ISLT].emit = emit_icmp; - bld_base->op_actions[TGSI_OPCODE_ISSG].emit = emit_ssg; - bld_base->op_actions[TGSI_OPCODE_I2F].emit = emit_i2f; - bld_base->op_actions[TGSI_OPCODE_KILL_IF].fetch_args = kill_if_fetch_args; - bld_base->op_actions[TGSI_OPCODE_KILL_IF].emit = kil_emit; - bld_base->op_actions[TGSI_OPCODE_KILL_IF].intr_name = "llvm.AMDGPU.kill"; - bld_base->op_actions[TGSI_OPCODE_KILL].emit = lp_build_tgsi_intrinsic; - bld_base->op_actions[TGSI_OPCODE_KILL].intr_name = "llvm.AMDGPU.kilp"; - bld_base->op_actions[TGSI_OPCODE_LSB].emit = emit_lsb; - bld_base->op_actions[TGSI_OPCODE_LG2].emit = build_tgsi_intrinsic_nomem; - bld_base->op_actions[TGSI_OPCODE_LG2].intr_name = "llvm.log2.f32"; - bld_base->op_actions[TGSI_OPCODE_MOD].emit = emit_mod; - bld_base->op_actions[TGSI_OPCODE_UMSB].emit = emit_umsb; - bld_base->op_actions[TGSI_OPCODE_NOT].emit = emit_not; - bld_base->op_actions[TGSI_OPCODE_OR].emit = emit_or; - bld_base->op_actions[TGSI_OPCODE_PK2H].fetch_args = pk2h_fetch_args; - bld_base->op_actions[TGSI_OPCODE_PK2H].emit = emit_pk2h; - bld_base->op_actions[TGSI_OPCODE_POPC].emit = build_tgsi_intrinsic_nomem; - bld_base->op_actions[TGSI_OPCODE_POPC].intr_name = "llvm.ctpop.i32"; - bld_base->op_actions[TGSI_OPCODE_POW].emit = build_tgsi_intrinsic_nomem; - bld_base->op_actions[TGSI_OPCODE_POW].intr_name = "llvm.pow.f32"; - bld_base->op_actions[TGSI_OPCODE_ROUND].emit = build_tgsi_intrinsic_nomem; - bld_base->op_actions[TGSI_OPCODE_ROUND].intr_name = "llvm.rint.f32"; - bld_base->op_actions[TGSI_OPCODE_RSQ].intr_name = "llvm.AMDGPU.rsq.clamped.f32"; - bld_base->op_actions[TGSI_OPCODE_RSQ].emit = build_tgsi_intrinsic_nomem; - bld_base->op_actions[TGSI_OPCODE_SGE].emit = emit_set_cond; - bld_base->op_actions[TGSI_OPCODE_SEQ].emit = emit_set_cond; - bld_base->op_actions[TGSI_OPCODE_SHL].emit = emit_shl; - bld_base->op_actions[TGSI_OPCODE_SLE].emit = emit_set_cond; - bld_base->op_actions[TGSI_OPCODE_SLT].emit = emit_set_cond; - bld_base->op_actions[TGSI_OPCODE_SNE].emit = emit_set_cond; - bld_base->op_actions[TGSI_OPCODE_SGT].emit = emit_set_cond; - bld_base->op_actions[TGSI_OPCODE_SIN].emit = build_tgsi_intrinsic_nomem; - bld_base->op_actions[TGSI_OPCODE_SIN].intr_name = "llvm.sin.f32"; - bld_base->op_actions[TGSI_OPCODE_SQRT].emit = build_tgsi_intrinsic_nomem; - bld_base->op_actions[TGSI_OPCODE_SQRT].intr_name = "llvm.sqrt.f32"; - bld_base->op_actions[TGSI_OPCODE_SSG].emit = emit_ssg; - bld_base->op_actions[TGSI_OPCODE_TRUNC].emit = build_tgsi_intrinsic_nomem; - bld_base->op_actions[TGSI_OPCODE_TRUNC].intr_name = "llvm.trunc.f32"; - bld_base->op_actions[TGSI_OPCODE_UADD].emit = emit_uadd; - bld_base->op_actions[TGSI_OPCODE_UBFE].emit = build_tgsi_intrinsic_nomem; - bld_base->op_actions[TGSI_OPCODE_UBFE].intr_name = "llvm.AMDGPU.bfe.u32"; - bld_base->op_actions[TGSI_OPCODE_UDIV].emit = emit_udiv; - bld_base->op_actions[TGSI_OPCODE_UMAX].emit = emit_minmax_int; - bld_base->op_actions[TGSI_OPCODE_UMIN].emit = emit_minmax_int; - bld_base->op_actions[TGSI_OPCODE_UMOD].emit = emit_umod; - bld_base->op_actions[TGSI_OPCODE_USEQ].emit = emit_icmp; - bld_base->op_actions[TGSI_OPCODE_USGE].emit = emit_icmp; - bld_base->op_actions[TGSI_OPCODE_USHR].emit = emit_ushr; - bld_base->op_actions[TGSI_OPCODE_USLT].emit = emit_icmp; - bld_base->op_actions[TGSI_OPCODE_USNE].emit = emit_icmp; - bld_base->op_actions[TGSI_OPCODE_U2F].emit = emit_u2f; - bld_base->op_actions[TGSI_OPCODE_XOR].emit = emit_xor; - bld_base->op_actions[TGSI_OPCODE_UCMP].emit = emit_ucmp; - bld_base->op_actions[TGSI_OPCODE_UP2H].fetch_args = up2h_fetch_args; - bld_base->op_actions[TGSI_OPCODE_UP2H].emit = emit_up2h; -} - -void radeon_llvm_create_func(struct radeon_llvm_context * ctx, - LLVMTypeRef *return_types, unsigned num_return_elems, - LLVMTypeRef *ParamTypes, unsigned ParamCount) -{ - LLVMTypeRef main_fn_type, ret_type; - LLVMBasicBlockRef main_fn_body; - - if (num_return_elems) - ret_type = LLVMStructTypeInContext(ctx->gallivm.context, - return_types, - num_return_elems, true); - else - ret_type = LLVMVoidTypeInContext(ctx->gallivm.context); - - /* Setup the function */ - ctx->return_type = ret_type; - main_fn_type = LLVMFunctionType(ret_type, ParamTypes, ParamCount, 0); - ctx->main_fn = LLVMAddFunction(ctx->gallivm.module, "main", main_fn_type); - main_fn_body = LLVMAppendBasicBlockInContext(ctx->gallivm.context, - ctx->main_fn, "main_body"); - LLVMPositionBuilderAtEnd(ctx->gallivm.builder, main_fn_body); -} - -void radeon_llvm_finalize_module(struct radeon_llvm_context * ctx) -{ - struct gallivm_state * gallivm = ctx->soa.bld_base.base.gallivm; - const char *triple = LLVMGetTarget(gallivm->module); - LLVMTargetLibraryInfoRef target_library_info; - - /* Create the pass manager */ - gallivm->passmgr = LLVMCreateFunctionPassManagerForModule( - gallivm->module); - - target_library_info = gallivm_create_target_library_info(triple); - LLVMAddTargetLibraryInfo(target_library_info, gallivm->passmgr); - - /* This pass should eliminate all the load and store instructions */ - LLVMAddPromoteMemoryToRegisterPass(gallivm->passmgr); - - /* Add some optimization passes */ - LLVMAddScalarReplAggregatesPass(gallivm->passmgr); - LLVMAddLICMPass(gallivm->passmgr); - LLVMAddAggressiveDCEPass(gallivm->passmgr); - LLVMAddCFGSimplificationPass(gallivm->passmgr); - LLVMAddInstructionCombiningPass(gallivm->passmgr); - - /* Run the pass */ - LLVMRunFunctionPassManager(gallivm->passmgr, ctx->main_fn); - - LLVMDisposeBuilder(gallivm->builder); - LLVMDisposePassManager(gallivm->passmgr); - gallivm_dispose_target_library_info(target_library_info); -} - -void radeon_llvm_dispose(struct radeon_llvm_context * ctx) -{ - LLVMDisposeModule(ctx->soa.bld_base.base.gallivm->module); - LLVMContextDispose(ctx->soa.bld_base.base.gallivm->context); - FREE(ctx->arrays); - ctx->arrays = NULL; - FREE(ctx->temps); - ctx->temps = NULL; - ctx->temps_count = 0; - FREE(ctx->loop); - ctx->loop = NULL; - ctx->loop_depth_max = 0; - FREE(ctx->branch); - ctx->branch = NULL; - ctx->branch_depth_max = 0; -} diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/radeon_uvd.c mesa-17.0.7/src/gallium/drivers/radeon/radeon_uvd.c --- mesa-12.0.6/src/gallium/drivers/radeon/radeon_uvd.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/radeon_uvd.c 2017-06-01 10:37:10.000000000 +0000 @@ -59,8 +59,7 @@ #define FB_BUFFER_SIZE 2048 #define FB_BUFFER_SIZE_TONGA (2048 * 64) #define IT_SCALING_TABLE_SIZE 992 - -#define FW_1_66_16 ((1 << 24) | (66 << 16) | (16 << 8)) +#define UVD_SESSION_CONTEXT_SIZE (128 * 1024) /* UVD decoder representation */ struct ruvd_decoder { @@ -91,12 +90,13 @@ struct rvid_buffer dpb; bool use_legacy; struct rvid_buffer ctx; + struct rvid_buffer sessionctx; }; /* flush IB to the hardware */ -static void flush(struct ruvd_decoder *dec) +static int flush(struct ruvd_decoder *dec, unsigned flags) { - dec->ws->cs_flush(dec->cs, RADEON_FLUSH_ASYNC, NULL); + return dec->ws->cs_flush(dec->cs, flags, NULL); } /* add a new set register command to the IB */ @@ -113,7 +113,8 @@ { int reloc_idx; - reloc_idx = dec->ws->cs_add_buffer(dec->cs, buf, usage, domain, + reloc_idx = dec->ws->cs_add_buffer(dec->cs, buf, usage | RADEON_USAGE_SYNCHRONIZED, + domain, RADEON_PRIO_UVD); if (!dec->use_legacy) { uint64_t addr; @@ -122,6 +123,7 @@ set_reg(dec, RUVD_GPCOM_VCPU_DATA0, addr); set_reg(dec, RUVD_GPCOM_VCPU_DATA1, addr >> 32); } else { + off += dec->ws->buffer_get_reloc_offset(buf); set_reg(dec, RUVD_GPCOM_VCPU_DATA0, off); set_reg(dec, RUVD_GPCOM_VCPU_DATA1, reloc_idx * 4); } @@ -172,6 +174,12 @@ dec->fb = NULL; dec->it = NULL; + + if (dec->sessionctx.res) + send_cmd(dec, RUVD_CMD_SESSION_CONTEXT_BUFFER, + dec->sessionctx.res->buf, 0, RADEON_USAGE_READWRITE, + RADEON_DOMAIN_VRAM); + /* and send it to the hardware */ send_cmd(dec, RUVD_CMD_MSG_BUFFER, buf->res->buf, 0, RADEON_USAGE_READ, RADEON_DOMAIN_GTT); @@ -929,7 +937,7 @@ dec->msg->stream_handle = dec->stream_handle; send_msg_buf(dec); - flush(dec); + flush(dec, 0); dec->ws->cs_destroy(dec->cs); @@ -939,10 +947,8 @@ } rvid_destroy_buffer(&dec->dpb); - if ((u_reduce_video_profile(dec->base.profile) == PIPE_VIDEO_FORMAT_HEVC) || - (dec->stream_type == RUVD_CODEC_H264_PERF && - ((struct r600_common_screen*)dec->screen)->family >= CHIP_POLARIS10)) - rvid_destroy_buffer(&dec->ctx); + rvid_destroy_buffer(&dec->ctx); + rvid_destroy_buffer(&dec->sessionctx); FREE(dec); } @@ -1128,12 +1134,9 @@ send_cmd(dec, RUVD_CMD_DPB_BUFFER, dec->dpb.res->buf, 0, RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM); - if ((u_reduce_video_profile(picture->profile) == PIPE_VIDEO_FORMAT_HEVC) || - (dec->stream_type == RUVD_CODEC_H264_PERF && - ((struct r600_common_screen*)dec->screen)->family >= CHIP_POLARIS10)) { + if (dec->ctx.res) send_cmd(dec, RUVD_CMD_CONTEXT_BUFFER, dec->ctx.res->buf, 0, RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM); - } send_cmd(dec, RUVD_CMD_BITSTREAM_BUFFER, bs_buf->res->buf, 0, RADEON_USAGE_READ, RADEON_DOMAIN_GTT); send_cmd(dec, RUVD_CMD_DECODING_TARGET_BUFFER, dt, 0, @@ -1145,7 +1148,7 @@ FB_BUFFER_OFFSET + dec->fb_size, RADEON_USAGE_READ, RADEON_DOMAIN_GTT); set_reg(dec, RUVD_ENGINE_CNTL, 1); - flush(dec); + flush(dec, RADEON_FLUSH_ASYNC); next_buffer(dec); } @@ -1170,7 +1173,7 @@ unsigned bs_buf_size; struct radeon_info info; struct ruvd_decoder *dec; - int i; + int r, i; ws->query_info(ws, &info); @@ -1185,12 +1188,6 @@ height = align(height, VL_MACROBLOCK_HEIGHT); break; case PIPE_VIDEO_FORMAT_MPEG4_AVC: - if ((info.family == CHIP_POLARIS10 || info.family == CHIP_POLARIS11) && - info.uvd_fw_version < FW_1_66_16 ) { - RVID_ERR("POLARIS10/11 firmware version need to be updated.\n"); - return NULL; - } - width = align(width, VL_MACROBLOCK_WIDTH); height = align(height, VL_MACROBLOCK_HEIGHT); break; @@ -1206,7 +1203,7 @@ return NULL; if (info.drm_major < 3) - dec->use_legacy = TRUE; + dec->use_legacy = true; dec->base = *templ; dec->base.context = context; @@ -1233,7 +1230,7 @@ dec->fb_size = (info.family == CHIP_TONGA) ? FB_BUFFER_SIZE_TONGA : FB_BUFFER_SIZE; - bs_buf_size = width * height * 512 / (16 * 16); + bs_buf_size = width * height * (512 / (16 * 16)); for (i = 0; i < NUM_BUFFERS; ++i) { unsigned msg_fb_it_size = FB_BUFFER_OFFSET + dec->fb_size; STATIC_ASSERT(sizeof(struct ruvd_msg) <= FB_BUFFER_OFFSET); @@ -1273,6 +1270,16 @@ rvid_clear_buffer(context, &dec->ctx); } + if (info.family >= CHIP_POLARIS10 && info.drm_minor >= 3) { + if (!rvid_create_buffer(dec->screen, &dec->sessionctx, + UVD_SESSION_CONTEXT_SIZE, + PIPE_USAGE_DEFAULT)) { + RVID_ERR("Can't allocated session ctx.\n"); + goto error; + } + rvid_clear_buffer(context, &dec->sessionctx); + } + map_msg_fb_it_buf(dec); dec->msg->size = sizeof(*dec->msg); dec->msg->msg_type = RUVD_MSG_CREATE; @@ -1282,7 +1289,10 @@ dec->msg->body.create.height_in_samples = dec->base.height; dec->msg->body.create.dpb_size = dpb_size; send_msg_buf(dec); - flush(dec); + r = flush(dec, 0); + if (r) + goto error; + next_buffer(dec); return &dec->base; @@ -1296,8 +1306,8 @@ } rvid_destroy_buffer(&dec->dpb); - if (dec->stream_type == RUVD_CODEC_H264_PERF && info.family >= CHIP_POLARIS10) - rvid_destroy_buffer(&dec->ctx); + rvid_destroy_buffer(&dec->ctx); + rvid_destroy_buffer(&dec->sessionctx); FREE(dec); @@ -1343,7 +1353,7 @@ void ruvd_set_dt_surfaces(struct ruvd_msg *msg, struct radeon_surf *luma, struct radeon_surf *chroma) { - msg->body.decode.dt_pitch = luma->level[0].pitch_bytes; + msg->body.decode.dt_pitch = luma->level[0].nblk_x * luma->bpe; switch (luma->level[0].mode) { case RADEON_SURF_MODE_LINEAR_ALIGNED: msg->body.decode.dt_tiling_mode = RUVD_TILE_LINEAR; diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/radeon_uvd.h mesa-17.0.7/src/gallium/drivers/radeon/radeon_uvd.h --- mesa-12.0.6/src/gallium/drivers/radeon/radeon_uvd.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/radeon_uvd.h 2017-06-01 10:37:10.000000000 +0000 @@ -61,6 +61,7 @@ #define RUVD_CMD_DPB_BUFFER 0x00000001 #define RUVD_CMD_DECODING_TARGET_BUFFER 0x00000002 #define RUVD_CMD_FEEDBACK_BUFFER 0x00000003 +#define RUVD_CMD_SESSION_CONTEXT_BUFFER 0x00000005 #define RUVD_CMD_BITSTREAM_BUFFER 0x00000100 #define RUVD_CMD_ITSCALING_TABLE_BUFFER 0x00000204 #define RUVD_CMD_CONTEXT_BUFFER 0x00000206 diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/radeon_vce_40_2_2.c mesa-17.0.7/src/gallium/drivers/radeon/radeon_vce_40_2_2.c --- mesa-12.0.6/src/gallium/drivers/radeon/radeon_vce_40_2_2.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/radeon_vce_40_2_2.c 2017-06-01 10:37:10.000000000 +0000 @@ -59,11 +59,11 @@ RVCE_BEGIN(0x00000002); // task info if (op == 0x3) { if (enc->task_info_idx) { - uint32_t offs = enc->cs->cdw - enc->task_info_idx + 3; + uint32_t offs = enc->cs->current.cdw - enc->task_info_idx + 3; // Update offsetOfNextTaskInfo - enc->cs->buf[enc->task_info_idx] = offs; + enc->cs->current.buf[enc->task_info_idx] = offs; } - enc->task_info_idx = enc->cs->cdw; + enc->task_info_idx = enc->cs->current.cdw; } RVCE_CS(0xffffffff); // offsetOfNextTaskInfo RVCE_CS(op); // taskOperation @@ -94,9 +94,9 @@ RVCE_CS(0x00000000); // encPicStructRestriction RVCE_CS(enc->base.width); // encImageWidth RVCE_CS(enc->base.height); // encImageHeight - RVCE_CS(enc->luma->level[0].pitch_bytes); // encRefPicLumaPitch - RVCE_CS(enc->chroma->level[0].pitch_bytes); // encRefPicChromaPitch - RVCE_CS(align(enc->luma->npix_y, 16) / 8); // encRefYHeightInQw + RVCE_CS(enc->luma->level[0].nblk_x * enc->luma->bpe); // encRefPicLumaPitch + RVCE_CS(enc->chroma->level[0].nblk_x * enc->chroma->bpe); // encRefPicChromaPitch + RVCE_CS(align(enc->luma->level[0].nblk_y, 16) / 8); // encRefYHeightInQw RVCE_CS(0x00000000); // encRefPic(Addr|Array)Mode, encPicStructRestriction, disableRDO RVCE_END(); } @@ -323,9 +323,9 @@ enc->luma->level[0].offset); // inputPictureLumaAddressHi/Lo RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM, enc->chroma->level[0].offset); // inputPictureChromaAddressHi/Lo - RVCE_CS(align(enc->luma->npix_y, 16)); // encInputFrameYPitch - RVCE_CS(enc->luma->level[0].pitch_bytes); // encInputPicLumaPitch - RVCE_CS(enc->chroma->level[0].pitch_bytes); // encInputPicChromaPitch + RVCE_CS(align(enc->luma->level[0].nblk_y, 16)); // encInputFrameYPitch + RVCE_CS(enc->luma->level[0].nblk_x * enc->luma->bpe); // encInputPicLumaPitch + RVCE_CS(enc->chroma->level[0].nblk_x * enc->chroma->bpe); // encInputPicChromaPitch RVCE_CS(0x00000000); // encInputPic(Addr|Array)Mode RVCE_CS(0x00000000); // encInputPicTileConfig RVCE_CS(enc->pic.picture_type); // encPicType @@ -431,6 +431,10 @@ RVCE_END(); } +void radeon_vce_40_2_2_get_param(struct rvce_encoder *enc, struct pipe_h264_enc_picture_desc *pic) +{ +} + void radeon_vce_40_2_2_init(struct rvce_encoder *enc) { enc->session = session; diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/radeon_vce_50.c mesa-17.0.7/src/gallium/drivers/radeon/radeon_vce_50.c --- mesa-12.0.6/src/gallium/drivers/radeon/radeon_vce_50.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/radeon_vce_50.c 2017-06-01 10:37:10.000000000 +0000 @@ -130,9 +130,9 @@ enc->luma->level[0].offset); // inputPictureLumaAddressHi/Lo RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM, enc->chroma->level[0].offset); // inputPictureChromaAddressHi/Lo - RVCE_CS(align(enc->luma->npix_y, 16)); // encInputFrameYPitch - RVCE_CS(enc->luma->level[0].pitch_bytes); // encInputPicLumaPitch - RVCE_CS(enc->chroma->level[0].pitch_bytes); // encInputPicChromaPitch + RVCE_CS(align(enc->luma->level[0].nblk_y, 16)); // encInputFrameYPitch + RVCE_CS(enc->luma->level[0].nblk_x * enc->luma->bpe); // encInputPicLumaPitch + RVCE_CS(enc->chroma->level[0].nblk_x * enc->chroma->bpe); // encInputPicChromaPitch if (enc->dual_pipe) RVCE_CS(0x00000000); // encInputPic(Addr|Array)Mode,encDisable(TwoPipeMode|MBOffloading) else @@ -233,6 +233,10 @@ RVCE_END(); } +void radeon_vce_50_get_param(struct rvce_encoder *enc, struct pipe_h264_enc_picture_desc *pic) +{ +} + void radeon_vce_50_init(struct rvce_encoder *enc) { radeon_vce_40_2_2_init(enc); diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/radeon_vce_52.c mesa-17.0.7/src/gallium/drivers/radeon/radeon_vce_52.c --- mesa-12.0.6/src/gallium/drivers/radeon/radeon_vce_52.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/radeon_vce_52.c 2017-06-01 10:37:10.000000000 +0000 @@ -40,27 +40,152 @@ static const unsigned profiles[7] = { 66, 77, 88, 100, 110, 122, 244 }; +static void get_rate_control_param(struct rvce_encoder *enc, struct pipe_h264_enc_picture_desc *pic) +{ + enc->enc_pic.rc.rc_method = pic->rate_ctrl.rate_ctrl_method; + enc->enc_pic.rc.target_bitrate = pic->rate_ctrl.target_bitrate; + enc->enc_pic.rc.peak_bitrate = pic->rate_ctrl.peak_bitrate; + enc->enc_pic.rc.quant_i_frames = pic->quant_i_frames; + enc->enc_pic.rc.quant_p_frames = pic->quant_p_frames; + enc->enc_pic.rc.quant_b_frames = pic->quant_b_frames; + enc->enc_pic.rc.gop_size = pic->gop_size; + enc->enc_pic.rc.frame_rate_num = pic->rate_ctrl.frame_rate_num; + enc->enc_pic.rc.frame_rate_den = pic->rate_ctrl.frame_rate_den; + enc->enc_pic.rc.max_qp = 51; + enc->enc_pic.rc.vbv_buffer_size = pic->rate_ctrl.vbv_buffer_size; + enc->enc_pic.rc.vbv_buf_lv = pic->rate_ctrl.vbv_buf_lv; + enc->enc_pic.rc.fill_data_enable = pic->rate_ctrl.fill_data_enable; + enc->enc_pic.rc.enforce_hrd = pic->rate_ctrl.enforce_hrd; + enc->enc_pic.rc.target_bits_picture = pic->rate_ctrl.target_bits_picture; + enc->enc_pic.rc.peak_bits_picture_integer = pic->rate_ctrl.peak_bits_picture_integer; + enc->enc_pic.rc.peak_bits_picture_fraction = pic->rate_ctrl.peak_bits_picture_fraction; +} + +static void get_motion_estimation_param(struct rvce_encoder *enc, struct pipe_h264_enc_picture_desc *pic) +{ + enc->enc_pic.me.motion_est_quarter_pixel = pic->motion_est.motion_est_quarter_pixel; + enc->enc_pic.me.enc_disable_sub_mode = pic->motion_est.enc_disable_sub_mode; + enc->enc_pic.me.lsmvert = pic->motion_est.lsmvert; + enc->enc_pic.me.enc_en_ime_overw_dis_subm = pic->motion_est.enc_en_ime_overw_dis_subm; + enc->enc_pic.me.enc_ime_overw_dis_subm_no = pic->motion_est.enc_ime_overw_dis_subm_no; + enc->enc_pic.me.enc_ime2_search_range_x = pic->motion_est.enc_ime2_search_range_x; + enc->enc_pic.me.enc_ime2_search_range_y = pic->motion_est.enc_ime2_search_range_y; + enc->enc_pic.me.enc_ime_decimation_search = 0x00000001; + enc->enc_pic.me.motion_est_half_pixel = 0x00000001; + enc->enc_pic.me.enc_search_range_x = 0x00000010; + enc->enc_pic.me.enc_search_range_y = 0x00000010; + enc->enc_pic.me.enc_search1_range_x = 0x00000010; + enc->enc_pic.me.enc_search1_range_y = 0x00000010; +} + +static void get_pic_control_param(struct rvce_encoder *enc, struct pipe_h264_enc_picture_desc *pic) +{ + unsigned encNumMBsPerSlice; + encNumMBsPerSlice = align(enc->base.width, 16) / 16; + encNumMBsPerSlice *= align(enc->base.height, 16) / 16; + enc->enc_pic.pc.enc_crop_right_offset = (align(enc->base.width, 16) - enc->base.width) >> 1; + enc->enc_pic.pc.enc_crop_bottom_offset = (align(enc->base.height, 16) - enc->base.height) >> 1; + enc->enc_pic.pc.enc_num_mbs_per_slice = encNumMBsPerSlice; + enc->enc_pic.pc.enc_b_pic_pattern = MAX2(enc->base.max_references, 1) - 1; + enc->enc_pic.pc.enc_number_of_reference_frames = MIN2(enc->base.max_references, 2); + enc->enc_pic.pc.enc_max_num_ref_frames = enc->base.max_references + 1; + enc->enc_pic.pc.enc_num_default_active_ref_l0 = 0x00000001; + enc->enc_pic.pc.enc_num_default_active_ref_l1 = 0x00000001; + enc->enc_pic.pc.enc_cabac_enable = pic->pic_ctrl.enc_cabac_enable; + enc->enc_pic.pc.enc_constraint_set_flags = pic->pic_ctrl.enc_constraint_set_flags; + enc->enc_pic.pc.enc_num_default_active_ref_l0 = 0x00000001; + enc->enc_pic.pc.enc_num_default_active_ref_l1 = 0x00000001; +} + +static void get_task_info_param(struct rvce_encoder *enc) +{ + enc->enc_pic.ti.offset_of_next_task_info = 0xffffffff; +} + +static void get_feedback_buffer_param(struct rvce_encoder *enc) +{ + enc->enc_pic.fb.feedback_ring_size = 0x00000001; +} + +static void get_config_ext_param(struct rvce_encoder *enc) +{ + enc->enc_pic.ce.enc_enable_perf_logging = 0x00000003; +} + +static void get_vui_param(struct rvce_encoder *enc, struct pipe_h264_enc_picture_desc *pic) +{ + enc->enc_pic.enable_vui = pic->enable_vui; + enc->enc_pic.vui.video_format = 0x00000005; + enc->enc_pic.vui.color_prim = 0x00000002; + enc->enc_pic.vui.transfer_char = 0x00000002; + enc->enc_pic.vui.matrix_coef = 0x00000002; + enc->enc_pic.vui.timing_info_present_flag = 0x00000001; + enc->enc_pic.vui.num_units_in_tick = pic->rate_ctrl.frame_rate_den; + enc->enc_pic.vui.time_scale = pic->rate_ctrl.frame_rate_num * 2; + enc->enc_pic.vui.fixed_frame_rate_flag = 0x00000001; + enc->enc_pic.vui.bit_rate_scale = 0x00000004; + enc->enc_pic.vui.cpb_size_scale = 0x00000006; + enc->enc_pic.vui.initial_cpb_removal_delay_length_minus1 = 0x00000017; + enc->enc_pic.vui.cpb_removal_delay_length_minus1 = 0x00000017; + enc->enc_pic.vui.dpb_output_delay_length_minus1 = 0x00000017; + enc->enc_pic.vui.time_offset_length = 0x00000018; + enc->enc_pic.vui.motion_vectors_over_pic_boundaries_flag = 0x00000001; + enc->enc_pic.vui.max_bytes_per_pic_denom = 0x00000002; + enc->enc_pic.vui.max_bits_per_mb_denom = 0x00000001; + enc->enc_pic.vui.log2_max_mv_length_hori = 0x00000010; + enc->enc_pic.vui.log2_max_mv_length_vert = 0x00000010; + enc->enc_pic.vui.num_reorder_frames = 0x00000003; + enc->enc_pic.vui.max_dec_frame_buffering = 0x00000003; +} + +void radeon_vce_52_get_param(struct rvce_encoder *enc, struct pipe_h264_enc_picture_desc *pic) +{ + get_rate_control_param(enc, pic); + get_motion_estimation_param(enc, pic); + get_pic_control_param(enc, pic); + get_task_info_param(enc); + get_feedback_buffer_param(enc); + get_vui_param(enc, pic); + get_config_ext_param(enc); + + enc->enc_pic.picture_type = pic->picture_type; + enc->enc_pic.frame_num = pic->frame_num; + enc->enc_pic.frame_num_cnt = pic->frame_num_cnt; + enc->enc_pic.p_remain = pic->p_remain; + enc->enc_pic.i_remain = pic->i_remain; + enc->enc_pic.gop_cnt = pic->gop_cnt; + enc->enc_pic.pic_order_cnt = pic->pic_order_cnt; + enc->enc_pic.ref_idx_l0 = pic->ref_idx_l0; + enc->enc_pic.ref_idx_l1 = pic->ref_idx_l1; + enc->enc_pic.not_referenced = pic->not_referenced; + if (enc->dual_inst) + enc->enc_pic.addrmode_arraymode_disrdo_distwoinstants = 0x00000201; + else + enc->enc_pic.addrmode_arraymode_disrdo_distwoinstants = 0x01000201; + enc->enc_pic.is_idr = pic->is_idr; +} + static void create(struct rvce_encoder *enc) { enc->task_info(enc, 0x00000000, 0, 0, 0); RVCE_BEGIN(0x01000001); // create cmd - RVCE_CS(0x00000000); // encUseCircularBuffer + RVCE_CS(enc->enc_pic.ec.enc_use_circular_buffer); RVCE_CS(profiles[enc->base.profile - PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE]); // encProfile RVCE_CS(enc->base.level); // encLevel - RVCE_CS(0x00000000); // encPicStructRestriction + RVCE_CS(enc->enc_pic.ec.enc_pic_struct_restriction); RVCE_CS(enc->base.width); // encImageWidth RVCE_CS(enc->base.height); // encImageHeight - RVCE_CS(enc->luma->level[0].pitch_bytes); // encRefPicLumaPitch - RVCE_CS(enc->chroma->level[0].pitch_bytes); // encRefPicChromaPitch - RVCE_CS(align(enc->luma->npix_y, 16) / 8); // encRefYHeightInQw - RVCE_CS(0x00000000); // encRefPic(Addr|Array)Mode, encPicStructRestriction, disableRDO - - RVCE_CS(0x00000000); // encPreEncodeContextBufferOffset - RVCE_CS(0x00000000); // encPreEncodeInputLumaBufferOffset - RVCE_CS(0x00000000); // encPreEncodeInputChromaBufferOffs - RVCE_CS(0x00000000); // encPreEncodeMode|ChromaFlag|VBAQMode|SceneChangeSensitivity + RVCE_CS(enc->luma->level[0].nblk_x * enc->luma->bpe); // encRefPicLumaPitch + RVCE_CS(enc->chroma->level[0].nblk_x * enc->chroma->bpe); // encRefPicChromaPitch + RVCE_CS(align(enc->luma->level[0].nblk_y, 16) / 8); // encRefYHeightInQw + RVCE_CS(enc->enc_pic.addrmode_arraymode_disrdo_distwoinstants); + + RVCE_CS(enc->enc_pic.ec.enc_pre_encode_context_buffer_offset); + RVCE_CS(enc->enc_pic.ec.enc_pre_encode_input_luma_buffer_offset); + RVCE_CS(enc->enc_pic.ec.enc_pre_encode_input_chroma_buffer_offset); + RVCE_CS(enc->enc_pic.ec.enc_pre_encode_mode_chromaflag_vbaqmode_scenechangesensitivity); RVCE_END(); } @@ -73,7 +198,7 @@ if (enc->dual_inst) { if (bs_idx == 0) dep = 1; - else if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR) + else if (enc->enc_pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR) dep = 0; else dep = 2; @@ -107,136 +232,411 @@ } RVCE_BEGIN(0x03000001); // encode - RVCE_CS(enc->pic.frame_num ? 0x0 : 0x11); // insertHeaders - RVCE_CS(0x00000000); // pictureStructure + RVCE_CS(enc->enc_pic.frame_num ? 0x0 : 0x11); // insertHeaders + RVCE_CS(enc->enc_pic.eo.picture_structure); RVCE_CS(enc->bs_size); // allowedMaxBitstreamSize - RVCE_CS(0x00000000); // forceRefreshMap - RVCE_CS(0x00000000); // insertAUD - RVCE_CS(0x00000000); // endOfSequence - RVCE_CS(0x00000000); // endOfStream + RVCE_CS(enc->enc_pic.eo.force_refresh_map); + RVCE_CS(enc->enc_pic.eo.insert_aud); + RVCE_CS(enc->enc_pic.eo.end_of_sequence); + RVCE_CS(enc->enc_pic.eo.end_of_stream); RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM, enc->luma->level[0].offset); // inputPictureLumaAddressHi/Lo RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM, enc->chroma->level[0].offset); // inputPictureChromaAddressHi/Lo - RVCE_CS(align(enc->luma->npix_y, 16)); // encInputFrameYPitch - RVCE_CS(enc->luma->level[0].pitch_bytes); // encInputPicLumaPitch - RVCE_CS(enc->chroma->level[0].pitch_bytes); // encInputPicChromaPitch + RVCE_CS(align(enc->luma->level[0].nblk_y, 16)); // encInputFrameYPitch + RVCE_CS(enc->luma->level[0].nblk_x * enc->luma->bpe); // encInputPicLumaPitch + RVCE_CS(enc->chroma->level[0].nblk_x * enc->chroma->bpe); // encInputPicChromaPitch if (enc->dual_pipe) - RVCE_CS(0x00000000); // encInputPic(Addr|Array)Mode,encDisable(TwoPipeMode|MBOffloading) + enc->enc_pic.eo.enc_input_pic_addr_array_disable2pipe_disablemboffload = 0x00000000; + else + enc->enc_pic.eo.enc_input_pic_addr_array_disable2pipe_disablemboffload = 0x00010000; + RVCE_CS(enc->enc_pic.eo.enc_input_pic_addr_array_disable2pipe_disablemboffload); + RVCE_CS(enc->enc_pic.eo.enc_input_pic_tile_config); + RVCE_CS(enc->enc_pic.picture_type); // encPicType + RVCE_CS(enc->enc_pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR); // encIdrFlag + if ((enc->enc_pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR) && (enc->enc_pic.eo.enc_idr_pic_id !=0)) + enc->enc_pic.eo.enc_idr_pic_id = enc->enc_pic.idr_pic_id - 1; else - RVCE_CS(0x00010000); // encInputPic(Addr|Array)Mode,encDisable(TwoPipeMode|MBOffloading) - RVCE_CS(0x00000000); // encInputPicTileConfig - RVCE_CS(enc->pic.picture_type); // encPicType - RVCE_CS(enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR); // encIdrFlag - RVCE_CS(0x00000000); // encIdrPicId - RVCE_CS(0x00000000); // encMGSKeyPic - RVCE_CS(!enc->pic.not_referenced); // encReferenceFlag - RVCE_CS(0x00000000); // encTemporalLayerIndex - RVCE_CS(0x00000000); // num_ref_idx_active_override_flag - RVCE_CS(0x00000000); // num_ref_idx_l0_active_minus1 - RVCE_CS(0x00000000); // num_ref_idx_l1_active_minus1 - - i = enc->pic.frame_num - enc->pic.ref_idx_l0; - if (i > 1 && enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P) { - RVCE_CS(0x00000001); // encRefListModificationOp - RVCE_CS(i - 1); // encRefListModificationNum + enc->enc_pic.eo.enc_idr_pic_id = 0x00000000; + RVCE_CS(enc->enc_pic.eo.enc_idr_pic_id); + RVCE_CS(enc->enc_pic.eo.enc_mgs_key_pic); + RVCE_CS(!enc->enc_pic.not_referenced); + RVCE_CS(enc->enc_pic.eo.enc_temporal_layer_index); + RVCE_CS(enc->enc_pic.eo.num_ref_idx_active_override_flag); + RVCE_CS(enc->enc_pic.eo.num_ref_idx_l0_active_minus1); + RVCE_CS(enc->enc_pic.eo.num_ref_idx_l1_active_minus1); + + i = enc->enc_pic.frame_num - enc->enc_pic.ref_idx_l0; + if (i > 1 && enc->enc_pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P) { + enc->enc_pic.eo.enc_ref_list_modification_op = 0x00000001; + enc->enc_pic.eo.enc_ref_list_modification_num = i - 1; + RVCE_CS(enc->enc_pic.eo.enc_ref_list_modification_op); + RVCE_CS(enc->enc_pic.eo.enc_ref_list_modification_num); } else { - RVCE_CS(0x00000000); // encRefListModificationOp - RVCE_CS(0x00000000); // encRefListModificationNum + enc->enc_pic.eo.enc_ref_list_modification_op = 0x00000000; + enc->enc_pic.eo.enc_ref_list_modification_num = 0x00000000; + RVCE_CS(enc->enc_pic.eo.enc_ref_list_modification_op); + RVCE_CS(enc->enc_pic.eo.enc_ref_list_modification_num); } for (i = 0; i < 3; ++i) { - RVCE_CS(0x00000000); // encRefListModificationOp - RVCE_CS(0x00000000); // encRefListModificationNum + enc->enc_pic.eo.enc_ref_list_modification_op = 0x00000000; + enc->enc_pic.eo.enc_ref_list_modification_num = 0x00000000; + RVCE_CS(enc->enc_pic.eo.enc_ref_list_modification_op); + RVCE_CS(enc->enc_pic.eo.enc_ref_list_modification_num); } for (i = 0; i < 4; ++i) { - RVCE_CS(0x00000000); // encDecodedPictureMarkingOp - RVCE_CS(0x00000000); // encDecodedPictureMarkingNum - RVCE_CS(0x00000000); // encDecodedPictureMarkingIdx - RVCE_CS(0x00000000); // encDecodedRefBasePictureMarkingOp - RVCE_CS(0x00000000); // encDecodedRefBasePictureMarkingNum + RVCE_CS(enc->enc_pic.eo.enc_decoded_picture_marking_op); + RVCE_CS(enc->enc_pic.eo.enc_decoded_picture_marking_num); + RVCE_CS(enc->enc_pic.eo.enc_decoded_picture_marking_idx); + RVCE_CS(enc->enc_pic.eo.enc_decoded_ref_base_picture_marking_op); + RVCE_CS(enc->enc_pic.eo.enc_decoded_ref_base_picture_marking_num); } // encReferencePictureL0[0] RVCE_CS(0x00000000); // pictureStructure - if(enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P || - enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B) { + if(enc->enc_pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P || + enc->enc_pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B) { struct rvce_cpb_slot *l0 = l0_slot(enc); rvce_frame_offset(enc, l0, &luma_offset, &chroma_offset); - RVCE_CS(l0->picture_type); // encPicType - RVCE_CS(l0->frame_num); // frameNumber - RVCE_CS(l0->pic_order_cnt); // pictureOrderCount - RVCE_CS(luma_offset); // lumaOffset - RVCE_CS(chroma_offset); // chromaOffset + RVCE_CS(l0->picture_type); + RVCE_CS(l0->frame_num); + RVCE_CS(l0->pic_order_cnt); + RVCE_CS(luma_offset); + RVCE_CS(chroma_offset); } else { - RVCE_CS(0x00000000); // encPicType - RVCE_CS(0x00000000); // frameNumber - RVCE_CS(0x00000000); // pictureOrderCount - RVCE_CS(0xffffffff); // lumaOffset - RVCE_CS(0xffffffff); // chromaOffset + enc->enc_pic.eo.l0_enc_pic_type = 0x00000000; + enc->enc_pic.eo.l0_frame_number = 0x00000000; + enc->enc_pic.eo.l0_picture_order_count = 0x00000000; + enc->enc_pic.eo.l0_luma_offset = 0xffffffff; + enc->enc_pic.eo.l0_chroma_offset = 0xffffffff; + RVCE_CS(enc->enc_pic.eo.l0_enc_pic_type); + RVCE_CS(enc->enc_pic.eo.l0_frame_number); + RVCE_CS(enc->enc_pic.eo.l0_picture_order_count); + RVCE_CS(enc->enc_pic.eo.l0_luma_offset); + RVCE_CS(enc->enc_pic.eo.l0_chroma_offset); } // encReferencePictureL0[1] - RVCE_CS(0x00000000); // pictureStructure - RVCE_CS(0x00000000); // encPicType - RVCE_CS(0x00000000); // frameNumber - RVCE_CS(0x00000000); // pictureOrderCount - RVCE_CS(0xffffffff); // lumaOffset - RVCE_CS(0xffffffff); // chromaOffset + enc->enc_pic.eo.l0_picture_structure = 0x00000000; + enc->enc_pic.eo.l0_enc_pic_type = 0x00000000; + enc->enc_pic.eo.l0_frame_number = 0x00000000; + enc->enc_pic.eo.l0_picture_order_count = 0x00000000; + enc->enc_pic.eo.l0_luma_offset = 0xffffffff; + enc->enc_pic.eo.l0_chroma_offset = 0xffffffff; + RVCE_CS(enc->enc_pic.eo.l0_picture_structure); + RVCE_CS(enc->enc_pic.eo.l0_enc_pic_type); + RVCE_CS(enc->enc_pic.eo.l0_frame_number); + RVCE_CS(enc->enc_pic.eo.l0_picture_order_count); + RVCE_CS(enc->enc_pic.eo.l0_luma_offset); + RVCE_CS(enc->enc_pic.eo.l0_chroma_offset); // encReferencePictureL1[0] RVCE_CS(0x00000000); // pictureStructure - if(enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B) { + if(enc->enc_pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B) { struct rvce_cpb_slot *l1 = l1_slot(enc); rvce_frame_offset(enc, l1, &luma_offset, &chroma_offset); - RVCE_CS(l1->picture_type); // encPicType - RVCE_CS(l1->frame_num); // frameNumber - RVCE_CS(l1->pic_order_cnt); // pictureOrderCount - RVCE_CS(luma_offset); // lumaOffset - RVCE_CS(chroma_offset); // chromaOffset + RVCE_CS(l1->picture_type); + RVCE_CS(l1->frame_num); + RVCE_CS(l1->pic_order_cnt); + RVCE_CS(luma_offset); + RVCE_CS(chroma_offset); } else { - RVCE_CS(0x00000000); // encPicType - RVCE_CS(0x00000000); // frameNumber - RVCE_CS(0x00000000); // pictureOrderCount - RVCE_CS(0xffffffff); // lumaOffset - RVCE_CS(0xffffffff); // chromaOffset + enc->enc_pic.eo.l1_enc_pic_type = 0x00000000; + enc->enc_pic.eo.l1_frame_number = 0x00000000; + enc->enc_pic.eo.l1_picture_order_count = 0x00000000; + enc->enc_pic.eo.l1_luma_offset = 0xffffffff; + enc->enc_pic.eo.l1_chroma_offset = 0xffffffff; + RVCE_CS(enc->enc_pic.eo.l1_enc_pic_type); + RVCE_CS(enc->enc_pic.eo.l1_frame_number); + RVCE_CS(enc->enc_pic.eo.l1_picture_order_count); + RVCE_CS(enc->enc_pic.eo.l1_luma_offset); + RVCE_CS(enc->enc_pic.eo.l1_chroma_offset); } rvce_frame_offset(enc, current_slot(enc), &luma_offset, &chroma_offset); - RVCE_CS(luma_offset); // encReconstructedLumaOffset - RVCE_CS(chroma_offset); // encReconstructedChromaOffset - RVCE_CS(0x00000000); // encColocBufferOffset - RVCE_CS(0x00000000); // encReconstructedRefBasePictureLumaOffset - RVCE_CS(0x00000000); // encReconstructedRefBasePictureChromaOffset - RVCE_CS(0x00000000); // encReferenceRefBasePictureLumaOffset - RVCE_CS(0x00000000); // encReferenceRefBasePictureChromaOffset - RVCE_CS(0x00000000); // pictureCount - RVCE_CS(enc->pic.frame_num); // frameNumber - RVCE_CS(enc->pic.pic_order_cnt); // pictureOrderCount - RVCE_CS(0x00000000); // numIPicRemainInRCGOP - RVCE_CS(0x00000000); // numPPicRemainInRCGOP - RVCE_CS(0x00000000); // numBPicRemainInRCGOP - RVCE_CS(0x00000000); // numIRPicRemainInRCGOP - RVCE_CS(0x00000000); // enableIntraRefresh - - RVCE_CS(0x00000000); // aq_variance_en - RVCE_CS(0x00000000); // aq_block_size - RVCE_CS(0x00000000); // aq_mb_variance_sel - RVCE_CS(0x00000000); // aq_frame_variance_sel - RVCE_CS(0x00000000); // aq_param_a - RVCE_CS(0x00000000); // aq_param_b - RVCE_CS(0x00000000); // aq_param_c - RVCE_CS(0x00000000); // aq_param_d - RVCE_CS(0x00000000); // aq_param_e + RVCE_CS(luma_offset); + RVCE_CS(chroma_offset); + RVCE_CS(enc->enc_pic.eo.enc_coloc_buffer_offset); + RVCE_CS(enc->enc_pic.eo.enc_reconstructed_ref_base_picture_luma_offset); + RVCE_CS(enc->enc_pic.eo.enc_reconstructed_ref_base_picture_chroma_offset); + RVCE_CS(enc->enc_pic.eo.enc_reference_ref_base_picture_luma_offset); + RVCE_CS(enc->enc_pic.eo.enc_reference_ref_base_picture_chroma_offset); + RVCE_CS(enc->enc_pic.frame_num_cnt-1); + RVCE_CS(enc->enc_pic.frame_num); + RVCE_CS(enc->enc_pic.pic_order_cnt); + RVCE_CS(enc->enc_pic.i_remain); + RVCE_CS(enc->enc_pic.p_remain); + RVCE_CS(enc->enc_pic.eo.num_b_pic_remain_in_rcgop); + RVCE_CS(enc->enc_pic.eo.num_ir_pic_remain_in_rcgop); + RVCE_CS(enc->enc_pic.eo.enable_intra_refresh); + + RVCE_CS(enc->enc_pic.eo.aq_variance_en); + RVCE_CS(enc->enc_pic.eo.aq_block_size); + RVCE_CS(enc->enc_pic.eo.aq_mb_variance_sel); + RVCE_CS(enc->enc_pic.eo.aq_frame_variance_sel); + RVCE_CS(enc->enc_pic.eo.aq_param_a); + RVCE_CS(enc->enc_pic.eo.aq_param_b); + RVCE_CS(enc->enc_pic.eo.aq_param_c); + RVCE_CS(enc->enc_pic.eo.aq_param_d); + RVCE_CS(enc->enc_pic.eo.aq_param_e); - RVCE_CS(0x00000000); // contextInSFB + RVCE_CS(enc->enc_pic.eo.context_in_sfb); RVCE_END(); } -void radeon_vce_52_init(struct rvce_encoder *enc) +static void rate_control(struct rvce_encoder *enc) +{ + RVCE_BEGIN(0x04000005); // rate control + RVCE_CS(enc->enc_pic.rc.rc_method); + RVCE_CS(enc->enc_pic.rc.target_bitrate); + RVCE_CS(enc->enc_pic.rc.peak_bitrate); + RVCE_CS(enc->enc_pic.rc.frame_rate_num); + RVCE_CS(enc->enc_pic.rc.gop_size); + RVCE_CS(enc->enc_pic.rc.quant_i_frames); + RVCE_CS(enc->enc_pic.rc.quant_p_frames); + RVCE_CS(enc->enc_pic.rc.quant_b_frames); + RVCE_CS(enc->enc_pic.rc.vbv_buffer_size); + RVCE_CS(enc->enc_pic.rc.frame_rate_den); + RVCE_CS(enc->enc_pic.rc.vbv_buf_lv); + RVCE_CS(enc->enc_pic.rc.max_au_size); + RVCE_CS(enc->enc_pic.rc.qp_initial_mode); + RVCE_CS(enc->enc_pic.rc.target_bits_picture); + RVCE_CS(enc->enc_pic.rc.peak_bits_picture_integer); + RVCE_CS(enc->enc_pic.rc.peak_bits_picture_fraction); + RVCE_CS(enc->enc_pic.rc.min_qp); + RVCE_CS(enc->enc_pic.rc.max_qp); + RVCE_CS(enc->enc_pic.rc.skip_frame_enable); + RVCE_CS(enc->enc_pic.rc.fill_data_enable); + RVCE_CS(enc->enc_pic.rc.enforce_hrd); + RVCE_CS(enc->enc_pic.rc.b_pics_delta_qp); + RVCE_CS(enc->enc_pic.rc.ref_b_pics_delta_qp); + RVCE_CS(enc->enc_pic.rc.rc_reinit_disable); + RVCE_CS(enc->enc_pic.rc.enc_lcvbr_init_qp_flag); + RVCE_CS(enc->enc_pic.rc.lcvbrsatd_based_nonlinear_bit_budget_flag); + RVCE_END(); +} + +static void config(struct rvce_encoder *enc) +{ + enc->task_info(enc, 0x00000002, 0, 0xffffffff, 0); + enc->rate_control(enc); + enc->config_extension(enc); + enc->motion_estimation(enc); + enc->rdo(enc); + if (enc->use_vui) + enc->vui(enc); + enc->pic_control(enc); +} + +static void config_extension(struct rvce_encoder *enc) +{ + RVCE_BEGIN(0x04000001); // config extension + RVCE_CS(enc->enc_pic.ce.enc_enable_perf_logging); + RVCE_END(); +} + +static void destroy(struct rvce_encoder *enc) { - radeon_vce_50_init(enc); + enc->task_info(enc, 0x00000001, 0, 0, 0); + RVCE_BEGIN(0x02000001); // destroy + RVCE_END(); +} + +static void feedback(struct rvce_encoder *enc) +{ + RVCE_BEGIN(0x05000005); // feedback buffer + RVCE_WRITE(enc->fb->res->buf, enc->fb->res->domains, 0x0); // feedbackRingAddressHi/Lo + RVCE_CS(enc->enc_pic.fb.feedback_ring_size); + RVCE_END(); +} + +static void motion_estimation(struct rvce_encoder *enc) +{ + RVCE_BEGIN(0x04000007); // motion estimation + RVCE_CS(enc->enc_pic.me.enc_ime_decimation_search); + RVCE_CS(enc->enc_pic.me.motion_est_half_pixel); + RVCE_CS(enc->enc_pic.me.motion_est_quarter_pixel); + RVCE_CS(enc->enc_pic.me.disable_favor_pmv_point); + RVCE_CS(enc->enc_pic.me.force_zero_point_center); + RVCE_CS(enc->enc_pic.me.lsmvert); + RVCE_CS(enc->enc_pic.me.enc_search_range_x); + RVCE_CS(enc->enc_pic.me.enc_search_range_y); + RVCE_CS(enc->enc_pic.me.enc_search1_range_x); + RVCE_CS(enc->enc_pic.me.enc_search1_range_y); + RVCE_CS(enc->enc_pic.me.disable_16x16_frame1); + RVCE_CS(enc->enc_pic.me.disable_satd); + RVCE_CS(enc->enc_pic.me.enable_amd); + RVCE_CS(enc->enc_pic.me.enc_disable_sub_mode); + RVCE_CS(enc->enc_pic.me.enc_ime_skip_x); + RVCE_CS(enc->enc_pic.me.enc_ime_skip_y); + RVCE_CS(enc->enc_pic.me.enc_en_ime_overw_dis_subm); + RVCE_CS(enc->enc_pic.me.enc_ime_overw_dis_subm_no); + RVCE_CS(enc->enc_pic.me.enc_ime2_search_range_x); + RVCE_CS(enc->enc_pic.me.enc_ime2_search_range_y); + RVCE_CS(enc->enc_pic.me.parallel_mode_speedup_enable); + RVCE_CS(enc->enc_pic.me.fme0_enc_disable_sub_mode); + RVCE_CS(enc->enc_pic.me.fme1_enc_disable_sub_mode); + RVCE_CS(enc->enc_pic.me.ime_sw_speedup_enable); + RVCE_END(); +} + +static void pic_control(struct rvce_encoder *enc) +{ + RVCE_BEGIN(0x04000002); // pic control + RVCE_CS(enc->enc_pic.pc.enc_use_constrained_intra_pred); + RVCE_CS(enc->enc_pic.pc.enc_cabac_enable); + RVCE_CS(enc->enc_pic.pc.enc_cabac_idc); + RVCE_CS(enc->enc_pic.pc.enc_loop_filter_disable); + RVCE_CS(enc->enc_pic.pc.enc_lf_beta_offset); + RVCE_CS(enc->enc_pic.pc.enc_lf_alpha_c0_offset); + RVCE_CS(enc->enc_pic.pc.enc_crop_left_offset); + RVCE_CS(enc->enc_pic.pc.enc_crop_right_offset); + RVCE_CS(enc->enc_pic.pc.enc_crop_top_offset); + RVCE_CS(enc->enc_pic.pc.enc_crop_bottom_offset); + RVCE_CS(enc->enc_pic.pc.enc_num_mbs_per_slice); + RVCE_CS(enc->enc_pic.pc.enc_intra_refresh_num_mbs_per_slot); + RVCE_CS(enc->enc_pic.pc.enc_force_intra_refresh); + RVCE_CS(enc->enc_pic.pc.enc_force_imb_period); + RVCE_CS(enc->enc_pic.pc.enc_pic_order_cnt_type); + RVCE_CS(enc->enc_pic.pc.log2_max_pic_order_cnt_lsb_minus4); + RVCE_CS(enc->enc_pic.pc.enc_sps_id); + RVCE_CS(enc->enc_pic.pc.enc_pps_id); + RVCE_CS(enc->enc_pic.pc.enc_constraint_set_flags); + RVCE_CS(enc->enc_pic.pc.enc_b_pic_pattern); + RVCE_CS(enc->enc_pic.pc.weight_pred_mode_b_picture); + RVCE_CS(enc->enc_pic.pc.enc_number_of_reference_frames); + RVCE_CS(enc->enc_pic.pc.enc_max_num_ref_frames); + RVCE_CS(enc->enc_pic.pc.enc_num_default_active_ref_l0); + RVCE_CS(enc->enc_pic.pc.enc_num_default_active_ref_l1); + RVCE_CS(enc->enc_pic.pc.enc_slice_mode); + RVCE_CS(enc->enc_pic.pc.enc_max_slice_size); + RVCE_END(); +} + +static void rdo(struct rvce_encoder *enc) +{ + RVCE_BEGIN(0x04000008); // rdo + RVCE_CS(enc->enc_pic.rdo.enc_disable_tbe_pred_i_frame); + RVCE_CS(enc->enc_pic.rdo.enc_disable_tbe_pred_p_frame); + RVCE_CS(enc->enc_pic.rdo.use_fme_interpol_y); + RVCE_CS(enc->enc_pic.rdo.use_fme_interpol_uv); + RVCE_CS(enc->enc_pic.rdo.use_fme_intrapol_y); + RVCE_CS(enc->enc_pic.rdo.use_fme_intrapol_uv); + RVCE_CS(enc->enc_pic.rdo.use_fme_interpol_y_1); + RVCE_CS(enc->enc_pic.rdo.use_fme_interpol_uv_1); + RVCE_CS(enc->enc_pic.rdo.use_fme_intrapol_y_1); + RVCE_CS(enc->enc_pic.rdo.use_fme_intrapol_uv_1); + RVCE_CS(enc->enc_pic.rdo.enc_16x16_cost_adj); + RVCE_CS(enc->enc_pic.rdo.enc_skip_cost_adj); + RVCE_CS(enc->enc_pic.rdo.enc_force_16x16_skip); + RVCE_CS(enc->enc_pic.rdo.enc_disable_threshold_calc_a); + RVCE_CS(enc->enc_pic.rdo.enc_luma_coeff_cost); + RVCE_CS(enc->enc_pic.rdo.enc_luma_mb_coeff_cost); + RVCE_CS(enc->enc_pic.rdo.enc_chroma_coeff_cost); + RVCE_END(); +} + +static void session(struct rvce_encoder *enc) +{ + RVCE_BEGIN(0x00000001); // session cmd + RVCE_CS(enc->stream_handle); + RVCE_END(); +} + +static void task_info(struct rvce_encoder *enc, uint32_t op, + uint32_t dep, uint32_t fb_idx, uint32_t ring_idx) +{ + RVCE_BEGIN(0x00000002); // task info + if (op == 0x3) { + if (enc->task_info_idx) { + uint32_t offs = enc->cs->current.cdw - enc->task_info_idx + 3; + // Update offsetOfNextTaskInfo + enc->cs->current.buf[enc->task_info_idx] = offs; + } + enc->task_info_idx = enc->cs->current.cdw; + } + enc->enc_pic.ti.task_operation = op; + enc->enc_pic.ti.reference_picture_dependency = dep; + enc->enc_pic.ti.feedback_index = fb_idx; + enc->enc_pic.ti.video_bitstream_ring_index = ring_idx; + RVCE_CS(enc->enc_pic.ti.offset_of_next_task_info); + RVCE_CS(enc->enc_pic.ti.task_operation); + RVCE_CS(enc->enc_pic.ti.reference_picture_dependency); + RVCE_CS(enc->enc_pic.ti.collocate_flag_dependency); + RVCE_CS(enc->enc_pic.ti.feedback_index); + RVCE_CS(enc->enc_pic.ti.video_bitstream_ring_index); + RVCE_END(); +} + +static void vui(struct rvce_encoder *enc) +{ + int i; + + if (!enc->enc_pic.enable_vui) + return; + + RVCE_BEGIN(0x04000009); // vui + RVCE_CS(enc->enc_pic.vui.aspect_ratio_info_present_flag); + RVCE_CS(enc->enc_pic.vui.aspect_ratio_idc); + RVCE_CS(enc->enc_pic.vui.sar_width); + RVCE_CS(enc->enc_pic.vui.sar_height); + RVCE_CS(enc->enc_pic.vui.overscan_info_present_flag); + RVCE_CS(enc->enc_pic.vui.overscan_Approp_flag); + RVCE_CS(enc->enc_pic.vui.video_signal_type_present_flag); + RVCE_CS(enc->enc_pic.vui.video_format); + RVCE_CS(enc->enc_pic.vui.video_full_range_flag); + RVCE_CS(enc->enc_pic.vui.color_description_present_flag); + RVCE_CS(enc->enc_pic.vui.color_prim); + RVCE_CS(enc->enc_pic.vui.transfer_char); + RVCE_CS(enc->enc_pic.vui.matrix_coef); + RVCE_CS(enc->enc_pic.vui.chroma_loc_info_present_flag); + RVCE_CS(enc->enc_pic.vui.chroma_loc_top); + RVCE_CS(enc->enc_pic.vui.chroma_loc_bottom); + RVCE_CS(enc->enc_pic.vui.timing_info_present_flag); + RVCE_CS(enc->enc_pic.vui.num_units_in_tick); + RVCE_CS(enc->enc_pic.vui.time_scale); + RVCE_CS(enc->enc_pic.vui.fixed_frame_rate_flag); + RVCE_CS(enc->enc_pic.vui.nal_hrd_parameters_present_flag); + RVCE_CS(enc->enc_pic.vui.cpb_cnt_minus1); + RVCE_CS(enc->enc_pic.vui.bit_rate_scale); + RVCE_CS(enc->enc_pic.vui.cpb_size_scale); + for (i = 0; i < 32; i++) { + RVCE_CS(enc->enc_pic.vui.bit_rate_value_minus); + RVCE_CS(enc->enc_pic.vui.cpb_size_value_minus); + RVCE_CS(enc->enc_pic.vui.cbr_flag); + } + RVCE_CS(enc->enc_pic.vui.initial_cpb_removal_delay_length_minus1); + RVCE_CS(enc->enc_pic.vui.cpb_removal_delay_length_minus1); + RVCE_CS(enc->enc_pic.vui.dpb_output_delay_length_minus1); + RVCE_CS(enc->enc_pic.vui.time_offset_length); + RVCE_CS(enc->enc_pic.vui.low_delay_hrd_flag); + RVCE_CS(enc->enc_pic.vui.pic_struct_present_flag); + RVCE_CS(enc->enc_pic.vui.bitstream_restriction_present_flag); + RVCE_CS(enc->enc_pic.vui.motion_vectors_over_pic_boundaries_flag); + RVCE_CS(enc->enc_pic.vui.max_bytes_per_pic_denom); + RVCE_CS(enc->enc_pic.vui.max_bits_per_mb_denom); + RVCE_CS(enc->enc_pic.vui.log2_max_mv_length_hori); + RVCE_CS(enc->enc_pic.vui.log2_max_mv_length_vert); + RVCE_CS(enc->enc_pic.vui.num_reorder_frames); + RVCE_CS(enc->enc_pic.vui.max_dec_frame_buffering); + RVCE_END(); +} + +void radeon_vce_52_init(struct rvce_encoder *enc) +{ + enc->session = session; + enc->task_info = task_info; enc->create = create; + enc->feedback = feedback; + enc->rate_control = rate_control; + enc->config_extension = config_extension; + enc->pic_control = pic_control; + enc->motion_estimation = motion_estimation; + enc->rdo = rdo; + enc->vui = vui; + enc->config = config; enc->encode = encode; + enc->destroy = destroy; } diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/radeon_vce.c mesa-17.0.7/src/gallium/drivers/radeon/radeon_vce.c --- mesa-12.0.6/src/gallium/drivers/radeon/radeon_vce.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/radeon_vce.c 2017-06-01 10:37:10.000000000 +0000 @@ -51,6 +51,7 @@ #define FW_50_17_3 ((50 << 24) | (17 << 16) | (3 << 8)) #define FW_52_0_3 ((52 << 24) | (0 << 16) | (3 << 8)) #define FW_52_4_3 ((52 << 24) | (4 << 16) | (3 << 8)) +#define FW_52_8_3 ((52 << 24) | (8 << 16) | (3 << 8)) /** * flush commands to the hardware @@ -177,14 +178,15 @@ case 41: dpb = 32768; break; - default: case 42: dpb = 34816; break; case 50: dpb = 110400; break; + default: case 51: + case 52: dpb = 184320; break; } @@ -222,8 +224,8 @@ void rvce_frame_offset(struct rvce_encoder *enc, struct rvce_cpb_slot *slot, signed *luma_offset, signed *chroma_offset) { - unsigned pitch = align(enc->luma->level[0].pitch_bytes, 128); - unsigned vpitch = align(enc->luma->npix_y, 16); + unsigned pitch = align(enc->luma->level[0].nblk_x * enc->luma->bpe, 128); + unsigned vpitch = align(enc->luma->level[0].nblk_y, 16); unsigned fsize = pitch * (vpitch + vpitch / 2); *luma_offset = slot->index * fsize; @@ -267,6 +269,7 @@ enc->pic.quant_b_frames != pic->quant_b_frames; enc->pic = *pic; + get_pic_param(enc, pic); enc->get_buffer(vid_buf->resources[0], &enc->handle, &enc->luma); enc->get_buffer(vid_buf->resources[1], NULL, &enc->chroma); @@ -410,7 +413,8 @@ enc->use_vui = true; if (rscreen->info.family >= CHIP_TONGA && rscreen->info.family != CHIP_STONEY && - rscreen->info.family != CHIP_POLARIS11) + rscreen->info.family != CHIP_POLARIS11 && + rscreen->info.family != CHIP_POLARIS12) enc->dual_pipe = true; /* TODO enable B frame with dual instance */ if ((rscreen->info.family >= CHIP_TONGA) && @@ -452,8 +456,8 @@ goto error; get_buffer(((struct vl_video_buffer *)tmp_buf)->resources[0], NULL, &tmp_surf); - cpb_size = align(tmp_surf->level[0].pitch_bytes, 128); - cpb_size = cpb_size * align(tmp_surf->npix_y, 16); + cpb_size = align(tmp_surf->level[0].nblk_x * tmp_surf->bpe, 128); + cpb_size = cpb_size * align(tmp_surf->level[0].nblk_y, 32); cpb_size = cpb_size * 3 / 2; cpb_size = cpb_size * enc->cpb_num; if (enc->dual_pipe) @@ -474,6 +478,7 @@ switch (rscreen->info.vce_fw_version) { case FW_40_2_2: radeon_vce_40_2_2_init(enc); + get_pic_param = radeon_vce_40_2_2_get_param; break; case FW_50_0_1: @@ -481,11 +486,14 @@ case FW_50_10_2: case FW_50_17_3: radeon_vce_50_init(enc); + get_pic_param = radeon_vce_50_get_param; break; case FW_52_0_3: case FW_52_4_3: + case FW_52_8_3: radeon_vce_52_init(enc); + get_pic_param = radeon_vce_52_get_param; break; default: @@ -518,6 +526,7 @@ case FW_50_17_3: case FW_52_0_3: case FW_52_4_3: + case FW_52_8_3: return true; default: return false; @@ -533,7 +542,8 @@ { int reloc_idx; - reloc_idx = enc->ws->cs_add_buffer(enc->cs, buf, usage, domain, RADEON_PRIO_VCE); + reloc_idx = enc->ws->cs_add_buffer(enc->cs, buf, usage | RADEON_USAGE_SYNCHRONIZED, + domain, RADEON_PRIO_VCE); if (enc->use_vm) { uint64_t addr; addr = enc->ws->buffer_get_virtual_address(buf); @@ -541,6 +551,7 @@ RVCE_CS(addr >> 32); RVCE_CS(addr); } else { + offset += enc->ws->buffer_get_reloc_offset(buf); RVCE_CS(reloc_idx * 4); RVCE_CS(offset); } diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/radeon_vce.h mesa-17.0.7/src/gallium/drivers/radeon/radeon_vce.h --- mesa-12.0.6/src/gallium/drivers/radeon/radeon_vce.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/radeon_vce.h 2017-06-01 10:37:10.000000000 +0000 @@ -36,12 +36,14 @@ #include "util/list.h" -#define RVCE_CS(value) (enc->cs->buf[enc->cs->cdw++] = (value)) -#define RVCE_BEGIN(cmd) { uint32_t *begin = &enc->cs->buf[enc->cs->cdw++]; RVCE_CS(cmd) +#define RVCE_CS(value) (enc->cs->current.buf[enc->cs->current.cdw++] = (value)) +#define RVCE_BEGIN(cmd) { \ + uint32_t *begin = &enc->cs->current.buf[enc->cs->current.cdw++]; \ + RVCE_CS(cmd) #define RVCE_READ(buf, domain, off) rvce_add_buffer(enc, (buf), RADEON_USAGE_READ, (domain), (off)) #define RVCE_WRITE(buf, domain, off) rvce_add_buffer(enc, (buf), RADEON_USAGE_WRITE, (domain), (off)) #define RVCE_READWRITE(buf, domain, off) rvce_add_buffer(enc, (buf), RADEON_USAGE_READWRITE, (domain), (off)) -#define RVCE_END() *begin = (&enc->cs->buf[enc->cs->cdw] - begin) * 4; } +#define RVCE_END() *begin = (&enc->cs->current.buf[enc->cs->current.cdw] - begin) * 4; } #define RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE (4096 * 16 * 2.5) #define RVCE_MAX_AUX_BUFFER_NUM 4 @@ -63,6 +65,303 @@ unsigned pic_order_cnt; }; +struct rvce_rate_control { + uint32_t rc_method; + uint32_t target_bitrate; + uint32_t peak_bitrate; + uint32_t frame_rate_num; + uint32_t gop_size; + uint32_t quant_i_frames; + uint32_t quant_p_frames; + uint32_t quant_b_frames; + uint32_t vbv_buffer_size; + uint32_t frame_rate_den; + uint32_t vbv_buf_lv; + uint32_t max_au_size; + uint32_t qp_initial_mode; + uint32_t target_bits_picture; + uint32_t peak_bits_picture_integer; + uint32_t peak_bits_picture_fraction; + uint32_t min_qp; + uint32_t max_qp; + uint32_t skip_frame_enable; + uint32_t fill_data_enable; + uint32_t enforce_hrd; + uint32_t b_pics_delta_qp; + uint32_t ref_b_pics_delta_qp; + uint32_t rc_reinit_disable; + uint32_t enc_lcvbr_init_qp_flag; + uint32_t lcvbrsatd_based_nonlinear_bit_budget_flag; +}; + +struct rvce_motion_estimation { + uint32_t enc_ime_decimation_search; + uint32_t motion_est_half_pixel; + uint32_t motion_est_quarter_pixel; + uint32_t disable_favor_pmv_point; + uint32_t force_zero_point_center; + uint32_t lsmvert; + uint32_t enc_search_range_x; + uint32_t enc_search_range_y; + uint32_t enc_search1_range_x; + uint32_t enc_search1_range_y; + uint32_t disable_16x16_frame1; + uint32_t disable_satd; + uint32_t enable_amd; + uint32_t enc_disable_sub_mode; + uint32_t enc_ime_skip_x; + uint32_t enc_ime_skip_y; + uint32_t enc_en_ime_overw_dis_subm; + uint32_t enc_ime_overw_dis_subm_no; + uint32_t enc_ime2_search_range_x; + uint32_t enc_ime2_search_range_y; + uint32_t parallel_mode_speedup_enable; + uint32_t fme0_enc_disable_sub_mode; + uint32_t fme1_enc_disable_sub_mode; + uint32_t ime_sw_speedup_enable; +}; + +struct rvce_pic_control { + uint32_t enc_use_constrained_intra_pred; + uint32_t enc_cabac_enable; + uint32_t enc_cabac_idc; + uint32_t enc_loop_filter_disable; + int32_t enc_lf_beta_offset; + int32_t enc_lf_alpha_c0_offset; + uint32_t enc_crop_left_offset; + uint32_t enc_crop_right_offset; + uint32_t enc_crop_top_offset; + uint32_t enc_crop_bottom_offset; + uint32_t enc_num_mbs_per_slice; + uint32_t enc_intra_refresh_num_mbs_per_slot; + uint32_t enc_force_intra_refresh; + uint32_t enc_force_imb_period; + uint32_t enc_pic_order_cnt_type; + uint32_t log2_max_pic_order_cnt_lsb_minus4; + uint32_t enc_sps_id; + uint32_t enc_pps_id; + uint32_t enc_constraint_set_flags; + uint32_t enc_b_pic_pattern; + uint32_t weight_pred_mode_b_picture; + uint32_t enc_number_of_reference_frames; + uint32_t enc_max_num_ref_frames; + uint32_t enc_num_default_active_ref_l0; + uint32_t enc_num_default_active_ref_l1; + uint32_t enc_slice_mode; + uint32_t enc_max_slice_size; +}; + +struct rvce_task_info { + uint32_t offset_of_next_task_info; + uint32_t task_operation; + uint32_t reference_picture_dependency; + uint32_t collocate_flag_dependency; + uint32_t feedback_index; + uint32_t video_bitstream_ring_index; +}; + +struct rvce_feedback_buf_pkg { + uint32_t feedback_ring_address_hi; + uint32_t feedback_ring_address_lo; + uint32_t feedback_ring_size; +}; + +struct rvce_rdo { + uint32_t enc_disable_tbe_pred_i_frame; + uint32_t enc_disable_tbe_pred_p_frame; + uint32_t use_fme_interpol_y; + uint32_t use_fme_interpol_uv; + uint32_t use_fme_intrapol_y; + uint32_t use_fme_intrapol_uv; + uint32_t use_fme_interpol_y_1; + uint32_t use_fme_interpol_uv_1; + uint32_t use_fme_intrapol_y_1; + uint32_t use_fme_intrapol_uv_1; + uint32_t enc_16x16_cost_adj; + uint32_t enc_skip_cost_adj; + uint32_t enc_force_16x16_skip; + uint32_t enc_disable_threshold_calc_a; + uint32_t enc_luma_coeff_cost; + uint32_t enc_luma_mb_coeff_cost; + uint32_t enc_chroma_coeff_cost; +}; + +struct rvce_vui { + uint32_t aspect_ratio_info_present_flag; + uint32_t aspect_ratio_idc; + uint32_t sar_width; + uint32_t sar_height; + uint32_t overscan_info_present_flag; + uint32_t overscan_Approp_flag; + uint32_t video_signal_type_present_flag; + uint32_t video_format; + uint32_t video_full_range_flag; + uint32_t color_description_present_flag; + uint32_t color_prim; + uint32_t transfer_char; + uint32_t matrix_coef; + uint32_t chroma_loc_info_present_flag; + uint32_t chroma_loc_top; + uint32_t chroma_loc_bottom; + uint32_t timing_info_present_flag; + uint32_t num_units_in_tick; + uint32_t time_scale; + uint32_t fixed_frame_rate_flag; + uint32_t nal_hrd_parameters_present_flag; + uint32_t cpb_cnt_minus1; + uint32_t bit_rate_scale; + uint32_t cpb_size_scale; + uint32_t bit_rate_value_minus; + uint32_t cpb_size_value_minus; + uint32_t cbr_flag; + uint32_t initial_cpb_removal_delay_length_minus1; + uint32_t cpb_removal_delay_length_minus1; + uint32_t dpb_output_delay_length_minus1; + uint32_t time_offset_length; + uint32_t low_delay_hrd_flag; + uint32_t pic_struct_present_flag; + uint32_t bitstream_restriction_present_flag; + uint32_t motion_vectors_over_pic_boundaries_flag; + uint32_t max_bytes_per_pic_denom; + uint32_t max_bits_per_mb_denom; + uint32_t log2_max_mv_length_hori; + uint32_t log2_max_mv_length_vert; + uint32_t num_reorder_frames; + uint32_t max_dec_frame_buffering; +}; + +struct rvce_enc_operation { + uint32_t insert_headers; + uint32_t picture_structure; + uint32_t allowed_max_bitstream_size; + uint32_t force_refresh_map; + uint32_t insert_aud; + uint32_t end_of_sequence; + uint32_t end_of_stream; + uint32_t input_picture_luma_address_hi; + uint32_t input_picture_luma_address_lo; + uint32_t input_picture_chroma_address_hi; + uint32_t input_picture_chroma_address_lo; + uint32_t enc_input_frame_y_pitch; + uint32_t enc_input_pic_luma_pitch; + uint32_t enc_input_pic_chroma_pitch;; + uint32_t enc_input_pic_addr_array; + uint32_t enc_input_pic_addr_array_disable2pipe_disablemboffload; + uint32_t enc_input_pic_tile_config; + uint32_t enc_pic_type; + uint32_t enc_idr_flag; + uint32_t enc_idr_pic_id; + uint32_t enc_mgs_key_pic; + uint32_t enc_reference_flag; + uint32_t enc_temporal_layer_index; + uint32_t num_ref_idx_active_override_flag; + uint32_t num_ref_idx_l0_active_minus1; + uint32_t num_ref_idx_l1_active_minus1; + uint32_t enc_ref_list_modification_op; + uint32_t enc_ref_list_modification_num; + uint32_t enc_decoded_picture_marking_op; + uint32_t enc_decoded_picture_marking_num; + uint32_t enc_decoded_picture_marking_idx; + uint32_t enc_decoded_ref_base_picture_marking_op; + uint32_t enc_decoded_ref_base_picture_marking_num; + uint32_t l0_picture_structure; + uint32_t l0_enc_pic_type; + uint32_t l0_frame_number; + uint32_t l0_picture_order_count; + uint32_t l0_luma_offset; + uint32_t l0_chroma_offset; + uint32_t l1_picture_structure; + uint32_t l1_enc_pic_type; + uint32_t l1_frame_number; + uint32_t l1_picture_order_count; + uint32_t l1_luma_offset; + uint32_t l1_chroma_offset; + uint32_t enc_reconstructed_luma_offset; + uint32_t enc_reconstructed_chroma_offset;; + uint32_t enc_coloc_buffer_offset; + uint32_t enc_reconstructed_ref_base_picture_luma_offset; + uint32_t enc_reconstructed_ref_base_picture_chroma_offset; + uint32_t enc_reference_ref_base_picture_luma_offset; + uint32_t enc_reference_ref_base_picture_chroma_offset; + uint32_t picture_count; + uint32_t frame_number; + uint32_t picture_order_count; + uint32_t num_i_pic_remain_in_rcgop; + uint32_t num_p_pic_remain_in_rcgop; + uint32_t num_b_pic_remain_in_rcgop; + uint32_t num_ir_pic_remain_in_rcgop; + uint32_t enable_intra_refresh; + uint32_t aq_variance_en; + uint32_t aq_block_size; + uint32_t aq_mb_variance_sel; + uint32_t aq_frame_variance_sel; + uint32_t aq_param_a; + uint32_t aq_param_b; + uint32_t aq_param_c; + uint32_t aq_param_d; + uint32_t aq_param_e; + uint32_t context_in_sfb; +}; + +struct rvce_enc_create { + uint32_t enc_use_circular_buffer; + uint32_t enc_profile; + uint32_t enc_level; + uint32_t enc_pic_struct_restriction; + uint32_t enc_image_width; + uint32_t enc_image_height; + uint32_t enc_ref_pic_luma_pitch; + uint32_t enc_ref_pic_chroma_pitch; + uint32_t enc_ref_y_height_in_qw; + uint32_t enc_ref_pic_addr_array_enc_pic_struct_restriction_disable_rdo; + uint32_t enc_pre_encode_context_buffer_offset; + uint32_t enc_pre_encode_input_luma_buffer_offset; + uint32_t enc_pre_encode_input_chroma_buffer_offset; + uint32_t enc_pre_encode_mode_chromaflag_vbaqmode_scenechangesensitivity; +}; + +struct rvce_config_ext { + uint32_t enc_enable_perf_logging; +}; + +struct rvce_h264_enc_pic { + struct rvce_rate_control rc; + struct rvce_motion_estimation me; + struct rvce_pic_control pc; + struct rvce_task_info ti; + struct rvce_feedback_buf_pkg fb; + struct rvce_rdo rdo; + struct rvce_vui vui; + struct rvce_enc_operation eo; + struct rvce_enc_create ec; + struct rvce_config_ext ce; + + unsigned quant_i_frames; + unsigned quant_p_frames; + unsigned quant_b_frames; + + enum pipe_h264_enc_picture_type picture_type; + unsigned frame_num; + unsigned frame_num_cnt; + unsigned p_remain; + unsigned i_remain; + unsigned idr_pic_id; + unsigned gop_cnt; + unsigned gop_size; + unsigned pic_order_cnt; + unsigned ref_idx_l0; + unsigned ref_idx_l1; + unsigned addrmode_arraymode_disrdo_distwoinstants; + + bool not_referenced; + bool is_idr; + bool has_ref_pic_list; + bool enable_vui; + unsigned int ref_pic_list_0[32]; + unsigned int ref_pic_list_1[32]; + unsigned int frame_idx[32]; +}; + /* VCE encoder representation */ struct rvce_encoder { struct pipe_video_codec base; @@ -106,6 +405,7 @@ struct rvid_buffer *fb; struct rvid_buffer cpb; struct pipe_h264_enc_picture_desc pic; + struct rvce_h264_enc_pic enc_pic; unsigned task_info_idx; unsigned bs_idx; @@ -143,4 +443,20 @@ /* init vce fw 52 specific callbacks */ void radeon_vce_52_init(struct rvce_encoder *enc); +/* version specific function for getting parameters */ +void (*get_pic_param)(struct rvce_encoder *enc, + struct pipe_h264_enc_picture_desc *pic); + +/* get parameters for vce 40.2.2 */ +void radeon_vce_40_2_2_get_param(struct rvce_encoder *enc, + struct pipe_h264_enc_picture_desc *pic); + +/* get parameters for vce 50 */ +void radeon_vce_50_get_param(struct rvce_encoder *enc, + struct pipe_h264_enc_picture_desc *pic); + +/* get parameters for vce 52 */ +void radeon_vce_52_get_param(struct rvce_encoder *enc, + struct pipe_h264_enc_picture_desc *pic); + #endif diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/radeon_video.c mesa-17.0.7/src/gallium/drivers/radeon/radeon_video.c --- mesa-12.0.6/src/gallium/drivers/radeon/radeon_video.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/radeon_video.c 2017-06-01 10:37:10.000000000 +0000 @@ -43,6 +43,8 @@ #include "radeon_video.h" #include "radeon_vce.h" +#define UVD_FW_1_66_16 ((1 << 24) | (66 << 16) | (16 << 8)) + /* generate an stream handle */ unsigned rvid_alloc_stream_handle() { @@ -64,8 +66,14 @@ { memset(buffer, 0, sizeof(*buffer)); buffer->usage = usage; + + /* Hardware buffer placement restrictions require the kernel to be + * able to move buffers around individually, so request a + * non-sub-allocated buffer. + */ buffer->res = (struct r600_resource *) - pipe_buffer_create(screen, PIPE_BIND_CUSTOM, usage, size); + pipe_buffer_create(screen, PIPE_BIND_SHARED, + usage, size); return buffer->res != NULL; } @@ -73,7 +81,7 @@ /* destroy a buffer */ void rvid_destroy_buffer(struct rvid_buffer *buffer) { - pipe_resource_reference((struct pipe_resource **)&buffer->res, NULL); + r600_resource_reference(&buffer->res, NULL); } /* reallocate a buffer, preserving its content */ @@ -121,8 +129,8 @@ { struct r600_common_context *rctx = (struct r600_common_context*)context; - rctx->clear_buffer(context, &buffer->res->b.b, 0, buffer->res->buf->size, - 0, R600_COHERENCY_NONE); + rctx->dma_clear_buffer(context, &buffer->res->b.b, 0, + buffer->res->buf->size, 0); context->flush(context, NULL, 0); } @@ -164,10 +172,10 @@ surfaces[i]->tile_split = surfaces[best_tiling]->tile_split; /* adjust the texture layer offsets */ - off = align(off, surfaces[i]->bo_alignment); + off = align(off, surfaces[i]->surf_alignment); for (j = 0; j < ARRAY_SIZE(surfaces[i]->level); ++j) surfaces[i]->level[j].offset += off; - off += surfaces[i]->bo_size; + off += surfaces[i]->surf_size; } for (i = 0, size = 0, alignment = 0; i < VL_NUM_COMPONENTS; ++i) { @@ -206,30 +214,33 @@ { struct r600_common_screen *rscreen = (struct r600_common_screen *)screen; enum pipe_video_format codec = u_reduce_video_profile(profile); + struct radeon_info info; + + rscreen->ws->query_info(rscreen->ws, &info); if (entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE) { switch (param) { case PIPE_VIDEO_CAP_SUPPORTED: return codec == PIPE_VIDEO_FORMAT_MPEG4_AVC && rvce_is_fw_version_supported(rscreen); - case PIPE_VIDEO_CAP_NPOT_TEXTURES: - return 1; - case PIPE_VIDEO_CAP_MAX_WIDTH: + case PIPE_VIDEO_CAP_NPOT_TEXTURES: + return 1; + case PIPE_VIDEO_CAP_MAX_WIDTH: return (rscreen->family < CHIP_TONGA) ? 2048 : 4096; - case PIPE_VIDEO_CAP_MAX_HEIGHT: + case PIPE_VIDEO_CAP_MAX_HEIGHT: return (rscreen->family < CHIP_TONGA) ? 1152 : 2304; - case PIPE_VIDEO_CAP_PREFERED_FORMAT: - return PIPE_FORMAT_NV12; - case PIPE_VIDEO_CAP_PREFERS_INTERLACED: - return false; - case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED: - return false; - case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE: - return true; - case PIPE_VIDEO_CAP_STACKED_FRAMES: + case PIPE_VIDEO_CAP_PREFERED_FORMAT: + return PIPE_FORMAT_NV12; + case PIPE_VIDEO_CAP_PREFERS_INTERLACED: + return false; + case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED: + return false; + case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE: + return true; + case PIPE_VIDEO_CAP_STACKED_FRAMES: return (rscreen->family < CHIP_TONGA) ? 1 : 2; - default: - return 0; + default: + return 0; } } @@ -239,10 +250,15 @@ case PIPE_VIDEO_FORMAT_MPEG12: return profile != PIPE_VIDEO_PROFILE_MPEG1; case PIPE_VIDEO_FORMAT_MPEG4: + /* no support for MPEG4 on older hw */ + return rscreen->family >= CHIP_PALM; case PIPE_VIDEO_FORMAT_MPEG4_AVC: - if (rscreen->family < CHIP_PALM) - /* no support for MPEG4 */ - return codec != PIPE_VIDEO_FORMAT_MPEG4; + if ((rscreen->family == CHIP_POLARIS10 || + rscreen->family == CHIP_POLARIS11) && + info.uvd_fw_version < UVD_FW_1_66_16 ) { + RVID_ERR("POLARIS10/11 firmware version need to be updated.\n"); + return false; + } return true; case PIPE_VIDEO_FORMAT_VC1: return true; diff -Nru mesa-12.0.6/src/gallium/drivers/radeon/radeon_winsys.h mesa-17.0.7/src/gallium/drivers/radeon/radeon_winsys.h --- mesa-12.0.6/src/gallium/drivers/radeon/radeon_winsys.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeon/radeon_winsys.h 2017-06-01 10:37:10.000000000 +0000 @@ -28,9 +28,10 @@ #include "pipebuffer/pb_buffer.h" +#include "amd/common/amd_family.h" + #define RADEON_FLUSH_ASYNC (1 << 0) -#define RADEON_FLUSH_KEEP_TILING_FLAGS (1 << 1) -#define RADEON_FLUSH_END_OF_FRAME (1 << 2) +#define RADEON_FLUSH_END_OF_FRAME (1 << 1) /* Tiling flags. */ enum radeon_bo_layout { @@ -51,96 +52,18 @@ RADEON_FLAG_GTT_WC = (1 << 0), RADEON_FLAG_CPU_ACCESS = (1 << 1), RADEON_FLAG_NO_CPU_ACCESS = (1 << 2), + RADEON_FLAG_HANDLE = (1 << 3), /* the buffer most not be suballocated */ }; enum radeon_bo_usage { /* bitfield */ RADEON_USAGE_READ = 2, RADEON_USAGE_WRITE = 4, - RADEON_USAGE_READWRITE = RADEON_USAGE_READ | RADEON_USAGE_WRITE -}; + RADEON_USAGE_READWRITE = RADEON_USAGE_READ | RADEON_USAGE_WRITE, -enum radeon_family { - CHIP_UNKNOWN = 0, - CHIP_R300, /* R3xx-based cores. */ - CHIP_R350, - CHIP_RV350, - CHIP_RV370, - CHIP_RV380, - CHIP_RS400, - CHIP_RC410, - CHIP_RS480, - CHIP_R420, /* R4xx-based cores. */ - CHIP_R423, - CHIP_R430, - CHIP_R480, - CHIP_R481, - CHIP_RV410, - CHIP_RS600, - CHIP_RS690, - CHIP_RS740, - CHIP_RV515, /* R5xx-based cores. */ - CHIP_R520, - CHIP_RV530, - CHIP_R580, - CHIP_RV560, - CHIP_RV570, - CHIP_R600, - CHIP_RV610, - CHIP_RV630, - CHIP_RV670, - CHIP_RV620, - CHIP_RV635, - CHIP_RS780, - CHIP_RS880, - CHIP_RV770, - CHIP_RV730, - CHIP_RV710, - CHIP_RV740, - CHIP_CEDAR, - CHIP_REDWOOD, - CHIP_JUNIPER, - CHIP_CYPRESS, - CHIP_HEMLOCK, - CHIP_PALM, - CHIP_SUMO, - CHIP_SUMO2, - CHIP_BARTS, - CHIP_TURKS, - CHIP_CAICOS, - CHIP_CAYMAN, - CHIP_ARUBA, - CHIP_TAHITI, - CHIP_PITCAIRN, - CHIP_VERDE, - CHIP_OLAND, - CHIP_HAINAN, - CHIP_BONAIRE, - CHIP_KAVERI, - CHIP_KABINI, - CHIP_HAWAII, - CHIP_MULLINS, - CHIP_TONGA, - CHIP_ICELAND, - CHIP_CARRIZO, - CHIP_FIJI, - CHIP_STONEY, - CHIP_POLARIS10, - CHIP_POLARIS11, - CHIP_LAST, -}; - -enum chip_class { - CLASS_UNKNOWN = 0, - R300, - R400, - R500, - R600, - R700, - EVERGREEN, - CAYMAN, - SI, - CIK, - VI, + /* The winsys ensures that the CS submission will be scheduled after + * previously flushed CSs referencing this BO in a conflicting way. + */ + RADEON_USAGE_SYNCHRONIZED = 8 }; enum ring_type { @@ -155,10 +78,14 @@ enum radeon_value_id { RADEON_REQUESTED_VRAM_MEMORY, RADEON_REQUESTED_GTT_MEMORY, + RADEON_MAPPED_VRAM, + RADEON_MAPPED_GTT, RADEON_BUFFER_WAIT_TIME_NS, RADEON_TIMESTAMP, - RADEON_NUM_CS_FLUSHES, + RADEON_NUM_GFX_IBS, + RADEON_NUM_SDMA_IBS, RADEON_NUM_BYTES_MOVED, + RADEON_NUM_EVICTIONS, RADEON_VRAM_USAGE, RADEON_GTT_USAGE, RADEON_GPU_TEMPERATURE, /* DRM 2.42.0 */ @@ -179,56 +106,67 @@ RADEON_PRIO_DRAW_INDIRECT, RADEON_PRIO_INDEX_BUFFER, - RADEON_PRIO_CP_DMA = 8, - - RADEON_PRIO_VCE = 12, + RADEON_PRIO_VCE = 8, RADEON_PRIO_UVD, RADEON_PRIO_SDMA_BUFFER, RADEON_PRIO_SDMA_TEXTURE, - RADEON_PRIO_USER_SHADER = 16, - RADEON_PRIO_INTERNAL_SHADER, /* fetch shader, etc. */ - - /* gap: 20 */ + RADEON_PRIO_CP_DMA = 12, - RADEON_PRIO_CONST_BUFFER = 24, + RADEON_PRIO_CONST_BUFFER = 16, RADEON_PRIO_DESCRIPTORS, RADEON_PRIO_BORDER_COLORS, - RADEON_PRIO_SAMPLER_BUFFER = 28, + RADEON_PRIO_SAMPLER_BUFFER = 20, RADEON_PRIO_VERTEX_BUFFER, - RADEON_PRIO_SHADER_RW_BUFFER = 32, - RADEON_PRIO_RINGS_STREAMOUT, - RADEON_PRIO_SCRATCH_BUFFER, + RADEON_PRIO_SHADER_RW_BUFFER = 24, RADEON_PRIO_COMPUTE_GLOBAL, - RADEON_PRIO_SAMPLER_TEXTURE = 36, + RADEON_PRIO_SAMPLER_TEXTURE = 28, RADEON_PRIO_SHADER_RW_IMAGE, - RADEON_PRIO_SAMPLER_TEXTURE_MSAA = 40, + RADEON_PRIO_SAMPLER_TEXTURE_MSAA = 32, - RADEON_PRIO_COLOR_BUFFER = 44, + RADEON_PRIO_COLOR_BUFFER = 36, - RADEON_PRIO_DEPTH_BUFFER = 48, + RADEON_PRIO_DEPTH_BUFFER = 40, - RADEON_PRIO_COLOR_BUFFER_MSAA = 52, + RADEON_PRIO_COLOR_BUFFER_MSAA = 44, - RADEON_PRIO_DEPTH_BUFFER_MSAA = 56, + RADEON_PRIO_DEPTH_BUFFER_MSAA = 48, - RADEON_PRIO_CMASK = 60, + RADEON_PRIO_CMASK = 52, RADEON_PRIO_DCC, RADEON_PRIO_HTILE, + RADEON_PRIO_SHADER_BINARY, /* the hw can't hide instruction cache misses */ + + RADEON_PRIO_SHADER_RINGS = 56, + + RADEON_PRIO_SCRATCH_BUFFER = 60, /* 63 is the maximum value */ }; struct winsys_handle; struct radeon_winsys_ctx; +struct radeon_winsys_cs_chunk { + unsigned cdw; /* Number of used dwords. */ + unsigned max_dw; /* Maximum number of dwords. */ + uint32_t *buf; /* The base pointer of the chunk. */ +}; + struct radeon_winsys_cs { - unsigned cdw; /* Number of used dwords. */ - unsigned max_dw; /* Maximum number of dwords. */ - uint32_t *buf; /* The command buffer. */ + struct radeon_winsys_cs_chunk current; + struct radeon_winsys_cs_chunk *prev; + unsigned num_prev; /* Number of previous chunks. */ + unsigned max_prev; /* Space in array pointed to by prev. */ + unsigned prev_dw; /* Total number of dwords in previous chunks. */ + + /* Memory usage of the buffer list. These are always 0 for CE and preamble + * IBs. */ + uint64_t used_vram; + uint64_t used_gart; }; struct radeon_info { @@ -245,13 +183,18 @@ uint32_t gart_page_size; uint64_t gart_size; uint64_t vram_size; + uint64_t max_alloc_size; + uint32_t min_alloc_size; bool has_dedicated_vram; - boolean has_virtual_memory; + bool has_virtual_memory; bool gfx_ib_pad_with_type2; - boolean has_sdma; - boolean has_uvd; + bool has_sdma; + bool has_uvd; uint32_t uvd_fw_version; uint32_t vce_fw_version; + uint32_t me_fw_version; + uint32_t pfp_fw_version; + uint32_t ce_fw_version; uint32_t vce_harvest_config; uint32_t clock_crystal_freq; @@ -259,7 +202,7 @@ uint32_t drm_major; /* version */ uint32_t drm_minor; uint32_t drm_patchlevel; - boolean has_userptr; + bool has_userptr; /* Shader cores. */ uint32_t r600_max_quad_pipes; /* wave size / 16 */ @@ -272,7 +215,7 @@ uint32_t r300_num_gb_pipes; uint32_t r300_num_z_pipes; uint32_t r600_gb_backend_map; /* R600 harvest config */ - boolean r600_gb_backend_map_valid; + bool r600_gb_backend_map_valid; uint32_t r600_num_banks; uint32_t num_render_backends; uint32_t num_tile_pipes; /* pipe count from PIPE_CONFIG */ @@ -313,89 +256,96 @@ RADEON_FID_R300_CMASK_ACCESS, }; -#define RADEON_SURF_MAX_LEVEL 32 +#define RADEON_SURF_MAX_LEVELS 15 + +enum radeon_surf_mode { + RADEON_SURF_MODE_LINEAR_ALIGNED = 1, + RADEON_SURF_MODE_1D = 2, + RADEON_SURF_MODE_2D = 3, +}; + +/* These are defined exactly like GB_TILE_MODEn.MICRO_TILE_MODE_NEW. */ +enum radeon_micro_mode { + RADEON_MICRO_MODE_DISPLAY = 0, + RADEON_MICRO_MODE_THIN = 1, + RADEON_MICRO_MODE_DEPTH = 2, + RADEON_MICRO_MODE_ROTATED = 3, +}; -#define RADEON_SURF_TYPE_MASK 0xFF -#define RADEON_SURF_TYPE_SHIFT 0 -#define RADEON_SURF_TYPE_1D 0 -#define RADEON_SURF_TYPE_2D 1 -#define RADEON_SURF_TYPE_3D 2 -#define RADEON_SURF_TYPE_CUBEMAP 3 -#define RADEON_SURF_TYPE_1D_ARRAY 4 -#define RADEON_SURF_TYPE_2D_ARRAY 5 -#define RADEON_SURF_MODE_MASK 0xFF -#define RADEON_SURF_MODE_SHIFT 8 -#define RADEON_SURF_MODE_LINEAR_ALIGNED 1 -#define RADEON_SURF_MODE_1D 2 -#define RADEON_SURF_MODE_2D 3 +/* the first 16 bits are reserved for libdrm_radeon, don't use them */ #define RADEON_SURF_SCANOUT (1 << 16) #define RADEON_SURF_ZBUFFER (1 << 17) #define RADEON_SURF_SBUFFER (1 << 18) #define RADEON_SURF_Z_OR_SBUFFER (RADEON_SURF_ZBUFFER | RADEON_SURF_SBUFFER) -#define RADEON_SURF_HAS_SBUFFER_MIPTREE (1 << 19) -#define RADEON_SURF_HAS_TILE_MODE_INDEX (1 << 20) +/* bits 19 and 20 are reserved for libdrm_radeon, don't use them */ #define RADEON_SURF_FMASK (1 << 21) #define RADEON_SURF_DISABLE_DCC (1 << 22) - -#define RADEON_SURF_GET(v, field) (((v) >> RADEON_SURF_ ## field ## _SHIFT) & RADEON_SURF_ ## field ## _MASK) -#define RADEON_SURF_SET(v, field) (((v) & RADEON_SURF_ ## field ## _MASK) << RADEON_SURF_ ## field ## _SHIFT) -#define RADEON_SURF_CLR(v, field) ((v) & ~(RADEON_SURF_ ## field ## _MASK << RADEON_SURF_ ## field ## _SHIFT)) +#define RADEON_SURF_TC_COMPATIBLE_HTILE (1 << 23) +#define RADEON_SURF_IMPORTED (1 << 24) +#define RADEON_SURF_OPTIMIZE_FOR_SPACE (1 << 25) struct radeon_surf_level { uint64_t offset; uint64_t slice_size; - uint32_t npix_x; - uint32_t npix_y; - uint32_t npix_z; - uint32_t nblk_x; - uint32_t nblk_y; - uint32_t nblk_z; - uint32_t pitch_bytes; - uint32_t mode; uint64_t dcc_offset; + uint64_t dcc_fast_clear_size; + uint16_t nblk_x; + uint16_t nblk_y; + enum radeon_surf_mode mode; }; struct radeon_surf { - /* These are inputs to the calculator. */ - uint32_t npix_x; - uint32_t npix_y; - uint32_t npix_z; - uint32_t blk_w; - uint32_t blk_h; - uint32_t blk_d; - uint32_t array_size; - uint32_t last_level; - uint32_t bpe; - uint32_t nsamples; + /* Format properties. */ + unsigned blk_w:4; + unsigned blk_h:4; + unsigned bpe:5; + /* Number of mipmap levels where DCC is enabled starting from level 0. + * Non-zero levels may be disabled due to alignment constraints, but not + * the first level. + */ + unsigned num_dcc_levels:4; + unsigned is_linear:1; uint32_t flags; /* These are return values. Some of them can be set by the caller, but * they will be treated as hints (e.g. bankw, bankh) and might be * changed by the calculator. */ - uint64_t bo_size; - uint64_t bo_alignment; - /* This applies to EG and later. */ - uint32_t bankw; - uint32_t bankh; - uint32_t mtilea; - uint32_t tile_split; - uint32_t stencil_tile_split; - uint64_t stencil_offset; - struct radeon_surf_level level[RADEON_SURF_MAX_LEVEL]; - struct radeon_surf_level stencil_level[RADEON_SURF_MAX_LEVEL]; - uint32_t tiling_index[RADEON_SURF_MAX_LEVEL]; - uint32_t stencil_tiling_index[RADEON_SURF_MAX_LEVEL]; - uint32_t pipe_config; - uint32_t num_banks; - uint32_t macro_tile_index; - + uint64_t surf_size; uint64_t dcc_size; - uint64_t dcc_alignment; + uint64_t htile_size; + + uint32_t surf_alignment; + uint32_t dcc_alignment; + uint32_t htile_alignment; + + /* This applies to EG and later. */ + unsigned bankw:4; /* max 8 */ + unsigned bankh:4; /* max 8 */ + unsigned mtilea:4; /* max 8 */ + unsigned tile_split:13; /* max 4K */ + unsigned stencil_tile_split:13; /* max 4K */ + unsigned pipe_config:5; /* max 17 */ + unsigned num_banks:5; /* max 16 */ + unsigned macro_tile_index:4; /* max 15 */ + unsigned micro_tile_mode:3; /* displayable, thin, depth, rotated */ + + /* Whether the depth miptree or stencil miptree as used by the DB are + * adjusted from their TC compatible form to ensure depth/stencil + * compatibility. If either is true, the corresponding plane cannot be + * sampled from. + */ + unsigned depth_adjusted:1; + unsigned stencil_adjusted:1; + + struct radeon_surf_level level[RADEON_SURF_MAX_LEVELS]; + struct radeon_surf_level stencil_level[RADEON_SURF_MAX_LEVELS]; + uint8_t tiling_index[RADEON_SURF_MAX_LEVELS]; + uint8_t stencil_tiling_index[RADEON_SURF_MAX_LEVELS]; }; struct radeon_bo_list_item { - struct pb_buffer *buf; + uint64_t bo_size; uint64_t vm_address; uint64_t priority_usage; /* mask of (1 << RADEON_PRIO_*) */ }; @@ -544,22 +494,37 @@ * \param buf A winsys buffer object to get the handle from. * \param whandle A winsys handle pointer. * \param stride A stride of the buffer in bytes, for texturing. - * \return TRUE on success. + * \return true on success. */ - boolean (*buffer_get_handle)(struct pb_buffer *buf, - unsigned stride, unsigned offset, - unsigned slice_size, - struct winsys_handle *whandle); + bool (*buffer_get_handle)(struct pb_buffer *buf, + unsigned stride, unsigned offset, + unsigned slice_size, + struct winsys_handle *whandle); /** * Return the virtual address of a buffer. * + * When virtual memory is not in use, this is the offset relative to the + * relocation base (non-zero for sub-allocated buffers). + * * \param buf A winsys buffer object * \return virtual address */ uint64_t (*buffer_get_virtual_address)(struct pb_buffer *buf); /** + * Return the offset of this buffer relative to the relocation base. + * This is only non-zero for sub-allocated buffers. + * + * This is only supported in the radeon winsys, since amdgpu uses virtual + * addresses in submissions even for the video engines. + * + * \param buf A winsys buffer object + * \return the offset for relocations + */ + unsigned (*buffer_get_reloc_offset)(struct pb_buffer *buf); + + /** * Query the initial placement of the buffer from the kernel driver. */ enum radeon_bo_domain (*buffer_get_initial_domain)(struct pb_buffer *buf); @@ -658,6 +623,9 @@ /** * Return the index of an already-added buffer. * + * Not supported on amdgpu. Drivers with GPUVM should not care about + * buffer indices. + * * \param cs Command stream * \param buf Buffer * \return The buffer index, or -1 if the buffer has not been added. @@ -666,30 +634,30 @@ struct pb_buffer *buf); /** - * Return TRUE if there is enough memory in VRAM and GTT for the buffers + * Return true if there is enough memory in VRAM and GTT for the buffers * added so far. If the validation fails, all buffers which have * been added since the last call of cs_validate will be removed and * the CS will be flushed (provided there are still any buffers). * * \param cs A command stream to validate. */ - boolean (*cs_validate)(struct radeon_winsys_cs *cs); + bool (*cs_validate)(struct radeon_winsys_cs *cs); /** - * Return TRUE if there is enough memory in VRAM and GTT for the buffers - * added so far. + * Check whether the given number of dwords is available in the IB. + * Optionally chain a new chunk of the IB if necessary and supported. * - * \param cs A command stream to validate. - * \param vram VRAM memory size pending to be use - * \param gtt GTT memory size pending to be use + * \param cs A command stream. + * \param dw Number of CS dwords requested by the caller. */ - boolean (*cs_memory_below_limit)(struct radeon_winsys_cs *cs, uint64_t vram, uint64_t gtt); - - uint64_t (*cs_query_memory_usage)(struct radeon_winsys_cs *cs); + bool (*cs_check_space)(struct radeon_winsys_cs *cs, unsigned dw); /** * Return the buffer list. * + * This is the buffer list as passed to the kernel, i.e. it only contains + * the parent buffers of sub-allocated buffers. + * * \param cs Command stream * \param list Returned buffer list. Set to NULL to query the count only. * \return The buffer count. @@ -704,20 +672,29 @@ * \param flags, RADEON_FLUSH_ASYNC or 0. * \param fence Pointer to a fence. If non-NULL, a fence is inserted * after the CS and is returned through this parameter. + * \return Negative POSIX error code or 0 for success. + * Asynchronous submissions never return an error. */ - void (*cs_flush)(struct radeon_winsys_cs *cs, - unsigned flags, - struct pipe_fence_handle **fence); + int (*cs_flush)(struct radeon_winsys_cs *cs, + unsigned flags, + struct pipe_fence_handle **fence); /** - * Return TRUE if a buffer is referenced by a command stream. + * Create a fence before the CS is flushed. + * The user must flush manually to complete the initializaton of the fence. + * The fence must not be used before the flush. + */ + struct pipe_fence_handle *(*cs_get_next_fence)(struct radeon_winsys_cs *cs); + + /** + * Return true if a buffer is referenced by a command stream. * * \param cs A command stream. * \param buf A winsys buffer. */ - boolean (*cs_is_buffer_referenced)(struct radeon_winsys_cs *cs, - struct pb_buffer *buf, - enum radeon_bo_usage usage); + bool (*cs_is_buffer_referenced)(struct radeon_winsys_cs *cs, + struct pb_buffer *buf, + enum radeon_bo_usage usage); /** * Request access to a feature for a command stream. @@ -726,9 +703,9 @@ * \param fid Feature ID, one of RADEON_FID_* * \param enable Whether to enable or disable the feature. */ - boolean (*cs_request_feature)(struct radeon_winsys_cs *cs, - enum radeon_feature_id fid, - boolean enable); + bool (*cs_request_feature)(struct radeon_winsys_cs *cs, + enum radeon_feature_id fid, + bool enable); /** * Make sure all asynchronous flush of the cs have completed * @@ -756,18 +733,16 @@ * Initialize surface * * \param ws The winsys this function is called from. - * \param surf Surface structure ptr + * \param tex Input texture description + * \param flags Bitmask of RADEON_SURF_* flags + * \param bpe Bytes per pixel, it can be different for Z buffers. + * \param mode Preferred tile mode. (linear, 1D, or 2D) + * \param surf Output structure */ int (*surface_init)(struct radeon_winsys *ws, - struct radeon_surf *surf); - - /** - * Find best values for a surface - * - * \param ws The winsys this function is called from. - * \param surf Surface structure ptr - */ - int (*surface_best)(struct radeon_winsys *ws, + const struct pipe_resource *tex, + unsigned flags, unsigned bpe, + enum radeon_surf_mode mode, struct radeon_surf *surf); uint64_t (*query_value)(struct radeon_winsys *ws, @@ -779,19 +754,19 @@ static inline bool radeon_emitted(struct radeon_winsys_cs *cs, unsigned num_dw) { - return cs && cs->cdw > num_dw; + return cs && (cs->prev_dw + cs->current.cdw > num_dw); } static inline void radeon_emit(struct radeon_winsys_cs *cs, uint32_t value) { - cs->buf[cs->cdw++] = value; + cs->current.buf[cs->current.cdw++] = value; } static inline void radeon_emit_array(struct radeon_winsys_cs *cs, const uint32_t *values, unsigned count) { - memcpy(cs->buf+cs->cdw, values, count * 4); - cs->cdw += count; + memcpy(cs->current.buf + cs->current.cdw, values, count * 4); + cs->current.cdw += count; } #endif diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/Automake.inc mesa-17.0.7/src/gallium/drivers/radeonsi/Automake.inc --- mesa-12.0.6/src/gallium/drivers/radeonsi/Automake.inc 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/Automake.inc 2017-06-01 10:37:10.000000000 +0000 @@ -4,6 +4,7 @@ TARGET_CPPFLAGS += -DGALLIUM_RADEONSI TARGET_LIB_DEPS += \ $(top_builddir)/src/gallium/drivers/radeonsi/libradeonsi.la \ + $(top_builddir)/src/amd/common/libamd_common.la \ $(RADEON_LIBS) \ $(LIBDRM_LIBS) \ $(AMDGPU_LIBS) diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/cik_sdma.c mesa-17.0.7/src/gallium/drivers/radeonsi/cik_sdma.c --- mesa-12.0.6/src/gallium/drivers/radeonsi/cik_sdma.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/cik_sdma.c 2017-06-01 10:37:10.000000000 +0000 @@ -27,24 +27,27 @@ #include "sid.h" #include "si_pipe.h" -#include "radeon/r600_cs.h" -#include "util/u_format.h" - -static void cik_sdma_do_copy_buffer(struct si_context *ctx, - struct pipe_resource *dst, - struct pipe_resource *src, - uint64_t dst_offset, - uint64_t src_offset, - uint64_t size) +static void cik_sdma_copy_buffer(struct si_context *ctx, + struct pipe_resource *dst, + struct pipe_resource *src, + uint64_t dst_offset, + uint64_t src_offset, + uint64_t size) { struct radeon_winsys_cs *cs = ctx->b.dma.cs; unsigned i, ncopy, csize; - struct r600_resource *rdst = (struct r600_resource*)dst; - struct r600_resource *rsrc = (struct r600_resource*)src; + struct r600_resource *rdst = r600_resource(dst); + struct r600_resource *rsrc = r600_resource(src); - dst_offset += r600_resource(dst)->gpu_address; - src_offset += r600_resource(src)->gpu_address; + /* Mark the buffer range of destination as valid (initialized), + * so that transfer_map knows it should wait for the GPU when mapping + * that range. */ + util_range_add(&rdst->valid_buffer_range, dst_offset, + dst_offset + size); + + dst_offset += rdst->gpu_address; + src_offset += rsrc->gpu_address; ncopy = DIV_ROUND_UP(size, CIK_SDMA_COPY_MAX_SIZE); r600_need_dma_space(&ctx->b, ncopy * 7, rdst, rsrc); @@ -66,23 +69,44 @@ } } -static void cik_sdma_copy_buffer(struct si_context *ctx, - struct pipe_resource *dst, - struct pipe_resource *src, - uint64_t dst_offset, - uint64_t src_offset, - uint64_t size) +static void cik_sdma_clear_buffer(struct pipe_context *ctx, + struct pipe_resource *dst, + uint64_t offset, + uint64_t size, + unsigned clear_value) { - struct r600_resource *rdst = (struct r600_resource*)dst; + struct si_context *sctx = (struct si_context *)ctx; + struct radeon_winsys_cs *cs = sctx->b.dma.cs; + unsigned i, ncopy, csize; + struct r600_resource *rdst = r600_resource(dst); + + if (!cs || offset % 4 != 0 || size % 4 != 0) { + ctx->clear_buffer(ctx, dst, offset, size, &clear_value, 4); + return; + } /* Mark the buffer range of destination as valid (initialized), * so that transfer_map knows it should wait for the GPU when mapping * that range. */ - util_range_add(&rdst->valid_buffer_range, dst_offset, - dst_offset + size); + util_range_add(&rdst->valid_buffer_range, offset, offset + size); - cik_sdma_do_copy_buffer(ctx, dst, src, dst_offset, src_offset, size); - r600_dma_emit_wait_idle(&ctx->b); + offset += rdst->gpu_address; + + /* the same maximum size as for copying */ + ncopy = DIV_ROUND_UP(size, CIK_SDMA_COPY_MAX_SIZE); + r600_need_dma_space(&sctx->b, ncopy * 5, rdst, NULL); + + for (i = 0; i < ncopy; i++) { + csize = MIN2(size, CIK_SDMA_COPY_MAX_SIZE); + radeon_emit(cs, CIK_SDMA_PACKET(CIK_SDMA_PACKET_CONSTANT_FILL, 0, + 0x8000 /* dword copy */)); + radeon_emit(cs, offset); + radeon_emit(cs, offset >> 32); + radeon_emit(cs, clear_value); + radeon_emit(cs, csize); + offset += csize; + size -= csize; + } } static unsigned minify_as_blocks(unsigned width, unsigned level, unsigned blk_w) @@ -137,8 +161,8 @@ unsigned src_tile_mode = info->si_tile_mode_array[src_tile_index]; unsigned dst_micro_mode = G_009910_MICRO_TILE_MODE_NEW(dst_tile_mode); unsigned src_micro_mode = G_009910_MICRO_TILE_MODE_NEW(src_tile_mode); - unsigned dst_pitch = rdst->surface.level[dst_level].pitch_bytes / bpp; - unsigned src_pitch = rsrc->surface.level[src_level].pitch_bytes / bpp; + unsigned dst_pitch = rdst->surface.level[dst_level].nblk_x; + unsigned src_pitch = rsrc->surface.level[src_level].nblk_x; uint64_t dst_slice_pitch = rdst->surface.level[dst_level].slice_size / bpp; uint64_t src_slice_pitch = rsrc->surface.level[src_level].slice_size / bpp; unsigned dst_width = minify_as_blocks(rdst->resource.b.b.width0, @@ -165,10 +189,6 @@ src_slice_pitch * bpp * (srcz + src_box->depth) <= rsrc->resource.buf->size); - /* Test CIK with radeon and amdgpu before enabling this. */ - if (sctx->b.chip_class == CIK) - return false; - if (!r600_prepare_for_dma_blit(&sctx->b, rdst, dst_level, dstx, dsty, dstz, rsrc, src_level, src_box)) return false; @@ -229,8 +249,6 @@ radeon_emit(cs, (copy_width - 1) | ((copy_height - 1) << 16)); radeon_emit(cs, (copy_depth - 1)); } - - r600_dma_emit_wait_idle(&sctx->b); return true; } @@ -349,7 +367,7 @@ (tiled_x + copy_width) % granularity; if (start_linear_address < 0 || - end_linear_address > linear->surface.bo_size) + end_linear_address > linear->surface.surf_size) return false; /* Check requirements. */ @@ -370,12 +388,13 @@ copy_height <= (1 << 14) && copy_depth <= (1 << 11)) { struct radeon_winsys_cs *cs = sctx->b.dma.cs; + uint32_t direction = linear == rdst ? 1u << 31 : 0; r600_need_dma_space(&sctx->b, 14, &rdst->resource, &rsrc->resource); radeon_emit(cs, CIK_SDMA_PACKET(CIK_SDMA_OPCODE_COPY, CIK_SDMA_COPY_SUB_OPCODE_TILED_SUB_WINDOW, 0) | - ((linear == rdst) << 31)); + direction); radeon_emit(cs, tiled_address); radeon_emit(cs, tiled_address >> 32); radeon_emit(cs, tiled_x | (tiled_y << 16)); @@ -394,8 +413,6 @@ radeon_emit(cs, (copy_width_aligned - 1) | ((copy_height - 1) << 16)); radeon_emit(cs, (copy_depth - 1)); } - - r600_dma_emit_wait_idle(&sctx->b); return true; } } @@ -492,8 +509,6 @@ ((copy_height_aligned - 8) << 16)); radeon_emit(cs, (copy_depth - 1)); } - - r600_dma_emit_wait_idle(&sctx->b); return true; } } @@ -519,12 +534,6 @@ return; } - /* Carrizo SDMA texture copying is very broken for some users. - * https://bugs.freedesktop.org/show_bug.cgi?id=97029 - */ - if (sctx->b.family == CHIP_CARRIZO) - goto fallback; - if (cik_sdma_copy_texture(sctx, dst, dst_level, dstx, dsty, dstz, src, src_level, src_box)) return; @@ -537,4 +546,5 @@ void cik_init_sdma_functions(struct si_context *sctx) { sctx->b.dma_copy = cik_sdma_copy; + sctx->b.dma_clear_buffer = cik_sdma_clear_buffer; } diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/Makefile.am mesa-17.0.7/src/gallium/drivers/radeonsi/Makefile.am --- mesa-12.0.6/src/gallium/drivers/radeonsi/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -25,18 +25,11 @@ AM_CFLAGS = \ $(GALLIUM_DRIVER_CFLAGS) \ + -I$(top_builddir)/src/amd/common \ + -I$(top_srcdir)/src/amd/common \ $(RADEON_CFLAGS) \ $(LLVM_CFLAGS) noinst_LTLIBRARIES = libradeonsi.la -libradeonsi_la_SOURCES = $(C_SOURCES) $(GENERATED_SOURCES) - -sid_tables.h: $(srcdir)/sid_tables.py $(srcdir)/sid.h - $(AM_V_GEN) $(PYTHON2) $(srcdir)/sid_tables.py $(srcdir)/sid.h > $@ - -EXTRA_DIST = \ - sid_tables.py - -BUILT_SOURCES =\ - sid_tables.h +libradeonsi_la_SOURCES = $(C_SOURCES) diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/Makefile.in mesa-17.0.7/src/gallium/drivers/radeonsi/Makefile.in --- mesa-12.0.6/src/gallium/drivers/radeonsi/Makefile.in 2017-01-24 01:41:47.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/Makefile.in 2017-06-01 10:37:20.000000000 +0000 @@ -111,10 +111,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -141,9 +144,9 @@ am__objects_1 = cik_sdma.lo si_blit.lo si_compute.lo si_cp_dma.lo \ si_debug.lo si_descriptors.lo si_dma.lo si_hw_context.lo \ si_pipe.lo si_pm4.lo si_perfcounter.lo si_shader.lo \ - si_state.lo si_state_draw.lo si_state_shaders.lo si_uvd.lo -am__objects_2 = -am_libradeonsi_la_OBJECTS = $(am__objects_1) $(am__objects_2) + si_shader_tgsi_alu.lo si_shader_tgsi_setup.lo si_state.lo \ + si_state_draw.lo si_state_shaders.lo si_uvd.lo +am_libradeonsi_la_OBJECTS = $(am__objects_1) libradeonsi_la_OBJECTS = $(am_libradeonsi_la_OBJECTS) AM_V_lt = $(am__v_lt_@AM_V@) am__v_lt_ = $(am__v_lt_@AM_DEFAULT_V@) @@ -218,6 +221,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -232,6 +237,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -261,10 +267,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -314,11 +321,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -358,8 +362,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -396,8 +398,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -406,7 +406,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -414,13 +413,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -449,6 +449,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -518,7 +519,6 @@ si_cp_dma.c \ si_debug.c \ si_descriptors.c \ - sid.h \ si_dma.c \ si_hw_context.c \ si_pipe.c \ @@ -529,15 +529,15 @@ si_public.h \ si_shader.c \ si_shader.h \ + si_shader_internal.h \ + si_shader_tgsi_alu.c \ + si_shader_tgsi_setup.c \ si_state.c \ si_state_draw.c \ si_state_shaders.c \ si_state.h \ si_uvd.c -GENERATED_SOURCES := \ - sid_tables.h - GALLIUM_CFLAGS = \ -I$(top_srcdir)/include \ -I$(top_srcdir)/src \ @@ -585,12 +585,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -602,22 +598,17 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ $(GALLIUM_DRIVER_CFLAGS) \ + -I$(top_builddir)/src/amd/common \ + -I$(top_srcdir)/src/amd/common \ $(RADEON_CFLAGS) \ $(LLVM_CFLAGS) noinst_LTLIBRARIES = libradeonsi.la -libradeonsi_la_SOURCES = $(C_SOURCES) $(GENERATED_SOURCES) -EXTRA_DIST = \ - sid_tables.py - -BUILT_SOURCES = \ - sid_tables.h - -all: $(BUILT_SOURCES) - $(MAKE) $(AM_MAKEFLAGS) all-am +libradeonsi_la_SOURCES = $(C_SOURCES) +all: all-am .SUFFIXES: .SUFFIXES: .c .lo .o .obj @@ -684,6 +675,8 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/si_pipe.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/si_pm4.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/si_shader.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/si_shader_tgsi_alu.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/si_shader_tgsi_setup.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/si_state.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/si_state_draw.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/si_state_shaders.Plo@am__quote@ @@ -802,12 +795,10 @@ fi; \ done check-am: all-am -check: $(BUILT_SOURCES) - $(MAKE) $(AM_MAKEFLAGS) check-am +check: check-am all-am: Makefile $(LTLIBRARIES) installdirs: -install: $(BUILT_SOURCES) - $(MAKE) $(AM_MAKEFLAGS) install-am +install: install-am install-exec: install-exec-am install-data: install-data-am uninstall: uninstall-am @@ -837,7 +828,6 @@ maintainer-clean-generic: @echo "This command is intended for maintainers to use" @echo "it deletes files that may require special tools to rebuild." - -test -z "$(BUILT_SOURCES)" || rm -f $(BUILT_SOURCES) clean: clean-am clean-am: clean-generic clean-libtool clean-noinstLTLIBRARIES \ @@ -909,7 +899,7 @@ uninstall-am: -.MAKE: all check install install-am install-strip +.MAKE: install-am install-strip .PHONY: CTAGS GTAGS TAGS all all-am check check-am clean clean-generic \ clean-libtool clean-noinstLTLIBRARIES cscopelist-am ctags \ @@ -928,9 +918,6 @@ .PRECIOUS: Makefile -sid_tables.h: $(srcdir)/sid_tables.py $(srcdir)/sid.h - $(AM_V_GEN) $(PYTHON2) $(srcdir)/sid_tables.py $(srcdir)/sid.h > $@ - # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/Makefile.sources mesa-17.0.7/src/gallium/drivers/radeonsi/Makefile.sources --- mesa-12.0.6/src/gallium/drivers/radeonsi/Makefile.sources 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/Makefile.sources 2017-06-01 10:37:10.000000000 +0000 @@ -5,7 +5,6 @@ si_cp_dma.c \ si_debug.c \ si_descriptors.c \ - sid.h \ si_dma.c \ si_hw_context.c \ si_pipe.c \ @@ -16,11 +15,11 @@ si_public.h \ si_shader.c \ si_shader.h \ + si_shader_internal.h \ + si_shader_tgsi_alu.c \ + si_shader_tgsi_setup.c \ si_state.c \ si_state_draw.c \ si_state_shaders.c \ si_state.h \ si_uvd.c - -GENERATED_SOURCES := \ - sid_tables.h diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/si_blit.c mesa-17.0.7/src/gallium/drivers/radeonsi/si_blit.c --- mesa-12.0.6/src/gallium/drivers/radeonsi/si_blit.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/si_blit.c 2017-06-01 10:37:10.000000000 +0000 @@ -78,7 +78,7 @@ if (op & SI_SAVE_TEXTURES) { util_blitter_save_fragment_sampler_states( sctx->blitter, 2, - sctx->samplers[PIPE_SHADER_FRAGMENT].views.sampler_states); + (void**)sctx->samplers[PIPE_SHADER_FRAGMENT].views.sampler_states); util_blitter_save_fragment_sampler_views(sctx->blitter, 2, sctx->samplers[PIPE_SHADER_FRAGMENT].views.views); @@ -100,67 +100,99 @@ return r->nr_samples ? r->nr_samples - 1 : 0; } -static void si_blit_decompress_depth(struct pipe_context *ctx, - struct r600_texture *texture, - struct r600_texture *staging, - unsigned first_level, unsigned last_level, - unsigned first_layer, unsigned last_layer, - unsigned first_sample, unsigned last_sample) -{ - struct si_context *sctx = (struct si_context *)ctx; - unsigned layer, level, sample, checked_last_layer, max_layer; - float depth = 1.0f; - const struct util_format_description *desc; - - assert(staging != NULL && "use si_blit_decompress_zs_in_place instead"); +static unsigned +si_blit_dbcb_copy(struct si_context *sctx, + struct r600_texture *src, + struct r600_texture *dst, + unsigned planes, unsigned level_mask, + unsigned first_layer, unsigned last_layer, + unsigned first_sample, unsigned last_sample) +{ + struct pipe_surface surf_tmpl = {{0}}; + unsigned layer, sample, checked_last_layer, max_layer; + unsigned fully_copied_levels = 0; - desc = util_format_description(staging->resource.b.b.format); - - if (util_format_has_depth(desc)) + if (planes & PIPE_MASK_Z) sctx->dbcb_depth_copy_enabled = true; - if (util_format_has_stencil(desc)) + if (planes & PIPE_MASK_S) sctx->dbcb_stencil_copy_enabled = true; + si_mark_atom_dirty(sctx, &sctx->db_render_state); assert(sctx->dbcb_depth_copy_enabled || sctx->dbcb_stencil_copy_enabled); - for (level = first_level; level <= last_level; level++) { + while (level_mask) { + unsigned level = u_bit_scan(&level_mask); + /* The smaller the mipmap level, the less layers there are * as far as 3D textures are concerned. */ - max_layer = util_max_layer(&texture->resource.b.b, level); + max_layer = util_max_layer(&src->resource.b.b, level); checked_last_layer = MIN2(last_layer, max_layer); + surf_tmpl.u.tex.level = level; + for (layer = first_layer; layer <= checked_last_layer; layer++) { - for (sample = first_sample; sample <= last_sample; sample++) { - struct pipe_surface *zsurf, *cbsurf, surf_tmpl; + struct pipe_surface *zsurf, *cbsurf; - sctx->dbcb_copy_sample = sample; - si_mark_atom_dirty(sctx, &sctx->db_render_state); + surf_tmpl.format = src->resource.b.b.format; + surf_tmpl.u.tex.first_layer = layer; + surf_tmpl.u.tex.last_layer = layer; - surf_tmpl.format = texture->resource.b.b.format; - surf_tmpl.u.tex.level = level; - surf_tmpl.u.tex.first_layer = layer; - surf_tmpl.u.tex.last_layer = layer; + zsurf = sctx->b.b.create_surface(&sctx->b.b, &src->resource.b.b, &surf_tmpl); - zsurf = ctx->create_surface(ctx, &texture->resource.b.b, &surf_tmpl); + surf_tmpl.format = dst->resource.b.b.format; + cbsurf = sctx->b.b.create_surface(&sctx->b.b, &dst->resource.b.b, &surf_tmpl); - surf_tmpl.format = staging->resource.b.b.format; - cbsurf = ctx->create_surface(ctx, - (struct pipe_resource*)staging, &surf_tmpl); + for (sample = first_sample; sample <= last_sample; sample++) { + if (sample != sctx->dbcb_copy_sample) { + sctx->dbcb_copy_sample = sample; + si_mark_atom_dirty(sctx, &sctx->db_render_state); + } - si_blitter_begin(ctx, SI_DECOMPRESS); + si_blitter_begin(&sctx->b.b, SI_DECOMPRESS); util_blitter_custom_depth_stencil(sctx->blitter, zsurf, cbsurf, 1 << sample, - sctx->custom_dsa_flush, depth); - si_blitter_end(ctx); - - pipe_surface_reference(&zsurf, NULL); - pipe_surface_reference(&cbsurf, NULL); + sctx->custom_dsa_flush, 1.0f); + si_blitter_end(&sctx->b.b); } + + pipe_surface_reference(&zsurf, NULL); + pipe_surface_reference(&cbsurf, NULL); } + + if (first_layer == 0 && last_layer >= max_layer && + first_sample == 0 && last_sample >= u_max_sample(&src->resource.b.b)) + fully_copied_levels |= 1u << level; } sctx->dbcb_depth_copy_enabled = false; sctx->dbcb_stencil_copy_enabled = false; si_mark_atom_dirty(sctx, &sctx->db_render_state); + + return fully_copied_levels; +} + +static void si_blit_decompress_depth(struct pipe_context *ctx, + struct r600_texture *texture, + struct r600_texture *staging, + unsigned first_level, unsigned last_level, + unsigned first_layer, unsigned last_layer, + unsigned first_sample, unsigned last_sample) +{ + const struct util_format_description *desc; + unsigned planes = 0; + + assert(staging != NULL && "use si_blit_decompress_zs_in_place instead"); + + desc = util_format_description(staging->resource.b.b.format); + + if (util_format_has_depth(desc)) + planes |= PIPE_MASK_Z; + if (util_format_has_stencil(desc)) + planes |= PIPE_MASK_S; + + si_blit_dbcb_copy( + (struct si_context *)ctx, texture, staging, planes, + u_bit_consecutive(first_level, last_level - first_level + 1), + first_layer, last_layer, first_sample, last_sample); } /* Helper function for si_blit_decompress_zs_in_place. @@ -213,7 +245,7 @@ /* The texture will always be dirty if some layers aren't flushed. * I don't think this case occurs often though. */ - if (first_layer == 0 && last_layer == max_layer) { + if (first_layer == 0 && last_layer >= max_layer) { fully_decompressed_mask |= 1u << level; } } @@ -228,52 +260,123 @@ si_mark_atom_dirty(sctx, &sctx->db_render_state); } -/* Decompress Z and/or S planes in place, depending on mask. +/* Helper function of si_flush_depth_texture: decompress the given levels + * of Z and/or S planes in place. */ static void si_blit_decompress_zs_in_place(struct si_context *sctx, struct r600_texture *texture, - unsigned planes, - unsigned first_level, unsigned last_level, + unsigned levels_z, unsigned levels_s, unsigned first_layer, unsigned last_layer) { - unsigned level_mask = - u_bit_consecutive(first_level, last_level - first_level + 1); - unsigned cur_level_mask; + unsigned both = levels_z & levels_s; /* First, do combined Z & S decompresses for levels that need it. */ - if (planes == (PIPE_MASK_Z | PIPE_MASK_S)) { - cur_level_mask = - level_mask & - texture->dirty_level_mask & - texture->stencil_dirty_level_mask; + if (both) { si_blit_decompress_zs_planes_in_place( sctx, texture, PIPE_MASK_Z | PIPE_MASK_S, - cur_level_mask, + both, first_layer, last_layer); - level_mask &= ~cur_level_mask; + levels_z &= ~both; + levels_s &= ~both; } /* Now do separate Z and S decompresses. */ - if (planes & PIPE_MASK_Z) { - cur_level_mask = level_mask & texture->dirty_level_mask; + if (levels_z) { si_blit_decompress_zs_planes_in_place( sctx, texture, PIPE_MASK_Z, - cur_level_mask, + levels_z, first_layer, last_layer); - level_mask &= ~cur_level_mask; } - if (planes & PIPE_MASK_S) { - cur_level_mask = level_mask & texture->stencil_dirty_level_mask; + if (levels_s) { si_blit_decompress_zs_planes_in_place( sctx, texture, PIPE_MASK_S, - cur_level_mask, + levels_s, first_layer, last_layer); } } static void +si_flush_depth_texture(struct si_context *sctx, + struct r600_texture *tex, + unsigned required_planes, + unsigned first_level, unsigned last_level, + unsigned first_layer, unsigned last_layer) +{ + unsigned inplace_planes = 0; + unsigned copy_planes = 0; + unsigned level_mask = u_bit_consecutive(first_level, last_level - first_level + 1); + unsigned levels_z = 0; + unsigned levels_s = 0; + + if (required_planes & PIPE_MASK_Z) { + levels_z = level_mask & tex->dirty_level_mask; + + if (levels_z) { + if (r600_can_sample_zs(tex, false)) + inplace_planes |= PIPE_MASK_Z; + else + copy_planes |= PIPE_MASK_Z; + } + } + if (required_planes & PIPE_MASK_S) { + levels_s = level_mask & tex->stencil_dirty_level_mask; + + if (levels_s) { + if (r600_can_sample_zs(tex, true)) + inplace_planes |= PIPE_MASK_S; + else + copy_planes |= PIPE_MASK_S; + } + } + + assert(!tex->tc_compatible_htile || levels_z == 0); + + /* We may have to allocate the flushed texture here when called from + * si_decompress_subresource. + */ + if (copy_planes && + (tex->flushed_depth_texture || + r600_init_flushed_depth_texture(&sctx->b.b, &tex->resource.b.b, NULL))) { + struct r600_texture *dst = tex->flushed_depth_texture; + unsigned fully_copied_levels; + unsigned levels = 0; + + assert(tex->flushed_depth_texture); + + if (util_format_is_depth_and_stencil(dst->resource.b.b.format)) + copy_planes = PIPE_MASK_Z | PIPE_MASK_S; + + if (copy_planes & PIPE_MASK_Z) { + levels |= levels_z; + levels_z = 0; + } + if (copy_planes & PIPE_MASK_S) { + levels |= levels_s; + levels_s = 0; + } + + fully_copied_levels = si_blit_dbcb_copy( + sctx, tex, dst, copy_planes, levels, + first_layer, last_layer, + 0, u_max_sample(&tex->resource.b.b)); + + if (copy_planes & PIPE_MASK_Z) + tex->dirty_level_mask &= ~fully_copied_levels; + if (copy_planes & PIPE_MASK_S) + tex->stencil_dirty_level_mask &= ~fully_copied_levels; + } + + if (inplace_planes) { + si_blit_decompress_zs_in_place( + sctx, tex, + levels_z, levels_s, + first_layer, last_layer); + } +} + +static void si_flush_depth_textures(struct si_context *sctx, struct si_textures_info *textures) { @@ -292,13 +395,13 @@ sview = (struct si_sampler_view*)view; tex = (struct r600_texture *)view->texture; - assert(tex->is_depth && !tex->is_flushing_texture); + assert(tex->db_compatible); - si_blit_decompress_zs_in_place(sctx, tex, - sview->is_stencil_sampler ? PIPE_MASK_S - : PIPE_MASK_Z, - view->u.tex.first_level, view->u.tex.last_level, - 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level)); + si_flush_depth_texture( + sctx, tex, + sview->is_stencil_sampler ? PIPE_MASK_S : PIPE_MASK_Z, + view->u.tex.first_level, view->u.tex.last_level, + 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level)); } } @@ -321,6 +424,13 @@ if (rtex->dcc_offset && need_dcc_decompress) { custom_blend = sctx->custom_blend_dcc_decompress; + + /* disable levels without DCC */ + for (int i = first_level; i <= last_level; i++) { + if (!rtex->dcc_offset || + i >= rtex->surface.num_dcc_levels) + level_mask &= ~(1 << i); + } } else if (rtex->fmask.size) { custom_blend = sctx->custom_blend_decompress; } else { @@ -353,7 +463,7 @@ /* The texture will always be dirty if some layers aren't flushed. * I don't think this case occurs often though. */ - if (first_layer == 0 && last_layer == max_layer) { + if (first_layer == 0 && last_layer >= max_layer) { rtex->dirty_level_mask &= ~(1 << level); } } @@ -414,10 +524,103 @@ } } -static void si_decompress_textures(struct si_context *sctx, int shader_start, - int shader_end) +static void si_check_render_feedback_textures(struct si_context *sctx, + struct si_textures_info *textures) { - unsigned compressed_colortex_counter; + uint32_t mask = textures->views.enabled_mask; + + while (mask) { + const struct pipe_sampler_view *view; + struct r600_texture *tex; + bool render_feedback = false; + + unsigned i = u_bit_scan(&mask); + + view = textures->views.views[i]; + if(view->texture->target == PIPE_BUFFER) + continue; + + tex = (struct r600_texture *)view->texture; + if (!tex->dcc_offset) + continue; + + for (unsigned j = 0; j < sctx->framebuffer.state.nr_cbufs; ++j) { + struct r600_surface * surf; + + if (!sctx->framebuffer.state.cbufs[j]) + continue; + + surf = (struct r600_surface*)sctx->framebuffer.state.cbufs[j]; + + if (tex == (struct r600_texture*)surf->base.texture && + surf->base.u.tex.level >= view->u.tex.first_level && + surf->base.u.tex.level <= view->u.tex.last_level && + surf->base.u.tex.first_layer <= view->u.tex.last_layer && + surf->base.u.tex.last_layer >= view->u.tex.first_layer) + render_feedback = true; + } + + if (render_feedback) + r600_texture_disable_dcc(&sctx->b, tex); + } +} + +static void si_check_render_feedback_images(struct si_context *sctx, + struct si_images_info *images) +{ + uint32_t mask = images->enabled_mask; + + while (mask) { + const struct pipe_image_view *view; + struct r600_texture *tex; + bool render_feedback = false; + + unsigned i = u_bit_scan(&mask); + + view = &images->views[i]; + if (view->resource->target == PIPE_BUFFER) + continue; + + tex = (struct r600_texture *)view->resource; + if (!tex->dcc_offset) + continue; + + for (unsigned j = 0; j < sctx->framebuffer.state.nr_cbufs; ++j) { + struct r600_surface * surf; + + if (!sctx->framebuffer.state.cbufs[j]) + continue; + + surf = (struct r600_surface*)sctx->framebuffer.state.cbufs[j]; + + if (tex == (struct r600_texture*)surf->base.texture && + surf->base.u.tex.level == view->u.tex.level && + surf->base.u.tex.first_layer <= view->u.tex.last_layer && + surf->base.u.tex.last_layer >= view->u.tex.first_layer) + render_feedback = true; + } + + if (render_feedback) + r600_texture_disable_dcc(&sctx->b, tex); + } +} + +static void si_check_render_feedback(struct si_context *sctx) +{ + + if (!sctx->need_check_render_feedback) + return; + + for (int i = 0; i < SI_NUM_SHADERS; ++i) { + si_check_render_feedback_images(sctx, &sctx->images[i]); + si_check_render_feedback_textures(sctx, &sctx->samplers[i]); + } + sctx->need_check_render_feedback = false; +} + +static void si_decompress_textures(struct si_context *sctx, unsigned shader_mask) +{ + unsigned compressed_colortex_counter, mask; if (sctx->blitter->running) return; @@ -429,8 +632,11 @@ si_update_compressed_colortex_masks(sctx); } - /* Flush depth textures which need to be flushed. */ - for (int i = shader_start; i < shader_end; i++) { + /* Decompress color & depth textures if needed. */ + mask = sctx->compressed_tex_shader_mask & shader_mask; + while (mask) { + unsigned i = u_bit_scan(&mask); + if (sctx->samplers[i].depth_texture_mask) { si_flush_depth_textures(sctx, &sctx->samplers[i]); } @@ -441,16 +647,18 @@ si_decompress_image_color_textures(sctx, &sctx->images[i]); } } + + si_check_render_feedback(sctx); } void si_decompress_graphics_textures(struct si_context *sctx) { - si_decompress_textures(sctx, 0, SI_NUM_GRAPHICS_SHADERS); + si_decompress_textures(sctx, u_bit_consecutive(0, SI_NUM_GRAPHICS_SHADERS)); } void si_decompress_compute_textures(struct si_context *sctx) { - si_decompress_textures(sctx, SI_NUM_GRAPHICS_SHADERS, SI_NUM_SHADERS); + si_decompress_textures(sctx, 1 << PIPE_SHADER_COMPUTE); } static void si_clear(struct pipe_context *ctx, unsigned buffers, @@ -496,7 +704,10 @@ zsbuf->u.tex.level == 0 && zsbuf->u.tex.first_layer == 0 && zsbuf->u.tex.last_layer == util_max_layer(&zstex->resource.b.b, 0)) { - if (buffers & PIPE_CLEAR_DEPTH) { + /* TC-compatible HTILE only supports depth clears to 0 or 1. */ + if (buffers & PIPE_CLEAR_DEPTH && + (!zstex->tc_compatible_htile || + depth == 0 || depth == 1)) { /* Need to disable EXPCLEAR temporarily if clearing * to a new value. */ if (!zstex->depth_cleared || zstex->depth_clear_value != depth) { @@ -510,7 +721,9 @@ si_mark_atom_dirty(sctx, &sctx->db_render_state); } - if (buffers & PIPE_CLEAR_STENCIL) { + /* TC-compatible HTILE only supports stencil clears to 0. */ + if (buffers & PIPE_CLEAR_STENCIL && + (!zstex->tc_compatible_htile || stencil == 0)) { stencil &= 0xff; /* Need to disable EXPCLEAR temporarily if clearing @@ -552,11 +765,13 @@ struct pipe_surface *dst, const union pipe_color_union *color, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct si_context *sctx = (struct si_context *)ctx; - si_blitter_begin(ctx, SI_CLEAR_SURFACE); + si_blitter_begin(ctx, SI_CLEAR_SURFACE | + (render_condition_enabled ? 0 : SI_DISABLE_RENDER_COND)); util_blitter_clear_render_target(sctx->blitter, dst, color, dstx, dsty, width, height); si_blitter_end(ctx); @@ -568,11 +783,13 @@ double depth, unsigned stencil, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct si_context *sctx = (struct si_context *)ctx; - si_blitter_begin(ctx, SI_CLEAR_SURFACE); + si_blitter_begin(ctx, SI_CLEAR_SURFACE | + (render_condition_enabled ? 0 : SI_DISABLE_RENDER_COND)); util_blitter_clear_depth_stencil(sctx->blitter, dst, clear_flags, depth, stencil, dstx, dsty, width, height); si_blitter_end(ctx); @@ -590,15 +807,15 @@ struct si_context *sctx = (struct si_context *)ctx; struct r600_texture *rtex = (struct r600_texture*)tex; - if (rtex->is_depth && !rtex->is_flushing_texture) { + if (rtex->db_compatible) { planes &= PIPE_MASK_Z | PIPE_MASK_S; if (!(rtex->surface.flags & RADEON_SURF_SBUFFER)) planes &= ~PIPE_MASK_S; - si_blit_decompress_zs_in_place(sctx, rtex, planes, - level, level, - first_layer, last_layer); + si_flush_depth_texture(sctx, rtex, planes, + level, level, + first_layer, last_layer); } else if (rtex->fmask.size || rtex->cmask.size || rtex->dcc_offset) { si_blit_decompress_color(ctx, rtex, level, level, first_layer, last_layer, false); @@ -624,6 +841,7 @@ const struct pipe_box *src_box) { struct si_context *sctx = (struct si_context *)ctx; + struct r600_texture *rsrc = (struct r600_texture*)src; struct pipe_surface *dst_view, dst_templ; struct pipe_sampler_view src_templ, *src_view; unsigned dst_width, dst_height, src_width0, src_height0; @@ -632,7 +850,7 @@ /* Handle buffers first. */ if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) { - si_copy_buffer(sctx, dst, src, dstx, src_box->x, src_box->width); + si_copy_buffer(sctx, dst, src, dstx, src_box->x, src_box->width, 0); return; } @@ -653,7 +871,7 @@ if (util_format_is_compressed(src->format) || util_format_is_compressed(dst->format)) { - unsigned blocksize = util_format_get_blocksize(src->format); + unsigned blocksize = rsrc->surface.bpe; if (blocksize == 8) src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT; /* 64-bit block */ @@ -695,7 +913,7 @@ sbox.width = util_format_get_nblocksx(src->format, src_box->width); src_box = &sbox; } else { - unsigned blocksize = util_format_get_blocksize(src->format); + unsigned blocksize = rsrc->surface.bpe; switch (blocksize) { case 1: @@ -743,58 +961,34 @@ util_blitter_blit_generic(sctx->blitter, dst_view, &dstbox, src_view, src_box, src_width0, src_height0, PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL, - FALSE); + false); si_blitter_end(ctx); pipe_surface_reference(&dst_view, NULL); pipe_sampler_view_reference(&src_view, NULL); } -/* For MSAA integer resolving to work, we change the format to NORM using this function. */ -static enum pipe_format int_to_norm_format(enum pipe_format format) -{ - switch (format) { -#define REPLACE_FORMAT_SIGN(format,sign) \ - case PIPE_FORMAT_##format##_##sign##INT: \ - return PIPE_FORMAT_##format##_##sign##NORM -#define REPLACE_FORMAT(format) \ - REPLACE_FORMAT_SIGN(format, U); \ - REPLACE_FORMAT_SIGN(format, S) - - REPLACE_FORMAT_SIGN(B10G10R10A2, U); - REPLACE_FORMAT(R8); - REPLACE_FORMAT(R8G8); - REPLACE_FORMAT(R8G8B8X8); - REPLACE_FORMAT(R8G8B8A8); - REPLACE_FORMAT(A8); - REPLACE_FORMAT(I8); - REPLACE_FORMAT(L8); - REPLACE_FORMAT(L8A8); - REPLACE_FORMAT(R16); - REPLACE_FORMAT(R16G16); - REPLACE_FORMAT(R16G16B16X16); - REPLACE_FORMAT(R16G16B16A16); - REPLACE_FORMAT(A16); - REPLACE_FORMAT(I16); - REPLACE_FORMAT(L16); - REPLACE_FORMAT(L16A16); - -#undef REPLACE_FORMAT -#undef REPLACE_FORMAT_SIGN - default: - return format; - } -} - static bool do_hardware_msaa_resolve(struct pipe_context *ctx, const struct pipe_blit_info *info) { struct si_context *sctx = (struct si_context*)ctx; + struct r600_texture *src = (struct r600_texture*)info->src.resource; struct r600_texture *dst = (struct r600_texture*)info->dst.resource; + MAYBE_UNUSED struct r600_texture *rtmp; unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level); unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level); - enum pipe_format format = int_to_norm_format(info->dst.format); + enum pipe_format format = info->src.format; unsigned sample_mask = ~0; + struct pipe_resource *tmp, templ; + struct pipe_blit_info blit; + + /* Check basic requirements for hw resolve. */ + if (!(info->src.resource->nr_samples > 1 && + info->dst.resource->nr_samples <= 1 && + !util_format_is_pure_integer(format) && + !util_format_is_depth_or_stencil(format) && + util_max_layer(info->src.resource, 0) == 0)) + return false; /* Hardware MSAA resolve doesn't work if SPI format = NORM16_ABGR and * the format is R16G16. Use R16A16, which does work. @@ -804,16 +998,12 @@ if (format == PIPE_FORMAT_R16G16_SNORM) format = PIPE_FORMAT_R16A16_SNORM; - if (info->src.resource->nr_samples > 1 && - info->dst.resource->nr_samples <= 1 && - util_max_layer(info->src.resource, 0) == 0 && - util_max_layer(info->dst.resource, info->dst.level) == 0 && - util_is_format_compatible(util_format_description(info->src.format), - util_format_description(info->dst.format)) && - !util_format_is_pure_integer(format) && - !util_format_is_depth_or_stencil(format) && + /* Check the remaining requirements for hw resolve. */ + if (util_max_layer(info->dst.resource, info->dst.level) == 0 && !info->scissor_enable && (info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA && + util_is_format_compatible(util_format_description(info->src.format), + util_format_description(info->dst.format)) && dst_width == info->src.resource->width0 && dst_height == info->src.resource->height0 && info->dst.box.x == 0 && @@ -826,10 +1016,31 @@ info->src.box.width == dst_width && info->src.box.height == dst_height && info->src.box.depth == 1 && - dst->surface.level[info->dst.level].mode >= RADEON_SURF_MODE_1D && - !(dst->surface.flags & RADEON_SURF_SCANOUT) && - (!dst->cmask.size || !dst->dirty_level_mask) && /* dst cannot be fast-cleared */ - !dst->dcc_offset) { + !dst->surface.is_linear && + (!dst->cmask.size || !dst->dirty_level_mask)) { /* dst cannot be fast-cleared */ + /* Check the last constraint. */ + if (src->surface.micro_tile_mode != dst->surface.micro_tile_mode) { + /* The next fast clear will switch to this mode to + * get direct hw resolve next time if the mode is + * different now. + */ + src->last_msaa_resolve_target_micro_mode = + dst->surface.micro_tile_mode; + goto resolve_to_temp; + } + + /* Resolving into a surface with DCC is unsupported. Since + * it's being overwritten anyway, clear it to uncompressed. + * This is still the fastest codepath even with this clear. + */ + if (dst->dcc_offset && + info->dst.level < dst->surface.num_dcc_levels) { + vi_dcc_clear_level(&sctx->b, dst, info->dst.level, + 0xFFFFFFFF); + dst->dirty_level_mask &= ~(1 << info->dst.level); + } + + /* Resolve directly from src to dst. */ si_blitter_begin(ctx, SI_COLOR_RESOLVE | (info->render_condition_enable ? 0 : SI_DISABLE_RENDER_COND)); util_blitter_custom_resolve_color(sctx->blitter, @@ -841,22 +1052,96 @@ si_blitter_end(ctx); return true; } - return false; + +resolve_to_temp: + /* Shader-based resolve is VERY SLOW. Instead, resolve into + * a temporary texture and blit. + */ + memset(&templ, 0, sizeof(templ)); + templ.target = PIPE_TEXTURE_2D; + templ.format = info->src.resource->format; + templ.width0 = info->src.resource->width0; + templ.height0 = info->src.resource->height0; + templ.depth0 = 1; + templ.array_size = 1; + templ.usage = PIPE_USAGE_DEFAULT; + templ.flags = R600_RESOURCE_FLAG_FORCE_TILING | + R600_RESOURCE_FLAG_DISABLE_DCC; + + /* The src and dst microtile modes must be the same. */ + if (src->surface.micro_tile_mode == RADEON_MICRO_MODE_DISPLAY) + templ.bind = PIPE_BIND_SCANOUT; + else + templ.bind = 0; + + tmp = ctx->screen->resource_create(ctx->screen, &templ); + if (!tmp) + return false; + rtmp = (struct r600_texture*)tmp; + + assert(!rtmp->surface.is_linear); + assert(src->surface.micro_tile_mode == rtmp->surface.micro_tile_mode); + + /* resolve */ + si_blitter_begin(ctx, SI_COLOR_RESOLVE | + (info->render_condition_enable ? 0 : SI_DISABLE_RENDER_COND)); + util_blitter_custom_resolve_color(sctx->blitter, tmp, 0, 0, + info->src.resource, info->src.box.z, + sample_mask, sctx->custom_blend_resolve, + format); + si_blitter_end(ctx); + + /* blit */ + blit = *info; + blit.src.resource = tmp; + blit.src.box.z = 0; + + si_blitter_begin(ctx, SI_BLIT | + (info->render_condition_enable ? 0 : SI_DISABLE_RENDER_COND)); + util_blitter_blit(sctx->blitter, &blit); + si_blitter_end(ctx); + + pipe_resource_reference(&tmp, NULL); + return true; } static void si_blit(struct pipe_context *ctx, const struct pipe_blit_info *info) { struct si_context *sctx = (struct si_context*)ctx; + struct r600_texture *rdst = (struct r600_texture *)info->dst.resource; if (do_hardware_msaa_resolve(ctx, info)) { return; } + /* Using SDMA for copying to a linear texture in GTT is much faster. + * This improves DRI PRIME performance. + * + * resource_copy_region can't do this yet, because dma_copy calls it + * on failure (recursion). + */ + if (rdst->surface.is_linear && + sctx->b.dma_copy && + util_can_blit_via_copy_region(info, false)) { + sctx->b.dma_copy(ctx, info->dst.resource, info->dst.level, + info->dst.box.x, info->dst.box.y, + info->dst.box.z, + info->src.resource, info->src.level, + &info->src.box); + return; + } + assert(util_blitter_is_blit_supported(sctx->blitter, info)); /* The driver doesn't decompress resources automatically while * u_blitter is rendering. */ + vi_dcc_disable_if_incompatible_format(&sctx->b, info->src.resource, + info->src.level, + info->src.format); + vi_dcc_disable_if_incompatible_format(&sctx->b, info->dst.resource, + info->dst.level, + info->dst.format); si_decompress_subresource(ctx, info->src.resource, info->mask, info->src.level, info->src.box.z, @@ -872,16 +1157,61 @@ si_blitter_end(ctx); } +static boolean si_generate_mipmap(struct pipe_context *ctx, + struct pipe_resource *tex, + enum pipe_format format, + unsigned base_level, unsigned last_level, + unsigned first_layer, unsigned last_layer) +{ + struct si_context *sctx = (struct si_context*)ctx; + struct r600_texture *rtex = (struct r600_texture *)tex; + + if (!util_blitter_is_copy_supported(sctx->blitter, tex, tex)) + return false; + + /* The driver doesn't decompress resources automatically while + * u_blitter is rendering. */ + vi_dcc_disable_if_incompatible_format(&sctx->b, tex, base_level, + format); + si_decompress_subresource(ctx, tex, PIPE_MASK_RGBAZS, + base_level, first_layer, last_layer); + + /* Clear dirty_level_mask for the levels that will be overwritten. */ + assert(base_level < last_level); + rtex->dirty_level_mask &= ~u_bit_consecutive(base_level + 1, + last_level - base_level); + + si_blitter_begin(ctx, SI_BLIT | SI_DISABLE_RENDER_COND); + util_blitter_generate_mipmap(sctx->blitter, tex, format, + base_level, last_level, + first_layer, last_layer); + si_blitter_end(ctx); + return true; +} + static void si_flush_resource(struct pipe_context *ctx, struct pipe_resource *res) { struct r600_texture *rtex = (struct r600_texture*)res; assert(res->target != PIPE_BUFFER); + assert(!rtex->dcc_separate_buffer || rtex->dcc_gather_statistics); + + /* st/dri calls flush twice per frame (not a bug), this prevents double + * decompression. */ + if (rtex->dcc_separate_buffer && !rtex->separate_dcc_dirty) + return; if (!rtex->is_depth && (rtex->cmask.size || rtex->dcc_offset)) { si_blit_decompress_color(ctx, rtex, 0, res->last_level, - 0, util_max_layer(res, 0), false); + 0, util_max_layer(res, 0), + rtex->dcc_separate_buffer != NULL); + } + + /* Always do the analysis even if DCC is disabled at the moment. */ + if (rtex->dcc_gather_statistics && rtex->separate_dcc_dirty) { + rtex->separate_dcc_dirty = false; + vi_separate_dcc_process_and_reset_stats(ctx, rtex); } } @@ -965,6 +1295,7 @@ sctx->b.b.resource_copy_region = si_resource_copy_region; sctx->b.b.blit = si_blit; sctx->b.b.flush_resource = si_flush_resource; + sctx->b.b.generate_mipmap = si_generate_mipmap; sctx->b.blit_decompress_depth = si_blit_decompress_depth; sctx->b.decompress_dcc = si_decompress_dcc; } diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/si_compute.c mesa-17.0.7/src/gallium/drivers/radeonsi/si_compute.c --- mesa-12.0.6/src/gallium/drivers/radeonsi/si_compute.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/si_compute.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,16 +25,14 @@ #include "tgsi/tgsi_parse.h" #include "util/u_memory.h" #include "util/u_upload_mgr.h" -#include "radeon/r600_pipe_common.h" #include "radeon/radeon_elf_util.h" -#include "radeon/radeon_llvm_util.h" +#include "amd_kernel_code_t.h" #include "radeon/r600_cs.h" #include "si_pipe.h" -#include "si_shader.h" #include "sid.h" -#define MAX_GLOBAL_BUFFERS 20 +#define MAX_GLOBAL_BUFFERS 22 struct si_compute { unsigned ir_type; @@ -44,8 +42,53 @@ struct si_shader shader; struct pipe_resource *global_buffers[MAX_GLOBAL_BUFFERS]; + unsigned use_code_object_v2 : 1; + unsigned variable_group_size : 1; }; +struct dispatch_packet { + uint16_t header; + uint16_t setup; + uint16_t workgroup_size_x; + uint16_t workgroup_size_y; + uint16_t workgroup_size_z; + uint16_t reserved0; + uint32_t grid_size_x; + uint32_t grid_size_y; + uint32_t grid_size_z; + uint32_t private_segment_size; + uint32_t group_segment_size; + uint64_t kernel_object; + uint64_t kernarg_address; + uint64_t reserved2; +}; + +static const amd_kernel_code_t *si_compute_get_code_object( + const struct si_compute *program, + uint64_t symbol_offset) +{ + if (!program->use_code_object_v2) { + return NULL; + } + return (const amd_kernel_code_t*) + (program->shader.binary.code + symbol_offset); +} + +static void code_object_to_config(const amd_kernel_code_t *code_object, + struct si_shader_config *out_config) { + + uint32_t rsrc1 = code_object->compute_pgm_resource_registers; + uint32_t rsrc2 = code_object->compute_pgm_resource_registers >> 32; + out_config->num_sgprs = code_object->wavefront_sgpr_count; + out_config->num_vgprs = code_object->workitem_vgpr_count; + out_config->float_mode = G_00B028_FLOAT_MODE(rsrc1); + out_config->rsrc1 = rsrc1; + out_config->lds_size = MAX2(out_config->lds_size, G_00B84C_LDS_SIZE(rsrc2)); + out_config->rsrc2 = rsrc2; + out_config->scratch_bytes_per_wave = + align(code_object->workitem_private_segment_byte_size * 64, 1024); +} + static void *si_create_compute_state( struct pipe_context *ctx, const struct pipe_compute_state *cso) @@ -60,6 +103,8 @@ program->local_size = cso->req_local_mem; program->private_size = cso->req_private_mem; program->input_size = cso->req_input_mem; + program->use_code_object_v2 = HAVE_LLVM >= 0x0400 && + cso->ir_type == PIPE_SHADER_IR_NATIVE; if (cso->ir_type == PIPE_SHADER_IR_TGSI) { @@ -81,6 +126,7 @@ p_atomic_inc(&sscreen->b.num_shaders_created); program->shader.selector = &sel; + program->shader.is_monolithic = true; if (si_shader_create(sscreen, sctx->tm, &program->shader, &sctx->b.debug)) { @@ -103,7 +149,11 @@ S_00B84C_TGID_Z_EN(1) | S_00B84C_TIDIG_COMP_CNT(2) | S_00B84C_LDS_SIZE(shader->config.lds_size); + program->variable_group_size = + sel.info.properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH] == 0; + FREE(sel.tokens); + program->shader.selector = NULL; } else { const struct pipe_llvm_program_header *header; const char *code; @@ -111,11 +161,21 @@ code = cso->prog + sizeof(struct pipe_llvm_program_header); radeon_elf_read(code, header->num_bytes, &program->shader.binary); - si_shader_binary_read_config(&program->shader.binary, - &program->shader.config, 0); + if (program->use_code_object_v2) { + const amd_kernel_code_t *code_object = + si_compute_get_code_object(program, 0); + code_object_to_config(code_object, &program->shader.config); + } else { + si_shader_binary_read_config(&program->shader.binary, + &program->shader.config, 0); + } si_shader_dump(sctx->screen, &program->shader, &sctx->b.debug, - PIPE_SHADER_COMPUTE, stderr); - si_shader_binary_upload(sctx->screen, &program->shader); + PIPE_SHADER_COMPUTE, stderr, true); + if (si_shader_binary_upload(sctx->screen, &program->shader) < 0) { + fprintf(stderr, "LLVM failed to upload shader\n"); + FREE(program); + return NULL; + } } return program; @@ -136,17 +196,19 @@ struct si_context *sctx = (struct si_context*)ctx; struct si_compute *program = sctx->cs_shader_state.program; + assert(first + n <= MAX_GLOBAL_BUFFERS); + if (!resources) { - for (i = first; i < first + n; i++) { - pipe_resource_reference(&program->global_buffers[i], NULL); + for (i = 0; i < n; i++) { + pipe_resource_reference(&program->global_buffers[first + i], NULL); } return; } - for (i = first; i < first + n; i++) { + for (i = 0; i < n; i++) { uint64_t va; uint32_t offset; - pipe_resource_reference(&program->global_buffers[i], resources[i]); + pipe_resource_reference(&program->global_buffers[first + i], resources[i]); va = r600_resource(resources[i])->gpu_address; offset = util_le32_to_cpu(*handles[i]); va += offset; @@ -165,8 +227,7 @@ radeon_emit(cs, 0); radeon_emit(cs, 0); - radeon_set_sh_reg_seq(cs, R_00B854_COMPUTE_RESOURCE_LIMITS, 3); - radeon_emit(cs, 0); + radeon_set_sh_reg_seq(cs, R_00B858_COMPUTE_STATIC_THREAD_MGMT_SE0, 2); /* R_00B858_COMPUTE_STATIC_THREAD_MGMT_SE0 / SE1 */ radeon_emit(cs, S_00B858_SH0_CU_EN(0xffff) | S_00B858_SH1_CU_EN(0xffff)); radeon_emit(cs, S_00B85C_SH0_CU_EN(0xffff) | S_00B85C_SH1_CU_EN(0xffff)); @@ -225,13 +286,11 @@ scratch_bo_size = sctx->compute_scratch_buffer->b.b.width0; if (scratch_bo_size < scratch_needed) { - pipe_resource_reference( - (struct pipe_resource**)&sctx->compute_scratch_buffer, - NULL); - - sctx->compute_scratch_buffer = - si_resource_create_custom(&sctx->screen->b.b, - PIPE_USAGE_DEFAULT, scratch_needed); + r600_resource_reference(&sctx->compute_scratch_buffer, NULL); + + sctx->compute_scratch_buffer = (struct r600_resource*) + pipe_buffer_create(&sctx->screen->b.b, 0, + PIPE_USAGE_DEFAULT, scratch_needed); if (!sctx->compute_scratch_buffer) return false; @@ -254,7 +313,9 @@ static bool si_switch_compute_shader(struct si_context *sctx, struct si_compute *program, - struct si_shader *shader, unsigned offset) + struct si_shader *shader, + const amd_kernel_code_t *code_object, + unsigned offset) { struct radeon_winsys_cs *cs = sctx->b.gfx.cs; struct si_shader_config inline_config = {0}; @@ -271,7 +332,11 @@ unsigned lds_blocks; config = &inline_config; - si_shader_binary_read_config(&shader->binary, config, offset); + if (code_object) { + code_object_to_config(code_object, config); + } else { + si_shader_binary_read_config(&shader->binary, config, offset); + } lds_blocks = config->lds_size; /* XXX: We are over allocating LDS. For SI, the shader reports @@ -285,6 +350,7 @@ lds_blocks += align(program->local_size, 512) >> 9; } + /* TODO: use si_multiwave_lds_size_workaround */ assert(lds_blocks <= 0xFF); config->rsrc2 &= C_00B84C_LDS_SIZE; @@ -307,9 +373,14 @@ } shader_va = shader->bo->gpu_address + offset; + if (program->use_code_object_v2) { + /* Shader code is placed after the amd_kernel_code_t + * struct. */ + shader_va += sizeof(amd_kernel_code_t); + } radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, shader->bo, - RADEON_USAGE_READ, RADEON_PRIO_USER_SHADER); + RADEON_USAGE_READ, RADEON_PRIO_SHADER_BINARY); radeon_set_sh_reg_seq(cs, R_00B830_COMPUTE_PGM_LO, 2); radeon_emit(cs, shader_va >> 8); @@ -319,24 +390,160 @@ radeon_emit(cs, config->rsrc1); radeon_emit(cs, config->rsrc2); + COMPUTE_DBG(sctx->screen, "COMPUTE_PGM_RSRC1: 0x%08x " + "COMPUTE_PGM_RSRC2: 0x%08x\n", config->rsrc1, config->rsrc2); + radeon_set_sh_reg(cs, R_00B860_COMPUTE_TMPRING_SIZE, S_00B860_WAVES(sctx->scratch_waves) | S_00B860_WAVESIZE(config->scratch_bytes_per_wave >> 10)); sctx->cs_shader_state.emitted_program = program; sctx->cs_shader_state.offset = offset; + sctx->cs_shader_state.uses_scratch = + config->scratch_bytes_per_wave != 0; return true; } +static void setup_scratch_rsrc_user_sgprs(struct si_context *sctx, + const amd_kernel_code_t *code_object, + unsigned user_sgpr) +{ + struct radeon_winsys_cs *cs = sctx->b.gfx.cs; + uint64_t scratch_va = sctx->compute_scratch_buffer->gpu_address; + + unsigned max_private_element_size = AMD_HSA_BITS_GET( + code_object->code_properties, + AMD_CODE_PROPERTY_PRIVATE_ELEMENT_SIZE); + + uint32_t scratch_dword0 = scratch_va & 0xffffffff; + uint32_t scratch_dword1 = + S_008F04_BASE_ADDRESS_HI(scratch_va >> 32) | + S_008F04_SWIZZLE_ENABLE(1); + + /* Disable address clamping */ + uint32_t scratch_dword2 = 0xffffffff; + uint32_t scratch_dword3 = + S_008F0C_ELEMENT_SIZE(max_private_element_size) | + S_008F0C_INDEX_STRIDE(3) | + S_008F0C_ADD_TID_ENABLE(1); + + + if (sctx->screen->b.chip_class < VI) { + /* BUF_DATA_FORMAT is ignored, but it cannot be + BUF_DATA_FORMAT_INVALID. */ + scratch_dword3 |= + S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_8); + } + + radeon_set_sh_reg_seq(cs, R_00B900_COMPUTE_USER_DATA_0 + + (user_sgpr * 4), 4); + radeon_emit(cs, scratch_dword0); + radeon_emit(cs, scratch_dword1); + radeon_emit(cs, scratch_dword2); + radeon_emit(cs, scratch_dword3); +} + +static void si_setup_user_sgprs_co_v2(struct si_context *sctx, + const amd_kernel_code_t *code_object, + const struct pipe_grid_info *info, + uint64_t kernel_args_va) +{ + struct si_compute *program = sctx->cs_shader_state.program; + struct radeon_winsys_cs *cs = sctx->b.gfx.cs; + + static const enum amd_code_property_mask_t workgroup_count_masks [] = { + AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_X, + AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_Y, + AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_Z + }; + + unsigned i, user_sgpr = 0; + if (AMD_HSA_BITS_GET(code_object->code_properties, + AMD_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER)) { + if (code_object->workitem_private_segment_byte_size > 0) { + setup_scratch_rsrc_user_sgprs(sctx, code_object, + user_sgpr); + } + user_sgpr += 4; + } + + if (AMD_HSA_BITS_GET(code_object->code_properties, + AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_PTR)) { + struct dispatch_packet dispatch; + unsigned dispatch_offset; + struct r600_resource *dispatch_buf = NULL; + uint64_t dispatch_va; + + /* Upload dispatch ptr */ + memset(&dispatch, 0, sizeof(dispatch)); + + dispatch.workgroup_size_x = info->block[0]; + dispatch.workgroup_size_y = info->block[1]; + dispatch.workgroup_size_z = info->block[2]; + + dispatch.grid_size_x = info->grid[0] * info->block[0]; + dispatch.grid_size_y = info->grid[1] * info->block[1]; + dispatch.grid_size_z = info->grid[2] * info->block[2]; + + dispatch.private_segment_size = program->private_size; + dispatch.group_segment_size = program->local_size; + + dispatch.kernarg_address = kernel_args_va; + + u_upload_data(sctx->b.uploader, 0, sizeof(dispatch), 256, + &dispatch, &dispatch_offset, + (struct pipe_resource**)&dispatch_buf); + + if (!dispatch_buf) { + fprintf(stderr, "Error: Failed to allocate dispatch " + "packet."); + } + radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, dispatch_buf, + RADEON_USAGE_READ, RADEON_PRIO_CONST_BUFFER); + + dispatch_va = dispatch_buf->gpu_address + dispatch_offset; + + radeon_set_sh_reg_seq(cs, R_00B900_COMPUTE_USER_DATA_0 + + (user_sgpr * 4), 2); + radeon_emit(cs, dispatch_va); + radeon_emit(cs, S_008F04_BASE_ADDRESS_HI(dispatch_va >> 32) | + S_008F04_STRIDE(0)); + + r600_resource_reference(&dispatch_buf, NULL); + user_sgpr += 2; + } + + if (AMD_HSA_BITS_GET(code_object->code_properties, + AMD_CODE_PROPERTY_ENABLE_SGPR_KERNARG_SEGMENT_PTR)) { + radeon_set_sh_reg_seq(cs, R_00B900_COMPUTE_USER_DATA_0 + + (user_sgpr * 4), 2); + radeon_emit(cs, kernel_args_va); + radeon_emit(cs, S_008F04_BASE_ADDRESS_HI (kernel_args_va >> 32) | + S_008F04_STRIDE(0)); + user_sgpr += 2; + } + + for (i = 0; i < 3 && user_sgpr < 16; i++) { + if (code_object->code_properties & workgroup_count_masks[i]) { + radeon_set_sh_reg_seq(cs, + R_00B900_COMPUTE_USER_DATA_0 + + (user_sgpr * 4), 1); + radeon_emit(cs, info->grid[i]); + user_sgpr += 1; + } + } +} + static void si_upload_compute_input(struct si_context *sctx, - const struct pipe_grid_info *info) + const amd_kernel_code_t *code_object, + const struct pipe_grid_info *info) { struct radeon_winsys_cs *cs = sctx->b.gfx.cs; struct si_compute *program = sctx->cs_shader_state.program; struct r600_resource *input_buffer = NULL; unsigned kernel_args_size; - unsigned num_work_size_bytes = 36; + unsigned num_work_size_bytes = program->use_code_object_v2 ? 0 : 36; uint32_t kernel_args_offset = 0; uint32_t *kernel_args; void *kernel_args_ptr; @@ -351,10 +558,14 @@ (struct pipe_resource**)&input_buffer, &kernel_args_ptr); kernel_args = (uint32_t*)kernel_args_ptr; - for (i = 0; i < 3; i++) { - kernel_args[i] = info->grid[i]; - kernel_args[i + 3] = info->grid[i] * info->block[i]; - kernel_args[i + 6] = info->block[i]; + kernel_args_va = input_buffer->gpu_address + kernel_args_offset; + + if (!code_object) { + for (i = 0; i < 3; i++) { + kernel_args[i] = info->grid[i]; + kernel_args[i + 3] = info->grid[i] * info->block[i]; + kernel_args[i + 6] = info->block[i]; + } } memcpy(kernel_args + (num_work_size_bytes / 4), info->input, @@ -366,17 +577,20 @@ kernel_args[i]); } - kernel_args_va = input_buffer->gpu_address + kernel_args_offset; radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, input_buffer, RADEON_USAGE_READ, RADEON_PRIO_CONST_BUFFER); - radeon_set_sh_reg_seq(cs, R_00B900_COMPUTE_USER_DATA_0, 2); - radeon_emit(cs, kernel_args_va); - radeon_emit(cs, S_008F04_BASE_ADDRESS_HI (kernel_args_va >> 32) | - S_008F04_STRIDE(0)); + if (code_object) { + si_setup_user_sgprs_co_v2(sctx, code_object, info, kernel_args_va); + } else { + radeon_set_sh_reg_seq(cs, R_00B900_COMPUTE_USER_DATA_0, 2); + radeon_emit(cs, kernel_args_va); + radeon_emit(cs, S_008F04_BASE_ADDRESS_HI (kernel_args_va >> 32) | + S_008F04_STRIDE(0)); + } - pipe_resource_reference((struct pipe_resource**)&input_buffer, NULL); + r600_resource_reference(&input_buffer, NULL); } static void si_setup_tgsi_grid(struct si_context *sctx, @@ -405,11 +619,17 @@ radeon_emit(cs, 0); } } else { + struct si_compute *program = sctx->cs_shader_state.program; - radeon_set_sh_reg_seq(cs, grid_size_reg, 3); + radeon_set_sh_reg_seq(cs, grid_size_reg, program->variable_group_size ? 6 : 3); radeon_emit(cs, info->grid[0]); radeon_emit(cs, info->grid[1]); radeon_emit(cs, info->grid[2]); + if (program->variable_group_size) { + radeon_emit(cs, info->block[0]); + radeon_emit(cs, info->block[1]); + radeon_emit(cs, info->block[2]); + } } } @@ -418,6 +638,11 @@ { struct radeon_winsys_cs *cs = sctx->b.gfx.cs; bool render_cond_bit = sctx->b.render_cond && !sctx->b.render_cond_force_off; + unsigned waves_per_threadgroup = + DIV_ROUND_UP(info->block[0] * info->block[1] * info->block[2], 64); + + radeon_set_sh_reg(cs, R_00B854_COMPUTE_RESOURCE_LIMITS, + S_00B854_SIMD_DEST_CNTL(waves_per_threadgroup % 4 == 0)); radeon_set_sh_reg_seq(cs, R_00B81C_COMPUTE_NUM_THREAD_X, 3); radeon_emit(cs, S_00B81C_NUM_THREAD_FULL(info->block[0])); @@ -457,6 +682,8 @@ { struct si_context *sctx = (struct si_context*)ctx; struct si_compute *program = sctx->cs_shader_state.program; + const amd_kernel_code_t *code_object = + si_compute_get_code_object(program, info->pc); int i; /* HW bug workaround when CS threadgroups > 256 threads and async * compute isn't used, i.e. only one compute job can run at a time. @@ -485,7 +712,7 @@ /* The hw doesn't read the indirect buffer via TC L2. */ if (r600_resource(info->indirect)->TC_L2_dirty) { - sctx->b.flags |= SI_CONTEXT_INV_GLOBAL_L2; + sctx->b.flags |= SI_CONTEXT_WRITEBACK_GLOBAL_L2; r600_resource(info->indirect)->TC_L2_dirty = false; } } @@ -496,9 +723,10 @@ si_initialize_compute(sctx); if (sctx->b.flags) - si_emit_cache_flush(sctx, NULL); + si_emit_cache_flush(sctx); - if (!si_switch_compute_shader(sctx, program, &program->shader, info->pc)) + if (!si_switch_compute_shader(sctx, program, &program->shader, + code_object, info->pc)) return; si_upload_compute_shader_descriptors(sctx); @@ -511,7 +739,7 @@ } if (program->input_size || program->ir_type == PIPE_SHADER_IR_NATIVE) - si_upload_compute_input(sctx, info); + si_upload_compute_input(sctx, code_object, info); /* Global buffers */ for (i = 0; i < MAX_GLOBAL_BUFFERS; i++) { @@ -534,6 +762,11 @@ si_ce_post_draw_synchronization(sctx); + sctx->compute_is_busy = true; + sctx->b.num_compute_calls++; + if (sctx->cs_shader_state.uses_scratch) + sctx->b.num_spill_compute_calls++; + if (cs_regalloc_hang) sctx->b.flags |= SI_CONTEXT_CS_PARTIAL_FLUSH; } diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/si_cp_dma.c mesa-17.0.7/src/gallium/drivers/radeonsi/si_cp_dma.c --- mesa-12.0.6/src/gallium/drivers/radeonsi/si_cp_dma.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/si_cp_dma.c 2017-06-01 10:37:10.000000000 +0000 @@ -28,82 +28,81 @@ #include "sid.h" #include "radeon/r600_cs.h" +/* Alignment for optimal performance. */ +#define CP_DMA_ALIGNMENT 32 +/* The max number of bytes to copy per packet. */ +#define CP_DMA_MAX_BYTE_COUNT ((1 << 21) - CP_DMA_ALIGNMENT) -/* Set this if you want the 3D engine to wait until CP DMA is done. +/* Set this if you want the ME to wait until CP DMA is done. * It should be set on the last CP DMA packet. */ -#define R600_CP_DMA_SYNC (1 << 0) /* R600+ */ +#define CP_DMA_SYNC (1 << 0) /* Set this if the source data was used as a destination in a previous CP DMA * packet. It's for preventing a read-after-write (RAW) hazard between two * CP DMA packets. */ -#define SI_CP_DMA_RAW_WAIT (1 << 1) /* SI+ */ -#define CIK_CP_DMA_USE_L2 (1 << 2) - -/* Emit a CP DMA packet to do a copy from one buffer to another. - * The size must fit in bits [20:0]. +#define CP_DMA_RAW_WAIT (1 << 1) +#define CP_DMA_USE_L2 (1 << 2) /* CIK+ */ +#define CP_DMA_CLEAR (1 << 3) + +/* Emit a CP DMA packet to do a copy from one buffer to another, or to clear + * a buffer. The size must fit in bits [20:0]. If CP_DMA_CLEAR is set, src_va is a 32-bit + * clear value. */ -static void si_emit_cp_dma_copy_buffer(struct si_context *sctx, - uint64_t dst_va, uint64_t src_va, - unsigned size, unsigned flags) +static void si_emit_cp_dma(struct si_context *sctx, uint64_t dst_va, + uint64_t src_va, unsigned size, unsigned flags, + enum r600_coherency coher) { struct radeon_winsys_cs *cs = sctx->b.gfx.cs; - uint32_t sync_flag = flags & R600_CP_DMA_SYNC ? S_411_CP_SYNC(1) : 0; - uint32_t wr_confirm = !(flags & R600_CP_DMA_SYNC) ? S_414_DISABLE_WR_CONFIRM(1) : 0; - uint32_t raw_wait = flags & SI_CP_DMA_RAW_WAIT ? S_414_RAW_WAIT(1) : 0; - uint32_t sel = flags & CIK_CP_DMA_USE_L2 ? - S_411_SRC_SEL(V_411_SRC_ADDR_TC_L2) | - S_411_DSL_SEL(V_411_DST_ADDR_TC_L2) : 0; + uint32_t header = 0, command = S_414_BYTE_COUNT(size); assert(size); - assert((size & ((1<<21)-1)) == size); + assert(size <= CP_DMA_MAX_BYTE_COUNT); + + /* Sync flags. */ + if (flags & CP_DMA_SYNC) + header |= S_411_CP_SYNC(1); + else + command |= S_414_DISABLE_WR_CONFIRM(1); + + if (flags & CP_DMA_RAW_WAIT) + command |= S_414_RAW_WAIT(1); + + /* Src and dst flags. */ + if (flags & CP_DMA_USE_L2) + header |= S_411_DSL_SEL(V_411_DST_ADDR_TC_L2); + + if (flags & CP_DMA_CLEAR) + header |= S_411_SRC_SEL(V_411_DATA); + else if (flags & CP_DMA_USE_L2) + header |= S_411_SRC_SEL(V_411_SRC_ADDR_TC_L2); if (sctx->b.chip_class >= CIK) { radeon_emit(cs, PKT3(PKT3_DMA_DATA, 5, 0)); - radeon_emit(cs, sync_flag | sel); /* CP_SYNC [31] */ - radeon_emit(cs, src_va); /* SRC_ADDR_LO [31:0] */ - radeon_emit(cs, src_va >> 32); /* SRC_ADDR_HI [31:0] */ - radeon_emit(cs, dst_va); /* DST_ADDR_LO [31:0] */ - radeon_emit(cs, dst_va >> 32); /* DST_ADDR_HI [31:0] */ - radeon_emit(cs, size | wr_confirm | raw_wait); /* COMMAND [29:22] | BYTE_COUNT [20:0] */ + radeon_emit(cs, header); + radeon_emit(cs, src_va); /* SRC_ADDR_LO [31:0] */ + radeon_emit(cs, src_va >> 32); /* SRC_ADDR_HI [31:0] */ + radeon_emit(cs, dst_va); /* DST_ADDR_LO [31:0] */ + radeon_emit(cs, dst_va >> 32); /* DST_ADDR_HI [31:0] */ + radeon_emit(cs, command); } else { + header |= S_411_SRC_ADDR_HI(src_va >> 32); + radeon_emit(cs, PKT3(PKT3_CP_DMA, 4, 0)); - radeon_emit(cs, src_va); /* SRC_ADDR_LO [31:0] */ - radeon_emit(cs, sync_flag | ((src_va >> 32) & 0xffff)); /* CP_SYNC [31] | SRC_ADDR_HI [15:0] */ - radeon_emit(cs, dst_va); /* DST_ADDR_LO [31:0] */ - radeon_emit(cs, (dst_va >> 32) & 0xffff); /* DST_ADDR_HI [15:0] */ - radeon_emit(cs, size | wr_confirm | raw_wait); /* COMMAND [29:22] | BYTE_COUNT [20:0] */ + radeon_emit(cs, src_va); /* SRC_ADDR_LO [31:0] */ + radeon_emit(cs, header); /* SRC_ADDR_HI [15:0] + flags. */ + radeon_emit(cs, dst_va); /* DST_ADDR_LO [31:0] */ + radeon_emit(cs, (dst_va >> 32) & 0xffff); /* DST_ADDR_HI [15:0] */ + radeon_emit(cs, command); } -} - -/* Emit a CP DMA packet to clear a buffer. The size must fit in bits [20:0]. */ -static void si_emit_cp_dma_clear_buffer(struct si_context *sctx, - uint64_t dst_va, unsigned size, - uint32_t clear_value, unsigned flags) -{ - struct radeon_winsys_cs *cs = sctx->b.gfx.cs; - uint32_t sync_flag = flags & R600_CP_DMA_SYNC ? S_411_CP_SYNC(1) : 0; - uint32_t wr_confirm = !(flags & R600_CP_DMA_SYNC) ? S_414_DISABLE_WR_CONFIRM(1) : 0; - uint32_t raw_wait = flags & SI_CP_DMA_RAW_WAIT ? S_414_RAW_WAIT(1) : 0; - uint32_t dst_sel = flags & CIK_CP_DMA_USE_L2 ? S_411_DSL_SEL(V_411_DST_ADDR_TC_L2) : 0; - - assert(size); - assert((size & ((1<<21)-1)) == size); - if (sctx->b.chip_class >= CIK) { - radeon_emit(cs, PKT3(PKT3_DMA_DATA, 5, 0)); - radeon_emit(cs, sync_flag | dst_sel | S_411_SRC_SEL(V_411_DATA)); /* CP_SYNC [31] | SRC_SEL[30:29] */ - radeon_emit(cs, clear_value); /* DATA [31:0] */ + /* CP DMA is executed in ME, but index buffers are read by PFP. + * This ensures that ME (CP DMA) is idle before PFP starts fetching + * indices. If we wanted to execute CP DMA in PFP, this packet + * should precede it. + */ + if (coher == R600_COHERENCY_SHADER && flags & CP_DMA_SYNC) { + radeon_emit(cs, PKT3(PKT3_PFP_SYNC_ME, 0, 0)); radeon_emit(cs, 0); - radeon_emit(cs, dst_va); /* DST_ADDR_LO [31:0] */ - radeon_emit(cs, dst_va >> 32); /* DST_ADDR_HI [15:0] */ - radeon_emit(cs, size | wr_confirm | raw_wait); /* COMMAND [29:22] | BYTE_COUNT [20:0] */ - } else { - radeon_emit(cs, PKT3(PKT3_CP_DMA, 4, 0)); - radeon_emit(cs, clear_value); /* DATA [31:0] */ - radeon_emit(cs, sync_flag | S_411_SRC_SEL(V_411_DATA)); /* CP_SYNC [31] | SRC_SEL[30:29] */ - radeon_emit(cs, dst_va); /* DST_ADDR_LO [31:0] */ - radeon_emit(cs, (dst_va >> 32) & 0xffff); /* DST_ADDR_HI [15:0] */ - radeon_emit(cs, size | wr_confirm | raw_wait); /* COMMAND [29:22] | BYTE_COUNT [20:0] */ } } @@ -126,51 +125,70 @@ static unsigned get_tc_l2_flag(struct si_context *sctx, enum r600_coherency coher) { return coher == R600_COHERENCY_SHADER && - sctx->b.chip_class >= CIK ? CIK_CP_DMA_USE_L2 : 0; + sctx->b.chip_class >= CIK ? CP_DMA_USE_L2 : 0; } static void si_cp_dma_prepare(struct si_context *sctx, struct pipe_resource *dst, struct pipe_resource *src, unsigned byte_count, - uint64_t remaining_size, unsigned *flags) + uint64_t remaining_size, unsigned user_flags, + bool *is_first, unsigned *packet_flags) { - si_need_cs_space(sctx); + /* Fast exit for a CPDMA prefetch. */ + if ((user_flags & SI_CPDMA_SKIP_ALL) == SI_CPDMA_SKIP_ALL) { + *is_first = false; + return; + } + + if (!(user_flags & SI_CPDMA_SKIP_BO_LIST_UPDATE)) { + /* Count memory usage in so that need_cs_space can take it into account. */ + r600_context_add_resource_size(&sctx->b.b, dst); + if (src) + r600_context_add_resource_size(&sctx->b.b, src); + } + + if (!(user_flags & SI_CPDMA_SKIP_CHECK_CS_SPACE)) + si_need_cs_space(sctx); /* This must be done after need_cs_space. */ - radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, - (struct r600_resource*)dst, - RADEON_USAGE_WRITE, RADEON_PRIO_CP_DMA); - if (src) + if (!(user_flags & SI_CPDMA_SKIP_BO_LIST_UPDATE)) { radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, - (struct r600_resource*)src, - RADEON_USAGE_READ, RADEON_PRIO_CP_DMA); + (struct r600_resource*)dst, + RADEON_USAGE_WRITE, RADEON_PRIO_CP_DMA); + if (src) + radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, + (struct r600_resource*)src, + RADEON_USAGE_READ, RADEON_PRIO_CP_DMA); + } /* Flush the caches for the first copy only. * Also wait for the previous CP DMA operations. */ - if (sctx->b.flags) { - si_emit_cache_flush(sctx, NULL); - *flags |= SI_CP_DMA_RAW_WAIT; - } + if (!(user_flags & SI_CPDMA_SKIP_GFX_SYNC) && sctx->b.flags) + si_emit_cache_flush(sctx); + + if (!(user_flags & SI_CPDMA_SKIP_SYNC_BEFORE) && *is_first) + *packet_flags |= CP_DMA_RAW_WAIT; + + *is_first = false; /* Do the synchronization after the last dma, so that all data * is written to memory. */ - if (byte_count == remaining_size) - *flags |= R600_CP_DMA_SYNC; + if (!(user_flags & SI_CPDMA_SKIP_SYNC_AFTER) && + byte_count == remaining_size) + *packet_flags |= CP_DMA_SYNC; } -/* Alignment for optimal performance. */ -#define CP_DMA_ALIGNMENT 32 -/* The max number of bytes to copy per packet. */ -#define CP_DMA_MAX_BYTE_COUNT ((1 << 21) - CP_DMA_ALIGNMENT) - static void si_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst, uint64_t offset, uint64_t size, unsigned value, enum r600_coherency coher) { struct si_context *sctx = (struct si_context*)ctx; + struct radeon_winsys *ws = sctx->b.ws; + struct r600_resource *rdst = r600_resource(dst); unsigned tc_l2_flag = get_tc_l2_flag(sctx, coher); unsigned flush_flags = get_flush_flags(sctx, coher); + bool is_first = true; if (!size) return; @@ -178,14 +196,13 @@ /* Mark the buffer range of destination as valid (initialized), * so that transfer_map knows it should wait for the GPU when mapping * that range. */ - util_range_add(&r600_resource(dst)->valid_buffer_range, offset, + util_range_add(&rdst->valid_buffer_range, offset, offset + size); /* Fallback for unaligned clears. */ if (offset % 4 != 0 || size % 4 != 0) { - uint8_t *map = sctx->b.ws->buffer_map(r600_resource(dst)->buf, - sctx->b.gfx.cs, - PIPE_TRANSFER_WRITE); + uint8_t *map = r600_buffer_map_sync_with_rings(&sctx->b, rdst, + PIPE_TRANSFER_WRITE); map += offset; for (uint64_t i = 0; i < size; i++) { unsigned byte_within_dword = (offset + i) % 4; @@ -194,7 +211,25 @@ return; } - uint64_t va = r600_resource(dst)->gpu_address + offset; + /* dma_clear_buffer can use clear_buffer on failure. Make sure that + * doesn't happen. We don't want an infinite recursion: */ + if (sctx->b.dma.cs && + /* CP DMA is very slow. Always use SDMA for big clears. This + * alone improves DeusEx:MD performance by 70%. */ + (size > 128 * 1024 || + /* Buffers not used by the GFX IB yet will be cleared by SDMA. + * This happens to move most buffer clears to SDMA, including + * DCC and CMASK clears, because pipe->clear clears them before + * si_emit_framebuffer_state (in a draw call) adds them. + * For example, DeusEx:MD has 21 buffer clears per frame and all + * of them are moved to SDMA thanks to this. */ + !ws->cs_is_buffer_referenced(sctx->b.gfx.cs, rdst->buf, + RADEON_USAGE_READWRITE))) { + sctx->b.dma_clear_buffer(ctx, dst, offset, size, value); + return; + } + + uint64_t va = rdst->gpu_address + offset; /* Flush the caches. */ sctx->b.flags |= SI_CONTEXT_PS_PARTIAL_FLUSH | @@ -202,19 +237,24 @@ while (size) { unsigned byte_count = MIN2(size, CP_DMA_MAX_BYTE_COUNT); - unsigned dma_flags = tc_l2_flag; + unsigned dma_flags = tc_l2_flag | CP_DMA_CLEAR; - si_cp_dma_prepare(sctx, dst, NULL, byte_count, size, &dma_flags); + si_cp_dma_prepare(sctx, dst, NULL, byte_count, size, 0, + &is_first, &dma_flags); /* Emit the clear packet. */ - si_emit_cp_dma_clear_buffer(sctx, va, byte_count, value, dma_flags); + si_emit_cp_dma(sctx, va, value, byte_count, dma_flags, coher); size -= byte_count; va += byte_count; } if (tc_l2_flag) - r600_resource(dst)->TC_L2_dirty = true; + rdst->TC_L2_dirty = true; + + /* If it's not a framebuffer fast clear... */ + if (coher == R600_COHERENCY_SHADER) + sctx->b.num_cp_dma_calls++; } /** @@ -223,7 +263,8 @@ * * \param size Remaining size to the CP DMA alignment. */ -static void si_cp_dma_realign_engine(struct si_context *sctx, unsigned size) +static void si_cp_dma_realign_engine(struct si_context *sctx, unsigned size, + unsigned user_flags, bool *is_first) { uint64_t va; unsigned dma_flags = 0; @@ -237,41 +278,50 @@ if (!sctx->scratch_buffer || sctx->scratch_buffer->b.b.width0 < scratch_size) { r600_resource_reference(&sctx->scratch_buffer, NULL); - sctx->scratch_buffer = - si_resource_create_custom(&sctx->screen->b.b, - PIPE_USAGE_DEFAULT, - scratch_size); + sctx->scratch_buffer = (struct r600_resource*) + pipe_buffer_create(&sctx->screen->b.b, 0, + PIPE_USAGE_DEFAULT, scratch_size); if (!sctx->scratch_buffer) return; sctx->emit_scratch_reloc = true; } si_cp_dma_prepare(sctx, &sctx->scratch_buffer->b.b, - &sctx->scratch_buffer->b.b, size, size, &dma_flags); + &sctx->scratch_buffer->b.b, size, size, user_flags, + is_first, &dma_flags); va = sctx->scratch_buffer->gpu_address; - si_emit_cp_dma_copy_buffer(sctx, va, va + CP_DMA_ALIGNMENT, size, - dma_flags); + si_emit_cp_dma(sctx, va, va + CP_DMA_ALIGNMENT, size, dma_flags, + R600_COHERENCY_SHADER); } +/** + * Do memcpy between buffers using CP DMA. + * + * \param user_flags bitmask of SI_CPDMA_* + */ void si_copy_buffer(struct si_context *sctx, struct pipe_resource *dst, struct pipe_resource *src, - uint64_t dst_offset, uint64_t src_offset, unsigned size) + uint64_t dst_offset, uint64_t src_offset, unsigned size, + unsigned user_flags) { uint64_t main_dst_offset, main_src_offset; unsigned skipped_size = 0; unsigned realign_size = 0; unsigned tc_l2_flag = get_tc_l2_flag(sctx, R600_COHERENCY_SHADER); unsigned flush_flags = get_flush_flags(sctx, R600_COHERENCY_SHADER); + bool is_first = true; if (!size) return; - /* Mark the buffer range of destination as valid (initialized), - * so that transfer_map knows it should wait for the GPU when mapping - * that range. */ - util_range_add(&r600_resource(dst)->valid_buffer_range, dst_offset, - dst_offset + size); + if (dst != src || dst_offset != src_offset) { + /* Mark the buffer range of destination as valid (initialized), + * so that transfer_map knows it should wait for the GPU when mapping + * that range. */ + util_range_add(&r600_resource(dst)->valid_buffer_range, dst_offset, + dst_offset + size); + } dst_offset += r600_resource(dst)->gpu_address; src_offset += r600_resource(src)->gpu_address; @@ -299,8 +349,9 @@ } /* Flush the caches. */ - sctx->b.flags |= SI_CONTEXT_PS_PARTIAL_FLUSH | - SI_CONTEXT_CS_PARTIAL_FLUSH | flush_flags; + if (!(user_flags & SI_CPDMA_SKIP_GFX_SYNC)) + sctx->b.flags |= SI_CONTEXT_PS_PARTIAL_FLUSH | + SI_CONTEXT_CS_PARTIAL_FLUSH | flush_flags; /* This is the main part doing the copying. Src is always aligned. */ main_dst_offset = dst_offset + skipped_size; @@ -312,10 +363,10 @@ si_cp_dma_prepare(sctx, dst, src, byte_count, size + skipped_size + realign_size, - &dma_flags); + user_flags, &is_first, &dma_flags); - si_emit_cp_dma_copy_buffer(sctx, main_dst_offset, main_src_offset, - byte_count, dma_flags); + si_emit_cp_dma(sctx, main_dst_offset, main_src_offset, + byte_count, dma_flags, R600_COHERENCY_SHADER); size -= byte_count; main_src_offset += byte_count; @@ -327,19 +378,32 @@ unsigned dma_flags = tc_l2_flag; si_cp_dma_prepare(sctx, dst, src, skipped_size, - skipped_size + realign_size, - &dma_flags); + skipped_size + realign_size, user_flags, + &is_first, &dma_flags); - si_emit_cp_dma_copy_buffer(sctx, dst_offset, src_offset, - skipped_size, dma_flags); + si_emit_cp_dma(sctx, dst_offset, src_offset, skipped_size, + dma_flags, R600_COHERENCY_SHADER); } /* Finally, realign the engine if the size wasn't aligned. */ if (realign_size) - si_cp_dma_realign_engine(sctx, realign_size); + si_cp_dma_realign_engine(sctx, realign_size, user_flags, + &is_first); if (tc_l2_flag) r600_resource(dst)->TC_L2_dirty = true; + + /* If it's not a prefetch... */ + if (dst_offset != src_offset) + sctx->b.num_cp_dma_calls++; +} + +void cik_prefetch_TC_L2_async(struct si_context *sctx, struct pipe_resource *buf, + uint64_t offset, unsigned size) +{ + assert(sctx->b.chip_class >= CIK); + + si_copy_buffer(sctx, buf, buf, offset, offset, size, SI_CPDMA_SKIP_ALL); } void si_init_cp_dma_functions(struct si_context *sctx) diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/si_debug.c mesa-17.0.7/src/gallium/drivers/radeonsi/si_debug.c --- mesa-12.0.6/src/gallium/drivers/radeonsi/si_debug.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/si_debug.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,24 +25,28 @@ */ #include "si_pipe.h" -#include "si_shader.h" #include "sid.h" #include "sid_tables.h" #include "radeon/radeon_elf_util.h" #include "ddebug/dd_util.h" #include "util/u_memory.h" +#include "ac_debug.h" DEBUG_GET_ONCE_OPTION(replace_shaders, "RADEON_REPLACE_SHADERS", NULL) static void si_dump_shader(struct si_screen *sscreen, struct si_shader_ctx_state *state, FILE *f) { - if (!state->cso || !state->current) + struct si_shader *current = state->current; + + if (!state->cso || !current) return; - si_dump_shader_key(state->cso->type, &state->current->key, f); - si_shader_dump(sscreen, state->current, NULL, - state->cso->info.processor, f); + if (current->shader_log) + fwrite(current->shader_log, current->shader_log_size, 1, f); + else + si_shader_dump(sscreen, state->current, NULL, + state->cso->info.processor, f, false); } /** @@ -146,308 +150,6 @@ #define COLOR_YELLOW "\033[1;33m" #define COLOR_CYAN "\033[1;36m" -#define INDENT_PKT 8 - -static void print_spaces(FILE *f, unsigned num) -{ - fprintf(f, "%*s", num, ""); -} - -static void print_value(FILE *file, uint32_t value, int bits) -{ - /* Guess if it's int or float */ - if (value <= (1 << 15)) { - if (value <= 9) - fprintf(file, "%u\n", value); - else - fprintf(file, "%u (0x%0*x)\n", value, bits / 4, value); - } else { - float f = uif(value); - - if (fabs(f) < 100000 && f*10 == floor(f*10)) - fprintf(file, "%.1ff (0x%0*x)\n", f, bits / 4, value); - else - /* Don't print more leading zeros than there are bits. */ - fprintf(file, "0x%0*x\n", bits / 4, value); - } -} - -static void print_named_value(FILE *file, const char *name, uint32_t value, - int bits) -{ - print_spaces(file, INDENT_PKT); - fprintf(file, COLOR_YELLOW "%s" COLOR_RESET " <- ", name); - print_value(file, value, bits); -} - -static void si_dump_reg(FILE *file, unsigned offset, uint32_t value, - uint32_t field_mask) -{ - int r, f; - - for (r = 0; r < ARRAY_SIZE(sid_reg_table); r++) { - const struct si_reg *reg = &sid_reg_table[r]; - const char *reg_name = sid_strings + reg->name_offset; - - if (reg->offset == offset) { - bool first_field = true; - - print_spaces(file, INDENT_PKT); - fprintf(file, COLOR_YELLOW "%s" COLOR_RESET " <- ", - reg_name); - - if (!reg->num_fields) { - print_value(file, value, 32); - return; - } - - for (f = 0; f < reg->num_fields; f++) { - const struct si_field *field = sid_fields_table + reg->fields_offset + f; - const int *values_offsets = sid_strings_offsets + field->values_offset; - uint32_t val = (value & field->mask) >> - (ffs(field->mask) - 1); - - if (!(field->mask & field_mask)) - continue; - - /* Indent the field. */ - if (!first_field) - print_spaces(file, - INDENT_PKT + strlen(reg_name) + 4); - - /* Print the field. */ - fprintf(file, "%s = ", sid_strings + field->name_offset); - - if (val < field->num_values && values_offsets[val] >= 0) - fprintf(file, "%s\n", sid_strings + values_offsets[val]); - else - print_value(file, val, - util_bitcount(field->mask)); - - first_field = false; - } - return; - } - } - - fprintf(file, COLOR_YELLOW "0x%05x" COLOR_RESET " = 0x%08x", offset, value); -} - -static void si_parse_set_reg_packet(FILE *f, uint32_t *ib, unsigned count, - unsigned reg_offset) -{ - unsigned reg = (ib[1] << 2) + reg_offset; - int i; - - for (i = 0; i < count; i++) - si_dump_reg(f, reg + i*4, ib[2+i], ~0); -} - -static uint32_t *si_parse_packet3(FILE *f, uint32_t *ib, int *num_dw, - int trace_id) -{ - unsigned count = PKT_COUNT_G(ib[0]); - unsigned op = PKT3_IT_OPCODE_G(ib[0]); - const char *predicate = PKT3_PREDICATE(ib[0]) ? "(predicate)" : ""; - int i; - - /* Print the name first. */ - for (i = 0; i < ARRAY_SIZE(packet3_table); i++) - if (packet3_table[i].op == op) - break; - - if (i < ARRAY_SIZE(packet3_table)) { - const char *name = sid_strings + packet3_table[i].name_offset; - - if (op == PKT3_SET_CONTEXT_REG || - op == PKT3_SET_CONFIG_REG || - op == PKT3_SET_UCONFIG_REG || - op == PKT3_SET_SH_REG) - fprintf(f, COLOR_CYAN "%s%s" COLOR_CYAN ":\n", - name, predicate); - else - fprintf(f, COLOR_GREEN "%s%s" COLOR_RESET ":\n", - name, predicate); - } else - fprintf(f, COLOR_RED "PKT3_UNKNOWN 0x%x%s" COLOR_RESET ":\n", - op, predicate); - - /* Print the contents. */ - switch (op) { - case PKT3_SET_CONTEXT_REG: - si_parse_set_reg_packet(f, ib, count, SI_CONTEXT_REG_OFFSET); - break; - case PKT3_SET_CONFIG_REG: - si_parse_set_reg_packet(f, ib, count, SI_CONFIG_REG_OFFSET); - break; - case PKT3_SET_UCONFIG_REG: - si_parse_set_reg_packet(f, ib, count, CIK_UCONFIG_REG_OFFSET); - break; - case PKT3_SET_SH_REG: - si_parse_set_reg_packet(f, ib, count, SI_SH_REG_OFFSET); - break; - case PKT3_DRAW_PREAMBLE: - si_dump_reg(f, R_030908_VGT_PRIMITIVE_TYPE, ib[1], ~0); - si_dump_reg(f, R_028AA8_IA_MULTI_VGT_PARAM, ib[2], ~0); - si_dump_reg(f, R_028B58_VGT_LS_HS_CONFIG, ib[3], ~0); - break; - case PKT3_ACQUIRE_MEM: - si_dump_reg(f, R_0301F0_CP_COHER_CNTL, ib[1], ~0); - si_dump_reg(f, R_0301F4_CP_COHER_SIZE, ib[2], ~0); - si_dump_reg(f, R_030230_CP_COHER_SIZE_HI, ib[3], ~0); - si_dump_reg(f, R_0301F8_CP_COHER_BASE, ib[4], ~0); - si_dump_reg(f, R_0301E4_CP_COHER_BASE_HI, ib[5], ~0); - print_named_value(f, "POLL_INTERVAL", ib[6], 16); - break; - case PKT3_SURFACE_SYNC: - si_dump_reg(f, R_0085F0_CP_COHER_CNTL, ib[1], ~0); - si_dump_reg(f, R_0085F4_CP_COHER_SIZE, ib[2], ~0); - si_dump_reg(f, R_0085F8_CP_COHER_BASE, ib[3], ~0); - print_named_value(f, "POLL_INTERVAL", ib[4], 16); - break; - case PKT3_EVENT_WRITE: - si_dump_reg(f, R_028A90_VGT_EVENT_INITIATOR, ib[1], - S_028A90_EVENT_TYPE(~0)); - print_named_value(f, "EVENT_INDEX", (ib[1] >> 8) & 0xf, 4); - print_named_value(f, "INV_L2", (ib[1] >> 20) & 0x1, 1); - if (count > 0) { - print_named_value(f, "ADDRESS_LO", ib[2], 32); - print_named_value(f, "ADDRESS_HI", ib[3], 16); - } - break; - case PKT3_DRAW_INDEX_AUTO: - si_dump_reg(f, R_030930_VGT_NUM_INDICES, ib[1], ~0); - si_dump_reg(f, R_0287F0_VGT_DRAW_INITIATOR, ib[2], ~0); - break; - case PKT3_DRAW_INDEX_2: - si_dump_reg(f, R_028A78_VGT_DMA_MAX_SIZE, ib[1], ~0); - si_dump_reg(f, R_0287E8_VGT_DMA_BASE, ib[2], ~0); - si_dump_reg(f, R_0287E4_VGT_DMA_BASE_HI, ib[3], ~0); - si_dump_reg(f, R_030930_VGT_NUM_INDICES, ib[4], ~0); - si_dump_reg(f, R_0287F0_VGT_DRAW_INITIATOR, ib[5], ~0); - break; - case PKT3_INDEX_TYPE: - si_dump_reg(f, R_028A7C_VGT_DMA_INDEX_TYPE, ib[1], ~0); - break; - case PKT3_NUM_INSTANCES: - si_dump_reg(f, R_030934_VGT_NUM_INSTANCES, ib[1], ~0); - break; - case PKT3_WRITE_DATA: - si_dump_reg(f, R_370_CONTROL, ib[1], ~0); - si_dump_reg(f, R_371_DST_ADDR_LO, ib[2], ~0); - si_dump_reg(f, R_372_DST_ADDR_HI, ib[3], ~0); - for (i = 2; i < count; i++) { - print_spaces(f, INDENT_PKT); - fprintf(f, "0x%08x\n", ib[2+i]); - } - break; - case PKT3_CP_DMA: - si_dump_reg(f, R_410_CP_DMA_WORD0, ib[1], ~0); - si_dump_reg(f, R_411_CP_DMA_WORD1, ib[2], ~0); - si_dump_reg(f, R_412_CP_DMA_WORD2, ib[3], ~0); - si_dump_reg(f, R_413_CP_DMA_WORD3, ib[4], ~0); - si_dump_reg(f, R_414_COMMAND, ib[5], ~0); - break; - case PKT3_DMA_DATA: - si_dump_reg(f, R_500_DMA_DATA_WORD0, ib[1], ~0); - si_dump_reg(f, R_501_SRC_ADDR_LO, ib[2], ~0); - si_dump_reg(f, R_502_SRC_ADDR_HI, ib[3], ~0); - si_dump_reg(f, R_503_DST_ADDR_LO, ib[4], ~0); - si_dump_reg(f, R_504_DST_ADDR_HI, ib[5], ~0); - si_dump_reg(f, R_414_COMMAND, ib[6], ~0); - break; - case PKT3_NOP: - if (ib[0] == 0xffff1000) { - count = -1; /* One dword NOP. */ - break; - } else if (count == 0 && SI_IS_TRACE_POINT(ib[1])) { - unsigned packet_id = SI_GET_TRACE_POINT_ID(ib[1]); - - print_spaces(f, INDENT_PKT); - fprintf(f, COLOR_RED "Trace point ID: %u\n", packet_id); - - if (trace_id == -1) - break; /* tracing was disabled */ - - print_spaces(f, INDENT_PKT); - if (packet_id < trace_id) - fprintf(f, COLOR_RED - "This trace point was reached by the CP." - COLOR_RESET "\n"); - else if (packet_id == trace_id) - fprintf(f, COLOR_RED - "!!!!! This is the last trace point that " - "was reached by the CP !!!!!" - COLOR_RESET "\n"); - else if (packet_id+1 == trace_id) - fprintf(f, COLOR_RED - "!!!!! This is the first trace point that " - "was NOT been reached by the CP !!!!!" - COLOR_RESET "\n"); - else - fprintf(f, COLOR_RED - "!!!!! This trace point was NOT reached " - "by the CP !!!!!" - COLOR_RESET "\n"); - break; - } - /* fall through, print all dwords */ - default: - for (i = 0; i < count+1; i++) { - print_spaces(f, INDENT_PKT); - fprintf(f, "0x%08x\n", ib[1+i]); - } - } - - ib += count + 2; - *num_dw -= count + 2; - return ib; -} - -/** - * Parse and print an IB into a file. - * - * \param f file - * \param ib IB - * \param num_dw size of the IB - * \param chip_class chip class - * \param trace_id the last trace ID that is known to have been reached - * and executed by the CP, typically read from a buffer - */ -static void si_parse_ib(FILE *f, uint32_t *ib, int num_dw, int trace_id, - const char *name) -{ - fprintf(f, "------------------ %s begin ------------------\n", name); - - while (num_dw > 0) { - unsigned type = PKT_TYPE_G(ib[0]); - - switch (type) { - case 3: - ib = si_parse_packet3(f, ib, &num_dw, trace_id); - break; - case 2: - /* type-2 nop */ - if (ib[0] == 0x80000000) { - fprintf(f, COLOR_GREEN "NOP (type 2)" COLOR_RESET "\n"); - ib++; - break; - } - /* fall through */ - default: - fprintf(f, "Unknown packet type %i\n", type); - return; - } - } - - fprintf(f, "------------------- %s end -------------------\n", name); - if (num_dw < 0) { - printf("Packet ends after the end of IB.\n"); - exit(0); - } - fprintf(f, "\n"); -} - static void si_dump_mmapped_reg(struct si_context *sctx, FILE *f, unsigned offset) { @@ -455,7 +157,7 @@ uint32_t value; if (ws->read_registers(ws, offset, 1, &value)) - si_dump_reg(f, offset, value, ~0); + ac_dump_reg(f, offset, value, ~0); } static void si_dump_debug_registers(struct si_context *sctx, FILE *f) @@ -501,7 +203,7 @@ { int last_trace_id = -1; - if (!sctx->last_ib) + if (!sctx->last_gfx.ib) return; if (sctx->last_trace_buf) { @@ -518,19 +220,19 @@ } if (sctx->init_config) - si_parse_ib(f, sctx->init_config->pm4, sctx->init_config->ndw, - -1, "IB2: Init config"); + ac_parse_ib(f, sctx->init_config->pm4, sctx->init_config->ndw, + -1, "IB2: Init config", sctx->b.chip_class, + NULL, NULL); if (sctx->init_config_gs_rings) - si_parse_ib(f, sctx->init_config_gs_rings->pm4, + ac_parse_ib(f, sctx->init_config_gs_rings->pm4, sctx->init_config_gs_rings->ndw, - -1, "IB2: Init GS rings"); + -1, "IB2: Init GS rings", sctx->b.chip_class, + NULL, NULL); - si_parse_ib(f, sctx->last_ib, sctx->last_ib_dw_size, - last_trace_id, "IB"); - free(sctx->last_ib); /* dump only once */ - sctx->last_ib = NULL; - r600_resource_reference(&sctx->last_trace_buf, NULL); + ac_parse_ib(f, sctx->last_gfx.ib, sctx->last_gfx.num_dw, + last_trace_id, "IB", sctx->b.chip_class, + NULL, NULL); } static const char *priority_to_string(enum radeon_bo_priority priority) @@ -545,21 +247,17 @@ ITEM(IB2), ITEM(DRAW_INDIRECT), ITEM(INDEX_BUFFER), - ITEM(CP_DMA), ITEM(VCE), ITEM(UVD), ITEM(SDMA_BUFFER), ITEM(SDMA_TEXTURE), - ITEM(USER_SHADER), - ITEM(INTERNAL_SHADER), + ITEM(CP_DMA), ITEM(CONST_BUFFER), ITEM(DESCRIPTORS), ITEM(BORDER_COLORS), ITEM(SAMPLER_BUFFER), ITEM(VERTEX_BUFFER), ITEM(SHADER_RW_BUFFER), - ITEM(RINGS_STREAMOUT), - ITEM(SCRATCH_BUFFER), ITEM(COMPUTE_GLOBAL), ITEM(SAMPLER_TEXTURE), ITEM(SHADER_RW_IMAGE), @@ -571,6 +269,9 @@ ITEM(CMASK), ITEM(DCC), ITEM(HTILE), + ITEM(SHADER_BINARY), + ITEM(SHADER_RINGS), + ITEM(SCRATCH_BUFFER), }; #undef ITEM @@ -585,32 +286,33 @@ a->vm_address > b->vm_address ? 1 : 0; } -static void si_dump_last_bo_list(struct si_context *sctx, FILE *f) +static void si_dump_bo_list(struct si_context *sctx, + const struct radeon_saved_cs *saved, FILE *f) { unsigned i,j; - if (!sctx->last_bo_list) + if (!saved->bo_list) return; /* Sort the list according to VM adddresses first. */ - qsort(sctx->last_bo_list, sctx->last_bo_count, - sizeof(sctx->last_bo_list[0]), (void*)bo_list_compare_va); + qsort(saved->bo_list, saved->bo_count, + sizeof(saved->bo_list[0]), (void*)bo_list_compare_va); fprintf(f, "Buffer list (in units of pages = 4kB):\n" COLOR_YELLOW " Size VM start page " "VM end page Usage" COLOR_RESET "\n"); - for (i = 0; i < sctx->last_bo_count; i++) { + for (i = 0; i < saved->bo_count; i++) { /* Note: Buffer sizes are expected to be aligned to 4k by the winsys. */ const unsigned page_size = sctx->b.screen->info.gart_page_size; - uint64_t va = sctx->last_bo_list[i].vm_address; - uint64_t size = sctx->last_bo_list[i].buf->size; + uint64_t va = saved->bo_list[i].vm_address; + uint64_t size = saved->bo_list[i].bo_size; bool hit = false; /* If there's unused virtual memory between 2 buffers, print it. */ if (i) { - uint64_t previous_va_end = sctx->last_bo_list[i-1].vm_address + - sctx->last_bo_list[i-1].buf->size; + uint64_t previous_va_end = saved->bo_list[i-1].vm_address + + saved->bo_list[i-1].bo_size; if (va > previous_va_end) { fprintf(f, " %10"PRIu64" -- hole --\n", @@ -619,12 +321,12 @@ } /* Print the buffer. */ - fprintf(f, " %10"PRIu64" 0x%013"PRIx64" 0x%013"PRIx64" ", + fprintf(f, " %10"PRIu64" 0x%013"PRIX64" 0x%013"PRIX64" ", size / page_size, va / page_size, (va + size) / page_size); /* Print the usage. */ for (j = 0; j < 64; j++) { - if (!(sctx->last_bo_list[i].priority_usage & (1llu << j))) + if (!(saved->bo_list[i].priority_usage & (1llu << j))) continue; fprintf(f, "%s%s", !hit ? "" : ", ", priority_to_string(j)); @@ -634,11 +336,6 @@ } fprintf(f, "\nNote: The holes represent memory not used by the IB.\n" " Other buffers can still be allocated there.\n\n"); - - for (i = 0; i < sctx->last_bo_count; i++) - pb_reference(&sctx->last_bo_list[i].buf, NULL); - free(sctx->last_bo_list); - sctx->last_bo_list = NULL; } static void si_dump_framebuffer(struct si_context *sctx, FILE *f) @@ -665,25 +362,169 @@ } } +static void si_dump_descriptor_list(struct si_descriptors *desc, + const char *shader_name, + const char *elem_name, + unsigned num_elements, + FILE *f) +{ + unsigned i, j; + uint32_t *cpu_list = desc->list; + uint32_t *gpu_list = desc->gpu_list; + const char *list_note = "GPU list"; + + if (!gpu_list) { + gpu_list = cpu_list; + list_note = "CPU list"; + } + + for (i = 0; i < num_elements; i++) { + fprintf(f, COLOR_GREEN "%s%s slot %u (%s):" COLOR_RESET "\n", + shader_name, elem_name, i, list_note); + + switch (desc->element_dw_size) { + case 4: + for (j = 0; j < 4; j++) + ac_dump_reg(f, R_008F00_SQ_BUF_RSRC_WORD0 + j*4, + gpu_list[j], 0xffffffff); + break; + case 8: + for (j = 0; j < 8; j++) + ac_dump_reg(f, R_008F10_SQ_IMG_RSRC_WORD0 + j*4, + gpu_list[j], 0xffffffff); + + fprintf(f, COLOR_CYAN " Buffer:" COLOR_RESET "\n"); + for (j = 0; j < 4; j++) + ac_dump_reg(f, R_008F00_SQ_BUF_RSRC_WORD0 + j*4, + gpu_list[4+j], 0xffffffff); + break; + case 16: + for (j = 0; j < 8; j++) + ac_dump_reg(f, R_008F10_SQ_IMG_RSRC_WORD0 + j*4, + gpu_list[j], 0xffffffff); + + fprintf(f, COLOR_CYAN " Buffer:" COLOR_RESET "\n"); + for (j = 0; j < 4; j++) + ac_dump_reg(f, R_008F00_SQ_BUF_RSRC_WORD0 + j*4, + gpu_list[4+j], 0xffffffff); + + fprintf(f, COLOR_CYAN " FMASK:" COLOR_RESET "\n"); + for (j = 0; j < 8; j++) + ac_dump_reg(f, R_008F10_SQ_IMG_RSRC_WORD0 + j*4, + gpu_list[8+j], 0xffffffff); + + fprintf(f, COLOR_CYAN " Sampler state:" COLOR_RESET "\n"); + for (j = 0; j < 4; j++) + ac_dump_reg(f, R_008F30_SQ_IMG_SAMP_WORD0 + j*4, + gpu_list[12+j], 0xffffffff); + break; + } + + if (memcmp(gpu_list, cpu_list, desc->element_dw_size * 4) != 0) { + fprintf(f, COLOR_RED "!!!!! This slot was corrupted in GPU memory !!!!!" + COLOR_RESET "\n"); + } + + fprintf(f, "\n"); + gpu_list += desc->element_dw_size; + cpu_list += desc->element_dw_size; + } +} + +static void si_dump_descriptors(struct si_context *sctx, + struct si_shader_ctx_state *state, + FILE *f) +{ + if (!state->cso || !state->current) + return; + + unsigned type = state->cso->type; + const struct tgsi_shader_info *info = &state->cso->info; + struct si_descriptors *descs = + &sctx->descriptors[SI_DESCS_FIRST_SHADER + + type * SI_NUM_SHADER_DESCS]; + static const char *shader_name[] = {"VS", "PS", "GS", "TCS", "TES", "CS"}; + + static const char *elem_name[] = { + " - Constant buffer", + " - Shader buffer", + " - Sampler", + " - Image", + }; + unsigned num_elements[] = { + util_last_bit(info->const_buffers_declared), + util_last_bit(info->shader_buffers_declared), + util_last_bit(info->samplers_declared), + util_last_bit(info->images_declared), + }; + + if (type == PIPE_SHADER_VERTEX) { + si_dump_descriptor_list(&sctx->vertex_buffers, shader_name[type], + " - Vertex buffer", info->num_inputs, f); + } + + for (unsigned i = 0; i < SI_NUM_SHADER_DESCS; ++i, ++descs) + si_dump_descriptor_list(descs, shader_name[type], elem_name[i], + num_elements[i], f); +} + static void si_dump_debug_state(struct pipe_context *ctx, FILE *f, unsigned flags) { struct si_context *sctx = (struct si_context*)ctx; - if (flags & PIPE_DEBUG_DEVICE_IS_HUNG) + if (flags & PIPE_DUMP_DEVICE_STATUS_REGISTERS) si_dump_debug_registers(sctx, f); - si_dump_framebuffer(sctx, f); - si_dump_shader(sctx->screen, &sctx->vs_shader, f); - si_dump_shader(sctx->screen, &sctx->tcs_shader, f); - si_dump_shader(sctx->screen, &sctx->tes_shader, f); - si_dump_shader(sctx->screen, &sctx->gs_shader, f); - si_dump_shader(sctx->screen, &sctx->ps_shader, f); + if (flags & PIPE_DUMP_CURRENT_STATES) + si_dump_framebuffer(sctx, f); - si_dump_last_bo_list(sctx, f); - si_dump_last_ib(sctx, f); + if (flags & PIPE_DUMP_CURRENT_SHADERS) { + si_dump_shader(sctx->screen, &sctx->vs_shader, f); + si_dump_shader(sctx->screen, &sctx->tcs_shader, f); + si_dump_shader(sctx->screen, &sctx->tes_shader, f); + si_dump_shader(sctx->screen, &sctx->gs_shader, f); + si_dump_shader(sctx->screen, &sctx->ps_shader, f); + + si_dump_descriptor_list(&sctx->descriptors[SI_DESCS_RW_BUFFERS], + "", "RW buffers", SI_NUM_RW_BUFFERS, f); + si_dump_descriptors(sctx, &sctx->vs_shader, f); + si_dump_descriptors(sctx, &sctx->tcs_shader, f); + si_dump_descriptors(sctx, &sctx->tes_shader, f); + si_dump_descriptors(sctx, &sctx->gs_shader, f); + si_dump_descriptors(sctx, &sctx->ps_shader, f); + } - fprintf(f, "Done.\n"); + if (flags & PIPE_DUMP_LAST_COMMAND_BUFFER) { + si_dump_bo_list(sctx, &sctx->last_gfx, f); + si_dump_last_ib(sctx, f); + + fprintf(f, "Done.\n"); + + /* dump only once */ + radeon_clear_saved_cs(&sctx->last_gfx); + r600_resource_reference(&sctx->last_trace_buf, NULL); + } +} + +static void si_dump_dma(struct si_context *sctx, + struct radeon_saved_cs *saved, FILE *f) +{ + static const char ib_name[] = "sDMA IB"; + unsigned i; + + si_dump_bo_list(sctx, saved, f); + + fprintf(f, "------------------ %s begin ------------------\n", ib_name); + + for (i = 0; i < saved->num_dw; ++i) { + fprintf(f, " %08x\n", saved->ib[i]); + } + + fprintf(f, "------------------- %s end -------------------\n", ib_name); + fprintf(f, "\n"); + + fprintf(f, "SDMA Dump Done.\n"); } static bool si_vm_fault_occured(struct si_context *sctx, uint32_t *out_addr) @@ -706,7 +547,12 @@ /* Get the timestamp. */ if (sscanf(line, "[%u.%u]", &sec, &usec) != 2) { - assert(0); + static bool hit = false; + if (!hit) { + fprintf(stderr, "%s: failed to parse line '%s'\n", + __func__, line); + hit = true; + } continue; } timestamp = sec * 1000000llu + usec; @@ -764,16 +610,14 @@ return fault; } -void si_check_vm_faults(struct si_context *sctx) +void si_check_vm_faults(struct r600_common_context *ctx, + struct radeon_saved_cs *saved, enum ring_type ring) { + struct si_context *sctx = (struct si_context *)ctx; struct pipe_screen *screen = sctx->b.b.screen; FILE *f; uint32_t addr; - - /* Use conservative timeout 800ms, after which we won't wait any - * longer and assume the GPU is hung. - */ - sctx->b.ws->fence_wait(sctx->b.ws, sctx->last_gfx_fence, 800*1000*1000); + char cmd_line[4096]; if (!si_vm_fault_occured(sctx, &addr)) return; @@ -783,12 +627,33 @@ return; fprintf(f, "VM fault report.\n\n"); + if (os_get_command_line(cmd_line, sizeof(cmd_line))) + fprintf(f, "Command: %s\n", cmd_line); fprintf(f, "Driver vendor: %s\n", screen->get_vendor(screen)); fprintf(f, "Device vendor: %s\n", screen->get_device_vendor(screen)); fprintf(f, "Device name: %s\n\n", screen->get_name(screen)); fprintf(f, "Failing VM page: 0x%08x\n\n", addr); - si_dump_debug_state(&sctx->b.b, f, 0); + if (sctx->apitrace_call_number) + fprintf(f, "Last apitrace call: %u\n\n", + sctx->apitrace_call_number); + + switch (ring) { + case RING_GFX: + si_dump_debug_state(&sctx->b.b, f, + PIPE_DUMP_CURRENT_STATES | + PIPE_DUMP_CURRENT_SHADERS | + PIPE_DUMP_LAST_COMMAND_BUFFER); + break; + + case RING_DMA: + si_dump_dma(sctx, saved, f); + break; + + default: + break; + } + fclose(f); fprintf(stderr, "Detected a VM fault, exiting...\n"); @@ -798,6 +663,7 @@ void si_init_debug_functions(struct si_context *sctx) { sctx->b.b.dump_debug_state = si_dump_debug_state; + sctx->b.check_vm_faults = si_check_vm_faults; /* Set the initial dmesg timestamp for this context, so that * only new messages will be checked for VM faults. diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/si_descriptors.c mesa-17.0.7/src/gallium/drivers/radeonsi/si_descriptors.c --- mesa-12.0.6/src/gallium/drivers/radeonsi/si_descriptors.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/si_descriptors.c 2017-06-01 10:37:10.000000000 +0000 @@ -57,13 +57,10 @@ #include "radeon/r600_cs.h" #include "si_pipe.h" -#include "si_shader.h" #include "sid.h" #include "util/u_format.h" -#include "util/u_math.h" #include "util/u_memory.h" -#include "util/u_suballoc.h" #include "util/u_upload_mgr.h" @@ -106,7 +103,7 @@ { int i; - assert(num_elements <= sizeof(desc->enabled_mask)*8); + assert(num_elements <= sizeof(desc->dirty_mask)*8); desc->list = CALLOC(num_elements, element_dw_size * 4); desc->element_dw_size = element_dw_size; @@ -132,7 +129,7 @@ static void si_release_descriptors(struct si_descriptors *desc) { - pipe_resource_reference((struct pipe_resource**)&desc->buffer, NULL); + r600_resource_reference(&desc->buffer, NULL); FREE(desc->list); } @@ -140,7 +137,7 @@ unsigned *out_offset, struct r600_resource **out_buf) { uint64_t va; - u_suballocator_alloc(sctx->ce_suballocator, size, out_offset, + u_suballocator_alloc(sctx->ce_suballocator, size, 64, out_offset, (struct pipe_resource**)out_buf); if (!out_buf) return false; @@ -161,7 +158,7 @@ } static void si_ce_reinitialize_descriptors(struct si_context *sctx, - struct si_descriptors *desc) + struct si_descriptors *desc) { if (desc->buffer) { struct r600_resource *buffer = (struct r600_resource*)desc->buffer; @@ -188,13 +185,10 @@ void si_ce_reinitialize_all_descriptors(struct si_context *sctx) { - for (int i = 0; i < SI_NUM_SHADERS; i++) { - si_ce_reinitialize_descriptors(sctx, &sctx->const_buffers[i].desc); - si_ce_reinitialize_descriptors(sctx, &sctx->shader_buffers[i].desc); - si_ce_reinitialize_descriptors(sctx, &sctx->samplers[i].views.desc); - si_ce_reinitialize_descriptors(sctx, &sctx->images[i].desc); - } - si_ce_reinitialize_descriptors(sctx, &sctx->rw_buffers.desc); + int i; + + for (i = 0; i < SI_NUM_DESCS; ++i) + si_ce_reinitialize_descriptors(sctx, &sctx->descriptors[i]); } void si_ce_enable_loads(struct radeon_winsys_cs *ib) @@ -247,11 +241,11 @@ return false; /* skip the draw call */ util_memcpy_cpu_to_le32(ptr, desc->list, list_size); + desc->gpu_list = ptr; radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, desc->buffer, RADEON_USAGE_READ, RADEON_PRIO_DESCRIPTORS); } - desc->pointer_dirty = true; desc->dirty_mask = 0; if (atom) @@ -260,8 +254,33 @@ return true; } +static void +si_descriptors_begin_new_cs(struct si_context *sctx, struct si_descriptors *desc) +{ + desc->ce_ram_dirty = true; + + if (!desc->buffer) + return; + + radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, desc->buffer, + RADEON_USAGE_READ, RADEON_PRIO_DESCRIPTORS); +} + /* SAMPLER VIEWS */ +static unsigned +si_sampler_descriptors_idx(unsigned shader) +{ + return SI_DESCS_FIRST_SHADER + shader * SI_NUM_SHADER_DESCS + + SI_SHADER_DESCS_SAMPLERS; +} + +static struct si_descriptors * +si_sampler_descriptors(struct si_context *sctx, unsigned shader) +{ + return &sctx->descriptors[si_sampler_descriptors_idx(shader)]; +} + static void si_release_sampler_views(struct si_sampler_views *views) { int i; @@ -269,82 +288,191 @@ for (i = 0; i < ARRAY_SIZE(views->views); i++) { pipe_sampler_view_reference(&views->views[i], NULL); } - si_release_descriptors(&views->desc); } static void si_sampler_view_add_buffer(struct si_context *sctx, struct pipe_resource *resource, - enum radeon_bo_usage usage) -{ - struct r600_resource *rres = (struct r600_resource*)resource; + enum radeon_bo_usage usage, + bool is_stencil_sampler, + bool check_mem) +{ + struct r600_resource *rres; + struct r600_texture *rtex; + enum radeon_bo_priority priority; if (!resource) return; - radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, rres, usage, - r600_get_sampler_view_priority(rres)); + if (resource->target != PIPE_BUFFER) { + struct r600_texture *tex = (struct r600_texture*)resource; + + if (tex->is_depth && !r600_can_sample_zs(tex, is_stencil_sampler)) + resource = &tex->flushed_depth_texture->resource.b.b; + } + + rres = (struct r600_resource*)resource; + priority = r600_get_sampler_view_priority(rres); + + radeon_add_to_buffer_list_check_mem(&sctx->b, &sctx->b.gfx, + rres, usage, priority, + check_mem); + + if (resource->target == PIPE_BUFFER) + return; + + /* Now add separate DCC or HTILE. */ + rtex = (struct r600_texture*)resource; + if (rtex->dcc_separate_buffer) { + radeon_add_to_buffer_list_check_mem(&sctx->b, &sctx->b.gfx, + rtex->dcc_separate_buffer, usage, + RADEON_PRIO_DCC, check_mem); + } + + if (rtex->htile_buffer && + rtex->tc_compatible_htile && + !is_stencil_sampler) { + radeon_add_to_buffer_list_check_mem(&sctx->b, &sctx->b.gfx, + rtex->htile_buffer, usage, + RADEON_PRIO_HTILE, check_mem); + } } static void si_sampler_views_begin_new_cs(struct si_context *sctx, struct si_sampler_views *views) { - unsigned mask = views->desc.enabled_mask; + unsigned mask = views->enabled_mask; /* Add buffers to the CS. */ while (mask) { int i = u_bit_scan(&mask); + struct si_sampler_view *sview = (struct si_sampler_view *)views->views[i]; - si_sampler_view_add_buffer(sctx, views->views[i]->texture, - RADEON_USAGE_READ); + si_sampler_view_add_buffer(sctx, sview->base.texture, + RADEON_USAGE_READ, + sview->is_stencil_sampler, false); } +} - views->desc.ce_ram_dirty = true; +/* Set buffer descriptor fields that can be changed by reallocations. */ +static void si_set_buf_desc_address(struct r600_resource *buf, + uint64_t offset, uint32_t *state) +{ + uint64_t va = buf->gpu_address + offset; - if (!views->desc.buffer) - return; - radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, views->desc.buffer, - RADEON_USAGE_READWRITE, RADEON_PRIO_DESCRIPTORS); + state[0] = va; + state[1] &= C_008F04_BASE_ADDRESS_HI; + state[1] |= S_008F04_BASE_ADDRESS_HI(va >> 32); +} + +/* Set texture descriptor fields that can be changed by reallocations. + * + * \param tex texture + * \param base_level_info information of the level of BASE_ADDRESS + * \param base_level the level of BASE_ADDRESS + * \param first_level pipe_sampler_view.u.tex.first_level + * \param block_width util_format_get_blockwidth() + * \param is_stencil select between separate Z & Stencil + * \param state descriptor to update + */ +void si_set_mutable_tex_desc_fields(struct r600_texture *tex, + const struct radeon_surf_level *base_level_info, + unsigned base_level, unsigned first_level, + unsigned block_width, bool is_stencil, + uint32_t *state) +{ + uint64_t va; + unsigned pitch = base_level_info->nblk_x * block_width; + + if (tex->is_depth && !r600_can_sample_zs(tex, is_stencil)) { + tex = tex->flushed_depth_texture; + is_stencil = false; + } + + va = tex->resource.gpu_address + base_level_info->offset; + + state[1] &= C_008F14_BASE_ADDRESS_HI; + state[3] &= C_008F1C_TILING_INDEX; + state[4] &= C_008F20_PITCH; + state[6] &= C_008F28_COMPRESSION_EN; + + state[0] = va >> 8; + state[1] |= S_008F14_BASE_ADDRESS_HI(va >> 40); + state[3] |= S_008F1C_TILING_INDEX(si_tile_mode_index(tex, base_level, + is_stencil)); + state[4] |= S_008F20_PITCH(pitch - 1); + + if (tex->dcc_offset && first_level < tex->surface.num_dcc_levels) { + state[6] |= S_008F28_COMPRESSION_EN(1); + state[7] = ((!tex->dcc_separate_buffer ? tex->resource.gpu_address : 0) + + tex->dcc_offset + + base_level_info->dcc_offset) >> 8; + } else if (tex->tc_compatible_htile) { + state[6] |= S_008F28_COMPRESSION_EN(1); + state[7] = tex->htile_buffer->gpu_address >> 8; + } } static void si_set_sampler_view(struct si_context *sctx, - struct si_sampler_views *views, - unsigned slot, struct pipe_sampler_view *view) + unsigned shader, + unsigned slot, struct pipe_sampler_view *view, + bool disallow_early_out) { + struct si_sampler_views *views = &sctx->samplers[shader].views; struct si_sampler_view *rview = (struct si_sampler_view*)view; - uint32_t *desc = views->desc.list + slot * 16; + struct si_descriptors *descs = si_sampler_descriptors(sctx, shader); + uint32_t *desc = descs->list + slot * 16; - if (view && view->texture && view->texture->target != PIPE_BUFFER && - G_008F28_COMPRESSION_EN(rview->state[6]) && - ((struct r600_texture*)view->texture)->dcc_offset == 0) { - rview->state[6] &= C_008F28_COMPRESSION_EN & - C_008F28_ALPHA_IS_ON_MSB; - } else if (views->views[slot] == view) + if (views->views[slot] == view && !disallow_early_out) return; if (view) { struct r600_texture *rtex = (struct r600_texture *)view->texture; - si_sampler_view_add_buffer(sctx, view->texture, - RADEON_USAGE_READ); - + assert(rtex); /* views with texture == NULL aren't supported */ pipe_sampler_view_reference(&views->views[slot], view); - memcpy(views->desc.list + slot * 16, rview->state, 8*4); + memcpy(desc, rview->state, 8*4); + + if (rtex->resource.b.b.target == PIPE_BUFFER) { + rtex->resource.bind_history |= PIPE_BIND_SAMPLER_VIEW; + + si_set_buf_desc_address(&rtex->resource, + view->u.buf.offset, + desc + 4); + } else { + bool is_separate_stencil = + rtex->db_compatible && + rview->is_stencil_sampler; + + si_set_mutable_tex_desc_fields(rtex, + rview->base_level_info, + rview->base_level, + rview->base.u.tex.first_level, + rview->block_width, + is_separate_stencil, + desc); + } - if (view->texture && view->texture->target != PIPE_BUFFER && + if (rtex->resource.b.b.target != PIPE_BUFFER && rtex->fmask.size) { - memcpy(views->desc.list + slot*16 + 8, + memcpy(desc + 8, rview->fmask_state, 8*4); } else { /* Disable FMASK and bind sampler state in [12:15]. */ - memcpy(views->desc.list + slot*16 + 8, + memcpy(desc + 8, null_texture_descriptor, 4*4); if (views->sampler_states[slot]) - memcpy(views->desc.list + slot*16 + 12, - views->sampler_states[slot], 4*4); + memcpy(desc + 12, + views->sampler_states[slot]->val, 4*4); } - views->desc.enabled_mask |= 1u << slot; + views->enabled_mask |= 1u << slot; + + /* Since this can flush, it must be done after enabled_mask is + * updated. */ + si_sampler_view_add_buffer(sctx, view->texture, + RADEON_USAGE_READ, + rview->is_stencil_sampler, true); } else { pipe_sampler_view_reference(&views->views[slot], NULL); memcpy(desc, null_texture_descriptor, 8*4); @@ -353,12 +481,13 @@ /* Re-set the sampler state if we are transitioning from FMASK. */ if (views->sampler_states[slot]) memcpy(desc + 12, - views->sampler_states[slot], 4*4); + views->sampler_states[slot]->val, 4*4); - views->desc.enabled_mask &= ~(1u << slot); + views->enabled_mask &= ~(1u << slot); } - views->desc.dirty_mask |= 1u << slot; + descs->dirty_mask |= 1u << slot; + sctx->descriptors_dirty |= 1u << si_sampler_descriptors_idx(shader); } static bool is_compressed_colortex(struct r600_texture *rtex) @@ -367,8 +496,22 @@ (rtex->dcc_offset && rtex->dirty_level_mask); } +static void si_update_compressed_tex_shader_mask(struct si_context *sctx, + unsigned shader) +{ + struct si_textures_info *samplers = &sctx->samplers[shader]; + unsigned shader_bit = 1 << shader; + + if (samplers->depth_texture_mask || + samplers->compressed_colortex_mask || + sctx->images[shader].compressed_colortex_mask) + sctx->compressed_tex_shader_mask |= shader_bit; + else + sctx->compressed_tex_shader_mask &= ~shader_bit; +} + static void si_set_sampler_views(struct pipe_context *ctx, - unsigned shader, unsigned start, + enum pipe_shader_type shader, unsigned start, unsigned count, struct pipe_sampler_view **views) { @@ -385,17 +528,19 @@ if (!views || !views[i]) { samplers->depth_texture_mask &= ~(1u << slot); samplers->compressed_colortex_mask &= ~(1u << slot); - si_set_sampler_view(sctx, &samplers->views, slot, NULL); + si_set_sampler_view(sctx, shader, slot, NULL, false); continue; } - si_set_sampler_view(sctx, &samplers->views, slot, views[i]); + si_set_sampler_view(sctx, shader, slot, views[i], false); if (views[i]->texture && views[i]->texture->target != PIPE_BUFFER) { struct r600_texture *rtex = (struct r600_texture*)views[i]->texture; + struct si_sampler_view *rview = (struct si_sampler_view *)views[i]; - if (rtex->is_depth && !rtex->is_flushing_texture) { + if (rtex->db_compatible && + (!rtex->tc_compatible_htile || rview->is_stencil_sampler)) { samplers->depth_texture_mask |= 1u << slot; } else { samplers->depth_texture_mask &= ~(1u << slot); @@ -405,17 +550,23 @@ } else { samplers->compressed_colortex_mask &= ~(1u << slot); } + + if (rtex->dcc_offset && + p_atomic_read(&rtex->framebuffers_bound)) + sctx->need_check_render_feedback = true; } else { samplers->depth_texture_mask &= ~(1u << slot); samplers->compressed_colortex_mask &= ~(1u << slot); } } + + si_update_compressed_tex_shader_mask(sctx, shader); } static void si_samplers_update_compressed_colortex_mask(struct si_textures_info *samplers) { - unsigned mask = samplers->views.desc.enabled_mask; + unsigned mask = samplers->views.enabled_mask; while (mask) { int i = u_bit_scan(&mask); @@ -435,6 +586,19 @@ /* IMAGE VIEWS */ +static unsigned +si_image_descriptors_idx(unsigned shader) +{ + return SI_DESCS_FIRST_SHADER + shader * SI_NUM_SHADER_DESCS + + SI_SHADER_DESCS_IMAGES; +} + +static struct si_descriptors* +si_image_descriptors(struct si_context *sctx, unsigned shader) +{ + return &sctx->descriptors[si_image_descriptors_idx(shader)]; +} + static void si_release_image_views(struct si_images_info *images) { @@ -445,14 +609,12 @@ pipe_resource_reference(&view->resource, NULL); } - - si_release_descriptors(&images->desc); } static void si_image_views_begin_new_cs(struct si_context *sctx, struct si_images_info *images) { - uint mask = images->desc.enabled_mask; + uint mask = images->enabled_mask; /* Add buffers to the CS. */ while (mask) { @@ -462,138 +624,172 @@ assert(view->resource); si_sampler_view_add_buffer(sctx, view->resource, - RADEON_USAGE_READWRITE); - } - - images->desc.ce_ram_dirty = true; - - if (images->desc.buffer) { - radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, - images->desc.buffer, - RADEON_USAGE_READ, - RADEON_PRIO_DESCRIPTORS); + RADEON_USAGE_READWRITE, false, false); } } static void -si_disable_shader_image(struct si_images_info *images, unsigned slot) +si_disable_shader_image(struct si_context *ctx, unsigned shader, unsigned slot) { - if (images->desc.enabled_mask & (1u << slot)) { + struct si_images_info *images = &ctx->images[shader]; + + if (images->enabled_mask & (1u << slot)) { + struct si_descriptors *descs = si_image_descriptors(ctx, shader); + pipe_resource_reference(&images->views[slot].resource, NULL); images->compressed_colortex_mask &= ~(1 << slot); - memcpy(images->desc.list + slot*8, null_image_descriptor, 8*4); - images->desc.enabled_mask &= ~(1u << slot); - images->desc.dirty_mask |= 1u << slot; + memcpy(descs->list + slot*8, null_image_descriptor, 8*4); + images->enabled_mask &= ~(1u << slot); + descs->dirty_mask |= 1u << slot; + ctx->descriptors_dirty |= 1u << si_image_descriptors_idx(shader); } } static void -si_mark_image_range_valid(struct pipe_image_view *view) +si_mark_image_range_valid(const struct pipe_image_view *view) { struct r600_resource *res = (struct r600_resource *)view->resource; - const struct util_format_description *desc; - unsigned stride; assert(res && res->b.b.target == PIPE_BUFFER); - desc = util_format_description(view->format); - stride = desc->block.bits / 8; - util_range_add(&res->valid_buffer_range, - stride * (view->u.buf.first_element), - stride * (view->u.buf.last_element + 1)); + view->u.buf.offset, + view->u.buf.offset + view->u.buf.size); } -static void -si_set_shader_images(struct pipe_context *pipe, unsigned shader, - unsigned start_slot, unsigned count, - struct pipe_image_view *views) +static void si_set_shader_image(struct si_context *ctx, + unsigned shader, + unsigned slot, const struct pipe_image_view *view, + bool skip_decompress) { - struct si_context *ctx = (struct si_context *)pipe; struct si_screen *screen = ctx->screen; struct si_images_info *images = &ctx->images[shader]; - unsigned i, slot; + struct si_descriptors *descs = si_image_descriptors(ctx, shader); + struct r600_resource *res; + uint32_t *desc = descs->list + slot * 8; - assert(shader < SI_NUM_SHADERS); - - if (!count) + if (!view || !view->resource) { + si_disable_shader_image(ctx, shader, slot); return; + } - assert(start_slot + count <= SI_NUM_IMAGES); + res = (struct r600_resource *)view->resource; - for (i = 0, slot = start_slot; i < count; ++i, ++slot) { - struct r600_resource *res; + if (&images->views[slot] != view) + util_copy_image_view(&images->views[slot], view); - if (!views || !views[i].resource) { - si_disable_shader_image(images, slot); - continue; + if (res->b.b.target == PIPE_BUFFER) { + if (view->access & PIPE_IMAGE_ACCESS_WRITE) + si_mark_image_range_valid(view); + + si_make_buffer_descriptor(screen, res, + view->format, + view->u.buf.offset, + view->u.buf.size, + descs->list + slot * 8); + si_set_buf_desc_address(res, view->u.buf.offset, desc + 4); + + images->compressed_colortex_mask &= ~(1 << slot); + res->bind_history |= PIPE_BIND_SHADER_IMAGE; + } else { + static const unsigned char swizzle[4] = { 0, 1, 2, 3 }; + struct r600_texture *tex = (struct r600_texture *)res; + unsigned level = view->u.tex.level; + unsigned width, height, depth; + bool uses_dcc = tex->dcc_offset && + level < tex->surface.num_dcc_levels; + + assert(!tex->is_depth); + assert(tex->fmask.size == 0); + + if (uses_dcc && !skip_decompress && + (view->access & PIPE_IMAGE_ACCESS_WRITE || + !vi_dcc_formats_compatible(res->b.b.format, view->format))) { + /* If DCC can't be disabled, at least decompress it. + * The decompression is relatively cheap if the surface + * has been decompressed already. + */ + if (r600_texture_disable_dcc(&ctx->b, tex)) + uses_dcc = false; + else + ctx->b.decompress_dcc(&ctx->b.b, tex); } - res = (struct r600_resource *)views[i].resource; - util_copy_image_view(&images->views[slot], &views[i]); + if (is_compressed_colortex(tex)) { + images->compressed_colortex_mask |= 1 << slot; + } else { + images->compressed_colortex_mask &= ~(1 << slot); + } - si_sampler_view_add_buffer(ctx, &res->b.b, - RADEON_USAGE_READWRITE); + if (uses_dcc && + p_atomic_read(&tex->framebuffers_bound)) + ctx->need_check_render_feedback = true; - if (res->b.b.target == PIPE_BUFFER) { - if (views[i].access & PIPE_IMAGE_ACCESS_WRITE) - si_mark_image_range_valid(&views[i]); - - si_make_buffer_descriptor(screen, res, - views[i].format, - views[i].u.buf.first_element, - views[i].u.buf.last_element, - images->desc.list + slot * 8); - images->compressed_colortex_mask &= ~(1 << slot); - } else { - static const unsigned char swizzle[4] = { 0, 1, 2, 3 }; - struct r600_texture *tex = (struct r600_texture *)res; - unsigned level; - unsigned width, height, depth; - - assert(!tex->is_depth); - assert(tex->fmask.size == 0); - - if (tex->dcc_offset && - views[i].access & PIPE_IMAGE_ACCESS_WRITE) - r600_texture_disable_dcc(&screen->b, tex); + /* Always force the base level to the selected level. + * + * This is required for 3D textures, where otherwise + * selecting a single slice for non-layered bindings + * fails. It doesn't hurt the other targets. + */ + width = u_minify(res->b.b.width0, level); + height = u_minify(res->b.b.height0, level); + depth = u_minify(res->b.b.depth0, level); + + si_make_texture_descriptor(screen, tex, + false, res->b.b.target, + view->format, swizzle, + 0, 0, + view->u.tex.first_layer, + view->u.tex.last_layer, + width, height, depth, + desc, NULL); + si_set_mutable_tex_desc_fields(tex, &tex->surface.level[level], + level, level, + util_format_get_blockwidth(view->format), + false, desc); + } + + images->enabled_mask |= 1u << slot; + descs->dirty_mask |= 1u << slot; + ctx->descriptors_dirty |= 1u << si_image_descriptors_idx(shader); + + /* Since this can flush, it must be done after enabled_mask is updated. */ + si_sampler_view_add_buffer(ctx, &res->b.b, + RADEON_USAGE_READWRITE, false, true); +} - if (is_compressed_colortex(tex)) { - images->compressed_colortex_mask |= 1 << slot; - } else { - images->compressed_colortex_mask &= ~(1 << slot); - } +static void +si_set_shader_images(struct pipe_context *pipe, + enum pipe_shader_type shader, + unsigned start_slot, unsigned count, + const struct pipe_image_view *views) +{ + struct si_context *ctx = (struct si_context *)pipe; + unsigned i, slot; - /* Always force the base level to the selected level. - * - * This is required for 3D textures, where otherwise - * selecting a single slice for non-layered bindings - * fails. It doesn't hurt the other targets. - */ - level = views[i].u.tex.level; - width = u_minify(res->b.b.width0, level); - height = u_minify(res->b.b.height0, level); - depth = u_minify(res->b.b.depth0, level); - - si_make_texture_descriptor(screen, tex, false, res->b.b.target, - views[i].format, swizzle, - level, 0, 0, - views[i].u.tex.first_layer, views[i].u.tex.last_layer, - width, height, depth, - images->desc.list + slot * 8, - NULL); - } + assert(shader < SI_NUM_SHADERS); - images->desc.enabled_mask |= 1u << slot; - images->desc.dirty_mask |= 1u << slot; + if (!count) + return; + + assert(start_slot + count <= SI_NUM_IMAGES); + + if (views) { + for (i = 0, slot = start_slot; i < count; ++i, ++slot) + si_set_shader_image(ctx, shader, slot, &views[i], false); + } else { + for (i = 0, slot = start_slot; i < count; ++i, ++slot) + si_set_shader_image(ctx, shader, slot, NULL, false); } + + si_update_compressed_tex_shader_mask(ctx, shader); } static void si_images_update_compressed_colortex_mask(struct si_images_info *images) { - unsigned mask = images->desc.enabled_mask; + unsigned mask = images->enabled_mask; while (mask) { int i = u_bit_scan(&mask); @@ -613,12 +809,13 @@ /* SAMPLER STATES */ -static void si_bind_sampler_states(struct pipe_context *ctx, unsigned shader, +static void si_bind_sampler_states(struct pipe_context *ctx, + enum pipe_shader_type shader, unsigned start, unsigned count, void **states) { struct si_context *sctx = (struct si_context *)ctx; struct si_textures_info *samplers = &sctx->samplers[shader]; - struct si_descriptors *desc = &samplers->views.desc; + struct si_descriptors *desc = si_sampler_descriptors(sctx, shader); struct si_sampler_state **sstates = (struct si_sampler_state**)states; int i; @@ -632,6 +829,9 @@ sstates[i] == samplers->views.sampler_states[slot]) continue; +#ifdef DEBUG + assert(sstates[i]->magic == SI_SAMPLER_STATE_MAGIC); +#endif samplers->views.sampler_states[slot] = sstates[i]; /* If FMASK is bound, don't overwrite it. @@ -645,12 +845,14 @@ memcpy(desc->list + slot * 16 + 12, sstates[i]->val, 4*4); desc->dirty_mask |= 1u << slot; + sctx->descriptors_dirty |= 1u << si_sampler_descriptors_idx(shader); } } /* BUFFER RESOURCES */ static void si_init_buffer_resources(struct si_buffer_resources *buffers, + struct si_descriptors *descs, unsigned num_buffers, unsigned shader_userdata_index, enum radeon_bo_usage shader_usage, @@ -661,26 +863,26 @@ buffers->priority = priority; buffers->buffers = CALLOC(num_buffers, sizeof(struct pipe_resource*)); - si_init_descriptors(&buffers->desc, shader_userdata_index, 4, + si_init_descriptors(descs, shader_userdata_index, 4, num_buffers, NULL, ce_offset); } -static void si_release_buffer_resources(struct si_buffer_resources *buffers) +static void si_release_buffer_resources(struct si_buffer_resources *buffers, + struct si_descriptors *descs) { int i; - for (i = 0; i < buffers->desc.num_elements; i++) { + for (i = 0; i < descs->num_elements; i++) { pipe_resource_reference(&buffers->buffers[i], NULL); } FREE(buffers->buffers); - si_release_descriptors(&buffers->desc); } static void si_buffer_resources_begin_new_cs(struct si_context *sctx, struct si_buffer_resources *buffers) { - unsigned mask = buffers->desc.enabled_mask; + unsigned mask = buffers->enabled_mask; /* Add buffers to the CS. */ while (mask) { @@ -690,14 +892,27 @@ (struct r600_resource*)buffers->buffers[i], buffers->shader_usage, buffers->priority); } +} - buffers->desc.ce_ram_dirty = true; +static void si_get_buffer_from_descriptors(struct si_buffer_resources *buffers, + struct si_descriptors *descs, + unsigned idx, struct pipe_resource **buf, + unsigned *offset, unsigned *size) +{ + pipe_resource_reference(buf, buffers->buffers[idx]); + if (*buf) { + struct r600_resource *res = r600_resource(*buf); + const uint32_t *desc = descs->list + idx * 4; + uint64_t va; - if (!buffers->desc.buffer) - return; - radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, - buffers->desc.buffer, RADEON_USAGE_READWRITE, - RADEON_PRIO_DESCRIPTORS); + *size = desc[2]; + + assert(G_008F04_STRIDE(desc[1]) == 0); + va = ((uint64_t)desc[1] << 32) | desc[0]; + + assert(va >= res->gpu_address && va + *size <= res->gpu_address + res->bo_size); + *offset = va - res->gpu_address; + } } /* VERTEX BUFFERS */ @@ -728,19 +943,20 @@ RADEON_PRIO_DESCRIPTORS); } -static bool si_upload_vertex_buffer_descriptors(struct si_context *sctx) +bool si_upload_vertex_buffer_descriptors(struct si_context *sctx) { + struct si_vertex_element *velems = sctx->vertex_elements; struct si_descriptors *desc = &sctx->vertex_buffers; - bool bound[SI_NUM_VERTEX_BUFFERS] = {}; - unsigned i, count = sctx->vertex_elements->count; + unsigned i, count = velems->count; uint64_t va; uint32_t *ptr; - if (!sctx->vertex_buffers_dirty) - return true; - if (!count || !sctx->vertex_elements) + if (!sctx->vertex_buffers_dirty || !count || !velems) return true; + unsigned fix_size3 = velems->fix_size3; + unsigned first_vb_use_mask = velems->first_vb_use_mask; + /* Vertex buffer descriptors are the only ones which are uploaded * directly through a staging buffer and don't go through * the fine-grained upload path. @@ -757,18 +973,14 @@ assert(count <= SI_NUM_VERTEX_BUFFERS); for (i = 0; i < count; i++) { - struct pipe_vertex_element *ve = &sctx->vertex_elements->elements[i]; + struct pipe_vertex_element *ve = &velems->elements[i]; struct pipe_vertex_buffer *vb; struct r600_resource *rbuffer; unsigned offset; + unsigned vbo_index = ve->vertex_buffer_index; uint32_t *desc = &ptr[i*4]; - if (ve->vertex_buffer_index >= ARRAY_SIZE(sctx->vertex_buffer)) { - memset(desc, 0, 16); - continue; - } - - vb = &sctx->vertex_buffer[ve->vertex_buffer_index]; + vb = &sctx->vertex_buffer[vbo_index]; rbuffer = (struct r600_resource*)vb->buffer; if (!rbuffer) { memset(desc, 0, 16); @@ -783,21 +995,42 @@ desc[1] = S_008F04_BASE_ADDRESS_HI(va >> 32) | S_008F04_STRIDE(vb->stride); - if (sctx->b.chip_class <= CIK && vb->stride) + if (sctx->b.chip_class <= CIK && vb->stride) { /* Round up by rounding down and adding 1 */ desc[2] = (vb->buffer->width0 - offset - - sctx->vertex_elements->format_size[i]) / + velems->format_size[i]) / vb->stride + 1; - else + } else { + uint32_t size3; + desc[2] = vb->buffer->width0 - offset; - desc[3] = sctx->vertex_elements->rsrc_word3[i]; + /* For attributes of size 3 with byte or short + * components, we use a 4-component data format. + * + * As a consequence, we have to round the buffer size + * up so that the hardware sees four components as + * being inside the buffer if and only if the first + * three components are in the buffer. + * + * Since the offset and stride are guaranteed to be + * 4-byte aligned, this alignment will never cross the + * winsys buffer boundary. + */ + size3 = (fix_size3 >> (2 * i)) & 3; + if (vb->stride && size3) { + assert(offset % 4 == 0 && vb->stride % 4 == 0); + assert(size3 <= 2); + desc[2] = align(desc[2], size3 * 2); + } + } + + desc[3] = velems->rsrc_word3[i]; - if (!bound[ve->vertex_buffer_index]) { + if (first_vb_use_mask & (1 << i)) { radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, (struct r600_resource*)vb->buffer, RADEON_USAGE_READ, RADEON_PRIO_VERTEX_BUFFER); - bound[ve->vertex_buffer_index] = true; } } @@ -805,15 +1038,28 @@ * on performance (confirmed by testing). New descriptors are always * uploaded to a fresh new buffer, so I don't think flushing the const * cache is needed. */ - desc->pointer_dirty = true; si_mark_atom_dirty(sctx, &sctx->shader_userdata.atom); sctx->vertex_buffers_dirty = false; + sctx->vertex_buffer_pointer_dirty = true; return true; } /* CONSTANT BUFFERS */ +static unsigned +si_const_buffer_descriptors_idx(unsigned shader) +{ + return SI_DESCS_FIRST_SHADER + shader * SI_NUM_SHADER_DESCS + + SI_SHADER_DESCS_CONST_BUFFERS; +} + +static struct si_descriptors * +si_const_buffer_descriptors(struct si_context *sctx, unsigned shader) +{ + return &sctx->descriptors[si_const_buffer_descriptors_idx(shader)]; +} + void si_upload_const_buffer(struct si_context *sctx, struct r600_resource **rbuffer, const uint8_t *ptr, unsigned size, uint32_t *const_offset) { @@ -827,9 +1073,11 @@ static void si_set_constant_buffer(struct si_context *sctx, struct si_buffer_resources *buffers, - uint slot, struct pipe_constant_buffer *input) + unsigned descriptors_idx, + uint slot, const struct pipe_constant_buffer *input) { - assert(slot < buffers->desc.num_elements); + struct si_descriptors *descs = &sctx->descriptors[descriptors_idx]; + assert(slot < descs->num_elements); pipe_resource_reference(&buffers->buffers[slot], NULL); /* CIK cannot unbind a constant buffer (S_BUFFER_LOAD is buggy @@ -851,17 +1099,19 @@ input->buffer_size, &buffer_offset); if (!buffer) { /* Just unbind on failure. */ - si_set_constant_buffer(sctx, buffers, slot, NULL); + si_set_constant_buffer(sctx, buffers, descriptors_idx, slot, NULL); return; } va = r600_resource(buffer)->gpu_address + buffer_offset; } else { pipe_resource_reference(&buffer, input->buffer); va = r600_resource(buffer)->gpu_address + input->buffer_offset; + /* Only track usage for non-user buffers. */ + r600_resource(buffer)->bind_history |= PIPE_BIND_CONSTANT_BUFFER; } /* Set the descriptor. */ - uint32_t *desc = buffers->desc.list + slot*4; + uint32_t *desc = descs->list + slot*4; desc[0] = va; desc[1] = S_008F04_BASE_ADDRESS_HI(va >> 32) | S_008F04_STRIDE(0); @@ -874,61 +1124,94 @@ S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32); buffers->buffers[slot] = buffer; - radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, - (struct r600_resource*)buffer, - buffers->shader_usage, buffers->priority); - buffers->desc.enabled_mask |= 1u << slot; + radeon_add_to_buffer_list_check_mem(&sctx->b, &sctx->b.gfx, + (struct r600_resource*)buffer, + buffers->shader_usage, + buffers->priority, true); + buffers->enabled_mask |= 1u << slot; } else { /* Clear the descriptor. */ - memset(buffers->desc.list + slot*4, 0, sizeof(uint32_t) * 4); - buffers->desc.enabled_mask &= ~(1u << slot); + memset(descs->list + slot*4, 0, sizeof(uint32_t) * 4); + buffers->enabled_mask &= ~(1u << slot); } - buffers->desc.dirty_mask |= 1u << slot; + descs->dirty_mask |= 1u << slot; + sctx->descriptors_dirty |= 1u << descriptors_idx; } void si_set_rw_buffer(struct si_context *sctx, - uint slot, struct pipe_constant_buffer *input) + uint slot, const struct pipe_constant_buffer *input) { - si_set_constant_buffer(sctx, &sctx->rw_buffers, slot, input); + si_set_constant_buffer(sctx, &sctx->rw_buffers, + SI_DESCS_RW_BUFFERS, slot, input); } static void si_pipe_set_constant_buffer(struct pipe_context *ctx, uint shader, uint slot, - struct pipe_constant_buffer *input) + const struct pipe_constant_buffer *input) { struct si_context *sctx = (struct si_context *)ctx; if (shader >= SI_NUM_SHADERS) return; - si_set_constant_buffer(sctx, &sctx->const_buffers[shader], slot, input); + si_set_constant_buffer(sctx, &sctx->const_buffers[shader], + si_const_buffer_descriptors_idx(shader), + slot, input); +} + +void si_get_pipe_constant_buffer(struct si_context *sctx, uint shader, + uint slot, struct pipe_constant_buffer *cbuf) +{ + cbuf->user_buffer = NULL; + si_get_buffer_from_descriptors( + &sctx->const_buffers[shader], + si_const_buffer_descriptors(sctx, shader), + slot, &cbuf->buffer, &cbuf->buffer_offset, &cbuf->buffer_size); } /* SHADER BUFFERS */ -static void si_set_shader_buffers(struct pipe_context *ctx, unsigned shader, +static unsigned +si_shader_buffer_descriptors_idx(enum pipe_shader_type shader) +{ + return SI_DESCS_FIRST_SHADER + shader * SI_NUM_SHADER_DESCS + + SI_SHADER_DESCS_SHADER_BUFFERS; +} + +static struct si_descriptors * +si_shader_buffer_descriptors(struct si_context *sctx, + enum pipe_shader_type shader) +{ + return &sctx->descriptors[si_shader_buffer_descriptors_idx(shader)]; +} + +static void si_set_shader_buffers(struct pipe_context *ctx, + enum pipe_shader_type shader, unsigned start_slot, unsigned count, - struct pipe_shader_buffer *sbuffers) + const struct pipe_shader_buffer *sbuffers) { struct si_context *sctx = (struct si_context *)ctx; struct si_buffer_resources *buffers = &sctx->shader_buffers[shader]; + struct si_descriptors *descs = si_shader_buffer_descriptors(sctx, shader); unsigned i; assert(start_slot + count <= SI_NUM_SHADER_BUFFERS); for (i = 0; i < count; ++i) { - struct pipe_shader_buffer *sbuffer = sbuffers ? &sbuffers[i] : NULL; + const struct pipe_shader_buffer *sbuffer = sbuffers ? &sbuffers[i] : NULL; struct r600_resource *buf; unsigned slot = start_slot + i; - uint32_t *desc = buffers->desc.list + slot * 4; + uint32_t *desc = descs->list + slot * 4; uint64_t va; if (!sbuffer || !sbuffer->buffer) { pipe_resource_reference(&buffers->buffers[slot], NULL); memset(desc, 0, sizeof(uint32_t) * 4); - buffers->desc.enabled_mask &= ~(1u << slot); - buffers->desc.dirty_mask |= 1u << slot; + buffers->enabled_mask &= ~(1u << slot); + descs->dirty_mask |= 1u << slot; + sctx->descriptors_dirty |= + 1u << si_shader_buffer_descriptors_idx(shader); continue; } @@ -947,10 +1230,33 @@ S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32); pipe_resource_reference(&buffers->buffers[slot], &buf->b.b); - radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, buf, - buffers->shader_usage, buffers->priority); - buffers->desc.enabled_mask |= 1u << slot; - buffers->desc.dirty_mask |= 1u << slot; + radeon_add_to_buffer_list_check_mem(&sctx->b, &sctx->b.gfx, buf, + buffers->shader_usage, + buffers->priority, true); + buf->bind_history |= PIPE_BIND_SHADER_BUFFER; + + buffers->enabled_mask |= 1u << slot; + descs->dirty_mask |= 1u << slot; + sctx->descriptors_dirty |= + 1u << si_shader_buffer_descriptors_idx(shader); + + util_range_add(&buf->valid_buffer_range, sbuffer->buffer_offset, + sbuffer->buffer_offset + sbuffer->buffer_size); + } +} + +void si_get_shader_buffers(struct si_context *sctx, uint shader, + uint start_slot, uint count, + struct pipe_shader_buffer *sbuf) +{ + struct si_buffer_resources *buffers = &sctx->shader_buffers[shader]; + struct si_descriptors *descs = si_shader_buffer_descriptors(sctx, shader); + + for (unsigned i = 0; i < count; ++i) { + si_get_buffer_from_descriptors( + buffers, descs, start_slot + i, + &sbuf[i].buffer, &sbuf[i].buffer_offset, + &sbuf[i].buffer_size); } } @@ -964,11 +1270,12 @@ { struct si_context *sctx = (struct si_context *)ctx; struct si_buffer_resources *buffers = &sctx->rw_buffers; + struct si_descriptors *descs = &sctx->descriptors[SI_DESCS_RW_BUFFERS]; /* The stride field in the resource descriptor has 14 bits */ assert(stride < (1 << 14)); - assert(slot < buffers->desc.num_elements); + assert(slot < descs->num_elements); pipe_resource_reference(&buffers->buffers[slot], NULL); if (buffer) { @@ -1016,7 +1323,7 @@ num_records *= stride; /* Set the descriptor. */ - uint32_t *desc = buffers->desc.list + slot*4; + uint32_t *desc = descs->list + slot*4; desc[0] = va; desc[1] = S_008F04_BASE_ADDRESS_HI(va >> 32) | S_008F04_STRIDE(stride) | @@ -1036,14 +1343,15 @@ radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, (struct r600_resource*)buffer, buffers->shader_usage, buffers->priority); - buffers->desc.enabled_mask |= 1u << slot; + buffers->enabled_mask |= 1u << slot; } else { /* Clear the descriptor. */ - memset(buffers->desc.list + slot*4, 0, sizeof(uint32_t) * 4); - buffers->desc.enabled_mask &= ~(1u << slot); + memset(descs->list + slot*4, 0, sizeof(uint32_t) * 4); + buffers->enabled_mask &= ~(1u << slot); } - buffers->desc.dirty_mask |= 1u << slot; + descs->dirty_mask |= 1u << slot; + sctx->descriptors_dirty |= 1u << SI_DESCS_RW_BUFFERS; } /* STREAMOUT BUFFERS */ @@ -1055,6 +1363,7 @@ { struct si_context *sctx = (struct si_context *)ctx; struct si_buffer_resources *buffers = &sctx->rw_buffers; + struct si_descriptors *descs = &sctx->descriptors[SI_DESCS_RW_BUFFERS]; unsigned old_num_targets = sctx->b.streamout.num_targets; unsigned i, bufidx; @@ -1117,7 +1426,7 @@ * the buffer will be considered not bound and store * instructions will be no-ops. */ - uint32_t *desc = buffers->desc.list + bufidx*4; + uint32_t *desc = descs->list + bufidx*4; desc[0] = va; desc[1] = S_008F04_BASE_ADDRESS_HI(va >> 32); desc[2] = 0xffffffff; @@ -1130,28 +1439,34 @@ /* Set the resource. */ pipe_resource_reference(&buffers->buffers[bufidx], buffer); - radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, - (struct r600_resource*)buffer, - buffers->shader_usage, buffers->priority); - buffers->desc.enabled_mask |= 1u << bufidx; + radeon_add_to_buffer_list_check_mem(&sctx->b, &sctx->b.gfx, + (struct r600_resource*)buffer, + buffers->shader_usage, + RADEON_PRIO_SHADER_RW_BUFFER, + true); + r600_resource(buffer)->bind_history |= PIPE_BIND_STREAM_OUTPUT; + + buffers->enabled_mask |= 1u << bufidx; } else { /* Clear the descriptor and unset the resource. */ - memset(buffers->desc.list + bufidx*4, 0, + memset(descs->list + bufidx*4, 0, sizeof(uint32_t) * 4); pipe_resource_reference(&buffers->buffers[bufidx], NULL); - buffers->desc.enabled_mask &= ~(1u << bufidx); + buffers->enabled_mask &= ~(1u << bufidx); } - buffers->desc.dirty_mask |= 1u << bufidx; + descs->dirty_mask |= 1u << bufidx; } for (; i < old_num_targets; i++) { bufidx = SI_VS_STREAMOUT_BUF0 + i; /* Clear the descriptor and unset the resource. */ - memset(buffers->desc.list + bufidx*4, 0, sizeof(uint32_t) * 4); + memset(descs->list + bufidx*4, 0, sizeof(uint32_t) * 4); pipe_resource_reference(&buffers->buffers[bufidx], NULL); - buffers->desc.enabled_mask &= ~(1u << bufidx); - buffers->desc.dirty_mask |= 1u << bufidx; + buffers->enabled_mask &= ~(1u << bufidx); + descs->dirty_mask |= 1u << bufidx; } + + sctx->descriptors_dirty |= 1u << SI_DESCS_RW_BUFFERS; } static void si_desc_reset_buffer_offset(struct pipe_context *ctx, @@ -1166,11 +1481,8 @@ uint64_t offset_within_buffer = old_desc_va - old_buf_va; /* Update the descriptor. */ - uint64_t va = r600_resource(new_buf)->gpu_address + offset_within_buffer; - - desc[0] = va; - desc[1] = (desc[1] & C_008F04_BASE_ADDRESS_HI) | - S_008F04_BASE_ADDRESS_HI(va >> 32); + si_set_buf_desc_address(r600_resource(new_buf), offset_within_buffer, + desc); } /* INTERNAL CONST BUFFERS */ @@ -1203,6 +1515,7 @@ for (int i = 0; i < SI_NUM_SHADERS; ++i) { si_samplers_update_compressed_colortex_mask(&sctx->samplers[i]); si_images_update_compressed_colortex_mask(&sctx->images[i]); + si_update_compressed_tex_shader_mask(sctx, i); } } @@ -1211,23 +1524,26 @@ /** Reset descriptors of buffer resources after \p buf has been invalidated. */ static void si_reset_buffer_resources(struct si_context *sctx, struct si_buffer_resources *buffers, + unsigned descriptors_idx, struct pipe_resource *buf, uint64_t old_va) { - unsigned mask = buffers->desc.enabled_mask; + struct si_descriptors *descs = &sctx->descriptors[descriptors_idx]; + unsigned mask = buffers->enabled_mask; while (mask) { unsigned i = u_bit_scan(&mask); if (buffers->buffers[i] == buf) { si_desc_reset_buffer_offset(&sctx->b.b, - buffers->desc.list + i*4, + descs->list + i*4, old_va, buf); - buffers->desc.dirty_mask |= 1u << i; + descs->dirty_mask |= 1u << i; + sctx->descriptors_dirty |= 1u << descriptors_idx; - radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, - (struct r600_resource *)buf, - buffers->shader_usage, - buffers->priority); + radeon_add_to_buffer_list_check_mem(&sctx->b, &sctx->b.gfx, + (struct r600_resource *)buf, + buffers->shader_usage, + buffers->priority, true); } } } @@ -1243,15 +1559,13 @@ { struct si_context *sctx = (struct si_context*)ctx; struct r600_resource *rbuffer = r600_resource(buf); - unsigned i, shader, alignment = rbuffer->buf->alignment; + unsigned i, shader; uint64_t old_va = rbuffer->gpu_address; unsigned num_elems = sctx->vertex_elements ? sctx->vertex_elements->count : 0; - struct si_sampler_view *view; /* Reallocate the buffer in the same pipe_resource. */ - r600_init_resource(&sctx->screen->b, rbuffer, rbuffer->b.b.width0, - alignment); + r600_alloc_resource(&sctx->screen->b, rbuffer); /* We changed the buffer, now we need to bind it where the old one * was bound. This consists of 2 things: @@ -1260,101 +1574,165 @@ */ /* Vertex buffers. */ - for (i = 0; i < num_elems; i++) { - int vb = sctx->vertex_elements->elements[i].vertex_buffer_index; - - if (vb >= ARRAY_SIZE(sctx->vertex_buffer)) - continue; - if (!sctx->vertex_buffer[vb].buffer) - continue; - - if (sctx->vertex_buffer[vb].buffer == buf) { - sctx->vertex_buffers_dirty = true; - break; + if (rbuffer->bind_history & PIPE_BIND_VERTEX_BUFFER) { + for (i = 0; i < num_elems; i++) { + int vb = sctx->vertex_elements->elements[i].vertex_buffer_index; + + if (vb >= ARRAY_SIZE(sctx->vertex_buffer)) + continue; + if (!sctx->vertex_buffer[vb].buffer) + continue; + + if (sctx->vertex_buffer[vb].buffer == buf) { + sctx->vertex_buffers_dirty = true; + break; + } } } /* Streamout buffers. (other internal buffers can't be invalidated) */ - for (i = SI_VS_STREAMOUT_BUF0; i <= SI_VS_STREAMOUT_BUF3; i++) { - struct si_buffer_resources *buffers = &sctx->rw_buffers; + if (rbuffer->bind_history & PIPE_BIND_STREAM_OUTPUT) { + for (i = SI_VS_STREAMOUT_BUF0; i <= SI_VS_STREAMOUT_BUF3; i++) { + struct si_buffer_resources *buffers = &sctx->rw_buffers; + struct si_descriptors *descs = + &sctx->descriptors[SI_DESCS_RW_BUFFERS]; - if (buffers->buffers[i] != buf) - continue; - - si_desc_reset_buffer_offset(ctx, buffers->desc.list + i*4, - old_va, buf); - buffers->desc.dirty_mask |= 1u << i; + if (buffers->buffers[i] != buf) + continue; - radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, - rbuffer, buffers->shader_usage, - buffers->priority); + si_desc_reset_buffer_offset(ctx, descs->list + i*4, + old_va, buf); + descs->dirty_mask |= 1u << i; + sctx->descriptors_dirty |= 1u << SI_DESCS_RW_BUFFERS; - /* Update the streamout state. */ - if (sctx->b.streamout.begin_emitted) - r600_emit_streamout_end(&sctx->b); - sctx->b.streamout.append_bitmask = - sctx->b.streamout.enabled_mask; - r600_streamout_buffers_dirty(&sctx->b); + radeon_add_to_buffer_list_check_mem(&sctx->b, &sctx->b.gfx, + rbuffer, buffers->shader_usage, + RADEON_PRIO_SHADER_RW_BUFFER, + true); + + /* Update the streamout state. */ + if (sctx->b.streamout.begin_emitted) + r600_emit_streamout_end(&sctx->b); + sctx->b.streamout.append_bitmask = + sctx->b.streamout.enabled_mask; + r600_streamout_buffers_dirty(&sctx->b); + } } /* Constant and shader buffers. */ - for (shader = 0; shader < SI_NUM_SHADERS; shader++) { - si_reset_buffer_resources(sctx, &sctx->const_buffers[shader], - buf, old_va); - si_reset_buffer_resources(sctx, &sctx->shader_buffers[shader], - buf, old_va); + if (rbuffer->bind_history & PIPE_BIND_CONSTANT_BUFFER) { + for (shader = 0; shader < SI_NUM_SHADERS; shader++) + si_reset_buffer_resources(sctx, &sctx->const_buffers[shader], + si_const_buffer_descriptors_idx(shader), + buf, old_va); + } + + if (rbuffer->bind_history & PIPE_BIND_SHADER_BUFFER) { + for (shader = 0; shader < SI_NUM_SHADERS; shader++) + si_reset_buffer_resources(sctx, &sctx->shader_buffers[shader], + si_shader_buffer_descriptors_idx(shader), + buf, old_va); + } + + if (rbuffer->bind_history & PIPE_BIND_SAMPLER_VIEW) { + /* Texture buffers - update bindings. */ + for (shader = 0; shader < SI_NUM_SHADERS; shader++) { + struct si_sampler_views *views = &sctx->samplers[shader].views; + struct si_descriptors *descs = + si_sampler_descriptors(sctx, shader); + unsigned mask = views->enabled_mask; + + while (mask) { + unsigned i = u_bit_scan(&mask); + if (views->views[i]->texture == buf) { + si_desc_reset_buffer_offset(ctx, + descs->list + + i * 16 + 4, + old_va, buf); + descs->dirty_mask |= 1u << i; + sctx->descriptors_dirty |= + 1u << si_sampler_descriptors_idx(shader); + + radeon_add_to_buffer_list_check_mem(&sctx->b, &sctx->b.gfx, + rbuffer, RADEON_USAGE_READ, + RADEON_PRIO_SAMPLER_BUFFER, + true); + } + } + } } - /* Texture buffers - update virtual addresses in sampler view descriptors. */ - LIST_FOR_EACH_ENTRY(view, &sctx->b.texture_buffers, list) { - if (view->base.texture == buf) { - si_desc_reset_buffer_offset(ctx, &view->state[4], old_va, buf); + /* Shader images */ + if (rbuffer->bind_history & PIPE_BIND_SHADER_IMAGE) { + for (shader = 0; shader < SI_NUM_SHADERS; ++shader) { + struct si_images_info *images = &sctx->images[shader]; + struct si_descriptors *descs = + si_image_descriptors(sctx, shader); + unsigned mask = images->enabled_mask; + + while (mask) { + unsigned i = u_bit_scan(&mask); + + if (images->views[i].resource == buf) { + if (images->views[i].access & PIPE_IMAGE_ACCESS_WRITE) + si_mark_image_range_valid(&images->views[i]); + + si_desc_reset_buffer_offset( + ctx, descs->list + i * 8 + 4, + old_va, buf); + descs->dirty_mask |= 1u << i; + sctx->descriptors_dirty |= + 1u << si_image_descriptors_idx(shader); + + radeon_add_to_buffer_list_check_mem( + &sctx->b, &sctx->b.gfx, rbuffer, + RADEON_USAGE_READWRITE, + RADEON_PRIO_SAMPLER_BUFFER, true); + } + } } } - /* Texture buffers - update bindings. */ +} + +/* Update mutable image descriptor fields of all bound textures. */ +void si_update_all_texture_descriptors(struct si_context *sctx) +{ + unsigned shader; + for (shader = 0; shader < SI_NUM_SHADERS; shader++) { - struct si_sampler_views *views = &sctx->samplers[shader].views; - unsigned mask = views->desc.enabled_mask; + struct si_sampler_views *samplers = &sctx->samplers[shader].views; + struct si_images_info *images = &sctx->images[shader]; + unsigned mask; + /* Images. */ + mask = images->enabled_mask; while (mask) { unsigned i = u_bit_scan(&mask); - if (views->views[i]->texture == buf) { - si_desc_reset_buffer_offset(ctx, - views->desc.list + - i * 16 + 4, - old_va, buf); - views->desc.dirty_mask |= 1u << i; - - radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, - rbuffer, RADEON_USAGE_READ, - RADEON_PRIO_SAMPLER_BUFFER); - } - } - } + struct pipe_image_view *view = &images->views[i]; - /* Shader images */ - for (shader = 0; shader < SI_NUM_SHADERS; ++shader) { - struct si_images_info *images = &sctx->images[shader]; - unsigned mask = images->desc.enabled_mask; + if (!view->resource || + view->resource->target == PIPE_BUFFER) + continue; + + si_set_shader_image(sctx, shader, i, view, true); + } + /* Sampler views. */ + mask = samplers->enabled_mask; while (mask) { unsigned i = u_bit_scan(&mask); + struct pipe_sampler_view *view = samplers->views[i]; - if (images->views[i].resource == buf) { - if (images->views[i].access & PIPE_IMAGE_ACCESS_WRITE) - si_mark_image_range_valid(&images->views[i]); - - si_desc_reset_buffer_offset( - ctx, images->desc.list + i * 8 + 4, - old_va, buf); - images->desc.dirty_mask |= 1u << i; - - radeon_add_to_buffer_list( - &sctx->b, &sctx->b.gfx, rbuffer, - RADEON_USAGE_READWRITE, - RADEON_PRIO_SAMPLER_BUFFER); - } + if (!view || + !view->texture || + view->texture->target == PIPE_BUFFER) + continue; + + si_set_sampler_view(sctx, shader, i, + samplers->views[i], true); } + + si_update_compressed_tex_shader_mask(sctx, shader); } } @@ -1363,25 +1741,21 @@ static void si_mark_shader_pointers_dirty(struct si_context *sctx, unsigned shader) { - sctx->const_buffers[shader].desc.pointer_dirty = true; - sctx->shader_buffers[shader].desc.pointer_dirty = true; - sctx->samplers[shader].views.desc.pointer_dirty = true; - sctx->images[shader].desc.pointer_dirty = true; + sctx->shader_pointers_dirty |= + u_bit_consecutive(SI_DESCS_FIRST_SHADER + shader * SI_NUM_SHADER_DESCS, + SI_NUM_SHADER_DESCS); if (shader == PIPE_SHADER_VERTEX) - sctx->vertex_buffers.pointer_dirty = true; + sctx->vertex_buffer_pointer_dirty = sctx->vertex_buffers.buffer != NULL; si_mark_atom_dirty(sctx, &sctx->shader_userdata.atom); } static void si_shader_userdata_begin_new_cs(struct si_context *sctx) { - int i; - - for (i = 0; i < SI_NUM_SHADERS; i++) { - si_mark_shader_pointers_dirty(sctx, i); - } - sctx->rw_buffers.desc.pointer_dirty = true; + sctx->shader_pointers_dirty = u_bit_consecutive(0, SI_NUM_DESCS); + sctx->vertex_buffer_pointer_dirty = sctx->vertex_buffers.buffer != NULL; + si_mark_atom_dirty(sctx, &sctx->shader_userdata.atom); } /* Set a base register address for user data constants in the given shader. @@ -1434,13 +1808,12 @@ static void si_emit_shader_pointer(struct si_context *sctx, struct si_descriptors *desc, - unsigned sh_base, bool keep_dirty) + unsigned sh_base) { struct radeon_winsys_cs *cs = sctx->b.gfx.cs; uint64_t va; - if (!desc->pointer_dirty || !desc->buffer) - return; + assert(desc->buffer); va = desc->buffer->gpu_address + desc->buffer_offset; @@ -1449,56 +1822,66 @@ radeon_emit(cs, (sh_base + desc->shader_userdata_offset - SI_SH_REG_OFFSET) >> 2); radeon_emit(cs, va); radeon_emit(cs, va >> 32); - - desc->pointer_dirty = keep_dirty; } void si_emit_graphics_shader_userdata(struct si_context *sctx, struct r600_atom *atom) { - unsigned i; + unsigned mask; uint32_t *sh_base = sctx->shader_userdata.sh_base; + struct si_descriptors *descs; - if (sctx->rw_buffers.desc.pointer_dirty) { - si_emit_shader_pointer(sctx, &sctx->rw_buffers.desc, - R_00B030_SPI_SHADER_USER_DATA_PS_0, true); - si_emit_shader_pointer(sctx, &sctx->rw_buffers.desc, - R_00B130_SPI_SHADER_USER_DATA_VS_0, true); - si_emit_shader_pointer(sctx, &sctx->rw_buffers.desc, - R_00B230_SPI_SHADER_USER_DATA_GS_0, true); - si_emit_shader_pointer(sctx, &sctx->rw_buffers.desc, - R_00B330_SPI_SHADER_USER_DATA_ES_0, true); - si_emit_shader_pointer(sctx, &sctx->rw_buffers.desc, - R_00B430_SPI_SHADER_USER_DATA_HS_0, true); - sctx->rw_buffers.desc.pointer_dirty = false; - } + descs = &sctx->descriptors[SI_DESCS_RW_BUFFERS]; - for (i = 0; i < SI_NUM_GRAPHICS_SHADERS; i++) { - unsigned base = sh_base[i]; + if (sctx->shader_pointers_dirty & (1 << SI_DESCS_RW_BUFFERS)) { + si_emit_shader_pointer(sctx, descs, + R_00B030_SPI_SHADER_USER_DATA_PS_0); + si_emit_shader_pointer(sctx, descs, + R_00B130_SPI_SHADER_USER_DATA_VS_0); + si_emit_shader_pointer(sctx, descs, + R_00B230_SPI_SHADER_USER_DATA_GS_0); + si_emit_shader_pointer(sctx, descs, + R_00B330_SPI_SHADER_USER_DATA_ES_0); + si_emit_shader_pointer(sctx, descs, + R_00B430_SPI_SHADER_USER_DATA_HS_0); + } + + mask = sctx->shader_pointers_dirty & + u_bit_consecutive(SI_DESCS_FIRST_SHADER, + SI_DESCS_FIRST_COMPUTE - SI_DESCS_FIRST_SHADER); - if (!base) - continue; + while (mask) { + unsigned i = u_bit_scan(&mask); + unsigned shader = (i - SI_DESCS_FIRST_SHADER) / SI_NUM_SHADER_DESCS; + unsigned base = sh_base[shader]; + + if (base) + si_emit_shader_pointer(sctx, descs + i, base); + } + sctx->shader_pointers_dirty &= + ~u_bit_consecutive(SI_DESCS_RW_BUFFERS, SI_DESCS_FIRST_COMPUTE); - si_emit_shader_pointer(sctx, &sctx->const_buffers[i].desc, base, false); - si_emit_shader_pointer(sctx, &sctx->shader_buffers[i].desc, base, false); - si_emit_shader_pointer(sctx, &sctx->samplers[i].views.desc, base, false); - si_emit_shader_pointer(sctx, &sctx->images[i].desc, base, false); + if (sctx->vertex_buffer_pointer_dirty) { + si_emit_shader_pointer(sctx, &sctx->vertex_buffers, + sh_base[PIPE_SHADER_VERTEX]); + sctx->vertex_buffer_pointer_dirty = false; } - si_emit_shader_pointer(sctx, &sctx->vertex_buffers, sh_base[PIPE_SHADER_VERTEX], false); } void si_emit_compute_shader_userdata(struct si_context *sctx) { unsigned base = R_00B900_COMPUTE_USER_DATA_0; + struct si_descriptors *descs = sctx->descriptors; + unsigned compute_mask = + u_bit_consecutive(SI_DESCS_FIRST_COMPUTE, SI_NUM_SHADER_DESCS); + unsigned mask = sctx->shader_pointers_dirty & compute_mask; - si_emit_shader_pointer(sctx, &sctx->const_buffers[PIPE_SHADER_COMPUTE].desc, - base, false); - si_emit_shader_pointer(sctx, &sctx->shader_buffers[PIPE_SHADER_COMPUTE].desc, - base, false); - si_emit_shader_pointer(sctx, &sctx->samplers[PIPE_SHADER_COMPUTE].views.desc, - base, false); - si_emit_shader_pointer(sctx, &sctx->images[PIPE_SHADER_COMPUTE].desc, - base, false); + while (mask) { + unsigned i = u_bit_scan(&mask); + + si_emit_shader_pointer(sctx, descs + i, base); + } + sctx->shader_pointers_dirty &= ~compute_mask; } /* INIT/DEINIT/UPLOAD */ @@ -1510,30 +1893,35 @@ for (i = 0; i < SI_NUM_SHADERS; i++) { si_init_buffer_resources(&sctx->const_buffers[i], + si_const_buffer_descriptors(sctx, i), SI_NUM_CONST_BUFFERS, SI_SGPR_CONST_BUFFERS, RADEON_USAGE_READ, RADEON_PRIO_CONST_BUFFER, &ce_offset); si_init_buffer_resources(&sctx->shader_buffers[i], + si_shader_buffer_descriptors(sctx, i), SI_NUM_SHADER_BUFFERS, SI_SGPR_SHADER_BUFFERS, RADEON_USAGE_READWRITE, RADEON_PRIO_SHADER_RW_BUFFER, &ce_offset); - si_init_descriptors(&sctx->samplers[i].views.desc, + si_init_descriptors(si_sampler_descriptors(sctx, i), SI_SGPR_SAMPLERS, 16, SI_NUM_SAMPLERS, null_texture_descriptor, &ce_offset); - si_init_descriptors(&sctx->images[i].desc, + si_init_descriptors(si_image_descriptors(sctx, i), SI_SGPR_IMAGES, 8, SI_NUM_IMAGES, null_image_descriptor, &ce_offset); } si_init_buffer_resources(&sctx->rw_buffers, + &sctx->descriptors[SI_DESCS_RW_BUFFERS], SI_NUM_RW_BUFFERS, SI_SGPR_RW_BUFFERS, - RADEON_USAGE_READWRITE, RADEON_PRIO_RINGS_STREAMOUT, + RADEON_USAGE_READWRITE, RADEON_PRIO_SHADER_RINGS, &ce_offset); si_init_descriptors(&sctx->vertex_buffers, SI_SGPR_VERTEX_BUFFERS, 4, SI_NUM_VERTEX_BUFFERS, NULL, NULL); + sctx->descriptors_dirty = u_bit_consecutive(0, SI_NUM_DESCS); + assert(ce_offset <= 32768); /* Set pipe_context functions. */ @@ -1559,22 +1947,22 @@ bool si_upload_graphics_shader_descriptors(struct si_context *sctx) { - int i; + const unsigned mask = u_bit_consecutive(0, SI_DESCS_FIRST_COMPUTE); + unsigned dirty = sctx->descriptors_dirty & mask; - for (i = 0; i < SI_NUM_SHADERS; i++) { - if (!si_upload_descriptors(sctx, &sctx->const_buffers[i].desc, - &sctx->shader_userdata.atom) || - !si_upload_descriptors(sctx, &sctx->shader_buffers[i].desc, - &sctx->shader_userdata.atom) || - !si_upload_descriptors(sctx, &sctx->samplers[i].views.desc, - &sctx->shader_userdata.atom) || - !si_upload_descriptors(sctx, &sctx->images[i].desc, - &sctx->shader_userdata.atom)) + /* Assume nothing will go wrong: */ + sctx->shader_pointers_dirty |= dirty; + + while (dirty) { + unsigned i = u_bit_scan(&dirty); + + if (!si_upload_descriptors(sctx, &sctx->descriptors[i], + &sctx->shader_userdata.atom)) return false; } - return si_upload_descriptors(sctx, &sctx->rw_buffers.desc, - &sctx->shader_userdata.atom) && - si_upload_vertex_buffer_descriptors(sctx); + + sctx->descriptors_dirty &= ~mask; + return true; } bool si_upload_compute_shader_descriptors(struct si_context *sctx) @@ -1582,14 +1970,23 @@ /* Does not update rw_buffers as that is not needed for compute shaders * and the input buffer is using the same SGPR's anyway. */ - return si_upload_descriptors(sctx, - &sctx->const_buffers[PIPE_SHADER_COMPUTE].desc, NULL) && - si_upload_descriptors(sctx, - &sctx->shader_buffers[PIPE_SHADER_COMPUTE].desc, NULL) && - si_upload_descriptors(sctx, - &sctx->samplers[PIPE_SHADER_COMPUTE].views.desc, NULL) && - si_upload_descriptors(sctx, - &sctx->images[PIPE_SHADER_COMPUTE].desc, NULL); + const unsigned mask = u_bit_consecutive(SI_DESCS_FIRST_COMPUTE, + SI_NUM_DESCS - SI_DESCS_FIRST_COMPUTE); + unsigned dirty = sctx->descriptors_dirty & mask; + + /* Assume nothing will go wrong: */ + sctx->shader_pointers_dirty |= dirty; + + while (dirty) { + unsigned i = u_bit_scan(&dirty); + + if (!si_upload_descriptors(sctx, &sctx->descriptors[i], NULL)) + return false; + } + + sctx->descriptors_dirty &= ~mask; + + return true; } void si_release_all_descriptors(struct si_context *sctx) @@ -1597,12 +1994,18 @@ int i; for (i = 0; i < SI_NUM_SHADERS; i++) { - si_release_buffer_resources(&sctx->const_buffers[i]); - si_release_buffer_resources(&sctx->shader_buffers[i]); + si_release_buffer_resources(&sctx->const_buffers[i], + si_const_buffer_descriptors(sctx, i)); + si_release_buffer_resources(&sctx->shader_buffers[i], + si_shader_buffer_descriptors(sctx, i)); si_release_sampler_views(&sctx->samplers[i].views); si_release_image_views(&sctx->images[i]); } - si_release_buffer_resources(&sctx->rw_buffers); + si_release_buffer_resources(&sctx->rw_buffers, + &sctx->descriptors[SI_DESCS_RW_BUFFERS]); + + for (i = 0; i < SI_NUM_DESCS; ++i) + si_release_descriptors(&sctx->descriptors[i]); si_release_descriptors(&sctx->vertex_buffers); } @@ -1618,5 +2021,9 @@ } si_buffer_resources_begin_new_cs(sctx, &sctx->rw_buffers); si_vertex_buffers_begin_new_cs(sctx); + + for (i = 0; i < SI_NUM_DESCS; ++i) + si_descriptors_begin_new_cs(sctx, &sctx->descriptors[i]); + si_shader_userdata_begin_new_cs(sctx); } diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/sid.h mesa-17.0.7/src/gallium/drivers/radeonsi/sid.h --- mesa-12.0.6/src/gallium/drivers/radeonsi/sid.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/sid.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,9037 +0,0 @@ -/* - * Southern Islands Register documentation - * - * Copyright (C) 2011 Advanced Micro Devices, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included - * in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN - * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef SID_H -#define SID_H - -/* si values */ -#define SI_CONFIG_REG_OFFSET 0x00008000 -#define SI_CONFIG_REG_END 0x0000B000 -#define SI_SH_REG_OFFSET 0x0000B000 -#define SI_SH_REG_END 0x0000C000 -#define SI_CONTEXT_REG_OFFSET 0x00028000 -#define SI_CONTEXT_REG_END 0x00029000 -#define CIK_UCONFIG_REG_OFFSET 0x00030000 -#define CIK_UCONFIG_REG_END 0x00038000 - -#define EVENT_TYPE_CACHE_FLUSH 0x6 -#define EVENT_TYPE_PS_PARTIAL_FLUSH 0x10 -#define EVENT_TYPE_CACHE_FLUSH_AND_INV_TS_EVENT 0x14 -#define EVENT_TYPE_ZPASS_DONE 0x15 -#define EVENT_TYPE_CACHE_FLUSH_AND_INV_EVENT 0x16 -#define EVENT_TYPE_SO_VGTSTREAMOUT_FLUSH 0x1f -#define EVENT_TYPE_SAMPLE_STREAMOUTSTATS 0x20 -#define EVENT_TYPE(x) ((x) << 0) -#define EVENT_INDEX(x) ((x) << 8) - /* 0 - any non-TS event - * 1 - ZPASS_DONE - * 2 - SAMPLE_PIPELINESTAT - * 3 - SAMPLE_STREAMOUTSTAT* - * 4 - *S_PARTIAL_FLUSH - * 5 - TS events - */ -#define EVENT_WRITE_INV_L2 0x100000 - - -#define PREDICATION_OP_CLEAR 0x0 -#define PREDICATION_OP_ZPASS 0x1 -#define PREDICATION_OP_PRIMCOUNT 0x2 - -#define PRED_OP(x) ((x) << 16) - -#define PREDICATION_CONTINUE (1 << 31) - -#define PREDICATION_HINT_WAIT (0 << 12) -#define PREDICATION_HINT_NOWAIT_DRAW (1 << 12) - -#define PREDICATION_DRAW_NOT_VISIBLE (0 << 8) -#define PREDICATION_DRAW_VISIBLE (1 << 8) - -#define R600_TEXEL_PITCH_ALIGNMENT_MASK 0x7 - -/* All registers defined in this packet section don't exist and the only - * purpose of these definitions is to define packet encoding that - * the IB parser understands, and also to have an accurate documentation. - */ -#define PKT3_NOP 0x10 -#define PKT3_SET_BASE 0x11 -#define PKT3_CLEAR_STATE 0x12 -#define PKT3_INDEX_BUFFER_SIZE 0x13 -#define PKT3_DISPATCH_DIRECT 0x15 -#define PKT3_DISPATCH_INDIRECT 0x16 -#define PKT3_OCCLUSION_QUERY 0x1F /* new for CIK */ -#define PKT3_SET_PREDICATION 0x20 -#define PKT3_COND_EXEC 0x22 -#define PKT3_PRED_EXEC 0x23 -#define PKT3_DRAW_INDIRECT 0x24 -#define PKT3_DRAW_INDEX_INDIRECT 0x25 -#define PKT3_INDEX_BASE 0x26 -#define PKT3_DRAW_INDEX_2 0x27 -#define PKT3_CONTEXT_CONTROL 0x28 -#define CONTEXT_CONTROL_LOAD_ENABLE(x) (((unsigned)(x) & 0x1) << 31) -#define CONTEXT_CONTROL_LOAD_CE_RAM(x) (((unsigned)(x) & 0x1) << 28) -#define CONTEXT_CONTROL_SHADOW_ENABLE(x) (((unsigned)(x) & 0x1) << 31) -#define PKT3_INDEX_TYPE 0x2A -#define PKT3_DRAW_INDIRECT_MULTI 0x2C -#define PKT3_DRAW_INDEX_AUTO 0x2D -#define PKT3_DRAW_INDEX_IMMD 0x2E /* not on CIK */ -#define PKT3_NUM_INSTANCES 0x2F -#define PKT3_DRAW_INDEX_MULTI_AUTO 0x30 -#define PKT3_INDIRECT_BUFFER_SI 0x32 /* not on CIK */ -#define PKT3_STRMOUT_BUFFER_UPDATE 0x34 -#define PKT3_DRAW_INDEX_OFFSET_2 0x35 -#define PKT3_DRAW_PREAMBLE 0x36 /* new on CIK, required on GFX7.2 and later */ -#define PKT3_WRITE_DATA 0x37 -#define R_370_CONTROL 0x370 /* 0x[packet number][word index] */ -#define S_370_ENGINE_SEL(x) (((unsigned)(x) & 0x3) << 30) -#define V_370_ME 0 -#define V_370_PFP 1 -#define V_370_CE 2 -#define V_370_DE 3 -#define S_370_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 20) -#define S_370_WR_ONE_ADDR(x) (((unsigned)(x) & 0x1) << 16) -#define S_370_DST_SEL(x) (((unsigned)(x) & 0xf) << 8) -#define V_370_MEM_MAPPED_REGISTER 0 -#define V_370_MEMORY_SYNC 1 -#define V_370_TC_L2 2 -#define V_370_GDS 3 -#define V_370_RESERVED 4 -#define V_370_MEM_ASYNC 5 -#define R_371_DST_ADDR_LO 0x371 -#define R_372_DST_ADDR_HI 0x372 -#define PKT3_DRAW_INDEX_INDIRECT_MULTI 0x38 -#define PKT3_MEM_SEMAPHORE 0x39 -#define PKT3_MPEG_INDEX 0x3A /* not on CIK */ -#define PKT3_WAIT_REG_MEM 0x3C -#define WAIT_REG_MEM_EQUAL 3 -#define PKT3_MEM_WRITE 0x3D /* not on CIK */ -#define PKT3_INDIRECT_BUFFER_CIK 0x3F /* new on CIK */ -#define PKT3_COPY_DATA 0x40 -#define COPY_DATA_SRC_SEL(x) ((x) & 0xf) -#define COPY_DATA_REG 0 -#define COPY_DATA_MEM 1 -#define COPY_DATA_PERF 4 -#define COPY_DATA_IMM 5 -#define COPY_DATA_DST_SEL(x) (((unsigned)(x) & 0xf) << 8) -#define COPY_DATA_COUNT_SEL (1 << 16) -#define COPY_DATA_WR_CONFIRM (1 << 20) -#define PKT3_PFP_SYNC_ME 0x42 /* r7xx+ */ -#define PKT3_SURFACE_SYNC 0x43 /* deprecated on CIK, use ACQUIRE_MEM */ -#define PKT3_ME_INITIALIZE 0x44 /* not on CIK */ -#define PKT3_COND_WRITE 0x45 -#define PKT3_EVENT_WRITE 0x46 -#define PKT3_EVENT_WRITE_EOP 0x47 -#define PKT3_EVENT_WRITE_EOS 0x48 -#define PKT3_ONE_REG_WRITE 0x57 /* not on CIK */ -#define PKT3_ACQUIRE_MEM 0x58 /* new for CIK */ -#define PKT3_SET_CONFIG_REG 0x68 -#define PKT3_SET_CONTEXT_REG 0x69 -#define PKT3_SET_SH_REG 0x76 -#define PKT3_SET_SH_REG_OFFSET 0x77 -#define PKT3_SET_UCONFIG_REG 0x79 /* new for CIK */ -#define PKT3_LOAD_CONST_RAM 0x80 -#define PKT3_WRITE_CONST_RAM 0x81 -#define PKT3_DUMP_CONST_RAM 0x83 -#define PKT3_INCREMENT_CE_COUNTER 0x84 -#define PKT3_INCREMENT_DE_COUNTER 0x85 -#define PKT3_WAIT_ON_CE_COUNTER 0x86 - -#define PKT_TYPE_S(x) (((unsigned)(x) & 0x3) << 30) -#define PKT_TYPE_G(x) (((x) >> 30) & 0x3) -#define PKT_TYPE_C 0x3FFFFFFF -#define PKT_COUNT_S(x) (((unsigned)(x) & 0x3FFF) << 16) -#define PKT_COUNT_G(x) (((x) >> 16) & 0x3FFF) -#define PKT_COUNT_C 0xC000FFFF -#define PKT0_BASE_INDEX_S(x) (((unsigned)(x) & 0xFFFF) << 0) -#define PKT0_BASE_INDEX_G(x) (((x) >> 0) & 0xFFFF) -#define PKT0_BASE_INDEX_C 0xFFFF0000 -#define PKT3_IT_OPCODE_S(x) (((unsigned)(x) & 0xFF) << 8) -#define PKT3_IT_OPCODE_G(x) (((x) >> 8) & 0xFF) -#define PKT3_IT_OPCODE_C 0xFFFF00FF -#define PKT3_PREDICATE(x) (((x) >> 0) & 0x1) -#define PKT3_SHADER_TYPE_S(x) (((unsigned)(x) & 0x1) << 1) -#define PKT0(index, count) (PKT_TYPE_S(0) | PKT0_BASE_INDEX_S(index) | PKT_COUNT_S(count)) -#define PKT3(op, count, predicate) (PKT_TYPE_S(3) | PKT_COUNT_S(count) | PKT3_IT_OPCODE_S(op) | PKT3_PREDICATE(predicate)) - -#define PKT3_CP_DMA 0x41 -/* 1. header - * 2. SRC_ADDR_LO [31:0] or DATA [31:0] - * 3. CP_SYNC [31] | SRC_SEL [30:29] | ENGINE [27] | DST_SEL [21:20] | SRC_ADDR_HI [15:0] - * 4. DST_ADDR_LO [31:0] - * 5. DST_ADDR_HI [15:0] - * 6. COMMAND [29:22] | BYTE_COUNT [20:0] - */ -#define R_410_CP_DMA_WORD0 0x410 /* 0x[packet number][word index] */ -#define S_410_SRC_ADDR_LO(x) ((x) & 0xffffffff) -#define R_411_CP_DMA_WORD1 0x411 -#define S_411_CP_SYNC(x) (((unsigned)(x) & 0x1) << 31) -#define S_411_SRC_SEL(x) (((unsigned)(x) & 0x3) << 29) -#define V_411_SRC_ADDR 0 -#define V_411_GDS 1 /* program SAS to 1 as well */ -#define V_411_DATA 2 -#define V_411_SRC_ADDR_TC_L2 3 /* new for CIK */ -#define S_411_ENGINE(x) (((unsigned)(x) & 0x1) << 27) -#define V_411_ME 0 -#define V_411_PFP 1 -#define S_411_DSL_SEL(x) (((unsigned)(x) & 0x3) << 20) -#define V_411_DST_ADDR 0 -#define V_411_GDS 1 /* program DAS to 1 as well */ -#define V_411_DST_ADDR_TC_L2 3 /* new for CIK */ -#define S_411_SRC_ADDR_HI(x) ((x) & 0xffff) -#define R_412_CP_DMA_WORD2 0x412 /* 0x[packet number][word index] */ -#define S_412_DST_ADDR_LO(x) ((x) & 0xffffffff) -#define R_413_CP_DMA_WORD3 0x413 /* 0x[packet number][word index] */ -#define S_413_DST_ADDR_HI(x) ((x) & 0xffff) -#define R_414_COMMAND 0x414 -#define S_414_BYTE_COUNT(x) ((x) & 0x1fffff) -#define S_414_DISABLE_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 21) -#define S_414_SRC_SWAP(x) (((unsigned)(x) & 0x3) << 22) -#define V_414_NONE 0 -#define V_414_8_IN_16 1 -#define V_414_8_IN_32 2 -#define V_414_8_IN_64 3 -#define S_414_DST_SWAP(x) (((unsigned)(x) & 0x3) << 24) -#define V_414_NONE 0 -#define V_414_8_IN_16 1 -#define V_414_8_IN_32 2 -#define V_414_8_IN_64 3 -#define S_414_SAS(x) (((unsigned)(x) & 0x1) << 26) -#define V_414_MEMORY 0 -#define V_414_REGISTER 1 -#define S_414_DAS(x) (((unsigned)(x) & 0x1) << 27) -#define V_414_MEMORY 0 -#define V_414_REGISTER 1 -#define S_414_SAIC(x) (((unsigned)(x) & 0x1) << 28) -#define V_414_INCREMENT 0 -#define V_414_NO_INCREMENT 1 -#define S_414_DAIC(x) (((unsigned)(x) & 0x1) << 29) -#define V_414_INCREMENT 0 -#define V_414_NO_INCREMENT 1 -#define S_414_RAW_WAIT(x) (((unsigned)(x) & 0x1) << 30) - -#define PKT3_DMA_DATA 0x50 /* new for CIK */ -/* 1. header - * 2. CP_SYNC [31] | SRC_SEL [30:29] | DST_SEL [21:20] | ENGINE [0] - * 2. SRC_ADDR_LO [31:0] or DATA [31:0] - * 3. SRC_ADDR_HI [31:0] - * 4. DST_ADDR_LO [31:0] - * 5. DST_ADDR_HI [31:0] - * 6. COMMAND [29:22] | BYTE_COUNT [20:0] - */ -#define R_500_DMA_DATA_WORD0 0x500 /* 0x[packet number][word index] */ -#define S_500_CP_SYNC(x) (((unsigned)(x) & 0x1) << 31) -#define S_500_SRC_SEL(x) (((unsigned)(x) & 0x3) << 29) -#define V_500_SRC_ADDR 0 -#define V_500_GDS 1 /* program SAS to 1 as well */ -#define V_500_DATA 2 -#define V_500_SRC_ADDR_TC_L2 3 /* new for CIK */ -#define S_500_DSL_SEL(x) (((unsigned)(x) & 0x3) << 20) -#define V_500_DST_ADDR 0 -#define V_500_GDS 1 /* program DAS to 1 as well */ -#define V_500_DST_ADDR_TC_L2 3 /* new for CIK */ -#define S_500_ENGINE(x) ((x) & 0x1) -#define V_500_ME 0 -#define V_500_PFP 1 -#define R_501_SRC_ADDR_LO 0x501 -#define R_502_SRC_ADDR_HI 0x502 -#define R_503_DST_ADDR_LO 0x503 -#define R_504_DST_ADDR_HI 0x504 - -#define R_000E4C_SRBM_STATUS2 0x000E4C -#define S_000E4C_SDMA_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 0) -#define G_000E4C_SDMA_RQ_PENDING(x) (((x) >> 0) & 0x1) -#define C_000E4C_SDMA_RQ_PENDING 0xFFFFFFFE -#define S_000E4C_TST_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 1) -#define G_000E4C_TST_RQ_PENDING(x) (((x) >> 1) & 0x1) -#define C_000E4C_TST_RQ_PENDING 0xFFFFFFFD -#define S_000E4C_SDMA1_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 2) -#define G_000E4C_SDMA1_RQ_PENDING(x) (((x) >> 2) & 0x1) -#define C_000E4C_SDMA1_RQ_PENDING 0xFFFFFFFB -#define S_000E4C_VCE0_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 3) -#define G_000E4C_VCE0_RQ_PENDING(x) (((x) >> 3) & 0x1) -#define C_000E4C_VCE0_RQ_PENDING 0xFFFFFFF7 -#define S_000E4C_VP8_BUSY(x) (((unsigned)(x) & 0x1) << 4) -#define G_000E4C_VP8_BUSY(x) (((x) >> 4) & 0x1) -#define C_000E4C_VP8_BUSY 0xFFFFFFEF -#define S_000E4C_SDMA_BUSY(x) (((unsigned)(x) & 0x1) << 5) -#define G_000E4C_SDMA_BUSY(x) (((x) >> 5) & 0x1) -#define C_000E4C_SDMA_BUSY 0xFFFFFFDF -#define S_000E4C_SDMA1_BUSY(x) (((unsigned)(x) & 0x1) << 6) -#define G_000E4C_SDMA1_BUSY(x) (((x) >> 6) & 0x1) -#define C_000E4C_SDMA1_BUSY 0xFFFFFFBF -#define S_000E4C_VCE0_BUSY(x) (((unsigned)(x) & 0x1) << 7) -#define G_000E4C_VCE0_BUSY(x) (((x) >> 7) & 0x1) -#define C_000E4C_VCE0_BUSY 0xFFFFFF7F -#define S_000E4C_XDMA_BUSY(x) (((unsigned)(x) & 0x1) << 8) -#define G_000E4C_XDMA_BUSY(x) (((x) >> 8) & 0x1) -#define C_000E4C_XDMA_BUSY 0xFFFFFEFF -#define S_000E4C_CHUB_BUSY(x) (((unsigned)(x) & 0x1) << 9) -#define G_000E4C_CHUB_BUSY(x) (((x) >> 9) & 0x1) -#define C_000E4C_CHUB_BUSY 0xFFFFFDFF -#define S_000E4C_SDMA2_BUSY(x) (((unsigned)(x) & 0x1) << 10) -#define G_000E4C_SDMA2_BUSY(x) (((x) >> 10) & 0x1) -#define C_000E4C_SDMA2_BUSY 0xFFFFFBFF -#define S_000E4C_SDMA3_BUSY(x) (((unsigned)(x) & 0x1) << 11) -#define G_000E4C_SDMA3_BUSY(x) (((x) >> 11) & 0x1) -#define C_000E4C_SDMA3_BUSY 0xFFFFF7FF -#define S_000E4C_SAMSCP_BUSY(x) (((unsigned)(x) & 0x1) << 12) -#define G_000E4C_SAMSCP_BUSY(x) (((x) >> 12) & 0x1) -#define C_000E4C_SAMSCP_BUSY 0xFFFFEFFF -#define S_000E4C_ISP_BUSY(x) (((unsigned)(x) & 0x1) << 13) -#define G_000E4C_ISP_BUSY(x) (((x) >> 13) & 0x1) -#define C_000E4C_ISP_BUSY 0xFFFFDFFF -#define S_000E4C_VCE1_BUSY(x) (((unsigned)(x) & 0x1) << 14) -#define G_000E4C_VCE1_BUSY(x) (((x) >> 14) & 0x1) -#define C_000E4C_VCE1_BUSY 0xFFFFBFFF -#define S_000E4C_ODE_BUSY(x) (((unsigned)(x) & 0x1) << 15) -#define G_000E4C_ODE_BUSY(x) (((x) >> 15) & 0x1) -#define C_000E4C_ODE_BUSY 0xFFFF7FFF -#define S_000E4C_SDMA2_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 16) -#define G_000E4C_SDMA2_RQ_PENDING(x) (((x) >> 16) & 0x1) -#define C_000E4C_SDMA2_RQ_PENDING 0xFFFEFFFF -#define S_000E4C_SDMA3_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 17) -#define G_000E4C_SDMA3_RQ_PENDING(x) (((x) >> 17) & 0x1) -#define C_000E4C_SDMA3_RQ_PENDING 0xFFFDFFFF -#define S_000E4C_SAMSCP_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 18) -#define G_000E4C_SAMSCP_RQ_PENDING(x) (((x) >> 18) & 0x1) -#define C_000E4C_SAMSCP_RQ_PENDING 0xFFFBFFFF -#define S_000E4C_ISP_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 19) -#define G_000E4C_ISP_RQ_PENDING(x) (((x) >> 19) & 0x1) -#define C_000E4C_ISP_RQ_PENDING 0xFFF7FFFF -#define S_000E4C_VCE1_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 20) -#define G_000E4C_VCE1_RQ_PENDING(x) (((x) >> 20) & 0x1) -#define C_000E4C_VCE1_RQ_PENDING 0xFFEFFFFF -#define R_000E50_SRBM_STATUS 0x000E50 -#define S_000E50_UVD_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 1) -#define G_000E50_UVD_RQ_PENDING(x) (((x) >> 1) & 0x1) -#define C_000E50_UVD_RQ_PENDING 0xFFFFFFFD -#define S_000E50_SAMMSP_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 2) -#define G_000E50_SAMMSP_RQ_PENDING(x) (((x) >> 2) & 0x1) -#define C_000E50_SAMMSP_RQ_PENDING 0xFFFFFFFB -#define S_000E50_ACP_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 3) -#define G_000E50_ACP_RQ_PENDING(x) (((x) >> 3) & 0x1) -#define C_000E50_ACP_RQ_PENDING 0xFFFFFFF7 -#define S_000E50_SMU_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 4) -#define G_000E50_SMU_RQ_PENDING(x) (((x) >> 4) & 0x1) -#define C_000E50_SMU_RQ_PENDING 0xFFFFFFEF -#define S_000E50_GRBM_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 5) -#define G_000E50_GRBM_RQ_PENDING(x) (((x) >> 5) & 0x1) -#define C_000E50_GRBM_RQ_PENDING 0xFFFFFFDF -#define S_000E50_HI_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 6) -#define G_000E50_HI_RQ_PENDING(x) (((x) >> 6) & 0x1) -#define C_000E50_HI_RQ_PENDING 0xFFFFFFBF -#define S_000E50_VMC_BUSY(x) (((unsigned)(x) & 0x1) << 8) -#define G_000E50_VMC_BUSY(x) (((x) >> 8) & 0x1) -#define C_000E50_VMC_BUSY 0xFFFFFEFF -#define S_000E50_MCB_BUSY(x) (((unsigned)(x) & 0x1) << 9) -#define G_000E50_MCB_BUSY(x) (((x) >> 9) & 0x1) -#define C_000E50_MCB_BUSY 0xFFFFFDFF -#define S_000E50_MCB_NON_DISPLAY_BUSY(x) (((unsigned)(x) & 0x1) << 10) -#define G_000E50_MCB_NON_DISPLAY_BUSY(x) (((x) >> 10) & 0x1) -#define C_000E50_MCB_NON_DISPLAY_BUSY 0xFFFFFBFF -#define S_000E50_MCC_BUSY(x) (((unsigned)(x) & 0x1) << 11) -#define G_000E50_MCC_BUSY(x) (((x) >> 11) & 0x1) -#define C_000E50_MCC_BUSY 0xFFFFF7FF -#define S_000E50_MCD_BUSY(x) (((unsigned)(x) & 0x1) << 12) -#define G_000E50_MCD_BUSY(x) (((x) >> 12) & 0x1) -#define C_000E50_MCD_BUSY 0xFFFFEFFF -#define S_000E50_VMC1_BUSY(x) (((unsigned)(x) & 0x1) << 13) -#define G_000E50_VMC1_BUSY(x) (((x) >> 13) & 0x1) -#define C_000E50_VMC1_BUSY 0xFFFFDFFF -#define S_000E50_SEM_BUSY(x) (((unsigned)(x) & 0x1) << 14) -#define G_000E50_SEM_BUSY(x) (((x) >> 14) & 0x1) -#define C_000E50_SEM_BUSY 0xFFFFBFFF -#define S_000E50_ACP_BUSY(x) (((unsigned)(x) & 0x1) << 16) -#define G_000E50_ACP_BUSY(x) (((x) >> 16) & 0x1) -#define C_000E50_ACP_BUSY 0xFFFEFFFF -#define S_000E50_IH_BUSY(x) (((unsigned)(x) & 0x1) << 17) -#define G_000E50_IH_BUSY(x) (((x) >> 17) & 0x1) -#define C_000E50_IH_BUSY 0xFFFDFFFF -#define S_000E50_UVD_BUSY(x) (((unsigned)(x) & 0x1) << 19) -#define G_000E50_UVD_BUSY(x) (((x) >> 19) & 0x1) -#define C_000E50_UVD_BUSY 0xFFF7FFFF -#define S_000E50_SAMMSP_BUSY(x) (((unsigned)(x) & 0x1) << 20) -#define G_000E50_SAMMSP_BUSY(x) (((x) >> 20) & 0x1) -#define C_000E50_SAMMSP_BUSY 0xFFEFFFFF -#define S_000E50_GCATCL2_BUSY(x) (((unsigned)(x) & 0x1) << 21) -#define G_000E50_GCATCL2_BUSY(x) (((x) >> 21) & 0x1) -#define C_000E50_GCATCL2_BUSY 0xFFDFFFFF -#define S_000E50_OSATCL2_BUSY(x) (((unsigned)(x) & 0x1) << 22) -#define G_000E50_OSATCL2_BUSY(x) (((x) >> 22) & 0x1) -#define C_000E50_OSATCL2_BUSY 0xFFBFFFFF -#define S_000E50_BIF_BUSY(x) (((unsigned)(x) & 0x1) << 29) -#define G_000E50_BIF_BUSY(x) (((x) >> 29) & 0x1) -#define C_000E50_BIF_BUSY 0xDFFFFFFF -#define R_000E54_SRBM_STATUS3 0x000E54 -#define S_000E54_MCC0_BUSY(x) (((unsigned)(x) & 0x1) << 0) -#define G_000E54_MCC0_BUSY(x) (((x) >> 0) & 0x1) -#define C_000E54_MCC0_BUSY 0xFFFFFFFE -#define S_000E54_MCC1_BUSY(x) (((unsigned)(x) & 0x1) << 1) -#define G_000E54_MCC1_BUSY(x) (((x) >> 1) & 0x1) -#define C_000E54_MCC1_BUSY 0xFFFFFFFD -#define S_000E54_MCC2_BUSY(x) (((unsigned)(x) & 0x1) << 2) -#define G_000E54_MCC2_BUSY(x) (((x) >> 2) & 0x1) -#define C_000E54_MCC2_BUSY 0xFFFFFFFB -#define S_000E54_MCC3_BUSY(x) (((unsigned)(x) & 0x1) << 3) -#define G_000E54_MCC3_BUSY(x) (((x) >> 3) & 0x1) -#define C_000E54_MCC3_BUSY 0xFFFFFFF7 -#define S_000E54_MCC4_BUSY(x) (((unsigned)(x) & 0x1) << 4) -#define G_000E54_MCC4_BUSY(x) (((x) >> 4) & 0x1) -#define C_000E54_MCC4_BUSY 0xFFFFFFEF -#define S_000E54_MCC5_BUSY(x) (((unsigned)(x) & 0x1) << 5) -#define G_000E54_MCC5_BUSY(x) (((x) >> 5) & 0x1) -#define C_000E54_MCC5_BUSY 0xFFFFFFDF -#define S_000E54_MCC6_BUSY(x) (((unsigned)(x) & 0x1) << 6) -#define G_000E54_MCC6_BUSY(x) (((x) >> 6) & 0x1) -#define C_000E54_MCC6_BUSY 0xFFFFFFBF -#define S_000E54_MCC7_BUSY(x) (((unsigned)(x) & 0x1) << 7) -#define G_000E54_MCC7_BUSY(x) (((x) >> 7) & 0x1) -#define C_000E54_MCC7_BUSY 0xFFFFFF7F -#define S_000E54_MCD0_BUSY(x) (((unsigned)(x) & 0x1) << 8) -#define G_000E54_MCD0_BUSY(x) (((x) >> 8) & 0x1) -#define C_000E54_MCD0_BUSY 0xFFFFFEFF -#define S_000E54_MCD1_BUSY(x) (((unsigned)(x) & 0x1) << 9) -#define G_000E54_MCD1_BUSY(x) (((x) >> 9) & 0x1) -#define C_000E54_MCD1_BUSY 0xFFFFFDFF -#define S_000E54_MCD2_BUSY(x) (((unsigned)(x) & 0x1) << 10) -#define G_000E54_MCD2_BUSY(x) (((x) >> 10) & 0x1) -#define C_000E54_MCD2_BUSY 0xFFFFFBFF -#define S_000E54_MCD3_BUSY(x) (((unsigned)(x) & 0x1) << 11) -#define G_000E54_MCD3_BUSY(x) (((x) >> 11) & 0x1) -#define C_000E54_MCD3_BUSY 0xFFFFF7FF -#define S_000E54_MCD4_BUSY(x) (((unsigned)(x) & 0x1) << 12) -#define G_000E54_MCD4_BUSY(x) (((x) >> 12) & 0x1) -#define C_000E54_MCD4_BUSY 0xFFFFEFFF -#define S_000E54_MCD5_BUSY(x) (((unsigned)(x) & 0x1) << 13) -#define G_000E54_MCD5_BUSY(x) (((x) >> 13) & 0x1) -#define C_000E54_MCD5_BUSY 0xFFFFDFFF -#define S_000E54_MCD6_BUSY(x) (((unsigned)(x) & 0x1) << 14) -#define G_000E54_MCD6_BUSY(x) (((x) >> 14) & 0x1) -#define C_000E54_MCD6_BUSY 0xFFFFBFFF -#define S_000E54_MCD7_BUSY(x) (((unsigned)(x) & 0x1) << 15) -#define G_000E54_MCD7_BUSY(x) (((x) >> 15) & 0x1) -#define C_000E54_MCD7_BUSY 0xFFFF7FFF -#define R_00D034_SDMA0_STATUS_REG 0x00D034 -#define S_00D034_IDLE(x) (((unsigned)(x) & 0x1) << 0) -#define G_00D034_IDLE(x) (((x) >> 0) & 0x1) -#define C_00D034_IDLE 0xFFFFFFFE -#define S_00D034_REG_IDLE(x) (((unsigned)(x) & 0x1) << 1) -#define G_00D034_REG_IDLE(x) (((x) >> 1) & 0x1) -#define C_00D034_REG_IDLE 0xFFFFFFFD -#define S_00D034_RB_EMPTY(x) (((unsigned)(x) & 0x1) << 2) -#define G_00D034_RB_EMPTY(x) (((x) >> 2) & 0x1) -#define C_00D034_RB_EMPTY 0xFFFFFFFB -#define S_00D034_RB_FULL(x) (((unsigned)(x) & 0x1) << 3) -#define G_00D034_RB_FULL(x) (((x) >> 3) & 0x1) -#define C_00D034_RB_FULL 0xFFFFFFF7 -#define S_00D034_RB_CMD_IDLE(x) (((unsigned)(x) & 0x1) << 4) -#define G_00D034_RB_CMD_IDLE(x) (((x) >> 4) & 0x1) -#define C_00D034_RB_CMD_IDLE 0xFFFFFFEF -#define S_00D034_RB_CMD_FULL(x) (((unsigned)(x) & 0x1) << 5) -#define G_00D034_RB_CMD_FULL(x) (((x) >> 5) & 0x1) -#define C_00D034_RB_CMD_FULL 0xFFFFFFDF -#define S_00D034_IB_CMD_IDLE(x) (((unsigned)(x) & 0x1) << 6) -#define G_00D034_IB_CMD_IDLE(x) (((x) >> 6) & 0x1) -#define C_00D034_IB_CMD_IDLE 0xFFFFFFBF -#define S_00D034_IB_CMD_FULL(x) (((unsigned)(x) & 0x1) << 7) -#define G_00D034_IB_CMD_FULL(x) (((x) >> 7) & 0x1) -#define C_00D034_IB_CMD_FULL 0xFFFFFF7F -#define S_00D034_BLOCK_IDLE(x) (((unsigned)(x) & 0x1) << 8) -#define G_00D034_BLOCK_IDLE(x) (((x) >> 8) & 0x1) -#define C_00D034_BLOCK_IDLE 0xFFFFFEFF -#define S_00D034_INSIDE_IB(x) (((unsigned)(x) & 0x1) << 9) -#define G_00D034_INSIDE_IB(x) (((x) >> 9) & 0x1) -#define C_00D034_INSIDE_IB 0xFFFFFDFF -#define S_00D034_EX_IDLE(x) (((unsigned)(x) & 0x1) << 10) -#define G_00D034_EX_IDLE(x) (((x) >> 10) & 0x1) -#define C_00D034_EX_IDLE 0xFFFFFBFF -#define S_00D034_EX_IDLE_POLL_TIMER_EXPIRE(x) (((unsigned)(x) & 0x1) << 11) -#define G_00D034_EX_IDLE_POLL_TIMER_EXPIRE(x) (((x) >> 11) & 0x1) -#define C_00D034_EX_IDLE_POLL_TIMER_EXPIRE 0xFFFFF7FF -#define S_00D034_PACKET_READY(x) (((unsigned)(x) & 0x1) << 12) -#define G_00D034_PACKET_READY(x) (((x) >> 12) & 0x1) -#define C_00D034_PACKET_READY 0xFFFFEFFF -#define S_00D034_MC_WR_IDLE(x) (((unsigned)(x) & 0x1) << 13) -#define G_00D034_MC_WR_IDLE(x) (((x) >> 13) & 0x1) -#define C_00D034_MC_WR_IDLE 0xFFFFDFFF -#define S_00D034_SRBM_IDLE(x) (((unsigned)(x) & 0x1) << 14) -#define G_00D034_SRBM_IDLE(x) (((x) >> 14) & 0x1) -#define C_00D034_SRBM_IDLE 0xFFFFBFFF -#define S_00D034_CONTEXT_EMPTY(x) (((unsigned)(x) & 0x1) << 15) -#define G_00D034_CONTEXT_EMPTY(x) (((x) >> 15) & 0x1) -#define C_00D034_CONTEXT_EMPTY 0xFFFF7FFF -#define S_00D034_DELTA_RPTR_FULL(x) (((unsigned)(x) & 0x1) << 16) -#define G_00D034_DELTA_RPTR_FULL(x) (((x) >> 16) & 0x1) -#define C_00D034_DELTA_RPTR_FULL 0xFFFEFFFF -#define S_00D034_RB_MC_RREQ_IDLE(x) (((unsigned)(x) & 0x1) << 17) -#define G_00D034_RB_MC_RREQ_IDLE(x) (((x) >> 17) & 0x1) -#define C_00D034_RB_MC_RREQ_IDLE 0xFFFDFFFF -#define S_00D034_IB_MC_RREQ_IDLE(x) (((unsigned)(x) & 0x1) << 18) -#define G_00D034_IB_MC_RREQ_IDLE(x) (((x) >> 18) & 0x1) -#define C_00D034_IB_MC_RREQ_IDLE 0xFFFBFFFF -#define S_00D034_MC_RD_IDLE(x) (((unsigned)(x) & 0x1) << 19) -#define G_00D034_MC_RD_IDLE(x) (((x) >> 19) & 0x1) -#define C_00D034_MC_RD_IDLE 0xFFF7FFFF -#define S_00D034_DELTA_RPTR_EMPTY(x) (((unsigned)(x) & 0x1) << 20) -#define G_00D034_DELTA_RPTR_EMPTY(x) (((x) >> 20) & 0x1) -#define C_00D034_DELTA_RPTR_EMPTY 0xFFEFFFFF -#define S_00D034_MC_RD_RET_STALL(x) (((unsigned)(x) & 0x1) << 21) -#define G_00D034_MC_RD_RET_STALL(x) (((x) >> 21) & 0x1) -#define C_00D034_MC_RD_RET_STALL 0xFFDFFFFF -#define S_00D034_MC_RD_NO_POLL_IDLE(x) (((unsigned)(x) & 0x1) << 22) -#define G_00D034_MC_RD_NO_POLL_IDLE(x) (((x) >> 22) & 0x1) -#define C_00D034_MC_RD_NO_POLL_IDLE 0xFFBFFFFF -#define S_00D034_PREV_CMD_IDLE(x) (((unsigned)(x) & 0x1) << 25) -#define G_00D034_PREV_CMD_IDLE(x) (((x) >> 25) & 0x1) -#define C_00D034_PREV_CMD_IDLE 0xFDFFFFFF -#define S_00D034_SEM_IDLE(x) (((unsigned)(x) & 0x1) << 26) -#define G_00D034_SEM_IDLE(x) (((x) >> 26) & 0x1) -#define C_00D034_SEM_IDLE 0xFBFFFFFF -#define S_00D034_SEM_REQ_STALL(x) (((unsigned)(x) & 0x1) << 27) -#define G_00D034_SEM_REQ_STALL(x) (((x) >> 27) & 0x1) -#define C_00D034_SEM_REQ_STALL 0xF7FFFFFF -#define S_00D034_SEM_RESP_STATE(x) (((unsigned)(x) & 0x03) << 28) -#define G_00D034_SEM_RESP_STATE(x) (((x) >> 28) & 0x03) -#define C_00D034_SEM_RESP_STATE 0xCFFFFFFF -#define S_00D034_INT_IDLE(x) (((unsigned)(x) & 0x1) << 30) -#define G_00D034_INT_IDLE(x) (((x) >> 30) & 0x1) -#define C_00D034_INT_IDLE 0xBFFFFFFF -#define S_00D034_INT_REQ_STALL(x) (((unsigned)(x) & 0x1) << 31) -#define G_00D034_INT_REQ_STALL(x) (((x) >> 31) & 0x1) -#define C_00D034_INT_REQ_STALL 0x7FFFFFFF -#define R_00D834_SDMA1_STATUS_REG 0x00D834 -#define R_008008_GRBM_STATUS2 0x008008 -#define S_008008_ME0PIPE1_CMDFIFO_AVAIL(x) (((unsigned)(x) & 0x0F) << 0) -#define G_008008_ME0PIPE1_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x0F) -#define C_008008_ME0PIPE1_CMDFIFO_AVAIL 0xFFFFFFF0 -#define S_008008_ME0PIPE1_CF_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 4) -#define G_008008_ME0PIPE1_CF_RQ_PENDING(x) (((x) >> 4) & 0x1) -#define C_008008_ME0PIPE1_CF_RQ_PENDING 0xFFFFFFEF -#define S_008008_ME0PIPE1_PF_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 5) -#define G_008008_ME0PIPE1_PF_RQ_PENDING(x) (((x) >> 5) & 0x1) -#define C_008008_ME0PIPE1_PF_RQ_PENDING 0xFFFFFFDF -#define S_008008_ME1PIPE0_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 6) -#define G_008008_ME1PIPE0_RQ_PENDING(x) (((x) >> 6) & 0x1) -#define C_008008_ME1PIPE0_RQ_PENDING 0xFFFFFFBF -#define S_008008_ME1PIPE1_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 7) -#define G_008008_ME1PIPE1_RQ_PENDING(x) (((x) >> 7) & 0x1) -#define C_008008_ME1PIPE1_RQ_PENDING 0xFFFFFF7F -#define S_008008_ME1PIPE2_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 8) -#define G_008008_ME1PIPE2_RQ_PENDING(x) (((x) >> 8) & 0x1) -#define C_008008_ME1PIPE2_RQ_PENDING 0xFFFFFEFF -#define S_008008_ME1PIPE3_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 9) -#define G_008008_ME1PIPE3_RQ_PENDING(x) (((x) >> 9) & 0x1) -#define C_008008_ME1PIPE3_RQ_PENDING 0xFFFFFDFF -#define S_008008_ME2PIPE0_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 10) -#define G_008008_ME2PIPE0_RQ_PENDING(x) (((x) >> 10) & 0x1) -#define C_008008_ME2PIPE0_RQ_PENDING 0xFFFFFBFF -#define S_008008_ME2PIPE1_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 11) -#define G_008008_ME2PIPE1_RQ_PENDING(x) (((x) >> 11) & 0x1) -#define C_008008_ME2PIPE1_RQ_PENDING 0xFFFFF7FF -#define S_008008_ME2PIPE2_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 12) -#define G_008008_ME2PIPE2_RQ_PENDING(x) (((x) >> 12) & 0x1) -#define C_008008_ME2PIPE2_RQ_PENDING 0xFFFFEFFF -#define S_008008_ME2PIPE3_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 13) -#define G_008008_ME2PIPE3_RQ_PENDING(x) (((x) >> 13) & 0x1) -#define C_008008_ME2PIPE3_RQ_PENDING 0xFFFFDFFF -#define S_008008_RLC_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 14) -#define G_008008_RLC_RQ_PENDING(x) (((x) >> 14) & 0x1) -#define C_008008_RLC_RQ_PENDING 0xFFFFBFFF -#define S_008008_RLC_BUSY(x) (((unsigned)(x) & 0x1) << 24) -#define G_008008_RLC_BUSY(x) (((x) >> 24) & 0x1) -#define C_008008_RLC_BUSY 0xFEFFFFFF -#define S_008008_TC_BUSY(x) (((unsigned)(x) & 0x1) << 25) -#define G_008008_TC_BUSY(x) (((x) >> 25) & 0x1) -#define C_008008_TC_BUSY 0xFDFFFFFF -#define S_008008_TCC_CC_RESIDENT(x) (((unsigned)(x) & 0x1) << 26) -#define G_008008_TCC_CC_RESIDENT(x) (((x) >> 26) & 0x1) -#define C_008008_TCC_CC_RESIDENT 0xFBFFFFFF -#define S_008008_CPF_BUSY(x) (((unsigned)(x) & 0x1) << 28) -#define G_008008_CPF_BUSY(x) (((x) >> 28) & 0x1) -#define C_008008_CPF_BUSY 0xEFFFFFFF -#define S_008008_CPC_BUSY(x) (((unsigned)(x) & 0x1) << 29) -#define G_008008_CPC_BUSY(x) (((x) >> 29) & 0x1) -#define C_008008_CPC_BUSY 0xDFFFFFFF -#define S_008008_CPG_BUSY(x) (((unsigned)(x) & 0x1) << 30) -#define G_008008_CPG_BUSY(x) (((x) >> 30) & 0x1) -#define C_008008_CPG_BUSY 0xBFFFFFFF -#define R_008010_GRBM_STATUS 0x008010 -#define S_008010_ME0PIPE0_CMDFIFO_AVAIL(x) (((unsigned)(x) & 0x0F) << 0) -#define G_008010_ME0PIPE0_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x0F) -#define C_008010_ME0PIPE0_CMDFIFO_AVAIL 0xFFFFFFF0 -#define S_008010_SRBM_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 5) -#define G_008010_SRBM_RQ_PENDING(x) (((x) >> 5) & 0x1) -#define C_008010_SRBM_RQ_PENDING 0xFFFFFFDF -#define S_008010_ME0PIPE0_CF_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 7) -#define G_008010_ME0PIPE0_CF_RQ_PENDING(x) (((x) >> 7) & 0x1) -#define C_008010_ME0PIPE0_CF_RQ_PENDING 0xFFFFFF7F -#define S_008010_ME0PIPE0_PF_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 8) -#define G_008010_ME0PIPE0_PF_RQ_PENDING(x) (((x) >> 8) & 0x1) -#define C_008010_ME0PIPE0_PF_RQ_PENDING 0xFFFFFEFF -#define S_008010_GDS_DMA_RQ_PENDING(x) (((unsigned)(x) & 0x1) << 9) -#define G_008010_GDS_DMA_RQ_PENDING(x) (((x) >> 9) & 0x1) -#define C_008010_GDS_DMA_RQ_PENDING 0xFFFFFDFF -#define S_008010_DB_CLEAN(x) (((unsigned)(x) & 0x1) << 12) -#define G_008010_DB_CLEAN(x) (((x) >> 12) & 0x1) -#define C_008010_DB_CLEAN 0xFFFFEFFF -#define S_008010_CB_CLEAN(x) (((unsigned)(x) & 0x1) << 13) -#define G_008010_CB_CLEAN(x) (((x) >> 13) & 0x1) -#define C_008010_CB_CLEAN 0xFFFFDFFF -#define S_008010_TA_BUSY(x) (((unsigned)(x) & 0x1) << 14) -#define G_008010_TA_BUSY(x) (((x) >> 14) & 0x1) -#define C_008010_TA_BUSY 0xFFFFBFFF -#define S_008010_GDS_BUSY(x) (((unsigned)(x) & 0x1) << 15) -#define G_008010_GDS_BUSY(x) (((x) >> 15) & 0x1) -#define C_008010_GDS_BUSY 0xFFFF7FFF -#define S_008010_WD_BUSY_NO_DMA(x) (((unsigned)(x) & 0x1) << 16) -#define G_008010_WD_BUSY_NO_DMA(x) (((x) >> 16) & 0x1) -#define C_008010_WD_BUSY_NO_DMA 0xFFFEFFFF -#define S_008010_VGT_BUSY(x) (((unsigned)(x) & 0x1) << 17) -#define G_008010_VGT_BUSY(x) (((x) >> 17) & 0x1) -#define C_008010_VGT_BUSY 0xFFFDFFFF -#define S_008010_IA_BUSY_NO_DMA(x) (((unsigned)(x) & 0x1) << 18) -#define G_008010_IA_BUSY_NO_DMA(x) (((x) >> 18) & 0x1) -#define C_008010_IA_BUSY_NO_DMA 0xFFFBFFFF -#define S_008010_IA_BUSY(x) (((unsigned)(x) & 0x1) << 19) -#define G_008010_IA_BUSY(x) (((x) >> 19) & 0x1) -#define C_008010_IA_BUSY 0xFFF7FFFF -#define S_008010_SX_BUSY(x) (((unsigned)(x) & 0x1) << 20) -#define G_008010_SX_BUSY(x) (((x) >> 20) & 0x1) -#define C_008010_SX_BUSY 0xFFEFFFFF -#define S_008010_WD_BUSY(x) (((unsigned)(x) & 0x1) << 21) -#define G_008010_WD_BUSY(x) (((x) >> 21) & 0x1) -#define C_008010_WD_BUSY 0xFFDFFFFF -#define S_008010_SPI_BUSY(x) (((unsigned)(x) & 0x1) << 22) -#define G_008010_SPI_BUSY(x) (((x) >> 22) & 0x1) -#define C_008010_SPI_BUSY 0xFFBFFFFF -#define S_008010_BCI_BUSY(x) (((unsigned)(x) & 0x1) << 23) -#define G_008010_BCI_BUSY(x) (((x) >> 23) & 0x1) -#define C_008010_BCI_BUSY 0xFF7FFFFF -#define S_008010_SC_BUSY(x) (((unsigned)(x) & 0x1) << 24) -#define G_008010_SC_BUSY(x) (((x) >> 24) & 0x1) -#define C_008010_SC_BUSY 0xFEFFFFFF -#define S_008010_PA_BUSY(x) (((unsigned)(x) & 0x1) << 25) -#define G_008010_PA_BUSY(x) (((x) >> 25) & 0x1) -#define C_008010_PA_BUSY 0xFDFFFFFF -#define S_008010_DB_BUSY(x) (((unsigned)(x) & 0x1) << 26) -#define G_008010_DB_BUSY(x) (((x) >> 26) & 0x1) -#define C_008010_DB_BUSY 0xFBFFFFFF -#define S_008010_CP_COHERENCY_BUSY(x) (((unsigned)(x) & 0x1) << 28) -#define G_008010_CP_COHERENCY_BUSY(x) (((x) >> 28) & 0x1) -#define C_008010_CP_COHERENCY_BUSY 0xEFFFFFFF -#define S_008010_CP_BUSY(x) (((unsigned)(x) & 0x1) << 29) -#define G_008010_CP_BUSY(x) (((x) >> 29) & 0x1) -#define C_008010_CP_BUSY 0xDFFFFFFF -#define S_008010_CB_BUSY(x) (((unsigned)(x) & 0x1) << 30) -#define G_008010_CB_BUSY(x) (((x) >> 30) & 0x1) -#define C_008010_CB_BUSY 0xBFFFFFFF -#define S_008010_GUI_ACTIVE(x) (((unsigned)(x) & 0x1) << 31) -#define G_008010_GUI_ACTIVE(x) (((x) >> 31) & 0x1) -#define C_008010_GUI_ACTIVE 0x7FFFFFFF -#define GRBM_GFX_INDEX 0x802C -#define INSTANCE_INDEX(x) ((x) << 0) -#define SH_INDEX(x) ((x) << 8) -#define SE_INDEX(x) ((x) << 16) -#define SH_BROADCAST_WRITES (1 << 29) -#define INSTANCE_BROADCAST_WRITES (1 << 30) -#define SE_BROADCAST_WRITES (1 << 31) -#define R_0084FC_CP_STRMOUT_CNTL 0x0084FC -#define S_0084FC_OFFSET_UPDATE_DONE(x) (((unsigned)(x) & 0x1) << 0) -#define R_0085F0_CP_COHER_CNTL 0x0085F0 -#define S_0085F0_DEST_BASE_0_ENA(x) (((unsigned)(x) & 0x1) << 0) -#define G_0085F0_DEST_BASE_0_ENA(x) (((x) >> 0) & 0x1) -#define C_0085F0_DEST_BASE_0_ENA 0xFFFFFFFE -#define S_0085F0_DEST_BASE_1_ENA(x) (((unsigned)(x) & 0x1) << 1) -#define G_0085F0_DEST_BASE_1_ENA(x) (((x) >> 1) & 0x1) -#define C_0085F0_DEST_BASE_1_ENA 0xFFFFFFFD -#define S_0085F0_CB0_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 6) -#define G_0085F0_CB0_DEST_BASE_ENA(x) (((x) >> 6) & 0x1) -#define C_0085F0_CB0_DEST_BASE_ENA 0xFFFFFFBF -#define S_0085F0_CB1_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 7) -#define G_0085F0_CB1_DEST_BASE_ENA(x) (((x) >> 7) & 0x1) -#define C_0085F0_CB1_DEST_BASE_ENA 0xFFFFFF7F -#define S_0085F0_CB2_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 8) -#define G_0085F0_CB2_DEST_BASE_ENA(x) (((x) >> 8) & 0x1) -#define C_0085F0_CB2_DEST_BASE_ENA 0xFFFFFEFF -#define S_0085F0_CB3_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 9) -#define G_0085F0_CB3_DEST_BASE_ENA(x) (((x) >> 9) & 0x1) -#define C_0085F0_CB3_DEST_BASE_ENA 0xFFFFFDFF -#define S_0085F0_CB4_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 10) -#define G_0085F0_CB4_DEST_BASE_ENA(x) (((x) >> 10) & 0x1) -#define C_0085F0_CB4_DEST_BASE_ENA 0xFFFFFBFF -#define S_0085F0_CB5_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 11) -#define G_0085F0_CB5_DEST_BASE_ENA(x) (((x) >> 11) & 0x1) -#define C_0085F0_CB5_DEST_BASE_ENA 0xFFFFF7FF -#define S_0085F0_CB6_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 12) -#define G_0085F0_CB6_DEST_BASE_ENA(x) (((x) >> 12) & 0x1) -#define C_0085F0_CB6_DEST_BASE_ENA 0xFFFFEFFF -#define S_0085F0_CB7_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 13) -#define G_0085F0_CB7_DEST_BASE_ENA(x) (((x) >> 13) & 0x1) -#define C_0085F0_CB7_DEST_BASE_ENA 0xFFFFDFFF -#define S_0085F0_DB_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 14) -#define G_0085F0_DB_DEST_BASE_ENA(x) (((x) >> 14) & 0x1) -#define C_0085F0_DB_DEST_BASE_ENA 0xFFFFBFFF -#define S_0085F0_DEST_BASE_2_ENA(x) (((unsigned)(x) & 0x1) << 19) -#define G_0085F0_DEST_BASE_2_ENA(x) (((x) >> 19) & 0x1) -#define C_0085F0_DEST_BASE_2_ENA 0xFFF7FFFF -#define S_0085F0_DEST_BASE_3_ENA(x) (((unsigned)(x) & 0x1) << 21) -#define G_0085F0_DEST_BASE_3_ENA(x) (((x) >> 21) & 0x1) -#define C_0085F0_DEST_BASE_3_ENA 0xFFDFFFFF -#define S_0085F0_TCL1_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 22) -#define G_0085F0_TCL1_ACTION_ENA(x) (((x) >> 22) & 0x1) -#define C_0085F0_TCL1_ACTION_ENA 0xFFBFFFFF -#define S_0085F0_TC_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 23) -#define G_0085F0_TC_ACTION_ENA(x) (((x) >> 23) & 0x1) -#define C_0085F0_TC_ACTION_ENA 0xFF7FFFFF -#define S_0085F0_CB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 25) -#define G_0085F0_CB_ACTION_ENA(x) (((x) >> 25) & 0x1) -#define C_0085F0_CB_ACTION_ENA 0xFDFFFFFF -#define S_0085F0_DB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 26) -#define G_0085F0_DB_ACTION_ENA(x) (((x) >> 26) & 0x1) -#define C_0085F0_DB_ACTION_ENA 0xFBFFFFFF -#define S_0085F0_SH_KCACHE_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 27) -#define G_0085F0_SH_KCACHE_ACTION_ENA(x) (((x) >> 27) & 0x1) -#define C_0085F0_SH_KCACHE_ACTION_ENA 0xF7FFFFFF -#define S_0085F0_SH_ICACHE_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 29) -#define G_0085F0_SH_ICACHE_ACTION_ENA(x) (((x) >> 29) & 0x1) -#define C_0085F0_SH_ICACHE_ACTION_ENA 0xDFFFFFFF -#define R_0085F4_CP_COHER_SIZE 0x0085F4 -#define R_0085F8_CP_COHER_BASE 0x0085F8 -#define R_008014_GRBM_STATUS_SE0 0x008014 -#define S_008014_DB_CLEAN(x) (((unsigned)(x) & 0x1) << 1) -#define G_008014_DB_CLEAN(x) (((x) >> 1) & 0x1) -#define C_008014_DB_CLEAN 0xFFFFFFFD -#define S_008014_CB_CLEAN(x) (((unsigned)(x) & 0x1) << 2) -#define G_008014_CB_CLEAN(x) (((x) >> 2) & 0x1) -#define C_008014_CB_CLEAN 0xFFFFFFFB -#define S_008014_BCI_BUSY(x) (((unsigned)(x) & 0x1) << 22) -#define G_008014_BCI_BUSY(x) (((x) >> 22) & 0x1) -#define C_008014_BCI_BUSY 0xFFBFFFFF -#define S_008014_VGT_BUSY(x) (((unsigned)(x) & 0x1) << 23) -#define G_008014_VGT_BUSY(x) (((x) >> 23) & 0x1) -#define C_008014_VGT_BUSY 0xFF7FFFFF -#define S_008014_PA_BUSY(x) (((unsigned)(x) & 0x1) << 24) -#define G_008014_PA_BUSY(x) (((x) >> 24) & 0x1) -#define C_008014_PA_BUSY 0xFEFFFFFF -#define S_008014_TA_BUSY(x) (((unsigned)(x) & 0x1) << 25) -#define G_008014_TA_BUSY(x) (((x) >> 25) & 0x1) -#define C_008014_TA_BUSY 0xFDFFFFFF -#define S_008014_SX_BUSY(x) (((unsigned)(x) & 0x1) << 26) -#define G_008014_SX_BUSY(x) (((x) >> 26) & 0x1) -#define C_008014_SX_BUSY 0xFBFFFFFF -#define S_008014_SPI_BUSY(x) (((unsigned)(x) & 0x1) << 27) -#define G_008014_SPI_BUSY(x) (((x) >> 27) & 0x1) -#define C_008014_SPI_BUSY 0xF7FFFFFF -#define S_008014_SC_BUSY(x) (((unsigned)(x) & 0x1) << 29) -#define G_008014_SC_BUSY(x) (((x) >> 29) & 0x1) -#define C_008014_SC_BUSY 0xDFFFFFFF -#define S_008014_DB_BUSY(x) (((unsigned)(x) & 0x1) << 30) -#define G_008014_DB_BUSY(x) (((x) >> 30) & 0x1) -#define C_008014_DB_BUSY 0xBFFFFFFF -#define S_008014_CB_BUSY(x) (((unsigned)(x) & 0x1) << 31) -#define G_008014_CB_BUSY(x) (((x) >> 31) & 0x1) -#define C_008014_CB_BUSY 0x7FFFFFFF -#define R_008018_GRBM_STATUS_SE1 0x008018 -#define S_008018_DB_CLEAN(x) (((unsigned)(x) & 0x1) << 1) -#define G_008018_DB_CLEAN(x) (((x) >> 1) & 0x1) -#define C_008018_DB_CLEAN 0xFFFFFFFD -#define S_008018_CB_CLEAN(x) (((unsigned)(x) & 0x1) << 2) -#define G_008018_CB_CLEAN(x) (((x) >> 2) & 0x1) -#define C_008018_CB_CLEAN 0xFFFFFFFB -#define S_008018_BCI_BUSY(x) (((unsigned)(x) & 0x1) << 22) -#define G_008018_BCI_BUSY(x) (((x) >> 22) & 0x1) -#define C_008018_BCI_BUSY 0xFFBFFFFF -#define S_008018_VGT_BUSY(x) (((unsigned)(x) & 0x1) << 23) -#define G_008018_VGT_BUSY(x) (((x) >> 23) & 0x1) -#define C_008018_VGT_BUSY 0xFF7FFFFF -#define S_008018_PA_BUSY(x) (((unsigned)(x) & 0x1) << 24) -#define G_008018_PA_BUSY(x) (((x) >> 24) & 0x1) -#define C_008018_PA_BUSY 0xFEFFFFFF -#define S_008018_TA_BUSY(x) (((unsigned)(x) & 0x1) << 25) -#define G_008018_TA_BUSY(x) (((x) >> 25) & 0x1) -#define C_008018_TA_BUSY 0xFDFFFFFF -#define S_008018_SX_BUSY(x) (((unsigned)(x) & 0x1) << 26) -#define G_008018_SX_BUSY(x) (((x) >> 26) & 0x1) -#define C_008018_SX_BUSY 0xFBFFFFFF -#define S_008018_SPI_BUSY(x) (((unsigned)(x) & 0x1) << 27) -#define G_008018_SPI_BUSY(x) (((x) >> 27) & 0x1) -#define C_008018_SPI_BUSY 0xF7FFFFFF -#define S_008018_SC_BUSY(x) (((unsigned)(x) & 0x1) << 29) -#define G_008018_SC_BUSY(x) (((x) >> 29) & 0x1) -#define C_008018_SC_BUSY 0xDFFFFFFF -#define S_008018_DB_BUSY(x) (((unsigned)(x) & 0x1) << 30) -#define G_008018_DB_BUSY(x) (((x) >> 30) & 0x1) -#define C_008018_DB_BUSY 0xBFFFFFFF -#define S_008018_CB_BUSY(x) (((unsigned)(x) & 0x1) << 31) -#define G_008018_CB_BUSY(x) (((x) >> 31) & 0x1) -#define C_008018_CB_BUSY 0x7FFFFFFF -#define R_008038_GRBM_STATUS_SE2 0x008038 -#define S_008038_DB_CLEAN(x) (((unsigned)(x) & 0x1) << 1) -#define G_008038_DB_CLEAN(x) (((x) >> 1) & 0x1) -#define C_008038_DB_CLEAN 0xFFFFFFFD -#define S_008038_CB_CLEAN(x) (((unsigned)(x) & 0x1) << 2) -#define G_008038_CB_CLEAN(x) (((x) >> 2) & 0x1) -#define C_008038_CB_CLEAN 0xFFFFFFFB -#define S_008038_BCI_BUSY(x) (((unsigned)(x) & 0x1) << 22) -#define G_008038_BCI_BUSY(x) (((x) >> 22) & 0x1) -#define C_008038_BCI_BUSY 0xFFBFFFFF -#define S_008038_VGT_BUSY(x) (((unsigned)(x) & 0x1) << 23) -#define G_008038_VGT_BUSY(x) (((x) >> 23) & 0x1) -#define C_008038_VGT_BUSY 0xFF7FFFFF -#define S_008038_PA_BUSY(x) (((unsigned)(x) & 0x1) << 24) -#define G_008038_PA_BUSY(x) (((x) >> 24) & 0x1) -#define C_008038_PA_BUSY 0xFEFFFFFF -#define S_008038_TA_BUSY(x) (((unsigned)(x) & 0x1) << 25) -#define G_008038_TA_BUSY(x) (((x) >> 25) & 0x1) -#define C_008038_TA_BUSY 0xFDFFFFFF -#define S_008038_SX_BUSY(x) (((unsigned)(x) & 0x1) << 26) -#define G_008038_SX_BUSY(x) (((x) >> 26) & 0x1) -#define C_008038_SX_BUSY 0xFBFFFFFF -#define S_008038_SPI_BUSY(x) (((unsigned)(x) & 0x1) << 27) -#define G_008038_SPI_BUSY(x) (((x) >> 27) & 0x1) -#define C_008038_SPI_BUSY 0xF7FFFFFF -#define S_008038_SC_BUSY(x) (((unsigned)(x) & 0x1) << 29) -#define G_008038_SC_BUSY(x) (((x) >> 29) & 0x1) -#define C_008038_SC_BUSY 0xDFFFFFFF -#define S_008038_DB_BUSY(x) (((unsigned)(x) & 0x1) << 30) -#define G_008038_DB_BUSY(x) (((x) >> 30) & 0x1) -#define C_008038_DB_BUSY 0xBFFFFFFF -#define S_008038_CB_BUSY(x) (((unsigned)(x) & 0x1) << 31) -#define G_008038_CB_BUSY(x) (((x) >> 31) & 0x1) -#define C_008038_CB_BUSY 0x7FFFFFFF -#define R_00803C_GRBM_STATUS_SE3 0x00803C -#define S_00803C_DB_CLEAN(x) (((unsigned)(x) & 0x1) << 1) -#define G_00803C_DB_CLEAN(x) (((x) >> 1) & 0x1) -#define C_00803C_DB_CLEAN 0xFFFFFFFD -#define S_00803C_CB_CLEAN(x) (((unsigned)(x) & 0x1) << 2) -#define G_00803C_CB_CLEAN(x) (((x) >> 2) & 0x1) -#define C_00803C_CB_CLEAN 0xFFFFFFFB -#define S_00803C_BCI_BUSY(x) (((unsigned)(x) & 0x1) << 22) -#define G_00803C_BCI_BUSY(x) (((x) >> 22) & 0x1) -#define C_00803C_BCI_BUSY 0xFFBFFFFF -#define S_00803C_VGT_BUSY(x) (((unsigned)(x) & 0x1) << 23) -#define G_00803C_VGT_BUSY(x) (((x) >> 23) & 0x1) -#define C_00803C_VGT_BUSY 0xFF7FFFFF -#define S_00803C_PA_BUSY(x) (((unsigned)(x) & 0x1) << 24) -#define G_00803C_PA_BUSY(x) (((x) >> 24) & 0x1) -#define C_00803C_PA_BUSY 0xFEFFFFFF -#define S_00803C_TA_BUSY(x) (((unsigned)(x) & 0x1) << 25) -#define G_00803C_TA_BUSY(x) (((x) >> 25) & 0x1) -#define C_00803C_TA_BUSY 0xFDFFFFFF -#define S_00803C_SX_BUSY(x) (((unsigned)(x) & 0x1) << 26) -#define G_00803C_SX_BUSY(x) (((x) >> 26) & 0x1) -#define C_00803C_SX_BUSY 0xFBFFFFFF -#define S_00803C_SPI_BUSY(x) (((unsigned)(x) & 0x1) << 27) -#define G_00803C_SPI_BUSY(x) (((x) >> 27) & 0x1) -#define C_00803C_SPI_BUSY 0xF7FFFFFF -#define S_00803C_SC_BUSY(x) (((unsigned)(x) & 0x1) << 29) -#define G_00803C_SC_BUSY(x) (((x) >> 29) & 0x1) -#define C_00803C_SC_BUSY 0xDFFFFFFF -#define S_00803C_DB_BUSY(x) (((unsigned)(x) & 0x1) << 30) -#define G_00803C_DB_BUSY(x) (((x) >> 30) & 0x1) -#define C_00803C_DB_BUSY 0xBFFFFFFF -#define S_00803C_CB_BUSY(x) (((unsigned)(x) & 0x1) << 31) -#define G_00803C_CB_BUSY(x) (((x) >> 31) & 0x1) -#define C_00803C_CB_BUSY 0x7FFFFFFF -/* CIK */ -#define R_0300FC_CP_STRMOUT_CNTL 0x0300FC -#define S_0300FC_OFFSET_UPDATE_DONE(x) (((unsigned)(x) & 0x1) << 0) -#define G_0300FC_OFFSET_UPDATE_DONE(x) (((x) >> 0) & 0x1) -#define C_0300FC_OFFSET_UPDATE_DONE 0xFFFFFFFE -#define R_0301E4_CP_COHER_BASE_HI 0x0301E4 -#define S_0301E4_COHER_BASE_HI_256B(x) (((unsigned)(x) & 0xFF) << 0) -#define G_0301E4_COHER_BASE_HI_256B(x) (((x) >> 0) & 0xFF) -#define C_0301E4_COHER_BASE_HI_256B 0xFFFFFF00 -#define R_0301EC_CP_COHER_START_DELAY 0x0301EC -#define S_0301EC_START_DELAY_COUNT(x) (((unsigned)(x) & 0x3F) << 0) -#define G_0301EC_START_DELAY_COUNT(x) (((x) >> 0) & 0x3F) -#define C_0301EC_START_DELAY_COUNT 0xFFFFFFC0 -#define R_0301F0_CP_COHER_CNTL 0x0301F0 -#define S_0301F0_DEST_BASE_0_ENA(x) (((unsigned)(x) & 0x1) << 0) -#define G_0301F0_DEST_BASE_0_ENA(x) (((x) >> 0) & 0x1) -#define C_0301F0_DEST_BASE_0_ENA 0xFFFFFFFE -#define S_0301F0_DEST_BASE_1_ENA(x) (((unsigned)(x) & 0x1) << 1) -#define G_0301F0_DEST_BASE_1_ENA(x) (((x) >> 1) & 0x1) -#define C_0301F0_DEST_BASE_1_ENA 0xFFFFFFFD -/* VI */ -#define S_0301F0_TC_SD_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 2) -#define G_0301F0_TC_SD_ACTION_ENA(x) (((x) >> 2) & 0x1) -#define C_0301F0_TC_SD_ACTION_ENA 0xFFFFFFFB -#define S_0301F0_TC_NC_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 3) -#define G_0301F0_TC_NC_ACTION_ENA(x) (((x) >> 3) & 0x1) -#define C_0301F0_TC_NC_ACTION_ENA 0xFFFFFFF7 -/* */ -#define S_0301F0_CB0_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 6) -#define G_0301F0_CB0_DEST_BASE_ENA(x) (((x) >> 6) & 0x1) -#define C_0301F0_CB0_DEST_BASE_ENA 0xFFFFFFBF -#define S_0301F0_CB1_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 7) -#define G_0301F0_CB1_DEST_BASE_ENA(x) (((x) >> 7) & 0x1) -#define C_0301F0_CB1_DEST_BASE_ENA 0xFFFFFF7F -#define S_0301F0_CB2_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 8) -#define G_0301F0_CB2_DEST_BASE_ENA(x) (((x) >> 8) & 0x1) -#define C_0301F0_CB2_DEST_BASE_ENA 0xFFFFFEFF -#define S_0301F0_CB3_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 9) -#define G_0301F0_CB3_DEST_BASE_ENA(x) (((x) >> 9) & 0x1) -#define C_0301F0_CB3_DEST_BASE_ENA 0xFFFFFDFF -#define S_0301F0_CB4_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 10) -#define G_0301F0_CB4_DEST_BASE_ENA(x) (((x) >> 10) & 0x1) -#define C_0301F0_CB4_DEST_BASE_ENA 0xFFFFFBFF -#define S_0301F0_CB5_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 11) -#define G_0301F0_CB5_DEST_BASE_ENA(x) (((x) >> 11) & 0x1) -#define C_0301F0_CB5_DEST_BASE_ENA 0xFFFFF7FF -#define S_0301F0_CB6_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 12) -#define G_0301F0_CB6_DEST_BASE_ENA(x) (((x) >> 12) & 0x1) -#define C_0301F0_CB6_DEST_BASE_ENA 0xFFFFEFFF -#define S_0301F0_CB7_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 13) -#define G_0301F0_CB7_DEST_BASE_ENA(x) (((x) >> 13) & 0x1) -#define C_0301F0_CB7_DEST_BASE_ENA 0xFFFFDFFF -#define S_0301F0_DB_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 14) -#define G_0301F0_DB_DEST_BASE_ENA(x) (((x) >> 14) & 0x1) -#define C_0301F0_DB_DEST_BASE_ENA 0xFFFFBFFF -#define S_0301F0_TCL1_VOL_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 15) -#define G_0301F0_TCL1_VOL_ACTION_ENA(x) (((x) >> 15) & 0x1) -#define C_0301F0_TCL1_VOL_ACTION_ENA 0xFFFF7FFF -#define S_0301F0_TC_VOL_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 16) /* not on VI */ -#define G_0301F0_TC_VOL_ACTION_ENA(x) (((x) >> 16) & 0x1) -#define C_0301F0_TC_VOL_ACTION_ENA 0xFFFEFFFF -#define S_0301F0_TC_WB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 18) -#define G_0301F0_TC_WB_ACTION_ENA(x) (((x) >> 18) & 0x1) -#define C_0301F0_TC_WB_ACTION_ENA 0xFFFBFFFF -#define S_0301F0_DEST_BASE_2_ENA(x) (((unsigned)(x) & 0x1) << 19) -#define G_0301F0_DEST_BASE_2_ENA(x) (((x) >> 19) & 0x1) -#define C_0301F0_DEST_BASE_2_ENA 0xFFF7FFFF -#define S_0301F0_DEST_BASE_3_ENA(x) (((unsigned)(x) & 0x1) << 21) -#define G_0301F0_DEST_BASE_3_ENA(x) (((x) >> 21) & 0x1) -#define C_0301F0_DEST_BASE_3_ENA 0xFFDFFFFF -#define S_0301F0_TCL1_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 22) -#define G_0301F0_TCL1_ACTION_ENA(x) (((x) >> 22) & 0x1) -#define C_0301F0_TCL1_ACTION_ENA 0xFFBFFFFF -#define S_0301F0_TC_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 23) -#define G_0301F0_TC_ACTION_ENA(x) (((x) >> 23) & 0x1) -#define C_0301F0_TC_ACTION_ENA 0xFF7FFFFF -#define S_0301F0_CB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 25) -#define G_0301F0_CB_ACTION_ENA(x) (((x) >> 25) & 0x1) -#define C_0301F0_CB_ACTION_ENA 0xFDFFFFFF -#define S_0301F0_DB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 26) -#define G_0301F0_DB_ACTION_ENA(x) (((x) >> 26) & 0x1) -#define C_0301F0_DB_ACTION_ENA 0xFBFFFFFF -#define S_0301F0_SH_KCACHE_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 27) -#define G_0301F0_SH_KCACHE_ACTION_ENA(x) (((x) >> 27) & 0x1) -#define C_0301F0_SH_KCACHE_ACTION_ENA 0xF7FFFFFF -#define S_0301F0_SH_KCACHE_VOL_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 28) -#define G_0301F0_SH_KCACHE_VOL_ACTION_ENA(x) (((x) >> 28) & 0x1) -#define C_0301F0_SH_KCACHE_VOL_ACTION_ENA 0xEFFFFFFF -#define S_0301F0_SH_ICACHE_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 29) -#define G_0301F0_SH_ICACHE_ACTION_ENA(x) (((x) >> 29) & 0x1) -#define C_0301F0_SH_ICACHE_ACTION_ENA 0xDFFFFFFF -/* VI */ -#define S_0301F0_SH_KCACHE_WB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 30) -#define G_0301F0_SH_KCACHE_WB_ACTION_ENA(x) (((x) >> 30) & 0x1) -#define C_0301F0_SH_KCACHE_WB_ACTION_ENA 0xBFFFFFFF -#define S_0301F0_SH_SD_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 31) -#define G_0301F0_SH_SD_ACTION_ENA(x) (((x) >> 31) & 0x1) -#define C_0301F0_SH_SD_ACTION_ENA 0x7FFFFFFF -/* */ -#define R_0301F4_CP_COHER_SIZE 0x0301F4 -#define R_0301F8_CP_COHER_BASE 0x0301F8 -#define R_0301FC_CP_COHER_STATUS 0x0301FC -#define S_0301FC_MATCHING_GFX_CNTX(x) (((unsigned)(x) & 0xFF) << 0) -#define G_0301FC_MATCHING_GFX_CNTX(x) (((x) >> 0) & 0xFF) -#define C_0301FC_MATCHING_GFX_CNTX 0xFFFFFF00 -#define S_0301FC_MEID(x) (((unsigned)(x) & 0x03) << 24) -#define G_0301FC_MEID(x) (((x) >> 24) & 0x03) -#define C_0301FC_MEID 0xFCFFFFFF -#define S_0301FC_PHASE1_STATUS(x) (((unsigned)(x) & 0x1) << 30) -#define G_0301FC_PHASE1_STATUS(x) (((x) >> 30) & 0x1) -#define C_0301FC_PHASE1_STATUS 0xBFFFFFFF -#define S_0301FC_STATUS(x) (((unsigned)(x) & 0x1) << 31) -#define G_0301FC_STATUS(x) (((x) >> 31) & 0x1) -#define C_0301FC_STATUS 0x7FFFFFFF -#define R_008210_CP_CPC_STATUS 0x008210 -#define S_008210_MEC1_BUSY(x) (((unsigned)(x) & 0x1) << 0) -#define G_008210_MEC1_BUSY(x) (((x) >> 0) & 0x1) -#define C_008210_MEC1_BUSY 0xFFFFFFFE -#define S_008210_MEC2_BUSY(x) (((unsigned)(x) & 0x1) << 1) -#define G_008210_MEC2_BUSY(x) (((x) >> 1) & 0x1) -#define C_008210_MEC2_BUSY 0xFFFFFFFD -#define S_008210_DC0_BUSY(x) (((unsigned)(x) & 0x1) << 2) -#define G_008210_DC0_BUSY(x) (((x) >> 2) & 0x1) -#define C_008210_DC0_BUSY 0xFFFFFFFB -#define S_008210_DC1_BUSY(x) (((unsigned)(x) & 0x1) << 3) -#define G_008210_DC1_BUSY(x) (((x) >> 3) & 0x1) -#define C_008210_DC1_BUSY 0xFFFFFFF7 -#define S_008210_RCIU1_BUSY(x) (((unsigned)(x) & 0x1) << 4) -#define G_008210_RCIU1_BUSY(x) (((x) >> 4) & 0x1) -#define C_008210_RCIU1_BUSY 0xFFFFFFEF -#define S_008210_RCIU2_BUSY(x) (((unsigned)(x) & 0x1) << 5) -#define G_008210_RCIU2_BUSY(x) (((x) >> 5) & 0x1) -#define C_008210_RCIU2_BUSY 0xFFFFFFDF -#define S_008210_ROQ1_BUSY(x) (((unsigned)(x) & 0x1) << 6) -#define G_008210_ROQ1_BUSY(x) (((x) >> 6) & 0x1) -#define C_008210_ROQ1_BUSY 0xFFFFFFBF -#define S_008210_ROQ2_BUSY(x) (((unsigned)(x) & 0x1) << 7) -#define G_008210_ROQ2_BUSY(x) (((x) >> 7) & 0x1) -#define C_008210_ROQ2_BUSY 0xFFFFFF7F -#define S_008210_TCIU_BUSY(x) (((unsigned)(x) & 0x1) << 10) -#define G_008210_TCIU_BUSY(x) (((x) >> 10) & 0x1) -#define C_008210_TCIU_BUSY 0xFFFFFBFF -#define S_008210_SCRATCH_RAM_BUSY(x) (((unsigned)(x) & 0x1) << 11) -#define G_008210_SCRATCH_RAM_BUSY(x) (((x) >> 11) & 0x1) -#define C_008210_SCRATCH_RAM_BUSY 0xFFFFF7FF -#define S_008210_QU_BUSY(x) (((unsigned)(x) & 0x1) << 12) -#define G_008210_QU_BUSY(x) (((x) >> 12) & 0x1) -#define C_008210_QU_BUSY 0xFFFFEFFF -#define S_008210_ATCL2IU_BUSY(x) (((unsigned)(x) & 0x1) << 13) -#define G_008210_ATCL2IU_BUSY(x) (((x) >> 13) & 0x1) -#define C_008210_ATCL2IU_BUSY 0xFFFFDFFF -#define S_008210_CPG_CPC_BUSY(x) (((unsigned)(x) & 0x1) << 29) -#define G_008210_CPG_CPC_BUSY(x) (((x) >> 29) & 0x1) -#define C_008210_CPG_CPC_BUSY 0xDFFFFFFF -#define S_008210_CPF_CPC_BUSY(x) (((unsigned)(x) & 0x1) << 30) -#define G_008210_CPF_CPC_BUSY(x) (((x) >> 30) & 0x1) -#define C_008210_CPF_CPC_BUSY 0xBFFFFFFF -#define S_008210_CPC_BUSY(x) (((unsigned)(x) & 0x1) << 31) -#define G_008210_CPC_BUSY(x) (((x) >> 31) & 0x1) -#define C_008210_CPC_BUSY 0x7FFFFFFF -#define R_008214_CP_CPC_BUSY_STAT 0x008214 -#define S_008214_MEC1_LOAD_BUSY(x) (((unsigned)(x) & 0x1) << 0) -#define G_008214_MEC1_LOAD_BUSY(x) (((x) >> 0) & 0x1) -#define C_008214_MEC1_LOAD_BUSY 0xFFFFFFFE -#define S_008214_MEC1_SEMAPOHRE_BUSY(x) (((unsigned)(x) & 0x1) << 1) -#define G_008214_MEC1_SEMAPOHRE_BUSY(x) (((x) >> 1) & 0x1) -#define C_008214_MEC1_SEMAPOHRE_BUSY 0xFFFFFFFD -#define S_008214_MEC1_MUTEX_BUSY(x) (((unsigned)(x) & 0x1) << 2) -#define G_008214_MEC1_MUTEX_BUSY(x) (((x) >> 2) & 0x1) -#define C_008214_MEC1_MUTEX_BUSY 0xFFFFFFFB -#define S_008214_MEC1_MESSAGE_BUSY(x) (((unsigned)(x) & 0x1) << 3) -#define G_008214_MEC1_MESSAGE_BUSY(x) (((x) >> 3) & 0x1) -#define C_008214_MEC1_MESSAGE_BUSY 0xFFFFFFF7 -#define S_008214_MEC1_EOP_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 4) -#define G_008214_MEC1_EOP_QUEUE_BUSY(x) (((x) >> 4) & 0x1) -#define C_008214_MEC1_EOP_QUEUE_BUSY 0xFFFFFFEF -#define S_008214_MEC1_IQ_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 5) -#define G_008214_MEC1_IQ_QUEUE_BUSY(x) (((x) >> 5) & 0x1) -#define C_008214_MEC1_IQ_QUEUE_BUSY 0xFFFFFFDF -#define S_008214_MEC1_IB_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 6) -#define G_008214_MEC1_IB_QUEUE_BUSY(x) (((x) >> 6) & 0x1) -#define C_008214_MEC1_IB_QUEUE_BUSY 0xFFFFFFBF -#define S_008214_MEC1_TC_BUSY(x) (((unsigned)(x) & 0x1) << 7) -#define G_008214_MEC1_TC_BUSY(x) (((x) >> 7) & 0x1) -#define C_008214_MEC1_TC_BUSY 0xFFFFFF7F -#define S_008214_MEC1_DMA_BUSY(x) (((unsigned)(x) & 0x1) << 8) -#define G_008214_MEC1_DMA_BUSY(x) (((x) >> 8) & 0x1) -#define C_008214_MEC1_DMA_BUSY 0xFFFFFEFF -#define S_008214_MEC1_PARTIAL_FLUSH_BUSY(x) (((unsigned)(x) & 0x1) << 9) -#define G_008214_MEC1_PARTIAL_FLUSH_BUSY(x) (((x) >> 9) & 0x1) -#define C_008214_MEC1_PARTIAL_FLUSH_BUSY 0xFFFFFDFF -#define S_008214_MEC1_PIPE0_BUSY(x) (((unsigned)(x) & 0x1) << 10) -#define G_008214_MEC1_PIPE0_BUSY(x) (((x) >> 10) & 0x1) -#define C_008214_MEC1_PIPE0_BUSY 0xFFFFFBFF -#define S_008214_MEC1_PIPE1_BUSY(x) (((unsigned)(x) & 0x1) << 11) -#define G_008214_MEC1_PIPE1_BUSY(x) (((x) >> 11) & 0x1) -#define C_008214_MEC1_PIPE1_BUSY 0xFFFFF7FF -#define S_008214_MEC1_PIPE2_BUSY(x) (((unsigned)(x) & 0x1) << 12) -#define G_008214_MEC1_PIPE2_BUSY(x) (((x) >> 12) & 0x1) -#define C_008214_MEC1_PIPE2_BUSY 0xFFFFEFFF -#define S_008214_MEC1_PIPE3_BUSY(x) (((unsigned)(x) & 0x1) << 13) -#define G_008214_MEC1_PIPE3_BUSY(x) (((x) >> 13) & 0x1) -#define C_008214_MEC1_PIPE3_BUSY 0xFFFFDFFF -#define S_008214_MEC2_LOAD_BUSY(x) (((unsigned)(x) & 0x1) << 16) -#define G_008214_MEC2_LOAD_BUSY(x) (((x) >> 16) & 0x1) -#define C_008214_MEC2_LOAD_BUSY 0xFFFEFFFF -#define S_008214_MEC2_SEMAPOHRE_BUSY(x) (((unsigned)(x) & 0x1) << 17) -#define G_008214_MEC2_SEMAPOHRE_BUSY(x) (((x) >> 17) & 0x1) -#define C_008214_MEC2_SEMAPOHRE_BUSY 0xFFFDFFFF -#define S_008214_MEC2_MUTEX_BUSY(x) (((unsigned)(x) & 0x1) << 18) -#define G_008214_MEC2_MUTEX_BUSY(x) (((x) >> 18) & 0x1) -#define C_008214_MEC2_MUTEX_BUSY 0xFFFBFFFF -#define S_008214_MEC2_MESSAGE_BUSY(x) (((unsigned)(x) & 0x1) << 19) -#define G_008214_MEC2_MESSAGE_BUSY(x) (((x) >> 19) & 0x1) -#define C_008214_MEC2_MESSAGE_BUSY 0xFFF7FFFF -#define S_008214_MEC2_EOP_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 20) -#define G_008214_MEC2_EOP_QUEUE_BUSY(x) (((x) >> 20) & 0x1) -#define C_008214_MEC2_EOP_QUEUE_BUSY 0xFFEFFFFF -#define S_008214_MEC2_IQ_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 21) -#define G_008214_MEC2_IQ_QUEUE_BUSY(x) (((x) >> 21) & 0x1) -#define C_008214_MEC2_IQ_QUEUE_BUSY 0xFFDFFFFF -#define S_008214_MEC2_IB_QUEUE_BUSY(x) (((unsigned)(x) & 0x1) << 22) -#define G_008214_MEC2_IB_QUEUE_BUSY(x) (((x) >> 22) & 0x1) -#define C_008214_MEC2_IB_QUEUE_BUSY 0xFFBFFFFF -#define S_008214_MEC2_TC_BUSY(x) (((unsigned)(x) & 0x1) << 23) -#define G_008214_MEC2_TC_BUSY(x) (((x) >> 23) & 0x1) -#define C_008214_MEC2_TC_BUSY 0xFF7FFFFF -#define S_008214_MEC2_DMA_BUSY(x) (((unsigned)(x) & 0x1) << 24) -#define G_008214_MEC2_DMA_BUSY(x) (((x) >> 24) & 0x1) -#define C_008214_MEC2_DMA_BUSY 0xFEFFFFFF -#define S_008214_MEC2_PARTIAL_FLUSH_BUSY(x) (((unsigned)(x) & 0x1) << 25) -#define G_008214_MEC2_PARTIAL_FLUSH_BUSY(x) (((x) >> 25) & 0x1) -#define C_008214_MEC2_PARTIAL_FLUSH_BUSY 0xFDFFFFFF -#define S_008214_MEC2_PIPE0_BUSY(x) (((unsigned)(x) & 0x1) << 26) -#define G_008214_MEC2_PIPE0_BUSY(x) (((x) >> 26) & 0x1) -#define C_008214_MEC2_PIPE0_BUSY 0xFBFFFFFF -#define S_008214_MEC2_PIPE1_BUSY(x) (((unsigned)(x) & 0x1) << 27) -#define G_008214_MEC2_PIPE1_BUSY(x) (((x) >> 27) & 0x1) -#define C_008214_MEC2_PIPE1_BUSY 0xF7FFFFFF -#define S_008214_MEC2_PIPE2_BUSY(x) (((unsigned)(x) & 0x1) << 28) -#define G_008214_MEC2_PIPE2_BUSY(x) (((x) >> 28) & 0x1) -#define C_008214_MEC2_PIPE2_BUSY 0xEFFFFFFF -#define S_008214_MEC2_PIPE3_BUSY(x) (((unsigned)(x) & 0x1) << 29) -#define G_008214_MEC2_PIPE3_BUSY(x) (((x) >> 29) & 0x1) -#define C_008214_MEC2_PIPE3_BUSY 0xDFFFFFFF -#define R_008218_CP_CPC_STALLED_STAT1 0x008218 -#define S_008218_RCIU_TX_FREE_STALL(x) (((unsigned)(x) & 0x1) << 3) -#define G_008218_RCIU_TX_FREE_STALL(x) (((x) >> 3) & 0x1) -#define C_008218_RCIU_TX_FREE_STALL 0xFFFFFFF7 -#define S_008218_RCIU_PRIV_VIOLATION(x) (((unsigned)(x) & 0x1) << 4) -#define G_008218_RCIU_PRIV_VIOLATION(x) (((x) >> 4) & 0x1) -#define C_008218_RCIU_PRIV_VIOLATION 0xFFFFFFEF -#define S_008218_TCIU_TX_FREE_STALL(x) (((unsigned)(x) & 0x1) << 6) -#define G_008218_TCIU_TX_FREE_STALL(x) (((x) >> 6) & 0x1) -#define C_008218_TCIU_TX_FREE_STALL 0xFFFFFFBF -#define S_008218_MEC1_DECODING_PACKET(x) (((unsigned)(x) & 0x1) << 8) -#define G_008218_MEC1_DECODING_PACKET(x) (((x) >> 8) & 0x1) -#define C_008218_MEC1_DECODING_PACKET 0xFFFFFEFF -#define S_008218_MEC1_WAIT_ON_RCIU(x) (((unsigned)(x) & 0x1) << 9) -#define G_008218_MEC1_WAIT_ON_RCIU(x) (((x) >> 9) & 0x1) -#define C_008218_MEC1_WAIT_ON_RCIU 0xFFFFFDFF -#define S_008218_MEC1_WAIT_ON_RCIU_READ(x) (((unsigned)(x) & 0x1) << 10) -#define G_008218_MEC1_WAIT_ON_RCIU_READ(x) (((x) >> 10) & 0x1) -#define C_008218_MEC1_WAIT_ON_RCIU_READ 0xFFFFFBFF -#define S_008218_MEC1_WAIT_ON_ROQ_DATA(x) (((unsigned)(x) & 0x1) << 13) -#define G_008218_MEC1_WAIT_ON_ROQ_DATA(x) (((x) >> 13) & 0x1) -#define C_008218_MEC1_WAIT_ON_ROQ_DATA 0xFFFFDFFF -#define S_008218_MEC2_DECODING_PACKET(x) (((unsigned)(x) & 0x1) << 16) -#define G_008218_MEC2_DECODING_PACKET(x) (((x) >> 16) & 0x1) -#define C_008218_MEC2_DECODING_PACKET 0xFFFEFFFF -#define S_008218_MEC2_WAIT_ON_RCIU(x) (((unsigned)(x) & 0x1) << 17) -#define G_008218_MEC2_WAIT_ON_RCIU(x) (((x) >> 17) & 0x1) -#define C_008218_MEC2_WAIT_ON_RCIU 0xFFFDFFFF -#define S_008218_MEC2_WAIT_ON_RCIU_READ(x) (((unsigned)(x) & 0x1) << 18) -#define G_008218_MEC2_WAIT_ON_RCIU_READ(x) (((x) >> 18) & 0x1) -#define C_008218_MEC2_WAIT_ON_RCIU_READ 0xFFFBFFFF -#define S_008218_MEC2_WAIT_ON_ROQ_DATA(x) (((unsigned)(x) & 0x1) << 21) -#define G_008218_MEC2_WAIT_ON_ROQ_DATA(x) (((x) >> 21) & 0x1) -#define C_008218_MEC2_WAIT_ON_ROQ_DATA 0xFFDFFFFF -#define S_008218_ATCL2IU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 22) -#define G_008218_ATCL2IU_WAITING_ON_FREE(x) (((x) >> 22) & 0x1) -#define C_008218_ATCL2IU_WAITING_ON_FREE 0xFFBFFFFF -#define S_008218_ATCL2IU_WAITING_ON_TAGS(x) (((unsigned)(x) & 0x1) << 23) -#define G_008218_ATCL2IU_WAITING_ON_TAGS(x) (((x) >> 23) & 0x1) -#define C_008218_ATCL2IU_WAITING_ON_TAGS 0xFF7FFFFF -#define S_008218_ATCL1_WAITING_ON_TRANS(x) (((unsigned)(x) & 0x1) << 24) -#define G_008218_ATCL1_WAITING_ON_TRANS(x) (((x) >> 24) & 0x1) -#define C_008218_ATCL1_WAITING_ON_TRANS 0xFEFFFFFF -#define R_00821C_CP_CPF_STATUS 0x00821C -#define S_00821C_POST_WPTR_GFX_BUSY(x) (((unsigned)(x) & 0x1) << 0) -#define G_00821C_POST_WPTR_GFX_BUSY(x) (((x) >> 0) & 0x1) -#define C_00821C_POST_WPTR_GFX_BUSY 0xFFFFFFFE -#define S_00821C_CSF_BUSY(x) (((unsigned)(x) & 0x1) << 1) -#define G_00821C_CSF_BUSY(x) (((x) >> 1) & 0x1) -#define C_00821C_CSF_BUSY 0xFFFFFFFD -#define S_00821C_ROQ_ALIGN_BUSY(x) (((unsigned)(x) & 0x1) << 4) -#define G_00821C_ROQ_ALIGN_BUSY(x) (((x) >> 4) & 0x1) -#define C_00821C_ROQ_ALIGN_BUSY 0xFFFFFFEF -#define S_00821C_ROQ_RING_BUSY(x) (((unsigned)(x) & 0x1) << 5) -#define G_00821C_ROQ_RING_BUSY(x) (((x) >> 5) & 0x1) -#define C_00821C_ROQ_RING_BUSY 0xFFFFFFDF -#define S_00821C_ROQ_INDIRECT1_BUSY(x) (((unsigned)(x) & 0x1) << 6) -#define G_00821C_ROQ_INDIRECT1_BUSY(x) (((x) >> 6) & 0x1) -#define C_00821C_ROQ_INDIRECT1_BUSY 0xFFFFFFBF -#define S_00821C_ROQ_INDIRECT2_BUSY(x) (((unsigned)(x) & 0x1) << 7) -#define G_00821C_ROQ_INDIRECT2_BUSY(x) (((x) >> 7) & 0x1) -#define C_00821C_ROQ_INDIRECT2_BUSY 0xFFFFFF7F -#define S_00821C_ROQ_STATE_BUSY(x) (((unsigned)(x) & 0x1) << 8) -#define G_00821C_ROQ_STATE_BUSY(x) (((x) >> 8) & 0x1) -#define C_00821C_ROQ_STATE_BUSY 0xFFFFFEFF -#define S_00821C_ROQ_CE_RING_BUSY(x) (((unsigned)(x) & 0x1) << 9) -#define G_00821C_ROQ_CE_RING_BUSY(x) (((x) >> 9) & 0x1) -#define C_00821C_ROQ_CE_RING_BUSY 0xFFFFFDFF -#define S_00821C_ROQ_CE_INDIRECT1_BUSY(x) (((unsigned)(x) & 0x1) << 10) -#define G_00821C_ROQ_CE_INDIRECT1_BUSY(x) (((x) >> 10) & 0x1) -#define C_00821C_ROQ_CE_INDIRECT1_BUSY 0xFFFFFBFF -#define S_00821C_ROQ_CE_INDIRECT2_BUSY(x) (((unsigned)(x) & 0x1) << 11) -#define G_00821C_ROQ_CE_INDIRECT2_BUSY(x) (((x) >> 11) & 0x1) -#define C_00821C_ROQ_CE_INDIRECT2_BUSY 0xFFFFF7FF -#define S_00821C_SEMAPHORE_BUSY(x) (((unsigned)(x) & 0x1) << 12) -#define G_00821C_SEMAPHORE_BUSY(x) (((x) >> 12) & 0x1) -#define C_00821C_SEMAPHORE_BUSY 0xFFFFEFFF -#define S_00821C_INTERRUPT_BUSY(x) (((unsigned)(x) & 0x1) << 13) -#define G_00821C_INTERRUPT_BUSY(x) (((x) >> 13) & 0x1) -#define C_00821C_INTERRUPT_BUSY 0xFFFFDFFF -#define S_00821C_TCIU_BUSY(x) (((unsigned)(x) & 0x1) << 14) -#define G_00821C_TCIU_BUSY(x) (((x) >> 14) & 0x1) -#define C_00821C_TCIU_BUSY 0xFFFFBFFF -#define S_00821C_HQD_BUSY(x) (((unsigned)(x) & 0x1) << 15) -#define G_00821C_HQD_BUSY(x) (((x) >> 15) & 0x1) -#define C_00821C_HQD_BUSY 0xFFFF7FFF -#define S_00821C_PRT_BUSY(x) (((unsigned)(x) & 0x1) << 16) -#define G_00821C_PRT_BUSY(x) (((x) >> 16) & 0x1) -#define C_00821C_PRT_BUSY 0xFFFEFFFF -#define S_00821C_ATCL2IU_BUSY(x) (((unsigned)(x) & 0x1) << 17) -#define G_00821C_ATCL2IU_BUSY(x) (((x) >> 17) & 0x1) -#define C_00821C_ATCL2IU_BUSY 0xFFFDFFFF -#define S_00821C_CPF_GFX_BUSY(x) (((unsigned)(x) & 0x1) << 26) -#define G_00821C_CPF_GFX_BUSY(x) (((x) >> 26) & 0x1) -#define C_00821C_CPF_GFX_BUSY 0xFBFFFFFF -#define S_00821C_CPF_CMP_BUSY(x) (((unsigned)(x) & 0x1) << 27) -#define G_00821C_CPF_CMP_BUSY(x) (((x) >> 27) & 0x1) -#define C_00821C_CPF_CMP_BUSY 0xF7FFFFFF -#define S_00821C_GRBM_CPF_STAT_BUSY(x) (((unsigned)(x) & 0x03) << 28) -#define G_00821C_GRBM_CPF_STAT_BUSY(x) (((x) >> 28) & 0x03) -#define C_00821C_GRBM_CPF_STAT_BUSY 0xCFFFFFFF -#define S_00821C_CPC_CPF_BUSY(x) (((unsigned)(x) & 0x1) << 30) -#define G_00821C_CPC_CPF_BUSY(x) (((x) >> 30) & 0x1) -#define C_00821C_CPC_CPF_BUSY 0xBFFFFFFF -#define S_00821C_CPF_BUSY(x) (((unsigned)(x) & 0x1) << 31) -#define G_00821C_CPF_BUSY(x) (((x) >> 31) & 0x1) -#define C_00821C_CPF_BUSY 0x7FFFFFFF -#define R_008220_CP_CPF_BUSY_STAT 0x008220 -#define S_008220_REG_BUS_FIFO_BUSY(x) (((unsigned)(x) & 0x1) << 0) -#define G_008220_REG_BUS_FIFO_BUSY(x) (((x) >> 0) & 0x1) -#define C_008220_REG_BUS_FIFO_BUSY 0xFFFFFFFE -#define S_008220_CSF_RING_BUSY(x) (((unsigned)(x) & 0x1) << 1) -#define G_008220_CSF_RING_BUSY(x) (((x) >> 1) & 0x1) -#define C_008220_CSF_RING_BUSY 0xFFFFFFFD -#define S_008220_CSF_INDIRECT1_BUSY(x) (((unsigned)(x) & 0x1) << 2) -#define G_008220_CSF_INDIRECT1_BUSY(x) (((x) >> 2) & 0x1) -#define C_008220_CSF_INDIRECT1_BUSY 0xFFFFFFFB -#define S_008220_CSF_INDIRECT2_BUSY(x) (((unsigned)(x) & 0x1) << 3) -#define G_008220_CSF_INDIRECT2_BUSY(x) (((x) >> 3) & 0x1) -#define C_008220_CSF_INDIRECT2_BUSY 0xFFFFFFF7 -#define S_008220_CSF_STATE_BUSY(x) (((unsigned)(x) & 0x1) << 4) -#define G_008220_CSF_STATE_BUSY(x) (((x) >> 4) & 0x1) -#define C_008220_CSF_STATE_BUSY 0xFFFFFFEF -#define S_008220_CSF_CE_INDR1_BUSY(x) (((unsigned)(x) & 0x1) << 5) -#define G_008220_CSF_CE_INDR1_BUSY(x) (((x) >> 5) & 0x1) -#define C_008220_CSF_CE_INDR1_BUSY 0xFFFFFFDF -#define S_008220_CSF_CE_INDR2_BUSY(x) (((unsigned)(x) & 0x1) << 6) -#define G_008220_CSF_CE_INDR2_BUSY(x) (((x) >> 6) & 0x1) -#define C_008220_CSF_CE_INDR2_BUSY 0xFFFFFFBF -#define S_008220_CSF_ARBITER_BUSY(x) (((unsigned)(x) & 0x1) << 7) -#define G_008220_CSF_ARBITER_BUSY(x) (((x) >> 7) & 0x1) -#define C_008220_CSF_ARBITER_BUSY 0xFFFFFF7F -#define S_008220_CSF_INPUT_BUSY(x) (((unsigned)(x) & 0x1) << 8) -#define G_008220_CSF_INPUT_BUSY(x) (((x) >> 8) & 0x1) -#define C_008220_CSF_INPUT_BUSY 0xFFFFFEFF -#define S_008220_OUTSTANDING_READ_TAGS(x) (((unsigned)(x) & 0x1) << 9) -#define G_008220_OUTSTANDING_READ_TAGS(x) (((x) >> 9) & 0x1) -#define C_008220_OUTSTANDING_READ_TAGS 0xFFFFFDFF -#define S_008220_HPD_PROCESSING_EOP_BUSY(x) (((unsigned)(x) & 0x1) << 11) -#define G_008220_HPD_PROCESSING_EOP_BUSY(x) (((x) >> 11) & 0x1) -#define C_008220_HPD_PROCESSING_EOP_BUSY 0xFFFFF7FF -#define S_008220_HQD_DISPATCH_BUSY(x) (((unsigned)(x) & 0x1) << 12) -#define G_008220_HQD_DISPATCH_BUSY(x) (((x) >> 12) & 0x1) -#define C_008220_HQD_DISPATCH_BUSY 0xFFFFEFFF -#define S_008220_HQD_IQ_TIMER_BUSY(x) (((unsigned)(x) & 0x1) << 13) -#define G_008220_HQD_IQ_TIMER_BUSY(x) (((x) >> 13) & 0x1) -#define C_008220_HQD_IQ_TIMER_BUSY 0xFFFFDFFF -#define S_008220_HQD_DMA_OFFLOAD_BUSY(x) (((unsigned)(x) & 0x1) << 14) -#define G_008220_HQD_DMA_OFFLOAD_BUSY(x) (((x) >> 14) & 0x1) -#define C_008220_HQD_DMA_OFFLOAD_BUSY 0xFFFFBFFF -#define S_008220_HQD_WAIT_SEMAPHORE_BUSY(x) (((unsigned)(x) & 0x1) << 15) -#define G_008220_HQD_WAIT_SEMAPHORE_BUSY(x) (((x) >> 15) & 0x1) -#define C_008220_HQD_WAIT_SEMAPHORE_BUSY 0xFFFF7FFF -#define S_008220_HQD_SIGNAL_SEMAPHORE_BUSY(x) (((unsigned)(x) & 0x1) << 16) -#define G_008220_HQD_SIGNAL_SEMAPHORE_BUSY(x) (((x) >> 16) & 0x1) -#define C_008220_HQD_SIGNAL_SEMAPHORE_BUSY 0xFFFEFFFF -#define S_008220_HQD_MESSAGE_BUSY(x) (((unsigned)(x) & 0x1) << 17) -#define G_008220_HQD_MESSAGE_BUSY(x) (((x) >> 17) & 0x1) -#define C_008220_HQD_MESSAGE_BUSY 0xFFFDFFFF -#define S_008220_HQD_PQ_FETCHER_BUSY(x) (((unsigned)(x) & 0x1) << 18) -#define G_008220_HQD_PQ_FETCHER_BUSY(x) (((x) >> 18) & 0x1) -#define C_008220_HQD_PQ_FETCHER_BUSY 0xFFFBFFFF -#define S_008220_HQD_IB_FETCHER_BUSY(x) (((unsigned)(x) & 0x1) << 19) -#define G_008220_HQD_IB_FETCHER_BUSY(x) (((x) >> 19) & 0x1) -#define C_008220_HQD_IB_FETCHER_BUSY 0xFFF7FFFF -#define S_008220_HQD_IQ_FETCHER_BUSY(x) (((unsigned)(x) & 0x1) << 20) -#define G_008220_HQD_IQ_FETCHER_BUSY(x) (((x) >> 20) & 0x1) -#define C_008220_HQD_IQ_FETCHER_BUSY 0xFFEFFFFF -#define S_008220_HQD_EOP_FETCHER_BUSY(x) (((unsigned)(x) & 0x1) << 21) -#define G_008220_HQD_EOP_FETCHER_BUSY(x) (((x) >> 21) & 0x1) -#define C_008220_HQD_EOP_FETCHER_BUSY 0xFFDFFFFF -#define S_008220_HQD_CONSUMED_RPTR_BUSY(x) (((unsigned)(x) & 0x1) << 22) -#define G_008220_HQD_CONSUMED_RPTR_BUSY(x) (((x) >> 22) & 0x1) -#define C_008220_HQD_CONSUMED_RPTR_BUSY 0xFFBFFFFF -#define S_008220_HQD_FETCHER_ARB_BUSY(x) (((unsigned)(x) & 0x1) << 23) -#define G_008220_HQD_FETCHER_ARB_BUSY(x) (((x) >> 23) & 0x1) -#define C_008220_HQD_FETCHER_ARB_BUSY 0xFF7FFFFF -#define S_008220_HQD_ROQ_ALIGN_BUSY(x) (((unsigned)(x) & 0x1) << 24) -#define G_008220_HQD_ROQ_ALIGN_BUSY(x) (((x) >> 24) & 0x1) -#define C_008220_HQD_ROQ_ALIGN_BUSY 0xFEFFFFFF -#define S_008220_HQD_ROQ_EOP_BUSY(x) (((unsigned)(x) & 0x1) << 25) -#define G_008220_HQD_ROQ_EOP_BUSY(x) (((x) >> 25) & 0x1) -#define C_008220_HQD_ROQ_EOP_BUSY 0xFDFFFFFF -#define S_008220_HQD_ROQ_IQ_BUSY(x) (((unsigned)(x) & 0x1) << 26) -#define G_008220_HQD_ROQ_IQ_BUSY(x) (((x) >> 26) & 0x1) -#define C_008220_HQD_ROQ_IQ_BUSY 0xFBFFFFFF -#define S_008220_HQD_ROQ_PQ_BUSY(x) (((unsigned)(x) & 0x1) << 27) -#define G_008220_HQD_ROQ_PQ_BUSY(x) (((x) >> 27) & 0x1) -#define C_008220_HQD_ROQ_PQ_BUSY 0xF7FFFFFF -#define S_008220_HQD_ROQ_IB_BUSY(x) (((unsigned)(x) & 0x1) << 28) -#define G_008220_HQD_ROQ_IB_BUSY(x) (((x) >> 28) & 0x1) -#define C_008220_HQD_ROQ_IB_BUSY 0xEFFFFFFF -#define S_008220_HQD_WPTR_POLL_BUSY(x) (((unsigned)(x) & 0x1) << 29) -#define G_008220_HQD_WPTR_POLL_BUSY(x) (((x) >> 29) & 0x1) -#define C_008220_HQD_WPTR_POLL_BUSY 0xDFFFFFFF -#define S_008220_HQD_PQ_BUSY(x) (((unsigned)(x) & 0x1) << 30) -#define G_008220_HQD_PQ_BUSY(x) (((x) >> 30) & 0x1) -#define C_008220_HQD_PQ_BUSY 0xBFFFFFFF -#define S_008220_HQD_IB_BUSY(x) (((unsigned)(x) & 0x1) << 31) -#define G_008220_HQD_IB_BUSY(x) (((x) >> 31) & 0x1) -#define C_008220_HQD_IB_BUSY 0x7FFFFFFF -#define R_008224_CP_CPF_STALLED_STAT1 0x008224 -#define S_008224_RING_FETCHING_DATA(x) (((unsigned)(x) & 0x1) << 0) -#define G_008224_RING_FETCHING_DATA(x) (((x) >> 0) & 0x1) -#define C_008224_RING_FETCHING_DATA 0xFFFFFFFE -#define S_008224_INDR1_FETCHING_DATA(x) (((unsigned)(x) & 0x1) << 1) -#define G_008224_INDR1_FETCHING_DATA(x) (((x) >> 1) & 0x1) -#define C_008224_INDR1_FETCHING_DATA 0xFFFFFFFD -#define S_008224_INDR2_FETCHING_DATA(x) (((unsigned)(x) & 0x1) << 2) -#define G_008224_INDR2_FETCHING_DATA(x) (((x) >> 2) & 0x1) -#define C_008224_INDR2_FETCHING_DATA 0xFFFFFFFB -#define S_008224_STATE_FETCHING_DATA(x) (((unsigned)(x) & 0x1) << 3) -#define G_008224_STATE_FETCHING_DATA(x) (((x) >> 3) & 0x1) -#define C_008224_STATE_FETCHING_DATA 0xFFFFFFF7 -#define S_008224_TCIU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 5) -#define G_008224_TCIU_WAITING_ON_FREE(x) (((x) >> 5) & 0x1) -#define C_008224_TCIU_WAITING_ON_FREE 0xFFFFFFDF -#define S_008224_TCIU_WAITING_ON_TAGS(x) (((unsigned)(x) & 0x1) << 6) -#define G_008224_TCIU_WAITING_ON_TAGS(x) (((x) >> 6) & 0x1) -#define C_008224_TCIU_WAITING_ON_TAGS 0xFFFFFFBF -#define S_008224_ATCL2IU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 7) -#define G_008224_ATCL2IU_WAITING_ON_FREE(x) (((x) >> 7) & 0x1) -#define C_008224_ATCL2IU_WAITING_ON_FREE 0xFFFFFF7F -#define S_008224_ATCL2IU_WAITING_ON_TAGS(x) (((unsigned)(x) & 0x1) << 8) -#define G_008224_ATCL2IU_WAITING_ON_TAGS(x) (((x) >> 8) & 0x1) -#define C_008224_ATCL2IU_WAITING_ON_TAGS 0xFFFFFEFF -#define S_008224_ATCL1_WAITING_ON_TRANS(x) (((unsigned)(x) & 0x1) << 9) -#define G_008224_ATCL1_WAITING_ON_TRANS(x) (((x) >> 9) & 0x1) -#define C_008224_ATCL1_WAITING_ON_TRANS 0xFFFFFDFF -#define R_030230_CP_COHER_SIZE_HI 0x030230 -#define S_030230_COHER_SIZE_HI_256B(x) (((unsigned)(x) & 0xFF) << 0) -#define G_030230_COHER_SIZE_HI_256B(x) (((x) >> 0) & 0xFF) -#define C_030230_COHER_SIZE_HI_256B 0xFFFFFF00 -/* */ -#define R_0088B0_VGT_VTX_VECT_EJECT_REG 0x0088B0 -#define S_0088B0_PRIM_COUNT(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_0088B0_PRIM_COUNT(x) (((x) >> 0) & 0x3FF) -#define C_0088B0_PRIM_COUNT 0xFFFFFC00 -#define R_0088C4_VGT_CACHE_INVALIDATION 0x0088C4 -#define S_0088C4_VS_NO_EXTRA_BUFFER(x) (((unsigned)(x) & 0x1) << 5) -#define G_0088C4_VS_NO_EXTRA_BUFFER(x) (((x) >> 5) & 0x1) -#define C_0088C4_VS_NO_EXTRA_BUFFER 0xFFFFFFDF -#define S_0088C4_STREAMOUT_FULL_FLUSH(x) (((unsigned)(x) & 0x1) << 13) -#define G_0088C4_STREAMOUT_FULL_FLUSH(x) (((x) >> 13) & 0x1) -#define C_0088C4_STREAMOUT_FULL_FLUSH 0xFFFFDFFF -#define S_0088C4_ES_LIMIT(x) (((unsigned)(x) & 0x1F) << 16) -#define G_0088C4_ES_LIMIT(x) (((x) >> 16) & 0x1F) -#define C_0088C4_ES_LIMIT 0xFFE0FFFF -#define R_0088C8_VGT_ESGS_RING_SIZE 0x0088C8 -#define R_0088CC_VGT_GSVS_RING_SIZE 0x0088CC -#define R_0088D4_VGT_GS_VERTEX_REUSE 0x0088D4 -#define S_0088D4_VERT_REUSE(x) (((unsigned)(x) & 0x1F) << 0) -#define G_0088D4_VERT_REUSE(x) (((x) >> 0) & 0x1F) -#define C_0088D4_VERT_REUSE 0xFFFFFFE0 -#define R_008958_VGT_PRIMITIVE_TYPE 0x008958 -#define S_008958_PRIM_TYPE(x) (((unsigned)(x) & 0x3F) << 0) -#define G_008958_PRIM_TYPE(x) (((x) >> 0) & 0x3F) -#define C_008958_PRIM_TYPE 0xFFFFFFC0 -#define V_008958_DI_PT_NONE 0x00 -#define V_008958_DI_PT_POINTLIST 0x01 -#define V_008958_DI_PT_LINELIST 0x02 -#define V_008958_DI_PT_LINESTRIP 0x03 -#define V_008958_DI_PT_TRILIST 0x04 -#define V_008958_DI_PT_TRIFAN 0x05 -#define V_008958_DI_PT_TRISTRIP 0x06 -#define V_008958_DI_PT_UNUSED_0 0x07 -#define V_008958_DI_PT_UNUSED_1 0x08 -#define V_008958_DI_PT_PATCH 0x09 -#define V_008958_DI_PT_LINELIST_ADJ 0x0A -#define V_008958_DI_PT_LINESTRIP_ADJ 0x0B -#define V_008958_DI_PT_TRILIST_ADJ 0x0C -#define V_008958_DI_PT_TRISTRIP_ADJ 0x0D -#define V_008958_DI_PT_UNUSED_3 0x0E -#define V_008958_DI_PT_UNUSED_4 0x0F -#define V_008958_DI_PT_TRI_WITH_WFLAGS 0x10 -#define V_008958_DI_PT_RECTLIST 0x11 -#define V_008958_DI_PT_LINELOOP 0x12 -#define V_008958_DI_PT_QUADLIST 0x13 -#define V_008958_DI_PT_QUADSTRIP 0x14 -#define V_008958_DI_PT_POLYGON 0x15 -#define V_008958_DI_PT_2D_COPY_RECT_LIST_V0 0x16 -#define V_008958_DI_PT_2D_COPY_RECT_LIST_V1 0x17 -#define V_008958_DI_PT_2D_COPY_RECT_LIST_V2 0x18 -#define V_008958_DI_PT_2D_COPY_RECT_LIST_V3 0x19 -#define V_008958_DI_PT_2D_FILL_RECT_LIST 0x1A -#define V_008958_DI_PT_2D_LINE_STRIP 0x1B -#define V_008958_DI_PT_2D_TRI_STRIP 0x1C -#define R_00895C_VGT_INDEX_TYPE 0x00895C -#define S_00895C_INDEX_TYPE(x) (((unsigned)(x) & 0x03) << 0) -#define G_00895C_INDEX_TYPE(x) (((x) >> 0) & 0x03) -#define C_00895C_INDEX_TYPE 0xFFFFFFFC -#define V_00895C_DI_INDEX_SIZE_16_BIT 0x00 -#define V_00895C_DI_INDEX_SIZE_32_BIT 0x01 -#define R_008960_VGT_STRMOUT_BUFFER_FILLED_SIZE_0 0x008960 -#define R_008964_VGT_STRMOUT_BUFFER_FILLED_SIZE_1 0x008964 -#define R_008968_VGT_STRMOUT_BUFFER_FILLED_SIZE_2 0x008968 -#define R_00896C_VGT_STRMOUT_BUFFER_FILLED_SIZE_3 0x00896C -#define R_008970_VGT_NUM_INDICES 0x008970 -#define R_008974_VGT_NUM_INSTANCES 0x008974 -#define R_008988_VGT_TF_RING_SIZE 0x008988 -#define S_008988_SIZE(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_008988_SIZE(x) (((x) >> 0) & 0xFFFF) -#define C_008988_SIZE 0xFFFF0000 -#define R_0089B0_VGT_HS_OFFCHIP_PARAM 0x0089B0 -#define S_0089B0_OFFCHIP_BUFFERING(x) (((unsigned)(x) & 0x7F) << 0) -#define G_0089B0_OFFCHIP_BUFFERING(x) (((x) >> 0) & 0x7F) -#define C_0089B0_OFFCHIP_BUFFERING 0xFFFFFF80 -#define R_0089B8_VGT_TF_MEMORY_BASE 0x0089B8 -#define R_008A14_PA_CL_ENHANCE 0x008A14 -#define S_008A14_CLIP_VTX_REORDER_ENA(x) (((unsigned)(x) & 0x1) << 0) -#define G_008A14_CLIP_VTX_REORDER_ENA(x) (((x) >> 0) & 0x1) -#define C_008A14_CLIP_VTX_REORDER_ENA 0xFFFFFFFE -#define S_008A14_NUM_CLIP_SEQ(x) (((unsigned)(x) & 0x03) << 1) -#define G_008A14_NUM_CLIP_SEQ(x) (((x) >> 1) & 0x03) -#define C_008A14_NUM_CLIP_SEQ 0xFFFFFFF9 -#define S_008A14_CLIPPED_PRIM_SEQ_STALL(x) (((unsigned)(x) & 0x1) << 3) -#define G_008A14_CLIPPED_PRIM_SEQ_STALL(x) (((x) >> 3) & 0x1) -#define C_008A14_CLIPPED_PRIM_SEQ_STALL 0xFFFFFFF7 -#define S_008A14_VE_NAN_PROC_DISABLE(x) (((unsigned)(x) & 0x1) << 4) -#define G_008A14_VE_NAN_PROC_DISABLE(x) (((x) >> 4) & 0x1) -#define C_008A14_VE_NAN_PROC_DISABLE 0xFFFFFFEF -#define R_008A60_PA_SU_LINE_STIPPLE_VALUE 0x008A60 -#define S_008A60_LINE_STIPPLE_VALUE(x) (((unsigned)(x) & 0xFFFFFF) << 0) -#define G_008A60_LINE_STIPPLE_VALUE(x) (((x) >> 0) & 0xFFFFFF) -#define C_008A60_LINE_STIPPLE_VALUE 0xFF000000 -#define R_008B10_PA_SC_LINE_STIPPLE_STATE 0x008B10 -#define S_008B10_CURRENT_PTR(x) (((unsigned)(x) & 0x0F) << 0) -#define G_008B10_CURRENT_PTR(x) (((x) >> 0) & 0x0F) -#define C_008B10_CURRENT_PTR 0xFFFFFFF0 -#define S_008B10_CURRENT_COUNT(x) (((unsigned)(x) & 0xFF) << 8) -#define G_008B10_CURRENT_COUNT(x) (((x) >> 8) & 0xFF) -#define C_008B10_CURRENT_COUNT 0xFFFF00FF -#define R_008670_CP_STALLED_STAT3 0x008670 -#define S_008670_CE_TO_CSF_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 0) -#define G_008670_CE_TO_CSF_NOT_RDY_TO_RCV(x) (((x) >> 0) & 0x1) -#define C_008670_CE_TO_CSF_NOT_RDY_TO_RCV 0xFFFFFFFE -#define S_008670_CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 1) -#define G_008670_CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV(x) (((x) >> 1) & 0x1) -#define C_008670_CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV 0xFFFFFFFD -#define S_008670_CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER(x) (((unsigned)(x) & 0x1) << 2) -#define G_008670_CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER(x) (((x) >> 2) & 0x1) -#define C_008670_CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER 0xFFFFFFFB -#define S_008670_CE_TO_RAM_INIT_NOT_RDY(x) (((unsigned)(x) & 0x1) << 3) -#define G_008670_CE_TO_RAM_INIT_NOT_RDY(x) (((x) >> 3) & 0x1) -#define C_008670_CE_TO_RAM_INIT_NOT_RDY 0xFFFFFFF7 -#define S_008670_CE_TO_RAM_DUMP_NOT_RDY(x) (((unsigned)(x) & 0x1) << 4) -#define G_008670_CE_TO_RAM_DUMP_NOT_RDY(x) (((x) >> 4) & 0x1) -#define C_008670_CE_TO_RAM_DUMP_NOT_RDY 0xFFFFFFEF -#define S_008670_CE_TO_RAM_WRITE_NOT_RDY(x) (((unsigned)(x) & 0x1) << 5) -#define G_008670_CE_TO_RAM_WRITE_NOT_RDY(x) (((x) >> 5) & 0x1) -#define C_008670_CE_TO_RAM_WRITE_NOT_RDY 0xFFFFFFDF -#define S_008670_CE_TO_INC_FIFO_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 6) -#define G_008670_CE_TO_INC_FIFO_NOT_RDY_TO_RCV(x) (((x) >> 6) & 0x1) -#define C_008670_CE_TO_INC_FIFO_NOT_RDY_TO_RCV 0xFFFFFFBF -#define S_008670_CE_TO_WR_FIFO_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 7) -#define G_008670_CE_TO_WR_FIFO_NOT_RDY_TO_RCV(x) (((x) >> 7) & 0x1) -#define C_008670_CE_TO_WR_FIFO_NOT_RDY_TO_RCV 0xFFFFFF7F -#define S_008670_CE_WAITING_ON_BUFFER_DATA(x) (((unsigned)(x) & 0x1) << 10) -#define G_008670_CE_WAITING_ON_BUFFER_DATA(x) (((x) >> 10) & 0x1) -#define C_008670_CE_WAITING_ON_BUFFER_DATA 0xFFFFFBFF -#define S_008670_CE_WAITING_ON_CE_BUFFER_FLAG(x) (((unsigned)(x) & 0x1) << 11) -#define G_008670_CE_WAITING_ON_CE_BUFFER_FLAG(x) (((x) >> 11) & 0x1) -#define C_008670_CE_WAITING_ON_CE_BUFFER_FLAG 0xFFFFF7FF -#define S_008670_CE_WAITING_ON_DE_COUNTER(x) (((unsigned)(x) & 0x1) << 12) -#define G_008670_CE_WAITING_ON_DE_COUNTER(x) (((x) >> 12) & 0x1) -#define C_008670_CE_WAITING_ON_DE_COUNTER 0xFFFFEFFF -#define S_008670_CE_WAITING_ON_DE_COUNTER_UNDERFLOW(x) (((unsigned)(x) & 0x1) << 13) -#define G_008670_CE_WAITING_ON_DE_COUNTER_UNDERFLOW(x) (((x) >> 13) & 0x1) -#define C_008670_CE_WAITING_ON_DE_COUNTER_UNDERFLOW 0xFFFFDFFF -#define S_008670_TCIU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 14) -#define G_008670_TCIU_WAITING_ON_FREE(x) (((x) >> 14) & 0x1) -#define C_008670_TCIU_WAITING_ON_FREE 0xFFFFBFFF -#define S_008670_TCIU_WAITING_ON_TAGS(x) (((unsigned)(x) & 0x1) << 15) -#define G_008670_TCIU_WAITING_ON_TAGS(x) (((x) >> 15) & 0x1) -#define C_008670_TCIU_WAITING_ON_TAGS 0xFFFF7FFF -#define S_008670_CE_STALLED_ON_TC_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 16) -#define G_008670_CE_STALLED_ON_TC_WR_CONFIRM(x) (((x) >> 16) & 0x1) -#define C_008670_CE_STALLED_ON_TC_WR_CONFIRM 0xFFFEFFFF -#define S_008670_CE_STALLED_ON_ATOMIC_RTN_DATA(x) (((unsigned)(x) & 0x1) << 17) -#define G_008670_CE_STALLED_ON_ATOMIC_RTN_DATA(x) (((x) >> 17) & 0x1) -#define C_008670_CE_STALLED_ON_ATOMIC_RTN_DATA 0xFFFDFFFF -#define S_008670_ATCL2IU_WAITING_ON_FREE(x) (((unsigned)(x) & 0x1) << 18) -#define G_008670_ATCL2IU_WAITING_ON_FREE(x) (((x) >> 18) & 0x1) -#define C_008670_ATCL2IU_WAITING_ON_FREE 0xFFFBFFFF -#define S_008670_ATCL2IU_WAITING_ON_TAGS(x) (((unsigned)(x) & 0x1) << 19) -#define G_008670_ATCL2IU_WAITING_ON_TAGS(x) (((x) >> 19) & 0x1) -#define C_008670_ATCL2IU_WAITING_ON_TAGS 0xFFF7FFFF -#define S_008670_ATCL1_WAITING_ON_TRANS(x) (((unsigned)(x) & 0x1) << 20) -#define G_008670_ATCL1_WAITING_ON_TRANS(x) (((x) >> 20) & 0x1) -#define C_008670_ATCL1_WAITING_ON_TRANS 0xFFEFFFFF -#define R_008674_CP_STALLED_STAT1 0x008674 -#define S_008674_RBIU_TO_DMA_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 0) -#define G_008674_RBIU_TO_DMA_NOT_RDY_TO_RCV(x) (((x) >> 0) & 0x1) -#define C_008674_RBIU_TO_DMA_NOT_RDY_TO_RCV 0xFFFFFFFE -#define S_008674_RBIU_TO_SEM_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 2) -#define G_008674_RBIU_TO_SEM_NOT_RDY_TO_RCV(x) (((x) >> 2) & 0x1) -#define C_008674_RBIU_TO_SEM_NOT_RDY_TO_RCV 0xFFFFFFFB -#define S_008674_RBIU_TO_MEMWR_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 4) -#define G_008674_RBIU_TO_MEMWR_NOT_RDY_TO_RCV(x) (((x) >> 4) & 0x1) -#define C_008674_RBIU_TO_MEMWR_NOT_RDY_TO_RCV 0xFFFFFFEF -#define S_008674_ME_HAS_ACTIVE_CE_BUFFER_FLAG(x) (((unsigned)(x) & 0x1) << 10) -#define G_008674_ME_HAS_ACTIVE_CE_BUFFER_FLAG(x) (((x) >> 10) & 0x1) -#define C_008674_ME_HAS_ACTIVE_CE_BUFFER_FLAG 0xFFFFFBFF -#define S_008674_ME_HAS_ACTIVE_DE_BUFFER_FLAG(x) (((unsigned)(x) & 0x1) << 11) -#define G_008674_ME_HAS_ACTIVE_DE_BUFFER_FLAG(x) (((x) >> 11) & 0x1) -#define C_008674_ME_HAS_ACTIVE_DE_BUFFER_FLAG 0xFFFFF7FF -#define S_008674_ME_STALLED_ON_TC_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 12) -#define G_008674_ME_STALLED_ON_TC_WR_CONFIRM(x) (((x) >> 12) & 0x1) -#define C_008674_ME_STALLED_ON_TC_WR_CONFIRM 0xFFFFEFFF -#define S_008674_ME_STALLED_ON_ATOMIC_RTN_DATA(x) (((unsigned)(x) & 0x1) << 13) -#define G_008674_ME_STALLED_ON_ATOMIC_RTN_DATA(x) (((x) >> 13) & 0x1) -#define C_008674_ME_STALLED_ON_ATOMIC_RTN_DATA 0xFFFFDFFF -#define S_008674_ME_WAITING_ON_TC_READ_DATA(x) (((unsigned)(x) & 0x1) << 14) -#define G_008674_ME_WAITING_ON_TC_READ_DATA(x) (((x) >> 14) & 0x1) -#define C_008674_ME_WAITING_ON_TC_READ_DATA 0xFFFFBFFF -#define S_008674_ME_WAITING_ON_REG_READ_DATA(x) (((unsigned)(x) & 0x1) << 15) -#define G_008674_ME_WAITING_ON_REG_READ_DATA(x) (((x) >> 15) & 0x1) -#define C_008674_ME_WAITING_ON_REG_READ_DATA 0xFFFF7FFF -#define S_008674_RCIU_WAITING_ON_GDS_FREE(x) (((unsigned)(x) & 0x1) << 23) -#define G_008674_RCIU_WAITING_ON_GDS_FREE(x) (((x) >> 23) & 0x1) -#define C_008674_RCIU_WAITING_ON_GDS_FREE 0xFF7FFFFF -#define S_008674_RCIU_WAITING_ON_GRBM_FREE(x) (((unsigned)(x) & 0x1) << 24) -#define G_008674_RCIU_WAITING_ON_GRBM_FREE(x) (((x) >> 24) & 0x1) -#define C_008674_RCIU_WAITING_ON_GRBM_FREE 0xFEFFFFFF -#define S_008674_RCIU_WAITING_ON_VGT_FREE(x) (((unsigned)(x) & 0x1) << 25) -#define G_008674_RCIU_WAITING_ON_VGT_FREE(x) (((x) >> 25) & 0x1) -#define C_008674_RCIU_WAITING_ON_VGT_FREE 0xFDFFFFFF -#define S_008674_RCIU_STALLED_ON_ME_READ(x) (((unsigned)(x) & 0x1) << 26) -#define G_008674_RCIU_STALLED_ON_ME_READ(x) (((x) >> 26) & 0x1) -#define C_008674_RCIU_STALLED_ON_ME_READ 0xFBFFFFFF -#define S_008674_RCIU_STALLED_ON_DMA_READ(x) (((unsigned)(x) & 0x1) << 27) -#define G_008674_RCIU_STALLED_ON_DMA_READ(x) (((x) >> 27) & 0x1) -#define C_008674_RCIU_STALLED_ON_DMA_READ 0xF7FFFFFF -#define S_008674_RCIU_STALLED_ON_APPEND_READ(x) (((unsigned)(x) & 0x1) << 28) -#define G_008674_RCIU_STALLED_ON_APPEND_READ(x) (((x) >> 28) & 0x1) -#define C_008674_RCIU_STALLED_ON_APPEND_READ 0xEFFFFFFF -#define S_008674_RCIU_HALTED_BY_REG_VIOLATION(x) (((unsigned)(x) & 0x1) << 29) -#define G_008674_RCIU_HALTED_BY_REG_VIOLATION(x) (((x) >> 29) & 0x1) -#define C_008674_RCIU_HALTED_BY_REG_VIOLATION 0xDFFFFFFF -#define R_008678_CP_STALLED_STAT2 0x008678 -#define S_008678_PFP_TO_CSF_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 0) -#define G_008678_PFP_TO_CSF_NOT_RDY_TO_RCV(x) (((x) >> 0) & 0x1) -#define C_008678_PFP_TO_CSF_NOT_RDY_TO_RCV 0xFFFFFFFE -#define S_008678_PFP_TO_MEQ_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 1) -#define G_008678_PFP_TO_MEQ_NOT_RDY_TO_RCV(x) (((x) >> 1) & 0x1) -#define C_008678_PFP_TO_MEQ_NOT_RDY_TO_RCV 0xFFFFFFFD -#define S_008678_PFP_TO_RCIU_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 2) -#define G_008678_PFP_TO_RCIU_NOT_RDY_TO_RCV(x) (((x) >> 2) & 0x1) -#define C_008678_PFP_TO_RCIU_NOT_RDY_TO_RCV 0xFFFFFFFB -#define S_008678_PFP_TO_VGT_WRITES_PENDING(x) (((unsigned)(x) & 0x1) << 4) -#define G_008678_PFP_TO_VGT_WRITES_PENDING(x) (((x) >> 4) & 0x1) -#define C_008678_PFP_TO_VGT_WRITES_PENDING 0xFFFFFFEF -#define S_008678_PFP_RCIU_READ_PENDING(x) (((unsigned)(x) & 0x1) << 5) -#define G_008678_PFP_RCIU_READ_PENDING(x) (((x) >> 5) & 0x1) -#define C_008678_PFP_RCIU_READ_PENDING 0xFFFFFFDF -#define S_008678_PFP_WAITING_ON_BUFFER_DATA(x) (((unsigned)(x) & 0x1) << 8) -#define G_008678_PFP_WAITING_ON_BUFFER_DATA(x) (((x) >> 8) & 0x1) -#define C_008678_PFP_WAITING_ON_BUFFER_DATA 0xFFFFFEFF -#define S_008678_ME_WAIT_ON_CE_COUNTER(x) (((unsigned)(x) & 0x1) << 9) -#define G_008678_ME_WAIT_ON_CE_COUNTER(x) (((x) >> 9) & 0x1) -#define C_008678_ME_WAIT_ON_CE_COUNTER 0xFFFFFDFF -#define S_008678_ME_WAIT_ON_AVAIL_BUFFER(x) (((unsigned)(x) & 0x1) << 10) -#define G_008678_ME_WAIT_ON_AVAIL_BUFFER(x) (((x) >> 10) & 0x1) -#define C_008678_ME_WAIT_ON_AVAIL_BUFFER 0xFFFFFBFF -#define S_008678_GFX_CNTX_NOT_AVAIL_TO_ME(x) (((unsigned)(x) & 0x1) << 11) -#define G_008678_GFX_CNTX_NOT_AVAIL_TO_ME(x) (((x) >> 11) & 0x1) -#define C_008678_GFX_CNTX_NOT_AVAIL_TO_ME 0xFFFFF7FF -#define S_008678_ME_RCIU_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 12) -#define G_008678_ME_RCIU_NOT_RDY_TO_RCV(x) (((x) >> 12) & 0x1) -#define C_008678_ME_RCIU_NOT_RDY_TO_RCV 0xFFFFEFFF -#define S_008678_ME_TO_CONST_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 13) -#define G_008678_ME_TO_CONST_NOT_RDY_TO_RCV(x) (((x) >> 13) & 0x1) -#define C_008678_ME_TO_CONST_NOT_RDY_TO_RCV 0xFFFFDFFF -#define S_008678_ME_WAITING_DATA_FROM_PFP(x) (((unsigned)(x) & 0x1) << 14) -#define G_008678_ME_WAITING_DATA_FROM_PFP(x) (((x) >> 14) & 0x1) -#define C_008678_ME_WAITING_DATA_FROM_PFP 0xFFFFBFFF -#define S_008678_ME_WAITING_ON_PARTIAL_FLUSH(x) (((unsigned)(x) & 0x1) << 15) -#define G_008678_ME_WAITING_ON_PARTIAL_FLUSH(x) (((x) >> 15) & 0x1) -#define C_008678_ME_WAITING_ON_PARTIAL_FLUSH 0xFFFF7FFF -#define S_008678_MEQ_TO_ME_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 16) -#define G_008678_MEQ_TO_ME_NOT_RDY_TO_RCV(x) (((x) >> 16) & 0x1) -#define C_008678_MEQ_TO_ME_NOT_RDY_TO_RCV 0xFFFEFFFF -#define S_008678_STQ_TO_ME_NOT_RDY_TO_RCV(x) (((unsigned)(x) & 0x1) << 17) -#define G_008678_STQ_TO_ME_NOT_RDY_TO_RCV(x) (((x) >> 17) & 0x1) -#define C_008678_STQ_TO_ME_NOT_RDY_TO_RCV 0xFFFDFFFF -#define S_008678_ME_WAITING_DATA_FROM_STQ(x) (((unsigned)(x) & 0x1) << 18) -#define G_008678_ME_WAITING_DATA_FROM_STQ(x) (((x) >> 18) & 0x1) -#define C_008678_ME_WAITING_DATA_FROM_STQ 0xFFFBFFFF -#define S_008678_PFP_STALLED_ON_TC_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 19) -#define G_008678_PFP_STALLED_ON_TC_WR_CONFIRM(x) (((x) >> 19) & 0x1) -#define C_008678_PFP_STALLED_ON_TC_WR_CONFIRM 0xFFF7FFFF -#define S_008678_PFP_STALLED_ON_ATOMIC_RTN_DATA(x) (((unsigned)(x) & 0x1) << 20) -#define G_008678_PFP_STALLED_ON_ATOMIC_RTN_DATA(x) (((x) >> 20) & 0x1) -#define C_008678_PFP_STALLED_ON_ATOMIC_RTN_DATA 0xFFEFFFFF -#define S_008678_EOPD_FIFO_NEEDS_SC_EOP_DONE(x) (((unsigned)(x) & 0x1) << 21) -#define G_008678_EOPD_FIFO_NEEDS_SC_EOP_DONE(x) (((x) >> 21) & 0x1) -#define C_008678_EOPD_FIFO_NEEDS_SC_EOP_DONE 0xFFDFFFFF -#define S_008678_EOPD_FIFO_NEEDS_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 22) -#define G_008678_EOPD_FIFO_NEEDS_WR_CONFIRM(x) (((x) >> 22) & 0x1) -#define C_008678_EOPD_FIFO_NEEDS_WR_CONFIRM 0xFFBFFFFF -#define S_008678_STRMO_WR_OF_PRIM_DATA_PENDING(x) (((unsigned)(x) & 0x1) << 23) -#define G_008678_STRMO_WR_OF_PRIM_DATA_PENDING(x) (((x) >> 23) & 0x1) -#define C_008678_STRMO_WR_OF_PRIM_DATA_PENDING 0xFF7FFFFF -#define S_008678_PIPE_STATS_WR_DATA_PENDING(x) (((unsigned)(x) & 0x1) << 24) -#define G_008678_PIPE_STATS_WR_DATA_PENDING(x) (((x) >> 24) & 0x1) -#define C_008678_PIPE_STATS_WR_DATA_PENDING 0xFEFFFFFF -#define S_008678_APPEND_RDY_WAIT_ON_CS_DONE(x) (((unsigned)(x) & 0x1) << 25) -#define G_008678_APPEND_RDY_WAIT_ON_CS_DONE(x) (((x) >> 25) & 0x1) -#define C_008678_APPEND_RDY_WAIT_ON_CS_DONE 0xFDFFFFFF -#define S_008678_APPEND_RDY_WAIT_ON_PS_DONE(x) (((unsigned)(x) & 0x1) << 26) -#define G_008678_APPEND_RDY_WAIT_ON_PS_DONE(x) (((x) >> 26) & 0x1) -#define C_008678_APPEND_RDY_WAIT_ON_PS_DONE 0xFBFFFFFF -#define S_008678_APPEND_WAIT_ON_WR_CONFIRM(x) (((unsigned)(x) & 0x1) << 27) -#define G_008678_APPEND_WAIT_ON_WR_CONFIRM(x) (((x) >> 27) & 0x1) -#define C_008678_APPEND_WAIT_ON_WR_CONFIRM 0xF7FFFFFF -#define S_008678_APPEND_ACTIVE_PARTITION(x) (((unsigned)(x) & 0x1) << 28) -#define G_008678_APPEND_ACTIVE_PARTITION(x) (((x) >> 28) & 0x1) -#define C_008678_APPEND_ACTIVE_PARTITION 0xEFFFFFFF -#define S_008678_APPEND_WAITING_TO_SEND_MEMWRITE(x) (((unsigned)(x) & 0x1) << 29) -#define G_008678_APPEND_WAITING_TO_SEND_MEMWRITE(x) (((x) >> 29) & 0x1) -#define C_008678_APPEND_WAITING_TO_SEND_MEMWRITE 0xDFFFFFFF -#define S_008678_SURF_SYNC_NEEDS_IDLE_CNTXS(x) (((unsigned)(x) & 0x1) << 30) -#define G_008678_SURF_SYNC_NEEDS_IDLE_CNTXS(x) (((x) >> 30) & 0x1) -#define C_008678_SURF_SYNC_NEEDS_IDLE_CNTXS 0xBFFFFFFF -#define S_008678_SURF_SYNC_NEEDS_ALL_CLEAN(x) (((unsigned)(x) & 0x1) << 31) -#define G_008678_SURF_SYNC_NEEDS_ALL_CLEAN(x) (((x) >> 31) & 0x1) -#define C_008678_SURF_SYNC_NEEDS_ALL_CLEAN 0x7FFFFFFF -#define R_008680_CP_STAT 0x008680 -#define S_008680_ROQ_RING_BUSY(x) (((unsigned)(x) & 0x1) << 9) -#define G_008680_ROQ_RING_BUSY(x) (((x) >> 9) & 0x1) -#define C_008680_ROQ_RING_BUSY 0xFFFFFDFF -#define S_008680_ROQ_INDIRECT1_BUSY(x) (((unsigned)(x) & 0x1) << 10) -#define G_008680_ROQ_INDIRECT1_BUSY(x) (((x) >> 10) & 0x1) -#define C_008680_ROQ_INDIRECT1_BUSY 0xFFFFFBFF -#define S_008680_ROQ_INDIRECT2_BUSY(x) (((unsigned)(x) & 0x1) << 11) -#define G_008680_ROQ_INDIRECT2_BUSY(x) (((x) >> 11) & 0x1) -#define C_008680_ROQ_INDIRECT2_BUSY 0xFFFFF7FF -#define S_008680_ROQ_STATE_BUSY(x) (((unsigned)(x) & 0x1) << 12) -#define G_008680_ROQ_STATE_BUSY(x) (((x) >> 12) & 0x1) -#define C_008680_ROQ_STATE_BUSY 0xFFFFEFFF -#define S_008680_DC_BUSY(x) (((unsigned)(x) & 0x1) << 13) -#define G_008680_DC_BUSY(x) (((x) >> 13) & 0x1) -#define C_008680_DC_BUSY 0xFFFFDFFF -#define S_008680_ATCL2IU_BUSY(x) (((unsigned)(x) & 0x1) << 14) -#define G_008680_ATCL2IU_BUSY(x) (((x) >> 14) & 0x1) -#define C_008680_ATCL2IU_BUSY 0xFFFFBFFF -#define S_008680_PFP_BUSY(x) (((unsigned)(x) & 0x1) << 15) -#define G_008680_PFP_BUSY(x) (((x) >> 15) & 0x1) -#define C_008680_PFP_BUSY 0xFFFF7FFF -#define S_008680_MEQ_BUSY(x) (((unsigned)(x) & 0x1) << 16) -#define G_008680_MEQ_BUSY(x) (((x) >> 16) & 0x1) -#define C_008680_MEQ_BUSY 0xFFFEFFFF -#define S_008680_ME_BUSY(x) (((unsigned)(x) & 0x1) << 17) -#define G_008680_ME_BUSY(x) (((x) >> 17) & 0x1) -#define C_008680_ME_BUSY 0xFFFDFFFF -#define S_008680_QUERY_BUSY(x) (((unsigned)(x) & 0x1) << 18) -#define G_008680_QUERY_BUSY(x) (((x) >> 18) & 0x1) -#define C_008680_QUERY_BUSY 0xFFFBFFFF -#define S_008680_SEMAPHORE_BUSY(x) (((unsigned)(x) & 0x1) << 19) -#define G_008680_SEMAPHORE_BUSY(x) (((x) >> 19) & 0x1) -#define C_008680_SEMAPHORE_BUSY 0xFFF7FFFF -#define S_008680_INTERRUPT_BUSY(x) (((unsigned)(x) & 0x1) << 20) -#define G_008680_INTERRUPT_BUSY(x) (((x) >> 20) & 0x1) -#define C_008680_INTERRUPT_BUSY 0xFFEFFFFF -#define S_008680_SURFACE_SYNC_BUSY(x) (((unsigned)(x) & 0x1) << 21) -#define G_008680_SURFACE_SYNC_BUSY(x) (((x) >> 21) & 0x1) -#define C_008680_SURFACE_SYNC_BUSY 0xFFDFFFFF -#define S_008680_DMA_BUSY(x) (((unsigned)(x) & 0x1) << 22) -#define G_008680_DMA_BUSY(x) (((x) >> 22) & 0x1) -#define C_008680_DMA_BUSY 0xFFBFFFFF -#define S_008680_RCIU_BUSY(x) (((unsigned)(x) & 0x1) << 23) -#define G_008680_RCIU_BUSY(x) (((x) >> 23) & 0x1) -#define C_008680_RCIU_BUSY 0xFF7FFFFF -#define S_008680_SCRATCH_RAM_BUSY(x) (((unsigned)(x) & 0x1) << 24) -#define G_008680_SCRATCH_RAM_BUSY(x) (((x) >> 24) & 0x1) -#define C_008680_SCRATCH_RAM_BUSY 0xFEFFFFFF -#define S_008680_CPC_CPG_BUSY(x) (((unsigned)(x) & 0x1) << 25) -#define G_008680_CPC_CPG_BUSY(x) (((x) >> 25) & 0x1) -#define C_008680_CPC_CPG_BUSY 0xFDFFFFFF -#define S_008680_CE_BUSY(x) (((unsigned)(x) & 0x1) << 26) -#define G_008680_CE_BUSY(x) (((x) >> 26) & 0x1) -#define C_008680_CE_BUSY 0xFBFFFFFF -#define S_008680_TCIU_BUSY(x) (((unsigned)(x) & 0x1) << 27) -#define G_008680_TCIU_BUSY(x) (((x) >> 27) & 0x1) -#define C_008680_TCIU_BUSY 0xF7FFFFFF -#define S_008680_ROQ_CE_RING_BUSY(x) (((unsigned)(x) & 0x1) << 28) -#define G_008680_ROQ_CE_RING_BUSY(x) (((x) >> 28) & 0x1) -#define C_008680_ROQ_CE_RING_BUSY 0xEFFFFFFF -#define S_008680_ROQ_CE_INDIRECT1_BUSY(x) (((unsigned)(x) & 0x1) << 29) -#define G_008680_ROQ_CE_INDIRECT1_BUSY(x) (((x) >> 29) & 0x1) -#define C_008680_ROQ_CE_INDIRECT1_BUSY 0xDFFFFFFF -#define S_008680_ROQ_CE_INDIRECT2_BUSY(x) (((unsigned)(x) & 0x1) << 30) -#define G_008680_ROQ_CE_INDIRECT2_BUSY(x) (((x) >> 30) & 0x1) -#define C_008680_ROQ_CE_INDIRECT2_BUSY 0xBFFFFFFF -#define S_008680_CP_BUSY(x) (((unsigned)(x) & 0x1) << 31) -#define G_008680_CP_BUSY(x) (((x) >> 31) & 0x1) -#define C_008680_CP_BUSY 0x7FFFFFFF -/* CIK */ -#define R_030800_GRBM_GFX_INDEX 0x030800 -#define S_030800_INSTANCE_INDEX(x) (((unsigned)(x) & 0xFF) << 0) -#define G_030800_INSTANCE_INDEX(x) (((x) >> 0) & 0xFF) -#define C_030800_INSTANCE_INDEX 0xFFFFFF00 -#define S_030800_SH_INDEX(x) (((unsigned)(x) & 0xFF) << 8) -#define G_030800_SH_INDEX(x) (((x) >> 8) & 0xFF) -#define C_030800_SH_INDEX 0xFFFF00FF -#define S_030800_SE_INDEX(x) (((unsigned)(x) & 0xFF) << 16) -#define G_030800_SE_INDEX(x) (((x) >> 16) & 0xFF) -#define C_030800_SE_INDEX 0xFF00FFFF -#define S_030800_SH_BROADCAST_WRITES(x) (((unsigned)(x) & 0x1) << 29) -#define G_030800_SH_BROADCAST_WRITES(x) (((x) >> 29) & 0x1) -#define C_030800_SH_BROADCAST_WRITES 0xDFFFFFFF -#define S_030800_INSTANCE_BROADCAST_WRITES(x) (((unsigned)(x) & 0x1) << 30) -#define G_030800_INSTANCE_BROADCAST_WRITES(x) (((x) >> 30) & 0x1) -#define C_030800_INSTANCE_BROADCAST_WRITES 0xBFFFFFFF -#define S_030800_SE_BROADCAST_WRITES(x) (((unsigned)(x) & 0x1) << 31) -#define G_030800_SE_BROADCAST_WRITES(x) (((x) >> 31) & 0x1) -#define C_030800_SE_BROADCAST_WRITES 0x7FFFFFFF -#define R_030900_VGT_ESGS_RING_SIZE 0x030900 -#define R_030904_VGT_GSVS_RING_SIZE 0x030904 -#define R_030908_VGT_PRIMITIVE_TYPE 0x030908 -#define S_030908_PRIM_TYPE(x) (((unsigned)(x) & 0x3F) << 0) -#define G_030908_PRIM_TYPE(x) (((x) >> 0) & 0x3F) -#define C_030908_PRIM_TYPE 0xFFFFFFC0 -#define V_030908_DI_PT_NONE 0x00 -#define V_030908_DI_PT_POINTLIST 0x01 -#define V_030908_DI_PT_LINELIST 0x02 -#define V_030908_DI_PT_LINESTRIP 0x03 -#define V_030908_DI_PT_TRILIST 0x04 -#define V_030908_DI_PT_TRIFAN 0x05 -#define V_030908_DI_PT_TRISTRIP 0x06 -#define V_030908_DI_PT_PATCH 0x09 -#define V_030908_DI_PT_LINELIST_ADJ 0x0A -#define V_030908_DI_PT_LINESTRIP_ADJ 0x0B -#define V_030908_DI_PT_TRILIST_ADJ 0x0C -#define V_030908_DI_PT_TRISTRIP_ADJ 0x0D -#define V_030908_DI_PT_TRI_WITH_WFLAGS 0x10 -#define V_030908_DI_PT_RECTLIST 0x11 -#define V_030908_DI_PT_LINELOOP 0x12 -#define V_030908_DI_PT_QUADLIST 0x13 -#define V_030908_DI_PT_QUADSTRIP 0x14 -#define V_030908_DI_PT_POLYGON 0x15 -#define V_030908_DI_PT_2D_COPY_RECT_LIST_V0 0x16 -#define V_030908_DI_PT_2D_COPY_RECT_LIST_V1 0x17 -#define V_030908_DI_PT_2D_COPY_RECT_LIST_V2 0x18 -#define V_030908_DI_PT_2D_COPY_RECT_LIST_V3 0x19 -#define V_030908_DI_PT_2D_FILL_RECT_LIST 0x1A -#define V_030908_DI_PT_2D_LINE_STRIP 0x1B -#define V_030908_DI_PT_2D_TRI_STRIP 0x1C -#define R_03090C_VGT_INDEX_TYPE 0x03090C -#define S_03090C_INDEX_TYPE(x) (((unsigned)(x) & 0x03) << 0) -#define G_03090C_INDEX_TYPE(x) (((x) >> 0) & 0x03) -#define C_03090C_INDEX_TYPE 0xFFFFFFFC -#define V_03090C_DI_INDEX_SIZE_16_BIT 0x00 -#define V_03090C_DI_INDEX_SIZE_32_BIT 0x01 -#define R_030910_VGT_STRMOUT_BUFFER_FILLED_SIZE_0 0x030910 -#define R_030914_VGT_STRMOUT_BUFFER_FILLED_SIZE_1 0x030914 -#define R_030918_VGT_STRMOUT_BUFFER_FILLED_SIZE_2 0x030918 -#define R_03091C_VGT_STRMOUT_BUFFER_FILLED_SIZE_3 0x03091C -#define R_030930_VGT_NUM_INDICES 0x030930 -#define R_030934_VGT_NUM_INSTANCES 0x030934 -#define R_030938_VGT_TF_RING_SIZE 0x030938 -#define S_030938_SIZE(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_030938_SIZE(x) (((x) >> 0) & 0xFFFF) -#define C_030938_SIZE 0xFFFF0000 -#define R_03093C_VGT_HS_OFFCHIP_PARAM 0x03093C -#define S_03093C_OFFCHIP_BUFFERING(x) (((unsigned)(x) & 0x1FF) << 0) -#define G_03093C_OFFCHIP_BUFFERING(x) (((x) >> 0) & 0x1FF) -#define C_03093C_OFFCHIP_BUFFERING 0xFFFFFE00 -#define S_03093C_OFFCHIP_GRANULARITY(x) (((unsigned)(x) & 0x03) << 9) -#define G_03093C_OFFCHIP_GRANULARITY(x) (((x) >> 9) & 0x03) -#define C_03093C_OFFCHIP_GRANULARITY 0xFFFFF9FF -#define V_03093C_X_8K_DWORDS 0x00 -#define V_03093C_X_4K_DWORDS 0x01 -#define V_03093C_X_2K_DWORDS 0x02 -#define V_03093C_X_1K_DWORDS 0x03 -#define R_030940_VGT_TF_MEMORY_BASE 0x030940 -#define R_030A00_PA_SU_LINE_STIPPLE_VALUE 0x030A00 -#define S_030A00_LINE_STIPPLE_VALUE(x) (((unsigned)(x) & 0xFFFFFF) << 0) -#define G_030A00_LINE_STIPPLE_VALUE(x) (((x) >> 0) & 0xFFFFFF) -#define C_030A00_LINE_STIPPLE_VALUE 0xFF000000 -#define R_030A04_PA_SC_LINE_STIPPLE_STATE 0x030A04 -#define S_030A04_CURRENT_PTR(x) (((unsigned)(x) & 0x0F) << 0) -#define G_030A04_CURRENT_PTR(x) (((x) >> 0) & 0x0F) -#define C_030A04_CURRENT_PTR 0xFFFFFFF0 -#define S_030A04_CURRENT_COUNT(x) (((unsigned)(x) & 0xFF) << 8) -#define G_030A04_CURRENT_COUNT(x) (((x) >> 8) & 0xFF) -#define C_030A04_CURRENT_COUNT 0xFFFF00FF -#define R_030A10_PA_SC_SCREEN_EXTENT_MIN_0 0x030A10 -#define S_030A10_X(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_030A10_X(x) (((x) >> 0) & 0xFFFF) -#define C_030A10_X 0xFFFF0000 -#define S_030A10_Y(x) (((unsigned)(x) & 0xFFFF) << 16) -#define G_030A10_Y(x) (((x) >> 16) & 0xFFFF) -#define C_030A10_Y 0x0000FFFF -#define R_030A14_PA_SC_SCREEN_EXTENT_MAX_0 0x030A14 -#define S_030A14_X(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_030A14_X(x) (((x) >> 0) & 0xFFFF) -#define C_030A14_X 0xFFFF0000 -#define S_030A14_Y(x) (((unsigned)(x) & 0xFFFF) << 16) -#define G_030A14_Y(x) (((x) >> 16) & 0xFFFF) -#define C_030A14_Y 0x0000FFFF -#define R_030A18_PA_SC_SCREEN_EXTENT_MIN_1 0x030A18 -#define S_030A18_X(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_030A18_X(x) (((x) >> 0) & 0xFFFF) -#define C_030A18_X 0xFFFF0000 -#define S_030A18_Y(x) (((unsigned)(x) & 0xFFFF) << 16) -#define G_030A18_Y(x) (((x) >> 16) & 0xFFFF) -#define C_030A18_Y 0x0000FFFF -#define R_030A2C_PA_SC_SCREEN_EXTENT_MAX_1 0x030A2C -#define S_030A2C_X(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_030A2C_X(x) (((x) >> 0) & 0xFFFF) -#define C_030A2C_X 0xFFFF0000 -#define S_030A2C_Y(x) (((unsigned)(x) & 0xFFFF) << 16) -#define G_030A2C_Y(x) (((x) >> 16) & 0xFFFF) -#define C_030A2C_Y 0x0000FFFF -/* */ -#define R_008BF0_PA_SC_ENHANCE 0x008BF0 -#define S_008BF0_ENABLE_PA_SC_OUT_OF_ORDER(x) (((unsigned)(x) & 0x1) << 0) -#define G_008BF0_ENABLE_PA_SC_OUT_OF_ORDER(x) (((x) >> 0) & 0x1) -#define C_008BF0_ENABLE_PA_SC_OUT_OF_ORDER 0xFFFFFFFE -#define S_008BF0_DISABLE_SC_DB_TILE_FIX(x) (((unsigned)(x) & 0x1) << 1) -#define G_008BF0_DISABLE_SC_DB_TILE_FIX(x) (((x) >> 1) & 0x1) -#define C_008BF0_DISABLE_SC_DB_TILE_FIX 0xFFFFFFFD -#define S_008BF0_DISABLE_AA_MASK_FULL_FIX(x) (((unsigned)(x) & 0x1) << 2) -#define G_008BF0_DISABLE_AA_MASK_FULL_FIX(x) (((x) >> 2) & 0x1) -#define C_008BF0_DISABLE_AA_MASK_FULL_FIX 0xFFFFFFFB -#define S_008BF0_ENABLE_1XMSAA_SAMPLE_LOCATIONS(x) (((unsigned)(x) & 0x1) << 3) -#define G_008BF0_ENABLE_1XMSAA_SAMPLE_LOCATIONS(x) (((x) >> 3) & 0x1) -#define C_008BF0_ENABLE_1XMSAA_SAMPLE_LOCATIONS 0xFFFFFFF7 -#define S_008BF0_ENABLE_1XMSAA_SAMPLE_LOC_CENTROID(x) (((unsigned)(x) & 0x1) << 4) -#define G_008BF0_ENABLE_1XMSAA_SAMPLE_LOC_CENTROID(x) (((x) >> 4) & 0x1) -#define C_008BF0_ENABLE_1XMSAA_SAMPLE_LOC_CENTROID 0xFFFFFFEF -#define S_008BF0_DISABLE_SCISSOR_FIX(x) (((unsigned)(x) & 0x1) << 5) -#define G_008BF0_DISABLE_SCISSOR_FIX(x) (((x) >> 5) & 0x1) -#define C_008BF0_DISABLE_SCISSOR_FIX 0xFFFFFFDF -#define S_008BF0_DISABLE_PW_BUBBLE_COLLAPSE(x) (((unsigned)(x) & 0x03) << 6) -#define G_008BF0_DISABLE_PW_BUBBLE_COLLAPSE(x) (((x) >> 6) & 0x03) -#define C_008BF0_DISABLE_PW_BUBBLE_COLLAPSE 0xFFFFFF3F -#define S_008BF0_SEND_UNLIT_STILES_TO_PACKER(x) (((unsigned)(x) & 0x1) << 8) -#define G_008BF0_SEND_UNLIT_STILES_TO_PACKER(x) (((x) >> 8) & 0x1) -#define C_008BF0_SEND_UNLIT_STILES_TO_PACKER 0xFFFFFEFF -#define S_008BF0_DISABLE_DUALGRAD_PERF_OPTIMIZATION(x) (((unsigned)(x) & 0x1) << 9) -#define G_008BF0_DISABLE_DUALGRAD_PERF_OPTIMIZATION(x) (((x) >> 9) & 0x1) -#define C_008BF0_DISABLE_DUALGRAD_PERF_OPTIMIZATION 0xFFFFFDFF -#define R_008C08_SQC_CACHES 0x008C08 -#define S_008C08_INST_INVALIDATE(x) (((unsigned)(x) & 0x1) << 0) -#define G_008C08_INST_INVALIDATE(x) (((x) >> 0) & 0x1) -#define C_008C08_INST_INVALIDATE 0xFFFFFFFE -#define S_008C08_DATA_INVALIDATE(x) (((unsigned)(x) & 0x1) << 1) -#define G_008C08_DATA_INVALIDATE(x) (((x) >> 1) & 0x1) -#define C_008C08_DATA_INVALIDATE 0xFFFFFFFD -/* CIK */ -#define R_030D20_SQC_CACHES 0x030D20 -#define S_030D20_INST_INVALIDATE(x) (((unsigned)(x) & 0x1) << 0) -#define G_030D20_INST_INVALIDATE(x) (((x) >> 0) & 0x1) -#define C_030D20_INST_INVALIDATE 0xFFFFFFFE -#define S_030D20_DATA_INVALIDATE(x) (((unsigned)(x) & 0x1) << 1) -#define G_030D20_DATA_INVALIDATE(x) (((x) >> 1) & 0x1) -#define C_030D20_DATA_INVALIDATE 0xFFFFFFFD -#define S_030D20_INVALIDATE_VOLATILE(x) (((unsigned)(x) & 0x1) << 2) -#define G_030D20_INVALIDATE_VOLATILE(x) (((x) >> 2) & 0x1) -#define C_030D20_INVALIDATE_VOLATILE 0xFFFFFFFB -/* */ -#define R_008C0C_SQ_RANDOM_WAVE_PRI 0x008C0C -#define S_008C0C_RET(x) (((unsigned)(x) & 0x7F) << 0) -#define G_008C0C_RET(x) (((x) >> 0) & 0x7F) -#define C_008C0C_RET 0xFFFFFF80 -#define S_008C0C_RUI(x) (((unsigned)(x) & 0x07) << 7) -#define G_008C0C_RUI(x) (((x) >> 7) & 0x07) -#define C_008C0C_RUI 0xFFFFFC7F -#define S_008C0C_RNG(x) (((unsigned)(x) & 0x7FF) << 10) -#define G_008C0C_RNG(x) (((x) >> 10) & 0x7FF) -#define C_008C0C_RNG 0xFFE003FF -#define R_008DFC_SQ_EXP_0 0x008DFC -#define S_008DFC_EN(x) (((unsigned)(x) & 0x0F) << 0) -#define G_008DFC_EN(x) (((x) >> 0) & 0x0F) -#define C_008DFC_EN 0xFFFFFFF0 -#define S_008DFC_TGT(x) (((unsigned)(x) & 0x3F) << 4) -#define G_008DFC_TGT(x) (((x) >> 4) & 0x3F) -#define C_008DFC_TGT 0xFFFFFC0F -#define V_008DFC_SQ_EXP_MRT 0x00 -#define V_008DFC_SQ_EXP_MRTZ 0x08 -#define V_008DFC_SQ_EXP_NULL 0x09 -#define V_008DFC_SQ_EXP_POS 0x0C -#define V_008DFC_SQ_EXP_PARAM 0x20 -#define S_008DFC_COMPR(x) (((unsigned)(x) & 0x1) << 10) -#define G_008DFC_COMPR(x) (((x) >> 10) & 0x1) -#define C_008DFC_COMPR 0xFFFFFBFF -#define S_008DFC_DONE(x) (((unsigned)(x) & 0x1) << 11) -#define G_008DFC_DONE(x) (((x) >> 11) & 0x1) -#define C_008DFC_DONE 0xFFFFF7FF -#define S_008DFC_VM(x) (((unsigned)(x) & 0x1) << 12) -#define G_008DFC_VM(x) (((x) >> 12) & 0x1) -#define C_008DFC_VM 0xFFFFEFFF -#define S_008DFC_ENCODING(x) (((unsigned)(x) & 0x3F) << 26) -#define G_008DFC_ENCODING(x) (((x) >> 26) & 0x3F) -#define C_008DFC_ENCODING 0x03FFFFFF -#define V_008DFC_SQ_ENC_EXP_FIELD 0x3E -#define R_030E00_TA_CS_BC_BASE_ADDR 0x030E00 -#define R_030E04_TA_CS_BC_BASE_ADDR_HI 0x030E04 -#define S_030E04_ADDRESS(x) (((unsigned)(x) & 0xFF) << 0) -#define G_030E04_ADDRESS(x) (((x) >> 0) & 0xFF) -#define C_030E04_ADDRESS 0xFFFFFF00 -#define R_030F00_DB_OCCLUSION_COUNT0_LOW 0x030F00 -#define R_008F00_SQ_BUF_RSRC_WORD0 0x008F00 -#define R_030F04_DB_OCCLUSION_COUNT0_HI 0x030F04 -#define S_030F04_COUNT_HI(x) (((unsigned)(x) & 0x7FFFFFFF) << 0) -#define G_030F04_COUNT_HI(x) (((x) >> 0) & 0x7FFFFFFF) -#define C_030F04_COUNT_HI 0x80000000 -#define R_008F04_SQ_BUF_RSRC_WORD1 0x008F04 -#define S_008F04_BASE_ADDRESS_HI(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_008F04_BASE_ADDRESS_HI(x) (((x) >> 0) & 0xFFFF) -#define C_008F04_BASE_ADDRESS_HI 0xFFFF0000 -#define S_008F04_STRIDE(x) (((unsigned)(x) & 0x3FFF) << 16) -#define G_008F04_STRIDE(x) (((x) >> 16) & 0x3FFF) -#define C_008F04_STRIDE 0xC000FFFF -#define S_008F04_CACHE_SWIZZLE(x) (((unsigned)(x) & 0x1) << 30) -#define G_008F04_CACHE_SWIZZLE(x) (((x) >> 30) & 0x1) -#define C_008F04_CACHE_SWIZZLE 0xBFFFFFFF -#define S_008F04_SWIZZLE_ENABLE(x) (((unsigned)(x) & 0x1) << 31) -#define G_008F04_SWIZZLE_ENABLE(x) (((x) >> 31) & 0x1) -#define C_008F04_SWIZZLE_ENABLE 0x7FFFFFFF -#define R_030F08_DB_OCCLUSION_COUNT1_LOW 0x030F08 -#define R_008F08_SQ_BUF_RSRC_WORD2 0x008F08 -#define R_030F0C_DB_OCCLUSION_COUNT1_HI 0x030F0C -#define S_030F0C_COUNT_HI(x) (((unsigned)(x) & 0x7FFFFFFF) << 0) -#define G_030F0C_COUNT_HI(x) (((x) >> 0) & 0x7FFFFFFF) -#define C_030F0C_COUNT_HI 0x80000000 -#define R_008F0C_SQ_BUF_RSRC_WORD3 0x008F0C -#define S_008F0C_DST_SEL_X(x) (((unsigned)(x) & 0x07) << 0) -#define G_008F0C_DST_SEL_X(x) (((x) >> 0) & 0x07) -#define C_008F0C_DST_SEL_X 0xFFFFFFF8 -#define V_008F0C_SQ_SEL_0 0x00 -#define V_008F0C_SQ_SEL_1 0x01 -#define V_008F0C_SQ_SEL_RESERVED_0 0x02 -#define V_008F0C_SQ_SEL_RESERVED_1 0x03 -#define V_008F0C_SQ_SEL_X 0x04 -#define V_008F0C_SQ_SEL_Y 0x05 -#define V_008F0C_SQ_SEL_Z 0x06 -#define V_008F0C_SQ_SEL_W 0x07 -#define S_008F0C_DST_SEL_Y(x) (((unsigned)(x) & 0x07) << 3) -#define G_008F0C_DST_SEL_Y(x) (((x) >> 3) & 0x07) -#define C_008F0C_DST_SEL_Y 0xFFFFFFC7 -#define V_008F0C_SQ_SEL_0 0x00 -#define V_008F0C_SQ_SEL_1 0x01 -#define V_008F0C_SQ_SEL_RESERVED_0 0x02 -#define V_008F0C_SQ_SEL_RESERVED_1 0x03 -#define V_008F0C_SQ_SEL_X 0x04 -#define V_008F0C_SQ_SEL_Y 0x05 -#define V_008F0C_SQ_SEL_Z 0x06 -#define V_008F0C_SQ_SEL_W 0x07 -#define S_008F0C_DST_SEL_Z(x) (((unsigned)(x) & 0x07) << 6) -#define G_008F0C_DST_SEL_Z(x) (((x) >> 6) & 0x07) -#define C_008F0C_DST_SEL_Z 0xFFFFFE3F -#define V_008F0C_SQ_SEL_0 0x00 -#define V_008F0C_SQ_SEL_1 0x01 -#define V_008F0C_SQ_SEL_RESERVED_0 0x02 -#define V_008F0C_SQ_SEL_RESERVED_1 0x03 -#define V_008F0C_SQ_SEL_X 0x04 -#define V_008F0C_SQ_SEL_Y 0x05 -#define V_008F0C_SQ_SEL_Z 0x06 -#define V_008F0C_SQ_SEL_W 0x07 -#define S_008F0C_DST_SEL_W(x) (((unsigned)(x) & 0x07) << 9) -#define G_008F0C_DST_SEL_W(x) (((x) >> 9) & 0x07) -#define C_008F0C_DST_SEL_W 0xFFFFF1FF -#define V_008F0C_SQ_SEL_0 0x00 -#define V_008F0C_SQ_SEL_1 0x01 -#define V_008F0C_SQ_SEL_RESERVED_0 0x02 -#define V_008F0C_SQ_SEL_RESERVED_1 0x03 -#define V_008F0C_SQ_SEL_X 0x04 -#define V_008F0C_SQ_SEL_Y 0x05 -#define V_008F0C_SQ_SEL_Z 0x06 -#define V_008F0C_SQ_SEL_W 0x07 -#define S_008F0C_NUM_FORMAT(x) (((unsigned)(x) & 0x07) << 12) -#define G_008F0C_NUM_FORMAT(x) (((x) >> 12) & 0x07) -#define C_008F0C_NUM_FORMAT 0xFFFF8FFF -#define V_008F0C_BUF_NUM_FORMAT_UNORM 0x00 -#define V_008F0C_BUF_NUM_FORMAT_SNORM 0x01 -#define V_008F0C_BUF_NUM_FORMAT_USCALED 0x02 -#define V_008F0C_BUF_NUM_FORMAT_SSCALED 0x03 -#define V_008F0C_BUF_NUM_FORMAT_UINT 0x04 -#define V_008F0C_BUF_NUM_FORMAT_SINT 0x05 -#define V_008F0C_BUF_NUM_FORMAT_SNORM_OGL 0x06 -#define V_008F0C_BUF_NUM_FORMAT_FLOAT 0x07 -#define S_008F0C_DATA_FORMAT(x) (((unsigned)(x) & 0x0F) << 15) -#define G_008F0C_DATA_FORMAT(x) (((x) >> 15) & 0x0F) -#define C_008F0C_DATA_FORMAT 0xFFF87FFF -#define V_008F0C_BUF_DATA_FORMAT_INVALID 0x00 -#define V_008F0C_BUF_DATA_FORMAT_8 0x01 -#define V_008F0C_BUF_DATA_FORMAT_16 0x02 -#define V_008F0C_BUF_DATA_FORMAT_8_8 0x03 -#define V_008F0C_BUF_DATA_FORMAT_32 0x04 -#define V_008F0C_BUF_DATA_FORMAT_16_16 0x05 -#define V_008F0C_BUF_DATA_FORMAT_10_11_11 0x06 -#define V_008F0C_BUF_DATA_FORMAT_11_11_10 0x07 -#define V_008F0C_BUF_DATA_FORMAT_10_10_10_2 0x08 -#define V_008F0C_BUF_DATA_FORMAT_2_10_10_10 0x09 -#define V_008F0C_BUF_DATA_FORMAT_8_8_8_8 0x0A -#define V_008F0C_BUF_DATA_FORMAT_32_32 0x0B -#define V_008F0C_BUF_DATA_FORMAT_16_16_16_16 0x0C -#define V_008F0C_BUF_DATA_FORMAT_32_32_32 0x0D -#define V_008F0C_BUF_DATA_FORMAT_32_32_32_32 0x0E -#define V_008F0C_BUF_DATA_FORMAT_RESERVED_15 0x0F -#define S_008F0C_ELEMENT_SIZE(x) (((unsigned)(x) & 0x03) << 19) -#define G_008F0C_ELEMENT_SIZE(x) (((x) >> 19) & 0x03) -#define C_008F0C_ELEMENT_SIZE 0xFFE7FFFF -#define S_008F0C_INDEX_STRIDE(x) (((unsigned)(x) & 0x03) << 21) -#define G_008F0C_INDEX_STRIDE(x) (((x) >> 21) & 0x03) -#define C_008F0C_INDEX_STRIDE 0xFF9FFFFF -#define S_008F0C_ADD_TID_ENABLE(x) (((unsigned)(x) & 0x1) << 23) -#define G_008F0C_ADD_TID_ENABLE(x) (((x) >> 23) & 0x1) -#define C_008F0C_ADD_TID_ENABLE 0xFF7FFFFF -/* CIK */ -#define S_008F0C_ATC(x) (((unsigned)(x) & 0x1) << 24) -#define G_008F0C_ATC(x) (((x) >> 24) & 0x1) -#define C_008F0C_ATC 0xFEFFFFFF -/* */ -#define S_008F0C_HASH_ENABLE(x) (((unsigned)(x) & 0x1) << 25) -#define G_008F0C_HASH_ENABLE(x) (((x) >> 25) & 0x1) -#define C_008F0C_HASH_ENABLE 0xFDFFFFFF -#define S_008F0C_HEAP(x) (((unsigned)(x) & 0x1) << 26) -#define G_008F0C_HEAP(x) (((x) >> 26) & 0x1) -#define C_008F0C_HEAP 0xFBFFFFFF -/* CIK */ -#define S_008F0C_MTYPE(x) (((unsigned)(x) & 0x07) << 27) -#define G_008F0C_MTYPE(x) (((x) >> 27) & 0x07) -#define C_008F0C_MTYPE 0xC7FFFFFF -/* */ -#define S_008F0C_TYPE(x) (((unsigned)(x) & 0x03) << 30) -#define G_008F0C_TYPE(x) (((x) >> 30) & 0x03) -#define C_008F0C_TYPE 0x3FFFFFFF -#define V_008F0C_SQ_RSRC_BUF 0x00 -#define V_008F0C_SQ_RSRC_BUF_RSVD_1 0x01 -#define V_008F0C_SQ_RSRC_BUF_RSVD_2 0x02 -#define V_008F0C_SQ_RSRC_BUF_RSVD_3 0x03 -#define R_030F10_DB_OCCLUSION_COUNT2_LOW 0x030F10 -#define R_008F10_SQ_IMG_RSRC_WORD0 0x008F10 -#define R_030F14_DB_OCCLUSION_COUNT2_HI 0x030F14 -#define S_030F14_COUNT_HI(x) (((unsigned)(x) & 0x7FFFFFFF) << 0) -#define G_030F14_COUNT_HI(x) (((x) >> 0) & 0x7FFFFFFF) -#define C_030F14_COUNT_HI 0x80000000 -#define R_008F14_SQ_IMG_RSRC_WORD1 0x008F14 -#define S_008F14_BASE_ADDRESS_HI(x) (((unsigned)(x) & 0xFF) << 0) -#define G_008F14_BASE_ADDRESS_HI(x) (((x) >> 0) & 0xFF) -#define C_008F14_BASE_ADDRESS_HI 0xFFFFFF00 -#define S_008F14_MIN_LOD(x) (((unsigned)(x) & 0xFFF) << 8) -#define G_008F14_MIN_LOD(x) (((x) >> 8) & 0xFFF) -#define C_008F14_MIN_LOD 0xFFF000FF -#define S_008F14_DATA_FORMAT(x) (((unsigned)(x) & 0x3F) << 20) -#define G_008F14_DATA_FORMAT(x) (((x) >> 20) & 0x3F) -#define C_008F14_DATA_FORMAT 0xFC0FFFFF -#define V_008F14_IMG_DATA_FORMAT_INVALID 0x00 -#define V_008F14_IMG_DATA_FORMAT_8 0x01 -#define V_008F14_IMG_DATA_FORMAT_16 0x02 -#define V_008F14_IMG_DATA_FORMAT_8_8 0x03 -#define V_008F14_IMG_DATA_FORMAT_32 0x04 -#define V_008F14_IMG_DATA_FORMAT_16_16 0x05 -#define V_008F14_IMG_DATA_FORMAT_10_11_11 0x06 -#define V_008F14_IMG_DATA_FORMAT_11_11_10 0x07 -#define V_008F14_IMG_DATA_FORMAT_10_10_10_2 0x08 -#define V_008F14_IMG_DATA_FORMAT_2_10_10_10 0x09 -#define V_008F14_IMG_DATA_FORMAT_8_8_8_8 0x0A -#define V_008F14_IMG_DATA_FORMAT_32_32 0x0B -#define V_008F14_IMG_DATA_FORMAT_16_16_16_16 0x0C -#define V_008F14_IMG_DATA_FORMAT_32_32_32 0x0D -#define V_008F14_IMG_DATA_FORMAT_32_32_32_32 0x0E -#define V_008F14_IMG_DATA_FORMAT_RESERVED_15 0x0F -#define V_008F14_IMG_DATA_FORMAT_5_6_5 0x10 -#define V_008F14_IMG_DATA_FORMAT_1_5_5_5 0x11 -#define V_008F14_IMG_DATA_FORMAT_5_5_5_1 0x12 -#define V_008F14_IMG_DATA_FORMAT_4_4_4_4 0x13 -#define V_008F14_IMG_DATA_FORMAT_8_24 0x14 -#define V_008F14_IMG_DATA_FORMAT_24_8 0x15 -#define V_008F14_IMG_DATA_FORMAT_X24_8_32 0x16 -#define V_008F14_IMG_DATA_FORMAT_8_AS_8_8_8_8 0x17 /* stoney+ */ -#define V_008F14_IMG_DATA_FORMAT_ETC2_RGB 0x18 /* stoney+ */ -#define V_008F14_IMG_DATA_FORMAT_ETC2_RGBA 0x19 /* stoney+ */ -#define V_008F14_IMG_DATA_FORMAT_ETC2_R 0x1A /* stoney+ */ -#define V_008F14_IMG_DATA_FORMAT_ETC2_RG 0x1B /* stoney+ */ -#define V_008F14_IMG_DATA_FORMAT_ETC2_RGBA1 0x1C /* stoney+ */ -#define V_008F14_IMG_DATA_FORMAT_RESERVED_29 0x1D -#define V_008F14_IMG_DATA_FORMAT_RESERVED_30 0x1E -#define V_008F14_IMG_DATA_FORMAT_RESERVED_31 0x1F -#define V_008F14_IMG_DATA_FORMAT_GB_GR 0x20 -#define V_008F14_IMG_DATA_FORMAT_BG_RG 0x21 -#define V_008F14_IMG_DATA_FORMAT_5_9_9_9 0x22 -#define V_008F14_IMG_DATA_FORMAT_BC1 0x23 -#define V_008F14_IMG_DATA_FORMAT_BC2 0x24 -#define V_008F14_IMG_DATA_FORMAT_BC3 0x25 -#define V_008F14_IMG_DATA_FORMAT_BC4 0x26 -#define V_008F14_IMG_DATA_FORMAT_BC5 0x27 -#define V_008F14_IMG_DATA_FORMAT_BC6 0x28 -#define V_008F14_IMG_DATA_FORMAT_BC7 0x29 -#define V_008F14_IMG_DATA_FORMAT_16_AS_16_16_16_16 0x2A /* stoney+ */ -#define V_008F14_IMG_DATA_FORMAT_16_AS_32_32_32_32 0x2B /* stoney+ */ -#define V_008F14_IMG_DATA_FORMAT_FMASK8_S2_F1 0x2C -#define V_008F14_IMG_DATA_FORMAT_FMASK8_S4_F1 0x2D -#define V_008F14_IMG_DATA_FORMAT_FMASK8_S8_F1 0x2E -#define V_008F14_IMG_DATA_FORMAT_FMASK8_S2_F2 0x2F -#define V_008F14_IMG_DATA_FORMAT_FMASK8_S4_F2 0x30 -#define V_008F14_IMG_DATA_FORMAT_FMASK8_S4_F4 0x31 -#define V_008F14_IMG_DATA_FORMAT_FMASK16_S16_F1 0x32 -#define V_008F14_IMG_DATA_FORMAT_FMASK16_S8_F2 0x33 -#define V_008F14_IMG_DATA_FORMAT_FMASK32_S16_F2 0x34 -#define V_008F14_IMG_DATA_FORMAT_FMASK32_S8_F4 0x35 -#define V_008F14_IMG_DATA_FORMAT_FMASK32_S8_F8 0x36 -#define V_008F14_IMG_DATA_FORMAT_FMASK64_S16_F4 0x37 -#define V_008F14_IMG_DATA_FORMAT_FMASK64_S16_F8 0x38 -#define V_008F14_IMG_DATA_FORMAT_4_4 0x39 -#define V_008F14_IMG_DATA_FORMAT_6_5_5 0x3A -#define V_008F14_IMG_DATA_FORMAT_1 0x3B -#define V_008F14_IMG_DATA_FORMAT_1_REVERSED 0x3C -#define V_008F14_IMG_DATA_FORMAT_32_AS_8 0x3D /* not on stoney */ -#define V_008F14_IMG_DATA_FORMAT_32_AS_8_8 0x3E /* not on stoney */ -#define V_008F14_IMG_DATA_FORMAT_32_AS_32_32_32_32 0x3F -#define S_008F14_NUM_FORMAT(x) (((unsigned)(x) & 0x0F) << 26) -#define G_008F14_NUM_FORMAT(x) (((x) >> 26) & 0x0F) -#define C_008F14_NUM_FORMAT 0xC3FFFFFF -#define V_008F14_IMG_NUM_FORMAT_UNORM 0x00 -#define V_008F14_IMG_NUM_FORMAT_SNORM 0x01 -#define V_008F14_IMG_NUM_FORMAT_USCALED 0x02 -#define V_008F14_IMG_NUM_FORMAT_SSCALED 0x03 -#define V_008F14_IMG_NUM_FORMAT_UINT 0x04 -#define V_008F14_IMG_NUM_FORMAT_SINT 0x05 -#define V_008F14_IMG_NUM_FORMAT_SNORM_OGL 0x06 -#define V_008F14_IMG_NUM_FORMAT_FLOAT 0x07 -#define V_008F14_IMG_NUM_FORMAT_RESERVED_8 0x08 -#define V_008F14_IMG_NUM_FORMAT_SRGB 0x09 -#define V_008F14_IMG_NUM_FORMAT_UBNORM 0x0A -#define V_008F14_IMG_NUM_FORMAT_UBNORM_OGL 0x0B -#define V_008F14_IMG_NUM_FORMAT_UBINT 0x0C -#define V_008F14_IMG_NUM_FORMAT_UBSCALED 0x0D -#define V_008F14_IMG_NUM_FORMAT_RESERVED_14 0x0E -#define V_008F14_IMG_NUM_FORMAT_RESERVED_15 0x0F -/* CIK */ -#define S_008F14_MTYPE(x) (((unsigned)(x) & 0x03) << 30) -#define G_008F14_MTYPE(x) (((x) >> 30) & 0x03) -#define C_008F14_MTYPE 0x3FFFFFFF -/* */ -#define R_030F18_DB_OCCLUSION_COUNT3_LOW 0x030F18 -#define R_008F18_SQ_IMG_RSRC_WORD2 0x008F18 -#define S_008F18_WIDTH(x) (((unsigned)(x) & 0x3FFF) << 0) -#define G_008F18_WIDTH(x) (((x) >> 0) & 0x3FFF) -#define C_008F18_WIDTH 0xFFFFC000 -#define S_008F18_HEIGHT(x) (((unsigned)(x) & 0x3FFF) << 14) -#define G_008F18_HEIGHT(x) (((x) >> 14) & 0x3FFF) -#define C_008F18_HEIGHT 0xF0003FFF -#define S_008F18_PERF_MOD(x) (((unsigned)(x) & 0x07) << 28) -#define G_008F18_PERF_MOD(x) (((x) >> 28) & 0x07) -#define C_008F18_PERF_MOD 0x8FFFFFFF -#define S_008F18_INTERLACED(x) (((unsigned)(x) & 0x1) << 31) -#define G_008F18_INTERLACED(x) (((x) >> 31) & 0x1) -#define C_008F18_INTERLACED 0x7FFFFFFF -#define R_030F1C_DB_OCCLUSION_COUNT3_HI 0x030F1C -#define S_030F1C_COUNT_HI(x) (((unsigned)(x) & 0x7FFFFFFF) << 0) -#define G_030F1C_COUNT_HI(x) (((x) >> 0) & 0x7FFFFFFF) -#define C_030F1C_COUNT_HI 0x80000000 -#define R_008F1C_SQ_IMG_RSRC_WORD3 0x008F1C -#define S_008F1C_DST_SEL_X(x) (((unsigned)(x) & 0x07) << 0) -#define G_008F1C_DST_SEL_X(x) (((x) >> 0) & 0x07) -#define C_008F1C_DST_SEL_X 0xFFFFFFF8 -#define V_008F1C_SQ_SEL_0 0x00 -#define V_008F1C_SQ_SEL_1 0x01 -#define V_008F1C_SQ_SEL_RESERVED_0 0x02 -#define V_008F1C_SQ_SEL_RESERVED_1 0x03 -#define V_008F1C_SQ_SEL_X 0x04 -#define V_008F1C_SQ_SEL_Y 0x05 -#define V_008F1C_SQ_SEL_Z 0x06 -#define V_008F1C_SQ_SEL_W 0x07 -#define S_008F1C_DST_SEL_Y(x) (((unsigned)(x) & 0x07) << 3) -#define G_008F1C_DST_SEL_Y(x) (((x) >> 3) & 0x07) -#define C_008F1C_DST_SEL_Y 0xFFFFFFC7 -#define V_008F1C_SQ_SEL_0 0x00 -#define V_008F1C_SQ_SEL_1 0x01 -#define V_008F1C_SQ_SEL_RESERVED_0 0x02 -#define V_008F1C_SQ_SEL_RESERVED_1 0x03 -#define V_008F1C_SQ_SEL_X 0x04 -#define V_008F1C_SQ_SEL_Y 0x05 -#define V_008F1C_SQ_SEL_Z 0x06 -#define V_008F1C_SQ_SEL_W 0x07 -#define S_008F1C_DST_SEL_Z(x) (((unsigned)(x) & 0x07) << 6) -#define G_008F1C_DST_SEL_Z(x) (((x) >> 6) & 0x07) -#define C_008F1C_DST_SEL_Z 0xFFFFFE3F -#define V_008F1C_SQ_SEL_0 0x00 -#define V_008F1C_SQ_SEL_1 0x01 -#define V_008F1C_SQ_SEL_RESERVED_0 0x02 -#define V_008F1C_SQ_SEL_RESERVED_1 0x03 -#define V_008F1C_SQ_SEL_X 0x04 -#define V_008F1C_SQ_SEL_Y 0x05 -#define V_008F1C_SQ_SEL_Z 0x06 -#define V_008F1C_SQ_SEL_W 0x07 -#define S_008F1C_DST_SEL_W(x) (((unsigned)(x) & 0x07) << 9) -#define G_008F1C_DST_SEL_W(x) (((x) >> 9) & 0x07) -#define C_008F1C_DST_SEL_W 0xFFFFF1FF -#define V_008F1C_SQ_SEL_0 0x00 -#define V_008F1C_SQ_SEL_1 0x01 -#define V_008F1C_SQ_SEL_RESERVED_0 0x02 -#define V_008F1C_SQ_SEL_RESERVED_1 0x03 -#define V_008F1C_SQ_SEL_X 0x04 -#define V_008F1C_SQ_SEL_Y 0x05 -#define V_008F1C_SQ_SEL_Z 0x06 -#define V_008F1C_SQ_SEL_W 0x07 -#define S_008F1C_BASE_LEVEL(x) (((unsigned)(x) & 0x0F) << 12) -#define G_008F1C_BASE_LEVEL(x) (((x) >> 12) & 0x0F) -#define C_008F1C_BASE_LEVEL 0xFFFF0FFF -#define S_008F1C_LAST_LEVEL(x) (((unsigned)(x) & 0x0F) << 16) -#define G_008F1C_LAST_LEVEL(x) (((x) >> 16) & 0x0F) -#define C_008F1C_LAST_LEVEL 0xFFF0FFFF -#define S_008F1C_TILING_INDEX(x) (((unsigned)(x) & 0x1F) << 20) -#define G_008F1C_TILING_INDEX(x) (((x) >> 20) & 0x1F) -#define C_008F1C_TILING_INDEX 0xFE0FFFFF -#define S_008F1C_POW2_PAD(x) (((unsigned)(x) & 0x1) << 25) -#define G_008F1C_POW2_PAD(x) (((x) >> 25) & 0x1) -#define C_008F1C_POW2_PAD 0xFDFFFFFF -/* CIK */ -#define S_008F1C_MTYPE(x) (((unsigned)(x) & 0x1) << 26) -#define G_008F1C_MTYPE(x) (((x) >> 26) & 0x1) -#define C_008F1C_MTYPE 0xFBFFFFFF -#define S_008F1C_ATC(x) (((unsigned)(x) & 0x1) << 27) -#define G_008F1C_ATC(x) (((x) >> 27) & 0x1) -#define C_008F1C_ATC 0xF7FFFFFF -/* */ -#define S_008F1C_TYPE(x) (((unsigned)(x) & 0x0F) << 28) -#define G_008F1C_TYPE(x) (((x) >> 28) & 0x0F) -#define C_008F1C_TYPE 0x0FFFFFFF -#define V_008F1C_SQ_RSRC_IMG_RSVD_0 0x00 -#define V_008F1C_SQ_RSRC_IMG_RSVD_1 0x01 -#define V_008F1C_SQ_RSRC_IMG_RSVD_2 0x02 -#define V_008F1C_SQ_RSRC_IMG_RSVD_3 0x03 -#define V_008F1C_SQ_RSRC_IMG_RSVD_4 0x04 -#define V_008F1C_SQ_RSRC_IMG_RSVD_5 0x05 -#define V_008F1C_SQ_RSRC_IMG_RSVD_6 0x06 -#define V_008F1C_SQ_RSRC_IMG_RSVD_7 0x07 -#define V_008F1C_SQ_RSRC_IMG_1D 0x08 -#define V_008F1C_SQ_RSRC_IMG_2D 0x09 -#define V_008F1C_SQ_RSRC_IMG_3D 0x0A -#define V_008F1C_SQ_RSRC_IMG_CUBE 0x0B -#define V_008F1C_SQ_RSRC_IMG_1D_ARRAY 0x0C -#define V_008F1C_SQ_RSRC_IMG_2D_ARRAY 0x0D -#define V_008F1C_SQ_RSRC_IMG_2D_MSAA 0x0E -#define V_008F1C_SQ_RSRC_IMG_2D_MSAA_ARRAY 0x0F -#define R_008F20_SQ_IMG_RSRC_WORD4 0x008F20 -#define S_008F20_DEPTH(x) (((unsigned)(x) & 0x1FFF) << 0) -#define G_008F20_DEPTH(x) (((x) >> 0) & 0x1FFF) -#define C_008F20_DEPTH 0xFFFFE000 -#define S_008F20_PITCH(x) (((unsigned)(x) & 0x3FFF) << 13) -#define G_008F20_PITCH(x) (((x) >> 13) & 0x3FFF) -#define C_008F20_PITCH 0xF8001FFF -#define R_008F24_SQ_IMG_RSRC_WORD5 0x008F24 -#define S_008F24_BASE_ARRAY(x) (((unsigned)(x) & 0x1FFF) << 0) -#define G_008F24_BASE_ARRAY(x) (((x) >> 0) & 0x1FFF) -#define C_008F24_BASE_ARRAY 0xFFFFE000 -#define S_008F24_LAST_ARRAY(x) (((unsigned)(x) & 0x1FFF) << 13) -#define G_008F24_LAST_ARRAY(x) (((x) >> 13) & 0x1FFF) -#define C_008F24_LAST_ARRAY 0xFC001FFF -#define R_008F28_SQ_IMG_RSRC_WORD6 0x008F28 -#define S_008F28_MIN_LOD_WARN(x) (((unsigned)(x) & 0xFFF) << 0) -#define G_008F28_MIN_LOD_WARN(x) (((x) >> 0) & 0xFFF) -#define C_008F28_MIN_LOD_WARN 0xFFFFF000 -/* CIK */ -#define S_008F28_COUNTER_BANK_ID(x) (((unsigned)(x) & 0xFF) << 12) -#define G_008F28_COUNTER_BANK_ID(x) (((x) >> 12) & 0xFF) -#define C_008F28_COUNTER_BANK_ID 0xFFF00FFF -#define S_008F28_LOD_HDW_CNT_EN(x) (((unsigned)(x) & 0x1) << 20) -#define G_008F28_LOD_HDW_CNT_EN(x) (((x) >> 20) & 0x1) -#define C_008F28_LOD_HDW_CNT_EN 0xFFEFFFFF -/* */ -/* VI */ -#define S_008F28_COMPRESSION_EN(x) (((unsigned)(x) & 0x1) << 21) -#define G_008F28_COMPRESSION_EN(x) (((x) >> 21) & 0x1) -#define C_008F28_COMPRESSION_EN 0xFFDFFFFF -#define S_008F28_ALPHA_IS_ON_MSB(x) (((unsigned)(x) & 0x1) << 22) -#define G_008F28_ALPHA_IS_ON_MSB(x) (((x) >> 22) & 0x1) -#define C_008F28_ALPHA_IS_ON_MSB 0xFFBFFFFF -#define S_008F28_COLOR_TRANSFORM(x) (((unsigned)(x) & 0x1) << 23) -#define G_008F28_COLOR_TRANSFORM(x) (((x) >> 23) & 0x1) -#define C_008F28_COLOR_TRANSFORM 0xFF7FFFFF -#define S_008F28_LOST_ALPHA_BITS(x) (((unsigned)(x) & 0x0F) << 24) -#define G_008F28_LOST_ALPHA_BITS(x) (((x) >> 24) & 0x0F) -#define C_008F28_LOST_ALPHA_BITS 0xF0FFFFFF -#define S_008F28_LOST_COLOR_BITS(x) (((unsigned)(x) & 0x0F) << 28) -#define G_008F28_LOST_COLOR_BITS(x) (((x) >> 28) & 0x0F) -#define C_008F28_LOST_COLOR_BITS 0x0FFFFFFF -/* */ -#define R_008F2C_SQ_IMG_RSRC_WORD7 0x008F2C -#define R_008F30_SQ_IMG_SAMP_WORD0 0x008F30 -#define S_008F30_CLAMP_X(x) (((unsigned)(x) & 0x07) << 0) -#define G_008F30_CLAMP_X(x) (((x) >> 0) & 0x07) -#define C_008F30_CLAMP_X 0xFFFFFFF8 -#define V_008F30_SQ_TEX_WRAP 0x00 -#define V_008F30_SQ_TEX_MIRROR 0x01 -#define V_008F30_SQ_TEX_CLAMP_LAST_TEXEL 0x02 -#define V_008F30_SQ_TEX_MIRROR_ONCE_LAST_TEXEL 0x03 -#define V_008F30_SQ_TEX_CLAMP_HALF_BORDER 0x04 -#define V_008F30_SQ_TEX_MIRROR_ONCE_HALF_BORDER 0x05 -#define V_008F30_SQ_TEX_CLAMP_BORDER 0x06 -#define V_008F30_SQ_TEX_MIRROR_ONCE_BORDER 0x07 -#define S_008F30_CLAMP_Y(x) (((unsigned)(x) & 0x07) << 3) -#define G_008F30_CLAMP_Y(x) (((x) >> 3) & 0x07) -#define C_008F30_CLAMP_Y 0xFFFFFFC7 -#define V_008F30_SQ_TEX_WRAP 0x00 -#define V_008F30_SQ_TEX_MIRROR 0x01 -#define V_008F30_SQ_TEX_CLAMP_LAST_TEXEL 0x02 -#define V_008F30_SQ_TEX_MIRROR_ONCE_LAST_TEXEL 0x03 -#define V_008F30_SQ_TEX_CLAMP_HALF_BORDER 0x04 -#define V_008F30_SQ_TEX_MIRROR_ONCE_HALF_BORDER 0x05 -#define V_008F30_SQ_TEX_CLAMP_BORDER 0x06 -#define V_008F30_SQ_TEX_MIRROR_ONCE_BORDER 0x07 -#define S_008F30_CLAMP_Z(x) (((unsigned)(x) & 0x07) << 6) -#define G_008F30_CLAMP_Z(x) (((x) >> 6) & 0x07) -#define C_008F30_CLAMP_Z 0xFFFFFE3F -#define V_008F30_SQ_TEX_WRAP 0x00 -#define V_008F30_SQ_TEX_MIRROR 0x01 -#define V_008F30_SQ_TEX_CLAMP_LAST_TEXEL 0x02 -#define V_008F30_SQ_TEX_MIRROR_ONCE_LAST_TEXEL 0x03 -#define V_008F30_SQ_TEX_CLAMP_HALF_BORDER 0x04 -#define V_008F30_SQ_TEX_MIRROR_ONCE_HALF_BORDER 0x05 -#define V_008F30_SQ_TEX_CLAMP_BORDER 0x06 -#define V_008F30_SQ_TEX_MIRROR_ONCE_BORDER 0x07 -#define S_008F30_MAX_ANISO_RATIO(x) (((unsigned)(x) & 0x07) << 9) -#define G_008F30_MAX_ANISO_RATIO(x) (((x) >> 9) & 0x07) -#define C_008F30_MAX_ANISO_RATIO 0xFFFFF1FF -#define S_008F30_DEPTH_COMPARE_FUNC(x) (((unsigned)(x) & 0x07) << 12) -#define G_008F30_DEPTH_COMPARE_FUNC(x) (((x) >> 12) & 0x07) -#define C_008F30_DEPTH_COMPARE_FUNC 0xFFFF8FFF -#define V_008F30_SQ_TEX_DEPTH_COMPARE_NEVER 0x00 -#define V_008F30_SQ_TEX_DEPTH_COMPARE_LESS 0x01 -#define V_008F30_SQ_TEX_DEPTH_COMPARE_EQUAL 0x02 -#define V_008F30_SQ_TEX_DEPTH_COMPARE_LESSEQUAL 0x03 -#define V_008F30_SQ_TEX_DEPTH_COMPARE_GREATER 0x04 -#define V_008F30_SQ_TEX_DEPTH_COMPARE_NOTEQUAL 0x05 -#define V_008F30_SQ_TEX_DEPTH_COMPARE_GREATEREQUAL 0x06 -#define V_008F30_SQ_TEX_DEPTH_COMPARE_ALWAYS 0x07 -#define S_008F30_FORCE_UNNORMALIZED(x) (((unsigned)(x) & 0x1) << 15) -#define G_008F30_FORCE_UNNORMALIZED(x) (((x) >> 15) & 0x1) -#define C_008F30_FORCE_UNNORMALIZED 0xFFFF7FFF -#define S_008F30_MC_COORD_TRUNC(x) (((unsigned)(x) & 0x1) << 19) -#define G_008F30_MC_COORD_TRUNC(x) (((x) >> 19) & 0x1) -#define C_008F30_MC_COORD_TRUNC 0xFFF7FFFF -#define S_008F30_FORCE_DEGAMMA(x) (((unsigned)(x) & 0x1) << 20) -#define G_008F30_FORCE_DEGAMMA(x) (((x) >> 20) & 0x1) -#define C_008F30_FORCE_DEGAMMA 0xFFEFFFFF -#define S_008F30_TRUNC_COORD(x) (((unsigned)(x) & 0x1) << 27) -#define G_008F30_TRUNC_COORD(x) (((x) >> 27) & 0x1) -#define C_008F30_TRUNC_COORD 0xF7FFFFFF -#define S_008F30_DISABLE_CUBE_WRAP(x) (((unsigned)(x) & 0x1) << 28) -#define G_008F30_DISABLE_CUBE_WRAP(x) (((x) >> 28) & 0x1) -#define C_008F30_DISABLE_CUBE_WRAP 0xEFFFFFFF -#define S_008F30_FILTER_MODE(x) (((unsigned)(x) & 0x03) << 29) -#define G_008F30_FILTER_MODE(x) (((x) >> 29) & 0x03) -#define C_008F30_FILTER_MODE 0x9FFFFFFF -/* VI */ -#define S_008F30_COMPAT_MODE(x) (((unsigned)(x) & 0x1) << 31) -#define G_008F30_COMPAT_MODE(x) (((x) >> 31) & 0x1) -#define C_008F30_COMPAT_MODE 0x7FFFFFFF -/* */ -#define R_008F34_SQ_IMG_SAMP_WORD1 0x008F34 -#define S_008F34_MIN_LOD(x) (((unsigned)(x) & 0xFFF) << 0) -#define G_008F34_MIN_LOD(x) (((x) >> 0) & 0xFFF) -#define C_008F34_MIN_LOD 0xFFFFF000 -#define S_008F34_MAX_LOD(x) (((unsigned)(x) & 0xFFF) << 12) -#define G_008F34_MAX_LOD(x) (((x) >> 12) & 0xFFF) -#define C_008F34_MAX_LOD 0xFF000FFF -#define S_008F34_PERF_MIP(x) (((unsigned)(x) & 0x0F) << 24) -#define G_008F34_PERF_MIP(x) (((x) >> 24) & 0x0F) -#define C_008F34_PERF_MIP 0xF0FFFFFF -#define S_008F34_PERF_Z(x) (((unsigned)(x) & 0x0F) << 28) -#define G_008F34_PERF_Z(x) (((x) >> 28) & 0x0F) -#define C_008F34_PERF_Z 0x0FFFFFFF -#define R_008F38_SQ_IMG_SAMP_WORD2 0x008F38 -#define S_008F38_LOD_BIAS(x) (((unsigned)(x) & 0x3FFF) << 0) -#define G_008F38_LOD_BIAS(x) (((x) >> 0) & 0x3FFF) -#define C_008F38_LOD_BIAS 0xFFFFC000 -#define S_008F38_LOD_BIAS_SEC(x) (((unsigned)(x) & 0x3F) << 14) -#define G_008F38_LOD_BIAS_SEC(x) (((x) >> 14) & 0x3F) -#define C_008F38_LOD_BIAS_SEC 0xFFF03FFF -#define S_008F38_XY_MAG_FILTER(x) (((unsigned)(x) & 0x03) << 20) -#define G_008F38_XY_MAG_FILTER(x) (((x) >> 20) & 0x03) -#define C_008F38_XY_MAG_FILTER 0xFFCFFFFF -#define V_008F38_SQ_TEX_XY_FILTER_POINT 0x00 -#define V_008F38_SQ_TEX_XY_FILTER_BILINEAR 0x01 -#define S_008F38_XY_MIN_FILTER(x) (((unsigned)(x) & 0x03) << 22) -#define G_008F38_XY_MIN_FILTER(x) (((x) >> 22) & 0x03) -#define C_008F38_XY_MIN_FILTER 0xFF3FFFFF -#define V_008F38_SQ_TEX_XY_FILTER_POINT 0x00 -#define V_008F38_SQ_TEX_XY_FILTER_BILINEAR 0x01 -#define V_008F38_SQ_TEX_XY_FILTER_ANISO_POINT 0x02 -#define V_008F38_SQ_TEX_XY_FILTER_ANISO_BILINEAR 0x03 -#define S_008F38_Z_FILTER(x) (((unsigned)(x) & 0x03) << 24) -#define G_008F38_Z_FILTER(x) (((x) >> 24) & 0x03) -#define C_008F38_Z_FILTER 0xFCFFFFFF -#define V_008F38_SQ_TEX_Z_FILTER_NONE 0x00 -#define V_008F38_SQ_TEX_Z_FILTER_POINT 0x01 -#define V_008F38_SQ_TEX_Z_FILTER_LINEAR 0x02 -#define S_008F38_MIP_FILTER(x) (((unsigned)(x) & 0x03) << 26) -#define G_008F38_MIP_FILTER(x) (((x) >> 26) & 0x03) -#define C_008F38_MIP_FILTER 0xF3FFFFFF -#define V_008F38_SQ_TEX_Z_FILTER_NONE 0x00 -#define V_008F38_SQ_TEX_Z_FILTER_POINT 0x01 -#define V_008F38_SQ_TEX_Z_FILTER_LINEAR 0x02 -#define S_008F38_MIP_POINT_PRECLAMP(x) (((unsigned)(x) & 0x1) << 28) -#define G_008F38_MIP_POINT_PRECLAMP(x) (((x) >> 28) & 0x1) -#define C_008F38_MIP_POINT_PRECLAMP 0xEFFFFFFF -#define S_008F38_DISABLE_LSB_CEIL(x) (((unsigned)(x) & 0x1) << 29) -#define G_008F38_DISABLE_LSB_CEIL(x) (((x) >> 29) & 0x1) -#define C_008F38_DISABLE_LSB_CEIL 0xDFFFFFFF -#define S_008F38_FILTER_PREC_FIX(x) (((unsigned)(x) & 0x1) << 30) -#define G_008F38_FILTER_PREC_FIX(x) (((x) >> 30) & 0x1) -#define C_008F38_FILTER_PREC_FIX 0xBFFFFFFF -#define S_008F38_ANISO_OVERRIDE(x) (((unsigned)(x) & 0x1) << 31) -#define G_008F38_ANISO_OVERRIDE(x) (((x) >> 31) & 0x1) -#define C_008F38_ANISO_OVERRIDE 0x7FFFFFFF -#define R_008F3C_SQ_IMG_SAMP_WORD3 0x008F3C -#define S_008F3C_BORDER_COLOR_PTR(x) (((unsigned)(x) & 0xFFF) << 0) -#define G_008F3C_BORDER_COLOR_PTR(x) (((x) >> 0) & 0xFFF) -#define C_008F3C_BORDER_COLOR_PTR 0xFFFFF000 -#define S_008F3C_BORDER_COLOR_TYPE(x) (((unsigned)(x) & 0x03) << 30) -#define G_008F3C_BORDER_COLOR_TYPE(x) (((x) >> 30) & 0x03) -#define C_008F3C_BORDER_COLOR_TYPE 0x3FFFFFFF -#define V_008F3C_SQ_TEX_BORDER_COLOR_TRANS_BLACK 0x00 -#define V_008F3C_SQ_TEX_BORDER_COLOR_OPAQUE_BLACK 0x01 -#define V_008F3C_SQ_TEX_BORDER_COLOR_OPAQUE_WHITE 0x02 -#define V_008F3C_SQ_TEX_BORDER_COLOR_REGISTER 0x03 -#define R_0090DC_SPI_DYN_GPR_LOCK_EN 0x0090DC /* not on CIK */ -#define S_0090DC_VS_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 0) -#define G_0090DC_VS_LOW_THRESHOLD(x) (((x) >> 0) & 0x0F) -#define C_0090DC_VS_LOW_THRESHOLD 0xFFFFFFF0 -#define S_0090DC_GS_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 4) -#define G_0090DC_GS_LOW_THRESHOLD(x) (((x) >> 4) & 0x0F) -#define C_0090DC_GS_LOW_THRESHOLD 0xFFFFFF0F -#define S_0090DC_ES_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 8) -#define G_0090DC_ES_LOW_THRESHOLD(x) (((x) >> 8) & 0x0F) -#define C_0090DC_ES_LOW_THRESHOLD 0xFFFFF0FF -#define S_0090DC_HS_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 12) -#define G_0090DC_HS_LOW_THRESHOLD(x) (((x) >> 12) & 0x0F) -#define C_0090DC_HS_LOW_THRESHOLD 0xFFFF0FFF -#define S_0090DC_LS_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 16) -#define G_0090DC_LS_LOW_THRESHOLD(x) (((x) >> 16) & 0x0F) -#define C_0090DC_LS_LOW_THRESHOLD 0xFFF0FFFF -#define R_0090E0_SPI_STATIC_THREAD_MGMT_1 0x0090E0 /* not on CIK */ -#define S_0090E0_PS_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_0090E0_PS_CU_EN(x) (((x) >> 0) & 0xFFFF) -#define C_0090E0_PS_CU_EN 0xFFFF0000 -#define S_0090E0_VS_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 16) -#define G_0090E0_VS_CU_EN(x) (((x) >> 16) & 0xFFFF) -#define C_0090E0_VS_CU_EN 0x0000FFFF -#define R_0090E4_SPI_STATIC_THREAD_MGMT_2 0x0090E4 /* not on CIK */ -#define S_0090E4_GS_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_0090E4_GS_CU_EN(x) (((x) >> 0) & 0xFFFF) -#define C_0090E4_GS_CU_EN 0xFFFF0000 -#define S_0090E4_ES_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 16) -#define G_0090E4_ES_CU_EN(x) (((x) >> 16) & 0xFFFF) -#define C_0090E4_ES_CU_EN 0x0000FFFF -#define R_0090E8_SPI_STATIC_THREAD_MGMT_3 0x0090E8 /* not on CIK */ -#define S_0090E8_LSHS_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_0090E8_LSHS_CU_EN(x) (((x) >> 0) & 0xFFFF) -#define C_0090E8_LSHS_CU_EN 0xFFFF0000 -#define R_0090EC_SPI_PS_MAX_WAVE_ID 0x0090EC -#define S_0090EC_MAX_WAVE_ID(x) (((unsigned)(x) & 0xFFF) << 0) -#define G_0090EC_MAX_WAVE_ID(x) (((x) >> 0) & 0xFFF) -#define C_0090EC_MAX_WAVE_ID 0xFFFFF000 -/* CIK */ -#define R_0090E8_SPI_PS_MAX_WAVE_ID 0x0090E8 -#define S_0090E8_MAX_WAVE_ID(x) (((unsigned)(x) & 0xFFF) << 0) -#define G_0090E8_MAX_WAVE_ID(x) (((x) >> 0) & 0xFFF) -#define C_0090E8_MAX_WAVE_ID 0xFFFFF000 -/* */ -#define R_0090F0_SPI_ARB_PRIORITY 0x0090F0 -#define S_0090F0_RING_ORDER_TS0(x) (((unsigned)(x) & 0x07) << 0) -#define G_0090F0_RING_ORDER_TS0(x) (((x) >> 0) & 0x07) -#define C_0090F0_RING_ORDER_TS0 0xFFFFFFF8 -#define V_0090F0_X_R0 0x00 -#define S_0090F0_RING_ORDER_TS1(x) (((unsigned)(x) & 0x07) << 3) -#define G_0090F0_RING_ORDER_TS1(x) (((x) >> 3) & 0x07) -#define C_0090F0_RING_ORDER_TS1 0xFFFFFFC7 -#define S_0090F0_RING_ORDER_TS2(x) (((unsigned)(x) & 0x07) << 6) -#define G_0090F0_RING_ORDER_TS2(x) (((x) >> 6) & 0x07) -#define C_0090F0_RING_ORDER_TS2 0xFFFFFE3F -/* CIK */ -#define R_00C700_SPI_ARB_PRIORITY 0x00C700 -#define S_00C700_PIPE_ORDER_TS0(x) (((unsigned)(x) & 0x07) << 0) -#define G_00C700_PIPE_ORDER_TS0(x) (((x) >> 0) & 0x07) -#define C_00C700_PIPE_ORDER_TS0 0xFFFFFFF8 -#define S_00C700_PIPE_ORDER_TS1(x) (((unsigned)(x) & 0x07) << 3) -#define G_00C700_PIPE_ORDER_TS1(x) (((x) >> 3) & 0x07) -#define C_00C700_PIPE_ORDER_TS1 0xFFFFFFC7 -#define S_00C700_PIPE_ORDER_TS2(x) (((unsigned)(x) & 0x07) << 6) -#define G_00C700_PIPE_ORDER_TS2(x) (((x) >> 6) & 0x07) -#define C_00C700_PIPE_ORDER_TS2 0xFFFFFE3F -#define S_00C700_PIPE_ORDER_TS3(x) (((unsigned)(x) & 0x07) << 9) -#define G_00C700_PIPE_ORDER_TS3(x) (((x) >> 9) & 0x07) -#define C_00C700_PIPE_ORDER_TS3 0xFFFFF1FF -#define S_00C700_TS0_DUR_MULT(x) (((unsigned)(x) & 0x03) << 12) -#define G_00C700_TS0_DUR_MULT(x) (((x) >> 12) & 0x03) -#define C_00C700_TS0_DUR_MULT 0xFFFFCFFF -#define S_00C700_TS1_DUR_MULT(x) (((unsigned)(x) & 0x03) << 14) -#define G_00C700_TS1_DUR_MULT(x) (((x) >> 14) & 0x03) -#define C_00C700_TS1_DUR_MULT 0xFFFF3FFF -#define S_00C700_TS2_DUR_MULT(x) (((unsigned)(x) & 0x03) << 16) -#define G_00C700_TS2_DUR_MULT(x) (((x) >> 16) & 0x03) -#define C_00C700_TS2_DUR_MULT 0xFFFCFFFF -#define S_00C700_TS3_DUR_MULT(x) (((unsigned)(x) & 0x03) << 18) -#define G_00C700_TS3_DUR_MULT(x) (((x) >> 18) & 0x03) -#define C_00C700_TS3_DUR_MULT 0xFFF3FFFF -/* */ -#define R_0090F4_SPI_ARB_CYCLES_0 0x0090F4 /* moved to 0xC704 on CIK */ -#define S_0090F4_TS0_DURATION(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_0090F4_TS0_DURATION(x) (((x) >> 0) & 0xFFFF) -#define C_0090F4_TS0_DURATION 0xFFFF0000 -#define S_0090F4_TS1_DURATION(x) (((unsigned)(x) & 0xFFFF) << 16) -#define G_0090F4_TS1_DURATION(x) (((x) >> 16) & 0xFFFF) -#define C_0090F4_TS1_DURATION 0x0000FFFF -#define R_0090F8_SPI_ARB_CYCLES_1 0x0090F8 /* moved to 0xC708 on CIK */ -#define S_0090F8_TS2_DURATION(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_0090F8_TS2_DURATION(x) (((x) >> 0) & 0xFFFF) -#define C_0090F8_TS2_DURATION 0xFFFF0000 -/* CIK */ -#define R_008F40_SQ_FLAT_SCRATCH_WORD0 0x008F40 -#define S_008F40_SIZE(x) (((unsigned)(x) & 0x7FFFF) << 0) -#define G_008F40_SIZE(x) (((x) >> 0) & 0x7FFFF) -#define C_008F40_SIZE 0xFFF80000 -#define R_008F44_SQ_FLAT_SCRATCH_WORD1 0x008F44 -#define S_008F44_OFFSET(x) (((unsigned)(x) & 0xFFFFFF) << 0) -#define G_008F44_OFFSET(x) (((x) >> 0) & 0xFFFFFF) -#define C_008F44_OFFSET 0xFF000000 -/* */ -#define R_030FF8_DB_ZPASS_COUNT_LOW 0x030FF8 -#define R_030FFC_DB_ZPASS_COUNT_HI 0x030FFC -#define S_030FFC_COUNT_HI(x) (((unsigned)(x) & 0x7FFFFFFF) << 0) -#define G_030FFC_COUNT_HI(x) (((x) >> 0) & 0x7FFFFFFF) -#define C_030FFC_COUNT_HI 0x80000000 -#define R_009100_SPI_CONFIG_CNTL 0x009100 -#define S_009100_GPR_WRITE_PRIORITY(x) (((unsigned)(x) & 0x1FFFFF) << 0) -#define G_009100_GPR_WRITE_PRIORITY(x) (((x) >> 0) & 0x1FFFFF) -#define C_009100_GPR_WRITE_PRIORITY 0xFFE00000 -#define S_009100_EXP_PRIORITY_ORDER(x) (((unsigned)(x) & 0x07) << 21) -#define G_009100_EXP_PRIORITY_ORDER(x) (((x) >> 21) & 0x07) -#define C_009100_EXP_PRIORITY_ORDER 0xFF1FFFFF -#define S_009100_ENABLE_SQG_TOP_EVENTS(x) (((unsigned)(x) & 0x1) << 24) -#define G_009100_ENABLE_SQG_TOP_EVENTS(x) (((x) >> 24) & 0x1) -#define C_009100_ENABLE_SQG_TOP_EVENTS 0xFEFFFFFF -#define S_009100_ENABLE_SQG_BOP_EVENTS(x) (((unsigned)(x) & 0x1) << 25) -#define G_009100_ENABLE_SQG_BOP_EVENTS(x) (((x) >> 25) & 0x1) -#define C_009100_ENABLE_SQG_BOP_EVENTS 0xFDFFFFFF -#define S_009100_RSRC_MGMT_RESET(x) (((unsigned)(x) & 0x1) << 26) -#define G_009100_RSRC_MGMT_RESET(x) (((x) >> 26) & 0x1) -#define C_009100_RSRC_MGMT_RESET 0xFBFFFFFF -#define R_00913C_SPI_CONFIG_CNTL_1 0x00913C -#define S_00913C_VTX_DONE_DELAY(x) (((unsigned)(x) & 0x0F) << 0) -#define G_00913C_VTX_DONE_DELAY(x) (((x) >> 0) & 0x0F) -#define C_00913C_VTX_DONE_DELAY 0xFFFFFFF0 -#define V_00913C_X_DELAY_14_CLKS 0x00 -#define V_00913C_X_DELAY_16_CLKS 0x01 -#define V_00913C_X_DELAY_18_CLKS 0x02 -#define V_00913C_X_DELAY_20_CLKS 0x03 -#define V_00913C_X_DELAY_22_CLKS 0x04 -#define V_00913C_X_DELAY_24_CLKS 0x05 -#define V_00913C_X_DELAY_26_CLKS 0x06 -#define V_00913C_X_DELAY_28_CLKS 0x07 -#define V_00913C_X_DELAY_30_CLKS 0x08 -#define V_00913C_X_DELAY_32_CLKS 0x09 -#define V_00913C_X_DELAY_34_CLKS 0x0A -#define V_00913C_X_DELAY_4_CLKS 0x0B -#define V_00913C_X_DELAY_6_CLKS 0x0C -#define V_00913C_X_DELAY_8_CLKS 0x0D -#define V_00913C_X_DELAY_10_CLKS 0x0E -#define V_00913C_X_DELAY_12_CLKS 0x0F -#define S_00913C_INTERP_ONE_PRIM_PER_ROW(x) (((unsigned)(x) & 0x1) << 4) -#define G_00913C_INTERP_ONE_PRIM_PER_ROW(x) (((x) >> 4) & 0x1) -#define C_00913C_INTERP_ONE_PRIM_PER_ROW 0xFFFFFFEF -#define S_00913C_PC_LIMIT_ENABLE(x) (((unsigned)(x) & 0x1) << 6) -#define G_00913C_PC_LIMIT_ENABLE(x) (((x) >> 6) & 0x1) -#define C_00913C_PC_LIMIT_ENABLE 0xFFFFFFBF -#define S_00913C_PC_LIMIT_STRICT(x) (((unsigned)(x) & 0x1) << 7) -#define G_00913C_PC_LIMIT_STRICT(x) (((x) >> 7) & 0x1) -#define C_00913C_PC_LIMIT_STRICT 0xFFFFFF7F -#define S_00913C_PC_LIMIT_SIZE(x) (((unsigned)(x) & 0xFFFF) << 16) -#define G_00913C_PC_LIMIT_SIZE(x) (((x) >> 16) & 0xFFFF) -#define C_00913C_PC_LIMIT_SIZE 0x0000FFFF -#define R_00936C_SPI_RESOURCE_RESERVE_CU_AB_0 0x00936C -#define S_00936C_TYPE_A(x) (((unsigned)(x) & 0x0F) << 0) -#define G_00936C_TYPE_A(x) (((x) >> 0) & 0x0F) -#define C_00936C_TYPE_A 0xFFFFFFF0 -#define S_00936C_VGPR_A(x) (((unsigned)(x) & 0x07) << 4) -#define G_00936C_VGPR_A(x) (((x) >> 4) & 0x07) -#define C_00936C_VGPR_A 0xFFFFFF8F -#define S_00936C_SGPR_A(x) (((unsigned)(x) & 0x07) << 7) -#define G_00936C_SGPR_A(x) (((x) >> 7) & 0x07) -#define C_00936C_SGPR_A 0xFFFFFC7F -#define S_00936C_LDS_A(x) (((unsigned)(x) & 0x07) << 10) -#define G_00936C_LDS_A(x) (((x) >> 10) & 0x07) -#define C_00936C_LDS_A 0xFFFFE3FF -#define S_00936C_WAVES_A(x) (((unsigned)(x) & 0x03) << 13) -#define G_00936C_WAVES_A(x) (((x) >> 13) & 0x03) -#define C_00936C_WAVES_A 0xFFFF9FFF -#define S_00936C_EN_A(x) (((unsigned)(x) & 0x1) << 15) -#define G_00936C_EN_A(x) (((x) >> 15) & 0x1) -#define C_00936C_EN_A 0xFFFF7FFF -#define S_00936C_TYPE_B(x) (((unsigned)(x) & 0x0F) << 16) -#define G_00936C_TYPE_B(x) (((x) >> 16) & 0x0F) -#define C_00936C_TYPE_B 0xFFF0FFFF -#define S_00936C_VGPR_B(x) (((unsigned)(x) & 0x07) << 20) -#define G_00936C_VGPR_B(x) (((x) >> 20) & 0x07) -#define C_00936C_VGPR_B 0xFF8FFFFF -#define S_00936C_SGPR_B(x) (((unsigned)(x) & 0x07) << 23) -#define G_00936C_SGPR_B(x) (((x) >> 23) & 0x07) -#define C_00936C_SGPR_B 0xFC7FFFFF -#define S_00936C_LDS_B(x) (((unsigned)(x) & 0x07) << 26) -#define G_00936C_LDS_B(x) (((x) >> 26) & 0x07) -#define C_00936C_LDS_B 0xE3FFFFFF -#define S_00936C_WAVES_B(x) (((unsigned)(x) & 0x03) << 29) -#define G_00936C_WAVES_B(x) (((x) >> 29) & 0x03) -#define C_00936C_WAVES_B 0x9FFFFFFF -#define S_00936C_EN_B(x) (((unsigned)(x) & 0x1) << 31) -#define G_00936C_EN_B(x) (((x) >> 31) & 0x1) -#define C_00936C_EN_B 0x7FFFFFFF -#define R_00950C_TA_CS_BC_BASE_ADDR 0x00950C -#define R_009858_DB_SUBTILE_CONTROL 0x009858 -#define S_009858_MSAA1_X(x) (((unsigned)(x) & 0x03) << 0) -#define G_009858_MSAA1_X(x) (((x) >> 0) & 0x03) -#define C_009858_MSAA1_X 0xFFFFFFFC -#define S_009858_MSAA1_Y(x) (((unsigned)(x) & 0x03) << 2) -#define G_009858_MSAA1_Y(x) (((x) >> 2) & 0x03) -#define C_009858_MSAA1_Y 0xFFFFFFF3 -#define S_009858_MSAA2_X(x) (((unsigned)(x) & 0x03) << 4) -#define G_009858_MSAA2_X(x) (((x) >> 4) & 0x03) -#define C_009858_MSAA2_X 0xFFFFFFCF -#define S_009858_MSAA2_Y(x) (((unsigned)(x) & 0x03) << 6) -#define G_009858_MSAA2_Y(x) (((x) >> 6) & 0x03) -#define C_009858_MSAA2_Y 0xFFFFFF3F -#define S_009858_MSAA4_X(x) (((unsigned)(x) & 0x03) << 8) -#define G_009858_MSAA4_X(x) (((x) >> 8) & 0x03) -#define C_009858_MSAA4_X 0xFFFFFCFF -#define S_009858_MSAA4_Y(x) (((unsigned)(x) & 0x03) << 10) -#define G_009858_MSAA4_Y(x) (((x) >> 10) & 0x03) -#define C_009858_MSAA4_Y 0xFFFFF3FF -#define S_009858_MSAA8_X(x) (((unsigned)(x) & 0x03) << 12) -#define G_009858_MSAA8_X(x) (((x) >> 12) & 0x03) -#define C_009858_MSAA8_X 0xFFFFCFFF -#define S_009858_MSAA8_Y(x) (((unsigned)(x) & 0x03) << 14) -#define G_009858_MSAA8_Y(x) (((x) >> 14) & 0x03) -#define C_009858_MSAA8_Y 0xFFFF3FFF -#define S_009858_MSAA16_X(x) (((unsigned)(x) & 0x03) << 16) -#define G_009858_MSAA16_X(x) (((x) >> 16) & 0x03) -#define C_009858_MSAA16_X 0xFFFCFFFF -#define S_009858_MSAA16_Y(x) (((unsigned)(x) & 0x03) << 18) -#define G_009858_MSAA16_Y(x) (((x) >> 18) & 0x03) -#define C_009858_MSAA16_Y 0xFFF3FFFF -#define R_0098F8_GB_ADDR_CONFIG 0x0098F8 -#define S_0098F8_NUM_PIPES(x) (((unsigned)(x) & 0x07) << 0) -#define G_0098F8_NUM_PIPES(x) (((x) >> 0) & 0x07) -#define C_0098F8_NUM_PIPES 0xFFFFFFF8 -#define S_0098F8_PIPE_INTERLEAVE_SIZE(x) (((unsigned)(x) & 0x07) << 4) -#define G_0098F8_PIPE_INTERLEAVE_SIZE(x) (((x) >> 4) & 0x07) -#define C_0098F8_PIPE_INTERLEAVE_SIZE 0xFFFFFF8F -#define S_0098F8_BANK_INTERLEAVE_SIZE(x) (((unsigned)(x) & 0x07) << 8) -#define G_0098F8_BANK_INTERLEAVE_SIZE(x) (((x) >> 8) & 0x07) -#define C_0098F8_BANK_INTERLEAVE_SIZE 0xFFFFF8FF -#define S_0098F8_NUM_SHADER_ENGINES(x) (((unsigned)(x) & 0x03) << 12) -#define G_0098F8_NUM_SHADER_ENGINES(x) (((x) >> 12) & 0x03) -#define C_0098F8_NUM_SHADER_ENGINES 0xFFFFCFFF -#define S_0098F8_SHADER_ENGINE_TILE_SIZE(x) (((unsigned)(x) & 0x07) << 16) -#define G_0098F8_SHADER_ENGINE_TILE_SIZE(x) (((x) >> 16) & 0x07) -#define C_0098F8_SHADER_ENGINE_TILE_SIZE 0xFFF8FFFF -#define S_0098F8_NUM_GPUS(x) (((unsigned)(x) & 0x07) << 20) -#define G_0098F8_NUM_GPUS(x) (((x) >> 20) & 0x07) -#define C_0098F8_NUM_GPUS 0xFF8FFFFF -#define S_0098F8_MULTI_GPU_TILE_SIZE(x) (((unsigned)(x) & 0x03) << 24) -#define G_0098F8_MULTI_GPU_TILE_SIZE(x) (((x) >> 24) & 0x03) -#define C_0098F8_MULTI_GPU_TILE_SIZE 0xFCFFFFFF -#define S_0098F8_ROW_SIZE(x) (((unsigned)(x) & 0x03) << 28) -#define G_0098F8_ROW_SIZE(x) (((x) >> 28) & 0x03) -#define C_0098F8_ROW_SIZE 0xCFFFFFFF -#define S_0098F8_NUM_LOWER_PIPES(x) (((unsigned)(x) & 0x1) << 30) -#define G_0098F8_NUM_LOWER_PIPES(x) (((x) >> 30) & 0x1) -#define C_0098F8_NUM_LOWER_PIPES 0xBFFFFFFF -#define R_009910_GB_TILE_MODE0 0x009910 -#define S_009910_MICRO_TILE_MODE(x) (((unsigned)(x) & 0x03) << 0) -#define G_009910_MICRO_TILE_MODE(x) (((x) >> 0) & 0x03) -#define C_009910_MICRO_TILE_MODE 0xFFFFFFFC -#define V_009910_ADDR_SURF_DISPLAY_MICRO_TILING 0x00 -#define V_009910_ADDR_SURF_THIN_MICRO_TILING 0x01 -#define V_009910_ADDR_SURF_DEPTH_MICRO_TILING 0x02 -#define V_009910_ADDR_SURF_THICK_MICRO_TILING 0x03 -#define S_009910_ARRAY_MODE(x) (((unsigned)(x) & 0x0F) << 2) -#define G_009910_ARRAY_MODE(x) (((x) >> 2) & 0x0F) -#define C_009910_ARRAY_MODE 0xFFFFFFC3 -#define V_009910_ARRAY_LINEAR_GENERAL 0x00 -#define V_009910_ARRAY_LINEAR_ALIGNED 0x01 -#define V_009910_ARRAY_1D_TILED_THIN1 0x02 -#define V_009910_ARRAY_1D_TILED_THICK 0x03 -#define V_009910_ARRAY_2D_TILED_THIN1 0x04 -#define V_009910_ARRAY_2D_TILED_THICK 0x07 -#define V_009910_ARRAY_2D_TILED_XTHICK 0x08 -#define V_009910_ARRAY_3D_TILED_THIN1 0x0C -#define V_009910_ARRAY_3D_TILED_THICK 0x0D -#define V_009910_ARRAY_3D_TILED_XTHICK 0x0E -#define V_009910_ARRAY_POWER_SAVE 0x0F -#define S_009910_PIPE_CONFIG(x) (((unsigned)(x) & 0x1F) << 6) -#define G_009910_PIPE_CONFIG(x) (((x) >> 6) & 0x1F) -#define C_009910_PIPE_CONFIG 0xFFFFF83F -#define V_009910_ADDR_SURF_P2 0x00 -#define V_009910_ADDR_SURF_P2_RESERVED0 0x01 -#define V_009910_ADDR_SURF_P2_RESERVED1 0x02 -#define V_009910_ADDR_SURF_P2_RESERVED2 0x03 -#define V_009910_X_ADDR_SURF_P4_8X16 0x04 -#define V_009910_X_ADDR_SURF_P4_16X16 0x05 -#define V_009910_X_ADDR_SURF_P4_16X32 0x06 -#define V_009910_X_ADDR_SURF_P4_32X32 0x07 -#define V_009910_X_ADDR_SURF_P8_16X16_8X16 0x08 -#define V_009910_X_ADDR_SURF_P8_16X32_8X16 0x09 -#define V_009910_X_ADDR_SURF_P8_32X32_8X16 0x0A -#define V_009910_X_ADDR_SURF_P8_16X32_16X16 0x0B -#define V_009910_X_ADDR_SURF_P8_32X32_16X16 0x0C -#define V_009910_X_ADDR_SURF_P8_32X32_16X32 0x0D -#define V_009910_X_ADDR_SURF_P8_32X64_32X32 0x0E -#define S_009910_TILE_SPLIT(x) (((unsigned)(x) & 0x07) << 11) -#define G_009910_TILE_SPLIT(x) (((x) >> 11) & 0x07) -#define C_009910_TILE_SPLIT 0xFFFFC7FF -#define V_009910_ADDR_SURF_TILE_SPLIT_64B 0x00 -#define V_009910_ADDR_SURF_TILE_SPLIT_128B 0x01 -#define V_009910_ADDR_SURF_TILE_SPLIT_256B 0x02 -#define V_009910_ADDR_SURF_TILE_SPLIT_512B 0x03 -#define V_009910_ADDR_SURF_TILE_SPLIT_1KB 0x04 -#define V_009910_ADDR_SURF_TILE_SPLIT_2KB 0x05 -#define V_009910_ADDR_SURF_TILE_SPLIT_4KB 0x06 -#define S_009910_BANK_WIDTH(x) (((unsigned)(x) & 0x03) << 14) -#define G_009910_BANK_WIDTH(x) (((x) >> 14) & 0x03) -#define C_009910_BANK_WIDTH 0xFFFF3FFF -#define V_009910_ADDR_SURF_BANK_WIDTH_1 0x00 -#define V_009910_ADDR_SURF_BANK_WIDTH_2 0x01 -#define V_009910_ADDR_SURF_BANK_WIDTH_4 0x02 -#define V_009910_ADDR_SURF_BANK_WIDTH_8 0x03 -#define S_009910_BANK_HEIGHT(x) (((unsigned)(x) & 0x03) << 16) -#define G_009910_BANK_HEIGHT(x) (((x) >> 16) & 0x03) -#define C_009910_BANK_HEIGHT 0xFFFCFFFF -#define V_009910_ADDR_SURF_BANK_HEIGHT_1 0x00 -#define V_009910_ADDR_SURF_BANK_HEIGHT_2 0x01 -#define V_009910_ADDR_SURF_BANK_HEIGHT_4 0x02 -#define V_009910_ADDR_SURF_BANK_HEIGHT_8 0x03 -#define S_009910_MACRO_TILE_ASPECT(x) (((unsigned)(x) & 0x03) << 18) -#define G_009910_MACRO_TILE_ASPECT(x) (((x) >> 18) & 0x03) -#define C_009910_MACRO_TILE_ASPECT 0xFFF3FFFF -#define V_009910_ADDR_SURF_MACRO_ASPECT_1 0x00 -#define V_009910_ADDR_SURF_MACRO_ASPECT_2 0x01 -#define V_009910_ADDR_SURF_MACRO_ASPECT_4 0x02 -#define V_009910_ADDR_SURF_MACRO_ASPECT_8 0x03 -#define S_009910_NUM_BANKS(x) (((unsigned)(x) & 0x03) << 20) -#define G_009910_NUM_BANKS(x) (((x) >> 20) & 0x03) -#define C_009910_NUM_BANKS 0xFFCFFFFF -#define V_009910_ADDR_SURF_2_BANK 0x00 -#define V_009910_ADDR_SURF_4_BANK 0x01 -#define V_009910_ADDR_SURF_8_BANK 0x02 -#define V_009910_ADDR_SURF_16_BANK 0x03 -#define S_009910_MICRO_TILE_MODE_NEW(x) (((unsigned)(x) & 0x07) << 22) -#define G_009910_MICRO_TILE_MODE_NEW(x) (((x) >> 22) & 0x07) -#define C_009910_MICRO_TILE_MODE_NEW 0xFE3FFFFF -#define V_009910_ADDR_SURF_DISPLAY_MICRO_TILING 0x00 -#define V_009910_ADDR_SURF_THIN_MICRO_TILING 0x01 -#define V_009910_ADDR_SURF_DEPTH_MICRO_TILING 0x02 -#define V_009910_ADDR_SURF_ROTATED_MICRO_TILING 0x03 -#define S_009910_SAMPLE_SPLIT(x) (((unsigned)(x) & 0x03) << 25) -#define G_009910_SAMPLE_SPLIT(x) (((x) >> 25) & 0x03) -#define C_009910_SAMPLE_SPLIT 0xF9FFFFFF -#define R_009914_GB_TILE_MODE1 0x009914 -#define R_009918_GB_TILE_MODE2 0x009918 -#define R_00991C_GB_TILE_MODE3 0x00991C -#define R_009920_GB_TILE_MODE4 0x009920 -#define R_009924_GB_TILE_MODE5 0x009924 -#define R_009928_GB_TILE_MODE6 0x009928 -#define R_00992C_GB_TILE_MODE7 0x00992C -#define R_009930_GB_TILE_MODE8 0x009930 -#define R_009934_GB_TILE_MODE9 0x009934 -#define R_009938_GB_TILE_MODE10 0x009938 -#define R_00993C_GB_TILE_MODE11 0x00993C -#define R_009940_GB_TILE_MODE12 0x009940 -#define R_009944_GB_TILE_MODE13 0x009944 -#define R_009948_GB_TILE_MODE14 0x009948 -#define R_00994C_GB_TILE_MODE15 0x00994C -#define R_009950_GB_TILE_MODE16 0x009950 -#define R_009954_GB_TILE_MODE17 0x009954 -#define R_009958_GB_TILE_MODE18 0x009958 -#define R_00995C_GB_TILE_MODE19 0x00995C -#define R_009960_GB_TILE_MODE20 0x009960 -#define R_009964_GB_TILE_MODE21 0x009964 -#define R_009968_GB_TILE_MODE22 0x009968 -#define R_00996C_GB_TILE_MODE23 0x00996C -#define R_009970_GB_TILE_MODE24 0x009970 -#define R_009974_GB_TILE_MODE25 0x009974 -#define R_009978_GB_TILE_MODE26 0x009978 -#define R_00997C_GB_TILE_MODE27 0x00997C -#define R_009980_GB_TILE_MODE28 0x009980 -#define R_009984_GB_TILE_MODE29 0x009984 -#define R_009988_GB_TILE_MODE30 0x009988 -#define R_00998C_GB_TILE_MODE31 0x00998C -/* CIK */ -#define R_009990_GB_MACROTILE_MODE0 0x009990 -#define S_009990_BANK_WIDTH(x) (((unsigned)(x) & 0x03) << 0) -#define G_009990_BANK_WIDTH(x) (((x) >> 0) & 0x03) -#define C_009990_BANK_WIDTH 0xFFFFFFFC -#define S_009990_BANK_HEIGHT(x) (((unsigned)(x) & 0x03) << 2) -#define G_009990_BANK_HEIGHT(x) (((x) >> 2) & 0x03) -#define C_009990_BANK_HEIGHT 0xFFFFFFF3 -#define S_009990_MACRO_TILE_ASPECT(x) (((unsigned)(x) & 0x03) << 4) -#define G_009990_MACRO_TILE_ASPECT(x) (((x) >> 4) & 0x03) -#define C_009990_MACRO_TILE_ASPECT 0xFFFFFFCF -#define S_009990_NUM_BANKS(x) (((unsigned)(x) & 0x03) << 6) -#define G_009990_NUM_BANKS(x) (((x) >> 6) & 0x03) -#define C_009990_NUM_BANKS 0xFFFFFF3F -#define R_009994_GB_MACROTILE_MODE1 0x009994 -#define R_009998_GB_MACROTILE_MODE2 0x009998 -#define R_00999C_GB_MACROTILE_MODE3 0x00999C -#define R_0099A0_GB_MACROTILE_MODE4 0x0099A0 -#define R_0099A4_GB_MACROTILE_MODE5 0x0099A4 -#define R_0099A8_GB_MACROTILE_MODE6 0x0099A8 -#define R_0099AC_GB_MACROTILE_MODE7 0x0099AC -#define R_0099B0_GB_MACROTILE_MODE8 0x0099B0 -#define R_0099B4_GB_MACROTILE_MODE9 0x0099B4 -#define R_0099B8_GB_MACROTILE_MODE10 0x0099B8 -#define R_0099BC_GB_MACROTILE_MODE11 0x0099BC -#define R_0099C0_GB_MACROTILE_MODE12 0x0099C0 -#define R_0099C4_GB_MACROTILE_MODE13 0x0099C4 -#define R_0099C8_GB_MACROTILE_MODE14 0x0099C8 -#define R_0099CC_GB_MACROTILE_MODE15 0x0099CC -/* */ -#define R_00B000_SPI_SHADER_TBA_LO_PS 0x00B000 -#define R_00B004_SPI_SHADER_TBA_HI_PS 0x00B004 -#define S_00B004_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) -#define G_00B004_MEM_BASE(x) (((x) >> 0) & 0xFF) -#define C_00B004_MEM_BASE 0xFFFFFF00 -#define R_00B008_SPI_SHADER_TMA_LO_PS 0x00B008 -#define R_00B00C_SPI_SHADER_TMA_HI_PS 0x00B00C -#define S_00B00C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) -#define G_00B00C_MEM_BASE(x) (((x) >> 0) & 0xFF) -#define C_00B00C_MEM_BASE 0xFFFFFF00 -/* CIK */ -#define R_00B01C_SPI_SHADER_PGM_RSRC3_PS 0x00B01C -#define S_00B01C_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_00B01C_CU_EN(x) (((x) >> 0) & 0xFFFF) -#define C_00B01C_CU_EN 0xFFFF0000 -#define S_00B01C_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 16) -#define G_00B01C_WAVE_LIMIT(x) (((x) >> 16) & 0x3F) -#define C_00B01C_WAVE_LIMIT 0xFFC0FFFF -#define S_00B01C_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 22) -#define G_00B01C_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0x0F) -#define C_00B01C_LOCK_LOW_THRESHOLD 0xFC3FFFFF -/* */ -#define R_00B020_SPI_SHADER_PGM_LO_PS 0x00B020 -#define R_00B024_SPI_SHADER_PGM_HI_PS 0x00B024 -#define S_00B024_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) -#define G_00B024_MEM_BASE(x) (((x) >> 0) & 0xFF) -#define C_00B024_MEM_BASE 0xFFFFFF00 -#define R_00B028_SPI_SHADER_PGM_RSRC1_PS 0x00B028 -#define S_00B028_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) -#define G_00B028_VGPRS(x) (((x) >> 0) & 0x3F) -#define C_00B028_VGPRS 0xFFFFFFC0 -#define S_00B028_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) -#define G_00B028_SGPRS(x) (((x) >> 6) & 0x0F) -#define C_00B028_SGPRS 0xFFFFFC3F -#define S_00B028_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) -#define G_00B028_PRIORITY(x) (((x) >> 10) & 0x03) -#define C_00B028_PRIORITY 0xFFFFF3FF -#define S_00B028_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) -#define G_00B028_FLOAT_MODE(x) (((x) >> 12) & 0xFF) -#define C_00B028_FLOAT_MODE 0xFFF00FFF -#define V_00B028_FP_32_DENORMS 0x30 -#define V_00B028_FP_64_DENORMS 0xc0 -#define V_00B028_FP_ALL_DENORMS 0xf0 -#define S_00B028_PRIV(x) (((unsigned)(x) & 0x1) << 20) -#define G_00B028_PRIV(x) (((x) >> 20) & 0x1) -#define C_00B028_PRIV 0xFFEFFFFF -#define S_00B028_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) -#define G_00B028_DX10_CLAMP(x) (((x) >> 21) & 0x1) -#define C_00B028_DX10_CLAMP 0xFFDFFFFF -#define S_00B028_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) -#define G_00B028_DEBUG_MODE(x) (((x) >> 22) & 0x1) -#define C_00B028_DEBUG_MODE 0xFFBFFFFF -#define S_00B028_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) -#define G_00B028_IEEE_MODE(x) (((x) >> 23) & 0x1) -#define C_00B028_IEEE_MODE 0xFF7FFFFF -#define S_00B028_CU_GROUP_DISABLE(x) (((unsigned)(x) & 0x1) << 24) -#define G_00B028_CU_GROUP_DISABLE(x) (((x) >> 24) & 0x1) -#define C_00B028_CU_GROUP_DISABLE 0xFEFFFFFF -/* CIK */ -#define S_00B028_CACHE_CTL(x) (((unsigned)(x) & 0x07) << 25) -#define G_00B028_CACHE_CTL(x) (((x) >> 25) & 0x07) -#define C_00B028_CACHE_CTL 0xF1FFFFFF -#define S_00B028_CDBG_USER(x) (((unsigned)(x) & 0x1) << 28) -#define G_00B028_CDBG_USER(x) (((x) >> 28) & 0x1) -#define C_00B028_CDBG_USER 0xEFFFFFFF -/* */ -#define R_00B02C_SPI_SHADER_PGM_RSRC2_PS 0x00B02C -#define S_00B02C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) -#define G_00B02C_SCRATCH_EN(x) (((x) >> 0) & 0x1) -#define C_00B02C_SCRATCH_EN 0xFFFFFFFE -#define S_00B02C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) -#define G_00B02C_USER_SGPR(x) (((x) >> 1) & 0x1F) -#define C_00B02C_USER_SGPR 0xFFFFFFC1 -#define S_00B02C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) -#define G_00B02C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) -#define C_00B02C_TRAP_PRESENT 0xFFFFFFBF -#define S_00B02C_WAVE_CNT_EN(x) (((unsigned)(x) & 0x1) << 7) -#define G_00B02C_WAVE_CNT_EN(x) (((x) >> 7) & 0x1) -#define C_00B02C_WAVE_CNT_EN 0xFFFFFF7F -#define S_00B02C_EXTRA_LDS_SIZE(x) (((unsigned)(x) & 0xFF) << 8) -#define G_00B02C_EXTRA_LDS_SIZE(x) (((x) >> 8) & 0xFF) -#define C_00B02C_EXTRA_LDS_SIZE 0xFFFF00FF -#define S_00B02C_EXCP_EN(x) (((unsigned)(x) & 0x7F) << 16) /* mask is 0x1FF on CIK */ -#define G_00B02C_EXCP_EN(x) (((x) >> 16) & 0x7F) /* mask is 0x1FF on CIK */ -#define C_00B02C_EXCP_EN 0xFF80FFFF /* mask is 0x1FF on CIK */ -#define S_00B02C_EXCP_EN_CIK(x) (((unsigned)(x) & 0x1FF) << 16) -#define G_00B02C_EXCP_EN_CIK(x) (((x) >> 16) & 0x1FF) -#define C_00B02C_EXCP_EN_CIK 0xFE00FFFF -#define R_00B030_SPI_SHADER_USER_DATA_PS_0 0x00B030 -#define R_00B034_SPI_SHADER_USER_DATA_PS_1 0x00B034 -#define R_00B038_SPI_SHADER_USER_DATA_PS_2 0x00B038 -#define R_00B03C_SPI_SHADER_USER_DATA_PS_3 0x00B03C -#define R_00B040_SPI_SHADER_USER_DATA_PS_4 0x00B040 -#define R_00B044_SPI_SHADER_USER_DATA_PS_5 0x00B044 -#define R_00B048_SPI_SHADER_USER_DATA_PS_6 0x00B048 -#define R_00B04C_SPI_SHADER_USER_DATA_PS_7 0x00B04C -#define R_00B050_SPI_SHADER_USER_DATA_PS_8 0x00B050 -#define R_00B054_SPI_SHADER_USER_DATA_PS_9 0x00B054 -#define R_00B058_SPI_SHADER_USER_DATA_PS_10 0x00B058 -#define R_00B05C_SPI_SHADER_USER_DATA_PS_11 0x00B05C -#define R_00B060_SPI_SHADER_USER_DATA_PS_12 0x00B060 -#define R_00B064_SPI_SHADER_USER_DATA_PS_13 0x00B064 -#define R_00B068_SPI_SHADER_USER_DATA_PS_14 0x00B068 -#define R_00B06C_SPI_SHADER_USER_DATA_PS_15 0x00B06C -#define R_00B100_SPI_SHADER_TBA_LO_VS 0x00B100 -#define R_00B104_SPI_SHADER_TBA_HI_VS 0x00B104 -#define S_00B104_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) -#define G_00B104_MEM_BASE(x) (((x) >> 0) & 0xFF) -#define C_00B104_MEM_BASE 0xFFFFFF00 -#define R_00B108_SPI_SHADER_TMA_LO_VS 0x00B108 -#define R_00B10C_SPI_SHADER_TMA_HI_VS 0x00B10C -#define S_00B10C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) -#define G_00B10C_MEM_BASE(x) (((x) >> 0) & 0xFF) -#define C_00B10C_MEM_BASE 0xFFFFFF00 -/* CIK */ -#define R_00B118_SPI_SHADER_PGM_RSRC3_VS 0x00B118 -#define S_00B118_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_00B118_CU_EN(x) (((x) >> 0) & 0xFFFF) -#define C_00B118_CU_EN 0xFFFF0000 -#define S_00B118_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 16) -#define G_00B118_WAVE_LIMIT(x) (((x) >> 16) & 0x3F) -#define C_00B118_WAVE_LIMIT 0xFFC0FFFF -#define S_00B118_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 22) -#define G_00B118_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0x0F) -#define C_00B118_LOCK_LOW_THRESHOLD 0xFC3FFFFF -#define R_00B11C_SPI_SHADER_LATE_ALLOC_VS 0x00B11C -#define S_00B11C_LIMIT(x) (((unsigned)(x) & 0x3F) << 0) -#define G_00B11C_LIMIT(x) (((x) >> 0) & 0x3F) -#define C_00B11C_LIMIT 0xFFFFFFC0 -/* */ -#define R_00B120_SPI_SHADER_PGM_LO_VS 0x00B120 -#define R_00B124_SPI_SHADER_PGM_HI_VS 0x00B124 -#define S_00B124_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) -#define G_00B124_MEM_BASE(x) (((x) >> 0) & 0xFF) -#define C_00B124_MEM_BASE 0xFFFFFF00 -#define R_00B128_SPI_SHADER_PGM_RSRC1_VS 0x00B128 -#define S_00B128_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) -#define G_00B128_VGPRS(x) (((x) >> 0) & 0x3F) -#define C_00B128_VGPRS 0xFFFFFFC0 -#define S_00B128_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) -#define G_00B128_SGPRS(x) (((x) >> 6) & 0x0F) -#define C_00B128_SGPRS 0xFFFFFC3F -#define S_00B128_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) -#define G_00B128_PRIORITY(x) (((x) >> 10) & 0x03) -#define C_00B128_PRIORITY 0xFFFFF3FF -#define S_00B128_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) -#define G_00B128_FLOAT_MODE(x) (((x) >> 12) & 0xFF) -#define C_00B128_FLOAT_MODE 0xFFF00FFF -#define S_00B128_PRIV(x) (((unsigned)(x) & 0x1) << 20) -#define G_00B128_PRIV(x) (((x) >> 20) & 0x1) -#define C_00B128_PRIV 0xFFEFFFFF -#define S_00B128_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) -#define G_00B128_DX10_CLAMP(x) (((x) >> 21) & 0x1) -#define C_00B128_DX10_CLAMP 0xFFDFFFFF -#define S_00B128_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) -#define G_00B128_DEBUG_MODE(x) (((x) >> 22) & 0x1) -#define C_00B128_DEBUG_MODE 0xFFBFFFFF -#define S_00B128_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) -#define G_00B128_IEEE_MODE(x) (((x) >> 23) & 0x1) -#define C_00B128_IEEE_MODE 0xFF7FFFFF -#define S_00B128_VGPR_COMP_CNT(x) (((unsigned)(x) & 0x03) << 24) -#define G_00B128_VGPR_COMP_CNT(x) (((x) >> 24) & 0x03) -#define C_00B128_VGPR_COMP_CNT 0xFCFFFFFF -#define S_00B128_CU_GROUP_ENABLE(x) (((unsigned)(x) & 0x1) << 26) -#define G_00B128_CU_GROUP_ENABLE(x) (((x) >> 26) & 0x1) -#define C_00B128_CU_GROUP_ENABLE 0xFBFFFFFF -/* CIK */ -#define S_00B128_CACHE_CTL(x) (((unsigned)(x) & 0x07) << 27) -#define G_00B128_CACHE_CTL(x) (((x) >> 27) & 0x07) -#define C_00B128_CACHE_CTL 0xC7FFFFFF -#define S_00B128_CDBG_USER(x) (((unsigned)(x) & 0x1) << 30) -#define G_00B128_CDBG_USER(x) (((x) >> 30) & 0x1) -#define C_00B128_CDBG_USER 0xBFFFFFFF -/* */ -#define R_00B12C_SPI_SHADER_PGM_RSRC2_VS 0x00B12C -#define S_00B12C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) -#define G_00B12C_SCRATCH_EN(x) (((x) >> 0) & 0x1) -#define C_00B12C_SCRATCH_EN 0xFFFFFFFE -#define S_00B12C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) -#define G_00B12C_USER_SGPR(x) (((x) >> 1) & 0x1F) -#define C_00B12C_USER_SGPR 0xFFFFFFC1 -#define S_00B12C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) -#define G_00B12C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) -#define C_00B12C_TRAP_PRESENT 0xFFFFFFBF -#define S_00B12C_OC_LDS_EN(x) (((unsigned)(x) & 0x1) << 7) -#define G_00B12C_OC_LDS_EN(x) (((x) >> 7) & 0x1) -#define C_00B12C_OC_LDS_EN 0xFFFFFF7F -#define S_00B12C_SO_BASE0_EN(x) (((unsigned)(x) & 0x1) << 8) -#define G_00B12C_SO_BASE0_EN(x) (((x) >> 8) & 0x1) -#define C_00B12C_SO_BASE0_EN 0xFFFFFEFF -#define S_00B12C_SO_BASE1_EN(x) (((unsigned)(x) & 0x1) << 9) -#define G_00B12C_SO_BASE1_EN(x) (((x) >> 9) & 0x1) -#define C_00B12C_SO_BASE1_EN 0xFFFFFDFF -#define S_00B12C_SO_BASE2_EN(x) (((unsigned)(x) & 0x1) << 10) -#define G_00B12C_SO_BASE2_EN(x) (((x) >> 10) & 0x1) -#define C_00B12C_SO_BASE2_EN 0xFFFFFBFF -#define S_00B12C_SO_BASE3_EN(x) (((unsigned)(x) & 0x1) << 11) -#define G_00B12C_SO_BASE3_EN(x) (((x) >> 11) & 0x1) -#define C_00B12C_SO_BASE3_EN 0xFFFFF7FF -#define S_00B12C_SO_EN(x) (((unsigned)(x) & 0x1) << 12) -#define G_00B12C_SO_EN(x) (((x) >> 12) & 0x1) -#define C_00B12C_SO_EN 0xFFFFEFFF -#define S_00B12C_EXCP_EN(x) (((unsigned)(x) & 0x7F) << 13) /* mask is 0x1FF on CIK */ -#define G_00B12C_EXCP_EN(x) (((x) >> 13) & 0x7F) /* mask is 0x1FF on CIK */ -#define C_00B12C_EXCP_EN 0xFFF01FFF /* mask is 0x1FF on CIK */ -#define S_00B12C_EXCP_EN_CIK(x) (((unsigned)(x) & 0x1FF) << 13) -#define G_00B12C_EXCP_EN_CIK(x) (((x) >> 13) & 0x1FF) -#define C_00B12C_EXCP_EN_CIK 0xFFC01FFF -/* VI */ -#define S_00B12C_DISPATCH_DRAW_EN(x) (((unsigned)(x) & 0x1) << 24) -#define G_00B12C_DISPATCH_DRAW_EN(x) (((x) >> 24) & 0x1) -#define C_00B12C_DISPATCH_DRAW_EN 0xFEFFFFFF -/* */ -#define R_00B130_SPI_SHADER_USER_DATA_VS_0 0x00B130 -#define R_00B134_SPI_SHADER_USER_DATA_VS_1 0x00B134 -#define R_00B138_SPI_SHADER_USER_DATA_VS_2 0x00B138 -#define R_00B13C_SPI_SHADER_USER_DATA_VS_3 0x00B13C -#define R_00B140_SPI_SHADER_USER_DATA_VS_4 0x00B140 -#define R_00B144_SPI_SHADER_USER_DATA_VS_5 0x00B144 -#define R_00B148_SPI_SHADER_USER_DATA_VS_6 0x00B148 -#define R_00B14C_SPI_SHADER_USER_DATA_VS_7 0x00B14C -#define R_00B150_SPI_SHADER_USER_DATA_VS_8 0x00B150 -#define R_00B154_SPI_SHADER_USER_DATA_VS_9 0x00B154 -#define R_00B158_SPI_SHADER_USER_DATA_VS_10 0x00B158 -#define R_00B15C_SPI_SHADER_USER_DATA_VS_11 0x00B15C -#define R_00B160_SPI_SHADER_USER_DATA_VS_12 0x00B160 -#define R_00B164_SPI_SHADER_USER_DATA_VS_13 0x00B164 -#define R_00B168_SPI_SHADER_USER_DATA_VS_14 0x00B168 -#define R_00B16C_SPI_SHADER_USER_DATA_VS_15 0x00B16C -#define R_00B200_SPI_SHADER_TBA_LO_GS 0x00B200 -#define R_00B204_SPI_SHADER_TBA_HI_GS 0x00B204 -#define S_00B204_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) -#define G_00B204_MEM_BASE(x) (((x) >> 0) & 0xFF) -#define C_00B204_MEM_BASE 0xFFFFFF00 -#define R_00B208_SPI_SHADER_TMA_LO_GS 0x00B208 -#define R_00B20C_SPI_SHADER_TMA_HI_GS 0x00B20C -#define S_00B20C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) -#define G_00B20C_MEM_BASE(x) (((x) >> 0) & 0xFF) -#define C_00B20C_MEM_BASE 0xFFFFFF00 -/* CIK */ -#define R_00B21C_SPI_SHADER_PGM_RSRC3_GS 0x00B21C -#define S_00B21C_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_00B21C_CU_EN(x) (((x) >> 0) & 0xFFFF) -#define C_00B21C_CU_EN 0xFFFF0000 -#define S_00B21C_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 16) -#define G_00B21C_WAVE_LIMIT(x) (((x) >> 16) & 0x3F) -#define C_00B21C_WAVE_LIMIT 0xFFC0FFFF -#define S_00B21C_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 22) -#define G_00B21C_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0x0F) -#define C_00B21C_LOCK_LOW_THRESHOLD 0xFC3FFFFF -/* */ -/* VI */ -#define S_00B21C_GROUP_FIFO_DEPTH(x) (((unsigned)(x) & 0x3F) << 26) -#define G_00B21C_GROUP_FIFO_DEPTH(x) (((x) >> 26) & 0x3F) -#define C_00B21C_GROUP_FIFO_DEPTH 0x03FFFFFF -/* */ -#define R_00B220_SPI_SHADER_PGM_LO_GS 0x00B220 -#define R_00B224_SPI_SHADER_PGM_HI_GS 0x00B224 -#define S_00B224_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) -#define G_00B224_MEM_BASE(x) (((x) >> 0) & 0xFF) -#define C_00B224_MEM_BASE 0xFFFFFF00 -#define R_00B228_SPI_SHADER_PGM_RSRC1_GS 0x00B228 -#define S_00B228_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) -#define G_00B228_VGPRS(x) (((x) >> 0) & 0x3F) -#define C_00B228_VGPRS 0xFFFFFFC0 -#define S_00B228_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) -#define G_00B228_SGPRS(x) (((x) >> 6) & 0x0F) -#define C_00B228_SGPRS 0xFFFFFC3F -#define S_00B228_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) -#define G_00B228_PRIORITY(x) (((x) >> 10) & 0x03) -#define C_00B228_PRIORITY 0xFFFFF3FF -#define S_00B228_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) -#define G_00B228_FLOAT_MODE(x) (((x) >> 12) & 0xFF) -#define C_00B228_FLOAT_MODE 0xFFF00FFF -#define S_00B228_PRIV(x) (((unsigned)(x) & 0x1) << 20) -#define G_00B228_PRIV(x) (((x) >> 20) & 0x1) -#define C_00B228_PRIV 0xFFEFFFFF -#define S_00B228_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) -#define G_00B228_DX10_CLAMP(x) (((x) >> 21) & 0x1) -#define C_00B228_DX10_CLAMP 0xFFDFFFFF -#define S_00B228_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) -#define G_00B228_DEBUG_MODE(x) (((x) >> 22) & 0x1) -#define C_00B228_DEBUG_MODE 0xFFBFFFFF -#define S_00B228_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) -#define G_00B228_IEEE_MODE(x) (((x) >> 23) & 0x1) -#define C_00B228_IEEE_MODE 0xFF7FFFFF -#define S_00B228_CU_GROUP_ENABLE(x) (((unsigned)(x) & 0x1) << 24) -#define G_00B228_CU_GROUP_ENABLE(x) (((x) >> 24) & 0x1) -#define C_00B228_CU_GROUP_ENABLE 0xFEFFFFFF -/* CIK */ -#define S_00B228_CACHE_CTL(x) (((unsigned)(x) & 0x07) << 25) -#define G_00B228_CACHE_CTL(x) (((x) >> 25) & 0x07) -#define C_00B228_CACHE_CTL 0xF1FFFFFF -#define S_00B228_CDBG_USER(x) (((unsigned)(x) & 0x1) << 28) -#define G_00B228_CDBG_USER(x) (((x) >> 28) & 0x1) -#define C_00B228_CDBG_USER 0xEFFFFFFF -/* */ -#define R_00B22C_SPI_SHADER_PGM_RSRC2_GS 0x00B22C -#define S_00B22C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) -#define G_00B22C_SCRATCH_EN(x) (((x) >> 0) & 0x1) -#define C_00B22C_SCRATCH_EN 0xFFFFFFFE -#define S_00B22C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) -#define G_00B22C_USER_SGPR(x) (((x) >> 1) & 0x1F) -#define C_00B22C_USER_SGPR 0xFFFFFFC1 -#define S_00B22C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) -#define G_00B22C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) -#define C_00B22C_TRAP_PRESENT 0xFFFFFFBF -#define S_00B22C_EXCP_EN(x) (((unsigned)(x) & 0x7F) << 7) /* mask is 0x1FF on CIK */ -#define G_00B22C_EXCP_EN(x) (((x) >> 7) & 0x7F) /* mask is 0x1FF on CIK */ -#define C_00B22C_EXCP_EN 0xFFFFC07F /* mask is 0x1FF on CIK */ -#define S_00B22C_EXCP_EN_CIK(x) (((unsigned)(x) & 0x1FF) << 7) -#define G_00B22C_EXCP_EN_CIK(x) (((x) >> 7) & 0x1FF) -#define C_00B22C_EXCP_EN_CIK 0xFFFF007F -#define R_00B230_SPI_SHADER_USER_DATA_GS_0 0x00B230 -#define R_00B234_SPI_SHADER_USER_DATA_GS_1 0x00B234 -#define R_00B238_SPI_SHADER_USER_DATA_GS_2 0x00B238 -#define R_00B23C_SPI_SHADER_USER_DATA_GS_3 0x00B23C -#define R_00B240_SPI_SHADER_USER_DATA_GS_4 0x00B240 -#define R_00B244_SPI_SHADER_USER_DATA_GS_5 0x00B244 -#define R_00B248_SPI_SHADER_USER_DATA_GS_6 0x00B248 -#define R_00B24C_SPI_SHADER_USER_DATA_GS_7 0x00B24C -#define R_00B250_SPI_SHADER_USER_DATA_GS_8 0x00B250 -#define R_00B254_SPI_SHADER_USER_DATA_GS_9 0x00B254 -#define R_00B258_SPI_SHADER_USER_DATA_GS_10 0x00B258 -#define R_00B25C_SPI_SHADER_USER_DATA_GS_11 0x00B25C -#define R_00B260_SPI_SHADER_USER_DATA_GS_12 0x00B260 -#define R_00B264_SPI_SHADER_USER_DATA_GS_13 0x00B264 -#define R_00B268_SPI_SHADER_USER_DATA_GS_14 0x00B268 -#define R_00B26C_SPI_SHADER_USER_DATA_GS_15 0x00B26C -#define R_00B300_SPI_SHADER_TBA_LO_ES 0x00B300 -#define R_00B304_SPI_SHADER_TBA_HI_ES 0x00B304 -#define S_00B304_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) -#define G_00B304_MEM_BASE(x) (((x) >> 0) & 0xFF) -#define C_00B304_MEM_BASE 0xFFFFFF00 -#define R_00B308_SPI_SHADER_TMA_LO_ES 0x00B308 -#define R_00B30C_SPI_SHADER_TMA_HI_ES 0x00B30C -#define S_00B30C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) -#define G_00B30C_MEM_BASE(x) (((x) >> 0) & 0xFF) -#define C_00B30C_MEM_BASE 0xFFFFFF00 -/* CIK */ -#define R_00B31C_SPI_SHADER_PGM_RSRC3_ES 0x00B31C -#define S_00B31C_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_00B31C_CU_EN(x) (((x) >> 0) & 0xFFFF) -#define C_00B31C_CU_EN 0xFFFF0000 -#define S_00B31C_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 16) -#define G_00B31C_WAVE_LIMIT(x) (((x) >> 16) & 0x3F) -#define C_00B31C_WAVE_LIMIT 0xFFC0FFFF -#define S_00B31C_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 22) -#define G_00B31C_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0x0F) -#define C_00B31C_LOCK_LOW_THRESHOLD 0xFC3FFFFF -/* */ -/* VI */ -#define S_00B31C_GROUP_FIFO_DEPTH(x) (((unsigned)(x) & 0x3F) << 26) -#define G_00B31C_GROUP_FIFO_DEPTH(x) (((x) >> 26) & 0x3F) -#define C_00B31C_GROUP_FIFO_DEPTH 0x03FFFFFF -/* */ -#define R_00B320_SPI_SHADER_PGM_LO_ES 0x00B320 -#define R_00B324_SPI_SHADER_PGM_HI_ES 0x00B324 -#define S_00B324_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) -#define G_00B324_MEM_BASE(x) (((x) >> 0) & 0xFF) -#define C_00B324_MEM_BASE 0xFFFFFF00 -#define R_00B328_SPI_SHADER_PGM_RSRC1_ES 0x00B328 -#define S_00B328_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) -#define G_00B328_VGPRS(x) (((x) >> 0) & 0x3F) -#define C_00B328_VGPRS 0xFFFFFFC0 -#define S_00B328_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) -#define G_00B328_SGPRS(x) (((x) >> 6) & 0x0F) -#define C_00B328_SGPRS 0xFFFFFC3F -#define S_00B328_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) -#define G_00B328_PRIORITY(x) (((x) >> 10) & 0x03) -#define C_00B328_PRIORITY 0xFFFFF3FF -#define S_00B328_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) -#define G_00B328_FLOAT_MODE(x) (((x) >> 12) & 0xFF) -#define C_00B328_FLOAT_MODE 0xFFF00FFF -#define S_00B328_PRIV(x) (((unsigned)(x) & 0x1) << 20) -#define G_00B328_PRIV(x) (((x) >> 20) & 0x1) -#define C_00B328_PRIV 0xFFEFFFFF -#define S_00B328_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) -#define G_00B328_DX10_CLAMP(x) (((x) >> 21) & 0x1) -#define C_00B328_DX10_CLAMP 0xFFDFFFFF -#define S_00B328_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) -#define G_00B328_DEBUG_MODE(x) (((x) >> 22) & 0x1) -#define C_00B328_DEBUG_MODE 0xFFBFFFFF -#define S_00B328_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) -#define G_00B328_IEEE_MODE(x) (((x) >> 23) & 0x1) -#define C_00B328_IEEE_MODE 0xFF7FFFFF -#define S_00B328_VGPR_COMP_CNT(x) (((unsigned)(x) & 0x03) << 24) -#define G_00B328_VGPR_COMP_CNT(x) (((x) >> 24) & 0x03) -#define C_00B328_VGPR_COMP_CNT 0xFCFFFFFF -#define S_00B328_CU_GROUP_ENABLE(x) (((unsigned)(x) & 0x1) << 26) -#define G_00B328_CU_GROUP_ENABLE(x) (((x) >> 26) & 0x1) -#define C_00B328_CU_GROUP_ENABLE 0xFBFFFFFF -/* CIK */ -#define S_00B328_CACHE_CTL(x) (((unsigned)(x) & 0x07) << 27) -#define G_00B328_CACHE_CTL(x) (((x) >> 27) & 0x07) -#define C_00B328_CACHE_CTL 0xC7FFFFFF -#define S_00B328_CDBG_USER(x) (((unsigned)(x) & 0x1) << 30) -#define G_00B328_CDBG_USER(x) (((x) >> 30) & 0x1) -#define C_00B328_CDBG_USER 0xBFFFFFFF -/* */ -#define R_00B32C_SPI_SHADER_PGM_RSRC2_ES 0x00B32C -#define S_00B32C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) -#define G_00B32C_SCRATCH_EN(x) (((x) >> 0) & 0x1) -#define C_00B32C_SCRATCH_EN 0xFFFFFFFE -#define S_00B32C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) -#define G_00B32C_USER_SGPR(x) (((x) >> 1) & 0x1F) -#define C_00B32C_USER_SGPR 0xFFFFFFC1 -#define S_00B32C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) -#define G_00B32C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) -#define C_00B32C_TRAP_PRESENT 0xFFFFFFBF -#define S_00B32C_OC_LDS_EN(x) (((unsigned)(x) & 0x1) << 7) -#define G_00B32C_OC_LDS_EN(x) (((x) >> 7) & 0x1) -#define C_00B32C_OC_LDS_EN 0xFFFFFF7F -#define S_00B32C_EXCP_EN(x) (((unsigned)(x) & 0x7F) << 8) /* mask is 0x1FF on CIK */ -#define G_00B32C_EXCP_EN(x) (((x) >> 8) & 0x7F) /* mask is 0x1FF on CIK */ -#define C_00B32C_EXCP_EN 0xFFFF80FF /* mask is 0x1FF on CIK */ -#define S_00B32C_LDS_SIZE(x) (((unsigned)(x) & 0x1FF) << 20) /* CIK, for on-chip GS */ -#define G_00B32C_LDS_SIZE(x) (((x) >> 20) & 0x1FF) /* CIK, for on-chip GS */ -#define C_00B32C_LDS_SIZE 0xE00FFFFF /* CIK, for on-chip GS */ -#define R_00B330_SPI_SHADER_USER_DATA_ES_0 0x00B330 -#define R_00B334_SPI_SHADER_USER_DATA_ES_1 0x00B334 -#define R_00B338_SPI_SHADER_USER_DATA_ES_2 0x00B338 -#define R_00B33C_SPI_SHADER_USER_DATA_ES_3 0x00B33C -#define R_00B340_SPI_SHADER_USER_DATA_ES_4 0x00B340 -#define R_00B344_SPI_SHADER_USER_DATA_ES_5 0x00B344 -#define R_00B348_SPI_SHADER_USER_DATA_ES_6 0x00B348 -#define R_00B34C_SPI_SHADER_USER_DATA_ES_7 0x00B34C -#define R_00B350_SPI_SHADER_USER_DATA_ES_8 0x00B350 -#define R_00B354_SPI_SHADER_USER_DATA_ES_9 0x00B354 -#define R_00B358_SPI_SHADER_USER_DATA_ES_10 0x00B358 -#define R_00B35C_SPI_SHADER_USER_DATA_ES_11 0x00B35C -#define R_00B360_SPI_SHADER_USER_DATA_ES_12 0x00B360 -#define R_00B364_SPI_SHADER_USER_DATA_ES_13 0x00B364 -#define R_00B368_SPI_SHADER_USER_DATA_ES_14 0x00B368 -#define R_00B36C_SPI_SHADER_USER_DATA_ES_15 0x00B36C -#define R_00B400_SPI_SHADER_TBA_LO_HS 0x00B400 -#define R_00B404_SPI_SHADER_TBA_HI_HS 0x00B404 -#define S_00B404_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) -#define G_00B404_MEM_BASE(x) (((x) >> 0) & 0xFF) -#define C_00B404_MEM_BASE 0xFFFFFF00 -#define R_00B408_SPI_SHADER_TMA_LO_HS 0x00B408 -#define R_00B40C_SPI_SHADER_TMA_HI_HS 0x00B40C -#define S_00B40C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) -#define G_00B40C_MEM_BASE(x) (((x) >> 0) & 0xFF) -#define C_00B40C_MEM_BASE 0xFFFFFF00 -/* CIK */ -#define R_00B41C_SPI_SHADER_PGM_RSRC3_HS 0x00B41C -#define S_00B41C_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 0) -#define G_00B41C_WAVE_LIMIT(x) (((x) >> 0) & 0x3F) -#define C_00B41C_WAVE_LIMIT 0xFFFFFFC0 -#define S_00B41C_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 6) -#define G_00B41C_LOCK_LOW_THRESHOLD(x) (((x) >> 6) & 0x0F) -#define C_00B41C_LOCK_LOW_THRESHOLD 0xFFFFFC3F -/* */ -/* VI */ -#define S_00B41C_GROUP_FIFO_DEPTH(x) (((unsigned)(x) & 0x3F) << 10) -#define G_00B41C_GROUP_FIFO_DEPTH(x) (((x) >> 10) & 0x3F) -#define C_00B41C_GROUP_FIFO_DEPTH 0xFFFF03FF -/* */ -#define R_00B420_SPI_SHADER_PGM_LO_HS 0x00B420 -#define R_00B424_SPI_SHADER_PGM_HI_HS 0x00B424 -#define S_00B424_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) -#define G_00B424_MEM_BASE(x) (((x) >> 0) & 0xFF) -#define C_00B424_MEM_BASE 0xFFFFFF00 -#define R_00B428_SPI_SHADER_PGM_RSRC1_HS 0x00B428 -#define S_00B428_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) -#define G_00B428_VGPRS(x) (((x) >> 0) & 0x3F) -#define C_00B428_VGPRS 0xFFFFFFC0 -#define S_00B428_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) -#define G_00B428_SGPRS(x) (((x) >> 6) & 0x0F) -#define C_00B428_SGPRS 0xFFFFFC3F -#define S_00B428_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) -#define G_00B428_PRIORITY(x) (((x) >> 10) & 0x03) -#define C_00B428_PRIORITY 0xFFFFF3FF -#define S_00B428_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) -#define G_00B428_FLOAT_MODE(x) (((x) >> 12) & 0xFF) -#define C_00B428_FLOAT_MODE 0xFFF00FFF -#define S_00B428_PRIV(x) (((unsigned)(x) & 0x1) << 20) -#define G_00B428_PRIV(x) (((x) >> 20) & 0x1) -#define C_00B428_PRIV 0xFFEFFFFF -#define S_00B428_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) -#define G_00B428_DX10_CLAMP(x) (((x) >> 21) & 0x1) -#define C_00B428_DX10_CLAMP 0xFFDFFFFF -#define S_00B428_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) -#define G_00B428_DEBUG_MODE(x) (((x) >> 22) & 0x1) -#define C_00B428_DEBUG_MODE 0xFFBFFFFF -#define S_00B428_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) -#define G_00B428_IEEE_MODE(x) (((x) >> 23) & 0x1) -#define C_00B428_IEEE_MODE 0xFF7FFFFF -/* CIK */ -#define S_00B428_CACHE_CTL(x) (((unsigned)(x) & 0x07) << 24) -#define G_00B428_CACHE_CTL(x) (((x) >> 24) & 0x07) -#define C_00B428_CACHE_CTL 0xF8FFFFFF -#define S_00B428_CDBG_USER(x) (((unsigned)(x) & 0x1) << 27) -#define G_00B428_CDBG_USER(x) (((x) >> 27) & 0x1) -#define C_00B428_CDBG_USER 0xF7FFFFFF -/* */ -#define R_00B42C_SPI_SHADER_PGM_RSRC2_HS 0x00B42C -#define S_00B42C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) -#define G_00B42C_SCRATCH_EN(x) (((x) >> 0) & 0x1) -#define C_00B42C_SCRATCH_EN 0xFFFFFFFE -#define S_00B42C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) -#define G_00B42C_USER_SGPR(x) (((x) >> 1) & 0x1F) -#define C_00B42C_USER_SGPR 0xFFFFFFC1 -#define S_00B42C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) -#define G_00B42C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) -#define C_00B42C_TRAP_PRESENT 0xFFFFFFBF -#define S_00B42C_OC_LDS_EN(x) (((unsigned)(x) & 0x1) << 7) -#define G_00B42C_OC_LDS_EN(x) (((x) >> 7) & 0x1) -#define C_00B42C_OC_LDS_EN 0xFFFFFF7F -#define S_00B42C_TG_SIZE_EN(x) (((unsigned)(x) & 0x1) << 8) -#define G_00B42C_TG_SIZE_EN(x) (((x) >> 8) & 0x1) -#define C_00B42C_TG_SIZE_EN 0xFFFFFEFF -#define S_00B42C_EXCP_EN(x) (((unsigned)(x) & 0x7F) << 9) /* mask is 0x1FF on CIK */ -#define G_00B42C_EXCP_EN(x) (((x) >> 9) & 0x7F) /* mask is 0x1FF on CIK */ -#define C_00B42C_EXCP_EN 0xFFFF01FF /* mask is 0x1FF on CIK */ -#define R_00B430_SPI_SHADER_USER_DATA_HS_0 0x00B430 -#define R_00B434_SPI_SHADER_USER_DATA_HS_1 0x00B434 -#define R_00B438_SPI_SHADER_USER_DATA_HS_2 0x00B438 -#define R_00B43C_SPI_SHADER_USER_DATA_HS_3 0x00B43C -#define R_00B440_SPI_SHADER_USER_DATA_HS_4 0x00B440 -#define R_00B444_SPI_SHADER_USER_DATA_HS_5 0x00B444 -#define R_00B448_SPI_SHADER_USER_DATA_HS_6 0x00B448 -#define R_00B44C_SPI_SHADER_USER_DATA_HS_7 0x00B44C -#define R_00B450_SPI_SHADER_USER_DATA_HS_8 0x00B450 -#define R_00B454_SPI_SHADER_USER_DATA_HS_9 0x00B454 -#define R_00B458_SPI_SHADER_USER_DATA_HS_10 0x00B458 -#define R_00B45C_SPI_SHADER_USER_DATA_HS_11 0x00B45C -#define R_00B460_SPI_SHADER_USER_DATA_HS_12 0x00B460 -#define R_00B464_SPI_SHADER_USER_DATA_HS_13 0x00B464 -#define R_00B468_SPI_SHADER_USER_DATA_HS_14 0x00B468 -#define R_00B46C_SPI_SHADER_USER_DATA_HS_15 0x00B46C -#define R_00B500_SPI_SHADER_TBA_LO_LS 0x00B500 -#define R_00B504_SPI_SHADER_TBA_HI_LS 0x00B504 -#define S_00B504_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) -#define G_00B504_MEM_BASE(x) (((x) >> 0) & 0xFF) -#define C_00B504_MEM_BASE 0xFFFFFF00 -#define R_00B508_SPI_SHADER_TMA_LO_LS 0x00B508 -#define R_00B50C_SPI_SHADER_TMA_HI_LS 0x00B50C -#define S_00B50C_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) -#define G_00B50C_MEM_BASE(x) (((x) >> 0) & 0xFF) -#define C_00B50C_MEM_BASE 0xFFFFFF00 -/* CIK */ -#define R_00B51C_SPI_SHADER_PGM_RSRC3_LS 0x00B51C -#define S_00B51C_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_00B51C_CU_EN(x) (((x) >> 0) & 0xFFFF) -#define C_00B51C_CU_EN 0xFFFF0000 -#define S_00B51C_WAVE_LIMIT(x) (((unsigned)(x) & 0x3F) << 16) -#define G_00B51C_WAVE_LIMIT(x) (((x) >> 16) & 0x3F) -#define C_00B51C_WAVE_LIMIT 0xFFC0FFFF -#define S_00B51C_LOCK_LOW_THRESHOLD(x) (((unsigned)(x) & 0x0F) << 22) -#define G_00B51C_LOCK_LOW_THRESHOLD(x) (((x) >> 22) & 0x0F) -#define C_00B51C_LOCK_LOW_THRESHOLD 0xFC3FFFFF -/* */ -/* VI */ -#define S_00B51C_GROUP_FIFO_DEPTH(x) (((unsigned)(x) & 0x3F) << 26) -#define G_00B51C_GROUP_FIFO_DEPTH(x) (((x) >> 26) & 0x3F) -#define C_00B51C_GROUP_FIFO_DEPTH 0x03FFFFFF -/* */ -#define R_00B520_SPI_SHADER_PGM_LO_LS 0x00B520 -#define R_00B524_SPI_SHADER_PGM_HI_LS 0x00B524 -#define S_00B524_MEM_BASE(x) (((unsigned)(x) & 0xFF) << 0) -#define G_00B524_MEM_BASE(x) (((x) >> 0) & 0xFF) -#define C_00B524_MEM_BASE 0xFFFFFF00 -#define R_00B528_SPI_SHADER_PGM_RSRC1_LS 0x00B528 -#define S_00B528_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) -#define G_00B528_VGPRS(x) (((x) >> 0) & 0x3F) -#define C_00B528_VGPRS 0xFFFFFFC0 -#define S_00B528_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) -#define G_00B528_SGPRS(x) (((x) >> 6) & 0x0F) -#define C_00B528_SGPRS 0xFFFFFC3F -#define S_00B528_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) -#define G_00B528_PRIORITY(x) (((x) >> 10) & 0x03) -#define C_00B528_PRIORITY 0xFFFFF3FF -#define S_00B528_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) -#define G_00B528_FLOAT_MODE(x) (((x) >> 12) & 0xFF) -#define C_00B528_FLOAT_MODE 0xFFF00FFF -#define S_00B528_PRIV(x) (((unsigned)(x) & 0x1) << 20) -#define G_00B528_PRIV(x) (((x) >> 20) & 0x1) -#define C_00B528_PRIV 0xFFEFFFFF -#define S_00B528_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) -#define G_00B528_DX10_CLAMP(x) (((x) >> 21) & 0x1) -#define C_00B528_DX10_CLAMP 0xFFDFFFFF -#define S_00B528_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) -#define G_00B528_DEBUG_MODE(x) (((x) >> 22) & 0x1) -#define C_00B528_DEBUG_MODE 0xFFBFFFFF -#define S_00B528_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) -#define G_00B528_IEEE_MODE(x) (((x) >> 23) & 0x1) -#define C_00B528_IEEE_MODE 0xFF7FFFFF -#define S_00B528_VGPR_COMP_CNT(x) (((unsigned)(x) & 0x03) << 24) -#define G_00B528_VGPR_COMP_CNT(x) (((x) >> 24) & 0x03) -#define C_00B528_VGPR_COMP_CNT 0xFCFFFFFF -/* CIK */ -#define S_00B528_CACHE_CTL(x) (((unsigned)(x) & 0x07) << 26) -#define G_00B528_CACHE_CTL(x) (((x) >> 26) & 0x07) -#define C_00B528_CACHE_CTL 0xE3FFFFFF -#define S_00B528_CDBG_USER(x) (((unsigned)(x) & 0x1) << 29) -#define G_00B528_CDBG_USER(x) (((x) >> 29) & 0x1) -#define C_00B528_CDBG_USER 0xDFFFFFFF -/* */ -#define R_00B52C_SPI_SHADER_PGM_RSRC2_LS 0x00B52C -#define S_00B52C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) -#define G_00B52C_SCRATCH_EN(x) (((x) >> 0) & 0x1) -#define C_00B52C_SCRATCH_EN 0xFFFFFFFE -#define S_00B52C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) -#define G_00B52C_USER_SGPR(x) (((x) >> 1) & 0x1F) -#define C_00B52C_USER_SGPR 0xFFFFFFC1 -#define S_00B52C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) -#define G_00B52C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) -#define C_00B52C_TRAP_PRESENT 0xFFFFFFBF -#define S_00B52C_LDS_SIZE(x) (((unsigned)(x) & 0x1FF) << 7) -#define G_00B52C_LDS_SIZE(x) (((x) >> 7) & 0x1FF) -#define C_00B52C_LDS_SIZE 0xFFFF007F -#define S_00B52C_EXCP_EN(x) (((unsigned)(x) & 0x7F) << 16) /* mask is 0x1FF on CIK */ -#define G_00B52C_EXCP_EN(x) (((x) >> 16) & 0x7F) /* mask is 0x1FF on CIK */ -#define C_00B52C_EXCP_EN 0xFF80FFFF /* mask is 0x1FF on CIK */ -#define R_00B530_SPI_SHADER_USER_DATA_LS_0 0x00B530 -#define R_00B534_SPI_SHADER_USER_DATA_LS_1 0x00B534 -#define R_00B538_SPI_SHADER_USER_DATA_LS_2 0x00B538 -#define R_00B53C_SPI_SHADER_USER_DATA_LS_3 0x00B53C -#define R_00B540_SPI_SHADER_USER_DATA_LS_4 0x00B540 -#define R_00B544_SPI_SHADER_USER_DATA_LS_5 0x00B544 -#define R_00B548_SPI_SHADER_USER_DATA_LS_6 0x00B548 -#define R_00B54C_SPI_SHADER_USER_DATA_LS_7 0x00B54C -#define R_00B550_SPI_SHADER_USER_DATA_LS_8 0x00B550 -#define R_00B554_SPI_SHADER_USER_DATA_LS_9 0x00B554 -#define R_00B558_SPI_SHADER_USER_DATA_LS_10 0x00B558 -#define R_00B55C_SPI_SHADER_USER_DATA_LS_11 0x00B55C -#define R_00B560_SPI_SHADER_USER_DATA_LS_12 0x00B560 -#define R_00B564_SPI_SHADER_USER_DATA_LS_13 0x00B564 -#define R_00B568_SPI_SHADER_USER_DATA_LS_14 0x00B568 -#define R_00B56C_SPI_SHADER_USER_DATA_LS_15 0x00B56C -#define R_00B800_COMPUTE_DISPATCH_INITIATOR 0x00B800 -#define S_00B800_COMPUTE_SHADER_EN(x) (((unsigned)(x) & 0x1) << 0) -#define G_00B800_COMPUTE_SHADER_EN(x) (((x) >> 0) & 0x1) -#define C_00B800_COMPUTE_SHADER_EN 0xFFFFFFFE -#define S_00B800_PARTIAL_TG_EN(x) (((unsigned)(x) & 0x1) << 1) -#define G_00B800_PARTIAL_TG_EN(x) (((x) >> 1) & 0x1) -#define C_00B800_PARTIAL_TG_EN 0xFFFFFFFD -#define S_00B800_FORCE_START_AT_000(x) (((unsigned)(x) & 0x1) << 2) -#define G_00B800_FORCE_START_AT_000(x) (((x) >> 2) & 0x1) -#define C_00B800_FORCE_START_AT_000 0xFFFFFFFB -#define S_00B800_ORDERED_APPEND_ENBL(x) (((unsigned)(x) & 0x1) << 3) -#define G_00B800_ORDERED_APPEND_ENBL(x) (((x) >> 3) & 0x1) -#define C_00B800_ORDERED_APPEND_ENBL 0xFFFFFFF7 -/* CIK */ -#define S_00B800_ORDERED_APPEND_MODE(x) (((unsigned)(x) & 0x1) << 4) -#define G_00B800_ORDERED_APPEND_MODE(x) (((x) >> 4) & 0x1) -#define C_00B800_ORDERED_APPEND_MODE 0xFFFFFFEF -#define S_00B800_USE_THREAD_DIMENSIONS(x) (((unsigned)(x) & 0x1) << 5) -#define G_00B800_USE_THREAD_DIMENSIONS(x) (((x) >> 5) & 0x1) -#define C_00B800_USE_THREAD_DIMENSIONS 0xFFFFFFDF -#define S_00B800_ORDER_MODE(x) (((unsigned)(x) & 0x1) << 6) -#define G_00B800_ORDER_MODE(x) (((x) >> 6) & 0x1) -#define C_00B800_ORDER_MODE 0xFFFFFFBF -#define S_00B800_DISPATCH_CACHE_CNTL(x) (((unsigned)(x) & 0x07) << 7) -#define G_00B800_DISPATCH_CACHE_CNTL(x) (((x) >> 7) & 0x07) -#define C_00B800_DISPATCH_CACHE_CNTL 0xFFFFFC7F -#define S_00B800_SCALAR_L1_INV_VOL(x) (((unsigned)(x) & 0x1) << 10) -#define G_00B800_SCALAR_L1_INV_VOL(x) (((x) >> 10) & 0x1) -#define C_00B800_SCALAR_L1_INV_VOL 0xFFFFFBFF -#define S_00B800_VECTOR_L1_INV_VOL(x) (((unsigned)(x) & 0x1) << 11) -#define G_00B800_VECTOR_L1_INV_VOL(x) (((x) >> 11) & 0x1) -#define C_00B800_VECTOR_L1_INV_VOL 0xFFFFF7FF -#define S_00B800_DATA_ATC(x) (((unsigned)(x) & 0x1) << 12) -#define G_00B800_DATA_ATC(x) (((x) >> 12) & 0x1) -#define C_00B800_DATA_ATC 0xFFFFEFFF -#define S_00B800_RESTORE(x) (((unsigned)(x) & 0x1) << 14) -#define G_00B800_RESTORE(x) (((x) >> 14) & 0x1) -#define C_00B800_RESTORE 0xFFFFBFFF -/* */ -#define R_00B804_COMPUTE_DIM_X 0x00B804 -#define R_00B808_COMPUTE_DIM_Y 0x00B808 -#define R_00B80C_COMPUTE_DIM_Z 0x00B80C -#define R_00B810_COMPUTE_START_X 0x00B810 -#define R_00B814_COMPUTE_START_Y 0x00B814 -#define R_00B818_COMPUTE_START_Z 0x00B818 -#define R_00B81C_COMPUTE_NUM_THREAD_X 0x00B81C -#define S_00B81C_NUM_THREAD_FULL(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_00B81C_NUM_THREAD_FULL(x) (((x) >> 0) & 0xFFFF) -#define C_00B81C_NUM_THREAD_FULL 0xFFFF0000 -#define S_00B81C_NUM_THREAD_PARTIAL(x) (((unsigned)(x) & 0xFFFF) << 16) -#define G_00B81C_NUM_THREAD_PARTIAL(x) (((x) >> 16) & 0xFFFF) -#define C_00B81C_NUM_THREAD_PARTIAL 0x0000FFFF -#define R_00B820_COMPUTE_NUM_THREAD_Y 0x00B820 -#define S_00B820_NUM_THREAD_FULL(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_00B820_NUM_THREAD_FULL(x) (((x) >> 0) & 0xFFFF) -#define C_00B820_NUM_THREAD_FULL 0xFFFF0000 -#define S_00B820_NUM_THREAD_PARTIAL(x) (((unsigned)(x) & 0xFFFF) << 16) -#define G_00B820_NUM_THREAD_PARTIAL(x) (((x) >> 16) & 0xFFFF) -#define C_00B820_NUM_THREAD_PARTIAL 0x0000FFFF -#define R_00B824_COMPUTE_NUM_THREAD_Z 0x00B824 -#define S_00B824_NUM_THREAD_FULL(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_00B824_NUM_THREAD_FULL(x) (((x) >> 0) & 0xFFFF) -#define C_00B824_NUM_THREAD_FULL 0xFFFF0000 -#define S_00B824_NUM_THREAD_PARTIAL(x) (((unsigned)(x) & 0xFFFF) << 16) -#define G_00B824_NUM_THREAD_PARTIAL(x) (((x) >> 16) & 0xFFFF) -#define C_00B824_NUM_THREAD_PARTIAL 0x0000FFFF -#define R_00B82C_COMPUTE_MAX_WAVE_ID 0x00B82C /* moved to 0xCD20 on CIK */ -#define S_00B82C_MAX_WAVE_ID(x) (((unsigned)(x) & 0xFFF) << 0) -#define G_00B82C_MAX_WAVE_ID(x) (((x) >> 0) & 0xFFF) -#define C_00B82C_MAX_WAVE_ID 0xFFFFF000 -/* CIK */ -#define R_00B828_COMPUTE_PIPELINESTAT_ENABLE 0x00B828 -#define S_00B828_PIPELINESTAT_ENABLE(x) (((unsigned)(x) & 0x1) << 0) -#define G_00B828_PIPELINESTAT_ENABLE(x) (((x) >> 0) & 0x1) -#define C_00B828_PIPELINESTAT_ENABLE 0xFFFFFFFE -#define R_00B82C_COMPUTE_PERFCOUNT_ENABLE 0x00B82C -#define S_00B82C_PERFCOUNT_ENABLE(x) (((unsigned)(x) & 0x1) << 0) -#define G_00B82C_PERFCOUNT_ENABLE(x) (((x) >> 0) & 0x1) -#define C_00B82C_PERFCOUNT_ENABLE 0xFFFFFFFE -/* */ -#define R_00B830_COMPUTE_PGM_LO 0x00B830 -#define R_00B834_COMPUTE_PGM_HI 0x00B834 -#define S_00B834_DATA(x) (((unsigned)(x) & 0xFF) << 0) -#define G_00B834_DATA(x) (((x) >> 0) & 0xFF) -#define C_00B834_DATA 0xFFFFFF00 -/* CIK */ -#define S_00B834_INST_ATC(x) (((unsigned)(x) & 0x1) << 8) -#define G_00B834_INST_ATC(x) (((x) >> 8) & 0x1) -#define C_00B834_INST_ATC 0xFFFFFEFF -/* */ -#define R_00B838_COMPUTE_TBA_LO 0x00B838 -#define R_00B83C_COMPUTE_TBA_HI 0x00B83C -#define S_00B83C_DATA(x) (((unsigned)(x) & 0xFF) << 0) -#define G_00B83C_DATA(x) (((x) >> 0) & 0xFF) -#define C_00B83C_DATA 0xFFFFFF00 -#define R_00B840_COMPUTE_TMA_LO 0x00B840 -#define R_00B844_COMPUTE_TMA_HI 0x00B844 -#define S_00B844_DATA(x) (((unsigned)(x) & 0xFF) << 0) -#define G_00B844_DATA(x) (((x) >> 0) & 0xFF) -#define C_00B844_DATA 0xFFFFFF00 -#define R_00B848_COMPUTE_PGM_RSRC1 0x00B848 -#define S_00B848_VGPRS(x) (((unsigned)(x) & 0x3F) << 0) -#define G_00B848_VGPRS(x) (((x) >> 0) & 0x3F) -#define C_00B848_VGPRS 0xFFFFFFC0 -#define S_00B848_SGPRS(x) (((unsigned)(x) & 0x0F) << 6) -#define G_00B848_SGPRS(x) (((x) >> 6) & 0x0F) -#define C_00B848_SGPRS 0xFFFFFC3F -#define S_00B848_PRIORITY(x) (((unsigned)(x) & 0x03) << 10) -#define G_00B848_PRIORITY(x) (((x) >> 10) & 0x03) -#define C_00B848_PRIORITY 0xFFFFF3FF -#define S_00B848_FLOAT_MODE(x) (((unsigned)(x) & 0xFF) << 12) -#define G_00B848_FLOAT_MODE(x) (((x) >> 12) & 0xFF) -#define C_00B848_FLOAT_MODE 0xFFF00FFF -#define S_00B848_PRIV(x) (((unsigned)(x) & 0x1) << 20) -#define G_00B848_PRIV(x) (((x) >> 20) & 0x1) -#define C_00B848_PRIV 0xFFEFFFFF -#define S_00B848_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) -#define G_00B848_DX10_CLAMP(x) (((x) >> 21) & 0x1) -#define C_00B848_DX10_CLAMP 0xFFDFFFFF -#define S_00B848_DEBUG_MODE(x) (((unsigned)(x) & 0x1) << 22) -#define G_00B848_DEBUG_MODE(x) (((x) >> 22) & 0x1) -#define C_00B848_DEBUG_MODE 0xFFBFFFFF -#define S_00B848_IEEE_MODE(x) (((unsigned)(x) & 0x1) << 23) -#define G_00B848_IEEE_MODE(x) (((x) >> 23) & 0x1) -#define C_00B848_IEEE_MODE 0xFF7FFFFF -/* CIK */ -#define S_00B848_BULKY(x) (((unsigned)(x) & 0x1) << 24) -#define G_00B848_BULKY(x) (((x) >> 24) & 0x1) -#define C_00B848_BULKY 0xFEFFFFFF -#define S_00B848_CDBG_USER(x) (((unsigned)(x) & 0x1) << 25) -#define G_00B848_CDBG_USER(x) (((x) >> 25) & 0x1) -#define C_00B848_CDBG_USER 0xFDFFFFFF -/* */ -#define R_00B84C_COMPUTE_PGM_RSRC2 0x00B84C -#define S_00B84C_SCRATCH_EN(x) (((unsigned)(x) & 0x1) << 0) -#define G_00B84C_SCRATCH_EN(x) (((x) >> 0) & 0x1) -#define C_00B84C_SCRATCH_EN 0xFFFFFFFE -#define S_00B84C_USER_SGPR(x) (((unsigned)(x) & 0x1F) << 1) -#define G_00B84C_USER_SGPR(x) (((x) >> 1) & 0x1F) -#define C_00B84C_USER_SGPR 0xFFFFFFC1 -#define S_00B84C_TRAP_PRESENT(x) (((unsigned)(x) & 0x1) << 6) -#define G_00B84C_TRAP_PRESENT(x) (((x) >> 6) & 0x1) -#define C_00B84C_TRAP_PRESENT 0xFFFFFFBF -#define S_00B84C_TGID_X_EN(x) (((unsigned)(x) & 0x1) << 7) -#define G_00B84C_TGID_X_EN(x) (((x) >> 7) & 0x1) -#define C_00B84C_TGID_X_EN 0xFFFFFF7F -#define S_00B84C_TGID_Y_EN(x) (((unsigned)(x) & 0x1) << 8) -#define G_00B84C_TGID_Y_EN(x) (((x) >> 8) & 0x1) -#define C_00B84C_TGID_Y_EN 0xFFFFFEFF -#define S_00B84C_TGID_Z_EN(x) (((unsigned)(x) & 0x1) << 9) -#define G_00B84C_TGID_Z_EN(x) (((x) >> 9) & 0x1) -#define C_00B84C_TGID_Z_EN 0xFFFFFDFF -#define S_00B84C_TG_SIZE_EN(x) (((unsigned)(x) & 0x1) << 10) -#define G_00B84C_TG_SIZE_EN(x) (((x) >> 10) & 0x1) -#define C_00B84C_TG_SIZE_EN 0xFFFFFBFF -#define S_00B84C_TIDIG_COMP_CNT(x) (((unsigned)(x) & 0x03) << 11) -#define G_00B84C_TIDIG_COMP_CNT(x) (((x) >> 11) & 0x03) -#define C_00B84C_TIDIG_COMP_CNT 0xFFFFE7FF -/* CIK */ -#define S_00B84C_EXCP_EN_MSB(x) (((unsigned)(x) & 0x03) << 13) -#define G_00B84C_EXCP_EN_MSB(x) (((x) >> 13) & 0x03) -#define C_00B84C_EXCP_EN_MSB 0xFFFF9FFF -/* */ -#define S_00B84C_LDS_SIZE(x) (((unsigned)(x) & 0x1FF) << 15) -#define G_00B84C_LDS_SIZE(x) (((x) >> 15) & 0x1FF) -#define C_00B84C_LDS_SIZE 0xFF007FFF -#define S_00B84C_EXCP_EN(x) (((unsigned)(x) & 0x7F) << 24) -#define G_00B84C_EXCP_EN(x) (((x) >> 24) & 0x7F) -#define C_00B84C_EXCP_EN 0x80FFFFFF -#define R_00B850_COMPUTE_VMID 0x00B850 -#define S_00B850_DATA(x) (((unsigned)(x) & 0x0F) << 0) -#define G_00B850_DATA(x) (((x) >> 0) & 0x0F) -#define C_00B850_DATA 0xFFFFFFF0 -#define R_00B854_COMPUTE_RESOURCE_LIMITS 0x00B854 -#define S_00B854_WAVES_PER_SH(x) (((unsigned)(x) & 0x3F) << 0) /* mask is 0x3FF on CIK */ -#define G_00B854_WAVES_PER_SH(x) (((x) >> 0) & 0x3F) /* mask is 0x3FF on CIK */ -#define C_00B854_WAVES_PER_SH 0xFFFFFFC0 /* mask is 0x3FF on CIK */ -#define S_00B854_WAVES_PER_SH_CIK(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_00B854_WAVES_PER_SH_CIK(x) (((x) >> 0) & 0x3FF) -#define C_00B854_WAVES_PER_SH_CIK 0xFFFFFC00 -#define S_00B854_TG_PER_CU(x) (((unsigned)(x) & 0x0F) << 12) -#define G_00B854_TG_PER_CU(x) (((x) >> 12) & 0x0F) -#define C_00B854_TG_PER_CU 0xFFFF0FFF -#define S_00B854_LOCK_THRESHOLD(x) (((unsigned)(x) & 0x3F) << 16) -#define G_00B854_LOCK_THRESHOLD(x) (((x) >> 16) & 0x3F) -#define C_00B854_LOCK_THRESHOLD 0xFFC0FFFF -#define S_00B854_SIMD_DEST_CNTL(x) (((unsigned)(x) & 0x1) << 22) -#define G_00B854_SIMD_DEST_CNTL(x) (((x) >> 22) & 0x1) -#define C_00B854_SIMD_DEST_CNTL 0xFFBFFFFF -/* CIK */ -#define S_00B854_FORCE_SIMD_DIST(x) (((unsigned)(x) & 0x1) << 23) -#define G_00B854_FORCE_SIMD_DIST(x) (((x) >> 23) & 0x1) -#define C_00B854_FORCE_SIMD_DIST 0xFF7FFFFF -#define S_00B854_CU_GROUP_COUNT(x) (((unsigned)(x) & 0x07) << 24) -#define G_00B854_CU_GROUP_COUNT(x) (((x) >> 24) & 0x07) -#define C_00B854_CU_GROUP_COUNT 0xF8FFFFFF -/* */ -#define R_00B858_COMPUTE_STATIC_THREAD_MGMT_SE0 0x00B858 -#define S_00B858_SH0_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_00B858_SH0_CU_EN(x) (((x) >> 0) & 0xFFFF) -#define C_00B858_SH0_CU_EN 0xFFFF0000 -#define S_00B858_SH1_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 16) -#define G_00B858_SH1_CU_EN(x) (((x) >> 16) & 0xFFFF) -#define C_00B858_SH1_CU_EN 0x0000FFFF -#define R_00B85C_COMPUTE_STATIC_THREAD_MGMT_SE1 0x00B85C -#define S_00B85C_SH0_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_00B85C_SH0_CU_EN(x) (((x) >> 0) & 0xFFFF) -#define C_00B85C_SH0_CU_EN 0xFFFF0000 -#define S_00B85C_SH1_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 16) -#define G_00B85C_SH1_CU_EN(x) (((x) >> 16) & 0xFFFF) -#define C_00B85C_SH1_CU_EN 0x0000FFFF -#define R_00B860_COMPUTE_TMPRING_SIZE 0x00B860 -#define S_00B860_WAVES(x) (((unsigned)(x) & 0xFFF) << 0) -#define G_00B860_WAVES(x) (((x) >> 0) & 0xFFF) -#define C_00B860_WAVES 0xFFFFF000 -#define S_00B860_WAVESIZE(x) (((unsigned)(x) & 0x1FFF) << 12) -#define G_00B860_WAVESIZE(x) (((x) >> 12) & 0x1FFF) -#define C_00B860_WAVESIZE 0xFE000FFF -/* CIK */ -#define R_00B864_COMPUTE_STATIC_THREAD_MGMT_SE2 0x00B864 -#define S_00B864_SH0_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_00B864_SH0_CU_EN(x) (((x) >> 0) & 0xFFFF) -#define C_00B864_SH0_CU_EN 0xFFFF0000 -#define S_00B864_SH1_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 16) -#define G_00B864_SH1_CU_EN(x) (((x) >> 16) & 0xFFFF) -#define C_00B864_SH1_CU_EN 0x0000FFFF -#define R_00B868_COMPUTE_STATIC_THREAD_MGMT_SE3 0x00B868 -#define S_00B868_SH0_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_00B868_SH0_CU_EN(x) (((x) >> 0) & 0xFFFF) -#define C_00B868_SH0_CU_EN 0xFFFF0000 -#define S_00B868_SH1_CU_EN(x) (((unsigned)(x) & 0xFFFF) << 16) -#define G_00B868_SH1_CU_EN(x) (((x) >> 16) & 0xFFFF) -#define C_00B868_SH1_CU_EN 0x0000FFFF -#define R_00B86C_COMPUTE_RESTART_X 0x00B86C -#define R_00B870_COMPUTE_RESTART_Y 0x00B870 -#define R_00B874_COMPUTE_RESTART_Z 0x00B874 -#define R_00B87C_COMPUTE_MISC_RESERVED 0x00B87C -#define S_00B87C_SEND_SEID(x) (((unsigned)(x) & 0x03) << 0) -#define G_00B87C_SEND_SEID(x) (((x) >> 0) & 0x03) -#define C_00B87C_SEND_SEID 0xFFFFFFFC -#define S_00B87C_RESERVED2(x) (((unsigned)(x) & 0x1) << 2) -#define G_00B87C_RESERVED2(x) (((x) >> 2) & 0x1) -#define C_00B87C_RESERVED2 0xFFFFFFFB -#define S_00B87C_RESERVED3(x) (((unsigned)(x) & 0x1) << 3) -#define G_00B87C_RESERVED3(x) (((x) >> 3) & 0x1) -#define C_00B87C_RESERVED3 0xFFFFFFF7 -#define S_00B87C_RESERVED4(x) (((unsigned)(x) & 0x1) << 4) -#define G_00B87C_RESERVED4(x) (((x) >> 4) & 0x1) -#define C_00B87C_RESERVED4 0xFFFFFFEF -/* VI */ -#define S_00B87C_WAVE_ID_BASE(x) (((unsigned)(x) & 0xFFF) << 5) -#define G_00B87C_WAVE_ID_BASE(x) (((x) >> 5) & 0xFFF) -#define C_00B87C_WAVE_ID_BASE 0xFFFE001F -#define R_00B880_COMPUTE_DISPATCH_ID 0x00B880 -#define R_00B884_COMPUTE_THREADGROUP_ID 0x00B884 -#define R_00B888_COMPUTE_RELAUNCH 0x00B888 -#define S_00B888_PAYLOAD(x) (((unsigned)(x) & 0x3FFFFFFF) << 0) -#define G_00B888_PAYLOAD(x) (((x) >> 0) & 0x3FFFFFFF) -#define C_00B888_PAYLOAD 0xC0000000 -#define S_00B888_IS_EVENT(x) (((unsigned)(x) & 0x1) << 30) -#define G_00B888_IS_EVENT(x) (((x) >> 30) & 0x1) -#define C_00B888_IS_EVENT 0xBFFFFFFF -#define S_00B888_IS_STATE(x) (((unsigned)(x) & 0x1) << 31) -#define G_00B888_IS_STATE(x) (((x) >> 31) & 0x1) -#define C_00B888_IS_STATE 0x7FFFFFFF -#define R_00B88C_COMPUTE_WAVE_RESTORE_ADDR_LO 0x00B88C -#define R_00B890_COMPUTE_WAVE_RESTORE_ADDR_HI 0x00B890 -#define S_00B890_ADDR(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_00B890_ADDR(x) (((x) >> 0) & 0xFFFF) -#define C_00B890_ADDR 0xFFFF0000 -#define R_00B894_COMPUTE_WAVE_RESTORE_CONTROL 0x00B894 -#define S_00B894_ATC(x) (((unsigned)(x) & 0x1) << 0) -#define G_00B894_ATC(x) (((x) >> 0) & 0x1) -#define C_00B894_ATC 0xFFFFFFFE -#define S_00B894_MTYPE(x) (((unsigned)(x) & 0x03) << 1) -#define G_00B894_MTYPE(x) (((x) >> 1) & 0x03) -#define C_00B894_MTYPE 0xFFFFFFF9 -/* */ -/* */ -#define R_00B900_COMPUTE_USER_DATA_0 0x00B900 -#define R_00B904_COMPUTE_USER_DATA_1 0x00B904 -#define R_00B908_COMPUTE_USER_DATA_2 0x00B908 -#define R_00B90C_COMPUTE_USER_DATA_3 0x00B90C -#define R_00B910_COMPUTE_USER_DATA_4 0x00B910 -#define R_00B914_COMPUTE_USER_DATA_5 0x00B914 -#define R_00B918_COMPUTE_USER_DATA_6 0x00B918 -#define R_00B91C_COMPUTE_USER_DATA_7 0x00B91C -#define R_00B920_COMPUTE_USER_DATA_8 0x00B920 -#define R_00B924_COMPUTE_USER_DATA_9 0x00B924 -#define R_00B928_COMPUTE_USER_DATA_10 0x00B928 -#define R_00B92C_COMPUTE_USER_DATA_11 0x00B92C -#define R_00B930_COMPUTE_USER_DATA_12 0x00B930 -#define R_00B934_COMPUTE_USER_DATA_13 0x00B934 -#define R_00B938_COMPUTE_USER_DATA_14 0x00B938 -#define R_00B93C_COMPUTE_USER_DATA_15 0x00B93C -#define R_00B9FC_COMPUTE_NOWHERE 0x00B9FC -#define R_034000_CPG_PERFCOUNTER1_LO 0x034000 -#define R_034004_CPG_PERFCOUNTER1_HI 0x034004 -#define R_034008_CPG_PERFCOUNTER0_LO 0x034008 -#define R_03400C_CPG_PERFCOUNTER0_HI 0x03400C -#define R_034010_CPC_PERFCOUNTER1_LO 0x034010 -#define R_034014_CPC_PERFCOUNTER1_HI 0x034014 -#define R_034018_CPC_PERFCOUNTER0_LO 0x034018 -#define R_03401C_CPC_PERFCOUNTER0_HI 0x03401C -#define R_034020_CPF_PERFCOUNTER1_LO 0x034020 -#define R_034024_CPF_PERFCOUNTER1_HI 0x034024 -#define R_034028_CPF_PERFCOUNTER0_LO 0x034028 -#define R_03402C_CPF_PERFCOUNTER0_HI 0x03402C -#define R_034100_GRBM_PERFCOUNTER0_LO 0x034100 -#define R_034104_GRBM_PERFCOUNTER0_HI 0x034104 -#define R_03410C_GRBM_PERFCOUNTER1_LO 0x03410C -#define R_034110_GRBM_PERFCOUNTER1_HI 0x034110 -#define R_034114_GRBM_SE0_PERFCOUNTER_LO 0x034114 -#define R_034118_GRBM_SE0_PERFCOUNTER_HI 0x034118 -#define R_03411C_GRBM_SE1_PERFCOUNTER_LO 0x03411C -#define R_034120_GRBM_SE1_PERFCOUNTER_HI 0x034120 -#define R_034124_GRBM_SE2_PERFCOUNTER_LO 0x034124 -#define R_034128_GRBM_SE2_PERFCOUNTER_HI 0x034128 -#define R_03412C_GRBM_SE3_PERFCOUNTER_LO 0x03412C -#define R_034130_GRBM_SE3_PERFCOUNTER_HI 0x034130 -#define R_034200_WD_PERFCOUNTER0_LO 0x034200 -#define R_034204_WD_PERFCOUNTER0_HI 0x034204 -#define R_034208_WD_PERFCOUNTER1_LO 0x034208 -#define R_03420C_WD_PERFCOUNTER1_HI 0x03420C -#define R_034210_WD_PERFCOUNTER2_LO 0x034210 -#define R_034214_WD_PERFCOUNTER2_HI 0x034214 -#define R_034218_WD_PERFCOUNTER3_LO 0x034218 -#define R_03421C_WD_PERFCOUNTER3_HI 0x03421C -#define R_034220_IA_PERFCOUNTER0_LO 0x034220 -#define R_034224_IA_PERFCOUNTER0_HI 0x034224 -#define R_034228_IA_PERFCOUNTER1_LO 0x034228 -#define R_03422C_IA_PERFCOUNTER1_HI 0x03422C -#define R_034230_IA_PERFCOUNTER2_LO 0x034230 -#define R_034234_IA_PERFCOUNTER2_HI 0x034234 -#define R_034238_IA_PERFCOUNTER3_LO 0x034238 -#define R_03423C_IA_PERFCOUNTER3_HI 0x03423C -#define R_034240_VGT_PERFCOUNTER0_LO 0x034240 -#define R_034244_VGT_PERFCOUNTER0_HI 0x034244 -#define R_034248_VGT_PERFCOUNTER1_LO 0x034248 -#define R_03424C_VGT_PERFCOUNTER1_HI 0x03424C -#define R_034250_VGT_PERFCOUNTER2_LO 0x034250 -#define R_034254_VGT_PERFCOUNTER2_HI 0x034254 -#define R_034258_VGT_PERFCOUNTER3_LO 0x034258 -#define R_03425C_VGT_PERFCOUNTER3_HI 0x03425C -#define R_034400_PA_SU_PERFCOUNTER0_LO 0x034400 -#define R_034404_PA_SU_PERFCOUNTER0_HI 0x034404 -#define S_034404_PERFCOUNTER_HI(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_034404_PERFCOUNTER_HI(x) (((x) >> 0) & 0xFFFF) -#define C_034404_PERFCOUNTER_HI 0xFFFF0000 -#define R_034408_PA_SU_PERFCOUNTER1_LO 0x034408 -#define R_03440C_PA_SU_PERFCOUNTER1_HI 0x03440C -#define R_034410_PA_SU_PERFCOUNTER2_LO 0x034410 -#define R_034414_PA_SU_PERFCOUNTER2_HI 0x034414 -#define R_034418_PA_SU_PERFCOUNTER3_LO 0x034418 -#define R_03441C_PA_SU_PERFCOUNTER3_HI 0x03441C -#define R_034500_PA_SC_PERFCOUNTER0_LO 0x034500 -#define R_034504_PA_SC_PERFCOUNTER0_HI 0x034504 -#define R_034508_PA_SC_PERFCOUNTER1_LO 0x034508 -#define R_03450C_PA_SC_PERFCOUNTER1_HI 0x03450C -#define R_034510_PA_SC_PERFCOUNTER2_LO 0x034510 -#define R_034514_PA_SC_PERFCOUNTER2_HI 0x034514 -#define R_034518_PA_SC_PERFCOUNTER3_LO 0x034518 -#define R_03451C_PA_SC_PERFCOUNTER3_HI 0x03451C -#define R_034520_PA_SC_PERFCOUNTER4_LO 0x034520 -#define R_034524_PA_SC_PERFCOUNTER4_HI 0x034524 -#define R_034528_PA_SC_PERFCOUNTER5_LO 0x034528 -#define R_03452C_PA_SC_PERFCOUNTER5_HI 0x03452C -#define R_034530_PA_SC_PERFCOUNTER6_LO 0x034530 -#define R_034534_PA_SC_PERFCOUNTER6_HI 0x034534 -#define R_034538_PA_SC_PERFCOUNTER7_LO 0x034538 -#define R_03453C_PA_SC_PERFCOUNTER7_HI 0x03453C -#define R_034600_SPI_PERFCOUNTER0_HI 0x034600 -#define R_034604_SPI_PERFCOUNTER0_LO 0x034604 -#define R_034608_SPI_PERFCOUNTER1_HI 0x034608 -#define R_03460C_SPI_PERFCOUNTER1_LO 0x03460C -#define R_034610_SPI_PERFCOUNTER2_HI 0x034610 -#define R_034614_SPI_PERFCOUNTER2_LO 0x034614 -#define R_034618_SPI_PERFCOUNTER3_HI 0x034618 -#define R_03461C_SPI_PERFCOUNTER3_LO 0x03461C -#define R_034620_SPI_PERFCOUNTER4_HI 0x034620 -#define R_034624_SPI_PERFCOUNTER4_LO 0x034624 -#define R_034628_SPI_PERFCOUNTER5_HI 0x034628 -#define R_03462C_SPI_PERFCOUNTER5_LO 0x03462C -#define R_034700_SQ_PERFCOUNTER0_LO 0x034700 -#define R_034704_SQ_PERFCOUNTER0_HI 0x034704 -#define R_034708_SQ_PERFCOUNTER1_LO 0x034708 -#define R_03470C_SQ_PERFCOUNTER1_HI 0x03470C -#define R_034710_SQ_PERFCOUNTER2_LO 0x034710 -#define R_034714_SQ_PERFCOUNTER2_HI 0x034714 -#define R_034718_SQ_PERFCOUNTER3_LO 0x034718 -#define R_03471C_SQ_PERFCOUNTER3_HI 0x03471C -#define R_034720_SQ_PERFCOUNTER4_LO 0x034720 -#define R_034724_SQ_PERFCOUNTER4_HI 0x034724 -#define R_034728_SQ_PERFCOUNTER5_LO 0x034728 -#define R_03472C_SQ_PERFCOUNTER5_HI 0x03472C -#define R_034730_SQ_PERFCOUNTER6_LO 0x034730 -#define R_034734_SQ_PERFCOUNTER6_HI 0x034734 -#define R_034738_SQ_PERFCOUNTER7_LO 0x034738 -#define R_03473C_SQ_PERFCOUNTER7_HI 0x03473C -#define R_034740_SQ_PERFCOUNTER8_LO 0x034740 -#define R_034744_SQ_PERFCOUNTER8_HI 0x034744 -#define R_034748_SQ_PERFCOUNTER9_LO 0x034748 -#define R_03474C_SQ_PERFCOUNTER9_HI 0x03474C -#define R_034750_SQ_PERFCOUNTER10_LO 0x034750 -#define R_034754_SQ_PERFCOUNTER10_HI 0x034754 -#define R_034758_SQ_PERFCOUNTER11_LO 0x034758 -#define R_03475C_SQ_PERFCOUNTER11_HI 0x03475C -#define R_034760_SQ_PERFCOUNTER12_LO 0x034760 -#define R_034764_SQ_PERFCOUNTER12_HI 0x034764 -#define R_034768_SQ_PERFCOUNTER13_LO 0x034768 -#define R_03476C_SQ_PERFCOUNTER13_HI 0x03476C -#define R_034770_SQ_PERFCOUNTER14_LO 0x034770 -#define R_034774_SQ_PERFCOUNTER14_HI 0x034774 -#define R_034778_SQ_PERFCOUNTER15_LO 0x034778 -#define R_03477C_SQ_PERFCOUNTER15_HI 0x03477C -#define R_034900_SX_PERFCOUNTER0_LO 0x034900 -#define R_034904_SX_PERFCOUNTER0_HI 0x034904 -#define R_034908_SX_PERFCOUNTER1_LO 0x034908 -#define R_03490C_SX_PERFCOUNTER1_HI 0x03490C -#define R_034910_SX_PERFCOUNTER2_LO 0x034910 -#define R_034914_SX_PERFCOUNTER2_HI 0x034914 -#define R_034918_SX_PERFCOUNTER3_LO 0x034918 -#define R_03491C_SX_PERFCOUNTER3_HI 0x03491C -#define R_034A00_GDS_PERFCOUNTER0_LO 0x034A00 -#define R_034A04_GDS_PERFCOUNTER0_HI 0x034A04 -#define R_034A08_GDS_PERFCOUNTER1_LO 0x034A08 -#define R_034A0C_GDS_PERFCOUNTER1_HI 0x034A0C -#define R_034A10_GDS_PERFCOUNTER2_LO 0x034A10 -#define R_034A14_GDS_PERFCOUNTER2_HI 0x034A14 -#define R_034A18_GDS_PERFCOUNTER3_LO 0x034A18 -#define R_034A1C_GDS_PERFCOUNTER3_HI 0x034A1C -#define R_034B00_TA_PERFCOUNTER0_LO 0x034B00 -#define R_034B04_TA_PERFCOUNTER0_HI 0x034B04 -#define R_034B08_TA_PERFCOUNTER1_LO 0x034B08 -#define R_034B0C_TA_PERFCOUNTER1_HI 0x034B0C -#define R_034C00_TD_PERFCOUNTER0_LO 0x034C00 -#define R_034C04_TD_PERFCOUNTER0_HI 0x034C04 -#define R_034C08_TD_PERFCOUNTER1_LO 0x034C08 -#define R_034C0C_TD_PERFCOUNTER1_HI 0x034C0C -#define R_034D00_TCP_PERFCOUNTER0_LO 0x034D00 -#define R_034D04_TCP_PERFCOUNTER0_HI 0x034D04 -#define R_034D08_TCP_PERFCOUNTER1_LO 0x034D08 -#define R_034D0C_TCP_PERFCOUNTER1_HI 0x034D0C -#define R_034D10_TCP_PERFCOUNTER2_LO 0x034D10 -#define R_034D14_TCP_PERFCOUNTER2_HI 0x034D14 -#define R_034D18_TCP_PERFCOUNTER3_LO 0x034D18 -#define R_034D1C_TCP_PERFCOUNTER3_HI 0x034D1C -#define R_034E00_TCC_PERFCOUNTER0_LO 0x034E00 -#define R_034E04_TCC_PERFCOUNTER0_HI 0x034E04 -#define R_034E08_TCC_PERFCOUNTER1_LO 0x034E08 -#define R_034E0C_TCC_PERFCOUNTER1_HI 0x034E0C -#define R_034E10_TCC_PERFCOUNTER2_LO 0x034E10 -#define R_034E14_TCC_PERFCOUNTER2_HI 0x034E14 -#define R_034E18_TCC_PERFCOUNTER3_LO 0x034E18 -#define R_034E1C_TCC_PERFCOUNTER3_HI 0x034E1C -#define R_034E40_TCA_PERFCOUNTER0_LO 0x034E40 -#define R_034E44_TCA_PERFCOUNTER0_HI 0x034E44 -#define R_034E48_TCA_PERFCOUNTER1_LO 0x034E48 -#define R_034E4C_TCA_PERFCOUNTER1_HI 0x034E4C -#define R_034E50_TCA_PERFCOUNTER2_LO 0x034E50 -#define R_034E54_TCA_PERFCOUNTER2_HI 0x034E54 -#define R_034E58_TCA_PERFCOUNTER3_LO 0x034E58 -#define R_034E5C_TCA_PERFCOUNTER3_HI 0x034E5C -#define R_035018_CB_PERFCOUNTER0_LO 0x035018 -#define R_03501C_CB_PERFCOUNTER0_HI 0x03501C -#define R_035020_CB_PERFCOUNTER1_LO 0x035020 -#define R_035024_CB_PERFCOUNTER1_HI 0x035024 -#define R_035028_CB_PERFCOUNTER2_LO 0x035028 -#define R_03502C_CB_PERFCOUNTER2_HI 0x03502C -#define R_035030_CB_PERFCOUNTER3_LO 0x035030 -#define R_035034_CB_PERFCOUNTER3_HI 0x035034 -#define R_035100_DB_PERFCOUNTER0_LO 0x035100 -#define R_035104_DB_PERFCOUNTER0_HI 0x035104 -#define R_035108_DB_PERFCOUNTER1_LO 0x035108 -#define R_03510C_DB_PERFCOUNTER1_HI 0x03510C -#define R_035110_DB_PERFCOUNTER2_LO 0x035110 -#define R_035114_DB_PERFCOUNTER2_HI 0x035114 -#define R_035118_DB_PERFCOUNTER3_LO 0x035118 -#define R_03511C_DB_PERFCOUNTER3_HI 0x03511C -#define R_035200_RLC_PERFCOUNTER0_LO 0x035200 -#define R_035204_RLC_PERFCOUNTER0_HI 0x035204 -#define R_035208_RLC_PERFCOUNTER1_LO 0x035208 -#define R_03520C_RLC_PERFCOUNTER1_HI 0x03520C -#define R_036000_CPG_PERFCOUNTER1_SELECT 0x036000 -#define R_036004_CPG_PERFCOUNTER0_SELECT1 0x036004 -#define S_036004_PERF_SEL2(x) (((unsigned)(x) & 0x3F) << 0) -#define G_036004_PERF_SEL2(x) (((x) >> 0) & 0x3F) -#define C_036004_PERF_SEL2 0xFFFFFFC0 -#define S_036004_PERF_SEL3(x) (((unsigned)(x) & 0x3F) << 10) -#define G_036004_PERF_SEL3(x) (((x) >> 10) & 0x3F) -#define C_036004_PERF_SEL3 0xFFFF03FF -#define R_036008_CPG_PERFCOUNTER0_SELECT 0x036008 -#define S_036008_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) -#define G_036008_PERF_SEL(x) (((x) >> 0) & 0x3F) -#define C_036008_PERF_SEL 0xFFFFFFC0 -#define S_036008_PERF_SEL1(x) (((unsigned)(x) & 0x3F) << 10) -#define G_036008_PERF_SEL1(x) (((x) >> 10) & 0x3F) -#define C_036008_PERF_SEL1 0xFFFF03FF -#define S_036008_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) -#define G_036008_CNTR_MODE(x) (((x) >> 20) & 0x0F) -#define C_036008_CNTR_MODE 0xFF0FFFFF -#define R_03600C_CPC_PERFCOUNTER1_SELECT 0x03600C -#define R_036010_CPC_PERFCOUNTER0_SELECT1 0x036010 -#define S_036010_PERF_SEL2(x) (((unsigned)(x) & 0x3F) << 0) -#define G_036010_PERF_SEL2(x) (((x) >> 0) & 0x3F) -#define C_036010_PERF_SEL2 0xFFFFFFC0 -#define S_036010_PERF_SEL3(x) (((unsigned)(x) & 0x3F) << 10) -#define G_036010_PERF_SEL3(x) (((x) >> 10) & 0x3F) -#define C_036010_PERF_SEL3 0xFFFF03FF -#define R_036014_CPF_PERFCOUNTER1_SELECT 0x036014 -#define R_036018_CPF_PERFCOUNTER0_SELECT1 0x036018 -#define S_036018_PERF_SEL2(x) (((unsigned)(x) & 0x3F) << 0) -#define G_036018_PERF_SEL2(x) (((x) >> 0) & 0x3F) -#define C_036018_PERF_SEL2 0xFFFFFFC0 -#define S_036018_PERF_SEL3(x) (((unsigned)(x) & 0x3F) << 10) -#define G_036018_PERF_SEL3(x) (((x) >> 10) & 0x3F) -#define C_036018_PERF_SEL3 0xFFFF03FF -#define R_03601C_CPF_PERFCOUNTER0_SELECT 0x03601C -#define S_03601C_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) -#define G_03601C_PERF_SEL(x) (((x) >> 0) & 0x3F) -#define C_03601C_PERF_SEL 0xFFFFFFC0 -#define S_03601C_PERF_SEL1(x) (((unsigned)(x) & 0x3F) << 10) -#define G_03601C_PERF_SEL1(x) (((x) >> 10) & 0x3F) -#define C_03601C_PERF_SEL1 0xFFFF03FF -#define S_03601C_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) -#define G_03601C_CNTR_MODE(x) (((x) >> 20) & 0x0F) -#define C_03601C_CNTR_MODE 0xFF0FFFFF -#define R_036020_CP_PERFMON_CNTL 0x036020 -#define S_036020_PERFMON_STATE(x) (((unsigned)(x) & 0x0F) << 0) -#define G_036020_PERFMON_STATE(x) (((x) >> 0) & 0x0F) -#define C_036020_PERFMON_STATE 0xFFFFFFF0 -#define V_036020_DISABLE_AND_RESET 0x00 -#define V_036020_START_COUNTING 0x01 -#define V_036020_STOP_COUNTING 0x02 -#define S_036020_SPM_PERFMON_STATE(x) (((unsigned)(x) & 0x0F) << 4) -#define G_036020_SPM_PERFMON_STATE(x) (((x) >> 4) & 0x0F) -#define C_036020_SPM_PERFMON_STATE 0xFFFFFF0F -#define S_036020_PERFMON_ENABLE_MODE(x) (((unsigned)(x) & 0x03) << 8) -#define G_036020_PERFMON_ENABLE_MODE(x) (((x) >> 8) & 0x03) -#define C_036020_PERFMON_ENABLE_MODE 0xFFFFFCFF -#define S_036020_PERFMON_SAMPLE_ENABLE(x) (((unsigned)(x) & 0x1) << 10) -#define G_036020_PERFMON_SAMPLE_ENABLE(x) (((x) >> 10) & 0x1) -#define C_036020_PERFMON_SAMPLE_ENABLE 0xFFFFFBFF -#define R_036024_CPC_PERFCOUNTER0_SELECT 0x036024 -#define S_036024_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) -#define G_036024_PERF_SEL(x) (((x) >> 0) & 0x3F) -#define C_036024_PERF_SEL 0xFFFFFFC0 -#define S_036024_PERF_SEL1(x) (((unsigned)(x) & 0x3F) << 10) -#define G_036024_PERF_SEL1(x) (((x) >> 10) & 0x3F) -#define C_036024_PERF_SEL1 0xFFFF03FF -#define S_036024_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) -#define G_036024_CNTR_MODE(x) (((x) >> 20) & 0x0F) -#define C_036024_CNTR_MODE 0xFF0FFFFF -#define R_036100_GRBM_PERFCOUNTER0_SELECT 0x036100 -#define S_036100_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) -#define G_036100_PERF_SEL(x) (((x) >> 0) & 0x3F) -#define C_036100_PERF_SEL 0xFFFFFFC0 -#define S_036100_DB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 10) -#define G_036100_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1) -#define C_036100_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF -#define S_036100_CB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 11) -#define G_036100_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1) -#define C_036100_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF -#define S_036100_VGT_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 12) -#define G_036100_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1) -#define C_036100_VGT_BUSY_USER_DEFINED_MASK 0xFFFFEFFF -#define S_036100_TA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 13) -#define G_036100_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1) -#define C_036100_TA_BUSY_USER_DEFINED_MASK 0xFFFFDFFF -#define S_036100_SX_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 14) -#define G_036100_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 14) & 0x1) -#define C_036100_SX_BUSY_USER_DEFINED_MASK 0xFFFFBFFF -#define S_036100_SPI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 16) -#define G_036100_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1) -#define C_036100_SPI_BUSY_USER_DEFINED_MASK 0xFFFEFFFF -#define S_036100_SC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 17) -#define G_036100_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1) -#define C_036100_SC_BUSY_USER_DEFINED_MASK 0xFFFDFFFF -#define S_036100_PA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 18) -#define G_036100_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1) -#define C_036100_PA_BUSY_USER_DEFINED_MASK 0xFFFBFFFF -#define S_036100_GRBM_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 19) -#define G_036100_GRBM_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1) -#define C_036100_GRBM_BUSY_USER_DEFINED_MASK 0xFFF7FFFF -#define S_036100_DB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 20) -#define G_036100_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1) -#define C_036100_DB_BUSY_USER_DEFINED_MASK 0xFFEFFFFF -#define S_036100_CB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 21) -#define G_036100_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1) -#define C_036100_CB_BUSY_USER_DEFINED_MASK 0xFFDFFFFF -#define S_036100_CP_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 22) -#define G_036100_CP_BUSY_USER_DEFINED_MASK(x) (((x) >> 22) & 0x1) -#define C_036100_CP_BUSY_USER_DEFINED_MASK 0xFFBFFFFF -#define S_036100_IA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 23) -#define G_036100_IA_BUSY_USER_DEFINED_MASK(x) (((x) >> 23) & 0x1) -#define C_036100_IA_BUSY_USER_DEFINED_MASK 0xFF7FFFFF -#define S_036100_GDS_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 24) -#define G_036100_GDS_BUSY_USER_DEFINED_MASK(x) (((x) >> 24) & 0x1) -#define C_036100_GDS_BUSY_USER_DEFINED_MASK 0xFEFFFFFF -#define S_036100_BCI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 25) -#define G_036100_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 25) & 0x1) -#define C_036100_BCI_BUSY_USER_DEFINED_MASK 0xFDFFFFFF -#define S_036100_RLC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 26) -#define G_036100_RLC_BUSY_USER_DEFINED_MASK(x) (((x) >> 26) & 0x1) -#define C_036100_RLC_BUSY_USER_DEFINED_MASK 0xFBFFFFFF -#define S_036100_TC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 27) -#define G_036100_TC_BUSY_USER_DEFINED_MASK(x) (((x) >> 27) & 0x1) -#define C_036100_TC_BUSY_USER_DEFINED_MASK 0xF7FFFFFF -#define S_036100_WD_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 28) -#define G_036100_WD_BUSY_USER_DEFINED_MASK(x) (((x) >> 28) & 0x1) -#define C_036100_WD_BUSY_USER_DEFINED_MASK 0xEFFFFFFF -#define R_036104_GRBM_PERFCOUNTER1_SELECT 0x036104 -#define R_036108_GRBM_SE0_PERFCOUNTER_SELECT 0x036108 -#define S_036108_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) -#define G_036108_PERF_SEL(x) (((x) >> 0) & 0x3F) -#define C_036108_PERF_SEL 0xFFFFFFC0 -#define S_036108_DB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 10) -#define G_036108_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1) -#define C_036108_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF -#define S_036108_CB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 11) -#define G_036108_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1) -#define C_036108_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF -#define S_036108_TA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 12) -#define G_036108_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1) -#define C_036108_TA_BUSY_USER_DEFINED_MASK 0xFFFFEFFF -#define S_036108_SX_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 13) -#define G_036108_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1) -#define C_036108_SX_BUSY_USER_DEFINED_MASK 0xFFFFDFFF -#define S_036108_SPI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 15) -#define G_036108_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 15) & 0x1) -#define C_036108_SPI_BUSY_USER_DEFINED_MASK 0xFFFF7FFF -#define S_036108_SC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 16) -#define G_036108_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1) -#define C_036108_SC_BUSY_USER_DEFINED_MASK 0xFFFEFFFF -#define S_036108_DB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 17) -#define G_036108_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1) -#define C_036108_DB_BUSY_USER_DEFINED_MASK 0xFFFDFFFF -#define S_036108_CB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 18) -#define G_036108_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1) -#define C_036108_CB_BUSY_USER_DEFINED_MASK 0xFFFBFFFF -#define S_036108_VGT_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 19) -#define G_036108_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1) -#define C_036108_VGT_BUSY_USER_DEFINED_MASK 0xFFF7FFFF -#define S_036108_PA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 20) -#define G_036108_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1) -#define C_036108_PA_BUSY_USER_DEFINED_MASK 0xFFEFFFFF -#define S_036108_BCI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 21) -#define G_036108_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1) -#define C_036108_BCI_BUSY_USER_DEFINED_MASK 0xFFDFFFFF -#define R_03610C_GRBM_SE1_PERFCOUNTER_SELECT 0x03610C -#define S_03610C_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) -#define G_03610C_PERF_SEL(x) (((x) >> 0) & 0x3F) -#define C_03610C_PERF_SEL 0xFFFFFFC0 -#define S_03610C_DB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 10) -#define G_03610C_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1) -#define C_03610C_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF -#define S_03610C_CB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 11) -#define G_03610C_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1) -#define C_03610C_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF -#define S_03610C_TA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 12) -#define G_03610C_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1) -#define C_03610C_TA_BUSY_USER_DEFINED_MASK 0xFFFFEFFF -#define S_03610C_SX_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 13) -#define G_03610C_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1) -#define C_03610C_SX_BUSY_USER_DEFINED_MASK 0xFFFFDFFF -#define S_03610C_SPI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 15) -#define G_03610C_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 15) & 0x1) -#define C_03610C_SPI_BUSY_USER_DEFINED_MASK 0xFFFF7FFF -#define S_03610C_SC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 16) -#define G_03610C_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1) -#define C_03610C_SC_BUSY_USER_DEFINED_MASK 0xFFFEFFFF -#define S_03610C_DB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 17) -#define G_03610C_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1) -#define C_03610C_DB_BUSY_USER_DEFINED_MASK 0xFFFDFFFF -#define S_03610C_CB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 18) -#define G_03610C_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1) -#define C_03610C_CB_BUSY_USER_DEFINED_MASK 0xFFFBFFFF -#define S_03610C_VGT_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 19) -#define G_03610C_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1) -#define C_03610C_VGT_BUSY_USER_DEFINED_MASK 0xFFF7FFFF -#define S_03610C_PA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 20) -#define G_03610C_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1) -#define C_03610C_PA_BUSY_USER_DEFINED_MASK 0xFFEFFFFF -#define S_03610C_BCI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 21) -#define G_03610C_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1) -#define C_03610C_BCI_BUSY_USER_DEFINED_MASK 0xFFDFFFFF -#define R_036110_GRBM_SE2_PERFCOUNTER_SELECT 0x036110 -#define S_036110_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) -#define G_036110_PERF_SEL(x) (((x) >> 0) & 0x3F) -#define C_036110_PERF_SEL 0xFFFFFFC0 -#define S_036110_DB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 10) -#define G_036110_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1) -#define C_036110_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF -#define S_036110_CB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 11) -#define G_036110_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1) -#define C_036110_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF -#define S_036110_TA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 12) -#define G_036110_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1) -#define C_036110_TA_BUSY_USER_DEFINED_MASK 0xFFFFEFFF -#define S_036110_SX_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 13) -#define G_036110_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1) -#define C_036110_SX_BUSY_USER_DEFINED_MASK 0xFFFFDFFF -#define S_036110_SPI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 15) -#define G_036110_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 15) & 0x1) -#define C_036110_SPI_BUSY_USER_DEFINED_MASK 0xFFFF7FFF -#define S_036110_SC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 16) -#define G_036110_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1) -#define C_036110_SC_BUSY_USER_DEFINED_MASK 0xFFFEFFFF -#define S_036110_DB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 17) -#define G_036110_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1) -#define C_036110_DB_BUSY_USER_DEFINED_MASK 0xFFFDFFFF -#define S_036110_CB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 18) -#define G_036110_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1) -#define C_036110_CB_BUSY_USER_DEFINED_MASK 0xFFFBFFFF -#define S_036110_VGT_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 19) -#define G_036110_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1) -#define C_036110_VGT_BUSY_USER_DEFINED_MASK 0xFFF7FFFF -#define S_036110_PA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 20) -#define G_036110_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1) -#define C_036110_PA_BUSY_USER_DEFINED_MASK 0xFFEFFFFF -#define S_036110_BCI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 21) -#define G_036110_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1) -#define C_036110_BCI_BUSY_USER_DEFINED_MASK 0xFFDFFFFF -#define R_036114_GRBM_SE3_PERFCOUNTER_SELECT 0x036114 -#define S_036114_PERF_SEL(x) (((unsigned)(x) & 0x3F) << 0) -#define G_036114_PERF_SEL(x) (((x) >> 0) & 0x3F) -#define C_036114_PERF_SEL 0xFFFFFFC0 -#define S_036114_DB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 10) -#define G_036114_DB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 10) & 0x1) -#define C_036114_DB_CLEAN_USER_DEFINED_MASK 0xFFFFFBFF -#define S_036114_CB_CLEAN_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 11) -#define G_036114_CB_CLEAN_USER_DEFINED_MASK(x) (((x) >> 11) & 0x1) -#define C_036114_CB_CLEAN_USER_DEFINED_MASK 0xFFFFF7FF -#define S_036114_TA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 12) -#define G_036114_TA_BUSY_USER_DEFINED_MASK(x) (((x) >> 12) & 0x1) -#define C_036114_TA_BUSY_USER_DEFINED_MASK 0xFFFFEFFF -#define S_036114_SX_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 13) -#define G_036114_SX_BUSY_USER_DEFINED_MASK(x) (((x) >> 13) & 0x1) -#define C_036114_SX_BUSY_USER_DEFINED_MASK 0xFFFFDFFF -#define S_036114_SPI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 15) -#define G_036114_SPI_BUSY_USER_DEFINED_MASK(x) (((x) >> 15) & 0x1) -#define C_036114_SPI_BUSY_USER_DEFINED_MASK 0xFFFF7FFF -#define S_036114_SC_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 16) -#define G_036114_SC_BUSY_USER_DEFINED_MASK(x) (((x) >> 16) & 0x1) -#define C_036114_SC_BUSY_USER_DEFINED_MASK 0xFFFEFFFF -#define S_036114_DB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 17) -#define G_036114_DB_BUSY_USER_DEFINED_MASK(x) (((x) >> 17) & 0x1) -#define C_036114_DB_BUSY_USER_DEFINED_MASK 0xFFFDFFFF -#define S_036114_CB_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 18) -#define G_036114_CB_BUSY_USER_DEFINED_MASK(x) (((x) >> 18) & 0x1) -#define C_036114_CB_BUSY_USER_DEFINED_MASK 0xFFFBFFFF -#define S_036114_VGT_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 19) -#define G_036114_VGT_BUSY_USER_DEFINED_MASK(x) (((x) >> 19) & 0x1) -#define C_036114_VGT_BUSY_USER_DEFINED_MASK 0xFFF7FFFF -#define S_036114_PA_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 20) -#define G_036114_PA_BUSY_USER_DEFINED_MASK(x) (((x) >> 20) & 0x1) -#define C_036114_PA_BUSY_USER_DEFINED_MASK 0xFFEFFFFF -#define S_036114_BCI_BUSY_USER_DEFINED_MASK(x) (((unsigned)(x) & 0x1) << 21) -#define G_036114_BCI_BUSY_USER_DEFINED_MASK(x) (((x) >> 21) & 0x1) -#define C_036114_BCI_BUSY_USER_DEFINED_MASK 0xFFDFFFFF -#define R_036200_WD_PERFCOUNTER0_SELECT 0x036200 -#define S_036200_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) -#define G_036200_PERF_SEL(x) (((x) >> 0) & 0xFF) -#define C_036200_PERF_SEL 0xFFFFFF00 -#define S_036200_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) -#define G_036200_PERF_MODE(x) (((x) >> 28) & 0x0F) -#define C_036200_PERF_MODE 0x0FFFFFFF -#define R_036204_WD_PERFCOUNTER1_SELECT 0x036204 -#define R_036208_WD_PERFCOUNTER2_SELECT 0x036208 -#define R_03620C_WD_PERFCOUNTER3_SELECT 0x03620C -#define R_036210_IA_PERFCOUNTER0_SELECT 0x036210 -#define S_036210_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_036210_PERF_SEL(x) (((x) >> 0) & 0x3FF) -#define C_036210_PERF_SEL 0xFFFFFC00 -#define S_036210_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) -#define G_036210_PERF_SEL1(x) (((x) >> 10) & 0x3FF) -#define C_036210_PERF_SEL1 0xFFF003FF -#define S_036210_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) -#define G_036210_CNTR_MODE(x) (((x) >> 20) & 0x0F) -#define C_036210_CNTR_MODE 0xFF0FFFFF -#define S_036210_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) -#define G_036210_PERF_MODE1(x) (((x) >> 24) & 0x0F) -#define C_036210_PERF_MODE1 0xF0FFFFFF -#define S_036210_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) -#define G_036210_PERF_MODE(x) (((x) >> 28) & 0x0F) -#define C_036210_PERF_MODE 0x0FFFFFFF -#define R_036214_IA_PERFCOUNTER1_SELECT 0x036214 -#define R_036218_IA_PERFCOUNTER2_SELECT 0x036218 -#define R_03621C_IA_PERFCOUNTER3_SELECT 0x03621C -#define R_036220_IA_PERFCOUNTER0_SELECT1 0x036220 -#define S_036220_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_036220_PERF_SEL2(x) (((x) >> 0) & 0x3FF) -#define C_036220_PERF_SEL2 0xFFFFFC00 -#define S_036220_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) -#define G_036220_PERF_SEL3(x) (((x) >> 10) & 0x3FF) -#define C_036220_PERF_SEL3 0xFFF003FF -#define S_036220_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) -#define G_036220_PERF_MODE3(x) (((x) >> 24) & 0x0F) -#define C_036220_PERF_MODE3 0xF0FFFFFF -#define S_036220_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) -#define G_036220_PERF_MODE2(x) (((x) >> 28) & 0x0F) -#define C_036220_PERF_MODE2 0x0FFFFFFF -#define R_036230_VGT_PERFCOUNTER0_SELECT 0x036230 -#define S_036230_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_036230_PERF_SEL(x) (((x) >> 0) & 0x3FF) -#define C_036230_PERF_SEL 0xFFFFFC00 -#define S_036230_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) -#define G_036230_PERF_SEL1(x) (((x) >> 10) & 0x3FF) -#define C_036230_PERF_SEL1 0xFFF003FF -#define S_036230_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) -#define G_036230_CNTR_MODE(x) (((x) >> 20) & 0x0F) -#define C_036230_CNTR_MODE 0xFF0FFFFF -#define S_036230_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) -#define G_036230_PERF_MODE1(x) (((x) >> 24) & 0x0F) -#define C_036230_PERF_MODE1 0xF0FFFFFF -#define S_036230_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) -#define G_036230_PERF_MODE(x) (((x) >> 28) & 0x0F) -#define C_036230_PERF_MODE 0x0FFFFFFF -#define R_036234_VGT_PERFCOUNTER1_SELECT 0x036234 -#define R_036238_VGT_PERFCOUNTER2_SELECT 0x036238 -#define R_03623C_VGT_PERFCOUNTER3_SELECT 0x03623C -#define R_036240_VGT_PERFCOUNTER0_SELECT1 0x036240 -#define S_036240_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_036240_PERF_SEL2(x) (((x) >> 0) & 0x3FF) -#define C_036240_PERF_SEL2 0xFFFFFC00 -#define S_036240_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) -#define G_036240_PERF_SEL3(x) (((x) >> 10) & 0x3FF) -#define C_036240_PERF_SEL3 0xFFF003FF -#define S_036240_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) -#define G_036240_PERF_MODE3(x) (((x) >> 24) & 0x0F) -#define C_036240_PERF_MODE3 0xF0FFFFFF -#define S_036240_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) -#define G_036240_PERF_MODE2(x) (((x) >> 28) & 0x0F) -#define C_036240_PERF_MODE2 0x0FFFFFFF -#define R_036244_VGT_PERFCOUNTER1_SELECT1 0x036244 -#define R_036250_VGT_PERFCOUNTER_SEID_MASK 0x036250 -#define S_036250_PERF_SEID_IGNORE_MASK(x) (((unsigned)(x) & 0xFF) << 0) -#define G_036250_PERF_SEID_IGNORE_MASK(x) (((x) >> 0) & 0xFF) -#define C_036250_PERF_SEID_IGNORE_MASK 0xFFFFFF00 -#define R_036400_PA_SU_PERFCOUNTER0_SELECT 0x036400 -#define S_036400_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_036400_PERF_SEL(x) (((x) >> 0) & 0x3FF) -#define C_036400_PERF_SEL 0xFFFFFC00 -#define S_036400_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) -#define G_036400_PERF_SEL1(x) (((x) >> 10) & 0x3FF) -#define C_036400_PERF_SEL1 0xFFF003FF -#define S_036400_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) -#define G_036400_CNTR_MODE(x) (((x) >> 20) & 0x0F) -#define C_036400_CNTR_MODE 0xFF0FFFFF -#define R_036404_PA_SU_PERFCOUNTER0_SELECT1 0x036404 -#define S_036404_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_036404_PERF_SEL2(x) (((x) >> 0) & 0x3FF) -#define C_036404_PERF_SEL2 0xFFFFFC00 -#define S_036404_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) -#define G_036404_PERF_SEL3(x) (((x) >> 10) & 0x3FF) -#define C_036404_PERF_SEL3 0xFFF003FF -#define R_036408_PA_SU_PERFCOUNTER1_SELECT 0x036408 -#define R_03640C_PA_SU_PERFCOUNTER1_SELECT1 0x03640C -#define R_036410_PA_SU_PERFCOUNTER2_SELECT 0x036410 -#define R_036414_PA_SU_PERFCOUNTER3_SELECT 0x036414 -#define R_036500_PA_SC_PERFCOUNTER0_SELECT 0x036500 -#define S_036500_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_036500_PERF_SEL(x) (((x) >> 0) & 0x3FF) -#define C_036500_PERF_SEL 0xFFFFFC00 -#define S_036500_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) -#define G_036500_PERF_SEL1(x) (((x) >> 10) & 0x3FF) -#define C_036500_PERF_SEL1 0xFFF003FF -#define S_036500_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) -#define G_036500_CNTR_MODE(x) (((x) >> 20) & 0x0F) -#define C_036500_CNTR_MODE 0xFF0FFFFF -#define R_036504_PA_SC_PERFCOUNTER0_SELECT1 0x036504 -#define S_036504_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_036504_PERF_SEL2(x) (((x) >> 0) & 0x3FF) -#define C_036504_PERF_SEL2 0xFFFFFC00 -#define S_036504_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) -#define G_036504_PERF_SEL3(x) (((x) >> 10) & 0x3FF) -#define C_036504_PERF_SEL3 0xFFF003FF -#define R_036508_PA_SC_PERFCOUNTER1_SELECT 0x036508 -#define R_03650C_PA_SC_PERFCOUNTER2_SELECT 0x03650C -#define R_036510_PA_SC_PERFCOUNTER3_SELECT 0x036510 -#define R_036514_PA_SC_PERFCOUNTER4_SELECT 0x036514 -#define R_036518_PA_SC_PERFCOUNTER5_SELECT 0x036518 -#define R_03651C_PA_SC_PERFCOUNTER6_SELECT 0x03651C -#define R_036520_PA_SC_PERFCOUNTER7_SELECT 0x036520 -#define R_036600_SPI_PERFCOUNTER0_SELECT 0x036600 -#define S_036600_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_036600_PERF_SEL(x) (((x) >> 0) & 0x3FF) -#define C_036600_PERF_SEL 0xFFFFFC00 -#define S_036600_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) -#define G_036600_PERF_SEL1(x) (((x) >> 10) & 0x3FF) -#define C_036600_PERF_SEL1 0xFFF003FF -#define S_036600_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) -#define G_036600_CNTR_MODE(x) (((x) >> 20) & 0x0F) -#define C_036600_CNTR_MODE 0xFF0FFFFF -#define R_036604_SPI_PERFCOUNTER1_SELECT 0x036604 -#define R_036608_SPI_PERFCOUNTER2_SELECT 0x036608 -#define R_03660C_SPI_PERFCOUNTER3_SELECT 0x03660C -#define R_036610_SPI_PERFCOUNTER0_SELECT1 0x036610 -#define S_036610_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_036610_PERF_SEL2(x) (((x) >> 0) & 0x3FF) -#define C_036610_PERF_SEL2 0xFFFFFC00 -#define S_036610_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) -#define G_036610_PERF_SEL3(x) (((x) >> 10) & 0x3FF) -#define C_036610_PERF_SEL3 0xFFF003FF -#define R_036614_SPI_PERFCOUNTER1_SELECT1 0x036614 -#define R_036618_SPI_PERFCOUNTER2_SELECT1 0x036618 -#define R_03661C_SPI_PERFCOUNTER3_SELECT1 0x03661C -#define R_036620_SPI_PERFCOUNTER4_SELECT 0x036620 -#define R_036624_SPI_PERFCOUNTER5_SELECT 0x036624 -#define R_036628_SPI_PERFCOUNTER_BINS 0x036628 -#define S_036628_BIN0_MIN(x) (((unsigned)(x) & 0x0F) << 0) -#define G_036628_BIN0_MIN(x) (((x) >> 0) & 0x0F) -#define C_036628_BIN0_MIN 0xFFFFFFF0 -#define S_036628_BIN0_MAX(x) (((unsigned)(x) & 0x0F) << 4) -#define G_036628_BIN0_MAX(x) (((x) >> 4) & 0x0F) -#define C_036628_BIN0_MAX 0xFFFFFF0F -#define S_036628_BIN1_MIN(x) (((unsigned)(x) & 0x0F) << 8) -#define G_036628_BIN1_MIN(x) (((x) >> 8) & 0x0F) -#define C_036628_BIN1_MIN 0xFFFFF0FF -#define S_036628_BIN1_MAX(x) (((unsigned)(x) & 0x0F) << 12) -#define G_036628_BIN1_MAX(x) (((x) >> 12) & 0x0F) -#define C_036628_BIN1_MAX 0xFFFF0FFF -#define S_036628_BIN2_MIN(x) (((unsigned)(x) & 0x0F) << 16) -#define G_036628_BIN2_MIN(x) (((x) >> 16) & 0x0F) -#define C_036628_BIN2_MIN 0xFFF0FFFF -#define S_036628_BIN2_MAX(x) (((unsigned)(x) & 0x0F) << 20) -#define G_036628_BIN2_MAX(x) (((x) >> 20) & 0x0F) -#define C_036628_BIN2_MAX 0xFF0FFFFF -#define S_036628_BIN3_MIN(x) (((unsigned)(x) & 0x0F) << 24) -#define G_036628_BIN3_MIN(x) (((x) >> 24) & 0x0F) -#define C_036628_BIN3_MIN 0xF0FFFFFF -#define S_036628_BIN3_MAX(x) (((unsigned)(x) & 0x0F) << 28) -#define G_036628_BIN3_MAX(x) (((x) >> 28) & 0x0F) -#define C_036628_BIN3_MAX 0x0FFFFFFF -#define R_036700_SQ_PERFCOUNTER0_SELECT 0x036700 -#define S_036700_PERF_SEL(x) (((unsigned)(x) & 0x1FF) << 0) -#define G_036700_PERF_SEL(x) (((x) >> 0) & 0x1FF) -#define C_036700_PERF_SEL 0xFFFFFE00 -#define S_036700_SQC_BANK_MASK(x) (((unsigned)(x) & 0x0F) << 12) -#define G_036700_SQC_BANK_MASK(x) (((x) >> 12) & 0x0F) -#define C_036700_SQC_BANK_MASK 0xFFFF0FFF -#define S_036700_SQC_CLIENT_MASK(x) (((unsigned)(x) & 0x0F) << 16) -#define G_036700_SQC_CLIENT_MASK(x) (((x) >> 16) & 0x0F) -#define C_036700_SQC_CLIENT_MASK 0xFFF0FFFF -#define S_036700_SPM_MODE(x) (((unsigned)(x) & 0x0F) << 20) -#define G_036700_SPM_MODE(x) (((x) >> 20) & 0x0F) -#define C_036700_SPM_MODE 0xFF0FFFFF -#define S_036700_SIMD_MASK(x) (((unsigned)(x) & 0x0F) << 24) -#define G_036700_SIMD_MASK(x) (((x) >> 24) & 0x0F) -#define C_036700_SIMD_MASK 0xF0FFFFFF -#define S_036700_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) -#define G_036700_PERF_MODE(x) (((x) >> 28) & 0x0F) -#define C_036700_PERF_MODE 0x0FFFFFFF -#define R_036704_SQ_PERFCOUNTER1_SELECT 0x036704 -#define R_036708_SQ_PERFCOUNTER2_SELECT 0x036708 -#define R_03670C_SQ_PERFCOUNTER3_SELECT 0x03670C -#define R_036710_SQ_PERFCOUNTER4_SELECT 0x036710 -#define R_036714_SQ_PERFCOUNTER5_SELECT 0x036714 -#define R_036718_SQ_PERFCOUNTER6_SELECT 0x036718 -#define R_03671C_SQ_PERFCOUNTER7_SELECT 0x03671C -#define R_036720_SQ_PERFCOUNTER8_SELECT 0x036720 -#define R_036724_SQ_PERFCOUNTER9_SELECT 0x036724 -#define R_036728_SQ_PERFCOUNTER10_SELECT 0x036728 -#define R_03672C_SQ_PERFCOUNTER11_SELECT 0x03672C -#define R_036730_SQ_PERFCOUNTER12_SELECT 0x036730 -#define R_036734_SQ_PERFCOUNTER13_SELECT 0x036734 -#define R_036738_SQ_PERFCOUNTER14_SELECT 0x036738 -#define R_03673C_SQ_PERFCOUNTER15_SELECT 0x03673C -#define R_036780_SQ_PERFCOUNTER_CTRL 0x036780 -#define S_036780_PS_EN(x) (((unsigned)(x) & 0x1) << 0) -#define G_036780_PS_EN(x) (((x) >> 0) & 0x1) -#define C_036780_PS_EN 0xFFFFFFFE -#define S_036780_VS_EN(x) (((unsigned)(x) & 0x1) << 1) -#define G_036780_VS_EN(x) (((x) >> 1) & 0x1) -#define C_036780_VS_EN 0xFFFFFFFD -#define S_036780_GS_EN(x) (((unsigned)(x) & 0x1) << 2) -#define G_036780_GS_EN(x) (((x) >> 2) & 0x1) -#define C_036780_GS_EN 0xFFFFFFFB -#define S_036780_ES_EN(x) (((unsigned)(x) & 0x1) << 3) -#define G_036780_ES_EN(x) (((x) >> 3) & 0x1) -#define C_036780_ES_EN 0xFFFFFFF7 -#define S_036780_HS_EN(x) (((unsigned)(x) & 0x1) << 4) -#define G_036780_HS_EN(x) (((x) >> 4) & 0x1) -#define C_036780_HS_EN 0xFFFFFFEF -#define S_036780_LS_EN(x) (((unsigned)(x) & 0x1) << 5) -#define G_036780_LS_EN(x) (((x) >> 5) & 0x1) -#define C_036780_LS_EN 0xFFFFFFDF -#define S_036780_CS_EN(x) (((unsigned)(x) & 0x1) << 6) -#define G_036780_CS_EN(x) (((x) >> 6) & 0x1) -#define C_036780_CS_EN 0xFFFFFFBF -#define S_036780_CNTR_RATE(x) (((unsigned)(x) & 0x1F) << 8) -#define G_036780_CNTR_RATE(x) (((x) >> 8) & 0x1F) -#define C_036780_CNTR_RATE 0xFFFFE0FF -#define S_036780_DISABLE_FLUSH(x) (((unsigned)(x) & 0x1) << 13) -#define G_036780_DISABLE_FLUSH(x) (((x) >> 13) & 0x1) -#define C_036780_DISABLE_FLUSH 0xFFFFDFFF -#define R_036784_SQ_PERFCOUNTER_MASK 0x036784 -#define S_036784_SH0_MASK(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_036784_SH0_MASK(x) (((x) >> 0) & 0xFFFF) -#define C_036784_SH0_MASK 0xFFFF0000 -#define S_036784_SH1_MASK(x) (((unsigned)(x) & 0xFFFF) << 16) -#define G_036784_SH1_MASK(x) (((x) >> 16) & 0xFFFF) -#define C_036784_SH1_MASK 0x0000FFFF -#define R_036788_SQ_PERFCOUNTER_CTRL2 0x036788 -#define S_036788_FORCE_EN(x) (((unsigned)(x) & 0x1) << 0) -#define G_036788_FORCE_EN(x) (((x) >> 0) & 0x1) -#define C_036788_FORCE_EN 0xFFFFFFFE -#define R_036900_SX_PERFCOUNTER0_SELECT 0x036900 -#define S_036900_PERFCOUNTER_SELECT(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_036900_PERFCOUNTER_SELECT(x) (((x) >> 0) & 0x3FF) -#define C_036900_PERFCOUNTER_SELECT 0xFFFFFC00 -#define S_036900_PERFCOUNTER_SELECT1(x) (((unsigned)(x) & 0x3FF) << 10) -#define G_036900_PERFCOUNTER_SELECT1(x) (((x) >> 10) & 0x3FF) -#define C_036900_PERFCOUNTER_SELECT1 0xFFF003FF -#define S_036900_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) -#define G_036900_CNTR_MODE(x) (((x) >> 20) & 0x0F) -#define C_036900_CNTR_MODE 0xFF0FFFFF -#define R_036904_SX_PERFCOUNTER1_SELECT 0x036904 -#define R_036908_SX_PERFCOUNTER2_SELECT 0x036908 -#define R_03690C_SX_PERFCOUNTER3_SELECT 0x03690C -#define R_036910_SX_PERFCOUNTER0_SELECT1 0x036910 -#define S_036910_PERFCOUNTER_SELECT2(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_036910_PERFCOUNTER_SELECT2(x) (((x) >> 0) & 0x3FF) -#define C_036910_PERFCOUNTER_SELECT2 0xFFFFFC00 -#define S_036910_PERFCOUNTER_SELECT3(x) (((unsigned)(x) & 0x3FF) << 10) -#define G_036910_PERFCOUNTER_SELECT3(x) (((x) >> 10) & 0x3FF) -#define C_036910_PERFCOUNTER_SELECT3 0xFFF003FF -#define R_036914_SX_PERFCOUNTER1_SELECT1 0x036914 -#define R_036A00_GDS_PERFCOUNTER0_SELECT 0x036A00 -#define S_036A00_PERFCOUNTER_SELECT(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_036A00_PERFCOUNTER_SELECT(x) (((x) >> 0) & 0x3FF) -#define C_036A00_PERFCOUNTER_SELECT 0xFFFFFC00 -#define S_036A00_PERFCOUNTER_SELECT1(x) (((unsigned)(x) & 0x3FF) << 10) -#define G_036A00_PERFCOUNTER_SELECT1(x) (((x) >> 10) & 0x3FF) -#define C_036A00_PERFCOUNTER_SELECT1 0xFFF003FF -#define S_036A00_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) -#define G_036A00_CNTR_MODE(x) (((x) >> 20) & 0x0F) -#define C_036A00_CNTR_MODE 0xFF0FFFFF -#define R_036A04_GDS_PERFCOUNTER1_SELECT 0x036A04 -#define R_036A08_GDS_PERFCOUNTER2_SELECT 0x036A08 -#define R_036A0C_GDS_PERFCOUNTER3_SELECT 0x036A0C -#define R_036A10_GDS_PERFCOUNTER0_SELECT1 0x036A10 -#define S_036A10_PERFCOUNTER_SELECT2(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_036A10_PERFCOUNTER_SELECT2(x) (((x) >> 0) & 0x3FF) -#define C_036A10_PERFCOUNTER_SELECT2 0xFFFFFC00 -#define S_036A10_PERFCOUNTER_SELECT3(x) (((unsigned)(x) & 0x3FF) << 10) -#define G_036A10_PERFCOUNTER_SELECT3(x) (((x) >> 10) & 0x3FF) -#define C_036A10_PERFCOUNTER_SELECT3 0xFFF003FF -#define R_036B00_TA_PERFCOUNTER0_SELECT 0x036B00 -#define S_036B00_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) -#define G_036B00_PERF_SEL(x) (((x) >> 0) & 0xFF) -#define C_036B00_PERF_SEL 0xFFFFFF00 -#define S_036B00_PERF_SEL1(x) (((unsigned)(x) & 0xFF) << 10) -#define G_036B00_PERF_SEL1(x) (((x) >> 10) & 0xFF) -#define C_036B00_PERF_SEL1 0xFFFC03FF -#define S_036B00_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) -#define G_036B00_CNTR_MODE(x) (((x) >> 20) & 0x0F) -#define C_036B00_CNTR_MODE 0xFF0FFFFF -#define S_036B00_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) -#define G_036B00_PERF_MODE1(x) (((x) >> 24) & 0x0F) -#define C_036B00_PERF_MODE1 0xF0FFFFFF -#define S_036B00_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) -#define G_036B00_PERF_MODE(x) (((x) >> 28) & 0x0F) -#define C_036B00_PERF_MODE 0x0FFFFFFF -#define R_036B04_TA_PERFCOUNTER0_SELECT1 0x036B04 -#define S_036B04_PERF_SEL2(x) (((unsigned)(x) & 0xFF) << 0) -#define G_036B04_PERF_SEL2(x) (((x) >> 0) & 0xFF) -#define C_036B04_PERF_SEL2 0xFFFFFF00 -#define S_036B04_PERF_SEL3(x) (((unsigned)(x) & 0xFF) << 10) -#define G_036B04_PERF_SEL3(x) (((x) >> 10) & 0xFF) -#define C_036B04_PERF_SEL3 0xFFFC03FF -#define S_036B04_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) -#define G_036B04_PERF_MODE3(x) (((x) >> 24) & 0x0F) -#define C_036B04_PERF_MODE3 0xF0FFFFFF -#define S_036B04_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) -#define G_036B04_PERF_MODE2(x) (((x) >> 28) & 0x0F) -#define C_036B04_PERF_MODE2 0x0FFFFFFF -#define R_036B08_TA_PERFCOUNTER1_SELECT 0x036B08 -#define R_036C00_TD_PERFCOUNTER0_SELECT 0x036C00 -#define S_036C00_PERF_SEL(x) (((unsigned)(x) & 0xFF) << 0) -#define G_036C00_PERF_SEL(x) (((x) >> 0) & 0xFF) -#define C_036C00_PERF_SEL 0xFFFFFF00 -#define S_036C00_PERF_SEL1(x) (((unsigned)(x) & 0xFF) << 10) -#define G_036C00_PERF_SEL1(x) (((x) >> 10) & 0xFF) -#define C_036C00_PERF_SEL1 0xFFFC03FF -#define S_036C00_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) -#define G_036C00_CNTR_MODE(x) (((x) >> 20) & 0x0F) -#define C_036C00_CNTR_MODE 0xFF0FFFFF -#define S_036C00_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) -#define G_036C00_PERF_MODE1(x) (((x) >> 24) & 0x0F) -#define C_036C00_PERF_MODE1 0xF0FFFFFF -#define S_036C00_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) -#define G_036C00_PERF_MODE(x) (((x) >> 28) & 0x0F) -#define C_036C00_PERF_MODE 0x0FFFFFFF -#define R_036C04_TD_PERFCOUNTER0_SELECT1 0x036C04 -#define S_036C04_PERF_SEL2(x) (((unsigned)(x) & 0xFF) << 0) -#define G_036C04_PERF_SEL2(x) (((x) >> 0) & 0xFF) -#define C_036C04_PERF_SEL2 0xFFFFFF00 -#define S_036C04_PERF_SEL3(x) (((unsigned)(x) & 0xFF) << 10) -#define G_036C04_PERF_SEL3(x) (((x) >> 10) & 0xFF) -#define C_036C04_PERF_SEL3 0xFFFC03FF -#define S_036C04_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) -#define G_036C04_PERF_MODE3(x) (((x) >> 24) & 0x0F) -#define C_036C04_PERF_MODE3 0xF0FFFFFF -#define S_036C04_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) -#define G_036C04_PERF_MODE2(x) (((x) >> 28) & 0x0F) -#define C_036C04_PERF_MODE2 0x0FFFFFFF -#define R_036C08_TD_PERFCOUNTER1_SELECT 0x036C08 -#define R_036D00_TCP_PERFCOUNTER0_SELECT 0x036D00 -#define S_036D00_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_036D00_PERF_SEL(x) (((x) >> 0) & 0x3FF) -#define C_036D00_PERF_SEL 0xFFFFFC00 -#define S_036D00_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) -#define G_036D00_PERF_SEL1(x) (((x) >> 10) & 0x3FF) -#define C_036D00_PERF_SEL1 0xFFF003FF -#define S_036D00_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) -#define G_036D00_CNTR_MODE(x) (((x) >> 20) & 0x0F) -#define C_036D00_CNTR_MODE 0xFF0FFFFF -#define S_036D00_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) -#define G_036D00_PERF_MODE1(x) (((x) >> 24) & 0x0F) -#define C_036D00_PERF_MODE1 0xF0FFFFFF -#define S_036D00_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) -#define G_036D00_PERF_MODE(x) (((x) >> 28) & 0x0F) -#define C_036D00_PERF_MODE 0x0FFFFFFF -#define R_036D04_TCP_PERFCOUNTER0_SELECT1 0x036D04 -#define S_036D04_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_036D04_PERF_SEL2(x) (((x) >> 0) & 0x3FF) -#define C_036D04_PERF_SEL2 0xFFFFFC00 -#define S_036D04_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) -#define G_036D04_PERF_SEL3(x) (((x) >> 10) & 0x3FF) -#define C_036D04_PERF_SEL3 0xFFF003FF -#define S_036D04_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) -#define G_036D04_PERF_MODE3(x) (((x) >> 24) & 0x0F) -#define C_036D04_PERF_MODE3 0xF0FFFFFF -#define S_036D04_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) -#define G_036D04_PERF_MODE2(x) (((x) >> 28) & 0x0F) -#define C_036D04_PERF_MODE2 0x0FFFFFFF -#define R_036D08_TCP_PERFCOUNTER1_SELECT 0x036D08 -#define R_036D0C_TCP_PERFCOUNTER1_SELECT1 0x036D0C -#define R_036D10_TCP_PERFCOUNTER2_SELECT 0x036D10 -#define R_036D14_TCP_PERFCOUNTER3_SELECT 0x036D14 -#define R_036E00_TCC_PERFCOUNTER0_SELECT 0x036E00 -#define S_036E00_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_036E00_PERF_SEL(x) (((x) >> 0) & 0x3FF) -#define C_036E00_PERF_SEL 0xFFFFFC00 -#define S_036E00_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) -#define G_036E00_PERF_SEL1(x) (((x) >> 10) & 0x3FF) -#define C_036E00_PERF_SEL1 0xFFF003FF -#define S_036E00_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) -#define G_036E00_CNTR_MODE(x) (((x) >> 20) & 0x0F) -#define C_036E00_CNTR_MODE 0xFF0FFFFF -#define S_036E00_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) -#define G_036E00_PERF_MODE1(x) (((x) >> 24) & 0x0F) -#define C_036E00_PERF_MODE1 0xF0FFFFFF -#define S_036E00_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) -#define G_036E00_PERF_MODE(x) (((x) >> 28) & 0x0F) -#define C_036E00_PERF_MODE 0x0FFFFFFF -#define R_036E04_TCC_PERFCOUNTER0_SELECT1 0x036E04 -#define S_036E04_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_036E04_PERF_SEL2(x) (((x) >> 0) & 0x3FF) -#define C_036E04_PERF_SEL2 0xFFFFFC00 -#define S_036E04_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) -#define G_036E04_PERF_SEL3(x) (((x) >> 10) & 0x3FF) -#define C_036E04_PERF_SEL3 0xFFF003FF -#define S_036E04_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 24) -#define G_036E04_PERF_MODE2(x) (((x) >> 24) & 0x0F) -#define C_036E04_PERF_MODE2 0xF0FFFFFF -#define S_036E04_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 28) -#define G_036E04_PERF_MODE3(x) (((x) >> 28) & 0x0F) -#define C_036E04_PERF_MODE3 0x0FFFFFFF -#define R_036E08_TCC_PERFCOUNTER1_SELECT 0x036E08 -#define R_036E0C_TCC_PERFCOUNTER1_SELECT1 0x036E0C -#define R_036E10_TCC_PERFCOUNTER2_SELECT 0x036E10 -#define R_036E14_TCC_PERFCOUNTER3_SELECT 0x036E14 -#define R_036E40_TCA_PERFCOUNTER0_SELECT 0x036E40 -#define S_036E40_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_036E40_PERF_SEL(x) (((x) >> 0) & 0x3FF) -#define C_036E40_PERF_SEL 0xFFFFFC00 -#define S_036E40_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) -#define G_036E40_PERF_SEL1(x) (((x) >> 10) & 0x3FF) -#define C_036E40_PERF_SEL1 0xFFF003FF -#define S_036E40_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) -#define G_036E40_CNTR_MODE(x) (((x) >> 20) & 0x0F) -#define C_036E40_CNTR_MODE 0xFF0FFFFF -#define S_036E40_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) -#define G_036E40_PERF_MODE1(x) (((x) >> 24) & 0x0F) -#define C_036E40_PERF_MODE1 0xF0FFFFFF -#define S_036E40_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) -#define G_036E40_PERF_MODE(x) (((x) >> 28) & 0x0F) -#define C_036E40_PERF_MODE 0x0FFFFFFF -#define R_036E44_TCA_PERFCOUNTER0_SELECT1 0x036E44 -#define S_036E44_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_036E44_PERF_SEL2(x) (((x) >> 0) & 0x3FF) -#define C_036E44_PERF_SEL2 0xFFFFFC00 -#define S_036E44_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) -#define G_036E44_PERF_SEL3(x) (((x) >> 10) & 0x3FF) -#define C_036E44_PERF_SEL3 0xFFF003FF -#define S_036E44_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 24) -#define G_036E44_PERF_MODE2(x) (((x) >> 24) & 0x0F) -#define C_036E44_PERF_MODE2 0xF0FFFFFF -#define S_036E44_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 28) -#define G_036E44_PERF_MODE3(x) (((x) >> 28) & 0x0F) -#define C_036E44_PERF_MODE3 0x0FFFFFFF -#define R_036E48_TCA_PERFCOUNTER1_SELECT 0x036E48 -#define R_036E4C_TCA_PERFCOUNTER1_SELECT1 0x036E4C -#define R_036E50_TCA_PERFCOUNTER2_SELECT 0x036E50 -#define R_036E54_TCA_PERFCOUNTER3_SELECT 0x036E54 -#define R_037000_CB_PERFCOUNTER_FILTER 0x037000 -#define S_037000_OP_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 0) -#define G_037000_OP_FILTER_ENABLE(x) (((x) >> 0) & 0x1) -#define C_037000_OP_FILTER_ENABLE 0xFFFFFFFE -#define S_037000_OP_FILTER_SEL(x) (((unsigned)(x) & 0x07) << 1) -#define G_037000_OP_FILTER_SEL(x) (((x) >> 1) & 0x07) -#define C_037000_OP_FILTER_SEL 0xFFFFFFF1 -#define S_037000_FORMAT_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 4) -#define G_037000_FORMAT_FILTER_ENABLE(x) (((x) >> 4) & 0x1) -#define C_037000_FORMAT_FILTER_ENABLE 0xFFFFFFEF -#define S_037000_FORMAT_FILTER_SEL(x) (((unsigned)(x) & 0x1F) << 5) -#define G_037000_FORMAT_FILTER_SEL(x) (((x) >> 5) & 0x1F) -#define C_037000_FORMAT_FILTER_SEL 0xFFFFFC1F -#define S_037000_CLEAR_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 10) -#define G_037000_CLEAR_FILTER_ENABLE(x) (((x) >> 10) & 0x1) -#define C_037000_CLEAR_FILTER_ENABLE 0xFFFFFBFF -#define S_037000_CLEAR_FILTER_SEL(x) (((unsigned)(x) & 0x1) << 11) -#define G_037000_CLEAR_FILTER_SEL(x) (((x) >> 11) & 0x1) -#define C_037000_CLEAR_FILTER_SEL 0xFFFFF7FF -#define S_037000_MRT_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 12) -#define G_037000_MRT_FILTER_ENABLE(x) (((x) >> 12) & 0x1) -#define C_037000_MRT_FILTER_ENABLE 0xFFFFEFFF -#define S_037000_MRT_FILTER_SEL(x) (((unsigned)(x) & 0x07) << 13) -#define G_037000_MRT_FILTER_SEL(x) (((x) >> 13) & 0x07) -#define C_037000_MRT_FILTER_SEL 0xFFFF1FFF -#define S_037000_NUM_SAMPLES_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 17) -#define G_037000_NUM_SAMPLES_FILTER_ENABLE(x) (((x) >> 17) & 0x1) -#define C_037000_NUM_SAMPLES_FILTER_ENABLE 0xFFFDFFFF -#define S_037000_NUM_SAMPLES_FILTER_SEL(x) (((unsigned)(x) & 0x07) << 18) -#define G_037000_NUM_SAMPLES_FILTER_SEL(x) (((x) >> 18) & 0x07) -#define C_037000_NUM_SAMPLES_FILTER_SEL 0xFFE3FFFF -#define S_037000_NUM_FRAGMENTS_FILTER_ENABLE(x) (((unsigned)(x) & 0x1) << 21) -#define G_037000_NUM_FRAGMENTS_FILTER_ENABLE(x) (((x) >> 21) & 0x1) -#define C_037000_NUM_FRAGMENTS_FILTER_ENABLE 0xFFDFFFFF -#define S_037000_NUM_FRAGMENTS_FILTER_SEL(x) (((unsigned)(x) & 0x03) << 22) -#define G_037000_NUM_FRAGMENTS_FILTER_SEL(x) (((x) >> 22) & 0x03) -#define C_037000_NUM_FRAGMENTS_FILTER_SEL 0xFF3FFFFF -#define R_037004_CB_PERFCOUNTER0_SELECT 0x037004 -#define S_037004_PERF_SEL(x) (((unsigned)(x) & 0x1FF) << 0) -#define G_037004_PERF_SEL(x) (((x) >> 0) & 0x1FF) -#define C_037004_PERF_SEL 0xFFFFFE00 -#define S_037004_PERF_SEL1(x) (((unsigned)(x) & 0x1FF) << 10) -#define G_037004_PERF_SEL1(x) (((x) >> 10) & 0x1FF) -#define C_037004_PERF_SEL1 0xFFF803FF -#define S_037004_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) -#define G_037004_CNTR_MODE(x) (((x) >> 20) & 0x0F) -#define C_037004_CNTR_MODE 0xFF0FFFFF -#define S_037004_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) -#define G_037004_PERF_MODE1(x) (((x) >> 24) & 0x0F) -#define C_037004_PERF_MODE1 0xF0FFFFFF -#define S_037004_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) -#define G_037004_PERF_MODE(x) (((x) >> 28) & 0x0F) -#define C_037004_PERF_MODE 0x0FFFFFFF -#define R_037008_CB_PERFCOUNTER0_SELECT1 0x037008 -#define S_037008_PERF_SEL2(x) (((unsigned)(x) & 0x1FF) << 0) -#define G_037008_PERF_SEL2(x) (((x) >> 0) & 0x1FF) -#define C_037008_PERF_SEL2 0xFFFFFE00 -#define S_037008_PERF_SEL3(x) (((unsigned)(x) & 0x1FF) << 10) -#define G_037008_PERF_SEL3(x) (((x) >> 10) & 0x1FF) -#define C_037008_PERF_SEL3 0xFFF803FF -#define S_037008_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) -#define G_037008_PERF_MODE3(x) (((x) >> 24) & 0x0F) -#define C_037008_PERF_MODE3 0xF0FFFFFF -#define S_037008_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) -#define G_037008_PERF_MODE2(x) (((x) >> 28) & 0x0F) -#define C_037008_PERF_MODE2 0x0FFFFFFF -#define R_03700C_CB_PERFCOUNTER1_SELECT 0x03700C -#define R_037010_CB_PERFCOUNTER2_SELECT 0x037010 -#define R_037014_CB_PERFCOUNTER3_SELECT 0x037014 -#define R_037100_DB_PERFCOUNTER0_SELECT 0x037100 -#define S_037100_PERF_SEL(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_037100_PERF_SEL(x) (((x) >> 0) & 0x3FF) -#define C_037100_PERF_SEL 0xFFFFFC00 -#define S_037100_PERF_SEL1(x) (((unsigned)(x) & 0x3FF) << 10) -#define G_037100_PERF_SEL1(x) (((x) >> 10) & 0x3FF) -#define C_037100_PERF_SEL1 0xFFF003FF -#define S_037100_CNTR_MODE(x) (((unsigned)(x) & 0x0F) << 20) -#define G_037100_CNTR_MODE(x) (((x) >> 20) & 0x0F) -#define C_037100_CNTR_MODE 0xFF0FFFFF -#define S_037100_PERF_MODE1(x) (((unsigned)(x) & 0x0F) << 24) -#define G_037100_PERF_MODE1(x) (((x) >> 24) & 0x0F) -#define C_037100_PERF_MODE1 0xF0FFFFFF -#define S_037100_PERF_MODE(x) (((unsigned)(x) & 0x0F) << 28) -#define G_037100_PERF_MODE(x) (((x) >> 28) & 0x0F) -#define C_037100_PERF_MODE 0x0FFFFFFF -#define R_037104_DB_PERFCOUNTER0_SELECT1 0x037104 -#define S_037104_PERF_SEL2(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_037104_PERF_SEL2(x) (((x) >> 0) & 0x3FF) -#define C_037104_PERF_SEL2 0xFFFFFC00 -#define S_037104_PERF_SEL3(x) (((unsigned)(x) & 0x3FF) << 10) -#define G_037104_PERF_SEL3(x) (((x) >> 10) & 0x3FF) -#define C_037104_PERF_SEL3 0xFFF003FF -#define S_037104_PERF_MODE3(x) (((unsigned)(x) & 0x0F) << 24) -#define G_037104_PERF_MODE3(x) (((x) >> 24) & 0x0F) -#define C_037104_PERF_MODE3 0xF0FFFFFF -#define S_037104_PERF_MODE2(x) (((unsigned)(x) & 0x0F) << 28) -#define G_037104_PERF_MODE2(x) (((x) >> 28) & 0x0F) -#define C_037104_PERF_MODE2 0x0FFFFFFF -#define R_037108_DB_PERFCOUNTER1_SELECT 0x037108 -#define R_03710C_DB_PERFCOUNTER1_SELECT1 0x03710C -#define R_037110_DB_PERFCOUNTER2_SELECT 0x037110 -#define R_037118_DB_PERFCOUNTER3_SELECT 0x037118 -#define R_028000_DB_RENDER_CONTROL 0x028000 -#define S_028000_DEPTH_CLEAR_ENABLE(x) (((unsigned)(x) & 0x1) << 0) -#define G_028000_DEPTH_CLEAR_ENABLE(x) (((x) >> 0) & 0x1) -#define C_028000_DEPTH_CLEAR_ENABLE 0xFFFFFFFE -#define S_028000_STENCIL_CLEAR_ENABLE(x) (((unsigned)(x) & 0x1) << 1) -#define G_028000_STENCIL_CLEAR_ENABLE(x) (((x) >> 1) & 0x1) -#define C_028000_STENCIL_CLEAR_ENABLE 0xFFFFFFFD -#define S_028000_DEPTH_COPY(x) (((unsigned)(x) & 0x1) << 2) -#define G_028000_DEPTH_COPY(x) (((x) >> 2) & 0x1) -#define C_028000_DEPTH_COPY 0xFFFFFFFB -#define S_028000_STENCIL_COPY(x) (((unsigned)(x) & 0x1) << 3) -#define G_028000_STENCIL_COPY(x) (((x) >> 3) & 0x1) -#define C_028000_STENCIL_COPY 0xFFFFFFF7 -#define S_028000_RESUMMARIZE_ENABLE(x) (((unsigned)(x) & 0x1) << 4) -#define G_028000_RESUMMARIZE_ENABLE(x) (((x) >> 4) & 0x1) -#define C_028000_RESUMMARIZE_ENABLE 0xFFFFFFEF -#define S_028000_STENCIL_COMPRESS_DISABLE(x) (((unsigned)(x) & 0x1) << 5) -#define G_028000_STENCIL_COMPRESS_DISABLE(x) (((x) >> 5) & 0x1) -#define C_028000_STENCIL_COMPRESS_DISABLE 0xFFFFFFDF -#define S_028000_DEPTH_COMPRESS_DISABLE(x) (((unsigned)(x) & 0x1) << 6) -#define G_028000_DEPTH_COMPRESS_DISABLE(x) (((x) >> 6) & 0x1) -#define C_028000_DEPTH_COMPRESS_DISABLE 0xFFFFFFBF -#define S_028000_COPY_CENTROID(x) (((unsigned)(x) & 0x1) << 7) -#define G_028000_COPY_CENTROID(x) (((x) >> 7) & 0x1) -#define C_028000_COPY_CENTROID 0xFFFFFF7F -#define S_028000_COPY_SAMPLE(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028000_COPY_SAMPLE(x) (((x) >> 8) & 0x0F) -#define C_028000_COPY_SAMPLE 0xFFFFF0FF -/* VI */ -#define S_028000_DECOMPRESS_ENABLE(x) (((unsigned)(x) & 0x1) << 12) -#define G_028000_DECOMPRESS_ENABLE(x) (((x) >> 12) & 0x1) -#define C_028000_DECOMPRESS_ENABLE 0xFFFFEFFF -/* */ -#define R_028004_DB_COUNT_CONTROL 0x028004 -#define S_028004_ZPASS_INCREMENT_DISABLE(x) (((unsigned)(x) & 0x1) << 0) -#define G_028004_ZPASS_INCREMENT_DISABLE(x) (((x) >> 0) & 0x1) -#define C_028004_ZPASS_INCREMENT_DISABLE 0xFFFFFFFE -#define S_028004_PERFECT_ZPASS_COUNTS(x) (((unsigned)(x) & 0x1) << 1) -#define G_028004_PERFECT_ZPASS_COUNTS(x) (((x) >> 1) & 0x1) -#define C_028004_PERFECT_ZPASS_COUNTS 0xFFFFFFFD -#define S_028004_SAMPLE_RATE(x) (((unsigned)(x) & 0x07) << 4) -#define G_028004_SAMPLE_RATE(x) (((x) >> 4) & 0x07) -#define C_028004_SAMPLE_RATE 0xFFFFFF8F -/* CIK */ -#define S_028004_ZPASS_ENABLE(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028004_ZPASS_ENABLE(x) (((x) >> 8) & 0x0F) -#define C_028004_ZPASS_ENABLE 0xFFFFF0FF -#define S_028004_ZFAIL_ENABLE(x) (((unsigned)(x) & 0x0F) << 12) -#define G_028004_ZFAIL_ENABLE(x) (((x) >> 12) & 0x0F) -#define C_028004_ZFAIL_ENABLE 0xFFFF0FFF -#define S_028004_SFAIL_ENABLE(x) (((unsigned)(x) & 0x0F) << 16) -#define G_028004_SFAIL_ENABLE(x) (((x) >> 16) & 0x0F) -#define C_028004_SFAIL_ENABLE 0xFFF0FFFF -#define S_028004_DBFAIL_ENABLE(x) (((unsigned)(x) & 0x0F) << 20) -#define G_028004_DBFAIL_ENABLE(x) (((x) >> 20) & 0x0F) -#define C_028004_DBFAIL_ENABLE 0xFF0FFFFF -#define S_028004_SLICE_EVEN_ENABLE(x) (((unsigned)(x) & 0x0F) << 24) -#define G_028004_SLICE_EVEN_ENABLE(x) (((x) >> 24) & 0x0F) -#define C_028004_SLICE_EVEN_ENABLE 0xF0FFFFFF -#define S_028004_SLICE_ODD_ENABLE(x) (((unsigned)(x) & 0x0F) << 28) -#define G_028004_SLICE_ODD_ENABLE(x) (((x) >> 28) & 0x0F) -#define C_028004_SLICE_ODD_ENABLE 0x0FFFFFFF -/* */ -#define R_028008_DB_DEPTH_VIEW 0x028008 -#define S_028008_SLICE_START(x) (((unsigned)(x) & 0x7FF) << 0) -#define G_028008_SLICE_START(x) (((x) >> 0) & 0x7FF) -#define C_028008_SLICE_START 0xFFFFF800 -#define S_028008_SLICE_MAX(x) (((unsigned)(x) & 0x7FF) << 13) -#define G_028008_SLICE_MAX(x) (((x) >> 13) & 0x7FF) -#define C_028008_SLICE_MAX 0xFF001FFF -#define S_028008_Z_READ_ONLY(x) (((unsigned)(x) & 0x1) << 24) -#define G_028008_Z_READ_ONLY(x) (((x) >> 24) & 0x1) -#define C_028008_Z_READ_ONLY 0xFEFFFFFF -#define S_028008_STENCIL_READ_ONLY(x) (((unsigned)(x) & 0x1) << 25) -#define G_028008_STENCIL_READ_ONLY(x) (((x) >> 25) & 0x1) -#define C_028008_STENCIL_READ_ONLY 0xFDFFFFFF -#define R_02800C_DB_RENDER_OVERRIDE 0x02800C -#define S_02800C_FORCE_HIZ_ENABLE(x) (((unsigned)(x) & 0x03) << 0) -#define G_02800C_FORCE_HIZ_ENABLE(x) (((x) >> 0) & 0x03) -#define C_02800C_FORCE_HIZ_ENABLE 0xFFFFFFFC -#define V_02800C_FORCE_OFF 0x00 -#define V_02800C_FORCE_ENABLE 0x01 -#define V_02800C_FORCE_DISABLE 0x02 -#define V_02800C_FORCE_RESERVED 0x03 -#define S_02800C_FORCE_HIS_ENABLE0(x) (((unsigned)(x) & 0x03) << 2) -#define G_02800C_FORCE_HIS_ENABLE0(x) (((x) >> 2) & 0x03) -#define C_02800C_FORCE_HIS_ENABLE0 0xFFFFFFF3 -#define V_02800C_FORCE_OFF 0x00 -#define V_02800C_FORCE_ENABLE 0x01 -#define V_02800C_FORCE_DISABLE 0x02 -#define V_02800C_FORCE_RESERVED 0x03 -#define S_02800C_FORCE_HIS_ENABLE1(x) (((unsigned)(x) & 0x03) << 4) -#define G_02800C_FORCE_HIS_ENABLE1(x) (((x) >> 4) & 0x03) -#define C_02800C_FORCE_HIS_ENABLE1 0xFFFFFFCF -#define V_02800C_FORCE_OFF 0x00 -#define V_02800C_FORCE_ENABLE 0x01 -#define V_02800C_FORCE_DISABLE 0x02 -#define V_02800C_FORCE_RESERVED 0x03 -#define S_02800C_FORCE_SHADER_Z_ORDER(x) (((unsigned)(x) & 0x1) << 6) -#define G_02800C_FORCE_SHADER_Z_ORDER(x) (((x) >> 6) & 0x1) -#define C_02800C_FORCE_SHADER_Z_ORDER 0xFFFFFFBF -#define S_02800C_FAST_Z_DISABLE(x) (((unsigned)(x) & 0x1) << 7) -#define G_02800C_FAST_Z_DISABLE(x) (((x) >> 7) & 0x1) -#define C_02800C_FAST_Z_DISABLE 0xFFFFFF7F -#define S_02800C_FAST_STENCIL_DISABLE(x) (((unsigned)(x) & 0x1) << 8) -#define G_02800C_FAST_STENCIL_DISABLE(x) (((x) >> 8) & 0x1) -#define C_02800C_FAST_STENCIL_DISABLE 0xFFFFFEFF -#define S_02800C_NOOP_CULL_DISABLE(x) (((unsigned)(x) & 0x1) << 9) -#define G_02800C_NOOP_CULL_DISABLE(x) (((x) >> 9) & 0x1) -#define C_02800C_NOOP_CULL_DISABLE 0xFFFFFDFF -#define S_02800C_FORCE_COLOR_KILL(x) (((unsigned)(x) & 0x1) << 10) -#define G_02800C_FORCE_COLOR_KILL(x) (((x) >> 10) & 0x1) -#define C_02800C_FORCE_COLOR_KILL 0xFFFFFBFF -#define S_02800C_FORCE_Z_READ(x) (((unsigned)(x) & 0x1) << 11) -#define G_02800C_FORCE_Z_READ(x) (((x) >> 11) & 0x1) -#define C_02800C_FORCE_Z_READ 0xFFFFF7FF -#define S_02800C_FORCE_STENCIL_READ(x) (((unsigned)(x) & 0x1) << 12) -#define G_02800C_FORCE_STENCIL_READ(x) (((x) >> 12) & 0x1) -#define C_02800C_FORCE_STENCIL_READ 0xFFFFEFFF -#define S_02800C_FORCE_FULL_Z_RANGE(x) (((unsigned)(x) & 0x03) << 13) -#define G_02800C_FORCE_FULL_Z_RANGE(x) (((x) >> 13) & 0x03) -#define C_02800C_FORCE_FULL_Z_RANGE 0xFFFF9FFF -#define V_02800C_FORCE_OFF 0x00 -#define V_02800C_FORCE_ENABLE 0x01 -#define V_02800C_FORCE_DISABLE 0x02 -#define V_02800C_FORCE_RESERVED 0x03 -#define S_02800C_FORCE_QC_SMASK_CONFLICT(x) (((unsigned)(x) & 0x1) << 15) -#define G_02800C_FORCE_QC_SMASK_CONFLICT(x) (((x) >> 15) & 0x1) -#define C_02800C_FORCE_QC_SMASK_CONFLICT 0xFFFF7FFF -#define S_02800C_DISABLE_VIEWPORT_CLAMP(x) (((unsigned)(x) & 0x1) << 16) -#define G_02800C_DISABLE_VIEWPORT_CLAMP(x) (((x) >> 16) & 0x1) -#define C_02800C_DISABLE_VIEWPORT_CLAMP 0xFFFEFFFF -#define S_02800C_IGNORE_SC_ZRANGE(x) (((unsigned)(x) & 0x1) << 17) -#define G_02800C_IGNORE_SC_ZRANGE(x) (((x) >> 17) & 0x1) -#define C_02800C_IGNORE_SC_ZRANGE 0xFFFDFFFF -#define S_02800C_DISABLE_FULLY_COVERED(x) (((unsigned)(x) & 0x1) << 18) -#define G_02800C_DISABLE_FULLY_COVERED(x) (((x) >> 18) & 0x1) -#define C_02800C_DISABLE_FULLY_COVERED 0xFFFBFFFF -#define S_02800C_FORCE_Z_LIMIT_SUMM(x) (((unsigned)(x) & 0x03) << 19) -#define G_02800C_FORCE_Z_LIMIT_SUMM(x) (((x) >> 19) & 0x03) -#define C_02800C_FORCE_Z_LIMIT_SUMM 0xFFE7FFFF -#define V_02800C_FORCE_SUMM_OFF 0x00 -#define V_02800C_FORCE_SUMM_MINZ 0x01 -#define V_02800C_FORCE_SUMM_MAXZ 0x02 -#define V_02800C_FORCE_SUMM_BOTH 0x03 -#define S_02800C_MAX_TILES_IN_DTT(x) (((unsigned)(x) & 0x1F) << 21) -#define G_02800C_MAX_TILES_IN_DTT(x) (((x) >> 21) & 0x1F) -#define C_02800C_MAX_TILES_IN_DTT 0xFC1FFFFF -#define S_02800C_DISABLE_TILE_RATE_TILES(x) (((unsigned)(x) & 0x1) << 26) -#define G_02800C_DISABLE_TILE_RATE_TILES(x) (((x) >> 26) & 0x1) -#define C_02800C_DISABLE_TILE_RATE_TILES 0xFBFFFFFF -#define S_02800C_FORCE_Z_DIRTY(x) (((unsigned)(x) & 0x1) << 27) -#define G_02800C_FORCE_Z_DIRTY(x) (((x) >> 27) & 0x1) -#define C_02800C_FORCE_Z_DIRTY 0xF7FFFFFF -#define S_02800C_FORCE_STENCIL_DIRTY(x) (((unsigned)(x) & 0x1) << 28) -#define G_02800C_FORCE_STENCIL_DIRTY(x) (((x) >> 28) & 0x1) -#define C_02800C_FORCE_STENCIL_DIRTY 0xEFFFFFFF -#define S_02800C_FORCE_Z_VALID(x) (((unsigned)(x) & 0x1) << 29) -#define G_02800C_FORCE_Z_VALID(x) (((x) >> 29) & 0x1) -#define C_02800C_FORCE_Z_VALID 0xDFFFFFFF -#define S_02800C_FORCE_STENCIL_VALID(x) (((unsigned)(x) & 0x1) << 30) -#define G_02800C_FORCE_STENCIL_VALID(x) (((x) >> 30) & 0x1) -#define C_02800C_FORCE_STENCIL_VALID 0xBFFFFFFF -#define S_02800C_PRESERVE_COMPRESSION(x) (((unsigned)(x) & 0x1) << 31) -#define G_02800C_PRESERVE_COMPRESSION(x) (((x) >> 31) & 0x1) -#define C_02800C_PRESERVE_COMPRESSION 0x7FFFFFFF -#define R_028010_DB_RENDER_OVERRIDE2 0x028010 -#define S_028010_PARTIAL_SQUAD_LAUNCH_CONTROL(x) (((unsigned)(x) & 0x03) << 0) -#define G_028010_PARTIAL_SQUAD_LAUNCH_CONTROL(x) (((x) >> 0) & 0x03) -#define C_028010_PARTIAL_SQUAD_LAUNCH_CONTROL 0xFFFFFFFC -#define V_028010_PSLC_AUTO 0x00 -#define V_028010_PSLC_ON_HANG_ONLY 0x01 -#define V_028010_PSLC_ASAP 0x02 -#define V_028010_PSLC_COUNTDOWN 0x03 -#define S_028010_PARTIAL_SQUAD_LAUNCH_COUNTDOWN(x) (((unsigned)(x) & 0x07) << 2) -#define G_028010_PARTIAL_SQUAD_LAUNCH_COUNTDOWN(x) (((x) >> 2) & 0x07) -#define C_028010_PARTIAL_SQUAD_LAUNCH_COUNTDOWN 0xFFFFFFE3 -#define S_028010_DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION(x) (((unsigned)(x) & 0x1) << 5) -#define G_028010_DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION(x) (((x) >> 5) & 0x1) -#define C_028010_DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION 0xFFFFFFDF -#define S_028010_DISABLE_SMEM_EXPCLEAR_OPTIMIZATION(x) (((unsigned)(x) & 0x1) << 6) -#define G_028010_DISABLE_SMEM_EXPCLEAR_OPTIMIZATION(x) (((x) >> 6) & 0x1) -#define C_028010_DISABLE_SMEM_EXPCLEAR_OPTIMIZATION 0xFFFFFFBF -#define S_028010_DISABLE_COLOR_ON_VALIDATION(x) (((unsigned)(x) & 0x1) << 7) -#define G_028010_DISABLE_COLOR_ON_VALIDATION(x) (((x) >> 7) & 0x1) -#define C_028010_DISABLE_COLOR_ON_VALIDATION 0xFFFFFF7F -#define S_028010_DECOMPRESS_Z_ON_FLUSH(x) (((unsigned)(x) & 0x1) << 8) -#define G_028010_DECOMPRESS_Z_ON_FLUSH(x) (((x) >> 8) & 0x1) -#define C_028010_DECOMPRESS_Z_ON_FLUSH 0xFFFFFEFF -#define S_028010_DISABLE_REG_SNOOP(x) (((unsigned)(x) & 0x1) << 9) -#define G_028010_DISABLE_REG_SNOOP(x) (((x) >> 9) & 0x1) -#define C_028010_DISABLE_REG_SNOOP 0xFFFFFDFF -#define S_028010_DEPTH_BOUNDS_HIER_DEPTH_DISABLE(x) (((unsigned)(x) & 0x1) << 10) -#define G_028010_DEPTH_BOUNDS_HIER_DEPTH_DISABLE(x) (((x) >> 10) & 0x1) -#define C_028010_DEPTH_BOUNDS_HIER_DEPTH_DISABLE 0xFFFFFBFF -/* CIK */ -#define S_028010_SEPARATE_HIZS_FUNC_ENABLE(x) (((unsigned)(x) & 0x1) << 11) -#define G_028010_SEPARATE_HIZS_FUNC_ENABLE(x) (((x) >> 11) & 0x1) -#define C_028010_SEPARATE_HIZS_FUNC_ENABLE 0xFFFFF7FF -#define S_028010_HIZ_ZFUNC(x) (((unsigned)(x) & 0x07) << 12) -#define G_028010_HIZ_ZFUNC(x) (((x) >> 12) & 0x07) -#define C_028010_HIZ_ZFUNC 0xFFFF8FFF -#define S_028010_HIS_SFUNC_FF(x) (((unsigned)(x) & 0x07) << 15) -#define G_028010_HIS_SFUNC_FF(x) (((x) >> 15) & 0x07) -#define C_028010_HIS_SFUNC_FF 0xFFFC7FFF -#define S_028010_HIS_SFUNC_BF(x) (((unsigned)(x) & 0x07) << 18) -#define G_028010_HIS_SFUNC_BF(x) (((x) >> 18) & 0x07) -#define C_028010_HIS_SFUNC_BF 0xFFE3FFFF -#define S_028010_PRESERVE_ZRANGE(x) (((unsigned)(x) & 0x1) << 21) -#define G_028010_PRESERVE_ZRANGE(x) (((x) >> 21) & 0x1) -#define C_028010_PRESERVE_ZRANGE 0xFFDFFFFF -#define S_028010_PRESERVE_SRESULTS(x) (((unsigned)(x) & 0x1) << 22) -#define G_028010_PRESERVE_SRESULTS(x) (((x) >> 22) & 0x1) -#define C_028010_PRESERVE_SRESULTS 0xFFBFFFFF -#define S_028010_DISABLE_FAST_PASS(x) (((unsigned)(x) & 0x1) << 23) -#define G_028010_DISABLE_FAST_PASS(x) (((x) >> 23) & 0x1) -#define C_028010_DISABLE_FAST_PASS 0xFF7FFFFF -/* */ -#define R_028014_DB_HTILE_DATA_BASE 0x028014 -#define R_028020_DB_DEPTH_BOUNDS_MIN 0x028020 -#define R_028024_DB_DEPTH_BOUNDS_MAX 0x028024 -#define R_028028_DB_STENCIL_CLEAR 0x028028 -#define S_028028_CLEAR(x) (((unsigned)(x) & 0xFF) << 0) -#define G_028028_CLEAR(x) (((x) >> 0) & 0xFF) -#define C_028028_CLEAR 0xFFFFFF00 -#define R_02802C_DB_DEPTH_CLEAR 0x02802C -#define R_028030_PA_SC_SCREEN_SCISSOR_TL 0x028030 -#define S_028030_TL_X(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_028030_TL_X(x) (((x) >> 0) & 0xFFFF) -#define C_028030_TL_X 0xFFFF0000 -#define S_028030_TL_Y(x) (((unsigned)(x) & 0xFFFF) << 16) -#define G_028030_TL_Y(x) (((x) >> 16) & 0xFFFF) -#define C_028030_TL_Y 0x0000FFFF -#define R_028034_PA_SC_SCREEN_SCISSOR_BR 0x028034 -#define S_028034_BR_X(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_028034_BR_X(x) (((x) >> 0) & 0xFFFF) -#define C_028034_BR_X 0xFFFF0000 -#define S_028034_BR_Y(x) (((unsigned)(x) & 0xFFFF) << 16) -#define G_028034_BR_Y(x) (((x) >> 16) & 0xFFFF) -#define C_028034_BR_Y 0x0000FFFF -#define R_02803C_DB_DEPTH_INFO 0x02803C -#define S_02803C_ADDR5_SWIZZLE_MASK(x) (((unsigned)(x) & 0x0F) << 0) -#define G_02803C_ADDR5_SWIZZLE_MASK(x) (((x) >> 0) & 0x0F) -#define C_02803C_ADDR5_SWIZZLE_MASK 0xFFFFFFF0 -/* CIK */ -#define S_02803C_ARRAY_MODE(x) (((unsigned)(x) & 0x0F) << 4) -#define G_02803C_ARRAY_MODE(x) (((x) >> 4) & 0x0F) -#define C_02803C_ARRAY_MODE 0xFFFFFF0F -#define V_02803C_ARRAY_LINEAR_GENERAL 0x00 -#define V_02803C_ARRAY_LINEAR_ALIGNED 0x01 -#define V_02803C_ARRAY_1D_TILED_THIN1 0x02 -#define V_02803C_ARRAY_2D_TILED_THIN1 0x04 -#define V_02803C_ARRAY_PRT_TILED_THIN1 0x05 -#define V_02803C_ARRAY_PRT_2D_TILED_THIN1 0x06 -#define S_02803C_PIPE_CONFIG(x) (((unsigned)(x) & 0x1F) << 8) -#define G_02803C_PIPE_CONFIG(x) (((x) >> 8) & 0x1F) -#define C_02803C_PIPE_CONFIG 0xFFFFE0FF -#define V_02803C_ADDR_SURF_P2 0x00 -#define V_02803C_X_ADDR_SURF_P4_8X16 0x04 -#define V_02803C_X_ADDR_SURF_P4_16X16 0x05 -#define V_02803C_X_ADDR_SURF_P4_16X32 0x06 -#define V_02803C_X_ADDR_SURF_P4_32X32 0x07 -#define V_02803C_X_ADDR_SURF_P8_16X16_8X16 0x08 -#define V_02803C_X_ADDR_SURF_P8_16X32_8X16 0x09 -#define V_02803C_X_ADDR_SURF_P8_32X32_8X16 0x0A -#define V_02803C_X_ADDR_SURF_P8_16X32_16X16 0x0B -#define V_02803C_X_ADDR_SURF_P8_32X32_16X16 0x0C -#define V_02803C_X_ADDR_SURF_P8_32X32_16X32 0x0D -#define V_02803C_X_ADDR_SURF_P8_32X64_32X32 0x0E -#define V_02803C_X_ADDR_SURF_P16_32X32_8X16 0x10 -#define V_02803C_X_ADDR_SURF_P16_32X32_16X16 0x11 -#define S_02803C_BANK_WIDTH(x) (((unsigned)(x) & 0x03) << 13) -#define G_02803C_BANK_WIDTH(x) (((x) >> 13) & 0x03) -#define C_02803C_BANK_WIDTH 0xFFFF9FFF -#define V_02803C_ADDR_SURF_BANK_WIDTH_1 0x00 -#define V_02803C_ADDR_SURF_BANK_WIDTH_2 0x01 -#define V_02803C_ADDR_SURF_BANK_WIDTH_4 0x02 -#define V_02803C_ADDR_SURF_BANK_WIDTH_8 0x03 -#define S_02803C_BANK_HEIGHT(x) (((unsigned)(x) & 0x03) << 15) -#define G_02803C_BANK_HEIGHT(x) (((x) >> 15) & 0x03) -#define C_02803C_BANK_HEIGHT 0xFFFE7FFF -#define V_02803C_ADDR_SURF_BANK_HEIGHT_1 0x00 -#define V_02803C_ADDR_SURF_BANK_HEIGHT_2 0x01 -#define V_02803C_ADDR_SURF_BANK_HEIGHT_4 0x02 -#define V_02803C_ADDR_SURF_BANK_HEIGHT_8 0x03 -#define S_02803C_MACRO_TILE_ASPECT(x) (((unsigned)(x) & 0x03) << 17) -#define G_02803C_MACRO_TILE_ASPECT(x) (((x) >> 17) & 0x03) -#define C_02803C_MACRO_TILE_ASPECT 0xFFF9FFFF -#define V_02803C_ADDR_SURF_MACRO_ASPECT_1 0x00 -#define V_02803C_ADDR_SURF_MACRO_ASPECT_2 0x01 -#define V_02803C_ADDR_SURF_MACRO_ASPECT_4 0x02 -#define V_02803C_ADDR_SURF_MACRO_ASPECT_8 0x03 -#define S_02803C_NUM_BANKS(x) (((unsigned)(x) & 0x03) << 19) -#define G_02803C_NUM_BANKS(x) (((x) >> 19) & 0x03) -#define C_02803C_NUM_BANKS 0xFFE7FFFF -#define V_02803C_ADDR_SURF_2_BANK 0x00 -#define V_02803C_ADDR_SURF_4_BANK 0x01 -#define V_02803C_ADDR_SURF_8_BANK 0x02 -#define V_02803C_ADDR_SURF_16_BANK 0x03 -/* */ -#define R_028040_DB_Z_INFO 0x028040 -#define S_028040_FORMAT(x) (((unsigned)(x) & 0x03) << 0) -#define G_028040_FORMAT(x) (((x) >> 0) & 0x03) -#define C_028040_FORMAT 0xFFFFFFFC -#define V_028040_Z_INVALID 0x00 -#define V_028040_Z_16 0x01 -#define V_028040_Z_24 0x02 /* deprecated */ -#define V_028040_Z_32_FLOAT 0x03 -#define S_028040_NUM_SAMPLES(x) (((unsigned)(x) & 0x03) << 2) -#define G_028040_NUM_SAMPLES(x) (((x) >> 2) & 0x03) -#define C_028040_NUM_SAMPLES 0xFFFFFFF3 -/* CIK */ -#define S_028040_TILE_SPLIT(x) (((unsigned)(x) & 0x07) << 13) -#define G_028040_TILE_SPLIT(x) (((x) >> 13) & 0x07) -#define C_028040_TILE_SPLIT 0xFFFF1FFF -#define V_028040_ADDR_SURF_TILE_SPLIT_64B 0x00 -#define V_028040_ADDR_SURF_TILE_SPLIT_128B 0x01 -#define V_028040_ADDR_SURF_TILE_SPLIT_256B 0x02 -#define V_028040_ADDR_SURF_TILE_SPLIT_512B 0x03 -#define V_028040_ADDR_SURF_TILE_SPLIT_1KB 0x04 -#define V_028040_ADDR_SURF_TILE_SPLIT_2KB 0x05 -#define V_028040_ADDR_SURF_TILE_SPLIT_4KB 0x06 -/* */ -#define S_028040_TILE_MODE_INDEX(x) (((unsigned)(x) & 0x07) << 20) /* not on CIK */ -#define G_028040_TILE_MODE_INDEX(x) (((x) >> 20) & 0x07) /* not on CIK */ -#define C_028040_TILE_MODE_INDEX 0xFF8FFFFF /* not on CIK */ -/* VI */ -#define S_028040_DECOMPRESS_ON_N_ZPLANES(x) (((unsigned)(x) & 0x0F) << 23) -#define G_028040_DECOMPRESS_ON_N_ZPLANES(x) (((x) >> 23) & 0x0F) -#define C_028040_DECOMPRESS_ON_N_ZPLANES 0xF87FFFFF -/* */ -#define S_028040_ALLOW_EXPCLEAR(x) (((unsigned)(x) & 0x1) << 27) -#define G_028040_ALLOW_EXPCLEAR(x) (((x) >> 27) & 0x1) -#define C_028040_ALLOW_EXPCLEAR 0xF7FFFFFF -#define S_028040_READ_SIZE(x) (((unsigned)(x) & 0x1) << 28) -#define G_028040_READ_SIZE(x) (((x) >> 28) & 0x1) -#define C_028040_READ_SIZE 0xEFFFFFFF -#define S_028040_TILE_SURFACE_ENABLE(x) (((unsigned)(x) & 0x1) << 29) -#define G_028040_TILE_SURFACE_ENABLE(x) (((x) >> 29) & 0x1) -#define C_028040_TILE_SURFACE_ENABLE 0xDFFFFFFF -/* VI */ -#define S_028040_CLEAR_DISALLOWED(x) (((unsigned)(x) & 0x1) << 30) -#define G_028040_CLEAR_DISALLOWED(x) (((x) >> 30) & 0x1) -#define C_028040_CLEAR_DISALLOWED 0xBFFFFFFF -/* */ -#define S_028040_ZRANGE_PRECISION(x) (((unsigned)(x) & 0x1) << 31) -#define G_028040_ZRANGE_PRECISION(x) (((x) >> 31) & 0x1) -#define C_028040_ZRANGE_PRECISION 0x7FFFFFFF -#define R_028044_DB_STENCIL_INFO 0x028044 -#define S_028044_FORMAT(x) (((unsigned)(x) & 0x1) << 0) -#define G_028044_FORMAT(x) (((x) >> 0) & 0x1) -#define C_028044_FORMAT 0xFFFFFFFE -#define V_028044_STENCIL_INVALID 0x00 -#define V_028044_STENCIL_8 0x01 -/* CIK */ -#define S_028044_TILE_SPLIT(x) (((unsigned)(x) & 0x07) << 13) -#define G_028044_TILE_SPLIT(x) (((x) >> 13) & 0x07) -#define C_028044_TILE_SPLIT 0xFFFF1FFF -#define V_028044_ADDR_SURF_TILE_SPLIT_64B 0x00 -#define V_028044_ADDR_SURF_TILE_SPLIT_128B 0x01 -#define V_028044_ADDR_SURF_TILE_SPLIT_256B 0x02 -#define V_028044_ADDR_SURF_TILE_SPLIT_512B 0x03 -#define V_028044_ADDR_SURF_TILE_SPLIT_1KB 0x04 -#define V_028044_ADDR_SURF_TILE_SPLIT_2KB 0x05 -#define V_028044_ADDR_SURF_TILE_SPLIT_4KB 0x06 -/* */ -#define S_028044_TILE_MODE_INDEX(x) (((unsigned)(x) & 0x07) << 20) /* not on CIK */ -#define G_028044_TILE_MODE_INDEX(x) (((x) >> 20) & 0x07) /* not on CIK */ -#define C_028044_TILE_MODE_INDEX 0xFF8FFFFF /* not on CIK */ -#define S_028044_ALLOW_EXPCLEAR(x) (((unsigned)(x) & 0x1) << 27) -#define G_028044_ALLOW_EXPCLEAR(x) (((x) >> 27) & 0x1) -#define C_028044_ALLOW_EXPCLEAR 0xF7FFFFFF -#define S_028044_TILE_STENCIL_DISABLE(x) (((unsigned)(x) & 0x1) << 29) -#define G_028044_TILE_STENCIL_DISABLE(x) (((x) >> 29) & 0x1) -#define C_028044_TILE_STENCIL_DISABLE 0xDFFFFFFF -/* VI */ -#define S_028044_CLEAR_DISALLOWED(x) (((unsigned)(x) & 0x1) << 30) -#define G_028044_CLEAR_DISALLOWED(x) (((x) >> 30) & 0x1) -#define C_028044_CLEAR_DISALLOWED 0xBFFFFFFF -/* */ -#define R_028048_DB_Z_READ_BASE 0x028048 -#define R_02804C_DB_STENCIL_READ_BASE 0x02804C -#define R_028050_DB_Z_WRITE_BASE 0x028050 -#define R_028054_DB_STENCIL_WRITE_BASE 0x028054 -#define R_028058_DB_DEPTH_SIZE 0x028058 -#define S_028058_PITCH_TILE_MAX(x) (((unsigned)(x) & 0x7FF) << 0) -#define G_028058_PITCH_TILE_MAX(x) (((x) >> 0) & 0x7FF) -#define C_028058_PITCH_TILE_MAX 0xFFFFF800 -#define S_028058_HEIGHT_TILE_MAX(x) (((unsigned)(x) & 0x7FF) << 11) -#define G_028058_HEIGHT_TILE_MAX(x) (((x) >> 11) & 0x7FF) -#define C_028058_HEIGHT_TILE_MAX 0xFFC007FF -#define R_02805C_DB_DEPTH_SLICE 0x02805C -#define S_02805C_SLICE_TILE_MAX(x) (((unsigned)(x) & 0x3FFFFF) << 0) -#define G_02805C_SLICE_TILE_MAX(x) (((x) >> 0) & 0x3FFFFF) -#define C_02805C_SLICE_TILE_MAX 0xFFC00000 -#define R_028080_TA_BC_BASE_ADDR 0x028080 -/* CIK */ -#define R_028084_TA_BC_BASE_ADDR_HI 0x028084 -#define S_028084_ADDRESS(x) (((unsigned)(x) & 0xFF) << 0) -#define G_028084_ADDRESS(x) (((x) >> 0) & 0xFF) -#define C_028084_ADDRESS 0xFFFFFF00 -#define R_0281E8_COHER_DEST_BASE_HI_0 0x0281E8 -#define R_0281EC_COHER_DEST_BASE_HI_1 0x0281EC -#define R_0281F0_COHER_DEST_BASE_HI_2 0x0281F0 -#define R_0281F4_COHER_DEST_BASE_HI_3 0x0281F4 -/* */ -#define R_0281F8_COHER_DEST_BASE_2 0x0281F8 -#define R_0281FC_COHER_DEST_BASE_3 0x0281FC -#define R_028200_PA_SC_WINDOW_OFFSET 0x028200 -#define S_028200_WINDOW_X_OFFSET(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_028200_WINDOW_X_OFFSET(x) (((x) >> 0) & 0xFFFF) -#define C_028200_WINDOW_X_OFFSET 0xFFFF0000 -#define S_028200_WINDOW_Y_OFFSET(x) (((unsigned)(x) & 0xFFFF) << 16) -#define G_028200_WINDOW_Y_OFFSET(x) (((x) >> 16) & 0xFFFF) -#define C_028200_WINDOW_Y_OFFSET 0x0000FFFF -#define R_028204_PA_SC_WINDOW_SCISSOR_TL 0x028204 -#define S_028204_TL_X(x) (((unsigned)(x) & 0x7FFF) << 0) -#define G_028204_TL_X(x) (((x) >> 0) & 0x7FFF) -#define C_028204_TL_X 0xFFFF8000 -#define S_028204_TL_Y(x) (((unsigned)(x) & 0x7FFF) << 16) -#define G_028204_TL_Y(x) (((x) >> 16) & 0x7FFF) -#define C_028204_TL_Y 0x8000FFFF -#define S_028204_WINDOW_OFFSET_DISABLE(x) (((unsigned)(x) & 0x1) << 31) -#define G_028204_WINDOW_OFFSET_DISABLE(x) (((x) >> 31) & 0x1) -#define C_028204_WINDOW_OFFSET_DISABLE 0x7FFFFFFF -#define R_028208_PA_SC_WINDOW_SCISSOR_BR 0x028208 -#define S_028208_BR_X(x) (((unsigned)(x) & 0x7FFF) << 0) -#define G_028208_BR_X(x) (((x) >> 0) & 0x7FFF) -#define C_028208_BR_X 0xFFFF8000 -#define S_028208_BR_Y(x) (((unsigned)(x) & 0x7FFF) << 16) -#define G_028208_BR_Y(x) (((x) >> 16) & 0x7FFF) -#define C_028208_BR_Y 0x8000FFFF -#define R_02820C_PA_SC_CLIPRECT_RULE 0x02820C -#define S_02820C_CLIP_RULE(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_02820C_CLIP_RULE(x) (((x) >> 0) & 0xFFFF) -#define C_02820C_CLIP_RULE 0xFFFF0000 -#define R_028210_PA_SC_CLIPRECT_0_TL 0x028210 -#define S_028210_TL_X(x) (((unsigned)(x) & 0x7FFF) << 0) -#define G_028210_TL_X(x) (((x) >> 0) & 0x7FFF) -#define C_028210_TL_X 0xFFFF8000 -#define S_028210_TL_Y(x) (((unsigned)(x) & 0x7FFF) << 16) -#define G_028210_TL_Y(x) (((x) >> 16) & 0x7FFF) -#define C_028210_TL_Y 0x8000FFFF -#define R_028214_PA_SC_CLIPRECT_0_BR 0x028214 -#define S_028214_BR_X(x) (((unsigned)(x) & 0x7FFF) << 0) -#define G_028214_BR_X(x) (((x) >> 0) & 0x7FFF) -#define C_028214_BR_X 0xFFFF8000 -#define S_028214_BR_Y(x) (((unsigned)(x) & 0x7FFF) << 16) -#define G_028214_BR_Y(x) (((x) >> 16) & 0x7FFF) -#define C_028214_BR_Y 0x8000FFFF -#define R_028218_PA_SC_CLIPRECT_1_TL 0x028218 -#define R_02821C_PA_SC_CLIPRECT_1_BR 0x02821C -#define R_028220_PA_SC_CLIPRECT_2_TL 0x028220 -#define R_028224_PA_SC_CLIPRECT_2_BR 0x028224 -#define R_028228_PA_SC_CLIPRECT_3_TL 0x028228 -#define R_02822C_PA_SC_CLIPRECT_3_BR 0x02822C -#define R_028230_PA_SC_EDGERULE 0x028230 -#define S_028230_ER_TRI(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028230_ER_TRI(x) (((x) >> 0) & 0x0F) -#define C_028230_ER_TRI 0xFFFFFFF0 -#define S_028230_ER_POINT(x) (((unsigned)(x) & 0x0F) << 4) -#define G_028230_ER_POINT(x) (((x) >> 4) & 0x0F) -#define C_028230_ER_POINT 0xFFFFFF0F -#define S_028230_ER_RECT(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028230_ER_RECT(x) (((x) >> 8) & 0x0F) -#define C_028230_ER_RECT 0xFFFFF0FF -#define S_028230_ER_LINE_LR(x) (((unsigned)(x) & 0x3F) << 12) -#define G_028230_ER_LINE_LR(x) (((x) >> 12) & 0x3F) -#define C_028230_ER_LINE_LR 0xFFFC0FFF -#define S_028230_ER_LINE_RL(x) (((unsigned)(x) & 0x3F) << 18) -#define G_028230_ER_LINE_RL(x) (((x) >> 18) & 0x3F) -#define C_028230_ER_LINE_RL 0xFF03FFFF -#define S_028230_ER_LINE_TB(x) (((unsigned)(x) & 0x0F) << 24) -#define G_028230_ER_LINE_TB(x) (((x) >> 24) & 0x0F) -#define C_028230_ER_LINE_TB 0xF0FFFFFF -#define S_028230_ER_LINE_BT(x) (((unsigned)(x) & 0x0F) << 28) -#define G_028230_ER_LINE_BT(x) (((x) >> 28) & 0x0F) -#define C_028230_ER_LINE_BT 0x0FFFFFFF -#define R_028234_PA_SU_HARDWARE_SCREEN_OFFSET 0x028234 -#define S_028234_HW_SCREEN_OFFSET_X(x) (((unsigned)(x) & 0x1FF) << 0) -#define G_028234_HW_SCREEN_OFFSET_X(x) (((x) >> 0) & 0x1FF) -#define C_028234_HW_SCREEN_OFFSET_X 0xFFFFFE00 -#define S_028234_HW_SCREEN_OFFSET_Y(x) (((unsigned)(x) & 0x1FF) << 16) -#define G_028234_HW_SCREEN_OFFSET_Y(x) (((x) >> 16) & 0x1FF) -#define C_028234_HW_SCREEN_OFFSET_Y 0xFE00FFFF -#define R_028238_CB_TARGET_MASK 0x028238 -#define S_028238_TARGET0_ENABLE(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028238_TARGET0_ENABLE(x) (((x) >> 0) & 0x0F) -#define C_028238_TARGET0_ENABLE 0xFFFFFFF0 -#define S_028238_TARGET1_ENABLE(x) (((unsigned)(x) & 0x0F) << 4) -#define G_028238_TARGET1_ENABLE(x) (((x) >> 4) & 0x0F) -#define C_028238_TARGET1_ENABLE 0xFFFFFF0F -#define S_028238_TARGET2_ENABLE(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028238_TARGET2_ENABLE(x) (((x) >> 8) & 0x0F) -#define C_028238_TARGET2_ENABLE 0xFFFFF0FF -#define S_028238_TARGET3_ENABLE(x) (((unsigned)(x) & 0x0F) << 12) -#define G_028238_TARGET3_ENABLE(x) (((x) >> 12) & 0x0F) -#define C_028238_TARGET3_ENABLE 0xFFFF0FFF -#define S_028238_TARGET4_ENABLE(x) (((unsigned)(x) & 0x0F) << 16) -#define G_028238_TARGET4_ENABLE(x) (((x) >> 16) & 0x0F) -#define C_028238_TARGET4_ENABLE 0xFFF0FFFF -#define S_028238_TARGET5_ENABLE(x) (((unsigned)(x) & 0x0F) << 20) -#define G_028238_TARGET5_ENABLE(x) (((x) >> 20) & 0x0F) -#define C_028238_TARGET5_ENABLE 0xFF0FFFFF -#define S_028238_TARGET6_ENABLE(x) (((unsigned)(x) & 0x0F) << 24) -#define G_028238_TARGET6_ENABLE(x) (((x) >> 24) & 0x0F) -#define C_028238_TARGET6_ENABLE 0xF0FFFFFF -#define S_028238_TARGET7_ENABLE(x) (((unsigned)(x) & 0x0F) << 28) -#define G_028238_TARGET7_ENABLE(x) (((x) >> 28) & 0x0F) -#define C_028238_TARGET7_ENABLE 0x0FFFFFFF -#define R_02823C_CB_SHADER_MASK 0x02823C -#define S_02823C_OUTPUT0_ENABLE(x) (((unsigned)(x) & 0x0F) << 0) -#define G_02823C_OUTPUT0_ENABLE(x) (((x) >> 0) & 0x0F) -#define C_02823C_OUTPUT0_ENABLE 0xFFFFFFF0 -#define S_02823C_OUTPUT1_ENABLE(x) (((unsigned)(x) & 0x0F) << 4) -#define G_02823C_OUTPUT1_ENABLE(x) (((x) >> 4) & 0x0F) -#define C_02823C_OUTPUT1_ENABLE 0xFFFFFF0F -#define S_02823C_OUTPUT2_ENABLE(x) (((unsigned)(x) & 0x0F) << 8) -#define G_02823C_OUTPUT2_ENABLE(x) (((x) >> 8) & 0x0F) -#define C_02823C_OUTPUT2_ENABLE 0xFFFFF0FF -#define S_02823C_OUTPUT3_ENABLE(x) (((unsigned)(x) & 0x0F) << 12) -#define G_02823C_OUTPUT3_ENABLE(x) (((x) >> 12) & 0x0F) -#define C_02823C_OUTPUT3_ENABLE 0xFFFF0FFF -#define S_02823C_OUTPUT4_ENABLE(x) (((unsigned)(x) & 0x0F) << 16) -#define G_02823C_OUTPUT4_ENABLE(x) (((x) >> 16) & 0x0F) -#define C_02823C_OUTPUT4_ENABLE 0xFFF0FFFF -#define S_02823C_OUTPUT5_ENABLE(x) (((unsigned)(x) & 0x0F) << 20) -#define G_02823C_OUTPUT5_ENABLE(x) (((x) >> 20) & 0x0F) -#define C_02823C_OUTPUT5_ENABLE 0xFF0FFFFF -#define S_02823C_OUTPUT6_ENABLE(x) (((unsigned)(x) & 0x0F) << 24) -#define G_02823C_OUTPUT6_ENABLE(x) (((x) >> 24) & 0x0F) -#define C_02823C_OUTPUT6_ENABLE 0xF0FFFFFF -#define S_02823C_OUTPUT7_ENABLE(x) (((unsigned)(x) & 0x0F) << 28) -#define G_02823C_OUTPUT7_ENABLE(x) (((x) >> 28) & 0x0F) -#define C_02823C_OUTPUT7_ENABLE 0x0FFFFFFF -#define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240 -#define S_028240_TL_X(x) (((unsigned)(x) & 0x7FFF) << 0) -#define G_028240_TL_X(x) (((x) >> 0) & 0x7FFF) -#define C_028240_TL_X 0xFFFF8000 -#define S_028240_TL_Y(x) (((unsigned)(x) & 0x7FFF) << 16) -#define G_028240_TL_Y(x) (((x) >> 16) & 0x7FFF) -#define C_028240_TL_Y 0x8000FFFF -#define S_028240_WINDOW_OFFSET_DISABLE(x) (((unsigned)(x) & 0x1) << 31) -#define G_028240_WINDOW_OFFSET_DISABLE(x) (((x) >> 31) & 0x1) -#define C_028240_WINDOW_OFFSET_DISABLE 0x7FFFFFFF -#define R_028244_PA_SC_GENERIC_SCISSOR_BR 0x028244 -#define S_028244_BR_X(x) (((unsigned)(x) & 0x7FFF) << 0) -#define G_028244_BR_X(x) (((x) >> 0) & 0x7FFF) -#define C_028244_BR_X 0xFFFF8000 -#define S_028244_BR_Y(x) (((unsigned)(x) & 0x7FFF) << 16) -#define G_028244_BR_Y(x) (((x) >> 16) & 0x7FFF) -#define C_028244_BR_Y 0x8000FFFF -#define R_028248_COHER_DEST_BASE_0 0x028248 -#define R_02824C_COHER_DEST_BASE_1 0x02824C -#define R_028250_PA_SC_VPORT_SCISSOR_0_TL 0x028250 -#define S_028250_TL_X(x) (((unsigned)(x) & 0x7FFF) << 0) -#define G_028250_TL_X(x) (((x) >> 0) & 0x7FFF) -#define C_028250_TL_X 0xFFFF8000 -#define S_028250_TL_Y(x) (((unsigned)(x) & 0x7FFF) << 16) -#define G_028250_TL_Y(x) (((x) >> 16) & 0x7FFF) -#define C_028250_TL_Y 0x8000FFFF -#define S_028250_WINDOW_OFFSET_DISABLE(x) (((unsigned)(x) & 0x1) << 31) -#define G_028250_WINDOW_OFFSET_DISABLE(x) (((x) >> 31) & 0x1) -#define C_028250_WINDOW_OFFSET_DISABLE 0x7FFFFFFF -#define R_028254_PA_SC_VPORT_SCISSOR_0_BR 0x028254 -#define S_028254_BR_X(x) (((unsigned)(x) & 0x7FFF) << 0) -#define G_028254_BR_X(x) (((x) >> 0) & 0x7FFF) -#define C_028254_BR_X 0xFFFF8000 -#define S_028254_BR_Y(x) (((unsigned)(x) & 0x7FFF) << 16) -#define G_028254_BR_Y(x) (((x) >> 16) & 0x7FFF) -#define C_028254_BR_Y 0x8000FFFF -#define R_028258_PA_SC_VPORT_SCISSOR_1_TL 0x028258 -#define R_02825C_PA_SC_VPORT_SCISSOR_1_BR 0x02825C -#define R_028260_PA_SC_VPORT_SCISSOR_2_TL 0x028260 -#define R_028264_PA_SC_VPORT_SCISSOR_2_BR 0x028264 -#define R_028268_PA_SC_VPORT_SCISSOR_3_TL 0x028268 -#define R_02826C_PA_SC_VPORT_SCISSOR_3_BR 0x02826C -#define R_028270_PA_SC_VPORT_SCISSOR_4_TL 0x028270 -#define R_028274_PA_SC_VPORT_SCISSOR_4_BR 0x028274 -#define R_028278_PA_SC_VPORT_SCISSOR_5_TL 0x028278 -#define R_02827C_PA_SC_VPORT_SCISSOR_5_BR 0x02827C -#define R_028280_PA_SC_VPORT_SCISSOR_6_TL 0x028280 -#define R_028284_PA_SC_VPORT_SCISSOR_6_BR 0x028284 -#define R_028288_PA_SC_VPORT_SCISSOR_7_TL 0x028288 -#define R_02828C_PA_SC_VPORT_SCISSOR_7_BR 0x02828C -#define R_028290_PA_SC_VPORT_SCISSOR_8_TL 0x028290 -#define R_028294_PA_SC_VPORT_SCISSOR_8_BR 0x028294 -#define R_028298_PA_SC_VPORT_SCISSOR_9_TL 0x028298 -#define R_02829C_PA_SC_VPORT_SCISSOR_9_BR 0x02829C -#define R_0282A0_PA_SC_VPORT_SCISSOR_10_TL 0x0282A0 -#define R_0282A4_PA_SC_VPORT_SCISSOR_10_BR 0x0282A4 -#define R_0282A8_PA_SC_VPORT_SCISSOR_11_TL 0x0282A8 -#define R_0282AC_PA_SC_VPORT_SCISSOR_11_BR 0x0282AC -#define R_0282B0_PA_SC_VPORT_SCISSOR_12_TL 0x0282B0 -#define R_0282B4_PA_SC_VPORT_SCISSOR_12_BR 0x0282B4 -#define R_0282B8_PA_SC_VPORT_SCISSOR_13_TL 0x0282B8 -#define R_0282BC_PA_SC_VPORT_SCISSOR_13_BR 0x0282BC -#define R_0282C0_PA_SC_VPORT_SCISSOR_14_TL 0x0282C0 -#define R_0282C4_PA_SC_VPORT_SCISSOR_14_BR 0x0282C4 -#define R_0282C8_PA_SC_VPORT_SCISSOR_15_TL 0x0282C8 -#define R_0282CC_PA_SC_VPORT_SCISSOR_15_BR 0x0282CC -#define R_0282D0_PA_SC_VPORT_ZMIN_0 0x0282D0 -#define R_0282D4_PA_SC_VPORT_ZMAX_0 0x0282D4 -#define R_0282D8_PA_SC_VPORT_ZMIN_1 0x0282D8 -#define R_0282DC_PA_SC_VPORT_ZMAX_1 0x0282DC -#define R_0282E0_PA_SC_VPORT_ZMIN_2 0x0282E0 -#define R_0282E4_PA_SC_VPORT_ZMAX_2 0x0282E4 -#define R_0282E8_PA_SC_VPORT_ZMIN_3 0x0282E8 -#define R_0282EC_PA_SC_VPORT_ZMAX_3 0x0282EC -#define R_0282F0_PA_SC_VPORT_ZMIN_4 0x0282F0 -#define R_0282F4_PA_SC_VPORT_ZMAX_4 0x0282F4 -#define R_0282F8_PA_SC_VPORT_ZMIN_5 0x0282F8 -#define R_0282FC_PA_SC_VPORT_ZMAX_5 0x0282FC -#define R_028300_PA_SC_VPORT_ZMIN_6 0x028300 -#define R_028304_PA_SC_VPORT_ZMAX_6 0x028304 -#define R_028308_PA_SC_VPORT_ZMIN_7 0x028308 -#define R_02830C_PA_SC_VPORT_ZMAX_7 0x02830C -#define R_028310_PA_SC_VPORT_ZMIN_8 0x028310 -#define R_028314_PA_SC_VPORT_ZMAX_8 0x028314 -#define R_028318_PA_SC_VPORT_ZMIN_9 0x028318 -#define R_02831C_PA_SC_VPORT_ZMAX_9 0x02831C -#define R_028320_PA_SC_VPORT_ZMIN_10 0x028320 -#define R_028324_PA_SC_VPORT_ZMAX_10 0x028324 -#define R_028328_PA_SC_VPORT_ZMIN_11 0x028328 -#define R_02832C_PA_SC_VPORT_ZMAX_11 0x02832C -#define R_028330_PA_SC_VPORT_ZMIN_12 0x028330 -#define R_028334_PA_SC_VPORT_ZMAX_12 0x028334 -#define R_028338_PA_SC_VPORT_ZMIN_13 0x028338 -#define R_02833C_PA_SC_VPORT_ZMAX_13 0x02833C -#define R_028340_PA_SC_VPORT_ZMIN_14 0x028340 -#define R_028344_PA_SC_VPORT_ZMAX_14 0x028344 -#define R_028348_PA_SC_VPORT_ZMIN_15 0x028348 -#define R_02834C_PA_SC_VPORT_ZMAX_15 0x02834C -#define R_028350_PA_SC_RASTER_CONFIG 0x028350 -#define S_028350_RB_MAP_PKR0(x) (((unsigned)(x) & 0x03) << 0) -#define G_028350_RB_MAP_PKR0(x) (((x) >> 0) & 0x03) -#define C_028350_RB_MAP_PKR0 0xFFFFFFFC -#define V_028350_RASTER_CONFIG_RB_MAP_0 0x00 -#define V_028350_RASTER_CONFIG_RB_MAP_1 0x01 -#define V_028350_RASTER_CONFIG_RB_MAP_2 0x02 -#define V_028350_RASTER_CONFIG_RB_MAP_3 0x03 -#define S_028350_RB_MAP_PKR1(x) (((unsigned)(x) & 0x03) << 2) -#define G_028350_RB_MAP_PKR1(x) (((x) >> 2) & 0x03) -#define C_028350_RB_MAP_PKR1 0xFFFFFFF3 -#define V_028350_RASTER_CONFIG_RB_MAP_0 0x00 -#define V_028350_RASTER_CONFIG_RB_MAP_1 0x01 -#define V_028350_RASTER_CONFIG_RB_MAP_2 0x02 -#define V_028350_RASTER_CONFIG_RB_MAP_3 0x03 -#define S_028350_RB_XSEL2(x) (((unsigned)(x) & 0x03) << 4) -#define G_028350_RB_XSEL2(x) (((x) >> 4) & 0x03) -#define C_028350_RB_XSEL2 0xFFFFFFCF -#define V_028350_RASTER_CONFIG_RB_XSEL2_0 0x00 -#define V_028350_RASTER_CONFIG_RB_XSEL2_1 0x01 -#define V_028350_RASTER_CONFIG_RB_XSEL2_2 0x02 -#define V_028350_RASTER_CONFIG_RB_XSEL2_3 0x03 -#define S_028350_RB_XSEL(x) (((unsigned)(x) & 0x1) << 6) -#define G_028350_RB_XSEL(x) (((x) >> 6) & 0x1) -#define C_028350_RB_XSEL 0xFFFFFFBF -#define S_028350_RB_YSEL(x) (((unsigned)(x) & 0x1) << 7) -#define G_028350_RB_YSEL(x) (((x) >> 7) & 0x1) -#define C_028350_RB_YSEL 0xFFFFFF7F -#define S_028350_PKR_MAP(x) (((unsigned)(x) & 0x03) << 8) -#define G_028350_PKR_MAP(x) (((x) >> 8) & 0x03) -#define C_028350_PKR_MAP 0xFFFFFCFF -#define V_028350_RASTER_CONFIG_PKR_MAP_0 0x00 -#define V_028350_RASTER_CONFIG_PKR_MAP_1 0x01 -#define V_028350_RASTER_CONFIG_PKR_MAP_2 0x02 -#define V_028350_RASTER_CONFIG_PKR_MAP_3 0x03 -#define S_028350_PKR_XSEL(x) (((unsigned)(x) & 0x03) << 10) -#define G_028350_PKR_XSEL(x) (((x) >> 10) & 0x03) -#define C_028350_PKR_XSEL 0xFFFFF3FF -#define V_028350_RASTER_CONFIG_PKR_XSEL_0 0x00 -#define V_028350_RASTER_CONFIG_PKR_XSEL_1 0x01 -#define V_028350_RASTER_CONFIG_PKR_XSEL_2 0x02 -#define V_028350_RASTER_CONFIG_PKR_XSEL_3 0x03 -#define S_028350_PKR_YSEL(x) (((unsigned)(x) & 0x03) << 12) -#define G_028350_PKR_YSEL(x) (((x) >> 12) & 0x03) -#define C_028350_PKR_YSEL 0xFFFFCFFF -#define V_028350_RASTER_CONFIG_PKR_YSEL_0 0x00 -#define V_028350_RASTER_CONFIG_PKR_YSEL_1 0x01 -#define V_028350_RASTER_CONFIG_PKR_YSEL_2 0x02 -#define V_028350_RASTER_CONFIG_PKR_YSEL_3 0x03 -#define S_028350_PKR_XSEL2(x) (((unsigned)(x) & 0x03) << 14) -#define G_028350_PKR_XSEL2(x) (((x) >> 14) & 0x03) -#define C_028350_PKR_XSEL2 0xFFFF3FFF -#define V_028350_RASTER_CONFIG_PKR_XSEL2_0 0x00 -#define V_028350_RASTER_CONFIG_PKR_XSEL2_1 0x01 -#define V_028350_RASTER_CONFIG_PKR_XSEL2_2 0x02 -#define V_028350_RASTER_CONFIG_PKR_XSEL2_3 0x03 -#define S_028350_SC_MAP(x) (((unsigned)(x) & 0x03) << 16) -#define G_028350_SC_MAP(x) (((x) >> 16) & 0x03) -#define C_028350_SC_MAP 0xFFFCFFFF -#define V_028350_RASTER_CONFIG_SC_MAP_0 0x00 -#define V_028350_RASTER_CONFIG_SC_MAP_1 0x01 -#define V_028350_RASTER_CONFIG_SC_MAP_2 0x02 -#define V_028350_RASTER_CONFIG_SC_MAP_3 0x03 -#define S_028350_SC_XSEL(x) (((unsigned)(x) & 0x03) << 18) -#define G_028350_SC_XSEL(x) (((x) >> 18) & 0x03) -#define C_028350_SC_XSEL 0xFFF3FFFF -#define V_028350_RASTER_CONFIG_SC_XSEL_8_WIDE_TILE 0x00 -#define V_028350_RASTER_CONFIG_SC_XSEL_16_WIDE_TILE 0x01 -#define V_028350_RASTER_CONFIG_SC_XSEL_32_WIDE_TILE 0x02 -#define V_028350_RASTER_CONFIG_SC_XSEL_64_WIDE_TILE 0x03 -#define S_028350_SC_YSEL(x) (((unsigned)(x) & 0x03) << 20) -#define G_028350_SC_YSEL(x) (((x) >> 20) & 0x03) -#define C_028350_SC_YSEL 0xFFCFFFFF -#define V_028350_RASTER_CONFIG_SC_YSEL_8_WIDE_TILE 0x00 -#define V_028350_RASTER_CONFIG_SC_YSEL_16_WIDE_TILE 0x01 -#define V_028350_RASTER_CONFIG_SC_YSEL_32_WIDE_TILE 0x02 -#define V_028350_RASTER_CONFIG_SC_YSEL_64_WIDE_TILE 0x03 -#define S_028350_SE_MAP(x) (((unsigned)(x) & 0x03) << 24) -#define G_028350_SE_MAP(x) (((x) >> 24) & 0x03) -#define C_028350_SE_MAP 0xFCFFFFFF -#define V_028350_RASTER_CONFIG_SE_MAP_0 0x00 -#define V_028350_RASTER_CONFIG_SE_MAP_1 0x01 -#define V_028350_RASTER_CONFIG_SE_MAP_2 0x02 -#define V_028350_RASTER_CONFIG_SE_MAP_3 0x03 -#define S_028350_SE_XSEL(x) (((unsigned)(x) & 0x03) << 26) -#define G_028350_SE_XSEL(x) (((x) >> 26) & 0x03) -#define C_028350_SE_XSEL 0xF3FFFFFF -#define V_028350_RASTER_CONFIG_SE_XSEL_8_WIDE_TILE 0x00 -#define V_028350_RASTER_CONFIG_SE_XSEL_16_WIDE_TILE 0x01 -#define V_028350_RASTER_CONFIG_SE_XSEL_32_WIDE_TILE 0x02 -#define V_028350_RASTER_CONFIG_SE_XSEL_64_WIDE_TILE 0x03 -#define S_028350_SE_YSEL(x) (((unsigned)(x) & 0x03) << 28) -#define G_028350_SE_YSEL(x) (((x) >> 28) & 0x03) -#define C_028350_SE_YSEL 0xCFFFFFFF -#define V_028350_RASTER_CONFIG_SE_YSEL_8_WIDE_TILE 0x00 -#define V_028350_RASTER_CONFIG_SE_YSEL_16_WIDE_TILE 0x01 -#define V_028350_RASTER_CONFIG_SE_YSEL_32_WIDE_TILE 0x02 -#define V_028350_RASTER_CONFIG_SE_YSEL_64_WIDE_TILE 0x03 -/* CIK */ -#define R_028354_PA_SC_RASTER_CONFIG_1 0x028354 -#define S_028354_SE_PAIR_MAP(x) (((unsigned)(x) & 0x03) << 0) -#define G_028354_SE_PAIR_MAP(x) (((x) >> 0) & 0x03) -#define C_028354_SE_PAIR_MAP 0xFFFFFFFC -#define V_028354_RASTER_CONFIG_SE_PAIR_MAP_0 0x00 -#define V_028354_RASTER_CONFIG_SE_PAIR_MAP_1 0x01 -#define V_028354_RASTER_CONFIG_SE_PAIR_MAP_2 0x02 -#define V_028354_RASTER_CONFIG_SE_PAIR_MAP_3 0x03 -#define S_028354_SE_PAIR_XSEL(x) (((unsigned)(x) & 0x03) << 2) -#define G_028354_SE_PAIR_XSEL(x) (((x) >> 2) & 0x03) -#define C_028354_SE_PAIR_XSEL 0xFFFFFFF3 -#define V_028354_RASTER_CONFIG_SE_PAIR_XSEL_8_WIDE_TILE 0x00 -#define V_028354_RASTER_CONFIG_SE_PAIR_XSEL_16_WIDE_TILE 0x01 -#define V_028354_RASTER_CONFIG_SE_PAIR_XSEL_32_WIDE_TILE 0x02 -#define V_028354_RASTER_CONFIG_SE_PAIR_XSEL_64_WIDE_TILE 0x03 -#define S_028354_SE_PAIR_YSEL(x) (((unsigned)(x) & 0x03) << 4) -#define G_028354_SE_PAIR_YSEL(x) (((x) >> 4) & 0x03) -#define C_028354_SE_PAIR_YSEL 0xFFFFFFCF -#define V_028354_RASTER_CONFIG_SE_PAIR_YSEL_8_WIDE_TILE 0x00 -#define V_028354_RASTER_CONFIG_SE_PAIR_YSEL_16_WIDE_TILE 0x01 -#define V_028354_RASTER_CONFIG_SE_PAIR_YSEL_32_WIDE_TILE 0x02 -#define V_028354_RASTER_CONFIG_SE_PAIR_YSEL_64_WIDE_TILE 0x03 -#define R_028358_PA_SC_SCREEN_EXTENT_CONTROL 0x028358 -#define S_028358_SLICE_EVEN_ENABLE(x) (((unsigned)(x) & 0x03) << 0) -#define G_028358_SLICE_EVEN_ENABLE(x) (((x) >> 0) & 0x03) -#define C_028358_SLICE_EVEN_ENABLE 0xFFFFFFFC -#define S_028358_SLICE_ODD_ENABLE(x) (((unsigned)(x) & 0x03) << 2) -#define G_028358_SLICE_ODD_ENABLE(x) (((x) >> 2) & 0x03) -#define C_028358_SLICE_ODD_ENABLE 0xFFFFFFF3 -/* */ -#define R_028400_VGT_MAX_VTX_INDX 0x028400 -#define R_028404_VGT_MIN_VTX_INDX 0x028404 -#define R_028408_VGT_INDX_OFFSET 0x028408 -#define R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX 0x02840C -#define R_028414_CB_BLEND_RED 0x028414 -#define R_028418_CB_BLEND_GREEN 0x028418 -#define R_02841C_CB_BLEND_BLUE 0x02841C -#define R_028420_CB_BLEND_ALPHA 0x028420 -/* VI */ -#define R_028424_CB_DCC_CONTROL 0x028424 -#define S_028424_OVERWRITE_COMBINER_DISABLE(x) (((unsigned)(x) & 0x1) << 0) -#define G_028424_OVERWRITE_COMBINER_DISABLE(x) (((x) >> 0) & 0x1) -#define C_028424_OVERWRITE_COMBINER_DISABLE 0xFFFFFFFE -#define S_028424_OVERWRITE_COMBINER_MRT_SHARING_DISABLE(x) (((unsigned)(x) & 0x1) << 1) -#define G_028424_OVERWRITE_COMBINER_MRT_SHARING_DISABLE(x) (((x) >> 1) & 0x1) -#define C_028424_OVERWRITE_COMBINER_MRT_SHARING_DISABLE 0xFFFFFFFD -#define S_028424_OVERWRITE_COMBINER_WATERMARK(x) (((unsigned)(x) & 0x1F) << 2) -#define G_028424_OVERWRITE_COMBINER_WATERMARK(x) (((x) >> 2) & 0x1F) -#define C_028424_OVERWRITE_COMBINER_WATERMARK 0xFFFFFF83 -/* */ -#define R_02842C_DB_STENCIL_CONTROL 0x02842C -#define S_02842C_STENCILFAIL(x) (((unsigned)(x) & 0x0F) << 0) -#define G_02842C_STENCILFAIL(x) (((x) >> 0) & 0x0F) -#define C_02842C_STENCILFAIL 0xFFFFFFF0 -#define V_02842C_STENCIL_KEEP 0x00 -#define V_02842C_STENCIL_ZERO 0x01 -#define V_02842C_STENCIL_ONES 0x02 -#define V_02842C_STENCIL_REPLACE_TEST 0x03 -#define V_02842C_STENCIL_REPLACE_OP 0x04 -#define V_02842C_STENCIL_ADD_CLAMP 0x05 -#define V_02842C_STENCIL_SUB_CLAMP 0x06 -#define V_02842C_STENCIL_INVERT 0x07 -#define V_02842C_STENCIL_ADD_WRAP 0x08 -#define V_02842C_STENCIL_SUB_WRAP 0x09 -#define V_02842C_STENCIL_AND 0x0A -#define V_02842C_STENCIL_OR 0x0B -#define V_02842C_STENCIL_XOR 0x0C -#define V_02842C_STENCIL_NAND 0x0D -#define V_02842C_STENCIL_NOR 0x0E -#define V_02842C_STENCIL_XNOR 0x0F -#define S_02842C_STENCILZPASS(x) (((unsigned)(x) & 0x0F) << 4) -#define G_02842C_STENCILZPASS(x) (((x) >> 4) & 0x0F) -#define C_02842C_STENCILZPASS 0xFFFFFF0F -#define V_02842C_STENCIL_KEEP 0x00 -#define V_02842C_STENCIL_ZERO 0x01 -#define V_02842C_STENCIL_ONES 0x02 -#define V_02842C_STENCIL_REPLACE_TEST 0x03 -#define V_02842C_STENCIL_REPLACE_OP 0x04 -#define V_02842C_STENCIL_ADD_CLAMP 0x05 -#define V_02842C_STENCIL_SUB_CLAMP 0x06 -#define V_02842C_STENCIL_INVERT 0x07 -#define V_02842C_STENCIL_ADD_WRAP 0x08 -#define V_02842C_STENCIL_SUB_WRAP 0x09 -#define V_02842C_STENCIL_AND 0x0A -#define V_02842C_STENCIL_OR 0x0B -#define V_02842C_STENCIL_XOR 0x0C -#define V_02842C_STENCIL_NAND 0x0D -#define V_02842C_STENCIL_NOR 0x0E -#define V_02842C_STENCIL_XNOR 0x0F -#define S_02842C_STENCILZFAIL(x) (((unsigned)(x) & 0x0F) << 8) -#define G_02842C_STENCILZFAIL(x) (((x) >> 8) & 0x0F) -#define C_02842C_STENCILZFAIL 0xFFFFF0FF -#define V_02842C_STENCIL_KEEP 0x00 -#define V_02842C_STENCIL_ZERO 0x01 -#define V_02842C_STENCIL_ONES 0x02 -#define V_02842C_STENCIL_REPLACE_TEST 0x03 -#define V_02842C_STENCIL_REPLACE_OP 0x04 -#define V_02842C_STENCIL_ADD_CLAMP 0x05 -#define V_02842C_STENCIL_SUB_CLAMP 0x06 -#define V_02842C_STENCIL_INVERT 0x07 -#define V_02842C_STENCIL_ADD_WRAP 0x08 -#define V_02842C_STENCIL_SUB_WRAP 0x09 -#define V_02842C_STENCIL_AND 0x0A -#define V_02842C_STENCIL_OR 0x0B -#define V_02842C_STENCIL_XOR 0x0C -#define V_02842C_STENCIL_NAND 0x0D -#define V_02842C_STENCIL_NOR 0x0E -#define V_02842C_STENCIL_XNOR 0x0F -#define S_02842C_STENCILFAIL_BF(x) (((unsigned)(x) & 0x0F) << 12) -#define G_02842C_STENCILFAIL_BF(x) (((x) >> 12) & 0x0F) -#define C_02842C_STENCILFAIL_BF 0xFFFF0FFF -#define V_02842C_STENCIL_KEEP 0x00 -#define V_02842C_STENCIL_ZERO 0x01 -#define V_02842C_STENCIL_ONES 0x02 -#define V_02842C_STENCIL_REPLACE_TEST 0x03 -#define V_02842C_STENCIL_REPLACE_OP 0x04 -#define V_02842C_STENCIL_ADD_CLAMP 0x05 -#define V_02842C_STENCIL_SUB_CLAMP 0x06 -#define V_02842C_STENCIL_INVERT 0x07 -#define V_02842C_STENCIL_ADD_WRAP 0x08 -#define V_02842C_STENCIL_SUB_WRAP 0x09 -#define V_02842C_STENCIL_AND 0x0A -#define V_02842C_STENCIL_OR 0x0B -#define V_02842C_STENCIL_XOR 0x0C -#define V_02842C_STENCIL_NAND 0x0D -#define V_02842C_STENCIL_NOR 0x0E -#define V_02842C_STENCIL_XNOR 0x0F -#define S_02842C_STENCILZPASS_BF(x) (((unsigned)(x) & 0x0F) << 16) -#define G_02842C_STENCILZPASS_BF(x) (((x) >> 16) & 0x0F) -#define C_02842C_STENCILZPASS_BF 0xFFF0FFFF -#define V_02842C_STENCIL_KEEP 0x00 -#define V_02842C_STENCIL_ZERO 0x01 -#define V_02842C_STENCIL_ONES 0x02 -#define V_02842C_STENCIL_REPLACE_TEST 0x03 -#define V_02842C_STENCIL_REPLACE_OP 0x04 -#define V_02842C_STENCIL_ADD_CLAMP 0x05 -#define V_02842C_STENCIL_SUB_CLAMP 0x06 -#define V_02842C_STENCIL_INVERT 0x07 -#define V_02842C_STENCIL_ADD_WRAP 0x08 -#define V_02842C_STENCIL_SUB_WRAP 0x09 -#define V_02842C_STENCIL_AND 0x0A -#define V_02842C_STENCIL_OR 0x0B -#define V_02842C_STENCIL_XOR 0x0C -#define V_02842C_STENCIL_NAND 0x0D -#define V_02842C_STENCIL_NOR 0x0E -#define V_02842C_STENCIL_XNOR 0x0F -#define S_02842C_STENCILZFAIL_BF(x) (((unsigned)(x) & 0x0F) << 20) -#define G_02842C_STENCILZFAIL_BF(x) (((x) >> 20) & 0x0F) -#define C_02842C_STENCILZFAIL_BF 0xFF0FFFFF -#define V_02842C_STENCIL_KEEP 0x00 -#define V_02842C_STENCIL_ZERO 0x01 -#define V_02842C_STENCIL_ONES 0x02 -#define V_02842C_STENCIL_REPLACE_TEST 0x03 -#define V_02842C_STENCIL_REPLACE_OP 0x04 -#define V_02842C_STENCIL_ADD_CLAMP 0x05 -#define V_02842C_STENCIL_SUB_CLAMP 0x06 -#define V_02842C_STENCIL_INVERT 0x07 -#define V_02842C_STENCIL_ADD_WRAP 0x08 -#define V_02842C_STENCIL_SUB_WRAP 0x09 -#define V_02842C_STENCIL_AND 0x0A -#define V_02842C_STENCIL_OR 0x0B -#define V_02842C_STENCIL_XOR 0x0C -#define V_02842C_STENCIL_NAND 0x0D -#define V_02842C_STENCIL_NOR 0x0E -#define V_02842C_STENCIL_XNOR 0x0F -#define R_028430_DB_STENCILREFMASK 0x028430 -#define S_028430_STENCILTESTVAL(x) (((unsigned)(x) & 0xFF) << 0) -#define G_028430_STENCILTESTVAL(x) (((x) >> 0) & 0xFF) -#define C_028430_STENCILTESTVAL 0xFFFFFF00 -#define S_028430_STENCILMASK(x) (((unsigned)(x) & 0xFF) << 8) -#define G_028430_STENCILMASK(x) (((x) >> 8) & 0xFF) -#define C_028430_STENCILMASK 0xFFFF00FF -#define S_028430_STENCILWRITEMASK(x) (((unsigned)(x) & 0xFF) << 16) -#define G_028430_STENCILWRITEMASK(x) (((x) >> 16) & 0xFF) -#define C_028430_STENCILWRITEMASK 0xFF00FFFF -#define S_028430_STENCILOPVAL(x) (((unsigned)(x) & 0xFF) << 24) -#define G_028430_STENCILOPVAL(x) (((x) >> 24) & 0xFF) -#define C_028430_STENCILOPVAL 0x00FFFFFF -#define R_028434_DB_STENCILREFMASK_BF 0x028434 -#define S_028434_STENCILTESTVAL_BF(x) (((unsigned)(x) & 0xFF) << 0) -#define G_028434_STENCILTESTVAL_BF(x) (((x) >> 0) & 0xFF) -#define C_028434_STENCILTESTVAL_BF 0xFFFFFF00 -#define S_028434_STENCILMASK_BF(x) (((unsigned)(x) & 0xFF) << 8) -#define G_028434_STENCILMASK_BF(x) (((x) >> 8) & 0xFF) -#define C_028434_STENCILMASK_BF 0xFFFF00FF -#define S_028434_STENCILWRITEMASK_BF(x) (((unsigned)(x) & 0xFF) << 16) -#define G_028434_STENCILWRITEMASK_BF(x) (((x) >> 16) & 0xFF) -#define C_028434_STENCILWRITEMASK_BF 0xFF00FFFF -#define S_028434_STENCILOPVAL_BF(x) (((unsigned)(x) & 0xFF) << 24) -#define G_028434_STENCILOPVAL_BF(x) (((x) >> 24) & 0xFF) -#define C_028434_STENCILOPVAL_BF 0x00FFFFFF -#define R_02843C_PA_CL_VPORT_XSCALE 0x02843C -#define R_028440_PA_CL_VPORT_XOFFSET 0x028440 -#define R_028444_PA_CL_VPORT_YSCALE 0x028444 -#define R_028448_PA_CL_VPORT_YOFFSET 0x028448 -#define R_02844C_PA_CL_VPORT_ZSCALE 0x02844C -#define R_028450_PA_CL_VPORT_ZOFFSET 0x028450 -#define R_028454_PA_CL_VPORT_XSCALE_1 0x028454 -#define R_028458_PA_CL_VPORT_XOFFSET_1 0x028458 -#define R_02845C_PA_CL_VPORT_YSCALE_1 0x02845C -#define R_028460_PA_CL_VPORT_YOFFSET_1 0x028460 -#define R_028464_PA_CL_VPORT_ZSCALE_1 0x028464 -#define R_028468_PA_CL_VPORT_ZOFFSET_1 0x028468 -#define R_02846C_PA_CL_VPORT_XSCALE_2 0x02846C -#define R_028470_PA_CL_VPORT_XOFFSET_2 0x028470 -#define R_028474_PA_CL_VPORT_YSCALE_2 0x028474 -#define R_028478_PA_CL_VPORT_YOFFSET_2 0x028478 -#define R_02847C_PA_CL_VPORT_ZSCALE_2 0x02847C -#define R_028480_PA_CL_VPORT_ZOFFSET_2 0x028480 -#define R_028484_PA_CL_VPORT_XSCALE_3 0x028484 -#define R_028488_PA_CL_VPORT_XOFFSET_3 0x028488 -#define R_02848C_PA_CL_VPORT_YSCALE_3 0x02848C -#define R_028490_PA_CL_VPORT_YOFFSET_3 0x028490 -#define R_028494_PA_CL_VPORT_ZSCALE_3 0x028494 -#define R_028498_PA_CL_VPORT_ZOFFSET_3 0x028498 -#define R_02849C_PA_CL_VPORT_XSCALE_4 0x02849C -#define R_0284A0_PA_CL_VPORT_XOFFSET_4 0x0284A0 -#define R_0284A4_PA_CL_VPORT_YSCALE_4 0x0284A4 -#define R_0284A8_PA_CL_VPORT_YOFFSET_4 0x0284A8 -#define R_0284AC_PA_CL_VPORT_ZSCALE_4 0x0284AC -#define R_0284B0_PA_CL_VPORT_ZOFFSET_4 0x0284B0 -#define R_0284B4_PA_CL_VPORT_XSCALE_5 0x0284B4 -#define R_0284B8_PA_CL_VPORT_XOFFSET_5 0x0284B8 -#define R_0284BC_PA_CL_VPORT_YSCALE_5 0x0284BC -#define R_0284C0_PA_CL_VPORT_YOFFSET_5 0x0284C0 -#define R_0284C4_PA_CL_VPORT_ZSCALE_5 0x0284C4 -#define R_0284C8_PA_CL_VPORT_ZOFFSET_5 0x0284C8 -#define R_0284CC_PA_CL_VPORT_XSCALE_6 0x0284CC -#define R_0284D0_PA_CL_VPORT_XOFFSET_6 0x0284D0 -#define R_0284D4_PA_CL_VPORT_YSCALE_6 0x0284D4 -#define R_0284D8_PA_CL_VPORT_YOFFSET_6 0x0284D8 -#define R_0284DC_PA_CL_VPORT_ZSCALE_6 0x0284DC -#define R_0284E0_PA_CL_VPORT_ZOFFSET_6 0x0284E0 -#define R_0284E4_PA_CL_VPORT_XSCALE_7 0x0284E4 -#define R_0284E8_PA_CL_VPORT_XOFFSET_7 0x0284E8 -#define R_0284EC_PA_CL_VPORT_YSCALE_7 0x0284EC -#define R_0284F0_PA_CL_VPORT_YOFFSET_7 0x0284F0 -#define R_0284F4_PA_CL_VPORT_ZSCALE_7 0x0284F4 -#define R_0284F8_PA_CL_VPORT_ZOFFSET_7 0x0284F8 -#define R_0284FC_PA_CL_VPORT_XSCALE_8 0x0284FC -#define R_028500_PA_CL_VPORT_XOFFSET_8 0x028500 -#define R_028504_PA_CL_VPORT_YSCALE_8 0x028504 -#define R_028508_PA_CL_VPORT_YOFFSET_8 0x028508 -#define R_02850C_PA_CL_VPORT_ZSCALE_8 0x02850C -#define R_028510_PA_CL_VPORT_ZOFFSET_8 0x028510 -#define R_028514_PA_CL_VPORT_XSCALE_9 0x028514 -#define R_028518_PA_CL_VPORT_XOFFSET_9 0x028518 -#define R_02851C_PA_CL_VPORT_YSCALE_9 0x02851C -#define R_028520_PA_CL_VPORT_YOFFSET_9 0x028520 -#define R_028524_PA_CL_VPORT_ZSCALE_9 0x028524 -#define R_028528_PA_CL_VPORT_ZOFFSET_9 0x028528 -#define R_02852C_PA_CL_VPORT_XSCALE_10 0x02852C -#define R_028530_PA_CL_VPORT_XOFFSET_10 0x028530 -#define R_028534_PA_CL_VPORT_YSCALE_10 0x028534 -#define R_028538_PA_CL_VPORT_YOFFSET_10 0x028538 -#define R_02853C_PA_CL_VPORT_ZSCALE_10 0x02853C -#define R_028540_PA_CL_VPORT_ZOFFSET_10 0x028540 -#define R_028544_PA_CL_VPORT_XSCALE_11 0x028544 -#define R_028548_PA_CL_VPORT_XOFFSET_11 0x028548 -#define R_02854C_PA_CL_VPORT_YSCALE_11 0x02854C -#define R_028550_PA_CL_VPORT_YOFFSET_11 0x028550 -#define R_028554_PA_CL_VPORT_ZSCALE_11 0x028554 -#define R_028558_PA_CL_VPORT_ZOFFSET_11 0x028558 -#define R_02855C_PA_CL_VPORT_XSCALE_12 0x02855C -#define R_028560_PA_CL_VPORT_XOFFSET_12 0x028560 -#define R_028564_PA_CL_VPORT_YSCALE_12 0x028564 -#define R_028568_PA_CL_VPORT_YOFFSET_12 0x028568 -#define R_02856C_PA_CL_VPORT_ZSCALE_12 0x02856C -#define R_028570_PA_CL_VPORT_ZOFFSET_12 0x028570 -#define R_028574_PA_CL_VPORT_XSCALE_13 0x028574 -#define R_028578_PA_CL_VPORT_XOFFSET_13 0x028578 -#define R_02857C_PA_CL_VPORT_YSCALE_13 0x02857C -#define R_028580_PA_CL_VPORT_YOFFSET_13 0x028580 -#define R_028584_PA_CL_VPORT_ZSCALE_13 0x028584 -#define R_028588_PA_CL_VPORT_ZOFFSET_13 0x028588 -#define R_02858C_PA_CL_VPORT_XSCALE_14 0x02858C -#define R_028590_PA_CL_VPORT_XOFFSET_14 0x028590 -#define R_028594_PA_CL_VPORT_YSCALE_14 0x028594 -#define R_028598_PA_CL_VPORT_YOFFSET_14 0x028598 -#define R_02859C_PA_CL_VPORT_ZSCALE_14 0x02859C -#define R_0285A0_PA_CL_VPORT_ZOFFSET_14 0x0285A0 -#define R_0285A4_PA_CL_VPORT_XSCALE_15 0x0285A4 -#define R_0285A8_PA_CL_VPORT_XOFFSET_15 0x0285A8 -#define R_0285AC_PA_CL_VPORT_YSCALE_15 0x0285AC -#define R_0285B0_PA_CL_VPORT_YOFFSET_15 0x0285B0 -#define R_0285B4_PA_CL_VPORT_ZSCALE_15 0x0285B4 -#define R_0285B8_PA_CL_VPORT_ZOFFSET_15 0x0285B8 -#define R_0285BC_PA_CL_UCP_0_X 0x0285BC -#define R_0285C0_PA_CL_UCP_0_Y 0x0285C0 -#define R_0285C4_PA_CL_UCP_0_Z 0x0285C4 -#define R_0285C8_PA_CL_UCP_0_W 0x0285C8 -#define R_0285CC_PA_CL_UCP_1_X 0x0285CC -#define R_0285D0_PA_CL_UCP_1_Y 0x0285D0 -#define R_0285D4_PA_CL_UCP_1_Z 0x0285D4 -#define R_0285D8_PA_CL_UCP_1_W 0x0285D8 -#define R_0285DC_PA_CL_UCP_2_X 0x0285DC -#define R_0285E0_PA_CL_UCP_2_Y 0x0285E0 -#define R_0285E4_PA_CL_UCP_2_Z 0x0285E4 -#define R_0285E8_PA_CL_UCP_2_W 0x0285E8 -#define R_0285EC_PA_CL_UCP_3_X 0x0285EC -#define R_0285F0_PA_CL_UCP_3_Y 0x0285F0 -#define R_0285F4_PA_CL_UCP_3_Z 0x0285F4 -#define R_0285F8_PA_CL_UCP_3_W 0x0285F8 -#define R_0285FC_PA_CL_UCP_4_X 0x0285FC -#define R_028600_PA_CL_UCP_4_Y 0x028600 -#define R_028604_PA_CL_UCP_4_Z 0x028604 -#define R_028608_PA_CL_UCP_4_W 0x028608 -#define R_02860C_PA_CL_UCP_5_X 0x02860C -#define R_028610_PA_CL_UCP_5_Y 0x028610 -#define R_028614_PA_CL_UCP_5_Z 0x028614 -#define R_028618_PA_CL_UCP_5_W 0x028618 -#define R_028644_SPI_PS_INPUT_CNTL_0 0x028644 -#define S_028644_OFFSET(x) (((unsigned)(x) & 0x3F) << 0) -#define G_028644_OFFSET(x) (((x) >> 0) & 0x3F) -#define C_028644_OFFSET 0xFFFFFFC0 -#define S_028644_DEFAULT_VAL(x) (((unsigned)(x) & 0x03) << 8) -#define G_028644_DEFAULT_VAL(x) (((x) >> 8) & 0x03) -#define C_028644_DEFAULT_VAL 0xFFFFFCFF -#define V_028644_X_0_0F 0x00 -#define S_028644_FLAT_SHADE(x) (((unsigned)(x) & 0x1) << 10) -#define G_028644_FLAT_SHADE(x) (((x) >> 10) & 0x1) -#define C_028644_FLAT_SHADE 0xFFFFFBFF -#define S_028644_CYL_WRAP(x) (((unsigned)(x) & 0x0F) << 13) -#define G_028644_CYL_WRAP(x) (((x) >> 13) & 0x0F) -#define C_028644_CYL_WRAP 0xFFFE1FFF -#define S_028644_PT_SPRITE_TEX(x) (((unsigned)(x) & 0x1) << 17) -#define G_028644_PT_SPRITE_TEX(x) (((x) >> 17) & 0x1) -#define C_028644_PT_SPRITE_TEX 0xFFFDFFFF -/* CIK */ -#define S_028644_DUP(x) (((unsigned)(x) & 0x1) << 18) -#define G_028644_DUP(x) (((x) >> 18) & 0x1) -#define C_028644_DUP 0xFFFBFFFF -/* */ -/* VI */ -#define S_028644_FP16_INTERP_MODE(x) (((unsigned)(x) & 0x1) << 19) -#define G_028644_FP16_INTERP_MODE(x) (((x) >> 19) & 0x1) -#define C_028644_FP16_INTERP_MODE 0xFFF7FFFF -#define S_028644_USE_DEFAULT_ATTR1(x) (((unsigned)(x) & 0x1) << 20) -#define G_028644_USE_DEFAULT_ATTR1(x) (((x) >> 20) & 0x1) -#define C_028644_USE_DEFAULT_ATTR1 0xFFEFFFFF -#define S_028644_DEFAULT_VAL_ATTR1(x) (((unsigned)(x) & 0x03) << 21) -#define G_028644_DEFAULT_VAL_ATTR1(x) (((x) >> 21) & 0x03) -#define C_028644_DEFAULT_VAL_ATTR1 0xFF9FFFFF -#define S_028644_PT_SPRITE_TEX_ATTR1(x) (((unsigned)(x) & 0x1) << 23) -#define G_028644_PT_SPRITE_TEX_ATTR1(x) (((x) >> 23) & 0x1) -#define C_028644_PT_SPRITE_TEX_ATTR1 0xFF7FFFFF -#define S_028644_ATTR0_VALID(x) (((unsigned)(x) & 0x1) << 24) -#define G_028644_ATTR0_VALID(x) (((x) >> 24) & 0x1) -#define C_028644_ATTR0_VALID 0xFEFFFFFF -#define S_028644_ATTR1_VALID(x) (((unsigned)(x) & 0x1) << 25) -#define G_028644_ATTR1_VALID(x) (((x) >> 25) & 0x1) -#define C_028644_ATTR1_VALID 0xFDFFFFFF -/* */ -#define R_028648_SPI_PS_INPUT_CNTL_1 0x028648 -#define R_02864C_SPI_PS_INPUT_CNTL_2 0x02864C -#define R_028650_SPI_PS_INPUT_CNTL_3 0x028650 -#define R_028654_SPI_PS_INPUT_CNTL_4 0x028654 -#define R_028658_SPI_PS_INPUT_CNTL_5 0x028658 -#define R_02865C_SPI_PS_INPUT_CNTL_6 0x02865C -#define R_028660_SPI_PS_INPUT_CNTL_7 0x028660 -#define R_028664_SPI_PS_INPUT_CNTL_8 0x028664 -#define R_028668_SPI_PS_INPUT_CNTL_9 0x028668 -#define R_02866C_SPI_PS_INPUT_CNTL_10 0x02866C -#define R_028670_SPI_PS_INPUT_CNTL_11 0x028670 -#define R_028674_SPI_PS_INPUT_CNTL_12 0x028674 -#define R_028678_SPI_PS_INPUT_CNTL_13 0x028678 -#define R_02867C_SPI_PS_INPUT_CNTL_14 0x02867C -#define R_028680_SPI_PS_INPUT_CNTL_15 0x028680 -#define R_028684_SPI_PS_INPUT_CNTL_16 0x028684 -#define R_028688_SPI_PS_INPUT_CNTL_17 0x028688 -#define R_02868C_SPI_PS_INPUT_CNTL_18 0x02868C -#define R_028690_SPI_PS_INPUT_CNTL_19 0x028690 -#define R_028694_SPI_PS_INPUT_CNTL_20 0x028694 -#define R_028698_SPI_PS_INPUT_CNTL_21 0x028698 -#define R_02869C_SPI_PS_INPUT_CNTL_22 0x02869C -#define R_0286A0_SPI_PS_INPUT_CNTL_23 0x0286A0 -#define R_0286A4_SPI_PS_INPUT_CNTL_24 0x0286A4 -#define R_0286A8_SPI_PS_INPUT_CNTL_25 0x0286A8 -#define R_0286AC_SPI_PS_INPUT_CNTL_26 0x0286AC -#define R_0286B0_SPI_PS_INPUT_CNTL_27 0x0286B0 -#define R_0286B4_SPI_PS_INPUT_CNTL_28 0x0286B4 -#define R_0286B8_SPI_PS_INPUT_CNTL_29 0x0286B8 -#define R_0286BC_SPI_PS_INPUT_CNTL_30 0x0286BC -#define R_0286C0_SPI_PS_INPUT_CNTL_31 0x0286C0 -#define R_0286C4_SPI_VS_OUT_CONFIG 0x0286C4 -#define S_0286C4_VS_EXPORT_COUNT(x) (((unsigned)(x) & 0x1F) << 1) -#define G_0286C4_VS_EXPORT_COUNT(x) (((x) >> 1) & 0x1F) -#define C_0286C4_VS_EXPORT_COUNT 0xFFFFFFC1 -#define S_0286C4_VS_HALF_PACK(x) (((unsigned)(x) & 0x1) << 6) -#define G_0286C4_VS_HALF_PACK(x) (((x) >> 6) & 0x1) -#define C_0286C4_VS_HALF_PACK 0xFFFFFFBF -#define S_0286C4_VS_EXPORTS_FOG(x) (((unsigned)(x) & 0x1) << 7) /* not on CIK */ -#define G_0286C4_VS_EXPORTS_FOG(x) (((x) >> 7) & 0x1) /* not on CIK */ -#define C_0286C4_VS_EXPORTS_FOG 0xFFFFFF7F /* not on CIK */ -#define S_0286C4_VS_OUT_FOG_VEC_ADDR(x) (((unsigned)(x) & 0x1F) << 8) /* not on CIK */ -#define G_0286C4_VS_OUT_FOG_VEC_ADDR(x) (((x) >> 8) & 0x1F) /* not on CIK */ -#define C_0286C4_VS_OUT_FOG_VEC_ADDR 0xFFFFE0FF /* not on CIK */ -#define R_0286CC_SPI_PS_INPUT_ENA 0x0286CC -#define S_0286CC_PERSP_SAMPLE_ENA(x) (((unsigned)(x) & 0x1) << 0) -#define G_0286CC_PERSP_SAMPLE_ENA(x) (((x) >> 0) & 0x1) -#define C_0286CC_PERSP_SAMPLE_ENA 0xFFFFFFFE -#define S_0286CC_PERSP_CENTER_ENA(x) (((unsigned)(x) & 0x1) << 1) -#define G_0286CC_PERSP_CENTER_ENA(x) (((x) >> 1) & 0x1) -#define C_0286CC_PERSP_CENTER_ENA 0xFFFFFFFD -#define S_0286CC_PERSP_CENTROID_ENA(x) (((unsigned)(x) & 0x1) << 2) -#define G_0286CC_PERSP_CENTROID_ENA(x) (((x) >> 2) & 0x1) -#define C_0286CC_PERSP_CENTROID_ENA 0xFFFFFFFB -#define S_0286CC_PERSP_PULL_MODEL_ENA(x) (((unsigned)(x) & 0x1) << 3) -#define G_0286CC_PERSP_PULL_MODEL_ENA(x) (((x) >> 3) & 0x1) -#define C_0286CC_PERSP_PULL_MODEL_ENA 0xFFFFFFF7 -#define S_0286CC_LINEAR_SAMPLE_ENA(x) (((unsigned)(x) & 0x1) << 4) -#define G_0286CC_LINEAR_SAMPLE_ENA(x) (((x) >> 4) & 0x1) -#define C_0286CC_LINEAR_SAMPLE_ENA 0xFFFFFFEF -#define S_0286CC_LINEAR_CENTER_ENA(x) (((unsigned)(x) & 0x1) << 5) -#define G_0286CC_LINEAR_CENTER_ENA(x) (((x) >> 5) & 0x1) -#define C_0286CC_LINEAR_CENTER_ENA 0xFFFFFFDF -#define S_0286CC_LINEAR_CENTROID_ENA(x) (((unsigned)(x) & 0x1) << 6) -#define G_0286CC_LINEAR_CENTROID_ENA(x) (((x) >> 6) & 0x1) -#define C_0286CC_LINEAR_CENTROID_ENA 0xFFFFFFBF -#define S_0286CC_LINE_STIPPLE_TEX_ENA(x) (((unsigned)(x) & 0x1) << 7) -#define G_0286CC_LINE_STIPPLE_TEX_ENA(x) (((x) >> 7) & 0x1) -#define C_0286CC_LINE_STIPPLE_TEX_ENA 0xFFFFFF7F -#define S_0286CC_POS_X_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 8) -#define G_0286CC_POS_X_FLOAT_ENA(x) (((x) >> 8) & 0x1) -#define C_0286CC_POS_X_FLOAT_ENA 0xFFFFFEFF -#define S_0286CC_POS_Y_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 9) -#define G_0286CC_POS_Y_FLOAT_ENA(x) (((x) >> 9) & 0x1) -#define C_0286CC_POS_Y_FLOAT_ENA 0xFFFFFDFF -#define S_0286CC_POS_Z_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 10) -#define G_0286CC_POS_Z_FLOAT_ENA(x) (((x) >> 10) & 0x1) -#define C_0286CC_POS_Z_FLOAT_ENA 0xFFFFFBFF -#define S_0286CC_POS_W_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 11) -#define G_0286CC_POS_W_FLOAT_ENA(x) (((x) >> 11) & 0x1) -#define C_0286CC_POS_W_FLOAT_ENA 0xFFFFF7FF -#define S_0286CC_FRONT_FACE_ENA(x) (((unsigned)(x) & 0x1) << 12) -#define G_0286CC_FRONT_FACE_ENA(x) (((x) >> 12) & 0x1) -#define C_0286CC_FRONT_FACE_ENA 0xFFFFEFFF -#define S_0286CC_ANCILLARY_ENA(x) (((unsigned)(x) & 0x1) << 13) -#define G_0286CC_ANCILLARY_ENA(x) (((x) >> 13) & 0x1) -#define C_0286CC_ANCILLARY_ENA 0xFFFFDFFF -#define S_0286CC_SAMPLE_COVERAGE_ENA(x) (((unsigned)(x) & 0x1) << 14) -#define G_0286CC_SAMPLE_COVERAGE_ENA(x) (((x) >> 14) & 0x1) -#define C_0286CC_SAMPLE_COVERAGE_ENA 0xFFFFBFFF -#define S_0286CC_POS_FIXED_PT_ENA(x) (((unsigned)(x) & 0x1) << 15) -#define G_0286CC_POS_FIXED_PT_ENA(x) (((x) >> 15) & 0x1) -#define C_0286CC_POS_FIXED_PT_ENA 0xFFFF7FFF -#define R_0286D0_SPI_PS_INPUT_ADDR 0x0286D0 -#define S_0286D0_PERSP_SAMPLE_ENA(x) (((unsigned)(x) & 0x1) << 0) -#define G_0286D0_PERSP_SAMPLE_ENA(x) (((x) >> 0) & 0x1) -#define C_0286D0_PERSP_SAMPLE_ENA 0xFFFFFFFE -#define S_0286D0_PERSP_CENTER_ENA(x) (((unsigned)(x) & 0x1) << 1) -#define G_0286D0_PERSP_CENTER_ENA(x) (((x) >> 1) & 0x1) -#define C_0286D0_PERSP_CENTER_ENA 0xFFFFFFFD -#define S_0286D0_PERSP_CENTROID_ENA(x) (((unsigned)(x) & 0x1) << 2) -#define G_0286D0_PERSP_CENTROID_ENA(x) (((x) >> 2) & 0x1) -#define C_0286D0_PERSP_CENTROID_ENA 0xFFFFFFFB -#define S_0286D0_PERSP_PULL_MODEL_ENA(x) (((unsigned)(x) & 0x1) << 3) -#define G_0286D0_PERSP_PULL_MODEL_ENA(x) (((x) >> 3) & 0x1) -#define C_0286D0_PERSP_PULL_MODEL_ENA 0xFFFFFFF7 -#define S_0286D0_LINEAR_SAMPLE_ENA(x) (((unsigned)(x) & 0x1) << 4) -#define G_0286D0_LINEAR_SAMPLE_ENA(x) (((x) >> 4) & 0x1) -#define C_0286D0_LINEAR_SAMPLE_ENA 0xFFFFFFEF -#define S_0286D0_LINEAR_CENTER_ENA(x) (((unsigned)(x) & 0x1) << 5) -#define G_0286D0_LINEAR_CENTER_ENA(x) (((x) >> 5) & 0x1) -#define C_0286D0_LINEAR_CENTER_ENA 0xFFFFFFDF -#define S_0286D0_LINEAR_CENTROID_ENA(x) (((unsigned)(x) & 0x1) << 6) -#define G_0286D0_LINEAR_CENTROID_ENA(x) (((x) >> 6) & 0x1) -#define C_0286D0_LINEAR_CENTROID_ENA 0xFFFFFFBF -#define S_0286D0_LINE_STIPPLE_TEX_ENA(x) (((unsigned)(x) & 0x1) << 7) -#define G_0286D0_LINE_STIPPLE_TEX_ENA(x) (((x) >> 7) & 0x1) -#define C_0286D0_LINE_STIPPLE_TEX_ENA 0xFFFFFF7F -#define S_0286D0_POS_X_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 8) -#define G_0286D0_POS_X_FLOAT_ENA(x) (((x) >> 8) & 0x1) -#define C_0286D0_POS_X_FLOAT_ENA 0xFFFFFEFF -#define S_0286D0_POS_Y_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 9) -#define G_0286D0_POS_Y_FLOAT_ENA(x) (((x) >> 9) & 0x1) -#define C_0286D0_POS_Y_FLOAT_ENA 0xFFFFFDFF -#define S_0286D0_POS_Z_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 10) -#define G_0286D0_POS_Z_FLOAT_ENA(x) (((x) >> 10) & 0x1) -#define C_0286D0_POS_Z_FLOAT_ENA 0xFFFFFBFF -#define S_0286D0_POS_W_FLOAT_ENA(x) (((unsigned)(x) & 0x1) << 11) -#define G_0286D0_POS_W_FLOAT_ENA(x) (((x) >> 11) & 0x1) -#define C_0286D0_POS_W_FLOAT_ENA 0xFFFFF7FF -#define S_0286D0_FRONT_FACE_ENA(x) (((unsigned)(x) & 0x1) << 12) -#define G_0286D0_FRONT_FACE_ENA(x) (((x) >> 12) & 0x1) -#define C_0286D0_FRONT_FACE_ENA 0xFFFFEFFF -#define S_0286D0_ANCILLARY_ENA(x) (((unsigned)(x) & 0x1) << 13) -#define G_0286D0_ANCILLARY_ENA(x) (((x) >> 13) & 0x1) -#define C_0286D0_ANCILLARY_ENA 0xFFFFDFFF -#define S_0286D0_SAMPLE_COVERAGE_ENA(x) (((unsigned)(x) & 0x1) << 14) -#define G_0286D0_SAMPLE_COVERAGE_ENA(x) (((x) >> 14) & 0x1) -#define C_0286D0_SAMPLE_COVERAGE_ENA 0xFFFFBFFF -#define S_0286D0_POS_FIXED_PT_ENA(x) (((unsigned)(x) & 0x1) << 15) -#define G_0286D0_POS_FIXED_PT_ENA(x) (((x) >> 15) & 0x1) -#define C_0286D0_POS_FIXED_PT_ENA 0xFFFF7FFF -#define R_0286D4_SPI_INTERP_CONTROL_0 0x0286D4 -#define S_0286D4_FLAT_SHADE_ENA(x) (((unsigned)(x) & 0x1) << 0) -#define G_0286D4_FLAT_SHADE_ENA(x) (((x) >> 0) & 0x1) -#define C_0286D4_FLAT_SHADE_ENA 0xFFFFFFFE -#define S_0286D4_PNT_SPRITE_ENA(x) (((unsigned)(x) & 0x1) << 1) -#define G_0286D4_PNT_SPRITE_ENA(x) (((x) >> 1) & 0x1) -#define C_0286D4_PNT_SPRITE_ENA 0xFFFFFFFD -#define S_0286D4_PNT_SPRITE_OVRD_X(x) (((unsigned)(x) & 0x07) << 2) -#define G_0286D4_PNT_SPRITE_OVRD_X(x) (((x) >> 2) & 0x07) -#define C_0286D4_PNT_SPRITE_OVRD_X 0xFFFFFFE3 -#define V_0286D4_SPI_PNT_SPRITE_SEL_0 0x00 -#define V_0286D4_SPI_PNT_SPRITE_SEL_1 0x01 -#define V_0286D4_SPI_PNT_SPRITE_SEL_S 0x02 -#define V_0286D4_SPI_PNT_SPRITE_SEL_T 0x03 -#define V_0286D4_SPI_PNT_SPRITE_SEL_NONE 0x04 -#define S_0286D4_PNT_SPRITE_OVRD_Y(x) (((unsigned)(x) & 0x07) << 5) -#define G_0286D4_PNT_SPRITE_OVRD_Y(x) (((x) >> 5) & 0x07) -#define C_0286D4_PNT_SPRITE_OVRD_Y 0xFFFFFF1F -#define V_0286D4_SPI_PNT_SPRITE_SEL_0 0x00 -#define V_0286D4_SPI_PNT_SPRITE_SEL_1 0x01 -#define V_0286D4_SPI_PNT_SPRITE_SEL_S 0x02 -#define V_0286D4_SPI_PNT_SPRITE_SEL_T 0x03 -#define V_0286D4_SPI_PNT_SPRITE_SEL_NONE 0x04 -#define S_0286D4_PNT_SPRITE_OVRD_Z(x) (((unsigned)(x) & 0x07) << 8) -#define G_0286D4_PNT_SPRITE_OVRD_Z(x) (((x) >> 8) & 0x07) -#define C_0286D4_PNT_SPRITE_OVRD_Z 0xFFFFF8FF -#define V_0286D4_SPI_PNT_SPRITE_SEL_0 0x00 -#define V_0286D4_SPI_PNT_SPRITE_SEL_1 0x01 -#define V_0286D4_SPI_PNT_SPRITE_SEL_S 0x02 -#define V_0286D4_SPI_PNT_SPRITE_SEL_T 0x03 -#define V_0286D4_SPI_PNT_SPRITE_SEL_NONE 0x04 -#define S_0286D4_PNT_SPRITE_OVRD_W(x) (((unsigned)(x) & 0x07) << 11) -#define G_0286D4_PNT_SPRITE_OVRD_W(x) (((x) >> 11) & 0x07) -#define C_0286D4_PNT_SPRITE_OVRD_W 0xFFFFC7FF -#define V_0286D4_SPI_PNT_SPRITE_SEL_0 0x00 -#define V_0286D4_SPI_PNT_SPRITE_SEL_1 0x01 -#define V_0286D4_SPI_PNT_SPRITE_SEL_S 0x02 -#define V_0286D4_SPI_PNT_SPRITE_SEL_T 0x03 -#define V_0286D4_SPI_PNT_SPRITE_SEL_NONE 0x04 -#define S_0286D4_PNT_SPRITE_TOP_1(x) (((unsigned)(x) & 0x1) << 14) -#define G_0286D4_PNT_SPRITE_TOP_1(x) (((x) >> 14) & 0x1) -#define C_0286D4_PNT_SPRITE_TOP_1 0xFFFFBFFF -#define R_0286D8_SPI_PS_IN_CONTROL 0x0286D8 -#define S_0286D8_NUM_INTERP(x) (((unsigned)(x) & 0x3F) << 0) -#define G_0286D8_NUM_INTERP(x) (((x) >> 0) & 0x3F) -#define C_0286D8_NUM_INTERP 0xFFFFFFC0 -#define S_0286D8_PARAM_GEN(x) (((unsigned)(x) & 0x1) << 6) -#define G_0286D8_PARAM_GEN(x) (((x) >> 6) & 0x1) -#define C_0286D8_PARAM_GEN 0xFFFFFFBF -#define S_0286D8_FOG_ADDR(x) (((unsigned)(x) & 0x7F) << 7) /* not on CIK */ -#define G_0286D8_FOG_ADDR(x) (((x) >> 7) & 0x7F) /* not on CIK */ -#define C_0286D8_FOG_ADDR 0xFFFFC07F /* not on CIK */ -#define S_0286D8_BC_OPTIMIZE_DISABLE(x) (((unsigned)(x) & 0x1) << 14) -#define G_0286D8_BC_OPTIMIZE_DISABLE(x) (((x) >> 14) & 0x1) -#define C_0286D8_BC_OPTIMIZE_DISABLE 0xFFFFBFFF -#define S_0286D8_PASS_FOG_THROUGH_PS(x) (((unsigned)(x) & 0x1) << 15) /* not on CIK */ -#define G_0286D8_PASS_FOG_THROUGH_PS(x) (((x) >> 15) & 0x1) /* not on CIK */ -#define C_0286D8_PASS_FOG_THROUGH_PS 0xFFFF7FFF /* not on CIK */ -#define R_0286E0_SPI_BARYC_CNTL 0x0286E0 -#define S_0286E0_PERSP_CENTER_CNTL(x) (((unsigned)(x) & 0x1) << 0) -#define G_0286E0_PERSP_CENTER_CNTL(x) (((x) >> 0) & 0x1) -#define C_0286E0_PERSP_CENTER_CNTL 0xFFFFFFFE -#define S_0286E0_PERSP_CENTROID_CNTL(x) (((unsigned)(x) & 0x1) << 4) -#define G_0286E0_PERSP_CENTROID_CNTL(x) (((x) >> 4) & 0x1) -#define C_0286E0_PERSP_CENTROID_CNTL 0xFFFFFFEF -#define S_0286E0_LINEAR_CENTER_CNTL(x) (((unsigned)(x) & 0x1) << 8) -#define G_0286E0_LINEAR_CENTER_CNTL(x) (((x) >> 8) & 0x1) -#define C_0286E0_LINEAR_CENTER_CNTL 0xFFFFFEFF -#define S_0286E0_LINEAR_CENTROID_CNTL(x) (((unsigned)(x) & 0x1) << 12) -#define G_0286E0_LINEAR_CENTROID_CNTL(x) (((x) >> 12) & 0x1) -#define C_0286E0_LINEAR_CENTROID_CNTL 0xFFFFEFFF -#define S_0286E0_POS_FLOAT_LOCATION(x) (((unsigned)(x) & 0x03) << 16) -#define G_0286E0_POS_FLOAT_LOCATION(x) (((x) >> 16) & 0x03) -#define C_0286E0_POS_FLOAT_LOCATION 0xFFFCFFFF -#define V_0286E0_X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT 0x00 -#define S_0286E0_POS_FLOAT_ULC(x) (((unsigned)(x) & 0x1) << 20) -#define G_0286E0_POS_FLOAT_ULC(x) (((x) >> 20) & 0x1) -#define C_0286E0_POS_FLOAT_ULC 0xFFEFFFFF -#define S_0286E0_FRONT_FACE_ALL_BITS(x) (((unsigned)(x) & 0x1) << 24) -#define G_0286E0_FRONT_FACE_ALL_BITS(x) (((x) >> 24) & 0x1) -#define C_0286E0_FRONT_FACE_ALL_BITS 0xFEFFFFFF -#define R_0286E8_SPI_TMPRING_SIZE 0x0286E8 -#define S_0286E8_WAVES(x) (((unsigned)(x) & 0xFFF) << 0) -#define G_0286E8_WAVES(x) (((x) >> 0) & 0xFFF) -#define C_0286E8_WAVES 0xFFFFF000 -#define S_0286E8_WAVESIZE(x) (((unsigned)(x) & 0x1FFF) << 12) -#define G_0286E8_WAVESIZE(x) (((x) >> 12) & 0x1FFF) -#define C_0286E8_WAVESIZE 0xFE000FFF -#define R_028704_SPI_WAVE_MGMT_1 0x028704 /* not on CIK */ -#define S_028704_NUM_PS_WAVES(x) (((unsigned)(x) & 0x3F) << 0) -#define G_028704_NUM_PS_WAVES(x) (((x) >> 0) & 0x3F) -#define C_028704_NUM_PS_WAVES 0xFFFFFFC0 -#define S_028704_NUM_VS_WAVES(x) (((unsigned)(x) & 0x3F) << 6) -#define G_028704_NUM_VS_WAVES(x) (((x) >> 6) & 0x3F) -#define C_028704_NUM_VS_WAVES 0xFFFFF03F -#define S_028704_NUM_GS_WAVES(x) (((unsigned)(x) & 0x3F) << 12) -#define G_028704_NUM_GS_WAVES(x) (((x) >> 12) & 0x3F) -#define C_028704_NUM_GS_WAVES 0xFFFC0FFF -#define S_028704_NUM_ES_WAVES(x) (((unsigned)(x) & 0x3F) << 18) -#define G_028704_NUM_ES_WAVES(x) (((x) >> 18) & 0x3F) -#define C_028704_NUM_ES_WAVES 0xFF03FFFF -#define S_028704_NUM_HS_WAVES(x) (((unsigned)(x) & 0x3F) << 24) -#define G_028704_NUM_HS_WAVES(x) (((x) >> 24) & 0x3F) -#define C_028704_NUM_HS_WAVES 0xC0FFFFFF -#define R_028708_SPI_WAVE_MGMT_2 0x028708 /* not on CIK */ -#define S_028708_NUM_LS_WAVES(x) (((unsigned)(x) & 0x3F) << 0) -#define G_028708_NUM_LS_WAVES(x) (((x) >> 0) & 0x3F) -#define C_028708_NUM_LS_WAVES 0xFFFFFFC0 -#define R_02870C_SPI_SHADER_POS_FORMAT 0x02870C -#define S_02870C_POS0_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 0) -#define G_02870C_POS0_EXPORT_FORMAT(x) (((x) >> 0) & 0x0F) -#define C_02870C_POS0_EXPORT_FORMAT 0xFFFFFFF0 -#define V_02870C_SPI_SHADER_NONE 0x00 -#define V_02870C_SPI_SHADER_1COMP 0x01 -#define V_02870C_SPI_SHADER_2COMP 0x02 -#define V_02870C_SPI_SHADER_4COMPRESS 0x03 -#define V_02870C_SPI_SHADER_4COMP 0x04 -#define S_02870C_POS1_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 4) -#define G_02870C_POS1_EXPORT_FORMAT(x) (((x) >> 4) & 0x0F) -#define C_02870C_POS1_EXPORT_FORMAT 0xFFFFFF0F -#define V_02870C_SPI_SHADER_NONE 0x00 -#define V_02870C_SPI_SHADER_1COMP 0x01 -#define V_02870C_SPI_SHADER_2COMP 0x02 -#define V_02870C_SPI_SHADER_4COMPRESS 0x03 -#define V_02870C_SPI_SHADER_4COMP 0x04 -#define S_02870C_POS2_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 8) -#define G_02870C_POS2_EXPORT_FORMAT(x) (((x) >> 8) & 0x0F) -#define C_02870C_POS2_EXPORT_FORMAT 0xFFFFF0FF -#define V_02870C_SPI_SHADER_NONE 0x00 -#define V_02870C_SPI_SHADER_1COMP 0x01 -#define V_02870C_SPI_SHADER_2COMP 0x02 -#define V_02870C_SPI_SHADER_4COMPRESS 0x03 -#define V_02870C_SPI_SHADER_4COMP 0x04 -#define S_02870C_POS3_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 12) -#define G_02870C_POS3_EXPORT_FORMAT(x) (((x) >> 12) & 0x0F) -#define C_02870C_POS3_EXPORT_FORMAT 0xFFFF0FFF -#define V_02870C_SPI_SHADER_NONE 0x00 -#define V_02870C_SPI_SHADER_1COMP 0x01 -#define V_02870C_SPI_SHADER_2COMP 0x02 -#define V_02870C_SPI_SHADER_4COMPRESS 0x03 -#define V_02870C_SPI_SHADER_4COMP 0x04 -#define R_028710_SPI_SHADER_Z_FORMAT 0x028710 -#define S_028710_Z_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028710_Z_EXPORT_FORMAT(x) (((x) >> 0) & 0x0F) -#define C_028710_Z_EXPORT_FORMAT 0xFFFFFFF0 -#define V_028710_SPI_SHADER_ZERO 0x00 -#define V_028710_SPI_SHADER_32_R 0x01 -#define V_028710_SPI_SHADER_32_GR 0x02 -#define V_028710_SPI_SHADER_32_AR 0x03 -#define V_028710_SPI_SHADER_FP16_ABGR 0x04 -#define V_028710_SPI_SHADER_UNORM16_ABGR 0x05 -#define V_028710_SPI_SHADER_SNORM16_ABGR 0x06 -#define V_028710_SPI_SHADER_UINT16_ABGR 0x07 -#define V_028710_SPI_SHADER_SINT16_ABGR 0x08 -#define V_028710_SPI_SHADER_32_ABGR 0x09 -#define R_028714_SPI_SHADER_COL_FORMAT 0x028714 -#define S_028714_COL0_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028714_COL0_EXPORT_FORMAT(x) (((x) >> 0) & 0x0F) -#define C_028714_COL0_EXPORT_FORMAT 0xFFFFFFF0 -#define V_028714_SPI_SHADER_ZERO 0x00 -#define V_028714_SPI_SHADER_32_R 0x01 -#define V_028714_SPI_SHADER_32_GR 0x02 -#define V_028714_SPI_SHADER_32_AR 0x03 -#define V_028714_SPI_SHADER_FP16_ABGR 0x04 -#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 -#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 -#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 -#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 -#define V_028714_SPI_SHADER_32_ABGR 0x09 -#define S_028714_COL1_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 4) -#define G_028714_COL1_EXPORT_FORMAT(x) (((x) >> 4) & 0x0F) -#define C_028714_COL1_EXPORT_FORMAT 0xFFFFFF0F -#define V_028714_SPI_SHADER_ZERO 0x00 -#define V_028714_SPI_SHADER_32_R 0x01 -#define V_028714_SPI_SHADER_32_GR 0x02 -#define V_028714_SPI_SHADER_32_AR 0x03 -#define V_028714_SPI_SHADER_FP16_ABGR 0x04 -#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 -#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 -#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 -#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 -#define V_028714_SPI_SHADER_32_ABGR 0x09 -#define S_028714_COL2_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028714_COL2_EXPORT_FORMAT(x) (((x) >> 8) & 0x0F) -#define C_028714_COL2_EXPORT_FORMAT 0xFFFFF0FF -#define V_028714_SPI_SHADER_ZERO 0x00 -#define V_028714_SPI_SHADER_32_R 0x01 -#define V_028714_SPI_SHADER_32_GR 0x02 -#define V_028714_SPI_SHADER_32_AR 0x03 -#define V_028714_SPI_SHADER_FP16_ABGR 0x04 -#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 -#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 -#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 -#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 -#define V_028714_SPI_SHADER_32_ABGR 0x09 -#define S_028714_COL3_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 12) -#define G_028714_COL3_EXPORT_FORMAT(x) (((x) >> 12) & 0x0F) -#define C_028714_COL3_EXPORT_FORMAT 0xFFFF0FFF -#define V_028714_SPI_SHADER_ZERO 0x00 -#define V_028714_SPI_SHADER_32_R 0x01 -#define V_028714_SPI_SHADER_32_GR 0x02 -#define V_028714_SPI_SHADER_32_AR 0x03 -#define V_028714_SPI_SHADER_FP16_ABGR 0x04 -#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 -#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 -#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 -#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 -#define V_028714_SPI_SHADER_32_ABGR 0x09 -#define S_028714_COL4_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 16) -#define G_028714_COL4_EXPORT_FORMAT(x) (((x) >> 16) & 0x0F) -#define C_028714_COL4_EXPORT_FORMAT 0xFFF0FFFF -#define V_028714_SPI_SHADER_ZERO 0x00 -#define V_028714_SPI_SHADER_32_R 0x01 -#define V_028714_SPI_SHADER_32_GR 0x02 -#define V_028714_SPI_SHADER_32_AR 0x03 -#define V_028714_SPI_SHADER_FP16_ABGR 0x04 -#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 -#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 -#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 -#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 -#define V_028714_SPI_SHADER_32_ABGR 0x09 -#define S_028714_COL5_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 20) -#define G_028714_COL5_EXPORT_FORMAT(x) (((x) >> 20) & 0x0F) -#define C_028714_COL5_EXPORT_FORMAT 0xFF0FFFFF -#define V_028714_SPI_SHADER_ZERO 0x00 -#define V_028714_SPI_SHADER_32_R 0x01 -#define V_028714_SPI_SHADER_32_GR 0x02 -#define V_028714_SPI_SHADER_32_AR 0x03 -#define V_028714_SPI_SHADER_FP16_ABGR 0x04 -#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 -#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 -#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 -#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 -#define V_028714_SPI_SHADER_32_ABGR 0x09 -#define S_028714_COL6_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 24) -#define G_028714_COL6_EXPORT_FORMAT(x) (((x) >> 24) & 0x0F) -#define C_028714_COL6_EXPORT_FORMAT 0xF0FFFFFF -#define V_028714_SPI_SHADER_ZERO 0x00 -#define V_028714_SPI_SHADER_32_R 0x01 -#define V_028714_SPI_SHADER_32_GR 0x02 -#define V_028714_SPI_SHADER_32_AR 0x03 -#define V_028714_SPI_SHADER_FP16_ABGR 0x04 -#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 -#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 -#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 -#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 -#define V_028714_SPI_SHADER_32_ABGR 0x09 -#define S_028714_COL7_EXPORT_FORMAT(x) (((unsigned)(x) & 0x0F) << 28) -#define G_028714_COL7_EXPORT_FORMAT(x) (((x) >> 28) & 0x0F) -#define C_028714_COL7_EXPORT_FORMAT 0x0FFFFFFF -#define V_028714_SPI_SHADER_ZERO 0x00 -#define V_028714_SPI_SHADER_32_R 0x01 -#define V_028714_SPI_SHADER_32_GR 0x02 -#define V_028714_SPI_SHADER_32_AR 0x03 -#define V_028714_SPI_SHADER_FP16_ABGR 0x04 -#define V_028714_SPI_SHADER_UNORM16_ABGR 0x05 -#define V_028714_SPI_SHADER_SNORM16_ABGR 0x06 -#define V_028714_SPI_SHADER_UINT16_ABGR 0x07 -#define V_028714_SPI_SHADER_SINT16_ABGR 0x08 -#define V_028714_SPI_SHADER_32_ABGR 0x09 -/* Stoney */ -#define R_028754_SX_PS_DOWNCONVERT 0x028754 -#define S_028754_MRT0(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028754_MRT0(x) (((x) >> 0) & 0x0F) -#define C_028754_MRT0 0xFFFFFFF0 -#define V_028754_SX_RT_EXPORT_NO_CONVERSION 0 -#define V_028754_SX_RT_EXPORT_32_R 1 -#define V_028754_SX_RT_EXPORT_32_A 2 -#define V_028754_SX_RT_EXPORT_10_11_11 3 -#define V_028754_SX_RT_EXPORT_2_10_10_10 4 -#define V_028754_SX_RT_EXPORT_8_8_8_8 5 -#define V_028754_SX_RT_EXPORT_5_6_5 6 -#define V_028754_SX_RT_EXPORT_1_5_5_5 7 -#define V_028754_SX_RT_EXPORT_4_4_4_4 8 -#define V_028754_SX_RT_EXPORT_16_16_GR 9 -#define V_028754_SX_RT_EXPORT_16_16_AR 10 -#define S_028754_MRT1(x) (((unsigned)(x) & 0x0F) << 4) -#define G_028754_MRT1(x) (((x) >> 4) & 0x0F) -#define C_028754_MRT1 0xFFFFFF0F -#define S_028754_MRT2(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028754_MRT2(x) (((x) >> 8) & 0x0F) -#define C_028754_MRT2 0xFFFFF0FF -#define S_028754_MRT3(x) (((unsigned)(x) & 0x0F) << 12) -#define G_028754_MRT3(x) (((x) >> 12) & 0x0F) -#define C_028754_MRT3 0xFFFF0FFF -#define S_028754_MRT4(x) (((unsigned)(x) & 0x0F) << 16) -#define G_028754_MRT4(x) (((x) >> 16) & 0x0F) -#define C_028754_MRT4 0xFFF0FFFF -#define S_028754_MRT5(x) (((unsigned)(x) & 0x0F) << 20) -#define G_028754_MRT5(x) (((x) >> 20) & 0x0F) -#define C_028754_MRT5 0xFF0FFFFF -#define S_028754_MRT6(x) (((unsigned)(x) & 0x0F) << 24) -#define G_028754_MRT6(x) (((x) >> 24) & 0x0F) -#define C_028754_MRT6 0xF0FFFFFF -#define S_028754_MRT7(x) (((unsigned)(x) & 0x0F) << 28) -#define G_028754_MRT7(x) (((x) >> 28) & 0x0F) -#define C_028754_MRT7 0x0FFFFFFF -#define R_028758_SX_BLEND_OPT_EPSILON 0x028758 -#define S_028758_MRT0_EPSILON(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028758_MRT0_EPSILON(x) (((x) >> 0) & 0x0F) -#define C_028758_MRT0_EPSILON 0xFFFFFFF0 -#define V_028758_EXACT 0 -#define V_028758_11BIT_FORMAT 1 -#define V_028758_10BIT_FORMAT 3 -#define V_028758_8BIT_FORMAT 7 -#define V_028758_6BIT_FORMAT 11 -#define V_028758_5BIT_FORMAT 13 -#define V_028758_4BIT_FORMAT 15 -#define S_028758_MRT1_EPSILON(x) (((unsigned)(x) & 0x0F) << 4) -#define G_028758_MRT1_EPSILON(x) (((x) >> 4) & 0x0F) -#define C_028758_MRT1_EPSILON 0xFFFFFF0F -#define S_028758_MRT2_EPSILON(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028758_MRT2_EPSILON(x) (((x) >> 8) & 0x0F) -#define C_028758_MRT2_EPSILON 0xFFFFF0FF -#define S_028758_MRT3_EPSILON(x) (((unsigned)(x) & 0x0F) << 12) -#define G_028758_MRT3_EPSILON(x) (((x) >> 12) & 0x0F) -#define C_028758_MRT3_EPSILON 0xFFFF0FFF -#define S_028758_MRT4_EPSILON(x) (((unsigned)(x) & 0x0F) << 16) -#define G_028758_MRT4_EPSILON(x) (((x) >> 16) & 0x0F) -#define C_028758_MRT4_EPSILON 0xFFF0FFFF -#define S_028758_MRT5_EPSILON(x) (((unsigned)(x) & 0x0F) << 20) -#define G_028758_MRT5_EPSILON(x) (((x) >> 20) & 0x0F) -#define C_028758_MRT5_EPSILON 0xFF0FFFFF -#define S_028758_MRT6_EPSILON(x) (((unsigned)(x) & 0x0F) << 24) -#define G_028758_MRT6_EPSILON(x) (((x) >> 24) & 0x0F) -#define C_028758_MRT6_EPSILON 0xF0FFFFFF -#define S_028758_MRT7_EPSILON(x) (((unsigned)(x) & 0x0F) << 28) -#define G_028758_MRT7_EPSILON(x) (((x) >> 28) & 0x0F) -#define C_028758_MRT7_EPSILON 0x0FFFFFFF -#define R_02875C_SX_BLEND_OPT_CONTROL 0x02875C -#define S_02875C_MRT0_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 0) -#define G_02875C_MRT0_COLOR_OPT_DISABLE(x) (((x) >> 0) & 0x1) -#define C_02875C_MRT0_COLOR_OPT_DISABLE 0xFFFFFFFE -#define S_02875C_MRT0_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 1) -#define G_02875C_MRT0_ALPHA_OPT_DISABLE(x) (((x) >> 1) & 0x1) -#define C_02875C_MRT0_ALPHA_OPT_DISABLE 0xFFFFFFFD -#define S_02875C_MRT1_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 4) -#define G_02875C_MRT1_COLOR_OPT_DISABLE(x) (((x) >> 4) & 0x1) -#define C_02875C_MRT1_COLOR_OPT_DISABLE 0xFFFFFFEF -#define S_02875C_MRT1_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 5) -#define G_02875C_MRT1_ALPHA_OPT_DISABLE(x) (((x) >> 5) & 0x1) -#define C_02875C_MRT1_ALPHA_OPT_DISABLE 0xFFFFFFDF -#define S_02875C_MRT2_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 8) -#define G_02875C_MRT2_COLOR_OPT_DISABLE(x) (((x) >> 8) & 0x1) -#define C_02875C_MRT2_COLOR_OPT_DISABLE 0xFFFFFEFF -#define S_02875C_MRT2_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 9) -#define G_02875C_MRT2_ALPHA_OPT_DISABLE(x) (((x) >> 9) & 0x1) -#define C_02875C_MRT2_ALPHA_OPT_DISABLE 0xFFFFFDFF -#define S_02875C_MRT3_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 12) -#define G_02875C_MRT3_COLOR_OPT_DISABLE(x) (((x) >> 12) & 0x1) -#define C_02875C_MRT3_COLOR_OPT_DISABLE 0xFFFFEFFF -#define S_02875C_MRT3_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 13) -#define G_02875C_MRT3_ALPHA_OPT_DISABLE(x) (((x) >> 13) & 0x1) -#define C_02875C_MRT3_ALPHA_OPT_DISABLE 0xFFFFDFFF -#define S_02875C_MRT4_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 16) -#define G_02875C_MRT4_COLOR_OPT_DISABLE(x) (((x) >> 16) & 0x1) -#define C_02875C_MRT4_COLOR_OPT_DISABLE 0xFFFEFFFF -#define S_02875C_MRT4_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 17) -#define G_02875C_MRT4_ALPHA_OPT_DISABLE(x) (((x) >> 17) & 0x1) -#define C_02875C_MRT4_ALPHA_OPT_DISABLE 0xFFFDFFFF -#define S_02875C_MRT5_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 20) -#define G_02875C_MRT5_COLOR_OPT_DISABLE(x) (((x) >> 20) & 0x1) -#define C_02875C_MRT5_COLOR_OPT_DISABLE 0xFFEFFFFF -#define S_02875C_MRT5_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 21) -#define G_02875C_MRT5_ALPHA_OPT_DISABLE(x) (((x) >> 21) & 0x1) -#define C_02875C_MRT5_ALPHA_OPT_DISABLE 0xFFDFFFFF -#define S_02875C_MRT6_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 24) -#define G_02875C_MRT6_COLOR_OPT_DISABLE(x) (((x) >> 24) & 0x1) -#define C_02875C_MRT6_COLOR_OPT_DISABLE 0xFEFFFFFF -#define S_02875C_MRT6_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 25) -#define G_02875C_MRT6_ALPHA_OPT_DISABLE(x) (((x) >> 25) & 0x1) -#define C_02875C_MRT6_ALPHA_OPT_DISABLE 0xFDFFFFFF -#define S_02875C_MRT7_COLOR_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 28) -#define G_02875C_MRT7_COLOR_OPT_DISABLE(x) (((x) >> 28) & 0x1) -#define C_02875C_MRT7_COLOR_OPT_DISABLE 0xEFFFFFFF -#define S_02875C_MRT7_ALPHA_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 29) -#define G_02875C_MRT7_ALPHA_OPT_DISABLE(x) (((x) >> 29) & 0x1) -#define C_02875C_MRT7_ALPHA_OPT_DISABLE 0xDFFFFFFF -#define S_02875C_PIXEN_ZERO_OPT_DISABLE(x) (((unsigned)(x) & 0x1) << 31) -#define G_02875C_PIXEN_ZERO_OPT_DISABLE(x) (((x) >> 31) & 0x1) -#define C_02875C_PIXEN_ZERO_OPT_DISABLE 0x7FFFFFFF -#define R_028760_SX_MRT0_BLEND_OPT 0x028760 -#define S_028760_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) -#define G_028760_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) -#define C_028760_COLOR_SRC_OPT 0xFFFFFFF8 -#define V_028760_BLEND_OPT_PRESERVE_NONE_IGNORE_ALL 0 -#define V_028760_BLEND_OPT_PRESERVE_ALL_IGNORE_NONE 1 -#define V_028760_BLEND_OPT_PRESERVE_C1_IGNORE_C0 2 -#define V_028760_BLEND_OPT_PRESERVE_C0_IGNORE_C1 3 -#define V_028760_BLEND_OPT_PRESERVE_A1_IGNORE_A0 4 -#define V_028760_BLEND_OPT_PRESERVE_A0_IGNORE_A1 5 -#define V_028760_BLEND_OPT_PRESERVE_NONE_IGNORE_A0 6 -#define V_028760_BLEND_OPT_PRESERVE_NONE_IGNORE_NONE 7 -#define S_028760_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) -#define G_028760_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) -#define C_028760_COLOR_DST_OPT 0xFFFFFF8F -#define S_028760_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) -#define G_028760_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) -#define C_028760_COLOR_COMB_FCN 0xFFFFF8FF -#define V_028760_OPT_COMB_NONE 0 -#define V_028760_OPT_COMB_ADD 1 -#define V_028760_OPT_COMB_SUBTRACT 2 -#define V_028760_OPT_COMB_MIN 3 -#define V_028760_OPT_COMB_MAX 4 -#define V_028760_OPT_COMB_REVSUBTRACT 5 -#define V_028760_OPT_COMB_BLEND_DISABLED 6 -#define V_028760_OPT_COMB_SAFE_ADD 7 -#define S_028760_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) -#define G_028760_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) -#define C_028760_ALPHA_SRC_OPT 0xFFF8FFFF -#define S_028760_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) -#define G_028760_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) -#define C_028760_ALPHA_DST_OPT 0xFF8FFFFF -#define S_028760_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) -#define G_028760_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) -#define C_028760_ALPHA_COMB_FCN 0xF8FFFFFF -#define R_028764_SX_MRT1_BLEND_OPT 0x028764 -#define S_028764_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) -#define G_028764_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) -#define C_028764_COLOR_SRC_OPT 0xFFFFFFF8 -#define S_028764_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) -#define G_028764_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) -#define C_028764_COLOR_DST_OPT 0xFFFFFF8F -#define S_028764_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) -#define G_028764_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) -#define C_028764_COLOR_COMB_FCN 0xFFFFF8FF -#define S_028764_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) -#define G_028764_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) -#define C_028764_ALPHA_SRC_OPT 0xFFF8FFFF -#define S_028764_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) -#define G_028764_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) -#define C_028764_ALPHA_DST_OPT 0xFF8FFFFF -#define S_028764_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) -#define G_028764_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) -#define C_028764_ALPHA_COMB_FCN 0xF8FFFFFF -#define R_028768_SX_MRT2_BLEND_OPT 0x028768 -#define S_028768_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) -#define G_028768_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) -#define C_028768_COLOR_SRC_OPT 0xFFFFFFF8 -#define S_028768_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) -#define G_028768_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) -#define C_028768_COLOR_DST_OPT 0xFFFFFF8F -#define S_028768_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) -#define G_028768_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) -#define C_028768_COLOR_COMB_FCN 0xFFFFF8FF -#define S_028768_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) -#define G_028768_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) -#define C_028768_ALPHA_SRC_OPT 0xFFF8FFFF -#define S_028768_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) -#define G_028768_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) -#define C_028768_ALPHA_DST_OPT 0xFF8FFFFF -#define S_028768_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) -#define G_028768_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) -#define C_028768_ALPHA_COMB_FCN 0xF8FFFFFF -#define R_02876C_SX_MRT3_BLEND_OPT 0x02876C -#define S_02876C_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) -#define G_02876C_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) -#define C_02876C_COLOR_SRC_OPT 0xFFFFFFF8 -#define S_02876C_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) -#define G_02876C_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) -#define C_02876C_COLOR_DST_OPT 0xFFFFFF8F -#define S_02876C_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) -#define G_02876C_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) -#define C_02876C_COLOR_COMB_FCN 0xFFFFF8FF -#define S_02876C_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) -#define G_02876C_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) -#define C_02876C_ALPHA_SRC_OPT 0xFFF8FFFF -#define S_02876C_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) -#define G_02876C_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) -#define C_02876C_ALPHA_DST_OPT 0xFF8FFFFF -#define S_02876C_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) -#define G_02876C_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) -#define C_02876C_ALPHA_COMB_FCN 0xF8FFFFFF -#define R_028770_SX_MRT4_BLEND_OPT 0x028770 -#define S_028770_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) -#define G_028770_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) -#define C_028770_COLOR_SRC_OPT 0xFFFFFFF8 -#define S_028770_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) -#define G_028770_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) -#define C_028770_COLOR_DST_OPT 0xFFFFFF8F -#define S_028770_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) -#define G_028770_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) -#define C_028770_COLOR_COMB_FCN 0xFFFFF8FF -#define S_028770_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) -#define G_028770_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) -#define C_028770_ALPHA_SRC_OPT 0xFFF8FFFF -#define S_028770_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) -#define G_028770_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) -#define C_028770_ALPHA_DST_OPT 0xFF8FFFFF -#define S_028770_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) -#define G_028770_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) -#define C_028770_ALPHA_COMB_FCN 0xF8FFFFFF -#define R_028774_SX_MRT5_BLEND_OPT 0x028774 -#define S_028774_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) -#define G_028774_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) -#define C_028774_COLOR_SRC_OPT 0xFFFFFFF8 -#define S_028774_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) -#define G_028774_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) -#define C_028774_COLOR_DST_OPT 0xFFFFFF8F -#define S_028774_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) -#define G_028774_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) -#define C_028774_COLOR_COMB_FCN 0xFFFFF8FF -#define S_028774_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) -#define G_028774_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) -#define C_028774_ALPHA_SRC_OPT 0xFFF8FFFF -#define S_028774_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) -#define G_028774_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) -#define C_028774_ALPHA_DST_OPT 0xFF8FFFFF -#define S_028774_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) -#define G_028774_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) -#define C_028774_ALPHA_COMB_FCN 0xF8FFFFFF -#define R_028778_SX_MRT6_BLEND_OPT 0x028778 -#define S_028778_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) -#define G_028778_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) -#define C_028778_COLOR_SRC_OPT 0xFFFFFFF8 -#define S_028778_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) -#define G_028778_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) -#define C_028778_COLOR_DST_OPT 0xFFFFFF8F -#define S_028778_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) -#define G_028778_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) -#define C_028778_COLOR_COMB_FCN 0xFFFFF8FF -#define S_028778_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) -#define G_028778_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) -#define C_028778_ALPHA_SRC_OPT 0xFFF8FFFF -#define S_028778_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) -#define G_028778_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) -#define C_028778_ALPHA_DST_OPT 0xFF8FFFFF -#define S_028778_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) -#define G_028778_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) -#define C_028778_ALPHA_COMB_FCN 0xF8FFFFFF -#define R_02877C_SX_MRT7_BLEND_OPT 0x02877C -#define S_02877C_COLOR_SRC_OPT(x) (((unsigned)(x) & 0x07) << 0) -#define G_02877C_COLOR_SRC_OPT(x) (((x) >> 0) & 0x07) -#define C_02877C_COLOR_SRC_OPT 0xFFFFFFF8 -#define S_02877C_COLOR_DST_OPT(x) (((unsigned)(x) & 0x07) << 4) -#define G_02877C_COLOR_DST_OPT(x) (((x) >> 4) & 0x07) -#define C_02877C_COLOR_DST_OPT 0xFFFFFF8F -#define S_02877C_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 8) -#define G_02877C_COLOR_COMB_FCN(x) (((x) >> 8) & 0x07) -#define C_02877C_COLOR_COMB_FCN 0xFFFFF8FF -#define S_02877C_ALPHA_SRC_OPT(x) (((unsigned)(x) & 0x07) << 16) -#define G_02877C_ALPHA_SRC_OPT(x) (((x) >> 16) & 0x07) -#define C_02877C_ALPHA_SRC_OPT 0xFFF8FFFF -#define S_02877C_ALPHA_DST_OPT(x) (((unsigned)(x) & 0x07) << 20) -#define G_02877C_ALPHA_DST_OPT(x) (((x) >> 20) & 0x07) -#define C_02877C_ALPHA_DST_OPT 0xFF8FFFFF -#define S_02877C_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 24) -#define G_02877C_ALPHA_COMB_FCN(x) (((x) >> 24) & 0x07) -#define C_02877C_ALPHA_COMB_FCN 0xF8FFFFFF -/* */ -#define R_028780_CB_BLEND0_CONTROL 0x028780 -#define S_028780_COLOR_SRCBLEND(x) (((unsigned)(x) & 0x1F) << 0) -#define G_028780_COLOR_SRCBLEND(x) (((x) >> 0) & 0x1F) -#define C_028780_COLOR_SRCBLEND 0xFFFFFFE0 -#define V_028780_BLEND_ZERO 0x00 -#define V_028780_BLEND_ONE 0x01 -#define V_028780_BLEND_SRC_COLOR 0x02 -#define V_028780_BLEND_ONE_MINUS_SRC_COLOR 0x03 -#define V_028780_BLEND_SRC_ALPHA 0x04 -#define V_028780_BLEND_ONE_MINUS_SRC_ALPHA 0x05 -#define V_028780_BLEND_DST_ALPHA 0x06 -#define V_028780_BLEND_ONE_MINUS_DST_ALPHA 0x07 -#define V_028780_BLEND_DST_COLOR 0x08 -#define V_028780_BLEND_ONE_MINUS_DST_COLOR 0x09 -#define V_028780_BLEND_SRC_ALPHA_SATURATE 0x0A -#define V_028780_BLEND_CONSTANT_COLOR 0x0D -#define V_028780_BLEND_ONE_MINUS_CONSTANT_COLOR 0x0E -#define V_028780_BLEND_SRC1_COLOR 0x0F -#define V_028780_BLEND_INV_SRC1_COLOR 0x10 -#define V_028780_BLEND_SRC1_ALPHA 0x11 -#define V_028780_BLEND_INV_SRC1_ALPHA 0x12 -#define V_028780_BLEND_CONSTANT_ALPHA 0x13 -#define V_028780_BLEND_ONE_MINUS_CONSTANT_ALPHA 0x14 -#define S_028780_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x07) << 5) -#define G_028780_COLOR_COMB_FCN(x) (((x) >> 5) & 0x07) -#define C_028780_COLOR_COMB_FCN 0xFFFFFF1F -#define V_028780_COMB_DST_PLUS_SRC 0x00 -#define V_028780_COMB_SRC_MINUS_DST 0x01 -#define V_028780_COMB_MIN_DST_SRC 0x02 -#define V_028780_COMB_MAX_DST_SRC 0x03 -#define V_028780_COMB_DST_MINUS_SRC 0x04 -#define S_028780_COLOR_DESTBLEND(x) (((unsigned)(x) & 0x1F) << 8) -#define G_028780_COLOR_DESTBLEND(x) (((x) >> 8) & 0x1F) -#define C_028780_COLOR_DESTBLEND 0xFFFFE0FF -#define V_028780_BLEND_ZERO 0x00 -#define V_028780_BLEND_ONE 0x01 -#define V_028780_BLEND_SRC_COLOR 0x02 -#define V_028780_BLEND_ONE_MINUS_SRC_COLOR 0x03 -#define V_028780_BLEND_SRC_ALPHA 0x04 -#define V_028780_BLEND_ONE_MINUS_SRC_ALPHA 0x05 -#define V_028780_BLEND_DST_ALPHA 0x06 -#define V_028780_BLEND_ONE_MINUS_DST_ALPHA 0x07 -#define V_028780_BLEND_DST_COLOR 0x08 -#define V_028780_BLEND_ONE_MINUS_DST_COLOR 0x09 -#define V_028780_BLEND_SRC_ALPHA_SATURATE 0x0A -#define V_028780_BLEND_CONSTANT_COLOR 0x0D -#define V_028780_BLEND_ONE_MINUS_CONSTANT_COLOR 0x0E -#define V_028780_BLEND_SRC1_COLOR 0x0F -#define V_028780_BLEND_INV_SRC1_COLOR 0x10 -#define V_028780_BLEND_SRC1_ALPHA 0x11 -#define V_028780_BLEND_INV_SRC1_ALPHA 0x12 -#define V_028780_BLEND_CONSTANT_ALPHA 0x13 -#define V_028780_BLEND_ONE_MINUS_CONSTANT_ALPHA 0x14 -#define S_028780_ALPHA_SRCBLEND(x) (((unsigned)(x) & 0x1F) << 16) -#define G_028780_ALPHA_SRCBLEND(x) (((x) >> 16) & 0x1F) -#define C_028780_ALPHA_SRCBLEND 0xFFE0FFFF -#define V_028780_BLEND_ZERO 0x00 -#define V_028780_BLEND_ONE 0x01 -#define V_028780_BLEND_SRC_COLOR 0x02 -#define V_028780_BLEND_ONE_MINUS_SRC_COLOR 0x03 -#define V_028780_BLEND_SRC_ALPHA 0x04 -#define V_028780_BLEND_ONE_MINUS_SRC_ALPHA 0x05 -#define V_028780_BLEND_DST_ALPHA 0x06 -#define V_028780_BLEND_ONE_MINUS_DST_ALPHA 0x07 -#define V_028780_BLEND_DST_COLOR 0x08 -#define V_028780_BLEND_ONE_MINUS_DST_COLOR 0x09 -#define V_028780_BLEND_SRC_ALPHA_SATURATE 0x0A -#define V_028780_BLEND_CONSTANT_COLOR 0x0D -#define V_028780_BLEND_ONE_MINUS_CONSTANT_COLOR 0x0E -#define V_028780_BLEND_SRC1_COLOR 0x0F -#define V_028780_BLEND_INV_SRC1_COLOR 0x10 -#define V_028780_BLEND_SRC1_ALPHA 0x11 -#define V_028780_BLEND_INV_SRC1_ALPHA 0x12 -#define V_028780_BLEND_CONSTANT_ALPHA 0x13 -#define V_028780_BLEND_ONE_MINUS_CONSTANT_ALPHA 0x14 -#define S_028780_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x07) << 21) -#define G_028780_ALPHA_COMB_FCN(x) (((x) >> 21) & 0x07) -#define C_028780_ALPHA_COMB_FCN 0xFF1FFFFF -#define V_028780_COMB_DST_PLUS_SRC 0x00 -#define V_028780_COMB_SRC_MINUS_DST 0x01 -#define V_028780_COMB_MIN_DST_SRC 0x02 -#define V_028780_COMB_MAX_DST_SRC 0x03 -#define V_028780_COMB_DST_MINUS_SRC 0x04 -#define S_028780_ALPHA_DESTBLEND(x) (((unsigned)(x) & 0x1F) << 24) -#define G_028780_ALPHA_DESTBLEND(x) (((x) >> 24) & 0x1F) -#define C_028780_ALPHA_DESTBLEND 0xE0FFFFFF -#define V_028780_BLEND_ZERO 0x00 -#define V_028780_BLEND_ONE 0x01 -#define V_028780_BLEND_SRC_COLOR 0x02 -#define V_028780_BLEND_ONE_MINUS_SRC_COLOR 0x03 -#define V_028780_BLEND_SRC_ALPHA 0x04 -#define V_028780_BLEND_ONE_MINUS_SRC_ALPHA 0x05 -#define V_028780_BLEND_DST_ALPHA 0x06 -#define V_028780_BLEND_ONE_MINUS_DST_ALPHA 0x07 -#define V_028780_BLEND_DST_COLOR 0x08 -#define V_028780_BLEND_ONE_MINUS_DST_COLOR 0x09 -#define V_028780_BLEND_SRC_ALPHA_SATURATE 0x0A -#define V_028780_BLEND_CONSTANT_COLOR 0x0D -#define V_028780_BLEND_ONE_MINUS_CONSTANT_COLOR 0x0E -#define V_028780_BLEND_SRC1_COLOR 0x0F -#define V_028780_BLEND_INV_SRC1_COLOR 0x10 -#define V_028780_BLEND_SRC1_ALPHA 0x11 -#define V_028780_BLEND_INV_SRC1_ALPHA 0x12 -#define V_028780_BLEND_CONSTANT_ALPHA 0x13 -#define V_028780_BLEND_ONE_MINUS_CONSTANT_ALPHA 0x14 -#define S_028780_SEPARATE_ALPHA_BLEND(x) (((unsigned)(x) & 0x1) << 29) -#define G_028780_SEPARATE_ALPHA_BLEND(x) (((x) >> 29) & 0x1) -#define C_028780_SEPARATE_ALPHA_BLEND 0xDFFFFFFF -#define S_028780_ENABLE(x) (((unsigned)(x) & 0x1) << 30) -#define G_028780_ENABLE(x) (((x) >> 30) & 0x1) -#define C_028780_ENABLE 0xBFFFFFFF -#define S_028780_DISABLE_ROP3(x) (((unsigned)(x) & 0x1) << 31) -#define G_028780_DISABLE_ROP3(x) (((x) >> 31) & 0x1) -#define C_028780_DISABLE_ROP3 0x7FFFFFFF -#define R_028784_CB_BLEND1_CONTROL 0x028784 -#define R_028788_CB_BLEND2_CONTROL 0x028788 -#define R_02878C_CB_BLEND3_CONTROL 0x02878C -#define R_028790_CB_BLEND4_CONTROL 0x028790 -#define R_028794_CB_BLEND5_CONTROL 0x028794 -#define R_028798_CB_BLEND6_CONTROL 0x028798 -#define R_02879C_CB_BLEND7_CONTROL 0x02879C -#define R_0287CC_CS_COPY_STATE 0x0287CC -#define S_0287CC_SRC_STATE_ID(x) (((unsigned)(x) & 0x07) << 0) -#define G_0287CC_SRC_STATE_ID(x) (((x) >> 0) & 0x07) -#define C_0287CC_SRC_STATE_ID 0xFFFFFFF8 -#define R_0287D4_PA_CL_POINT_X_RAD 0x0287D4 -#define R_0287D8_PA_CL_POINT_Y_RAD 0x0287D8 -#define R_0287DC_PA_CL_POINT_SIZE 0x0287DC -#define R_0287E0_PA_CL_POINT_CULL_RAD 0x0287E0 -#define R_0287E4_VGT_DMA_BASE_HI 0x0287E4 -#define S_0287E4_BASE_ADDR(x) (((unsigned)(x) & 0xFF) << 0) -#define G_0287E4_BASE_ADDR(x) (((x) >> 0) & 0xFF) -#define C_0287E4_BASE_ADDR 0xFFFFFF00 -#define R_0287E8_VGT_DMA_BASE 0x0287E8 -#define R_0287F0_VGT_DRAW_INITIATOR 0x0287F0 -#define S_0287F0_SOURCE_SELECT(x) (((unsigned)(x) & 0x03) << 0) -#define G_0287F0_SOURCE_SELECT(x) (((x) >> 0) & 0x03) -#define C_0287F0_SOURCE_SELECT 0xFFFFFFFC -#define V_0287F0_DI_SRC_SEL_DMA 0x00 -#define V_0287F0_DI_SRC_SEL_IMMEDIATE 0x01 /* not on CIK */ -#define V_0287F0_DI_SRC_SEL_AUTO_INDEX 0x02 -#define V_0287F0_DI_SRC_SEL_RESERVED 0x03 -#define S_0287F0_MAJOR_MODE(x) (((unsigned)(x) & 0x03) << 2) -#define G_0287F0_MAJOR_MODE(x) (((x) >> 2) & 0x03) -#define C_0287F0_MAJOR_MODE 0xFFFFFFF3 -#define V_0287F0_DI_MAJOR_MODE_0 0x00 -#define V_0287F0_DI_MAJOR_MODE_1 0x01 -#define S_0287F0_NOT_EOP(x) (((unsigned)(x) & 0x1) << 5) -#define G_0287F0_NOT_EOP(x) (((x) >> 5) & 0x1) -#define C_0287F0_NOT_EOP 0xFFFFFFDF -#define S_0287F0_USE_OPAQUE(x) (((unsigned)(x) & 0x1) << 6) -#define G_0287F0_USE_OPAQUE(x) (((x) >> 6) & 0x1) -#define C_0287F0_USE_OPAQUE 0xFFFFFFBF -#define R_0287F4_VGT_IMMED_DATA 0x0287F4 /* not on CIK */ -#define R_0287F8_VGT_EVENT_ADDRESS_REG 0x0287F8 -#define S_0287F8_ADDRESS_LOW(x) (((unsigned)(x) & 0xFFFFFFF) << 0) -#define G_0287F8_ADDRESS_LOW(x) (((x) >> 0) & 0xFFFFFFF) -#define C_0287F8_ADDRESS_LOW 0xF0000000 -#define R_028800_DB_DEPTH_CONTROL 0x028800 -#define S_028800_STENCIL_ENABLE(x) (((unsigned)(x) & 0x1) << 0) -#define G_028800_STENCIL_ENABLE(x) (((x) >> 0) & 0x1) -#define C_028800_STENCIL_ENABLE 0xFFFFFFFE -#define S_028800_Z_ENABLE(x) (((unsigned)(x) & 0x1) << 1) -#define G_028800_Z_ENABLE(x) (((x) >> 1) & 0x1) -#define C_028800_Z_ENABLE 0xFFFFFFFD -#define S_028800_Z_WRITE_ENABLE(x) (((unsigned)(x) & 0x1) << 2) -#define G_028800_Z_WRITE_ENABLE(x) (((x) >> 2) & 0x1) -#define C_028800_Z_WRITE_ENABLE 0xFFFFFFFB -#define S_028800_DEPTH_BOUNDS_ENABLE(x) (((unsigned)(x) & 0x1) << 3) -#define G_028800_DEPTH_BOUNDS_ENABLE(x) (((x) >> 3) & 0x1) -#define C_028800_DEPTH_BOUNDS_ENABLE 0xFFFFFFF7 -#define S_028800_ZFUNC(x) (((unsigned)(x) & 0x07) << 4) -#define G_028800_ZFUNC(x) (((x) >> 4) & 0x07) -#define C_028800_ZFUNC 0xFFFFFF8F -#define V_028800_FRAG_NEVER 0x00 -#define V_028800_FRAG_LESS 0x01 -#define V_028800_FRAG_EQUAL 0x02 -#define V_028800_FRAG_LEQUAL 0x03 -#define V_028800_FRAG_GREATER 0x04 -#define V_028800_FRAG_NOTEQUAL 0x05 -#define V_028800_FRAG_GEQUAL 0x06 -#define V_028800_FRAG_ALWAYS 0x07 -#define S_028800_BACKFACE_ENABLE(x) (((unsigned)(x) & 0x1) << 7) -#define G_028800_BACKFACE_ENABLE(x) (((x) >> 7) & 0x1) -#define C_028800_BACKFACE_ENABLE 0xFFFFFF7F -#define S_028800_STENCILFUNC(x) (((unsigned)(x) & 0x07) << 8) -#define G_028800_STENCILFUNC(x) (((x) >> 8) & 0x07) -#define C_028800_STENCILFUNC 0xFFFFF8FF -#define V_028800_REF_NEVER 0x00 -#define V_028800_REF_LESS 0x01 -#define V_028800_REF_EQUAL 0x02 -#define V_028800_REF_LEQUAL 0x03 -#define V_028800_REF_GREATER 0x04 -#define V_028800_REF_NOTEQUAL 0x05 -#define V_028800_REF_GEQUAL 0x06 -#define V_028800_REF_ALWAYS 0x07 -#define S_028800_STENCILFUNC_BF(x) (((unsigned)(x) & 0x07) << 20) -#define G_028800_STENCILFUNC_BF(x) (((x) >> 20) & 0x07) -#define C_028800_STENCILFUNC_BF 0xFF8FFFFF -#define V_028800_REF_NEVER 0x00 -#define V_028800_REF_LESS 0x01 -#define V_028800_REF_EQUAL 0x02 -#define V_028800_REF_LEQUAL 0x03 -#define V_028800_REF_GREATER 0x04 -#define V_028800_REF_NOTEQUAL 0x05 -#define V_028800_REF_GEQUAL 0x06 -#define V_028800_REF_ALWAYS 0x07 -#define S_028800_ENABLE_COLOR_WRITES_ON_DEPTH_FAIL(x) (((unsigned)(x) & 0x1) << 30) -#define G_028800_ENABLE_COLOR_WRITES_ON_DEPTH_FAIL(x) (((x) >> 30) & 0x1) -#define C_028800_ENABLE_COLOR_WRITES_ON_DEPTH_FAIL 0xBFFFFFFF -#define S_028800_DISABLE_COLOR_WRITES_ON_DEPTH_PASS(x) (((unsigned)(x) & 0x1) << 31) -#define G_028800_DISABLE_COLOR_WRITES_ON_DEPTH_PASS(x) (((x) >> 31) & 0x1) -#define C_028800_DISABLE_COLOR_WRITES_ON_DEPTH_PASS 0x7FFFFFFF -#define R_028804_DB_EQAA 0x028804 -#define S_028804_MAX_ANCHOR_SAMPLES(x) (((unsigned)(x) & 0x7) << 0) -#define G_028804_MAX_ANCHOR_SAMPLES(x) (((x) >> 0) & 0x07) -#define C_028804_MAX_ANCHOR_SAMPLES 0xFFFFFFF8 -#define S_028804_PS_ITER_SAMPLES(x) (((unsigned)(x) & 0x7) << 4) -#define G_028804_PS_ITER_SAMPLES(x) (((x) >> 4) & 0x07) -#define C_028804_PS_ITER_SAMPLES 0xFFFFFF8F -#define S_028804_MASK_EXPORT_NUM_SAMPLES(x) (((unsigned)(x) & 0x7) << 8) -#define G_028804_MASK_EXPORT_NUM_SAMPLES(x) (((x) >> 8) & 0x07) -#define C_028804_MASK_EXPORT_NUM_SAMPLES 0xFFFFF8FF -#define S_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((unsigned)(x) & 0x7) << 12) -#define G_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((x) >> 12) & 0x07) -#define C_028804_ALPHA_TO_MASK_NUM_SAMPLES 0xFFFF8FFF -#define S_028804_HIGH_QUALITY_INTERSECTIONS(x) (((unsigned)(x) & 0x1) << 16) -#define G_028804_HIGH_QUALITY_INTERSECTIONS(x) (((x) >> 16) & 0x1) -#define C_028804_HIGH_QUALITY_INTERSECTIONS 0xFFFEFFFF -#define S_028804_INCOHERENT_EQAA_READS(x) (((unsigned)(x) & 0x1) << 17) -#define G_028804_INCOHERENT_EQAA_READS(x) (((x) >> 17) & 0x1) -#define C_028804_INCOHERENT_EQAA_READS 0xFFFDFFFF -#define S_028804_INTERPOLATE_COMP_Z(x) (((unsigned)(x) & 0x1) << 18) -#define G_028804_INTERPOLATE_COMP_Z(x) (((x) >> 18) & 0x1) -#define C_028804_INTERPOLATE_COMP_Z 0xFFFBFFFF -#define S_028804_INTERPOLATE_SRC_Z(x) (((unsigned)(x) & 0x1) << 19) -#define G_028804_INTERPOLATE_SRC_Z(x) (((x) >> 19) & 0x1) -#define C_028804_INTERPOLATE_SRC_Z 0xFFF7FFFF -#define S_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((unsigned)(x) & 0x1) << 20) -#define G_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((x) >> 20) & 0x1) -#define C_028804_STATIC_ANCHOR_ASSOCIATIONS 0xFFEFFFFF -#define S_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((unsigned)(x) & 0x1) << 21) -#define G_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((x) >> 21) & 0x1) -#define C_028804_ALPHA_TO_MASK_EQAA_DISABLE 0xFFDFFFFF -#define S_028804_OVERRASTERIZATION_AMOUNT(x) (((unsigned)(x) & 0x07) << 24) -#define G_028804_OVERRASTERIZATION_AMOUNT(x) (((x) >> 24) & 0x07) -#define C_028804_OVERRASTERIZATION_AMOUNT 0xF8FFFFFF -#define S_028804_ENABLE_POSTZ_OVERRASTERIZATION(x) (((unsigned)(x) & 0x1) << 27) -#define G_028804_ENABLE_POSTZ_OVERRASTERIZATION(x) (((x) >> 27) & 0x1) -#define C_028804_ENABLE_POSTZ_OVERRASTERIZATION 0xF7FFFFFF -#define R_028808_CB_COLOR_CONTROL 0x028808 -#define S_028808_DISABLE_DUAL_QUAD(x) (((unsigned)(x) & 0x1) << 0) -#define G_028808_DISABLE_DUAL_QUAD(x) (((x) >> 0) & 0x1) -#define C_028808_DISABLE_DUAL_QUAD 0xFFFFFFFE -#define S_028808_DEGAMMA_ENABLE(x) (((unsigned)(x) & 0x1) << 3) -#define G_028808_DEGAMMA_ENABLE(x) (((x) >> 3) & 0x1) -#define C_028808_DEGAMMA_ENABLE 0xFFFFFFF7 -#define S_028808_MODE(x) (((unsigned)(x) & 0x07) << 4) -#define G_028808_MODE(x) (((x) >> 4) & 0x07) -#define C_028808_MODE 0xFFFFFF8F -#define V_028808_CB_DISABLE 0x00 -#define V_028808_CB_NORMAL 0x01 -#define V_028808_CB_ELIMINATE_FAST_CLEAR 0x02 -#define V_028808_CB_RESOLVE 0x03 -#define V_028808_CB_FMASK_DECOMPRESS 0x05 -#define V_028808_CB_DCC_DECOMPRESS 0x06 -#define S_028808_ROP3(x) (((unsigned)(x) & 0xFF) << 16) -#define G_028808_ROP3(x) (((x) >> 16) & 0xFF) -#define C_028808_ROP3 0xFF00FFFF -#define V_028808_X_0X00 0x00 -#define V_028808_X_0X05 0x05 -#define V_028808_X_0X0A 0x0A -#define V_028808_X_0X0F 0x0F -#define V_028808_X_0X11 0x11 -#define V_028808_X_0X22 0x22 -#define V_028808_X_0X33 0x33 -#define V_028808_X_0X44 0x44 -#define V_028808_X_0X50 0x50 -#define V_028808_X_0X55 0x55 -#define V_028808_X_0X5A 0x5A -#define V_028808_X_0X5F 0x5F -#define V_028808_X_0X66 0x66 -#define V_028808_X_0X77 0x77 -#define V_028808_X_0X88 0x88 -#define V_028808_X_0X99 0x99 -#define V_028808_X_0XA0 0xA0 -#define V_028808_X_0XA5 0xA5 -#define V_028808_X_0XAA 0xAA -#define V_028808_X_0XAF 0xAF -#define V_028808_X_0XBB 0xBB -#define V_028808_X_0XCC 0xCC -#define V_028808_X_0XDD 0xDD -#define V_028808_X_0XEE 0xEE -#define V_028808_X_0XF0 0xF0 -#define V_028808_X_0XF5 0xF5 -#define V_028808_X_0XFA 0xFA -#define V_028808_X_0XFF 0xFF -#define R_02880C_DB_SHADER_CONTROL 0x02880C -#define S_02880C_Z_EXPORT_ENABLE(x) (((unsigned)(x) & 0x1) << 0) -#define G_02880C_Z_EXPORT_ENABLE(x) (((x) >> 0) & 0x1) -#define C_02880C_Z_EXPORT_ENABLE 0xFFFFFFFE -#define S_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE(x) (((unsigned)(x) & 0x1) << 1) -#define G_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE(x) (((x) >> 1) & 0x1) -#define C_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE 0xFFFFFFFD -#define S_02880C_STENCIL_OP_VAL_EXPORT_ENABLE(x) (((unsigned)(x) & 0x1) << 2) -#define G_02880C_STENCIL_OP_VAL_EXPORT_ENABLE(x) (((x) >> 2) & 0x1) -#define C_02880C_STENCIL_OP_VAL_EXPORT_ENABLE 0xFFFFFFFB -#define S_02880C_Z_ORDER(x) (((unsigned)(x) & 0x03) << 4) -#define G_02880C_Z_ORDER(x) (((x) >> 4) & 0x03) -#define C_02880C_Z_ORDER 0xFFFFFFCF -#define V_02880C_LATE_Z 0x00 -#define V_02880C_EARLY_Z_THEN_LATE_Z 0x01 -#define V_02880C_RE_Z 0x02 -#define V_02880C_EARLY_Z_THEN_RE_Z 0x03 -#define S_02880C_KILL_ENABLE(x) (((unsigned)(x) & 0x1) << 6) -#define G_02880C_KILL_ENABLE(x) (((x) >> 6) & 0x1) -#define C_02880C_KILL_ENABLE 0xFFFFFFBF -#define S_02880C_COVERAGE_TO_MASK_ENABLE(x) (((unsigned)(x) & 0x1) << 7) -#define G_02880C_COVERAGE_TO_MASK_ENABLE(x) (((x) >> 7) & 0x1) -#define C_02880C_COVERAGE_TO_MASK_ENABLE 0xFFFFFF7F -#define S_02880C_MASK_EXPORT_ENABLE(x) (((unsigned)(x) & 0x1) << 8) -#define G_02880C_MASK_EXPORT_ENABLE(x) (((x) >> 8) & 0x1) -#define C_02880C_MASK_EXPORT_ENABLE 0xFFFFFEFF -#define S_02880C_EXEC_ON_HIER_FAIL(x) (((unsigned)(x) & 0x1) << 9) -#define G_02880C_EXEC_ON_HIER_FAIL(x) (((x) >> 9) & 0x1) -#define C_02880C_EXEC_ON_HIER_FAIL 0xFFFFFDFF -#define S_02880C_EXEC_ON_NOOP(x) (((unsigned)(x) & 0x1) << 10) -#define G_02880C_EXEC_ON_NOOP(x) (((x) >> 10) & 0x1) -#define C_02880C_EXEC_ON_NOOP 0xFFFFFBFF -#define S_02880C_ALPHA_TO_MASK_DISABLE(x) (((unsigned)(x) & 0x1) << 11) -#define G_02880C_ALPHA_TO_MASK_DISABLE(x) (((x) >> 11) & 0x1) -#define C_02880C_ALPHA_TO_MASK_DISABLE 0xFFFFF7FF -#define S_02880C_DEPTH_BEFORE_SHADER(x) (((unsigned)(x) & 0x1) << 12) -#define G_02880C_DEPTH_BEFORE_SHADER(x) (((x) >> 12) & 0x1) -#define C_02880C_DEPTH_BEFORE_SHADER 0xFFFFEFFF -/* CIK */ -#define S_02880C_CONSERVATIVE_Z_EXPORT(x) (((unsigned)(x) & 0x03) << 13) -#define G_02880C_CONSERVATIVE_Z_EXPORT(x) (((x) >> 13) & 0x03) -#define C_02880C_CONSERVATIVE_Z_EXPORT 0xFFFF9FFF -#define V_02880C_EXPORT_ANY_Z 0 -#define V_02880C_EXPORT_LESS_THAN_Z 1 -#define V_02880C_EXPORT_GREATER_THAN_Z 2 -#define V_02880C_EXPORT_RESERVED 3 -/* */ -/* Stoney */ -#define S_02880C_DUAL_QUAD_DISABLE(x) (((unsigned)(x) & 0x1) << 15) -#define G_02880C_DUAL_QUAD_DISABLE(x) (((x) >> 15) & 0x1) -#define C_02880C_DUAL_QUAD_DISABLE 0xFFFF7FFF -/* */ -#define R_028810_PA_CL_CLIP_CNTL 0x028810 -#define S_028810_UCP_ENA_0(x) (((unsigned)(x) & 0x1) << 0) -#define G_028810_UCP_ENA_0(x) (((x) >> 0) & 0x1) -#define C_028810_UCP_ENA_0 0xFFFFFFFE -#define S_028810_UCP_ENA_1(x) (((unsigned)(x) & 0x1) << 1) -#define G_028810_UCP_ENA_1(x) (((x) >> 1) & 0x1) -#define C_028810_UCP_ENA_1 0xFFFFFFFD -#define S_028810_UCP_ENA_2(x) (((unsigned)(x) & 0x1) << 2) -#define G_028810_UCP_ENA_2(x) (((x) >> 2) & 0x1) -#define C_028810_UCP_ENA_2 0xFFFFFFFB -#define S_028810_UCP_ENA_3(x) (((unsigned)(x) & 0x1) << 3) -#define G_028810_UCP_ENA_3(x) (((x) >> 3) & 0x1) -#define C_028810_UCP_ENA_3 0xFFFFFFF7 -#define S_028810_UCP_ENA_4(x) (((unsigned)(x) & 0x1) << 4) -#define G_028810_UCP_ENA_4(x) (((x) >> 4) & 0x1) -#define C_028810_UCP_ENA_4 0xFFFFFFEF -#define S_028810_UCP_ENA_5(x) (((unsigned)(x) & 0x1) << 5) -#define G_028810_UCP_ENA_5(x) (((x) >> 5) & 0x1) -#define C_028810_UCP_ENA_5 0xFFFFFFDF -#define S_028810_PS_UCP_Y_SCALE_NEG(x) (((unsigned)(x) & 0x1) << 13) -#define G_028810_PS_UCP_Y_SCALE_NEG(x) (((x) >> 13) & 0x1) -#define C_028810_PS_UCP_Y_SCALE_NEG 0xFFFFDFFF -#define S_028810_PS_UCP_MODE(x) (((unsigned)(x) & 0x03) << 14) -#define G_028810_PS_UCP_MODE(x) (((x) >> 14) & 0x03) -#define C_028810_PS_UCP_MODE 0xFFFF3FFF -#define S_028810_CLIP_DISABLE(x) (((unsigned)(x) & 0x1) << 16) -#define G_028810_CLIP_DISABLE(x) (((x) >> 16) & 0x1) -#define C_028810_CLIP_DISABLE 0xFFFEFFFF -#define S_028810_UCP_CULL_ONLY_ENA(x) (((unsigned)(x) & 0x1) << 17) -#define G_028810_UCP_CULL_ONLY_ENA(x) (((x) >> 17) & 0x1) -#define C_028810_UCP_CULL_ONLY_ENA 0xFFFDFFFF -#define S_028810_BOUNDARY_EDGE_FLAG_ENA(x) (((unsigned)(x) & 0x1) << 18) -#define G_028810_BOUNDARY_EDGE_FLAG_ENA(x) (((x) >> 18) & 0x1) -#define C_028810_BOUNDARY_EDGE_FLAG_ENA 0xFFFBFFFF -#define S_028810_DX_CLIP_SPACE_DEF(x) (((unsigned)(x) & 0x1) << 19) -#define G_028810_DX_CLIP_SPACE_DEF(x) (((x) >> 19) & 0x1) -#define C_028810_DX_CLIP_SPACE_DEF 0xFFF7FFFF -#define S_028810_DIS_CLIP_ERR_DETECT(x) (((unsigned)(x) & 0x1) << 20) -#define G_028810_DIS_CLIP_ERR_DETECT(x) (((x) >> 20) & 0x1) -#define C_028810_DIS_CLIP_ERR_DETECT 0xFFEFFFFF -#define S_028810_VTX_KILL_OR(x) (((unsigned)(x) & 0x1) << 21) -#define G_028810_VTX_KILL_OR(x) (((x) >> 21) & 0x1) -#define C_028810_VTX_KILL_OR 0xFFDFFFFF -#define S_028810_DX_RASTERIZATION_KILL(x) (((unsigned)(x) & 0x1) << 22) -#define G_028810_DX_RASTERIZATION_KILL(x) (((x) >> 22) & 0x1) -#define C_028810_DX_RASTERIZATION_KILL 0xFFBFFFFF -#define S_028810_DX_LINEAR_ATTR_CLIP_ENA(x) (((unsigned)(x) & 0x1) << 24) -#define G_028810_DX_LINEAR_ATTR_CLIP_ENA(x) (((x) >> 24) & 0x1) -#define C_028810_DX_LINEAR_ATTR_CLIP_ENA 0xFEFFFFFF -#define S_028810_VTE_VPORT_PROVOKE_DISABLE(x) (((unsigned)(x) & 0x1) << 25) -#define G_028810_VTE_VPORT_PROVOKE_DISABLE(x) (((x) >> 25) & 0x1) -#define C_028810_VTE_VPORT_PROVOKE_DISABLE 0xFDFFFFFF -#define S_028810_ZCLIP_NEAR_DISABLE(x) (((unsigned)(x) & 0x1) << 26) -#define G_028810_ZCLIP_NEAR_DISABLE(x) (((x) >> 26) & 0x1) -#define C_028810_ZCLIP_NEAR_DISABLE 0xFBFFFFFF -#define S_028810_ZCLIP_FAR_DISABLE(x) (((unsigned)(x) & 0x1) << 27) -#define G_028810_ZCLIP_FAR_DISABLE(x) (((x) >> 27) & 0x1) -#define C_028810_ZCLIP_FAR_DISABLE 0xF7FFFFFF -#define R_028814_PA_SU_SC_MODE_CNTL 0x028814 -#define S_028814_CULL_FRONT(x) (((unsigned)(x) & 0x1) << 0) -#define G_028814_CULL_FRONT(x) (((x) >> 0) & 0x1) -#define C_028814_CULL_FRONT 0xFFFFFFFE -#define S_028814_CULL_BACK(x) (((unsigned)(x) & 0x1) << 1) -#define G_028814_CULL_BACK(x) (((x) >> 1) & 0x1) -#define C_028814_CULL_BACK 0xFFFFFFFD -#define S_028814_FACE(x) (((unsigned)(x) & 0x1) << 2) -#define G_028814_FACE(x) (((x) >> 2) & 0x1) -#define C_028814_FACE 0xFFFFFFFB -#define S_028814_POLY_MODE(x) (((unsigned)(x) & 0x03) << 3) -#define G_028814_POLY_MODE(x) (((x) >> 3) & 0x03) -#define C_028814_POLY_MODE 0xFFFFFFE7 -#define V_028814_X_DISABLE_POLY_MODE 0x00 -#define V_028814_X_DUAL_MODE 0x01 -#define S_028814_POLYMODE_FRONT_PTYPE(x) (((unsigned)(x) & 0x07) << 5) -#define G_028814_POLYMODE_FRONT_PTYPE(x) (((x) >> 5) & 0x07) -#define C_028814_POLYMODE_FRONT_PTYPE 0xFFFFFF1F -#define V_028814_X_DRAW_POINTS 0x00 -#define V_028814_X_DRAW_LINES 0x01 -#define V_028814_X_DRAW_TRIANGLES 0x02 -#define S_028814_POLYMODE_BACK_PTYPE(x) (((unsigned)(x) & 0x07) << 8) -#define G_028814_POLYMODE_BACK_PTYPE(x) (((x) >> 8) & 0x07) -#define C_028814_POLYMODE_BACK_PTYPE 0xFFFFF8FF -#define V_028814_X_DRAW_POINTS 0x00 -#define V_028814_X_DRAW_LINES 0x01 -#define V_028814_X_DRAW_TRIANGLES 0x02 -#define S_028814_POLY_OFFSET_FRONT_ENABLE(x) (((unsigned)(x) & 0x1) << 11) -#define G_028814_POLY_OFFSET_FRONT_ENABLE(x) (((x) >> 11) & 0x1) -#define C_028814_POLY_OFFSET_FRONT_ENABLE 0xFFFFF7FF -#define S_028814_POLY_OFFSET_BACK_ENABLE(x) (((unsigned)(x) & 0x1) << 12) -#define G_028814_POLY_OFFSET_BACK_ENABLE(x) (((x) >> 12) & 0x1) -#define C_028814_POLY_OFFSET_BACK_ENABLE 0xFFFFEFFF -#define S_028814_POLY_OFFSET_PARA_ENABLE(x) (((unsigned)(x) & 0x1) << 13) -#define G_028814_POLY_OFFSET_PARA_ENABLE(x) (((x) >> 13) & 0x1) -#define C_028814_POLY_OFFSET_PARA_ENABLE 0xFFFFDFFF -#define S_028814_VTX_WINDOW_OFFSET_ENABLE(x) (((unsigned)(x) & 0x1) << 16) -#define G_028814_VTX_WINDOW_OFFSET_ENABLE(x) (((x) >> 16) & 0x1) -#define C_028814_VTX_WINDOW_OFFSET_ENABLE 0xFFFEFFFF -#define S_028814_PROVOKING_VTX_LAST(x) (((unsigned)(x) & 0x1) << 19) -#define G_028814_PROVOKING_VTX_LAST(x) (((x) >> 19) & 0x1) -#define C_028814_PROVOKING_VTX_LAST 0xFFF7FFFF -#define S_028814_PERSP_CORR_DIS(x) (((unsigned)(x) & 0x1) << 20) -#define G_028814_PERSP_CORR_DIS(x) (((x) >> 20) & 0x1) -#define C_028814_PERSP_CORR_DIS 0xFFEFFFFF -#define S_028814_MULTI_PRIM_IB_ENA(x) (((unsigned)(x) & 0x1) << 21) -#define G_028814_MULTI_PRIM_IB_ENA(x) (((x) >> 21) & 0x1) -#define C_028814_MULTI_PRIM_IB_ENA 0xFFDFFFFF -#define R_028818_PA_CL_VTE_CNTL 0x028818 -#define S_028818_VPORT_X_SCALE_ENA(x) (((unsigned)(x) & 0x1) << 0) -#define G_028818_VPORT_X_SCALE_ENA(x) (((x) >> 0) & 0x1) -#define C_028818_VPORT_X_SCALE_ENA 0xFFFFFFFE -#define S_028818_VPORT_X_OFFSET_ENA(x) (((unsigned)(x) & 0x1) << 1) -#define G_028818_VPORT_X_OFFSET_ENA(x) (((x) >> 1) & 0x1) -#define C_028818_VPORT_X_OFFSET_ENA 0xFFFFFFFD -#define S_028818_VPORT_Y_SCALE_ENA(x) (((unsigned)(x) & 0x1) << 2) -#define G_028818_VPORT_Y_SCALE_ENA(x) (((x) >> 2) & 0x1) -#define C_028818_VPORT_Y_SCALE_ENA 0xFFFFFFFB -#define S_028818_VPORT_Y_OFFSET_ENA(x) (((unsigned)(x) & 0x1) << 3) -#define G_028818_VPORT_Y_OFFSET_ENA(x) (((x) >> 3) & 0x1) -#define C_028818_VPORT_Y_OFFSET_ENA 0xFFFFFFF7 -#define S_028818_VPORT_Z_SCALE_ENA(x) (((unsigned)(x) & 0x1) << 4) -#define G_028818_VPORT_Z_SCALE_ENA(x) (((x) >> 4) & 0x1) -#define C_028818_VPORT_Z_SCALE_ENA 0xFFFFFFEF -#define S_028818_VPORT_Z_OFFSET_ENA(x) (((unsigned)(x) & 0x1) << 5) -#define G_028818_VPORT_Z_OFFSET_ENA(x) (((x) >> 5) & 0x1) -#define C_028818_VPORT_Z_OFFSET_ENA 0xFFFFFFDF -#define S_028818_VTX_XY_FMT(x) (((unsigned)(x) & 0x1) << 8) -#define G_028818_VTX_XY_FMT(x) (((x) >> 8) & 0x1) -#define C_028818_VTX_XY_FMT 0xFFFFFEFF -#define S_028818_VTX_Z_FMT(x) (((unsigned)(x) & 0x1) << 9) -#define G_028818_VTX_Z_FMT(x) (((x) >> 9) & 0x1) -#define C_028818_VTX_Z_FMT 0xFFFFFDFF -#define S_028818_VTX_W0_FMT(x) (((unsigned)(x) & 0x1) << 10) -#define G_028818_VTX_W0_FMT(x) (((x) >> 10) & 0x1) -#define C_028818_VTX_W0_FMT 0xFFFFFBFF -#define R_02881C_PA_CL_VS_OUT_CNTL 0x02881C -#define S_02881C_CLIP_DIST_ENA_0(x) (((unsigned)(x) & 0x1) << 0) -#define G_02881C_CLIP_DIST_ENA_0(x) (((x) >> 0) & 0x1) -#define C_02881C_CLIP_DIST_ENA_0 0xFFFFFFFE -#define S_02881C_CLIP_DIST_ENA_1(x) (((unsigned)(x) & 0x1) << 1) -#define G_02881C_CLIP_DIST_ENA_1(x) (((x) >> 1) & 0x1) -#define C_02881C_CLIP_DIST_ENA_1 0xFFFFFFFD -#define S_02881C_CLIP_DIST_ENA_2(x) (((unsigned)(x) & 0x1) << 2) -#define G_02881C_CLIP_DIST_ENA_2(x) (((x) >> 2) & 0x1) -#define C_02881C_CLIP_DIST_ENA_2 0xFFFFFFFB -#define S_02881C_CLIP_DIST_ENA_3(x) (((unsigned)(x) & 0x1) << 3) -#define G_02881C_CLIP_DIST_ENA_3(x) (((x) >> 3) & 0x1) -#define C_02881C_CLIP_DIST_ENA_3 0xFFFFFFF7 -#define S_02881C_CLIP_DIST_ENA_4(x) (((unsigned)(x) & 0x1) << 4) -#define G_02881C_CLIP_DIST_ENA_4(x) (((x) >> 4) & 0x1) -#define C_02881C_CLIP_DIST_ENA_4 0xFFFFFFEF -#define S_02881C_CLIP_DIST_ENA_5(x) (((unsigned)(x) & 0x1) << 5) -#define G_02881C_CLIP_DIST_ENA_5(x) (((x) >> 5) & 0x1) -#define C_02881C_CLIP_DIST_ENA_5 0xFFFFFFDF -#define S_02881C_CLIP_DIST_ENA_6(x) (((unsigned)(x) & 0x1) << 6) -#define G_02881C_CLIP_DIST_ENA_6(x) (((x) >> 6) & 0x1) -#define C_02881C_CLIP_DIST_ENA_6 0xFFFFFFBF -#define S_02881C_CLIP_DIST_ENA_7(x) (((unsigned)(x) & 0x1) << 7) -#define G_02881C_CLIP_DIST_ENA_7(x) (((x) >> 7) & 0x1) -#define C_02881C_CLIP_DIST_ENA_7 0xFFFFFF7F -#define S_02881C_CULL_DIST_ENA_0(x) (((unsigned)(x) & 0x1) << 8) -#define G_02881C_CULL_DIST_ENA_0(x) (((x) >> 8) & 0x1) -#define C_02881C_CULL_DIST_ENA_0 0xFFFFFEFF -#define S_02881C_CULL_DIST_ENA_1(x) (((unsigned)(x) & 0x1) << 9) -#define G_02881C_CULL_DIST_ENA_1(x) (((x) >> 9) & 0x1) -#define C_02881C_CULL_DIST_ENA_1 0xFFFFFDFF -#define S_02881C_CULL_DIST_ENA_2(x) (((unsigned)(x) & 0x1) << 10) -#define G_02881C_CULL_DIST_ENA_2(x) (((x) >> 10) & 0x1) -#define C_02881C_CULL_DIST_ENA_2 0xFFFFFBFF -#define S_02881C_CULL_DIST_ENA_3(x) (((unsigned)(x) & 0x1) << 11) -#define G_02881C_CULL_DIST_ENA_3(x) (((x) >> 11) & 0x1) -#define C_02881C_CULL_DIST_ENA_3 0xFFFFF7FF -#define S_02881C_CULL_DIST_ENA_4(x) (((unsigned)(x) & 0x1) << 12) -#define G_02881C_CULL_DIST_ENA_4(x) (((x) >> 12) & 0x1) -#define C_02881C_CULL_DIST_ENA_4 0xFFFFEFFF -#define S_02881C_CULL_DIST_ENA_5(x) (((unsigned)(x) & 0x1) << 13) -#define G_02881C_CULL_DIST_ENA_5(x) (((x) >> 13) & 0x1) -#define C_02881C_CULL_DIST_ENA_5 0xFFFFDFFF -#define S_02881C_CULL_DIST_ENA_6(x) (((unsigned)(x) & 0x1) << 14) -#define G_02881C_CULL_DIST_ENA_6(x) (((x) >> 14) & 0x1) -#define C_02881C_CULL_DIST_ENA_6 0xFFFFBFFF -#define S_02881C_CULL_DIST_ENA_7(x) (((unsigned)(x) & 0x1) << 15) -#define G_02881C_CULL_DIST_ENA_7(x) (((x) >> 15) & 0x1) -#define C_02881C_CULL_DIST_ENA_7 0xFFFF7FFF -#define S_02881C_USE_VTX_POINT_SIZE(x) (((unsigned)(x) & 0x1) << 16) -#define G_02881C_USE_VTX_POINT_SIZE(x) (((x) >> 16) & 0x1) -#define C_02881C_USE_VTX_POINT_SIZE 0xFFFEFFFF -#define S_02881C_USE_VTX_EDGE_FLAG(x) (((unsigned)(x) & 0x1) << 17) -#define G_02881C_USE_VTX_EDGE_FLAG(x) (((x) >> 17) & 0x1) -#define C_02881C_USE_VTX_EDGE_FLAG 0xFFFDFFFF -#define S_02881C_USE_VTX_RENDER_TARGET_INDX(x) (((unsigned)(x) & 0x1) << 18) -#define G_02881C_USE_VTX_RENDER_TARGET_INDX(x) (((x) >> 18) & 0x1) -#define C_02881C_USE_VTX_RENDER_TARGET_INDX 0xFFFBFFFF -#define S_02881C_USE_VTX_VIEWPORT_INDX(x) (((unsigned)(x) & 0x1) << 19) -#define G_02881C_USE_VTX_VIEWPORT_INDX(x) (((x) >> 19) & 0x1) -#define C_02881C_USE_VTX_VIEWPORT_INDX 0xFFF7FFFF -#define S_02881C_USE_VTX_KILL_FLAG(x) (((unsigned)(x) & 0x1) << 20) -#define G_02881C_USE_VTX_KILL_FLAG(x) (((x) >> 20) & 0x1) -#define C_02881C_USE_VTX_KILL_FLAG 0xFFEFFFFF -#define S_02881C_VS_OUT_MISC_VEC_ENA(x) (((unsigned)(x) & 0x1) << 21) -#define G_02881C_VS_OUT_MISC_VEC_ENA(x) (((x) >> 21) & 0x1) -#define C_02881C_VS_OUT_MISC_VEC_ENA 0xFFDFFFFF -#define S_02881C_VS_OUT_CCDIST0_VEC_ENA(x) (((unsigned)(x) & 0x1) << 22) -#define G_02881C_VS_OUT_CCDIST0_VEC_ENA(x) (((x) >> 22) & 0x1) -#define C_02881C_VS_OUT_CCDIST0_VEC_ENA 0xFFBFFFFF -#define S_02881C_VS_OUT_CCDIST1_VEC_ENA(x) (((unsigned)(x) & 0x1) << 23) -#define G_02881C_VS_OUT_CCDIST1_VEC_ENA(x) (((x) >> 23) & 0x1) -#define C_02881C_VS_OUT_CCDIST1_VEC_ENA 0xFF7FFFFF -#define S_02881C_VS_OUT_MISC_SIDE_BUS_ENA(x) (((unsigned)(x) & 0x1) << 24) -#define G_02881C_VS_OUT_MISC_SIDE_BUS_ENA(x) (((x) >> 24) & 0x1) -#define C_02881C_VS_OUT_MISC_SIDE_BUS_ENA 0xFEFFFFFF -#define S_02881C_USE_VTX_GS_CUT_FLAG(x) (((unsigned)(x) & 0x1) << 25) -#define G_02881C_USE_VTX_GS_CUT_FLAG(x) (((x) >> 25) & 0x1) -#define C_02881C_USE_VTX_GS_CUT_FLAG 0xFDFFFFFF -/* VI */ -#define S_02881C_USE_VTX_LINE_WIDTH(x) (((unsigned)(x) & 0x1) << 26) -#define G_02881C_USE_VTX_LINE_WIDTH(x) (((x) >> 26) & 0x1) -#define C_02881C_USE_VTX_LINE_WIDTH 0xFBFFFFFF -/* */ -#define R_028820_PA_CL_NANINF_CNTL 0x028820 -#define S_028820_VTE_XY_INF_DISCARD(x) (((unsigned)(x) & 0x1) << 0) -#define G_028820_VTE_XY_INF_DISCARD(x) (((x) >> 0) & 0x1) -#define C_028820_VTE_XY_INF_DISCARD 0xFFFFFFFE -#define S_028820_VTE_Z_INF_DISCARD(x) (((unsigned)(x) & 0x1) << 1) -#define G_028820_VTE_Z_INF_DISCARD(x) (((x) >> 1) & 0x1) -#define C_028820_VTE_Z_INF_DISCARD 0xFFFFFFFD -#define S_028820_VTE_W_INF_DISCARD(x) (((unsigned)(x) & 0x1) << 2) -#define G_028820_VTE_W_INF_DISCARD(x) (((x) >> 2) & 0x1) -#define C_028820_VTE_W_INF_DISCARD 0xFFFFFFFB -#define S_028820_VTE_0XNANINF_IS_0(x) (((unsigned)(x) & 0x1) << 3) -#define G_028820_VTE_0XNANINF_IS_0(x) (((x) >> 3) & 0x1) -#define C_028820_VTE_0XNANINF_IS_0 0xFFFFFFF7 -#define S_028820_VTE_XY_NAN_RETAIN(x) (((unsigned)(x) & 0x1) << 4) -#define G_028820_VTE_XY_NAN_RETAIN(x) (((x) >> 4) & 0x1) -#define C_028820_VTE_XY_NAN_RETAIN 0xFFFFFFEF -#define S_028820_VTE_Z_NAN_RETAIN(x) (((unsigned)(x) & 0x1) << 5) -#define G_028820_VTE_Z_NAN_RETAIN(x) (((x) >> 5) & 0x1) -#define C_028820_VTE_Z_NAN_RETAIN 0xFFFFFFDF -#define S_028820_VTE_W_NAN_RETAIN(x) (((unsigned)(x) & 0x1) << 6) -#define G_028820_VTE_W_NAN_RETAIN(x) (((x) >> 6) & 0x1) -#define C_028820_VTE_W_NAN_RETAIN 0xFFFFFFBF -#define S_028820_VTE_W_RECIP_NAN_IS_0(x) (((unsigned)(x) & 0x1) << 7) -#define G_028820_VTE_W_RECIP_NAN_IS_0(x) (((x) >> 7) & 0x1) -#define C_028820_VTE_W_RECIP_NAN_IS_0 0xFFFFFF7F -#define S_028820_VS_XY_NAN_TO_INF(x) (((unsigned)(x) & 0x1) << 8) -#define G_028820_VS_XY_NAN_TO_INF(x) (((x) >> 8) & 0x1) -#define C_028820_VS_XY_NAN_TO_INF 0xFFFFFEFF -#define S_028820_VS_XY_INF_RETAIN(x) (((unsigned)(x) & 0x1) << 9) -#define G_028820_VS_XY_INF_RETAIN(x) (((x) >> 9) & 0x1) -#define C_028820_VS_XY_INF_RETAIN 0xFFFFFDFF -#define S_028820_VS_Z_NAN_TO_INF(x) (((unsigned)(x) & 0x1) << 10) -#define G_028820_VS_Z_NAN_TO_INF(x) (((x) >> 10) & 0x1) -#define C_028820_VS_Z_NAN_TO_INF 0xFFFFFBFF -#define S_028820_VS_Z_INF_RETAIN(x) (((unsigned)(x) & 0x1) << 11) -#define G_028820_VS_Z_INF_RETAIN(x) (((x) >> 11) & 0x1) -#define C_028820_VS_Z_INF_RETAIN 0xFFFFF7FF -#define S_028820_VS_W_NAN_TO_INF(x) (((unsigned)(x) & 0x1) << 12) -#define G_028820_VS_W_NAN_TO_INF(x) (((x) >> 12) & 0x1) -#define C_028820_VS_W_NAN_TO_INF 0xFFFFEFFF -#define S_028820_VS_W_INF_RETAIN(x) (((unsigned)(x) & 0x1) << 13) -#define G_028820_VS_W_INF_RETAIN(x) (((x) >> 13) & 0x1) -#define C_028820_VS_W_INF_RETAIN 0xFFFFDFFF -#define S_028820_VS_CLIP_DIST_INF_DISCARD(x) (((unsigned)(x) & 0x1) << 14) -#define G_028820_VS_CLIP_DIST_INF_DISCARD(x) (((x) >> 14) & 0x1) -#define C_028820_VS_CLIP_DIST_INF_DISCARD 0xFFFFBFFF -#define S_028820_VTE_NO_OUTPUT_NEG_0(x) (((unsigned)(x) & 0x1) << 20) -#define G_028820_VTE_NO_OUTPUT_NEG_0(x) (((x) >> 20) & 0x1) -#define C_028820_VTE_NO_OUTPUT_NEG_0 0xFFEFFFFF -#define R_028824_PA_SU_LINE_STIPPLE_CNTL 0x028824 -#define S_028824_LINE_STIPPLE_RESET(x) (((unsigned)(x) & 0x03) << 0) -#define G_028824_LINE_STIPPLE_RESET(x) (((x) >> 0) & 0x03) -#define C_028824_LINE_STIPPLE_RESET 0xFFFFFFFC -#define S_028824_EXPAND_FULL_LENGTH(x) (((unsigned)(x) & 0x1) << 2) -#define G_028824_EXPAND_FULL_LENGTH(x) (((x) >> 2) & 0x1) -#define C_028824_EXPAND_FULL_LENGTH 0xFFFFFFFB -#define S_028824_FRACTIONAL_ACCUM(x) (((unsigned)(x) & 0x1) << 3) -#define G_028824_FRACTIONAL_ACCUM(x) (((x) >> 3) & 0x1) -#define C_028824_FRACTIONAL_ACCUM 0xFFFFFFF7 -#define S_028824_DIAMOND_ADJUST(x) (((unsigned)(x) & 0x1) << 4) -#define G_028824_DIAMOND_ADJUST(x) (((x) >> 4) & 0x1) -#define C_028824_DIAMOND_ADJUST 0xFFFFFFEF -#define R_028828_PA_SU_LINE_STIPPLE_SCALE 0x028828 -#define R_02882C_PA_SU_PRIM_FILTER_CNTL 0x02882C -#define S_02882C_TRIANGLE_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 0) -#define G_02882C_TRIANGLE_FILTER_DISABLE(x) (((x) >> 0) & 0x1) -#define C_02882C_TRIANGLE_FILTER_DISABLE 0xFFFFFFFE -#define S_02882C_LINE_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 1) -#define G_02882C_LINE_FILTER_DISABLE(x) (((x) >> 1) & 0x1) -#define C_02882C_LINE_FILTER_DISABLE 0xFFFFFFFD -#define S_02882C_POINT_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 2) -#define G_02882C_POINT_FILTER_DISABLE(x) (((x) >> 2) & 0x1) -#define C_02882C_POINT_FILTER_DISABLE 0xFFFFFFFB -#define S_02882C_RECTANGLE_FILTER_DISABLE(x) (((unsigned)(x) & 0x1) << 3) -#define G_02882C_RECTANGLE_FILTER_DISABLE(x) (((x) >> 3) & 0x1) -#define C_02882C_RECTANGLE_FILTER_DISABLE 0xFFFFFFF7 -#define S_02882C_TRIANGLE_EXPAND_ENA(x) (((unsigned)(x) & 0x1) << 4) -#define G_02882C_TRIANGLE_EXPAND_ENA(x) (((x) >> 4) & 0x1) -#define C_02882C_TRIANGLE_EXPAND_ENA 0xFFFFFFEF -#define S_02882C_LINE_EXPAND_ENA(x) (((unsigned)(x) & 0x1) << 5) -#define G_02882C_LINE_EXPAND_ENA(x) (((x) >> 5) & 0x1) -#define C_02882C_LINE_EXPAND_ENA 0xFFFFFFDF -#define S_02882C_POINT_EXPAND_ENA(x) (((unsigned)(x) & 0x1) << 6) -#define G_02882C_POINT_EXPAND_ENA(x) (((x) >> 6) & 0x1) -#define C_02882C_POINT_EXPAND_ENA 0xFFFFFFBF -#define S_02882C_RECTANGLE_EXPAND_ENA(x) (((unsigned)(x) & 0x1) << 7) -#define G_02882C_RECTANGLE_EXPAND_ENA(x) (((x) >> 7) & 0x1) -#define C_02882C_RECTANGLE_EXPAND_ENA 0xFFFFFF7F -#define S_02882C_PRIM_EXPAND_CONSTANT(x) (((unsigned)(x) & 0xFF) << 8) -#define G_02882C_PRIM_EXPAND_CONSTANT(x) (((x) >> 8) & 0xFF) -#define C_02882C_PRIM_EXPAND_CONSTANT 0xFFFF00FF -/* CIK */ -#define S_02882C_XMAX_RIGHT_EXCLUSION(x) (((unsigned)(x) & 0x1) << 30) -#define G_02882C_XMAX_RIGHT_EXCLUSION(x) (((x) >> 30) & 0x1) -#define C_02882C_XMAX_RIGHT_EXCLUSION 0xBFFFFFFF -#define S_02882C_YMAX_BOTTOM_EXCLUSION(x) (((unsigned)(x) & 0x1) << 31) -#define G_02882C_YMAX_BOTTOM_EXCLUSION(x) (((x) >> 31) & 0x1) -#define C_02882C_YMAX_BOTTOM_EXCLUSION 0x7FFFFFFF -/* */ -#define R_028830_PA_SU_SMALL_PRIM_FILTER_CNTL 0x028830 /* Polaris */ -#define S_028830_SMALL_PRIM_FILTER_ENABLE(x) (((x) & 0x1) << 0) -#define C_028830_SMALL_PRIM_FILTER_ENABLE 0xFFFFFFFE -#define S_028830_TRIANGLE_FILTER_DISABLE(x) (((x) & 0x1) << 1) -#define S_028830_LINE_FILTER_DISABLE(x) (((x) & 0x1) << 2) -#define S_028830_POINT_FILTER_DISABLE(x) (((x) & 0x1) << 3) -#define S_028830_RECTANGLE_FILTER_DISABLE(x) (((x) & 0x1) << 4) -#define R_028A00_PA_SU_POINT_SIZE 0x028A00 -#define S_028A00_HEIGHT(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_028A00_HEIGHT(x) (((x) >> 0) & 0xFFFF) -#define C_028A00_HEIGHT 0xFFFF0000 -#define S_028A00_WIDTH(x) (((unsigned)(x) & 0xFFFF) << 16) -#define G_028A00_WIDTH(x) (((x) >> 16) & 0xFFFF) -#define C_028A00_WIDTH 0x0000FFFF -#define R_028A04_PA_SU_POINT_MINMAX 0x028A04 -#define S_028A04_MIN_SIZE(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_028A04_MIN_SIZE(x) (((x) >> 0) & 0xFFFF) -#define C_028A04_MIN_SIZE 0xFFFF0000 -#define S_028A04_MAX_SIZE(x) (((unsigned)(x) & 0xFFFF) << 16) -#define G_028A04_MAX_SIZE(x) (((x) >> 16) & 0xFFFF) -#define C_028A04_MAX_SIZE 0x0000FFFF -#define R_028A08_PA_SU_LINE_CNTL 0x028A08 -#define S_028A08_WIDTH(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_028A08_WIDTH(x) (((x) >> 0) & 0xFFFF) -#define C_028A08_WIDTH 0xFFFF0000 -#define R_028A0C_PA_SC_LINE_STIPPLE 0x028A0C -#define S_028A0C_LINE_PATTERN(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_028A0C_LINE_PATTERN(x) (((x) >> 0) & 0xFFFF) -#define C_028A0C_LINE_PATTERN 0xFFFF0000 -#define S_028A0C_REPEAT_COUNT(x) (((unsigned)(x) & 0xFF) << 16) -#define G_028A0C_REPEAT_COUNT(x) (((x) >> 16) & 0xFF) -#define C_028A0C_REPEAT_COUNT 0xFF00FFFF -#define S_028A0C_PATTERN_BIT_ORDER(x) (((unsigned)(x) & 0x1) << 28) -#define G_028A0C_PATTERN_BIT_ORDER(x) (((x) >> 28) & 0x1) -#define C_028A0C_PATTERN_BIT_ORDER 0xEFFFFFFF -#define S_028A0C_AUTO_RESET_CNTL(x) (((unsigned)(x) & 0x03) << 29) -#define G_028A0C_AUTO_RESET_CNTL(x) (((x) >> 29) & 0x03) -#define C_028A0C_AUTO_RESET_CNTL 0x9FFFFFFF -#define R_028A10_VGT_OUTPUT_PATH_CNTL 0x028A10 -#define S_028A10_PATH_SELECT(x) (((unsigned)(x) & 0x07) << 0) -#define G_028A10_PATH_SELECT(x) (((x) >> 0) & 0x07) -#define C_028A10_PATH_SELECT 0xFFFFFFF8 -#define V_028A10_VGT_OUTPATH_VTX_REUSE 0x00 -#define V_028A10_VGT_OUTPATH_TESS_EN 0x01 -#define V_028A10_VGT_OUTPATH_PASSTHRU 0x02 -#define V_028A10_VGT_OUTPATH_GS_BLOCK 0x03 -#define V_028A10_VGT_OUTPATH_HS_BLOCK 0x04 -#define R_028A14_VGT_HOS_CNTL 0x028A14 -#define S_028A14_TESS_MODE(x) (((unsigned)(x) & 0x03) << 0) -#define G_028A14_TESS_MODE(x) (((x) >> 0) & 0x03) -#define C_028A14_TESS_MODE 0xFFFFFFFC -#define R_028A18_VGT_HOS_MAX_TESS_LEVEL 0x028A18 -#define R_028A1C_VGT_HOS_MIN_TESS_LEVEL 0x028A1C -#define R_028A20_VGT_HOS_REUSE_DEPTH 0x028A20 -#define S_028A20_REUSE_DEPTH(x) (((unsigned)(x) & 0xFF) << 0) -#define G_028A20_REUSE_DEPTH(x) (((x) >> 0) & 0xFF) -#define C_028A20_REUSE_DEPTH 0xFFFFFF00 -#define R_028A24_VGT_GROUP_PRIM_TYPE 0x028A24 -#define S_028A24_PRIM_TYPE(x) (((unsigned)(x) & 0x1F) << 0) -#define G_028A24_PRIM_TYPE(x) (((x) >> 0) & 0x1F) -#define C_028A24_PRIM_TYPE 0xFFFFFFE0 -#define V_028A24_VGT_GRP_3D_POINT 0x00 -#define V_028A24_VGT_GRP_3D_LINE 0x01 -#define V_028A24_VGT_GRP_3D_TRI 0x02 -#define V_028A24_VGT_GRP_3D_RECT 0x03 -#define V_028A24_VGT_GRP_3D_QUAD 0x04 -#define V_028A24_VGT_GRP_2D_COPY_RECT_V0 0x05 -#define V_028A24_VGT_GRP_2D_COPY_RECT_V1 0x06 -#define V_028A24_VGT_GRP_2D_COPY_RECT_V2 0x07 -#define V_028A24_VGT_GRP_2D_COPY_RECT_V3 0x08 -#define V_028A24_VGT_GRP_2D_FILL_RECT 0x09 -#define V_028A24_VGT_GRP_2D_LINE 0x0A -#define V_028A24_VGT_GRP_2D_TRI 0x0B -#define V_028A24_VGT_GRP_PRIM_INDEX_LINE 0x0C -#define V_028A24_VGT_GRP_PRIM_INDEX_TRI 0x0D -#define V_028A24_VGT_GRP_PRIM_INDEX_QUAD 0x0E -#define V_028A24_VGT_GRP_3D_LINE_ADJ 0x0F -#define V_028A24_VGT_GRP_3D_TRI_ADJ 0x10 -#define V_028A24_VGT_GRP_3D_PATCH 0x11 -#define S_028A24_RETAIN_ORDER(x) (((unsigned)(x) & 0x1) << 14) -#define G_028A24_RETAIN_ORDER(x) (((x) >> 14) & 0x1) -#define C_028A24_RETAIN_ORDER 0xFFFFBFFF -#define S_028A24_RETAIN_QUADS(x) (((unsigned)(x) & 0x1) << 15) -#define G_028A24_RETAIN_QUADS(x) (((x) >> 15) & 0x1) -#define C_028A24_RETAIN_QUADS 0xFFFF7FFF -#define S_028A24_PRIM_ORDER(x) (((unsigned)(x) & 0x07) << 16) -#define G_028A24_PRIM_ORDER(x) (((x) >> 16) & 0x07) -#define C_028A24_PRIM_ORDER 0xFFF8FFFF -#define V_028A24_VGT_GRP_LIST 0x00 -#define V_028A24_VGT_GRP_STRIP 0x01 -#define V_028A24_VGT_GRP_FAN 0x02 -#define V_028A24_VGT_GRP_LOOP 0x03 -#define V_028A24_VGT_GRP_POLYGON 0x04 -#define R_028A28_VGT_GROUP_FIRST_DECR 0x028A28 -#define S_028A28_FIRST_DECR(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028A28_FIRST_DECR(x) (((x) >> 0) & 0x0F) -#define C_028A28_FIRST_DECR 0xFFFFFFF0 -#define R_028A2C_VGT_GROUP_DECR 0x028A2C -#define S_028A2C_DECR(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028A2C_DECR(x) (((x) >> 0) & 0x0F) -#define C_028A2C_DECR 0xFFFFFFF0 -#define R_028A30_VGT_GROUP_VECT_0_CNTL 0x028A30 -#define S_028A30_COMP_X_EN(x) (((unsigned)(x) & 0x1) << 0) -#define G_028A30_COMP_X_EN(x) (((x) >> 0) & 0x1) -#define C_028A30_COMP_X_EN 0xFFFFFFFE -#define S_028A30_COMP_Y_EN(x) (((unsigned)(x) & 0x1) << 1) -#define G_028A30_COMP_Y_EN(x) (((x) >> 1) & 0x1) -#define C_028A30_COMP_Y_EN 0xFFFFFFFD -#define S_028A30_COMP_Z_EN(x) (((unsigned)(x) & 0x1) << 2) -#define G_028A30_COMP_Z_EN(x) (((x) >> 2) & 0x1) -#define C_028A30_COMP_Z_EN 0xFFFFFFFB -#define S_028A30_COMP_W_EN(x) (((unsigned)(x) & 0x1) << 3) -#define G_028A30_COMP_W_EN(x) (((x) >> 3) & 0x1) -#define C_028A30_COMP_W_EN 0xFFFFFFF7 -#define S_028A30_STRIDE(x) (((unsigned)(x) & 0xFF) << 8) -#define G_028A30_STRIDE(x) (((x) >> 8) & 0xFF) -#define C_028A30_STRIDE 0xFFFF00FF -#define S_028A30_SHIFT(x) (((unsigned)(x) & 0xFF) << 16) -#define G_028A30_SHIFT(x) (((x) >> 16) & 0xFF) -#define C_028A30_SHIFT 0xFF00FFFF -#define R_028A34_VGT_GROUP_VECT_1_CNTL 0x028A34 -#define S_028A34_COMP_X_EN(x) (((unsigned)(x) & 0x1) << 0) -#define G_028A34_COMP_X_EN(x) (((x) >> 0) & 0x1) -#define C_028A34_COMP_X_EN 0xFFFFFFFE -#define S_028A34_COMP_Y_EN(x) (((unsigned)(x) & 0x1) << 1) -#define G_028A34_COMP_Y_EN(x) (((x) >> 1) & 0x1) -#define C_028A34_COMP_Y_EN 0xFFFFFFFD -#define S_028A34_COMP_Z_EN(x) (((unsigned)(x) & 0x1) << 2) -#define G_028A34_COMP_Z_EN(x) (((x) >> 2) & 0x1) -#define C_028A34_COMP_Z_EN 0xFFFFFFFB -#define S_028A34_COMP_W_EN(x) (((unsigned)(x) & 0x1) << 3) -#define G_028A34_COMP_W_EN(x) (((x) >> 3) & 0x1) -#define C_028A34_COMP_W_EN 0xFFFFFFF7 -#define S_028A34_STRIDE(x) (((unsigned)(x) & 0xFF) << 8) -#define G_028A34_STRIDE(x) (((x) >> 8) & 0xFF) -#define C_028A34_STRIDE 0xFFFF00FF -#define S_028A34_SHIFT(x) (((unsigned)(x) & 0xFF) << 16) -#define G_028A34_SHIFT(x) (((x) >> 16) & 0xFF) -#define C_028A34_SHIFT 0xFF00FFFF -#define R_028A38_VGT_GROUP_VECT_0_FMT_CNTL 0x028A38 -#define S_028A38_X_CONV(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028A38_X_CONV(x) (((x) >> 0) & 0x0F) -#define C_028A38_X_CONV 0xFFFFFFF0 -#define V_028A38_VGT_GRP_INDEX_16 0x00 -#define V_028A38_VGT_GRP_INDEX_32 0x01 -#define V_028A38_VGT_GRP_UINT_16 0x02 -#define V_028A38_VGT_GRP_UINT_32 0x03 -#define V_028A38_VGT_GRP_SINT_16 0x04 -#define V_028A38_VGT_GRP_SINT_32 0x05 -#define V_028A38_VGT_GRP_FLOAT_32 0x06 -#define V_028A38_VGT_GRP_AUTO_PRIM 0x07 -#define V_028A38_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 -#define S_028A38_X_OFFSET(x) (((unsigned)(x) & 0x0F) << 4) -#define G_028A38_X_OFFSET(x) (((x) >> 4) & 0x0F) -#define C_028A38_X_OFFSET 0xFFFFFF0F -#define S_028A38_Y_CONV(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028A38_Y_CONV(x) (((x) >> 8) & 0x0F) -#define C_028A38_Y_CONV 0xFFFFF0FF -#define V_028A38_VGT_GRP_INDEX_16 0x00 -#define V_028A38_VGT_GRP_INDEX_32 0x01 -#define V_028A38_VGT_GRP_UINT_16 0x02 -#define V_028A38_VGT_GRP_UINT_32 0x03 -#define V_028A38_VGT_GRP_SINT_16 0x04 -#define V_028A38_VGT_GRP_SINT_32 0x05 -#define V_028A38_VGT_GRP_FLOAT_32 0x06 -#define V_028A38_VGT_GRP_AUTO_PRIM 0x07 -#define V_028A38_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 -#define S_028A38_Y_OFFSET(x) (((unsigned)(x) & 0x0F) << 12) -#define G_028A38_Y_OFFSET(x) (((x) >> 12) & 0x0F) -#define C_028A38_Y_OFFSET 0xFFFF0FFF -#define S_028A38_Z_CONV(x) (((unsigned)(x) & 0x0F) << 16) -#define G_028A38_Z_CONV(x) (((x) >> 16) & 0x0F) -#define C_028A38_Z_CONV 0xFFF0FFFF -#define V_028A38_VGT_GRP_INDEX_16 0x00 -#define V_028A38_VGT_GRP_INDEX_32 0x01 -#define V_028A38_VGT_GRP_UINT_16 0x02 -#define V_028A38_VGT_GRP_UINT_32 0x03 -#define V_028A38_VGT_GRP_SINT_16 0x04 -#define V_028A38_VGT_GRP_SINT_32 0x05 -#define V_028A38_VGT_GRP_FLOAT_32 0x06 -#define V_028A38_VGT_GRP_AUTO_PRIM 0x07 -#define V_028A38_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 -#define S_028A38_Z_OFFSET(x) (((unsigned)(x) & 0x0F) << 20) -#define G_028A38_Z_OFFSET(x) (((x) >> 20) & 0x0F) -#define C_028A38_Z_OFFSET 0xFF0FFFFF -#define S_028A38_W_CONV(x) (((unsigned)(x) & 0x0F) << 24) -#define G_028A38_W_CONV(x) (((x) >> 24) & 0x0F) -#define C_028A38_W_CONV 0xF0FFFFFF -#define V_028A38_VGT_GRP_INDEX_16 0x00 -#define V_028A38_VGT_GRP_INDEX_32 0x01 -#define V_028A38_VGT_GRP_UINT_16 0x02 -#define V_028A38_VGT_GRP_UINT_32 0x03 -#define V_028A38_VGT_GRP_SINT_16 0x04 -#define V_028A38_VGT_GRP_SINT_32 0x05 -#define V_028A38_VGT_GRP_FLOAT_32 0x06 -#define V_028A38_VGT_GRP_AUTO_PRIM 0x07 -#define V_028A38_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 -#define S_028A38_W_OFFSET(x) (((unsigned)(x) & 0x0F) << 28) -#define G_028A38_W_OFFSET(x) (((x) >> 28) & 0x0F) -#define C_028A38_W_OFFSET 0x0FFFFFFF -#define R_028A3C_VGT_GROUP_VECT_1_FMT_CNTL 0x028A3C -#define S_028A3C_X_CONV(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028A3C_X_CONV(x) (((x) >> 0) & 0x0F) -#define C_028A3C_X_CONV 0xFFFFFFF0 -#define V_028A3C_VGT_GRP_INDEX_16 0x00 -#define V_028A3C_VGT_GRP_INDEX_32 0x01 -#define V_028A3C_VGT_GRP_UINT_16 0x02 -#define V_028A3C_VGT_GRP_UINT_32 0x03 -#define V_028A3C_VGT_GRP_SINT_16 0x04 -#define V_028A3C_VGT_GRP_SINT_32 0x05 -#define V_028A3C_VGT_GRP_FLOAT_32 0x06 -#define V_028A3C_VGT_GRP_AUTO_PRIM 0x07 -#define V_028A3C_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 -#define S_028A3C_X_OFFSET(x) (((unsigned)(x) & 0x0F) << 4) -#define G_028A3C_X_OFFSET(x) (((x) >> 4) & 0x0F) -#define C_028A3C_X_OFFSET 0xFFFFFF0F -#define S_028A3C_Y_CONV(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028A3C_Y_CONV(x) (((x) >> 8) & 0x0F) -#define C_028A3C_Y_CONV 0xFFFFF0FF -#define V_028A3C_VGT_GRP_INDEX_16 0x00 -#define V_028A3C_VGT_GRP_INDEX_32 0x01 -#define V_028A3C_VGT_GRP_UINT_16 0x02 -#define V_028A3C_VGT_GRP_UINT_32 0x03 -#define V_028A3C_VGT_GRP_SINT_16 0x04 -#define V_028A3C_VGT_GRP_SINT_32 0x05 -#define V_028A3C_VGT_GRP_FLOAT_32 0x06 -#define V_028A3C_VGT_GRP_AUTO_PRIM 0x07 -#define V_028A3C_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 -#define S_028A3C_Y_OFFSET(x) (((unsigned)(x) & 0x0F) << 12) -#define G_028A3C_Y_OFFSET(x) (((x) >> 12) & 0x0F) -#define C_028A3C_Y_OFFSET 0xFFFF0FFF -#define S_028A3C_Z_CONV(x) (((unsigned)(x) & 0x0F) << 16) -#define G_028A3C_Z_CONV(x) (((x) >> 16) & 0x0F) -#define C_028A3C_Z_CONV 0xFFF0FFFF -#define V_028A3C_VGT_GRP_INDEX_16 0x00 -#define V_028A3C_VGT_GRP_INDEX_32 0x01 -#define V_028A3C_VGT_GRP_UINT_16 0x02 -#define V_028A3C_VGT_GRP_UINT_32 0x03 -#define V_028A3C_VGT_GRP_SINT_16 0x04 -#define V_028A3C_VGT_GRP_SINT_32 0x05 -#define V_028A3C_VGT_GRP_FLOAT_32 0x06 -#define V_028A3C_VGT_GRP_AUTO_PRIM 0x07 -#define V_028A3C_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 -#define S_028A3C_Z_OFFSET(x) (((unsigned)(x) & 0x0F) << 20) -#define G_028A3C_Z_OFFSET(x) (((x) >> 20) & 0x0F) -#define C_028A3C_Z_OFFSET 0xFF0FFFFF -#define S_028A3C_W_CONV(x) (((unsigned)(x) & 0x0F) << 24) -#define G_028A3C_W_CONV(x) (((x) >> 24) & 0x0F) -#define C_028A3C_W_CONV 0xF0FFFFFF -#define V_028A3C_VGT_GRP_INDEX_16 0x00 -#define V_028A3C_VGT_GRP_INDEX_32 0x01 -#define V_028A3C_VGT_GRP_UINT_16 0x02 -#define V_028A3C_VGT_GRP_UINT_32 0x03 -#define V_028A3C_VGT_GRP_SINT_16 0x04 -#define V_028A3C_VGT_GRP_SINT_32 0x05 -#define V_028A3C_VGT_GRP_FLOAT_32 0x06 -#define V_028A3C_VGT_GRP_AUTO_PRIM 0x07 -#define V_028A3C_VGT_GRP_FIX_1_23_TO_FLOAT 0x08 -#define S_028A3C_W_OFFSET(x) (((unsigned)(x) & 0x0F) << 28) -#define G_028A3C_W_OFFSET(x) (((x) >> 28) & 0x0F) -#define C_028A3C_W_OFFSET 0x0FFFFFFF -#define R_028A40_VGT_GS_MODE 0x028A40 -#define S_028A40_MODE(x) (((unsigned)(x) & 0x07) << 0) -#define G_028A40_MODE(x) (((x) >> 0) & 0x07) -#define C_028A40_MODE 0xFFFFFFF8 -#define V_028A40_GS_OFF 0x00 -#define V_028A40_GS_SCENARIO_A 0x01 -#define V_028A40_GS_SCENARIO_B 0x02 -#define V_028A40_GS_SCENARIO_G 0x03 -#define V_028A40_GS_SCENARIO_C 0x04 -#define V_028A40_SPRITE_EN 0x05 -#define S_028A40_RESERVED_0(x) (((unsigned)(x) & 0x1) << 3) -#define G_028A40_RESERVED_0(x) (((x) >> 3) & 0x1) -#define C_028A40_RESERVED_0 0xFFFFFFF7 -#define S_028A40_CUT_MODE(x) (((unsigned)(x) & 0x03) << 4) -#define G_028A40_CUT_MODE(x) (((x) >> 4) & 0x03) -#define C_028A40_CUT_MODE 0xFFFFFFCF -#define V_028A40_GS_CUT_1024 0x00 -#define V_028A40_GS_CUT_512 0x01 -#define V_028A40_GS_CUT_256 0x02 -#define V_028A40_GS_CUT_128 0x03 -#define S_028A40_RESERVED_1(x) (((unsigned)(x) & 0x1F) << 6) -#define G_028A40_RESERVED_1(x) (((x) >> 6) & 0x1F) -#define C_028A40_RESERVED_1 0xFFFFF83F -#define S_028A40_GS_C_PACK_EN(x) (((unsigned)(x) & 0x1) << 11) -#define G_028A40_GS_C_PACK_EN(x) (((x) >> 11) & 0x1) -#define C_028A40_GS_C_PACK_EN 0xFFFFF7FF -#define S_028A40_RESERVED_2(x) (((unsigned)(x) & 0x1) << 12) -#define G_028A40_RESERVED_2(x) (((x) >> 12) & 0x1) -#define C_028A40_RESERVED_2 0xFFFFEFFF -#define S_028A40_ES_PASSTHRU(x) (((unsigned)(x) & 0x1) << 13) -#define G_028A40_ES_PASSTHRU(x) (((x) >> 13) & 0x1) -#define C_028A40_ES_PASSTHRU 0xFFFFDFFF -/* SI-CIK */ -#define S_028A40_COMPUTE_MODE(x) (((unsigned)(x) & 0x1) << 14) -#define G_028A40_COMPUTE_MODE(x) (((x) >> 14) & 0x1) -#define C_028A40_COMPUTE_MODE 0xFFFFBFFF -#define S_028A40_FAST_COMPUTE_MODE(x) (((unsigned)(x) & 0x1) << 15) -#define G_028A40_FAST_COMPUTE_MODE(x) (((x) >> 15) & 0x1) -#define C_028A40_FAST_COMPUTE_MODE 0xFFFF7FFF -#define S_028A40_ELEMENT_INFO_EN(x) (((unsigned)(x) & 0x1) << 16) -#define G_028A40_ELEMENT_INFO_EN(x) (((x) >> 16) & 0x1) -#define C_028A40_ELEMENT_INFO_EN 0xFFFEFFFF -/* */ -#define S_028A40_PARTIAL_THD_AT_EOI(x) (((unsigned)(x) & 0x1) << 17) -#define G_028A40_PARTIAL_THD_AT_EOI(x) (((x) >> 17) & 0x1) -#define C_028A40_PARTIAL_THD_AT_EOI 0xFFFDFFFF -#define S_028A40_SUPPRESS_CUTS(x) (((unsigned)(x) & 0x1) << 18) -#define G_028A40_SUPPRESS_CUTS(x) (((x) >> 18) & 0x1) -#define C_028A40_SUPPRESS_CUTS 0xFFFBFFFF -#define S_028A40_ES_WRITE_OPTIMIZE(x) (((unsigned)(x) & 0x1) << 19) -#define G_028A40_ES_WRITE_OPTIMIZE(x) (((x) >> 19) & 0x1) -#define C_028A40_ES_WRITE_OPTIMIZE 0xFFF7FFFF -#define S_028A40_GS_WRITE_OPTIMIZE(x) (((unsigned)(x) & 0x1) << 20) -#define G_028A40_GS_WRITE_OPTIMIZE(x) (((x) >> 20) & 0x1) -#define C_028A40_GS_WRITE_OPTIMIZE 0xFFEFFFFF -/* CIK */ -#define S_028A40_ONCHIP(x) (((unsigned)(x) & 0x03) << 21) -#define G_028A40_ONCHIP(x) (((x) >> 21) & 0x03) -#define C_028A40_ONCHIP 0xFF9FFFFF -#define V_028A40_X_0_OFFCHIP_GS 0x00 -#define V_028A40_X_3_ES_AND_GS_ARE_ONCHIP 0x03 -#define R_028A44_VGT_GS_ONCHIP_CNTL 0x028A44 -#define S_028A44_ES_VERTS_PER_SUBGRP(x) (((unsigned)(x) & 0x7FF) << 0) -#define G_028A44_ES_VERTS_PER_SUBGRP(x) (((x) >> 0) & 0x7FF) -#define C_028A44_ES_VERTS_PER_SUBGRP 0xFFFFF800 -#define S_028A44_GS_PRIMS_PER_SUBGRP(x) (((unsigned)(x) & 0x7FF) << 11) -#define G_028A44_GS_PRIMS_PER_SUBGRP(x) (((x) >> 11) & 0x7FF) -#define C_028A44_GS_PRIMS_PER_SUBGRP 0xFFC007FF -/* */ -#define R_028A48_PA_SC_MODE_CNTL_0 0x028A48 -#define S_028A48_MSAA_ENABLE(x) (((unsigned)(x) & 0x1) << 0) -#define G_028A48_MSAA_ENABLE(x) (((x) >> 0) & 0x1) -#define C_028A48_MSAA_ENABLE 0xFFFFFFFE -#define S_028A48_VPORT_SCISSOR_ENABLE(x) (((unsigned)(x) & 0x1) << 1) -#define G_028A48_VPORT_SCISSOR_ENABLE(x) (((x) >> 1) & 0x1) -#define C_028A48_VPORT_SCISSOR_ENABLE 0xFFFFFFFD -#define S_028A48_LINE_STIPPLE_ENABLE(x) (((unsigned)(x) & 0x1) << 2) -#define G_028A48_LINE_STIPPLE_ENABLE(x) (((x) >> 2) & 0x1) -#define C_028A48_LINE_STIPPLE_ENABLE 0xFFFFFFFB -#define S_028A48_SEND_UNLIT_STILES_TO_PKR(x) (((unsigned)(x) & 0x1) << 3) -#define G_028A48_SEND_UNLIT_STILES_TO_PKR(x) (((x) >> 3) & 0x1) -#define C_028A48_SEND_UNLIT_STILES_TO_PKR 0xFFFFFFF7 -#define R_028A4C_PA_SC_MODE_CNTL_1 0x028A4C -#define S_028A4C_WALK_SIZE(x) (((unsigned)(x) & 0x1) << 0) -#define G_028A4C_WALK_SIZE(x) (((x) >> 0) & 0x1) -#define C_028A4C_WALK_SIZE 0xFFFFFFFE -#define S_028A4C_WALK_ALIGNMENT(x) (((unsigned)(x) & 0x1) << 1) -#define G_028A4C_WALK_ALIGNMENT(x) (((x) >> 1) & 0x1) -#define C_028A4C_WALK_ALIGNMENT 0xFFFFFFFD -#define S_028A4C_WALK_ALIGN8_PRIM_FITS_ST(x) (((unsigned)(x) & 0x1) << 2) -#define G_028A4C_WALK_ALIGN8_PRIM_FITS_ST(x) (((x) >> 2) & 0x1) -#define C_028A4C_WALK_ALIGN8_PRIM_FITS_ST 0xFFFFFFFB -#define S_028A4C_WALK_FENCE_ENABLE(x) (((unsigned)(x) & 0x1) << 3) -#define G_028A4C_WALK_FENCE_ENABLE(x) (((x) >> 3) & 0x1) -#define C_028A4C_WALK_FENCE_ENABLE 0xFFFFFFF7 -#define S_028A4C_WALK_FENCE_SIZE(x) (((unsigned)(x) & 0x07) << 4) -#define G_028A4C_WALK_FENCE_SIZE(x) (((x) >> 4) & 0x07) -#define C_028A4C_WALK_FENCE_SIZE 0xFFFFFF8F -#define S_028A4C_SUPERTILE_WALK_ORDER_ENABLE(x) (((unsigned)(x) & 0x1) << 7) -#define G_028A4C_SUPERTILE_WALK_ORDER_ENABLE(x) (((x) >> 7) & 0x1) -#define C_028A4C_SUPERTILE_WALK_ORDER_ENABLE 0xFFFFFF7F -#define S_028A4C_TILE_WALK_ORDER_ENABLE(x) (((unsigned)(x) & 0x1) << 8) -#define G_028A4C_TILE_WALK_ORDER_ENABLE(x) (((x) >> 8) & 0x1) -#define C_028A4C_TILE_WALK_ORDER_ENABLE 0xFFFFFEFF -#define S_028A4C_TILE_COVER_DISABLE(x) (((unsigned)(x) & 0x1) << 9) -#define G_028A4C_TILE_COVER_DISABLE(x) (((x) >> 9) & 0x1) -#define C_028A4C_TILE_COVER_DISABLE 0xFFFFFDFF -#define S_028A4C_TILE_COVER_NO_SCISSOR(x) (((unsigned)(x) & 0x1) << 10) -#define G_028A4C_TILE_COVER_NO_SCISSOR(x) (((x) >> 10) & 0x1) -#define C_028A4C_TILE_COVER_NO_SCISSOR 0xFFFFFBFF -#define S_028A4C_ZMM_LINE_EXTENT(x) (((unsigned)(x) & 0x1) << 11) -#define G_028A4C_ZMM_LINE_EXTENT(x) (((x) >> 11) & 0x1) -#define C_028A4C_ZMM_LINE_EXTENT 0xFFFFF7FF -#define S_028A4C_ZMM_LINE_OFFSET(x) (((unsigned)(x) & 0x1) << 12) -#define G_028A4C_ZMM_LINE_OFFSET(x) (((x) >> 12) & 0x1) -#define C_028A4C_ZMM_LINE_OFFSET 0xFFFFEFFF -#define S_028A4C_ZMM_RECT_EXTENT(x) (((unsigned)(x) & 0x1) << 13) -#define G_028A4C_ZMM_RECT_EXTENT(x) (((x) >> 13) & 0x1) -#define C_028A4C_ZMM_RECT_EXTENT 0xFFFFDFFF -#define S_028A4C_KILL_PIX_POST_HI_Z(x) (((unsigned)(x) & 0x1) << 14) -#define G_028A4C_KILL_PIX_POST_HI_Z(x) (((x) >> 14) & 0x1) -#define C_028A4C_KILL_PIX_POST_HI_Z 0xFFFFBFFF -#define S_028A4C_KILL_PIX_POST_DETAIL_MASK(x) (((unsigned)(x) & 0x1) << 15) -#define G_028A4C_KILL_PIX_POST_DETAIL_MASK(x) (((x) >> 15) & 0x1) -#define C_028A4C_KILL_PIX_POST_DETAIL_MASK 0xFFFF7FFF -#define S_028A4C_PS_ITER_SAMPLE(x) (((unsigned)(x) & 0x1) << 16) -#define G_028A4C_PS_ITER_SAMPLE(x) (((x) >> 16) & 0x1) -#define C_028A4C_PS_ITER_SAMPLE 0xFFFEFFFF -#define S_028A4C_MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE(x) (((unsigned)(x) & 0x1) << 17) -#define G_028A4C_MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE(x) (((x) >> 17) & 0x1) -#define C_028A4C_MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE 0xFFFDFFFF -#define S_028A4C_MULTI_GPU_SUPERTILE_ENABLE(x) (((unsigned)(x) & 0x1) << 18) -#define G_028A4C_MULTI_GPU_SUPERTILE_ENABLE(x) (((x) >> 18) & 0x1) -#define C_028A4C_MULTI_GPU_SUPERTILE_ENABLE 0xFFFBFFFF -#define S_028A4C_GPU_ID_OVERRIDE_ENABLE(x) (((unsigned)(x) & 0x1) << 19) -#define G_028A4C_GPU_ID_OVERRIDE_ENABLE(x) (((x) >> 19) & 0x1) -#define C_028A4C_GPU_ID_OVERRIDE_ENABLE 0xFFF7FFFF -#define S_028A4C_GPU_ID_OVERRIDE(x) (((unsigned)(x) & 0x0F) << 20) -#define G_028A4C_GPU_ID_OVERRIDE(x) (((x) >> 20) & 0x0F) -#define C_028A4C_GPU_ID_OVERRIDE 0xFF0FFFFF -#define S_028A4C_MULTI_GPU_PRIM_DISCARD_ENABLE(x) (((unsigned)(x) & 0x1) << 24) -#define G_028A4C_MULTI_GPU_PRIM_DISCARD_ENABLE(x) (((x) >> 24) & 0x1) -#define C_028A4C_MULTI_GPU_PRIM_DISCARD_ENABLE 0xFEFFFFFF -#define S_028A4C_FORCE_EOV_CNTDWN_ENABLE(x) (((unsigned)(x) & 0x1) << 25) -#define G_028A4C_FORCE_EOV_CNTDWN_ENABLE(x) (((x) >> 25) & 0x1) -#define C_028A4C_FORCE_EOV_CNTDWN_ENABLE 0xFDFFFFFF -#define S_028A4C_FORCE_EOV_REZ_ENABLE(x) (((unsigned)(x) & 0x1) << 26) -#define G_028A4C_FORCE_EOV_REZ_ENABLE(x) (((x) >> 26) & 0x1) -#define C_028A4C_FORCE_EOV_REZ_ENABLE 0xFBFFFFFF -#define S_028A4C_OUT_OF_ORDER_PRIMITIVE_ENABLE(x) (((unsigned)(x) & 0x1) << 27) -#define G_028A4C_OUT_OF_ORDER_PRIMITIVE_ENABLE(x) (((x) >> 27) & 0x1) -#define C_028A4C_OUT_OF_ORDER_PRIMITIVE_ENABLE 0xF7FFFFFF -#define S_028A4C_OUT_OF_ORDER_WATER_MARK(x) (((unsigned)(x) & 0x07) << 28) -#define G_028A4C_OUT_OF_ORDER_WATER_MARK(x) (((x) >> 28) & 0x07) -#define C_028A4C_OUT_OF_ORDER_WATER_MARK 0x8FFFFFFF -#define R_028A50_VGT_ENHANCE 0x028A50 -#define R_028A54_VGT_GS_PER_ES 0x028A54 -#define S_028A54_GS_PER_ES(x) (((unsigned)(x) & 0x7FF) << 0) -#define G_028A54_GS_PER_ES(x) (((x) >> 0) & 0x7FF) -#define C_028A54_GS_PER_ES 0xFFFFF800 -#define R_028A58_VGT_ES_PER_GS 0x028A58 -#define S_028A58_ES_PER_GS(x) (((unsigned)(x) & 0x7FF) << 0) -#define G_028A58_ES_PER_GS(x) (((x) >> 0) & 0x7FF) -#define C_028A58_ES_PER_GS 0xFFFFF800 -#define R_028A5C_VGT_GS_PER_VS 0x028A5C -#define S_028A5C_GS_PER_VS(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028A5C_GS_PER_VS(x) (((x) >> 0) & 0x0F) -#define C_028A5C_GS_PER_VS 0xFFFFFFF0 -#define R_028A60_VGT_GSVS_RING_OFFSET_1 0x028A60 -#define S_028A60_OFFSET(x) (((unsigned)(x) & 0x7FFF) << 0) -#define G_028A60_OFFSET(x) (((x) >> 0) & 0x7FFF) -#define C_028A60_OFFSET 0xFFFF8000 -#define R_028A64_VGT_GSVS_RING_OFFSET_2 0x028A64 -#define S_028A64_OFFSET(x) (((unsigned)(x) & 0x7FFF) << 0) -#define G_028A64_OFFSET(x) (((x) >> 0) & 0x7FFF) -#define C_028A64_OFFSET 0xFFFF8000 -#define R_028A68_VGT_GSVS_RING_OFFSET_3 0x028A68 -#define S_028A68_OFFSET(x) (((unsigned)(x) & 0x7FFF) << 0) -#define G_028A68_OFFSET(x) (((x) >> 0) & 0x7FFF) -#define C_028A68_OFFSET 0xFFFF8000 -#define R_028A6C_VGT_GS_OUT_PRIM_TYPE 0x028A6C -#define S_028A6C_OUTPRIM_TYPE(x) (((unsigned)(x) & 0x3F) << 0) -#define G_028A6C_OUTPRIM_TYPE(x) (((x) >> 0) & 0x3F) -#define C_028A6C_OUTPRIM_TYPE 0xFFFFFFC0 -#define V_028A6C_OUTPRIM_TYPE_POINTLIST 0 -#define V_028A6C_OUTPRIM_TYPE_LINESTRIP 1 -#define V_028A6C_OUTPRIM_TYPE_TRISTRIP 2 -#define S_028A6C_OUTPRIM_TYPE_1(x) (((unsigned)(x) & 0x3F) << 8) -#define G_028A6C_OUTPRIM_TYPE_1(x) (((x) >> 8) & 0x3F) -#define C_028A6C_OUTPRIM_TYPE_1 0xFFFFC0FF -#define S_028A6C_OUTPRIM_TYPE_2(x) (((unsigned)(x) & 0x3F) << 16) -#define G_028A6C_OUTPRIM_TYPE_2(x) (((x) >> 16) & 0x3F) -#define C_028A6C_OUTPRIM_TYPE_2 0xFFC0FFFF -#define S_028A6C_OUTPRIM_TYPE_3(x) (((unsigned)(x) & 0x3F) << 22) -#define G_028A6C_OUTPRIM_TYPE_3(x) (((x) >> 22) & 0x3F) -#define C_028A6C_OUTPRIM_TYPE_3 0xF03FFFFF -#define S_028A6C_UNIQUE_TYPE_PER_STREAM(x) (((unsigned)(x) & 0x1) << 31) -#define G_028A6C_UNIQUE_TYPE_PER_STREAM(x) (((x) >> 31) & 0x1) -#define C_028A6C_UNIQUE_TYPE_PER_STREAM 0x7FFFFFFF -#define R_028A70_IA_ENHANCE 0x028A70 -#define R_028A74_VGT_DMA_SIZE 0x028A74 -#define R_028A78_VGT_DMA_MAX_SIZE 0x028A78 -#define R_028A7C_VGT_DMA_INDEX_TYPE 0x028A7C -#define S_028A7C_INDEX_TYPE(x) (((unsigned)(x) & 0x03) << 0) -#define G_028A7C_INDEX_TYPE(x) (((x) >> 0) & 0x03) -#define C_028A7C_INDEX_TYPE 0xFFFFFFFC -#define V_028A7C_VGT_INDEX_16 0x00 -#define V_028A7C_VGT_INDEX_32 0x01 -#define V_028A7C_VGT_INDEX_8 0x02 /* VI */ -#define S_028A7C_SWAP_MODE(x) (((unsigned)(x) & 0x03) << 2) -#define G_028A7C_SWAP_MODE(x) (((x) >> 2) & 0x03) -#define C_028A7C_SWAP_MODE 0xFFFFFFF3 -#define V_028A7C_VGT_DMA_SWAP_NONE 0x00 -#define V_028A7C_VGT_DMA_SWAP_16_BIT 0x01 -#define V_028A7C_VGT_DMA_SWAP_32_BIT 0x02 -#define V_028A7C_VGT_DMA_SWAP_WORD 0x03 -/* CIK */ -#define S_028A7C_BUF_TYPE(x) (((unsigned)(x) & 0x03) << 4) -#define G_028A7C_BUF_TYPE(x) (((x) >> 4) & 0x03) -#define C_028A7C_BUF_TYPE 0xFFFFFFCF -#define V_028A7C_VGT_DMA_BUF_MEM 0x00 -#define V_028A7C_VGT_DMA_BUF_RING 0x01 -#define V_028A7C_VGT_DMA_BUF_SETUP 0x02 -#define S_028A7C_RDREQ_POLICY(x) (((unsigned)(x) & 0x03) << 6) -#define G_028A7C_RDREQ_POLICY(x) (((x) >> 6) & 0x03) -#define C_028A7C_RDREQ_POLICY 0xFFFFFF3F -#define V_028A7C_VGT_POLICY_LRU 0x00 -#define V_028A7C_VGT_POLICY_STREAM 0x01 -#define S_028A7C_RDREQ_POLICY_VI(x) (((unsigned)(x) & 0x1) << 6) -#define G_028A7C_RDREQ_POLICY_VI(x) (((x) >> 6) & 0x1) -#define C_028A7C_RDREQ_POLICY_VI 0xFFFFFFBF -#define S_028A7C_ATC(x) (((unsigned)(x) & 0x1) << 8) -#define G_028A7C_ATC(x) (((x) >> 8) & 0x1) -#define C_028A7C_ATC 0xFFFFFEFF -#define S_028A7C_NOT_EOP(x) (((unsigned)(x) & 0x1) << 9) -#define G_028A7C_NOT_EOP(x) (((x) >> 9) & 0x1) -#define C_028A7C_NOT_EOP 0xFFFFFDFF -#define S_028A7C_REQ_PATH(x) (((unsigned)(x) & 0x1) << 10) -#define G_028A7C_REQ_PATH(x) (((x) >> 10) & 0x1) -#define C_028A7C_REQ_PATH 0xFFFFFBFF -/* */ -/* VI */ -#define S_028A7C_MTYPE(x) (((unsigned)(x) & 0x03) << 11) -#define G_028A7C_MTYPE(x) (((x) >> 11) & 0x03) -#define C_028A7C_MTYPE 0xFFFFE7FF -/* */ -#define R_028A80_WD_ENHANCE 0x028A80 -#define R_028A84_VGT_PRIMITIVEID_EN 0x028A84 -#define S_028A84_PRIMITIVEID_EN(x) (((unsigned)(x) & 0x1) << 0) -#define G_028A84_PRIMITIVEID_EN(x) (((x) >> 0) & 0x1) -#define C_028A84_PRIMITIVEID_EN 0xFFFFFFFE -#define S_028A84_DISABLE_RESET_ON_EOI(x) (((unsigned)(x) & 0x1) << 1) /* not on CIK */ -#define G_028A84_DISABLE_RESET_ON_EOI(x) (((x) >> 1) & 0x1) /* not on CIK */ -#define C_028A84_DISABLE_RESET_ON_EOI 0xFFFFFFFD /* not on CIK */ -#define R_028A88_VGT_DMA_NUM_INSTANCES 0x028A88 -#define R_028A8C_VGT_PRIMITIVEID_RESET 0x028A8C -#define R_028A90_VGT_EVENT_INITIATOR 0x028A90 -#define S_028A90_EVENT_TYPE(x) (((unsigned)(x) & 0x3F) << 0) -#define G_028A90_EVENT_TYPE(x) (((x) >> 0) & 0x3F) -#define C_028A90_EVENT_TYPE 0xFFFFFFC0 -#define V_028A90_SAMPLE_STREAMOUTSTATS1 0x01 -#define V_028A90_SAMPLE_STREAMOUTSTATS2 0x02 -#define V_028A90_SAMPLE_STREAMOUTSTATS3 0x03 -#define V_028A90_CACHE_FLUSH_TS 0x04 -#define V_028A90_CONTEXT_DONE 0x05 -#define V_028A90_CACHE_FLUSH 0x06 -#define V_028A90_CS_PARTIAL_FLUSH 0x07 -#define V_028A90_VGT_STREAMOUT_SYNC 0x08 -#define V_028A90_VGT_STREAMOUT_RESET 0x0A -#define V_028A90_END_OF_PIPE_INCR_DE 0x0B -#define V_028A90_END_OF_PIPE_IB_END 0x0C -#define V_028A90_RST_PIX_CNT 0x0D -#define V_028A90_VS_PARTIAL_FLUSH 0x0F -#define V_028A90_PS_PARTIAL_FLUSH 0x10 -#define V_028A90_FLUSH_HS_OUTPUT 0x11 -#define V_028A90_FLUSH_LS_OUTPUT 0x12 -#define V_028A90_CACHE_FLUSH_AND_INV_TS_EVENT 0x14 -#define V_028A90_ZPASS_DONE 0x15 /* not on CIK */ -#define V_028A90_CACHE_FLUSH_AND_INV_EVENT 0x16 -#define V_028A90_PERFCOUNTER_START 0x17 -#define V_028A90_PERFCOUNTER_STOP 0x18 -#define V_028A90_PIPELINESTAT_START 0x19 -#define V_028A90_PIPELINESTAT_STOP 0x1A -#define V_028A90_PERFCOUNTER_SAMPLE 0x1B -#define V_028A90_FLUSH_ES_OUTPUT 0x1C -#define V_028A90_FLUSH_GS_OUTPUT 0x1D -#define V_028A90_SAMPLE_PIPELINESTAT 0x1E -#define V_028A90_SO_VGTSTREAMOUT_FLUSH 0x1F -#define V_028A90_SAMPLE_STREAMOUTSTATS 0x20 -#define V_028A90_RESET_VTX_CNT 0x21 -#define V_028A90_BLOCK_CONTEXT_DONE 0x22 -#define V_028A90_CS_CONTEXT_DONE 0x23 -#define V_028A90_VGT_FLUSH 0x24 -#define V_028A90_SC_SEND_DB_VPZ 0x27 -#define V_028A90_BOTTOM_OF_PIPE_TS 0x28 -#define V_028A90_DB_CACHE_FLUSH_AND_INV 0x2A -#define V_028A90_FLUSH_AND_INV_DB_DATA_TS 0x2B -#define V_028A90_FLUSH_AND_INV_DB_META 0x2C -#define V_028A90_FLUSH_AND_INV_CB_DATA_TS 0x2D -#define V_028A90_FLUSH_AND_INV_CB_META 0x2E -#define V_028A90_CS_DONE 0x2F -#define V_028A90_PS_DONE 0x30 -#define V_028A90_FLUSH_AND_INV_CB_PIXEL_DATA 0x31 -#define V_028A90_THREAD_TRACE_START 0x33 -#define V_028A90_THREAD_TRACE_STOP 0x34 -#define V_028A90_THREAD_TRACE_MARKER 0x35 -#define V_028A90_THREAD_TRACE_FLUSH 0x36 -#define V_028A90_THREAD_TRACE_FINISH 0x37 -/* CIK */ -#define V_028A90_PIXEL_PIPE_STAT_CONTROL 0x38 -#define V_028A90_PIXEL_PIPE_STAT_DUMP 0x39 -#define V_028A90_PIXEL_PIPE_STAT_RESET 0x40 -/* */ -#define S_028A90_ADDRESS_HI(x) (((unsigned)(x) & 0x1FF) << 18) -#define G_028A90_ADDRESS_HI(x) (((x) >> 18) & 0x1FF) -#define C_028A90_ADDRESS_HI 0xF803FFFF -#define S_028A90_EXTENDED_EVENT(x) (((unsigned)(x) & 0x1) << 27) -#define G_028A90_EXTENDED_EVENT(x) (((x) >> 27) & 0x1) -#define C_028A90_EXTENDED_EVENT 0xF7FFFFFF -#define R_028A94_VGT_MULTI_PRIM_IB_RESET_EN 0x028A94 -#define S_028A94_RESET_EN(x) (((unsigned)(x) & 0x1) << 0) -#define G_028A94_RESET_EN(x) (((x) >> 0) & 0x1) -#define C_028A94_RESET_EN 0xFFFFFFFE -#define R_028AA0_VGT_INSTANCE_STEP_RATE_0 0x028AA0 -#define R_028AA4_VGT_INSTANCE_STEP_RATE_1 0x028AA4 -#define R_028AA8_IA_MULTI_VGT_PARAM 0x028AA8 -#define S_028AA8_PRIMGROUP_SIZE(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_028AA8_PRIMGROUP_SIZE(x) (((x) >> 0) & 0xFFFF) -#define C_028AA8_PRIMGROUP_SIZE 0xFFFF0000 -#define S_028AA8_PARTIAL_VS_WAVE_ON(x) (((unsigned)(x) & 0x1) << 16) -#define G_028AA8_PARTIAL_VS_WAVE_ON(x) (((x) >> 16) & 0x1) -#define C_028AA8_PARTIAL_VS_WAVE_ON 0xFFFEFFFF -#define S_028AA8_SWITCH_ON_EOP(x) (((unsigned)(x) & 0x1) << 17) -#define G_028AA8_SWITCH_ON_EOP(x) (((x) >> 17) & 0x1) -#define C_028AA8_SWITCH_ON_EOP 0xFFFDFFFF -#define S_028AA8_PARTIAL_ES_WAVE_ON(x) (((unsigned)(x) & 0x1) << 18) -#define G_028AA8_PARTIAL_ES_WAVE_ON(x) (((x) >> 18) & 0x1) -#define C_028AA8_PARTIAL_ES_WAVE_ON 0xFFFBFFFF -#define S_028AA8_SWITCH_ON_EOI(x) (((unsigned)(x) & 0x1) << 19) -#define G_028AA8_SWITCH_ON_EOI(x) (((x) >> 19) & 0x1) -#define C_028AA8_SWITCH_ON_EOI 0xFFF7FFFF -/* CIK */ -#define S_028AA8_WD_SWITCH_ON_EOP(x) (((unsigned)(x) & 0x1) << 20) -#define G_028AA8_WD_SWITCH_ON_EOP(x) (((x) >> 20) & 0x1) -#define C_028AA8_WD_SWITCH_ON_EOP 0xFFEFFFFF -/* VI */ -#define S_028AA8_MAX_PRIMGRP_IN_WAVE(x) (((unsigned)(x) & 0x0F) << 28) -#define G_028AA8_MAX_PRIMGRP_IN_WAVE(x) (((x) >> 28) & 0x0F) -#define C_028AA8_MAX_PRIMGRP_IN_WAVE 0x0FFFFFFF -/* */ -#define R_028AAC_VGT_ESGS_RING_ITEMSIZE 0x028AAC -#define S_028AAC_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) -#define G_028AAC_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) -#define C_028AAC_ITEMSIZE 0xFFFF8000 -#define R_028AB0_VGT_GSVS_RING_ITEMSIZE 0x028AB0 -#define S_028AB0_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) -#define G_028AB0_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) -#define C_028AB0_ITEMSIZE 0xFFFF8000 -#define R_028AB4_VGT_REUSE_OFF 0x028AB4 -#define S_028AB4_REUSE_OFF(x) (((unsigned)(x) & 0x1) << 0) -#define G_028AB4_REUSE_OFF(x) (((x) >> 0) & 0x1) -#define C_028AB4_REUSE_OFF 0xFFFFFFFE -#define R_028AB8_VGT_VTX_CNT_EN 0x028AB8 -#define S_028AB8_VTX_CNT_EN(x) (((unsigned)(x) & 0x1) << 0) -#define G_028AB8_VTX_CNT_EN(x) (((x) >> 0) & 0x1) -#define C_028AB8_VTX_CNT_EN 0xFFFFFFFE -#define R_028ABC_DB_HTILE_SURFACE 0x028ABC -#define S_028ABC_LINEAR(x) (((unsigned)(x) & 0x1) << 0) -#define G_028ABC_LINEAR(x) (((x) >> 0) & 0x1) -#define C_028ABC_LINEAR 0xFFFFFFFE -#define S_028ABC_FULL_CACHE(x) (((unsigned)(x) & 0x1) << 1) -#define G_028ABC_FULL_CACHE(x) (((x) >> 1) & 0x1) -#define C_028ABC_FULL_CACHE 0xFFFFFFFD -#define S_028ABC_HTILE_USES_PRELOAD_WIN(x) (((unsigned)(x) & 0x1) << 2) -#define G_028ABC_HTILE_USES_PRELOAD_WIN(x) (((x) >> 2) & 0x1) -#define C_028ABC_HTILE_USES_PRELOAD_WIN 0xFFFFFFFB -#define S_028ABC_PRELOAD(x) (((unsigned)(x) & 0x1) << 3) -#define G_028ABC_PRELOAD(x) (((x) >> 3) & 0x1) -#define C_028ABC_PRELOAD 0xFFFFFFF7 -#define S_028ABC_PREFETCH_WIDTH(x) (((unsigned)(x) & 0x3F) << 4) -#define G_028ABC_PREFETCH_WIDTH(x) (((x) >> 4) & 0x3F) -#define C_028ABC_PREFETCH_WIDTH 0xFFFFFC0F -#define S_028ABC_PREFETCH_HEIGHT(x) (((unsigned)(x) & 0x3F) << 10) -#define G_028ABC_PREFETCH_HEIGHT(x) (((x) >> 10) & 0x3F) -#define C_028ABC_PREFETCH_HEIGHT 0xFFFF03FF -#define S_028ABC_DST_OUTSIDE_ZERO_TO_ONE(x) (((unsigned)(x) & 0x1) << 16) -#define G_028ABC_DST_OUTSIDE_ZERO_TO_ONE(x) (((x) >> 16) & 0x1) -#define C_028ABC_DST_OUTSIDE_ZERO_TO_ONE 0xFFFEFFFF -/* VI */ -#define S_028ABC_TC_COMPATIBLE(x) (((unsigned)(x) & 0x1) << 17) -#define G_028ABC_TC_COMPATIBLE(x) (((x) >> 17) & 0x1) -#define C_028ABC_TC_COMPATIBLE 0xFFFDFFFF -/* */ -#define R_028AC0_DB_SRESULTS_COMPARE_STATE0 0x028AC0 -#define S_028AC0_COMPAREFUNC0(x) (((unsigned)(x) & 0x07) << 0) -#define G_028AC0_COMPAREFUNC0(x) (((x) >> 0) & 0x07) -#define C_028AC0_COMPAREFUNC0 0xFFFFFFF8 -#define V_028AC0_REF_NEVER 0x00 -#define V_028AC0_REF_LESS 0x01 -#define V_028AC0_REF_EQUAL 0x02 -#define V_028AC0_REF_LEQUAL 0x03 -#define V_028AC0_REF_GREATER 0x04 -#define V_028AC0_REF_NOTEQUAL 0x05 -#define V_028AC0_REF_GEQUAL 0x06 -#define V_028AC0_REF_ALWAYS 0x07 -#define S_028AC0_COMPAREVALUE0(x) (((unsigned)(x) & 0xFF) << 4) -#define G_028AC0_COMPAREVALUE0(x) (((x) >> 4) & 0xFF) -#define C_028AC0_COMPAREVALUE0 0xFFFFF00F -#define S_028AC0_COMPAREMASK0(x) (((unsigned)(x) & 0xFF) << 12) -#define G_028AC0_COMPAREMASK0(x) (((x) >> 12) & 0xFF) -#define C_028AC0_COMPAREMASK0 0xFFF00FFF -#define S_028AC0_ENABLE0(x) (((unsigned)(x) & 0x1) << 24) -#define G_028AC0_ENABLE0(x) (((x) >> 24) & 0x1) -#define C_028AC0_ENABLE0 0xFEFFFFFF -#define R_028AC4_DB_SRESULTS_COMPARE_STATE1 0x028AC4 -#define S_028AC4_COMPAREFUNC1(x) (((unsigned)(x) & 0x07) << 0) -#define G_028AC4_COMPAREFUNC1(x) (((x) >> 0) & 0x07) -#define C_028AC4_COMPAREFUNC1 0xFFFFFFF8 -#define V_028AC4_REF_NEVER 0x00 -#define V_028AC4_REF_LESS 0x01 -#define V_028AC4_REF_EQUAL 0x02 -#define V_028AC4_REF_LEQUAL 0x03 -#define V_028AC4_REF_GREATER 0x04 -#define V_028AC4_REF_NOTEQUAL 0x05 -#define V_028AC4_REF_GEQUAL 0x06 -#define V_028AC4_REF_ALWAYS 0x07 -#define S_028AC4_COMPAREVALUE1(x) (((unsigned)(x) & 0xFF) << 4) -#define G_028AC4_COMPAREVALUE1(x) (((x) >> 4) & 0xFF) -#define C_028AC4_COMPAREVALUE1 0xFFFFF00F -#define S_028AC4_COMPAREMASK1(x) (((unsigned)(x) & 0xFF) << 12) -#define G_028AC4_COMPAREMASK1(x) (((x) >> 12) & 0xFF) -#define C_028AC4_COMPAREMASK1 0xFFF00FFF -#define S_028AC4_ENABLE1(x) (((unsigned)(x) & 0x1) << 24) -#define G_028AC4_ENABLE1(x) (((x) >> 24) & 0x1) -#define C_028AC4_ENABLE1 0xFEFFFFFF -#define R_028AC8_DB_PRELOAD_CONTROL 0x028AC8 -#define S_028AC8_START_X(x) (((unsigned)(x) & 0xFF) << 0) -#define G_028AC8_START_X(x) (((x) >> 0) & 0xFF) -#define C_028AC8_START_X 0xFFFFFF00 -#define S_028AC8_START_Y(x) (((unsigned)(x) & 0xFF) << 8) -#define G_028AC8_START_Y(x) (((x) >> 8) & 0xFF) -#define C_028AC8_START_Y 0xFFFF00FF -#define S_028AC8_MAX_X(x) (((unsigned)(x) & 0xFF) << 16) -#define G_028AC8_MAX_X(x) (((x) >> 16) & 0xFF) -#define C_028AC8_MAX_X 0xFF00FFFF -#define S_028AC8_MAX_Y(x) (((unsigned)(x) & 0xFF) << 24) -#define G_028AC8_MAX_Y(x) (((x) >> 24) & 0xFF) -#define C_028AC8_MAX_Y 0x00FFFFFF -#define R_028AD0_VGT_STRMOUT_BUFFER_SIZE_0 0x028AD0 -#define R_028AD4_VGT_STRMOUT_VTX_STRIDE_0 0x028AD4 -#define S_028AD4_STRIDE(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_028AD4_STRIDE(x) (((x) >> 0) & 0x3FF) -#define C_028AD4_STRIDE 0xFFFFFC00 -#define R_028ADC_VGT_STRMOUT_BUFFER_OFFSET_0 0x028ADC -#define R_028AE0_VGT_STRMOUT_BUFFER_SIZE_1 0x028AE0 -#define R_028AE4_VGT_STRMOUT_VTX_STRIDE_1 0x028AE4 -#define S_028AE4_STRIDE(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_028AE4_STRIDE(x) (((x) >> 0) & 0x3FF) -#define C_028AE4_STRIDE 0xFFFFFC00 -#define R_028AEC_VGT_STRMOUT_BUFFER_OFFSET_1 0x028AEC -#define R_028AF0_VGT_STRMOUT_BUFFER_SIZE_2 0x028AF0 -#define R_028AF4_VGT_STRMOUT_VTX_STRIDE_2 0x028AF4 -#define S_028AF4_STRIDE(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_028AF4_STRIDE(x) (((x) >> 0) & 0x3FF) -#define C_028AF4_STRIDE 0xFFFFFC00 -#define R_028AFC_VGT_STRMOUT_BUFFER_OFFSET_2 0x028AFC -#define R_028B00_VGT_STRMOUT_BUFFER_SIZE_3 0x028B00 -#define R_028B04_VGT_STRMOUT_VTX_STRIDE_3 0x028B04 -#define S_028B04_STRIDE(x) (((unsigned)(x) & 0x3FF) << 0) -#define G_028B04_STRIDE(x) (((x) >> 0) & 0x3FF) -#define C_028B04_STRIDE 0xFFFFFC00 -#define R_028B0C_VGT_STRMOUT_BUFFER_OFFSET_3 0x028B0C -#define R_028B28_VGT_STRMOUT_DRAW_OPAQUE_OFFSET 0x028B28 -#define R_028B2C_VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE 0x028B2C -#define R_028B30_VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE 0x028B30 -#define S_028B30_VERTEX_STRIDE(x) (((unsigned)(x) & 0x1FF) << 0) -#define G_028B30_VERTEX_STRIDE(x) (((x) >> 0) & 0x1FF) -#define C_028B30_VERTEX_STRIDE 0xFFFFFE00 -#define R_028B38_VGT_GS_MAX_VERT_OUT 0x028B38 -#define S_028B38_MAX_VERT_OUT(x) (((unsigned)(x) & 0x7FF) << 0) -#define G_028B38_MAX_VERT_OUT(x) (((x) >> 0) & 0x7FF) -#define C_028B38_MAX_VERT_OUT 0xFFFFF800 -/* VI */ -#define R_028B50_VGT_TESS_DISTRIBUTION 0x028B50 -#define S_028B50_ACCUM_ISOLINE(x) (((unsigned)(x) & 0xFF) << 0) -#define G_028B50_ACCUM_ISOLINE(x) (((x) >> 0) & 0xFF) -#define C_028B50_ACCUM_ISOLINE 0xFFFFFF00 -#define S_028B50_ACCUM_TRI(x) (((unsigned)(x) & 0xFF) << 8) -#define G_028B50_ACCUM_TRI(x) (((x) >> 8) & 0xFF) -#define C_028B50_ACCUM_TRI 0xFFFF00FF -#define S_028B50_ACCUM_QUAD(x) (((unsigned)(x) & 0xFF) << 16) -#define G_028B50_ACCUM_QUAD(x) (((x) >> 16) & 0xFF) -#define C_028B50_ACCUM_QUAD 0xFF00FFFF -#define S_028B50_DONUT_SPLIT(x) (((unsigned)(x) & 0xFF) << 24) -#define G_028B50_DONUT_SPLIT(x) (((x) >> 24) & 0xFF) -#define C_028B50_DONUT_SPLIT 0x00FFFFFF -/* */ -#define R_028B54_VGT_SHADER_STAGES_EN 0x028B54 -#define S_028B54_LS_EN(x) (((unsigned)(x) & 0x03) << 0) -#define G_028B54_LS_EN(x) (((x) >> 0) & 0x03) -#define C_028B54_LS_EN 0xFFFFFFFC -#define V_028B54_LS_STAGE_OFF 0x00 -#define V_028B54_LS_STAGE_ON 0x01 -#define V_028B54_CS_STAGE_ON 0x02 -#define S_028B54_HS_EN(x) (((unsigned)(x) & 0x1) << 2) -#define G_028B54_HS_EN(x) (((x) >> 2) & 0x1) -#define C_028B54_HS_EN 0xFFFFFFFB -#define S_028B54_ES_EN(x) (((unsigned)(x) & 0x03) << 3) -#define G_028B54_ES_EN(x) (((x) >> 3) & 0x03) -#define C_028B54_ES_EN 0xFFFFFFE7 -#define V_028B54_ES_STAGE_OFF 0x00 -#define V_028B54_ES_STAGE_DS 0x01 -#define V_028B54_ES_STAGE_REAL 0x02 -#define S_028B54_GS_EN(x) (((unsigned)(x) & 0x1) << 5) -#define G_028B54_GS_EN(x) (((x) >> 5) & 0x1) -#define C_028B54_GS_EN 0xFFFFFFDF -#define S_028B54_VS_EN(x) (((unsigned)(x) & 0x03) << 6) -#define G_028B54_VS_EN(x) (((x) >> 6) & 0x03) -#define C_028B54_VS_EN 0xFFFFFF3F -#define V_028B54_VS_STAGE_REAL 0x00 -#define V_028B54_VS_STAGE_DS 0x01 -#define V_028B54_VS_STAGE_COPY_SHADER 0x02 -#define S_028B54_DYNAMIC_HS(x) (((unsigned)(x) & 0x1) << 8) -#define G_028B54_DYNAMIC_HS(x) (((x) >> 8) & 0x1) -#define C_028B54_DYNAMIC_HS 0xFFFFFEFF -/* VI */ -#define S_028B54_DISPATCH_DRAW_EN(x) (((unsigned)(x) & 0x1) << 9) -#define G_028B54_DISPATCH_DRAW_EN(x) (((x) >> 9) & 0x1) -#define C_028B54_DISPATCH_DRAW_EN 0xFFFFFDFF -#define S_028B54_DIS_DEALLOC_ACCUM_0(x) (((unsigned)(x) & 0x1) << 10) -#define G_028B54_DIS_DEALLOC_ACCUM_0(x) (((x) >> 10) & 0x1) -#define C_028B54_DIS_DEALLOC_ACCUM_0 0xFFFFFBFF -#define S_028B54_DIS_DEALLOC_ACCUM_1(x) (((unsigned)(x) & 0x1) << 11) -#define G_028B54_DIS_DEALLOC_ACCUM_1(x) (((x) >> 11) & 0x1) -#define C_028B54_DIS_DEALLOC_ACCUM_1 0xFFFFF7FF -#define S_028B54_VS_WAVE_ID_EN(x) (((unsigned)(x) & 0x1) << 12) -#define G_028B54_VS_WAVE_ID_EN(x) (((x) >> 12) & 0x1) -#define C_028B54_VS_WAVE_ID_EN 0xFFFFEFFF -/* */ -#define R_028B58_VGT_LS_HS_CONFIG 0x028B58 -#define S_028B58_NUM_PATCHES(x) (((unsigned)(x) & 0xFF) << 0) -#define G_028B58_NUM_PATCHES(x) (((x) >> 0) & 0xFF) -#define C_028B58_NUM_PATCHES 0xFFFFFF00 -#define S_028B58_HS_NUM_INPUT_CP(x) (((unsigned)(x) & 0x3F) << 8) -#define G_028B58_HS_NUM_INPUT_CP(x) (((x) >> 8) & 0x3F) -#define C_028B58_HS_NUM_INPUT_CP 0xFFFFC0FF -#define S_028B58_HS_NUM_OUTPUT_CP(x) (((unsigned)(x) & 0x3F) << 14) -#define G_028B58_HS_NUM_OUTPUT_CP(x) (((x) >> 14) & 0x3F) -#define C_028B58_HS_NUM_OUTPUT_CP 0xFFF03FFF -#define R_028B5C_VGT_GS_VERT_ITEMSIZE 0x028B5C -#define S_028B5C_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) -#define G_028B5C_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) -#define C_028B5C_ITEMSIZE 0xFFFF8000 -#define R_028B60_VGT_GS_VERT_ITEMSIZE_1 0x028B60 -#define S_028B60_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) -#define G_028B60_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) -#define C_028B60_ITEMSIZE 0xFFFF8000 -#define R_028B64_VGT_GS_VERT_ITEMSIZE_2 0x028B64 -#define S_028B64_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) -#define G_028B64_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) -#define C_028B64_ITEMSIZE 0xFFFF8000 -#define R_028B68_VGT_GS_VERT_ITEMSIZE_3 0x028B68 -#define S_028B68_ITEMSIZE(x) (((unsigned)(x) & 0x7FFF) << 0) -#define G_028B68_ITEMSIZE(x) (((x) >> 0) & 0x7FFF) -#define C_028B68_ITEMSIZE 0xFFFF8000 -#define R_028B6C_VGT_TF_PARAM 0x028B6C -#define S_028B6C_TYPE(x) (((unsigned)(x) & 0x03) << 0) -#define G_028B6C_TYPE(x) (((x) >> 0) & 0x03) -#define C_028B6C_TYPE 0xFFFFFFFC -#define V_028B6C_TESS_ISOLINE 0x00 -#define V_028B6C_TESS_TRIANGLE 0x01 -#define V_028B6C_TESS_QUAD 0x02 -#define S_028B6C_PARTITIONING(x) (((unsigned)(x) & 0x07) << 2) -#define G_028B6C_PARTITIONING(x) (((x) >> 2) & 0x07) -#define C_028B6C_PARTITIONING 0xFFFFFFE3 -#define V_028B6C_PART_INTEGER 0x00 -#define V_028B6C_PART_POW2 0x01 -#define V_028B6C_PART_FRAC_ODD 0x02 -#define V_028B6C_PART_FRAC_EVEN 0x03 -#define S_028B6C_TOPOLOGY(x) (((unsigned)(x) & 0x07) << 5) -#define G_028B6C_TOPOLOGY(x) (((x) >> 5) & 0x07) -#define C_028B6C_TOPOLOGY 0xFFFFFF1F -#define V_028B6C_OUTPUT_POINT 0x00 -#define V_028B6C_OUTPUT_LINE 0x01 -#define V_028B6C_OUTPUT_TRIANGLE_CW 0x02 -#define V_028B6C_OUTPUT_TRIANGLE_CCW 0x03 -#define S_028B6C_RESERVED_REDUC_AXIS(x) (((unsigned)(x) & 0x1) << 8) /* not on CIK */ -#define G_028B6C_RESERVED_REDUC_AXIS(x) (((x) >> 8) & 0x1) /* not on CIK */ -#define C_028B6C_RESERVED_REDUC_AXIS 0xFFFFFEFF /* not on CIK */ -#define S_028B6C_DEPRECATED(x) (((unsigned)(x) & 0x1) << 9) -#define G_028B6C_DEPRECATED(x) (((x) >> 9) & 0x1) -#define C_028B6C_DEPRECATED 0xFFFFFDFF -#define S_028B6C_NUM_DS_WAVES_PER_SIMD(x) (((unsigned)(x) & 0x0F) << 10) -#define G_028B6C_NUM_DS_WAVES_PER_SIMD(x) (((x) >> 10) & 0x0F) -#define C_028B6C_NUM_DS_WAVES_PER_SIMD 0xFFFFC3FF -#define S_028B6C_DISABLE_DONUTS(x) (((unsigned)(x) & 0x1) << 14) -#define G_028B6C_DISABLE_DONUTS(x) (((x) >> 14) & 0x1) -#define C_028B6C_DISABLE_DONUTS 0xFFFFBFFF -/* CIK */ -#define S_028B6C_RDREQ_POLICY(x) (((unsigned)(x) & 0x03) << 15) -#define G_028B6C_RDREQ_POLICY(x) (((x) >> 15) & 0x03) -#define C_028B6C_RDREQ_POLICY 0xFFFE7FFF -#define V_028B6C_VGT_POLICY_LRU 0x00 -#define V_028B6C_VGT_POLICY_STREAM 0x01 -#define V_028B6C_VGT_POLICY_BYPASS 0x02 -/* */ -/* VI */ -#define S_028B6C_RDREQ_POLICY_VI(x) (((unsigned)(x) & 0x1) << 15) -#define G_028B6C_RDREQ_POLICY_VI(x) (((x) >> 15) & 0x1) -#define C_028B6C_RDREQ_POLICY_VI 0xFFFF7FFF -#define S_028B6C_DISTRIBUTION_MODE(x) (((unsigned)(x) & 0x03) << 17) -#define G_028B6C_DISTRIBUTION_MODE(x) (((x) >> 17) & 0x03) -#define C_028B6C_DISTRIBUTION_MODE 0xFFF9FFFF -#define V_028B6C_DISTRIBUTION_MODE_NO_DIST 0x00 -#define V_028B6C_DISTRIBUTION_MODE_PATCHES 0x01 -#define V_028B6C_DISTRIBUTION_MODE_DONUTS 0x02 -#define S_028B6C_MTYPE(x) (((unsigned)(x) & 0x03) << 19) -#define G_028B6C_MTYPE(x) (((x) >> 19) & 0x03) -#define C_028B6C_MTYPE 0xFFE7FFFF -/* */ -#define R_028B70_DB_ALPHA_TO_MASK 0x028B70 -#define S_028B70_ALPHA_TO_MASK_ENABLE(x) (((unsigned)(x) & 0x1) << 0) -#define G_028B70_ALPHA_TO_MASK_ENABLE(x) (((x) >> 0) & 0x1) -#define C_028B70_ALPHA_TO_MASK_ENABLE 0xFFFFFFFE -#define S_028B70_ALPHA_TO_MASK_OFFSET0(x) (((unsigned)(x) & 0x03) << 8) -#define G_028B70_ALPHA_TO_MASK_OFFSET0(x) (((x) >> 8) & 0x03) -#define C_028B70_ALPHA_TO_MASK_OFFSET0 0xFFFFFCFF -#define S_028B70_ALPHA_TO_MASK_OFFSET1(x) (((unsigned)(x) & 0x03) << 10) -#define G_028B70_ALPHA_TO_MASK_OFFSET1(x) (((x) >> 10) & 0x03) -#define C_028B70_ALPHA_TO_MASK_OFFSET1 0xFFFFF3FF -#define S_028B70_ALPHA_TO_MASK_OFFSET2(x) (((unsigned)(x) & 0x03) << 12) -#define G_028B70_ALPHA_TO_MASK_OFFSET2(x) (((x) >> 12) & 0x03) -#define C_028B70_ALPHA_TO_MASK_OFFSET2 0xFFFFCFFF -#define S_028B70_ALPHA_TO_MASK_OFFSET3(x) (((unsigned)(x) & 0x03) << 14) -#define G_028B70_ALPHA_TO_MASK_OFFSET3(x) (((x) >> 14) & 0x03) -#define C_028B70_ALPHA_TO_MASK_OFFSET3 0xFFFF3FFF -#define S_028B70_OFFSET_ROUND(x) (((unsigned)(x) & 0x1) << 16) -#define G_028B70_OFFSET_ROUND(x) (((x) >> 16) & 0x1) -#define C_028B70_OFFSET_ROUND 0xFFFEFFFF -/* CIK */ -#define R_028B74_VGT_DISPATCH_DRAW_INDEX 0x028B74 -/* */ -#define R_028B78_PA_SU_POLY_OFFSET_DB_FMT_CNTL 0x028B78 -#define S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(x) (((unsigned)(x) & 0xFF) << 0) -#define G_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(x) (((x) >> 0) & 0xFF) -#define C_028B78_POLY_OFFSET_NEG_NUM_DB_BITS 0xFFFFFF00 -#define S_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(x) (((unsigned)(x) & 0x1) << 8) -#define G_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(x) (((x) >> 8) & 0x1) -#define C_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT 0xFFFFFEFF -#define R_028B7C_PA_SU_POLY_OFFSET_CLAMP 0x028B7C -#define R_028B80_PA_SU_POLY_OFFSET_FRONT_SCALE 0x028B80 -#define R_028B84_PA_SU_POLY_OFFSET_FRONT_OFFSET 0x028B84 -#define R_028B88_PA_SU_POLY_OFFSET_BACK_SCALE 0x028B88 -#define R_028B8C_PA_SU_POLY_OFFSET_BACK_OFFSET 0x028B8C -#define R_028B90_VGT_GS_INSTANCE_CNT 0x028B90 -#define S_028B90_ENABLE(x) (((unsigned)(x) & 0x1) << 0) -#define G_028B90_ENABLE(x) (((x) >> 0) & 0x1) -#define C_028B90_ENABLE 0xFFFFFFFE -#define S_028B90_CNT(x) (((unsigned)(x) & 0x7F) << 2) -#define G_028B90_CNT(x) (((x) >> 2) & 0x7F) -#define C_028B90_CNT 0xFFFFFE03 -#define R_028B94_VGT_STRMOUT_CONFIG 0x028B94 -#define S_028B94_STREAMOUT_0_EN(x) (((unsigned)(x) & 0x1) << 0) -#define G_028B94_STREAMOUT_0_EN(x) (((x) >> 0) & 0x1) -#define C_028B94_STREAMOUT_0_EN 0xFFFFFFFE -#define S_028B94_STREAMOUT_1_EN(x) (((unsigned)(x) & 0x1) << 1) -#define G_028B94_STREAMOUT_1_EN(x) (((x) >> 1) & 0x1) -#define C_028B94_STREAMOUT_1_EN 0xFFFFFFFD -#define S_028B94_STREAMOUT_2_EN(x) (((unsigned)(x) & 0x1) << 2) -#define G_028B94_STREAMOUT_2_EN(x) (((x) >> 2) & 0x1) -#define C_028B94_STREAMOUT_2_EN 0xFFFFFFFB -#define S_028B94_STREAMOUT_3_EN(x) (((unsigned)(x) & 0x1) << 3) -#define G_028B94_STREAMOUT_3_EN(x) (((x) >> 3) & 0x1) -#define C_028B94_STREAMOUT_3_EN 0xFFFFFFF7 -#define S_028B94_RAST_STREAM(x) (((unsigned)(x) & 0x07) << 4) -#define G_028B94_RAST_STREAM(x) (((x) >> 4) & 0x07) -#define C_028B94_RAST_STREAM 0xFFFFFF8F -#define S_028B94_RAST_STREAM_MASK(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028B94_RAST_STREAM_MASK(x) (((x) >> 8) & 0x0F) -#define C_028B94_RAST_STREAM_MASK 0xFFFFF0FF -#define S_028B94_USE_RAST_STREAM_MASK(x) (((unsigned)(x) & 0x1) << 31) -#define G_028B94_USE_RAST_STREAM_MASK(x) (((x) >> 31) & 0x1) -#define C_028B94_USE_RAST_STREAM_MASK 0x7FFFFFFF -#define R_028B98_VGT_STRMOUT_BUFFER_CONFIG 0x028B98 -#define S_028B98_STREAM_0_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028B98_STREAM_0_BUFFER_EN(x) (((x) >> 0) & 0x0F) -#define C_028B98_STREAM_0_BUFFER_EN 0xFFFFFFF0 -#define S_028B98_STREAM_1_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 4) -#define G_028B98_STREAM_1_BUFFER_EN(x) (((x) >> 4) & 0x0F) -#define C_028B98_STREAM_1_BUFFER_EN 0xFFFFFF0F -#define S_028B98_STREAM_2_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028B98_STREAM_2_BUFFER_EN(x) (((x) >> 8) & 0x0F) -#define C_028B98_STREAM_2_BUFFER_EN 0xFFFFF0FF -#define S_028B98_STREAM_3_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 12) -#define G_028B98_STREAM_3_BUFFER_EN(x) (((x) >> 12) & 0x0F) -#define C_028B98_STREAM_3_BUFFER_EN 0xFFFF0FFF -#define R_028BD4_PA_SC_CENTROID_PRIORITY_0 0x028BD4 -#define S_028BD4_DISTANCE_0(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028BD4_DISTANCE_0(x) (((x) >> 0) & 0x0F) -#define C_028BD4_DISTANCE_0 0xFFFFFFF0 -#define S_028BD4_DISTANCE_1(x) (((unsigned)(x) & 0x0F) << 4) -#define G_028BD4_DISTANCE_1(x) (((x) >> 4) & 0x0F) -#define C_028BD4_DISTANCE_1 0xFFFFFF0F -#define S_028BD4_DISTANCE_2(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028BD4_DISTANCE_2(x) (((x) >> 8) & 0x0F) -#define C_028BD4_DISTANCE_2 0xFFFFF0FF -#define S_028BD4_DISTANCE_3(x) (((unsigned)(x) & 0x0F) << 12) -#define G_028BD4_DISTANCE_3(x) (((x) >> 12) & 0x0F) -#define C_028BD4_DISTANCE_3 0xFFFF0FFF -#define S_028BD4_DISTANCE_4(x) (((unsigned)(x) & 0x0F) << 16) -#define G_028BD4_DISTANCE_4(x) (((x) >> 16) & 0x0F) -#define C_028BD4_DISTANCE_4 0xFFF0FFFF -#define S_028BD4_DISTANCE_5(x) (((unsigned)(x) & 0x0F) << 20) -#define G_028BD4_DISTANCE_5(x) (((x) >> 20) & 0x0F) -#define C_028BD4_DISTANCE_5 0xFF0FFFFF -#define S_028BD4_DISTANCE_6(x) (((unsigned)(x) & 0x0F) << 24) -#define G_028BD4_DISTANCE_6(x) (((x) >> 24) & 0x0F) -#define C_028BD4_DISTANCE_6 0xF0FFFFFF -#define S_028BD4_DISTANCE_7(x) (((unsigned)(x) & 0x0F) << 28) -#define G_028BD4_DISTANCE_7(x) (((x) >> 28) & 0x0F) -#define C_028BD4_DISTANCE_7 0x0FFFFFFF -#define R_028BD8_PA_SC_CENTROID_PRIORITY_1 0x028BD8 -#define S_028BD8_DISTANCE_8(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028BD8_DISTANCE_8(x) (((x) >> 0) & 0x0F) -#define C_028BD8_DISTANCE_8 0xFFFFFFF0 -#define S_028BD8_DISTANCE_9(x) (((unsigned)(x) & 0x0F) << 4) -#define G_028BD8_DISTANCE_9(x) (((x) >> 4) & 0x0F) -#define C_028BD8_DISTANCE_9 0xFFFFFF0F -#define S_028BD8_DISTANCE_10(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028BD8_DISTANCE_10(x) (((x) >> 8) & 0x0F) -#define C_028BD8_DISTANCE_10 0xFFFFF0FF -#define S_028BD8_DISTANCE_11(x) (((unsigned)(x) & 0x0F) << 12) -#define G_028BD8_DISTANCE_11(x) (((x) >> 12) & 0x0F) -#define C_028BD8_DISTANCE_11 0xFFFF0FFF -#define S_028BD8_DISTANCE_12(x) (((unsigned)(x) & 0x0F) << 16) -#define G_028BD8_DISTANCE_12(x) (((x) >> 16) & 0x0F) -#define C_028BD8_DISTANCE_12 0xFFF0FFFF -#define S_028BD8_DISTANCE_13(x) (((unsigned)(x) & 0x0F) << 20) -#define G_028BD8_DISTANCE_13(x) (((x) >> 20) & 0x0F) -#define C_028BD8_DISTANCE_13 0xFF0FFFFF -#define S_028BD8_DISTANCE_14(x) (((unsigned)(x) & 0x0F) << 24) -#define G_028BD8_DISTANCE_14(x) (((x) >> 24) & 0x0F) -#define C_028BD8_DISTANCE_14 0xF0FFFFFF -#define S_028BD8_DISTANCE_15(x) (((unsigned)(x) & 0x0F) << 28) -#define G_028BD8_DISTANCE_15(x) (((x) >> 28) & 0x0F) -#define C_028BD8_DISTANCE_15 0x0FFFFFFF -#define R_028BDC_PA_SC_LINE_CNTL 0x028BDC -#define S_028BDC_EXPAND_LINE_WIDTH(x) (((unsigned)(x) & 0x1) << 9) -#define G_028BDC_EXPAND_LINE_WIDTH(x) (((x) >> 9) & 0x1) -#define C_028BDC_EXPAND_LINE_WIDTH 0xFFFFFDFF -#define S_028BDC_LAST_PIXEL(x) (((unsigned)(x) & 0x1) << 10) -#define G_028BDC_LAST_PIXEL(x) (((x) >> 10) & 0x1) -#define C_028BDC_LAST_PIXEL 0xFFFFFBFF -#define S_028BDC_PERPENDICULAR_ENDCAP_ENA(x) (((unsigned)(x) & 0x1) << 11) -#define G_028BDC_PERPENDICULAR_ENDCAP_ENA(x) (((x) >> 11) & 0x1) -#define C_028BDC_PERPENDICULAR_ENDCAP_ENA 0xFFFFF7FF -#define S_028BDC_DX10_DIAMOND_TEST_ENA(x) (((unsigned)(x) & 0x1) << 12) -#define G_028BDC_DX10_DIAMOND_TEST_ENA(x) (((x) >> 12) & 0x1) -#define C_028BDC_DX10_DIAMOND_TEST_ENA 0xFFFFEFFF -#define R_028BE0_PA_SC_AA_CONFIG 0x028BE0 -#define S_028BE0_MSAA_NUM_SAMPLES(x) (((unsigned)(x) & 0x7) << 0) -#define G_028BE0_MSAA_NUM_SAMPLES(x) (((x) >> 0) & 0x07) -#define C_028BE0_MSAA_NUM_SAMPLES 0xFFFFFFF8 -#define S_028BE0_AA_MASK_CENTROID_DTMN(x) (((unsigned)(x) & 0x1) << 4) -#define G_028BE0_AA_MASK_CENTROID_DTMN(x) (((x) >> 4) & 0x1) -#define C_028BE0_AA_MASK_CENTROID_DTMN 0xFFFFFFEF -#define S_028BE0_MAX_SAMPLE_DIST(x) (((unsigned)(x) & 0xf) << 13) -#define G_028BE0_MAX_SAMPLE_DIST(x) (((x) >> 13) & 0x0F) -#define C_028BE0_MAX_SAMPLE_DIST 0xFFFE1FFF -#define S_028BE0_MSAA_EXPOSED_SAMPLES(x) (((unsigned)(x) & 0x7) << 20) -#define G_028BE0_MSAA_EXPOSED_SAMPLES(x) (((x) >> 20) & 0x07) -#define C_028BE0_MSAA_EXPOSED_SAMPLES 0xFF8FFFFF -#define S_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((unsigned)(x) & 0x3) << 24) -#define G_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((x) >> 24) & 0x03) -#define C_028BE0_DETAIL_TO_EXPOSED_MODE 0xFCFFFFFF -#define R_028BE4_PA_SU_VTX_CNTL 0x028BE4 -#define S_028BE4_PIX_CENTER(x) (((unsigned)(x) & 0x1) << 0) -#define G_028BE4_PIX_CENTER(x) (((x) >> 0) & 0x1) -#define C_028BE4_PIX_CENTER 0xFFFFFFFE -#define S_028BE4_ROUND_MODE(x) (((unsigned)(x) & 0x03) << 1) -#define G_028BE4_ROUND_MODE(x) (((x) >> 1) & 0x03) -#define C_028BE4_ROUND_MODE 0xFFFFFFF9 -#define V_028BE4_X_TRUNCATE 0x00 -#define V_028BE4_X_ROUND 0x01 -#define V_028BE4_X_ROUND_TO_EVEN 0x02 -#define V_028BE4_X_ROUND_TO_ODD 0x03 -#define S_028BE4_QUANT_MODE(x) (((unsigned)(x) & 0x07) << 3) -#define G_028BE4_QUANT_MODE(x) (((x) >> 3) & 0x07) -#define C_028BE4_QUANT_MODE 0xFFFFFFC7 -#define V_028BE4_X_16_8_FIXED_POINT_1_16TH 0x00 -#define V_028BE4_X_16_8_FIXED_POINT_1_8TH 0x01 -#define V_028BE4_X_16_8_FIXED_POINT_1_4TH 0x02 -#define V_028BE4_X_16_8_FIXED_POINT_1_2 0x03 -#define V_028BE4_X_16_8_FIXED_POINT_1 0x04 -#define V_028BE4_X_16_8_FIXED_POINT_1_256TH 0x05 -#define V_028BE4_X_14_10_FIXED_POINT_1_1024TH 0x06 -#define V_028BE4_X_12_12_FIXED_POINT_1_4096TH 0x07 -#define R_028BE8_PA_CL_GB_VERT_CLIP_ADJ 0x028BE8 -#define R_028BEC_PA_CL_GB_VERT_DISC_ADJ 0x028BEC -#define R_028BF0_PA_CL_GB_HORZ_CLIP_ADJ 0x028BF0 -#define R_028BF4_PA_CL_GB_HORZ_DISC_ADJ 0x028BF4 -#define R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 0x028BF8 -#define S_028BF8_S0_X(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028BF8_S0_X(x) (((x) >> 0) & 0x0F) -#define C_028BF8_S0_X 0xFFFFFFF0 -#define S_028BF8_S0_Y(x) (((unsigned)(x) & 0x0F) << 4) -#define G_028BF8_S0_Y(x) (((x) >> 4) & 0x0F) -#define C_028BF8_S0_Y 0xFFFFFF0F -#define S_028BF8_S1_X(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028BF8_S1_X(x) (((x) >> 8) & 0x0F) -#define C_028BF8_S1_X 0xFFFFF0FF -#define S_028BF8_S1_Y(x) (((unsigned)(x) & 0x0F) << 12) -#define G_028BF8_S1_Y(x) (((x) >> 12) & 0x0F) -#define C_028BF8_S1_Y 0xFFFF0FFF -#define S_028BF8_S2_X(x) (((unsigned)(x) & 0x0F) << 16) -#define G_028BF8_S2_X(x) (((x) >> 16) & 0x0F) -#define C_028BF8_S2_X 0xFFF0FFFF -#define S_028BF8_S2_Y(x) (((unsigned)(x) & 0x0F) << 20) -#define G_028BF8_S2_Y(x) (((x) >> 20) & 0x0F) -#define C_028BF8_S2_Y 0xFF0FFFFF -#define S_028BF8_S3_X(x) (((unsigned)(x) & 0x0F) << 24) -#define G_028BF8_S3_X(x) (((x) >> 24) & 0x0F) -#define C_028BF8_S3_X 0xF0FFFFFF -#define S_028BF8_S3_Y(x) (((unsigned)(x) & 0x0F) << 28) -#define G_028BF8_S3_Y(x) (((x) >> 28) & 0x0F) -#define C_028BF8_S3_Y 0x0FFFFFFF -#define R_028BFC_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1 0x028BFC -#define S_028BFC_S4_X(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028BFC_S4_X(x) (((x) >> 0) & 0x0F) -#define C_028BFC_S4_X 0xFFFFFFF0 -#define S_028BFC_S4_Y(x) (((unsigned)(x) & 0x0F) << 4) -#define G_028BFC_S4_Y(x) (((x) >> 4) & 0x0F) -#define C_028BFC_S4_Y 0xFFFFFF0F -#define S_028BFC_S5_X(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028BFC_S5_X(x) (((x) >> 8) & 0x0F) -#define C_028BFC_S5_X 0xFFFFF0FF -#define S_028BFC_S5_Y(x) (((unsigned)(x) & 0x0F) << 12) -#define G_028BFC_S5_Y(x) (((x) >> 12) & 0x0F) -#define C_028BFC_S5_Y 0xFFFF0FFF -#define S_028BFC_S6_X(x) (((unsigned)(x) & 0x0F) << 16) -#define G_028BFC_S6_X(x) (((x) >> 16) & 0x0F) -#define C_028BFC_S6_X 0xFFF0FFFF -#define S_028BFC_S6_Y(x) (((unsigned)(x) & 0x0F) << 20) -#define G_028BFC_S6_Y(x) (((x) >> 20) & 0x0F) -#define C_028BFC_S6_Y 0xFF0FFFFF -#define S_028BFC_S7_X(x) (((unsigned)(x) & 0x0F) << 24) -#define G_028BFC_S7_X(x) (((x) >> 24) & 0x0F) -#define C_028BFC_S7_X 0xF0FFFFFF -#define S_028BFC_S7_Y(x) (((unsigned)(x) & 0x0F) << 28) -#define G_028BFC_S7_Y(x) (((x) >> 28) & 0x0F) -#define C_028BFC_S7_Y 0x0FFFFFFF -#define R_028C00_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2 0x028C00 -#define S_028C00_S8_X(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028C00_S8_X(x) (((x) >> 0) & 0x0F) -#define C_028C00_S8_X 0xFFFFFFF0 -#define S_028C00_S8_Y(x) (((unsigned)(x) & 0x0F) << 4) -#define G_028C00_S8_Y(x) (((x) >> 4) & 0x0F) -#define C_028C00_S8_Y 0xFFFFFF0F -#define S_028C00_S9_X(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028C00_S9_X(x) (((x) >> 8) & 0x0F) -#define C_028C00_S9_X 0xFFFFF0FF -#define S_028C00_S9_Y(x) (((unsigned)(x) & 0x0F) << 12) -#define G_028C00_S9_Y(x) (((x) >> 12) & 0x0F) -#define C_028C00_S9_Y 0xFFFF0FFF -#define S_028C00_S10_X(x) (((unsigned)(x) & 0x0F) << 16) -#define G_028C00_S10_X(x) (((x) >> 16) & 0x0F) -#define C_028C00_S10_X 0xFFF0FFFF -#define S_028C00_S10_Y(x) (((unsigned)(x) & 0x0F) << 20) -#define G_028C00_S10_Y(x) (((x) >> 20) & 0x0F) -#define C_028C00_S10_Y 0xFF0FFFFF -#define S_028C00_S11_X(x) (((unsigned)(x) & 0x0F) << 24) -#define G_028C00_S11_X(x) (((x) >> 24) & 0x0F) -#define C_028C00_S11_X 0xF0FFFFFF -#define S_028C00_S11_Y(x) (((unsigned)(x) & 0x0F) << 28) -#define G_028C00_S11_Y(x) (((x) >> 28) & 0x0F) -#define C_028C00_S11_Y 0x0FFFFFFF -#define R_028C04_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3 0x028C04 -#define S_028C04_S12_X(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028C04_S12_X(x) (((x) >> 0) & 0x0F) -#define C_028C04_S12_X 0xFFFFFFF0 -#define S_028C04_S12_Y(x) (((unsigned)(x) & 0x0F) << 4) -#define G_028C04_S12_Y(x) (((x) >> 4) & 0x0F) -#define C_028C04_S12_Y 0xFFFFFF0F -#define S_028C04_S13_X(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028C04_S13_X(x) (((x) >> 8) & 0x0F) -#define C_028C04_S13_X 0xFFFFF0FF -#define S_028C04_S13_Y(x) (((unsigned)(x) & 0x0F) << 12) -#define G_028C04_S13_Y(x) (((x) >> 12) & 0x0F) -#define C_028C04_S13_Y 0xFFFF0FFF -#define S_028C04_S14_X(x) (((unsigned)(x) & 0x0F) << 16) -#define G_028C04_S14_X(x) (((x) >> 16) & 0x0F) -#define C_028C04_S14_X 0xFFF0FFFF -#define S_028C04_S14_Y(x) (((unsigned)(x) & 0x0F) << 20) -#define G_028C04_S14_Y(x) (((x) >> 20) & 0x0F) -#define C_028C04_S14_Y 0xFF0FFFFF -#define S_028C04_S15_X(x) (((unsigned)(x) & 0x0F) << 24) -#define G_028C04_S15_X(x) (((x) >> 24) & 0x0F) -#define C_028C04_S15_X 0xF0FFFFFF -#define S_028C04_S15_Y(x) (((unsigned)(x) & 0x0F) << 28) -#define G_028C04_S15_Y(x) (((x) >> 28) & 0x0F) -#define C_028C04_S15_Y 0x0FFFFFFF -#define R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0 0x028C08 -#define S_028C08_S0_X(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028C08_S0_X(x) (((x) >> 0) & 0x0F) -#define C_028C08_S0_X 0xFFFFFFF0 -#define S_028C08_S0_Y(x) (((unsigned)(x) & 0x0F) << 4) -#define G_028C08_S0_Y(x) (((x) >> 4) & 0x0F) -#define C_028C08_S0_Y 0xFFFFFF0F -#define S_028C08_S1_X(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028C08_S1_X(x) (((x) >> 8) & 0x0F) -#define C_028C08_S1_X 0xFFFFF0FF -#define S_028C08_S1_Y(x) (((unsigned)(x) & 0x0F) << 12) -#define G_028C08_S1_Y(x) (((x) >> 12) & 0x0F) -#define C_028C08_S1_Y 0xFFFF0FFF -#define S_028C08_S2_X(x) (((unsigned)(x) & 0x0F) << 16) -#define G_028C08_S2_X(x) (((x) >> 16) & 0x0F) -#define C_028C08_S2_X 0xFFF0FFFF -#define S_028C08_S2_Y(x) (((unsigned)(x) & 0x0F) << 20) -#define G_028C08_S2_Y(x) (((x) >> 20) & 0x0F) -#define C_028C08_S2_Y 0xFF0FFFFF -#define S_028C08_S3_X(x) (((unsigned)(x) & 0x0F) << 24) -#define G_028C08_S3_X(x) (((x) >> 24) & 0x0F) -#define C_028C08_S3_X 0xF0FFFFFF -#define S_028C08_S3_Y(x) (((unsigned)(x) & 0x0F) << 28) -#define G_028C08_S3_Y(x) (((x) >> 28) & 0x0F) -#define C_028C08_S3_Y 0x0FFFFFFF -#define R_028C0C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1 0x028C0C -#define S_028C0C_S4_X(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028C0C_S4_X(x) (((x) >> 0) & 0x0F) -#define C_028C0C_S4_X 0xFFFFFFF0 -#define S_028C0C_S4_Y(x) (((unsigned)(x) & 0x0F) << 4) -#define G_028C0C_S4_Y(x) (((x) >> 4) & 0x0F) -#define C_028C0C_S4_Y 0xFFFFFF0F -#define S_028C0C_S5_X(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028C0C_S5_X(x) (((x) >> 8) & 0x0F) -#define C_028C0C_S5_X 0xFFFFF0FF -#define S_028C0C_S5_Y(x) (((unsigned)(x) & 0x0F) << 12) -#define G_028C0C_S5_Y(x) (((x) >> 12) & 0x0F) -#define C_028C0C_S5_Y 0xFFFF0FFF -#define S_028C0C_S6_X(x) (((unsigned)(x) & 0x0F) << 16) -#define G_028C0C_S6_X(x) (((x) >> 16) & 0x0F) -#define C_028C0C_S6_X 0xFFF0FFFF -#define S_028C0C_S6_Y(x) (((unsigned)(x) & 0x0F) << 20) -#define G_028C0C_S6_Y(x) (((x) >> 20) & 0x0F) -#define C_028C0C_S6_Y 0xFF0FFFFF -#define S_028C0C_S7_X(x) (((unsigned)(x) & 0x0F) << 24) -#define G_028C0C_S7_X(x) (((x) >> 24) & 0x0F) -#define C_028C0C_S7_X 0xF0FFFFFF -#define S_028C0C_S7_Y(x) (((unsigned)(x) & 0x0F) << 28) -#define G_028C0C_S7_Y(x) (((x) >> 28) & 0x0F) -#define C_028C0C_S7_Y 0x0FFFFFFF -#define R_028C10_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2 0x028C10 -#define S_028C10_S8_X(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028C10_S8_X(x) (((x) >> 0) & 0x0F) -#define C_028C10_S8_X 0xFFFFFFF0 -#define S_028C10_S8_Y(x) (((unsigned)(x) & 0x0F) << 4) -#define G_028C10_S8_Y(x) (((x) >> 4) & 0x0F) -#define C_028C10_S8_Y 0xFFFFFF0F -#define S_028C10_S9_X(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028C10_S9_X(x) (((x) >> 8) & 0x0F) -#define C_028C10_S9_X 0xFFFFF0FF -#define S_028C10_S9_Y(x) (((unsigned)(x) & 0x0F) << 12) -#define G_028C10_S9_Y(x) (((x) >> 12) & 0x0F) -#define C_028C10_S9_Y 0xFFFF0FFF -#define S_028C10_S10_X(x) (((unsigned)(x) & 0x0F) << 16) -#define G_028C10_S10_X(x) (((x) >> 16) & 0x0F) -#define C_028C10_S10_X 0xFFF0FFFF -#define S_028C10_S10_Y(x) (((unsigned)(x) & 0x0F) << 20) -#define G_028C10_S10_Y(x) (((x) >> 20) & 0x0F) -#define C_028C10_S10_Y 0xFF0FFFFF -#define S_028C10_S11_X(x) (((unsigned)(x) & 0x0F) << 24) -#define G_028C10_S11_X(x) (((x) >> 24) & 0x0F) -#define C_028C10_S11_X 0xF0FFFFFF -#define S_028C10_S11_Y(x) (((unsigned)(x) & 0x0F) << 28) -#define G_028C10_S11_Y(x) (((x) >> 28) & 0x0F) -#define C_028C10_S11_Y 0x0FFFFFFF -#define R_028C14_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3 0x028C14 -#define S_028C14_S12_X(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028C14_S12_X(x) (((x) >> 0) & 0x0F) -#define C_028C14_S12_X 0xFFFFFFF0 -#define S_028C14_S12_Y(x) (((unsigned)(x) & 0x0F) << 4) -#define G_028C14_S12_Y(x) (((x) >> 4) & 0x0F) -#define C_028C14_S12_Y 0xFFFFFF0F -#define S_028C14_S13_X(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028C14_S13_X(x) (((x) >> 8) & 0x0F) -#define C_028C14_S13_X 0xFFFFF0FF -#define S_028C14_S13_Y(x) (((unsigned)(x) & 0x0F) << 12) -#define G_028C14_S13_Y(x) (((x) >> 12) & 0x0F) -#define C_028C14_S13_Y 0xFFFF0FFF -#define S_028C14_S14_X(x) (((unsigned)(x) & 0x0F) << 16) -#define G_028C14_S14_X(x) (((x) >> 16) & 0x0F) -#define C_028C14_S14_X 0xFFF0FFFF -#define S_028C14_S14_Y(x) (((unsigned)(x) & 0x0F) << 20) -#define G_028C14_S14_Y(x) (((x) >> 20) & 0x0F) -#define C_028C14_S14_Y 0xFF0FFFFF -#define S_028C14_S15_X(x) (((unsigned)(x) & 0x0F) << 24) -#define G_028C14_S15_X(x) (((x) >> 24) & 0x0F) -#define C_028C14_S15_X 0xF0FFFFFF -#define S_028C14_S15_Y(x) (((unsigned)(x) & 0x0F) << 28) -#define G_028C14_S15_Y(x) (((x) >> 28) & 0x0F) -#define C_028C14_S15_Y 0x0FFFFFFF -#define R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0 0x028C18 -#define S_028C18_S0_X(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028C18_S0_X(x) (((x) >> 0) & 0x0F) -#define C_028C18_S0_X 0xFFFFFFF0 -#define S_028C18_S0_Y(x) (((unsigned)(x) & 0x0F) << 4) -#define G_028C18_S0_Y(x) (((x) >> 4) & 0x0F) -#define C_028C18_S0_Y 0xFFFFFF0F -#define S_028C18_S1_X(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028C18_S1_X(x) (((x) >> 8) & 0x0F) -#define C_028C18_S1_X 0xFFFFF0FF -#define S_028C18_S1_Y(x) (((unsigned)(x) & 0x0F) << 12) -#define G_028C18_S1_Y(x) (((x) >> 12) & 0x0F) -#define C_028C18_S1_Y 0xFFFF0FFF -#define S_028C18_S2_X(x) (((unsigned)(x) & 0x0F) << 16) -#define G_028C18_S2_X(x) (((x) >> 16) & 0x0F) -#define C_028C18_S2_X 0xFFF0FFFF -#define S_028C18_S2_Y(x) (((unsigned)(x) & 0x0F) << 20) -#define G_028C18_S2_Y(x) (((x) >> 20) & 0x0F) -#define C_028C18_S2_Y 0xFF0FFFFF -#define S_028C18_S3_X(x) (((unsigned)(x) & 0x0F) << 24) -#define G_028C18_S3_X(x) (((x) >> 24) & 0x0F) -#define C_028C18_S3_X 0xF0FFFFFF -#define S_028C18_S3_Y(x) (((unsigned)(x) & 0x0F) << 28) -#define G_028C18_S3_Y(x) (((x) >> 28) & 0x0F) -#define C_028C18_S3_Y 0x0FFFFFFF -#define R_028C1C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1 0x028C1C -#define S_028C1C_S4_X(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028C1C_S4_X(x) (((x) >> 0) & 0x0F) -#define C_028C1C_S4_X 0xFFFFFFF0 -#define S_028C1C_S4_Y(x) (((unsigned)(x) & 0x0F) << 4) -#define G_028C1C_S4_Y(x) (((x) >> 4) & 0x0F) -#define C_028C1C_S4_Y 0xFFFFFF0F -#define S_028C1C_S5_X(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028C1C_S5_X(x) (((x) >> 8) & 0x0F) -#define C_028C1C_S5_X 0xFFFFF0FF -#define S_028C1C_S5_Y(x) (((unsigned)(x) & 0x0F) << 12) -#define G_028C1C_S5_Y(x) (((x) >> 12) & 0x0F) -#define C_028C1C_S5_Y 0xFFFF0FFF -#define S_028C1C_S6_X(x) (((unsigned)(x) & 0x0F) << 16) -#define G_028C1C_S6_X(x) (((x) >> 16) & 0x0F) -#define C_028C1C_S6_X 0xFFF0FFFF -#define S_028C1C_S6_Y(x) (((unsigned)(x) & 0x0F) << 20) -#define G_028C1C_S6_Y(x) (((x) >> 20) & 0x0F) -#define C_028C1C_S6_Y 0xFF0FFFFF -#define S_028C1C_S7_X(x) (((unsigned)(x) & 0x0F) << 24) -#define G_028C1C_S7_X(x) (((x) >> 24) & 0x0F) -#define C_028C1C_S7_X 0xF0FFFFFF -#define S_028C1C_S7_Y(x) (((unsigned)(x) & 0x0F) << 28) -#define G_028C1C_S7_Y(x) (((x) >> 28) & 0x0F) -#define C_028C1C_S7_Y 0x0FFFFFFF -#define R_028C20_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2 0x028C20 -#define S_028C20_S8_X(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028C20_S8_X(x) (((x) >> 0) & 0x0F) -#define C_028C20_S8_X 0xFFFFFFF0 -#define S_028C20_S8_Y(x) (((unsigned)(x) & 0x0F) << 4) -#define G_028C20_S8_Y(x) (((x) >> 4) & 0x0F) -#define C_028C20_S8_Y 0xFFFFFF0F -#define S_028C20_S9_X(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028C20_S9_X(x) (((x) >> 8) & 0x0F) -#define C_028C20_S9_X 0xFFFFF0FF -#define S_028C20_S9_Y(x) (((unsigned)(x) & 0x0F) << 12) -#define G_028C20_S9_Y(x) (((x) >> 12) & 0x0F) -#define C_028C20_S9_Y 0xFFFF0FFF -#define S_028C20_S10_X(x) (((unsigned)(x) & 0x0F) << 16) -#define G_028C20_S10_X(x) (((x) >> 16) & 0x0F) -#define C_028C20_S10_X 0xFFF0FFFF -#define S_028C20_S10_Y(x) (((unsigned)(x) & 0x0F) << 20) -#define G_028C20_S10_Y(x) (((x) >> 20) & 0x0F) -#define C_028C20_S10_Y 0xFF0FFFFF -#define S_028C20_S11_X(x) (((unsigned)(x) & 0x0F) << 24) -#define G_028C20_S11_X(x) (((x) >> 24) & 0x0F) -#define C_028C20_S11_X 0xF0FFFFFF -#define S_028C20_S11_Y(x) (((unsigned)(x) & 0x0F) << 28) -#define G_028C20_S11_Y(x) (((x) >> 28) & 0x0F) -#define C_028C20_S11_Y 0x0FFFFFFF -#define R_028C24_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3 0x028C24 -#define S_028C24_S12_X(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028C24_S12_X(x) (((x) >> 0) & 0x0F) -#define C_028C24_S12_X 0xFFFFFFF0 -#define S_028C24_S12_Y(x) (((unsigned)(x) & 0x0F) << 4) -#define G_028C24_S12_Y(x) (((x) >> 4) & 0x0F) -#define C_028C24_S12_Y 0xFFFFFF0F -#define S_028C24_S13_X(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028C24_S13_X(x) (((x) >> 8) & 0x0F) -#define C_028C24_S13_X 0xFFFFF0FF -#define S_028C24_S13_Y(x) (((unsigned)(x) & 0x0F) << 12) -#define G_028C24_S13_Y(x) (((x) >> 12) & 0x0F) -#define C_028C24_S13_Y 0xFFFF0FFF -#define S_028C24_S14_X(x) (((unsigned)(x) & 0x0F) << 16) -#define G_028C24_S14_X(x) (((x) >> 16) & 0x0F) -#define C_028C24_S14_X 0xFFF0FFFF -#define S_028C24_S14_Y(x) (((unsigned)(x) & 0x0F) << 20) -#define G_028C24_S14_Y(x) (((x) >> 20) & 0x0F) -#define C_028C24_S14_Y 0xFF0FFFFF -#define S_028C24_S15_X(x) (((unsigned)(x) & 0x0F) << 24) -#define G_028C24_S15_X(x) (((x) >> 24) & 0x0F) -#define C_028C24_S15_X 0xF0FFFFFF -#define S_028C24_S15_Y(x) (((unsigned)(x) & 0x0F) << 28) -#define G_028C24_S15_Y(x) (((x) >> 28) & 0x0F) -#define C_028C24_S15_Y 0x0FFFFFFF -#define R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0 0x028C28 -#define S_028C28_S0_X(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028C28_S0_X(x) (((x) >> 0) & 0x0F) -#define C_028C28_S0_X 0xFFFFFFF0 -#define S_028C28_S0_Y(x) (((unsigned)(x) & 0x0F) << 4) -#define G_028C28_S0_Y(x) (((x) >> 4) & 0x0F) -#define C_028C28_S0_Y 0xFFFFFF0F -#define S_028C28_S1_X(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028C28_S1_X(x) (((x) >> 8) & 0x0F) -#define C_028C28_S1_X 0xFFFFF0FF -#define S_028C28_S1_Y(x) (((unsigned)(x) & 0x0F) << 12) -#define G_028C28_S1_Y(x) (((x) >> 12) & 0x0F) -#define C_028C28_S1_Y 0xFFFF0FFF -#define S_028C28_S2_X(x) (((unsigned)(x) & 0x0F) << 16) -#define G_028C28_S2_X(x) (((x) >> 16) & 0x0F) -#define C_028C28_S2_X 0xFFF0FFFF -#define S_028C28_S2_Y(x) (((unsigned)(x) & 0x0F) << 20) -#define G_028C28_S2_Y(x) (((x) >> 20) & 0x0F) -#define C_028C28_S2_Y 0xFF0FFFFF -#define S_028C28_S3_X(x) (((unsigned)(x) & 0x0F) << 24) -#define G_028C28_S3_X(x) (((x) >> 24) & 0x0F) -#define C_028C28_S3_X 0xF0FFFFFF -#define S_028C28_S3_Y(x) (((unsigned)(x) & 0x0F) << 28) -#define G_028C28_S3_Y(x) (((x) >> 28) & 0x0F) -#define C_028C28_S3_Y 0x0FFFFFFF -#define R_028C2C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1 0x028C2C -#define S_028C2C_S4_X(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028C2C_S4_X(x) (((x) >> 0) & 0x0F) -#define C_028C2C_S4_X 0xFFFFFFF0 -#define S_028C2C_S4_Y(x) (((unsigned)(x) & 0x0F) << 4) -#define G_028C2C_S4_Y(x) (((x) >> 4) & 0x0F) -#define C_028C2C_S4_Y 0xFFFFFF0F -#define S_028C2C_S5_X(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028C2C_S5_X(x) (((x) >> 8) & 0x0F) -#define C_028C2C_S5_X 0xFFFFF0FF -#define S_028C2C_S5_Y(x) (((unsigned)(x) & 0x0F) << 12) -#define G_028C2C_S5_Y(x) (((x) >> 12) & 0x0F) -#define C_028C2C_S5_Y 0xFFFF0FFF -#define S_028C2C_S6_X(x) (((unsigned)(x) & 0x0F) << 16) -#define G_028C2C_S6_X(x) (((x) >> 16) & 0x0F) -#define C_028C2C_S6_X 0xFFF0FFFF -#define S_028C2C_S6_Y(x) (((unsigned)(x) & 0x0F) << 20) -#define G_028C2C_S6_Y(x) (((x) >> 20) & 0x0F) -#define C_028C2C_S6_Y 0xFF0FFFFF -#define S_028C2C_S7_X(x) (((unsigned)(x) & 0x0F) << 24) -#define G_028C2C_S7_X(x) (((x) >> 24) & 0x0F) -#define C_028C2C_S7_X 0xF0FFFFFF -#define S_028C2C_S7_Y(x) (((unsigned)(x) & 0x0F) << 28) -#define G_028C2C_S7_Y(x) (((x) >> 28) & 0x0F) -#define C_028C2C_S7_Y 0x0FFFFFFF -#define R_028C30_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2 0x028C30 -#define S_028C30_S8_X(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028C30_S8_X(x) (((x) >> 0) & 0x0F) -#define C_028C30_S8_X 0xFFFFFFF0 -#define S_028C30_S8_Y(x) (((unsigned)(x) & 0x0F) << 4) -#define G_028C30_S8_Y(x) (((x) >> 4) & 0x0F) -#define C_028C30_S8_Y 0xFFFFFF0F -#define S_028C30_S9_X(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028C30_S9_X(x) (((x) >> 8) & 0x0F) -#define C_028C30_S9_X 0xFFFFF0FF -#define S_028C30_S9_Y(x) (((unsigned)(x) & 0x0F) << 12) -#define G_028C30_S9_Y(x) (((x) >> 12) & 0x0F) -#define C_028C30_S9_Y 0xFFFF0FFF -#define S_028C30_S10_X(x) (((unsigned)(x) & 0x0F) << 16) -#define G_028C30_S10_X(x) (((x) >> 16) & 0x0F) -#define C_028C30_S10_X 0xFFF0FFFF -#define S_028C30_S10_Y(x) (((unsigned)(x) & 0x0F) << 20) -#define G_028C30_S10_Y(x) (((x) >> 20) & 0x0F) -#define C_028C30_S10_Y 0xFF0FFFFF -#define S_028C30_S11_X(x) (((unsigned)(x) & 0x0F) << 24) -#define G_028C30_S11_X(x) (((x) >> 24) & 0x0F) -#define C_028C30_S11_X 0xF0FFFFFF -#define S_028C30_S11_Y(x) (((unsigned)(x) & 0x0F) << 28) -#define G_028C30_S11_Y(x) (((x) >> 28) & 0x0F) -#define C_028C30_S11_Y 0x0FFFFFFF -#define R_028C34_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3 0x028C34 -#define S_028C34_S12_X(x) (((unsigned)(x) & 0x0F) << 0) -#define G_028C34_S12_X(x) (((x) >> 0) & 0x0F) -#define C_028C34_S12_X 0xFFFFFFF0 -#define S_028C34_S12_Y(x) (((unsigned)(x) & 0x0F) << 4) -#define G_028C34_S12_Y(x) (((x) >> 4) & 0x0F) -#define C_028C34_S12_Y 0xFFFFFF0F -#define S_028C34_S13_X(x) (((unsigned)(x) & 0x0F) << 8) -#define G_028C34_S13_X(x) (((x) >> 8) & 0x0F) -#define C_028C34_S13_X 0xFFFFF0FF -#define S_028C34_S13_Y(x) (((unsigned)(x) & 0x0F) << 12) -#define G_028C34_S13_Y(x) (((x) >> 12) & 0x0F) -#define C_028C34_S13_Y 0xFFFF0FFF -#define S_028C34_S14_X(x) (((unsigned)(x) & 0x0F) << 16) -#define G_028C34_S14_X(x) (((x) >> 16) & 0x0F) -#define C_028C34_S14_X 0xFFF0FFFF -#define S_028C34_S14_Y(x) (((unsigned)(x) & 0x0F) << 20) -#define G_028C34_S14_Y(x) (((x) >> 20) & 0x0F) -#define C_028C34_S14_Y 0xFF0FFFFF -#define S_028C34_S15_X(x) (((unsigned)(x) & 0x0F) << 24) -#define G_028C34_S15_X(x) (((x) >> 24) & 0x0F) -#define C_028C34_S15_X 0xF0FFFFFF -#define S_028C34_S15_Y(x) (((unsigned)(x) & 0x0F) << 28) -#define G_028C34_S15_Y(x) (((x) >> 28) & 0x0F) -#define C_028C34_S15_Y 0x0FFFFFFF -#define R_028C38_PA_SC_AA_MASK_X0Y0_X1Y0 0x028C38 -#define S_028C38_AA_MASK_X0Y0(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_028C38_AA_MASK_X0Y0(x) (((x) >> 0) & 0xFFFF) -#define C_028C38_AA_MASK_X0Y0 0xFFFF0000 -#define S_028C38_AA_MASK_X1Y0(x) (((unsigned)(x) & 0xFFFF) << 16) -#define G_028C38_AA_MASK_X1Y0(x) (((x) >> 16) & 0xFFFF) -#define C_028C38_AA_MASK_X1Y0 0x0000FFFF -#define R_028C3C_PA_SC_AA_MASK_X0Y1_X1Y1 0x028C3C -#define S_028C3C_AA_MASK_X0Y1(x) (((unsigned)(x) & 0xFFFF) << 0) -#define G_028C3C_AA_MASK_X0Y1(x) (((x) >> 0) & 0xFFFF) -#define C_028C3C_AA_MASK_X0Y1 0xFFFF0000 -#define S_028C3C_AA_MASK_X1Y1(x) (((unsigned)(x) & 0xFFFF) << 16) -#define G_028C3C_AA_MASK_X1Y1(x) (((x) >> 16) & 0xFFFF) -#define C_028C3C_AA_MASK_X1Y1 0x0000FFFF -/* Stoney */ -#define R_028C40_PA_SC_SHADER_CONTROL 0x028C40 -#define S_028C40_REALIGN_DQUADS_AFTER_N_WAVES(x) (((unsigned)(x) & 0x03) << 0) -#define G_028C40_REALIGN_DQUADS_AFTER_N_WAVES(x) (((x) >> 0) & 0x03) -#define C_028C40_REALIGN_DQUADS_AFTER_N_WAVES 0xFFFFFFFC -/* */ -#define R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL 0x028C58 -#define S_028C58_VTX_REUSE_DEPTH(x) (((unsigned)(x) & 0xFF) << 0) -#define G_028C58_VTX_REUSE_DEPTH(x) (((x) >> 0) & 0xFF) -#define C_028C58_VTX_REUSE_DEPTH 0xFFFFFF00 -#define R_028C5C_VGT_OUT_DEALLOC_CNTL 0x028C5C -#define S_028C5C_DEALLOC_DIST(x) (((unsigned)(x) & 0x7F) << 0) -#define G_028C5C_DEALLOC_DIST(x) (((x) >> 0) & 0x7F) -#define C_028C5C_DEALLOC_DIST 0xFFFFFF80 -#define R_028C60_CB_COLOR0_BASE 0x028C60 -#define R_028C64_CB_COLOR0_PITCH 0x028C64 -#define S_028C64_TILE_MAX(x) (((unsigned)(x) & 0x7FF) << 0) -#define G_028C64_TILE_MAX(x) (((x) >> 0) & 0x7FF) -#define C_028C64_TILE_MAX 0xFFFFF800 -/* CIK */ -#define S_028C64_FMASK_TILE_MAX(x) (((unsigned)(x) & 0x7FF) << 20) -#define G_028C64_FMASK_TILE_MAX(x) (((x) >> 20) & 0x7FF) -#define C_028C64_FMASK_TILE_MAX 0x800FFFFF -/* */ -#define R_028C68_CB_COLOR0_SLICE 0x028C68 -#define S_028C68_TILE_MAX(x) (((unsigned)(x) & 0x3FFFFF) << 0) -#define G_028C68_TILE_MAX(x) (((x) >> 0) & 0x3FFFFF) -#define C_028C68_TILE_MAX 0xFFC00000 -#define R_028C6C_CB_COLOR0_VIEW 0x028C6C -#define S_028C6C_SLICE_START(x) (((unsigned)(x) & 0x7FF) << 0) -#define G_028C6C_SLICE_START(x) (((x) >> 0) & 0x7FF) -#define C_028C6C_SLICE_START 0xFFFFF800 -#define S_028C6C_SLICE_MAX(x) (((unsigned)(x) & 0x7FF) << 13) -#define G_028C6C_SLICE_MAX(x) (((x) >> 13) & 0x7FF) -#define C_028C6C_SLICE_MAX 0xFF001FFF -#define R_028C70_CB_COLOR0_INFO 0x028C70 -#define S_028C70_ENDIAN(x) (((unsigned)(x) & 0x03) << 0) -#define G_028C70_ENDIAN(x) (((x) >> 0) & 0x03) -#define C_028C70_ENDIAN 0xFFFFFFFC -#define V_028C70_ENDIAN_NONE 0x00 -#define V_028C70_ENDIAN_8IN16 0x01 -#define V_028C70_ENDIAN_8IN32 0x02 -#define V_028C70_ENDIAN_8IN64 0x03 -#define S_028C70_FORMAT(x) (((unsigned)(x) & 0x1F) << 2) -#define G_028C70_FORMAT(x) (((x) >> 2) & 0x1F) -#define C_028C70_FORMAT 0xFFFFFF83 -#define V_028C70_COLOR_INVALID 0x00 -#define V_028C70_COLOR_8 0x01 -#define V_028C70_COLOR_16 0x02 -#define V_028C70_COLOR_8_8 0x03 -#define V_028C70_COLOR_32 0x04 -#define V_028C70_COLOR_16_16 0x05 -#define V_028C70_COLOR_10_11_11 0x06 -#define V_028C70_COLOR_11_11_10 0x07 -#define V_028C70_COLOR_10_10_10_2 0x08 -#define V_028C70_COLOR_2_10_10_10 0x09 -#define V_028C70_COLOR_8_8_8_8 0x0A -#define V_028C70_COLOR_32_32 0x0B -#define V_028C70_COLOR_16_16_16_16 0x0C -#define V_028C70_COLOR_32_32_32_32 0x0E -#define V_028C70_COLOR_5_6_5 0x10 -#define V_028C70_COLOR_1_5_5_5 0x11 -#define V_028C70_COLOR_5_5_5_1 0x12 -#define V_028C70_COLOR_4_4_4_4 0x13 -#define V_028C70_COLOR_8_24 0x14 -#define V_028C70_COLOR_24_8 0x15 -#define V_028C70_COLOR_X24_8_32_FLOAT 0x16 -#define S_028C70_LINEAR_GENERAL(x) (((unsigned)(x) & 0x1) << 7) -#define G_028C70_LINEAR_GENERAL(x) (((x) >> 7) & 0x1) -#define C_028C70_LINEAR_GENERAL 0xFFFFFF7F -#define S_028C70_NUMBER_TYPE(x) (((unsigned)(x) & 0x07) << 8) -#define G_028C70_NUMBER_TYPE(x) (((x) >> 8) & 0x07) -#define C_028C70_NUMBER_TYPE 0xFFFFF8FF -#define V_028C70_NUMBER_UNORM 0x00 -#define V_028C70_NUMBER_SNORM 0x01 -#define V_028C70_NUMBER_UINT 0x04 -#define V_028C70_NUMBER_SINT 0x05 -#define V_028C70_NUMBER_SRGB 0x06 -#define V_028C70_NUMBER_FLOAT 0x07 -#define S_028C70_COMP_SWAP(x) (((unsigned)(x) & 0x03) << 11) -#define G_028C70_COMP_SWAP(x) (((x) >> 11) & 0x03) -#define C_028C70_COMP_SWAP 0xFFFFE7FF -#define V_028C70_SWAP_STD 0x00 -#define V_028C70_SWAP_ALT 0x01 -#define V_028C70_SWAP_STD_REV 0x02 -#define V_028C70_SWAP_ALT_REV 0x03 -#define S_028C70_FAST_CLEAR(x) (((unsigned)(x) & 0x1) << 13) -#define G_028C70_FAST_CLEAR(x) (((x) >> 13) & 0x1) -#define C_028C70_FAST_CLEAR 0xFFFFDFFF -#define S_028C70_COMPRESSION(x) (((unsigned)(x) & 0x1) << 14) -#define G_028C70_COMPRESSION(x) (((x) >> 14) & 0x1) -#define C_028C70_COMPRESSION 0xFFFFBFFF -#define S_028C70_BLEND_CLAMP(x) (((unsigned)(x) & 0x1) << 15) -#define G_028C70_BLEND_CLAMP(x) (((x) >> 15) & 0x1) -#define C_028C70_BLEND_CLAMP 0xFFFF7FFF -#define S_028C70_BLEND_BYPASS(x) (((unsigned)(x) & 0x1) << 16) -#define G_028C70_BLEND_BYPASS(x) (((x) >> 16) & 0x1) -#define C_028C70_BLEND_BYPASS 0xFFFEFFFF -#define S_028C70_SIMPLE_FLOAT(x) (((unsigned)(x) & 0x1) << 17) -#define G_028C70_SIMPLE_FLOAT(x) (((x) >> 17) & 0x1) -#define C_028C70_SIMPLE_FLOAT 0xFFFDFFFF -#define S_028C70_ROUND_MODE(x) (((unsigned)(x) & 0x1) << 18) -#define G_028C70_ROUND_MODE(x) (((x) >> 18) & 0x1) -#define C_028C70_ROUND_MODE 0xFFFBFFFF -#define S_028C70_CMASK_IS_LINEAR(x) (((unsigned)(x) & 0x1) << 19) -#define G_028C70_CMASK_IS_LINEAR(x) (((x) >> 19) & 0x1) -#define C_028C70_CMASK_IS_LINEAR 0xFFF7FFFF -#define S_028C70_BLEND_OPT_DONT_RD_DST(x) (((unsigned)(x) & 0x07) << 20) -#define G_028C70_BLEND_OPT_DONT_RD_DST(x) (((x) >> 20) & 0x07) -#define C_028C70_BLEND_OPT_DONT_RD_DST 0xFF8FFFFF -#define V_028C70_FORCE_OPT_AUTO 0x00 -#define V_028C70_FORCE_OPT_DISABLE 0x01 -#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_A_0 0x02 -#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_RGB_0 0x03 -#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_ARGB_0 0x04 -#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_A_1 0x05 -#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_RGB_1 0x06 -#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_ARGB_1 0x07 -#define S_028C70_BLEND_OPT_DISCARD_PIXEL(x) (((unsigned)(x) & 0x07) << 23) -#define G_028C70_BLEND_OPT_DISCARD_PIXEL(x) (((x) >> 23) & 0x07) -#define C_028C70_BLEND_OPT_DISCARD_PIXEL 0xFC7FFFFF -#define V_028C70_FORCE_OPT_AUTO 0x00 -#define V_028C70_FORCE_OPT_DISABLE 0x01 -#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_A_0 0x02 -#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_RGB_0 0x03 -#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_ARGB_0 0x04 -#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_A_1 0x05 -#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_RGB_1 0x06 -#define V_028C70_FORCE_OPT_ENABLE_IF_SRC_ARGB_1 0x07 -/* CIK */ -#define S_028C70_FMASK_COMPRESSION_DISABLE(x) (((unsigned)(x) & 0x1) << 26) -#define G_028C70_FMASK_COMPRESSION_DISABLE(x) (((x) >> 26) & 0x1) -#define C_028C70_FMASK_COMPRESSION_DISABLE 0xFBFFFFFF -/* */ -/* VI */ -#define S_028C70_FMASK_COMPRESS_1FRAG_ONLY(x) (((unsigned)(x) & 0x1) << 27) -#define G_028C70_FMASK_COMPRESS_1FRAG_ONLY(x) (((x) >> 27) & 0x1) -#define C_028C70_FMASK_COMPRESS_1FRAG_ONLY 0xF7FFFFFF -#define S_028C70_DCC_ENABLE(x) (((unsigned)(x) & 0x1) << 28) -#define G_028C70_DCC_ENABLE(x) (((x) >> 28) & 0x1) -#define C_028C70_DCC_ENABLE 0xEFFFFFFF -#define S_028C70_CMASK_ADDR_TYPE(x) (((unsigned)(x) & 0x03) << 29) -#define G_028C70_CMASK_ADDR_TYPE(x) (((x) >> 29) & 0x03) -#define C_028C70_CMASK_ADDR_TYPE 0x9FFFFFFF -/* */ -#define R_028C74_CB_COLOR0_ATTRIB 0x028C74 -#define S_028C74_TILE_MODE_INDEX(x) (((unsigned)(x) & 0x1F) << 0) -#define G_028C74_TILE_MODE_INDEX(x) (((x) >> 0) & 0x1F) -#define C_028C74_TILE_MODE_INDEX 0xFFFFFFE0 -#define S_028C74_FMASK_TILE_MODE_INDEX(x) (((unsigned)(x) & 0x1F) << 5) -#define G_028C74_FMASK_TILE_MODE_INDEX(x) (((x) >> 5) & 0x1F) -#define C_028C74_FMASK_TILE_MODE_INDEX 0xFFFFFC1F -#define S_028C74_FMASK_BANK_HEIGHT(x) (((unsigned)(x) & 0x03) << 10) -#define G_028C74_FMASK_BANK_HEIGHT(x) (((x) >> 10) & 0x03) -#define C_028C74_FMASK_BANK_HEIGHT 0xFFFFF3FF -#define S_028C74_NUM_SAMPLES(x) (((unsigned)(x) & 0x07) << 12) -#define G_028C74_NUM_SAMPLES(x) (((x) >> 12) & 0x07) -#define C_028C74_NUM_SAMPLES 0xFFFF8FFF -#define S_028C74_NUM_FRAGMENTS(x) (((unsigned)(x) & 0x03) << 15) -#define G_028C74_NUM_FRAGMENTS(x) (((x) >> 15) & 0x03) -#define C_028C74_NUM_FRAGMENTS 0xFFFE7FFF -#define S_028C74_FORCE_DST_ALPHA_1(x) (((unsigned)(x) & 0x1) << 17) -#define G_028C74_FORCE_DST_ALPHA_1(x) (((x) >> 17) & 0x1) -#define C_028C74_FORCE_DST_ALPHA_1 0xFFFDFFFF -/* VI */ -#define R_028C78_CB_COLOR0_DCC_CONTROL 0x028C78 -#define S_028C78_OVERWRITE_COMBINER_DISABLE(x) (((unsigned)(x) & 0x1) << 0) -#define G_028C78_OVERWRITE_COMBINER_DISABLE(x) (((x) >> 0) & 0x1) -#define C_028C78_OVERWRITE_COMBINER_DISABLE 0xFFFFFFFE -#define S_028C78_KEY_CLEAR_ENABLE(x) (((unsigned)(x) & 0x1) << 1) -#define G_028C78_KEY_CLEAR_ENABLE(x) (((x) >> 1) & 0x1) -#define C_028C78_KEY_CLEAR_ENABLE 0xFFFFFFFD -#define S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(x) (((unsigned)(x) & 0x03) << 2) -#define G_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(x) (((x) >> 2) & 0x03) -#define C_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE 0xFFFFFFF3 -#define S_028C78_MIN_COMPRESSED_BLOCK_SIZE(x) (((unsigned)(x) & 0x1) << 4) -#define G_028C78_MIN_COMPRESSED_BLOCK_SIZE(x) (((x) >> 4) & 0x1) -#define C_028C78_MIN_COMPRESSED_BLOCK_SIZE 0xFFFFFFEF -#define S_028C78_MAX_COMPRESSED_BLOCK_SIZE(x) (((unsigned)(x) & 0x03) << 5) -#define G_028C78_MAX_COMPRESSED_BLOCK_SIZE(x) (((x) >> 5) & 0x03) -#define C_028C78_MAX_COMPRESSED_BLOCK_SIZE 0xFFFFFF9F -#define S_028C78_COLOR_TRANSFORM(x) (((unsigned)(x) & 0x03) << 7) -#define G_028C78_COLOR_TRANSFORM(x) (((x) >> 7) & 0x03) -#define C_028C78_COLOR_TRANSFORM 0xFFFFFE7F -#define S_028C78_INDEPENDENT_64B_BLOCKS(x) (((unsigned)(x) & 0x1) << 9) -#define G_028C78_INDEPENDENT_64B_BLOCKS(x) (((x) >> 9) & 0x1) -#define C_028C78_INDEPENDENT_64B_BLOCKS 0xFFFFFDFF -#define S_028C78_LOSSY_RGB_PRECISION(x) (((unsigned)(x) & 0x0F) << 10) -#define G_028C78_LOSSY_RGB_PRECISION(x) (((x) >> 10) & 0x0F) -#define C_028C78_LOSSY_RGB_PRECISION 0xFFFFC3FF -#define S_028C78_LOSSY_ALPHA_PRECISION(x) (((unsigned)(x) & 0x0F) << 14) -#define G_028C78_LOSSY_ALPHA_PRECISION(x) (((x) >> 14) & 0x0F) -#define C_028C78_LOSSY_ALPHA_PRECISION 0xFFFC3FFF -/* */ -#define R_028C7C_CB_COLOR0_CMASK 0x028C7C -#define R_028C80_CB_COLOR0_CMASK_SLICE 0x028C80 -#define S_028C80_TILE_MAX(x) (((unsigned)(x) & 0x3FFF) << 0) -#define G_028C80_TILE_MAX(x) (((x) >> 0) & 0x3FFF) -#define C_028C80_TILE_MAX 0xFFFFC000 -#define R_028C84_CB_COLOR0_FMASK 0x028C84 -#define R_028C88_CB_COLOR0_FMASK_SLICE 0x028C88 -#define S_028C88_TILE_MAX(x) (((unsigned)(x) & 0x3FFFFF) << 0) -#define G_028C88_TILE_MAX(x) (((x) >> 0) & 0x3FFFFF) -#define C_028C88_TILE_MAX 0xFFC00000 -#define R_028C8C_CB_COLOR0_CLEAR_WORD0 0x028C8C -#define R_028C90_CB_COLOR0_CLEAR_WORD1 0x028C90 -#define R_028C94_CB_COLOR0_DCC_BASE 0x028C94 /* VI */ -#define R_028C9C_CB_COLOR1_BASE 0x028C9C -#define R_028CA0_CB_COLOR1_PITCH 0x028CA0 -#define R_028CA4_CB_COLOR1_SLICE 0x028CA4 -#define R_028CA8_CB_COLOR1_VIEW 0x028CA8 -#define R_028CAC_CB_COLOR1_INFO 0x028CAC -#define R_028CB0_CB_COLOR1_ATTRIB 0x028CB0 -#define R_028CB4_CB_COLOR1_DCC_CONTROL 0x028CB4 /* VI */ -#define R_028CB8_CB_COLOR1_CMASK 0x028CB8 -#define R_028CBC_CB_COLOR1_CMASK_SLICE 0x028CBC -#define R_028CC0_CB_COLOR1_FMASK 0x028CC0 -#define R_028CC4_CB_COLOR1_FMASK_SLICE 0x028CC4 -#define R_028CC8_CB_COLOR1_CLEAR_WORD0 0x028CC8 -#define R_028CCC_CB_COLOR1_CLEAR_WORD1 0x028CCC -#define R_028CD0_CB_COLOR1_DCC_BASE 0x028CD0 /* VI */ -#define R_028CD8_CB_COLOR2_BASE 0x028CD8 -#define R_028CDC_CB_COLOR2_PITCH 0x028CDC -#define R_028CE0_CB_COLOR2_SLICE 0x028CE0 -#define R_028CE4_CB_COLOR2_VIEW 0x028CE4 -#define R_028CE8_CB_COLOR2_INFO 0x028CE8 -#define R_028CEC_CB_COLOR2_ATTRIB 0x028CEC -#define R_028CF0_CB_COLOR2_DCC_CONTROL 0x028CF0 /* VI */ -#define R_028CF4_CB_COLOR2_CMASK 0x028CF4 -#define R_028CF8_CB_COLOR2_CMASK_SLICE 0x028CF8 -#define R_028CFC_CB_COLOR2_FMASK 0x028CFC -#define R_028D00_CB_COLOR2_FMASK_SLICE 0x028D00 -#define R_028D04_CB_COLOR2_CLEAR_WORD0 0x028D04 -#define R_028D08_CB_COLOR2_CLEAR_WORD1 0x028D08 -#define R_028D0C_CB_COLOR2_DCC_BASE 0x028D0C /* VI */ -#define R_028D14_CB_COLOR3_BASE 0x028D14 -#define R_028D18_CB_COLOR3_PITCH 0x028D18 -#define R_028D1C_CB_COLOR3_SLICE 0x028D1C -#define R_028D20_CB_COLOR3_VIEW 0x028D20 -#define R_028D24_CB_COLOR3_INFO 0x028D24 -#define R_028D28_CB_COLOR3_ATTRIB 0x028D28 -#define R_028D2C_CB_COLOR3_DCC_CONTROL 0x028D2C /* VI */ -#define R_028D30_CB_COLOR3_CMASK 0x028D30 -#define R_028D34_CB_COLOR3_CMASK_SLICE 0x028D34 -#define R_028D38_CB_COLOR3_FMASK 0x028D38 -#define R_028D3C_CB_COLOR3_FMASK_SLICE 0x028D3C -#define R_028D40_CB_COLOR3_CLEAR_WORD0 0x028D40 -#define R_028D44_CB_COLOR3_CLEAR_WORD1 0x028D44 -#define R_028D48_CB_COLOR3_DCC_BASE 0x028D48 /* VI */ -#define R_028D50_CB_COLOR4_BASE 0x028D50 -#define R_028D54_CB_COLOR4_PITCH 0x028D54 -#define R_028D58_CB_COLOR4_SLICE 0x028D58 -#define R_028D5C_CB_COLOR4_VIEW 0x028D5C -#define R_028D60_CB_COLOR4_INFO 0x028D60 -#define R_028D64_CB_COLOR4_ATTRIB 0x028D64 -#define R_028D68_CB_COLOR4_DCC_CONTROL 0x028D68 /* VI */ -#define R_028D6C_CB_COLOR4_CMASK 0x028D6C -#define R_028D70_CB_COLOR4_CMASK_SLICE 0x028D70 -#define R_028D74_CB_COLOR4_FMASK 0x028D74 -#define R_028D78_CB_COLOR4_FMASK_SLICE 0x028D78 -#define R_028D7C_CB_COLOR4_CLEAR_WORD0 0x028D7C -#define R_028D80_CB_COLOR4_CLEAR_WORD1 0x028D80 -#define R_028D84_CB_COLOR4_DCC_BASE 0x028D84 /* VI */ -#define R_028D8C_CB_COLOR5_BASE 0x028D8C -#define R_028D90_CB_COLOR5_PITCH 0x028D90 -#define R_028D94_CB_COLOR5_SLICE 0x028D94 -#define R_028D98_CB_COLOR5_VIEW 0x028D98 -#define R_028D9C_CB_COLOR5_INFO 0x028D9C -#define R_028DA0_CB_COLOR5_ATTRIB 0x028DA0 -#define R_028DA4_CB_COLOR5_DCC_CONTROL 0x028DA4 /* VI */ -#define R_028DA8_CB_COLOR5_CMASK 0x028DA8 -#define R_028DAC_CB_COLOR5_CMASK_SLICE 0x028DAC -#define R_028DB0_CB_COLOR5_FMASK 0x028DB0 -#define R_028DB4_CB_COLOR5_FMASK_SLICE 0x028DB4 -#define R_028DB8_CB_COLOR5_CLEAR_WORD0 0x028DB8 -#define R_028DBC_CB_COLOR5_CLEAR_WORD1 0x028DBC -#define R_028DC0_CB_COLOR5_DCC_BASE 0x028DC0 /* VI */ -#define R_028DC8_CB_COLOR6_BASE 0x028DC8 -#define R_028DCC_CB_COLOR6_PITCH 0x028DCC -#define R_028DD0_CB_COLOR6_SLICE 0x028DD0 -#define R_028DD4_CB_COLOR6_VIEW 0x028DD4 -#define R_028DD8_CB_COLOR6_INFO 0x028DD8 -#define R_028DDC_CB_COLOR6_ATTRIB 0x028DDC -#define R_028DE0_CB_COLOR6_DCC_CONTROL 0x028DE0 /* VI */ -#define R_028DE4_CB_COLOR6_CMASK 0x028DE4 -#define R_028DE8_CB_COLOR6_CMASK_SLICE 0x028DE8 -#define R_028DEC_CB_COLOR6_FMASK 0x028DEC -#define R_028DF0_CB_COLOR6_FMASK_SLICE 0x028DF0 -#define R_028DF4_CB_COLOR6_CLEAR_WORD0 0x028DF4 -#define R_028DF8_CB_COLOR6_CLEAR_WORD1 0x028DF8 -#define R_028DFC_CB_COLOR6_DCC_BASE 0x028DFC /* VI */ -#define R_028E04_CB_COLOR7_BASE 0x028E04 -#define R_028E08_CB_COLOR7_PITCH 0x028E08 -#define R_028E0C_CB_COLOR7_SLICE 0x028E0C -#define R_028E10_CB_COLOR7_VIEW 0x028E10 -#define R_028E14_CB_COLOR7_INFO 0x028E14 -#define R_028E18_CB_COLOR7_ATTRIB 0x028E18 -#define R_028E1C_CB_COLOR7_DCC_CONTROL 0x028E1C /* VI */ -#define R_028E20_CB_COLOR7_CMASK 0x028E20 -#define R_028E24_CB_COLOR7_CMASK_SLICE 0x028E24 -#define R_028E28_CB_COLOR7_FMASK 0x028E28 -#define R_028E2C_CB_COLOR7_FMASK_SLICE 0x028E2C -#define R_028E30_CB_COLOR7_CLEAR_WORD0 0x028E30 -#define R_028E34_CB_COLOR7_CLEAR_WORD1 0x028E34 -#define R_028E38_CB_COLOR7_DCC_BASE 0x028E38 /* VI */ - -/* SI async DMA packets */ -#define SI_DMA_PACKET(cmd, sub_cmd, n) ((((unsigned)(cmd) & 0xF) << 28) | \ - (((unsigned)(sub_cmd) & 0xFF) << 20) |\ - (((unsigned)(n) & 0xFFFFF) << 0)) -/* SI async DMA Packet types */ -#define SI_DMA_PACKET_WRITE 0x2 -#define SI_DMA_PACKET_COPY 0x3 -#define SI_DMA_COPY_MAX_SIZE 0xfffe0 -#define SI_DMA_COPY_MAX_SIZE_DW 0xffff8 -#define SI_DMA_COPY_DWORD_ALIGNED 0x00 -#define SI_DMA_COPY_BYTE_ALIGNED 0x40 -#define SI_DMA_COPY_TILED 0x8 -#define SI_DMA_PACKET_INDIRECT_BUFFER 0x4 -#define SI_DMA_PACKET_SEMAPHORE 0x5 -#define SI_DMA_PACKET_FENCE 0x6 -#define SI_DMA_PACKET_TRAP 0x7 -#define SI_DMA_PACKET_SRBM_WRITE 0x9 -#define SI_DMA_PACKET_CONSTANT_FILL 0xd -#define SI_DMA_PACKET_NOP 0xf - -/* CIK async DMA packets */ -#define CIK_SDMA_PACKET(op, sub_op, n) ((((unsigned)(n) & 0xFFFF) << 16) | \ - (((unsigned)(sub_op) & 0xFF) << 8) | \ - (((unsigned)(op) & 0xFF) << 0)) -/* CIK async DMA packet types */ -#define CIK_SDMA_OPCODE_NOP 0x0 -#define CIK_SDMA_OPCODE_COPY 0x1 -#define CIK_SDMA_COPY_SUB_OPCODE_LINEAR 0x0 -#define CIK_SDMA_COPY_SUB_OPCODE_TILED 0x1 -#define CIK_SDMA_COPY_SUB_OPCODE_SOA 0x3 -#define CIK_SDMA_COPY_SUB_OPCODE_LINEAR_SUB_WINDOW 0x4 -#define CIK_SDMA_COPY_SUB_OPCODE_TILED_SUB_WINDOW 0x5 -#define CIK_SDMA_COPY_SUB_OPCODE_T2T_SUB_WINDOW 0x6 -#define CIK_SDMA_OPCODE_WRITE 0x2 -#define SDMA_WRITE_SUB_OPCODE_LINEAR 0x0 -#define SDMA_WRTIE_SUB_OPCODE_TILED 0x1 -#define CIK_SDMA_OPCODE_INDIRECT_BUFFER 0x4 -#define CIK_SDMA_PACKET_FENCE 0x5 -#define CIK_SDMA_PACKET_TRAP 0x6 -#define CIK_SDMA_PACKET_SEMAPHORE 0x7 -#define CIK_SDMA_PACKET_CONSTANT_FILL 0xb -#define CIK_SDMA_PACKET_SRBM_WRITE 0xe -#define CIK_SDMA_COPY_MAX_SIZE 0x3fffe0 - -#endif /* _SID_H */ - diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/si_dma.c mesa-17.0.7/src/gallium/drivers/radeonsi/si_dma.c --- mesa-12.0.6/src/gallium/drivers/radeonsi/si_dma.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/si_dma.c 2017-06-01 10:37:10.000000000 +0000 @@ -26,7 +26,6 @@ #include "sid.h" #include "si_pipe.h" -#include "radeon/r600_cs.h" #include "util/u_format.h" @@ -38,7 +37,7 @@ uint64_t size) { struct radeon_winsys_cs *cs = ctx->b.dma.cs; - unsigned i, ncopy, csize, max_csize, sub_cmd, shift; + unsigned i, ncopy, count, max_size, sub_cmd, shift; struct r600_resource *rdst = (struct r600_resource*)dst; struct r600_resource *rsrc = (struct r600_resource*)src; @@ -51,33 +50,71 @@ dst_offset += rdst->gpu_address; src_offset += rsrc->gpu_address; - /* see if we use dword or byte copy */ + /* see whether we should use the dword-aligned or byte-aligned copy */ if (!(dst_offset % 4) && !(src_offset % 4) && !(size % 4)) { - size >>= 2; sub_cmd = SI_DMA_COPY_DWORD_ALIGNED; shift = 2; - max_csize = SI_DMA_COPY_MAX_SIZE_DW; + max_size = SI_DMA_COPY_MAX_DWORD_ALIGNED_SIZE; } else { sub_cmd = SI_DMA_COPY_BYTE_ALIGNED; shift = 0; - max_csize = SI_DMA_COPY_MAX_SIZE; + max_size = SI_DMA_COPY_MAX_BYTE_ALIGNED_SIZE; } - ncopy = (size / max_csize) + !!(size % max_csize); + ncopy = DIV_ROUND_UP(size, max_size); r600_need_dma_space(&ctx->b, ncopy * 5, rdst, rsrc); for (i = 0; i < ncopy; i++) { - csize = size < max_csize ? size : max_csize; - radeon_emit(cs, SI_DMA_PACKET(SI_DMA_PACKET_COPY, sub_cmd, csize)); + count = MIN2(size, max_size); + radeon_emit(cs, SI_DMA_PACKET(SI_DMA_PACKET_COPY, sub_cmd, + count >> shift)); radeon_emit(cs, dst_offset); radeon_emit(cs, src_offset); radeon_emit(cs, (dst_offset >> 32UL) & 0xff); radeon_emit(cs, (src_offset >> 32UL) & 0xff); - dst_offset += csize << shift; - src_offset += csize << shift; + dst_offset += count; + src_offset += count; + size -= count; + } +} + +static void si_dma_clear_buffer(struct pipe_context *ctx, + struct pipe_resource *dst, + uint64_t offset, + uint64_t size, + unsigned clear_value) +{ + struct si_context *sctx = (struct si_context *)ctx; + struct radeon_winsys_cs *cs = sctx->b.dma.cs; + unsigned i, ncopy, csize; + struct r600_resource *rdst = r600_resource(dst); + + if (!cs || offset % 4 != 0 || size % 4 != 0) { + ctx->clear_buffer(ctx, dst, offset, size, &clear_value, 4); + return; + } + + /* Mark the buffer range of destination as valid (initialized), + * so that transfer_map knows it should wait for the GPU when mapping + * that range. */ + util_range_add(&rdst->valid_buffer_range, offset, offset + size); + + offset += rdst->gpu_address; + + /* the same maximum size as for copying */ + ncopy = DIV_ROUND_UP(size, SI_DMA_COPY_MAX_DWORD_ALIGNED_SIZE); + r600_need_dma_space(&sctx->b, ncopy * 4, rdst, NULL); + + for (i = 0; i < ncopy; i++) { + csize = MIN2(size, SI_DMA_COPY_MAX_DWORD_ALIGNED_SIZE); + radeon_emit(cs, SI_DMA_PACKET(SI_DMA_PACKET_CONSTANT_FILL, 0, + csize / 4)); + radeon_emit(cs, offset); + radeon_emit(cs, clear_value); + radeon_emit(cs, (offset >> 32) << 16); + offset += csize; size -= csize; } - r600_dma_emit_wait_idle(&ctx->b); } static void si_dma_copy_tile(struct si_context *ctx, @@ -99,7 +136,6 @@ struct r600_texture *rsrc = (struct r600_texture*)src; struct r600_texture *rdst = (struct r600_texture*)dst; unsigned dst_mode = rdst->surface.level[dst_level].mode; - unsigned src_mode = rsrc->surface.level[src_level].mode; bool detile = dst_mode == RADEON_SURF_MODE_LINEAR_ALIGNED; struct r600_texture *rlinear = detile ? rdst : rsrc; struct r600_texture *rtiled = detile ? rsrc : rdst; @@ -115,7 +151,7 @@ uint64_t base, addr; unsigned pipe_config; - assert(dst_mode != src_mode); + assert(dst_mode != rsrc->surface.level[src_level].mode); sub_cmd = SI_DMA_COPY_TILED; lbpp = util_logbase2(bpp); @@ -154,17 +190,17 @@ pipe_config = G_009910_PIPE_CONFIG(tile_mode); mt = G_009910_MICRO_TILE_MODE(tile_mode); - size = (copy_height * pitch) / 4; - ncopy = (size / SI_DMA_COPY_MAX_SIZE_DW) + !!(size % SI_DMA_COPY_MAX_SIZE_DW); + size = copy_height * pitch; + ncopy = DIV_ROUND_UP(size, SI_DMA_COPY_MAX_DWORD_ALIGNED_SIZE); r600_need_dma_space(&ctx->b, ncopy * 9, &rdst->resource, &rsrc->resource); for (i = 0; i < ncopy; i++) { cheight = copy_height; - if (((cheight * pitch) / 4) > SI_DMA_COPY_MAX_SIZE_DW) { - cheight = (SI_DMA_COPY_MAX_SIZE_DW * 4) / pitch; + if (cheight * pitch > SI_DMA_COPY_MAX_DWORD_ALIGNED_SIZE) { + cheight = SI_DMA_COPY_MAX_DWORD_ALIGNED_SIZE / pitch; } - size = (cheight * pitch) / 4; - radeon_emit(cs, SI_DMA_PACKET(SI_DMA_PACKET_COPY, sub_cmd, size)); + size = cheight * pitch; + radeon_emit(cs, SI_DMA_PACKET(SI_DMA_PACKET_COPY, sub_cmd, size / 4)); radeon_emit(cs, base >> 8); radeon_emit(cs, (detile << 31) | (array_mode << 27) | (lbpp << 24) | (bank_h << 21) | @@ -179,7 +215,6 @@ addr += cheight * pitch; tiled_y += cheight; } - r600_dma_emit_wait_idle(&ctx->b); } static void si_dma_copy(struct pipe_context *ctx, @@ -233,18 +268,18 @@ dst_y = util_format_get_nblocksy(src->format, dst_y); bpp = rdst->surface.bpe; - dst_pitch = rdst->surface.level[dst_level].pitch_bytes; - src_pitch = rsrc->surface.level[src_level].pitch_bytes; - src_w = rsrc->surface.level[src_level].npix_x; - dst_w = rdst->surface.level[dst_level].npix_x; + dst_pitch = rdst->surface.level[dst_level].nblk_x * rdst->surface.bpe; + src_pitch = rsrc->surface.level[src_level].nblk_x * rsrc->surface.bpe; + src_w = u_minify(rsrc->resource.b.b.width0, src_level); + dst_w = u_minify(rdst->resource.b.b.width0, dst_level); dst_mode = rdst->surface.level[dst_level].mode; src_mode = rsrc->surface.level[src_level].mode; if (src_pitch != dst_pitch || src_box->x || dst_x || src_w != dst_w || src_box->width != src_w || - src_box->height != rsrc->surface.level[src_level].npix_y || - src_box->height != rdst->surface.level[dst_level].npix_y || + src_box->height != u_minify(rsrc->resource.b.b.height0, src_level) || + src_box->height != u_minify(rdst->resource.b.b.height0, dst_level) || rsrc->surface.level[src_level].nblk_y != rdst->surface.level[dst_level].nblk_y) { /* FIXME si can do partial blit */ @@ -289,4 +324,5 @@ void si_init_dma_functions(struct si_context *sctx) { sctx->b.dma_copy = si_dma_copy; + sctx->b.dma_clear_buffer = si_dma_clear_buffer; } diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/sid_tables.h mesa-17.0.7/src/gallium/drivers/radeonsi/sid_tables.h --- mesa-12.0.6/src/gallium/drivers/radeonsi/sid_tables.h 2017-01-24 01:43:35.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/sid_tables.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,7264 +0,0 @@ -/* This file is autogenerated by sid_tables.py from sid.h. Do not edit directly. */ - -/* - * Copyright 2015 Advanced Micro Devices, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * on the rights to use, copy, modify, merge, publish, distribute, sub - * license, and/or sell copies of the Software, and to permit persons to whom - * the Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - */ - -#ifndef SID_TABLES_H -#define SID_TABLES_H - -struct si_field { - unsigned name_offset; - unsigned mask; - unsigned num_values; - unsigned values_offset; /* offset into sid_strings_offsets */ -}; - -struct si_reg { - unsigned name_offset; - unsigned offset; - unsigned num_fields; - unsigned fields_offset; -}; - -struct si_packet3 { - unsigned name_offset; - unsigned op; -}; - -static const struct si_packet3 packet3_table[] = { - {0, PKT3_NOP}, - {4, PKT3_SET_BASE}, - {13, PKT3_CLEAR_STATE}, - {25, PKT3_INDEX_BUFFER_SIZE}, - {43, PKT3_DISPATCH_DIRECT}, - {59, PKT3_DISPATCH_INDIRECT}, - {77, PKT3_OCCLUSION_QUERY}, - {93, PKT3_SET_PREDICATION}, - {109, PKT3_COND_EXEC}, - {119, PKT3_PRED_EXEC}, - {129, PKT3_DRAW_INDIRECT}, - {143, PKT3_DRAW_INDEX_INDIRECT}, - {163, PKT3_INDEX_BASE}, - {174, PKT3_DRAW_INDEX_2}, - {187, PKT3_CONTEXT_CONTROL}, - {203, PKT3_INDEX_TYPE}, - {214, PKT3_DRAW_INDIRECT_MULTI}, - {234, PKT3_DRAW_INDEX_AUTO}, - {250, PKT3_DRAW_INDEX_IMMD}, - {266, PKT3_NUM_INSTANCES}, - {280, PKT3_DRAW_INDEX_MULTI_AUTO}, - {302, PKT3_INDIRECT_BUFFER_SI}, - {321, PKT3_STRMOUT_BUFFER_UPDATE}, - {343, PKT3_DRAW_INDEX_OFFSET_2}, - {363, PKT3_DRAW_PREAMBLE}, - {377, PKT3_WRITE_DATA}, - {388, PKT3_DRAW_INDEX_INDIRECT_MULTI}, - {414, PKT3_MEM_SEMAPHORE}, - {428, PKT3_MPEG_INDEX}, - {439, PKT3_WAIT_REG_MEM}, - {452, PKT3_MEM_WRITE}, - {462, PKT3_INDIRECT_BUFFER_CIK}, - {482, PKT3_COPY_DATA}, - {492, PKT3_PFP_SYNC_ME}, - {504, PKT3_SURFACE_SYNC}, - {517, PKT3_ME_INITIALIZE}, - {531, PKT3_COND_WRITE}, - {542, PKT3_EVENT_WRITE}, - {554, PKT3_EVENT_WRITE_EOP}, - {570, PKT3_EVENT_WRITE_EOS}, - {586, PKT3_ONE_REG_WRITE}, - {600, PKT3_ACQUIRE_MEM}, - {612, PKT3_SET_CONFIG_REG}, - {627, PKT3_SET_CONTEXT_REG}, - {643, PKT3_SET_SH_REG}, - {654, PKT3_SET_SH_REG_OFFSET}, - {672, PKT3_SET_UCONFIG_REG}, - {688, PKT3_LOAD_CONST_RAM}, - {703, PKT3_WRITE_CONST_RAM}, - {719, PKT3_DUMP_CONST_RAM}, - {734, PKT3_INCREMENT_CE_COUNTER}, - {755, PKT3_INCREMENT_DE_COUNTER}, - {776, PKT3_WAIT_ON_CE_COUNTER}, - {795, PKT3_IT_OPCODE_C}, - {807, PKT3_CP_DMA}, - {814, PKT3_DMA_DATA}, -}; - -static const struct si_field sid_fields_table[] = { - /* 0 */ - {833, S_370_ENGINE_SEL(~0u), 4, 0}, - {844, S_370_WR_CONFIRM(~0u)}, - {855, S_370_WR_ONE_ADDR(~0u)}, - {928, S_370_DST_SEL(~0u), 6, 4}, - /* 4 */ - {936, S_410_SRC_ADDR_LO(~0u)}, - /* 5 */ - {948, S_411_CP_SYNC(~0u)}, - {980, S_411_SRC_SEL(~0u), 4, 10}, - {988, S_411_ENGINE(~0u), 2, 0}, - {1019, S_411_DSL_SEL(~0u), 4, 14}, - {1027, S_411_SRC_ADDR_HI(~0u)}, - /* 10 */ - {1039, S_412_DST_ADDR_LO(~0u)}, - /* 11 */ - {1051, S_413_DST_ADDR_HI(~0u)}, - /* 12 */ - {1063, S_414_BYTE_COUNT(~0u)}, - {1074, S_414_DISABLE_WR_CONFIRM(~0u)}, - {1122, S_414_SRC_SWAP(~0u), 4, 18}, - {1131, S_414_DST_SWAP(~0u), 4, 18}, - {1147, S_414_SAS(~0u), 2, 22}, - {1151, S_414_DAS(~0u), 2, 22}, - {1178, S_414_SAIC(~0u), 2, 24}, - {1183, S_414_DAIC(~0u), 2, 24}, - {1188, S_414_RAW_WAIT(~0u)}, - /* 21 */ - {948, S_500_CP_SYNC(~0u)}, - {980, S_500_SRC_SEL(~0u), 4, 10}, - {1019, S_500_DSL_SEL(~0u), 4, 14}, - {988, S_500_ENGINE(~0u), 2, 0}, - /* 25 */ - {1197, S_000E4C_SDMA_RQ_PENDING(~0u)}, - {1213, S_000E4C_TST_RQ_PENDING(~0u)}, - {1228, S_000E4C_SDMA1_RQ_PENDING(~0u)}, - {1245, S_000E4C_VCE0_RQ_PENDING(~0u)}, - {1261, S_000E4C_VP8_BUSY(~0u)}, - {1270, S_000E4C_SDMA_BUSY(~0u)}, - {1280, S_000E4C_SDMA1_BUSY(~0u)}, - {1291, S_000E4C_VCE0_BUSY(~0u)}, - {1301, S_000E4C_XDMA_BUSY(~0u)}, - {1311, S_000E4C_CHUB_BUSY(~0u)}, - {1321, S_000E4C_SDMA2_BUSY(~0u)}, - {1332, S_000E4C_SDMA3_BUSY(~0u)}, - {1343, S_000E4C_SAMSCP_BUSY(~0u)}, - {1355, S_000E4C_ISP_BUSY(~0u)}, - {1364, S_000E4C_VCE1_BUSY(~0u)}, - {1374, S_000E4C_ODE_BUSY(~0u)}, - {1383, S_000E4C_SDMA2_RQ_PENDING(~0u)}, - {1400, S_000E4C_SDMA3_RQ_PENDING(~0u)}, - {1417, S_000E4C_SAMSCP_RQ_PENDING(~0u)}, - {1435, S_000E4C_ISP_RQ_PENDING(~0u)}, - {1450, S_000E4C_VCE1_RQ_PENDING(~0u)}, - /* 46 */ - {1466, S_000E50_UVD_RQ_PENDING(~0u)}, - {1481, S_000E50_SAMMSP_RQ_PENDING(~0u)}, - {1499, S_000E50_ACP_RQ_PENDING(~0u)}, - {1514, S_000E50_SMU_RQ_PENDING(~0u)}, - {1529, S_000E50_GRBM_RQ_PENDING(~0u)}, - {1545, S_000E50_HI_RQ_PENDING(~0u)}, - {1559, S_000E50_VMC_BUSY(~0u)}, - {1568, S_000E50_MCB_BUSY(~0u)}, - {1577, S_000E50_MCB_NON_DISPLAY_BUSY(~0u)}, - {1598, S_000E50_MCC_BUSY(~0u)}, - {1607, S_000E50_MCD_BUSY(~0u)}, - {1616, S_000E50_VMC1_BUSY(~0u)}, - {1626, S_000E50_SEM_BUSY(~0u)}, - {1635, S_000E50_ACP_BUSY(~0u)}, - {1644, S_000E50_IH_BUSY(~0u)}, - {1652, S_000E50_UVD_BUSY(~0u)}, - {1661, S_000E50_SAMMSP_BUSY(~0u)}, - {1673, S_000E50_GCATCL2_BUSY(~0u)}, - {1686, S_000E50_OSATCL2_BUSY(~0u)}, - {1699, S_000E50_BIF_BUSY(~0u)}, - /* 66 */ - {1708, S_000E54_MCC0_BUSY(~0u)}, - {1718, S_000E54_MCC1_BUSY(~0u)}, - {1728, S_000E54_MCC2_BUSY(~0u)}, - {1738, S_000E54_MCC3_BUSY(~0u)}, - {1748, S_000E54_MCC4_BUSY(~0u)}, - {1758, S_000E54_MCC5_BUSY(~0u)}, - {1768, S_000E54_MCC6_BUSY(~0u)}, - {1778, S_000E54_MCC7_BUSY(~0u)}, - {1788, S_000E54_MCD0_BUSY(~0u)}, - {1798, S_000E54_MCD1_BUSY(~0u)}, - {1808, S_000E54_MCD2_BUSY(~0u)}, - {1818, S_000E54_MCD3_BUSY(~0u)}, - {1828, S_000E54_MCD4_BUSY(~0u)}, - {1838, S_000E54_MCD5_BUSY(~0u)}, - {1848, S_000E54_MCD6_BUSY(~0u)}, - {1858, S_000E54_MCD7_BUSY(~0u)}, - /* 82 */ - {1868, S_00D034_IDLE(~0u)}, - {1873, S_00D034_REG_IDLE(~0u)}, - {1882, S_00D034_RB_EMPTY(~0u)}, - {1891, S_00D034_RB_FULL(~0u)}, - {1899, S_00D034_RB_CMD_IDLE(~0u)}, - {1911, S_00D034_RB_CMD_FULL(~0u)}, - {1923, S_00D034_IB_CMD_IDLE(~0u)}, - {1935, S_00D034_IB_CMD_FULL(~0u)}, - {1947, S_00D034_BLOCK_IDLE(~0u)}, - {1958, S_00D034_INSIDE_IB(~0u)}, - {1968, S_00D034_EX_IDLE(~0u)}, - {1976, S_00D034_EX_IDLE_POLL_TIMER_EXPIRE(~0u)}, - {2002, S_00D034_PACKET_READY(~0u)}, - {2015, S_00D034_MC_WR_IDLE(~0u)}, - {2026, S_00D034_SRBM_IDLE(~0u)}, - {2036, S_00D034_CONTEXT_EMPTY(~0u)}, - {2050, S_00D034_DELTA_RPTR_FULL(~0u)}, - {2066, S_00D034_RB_MC_RREQ_IDLE(~0u)}, - {2082, S_00D034_IB_MC_RREQ_IDLE(~0u)}, - {2098, S_00D034_MC_RD_IDLE(~0u)}, - {2109, S_00D034_DELTA_RPTR_EMPTY(~0u)}, - {2126, S_00D034_MC_RD_RET_STALL(~0u)}, - {2142, S_00D034_MC_RD_NO_POLL_IDLE(~0u)}, - {2161, S_00D034_PREV_CMD_IDLE(~0u)}, - {2175, S_00D034_SEM_IDLE(~0u)}, - {2184, S_00D034_SEM_REQ_STALL(~0u)}, - {2198, S_00D034_SEM_RESP_STATE(~0u)}, - {2213, S_00D034_INT_IDLE(~0u)}, - {2222, S_00D034_INT_REQ_STALL(~0u)}, - /* 111 */ - {2236, S_008008_ME0PIPE1_CMDFIFO_AVAIL(~0u)}, - {2259, S_008008_ME0PIPE1_CF_RQ_PENDING(~0u)}, - {2282, S_008008_ME0PIPE1_PF_RQ_PENDING(~0u)}, - {2305, S_008008_ME1PIPE0_RQ_PENDING(~0u)}, - {2325, S_008008_ME1PIPE1_RQ_PENDING(~0u)}, - {2345, S_008008_ME1PIPE2_RQ_PENDING(~0u)}, - {2365, S_008008_ME1PIPE3_RQ_PENDING(~0u)}, - {2385, S_008008_ME2PIPE0_RQ_PENDING(~0u)}, - {2405, S_008008_ME2PIPE1_RQ_PENDING(~0u)}, - {2425, S_008008_ME2PIPE2_RQ_PENDING(~0u)}, - {2445, S_008008_ME2PIPE3_RQ_PENDING(~0u)}, - {2465, S_008008_RLC_RQ_PENDING(~0u)}, - {2480, S_008008_RLC_BUSY(~0u)}, - {2489, S_008008_TC_BUSY(~0u)}, - {2497, S_008008_TCC_CC_RESIDENT(~0u)}, - {2513, S_008008_CPF_BUSY(~0u)}, - {2522, S_008008_CPC_BUSY(~0u)}, - {2531, S_008008_CPG_BUSY(~0u)}, - /* 129 */ - {2540, S_008010_ME0PIPE0_CMDFIFO_AVAIL(~0u)}, - {2563, S_008010_SRBM_RQ_PENDING(~0u)}, - {2579, S_008010_ME0PIPE0_CF_RQ_PENDING(~0u)}, - {2602, S_008010_ME0PIPE0_PF_RQ_PENDING(~0u)}, - {2625, S_008010_GDS_DMA_RQ_PENDING(~0u)}, - {2644, S_008010_DB_CLEAN(~0u)}, - {2653, S_008010_CB_CLEAN(~0u)}, - {2662, S_008010_TA_BUSY(~0u)}, - {2670, S_008010_GDS_BUSY(~0u)}, - {2679, S_008010_WD_BUSY_NO_DMA(~0u)}, - {2694, S_008010_VGT_BUSY(~0u)}, - {2703, S_008010_IA_BUSY_NO_DMA(~0u)}, - {2718, S_008010_IA_BUSY(~0u)}, - {2726, S_008010_SX_BUSY(~0u)}, - {2734, S_008010_WD_BUSY(~0u)}, - {2742, S_008010_SPI_BUSY(~0u)}, - {2751, S_008010_BCI_BUSY(~0u)}, - {2760, S_008010_SC_BUSY(~0u)}, - {2768, S_008010_PA_BUSY(~0u)}, - {2776, S_008010_DB_BUSY(~0u)}, - {2784, S_008010_CP_COHERENCY_BUSY(~0u)}, - {1347, S_008010_CP_BUSY(~0u)}, - {1569, S_008010_CB_BUSY(~0u)}, - {2802, S_008010_GUI_ACTIVE(~0u)}, - /* 153 */ - {2813, S_0084FC_OFFSET_UPDATE_DONE(~0u)}, - /* 154 */ - {2832, S_0085F0_DEST_BASE_0_ENA(~0u)}, - {2848, S_0085F0_DEST_BASE_1_ENA(~0u)}, - {2864, S_0085F0_CB0_DEST_BASE_ENA(~0u)}, - {2882, S_0085F0_CB1_DEST_BASE_ENA(~0u)}, - {2900, S_0085F0_CB2_DEST_BASE_ENA(~0u)}, - {2918, S_0085F0_CB3_DEST_BASE_ENA(~0u)}, - {2936, S_0085F0_CB4_DEST_BASE_ENA(~0u)}, - {2954, S_0085F0_CB5_DEST_BASE_ENA(~0u)}, - {2972, S_0085F0_CB6_DEST_BASE_ENA(~0u)}, - {2990, S_0085F0_CB7_DEST_BASE_ENA(~0u)}, - {3008, S_0085F0_DB_DEST_BASE_ENA(~0u)}, - {3025, S_0085F0_DEST_BASE_2_ENA(~0u)}, - {3041, S_0085F0_DEST_BASE_3_ENA(~0u)}, - {3057, S_0085F0_TCL1_ACTION_ENA(~0u)}, - {3073, S_0085F0_TC_ACTION_ENA(~0u)}, - {3087, S_0085F0_CB_ACTION_ENA(~0u)}, - {3101, S_0085F0_DB_ACTION_ENA(~0u)}, - {3115, S_0085F0_SH_KCACHE_ACTION_ENA(~0u)}, - {3136, S_0085F0_SH_ICACHE_ACTION_ENA(~0u)}, - /* 173 */ - {2644, S_008014_DB_CLEAN(~0u)}, - {2653, S_008014_CB_CLEAN(~0u)}, - {2751, S_008014_BCI_BUSY(~0u)}, - {2694, S_008014_VGT_BUSY(~0u)}, - {2768, S_008014_PA_BUSY(~0u)}, - {2662, S_008014_TA_BUSY(~0u)}, - {2726, S_008014_SX_BUSY(~0u)}, - {2742, S_008014_SPI_BUSY(~0u)}, - {2760, S_008014_SC_BUSY(~0u)}, - {2776, S_008014_DB_BUSY(~0u)}, - {1569, S_008014_CB_BUSY(~0u)}, - /* 184 */ - {2644, S_008018_DB_CLEAN(~0u)}, - {2653, S_008018_CB_CLEAN(~0u)}, - {2751, S_008018_BCI_BUSY(~0u)}, - {2694, S_008018_VGT_BUSY(~0u)}, - {2768, S_008018_PA_BUSY(~0u)}, - {2662, S_008018_TA_BUSY(~0u)}, - {2726, S_008018_SX_BUSY(~0u)}, - {2742, S_008018_SPI_BUSY(~0u)}, - {2760, S_008018_SC_BUSY(~0u)}, - {2776, S_008018_DB_BUSY(~0u)}, - {1569, S_008018_CB_BUSY(~0u)}, - /* 195 */ - {2644, S_008038_DB_CLEAN(~0u)}, - {2653, S_008038_CB_CLEAN(~0u)}, - {2751, S_008038_BCI_BUSY(~0u)}, - {2694, S_008038_VGT_BUSY(~0u)}, - {2768, S_008038_PA_BUSY(~0u)}, - {2662, S_008038_TA_BUSY(~0u)}, - {2726, S_008038_SX_BUSY(~0u)}, - {2742, S_008038_SPI_BUSY(~0u)}, - {2760, S_008038_SC_BUSY(~0u)}, - {2776, S_008038_DB_BUSY(~0u)}, - {1569, S_008038_CB_BUSY(~0u)}, - /* 206 */ - {2644, S_00803C_DB_CLEAN(~0u)}, - {2653, S_00803C_CB_CLEAN(~0u)}, - {2751, S_00803C_BCI_BUSY(~0u)}, - {2694, S_00803C_VGT_BUSY(~0u)}, - {2768, S_00803C_PA_BUSY(~0u)}, - {2662, S_00803C_TA_BUSY(~0u)}, - {2726, S_00803C_SX_BUSY(~0u)}, - {2742, S_00803C_SPI_BUSY(~0u)}, - {2760, S_00803C_SC_BUSY(~0u)}, - {2776, S_00803C_DB_BUSY(~0u)}, - {1569, S_00803C_CB_BUSY(~0u)}, - /* 217 */ - {2813, S_0300FC_OFFSET_UPDATE_DONE(~0u)}, - /* 218 */ - {3157, S_0301E4_COHER_BASE_HI_256B(~0u)}, - /* 219 */ - {3176, S_0301EC_START_DELAY_COUNT(~0u)}, - /* 220 */ - {2832, S_0301F0_DEST_BASE_0_ENA(~0u)}, - {2848, S_0301F0_DEST_BASE_1_ENA(~0u)}, - {3194, S_0301F0_TC_SD_ACTION_ENA(~0u)}, - {3211, S_0301F0_TC_NC_ACTION_ENA(~0u)}, - {2864, S_0301F0_CB0_DEST_BASE_ENA(~0u)}, - {2882, S_0301F0_CB1_DEST_BASE_ENA(~0u)}, - {2900, S_0301F0_CB2_DEST_BASE_ENA(~0u)}, - {2918, S_0301F0_CB3_DEST_BASE_ENA(~0u)}, - {2936, S_0301F0_CB4_DEST_BASE_ENA(~0u)}, - {2954, S_0301F0_CB5_DEST_BASE_ENA(~0u)}, - {2972, S_0301F0_CB6_DEST_BASE_ENA(~0u)}, - {2990, S_0301F0_CB7_DEST_BASE_ENA(~0u)}, - {3008, S_0301F0_DB_DEST_BASE_ENA(~0u)}, - {3228, S_0301F0_TCL1_VOL_ACTION_ENA(~0u)}, - {3248, S_0301F0_TC_VOL_ACTION_ENA(~0u)}, - {3266, S_0301F0_TC_WB_ACTION_ENA(~0u)}, - {3025, S_0301F0_DEST_BASE_2_ENA(~0u)}, - {3041, S_0301F0_DEST_BASE_3_ENA(~0u)}, - {3057, S_0301F0_TCL1_ACTION_ENA(~0u)}, - {3073, S_0301F0_TC_ACTION_ENA(~0u)}, - {3087, S_0301F0_CB_ACTION_ENA(~0u)}, - {3101, S_0301F0_DB_ACTION_ENA(~0u)}, - {3115, S_0301F0_SH_KCACHE_ACTION_ENA(~0u)}, - {3283, S_0301F0_SH_KCACHE_VOL_ACTION_ENA(~0u)}, - {3136, S_0301F0_SH_ICACHE_ACTION_ENA(~0u)}, - {3308, S_0301F0_SH_KCACHE_WB_ACTION_ENA(~0u)}, - {3332, S_0301F0_SH_SD_ACTION_ENA(~0u)}, - /* 247 */ - {3349, S_0301FC_MATCHING_GFX_CNTX(~0u)}, - {3367, S_0301FC_MEID(~0u)}, - {3372, S_0301FC_PHASE1_STATUS(~0u)}, - {3379, S_0301FC_STATUS(~0u)}, - /* 251 */ - {3386, S_008210_MEC1_BUSY(~0u)}, - {3396, S_008210_MEC2_BUSY(~0u)}, - {3406, S_008210_DC0_BUSY(~0u)}, - {3415, S_008210_DC1_BUSY(~0u)}, - {3424, S_008210_RCIU1_BUSY(~0u)}, - {3435, S_008210_RCIU2_BUSY(~0u)}, - {3446, S_008210_ROQ1_BUSY(~0u)}, - {3456, S_008210_ROQ2_BUSY(~0u)}, - {3466, S_008210_TCIU_BUSY(~0u)}, - {3476, S_008210_SCRATCH_RAM_BUSY(~0u)}, - {3493, S_008210_QU_BUSY(~0u)}, - {3501, S_008210_ATCL2IU_BUSY(~0u)}, - {3514, S_008210_CPG_CPC_BUSY(~0u)}, - {3527, S_008210_CPF_CPC_BUSY(~0u)}, - {2522, S_008210_CPC_BUSY(~0u)}, - /* 266 */ - {3540, S_008214_MEC1_LOAD_BUSY(~0u)}, - {3555, S_008214_MEC1_SEMAPOHRE_BUSY(~0u)}, - {3575, S_008214_MEC1_MUTEX_BUSY(~0u)}, - {3591, S_008214_MEC1_MESSAGE_BUSY(~0u)}, - {3609, S_008214_MEC1_EOP_QUEUE_BUSY(~0u)}, - {3629, S_008214_MEC1_IQ_QUEUE_BUSY(~0u)}, - {3648, S_008214_MEC1_IB_QUEUE_BUSY(~0u)}, - {3667, S_008214_MEC1_TC_BUSY(~0u)}, - {3680, S_008214_MEC1_DMA_BUSY(~0u)}, - {3694, S_008214_MEC1_PARTIAL_FLUSH_BUSY(~0u)}, - {3718, S_008214_MEC1_PIPE0_BUSY(~0u)}, - {3734, S_008214_MEC1_PIPE1_BUSY(~0u)}, - {3750, S_008214_MEC1_PIPE2_BUSY(~0u)}, - {3766, S_008214_MEC1_PIPE3_BUSY(~0u)}, - {3782, S_008214_MEC2_LOAD_BUSY(~0u)}, - {3797, S_008214_MEC2_SEMAPOHRE_BUSY(~0u)}, - {3817, S_008214_MEC2_MUTEX_BUSY(~0u)}, - {3833, S_008214_MEC2_MESSAGE_BUSY(~0u)}, - {3851, S_008214_MEC2_EOP_QUEUE_BUSY(~0u)}, - {3871, S_008214_MEC2_IQ_QUEUE_BUSY(~0u)}, - {3890, S_008214_MEC2_IB_QUEUE_BUSY(~0u)}, - {3909, S_008214_MEC2_TC_BUSY(~0u)}, - {3922, S_008214_MEC2_DMA_BUSY(~0u)}, - {3936, S_008214_MEC2_PARTIAL_FLUSH_BUSY(~0u)}, - {3960, S_008214_MEC2_PIPE0_BUSY(~0u)}, - {3976, S_008214_MEC2_PIPE1_BUSY(~0u)}, - {3992, S_008214_MEC2_PIPE2_BUSY(~0u)}, - {4008, S_008214_MEC2_PIPE3_BUSY(~0u)}, - /* 294 */ - {4024, S_008218_RCIU_TX_FREE_STALL(~0u)}, - {4043, S_008218_RCIU_PRIV_VIOLATION(~0u)}, - {4063, S_008218_TCIU_TX_FREE_STALL(~0u)}, - {4082, S_008218_MEC1_DECODING_PACKET(~0u)}, - {4103, S_008218_MEC1_WAIT_ON_RCIU(~0u)}, - {4121, S_008218_MEC1_WAIT_ON_RCIU_READ(~0u)}, - {4144, S_008218_MEC1_WAIT_ON_ROQ_DATA(~0u)}, - {4166, S_008218_MEC2_DECODING_PACKET(~0u)}, - {4187, S_008218_MEC2_WAIT_ON_RCIU(~0u)}, - {4205, S_008218_MEC2_WAIT_ON_RCIU_READ(~0u)}, - {4228, S_008218_MEC2_WAIT_ON_ROQ_DATA(~0u)}, - {4250, S_008218_ATCL2IU_WAITING_ON_FREE(~0u)}, - {4274, S_008218_ATCL2IU_WAITING_ON_TAGS(~0u)}, - {4298, S_008218_ATCL1_WAITING_ON_TRANS(~0u)}, - /* 308 */ - {4321, S_00821C_POST_WPTR_GFX_BUSY(~0u)}, - {4340, S_00821C_CSF_BUSY(~0u)}, - {4349, S_00821C_ROQ_ALIGN_BUSY(~0u)}, - {4364, S_00821C_ROQ_RING_BUSY(~0u)}, - {4378, S_00821C_ROQ_INDIRECT1_BUSY(~0u)}, - {4397, S_00821C_ROQ_INDIRECT2_BUSY(~0u)}, - {4416, S_00821C_ROQ_STATE_BUSY(~0u)}, - {4431, S_00821C_ROQ_CE_RING_BUSY(~0u)}, - {4448, S_00821C_ROQ_CE_INDIRECT1_BUSY(~0u)}, - {4470, S_00821C_ROQ_CE_INDIRECT2_BUSY(~0u)}, - {4492, S_00821C_SEMAPHORE_BUSY(~0u)}, - {4507, S_00821C_INTERRUPT_BUSY(~0u)}, - {3466, S_00821C_TCIU_BUSY(~0u)}, - {4522, S_00821C_HQD_BUSY(~0u)}, - {4531, S_00821C_PRT_BUSY(~0u)}, - {3501, S_00821C_ATCL2IU_BUSY(~0u)}, - {4540, S_00821C_CPF_GFX_BUSY(~0u)}, - {4553, S_00821C_CPF_CMP_BUSY(~0u)}, - {4566, S_00821C_GRBM_CPF_STAT_BUSY(~0u)}, - {4585, S_00821C_CPC_CPF_BUSY(~0u)}, - {2513, S_00821C_CPF_BUSY(~0u)}, - /* 329 */ - {4598, S_008220_REG_BUS_FIFO_BUSY(~0u)}, - {4616, S_008220_CSF_RING_BUSY(~0u)}, - {4630, S_008220_CSF_INDIRECT1_BUSY(~0u)}, - {4649, S_008220_CSF_INDIRECT2_BUSY(~0u)}, - {4668, S_008220_CSF_STATE_BUSY(~0u)}, - {4683, S_008220_CSF_CE_INDR1_BUSY(~0u)}, - {4701, S_008220_CSF_CE_INDR2_BUSY(~0u)}, - {4719, S_008220_CSF_ARBITER_BUSY(~0u)}, - {4736, S_008220_CSF_INPUT_BUSY(~0u)}, - {4751, S_008220_OUTSTANDING_READ_TAGS(~0u)}, - {4773, S_008220_HPD_PROCESSING_EOP_BUSY(~0u)}, - {4797, S_008220_HQD_DISPATCH_BUSY(~0u)}, - {4815, S_008220_HQD_IQ_TIMER_BUSY(~0u)}, - {4833, S_008220_HQD_DMA_OFFLOAD_BUSY(~0u)}, - {4854, S_008220_HQD_WAIT_SEMAPHORE_BUSY(~0u)}, - {4878, S_008220_HQD_SIGNAL_SEMAPHORE_BUSY(~0u)}, - {4904, S_008220_HQD_MESSAGE_BUSY(~0u)}, - {4921, S_008220_HQD_PQ_FETCHER_BUSY(~0u)}, - {4941, S_008220_HQD_IB_FETCHER_BUSY(~0u)}, - {4961, S_008220_HQD_IQ_FETCHER_BUSY(~0u)}, - {4981, S_008220_HQD_EOP_FETCHER_BUSY(~0u)}, - {5002, S_008220_HQD_CONSUMED_RPTR_BUSY(~0u)}, - {5025, S_008220_HQD_FETCHER_ARB_BUSY(~0u)}, - {5046, S_008220_HQD_ROQ_ALIGN_BUSY(~0u)}, - {5065, S_008220_HQD_ROQ_EOP_BUSY(~0u)}, - {5082, S_008220_HQD_ROQ_IQ_BUSY(~0u)}, - {5098, S_008220_HQD_ROQ_PQ_BUSY(~0u)}, - {5114, S_008220_HQD_ROQ_IB_BUSY(~0u)}, - {5130, S_008220_HQD_WPTR_POLL_BUSY(~0u)}, - {5149, S_008220_HQD_PQ_BUSY(~0u)}, - {5161, S_008220_HQD_IB_BUSY(~0u)}, - /* 360 */ - {5173, S_008224_RING_FETCHING_DATA(~0u)}, - {5192, S_008224_INDR1_FETCHING_DATA(~0u)}, - {5212, S_008224_INDR2_FETCHING_DATA(~0u)}, - {5232, S_008224_STATE_FETCHING_DATA(~0u)}, - {5252, S_008224_TCIU_WAITING_ON_FREE(~0u)}, - {5273, S_008224_TCIU_WAITING_ON_TAGS(~0u)}, - {4250, S_008224_ATCL2IU_WAITING_ON_FREE(~0u)}, - {4274, S_008224_ATCL2IU_WAITING_ON_TAGS(~0u)}, - {4298, S_008224_ATCL1_WAITING_ON_TRANS(~0u)}, - /* 369 */ - {5294, S_030230_COHER_SIZE_HI_256B(~0u)}, - /* 370 */ - {5313, S_0088B0_PRIM_COUNT(~0u)}, - /* 371 */ - {5324, S_0088C4_VS_NO_EXTRA_BUFFER(~0u)}, - {5343, S_0088C4_STREAMOUT_FULL_FLUSH(~0u)}, - {5364, S_0088C4_ES_LIMIT(~0u)}, - /* 374 */ - {5373, S_0088D4_VERT_REUSE(~0u)}, - /* 375 */ - {5900, S_008958_PRIM_TYPE(~0u), 29, 26}, - /* 376 */ - {203, S_00895C_INDEX_TYPE(~0u), 2, 55}, - /* 377 */ - {38, S_008988_SIZE(~0u)}, - /* 378 */ - {5952, S_0089B0_OFFCHIP_BUFFERING(~0u)}, - /* 379 */ - {5970, S_008A14_CLIP_VTX_REORDER_ENA(~0u)}, - {5991, S_008A14_NUM_CLIP_SEQ(~0u)}, - {6004, S_008A14_CLIPPED_PRIM_SEQ_STALL(~0u)}, - {6027, S_008A14_VE_NAN_PROC_DISABLE(~0u)}, - /* 383 */ - {6047, S_008A60_LINE_STIPPLE_VALUE(~0u)}, - /* 384 */ - {6066, S_008B10_CURRENT_PTR(~0u)}, - {6078, S_008B10_CURRENT_COUNT(~0u)}, - /* 386 */ - {6092, S_008670_CE_TO_CSF_NOT_RDY_TO_RCV(~0u)}, - {6117, S_008670_CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV(~0u)}, - {6155, S_008670_CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER(~0u)}, - {6196, S_008670_CE_TO_RAM_INIT_NOT_RDY(~0u)}, - {6219, S_008670_CE_TO_RAM_DUMP_NOT_RDY(~0u)}, - {6242, S_008670_CE_TO_RAM_WRITE_NOT_RDY(~0u)}, - {6266, S_008670_CE_TO_INC_FIFO_NOT_RDY_TO_RCV(~0u)}, - {6296, S_008670_CE_TO_WR_FIFO_NOT_RDY_TO_RCV(~0u)}, - {6325, S_008670_CE_WAITING_ON_BUFFER_DATA(~0u)}, - {6351, S_008670_CE_WAITING_ON_CE_BUFFER_FLAG(~0u)}, - {6380, S_008670_CE_WAITING_ON_DE_COUNTER(~0u)}, - {6405, S_008670_CE_WAITING_ON_DE_COUNTER_UNDERFLOW(~0u)}, - {5252, S_008670_TCIU_WAITING_ON_FREE(~0u)}, - {5273, S_008670_TCIU_WAITING_ON_TAGS(~0u)}, - {6440, S_008670_CE_STALLED_ON_TC_WR_CONFIRM(~0u)}, - {6468, S_008670_CE_STALLED_ON_ATOMIC_RTN_DATA(~0u)}, - {4250, S_008670_ATCL2IU_WAITING_ON_FREE(~0u)}, - {4274, S_008670_ATCL2IU_WAITING_ON_TAGS(~0u)}, - {4298, S_008670_ATCL1_WAITING_ON_TRANS(~0u)}, - /* 405 */ - {6498, S_008674_RBIU_TO_DMA_NOT_RDY_TO_RCV(~0u)}, - {6525, S_008674_RBIU_TO_SEM_NOT_RDY_TO_RCV(~0u)}, - {6552, S_008674_RBIU_TO_MEMWR_NOT_RDY_TO_RCV(~0u)}, - {6581, S_008674_ME_HAS_ACTIVE_CE_BUFFER_FLAG(~0u)}, - {6610, S_008674_ME_HAS_ACTIVE_DE_BUFFER_FLAG(~0u)}, - {6639, S_008674_ME_STALLED_ON_TC_WR_CONFIRM(~0u)}, - {6667, S_008674_ME_STALLED_ON_ATOMIC_RTN_DATA(~0u)}, - {6697, S_008674_ME_WAITING_ON_TC_READ_DATA(~0u)}, - {6724, S_008674_ME_WAITING_ON_REG_READ_DATA(~0u)}, - {6752, S_008674_RCIU_WAITING_ON_GDS_FREE(~0u)}, - {6777, S_008674_RCIU_WAITING_ON_GRBM_FREE(~0u)}, - {6803, S_008674_RCIU_WAITING_ON_VGT_FREE(~0u)}, - {6828, S_008674_RCIU_STALLED_ON_ME_READ(~0u)}, - {6852, S_008674_RCIU_STALLED_ON_DMA_READ(~0u)}, - {6877, S_008674_RCIU_STALLED_ON_APPEND_READ(~0u)}, - {6905, S_008674_RCIU_HALTED_BY_REG_VIOLATION(~0u)}, - /* 421 */ - {6934, S_008678_PFP_TO_CSF_NOT_RDY_TO_RCV(~0u)}, - {6960, S_008678_PFP_TO_MEQ_NOT_RDY_TO_RCV(~0u)}, - {6986, S_008678_PFP_TO_RCIU_NOT_RDY_TO_RCV(~0u)}, - {7013, S_008678_PFP_TO_VGT_WRITES_PENDING(~0u)}, - {7039, S_008678_PFP_RCIU_READ_PENDING(~0u)}, - {7061, S_008678_PFP_WAITING_ON_BUFFER_DATA(~0u)}, - {7088, S_008678_ME_WAIT_ON_CE_COUNTER(~0u)}, - {7110, S_008678_ME_WAIT_ON_AVAIL_BUFFER(~0u)}, - {7134, S_008678_GFX_CNTX_NOT_AVAIL_TO_ME(~0u)}, - {7159, S_008678_ME_RCIU_NOT_RDY_TO_RCV(~0u)}, - {7182, S_008678_ME_TO_CONST_NOT_RDY_TO_RCV(~0u)}, - {7209, S_008678_ME_WAITING_DATA_FROM_PFP(~0u)}, - {7234, S_008678_ME_WAITING_ON_PARTIAL_FLUSH(~0u)}, - {7262, S_008678_MEQ_TO_ME_NOT_RDY_TO_RCV(~0u)}, - {7287, S_008678_STQ_TO_ME_NOT_RDY_TO_RCV(~0u)}, - {7312, S_008678_ME_WAITING_DATA_FROM_STQ(~0u)}, - {7337, S_008678_PFP_STALLED_ON_TC_WR_CONFIRM(~0u)}, - {7366, S_008678_PFP_STALLED_ON_ATOMIC_RTN_DATA(~0u)}, - {7397, S_008678_EOPD_FIFO_NEEDS_SC_EOP_DONE(~0u)}, - {7425, S_008678_EOPD_FIFO_NEEDS_WR_CONFIRM(~0u)}, - {7452, S_008678_STRMO_WR_OF_PRIM_DATA_PENDING(~0u)}, - {7482, S_008678_PIPE_STATS_WR_DATA_PENDING(~0u)}, - {7509, S_008678_APPEND_RDY_WAIT_ON_CS_DONE(~0u)}, - {7536, S_008678_APPEND_RDY_WAIT_ON_PS_DONE(~0u)}, - {7563, S_008678_APPEND_WAIT_ON_WR_CONFIRM(~0u)}, - {7589, S_008678_APPEND_ACTIVE_PARTITION(~0u)}, - {7613, S_008678_APPEND_WAITING_TO_SEND_MEMWRITE(~0u)}, - {7645, S_008678_SURF_SYNC_NEEDS_IDLE_CNTXS(~0u)}, - {7672, S_008678_SURF_SYNC_NEEDS_ALL_CLEAN(~0u)}, - /* 450 */ - {4364, S_008680_ROQ_RING_BUSY(~0u)}, - {4378, S_008680_ROQ_INDIRECT1_BUSY(~0u)}, - {4397, S_008680_ROQ_INDIRECT2_BUSY(~0u)}, - {4416, S_008680_ROQ_STATE_BUSY(~0u)}, - {7698, S_008680_DC_BUSY(~0u)}, - {3501, S_008680_ATCL2IU_BUSY(~0u)}, - {7706, S_008680_PFP_BUSY(~0u)}, - {7715, S_008680_MEQ_BUSY(~0u)}, - {7724, S_008680_ME_BUSY(~0u)}, - {7732, S_008680_QUERY_BUSY(~0u)}, - {4492, S_008680_SEMAPHORE_BUSY(~0u)}, - {4507, S_008680_INTERRUPT_BUSY(~0u)}, - {7743, S_008680_SURFACE_SYNC_BUSY(~0u)}, - {1271, S_008680_DMA_BUSY(~0u)}, - {7761, S_008680_RCIU_BUSY(~0u)}, - {3476, S_008680_SCRATCH_RAM_BUSY(~0u)}, - {7771, S_008680_CPC_CPG_BUSY(~0u)}, - {7784, S_008680_CE_BUSY(~0u)}, - {3466, S_008680_TCIU_BUSY(~0u)}, - {4431, S_008680_ROQ_CE_RING_BUSY(~0u)}, - {4448, S_008680_ROQ_CE_INDIRECT1_BUSY(~0u)}, - {4470, S_008680_ROQ_CE_INDIRECT2_BUSY(~0u)}, - {1347, S_008680_CP_BUSY(~0u)}, - /* 473 */ - {7792, S_030800_INSTANCE_INDEX(~0u)}, - {7807, S_030800_SH_INDEX(~0u)}, - {7816, S_030800_SE_INDEX(~0u)}, - {7825, S_030800_SH_BROADCAST_WRITES(~0u)}, - {7845, S_030800_INSTANCE_BROADCAST_WRITES(~0u)}, - {7871, S_030800_SE_BROADCAST_WRITES(~0u)}, - /* 479 */ - {5900, S_030908_PRIM_TYPE(~0u), 29, 57}, - /* 480 */ - {203, S_03090C_INDEX_TYPE(~0u), 2, 55}, - /* 481 */ - {38, S_030938_SIZE(~0u)}, - /* 482 */ - {5952, S_03093C_OFFCHIP_BUFFERING(~0u)}, - {7939, S_03093C_OFFCHIP_GRANULARITY(~0u), 4, 86}, - /* 484 */ - {6047, S_030A00_LINE_STIPPLE_VALUE(~0u)}, - /* 485 */ - {6066, S_030A04_CURRENT_PTR(~0u)}, - {6078, S_030A04_CURRENT_COUNT(~0u)}, - /* 487 */ - {437, S_030A10_X(~0u)}, - {91, S_030A10_Y(~0u)}, - /* 489 */ - {437, S_030A14_X(~0u)}, - {91, S_030A14_Y(~0u)}, - /* 491 */ - {437, S_030A18_X(~0u)}, - {91, S_030A18_Y(~0u)}, - /* 493 */ - {437, S_030A2C_X(~0u)}, - {91, S_030A2C_Y(~0u)}, - /* 495 */ - {7959, S_008BF0_ENABLE_PA_SC_OUT_OF_ORDER(~0u)}, - {7985, S_008BF0_DISABLE_SC_DB_TILE_FIX(~0u)}, - {8008, S_008BF0_DISABLE_AA_MASK_FULL_FIX(~0u)}, - {8033, S_008BF0_ENABLE_1XMSAA_SAMPLE_LOCATIONS(~0u)}, - {8064, S_008BF0_ENABLE_1XMSAA_SAMPLE_LOC_CENTROID(~0u)}, - {8098, S_008BF0_DISABLE_SCISSOR_FIX(~0u)}, - {8118, S_008BF0_DISABLE_PW_BUBBLE_COLLAPSE(~0u)}, - {8145, S_008BF0_SEND_UNLIT_STILES_TO_PACKER(~0u)}, - {8173, S_008BF0_DISABLE_DUALGRAD_PERF_OPTIMIZATION(~0u)}, - /* 504 */ - {8208, S_008C08_INST_INVALIDATE(~0u)}, - {8224, S_008C08_DATA_INVALIDATE(~0u)}, - /* 506 */ - {8208, S_030D20_INST_INVALIDATE(~0u)}, - {8224, S_030D20_DATA_INVALIDATE(~0u)}, - {8240, S_030D20_INVALIDATE_VOLATILE(~0u)}, - /* 509 */ - {8260, S_008C0C_RET(~0u)}, - {8264, S_008C0C_RUI(~0u)}, - {8268, S_008C0C_RNG(~0u)}, - /* 512 */ - {8272, S_008DFC_EN(~0u)}, - {8334, S_008DFC_TGT(~0u), 33, 90}, - {8338, S_008DFC_COMPR(~0u)}, - {2827, S_008DFC_DONE(~0u)}, - {8344, S_008DFC_VM(~0u)}, - {8364, S_008DFC_ENCODING(~0u), 63, 123}, - /* 518 */ - {8373, S_030E04_ADDRESS(~0u)}, - /* 519 */ - {8381, S_030F04_COUNT_HI(~0u)}, - /* 520 */ - {8390, S_008F04_BASE_ADDRESS_HI(~0u)}, - {8406, S_008F04_STRIDE(~0u)}, - {8413, S_008F04_CACHE_SWIZZLE(~0u)}, - {8427, S_008F04_SWIZZLE_ENABLE(~0u)}, - /* 524 */ - {8381, S_030F0C_COUNT_HI(~0u)}, - /* 525 */ - {8532, S_008F0C_DST_SEL_X(~0u), 8, 186}, - {8542, S_008F0C_DST_SEL_Y(~0u), 8, 186}, - {8552, S_008F0C_DST_SEL_Z(~0u), 8, 186}, - {8562, S_008F0C_DST_SEL_W(~0u), 8, 186}, - {8746, S_008F0C_NUM_FORMAT(~0u), 8, 194}, - {9138, S_008F0C_DATA_FORMAT(~0u), 16, 202}, - {9150, S_008F0C_ELEMENT_SIZE(~0u)}, - {9163, S_008F0C_INDEX_STRIDE(~0u)}, - {9176, S_008F0C_ADD_TID_ENABLE(~0u)}, - {9191, S_008F0C_ATC(~0u)}, - {9195, S_008F0C_HASH_ENABLE(~0u)}, - {9207, S_008F0C_HEAP(~0u)}, - {9212, S_008F0C_MTYPE(~0u)}, - {209, S_008F0C_TYPE(~0u), 4, 218}, - /* 539 */ - {8381, S_030F14_COUNT_HI(~0u)}, - /* 540 */ - {8390, S_008F14_BASE_ADDRESS_HI(~0u)}, - {9287, S_008F14_MIN_LOD(~0u)}, - {9138, S_008F14_DATA_FORMAT(~0u), 64, 222}, - {8746, S_008F14_NUM_FORMAT(~0u), 16, 286}, - {9212, S_008F14_MTYPE(~0u)}, - /* 545 */ - {11277, S_008F18_WIDTH(~0u)}, - {11283, S_008F18_HEIGHT(~0u)}, - {11290, S_008F18_PERF_MOD(~0u)}, - {11299, S_008F18_INTERLACED(~0u)}, - /* 549 */ - {8381, S_030F1C_COUNT_HI(~0u)}, - /* 550 */ - {8532, S_008F1C_DST_SEL_X(~0u), 8, 186}, - {8542, S_008F1C_DST_SEL_Y(~0u), 8, 186}, - {8552, S_008F1C_DST_SEL_Z(~0u), 8, 186}, - {8562, S_008F1C_DST_SEL_W(~0u), 8, 186}, - {11310, S_008F1C_BASE_LEVEL(~0u)}, - {11321, S_008F1C_LAST_LEVEL(~0u)}, - {11332, S_008F1C_TILING_INDEX(~0u)}, - {11345, S_008F1C_POW2_PAD(~0u)}, - {9212, S_008F1C_MTYPE(~0u)}, - {9191, S_008F1C_ATC(~0u)}, - {209, S_008F1C_TYPE(~0u), 16, 302}, - /* 561 */ - {11656, S_008F20_DEPTH(~0u)}, - {11662, S_008F20_PITCH(~0u)}, - /* 563 */ - {11668, S_008F24_BASE_ARRAY(~0u)}, - {11679, S_008F24_LAST_ARRAY(~0u)}, - /* 565 */ - {11690, S_008F28_MIN_LOD_WARN(~0u)}, - {11703, S_008F28_COUNTER_BANK_ID(~0u)}, - {11719, S_008F28_LOD_HDW_CNT_EN(~0u)}, - {11734, S_008F28_COMPRESSION_EN(~0u)}, - {11749, S_008F28_ALPHA_IS_ON_MSB(~0u)}, - {11765, S_008F28_COLOR_TRANSFORM(~0u)}, - {11781, S_008F28_LOST_ALPHA_BITS(~0u)}, - {11797, S_008F28_LOST_COLOR_BITS(~0u)}, - /* 573 */ - {11995, S_008F30_CLAMP_X(~0u), 8, 318}, - {12003, S_008F30_CLAMP_Y(~0u), 8, 318}, - {12011, S_008F30_CLAMP_Z(~0u), 8, 318}, - {12019, S_008F30_MAX_ANISO_RATIO(~0u)}, - {12267, S_008F30_DEPTH_COMPARE_FUNC(~0u), 8, 326}, - {12286, S_008F30_FORCE_UNNORMALIZED(~0u)}, - {12305, S_008F30_MC_COORD_TRUNC(~0u)}, - {12320, S_008F30_FORCE_DEGAMMA(~0u)}, - {12334, S_008F30_TRUNC_COORD(~0u)}, - {12346, S_008F30_DISABLE_CUBE_WRAP(~0u)}, - {12364, S_008F30_FILTER_MODE(~0u)}, - {12376, S_008F30_COMPAT_MODE(~0u)}, - /* 585 */ - {9287, S_008F34_MIN_LOD(~0u)}, - {12388, S_008F34_MAX_LOD(~0u)}, - {12396, S_008F34_PERF_MIP(~0u)}, - {12405, S_008F34_PERF_Z(~0u)}, - /* 589 */ - {12412, S_008F38_LOD_BIAS(~0u)}, - {12421, S_008F38_LOD_BIAS_SEC(~0u)}, - {12483, S_008F38_XY_MAG_FILTER(~0u), 2, 334}, - {12558, S_008F38_XY_MIN_FILTER(~0u), 4, 336}, - {12638, S_008F38_Z_FILTER(~0u), 3, 340}, - {12647, S_008F38_MIP_FILTER(~0u), 3, 340}, - {12658, S_008F38_MIP_POINT_PRECLAMP(~0u)}, - {12677, S_008F38_DISABLE_LSB_CEIL(~0u)}, - {12694, S_008F38_FILTER_PREC_FIX(~0u)}, - {12710, S_008F38_ANISO_OVERRIDE(~0u)}, - /* 599 */ - {12725, S_008F3C_BORDER_COLOR_PTR(~0u)}, - {12869, S_008F3C_BORDER_COLOR_TYPE(~0u), 4, 343}, - /* 601 */ - {12887, S_0090DC_VS_LOW_THRESHOLD(~0u)}, - {12904, S_0090DC_GS_LOW_THRESHOLD(~0u)}, - {12921, S_0090DC_ES_LOW_THRESHOLD(~0u)}, - {12938, S_0090DC_HS_LOW_THRESHOLD(~0u)}, - {12955, S_0090DC_LS_LOW_THRESHOLD(~0u)}, - /* 606 */ - {12972, S_0090E0_PS_CU_EN(~0u)}, - {12981, S_0090E0_VS_CU_EN(~0u)}, - /* 608 */ - {12990, S_0090E4_GS_CU_EN(~0u)}, - {12999, S_0090E4_ES_CU_EN(~0u)}, - /* 610 */ - {13008, S_0090E8_LSHS_CU_EN(~0u)}, - /* 611 */ - {13019, S_0090EC_MAX_WAVE_ID(~0u)}, - /* 612 */ - {13019, S_0090E8_MAX_WAVE_ID(~0u)}, - /* 613 */ - {13036, S_0090F0_RING_ORDER_TS0(~0u), 1, 347}, - {13051, S_0090F0_RING_ORDER_TS1(~0u)}, - {13066, S_0090F0_RING_ORDER_TS2(~0u)}, - /* 616 */ - {13081, S_00C700_PIPE_ORDER_TS0(~0u)}, - {13096, S_00C700_PIPE_ORDER_TS1(~0u)}, - {13111, S_00C700_PIPE_ORDER_TS2(~0u)}, - {13126, S_00C700_PIPE_ORDER_TS3(~0u)}, - {13141, S_00C700_TS0_DUR_MULT(~0u)}, - {13154, S_00C700_TS1_DUR_MULT(~0u)}, - {13167, S_00C700_TS2_DUR_MULT(~0u)}, - {13180, S_00C700_TS3_DUR_MULT(~0u)}, - /* 624 */ - {13193, S_0090F4_TS0_DURATION(~0u)}, - {13206, S_0090F4_TS1_DURATION(~0u)}, - /* 626 */ - {13219, S_0090F8_TS2_DURATION(~0u)}, - /* 627 */ - {38, S_008F40_SIZE(~0u)}, - /* 628 */ - {665, S_008F44_OFFSET(~0u)}, - /* 629 */ - {8381, S_030FFC_COUNT_HI(~0u)}, - /* 630 */ - {13232, S_009100_GPR_WRITE_PRIORITY(~0u)}, - {13251, S_009100_EXP_PRIORITY_ORDER(~0u)}, - {13270, S_009100_ENABLE_SQG_TOP_EVENTS(~0u)}, - {13292, S_009100_ENABLE_SQG_BOP_EVENTS(~0u)}, - {13314, S_009100_RSRC_MGMT_RESET(~0u)}, - /* 635 */ - {13583, S_00913C_VTX_DONE_DELAY(~0u), 16, 348}, - {13598, S_00913C_INTERP_ONE_PRIM_PER_ROW(~0u)}, - {13622, S_00913C_PC_LIMIT_ENABLE(~0u)}, - {13638, S_00913C_PC_LIMIT_STRICT(~0u)}, - {13654, S_00913C_PC_LIMIT_SIZE(~0u)}, - /* 640 */ - {13668, S_00936C_TYPE_A(~0u)}, - {13675, S_00936C_VGPR_A(~0u)}, - {13682, S_00936C_SGPR_A(~0u)}, - {13689, S_00936C_LDS_A(~0u)}, - {13695, S_00936C_WAVES_A(~0u)}, - {13703, S_00936C_EN_A(~0u)}, - {13708, S_00936C_TYPE_B(~0u)}, - {13715, S_00936C_VGPR_B(~0u)}, - {13722, S_00936C_SGPR_B(~0u)}, - {13729, S_00936C_LDS_B(~0u)}, - {13735, S_00936C_WAVES_B(~0u)}, - {13743, S_00936C_EN_B(~0u)}, - /* 652 */ - {13748, S_009858_MSAA1_X(~0u)}, - {13756, S_009858_MSAA1_Y(~0u)}, - {13764, S_009858_MSAA2_X(~0u)}, - {13772, S_009858_MSAA2_Y(~0u)}, - {13780, S_009858_MSAA4_X(~0u)}, - {13788, S_009858_MSAA4_Y(~0u)}, - {13796, S_009858_MSAA8_X(~0u)}, - {13804, S_009858_MSAA8_Y(~0u)}, - {13812, S_009858_MSAA16_X(~0u)}, - {13821, S_009858_MSAA16_Y(~0u)}, - /* 662 */ - {13830, S_0098F8_NUM_PIPES(~0u)}, - {13840, S_0098F8_PIPE_INTERLEAVE_SIZE(~0u)}, - {13861, S_0098F8_BANK_INTERLEAVE_SIZE(~0u)}, - {13882, S_0098F8_NUM_SHADER_ENGINES(~0u)}, - {13901, S_0098F8_SHADER_ENGINE_TILE_SIZE(~0u)}, - {13925, S_0098F8_NUM_GPUS(~0u)}, - {13934, S_0098F8_MULTI_GPU_TILE_SIZE(~0u)}, - {13954, S_0098F8_ROW_SIZE(~0u)}, - {13963, S_0098F8_NUM_LOWER_PIPES(~0u)}, - /* 671 */ - {14096, S_009910_MICRO_TILE_MODE(~0u), 4, 364}, - {14341, S_009910_ARRAY_MODE(~0u), 16, 368}, - {14703, S_009910_PIPE_CONFIG(~0u), 15, 384}, - {14893, S_009910_TILE_SPLIT(~0u), 7, 399}, - {14996, S_009910_BANK_WIDTH(~0u), 4, 406}, - {15103, S_009910_BANK_HEIGHT(~0u), 4, 410}, - {15215, S_009910_MACRO_TILE_ASPECT(~0u), 4, 414}, - {15302, S_009910_NUM_BANKS(~0u), 4, 418}, - {15343, S_009910_MICRO_TILE_MODE_NEW(~0u), 4, 422}, - {15363, S_009910_SAMPLE_SPLIT(~0u)}, - /* 681 */ - {14996, S_009990_BANK_WIDTH(~0u)}, - {15103, S_009990_BANK_HEIGHT(~0u)}, - {15215, S_009990_MACRO_TILE_ASPECT(~0u)}, - {15302, S_009990_NUM_BANKS(~0u)}, - /* 685 */ - {15376, S_00B004_MEM_BASE(~0u)}, - /* 686 */ - {15376, S_00B00C_MEM_BASE(~0u)}, - /* 687 */ - {12975, S_00B01C_CU_EN(~0u)}, - {15385, S_00B01C_WAVE_LIMIT(~0u)}, - {15396, S_00B01C_LOCK_LOW_THRESHOLD(~0u)}, - /* 690 */ - {15376, S_00B024_MEM_BASE(~0u)}, - /* 691 */ - {15415, S_00B028_VGPRS(~0u)}, - {15421, S_00B028_SGPRS(~0u)}, - {13242, S_00B028_PRIORITY(~0u)}, - {15470, S_00B028_FLOAT_MODE(~0u), 241, 426}, - {15481, S_00B028_PRIV(~0u)}, - {15486, S_00B028_DX10_CLAMP(~0u)}, - {15497, S_00B028_DEBUG_MODE(~0u)}, - {15508, S_00B028_IEEE_MODE(~0u)}, - {15518, S_00B028_CU_GROUP_DISABLE(~0u)}, - {15535, S_00B028_CACHE_CTL(~0u)}, - {15545, S_00B028_CDBG_USER(~0u)}, - /* 702 */ - {15555, S_00B02C_SCRATCH_EN(~0u)}, - {15566, S_00B02C_USER_SGPR(~0u)}, - {15576, S_00B02C_TRAP_PRESENT(~0u)}, - {15589, S_00B02C_WAVE_CNT_EN(~0u)}, - {15601, S_00B02C_EXTRA_LDS_SIZE(~0u)}, - {15616, S_00B02C_EXCP_EN(~0u)}, - {15624, S_00B02C_EXCP_EN_CIK(~0u)}, - /* 709 */ - {15376, S_00B104_MEM_BASE(~0u)}, - /* 710 */ - {15376, S_00B10C_MEM_BASE(~0u)}, - /* 711 */ - {12975, S_00B118_CU_EN(~0u)}, - {15385, S_00B118_WAVE_LIMIT(~0u)}, - {15396, S_00B118_LOCK_LOW_THRESHOLD(~0u)}, - /* 714 */ - {5367, S_00B11C_LIMIT(~0u)}, - /* 715 */ - {15376, S_00B124_MEM_BASE(~0u)}, - /* 716 */ - {15415, S_00B128_VGPRS(~0u)}, - {15421, S_00B128_SGPRS(~0u)}, - {13242, S_00B128_PRIORITY(~0u)}, - {15470, S_00B128_FLOAT_MODE(~0u)}, - {15481, S_00B128_PRIV(~0u)}, - {15486, S_00B128_DX10_CLAMP(~0u)}, - {15497, S_00B128_DEBUG_MODE(~0u)}, - {15508, S_00B128_IEEE_MODE(~0u)}, - {15636, S_00B128_VGPR_COMP_CNT(~0u)}, - {15650, S_00B128_CU_GROUP_ENABLE(~0u)}, - {15535, S_00B128_CACHE_CTL(~0u)}, - {15545, S_00B128_CDBG_USER(~0u)}, - /* 728 */ - {15555, S_00B12C_SCRATCH_EN(~0u)}, - {15566, S_00B12C_USER_SGPR(~0u)}, - {15576, S_00B12C_TRAP_PRESENT(~0u)}, - {15666, S_00B12C_OC_LDS_EN(~0u)}, - {15676, S_00B12C_SO_BASE0_EN(~0u)}, - {15688, S_00B12C_SO_BASE1_EN(~0u)}, - {15700, S_00B12C_SO_BASE2_EN(~0u)}, - {15712, S_00B12C_SO_BASE3_EN(~0u)}, - {15724, S_00B12C_SO_EN(~0u)}, - {15616, S_00B12C_EXCP_EN(~0u)}, - {15624, S_00B12C_EXCP_EN_CIK(~0u)}, - {15730, S_00B12C_DISPATCH_DRAW_EN(~0u)}, - /* 740 */ - {15376, S_00B204_MEM_BASE(~0u)}, - /* 741 */ - {15376, S_00B20C_MEM_BASE(~0u)}, - /* 742 */ - {12975, S_00B21C_CU_EN(~0u)}, - {15385, S_00B21C_WAVE_LIMIT(~0u)}, - {15396, S_00B21C_LOCK_LOW_THRESHOLD(~0u)}, - {15747, S_00B21C_GROUP_FIFO_DEPTH(~0u)}, - /* 746 */ - {15376, S_00B224_MEM_BASE(~0u)}, - /* 747 */ - {15415, S_00B228_VGPRS(~0u)}, - {15421, S_00B228_SGPRS(~0u)}, - {13242, S_00B228_PRIORITY(~0u)}, - {15470, S_00B228_FLOAT_MODE(~0u)}, - {15481, S_00B228_PRIV(~0u)}, - {15486, S_00B228_DX10_CLAMP(~0u)}, - {15497, S_00B228_DEBUG_MODE(~0u)}, - {15508, S_00B228_IEEE_MODE(~0u)}, - {15650, S_00B228_CU_GROUP_ENABLE(~0u)}, - {15535, S_00B228_CACHE_CTL(~0u)}, - {15545, S_00B228_CDBG_USER(~0u)}, - /* 758 */ - {15555, S_00B22C_SCRATCH_EN(~0u)}, - {15566, S_00B22C_USER_SGPR(~0u)}, - {15576, S_00B22C_TRAP_PRESENT(~0u)}, - {15616, S_00B22C_EXCP_EN(~0u)}, - {15624, S_00B22C_EXCP_EN_CIK(~0u)}, - /* 763 */ - {15376, S_00B304_MEM_BASE(~0u)}, - /* 764 */ - {15376, S_00B30C_MEM_BASE(~0u)}, - /* 765 */ - {12975, S_00B31C_CU_EN(~0u)}, - {15385, S_00B31C_WAVE_LIMIT(~0u)}, - {15396, S_00B31C_LOCK_LOW_THRESHOLD(~0u)}, - {15747, S_00B31C_GROUP_FIFO_DEPTH(~0u)}, - /* 769 */ - {15376, S_00B324_MEM_BASE(~0u)}, - /* 770 */ - {15415, S_00B328_VGPRS(~0u)}, - {15421, S_00B328_SGPRS(~0u)}, - {13242, S_00B328_PRIORITY(~0u)}, - {15470, S_00B328_FLOAT_MODE(~0u)}, - {15481, S_00B328_PRIV(~0u)}, - {15486, S_00B328_DX10_CLAMP(~0u)}, - {15497, S_00B328_DEBUG_MODE(~0u)}, - {15508, S_00B328_IEEE_MODE(~0u)}, - {15636, S_00B328_VGPR_COMP_CNT(~0u)}, - {15650, S_00B328_CU_GROUP_ENABLE(~0u)}, - {15535, S_00B328_CACHE_CTL(~0u)}, - {15545, S_00B328_CDBG_USER(~0u)}, - /* 782 */ - {15555, S_00B32C_SCRATCH_EN(~0u)}, - {15566, S_00B32C_USER_SGPR(~0u)}, - {15576, S_00B32C_TRAP_PRESENT(~0u)}, - {15666, S_00B32C_OC_LDS_EN(~0u)}, - {15616, S_00B32C_EXCP_EN(~0u)}, - {15607, S_00B32C_LDS_SIZE(~0u)}, - /* 788 */ - {15376, S_00B404_MEM_BASE(~0u)}, - /* 789 */ - {15376, S_00B40C_MEM_BASE(~0u)}, - /* 790 */ - {15385, S_00B41C_WAVE_LIMIT(~0u)}, - {15396, S_00B41C_LOCK_LOW_THRESHOLD(~0u)}, - {15747, S_00B41C_GROUP_FIFO_DEPTH(~0u)}, - /* 793 */ - {15376, S_00B424_MEM_BASE(~0u)}, - /* 794 */ - {15415, S_00B428_VGPRS(~0u)}, - {15421, S_00B428_SGPRS(~0u)}, - {13242, S_00B428_PRIORITY(~0u)}, - {15470, S_00B428_FLOAT_MODE(~0u)}, - {15481, S_00B428_PRIV(~0u)}, - {15486, S_00B428_DX10_CLAMP(~0u)}, - {15497, S_00B428_DEBUG_MODE(~0u)}, - {15508, S_00B428_IEEE_MODE(~0u)}, - {15535, S_00B428_CACHE_CTL(~0u)}, - {15545, S_00B428_CDBG_USER(~0u)}, - /* 804 */ - {15555, S_00B42C_SCRATCH_EN(~0u)}, - {15566, S_00B42C_USER_SGPR(~0u)}, - {15576, S_00B42C_TRAP_PRESENT(~0u)}, - {15666, S_00B42C_OC_LDS_EN(~0u)}, - {15764, S_00B42C_TG_SIZE_EN(~0u)}, - {15616, S_00B42C_EXCP_EN(~0u)}, - /* 810 */ - {15376, S_00B504_MEM_BASE(~0u)}, - /* 811 */ - {15376, S_00B50C_MEM_BASE(~0u)}, - /* 812 */ - {12975, S_00B51C_CU_EN(~0u)}, - {15385, S_00B51C_WAVE_LIMIT(~0u)}, - {15396, S_00B51C_LOCK_LOW_THRESHOLD(~0u)}, - {15747, S_00B51C_GROUP_FIFO_DEPTH(~0u)}, - /* 816 */ - {15376, S_00B524_MEM_BASE(~0u)}, - /* 817 */ - {15415, S_00B528_VGPRS(~0u)}, - {15421, S_00B528_SGPRS(~0u)}, - {13242, S_00B528_PRIORITY(~0u)}, - {15470, S_00B528_FLOAT_MODE(~0u)}, - {15481, S_00B528_PRIV(~0u)}, - {15486, S_00B528_DX10_CLAMP(~0u)}, - {15497, S_00B528_DEBUG_MODE(~0u)}, - {15508, S_00B528_IEEE_MODE(~0u)}, - {15636, S_00B528_VGPR_COMP_CNT(~0u)}, - {15535, S_00B528_CACHE_CTL(~0u)}, - {15545, S_00B528_CDBG_USER(~0u)}, - /* 828 */ - {15555, S_00B52C_SCRATCH_EN(~0u)}, - {15566, S_00B52C_USER_SGPR(~0u)}, - {15576, S_00B52C_TRAP_PRESENT(~0u)}, - {15607, S_00B52C_LDS_SIZE(~0u)}, - {15616, S_00B52C_EXCP_EN(~0u)}, - /* 833 */ - {15775, S_00B800_COMPUTE_SHADER_EN(~0u)}, - {15793, S_00B800_PARTIAL_TG_EN(~0u)}, - {15807, S_00B800_FORCE_START_AT_000(~0u)}, - {15826, S_00B800_ORDERED_APPEND_ENBL(~0u)}, - {15846, S_00B800_ORDERED_APPEND_MODE(~0u)}, - {15866, S_00B800_USE_THREAD_DIMENSIONS(~0u)}, - {15888, S_00B800_ORDER_MODE(~0u)}, - {15899, S_00B800_DISPATCH_CACHE_CNTL(~0u)}, - {15919, S_00B800_SCALAR_L1_INV_VOL(~0u)}, - {15937, S_00B800_VECTOR_L1_INV_VOL(~0u)}, - {15955, S_00B800_DATA_ATC(~0u)}, - {15964, S_00B800_RESTORE(~0u)}, - /* 845 */ - {15972, S_00B81C_NUM_THREAD_FULL(~0u)}, - {15988, S_00B81C_NUM_THREAD_PARTIAL(~0u)}, - /* 847 */ - {15972, S_00B820_NUM_THREAD_FULL(~0u)}, - {15988, S_00B820_NUM_THREAD_PARTIAL(~0u)}, - /* 849 */ - {15972, S_00B824_NUM_THREAD_FULL(~0u)}, - {15988, S_00B824_NUM_THREAD_PARTIAL(~0u)}, - /* 851 */ - {13019, S_00B82C_MAX_WAVE_ID(~0u)}, - /* 852 */ - {16007, S_00B828_PIPELINESTAT_ENABLE(~0u)}, - /* 853 */ - {16027, S_00B82C_PERFCOUNT_ENABLE(~0u)}, - /* 854 */ - {383, S_00B834_DATA(~0u)}, - {16044, S_00B834_INST_ATC(~0u)}, - /* 856 */ - {383, S_00B83C_DATA(~0u)}, - /* 857 */ - {383, S_00B844_DATA(~0u)}, - /* 858 */ - {15415, S_00B848_VGPRS(~0u)}, - {15421, S_00B848_SGPRS(~0u)}, - {13242, S_00B848_PRIORITY(~0u)}, - {15470, S_00B848_FLOAT_MODE(~0u)}, - {15481, S_00B848_PRIV(~0u)}, - {15486, S_00B848_DX10_CLAMP(~0u)}, - {15497, S_00B848_DEBUG_MODE(~0u)}, - {15508, S_00B848_IEEE_MODE(~0u)}, - {16053, S_00B848_BULKY(~0u)}, - {15545, S_00B848_CDBG_USER(~0u)}, - /* 868 */ - {15555, S_00B84C_SCRATCH_EN(~0u)}, - {15566, S_00B84C_USER_SGPR(~0u)}, - {15576, S_00B84C_TRAP_PRESENT(~0u)}, - {16059, S_00B84C_TGID_X_EN(~0u)}, - {16069, S_00B84C_TGID_Y_EN(~0u)}, - {16079, S_00B84C_TGID_Z_EN(~0u)}, - {15764, S_00B84C_TG_SIZE_EN(~0u)}, - {16089, S_00B84C_TIDIG_COMP_CNT(~0u)}, - {16104, S_00B84C_EXCP_EN_MSB(~0u)}, - {15607, S_00B84C_LDS_SIZE(~0u)}, - {15616, S_00B84C_EXCP_EN(~0u)}, - /* 879 */ - {383, S_00B850_DATA(~0u)}, - /* 880 */ - {16116, S_00B854_WAVES_PER_SH(~0u)}, - {16129, S_00B854_WAVES_PER_SH_CIK(~0u)}, - {16146, S_00B854_TG_PER_CU(~0u)}, - {16156, S_00B854_LOCK_THRESHOLD(~0u)}, - {16171, S_00B854_SIMD_DEST_CNTL(~0u)}, - {16186, S_00B854_FORCE_SIMD_DIST(~0u)}, - {16202, S_00B854_CU_GROUP_COUNT(~0u)}, - /* 887 */ - {16217, S_00B858_SH0_CU_EN(~0u)}, - {16227, S_00B858_SH1_CU_EN(~0u)}, - /* 889 */ - {16217, S_00B85C_SH0_CU_EN(~0u)}, - {16227, S_00B85C_SH1_CU_EN(~0u)}, - /* 891 */ - {16237, S_00B860_WAVES(~0u)}, - {16243, S_00B860_WAVESIZE(~0u)}, - /* 893 */ - {16217, S_00B864_SH0_CU_EN(~0u)}, - {16227, S_00B864_SH1_CU_EN(~0u)}, - /* 895 */ - {16217, S_00B868_SH0_CU_EN(~0u)}, - {16227, S_00B868_SH1_CU_EN(~0u)}, - /* 897 */ - {16252, S_00B87C_SEND_SEID(~0u)}, - {14424, S_00B87C_RESERVED2(~0u)}, - {16262, S_00B87C_RESERVED3(~0u)}, - {16272, S_00B87C_RESERVED4(~0u)}, - {16282, S_00B87C_WAVE_ID_BASE(~0u)}, - /* 902 */ - {16295, S_00B888_PAYLOAD(~0u)}, - {16303, S_00B888_IS_EVENT(~0u)}, - {16312, S_00B888_IS_STATE(~0u)}, - /* 905 */ - {862, S_00B890_ADDR(~0u)}, - /* 906 */ - {9191, S_00B894_ATC(~0u)}, - {9212, S_00B894_MTYPE(~0u)}, - /* 908 */ - {16321, S_034404_PERFCOUNTER_HI(~0u)}, - /* 909 */ - {16336, S_036004_PERF_SEL2(~0u)}, - {16346, S_036004_PERF_SEL3(~0u)}, - /* 911 */ - {16356, S_036008_PERF_SEL(~0u)}, - {16365, S_036008_PERF_SEL1(~0u)}, - {16375, S_036008_CNTR_MODE(~0u)}, - /* 914 */ - {16336, S_036010_PERF_SEL2(~0u)}, - {16346, S_036010_PERF_SEL3(~0u)}, - /* 916 */ - {16336, S_036018_PERF_SEL2(~0u)}, - {16346, S_036018_PERF_SEL3(~0u)}, - /* 918 */ - {16356, S_03601C_PERF_SEL(~0u)}, - {16365, S_03601C_PERF_SEL1(~0u)}, - {16375, S_03601C_CNTR_MODE(~0u)}, - /* 921 */ - {16432, S_036020_PERFMON_STATE(~0u), 3, 667}, - {16446, S_036020_SPM_PERFMON_STATE(~0u)}, - {16464, S_036020_PERFMON_ENABLE_MODE(~0u)}, - {16484, S_036020_PERFMON_SAMPLE_ENABLE(~0u)}, - /* 925 */ - {16356, S_036024_PERF_SEL(~0u)}, - {16365, S_036024_PERF_SEL1(~0u)}, - {16375, S_036024_CNTR_MODE(~0u)}, - /* 928 */ - {16356, S_036100_PERF_SEL(~0u)}, - {16506, S_036100_DB_CLEAN_USER_DEFINED_MASK(~0u)}, - {16533, S_036100_CB_CLEAN_USER_DEFINED_MASK(~0u)}, - {16560, S_036100_VGT_BUSY_USER_DEFINED_MASK(~0u)}, - {16587, S_036100_TA_BUSY_USER_DEFINED_MASK(~0u)}, - {16613, S_036100_SX_BUSY_USER_DEFINED_MASK(~0u)}, - {16639, S_036100_SPI_BUSY_USER_DEFINED_MASK(~0u)}, - {16666, S_036100_SC_BUSY_USER_DEFINED_MASK(~0u)}, - {16692, S_036100_PA_BUSY_USER_DEFINED_MASK(~0u)}, - {16718, S_036100_GRBM_BUSY_USER_DEFINED_MASK(~0u)}, - {16746, S_036100_DB_BUSY_USER_DEFINED_MASK(~0u)}, - {16772, S_036100_CB_BUSY_USER_DEFINED_MASK(~0u)}, - {16798, S_036100_CP_BUSY_USER_DEFINED_MASK(~0u)}, - {16824, S_036100_IA_BUSY_USER_DEFINED_MASK(~0u)}, - {16850, S_036100_GDS_BUSY_USER_DEFINED_MASK(~0u)}, - {16877, S_036100_BCI_BUSY_USER_DEFINED_MASK(~0u)}, - {16904, S_036100_RLC_BUSY_USER_DEFINED_MASK(~0u)}, - {16931, S_036100_TC_BUSY_USER_DEFINED_MASK(~0u)}, - {16957, S_036100_WD_BUSY_USER_DEFINED_MASK(~0u)}, - /* 947 */ - {16356, S_036108_PERF_SEL(~0u)}, - {16506, S_036108_DB_CLEAN_USER_DEFINED_MASK(~0u)}, - {16533, S_036108_CB_CLEAN_USER_DEFINED_MASK(~0u)}, - {16587, S_036108_TA_BUSY_USER_DEFINED_MASK(~0u)}, - {16613, S_036108_SX_BUSY_USER_DEFINED_MASK(~0u)}, - {16639, S_036108_SPI_BUSY_USER_DEFINED_MASK(~0u)}, - {16666, S_036108_SC_BUSY_USER_DEFINED_MASK(~0u)}, - {16746, S_036108_DB_BUSY_USER_DEFINED_MASK(~0u)}, - {16772, S_036108_CB_BUSY_USER_DEFINED_MASK(~0u)}, - {16560, S_036108_VGT_BUSY_USER_DEFINED_MASK(~0u)}, - {16692, S_036108_PA_BUSY_USER_DEFINED_MASK(~0u)}, - {16877, S_036108_BCI_BUSY_USER_DEFINED_MASK(~0u)}, - /* 959 */ - {16356, S_03610C_PERF_SEL(~0u)}, - {16506, S_03610C_DB_CLEAN_USER_DEFINED_MASK(~0u)}, - {16533, S_03610C_CB_CLEAN_USER_DEFINED_MASK(~0u)}, - {16587, S_03610C_TA_BUSY_USER_DEFINED_MASK(~0u)}, - {16613, S_03610C_SX_BUSY_USER_DEFINED_MASK(~0u)}, - {16639, S_03610C_SPI_BUSY_USER_DEFINED_MASK(~0u)}, - {16666, S_03610C_SC_BUSY_USER_DEFINED_MASK(~0u)}, - {16746, S_03610C_DB_BUSY_USER_DEFINED_MASK(~0u)}, - {16772, S_03610C_CB_BUSY_USER_DEFINED_MASK(~0u)}, - {16560, S_03610C_VGT_BUSY_USER_DEFINED_MASK(~0u)}, - {16692, S_03610C_PA_BUSY_USER_DEFINED_MASK(~0u)}, - {16877, S_03610C_BCI_BUSY_USER_DEFINED_MASK(~0u)}, - /* 971 */ - {16356, S_036110_PERF_SEL(~0u)}, - {16506, S_036110_DB_CLEAN_USER_DEFINED_MASK(~0u)}, - {16533, S_036110_CB_CLEAN_USER_DEFINED_MASK(~0u)}, - {16587, S_036110_TA_BUSY_USER_DEFINED_MASK(~0u)}, - {16613, S_036110_SX_BUSY_USER_DEFINED_MASK(~0u)}, - {16639, S_036110_SPI_BUSY_USER_DEFINED_MASK(~0u)}, - {16666, S_036110_SC_BUSY_USER_DEFINED_MASK(~0u)}, - {16746, S_036110_DB_BUSY_USER_DEFINED_MASK(~0u)}, - {16772, S_036110_CB_BUSY_USER_DEFINED_MASK(~0u)}, - {16560, S_036110_VGT_BUSY_USER_DEFINED_MASK(~0u)}, - {16692, S_036110_PA_BUSY_USER_DEFINED_MASK(~0u)}, - {16877, S_036110_BCI_BUSY_USER_DEFINED_MASK(~0u)}, - /* 983 */ - {16356, S_036114_PERF_SEL(~0u)}, - {16506, S_036114_DB_CLEAN_USER_DEFINED_MASK(~0u)}, - {16533, S_036114_CB_CLEAN_USER_DEFINED_MASK(~0u)}, - {16587, S_036114_TA_BUSY_USER_DEFINED_MASK(~0u)}, - {16613, S_036114_SX_BUSY_USER_DEFINED_MASK(~0u)}, - {16639, S_036114_SPI_BUSY_USER_DEFINED_MASK(~0u)}, - {16666, S_036114_SC_BUSY_USER_DEFINED_MASK(~0u)}, - {16746, S_036114_DB_BUSY_USER_DEFINED_MASK(~0u)}, - {16772, S_036114_CB_BUSY_USER_DEFINED_MASK(~0u)}, - {16560, S_036114_VGT_BUSY_USER_DEFINED_MASK(~0u)}, - {16692, S_036114_PA_BUSY_USER_DEFINED_MASK(~0u)}, - {16877, S_036114_BCI_BUSY_USER_DEFINED_MASK(~0u)}, - /* 995 */ - {16356, S_036200_PERF_SEL(~0u)}, - {16983, S_036200_PERF_MODE(~0u)}, - /* 997 */ - {16356, S_036210_PERF_SEL(~0u)}, - {16365, S_036210_PERF_SEL1(~0u)}, - {16375, S_036210_CNTR_MODE(~0u)}, - {16993, S_036210_PERF_MODE1(~0u)}, - {16983, S_036210_PERF_MODE(~0u)}, - /* 1002 */ - {16336, S_036220_PERF_SEL2(~0u)}, - {16346, S_036220_PERF_SEL3(~0u)}, - {17004, S_036220_PERF_MODE3(~0u)}, - {17015, S_036220_PERF_MODE2(~0u)}, - /* 1006 */ - {16356, S_036230_PERF_SEL(~0u)}, - {16365, S_036230_PERF_SEL1(~0u)}, - {16375, S_036230_CNTR_MODE(~0u)}, - {16993, S_036230_PERF_MODE1(~0u)}, - {16983, S_036230_PERF_MODE(~0u)}, - /* 1011 */ - {16336, S_036240_PERF_SEL2(~0u)}, - {16346, S_036240_PERF_SEL3(~0u)}, - {17004, S_036240_PERF_MODE3(~0u)}, - {17015, S_036240_PERF_MODE2(~0u)}, - /* 1015 */ - {17026, S_036250_PERF_SEID_IGNORE_MASK(~0u)}, - /* 1016 */ - {16356, S_036400_PERF_SEL(~0u)}, - {16365, S_036400_PERF_SEL1(~0u)}, - {16375, S_036400_CNTR_MODE(~0u)}, - /* 1019 */ - {16336, S_036404_PERF_SEL2(~0u)}, - {16346, S_036404_PERF_SEL3(~0u)}, - /* 1021 */ - {16356, S_036500_PERF_SEL(~0u)}, - {16365, S_036500_PERF_SEL1(~0u)}, - {16375, S_036500_CNTR_MODE(~0u)}, - /* 1024 */ - {16336, S_036504_PERF_SEL2(~0u)}, - {16346, S_036504_PERF_SEL3(~0u)}, - /* 1026 */ - {16356, S_036600_PERF_SEL(~0u)}, - {16365, S_036600_PERF_SEL1(~0u)}, - {16375, S_036600_CNTR_MODE(~0u)}, - /* 1029 */ - {16336, S_036610_PERF_SEL2(~0u)}, - {16346, S_036610_PERF_SEL3(~0u)}, - /* 1031 */ - {17048, S_036628_BIN0_MIN(~0u)}, - {17057, S_036628_BIN0_MAX(~0u)}, - {17066, S_036628_BIN1_MIN(~0u)}, - {17075, S_036628_BIN1_MAX(~0u)}, - {17084, S_036628_BIN2_MIN(~0u)}, - {17093, S_036628_BIN2_MAX(~0u)}, - {17102, S_036628_BIN3_MIN(~0u)}, - {17111, S_036628_BIN3_MAX(~0u)}, - /* 1039 */ - {16356, S_036700_PERF_SEL(~0u)}, - {17120, S_036700_SQC_BANK_MASK(~0u)}, - {17134, S_036700_SQC_CLIENT_MASK(~0u)}, - {17150, S_036700_SPM_MODE(~0u)}, - {17159, S_036700_SIMD_MASK(~0u)}, - {16983, S_036700_PERF_MODE(~0u)}, - /* 1045 */ - {17169, S_036780_PS_EN(~0u)}, - {17175, S_036780_VS_EN(~0u)}, - {17181, S_036780_GS_EN(~0u)}, - {17187, S_036780_ES_EN(~0u)}, - {17193, S_036780_HS_EN(~0u)}, - {17199, S_036780_LS_EN(~0u)}, - {17205, S_036780_CS_EN(~0u)}, - {17211, S_036780_CNTR_RATE(~0u)}, - {17221, S_036780_DISABLE_FLUSH(~0u)}, - /* 1054 */ - {17235, S_036784_SH0_MASK(~0u)}, - {17244, S_036784_SH1_MASK(~0u)}, - /* 1056 */ - {17253, S_036788_FORCE_EN(~0u)}, - /* 1057 */ - {17262, S_036900_PERFCOUNTER_SELECT(~0u)}, - {17281, S_036900_PERFCOUNTER_SELECT1(~0u)}, - {16375, S_036900_CNTR_MODE(~0u)}, - /* 1060 */ - {17301, S_036910_PERFCOUNTER_SELECT2(~0u)}, - {17321, S_036910_PERFCOUNTER_SELECT3(~0u)}, - /* 1062 */ - {17262, S_036A00_PERFCOUNTER_SELECT(~0u)}, - {17281, S_036A00_PERFCOUNTER_SELECT1(~0u)}, - {16375, S_036A00_CNTR_MODE(~0u)}, - /* 1065 */ - {17301, S_036A10_PERFCOUNTER_SELECT2(~0u)}, - {17321, S_036A10_PERFCOUNTER_SELECT3(~0u)}, - /* 1067 */ - {16356, S_036B00_PERF_SEL(~0u)}, - {16365, S_036B00_PERF_SEL1(~0u)}, - {16375, S_036B00_CNTR_MODE(~0u)}, - {16993, S_036B00_PERF_MODE1(~0u)}, - {16983, S_036B00_PERF_MODE(~0u)}, - /* 1072 */ - {16336, S_036B04_PERF_SEL2(~0u)}, - {16346, S_036B04_PERF_SEL3(~0u)}, - {17004, S_036B04_PERF_MODE3(~0u)}, - {17015, S_036B04_PERF_MODE2(~0u)}, - /* 1076 */ - {16356, S_036C00_PERF_SEL(~0u)}, - {16365, S_036C00_PERF_SEL1(~0u)}, - {16375, S_036C00_CNTR_MODE(~0u)}, - {16993, S_036C00_PERF_MODE1(~0u)}, - {16983, S_036C00_PERF_MODE(~0u)}, - /* 1081 */ - {16336, S_036C04_PERF_SEL2(~0u)}, - {16346, S_036C04_PERF_SEL3(~0u)}, - {17004, S_036C04_PERF_MODE3(~0u)}, - {17015, S_036C04_PERF_MODE2(~0u)}, - /* 1085 */ - {16356, S_036D00_PERF_SEL(~0u)}, - {16365, S_036D00_PERF_SEL1(~0u)}, - {16375, S_036D00_CNTR_MODE(~0u)}, - {16993, S_036D00_PERF_MODE1(~0u)}, - {16983, S_036D00_PERF_MODE(~0u)}, - /* 1090 */ - {16336, S_036D04_PERF_SEL2(~0u)}, - {16346, S_036D04_PERF_SEL3(~0u)}, - {17004, S_036D04_PERF_MODE3(~0u)}, - {17015, S_036D04_PERF_MODE2(~0u)}, - /* 1094 */ - {16356, S_036E00_PERF_SEL(~0u)}, - {16365, S_036E00_PERF_SEL1(~0u)}, - {16375, S_036E00_CNTR_MODE(~0u)}, - {16993, S_036E00_PERF_MODE1(~0u)}, - {16983, S_036E00_PERF_MODE(~0u)}, - /* 1099 */ - {16336, S_036E04_PERF_SEL2(~0u)}, - {16346, S_036E04_PERF_SEL3(~0u)}, - {17015, S_036E04_PERF_MODE2(~0u)}, - {17004, S_036E04_PERF_MODE3(~0u)}, - /* 1103 */ - {16356, S_036E40_PERF_SEL(~0u)}, - {16365, S_036E40_PERF_SEL1(~0u)}, - {16375, S_036E40_CNTR_MODE(~0u)}, - {16993, S_036E40_PERF_MODE1(~0u)}, - {16983, S_036E40_PERF_MODE(~0u)}, - /* 1108 */ - {16336, S_036E44_PERF_SEL2(~0u)}, - {16346, S_036E44_PERF_SEL3(~0u)}, - {17015, S_036E44_PERF_MODE2(~0u)}, - {17004, S_036E44_PERF_MODE3(~0u)}, - /* 1112 */ - {17341, S_037000_OP_FILTER_ENABLE(~0u)}, - {17358, S_037000_OP_FILTER_SEL(~0u)}, - {17372, S_037000_FORMAT_FILTER_ENABLE(~0u)}, - {17393, S_037000_FORMAT_FILTER_SEL(~0u)}, - {17411, S_037000_CLEAR_FILTER_ENABLE(~0u)}, - {17431, S_037000_CLEAR_FILTER_SEL(~0u)}, - {17448, S_037000_MRT_FILTER_ENABLE(~0u)}, - {17466, S_037000_MRT_FILTER_SEL(~0u)}, - {17481, S_037000_NUM_SAMPLES_FILTER_ENABLE(~0u)}, - {17507, S_037000_NUM_SAMPLES_FILTER_SEL(~0u)}, - {17530, S_037000_NUM_FRAGMENTS_FILTER_ENABLE(~0u)}, - {17558, S_037000_NUM_FRAGMENTS_FILTER_SEL(~0u)}, - /* 1124 */ - {16356, S_037004_PERF_SEL(~0u)}, - {16365, S_037004_PERF_SEL1(~0u)}, - {16375, S_037004_CNTR_MODE(~0u)}, - {16993, S_037004_PERF_MODE1(~0u)}, - {16983, S_037004_PERF_MODE(~0u)}, - /* 1129 */ - {16336, S_037008_PERF_SEL2(~0u)}, - {16346, S_037008_PERF_SEL3(~0u)}, - {17004, S_037008_PERF_MODE3(~0u)}, - {17015, S_037008_PERF_MODE2(~0u)}, - /* 1133 */ - {16356, S_037100_PERF_SEL(~0u)}, - {16365, S_037100_PERF_SEL1(~0u)}, - {16375, S_037100_CNTR_MODE(~0u)}, - {16993, S_037100_PERF_MODE1(~0u)}, - {16983, S_037100_PERF_MODE(~0u)}, - /* 1138 */ - {16336, S_037104_PERF_SEL2(~0u)}, - {16346, S_037104_PERF_SEL3(~0u)}, - {17004, S_037104_PERF_MODE3(~0u)}, - {17015, S_037104_PERF_MODE2(~0u)}, - /* 1142 */ - {17583, S_028000_DEPTH_CLEAR_ENABLE(~0u)}, - {17602, S_028000_STENCIL_CLEAR_ENABLE(~0u)}, - {17623, S_028000_DEPTH_COPY(~0u)}, - {17634, S_028000_STENCIL_COPY(~0u)}, - {17647, S_028000_RESUMMARIZE_ENABLE(~0u)}, - {17666, S_028000_STENCIL_COMPRESS_DISABLE(~0u)}, - {17691, S_028000_DEPTH_COMPRESS_DISABLE(~0u)}, - {17714, S_028000_COPY_CENTROID(~0u)}, - {17728, S_028000_COPY_SAMPLE(~0u)}, - {17740, S_028000_DECOMPRESS_ENABLE(~0u)}, - /* 1152 */ - {17758, S_028004_ZPASS_INCREMENT_DISABLE(~0u)}, - {17782, S_028004_PERFECT_ZPASS_COUNTS(~0u)}, - {17803, S_028004_SAMPLE_RATE(~0u)}, - {17815, S_028004_ZPASS_ENABLE(~0u)}, - {17828, S_028004_ZFAIL_ENABLE(~0u)}, - {17841, S_028004_SFAIL_ENABLE(~0u)}, - {17854, S_028004_DBFAIL_ENABLE(~0u)}, - {17868, S_028004_SLICE_EVEN_ENABLE(~0u)}, - {17886, S_028004_SLICE_ODD_ENABLE(~0u)}, - /* 1161 */ - {17903, S_028008_SLICE_START(~0u)}, - {17915, S_028008_SLICE_MAX(~0u)}, - {17925, S_028008_Z_READ_ONLY(~0u)}, - {17937, S_028008_STENCIL_READ_ONLY(~0u)}, - /* 1165 */ - {18007, S_02800C_FORCE_HIZ_ENABLE(~0u), 4, 670}, - {18024, S_02800C_FORCE_HIS_ENABLE0(~0u), 4, 670}, - {18042, S_02800C_FORCE_HIS_ENABLE1(~0u), 4, 670}, - {18060, S_02800C_FORCE_SHADER_Z_ORDER(~0u)}, - {18081, S_02800C_FAST_Z_DISABLE(~0u)}, - {18096, S_02800C_FAST_STENCIL_DISABLE(~0u)}, - {18117, S_02800C_NOOP_CULL_DISABLE(~0u)}, - {18135, S_02800C_FORCE_COLOR_KILL(~0u)}, - {18152, S_02800C_FORCE_Z_READ(~0u)}, - {18165, S_02800C_FORCE_STENCIL_READ(~0u)}, - {18184, S_02800C_FORCE_FULL_Z_RANGE(~0u), 4, 670}, - {18203, S_02800C_FORCE_QC_SMASK_CONFLICT(~0u)}, - {18227, S_02800C_DISABLE_VIEWPORT_CLAMP(~0u)}, - {18250, S_02800C_IGNORE_SC_ZRANGE(~0u)}, - {18267, S_02800C_DISABLE_FULLY_COVERED(~0u)}, - {18352, S_02800C_FORCE_Z_LIMIT_SUMM(~0u), 4, 674}, - {18371, S_02800C_MAX_TILES_IN_DTT(~0u)}, - {18388, S_02800C_DISABLE_TILE_RATE_TILES(~0u)}, - {18412, S_02800C_FORCE_Z_DIRTY(~0u)}, - {18426, S_02800C_FORCE_STENCIL_DIRTY(~0u)}, - {18446, S_02800C_FORCE_Z_VALID(~0u)}, - {18460, S_02800C_FORCE_STENCIL_VALID(~0u)}, - {18480, S_02800C_PRESERVE_COMPRESSION(~0u)}, - /* 1188 */ - {18554, S_028010_PARTIAL_SQUAD_LAUNCH_CONTROL(~0u), 4, 678}, - {18583, S_028010_PARTIAL_SQUAD_LAUNCH_COUNTDOWN(~0u)}, - {18614, S_028010_DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION(~0u)}, - {18650, S_028010_DISABLE_SMEM_EXPCLEAR_OPTIMIZATION(~0u)}, - {18685, S_028010_DISABLE_COLOR_ON_VALIDATION(~0u)}, - {18713, S_028010_DECOMPRESS_Z_ON_FLUSH(~0u)}, - {18735, S_028010_DISABLE_REG_SNOOP(~0u)}, - {18753, S_028010_DEPTH_BOUNDS_HIER_DEPTH_DISABLE(~0u)}, - {18785, S_028010_SEPARATE_HIZS_FUNC_ENABLE(~0u)}, - {18811, S_028010_HIZ_ZFUNC(~0u)}, - {18821, S_028010_HIS_SFUNC_FF(~0u)}, - {18834, S_028010_HIS_SFUNC_BF(~0u)}, - {18847, S_028010_PRESERVE_ZRANGE(~0u)}, - {18863, S_028010_PRESERVE_SRESULTS(~0u)}, - {18881, S_028010_DISABLE_FAST_PASS(~0u)}, - /* 1203 */ - {18899, S_028028_CLEAR(~0u)}, - /* 1204 */ - {18905, S_028030_TL_X(~0u)}, - {18910, S_028030_TL_Y(~0u)}, - /* 1206 */ - {18915, S_028034_BR_X(~0u)}, - {18920, S_028034_BR_Y(~0u)}, - /* 1208 */ - {18925, S_02803C_ADDR5_SWIZZLE_MASK(~0u)}, - {14341, S_02803C_ARRAY_MODE(~0u), 7, 682}, - {14703, S_02803C_PIPE_CONFIG(~0u), 18, 689}, - {14996, S_02803C_BANK_WIDTH(~0u), 4, 406}, - {15103, S_02803C_BANK_HEIGHT(~0u), 4, 410}, - {15215, S_02803C_MACRO_TILE_ASPECT(~0u), 4, 414}, - {15302, S_02803C_NUM_BANKS(~0u), 4, 418}, - /* 1215 */ - {8750, S_028040_FORMAT(~0u), 4, 707}, - {19077, S_028040_NUM_SAMPLES(~0u)}, - {14893, S_028040_TILE_SPLIT(~0u), 7, 399}, - {19089, S_028040_TILE_MODE_INDEX(~0u)}, - {19105, S_028040_DECOMPRESS_ON_N_ZPLANES(~0u)}, - {19129, S_028040_ALLOW_EXPCLEAR(~0u)}, - {19144, S_028040_READ_SIZE(~0u)}, - {19154, S_028040_TILE_SURFACE_ENABLE(~0u)}, - {19174, S_028040_CLEAR_DISALLOWED(~0u)}, - {19191, S_028040_ZRANGE_PRECISION(~0u)}, - /* 1225 */ - {8750, S_028044_FORMAT(~0u), 2, 711}, - {14893, S_028044_TILE_SPLIT(~0u), 7, 399}, - {19089, S_028044_TILE_MODE_INDEX(~0u)}, - {19129, S_028044_ALLOW_EXPCLEAR(~0u)}, - {19234, S_028044_TILE_STENCIL_DISABLE(~0u)}, - {19174, S_028044_CLEAR_DISALLOWED(~0u)}, - /* 1231 */ - {19255, S_028058_PITCH_TILE_MAX(~0u)}, - {19270, S_028058_HEIGHT_TILE_MAX(~0u)}, - /* 1233 */ - {19286, S_02805C_SLICE_TILE_MAX(~0u)}, - /* 1234 */ - {8373, S_028084_ADDRESS(~0u)}, - /* 1235 */ - {19301, S_028200_WINDOW_X_OFFSET(~0u)}, - {19317, S_028200_WINDOW_Y_OFFSET(~0u)}, - /* 1237 */ - {18905, S_028204_TL_X(~0u)}, - {18910, S_028204_TL_Y(~0u)}, - {19333, S_028204_WINDOW_OFFSET_DISABLE(~0u)}, - /* 1240 */ - {18915, S_028208_BR_X(~0u)}, - {18920, S_028208_BR_Y(~0u)}, - /* 1242 */ - {19355, S_02820C_CLIP_RULE(~0u)}, - /* 1243 */ - {18905, S_028210_TL_X(~0u)}, - {18910, S_028210_TL_Y(~0u)}, - /* 1245 */ - {18915, S_028214_BR_X(~0u)}, - {18920, S_028214_BR_Y(~0u)}, - /* 1247 */ - {19365, S_028230_ER_TRI(~0u)}, - {12448, S_028230_ER_POINT(~0u)}, - {19372, S_028230_ER_RECT(~0u)}, - {19380, S_028230_ER_LINE_LR(~0u)}, - {19391, S_028230_ER_LINE_RL(~0u)}, - {19402, S_028230_ER_LINE_TB(~0u)}, - {19413, S_028230_ER_LINE_BT(~0u)}, - /* 1254 */ - {19424, S_028234_HW_SCREEN_OFFSET_X(~0u)}, - {19443, S_028234_HW_SCREEN_OFFSET_Y(~0u)}, - /* 1256 */ - {19462, S_028238_TARGET0_ENABLE(~0u)}, - {19477, S_028238_TARGET1_ENABLE(~0u)}, - {19492, S_028238_TARGET2_ENABLE(~0u)}, - {19507, S_028238_TARGET3_ENABLE(~0u)}, - {19522, S_028238_TARGET4_ENABLE(~0u)}, - {19537, S_028238_TARGET5_ENABLE(~0u)}, - {19552, S_028238_TARGET6_ENABLE(~0u)}, - {19567, S_028238_TARGET7_ENABLE(~0u)}, - /* 1264 */ - {19582, S_02823C_OUTPUT0_ENABLE(~0u)}, - {19597, S_02823C_OUTPUT1_ENABLE(~0u)}, - {19612, S_02823C_OUTPUT2_ENABLE(~0u)}, - {19627, S_02823C_OUTPUT3_ENABLE(~0u)}, - {19642, S_02823C_OUTPUT4_ENABLE(~0u)}, - {19657, S_02823C_OUTPUT5_ENABLE(~0u)}, - {19672, S_02823C_OUTPUT6_ENABLE(~0u)}, - {19687, S_02823C_OUTPUT7_ENABLE(~0u)}, - /* 1272 */ - {18905, S_028240_TL_X(~0u)}, - {18910, S_028240_TL_Y(~0u)}, - {19333, S_028240_WINDOW_OFFSET_DISABLE(~0u)}, - /* 1275 */ - {18915, S_028244_BR_X(~0u)}, - {18920, S_028244_BR_Y(~0u)}, - /* 1277 */ - {18905, S_028250_TL_X(~0u)}, - {18910, S_028250_TL_Y(~0u)}, - {19333, S_028250_WINDOW_OFFSET_DISABLE(~0u)}, - /* 1280 */ - {18915, S_028254_BR_X(~0u)}, - {18920, S_028254_BR_Y(~0u)}, - /* 1282 */ - {19794, S_028350_RB_MAP_PKR0(~0u), 4, 713}, - {19806, S_028350_RB_MAP_PKR1(~0u), 4, 713}, - {19918, S_028350_RB_XSEL2(~0u), 4, 717}, - {19927, S_028350_RB_XSEL(~0u)}, - {19935, S_028350_RB_YSEL(~0u)}, - {20039, S_028350_PKR_MAP(~0u), 4, 721}, - {20147, S_028350_PKR_XSEL(~0u), 4, 725}, - {20256, S_028350_PKR_YSEL(~0u), 4, 729}, - {20369, S_028350_PKR_XSEL2(~0u), 4, 733}, - {20471, S_028350_SC_MAP(~0u), 4, 737}, - {20617, S_028350_SC_XSEL(~0u), 4, 741}, - {20764, S_028350_SC_YSEL(~0u), 4, 745}, - {20864, S_028350_SE_MAP(~0u), 4, 749}, - {21010, S_028350_SE_XSEL(~0u), 4, 753}, - {21157, S_028350_SE_YSEL(~0u), 4, 757}, - /* 1297 */ - {21277, S_028354_SE_PAIR_MAP(~0u), 4, 761}, - {21448, S_028354_SE_PAIR_XSEL(~0u), 4, 765}, - {21620, S_028354_SE_PAIR_YSEL(~0u), 4, 769}, - /* 1300 */ - {17868, S_028358_SLICE_EVEN_ENABLE(~0u)}, - {17886, S_028358_SLICE_ODD_ENABLE(~0u)}, - /* 1302 */ - {21633, S_028424_OVERWRITE_COMBINER_DISABLE(~0u)}, - {21660, S_028424_OVERWRITE_COMBINER_MRT_SHARING_DISABLE(~0u)}, - {21699, S_028424_OVERWRITE_COMBINER_WATERMARK(~0u)}, - /* 1305 */ - {21965, S_02842C_STENCILFAIL(~0u), 16, 773}, - {21977, S_02842C_STENCILZPASS(~0u), 16, 773}, - {21990, S_02842C_STENCILZFAIL(~0u), 16, 773}, - {22003, S_02842C_STENCILFAIL_BF(~0u), 16, 773}, - {22018, S_02842C_STENCILZPASS_BF(~0u), 16, 773}, - {22034, S_02842C_STENCILZFAIL_BF(~0u), 16, 773}, - /* 1311 */ - {22050, S_028430_STENCILTESTVAL(~0u)}, - {22065, S_028430_STENCILMASK(~0u)}, - {22077, S_028430_STENCILWRITEMASK(~0u)}, - {22094, S_028430_STENCILOPVAL(~0u)}, - /* 1315 */ - {22107, S_028434_STENCILTESTVAL_BF(~0u)}, - {22125, S_028434_STENCILMASK_BF(~0u)}, - {22140, S_028434_STENCILWRITEMASK_BF(~0u)}, - {22160, S_028434_STENCILOPVAL_BF(~0u)}, - /* 1319 */ - {665, S_028644_OFFSET(~0u)}, - {22183, S_028644_DEFAULT_VAL(~0u), 1, 789}, - {22195, S_028644_FLAT_SHADE(~0u)}, - {22206, S_028644_CYL_WRAP(~0u)}, - {22215, S_028644_PT_SPRITE_TEX(~0u)}, - {22229, S_028644_DUP(~0u)}, - {22233, S_028644_FP16_INTERP_MODE(~0u)}, - {22250, S_028644_USE_DEFAULT_ATTR1(~0u)}, - {22268, S_028644_DEFAULT_VAL_ATTR1(~0u)}, - {22286, S_028644_PT_SPRITE_TEX_ATTR1(~0u)}, - {22306, S_028644_ATTR0_VALID(~0u)}, - {22318, S_028644_ATTR1_VALID(~0u)}, - /* 1331 */ - {22330, S_0286C4_VS_EXPORT_COUNT(~0u)}, - {22346, S_0286C4_VS_HALF_PACK(~0u)}, - {22359, S_0286C4_VS_EXPORTS_FOG(~0u)}, - {22374, S_0286C4_VS_OUT_FOG_VEC_ADDR(~0u)}, - /* 1335 */ - {22394, S_0286CC_PERSP_SAMPLE_ENA(~0u)}, - {22411, S_0286CC_PERSP_CENTER_ENA(~0u)}, - {22428, S_0286CC_PERSP_CENTROID_ENA(~0u)}, - {22447, S_0286CC_PERSP_PULL_MODEL_ENA(~0u)}, - {22468, S_0286CC_LINEAR_SAMPLE_ENA(~0u)}, - {22486, S_0286CC_LINEAR_CENTER_ENA(~0u)}, - {22504, S_0286CC_LINEAR_CENTROID_ENA(~0u)}, - {22524, S_0286CC_LINE_STIPPLE_TEX_ENA(~0u)}, - {22545, S_0286CC_POS_X_FLOAT_ENA(~0u)}, - {22561, S_0286CC_POS_Y_FLOAT_ENA(~0u)}, - {22577, S_0286CC_POS_Z_FLOAT_ENA(~0u)}, - {22593, S_0286CC_POS_W_FLOAT_ENA(~0u)}, - {22609, S_0286CC_FRONT_FACE_ENA(~0u)}, - {22624, S_0286CC_ANCILLARY_ENA(~0u)}, - {22638, S_0286CC_SAMPLE_COVERAGE_ENA(~0u)}, - {22658, S_0286CC_POS_FIXED_PT_ENA(~0u)}, - /* 1351 */ - {22394, S_0286D0_PERSP_SAMPLE_ENA(~0u)}, - {22411, S_0286D0_PERSP_CENTER_ENA(~0u)}, - {22428, S_0286D0_PERSP_CENTROID_ENA(~0u)}, - {22447, S_0286D0_PERSP_PULL_MODEL_ENA(~0u)}, - {22468, S_0286D0_LINEAR_SAMPLE_ENA(~0u)}, - {22486, S_0286D0_LINEAR_CENTER_ENA(~0u)}, - {22504, S_0286D0_LINEAR_CENTROID_ENA(~0u)}, - {22524, S_0286D0_LINE_STIPPLE_TEX_ENA(~0u)}, - {22545, S_0286D0_POS_X_FLOAT_ENA(~0u)}, - {22561, S_0286D0_POS_Y_FLOAT_ENA(~0u)}, - {22577, S_0286D0_POS_Z_FLOAT_ENA(~0u)}, - {22593, S_0286D0_POS_W_FLOAT_ENA(~0u)}, - {22609, S_0286D0_FRONT_FACE_ENA(~0u)}, - {22624, S_0286D0_ANCILLARY_ENA(~0u)}, - {22638, S_0286D0_SAMPLE_COVERAGE_ENA(~0u)}, - {22658, S_0286D0_POS_FIXED_PT_ENA(~0u)}, - /* 1367 */ - {22675, S_0286D4_FLAT_SHADE_ENA(~0u)}, - {22690, S_0286D4_PNT_SPRITE_ENA(~0u)}, - {22813, S_0286D4_PNT_SPRITE_OVRD_X(~0u), 5, 790}, - {22831, S_0286D4_PNT_SPRITE_OVRD_Y(~0u), 5, 790}, - {22849, S_0286D4_PNT_SPRITE_OVRD_Z(~0u), 5, 790}, - {22867, S_0286D4_PNT_SPRITE_OVRD_W(~0u), 5, 790}, - {22885, S_0286D4_PNT_SPRITE_TOP_1(~0u)}, - /* 1374 */ - {22902, S_0286D8_NUM_INTERP(~0u)}, - {22913, S_0286D8_PARAM_GEN(~0u)}, - {22923, S_0286D8_FOG_ADDR(~0u)}, - {22932, S_0286D8_BC_OPTIMIZE_DISABLE(~0u)}, - {22952, S_0286D8_PASS_FOG_THROUGH_PS(~0u)}, - /* 1379 */ - {22972, S_0286E0_PERSP_CENTER_CNTL(~0u)}, - {22990, S_0286E0_PERSP_CENTROID_CNTL(~0u)}, - {23010, S_0286E0_LINEAR_CENTER_CNTL(~0u)}, - {23029, S_0286E0_LINEAR_CENTROID_CNTL(~0u)}, - {23099, S_0286E0_POS_FLOAT_LOCATION(~0u), 1, 795}, - {23118, S_0286E0_POS_FLOAT_ULC(~0u)}, - {23132, S_0286E0_FRONT_FACE_ALL_BITS(~0u)}, - /* 1386 */ - {16237, S_0286E8_WAVES(~0u)}, - {16243, S_0286E8_WAVESIZE(~0u)}, - /* 1388 */ - {23152, S_028704_NUM_PS_WAVES(~0u)}, - {23165, S_028704_NUM_VS_WAVES(~0u)}, - {23178, S_028704_NUM_GS_WAVES(~0u)}, - {23191, S_028704_NUM_ES_WAVES(~0u)}, - {23204, S_028704_NUM_HS_WAVES(~0u)}, - /* 1393 */ - {23217, S_028708_NUM_LS_WAVES(~0u)}, - /* 1394 */ - {23318, S_02870C_POS0_EXPORT_FORMAT(~0u), 5, 796}, - {23337, S_02870C_POS1_EXPORT_FORMAT(~0u), 5, 796}, - {23356, S_02870C_POS2_EXPORT_FORMAT(~0u), 5, 796}, - {23375, S_02870C_POS3_EXPORT_FORMAT(~0u), 5, 796}, - /* 1398 */ - {23594, S_028710_Z_EXPORT_FORMAT(~0u), 10, 801}, - /* 1399 */ - {23610, S_028714_COL0_EXPORT_FORMAT(~0u), 10, 801}, - {23629, S_028714_COL1_EXPORT_FORMAT(~0u), 10, 801}, - {23648, S_028714_COL2_EXPORT_FORMAT(~0u), 10, 801}, - {23667, S_028714_COL3_EXPORT_FORMAT(~0u), 10, 801}, - {23686, S_028714_COL4_EXPORT_FORMAT(~0u), 10, 801}, - {23705, S_028714_COL5_EXPORT_FORMAT(~0u), 10, 801}, - {23724, S_028714_COL6_EXPORT_FORMAT(~0u), 10, 801}, - {23743, S_028714_COL7_EXPORT_FORMAT(~0u), 10, 801}, - /* 1407 */ - {23997, S_028754_MRT0(~0u), 11, 811}, - {24002, S_028754_MRT1(~0u)}, - {24007, S_028754_MRT2(~0u)}, - {24012, S_028754_MRT3(~0u)}, - {24017, S_028754_MRT4(~0u)}, - {24022, S_028754_MRT5(~0u)}, - {24027, S_028754_MRT6(~0u)}, - {24032, S_028754_MRT7(~0u)}, - /* 1415 */ - {24117, S_028758_MRT0_EPSILON(~0u), 16, 822}, - {24130, S_028758_MRT1_EPSILON(~0u)}, - {24143, S_028758_MRT2_EPSILON(~0u)}, - {24156, S_028758_MRT3_EPSILON(~0u)}, - {24169, S_028758_MRT4_EPSILON(~0u)}, - {24182, S_028758_MRT5_EPSILON(~0u)}, - {24195, S_028758_MRT6_EPSILON(~0u)}, - {24208, S_028758_MRT7_EPSILON(~0u)}, - /* 1423 */ - {24221, S_02875C_MRT0_COLOR_OPT_DISABLE(~0u)}, - {24244, S_02875C_MRT0_ALPHA_OPT_DISABLE(~0u)}, - {24267, S_02875C_MRT1_COLOR_OPT_DISABLE(~0u)}, - {24290, S_02875C_MRT1_ALPHA_OPT_DISABLE(~0u)}, - {24313, S_02875C_MRT2_COLOR_OPT_DISABLE(~0u)}, - {24336, S_02875C_MRT2_ALPHA_OPT_DISABLE(~0u)}, - {24359, S_02875C_MRT3_COLOR_OPT_DISABLE(~0u)}, - {24382, S_02875C_MRT3_ALPHA_OPT_DISABLE(~0u)}, - {24405, S_02875C_MRT4_COLOR_OPT_DISABLE(~0u)}, - {24428, S_02875C_MRT4_ALPHA_OPT_DISABLE(~0u)}, - {24451, S_02875C_MRT5_COLOR_OPT_DISABLE(~0u)}, - {24474, S_02875C_MRT5_ALPHA_OPT_DISABLE(~0u)}, - {24497, S_02875C_MRT6_COLOR_OPT_DISABLE(~0u)}, - {24520, S_02875C_MRT6_ALPHA_OPT_DISABLE(~0u)}, - {24543, S_02875C_MRT7_COLOR_OPT_DISABLE(~0u)}, - {24566, S_02875C_MRT7_ALPHA_OPT_DISABLE(~0u)}, - {24589, S_02875C_PIXEN_ZERO_OPT_DISABLE(~0u)}, - /* 1440 */ - {24880, S_028760_COLOR_SRC_OPT(~0u), 8, 838}, - {24894, S_028760_COLOR_DST_OPT(~0u)}, - {25042, S_028760_COLOR_COMB_FCN(~0u), 8, 846}, - {25057, S_028760_ALPHA_SRC_OPT(~0u)}, - {25071, S_028760_ALPHA_DST_OPT(~0u)}, - {25085, S_028760_ALPHA_COMB_FCN(~0u)}, - /* 1446 */ - {24880, S_028764_COLOR_SRC_OPT(~0u)}, - {24894, S_028764_COLOR_DST_OPT(~0u)}, - {25042, S_028764_COLOR_COMB_FCN(~0u)}, - {25057, S_028764_ALPHA_SRC_OPT(~0u)}, - {25071, S_028764_ALPHA_DST_OPT(~0u)}, - {25085, S_028764_ALPHA_COMB_FCN(~0u)}, - /* 1452 */ - {24880, S_028768_COLOR_SRC_OPT(~0u)}, - {24894, S_028768_COLOR_DST_OPT(~0u)}, - {25042, S_028768_COLOR_COMB_FCN(~0u)}, - {25057, S_028768_ALPHA_SRC_OPT(~0u)}, - {25071, S_028768_ALPHA_DST_OPT(~0u)}, - {25085, S_028768_ALPHA_COMB_FCN(~0u)}, - /* 1458 */ - {24880, S_02876C_COLOR_SRC_OPT(~0u)}, - {24894, S_02876C_COLOR_DST_OPT(~0u)}, - {25042, S_02876C_COLOR_COMB_FCN(~0u)}, - {25057, S_02876C_ALPHA_SRC_OPT(~0u)}, - {25071, S_02876C_ALPHA_DST_OPT(~0u)}, - {25085, S_02876C_ALPHA_COMB_FCN(~0u)}, - /* 1464 */ - {24880, S_028770_COLOR_SRC_OPT(~0u)}, - {24894, S_028770_COLOR_DST_OPT(~0u)}, - {25042, S_028770_COLOR_COMB_FCN(~0u)}, - {25057, S_028770_ALPHA_SRC_OPT(~0u)}, - {25071, S_028770_ALPHA_DST_OPT(~0u)}, - {25085, S_028770_ALPHA_COMB_FCN(~0u)}, - /* 1470 */ - {24880, S_028774_COLOR_SRC_OPT(~0u)}, - {24894, S_028774_COLOR_DST_OPT(~0u)}, - {25042, S_028774_COLOR_COMB_FCN(~0u)}, - {25057, S_028774_ALPHA_SRC_OPT(~0u)}, - {25071, S_028774_ALPHA_DST_OPT(~0u)}, - {25085, S_028774_ALPHA_COMB_FCN(~0u)}, - /* 1476 */ - {24880, S_028778_COLOR_SRC_OPT(~0u)}, - {24894, S_028778_COLOR_DST_OPT(~0u)}, - {25042, S_028778_COLOR_COMB_FCN(~0u)}, - {25057, S_028778_ALPHA_SRC_OPT(~0u)}, - {25071, S_028778_ALPHA_DST_OPT(~0u)}, - {25085, S_028778_ALPHA_COMB_FCN(~0u)}, - /* 1482 */ - {24880, S_02877C_COLOR_SRC_OPT(~0u)}, - {24894, S_02877C_COLOR_DST_OPT(~0u)}, - {25042, S_02877C_COLOR_COMB_FCN(~0u)}, - {25057, S_02877C_ALPHA_SRC_OPT(~0u)}, - {25071, S_02877C_ALPHA_DST_OPT(~0u)}, - {25085, S_02877C_ALPHA_COMB_FCN(~0u)}, - /* 1488 */ - {25494, S_028780_COLOR_SRCBLEND(~0u), 21, 854}, - {25042, S_028780_COLOR_COMB_FCN(~0u), 5, 875}, - {25599, S_028780_COLOR_DESTBLEND(~0u), 21, 854}, - {25615, S_028780_ALPHA_SRCBLEND(~0u), 21, 854}, - {25085, S_028780_ALPHA_COMB_FCN(~0u), 5, 875}, - {25630, S_028780_ALPHA_DESTBLEND(~0u), 21, 854}, - {25646, S_028780_SEPARATE_ALPHA_BLEND(~0u)}, - {8435, S_028780_ENABLE(~0u)}, - {25667, S_028780_DISABLE_ROP3(~0u)}, - /* 1497 */ - {25680, S_0287CC_SRC_STATE_ID(~0u)}, - /* 1498 */ - {25693, S_0287E4_BASE_ADDR(~0u)}, - /* 1499 */ - {25781, S_0287F0_SOURCE_SELECT(~0u), 4, 880}, - {25827, S_0287F0_MAJOR_MODE(~0u), 2, 884}, - {25838, S_0287F0_NOT_EOP(~0u)}, - {25846, S_0287F0_USE_OPAQUE(~0u)}, - /* 1503 */ - {25857, S_0287F8_ADDRESS_LOW(~0u)}, - /* 1504 */ - {25869, S_028800_STENCIL_ENABLE(~0u)}, - {18015, S_028800_Z_ENABLE(~0u)}, - {25884, S_028800_Z_WRITE_ENABLE(~0u)}, - {25899, S_028800_DEPTH_BOUNDS_ENABLE(~0u)}, - {18815, S_028800_ZFUNC(~0u), 8, 886}, - {26014, S_028800_BACKFACE_ENABLE(~0u)}, - {26117, S_028800_STENCILFUNC(~0u), 8, 894}, - {26129, S_028800_STENCILFUNC_BF(~0u), 8, 894}, - {26144, S_028800_ENABLE_COLOR_WRITES_ON_DEPTH_FAIL(~0u)}, - {26178, S_028800_DISABLE_COLOR_WRITES_ON_DEPTH_PASS(~0u)}, - /* 1514 */ - {26213, S_028804_MAX_ANCHOR_SAMPLES(~0u)}, - {26232, S_028804_PS_ITER_SAMPLES(~0u)}, - {26248, S_028804_MASK_EXPORT_NUM_SAMPLES(~0u)}, - {26272, S_028804_ALPHA_TO_MASK_NUM_SAMPLES(~0u)}, - {26298, S_028804_HIGH_QUALITY_INTERSECTIONS(~0u)}, - {26325, S_028804_INCOHERENT_EQAA_READS(~0u)}, - {26347, S_028804_INTERPOLATE_COMP_Z(~0u)}, - {26366, S_028804_INTERPOLATE_SRC_Z(~0u)}, - {26384, S_028804_STATIC_ANCHOR_ASSOCIATIONS(~0u)}, - {26411, S_028804_ALPHA_TO_MASK_EQAA_DISABLE(~0u)}, - {26438, S_028804_OVERRASTERIZATION_AMOUNT(~0u)}, - {26463, S_028804_ENABLE_POSTZ_OVERRASTERIZATION(~0u)}, - /* 1526 */ - {26494, S_028808_DISABLE_DUAL_QUAD(~0u)}, - {26512, S_028808_DEGAMMA_ENABLE(~0u)}, - {12371, S_028808_MODE(~0u), 7, 902}, - {25675, S_028808_ROP3(~0u), 256, 909}, - /* 1530 */ - {26817, S_02880C_Z_EXPORT_ENABLE(~0u)}, - {26833, S_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE(~0u)}, - {26864, S_02880C_STENCIL_OP_VAL_EXPORT_ENABLE(~0u)}, - {18073, S_02880C_Z_ORDER(~0u), 4, 1165}, - {26943, S_02880C_KILL_ENABLE(~0u)}, - {26955, S_02880C_COVERAGE_TO_MASK_ENABLE(~0u)}, - {26979, S_02880C_MASK_EXPORT_ENABLE(~0u)}, - {26998, S_02880C_EXEC_ON_HIER_FAIL(~0u)}, - {27016, S_02880C_EXEC_ON_NOOP(~0u)}, - {27029, S_02880C_ALPHA_TO_MASK_DISABLE(~0u)}, - {27051, S_02880C_DEPTH_BEFORE_SHADER(~0u)}, - {27141, S_02880C_CONSERVATIVE_Z_EXPORT(~0u), 4, 1169}, - {27163, S_02880C_DUAL_QUAD_DISABLE(~0u)}, - /* 1543 */ - {27181, S_028810_UCP_ENA_0(~0u)}, - {27191, S_028810_UCP_ENA_1(~0u)}, - {27201, S_028810_UCP_ENA_2(~0u)}, - {27211, S_028810_UCP_ENA_3(~0u)}, - {27221, S_028810_UCP_ENA_4(~0u)}, - {27231, S_028810_UCP_ENA_5(~0u)}, - {27241, S_028810_PS_UCP_Y_SCALE_NEG(~0u)}, - {27260, S_028810_PS_UCP_MODE(~0u)}, - {27272, S_028810_CLIP_DISABLE(~0u)}, - {27285, S_028810_UCP_CULL_ONLY_ENA(~0u)}, - {27303, S_028810_BOUNDARY_EDGE_FLAG_ENA(~0u)}, - {27326, S_028810_DX_CLIP_SPACE_DEF(~0u)}, - {27344, S_028810_DIS_CLIP_ERR_DETECT(~0u)}, - {27364, S_028810_VTX_KILL_OR(~0u)}, - {27376, S_028810_DX_RASTERIZATION_KILL(~0u)}, - {27398, S_028810_DX_LINEAR_ATTR_CLIP_ENA(~0u)}, - {27422, S_028810_VTE_VPORT_PROVOKE_DISABLE(~0u)}, - {27448, S_028810_ZCLIP_NEAR_DISABLE(~0u)}, - {27467, S_028810_ZCLIP_FAR_DISABLE(~0u)}, - /* 1562 */ - {27485, S_028814_CULL_FRONT(~0u)}, - {27496, S_028814_CULL_BACK(~0u)}, - {27506, S_028814_FACE(~0u)}, - {27521, S_028814_POLY_MODE(~0u), 2, 1173}, - {27587, S_028814_POLYMODE_FRONT_PTYPE(~0u), 3, 1175}, - {27608, S_028814_POLYMODE_BACK_PTYPE(~0u), 3, 1175}, - {27628, S_028814_POLY_OFFSET_FRONT_ENABLE(~0u)}, - {27653, S_028814_POLY_OFFSET_BACK_ENABLE(~0u)}, - {27677, S_028814_POLY_OFFSET_PARA_ENABLE(~0u)}, - {27701, S_028814_VTX_WINDOW_OFFSET_ENABLE(~0u)}, - {27726, S_028814_PROVOKING_VTX_LAST(~0u)}, - {27745, S_028814_PERSP_CORR_DIS(~0u)}, - {27760, S_028814_MULTI_PRIM_IB_ENA(~0u)}, - /* 1575 */ - {27778, S_028818_VPORT_X_SCALE_ENA(~0u)}, - {27796, S_028818_VPORT_X_OFFSET_ENA(~0u)}, - {27815, S_028818_VPORT_Y_SCALE_ENA(~0u)}, - {27833, S_028818_VPORT_Y_OFFSET_ENA(~0u)}, - {27852, S_028818_VPORT_Z_SCALE_ENA(~0u)}, - {27870, S_028818_VPORT_Z_OFFSET_ENA(~0u)}, - {27889, S_028818_VTX_XY_FMT(~0u)}, - {27900, S_028818_VTX_Z_FMT(~0u)}, - {27910, S_028818_VTX_W0_FMT(~0u)}, - /* 1584 */ - {27921, S_02881C_CLIP_DIST_ENA_0(~0u)}, - {27937, S_02881C_CLIP_DIST_ENA_1(~0u)}, - {27953, S_02881C_CLIP_DIST_ENA_2(~0u)}, - {27969, S_02881C_CLIP_DIST_ENA_3(~0u)}, - {27985, S_02881C_CLIP_DIST_ENA_4(~0u)}, - {28001, S_02881C_CLIP_DIST_ENA_5(~0u)}, - {28017, S_02881C_CLIP_DIST_ENA_6(~0u)}, - {28033, S_02881C_CLIP_DIST_ENA_7(~0u)}, - {28049, S_02881C_CULL_DIST_ENA_0(~0u)}, - {28065, S_02881C_CULL_DIST_ENA_1(~0u)}, - {28081, S_02881C_CULL_DIST_ENA_2(~0u)}, - {28097, S_02881C_CULL_DIST_ENA_3(~0u)}, - {28113, S_02881C_CULL_DIST_ENA_4(~0u)}, - {28129, S_02881C_CULL_DIST_ENA_5(~0u)}, - {28145, S_02881C_CULL_DIST_ENA_6(~0u)}, - {28161, S_02881C_CULL_DIST_ENA_7(~0u)}, - {28177, S_02881C_USE_VTX_POINT_SIZE(~0u)}, - {28196, S_02881C_USE_VTX_EDGE_FLAG(~0u)}, - {28214, S_02881C_USE_VTX_RENDER_TARGET_INDX(~0u)}, - {28241, S_02881C_USE_VTX_VIEWPORT_INDX(~0u)}, - {28263, S_02881C_USE_VTX_KILL_FLAG(~0u)}, - {28281, S_02881C_VS_OUT_MISC_VEC_ENA(~0u)}, - {28301, S_02881C_VS_OUT_CCDIST0_VEC_ENA(~0u)}, - {28324, S_02881C_VS_OUT_CCDIST1_VEC_ENA(~0u)}, - {28347, S_02881C_VS_OUT_MISC_SIDE_BUS_ENA(~0u)}, - {28372, S_02881C_USE_VTX_GS_CUT_FLAG(~0u)}, - {28392, S_02881C_USE_VTX_LINE_WIDTH(~0u)}, - /* 1611 */ - {28411, S_028820_VTE_XY_INF_DISCARD(~0u)}, - {28430, S_028820_VTE_Z_INF_DISCARD(~0u)}, - {28448, S_028820_VTE_W_INF_DISCARD(~0u)}, - {28466, S_028820_VTE_0XNANINF_IS_0(~0u)}, - {28484, S_028820_VTE_XY_NAN_RETAIN(~0u)}, - {28502, S_028820_VTE_Z_NAN_RETAIN(~0u)}, - {28519, S_028820_VTE_W_NAN_RETAIN(~0u)}, - {28536, S_028820_VTE_W_RECIP_NAN_IS_0(~0u)}, - {28557, S_028820_VS_XY_NAN_TO_INF(~0u)}, - {28574, S_028820_VS_XY_INF_RETAIN(~0u)}, - {28591, S_028820_VS_Z_NAN_TO_INF(~0u)}, - {28607, S_028820_VS_Z_INF_RETAIN(~0u)}, - {28623, S_028820_VS_W_NAN_TO_INF(~0u)}, - {28639, S_028820_VS_W_INF_RETAIN(~0u)}, - {28655, S_028820_VS_CLIP_DIST_INF_DISCARD(~0u)}, - {28680, S_028820_VTE_NO_OUTPUT_NEG_0(~0u)}, - /* 1627 */ - {28700, S_028824_LINE_STIPPLE_RESET(~0u)}, - {28719, S_028824_EXPAND_FULL_LENGTH(~0u)}, - {28738, S_028824_FRACTIONAL_ACCUM(~0u)}, - {28755, S_028824_DIAMOND_ADJUST(~0u)}, - /* 1631 */ - {28770, S_02882C_TRIANGLE_FILTER_DISABLE(~0u)}, - {28794, S_02882C_LINE_FILTER_DISABLE(~0u)}, - {28814, S_02882C_POINT_FILTER_DISABLE(~0u)}, - {28835, S_02882C_RECTANGLE_FILTER_DISABLE(~0u)}, - {28860, S_02882C_TRIANGLE_EXPAND_ENA(~0u)}, - {28880, S_02882C_LINE_EXPAND_ENA(~0u)}, - {28896, S_02882C_POINT_EXPAND_ENA(~0u)}, - {28913, S_02882C_RECTANGLE_EXPAND_ENA(~0u)}, - {28934, S_02882C_PRIM_EXPAND_CONSTANT(~0u)}, - {28955, S_02882C_XMAX_RIGHT_EXCLUSION(~0u)}, - {28976, S_02882C_YMAX_BOTTOM_EXCLUSION(~0u)}, - /* 1642 */ - {28998, S_028830_SMALL_PRIM_FILTER_ENABLE(~0u)}, - {28770, S_028830_TRIANGLE_FILTER_DISABLE(~0u)}, - {28794, S_028830_LINE_FILTER_DISABLE(~0u)}, - {28814, S_028830_POINT_FILTER_DISABLE(~0u)}, - {28835, S_028830_RECTANGLE_FILTER_DISABLE(~0u)}, - /* 1647 */ - {11283, S_028A00_HEIGHT(~0u)}, - {11277, S_028A00_WIDTH(~0u)}, - /* 1649 */ - {29023, S_028A04_MIN_SIZE(~0u)}, - {29032, S_028A04_MAX_SIZE(~0u)}, - /* 1651 */ - {11277, S_028A08_WIDTH(~0u)}, - /* 1652 */ - {29041, S_028A0C_LINE_PATTERN(~0u)}, - {29054, S_028A0C_REPEAT_COUNT(~0u)}, - {29067, S_028A0C_PATTERN_BIT_ORDER(~0u)}, - {29085, S_028A0C_AUTO_RESET_CNTL(~0u)}, - /* 1656 */ - {29206, S_028A10_PATH_SELECT(~0u), 5, 1178}, - /* 1657 */ - {29218, S_028A14_TESS_MODE(~0u)}, - /* 1658 */ - {29228, S_028A20_REUSE_DEPTH(~0u)}, - /* 1659 */ - {5900, S_028A24_PRIM_TYPE(~0u), 18, 1183}, - {29595, S_028A24_RETAIN_ORDER(~0u)}, - {29608, S_028A24_RETAIN_QUADS(~0u)}, - {29689, S_028A24_PRIM_ORDER(~0u), 5, 1201}, - /* 1663 */ - {29700, S_028A28_FIRST_DECR(~0u)}, - /* 1664 */ - {29706, S_028A2C_DECR(~0u)}, - /* 1665 */ - {29711, S_028A30_COMP_X_EN(~0u)}, - {29721, S_028A30_COMP_Y_EN(~0u)}, - {29731, S_028A30_COMP_Z_EN(~0u)}, - {29741, S_028A30_COMP_W_EN(~0u)}, - {8406, S_028A30_STRIDE(~0u)}, - {29751, S_028A30_SHIFT(~0u)}, - /* 1671 */ - {29711, S_028A34_COMP_X_EN(~0u)}, - {29721, S_028A34_COMP_Y_EN(~0u)}, - {29731, S_028A34_COMP_Z_EN(~0u)}, - {29741, S_028A34_COMP_W_EN(~0u)}, - {8406, S_028A34_STRIDE(~0u)}, - {29751, S_028A34_SHIFT(~0u)}, - /* 1677 */ - {29916, S_028A38_X_CONV(~0u), 9, 1206}, - {19308, S_028A38_X_OFFSET(~0u)}, - {29923, S_028A38_Y_CONV(~0u), 9, 1206}, - {19324, S_028A38_Y_OFFSET(~0u)}, - {29930, S_028A38_Z_CONV(~0u), 9, 1206}, - {29937, S_028A38_Z_OFFSET(~0u)}, - {29946, S_028A38_W_CONV(~0u), 9, 1206}, - {29953, S_028A38_W_OFFSET(~0u)}, - /* 1685 */ - {29916, S_028A3C_X_CONV(~0u), 9, 1206}, - {19308, S_028A3C_X_OFFSET(~0u)}, - {29923, S_028A3C_Y_CONV(~0u), 9, 1206}, - {19324, S_028A3C_Y_OFFSET(~0u)}, - {29930, S_028A3C_Z_CONV(~0u), 9, 1206}, - {29937, S_028A3C_Z_OFFSET(~0u)}, - {29946, S_028A3C_W_CONV(~0u), 9, 1206}, - {29953, S_028A3C_W_OFFSET(~0u)}, - /* 1693 */ - {12371, S_028A40_MODE(~0u), 6, 1215}, - {8467, S_028A40_RESERVED_0(~0u)}, - {30080, S_028A40_CUT_MODE(~0u), 4, 1221}, - {8485, S_028A40_RESERVED_1(~0u)}, - {30089, S_028A40_GS_C_PACK_EN(~0u)}, - {30102, S_028A40_RESERVED_2(~0u)}, - {30113, S_028A40_ES_PASSTHRU(~0u)}, - {30125, S_028A40_COMPUTE_MODE(~0u)}, - {30138, S_028A40_FAST_COMPUTE_MODE(~0u)}, - {30156, S_028A40_ELEMENT_INFO_EN(~0u)}, - {30172, S_028A40_PARTIAL_THD_AT_EOI(~0u)}, - {30191, S_028A40_SUPPRESS_CUTS(~0u)}, - {30205, S_028A40_ES_WRITE_OPTIMIZE(~0u)}, - {30223, S_028A40_GS_WRITE_OPTIMIZE(~0u)}, - {30274, S_028A40_ONCHIP(~0u), 4, 1225}, - /* 1708 */ - {30281, S_028A44_ES_VERTS_PER_SUBGRP(~0u)}, - {30301, S_028A44_GS_PRIMS_PER_SUBGRP(~0u)}, - /* 1710 */ - {30321, S_028A48_MSAA_ENABLE(~0u)}, - {30333, S_028A48_VPORT_SCISSOR_ENABLE(~0u)}, - {30354, S_028A48_LINE_STIPPLE_ENABLE(~0u)}, - {30374, S_028A48_SEND_UNLIT_STILES_TO_PKR(~0u)}, - /* 1714 */ - {30399, S_028A4C_WALK_SIZE(~0u)}, - {30409, S_028A4C_WALK_ALIGNMENT(~0u)}, - {30424, S_028A4C_WALK_ALIGN8_PRIM_FITS_ST(~0u)}, - {30449, S_028A4C_WALK_FENCE_ENABLE(~0u)}, - {30467, S_028A4C_WALK_FENCE_SIZE(~0u)}, - {30483, S_028A4C_SUPERTILE_WALK_ORDER_ENABLE(~0u)}, - {30488, S_028A4C_TILE_WALK_ORDER_ENABLE(~0u)}, - {30511, S_028A4C_TILE_COVER_DISABLE(~0u)}, - {30530, S_028A4C_TILE_COVER_NO_SCISSOR(~0u)}, - {30552, S_028A4C_ZMM_LINE_EXTENT(~0u)}, - {30568, S_028A4C_ZMM_LINE_OFFSET(~0u)}, - {30584, S_028A4C_ZMM_RECT_EXTENT(~0u)}, - {30600, S_028A4C_KILL_PIX_POST_HI_Z(~0u)}, - {30619, S_028A4C_KILL_PIX_POST_DETAIL_MASK(~0u)}, - {30645, S_028A4C_PS_ITER_SAMPLE(~0u)}, - {30660, S_028A4C_MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE(~0u)}, - {30700, S_028A4C_MULTI_GPU_SUPERTILE_ENABLE(~0u)}, - {30727, S_028A4C_GPU_ID_OVERRIDE_ENABLE(~0u)}, - {30750, S_028A4C_GPU_ID_OVERRIDE(~0u)}, - {30766, S_028A4C_MULTI_GPU_PRIM_DISCARD_ENABLE(~0u)}, - {30796, S_028A4C_FORCE_EOV_CNTDWN_ENABLE(~0u)}, - {30820, S_028A4C_FORCE_EOV_REZ_ENABLE(~0u)}, - {30841, S_028A4C_OUT_OF_ORDER_PRIMITIVE_ENABLE(~0u)}, - {30871, S_028A4C_OUT_OF_ORDER_WATER_MARK(~0u)}, - /* 1738 */ - {30895, S_028A54_GS_PER_ES(~0u)}, - /* 1739 */ - {30905, S_028A58_ES_PER_GS(~0u)}, - /* 1740 */ - {30915, S_028A5C_GS_PER_VS(~0u)}, - /* 1741 */ - {665, S_028A60_OFFSET(~0u)}, - /* 1742 */ - {665, S_028A64_OFFSET(~0u)}, - /* 1743 */ - {665, S_028A68_OFFSET(~0u)}, - /* 1744 */ - {30993, S_028A6C_OUTPRIM_TYPE(~0u), 3, 1229}, - {31006, S_028A6C_OUTPRIM_TYPE_1(~0u)}, - {31021, S_028A6C_OUTPRIM_TYPE_2(~0u)}, - {31036, S_028A6C_OUTPRIM_TYPE_3(~0u)}, - {31051, S_028A6C_UNIQUE_TYPE_PER_STREAM(~0u)}, - /* 1749 */ - {203, S_028A7C_INDEX_TYPE(~0u), 3, 1232}, - {31188, S_028A7C_SWAP_MODE(~0u), 4, 1235}, - {31249, S_028A7C_BUF_TYPE(~0u), 3, 1239}, - {31291, S_028A7C_RDREQ_POLICY(~0u), 2, 1242}, - {31304, S_028A7C_RDREQ_POLICY_VI(~0u)}, - {9191, S_028A7C_ATC(~0u)}, - {25838, S_028A7C_NOT_EOP(~0u)}, - {31320, S_028A7C_REQ_PATH(~0u)}, - {9212, S_028A7C_MTYPE(~0u)}, - /* 1758 */ - {31329, S_028A84_PRIMITIVEID_EN(~0u)}, - {31344, S_028A84_DISABLE_RESET_ON_EOI(~0u)}, - /* 1760 */ - {32300, S_028A90_EVENT_TYPE(~0u), 65, 1244}, - {8395, S_028A90_ADDRESS_HI(~0u)}, - {32311, S_028A90_EXTENDED_EVENT(~0u)}, - /* 1763 */ - {32326, S_028A94_RESET_EN(~0u)}, - /* 1764 */ - {32335, S_028AA8_PRIMGROUP_SIZE(~0u)}, - {32350, S_028AA8_PARTIAL_VS_WAVE_ON(~0u)}, - {32369, S_028AA8_SWITCH_ON_EOP(~0u)}, - {32383, S_028AA8_PARTIAL_ES_WAVE_ON(~0u)}, - {32402, S_028AA8_SWITCH_ON_EOI(~0u)}, - {32416, S_028AA8_WD_SWITCH_ON_EOP(~0u)}, - {32433, S_028AA8_MAX_PRIMGRP_IN_WAVE(~0u)}, - /* 1771 */ - {32453, S_028AAC_ITEMSIZE(~0u)}, - /* 1772 */ - {32453, S_028AB0_ITEMSIZE(~0u)}, - /* 1773 */ - {32462, S_028AB4_REUSE_OFF(~0u)}, - /* 1774 */ - {32472, S_028AB8_VTX_CNT_EN(~0u)}, - /* 1775 */ - {12476, S_028ABC_LINEAR(~0u)}, - {32483, S_028ABC_FULL_CACHE(~0u)}, - {32494, S_028ABC_HTILE_USES_PRELOAD_WIN(~0u)}, - {32517, S_028ABC_PRELOAD(~0u)}, - {32525, S_028ABC_PREFETCH_WIDTH(~0u)}, - {32540, S_028ABC_PREFETCH_HEIGHT(~0u)}, - {32556, S_028ABC_DST_OUTSIDE_ZERO_TO_ONE(~0u)}, - {32580, S_028ABC_TC_COMPATIBLE(~0u)}, - /* 1783 */ - {32594, S_028AC0_COMPAREFUNC0(~0u), 8, 894}, - {32607, S_028AC0_COMPAREVALUE0(~0u)}, - {32621, S_028AC0_COMPAREMASK0(~0u)}, - {18034, S_028AC0_ENABLE0(~0u)}, - /* 1787 */ - {32634, S_028AC4_COMPAREFUNC1(~0u), 8, 894}, - {32647, S_028AC4_COMPAREVALUE1(~0u)}, - {32661, S_028AC4_COMPAREMASK1(~0u)}, - {18052, S_028AC4_ENABLE1(~0u)}, - /* 1791 */ - {32674, S_028AC8_START_X(~0u)}, - {32682, S_028AC8_START_Y(~0u)}, - {32690, S_028AC8_MAX_X(~0u)}, - {32696, S_028AC8_MAX_Y(~0u)}, - /* 1795 */ - {8406, S_028AD4_STRIDE(~0u)}, - /* 1796 */ - {8406, S_028AE4_STRIDE(~0u)}, - /* 1797 */ - {8406, S_028AF4_STRIDE(~0u)}, - /* 1798 */ - {8406, S_028B04_STRIDE(~0u)}, - /* 1799 */ - {32702, S_028B30_VERTEX_STRIDE(~0u)}, - /* 1800 */ - {32716, S_028B38_MAX_VERT_OUT(~0u)}, - /* 1801 */ - {32729, S_028B50_ACCUM_ISOLINE(~0u)}, - {32743, S_028B50_ACCUM_TRI(~0u)}, - {32753, S_028B50_ACCUM_QUAD(~0u)}, - {32764, S_028B50_DONUT_SPLIT(~0u)}, - /* 1805 */ - {17199, S_028B54_LS_EN(~0u), 3, 1309}, - {17193, S_028B54_HS_EN(~0u)}, - {17187, S_028B54_ES_EN(~0u), 3, 1312}, - {17181, S_028B54_GS_EN(~0u)}, - {17175, S_028B54_VS_EN(~0u), 3, 1315}, - {32899, S_028B54_DYNAMIC_HS(~0u)}, - {15730, S_028B54_DISPATCH_DRAW_EN(~0u)}, - {32910, S_028B54_DIS_DEALLOC_ACCUM_0(~0u)}, - {32930, S_028B54_DIS_DEALLOC_ACCUM_1(~0u)}, - {32950, S_028B54_VS_WAVE_ID_EN(~0u)}, - /* 1815 */ - {32964, S_028B58_NUM_PATCHES(~0u)}, - {32976, S_028B58_HS_NUM_INPUT_CP(~0u)}, - {32992, S_028B58_HS_NUM_OUTPUT_CP(~0u)}, - /* 1818 */ - {32453, S_028B5C_ITEMSIZE(~0u)}, - /* 1819 */ - {32453, S_028B60_ITEMSIZE(~0u)}, - /* 1820 */ - {32453, S_028B64_ITEMSIZE(~0u)}, - /* 1821 */ - {32453, S_028B68_ITEMSIZE(~0u)}, - /* 1822 */ - {209, S_028B6C_TYPE(~0u), 3, 1318}, - {33098, S_028B6C_PARTITIONING(~0u), 4, 1321}, - {33175, S_028B6C_TOPOLOGY(~0u), 4, 1325}, - {33184, S_028B6C_RESERVED_REDUC_AXIS(~0u)}, - {33204, S_028B6C_DEPRECATED(~0u)}, - {33215, S_028B6C_NUM_DS_WAVES_PER_SIMD(~0u)}, - {33237, S_028B6C_DISABLE_DONUTS(~0u)}, - {31291, S_028B6C_RDREQ_POLICY(~0u), 3, 1329}, - {31304, S_028B6C_RDREQ_POLICY_VI(~0u)}, - {33347, S_028B6C_DISTRIBUTION_MODE(~0u), 3, 1332}, - {9212, S_028B6C_MTYPE(~0u)}, - /* 1833 */ - {33365, S_028B70_ALPHA_TO_MASK_ENABLE(~0u)}, - {33386, S_028B70_ALPHA_TO_MASK_OFFSET0(~0u)}, - {33408, S_028B70_ALPHA_TO_MASK_OFFSET1(~0u)}, - {33430, S_028B70_ALPHA_TO_MASK_OFFSET2(~0u)}, - {33452, S_028B70_ALPHA_TO_MASK_OFFSET3(~0u)}, - {33474, S_028B70_OFFSET_ROUND(~0u)}, - /* 1839 */ - {33487, S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(~0u)}, - {33515, S_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(~0u)}, - /* 1841 */ - {8435, S_028B90_ENABLE(~0u)}, - {15646, S_028B90_CNT(~0u)}, - /* 1843 */ - {33543, S_028B94_STREAMOUT_0_EN(~0u)}, - {33558, S_028B94_STREAMOUT_1_EN(~0u)}, - {33573, S_028B94_STREAMOUT_2_EN(~0u)}, - {33588, S_028B94_STREAMOUT_3_EN(~0u)}, - {33603, S_028B94_RAST_STREAM(~0u)}, - {33615, S_028B94_RAST_STREAM_MASK(~0u)}, - {33632, S_028B94_USE_RAST_STREAM_MASK(~0u)}, - /* 1850 */ - {33653, S_028B98_STREAM_0_BUFFER_EN(~0u)}, - {33672, S_028B98_STREAM_1_BUFFER_EN(~0u)}, - {33691, S_028B98_STREAM_2_BUFFER_EN(~0u)}, - {33710, S_028B98_STREAM_3_BUFFER_EN(~0u)}, - /* 1854 */ - {33729, S_028BD4_DISTANCE_0(~0u)}, - {33740, S_028BD4_DISTANCE_1(~0u)}, - {33751, S_028BD4_DISTANCE_2(~0u)}, - {33762, S_028BD4_DISTANCE_3(~0u)}, - {33773, S_028BD4_DISTANCE_4(~0u)}, - {33784, S_028BD4_DISTANCE_5(~0u)}, - {33795, S_028BD4_DISTANCE_6(~0u)}, - {33806, S_028BD4_DISTANCE_7(~0u)}, - /* 1862 */ - {33817, S_028BD8_DISTANCE_8(~0u)}, - {33828, S_028BD8_DISTANCE_9(~0u)}, - {33839, S_028BD8_DISTANCE_10(~0u)}, - {33851, S_028BD8_DISTANCE_11(~0u)}, - {33863, S_028BD8_DISTANCE_12(~0u)}, - {33875, S_028BD8_DISTANCE_13(~0u)}, - {33887, S_028BD8_DISTANCE_14(~0u)}, - {33899, S_028BD8_DISTANCE_15(~0u)}, - /* 1870 */ - {33911, S_028BDC_EXPAND_LINE_WIDTH(~0u)}, - {33929, S_028BDC_LAST_PIXEL(~0u)}, - {33940, S_028BDC_PERPENDICULAR_ENDCAP_ENA(~0u)}, - {33965, S_028BDC_DX10_DIAMOND_TEST_ENA(~0u)}, - /* 1874 */ - {33987, S_028BE0_MSAA_NUM_SAMPLES(~0u)}, - {34004, S_028BE0_AA_MASK_CENTROID_DTMN(~0u)}, - {34026, S_028BE0_MAX_SAMPLE_DIST(~0u)}, - {34042, S_028BE0_MSAA_EXPOSED_SAMPLES(~0u)}, - {34063, S_028BE0_DETAIL_TO_EXPOSED_MODE(~0u)}, - /* 1879 */ - {34086, S_028BE4_PIX_CENTER(~0u)}, - {34147, S_028BE4_ROUND_MODE(~0u), 4, 1335}, - {34363, S_028BE4_QUANT_MODE(~0u), 8, 1339}, - /* 1882 */ - {34374, S_028BF8_S0_X(~0u)}, - {34379, S_028BF8_S0_Y(~0u)}, - {34384, S_028BF8_S1_X(~0u)}, - {34389, S_028BF8_S1_Y(~0u)}, - {34394, S_028BF8_S2_X(~0u)}, - {34399, S_028BF8_S2_Y(~0u)}, - {34404, S_028BF8_S3_X(~0u)}, - {34409, S_028BF8_S3_Y(~0u)}, - /* 1890 */ - {34414, S_028BFC_S4_X(~0u)}, - {34419, S_028BFC_S4_Y(~0u)}, - {34424, S_028BFC_S5_X(~0u)}, - {34429, S_028BFC_S5_Y(~0u)}, - {34434, S_028BFC_S6_X(~0u)}, - {34439, S_028BFC_S6_Y(~0u)}, - {34444, S_028BFC_S7_X(~0u)}, - {34449, S_028BFC_S7_Y(~0u)}, - /* 1898 */ - {34454, S_028C00_S8_X(~0u)}, - {34459, S_028C00_S8_Y(~0u)}, - {34464, S_028C00_S9_X(~0u)}, - {34469, S_028C00_S9_Y(~0u)}, - {34474, S_028C00_S10_X(~0u)}, - {34480, S_028C00_S10_Y(~0u)}, - {34486, S_028C00_S11_X(~0u)}, - {34492, S_028C00_S11_Y(~0u)}, - /* 1906 */ - {34498, S_028C04_S12_X(~0u)}, - {34504, S_028C04_S12_Y(~0u)}, - {34510, S_028C04_S13_X(~0u)}, - {34516, S_028C04_S13_Y(~0u)}, - {34522, S_028C04_S14_X(~0u)}, - {34528, S_028C04_S14_Y(~0u)}, - {34534, S_028C04_S15_X(~0u)}, - {34540, S_028C04_S15_Y(~0u)}, - /* 1914 */ - {34374, S_028C08_S0_X(~0u)}, - {34379, S_028C08_S0_Y(~0u)}, - {34384, S_028C08_S1_X(~0u)}, - {34389, S_028C08_S1_Y(~0u)}, - {34394, S_028C08_S2_X(~0u)}, - {34399, S_028C08_S2_Y(~0u)}, - {34404, S_028C08_S3_X(~0u)}, - {34409, S_028C08_S3_Y(~0u)}, - /* 1922 */ - {34414, S_028C0C_S4_X(~0u)}, - {34419, S_028C0C_S4_Y(~0u)}, - {34424, S_028C0C_S5_X(~0u)}, - {34429, S_028C0C_S5_Y(~0u)}, - {34434, S_028C0C_S6_X(~0u)}, - {34439, S_028C0C_S6_Y(~0u)}, - {34444, S_028C0C_S7_X(~0u)}, - {34449, S_028C0C_S7_Y(~0u)}, - /* 1930 */ - {34454, S_028C10_S8_X(~0u)}, - {34459, S_028C10_S8_Y(~0u)}, - {34464, S_028C10_S9_X(~0u)}, - {34469, S_028C10_S9_Y(~0u)}, - {34474, S_028C10_S10_X(~0u)}, - {34480, S_028C10_S10_Y(~0u)}, - {34486, S_028C10_S11_X(~0u)}, - {34492, S_028C10_S11_Y(~0u)}, - /* 1938 */ - {34498, S_028C14_S12_X(~0u)}, - {34504, S_028C14_S12_Y(~0u)}, - {34510, S_028C14_S13_X(~0u)}, - {34516, S_028C14_S13_Y(~0u)}, - {34522, S_028C14_S14_X(~0u)}, - {34528, S_028C14_S14_Y(~0u)}, - {34534, S_028C14_S15_X(~0u)}, - {34540, S_028C14_S15_Y(~0u)}, - /* 1946 */ - {34374, S_028C18_S0_X(~0u)}, - {34379, S_028C18_S0_Y(~0u)}, - {34384, S_028C18_S1_X(~0u)}, - {34389, S_028C18_S1_Y(~0u)}, - {34394, S_028C18_S2_X(~0u)}, - {34399, S_028C18_S2_Y(~0u)}, - {34404, S_028C18_S3_X(~0u)}, - {34409, S_028C18_S3_Y(~0u)}, - /* 1954 */ - {34414, S_028C1C_S4_X(~0u)}, - {34419, S_028C1C_S4_Y(~0u)}, - {34424, S_028C1C_S5_X(~0u)}, - {34429, S_028C1C_S5_Y(~0u)}, - {34434, S_028C1C_S6_X(~0u)}, - {34439, S_028C1C_S6_Y(~0u)}, - {34444, S_028C1C_S7_X(~0u)}, - {34449, S_028C1C_S7_Y(~0u)}, - /* 1962 */ - {34454, S_028C20_S8_X(~0u)}, - {34459, S_028C20_S8_Y(~0u)}, - {34464, S_028C20_S9_X(~0u)}, - {34469, S_028C20_S9_Y(~0u)}, - {34474, S_028C20_S10_X(~0u)}, - {34480, S_028C20_S10_Y(~0u)}, - {34486, S_028C20_S11_X(~0u)}, - {34492, S_028C20_S11_Y(~0u)}, - /* 1970 */ - {34498, S_028C24_S12_X(~0u)}, - {34504, S_028C24_S12_Y(~0u)}, - {34510, S_028C24_S13_X(~0u)}, - {34516, S_028C24_S13_Y(~0u)}, - {34522, S_028C24_S14_X(~0u)}, - {34528, S_028C24_S14_Y(~0u)}, - {34534, S_028C24_S15_X(~0u)}, - {34540, S_028C24_S15_Y(~0u)}, - /* 1978 */ - {34374, S_028C28_S0_X(~0u)}, - {34379, S_028C28_S0_Y(~0u)}, - {34384, S_028C28_S1_X(~0u)}, - {34389, S_028C28_S1_Y(~0u)}, - {34394, S_028C28_S2_X(~0u)}, - {34399, S_028C28_S2_Y(~0u)}, - {34404, S_028C28_S3_X(~0u)}, - {34409, S_028C28_S3_Y(~0u)}, - /* 1986 */ - {34414, S_028C2C_S4_X(~0u)}, - {34419, S_028C2C_S4_Y(~0u)}, - {34424, S_028C2C_S5_X(~0u)}, - {34429, S_028C2C_S5_Y(~0u)}, - {34434, S_028C2C_S6_X(~0u)}, - {34439, S_028C2C_S6_Y(~0u)}, - {34444, S_028C2C_S7_X(~0u)}, - {34449, S_028C2C_S7_Y(~0u)}, - /* 1994 */ - {34454, S_028C30_S8_X(~0u)}, - {34459, S_028C30_S8_Y(~0u)}, - {34464, S_028C30_S9_X(~0u)}, - {34469, S_028C30_S9_Y(~0u)}, - {34474, S_028C30_S10_X(~0u)}, - {34480, S_028C30_S10_Y(~0u)}, - {34486, S_028C30_S11_X(~0u)}, - {34492, S_028C30_S11_Y(~0u)}, - /* 2002 */ - {34498, S_028C34_S12_X(~0u)}, - {34504, S_028C34_S12_Y(~0u)}, - {34510, S_028C34_S13_X(~0u)}, - {34516, S_028C34_S13_Y(~0u)}, - {34522, S_028C34_S14_X(~0u)}, - {34528, S_028C34_S14_Y(~0u)}, - {34534, S_028C34_S15_X(~0u)}, - {34540, S_028C34_S15_Y(~0u)}, - /* 2010 */ - {34546, S_028C38_AA_MASK_X0Y0(~0u)}, - {34559, S_028C38_AA_MASK_X1Y0(~0u)}, - /* 2012 */ - {34572, S_028C3C_AA_MASK_X0Y1(~0u)}, - {34585, S_028C3C_AA_MASK_X1Y1(~0u)}, - /* 2014 */ - {34598, S_028C40_REALIGN_DQUADS_AFTER_N_WAVES(~0u)}, - /* 2015 */ - {34627, S_028C58_VTX_REUSE_DEPTH(~0u)}, - /* 2016 */ - {34643, S_028C5C_DEALLOC_DIST(~0u)}, - /* 2017 */ - {19261, S_028C64_TILE_MAX(~0u)}, - {34656, S_028C64_FMASK_TILE_MAX(~0u)}, - /* 2019 */ - {19261, S_028C68_TILE_MAX(~0u)}, - /* 2020 */ - {17903, S_028C6C_SLICE_START(~0u)}, - {17915, S_028C6C_SLICE_MAX(~0u)}, - /* 2022 */ - {34722, S_028C70_ENDIAN(~0u), 4, 1347}, - {8750, S_028C70_FORMAT(~0u), 23, 1351}, - {14118, S_028C70_LINEAR_GENERAL(~0u)}, - {35089, S_028C70_NUMBER_TYPE(~0u), 8, 1374}, - {35145, S_028C70_COMP_SWAP(~0u), 4, 1382}, - {26561, S_028C70_FAST_CLEAR(~0u)}, - {18489, S_028C70_COMPRESSION(~0u)}, - {35155, S_028C70_BLEND_CLAMP(~0u)}, - {35167, S_028C70_BLEND_BYPASS(~0u)}, - {35180, S_028C70_SIMPLE_FLOAT(~0u)}, - {34147, S_028C70_ROUND_MODE(~0u)}, - {35193, S_028C70_CMASK_IS_LINEAR(~0u)}, - {35420, S_028C70_BLEND_OPT_DONT_RD_DST(~0u), 8, 1386}, - {35442, S_028C70_BLEND_OPT_DISCARD_PIXEL(~0u), 8, 1386}, - {35466, S_028C70_FMASK_COMPRESSION_DISABLE(~0u)}, - {35492, S_028C70_FMASK_COMPRESS_1FRAG_ONLY(~0u)}, - {35518, S_028C70_DCC_ENABLE(~0u)}, - {35529, S_028C70_CMASK_ADDR_TYPE(~0u)}, - /* 2040 */ - {19089, S_028C74_TILE_MODE_INDEX(~0u)}, - {35545, S_028C74_FMASK_TILE_MODE_INDEX(~0u)}, - {35567, S_028C74_FMASK_BANK_HEIGHT(~0u)}, - {19077, S_028C74_NUM_SAMPLES(~0u)}, - {35585, S_028C74_NUM_FRAGMENTS(~0u)}, - {35599, S_028C74_FORCE_DST_ALPHA_1(~0u)}, - /* 2046 */ - {21633, S_028C78_OVERWRITE_COMBINER_DISABLE(~0u)}, - {35617, S_028C78_KEY_CLEAR_ENABLE(~0u)}, - {35634, S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(~0u)}, - {35662, S_028C78_MIN_COMPRESSED_BLOCK_SIZE(~0u)}, - {35688, S_028C78_MAX_COMPRESSED_BLOCK_SIZE(~0u)}, - {11765, S_028C78_COLOR_TRANSFORM(~0u)}, - {35714, S_028C78_INDEPENDENT_64B_BLOCKS(~0u)}, - {35737, S_028C78_LOSSY_RGB_PRECISION(~0u)}, - {35757, S_028C78_LOSSY_ALPHA_PRECISION(~0u)}, - /* 2055 */ - {19261, S_028C80_TILE_MAX(~0u)}, - /* 2056 */ - {19261, S_028C88_TILE_MAX(~0u)}, -}; - -static const struct si_reg sid_reg_table[] = { - {195, R_370_CONTROL, 4, 0}, - {1039, R_371_DST_ADDR_LO}, - {1051, R_372_DST_ADDR_HI}, - {35779, R_410_CP_DMA_WORD0, 1, 4}, - {35792, R_411_CP_DMA_WORD1, 5, 5}, - {35805, R_412_CP_DMA_WORD2, 1, 10}, - {35818, R_413_CP_DMA_WORD3, 1, 11}, - {35831, R_414_COMMAND, 9, 12}, - {35839, R_500_DMA_DATA_WORD0, 4, 21}, - {936, R_501_SRC_ADDR_LO}, - {1027, R_502_SRC_ADDR_HI}, - {1039, R_503_DST_ADDR_LO}, - {1051, R_504_DST_ADDR_HI}, - {35854, R_000E4C_SRBM_STATUS2, 21, 25}, - {35867, R_000E50_SRBM_STATUS, 20, 46}, - {35879, R_000E54_SRBM_STATUS3, 16, 66}, - {35892, R_00D034_SDMA0_STATUS_REG, 29, 82}, - {35909, R_00D834_SDMA1_STATUS_REG, 29, 82}, - {35926, R_008008_GRBM_STATUS2, 18, 111}, - {35939, R_008010_GRBM_STATUS, 24, 129}, - {35951, R_0084FC_CP_STRMOUT_CNTL, 1, 153}, - {35967, R_0085F0_CP_COHER_CNTL, 19, 154}, - {35981, R_0085F4_CP_COHER_SIZE}, - {35995, R_0085F8_CP_COHER_BASE}, - {36009, R_008014_GRBM_STATUS_SE0, 11, 173}, - {36025, R_008018_GRBM_STATUS_SE1, 11, 184}, - {36041, R_008038_GRBM_STATUS_SE2, 11, 195}, - {36057, R_00803C_GRBM_STATUS_SE3, 11, 206}, - {35951, R_0300FC_CP_STRMOUT_CNTL, 1, 217}, - {36073, R_0301E4_CP_COHER_BASE_HI, 1, 218}, - {36090, R_0301EC_CP_COHER_START_DELAY, 1, 219}, - {35967, R_0301F0_CP_COHER_CNTL, 27, 220}, - {35981, R_0301F4_CP_COHER_SIZE}, - {35995, R_0301F8_CP_COHER_BASE}, - {36111, R_0301FC_CP_COHER_STATUS, 4, 247}, - {36127, R_008210_CP_CPC_STATUS, 15, 251}, - {36141, R_008214_CP_CPC_BUSY_STAT, 28, 266}, - {36158, R_008218_CP_CPC_STALLED_STAT1, 14, 294}, - {36179, R_00821C_CP_CPF_STATUS, 21, 308}, - {36193, R_008220_CP_CPF_BUSY_STAT, 31, 329}, - {36210, R_008224_CP_CPF_STALLED_STAT1, 9, 360}, - {36231, R_030230_CP_COHER_SIZE_HI, 1, 369}, - {36248, R_0088B0_VGT_VTX_VECT_EJECT_REG, 1, 370}, - {36271, R_0088C4_VGT_CACHE_INVALIDATION, 3, 371}, - {36294, R_0088C8_VGT_ESGS_RING_SIZE}, - {36313, R_0088CC_VGT_GSVS_RING_SIZE}, - {36332, R_0088D4_VGT_GS_VERTEX_REUSE, 1, 374}, - {36352, R_008958_VGT_PRIMITIVE_TYPE, 1, 375}, - {36371, R_00895C_VGT_INDEX_TYPE, 1, 376}, - {36386, R_008960_VGT_STRMOUT_BUFFER_FILLED_SIZE_0}, - {36419, R_008964_VGT_STRMOUT_BUFFER_FILLED_SIZE_1}, - {36452, R_008968_VGT_STRMOUT_BUFFER_FILLED_SIZE_2}, - {36485, R_00896C_VGT_STRMOUT_BUFFER_FILLED_SIZE_3}, - {36518, R_008970_VGT_NUM_INDICES}, - {36534, R_008974_VGT_NUM_INSTANCES}, - {36552, R_008988_VGT_TF_RING_SIZE, 1, 377}, - {36569, R_0089B0_VGT_HS_OFFCHIP_PARAM, 1, 378}, - {36590, R_0089B8_VGT_TF_MEMORY_BASE}, - {36609, R_008A14_PA_CL_ENHANCE, 4, 379}, - {36623, R_008A60_PA_SU_LINE_STIPPLE_VALUE, 1, 383}, - {36648, R_008B10_PA_SC_LINE_STIPPLE_STATE, 2, 384}, - {36673, R_008670_CP_STALLED_STAT3, 19, 386}, - {36690, R_008674_CP_STALLED_STAT1, 16, 405}, - {36707, R_008678_CP_STALLED_STAT2, 29, 421}, - {36724, R_008680_CP_STAT, 23, 450}, - {36732, R_030800_GRBM_GFX_INDEX, 6, 473}, - {36294, R_030900_VGT_ESGS_RING_SIZE}, - {36313, R_030904_VGT_GSVS_RING_SIZE}, - {36352, R_030908_VGT_PRIMITIVE_TYPE, 1, 479}, - {36371, R_03090C_VGT_INDEX_TYPE, 1, 480}, - {36386, R_030910_VGT_STRMOUT_BUFFER_FILLED_SIZE_0}, - {36419, R_030914_VGT_STRMOUT_BUFFER_FILLED_SIZE_1}, - {36452, R_030918_VGT_STRMOUT_BUFFER_FILLED_SIZE_2}, - {36485, R_03091C_VGT_STRMOUT_BUFFER_FILLED_SIZE_3}, - {36518, R_030930_VGT_NUM_INDICES}, - {36534, R_030934_VGT_NUM_INSTANCES}, - {36552, R_030938_VGT_TF_RING_SIZE, 1, 481}, - {36569, R_03093C_VGT_HS_OFFCHIP_PARAM, 2, 482}, - {36590, R_030940_VGT_TF_MEMORY_BASE}, - {36623, R_030A00_PA_SU_LINE_STIPPLE_VALUE, 1, 484}, - {36648, R_030A04_PA_SC_LINE_STIPPLE_STATE, 2, 485}, - {36747, R_030A10_PA_SC_SCREEN_EXTENT_MIN_0, 2, 487}, - {36773, R_030A14_PA_SC_SCREEN_EXTENT_MAX_0, 2, 489}, - {36799, R_030A18_PA_SC_SCREEN_EXTENT_MIN_1, 2, 491}, - {36825, R_030A2C_PA_SC_SCREEN_EXTENT_MAX_1, 2, 493}, - {36851, R_008BF0_PA_SC_ENHANCE, 9, 495}, - {36865, R_008C08_SQC_CACHES, 2, 504}, - {36865, R_030D20_SQC_CACHES, 3, 506}, - {36876, R_008C0C_SQ_RANDOM_WAVE_PRI, 3, 509}, - {36895, R_008DFC_SQ_EXP_0, 6, 512}, - {36904, R_030E00_TA_CS_BC_BASE_ADDR}, - {36923, R_030E04_TA_CS_BC_BASE_ADDR_HI, 1, 518}, - {36945, R_030F00_DB_OCCLUSION_COUNT0_LOW}, - {36969, R_008F00_SQ_BUF_RSRC_WORD0}, - {36987, R_030F04_DB_OCCLUSION_COUNT0_HI, 1, 519}, - {37010, R_008F04_SQ_BUF_RSRC_WORD1, 4, 520}, - {37028, R_030F08_DB_OCCLUSION_COUNT1_LOW}, - {37052, R_008F08_SQ_BUF_RSRC_WORD2}, - {37070, R_030F0C_DB_OCCLUSION_COUNT1_HI, 1, 524}, - {37093, R_008F0C_SQ_BUF_RSRC_WORD3, 14, 525}, - {37111, R_030F10_DB_OCCLUSION_COUNT2_LOW}, - {37135, R_008F10_SQ_IMG_RSRC_WORD0}, - {37153, R_030F14_DB_OCCLUSION_COUNT2_HI, 1, 539}, - {37176, R_008F14_SQ_IMG_RSRC_WORD1, 5, 540}, - {37194, R_030F18_DB_OCCLUSION_COUNT3_LOW}, - {37218, R_008F18_SQ_IMG_RSRC_WORD2, 4, 545}, - {37236, R_030F1C_DB_OCCLUSION_COUNT3_HI, 1, 549}, - {37259, R_008F1C_SQ_IMG_RSRC_WORD3, 11, 550}, - {37277, R_008F20_SQ_IMG_RSRC_WORD4, 2, 561}, - {37295, R_008F24_SQ_IMG_RSRC_WORD5, 2, 563}, - {37313, R_008F28_SQ_IMG_RSRC_WORD6, 8, 565}, - {37331, R_008F2C_SQ_IMG_RSRC_WORD7}, - {37349, R_008F30_SQ_IMG_SAMP_WORD0, 12, 573}, - {37367, R_008F34_SQ_IMG_SAMP_WORD1, 4, 585}, - {37385, R_008F38_SQ_IMG_SAMP_WORD2, 10, 589}, - {37403, R_008F3C_SQ_IMG_SAMP_WORD3, 2, 599}, - {37421, R_0090DC_SPI_DYN_GPR_LOCK_EN, 5, 601}, - {37441, R_0090E0_SPI_STATIC_THREAD_MGMT_1, 2, 606}, - {37466, R_0090E4_SPI_STATIC_THREAD_MGMT_2, 2, 608}, - {37491, R_0090E8_SPI_STATIC_THREAD_MGMT_3, 1, 610}, - {37516, R_0090EC_SPI_PS_MAX_WAVE_ID, 1, 611}, - {37516, R_0090E8_SPI_PS_MAX_WAVE_ID, 1, 612}, - {37535, R_0090F0_SPI_ARB_PRIORITY, 3, 613}, - {37535, R_00C700_SPI_ARB_PRIORITY, 8, 616}, - {37552, R_0090F4_SPI_ARB_CYCLES_0, 2, 624}, - {37569, R_0090F8_SPI_ARB_CYCLES_1, 1, 626}, - {37586, R_008F40_SQ_FLAT_SCRATCH_WORD0, 1, 627}, - {37608, R_008F44_SQ_FLAT_SCRATCH_WORD1, 1, 628}, - {37630, R_030FF8_DB_ZPASS_COUNT_LOW}, - {37649, R_030FFC_DB_ZPASS_COUNT_HI, 1, 629}, - {37667, R_009100_SPI_CONFIG_CNTL, 5, 630}, - {37683, R_00913C_SPI_CONFIG_CNTL_1, 5, 635}, - {37701, R_00936C_SPI_RESOURCE_RESERVE_CU_AB_0, 12, 640}, - {36904, R_00950C_TA_CS_BC_BASE_ADDR}, - {37730, R_009858_DB_SUBTILE_CONTROL, 10, 652}, - {37749, R_0098F8_GB_ADDR_CONFIG, 9, 662}, - {37764, R_009910_GB_TILE_MODE0, 10, 671}, - {37778, R_009914_GB_TILE_MODE1, 10, 671}, - {37792, R_009918_GB_TILE_MODE2, 10, 671}, - {37806, R_00991C_GB_TILE_MODE3, 10, 671}, - {37820, R_009920_GB_TILE_MODE4, 10, 671}, - {37834, R_009924_GB_TILE_MODE5, 10, 671}, - {37848, R_009928_GB_TILE_MODE6, 10, 671}, - {37862, R_00992C_GB_TILE_MODE7, 10, 671}, - {37876, R_009930_GB_TILE_MODE8, 10, 671}, - {37890, R_009934_GB_TILE_MODE9, 10, 671}, - {37904, R_009938_GB_TILE_MODE10, 10, 671}, - {37919, R_00993C_GB_TILE_MODE11, 10, 671}, - {37934, R_009940_GB_TILE_MODE12, 10, 671}, - {37949, R_009944_GB_TILE_MODE13, 10, 671}, - {37964, R_009948_GB_TILE_MODE14, 10, 671}, - {37979, R_00994C_GB_TILE_MODE15, 10, 671}, - {37994, R_009950_GB_TILE_MODE16, 10, 671}, - {38009, R_009954_GB_TILE_MODE17, 10, 671}, - {38024, R_009958_GB_TILE_MODE18, 10, 671}, - {38039, R_00995C_GB_TILE_MODE19, 10, 671}, - {38054, R_009960_GB_TILE_MODE20, 10, 671}, - {38069, R_009964_GB_TILE_MODE21, 10, 671}, - {38084, R_009968_GB_TILE_MODE22, 10, 671}, - {38099, R_00996C_GB_TILE_MODE23, 10, 671}, - {38114, R_009970_GB_TILE_MODE24, 10, 671}, - {38129, R_009974_GB_TILE_MODE25, 10, 671}, - {38144, R_009978_GB_TILE_MODE26, 10, 671}, - {38159, R_00997C_GB_TILE_MODE27, 10, 671}, - {38174, R_009980_GB_TILE_MODE28, 10, 671}, - {38189, R_009984_GB_TILE_MODE29, 10, 671}, - {38204, R_009988_GB_TILE_MODE30, 10, 671}, - {38219, R_00998C_GB_TILE_MODE31, 10, 671}, - {38234, R_009990_GB_MACROTILE_MODE0, 4, 681}, - {38253, R_009994_GB_MACROTILE_MODE1, 4, 681}, - {38272, R_009998_GB_MACROTILE_MODE2, 4, 681}, - {38291, R_00999C_GB_MACROTILE_MODE3, 4, 681}, - {38310, R_0099A0_GB_MACROTILE_MODE4, 4, 681}, - {38329, R_0099A4_GB_MACROTILE_MODE5, 4, 681}, - {38348, R_0099A8_GB_MACROTILE_MODE6, 4, 681}, - {38367, R_0099AC_GB_MACROTILE_MODE7, 4, 681}, - {38386, R_0099B0_GB_MACROTILE_MODE8, 4, 681}, - {38405, R_0099B4_GB_MACROTILE_MODE9, 4, 681}, - {38424, R_0099B8_GB_MACROTILE_MODE10, 4, 681}, - {38444, R_0099BC_GB_MACROTILE_MODE11, 4, 681}, - {38464, R_0099C0_GB_MACROTILE_MODE12, 4, 681}, - {38484, R_0099C4_GB_MACROTILE_MODE13, 4, 681}, - {38504, R_0099C8_GB_MACROTILE_MODE14, 4, 681}, - {38524, R_0099CC_GB_MACROTILE_MODE15, 4, 681}, - {38544, R_00B000_SPI_SHADER_TBA_LO_PS}, - {38565, R_00B004_SPI_SHADER_TBA_HI_PS, 1, 685}, - {38586, R_00B008_SPI_SHADER_TMA_LO_PS}, - {38607, R_00B00C_SPI_SHADER_TMA_HI_PS, 1, 686}, - {38628, R_00B01C_SPI_SHADER_PGM_RSRC3_PS, 3, 687}, - {38652, R_00B020_SPI_SHADER_PGM_LO_PS}, - {38673, R_00B024_SPI_SHADER_PGM_HI_PS, 1, 690}, - {38694, R_00B028_SPI_SHADER_PGM_RSRC1_PS, 11, 691}, - {38718, R_00B02C_SPI_SHADER_PGM_RSRC2_PS, 7, 702}, - {38742, R_00B030_SPI_SHADER_USER_DATA_PS_0}, - {38768, R_00B034_SPI_SHADER_USER_DATA_PS_1}, - {38794, R_00B038_SPI_SHADER_USER_DATA_PS_2}, - {38820, R_00B03C_SPI_SHADER_USER_DATA_PS_3}, - {38846, R_00B040_SPI_SHADER_USER_DATA_PS_4}, - {38872, R_00B044_SPI_SHADER_USER_DATA_PS_5}, - {38898, R_00B048_SPI_SHADER_USER_DATA_PS_6}, - {38924, R_00B04C_SPI_SHADER_USER_DATA_PS_7}, - {38950, R_00B050_SPI_SHADER_USER_DATA_PS_8}, - {38976, R_00B054_SPI_SHADER_USER_DATA_PS_9}, - {39002, R_00B058_SPI_SHADER_USER_DATA_PS_10}, - {39029, R_00B05C_SPI_SHADER_USER_DATA_PS_11}, - {39056, R_00B060_SPI_SHADER_USER_DATA_PS_12}, - {39083, R_00B064_SPI_SHADER_USER_DATA_PS_13}, - {39110, R_00B068_SPI_SHADER_USER_DATA_PS_14}, - {39137, R_00B06C_SPI_SHADER_USER_DATA_PS_15}, - {39164, R_00B100_SPI_SHADER_TBA_LO_VS}, - {39185, R_00B104_SPI_SHADER_TBA_HI_VS, 1, 709}, - {39206, R_00B108_SPI_SHADER_TMA_LO_VS}, - {39227, R_00B10C_SPI_SHADER_TMA_HI_VS, 1, 710}, - {39248, R_00B118_SPI_SHADER_PGM_RSRC3_VS, 3, 711}, - {39272, R_00B11C_SPI_SHADER_LATE_ALLOC_VS, 1, 714}, - {39297, R_00B120_SPI_SHADER_PGM_LO_VS}, - {39318, R_00B124_SPI_SHADER_PGM_HI_VS, 1, 715}, - {39339, R_00B128_SPI_SHADER_PGM_RSRC1_VS, 12, 716}, - {39363, R_00B12C_SPI_SHADER_PGM_RSRC2_VS, 12, 728}, - {39387, R_00B130_SPI_SHADER_USER_DATA_VS_0}, - {39413, R_00B134_SPI_SHADER_USER_DATA_VS_1}, - {39439, R_00B138_SPI_SHADER_USER_DATA_VS_2}, - {39465, R_00B13C_SPI_SHADER_USER_DATA_VS_3}, - {39491, R_00B140_SPI_SHADER_USER_DATA_VS_4}, - {39517, R_00B144_SPI_SHADER_USER_DATA_VS_5}, - {39543, R_00B148_SPI_SHADER_USER_DATA_VS_6}, - {39569, R_00B14C_SPI_SHADER_USER_DATA_VS_7}, - {39595, R_00B150_SPI_SHADER_USER_DATA_VS_8}, - {39621, R_00B154_SPI_SHADER_USER_DATA_VS_9}, - {39647, R_00B158_SPI_SHADER_USER_DATA_VS_10}, - {39674, R_00B15C_SPI_SHADER_USER_DATA_VS_11}, - {39701, R_00B160_SPI_SHADER_USER_DATA_VS_12}, - {39728, R_00B164_SPI_SHADER_USER_DATA_VS_13}, - {39755, R_00B168_SPI_SHADER_USER_DATA_VS_14}, - {39782, R_00B16C_SPI_SHADER_USER_DATA_VS_15}, - {39809, R_00B200_SPI_SHADER_TBA_LO_GS}, - {39830, R_00B204_SPI_SHADER_TBA_HI_GS, 1, 740}, - {39851, R_00B208_SPI_SHADER_TMA_LO_GS}, - {39872, R_00B20C_SPI_SHADER_TMA_HI_GS, 1, 741}, - {39893, R_00B21C_SPI_SHADER_PGM_RSRC3_GS, 4, 742}, - {39917, R_00B220_SPI_SHADER_PGM_LO_GS}, - {39938, R_00B224_SPI_SHADER_PGM_HI_GS, 1, 746}, - {39959, R_00B228_SPI_SHADER_PGM_RSRC1_GS, 11, 747}, - {39983, R_00B22C_SPI_SHADER_PGM_RSRC2_GS, 5, 758}, - {40007, R_00B230_SPI_SHADER_USER_DATA_GS_0}, - {40033, R_00B234_SPI_SHADER_USER_DATA_GS_1}, - {40059, R_00B238_SPI_SHADER_USER_DATA_GS_2}, - {40085, R_00B23C_SPI_SHADER_USER_DATA_GS_3}, - {40111, R_00B240_SPI_SHADER_USER_DATA_GS_4}, - {40137, R_00B244_SPI_SHADER_USER_DATA_GS_5}, - {40163, R_00B248_SPI_SHADER_USER_DATA_GS_6}, - {40189, R_00B24C_SPI_SHADER_USER_DATA_GS_7}, - {40215, R_00B250_SPI_SHADER_USER_DATA_GS_8}, - {40241, R_00B254_SPI_SHADER_USER_DATA_GS_9}, - {40267, R_00B258_SPI_SHADER_USER_DATA_GS_10}, - {40294, R_00B25C_SPI_SHADER_USER_DATA_GS_11}, - {40321, R_00B260_SPI_SHADER_USER_DATA_GS_12}, - {40348, R_00B264_SPI_SHADER_USER_DATA_GS_13}, - {40375, R_00B268_SPI_SHADER_USER_DATA_GS_14}, - {40402, R_00B26C_SPI_SHADER_USER_DATA_GS_15}, - {40429, R_00B300_SPI_SHADER_TBA_LO_ES}, - {40450, R_00B304_SPI_SHADER_TBA_HI_ES, 1, 763}, - {40471, R_00B308_SPI_SHADER_TMA_LO_ES}, - {40492, R_00B30C_SPI_SHADER_TMA_HI_ES, 1, 764}, - {40513, R_00B31C_SPI_SHADER_PGM_RSRC3_ES, 4, 765}, - {40537, R_00B320_SPI_SHADER_PGM_LO_ES}, - {40558, R_00B324_SPI_SHADER_PGM_HI_ES, 1, 769}, - {40579, R_00B328_SPI_SHADER_PGM_RSRC1_ES, 12, 770}, - {40603, R_00B32C_SPI_SHADER_PGM_RSRC2_ES, 6, 782}, - {40627, R_00B330_SPI_SHADER_USER_DATA_ES_0}, - {40653, R_00B334_SPI_SHADER_USER_DATA_ES_1}, - {40679, R_00B338_SPI_SHADER_USER_DATA_ES_2}, - {40705, R_00B33C_SPI_SHADER_USER_DATA_ES_3}, - {40731, R_00B340_SPI_SHADER_USER_DATA_ES_4}, - {40757, R_00B344_SPI_SHADER_USER_DATA_ES_5}, - {40783, R_00B348_SPI_SHADER_USER_DATA_ES_6}, - {40809, R_00B34C_SPI_SHADER_USER_DATA_ES_7}, - {40835, R_00B350_SPI_SHADER_USER_DATA_ES_8}, - {40861, R_00B354_SPI_SHADER_USER_DATA_ES_9}, - {40887, R_00B358_SPI_SHADER_USER_DATA_ES_10}, - {40914, R_00B35C_SPI_SHADER_USER_DATA_ES_11}, - {40941, R_00B360_SPI_SHADER_USER_DATA_ES_12}, - {40968, R_00B364_SPI_SHADER_USER_DATA_ES_13}, - {40995, R_00B368_SPI_SHADER_USER_DATA_ES_14}, - {41022, R_00B36C_SPI_SHADER_USER_DATA_ES_15}, - {41049, R_00B400_SPI_SHADER_TBA_LO_HS}, - {41070, R_00B404_SPI_SHADER_TBA_HI_HS, 1, 788}, - {41091, R_00B408_SPI_SHADER_TMA_LO_HS}, - {41112, R_00B40C_SPI_SHADER_TMA_HI_HS, 1, 789}, - {41133, R_00B41C_SPI_SHADER_PGM_RSRC3_HS, 3, 790}, - {41157, R_00B420_SPI_SHADER_PGM_LO_HS}, - {41178, R_00B424_SPI_SHADER_PGM_HI_HS, 1, 793}, - {41199, R_00B428_SPI_SHADER_PGM_RSRC1_HS, 10, 794}, - {41223, R_00B42C_SPI_SHADER_PGM_RSRC2_HS, 6, 804}, - {41247, R_00B430_SPI_SHADER_USER_DATA_HS_0}, - {41273, R_00B434_SPI_SHADER_USER_DATA_HS_1}, - {41299, R_00B438_SPI_SHADER_USER_DATA_HS_2}, - {41325, R_00B43C_SPI_SHADER_USER_DATA_HS_3}, - {41351, R_00B440_SPI_SHADER_USER_DATA_HS_4}, - {41377, R_00B444_SPI_SHADER_USER_DATA_HS_5}, - {41403, R_00B448_SPI_SHADER_USER_DATA_HS_6}, - {41429, R_00B44C_SPI_SHADER_USER_DATA_HS_7}, - {41455, R_00B450_SPI_SHADER_USER_DATA_HS_8}, - {41481, R_00B454_SPI_SHADER_USER_DATA_HS_9}, - {41507, R_00B458_SPI_SHADER_USER_DATA_HS_10}, - {41534, R_00B45C_SPI_SHADER_USER_DATA_HS_11}, - {41561, R_00B460_SPI_SHADER_USER_DATA_HS_12}, - {41588, R_00B464_SPI_SHADER_USER_DATA_HS_13}, - {41615, R_00B468_SPI_SHADER_USER_DATA_HS_14}, - {41642, R_00B46C_SPI_SHADER_USER_DATA_HS_15}, - {41669, R_00B500_SPI_SHADER_TBA_LO_LS}, - {41690, R_00B504_SPI_SHADER_TBA_HI_LS, 1, 810}, - {41711, R_00B508_SPI_SHADER_TMA_LO_LS}, - {41732, R_00B50C_SPI_SHADER_TMA_HI_LS, 1, 811}, - {41753, R_00B51C_SPI_SHADER_PGM_RSRC3_LS, 4, 812}, - {41777, R_00B520_SPI_SHADER_PGM_LO_LS}, - {41798, R_00B524_SPI_SHADER_PGM_HI_LS, 1, 816}, - {41819, R_00B528_SPI_SHADER_PGM_RSRC1_LS, 11, 817}, - {41843, R_00B52C_SPI_SHADER_PGM_RSRC2_LS, 5, 828}, - {41867, R_00B530_SPI_SHADER_USER_DATA_LS_0}, - {41893, R_00B534_SPI_SHADER_USER_DATA_LS_1}, - {41919, R_00B538_SPI_SHADER_USER_DATA_LS_2}, - {41945, R_00B53C_SPI_SHADER_USER_DATA_LS_3}, - {41971, R_00B540_SPI_SHADER_USER_DATA_LS_4}, - {41997, R_00B544_SPI_SHADER_USER_DATA_LS_5}, - {42023, R_00B548_SPI_SHADER_USER_DATA_LS_6}, - {42049, R_00B54C_SPI_SHADER_USER_DATA_LS_7}, - {42075, R_00B550_SPI_SHADER_USER_DATA_LS_8}, - {42101, R_00B554_SPI_SHADER_USER_DATA_LS_9}, - {42127, R_00B558_SPI_SHADER_USER_DATA_LS_10}, - {42154, R_00B55C_SPI_SHADER_USER_DATA_LS_11}, - {42181, R_00B560_SPI_SHADER_USER_DATA_LS_12}, - {42208, R_00B564_SPI_SHADER_USER_DATA_LS_13}, - {42235, R_00B568_SPI_SHADER_USER_DATA_LS_14}, - {42262, R_00B56C_SPI_SHADER_USER_DATA_LS_15}, - {42289, R_00B800_COMPUTE_DISPATCH_INITIATOR, 12, 833}, - {42316, R_00B804_COMPUTE_DIM_X}, - {42330, R_00B808_COMPUTE_DIM_Y}, - {42344, R_00B80C_COMPUTE_DIM_Z}, - {42358, R_00B810_COMPUTE_START_X}, - {42374, R_00B814_COMPUTE_START_Y}, - {42390, R_00B818_COMPUTE_START_Z}, - {42406, R_00B81C_COMPUTE_NUM_THREAD_X, 2, 845}, - {42427, R_00B820_COMPUTE_NUM_THREAD_Y, 2, 847}, - {42448, R_00B824_COMPUTE_NUM_THREAD_Z, 2, 849}, - {42469, R_00B82C_COMPUTE_MAX_WAVE_ID, 1, 851}, - {42489, R_00B828_COMPUTE_PIPELINESTAT_ENABLE, 1, 852}, - {42517, R_00B82C_COMPUTE_PERFCOUNT_ENABLE, 1, 853}, - {42542, R_00B830_COMPUTE_PGM_LO}, - {42557, R_00B834_COMPUTE_PGM_HI, 2, 854}, - {42572, R_00B838_COMPUTE_TBA_LO}, - {42587, R_00B83C_COMPUTE_TBA_HI, 1, 856}, - {42602, R_00B840_COMPUTE_TMA_LO}, - {42617, R_00B844_COMPUTE_TMA_HI, 1, 857}, - {42632, R_00B848_COMPUTE_PGM_RSRC1, 10, 858}, - {42650, R_00B84C_COMPUTE_PGM_RSRC2, 11, 868}, - {42668, R_00B850_COMPUTE_VMID, 1, 879}, - {42681, R_00B854_COMPUTE_RESOURCE_LIMITS, 7, 880}, - {42705, R_00B858_COMPUTE_STATIC_THREAD_MGMT_SE0, 2, 887}, - {42736, R_00B85C_COMPUTE_STATIC_THREAD_MGMT_SE1, 2, 889}, - {42767, R_00B860_COMPUTE_TMPRING_SIZE, 2, 891}, - {42788, R_00B864_COMPUTE_STATIC_THREAD_MGMT_SE2, 2, 893}, - {42819, R_00B868_COMPUTE_STATIC_THREAD_MGMT_SE3, 2, 895}, - {42850, R_00B86C_COMPUTE_RESTART_X}, - {42868, R_00B870_COMPUTE_RESTART_Y}, - {42886, R_00B874_COMPUTE_RESTART_Z}, - {42904, R_00B87C_COMPUTE_MISC_RESERVED, 5, 897}, - {42926, R_00B880_COMPUTE_DISPATCH_ID}, - {42946, R_00B884_COMPUTE_THREADGROUP_ID}, - {42969, R_00B888_COMPUTE_RELAUNCH, 3, 902}, - {42986, R_00B88C_COMPUTE_WAVE_RESTORE_ADDR_LO}, - {43015, R_00B890_COMPUTE_WAVE_RESTORE_ADDR_HI, 1, 905}, - {43044, R_00B894_COMPUTE_WAVE_RESTORE_CONTROL, 2, 906}, - {43073, R_00B900_COMPUTE_USER_DATA_0}, - {43093, R_00B904_COMPUTE_USER_DATA_1}, - {43113, R_00B908_COMPUTE_USER_DATA_2}, - {43133, R_00B90C_COMPUTE_USER_DATA_3}, - {43153, R_00B910_COMPUTE_USER_DATA_4}, - {43173, R_00B914_COMPUTE_USER_DATA_5}, - {43193, R_00B918_COMPUTE_USER_DATA_6}, - {43213, R_00B91C_COMPUTE_USER_DATA_7}, - {43233, R_00B920_COMPUTE_USER_DATA_8}, - {43253, R_00B924_COMPUTE_USER_DATA_9}, - {43273, R_00B928_COMPUTE_USER_DATA_10}, - {43294, R_00B92C_COMPUTE_USER_DATA_11}, - {43315, R_00B930_COMPUTE_USER_DATA_12}, - {43336, R_00B934_COMPUTE_USER_DATA_13}, - {43357, R_00B938_COMPUTE_USER_DATA_14}, - {43378, R_00B93C_COMPUTE_USER_DATA_15}, - {43399, R_00B9FC_COMPUTE_NOWHERE}, - {43415, R_034000_CPG_PERFCOUNTER1_LO}, - {43435, R_034004_CPG_PERFCOUNTER1_HI}, - {43455, R_034008_CPG_PERFCOUNTER0_LO}, - {43475, R_03400C_CPG_PERFCOUNTER0_HI}, - {43495, R_034010_CPC_PERFCOUNTER1_LO}, - {43515, R_034014_CPC_PERFCOUNTER1_HI}, - {43535, R_034018_CPC_PERFCOUNTER0_LO}, - {43555, R_03401C_CPC_PERFCOUNTER0_HI}, - {43575, R_034020_CPF_PERFCOUNTER1_LO}, - {43595, R_034024_CPF_PERFCOUNTER1_HI}, - {43615, R_034028_CPF_PERFCOUNTER0_LO}, - {43635, R_03402C_CPF_PERFCOUNTER0_HI}, - {43655, R_034100_GRBM_PERFCOUNTER0_LO}, - {43676, R_034104_GRBM_PERFCOUNTER0_HI}, - {43697, R_03410C_GRBM_PERFCOUNTER1_LO}, - {43718, R_034110_GRBM_PERFCOUNTER1_HI}, - {43739, R_034114_GRBM_SE0_PERFCOUNTER_LO}, - {43763, R_034118_GRBM_SE0_PERFCOUNTER_HI}, - {43787, R_03411C_GRBM_SE1_PERFCOUNTER_LO}, - {43811, R_034120_GRBM_SE1_PERFCOUNTER_HI}, - {43835, R_034124_GRBM_SE2_PERFCOUNTER_LO}, - {43859, R_034128_GRBM_SE2_PERFCOUNTER_HI}, - {43883, R_03412C_GRBM_SE3_PERFCOUNTER_LO}, - {43907, R_034130_GRBM_SE3_PERFCOUNTER_HI}, - {43931, R_034200_WD_PERFCOUNTER0_LO}, - {43950, R_034204_WD_PERFCOUNTER0_HI}, - {43969, R_034208_WD_PERFCOUNTER1_LO}, - {43988, R_03420C_WD_PERFCOUNTER1_HI}, - {44007, R_034210_WD_PERFCOUNTER2_LO}, - {44026, R_034214_WD_PERFCOUNTER2_HI}, - {44045, R_034218_WD_PERFCOUNTER3_LO}, - {44064, R_03421C_WD_PERFCOUNTER3_HI}, - {44083, R_034220_IA_PERFCOUNTER0_LO}, - {44102, R_034224_IA_PERFCOUNTER0_HI}, - {44121, R_034228_IA_PERFCOUNTER1_LO}, - {44140, R_03422C_IA_PERFCOUNTER1_HI}, - {44159, R_034230_IA_PERFCOUNTER2_LO}, - {44178, R_034234_IA_PERFCOUNTER2_HI}, - {44197, R_034238_IA_PERFCOUNTER3_LO}, - {44216, R_03423C_IA_PERFCOUNTER3_HI}, - {44235, R_034240_VGT_PERFCOUNTER0_LO}, - {44255, R_034244_VGT_PERFCOUNTER0_HI}, - {44275, R_034248_VGT_PERFCOUNTER1_LO}, - {44295, R_03424C_VGT_PERFCOUNTER1_HI}, - {44315, R_034250_VGT_PERFCOUNTER2_LO}, - {44335, R_034254_VGT_PERFCOUNTER2_HI}, - {44355, R_034258_VGT_PERFCOUNTER3_LO}, - {44375, R_03425C_VGT_PERFCOUNTER3_HI}, - {44395, R_034400_PA_SU_PERFCOUNTER0_LO}, - {44417, R_034404_PA_SU_PERFCOUNTER0_HI, 1, 908}, - {44439, R_034408_PA_SU_PERFCOUNTER1_LO}, - {44461, R_03440C_PA_SU_PERFCOUNTER1_HI, 1, 908}, - {44483, R_034410_PA_SU_PERFCOUNTER2_LO}, - {44505, R_034414_PA_SU_PERFCOUNTER2_HI, 1, 908}, - {44527, R_034418_PA_SU_PERFCOUNTER3_LO}, - {44549, R_03441C_PA_SU_PERFCOUNTER3_HI, 1, 908}, - {44571, R_034500_PA_SC_PERFCOUNTER0_LO}, - {44593, R_034504_PA_SC_PERFCOUNTER0_HI}, - {44615, R_034508_PA_SC_PERFCOUNTER1_LO}, - {44637, R_03450C_PA_SC_PERFCOUNTER1_HI}, - {44659, R_034510_PA_SC_PERFCOUNTER2_LO}, - {44681, R_034514_PA_SC_PERFCOUNTER2_HI}, - {44703, R_034518_PA_SC_PERFCOUNTER3_LO}, - {44725, R_03451C_PA_SC_PERFCOUNTER3_HI}, - {44747, R_034520_PA_SC_PERFCOUNTER4_LO}, - {44769, R_034524_PA_SC_PERFCOUNTER4_HI}, - {44791, R_034528_PA_SC_PERFCOUNTER5_LO}, - {44813, R_03452C_PA_SC_PERFCOUNTER5_HI}, - {44835, R_034530_PA_SC_PERFCOUNTER6_LO}, - {44857, R_034534_PA_SC_PERFCOUNTER6_HI}, - {44879, R_034538_PA_SC_PERFCOUNTER7_LO}, - {44901, R_03453C_PA_SC_PERFCOUNTER7_HI}, - {44923, R_034600_SPI_PERFCOUNTER0_HI}, - {44943, R_034604_SPI_PERFCOUNTER0_LO}, - {44963, R_034608_SPI_PERFCOUNTER1_HI}, - {44983, R_03460C_SPI_PERFCOUNTER1_LO}, - {45003, R_034610_SPI_PERFCOUNTER2_HI}, - {45023, R_034614_SPI_PERFCOUNTER2_LO}, - {45043, R_034618_SPI_PERFCOUNTER3_HI}, - {45063, R_03461C_SPI_PERFCOUNTER3_LO}, - {45083, R_034620_SPI_PERFCOUNTER4_HI}, - {45103, R_034624_SPI_PERFCOUNTER4_LO}, - {45123, R_034628_SPI_PERFCOUNTER5_HI}, - {45143, R_03462C_SPI_PERFCOUNTER5_LO}, - {45163, R_034700_SQ_PERFCOUNTER0_LO}, - {45182, R_034704_SQ_PERFCOUNTER0_HI}, - {45201, R_034708_SQ_PERFCOUNTER1_LO}, - {45220, R_03470C_SQ_PERFCOUNTER1_HI}, - {45239, R_034710_SQ_PERFCOUNTER2_LO}, - {45258, R_034714_SQ_PERFCOUNTER2_HI}, - {45277, R_034718_SQ_PERFCOUNTER3_LO}, - {45296, R_03471C_SQ_PERFCOUNTER3_HI}, - {45315, R_034720_SQ_PERFCOUNTER4_LO}, - {45334, R_034724_SQ_PERFCOUNTER4_HI}, - {45353, R_034728_SQ_PERFCOUNTER5_LO}, - {45372, R_03472C_SQ_PERFCOUNTER5_HI}, - {45391, R_034730_SQ_PERFCOUNTER6_LO}, - {45410, R_034734_SQ_PERFCOUNTER6_HI}, - {45429, R_034738_SQ_PERFCOUNTER7_LO}, - {45448, R_03473C_SQ_PERFCOUNTER7_HI}, - {45467, R_034740_SQ_PERFCOUNTER8_LO}, - {45486, R_034744_SQ_PERFCOUNTER8_HI}, - {45505, R_034748_SQ_PERFCOUNTER9_LO}, - {45524, R_03474C_SQ_PERFCOUNTER9_HI}, - {45543, R_034750_SQ_PERFCOUNTER10_LO}, - {45563, R_034754_SQ_PERFCOUNTER10_HI}, - {45583, R_034758_SQ_PERFCOUNTER11_LO}, - {45603, R_03475C_SQ_PERFCOUNTER11_HI}, - {45623, R_034760_SQ_PERFCOUNTER12_LO}, - {45643, R_034764_SQ_PERFCOUNTER12_HI}, - {45663, R_034768_SQ_PERFCOUNTER13_LO}, - {45683, R_03476C_SQ_PERFCOUNTER13_HI}, - {45703, R_034770_SQ_PERFCOUNTER14_LO}, - {45723, R_034774_SQ_PERFCOUNTER14_HI}, - {45743, R_034778_SQ_PERFCOUNTER15_LO}, - {45763, R_03477C_SQ_PERFCOUNTER15_HI}, - {45783, R_034900_SX_PERFCOUNTER0_LO}, - {45802, R_034904_SX_PERFCOUNTER0_HI}, - {45821, R_034908_SX_PERFCOUNTER1_LO}, - {45840, R_03490C_SX_PERFCOUNTER1_HI}, - {45859, R_034910_SX_PERFCOUNTER2_LO}, - {45878, R_034914_SX_PERFCOUNTER2_HI}, - {45897, R_034918_SX_PERFCOUNTER3_LO}, - {45916, R_03491C_SX_PERFCOUNTER3_HI}, - {45935, R_034A00_GDS_PERFCOUNTER0_LO}, - {45955, R_034A04_GDS_PERFCOUNTER0_HI}, - {45975, R_034A08_GDS_PERFCOUNTER1_LO}, - {45995, R_034A0C_GDS_PERFCOUNTER1_HI}, - {46015, R_034A10_GDS_PERFCOUNTER2_LO}, - {46035, R_034A14_GDS_PERFCOUNTER2_HI}, - {46055, R_034A18_GDS_PERFCOUNTER3_LO}, - {46075, R_034A1C_GDS_PERFCOUNTER3_HI}, - {46095, R_034B00_TA_PERFCOUNTER0_LO}, - {46114, R_034B04_TA_PERFCOUNTER0_HI}, - {46133, R_034B08_TA_PERFCOUNTER1_LO}, - {46152, R_034B0C_TA_PERFCOUNTER1_HI}, - {46171, R_034C00_TD_PERFCOUNTER0_LO}, - {46190, R_034C04_TD_PERFCOUNTER0_HI}, - {46209, R_034C08_TD_PERFCOUNTER1_LO}, - {46228, R_034C0C_TD_PERFCOUNTER1_HI}, - {46247, R_034D00_TCP_PERFCOUNTER0_LO}, - {46267, R_034D04_TCP_PERFCOUNTER0_HI}, - {46287, R_034D08_TCP_PERFCOUNTER1_LO}, - {46307, R_034D0C_TCP_PERFCOUNTER1_HI}, - {46327, R_034D10_TCP_PERFCOUNTER2_LO}, - {46347, R_034D14_TCP_PERFCOUNTER2_HI}, - {46367, R_034D18_TCP_PERFCOUNTER3_LO}, - {46387, R_034D1C_TCP_PERFCOUNTER3_HI}, - {46407, R_034E00_TCC_PERFCOUNTER0_LO}, - {46427, R_034E04_TCC_PERFCOUNTER0_HI}, - {46447, R_034E08_TCC_PERFCOUNTER1_LO}, - {46467, R_034E0C_TCC_PERFCOUNTER1_HI}, - {46487, R_034E10_TCC_PERFCOUNTER2_LO}, - {46507, R_034E14_TCC_PERFCOUNTER2_HI}, - {46527, R_034E18_TCC_PERFCOUNTER3_LO}, - {46547, R_034E1C_TCC_PERFCOUNTER3_HI}, - {46567, R_034E40_TCA_PERFCOUNTER0_LO}, - {46587, R_034E44_TCA_PERFCOUNTER0_HI}, - {46607, R_034E48_TCA_PERFCOUNTER1_LO}, - {46627, R_034E4C_TCA_PERFCOUNTER1_HI}, - {46647, R_034E50_TCA_PERFCOUNTER2_LO}, - {46667, R_034E54_TCA_PERFCOUNTER2_HI}, - {46687, R_034E58_TCA_PERFCOUNTER3_LO}, - {46707, R_034E5C_TCA_PERFCOUNTER3_HI}, - {46727, R_035018_CB_PERFCOUNTER0_LO}, - {46746, R_03501C_CB_PERFCOUNTER0_HI}, - {46765, R_035020_CB_PERFCOUNTER1_LO}, - {46784, R_035024_CB_PERFCOUNTER1_HI}, - {46803, R_035028_CB_PERFCOUNTER2_LO}, - {46822, R_03502C_CB_PERFCOUNTER2_HI}, - {46841, R_035030_CB_PERFCOUNTER3_LO}, - {46860, R_035034_CB_PERFCOUNTER3_HI}, - {46879, R_035100_DB_PERFCOUNTER0_LO}, - {46898, R_035104_DB_PERFCOUNTER0_HI}, - {46917, R_035108_DB_PERFCOUNTER1_LO}, - {46936, R_03510C_DB_PERFCOUNTER1_HI}, - {46955, R_035110_DB_PERFCOUNTER2_LO}, - {46974, R_035114_DB_PERFCOUNTER2_HI}, - {46993, R_035118_DB_PERFCOUNTER3_LO}, - {47012, R_03511C_DB_PERFCOUNTER3_HI}, - {47031, R_035200_RLC_PERFCOUNTER0_LO}, - {47051, R_035204_RLC_PERFCOUNTER0_HI}, - {47071, R_035208_RLC_PERFCOUNTER1_LO}, - {47091, R_03520C_RLC_PERFCOUNTER1_HI}, - {47111, R_036000_CPG_PERFCOUNTER1_SELECT, 3, 911}, - {47135, R_036004_CPG_PERFCOUNTER0_SELECT1, 2, 909}, - {47160, R_036008_CPG_PERFCOUNTER0_SELECT, 3, 911}, - {47184, R_03600C_CPC_PERFCOUNTER1_SELECT, 3, 925}, - {47208, R_036010_CPC_PERFCOUNTER0_SELECT1, 2, 914}, - {47233, R_036014_CPF_PERFCOUNTER1_SELECT, 3, 918}, - {47257, R_036018_CPF_PERFCOUNTER0_SELECT1, 2, 916}, - {47282, R_03601C_CPF_PERFCOUNTER0_SELECT, 3, 918}, - {47306, R_036020_CP_PERFMON_CNTL, 4, 921}, - {47322, R_036024_CPC_PERFCOUNTER0_SELECT, 3, 925}, - {47346, R_036100_GRBM_PERFCOUNTER0_SELECT, 19, 928}, - {47371, R_036104_GRBM_PERFCOUNTER1_SELECT, 19, 928}, - {47396, R_036108_GRBM_SE0_PERFCOUNTER_SELECT, 12, 947}, - {47424, R_03610C_GRBM_SE1_PERFCOUNTER_SELECT, 12, 959}, - {47452, R_036110_GRBM_SE2_PERFCOUNTER_SELECT, 12, 971}, - {47480, R_036114_GRBM_SE3_PERFCOUNTER_SELECT, 12, 983}, - {47508, R_036200_WD_PERFCOUNTER0_SELECT, 2, 995}, - {47531, R_036204_WD_PERFCOUNTER1_SELECT, 2, 995}, - {47554, R_036208_WD_PERFCOUNTER2_SELECT, 2, 995}, - {47577, R_03620C_WD_PERFCOUNTER3_SELECT, 2, 995}, - {47600, R_036210_IA_PERFCOUNTER0_SELECT, 5, 997}, - {47623, R_036214_IA_PERFCOUNTER1_SELECT, 5, 997}, - {47646, R_036218_IA_PERFCOUNTER2_SELECT, 5, 997}, - {47669, R_03621C_IA_PERFCOUNTER3_SELECT, 5, 997}, - {47692, R_036220_IA_PERFCOUNTER0_SELECT1, 4, 1002}, - {47716, R_036230_VGT_PERFCOUNTER0_SELECT, 5, 1006}, - {47740, R_036234_VGT_PERFCOUNTER1_SELECT, 5, 1006}, - {47764, R_036238_VGT_PERFCOUNTER2_SELECT, 5, 1006}, - {47788, R_03623C_VGT_PERFCOUNTER3_SELECT, 5, 1006}, - {47812, R_036240_VGT_PERFCOUNTER0_SELECT1, 4, 1011}, - {47837, R_036244_VGT_PERFCOUNTER1_SELECT1}, - {47862, R_036250_VGT_PERFCOUNTER_SEID_MASK, 1, 1015}, - {47888, R_036400_PA_SU_PERFCOUNTER0_SELECT, 3, 1016}, - {47914, R_036404_PA_SU_PERFCOUNTER0_SELECT1, 2, 1019}, - {47941, R_036408_PA_SU_PERFCOUNTER1_SELECT, 3, 1016}, - {47967, R_03640C_PA_SU_PERFCOUNTER1_SELECT1}, - {47994, R_036410_PA_SU_PERFCOUNTER2_SELECT, 3, 1016}, - {48020, R_036414_PA_SU_PERFCOUNTER3_SELECT, 3, 1016}, - {48046, R_036500_PA_SC_PERFCOUNTER0_SELECT, 3, 1021}, - {48072, R_036504_PA_SC_PERFCOUNTER0_SELECT1, 2, 1024}, - {48099, R_036508_PA_SC_PERFCOUNTER1_SELECT, 3, 1021}, - {48125, R_03650C_PA_SC_PERFCOUNTER2_SELECT, 3, 1021}, - {48151, R_036510_PA_SC_PERFCOUNTER3_SELECT, 3, 1021}, - {48177, R_036514_PA_SC_PERFCOUNTER4_SELECT, 3, 1021}, - {48203, R_036518_PA_SC_PERFCOUNTER5_SELECT, 3, 1021}, - {48229, R_03651C_PA_SC_PERFCOUNTER6_SELECT, 3, 1021}, - {48255, R_036520_PA_SC_PERFCOUNTER7_SELECT, 3, 1021}, - {48281, R_036600_SPI_PERFCOUNTER0_SELECT, 3, 1026}, - {48305, R_036604_SPI_PERFCOUNTER1_SELECT, 3, 1026}, - {48329, R_036608_SPI_PERFCOUNTER2_SELECT, 3, 1026}, - {48353, R_03660C_SPI_PERFCOUNTER3_SELECT, 3, 1026}, - {48377, R_036610_SPI_PERFCOUNTER0_SELECT1, 2, 1029}, - {48402, R_036614_SPI_PERFCOUNTER1_SELECT1}, - {48427, R_036618_SPI_PERFCOUNTER2_SELECT1}, - {48452, R_03661C_SPI_PERFCOUNTER3_SELECT1}, - {48477, R_036620_SPI_PERFCOUNTER4_SELECT, 3, 1026}, - {48501, R_036624_SPI_PERFCOUNTER5_SELECT, 3, 1026}, - {48525, R_036628_SPI_PERFCOUNTER_BINS, 8, 1031}, - {48546, R_036700_SQ_PERFCOUNTER0_SELECT, 6, 1039}, - {48569, R_036704_SQ_PERFCOUNTER1_SELECT, 6, 1039}, - {48592, R_036708_SQ_PERFCOUNTER2_SELECT, 6, 1039}, - {48615, R_03670C_SQ_PERFCOUNTER3_SELECT, 6, 1039}, - {48638, R_036710_SQ_PERFCOUNTER4_SELECT, 6, 1039}, - {48661, R_036714_SQ_PERFCOUNTER5_SELECT, 6, 1039}, - {48684, R_036718_SQ_PERFCOUNTER6_SELECT, 6, 1039}, - {48707, R_03671C_SQ_PERFCOUNTER7_SELECT, 6, 1039}, - {48730, R_036720_SQ_PERFCOUNTER8_SELECT, 6, 1039}, - {48753, R_036724_SQ_PERFCOUNTER9_SELECT, 6, 1039}, - {48776, R_036728_SQ_PERFCOUNTER10_SELECT, 6, 1039}, - {48800, R_03672C_SQ_PERFCOUNTER11_SELECT, 6, 1039}, - {48824, R_036730_SQ_PERFCOUNTER12_SELECT, 6, 1039}, - {48848, R_036734_SQ_PERFCOUNTER13_SELECT, 6, 1039}, - {48872, R_036738_SQ_PERFCOUNTER14_SELECT, 6, 1039}, - {48896, R_03673C_SQ_PERFCOUNTER15_SELECT, 6, 1039}, - {48920, R_036780_SQ_PERFCOUNTER_CTRL, 9, 1045}, - {48940, R_036784_SQ_PERFCOUNTER_MASK, 2, 1054}, - {48960, R_036788_SQ_PERFCOUNTER_CTRL2, 1, 1056}, - {48981, R_036900_SX_PERFCOUNTER0_SELECT, 3, 1057}, - {49004, R_036904_SX_PERFCOUNTER1_SELECT, 3, 1057}, - {49027, R_036908_SX_PERFCOUNTER2_SELECT, 3, 1057}, - {49050, R_03690C_SX_PERFCOUNTER3_SELECT, 3, 1057}, - {49073, R_036910_SX_PERFCOUNTER0_SELECT1, 2, 1060}, - {49097, R_036914_SX_PERFCOUNTER1_SELECT1}, - {49121, R_036A00_GDS_PERFCOUNTER0_SELECT, 3, 1062}, - {49145, R_036A04_GDS_PERFCOUNTER1_SELECT, 3, 1062}, - {49169, R_036A08_GDS_PERFCOUNTER2_SELECT, 3, 1062}, - {49193, R_036A0C_GDS_PERFCOUNTER3_SELECT, 3, 1062}, - {49217, R_036A10_GDS_PERFCOUNTER0_SELECT1, 2, 1065}, - {49242, R_036B00_TA_PERFCOUNTER0_SELECT, 5, 1067}, - {49265, R_036B04_TA_PERFCOUNTER0_SELECT1, 4, 1072}, - {49289, R_036B08_TA_PERFCOUNTER1_SELECT, 5, 1067}, - {49312, R_036C00_TD_PERFCOUNTER0_SELECT, 5, 1076}, - {49335, R_036C04_TD_PERFCOUNTER0_SELECT1, 4, 1081}, - {49359, R_036C08_TD_PERFCOUNTER1_SELECT, 5, 1076}, - {49382, R_036D00_TCP_PERFCOUNTER0_SELECT, 5, 1085}, - {49406, R_036D04_TCP_PERFCOUNTER0_SELECT1, 4, 1090}, - {49431, R_036D08_TCP_PERFCOUNTER1_SELECT, 5, 1085}, - {49455, R_036D0C_TCP_PERFCOUNTER1_SELECT1}, - {49480, R_036D10_TCP_PERFCOUNTER2_SELECT, 5, 1085}, - {49504, R_036D14_TCP_PERFCOUNTER3_SELECT, 5, 1085}, - {49528, R_036E00_TCC_PERFCOUNTER0_SELECT, 5, 1094}, - {49552, R_036E04_TCC_PERFCOUNTER0_SELECT1, 4, 1099}, - {49577, R_036E08_TCC_PERFCOUNTER1_SELECT, 5, 1094}, - {49601, R_036E0C_TCC_PERFCOUNTER1_SELECT1}, - {49626, R_036E10_TCC_PERFCOUNTER2_SELECT, 5, 1094}, - {49650, R_036E14_TCC_PERFCOUNTER3_SELECT, 5, 1094}, - {49674, R_036E40_TCA_PERFCOUNTER0_SELECT, 5, 1103}, - {49698, R_036E44_TCA_PERFCOUNTER0_SELECT1, 4, 1108}, - {49723, R_036E48_TCA_PERFCOUNTER1_SELECT, 5, 1103}, - {49747, R_036E4C_TCA_PERFCOUNTER1_SELECT1}, - {49772, R_036E50_TCA_PERFCOUNTER2_SELECT, 5, 1103}, - {49796, R_036E54_TCA_PERFCOUNTER3_SELECT, 5, 1103}, - {49820, R_037000_CB_PERFCOUNTER_FILTER, 12, 1112}, - {49842, R_037004_CB_PERFCOUNTER0_SELECT, 5, 1124}, - {49865, R_037008_CB_PERFCOUNTER0_SELECT1, 4, 1129}, - {49889, R_03700C_CB_PERFCOUNTER1_SELECT, 5, 1124}, - {49912, R_037010_CB_PERFCOUNTER2_SELECT, 5, 1124}, - {49935, R_037014_CB_PERFCOUNTER3_SELECT, 5, 1124}, - {49958, R_037100_DB_PERFCOUNTER0_SELECT, 5, 1133}, - {49981, R_037104_DB_PERFCOUNTER0_SELECT1, 4, 1138}, - {50005, R_037108_DB_PERFCOUNTER1_SELECT, 5, 1133}, - {50028, R_03710C_DB_PERFCOUNTER1_SELECT1}, - {50052, R_037110_DB_PERFCOUNTER2_SELECT, 5, 1133}, - {50075, R_037118_DB_PERFCOUNTER3_SELECT, 5, 1133}, - {50098, R_028000_DB_RENDER_CONTROL, 10, 1142}, - {50116, R_028004_DB_COUNT_CONTROL, 9, 1152}, - {50133, R_028008_DB_DEPTH_VIEW, 4, 1161}, - {50147, R_02800C_DB_RENDER_OVERRIDE, 23, 1165}, - {50166, R_028010_DB_RENDER_OVERRIDE2, 15, 1188}, - {50186, R_028014_DB_HTILE_DATA_BASE}, - {50205, R_028020_DB_DEPTH_BOUNDS_MIN}, - {50225, R_028024_DB_DEPTH_BOUNDS_MAX}, - {50245, R_028028_DB_STENCIL_CLEAR, 1, 1203}, - {50262, R_02802C_DB_DEPTH_CLEAR}, - {50277, R_028030_PA_SC_SCREEN_SCISSOR_TL, 2, 1204}, - {50301, R_028034_PA_SC_SCREEN_SCISSOR_BR, 2, 1206}, - {50325, R_02803C_DB_DEPTH_INFO, 7, 1208}, - {50339, R_028040_DB_Z_INFO, 10, 1215}, - {50349, R_028044_DB_STENCIL_INFO, 6, 1225}, - {50365, R_028048_DB_Z_READ_BASE}, - {50380, R_02804C_DB_STENCIL_READ_BASE}, - {50401, R_028050_DB_Z_WRITE_BASE}, - {50417, R_028054_DB_STENCIL_WRITE_BASE}, - {50439, R_028058_DB_DEPTH_SIZE, 2, 1231}, - {50453, R_02805C_DB_DEPTH_SLICE, 1, 1233}, - {50468, R_028080_TA_BC_BASE_ADDR}, - {50484, R_028084_TA_BC_BASE_ADDR_HI, 1, 1234}, - {50503, R_0281E8_COHER_DEST_BASE_HI_0}, - {50524, R_0281EC_COHER_DEST_BASE_HI_1}, - {50545, R_0281F0_COHER_DEST_BASE_HI_2}, - {50566, R_0281F4_COHER_DEST_BASE_HI_3}, - {50587, R_0281F8_COHER_DEST_BASE_2}, - {50605, R_0281FC_COHER_DEST_BASE_3}, - {50623, R_028200_PA_SC_WINDOW_OFFSET, 2, 1235}, - {50643, R_028204_PA_SC_WINDOW_SCISSOR_TL, 3, 1237}, - {50667, R_028208_PA_SC_WINDOW_SCISSOR_BR, 2, 1240}, - {50691, R_02820C_PA_SC_CLIPRECT_RULE, 1, 1242}, - {50711, R_028210_PA_SC_CLIPRECT_0_TL, 2, 1243}, - {50731, R_028214_PA_SC_CLIPRECT_0_BR, 2, 1245}, - {50751, R_028218_PA_SC_CLIPRECT_1_TL, 2, 1243}, - {50771, R_02821C_PA_SC_CLIPRECT_1_BR, 2, 1245}, - {50791, R_028220_PA_SC_CLIPRECT_2_TL, 2, 1243}, - {50811, R_028224_PA_SC_CLIPRECT_2_BR, 2, 1245}, - {50831, R_028228_PA_SC_CLIPRECT_3_TL, 2, 1243}, - {50851, R_02822C_PA_SC_CLIPRECT_3_BR, 2, 1245}, - {50871, R_028230_PA_SC_EDGERULE, 7, 1247}, - {50886, R_028234_PA_SU_HARDWARE_SCREEN_OFFSET, 2, 1254}, - {50915, R_028238_CB_TARGET_MASK, 8, 1256}, - {50930, R_02823C_CB_SHADER_MASK, 8, 1264}, - {50945, R_028240_PA_SC_GENERIC_SCISSOR_TL, 3, 1272}, - {50970, R_028244_PA_SC_GENERIC_SCISSOR_BR, 2, 1275}, - {50995, R_028248_COHER_DEST_BASE_0}, - {51013, R_02824C_COHER_DEST_BASE_1}, - {51031, R_028250_PA_SC_VPORT_SCISSOR_0_TL, 3, 1277}, - {51056, R_028254_PA_SC_VPORT_SCISSOR_0_BR, 2, 1280}, - {51081, R_028258_PA_SC_VPORT_SCISSOR_1_TL, 3, 1277}, - {51106, R_02825C_PA_SC_VPORT_SCISSOR_1_BR, 2, 1280}, - {51131, R_028260_PA_SC_VPORT_SCISSOR_2_TL, 3, 1277}, - {51156, R_028264_PA_SC_VPORT_SCISSOR_2_BR, 2, 1280}, - {51181, R_028268_PA_SC_VPORT_SCISSOR_3_TL, 3, 1277}, - {51206, R_02826C_PA_SC_VPORT_SCISSOR_3_BR, 2, 1280}, - {51231, R_028270_PA_SC_VPORT_SCISSOR_4_TL, 3, 1277}, - {51256, R_028274_PA_SC_VPORT_SCISSOR_4_BR, 2, 1280}, - {51281, R_028278_PA_SC_VPORT_SCISSOR_5_TL, 3, 1277}, - {51306, R_02827C_PA_SC_VPORT_SCISSOR_5_BR, 2, 1280}, - {51331, R_028280_PA_SC_VPORT_SCISSOR_6_TL, 3, 1277}, - {51356, R_028284_PA_SC_VPORT_SCISSOR_6_BR, 2, 1280}, - {51381, R_028288_PA_SC_VPORT_SCISSOR_7_TL, 3, 1277}, - {51406, R_02828C_PA_SC_VPORT_SCISSOR_7_BR, 2, 1280}, - {51431, R_028290_PA_SC_VPORT_SCISSOR_8_TL, 3, 1277}, - {51456, R_028294_PA_SC_VPORT_SCISSOR_8_BR, 2, 1280}, - {51481, R_028298_PA_SC_VPORT_SCISSOR_9_TL, 3, 1277}, - {51506, R_02829C_PA_SC_VPORT_SCISSOR_9_BR, 2, 1280}, - {51531, R_0282A0_PA_SC_VPORT_SCISSOR_10_TL, 3, 1277}, - {51557, R_0282A4_PA_SC_VPORT_SCISSOR_10_BR, 2, 1280}, - {51583, R_0282A8_PA_SC_VPORT_SCISSOR_11_TL, 3, 1277}, - {51609, R_0282AC_PA_SC_VPORT_SCISSOR_11_BR, 2, 1280}, - {51635, R_0282B0_PA_SC_VPORT_SCISSOR_12_TL, 3, 1277}, - {51661, R_0282B4_PA_SC_VPORT_SCISSOR_12_BR, 2, 1280}, - {51687, R_0282B8_PA_SC_VPORT_SCISSOR_13_TL, 3, 1277}, - {51713, R_0282BC_PA_SC_VPORT_SCISSOR_13_BR, 2, 1280}, - {51739, R_0282C0_PA_SC_VPORT_SCISSOR_14_TL, 3, 1277}, - {51765, R_0282C4_PA_SC_VPORT_SCISSOR_14_BR, 2, 1280}, - {51791, R_0282C8_PA_SC_VPORT_SCISSOR_15_TL, 3, 1277}, - {51817, R_0282CC_PA_SC_VPORT_SCISSOR_15_BR, 2, 1280}, - {51843, R_0282D0_PA_SC_VPORT_ZMIN_0}, - {51862, R_0282D4_PA_SC_VPORT_ZMAX_0}, - {51881, R_0282D8_PA_SC_VPORT_ZMIN_1}, - {51900, R_0282DC_PA_SC_VPORT_ZMAX_1}, - {51919, R_0282E0_PA_SC_VPORT_ZMIN_2}, - {51938, R_0282E4_PA_SC_VPORT_ZMAX_2}, - {51957, R_0282E8_PA_SC_VPORT_ZMIN_3}, - {51976, R_0282EC_PA_SC_VPORT_ZMAX_3}, - {51995, R_0282F0_PA_SC_VPORT_ZMIN_4}, - {52014, R_0282F4_PA_SC_VPORT_ZMAX_4}, - {52033, R_0282F8_PA_SC_VPORT_ZMIN_5}, - {52052, R_0282FC_PA_SC_VPORT_ZMAX_5}, - {52071, R_028300_PA_SC_VPORT_ZMIN_6}, - {52090, R_028304_PA_SC_VPORT_ZMAX_6}, - {52109, R_028308_PA_SC_VPORT_ZMIN_7}, - {52128, R_02830C_PA_SC_VPORT_ZMAX_7}, - {52147, R_028310_PA_SC_VPORT_ZMIN_8}, - {52166, R_028314_PA_SC_VPORT_ZMAX_8}, - {52185, R_028318_PA_SC_VPORT_ZMIN_9}, - {52204, R_02831C_PA_SC_VPORT_ZMAX_9}, - {52223, R_028320_PA_SC_VPORT_ZMIN_10}, - {52243, R_028324_PA_SC_VPORT_ZMAX_10}, - {52263, R_028328_PA_SC_VPORT_ZMIN_11}, - {52283, R_02832C_PA_SC_VPORT_ZMAX_11}, - {52303, R_028330_PA_SC_VPORT_ZMIN_12}, - {52323, R_028334_PA_SC_VPORT_ZMAX_12}, - {52343, R_028338_PA_SC_VPORT_ZMIN_13}, - {52363, R_02833C_PA_SC_VPORT_ZMAX_13}, - {52383, R_028340_PA_SC_VPORT_ZMIN_14}, - {52403, R_028344_PA_SC_VPORT_ZMAX_14}, - {52423, R_028348_PA_SC_VPORT_ZMIN_15}, - {52443, R_02834C_PA_SC_VPORT_ZMAX_15}, - {52463, R_028350_PA_SC_RASTER_CONFIG, 15, 1282}, - {52483, R_028354_PA_SC_RASTER_CONFIG_1, 3, 1297}, - {52505, R_028358_PA_SC_SCREEN_EXTENT_CONTROL, 2, 1300}, - {52533, R_028400_VGT_MAX_VTX_INDX}, - {52550, R_028404_VGT_MIN_VTX_INDX}, - {52567, R_028408_VGT_INDX_OFFSET}, - {52583, R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX}, - {52612, R_028414_CB_BLEND_RED}, - {52625, R_028418_CB_BLEND_GREEN}, - {52640, R_02841C_CB_BLEND_BLUE}, - {52654, R_028420_CB_BLEND_ALPHA}, - {52669, R_028424_CB_DCC_CONTROL, 3, 1302}, - {52684, R_02842C_DB_STENCIL_CONTROL, 6, 1305}, - {52703, R_028430_DB_STENCILREFMASK, 4, 1311}, - {52721, R_028434_DB_STENCILREFMASK_BF, 4, 1315}, - {52742, R_02843C_PA_CL_VPORT_XSCALE}, - {52761, R_028440_PA_CL_VPORT_XOFFSET}, - {52781, R_028444_PA_CL_VPORT_YSCALE}, - {52800, R_028448_PA_CL_VPORT_YOFFSET}, - {52820, R_02844C_PA_CL_VPORT_ZSCALE}, - {52839, R_028450_PA_CL_VPORT_ZOFFSET}, - {52859, R_028454_PA_CL_VPORT_XSCALE_1}, - {52880, R_028458_PA_CL_VPORT_XOFFSET_1}, - {52902, R_02845C_PA_CL_VPORT_YSCALE_1}, - {52923, R_028460_PA_CL_VPORT_YOFFSET_1}, - {52945, R_028464_PA_CL_VPORT_ZSCALE_1}, - {52966, R_028468_PA_CL_VPORT_ZOFFSET_1}, - {52988, R_02846C_PA_CL_VPORT_XSCALE_2}, - {53009, R_028470_PA_CL_VPORT_XOFFSET_2}, - {53031, R_028474_PA_CL_VPORT_YSCALE_2}, - {53052, R_028478_PA_CL_VPORT_YOFFSET_2}, - {53074, R_02847C_PA_CL_VPORT_ZSCALE_2}, - {53095, R_028480_PA_CL_VPORT_ZOFFSET_2}, - {53117, R_028484_PA_CL_VPORT_XSCALE_3}, - {53138, R_028488_PA_CL_VPORT_XOFFSET_3}, - {53160, R_02848C_PA_CL_VPORT_YSCALE_3}, - {53181, R_028490_PA_CL_VPORT_YOFFSET_3}, - {53203, R_028494_PA_CL_VPORT_ZSCALE_3}, - {53224, R_028498_PA_CL_VPORT_ZOFFSET_3}, - {53246, R_02849C_PA_CL_VPORT_XSCALE_4}, - {53267, R_0284A0_PA_CL_VPORT_XOFFSET_4}, - {53289, R_0284A4_PA_CL_VPORT_YSCALE_4}, - {53310, R_0284A8_PA_CL_VPORT_YOFFSET_4}, - {53332, R_0284AC_PA_CL_VPORT_ZSCALE_4}, - {53353, R_0284B0_PA_CL_VPORT_ZOFFSET_4}, - {53375, R_0284B4_PA_CL_VPORT_XSCALE_5}, - {53396, R_0284B8_PA_CL_VPORT_XOFFSET_5}, - {53418, R_0284BC_PA_CL_VPORT_YSCALE_5}, - {53439, R_0284C0_PA_CL_VPORT_YOFFSET_5}, - {53461, R_0284C4_PA_CL_VPORT_ZSCALE_5}, - {53482, R_0284C8_PA_CL_VPORT_ZOFFSET_5}, - {53504, R_0284CC_PA_CL_VPORT_XSCALE_6}, - {53525, R_0284D0_PA_CL_VPORT_XOFFSET_6}, - {53547, R_0284D4_PA_CL_VPORT_YSCALE_6}, - {53568, R_0284D8_PA_CL_VPORT_YOFFSET_6}, - {53590, R_0284DC_PA_CL_VPORT_ZSCALE_6}, - {53611, R_0284E0_PA_CL_VPORT_ZOFFSET_6}, - {53633, R_0284E4_PA_CL_VPORT_XSCALE_7}, - {53654, R_0284E8_PA_CL_VPORT_XOFFSET_7}, - {53676, R_0284EC_PA_CL_VPORT_YSCALE_7}, - {53697, R_0284F0_PA_CL_VPORT_YOFFSET_7}, - {53719, R_0284F4_PA_CL_VPORT_ZSCALE_7}, - {53740, R_0284F8_PA_CL_VPORT_ZOFFSET_7}, - {53762, R_0284FC_PA_CL_VPORT_XSCALE_8}, - {53783, R_028500_PA_CL_VPORT_XOFFSET_8}, - {53805, R_028504_PA_CL_VPORT_YSCALE_8}, - {53826, R_028508_PA_CL_VPORT_YOFFSET_8}, - {53848, R_02850C_PA_CL_VPORT_ZSCALE_8}, - {53869, R_028510_PA_CL_VPORT_ZOFFSET_8}, - {53891, R_028514_PA_CL_VPORT_XSCALE_9}, - {53912, R_028518_PA_CL_VPORT_XOFFSET_9}, - {53934, R_02851C_PA_CL_VPORT_YSCALE_9}, - {53955, R_028520_PA_CL_VPORT_YOFFSET_9}, - {53977, R_028524_PA_CL_VPORT_ZSCALE_9}, - {53998, R_028528_PA_CL_VPORT_ZOFFSET_9}, - {54020, R_02852C_PA_CL_VPORT_XSCALE_10}, - {54042, R_028530_PA_CL_VPORT_XOFFSET_10}, - {54065, R_028534_PA_CL_VPORT_YSCALE_10}, - {54087, R_028538_PA_CL_VPORT_YOFFSET_10}, - {54110, R_02853C_PA_CL_VPORT_ZSCALE_10}, - {54132, R_028540_PA_CL_VPORT_ZOFFSET_10}, - {54155, R_028544_PA_CL_VPORT_XSCALE_11}, - {54177, R_028548_PA_CL_VPORT_XOFFSET_11}, - {54200, R_02854C_PA_CL_VPORT_YSCALE_11}, - {54222, R_028550_PA_CL_VPORT_YOFFSET_11}, - {54245, R_028554_PA_CL_VPORT_ZSCALE_11}, - {54267, R_028558_PA_CL_VPORT_ZOFFSET_11}, - {54290, R_02855C_PA_CL_VPORT_XSCALE_12}, - {54312, R_028560_PA_CL_VPORT_XOFFSET_12}, - {54335, R_028564_PA_CL_VPORT_YSCALE_12}, - {54357, R_028568_PA_CL_VPORT_YOFFSET_12}, - {54380, R_02856C_PA_CL_VPORT_ZSCALE_12}, - {54402, R_028570_PA_CL_VPORT_ZOFFSET_12}, - {54425, R_028574_PA_CL_VPORT_XSCALE_13}, - {54447, R_028578_PA_CL_VPORT_XOFFSET_13}, - {54470, R_02857C_PA_CL_VPORT_YSCALE_13}, - {54492, R_028580_PA_CL_VPORT_YOFFSET_13}, - {54515, R_028584_PA_CL_VPORT_ZSCALE_13}, - {54537, R_028588_PA_CL_VPORT_ZOFFSET_13}, - {54560, R_02858C_PA_CL_VPORT_XSCALE_14}, - {54582, R_028590_PA_CL_VPORT_XOFFSET_14}, - {54605, R_028594_PA_CL_VPORT_YSCALE_14}, - {54627, R_028598_PA_CL_VPORT_YOFFSET_14}, - {54650, R_02859C_PA_CL_VPORT_ZSCALE_14}, - {54672, R_0285A0_PA_CL_VPORT_ZOFFSET_14}, - {54695, R_0285A4_PA_CL_VPORT_XSCALE_15}, - {54717, R_0285A8_PA_CL_VPORT_XOFFSET_15}, - {54740, R_0285AC_PA_CL_VPORT_YSCALE_15}, - {54762, R_0285B0_PA_CL_VPORT_YOFFSET_15}, - {54785, R_0285B4_PA_CL_VPORT_ZSCALE_15}, - {54807, R_0285B8_PA_CL_VPORT_ZOFFSET_15}, - {54830, R_0285BC_PA_CL_UCP_0_X}, - {54844, R_0285C0_PA_CL_UCP_0_Y}, - {54858, R_0285C4_PA_CL_UCP_0_Z}, - {54872, R_0285C8_PA_CL_UCP_0_W}, - {54886, R_0285CC_PA_CL_UCP_1_X}, - {54900, R_0285D0_PA_CL_UCP_1_Y}, - {54914, R_0285D4_PA_CL_UCP_1_Z}, - {54928, R_0285D8_PA_CL_UCP_1_W}, - {54942, R_0285DC_PA_CL_UCP_2_X}, - {54956, R_0285E0_PA_CL_UCP_2_Y}, - {54970, R_0285E4_PA_CL_UCP_2_Z}, - {54984, R_0285E8_PA_CL_UCP_2_W}, - {54998, R_0285EC_PA_CL_UCP_3_X}, - {55012, R_0285F0_PA_CL_UCP_3_Y}, - {55026, R_0285F4_PA_CL_UCP_3_Z}, - {55040, R_0285F8_PA_CL_UCP_3_W}, - {55054, R_0285FC_PA_CL_UCP_4_X}, - {55068, R_028600_PA_CL_UCP_4_Y}, - {55082, R_028604_PA_CL_UCP_4_Z}, - {55096, R_028608_PA_CL_UCP_4_W}, - {55110, R_02860C_PA_CL_UCP_5_X}, - {55124, R_028610_PA_CL_UCP_5_Y}, - {55138, R_028614_PA_CL_UCP_5_Z}, - {55152, R_028618_PA_CL_UCP_5_W}, - {55166, R_028644_SPI_PS_INPUT_CNTL_0, 12, 1319}, - {55186, R_028648_SPI_PS_INPUT_CNTL_1, 12, 1319}, - {55206, R_02864C_SPI_PS_INPUT_CNTL_2, 12, 1319}, - {55226, R_028650_SPI_PS_INPUT_CNTL_3, 12, 1319}, - {55246, R_028654_SPI_PS_INPUT_CNTL_4, 12, 1319}, - {55266, R_028658_SPI_PS_INPUT_CNTL_5, 12, 1319}, - {55286, R_02865C_SPI_PS_INPUT_CNTL_6, 12, 1319}, - {55306, R_028660_SPI_PS_INPUT_CNTL_7, 12, 1319}, - {55326, R_028664_SPI_PS_INPUT_CNTL_8, 12, 1319}, - {55346, R_028668_SPI_PS_INPUT_CNTL_9, 12, 1319}, - {55366, R_02866C_SPI_PS_INPUT_CNTL_10, 12, 1319}, - {55387, R_028670_SPI_PS_INPUT_CNTL_11, 12, 1319}, - {55408, R_028674_SPI_PS_INPUT_CNTL_12, 12, 1319}, - {55429, R_028678_SPI_PS_INPUT_CNTL_13, 12, 1319}, - {55450, R_02867C_SPI_PS_INPUT_CNTL_14, 12, 1319}, - {55471, R_028680_SPI_PS_INPUT_CNTL_15, 12, 1319}, - {55492, R_028684_SPI_PS_INPUT_CNTL_16, 12, 1319}, - {55513, R_028688_SPI_PS_INPUT_CNTL_17, 12, 1319}, - {55534, R_02868C_SPI_PS_INPUT_CNTL_18, 12, 1319}, - {55555, R_028690_SPI_PS_INPUT_CNTL_19, 12, 1319}, - {55576, R_028694_SPI_PS_INPUT_CNTL_20, 12, 1319}, - {55597, R_028698_SPI_PS_INPUT_CNTL_21, 12, 1319}, - {55618, R_02869C_SPI_PS_INPUT_CNTL_22, 12, 1319}, - {55639, R_0286A0_SPI_PS_INPUT_CNTL_23, 12, 1319}, - {55660, R_0286A4_SPI_PS_INPUT_CNTL_24, 12, 1319}, - {55681, R_0286A8_SPI_PS_INPUT_CNTL_25, 12, 1319}, - {55702, R_0286AC_SPI_PS_INPUT_CNTL_26, 12, 1319}, - {55723, R_0286B0_SPI_PS_INPUT_CNTL_27, 12, 1319}, - {55744, R_0286B4_SPI_PS_INPUT_CNTL_28, 12, 1319}, - {55765, R_0286B8_SPI_PS_INPUT_CNTL_29, 12, 1319}, - {55786, R_0286BC_SPI_PS_INPUT_CNTL_30, 12, 1319}, - {55807, R_0286C0_SPI_PS_INPUT_CNTL_31, 12, 1319}, - {55828, R_0286C4_SPI_VS_OUT_CONFIG, 4, 1331}, - {55846, R_0286CC_SPI_PS_INPUT_ENA, 16, 1335}, - {55863, R_0286D0_SPI_PS_INPUT_ADDR, 16, 1351}, - {55881, R_0286D4_SPI_INTERP_CONTROL_0, 7, 1367}, - {55902, R_0286D8_SPI_PS_IN_CONTROL, 5, 1374}, - {55920, R_0286E0_SPI_BARYC_CNTL, 7, 1379}, - {55935, R_0286E8_SPI_TMPRING_SIZE, 2, 1386}, - {55952, R_028704_SPI_WAVE_MGMT_1, 5, 1388}, - {55968, R_028708_SPI_WAVE_MGMT_2, 1, 1393}, - {55984, R_02870C_SPI_SHADER_POS_FORMAT, 4, 1394}, - {56006, R_028710_SPI_SHADER_Z_FORMAT, 1, 1398}, - {56026, R_028714_SPI_SHADER_COL_FORMAT, 8, 1399}, - {56048, R_028754_SX_PS_DOWNCONVERT, 8, 1407}, - {56066, R_028758_SX_BLEND_OPT_EPSILON, 8, 1415}, - {56087, R_02875C_SX_BLEND_OPT_CONTROL, 17, 1423}, - {56108, R_028760_SX_MRT0_BLEND_OPT, 6, 1440}, - {56126, R_028764_SX_MRT1_BLEND_OPT, 6, 1446}, - {56144, R_028768_SX_MRT2_BLEND_OPT, 6, 1452}, - {56162, R_02876C_SX_MRT3_BLEND_OPT, 6, 1458}, - {56180, R_028770_SX_MRT4_BLEND_OPT, 6, 1464}, - {56198, R_028774_SX_MRT5_BLEND_OPT, 6, 1470}, - {56216, R_028778_SX_MRT6_BLEND_OPT, 6, 1476}, - {56234, R_02877C_SX_MRT7_BLEND_OPT, 6, 1482}, - {56252, R_028780_CB_BLEND0_CONTROL, 9, 1488}, - {56270, R_028784_CB_BLEND1_CONTROL, 9, 1488}, - {56288, R_028788_CB_BLEND2_CONTROL, 9, 1488}, - {56306, R_02878C_CB_BLEND3_CONTROL, 9, 1488}, - {56324, R_028790_CB_BLEND4_CONTROL, 9, 1488}, - {56342, R_028794_CB_BLEND5_CONTROL, 9, 1488}, - {56360, R_028798_CB_BLEND6_CONTROL, 9, 1488}, - {56378, R_02879C_CB_BLEND7_CONTROL, 9, 1488}, - {56396, R_0287CC_CS_COPY_STATE, 1, 1497}, - {56410, R_0287D4_PA_CL_POINT_X_RAD}, - {56428, R_0287D8_PA_CL_POINT_Y_RAD}, - {56446, R_0287DC_PA_CL_POINT_SIZE}, - {56463, R_0287E0_PA_CL_POINT_CULL_RAD}, - {56484, R_0287E4_VGT_DMA_BASE_HI, 1, 1498}, - {56500, R_0287E8_VGT_DMA_BASE}, - {56513, R_0287F0_VGT_DRAW_INITIATOR, 4, 1499}, - {56532, R_0287F4_VGT_IMMED_DATA}, - {56547, R_0287F8_VGT_EVENT_ADDRESS_REG, 1, 1503}, - {56569, R_028800_DB_DEPTH_CONTROL, 10, 1504}, - {56586, R_028804_DB_EQAA, 12, 1514}, - {56594, R_028808_CB_COLOR_CONTROL, 4, 1526}, - {56611, R_02880C_DB_SHADER_CONTROL, 13, 1530}, - {56629, R_028810_PA_CL_CLIP_CNTL, 19, 1543}, - {56645, R_028814_PA_SU_SC_MODE_CNTL, 13, 1562}, - {56664, R_028818_PA_CL_VTE_CNTL, 9, 1575}, - {56679, R_02881C_PA_CL_VS_OUT_CNTL, 27, 1584}, - {56697, R_028820_PA_CL_NANINF_CNTL, 16, 1611}, - {56715, R_028824_PA_SU_LINE_STIPPLE_CNTL, 4, 1627}, - {56739, R_028828_PA_SU_LINE_STIPPLE_SCALE}, - {56764, R_02882C_PA_SU_PRIM_FILTER_CNTL, 11, 1631}, - {56787, R_028830_PA_SU_SMALL_PRIM_FILTER_CNTL, 5, 1642}, - {56816, R_028A00_PA_SU_POINT_SIZE, 2, 1647}, - {56833, R_028A04_PA_SU_POINT_MINMAX, 2, 1649}, - {56852, R_028A08_PA_SU_LINE_CNTL, 1, 1651}, - {56868, R_028A0C_PA_SC_LINE_STIPPLE, 4, 1652}, - {56887, R_028A10_VGT_OUTPUT_PATH_CNTL, 1, 1656}, - {56908, R_028A14_VGT_HOS_CNTL, 1, 1657}, - {56921, R_028A18_VGT_HOS_MAX_TESS_LEVEL}, - {56944, R_028A1C_VGT_HOS_MIN_TESS_LEVEL}, - {56967, R_028A20_VGT_HOS_REUSE_DEPTH, 1, 1658}, - {56987, R_028A24_VGT_GROUP_PRIM_TYPE, 4, 1659}, - {57007, R_028A28_VGT_GROUP_FIRST_DECR, 1, 1663}, - {57028, R_028A2C_VGT_GROUP_DECR, 1, 1664}, - {57043, R_028A30_VGT_GROUP_VECT_0_CNTL, 6, 1665}, - {57065, R_028A34_VGT_GROUP_VECT_1_CNTL, 6, 1671}, - {57087, R_028A38_VGT_GROUP_VECT_0_FMT_CNTL, 8, 1677}, - {57113, R_028A3C_VGT_GROUP_VECT_1_FMT_CNTL, 8, 1685}, - {57139, R_028A40_VGT_GS_MODE, 15, 1693}, - {57151, R_028A44_VGT_GS_ONCHIP_CNTL, 2, 1708}, - {57170, R_028A48_PA_SC_MODE_CNTL_0, 4, 1710}, - {57188, R_028A4C_PA_SC_MODE_CNTL_1, 24, 1714}, - {57206, R_028A50_VGT_ENHANCE}, - {57218, R_028A54_VGT_GS_PER_ES, 1, 1738}, - {57232, R_028A58_VGT_ES_PER_GS, 1, 1739}, - {57246, R_028A5C_VGT_GS_PER_VS, 1, 1740}, - {57260, R_028A60_VGT_GSVS_RING_OFFSET_1, 1, 1741}, - {57283, R_028A64_VGT_GSVS_RING_OFFSET_2, 1, 1742}, - {57306, R_028A68_VGT_GSVS_RING_OFFSET_3, 1, 1743}, - {57329, R_028A6C_VGT_GS_OUT_PRIM_TYPE, 5, 1744}, - {57350, R_028A70_IA_ENHANCE}, - {57361, R_028A74_VGT_DMA_SIZE}, - {57374, R_028A78_VGT_DMA_MAX_SIZE}, - {57391, R_028A7C_VGT_DMA_INDEX_TYPE, 9, 1749}, - {57410, R_028A80_WD_ENHANCE}, - {57421, R_028A84_VGT_PRIMITIVEID_EN, 2, 1758}, - {57440, R_028A88_VGT_DMA_NUM_INSTANCES}, - {57462, R_028A8C_VGT_PRIMITIVEID_RESET}, - {57484, R_028A90_VGT_EVENT_INITIATOR, 3, 1760}, - {57504, R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, 1, 1763}, - {57531, R_028AA0_VGT_INSTANCE_STEP_RATE_0}, - {57556, R_028AA4_VGT_INSTANCE_STEP_RATE_1}, - {57581, R_028AA8_IA_MULTI_VGT_PARAM, 7, 1764}, - {57600, R_028AAC_VGT_ESGS_RING_ITEMSIZE, 1, 1771}, - {57623, R_028AB0_VGT_GSVS_RING_ITEMSIZE, 1, 1772}, - {57646, R_028AB4_VGT_REUSE_OFF, 1, 1773}, - {57660, R_028AB8_VGT_VTX_CNT_EN, 1, 1774}, - {57675, R_028ABC_DB_HTILE_SURFACE, 8, 1775}, - {57692, R_028AC0_DB_SRESULTS_COMPARE_STATE0, 4, 1783}, - {57719, R_028AC4_DB_SRESULTS_COMPARE_STATE1, 4, 1787}, - {57746, R_028AC8_DB_PRELOAD_CONTROL, 4, 1791}, - {57765, R_028AD0_VGT_STRMOUT_BUFFER_SIZE_0}, - {57791, R_028AD4_VGT_STRMOUT_VTX_STRIDE_0, 1, 1795}, - {57816, R_028ADC_VGT_STRMOUT_BUFFER_OFFSET_0}, - {57844, R_028AE0_VGT_STRMOUT_BUFFER_SIZE_1}, - {57870, R_028AE4_VGT_STRMOUT_VTX_STRIDE_1, 1, 1796}, - {57895, R_028AEC_VGT_STRMOUT_BUFFER_OFFSET_1}, - {57923, R_028AF0_VGT_STRMOUT_BUFFER_SIZE_2}, - {57949, R_028AF4_VGT_STRMOUT_VTX_STRIDE_2, 1, 1797}, - {57974, R_028AFC_VGT_STRMOUT_BUFFER_OFFSET_2}, - {58002, R_028B00_VGT_STRMOUT_BUFFER_SIZE_3}, - {58028, R_028B04_VGT_STRMOUT_VTX_STRIDE_3, 1, 1798}, - {58053, R_028B0C_VGT_STRMOUT_BUFFER_OFFSET_3}, - {58081, R_028B28_VGT_STRMOUT_DRAW_OPAQUE_OFFSET}, - {58112, R_028B2C_VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE}, - {58155, R_028B30_VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE, 1, 1799}, - {58193, R_028B38_VGT_GS_MAX_VERT_OUT, 1, 1800}, - {58213, R_028B50_VGT_TESS_DISTRIBUTION, 4, 1801}, - {58235, R_028B54_VGT_SHADER_STAGES_EN, 10, 1805}, - {58256, R_028B58_VGT_LS_HS_CONFIG, 3, 1815}, - {58273, R_028B5C_VGT_GS_VERT_ITEMSIZE, 1, 1818}, - {58294, R_028B60_VGT_GS_VERT_ITEMSIZE_1, 1, 1819}, - {58317, R_028B64_VGT_GS_VERT_ITEMSIZE_2, 1, 1820}, - {58340, R_028B68_VGT_GS_VERT_ITEMSIZE_3, 1, 1821}, - {58363, R_028B6C_VGT_TF_PARAM, 11, 1822}, - {58376, R_028B70_DB_ALPHA_TO_MASK, 6, 1833}, - {58393, R_028B74_VGT_DISPATCH_DRAW_INDEX}, - {58417, R_028B78_PA_SU_POLY_OFFSET_DB_FMT_CNTL, 2, 1839}, - {58447, R_028B7C_PA_SU_POLY_OFFSET_CLAMP}, - {58471, R_028B80_PA_SU_POLY_OFFSET_FRONT_SCALE}, - {58501, R_028B84_PA_SU_POLY_OFFSET_FRONT_OFFSET}, - {58532, R_028B88_PA_SU_POLY_OFFSET_BACK_SCALE}, - {58561, R_028B8C_PA_SU_POLY_OFFSET_BACK_OFFSET}, - {58591, R_028B90_VGT_GS_INSTANCE_CNT, 2, 1841}, - {58611, R_028B94_VGT_STRMOUT_CONFIG, 7, 1843}, - {58630, R_028B98_VGT_STRMOUT_BUFFER_CONFIG, 4, 1850}, - {58656, R_028BD4_PA_SC_CENTROID_PRIORITY_0, 8, 1854}, - {58682, R_028BD8_PA_SC_CENTROID_PRIORITY_1, 8, 1862}, - {58708, R_028BDC_PA_SC_LINE_CNTL, 4, 1870}, - {58724, R_028BE0_PA_SC_AA_CONFIG, 5, 1874}, - {58740, R_028BE4_PA_SU_VTX_CNTL, 3, 1879}, - {58755, R_028BE8_PA_CL_GB_VERT_CLIP_ADJ}, - {58778, R_028BEC_PA_CL_GB_VERT_DISC_ADJ}, - {58801, R_028BF0_PA_CL_GB_HORZ_CLIP_ADJ}, - {58824, R_028BF4_PA_CL_GB_HORZ_DISC_ADJ}, - {58847, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 8, 1882}, - {58881, R_028BFC_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1, 8, 1890}, - {58915, R_028C00_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2, 8, 1898}, - {58949, R_028C04_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3, 8, 1906}, - {58983, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, 8, 1914}, - {59017, R_028C0C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1, 8, 1922}, - {59051, R_028C10_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2, 8, 1930}, - {59085, R_028C14_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3, 8, 1938}, - {59119, R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, 8, 1946}, - {59153, R_028C1C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1, 8, 1954}, - {59187, R_028C20_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2, 8, 1962}, - {59221, R_028C24_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3, 8, 1970}, - {59255, R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, 8, 1978}, - {59289, R_028C2C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1, 8, 1986}, - {59323, R_028C30_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2, 8, 1994}, - {59357, R_028C34_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3, 8, 2002}, - {59391, R_028C38_PA_SC_AA_MASK_X0Y0_X1Y0, 2, 2010}, - {59415, R_028C3C_PA_SC_AA_MASK_X0Y1_X1Y1, 2, 2012}, - {59439, R_028C40_PA_SC_SHADER_CONTROL, 1, 2014}, - {59460, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, 1, 2015}, - {59488, R_028C5C_VGT_OUT_DEALLOC_CNTL, 1, 2016}, - {59509, R_028C60_CB_COLOR0_BASE}, - {59524, R_028C64_CB_COLOR0_PITCH, 2, 2017}, - {59540, R_028C68_CB_COLOR0_SLICE, 1, 2019}, - {59556, R_028C6C_CB_COLOR0_VIEW, 2, 2020}, - {59571, R_028C70_CB_COLOR0_INFO, 18, 2022}, - {59586, R_028C74_CB_COLOR0_ATTRIB, 6, 2040}, - {59603, R_028C78_CB_COLOR0_DCC_CONTROL, 9, 2046}, - {59625, R_028C7C_CB_COLOR0_CMASK}, - {59641, R_028C80_CB_COLOR0_CMASK_SLICE, 1, 2055}, - {59663, R_028C84_CB_COLOR0_FMASK}, - {59679, R_028C88_CB_COLOR0_FMASK_SLICE, 1, 2056}, - {59701, R_028C8C_CB_COLOR0_CLEAR_WORD0}, - {59723, R_028C90_CB_COLOR0_CLEAR_WORD1}, - {59745, R_028C94_CB_COLOR0_DCC_BASE}, - {59764, R_028C9C_CB_COLOR1_BASE}, - {59779, R_028CA0_CB_COLOR1_PITCH, 2, 2017}, - {59795, R_028CA4_CB_COLOR1_SLICE, 1, 2019}, - {59811, R_028CA8_CB_COLOR1_VIEW, 2, 2020}, - {59826, R_028CAC_CB_COLOR1_INFO, 18, 2022}, - {59841, R_028CB0_CB_COLOR1_ATTRIB, 6, 2040}, - {59858, R_028CB4_CB_COLOR1_DCC_CONTROL, 9, 2046}, - {59880, R_028CB8_CB_COLOR1_CMASK}, - {59896, R_028CBC_CB_COLOR1_CMASK_SLICE, 1, 2055}, - {59918, R_028CC0_CB_COLOR1_FMASK}, - {59934, R_028CC4_CB_COLOR1_FMASK_SLICE, 1, 2056}, - {59956, R_028CC8_CB_COLOR1_CLEAR_WORD0}, - {59978, R_028CCC_CB_COLOR1_CLEAR_WORD1}, - {60000, R_028CD0_CB_COLOR1_DCC_BASE}, - {60019, R_028CD8_CB_COLOR2_BASE}, - {60034, R_028CDC_CB_COLOR2_PITCH, 2, 2017}, - {60050, R_028CE0_CB_COLOR2_SLICE, 1, 2019}, - {60066, R_028CE4_CB_COLOR2_VIEW, 2, 2020}, - {60081, R_028CE8_CB_COLOR2_INFO, 18, 2022}, - {60096, R_028CEC_CB_COLOR2_ATTRIB, 6, 2040}, - {60113, R_028CF0_CB_COLOR2_DCC_CONTROL, 9, 2046}, - {60135, R_028CF4_CB_COLOR2_CMASK}, - {60151, R_028CF8_CB_COLOR2_CMASK_SLICE, 1, 2055}, - {60173, R_028CFC_CB_COLOR2_FMASK}, - {60189, R_028D00_CB_COLOR2_FMASK_SLICE, 1, 2056}, - {60211, R_028D04_CB_COLOR2_CLEAR_WORD0}, - {60233, R_028D08_CB_COLOR2_CLEAR_WORD1}, - {60255, R_028D0C_CB_COLOR2_DCC_BASE}, - {60274, R_028D14_CB_COLOR3_BASE}, - {60289, R_028D18_CB_COLOR3_PITCH, 2, 2017}, - {60305, R_028D1C_CB_COLOR3_SLICE, 1, 2019}, - {60321, R_028D20_CB_COLOR3_VIEW, 2, 2020}, - {60336, R_028D24_CB_COLOR3_INFO, 18, 2022}, - {60351, R_028D28_CB_COLOR3_ATTRIB, 6, 2040}, - {60368, R_028D2C_CB_COLOR3_DCC_CONTROL, 9, 2046}, - {60390, R_028D30_CB_COLOR3_CMASK}, - {60406, R_028D34_CB_COLOR3_CMASK_SLICE, 1, 2055}, - {60428, R_028D38_CB_COLOR3_FMASK}, - {60444, R_028D3C_CB_COLOR3_FMASK_SLICE, 1, 2056}, - {60466, R_028D40_CB_COLOR3_CLEAR_WORD0}, - {60488, R_028D44_CB_COLOR3_CLEAR_WORD1}, - {60510, R_028D48_CB_COLOR3_DCC_BASE}, - {60529, R_028D50_CB_COLOR4_BASE}, - {60544, R_028D54_CB_COLOR4_PITCH, 2, 2017}, - {60560, R_028D58_CB_COLOR4_SLICE, 1, 2019}, - {60576, R_028D5C_CB_COLOR4_VIEW, 2, 2020}, - {60591, R_028D60_CB_COLOR4_INFO, 18, 2022}, - {60606, R_028D64_CB_COLOR4_ATTRIB, 6, 2040}, - {60623, R_028D68_CB_COLOR4_DCC_CONTROL, 9, 2046}, - {60645, R_028D6C_CB_COLOR4_CMASK}, - {60661, R_028D70_CB_COLOR4_CMASK_SLICE, 1, 2055}, - {60683, R_028D74_CB_COLOR4_FMASK}, - {60699, R_028D78_CB_COLOR4_FMASK_SLICE, 1, 2056}, - {60721, R_028D7C_CB_COLOR4_CLEAR_WORD0}, - {60743, R_028D80_CB_COLOR4_CLEAR_WORD1}, - {60765, R_028D84_CB_COLOR4_DCC_BASE}, - {60784, R_028D8C_CB_COLOR5_BASE}, - {60799, R_028D90_CB_COLOR5_PITCH, 2, 2017}, - {60815, R_028D94_CB_COLOR5_SLICE, 1, 2019}, - {60831, R_028D98_CB_COLOR5_VIEW, 2, 2020}, - {60846, R_028D9C_CB_COLOR5_INFO, 18, 2022}, - {60861, R_028DA0_CB_COLOR5_ATTRIB, 6, 2040}, - {60878, R_028DA4_CB_COLOR5_DCC_CONTROL, 9, 2046}, - {60900, R_028DA8_CB_COLOR5_CMASK}, - {60916, R_028DAC_CB_COLOR5_CMASK_SLICE, 1, 2055}, - {60938, R_028DB0_CB_COLOR5_FMASK}, - {60954, R_028DB4_CB_COLOR5_FMASK_SLICE, 1, 2056}, - {60976, R_028DB8_CB_COLOR5_CLEAR_WORD0}, - {60998, R_028DBC_CB_COLOR5_CLEAR_WORD1}, - {61020, R_028DC0_CB_COLOR5_DCC_BASE}, - {61039, R_028DC8_CB_COLOR6_BASE}, - {61054, R_028DCC_CB_COLOR6_PITCH, 2, 2017}, - {61070, R_028DD0_CB_COLOR6_SLICE, 1, 2019}, - {61086, R_028DD4_CB_COLOR6_VIEW, 2, 2020}, - {61101, R_028DD8_CB_COLOR6_INFO, 18, 2022}, - {61116, R_028DDC_CB_COLOR6_ATTRIB, 6, 2040}, - {61133, R_028DE0_CB_COLOR6_DCC_CONTROL, 9, 2046}, - {61155, R_028DE4_CB_COLOR6_CMASK}, - {61171, R_028DE8_CB_COLOR6_CMASK_SLICE, 1, 2055}, - {61193, R_028DEC_CB_COLOR6_FMASK}, - {61209, R_028DF0_CB_COLOR6_FMASK_SLICE, 1, 2056}, - {61231, R_028DF4_CB_COLOR6_CLEAR_WORD0}, - {61253, R_028DF8_CB_COLOR6_CLEAR_WORD1}, - {61275, R_028DFC_CB_COLOR6_DCC_BASE}, - {61294, R_028E04_CB_COLOR7_BASE}, - {61309, R_028E08_CB_COLOR7_PITCH, 2, 2017}, - {61325, R_028E0C_CB_COLOR7_SLICE, 1, 2019}, - {61341, R_028E10_CB_COLOR7_VIEW, 2, 2020}, - {61356, R_028E14_CB_COLOR7_INFO, 18, 2022}, - {61371, R_028E18_CB_COLOR7_ATTRIB, 6, 2040}, - {61388, R_028E1C_CB_COLOR7_DCC_CONTROL, 9, 2046}, - {61410, R_028E20_CB_COLOR7_CMASK}, - {61426, R_028E24_CB_COLOR7_CMASK_SLICE, 1, 2055}, - {61448, R_028E28_CB_COLOR7_FMASK}, - {61464, R_028E2C_CB_COLOR7_FMASK_SLICE, 1, 2056}, - {61486, R_028E30_CB_COLOR7_CLEAR_WORD0}, - {61508, R_028E34_CB_COLOR7_CLEAR_WORD1}, - {61530, R_028E38_CB_COLOR7_DCC_BASE}, -}; - -static const char sid_strings[] = - "NOP\0" /* 0 */ - "SET_BASE\0" /* 4 */ - "CLEAR_STATE\0" /* 13 */ - "INDEX_BUFFER_SIZE\0" /* 25, 38 */ - "DISPATCH_DIRECT\0" /* 43 */ - "DISPATCH_INDIRECT\0" /* 59 */ - "OCCLUSION_QUERY\0" /* 91, 77 */ - "SET_PREDICATION\0" /* 93 */ - "COND_EXEC\0" /* 109 */ - "PRED_EXEC\0" /* 119 */ - "DRAW_INDIRECT\0" /* 129 */ - "DRAW_INDEX_INDIRECT\0" /* 143 */ - "INDEX_BASE\0" /* 163 */ - "DRAW_INDEX_2\0" /* 174 */ - "CONTEXT_CONTROL\0" /* 187, 195 */ - "INDEX_TYPE\0" /* 209, 203 */ - "DRAW_INDIRECT_MULTI\0" /* 214 */ - "DRAW_INDEX_AUTO\0" /* 234 */ - "DRAW_INDEX_IMMD\0" /* 250 */ - "NUM_INSTANCES\0" /* 266 */ - "DRAW_INDEX_MULTI_AUTO\0" /* 280 */ - "INDIRECT_BUFFER_SI\0" /* 302 */ - "STRMOUT_BUFFER_UPDATE\0" /* 321 */ - "DRAW_INDEX_OFFSET_2\0" /* 343 */ - "DRAW_PREAMBLE\0" /* 363 */ - "WRITE_DATA\0" /* 377, 383 */ - "DRAW_INDEX_INDIRECT_MULTI\0" /* 388 */ - "MEM_SEMAPHORE\0" /* 414 */ - "MPEG_INDEX\0" /* 428, 437 */ - "WAIT_REG_MEM\0" /* 439 */ - "MEM_WRITE\0" /* 452 */ - "INDIRECT_BUFFER_CIK\0" /* 462 */ - "COPY_DATA\0" /* 482 */ - "PFP_SYNC_ME\0" /* 492, 501 */ - "SURFACE_SYNC\0" /* 504 */ - "ME_INITIALIZE\0" /* 517 */ - "COND_WRITE\0" /* 531 */ - "EVENT_WRITE\0" /* 542 */ - "EVENT_WRITE_EOP\0" /* 554 */ - "EVENT_WRITE_EOS\0" /* 570 */ - "ONE_REG_WRITE\0" /* 586 */ - "ACQUIRE_MEM\0" /* 600 */ - "SET_CONFIG_REG\0" /* 612 */ - "SET_CONTEXT_REG\0" /* 627 */ - "SET_SH_REG\0" /* 643 */ - "SET_SH_REG_OFFSET\0" /* 665, 654 */ - "SET_UCONFIG_REG\0" /* 672 */ - "LOAD_CONST_RAM\0" /* 688 */ - "WRITE_CONST_RAM\0" /* 703 */ - "DUMP_CONST_RAM\0" /* 719 */ - "INCREMENT_CE_COUNTER\0" /* 734 */ - "INCREMENT_DE_COUNTER\0" /* 755 */ - "WAIT_ON_CE_COUNTER\0" /* 776 */ - "IT_OPCODE_C\0" /* 795 */ - "CP_DMA\0" /* 807 */ - "DMA_DATA\0" /* 814 */ - "PFP\0" /* 823 */ - "CE\0" /* 827 */ - "DE\0" /* 830 */ - "ENGINE_SEL\0" /* 833 */ - "WR_CONFIRM\0" /* 844 */ - "WR_ONE_ADDR\0" /* 862, 855 */ - "MEM_MAPPED_REGISTER\0" /* 867, 878 */ - "MEMORY_SYNC\0" /* 887 */ - "TC_L2\0" /* 899 */ - "GDS\0" /* 905 */ - "RESERVED\0" /* 909 */ - "MEM_ASYNC\0" /* 918 */ - "DST_SEL\0" /* 928 */ - "SRC_ADDR_LO\0" /* 936 */ - "CP_SYNC\0" /* 948 */ - "SRC_ADDR\0" /* 956 */ - "SRC_ADDR_TC_L2\0" /* 965 */ - "SRC_SEL\0" /* 980 */ - "ENGINE\0" /* 988 */ - "DST_ADDR\0" /* 995 */ - "DST_ADDR_TC_L2\0" /* 1004 */ - "DSL_SEL\0" /* 1019 */ - "SRC_ADDR_HI\0" /* 1027 */ - "DST_ADDR_LO\0" /* 1039 */ - "DST_ADDR_HI\0" /* 1051 */ - "BYTE_COUNT\0" /* 1063 */ - "DISABLE_WR_CONFIRM\0" /* 1074 */ - "NONE\0" /* 1093 */ - "8_IN_16\0" /* 1098 */ - "8_IN_32\0" /* 1106 */ - "8_IN_64\0" /* 1114 */ - "SRC_SWAP\0" /* 1122 */ - "DST_SWAP\0" /* 1131 */ - "MEMORY\0" /* 1140 */ - "SAS\0" /* 1147 */ - "DAS\0" /* 1151 */ - "INCREMENT\0" /* 1155 */ - "NO_INCREMENT\0" /* 1165 */ - "SAIC\0" /* 1178 */ - "DAIC\0" /* 1183 */ - "RAW_WAIT\0" /* 1188 */ - "SDMA_RQ_PENDING\0" /* 1197 */ - "TST_RQ_PENDING\0" /* 1213 */ - "SDMA1_RQ_PENDING\0" /* 1228 */ - "VCE0_RQ_PENDING\0" /* 1245 */ - "VP8_BUSY\0" /* 1261 */ - "SDMA_BUSY\0" /* 1270, 1271 */ - "SDMA1_BUSY\0" /* 1280 */ - "VCE0_BUSY\0" /* 1291 */ - "XDMA_BUSY\0" /* 1301 */ - "CHUB_BUSY\0" /* 1311 */ - "SDMA2_BUSY\0" /* 1321 */ - "SDMA3_BUSY\0" /* 1332 */ - "SAMSCP_BUSY\0" /* 1347, 1343 */ - "ISP_BUSY\0" /* 1355 */ - "VCE1_BUSY\0" /* 1364 */ - "ODE_BUSY\0" /* 1374 */ - "SDMA2_RQ_PENDING\0" /* 1383 */ - "SDMA3_RQ_PENDING\0" /* 1400 */ - "SAMSCP_RQ_PENDING\0" /* 1417 */ - "ISP_RQ_PENDING\0" /* 1435 */ - "VCE1_RQ_PENDING\0" /* 1450 */ - "UVD_RQ_PENDING\0" /* 1466 */ - "SAMMSP_RQ_PENDING\0" /* 1481 */ - "ACP_RQ_PENDING\0" /* 1499 */ - "SMU_RQ_PENDING\0" /* 1514 */ - "GRBM_RQ_PENDING\0" /* 1529 */ - "HI_RQ_PENDING\0" /* 1545 */ - "VMC_BUSY\0" /* 1559 */ - "MCB_BUSY\0" /* 1568, 1569 */ - "MCB_NON_DISPLAY_BUSY\0" /* 1577 */ - "MCC_BUSY\0" /* 1598 */ - "MCD_BUSY\0" /* 1607 */ - "VMC1_BUSY\0" /* 1616 */ - "SEM_BUSY\0" /* 1626 */ - "ACP_BUSY\0" /* 1635 */ - "IH_BUSY\0" /* 1644 */ - "UVD_BUSY\0" /* 1652 */ - "SAMMSP_BUSY\0" /* 1661 */ - "GCATCL2_BUSY\0" /* 1673 */ - "OSATCL2_BUSY\0" /* 1686 */ - "BIF_BUSY\0" /* 1699 */ - "MCC0_BUSY\0" /* 1708 */ - "MCC1_BUSY\0" /* 1718 */ - "MCC2_BUSY\0" /* 1728 */ - "MCC3_BUSY\0" /* 1738 */ - "MCC4_BUSY\0" /* 1748 */ - "MCC5_BUSY\0" /* 1758 */ - "MCC6_BUSY\0" /* 1768 */ - "MCC7_BUSY\0" /* 1778 */ - "MCD0_BUSY\0" /* 1788 */ - "MCD1_BUSY\0" /* 1798 */ - "MCD2_BUSY\0" /* 1808 */ - "MCD3_BUSY\0" /* 1818 */ - "MCD4_BUSY\0" /* 1828 */ - "MCD5_BUSY\0" /* 1838 */ - "MCD6_BUSY\0" /* 1848 */ - "MCD7_BUSY\0" /* 1858 */ - "IDLE\0" /* 1868 */ - "REG_IDLE\0" /* 1873 */ - "RB_EMPTY\0" /* 1882 */ - "RB_FULL\0" /* 1891 */ - "RB_CMD_IDLE\0" /* 1899 */ - "RB_CMD_FULL\0" /* 1911 */ - "IB_CMD_IDLE\0" /* 1923 */ - "IB_CMD_FULL\0" /* 1935 */ - "BLOCK_IDLE\0" /* 1947 */ - "INSIDE_IB\0" /* 1958 */ - "EX_IDLE\0" /* 1968 */ - "EX_IDLE_POLL_TIMER_EXPIRE\0" /* 1976 */ - "PACKET_READY\0" /* 2002 */ - "MC_WR_IDLE\0" /* 2015 */ - "SRBM_IDLE\0" /* 2026 */ - "CONTEXT_EMPTY\0" /* 2036 */ - "DELTA_RPTR_FULL\0" /* 2050 */ - "RB_MC_RREQ_IDLE\0" /* 2066 */ - "IB_MC_RREQ_IDLE\0" /* 2082 */ - "MC_RD_IDLE\0" /* 2098 */ - "DELTA_RPTR_EMPTY\0" /* 2109 */ - "MC_RD_RET_STALL\0" /* 2126 */ - "MC_RD_NO_POLL_IDLE\0" /* 2142 */ - "PREV_CMD_IDLE\0" /* 2161 */ - "SEM_IDLE\0" /* 2175 */ - "SEM_REQ_STALL\0" /* 2184 */ - "SEM_RESP_STATE\0" /* 2198 */ - "INT_IDLE\0" /* 2213 */ - "INT_REQ_STALL\0" /* 2222 */ - "ME0PIPE1_CMDFIFO_AVAIL\0" /* 2236 */ - "ME0PIPE1_CF_RQ_PENDING\0" /* 2259 */ - "ME0PIPE1_PF_RQ_PENDING\0" /* 2282 */ - "ME1PIPE0_RQ_PENDING\0" /* 2305 */ - "ME1PIPE1_RQ_PENDING\0" /* 2325 */ - "ME1PIPE2_RQ_PENDING\0" /* 2345 */ - "ME1PIPE3_RQ_PENDING\0" /* 2365 */ - "ME2PIPE0_RQ_PENDING\0" /* 2385 */ - "ME2PIPE1_RQ_PENDING\0" /* 2405 */ - "ME2PIPE2_RQ_PENDING\0" /* 2425 */ - "ME2PIPE3_RQ_PENDING\0" /* 2445 */ - "RLC_RQ_PENDING\0" /* 2465 */ - "RLC_BUSY\0" /* 2480 */ - "TC_BUSY\0" /* 2489 */ - "TCC_CC_RESIDENT\0" /* 2497 */ - "CPF_BUSY\0" /* 2513 */ - "CPC_BUSY\0" /* 2522 */ - "CPG_BUSY\0" /* 2531 */ - "ME0PIPE0_CMDFIFO_AVAIL\0" /* 2540 */ - "SRBM_RQ_PENDING\0" /* 2563 */ - "ME0PIPE0_CF_RQ_PENDING\0" /* 2579 */ - "ME0PIPE0_PF_RQ_PENDING\0" /* 2602 */ - "GDS_DMA_RQ_PENDING\0" /* 2625 */ - "DB_CLEAN\0" /* 2644 */ - "CB_CLEAN\0" /* 2653 */ - "TA_BUSY\0" /* 2662 */ - "GDS_BUSY\0" /* 2670 */ - "WD_BUSY_NO_DMA\0" /* 2679 */ - "VGT_BUSY\0" /* 2694 */ - "IA_BUSY_NO_DMA\0" /* 2703 */ - "IA_BUSY\0" /* 2718 */ - "SX_BUSY\0" /* 2726 */ - "WD_BUSY\0" /* 2734 */ - "SPI_BUSY\0" /* 2742 */ - "BCI_BUSY\0" /* 2751 */ - "SC_BUSY\0" /* 2760 */ - "PA_BUSY\0" /* 2768 */ - "DB_BUSY\0" /* 2776 */ - "CP_COHERENCY_BUSY\0" /* 2784 */ - "GUI_ACTIVE\0" /* 2802 */ - "OFFSET_UPDATE_DONE\0" /* 2827, 2813 */ - "DEST_BASE_0_ENA\0" /* 2832 */ - "DEST_BASE_1_ENA\0" /* 2848 */ - "CB0_DEST_BASE_ENA\0" /* 2864 */ - "CB1_DEST_BASE_ENA\0" /* 2882 */ - "CB2_DEST_BASE_ENA\0" /* 2900 */ - "CB3_DEST_BASE_ENA\0" /* 2918 */ - "CB4_DEST_BASE_ENA\0" /* 2936 */ - "CB5_DEST_BASE_ENA\0" /* 2954 */ - "CB6_DEST_BASE_ENA\0" /* 2972 */ - "CB7_DEST_BASE_ENA\0" /* 2990 */ - "DB_DEST_BASE_ENA\0" /* 3008 */ - "DEST_BASE_2_ENA\0" /* 3025 */ - "DEST_BASE_3_ENA\0" /* 3041 */ - "TCL1_ACTION_ENA\0" /* 3057 */ - "TC_ACTION_ENA\0" /* 3073 */ - "CB_ACTION_ENA\0" /* 3087 */ - "DB_ACTION_ENA\0" /* 3101 */ - "SH_KCACHE_ACTION_ENA\0" /* 3115 */ - "SH_ICACHE_ACTION_ENA\0" /* 3136 */ - "COHER_BASE_HI_256B\0" /* 3157 */ - "START_DELAY_COUNT\0" /* 3176 */ - "TC_SD_ACTION_ENA\0" /* 3194 */ - "TC_NC_ACTION_ENA\0" /* 3211 */ - "TCL1_VOL_ACTION_ENA\0" /* 3228 */ - "TC_VOL_ACTION_ENA\0" /* 3248 */ - "TC_WB_ACTION_ENA\0" /* 3266 */ - "SH_KCACHE_VOL_ACTION_ENA\0" /* 3283 */ - "SH_KCACHE_WB_ACTION_ENA\0" /* 3308 */ - "SH_SD_ACTION_ENA\0" /* 3332 */ - "MATCHING_GFX_CNTX\0" /* 3349 */ - "MEID\0" /* 3367 */ - "PHASE1_STATUS\0" /* 3379, 3372 */ - "MEC1_BUSY\0" /* 3386 */ - "MEC2_BUSY\0" /* 3396 */ - "DC0_BUSY\0" /* 3406 */ - "DC1_BUSY\0" /* 3415 */ - "RCIU1_BUSY\0" /* 3424 */ - "RCIU2_BUSY\0" /* 3435 */ - "ROQ1_BUSY\0" /* 3446 */ - "ROQ2_BUSY\0" /* 3456 */ - "TCIU_BUSY\0" /* 3466 */ - "SCRATCH_RAM_BUSY\0" /* 3476 */ - "QU_BUSY\0" /* 3493 */ - "ATCL2IU_BUSY\0" /* 3501 */ - "CPG_CPC_BUSY\0" /* 3514 */ - "CPF_CPC_BUSY\0" /* 3527 */ - "MEC1_LOAD_BUSY\0" /* 3540 */ - "MEC1_SEMAPOHRE_BUSY\0" /* 3555 */ - "MEC1_MUTEX_BUSY\0" /* 3575 */ - "MEC1_MESSAGE_BUSY\0" /* 3591 */ - "MEC1_EOP_QUEUE_BUSY\0" /* 3609 */ - "MEC1_IQ_QUEUE_BUSY\0" /* 3629 */ - "MEC1_IB_QUEUE_BUSY\0" /* 3648 */ - "MEC1_TC_BUSY\0" /* 3667 */ - "MEC1_DMA_BUSY\0" /* 3680 */ - "MEC1_PARTIAL_FLUSH_BUSY\0" /* 3694 */ - "MEC1_PIPE0_BUSY\0" /* 3718 */ - "MEC1_PIPE1_BUSY\0" /* 3734 */ - "MEC1_PIPE2_BUSY\0" /* 3750 */ - "MEC1_PIPE3_BUSY\0" /* 3766 */ - "MEC2_LOAD_BUSY\0" /* 3782 */ - "MEC2_SEMAPOHRE_BUSY\0" /* 3797 */ - "MEC2_MUTEX_BUSY\0" /* 3817 */ - "MEC2_MESSAGE_BUSY\0" /* 3833 */ - "MEC2_EOP_QUEUE_BUSY\0" /* 3851 */ - "MEC2_IQ_QUEUE_BUSY\0" /* 3871 */ - "MEC2_IB_QUEUE_BUSY\0" /* 3890 */ - "MEC2_TC_BUSY\0" /* 3909 */ - "MEC2_DMA_BUSY\0" /* 3922 */ - "MEC2_PARTIAL_FLUSH_BUSY\0" /* 3936 */ - "MEC2_PIPE0_BUSY\0" /* 3960 */ - "MEC2_PIPE1_BUSY\0" /* 3976 */ - "MEC2_PIPE2_BUSY\0" /* 3992 */ - "MEC2_PIPE3_BUSY\0" /* 4008 */ - "RCIU_TX_FREE_STALL\0" /* 4024 */ - "RCIU_PRIV_VIOLATION\0" /* 4043 */ - "TCIU_TX_FREE_STALL\0" /* 4063 */ - "MEC1_DECODING_PACKET\0" /* 4082 */ - "MEC1_WAIT_ON_RCIU\0" /* 4103 */ - "MEC1_WAIT_ON_RCIU_READ\0" /* 4121 */ - "MEC1_WAIT_ON_ROQ_DATA\0" /* 4144 */ - "MEC2_DECODING_PACKET\0" /* 4166 */ - "MEC2_WAIT_ON_RCIU\0" /* 4187 */ - "MEC2_WAIT_ON_RCIU_READ\0" /* 4205 */ - "MEC2_WAIT_ON_ROQ_DATA\0" /* 4228 */ - "ATCL2IU_WAITING_ON_FREE\0" /* 4250 */ - "ATCL2IU_WAITING_ON_TAGS\0" /* 4274 */ - "ATCL1_WAITING_ON_TRANS\0" /* 4298 */ - "POST_WPTR_GFX_BUSY\0" /* 4321 */ - "CSF_BUSY\0" /* 4340 */ - "ROQ_ALIGN_BUSY\0" /* 4349 */ - "ROQ_RING_BUSY\0" /* 4364 */ - "ROQ_INDIRECT1_BUSY\0" /* 4378 */ - "ROQ_INDIRECT2_BUSY\0" /* 4397 */ - "ROQ_STATE_BUSY\0" /* 4416 */ - "ROQ_CE_RING_BUSY\0" /* 4431 */ - "ROQ_CE_INDIRECT1_BUSY\0" /* 4448 */ - "ROQ_CE_INDIRECT2_BUSY\0" /* 4470 */ - "SEMAPHORE_BUSY\0" /* 4492 */ - "INTERRUPT_BUSY\0" /* 4507 */ - "HQD_BUSY\0" /* 4522 */ - "PRT_BUSY\0" /* 4531 */ - "CPF_GFX_BUSY\0" /* 4540 */ - "CPF_CMP_BUSY\0" /* 4553 */ - "GRBM_CPF_STAT_BUSY\0" /* 4566 */ - "CPC_CPF_BUSY\0" /* 4585 */ - "REG_BUS_FIFO_BUSY\0" /* 4598 */ - "CSF_RING_BUSY\0" /* 4616 */ - "CSF_INDIRECT1_BUSY\0" /* 4630 */ - "CSF_INDIRECT2_BUSY\0" /* 4649 */ - "CSF_STATE_BUSY\0" /* 4668 */ - "CSF_CE_INDR1_BUSY\0" /* 4683 */ - "CSF_CE_INDR2_BUSY\0" /* 4701 */ - "CSF_ARBITER_BUSY\0" /* 4719 */ - "CSF_INPUT_BUSY\0" /* 4736 */ - "OUTSTANDING_READ_TAGS\0" /* 4751 */ - "HPD_PROCESSING_EOP_BUSY\0" /* 4773 */ - "HQD_DISPATCH_BUSY\0" /* 4797 */ - "HQD_IQ_TIMER_BUSY\0" /* 4815 */ - "HQD_DMA_OFFLOAD_BUSY\0" /* 4833 */ - "HQD_WAIT_SEMAPHORE_BUSY\0" /* 4854 */ - "HQD_SIGNAL_SEMAPHORE_BUSY\0" /* 4878 */ - "HQD_MESSAGE_BUSY\0" /* 4904 */ - "HQD_PQ_FETCHER_BUSY\0" /* 4921 */ - "HQD_IB_FETCHER_BUSY\0" /* 4941 */ - "HQD_IQ_FETCHER_BUSY\0" /* 4961 */ - "HQD_EOP_FETCHER_BUSY\0" /* 4981 */ - "HQD_CONSUMED_RPTR_BUSY\0" /* 5002 */ - "HQD_FETCHER_ARB_BUSY\0" /* 5025 */ - "HQD_ROQ_ALIGN_BUSY\0" /* 5046 */ - "HQD_ROQ_EOP_BUSY\0" /* 5065 */ - "HQD_ROQ_IQ_BUSY\0" /* 5082 */ - "HQD_ROQ_PQ_BUSY\0" /* 5098 */ - "HQD_ROQ_IB_BUSY\0" /* 5114 */ - "HQD_WPTR_POLL_BUSY\0" /* 5130 */ - "HQD_PQ_BUSY\0" /* 5149 */ - "HQD_IB_BUSY\0" /* 5161 */ - "RING_FETCHING_DATA\0" /* 5173 */ - "INDR1_FETCHING_DATA\0" /* 5192 */ - "INDR2_FETCHING_DATA\0" /* 5212 */ - "STATE_FETCHING_DATA\0" /* 5232 */ - "TCIU_WAITING_ON_FREE\0" /* 5252 */ - "TCIU_WAITING_ON_TAGS\0" /* 5273 */ - "COHER_SIZE_HI_256B\0" /* 5294 */ - "PRIM_COUNT\0" /* 5313 */ - "VS_NO_EXTRA_BUFFER\0" /* 5324 */ - "STREAMOUT_FULL_FLUSH\0" /* 5343 */ - "ES_LIMIT\0" /* 5364, 5367 */ - "VERT_REUSE\0" /* 5373 */ - "DI_PT_NONE\0" /* 5384 */ - "DI_PT_POINTLIST\0" /* 5395 */ - "DI_PT_LINELIST\0" /* 5411 */ - "DI_PT_LINESTRIP\0" /* 5426 */ - "DI_PT_TRILIST\0" /* 5442 */ - "DI_PT_TRIFAN\0" /* 5456 */ - "DI_PT_TRISTRIP\0" /* 5469 */ - "DI_PT_UNUSED_0\0" /* 5484 */ - "DI_PT_UNUSED_1\0" /* 5499 */ - "DI_PT_PATCH\0" /* 5514 */ - "DI_PT_LINELIST_ADJ\0" /* 5526 */ - "DI_PT_LINESTRIP_ADJ\0" /* 5545 */ - "DI_PT_TRILIST_ADJ\0" /* 5565 */ - "DI_PT_TRISTRIP_ADJ\0" /* 5583 */ - "DI_PT_UNUSED_3\0" /* 5602 */ - "DI_PT_UNUSED_4\0" /* 5617 */ - "DI_PT_TRI_WITH_WFLAGS\0" /* 5632 */ - "DI_PT_RECTLIST\0" /* 5654 */ - "DI_PT_LINELOOP\0" /* 5669 */ - "DI_PT_QUADLIST\0" /* 5684 */ - "DI_PT_QUADSTRIP\0" /* 5699 */ - "DI_PT_POLYGON\0" /* 5715 */ - "DI_PT_2D_COPY_RECT_LIST_V0\0" /* 5729 */ - "DI_PT_2D_COPY_RECT_LIST_V1\0" /* 5756 */ - "DI_PT_2D_COPY_RECT_LIST_V2\0" /* 5783 */ - "DI_PT_2D_COPY_RECT_LIST_V3\0" /* 5810 */ - "DI_PT_2D_FILL_RECT_LIST\0" /* 5837 */ - "DI_PT_2D_LINE_STRIP\0" /* 5861 */ - "DI_PT_2D_TRI_STRIP\0" /* 5881 */ - "PRIM_TYPE\0" /* 5900 */ - "DI_INDEX_SIZE_16_BIT\0" /* 5910 */ - "DI_INDEX_SIZE_32_BIT\0" /* 5931 */ - "OFFCHIP_BUFFERING\0" /* 5952 */ - "CLIP_VTX_REORDER_ENA\0" /* 5970 */ - "NUM_CLIP_SEQ\0" /* 5991 */ - "CLIPPED_PRIM_SEQ_STALL\0" /* 6004 */ - "VE_NAN_PROC_DISABLE\0" /* 6027 */ - "LINE_STIPPLE_VALUE\0" /* 6047 */ - "CURRENT_PTR\0" /* 6066 */ - "CURRENT_COUNT\0" /* 6078 */ - "CE_TO_CSF_NOT_RDY_TO_RCV\0" /* 6092 */ - "CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV\0" /* 6117 */ - "CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER\0" /* 6155 */ - "CE_TO_RAM_INIT_NOT_RDY\0" /* 6196 */ - "CE_TO_RAM_DUMP_NOT_RDY\0" /* 6219 */ - "CE_TO_RAM_WRITE_NOT_RDY\0" /* 6242 */ - "CE_TO_INC_FIFO_NOT_RDY_TO_RCV\0" /* 6266 */ - "CE_TO_WR_FIFO_NOT_RDY_TO_RCV\0" /* 6296 */ - "CE_WAITING_ON_BUFFER_DATA\0" /* 6325 */ - "CE_WAITING_ON_CE_BUFFER_FLAG\0" /* 6351 */ - "CE_WAITING_ON_DE_COUNTER\0" /* 6380 */ - "CE_WAITING_ON_DE_COUNTER_UNDERFLOW\0" /* 6405 */ - "CE_STALLED_ON_TC_WR_CONFIRM\0" /* 6440 */ - "CE_STALLED_ON_ATOMIC_RTN_DATA\0" /* 6468 */ - "RBIU_TO_DMA_NOT_RDY_TO_RCV\0" /* 6498 */ - "RBIU_TO_SEM_NOT_RDY_TO_RCV\0" /* 6525 */ - "RBIU_TO_MEMWR_NOT_RDY_TO_RCV\0" /* 6552 */ - "ME_HAS_ACTIVE_CE_BUFFER_FLAG\0" /* 6581 */ - "ME_HAS_ACTIVE_DE_BUFFER_FLAG\0" /* 6610 */ - "ME_STALLED_ON_TC_WR_CONFIRM\0" /* 6639 */ - "ME_STALLED_ON_ATOMIC_RTN_DATA\0" /* 6667 */ - "ME_WAITING_ON_TC_READ_DATA\0" /* 6697 */ - "ME_WAITING_ON_REG_READ_DATA\0" /* 6724 */ - "RCIU_WAITING_ON_GDS_FREE\0" /* 6752 */ - "RCIU_WAITING_ON_GRBM_FREE\0" /* 6777 */ - "RCIU_WAITING_ON_VGT_FREE\0" /* 6803 */ - "RCIU_STALLED_ON_ME_READ\0" /* 6828 */ - "RCIU_STALLED_ON_DMA_READ\0" /* 6852 */ - "RCIU_STALLED_ON_APPEND_READ\0" /* 6877 */ - "RCIU_HALTED_BY_REG_VIOLATION\0" /* 6905 */ - "PFP_TO_CSF_NOT_RDY_TO_RCV\0" /* 6934 */ - "PFP_TO_MEQ_NOT_RDY_TO_RCV\0" /* 6960 */ - "PFP_TO_RCIU_NOT_RDY_TO_RCV\0" /* 6986 */ - "PFP_TO_VGT_WRITES_PENDING\0" /* 7013 */ - "PFP_RCIU_READ_PENDING\0" /* 7039 */ - "PFP_WAITING_ON_BUFFER_DATA\0" /* 7061 */ - "ME_WAIT_ON_CE_COUNTER\0" /* 7088 */ - "ME_WAIT_ON_AVAIL_BUFFER\0" /* 7110 */ - "GFX_CNTX_NOT_AVAIL_TO_ME\0" /* 7134 */ - "ME_RCIU_NOT_RDY_TO_RCV\0" /* 7159 */ - "ME_TO_CONST_NOT_RDY_TO_RCV\0" /* 7182 */ - "ME_WAITING_DATA_FROM_PFP\0" /* 7209 */ - "ME_WAITING_ON_PARTIAL_FLUSH\0" /* 7234 */ - "MEQ_TO_ME_NOT_RDY_TO_RCV\0" /* 7262 */ - "STQ_TO_ME_NOT_RDY_TO_RCV\0" /* 7287 */ - "ME_WAITING_DATA_FROM_STQ\0" /* 7312 */ - "PFP_STALLED_ON_TC_WR_CONFIRM\0" /* 7337 */ - "PFP_STALLED_ON_ATOMIC_RTN_DATA\0" /* 7366 */ - "EOPD_FIFO_NEEDS_SC_EOP_DONE\0" /* 7397 */ - "EOPD_FIFO_NEEDS_WR_CONFIRM\0" /* 7425 */ - "STRMO_WR_OF_PRIM_DATA_PENDING\0" /* 7452 */ - "PIPE_STATS_WR_DATA_PENDING\0" /* 7482 */ - "APPEND_RDY_WAIT_ON_CS_DONE\0" /* 7528, 7509 */ - "APPEND_RDY_WAIT_ON_PS_DONE\0" /* 7536, 7555 */ - "APPEND_WAIT_ON_WR_CONFIRM\0" /* 7563 */ - "APPEND_ACTIVE_PARTITION\0" /* 7589 */ - "APPEND_WAITING_TO_SEND_MEMWRITE\0" /* 7613 */ - "SURF_SYNC_NEEDS_IDLE_CNTXS\0" /* 7645 */ - "SURF_SYNC_NEEDS_ALL_CLEAN\0" /* 7672 */ - "DC_BUSY\0" /* 7698 */ - "PFP_BUSY\0" /* 7706 */ - "MEQ_BUSY\0" /* 7715 */ - "ME_BUSY\0" /* 7724 */ - "QUERY_BUSY\0" /* 7732 */ - "SURFACE_SYNC_BUSY\0" /* 7743 */ - "RCIU_BUSY\0" /* 7761 */ - "CPC_CPG_BUSY\0" /* 7771 */ - "CE_BUSY\0" /* 7784 */ - "INSTANCE_INDEX\0" /* 7792 */ - "SH_INDEX\0" /* 7807 */ - "SE_INDEX\0" /* 7816 */ - "SH_BROADCAST_WRITES\0" /* 7825 */ - "INSTANCE_BROADCAST_WRITES\0" /* 7845 */ - "SE_BROADCAST_WRITES\0" /* 7871 */ - "X_8K_DWORDS\0" /* 7891 */ - "X_4K_DWORDS\0" /* 7903 */ - "X_2K_DWORDS\0" /* 7915 */ - "X_1K_DWORDS\0" /* 7927 */ - "OFFCHIP_GRANULARITY\0" /* 7939 */ - "ENABLE_PA_SC_OUT_OF_ORDER\0" /* 7959 */ - "DISABLE_SC_DB_TILE_FIX\0" /* 7985 */ - "DISABLE_AA_MASK_FULL_FIX\0" /* 8008 */ - "ENABLE_1XMSAA_SAMPLE_LOCATIONS\0" /* 8033 */ - "ENABLE_1XMSAA_SAMPLE_LOC_CENTROID\0" /* 8064 */ - "DISABLE_SCISSOR_FIX\0" /* 8098 */ - "DISABLE_PW_BUBBLE_COLLAPSE\0" /* 8118 */ - "SEND_UNLIT_STILES_TO_PACKER\0" /* 8145 */ - "DISABLE_DUALGRAD_PERF_OPTIMIZATION\0" /* 8173 */ - "INST_INVALIDATE\0" /* 8208 */ - "DATA_INVALIDATE\0" /* 8224 */ - "INVALIDATE_VOLATILE\0" /* 8240 */ - "RET\0" /* 8260 */ - "RUI\0" /* 8264 */ - "RNG\0" /* 8268 */ - "EN\0" /* 8272 */ - "SQ_EXP_MRT\0" /* 8275 */ - "SQ_EXP_MRTZ\0" /* 8286 */ - "SQ_EXP_NULL\0" /* 8298 */ - "SQ_EXP_POS\0" /* 8310 */ - "SQ_EXP_PARAM\0" /* 8321 */ - "TGT\0" /* 8334 */ - "COMPR\0" /* 8338 */ - "VM\0" /* 8344 */ - "SQ_ENC_EXP_FIELD\0" /* 8347 */ - "ENCODING\0" /* 8364 */ - "ADDRESS\0" /* 8373 */ - "COUNT_HI\0" /* 8381 */ - "BASE_ADDRESS_HI\0" /* 8395, 8390 */ - "STRIDE\0" /* 8406 */ - "CACHE_SWIZZLE\0" /* 8413 */ - "SWIZZLE_ENABLE\0" /* 8427, 8435 */ - "SQ_SEL_0\0" /* 8442 */ - "SQ_SEL_1\0" /* 8451 */ - "SQ_SEL_RESERVED_0\0" /* 8467, 8460 */ - "SQ_SEL_RESERVED_1\0" /* 8485, 8478 */ - "SQ_SEL_X\0" /* 8496 */ - "SQ_SEL_Y\0" /* 8505 */ - "SQ_SEL_Z\0" /* 8514 */ - "SQ_SEL_W\0" /* 8523 */ - "DST_SEL_X\0" /* 8532 */ - "DST_SEL_Y\0" /* 8542 */ - "DST_SEL_Z\0" /* 8552 */ - "DST_SEL_W\0" /* 8562 */ - "BUF_NUM_FORMAT_UNORM\0" /* 8572 */ - "BUF_NUM_FORMAT_SNORM\0" /* 8593 */ - "BUF_NUM_FORMAT_USCALED\0" /* 8614 */ - "BUF_NUM_FORMAT_SSCALED\0" /* 8637 */ - "BUF_NUM_FORMAT_UINT\0" /* 8660 */ - "BUF_NUM_FORMAT_SINT\0" /* 8680 */ - "BUF_NUM_FORMAT_SNORM_OGL\0" /* 8700 */ - "BUF_NUM_FORMAT_FLOAT\0" /* 8725 */ - "NUM_FORMAT\0" /* 8746, 8750 */ - "BUF_DATA_FORMAT_INVALID\0" /* 8757 */ - "BUF_DATA_FORMAT_8\0" /* 8781 */ - "BUF_DATA_FORMAT_16\0" /* 8799 */ - "BUF_DATA_FORMAT_8_8\0" /* 8818 */ - "BUF_DATA_FORMAT_32\0" /* 8838 */ - "BUF_DATA_FORMAT_16_16\0" /* 8857 */ - "BUF_DATA_FORMAT_10_11_11\0" /* 8879 */ - "BUF_DATA_FORMAT_11_11_10\0" /* 8904 */ - "BUF_DATA_FORMAT_10_10_10_2\0" /* 8929 */ - "BUF_DATA_FORMAT_2_10_10_10\0" /* 8956 */ - "BUF_DATA_FORMAT_8_8_8_8\0" /* 8983 */ - "BUF_DATA_FORMAT_32_32\0" /* 9007 */ - "BUF_DATA_FORMAT_16_16_16_16\0" /* 9029 */ - "BUF_DATA_FORMAT_32_32_32\0" /* 9057 */ - "BUF_DATA_FORMAT_32_32_32_32\0" /* 9082 */ - "BUF_DATA_FORMAT_RESERVED_15\0" /* 9110 */ - "DATA_FORMAT\0" /* 9138 */ - "ELEMENT_SIZE\0" /* 9150 */ - "INDEX_STRIDE\0" /* 9163 */ - "ADD_TID_ENABLE\0" /* 9176 */ - "ATC\0" /* 9191 */ - "HASH_ENABLE\0" /* 9195 */ - "HEAP\0" /* 9207 */ - "MTYPE\0" /* 9212 */ - "SQ_RSRC_BUF\0" /* 9218 */ - "SQ_RSRC_BUF_RSVD_1\0" /* 9230 */ - "SQ_RSRC_BUF_RSVD_2\0" /* 9249 */ - "SQ_RSRC_BUF_RSVD_3\0" /* 9268 */ - "MIN_LOD\0" /* 9287 */ - "IMG_DATA_FORMAT_INVALID\0" /* 9295 */ - "IMG_DATA_FORMAT_8\0" /* 9319 */ - "IMG_DATA_FORMAT_16\0" /* 9337 */ - "IMG_DATA_FORMAT_8_8\0" /* 9356 */ - "IMG_DATA_FORMAT_32\0" /* 9376 */ - "IMG_DATA_FORMAT_16_16\0" /* 9395 */ - "IMG_DATA_FORMAT_10_11_11\0" /* 9417 */ - "IMG_DATA_FORMAT_11_11_10\0" /* 9442 */ - "IMG_DATA_FORMAT_10_10_10_2\0" /* 9467 */ - "IMG_DATA_FORMAT_2_10_10_10\0" /* 9494 */ - "IMG_DATA_FORMAT_8_8_8_8\0" /* 9521 */ - "IMG_DATA_FORMAT_32_32\0" /* 9545 */ - "IMG_DATA_FORMAT_16_16_16_16\0" /* 9567 */ - "IMG_DATA_FORMAT_32_32_32\0" /* 9595 */ - "IMG_DATA_FORMAT_32_32_32_32\0" /* 9620 */ - "IMG_DATA_FORMAT_RESERVED_15\0" /* 9648 */ - "IMG_DATA_FORMAT_5_6_5\0" /* 9676 */ - "IMG_DATA_FORMAT_1_5_5_5\0" /* 9698 */ - "IMG_DATA_FORMAT_5_5_5_1\0" /* 9722 */ - "IMG_DATA_FORMAT_4_4_4_4\0" /* 9746 */ - "IMG_DATA_FORMAT_8_24\0" /* 9770 */ - "IMG_DATA_FORMAT_24_8\0" /* 9791 */ - "IMG_DATA_FORMAT_X24_8_32\0" /* 9812 */ - "IMG_DATA_FORMAT_8_AS_8_8_8_8\0" /* 9837 */ - "IMG_DATA_FORMAT_ETC2_RGB\0" /* 9866 */ - "IMG_DATA_FORMAT_ETC2_RGBA\0" /* 9891 */ - "IMG_DATA_FORMAT_ETC2_R\0" /* 9917 */ - "IMG_DATA_FORMAT_ETC2_RG\0" /* 9940 */ - "IMG_DATA_FORMAT_ETC2_RGBA1\0" /* 9964 */ - "IMG_DATA_FORMAT_RESERVED_29\0" /* 9991 */ - "IMG_DATA_FORMAT_RESERVED_30\0" /* 10019 */ - "IMG_DATA_FORMAT_RESERVED_31\0" /* 10047 */ - "IMG_DATA_FORMAT_GB_GR\0" /* 10075 */ - "IMG_DATA_FORMAT_BG_RG\0" /* 10097 */ - "IMG_DATA_FORMAT_5_9_9_9\0" /* 10119 */ - "IMG_DATA_FORMAT_BC1\0" /* 10143 */ - "IMG_DATA_FORMAT_BC2\0" /* 10163 */ - "IMG_DATA_FORMAT_BC3\0" /* 10183 */ - "IMG_DATA_FORMAT_BC4\0" /* 10203 */ - "IMG_DATA_FORMAT_BC5\0" /* 10223 */ - "IMG_DATA_FORMAT_BC6\0" /* 10243 */ - "IMG_DATA_FORMAT_BC7\0" /* 10263 */ - "IMG_DATA_FORMAT_16_AS_16_16_16_16\0" /* 10283 */ - "IMG_DATA_FORMAT_16_AS_32_32_32_32\0" /* 10317 */ - "IMG_DATA_FORMAT_FMASK8_S2_F1\0" /* 10351 */ - "IMG_DATA_FORMAT_FMASK8_S4_F1\0" /* 10380 */ - "IMG_DATA_FORMAT_FMASK8_S8_F1\0" /* 10409 */ - "IMG_DATA_FORMAT_FMASK8_S2_F2\0" /* 10438 */ - "IMG_DATA_FORMAT_FMASK8_S4_F2\0" /* 10467 */ - "IMG_DATA_FORMAT_FMASK8_S4_F4\0" /* 10496 */ - "IMG_DATA_FORMAT_FMASK16_S16_F1\0" /* 10525 */ - "IMG_DATA_FORMAT_FMASK16_S8_F2\0" /* 10556 */ - "IMG_DATA_FORMAT_FMASK32_S16_F2\0" /* 10586 */ - "IMG_DATA_FORMAT_FMASK32_S8_F4\0" /* 10617 */ - "IMG_DATA_FORMAT_FMASK32_S8_F8\0" /* 10647 */ - "IMG_DATA_FORMAT_FMASK64_S16_F4\0" /* 10677 */ - "IMG_DATA_FORMAT_FMASK64_S16_F8\0" /* 10708 */ - "IMG_DATA_FORMAT_4_4\0" /* 10739 */ - "IMG_DATA_FORMAT_6_5_5\0" /* 10759 */ - "IMG_DATA_FORMAT_1\0" /* 10781 */ - "IMG_DATA_FORMAT_1_REVERSED\0" /* 10799 */ - "IMG_DATA_FORMAT_32_AS_8\0" /* 10826 */ - "IMG_DATA_FORMAT_32_AS_8_8\0" /* 10850 */ - "IMG_DATA_FORMAT_32_AS_32_32_32_32\0" /* 10876 */ - "IMG_NUM_FORMAT_UNORM\0" /* 10910 */ - "IMG_NUM_FORMAT_SNORM\0" /* 10931 */ - "IMG_NUM_FORMAT_USCALED\0" /* 10952 */ - "IMG_NUM_FORMAT_SSCALED\0" /* 10975 */ - "IMG_NUM_FORMAT_UINT\0" /* 10998 */ - "IMG_NUM_FORMAT_SINT\0" /* 11018 */ - "IMG_NUM_FORMAT_SNORM_OGL\0" /* 11038 */ - "IMG_NUM_FORMAT_FLOAT\0" /* 11063 */ - "IMG_NUM_FORMAT_RESERVED_8\0" /* 11084 */ - "IMG_NUM_FORMAT_SRGB\0" /* 11110 */ - "IMG_NUM_FORMAT_UBNORM\0" /* 11130 */ - "IMG_NUM_FORMAT_UBNORM_OGL\0" /* 11152 */ - "IMG_NUM_FORMAT_UBINT\0" /* 11178 */ - "IMG_NUM_FORMAT_UBSCALED\0" /* 11199 */ - "IMG_NUM_FORMAT_RESERVED_14\0" /* 11223 */ - "IMG_NUM_FORMAT_RESERVED_15\0" /* 11250 */ - "WIDTH\0" /* 11277 */ - "HEIGHT\0" /* 11283 */ - "PERF_MOD\0" /* 11290 */ - "INTERLACED\0" /* 11299 */ - "BASE_LEVEL\0" /* 11310 */ - "LAST_LEVEL\0" /* 11321 */ - "TILING_INDEX\0" /* 11332 */ - "POW2_PAD\0" /* 11345 */ - "SQ_RSRC_IMG_RSVD_0\0" /* 11354 */ - "SQ_RSRC_IMG_RSVD_1\0" /* 11373 */ - "SQ_RSRC_IMG_RSVD_2\0" /* 11392 */ - "SQ_RSRC_IMG_RSVD_3\0" /* 11411 */ - "SQ_RSRC_IMG_RSVD_4\0" /* 11430 */ - "SQ_RSRC_IMG_RSVD_5\0" /* 11449 */ - "SQ_RSRC_IMG_RSVD_6\0" /* 11468 */ - "SQ_RSRC_IMG_RSVD_7\0" /* 11487 */ - "SQ_RSRC_IMG_1D\0" /* 11506 */ - "SQ_RSRC_IMG_2D\0" /* 11521 */ - "SQ_RSRC_IMG_3D\0" /* 11536 */ - "SQ_RSRC_IMG_CUBE\0" /* 11551 */ - "SQ_RSRC_IMG_1D_ARRAY\0" /* 11568 */ - "SQ_RSRC_IMG_2D_ARRAY\0" /* 11589 */ - "SQ_RSRC_IMG_2D_MSAA\0" /* 11610 */ - "SQ_RSRC_IMG_2D_MSAA_ARRAY\0" /* 11630 */ - "DEPTH\0" /* 11656 */ - "PITCH\0" /* 11662 */ - "BASE_ARRAY\0" /* 11668 */ - "LAST_ARRAY\0" /* 11679 */ - "MIN_LOD_WARN\0" /* 11690 */ - "COUNTER_BANK_ID\0" /* 11703 */ - "LOD_HDW_CNT_EN\0" /* 11719 */ - "COMPRESSION_EN\0" /* 11734 */ - "ALPHA_IS_ON_MSB\0" /* 11749 */ - "COLOR_TRANSFORM\0" /* 11765 */ - "LOST_ALPHA_BITS\0" /* 11781 */ - "LOST_COLOR_BITS\0" /* 11797 */ - "SQ_TEX_WRAP\0" /* 11813 */ - "SQ_TEX_MIRROR\0" /* 11825 */ - "SQ_TEX_CLAMP_LAST_TEXEL\0" /* 11839 */ - "SQ_TEX_MIRROR_ONCE_LAST_TEXEL\0" /* 11863 */ - "SQ_TEX_CLAMP_HALF_BORDER\0" /* 11893 */ - "SQ_TEX_MIRROR_ONCE_HALF_BORDER\0" /* 11918 */ - "SQ_TEX_CLAMP_BORDER\0" /* 11949 */ - "SQ_TEX_MIRROR_ONCE_BORDER\0" /* 11969 */ - "CLAMP_X\0" /* 11995 */ - "CLAMP_Y\0" /* 12003 */ - "CLAMP_Z\0" /* 12011 */ - "MAX_ANISO_RATIO\0" /* 12019 */ - "SQ_TEX_DEPTH_COMPARE_NEVER\0" /* 12035 */ - "SQ_TEX_DEPTH_COMPARE_LESS\0" /* 12062 */ - "SQ_TEX_DEPTH_COMPARE_EQUAL\0" /* 12088 */ - "SQ_TEX_DEPTH_COMPARE_LESSEQUAL\0" /* 12115 */ - "SQ_TEX_DEPTH_COMPARE_GREATER\0" /* 12146 */ - "SQ_TEX_DEPTH_COMPARE_NOTEQUAL\0" /* 12175 */ - "SQ_TEX_DEPTH_COMPARE_GREATEREQUAL\0" /* 12205 */ - "SQ_TEX_DEPTH_COMPARE_ALWAYS\0" /* 12239 */ - "DEPTH_COMPARE_FUNC\0" /* 12267 */ - "FORCE_UNNORMALIZED\0" /* 12286 */ - "MC_COORD_TRUNC\0" /* 12305 */ - "FORCE_DEGAMMA\0" /* 12320 */ - "TRUNC_COORD\0" /* 12334 */ - "DISABLE_CUBE_WRAP\0" /* 12346 */ - "FILTER_MODE\0" /* 12371, 12364 */ - "COMPAT_MODE\0" /* 12376 */ - "MAX_LOD\0" /* 12388 */ - "PERF_MIP\0" /* 12396 */ - "PERF_Z\0" /* 12405 */ - "LOD_BIAS\0" /* 12412 */ - "LOD_BIAS_SEC\0" /* 12421 */ - "SQ_TEX_XY_FILTER_POINT\0" /* 12448, 12434 */ - "SQ_TEX_XY_FILTER_BILINEAR\0" /* 12457, 12476 */ - "XY_MAG_FILTER\0" /* 12483 */ - "SQ_TEX_XY_FILTER_ANISO_POINT\0" /* 12497 */ - "SQ_TEX_XY_FILTER_ANISO_BILINEAR\0" /* 12526 */ - "XY_MIN_FILTER\0" /* 12558 */ - "SQ_TEX_Z_FILTER_NONE\0" /* 12572 */ - "SQ_TEX_Z_FILTER_POINT\0" /* 12593 */ - "SQ_TEX_Z_FILTER_LINEAR\0" /* 12615 */ - "Z_FILTER\0" /* 12638 */ - "MIP_FILTER\0" /* 12647 */ - "MIP_POINT_PRECLAMP\0" /* 12658 */ - "DISABLE_LSB_CEIL\0" /* 12677 */ - "FILTER_PREC_FIX\0" /* 12694 */ - "ANISO_OVERRIDE\0" /* 12710 */ - "BORDER_COLOR_PTR\0" /* 12725 */ - "SQ_TEX_BORDER_COLOR_TRANS_BLACK\0" /* 12742 */ - "SQ_TEX_BORDER_COLOR_OPAQUE_BLACK\0" /* 12774 */ - "SQ_TEX_BORDER_COLOR_OPAQUE_WHITE\0" /* 12807 */ - "SQ_TEX_BORDER_COLOR_REGISTER\0" /* 12840 */ - "BORDER_COLOR_TYPE\0" /* 12869 */ - "VS_LOW_THRESHOLD\0" /* 12887 */ - "GS_LOW_THRESHOLD\0" /* 12904 */ - "ES_LOW_THRESHOLD\0" /* 12921 */ - "HS_LOW_THRESHOLD\0" /* 12938 */ - "LS_LOW_THRESHOLD\0" /* 12955 */ - "PS_CU_EN\0" /* 12972, 12975 */ - "VS_CU_EN\0" /* 12981 */ - "GS_CU_EN\0" /* 12990 */ - "ES_CU_EN\0" /* 12999 */ - "LSHS_CU_EN\0" /* 13008 */ - "MAX_WAVE_ID\0" /* 13019 */ - "X_R0\0" /* 13031 */ - "RING_ORDER_TS0\0" /* 13036 */ - "RING_ORDER_TS1\0" /* 13051 */ - "RING_ORDER_TS2\0" /* 13066 */ - "PIPE_ORDER_TS0\0" /* 13081 */ - "PIPE_ORDER_TS1\0" /* 13096 */ - "PIPE_ORDER_TS2\0" /* 13111 */ - "PIPE_ORDER_TS3\0" /* 13126 */ - "TS0_DUR_MULT\0" /* 13141 */ - "TS1_DUR_MULT\0" /* 13154 */ - "TS2_DUR_MULT\0" /* 13167 */ - "TS3_DUR_MULT\0" /* 13180 */ - "TS0_DURATION\0" /* 13193 */ - "TS1_DURATION\0" /* 13206 */ - "TS2_DURATION\0" /* 13219 */ - "GPR_WRITE_PRIORITY\0" /* 13232, 13242 */ - "EXP_PRIORITY_ORDER\0" /* 13251 */ - "ENABLE_SQG_TOP_EVENTS\0" /* 13270 */ - "ENABLE_SQG_BOP_EVENTS\0" /* 13292 */ - "RSRC_MGMT_RESET\0" /* 13314 */ - "X_DELAY_14_CLKS\0" /* 13330 */ - "X_DELAY_16_CLKS\0" /* 13346 */ - "X_DELAY_18_CLKS\0" /* 13362 */ - "X_DELAY_20_CLKS\0" /* 13378 */ - "X_DELAY_22_CLKS\0" /* 13394 */ - "X_DELAY_24_CLKS\0" /* 13410 */ - "X_DELAY_26_CLKS\0" /* 13426 */ - "X_DELAY_28_CLKS\0" /* 13442 */ - "X_DELAY_30_CLKS\0" /* 13458 */ - "X_DELAY_32_CLKS\0" /* 13474 */ - "X_DELAY_34_CLKS\0" /* 13490 */ - "X_DELAY_4_CLKS\0" /* 13506 */ - "X_DELAY_6_CLKS\0" /* 13521 */ - "X_DELAY_8_CLKS\0" /* 13536 */ - "X_DELAY_10_CLKS\0" /* 13551 */ - "X_DELAY_12_CLKS\0" /* 13567 */ - "VTX_DONE_DELAY\0" /* 13583 */ - "INTERP_ONE_PRIM_PER_ROW\0" /* 13598 */ - "PC_LIMIT_ENABLE\0" /* 13622 */ - "PC_LIMIT_STRICT\0" /* 13638 */ - "PC_LIMIT_SIZE\0" /* 13654 */ - "TYPE_A\0" /* 13668 */ - "VGPR_A\0" /* 13675 */ - "SGPR_A\0" /* 13682 */ - "LDS_A\0" /* 13689 */ - "WAVES_A\0" /* 13695 */ - "EN_A\0" /* 13703 */ - "TYPE_B\0" /* 13708 */ - "VGPR_B\0" /* 13715 */ - "SGPR_B\0" /* 13722 */ - "LDS_B\0" /* 13729 */ - "WAVES_B\0" /* 13735 */ - "EN_B\0" /* 13743 */ - "MSAA1_X\0" /* 13748 */ - "MSAA1_Y\0" /* 13756 */ - "MSAA2_X\0" /* 13764 */ - "MSAA2_Y\0" /* 13772 */ - "MSAA4_X\0" /* 13780 */ - "MSAA4_Y\0" /* 13788 */ - "MSAA8_X\0" /* 13796 */ - "MSAA8_Y\0" /* 13804 */ - "MSAA16_X\0" /* 13812 */ - "MSAA16_Y\0" /* 13821 */ - "NUM_PIPES\0" /* 13830 */ - "PIPE_INTERLEAVE_SIZE\0" /* 13840 */ - "BANK_INTERLEAVE_SIZE\0" /* 13861 */ - "NUM_SHADER_ENGINES\0" /* 13882 */ - "SHADER_ENGINE_TILE_SIZE\0" /* 13901 */ - "NUM_GPUS\0" /* 13925 */ - "MULTI_GPU_TILE_SIZE\0" /* 13934 */ - "ROW_SIZE\0" /* 13954 */ - "NUM_LOWER_PIPES\0" /* 13963 */ - "ADDR_SURF_DISPLAY_MICRO_TILING\0" /* 13979 */ - "ADDR_SURF_THIN_MICRO_TILING\0" /* 14010 */ - "ADDR_SURF_DEPTH_MICRO_TILING\0" /* 14038 */ - "ADDR_SURF_THICK_MICRO_TILING\0" /* 14067 */ - "MICRO_TILE_MODE\0" /* 14096 */ - "ARRAY_LINEAR_GENERAL\0" /* 14112, 14118 */ - "ARRAY_LINEAR_ALIGNED\0" /* 14133 */ - "ARRAY_1D_TILED_THIN1\0" /* 14154 */ - "ARRAY_1D_TILED_THICK\0" /* 14175 */ - "ARRAY_2D_TILED_THIN1\0" /* 14196 */ - "ARRAY_2D_TILED_THICK\0" /* 14217 */ - "ARRAY_2D_TILED_XTHICK\0" /* 14238 */ - "ARRAY_3D_TILED_THIN1\0" /* 14260 */ - "ARRAY_3D_TILED_THICK\0" /* 14281 */ - "ARRAY_3D_TILED_XTHICK\0" /* 14302 */ - "ARRAY_POWER_SAVE\0" /* 14324 */ - "ARRAY_MODE\0" /* 14341 */ - "ADDR_SURF_P2\0" /* 14352 */ - "ADDR_SURF_P2_RESERVED0\0" /* 14365 */ - "ADDR_SURF_P2_RESERVED1\0" /* 14388 */ - "ADDR_SURF_P2_RESERVED2\0" /* 14424, 14411 */ - "X_ADDR_SURF_P4_8X16\0" /* 14434 */ - "X_ADDR_SURF_P4_16X16\0" /* 14454 */ - "X_ADDR_SURF_P4_16X32\0" /* 14475 */ - "X_ADDR_SURF_P4_32X32\0" /* 14496 */ - "X_ADDR_SURF_P8_16X16_8X16\0" /* 14517 */ - "X_ADDR_SURF_P8_16X32_8X16\0" /* 14543 */ - "X_ADDR_SURF_P8_32X32_8X16\0" /* 14569 */ - "X_ADDR_SURF_P8_16X32_16X16\0" /* 14595 */ - "X_ADDR_SURF_P8_32X32_16X16\0" /* 14622 */ - "X_ADDR_SURF_P8_32X32_16X32\0" /* 14649 */ - "X_ADDR_SURF_P8_32X64_32X32\0" /* 14676 */ - "PIPE_CONFIG\0" /* 14703 */ - "ADDR_SURF_TILE_SPLIT_64B\0" /* 14715 */ - "ADDR_SURF_TILE_SPLIT_128B\0" /* 14740 */ - "ADDR_SURF_TILE_SPLIT_256B\0" /* 14766 */ - "ADDR_SURF_TILE_SPLIT_512B\0" /* 14792 */ - "ADDR_SURF_TILE_SPLIT_1KB\0" /* 14818 */ - "ADDR_SURF_TILE_SPLIT_2KB\0" /* 14843 */ - "ADDR_SURF_TILE_SPLIT_4KB\0" /* 14868 */ - "TILE_SPLIT\0" /* 14893 */ - "ADDR_SURF_BANK_WIDTH_1\0" /* 14904 */ - "ADDR_SURF_BANK_WIDTH_2\0" /* 14927 */ - "ADDR_SURF_BANK_WIDTH_4\0" /* 14950 */ - "ADDR_SURF_BANK_WIDTH_8\0" /* 14973 */ - "BANK_WIDTH\0" /* 14996 */ - "ADDR_SURF_BANK_HEIGHT_1\0" /* 15007 */ - "ADDR_SURF_BANK_HEIGHT_2\0" /* 15031 */ - "ADDR_SURF_BANK_HEIGHT_4\0" /* 15055 */ - "ADDR_SURF_BANK_HEIGHT_8\0" /* 15079 */ - "BANK_HEIGHT\0" /* 15103 */ - "ADDR_SURF_MACRO_ASPECT_1\0" /* 15115 */ - "ADDR_SURF_MACRO_ASPECT_2\0" /* 15140 */ - "ADDR_SURF_MACRO_ASPECT_4\0" /* 15165 */ - "ADDR_SURF_MACRO_ASPECT_8\0" /* 15190 */ - "MACRO_TILE_ASPECT\0" /* 15215 */ - "ADDR_SURF_2_BANK\0" /* 15233 */ - "ADDR_SURF_4_BANK\0" /* 15250 */ - "ADDR_SURF_8_BANK\0" /* 15267 */ - "ADDR_SURF_16_BANK\0" /* 15284 */ - "NUM_BANKS\0" /* 15302 */ - "ADDR_SURF_ROTATED_MICRO_TILING\0" /* 15312 */ - "MICRO_TILE_MODE_NEW\0" /* 15343 */ - "SAMPLE_SPLIT\0" /* 15363 */ - "MEM_BASE\0" /* 15376 */ - "WAVE_LIMIT\0" /* 15385 */ - "LOCK_LOW_THRESHOLD\0" /* 15396 */ - "VGPRS\0" /* 15415 */ - "SGPRS\0" /* 15421 */ - "FP_32_DENORMS\0" /* 15427 */ - "FP_64_DENORMS\0" /* 15441 */ - "FP_ALL_DENORMS\0" /* 15455 */ - "FLOAT_MODE\0" /* 15470 */ - "PRIV\0" /* 15481 */ - "DX10_CLAMP\0" /* 15486 */ - "DEBUG_MODE\0" /* 15497 */ - "IEEE_MODE\0" /* 15508 */ - "CU_GROUP_DISABLE\0" /* 15518 */ - "CACHE_CTL\0" /* 15535 */ - "CDBG_USER\0" /* 15545 */ - "SCRATCH_EN\0" /* 15555 */ - "USER_SGPR\0" /* 15566 */ - "TRAP_PRESENT\0" /* 15576 */ - "WAVE_CNT_EN\0" /* 15589 */ - "EXTRA_LDS_SIZE\0" /* 15601, 15607 */ - "EXCP_EN\0" /* 15616 */ - "EXCP_EN_CIK\0" /* 15624 */ - "VGPR_COMP_CNT\0" /* 15636, 15646 */ - "CU_GROUP_ENABLE\0" /* 15650 */ - "OC_LDS_EN\0" /* 15666 */ - "SO_BASE0_EN\0" /* 15676 */ - "SO_BASE1_EN\0" /* 15688 */ - "SO_BASE2_EN\0" /* 15700 */ - "SO_BASE3_EN\0" /* 15712 */ - "SO_EN\0" /* 15724 */ - "DISPATCH_DRAW_EN\0" /* 15730 */ - "GROUP_FIFO_DEPTH\0" /* 15747 */ - "TG_SIZE_EN\0" /* 15764 */ - "COMPUTE_SHADER_EN\0" /* 15775 */ - "PARTIAL_TG_EN\0" /* 15793 */ - "FORCE_START_AT_000\0" /* 15807 */ - "ORDERED_APPEND_ENBL\0" /* 15826 */ - "ORDERED_APPEND_MODE\0" /* 15846 */ - "USE_THREAD_DIMENSIONS\0" /* 15866 */ - "ORDER_MODE\0" /* 15888 */ - "DISPATCH_CACHE_CNTL\0" /* 15899 */ - "SCALAR_L1_INV_VOL\0" /* 15919 */ - "VECTOR_L1_INV_VOL\0" /* 15937 */ - "DATA_ATC\0" /* 15955 */ - "RESTORE\0" /* 15964 */ - "NUM_THREAD_FULL\0" /* 15972 */ - "NUM_THREAD_PARTIAL\0" /* 15988 */ - "PIPELINESTAT_ENABLE\0" /* 16007 */ - "PERFCOUNT_ENABLE\0" /* 16027 */ - "INST_ATC\0" /* 16044 */ - "BULKY\0" /* 16053 */ - "TGID_X_EN\0" /* 16059 */ - "TGID_Y_EN\0" /* 16069 */ - "TGID_Z_EN\0" /* 16079 */ - "TIDIG_COMP_CNT\0" /* 16089 */ - "EXCP_EN_MSB\0" /* 16104 */ - "WAVES_PER_SH\0" /* 16116 */ - "WAVES_PER_SH_CIK\0" /* 16129 */ - "TG_PER_CU\0" /* 16146 */ - "LOCK_THRESHOLD\0" /* 16156 */ - "SIMD_DEST_CNTL\0" /* 16171 */ - "FORCE_SIMD_DIST\0" /* 16186 */ - "CU_GROUP_COUNT\0" /* 16202 */ - "SH0_CU_EN\0" /* 16217 */ - "SH1_CU_EN\0" /* 16227 */ - "WAVES\0" /* 16237 */ - "WAVESIZE\0" /* 16243 */ - "SEND_SEID\0" /* 16252 */ - "RESERVED3\0" /* 16262 */ - "RESERVED4\0" /* 16272 */ - "WAVE_ID_BASE\0" /* 16282 */ - "PAYLOAD\0" /* 16295 */ - "IS_EVENT\0" /* 16303 */ - "IS_STATE\0" /* 16312 */ - "PERFCOUNTER_HI\0" /* 16321 */ - "PERF_SEL2\0" /* 16336 */ - "PERF_SEL3\0" /* 16346 */ - "PERF_SEL\0" /* 16356 */ - "PERF_SEL1\0" /* 16365 */ - "CNTR_MODE\0" /* 16375 */ - "DISABLE_AND_RESET\0" /* 16385 */ - "START_COUNTING\0" /* 16403 */ - "STOP_COUNTING\0" /* 16418 */ - "PERFMON_STATE\0" /* 16432 */ - "SPM_PERFMON_STATE\0" /* 16446 */ - "PERFMON_ENABLE_MODE\0" /* 16464 */ - "PERFMON_SAMPLE_ENABLE\0" /* 16484 */ - "DB_CLEAN_USER_DEFINED_MASK\0" /* 16506 */ - "CB_CLEAN_USER_DEFINED_MASK\0" /* 16533 */ - "VGT_BUSY_USER_DEFINED_MASK\0" /* 16560 */ - "TA_BUSY_USER_DEFINED_MASK\0" /* 16587 */ - "SX_BUSY_USER_DEFINED_MASK\0" /* 16613 */ - "SPI_BUSY_USER_DEFINED_MASK\0" /* 16639 */ - "SC_BUSY_USER_DEFINED_MASK\0" /* 16666 */ - "PA_BUSY_USER_DEFINED_MASK\0" /* 16692 */ - "GRBM_BUSY_USER_DEFINED_MASK\0" /* 16718 */ - "DB_BUSY_USER_DEFINED_MASK\0" /* 16746 */ - "CB_BUSY_USER_DEFINED_MASK\0" /* 16772 */ - "CP_BUSY_USER_DEFINED_MASK\0" /* 16798 */ - "IA_BUSY_USER_DEFINED_MASK\0" /* 16824 */ - "GDS_BUSY_USER_DEFINED_MASK\0" /* 16850 */ - "BCI_BUSY_USER_DEFINED_MASK\0" /* 16877 */ - "RLC_BUSY_USER_DEFINED_MASK\0" /* 16904 */ - "TC_BUSY_USER_DEFINED_MASK\0" /* 16931 */ - "WD_BUSY_USER_DEFINED_MASK\0" /* 16957 */ - "PERF_MODE\0" /* 16983 */ - "PERF_MODE1\0" /* 16993 */ - "PERF_MODE3\0" /* 17004 */ - "PERF_MODE2\0" /* 17015 */ - "PERF_SEID_IGNORE_MASK\0" /* 17026 */ - "BIN0_MIN\0" /* 17048 */ - "BIN0_MAX\0" /* 17057 */ - "BIN1_MIN\0" /* 17066 */ - "BIN1_MAX\0" /* 17075 */ - "BIN2_MIN\0" /* 17084 */ - "BIN2_MAX\0" /* 17093 */ - "BIN3_MIN\0" /* 17102 */ - "BIN3_MAX\0" /* 17111 */ - "SQC_BANK_MASK\0" /* 17120 */ - "SQC_CLIENT_MASK\0" /* 17134 */ - "SPM_MODE\0" /* 17150 */ - "SIMD_MASK\0" /* 17159 */ - "PS_EN\0" /* 17169 */ - "VS_EN\0" /* 17175 */ - "GS_EN\0" /* 17181 */ - "ES_EN\0" /* 17187 */ - "HS_EN\0" /* 17193 */ - "LS_EN\0" /* 17199 */ - "CS_EN\0" /* 17205 */ - "CNTR_RATE\0" /* 17211 */ - "DISABLE_FLUSH\0" /* 17221 */ - "SH0_MASK\0" /* 17235 */ - "SH1_MASK\0" /* 17244 */ - "FORCE_EN\0" /* 17253 */ - "PERFCOUNTER_SELECT\0" /* 17262 */ - "PERFCOUNTER_SELECT1\0" /* 17281 */ - "PERFCOUNTER_SELECT2\0" /* 17301 */ - "PERFCOUNTER_SELECT3\0" /* 17321 */ - "OP_FILTER_ENABLE\0" /* 17341 */ - "OP_FILTER_SEL\0" /* 17358 */ - "FORMAT_FILTER_ENABLE\0" /* 17372 */ - "FORMAT_FILTER_SEL\0" /* 17393 */ - "CLEAR_FILTER_ENABLE\0" /* 17411 */ - "CLEAR_FILTER_SEL\0" /* 17431 */ - "MRT_FILTER_ENABLE\0" /* 17448 */ - "MRT_FILTER_SEL\0" /* 17466 */ - "NUM_SAMPLES_FILTER_ENABLE\0" /* 17481 */ - "NUM_SAMPLES_FILTER_SEL\0" /* 17507 */ - "NUM_FRAGMENTS_FILTER_ENABLE\0" /* 17530 */ - "NUM_FRAGMENTS_FILTER_SEL\0" /* 17558 */ - "DEPTH_CLEAR_ENABLE\0" /* 17583 */ - "STENCIL_CLEAR_ENABLE\0" /* 17602 */ - "DEPTH_COPY\0" /* 17623 */ - "STENCIL_COPY\0" /* 17634 */ - "RESUMMARIZE_ENABLE\0" /* 17647 */ - "STENCIL_COMPRESS_DISABLE\0" /* 17666 */ - "DEPTH_COMPRESS_DISABLE\0" /* 17691 */ - "COPY_CENTROID\0" /* 17714 */ - "COPY_SAMPLE\0" /* 17728 */ - "DECOMPRESS_ENABLE\0" /* 17740 */ - "ZPASS_INCREMENT_DISABLE\0" /* 17758 */ - "PERFECT_ZPASS_COUNTS\0" /* 17782 */ - "SAMPLE_RATE\0" /* 17803 */ - "ZPASS_ENABLE\0" /* 17815 */ - "ZFAIL_ENABLE\0" /* 17828 */ - "SFAIL_ENABLE\0" /* 17841 */ - "DBFAIL_ENABLE\0" /* 17854 */ - "SLICE_EVEN_ENABLE\0" /* 17868 */ - "SLICE_ODD_ENABLE\0" /* 17886 */ - "SLICE_START\0" /* 17903 */ - "SLICE_MAX\0" /* 17915 */ - "Z_READ_ONLY\0" /* 17925 */ - "STENCIL_READ_ONLY\0" /* 17937 */ - "FORCE_OFF\0" /* 17955 */ - "FORCE_ENABLE\0" /* 17965 */ - "FORCE_DISABLE\0" /* 17978 */ - "FORCE_RESERVED\0" /* 17992 */ - "FORCE_HIZ_ENABLE\0" /* 18015, 18007 */ - "FORCE_HIS_ENABLE0\0" /* 18024, 18034 */ - "FORCE_HIS_ENABLE1\0" /* 18042, 18052 */ - "FORCE_SHADER_Z_ORDER\0" /* 18073, 18060 */ - "FAST_Z_DISABLE\0" /* 18081 */ - "FAST_STENCIL_DISABLE\0" /* 18096 */ - "NOOP_CULL_DISABLE\0" /* 18117 */ - "FORCE_COLOR_KILL\0" /* 18135 */ - "FORCE_Z_READ\0" /* 18152 */ - "FORCE_STENCIL_READ\0" /* 18165 */ - "FORCE_FULL_Z_RANGE\0" /* 18184 */ - "FORCE_QC_SMASK_CONFLICT\0" /* 18203 */ - "DISABLE_VIEWPORT_CLAMP\0" /* 18227 */ - "IGNORE_SC_ZRANGE\0" /* 18250 */ - "DISABLE_FULLY_COVERED\0" /* 18267 */ - "FORCE_SUMM_OFF\0" /* 18289 */ - "FORCE_SUMM_MINZ\0" /* 18304 */ - "FORCE_SUMM_MAXZ\0" /* 18320 */ - "FORCE_SUMM_BOTH\0" /* 18336 */ - "FORCE_Z_LIMIT_SUMM\0" /* 18352 */ - "MAX_TILES_IN_DTT\0" /* 18371 */ - "DISABLE_TILE_RATE_TILES\0" /* 18388 */ - "FORCE_Z_DIRTY\0" /* 18412 */ - "FORCE_STENCIL_DIRTY\0" /* 18426 */ - "FORCE_Z_VALID\0" /* 18446 */ - "FORCE_STENCIL_VALID\0" /* 18460 */ - "PRESERVE_COMPRESSION\0" /* 18480, 18489 */ - "PSLC_AUTO\0" /* 18501 */ - "PSLC_ON_HANG_ONLY\0" /* 18511 */ - "PSLC_ASAP\0" /* 18529 */ - "PSLC_COUNTDOWN\0" /* 18539 */ - "PARTIAL_SQUAD_LAUNCH_CONTROL\0" /* 18554 */ - "PARTIAL_SQUAD_LAUNCH_COUNTDOWN\0" /* 18583 */ - "DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION\0" /* 18614 */ - "DISABLE_SMEM_EXPCLEAR_OPTIMIZATION\0" /* 18650 */ - "DISABLE_COLOR_ON_VALIDATION\0" /* 18685 */ - "DECOMPRESS_Z_ON_FLUSH\0" /* 18713 */ - "DISABLE_REG_SNOOP\0" /* 18735 */ - "DEPTH_BOUNDS_HIER_DEPTH_DISABLE\0" /* 18753 */ - "SEPARATE_HIZS_FUNC_ENABLE\0" /* 18785 */ - "HIZ_ZFUNC\0" /* 18811, 18815 */ - "HIS_SFUNC_FF\0" /* 18821 */ - "HIS_SFUNC_BF\0" /* 18834 */ - "PRESERVE_ZRANGE\0" /* 18847 */ - "PRESERVE_SRESULTS\0" /* 18863 */ - "DISABLE_FAST_PASS\0" /* 18881 */ - "CLEAR\0" /* 18899 */ - "TL_X\0" /* 18905 */ - "TL_Y\0" /* 18910 */ - "BR_X\0" /* 18915 */ - "BR_Y\0" /* 18920 */ - "ADDR5_SWIZZLE_MASK\0" /* 18925 */ - "ARRAY_PRT_TILED_THIN1\0" /* 18944 */ - "ARRAY_PRT_2D_TILED_THIN1\0" /* 18966 */ - "X_ADDR_SURF_P16_32X32_8X16\0" /* 18991 */ - "X_ADDR_SURF_P16_32X32_16X16\0" /* 19018 */ - "Z_INVALID\0" /* 19046 */ - "Z_16\0" /* 19056 */ - "Z_24\0" /* 19061 */ - "Z_32_FLOAT\0" /* 19066 */ - "NUM_SAMPLES\0" /* 19077 */ - "TILE_MODE_INDEX\0" /* 19089 */ - "DECOMPRESS_ON_N_ZPLANES\0" /* 19105 */ - "ALLOW_EXPCLEAR\0" /* 19129 */ - "READ_SIZE\0" /* 19144 */ - "TILE_SURFACE_ENABLE\0" /* 19154 */ - "CLEAR_DISALLOWED\0" /* 19174 */ - "ZRANGE_PRECISION\0" /* 19191 */ - "STENCIL_INVALID\0" /* 19208 */ - "STENCIL_8\0" /* 19224 */ - "TILE_STENCIL_DISABLE\0" /* 19234 */ - "PITCH_TILE_MAX\0" /* 19261, 19255 */ - "HEIGHT_TILE_MAX\0" /* 19270 */ - "SLICE_TILE_MAX\0" /* 19286 */ - "WINDOW_X_OFFSET\0" /* 19308, 19301 */ - "WINDOW_Y_OFFSET\0" /* 19324, 19317 */ - "WINDOW_OFFSET_DISABLE\0" /* 19333 */ - "CLIP_RULE\0" /* 19355 */ - "ER_TRI\0" /* 19365 */ - "ER_RECT\0" /* 19372 */ - "ER_LINE_LR\0" /* 19380 */ - "ER_LINE_RL\0" /* 19391 */ - "ER_LINE_TB\0" /* 19402 */ - "ER_LINE_BT\0" /* 19413 */ - "HW_SCREEN_OFFSET_X\0" /* 19424 */ - "HW_SCREEN_OFFSET_Y\0" /* 19443 */ - "TARGET0_ENABLE\0" /* 19462 */ - "TARGET1_ENABLE\0" /* 19477 */ - "TARGET2_ENABLE\0" /* 19492 */ - "TARGET3_ENABLE\0" /* 19507 */ - "TARGET4_ENABLE\0" /* 19522 */ - "TARGET5_ENABLE\0" /* 19537 */ - "TARGET6_ENABLE\0" /* 19552 */ - "TARGET7_ENABLE\0" /* 19567 */ - "OUTPUT0_ENABLE\0" /* 19582 */ - "OUTPUT1_ENABLE\0" /* 19597 */ - "OUTPUT2_ENABLE\0" /* 19612 */ - "OUTPUT3_ENABLE\0" /* 19627 */ - "OUTPUT4_ENABLE\0" /* 19642 */ - "OUTPUT5_ENABLE\0" /* 19657 */ - "OUTPUT6_ENABLE\0" /* 19672 */ - "OUTPUT7_ENABLE\0" /* 19687 */ - "RASTER_CONFIG_RB_MAP_0\0" /* 19702 */ - "RASTER_CONFIG_RB_MAP_1\0" /* 19725 */ - "RASTER_CONFIG_RB_MAP_2\0" /* 19748 */ - "RASTER_CONFIG_RB_MAP_3\0" /* 19771 */ - "RB_MAP_PKR0\0" /* 19794 */ - "RB_MAP_PKR1\0" /* 19806 */ - "RASTER_CONFIG_RB_XSEL2_0\0" /* 19818 */ - "RASTER_CONFIG_RB_XSEL2_1\0" /* 19843 */ - "RASTER_CONFIG_RB_XSEL2_2\0" /* 19868 */ - "RASTER_CONFIG_RB_XSEL2_3\0" /* 19893 */ - "RB_XSEL2\0" /* 19918 */ - "RB_XSEL\0" /* 19927 */ - "RB_YSEL\0" /* 19935 */ - "RASTER_CONFIG_PKR_MAP_0\0" /* 19943 */ - "RASTER_CONFIG_PKR_MAP_1\0" /* 19967 */ - "RASTER_CONFIG_PKR_MAP_2\0" /* 19991 */ - "RASTER_CONFIG_PKR_MAP_3\0" /* 20015 */ - "PKR_MAP\0" /* 20039 */ - "RASTER_CONFIG_PKR_XSEL_0\0" /* 20047 */ - "RASTER_CONFIG_PKR_XSEL_1\0" /* 20072 */ - "RASTER_CONFIG_PKR_XSEL_2\0" /* 20097 */ - "RASTER_CONFIG_PKR_XSEL_3\0" /* 20122 */ - "PKR_XSEL\0" /* 20147 */ - "RASTER_CONFIG_PKR_YSEL_0\0" /* 20156 */ - "RASTER_CONFIG_PKR_YSEL_1\0" /* 20181 */ - "RASTER_CONFIG_PKR_YSEL_2\0" /* 20206 */ - "RASTER_CONFIG_PKR_YSEL_3\0" /* 20231 */ - "PKR_YSEL\0" /* 20256 */ - "RASTER_CONFIG_PKR_XSEL2_0\0" /* 20265 */ - "RASTER_CONFIG_PKR_XSEL2_1\0" /* 20291 */ - "RASTER_CONFIG_PKR_XSEL2_2\0" /* 20317 */ - "RASTER_CONFIG_PKR_XSEL2_3\0" /* 20343 */ - "PKR_XSEL2\0" /* 20369 */ - "RASTER_CONFIG_SC_MAP_0\0" /* 20379 */ - "RASTER_CONFIG_SC_MAP_1\0" /* 20402 */ - "RASTER_CONFIG_SC_MAP_2\0" /* 20425 */ - "RASTER_CONFIG_SC_MAP_3\0" /* 20448 */ - "SC_MAP\0" /* 20471 */ - "RASTER_CONFIG_SC_XSEL_8_WIDE_TILE\0" /* 20478 */ - "RASTER_CONFIG_SC_XSEL_16_WIDE_TILE\0" /* 20512 */ - "RASTER_CONFIG_SC_XSEL_32_WIDE_TILE\0" /* 20547 */ - "RASTER_CONFIG_SC_XSEL_64_WIDE_TILE\0" /* 20582 */ - "SC_XSEL\0" /* 20617 */ - "RASTER_CONFIG_SC_YSEL_8_WIDE_TILE\0" /* 20625 */ - "RASTER_CONFIG_SC_YSEL_16_WIDE_TILE\0" /* 20659 */ - "RASTER_CONFIG_SC_YSEL_32_WIDE_TILE\0" /* 20694 */ - "RASTER_CONFIG_SC_YSEL_64_WIDE_TILE\0" /* 20729 */ - "SC_YSEL\0" /* 20764 */ - "RASTER_CONFIG_SE_MAP_0\0" /* 20772 */ - "RASTER_CONFIG_SE_MAP_1\0" /* 20795 */ - "RASTER_CONFIG_SE_MAP_2\0" /* 20818 */ - "RASTER_CONFIG_SE_MAP_3\0" /* 20841 */ - "SE_MAP\0" /* 20864 */ - "RASTER_CONFIG_SE_XSEL_8_WIDE_TILE\0" /* 20871 */ - "RASTER_CONFIG_SE_XSEL_16_WIDE_TILE\0" /* 20905 */ - "RASTER_CONFIG_SE_XSEL_32_WIDE_TILE\0" /* 20940 */ - "RASTER_CONFIG_SE_XSEL_64_WIDE_TILE\0" /* 20975 */ - "SE_XSEL\0" /* 21010 */ - "RASTER_CONFIG_SE_YSEL_8_WIDE_TILE\0" /* 21018 */ - "RASTER_CONFIG_SE_YSEL_16_WIDE_TILE\0" /* 21052 */ - "RASTER_CONFIG_SE_YSEL_32_WIDE_TILE\0" /* 21087 */ - "RASTER_CONFIG_SE_YSEL_64_WIDE_TILE\0" /* 21122 */ - "SE_YSEL\0" /* 21157 */ - "RASTER_CONFIG_SE_PAIR_MAP_0\0" /* 21165 */ - "RASTER_CONFIG_SE_PAIR_MAP_1\0" /* 21193 */ - "RASTER_CONFIG_SE_PAIR_MAP_2\0" /* 21221 */ - "RASTER_CONFIG_SE_PAIR_MAP_3\0" /* 21249 */ - "SE_PAIR_MAP\0" /* 21277 */ - "RASTER_CONFIG_SE_PAIR_XSEL_8_WIDE_TILE\0" /* 21289 */ - "RASTER_CONFIG_SE_PAIR_XSEL_16_WIDE_TILE\0" /* 21328 */ - "RASTER_CONFIG_SE_PAIR_XSEL_32_WIDE_TILE\0" /* 21368 */ - "RASTER_CONFIG_SE_PAIR_XSEL_64_WIDE_TILE\0" /* 21408 */ - "SE_PAIR_XSEL\0" /* 21448 */ - "RASTER_CONFIG_SE_PAIR_YSEL_8_WIDE_TILE\0" /* 21461 */ - "RASTER_CONFIG_SE_PAIR_YSEL_16_WIDE_TILE\0" /* 21500 */ - "RASTER_CONFIG_SE_PAIR_YSEL_32_WIDE_TILE\0" /* 21540 */ - "RASTER_CONFIG_SE_PAIR_YSEL_64_WIDE_TILE\0" /* 21580 */ - "SE_PAIR_YSEL\0" /* 21620 */ - "OVERWRITE_COMBINER_DISABLE\0" /* 21633 */ - "OVERWRITE_COMBINER_MRT_SHARING_DISABLE\0" /* 21660 */ - "OVERWRITE_COMBINER_WATERMARK\0" /* 21699 */ - "STENCIL_KEEP\0" /* 21728 */ - "STENCIL_ZERO\0" /* 21741 */ - "STENCIL_ONES\0" /* 21754 */ - "STENCIL_REPLACE_TEST\0" /* 21767 */ - "STENCIL_REPLACE_OP\0" /* 21788 */ - "STENCIL_ADD_CLAMP\0" /* 21807 */ - "STENCIL_SUB_CLAMP\0" /* 21825 */ - "STENCIL_INVERT\0" /* 21843 */ - "STENCIL_ADD_WRAP\0" /* 21858 */ - "STENCIL_SUB_WRAP\0" /* 21875 */ - "STENCIL_AND\0" /* 21892 */ - "STENCIL_OR\0" /* 21904 */ - "STENCIL_XOR\0" /* 21915 */ - "STENCIL_NAND\0" /* 21927 */ - "STENCIL_NOR\0" /* 21940 */ - "STENCIL_XNOR\0" /* 21952 */ - "STENCILFAIL\0" /* 21965 */ - "STENCILZPASS\0" /* 21977 */ - "STENCILZFAIL\0" /* 21990 */ - "STENCILFAIL_BF\0" /* 22003 */ - "STENCILZPASS_BF\0" /* 22018 */ - "STENCILZFAIL_BF\0" /* 22034 */ - "STENCILTESTVAL\0" /* 22050 */ - "STENCILMASK\0" /* 22065 */ - "STENCILWRITEMASK\0" /* 22077 */ - "STENCILOPVAL\0" /* 22094 */ - "STENCILTESTVAL_BF\0" /* 22107 */ - "STENCILMASK_BF\0" /* 22125 */ - "STENCILWRITEMASK_BF\0" /* 22140 */ - "STENCILOPVAL_BF\0" /* 22160 */ - "X_0_0F\0" /* 22176 */ - "DEFAULT_VAL\0" /* 22183 */ - "FLAT_SHADE\0" /* 22195 */ - "CYL_WRAP\0" /* 22206 */ - "PT_SPRITE_TEX\0" /* 22215 */ - "DUP\0" /* 22229 */ - "FP16_INTERP_MODE\0" /* 22233 */ - "USE_DEFAULT_ATTR1\0" /* 22250 */ - "DEFAULT_VAL_ATTR1\0" /* 22268 */ - "PT_SPRITE_TEX_ATTR1\0" /* 22286 */ - "ATTR0_VALID\0" /* 22306 */ - "ATTR1_VALID\0" /* 22318 */ - "VS_EXPORT_COUNT\0" /* 22330 */ - "VS_HALF_PACK\0" /* 22346 */ - "VS_EXPORTS_FOG\0" /* 22359 */ - "VS_OUT_FOG_VEC_ADDR\0" /* 22374 */ - "PERSP_SAMPLE_ENA\0" /* 22394 */ - "PERSP_CENTER_ENA\0" /* 22411 */ - "PERSP_CENTROID_ENA\0" /* 22428 */ - "PERSP_PULL_MODEL_ENA\0" /* 22447 */ - "LINEAR_SAMPLE_ENA\0" /* 22468 */ - "LINEAR_CENTER_ENA\0" /* 22486 */ - "LINEAR_CENTROID_ENA\0" /* 22504 */ - "LINE_STIPPLE_TEX_ENA\0" /* 22524 */ - "POS_X_FLOAT_ENA\0" /* 22545 */ - "POS_Y_FLOAT_ENA\0" /* 22561 */ - "POS_Z_FLOAT_ENA\0" /* 22577 */ - "POS_W_FLOAT_ENA\0" /* 22593 */ - "FRONT_FACE_ENA\0" /* 22609 */ - "ANCILLARY_ENA\0" /* 22624 */ - "SAMPLE_COVERAGE_ENA\0" /* 22638 */ - "POS_FIXED_PT_ENA\0" /* 22658 */ - "FLAT_SHADE_ENA\0" /* 22675 */ - "PNT_SPRITE_ENA\0" /* 22690 */ - "SPI_PNT_SPRITE_SEL_0\0" /* 22705 */ - "SPI_PNT_SPRITE_SEL_1\0" /* 22726 */ - "SPI_PNT_SPRITE_SEL_S\0" /* 22747 */ - "SPI_PNT_SPRITE_SEL_T\0" /* 22768 */ - "SPI_PNT_SPRITE_SEL_NONE\0" /* 22789 */ - "PNT_SPRITE_OVRD_X\0" /* 22813 */ - "PNT_SPRITE_OVRD_Y\0" /* 22831 */ - "PNT_SPRITE_OVRD_Z\0" /* 22849 */ - "PNT_SPRITE_OVRD_W\0" /* 22867 */ - "PNT_SPRITE_TOP_1\0" /* 22885 */ - "NUM_INTERP\0" /* 22902 */ - "PARAM_GEN\0" /* 22913 */ - "FOG_ADDR\0" /* 22923 */ - "BC_OPTIMIZE_DISABLE\0" /* 22932 */ - "PASS_FOG_THROUGH_PS\0" /* 22952 */ - "PERSP_CENTER_CNTL\0" /* 22972 */ - "PERSP_CENTROID_CNTL\0" /* 22990 */ - "LINEAR_CENTER_CNTL\0" /* 23010 */ - "LINEAR_CENTROID_CNTL\0" /* 23029 */ - "X_CALCULATE_PER_PIXEL_FLOATING_POINT_POSITION_AT\0" /* 23050 */ - "POS_FLOAT_LOCATION\0" /* 23099 */ - "POS_FLOAT_ULC\0" /* 23118 */ - "FRONT_FACE_ALL_BITS\0" /* 23132 */ - "NUM_PS_WAVES\0" /* 23152 */ - "NUM_VS_WAVES\0" /* 23165 */ - "NUM_GS_WAVES\0" /* 23178 */ - "NUM_ES_WAVES\0" /* 23191 */ - "NUM_HS_WAVES\0" /* 23204 */ - "NUM_LS_WAVES\0" /* 23217 */ - "SPI_SHADER_NONE\0" /* 23230 */ - "SPI_SHADER_1COMP\0" /* 23246 */ - "SPI_SHADER_2COMP\0" /* 23263 */ - "SPI_SHADER_4COMPRESS\0" /* 23280 */ - "SPI_SHADER_4COMP\0" /* 23301 */ - "POS0_EXPORT_FORMAT\0" /* 23318 */ - "POS1_EXPORT_FORMAT\0" /* 23337 */ - "POS2_EXPORT_FORMAT\0" /* 23356 */ - "POS3_EXPORT_FORMAT\0" /* 23375 */ - "SPI_SHADER_ZERO\0" /* 23394 */ - "SPI_SHADER_32_R\0" /* 23410 */ - "SPI_SHADER_32_GR\0" /* 23426 */ - "SPI_SHADER_32_AR\0" /* 23443 */ - "SPI_SHADER_FP16_ABGR\0" /* 23460 */ - "SPI_SHADER_UNORM16_ABGR\0" /* 23481 */ - "SPI_SHADER_SNORM16_ABGR\0" /* 23505 */ - "SPI_SHADER_UINT16_ABGR\0" /* 23529 */ - "SPI_SHADER_SINT16_ABGR\0" /* 23552 */ - "SPI_SHADER_32_ABGR\0" /* 23575 */ - "Z_EXPORT_FORMAT\0" /* 23594 */ - "COL0_EXPORT_FORMAT\0" /* 23610 */ - "COL1_EXPORT_FORMAT\0" /* 23629 */ - "COL2_EXPORT_FORMAT\0" /* 23648 */ - "COL3_EXPORT_FORMAT\0" /* 23667 */ - "COL4_EXPORT_FORMAT\0" /* 23686 */ - "COL5_EXPORT_FORMAT\0" /* 23705 */ - "COL6_EXPORT_FORMAT\0" /* 23724 */ - "COL7_EXPORT_FORMAT\0" /* 23743 */ - "SX_RT_EXPORT_NO_CONVERSION\0" /* 23762 */ - "SX_RT_EXPORT_32_R\0" /* 23789 */ - "SX_RT_EXPORT_32_A\0" /* 23807 */ - "SX_RT_EXPORT_10_11_11\0" /* 23825 */ - "SX_RT_EXPORT_2_10_10_10\0" /* 23847 */ - "SX_RT_EXPORT_8_8_8_8\0" /* 23871 */ - "SX_RT_EXPORT_5_6_5\0" /* 23892 */ - "SX_RT_EXPORT_1_5_5_5\0" /* 23911 */ - "SX_RT_EXPORT_4_4_4_4\0" /* 23932 */ - "SX_RT_EXPORT_16_16_GR\0" /* 23953 */ - "SX_RT_EXPORT_16_16_AR\0" /* 23975 */ - "MRT0\0" /* 23997 */ - "MRT1\0" /* 24002 */ - "MRT2\0" /* 24007 */ - "MRT3\0" /* 24012 */ - "MRT4\0" /* 24017 */ - "MRT5\0" /* 24022 */ - "MRT6\0" /* 24027 */ - "MRT7\0" /* 24032 */ - "EXACT\0" /* 24037 */ - "11BIT_FORMAT\0" /* 24043 */ - "10BIT_FORMAT\0" /* 24056 */ - "8BIT_FORMAT\0" /* 24069 */ - "6BIT_FORMAT\0" /* 24081 */ - "5BIT_FORMAT\0" /* 24093 */ - "4BIT_FORMAT\0" /* 24105 */ - "MRT0_EPSILON\0" /* 24117 */ - "MRT1_EPSILON\0" /* 24130 */ - "MRT2_EPSILON\0" /* 24143 */ - "MRT3_EPSILON\0" /* 24156 */ - "MRT4_EPSILON\0" /* 24169 */ - "MRT5_EPSILON\0" /* 24182 */ - "MRT6_EPSILON\0" /* 24195 */ - "MRT7_EPSILON\0" /* 24208 */ - "MRT0_COLOR_OPT_DISABLE\0" /* 24221 */ - "MRT0_ALPHA_OPT_DISABLE\0" /* 24244 */ - "MRT1_COLOR_OPT_DISABLE\0" /* 24267 */ - "MRT1_ALPHA_OPT_DISABLE\0" /* 24290 */ - "MRT2_COLOR_OPT_DISABLE\0" /* 24313 */ - "MRT2_ALPHA_OPT_DISABLE\0" /* 24336 */ - "MRT3_COLOR_OPT_DISABLE\0" /* 24359 */ - "MRT3_ALPHA_OPT_DISABLE\0" /* 24382 */ - "MRT4_COLOR_OPT_DISABLE\0" /* 24405 */ - "MRT4_ALPHA_OPT_DISABLE\0" /* 24428 */ - "MRT5_COLOR_OPT_DISABLE\0" /* 24451 */ - "MRT5_ALPHA_OPT_DISABLE\0" /* 24474 */ - "MRT6_COLOR_OPT_DISABLE\0" /* 24497 */ - "MRT6_ALPHA_OPT_DISABLE\0" /* 24520 */ - "MRT7_COLOR_OPT_DISABLE\0" /* 24543 */ - "MRT7_ALPHA_OPT_DISABLE\0" /* 24566 */ - "PIXEN_ZERO_OPT_DISABLE\0" /* 24589 */ - "BLEND_OPT_PRESERVE_NONE_IGNORE_ALL\0" /* 24612 */ - "BLEND_OPT_PRESERVE_ALL_IGNORE_NONE\0" /* 24647 */ - "BLEND_OPT_PRESERVE_C1_IGNORE_C0\0" /* 24682 */ - "BLEND_OPT_PRESERVE_C0_IGNORE_C1\0" /* 24714 */ - "BLEND_OPT_PRESERVE_A1_IGNORE_A0\0" /* 24746 */ - "BLEND_OPT_PRESERVE_A0_IGNORE_A1\0" /* 24778 */ - "BLEND_OPT_PRESERVE_NONE_IGNORE_A0\0" /* 24810 */ - "BLEND_OPT_PRESERVE_NONE_IGNORE_NONE\0" /* 24844 */ - "COLOR_SRC_OPT\0" /* 24880 */ - "COLOR_DST_OPT\0" /* 24894 */ - "OPT_COMB_NONE\0" /* 24908 */ - "OPT_COMB_ADD\0" /* 24922 */ - "OPT_COMB_SUBTRACT\0" /* 24935 */ - "OPT_COMB_MIN\0" /* 24953 */ - "OPT_COMB_MAX\0" /* 24966 */ - "OPT_COMB_REVSUBTRACT\0" /* 24979 */ - "OPT_COMB_BLEND_DISABLED\0" /* 25000 */ - "OPT_COMB_SAFE_ADD\0" /* 25024 */ - "COLOR_COMB_FCN\0" /* 25042 */ - "ALPHA_SRC_OPT\0" /* 25057 */ - "ALPHA_DST_OPT\0" /* 25071 */ - "ALPHA_COMB_FCN\0" /* 25085 */ - "BLEND_ZERO\0" /* 25100 */ - "BLEND_ONE\0" /* 25111 */ - "BLEND_SRC_COLOR\0" /* 25121 */ - "BLEND_ONE_MINUS_SRC_COLOR\0" /* 25137 */ - "BLEND_SRC_ALPHA\0" /* 25163 */ - "BLEND_ONE_MINUS_SRC_ALPHA\0" /* 25179 */ - "BLEND_DST_ALPHA\0" /* 25205 */ - "BLEND_ONE_MINUS_DST_ALPHA\0" /* 25221 */ - "BLEND_DST_COLOR\0" /* 25247 */ - "BLEND_ONE_MINUS_DST_COLOR\0" /* 25263 */ - "BLEND_SRC_ALPHA_SATURATE\0" /* 25289 */ - "BLEND_CONSTANT_COLOR\0" /* 25314 */ - "BLEND_ONE_MINUS_CONSTANT_COLOR\0" /* 25335 */ - "BLEND_SRC1_COLOR\0" /* 25366 */ - "BLEND_INV_SRC1_COLOR\0" /* 25383 */ - "BLEND_SRC1_ALPHA\0" /* 25404 */ - "BLEND_INV_SRC1_ALPHA\0" /* 25421 */ - "BLEND_CONSTANT_ALPHA\0" /* 25442 */ - "BLEND_ONE_MINUS_CONSTANT_ALPHA\0" /* 25463 */ - "COLOR_SRCBLEND\0" /* 25494 */ - "COMB_DST_PLUS_SRC\0" /* 25509 */ - "COMB_SRC_MINUS_DST\0" /* 25527 */ - "COMB_MIN_DST_SRC\0" /* 25546 */ - "COMB_MAX_DST_SRC\0" /* 25563 */ - "COMB_DST_MINUS_SRC\0" /* 25580 */ - "COLOR_DESTBLEND\0" /* 25599 */ - "ALPHA_SRCBLEND\0" /* 25615 */ - "ALPHA_DESTBLEND\0" /* 25630 */ - "SEPARATE_ALPHA_BLEND\0" /* 25646 */ - "DISABLE_ROP3\0" /* 25675, 25667 */ - "SRC_STATE_ID\0" /* 25680 */ - "BASE_ADDR\0" /* 25693 */ - "DI_SRC_SEL_DMA\0" /* 25703 */ - "DI_SRC_SEL_IMMEDIATE\0" /* 25718 */ - "DI_SRC_SEL_AUTO_INDEX\0" /* 25739 */ - "DI_SRC_SEL_RESERVED\0" /* 25761 */ - "SOURCE_SELECT\0" /* 25781 */ - "DI_MAJOR_MODE_0\0" /* 25795 */ - "DI_MAJOR_MODE_1\0" /* 25811 */ - "MAJOR_MODE\0" /* 25827 */ - "NOT_EOP\0" /* 25838 */ - "USE_OPAQUE\0" /* 25846 */ - "ADDRESS_LOW\0" /* 25857 */ - "STENCIL_ENABLE\0" /* 25869 */ - "Z_WRITE_ENABLE\0" /* 25884 */ - "DEPTH_BOUNDS_ENABLE\0" /* 25899 */ - "FRAG_NEVER\0" /* 25919 */ - "FRAG_LESS\0" /* 25930 */ - "FRAG_EQUAL\0" /* 25940 */ - "FRAG_LEQUAL\0" /* 25951 */ - "FRAG_GREATER\0" /* 25963 */ - "FRAG_NOTEQUAL\0" /* 25976 */ - "FRAG_GEQUAL\0" /* 25990 */ - "FRAG_ALWAYS\0" /* 26002 */ - "BACKFACE_ENABLE\0" /* 26014 */ - "REF_NEVER\0" /* 26030 */ - "REF_LESS\0" /* 26040 */ - "REF_EQUAL\0" /* 26049 */ - "REF_LEQUAL\0" /* 26059 */ - "REF_GREATER\0" /* 26070 */ - "REF_NOTEQUAL\0" /* 26082 */ - "REF_GEQUAL\0" /* 26095 */ - "REF_ALWAYS\0" /* 26106 */ - "STENCILFUNC\0" /* 26117 */ - "STENCILFUNC_BF\0" /* 26129 */ - "ENABLE_COLOR_WRITES_ON_DEPTH_FAIL\0" /* 26144 */ - "DISABLE_COLOR_WRITES_ON_DEPTH_PASS\0" /* 26178 */ - "MAX_ANCHOR_SAMPLES\0" /* 26213 */ - "PS_ITER_SAMPLES\0" /* 26232 */ - "MASK_EXPORT_NUM_SAMPLES\0" /* 26248 */ - "ALPHA_TO_MASK_NUM_SAMPLES\0" /* 26272 */ - "HIGH_QUALITY_INTERSECTIONS\0" /* 26298 */ - "INCOHERENT_EQAA_READS\0" /* 26325 */ - "INTERPOLATE_COMP_Z\0" /* 26347 */ - "INTERPOLATE_SRC_Z\0" /* 26366 */ - "STATIC_ANCHOR_ASSOCIATIONS\0" /* 26384 */ - "ALPHA_TO_MASK_EQAA_DISABLE\0" /* 26411 */ - "OVERRASTERIZATION_AMOUNT\0" /* 26438 */ - "ENABLE_POSTZ_OVERRASTERIZATION\0" /* 26463 */ - "DISABLE_DUAL_QUAD\0" /* 26494 */ - "DEGAMMA_ENABLE\0" /* 26512 */ - "CB_DISABLE\0" /* 26527 */ - "CB_NORMAL\0" /* 26538 */ - "CB_ELIMINATE_FAST_CLEAR\0" /* 26561, 26548 */ - "CB_RESOLVE\0" /* 26572 */ - "CB_FMASK_DECOMPRESS\0" /* 26583 */ - "CB_DCC_DECOMPRESS\0" /* 26603 */ - "X_0X00\0" /* 26621 */ - "X_0X05\0" /* 26628 */ - "X_0X0A\0" /* 26635 */ - "X_0X0F\0" /* 26642 */ - "X_0X11\0" /* 26649 */ - "X_0X22\0" /* 26656 */ - "X_0X33\0" /* 26663 */ - "X_0X44\0" /* 26670 */ - "X_0X50\0" /* 26677 */ - "X_0X55\0" /* 26684 */ - "X_0X5A\0" /* 26691 */ - "X_0X5F\0" /* 26698 */ - "X_0X66\0" /* 26705 */ - "X_0X77\0" /* 26712 */ - "X_0X88\0" /* 26719 */ - "X_0X99\0" /* 26726 */ - "X_0XA0\0" /* 26733 */ - "X_0XA5\0" /* 26740 */ - "X_0XAA\0" /* 26747 */ - "X_0XAF\0" /* 26754 */ - "X_0XBB\0" /* 26761 */ - "X_0XCC\0" /* 26768 */ - "X_0XDD\0" /* 26775 */ - "X_0XEE\0" /* 26782 */ - "X_0XF0\0" /* 26789 */ - "X_0XF5\0" /* 26796 */ - "X_0XFA\0" /* 26803 */ - "X_0XFF\0" /* 26810 */ - "Z_EXPORT_ENABLE\0" /* 26817 */ - "STENCIL_TEST_VAL_EXPORT_ENABLE\0" /* 26833 */ - "STENCIL_OP_VAL_EXPORT_ENABLE\0" /* 26864 */ - "LATE_Z\0" /* 26893 */ - "EARLY_Z_THEN_LATE_Z\0" /* 26900 */ - "RE_Z\0" /* 26920 */ - "EARLY_Z_THEN_RE_Z\0" /* 26925 */ - "KILL_ENABLE\0" /* 26943 */ - "COVERAGE_TO_MASK_ENABLE\0" /* 26955 */ - "MASK_EXPORT_ENABLE\0" /* 26979 */ - "EXEC_ON_HIER_FAIL\0" /* 26998 */ - "EXEC_ON_NOOP\0" /* 27016 */ - "ALPHA_TO_MASK_DISABLE\0" /* 27029 */ - "DEPTH_BEFORE_SHADER\0" /* 27051 */ - "EXPORT_ANY_Z\0" /* 27071 */ - "EXPORT_LESS_THAN_Z\0" /* 27084 */ - "EXPORT_GREATER_THAN_Z\0" /* 27103 */ - "EXPORT_RESERVED\0" /* 27125 */ - "CONSERVATIVE_Z_EXPORT\0" /* 27141 */ - "DUAL_QUAD_DISABLE\0" /* 27163 */ - "UCP_ENA_0\0" /* 27181 */ - "UCP_ENA_1\0" /* 27191 */ - "UCP_ENA_2\0" /* 27201 */ - "UCP_ENA_3\0" /* 27211 */ - "UCP_ENA_4\0" /* 27221 */ - "UCP_ENA_5\0" /* 27231 */ - "PS_UCP_Y_SCALE_NEG\0" /* 27241 */ - "PS_UCP_MODE\0" /* 27260 */ - "CLIP_DISABLE\0" /* 27272 */ - "UCP_CULL_ONLY_ENA\0" /* 27285 */ - "BOUNDARY_EDGE_FLAG_ENA\0" /* 27303 */ - "DX_CLIP_SPACE_DEF\0" /* 27326 */ - "DIS_CLIP_ERR_DETECT\0" /* 27344 */ - "VTX_KILL_OR\0" /* 27364 */ - "DX_RASTERIZATION_KILL\0" /* 27376 */ - "DX_LINEAR_ATTR_CLIP_ENA\0" /* 27398 */ - "VTE_VPORT_PROVOKE_DISABLE\0" /* 27422 */ - "ZCLIP_NEAR_DISABLE\0" /* 27448 */ - "ZCLIP_FAR_DISABLE\0" /* 27467 */ - "CULL_FRONT\0" /* 27485 */ - "CULL_BACK\0" /* 27496 */ - "FACE\0" /* 27506 */ - "X_DISABLE_POLY_MODE\0" /* 27521, 27511 */ - "X_DUAL_MODE\0" /* 27531 */ - "X_DRAW_POINTS\0" /* 27543 */ - "X_DRAW_LINES\0" /* 27557 */ - "X_DRAW_TRIANGLES\0" /* 27570 */ - "POLYMODE_FRONT_PTYPE\0" /* 27587 */ - "POLYMODE_BACK_PTYPE\0" /* 27608 */ - "POLY_OFFSET_FRONT_ENABLE\0" /* 27628 */ - "POLY_OFFSET_BACK_ENABLE\0" /* 27653 */ - "POLY_OFFSET_PARA_ENABLE\0" /* 27677 */ - "VTX_WINDOW_OFFSET_ENABLE\0" /* 27701 */ - "PROVOKING_VTX_LAST\0" /* 27726 */ - "PERSP_CORR_DIS\0" /* 27745 */ - "MULTI_PRIM_IB_ENA\0" /* 27760 */ - "VPORT_X_SCALE_ENA\0" /* 27778 */ - "VPORT_X_OFFSET_ENA\0" /* 27796 */ - "VPORT_Y_SCALE_ENA\0" /* 27815 */ - "VPORT_Y_OFFSET_ENA\0" /* 27833 */ - "VPORT_Z_SCALE_ENA\0" /* 27852 */ - "VPORT_Z_OFFSET_ENA\0" /* 27870 */ - "VTX_XY_FMT\0" /* 27889 */ - "VTX_Z_FMT\0" /* 27900 */ - "VTX_W0_FMT\0" /* 27910 */ - "CLIP_DIST_ENA_0\0" /* 27921 */ - "CLIP_DIST_ENA_1\0" /* 27937 */ - "CLIP_DIST_ENA_2\0" /* 27953 */ - "CLIP_DIST_ENA_3\0" /* 27969 */ - "CLIP_DIST_ENA_4\0" /* 27985 */ - "CLIP_DIST_ENA_5\0" /* 28001 */ - "CLIP_DIST_ENA_6\0" /* 28017 */ - "CLIP_DIST_ENA_7\0" /* 28033 */ - "CULL_DIST_ENA_0\0" /* 28049 */ - "CULL_DIST_ENA_1\0" /* 28065 */ - "CULL_DIST_ENA_2\0" /* 28081 */ - "CULL_DIST_ENA_3\0" /* 28097 */ - "CULL_DIST_ENA_4\0" /* 28113 */ - "CULL_DIST_ENA_5\0" /* 28129 */ - "CULL_DIST_ENA_6\0" /* 28145 */ - "CULL_DIST_ENA_7\0" /* 28161 */ - "USE_VTX_POINT_SIZE\0" /* 28177 */ - "USE_VTX_EDGE_FLAG\0" /* 28196 */ - "USE_VTX_RENDER_TARGET_INDX\0" /* 28214 */ - "USE_VTX_VIEWPORT_INDX\0" /* 28241 */ - "USE_VTX_KILL_FLAG\0" /* 28263 */ - "VS_OUT_MISC_VEC_ENA\0" /* 28281 */ - "VS_OUT_CCDIST0_VEC_ENA\0" /* 28301 */ - "VS_OUT_CCDIST1_VEC_ENA\0" /* 28324 */ - "VS_OUT_MISC_SIDE_BUS_ENA\0" /* 28347 */ - "USE_VTX_GS_CUT_FLAG\0" /* 28372 */ - "USE_VTX_LINE_WIDTH\0" /* 28392 */ - "VTE_XY_INF_DISCARD\0" /* 28411 */ - "VTE_Z_INF_DISCARD\0" /* 28430 */ - "VTE_W_INF_DISCARD\0" /* 28448 */ - "VTE_0XNANINF_IS_0\0" /* 28466 */ - "VTE_XY_NAN_RETAIN\0" /* 28484 */ - "VTE_Z_NAN_RETAIN\0" /* 28502 */ - "VTE_W_NAN_RETAIN\0" /* 28519 */ - "VTE_W_RECIP_NAN_IS_0\0" /* 28536 */ - "VS_XY_NAN_TO_INF\0" /* 28557 */ - "VS_XY_INF_RETAIN\0" /* 28574 */ - "VS_Z_NAN_TO_INF\0" /* 28591 */ - "VS_Z_INF_RETAIN\0" /* 28607 */ - "VS_W_NAN_TO_INF\0" /* 28623 */ - "VS_W_INF_RETAIN\0" /* 28639 */ - "VS_CLIP_DIST_INF_DISCARD\0" /* 28655 */ - "VTE_NO_OUTPUT_NEG_0\0" /* 28680 */ - "LINE_STIPPLE_RESET\0" /* 28700 */ - "EXPAND_FULL_LENGTH\0" /* 28719 */ - "FRACTIONAL_ACCUM\0" /* 28738 */ - "DIAMOND_ADJUST\0" /* 28755 */ - "TRIANGLE_FILTER_DISABLE\0" /* 28770 */ - "LINE_FILTER_DISABLE\0" /* 28794 */ - "POINT_FILTER_DISABLE\0" /* 28814 */ - "RECTANGLE_FILTER_DISABLE\0" /* 28835 */ - "TRIANGLE_EXPAND_ENA\0" /* 28860 */ - "LINE_EXPAND_ENA\0" /* 28880 */ - "POINT_EXPAND_ENA\0" /* 28896 */ - "RECTANGLE_EXPAND_ENA\0" /* 28913 */ - "PRIM_EXPAND_CONSTANT\0" /* 28934 */ - "XMAX_RIGHT_EXCLUSION\0" /* 28955 */ - "YMAX_BOTTOM_EXCLUSION\0" /* 28976 */ - "SMALL_PRIM_FILTER_ENABLE\0" /* 28998 */ - "MIN_SIZE\0" /* 29023 */ - "MAX_SIZE\0" /* 29032 */ - "LINE_PATTERN\0" /* 29041 */ - "REPEAT_COUNT\0" /* 29054 */ - "PATTERN_BIT_ORDER\0" /* 29067 */ - "AUTO_RESET_CNTL\0" /* 29085 */ - "VGT_OUTPATH_VTX_REUSE\0" /* 29101 */ - "VGT_OUTPATH_TESS_EN\0" /* 29123 */ - "VGT_OUTPATH_PASSTHRU\0" /* 29143 */ - "VGT_OUTPATH_GS_BLOCK\0" /* 29164 */ - "VGT_OUTPATH_HS_BLOCK\0" /* 29185 */ - "PATH_SELECT\0" /* 29206 */ - "TESS_MODE\0" /* 29218 */ - "REUSE_DEPTH\0" /* 29228 */ - "VGT_GRP_3D_POINT\0" /* 29240 */ - "VGT_GRP_3D_LINE\0" /* 29257 */ - "VGT_GRP_3D_TRI\0" /* 29273 */ - "VGT_GRP_3D_RECT\0" /* 29288 */ - "VGT_GRP_3D_QUAD\0" /* 29304 */ - "VGT_GRP_2D_COPY_RECT_V0\0" /* 29320 */ - "VGT_GRP_2D_COPY_RECT_V1\0" /* 29344 */ - "VGT_GRP_2D_COPY_RECT_V2\0" /* 29368 */ - "VGT_GRP_2D_COPY_RECT_V3\0" /* 29392 */ - "VGT_GRP_2D_FILL_RECT\0" /* 29416 */ - "VGT_GRP_2D_LINE\0" /* 29437 */ - "VGT_GRP_2D_TRI\0" /* 29453 */ - "VGT_GRP_PRIM_INDEX_LINE\0" /* 29468 */ - "VGT_GRP_PRIM_INDEX_TRI\0" /* 29492 */ - "VGT_GRP_PRIM_INDEX_QUAD\0" /* 29515 */ - "VGT_GRP_3D_LINE_ADJ\0" /* 29539 */ - "VGT_GRP_3D_TRI_ADJ\0" /* 29559 */ - "VGT_GRP_3D_PATCH\0" /* 29578 */ - "RETAIN_ORDER\0" /* 29595 */ - "RETAIN_QUADS\0" /* 29608 */ - "VGT_GRP_LIST\0" /* 29621 */ - "VGT_GRP_STRIP\0" /* 29634 */ - "VGT_GRP_FAN\0" /* 29648 */ - "VGT_GRP_LOOP\0" /* 29660 */ - "VGT_GRP_POLYGON\0" /* 29673 */ - "PRIM_ORDER\0" /* 29689 */ - "FIRST_DECR\0" /* 29706, 29700 */ - "COMP_X_EN\0" /* 29711 */ - "COMP_Y_EN\0" /* 29721 */ - "COMP_Z_EN\0" /* 29731 */ - "COMP_W_EN\0" /* 29741 */ - "SHIFT\0" /* 29751 */ - "VGT_GRP_INDEX_16\0" /* 29757 */ - "VGT_GRP_INDEX_32\0" /* 29774 */ - "VGT_GRP_UINT_16\0" /* 29791 */ - "VGT_GRP_UINT_32\0" /* 29807 */ - "VGT_GRP_SINT_16\0" /* 29823 */ - "VGT_GRP_SINT_32\0" /* 29839 */ - "VGT_GRP_FLOAT_32\0" /* 29855 */ - "VGT_GRP_AUTO_PRIM\0" /* 29872 */ - "VGT_GRP_FIX_1_23_TO_FLOAT\0" /* 29890 */ - "X_CONV\0" /* 29916 */ - "Y_CONV\0" /* 29923 */ - "Z_CONV\0" /* 29930 */ - "Z_OFFSET\0" /* 29937 */ - "W_CONV\0" /* 29946 */ - "W_OFFSET\0" /* 29953 */ - "GS_OFF\0" /* 29962 */ - "GS_SCENARIO_A\0" /* 29969 */ - "GS_SCENARIO_B\0" /* 29983 */ - "GS_SCENARIO_G\0" /* 29997 */ - "GS_SCENARIO_C\0" /* 30011 */ - "SPRITE_EN\0" /* 30025 */ - "GS_CUT_1024\0" /* 30035 */ - "GS_CUT_512\0" /* 30047 */ - "GS_CUT_256\0" /* 30058 */ - "GS_CUT_128\0" /* 30069 */ - "CUT_MODE\0" /* 30080 */ - "GS_C_PACK_EN\0" /* 30089 */ - "RESERVED_2\0" /* 30102 */ - "ES_PASSTHRU\0" /* 30113 */ - "COMPUTE_MODE\0" /* 30125 */ - "FAST_COMPUTE_MODE\0" /* 30138 */ - "ELEMENT_INFO_EN\0" /* 30156 */ - "PARTIAL_THD_AT_EOI\0" /* 30172 */ - "SUPPRESS_CUTS\0" /* 30191 */ - "ES_WRITE_OPTIMIZE\0" /* 30205 */ - "GS_WRITE_OPTIMIZE\0" /* 30223 */ - "X_0_OFFCHIP_GS\0" /* 30241 */ - "X_3_ES_AND_GS_ARE_ONCHIP\0" /* 30256, 30274 */ - "ES_VERTS_PER_SUBGRP\0" /* 30281 */ - "GS_PRIMS_PER_SUBGRP\0" /* 30301 */ - "MSAA_ENABLE\0" /* 30321 */ - "VPORT_SCISSOR_ENABLE\0" /* 30333 */ - "LINE_STIPPLE_ENABLE\0" /* 30354 */ - "SEND_UNLIT_STILES_TO_PKR\0" /* 30374 */ - "WALK_SIZE\0" /* 30399 */ - "WALK_ALIGNMENT\0" /* 30409 */ - "WALK_ALIGN8_PRIM_FITS_ST\0" /* 30424 */ - "WALK_FENCE_ENABLE\0" /* 30449 */ - "WALK_FENCE_SIZE\0" /* 30467 */ - "SUPERTILE_WALK_ORDER_ENABLE\0" /* 30488, 30483 */ - "TILE_COVER_DISABLE\0" /* 30511 */ - "TILE_COVER_NO_SCISSOR\0" /* 30530 */ - "ZMM_LINE_EXTENT\0" /* 30552 */ - "ZMM_LINE_OFFSET\0" /* 30568 */ - "ZMM_RECT_EXTENT\0" /* 30584 */ - "KILL_PIX_POST_HI_Z\0" /* 30600 */ - "KILL_PIX_POST_DETAIL_MASK\0" /* 30619 */ - "PS_ITER_SAMPLE\0" /* 30645 */ - "MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE\0" /* 30660 */ - "MULTI_GPU_SUPERTILE_ENABLE\0" /* 30700 */ - "GPU_ID_OVERRIDE_ENABLE\0" /* 30727 */ - "GPU_ID_OVERRIDE\0" /* 30750 */ - "MULTI_GPU_PRIM_DISCARD_ENABLE\0" /* 30766 */ - "FORCE_EOV_CNTDWN_ENABLE\0" /* 30796 */ - "FORCE_EOV_REZ_ENABLE\0" /* 30820 */ - "OUT_OF_ORDER_PRIMITIVE_ENABLE\0" /* 30841 */ - "OUT_OF_ORDER_WATER_MARK\0" /* 30871 */ - "GS_PER_ES\0" /* 30895 */ - "ES_PER_GS\0" /* 30905 */ - "GS_PER_VS\0" /* 30915 */ - "OUTPRIM_TYPE_POINTLIST\0" /* 30925 */ - "OUTPRIM_TYPE_LINESTRIP\0" /* 30948 */ - "OUTPRIM_TYPE_TRISTRIP\0" /* 30971 */ - "OUTPRIM_TYPE\0" /* 30993 */ - "OUTPRIM_TYPE_1\0" /* 31006 */ - "OUTPRIM_TYPE_2\0" /* 31021 */ - "OUTPRIM_TYPE_3\0" /* 31036 */ - "UNIQUE_TYPE_PER_STREAM\0" /* 31051 */ - "VGT_INDEX_16\0" /* 31074 */ - "VGT_INDEX_32\0" /* 31087 */ - "VGT_INDEX_8\0" /* 31100 */ - "VGT_DMA_SWAP_NONE\0" /* 31112 */ - "VGT_DMA_SWAP_16_BIT\0" /* 31130 */ - "VGT_DMA_SWAP_32_BIT\0" /* 31150 */ - "VGT_DMA_SWAP_WORD\0" /* 31170 */ - "SWAP_MODE\0" /* 31188 */ - "VGT_DMA_BUF_MEM\0" /* 31198 */ - "VGT_DMA_BUF_RING\0" /* 31214 */ - "VGT_DMA_BUF_SETUP\0" /* 31231 */ - "BUF_TYPE\0" /* 31249 */ - "VGT_POLICY_LRU\0" /* 31258 */ - "VGT_POLICY_STREAM\0" /* 31273 */ - "RDREQ_POLICY\0" /* 31291 */ - "RDREQ_POLICY_VI\0" /* 31304 */ - "REQ_PATH\0" /* 31320 */ - "PRIMITIVEID_EN\0" /* 31329 */ - "DISABLE_RESET_ON_EOI\0" /* 31344 */ - "SAMPLE_STREAMOUTSTATS1\0" /* 31365 */ - "SAMPLE_STREAMOUTSTATS2\0" /* 31388 */ - "SAMPLE_STREAMOUTSTATS3\0" /* 31411 */ - "CACHE_FLUSH_TS\0" /* 31434 */ - "CONTEXT_DONE\0" /* 31449 */ - "CACHE_FLUSH\0" /* 31462 */ - "CS_PARTIAL_FLUSH\0" /* 31474 */ - "VGT_STREAMOUT_SYNC\0" /* 31491 */ - "VGT_STREAMOUT_RESET\0" /* 31510 */ - "END_OF_PIPE_INCR_DE\0" /* 31530 */ - "END_OF_PIPE_IB_END\0" /* 31550 */ - "RST_PIX_CNT\0" /* 31569 */ - "VS_PARTIAL_FLUSH\0" /* 31581 */ - "PS_PARTIAL_FLUSH\0" /* 31598 */ - "FLUSH_HS_OUTPUT\0" /* 31615 */ - "FLUSH_LS_OUTPUT\0" /* 31631 */ - "CACHE_FLUSH_AND_INV_TS_EVENT\0" /* 31647 */ - "ZPASS_DONE\0" /* 31676 */ - "CACHE_FLUSH_AND_INV_EVENT\0" /* 31687 */ - "PERFCOUNTER_START\0" /* 31713 */ - "PERFCOUNTER_STOP\0" /* 31731 */ - "PIPELINESTAT_START\0" /* 31748 */ - "PIPELINESTAT_STOP\0" /* 31767 */ - "PERFCOUNTER_SAMPLE\0" /* 31785 */ - "FLUSH_ES_OUTPUT\0" /* 31804 */ - "FLUSH_GS_OUTPUT\0" /* 31820 */ - "SAMPLE_PIPELINESTAT\0" /* 31836 */ - "SO_VGTSTREAMOUT_FLUSH\0" /* 31856 */ - "SAMPLE_STREAMOUTSTATS\0" /* 31878 */ - "RESET_VTX_CNT\0" /* 31900 */ - "BLOCK_CONTEXT_DONE\0" /* 31914 */ - "CS_CONTEXT_DONE\0" /* 31933 */ - "VGT_FLUSH\0" /* 31949 */ - "SC_SEND_DB_VPZ\0" /* 31959 */ - "BOTTOM_OF_PIPE_TS\0" /* 31974 */ - "DB_CACHE_FLUSH_AND_INV\0" /* 31992 */ - "FLUSH_AND_INV_DB_DATA_TS\0" /* 32015 */ - "FLUSH_AND_INV_DB_META\0" /* 32040 */ - "FLUSH_AND_INV_CB_DATA_TS\0" /* 32062 */ - "FLUSH_AND_INV_CB_META\0" /* 32087 */ - "FLUSH_AND_INV_CB_PIXEL_DATA\0" /* 32109 */ - "THREAD_TRACE_START\0" /* 32137 */ - "THREAD_TRACE_STOP\0" /* 32156 */ - "THREAD_TRACE_MARKER\0" /* 32174 */ - "THREAD_TRACE_FLUSH\0" /* 32194 */ - "THREAD_TRACE_FINISH\0" /* 32213 */ - "PIXEL_PIPE_STAT_CONTROL\0" /* 32233 */ - "PIXEL_PIPE_STAT_DUMP\0" /* 32257 */ - "PIXEL_PIPE_STAT_RESET\0" /* 32278 */ - "EVENT_TYPE\0" /* 32300 */ - "EXTENDED_EVENT\0" /* 32311 */ - "RESET_EN\0" /* 32326 */ - "PRIMGROUP_SIZE\0" /* 32335 */ - "PARTIAL_VS_WAVE_ON\0" /* 32350 */ - "SWITCH_ON_EOP\0" /* 32369 */ - "PARTIAL_ES_WAVE_ON\0" /* 32383 */ - "SWITCH_ON_EOI\0" /* 32402 */ - "WD_SWITCH_ON_EOP\0" /* 32416 */ - "MAX_PRIMGRP_IN_WAVE\0" /* 32433 */ - "ITEMSIZE\0" /* 32453 */ - "REUSE_OFF\0" /* 32462 */ - "VTX_CNT_EN\0" /* 32472 */ - "FULL_CACHE\0" /* 32483 */ - "HTILE_USES_PRELOAD_WIN\0" /* 32494 */ - "PRELOAD\0" /* 32517 */ - "PREFETCH_WIDTH\0" /* 32525 */ - "PREFETCH_HEIGHT\0" /* 32540 */ - "DST_OUTSIDE_ZERO_TO_ONE\0" /* 32556 */ - "TC_COMPATIBLE\0" /* 32580 */ - "COMPAREFUNC0\0" /* 32594 */ - "COMPAREVALUE0\0" /* 32607 */ - "COMPAREMASK0\0" /* 32621 */ - "COMPAREFUNC1\0" /* 32634 */ - "COMPAREVALUE1\0" /* 32647 */ - "COMPAREMASK1\0" /* 32661 */ - "START_X\0" /* 32674 */ - "START_Y\0" /* 32682 */ - "MAX_X\0" /* 32690 */ - "MAX_Y\0" /* 32696 */ - "VERTEX_STRIDE\0" /* 32702 */ - "MAX_VERT_OUT\0" /* 32716 */ - "ACCUM_ISOLINE\0" /* 32729 */ - "ACCUM_TRI\0" /* 32743 */ - "ACCUM_QUAD\0" /* 32753 */ - "DONUT_SPLIT\0" /* 32764 */ - "LS_STAGE_OFF\0" /* 32776 */ - "LS_STAGE_ON\0" /* 32789 */ - "CS_STAGE_ON\0" /* 32801 */ - "ES_STAGE_OFF\0" /* 32813 */ - "ES_STAGE_DS\0" /* 32826 */ - "ES_STAGE_REAL\0" /* 32838 */ - "VS_STAGE_REAL\0" /* 32852 */ - "VS_STAGE_DS\0" /* 32866 */ - "VS_STAGE_COPY_SHADER\0" /* 32878 */ - "DYNAMIC_HS\0" /* 32899 */ - "DIS_DEALLOC_ACCUM_0\0" /* 32910 */ - "DIS_DEALLOC_ACCUM_1\0" /* 32930 */ - "VS_WAVE_ID_EN\0" /* 32950 */ - "NUM_PATCHES\0" /* 32964 */ - "HS_NUM_INPUT_CP\0" /* 32976 */ - "HS_NUM_OUTPUT_CP\0" /* 32992 */ - "TESS_ISOLINE\0" /* 33009 */ - "TESS_TRIANGLE\0" /* 33022 */ - "TESS_QUAD\0" /* 33036 */ - "PART_INTEGER\0" /* 33046 */ - "PART_POW2\0" /* 33059 */ - "PART_FRAC_ODD\0" /* 33069 */ - "PART_FRAC_EVEN\0" /* 33083 */ - "PARTITIONING\0" /* 33098 */ - "OUTPUT_POINT\0" /* 33111 */ - "OUTPUT_LINE\0" /* 33124 */ - "OUTPUT_TRIANGLE_CW\0" /* 33136 */ - "OUTPUT_TRIANGLE_CCW\0" /* 33155 */ - "TOPOLOGY\0" /* 33175 */ - "RESERVED_REDUC_AXIS\0" /* 33184 */ - "DEPRECATED\0" /* 33204 */ - "NUM_DS_WAVES_PER_SIMD\0" /* 33215 */ - "DISABLE_DONUTS\0" /* 33237 */ - "VGT_POLICY_BYPASS\0" /* 33252 */ - "DISTRIBUTION_MODE_NO_DIST\0" /* 33270 */ - "DISTRIBUTION_MODE_PATCHES\0" /* 33296 */ - "DISTRIBUTION_MODE_DONUTS\0" /* 33322 */ - "DISTRIBUTION_MODE\0" /* 33347 */ - "ALPHA_TO_MASK_ENABLE\0" /* 33365 */ - "ALPHA_TO_MASK_OFFSET0\0" /* 33386 */ - "ALPHA_TO_MASK_OFFSET1\0" /* 33408 */ - "ALPHA_TO_MASK_OFFSET2\0" /* 33430 */ - "ALPHA_TO_MASK_OFFSET3\0" /* 33452 */ - "OFFSET_ROUND\0" /* 33474 */ - "POLY_OFFSET_NEG_NUM_DB_BITS\0" /* 33487 */ - "POLY_OFFSET_DB_IS_FLOAT_FMT\0" /* 33515 */ - "STREAMOUT_0_EN\0" /* 33543 */ - "STREAMOUT_1_EN\0" /* 33558 */ - "STREAMOUT_2_EN\0" /* 33573 */ - "STREAMOUT_3_EN\0" /* 33588 */ - "RAST_STREAM\0" /* 33603 */ - "RAST_STREAM_MASK\0" /* 33615 */ - "USE_RAST_STREAM_MASK\0" /* 33632 */ - "STREAM_0_BUFFER_EN\0" /* 33653 */ - "STREAM_1_BUFFER_EN\0" /* 33672 */ - "STREAM_2_BUFFER_EN\0" /* 33691 */ - "STREAM_3_BUFFER_EN\0" /* 33710 */ - "DISTANCE_0\0" /* 33729 */ - "DISTANCE_1\0" /* 33740 */ - "DISTANCE_2\0" /* 33751 */ - "DISTANCE_3\0" /* 33762 */ - "DISTANCE_4\0" /* 33773 */ - "DISTANCE_5\0" /* 33784 */ - "DISTANCE_6\0" /* 33795 */ - "DISTANCE_7\0" /* 33806 */ - "DISTANCE_8\0" /* 33817 */ - "DISTANCE_9\0" /* 33828 */ - "DISTANCE_10\0" /* 33839 */ - "DISTANCE_11\0" /* 33851 */ - "DISTANCE_12\0" /* 33863 */ - "DISTANCE_13\0" /* 33875 */ - "DISTANCE_14\0" /* 33887 */ - "DISTANCE_15\0" /* 33899 */ - "EXPAND_LINE_WIDTH\0" /* 33911 */ - "LAST_PIXEL\0" /* 33929 */ - "PERPENDICULAR_ENDCAP_ENA\0" /* 33940 */ - "DX10_DIAMOND_TEST_ENA\0" /* 33965 */ - "MSAA_NUM_SAMPLES\0" /* 33987 */ - "AA_MASK_CENTROID_DTMN\0" /* 34004 */ - "MAX_SAMPLE_DIST\0" /* 34026 */ - "MSAA_EXPOSED_SAMPLES\0" /* 34042 */ - "DETAIL_TO_EXPOSED_MODE\0" /* 34063 */ - "PIX_CENTER\0" /* 34086 */ - "X_TRUNCATE\0" /* 34097 */ - "X_ROUND\0" /* 34108 */ - "X_ROUND_TO_EVEN\0" /* 34116 */ - "X_ROUND_TO_ODD\0" /* 34132 */ - "ROUND_MODE\0" /* 34147 */ - "X_16_8_FIXED_POINT_1_16TH\0" /* 34158 */ - "X_16_8_FIXED_POINT_1_8TH\0" /* 34184 */ - "X_16_8_FIXED_POINT_1_4TH\0" /* 34209 */ - "X_16_8_FIXED_POINT_1_2\0" /* 34234 */ - "X_16_8_FIXED_POINT_1\0" /* 34257 */ - "X_16_8_FIXED_POINT_1_256TH\0" /* 34278 */ - "X_14_10_FIXED_POINT_1_1024TH\0" /* 34305 */ - "X_12_12_FIXED_POINT_1_4096TH\0" /* 34334 */ - "QUANT_MODE\0" /* 34363 */ - "S0_X\0" /* 34374 */ - "S0_Y\0" /* 34379 */ - "S1_X\0" /* 34384 */ - "S1_Y\0" /* 34389 */ - "S2_X\0" /* 34394 */ - "S2_Y\0" /* 34399 */ - "S3_X\0" /* 34404 */ - "S3_Y\0" /* 34409 */ - "S4_X\0" /* 34414 */ - "S4_Y\0" /* 34419 */ - "S5_X\0" /* 34424 */ - "S5_Y\0" /* 34429 */ - "S6_X\0" /* 34434 */ - "S6_Y\0" /* 34439 */ - "S7_X\0" /* 34444 */ - "S7_Y\0" /* 34449 */ - "S8_X\0" /* 34454 */ - "S8_Y\0" /* 34459 */ - "S9_X\0" /* 34464 */ - "S9_Y\0" /* 34469 */ - "S10_X\0" /* 34474 */ - "S10_Y\0" /* 34480 */ - "S11_X\0" /* 34486 */ - "S11_Y\0" /* 34492 */ - "S12_X\0" /* 34498 */ - "S12_Y\0" /* 34504 */ - "S13_X\0" /* 34510 */ - "S13_Y\0" /* 34516 */ - "S14_X\0" /* 34522 */ - "S14_Y\0" /* 34528 */ - "S15_X\0" /* 34534 */ - "S15_Y\0" /* 34540 */ - "AA_MASK_X0Y0\0" /* 34546 */ - "AA_MASK_X1Y0\0" /* 34559 */ - "AA_MASK_X0Y1\0" /* 34572 */ - "AA_MASK_X1Y1\0" /* 34585 */ - "REALIGN_DQUADS_AFTER_N_WAVES\0" /* 34598 */ - "VTX_REUSE_DEPTH\0" /* 34627 */ - "DEALLOC_DIST\0" /* 34643 */ - "FMASK_TILE_MAX\0" /* 34656 */ - "ENDIAN_NONE\0" /* 34671 */ - "ENDIAN_8IN16\0" /* 34683 */ - "ENDIAN_8IN32\0" /* 34696 */ - "ENDIAN_8IN64\0" /* 34709 */ - "ENDIAN\0" /* 34722 */ - "COLOR_INVALID\0" /* 34729 */ - "COLOR_8\0" /* 34743 */ - "COLOR_16\0" /* 34751 */ - "COLOR_8_8\0" /* 34760 */ - "COLOR_32\0" /* 34770 */ - "COLOR_16_16\0" /* 34779 */ - "COLOR_10_11_11\0" /* 34791 */ - "COLOR_11_11_10\0" /* 34806 */ - "COLOR_10_10_10_2\0" /* 34821 */ - "COLOR_2_10_10_10\0" /* 34838 */ - "COLOR_8_8_8_8\0" /* 34855 */ - "COLOR_32_32\0" /* 34869 */ - "COLOR_16_16_16_16\0" /* 34881 */ - "COLOR_32_32_32_32\0" /* 34899 */ - "COLOR_5_6_5\0" /* 34917 */ - "COLOR_1_5_5_5\0" /* 34929 */ - "COLOR_5_5_5_1\0" /* 34943 */ - "COLOR_4_4_4_4\0" /* 34957 */ - "COLOR_8_24\0" /* 34971 */ - "COLOR_24_8\0" /* 34982 */ - "COLOR_X24_8_32_FLOAT\0" /* 34993 */ - "NUMBER_UNORM\0" /* 35014 */ - "NUMBER_SNORM\0" /* 35027 */ - "NUMBER_UINT\0" /* 35040 */ - "NUMBER_SINT\0" /* 35052 */ - "NUMBER_SRGB\0" /* 35064 */ - "NUMBER_FLOAT\0" /* 35076 */ - "NUMBER_TYPE\0" /* 35089 */ - "SWAP_STD\0" /* 35101 */ - "SWAP_ALT\0" /* 35110 */ - "SWAP_STD_REV\0" /* 35119 */ - "SWAP_ALT_REV\0" /* 35132 */ - "COMP_SWAP\0" /* 35145 */ - "BLEND_CLAMP\0" /* 35155 */ - "BLEND_BYPASS\0" /* 35167 */ - "SIMPLE_FLOAT\0" /* 35180 */ - "CMASK_IS_LINEAR\0" /* 35193 */ - "FORCE_OPT_AUTO\0" /* 35209 */ - "FORCE_OPT_DISABLE\0" /* 35224 */ - "FORCE_OPT_ENABLE_IF_SRC_A_0\0" /* 35242 */ - "FORCE_OPT_ENABLE_IF_SRC_RGB_0\0" /* 35270 */ - "FORCE_OPT_ENABLE_IF_SRC_ARGB_0\0" /* 35300 */ - "FORCE_OPT_ENABLE_IF_SRC_A_1\0" /* 35331 */ - "FORCE_OPT_ENABLE_IF_SRC_RGB_1\0" /* 35359 */ - "FORCE_OPT_ENABLE_IF_SRC_ARGB_1\0" /* 35389 */ - "BLEND_OPT_DONT_RD_DST\0" /* 35420 */ - "BLEND_OPT_DISCARD_PIXEL\0" /* 35442 */ - "FMASK_COMPRESSION_DISABLE\0" /* 35466 */ - "FMASK_COMPRESS_1FRAG_ONLY\0" /* 35492 */ - "DCC_ENABLE\0" /* 35518 */ - "CMASK_ADDR_TYPE\0" /* 35529 */ - "FMASK_TILE_MODE_INDEX\0" /* 35545 */ - "FMASK_BANK_HEIGHT\0" /* 35567 */ - "NUM_FRAGMENTS\0" /* 35585 */ - "FORCE_DST_ALPHA_1\0" /* 35599 */ - "KEY_CLEAR_ENABLE\0" /* 35617 */ - "MAX_UNCOMPRESSED_BLOCK_SIZE\0" /* 35634 */ - "MIN_COMPRESSED_BLOCK_SIZE\0" /* 35662 */ - "MAX_COMPRESSED_BLOCK_SIZE\0" /* 35688 */ - "INDEPENDENT_64B_BLOCKS\0" /* 35714 */ - "LOSSY_RGB_PRECISION\0" /* 35737 */ - "LOSSY_ALPHA_PRECISION\0" /* 35757 */ - "CP_DMA_WORD0\0" /* 35779 */ - "CP_DMA_WORD1\0" /* 35792 */ - "CP_DMA_WORD2\0" /* 35805 */ - "CP_DMA_WORD3\0" /* 35818 */ - "COMMAND\0" /* 35831 */ - "DMA_DATA_WORD0\0" /* 35839 */ - "SRBM_STATUS2\0" /* 35854 */ - "SRBM_STATUS\0" /* 35867 */ - "SRBM_STATUS3\0" /* 35879 */ - "SDMA0_STATUS_REG\0" /* 35892 */ - "SDMA1_STATUS_REG\0" /* 35909 */ - "GRBM_STATUS2\0" /* 35926 */ - "GRBM_STATUS\0" /* 35939 */ - "CP_STRMOUT_CNTL\0" /* 35951 */ - "CP_COHER_CNTL\0" /* 35967 */ - "CP_COHER_SIZE\0" /* 35981 */ - "CP_COHER_BASE\0" /* 35995 */ - "GRBM_STATUS_SE0\0" /* 36009 */ - "GRBM_STATUS_SE1\0" /* 36025 */ - "GRBM_STATUS_SE2\0" /* 36041 */ - "GRBM_STATUS_SE3\0" /* 36057 */ - "CP_COHER_BASE_HI\0" /* 36073 */ - "CP_COHER_START_DELAY\0" /* 36090 */ - "CP_COHER_STATUS\0" /* 36111 */ - "CP_CPC_STATUS\0" /* 36127 */ - "CP_CPC_BUSY_STAT\0" /* 36141 */ - "CP_CPC_STALLED_STAT1\0" /* 36158 */ - "CP_CPF_STATUS\0" /* 36179 */ - "CP_CPF_BUSY_STAT\0" /* 36193 */ - "CP_CPF_STALLED_STAT1\0" /* 36210 */ - "CP_COHER_SIZE_HI\0" /* 36231 */ - "VGT_VTX_VECT_EJECT_REG\0" /* 36248 */ - "VGT_CACHE_INVALIDATION\0" /* 36271 */ - "VGT_ESGS_RING_SIZE\0" /* 36294 */ - "VGT_GSVS_RING_SIZE\0" /* 36313 */ - "VGT_GS_VERTEX_REUSE\0" /* 36332 */ - "VGT_PRIMITIVE_TYPE\0" /* 36352 */ - "VGT_INDEX_TYPE\0" /* 36371 */ - "VGT_STRMOUT_BUFFER_FILLED_SIZE_0\0" /* 36386 */ - "VGT_STRMOUT_BUFFER_FILLED_SIZE_1\0" /* 36419 */ - "VGT_STRMOUT_BUFFER_FILLED_SIZE_2\0" /* 36452 */ - "VGT_STRMOUT_BUFFER_FILLED_SIZE_3\0" /* 36485 */ - "VGT_NUM_INDICES\0" /* 36518 */ - "VGT_NUM_INSTANCES\0" /* 36534 */ - "VGT_TF_RING_SIZE\0" /* 36552 */ - "VGT_HS_OFFCHIP_PARAM\0" /* 36569 */ - "VGT_TF_MEMORY_BASE\0" /* 36590 */ - "PA_CL_ENHANCE\0" /* 36609 */ - "PA_SU_LINE_STIPPLE_VALUE\0" /* 36623 */ - "PA_SC_LINE_STIPPLE_STATE\0" /* 36648 */ - "CP_STALLED_STAT3\0" /* 36673 */ - "CP_STALLED_STAT1\0" /* 36690 */ - "CP_STALLED_STAT2\0" /* 36707 */ - "CP_STAT\0" /* 36724 */ - "GRBM_GFX_INDEX\0" /* 36732 */ - "PA_SC_SCREEN_EXTENT_MIN_0\0" /* 36747 */ - "PA_SC_SCREEN_EXTENT_MAX_0\0" /* 36773 */ - "PA_SC_SCREEN_EXTENT_MIN_1\0" /* 36799 */ - "PA_SC_SCREEN_EXTENT_MAX_1\0" /* 36825 */ - "PA_SC_ENHANCE\0" /* 36851 */ - "SQC_CACHES\0" /* 36865 */ - "SQ_RANDOM_WAVE_PRI\0" /* 36876 */ - "SQ_EXP_0\0" /* 36895 */ - "TA_CS_BC_BASE_ADDR\0" /* 36904 */ - "TA_CS_BC_BASE_ADDR_HI\0" /* 36923 */ - "DB_OCCLUSION_COUNT0_LOW\0" /* 36945 */ - "SQ_BUF_RSRC_WORD0\0" /* 36969 */ - "DB_OCCLUSION_COUNT0_HI\0" /* 36987 */ - "SQ_BUF_RSRC_WORD1\0" /* 37010 */ - "DB_OCCLUSION_COUNT1_LOW\0" /* 37028 */ - "SQ_BUF_RSRC_WORD2\0" /* 37052 */ - "DB_OCCLUSION_COUNT1_HI\0" /* 37070 */ - "SQ_BUF_RSRC_WORD3\0" /* 37093 */ - "DB_OCCLUSION_COUNT2_LOW\0" /* 37111 */ - "SQ_IMG_RSRC_WORD0\0" /* 37135 */ - "DB_OCCLUSION_COUNT2_HI\0" /* 37153 */ - "SQ_IMG_RSRC_WORD1\0" /* 37176 */ - "DB_OCCLUSION_COUNT3_LOW\0" /* 37194 */ - "SQ_IMG_RSRC_WORD2\0" /* 37218 */ - "DB_OCCLUSION_COUNT3_HI\0" /* 37236 */ - "SQ_IMG_RSRC_WORD3\0" /* 37259 */ - "SQ_IMG_RSRC_WORD4\0" /* 37277 */ - "SQ_IMG_RSRC_WORD5\0" /* 37295 */ - "SQ_IMG_RSRC_WORD6\0" /* 37313 */ - "SQ_IMG_RSRC_WORD7\0" /* 37331 */ - "SQ_IMG_SAMP_WORD0\0" /* 37349 */ - "SQ_IMG_SAMP_WORD1\0" /* 37367 */ - "SQ_IMG_SAMP_WORD2\0" /* 37385 */ - "SQ_IMG_SAMP_WORD3\0" /* 37403 */ - "SPI_DYN_GPR_LOCK_EN\0" /* 37421 */ - "SPI_STATIC_THREAD_MGMT_1\0" /* 37441 */ - "SPI_STATIC_THREAD_MGMT_2\0" /* 37466 */ - "SPI_STATIC_THREAD_MGMT_3\0" /* 37491 */ - "SPI_PS_MAX_WAVE_ID\0" /* 37516 */ - "SPI_ARB_PRIORITY\0" /* 37535 */ - "SPI_ARB_CYCLES_0\0" /* 37552 */ - "SPI_ARB_CYCLES_1\0" /* 37569 */ - "SQ_FLAT_SCRATCH_WORD0\0" /* 37586 */ - "SQ_FLAT_SCRATCH_WORD1\0" /* 37608 */ - "DB_ZPASS_COUNT_LOW\0" /* 37630 */ - "DB_ZPASS_COUNT_HI\0" /* 37649 */ - "SPI_CONFIG_CNTL\0" /* 37667 */ - "SPI_CONFIG_CNTL_1\0" /* 37683 */ - "SPI_RESOURCE_RESERVE_CU_AB_0\0" /* 37701 */ - "DB_SUBTILE_CONTROL\0" /* 37730 */ - "GB_ADDR_CONFIG\0" /* 37749 */ - "GB_TILE_MODE0\0" /* 37764 */ - "GB_TILE_MODE1\0" /* 37778 */ - "GB_TILE_MODE2\0" /* 37792 */ - "GB_TILE_MODE3\0" /* 37806 */ - "GB_TILE_MODE4\0" /* 37820 */ - "GB_TILE_MODE5\0" /* 37834 */ - "GB_TILE_MODE6\0" /* 37848 */ - "GB_TILE_MODE7\0" /* 37862 */ - "GB_TILE_MODE8\0" /* 37876 */ - "GB_TILE_MODE9\0" /* 37890 */ - "GB_TILE_MODE10\0" /* 37904 */ - "GB_TILE_MODE11\0" /* 37919 */ - "GB_TILE_MODE12\0" /* 37934 */ - "GB_TILE_MODE13\0" /* 37949 */ - "GB_TILE_MODE14\0" /* 37964 */ - "GB_TILE_MODE15\0" /* 37979 */ - "GB_TILE_MODE16\0" /* 37994 */ - "GB_TILE_MODE17\0" /* 38009 */ - "GB_TILE_MODE18\0" /* 38024 */ - "GB_TILE_MODE19\0" /* 38039 */ - "GB_TILE_MODE20\0" /* 38054 */ - "GB_TILE_MODE21\0" /* 38069 */ - "GB_TILE_MODE22\0" /* 38084 */ - "GB_TILE_MODE23\0" /* 38099 */ - "GB_TILE_MODE24\0" /* 38114 */ - "GB_TILE_MODE25\0" /* 38129 */ - "GB_TILE_MODE26\0" /* 38144 */ - "GB_TILE_MODE27\0" /* 38159 */ - "GB_TILE_MODE28\0" /* 38174 */ - "GB_TILE_MODE29\0" /* 38189 */ - "GB_TILE_MODE30\0" /* 38204 */ - "GB_TILE_MODE31\0" /* 38219 */ - "GB_MACROTILE_MODE0\0" /* 38234 */ - "GB_MACROTILE_MODE1\0" /* 38253 */ - "GB_MACROTILE_MODE2\0" /* 38272 */ - "GB_MACROTILE_MODE3\0" /* 38291 */ - "GB_MACROTILE_MODE4\0" /* 38310 */ - "GB_MACROTILE_MODE5\0" /* 38329 */ - "GB_MACROTILE_MODE6\0" /* 38348 */ - "GB_MACROTILE_MODE7\0" /* 38367 */ - "GB_MACROTILE_MODE8\0" /* 38386 */ - "GB_MACROTILE_MODE9\0" /* 38405 */ - "GB_MACROTILE_MODE10\0" /* 38424 */ - "GB_MACROTILE_MODE11\0" /* 38444 */ - "GB_MACROTILE_MODE12\0" /* 38464 */ - "GB_MACROTILE_MODE13\0" /* 38484 */ - "GB_MACROTILE_MODE14\0" /* 38504 */ - "GB_MACROTILE_MODE15\0" /* 38524 */ - "SPI_SHADER_TBA_LO_PS\0" /* 38544 */ - "SPI_SHADER_TBA_HI_PS\0" /* 38565 */ - "SPI_SHADER_TMA_LO_PS\0" /* 38586 */ - "SPI_SHADER_TMA_HI_PS\0" /* 38607 */ - "SPI_SHADER_PGM_RSRC3_PS\0" /* 38628 */ - "SPI_SHADER_PGM_LO_PS\0" /* 38652 */ - "SPI_SHADER_PGM_HI_PS\0" /* 38673 */ - "SPI_SHADER_PGM_RSRC1_PS\0" /* 38694 */ - "SPI_SHADER_PGM_RSRC2_PS\0" /* 38718 */ - "SPI_SHADER_USER_DATA_PS_0\0" /* 38742 */ - "SPI_SHADER_USER_DATA_PS_1\0" /* 38768 */ - "SPI_SHADER_USER_DATA_PS_2\0" /* 38794 */ - "SPI_SHADER_USER_DATA_PS_3\0" /* 38820 */ - "SPI_SHADER_USER_DATA_PS_4\0" /* 38846 */ - "SPI_SHADER_USER_DATA_PS_5\0" /* 38872 */ - "SPI_SHADER_USER_DATA_PS_6\0" /* 38898 */ - "SPI_SHADER_USER_DATA_PS_7\0" /* 38924 */ - "SPI_SHADER_USER_DATA_PS_8\0" /* 38950 */ - "SPI_SHADER_USER_DATA_PS_9\0" /* 38976 */ - "SPI_SHADER_USER_DATA_PS_10\0" /* 39002 */ - "SPI_SHADER_USER_DATA_PS_11\0" /* 39029 */ - "SPI_SHADER_USER_DATA_PS_12\0" /* 39056 */ - "SPI_SHADER_USER_DATA_PS_13\0" /* 39083 */ - "SPI_SHADER_USER_DATA_PS_14\0" /* 39110 */ - "SPI_SHADER_USER_DATA_PS_15\0" /* 39137 */ - "SPI_SHADER_TBA_LO_VS\0" /* 39164 */ - "SPI_SHADER_TBA_HI_VS\0" /* 39185 */ - "SPI_SHADER_TMA_LO_VS\0" /* 39206 */ - "SPI_SHADER_TMA_HI_VS\0" /* 39227 */ - "SPI_SHADER_PGM_RSRC3_VS\0" /* 39248 */ - "SPI_SHADER_LATE_ALLOC_VS\0" /* 39272 */ - "SPI_SHADER_PGM_LO_VS\0" /* 39297 */ - "SPI_SHADER_PGM_HI_VS\0" /* 39318 */ - "SPI_SHADER_PGM_RSRC1_VS\0" /* 39339 */ - "SPI_SHADER_PGM_RSRC2_VS\0" /* 39363 */ - "SPI_SHADER_USER_DATA_VS_0\0" /* 39387 */ - "SPI_SHADER_USER_DATA_VS_1\0" /* 39413 */ - "SPI_SHADER_USER_DATA_VS_2\0" /* 39439 */ - "SPI_SHADER_USER_DATA_VS_3\0" /* 39465 */ - "SPI_SHADER_USER_DATA_VS_4\0" /* 39491 */ - "SPI_SHADER_USER_DATA_VS_5\0" /* 39517 */ - "SPI_SHADER_USER_DATA_VS_6\0" /* 39543 */ - "SPI_SHADER_USER_DATA_VS_7\0" /* 39569 */ - "SPI_SHADER_USER_DATA_VS_8\0" /* 39595 */ - "SPI_SHADER_USER_DATA_VS_9\0" /* 39621 */ - "SPI_SHADER_USER_DATA_VS_10\0" /* 39647 */ - "SPI_SHADER_USER_DATA_VS_11\0" /* 39674 */ - "SPI_SHADER_USER_DATA_VS_12\0" /* 39701 */ - "SPI_SHADER_USER_DATA_VS_13\0" /* 39728 */ - "SPI_SHADER_USER_DATA_VS_14\0" /* 39755 */ - "SPI_SHADER_USER_DATA_VS_15\0" /* 39782 */ - "SPI_SHADER_TBA_LO_GS\0" /* 39809 */ - "SPI_SHADER_TBA_HI_GS\0" /* 39830 */ - "SPI_SHADER_TMA_LO_GS\0" /* 39851 */ - "SPI_SHADER_TMA_HI_GS\0" /* 39872 */ - "SPI_SHADER_PGM_RSRC3_GS\0" /* 39893 */ - "SPI_SHADER_PGM_LO_GS\0" /* 39917 */ - "SPI_SHADER_PGM_HI_GS\0" /* 39938 */ - "SPI_SHADER_PGM_RSRC1_GS\0" /* 39959 */ - "SPI_SHADER_PGM_RSRC2_GS\0" /* 39983 */ - "SPI_SHADER_USER_DATA_GS_0\0" /* 40007 */ - "SPI_SHADER_USER_DATA_GS_1\0" /* 40033 */ - "SPI_SHADER_USER_DATA_GS_2\0" /* 40059 */ - "SPI_SHADER_USER_DATA_GS_3\0" /* 40085 */ - "SPI_SHADER_USER_DATA_GS_4\0" /* 40111 */ - "SPI_SHADER_USER_DATA_GS_5\0" /* 40137 */ - "SPI_SHADER_USER_DATA_GS_6\0" /* 40163 */ - "SPI_SHADER_USER_DATA_GS_7\0" /* 40189 */ - "SPI_SHADER_USER_DATA_GS_8\0" /* 40215 */ - "SPI_SHADER_USER_DATA_GS_9\0" /* 40241 */ - "SPI_SHADER_USER_DATA_GS_10\0" /* 40267 */ - "SPI_SHADER_USER_DATA_GS_11\0" /* 40294 */ - "SPI_SHADER_USER_DATA_GS_12\0" /* 40321 */ - "SPI_SHADER_USER_DATA_GS_13\0" /* 40348 */ - "SPI_SHADER_USER_DATA_GS_14\0" /* 40375 */ - "SPI_SHADER_USER_DATA_GS_15\0" /* 40402 */ - "SPI_SHADER_TBA_LO_ES\0" /* 40429 */ - "SPI_SHADER_TBA_HI_ES\0" /* 40450 */ - "SPI_SHADER_TMA_LO_ES\0" /* 40471 */ - "SPI_SHADER_TMA_HI_ES\0" /* 40492 */ - "SPI_SHADER_PGM_RSRC3_ES\0" /* 40513 */ - "SPI_SHADER_PGM_LO_ES\0" /* 40537 */ - "SPI_SHADER_PGM_HI_ES\0" /* 40558 */ - "SPI_SHADER_PGM_RSRC1_ES\0" /* 40579 */ - "SPI_SHADER_PGM_RSRC2_ES\0" /* 40603 */ - "SPI_SHADER_USER_DATA_ES_0\0" /* 40627 */ - "SPI_SHADER_USER_DATA_ES_1\0" /* 40653 */ - "SPI_SHADER_USER_DATA_ES_2\0" /* 40679 */ - "SPI_SHADER_USER_DATA_ES_3\0" /* 40705 */ - "SPI_SHADER_USER_DATA_ES_4\0" /* 40731 */ - "SPI_SHADER_USER_DATA_ES_5\0" /* 40757 */ - "SPI_SHADER_USER_DATA_ES_6\0" /* 40783 */ - "SPI_SHADER_USER_DATA_ES_7\0" /* 40809 */ - "SPI_SHADER_USER_DATA_ES_8\0" /* 40835 */ - "SPI_SHADER_USER_DATA_ES_9\0" /* 40861 */ - "SPI_SHADER_USER_DATA_ES_10\0" /* 40887 */ - "SPI_SHADER_USER_DATA_ES_11\0" /* 40914 */ - "SPI_SHADER_USER_DATA_ES_12\0" /* 40941 */ - "SPI_SHADER_USER_DATA_ES_13\0" /* 40968 */ - "SPI_SHADER_USER_DATA_ES_14\0" /* 40995 */ - "SPI_SHADER_USER_DATA_ES_15\0" /* 41022 */ - "SPI_SHADER_TBA_LO_HS\0" /* 41049 */ - "SPI_SHADER_TBA_HI_HS\0" /* 41070 */ - "SPI_SHADER_TMA_LO_HS\0" /* 41091 */ - "SPI_SHADER_TMA_HI_HS\0" /* 41112 */ - "SPI_SHADER_PGM_RSRC3_HS\0" /* 41133 */ - "SPI_SHADER_PGM_LO_HS\0" /* 41157 */ - "SPI_SHADER_PGM_HI_HS\0" /* 41178 */ - "SPI_SHADER_PGM_RSRC1_HS\0" /* 41199 */ - "SPI_SHADER_PGM_RSRC2_HS\0" /* 41223 */ - "SPI_SHADER_USER_DATA_HS_0\0" /* 41247 */ - "SPI_SHADER_USER_DATA_HS_1\0" /* 41273 */ - "SPI_SHADER_USER_DATA_HS_2\0" /* 41299 */ - "SPI_SHADER_USER_DATA_HS_3\0" /* 41325 */ - "SPI_SHADER_USER_DATA_HS_4\0" /* 41351 */ - "SPI_SHADER_USER_DATA_HS_5\0" /* 41377 */ - "SPI_SHADER_USER_DATA_HS_6\0" /* 41403 */ - "SPI_SHADER_USER_DATA_HS_7\0" /* 41429 */ - "SPI_SHADER_USER_DATA_HS_8\0" /* 41455 */ - "SPI_SHADER_USER_DATA_HS_9\0" /* 41481 */ - "SPI_SHADER_USER_DATA_HS_10\0" /* 41507 */ - "SPI_SHADER_USER_DATA_HS_11\0" /* 41534 */ - "SPI_SHADER_USER_DATA_HS_12\0" /* 41561 */ - "SPI_SHADER_USER_DATA_HS_13\0" /* 41588 */ - "SPI_SHADER_USER_DATA_HS_14\0" /* 41615 */ - "SPI_SHADER_USER_DATA_HS_15\0" /* 41642 */ - "SPI_SHADER_TBA_LO_LS\0" /* 41669 */ - "SPI_SHADER_TBA_HI_LS\0" /* 41690 */ - "SPI_SHADER_TMA_LO_LS\0" /* 41711 */ - "SPI_SHADER_TMA_HI_LS\0" /* 41732 */ - "SPI_SHADER_PGM_RSRC3_LS\0" /* 41753 */ - "SPI_SHADER_PGM_LO_LS\0" /* 41777 */ - "SPI_SHADER_PGM_HI_LS\0" /* 41798 */ - "SPI_SHADER_PGM_RSRC1_LS\0" /* 41819 */ - "SPI_SHADER_PGM_RSRC2_LS\0" /* 41843 */ - "SPI_SHADER_USER_DATA_LS_0\0" /* 41867 */ - "SPI_SHADER_USER_DATA_LS_1\0" /* 41893 */ - "SPI_SHADER_USER_DATA_LS_2\0" /* 41919 */ - "SPI_SHADER_USER_DATA_LS_3\0" /* 41945 */ - "SPI_SHADER_USER_DATA_LS_4\0" /* 41971 */ - "SPI_SHADER_USER_DATA_LS_5\0" /* 41997 */ - "SPI_SHADER_USER_DATA_LS_6\0" /* 42023 */ - "SPI_SHADER_USER_DATA_LS_7\0" /* 42049 */ - "SPI_SHADER_USER_DATA_LS_8\0" /* 42075 */ - "SPI_SHADER_USER_DATA_LS_9\0" /* 42101 */ - "SPI_SHADER_USER_DATA_LS_10\0" /* 42127 */ - "SPI_SHADER_USER_DATA_LS_11\0" /* 42154 */ - "SPI_SHADER_USER_DATA_LS_12\0" /* 42181 */ - "SPI_SHADER_USER_DATA_LS_13\0" /* 42208 */ - "SPI_SHADER_USER_DATA_LS_14\0" /* 42235 */ - "SPI_SHADER_USER_DATA_LS_15\0" /* 42262 */ - "COMPUTE_DISPATCH_INITIATOR\0" /* 42289 */ - "COMPUTE_DIM_X\0" /* 42316 */ - "COMPUTE_DIM_Y\0" /* 42330 */ - "COMPUTE_DIM_Z\0" /* 42344 */ - "COMPUTE_START_X\0" /* 42358 */ - "COMPUTE_START_Y\0" /* 42374 */ - "COMPUTE_START_Z\0" /* 42390 */ - "COMPUTE_NUM_THREAD_X\0" /* 42406 */ - "COMPUTE_NUM_THREAD_Y\0" /* 42427 */ - "COMPUTE_NUM_THREAD_Z\0" /* 42448 */ - "COMPUTE_MAX_WAVE_ID\0" /* 42469 */ - "COMPUTE_PIPELINESTAT_ENABLE\0" /* 42489 */ - "COMPUTE_PERFCOUNT_ENABLE\0" /* 42517 */ - "COMPUTE_PGM_LO\0" /* 42542 */ - "COMPUTE_PGM_HI\0" /* 42557 */ - "COMPUTE_TBA_LO\0" /* 42572 */ - "COMPUTE_TBA_HI\0" /* 42587 */ - "COMPUTE_TMA_LO\0" /* 42602 */ - "COMPUTE_TMA_HI\0" /* 42617 */ - "COMPUTE_PGM_RSRC1\0" /* 42632 */ - "COMPUTE_PGM_RSRC2\0" /* 42650 */ - "COMPUTE_VMID\0" /* 42668 */ - "COMPUTE_RESOURCE_LIMITS\0" /* 42681 */ - "COMPUTE_STATIC_THREAD_MGMT_SE0\0" /* 42705 */ - "COMPUTE_STATIC_THREAD_MGMT_SE1\0" /* 42736 */ - "COMPUTE_TMPRING_SIZE\0" /* 42767 */ - "COMPUTE_STATIC_THREAD_MGMT_SE2\0" /* 42788 */ - "COMPUTE_STATIC_THREAD_MGMT_SE3\0" /* 42819 */ - "COMPUTE_RESTART_X\0" /* 42850 */ - "COMPUTE_RESTART_Y\0" /* 42868 */ - "COMPUTE_RESTART_Z\0" /* 42886 */ - "COMPUTE_MISC_RESERVED\0" /* 42904 */ - "COMPUTE_DISPATCH_ID\0" /* 42926 */ - "COMPUTE_THREADGROUP_ID\0" /* 42946 */ - "COMPUTE_RELAUNCH\0" /* 42969 */ - "COMPUTE_WAVE_RESTORE_ADDR_LO\0" /* 42986 */ - "COMPUTE_WAVE_RESTORE_ADDR_HI\0" /* 43015 */ - "COMPUTE_WAVE_RESTORE_CONTROL\0" /* 43044 */ - "COMPUTE_USER_DATA_0\0" /* 43073 */ - "COMPUTE_USER_DATA_1\0" /* 43093 */ - "COMPUTE_USER_DATA_2\0" /* 43113 */ - "COMPUTE_USER_DATA_3\0" /* 43133 */ - "COMPUTE_USER_DATA_4\0" /* 43153 */ - "COMPUTE_USER_DATA_5\0" /* 43173 */ - "COMPUTE_USER_DATA_6\0" /* 43193 */ - "COMPUTE_USER_DATA_7\0" /* 43213 */ - "COMPUTE_USER_DATA_8\0" /* 43233 */ - "COMPUTE_USER_DATA_9\0" /* 43253 */ - "COMPUTE_USER_DATA_10\0" /* 43273 */ - "COMPUTE_USER_DATA_11\0" /* 43294 */ - "COMPUTE_USER_DATA_12\0" /* 43315 */ - "COMPUTE_USER_DATA_13\0" /* 43336 */ - "COMPUTE_USER_DATA_14\0" /* 43357 */ - "COMPUTE_USER_DATA_15\0" /* 43378 */ - "COMPUTE_NOWHERE\0" /* 43399 */ - "CPG_PERFCOUNTER1_LO\0" /* 43415 */ - "CPG_PERFCOUNTER1_HI\0" /* 43435 */ - "CPG_PERFCOUNTER0_LO\0" /* 43455 */ - "CPG_PERFCOUNTER0_HI\0" /* 43475 */ - "CPC_PERFCOUNTER1_LO\0" /* 43495 */ - "CPC_PERFCOUNTER1_HI\0" /* 43515 */ - "CPC_PERFCOUNTER0_LO\0" /* 43535 */ - "CPC_PERFCOUNTER0_HI\0" /* 43555 */ - "CPF_PERFCOUNTER1_LO\0" /* 43575 */ - "CPF_PERFCOUNTER1_HI\0" /* 43595 */ - "CPF_PERFCOUNTER0_LO\0" /* 43615 */ - "CPF_PERFCOUNTER0_HI\0" /* 43635 */ - "GRBM_PERFCOUNTER0_LO\0" /* 43655 */ - "GRBM_PERFCOUNTER0_HI\0" /* 43676 */ - "GRBM_PERFCOUNTER1_LO\0" /* 43697 */ - "GRBM_PERFCOUNTER1_HI\0" /* 43718 */ - "GRBM_SE0_PERFCOUNTER_LO\0" /* 43739 */ - "GRBM_SE0_PERFCOUNTER_HI\0" /* 43763 */ - "GRBM_SE1_PERFCOUNTER_LO\0" /* 43787 */ - "GRBM_SE1_PERFCOUNTER_HI\0" /* 43811 */ - "GRBM_SE2_PERFCOUNTER_LO\0" /* 43835 */ - "GRBM_SE2_PERFCOUNTER_HI\0" /* 43859 */ - "GRBM_SE3_PERFCOUNTER_LO\0" /* 43883 */ - "GRBM_SE3_PERFCOUNTER_HI\0" /* 43907 */ - "WD_PERFCOUNTER0_LO\0" /* 43931 */ - "WD_PERFCOUNTER0_HI\0" /* 43950 */ - "WD_PERFCOUNTER1_LO\0" /* 43969 */ - "WD_PERFCOUNTER1_HI\0" /* 43988 */ - "WD_PERFCOUNTER2_LO\0" /* 44007 */ - "WD_PERFCOUNTER2_HI\0" /* 44026 */ - "WD_PERFCOUNTER3_LO\0" /* 44045 */ - "WD_PERFCOUNTER3_HI\0" /* 44064 */ - "IA_PERFCOUNTER0_LO\0" /* 44083 */ - "IA_PERFCOUNTER0_HI\0" /* 44102 */ - "IA_PERFCOUNTER1_LO\0" /* 44121 */ - "IA_PERFCOUNTER1_HI\0" /* 44140 */ - "IA_PERFCOUNTER2_LO\0" /* 44159 */ - "IA_PERFCOUNTER2_HI\0" /* 44178 */ - "IA_PERFCOUNTER3_LO\0" /* 44197 */ - "IA_PERFCOUNTER3_HI\0" /* 44216 */ - "VGT_PERFCOUNTER0_LO\0" /* 44235 */ - "VGT_PERFCOUNTER0_HI\0" /* 44255 */ - "VGT_PERFCOUNTER1_LO\0" /* 44275 */ - "VGT_PERFCOUNTER1_HI\0" /* 44295 */ - "VGT_PERFCOUNTER2_LO\0" /* 44315 */ - "VGT_PERFCOUNTER2_HI\0" /* 44335 */ - "VGT_PERFCOUNTER3_LO\0" /* 44355 */ - "VGT_PERFCOUNTER3_HI\0" /* 44375 */ - "PA_SU_PERFCOUNTER0_LO\0" /* 44395 */ - "PA_SU_PERFCOUNTER0_HI\0" /* 44417 */ - "PA_SU_PERFCOUNTER1_LO\0" /* 44439 */ - "PA_SU_PERFCOUNTER1_HI\0" /* 44461 */ - "PA_SU_PERFCOUNTER2_LO\0" /* 44483 */ - "PA_SU_PERFCOUNTER2_HI\0" /* 44505 */ - "PA_SU_PERFCOUNTER3_LO\0" /* 44527 */ - "PA_SU_PERFCOUNTER3_HI\0" /* 44549 */ - "PA_SC_PERFCOUNTER0_LO\0" /* 44571 */ - "PA_SC_PERFCOUNTER0_HI\0" /* 44593 */ - "PA_SC_PERFCOUNTER1_LO\0" /* 44615 */ - "PA_SC_PERFCOUNTER1_HI\0" /* 44637 */ - "PA_SC_PERFCOUNTER2_LO\0" /* 44659 */ - "PA_SC_PERFCOUNTER2_HI\0" /* 44681 */ - "PA_SC_PERFCOUNTER3_LO\0" /* 44703 */ - "PA_SC_PERFCOUNTER3_HI\0" /* 44725 */ - "PA_SC_PERFCOUNTER4_LO\0" /* 44747 */ - "PA_SC_PERFCOUNTER4_HI\0" /* 44769 */ - "PA_SC_PERFCOUNTER5_LO\0" /* 44791 */ - "PA_SC_PERFCOUNTER5_HI\0" /* 44813 */ - "PA_SC_PERFCOUNTER6_LO\0" /* 44835 */ - "PA_SC_PERFCOUNTER6_HI\0" /* 44857 */ - "PA_SC_PERFCOUNTER7_LO\0" /* 44879 */ - "PA_SC_PERFCOUNTER7_HI\0" /* 44901 */ - "SPI_PERFCOUNTER0_HI\0" /* 44923 */ - "SPI_PERFCOUNTER0_LO\0" /* 44943 */ - "SPI_PERFCOUNTER1_HI\0" /* 44963 */ - "SPI_PERFCOUNTER1_LO\0" /* 44983 */ - "SPI_PERFCOUNTER2_HI\0" /* 45003 */ - "SPI_PERFCOUNTER2_LO\0" /* 45023 */ - "SPI_PERFCOUNTER3_HI\0" /* 45043 */ - "SPI_PERFCOUNTER3_LO\0" /* 45063 */ - "SPI_PERFCOUNTER4_HI\0" /* 45083 */ - "SPI_PERFCOUNTER4_LO\0" /* 45103 */ - "SPI_PERFCOUNTER5_HI\0" /* 45123 */ - "SPI_PERFCOUNTER5_LO\0" /* 45143 */ - "SQ_PERFCOUNTER0_LO\0" /* 45163 */ - "SQ_PERFCOUNTER0_HI\0" /* 45182 */ - "SQ_PERFCOUNTER1_LO\0" /* 45201 */ - "SQ_PERFCOUNTER1_HI\0" /* 45220 */ - "SQ_PERFCOUNTER2_LO\0" /* 45239 */ - "SQ_PERFCOUNTER2_HI\0" /* 45258 */ - "SQ_PERFCOUNTER3_LO\0" /* 45277 */ - "SQ_PERFCOUNTER3_HI\0" /* 45296 */ - "SQ_PERFCOUNTER4_LO\0" /* 45315 */ - "SQ_PERFCOUNTER4_HI\0" /* 45334 */ - "SQ_PERFCOUNTER5_LO\0" /* 45353 */ - "SQ_PERFCOUNTER5_HI\0" /* 45372 */ - "SQ_PERFCOUNTER6_LO\0" /* 45391 */ - "SQ_PERFCOUNTER6_HI\0" /* 45410 */ - "SQ_PERFCOUNTER7_LO\0" /* 45429 */ - "SQ_PERFCOUNTER7_HI\0" /* 45448 */ - "SQ_PERFCOUNTER8_LO\0" /* 45467 */ - "SQ_PERFCOUNTER8_HI\0" /* 45486 */ - "SQ_PERFCOUNTER9_LO\0" /* 45505 */ - "SQ_PERFCOUNTER9_HI\0" /* 45524 */ - "SQ_PERFCOUNTER10_LO\0" /* 45543 */ - "SQ_PERFCOUNTER10_HI\0" /* 45563 */ - "SQ_PERFCOUNTER11_LO\0" /* 45583 */ - "SQ_PERFCOUNTER11_HI\0" /* 45603 */ - "SQ_PERFCOUNTER12_LO\0" /* 45623 */ - "SQ_PERFCOUNTER12_HI\0" /* 45643 */ - "SQ_PERFCOUNTER13_LO\0" /* 45663 */ - "SQ_PERFCOUNTER13_HI\0" /* 45683 */ - "SQ_PERFCOUNTER14_LO\0" /* 45703 */ - "SQ_PERFCOUNTER14_HI\0" /* 45723 */ - "SQ_PERFCOUNTER15_LO\0" /* 45743 */ - "SQ_PERFCOUNTER15_HI\0" /* 45763 */ - "SX_PERFCOUNTER0_LO\0" /* 45783 */ - "SX_PERFCOUNTER0_HI\0" /* 45802 */ - "SX_PERFCOUNTER1_LO\0" /* 45821 */ - "SX_PERFCOUNTER1_HI\0" /* 45840 */ - "SX_PERFCOUNTER2_LO\0" /* 45859 */ - "SX_PERFCOUNTER2_HI\0" /* 45878 */ - "SX_PERFCOUNTER3_LO\0" /* 45897 */ - "SX_PERFCOUNTER3_HI\0" /* 45916 */ - "GDS_PERFCOUNTER0_LO\0" /* 45935 */ - "GDS_PERFCOUNTER0_HI\0" /* 45955 */ - "GDS_PERFCOUNTER1_LO\0" /* 45975 */ - "GDS_PERFCOUNTER1_HI\0" /* 45995 */ - "GDS_PERFCOUNTER2_LO\0" /* 46015 */ - "GDS_PERFCOUNTER2_HI\0" /* 46035 */ - "GDS_PERFCOUNTER3_LO\0" /* 46055 */ - "GDS_PERFCOUNTER3_HI\0" /* 46075 */ - "TA_PERFCOUNTER0_LO\0" /* 46095 */ - "TA_PERFCOUNTER0_HI\0" /* 46114 */ - "TA_PERFCOUNTER1_LO\0" /* 46133 */ - "TA_PERFCOUNTER1_HI\0" /* 46152 */ - "TD_PERFCOUNTER0_LO\0" /* 46171 */ - "TD_PERFCOUNTER0_HI\0" /* 46190 */ - "TD_PERFCOUNTER1_LO\0" /* 46209 */ - "TD_PERFCOUNTER1_HI\0" /* 46228 */ - "TCP_PERFCOUNTER0_LO\0" /* 46247 */ - "TCP_PERFCOUNTER0_HI\0" /* 46267 */ - "TCP_PERFCOUNTER1_LO\0" /* 46287 */ - "TCP_PERFCOUNTER1_HI\0" /* 46307 */ - "TCP_PERFCOUNTER2_LO\0" /* 46327 */ - "TCP_PERFCOUNTER2_HI\0" /* 46347 */ - "TCP_PERFCOUNTER3_LO\0" /* 46367 */ - "TCP_PERFCOUNTER3_HI\0" /* 46387 */ - "TCC_PERFCOUNTER0_LO\0" /* 46407 */ - "TCC_PERFCOUNTER0_HI\0" /* 46427 */ - "TCC_PERFCOUNTER1_LO\0" /* 46447 */ - "TCC_PERFCOUNTER1_HI\0" /* 46467 */ - "TCC_PERFCOUNTER2_LO\0" /* 46487 */ - "TCC_PERFCOUNTER2_HI\0" /* 46507 */ - "TCC_PERFCOUNTER3_LO\0" /* 46527 */ - "TCC_PERFCOUNTER3_HI\0" /* 46547 */ - "TCA_PERFCOUNTER0_LO\0" /* 46567 */ - "TCA_PERFCOUNTER0_HI\0" /* 46587 */ - "TCA_PERFCOUNTER1_LO\0" /* 46607 */ - "TCA_PERFCOUNTER1_HI\0" /* 46627 */ - "TCA_PERFCOUNTER2_LO\0" /* 46647 */ - "TCA_PERFCOUNTER2_HI\0" /* 46667 */ - "TCA_PERFCOUNTER3_LO\0" /* 46687 */ - "TCA_PERFCOUNTER3_HI\0" /* 46707 */ - "CB_PERFCOUNTER0_LO\0" /* 46727 */ - "CB_PERFCOUNTER0_HI\0" /* 46746 */ - "CB_PERFCOUNTER1_LO\0" /* 46765 */ - "CB_PERFCOUNTER1_HI\0" /* 46784 */ - "CB_PERFCOUNTER2_LO\0" /* 46803 */ - "CB_PERFCOUNTER2_HI\0" /* 46822 */ - "CB_PERFCOUNTER3_LO\0" /* 46841 */ - "CB_PERFCOUNTER3_HI\0" /* 46860 */ - "DB_PERFCOUNTER0_LO\0" /* 46879 */ - "DB_PERFCOUNTER0_HI\0" /* 46898 */ - "DB_PERFCOUNTER1_LO\0" /* 46917 */ - "DB_PERFCOUNTER1_HI\0" /* 46936 */ - "DB_PERFCOUNTER2_LO\0" /* 46955 */ - "DB_PERFCOUNTER2_HI\0" /* 46974 */ - "DB_PERFCOUNTER3_LO\0" /* 46993 */ - "DB_PERFCOUNTER3_HI\0" /* 47012 */ - "RLC_PERFCOUNTER0_LO\0" /* 47031 */ - "RLC_PERFCOUNTER0_HI\0" /* 47051 */ - "RLC_PERFCOUNTER1_LO\0" /* 47071 */ - "RLC_PERFCOUNTER1_HI\0" /* 47091 */ - "CPG_PERFCOUNTER1_SELECT\0" /* 47111 */ - "CPG_PERFCOUNTER0_SELECT1\0" /* 47135 */ - "CPG_PERFCOUNTER0_SELECT\0" /* 47160 */ - "CPC_PERFCOUNTER1_SELECT\0" /* 47184 */ - "CPC_PERFCOUNTER0_SELECT1\0" /* 47208 */ - "CPF_PERFCOUNTER1_SELECT\0" /* 47233 */ - "CPF_PERFCOUNTER0_SELECT1\0" /* 47257 */ - "CPF_PERFCOUNTER0_SELECT\0" /* 47282 */ - "CP_PERFMON_CNTL\0" /* 47306 */ - "CPC_PERFCOUNTER0_SELECT\0" /* 47322 */ - "GRBM_PERFCOUNTER0_SELECT\0" /* 47346 */ - "GRBM_PERFCOUNTER1_SELECT\0" /* 47371 */ - "GRBM_SE0_PERFCOUNTER_SELECT\0" /* 47396 */ - "GRBM_SE1_PERFCOUNTER_SELECT\0" /* 47424 */ - "GRBM_SE2_PERFCOUNTER_SELECT\0" /* 47452 */ - "GRBM_SE3_PERFCOUNTER_SELECT\0" /* 47480 */ - "WD_PERFCOUNTER0_SELECT\0" /* 47508 */ - "WD_PERFCOUNTER1_SELECT\0" /* 47531 */ - "WD_PERFCOUNTER2_SELECT\0" /* 47554 */ - "WD_PERFCOUNTER3_SELECT\0" /* 47577 */ - "IA_PERFCOUNTER0_SELECT\0" /* 47600 */ - "IA_PERFCOUNTER1_SELECT\0" /* 47623 */ - "IA_PERFCOUNTER2_SELECT\0" /* 47646 */ - "IA_PERFCOUNTER3_SELECT\0" /* 47669 */ - "IA_PERFCOUNTER0_SELECT1\0" /* 47692 */ - "VGT_PERFCOUNTER0_SELECT\0" /* 47716 */ - "VGT_PERFCOUNTER1_SELECT\0" /* 47740 */ - "VGT_PERFCOUNTER2_SELECT\0" /* 47764 */ - "VGT_PERFCOUNTER3_SELECT\0" /* 47788 */ - "VGT_PERFCOUNTER0_SELECT1\0" /* 47812 */ - "VGT_PERFCOUNTER1_SELECT1\0" /* 47837 */ - "VGT_PERFCOUNTER_SEID_MASK\0" /* 47862 */ - "PA_SU_PERFCOUNTER0_SELECT\0" /* 47888 */ - "PA_SU_PERFCOUNTER0_SELECT1\0" /* 47914 */ - "PA_SU_PERFCOUNTER1_SELECT\0" /* 47941 */ - "PA_SU_PERFCOUNTER1_SELECT1\0" /* 47967 */ - "PA_SU_PERFCOUNTER2_SELECT\0" /* 47994 */ - "PA_SU_PERFCOUNTER3_SELECT\0" /* 48020 */ - "PA_SC_PERFCOUNTER0_SELECT\0" /* 48046 */ - "PA_SC_PERFCOUNTER0_SELECT1\0" /* 48072 */ - "PA_SC_PERFCOUNTER1_SELECT\0" /* 48099 */ - "PA_SC_PERFCOUNTER2_SELECT\0" /* 48125 */ - "PA_SC_PERFCOUNTER3_SELECT\0" /* 48151 */ - "PA_SC_PERFCOUNTER4_SELECT\0" /* 48177 */ - "PA_SC_PERFCOUNTER5_SELECT\0" /* 48203 */ - "PA_SC_PERFCOUNTER6_SELECT\0" /* 48229 */ - "PA_SC_PERFCOUNTER7_SELECT\0" /* 48255 */ - "SPI_PERFCOUNTER0_SELECT\0" /* 48281 */ - "SPI_PERFCOUNTER1_SELECT\0" /* 48305 */ - "SPI_PERFCOUNTER2_SELECT\0" /* 48329 */ - "SPI_PERFCOUNTER3_SELECT\0" /* 48353 */ - "SPI_PERFCOUNTER0_SELECT1\0" /* 48377 */ - "SPI_PERFCOUNTER1_SELECT1\0" /* 48402 */ - "SPI_PERFCOUNTER2_SELECT1\0" /* 48427 */ - "SPI_PERFCOUNTER3_SELECT1\0" /* 48452 */ - "SPI_PERFCOUNTER4_SELECT\0" /* 48477 */ - "SPI_PERFCOUNTER5_SELECT\0" /* 48501 */ - "SPI_PERFCOUNTER_BINS\0" /* 48525 */ - "SQ_PERFCOUNTER0_SELECT\0" /* 48546 */ - "SQ_PERFCOUNTER1_SELECT\0" /* 48569 */ - "SQ_PERFCOUNTER2_SELECT\0" /* 48592 */ - "SQ_PERFCOUNTER3_SELECT\0" /* 48615 */ - "SQ_PERFCOUNTER4_SELECT\0" /* 48638 */ - "SQ_PERFCOUNTER5_SELECT\0" /* 48661 */ - "SQ_PERFCOUNTER6_SELECT\0" /* 48684 */ - "SQ_PERFCOUNTER7_SELECT\0" /* 48707 */ - "SQ_PERFCOUNTER8_SELECT\0" /* 48730 */ - "SQ_PERFCOUNTER9_SELECT\0" /* 48753 */ - "SQ_PERFCOUNTER10_SELECT\0" /* 48776 */ - "SQ_PERFCOUNTER11_SELECT\0" /* 48800 */ - "SQ_PERFCOUNTER12_SELECT\0" /* 48824 */ - "SQ_PERFCOUNTER13_SELECT\0" /* 48848 */ - "SQ_PERFCOUNTER14_SELECT\0" /* 48872 */ - "SQ_PERFCOUNTER15_SELECT\0" /* 48896 */ - "SQ_PERFCOUNTER_CTRL\0" /* 48920 */ - "SQ_PERFCOUNTER_MASK\0" /* 48940 */ - "SQ_PERFCOUNTER_CTRL2\0" /* 48960 */ - "SX_PERFCOUNTER0_SELECT\0" /* 48981 */ - "SX_PERFCOUNTER1_SELECT\0" /* 49004 */ - "SX_PERFCOUNTER2_SELECT\0" /* 49027 */ - "SX_PERFCOUNTER3_SELECT\0" /* 49050 */ - "SX_PERFCOUNTER0_SELECT1\0" /* 49073 */ - "SX_PERFCOUNTER1_SELECT1\0" /* 49097 */ - "GDS_PERFCOUNTER0_SELECT\0" /* 49121 */ - "GDS_PERFCOUNTER1_SELECT\0" /* 49145 */ - "GDS_PERFCOUNTER2_SELECT\0" /* 49169 */ - "GDS_PERFCOUNTER3_SELECT\0" /* 49193 */ - "GDS_PERFCOUNTER0_SELECT1\0" /* 49217 */ - "TA_PERFCOUNTER0_SELECT\0" /* 49242 */ - "TA_PERFCOUNTER0_SELECT1\0" /* 49265 */ - "TA_PERFCOUNTER1_SELECT\0" /* 49289 */ - "TD_PERFCOUNTER0_SELECT\0" /* 49312 */ - "TD_PERFCOUNTER0_SELECT1\0" /* 49335 */ - "TD_PERFCOUNTER1_SELECT\0" /* 49359 */ - "TCP_PERFCOUNTER0_SELECT\0" /* 49382 */ - "TCP_PERFCOUNTER0_SELECT1\0" /* 49406 */ - "TCP_PERFCOUNTER1_SELECT\0" /* 49431 */ - "TCP_PERFCOUNTER1_SELECT1\0" /* 49455 */ - "TCP_PERFCOUNTER2_SELECT\0" /* 49480 */ - "TCP_PERFCOUNTER3_SELECT\0" /* 49504 */ - "TCC_PERFCOUNTER0_SELECT\0" /* 49528 */ - "TCC_PERFCOUNTER0_SELECT1\0" /* 49552 */ - "TCC_PERFCOUNTER1_SELECT\0" /* 49577 */ - "TCC_PERFCOUNTER1_SELECT1\0" /* 49601 */ - "TCC_PERFCOUNTER2_SELECT\0" /* 49626 */ - "TCC_PERFCOUNTER3_SELECT\0" /* 49650 */ - "TCA_PERFCOUNTER0_SELECT\0" /* 49674 */ - "TCA_PERFCOUNTER0_SELECT1\0" /* 49698 */ - "TCA_PERFCOUNTER1_SELECT\0" /* 49723 */ - "TCA_PERFCOUNTER1_SELECT1\0" /* 49747 */ - "TCA_PERFCOUNTER2_SELECT\0" /* 49772 */ - "TCA_PERFCOUNTER3_SELECT\0" /* 49796 */ - "CB_PERFCOUNTER_FILTER\0" /* 49820 */ - "CB_PERFCOUNTER0_SELECT\0" /* 49842 */ - "CB_PERFCOUNTER0_SELECT1\0" /* 49865 */ - "CB_PERFCOUNTER1_SELECT\0" /* 49889 */ - "CB_PERFCOUNTER2_SELECT\0" /* 49912 */ - "CB_PERFCOUNTER3_SELECT\0" /* 49935 */ - "DB_PERFCOUNTER0_SELECT\0" /* 49958 */ - "DB_PERFCOUNTER0_SELECT1\0" /* 49981 */ - "DB_PERFCOUNTER1_SELECT\0" /* 50005 */ - "DB_PERFCOUNTER1_SELECT1\0" /* 50028 */ - "DB_PERFCOUNTER2_SELECT\0" /* 50052 */ - "DB_PERFCOUNTER3_SELECT\0" /* 50075 */ - "DB_RENDER_CONTROL\0" /* 50098 */ - "DB_COUNT_CONTROL\0" /* 50116 */ - "DB_DEPTH_VIEW\0" /* 50133 */ - "DB_RENDER_OVERRIDE\0" /* 50147 */ - "DB_RENDER_OVERRIDE2\0" /* 50166 */ - "DB_HTILE_DATA_BASE\0" /* 50186 */ - "DB_DEPTH_BOUNDS_MIN\0" /* 50205 */ - "DB_DEPTH_BOUNDS_MAX\0" /* 50225 */ - "DB_STENCIL_CLEAR\0" /* 50245 */ - "DB_DEPTH_CLEAR\0" /* 50262 */ - "PA_SC_SCREEN_SCISSOR_TL\0" /* 50277 */ - "PA_SC_SCREEN_SCISSOR_BR\0" /* 50301 */ - "DB_DEPTH_INFO\0" /* 50325 */ - "DB_Z_INFO\0" /* 50339 */ - "DB_STENCIL_INFO\0" /* 50349 */ - "DB_Z_READ_BASE\0" /* 50365 */ - "DB_STENCIL_READ_BASE\0" /* 50380 */ - "DB_Z_WRITE_BASE\0" /* 50401 */ - "DB_STENCIL_WRITE_BASE\0" /* 50417 */ - "DB_DEPTH_SIZE\0" /* 50439 */ - "DB_DEPTH_SLICE\0" /* 50453 */ - "TA_BC_BASE_ADDR\0" /* 50468 */ - "TA_BC_BASE_ADDR_HI\0" /* 50484 */ - "COHER_DEST_BASE_HI_0\0" /* 50503 */ - "COHER_DEST_BASE_HI_1\0" /* 50524 */ - "COHER_DEST_BASE_HI_2\0" /* 50545 */ - "COHER_DEST_BASE_HI_3\0" /* 50566 */ - "COHER_DEST_BASE_2\0" /* 50587 */ - "COHER_DEST_BASE_3\0" /* 50605 */ - "PA_SC_WINDOW_OFFSET\0" /* 50623 */ - "PA_SC_WINDOW_SCISSOR_TL\0" /* 50643 */ - "PA_SC_WINDOW_SCISSOR_BR\0" /* 50667 */ - "PA_SC_CLIPRECT_RULE\0" /* 50691 */ - "PA_SC_CLIPRECT_0_TL\0" /* 50711 */ - "PA_SC_CLIPRECT_0_BR\0" /* 50731 */ - "PA_SC_CLIPRECT_1_TL\0" /* 50751 */ - "PA_SC_CLIPRECT_1_BR\0" /* 50771 */ - "PA_SC_CLIPRECT_2_TL\0" /* 50791 */ - "PA_SC_CLIPRECT_2_BR\0" /* 50811 */ - "PA_SC_CLIPRECT_3_TL\0" /* 50831 */ - "PA_SC_CLIPRECT_3_BR\0" /* 50851 */ - "PA_SC_EDGERULE\0" /* 50871 */ - "PA_SU_HARDWARE_SCREEN_OFFSET\0" /* 50886 */ - "CB_TARGET_MASK\0" /* 50915 */ - "CB_SHADER_MASK\0" /* 50930 */ - "PA_SC_GENERIC_SCISSOR_TL\0" /* 50945 */ - "PA_SC_GENERIC_SCISSOR_BR\0" /* 50970 */ - "COHER_DEST_BASE_0\0" /* 50995 */ - "COHER_DEST_BASE_1\0" /* 51013 */ - "PA_SC_VPORT_SCISSOR_0_TL\0" /* 51031 */ - "PA_SC_VPORT_SCISSOR_0_BR\0" /* 51056 */ - "PA_SC_VPORT_SCISSOR_1_TL\0" /* 51081 */ - "PA_SC_VPORT_SCISSOR_1_BR\0" /* 51106 */ - "PA_SC_VPORT_SCISSOR_2_TL\0" /* 51131 */ - "PA_SC_VPORT_SCISSOR_2_BR\0" /* 51156 */ - "PA_SC_VPORT_SCISSOR_3_TL\0" /* 51181 */ - "PA_SC_VPORT_SCISSOR_3_BR\0" /* 51206 */ - "PA_SC_VPORT_SCISSOR_4_TL\0" /* 51231 */ - "PA_SC_VPORT_SCISSOR_4_BR\0" /* 51256 */ - "PA_SC_VPORT_SCISSOR_5_TL\0" /* 51281 */ - "PA_SC_VPORT_SCISSOR_5_BR\0" /* 51306 */ - "PA_SC_VPORT_SCISSOR_6_TL\0" /* 51331 */ - "PA_SC_VPORT_SCISSOR_6_BR\0" /* 51356 */ - "PA_SC_VPORT_SCISSOR_7_TL\0" /* 51381 */ - "PA_SC_VPORT_SCISSOR_7_BR\0" /* 51406 */ - "PA_SC_VPORT_SCISSOR_8_TL\0" /* 51431 */ - "PA_SC_VPORT_SCISSOR_8_BR\0" /* 51456 */ - "PA_SC_VPORT_SCISSOR_9_TL\0" /* 51481 */ - "PA_SC_VPORT_SCISSOR_9_BR\0" /* 51506 */ - "PA_SC_VPORT_SCISSOR_10_TL\0" /* 51531 */ - "PA_SC_VPORT_SCISSOR_10_BR\0" /* 51557 */ - "PA_SC_VPORT_SCISSOR_11_TL\0" /* 51583 */ - "PA_SC_VPORT_SCISSOR_11_BR\0" /* 51609 */ - "PA_SC_VPORT_SCISSOR_12_TL\0" /* 51635 */ - "PA_SC_VPORT_SCISSOR_12_BR\0" /* 51661 */ - "PA_SC_VPORT_SCISSOR_13_TL\0" /* 51687 */ - "PA_SC_VPORT_SCISSOR_13_BR\0" /* 51713 */ - "PA_SC_VPORT_SCISSOR_14_TL\0" /* 51739 */ - "PA_SC_VPORT_SCISSOR_14_BR\0" /* 51765 */ - "PA_SC_VPORT_SCISSOR_15_TL\0" /* 51791 */ - "PA_SC_VPORT_SCISSOR_15_BR\0" /* 51817 */ - "PA_SC_VPORT_ZMIN_0\0" /* 51843 */ - "PA_SC_VPORT_ZMAX_0\0" /* 51862 */ - "PA_SC_VPORT_ZMIN_1\0" /* 51881 */ - "PA_SC_VPORT_ZMAX_1\0" /* 51900 */ - "PA_SC_VPORT_ZMIN_2\0" /* 51919 */ - "PA_SC_VPORT_ZMAX_2\0" /* 51938 */ - "PA_SC_VPORT_ZMIN_3\0" /* 51957 */ - "PA_SC_VPORT_ZMAX_3\0" /* 51976 */ - "PA_SC_VPORT_ZMIN_4\0" /* 51995 */ - "PA_SC_VPORT_ZMAX_4\0" /* 52014 */ - "PA_SC_VPORT_ZMIN_5\0" /* 52033 */ - "PA_SC_VPORT_ZMAX_5\0" /* 52052 */ - "PA_SC_VPORT_ZMIN_6\0" /* 52071 */ - "PA_SC_VPORT_ZMAX_6\0" /* 52090 */ - "PA_SC_VPORT_ZMIN_7\0" /* 52109 */ - "PA_SC_VPORT_ZMAX_7\0" /* 52128 */ - "PA_SC_VPORT_ZMIN_8\0" /* 52147 */ - "PA_SC_VPORT_ZMAX_8\0" /* 52166 */ - "PA_SC_VPORT_ZMIN_9\0" /* 52185 */ - "PA_SC_VPORT_ZMAX_9\0" /* 52204 */ - "PA_SC_VPORT_ZMIN_10\0" /* 52223 */ - "PA_SC_VPORT_ZMAX_10\0" /* 52243 */ - "PA_SC_VPORT_ZMIN_11\0" /* 52263 */ - "PA_SC_VPORT_ZMAX_11\0" /* 52283 */ - "PA_SC_VPORT_ZMIN_12\0" /* 52303 */ - "PA_SC_VPORT_ZMAX_12\0" /* 52323 */ - "PA_SC_VPORT_ZMIN_13\0" /* 52343 */ - "PA_SC_VPORT_ZMAX_13\0" /* 52363 */ - "PA_SC_VPORT_ZMIN_14\0" /* 52383 */ - "PA_SC_VPORT_ZMAX_14\0" /* 52403 */ - "PA_SC_VPORT_ZMIN_15\0" /* 52423 */ - "PA_SC_VPORT_ZMAX_15\0" /* 52443 */ - "PA_SC_RASTER_CONFIG\0" /* 52463 */ - "PA_SC_RASTER_CONFIG_1\0" /* 52483 */ - "PA_SC_SCREEN_EXTENT_CONTROL\0" /* 52505 */ - "VGT_MAX_VTX_INDX\0" /* 52533 */ - "VGT_MIN_VTX_INDX\0" /* 52550 */ - "VGT_INDX_OFFSET\0" /* 52567 */ - "VGT_MULTI_PRIM_IB_RESET_INDX\0" /* 52583 */ - "CB_BLEND_RED\0" /* 52612 */ - "CB_BLEND_GREEN\0" /* 52625 */ - "CB_BLEND_BLUE\0" /* 52640 */ - "CB_BLEND_ALPHA\0" /* 52654 */ - "CB_DCC_CONTROL\0" /* 52669 */ - "DB_STENCIL_CONTROL\0" /* 52684 */ - "DB_STENCILREFMASK\0" /* 52703 */ - "DB_STENCILREFMASK_BF\0" /* 52721 */ - "PA_CL_VPORT_XSCALE\0" /* 52742 */ - "PA_CL_VPORT_XOFFSET\0" /* 52761 */ - "PA_CL_VPORT_YSCALE\0" /* 52781 */ - "PA_CL_VPORT_YOFFSET\0" /* 52800 */ - "PA_CL_VPORT_ZSCALE\0" /* 52820 */ - "PA_CL_VPORT_ZOFFSET\0" /* 52839 */ - "PA_CL_VPORT_XSCALE_1\0" /* 52859 */ - "PA_CL_VPORT_XOFFSET_1\0" /* 52880 */ - "PA_CL_VPORT_YSCALE_1\0" /* 52902 */ - "PA_CL_VPORT_YOFFSET_1\0" /* 52923 */ - "PA_CL_VPORT_ZSCALE_1\0" /* 52945 */ - "PA_CL_VPORT_ZOFFSET_1\0" /* 52966 */ - "PA_CL_VPORT_XSCALE_2\0" /* 52988 */ - "PA_CL_VPORT_XOFFSET_2\0" /* 53009 */ - "PA_CL_VPORT_YSCALE_2\0" /* 53031 */ - "PA_CL_VPORT_YOFFSET_2\0" /* 53052 */ - "PA_CL_VPORT_ZSCALE_2\0" /* 53074 */ - "PA_CL_VPORT_ZOFFSET_2\0" /* 53095 */ - "PA_CL_VPORT_XSCALE_3\0" /* 53117 */ - "PA_CL_VPORT_XOFFSET_3\0" /* 53138 */ - "PA_CL_VPORT_YSCALE_3\0" /* 53160 */ - "PA_CL_VPORT_YOFFSET_3\0" /* 53181 */ - "PA_CL_VPORT_ZSCALE_3\0" /* 53203 */ - "PA_CL_VPORT_ZOFFSET_3\0" /* 53224 */ - "PA_CL_VPORT_XSCALE_4\0" /* 53246 */ - "PA_CL_VPORT_XOFFSET_4\0" /* 53267 */ - "PA_CL_VPORT_YSCALE_4\0" /* 53289 */ - "PA_CL_VPORT_YOFFSET_4\0" /* 53310 */ - "PA_CL_VPORT_ZSCALE_4\0" /* 53332 */ - "PA_CL_VPORT_ZOFFSET_4\0" /* 53353 */ - "PA_CL_VPORT_XSCALE_5\0" /* 53375 */ - "PA_CL_VPORT_XOFFSET_5\0" /* 53396 */ - "PA_CL_VPORT_YSCALE_5\0" /* 53418 */ - "PA_CL_VPORT_YOFFSET_5\0" /* 53439 */ - "PA_CL_VPORT_ZSCALE_5\0" /* 53461 */ - "PA_CL_VPORT_ZOFFSET_5\0" /* 53482 */ - "PA_CL_VPORT_XSCALE_6\0" /* 53504 */ - "PA_CL_VPORT_XOFFSET_6\0" /* 53525 */ - "PA_CL_VPORT_YSCALE_6\0" /* 53547 */ - "PA_CL_VPORT_YOFFSET_6\0" /* 53568 */ - "PA_CL_VPORT_ZSCALE_6\0" /* 53590 */ - "PA_CL_VPORT_ZOFFSET_6\0" /* 53611 */ - "PA_CL_VPORT_XSCALE_7\0" /* 53633 */ - "PA_CL_VPORT_XOFFSET_7\0" /* 53654 */ - "PA_CL_VPORT_YSCALE_7\0" /* 53676 */ - "PA_CL_VPORT_YOFFSET_7\0" /* 53697 */ - "PA_CL_VPORT_ZSCALE_7\0" /* 53719 */ - "PA_CL_VPORT_ZOFFSET_7\0" /* 53740 */ - "PA_CL_VPORT_XSCALE_8\0" /* 53762 */ - "PA_CL_VPORT_XOFFSET_8\0" /* 53783 */ - "PA_CL_VPORT_YSCALE_8\0" /* 53805 */ - "PA_CL_VPORT_YOFFSET_8\0" /* 53826 */ - "PA_CL_VPORT_ZSCALE_8\0" /* 53848 */ - "PA_CL_VPORT_ZOFFSET_8\0" /* 53869 */ - "PA_CL_VPORT_XSCALE_9\0" /* 53891 */ - "PA_CL_VPORT_XOFFSET_9\0" /* 53912 */ - "PA_CL_VPORT_YSCALE_9\0" /* 53934 */ - "PA_CL_VPORT_YOFFSET_9\0" /* 53955 */ - "PA_CL_VPORT_ZSCALE_9\0" /* 53977 */ - "PA_CL_VPORT_ZOFFSET_9\0" /* 53998 */ - "PA_CL_VPORT_XSCALE_10\0" /* 54020 */ - "PA_CL_VPORT_XOFFSET_10\0" /* 54042 */ - "PA_CL_VPORT_YSCALE_10\0" /* 54065 */ - "PA_CL_VPORT_YOFFSET_10\0" /* 54087 */ - "PA_CL_VPORT_ZSCALE_10\0" /* 54110 */ - "PA_CL_VPORT_ZOFFSET_10\0" /* 54132 */ - "PA_CL_VPORT_XSCALE_11\0" /* 54155 */ - "PA_CL_VPORT_XOFFSET_11\0" /* 54177 */ - "PA_CL_VPORT_YSCALE_11\0" /* 54200 */ - "PA_CL_VPORT_YOFFSET_11\0" /* 54222 */ - "PA_CL_VPORT_ZSCALE_11\0" /* 54245 */ - "PA_CL_VPORT_ZOFFSET_11\0" /* 54267 */ - "PA_CL_VPORT_XSCALE_12\0" /* 54290 */ - "PA_CL_VPORT_XOFFSET_12\0" /* 54312 */ - "PA_CL_VPORT_YSCALE_12\0" /* 54335 */ - "PA_CL_VPORT_YOFFSET_12\0" /* 54357 */ - "PA_CL_VPORT_ZSCALE_12\0" /* 54380 */ - "PA_CL_VPORT_ZOFFSET_12\0" /* 54402 */ - "PA_CL_VPORT_XSCALE_13\0" /* 54425 */ - "PA_CL_VPORT_XOFFSET_13\0" /* 54447 */ - "PA_CL_VPORT_YSCALE_13\0" /* 54470 */ - "PA_CL_VPORT_YOFFSET_13\0" /* 54492 */ - "PA_CL_VPORT_ZSCALE_13\0" /* 54515 */ - "PA_CL_VPORT_ZOFFSET_13\0" /* 54537 */ - "PA_CL_VPORT_XSCALE_14\0" /* 54560 */ - "PA_CL_VPORT_XOFFSET_14\0" /* 54582 */ - "PA_CL_VPORT_YSCALE_14\0" /* 54605 */ - "PA_CL_VPORT_YOFFSET_14\0" /* 54627 */ - "PA_CL_VPORT_ZSCALE_14\0" /* 54650 */ - "PA_CL_VPORT_ZOFFSET_14\0" /* 54672 */ - "PA_CL_VPORT_XSCALE_15\0" /* 54695 */ - "PA_CL_VPORT_XOFFSET_15\0" /* 54717 */ - "PA_CL_VPORT_YSCALE_15\0" /* 54740 */ - "PA_CL_VPORT_YOFFSET_15\0" /* 54762 */ - "PA_CL_VPORT_ZSCALE_15\0" /* 54785 */ - "PA_CL_VPORT_ZOFFSET_15\0" /* 54807 */ - "PA_CL_UCP_0_X\0" /* 54830 */ - "PA_CL_UCP_0_Y\0" /* 54844 */ - "PA_CL_UCP_0_Z\0" /* 54858 */ - "PA_CL_UCP_0_W\0" /* 54872 */ - "PA_CL_UCP_1_X\0" /* 54886 */ - "PA_CL_UCP_1_Y\0" /* 54900 */ - "PA_CL_UCP_1_Z\0" /* 54914 */ - "PA_CL_UCP_1_W\0" /* 54928 */ - "PA_CL_UCP_2_X\0" /* 54942 */ - "PA_CL_UCP_2_Y\0" /* 54956 */ - "PA_CL_UCP_2_Z\0" /* 54970 */ - "PA_CL_UCP_2_W\0" /* 54984 */ - "PA_CL_UCP_3_X\0" /* 54998 */ - "PA_CL_UCP_3_Y\0" /* 55012 */ - "PA_CL_UCP_3_Z\0" /* 55026 */ - "PA_CL_UCP_3_W\0" /* 55040 */ - "PA_CL_UCP_4_X\0" /* 55054 */ - "PA_CL_UCP_4_Y\0" /* 55068 */ - "PA_CL_UCP_4_Z\0" /* 55082 */ - "PA_CL_UCP_4_W\0" /* 55096 */ - "PA_CL_UCP_5_X\0" /* 55110 */ - "PA_CL_UCP_5_Y\0" /* 55124 */ - "PA_CL_UCP_5_Z\0" /* 55138 */ - "PA_CL_UCP_5_W\0" /* 55152 */ - "SPI_PS_INPUT_CNTL_0\0" /* 55166 */ - "SPI_PS_INPUT_CNTL_1\0" /* 55186 */ - "SPI_PS_INPUT_CNTL_2\0" /* 55206 */ - "SPI_PS_INPUT_CNTL_3\0" /* 55226 */ - "SPI_PS_INPUT_CNTL_4\0" /* 55246 */ - "SPI_PS_INPUT_CNTL_5\0" /* 55266 */ - "SPI_PS_INPUT_CNTL_6\0" /* 55286 */ - "SPI_PS_INPUT_CNTL_7\0" /* 55306 */ - "SPI_PS_INPUT_CNTL_8\0" /* 55326 */ - "SPI_PS_INPUT_CNTL_9\0" /* 55346 */ - "SPI_PS_INPUT_CNTL_10\0" /* 55366 */ - "SPI_PS_INPUT_CNTL_11\0" /* 55387 */ - "SPI_PS_INPUT_CNTL_12\0" /* 55408 */ - "SPI_PS_INPUT_CNTL_13\0" /* 55429 */ - "SPI_PS_INPUT_CNTL_14\0" /* 55450 */ - "SPI_PS_INPUT_CNTL_15\0" /* 55471 */ - "SPI_PS_INPUT_CNTL_16\0" /* 55492 */ - "SPI_PS_INPUT_CNTL_17\0" /* 55513 */ - "SPI_PS_INPUT_CNTL_18\0" /* 55534 */ - "SPI_PS_INPUT_CNTL_19\0" /* 55555 */ - "SPI_PS_INPUT_CNTL_20\0" /* 55576 */ - "SPI_PS_INPUT_CNTL_21\0" /* 55597 */ - "SPI_PS_INPUT_CNTL_22\0" /* 55618 */ - "SPI_PS_INPUT_CNTL_23\0" /* 55639 */ - "SPI_PS_INPUT_CNTL_24\0" /* 55660 */ - "SPI_PS_INPUT_CNTL_25\0" /* 55681 */ - "SPI_PS_INPUT_CNTL_26\0" /* 55702 */ - "SPI_PS_INPUT_CNTL_27\0" /* 55723 */ - "SPI_PS_INPUT_CNTL_28\0" /* 55744 */ - "SPI_PS_INPUT_CNTL_29\0" /* 55765 */ - "SPI_PS_INPUT_CNTL_30\0" /* 55786 */ - "SPI_PS_INPUT_CNTL_31\0" /* 55807 */ - "SPI_VS_OUT_CONFIG\0" /* 55828 */ - "SPI_PS_INPUT_ENA\0" /* 55846 */ - "SPI_PS_INPUT_ADDR\0" /* 55863 */ - "SPI_INTERP_CONTROL_0\0" /* 55881 */ - "SPI_PS_IN_CONTROL\0" /* 55902 */ - "SPI_BARYC_CNTL\0" /* 55920 */ - "SPI_TMPRING_SIZE\0" /* 55935 */ - "SPI_WAVE_MGMT_1\0" /* 55952 */ - "SPI_WAVE_MGMT_2\0" /* 55968 */ - "SPI_SHADER_POS_FORMAT\0" /* 55984 */ - "SPI_SHADER_Z_FORMAT\0" /* 56006 */ - "SPI_SHADER_COL_FORMAT\0" /* 56026 */ - "SX_PS_DOWNCONVERT\0" /* 56048 */ - "SX_BLEND_OPT_EPSILON\0" /* 56066 */ - "SX_BLEND_OPT_CONTROL\0" /* 56087 */ - "SX_MRT0_BLEND_OPT\0" /* 56108 */ - "SX_MRT1_BLEND_OPT\0" /* 56126 */ - "SX_MRT2_BLEND_OPT\0" /* 56144 */ - "SX_MRT3_BLEND_OPT\0" /* 56162 */ - "SX_MRT4_BLEND_OPT\0" /* 56180 */ - "SX_MRT5_BLEND_OPT\0" /* 56198 */ - "SX_MRT6_BLEND_OPT\0" /* 56216 */ - "SX_MRT7_BLEND_OPT\0" /* 56234 */ - "CB_BLEND0_CONTROL\0" /* 56252 */ - "CB_BLEND1_CONTROL\0" /* 56270 */ - "CB_BLEND2_CONTROL\0" /* 56288 */ - "CB_BLEND3_CONTROL\0" /* 56306 */ - "CB_BLEND4_CONTROL\0" /* 56324 */ - "CB_BLEND5_CONTROL\0" /* 56342 */ - "CB_BLEND6_CONTROL\0" /* 56360 */ - "CB_BLEND7_CONTROL\0" /* 56378 */ - "CS_COPY_STATE\0" /* 56396 */ - "PA_CL_POINT_X_RAD\0" /* 56410 */ - "PA_CL_POINT_Y_RAD\0" /* 56428 */ - "PA_CL_POINT_SIZE\0" /* 56446 */ - "PA_CL_POINT_CULL_RAD\0" /* 56463 */ - "VGT_DMA_BASE_HI\0" /* 56484 */ - "VGT_DMA_BASE\0" /* 56500 */ - "VGT_DRAW_INITIATOR\0" /* 56513 */ - "VGT_IMMED_DATA\0" /* 56532 */ - "VGT_EVENT_ADDRESS_REG\0" /* 56547 */ - "DB_DEPTH_CONTROL\0" /* 56569 */ - "DB_EQAA\0" /* 56586 */ - "CB_COLOR_CONTROL\0" /* 56594 */ - "DB_SHADER_CONTROL\0" /* 56611 */ - "PA_CL_CLIP_CNTL\0" /* 56629 */ - "PA_SU_SC_MODE_CNTL\0" /* 56645 */ - "PA_CL_VTE_CNTL\0" /* 56664 */ - "PA_CL_VS_OUT_CNTL\0" /* 56679 */ - "PA_CL_NANINF_CNTL\0" /* 56697 */ - "PA_SU_LINE_STIPPLE_CNTL\0" /* 56715 */ - "PA_SU_LINE_STIPPLE_SCALE\0" /* 56739 */ - "PA_SU_PRIM_FILTER_CNTL\0" /* 56764 */ - "PA_SU_SMALL_PRIM_FILTER_CNTL\0" /* 56787 */ - "PA_SU_POINT_SIZE\0" /* 56816 */ - "PA_SU_POINT_MINMAX\0" /* 56833 */ - "PA_SU_LINE_CNTL\0" /* 56852 */ - "PA_SC_LINE_STIPPLE\0" /* 56868 */ - "VGT_OUTPUT_PATH_CNTL\0" /* 56887 */ - "VGT_HOS_CNTL\0" /* 56908 */ - "VGT_HOS_MAX_TESS_LEVEL\0" /* 56921 */ - "VGT_HOS_MIN_TESS_LEVEL\0" /* 56944 */ - "VGT_HOS_REUSE_DEPTH\0" /* 56967 */ - "VGT_GROUP_PRIM_TYPE\0" /* 56987 */ - "VGT_GROUP_FIRST_DECR\0" /* 57007 */ - "VGT_GROUP_DECR\0" /* 57028 */ - "VGT_GROUP_VECT_0_CNTL\0" /* 57043 */ - "VGT_GROUP_VECT_1_CNTL\0" /* 57065 */ - "VGT_GROUP_VECT_0_FMT_CNTL\0" /* 57087 */ - "VGT_GROUP_VECT_1_FMT_CNTL\0" /* 57113 */ - "VGT_GS_MODE\0" /* 57139 */ - "VGT_GS_ONCHIP_CNTL\0" /* 57151 */ - "PA_SC_MODE_CNTL_0\0" /* 57170 */ - "PA_SC_MODE_CNTL_1\0" /* 57188 */ - "VGT_ENHANCE\0" /* 57206 */ - "VGT_GS_PER_ES\0" /* 57218 */ - "VGT_ES_PER_GS\0" /* 57232 */ - "VGT_GS_PER_VS\0" /* 57246 */ - "VGT_GSVS_RING_OFFSET_1\0" /* 57260 */ - "VGT_GSVS_RING_OFFSET_2\0" /* 57283 */ - "VGT_GSVS_RING_OFFSET_3\0" /* 57306 */ - "VGT_GS_OUT_PRIM_TYPE\0" /* 57329 */ - "IA_ENHANCE\0" /* 57350 */ - "VGT_DMA_SIZE\0" /* 57361 */ - "VGT_DMA_MAX_SIZE\0" /* 57374 */ - "VGT_DMA_INDEX_TYPE\0" /* 57391 */ - "WD_ENHANCE\0" /* 57410 */ - "VGT_PRIMITIVEID_EN\0" /* 57421 */ - "VGT_DMA_NUM_INSTANCES\0" /* 57440 */ - "VGT_PRIMITIVEID_RESET\0" /* 57462 */ - "VGT_EVENT_INITIATOR\0" /* 57484 */ - "VGT_MULTI_PRIM_IB_RESET_EN\0" /* 57504 */ - "VGT_INSTANCE_STEP_RATE_0\0" /* 57531 */ - "VGT_INSTANCE_STEP_RATE_1\0" /* 57556 */ - "IA_MULTI_VGT_PARAM\0" /* 57581 */ - "VGT_ESGS_RING_ITEMSIZE\0" /* 57600 */ - "VGT_GSVS_RING_ITEMSIZE\0" /* 57623 */ - "VGT_REUSE_OFF\0" /* 57646 */ - "VGT_VTX_CNT_EN\0" /* 57660 */ - "DB_HTILE_SURFACE\0" /* 57675 */ - "DB_SRESULTS_COMPARE_STATE0\0" /* 57692 */ - "DB_SRESULTS_COMPARE_STATE1\0" /* 57719 */ - "DB_PRELOAD_CONTROL\0" /* 57746 */ - "VGT_STRMOUT_BUFFER_SIZE_0\0" /* 57765 */ - "VGT_STRMOUT_VTX_STRIDE_0\0" /* 57791 */ - "VGT_STRMOUT_BUFFER_OFFSET_0\0" /* 57816 */ - "VGT_STRMOUT_BUFFER_SIZE_1\0" /* 57844 */ - "VGT_STRMOUT_VTX_STRIDE_1\0" /* 57870 */ - "VGT_STRMOUT_BUFFER_OFFSET_1\0" /* 57895 */ - "VGT_STRMOUT_BUFFER_SIZE_2\0" /* 57923 */ - "VGT_STRMOUT_VTX_STRIDE_2\0" /* 57949 */ - "VGT_STRMOUT_BUFFER_OFFSET_2\0" /* 57974 */ - "VGT_STRMOUT_BUFFER_SIZE_3\0" /* 58002 */ - "VGT_STRMOUT_VTX_STRIDE_3\0" /* 58028 */ - "VGT_STRMOUT_BUFFER_OFFSET_3\0" /* 58053 */ - "VGT_STRMOUT_DRAW_OPAQUE_OFFSET\0" /* 58081 */ - "VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE\0" /* 58112 */ - "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE\0" /* 58155 */ - "VGT_GS_MAX_VERT_OUT\0" /* 58193 */ - "VGT_TESS_DISTRIBUTION\0" /* 58213 */ - "VGT_SHADER_STAGES_EN\0" /* 58235 */ - "VGT_LS_HS_CONFIG\0" /* 58256 */ - "VGT_GS_VERT_ITEMSIZE\0" /* 58273 */ - "VGT_GS_VERT_ITEMSIZE_1\0" /* 58294 */ - "VGT_GS_VERT_ITEMSIZE_2\0" /* 58317 */ - "VGT_GS_VERT_ITEMSIZE_3\0" /* 58340 */ - "VGT_TF_PARAM\0" /* 58363 */ - "DB_ALPHA_TO_MASK\0" /* 58376 */ - "VGT_DISPATCH_DRAW_INDEX\0" /* 58393 */ - "PA_SU_POLY_OFFSET_DB_FMT_CNTL\0" /* 58417 */ - "PA_SU_POLY_OFFSET_CLAMP\0" /* 58447 */ - "PA_SU_POLY_OFFSET_FRONT_SCALE\0" /* 58471 */ - "PA_SU_POLY_OFFSET_FRONT_OFFSET\0" /* 58501 */ - "PA_SU_POLY_OFFSET_BACK_SCALE\0" /* 58532 */ - "PA_SU_POLY_OFFSET_BACK_OFFSET\0" /* 58561 */ - "VGT_GS_INSTANCE_CNT\0" /* 58591 */ - "VGT_STRMOUT_CONFIG\0" /* 58611 */ - "VGT_STRMOUT_BUFFER_CONFIG\0" /* 58630 */ - "PA_SC_CENTROID_PRIORITY_0\0" /* 58656 */ - "PA_SC_CENTROID_PRIORITY_1\0" /* 58682 */ - "PA_SC_LINE_CNTL\0" /* 58708 */ - "PA_SC_AA_CONFIG\0" /* 58724 */ - "PA_SU_VTX_CNTL\0" /* 58740 */ - "PA_CL_GB_VERT_CLIP_ADJ\0" /* 58755 */ - "PA_CL_GB_VERT_DISC_ADJ\0" /* 58778 */ - "PA_CL_GB_HORZ_CLIP_ADJ\0" /* 58801 */ - "PA_CL_GB_HORZ_DISC_ADJ\0" /* 58824 */ - "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0\0" /* 58847 */ - "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1\0" /* 58881 */ - "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2\0" /* 58915 */ - "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3\0" /* 58949 */ - "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0\0" /* 58983 */ - "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1\0" /* 59017 */ - "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2\0" /* 59051 */ - "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3\0" /* 59085 */ - "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0\0" /* 59119 */ - "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1\0" /* 59153 */ - "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2\0" /* 59187 */ - "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3\0" /* 59221 */ - "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0\0" /* 59255 */ - "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1\0" /* 59289 */ - "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2\0" /* 59323 */ - "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3\0" /* 59357 */ - "PA_SC_AA_MASK_X0Y0_X1Y0\0" /* 59391 */ - "PA_SC_AA_MASK_X0Y1_X1Y1\0" /* 59415 */ - "PA_SC_SHADER_CONTROL\0" /* 59439 */ - "VGT_VERTEX_REUSE_BLOCK_CNTL\0" /* 59460 */ - "VGT_OUT_DEALLOC_CNTL\0" /* 59488 */ - "CB_COLOR0_BASE\0" /* 59509 */ - "CB_COLOR0_PITCH\0" /* 59524 */ - "CB_COLOR0_SLICE\0" /* 59540 */ - "CB_COLOR0_VIEW\0" /* 59556 */ - "CB_COLOR0_INFO\0" /* 59571 */ - "CB_COLOR0_ATTRIB\0" /* 59586 */ - "CB_COLOR0_DCC_CONTROL\0" /* 59603 */ - "CB_COLOR0_CMASK\0" /* 59625 */ - "CB_COLOR0_CMASK_SLICE\0" /* 59641 */ - "CB_COLOR0_FMASK\0" /* 59663 */ - "CB_COLOR0_FMASK_SLICE\0" /* 59679 */ - "CB_COLOR0_CLEAR_WORD0\0" /* 59701 */ - "CB_COLOR0_CLEAR_WORD1\0" /* 59723 */ - "CB_COLOR0_DCC_BASE\0" /* 59745 */ - "CB_COLOR1_BASE\0" /* 59764 */ - "CB_COLOR1_PITCH\0" /* 59779 */ - "CB_COLOR1_SLICE\0" /* 59795 */ - "CB_COLOR1_VIEW\0" /* 59811 */ - "CB_COLOR1_INFO\0" /* 59826 */ - "CB_COLOR1_ATTRIB\0" /* 59841 */ - "CB_COLOR1_DCC_CONTROL\0" /* 59858 */ - "CB_COLOR1_CMASK\0" /* 59880 */ - "CB_COLOR1_CMASK_SLICE\0" /* 59896 */ - "CB_COLOR1_FMASK\0" /* 59918 */ - "CB_COLOR1_FMASK_SLICE\0" /* 59934 */ - "CB_COLOR1_CLEAR_WORD0\0" /* 59956 */ - "CB_COLOR1_CLEAR_WORD1\0" /* 59978 */ - "CB_COLOR1_DCC_BASE\0" /* 60000 */ - "CB_COLOR2_BASE\0" /* 60019 */ - "CB_COLOR2_PITCH\0" /* 60034 */ - "CB_COLOR2_SLICE\0" /* 60050 */ - "CB_COLOR2_VIEW\0" /* 60066 */ - "CB_COLOR2_INFO\0" /* 60081 */ - "CB_COLOR2_ATTRIB\0" /* 60096 */ - "CB_COLOR2_DCC_CONTROL\0" /* 60113 */ - "CB_COLOR2_CMASK\0" /* 60135 */ - "CB_COLOR2_CMASK_SLICE\0" /* 60151 */ - "CB_COLOR2_FMASK\0" /* 60173 */ - "CB_COLOR2_FMASK_SLICE\0" /* 60189 */ - "CB_COLOR2_CLEAR_WORD0\0" /* 60211 */ - "CB_COLOR2_CLEAR_WORD1\0" /* 60233 */ - "CB_COLOR2_DCC_BASE\0" /* 60255 */ - "CB_COLOR3_BASE\0" /* 60274 */ - "CB_COLOR3_PITCH\0" /* 60289 */ - "CB_COLOR3_SLICE\0" /* 60305 */ - "CB_COLOR3_VIEW\0" /* 60321 */ - "CB_COLOR3_INFO\0" /* 60336 */ - "CB_COLOR3_ATTRIB\0" /* 60351 */ - "CB_COLOR3_DCC_CONTROL\0" /* 60368 */ - "CB_COLOR3_CMASK\0" /* 60390 */ - "CB_COLOR3_CMASK_SLICE\0" /* 60406 */ - "CB_COLOR3_FMASK\0" /* 60428 */ - "CB_COLOR3_FMASK_SLICE\0" /* 60444 */ - "CB_COLOR3_CLEAR_WORD0\0" /* 60466 */ - "CB_COLOR3_CLEAR_WORD1\0" /* 60488 */ - "CB_COLOR3_DCC_BASE\0" /* 60510 */ - "CB_COLOR4_BASE\0" /* 60529 */ - "CB_COLOR4_PITCH\0" /* 60544 */ - "CB_COLOR4_SLICE\0" /* 60560 */ - "CB_COLOR4_VIEW\0" /* 60576 */ - "CB_COLOR4_INFO\0" /* 60591 */ - "CB_COLOR4_ATTRIB\0" /* 60606 */ - "CB_COLOR4_DCC_CONTROL\0" /* 60623 */ - "CB_COLOR4_CMASK\0" /* 60645 */ - "CB_COLOR4_CMASK_SLICE\0" /* 60661 */ - "CB_COLOR4_FMASK\0" /* 60683 */ - "CB_COLOR4_FMASK_SLICE\0" /* 60699 */ - "CB_COLOR4_CLEAR_WORD0\0" /* 60721 */ - "CB_COLOR4_CLEAR_WORD1\0" /* 60743 */ - "CB_COLOR4_DCC_BASE\0" /* 60765 */ - "CB_COLOR5_BASE\0" /* 60784 */ - "CB_COLOR5_PITCH\0" /* 60799 */ - "CB_COLOR5_SLICE\0" /* 60815 */ - "CB_COLOR5_VIEW\0" /* 60831 */ - "CB_COLOR5_INFO\0" /* 60846 */ - "CB_COLOR5_ATTRIB\0" /* 60861 */ - "CB_COLOR5_DCC_CONTROL\0" /* 60878 */ - "CB_COLOR5_CMASK\0" /* 60900 */ - "CB_COLOR5_CMASK_SLICE\0" /* 60916 */ - "CB_COLOR5_FMASK\0" /* 60938 */ - "CB_COLOR5_FMASK_SLICE\0" /* 60954 */ - "CB_COLOR5_CLEAR_WORD0\0" /* 60976 */ - "CB_COLOR5_CLEAR_WORD1\0" /* 60998 */ - "CB_COLOR5_DCC_BASE\0" /* 61020 */ - "CB_COLOR6_BASE\0" /* 61039 */ - "CB_COLOR6_PITCH\0" /* 61054 */ - "CB_COLOR6_SLICE\0" /* 61070 */ - "CB_COLOR6_VIEW\0" /* 61086 */ - "CB_COLOR6_INFO\0" /* 61101 */ - "CB_COLOR6_ATTRIB\0" /* 61116 */ - "CB_COLOR6_DCC_CONTROL\0" /* 61133 */ - "CB_COLOR6_CMASK\0" /* 61155 */ - "CB_COLOR6_CMASK_SLICE\0" /* 61171 */ - "CB_COLOR6_FMASK\0" /* 61193 */ - "CB_COLOR6_FMASK_SLICE\0" /* 61209 */ - "CB_COLOR6_CLEAR_WORD0\0" /* 61231 */ - "CB_COLOR6_CLEAR_WORD1\0" /* 61253 */ - "CB_COLOR6_DCC_BASE\0" /* 61275 */ - "CB_COLOR7_BASE\0" /* 61294 */ - "CB_COLOR7_PITCH\0" /* 61309 */ - "CB_COLOR7_SLICE\0" /* 61325 */ - "CB_COLOR7_VIEW\0" /* 61341 */ - "CB_COLOR7_INFO\0" /* 61356 */ - "CB_COLOR7_ATTRIB\0" /* 61371 */ - "CB_COLOR7_DCC_CONTROL\0" /* 61388 */ - "CB_COLOR7_CMASK\0" /* 61410 */ - "CB_COLOR7_CMASK_SLICE\0" /* 61426 */ - "CB_COLOR7_FMASK\0" /* 61448 */ - "CB_COLOR7_FMASK_SLICE\0" /* 61464 */ - "CB_COLOR7_CLEAR_WORD0\0" /* 61486 */ - "CB_COLOR7_CLEAR_WORD1\0" /* 61508 */ - "CB_COLOR7_DCC_BASE\0" /* 61530 */; - -static const int sid_strings_offsets[] = { - /* 0 */ 501, 823, 827, 830, - /* 4 */ 867, 887, 899, 905, 909, 918, - /* 10 */ 956, 905, 383, 965, - /* 14 */ 995, 905, -1, 1004, - /* 18 */ 1093, 1098, 1106, 1114, - /* 22 */ 1140, 878, - /* 24 */ 1155, 1165, - /* 26 */ 5384, 5395, 5411, 5426, 5442, 5456, 5469, 5484, 5499, 5514, 5526, 5545, 5565, 5583, 5602, 5617, 5632, 5654, 5669, 5684, 5699, 5715, 5729, 5756, 5783, 5810, 5837, 5861, 5881, - /* 55 */ 5910, 5931, - /* 57 */ 5384, 5395, 5411, 5426, 5442, 5456, 5469, -1, -1, 5514, 5526, 5545, 5565, 5583, -1, -1, 5632, 5654, 5669, 5684, 5699, 5715, 5729, 5756, 5783, 5810, 5837, 5861, 5881, - /* 86 */ 7891, 7903, 7915, 7927, - /* 90 */ 8275, -1, -1, -1, -1, -1, -1, -1, 8286, 8298, -1, -1, 8310, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 8321, - /* 123 */ -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 8347, - /* 186 */ 8442, 8451, 8460, 8478, 8496, 8505, 8514, 8523, - /* 194 */ 8572, 8593, 8614, 8637, 8660, 8680, 8700, 8725, - /* 202 */ 8757, 8781, 8799, 8818, 8838, 8857, 8879, 8904, 8929, 8956, 8983, 9007, 9029, 9057, 9082, 9110, - /* 218 */ 9218, 9230, 9249, 9268, - /* 222 */ 9295, 9319, 9337, 9356, 9376, 9395, 9417, 9442, 9467, 9494, 9521, 9545, 9567, 9595, 9620, 9648, 9676, 9698, 9722, 9746, 9770, 9791, 9812, 9837, 9866, 9891, 9917, 9940, 9964, 9991, 10019, 10047, 10075, 10097, 10119, 10143, 10163, 10183, 10203, 10223, 10243, 10263, 10283, 10317, 10351, 10380, 10409, 10438, 10467, 10496, 10525, 10556, 10586, 10617, 10647, 10677, 10708, 10739, 10759, 10781, 10799, 10826, 10850, 10876, - /* 286 */ 10910, 10931, 10952, 10975, 10998, 11018, 11038, 11063, 11084, 11110, 11130, 11152, 11178, 11199, 11223, 11250, - /* 302 */ 11354, 11373, 11392, 11411, 11430, 11449, 11468, 11487, 11506, 11521, 11536, 11551, 11568, 11589, 11610, 11630, - /* 318 */ 11813, 11825, 11839, 11863, 11893, 11918, 11949, 11969, - /* 326 */ 12035, 12062, 12088, 12115, 12146, 12175, 12205, 12239, - /* 334 */ 12434, 12457, - /* 336 */ 12434, 12457, 12497, 12526, - /* 340 */ 12572, 12593, 12615, - /* 343 */ 12742, 12774, 12807, 12840, - /* 347 */ 13031, - /* 348 */ 13330, 13346, 13362, 13378, 13394, 13410, 13426, 13442, 13458, 13474, 13490, 13506, 13521, 13536, 13551, 13567, - /* 364 */ 13979, 14010, 14038, 14067, - /* 368 */ 14112, 14133, 14154, 14175, 14196, -1, -1, 14217, 14238, -1, -1, -1, 14260, 14281, 14302, 14324, - /* 384 */ 14352, 14365, 14388, 14411, 14434, 14454, 14475, 14496, 14517, 14543, 14569, 14595, 14622, 14649, 14676, - /* 399 */ 14715, 14740, 14766, 14792, 14818, 14843, 14868, - /* 406 */ 14904, 14927, 14950, 14973, - /* 410 */ 15007, 15031, 15055, 15079, - /* 414 */ 15115, 15140, 15165, 15190, - /* 418 */ 15233, 15250, 15267, 15284, - /* 422 */ 13979, 14010, 14038, 15312, - /* 426 */ -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 15427, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 15441, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 15455, - /* 667 */ 16385, 16403, 16418, - /* 670 */ 17955, 17965, 17978, 17992, - /* 674 */ 18289, 18304, 18320, 18336, - /* 678 */ 18501, 18511, 18529, 18539, - /* 682 */ 14112, 14133, 14154, -1, 14196, 18944, 18966, - /* 689 */ 14352, -1, -1, -1, 14434, 14454, 14475, 14496, 14517, 14543, 14569, 14595, 14622, 14649, 14676, -1, 18991, 19018, - /* 707 */ 19046, 19056, 19061, 19066, - /* 711 */ 19208, 19224, - /* 713 */ 19702, 19725, 19748, 19771, - /* 717 */ 19818, 19843, 19868, 19893, - /* 721 */ 19943, 19967, 19991, 20015, - /* 725 */ 20047, 20072, 20097, 20122, - /* 729 */ 20156, 20181, 20206, 20231, - /* 733 */ 20265, 20291, 20317, 20343, - /* 737 */ 20379, 20402, 20425, 20448, - /* 741 */ 20478, 20512, 20547, 20582, - /* 745 */ 20625, 20659, 20694, 20729, - /* 749 */ 20772, 20795, 20818, 20841, - /* 753 */ 20871, 20905, 20940, 20975, - /* 757 */ 21018, 21052, 21087, 21122, - /* 761 */ 21165, 21193, 21221, 21249, - /* 765 */ 21289, 21328, 21368, 21408, - /* 769 */ 21461, 21500, 21540, 21580, - /* 773 */ 21728, 21741, 21754, 21767, 21788, 21807, 21825, 21843, 21858, 21875, 21892, 21904, 21915, 21927, 21940, 21952, - /* 789 */ 22176, - /* 790 */ 22705, 22726, 22747, 22768, 22789, - /* 795 */ 23050, - /* 796 */ 23230, 23246, 23263, 23280, 23301, - /* 801 */ 23394, 23410, 23426, 23443, 23460, 23481, 23505, 23529, 23552, 23575, - /* 811 */ 23762, 23789, 23807, 23825, 23847, 23871, 23892, 23911, 23932, 23953, 23975, - /* 822 */ 24037, 24043, -1, 24056, -1, -1, -1, 24069, -1, -1, -1, 24081, -1, 24093, -1, 24105, - /* 838 */ 24612, 24647, 24682, 24714, 24746, 24778, 24810, 24844, - /* 846 */ 24908, 24922, 24935, 24953, 24966, 24979, 25000, 25024, - /* 854 */ 25100, 25111, 25121, 25137, 25163, 25179, 25205, 25221, 25247, 25263, 25289, -1, -1, 25314, 25335, 25366, 25383, 25404, 25421, 25442, 25463, - /* 875 */ 25509, 25527, 25546, 25563, 25580, - /* 880 */ 25703, 25718, 25739, 25761, - /* 884 */ 25795, 25811, - /* 886 */ 25919, 25930, 25940, 25951, 25963, 25976, 25990, 26002, - /* 894 */ 26030, 26040, 26049, 26059, 26070, 26082, 26095, 26106, - /* 902 */ 26527, 26538, 26548, 26572, -1, 26583, 26603, - /* 909 */ 26621, -1, -1, -1, -1, 26628, -1, -1, -1, -1, 26635, -1, -1, -1, -1, 26642, -1, 26649, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 26656, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 26663, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 26670, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 26677, -1, -1, -1, -1, 26684, -1, -1, -1, -1, 26691, -1, -1, -1, -1, 26698, -1, -1, -1, -1, -1, -1, 26705, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 26712, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 26719, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 26726, -1, -1, -1, -1, -1, -1, 26733, -1, -1, -1, -1, 26740, -1, -1, -1, -1, 26747, -1, -1, -1, -1, 26754, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 26761, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 26768, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 26775, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 26782, -1, 26789, -1, -1, -1, -1, 26796, -1, -1, -1, -1, 26803, -1, -1, -1, -1, 26810, - /* 1165 */ 26893, 26900, 26920, 26925, - /* 1169 */ 27071, 27084, 27103, 27125, - /* 1173 */ 27511, 27531, - /* 1175 */ 27543, 27557, 27570, - /* 1178 */ 29101, 29123, 29143, 29164, 29185, - /* 1183 */ 29240, 29257, 29273, 29288, 29304, 29320, 29344, 29368, 29392, 29416, 29437, 29453, 29468, 29492, 29515, 29539, 29559, 29578, - /* 1201 */ 29621, 29634, 29648, 29660, 29673, - /* 1206 */ 29757, 29774, 29791, 29807, 29823, 29839, 29855, 29872, 29890, - /* 1215 */ 29962, 29969, 29983, 29997, 30011, 30025, - /* 1221 */ 30035, 30047, 30058, 30069, - /* 1225 */ 30241, -1, -1, 30256, - /* 1229 */ 30925, 30948, 30971, - /* 1232 */ 31074, 31087, 31100, - /* 1235 */ 31112, 31130, 31150, 31170, - /* 1239 */ 31198, 31214, 31231, - /* 1242 */ 31258, 31273, - /* 1244 */ -1, 31365, 31388, 31411, 31434, 31449, 31462, 31474, 31491, -1, 31510, 31530, 31550, 31569, -1, 31581, 31598, 31615, 31631, -1, 31647, 31676, 31687, 31713, 31731, 31748, 31767, 31785, 31804, 31820, 31836, 31856, 31878, 31900, 31914, 31933, 31949, -1, -1, 31959, 31974, -1, 31992, 32015, 32040, 32062, 32087, 7528, 7555, 32109, -1, 32137, 32156, 32174, 32194, 32213, 32233, 32257, -1, -1, -1, -1, -1, -1, 32278, - /* 1309 */ 32776, 32789, 32801, - /* 1312 */ 32813, 32826, 32838, - /* 1315 */ 32852, 32866, 32878, - /* 1318 */ 33009, 33022, 33036, - /* 1321 */ 33046, 33059, 33069, 33083, - /* 1325 */ 33111, 33124, 33136, 33155, - /* 1329 */ 31258, 31273, 33252, - /* 1332 */ 33270, 33296, 33322, - /* 1335 */ 34097, 34108, 34116, 34132, - /* 1339 */ 34158, 34184, 34209, 34234, 34257, 34278, 34305, 34334, - /* 1347 */ 34671, 34683, 34696, 34709, - /* 1351 */ 34729, 34743, 34751, 34760, 34770, 34779, 34791, 34806, 34821, 34838, 34855, 34869, 34881, -1, 34899, -1, 34917, 34929, 34943, 34957, 34971, 34982, 34993, - /* 1374 */ 35014, 35027, -1, -1, 35040, 35052, 35064, 35076, - /* 1382 */ 35101, 35110, 35119, 35132, - /* 1386 */ 35209, 35224, 35242, 35270, 35300, 35331, 35359, -}; - -#endif diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/sid_tables.py mesa-17.0.7/src/gallium/drivers/radeonsi/sid_tables.py --- mesa-12.0.6/src/gallium/drivers/radeonsi/sid_tables.py 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/sid_tables.py 1970-01-01 00:00:00.000000000 +0000 @@ -1,295 +0,0 @@ -#!/usr/bin/env python - -CopyRight = ''' -/* - * Copyright 2015 Advanced Micro Devices, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * on the rights to use, copy, modify, merge, publish, distribute, sub - * license, and/or sell copies of the Software, and to permit persons to whom - * the Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - */ -''' - -import sys -import re - - -class StringTable: - """ - A class for collecting multiple strings in a single larger string that is - used by indexing (to avoid relocations in the resulting binary) - """ - def __init__(self): - self.table = [] - self.length = 0 - - def add(self, string): - # We might get lucky with string being a suffix of a previously added string - for te in self.table: - if te[0].endswith(string): - idx = te[1] + len(te[0]) - len(string) - te[2].add(idx) - return idx - - idx = self.length - self.table.append((string, idx, set((idx,)))) - self.length += len(string) + 1 - - return idx - - def emit(self, filp, name, static=True): - """ - Write - [static] const char name[] = "..."; - to filp. - """ - fragments = [ - '"%s\\0" /* %s */' % ( - te[0].encode('string_escape'), - ', '.join(str(idx) for idx in te[2]) - ) - for te in self.table - ] - filp.write('%sconst char %s[] =\n%s;\n' % ( - 'static ' if static else '', - name, - '\n'.join('\t' + fragment for fragment in fragments) - )) - -class IntTable: - """ - A class for collecting multiple arrays of integers in a single big array - that is used by indexing (to avoid relocations in the resulting binary) - """ - def __init__(self, typename): - self.typename = typename - self.table = [] - self.idxs = set() - - def add(self, array): - # We might get lucky and find the array somewhere in the existing data - try: - idx = 0 - while True: - idx = self.table.index(array[0], idx, len(self.table) - len(array) + 1) - - for i in range(1, len(array)): - if array[i] != self.table[idx + i]: - break - else: - self.idxs.add(idx) - return idx - - idx += 1 - except ValueError: - pass - - idx = len(self.table) - self.table += array - self.idxs.add(idx) - return idx - - def emit(self, filp, name, static=True): - """ - Write - [static] const typename name[] = { ... }; - to filp. - """ - idxs = sorted(self.idxs) + [-1] - - fragments = [ - ('\t/* %s */ %s' % ( - idxs[i], - ' '.join((str(elt) + ',') for elt in self.table[idxs[i]:idxs[i+1]]) - )) - for i in range(len(idxs) - 1) - ] - - filp.write('%sconst %s %s[] = {\n%s\n};\n' % ( - 'static ' if static else '', - self.typename, name, - '\n'.join(fragments) - )) - -class Field: - def __init__(self, reg, s_name): - self.s_name = s_name - self.name = strip_prefix(s_name) - self.values = [] - self.varname_values = '%s__%s__values' % (reg.r_name.lower(), self.name.lower()) - -class Reg: - def __init__(self, r_name): - self.r_name = r_name - self.name = strip_prefix(r_name) - self.fields = [] - self.own_fields = True - - -def strip_prefix(s): - '''Strip prefix in the form ._.*_, e.g. R_001234_''' - return s[s[2:].find('_')+3:] - - -def parse(filename): - stream = open(filename) - regs = [] - packets = [] - - for line in stream: - if not line.startswith('#define '): - continue - - line = line[8:].strip() - - if line.startswith('R_'): - reg = Reg(line.split()[0]) - regs.append(reg) - - elif line.startswith('S_'): - field = Field(reg, line[:line.find('(')]) - reg.fields.append(field) - - elif line.startswith('V_'): - split = line.split() - field.values.append((split[0], int(split[1], 0))) - - elif line.startswith('PKT3_') and line.find('0x') != -1 and line.find('(') == -1: - packets.append(line.split()[0]) - - # Copy fields to indexed registers which have their fields only defined - # at register index 0. - # For example, copy fields from CB_COLOR0_INFO to CB_COLORn_INFO, n > 0. - match_number = re.compile('[0-9]+') - reg_dict = dict() - - # Create a dict of registers with fields and '0' in their name - for reg in regs: - if len(reg.fields) and reg.name.find('0') != -1: - reg_dict[reg.name] = reg - - # Assign fields - for reg in regs: - if not len(reg.fields): - reg0 = reg_dict.get(match_number.sub('0', reg.name)) - if reg0 != None: - reg.fields = reg0.fields - reg.fields_owner = reg0 - reg.own_fields = False - - return (regs, packets) - - -def write_tables(tables): - regs = tables[0] - packets = tables[1] - - strings = StringTable() - strings_offsets = IntTable("int") - - print '/* This file is autogenerated by sid_tables.py from sid.h. Do not edit directly. */' - print - print CopyRight.strip() - print ''' -#ifndef SID_TABLES_H -#define SID_TABLES_H - -struct si_field { - unsigned name_offset; - unsigned mask; - unsigned num_values; - unsigned values_offset; /* offset into sid_strings_offsets */ -}; - -struct si_reg { - unsigned name_offset; - unsigned offset; - unsigned num_fields; - unsigned fields_offset; -}; - -struct si_packet3 { - unsigned name_offset; - unsigned op; -}; -''' - - print 'static const struct si_packet3 packet3_table[] = {' - for pkt in packets: - print '\t{%s, %s},' % (strings.add(pkt[5:]), pkt) - print '};' - print - - print 'static const struct si_field sid_fields_table[] = {' - - fields_idx = 0 - for reg in regs: - if len(reg.fields) and reg.own_fields: - print '\t/* %s */' % (fields_idx) - - reg.fields_idx = fields_idx - - for field in reg.fields: - if len(field.values): - values_offsets = [] - for value in field.values: - while value[1] >= len(values_offsets): - values_offsets.append(-1) - values_offsets[value[1]] = strings.add(strip_prefix(value[0])) - print '\t{%s, %s(~0u), %s, %s},' % ( - strings.add(field.name), field.s_name, - len(values_offsets), strings_offsets.add(values_offsets)) - else: - print '\t{%s, %s(~0u)},' % (strings.add(field.name), field.s_name) - fields_idx += 1 - - print '};' - print - - print 'static const struct si_reg sid_reg_table[] = {' - for reg in regs: - if len(reg.fields): - print '\t{%s, %s, %s, %s},' % (strings.add(reg.name), reg.r_name, - len(reg.fields), reg.fields_idx if reg.own_fields else reg.fields_owner.fields_idx) - else: - print '\t{%s, %s},' % (strings.add(reg.name), reg.r_name) - print '};' - print - - strings.emit(sys.stdout, "sid_strings") - - print - - strings_offsets.emit(sys.stdout, "sid_strings_offsets") - - print - print '#endif' - - -def main(): - tables = [] - for arg in sys.argv[1:]: - tables.extend(parse(arg)) - write_tables(tables) - - -if __name__ == '__main__': - main() - -# kate: space-indent on; indent-width 4; replace-tabs on; diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/si_hw_context.c mesa-17.0.7/src/gallium/drivers/radeonsi/si_hw_context.c --- mesa-12.0.6/src/gallium/drivers/radeonsi/si_hw_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/si_hw_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,6 +25,7 @@ */ #include "si_pipe.h" +#include "radeon/r600_cs.h" static unsigned si_descriptor_list_cs_space(unsigned count, unsigned element_size) { @@ -61,18 +62,20 @@ { struct radeon_winsys_cs *cs = ctx->b.gfx.cs; struct radeon_winsys_cs *ce_ib = ctx->ce_ib; - struct radeon_winsys_cs *dma = ctx->b.dma.cs; - /* Flush the DMA IB if it's not empty. */ - if (radeon_emitted(dma, 0)) - ctx->b.dma.flush(ctx, RADEON_FLUSH_ASYNC, NULL); + /* There is no need to flush the DMA IB here, because + * r600_need_dma_space always flushes the GFX IB if there is + * a conflict, which means any unflushed DMA commands automatically + * precede the GFX IB (= they had no dependency on the GFX IB when + * they were submitted). + */ /* There are two memory usage counters in the winsys for all buffers * that have been added (cs_add_buffer) and two counters in the pipe * driver for those that haven't been added yet. */ - if (unlikely(!ctx->b.ws->cs_memory_below_limit(ctx->b.gfx.cs, - ctx->b.vram, ctx->b.gtt))) { + if (unlikely(!radeon_cs_memory_below_limit(ctx->b.screen, ctx->b.gfx.cs, + ctx->b.vram, ctx->b.gtt))) { ctx->b.gtt = 0; ctx->b.vram = 0; ctx->b.gfx.flush(ctx, RADEON_FLUSH_ASYNC, NULL); @@ -84,9 +87,8 @@ /* If the CS is sufficiently large, don't count the space needed * and just flush if there is not enough space left. */ - if (unlikely(cs->cdw > cs->max_dw - 2048 || - (ce_ib && ce_ib->max_dw - ce_ib->cdw < - si_ce_needed_cs_space()))) + if (!ctx->b.ws->cs_check_space(cs, 2048) || + (ce_ib && !ctx->b.ws->cs_check_space(ce_ib, si_ce_needed_cs_space()))) ctx->b.gfx.flush(ctx, RADEON_FLUSH_ASYNC, NULL); } @@ -100,67 +102,62 @@ if (ctx->gfx_flush_in_progress) return; - ctx->gfx_flush_in_progress = true; + if (!radeon_emitted(cs, ctx->b.initial_gfx_cs_size)) + return; - if (!radeon_emitted(cs, ctx->b.initial_gfx_cs_size) && - (!fence || ctx->last_gfx_fence)) { - if (fence) - ws->fence_reference(fence, ctx->last_gfx_fence); - if (!(flags & RADEON_FLUSH_ASYNC)) - ws->cs_sync_flush(cs); - ctx->gfx_flush_in_progress = false; + if (r600_check_device_reset(&ctx->b)) return; + + /* If the state tracker is flushing the GFX IB, r600_flush_from_st is + * responsible for flushing the DMA IB and merging the fences from both. + * This code is only needed when the driver flushes the GFX IB + * internally, and it never asks for a fence handle. + */ + if (radeon_emitted(ctx->b.dma.cs, 0)) { + assert(fence == NULL); /* internal flushes only */ + ctx->b.dma.flush(ctx, flags, NULL); } + ctx->gfx_flush_in_progress = true; + r600_preflush_suspend_features(&ctx->b); ctx->b.flags |= SI_CONTEXT_CS_PARTIAL_FLUSH | SI_CONTEXT_PS_PARTIAL_FLUSH; - /* The kernel doesn't flush TC for VI correctly (need TC_WB_ACTION_ENA). */ - if (ctx->b.chip_class == VI) + + /* DRM 3.1.0 doesn't flush TC for VI correctly. */ + if (ctx->b.chip_class == VI && ctx->b.screen->info.drm_minor <= 1) ctx->b.flags |= SI_CONTEXT_INV_GLOBAL_L2 | SI_CONTEXT_INV_VMEM_L1; - si_emit_cache_flush(ctx, NULL); - - /* force to keep tiling flags */ - flags |= RADEON_FLUSH_KEEP_TILING_FLAGS; + si_emit_cache_flush(ctx); if (ctx->trace_buf) si_trace_emit(ctx); if (ctx->is_debug) { - unsigned i; - /* Save the IB for debug contexts. */ - free(ctx->last_ib); - ctx->last_ib_dw_size = cs->cdw; - ctx->last_ib = malloc(cs->cdw * 4); - memcpy(ctx->last_ib, cs->buf, cs->cdw * 4); + radeon_clear_saved_cs(&ctx->last_gfx); + radeon_save_cs(ws, cs, &ctx->last_gfx); r600_resource_reference(&ctx->last_trace_buf, ctx->trace_buf); r600_resource_reference(&ctx->trace_buf, NULL); - - /* Save the buffer list. */ - if (ctx->last_bo_list) { - for (i = 0; i < ctx->last_bo_count; i++) - pb_reference(&ctx->last_bo_list[i].buf, NULL); - free(ctx->last_bo_list); - } - ctx->last_bo_count = ws->cs_get_buffer_list(cs, NULL); - ctx->last_bo_list = calloc(ctx->last_bo_count, - sizeof(ctx->last_bo_list[0])); - ws->cs_get_buffer_list(cs, ctx->last_bo_list); } /* Flush the CS. */ - ws->cs_flush(cs, flags, &ctx->last_gfx_fence); - + ws->cs_flush(cs, flags, &ctx->b.last_gfx_fence); if (fence) - ws->fence_reference(fence, ctx->last_gfx_fence); + ws->fence_reference(fence, ctx->b.last_gfx_fence); + ctx->b.num_gfx_cs_flushes++; /* Check VM faults if needed. */ - if (ctx->screen->b.debug_flags & DBG_CHECK_VM) - si_check_vm_faults(ctx); + if (ctx->screen->b.debug_flags & DBG_CHECK_VM) { + /* Use conservative timeout 800ms, after which we won't wait any + * longer and assume the GPU is hung. + */ + ctx->b.ws->fence_wait(ctx->b.ws, ctx->b.last_gfx_fence, 800*1000*1000); + + si_check_vm_faults(&ctx->b, &ctx->last_gfx, RING_GFX); + } si_begin_new_cs(ctx); ctx->gfx_flush_in_progress = false; @@ -174,7 +171,7 @@ /* Create a buffer used for writing trace IDs and initialize it to 0. */ assert(!ctx->trace_buf); ctx->trace_buf = (struct r600_resource*) - pipe_buffer_create(ctx->b.b.screen, PIPE_BIND_CUSTOM, + pipe_buffer_create(ctx->b.b.screen, 0, PIPE_USAGE_STAGING, 4); if (ctx->trace_buf) pipe_buffer_write_nooverlap(&ctx->b.b, &ctx->trace_buf->b.b, @@ -237,17 +234,18 @@ r600_postflush_resume_features(&ctx->b); - ctx->b.initial_gfx_cs_size = ctx->b.gfx.cs->cdw; + assert(!ctx->b.gfx.cs->prev_dw); + ctx->b.initial_gfx_cs_size = ctx->b.gfx.cs->current.cdw; /* Invalidate various draw states so that they are emitted before * the first draw call. */ si_invalidate_draw_sh_constants(ctx); + ctx->last_index_size = -1; ctx->last_primitive_restart_en = -1; ctx->last_restart_index = SI_RESTART_INDEX_UNKNOWN; ctx->last_gs_out_prim = -1; ctx->last_prim = -1; ctx->last_multi_vgt_param = -1; - ctx->last_ls_hs_config = -1; ctx->last_rast_prim = -1; ctx->last_sc_line_stipple = ~0; ctx->last_vtx_reuse_depth = -1; diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/si_perfcounter.c mesa-17.0.7/src/gallium/drivers/radeonsi/si_perfcounter.c --- mesa-12.0.6/src/gallium/drivers/radeonsi/si_perfcounter.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/si_perfcounter.c 2017-06-01 10:37:10.000000000 +0000 @@ -27,7 +27,6 @@ #include "radeon/r600_cs.h" #include "radeon/r600_query.h" -#include "radeon/r600_pipe_common.h" #include "util/u_memory.h" #include "si_pipe.h" @@ -591,35 +590,9 @@ { struct radeon_winsys_cs *cs = ctx->gfx.cs; - if (ctx->screen->chip_class == CIK) { - /* Two EOP events are required to make all engines go idle - * (and optional cache flushes executed) before the timestamp - * is written. - */ - radeon_emit(cs, PKT3(PKT3_EVENT_WRITE_EOP, 4, 0)); - radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_BOTTOM_OF_PIPE_TS) | - EVENT_INDEX(5)); - radeon_emit(cs, va); - radeon_emit(cs, (va >> 32) | EOP_DATA_SEL(1)); - radeon_emit(cs, 0); /* immediate data */ - radeon_emit(cs, 0); /* unused */ - } - - radeon_emit(cs, PKT3(PKT3_EVENT_WRITE_EOP, 4, 0)); - radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_BOTTOM_OF_PIPE_TS) | - EVENT_INDEX(5)); - radeon_emit(cs, va); - radeon_emit(cs, (va >> 32) | EOP_DATA_SEL(1)); - radeon_emit(cs, 0); /* immediate data */ - radeon_emit(cs, 0); /* unused */ - - radeon_emit(cs, PKT3(PKT3_WAIT_REG_MEM, 5, 0)); - radeon_emit(cs, WAIT_REG_MEM_EQUAL | WAIT_REG_MEM_MEM_SPACE(1)); - radeon_emit(cs, va); - radeon_emit(cs, va >> 32); - radeon_emit(cs, 0); /* reference value */ - radeon_emit(cs, 0xffffffff); /* mask */ - radeon_emit(cs, 4); /* poll interval */ + r600_gfx_write_event_eop(ctx, EVENT_TYPE_BOTTOM_OF_PIPE_TS, 0, 1, + buffer, va, 1, 0); + r600_gfx_wait_fence(ctx, va, 0, 0xffffffff); radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_PERFCOUNTER_SAMPLE) | EVENT_INDEX(0)); @@ -715,14 +688,10 @@ return; pc->num_start_cs_dwords = 14; - pc->num_stop_cs_dwords = 20; + pc->num_stop_cs_dwords = 14 + r600_gfx_write_fence_dwords(&screen->b); pc->num_instance_cs_dwords = 3; pc->num_shaders_cs_dwords = 4; - if (screen->b.chip_class == CIK) { - pc->num_stop_cs_dwords += 6; - } - pc->num_shader_types = ARRAY_SIZE(si_pc_shader_type_bits); pc->shader_type_suffixes = si_pc_shader_type_suffixes; pc->shader_type_bits = si_pc_shader_type_bits; diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/si_pipe.c mesa-17.0.7/src/gallium/drivers/radeonsi/si_pipe.c --- mesa-12.0.6/src/gallium/drivers/radeonsi/si_pipe.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/si_pipe.c 2017-06-01 10:37:10.000000000 +0000 @@ -22,15 +22,18 @@ */ #include "si_pipe.h" -#include "si_shader.h" #include "si_public.h" +#include "si_shader_internal.h" #include "sid.h" -#include "radeon/radeon_llvm_emit.h" #include "radeon/radeon_uvd.h" #include "util/u_memory.h" #include "util/u_suballoc.h" #include "vl/vl_decoder.h" +#include "../ddebug/dd_util.h" + +#define SI_LLVM_DEFAULT_FEATURES \ + "+DumpCode,+vgpr-spilling,-fp32-denormals,+fp64-denormals,-xnack" /* * pipe_context @@ -40,6 +43,12 @@ struct si_context *sctx = (struct si_context *)context; int i; + /* Unreference the framebuffer normally to disable related logic + * properly. + */ + struct pipe_framebuffer_state fb = {}; + context->set_framebuffer_state(context, &fb); + si_release_all_descriptors(sctx); if (sctx->ce_suballocator) @@ -54,7 +63,6 @@ free(sctx->border_color_table); r600_resource_reference(&sctx->scratch_buffer, NULL); r600_resource_reference(&sctx->compute_scratch_buffer, NULL); - sctx->b.ws->fence_reference(&sctx->last_gfx_fence, NULL); si_pm4_free_state(sctx, sctx->init_config, ~0); if (sctx->init_config_gs_rings) @@ -74,7 +82,6 @@ sctx->b.b.delete_blend_state(&sctx->b.b, sctx->custom_blend_fastclear); if (sctx->custom_blend_dcc_decompress) sctx->b.b.delete_blend_state(&sctx->b.b, sctx->custom_blend_dcc_decompress); - util_unreference_framebuffer_state(&sctx->framebuffer.state); if (sctx->blitter) util_blitter_destroy(sctx->blitter); @@ -85,12 +92,8 @@ r600_resource_reference(&sctx->trace_buf, NULL); r600_resource_reference(&sctx->last_trace_buf, NULL); - free(sctx->last_ib); - if (sctx->last_bo_list) { - for (i = 0; i < sctx->last_bo_count; i++) - pb_reference(&sctx->last_bo_list[i].buf, NULL); - free(sctx->last_bo_list); - } + radeon_clear_saved_cs(&sctx->last_gfx); + FREE(sctx); } @@ -102,14 +105,45 @@ return sctx->b.ws->ctx_query_reset_status(sctx->b.ctx); } +/* Apitrace profiling: + * 1) qapitrace : Tools -> Profile: Measure CPU & GPU times + * 2) In the middle panel, zoom in (mouse wheel) on some bad draw call + * and remember its number. + * 3) In Mesa, enable queries and performance counters around that draw + * call and print the results. + * 4) glretrace --benchmark --markers .. + */ +static void si_emit_string_marker(struct pipe_context *ctx, + const char *string, int len) +{ + struct si_context *sctx = (struct si_context *)ctx; + + dd_parse_apitrace_marker(string, len, &sctx->apitrace_call_number); +} + +static LLVMTargetMachineRef +si_create_llvm_target_machine(struct si_screen *sscreen) +{ + const char *triple = "amdgcn--"; + + return LLVMCreateTargetMachine(si_llvm_get_amdgpu_target(triple), triple, + r600_get_llvm_processor_name(sscreen->b.family), +#if HAVE_LLVM >= 0x0308 + sscreen->b.debug_flags & DBG_SI_SCHED ? + SI_LLVM_DEFAULT_FEATURES ",+si-scheduler" : +#endif + SI_LLVM_DEFAULT_FEATURES, + LLVMCodeGenLevelDefault, + LLVMRelocDefault, + LLVMCodeModelDefault); +} + static struct pipe_context *si_create_context(struct pipe_screen *screen, void *priv, unsigned flags) { struct si_context *sctx = CALLOC_STRUCT(si_context); struct si_screen* sscreen = (struct si_screen *)screen; struct radeon_winsys *ws = sscreen->b.ws; - LLVMTargetRef r600_target; - const char *triple = "amdgcn--"; int shader, i; if (!sctx) @@ -118,14 +152,18 @@ if (sscreen->b.debug_flags & DBG_CHECK_VM) flags |= PIPE_CONTEXT_DEBUG; + if (flags & PIPE_CONTEXT_DEBUG) + sscreen->record_llvm_ir = true; /* racy but not critical */ + sctx->b.b.screen = screen; /* this must be set first */ sctx->b.b.priv = priv; sctx->b.b.destroy = si_destroy_context; + sctx->b.b.emit_string_marker = si_emit_string_marker; sctx->b.set_atom_dirty = (void *)si_set_atom_dirty; sctx->screen = sscreen; /* Easy accessing of screen/winsys. */ sctx->is_debug = (flags & PIPE_CONTEXT_DEBUG) != 0; - if (!r600_common_context_init(&sctx->b, &sscreen->b)) + if (!r600_common_context_init(&sctx->b, &sscreen->b, flags)) goto fail; if (sscreen->b.info.drm_major == 3) @@ -167,8 +205,7 @@ sctx->ce_suballocator = u_suballocator_create(&sctx->b.b, 1024 * 1024, - 64, PIPE_BIND_CUSTOM, - PIPE_USAGE_DEFAULT, FALSE); + 0, PIPE_USAGE_DEFAULT, false); if (!sctx->ce_suballocator) goto fail; } @@ -182,7 +219,7 @@ goto fail; sctx->border_color_buffer = (struct r600_resource*) - pipe_buffer_create(screen, PIPE_BIND_CUSTOM, PIPE_USAGE_DEFAULT, + pipe_buffer_create(screen, 0, PIPE_USAGE_DEFAULT, SI_MAX_BORDER_COLORS * sizeof(*sctx->border_color_table)); if (!sctx->border_color_buffer) @@ -248,24 +285,27 @@ R600_COHERENCY_SHADER); } - /* XXX: This is the maximum value allowed. I'm not sure how to compute - * this for non-cs shaders. Using the wrong value here can result in - * GPU lockups, but the maximum value seems to always work. + uint64_t max_threads_per_block; + screen->get_compute_param(screen, PIPE_SHADER_IR_TGSI, + PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK, + &max_threads_per_block); + + /* The maximum number of scratch waves. Scratch space isn't divided + * evenly between CUs. The number is only a function of the number of CUs. + * We can decrease the constant to decrease the scratch buffer size. + * + * sctx->scratch_waves must be >= the maximum posible size of + * 1 threadgroup, so that the hw doesn't hang from being unable + * to start any. + * + * The recommended value is 4 per CU at most. Higher numbers don't + * bring much benefit, but they still occupy chip resources (think + * async compute). I've seen ~2% performance difference between 4 and 32. */ - sctx->scratch_waves = 32 * sscreen->b.info.num_good_compute_units; + sctx->scratch_waves = MAX2(32 * sscreen->b.info.num_good_compute_units, + max_threads_per_block / 64); - /* Initialize LLVM TargetMachine */ - r600_target = radeon_llvm_get_r600_target(triple); - sctx->tm = LLVMCreateTargetMachine(r600_target, triple, - r600_get_llvm_processor_name(sscreen->b.family), -#if HAVE_LLVM >= 0x0308 - sscreen->b.debug_flags & DBG_SI_SCHED ? - "+DumpCode,+vgpr-spilling,+si-scheduler" : -#endif - "+DumpCode,+vgpr-spilling", - LLVMCodeGenLevelDefault, - LLVMRelocDefault, - LLVMCodeModelDefault); + sctx->tm = si_create_llvm_target_machine(sscreen); return &sctx->b.b; fail: @@ -277,6 +317,16 @@ /* * pipe_screen */ +static bool si_have_tgsi_compute(struct si_screen *sscreen) +{ + /* Old kernels disallowed some register writes for SI + * that are used for indirect dispatches. */ + return HAVE_LLVM >= 0x309 && + (sscreen->b.chip_class >= CIK || + sscreen->b.info.drm_major == 3 || + (sscreen->b.info.drm_major == 2 && + sscreen->b.info.drm_minor >= 45)); +} static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param) { @@ -317,6 +367,7 @@ case PIPE_CAP_START_INSTANCE: case PIPE_CAP_NPOT_TEXTURES: case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES: + case PIPE_CAP_MIXED_COLOR_DEPTH_BITS: case PIPE_CAP_VERTEX_COLOR_CLAMPED: case PIPE_CAP_FRAGMENT_COLOR_CLAMPED: case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER: @@ -355,6 +406,14 @@ case PIPE_CAP_TGSI_PACK_HALF_FLOAT: case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT: case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR: + case PIPE_CAP_GENERATE_MIPMAP: + case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED: + case PIPE_CAP_STRING_MARKER: + case PIPE_CAP_CLEAR_TEXTURE: + case PIPE_CAP_CULL_DISTANCE: + case PIPE_CAP_TGSI_ARRAY_COMPONENTS: + case PIPE_CAP_TGSI_CAN_READ_OUTPUTS: + case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY: return 1; case PIPE_CAP_RESOURCE_FROM_USER_MEMORY: @@ -383,15 +442,13 @@ return HAVE_LLVM >= 0x0309 ? 4 : 0; case PIPE_CAP_GLSL_FEATURE_LEVEL: - if (pscreen->get_shader_param(pscreen, PIPE_SHADER_COMPUTE, - PIPE_SHADER_CAP_SUPPORTED_IRS) & - (1 << PIPE_SHADER_IR_TGSI)) - return 430; + if (si_have_tgsi_compute(sscreen)) + return 450; return HAVE_LLVM >= 0x0309 ? 420 : HAVE_LLVM >= 0x0307 ? 410 : 330; case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE: - return MIN2(sscreen->b.info.vram_size, 0xFFFFFFFF); + return MIN2(sscreen->b.info.max_alloc_size, INT_MAX); case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY: return 0; @@ -403,16 +460,20 @@ case PIPE_CAP_FAKE_SW_MSAA: case PIPE_CAP_TEXTURE_GATHER_OFFSETS: case PIPE_CAP_VERTEXID_NOBASE: - case PIPE_CAP_CLEAR_TEXTURE: + case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES: + case PIPE_CAP_TGSI_VOTE: + case PIPE_CAP_MAX_WINDOW_RECTANGLES: + case PIPE_CAP_NATIVE_FENCE_FD: + case PIPE_CAP_TGSI_FS_FBFETCH: + return 0; + + case PIPE_CAP_QUERY_BUFFER_OBJECT: + return si_have_tgsi_compute(sscreen); + case PIPE_CAP_DRAW_PARAMETERS: case PIPE_CAP_MULTI_DRAW_INDIRECT: case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS: - case PIPE_CAP_GENERATE_MIPMAP: - case PIPE_CAP_STRING_MARKER: - case PIPE_CAP_QUERY_BUFFER_OBJECT: - case PIPE_CAP_CULL_DISTANCE: - case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES: - return 0; + return sscreen->has_draw_indirect_multi; case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS: return 30; @@ -424,6 +485,7 @@ case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS: return sscreen->b.has_streamout ? 4 : 0; case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME: + case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS: return sscreen->b.has_streamout ? 1 : 0; case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS: case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS: @@ -457,6 +519,8 @@ case PIPE_CAP_MAX_VIEWPORTS: return R600_MAX_VIEWPORTS; + case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS: + return 8; /* Timer queries, present when the clock frequency is non zero. */ case PIPE_CAP_QUERY_TIMESTAMP: @@ -520,12 +584,7 @@ case PIPE_SHADER_CAP_SUPPORTED_IRS: { int ir = 1 << PIPE_SHADER_IR_NATIVE; - /* Old kernels disallowed some register writes for SI - * that are used for indirect dispatches. */ - if (HAVE_LLVM >= 0x309 && (sscreen->b.chip_class >= CIK || - sscreen->b.info.drm_major == 3 || - (sscreen->b.info.drm_major == 2 && - sscreen->b.info.drm_minor >= 45))) + if (si_have_tgsi_compute(sscreen)) ir |= 1 << PIPE_SHADER_IR_TGSI; return ir; @@ -538,7 +597,7 @@ pscreen->get_compute_param(pscreen, PIPE_SHADER_IR_TGSI, PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE, &max_const_buffer_size); - return max_const_buffer_size; + return MIN2(max_const_buffer_size, INT_MAX); } default: /* If compute shaders don't require a special value @@ -552,13 +611,13 @@ } switch (param) { + /* Shader limits. */ case PIPE_SHADER_CAP_MAX_INSTRUCTIONS: case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS: case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS: case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS: - return 16384; case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH: - return 32; + return 16384; case PIPE_SHADER_CAP_MAX_INPUTS: return shader == PIPE_SHADER_VERTEX ? SI_NUM_VERTEX_BUFFERS : 32; case PIPE_SHADER_CAP_MAX_OUTPUTS: @@ -569,46 +628,47 @@ return 4096 * sizeof(float[4]); /* actually only memory limits this */ case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: return SI_NUM_CONST_BUFFERS; - case PIPE_SHADER_CAP_MAX_PREDS: - return 0; /* FIXME */ + case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: + case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS: + return SI_NUM_SAMPLERS; + case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: + return HAVE_LLVM >= 0x0309 ? SI_NUM_SHADER_BUFFERS : 0; + case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: + return HAVE_LLVM >= 0x0309 ? SI_NUM_IMAGES : 0; + case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: + return 32; + case PIPE_SHADER_CAP_PREFERRED_IR: + return PIPE_SHADER_IR_TGSI; + case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: + return 3; + + /* Supported boolean features. */ case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: - return 1; case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED: - return 1; - case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: - /* Indirection of geometry shader input dimension is not - * handled yet - */ - return shader != PIPE_SHADER_GEOMETRY; case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: - return 1; case PIPE_SHADER_CAP_INTEGERS: + case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED: + case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: return 1; - case PIPE_SHADER_CAP_SUBROUTINES: - return 0; - case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: - case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS: - return SI_NUM_SAMPLERS; - case PIPE_SHADER_CAP_PREFERRED_IR: - return PIPE_SHADER_IR_TGSI; - case PIPE_SHADER_CAP_SUPPORTED_IRS: - return 0; + case PIPE_SHADER_CAP_DOUBLES: return HAVE_LLVM >= 0x0307; + + case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: + /* TODO: Indirection of geometry shader input dimension is not + * handled yet + */ + return shader != PIPE_SHADER_GEOMETRY; + + /* Unsupported boolean features. */ + case PIPE_SHADER_CAP_MAX_PREDS: + case PIPE_SHADER_CAP_SUBROUTINES: + case PIPE_SHADER_CAP_SUPPORTED_IRS: case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED: case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED: return 0; - case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED: - case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: - return 1; - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: - return 32; - case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: - return HAVE_LLVM >= 0x0309 ? SI_NUM_SHADER_BUFFERS : 0; - case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: - return HAVE_LLVM >= 0x0309 ? SI_NUM_IMAGES : 0; } return 0; } @@ -620,6 +680,7 @@ sscreen->vs_prologs, sscreen->vs_epilogs, sscreen->tcs_epilogs, + sscreen->gs_prologs, sscreen->ps_prologs, sscreen->ps_epilogs }; @@ -631,6 +692,13 @@ if (!sscreen->b.ws->unref(sscreen->b.ws)) return; + if (util_queue_is_initialized(&sscreen->shader_compiler_queue)) + util_queue_destroy(&sscreen->shader_compiler_queue); + + for (i = 0; i < ARRAY_SIZE(sscreen->tm); i++) + if (sscreen->tm[i]) + LLVMDisposeTargetMachine(sscreen->tm[i]); + /* Free shader parts. */ for (i = 0; i < ARRAY_SIZE(parts); i++) { while (parts[i]) { @@ -668,6 +736,7 @@ case CHIP_FIJI: case CHIP_POLARIS10: case CHIP_POLARIS11: + case CHIP_POLARIS12: sscreen->gs_table_depth = 32; return true; default: @@ -675,9 +744,40 @@ } } +static void si_handle_env_var_force_family(struct si_screen *sscreen) +{ + const char *family = debug_get_option("SI_FORCE_FAMILY", NULL); + unsigned i; + + if (!family) + return; + + for (i = CHIP_TAHITI; i < CHIP_LAST; i++) { + if (!strcmp(family, r600_get_llvm_processor_name(i))) { + /* Override family and chip_class. */ + sscreen->b.family = sscreen->b.info.family = i; + + if (i >= CHIP_TONGA) + sscreen->b.chip_class = sscreen->b.info.chip_class = VI; + else if (i >= CHIP_BONAIRE) + sscreen->b.chip_class = sscreen->b.info.chip_class = CIK; + else + sscreen->b.chip_class = sscreen->b.info.chip_class = SI; + + /* Don't submit any IBs. */ + setenv("RADEON_NOOP", "1", 1); + return; + } + } + + fprintf(stderr, "radeonsi: Unknown family: %s\n", family); + exit(1); +} + struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws) { struct si_screen *sscreen = CALLOC_STRUCT(si_screen); + unsigned num_cpus, num_compiler_threads, i; if (!sscreen) { return NULL; @@ -688,7 +788,6 @@ sscreen->b.b.destroy = si_destroy_screen; sscreen->b.b.get_param = si_get_param; sscreen->b.b.get_shader_param = si_get_shader_param; - sscreen->b.b.is_format_supported = si_is_format_supported; sscreen->b.b.resource_create = r600_resource_create_common; si_init_screen_state_functions(sscreen); @@ -700,9 +799,36 @@ return NULL; } - if (!debug_get_bool_option("RADEON_DISABLE_PERFCOUNTERS", FALSE)) + si_handle_env_var_force_family(sscreen); + + if (!debug_get_bool_option("RADEON_DISABLE_PERFCOUNTERS", false)) si_init_perfcounters(sscreen); + /* Hawaii has a bug with offchip buffers > 256 that can be worked + * around by setting 4K granularity. + */ + sscreen->tess_offchip_block_dw_size = + sscreen->b.family == CHIP_HAWAII ? 4096 : 8192; + + sscreen->has_distributed_tess = + sscreen->b.chip_class >= VI && + sscreen->b.info.max_se >= 2; + + sscreen->has_draw_indirect_multi = + (sscreen->b.family >= CHIP_POLARIS10) || + (sscreen->b.chip_class == VI && + sscreen->b.info.pfp_fw_version >= 121 && + sscreen->b.info.me_fw_version >= 87) || + (sscreen->b.chip_class == CIK && + sscreen->b.info.pfp_fw_version >= 211 && + sscreen->b.info.me_fw_version >= 173) || + (sscreen->b.chip_class == SI && + sscreen->b.info.pfp_fw_version >= 121 && + sscreen->b.info.me_fw_version >= 87); + + sscreen->has_ds_bpermute = HAVE_LLVM >= 0x0309 && + sscreen->b.chip_class >= VI; + sscreen->b.has_cp_dma = true; sscreen->b.has_streamout = true; pipe_mutex_init(sscreen->shader_parts_mutex); @@ -710,9 +836,24 @@ HAVE_LLVM < 0x0308 || (sscreen->b.debug_flags & DBG_MONOLITHIC_SHADERS) != 0; - if (debug_get_bool_option("RADEON_DUMP_SHADERS", FALSE)) + sscreen->b.barrier_flags.cp_to_L2 = SI_CONTEXT_INV_SMEM_L1 | + SI_CONTEXT_INV_VMEM_L1 | + SI_CONTEXT_INV_GLOBAL_L2; + sscreen->b.barrier_flags.compute_to_L2 = SI_CONTEXT_CS_PARTIAL_FLUSH; + + if (debug_get_bool_option("RADEON_DUMP_SHADERS", false)) sscreen->b.debug_flags |= DBG_FS | DBG_VS | DBG_GS | DBG_PS | DBG_CS; + /* Only enable as many threads as we have target machines and CPUs. */ + num_cpus = sysconf(_SC_NPROCESSORS_ONLN); + num_compiler_threads = MIN2(num_cpus, ARRAY_SIZE(sscreen->tm)); + + for (i = 0; i < num_compiler_threads; i++) + sscreen->tm[i] = si_create_llvm_target_machine(sscreen); + + util_queue_init(&sscreen->shader_compiler_queue, "si_shader", + 32, num_compiler_threads); + /* Create the auxiliary context. This must be done last. */ sscreen->b.aux_context = sscreen->b.b.context_create(&sscreen->b.b, NULL, 0); diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/si_pipe.h mesa-17.0.7/src/gallium/drivers/radeonsi/si_pipe.h --- mesa-12.0.6/src/gallium/drivers/radeonsi/si_pipe.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/si_pipe.h 2017-06-01 10:37:10.000000000 +0000 @@ -26,9 +26,7 @@ #ifndef SI_PIPE_H #define SI_PIPE_H -#include "si_state.h" - -#include +#include "si_shader.h" #ifdef PIPE_ARCH_BIG_ENDIAN #define SI_BIG_ENDIAN 1 @@ -52,27 +50,26 @@ #define SI_CONTEXT_INV_VMEM_L1 (R600_CONTEXT_PRIVATE_FLAG << 2) /* Used by everything except CB/DB, can be bypassed (SLC=1). Other names: TC L2 */ #define SI_CONTEXT_INV_GLOBAL_L2 (R600_CONTEXT_PRIVATE_FLAG << 3) +/* Write dirty L2 lines back to memory (shader and CP DMA stores), but don't + * invalidate L2. SI-CIK can't do it, so they will do complete invalidation. */ +#define SI_CONTEXT_WRITEBACK_GLOBAL_L2 (R600_CONTEXT_PRIVATE_FLAG << 4) /* Framebuffer caches. */ -#define SI_CONTEXT_FLUSH_AND_INV_CB_META (R600_CONTEXT_PRIVATE_FLAG << 4) -#define SI_CONTEXT_FLUSH_AND_INV_DB_META (R600_CONTEXT_PRIVATE_FLAG << 5) -#define SI_CONTEXT_FLUSH_AND_INV_DB (R600_CONTEXT_PRIVATE_FLAG << 6) -#define SI_CONTEXT_FLUSH_AND_INV_CB (R600_CONTEXT_PRIVATE_FLAG << 7) +#define SI_CONTEXT_FLUSH_AND_INV_CB_META (R600_CONTEXT_PRIVATE_FLAG << 5) +#define SI_CONTEXT_FLUSH_AND_INV_DB_META (R600_CONTEXT_PRIVATE_FLAG << 6) +#define SI_CONTEXT_FLUSH_AND_INV_DB (R600_CONTEXT_PRIVATE_FLAG << 7) +#define SI_CONTEXT_FLUSH_AND_INV_CB (R600_CONTEXT_PRIVATE_FLAG << 8) /* Engine synchronization. */ -#define SI_CONTEXT_VS_PARTIAL_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 8) -#define SI_CONTEXT_PS_PARTIAL_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 9) -#define SI_CONTEXT_CS_PARTIAL_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 10) -#define SI_CONTEXT_VGT_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 11) -#define SI_CONTEXT_VGT_STREAMOUT_SYNC (R600_CONTEXT_PRIVATE_FLAG << 12) +#define SI_CONTEXT_VS_PARTIAL_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 9) +#define SI_CONTEXT_PS_PARTIAL_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 10) +#define SI_CONTEXT_CS_PARTIAL_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 11) +#define SI_CONTEXT_VGT_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 12) +#define SI_CONTEXT_VGT_STREAMOUT_SYNC (R600_CONTEXT_PRIVATE_FLAG << 13) #define SI_CONTEXT_FLUSH_AND_INV_FRAMEBUFFER (SI_CONTEXT_FLUSH_AND_INV_CB | \ SI_CONTEXT_FLUSH_AND_INV_CB_META | \ SI_CONTEXT_FLUSH_AND_INV_DB | \ SI_CONTEXT_FLUSH_AND_INV_DB_META) -#define SI_ENCODE_TRACE_POINT(id) (0xcafe0000 | ((id) & 0xffff)) -#define SI_IS_TRACE_POINT(x) (((x) & 0xcafe0000) == 0xcafe0000) -#define SI_GET_TRACE_POINT_ID(x) ((x) & 0xffff) - #define SI_MAX_BORDER_COLORS 4096 struct si_compute; @@ -82,14 +79,20 @@ struct si_screen { struct r600_common_screen b; unsigned gs_table_depth; + unsigned tess_offchip_block_dw_size; + bool has_distributed_tess; + bool has_draw_indirect_multi; + bool has_ds_bpermute; /* Whether shaders are monolithic (1-part) or separate (3-part). */ bool use_monolithic_shaders; + bool record_llvm_ir; pipe_mutex shader_parts_mutex; struct si_shader_part *vs_prologs; struct si_shader_part *vs_epilogs; struct si_shader_part *tcs_epilogs; + struct si_shader_part *gs_prologs; struct si_shader_part *ps_prologs; struct si_shader_part *ps_epilogs; @@ -107,6 +110,10 @@ */ pipe_mutex shader_cache_mutex; struct hash_table *shader_cache; + + /* Shader compiler queue for multithreaded compilation. */ + struct util_queue shader_compiler_queue; + LLVMTargetMachineRef tm[4]; /* used by the queue only */ }; struct si_blend_color { @@ -116,15 +123,22 @@ struct si_sampler_view { struct pipe_sampler_view base; - struct list_head list; /* [0..7] = image descriptor * [4..7] = buffer descriptor */ uint32_t state[8]; uint32_t fmask_state[8]; + const struct radeon_surf_level *base_level_info; + unsigned base_level; + unsigned block_width; bool is_stencil_sampler; }; +#define SI_SAMPLER_STATE_MAGIC 0x34f1c35a + struct si_sampler_state { +#ifdef DEBUG + unsigned magic; +#endif uint32_t val[4]; }; @@ -133,6 +147,7 @@ struct si_compute *emitted_program; unsigned offset; bool initialized; + bool uses_scratch; }; struct si_textures_info { @@ -142,9 +157,9 @@ }; struct si_images_info { - struct si_descriptors desc; struct pipe_image_view views[SI_NUM_IMAGES]; uint32_t compressed_colortex_mask; + unsigned enabled_mask; }; struct si_framebuffer { @@ -152,15 +167,17 @@ struct pipe_framebuffer_state state; unsigned nr_samples; unsigned log_samples; - unsigned cb0_is_integer; unsigned compressed_cb_mask; + unsigned colorbuf_enabled_4bit; unsigned spi_shader_col_format; unsigned spi_shader_col_format_alpha; unsigned spi_shader_col_format_blend; unsigned spi_shader_col_format_blend_alpha; - unsigned color_is_int8; /* bitmask */ + unsigned color_is_int8; + unsigned color_is_int10; unsigned dirty_cbufs; bool dirty_zsbuf; + bool any_dst_linear; }; struct si_clip_state { @@ -202,10 +219,10 @@ bool ce_need_synchronization; struct u_suballocator *ce_suballocator; - struct pipe_fence_handle *last_gfx_fence; struct si_shader_ctx_state fixed_func_tcs_shader; - LLVMTargetMachineRef tm; + LLVMTargetMachineRef tm; /* only non-threaded compilation */ bool gfx_flush_in_progress; + bool compute_is_busy; /* Atoms (direct states). */ union si_state_atoms atoms; @@ -215,7 +232,6 @@ union si_state emitted; /* Atom declarations. */ - struct r600_atom cache_flush; struct si_framebuffer framebuffer; struct si_sample_locs msaa_sample_locs; struct r600_atom db_render_state; @@ -247,9 +263,14 @@ struct si_vertex_element *vertex_elements; unsigned sprite_coord_enable; bool flatshade; + bool do_update_shaders; /* shader descriptors */ struct si_descriptors vertex_buffers; + struct si_descriptors descriptors[SI_NUM_DESCS]; + unsigned descriptors_dirty; + unsigned shader_pointers_dirty; + unsigned compressed_tex_shader_mask; struct si_buffer_resources rw_buffers; struct si_buffer_resources const_buffers[SI_NUM_SHADERS]; struct si_buffer_resources shader_buffers[SI_NUM_SHADERS]; @@ -269,6 +290,7 @@ /* Vertex and index buffers. */ bool vertex_buffers_dirty; + bool vertex_buffer_pointer_dirty; struct pipe_index_buffer index_buffer; struct pipe_vertex_buffer vertex_buffer[SI_NUM_VERTEX_BUFFERS]; @@ -290,24 +312,25 @@ bool occlusion_queries_disabled; /* Emitted draw state. */ + int last_index_size; int last_base_vertex; int last_start_instance; + int last_drawid; int last_sh_base_reg; int last_primitive_restart_en; int last_restart_index; int last_gs_out_prim; int last_prim; int last_multi_vgt_param; - int last_ls_hs_config; int last_rast_prim; unsigned last_sc_line_stipple; int last_vtx_reuse_depth; int current_rast_prim; /* primitive type after TES, GS */ - unsigned last_gsvs_itemsize; + bool gs_tri_strip_adj_fix; /* Scratch buffer */ struct r600_resource *scratch_buffer; - boolean emit_scratch_reloc; + bool emit_scratch_reloc; unsigned scratch_waves; unsigned spi_tmpring_size; @@ -318,17 +341,19 @@ struct si_shader_selector *last_tcs; int last_num_tcs_input_cp; int last_tes_sh_base; + unsigned last_num_patches; /* Debug state. */ bool is_debug; - uint32_t *last_ib; - unsigned last_ib_dw_size; + struct radeon_saved_cs last_gfx; struct r600_resource *last_trace_buf; struct r600_resource *trace_buf; unsigned trace_id; uint64_t dmesg_timestamp; - unsigned last_bo_count; - struct radeon_bo_list_item *last_bo_list; + unsigned apitrace_call_number; + + /* Other state */ + bool need_check_render_feedback; }; /* cik_sdma.c */ @@ -347,14 +372,29 @@ const struct pipe_box *src_box); /* si_cp_dma.c */ +#define SI_CPDMA_SKIP_CHECK_CS_SPACE (1 << 0) /* don't call need_cs_space */ +#define SI_CPDMA_SKIP_SYNC_AFTER (1 << 1) /* don't wait for DMA after the copy */ +#define SI_CPDMA_SKIP_SYNC_BEFORE (1 << 2) /* don't wait for DMA before the copy (RAW hazards) */ +#define SI_CPDMA_SKIP_GFX_SYNC (1 << 3) /* don't flush caches and don't wait for PS/CS */ +#define SI_CPDMA_SKIP_BO_LIST_UPDATE (1 << 4) /* don't update the BO list */ +#define SI_CPDMA_SKIP_ALL (SI_CPDMA_SKIP_CHECK_CS_SPACE | \ + SI_CPDMA_SKIP_SYNC_AFTER | \ + SI_CPDMA_SKIP_SYNC_BEFORE | \ + SI_CPDMA_SKIP_GFX_SYNC | \ + SI_CPDMA_SKIP_BO_LIST_UPDATE) + void si_copy_buffer(struct si_context *sctx, struct pipe_resource *dst, struct pipe_resource *src, - uint64_t dst_offset, uint64_t src_offset, unsigned size); + uint64_t dst_offset, uint64_t src_offset, unsigned size, + unsigned user_flags); +void cik_prefetch_TC_L2_async(struct si_context *sctx, struct pipe_resource *buf, + uint64_t offset, unsigned size); void si_init_cp_dma_functions(struct si_context *sctx); /* si_debug.c */ void si_init_debug_functions(struct si_context *sctx); -void si_check_vm_faults(struct si_context *sctx); +void si_check_vm_faults(struct r600_common_context *ctx, + struct radeon_saved_cs *saved, enum ring_type ring); bool si_replace_shader(unsigned num, struct radeon_shader_binary *binary); /* si_dma.c */ @@ -383,21 +423,10 @@ * common helpers */ -static inline struct r600_resource * -si_resource_create_custom(struct pipe_screen *screen, - unsigned usage, unsigned size) -{ - assert(size); - return r600_resource(pipe_buffer_create(screen, - PIPE_BIND_CUSTOM, usage, size)); -} - static inline void si_invalidate_draw_sh_constants(struct si_context *sctx) { sctx->last_base_vertex = SI_BASE_VERTEX_UNKNOWN; - sctx->last_start_instance = -1; /* reset to an unknown value */ - sctx->last_sh_base_reg = -1; /* reset to an unknown value */ } static inline void @@ -428,4 +457,36 @@ si_set_atom_dirty(sctx, atom, true); } +static inline struct tgsi_shader_info *si_get_vs_info(struct si_context *sctx) +{ + if (sctx->gs_shader.cso) + return &sctx->gs_shader.cso->info; + else if (sctx->tes_shader.cso) + return &sctx->tes_shader.cso->info; + else if (sctx->vs_shader.cso) + return &sctx->vs_shader.cso->info; + else + return NULL; +} + +static inline struct si_shader* si_get_vs_state(struct si_context *sctx) +{ + if (sctx->gs_shader.current) + return sctx->gs_shader.cso->gs_copy_shader; + else if (sctx->tes_shader.current) + return sctx->tes_shader.current; + else + return sctx->vs_shader.current; +} + +static inline bool si_vs_exports_prim_id(struct si_shader *shader) +{ + if (shader->selector->type == PIPE_SHADER_VERTEX) + return shader->key.part.vs.epilog.export_prim_id; + else if (shader->selector->type == PIPE_SHADER_TESS_EVAL) + return shader->key.part.tes.epilog.export_prim_id; + else + return false; +} + #endif diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/si_pm4.c mesa-17.0.7/src/gallium/drivers/radeonsi/si_pm4.c --- mesa-12.0.6/src/gallium/drivers/radeonsi/si_pm4.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/si_pm4.c 2017-06-01 10:37:10.000000000 +0000 @@ -103,11 +103,18 @@ state->bo_priority[idx] = priority; } -void si_pm4_free_state_simple(struct si_pm4_state *state) +void si_pm4_clear_state(struct si_pm4_state *state) { for (int i = 0; i < state->nbo; ++i) r600_resource_reference(&state->bo[i], NULL); r600_resource_reference(&state->indirect_buffer, NULL); + state->nbo = 0; + state->ndw = 0; +} + +void si_pm4_free_state_simple(struct si_pm4_state *state) +{ + si_pm4_clear_state(state); FREE(state); } @@ -183,7 +190,7 @@ r600_resource_reference(&state->indirect_buffer, NULL); state->indirect_buffer = (struct r600_resource*) - pipe_buffer_create(screen, PIPE_BIND_CUSTOM, + pipe_buffer_create(screen, 0, PIPE_USAGE_DEFAULT, aligned_ndw * 4); if (!state->indirect_buffer) return; diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/si_pm4.h mesa-17.0.7/src/gallium/drivers/radeonsi/si_pm4.h --- mesa-12.0.6/src/gallium/drivers/radeonsi/si_pm4.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/si_pm4.h 2017-06-01 10:37:10.000000000 +0000 @@ -71,6 +71,7 @@ void si_pm4_upload_indirect_buffer(struct si_context *sctx, struct si_pm4_state *state); +void si_pm4_clear_state(struct si_pm4_state *state); void si_pm4_free_state_simple(struct si_pm4_state *state); void si_pm4_free_state(struct si_context *sctx, struct si_pm4_state *state, diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/si_shader.c mesa-17.0.7/src/gallium/drivers/radeonsi/si_shader.c --- mesa-12.0.6/src/gallium/drivers/radeonsi/si_shader.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/si_shader.c 2017-06-01 10:37:10.000000000 +0000 @@ -31,25 +31,20 @@ #include "gallivm/lp_bld_intr.h" #include "gallivm/lp_bld_logic.h" #include "gallivm/lp_bld_arit.h" -#include "gallivm/lp_bld_bitarit.h" #include "gallivm/lp_bld_flow.h" -#include "radeon/r600_cs.h" -#include "radeon/radeon_llvm.h" +#include "gallivm/lp_bld_misc.h" #include "radeon/radeon_elf_util.h" -#include "radeon/radeon_llvm_emit.h" #include "util/u_memory.h" -#include "util/u_pstipple.h" #include "util/u_string.h" -#include "tgsi/tgsi_parse.h" #include "tgsi/tgsi_build.h" #include "tgsi/tgsi_util.h" #include "tgsi/tgsi_dump.h" +#include "ac_llvm_util.h" +#include "si_shader_internal.h" #include "si_pipe.h" -#include "si_shader.h" #include "sid.h" -#include static const char *scratch_rsrc_dword0_symbol = "SCRATCH_RSRC_DWORD0"; @@ -60,85 +55,11 @@ struct si_shader_output_values { LLVMValueRef values[4]; - unsigned name; - unsigned sid; + unsigned semantic_name; + unsigned semantic_index; + ubyte vertex_stream[4]; }; -struct si_shader_context -{ - struct radeon_llvm_context radeon_bld; - struct si_shader *shader; - struct si_screen *screen; - - unsigned type; /* PIPE_SHADER_* specifies the type of shader. */ - bool is_gs_copy_shader; - - /* Whether to generate the optimized shader variant compiled as a whole - * (without a prolog and epilog) - */ - bool is_monolithic; - - int param_streamout_config; - int param_streamout_write_index; - int param_streamout_offset[4]; - int param_vertex_id; - int param_rel_auto_id; - int param_vs_prim_id; - int param_instance_id; - int param_vertex_index0; - int param_tes_u; - int param_tes_v; - int param_tes_rel_patch_id; - int param_tes_patch_id; - int param_es2gs_offset; - int param_oc_lds; - - /* Sets a bit if the dynamic HS control word was 0x80000000. The bit is - * 0x800000 for VS, 0x1 for ES. - */ - int param_tess_offchip; - - LLVMTargetMachineRef tm; - - unsigned uniform_md_kind; - LLVMValueRef const_md; - LLVMValueRef empty_md; - LLVMValueRef const_buffers[SI_NUM_CONST_BUFFERS]; - LLVMValueRef lds; - LLVMValueRef *constants[SI_NUM_CONST_BUFFERS]; - LLVMValueRef shader_buffers[SI_NUM_SHADER_BUFFERS]; - LLVMValueRef sampler_views[SI_NUM_SAMPLERS]; - LLVMValueRef sampler_states[SI_NUM_SAMPLERS]; - LLVMValueRef fmasks[SI_NUM_SAMPLERS]; - LLVMValueRef images[SI_NUM_IMAGES]; - LLVMValueRef so_buffers[4]; - LLVMValueRef esgs_ring; - LLVMValueRef gsvs_ring[4]; - LLVMValueRef gs_next_vertex[4]; - LLVMValueRef return_value; - - LLVMTypeRef voidt; - LLVMTypeRef i1; - LLVMTypeRef i8; - LLVMTypeRef i32; - LLVMTypeRef i64; - LLVMTypeRef i128; - LLVMTypeRef f32; - LLVMTypeRef v16i8; - LLVMTypeRef v2i32; - LLVMTypeRef v4i32; - LLVMTypeRef v4f32; - LLVMTypeRef v8i32; - - LLVMValueRef shared_memory; -}; - -static struct si_shader_context *si_shader_context( - struct lp_build_tgsi_context *bld_base) -{ - return (struct si_shader_context *)bld_base; -} - static void si_init_shader_ctx(struct si_shader_context *ctx, struct si_screen *sscreen, struct si_shader *shader, @@ -148,6 +69,20 @@ struct lp_build_tgsi_context *bld_base, struct lp_build_emit_data *emit_data); +static void si_dump_shader_key(unsigned shader, struct si_shader_key *key, + FILE *f); + +static void si_build_vs_prolog_function(struct si_shader_context *ctx, + union si_shader_part_key *key); +static void si_build_vs_epilog_function(struct si_shader_context *ctx, + union si_shader_part_key *key); +static void si_build_tcs_epilog_function(struct si_shader_context *ctx, + union si_shader_part_key *key); +static void si_build_ps_prolog_function(struct si_shader_context *ctx, + union si_shader_part_key *key); +static void si_build_ps_epilog_function(struct si_shader_context *ctx, + union si_shader_part_key *key); + /* Ideally pass the sample mask input to the PS epilog as v13, which * is its usual location, so that the shader doesn't have to add v_mov. */ @@ -158,18 +93,10 @@ */ #define VS_EPILOG_PRIMID_LOC 2 -#define PERSPECTIVE_BASE 0 -#define LINEAR_BASE 9 - -#define SAMPLE_OFFSET 0 -#define CENTER_OFFSET 2 -#define CENTROID_OFSET 4 - -#define USE_SGPR_MAX_SUFFIX_LEN 5 -#define CONST_ADDR_SPACE 2 -#define LOCAL_ADDR_SPACE 3 -#define USER_SGPR_ADDR_SPACE 8 - +enum { + CONST_ADDR_SPACE = 2, + LOCAL_ADDR_SPACE = 3, +}; #define SENDMSG_GS 2 #define SENDMSG_GS_DONE 3 @@ -197,11 +124,9 @@ case TGSI_SEMANTIC_GENERIC: if (index <= 63-4) return 4 + index; - else - /* same explanation as in the default statement, - * the only user hitting this is st/nine. - */ - return 0; + + assert(!"invalid generic index"); + return 0; /* patch indices are completely separate and thus start from 0 */ case TGSI_SEMANTIC_TESSOUTER: @@ -212,11 +137,29 @@ return 2 + index; default: - /* Don't fail here. The result of this function is only used - * for LS, TCS, TES, and GS, where legacy GL semantics can't - * occur, but this function is called for all vertex shaders - * before it's known whether LS will be compiled or not. - */ + assert(!"invalid semantic name"); + return 0; + } +} + +unsigned si_shader_io_get_unique_index2(unsigned name, unsigned index) +{ + switch (name) { + case TGSI_SEMANTIC_FOG: + return 0; + case TGSI_SEMANTIC_LAYER: + return 1; + case TGSI_SEMANTIC_VIEWPORT_INDEX: + return 2; + case TGSI_SEMANTIC_PRIMID: + return 3; + case TGSI_SEMANTIC_COLOR: /* these alias */ + case TGSI_SEMANTIC_BCOLOR: + return 4 + index; + case TGSI_SEMANTIC_TEXCOORD: + return 6 + index; + default: + assert(!"invalid semantic name"); return 0; } } @@ -228,12 +171,12 @@ unsigned param, unsigned rshift, unsigned bitwidth) { - struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm; - LLVMValueRef value = LLVMGetParam(ctx->radeon_bld.main_fn, + struct gallivm_state *gallivm = &ctx->gallivm; + LLVMValueRef value = LLVMGetParam(ctx->main_fn, param); if (LLVMGetTypeKind(LLVMTypeOf(value)) == LLVMFloatTypeKind) - value = bitcast(&ctx->radeon_bld.soa.bld_base, + value = bitcast(&ctx->bld_base, TGSI_TYPE_UNSIGNED, value); if (rshift) @@ -256,7 +199,7 @@ return unpack_param(ctx, SI_PARAM_REL_IDS, 0, 8); case PIPE_SHADER_TESS_EVAL: - return LLVMGetParam(ctx->radeon_bld.main_fn, + return LLVMGetParam(ctx->main_fn, ctx->param_tes_rel_patch_id); default: @@ -308,7 +251,7 @@ static LLVMValueRef get_tcs_out_patch0_offset(struct si_shader_context *ctx) { - return lp_build_mul_imm(&ctx->radeon_bld.soa.bld_base.uint_bld, + return lp_build_mul_imm(&ctx->bld_base.uint_bld, unpack_param(ctx, SI_PARAM_TCS_OUT_OFFSETS, 0, 16), @@ -318,7 +261,7 @@ static LLVMValueRef get_tcs_out_patch0_patch_data_offset(struct si_shader_context *ctx) { - return lp_build_mul_imm(&ctx->radeon_bld.soa.bld_base.uint_bld, + return lp_build_mul_imm(&ctx->bld_base.uint_bld, unpack_param(ctx, SI_PARAM_TCS_OUT_OFFSETS, 16, 16), @@ -328,7 +271,7 @@ static LLVMValueRef get_tcs_in_current_patch_offset(struct si_shader_context *ctx) { - struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm; + struct gallivm_state *gallivm = &ctx->gallivm; LLVMValueRef patch_stride = get_tcs_in_patch_stride(ctx); LLVMValueRef rel_patch_id = get_rel_patch_id(ctx); @@ -338,7 +281,7 @@ static LLVMValueRef get_tcs_out_current_patch_offset(struct si_shader_context *ctx) { - struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm; + struct gallivm_state *gallivm = &ctx->gallivm; LLVMValueRef patch0_offset = get_tcs_out_patch0_offset(ctx); LLVMValueRef patch_stride = get_tcs_out_patch_stride(ctx); LLVMValueRef rel_patch_id = get_rel_patch_id(ctx); @@ -352,7 +295,7 @@ static LLVMValueRef get_tcs_out_current_patch_data_offset(struct si_shader_context *ctx) { - struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm; + struct gallivm_state *gallivm = &ctx->gallivm; LLVMValueRef patch0_patch_data_offset = get_tcs_out_patch0_patch_data_offset(ctx); LLVMValueRef patch_stride = get_tcs_out_patch_stride(ctx); @@ -364,19 +307,26 @@ ""); } +static LLVMValueRef build_gep0(struct si_shader_context *ctx, + LLVMValueRef base_ptr, LLVMValueRef index) +{ + LLVMValueRef indices[2] = { + LLVMConstInt(ctx->i32, 0, 0), + index, + }; + return LLVMBuildGEP(ctx->gallivm.builder, base_ptr, + indices, 2, ""); +} + static void build_indexed_store(struct si_shader_context *ctx, LLVMValueRef base_ptr, LLVMValueRef index, LLVMValueRef value) { - struct lp_build_tgsi_context *bld_base = &ctx->radeon_bld.soa.bld_base; + struct lp_build_tgsi_context *bld_base = &ctx->bld_base; struct gallivm_state *gallivm = bld_base->base.gallivm; - LLVMValueRef indices[2], pointer; - - indices[0] = bld_base->uint_bld.zero; - indices[1] = index; - pointer = LLVMBuildGEP(gallivm->builder, base_ptr, indices, 2, ""); - LLVMBuildStore(gallivm->builder, value, pointer); + LLVMBuildStore(gallivm->builder, value, + build_gep0(ctx, base_ptr, index)); } /** @@ -392,14 +342,11 @@ LLVMValueRef base_ptr, LLVMValueRef index, bool uniform) { - struct lp_build_tgsi_context *bld_base = &ctx->radeon_bld.soa.bld_base; + struct lp_build_tgsi_context *bld_base = &ctx->bld_base; struct gallivm_state *gallivm = bld_base->base.gallivm; - LLVMValueRef indices[2], pointer; + LLVMValueRef pointer; - indices[0] = bld_base->uint_bld.zero; - indices[1] = index; - - pointer = LLVMBuildGEP(gallivm->builder, base_ptr, indices, 2, ""); + pointer = build_gep0(ctx, base_ptr, index); if (uniform) LLVMSetMetadata(pointer, ctx->uniform_md_kind, ctx->empty_md); return LLVMBuildLoad(gallivm->builder, pointer, ""); @@ -414,17 +361,17 @@ LLVMValueRef base_ptr, LLVMValueRef index) { LLVMValueRef result = build_indexed_load(ctx, base_ptr, index, true); - LLVMSetMetadata(result, 1, ctx->const_md); + LLVMSetMetadata(result, ctx->invariant_load_md_kind, ctx->empty_md); return result; } static LLVMValueRef get_instance_index_for_fetch( - struct radeon_llvm_context *radeon_bld, + struct si_shader_context *radeon_bld, unsigned param_start_instance, unsigned divisor) { struct si_shader_context *ctx = - si_shader_context(&radeon_bld->soa.bld_base); - struct gallivm_state *gallivm = radeon_bld->soa.bld_base.base.gallivm; + si_shader_context(&radeon_bld->bld_base); + struct gallivm_state *gallivm = radeon_bld->bld_base.base.gallivm; LLVMValueRef result = LLVMGetParam(radeon_bld->main_fn, ctx->param_instance_id); @@ -439,18 +386,16 @@ } static void declare_input_vs( - struct radeon_llvm_context *radeon_bld, + struct si_shader_context *ctx, unsigned input_index, - const struct tgsi_full_declaration *decl) + const struct tgsi_full_declaration *decl, + LLVMValueRef out[4]) { - struct lp_build_context *base = &radeon_bld->soa.bld_base.base; + struct lp_build_context *base = &ctx->bld_base.base; struct gallivm_state *gallivm = base->gallivm; - struct si_shader_context *ctx = - si_shader_context(&radeon_bld->soa.bld_base); - unsigned divisor = - ctx->shader->key.vs.prolog.instance_divisors[input_index]; unsigned chan; + unsigned fix_fetch; LLVMValueRef t_list_ptr; LLVMValueRef t_offset; @@ -461,7 +406,7 @@ LLVMValueRef input; /* Load the T list */ - t_list_ptr = LLVMGetParam(ctx->radeon_bld.main_fn, SI_PARAM_VERTEX_BUFFERS); + t_list_ptr = LLVMGetParam(ctx->main_fn, SI_PARAM_VERTEX_BUFFERS); t_offset = lp_build_const_int32(gallivm, input_index); @@ -470,40 +415,121 @@ /* Build the attribute offset */ attribute_offset = lp_build_const_int32(gallivm, 0); - if (!ctx->is_monolithic) { - buffer_index = LLVMGetParam(radeon_bld->main_fn, - ctx->param_vertex_index0 + - input_index); - } else if (divisor) { - /* Build index from instance ID, start instance and divisor */ - ctx->shader->info.uses_instanceid = true; - buffer_index = get_instance_index_for_fetch(&ctx->radeon_bld, - SI_PARAM_START_INSTANCE, - divisor); - } else { - /* Load the buffer index for vertices. */ - LLVMValueRef vertex_id = LLVMGetParam(ctx->radeon_bld.main_fn, - ctx->param_vertex_id); - LLVMValueRef base_vertex = LLVMGetParam(radeon_bld->main_fn, - SI_PARAM_BASE_VERTEX); - buffer_index = LLVMBuildAdd(gallivm->builder, base_vertex, vertex_id, ""); - } + buffer_index = LLVMGetParam(ctx->main_fn, + ctx->param_vertex_index0 + + input_index); args[0] = t_list; args[1] = attribute_offset; args[2] = buffer_index; input = lp_build_intrinsic(gallivm->builder, "llvm.SI.vs.load.input", ctx->v4f32, args, 3, - LLVMReadNoneAttribute | LLVMNoUnwindAttribute); + LP_FUNC_ATTR_READNONE); /* Break up the vec4 into individual components */ for (chan = 0; chan < 4; chan++) { LLVMValueRef llvm_chan = lp_build_const_int32(gallivm, chan); - /* XXX: Use a helper function for this. There is one in - * tgsi_llvm.c. */ - ctx->radeon_bld.inputs[radeon_llvm_reg_index_soa(input_index, chan)] = - LLVMBuildExtractElement(gallivm->builder, - input, llvm_chan, ""); + out[chan] = LLVMBuildExtractElement(gallivm->builder, + input, llvm_chan, ""); + } + + fix_fetch = (ctx->shader->key.mono.vs.fix_fetch >> (4 * input_index)) & 0xf; + + switch (fix_fetch) { + case SI_FIX_FETCH_A2_SNORM: + case SI_FIX_FETCH_A2_SSCALED: + case SI_FIX_FETCH_A2_SINT: { + /* The hardware returns an unsigned value; convert it to a + * signed one. + */ + LLVMValueRef tmp = out[3]; + LLVMValueRef c30 = LLVMConstInt(ctx->i32, 30, 0); + + /* First, recover the sign-extended signed integer value. */ + if (fix_fetch == SI_FIX_FETCH_A2_SSCALED) + tmp = LLVMBuildFPToUI(gallivm->builder, tmp, ctx->i32, ""); + else + tmp = LLVMBuildBitCast(gallivm->builder, tmp, ctx->i32, ""); + + /* For the integer-like cases, do a natural sign extension. + * + * For the SNORM case, the values are 0.0, 0.333, 0.666, 1.0 + * and happen to contain 0, 1, 2, 3 as the two LSBs of the + * exponent. + */ + tmp = LLVMBuildShl(gallivm->builder, tmp, + fix_fetch == SI_FIX_FETCH_A2_SNORM ? + LLVMConstInt(ctx->i32, 7, 0) : c30, ""); + tmp = LLVMBuildAShr(gallivm->builder, tmp, c30, ""); + + /* Convert back to the right type. */ + if (fix_fetch == SI_FIX_FETCH_A2_SNORM) { + LLVMValueRef clamp; + LLVMValueRef neg_one = LLVMConstReal(ctx->f32, -1.0); + tmp = LLVMBuildSIToFP(gallivm->builder, tmp, ctx->f32, ""); + clamp = LLVMBuildFCmp(gallivm->builder, LLVMRealULT, tmp, neg_one, ""); + tmp = LLVMBuildSelect(gallivm->builder, clamp, neg_one, tmp, ""); + } else if (fix_fetch == SI_FIX_FETCH_A2_SSCALED) { + tmp = LLVMBuildSIToFP(gallivm->builder, tmp, ctx->f32, ""); + } + + out[3] = tmp; + break; + } + case SI_FIX_FETCH_RGBA_32_UNORM: + case SI_FIX_FETCH_RGBX_32_UNORM: + for (chan = 0; chan < 4; chan++) { + out[chan] = LLVMBuildBitCast(gallivm->builder, out[chan], + ctx->i32, ""); + out[chan] = LLVMBuildUIToFP(gallivm->builder, + out[chan], ctx->f32, ""); + out[chan] = LLVMBuildFMul(gallivm->builder, out[chan], + LLVMConstReal(ctx->f32, 1.0 / UINT_MAX), ""); + } + /* RGBX UINT returns 1 in alpha, which would be rounded to 0 by normalizing. */ + if (fix_fetch == SI_FIX_FETCH_RGBX_32_UNORM) + out[3] = LLVMConstReal(ctx->f32, 1); + break; + case SI_FIX_FETCH_RGBA_32_SNORM: + case SI_FIX_FETCH_RGBX_32_SNORM: + case SI_FIX_FETCH_RGBA_32_FIXED: + case SI_FIX_FETCH_RGBX_32_FIXED: { + double scale; + if (fix_fetch >= SI_FIX_FETCH_RGBA_32_FIXED) + scale = 1.0 / 0x10000; + else + scale = 1.0 / INT_MAX; + + for (chan = 0; chan < 4; chan++) { + out[chan] = LLVMBuildBitCast(gallivm->builder, out[chan], + ctx->i32, ""); + out[chan] = LLVMBuildSIToFP(gallivm->builder, + out[chan], ctx->f32, ""); + out[chan] = LLVMBuildFMul(gallivm->builder, out[chan], + LLVMConstReal(ctx->f32, scale), ""); + } + /* RGBX SINT returns 1 in alpha, which would be rounded to 0 by normalizing. */ + if (fix_fetch == SI_FIX_FETCH_RGBX_32_SNORM || + fix_fetch == SI_FIX_FETCH_RGBX_32_FIXED) + out[3] = LLVMConstReal(ctx->f32, 1); + break; + } + case SI_FIX_FETCH_RGBA_32_USCALED: + for (chan = 0; chan < 4; chan++) { + out[chan] = LLVMBuildBitCast(gallivm->builder, out[chan], + ctx->i32, ""); + out[chan] = LLVMBuildUIToFP(gallivm->builder, + out[chan], ctx->f32, ""); + } + break; + case SI_FIX_FETCH_RGBA_32_SSCALED: + for (chan = 0; chan < 4; chan++) { + out[chan] = LLVMBuildBitCast(gallivm->builder, out[chan], + ctx->i32, ""); + out[chan] = LLVMBuildSIToFP(gallivm->builder, + out[chan], ctx->f32, ""); + } + break; } } @@ -517,16 +543,16 @@ switch (ctx->type) { case PIPE_SHADER_VERTEX: - return LLVMGetParam(ctx->radeon_bld.main_fn, + return LLVMGetParam(ctx->main_fn, ctx->param_vs_prim_id); case PIPE_SHADER_TESS_CTRL: - return LLVMGetParam(ctx->radeon_bld.main_fn, + return LLVMGetParam(ctx->main_fn, SI_PARAM_PATCH_ID); case PIPE_SHADER_TESS_EVAL: - return LLVMGetParam(ctx->radeon_bld.main_fn, + return LLVMGetParam(ctx->main_fn, ctx->param_tes_patch_id); case PIPE_SHADER_GEOMETRY: - return LLVMGetParam(ctx->radeon_bld.main_fn, + return LLVMGetParam(ctx->main_fn, SI_PARAM_PRIMITIVE_ID); default: assert(0); @@ -542,10 +568,10 @@ const struct tgsi_ind_register *ind, int rel_index) { - struct gallivm_state *gallivm = ctx->radeon_bld.soa.bld_base.base.gallivm; + struct gallivm_state *gallivm = ctx->bld_base.base.gallivm; LLVMValueRef result; - result = ctx->radeon_bld.soa.addr[ind->Index][ind->Swizzle]; + result = ctx->addrs[ind->Index][ind->Swizzle]; result = LLVMBuildLoad(gallivm->builder, result, ""); result = LLVMBuildAdd(gallivm->builder, result, lp_build_const_int32(gallivm, rel_index), ""); @@ -560,11 +586,7 @@ const struct tgsi_ind_register *ind, int rel_index, unsigned num) { - struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm; - LLVMBuilderRef builder = gallivm->builder; LLVMValueRef result = get_indirect_index(ctx, ind, rel_index); - LLVMValueRef c_max = LLVMConstInt(ctx->i32, num - 1, 0); - LLVMValueRef cc; /* LLVM 3.8: If indirect resource indexing is used: * - SI & CIK hang @@ -573,20 +595,7 @@ if (HAVE_LLVM <= 0x0308) return LLVMGetUndef(ctx->i32); - if (util_is_power_of_two(num)) { - result = LLVMBuildAnd(builder, result, c_max, ""); - } else { - /* In theory, this MAX pattern should result in code that is - * as good as the bit-wise AND above. - * - * In practice, LLVM generates worse code (at the time of - * writing), because its value tracking is not strong enough. - */ - cc = LLVMBuildICmp(builder, LLVMIntULE, result, c_max, ""); - result = LLVMBuildSelect(builder, cc, result, c_max, ""); - } - - return result; + return si_llvm_bound_index(ctx, result, num); } @@ -599,7 +608,7 @@ LLVMValueRef vertex_dw_stride, LLVMValueRef base_addr) { - struct gallivm_state *gallivm = ctx->radeon_bld.soa.bld_base.base.gallivm; + struct gallivm_state *gallivm = ctx->bld_base.base.gallivm; struct tgsi_shader_info *info = &ctx->shader->selector->info; ubyte *name, *index, *array_first; int first, param; @@ -697,7 +706,7 @@ LLVMValueRef vertex_index, LLVMValueRef param_index) { - struct gallivm_state *gallivm = ctx->radeon_bld.soa.bld_base.base.gallivm; + struct gallivm_state *gallivm = ctx->bld_base.base.gallivm; LLVMValueRef base_addr, vertices_per_patch, num_patches, total_vertices; LLVMValueRef param_stride, constant16; @@ -741,7 +750,7 @@ const struct tgsi_full_dst_register *dst, const struct tgsi_full_src_register *src) { - struct gallivm_state *gallivm = ctx->radeon_bld.soa.bld_base.base.gallivm; + struct gallivm_state *gallivm = ctx->bld_base.base.gallivm; struct tgsi_shader_info *info = &ctx->shader->selector->info; ubyte *name, *index, *array_first; struct tgsi_full_src_register reg; @@ -817,7 +826,7 @@ unsigned slc, unsigned tfe) { - struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm; + struct gallivm_state *gallivm = &ctx->gallivm; LLVMValueRef args[] = { rsrc, vdata, @@ -878,7 +887,7 @@ unsigned glc, unsigned slc) { - struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm; + struct gallivm_state *gallivm = &ctx->gallivm; unsigned func = CLAMP(num_channels, 1, 3) - 1; if (HAVE_LLVM >= 0x309) { @@ -909,8 +918,7 @@ type_names[func]); return lp_build_intrinsic(gallivm->builder, name, types[func], args, - ARRAY_SIZE(args), LLVMReadOnlyAttribute | - LLVMNoUnwindAttribute); + ARRAY_SIZE(args), LP_FUNC_ATTR_READONLY); } else { LLVMValueRef args[] = { LLVMBuildBitCast(gallivm->builder, rsrc, ctx->v16i8, ""), @@ -941,8 +949,7 @@ type_names[func], arg_type); return lp_build_intrinsic(gallivm->builder, name, types[func], args, - ARRAY_SIZE(args), LLVMReadOnlyAttribute | - LLVMNoUnwindAttribute); + ARRAY_SIZE(args), LP_FUNC_ATTR_READONLY); } } @@ -964,7 +971,7 @@ return LLVMBuildBitCast(gallivm->builder, value, vec_type, ""); } - if (type != TGSI_TYPE_DOUBLE) { + if (!tgsi_type_is_64bit(type)) { value = build_buffer_load(ctx, buffer, 4, NULL, base, offset, 0, 1, 0); @@ -979,7 +986,7 @@ value2 = build_buffer_load(ctx, buffer, 1, NULL, base, offset, swizzle * 4 + 4, 1, 0); - return radeon_llvm_emit_fetch_double(bld_base, value, value2); + return si_llvm_emit_fetch_64bit(bld_base, type, value, value2); } /** @@ -1011,12 +1018,12 @@ lp_build_const_int32(gallivm, swizzle)); value = build_indexed_load(ctx, ctx->lds, dw_addr, false); - if (type == TGSI_TYPE_DOUBLE) { + if (tgsi_type_is_64bit(type)) { LLVMValueRef value2; dw_addr = lp_build_add(&bld_base->uint_bld, dw_addr, lp_build_const_int32(gallivm, 1)); value2 = build_indexed_load(ctx, ctx->lds, dw_addr, false); - return radeon_llvm_emit_fetch_double(bld_base, value, value2); + return si_llvm_emit_fetch_64bit(bld_base, type, value, value2); } return LLVMBuildBitCast(gallivm->builder, value, @@ -1089,12 +1096,12 @@ struct gallivm_state *gallivm = bld_base->base.gallivm; LLVMValueRef rw_buffers, buffer, base, addr; - rw_buffers = LLVMGetParam(ctx->radeon_bld.main_fn, + rw_buffers = LLVMGetParam(ctx->main_fn, SI_PARAM_RW_BUFFERS); buffer = build_indexed_load_const(ctx, rw_buffers, lp_build_const_int32(gallivm, SI_HS_RING_TESS_OFFCHIP)); - base = LLVMGetParam(ctx->radeon_bld.main_fn, ctx->param_oc_lds); + base = LLVMGetParam(ctx->main_fn, ctx->param_oc_lds); addr = get_tcs_tes_buffer_address_from_reg(ctx, NULL, reg); return buffer_load(bld_base, type, swizzle, buffer, base, addr); @@ -1118,7 +1125,7 @@ */ if (reg->Register.File != TGSI_FILE_OUTPUT || (dst[0] && LLVMGetTypeKind(LLVMTypeOf(dst[0])) == LLVMVectorTypeKind)) { - radeon_llvm_emit_store(bld_base, inst, info, dst); + si_llvm_emit_store(bld_base, inst, info, dst); return; } @@ -1131,12 +1138,12 @@ dw_addr = get_dw_address(ctx, reg, NULL, NULL, dw_addr); } - rw_buffers = LLVMGetParam(ctx->radeon_bld.main_fn, + rw_buffers = LLVMGetParam(ctx->main_fn, SI_PARAM_RW_BUFFERS); buffer = build_indexed_load_const(ctx, rw_buffers, lp_build_const_int32(gallivm, SI_HS_RING_TESS_OFFCHIP)); - base = LLVMGetParam(ctx->radeon_bld.main_fn, ctx->param_oc_lds); + base = LLVMGetParam(ctx->main_fn, ctx->param_oc_lds); buf_addr = get_tcs_tes_buffer_address_from_reg(ctx, reg, NULL); @@ -1144,7 +1151,7 @@ LLVMValueRef value = dst[chan_index]; if (inst->Instruction.Saturate) - value = radeon_llvm_saturate(bld_base, value); + value = si_llvm_saturate(bld_base, value); lds_store(bld_base, chan_index, dw_addr, value); @@ -1175,7 +1182,7 @@ struct lp_build_context *base = &bld_base->base; struct si_shader_context *ctx = si_shader_context(bld_base); struct si_shader *shader = ctx->shader; - struct lp_build_context *uint = &ctx->radeon_bld.soa.bld_base.uint_bld; + struct lp_build_context *uint = &ctx->bld_base.uint_bld; struct gallivm_state *gallivm = base->gallivm; LLVMValueRef vtx_offset; LLVMValueRef args[9]; @@ -1211,7 +1218,7 @@ vtx_offset_param += SI_PARAM_VTX2_OFFSET - 2; } vtx_offset = lp_build_mul_imm(uint, - LLVMGetParam(ctx->radeon_bld.main_fn, + LLVMGetParam(ctx->main_fn, vtx_offset_param), 4); @@ -1229,16 +1236,16 @@ value = lp_build_intrinsic(gallivm->builder, "llvm.SI.buffer.load.dword.i32.i32", ctx->i32, args, 9, - LLVMReadOnlyAttribute | LLVMNoUnwindAttribute); - if (type == TGSI_TYPE_DOUBLE) { + LP_FUNC_ATTR_READONLY); + if (tgsi_type_is_64bit(type)) { LLVMValueRef value2; args[2] = lp_build_const_int32(gallivm, (param * 4 + swizzle + 1) * 256); value2 = lp_build_intrinsic(gallivm->builder, "llvm.SI.buffer.load.dword.i32.i32", ctx->i32, args, 9, - LLVMReadOnlyAttribute | LLVMNoUnwindAttribute); - return radeon_llvm_emit_fetch_double(bld_base, - value, value2); + LP_FUNC_ATTR_READONLY); + return si_llvm_emit_fetch_64bit(bld_base, type, + value, value2); } return LLVMBuildBitCast(gallivm->builder, value, @@ -1274,31 +1281,78 @@ } } -/* This shouldn't be used by explicit INTERP opcodes. */ -static unsigned select_interp_param(struct si_shader_context *ctx, - unsigned param) -{ - if (!ctx->shader->key.ps.prolog.force_persample_interp || - !ctx->is_monolithic) - return param; +static LLVMValueRef build_fs_interp( + struct lp_build_tgsi_context *bld_base, + LLVMValueRef llvm_chan, + LLVMValueRef attr_number, + LLVMValueRef params, + LLVMValueRef i, + LLVMValueRef j) { - /* If the shader doesn't use center/centroid, just return the parameter. - * - * If the shader only uses one set of (i,j), "si_emit_spi_ps_input" can - * switch between center/centroid and sample without shader changes. - */ - switch (param) { - case SI_PARAM_PERSP_CENTROID: - case SI_PARAM_PERSP_CENTER: - return SI_PARAM_PERSP_SAMPLE; - - case SI_PARAM_LINEAR_CENTROID: - case SI_PARAM_LINEAR_CENTER: - return SI_PARAM_LINEAR_SAMPLE; + struct si_shader_context *ctx = si_shader_context(bld_base); + struct gallivm_state *gallivm = bld_base->base.gallivm; + LLVMValueRef args[5]; + LLVMValueRef p1; + if (HAVE_LLVM < 0x0400) { + LLVMValueRef ij[2]; + ij[0] = LLVMBuildBitCast(gallivm->builder, i, ctx->i32, ""); + ij[1] = LLVMBuildBitCast(gallivm->builder, j, ctx->i32, ""); - default: - return param; + args[0] = llvm_chan; + args[1] = attr_number; + args[2] = params; + args[3] = lp_build_gather_values(gallivm, ij, 2); + return lp_build_intrinsic(gallivm->builder, "llvm.SI.fs.interp", + ctx->f32, args, 4, + LP_FUNC_ATTR_READNONE); + } + + args[0] = i; + args[1] = llvm_chan; + args[2] = attr_number; + args[3] = params; + + p1 = lp_build_intrinsic(gallivm->builder, "llvm.amdgcn.interp.p1", + ctx->f32, args, 4, LP_FUNC_ATTR_READNONE); + + args[0] = p1; + args[1] = j; + args[2] = llvm_chan; + args[3] = attr_number; + args[4] = params; + + return lp_build_intrinsic(gallivm->builder, "llvm.amdgcn.interp.p2", + ctx->f32, args, 5, LP_FUNC_ATTR_READNONE); +} + +static LLVMValueRef build_fs_interp_mov( + struct lp_build_tgsi_context *bld_base, + LLVMValueRef parameter, + LLVMValueRef llvm_chan, + LLVMValueRef attr_number, + LLVMValueRef params) { + + struct si_shader_context *ctx = si_shader_context(bld_base); + struct gallivm_state *gallivm = bld_base->base.gallivm; + LLVMValueRef args[4]; + if (HAVE_LLVM < 0x0400) { + args[0] = llvm_chan; + args[1] = attr_number; + args[2] = params; + + return lp_build_intrinsic(gallivm->builder, + "llvm.SI.fs.constant", + ctx->f32, args, 3, + LP_FUNC_ATTR_READNONE); } + + args[0] = parameter; + args[1] = llvm_chan; + args[2] = attr_number; + args[3] = params; + + return lp_build_intrinsic(gallivm->builder, "llvm.amdgcn.interp.mov", + ctx->f32, args, 4, LP_FUNC_ATTR_READNONE); } /** @@ -1326,16 +1380,15 @@ LLVMValueRef face, LLVMValueRef result[4]) { - struct lp_build_context *base = &ctx->radeon_bld.soa.bld_base.base; - struct lp_build_context *uint = &ctx->radeon_bld.soa.bld_base.uint_bld; + struct lp_build_tgsi_context *bld_base = &ctx->bld_base; + struct lp_build_context *base = &bld_base->base; + struct lp_build_context *uint = &bld_base->uint_bld; struct gallivm_state *gallivm = base->gallivm; - const char *intr_name; LLVMValueRef attr_number; + LLVMValueRef i, j; unsigned chan; - attr_number = lp_build_const_int32(gallivm, input_index); - /* fs.constant returns the param from the middle vertex, so it's not * really useful for flat shading. It's meant to be used for custom * interpolation (but the intrinsic can't fetch from the other two @@ -1345,12 +1398,26 @@ * to do the right thing. The only reason we use fs.constant is that * fs.interp cannot be used on integers, because they can be equal * to NaN. + * + * When interp is false we will use fs.constant or for newer llvm, + * amdgcn.interp.mov. */ - intr_name = interp_param ? "llvm.SI.fs.interp" : "llvm.SI.fs.constant"; + bool interp = interp_param != NULL; + + attr_number = lp_build_const_int32(gallivm, input_index); + + if (interp) { + interp_param = LLVMBuildBitCast(gallivm->builder, interp_param, + LLVMVectorType(ctx->f32, 2), ""); + + i = LLVMBuildExtractElement(gallivm->builder, interp_param, + uint->zero, ""); + j = LLVMBuildExtractElement(gallivm->builder, interp_param, + uint->one, ""); + } if (semantic_name == TGSI_SEMANTIC_COLOR && - ctx->shader->key.ps.prolog.color_two_side) { - LLVMValueRef args[4]; + ctx->shader->key.part.ps.prolog.color_two_side) { LLVMValueRef is_face_positive; LLVMValueRef back_attr_number; @@ -1366,22 +1433,25 @@ is_face_positive = LLVMBuildICmp(gallivm->builder, LLVMIntNE, face, uint->zero, ""); - args[2] = prim_mask; - args[3] = interp_param; for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) { LLVMValueRef llvm_chan = lp_build_const_int32(gallivm, chan); LLVMValueRef front, back; - args[0] = llvm_chan; - args[1] = attr_number; - front = lp_build_intrinsic(gallivm->builder, intr_name, - ctx->f32, args, args[3] ? 4 : 3, - LLVMReadNoneAttribute | LLVMNoUnwindAttribute); - - args[1] = back_attr_number; - back = lp_build_intrinsic(gallivm->builder, intr_name, - ctx->f32, args, args[3] ? 4 : 3, - LLVMReadNoneAttribute | LLVMNoUnwindAttribute); + if (interp) { + front = build_fs_interp(bld_base, llvm_chan, + attr_number, prim_mask, + i, j); + back = build_fs_interp(bld_base, llvm_chan, + back_attr_number, prim_mask, + i, j); + } else { + front = build_fs_interp_mov(bld_base, + lp_build_const_int32(gallivm, 2), /* P0 */ + llvm_chan, attr_number, prim_mask); + back = build_fs_interp_mov(bld_base, + lp_build_const_int32(gallivm, 2), /* P0 */ + llvm_chan, back_attr_number, prim_mask); + } result[chan] = LLVMBuildSelect(gallivm->builder, is_face_positive, @@ -1390,64 +1460,59 @@ ""); } } else if (semantic_name == TGSI_SEMANTIC_FOG) { - LLVMValueRef args[4]; - - args[0] = uint->zero; - args[1] = attr_number; - args[2] = prim_mask; - args[3] = interp_param; - result[0] = lp_build_intrinsic(gallivm->builder, intr_name, - ctx->f32, args, args[3] ? 4 : 3, - LLVMReadNoneAttribute | LLVMNoUnwindAttribute); + if (interp) { + result[0] = build_fs_interp(bld_base, uint->zero, + attr_number, prim_mask, i, j); + } else { + result[0] = build_fs_interp_mov(bld_base, uint->zero, + lp_build_const_int32(gallivm, 2), /* P0 */ + attr_number, prim_mask); + } result[1] = result[2] = lp_build_const_float(gallivm, 0.0f); result[3] = lp_build_const_float(gallivm, 1.0f); } else { for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) { - LLVMValueRef args[4]; LLVMValueRef llvm_chan = lp_build_const_int32(gallivm, chan); - args[0] = llvm_chan; - args[1] = attr_number; - args[2] = prim_mask; - args[3] = interp_param; - result[chan] = lp_build_intrinsic(gallivm->builder, intr_name, - ctx->f32, args, args[3] ? 4 : 3, - LLVMReadNoneAttribute | LLVMNoUnwindAttribute); + if (interp) { + result[chan] = build_fs_interp(bld_base, + llvm_chan, attr_number, prim_mask, i, j); + } else { + result[chan] = build_fs_interp_mov(bld_base, + lp_build_const_int32(gallivm, 2), /* P0 */ + llvm_chan, attr_number, prim_mask); + } } } } static void declare_input_fs( - struct radeon_llvm_context *radeon_bld, + struct si_shader_context *radeon_bld, unsigned input_index, - const struct tgsi_full_declaration *decl) + const struct tgsi_full_declaration *decl, + LLVMValueRef out[4]) { - struct lp_build_context *base = &radeon_bld->soa.bld_base.base; + struct lp_build_context *base = &radeon_bld->bld_base.base; struct si_shader_context *ctx = - si_shader_context(&radeon_bld->soa.bld_base); + si_shader_context(&radeon_bld->bld_base); struct si_shader *shader = ctx->shader; LLVMValueRef main_fn = radeon_bld->main_fn; LLVMValueRef interp_param = NULL; int interp_param_idx; /* Get colors from input VGPRs (set by the prolog). */ - if (!ctx->is_monolithic && - decl->Semantic.Name == TGSI_SEMANTIC_COLOR) { + if (decl->Semantic.Name == TGSI_SEMANTIC_COLOR) { unsigned i = decl->Semantic.Index; unsigned colors_read = shader->selector->info.colors_read; unsigned mask = colors_read >> (i * 4); unsigned offset = SI_PARAM_POS_FIXED_PT + 1 + (i ? util_bitcount(colors_read & 0xf) : 0); - radeon_bld->inputs[radeon_llvm_reg_index_soa(input_index, 0)] = - mask & 0x1 ? LLVMGetParam(main_fn, offset++) : base->undef; - radeon_bld->inputs[radeon_llvm_reg_index_soa(input_index, 1)] = - mask & 0x2 ? LLVMGetParam(main_fn, offset++) : base->undef; - radeon_bld->inputs[radeon_llvm_reg_index_soa(input_index, 2)] = - mask & 0x4 ? LLVMGetParam(main_fn, offset++) : base->undef; - radeon_bld->inputs[radeon_llvm_reg_index_soa(input_index, 3)] = - mask & 0x8 ? LLVMGetParam(main_fn, offset++) : base->undef; + out[0] = mask & 0x1 ? LLVMGetParam(main_fn, offset++) : base->undef; + out[1] = mask & 0x2 ? LLVMGetParam(main_fn, offset++) : base->undef; + out[2] = mask & 0x4 ? LLVMGetParam(main_fn, offset++) : base->undef; + out[3] = mask & 0x8 ? LLVMGetParam(main_fn, offset++) : base->undef; return; } @@ -1456,22 +1521,25 @@ if (interp_param_idx == -1) return; else if (interp_param_idx) { - interp_param_idx = select_interp_param(ctx, - interp_param_idx); - interp_param = LLVMGetParam(main_fn, interp_param_idx); + interp_param = LLVMGetParam(ctx->main_fn, interp_param_idx); } + if (decl->Semantic.Name == TGSI_SEMANTIC_COLOR && + decl->Interp.Interpolate == TGSI_INTERPOLATE_COLOR && + ctx->shader->key.part.ps.prolog.flatshade_colors) + interp_param = NULL; /* load the constant color */ + interp_fs_input(ctx, input_index, decl->Semantic.Name, decl->Semantic.Index, shader->selector->info.num_inputs, shader->selector->info.colors_read, interp_param, LLVMGetParam(main_fn, SI_PARAM_PRIM_MASK), LLVMGetParam(main_fn, SI_PARAM_FRONT_FACE), - &radeon_bld->inputs[radeon_llvm_reg_index_soa(input_index, 0)]); + &out[0]); } -static LLVMValueRef get_sample_id(struct radeon_llvm_context *radeon_bld) +static LLVMValueRef get_sample_id(struct si_shader_context *radeon_bld) { - return unpack_param(si_shader_context(&radeon_bld->soa.bld_base), + return unpack_param(si_shader_context(&radeon_bld->bld_base), SI_PARAM_ANCILLARY, 8, 4); } @@ -1482,65 +1550,65 @@ * \p lo is the minimum value inclusive. * \p hi is the maximum value exclusive. */ -static void set_range_metadata(LLVMValueRef value, unsigned lo, unsigned hi) +static void set_range_metadata(struct si_shader_context *ctx, + LLVMValueRef value, unsigned lo, unsigned hi) { - const char *range_md_string = "range"; LLVMValueRef range_md, md_args[2]; LLVMTypeRef type = LLVMTypeOf(value); LLVMContextRef context = LLVMGetTypeContext(type); - unsigned md_range_id = LLVMGetMDKindIDInContext(context, - range_md_string, strlen(range_md_string)); md_args[0] = LLVMConstInt(type, lo, false); md_args[1] = LLVMConstInt(type, hi, false); range_md = LLVMMDNodeInContext(context, md_args, 2); - LLVMSetMetadata(value, md_range_id, range_md); + LLVMSetMetadata(value, ctx->range_md_kind, range_md); } static LLVMValueRef get_thread_id(struct si_shader_context *ctx) { - struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm; + struct gallivm_state *gallivm = &ctx->gallivm; LLVMValueRef tid; if (HAVE_LLVM < 0x0308) { tid = lp_build_intrinsic(gallivm->builder, "llvm.SI.tid", - ctx->i32, NULL, 0, LLVMReadNoneAttribute); + ctx->i32, NULL, 0, LP_FUNC_ATTR_READNONE); } else { LLVMValueRef tid_args[2]; tid_args[0] = lp_build_const_int32(gallivm, 0xffffffff); tid_args[1] = lp_build_const_int32(gallivm, 0); tid_args[1] = lp_build_intrinsic(gallivm->builder, "llvm.amdgcn.mbcnt.lo", ctx->i32, - tid_args, 2, LLVMReadNoneAttribute); + tid_args, 2, LP_FUNC_ATTR_READNONE); tid = lp_build_intrinsic(gallivm->builder, "llvm.amdgcn.mbcnt.hi", ctx->i32, - tid_args, 2, LLVMReadNoneAttribute); + tid_args, 2, LP_FUNC_ATTR_READNONE); } - set_range_metadata(tid, 0, 64); + set_range_metadata(ctx, tid, 0, 64); return tid; } /** * Load a dword from a constant buffer. */ -static LLVMValueRef buffer_load_const(LLVMBuilderRef builder, LLVMValueRef resource, - LLVMValueRef offset, LLVMTypeRef return_type) +static LLVMValueRef buffer_load_const(struct si_shader_context *ctx, + LLVMValueRef resource, + LLVMValueRef offset) { + LLVMBuilderRef builder = ctx->gallivm.builder; LLVMValueRef args[2] = {resource, offset}; - return lp_build_intrinsic(builder, "llvm.SI.load.const", return_type, args, 2, - LLVMReadNoneAttribute | LLVMNoUnwindAttribute); + return lp_build_intrinsic(builder, "llvm.SI.load.const", ctx->f32, args, 2, + LP_FUNC_ATTR_READNONE); } -static LLVMValueRef load_sample_position(struct radeon_llvm_context *radeon_bld, LLVMValueRef sample_id) +static LLVMValueRef load_sample_position(struct si_shader_context *radeon_bld, LLVMValueRef sample_id) { struct si_shader_context *ctx = - si_shader_context(&radeon_bld->soa.bld_base); - struct lp_build_context *uint_bld = &radeon_bld->soa.bld_base.uint_bld; + si_shader_context(&radeon_bld->bld_base); + struct lp_build_context *uint_bld = &radeon_bld->bld_base.uint_bld; struct gallivm_state *gallivm = &radeon_bld->gallivm; LLVMBuilderRef builder = gallivm->builder; - LLVMValueRef desc = LLVMGetParam(ctx->radeon_bld.main_fn, SI_PARAM_RW_BUFFERS); + LLVMValueRef desc = LLVMGetParam(ctx->main_fn, SI_PARAM_RW_BUFFERS); LLVMValueRef buf_index = lp_build_const_int32(gallivm, SI_PS_CONST_SAMPLE_POSITIONS); LLVMValueRef resource = build_indexed_load_const(ctx, desc, buf_index); @@ -1549,8 +1617,8 @@ LLVMValueRef offset1 = LLVMBuildAdd(builder, offset0, lp_build_const_int32(gallivm, 4), ""); LLVMValueRef pos[4] = { - buffer_load_const(builder, resource, offset0, ctx->f32), - buffer_load_const(builder, resource, offset1, ctx->f32), + buffer_load_const(ctx, resource, offset0), + buffer_load_const(ctx, resource, offset1), lp_build_const_float(gallivm, 0), lp_build_const_float(gallivm, 0) }; @@ -1559,13 +1627,13 @@ } static void declare_system_value( - struct radeon_llvm_context *radeon_bld, + struct si_shader_context *radeon_bld, unsigned index, const struct tgsi_full_declaration *decl) { struct si_shader_context *ctx = - si_shader_context(&radeon_bld->soa.bld_base); - struct lp_build_context *bld = &radeon_bld->soa.bld_base.base; + si_shader_context(&radeon_bld->bld_base); + struct lp_build_context *bld = &radeon_bld->bld_base.base; struct gallivm_state *gallivm = &radeon_bld->gallivm; LLVMValueRef value = 0; @@ -1593,6 +1661,16 @@ SI_PARAM_BASE_VERTEX); break; + case TGSI_SEMANTIC_BASEINSTANCE: + value = LLVMGetParam(radeon_bld->main_fn, + SI_PARAM_START_INSTANCE); + break; + + case TGSI_SEMANTIC_DRAWID: + value = LLVMGetParam(radeon_bld->main_fn, + SI_PARAM_DRAWID); + break; + case TGSI_SEMANTIC_INVOCATIONID: if (ctx->type == PIPE_SHADER_TESS_CTRL) value = unpack_param(ctx, SI_PARAM_REL_IDS, 8, 5); @@ -1609,7 +1687,7 @@ LLVMGetParam(radeon_bld->main_fn, SI_PARAM_POS_X_FLOAT), LLVMGetParam(radeon_bld->main_fn, SI_PARAM_POS_Y_FLOAT), LLVMGetParam(radeon_bld->main_fn, SI_PARAM_POS_Z_FLOAT), - lp_build_emit_llvm_unary(&radeon_bld->soa.bld_base, TGSI_OPCODE_RCP, + lp_build_emit_llvm_unary(&radeon_bld->bld_base, TGSI_OPCODE_RCP, LLVMGetParam(radeon_bld->main_fn, SI_PARAM_POS_W_FLOAT)), }; @@ -1632,9 +1710,9 @@ lp_build_const_float(gallivm, 0), lp_build_const_float(gallivm, 0) }; - pos[0] = lp_build_emit_llvm_unary(&radeon_bld->soa.bld_base, + pos[0] = lp_build_emit_llvm_unary(&radeon_bld->bld_base, TGSI_OPCODE_FRC, pos[0]); - pos[1] = lp_build_emit_llvm_unary(&radeon_bld->soa.bld_base, + pos[1] = lp_build_emit_llvm_unary(&radeon_bld->bld_base, TGSI_OPCODE_FRC, pos[1]); value = lp_build_gather_values(gallivm, pos, 4); break; @@ -1681,16 +1759,16 @@ LLVMValueRef rw_buffers, buffer, base, addr; int param = si_shader_io_get_unique_index(decl->Semantic.Name, 0); - rw_buffers = LLVMGetParam(ctx->radeon_bld.main_fn, + rw_buffers = LLVMGetParam(ctx->main_fn, SI_PARAM_RW_BUFFERS); buffer = build_indexed_load_const(ctx, rw_buffers, lp_build_const_int32(gallivm, SI_HS_RING_TESS_OFFCHIP)); - base = LLVMGetParam(ctx->radeon_bld.main_fn, ctx->param_oc_lds); + base = LLVMGetParam(ctx->main_fn, ctx->param_oc_lds); addr = get_tcs_tes_buffer_address(ctx, NULL, lp_build_const_int32(gallivm, param)); - value = buffer_load(&radeon_bld->soa.bld_base, TGSI_TYPE_FLOAT, + value = buffer_load(&radeon_bld->bld_base, TGSI_TYPE_FLOAT, ~0, buffer, base, addr); break; @@ -1703,20 +1781,19 @@ int i, offset; slot = lp_build_const_int32(gallivm, SI_HS_CONST_DEFAULT_TESS_LEVELS); - buf = LLVMGetParam(ctx->radeon_bld.main_fn, SI_PARAM_RW_BUFFERS); + buf = LLVMGetParam(ctx->main_fn, SI_PARAM_RW_BUFFERS); buf = build_indexed_load_const(ctx, buf, slot); offset = decl->Semantic.Name == TGSI_SEMANTIC_DEFAULT_TESSINNER_SI ? 4 : 0; for (i = 0; i < 4; i++) - val[i] = buffer_load_const(gallivm->builder, buf, - lp_build_const_int32(gallivm, (offset + i) * 4), - ctx->f32); + val[i] = buffer_load_const(ctx, buf, + lp_build_const_int32(gallivm, (offset + i) * 4)); value = lp_build_gather_values(gallivm, val, 4); break; } case TGSI_SEMANTIC_PRIMID: - value = get_primitive_id(&radeon_bld->soa.bld_base, 0); + value = get_primitive_id(&radeon_bld->bld_base, 0); break; case TGSI_SEMANTIC_GRID_SIZE: @@ -1728,16 +1805,21 @@ LLVMValueRef values[3]; unsigned i; unsigned *properties = ctx->shader->selector->info.properties; - unsigned sizes[3] = { - properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH], - properties[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT], - properties[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH] - }; - for (i = 0; i < 3; ++i) - values[i] = lp_build_const_int32(gallivm, sizes[i]); + if (properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH] != 0) { + unsigned sizes[3] = { + properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH], + properties[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT], + properties[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH] + }; + + for (i = 0; i < 3; ++i) + values[i] = lp_build_const_int32(gallivm, sizes[i]); - value = lp_build_gather_values(gallivm, values, 3); + value = lp_build_gather_values(gallivm, values, 3); + } else { + value = LLVMGetParam(radeon_bld->main_fn, SI_PARAM_BLOCK_SIZE); + } break; } @@ -1749,16 +1831,19 @@ value = LLVMGetParam(radeon_bld->main_fn, SI_PARAM_THREAD_ID); break; -#if HAVE_LLVM >= 0x0309 case TGSI_SEMANTIC_HELPER_INVOCATION: - value = lp_build_intrinsic(gallivm->builder, - "llvm.amdgcn.ps.live", - ctx->i1, NULL, 0, - LLVMReadNoneAttribute | LLVMNoUnwindAttribute); - value = LLVMBuildNot(gallivm->builder, value, ""); - value = LLVMBuildSExt(gallivm->builder, value, ctx->i32, ""); + if (HAVE_LLVM >= 0x0309) { + value = lp_build_intrinsic(gallivm->builder, + "llvm.amdgcn.ps.live", + ctx->i1, NULL, 0, + LP_FUNC_ATTR_READNONE); + value = LLVMBuildNot(gallivm->builder, value, ""); + value = LLVMBuildSExt(gallivm->builder, value, ctx->i32, ""); + } else { + assert(!"TGSI_SEMANTIC_HELPER_INVOCATION unsupported"); + return; + } break; -#endif default: assert(!"unknown system value"); @@ -1768,11 +1853,11 @@ radeon_bld->system_values[index] = value; } -static void declare_compute_memory(struct radeon_llvm_context *radeon_bld, +static void declare_compute_memory(struct si_shader_context *radeon_bld, const struct tgsi_full_declaration *decl) { struct si_shader_context *ctx = - si_shader_context(&radeon_bld->soa.bld_base); + si_shader_context(&radeon_bld->bld_base); struct si_shader_selector *sel = ctx->shader->selector; struct gallivm_state *gallivm = &radeon_bld->gallivm; @@ -1792,6 +1877,15 @@ ctx->shared_memory = LLVMBuildBitCast(gallivm->builder, var, i8p, ""); } +static LLVMValueRef load_const_buffer_desc(struct si_shader_context *ctx, int i) +{ + LLVMValueRef list_ptr = LLVMGetParam(ctx->main_fn, + SI_PARAM_CONST_BUFFERS); + + return build_indexed_load_const(ctx, list_ptr, + LLVMConstInt(ctx->i32, i, 0)); +} + static LLVMValueRef fetch_constant( struct lp_build_tgsi_context *bld_base, const struct tgsi_full_src_register *reg, @@ -1818,50 +1912,39 @@ buf = reg->Register.Dimension ? reg->Dimension.Index : 0; idx = reg->Register.Index * 4 + swizzle; - if (!reg->Register.Indirect && !reg->Dimension.Indirect) { - if (type != TGSI_TYPE_DOUBLE) - return bitcast(bld_base, type, ctx->constants[buf][idx]); - else { - return radeon_llvm_emit_fetch_double(bld_base, - ctx->constants[buf][idx], - ctx->constants[buf][idx + 1]); - } - } - if (reg->Register.Dimension && reg->Dimension.Indirect) { - LLVMValueRef ptr = LLVMGetParam(ctx->radeon_bld.main_fn, SI_PARAM_CONST_BUFFERS); + LLVMValueRef ptr = LLVMGetParam(ctx->main_fn, SI_PARAM_CONST_BUFFERS); LLVMValueRef index; index = get_bounded_indirect_index(ctx, ®->DimIndirect, reg->Dimension.Index, SI_NUM_CONST_BUFFERS); bufp = build_indexed_load_const(ctx, ptr, index); } else - bufp = ctx->const_buffers[buf]; + bufp = load_const_buffer_desc(ctx, buf); - addr = ctx->radeon_bld.soa.addr[ireg->Index][ireg->Swizzle]; - addr = LLVMBuildLoad(base->gallivm->builder, addr, "load addr reg"); - addr = lp_build_mul_imm(&bld_base->uint_bld, addr, 16); - addr = lp_build_add(&bld_base->uint_bld, addr, - lp_build_const_int32(base->gallivm, idx * 4)); + if (reg->Register.Indirect) { + addr = ctx->addrs[ireg->Index][ireg->Swizzle]; + addr = LLVMBuildLoad(base->gallivm->builder, addr, "load addr reg"); + addr = lp_build_mul_imm(&bld_base->uint_bld, addr, 16); + addr = lp_build_add(&bld_base->uint_bld, addr, + lp_build_const_int32(base->gallivm, idx * 4)); + } else { + addr = LLVMConstInt(ctx->i32, idx * 4, 0); + } - result = buffer_load_const(base->gallivm->builder, bufp, - addr, ctx->f32); + result = buffer_load_const(ctx, bufp, addr); - if (type != TGSI_TYPE_DOUBLE) + if (!tgsi_type_is_64bit(type)) result = bitcast(bld_base, type, result); else { LLVMValueRef addr2, result2; - addr2 = ctx->radeon_bld.soa.addr[ireg->Index][ireg->Swizzle]; - addr2 = LLVMBuildLoad(base->gallivm->builder, addr2, "load addr reg2"); - addr2 = lp_build_mul_imm(&bld_base->uint_bld, addr2, 16); - addr2 = lp_build_add(&bld_base->uint_bld, addr2, - lp_build_const_int32(base->gallivm, (idx + 1) * 4)); - result2 = buffer_load_const(base->gallivm->builder, bufp, - addr2, ctx->f32); + addr2 = lp_build_add(&bld_base->uint_bld, addr, + LLVMConstInt(ctx->i32, 4, 0)); + result2 = buffer_load_const(ctx, bufp, addr2); - result = radeon_llvm_emit_fetch_double(bld_base, - result, result2); + result = si_llvm_emit_fetch_64bit(bld_base, type, + result, result2); } return result; } @@ -1895,15 +1978,14 @@ LLVMValueRef *args) { struct si_shader_context *ctx = si_shader_context(bld_base); - struct lp_build_context *uint = - &ctx->radeon_bld.soa.bld_base.uint_bld; + struct lp_build_context *uint = &ctx->bld_base.uint_bld; struct lp_build_context *base = &bld_base->base; struct gallivm_state *gallivm = base->gallivm; LLVMBuilderRef builder = base->gallivm->builder; LLVMValueRef val[4]; unsigned spi_shader_col_format = V_028714_SPI_SHADER_32_ABGR; unsigned chan; - bool is_int8; + bool is_int8, is_int10; /* Default is 0xf. Adjusted below depending on the format. */ args[0] = lp_build_const_int32(base->gallivm, 0xf); /* writemask */ @@ -1918,13 +2000,14 @@ args[3] = lp_build_const_int32(base->gallivm, target); if (ctx->type == PIPE_SHADER_FRAGMENT) { - const union si_shader_key *key = &ctx->shader->key; - unsigned col_formats = key->ps.epilog.spi_shader_col_format; + const struct si_shader_key *key = &ctx->shader->key; + unsigned col_formats = key->part.ps.epilog.spi_shader_col_format; int cbuf = target - V_008DFC_SQ_EXP_MRT; assert(cbuf >= 0 && cbuf < 8); spi_shader_col_format = (col_formats >> (cbuf * 4)) & 0xf; - is_int8 = (key->ps.epilog.color_is_int8 >> cbuf) & 0x1; + is_int8 = (key->part.ps.epilog.color_is_int8 >> cbuf) & 0x1; + is_int10 = (key->part.ps.epilog.color_is_int10 >> cbuf) & 0x1; } args[4] = uint->zero; /* COMPR flag */ @@ -1969,7 +2052,7 @@ packed = lp_build_intrinsic(base->gallivm->builder, "llvm.SI.packf16", ctx->i32, pack_args, 2, - LLVMReadNoneAttribute | LLVMNoUnwindAttribute); + LP_FUNC_ATTR_READNONE); args[chan + 5] = LLVMBuildBitCast(base->gallivm->builder, packed, ctx->f32, ""); @@ -1978,7 +2061,7 @@ case V_028714_SPI_SHADER_UNORM16_ABGR: for (chan = 0; chan < 4; chan++) { - val[chan] = radeon_llvm_saturate(bld_base, values[chan]); + val[chan] = si_llvm_saturate(bld_base, values[chan]); val[chan] = LLVMBuildFMul(builder, val[chan], lp_build_const_float(gallivm, 65535), ""); val[chan] = LLVMBuildFAdd(builder, val[chan], @@ -2024,13 +2107,17 @@ break; case V_028714_SPI_SHADER_UINT16_ABGR: { - LLVMValueRef max = lp_build_const_int32(gallivm, is_int8 ? - 255 : 65535); + LLVMValueRef max_rgb = lp_build_const_int32(gallivm, + is_int8 ? 255 : is_int10 ? 1023 : 65535); + LLVMValueRef max_alpha = + !is_int10 ? max_rgb : lp_build_const_int32(gallivm, 3); + /* Clamp. */ for (chan = 0; chan < 4; chan++) { val[chan] = bitcast(bld_base, TGSI_TYPE_UNSIGNED, values[chan]); val[chan] = lp_build_emit_llvm_binary(bld_base, TGSI_OPCODE_UMIN, - val[chan], max); + val[chan], + chan == 3 ? max_alpha : max_rgb); } args[4] = uint->one; /* COMPR flag */ @@ -2042,19 +2129,24 @@ } case V_028714_SPI_SHADER_SINT16_ABGR: { - LLVMValueRef max = lp_build_const_int32(gallivm, is_int8 ? - 127 : 32767); - LLVMValueRef min = lp_build_const_int32(gallivm, is_int8 ? - -128 : -32768); + LLVMValueRef max_rgb = lp_build_const_int32(gallivm, + is_int8 ? 127 : is_int10 ? 511 : 32767); + LLVMValueRef min_rgb = lp_build_const_int32(gallivm, + is_int8 ? -128 : is_int10 ? -512 : -32768); + LLVMValueRef max_alpha = + !is_int10 ? max_rgb : lp_build_const_int32(gallivm, 1); + LLVMValueRef min_alpha = + !is_int10 ? min_rgb : lp_build_const_int32(gallivm, -2); + /* Clamp. */ for (chan = 0; chan < 4; chan++) { val[chan] = bitcast(bld_base, TGSI_TYPE_UNSIGNED, values[chan]); val[chan] = lp_build_emit_llvm_binary(bld_base, - TGSI_OPCODE_IMIN, - val[chan], max); + TGSI_OPCODE_IMIN, + val[chan], chan == 3 ? max_alpha : max_rgb); val[chan] = lp_build_emit_llvm_binary(bld_base, - TGSI_OPCODE_IMAX, - val[chan], min); + TGSI_OPCODE_IMAX, + val[chan], chan == 3 ? min_alpha : min_rgb); } args[4] = uint->one; /* COMPR flag */ @@ -2077,13 +2169,13 @@ struct si_shader_context *ctx = si_shader_context(bld_base); struct gallivm_state *gallivm = bld_base->base.gallivm; - if (ctx->shader->key.ps.epilog.alpha_func != PIPE_FUNC_NEVER) { - LLVMValueRef alpha_ref = LLVMGetParam(ctx->radeon_bld.main_fn, + if (ctx->shader->key.part.ps.epilog.alpha_func != PIPE_FUNC_NEVER) { + LLVMValueRef alpha_ref = LLVMGetParam(ctx->main_fn, SI_PARAM_ALPHA_REF); LLVMValueRef alpha_pass = lp_build_cmp(&bld_base->base, - ctx->shader->key.ps.epilog.alpha_func, + ctx->shader->key.part.ps.epilog.alpha_func, alpha, alpha_ref); LLVMValueRef arg = lp_build_select(&bld_base->base, @@ -2108,13 +2200,13 @@ LLVMValueRef coverage; /* alpha = alpha * popcount(coverage) / SI_NUM_SMOOTH_AA_SAMPLES */ - coverage = LLVMGetParam(ctx->radeon_bld.main_fn, + coverage = LLVMGetParam(ctx->main_fn, samplemask_param); coverage = bitcast(bld_base, TGSI_TYPE_SIGNED, coverage); coverage = lp_build_intrinsic(gallivm->builder, "llvm.ctpop.i32", ctx->i32, - &coverage, 1, LLVMReadNoneAttribute); + &coverage, 1, LP_FUNC_ATTR_READNONE); coverage = LLVMBuildUIToFP(gallivm->builder, coverage, ctx->f32, ""); @@ -2131,12 +2223,12 @@ { struct si_shader_context *ctx = si_shader_context(bld_base); struct lp_build_context *base = &bld_base->base; - struct lp_build_context *uint = &ctx->radeon_bld.soa.bld_base.uint_bld; + struct lp_build_context *uint = &ctx->bld_base.uint_bld; unsigned reg_index; unsigned chan; unsigned const_chan; LLVMValueRef base_elt; - LLVMValueRef ptr = LLVMGetParam(ctx->radeon_bld.main_fn, SI_PARAM_RW_BUFFERS); + LLVMValueRef ptr = LLVMGetParam(ctx->main_fn, SI_PARAM_RW_BUFFERS); LLVMValueRef constbuf_index = lp_build_const_int32(base->gallivm, SI_VS_CONST_CLIP_PLANES); LLVMValueRef const_resource = build_indexed_load_const(ctx, ptr, constbuf_index); @@ -2155,8 +2247,8 @@ args[1] = lp_build_const_int32(base->gallivm, ((reg_index * 4 + chan) * 4 + const_chan) * 4); - base_elt = buffer_load_const(base->gallivm->builder, const_resource, - args[1], ctx->f32); + base_elt = buffer_load_const(ctx, const_resource, + args[1]); args[5 + chan] = lp_build_add(base, args[5 + chan], lp_build_mul(base, base_elt, @@ -2194,16 +2286,70 @@ } } -/* On SI, the vertex shader is responsible for writing streamout data - * to buffers. */ +static void emit_streamout_output(struct si_shader_context *ctx, + LLVMValueRef const *so_buffers, + LLVMValueRef const *so_write_offsets, + struct pipe_stream_output *stream_out, + struct si_shader_output_values *shader_out) +{ + struct gallivm_state *gallivm = &ctx->gallivm; + LLVMBuilderRef builder = gallivm->builder; + unsigned buf_idx = stream_out->output_buffer; + unsigned start = stream_out->start_component; + unsigned num_comps = stream_out->num_components; + LLVMValueRef out[4]; + + assert(num_comps && num_comps <= 4); + if (!num_comps || num_comps > 4) + return; + + /* Load the output as int. */ + for (int j = 0; j < num_comps; j++) { + assert(stream_out->stream == shader_out->vertex_stream[start + j]); + + out[j] = LLVMBuildBitCast(builder, + shader_out->values[start + j], + ctx->i32, ""); + } + + /* Pack the output. */ + LLVMValueRef vdata = NULL; + + switch (num_comps) { + case 1: /* as i32 */ + vdata = out[0]; + break; + case 2: /* as v2i32 */ + case 3: /* as v4i32 (aligned to 4) */ + case 4: /* as v4i32 */ + vdata = LLVMGetUndef(LLVMVectorType(ctx->i32, util_next_power_of_two(num_comps))); + for (int j = 0; j < num_comps; j++) { + vdata = LLVMBuildInsertElement(builder, vdata, out[j], + LLVMConstInt(ctx->i32, j, 0), ""); + } + break; + } + + build_tbuffer_store_dwords(ctx, so_buffers[buf_idx], + vdata, num_comps, + so_write_offsets[buf_idx], + LLVMConstInt(ctx->i32, 0, 0), + stream_out->dst_offset * 4); +} + +/** + * Write streamout data to buffers for vertex stream @p stream (different + * vertex streams can occur for GS copy shaders). + */ static void si_llvm_emit_streamout(struct si_shader_context *ctx, struct si_shader_output_values *outputs, - unsigned noutput) + unsigned noutput, unsigned stream) { - struct pipe_stream_output_info *so = &ctx->shader->selector->so; - struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm; + struct si_shader_selector *sel = ctx->shader->selector; + struct pipe_stream_output_info *so = &sel->so; + struct gallivm_state *gallivm = &ctx->gallivm; LLVMBuilderRef builder = gallivm->builder; - int i, j; + int i; struct lp_build_if_state if_ctx; /* Get bits [22:16], i.e. (so_param >> 16) & 127; */ @@ -2216,9 +2362,6 @@ LLVMValueRef can_emit = LLVMBuildICmp(builder, LLVMIntULT, tid, so_vtx_count, ""); - LLVMValueRef stream_id = - unpack_param(ctx, ctx->param_streamout_config, 24, 2); - /* Emit the streamout code conditionally. This actually avoids * out-of-bounds buffer access. The hw tells us via the SGPR * (so_vtx_count) which threads are allowed to emit streamout data. */ @@ -2231,19 +2374,29 @@ */ LLVMValueRef so_write_index = - LLVMGetParam(ctx->radeon_bld.main_fn, + LLVMGetParam(ctx->main_fn, ctx->param_streamout_write_index); /* Compute (streamout_write_index + thread_id). */ so_write_index = LLVMBuildAdd(builder, so_write_index, tid, ""); - /* Compute the write offset for each enabled buffer. */ + /* Load the descriptor and compute the write offset for each + * enabled buffer. */ LLVMValueRef so_write_offset[4] = {}; + LLVMValueRef so_buffers[4]; + LLVMValueRef buf_ptr = LLVMGetParam(ctx->main_fn, + SI_PARAM_RW_BUFFERS); + for (i = 0; i < 4; i++) { if (!so->stride[i]) continue; - LLVMValueRef so_offset = LLVMGetParam(ctx->radeon_bld.main_fn, + LLVMValueRef offset = lp_build_const_int32(gallivm, + SI_VS_STREAMOUT_BUF0 + i); + + so_buffers[i] = build_indexed_load_const(ctx, buf_ptr, offset); + + LLVMValueRef so_offset = LLVMGetParam(ctx->main_fn, ctx->param_streamout_offset[i]); so_offset = LLVMBuildMul(builder, so_offset, LLVMConstInt(ctx->i32, 4, 0), ""); @@ -2254,58 +2407,16 @@ /* Write streamout data. */ for (i = 0; i < so->num_outputs; i++) { - unsigned buf_idx = so->output[i].output_buffer; unsigned reg = so->output[i].register_index; - unsigned start = so->output[i].start_component; - unsigned num_comps = so->output[i].num_components; - unsigned stream = so->output[i].stream; - LLVMValueRef out[4]; - struct lp_build_if_state if_ctx_stream; - - assert(num_comps && num_comps <= 4); - if (!num_comps || num_comps > 4) - continue; if (reg >= noutput) continue; - /* Load the output as int. */ - for (j = 0; j < num_comps; j++) { - out[j] = LLVMBuildBitCast(builder, - outputs[reg].values[start+j], - ctx->i32, ""); - } - - /* Pack the output. */ - LLVMValueRef vdata = NULL; - - switch (num_comps) { - case 1: /* as i32 */ - vdata = out[0]; - break; - case 2: /* as v2i32 */ - case 3: /* as v4i32 (aligned to 4) */ - case 4: /* as v4i32 */ - vdata = LLVMGetUndef(LLVMVectorType(ctx->i32, util_next_power_of_two(num_comps))); - for (j = 0; j < num_comps; j++) { - vdata = LLVMBuildInsertElement(builder, vdata, out[j], - LLVMConstInt(ctx->i32, j, 0), ""); - } - break; - } + if (stream != so->output[i].stream) + continue; - LLVMValueRef can_emit_stream = - LLVMBuildICmp(builder, LLVMIntEQ, - stream_id, - lp_build_const_int32(gallivm, stream), ""); - - lp_build_if(&if_ctx_stream, gallivm, can_emit_stream); - build_tbuffer_store_dwords(ctx, ctx->so_buffers[buf_idx], - vdata, num_comps, - so_write_offset[buf_idx], - LLVMConstInt(ctx->i32, 0, 0), - so->output[i].dst_offset*4); - lp_build_endif(&if_ctx_stream); + emit_streamout_output(ctx, so_buffers, so_write_offset, + &so->output[i], &outputs[reg]); } } lp_build_endif(&if_ctx); @@ -2320,8 +2431,7 @@ struct si_shader_context *ctx = si_shader_context(bld_base); struct si_shader *shader = ctx->shader; struct lp_build_context *base = &bld_base->base; - struct lp_build_context *uint = - &ctx->radeon_bld.soa.bld_base.uint_bld; + struct lp_build_context *uint = &ctx->bld_base.uint_bld; LLVMValueRef args[9]; LLVMValueRef pos_args[4][9] = { { 0 } }; LLVMValueRef psize_value = NULL, edgeflag_value = NULL, layer_value = NULL, viewport_index_value = NULL; @@ -2331,13 +2441,35 @@ unsigned pos_idx; int i; - if (outputs && ctx->shader->selector->so.num_outputs) { - si_llvm_emit_streamout(ctx, outputs, noutput); - } - for (i = 0; i < noutput; i++) { - semantic_name = outputs[i].name; - semantic_index = outputs[i].sid; + semantic_name = outputs[i].semantic_name; + semantic_index = outputs[i].semantic_index; + bool export_param = true; + + switch (semantic_name) { + case TGSI_SEMANTIC_POSITION: /* ignore these */ + case TGSI_SEMANTIC_PSIZE: + case TGSI_SEMANTIC_CLIPVERTEX: + case TGSI_SEMANTIC_EDGEFLAG: + break; + case TGSI_SEMANTIC_GENERIC: + case TGSI_SEMANTIC_CLIPDIST: + if (shader->key.opt.hw_vs.kill_outputs & + (1ull << si_shader_io_get_unique_index(semantic_name, semantic_index))) + export_param = false; + break; + default: + if (shader->key.opt.hw_vs.kill_outputs2 & + (1u << si_shader_io_get_unique_index2(semantic_name, semantic_index))) + export_param = false; + break; + } + + if (outputs[i].vertex_stream[0] != 0 && + outputs[i].vertex_stream[1] != 0 && + outputs[i].vertex_stream[2] != 0 && + outputs[i].vertex_stream[3] != 0) + export_param = false; handle_semantic: /* Select the correct target */ @@ -2359,23 +2491,26 @@ case TGSI_SEMANTIC_POSITION: target = V_008DFC_SQ_EXP_POS; break; - case TGSI_SEMANTIC_COLOR: - case TGSI_SEMANTIC_BCOLOR: - target = V_008DFC_SQ_EXP_PARAM + param_count; - assert(i < ARRAY_SIZE(shader->info.vs_output_param_offset)); - shader->info.vs_output_param_offset[i] = param_count; - param_count++; - break; case TGSI_SEMANTIC_CLIPDIST: + if (shader->key.opt.hw_vs.clip_disable) { + semantic_name = TGSI_SEMANTIC_GENERIC; + goto handle_semantic; + } target = V_008DFC_SQ_EXP_POS + 2 + semantic_index; break; case TGSI_SEMANTIC_CLIPVERTEX: + if (shader->key.opt.hw_vs.clip_disable) + continue; si_llvm_emit_clipvertex(bld_base, pos_args, outputs[i].values); continue; + case TGSI_SEMANTIC_COLOR: + case TGSI_SEMANTIC_BCOLOR: case TGSI_SEMANTIC_PRIMID: case TGSI_SEMANTIC_FOG: case TGSI_SEMANTIC_TEXCOORD: case TGSI_SEMANTIC_GENERIC: + if (!export_param) + continue; target = V_008DFC_SQ_EXP_PARAM + param_count; assert(i < ARRAY_SIZE(shader->info.vs_output_param_offset)); shader->info.vs_output_param_offset[i] = param_count; @@ -2487,6 +2622,10 @@ } } +/** + * Forward all outputs from the vertex shader to the TES. This is only used + * for the fixed function TCS. + */ static void si_copy_tcs_inputs(struct lp_build_tgsi_context *bld_base) { struct si_shader_context *ctx = si_shader_context(bld_base); @@ -2497,11 +2636,11 @@ invocation_id = unpack_param(ctx, SI_PARAM_REL_IDS, 8, 5); - rw_buffers = LLVMGetParam(ctx->radeon_bld.main_fn, SI_PARAM_RW_BUFFERS); + rw_buffers = LLVMGetParam(ctx->main_fn, SI_PARAM_RW_BUFFERS); buffer = build_indexed_load_const(ctx, rw_buffers, lp_build_const_int32(gallivm, SI_HS_RING_TESS_OFFCHIP)); - buffer_offset = LLVMGetParam(ctx->radeon_bld.main_fn, ctx->param_oc_lds); + buffer_offset = LLVMGetParam(ctx->main_fn, ctx->param_oc_lds); lds_vertex_stride = unpack_param(ctx, SI_PARAM_TCS_IN_LAYOUT, 13, 8); lds_vertex_offset = LLVMBuildMul(gallivm->builder, invocation_id, @@ -2509,7 +2648,7 @@ lds_base = get_tcs_in_current_patch_offset(ctx); lds_base = LLVMBuildAdd(gallivm->builder, lds_base, lds_vertex_offset, ""); - inputs = ctx->shader->key.tcs.epilog.inputs_to_copy; + inputs = ctx->shader->key.mono.tcs.inputs_to_copy; while (inputs) { unsigned i = u_bit_scan64(&inputs); @@ -2556,7 +2695,7 @@ invocation_id, bld_base->uint_bld.zero, "")); /* Determine the layout of one tess factor element in the buffer. */ - switch (shader->key.tcs.epilog.prim_mode) { + switch (shader->key.part.tcs.epilog.prim_mode) { case PIPE_PRIM_LINES: stride = 2; /* 2 dwords, 1 vec2 store */ outer_comps = 2; @@ -2591,10 +2730,18 @@ lp_build_const_int32(gallivm, tess_outer_index * 4), ""); - for (i = 0; i < outer_comps; i++) - out[i] = lds_load(bld_base, TGSI_TYPE_SIGNED, i, lds_outer); - for (i = 0; i < inner_comps; i++) - out[outer_comps+i] = lds_load(bld_base, TGSI_TYPE_SIGNED, i, lds_inner); + if (shader->key.part.tcs.epilog.prim_mode == PIPE_PRIM_LINES) { + /* For isolines, the hardware expects tess factors in the + * reverse order from what GLSL / TGSI specify. + */ + out[0] = lds_load(bld_base, TGSI_TYPE_SIGNED, 1, lds_outer); + out[1] = lds_load(bld_base, TGSI_TYPE_SIGNED, 0, lds_outer); + } else { + for (i = 0; i < outer_comps; i++) + out[i] = lds_load(bld_base, TGSI_TYPE_SIGNED, i, lds_outer); + for (i = 0; i < inner_comps; i++) + out[outer_comps+i] = lds_load(bld_base, TGSI_TYPE_SIGNED, i, lds_inner); + } /* Convert the outputs to vectors for stores. */ vec0 = lp_build_gather_values(gallivm, out, MIN2(stride, 4)); @@ -2604,13 +2751,13 @@ vec1 = lp_build_gather_values(gallivm, out+4, stride - 4); /* Get the buffer. */ - rw_buffers = LLVMGetParam(ctx->radeon_bld.main_fn, + rw_buffers = LLVMGetParam(ctx->main_fn, SI_PARAM_RW_BUFFERS); buffer = build_indexed_load_const(ctx, rw_buffers, lp_build_const_int32(gallivm, SI_HS_RING_TESS_FACTOR)); /* Get the offset. */ - tf_base = LLVMGetParam(ctx->radeon_bld.main_fn, + tf_base = LLVMGetParam(ctx->main_fn, SI_PARAM_TESS_FACTOR_OFFSET); byteoffset = LLVMBuildMul(gallivm->builder, rel_patch_id, lp_build_const_int32(gallivm, 4 * stride), ""); @@ -2641,50 +2788,46 @@ struct si_shader_context *ctx = si_shader_context(bld_base); LLVMValueRef rel_patch_id, invocation_id, tf_lds_offset; + si_copy_tcs_inputs(bld_base); + rel_patch_id = get_rel_patch_id(ctx); invocation_id = unpack_param(ctx, SI_PARAM_REL_IDS, 8, 5); tf_lds_offset = get_tcs_out_current_patch_data_offset(ctx); - if (!ctx->is_monolithic) { - /* Return epilog parameters from this function. */ - LLVMBuilderRef builder = bld_base->base.gallivm->builder; - LLVMValueRef ret = ctx->return_value; - LLVMValueRef rw_buffers, rw0, rw1, tf_soffset; - unsigned vgpr; - - /* RW_BUFFERS pointer */ - rw_buffers = LLVMGetParam(ctx->radeon_bld.main_fn, - SI_PARAM_RW_BUFFERS); - rw_buffers = LLVMBuildPtrToInt(builder, rw_buffers, ctx->i64, ""); - rw_buffers = LLVMBuildBitCast(builder, rw_buffers, ctx->v2i32, ""); - rw0 = LLVMBuildExtractElement(builder, rw_buffers, - bld_base->uint_bld.zero, ""); - rw1 = LLVMBuildExtractElement(builder, rw_buffers, - bld_base->uint_bld.one, ""); - ret = LLVMBuildInsertValue(builder, ret, rw0, 0, ""); - ret = LLVMBuildInsertValue(builder, ret, rw1, 1, ""); - - /* Tess factor buffer soffset is after user SGPRs. */ - tf_soffset = LLVMGetParam(ctx->radeon_bld.main_fn, - SI_PARAM_TESS_FACTOR_OFFSET); - ret = LLVMBuildInsertValue(builder, ret, tf_soffset, - SI_TCS_NUM_USER_SGPR + 1, ""); - - /* VGPRs */ - rel_patch_id = bitcast(bld_base, TGSI_TYPE_FLOAT, rel_patch_id); - invocation_id = bitcast(bld_base, TGSI_TYPE_FLOAT, invocation_id); - tf_lds_offset = bitcast(bld_base, TGSI_TYPE_FLOAT, tf_lds_offset); - - vgpr = SI_TCS_NUM_USER_SGPR + 2; - ret = LLVMBuildInsertValue(builder, ret, rel_patch_id, vgpr++, ""); - ret = LLVMBuildInsertValue(builder, ret, invocation_id, vgpr++, ""); - ret = LLVMBuildInsertValue(builder, ret, tf_lds_offset, vgpr++, ""); - ctx->return_value = ret; - return; - } + /* Return epilog parameters from this function. */ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + LLVMValueRef ret = ctx->return_value; + LLVMValueRef rw_buffers, rw0, rw1, tf_soffset; + unsigned vgpr; - si_copy_tcs_inputs(bld_base); - si_write_tess_factors(bld_base, rel_patch_id, invocation_id, tf_lds_offset); + /* RW_BUFFERS pointer */ + rw_buffers = LLVMGetParam(ctx->main_fn, + SI_PARAM_RW_BUFFERS); + rw_buffers = LLVMBuildPtrToInt(builder, rw_buffers, ctx->i64, ""); + rw_buffers = LLVMBuildBitCast(builder, rw_buffers, ctx->v2i32, ""); + rw0 = LLVMBuildExtractElement(builder, rw_buffers, + bld_base->uint_bld.zero, ""); + rw1 = LLVMBuildExtractElement(builder, rw_buffers, + bld_base->uint_bld.one, ""); + ret = LLVMBuildInsertValue(builder, ret, rw0, 0, ""); + ret = LLVMBuildInsertValue(builder, ret, rw1, 1, ""); + + /* Tess factor buffer soffset is after user SGPRs. */ + tf_soffset = LLVMGetParam(ctx->main_fn, + SI_PARAM_TESS_FACTOR_OFFSET); + ret = LLVMBuildInsertValue(builder, ret, tf_soffset, + SI_TCS_NUM_USER_SGPR + 1, ""); + + /* VGPRs */ + rel_patch_id = bitcast(bld_base, TGSI_TYPE_FLOAT, rel_patch_id); + invocation_id = bitcast(bld_base, TGSI_TYPE_FLOAT, invocation_id); + tf_lds_offset = bitcast(bld_base, TGSI_TYPE_FLOAT, tf_lds_offset); + + vgpr = SI_TCS_NUM_USER_SGPR + 2; + ret = LLVMBuildInsertValue(builder, ret, rel_patch_id, vgpr++, ""); + ret = LLVMBuildInsertValue(builder, ret, invocation_id, vgpr++, ""); + ret = LLVMBuildInsertValue(builder, ret, tf_lds_offset, vgpr++, ""); + ctx->return_value = ret; } static void si_llvm_emit_ls_epilogue(struct lp_build_tgsi_context *bld_base) @@ -2694,7 +2837,7 @@ struct tgsi_shader_info *info = &shader->selector->info; struct gallivm_state *gallivm = bld_base->base.gallivm; unsigned i, chan; - LLVMValueRef vertex_id = LLVMGetParam(ctx->radeon_bld.main_fn, + LLVMValueRef vertex_id = LLVMGetParam(ctx->main_fn, ctx->param_rel_auto_id); LLVMValueRef vertex_dw_stride = unpack_param(ctx, SI_PARAM_LS_OUT_LAYOUT, 13, 8); @@ -2704,7 +2847,7 @@ /* Write outputs to LDS. The next shader (TCS aka HS) will read * its inputs from it. */ for (i = 0; i < info->num_outputs; i++) { - LLVMValueRef *out_ptr = ctx->radeon_bld.soa.outputs[i]; + LLVMValueRef *out_ptr = ctx->outputs[i]; unsigned name = info->output_semantic_name[i]; unsigned index = info->output_semantic_index[i]; int param = si_shader_io_get_unique_index(name, index); @@ -2724,14 +2867,13 @@ struct gallivm_state *gallivm = bld_base->base.gallivm; struct si_shader *es = ctx->shader; struct tgsi_shader_info *info = &es->selector->info; - LLVMValueRef soffset = LLVMGetParam(ctx->radeon_bld.main_fn, + LLVMValueRef soffset = LLVMGetParam(ctx->main_fn, ctx->param_es2gs_offset); unsigned chan; int i; for (i = 0; i < info->num_outputs; i++) { - LLVMValueRef *out_ptr = - ctx->radeon_bld.soa.outputs[i]; + LLVMValueRef *out_ptr = ctx->outputs[i]; int param_index; if (info->output_semantic_name[i] == TGSI_SEMANTIC_VIEWPORT_INDEX || @@ -2764,9 +2906,9 @@ LLVMValueRef args[2]; args[0] = lp_build_const_int32(gallivm, SENDMSG_GS_OP_NOP | SENDMSG_GS_DONE); - args[1] = LLVMGetParam(ctx->radeon_bld.main_fn, SI_PARAM_GS_WAVE_ID); + args[1] = LLVMGetParam(ctx->main_fn, SI_PARAM_GS_WAVE_ID); lp_build_intrinsic(gallivm->builder, "llvm.SI.sendmsg", - ctx->voidt, args, 2, LLVMNoUnwindAttribute); + ctx->voidt, args, 2, 0); } static void si_llvm_emit_vs_epilogue(struct lp_build_tgsi_context *bld_base) @@ -2777,7 +2919,7 @@ struct si_shader_output_values *outputs = NULL; int i,j; - assert(!ctx->is_gs_copy_shader); + assert(!ctx->shader->is_gs_copy_shader); outputs = MALLOC((info->num_outputs + 1) * sizeof(outputs[0])); @@ -2800,7 +2942,7 @@ /* We've found a color. */ if (!cond) { /* The state is in the first bit of the user SGPR. */ - cond = LLVMGetParam(ctx->radeon_bld.main_fn, + cond = LLVMGetParam(ctx->main_fn, SI_PARAM_VS_STATE_BITS); cond = LLVMBuildTrunc(gallivm->builder, cond, ctx->i1, ""); @@ -2808,9 +2950,9 @@ } for (j = 0; j < 4; j++) { - addr = ctx->radeon_bld.soa.outputs[i][j]; + addr = ctx->outputs[i][j]; val = LLVMBuildLoad(gallivm->builder, addr, ""); - val = radeon_llvm_saturate(bld_base, val); + val = si_llvm_saturate(bld_base, val); LLVMBuildStore(gallivm->builder, val, addr); } } @@ -2820,51 +2962,70 @@ } for (i = 0; i < info->num_outputs; i++) { - outputs[i].name = info->output_semantic_name[i]; - outputs[i].sid = info->output_semantic_index[i]; + outputs[i].semantic_name = info->output_semantic_name[i]; + outputs[i].semantic_index = info->output_semantic_index[i]; - for (j = 0; j < 4; j++) + for (j = 0; j < 4; j++) { outputs[i].values[j] = LLVMBuildLoad(gallivm->builder, - ctx->radeon_bld.soa.outputs[i][j], + ctx->outputs[i][j], ""); - } - - if (ctx->is_monolithic) { - /* Export PrimitiveID when PS needs it. */ - if (si_vs_exports_prim_id(ctx->shader)) { - outputs[i].name = TGSI_SEMANTIC_PRIMID; - outputs[i].sid = 0; - outputs[i].values[0] = bitcast(bld_base, TGSI_TYPE_FLOAT, - get_primitive_id(bld_base, 0)); - outputs[i].values[1] = bld_base->base.undef; - outputs[i].values[2] = bld_base->base.undef; - outputs[i].values[3] = bld_base->base.undef; - i++; + outputs[i].vertex_stream[j] = + (info->output_streams[i] >> (2 * j)) & 3; } - } else { - /* Return the primitive ID from the LLVM function. */ - ctx->return_value = - LLVMBuildInsertValue(gallivm->builder, - ctx->return_value, - bitcast(bld_base, TGSI_TYPE_FLOAT, - get_primitive_id(bld_base, 0)), - VS_EPILOG_PRIMID_LOC, ""); + } + /* Return the primitive ID from the LLVM function. */ + ctx->return_value = + LLVMBuildInsertValue(gallivm->builder, + ctx->return_value, + bitcast(bld_base, TGSI_TYPE_FLOAT, + get_primitive_id(bld_base, 0)), + VS_EPILOG_PRIMID_LOC, ""); + + if (ctx->shader->selector->so.num_outputs) + si_llvm_emit_streamout(ctx, outputs, i, 0); si_llvm_export_vs(bld_base, outputs, i); FREE(outputs); } +struct si_ps_exports { + unsigned num; + LLVMValueRef args[10][9]; +}; + +unsigned si_get_spi_shader_z_format(bool writes_z, bool writes_stencil, + bool writes_samplemask) +{ + if (writes_z) { + /* Z needs 32 bits. */ + if (writes_samplemask) + return V_028710_SPI_SHADER_32_ABGR; + else if (writes_stencil) + return V_028710_SPI_SHADER_32_GR; + else + return V_028710_SPI_SHADER_32_R; + } else if (writes_stencil || writes_samplemask) { + /* Both stencil and sample mask need only 16 bits. */ + return V_028710_SPI_SHADER_UINT16_ABGR; + } else { + return V_028710_SPI_SHADER_ZERO; + } +} + static void si_export_mrt_z(struct lp_build_tgsi_context *bld_base, - LLVMValueRef depth, LLVMValueRef stencil, - LLVMValueRef samplemask) + LLVMValueRef depth, LLVMValueRef stencil, + LLVMValueRef samplemask, struct si_ps_exports *exp) { struct si_shader_context *ctx = si_shader_context(bld_base); struct lp_build_context *base = &bld_base->base; struct lp_build_context *uint = &bld_base->uint_bld; LLVMValueRef args[9]; unsigned mask = 0; + unsigned format = si_get_spi_shader_z_format(depth != NULL, + stencil != NULL, + samplemask != NULL); assert(depth || stencil || samplemask); @@ -2880,69 +3041,86 @@ args[7] = base->undef; /* B, sample mask */ args[8] = base->undef; /* A, alpha to mask */ - if (depth) { - args[5] = depth; - mask |= 0x1; - } - - if (stencil) { - args[6] = stencil; - mask |= 0x2; - } + if (format == V_028710_SPI_SHADER_UINT16_ABGR) { + assert(!depth); + args[4] = uint->one; /* COMPR flag */ - if (samplemask) { - args[7] = samplemask; - mask |= 0x4; + if (stencil) { + /* Stencil should be in X[23:16]. */ + stencil = bitcast(bld_base, TGSI_TYPE_UNSIGNED, stencil); + stencil = LLVMBuildShl(base->gallivm->builder, stencil, + LLVMConstInt(ctx->i32, 16, 0), ""); + args[5] = bitcast(bld_base, TGSI_TYPE_FLOAT, stencil); + mask |= 0x3; + } + if (samplemask) { + /* SampleMask should be in Y[15:0]. */ + args[6] = samplemask; + mask |= 0xc; + } + } else { + if (depth) { + args[5] = depth; + mask |= 0x1; + } + if (stencil) { + args[6] = stencil; + mask |= 0x2; + } + if (samplemask) { + args[7] = samplemask; + mask |= 0x4; + } } - /* SI (except OLAND) has a bug that it only looks + /* SI (except OLAND and HAINAN) has a bug that it only looks * at the X writemask component. */ if (ctx->screen->b.chip_class == SI && - ctx->screen->b.family != CHIP_OLAND) + ctx->screen->b.family != CHIP_OLAND && + ctx->screen->b.family != CHIP_HAINAN) mask |= 0x1; /* Specify which components to enable */ args[0] = lp_build_const_int32(base->gallivm, mask); - lp_build_intrinsic(base->gallivm->builder, "llvm.SI.export", - ctx->voidt, args, 9, 0); + memcpy(exp->args[exp->num++], args, sizeof(args)); } static void si_export_mrt_color(struct lp_build_tgsi_context *bld_base, LLVMValueRef *color, unsigned index, unsigned samplemask_param, - bool is_last) + bool is_last, struct si_ps_exports *exp) { struct si_shader_context *ctx = si_shader_context(bld_base); struct lp_build_context *base = &bld_base->base; int i; /* Clamp color */ - if (ctx->shader->key.ps.epilog.clamp_color) + if (ctx->shader->key.part.ps.epilog.clamp_color) for (i = 0; i < 4; i++) - color[i] = radeon_llvm_saturate(bld_base, color[i]); + color[i] = si_llvm_saturate(bld_base, color[i]); /* Alpha to one */ - if (ctx->shader->key.ps.epilog.alpha_to_one) + if (ctx->shader->key.part.ps.epilog.alpha_to_one) color[3] = base->one; /* Alpha test */ if (index == 0 && - ctx->shader->key.ps.epilog.alpha_func != PIPE_FUNC_ALWAYS) + ctx->shader->key.part.ps.epilog.alpha_func != PIPE_FUNC_ALWAYS) si_alpha_test(bld_base, color[3]); /* Line & polygon smoothing */ - if (ctx->shader->key.ps.epilog.poly_line_smoothing) + if (ctx->shader->key.part.ps.epilog.poly_line_smoothing) color[3] = si_scale_alpha_by_sample_mask(bld_base, color[3], samplemask_param); /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */ - if (ctx->shader->key.ps.epilog.last_cbuf > 0) { + if (ctx->shader->key.part.ps.epilog.last_cbuf > 0) { LLVMValueRef args[8][9]; int c, last = -1; /* Get the export arguments, also find out what the last one is. */ - for (c = 0; c <= ctx->shader->key.ps.epilog.last_cbuf; c++) { + for (c = 0; c <= ctx->shader->key.part.ps.epilog.last_cbuf; c++) { si_llvm_init_export_args(bld_base, color, V_008DFC_SQ_EXP_MRT + c, args[c]); if (args[c][0] != bld_base->uint_bld.zero) @@ -2950,15 +3128,14 @@ } /* Emit all exports. */ - for (c = 0; c <= ctx->shader->key.ps.epilog.last_cbuf; c++) { + for (c = 0; c <= ctx->shader->key.part.ps.epilog.last_cbuf; c++) { if (is_last && last == c) { args[c][1] = bld_base->uint_bld.one; /* whether the EXEC mask is valid */ args[c][2] = bld_base->uint_bld.one; /* DONE bit */ } else if (args[c][0] == bld_base->uint_bld.zero) continue; /* unnecessary NULL export */ - lp_build_intrinsic(base->gallivm->builder, "llvm.SI.export", - ctx->voidt, args[c], 9, 0); + memcpy(exp->args[exp->num++], args[c], sizeof(args[c])); } } else { LLVMValueRef args[9]; @@ -2972,14 +3149,22 @@ } else if (args[0] == bld_base->uint_bld.zero) return; /* unnecessary NULL export */ - lp_build_intrinsic(base->gallivm->builder, "llvm.SI.export", - ctx->voidt, args, 9, 0); + memcpy(exp->args[exp->num++], args, sizeof(args)); } } -static void si_export_null(struct lp_build_tgsi_context *bld_base) +static void si_emit_ps_exports(struct si_shader_context *ctx, + struct si_ps_exports *exp) { - struct si_shader_context *ctx = si_shader_context(bld_base); + for (unsigned i = 0; i < exp->num; i++) + lp_build_intrinsic(ctx->gallivm.builder, + "llvm.SI.export", ctx->voidt, + exp->args[i], 9, 0); +} + +static void si_export_null(struct lp_build_tgsi_context *bld_base) +{ + struct si_shader_context *ctx = si_shader_context(bld_base); struct lp_build_context *base = &bld_base->base; struct lp_build_context *uint = &bld_base->uint_bld; LLVMValueRef args[9]; @@ -2989,104 +3174,15 @@ args[2] = uint->one; /* DONE bit */ args[3] = lp_build_const_int32(base->gallivm, V_008DFC_SQ_EXP_NULL); args[4] = uint->zero; /* COMPR flag (0 = 32-bit export) */ - args[5] = uint->undef; /* R */ - args[6] = uint->undef; /* G */ - args[7] = uint->undef; /* B */ - args[8] = uint->undef; /* A */ + args[5] = base->undef; /* R */ + args[6] = base->undef; /* G */ + args[7] = base->undef; /* B */ + args[8] = base->undef; /* A */ lp_build_intrinsic(base->gallivm->builder, "llvm.SI.export", ctx->voidt, args, 9, 0); } -static void si_llvm_emit_fs_epilogue(struct lp_build_tgsi_context *bld_base) -{ - struct si_shader_context *ctx = si_shader_context(bld_base); - struct si_shader *shader = ctx->shader; - struct lp_build_context *base = &bld_base->base; - struct tgsi_shader_info *info = &shader->selector->info; - LLVMBuilderRef builder = base->gallivm->builder; - LLVMValueRef depth = NULL, stencil = NULL, samplemask = NULL; - int last_color_export = -1; - int i; - - /* Determine the last export. If MRTZ is present, it's always last. - * Otherwise, find the last color export. - */ - if (!info->writes_z && !info->writes_stencil && !info->writes_samplemask) { - unsigned spi_format = shader->key.ps.epilog.spi_shader_col_format; - - /* Don't export NULL and return if alpha-test is enabled. */ - if (shader->key.ps.epilog.alpha_func != PIPE_FUNC_ALWAYS && - shader->key.ps.epilog.alpha_func != PIPE_FUNC_NEVER && - (spi_format & 0xf) == 0) - spi_format |= V_028714_SPI_SHADER_32_AR; - - for (i = 0; i < info->num_outputs; i++) { - unsigned index = info->output_semantic_index[i]; - - if (info->output_semantic_name[i] != TGSI_SEMANTIC_COLOR) - continue; - - /* If last_cbuf > 0, FS_COLOR0_WRITES_ALL_CBUFS is true. */ - if (shader->key.ps.epilog.last_cbuf > 0) { - /* Just set this if any of the colorbuffers are enabled. */ - if (spi_format & - ((1llu << (4 * (shader->key.ps.epilog.last_cbuf + 1))) - 1)) - last_color_export = i; - continue; - } - - if ((spi_format >> (index * 4)) & 0xf) - last_color_export = i; - } - - /* If there are no outputs, export NULL. */ - if (last_color_export == -1) { - si_export_null(bld_base); - return; - } - } - - for (i = 0; i < info->num_outputs; i++) { - unsigned semantic_name = info->output_semantic_name[i]; - unsigned semantic_index = info->output_semantic_index[i]; - unsigned j; - LLVMValueRef color[4] = {}; - - /* Select the correct target */ - switch (semantic_name) { - case TGSI_SEMANTIC_POSITION: - depth = LLVMBuildLoad(builder, - ctx->radeon_bld.soa.outputs[i][2], ""); - break; - case TGSI_SEMANTIC_STENCIL: - stencil = LLVMBuildLoad(builder, - ctx->radeon_bld.soa.outputs[i][1], ""); - break; - case TGSI_SEMANTIC_SAMPLEMASK: - samplemask = LLVMBuildLoad(builder, - ctx->radeon_bld.soa.outputs[i][0], ""); - break; - case TGSI_SEMANTIC_COLOR: - for (j = 0; j < 4; j++) - color[j] = LLVMBuildLoad(builder, - ctx->radeon_bld.soa.outputs[i][j], ""); - - si_export_mrt_color(bld_base, color, semantic_index, - SI_PARAM_SAMPLE_COVERAGE, - last_color_export == i); - break; - default: - fprintf(stderr, - "Warning: SI unhandled fs output type:%d\n", - semantic_name); - } - } - - if (depth || stencil || samplemask) - si_export_mrt_z(bld_base, depth, stencil, samplemask); -} - /** * Return PS outputs in this order: * @@ -3122,22 +3218,22 @@ case TGSI_SEMANTIC_COLOR: assert(semantic_index < 8); for (j = 0; j < 4; j++) { - LLVMValueRef ptr = ctx->radeon_bld.soa.outputs[i][j]; + LLVMValueRef ptr = ctx->outputs[i][j]; LLVMValueRef result = LLVMBuildLoad(builder, ptr, ""); color[semantic_index][j] = result; } break; case TGSI_SEMANTIC_POSITION: depth = LLVMBuildLoad(builder, - ctx->radeon_bld.soa.outputs[i][2], ""); + ctx->outputs[i][2], ""); break; case TGSI_SEMANTIC_STENCIL: stencil = LLVMBuildLoad(builder, - ctx->radeon_bld.soa.outputs[i][1], ""); + ctx->outputs[i][1], ""); break; case TGSI_SEMANTIC_SAMPLEMASK: samplemask = LLVMBuildLoad(builder, - ctx->radeon_bld.soa.outputs[i][0], ""); + ctx->outputs[i][0], ""); break; default: fprintf(stderr, "Warning: SI unhandled fs output type:%d\n", @@ -3151,7 +3247,7 @@ /* Set SGPRs. */ ret = LLVMBuildInsertValue(builder, ret, bitcast(bld_base, TGSI_TYPE_SIGNED, - LLVMGetParam(ctx->radeon_bld.main_fn, + LLVMGetParam(ctx->main_fn, SI_PARAM_ALPHA_REF)), SI_SGPR_ALPHA_REF, ""); @@ -3175,7 +3271,7 @@ if (vgpr < first_vgpr + PS_EPILOG_SAMPLEMASK_MIN_LOC) vgpr = first_vgpr + PS_EPILOG_SAMPLEMASK_MIN_LOC; ret = LLVMBuildInsertValue(builder, ret, - LLVMGetParam(ctx->radeon_bld.main_fn, + LLVMGetParam(ctx->main_fn, SI_PARAM_SAMPLE_COVERAGE), vgpr++, ""); ctx->return_value = ret; @@ -3194,7 +3290,7 @@ LLVMBuilderRef builder = gallivm->builder; LLVMValueRef size = LLVMBuildExtractElement(builder, descriptor, - lp_build_const_int32(gallivm, 6), ""); + lp_build_const_int32(gallivm, 2), ""); if (ctx->screen->b.chip_class >= VI) { /* On VI, the descriptor contains the size in bytes, @@ -3203,7 +3299,7 @@ */ LLVMValueRef stride = LLVMBuildExtractElement(builder, descriptor, - lp_build_const_int32(gallivm, 5), ""); + lp_build_const_int32(gallivm, 1), ""); stride = LLVMBuildLShr(builder, stride, lp_build_const_int32(gallivm, 16), ""); stride = LLVMBuildAnd(builder, stride, @@ -3219,17 +3315,39 @@ * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with * intrinsic names). */ -static void build_int_type_name( +static void build_type_name_for_intr( LLVMTypeRef type, char *buf, unsigned bufsize) { - assert(bufsize >= 6); + LLVMTypeRef elem_type = type; - if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) - snprintf(buf, bufsize, "v%ui32", - LLVMGetVectorSize(type)); - else - strcpy(buf, "i32"); + assert(bufsize >= 8); + + if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) { + int ret = snprintf(buf, bufsize, "v%u", + LLVMGetVectorSize(type)); + if (ret < 0) { + char *type_name = LLVMPrintTypeToString(type); + fprintf(stderr, "Error building type name for: %s\n", + type_name); + return; + } + elem_type = LLVMGetElementType(type); + buf += ret; + bufsize -= ret; + } + switch (LLVMGetTypeKind(elem_type)) { + default: break; + case LLVMIntegerTypeKind: + snprintf(buf, bufsize, "i%d", LLVMGetIntTypeWidth(elem_type)); + break; + case LLVMFloatTypeKind: + snprintf(buf, bufsize, "f32"); + break; + case LLVMDoubleTypeKind: + snprintf(buf, bufsize, "f64"); + break; + } } static void build_tex_intrinsic(const struct lp_build_tgsi_action *action, @@ -3240,23 +3358,30 @@ * point in the program by emitting empty inline assembly that is marked as * having side effects. */ +#if 0 /* unused currently */ static void emit_optimization_barrier(struct si_shader_context *ctx) { - LLVMBuilderRef builder = ctx->radeon_bld.gallivm.builder; + LLVMBuilderRef builder = ctx->gallivm.builder; LLVMTypeRef ftype = LLVMFunctionType(ctx->voidt, NULL, 0, false); LLVMValueRef inlineasm = LLVMConstInlineAsm(ftype, "", "", true, false); LLVMBuildCall(builder, inlineasm, NULL, 0, ""); } +#endif -static void emit_waitcnt(struct si_shader_context *ctx) +/* Combine these with & instead of |. */ +#define NOOP_WAITCNT 0xf7f +#define LGKM_CNT 0x07f +#define VM_CNT 0xf70 + +static void emit_waitcnt(struct si_shader_context *ctx, unsigned simm16) { - struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm; + struct gallivm_state *gallivm = &ctx->gallivm; LLVMBuilderRef builder = gallivm->builder; LLVMValueRef args[1] = { - lp_build_const_int32(gallivm, 0xf70) + lp_build_const_int32(gallivm, simm16) }; lp_build_intrinsic(builder, "llvm.amdgcn.s.waitcnt", - ctx->voidt, args, 1, LLVMNoUnwindAttribute); + ctx->voidt, args, 1, 0); } static void membar_emit( @@ -3265,26 +3390,41 @@ struct lp_build_emit_data *emit_data) { struct si_shader_context *ctx = si_shader_context(bld_base); + LLVMValueRef src0 = lp_build_emit_fetch(bld_base, emit_data->inst, 0, 0); + unsigned flags = LLVMConstIntGetZExtValue(src0); + unsigned waitcnt = NOOP_WAITCNT; + + if (flags & TGSI_MEMBAR_THREAD_GROUP) + waitcnt &= VM_CNT & LGKM_CNT; + + if (flags & (TGSI_MEMBAR_ATOMIC_BUFFER | + TGSI_MEMBAR_SHADER_BUFFER | + TGSI_MEMBAR_SHADER_IMAGE)) + waitcnt &= VM_CNT; + + if (flags & TGSI_MEMBAR_SHARED) + waitcnt &= LGKM_CNT; - emit_waitcnt(ctx); + if (waitcnt != NOOP_WAITCNT) + emit_waitcnt(ctx, waitcnt); } static LLVMValueRef shader_buffer_fetch_rsrc(struct si_shader_context *ctx, const struct tgsi_full_src_register *reg) { - LLVMValueRef ind_index; - LLVMValueRef rsrc_ptr; + LLVMValueRef index; + LLVMValueRef rsrc_ptr = LLVMGetParam(ctx->main_fn, + SI_PARAM_SHADER_BUFFERS); if (!reg->Register.Indirect) - return ctx->shader_buffers[reg->Register.Index]; - - ind_index = get_bounded_indirect_index(ctx, ®->Indirect, - reg->Register.Index, - SI_NUM_SHADER_BUFFERS); + index = LLVMConstInt(ctx->i32, reg->Register.Index, 0); + else + index = get_bounded_indirect_index(ctx, ®->Indirect, + reg->Register.Index, + SI_NUM_SHADER_BUFFERS); - rsrc_ptr = LLVMGetParam(ctx->radeon_bld.main_fn, SI_PARAM_SHADER_BUFFERS); - return build_indexed_load_const(ctx, rsrc_ptr, ind_index); + return build_indexed_load_const(ctx, rsrc_ptr, index); } static bool tgsi_is_array_sampler(unsigned target) @@ -3325,7 +3465,7 @@ if (ctx->screen->b.chip_class <= CIK) { return rsrc; } else { - LLVMBuilderRef builder = ctx->radeon_bld.gallivm.builder; + LLVMBuilderRef builder = ctx->gallivm.builder; LLVMValueRef i32_6 = LLVMConstInt(ctx->i32, 6, 0); LLVMValueRef i32_C = LLVMConstInt(ctx->i32, C_008F28_COMPRESSION_EN, 0); LLVMValueRef tmp; @@ -3336,6 +3476,12 @@ } } +static LLVMTypeRef const_array(LLVMTypeRef elem_type, int num_elements) +{ + return LLVMPointerType(LLVMArrayType(elem_type, num_elements), + CONST_ADDR_SPACE); +} + /** * Load the resource descriptor for \p image. */ @@ -3343,22 +3489,26 @@ image_fetch_rsrc( struct lp_build_tgsi_context *bld_base, const struct tgsi_full_src_register *image, - bool dcc_off, + bool is_store, unsigned target, LLVMValueRef *rsrc) { struct si_shader_context *ctx = si_shader_context(bld_base); + LLVMValueRef rsrc_ptr = LLVMGetParam(ctx->main_fn, + SI_PARAM_IMAGES); + LLVMValueRef index, tmp; + bool dcc_off = target != TGSI_TEXTURE_BUFFER && is_store; assert(image->Register.File == TGSI_FILE_IMAGE); if (!image->Register.Indirect) { - /* Fast path: use preloaded resources */ - *rsrc = ctx->images[image->Register.Index]; - } else { - /* Indexing and manual load */ - LLVMValueRef ind_index; - LLVMValueRef rsrc_ptr; - LLVMValueRef tmp; + const struct tgsi_shader_info *info = bld_base->info; + + index = LLVMConstInt(ctx->i32, image->Register.Index, 0); + if (info->images_writemask & (1 << image->Register.Index) && + target != TGSI_TEXTURE_BUFFER) + dcc_off = true; + } else { /* From the GL_ARB_shader_image_load_store extension spec: * * If a shader performs an image load, store, or atomic @@ -3368,16 +3518,28 @@ * array, the results of the operation are undefined but may * not lead to termination. */ - ind_index = get_bounded_indirect_index(ctx, &image->Indirect, - image->Register.Index, - SI_NUM_IMAGES); - - rsrc_ptr = LLVMGetParam(ctx->radeon_bld.main_fn, SI_PARAM_IMAGES); - tmp = build_indexed_load_const(ctx, rsrc_ptr, ind_index); - if (dcc_off) - tmp = force_dcc_off(ctx, tmp); - *rsrc = tmp; + index = get_bounded_indirect_index(ctx, &image->Indirect, + image->Register.Index, + SI_NUM_IMAGES); + } + + if (target == TGSI_TEXTURE_BUFFER) { + LLVMBuilderRef builder = ctx->gallivm.builder; + + rsrc_ptr = LLVMBuildPointerCast(builder, rsrc_ptr, + const_array(ctx->v4i32, 0), ""); + index = LLVMBuildMul(builder, index, + LLVMConstInt(ctx->i32, 2, 0), ""); + index = LLVMBuildAdd(builder, index, + LLVMConstInt(ctx->i32, 1, 0), ""); + *rsrc = build_indexed_load_const(ctx, rsrc_ptr, index); + return; } + + tmp = build_indexed_load_const(ctx, rsrc_ptr, index); + if (dcc_off) + tmp = force_dcc_off(ctx, tmp); + *rsrc = tmp; } static LLVMValueRef image_fetch_coords( @@ -3418,40 +3580,36 @@ struct si_shader_context *ctx, struct lp_build_emit_data * emit_data, unsigned target, - bool atomic) + bool atomic, + bool force_glc) { const struct tgsi_full_instruction *inst = emit_data->inst; LLVMValueRef i1false = LLVMConstInt(ctx->i1, 0, 0); LLVMValueRef i1true = LLVMConstInt(ctx->i1, 1, 0); - - emit_data->args[emit_data->arg_count++] = i1false; /* r128 */ - emit_data->args[emit_data->arg_count++] = - tgsi_is_array_image(target) ? i1true : i1false; /* da */ - if (!atomic) { - emit_data->args[emit_data->arg_count++] = - inst->Memory.Qualifier & (TGSI_MEMORY_COHERENT | TGSI_MEMORY_VOLATILE) ? - i1true : i1false; /* glc */ + LLVMValueRef r128 = i1false; + LLVMValueRef da = tgsi_is_array_image(target) ? i1true : i1false; + LLVMValueRef glc = + force_glc || + inst->Memory.Qualifier & (TGSI_MEMORY_COHERENT | TGSI_MEMORY_VOLATILE) ? + i1true : i1false; + LLVMValueRef slc = i1false; + LLVMValueRef lwe = i1false; + + if (atomic || (HAVE_LLVM <= 0x0309)) { + emit_data->args[emit_data->arg_count++] = r128; + emit_data->args[emit_data->arg_count++] = da; + if (!atomic) { + emit_data->args[emit_data->arg_count++] = glc; + } + emit_data->args[emit_data->arg_count++] = slc; + return; } - emit_data->args[emit_data->arg_count++] = i1false; /* slc */ -} - -/** - * Given a 256 bit resource, extract the top half (which stores the buffer - * resource in the case of textures and images). - */ -static LLVMValueRef extract_rsrc_top_half( - struct si_shader_context *ctx, - LLVMValueRef rsrc) -{ - struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm; - struct lp_build_tgsi_context *bld_base = &ctx->radeon_bld.soa.bld_base; - LLVMTypeRef v2i128 = LLVMVectorType(ctx->i128, 2); - - rsrc = LLVMBuildBitCast(gallivm->builder, rsrc, v2i128, ""); - rsrc = LLVMBuildExtractElement(gallivm->builder, rsrc, bld_base->uint_bld.one, ""); - rsrc = LLVMBuildBitCast(gallivm->builder, rsrc, ctx->v4i32, ""); - return rsrc; + /* HAVE_LLVM >= 0x0400 */ + emit_data->args[emit_data->arg_count++] = glc; + emit_data->args[emit_data->arg_count++] = slc; + emit_data->args[emit_data->arg_count++] = lwe; + emit_data->args[emit_data->arg_count++] = da; } /** @@ -3467,7 +3625,8 @@ LLVMValueRef rsrc, LLVMValueRef index, LLVMValueRef offset, - bool atomic) + bool atomic, + bool force_glc) { const struct tgsi_full_instruction *inst = emit_data->inst; LLVMValueRef i1false = LLVMConstInt(ctx->i1, 0, 0); @@ -3478,6 +3637,7 @@ emit_data->args[emit_data->arg_count++] = offset; /* voffset */ if (!atomic) { emit_data->args[emit_data->arg_count++] = + force_glc || inst->Memory.Qualifier & (TGSI_MEMORY_COHERENT | TGSI_MEMORY_VOLATILE) ? i1true : i1false; /* glc */ } @@ -3507,24 +3667,23 @@ offset = LLVMBuildBitCast(builder, tmp, bld_base->uint_bld.elem_type, ""); buffer_append_args(ctx, emit_data, rsrc, bld_base->uint_bld.zero, - offset, false); + offset, false, false); } else if (inst->Src[0].Register.File == TGSI_FILE_IMAGE) { LLVMValueRef coords; - image_fetch_rsrc(bld_base, &inst->Src[0], false, &rsrc); + image_fetch_rsrc(bld_base, &inst->Src[0], false, target, &rsrc); coords = image_fetch_coords(bld_base, inst, 1); if (target == TGSI_TEXTURE_BUFFER) { - rsrc = extract_rsrc_top_half(ctx, rsrc); buffer_append_args(ctx, emit_data, rsrc, coords, - bld_base->uint_bld.zero, false); + bld_base->uint_bld.zero, false, false); } else { emit_data->args[0] = coords; emit_data->args[1] = rsrc; emit_data->args[2] = lp_build_const_int32(gallivm, 15); /* dmask */ emit_data->arg_count = 3; - image_append_args(ctx, emit_data, target, false); + image_append_args(ctx, emit_data, target, false, false); } } } @@ -3533,7 +3692,7 @@ struct lp_build_emit_data *emit_data) { const struct tgsi_full_instruction *inst = emit_data->inst; - struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm; + struct gallivm_state *gallivm = &ctx->gallivm; LLVMBuilderRef builder = gallivm->builder; uint writemask = inst->Dst[0].Register.WriteMask; uint count = util_last_bit(writemask); @@ -3558,19 +3717,19 @@ emit_data->output[emit_data->chan] = lp_build_intrinsic( builder, intrinsic_name, dst_type, emit_data->args, emit_data->arg_count, - LLVMReadOnlyAttribute | LLVMNoUnwindAttribute); + LP_FUNC_ATTR_READONLY); } static LLVMValueRef get_memory_ptr(struct si_shader_context *ctx, const struct tgsi_full_instruction *inst, LLVMTypeRef type, int arg) { - struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm; + struct gallivm_state *gallivm = &ctx->gallivm; LLVMBuilderRef builder = gallivm->builder; LLVMValueRef offset, ptr; int addr_space; - offset = lp_build_emit_fetch(&ctx->radeon_bld.soa.bld_base, inst, arg, 0); + offset = lp_build_emit_fetch(&ctx->bld_base, inst, arg, 0); offset = LLVMBuildBitCast(builder, offset, ctx->i32, ""); ptr = ctx->shared_memory; @@ -3586,8 +3745,8 @@ struct lp_build_emit_data *emit_data) { const struct tgsi_full_instruction *inst = emit_data->inst; - struct lp_build_context *base = &ctx->radeon_bld.soa.bld_base.base; - struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm; + struct lp_build_context *base = &ctx->bld_base.base; + struct gallivm_state *gallivm = &ctx->gallivm; LLVMBuilderRef builder = gallivm->builder; unsigned writemask = inst->Dst[0].Register.WriteMask; LLVMValueRef channels[4], ptr, derived_ptr, index; @@ -3608,6 +3767,32 @@ emit_data->output[emit_data->chan] = lp_build_gather_values(gallivm, channels, 4); } +static void get_image_intr_name(const char *base_name, + LLVMTypeRef data_type, + LLVMTypeRef coords_type, + LLVMTypeRef rsrc_type, + char *out_name, unsigned out_len) +{ + char coords_type_name[8]; + + build_type_name_for_intr(coords_type, coords_type_name, + sizeof(coords_type_name)); + + if (HAVE_LLVM <= 0x0309) { + snprintf(out_name, out_len, "%s.%s", base_name, coords_type_name); + } else { + char data_type_name[8]; + char rsrc_type_name[8]; + + build_type_name_for_intr(data_type, data_type_name, + sizeof(data_type_name)); + build_type_name_for_intr(rsrc_type, rsrc_type_name, + sizeof(rsrc_type_name)); + snprintf(out_name, out_len, "%s.%s.%s.%s", base_name, + data_type_name, coords_type_name, rsrc_type_name); + } +} + static void load_emit( const struct lp_build_tgsi_action *action, struct lp_build_tgsi_context *bld_base, @@ -3617,8 +3802,7 @@ struct gallivm_state *gallivm = bld_base->base.gallivm; LLVMBuilderRef builder = gallivm->builder; const struct tgsi_full_instruction * inst = emit_data->inst; - char intrinsic_name[32]; - char coords_type[8]; + char intrinsic_name[64]; if (inst->Src[0].Register.File == TGSI_FILE_MEMORY) { load_emit_memory(ctx, emit_data); @@ -3626,7 +3810,7 @@ } if (inst->Memory.Qualifier & TGSI_MEMORY_VOLATILE) - emit_waitcnt(ctx); + emit_waitcnt(ctx, VM_CNT); if (inst->Src[0].Register.File == TGSI_FILE_BUFFER) { load_emit_buffer(ctx, emit_data); @@ -3638,19 +3822,19 @@ lp_build_intrinsic( builder, "llvm.amdgcn.buffer.load.format.v4f32", emit_data->dst_type, emit_data->args, emit_data->arg_count, - LLVMReadOnlyAttribute | LLVMNoUnwindAttribute); + LP_FUNC_ATTR_READONLY); } else { - build_int_type_name(LLVMTypeOf(emit_data->args[0]), - coords_type, sizeof(coords_type)); - - snprintf(intrinsic_name, sizeof(intrinsic_name), - "llvm.amdgcn.image.load.%s", coords_type); + get_image_intr_name("llvm.amdgcn.image.load", + emit_data->dst_type, /* vdata */ + LLVMTypeOf(emit_data->args[0]), /* coords */ + LLVMTypeOf(emit_data->args[1]), /* rsrc */ + intrinsic_name, sizeof(intrinsic_name)); emit_data->output[emit_data->chan] = lp_build_intrinsic( builder, intrinsic_name, emit_data->dst_type, emit_data->args, emit_data->arg_count, - LLVMReadOnlyAttribute | LLVMNoUnwindAttribute); + LP_FUNC_ATTR_READONLY); } } @@ -3689,26 +3873,33 @@ offset = LLVMBuildBitCast(builder, tmp, bld_base->uint_bld.elem_type, ""); buffer_append_args(ctx, emit_data, rsrc, bld_base->uint_bld.zero, - offset, false); + offset, false, false); } else if (inst->Dst[0].Register.File == TGSI_FILE_IMAGE) { unsigned target = inst->Memory.Texture; LLVMValueRef coords; + /* 8bit/16bit TC L1 write corruption bug on SI. + * All store opcodes not aligned to a dword are affected. + * + * The only way to get unaligned stores in radeonsi is through + * shader images. + */ + bool force_glc = ctx->screen->b.chip_class == SI; + coords = image_fetch_coords(bld_base, inst, 0); if (target == TGSI_TEXTURE_BUFFER) { - image_fetch_rsrc(bld_base, &memory, false, &rsrc); - - rsrc = extract_rsrc_top_half(ctx, rsrc); + image_fetch_rsrc(bld_base, &memory, true, target, &rsrc); buffer_append_args(ctx, emit_data, rsrc, coords, - bld_base->uint_bld.zero, false); + bld_base->uint_bld.zero, false, force_glc); } else { emit_data->args[1] = coords; - image_fetch_rsrc(bld_base, &memory, true, &emit_data->args[2]); + image_fetch_rsrc(bld_base, &memory, true, target, + &emit_data->args[2]); emit_data->args[3] = lp_build_const_int32(gallivm, 15); /* dmask */ emit_data->arg_count = 4; - image_append_args(ctx, emit_data, target, false); + image_append_args(ctx, emit_data, target, false, force_glc); } } } @@ -3718,9 +3909,9 @@ struct lp_build_emit_data *emit_data) { const struct tgsi_full_instruction *inst = emit_data->inst; - struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm; + struct gallivm_state *gallivm = &ctx->gallivm; LLVMBuilderRef builder = gallivm->builder; - struct lp_build_context *uint_bld = &ctx->radeon_bld.soa.bld_base.uint_bld; + struct lp_build_context *uint_bld = &ctx->bld_base.uint_bld; LLVMValueRef base_data = emit_data->args[0]; LLVMValueRef base_offset = emit_data->args[3]; unsigned writemask = inst->Dst[0].Register.WriteMask; @@ -3781,8 +3972,7 @@ lp_build_intrinsic( builder, intrinsic_name, emit_data->dst_type, - emit_data->args, emit_data->arg_count, - LLVMNoUnwindAttribute); + emit_data->args, emit_data->arg_count, 0); } } @@ -3791,8 +3981,8 @@ struct lp_build_emit_data *emit_data) { const struct tgsi_full_instruction *inst = emit_data->inst; - struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm; - struct lp_build_context *base = &ctx->radeon_bld.soa.bld_base.base; + struct gallivm_state *gallivm = &ctx->gallivm; + struct lp_build_context *base = &ctx->bld_base.base; LLVMBuilderRef builder = gallivm->builder; unsigned writemask = inst->Dst[0].Register.WriteMask; LLVMValueRef ptr, derived_ptr, data, index; @@ -3804,7 +3994,7 @@ if (!(writemask & (1 << chan))) { continue; } - data = lp_build_emit_fetch(&ctx->radeon_bld.soa.bld_base, inst, 1, chan); + data = lp_build_emit_fetch(&ctx->bld_base, inst, 1, chan); index = lp_build_const_int32(gallivm, chan); derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, ""); LLVMBuildStore(builder, data, derived_ptr); @@ -3821,8 +4011,7 @@ LLVMBuilderRef builder = gallivm->builder; const struct tgsi_full_instruction * inst = emit_data->inst; unsigned target = inst->Memory.Texture; - char intrinsic_name[32]; - char coords_type[8]; + char intrinsic_name[64]; if (inst->Dst[0].Register.File == TGSI_FILE_MEMORY) { store_emit_memory(ctx, emit_data); @@ -3830,7 +4019,7 @@ } if (inst->Memory.Qualifier & TGSI_MEMORY_VOLATILE) - emit_waitcnt(ctx); + emit_waitcnt(ctx, VM_CNT); if (inst->Dst[0].Register.File == TGSI_FILE_BUFFER) { store_emit_buffer(ctx, emit_data); @@ -3840,19 +4029,19 @@ if (target == TGSI_TEXTURE_BUFFER) { emit_data->output[emit_data->chan] = lp_build_intrinsic( builder, "llvm.amdgcn.buffer.store.format.v4f32", - emit_data->dst_type, emit_data->args, emit_data->arg_count, - LLVMNoUnwindAttribute); + emit_data->dst_type, emit_data->args, + emit_data->arg_count, 0); } else { - build_int_type_name(LLVMTypeOf(emit_data->args[1]), - coords_type, sizeof(coords_type)); - snprintf(intrinsic_name, sizeof(intrinsic_name), - "llvm.amdgcn.image.store.%s", coords_type); + get_image_intr_name("llvm.amdgcn.image.store", + LLVMTypeOf(emit_data->args[0]), /* vdata */ + LLVMTypeOf(emit_data->args[1]), /* coords */ + LLVMTypeOf(emit_data->args[2]), /* rsrc */ + intrinsic_name, sizeof(intrinsic_name)); emit_data->output[emit_data->chan] = lp_build_intrinsic( builder, intrinsic_name, emit_data->dst_type, - emit_data->args, emit_data->arg_count, - LLVMNoUnwindAttribute); + emit_data->args, emit_data->arg_count, 0); } } @@ -3894,43 +4083,41 @@ offset = LLVMBuildBitCast(builder, tmp, bld_base->uint_bld.elem_type, ""); buffer_append_args(ctx, emit_data, rsrc, bld_base->uint_bld.zero, - offset, true); + offset, true, false); } else if (inst->Src[0].Register.File == TGSI_FILE_IMAGE) { unsigned target = inst->Memory.Texture; LLVMValueRef coords; - image_fetch_rsrc(bld_base, &inst->Src[0], - target != TGSI_TEXTURE_BUFFER, &rsrc); + image_fetch_rsrc(bld_base, &inst->Src[0], true, target, &rsrc); coords = image_fetch_coords(bld_base, inst, 1); if (target == TGSI_TEXTURE_BUFFER) { - rsrc = extract_rsrc_top_half(ctx, rsrc); buffer_append_args(ctx, emit_data, rsrc, coords, - bld_base->uint_bld.zero, true); + bld_base->uint_bld.zero, true, false); } else { emit_data->args[emit_data->arg_count++] = coords; emit_data->args[emit_data->arg_count++] = rsrc; - image_append_args(ctx, emit_data, target, true); + image_append_args(ctx, emit_data, target, true, false); } } } static void atomic_emit_memory(struct si_shader_context *ctx, struct lp_build_emit_data *emit_data) { - struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm; + struct gallivm_state *gallivm = &ctx->gallivm; LLVMBuilderRef builder = gallivm->builder; const struct tgsi_full_instruction * inst = emit_data->inst; LLVMValueRef ptr, result, arg; ptr = get_memory_ptr(ctx, inst, ctx->i32, 1); - arg = lp_build_emit_fetch(&ctx->radeon_bld.soa.bld_base, inst, 2, 0); + arg = lp_build_emit_fetch(&ctx->bld_base, inst, 2, 0); arg = LLVMBuildBitCast(builder, arg, ctx->i32, ""); if (inst->Instruction.Opcode == TGSI_OPCODE_ATOMCAS) { LLVMValueRef new_data; - new_data = lp_build_emit_fetch(&ctx->radeon_bld.soa.bld_base, + new_data = lp_build_emit_fetch(&ctx->bld_base, inst, 3, 0); new_data = LLVMBuildBitCast(builder, new_data, ctx->i32, ""); @@ -4007,10 +4194,15 @@ snprintf(intrinsic_name, sizeof(intrinsic_name), "llvm.amdgcn.buffer.atomic.%s", action->intr_name); } else { + LLVMValueRef coords; char coords_type[8]; - build_int_type_name(LLVMTypeOf(emit_data->args[1]), - coords_type, sizeof(coords_type)); + if (inst->Instruction.Opcode == TGSI_OPCODE_ATOMCAS) + coords = emit_data->args[2]; + else + coords = emit_data->args[1]; + + build_type_name_for_intr(LLVMTypeOf(coords), coords_type, sizeof(coords_type)); snprintf(intrinsic_name, sizeof(intrinsic_name), "llvm.amdgcn.image.atomic.%s.%s", action->intr_name, coords_type); @@ -4018,8 +4210,7 @@ tmp = lp_build_intrinsic( builder, intrinsic_name, bld_base->uint_bld.elem_type, - emit_data->args, emit_data->arg_count, - LLVMNoUnwindAttribute); + emit_data->args, emit_data->arg_count, 0); emit_data->output[emit_data->chan] = LLVMBuildBitCast(builder, tmp, bld_base->base.elem_type, ""); } @@ -4039,11 +4230,13 @@ emit_data->args[0] = shader_buffer_fetch_rsrc(ctx, reg); emit_data->arg_count = 1; } else if (inst->Memory.Texture == TGSI_TEXTURE_BUFFER) { - image_fetch_rsrc(bld_base, reg, false, &emit_data->args[0]); + image_fetch_rsrc(bld_base, reg, false, inst->Memory.Texture, + &emit_data->args[0]); emit_data->arg_count = 1; } else { emit_data->args[0] = bld_base->uint_bld.zero; /* mip level */ - image_fetch_rsrc(bld_base, reg, false, &emit_data->args[1]); + image_fetch_rsrc(bld_base, reg, false, inst->Memory.Texture, + &emit_data->args[1]); emit_data->args[2] = lp_build_const_int32(gallivm, 15); /* dmask */ emit_data->args[3] = bld_base->uint_bld.zero; /* unorm */ emit_data->args[4] = bld_base->uint_bld.zero; /* r128 */ @@ -4076,7 +4269,7 @@ out = lp_build_intrinsic( builder, "llvm.SI.getresinfo.i32", emit_data->dst_type, emit_data->args, emit_data->arg_count, - LLVMReadNoneAttribute | LLVMNoUnwindAttribute); + LP_FUNC_ATTR_READNONE); /* Divide the number of layers by 6 to get the number of cubes. */ if (inst->Memory.Texture == TGSI_TEXTURE_CUBE_ARRAY) { @@ -4099,7 +4292,7 @@ LLVMValueRef *param, unsigned count, unsigned dmask) { - struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm; + struct gallivm_state *gallivm = &ctx->gallivm; unsigned num_args; unsigned is_rect = target == TGSI_TEXTURE_RECT; @@ -4142,24 +4335,19 @@ enum desc_type { DESC_IMAGE, + DESC_BUFFER, DESC_FMASK, - DESC_SAMPLER + DESC_SAMPLER, }; -static LLVMTypeRef const_array(LLVMTypeRef elem_type, int num_elements) -{ - return LLVMPointerType(LLVMArrayType(elem_type, num_elements), - CONST_ADDR_SPACE); -} - /** * Load an image view, fmask view. or sampler state descriptor. */ -static LLVMValueRef get_sampler_desc_custom(struct si_shader_context *ctx, - LLVMValueRef list, LLVMValueRef index, - enum desc_type type) +static LLVMValueRef load_sampler_desc_custom(struct si_shader_context *ctx, + LLVMValueRef list, LLVMValueRef index, + enum desc_type type) { - struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm; + struct gallivm_state *gallivm = &ctx->gallivm; LLVMBuilderRef builder = gallivm->builder; switch (type) { @@ -4167,6 +4355,13 @@ /* The image is at [0:7]. */ index = LLVMBuildMul(builder, index, LLVMConstInt(ctx->i32, 2, 0), ""); break; + case DESC_BUFFER: + /* The buffer is in [4:7]. */ + index = LLVMBuildMul(builder, index, LLVMConstInt(ctx->i32, 4, 0), ""); + index = LLVMBuildAdd(builder, index, LLVMConstInt(ctx->i32, 1, 0), ""); + list = LLVMBuildPointerCast(builder, list, + const_array(ctx->v4i32, 0), ""); + break; case DESC_FMASK: /* The FMASK is at [8:15]. */ index = LLVMBuildMul(builder, index, LLVMConstInt(ctx->i32, 2, 0), ""); @@ -4184,13 +4379,13 @@ return build_indexed_load_const(ctx, list, index); } -static LLVMValueRef get_sampler_desc(struct si_shader_context *ctx, +static LLVMValueRef load_sampler_desc(struct si_shader_context *ctx, LLVMValueRef index, enum desc_type type) { - LLVMValueRef list = LLVMGetParam(ctx->radeon_bld.main_fn, + LLVMValueRef list = LLVMGetParam(ctx->main_fn, SI_PARAM_SAMPLERS); - return get_sampler_desc_custom(ctx, list, index, type); + return load_sampler_desc_custom(ctx, list, index, type); } /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL. @@ -4207,7 +4402,7 @@ static LLVMValueRef sici_fix_sampler_aniso(struct si_shader_context *ctx, LLVMValueRef res, LLVMValueRef samp) { - LLVMBuilderRef builder = ctx->radeon_bld.gallivm.builder; + LLVMBuilderRef builder = ctx->gallivm.builder; LLVMValueRef img7, samp0; if (ctx->screen->b.chip_class >= VI) @@ -4232,41 +4427,41 @@ unsigned target = inst->Texture.Texture; unsigned sampler_src; unsigned sampler_index; + LLVMValueRef index; sampler_src = emit_data->inst->Instruction.NumSrcRegs - 1; sampler_index = emit_data->inst->Src[sampler_src].Register.Index; if (emit_data->inst->Src[sampler_src].Register.Indirect) { const struct tgsi_full_src_register *reg = &emit_data->inst->Src[sampler_src]; - LLVMValueRef ind_index; - ind_index = get_bounded_indirect_index(ctx, - ®->Indirect, - reg->Register.Index, - SI_NUM_SAMPLERS); - - *res_ptr = get_sampler_desc(ctx, ind_index, DESC_IMAGE); - - if (target == TGSI_TEXTURE_2D_MSAA || - target == TGSI_TEXTURE_2D_ARRAY_MSAA) { - if (samp_ptr) - *samp_ptr = NULL; - if (fmask_ptr) - *fmask_ptr = get_sampler_desc(ctx, ind_index, DESC_FMASK); - } else { - if (samp_ptr) { - *samp_ptr = get_sampler_desc(ctx, ind_index, DESC_SAMPLER); - *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr); - } - if (fmask_ptr) - *fmask_ptr = NULL; - } + index = get_bounded_indirect_index(ctx, + ®->Indirect, + reg->Register.Index, + SI_NUM_SAMPLERS); } else { - *res_ptr = ctx->sampler_views[sampler_index]; - if (samp_ptr) - *samp_ptr = ctx->sampler_states[sampler_index]; + index = LLVMConstInt(ctx->i32, sampler_index, 0); + } + + if (target == TGSI_TEXTURE_BUFFER) + *res_ptr = load_sampler_desc(ctx, index, DESC_BUFFER); + else + *res_ptr = load_sampler_desc(ctx, index, DESC_IMAGE); + + if (samp_ptr) + *samp_ptr = NULL; + if (fmask_ptr) + *fmask_ptr = NULL; + + if (target == TGSI_TEXTURE_2D_MSAA || + target == TGSI_TEXTURE_2D_ARRAY_MSAA) { if (fmask_ptr) - *fmask_ptr = ctx->fmasks[sampler_index]; + *fmask_ptr = load_sampler_desc(ctx, index, DESC_FMASK); + } else if (target != TGSI_TEXTURE_BUFFER) { + if (samp_ptr) { + *samp_ptr = load_sampler_desc(ctx, index, DESC_SAMPLER); + *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr); + } } } @@ -4275,8 +4470,6 @@ struct lp_build_emit_data *emit_data) { struct si_shader_context *ctx = si_shader_context(bld_base); - struct gallivm_state *gallivm = bld_base->base.gallivm; - LLVMBuilderRef builder = gallivm->builder; const struct tgsi_full_instruction *inst = emit_data->inst; unsigned target = inst->Texture.Texture; LLVMValueRef res_ptr; @@ -4286,8 +4479,7 @@ if (target == TGSI_TEXTURE_BUFFER) { /* Read the size from the buffer descriptor directly. */ - LLVMValueRef res = LLVMBuildBitCast(builder, res_ptr, ctx->v8i32, ""); - emit_data->args[0] = get_buffer_size(bld_base, res); + emit_data->args[0] = get_buffer_size(bld_base, res_ptr); return; } @@ -4314,7 +4506,7 @@ emit_data->output[emit_data->chan] = lp_build_intrinsic( base->gallivm->builder, "llvm.SI.getresinfo.i32", emit_data->dst_type, emit_data->args, emit_data->arg_count, - LLVMReadNoneAttribute | LLVMNoUnwindAttribute); + LP_FUNC_ATTR_READNONE); /* Divide the number of layers by 6 to get the number of cubes. */ if (target == TGSI_TEXTURE_CUBE_ARRAY || @@ -4355,16 +4547,9 @@ tex_fetch_ptrs(bld_base, emit_data, &res_ptr, &samp_ptr, &fmask_ptr); if (target == TGSI_TEXTURE_BUFFER) { - LLVMTypeRef v2i128 = LLVMVectorType(ctx->i128, 2); - - /* Bitcast and truncate v8i32 to v16i8. */ - LLVMValueRef res = res_ptr; - res = LLVMBuildBitCast(gallivm->builder, res, v2i128, ""); - res = LLVMBuildExtractElement(gallivm->builder, res, bld_base->uint_bld.one, ""); - res = LLVMBuildBitCast(gallivm->builder, res, ctx->v16i8, ""); - emit_data->dst_type = ctx->v4f32; - emit_data->args[0] = res; + emit_data->args[0] = LLVMBuildBitCast(gallivm->builder, res_ptr, + ctx->v16i8, ""); emit_data->args[1] = bld_base->uint_bld.zero; emit_data->args[2] = lp_build_emit_fetch(bld_base, emit_data->inst, 0, TGSI_CHAN_X); emit_data->arg_count = 3; @@ -4419,12 +4604,26 @@ /* Pack depth comparison value */ if (tgsi_is_shadow_target(target) && opcode != TGSI_OPCODE_LODQ) { + LLVMValueRef z; + if (target == TGSI_TEXTURE_SHADOWCUBE_ARRAY) { - address[count++] = lp_build_emit_fetch(bld_base, inst, 1, TGSI_CHAN_X); + z = lp_build_emit_fetch(bld_base, inst, 1, TGSI_CHAN_X); } else { assert(ref_pos >= 0); - address[count++] = coords[ref_pos]; + z = coords[ref_pos]; } + + /* TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT, + * so the depth comparison value isn't clamped for Z16 and + * Z24 anymore. Do it manually here. + * + * It's unnecessary if the original texture format was + * Z32_FLOAT, but we don't know that here. + */ + if (ctx->screen->b.chip_class == VI) + z = si_llvm_saturate(bld_base, z); + + address[count++] = z; } /* Pack user derivatives */ @@ -4474,7 +4673,11 @@ target == TGSI_TEXTURE_CUBE_ARRAY || target == TGSI_TEXTURE_SHADOWCUBE || target == TGSI_TEXTURE_SHADOWCUBE_ARRAY) - radeon_llvm_emit_prepare_cube_coords(bld_base, emit_data, coords, derivs); + ac_prepare_cube_coords(&ctx->ac, + opcode == TGSI_OPCODE_TXD, + target == TGSI_TEXTURE_CUBE_ARRAY || + target == TGSI_TEXTURE_SHADOWCUBE_ARRAY, + coords, derivs); if (opcode == TGSI_OPCODE_TXD) for (int i = 0; i < num_deriv_channels * 2; i++) @@ -4588,7 +4791,6 @@ /* add tex offsets */ if (inst->Texture.NumOffsets) { struct lp_build_context *uint_bld = &bld_base->uint_bld; - struct lp_build_tgsi_soa_context *bld = lp_soa_context(bld_base); const struct tgsi_texture_offset *off = inst->TexOffsets; assert(inst->Texture.NumOffsets == 1); @@ -4596,7 +4798,7 @@ switch (target) { case TGSI_TEXTURE_3D: address[2] = lp_build_add(uint_bld, address[2], - bld->immediates[off->Index][off->SwizzleZ]); + ctx->imms[off->Index * TGSI_NUM_CHANNELS + off->SwizzleZ]); /* fall through */ case TGSI_TEXTURE_2D: case TGSI_TEXTURE_SHADOW2D: @@ -4606,7 +4808,7 @@ case TGSI_TEXTURE_SHADOW2D_ARRAY: address[1] = lp_build_add(uint_bld, address[1], - bld->immediates[off->Index][off->SwizzleY]); + ctx->imms[off->Index * TGSI_NUM_CHANNELS + off->SwizzleY]); /* fall through */ case TGSI_TEXTURE_1D: case TGSI_TEXTURE_SHADOW1D: @@ -4614,7 +4816,7 @@ case TGSI_TEXTURE_SHADOW1D_ARRAY: address[0] = lp_build_add(uint_bld, address[0], - bld->immediates[off->Index][off->SwizzleX]); + ctx->imms[off->Index * TGSI_NUM_CHANNELS + off->SwizzleX]); break; /* texture offsets do not apply to other texture targets */ } @@ -4634,13 +4836,12 @@ /* Get the component index from src1.x for Gather4. */ if (!tgsi_is_shadow_target(target)) { - LLVMValueRef (*imms)[4] = lp_soa_context(bld_base)->immediates; LLVMValueRef comp_imm; struct tgsi_src_register src1 = inst->Src[1].Register; assert(src1.File == TGSI_FILE_IMMEDIATE); - comp_imm = imms[src1.Index][src1.SwizzleX]; + comp_imm = ctx->imms[src1.Index * TGSI_NUM_CHANNELS + src1.SwizzleX]; gather_comp = LLVMConstIntGetZExtValue(comp_imm); gather_comp = CLAMP(gather_comp, 0, 3); } @@ -4652,16 +4853,86 @@ samp_ptr, address, count, dmask); } +/* Gather4 should follow the same rules as bilinear filtering, but the hardware + * incorrectly forces nearest filtering if the texture format is integer. + * The only effect it has on Gather4, which always returns 4 texels for + * bilinear filtering, is that the final coordinates are off by 0.5 of + * the texel size. + * + * The workaround is to subtract 0.5 from the unnormalized coordinates, + * or (0.5 / size) from the normalized coordinates. + */ +static void si_lower_gather4_integer(struct si_shader_context *ctx, + struct lp_build_emit_data *emit_data, + const char *intr_name, + unsigned coord_vgpr_index) +{ + LLVMBuilderRef builder = ctx->gallivm.builder; + LLVMValueRef coord = emit_data->args[0]; + LLVMValueRef half_texel[2]; + int c; + + if (emit_data->inst->Texture.Texture == TGSI_TEXTURE_RECT || + emit_data->inst->Texture.Texture == TGSI_TEXTURE_SHADOWRECT) { + half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5); + } else { + struct tgsi_full_instruction txq_inst = {}; + struct lp_build_emit_data txq_emit_data = {}; + + /* Query the texture size. */ + txq_inst.Texture.Texture = emit_data->inst->Texture.Texture; + txq_emit_data.inst = &txq_inst; + txq_emit_data.dst_type = ctx->v4i32; + set_tex_fetch_args(ctx, &txq_emit_data, TGSI_OPCODE_TXQ, + txq_inst.Texture.Texture, + emit_data->args[1], NULL, + &ctx->bld_base.uint_bld.zero, + 1, 0xf); + txq_emit(NULL, &ctx->bld_base, &txq_emit_data); + + /* Compute -0.5 / size. */ + for (c = 0; c < 2; c++) { + half_texel[c] = + LLVMBuildExtractElement(builder, txq_emit_data.output[0], + LLVMConstInt(ctx->i32, c, 0), ""); + half_texel[c] = LLVMBuildUIToFP(builder, half_texel[c], ctx->f32, ""); + half_texel[c] = + lp_build_emit_llvm_unary(&ctx->bld_base, + TGSI_OPCODE_RCP, half_texel[c]); + half_texel[c] = LLVMBuildFMul(builder, half_texel[c], + LLVMConstReal(ctx->f32, -0.5), ""); + } + } + + for (c = 0; c < 2; c++) { + LLVMValueRef tmp; + LLVMValueRef index = LLVMConstInt(ctx->i32, coord_vgpr_index + c, 0); + + tmp = LLVMBuildExtractElement(builder, coord, index, ""); + tmp = LLVMBuildBitCast(builder, tmp, ctx->f32, ""); + tmp = LLVMBuildFAdd(builder, tmp, half_texel[c], ""); + tmp = LLVMBuildBitCast(builder, tmp, ctx->i32, ""); + coord = LLVMBuildInsertElement(builder, coord, tmp, index, ""); + } + + emit_data->args[0] = coord; + emit_data->output[emit_data->chan] = + lp_build_intrinsic(builder, intr_name, emit_data->dst_type, + emit_data->args, emit_data->arg_count, + LP_FUNC_ATTR_READNONE); +} + static void build_tex_intrinsic(const struct lp_build_tgsi_action *action, struct lp_build_tgsi_context *bld_base, struct lp_build_emit_data *emit_data) { struct si_shader_context *ctx = si_shader_context(bld_base); struct lp_build_context *base = &bld_base->base; - unsigned opcode = emit_data->inst->Instruction.Opcode; - unsigned target = emit_data->inst->Texture.Texture; + const struct tgsi_full_instruction *inst = emit_data->inst; + unsigned opcode = inst->Instruction.Opcode; + unsigned target = inst->Texture.Texture; char intr_name[127]; - bool has_offset = emit_data->inst->Texture.NumOffsets > 0; + bool has_offset = inst->Texture.NumOffsets > 0; bool is_shadow = tgsi_is_shadow_target(target); char type[64]; const char *name = "llvm.SI.image.sample"; @@ -4672,7 +4943,7 @@ base->gallivm->builder, "llvm.SI.vs.load.input", emit_data->dst_type, emit_data->args, emit_data->arg_count, - LLVMReadNoneAttribute | LLVMNoUnwindAttribute); + LP_FUNC_ATTR_READNONE); return; } @@ -4718,15 +4989,38 @@ } /* Add the type and suffixes .c, .o if needed. */ - build_int_type_name(LLVMTypeOf(emit_data->args[0]), type, sizeof(type)); + build_type_name_for_intr(LLVMTypeOf(emit_data->args[0]), type, sizeof(type)); sprintf(intr_name, "%s%s%s%s.%s", name, is_shadow ? ".c" : "", infix, has_offset ? ".o" : "", type); + /* The hardware needs special lowering for Gather4 with integer formats. */ + if (opcode == TGSI_OPCODE_TG4) { + struct tgsi_shader_info *info = &ctx->shader->selector->info; + /* This will also work with non-constant indexing because of how + * glsl_to_tgsi works and we intent to preserve that behavior. + */ + const unsigned src_idx = 2; + unsigned sampler = inst->Src[src_idx].Register.Index; + + assert(inst->Src[src_idx].Register.File == TGSI_FILE_SAMPLER); + + if (info->sampler_type[sampler] == TGSI_RETURN_TYPE_SINT || + info->sampler_type[sampler] == TGSI_RETURN_TYPE_UINT) { + /* Texture coordinates start after: + * {offset, bias, z-compare, derivatives} + * Only the offset and z-compare can occur here. + */ + si_lower_gather4_integer(ctx, emit_data, intr_name, + (int)has_offset + (int)is_shadow); + return; + } + } + emit_data->output[emit_data->chan] = lp_build_intrinsic( base->gallivm->builder, intr_name, emit_data->dst_type, emit_data->args, emit_data->arg_count, - LLVMReadNoneAttribute | LLVMNoUnwindAttribute); + LP_FUNC_ATTR_READNONE); } static void si_llvm_emit_txqs( @@ -4794,21 +5088,12 @@ { struct si_shader_context *ctx = si_shader_context(bld_base); struct gallivm_state *gallivm = bld_base->base.gallivm; - const struct tgsi_full_instruction *inst = emit_data->inst; - unsigned opcode = inst->Instruction.Opcode; - LLVMValueRef indices[2]; - LLVMValueRef store_ptr, load_ptr0, load_ptr1; - LLVMValueRef tl, trbl, result[4]; - LLVMValueRef tl_tid, trbl_tid; - unsigned swizzle[4]; - unsigned c; + unsigned opcode = emit_data->info->opcode; + LLVMValueRef thread_id, tl, trbl, tl_tid, trbl_tid, val, args[2]; int idx; unsigned mask; - indices[0] = bld_base->uint_bld.zero; - indices[1] = get_thread_id(ctx); - store_ptr = LLVMBuildGEP(gallivm->builder, ctx->lds, - indices, 2, ""); + thread_id = get_thread_id(ctx); if (opcode == TGSI_OPCODE_DDX_FINE) mask = TID_MASK_LEFT; @@ -4817,64 +5102,46 @@ else mask = TID_MASK_TOP_LEFT; - tl_tid = LLVMBuildAnd(gallivm->builder, indices[1], + tl_tid = LLVMBuildAnd(gallivm->builder, thread_id, lp_build_const_int32(gallivm, mask), ""); - indices[1] = tl_tid; - load_ptr0 = LLVMBuildGEP(gallivm->builder, ctx->lds, - indices, 2, ""); /* for DDX we want to next X pixel, DDY next Y pixel. */ idx = (opcode == TGSI_OPCODE_DDX || opcode == TGSI_OPCODE_DDX_FINE) ? 1 : 2; - trbl_tid = LLVMBuildAdd(gallivm->builder, indices[1], + trbl_tid = LLVMBuildAdd(gallivm->builder, tl_tid, lp_build_const_int32(gallivm, idx), ""); - indices[1] = trbl_tid; - load_ptr1 = LLVMBuildGEP(gallivm->builder, ctx->lds, - indices, 2, ""); - - for (c = 0; c < 4; ++c) { - unsigned i; - LLVMValueRef val; - LLVMValueRef args[2]; - swizzle[c] = tgsi_util_get_full_src_register_swizzle(&inst->Src[0], c); - for (i = 0; i < c; ++i) { - if (swizzle[i] == swizzle[c]) { - result[c] = result[i]; - break; - } - } - if (i != c) - continue; + val = LLVMBuildBitCast(gallivm->builder, emit_data->args[0], ctx->i32, ""); - val = LLVMBuildBitCast(gallivm->builder, - lp_build_emit_fetch(bld_base, inst, 0, c), - ctx->i32, ""); + if (ctx->screen->has_ds_bpermute) { + args[0] = LLVMBuildMul(gallivm->builder, tl_tid, + lp_build_const_int32(gallivm, 4), ""); + args[1] = val; + tl = lp_build_intrinsic(gallivm->builder, + "llvm.amdgcn.ds.bpermute", ctx->i32, + args, 2, LP_FUNC_ATTR_READNONE); - if ((HAVE_LLVM >= 0x0309) && ctx->screen->b.family >= CHIP_TONGA) { + args[0] = LLVMBuildMul(gallivm->builder, trbl_tid, + lp_build_const_int32(gallivm, 4), ""); + trbl = lp_build_intrinsic(gallivm->builder, + "llvm.amdgcn.ds.bpermute", ctx->i32, + args, 2, LP_FUNC_ATTR_READNONE); + } else { + LLVMValueRef store_ptr, load_ptr0, load_ptr1; - args[0] = LLVMBuildMul(gallivm->builder, tl_tid, - lp_build_const_int32(gallivm, 4), ""); - args[1] = val; - tl = lp_build_intrinsic(gallivm->builder, - "llvm.amdgcn.ds.bpermute", ctx->i32, - args, 2, LLVMReadNoneAttribute); + store_ptr = build_gep0(ctx, ctx->lds, thread_id); + load_ptr0 = build_gep0(ctx, ctx->lds, tl_tid); + load_ptr1 = build_gep0(ctx, ctx->lds, trbl_tid); - args[0] = LLVMBuildMul(gallivm->builder, trbl_tid, - lp_build_const_int32(gallivm, 4), ""); - trbl = lp_build_intrinsic(gallivm->builder, - "llvm.amdgcn.ds.bpermute", ctx->i32, - args, 2, LLVMReadNoneAttribute); - } else { - LLVMBuildStore(gallivm->builder, val, store_ptr); - tl = LLVMBuildLoad(gallivm->builder, load_ptr0, ""); - trbl = LLVMBuildLoad(gallivm->builder, load_ptr1, ""); - } - tl = LLVMBuildBitCast(gallivm->builder, tl, ctx->f32, ""); - trbl = LLVMBuildBitCast(gallivm->builder, trbl, ctx->f32, ""); - result[c] = LLVMBuildFSub(gallivm->builder, trbl, tl, ""); + LLVMBuildStore(gallivm->builder, val, store_ptr); + tl = LLVMBuildLoad(gallivm->builder, load_ptr0, ""); + trbl = LLVMBuildLoad(gallivm->builder, load_ptr1, ""); } - emit_data->output[0] = lp_build_gather_values(gallivm, result, 4); + tl = LLVMBuildBitCast(gallivm->builder, tl, ctx->f32, ""); + trbl = LLVMBuildBitCast(gallivm->builder, trbl, ctx->f32, ""); + + emit_data->output[emit_data->chan] = + LLVMBuildFSub(gallivm->builder, trbl, tl, ""); } /* @@ -4888,65 +5155,14 @@ { struct si_shader_context *ctx = si_shader_context(bld_base); struct gallivm_state *gallivm = bld_base->base.gallivm; - LLVMValueRef indices[2]; - LLVMValueRef store_ptr, load_ptr_x, load_ptr_y, load_ptr_ddx, load_ptr_ddy, temp, temp2; - LLVMValueRef tl, tr, bl, result[4]; - unsigned c; - - indices[0] = bld_base->uint_bld.zero; - indices[1] = get_thread_id(ctx); - store_ptr = LLVMBuildGEP(gallivm->builder, ctx->lds, - indices, 2, ""); - - temp = LLVMBuildAnd(gallivm->builder, indices[1], - lp_build_const_int32(gallivm, TID_MASK_LEFT), ""); - - temp2 = LLVMBuildAnd(gallivm->builder, indices[1], - lp_build_const_int32(gallivm, TID_MASK_TOP), ""); - - indices[1] = temp; - load_ptr_x = LLVMBuildGEP(gallivm->builder, ctx->lds, - indices, 2, ""); - - indices[1] = temp2; - load_ptr_y = LLVMBuildGEP(gallivm->builder, ctx->lds, - indices, 2, ""); - - indices[1] = LLVMBuildAdd(gallivm->builder, temp, - lp_build_const_int32(gallivm, 1), ""); - load_ptr_ddx = LLVMBuildGEP(gallivm->builder, ctx->lds, - indices, 2, ""); - - indices[1] = LLVMBuildAdd(gallivm->builder, temp2, - lp_build_const_int32(gallivm, 2), ""); - load_ptr_ddy = LLVMBuildGEP(gallivm->builder, ctx->lds, - indices, 2, ""); - - for (c = 0; c < 2; ++c) { - LLVMValueRef store_val; - LLVMValueRef c_ll = lp_build_const_int32(gallivm, c); - - store_val = LLVMBuildExtractElement(gallivm->builder, - interp_ij, c_ll, ""); - LLVMBuildStore(gallivm->builder, - store_val, - store_ptr); - - tl = LLVMBuildLoad(gallivm->builder, load_ptr_x, ""); - tl = LLVMBuildBitCast(gallivm->builder, tl, ctx->f32, ""); - - tr = LLVMBuildLoad(gallivm->builder, load_ptr_ddx, ""); - tr = LLVMBuildBitCast(gallivm->builder, tr, ctx->f32, ""); - - result[c] = LLVMBuildFSub(gallivm->builder, tr, tl, ""); - - tl = LLVMBuildLoad(gallivm->builder, load_ptr_y, ""); - tl = LLVMBuildBitCast(gallivm->builder, tl, ctx->f32, ""); - - bl = LLVMBuildLoad(gallivm->builder, load_ptr_ddy, ""); - bl = LLVMBuildBitCast(gallivm->builder, bl, ctx->f32, ""); + LLVMValueRef result[4], a; + unsigned i; - result[c + 2] = LLVMBuildFSub(gallivm->builder, bl, tl, ""); + for (i = 0; i < 2; i++) { + a = LLVMBuildExtractElement(gallivm->builder, interp_ij, + LLVMConstInt(ctx->i32, i, 0), ""); + result[i] = lp_build_emit_llvm_unary(bld_base, TGSI_OPCODE_DDX, a); + result[2+i] = lp_build_emit_llvm_unary(bld_base, TGSI_OPCODE_DDY, a); } return lp_build_gather_values(gallivm, result, 4); @@ -4981,7 +5197,7 @@ emit_data->inst, 1, TGSI_CHAN_X); sample_id = LLVMBuildBitCast(gallivm->builder, sample_id, ctx->i32, ""); - sample_position = load_sample_position(&ctx->radeon_bld, sample_id); + sample_position = load_sample_position(ctx, sample_id); emit_data->args[0] = LLVMBuildExtractElement(gallivm->builder, sample_position, @@ -5003,14 +5219,14 @@ struct si_shader_context *ctx = si_shader_context(bld_base); struct si_shader *shader = ctx->shader; struct gallivm_state *gallivm = bld_base->base.gallivm; + struct lp_build_context *uint = &bld_base->uint_bld; LLVMValueRef interp_param; const struct tgsi_full_instruction *inst = emit_data->inst; - const char *intr_name; int input_index = inst->Src[0].Register.Index; int chan; int i; LLVMValueRef attr_number; - LLVMValueRef params = LLVMGetParam(ctx->radeon_bld.main_fn, SI_PARAM_PRIM_MASK); + LLVMValueRef params = LLVMGetParam(ctx->main_fn, SI_PARAM_PRIM_MASK); int interp_param_idx; unsigned interp = shader->selector->info.input_interpolate[input_index]; unsigned location; @@ -5027,7 +5243,7 @@ if (interp_param_idx == -1) return; else if (interp_param_idx) - interp_param = LLVMGetParam(ctx->radeon_bld.main_fn, interp_param_idx); + interp_param = LLVMGetParam(ctx->main_fn, interp_param_idx); else interp_param = NULL; @@ -5066,45 +5282,48 @@ temp2 = LLVMBuildFMul(gallivm->builder, ddy_el, emit_data->args[1], ""); - temp2 = LLVMBuildFAdd(gallivm->builder, temp2, temp1, ""); - - ij_out[i] = LLVMBuildBitCast(gallivm->builder, - temp2, ctx->i32, ""); + ij_out[i] = LLVMBuildFAdd(gallivm->builder, temp2, temp1, ""); } interp_param = lp_build_gather_values(bld_base->base.gallivm, ij_out, 2); } - intr_name = interp_param ? "llvm.SI.fs.interp" : "llvm.SI.fs.constant"; for (chan = 0; chan < 4; chan++) { - LLVMValueRef args[4]; LLVMValueRef llvm_chan; unsigned schan; schan = tgsi_util_get_full_src_register_swizzle(&inst->Src[0], chan); llvm_chan = lp_build_const_int32(gallivm, schan); - args[0] = llvm_chan; - args[1] = attr_number; - args[2] = params; - args[3] = interp_param; - - emit_data->output[chan] = - lp_build_intrinsic(gallivm->builder, intr_name, - ctx->f32, args, args[3] ? 4 : 3, - LLVMReadNoneAttribute | LLVMNoUnwindAttribute); + if (interp_param) { + interp_param = LLVMBuildBitCast(gallivm->builder, + interp_param, LLVMVectorType(ctx->f32, 2), ""); + LLVMValueRef i = LLVMBuildExtractElement( + gallivm->builder, interp_param, uint->zero, ""); + LLVMValueRef j = LLVMBuildExtractElement( + gallivm->builder, interp_param, uint->one, ""); + emit_data->output[chan] = build_fs_interp(bld_base, + llvm_chan, attr_number, params, + i, j); + } else { + emit_data->output[chan] = build_fs_interp_mov(bld_base, + lp_build_const_int32(gallivm, 2), /* P0 */ + llvm_chan, attr_number, params); + } } } static unsigned si_llvm_get_stream(struct lp_build_tgsi_context *bld_base, struct lp_build_emit_data *emit_data) { - LLVMValueRef (*imms)[4] = lp_soa_context(bld_base)->immediates; + struct si_shader_context *ctx = si_shader_context(bld_base); struct tgsi_src_register src0 = emit_data->inst->Src[0].Register; + LLVMValueRef imm; unsigned stream; assert(src0.File == TGSI_FILE_IMMEDIATE); - stream = LLVMConstIntGetZExtValue(imms[src0.Index][src0.SwizzleX]) & 0x3; + imm = ctx->imms[src0.Index * TGSI_NUM_CHANNELS + src0.SwizzleX]; + stream = LLVMConstIntGetZExtValue(imm) & 0x3; return stream; } @@ -5119,12 +5338,13 @@ struct si_shader *shader = ctx->shader; struct tgsi_shader_info *info = &shader->selector->info; struct gallivm_state *gallivm = bld_base->base.gallivm; - LLVMValueRef soffset = LLVMGetParam(ctx->radeon_bld.main_fn, + struct lp_build_if_state if_state; + LLVMValueRef soffset = LLVMGetParam(ctx->main_fn, SI_PARAM_GS2VS_OFFSET); LLVMValueRef gs_next_vertex; LLVMValueRef can_emit, kill; LLVMValueRef args[2]; - unsigned chan; + unsigned chan, offset; int i; unsigned stream; @@ -5136,29 +5356,43 @@ ""); /* If this thread has already emitted the declared maximum number of - * vertices, kill it: excessive vertex emissions are not supposed to - * have any effect, and GS threads have no externally observable - * effects other than emitting vertices. + * vertices, skip the write: excessive vertex emissions are not + * supposed to have any effect. + * + * If the shader has no writes to memory, kill it instead. This skips + * further memory loads and may allow LLVM to skip to the end + * altogether. */ - can_emit = LLVMBuildICmp(gallivm->builder, LLVMIntULE, gs_next_vertex, + can_emit = LLVMBuildICmp(gallivm->builder, LLVMIntULT, gs_next_vertex, lp_build_const_int32(gallivm, shader->selector->gs_max_out_vertices), ""); - kill = lp_build_select(&bld_base->base, can_emit, - lp_build_const_float(gallivm, 1.0f), - lp_build_const_float(gallivm, -1.0f)); - lp_build_intrinsic(gallivm->builder, "llvm.AMDGPU.kill", - ctx->voidt, &kill, 1, 0); + bool use_kill = !info->writes_memory; + if (use_kill) { + kill = lp_build_select(&bld_base->base, can_emit, + lp_build_const_float(gallivm, 1.0f), + lp_build_const_float(gallivm, -1.0f)); + + lp_build_intrinsic(gallivm->builder, "llvm.AMDGPU.kill", + ctx->voidt, &kill, 1, 0); + } else { + lp_build_if(&if_state, gallivm, can_emit); + } + offset = 0; for (i = 0; i < info->num_outputs; i++) { - LLVMValueRef *out_ptr = - ctx->radeon_bld.soa.outputs[i]; + LLVMValueRef *out_ptr = ctx->outputs[i]; for (chan = 0; chan < 4; chan++) { + if (!(info->output_usagemask[i] & (1 << chan)) || + ((info->output_streams[i] >> (2 * chan)) & 3) != stream) + continue; + LLVMValueRef out_val = LLVMBuildLoad(gallivm->builder, out_ptr[chan], ""); LLVMValueRef voffset = - lp_build_const_int32(gallivm, (i * 4 + chan) * + lp_build_const_int32(gallivm, offset * shader->selector->gs_max_out_vertices); + offset++; voffset = lp_build_add(uint, voffset, gs_next_vertex); voffset = lp_build_mul_imm(uint, voffset, 4); @@ -5174,6 +5408,7 @@ 1, 0, 1, 1, 0); } } + gs_next_vertex = lp_build_add(uint, gs_next_vertex, lp_build_const_int32(gallivm, 1)); @@ -5181,9 +5416,12 @@ /* Signal vertex emission */ args[0] = lp_build_const_int32(gallivm, SENDMSG_GS_OP_EMIT | SENDMSG_GS | (stream << 8)); - args[1] = LLVMGetParam(ctx->radeon_bld.main_fn, SI_PARAM_GS_WAVE_ID); + args[1] = LLVMGetParam(ctx->main_fn, SI_PARAM_GS_WAVE_ID); lp_build_intrinsic(gallivm->builder, "llvm.SI.sendmsg", - ctx->voidt, args, 2, LLVMNoUnwindAttribute); + ctx->voidt, args, 2, 0); + + if (!use_kill) + lp_build_endif(&if_state); } /* Cut one primitive from the geometry shader */ @@ -5200,9 +5438,9 @@ /* Signal primitive cut */ stream = si_llvm_get_stream(bld_base, emit_data); args[0] = lp_build_const_int32(gallivm, SENDMSG_GS_OP_CUT | SENDMSG_GS | (stream << 8)); - args[1] = LLVMGetParam(ctx->radeon_bld.main_fn, SI_PARAM_GS_WAVE_ID); + args[1] = LLVMGetParam(ctx->main_fn, SI_PARAM_GS_WAVE_ID); lp_build_intrinsic(gallivm->builder, "llvm.SI.sendmsg", - ctx->voidt, args, 2, LLVMNoUnwindAttribute); + ctx->voidt, args, 2, 0); } static void si_llvm_emit_barrier(const struct lp_build_tgsi_action *action, @@ -5212,18 +5450,21 @@ struct si_shader_context *ctx = si_shader_context(bld_base); struct gallivm_state *gallivm = bld_base->base.gallivm; - /* The real barrier instruction isn’t needed, because an entire patch + /* SI only (thanks to a hw bug workaround): + * The real barrier instruction isn’t needed, because an entire patch * always fits into a single wave. */ - if (ctx->type == PIPE_SHADER_TESS_CTRL) { - emit_optimization_barrier(ctx); + if (HAVE_LLVM >= 0x0309 && + ctx->screen->b.chip_class == SI && + ctx->type == PIPE_SHADER_TESS_CTRL) { + emit_waitcnt(ctx, LGKM_CNT & VM_CNT); return; } lp_build_intrinsic(gallivm->builder, HAVE_LLVM >= 0x0309 ? "llvm.amdgcn.s.barrier" : "llvm.AMDGPU.barrier.local", - ctx->voidt, NULL, 0, LLVMNoUnwindAttribute); + ctx->voidt, NULL, 0, 0); } static const struct lp_build_tgsi_action tex_action = { @@ -5237,40 +5478,60 @@ }; static void si_create_function(struct si_shader_context *ctx, + const char *name, LLVMTypeRef *returns, unsigned num_returns, LLVMTypeRef *params, unsigned num_params, - int last_array_pointer, int last_sgpr) + int last_sgpr) { int i; - radeon_llvm_create_func(&ctx->radeon_bld, returns, num_returns, - params, num_params); - radeon_llvm_shader_type(ctx->radeon_bld.main_fn, ctx->type); - ctx->return_value = LLVMGetUndef(ctx->radeon_bld.return_type); + si_llvm_create_func(ctx, name, returns, num_returns, + params, num_params); + si_llvm_shader_type(ctx->main_fn, ctx->type); + ctx->return_value = LLVMGetUndef(ctx->return_type); for (i = 0; i <= last_sgpr; ++i) { - LLVMValueRef P = LLVMGetParam(ctx->radeon_bld.main_fn, i); + LLVMValueRef P = LLVMGetParam(ctx->main_fn, i); - /* We tell llvm that array inputs are passed by value to allow Sinking pass - * to move load. Inputs are constant so this is fine. */ - if (i <= last_array_pointer) - LLVMAddAttribute(P, LLVMByValAttribute); - else - LLVMAddAttribute(P, LLVMInRegAttribute); + /* The combination of: + * - ByVal + * - dereferenceable + * - invariant.load + * allows the optimization passes to move loads and reduces + * SGPR spilling significantly. + */ + if (LLVMGetTypeKind(LLVMTypeOf(P)) == LLVMPointerTypeKind) { + lp_add_function_attr(ctx->main_fn, i + 1, LP_FUNC_ATTR_BYVAL); + lp_add_attr_dereferenceable(P, UINT64_MAX); + } else + lp_add_function_attr(ctx->main_fn, i + 1, LP_FUNC_ATTR_INREG); + } + + if (ctx->screen->b.debug_flags & DBG_UNSAFE_MATH) { + /* These were copied from some LLVM test. */ + LLVMAddTargetDependentFunctionAttr(ctx->main_fn, + "less-precise-fpmad", + "true"); + LLVMAddTargetDependentFunctionAttr(ctx->main_fn, + "no-infs-fp-math", + "true"); + LLVMAddTargetDependentFunctionAttr(ctx->main_fn, + "no-nans-fp-math", + "true"); + LLVMAddTargetDependentFunctionAttr(ctx->main_fn, + "unsafe-fp-math", + "true"); } } static void create_meta_data(struct si_shader_context *ctx) { - struct gallivm_state *gallivm = ctx->radeon_bld.soa.bld_base.base.gallivm; - LLVMValueRef args[3]; - - args[0] = LLVMMDStringInContext(gallivm->context, "const", 5); - args[1] = 0; - args[2] = lp_build_const_int32(gallivm, 1); - - ctx->const_md = LLVMMDNodeInContext(gallivm->context, args, 3); + struct gallivm_state *gallivm = ctx->bld_base.base.gallivm; + ctx->invariant_load_md_kind = LLVMGetMDKindIDInContext(gallivm->context, + "invariant.load", 14); + ctx->range_md_kind = LLVMGetMDKindIDInContext(gallivm->context, + "range", 5); ctx->uniform_md_kind = LLVMGetMDKindIDInContext(gallivm->context, "amdgpu.uniform", 14); @@ -5316,6 +5577,9 @@ case LLVMVectorTypeKind: return LLVMGetVectorSize(type) * llvm_get_type_size(LLVMGetElementType(type)); + case LLVMArrayTypeKind: + return LLVMGetArrayLength(type) * + llvm_get_type_size(LLVMGetElementType(type)); default: assert(0); return 0; @@ -5324,28 +5588,43 @@ static void declare_tess_lds(struct si_shader_context *ctx) { - struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm; - LLVMTypeRef i32 = ctx->radeon_bld.soa.bld_base.uint_bld.elem_type; - unsigned lds_size = ctx->screen->b.chip_class >= CIK ? 65536 : 32768; + struct gallivm_state *gallivm = &ctx->gallivm; + struct lp_build_tgsi_context *bld_base = &ctx->bld_base; + struct lp_build_context *uint = &bld_base->uint_bld; - /* The actual size is computed outside of the shader to reduce - * the number of shader variants. */ - ctx->lds = - LLVMAddGlobalInAddressSpace(gallivm->module, - LLVMArrayType(i32, lds_size / 4), - "tess_lds", - LOCAL_ADDR_SPACE); + unsigned lds_size = ctx->screen->b.chip_class >= CIK ? 65536 : 32768; + ctx->lds = LLVMBuildIntToPtr(gallivm->builder, uint->zero, + LLVMPointerType(LLVMArrayType(ctx->i32, lds_size / 4), LOCAL_ADDR_SPACE), + "tess_lds"); +} + +static unsigned si_get_max_workgroup_size(struct si_shader *shader) +{ + const unsigned *properties = shader->selector->info.properties; + unsigned max_work_group_size = + properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH] * + properties[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT] * + properties[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH]; + + if (!max_work_group_size) { + /* This is a variable group size compute shader, + * compile it for the maximum possible group size. + */ + max_work_group_size = SI_MAX_VARIABLE_THREADS_PER_BLOCK; + } + return max_work_group_size; } static void create_function(struct si_shader_context *ctx) { - struct lp_build_tgsi_context *bld_base = &ctx->radeon_bld.soa.bld_base; + struct lp_build_tgsi_context *bld_base = &ctx->bld_base; struct gallivm_state *gallivm = bld_base->base.gallivm; struct si_shader *shader = ctx->shader; LLVMTypeRef params[SI_NUM_PARAMS + SI_NUM_VERTEX_BUFFERS], v3i32; LLVMTypeRef returns[16+32*4]; - unsigned i, last_array_pointer, last_sgpr, num_params, num_return_sgprs; + unsigned i, last_sgpr, num_params, num_return_sgprs; unsigned num_returns = 0; + unsigned num_prolog_vgprs = 0; v3i32 = LLVMVectorType(ctx->i32, 3); @@ -5354,24 +5633,22 @@ params[SI_PARAM_SAMPLERS] = const_array(ctx->v8i32, SI_NUM_SAMPLERS); params[SI_PARAM_IMAGES] = const_array(ctx->v8i32, SI_NUM_IMAGES); params[SI_PARAM_SHADER_BUFFERS] = const_array(ctx->v4i32, SI_NUM_SHADER_BUFFERS); - last_array_pointer = SI_PARAM_SHADER_BUFFERS; switch (ctx->type) { case PIPE_SHADER_VERTEX: params[SI_PARAM_VERTEX_BUFFERS] = const_array(ctx->v16i8, SI_NUM_VERTEX_BUFFERS); - last_array_pointer = SI_PARAM_VERTEX_BUFFERS; params[SI_PARAM_BASE_VERTEX] = ctx->i32; params[SI_PARAM_START_INSTANCE] = ctx->i32; - num_params = SI_PARAM_START_INSTANCE+1; + params[SI_PARAM_DRAWID] = ctx->i32; + num_params = SI_PARAM_DRAWID+1; - if (shader->key.vs.as_es) { + if (shader->key.as_es) { params[ctx->param_es2gs_offset = num_params++] = ctx->i32; - } else if (shader->key.vs.as_ls) { + } else if (shader->key.as_ls) { params[SI_PARAM_LS_OUT_LAYOUT] = ctx->i32; num_params = SI_PARAM_LS_OUT_LAYOUT+1; } else { - if (ctx->is_gs_copy_shader) { - last_array_pointer = SI_PARAM_RW_BUFFERS; + if (shader->is_gs_copy_shader) { num_params = SI_PARAM_RW_BUFFERS+1; } else { params[SI_PARAM_VS_STATE_BITS] = ctx->i32; @@ -5391,16 +5668,17 @@ params[ctx->param_vs_prim_id = num_params++] = ctx->i32; params[ctx->param_instance_id = num_params++] = ctx->i32; - if (!ctx->is_monolithic && - !ctx->is_gs_copy_shader) { + if (!shader->is_gs_copy_shader) { /* Vertex load indices. */ ctx->param_vertex_index0 = num_params; for (i = 0; i < shader->selector->info.num_inputs; i++) params[num_params++] = ctx->i32; + num_prolog_vgprs += shader->selector->info.num_inputs; + /* PrimitiveID output. */ - if (!shader->key.vs.as_es && !shader->key.vs.as_ls) + if (!shader->key.as_es && !shader->key.as_ls) for (i = 0; i <= VS_EPILOG_PRIMID_LOC; i++) returns[num_returns++] = ctx->f32; } @@ -5420,23 +5698,21 @@ params[SI_PARAM_REL_IDS] = ctx->i32; num_params = SI_PARAM_REL_IDS+1; - if (!ctx->is_monolithic) { - /* SI_PARAM_TCS_OC_LDS and PARAM_TESS_FACTOR_OFFSET are - * placed after the user SGPRs. - */ - for (i = 0; i < SI_TCS_NUM_USER_SGPR + 2; i++) - returns[num_returns++] = ctx->i32; /* SGPRs */ + /* SI_PARAM_TCS_OC_LDS and PARAM_TESS_FACTOR_OFFSET are + * placed after the user SGPRs. + */ + for (i = 0; i < SI_TCS_NUM_USER_SGPR + 2; i++) + returns[num_returns++] = ctx->i32; /* SGPRs */ - for (i = 0; i < 3; i++) - returns[num_returns++] = ctx->f32; /* VGPRs */ - } + for (i = 0; i < 3; i++) + returns[num_returns++] = ctx->f32; /* VGPRs */ break; case PIPE_SHADER_TESS_EVAL: params[SI_PARAM_TCS_OFFCHIP_LAYOUT] = ctx->i32; num_params = SI_PARAM_TCS_OFFCHIP_LAYOUT+1; - if (shader->key.tes.as_es) { + if (shader->key.as_es) { params[ctx->param_oc_lds = num_params++] = ctx->i32; params[ctx->param_tess_offchip = num_params++] = ctx->i32; params[ctx->param_es2gs_offset = num_params++] = ctx->i32; @@ -5455,7 +5731,7 @@ params[ctx->param_tes_patch_id = num_params++] = ctx->i32; /* PrimitiveID output. */ - if (!ctx->is_monolithic && !shader->key.tes.as_es) + if (!shader->key.as_es) for (i = 0; i <= VS_EPILOG_PRIMID_LOC; i++) returns[num_returns++] = ctx->f32; break; @@ -5494,45 +5770,47 @@ params[SI_PARAM_POS_Z_FLOAT] = ctx->f32; params[SI_PARAM_POS_W_FLOAT] = ctx->f32; params[SI_PARAM_FRONT_FACE] = ctx->i32; + shader->info.face_vgpr_index = 20; params[SI_PARAM_ANCILLARY] = ctx->i32; params[SI_PARAM_SAMPLE_COVERAGE] = ctx->f32; params[SI_PARAM_POS_FIXED_PT] = ctx->i32; num_params = SI_PARAM_POS_FIXED_PT+1; - if (!ctx->is_monolithic) { - /* Color inputs from the prolog. */ - if (shader->selector->info.colors_read) { - unsigned num_color_elements = - util_bitcount(shader->selector->info.colors_read); - - assert(num_params + num_color_elements <= ARRAY_SIZE(params)); - for (i = 0; i < num_color_elements; i++) - params[num_params++] = ctx->f32; - } - - /* Outputs for the epilog. */ - num_return_sgprs = SI_SGPR_ALPHA_REF + 1; - num_returns = - num_return_sgprs + - util_bitcount(shader->selector->info.colors_written) * 4 + - shader->selector->info.writes_z + - shader->selector->info.writes_stencil + - shader->selector->info.writes_samplemask + - 1 /* SampleMaskIn */; - - num_returns = MAX2(num_returns, - num_return_sgprs + - PS_EPILOG_SAMPLEMASK_MIN_LOC + 1); - - for (i = 0; i < num_return_sgprs; i++) - returns[i] = ctx->i32; - for (; i < num_returns; i++) - returns[i] = ctx->f32; - } - break; + /* Color inputs from the prolog. */ + if (shader->selector->info.colors_read) { + unsigned num_color_elements = + util_bitcount(shader->selector->info.colors_read); + + assert(num_params + num_color_elements <= ARRAY_SIZE(params)); + for (i = 0; i < num_color_elements; i++) + params[num_params++] = ctx->f32; + + num_prolog_vgprs += num_color_elements; + } + + /* Outputs for the epilog. */ + num_return_sgprs = SI_SGPR_ALPHA_REF + 1; + num_returns = + num_return_sgprs + + util_bitcount(shader->selector->info.colors_written) * 4 + + shader->selector->info.writes_z + + shader->selector->info.writes_stencil + + shader->selector->info.writes_samplemask + + 1 /* SampleMaskIn */; + + num_returns = MAX2(num_returns, + num_return_sgprs + + PS_EPILOG_SAMPLEMASK_MIN_LOC + 1); + + for (i = 0; i < num_return_sgprs; i++) + returns[i] = ctx->i32; + for (; i < num_returns; i++) + returns[i] = ctx->f32; + break; case PIPE_SHADER_COMPUTE: params[SI_PARAM_GRID_SIZE] = v3i32; + params[SI_PARAM_BLOCK_SIZE] = v3i32; params[SI_PARAM_BLOCK_ID] = v3i32; last_sgpr = SI_PARAM_BLOCK_ID; @@ -5546,34 +5824,26 @@ assert(num_params <= ARRAY_SIZE(params)); - si_create_function(ctx, returns, num_returns, params, - num_params, last_array_pointer, last_sgpr); + si_create_function(ctx, "main", returns, num_returns, params, + num_params, last_sgpr); /* Reserve register locations for VGPR inputs the PS prolog may need. */ if (ctx->type == PIPE_SHADER_FRAGMENT && - !ctx->is_monolithic) { - radeon_llvm_add_attribute(ctx->radeon_bld.main_fn, - "InitialPSInputAddr", - S_0286D0_PERSP_SAMPLE_ENA(1) | - S_0286D0_PERSP_CENTER_ENA(1) | - S_0286D0_PERSP_CENTROID_ENA(1) | - S_0286D0_LINEAR_SAMPLE_ENA(1) | - S_0286D0_LINEAR_CENTER_ENA(1) | - S_0286D0_LINEAR_CENTROID_ENA(1) | - S_0286D0_FRONT_FACE_ENA(1) | - S_0286D0_POS_FIXED_PT_ENA(1)); + ctx->separate_prolog) { + si_llvm_add_attribute(ctx->main_fn, + "InitialPSInputAddr", + S_0286D0_PERSP_SAMPLE_ENA(1) | + S_0286D0_PERSP_CENTER_ENA(1) | + S_0286D0_PERSP_CENTROID_ENA(1) | + S_0286D0_LINEAR_SAMPLE_ENA(1) | + S_0286D0_LINEAR_CENTER_ENA(1) | + S_0286D0_LINEAR_CENTROID_ENA(1) | + S_0286D0_FRONT_FACE_ENA(1) | + S_0286D0_POS_FIXED_PT_ENA(1)); } else if (ctx->type == PIPE_SHADER_COMPUTE) { - const unsigned *properties = shader->selector->info.properties; - unsigned max_work_group_size = - properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH] * - properties[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT] * - properties[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH]; - - assert(max_work_group_size); - - radeon_llvm_add_attribute(ctx->radeon_bld.main_fn, - "amdgpu-max-work-group-size", - max_work_group_size); + si_llvm_add_attribute(ctx->main_fn, + "amdgpu-max-work-group-size", + si_get_max_workgroup_size(shader)); } shader->info.num_input_sgprs = 0; @@ -5582,14 +5852,14 @@ for (i = 0; i <= last_sgpr; ++i) shader->info.num_input_sgprs += llvm_get_type_size(params[i]) / 4; - /* Unused fragment shader inputs are eliminated by the compiler, - * so we don't know yet how many there will be. - */ - if (ctx->type != PIPE_SHADER_FRAGMENT) - for (; i < num_params; ++i) - shader->info.num_input_vgprs += llvm_get_type_size(params[i]) / 4; + for (; i < num_params; ++i) + shader->info.num_input_vgprs += llvm_get_type_size(params[i]) / 4; - if (bld_base->info && + assert(shader->info.num_input_vgprs >= num_prolog_vgprs); + shader->info.num_input_vgprs -= num_prolog_vgprs; + + if (!ctx->screen->has_ds_bpermute && + bld_base->info && (bld_base->info->opcode_count[TGSI_OPCODE_DDX] > 0 || bld_base->info->opcode_count[TGSI_OPCODE_DDY] > 0 || bld_base->info->opcode_count[TGSI_OPCODE_DDX_FINE] > 0 || @@ -5602,164 +5872,28 @@ "ddxy_lds", LOCAL_ADDR_SPACE); - if ((ctx->type == PIPE_SHADER_VERTEX && shader->key.vs.as_ls) || + if ((ctx->type == PIPE_SHADER_VERTEX && shader->key.as_ls) || ctx->type == PIPE_SHADER_TESS_CTRL || ctx->type == PIPE_SHADER_TESS_EVAL) declare_tess_lds(ctx); } -static void preload_constants(struct si_shader_context *ctx) -{ - struct lp_build_tgsi_context *bld_base = &ctx->radeon_bld.soa.bld_base; - struct gallivm_state *gallivm = bld_base->base.gallivm; - const struct tgsi_shader_info *info = bld_base->info; - unsigned buf; - LLVMValueRef ptr = LLVMGetParam(ctx->radeon_bld.main_fn, SI_PARAM_CONST_BUFFERS); - - for (buf = 0; buf < SI_NUM_CONST_BUFFERS; buf++) { - unsigned i, num_const = info->const_file_max[buf] + 1; - - if (num_const == 0) - continue; - - /* Allocate space for the constant values */ - ctx->constants[buf] = CALLOC(num_const * 4, sizeof(LLVMValueRef)); - - /* Load the resource descriptor */ - ctx->const_buffers[buf] = - build_indexed_load_const(ctx, ptr, lp_build_const_int32(gallivm, buf)); - - /* Load the constants, we rely on the code sinking to do the rest */ - for (i = 0; i < num_const * 4; ++i) { - ctx->constants[buf][i] = - buffer_load_const(gallivm->builder, - ctx->const_buffers[buf], - lp_build_const_int32(gallivm, i * 4), - ctx->f32); - } - } -} - -static void preload_shader_buffers(struct si_shader_context *ctx) -{ - struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm; - LLVMValueRef ptr = LLVMGetParam(ctx->radeon_bld.main_fn, SI_PARAM_SHADER_BUFFERS); - int buf, maxbuf; - - maxbuf = MIN2(ctx->shader->selector->info.file_max[TGSI_FILE_BUFFER], - SI_NUM_SHADER_BUFFERS - 1); - for (buf = 0; buf <= maxbuf; ++buf) { - ctx->shader_buffers[buf] = - build_indexed_load_const( - ctx, ptr, lp_build_const_int32(gallivm, buf)); - } -} - -static void preload_samplers(struct si_shader_context *ctx) -{ - struct lp_build_tgsi_context *bld_base = &ctx->radeon_bld.soa.bld_base; - struct gallivm_state *gallivm = bld_base->base.gallivm; - const struct tgsi_shader_info *info = bld_base->info; - unsigned i, num_samplers = info->file_max[TGSI_FILE_SAMPLER] + 1; - LLVMValueRef offset; - - if (num_samplers == 0) - return; - - /* Load the resources and samplers, we rely on the code sinking to do the rest */ - for (i = 0; i < num_samplers; ++i) { - /* Resource */ - offset = lp_build_const_int32(gallivm, i); - ctx->sampler_views[i] = - get_sampler_desc(ctx, offset, DESC_IMAGE); - - /* FMASK resource */ - if (info->is_msaa_sampler[i]) - ctx->fmasks[i] = - get_sampler_desc(ctx, offset, DESC_FMASK); - else { - ctx->sampler_states[i] = - get_sampler_desc(ctx, offset, DESC_SAMPLER); - ctx->sampler_states[i] = - sici_fix_sampler_aniso(ctx, ctx->sampler_views[i], - ctx->sampler_states[i]); - } - } -} - -static void preload_images(struct si_shader_context *ctx) -{ - struct lp_build_tgsi_context *bld_base = &ctx->radeon_bld.soa.bld_base; - struct tgsi_shader_info *info = &ctx->shader->selector->info; - struct gallivm_state *gallivm = bld_base->base.gallivm; - unsigned num_images = bld_base->info->file_max[TGSI_FILE_IMAGE] + 1; - LLVMValueRef res_ptr; - unsigned i; - - if (num_images == 0) - return; - - res_ptr = LLVMGetParam(ctx->radeon_bld.main_fn, SI_PARAM_IMAGES); - - for (i = 0; i < num_images; ++i) { - /* Rely on LLVM to shrink the load for buffer resources. */ - LLVMValueRef rsrc = - build_indexed_load_const(ctx, res_ptr, - lp_build_const_int32(gallivm, i)); - - if (info->images_writemask & (1 << i) && - !(info->images_buffers & (1 << i))) - rsrc = force_dcc_off(ctx, rsrc); - - ctx->images[i] = rsrc; - } -} - -static void preload_streamout_buffers(struct si_shader_context *ctx) -{ - struct lp_build_tgsi_context *bld_base = &ctx->radeon_bld.soa.bld_base; - struct gallivm_state *gallivm = bld_base->base.gallivm; - unsigned i; - - /* Streamout can only be used if the shader is compiled as VS. */ - if (!ctx->shader->selector->so.num_outputs || - (ctx->type == PIPE_SHADER_VERTEX && - (ctx->shader->key.vs.as_es || - ctx->shader->key.vs.as_ls)) || - (ctx->type == PIPE_SHADER_TESS_EVAL && - ctx->shader->key.tes.as_es)) - return; - - LLVMValueRef buf_ptr = LLVMGetParam(ctx->radeon_bld.main_fn, - SI_PARAM_RW_BUFFERS); - - /* Load the resources, we rely on the code sinking to do the rest */ - for (i = 0; i < 4; ++i) { - if (ctx->shader->selector->so.stride[i]) { - LLVMValueRef offset = lp_build_const_int32(gallivm, - SI_VS_STREAMOUT_BUF0 + i); - - ctx->so_buffers[i] = build_indexed_load_const(ctx, buf_ptr, offset); - } - } -} - /** * Load ESGS and GSVS ring buffer resource descriptors and save the variables * for later use. */ static void preload_ring_buffers(struct si_shader_context *ctx) { - struct gallivm_state *gallivm = - ctx->radeon_bld.soa.bld_base.base.gallivm; + struct gallivm_state *gallivm = ctx->bld_base.base.gallivm; + LLVMBuilderRef builder = gallivm->builder; - LLVMValueRef buf_ptr = LLVMGetParam(ctx->radeon_bld.main_fn, + LLVMValueRef buf_ptr = LLVMGetParam(ctx->main_fn, SI_PARAM_RW_BUFFERS); if ((ctx->type == PIPE_SHADER_VERTEX && - ctx->shader->key.vs.as_es) || + ctx->shader->key.as_es) || (ctx->type == PIPE_SHADER_TESS_EVAL && - ctx->shader->key.tes.as_es) || + ctx->shader->key.as_es) || ctx->type == PIPE_SHADER_GEOMETRY) { unsigned ring = ctx->type == PIPE_SHADER_GEOMETRY ? SI_GS_RING_ESGS @@ -5770,19 +5904,81 @@ build_indexed_load_const(ctx, buf_ptr, offset); } - if (ctx->is_gs_copy_shader) { - LLVMValueRef offset = lp_build_const_int32(gallivm, SI_VS_RING_GSVS); + if (ctx->shader->is_gs_copy_shader) { + LLVMValueRef offset = lp_build_const_int32(gallivm, SI_RING_GSVS); ctx->gsvs_ring[0] = build_indexed_load_const(ctx, buf_ptr, offset); - } - if (ctx->type == PIPE_SHADER_GEOMETRY) { - int i; - for (i = 0; i < 4; i++) { - LLVMValueRef offset = lp_build_const_int32(gallivm, SI_GS_RING_GSVS0 + i); + } else if (ctx->type == PIPE_SHADER_GEOMETRY) { + const struct si_shader_selector *sel = ctx->shader->selector; + struct lp_build_context *uint = &ctx->bld_base.uint_bld; + LLVMValueRef offset = lp_build_const_int32(gallivm, SI_RING_GSVS); + LLVMValueRef base_ring; + + base_ring = build_indexed_load_const(ctx, buf_ptr, offset); + + /* The conceptual layout of the GSVS ring is + * v0c0 .. vLv0 v0c1 .. vLc1 .. + * but the real memory layout is swizzled across + * threads: + * t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL + * t16v0c0 .. + * Override the buffer descriptor accordingly. + */ + LLVMTypeRef v2i64 = LLVMVectorType(ctx->i64, 2); + uint64_t stream_offset = 0; + + for (unsigned stream = 0; stream < 4; ++stream) { + unsigned num_components; + unsigned stride; + unsigned num_records; + LLVMValueRef ring, tmp; + + num_components = sel->info.num_stream_output_components[stream]; + if (!num_components) + continue; + + stride = 4 * num_components * sel->gs_max_out_vertices; + + /* Limit on the stride field for <= CIK. */ + assert(stride < (1 << 14)); - ctx->gsvs_ring[i] = - build_indexed_load_const(ctx, buf_ptr, offset); + num_records = 64; + + ring = LLVMBuildBitCast(builder, base_ring, v2i64, ""); + tmp = LLVMBuildExtractElement(builder, ring, uint->zero, ""); + tmp = LLVMBuildAdd(builder, tmp, + LLVMConstInt(ctx->i64, + stream_offset, 0), ""); + stream_offset += stride * 64; + + ring = LLVMBuildInsertElement(builder, ring, tmp, uint->zero, ""); + ring = LLVMBuildBitCast(builder, ring, ctx->v4i32, ""); + tmp = LLVMBuildExtractElement(builder, ring, uint->one, ""); + tmp = LLVMBuildOr(builder, tmp, + LLVMConstInt(ctx->i32, + S_008F04_STRIDE(stride) | + S_008F04_SWIZZLE_ENABLE(1), 0), ""); + ring = LLVMBuildInsertElement(builder, ring, tmp, uint->one, ""); + ring = LLVMBuildInsertElement(builder, ring, + LLVMConstInt(ctx->i32, num_records, 0), + LLVMConstInt(ctx->i32, 2, 0), ""); + ring = LLVMBuildInsertElement(builder, ring, + LLVMConstInt(ctx->i32, + S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) | + S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) | + S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) | + S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W) | + S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) | + S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32) | + S_008F0C_ELEMENT_SIZE(1) | /* element_size = 4 (bytes) */ + S_008F0C_INDEX_STRIDE(1) | /* index_stride = 16 (elements) */ + S_008F0C_ADD_TID_ENABLE(1), + 0), + LLVMConstInt(ctx->i32, 3, 0), ""); + ring = LLVMBuildBitCast(builder, ring, ctx->v16i8, ""); + + ctx->gsvs_ring[stream] = ring; } } } @@ -5791,8 +5987,7 @@ LLVMValueRef param_rw_buffers, unsigned param_pos_fixed_pt) { - struct lp_build_tgsi_context *bld_base = - &ctx->radeon_bld.soa.bld_base; + struct lp_build_tgsi_context *bld_base = &ctx->bld_base; struct gallivm_state *gallivm = bld_base->base.gallivm; LLVMBuilderRef builder = gallivm->builder; LLVMValueRef slot, desc, offset, row, bit, address[2]; @@ -5811,7 +6006,8 @@ /* The stipple pattern is 32x32, each row has 32 bits. */ offset = LLVMBuildMul(builder, address[1], LLVMConstInt(ctx->i32, 4, 0), ""); - row = buffer_load_const(builder, desc, offset, ctx->i32); + row = buffer_load_const(ctx, desc, offset); + row = LLVMBuildBitCast(builder, row, ctx->i32, ""); bit = LLVMBuildLShr(builder, row, address[0], ""); bit = LLVMBuildTrunc(builder, bit, ctx->i1, ""); @@ -5828,6 +6024,20 @@ unsigned i; const unsigned char *config = radeon_shader_binary_config_start(binary, symbol_offset); + bool really_needs_scratch = false; + + /* LLVM adds SGPR spills to the scratch size. + * Find out if we really need the scratch buffer. + */ + for (i = 0; i < binary->reloc_count; i++) { + const struct radeon_shader_reloc *reloc = &binary->relocs[i]; + + if (!strcmp(scratch_rsrc_dword0_symbol, reloc->name) || + !strcmp(scratch_rsrc_dword1_symbol, reloc->name)) { + really_needs_scratch = true; + break; + } + } /* XXX: We may be able to emit some of these values directly rather than * extracting fields to be emitted later. @@ -5862,12 +6072,16 @@ case R_0286E8_SPI_TMPRING_SIZE: case R_00B860_COMPUTE_TMPRING_SIZE: /* WAVESIZE is in units of 256 dwords. */ - conf->scratch_bytes_per_wave = - G_00B860_WAVESIZE(value) * 256 * 4 * 1; + if (really_needs_scratch) + conf->scratch_bytes_per_wave = + G_00B860_WAVESIZE(value) * 256 * 4; + break; + case 0x4: /* SPILLED_SGPRS */ + conf->spilled_sgprs = value; + break; + case 0x8: /* SPILLED_VGPRS */ + conf->spilled_vgprs = value; break; - case 0x4: - case 0x8: - break; /* just spilling stats, not important */ default: { static bool printed; @@ -5880,10 +6094,10 @@ } break; } - - if (!conf->spi_ps_input_addr) - conf->spi_ps_input_addr = conf->spi_ps_input_ena; } + + if (!conf->spi_ps_input_addr) + conf->spi_ps_input_addr = conf->spi_ps_input_ena; } void si_shader_apply_scratch_relocs(struct si_context *sctx, @@ -5894,8 +6108,16 @@ unsigned i; uint32_t scratch_rsrc_dword0 = scratch_va; uint32_t scratch_rsrc_dword1 = - S_008F04_BASE_ADDRESS_HI(scratch_va >> 32) - | S_008F04_STRIDE(config->scratch_bytes_per_wave / 64); + S_008F04_BASE_ADDRESS_HI(scratch_va >> 32); + + /* Enable scratch coalescing if LLVM sets ELEMENT_SIZE & INDEX_STRIDE + * correctly. + */ + if (HAVE_LLVM >= 0x0309) + scratch_rsrc_dword1 |= S_008F04_SWIZZLE_ENABLE(1); + else + scratch_rsrc_dword1 |= + S_008F04_STRIDE(config->scratch_bytes_per_wave / 64); for (i = 0 ; i < shader->binary.reloc_count; i++) { const struct radeon_shader_reloc *reloc = @@ -5937,9 +6159,9 @@ assert(!epilog || !epilog->rodata_size); r600_resource_reference(&shader->bo, NULL); - shader->bo = si_resource_create_custom(&sscreen->b.b, - PIPE_USAGE_IMMUTABLE, - bo_size); + shader->bo = (struct r600_resource*) + pipe_buffer_create(&sscreen->b.b, 0, + PIPE_USAGE_IMMUTABLE, bo_size); if (!shader->bo) return -ENOMEM; @@ -6013,19 +6235,22 @@ } static void si_shader_dump_stats(struct si_screen *sscreen, - struct si_shader_config *conf, - unsigned num_inputs, - unsigned code_size, + struct si_shader *shader, struct pipe_debug_callback *debug, unsigned processor, - FILE *file) + FILE *file, + bool check_debug_option) { + struct si_shader_config *conf = &shader->config; + unsigned num_inputs = shader->selector ? shader->selector->info.num_inputs : 0; + unsigned code_size = si_get_shader_binary_size(shader); unsigned lds_increment = sscreen->b.chip_class >= CIK ? 512 : 256; unsigned lds_per_wave = 0; unsigned max_simd_waves = 10; /* Compute LDS usage for PS. */ - if (processor == PIPE_SHADER_FRAGMENT) { + switch (processor) { + case PIPE_SHADER_FRAGMENT: /* The minimum usage per wave is (num_inputs * 48). The maximum * usage is (num_inputs * 48 * 16). * We can get anything in between and it varies between waves. @@ -6038,6 +6263,15 @@ */ lds_per_wave = conf->lds_size * lds_increment + align(num_inputs * 48, lds_increment); + break; + case PIPE_SHADER_COMPUTE: + if (shader->selector) { + unsigned max_workgroup_size = + si_get_max_workgroup_size(shader); + lds_per_wave = (conf->lds_size * lds_increment) / + DIV_ROUND_UP(max_workgroup_size, 64); + } + break; } /* Compute the per-SIMD wave counts. */ @@ -6051,13 +6285,12 @@ if (conf->num_vgprs) max_simd_waves = MIN2(max_simd_waves, 256 / conf->num_vgprs); - /* LDS is 64KB per CU (4 SIMDs), divided into 16KB blocks per SIMD - * that PS can use. - */ + /* LDS is 64KB per CU (4 SIMDs), which is 16KB per SIMD (usage above + * 16KB makes some SIMDs unoccupied). */ if (lds_per_wave) max_simd_waves = MIN2(max_simd_waves, 16384 / lds_per_wave); - if (file != stderr || + if (!check_debug_option || r600_can_dump_shader(&sscreen->b, processor)) { if (processor == PIPE_SHADER_FRAGMENT) { fprintf(file, "*** SHADER CONFIG ***\n" @@ -6069,22 +6302,29 @@ fprintf(file, "*** SHADER STATS ***\n" "SGPRS: %d\n" "VGPRS: %d\n" + "Spilled SGPRs: %d\n" + "Spilled VGPRs: %d\n" + "Private memory VGPRs: %d\n" "Code Size: %d bytes\n" "LDS: %d blocks\n" "Scratch: %d bytes per wave\n" "Max Waves: %d\n" - "********************\n", - conf->num_sgprs, conf->num_vgprs, code_size, + "********************\n\n\n", + conf->num_sgprs, conf->num_vgprs, + conf->spilled_sgprs, conf->spilled_vgprs, + conf->private_mem_vgprs, code_size, conf->lds_size, conf->scratch_bytes_per_wave, max_simd_waves); } pipe_debug_message(debug, SHADER_INFO, "Shader Stats: SGPRS: %d VGPRS: %d Code Size: %d " - "LDS: %d Scratch: %d Max Waves: %d", + "LDS: %d Scratch: %d Max Waves: %d Spilled SGPRs: %d " + "Spilled VGPRs: %d PrivMem VGPRs: %d", conf->num_sgprs, conf->num_vgprs, code_size, conf->lds_size, conf->scratch_bytes_per_wave, - max_simd_waves); + max_simd_waves, conf->spilled_sgprs, + conf->spilled_vgprs, conf->private_mem_vgprs); } static const char *si_get_shader_name(struct si_shader *shader, @@ -6092,21 +6332,21 @@ { switch (processor) { case PIPE_SHADER_VERTEX: - if (shader->key.vs.as_es) + if (shader->key.as_es) return "Vertex Shader as ES"; - else if (shader->key.vs.as_ls) + else if (shader->key.as_ls) return "Vertex Shader as LS"; else return "Vertex Shader as VS"; case PIPE_SHADER_TESS_CTRL: return "Tessellation Control Shader"; case PIPE_SHADER_TESS_EVAL: - if (shader->key.tes.as_es) + if (shader->key.as_es) return "Tessellation Evaluation Shader as ES"; else return "Tessellation Evaluation Shader as VS"; case PIPE_SHADER_GEOMETRY: - if (shader->gs_copy_shader == NULL) + if (shader->is_gs_copy_shader) return "GS Copy Shader as VS"; else return "Geometry Shader"; @@ -6121,9 +6361,19 @@ void si_shader_dump(struct si_screen *sscreen, struct si_shader *shader, struct pipe_debug_callback *debug, unsigned processor, - FILE *file) + FILE *file, bool check_debug_option) { - if (file != stderr || + if (!check_debug_option || + r600_can_dump_shader(&sscreen->b, processor)) + si_dump_shader_key(processor, &shader->key, file); + + if (!check_debug_option && shader->binary.llvm_ir_string) { + fprintf(file, "\n%s - main shader part - LLVM IR:\n\n", + si_get_shader_name(shader, processor)); + fprintf(file, "%s\n", shader->binary.llvm_ir_string); + } + + if (!check_debug_option || (r600_can_dump_shader(&sscreen->b, processor) && !(sscreen->b.debug_flags & DBG_NO_ASM))) { fprintf(file, "\n%s:\n", si_get_shader_name(shader, processor)); @@ -6140,10 +6390,8 @@ fprintf(file, "\n"); } - si_shader_dump_stats(sscreen, &shader->config, - shader->selector ? shader->selector->info.num_inputs : 0, - si_get_shader_binary_size(shader), debug, processor, - file); + si_shader_dump_stats(sscreen, shader, debug, processor, file, + check_debug_option); } int si_compile_llvm(struct si_screen *sscreen, @@ -6168,10 +6416,14 @@ } } + if (sscreen->record_llvm_ir) { + char *ir = LLVMPrintModuleToString(mod); + binary->llvm_ir_string = strdup(ir); + LLVMDisposeMessage(ir); + } + if (!si_replace_shader(count, binary)) { - r = radeon_llvm_compile(mod, binary, - r600_get_llvm_processor_name(sscreen->b.family), tm, - debug); + r = si_llvm_compile(mod, binary, tm, debug); if (r) return r; } @@ -6212,35 +6464,60 @@ return r; } +static void si_llvm_build_ret(struct si_shader_context *ctx, LLVMValueRef ret) +{ + if (LLVMGetTypeKind(LLVMTypeOf(ret)) == LLVMVoidTypeKind) + LLVMBuildRetVoid(ctx->gallivm.builder); + else + LLVMBuildRet(ctx->gallivm.builder, ret); +} + /* Generate code for the hardware VS shader stage to go with a geometry shader */ -static int si_generate_gs_copy_shader(struct si_screen *sscreen, - struct si_shader_context *ctx, - struct si_shader *gs, - struct pipe_debug_callback *debug) +struct si_shader * +si_generate_gs_copy_shader(struct si_screen *sscreen, + LLVMTargetMachineRef tm, + struct si_shader_selector *gs_selector, + struct pipe_debug_callback *debug) { - struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm; - struct lp_build_tgsi_context *bld_base = &ctx->radeon_bld.soa.bld_base; + struct si_shader_context ctx; + struct si_shader *shader; + struct gallivm_state *gallivm = &ctx.gallivm; + LLVMBuilderRef builder; + struct lp_build_tgsi_context *bld_base = &ctx.bld_base; struct lp_build_context *uint = &bld_base->uint_bld; struct si_shader_output_values *outputs; - struct tgsi_shader_info *gsinfo = &gs->selector->info; + struct tgsi_shader_info *gsinfo = &gs_selector->info; LLVMValueRef args[9]; int i, r; outputs = MALLOC(gsinfo->num_outputs * sizeof(outputs[0])); - si_init_shader_ctx(ctx, sscreen, ctx->shader, ctx->tm); - ctx->type = PIPE_SHADER_VERTEX; - ctx->is_gs_copy_shader = true; + if (!outputs) + return NULL; - create_meta_data(ctx); - create_function(ctx); - preload_streamout_buffers(ctx); - preload_ring_buffers(ctx); + shader = CALLOC_STRUCT(si_shader); + if (!shader) { + FREE(outputs); + return NULL; + } + + + shader->selector = gs_selector; + shader->is_gs_copy_shader = true; + + si_init_shader_ctx(&ctx, sscreen, shader, tm); + ctx.type = PIPE_SHADER_VERTEX; + + builder = gallivm->builder; - args[0] = ctx->gsvs_ring[0]; + create_meta_data(&ctx); + create_function(&ctx); + preload_ring_buffers(&ctx); + + args[0] = ctx.gsvs_ring[0]; args[1] = lp_build_mul_imm(uint, - LLVMGetParam(ctx->radeon_bld.main_fn, - ctx->param_vertex_id), + LLVMGetParam(ctx.main_fn, + ctx.param_vertex_id), 4); args[3] = uint->zero; args[4] = uint->one; /* OFFEN */ @@ -6249,59 +6526,121 @@ args[7] = uint->one; /* SLC */ args[8] = uint->zero; /* TFE */ - /* Fetch vertex data from GSVS ring */ + /* Fetch the vertex stream ID.*/ + LLVMValueRef stream_id; + + if (gs_selector->so.num_outputs) + stream_id = unpack_param(&ctx, ctx.param_streamout_config, 24, 2); + else + stream_id = uint->zero; + + /* Fill in output information. */ for (i = 0; i < gsinfo->num_outputs; ++i) { - unsigned chan; + outputs[i].semantic_name = gsinfo->output_semantic_name[i]; + outputs[i].semantic_index = gsinfo->output_semantic_index[i]; - outputs[i].name = gsinfo->output_semantic_name[i]; - outputs[i].sid = gsinfo->output_semantic_index[i]; + for (int chan = 0; chan < 4; chan++) { + outputs[i].vertex_stream[chan] = + (gsinfo->output_streams[i] >> (2 * chan)) & 3; + } + } - for (chan = 0; chan < 4; chan++) { - args[2] = lp_build_const_int32(gallivm, - (i * 4 + chan) * - gs->selector->gs_max_out_vertices * 16 * 4); + LLVMBasicBlockRef end_bb; + LLVMValueRef switch_inst; + + end_bb = LLVMAppendBasicBlockInContext(gallivm->context, ctx.main_fn, "end"); + switch_inst = LLVMBuildSwitch(builder, stream_id, end_bb, 4); + + for (int stream = 0; stream < 4; stream++) { + LLVMBasicBlockRef bb; + unsigned offset; + + if (!gsinfo->num_stream_output_components[stream]) + continue; + + if (stream > 0 && !gs_selector->so.num_outputs) + continue; + + bb = LLVMInsertBasicBlockInContext(gallivm->context, end_bb, "out"); + LLVMAddCase(switch_inst, lp_build_const_int32(gallivm, stream), bb); + LLVMPositionBuilderAtEnd(builder, bb); + + /* Fetch vertex data from GSVS ring */ + offset = 0; + for (i = 0; i < gsinfo->num_outputs; ++i) { + for (unsigned chan = 0; chan < 4; chan++) { + if (!(gsinfo->output_usagemask[i] & (1 << chan)) || + outputs[i].vertex_stream[chan] != stream) { + outputs[i].values[chan] = ctx.bld_base.base.undef; + continue; + } + + args[2] = lp_build_const_int32( + gallivm, + offset * gs_selector->gs_max_out_vertices * 16 * 4); + offset++; - outputs[i].values[chan] = - LLVMBuildBitCast(gallivm->builder, + outputs[i].values[chan] = + LLVMBuildBitCast(gallivm->builder, lp_build_intrinsic(gallivm->builder, "llvm.SI.buffer.load.dword.i32.i32", - ctx->i32, args, 9, - LLVMReadOnlyAttribute | LLVMNoUnwindAttribute), - ctx->f32, ""); + ctx.i32, args, 9, + LP_FUNC_ATTR_READONLY), + ctx.f32, ""); + } + } + + /* Streamout and exports. */ + if (gs_selector->so.num_outputs) { + si_llvm_emit_streamout(&ctx, outputs, + gsinfo->num_outputs, + stream); } + + if (stream == 0) + si_llvm_export_vs(bld_base, outputs, gsinfo->num_outputs); + + LLVMBuildBr(builder, end_bb); } - si_llvm_export_vs(bld_base, outputs, gsinfo->num_outputs); + LLVMPositionBuilderAtEnd(builder, end_bb); - LLVMBuildRet(gallivm->builder, ctx->return_value); + LLVMBuildRetVoid(gallivm->builder); /* Dump LLVM IR before any optimization passes */ if (sscreen->b.debug_flags & DBG_PREOPT_IR && r600_can_dump_shader(&sscreen->b, PIPE_SHADER_GEOMETRY)) LLVMDumpModule(bld_base->base.gallivm->module); - radeon_llvm_finalize_module(&ctx->radeon_bld); + si_llvm_finalize_module(&ctx, + r600_extra_shader_checks(&sscreen->b, PIPE_SHADER_GEOMETRY)); - r = si_compile_llvm(sscreen, &ctx->shader->binary, - &ctx->shader->config, ctx->tm, + r = si_compile_llvm(sscreen, &ctx.shader->binary, + &ctx.shader->config, ctx.tm, bld_base->base.gallivm->module, debug, PIPE_SHADER_GEOMETRY, "GS Copy Shader"); if (!r) { if (r600_can_dump_shader(&sscreen->b, PIPE_SHADER_GEOMETRY)) fprintf(stderr, "GS Copy Shader:\n"); - si_shader_dump(sscreen, ctx->shader, debug, - PIPE_SHADER_GEOMETRY, stderr); - r = si_shader_binary_upload(sscreen, ctx->shader); + si_shader_dump(sscreen, ctx.shader, debug, + PIPE_SHADER_GEOMETRY, stderr, true); + r = si_shader_binary_upload(sscreen, ctx.shader); } - radeon_llvm_dispose(&ctx->radeon_bld); + si_llvm_dispose(&ctx); FREE(outputs); - return r; + + if (r != 0) { + FREE(shader); + shader = NULL; + } + return shader; } -void si_dump_shader_key(unsigned shader, union si_shader_key *key, FILE *f) +static void si_dump_shader_key(unsigned shader, struct si_shader_key *key, + FILE *f) { int i; @@ -6309,45 +6648,66 @@ switch (shader) { case PIPE_SHADER_VERTEX: - fprintf(f, " instance_divisors = {"); - for (i = 0; i < ARRAY_SIZE(key->vs.prolog.instance_divisors); i++) + fprintf(f, " part.vs.prolog.instance_divisors = {"); + for (i = 0; i < ARRAY_SIZE(key->part.vs.prolog.instance_divisors); i++) fprintf(f, !i ? "%u" : ", %u", - key->vs.prolog.instance_divisors[i]); + key->part.vs.prolog.instance_divisors[i]); fprintf(f, "}\n"); - fprintf(f, " as_es = %u\n", key->vs.as_es); - fprintf(f, " as_ls = %u\n", key->vs.as_ls); - fprintf(f, " export_prim_id = %u\n", key->vs.epilog.export_prim_id); + fprintf(f, " part.vs.epilog.export_prim_id = %u\n", key->part.vs.epilog.export_prim_id); + fprintf(f, " as_es = %u\n", key->as_es); + fprintf(f, " as_ls = %u\n", key->as_ls); + fprintf(f, " mono.vs.fix_fetch = 0x%"PRIx64"\n", key->mono.vs.fix_fetch); break; case PIPE_SHADER_TESS_CTRL: - fprintf(f, " prim_mode = %u\n", key->tcs.epilog.prim_mode); + fprintf(f, " part.tcs.epilog.prim_mode = %u\n", key->part.tcs.epilog.prim_mode); + fprintf(f, " mono.tcs.inputs_to_copy = 0x%"PRIx64"\n", key->mono.tcs.inputs_to_copy); break; case PIPE_SHADER_TESS_EVAL: - fprintf(f, " as_es = %u\n", key->tes.as_es); - fprintf(f, " export_prim_id = %u\n", key->tes.epilog.export_prim_id); + fprintf(f, " part.tes.epilog.export_prim_id = %u\n", key->part.tes.epilog.export_prim_id); + fprintf(f, " as_es = %u\n", key->as_es); break; case PIPE_SHADER_GEOMETRY: + fprintf(f, " part.gs.prolog.tri_strip_adj_fix = %u\n", key->part.gs.prolog.tri_strip_adj_fix); + break; + case PIPE_SHADER_COMPUTE: break; case PIPE_SHADER_FRAGMENT: - fprintf(f, " prolog.color_two_side = %u\n", key->ps.prolog.color_two_side); - fprintf(f, " prolog.poly_stipple = %u\n", key->ps.prolog.poly_stipple); - fprintf(f, " prolog.force_persample_interp = %u\n", key->ps.prolog.force_persample_interp); - fprintf(f, " epilog.spi_shader_col_format = 0x%x\n", key->ps.epilog.spi_shader_col_format); - fprintf(f, " epilog.color_is_int8 = 0x%X\n", key->ps.epilog.color_is_int8); - fprintf(f, " epilog.last_cbuf = %u\n", key->ps.epilog.last_cbuf); - fprintf(f, " epilog.alpha_func = %u\n", key->ps.epilog.alpha_func); - fprintf(f, " epilog.alpha_to_one = %u\n", key->ps.epilog.alpha_to_one); - fprintf(f, " epilog.poly_line_smoothing = %u\n", key->ps.epilog.poly_line_smoothing); - fprintf(f, " epilog.clamp_color = %u\n", key->ps.epilog.clamp_color); + fprintf(f, " part.ps.prolog.color_two_side = %u\n", key->part.ps.prolog.color_two_side); + fprintf(f, " part.ps.prolog.flatshade_colors = %u\n", key->part.ps.prolog.flatshade_colors); + fprintf(f, " part.ps.prolog.poly_stipple = %u\n", key->part.ps.prolog.poly_stipple); + fprintf(f, " part.ps.prolog.force_persp_sample_interp = %u\n", key->part.ps.prolog.force_persp_sample_interp); + fprintf(f, " part.ps.prolog.force_linear_sample_interp = %u\n", key->part.ps.prolog.force_linear_sample_interp); + fprintf(f, " part.ps.prolog.force_persp_center_interp = %u\n", key->part.ps.prolog.force_persp_center_interp); + fprintf(f, " part.ps.prolog.force_linear_center_interp = %u\n", key->part.ps.prolog.force_linear_center_interp); + fprintf(f, " part.ps.prolog.bc_optimize_for_persp = %u\n", key->part.ps.prolog.bc_optimize_for_persp); + fprintf(f, " part.ps.prolog.bc_optimize_for_linear = %u\n", key->part.ps.prolog.bc_optimize_for_linear); + fprintf(f, " part.ps.epilog.spi_shader_col_format = 0x%x\n", key->part.ps.epilog.spi_shader_col_format); + fprintf(f, " part.ps.epilog.color_is_int8 = 0x%X\n", key->part.ps.epilog.color_is_int8); + fprintf(f, " part.ps.epilog.color_is_int10 = 0x%X\n", key->part.ps.epilog.color_is_int10); + fprintf(f, " part.ps.epilog.last_cbuf = %u\n", key->part.ps.epilog.last_cbuf); + fprintf(f, " part.ps.epilog.alpha_func = %u\n", key->part.ps.epilog.alpha_func); + fprintf(f, " part.ps.epilog.alpha_to_one = %u\n", key->part.ps.epilog.alpha_to_one); + fprintf(f, " part.ps.epilog.poly_line_smoothing = %u\n", key->part.ps.epilog.poly_line_smoothing); + fprintf(f, " part.ps.epilog.clamp_color = %u\n", key->part.ps.epilog.clamp_color); break; default: assert(0); } + + if ((shader == PIPE_SHADER_GEOMETRY || + shader == PIPE_SHADER_TESS_EVAL || + shader == PIPE_SHADER_VERTEX) && + !key->as_es && !key->as_ls) { + fprintf(f, " opt.hw_vs.kill_outputs = 0x%"PRIx64"\n", key->opt.hw_vs.kill_outputs); + fprintf(f, " opt.hw_vs.kill_outputs2 = 0x%x\n", key->opt.hw_vs.kill_outputs2); + fprintf(f, " opt.hw_vs.clip_disable = %u\n", key->opt.hw_vs.clip_disable); + } } static void si_init_shader_ctx(struct si_shader_context *ctx, @@ -6358,32 +6718,11 @@ struct lp_build_tgsi_context *bld_base; struct lp_build_tgsi_action tmpl = {}; - memset(ctx, 0, sizeof(*ctx)); - radeon_llvm_context_init(&ctx->radeon_bld, "amdgcn--"); - ctx->tm = tm; - ctx->screen = sscreen; - if (shader && shader->selector) - ctx->type = shader->selector->info.processor; - else - ctx->type = -1; - ctx->shader = shader; + si_llvm_context_init(ctx, sscreen, shader, tm, + (shader && shader->selector) ? &shader->selector->info : NULL, + (shader && shader->selector) ? shader->selector->tokens : NULL); - ctx->voidt = LLVMVoidTypeInContext(ctx->radeon_bld.gallivm.context); - ctx->i1 = LLVMInt1TypeInContext(ctx->radeon_bld.gallivm.context); - ctx->i8 = LLVMInt8TypeInContext(ctx->radeon_bld.gallivm.context); - ctx->i32 = LLVMInt32TypeInContext(ctx->radeon_bld.gallivm.context); - ctx->i64 = LLVMInt64TypeInContext(ctx->radeon_bld.gallivm.context); - ctx->i128 = LLVMIntTypeInContext(ctx->radeon_bld.gallivm.context, 128); - ctx->f32 = LLVMFloatTypeInContext(ctx->radeon_bld.gallivm.context); - ctx->v16i8 = LLVMVectorType(ctx->i8, 16); - ctx->v2i32 = LLVMVectorType(ctx->i32, 2); - ctx->v4i32 = LLVMVectorType(ctx->i32, 4); - ctx->v4f32 = LLVMVectorType(ctx->f32, 4); - ctx->v8i32 = LLVMVectorType(ctx->i32, 8); - - bld_base = &ctx->radeon_bld.soa.bld_base; - if (shader && shader->selector) - bld_base->info = &shader->selector->info; + bld_base = &ctx->bld_base; bld_base->emit_fetch_funcs[TGSI_FILE_CONSTANT] = fetch_constant; bld_base->op_actions[TGSI_OPCODE_INTERP_CENTROID] = interp_action; @@ -6445,48 +6784,198 @@ bld_base->op_actions[TGSI_OPCODE_EMIT].emit = si_llvm_emit_vertex; bld_base->op_actions[TGSI_OPCODE_ENDPRIM].emit = si_llvm_emit_primitive; bld_base->op_actions[TGSI_OPCODE_BARRIER].emit = si_llvm_emit_barrier; +} + +/* Return true if the PARAM export has been eliminated. */ +static bool si_eliminate_const_output(struct si_shader_context *ctx, + LLVMValueRef inst, unsigned offset) +{ + struct si_shader *shader = ctx->shader; + unsigned num_outputs = shader->selector->info.num_outputs; + unsigned i, default_val; /* SPI_PS_INPUT_CNTL_i.DEFAULT_VAL */ + bool is_zero[4] = {}, is_one[4] = {}; + + for (i = 0; i < 4; i++) { + LLVMBool loses_info; + LLVMValueRef p = LLVMGetOperand(inst, 5 + i); - bld_base->op_actions[TGSI_OPCODE_MAX].emit = build_tgsi_intrinsic_nomem; - bld_base->op_actions[TGSI_OPCODE_MAX].intr_name = "llvm.maxnum.f32"; - bld_base->op_actions[TGSI_OPCODE_MIN].emit = build_tgsi_intrinsic_nomem; - bld_base->op_actions[TGSI_OPCODE_MIN].intr_name = "llvm.minnum.f32"; + /* It's a constant expression. Undef outputs are eliminated too. */ + if (LLVMIsUndef(p)) { + is_zero[i] = true; + is_one[i] = true; + } else if (LLVMIsAConstantFP(p)) { + double a = LLVMConstRealGetDouble(p, &loses_info); + + if (a == 0) + is_zero[i] = true; + else if (a == 1) + is_one[i] = true; + else + return false; /* other constant */ + } else + return false; + } + + /* Only certain combinations of 0 and 1 can be eliminated. */ + if (is_zero[0] && is_zero[1] && is_zero[2]) + default_val = is_zero[3] ? 0 : 1; + else if (is_one[0] && is_one[1] && is_one[2]) + default_val = is_zero[3] ? 2 : 3; + else + return false; + + /* The PARAM export can be represented as DEFAULT_VAL. Kill it. */ + LLVMInstructionEraseFromParent(inst); + + /* Change OFFSET to DEFAULT_VAL. */ + for (i = 0; i < num_outputs; i++) { + if (shader->info.vs_output_param_offset[i] == offset) { + shader->info.vs_output_param_offset[i] = + EXP_PARAM_DEFAULT_VAL_0000 + default_val; + break; + } + } + return true; } -int si_compile_tgsi_shader(struct si_screen *sscreen, - LLVMTargetMachineRef tm, - struct si_shader *shader, - bool is_monolithic, - struct pipe_debug_callback *debug) +struct si_vs_exports { + unsigned num; + unsigned offset[SI_MAX_VS_OUTPUTS]; + LLVMValueRef inst[SI_MAX_VS_OUTPUTS]; +}; + +static void si_eliminate_const_vs_outputs(struct si_shader_context *ctx) { - struct si_shader_selector *sel = shader->selector; - struct si_shader_context ctx; - struct lp_build_tgsi_context *bld_base; - LLVMModuleRef mod; - int r = 0; + struct si_shader *shader = ctx->shader; + struct tgsi_shader_info *info = &shader->selector->info; + LLVMBasicBlockRef bb; + struct si_vs_exports exports; + bool removed_any = false; + + exports.num = 0; + + if (ctx->type == PIPE_SHADER_FRAGMENT || + ctx->type == PIPE_SHADER_COMPUTE || + shader->key.as_es || + shader->key.as_ls) + return; - /* Dump TGSI code before doing TGSI->LLVM conversion in case the - * conversion fails. */ - if (r600_can_dump_shader(&sscreen->b, sel->info.processor) && - !(sscreen->b.debug_flags & DBG_NO_TGSI)) { - si_dump_shader_key(sel->type, &shader->key, stderr); - tgsi_dump(sel->tokens, 0); - si_dump_streamout(&sel->so); + /* Process all LLVM instructions. */ + bb = LLVMGetFirstBasicBlock(ctx->main_fn); + while (bb) { + LLVMValueRef inst = LLVMGetFirstInstruction(bb); + + while (inst) { + LLVMValueRef cur = inst; + inst = LLVMGetNextInstruction(inst); + + if (LLVMGetInstructionOpcode(cur) != LLVMCall) + continue; + + LLVMValueRef callee = lp_get_called_value(cur); + + if (!lp_is_function(callee)) + continue; + + const char *name = LLVMGetValueName(callee); + unsigned num_args = LLVMCountParams(callee); + + /* Check if this is an export instruction. */ + if (num_args != 9 || strcmp(name, "llvm.SI.export")) + continue; + + LLVMValueRef arg = LLVMGetOperand(cur, 3); + unsigned target = LLVMConstIntGetZExtValue(arg); + + if (target < V_008DFC_SQ_EXP_PARAM) + continue; + + target -= V_008DFC_SQ_EXP_PARAM; + + /* Eliminate constant value PARAM exports. */ + if (si_eliminate_const_output(ctx, cur, target)) { + removed_any = true; + } else { + exports.offset[exports.num] = target; + exports.inst[exports.num] = cur; + exports.num++; + } + } + bb = LLVMGetNextBasicBlock(bb); } - si_init_shader_ctx(&ctx, sscreen, shader, tm); - ctx.is_monolithic = is_monolithic; + /* Remove holes in export memory due to removed PARAM exports. + * This is done by renumbering all PARAM exports. + */ + if (removed_any) { + ubyte current_offset[SI_MAX_VS_OUTPUTS]; + unsigned new_count = 0; + unsigned out, i; + + /* Make a copy of the offsets. We need the old version while + * we are modifying some of them. */ + assert(sizeof(current_offset) == + sizeof(shader->info.vs_output_param_offset)); + memcpy(current_offset, shader->info.vs_output_param_offset, + sizeof(current_offset)); + + for (i = 0; i < exports.num; i++) { + unsigned offset = exports.offset[i]; + + for (out = 0; out < info->num_outputs; out++) { + if (current_offset[out] != offset) + continue; + + LLVMSetOperand(exports.inst[i], 3, + LLVMConstInt(ctx->i32, + V_008DFC_SQ_EXP_PARAM + new_count, 0)); + shader->info.vs_output_param_offset[out] = new_count; + new_count++; + break; + } + } + shader->info.nr_param_exports = new_count; + } +} - shader->info.uses_instanceid = sel->info.uses_instanceid; +static void si_count_scratch_private_memory(struct si_shader_context *ctx) +{ + ctx->shader->config.private_mem_vgprs = 0; + + /* Process all LLVM instructions. */ + LLVMBasicBlockRef bb = LLVMGetFirstBasicBlock(ctx->main_fn); + while (bb) { + LLVMValueRef next = LLVMGetFirstInstruction(bb); + + while (next) { + LLVMValueRef inst = next; + next = LLVMGetNextInstruction(next); + + if (LLVMGetInstructionOpcode(inst) != LLVMAlloca) + continue; + + LLVMTypeRef type = LLVMGetElementType(LLVMTypeOf(inst)); + /* No idea why LLVM aligns allocas to 4 elements. */ + unsigned alignment = LLVMGetAlignment(inst); + unsigned dw_size = align(llvm_get_type_size(type) / 4, alignment); + ctx->shader->config.private_mem_vgprs += dw_size; + } + bb = LLVMGetNextBasicBlock(bb); + } +} - bld_base = &ctx.radeon_bld.soa.bld_base; - ctx.radeon_bld.load_system_value = declare_system_value; +static bool si_compile_tgsi_main(struct si_shader_context *ctx, + struct si_shader *shader) +{ + struct si_shader_selector *sel = shader->selector; + struct lp_build_tgsi_context *bld_base = &ctx->bld_base; - switch (ctx.type) { + switch (ctx->type) { case PIPE_SHADER_VERTEX: - ctx.radeon_bld.load_input = declare_input_vs; - if (shader->key.vs.as_ls) + ctx->load_input = declare_input_vs; + if (shader->key.as_ls) bld_base->emit_epilogue = si_llvm_emit_ls_epilogue; - else if (shader->key.vs.as_es) + else if (shader->key.as_es) bld_base->emit_epilogue = si_llvm_emit_es_epilogue; else bld_base->emit_epilogue = si_llvm_emit_vs_epilogue; @@ -6499,7 +6988,7 @@ break; case PIPE_SHADER_TESS_EVAL: bld_base->emit_fetch_funcs[TGSI_FILE_INPUT] = fetch_input_tes; - if (shader->key.tes.as_es) + if (shader->key.as_es) bld_base->emit_epilogue = si_llvm_emit_es_epilogue; else bld_base->emit_epilogue = si_llvm_emit_vs_epilogue; @@ -6509,84 +6998,654 @@ bld_base->emit_epilogue = si_llvm_emit_gs_epilogue; break; case PIPE_SHADER_FRAGMENT: - ctx.radeon_bld.load_input = declare_input_fs; - if (is_monolithic) - bld_base->emit_epilogue = si_llvm_emit_fs_epilogue; - else - bld_base->emit_epilogue = si_llvm_return_fs_outputs; + ctx->load_input = declare_input_fs; + bld_base->emit_epilogue = si_llvm_return_fs_outputs; break; case PIPE_SHADER_COMPUTE: - ctx.radeon_bld.declare_memory_region = declare_compute_memory; + ctx->declare_memory_region = declare_compute_memory; break; default: assert(!"Unsupported shader type"); - return -1; + return false; } - create_meta_data(&ctx); - create_function(&ctx); - preload_constants(&ctx); - preload_shader_buffers(&ctx); - preload_samplers(&ctx); - preload_images(&ctx); - preload_streamout_buffers(&ctx); - preload_ring_buffers(&ctx); - - if (ctx.is_monolithic && sel->type == PIPE_SHADER_FRAGMENT && - shader->key.ps.prolog.poly_stipple) { - LLVMValueRef list = LLVMGetParam(ctx.radeon_bld.main_fn, - SI_PARAM_RW_BUFFERS); - si_llvm_emit_polygon_stipple(&ctx, list, - SI_PARAM_POS_FIXED_PT); - } + create_meta_data(ctx); + create_function(ctx); + preload_ring_buffers(ctx); - if (ctx.type == PIPE_SHADER_GEOMETRY) { + if (ctx->type == PIPE_SHADER_GEOMETRY) { int i; for (i = 0; i < 4; i++) { - ctx.gs_next_vertex[i] = + ctx->gs_next_vertex[i] = lp_build_alloca(bld_base->base.gallivm, - ctx.i32, ""); + ctx->i32, ""); } } if (!lp_build_tgsi_llvm(bld_base, sel->tokens)) { fprintf(stderr, "Failed to translate shader from TGSI to LLVM\n"); - goto out; + return false; } - LLVMBuildRet(bld_base->base.gallivm->builder, ctx.return_value); - mod = bld_base->base.gallivm->module; + si_llvm_build_ret(ctx, ctx->return_value); + return true; +} - /* Dump LLVM IR before any optimization passes */ - if (sscreen->b.debug_flags & DBG_PREOPT_IR && - r600_can_dump_shader(&sscreen->b, ctx.type)) - LLVMDumpModule(mod); +/** + * Compute the VS prolog key, which contains all the information needed to + * build the VS prolog function, and set shader->info bits where needed. + */ +static void si_get_vs_prolog_key(struct si_shader *shader, + union si_shader_part_key *key) +{ + struct tgsi_shader_info *info = &shader->selector->info; - radeon_llvm_finalize_module(&ctx.radeon_bld); + memset(key, 0, sizeof(*key)); + key->vs_prolog.states = shader->key.part.vs.prolog; + key->vs_prolog.num_input_sgprs = shader->info.num_input_sgprs; + key->vs_prolog.last_input = MAX2(1, info->num_inputs) - 1; - r = si_compile_llvm(sscreen, &shader->binary, &shader->config, tm, - mod, debug, ctx.type, "TGSI shader"); + /* Set the instanceID flag. */ + for (unsigned i = 0; i < info->num_inputs; i++) + if (key->vs_prolog.states.instance_divisors[i]) + shader->info.uses_instanceid = true; +} + +/** + * Compute the VS epilog key, which contains all the information needed to + * build the VS epilog function, and set the PrimitiveID output offset. + */ +static void si_get_vs_epilog_key(struct si_shader *shader, + struct si_vs_epilog_bits *states, + union si_shader_part_key *key) +{ + memset(key, 0, sizeof(*key)); + key->vs_epilog.states = *states; + + /* Set up the PrimitiveID output. */ + if (shader->key.part.vs.epilog.export_prim_id) { + unsigned index = shader->selector->info.num_outputs; + unsigned offset = shader->info.nr_param_exports++; + + key->vs_epilog.prim_id_param_offset = offset; + assert(index < ARRAY_SIZE(shader->info.vs_output_param_offset)); + shader->info.vs_output_param_offset[index] = offset; + } +} + +/** + * Compute the PS prolog key, which contains all the information needed to + * build the PS prolog function, and set related bits in shader->config. + */ +static void si_get_ps_prolog_key(struct si_shader *shader, + union si_shader_part_key *key, + bool separate_prolog) +{ + struct tgsi_shader_info *info = &shader->selector->info; + + memset(key, 0, sizeof(*key)); + key->ps_prolog.states = shader->key.part.ps.prolog; + key->ps_prolog.colors_read = info->colors_read; + key->ps_prolog.num_input_sgprs = shader->info.num_input_sgprs; + key->ps_prolog.num_input_vgprs = shader->info.num_input_vgprs; + key->ps_prolog.wqm = info->uses_derivatives && + (key->ps_prolog.colors_read || + key->ps_prolog.states.force_persp_sample_interp || + key->ps_prolog.states.force_linear_sample_interp || + key->ps_prolog.states.force_persp_center_interp || + key->ps_prolog.states.force_linear_center_interp || + key->ps_prolog.states.bc_optimize_for_persp || + key->ps_prolog.states.bc_optimize_for_linear); + + if (info->colors_read) { + unsigned *color = shader->selector->color_attr_index; + + if (shader->key.part.ps.prolog.color_two_side) { + /* BCOLORs are stored after the last input. */ + key->ps_prolog.num_interp_inputs = info->num_inputs; + key->ps_prolog.face_vgpr_index = shader->info.face_vgpr_index; + shader->config.spi_ps_input_ena |= S_0286CC_FRONT_FACE_ENA(1); + } + + for (unsigned i = 0; i < 2; i++) { + unsigned interp = info->input_interpolate[color[i]]; + unsigned location = info->input_interpolate_loc[color[i]]; + + if (!(info->colors_read & (0xf << i*4))) + continue; + + key->ps_prolog.color_attr_index[i] = color[i]; + + if (shader->key.part.ps.prolog.flatshade_colors && + interp == TGSI_INTERPOLATE_COLOR) + interp = TGSI_INTERPOLATE_CONSTANT; + + switch (interp) { + case TGSI_INTERPOLATE_CONSTANT: + key->ps_prolog.color_interp_vgpr_index[i] = -1; + break; + case TGSI_INTERPOLATE_PERSPECTIVE: + case TGSI_INTERPOLATE_COLOR: + /* Force the interpolation location for colors here. */ + if (shader->key.part.ps.prolog.force_persp_sample_interp) + location = TGSI_INTERPOLATE_LOC_SAMPLE; + if (shader->key.part.ps.prolog.force_persp_center_interp) + location = TGSI_INTERPOLATE_LOC_CENTER; + + switch (location) { + case TGSI_INTERPOLATE_LOC_SAMPLE: + key->ps_prolog.color_interp_vgpr_index[i] = 0; + shader->config.spi_ps_input_ena |= + S_0286CC_PERSP_SAMPLE_ENA(1); + break; + case TGSI_INTERPOLATE_LOC_CENTER: + key->ps_prolog.color_interp_vgpr_index[i] = 2; + shader->config.spi_ps_input_ena |= + S_0286CC_PERSP_CENTER_ENA(1); + break; + case TGSI_INTERPOLATE_LOC_CENTROID: + key->ps_prolog.color_interp_vgpr_index[i] = 4; + shader->config.spi_ps_input_ena |= + S_0286CC_PERSP_CENTROID_ENA(1); + break; + default: + assert(0); + } + break; + case TGSI_INTERPOLATE_LINEAR: + /* Force the interpolation location for colors here. */ + if (shader->key.part.ps.prolog.force_linear_sample_interp) + location = TGSI_INTERPOLATE_LOC_SAMPLE; + if (shader->key.part.ps.prolog.force_linear_center_interp) + location = TGSI_INTERPOLATE_LOC_CENTER; + + /* The VGPR assignment for non-monolithic shaders + * works because InitialPSInputAddr is set on the + * main shader and PERSP_PULL_MODEL is never used. + */ + switch (location) { + case TGSI_INTERPOLATE_LOC_SAMPLE: + key->ps_prolog.color_interp_vgpr_index[i] = + separate_prolog ? 6 : 9; + shader->config.spi_ps_input_ena |= + S_0286CC_LINEAR_SAMPLE_ENA(1); + break; + case TGSI_INTERPOLATE_LOC_CENTER: + key->ps_prolog.color_interp_vgpr_index[i] = + separate_prolog ? 8 : 11; + shader->config.spi_ps_input_ena |= + S_0286CC_LINEAR_CENTER_ENA(1); + break; + case TGSI_INTERPOLATE_LOC_CENTROID: + key->ps_prolog.color_interp_vgpr_index[i] = + separate_prolog ? 10 : 13; + shader->config.spi_ps_input_ena |= + S_0286CC_LINEAR_CENTROID_ENA(1); + break; + default: + assert(0); + } + break; + default: + assert(0); + } + } + } +} + +/** + * Check whether a PS prolog is required based on the key. + */ +static bool si_need_ps_prolog(const union si_shader_part_key *key) +{ + return key->ps_prolog.colors_read || + key->ps_prolog.states.force_persp_sample_interp || + key->ps_prolog.states.force_linear_sample_interp || + key->ps_prolog.states.force_persp_center_interp || + key->ps_prolog.states.force_linear_center_interp || + key->ps_prolog.states.bc_optimize_for_persp || + key->ps_prolog.states.bc_optimize_for_linear || + key->ps_prolog.states.poly_stipple; +} + +/** + * Compute the PS epilog key, which contains all the information needed to + * build the PS epilog function. + */ +static void si_get_ps_epilog_key(struct si_shader *shader, + union si_shader_part_key *key) +{ + struct tgsi_shader_info *info = &shader->selector->info; + memset(key, 0, sizeof(*key)); + key->ps_epilog.colors_written = info->colors_written; + key->ps_epilog.writes_z = info->writes_z; + key->ps_epilog.writes_stencil = info->writes_stencil; + key->ps_epilog.writes_samplemask = info->writes_samplemask; + key->ps_epilog.states = shader->key.part.ps.epilog; +} + +/** + * Build the GS prolog function. Rotate the input vertices for triangle strips + * with adjacency. + */ +static void si_build_gs_prolog_function(struct si_shader_context *ctx, + union si_shader_part_key *key) +{ + const unsigned num_sgprs = SI_GS_NUM_USER_SGPR + 2; + const unsigned num_vgprs = 8; + struct gallivm_state *gallivm = &ctx->gallivm; + LLVMBuilderRef builder = gallivm->builder; + LLVMTypeRef params[32]; + LLVMTypeRef returns[32]; + LLVMValueRef func, ret; + + for (unsigned i = 0; i < num_sgprs; ++i) { + params[i] = ctx->i32; + returns[i] = ctx->i32; + } + + for (unsigned i = 0; i < num_vgprs; ++i) { + params[num_sgprs + i] = ctx->i32; + returns[num_sgprs + i] = ctx->f32; + } + + /* Create the function. */ + si_create_function(ctx, "gs_prolog", returns, num_sgprs + num_vgprs, + params, num_sgprs + num_vgprs, num_sgprs - 1); + func = ctx->main_fn; + + /* Copy inputs to outputs. This should be no-op, as the registers match, + * but it will prevent the compiler from overwriting them unintentionally. + */ + ret = ctx->return_value; + for (unsigned i = 0; i < num_sgprs; i++) { + LLVMValueRef p = LLVMGetParam(func, i); + ret = LLVMBuildInsertValue(builder, ret, p, i, ""); + } + for (unsigned i = 0; i < num_vgprs; i++) { + LLVMValueRef p = LLVMGetParam(func, num_sgprs + i); + p = LLVMBuildBitCast(builder, p, ctx->f32, ""); + ret = LLVMBuildInsertValue(builder, ret, p, num_sgprs + i, ""); + } + + if (key->gs_prolog.states.tri_strip_adj_fix) { + /* Remap the input vertices for every other primitive. */ + const unsigned vtx_params[6] = { + num_sgprs, + num_sgprs + 1, + num_sgprs + 3, + num_sgprs + 4, + num_sgprs + 5, + num_sgprs + 6 + }; + LLVMValueRef prim_id, rotate; + + prim_id = LLVMGetParam(func, num_sgprs + 2); + rotate = LLVMBuildTrunc(builder, prim_id, ctx->i1, ""); + + for (unsigned i = 0; i < 6; ++i) { + LLVMValueRef base, rotated, actual; + base = LLVMGetParam(func, vtx_params[i]); + rotated = LLVMGetParam(func, vtx_params[(i + 4) % 6]); + actual = LLVMBuildSelect(builder, rotate, rotated, base, ""); + actual = LLVMBuildBitCast(builder, actual, ctx->f32, ""); + ret = LLVMBuildInsertValue(builder, ret, actual, vtx_params[i], ""); + } + } + + LLVMBuildRet(builder, ret); +} + +/** + * Given a list of shader part functions, build a wrapper function that + * runs them in sequence to form a monolithic shader. + */ +static void si_build_wrapper_function(struct si_shader_context *ctx, + LLVMValueRef *parts, + unsigned num_parts, + unsigned main_part) +{ + struct gallivm_state *gallivm = &ctx->gallivm; + LLVMBuilderRef builder = ctx->gallivm.builder; + /* PS epilog has one arg per color component */ + LLVMTypeRef param_types[48]; + LLVMValueRef out[48]; + LLVMTypeRef function_type; + unsigned num_params; + unsigned num_out; + MAYBE_UNUSED unsigned num_out_sgpr; /* used in debug checks */ + unsigned num_sgprs, num_vgprs; + unsigned last_sgpr_param; + unsigned gprs; + + for (unsigned i = 0; i < num_parts; ++i) { + lp_add_function_attr(parts[i], -1, LP_FUNC_ATTR_ALWAYSINLINE); + LLVMSetLinkage(parts[i], LLVMPrivateLinkage); + } + + /* The parameters of the wrapper function correspond to those of the + * first part in terms of SGPRs and VGPRs, but we use the types of the + * main part to get the right types. This is relevant for the + * dereferenceable attribute on descriptor table pointers. + */ + num_sgprs = 0; + num_vgprs = 0; + + function_type = LLVMGetElementType(LLVMTypeOf(parts[0])); + num_params = LLVMCountParamTypes(function_type); + + for (unsigned i = 0; i < num_params; ++i) { + LLVMValueRef param = LLVMGetParam(parts[0], i); + + if (ac_is_sgpr_param(param)) { + assert(num_vgprs == 0); + num_sgprs += llvm_get_type_size(LLVMTypeOf(param)) / 4; + } else { + num_vgprs += llvm_get_type_size(LLVMTypeOf(param)) / 4; + } + } + assert(num_vgprs + num_sgprs <= ARRAY_SIZE(param_types)); + + num_params = 0; + last_sgpr_param = 0; + gprs = 0; + while (gprs < num_sgprs + num_vgprs) { + LLVMValueRef param = LLVMGetParam(parts[main_part], num_params); + unsigned size; + + param_types[num_params] = LLVMTypeOf(param); + if (gprs < num_sgprs) + last_sgpr_param = num_params; + size = llvm_get_type_size(param_types[num_params]) / 4; + num_params++; + + assert(ac_is_sgpr_param(param) == (gprs < num_sgprs)); + assert(gprs + size <= num_sgprs + num_vgprs && + (gprs >= num_sgprs || gprs + size <= num_sgprs)); + + gprs += size; + } + + si_create_function(ctx, "wrapper", NULL, 0, param_types, num_params, last_sgpr_param); + + /* Record the arguments of the function as if they were an output of + * a previous part. + */ + num_out = 0; + num_out_sgpr = 0; + + for (unsigned i = 0; i < num_params; ++i) { + LLVMValueRef param = LLVMGetParam(ctx->main_fn, i); + LLVMTypeRef param_type = LLVMTypeOf(param); + LLVMTypeRef out_type = i <= last_sgpr_param ? ctx->i32 : ctx->f32; + unsigned size = llvm_get_type_size(param_type) / 4; + + if (size == 1) { + if (param_type != out_type) + param = LLVMBuildBitCast(builder, param, out_type, ""); + out[num_out++] = param; + } else { + LLVMTypeRef vector_type = LLVMVectorType(out_type, size); + + if (LLVMGetTypeKind(param_type) == LLVMPointerTypeKind) { + param = LLVMBuildPtrToInt(builder, param, ctx->i64, ""); + param_type = ctx->i64; + } + + if (param_type != vector_type) + param = LLVMBuildBitCast(builder, param, vector_type, ""); + + for (unsigned j = 0; j < size; ++j) + out[num_out++] = LLVMBuildExtractElement( + builder, param, LLVMConstInt(ctx->i32, j, 0), ""); + } + + if (i <= last_sgpr_param) + num_out_sgpr = num_out; + } + + /* Now chain the parts. */ + for (unsigned part = 0; part < num_parts; ++part) { + LLVMValueRef in[48]; + LLVMValueRef ret; + LLVMTypeRef ret_type; + unsigned out_idx = 0; + + num_params = LLVMCountParams(parts[part]); + assert(num_params <= ARRAY_SIZE(param_types)); + + /* Derive arguments for the next part from outputs of the + * previous one. + */ + for (unsigned param_idx = 0; param_idx < num_params; ++param_idx) { + LLVMValueRef param; + LLVMTypeRef param_type; + bool is_sgpr; + unsigned param_size; + LLVMValueRef arg = NULL; + + param = LLVMGetParam(parts[part], param_idx); + param_type = LLVMTypeOf(param); + param_size = llvm_get_type_size(param_type) / 4; + is_sgpr = ac_is_sgpr_param(param); + + if (is_sgpr) { +#if HAVE_LLVM < 0x0400 + LLVMRemoveAttribute(param, LLVMByValAttribute); +#else + unsigned kind_id = LLVMGetEnumAttributeKindForName("byval", 5); + LLVMRemoveEnumAttributeAtIndex(parts[part], param_idx + 1, kind_id); +#endif + lp_add_function_attr(parts[part], param_idx + 1, LP_FUNC_ATTR_INREG); + } + + assert(out_idx + param_size <= (is_sgpr ? num_out_sgpr : num_out)); + assert(is_sgpr || out_idx >= num_out_sgpr); + + if (param_size == 1) + arg = out[out_idx]; + else + arg = lp_build_gather_values(gallivm, &out[out_idx], param_size); + + if (LLVMTypeOf(arg) != param_type) { + if (LLVMGetTypeKind(param_type) == LLVMPointerTypeKind) { + arg = LLVMBuildBitCast(builder, arg, ctx->i64, ""); + arg = LLVMBuildIntToPtr(builder, arg, param_type, ""); + } else { + arg = LLVMBuildBitCast(builder, arg, param_type, ""); + } + } + + in[param_idx] = arg; + out_idx += param_size; + } + + ret = LLVMBuildCall(builder, parts[part], in, num_params, ""); + ret_type = LLVMTypeOf(ret); + + /* Extract the returned GPRs. */ + num_out = 0; + num_out_sgpr = 0; + + if (LLVMGetTypeKind(ret_type) != LLVMVoidTypeKind) { + assert(LLVMGetTypeKind(ret_type) == LLVMStructTypeKind); + + unsigned ret_size = LLVMCountStructElementTypes(ret_type); + + for (unsigned i = 0; i < ret_size; ++i) { + LLVMValueRef val = + LLVMBuildExtractValue(builder, ret, i, ""); + + out[num_out++] = val; + + if (LLVMTypeOf(val) == ctx->i32) { + assert(num_out_sgpr + 1 == num_out); + num_out_sgpr = num_out; + } + } + } + } + + LLVMBuildRetVoid(builder); +} + +int si_compile_tgsi_shader(struct si_screen *sscreen, + LLVMTargetMachineRef tm, + struct si_shader *shader, + bool is_monolithic, + struct pipe_debug_callback *debug) +{ + struct si_shader_selector *sel = shader->selector; + struct si_shader_context ctx; + struct lp_build_tgsi_context *bld_base; + LLVMModuleRef mod; + int r = -1; + + /* Dump TGSI code before doing TGSI->LLVM conversion in case the + * conversion fails. */ + if (r600_can_dump_shader(&sscreen->b, sel->info.processor) && + !(sscreen->b.debug_flags & DBG_NO_TGSI)) { + tgsi_dump(sel->tokens, 0); + si_dump_streamout(&sel->so); + } + + si_init_shader_ctx(&ctx, sscreen, shader, tm); + ctx.separate_prolog = !is_monolithic; + + memset(shader->info.vs_output_param_offset, EXP_PARAM_UNDEFINED, + sizeof(shader->info.vs_output_param_offset)); + + shader->info.uses_instanceid = sel->info.uses_instanceid; + + bld_base = &ctx.bld_base; + ctx.load_system_value = declare_system_value; + + if (!si_compile_tgsi_main(&ctx, shader)) { + si_llvm_dispose(&ctx); + return -1; + } + + if (is_monolithic && ctx.type == PIPE_SHADER_VERTEX) { + LLVMValueRef parts[3]; + bool need_prolog; + bool need_epilog; + + need_prolog = sel->info.num_inputs; + need_epilog = !shader->key.as_es && !shader->key.as_ls; + + parts[need_prolog ? 1 : 0] = ctx.main_fn; + + if (need_prolog) { + union si_shader_part_key prolog_key; + si_get_vs_prolog_key(shader, &prolog_key); + si_build_vs_prolog_function(&ctx, &prolog_key); + parts[0] = ctx.main_fn; + } + + if (need_epilog) { + union si_shader_part_key epilog_key; + si_get_vs_epilog_key(shader, &shader->key.part.vs.epilog, &epilog_key); + si_build_vs_epilog_function(&ctx, &epilog_key); + parts[need_prolog ? 2 : 1] = ctx.main_fn; + } + + si_build_wrapper_function(&ctx, parts, 1 + need_prolog + need_epilog, + need_prolog ? 1 : 0); + } else if (is_monolithic && ctx.type == PIPE_SHADER_TESS_CTRL) { + LLVMValueRef parts[2]; + union si_shader_part_key epilog_key; + + parts[0] = ctx.main_fn; + + memset(&epilog_key, 0, sizeof(epilog_key)); + epilog_key.tcs_epilog.states = shader->key.part.tcs.epilog; + si_build_tcs_epilog_function(&ctx, &epilog_key); + parts[1] = ctx.main_fn; + + si_build_wrapper_function(&ctx, parts, 2, 0); + } else if (is_monolithic && ctx.type == PIPE_SHADER_TESS_EVAL && + !shader->key.as_es) { + LLVMValueRef parts[2]; + union si_shader_part_key epilog_key; + + parts[0] = ctx.main_fn; + + si_get_vs_epilog_key(shader, &shader->key.part.tes.epilog, &epilog_key); + si_build_vs_epilog_function(&ctx, &epilog_key); + parts[1] = ctx.main_fn; + + si_build_wrapper_function(&ctx, parts, 2, 0); + } else if (is_monolithic && ctx.type == PIPE_SHADER_GEOMETRY) { + LLVMValueRef parts[2]; + union si_shader_part_key prolog_key; + + parts[1] = ctx.main_fn; + + memset(&prolog_key, 0, sizeof(prolog_key)); + prolog_key.gs_prolog.states = shader->key.part.gs.prolog; + si_build_gs_prolog_function(&ctx, &prolog_key); + parts[0] = ctx.main_fn; + + si_build_wrapper_function(&ctx, parts, 2, 1); + } else if (is_monolithic && ctx.type == PIPE_SHADER_FRAGMENT) { + LLVMValueRef parts[3]; + union si_shader_part_key prolog_key; + union si_shader_part_key epilog_key; + bool need_prolog; + + si_get_ps_prolog_key(shader, &prolog_key, false); + need_prolog = si_need_ps_prolog(&prolog_key); + + parts[need_prolog ? 1 : 0] = ctx.main_fn; + + if (need_prolog) { + si_build_ps_prolog_function(&ctx, &prolog_key); + parts[0] = ctx.main_fn; + } + + si_get_ps_epilog_key(shader, &epilog_key); + si_build_ps_epilog_function(&ctx, &epilog_key); + parts[need_prolog ? 2 : 1] = ctx.main_fn; + + si_build_wrapper_function(&ctx, parts, need_prolog ? 3 : 2, need_prolog ? 1 : 0); + } + + mod = bld_base->base.gallivm->module; + + /* Dump LLVM IR before any optimization passes */ + if (sscreen->b.debug_flags & DBG_PREOPT_IR && + r600_can_dump_shader(&sscreen->b, ctx.type)) + LLVMDumpModule(mod); + + si_llvm_finalize_module(&ctx, + r600_extra_shader_checks(&sscreen->b, ctx.type)); + + /* Post-optimization transformations and analysis. */ + si_eliminate_const_vs_outputs(&ctx); + + if ((debug && debug->debug_message) || + r600_can_dump_shader(&sscreen->b, ctx.type)) + si_count_scratch_private_memory(&ctx); + + /* Compile to bytecode. */ + r = si_compile_llvm(sscreen, &shader->binary, &shader->config, tm, + mod, debug, ctx.type, "TGSI shader"); + si_llvm_dispose(&ctx); if (r) { fprintf(stderr, "LLVM failed to compile shader\n"); - goto out; + return r; } - radeon_llvm_dispose(&ctx.radeon_bld); - /* Validate SGPR and VGPR usage for compute to detect compiler bugs. * LLVM 3.9svn has this bug. */ if (sel->type == PIPE_SHADER_COMPUTE) { - unsigned *props = sel->info.properties; unsigned wave_size = 64; unsigned max_vgprs = 256; unsigned max_sgprs = sscreen->b.chip_class >= VI ? 800 : 512; unsigned max_sgprs_per_wave = 128; - unsigned min_waves_per_cu = - DIV_ROUND_UP(props[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH] * - props[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT] * - props[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH], - wave_size); + unsigned max_block_threads = si_get_max_workgroup_size(shader); + unsigned min_waves_per_cu = DIV_ROUND_UP(max_block_threads, wave_size); unsigned min_waves_per_simd = DIV_ROUND_UP(min_waves_per_cu, 4); max_vgprs = max_vgprs / min_waves_per_simd; @@ -6653,22 +7712,7 @@ shader->info.num_input_vgprs += 1; } - if (ctx.type == PIPE_SHADER_GEOMETRY) { - shader->gs_copy_shader = CALLOC_STRUCT(si_shader); - shader->gs_copy_shader->selector = shader->selector; - ctx.shader = shader->gs_copy_shader; - if ((r = si_generate_gs_copy_shader(sscreen, &ctx, - shader, debug))) { - free(shader->gs_copy_shader); - shader->gs_copy_shader = NULL; - goto out; - } - } - -out: - for (int i = 0; i < SI_NUM_CONST_BUFFERS; i++) - FREE(ctx.constants[i]); - return r; + return 0; } /** @@ -6676,22 +7720,25 @@ * * \param sscreen screen * \param list list of shader parts of the same category + * \param type shader type * \param key shader part key + * \param prolog whether the part being requested is a prolog * \param tm LLVM target machine * \param debug debug callback - * \param compile the callback responsible for compilation + * \param build the callback responsible for building the main function * \return non-NULL on success */ static struct si_shader_part * si_get_shader_part(struct si_screen *sscreen, struct si_shader_part **list, + enum pipe_shader_type type, + bool prolog, union si_shader_part_key *key, LLVMTargetMachineRef tm, struct pipe_debug_callback *debug, - bool (*compile)(struct si_screen *, - LLVMTargetMachineRef, - struct pipe_debug_callback *, - struct si_shader_part *)) + void (*build)(struct si_shader_context *, + union si_shader_part_key *), + const char *name) { struct si_shader_part *result; @@ -6708,24 +7755,62 @@ /* Compile a new one. */ result = CALLOC_STRUCT(si_shader_part); result->key = *key; - if (!compile(sscreen, tm, debug, result)) { + + struct si_shader shader = {}; + struct si_shader_context ctx; + struct gallivm_state *gallivm = &ctx.gallivm; + + si_init_shader_ctx(&ctx, sscreen, &shader, tm); + ctx.type = type; + + switch (type) { + case PIPE_SHADER_VERTEX: + break; + case PIPE_SHADER_TESS_CTRL: + assert(!prolog); + shader.key.part.tcs.epilog = key->tcs_epilog.states; + break; + case PIPE_SHADER_GEOMETRY: + assert(prolog); + break; + case PIPE_SHADER_FRAGMENT: + if (prolog) + shader.key.part.ps.prolog = key->ps_prolog.states; + else + shader.key.part.ps.epilog = key->ps_epilog.states; + break; + default: + unreachable("bad shader part"); + } + + build(&ctx, key); + + /* Compile. */ + si_llvm_finalize_module(&ctx, + r600_extra_shader_checks(&sscreen->b, PIPE_SHADER_FRAGMENT)); + + if (si_compile_llvm(sscreen, &result->binary, &result->config, tm, + gallivm->module, debug, ctx.type, name)) { FREE(result); - pipe_mutex_unlock(sscreen->shader_parts_mutex); - return NULL; + result = NULL; + goto out; } result->next = *list; *list = result; + +out: + si_llvm_dispose(&ctx); pipe_mutex_unlock(sscreen->shader_parts_mutex); return result; } /** - * Create a vertex shader prolog. + * Build the vertex shader prolog function. * * The inputs are the same as VS (a lot of SGPRs and 4 VGPR system values). * All inputs are returned unmodified. The vertex load indices are - * stored after them, which will used by the API VS for fetching inputs. + * stored after them, which will be used by the API VS for fetching inputs. * * For example, the expected outputs for instance_divisors[] = {0, 1, 2} are: * input_v0, @@ -6736,24 +7821,16 @@ * (InstanceID + StartInstance), * (InstanceID / 2 + StartInstance) */ -static bool si_compile_vs_prolog(struct si_screen *sscreen, - LLVMTargetMachineRef tm, - struct pipe_debug_callback *debug, - struct si_shader_part *out) +static void si_build_vs_prolog_function(struct si_shader_context *ctx, + union si_shader_part_key *key) { - union si_shader_part_key *key = &out->key; - struct si_shader shader = {}; - struct si_shader_context ctx; - struct gallivm_state *gallivm = &ctx.radeon_bld.gallivm; + struct gallivm_state *gallivm = &ctx->gallivm; LLVMTypeRef *params, *returns; LLVMValueRef ret, func; int last_sgpr, num_params, num_returns, i; - bool status = true; - si_init_shader_ctx(&ctx, sscreen, &shader, tm); - ctx.type = PIPE_SHADER_VERTEX; - ctx.param_vertex_id = key->vs_prolog.num_input_sgprs; - ctx.param_instance_id = key->vs_prolog.num_input_sgprs + 3; + ctx->param_vertex_id = key->vs_prolog.num_input_sgprs; + ctx->param_instance_id = key->vs_prolog.num_input_sgprs + 3; /* 4 preloaded VGPRs + vertex load indices as prolog outputs */ params = alloca((key->vs_prolog.num_input_sgprs + 4) * @@ -6767,37 +7844,37 @@ /* Declare input and output SGPRs. */ num_params = 0; for (i = 0; i < key->vs_prolog.num_input_sgprs; i++) { - params[num_params++] = ctx.i32; - returns[num_returns++] = ctx.i32; + params[num_params++] = ctx->i32; + returns[num_returns++] = ctx->i32; } last_sgpr = num_params - 1; /* 4 preloaded VGPRs (outputs must be floats) */ for (i = 0; i < 4; i++) { - params[num_params++] = ctx.i32; - returns[num_returns++] = ctx.f32; + params[num_params++] = ctx->i32; + returns[num_returns++] = ctx->f32; } /* Vertex load indices. */ for (i = 0; i <= key->vs_prolog.last_input; i++) - returns[num_returns++] = ctx.f32; + returns[num_returns++] = ctx->f32; /* Create the function. */ - si_create_function(&ctx, returns, num_returns, params, - num_params, -1, last_sgpr); - func = ctx.radeon_bld.main_fn; + si_create_function(ctx, "vs_prolog", returns, num_returns, params, + num_params, last_sgpr); + func = ctx->main_fn; /* Copy inputs to outputs. This should be no-op, as the registers match, * but it will prevent the compiler from overwriting them unintentionally. */ - ret = ctx.return_value; + ret = ctx->return_value; for (i = 0; i < key->vs_prolog.num_input_sgprs; i++) { LLVMValueRef p = LLVMGetParam(func, i); ret = LLVMBuildInsertValue(gallivm->builder, ret, p, i, ""); } for (i = num_params - 4; i < num_params; i++) { LLVMValueRef p = LLVMGetParam(func, i); - p = LLVMBuildBitCast(gallivm->builder, p, ctx.f32, ""); + p = LLVMBuildBitCast(gallivm->builder, p, ctx->f32, ""); ret = LLVMBuildInsertValue(gallivm->builder, ret, p, i, ""); } @@ -6808,36 +7885,26 @@ if (divisor) { /* InstanceID / Divisor + StartInstance */ - index = get_instance_index_for_fetch(&ctx.radeon_bld, + index = get_instance_index_for_fetch(ctx, SI_SGPR_START_INSTANCE, divisor); } else { /* VertexID + BaseVertex */ index = LLVMBuildAdd(gallivm->builder, - LLVMGetParam(func, ctx.param_vertex_id), + LLVMGetParam(func, ctx->param_vertex_id), LLVMGetParam(func, SI_SGPR_BASE_VERTEX), ""); } - index = LLVMBuildBitCast(gallivm->builder, index, ctx.f32, ""); + index = LLVMBuildBitCast(gallivm->builder, index, ctx->f32, ""); ret = LLVMBuildInsertValue(gallivm->builder, ret, index, num_params++, ""); } - /* Compile. */ - LLVMBuildRet(gallivm->builder, ret); - radeon_llvm_finalize_module(&ctx.radeon_bld); - - if (si_compile_llvm(sscreen, &out->binary, &out->config, tm, - gallivm->module, debug, ctx.type, - "Vertex Shader Prolog")) - status = false; - - radeon_llvm_dispose(&ctx.radeon_bld); - return status; + si_llvm_build_ret(ctx, ret); } /** - * Compile the vertex shader epilog. This is also used by the tessellation + * Build the vertex shader epilog function. This is also used by the tessellation * evaluation shader compiled as VS. * * The input is PrimitiveID. @@ -6845,21 +7912,13 @@ * If PrimitiveID is required by the pixel shader, export it. * Otherwise, do nothing. */ -static bool si_compile_vs_epilog(struct si_screen *sscreen, - LLVMTargetMachineRef tm, - struct pipe_debug_callback *debug, - struct si_shader_part *out) +static void si_build_vs_epilog_function(struct si_shader_context *ctx, + union si_shader_part_key *key) { - union si_shader_part_key *key = &out->key; - struct si_shader_context ctx; - struct gallivm_state *gallivm = &ctx.radeon_bld.gallivm; - struct lp_build_tgsi_context *bld_base = &ctx.radeon_bld.soa.bld_base; + struct gallivm_state *gallivm = &ctx->gallivm; + struct lp_build_tgsi_context *bld_base = &ctx->bld_base; LLVMTypeRef params[5]; int num_params, i; - bool status = true; - - si_init_shader_ctx(&ctx, sscreen, NULL, tm); - ctx.type = PIPE_SHADER_VERTEX; /* Declare input VGPRs. */ num_params = key->vs_epilog.states.export_prim_id ? @@ -6867,11 +7926,10 @@ assert(num_params <= ARRAY_SIZE(params)); for (i = 0; i < num_params; i++) - params[i] = ctx.f32; + params[i] = ctx->f32; /* Create the function. */ - si_create_function(&ctx, NULL, 0, params, num_params, - -1, -1); + si_create_function(ctx, "vs_epilog", NULL, 0, params, num_params, -1); /* Emit exports. */ if (key->vs_epilog.states.export_prim_id) { @@ -6885,28 +7943,18 @@ args[3] = lp_build_const_int32(base->gallivm, V_008DFC_SQ_EXP_PARAM + key->vs_epilog.prim_id_param_offset); args[4] = uint->zero; /* COMPR flag (0 = 32-bit export) */ - args[5] = LLVMGetParam(ctx.radeon_bld.main_fn, + args[5] = LLVMGetParam(ctx->main_fn, VS_EPILOG_PRIMID_LOC); /* X */ - args[6] = uint->undef; /* Y */ - args[7] = uint->undef; /* Z */ - args[8] = uint->undef; /* W */ + args[6] = base->undef; /* Y */ + args[7] = base->undef; /* Z */ + args[8] = base->undef; /* W */ lp_build_intrinsic(base->gallivm->builder, "llvm.SI.export", LLVMVoidTypeInContext(base->gallivm->context), args, 9, 0); } - /* Compile. */ - LLVMBuildRet(gallivm->builder, ctx.return_value); - radeon_llvm_finalize_module(&ctx.radeon_bld); - - if (si_compile_llvm(sscreen, &out->binary, &out->config, tm, - gallivm->module, debug, ctx.type, - "Vertex Shader Epilog")) - status = false; - - radeon_llvm_dispose(&ctx.radeon_bld); - return status; + LLVMBuildRetVoid(gallivm->builder); } /** @@ -6920,22 +7968,13 @@ { union si_shader_part_key epilog_key; - memset(&epilog_key, 0, sizeof(epilog_key)); - epilog_key.vs_epilog.states = *states; - - /* Set up the PrimitiveID output. */ - if (shader->key.vs.epilog.export_prim_id) { - unsigned index = shader->selector->info.num_outputs; - unsigned offset = shader->info.nr_param_exports++; - - epilog_key.vs_epilog.prim_id_param_offset = offset; - assert(index < ARRAY_SIZE(shader->info.vs_output_param_offset)); - shader->info.vs_output_param_offset[index] = offset; - } + si_get_vs_epilog_key(shader, states, &epilog_key); shader->epilog = si_get_shader_part(sscreen, &sscreen->vs_epilogs, + PIPE_SHADER_VERTEX, true, &epilog_key, tm, debug, - si_compile_vs_epilog); + si_build_vs_epilog_function, + "Vertex Shader Epilog"); return shader->epilog != NULL; } @@ -6949,35 +7988,28 @@ { struct tgsi_shader_info *info = &shader->selector->info; union si_shader_part_key prolog_key; - unsigned i; /* Get the prolog. */ - memset(&prolog_key, 0, sizeof(prolog_key)); - prolog_key.vs_prolog.states = shader->key.vs.prolog; - prolog_key.vs_prolog.num_input_sgprs = shader->info.num_input_sgprs; - prolog_key.vs_prolog.last_input = MAX2(1, info->num_inputs) - 1; + si_get_vs_prolog_key(shader, &prolog_key); /* The prolog is a no-op if there are no inputs. */ if (info->num_inputs) { shader->prolog = si_get_shader_part(sscreen, &sscreen->vs_prologs, + PIPE_SHADER_VERTEX, true, &prolog_key, tm, debug, - si_compile_vs_prolog); + si_build_vs_prolog_function, + "Vertex Shader Prolog"); if (!shader->prolog) return false; } /* Get the epilog. */ - if (!shader->key.vs.as_es && !shader->key.vs.as_ls && + if (!shader->key.as_es && !shader->key.as_ls && !si_get_vs_epilog(sscreen, tm, shader, debug, - &shader->key.vs.epilog)) + &shader->key.part.vs.epilog)) return false; - /* Set the instanceID flag. */ - for (i = 0; i < info->num_inputs; i++) - if (prolog_key.vs_prolog.states.instance_divisors[i]) - shader->info.uses_instanceid = true; - return true; } @@ -6989,79 +8021,57 @@ struct si_shader *shader, struct pipe_debug_callback *debug) { - if (shader->key.tes.as_es) + if (shader->key.as_es) return true; /* TES compiled as VS. */ return si_get_vs_epilog(sscreen, tm, shader, debug, - &shader->key.tes.epilog); + &shader->key.part.tes.epilog); } /** - * Compile the TCS epilog. This writes tesselation factors to memory based on - * the output primitive type of the tesselator (determined by TES). + * Compile the TCS epilog function. This writes tesselation factors to memory + * based on the output primitive type of the tesselator (determined by TES). */ -static bool si_compile_tcs_epilog(struct si_screen *sscreen, - LLVMTargetMachineRef tm, - struct pipe_debug_callback *debug, - struct si_shader_part *out) +static void si_build_tcs_epilog_function(struct si_shader_context *ctx, + union si_shader_part_key *key) { - union si_shader_part_key *key = &out->key; - struct si_shader shader = {}; - struct si_shader_context ctx; - struct gallivm_state *gallivm = &ctx.radeon_bld.gallivm; - struct lp_build_tgsi_context *bld_base = &ctx.radeon_bld.soa.bld_base; + struct gallivm_state *gallivm = &ctx->gallivm; + struct lp_build_tgsi_context *bld_base = &ctx->bld_base; LLVMTypeRef params[16]; LLVMValueRef func; - int last_array_pointer, last_sgpr, num_params; - bool status = true; - - si_init_shader_ctx(&ctx, sscreen, &shader, tm); - ctx.type = PIPE_SHADER_TESS_CTRL; - shader.key.tcs.epilog = key->tcs_epilog.states; + int last_sgpr, num_params; /* Declare inputs. Only RW_BUFFERS and TESS_FACTOR_OFFSET are used. */ - params[SI_PARAM_RW_BUFFERS] = const_array(ctx.v16i8, SI_NUM_RW_BUFFERS); - last_array_pointer = SI_PARAM_RW_BUFFERS; - params[SI_PARAM_CONST_BUFFERS] = ctx.i64; - params[SI_PARAM_SAMPLERS] = ctx.i64; - params[SI_PARAM_IMAGES] = ctx.i64; - params[SI_PARAM_SHADER_BUFFERS] = ctx.i64; - params[SI_PARAM_TCS_OFFCHIP_LAYOUT] = ctx.i32; - params[SI_PARAM_TCS_OUT_OFFSETS] = ctx.i32; - params[SI_PARAM_TCS_OUT_LAYOUT] = ctx.i32; - params[SI_PARAM_TCS_IN_LAYOUT] = ctx.i32; - params[ctx.param_oc_lds = SI_PARAM_TCS_OC_LDS] = ctx.i32; - params[SI_PARAM_TESS_FACTOR_OFFSET] = ctx.i32; + params[SI_PARAM_RW_BUFFERS] = const_array(ctx->v16i8, SI_NUM_RW_BUFFERS); + params[SI_PARAM_CONST_BUFFERS] = ctx->i64; + params[SI_PARAM_SAMPLERS] = ctx->i64; + params[SI_PARAM_IMAGES] = ctx->i64; + params[SI_PARAM_SHADER_BUFFERS] = ctx->i64; + params[SI_PARAM_TCS_OFFCHIP_LAYOUT] = ctx->i32; + params[SI_PARAM_TCS_OUT_OFFSETS] = ctx->i32; + params[SI_PARAM_TCS_OUT_LAYOUT] = ctx->i32; + params[SI_PARAM_TCS_IN_LAYOUT] = ctx->i32; + params[ctx->param_oc_lds = SI_PARAM_TCS_OC_LDS] = ctx->i32; + params[SI_PARAM_TESS_FACTOR_OFFSET] = ctx->i32; last_sgpr = SI_PARAM_TESS_FACTOR_OFFSET; num_params = last_sgpr + 1; - params[num_params++] = ctx.i32; /* patch index within the wave (REL_PATCH_ID) */ - params[num_params++] = ctx.i32; /* invocation ID within the patch */ - params[num_params++] = ctx.i32; /* LDS offset where tess factors should be loaded from */ + params[num_params++] = ctx->i32; /* patch index within the wave (REL_PATCH_ID) */ + params[num_params++] = ctx->i32; /* invocation ID within the patch */ + params[num_params++] = ctx->i32; /* LDS offset where tess factors should be loaded from */ /* Create the function. */ - si_create_function(&ctx, NULL, 0, params, num_params, - last_array_pointer, last_sgpr); - declare_tess_lds(&ctx); - func = ctx.radeon_bld.main_fn; + si_create_function(ctx, "tcs_epilog", NULL, 0, params, num_params, last_sgpr); + declare_tess_lds(ctx); + func = ctx->main_fn; si_write_tess_factors(bld_base, LLVMGetParam(func, last_sgpr + 1), LLVMGetParam(func, last_sgpr + 2), LLVMGetParam(func, last_sgpr + 3)); - /* Compile. */ - LLVMBuildRet(gallivm->builder, ctx.return_value); - radeon_llvm_finalize_module(&ctx.radeon_bld); - - if (si_compile_llvm(sscreen, &out->binary, &out->config, tm, - gallivm->module, debug, ctx.type, - "Tessellation Control Shader Epilog")) - status = false; - - radeon_llvm_dispose(&ctx.radeon_bld); - return status; + LLVMBuildRetVoid(gallivm->builder); } /** @@ -7076,16 +8086,42 @@ /* Get the epilog. */ memset(&epilog_key, 0, sizeof(epilog_key)); - epilog_key.tcs_epilog.states = shader->key.tcs.epilog; + epilog_key.tcs_epilog.states = shader->key.part.tcs.epilog; shader->epilog = si_get_shader_part(sscreen, &sscreen->tcs_epilogs, + PIPE_SHADER_TESS_CTRL, false, &epilog_key, tm, debug, - si_compile_tcs_epilog); + si_build_tcs_epilog_function, + "Tessellation Control Shader Epilog"); return shader->epilog != NULL; } /** - * Compile the pixel shader prolog. This handles: + * Select and compile (or reuse) GS parts (prolog). + */ +static bool si_shader_select_gs_parts(struct si_screen *sscreen, + LLVMTargetMachineRef tm, + struct si_shader *shader, + struct pipe_debug_callback *debug) +{ + union si_shader_part_key prolog_key; + + if (!shader->key.part.gs.prolog.tri_strip_adj_fix) + return true; + + memset(&prolog_key, 0, sizeof(prolog_key)); + prolog_key.gs_prolog.states = shader->key.part.gs.prolog; + + shader->prolog = si_get_shader_part(sscreen, &sscreen->gs_prologs, + PIPE_SHADER_GEOMETRY, true, + &prolog_key, tm, debug, + si_build_gs_prolog_function, + "Geometry Shader Prolog"); + return shader->prolog != NULL; +} + +/** + * Build the pixel shader prolog function. This handles: * - two-side color selection and interpolation * - overriding interpolation parameters for the API PS * - polygon stippling @@ -7094,23 +8130,15 @@ * overriden by other states. (e.g. per-sample interpolation) * Interpolated colors are stored after the preloaded VGPRs. */ -static bool si_compile_ps_prolog(struct si_screen *sscreen, - LLVMTargetMachineRef tm, - struct pipe_debug_callback *debug, - struct si_shader_part *out) +static void si_build_ps_prolog_function(struct si_shader_context *ctx, + union si_shader_part_key *key) { - union si_shader_part_key *key = &out->key; - struct si_shader shader = {}; - struct si_shader_context ctx; - struct gallivm_state *gallivm = &ctx.radeon_bld.gallivm; + struct gallivm_state *gallivm = &ctx->gallivm; LLVMTypeRef *params; LLVMValueRef ret, func; int last_sgpr, num_params, num_returns, i, num_color_channels; - bool status = true; - si_init_shader_ctx(&ctx, sscreen, &shader, tm); - ctx.type = PIPE_SHADER_FRAGMENT; - shader.key.ps.prolog = key->ps_prolog.states; + assert(si_need_ps_prolog(key)); /* Number of inputs + 8 color elements. */ params = alloca((key->ps_prolog.num_input_sgprs + @@ -7120,27 +8148,27 @@ /* Declare inputs. */ num_params = 0; for (i = 0; i < key->ps_prolog.num_input_sgprs; i++) - params[num_params++] = ctx.i32; + params[num_params++] = ctx->i32; last_sgpr = num_params - 1; for (i = 0; i < key->ps_prolog.num_input_vgprs; i++) - params[num_params++] = ctx.f32; + params[num_params++] = ctx->f32; /* Declare outputs (same as inputs + add colors if needed) */ num_returns = num_params; num_color_channels = util_bitcount(key->ps_prolog.colors_read); for (i = 0; i < num_color_channels; i++) - params[num_returns++] = ctx.f32; + params[num_returns++] = ctx->f32; /* Create the function. */ - si_create_function(&ctx, params, num_returns, params, - num_params, -1, last_sgpr); - func = ctx.radeon_bld.main_fn; + si_create_function(ctx, "ps_prolog", params, num_returns, params, + num_params, last_sgpr); + func = ctx->main_fn; /* Copy inputs to outputs. This should be no-op, as the registers match, * but it will prevent the compiler from overwriting them unintentionally. */ - ret = ctx.return_value; + ret = ctx->return_value; for (i = 0; i < num_params; i++) { LLVMValueRef p = LLVMGetParam(func, i); ret = LLVMBuildInsertValue(gallivm->builder, ret, p, i, ""); @@ -7157,11 +8185,128 @@ ptr[0] = LLVMGetParam(func, SI_SGPR_RW_BUFFERS); ptr[1] = LLVMGetParam(func, SI_SGPR_RW_BUFFERS_HI); list = lp_build_gather_values(gallivm, ptr, 2); - list = LLVMBuildBitCast(gallivm->builder, list, ctx.i64, ""); + list = LLVMBuildBitCast(gallivm->builder, list, ctx->i64, ""); list = LLVMBuildIntToPtr(gallivm->builder, list, - const_array(ctx.v16i8, SI_NUM_RW_BUFFERS), ""); + const_array(ctx->v16i8, SI_NUM_RW_BUFFERS), ""); + + si_llvm_emit_polygon_stipple(ctx, list, pos); + } + + if (key->ps_prolog.states.bc_optimize_for_persp || + key->ps_prolog.states.bc_optimize_for_linear) { + unsigned i, base = key->ps_prolog.num_input_sgprs; + LLVMValueRef center[2], centroid[2], tmp, bc_optimize; + + /* The shader should do: if (PRIM_MASK[31]) CENTROID = CENTER; + * The hw doesn't compute CENTROID if the whole wave only + * contains fully-covered quads. + * + * PRIM_MASK is after user SGPRs. + */ + bc_optimize = LLVMGetParam(func, SI_PS_NUM_USER_SGPR); + bc_optimize = LLVMBuildLShr(gallivm->builder, bc_optimize, + LLVMConstInt(ctx->i32, 31, 0), ""); + bc_optimize = LLVMBuildTrunc(gallivm->builder, bc_optimize, + ctx->i1, ""); + + if (key->ps_prolog.states.bc_optimize_for_persp) { + /* Read PERSP_CENTER. */ + for (i = 0; i < 2; i++) + center[i] = LLVMGetParam(func, base + 2 + i); + /* Read PERSP_CENTROID. */ + for (i = 0; i < 2; i++) + centroid[i] = LLVMGetParam(func, base + 4 + i); + /* Select PERSP_CENTROID. */ + for (i = 0; i < 2; i++) { + tmp = LLVMBuildSelect(gallivm->builder, bc_optimize, + center[i], centroid[i], ""); + ret = LLVMBuildInsertValue(gallivm->builder, ret, + tmp, base + 4 + i, ""); + } + } + if (key->ps_prolog.states.bc_optimize_for_linear) { + /* Read LINEAR_CENTER. */ + for (i = 0; i < 2; i++) + center[i] = LLVMGetParam(func, base + 8 + i); + /* Read LINEAR_CENTROID. */ + for (i = 0; i < 2; i++) + centroid[i] = LLVMGetParam(func, base + 10 + i); + /* Select LINEAR_CENTROID. */ + for (i = 0; i < 2; i++) { + tmp = LLVMBuildSelect(gallivm->builder, bc_optimize, + center[i], centroid[i], ""); + ret = LLVMBuildInsertValue(gallivm->builder, ret, + tmp, base + 10 + i, ""); + } + } + } + + /* Force per-sample interpolation. */ + if (key->ps_prolog.states.force_persp_sample_interp) { + unsigned i, base = key->ps_prolog.num_input_sgprs; + LLVMValueRef persp_sample[2]; + + /* Read PERSP_SAMPLE. */ + for (i = 0; i < 2; i++) + persp_sample[i] = LLVMGetParam(func, base + i); + /* Overwrite PERSP_CENTER. */ + for (i = 0; i < 2; i++) + ret = LLVMBuildInsertValue(gallivm->builder, ret, + persp_sample[i], base + 2 + i, ""); + /* Overwrite PERSP_CENTROID. */ + for (i = 0; i < 2; i++) + ret = LLVMBuildInsertValue(gallivm->builder, ret, + persp_sample[i], base + 4 + i, ""); + } + if (key->ps_prolog.states.force_linear_sample_interp) { + unsigned i, base = key->ps_prolog.num_input_sgprs; + LLVMValueRef linear_sample[2]; + + /* Read LINEAR_SAMPLE. */ + for (i = 0; i < 2; i++) + linear_sample[i] = LLVMGetParam(func, base + 6 + i); + /* Overwrite LINEAR_CENTER. */ + for (i = 0; i < 2; i++) + ret = LLVMBuildInsertValue(gallivm->builder, ret, + linear_sample[i], base + 8 + i, ""); + /* Overwrite LINEAR_CENTROID. */ + for (i = 0; i < 2; i++) + ret = LLVMBuildInsertValue(gallivm->builder, ret, + linear_sample[i], base + 10 + i, ""); + } + + /* Force center interpolation. */ + if (key->ps_prolog.states.force_persp_center_interp) { + unsigned i, base = key->ps_prolog.num_input_sgprs; + LLVMValueRef persp_center[2]; + + /* Read PERSP_CENTER. */ + for (i = 0; i < 2; i++) + persp_center[i] = LLVMGetParam(func, base + 2 + i); + /* Overwrite PERSP_SAMPLE. */ + for (i = 0; i < 2; i++) + ret = LLVMBuildInsertValue(gallivm->builder, ret, + persp_center[i], base + i, ""); + /* Overwrite PERSP_CENTROID. */ + for (i = 0; i < 2; i++) + ret = LLVMBuildInsertValue(gallivm->builder, ret, + persp_center[i], base + 4 + i, ""); + } + if (key->ps_prolog.states.force_linear_center_interp) { + unsigned i, base = key->ps_prolog.num_input_sgprs; + LLVMValueRef linear_center[2]; - si_llvm_emit_polygon_stipple(&ctx, list, pos); + /* Read LINEAR_CENTER. */ + for (i = 0; i < 2; i++) + linear_center[i] = LLVMGetParam(func, base + 8 + i); + /* Overwrite LINEAR_SAMPLE. */ + for (i = 0; i < 2; i++) + ret = LLVMBuildInsertValue(gallivm->builder, ret, + linear_center[i], base + 6 + i, ""); + /* Overwrite LINEAR_CENTROID. */ + for (i = 0; i < 2; i++) + ret = LLVMBuildInsertValue(gallivm->builder, ret, + linear_center[i], base + 10 + i, ""); } /* Interpolate colors. */ @@ -7180,11 +8325,12 @@ unsigned interp_vgpr = key->ps_prolog.num_input_sgprs + key->ps_prolog.color_interp_vgpr_index[i]; - interp[0] = LLVMGetParam(func, interp_vgpr); - interp[1] = LLVMGetParam(func, interp_vgpr + 1); + /* Get the (i,j) updated by bc_optimize handling. */ + interp[0] = LLVMBuildExtractValue(gallivm->builder, ret, + interp_vgpr, ""); + interp[1] = LLVMBuildExtractValue(gallivm->builder, ret, + interp_vgpr + 1, ""); interp_ij = lp_build_gather_values(gallivm, interp, 2); - interp_ij = LLVMBuildBitCast(gallivm->builder, interp_ij, - ctx.v2i32, ""); } /* Use the absolute location of the input. */ @@ -7192,10 +8338,10 @@ if (key->ps_prolog.states.color_two_side) { face = LLVMGetParam(func, face_vgpr); - face = LLVMBuildBitCast(gallivm->builder, face, ctx.i32, ""); + face = LLVMBuildBitCast(gallivm->builder, face, ctx->i32, ""); } - interp_fs_input(&ctx, + interp_fs_input(ctx, key->ps_prolog.color_attr_index[i], TGSI_SEMANTIC_COLOR, i, key->ps_prolog.num_interp_inputs, @@ -7209,85 +8355,36 @@ } } - /* Force per-sample interpolation. */ - if (key->ps_prolog.states.force_persample_interp) { - unsigned i, base = key->ps_prolog.num_input_sgprs; - LLVMValueRef persp_sample[2], linear_sample[2]; - - /* Read PERSP_SAMPLE. */ - for (i = 0; i < 2; i++) - persp_sample[i] = LLVMGetParam(func, base + i); - /* Overwrite PERSP_CENTER. */ - for (i = 0; i < 2; i++) - ret = LLVMBuildInsertValue(gallivm->builder, ret, - persp_sample[i], base + 2 + i, ""); - /* Overwrite PERSP_CENTROID. */ - for (i = 0; i < 2; i++) - ret = LLVMBuildInsertValue(gallivm->builder, ret, - persp_sample[i], base + 4 + i, ""); - /* Read LINEAR_SAMPLE. */ - for (i = 0; i < 2; i++) - linear_sample[i] = LLVMGetParam(func, base + 6 + i); - /* Overwrite LINEAR_CENTER. */ - for (i = 0; i < 2; i++) - ret = LLVMBuildInsertValue(gallivm->builder, ret, - linear_sample[i], base + 8 + i, ""); - /* Overwrite LINEAR_CENTROID. */ - for (i = 0; i < 2; i++) - ret = LLVMBuildInsertValue(gallivm->builder, ret, - linear_sample[i], base + 10 + i, ""); - } - /* Tell LLVM to insert WQM instruction sequence when needed. */ if (key->ps_prolog.wqm) { LLVMAddTargetDependentFunctionAttr(func, "amdgpu-ps-wqm-outputs", ""); } - /* Compile. */ - LLVMBuildRet(gallivm->builder, ret); - radeon_llvm_finalize_module(&ctx.radeon_bld); - - if (si_compile_llvm(sscreen, &out->binary, &out->config, tm, - gallivm->module, debug, ctx.type, - "Fragment Shader Prolog")) - status = false; - - radeon_llvm_dispose(&ctx.radeon_bld); - return status; + si_llvm_build_ret(ctx, ret); } /** - * Compile the pixel shader epilog. This handles everything that must be + * Build the pixel shader epilog function. This handles everything that must be * emulated for pixel shader exports. (alpha-test, format conversions, etc) */ -static bool si_compile_ps_epilog(struct si_screen *sscreen, - LLVMTargetMachineRef tm, - struct pipe_debug_callback *debug, - struct si_shader_part *out) +static void si_build_ps_epilog_function(struct si_shader_context *ctx, + union si_shader_part_key *key) { - union si_shader_part_key *key = &out->key; - struct si_shader shader = {}; - struct si_shader_context ctx; - struct gallivm_state *gallivm = &ctx.radeon_bld.gallivm; - struct lp_build_tgsi_context *bld_base = &ctx.radeon_bld.soa.bld_base; + struct gallivm_state *gallivm = &ctx->gallivm; + struct lp_build_tgsi_context *bld_base = &ctx->bld_base; LLVMTypeRef params[16+8*4+3]; LLVMValueRef depth = NULL, stencil = NULL, samplemask = NULL; - int last_array_pointer, last_sgpr, num_params, i; - bool status = true; - - si_init_shader_ctx(&ctx, sscreen, &shader, tm); - ctx.type = PIPE_SHADER_FRAGMENT; - shader.key.ps.epilog = key->ps_epilog.states; + int last_sgpr, num_params, i; + struct si_ps_exports exp = {}; /* Declare input SGPRs. */ - params[SI_PARAM_RW_BUFFERS] = ctx.i64; - params[SI_PARAM_CONST_BUFFERS] = ctx.i64; - params[SI_PARAM_SAMPLERS] = ctx.i64; - params[SI_PARAM_IMAGES] = ctx.i64; - params[SI_PARAM_SHADER_BUFFERS] = ctx.i64; - params[SI_PARAM_ALPHA_REF] = ctx.f32; - last_array_pointer = -1; + params[SI_PARAM_RW_BUFFERS] = ctx->i64; + params[SI_PARAM_CONST_BUFFERS] = ctx->i64; + params[SI_PARAM_SAMPLERS] = ctx->i64; + params[SI_PARAM_IMAGES] = ctx->i64; + params[SI_PARAM_SHADER_BUFFERS] = ctx->i64; + params[SI_PARAM_ALPHA_REF] = ctx->f32; last_sgpr = SI_PARAM_ALPHA_REF; /* Declare input VGPRs. */ @@ -7303,13 +8400,12 @@ assert(num_params <= ARRAY_SIZE(params)); for (i = last_sgpr + 1; i < num_params; i++) - params[i] = ctx.f32; + params[i] = ctx->f32; /* Create the function. */ - si_create_function(&ctx, NULL, 0, params, num_params, - last_array_pointer, last_sgpr); + si_create_function(ctx, "ps_epilog", NULL, 0, params, num_params, last_sgpr); /* Disable elimination of unused inputs. */ - radeon_llvm_add_attribute(ctx.radeon_bld.main_fn, + si_llvm_add_attribute(ctx->main_fn, "InitialPSInputAddr", 0xffffff); /* Process colors. */ @@ -7342,37 +8438,31 @@ int mrt = u_bit_scan(&colors_written); for (i = 0; i < 4; i++) - color[i] = LLVMGetParam(ctx.radeon_bld.main_fn, vgpr++); + color[i] = LLVMGetParam(ctx->main_fn, vgpr++); si_export_mrt_color(bld_base, color, mrt, num_params - 1, - mrt == last_color_export); + mrt == last_color_export, &exp); } /* Process depth, stencil, samplemask. */ if (key->ps_epilog.writes_z) - depth = LLVMGetParam(ctx.radeon_bld.main_fn, vgpr++); + depth = LLVMGetParam(ctx->main_fn, vgpr++); if (key->ps_epilog.writes_stencil) - stencil = LLVMGetParam(ctx.radeon_bld.main_fn, vgpr++); + stencil = LLVMGetParam(ctx->main_fn, vgpr++); if (key->ps_epilog.writes_samplemask) - samplemask = LLVMGetParam(ctx.radeon_bld.main_fn, vgpr++); + samplemask = LLVMGetParam(ctx->main_fn, vgpr++); if (depth || stencil || samplemask) - si_export_mrt_z(bld_base, depth, stencil, samplemask); + si_export_mrt_z(bld_base, depth, stencil, samplemask, &exp); else if (last_color_export == -1) si_export_null(bld_base); + if (exp.num) + si_emit_ps_exports(ctx, &exp); + /* Compile. */ LLVMBuildRetVoid(gallivm->builder); - radeon_llvm_finalize_module(&ctx.radeon_bld); - - if (si_compile_llvm(sscreen, &out->binary, &out->config, tm, - gallivm->module, debug, ctx.type, - "Fragment Shader Epilog")) - status = false; - - radeon_llvm_dispose(&ctx.radeon_bld); - return status; } /** @@ -7383,143 +8473,70 @@ struct si_shader *shader, struct pipe_debug_callback *debug) { - struct tgsi_shader_info *info = &shader->selector->info; union si_shader_part_key prolog_key; union si_shader_part_key epilog_key; - unsigned i; /* Get the prolog. */ - memset(&prolog_key, 0, sizeof(prolog_key)); - prolog_key.ps_prolog.states = shader->key.ps.prolog; - prolog_key.ps_prolog.colors_read = info->colors_read; - prolog_key.ps_prolog.num_input_sgprs = shader->info.num_input_sgprs; - prolog_key.ps_prolog.num_input_vgprs = shader->info.num_input_vgprs; - prolog_key.ps_prolog.wqm = info->uses_derivatives && - (prolog_key.ps_prolog.colors_read || - prolog_key.ps_prolog.states.force_persample_interp); - - if (info->colors_read) { - unsigned *color = shader->selector->color_attr_index; - - if (shader->key.ps.prolog.color_two_side) { - /* BCOLORs are stored after the last input. */ - prolog_key.ps_prolog.num_interp_inputs = info->num_inputs; - prolog_key.ps_prolog.face_vgpr_index = shader->info.face_vgpr_index; - shader->config.spi_ps_input_ena |= S_0286CC_FRONT_FACE_ENA(1); - } - - for (i = 0; i < 2; i++) { - unsigned location = info->input_interpolate_loc[color[i]]; - - if (!(info->colors_read & (0xf << i*4))) - continue; - - prolog_key.ps_prolog.color_attr_index[i] = color[i]; - - /* Force per-sample interpolation for the colors here. */ - if (shader->key.ps.prolog.force_persample_interp) - location = TGSI_INTERPOLATE_LOC_SAMPLE; - - switch (info->input_interpolate[color[i]]) { - case TGSI_INTERPOLATE_CONSTANT: - prolog_key.ps_prolog.color_interp_vgpr_index[i] = -1; - break; - case TGSI_INTERPOLATE_PERSPECTIVE: - case TGSI_INTERPOLATE_COLOR: - switch (location) { - case TGSI_INTERPOLATE_LOC_SAMPLE: - prolog_key.ps_prolog.color_interp_vgpr_index[i] = 0; - shader->config.spi_ps_input_ena |= - S_0286CC_PERSP_SAMPLE_ENA(1); - break; - case TGSI_INTERPOLATE_LOC_CENTER: - prolog_key.ps_prolog.color_interp_vgpr_index[i] = 2; - shader->config.spi_ps_input_ena |= - S_0286CC_PERSP_CENTER_ENA(1); - break; - case TGSI_INTERPOLATE_LOC_CENTROID: - prolog_key.ps_prolog.color_interp_vgpr_index[i] = 4; - shader->config.spi_ps_input_ena |= - S_0286CC_PERSP_CENTROID_ENA(1); - break; - default: - assert(0); - } - break; - case TGSI_INTERPOLATE_LINEAR: - switch (location) { - case TGSI_INTERPOLATE_LOC_SAMPLE: - prolog_key.ps_prolog.color_interp_vgpr_index[i] = 6; - shader->config.spi_ps_input_ena |= - S_0286CC_LINEAR_SAMPLE_ENA(1); - break; - case TGSI_INTERPOLATE_LOC_CENTER: - prolog_key.ps_prolog.color_interp_vgpr_index[i] = 8; - shader->config.spi_ps_input_ena |= - S_0286CC_LINEAR_CENTER_ENA(1); - break; - case TGSI_INTERPOLATE_LOC_CENTROID: - prolog_key.ps_prolog.color_interp_vgpr_index[i] = 10; - shader->config.spi_ps_input_ena |= - S_0286CC_LINEAR_CENTROID_ENA(1); - break; - default: - assert(0); - } - break; - default: - assert(0); - } - } - } + si_get_ps_prolog_key(shader, &prolog_key, true); /* The prolog is a no-op if these aren't set. */ - if (prolog_key.ps_prolog.colors_read || - prolog_key.ps_prolog.states.force_persample_interp || - prolog_key.ps_prolog.states.poly_stipple) { + if (si_need_ps_prolog(&prolog_key)) { shader->prolog = si_get_shader_part(sscreen, &sscreen->ps_prologs, + PIPE_SHADER_FRAGMENT, true, &prolog_key, tm, debug, - si_compile_ps_prolog); + si_build_ps_prolog_function, + "Fragment Shader Prolog"); if (!shader->prolog) return false; } /* Get the epilog. */ - memset(&epilog_key, 0, sizeof(epilog_key)); - epilog_key.ps_epilog.colors_written = info->colors_written; - epilog_key.ps_epilog.writes_z = info->writes_z; - epilog_key.ps_epilog.writes_stencil = info->writes_stencil; - epilog_key.ps_epilog.writes_samplemask = info->writes_samplemask; - epilog_key.ps_epilog.states = shader->key.ps.epilog; + si_get_ps_epilog_key(shader, &epilog_key); shader->epilog = si_get_shader_part(sscreen, &sscreen->ps_epilogs, + PIPE_SHADER_FRAGMENT, false, &epilog_key, tm, debug, - si_compile_ps_epilog); + si_build_ps_epilog_function, + "Fragment Shader Epilog"); if (!shader->epilog) return false; /* Enable POS_FIXED_PT if polygon stippling is enabled. */ - if (shader->key.ps.prolog.poly_stipple) { + if (shader->key.part.ps.prolog.poly_stipple) { shader->config.spi_ps_input_ena |= S_0286CC_POS_FIXED_PT_ENA(1); assert(G_0286CC_POS_FIXED_PT_ENA(shader->config.spi_ps_input_addr)); } /* Set up the enable bits for per-sample shading if needed. */ - if (shader->key.ps.prolog.force_persample_interp) { - if (G_0286CC_PERSP_CENTER_ENA(shader->config.spi_ps_input_ena) || - G_0286CC_PERSP_CENTROID_ENA(shader->config.spi_ps_input_ena)) { - shader->config.spi_ps_input_ena &= C_0286CC_PERSP_CENTER_ENA; - shader->config.spi_ps_input_ena &= C_0286CC_PERSP_CENTROID_ENA; - shader->config.spi_ps_input_ena |= S_0286CC_PERSP_SAMPLE_ENA(1); - } - if (G_0286CC_LINEAR_CENTER_ENA(shader->config.spi_ps_input_ena) || - G_0286CC_LINEAR_CENTROID_ENA(shader->config.spi_ps_input_ena)) { - shader->config.spi_ps_input_ena &= C_0286CC_LINEAR_CENTER_ENA; - shader->config.spi_ps_input_ena &= C_0286CC_LINEAR_CENTROID_ENA; - shader->config.spi_ps_input_ena |= S_0286CC_LINEAR_SAMPLE_ENA(1); - } + if (shader->key.part.ps.prolog.force_persp_sample_interp && + (G_0286CC_PERSP_CENTER_ENA(shader->config.spi_ps_input_ena) || + G_0286CC_PERSP_CENTROID_ENA(shader->config.spi_ps_input_ena))) { + shader->config.spi_ps_input_ena &= C_0286CC_PERSP_CENTER_ENA; + shader->config.spi_ps_input_ena &= C_0286CC_PERSP_CENTROID_ENA; + shader->config.spi_ps_input_ena |= S_0286CC_PERSP_SAMPLE_ENA(1); + } + if (shader->key.part.ps.prolog.force_linear_sample_interp && + (G_0286CC_LINEAR_CENTER_ENA(shader->config.spi_ps_input_ena) || + G_0286CC_LINEAR_CENTROID_ENA(shader->config.spi_ps_input_ena))) { + shader->config.spi_ps_input_ena &= C_0286CC_LINEAR_CENTER_ENA; + shader->config.spi_ps_input_ena &= C_0286CC_LINEAR_CENTROID_ENA; + shader->config.spi_ps_input_ena |= S_0286CC_LINEAR_SAMPLE_ENA(1); + } + if (shader->key.part.ps.prolog.force_persp_center_interp && + (G_0286CC_PERSP_SAMPLE_ENA(shader->config.spi_ps_input_ena) || + G_0286CC_PERSP_CENTROID_ENA(shader->config.spi_ps_input_ena))) { + shader->config.spi_ps_input_ena &= C_0286CC_PERSP_SAMPLE_ENA; + shader->config.spi_ps_input_ena &= C_0286CC_PERSP_CENTROID_ENA; + shader->config.spi_ps_input_ena |= S_0286CC_PERSP_CENTER_ENA(1); + } + if (shader->key.part.ps.prolog.force_linear_center_interp && + (G_0286CC_LINEAR_SAMPLE_ENA(shader->config.spi_ps_input_ena) || + G_0286CC_LINEAR_CENTROID_ENA(shader->config.spi_ps_input_ena))) { + shader->config.spi_ps_input_ena &= C_0286CC_LINEAR_SAMPLE_ENA; + shader->config.spi_ps_input_ena &= C_0286CC_LINEAR_CENTROID_ENA; + shader->config.spi_ps_input_ena |= S_0286CC_LINEAR_CENTER_ENA(1); } /* POW_W_FLOAT requires that one of the perspective weights is enabled. */ @@ -7538,39 +8555,55 @@ /* The sample mask input is always enabled, because the API shader always * passes it through to the epilog. Disable it here if it's unused. */ - if (!shader->key.ps.epilog.poly_line_smoothing && + if (!shader->key.part.ps.epilog.poly_line_smoothing && !shader->selector->info.reads_samplemask) shader->config.spi_ps_input_ena &= C_0286CC_SAMPLE_COVERAGE_ENA; return true; } -static void si_fix_num_sgprs(struct si_shader *shader) +void si_multiwave_lds_size_workaround(struct si_screen *sscreen, + unsigned *lds_size) +{ + /* SPI barrier management bug: + * Make sure we have at least 4k of LDS in use to avoid the bug. + * It applies to workgroup sizes of more than one wavefront. + */ + if (sscreen->b.family == CHIP_BONAIRE || + sscreen->b.family == CHIP_KABINI || + sscreen->b.family == CHIP_MULLINS) + *lds_size = MAX2(*lds_size, 8); +} + +static void si_fix_resource_usage(struct si_screen *sscreen, + struct si_shader *shader) { unsigned min_sgprs = shader->info.num_input_sgprs + 2; /* VCC */ shader->config.num_sgprs = MAX2(shader->config.num_sgprs, min_sgprs); + + if (shader->selector->type == PIPE_SHADER_COMPUTE && + si_get_max_workgroup_size(shader) > 64) { + si_multiwave_lds_size_workaround(sscreen, + &shader->config.lds_size); + } } int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm, struct si_shader *shader, struct pipe_debug_callback *debug) { - struct si_shader *mainp = shader->selector->main_shader_part; + struct si_shader_selector *sel = shader->selector; + struct si_shader *mainp = sel->main_shader_part; int r; /* LS, ES, VS are compiled on demand if the main part hasn't been * compiled for that stage. + * + * Vertex shaders are compiled on demand when a vertex fetch + * workaround must be applied. */ - if (!mainp || - (shader->selector->type == PIPE_SHADER_VERTEX && - (shader->key.vs.as_es != mainp->key.vs.as_es || - shader->key.vs.as_ls != mainp->key.vs.as_ls)) || - (shader->selector->type == PIPE_SHADER_TESS_EVAL && - shader->key.tes.as_es != mainp->key.tes.as_es) || - (shader->selector->type == PIPE_SHADER_TESS_CTRL && - shader->key.tcs.epilog.inputs_to_copy) || - shader->selector->type == PIPE_SHADER_COMPUTE) { + if (shader->is_monolithic) { /* Monolithic shader (compiled as a whole, has many variants, * may take a long time to compile). */ @@ -7604,7 +8637,7 @@ shader->info.nr_param_exports = mainp->info.nr_param_exports; /* Select prologs and/or epilogs. */ - switch (shader->selector->type) { + switch (sel->type) { case PIPE_SHADER_VERTEX: if (!si_shader_select_vs_parts(sscreen, tm, shader, debug)) return -1; @@ -7617,6 +8650,10 @@ if (!si_shader_select_tes_parts(sscreen, tm, shader, debug)) return -1; break; + case PIPE_SHADER_GEOMETRY: + if (!si_shader_select_gs_parts(sscreen, tm, shader, debug)) + return -1; + break; case PIPE_SHADER_FRAGMENT: if (!si_shader_select_ps_parts(sscreen, tm, shader, debug)) return -1; @@ -7644,9 +8681,9 @@ } } - si_fix_num_sgprs(shader); - si_shader_dump(sscreen, shader, debug, shader->selector->info.processor, - stderr); + si_fix_resource_usage(sscreen, shader); + si_shader_dump(sscreen, shader, debug, sel->info.processor, + stderr, true); /* Upload. */ r = si_shader_binary_upload(sscreen, shader); @@ -7660,11 +8697,6 @@ void si_shader_destroy(struct si_shader *shader) { - if (shader->gs_copy_shader) { - si_shader_destroy(shader->gs_copy_shader); - FREE(shader->gs_copy_shader); - } - if (shader->scratch_bo) r600_resource_reference(&shader->scratch_bo, NULL); @@ -7672,4 +8704,6 @@ if (!shader->is_binary_shared) radeon_shader_binary_clean(&shader->binary); + + free(shader->shader_log); } diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/si_shader.h mesa-17.0.7/src/gallium/drivers/radeonsi/si_shader.h --- mesa-12.0.6/src/gallium/drivers/radeonsi/si_shader.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/si_shader.h 2017-06-01 10:37:10.000000000 +0000 @@ -69,7 +69,9 @@ #define SI_SHADER_H #include /* LLVMModuleRef */ +#include #include "tgsi/tgsi_scan.h" +#include "util/u_queue.h" #include "si_state.h" struct radeon_shader_binary; @@ -96,6 +98,7 @@ SI_SGPR_VERTEX_BUFFERS_HI, SI_SGPR_BASE_VERTEX, SI_SGPR_START_INSTANCE, + SI_SGPR_DRAWID, SI_ES_NUM_USER_SGPR, /* hw VS only */ @@ -126,7 +129,8 @@ /* CS only */ SI_SGPR_GRID_SIZE = SI_NUM_RESOURCE_SGPRS, - SI_CS_NUM_USER_SGPR = SI_SGPR_GRID_SIZE + 3 + SI_SGPR_BLOCK_SIZE = SI_SGPR_GRID_SIZE + 3, + SI_CS_NUM_USER_SGPR = SI_SGPR_BLOCK_SIZE + 3 }; /* LLVM function parameter indices */ @@ -142,10 +146,11 @@ SI_PARAM_VERTEX_BUFFERS = SI_NUM_RESOURCE_PARAMS, SI_PARAM_BASE_VERTEX, SI_PARAM_START_INSTANCE, + SI_PARAM_DRAWID, /* [0] = clamp vertex color, VS as VS only */ SI_PARAM_VS_STATE_BITS, /* same value as TCS_IN_LAYOUT, VS as LS only */ - SI_PARAM_LS_OUT_LAYOUT = SI_PARAM_START_INSTANCE + 1, + SI_PARAM_LS_OUT_LAYOUT = SI_PARAM_DRAWID + 1, /* the other VS parameters are assigned dynamically */ /* Layout of TCS outputs in the offchip buffer @@ -215,6 +220,7 @@ /* CS only parameters */ SI_PARAM_GRID_SIZE = SI_NUM_RESOURCE_PARAMS, + SI_PARAM_BLOCK_SIZE, SI_PARAM_BLOCK_ID, SI_PARAM_THREAD_ID, @@ -227,12 +233,45 @@ TGSI_SEMANTIC_DEFAULT_TESSINNER_SI, }; +/* For VS shader key fix_fetch. */ +enum { + SI_FIX_FETCH_NONE = 0, + SI_FIX_FETCH_A2_SNORM, + SI_FIX_FETCH_A2_SSCALED, + SI_FIX_FETCH_A2_SINT, + SI_FIX_FETCH_RGBA_32_UNORM, + SI_FIX_FETCH_RGBX_32_UNORM, + SI_FIX_FETCH_RGBA_32_SNORM, + SI_FIX_FETCH_RGBX_32_SNORM, + SI_FIX_FETCH_RGBA_32_USCALED, + SI_FIX_FETCH_RGBA_32_SSCALED, + SI_FIX_FETCH_RGBA_32_FIXED, + SI_FIX_FETCH_RGBX_32_FIXED, +}; + struct si_shader; +/* State of the context creating the shader object. */ +struct si_compiler_ctx_state { + /* Should only be used by si_init_shader_selector_async and + * si_build_shader_variant if thread_index == -1 (non-threaded). */ + LLVMTargetMachineRef tm; + + /* Used if thread_index == -1 or if debug.async is true. */ + struct pipe_debug_callback debug; + + /* Used for creating the log string for gallium/ddebug. */ + bool is_debug_context; +}; + /* A shader selector is a gallium CSO and contains shader variants and * binaries for one TGSI program. This can be shared by multiple contexts. */ struct si_shader_selector { + struct si_screen *screen; + struct util_queue_fence ready; + struct si_compiler_ctx_state compiler_ctx_state; + pipe_mutex mutex; struct si_shader *first_variant; /* immutable after the first variant */ struct si_shader *last_variant; /* mutable */ @@ -242,6 +281,8 @@ */ struct si_shader *main_shader_part; + struct si_shader *gs_copy_shader; + struct tgsi_token *tokens; struct pipe_stream_output_info so; struct tgsi_shader_info info; @@ -270,9 +311,12 @@ /* CS parameters */ unsigned local_size; - /* masks of "get_unique_index" bits */ - uint64_t outputs_written; - uint32_t patch_outputs_written; + uint64_t outputs_written; /* "get_unique_index" bits */ + uint32_t patch_outputs_written; /* "get_unique_index" bits */ + uint32_t outputs_written2; /* "get_unique_index2" bits */ + + uint64_t inputs_read; /* "get_unique_index" bits */ + uint32_t inputs_read2; /* "get_unique_index2" bits */ }; /* Valid shader configurations: @@ -294,39 +338,35 @@ /* Common VS bits between the shader key and the epilog key. */ struct si_vs_epilog_bits { unsigned export_prim_id:1; /* when PS needs it and GS is disabled */ - /* TODO: - * - skip clipdist, culldist (including clipvertex code) exports based - * on which clip_plane_enable bits are set - * - skip layer, viewport, clipdist, and culldist parameter exports - * if PS doesn't read them - */ }; /* Common TCS bits between the shader key and the epilog key. */ struct si_tcs_epilog_bits { unsigned prim_mode:3; - uint64_t inputs_to_copy; +}; + +struct si_gs_prolog_bits { + unsigned tri_strip_adj_fix:1; }; /* Common PS bits between the shader key and the prolog key. */ struct si_ps_prolog_bits { unsigned color_two_side:1; - /* TODO: add a flatshade bit that skips interpolation for colors */ + unsigned flatshade_colors:1; unsigned poly_stipple:1; - unsigned force_persample_interp:1; - /* TODO: - * - add force_center_interp if MSAA is disabled and centroid or - * sample are present - * - add force_center_interp_bc_optimize to force center interpolation - * based on the bc_optimize SGPR bit if MSAA is enabled, centroid is - * present and sample isn't present. - */ + unsigned force_persp_sample_interp:1; + unsigned force_linear_sample_interp:1; + unsigned force_persp_center_interp:1; + unsigned force_linear_center_interp:1; + unsigned bc_optimize_for_persp:1; + unsigned bc_optimize_for_linear:1; }; /* Common PS bits between the shader key and the epilog key. */ struct si_ps_epilog_bits { unsigned spi_shader_col_format; unsigned color_is_int8:8; + unsigned color_is_int10:8; unsigned last_cbuf:3; unsigned alpha_func:3; unsigned alpha_to_one:1; @@ -348,6 +388,9 @@ struct si_tcs_epilog_bits states; } tcs_epilog; struct { + struct si_gs_prolog_bits states; + } gs_prolog; + struct { struct si_ps_prolog_bits states; unsigned num_input_sgprs:5; unsigned num_input_vgprs:5; @@ -368,29 +411,61 @@ } ps_epilog; }; -union si_shader_key { - struct { - struct si_ps_prolog_bits prolog; - struct si_ps_epilog_bits epilog; - } ps; - struct { - struct si_vs_prolog_bits prolog; - struct si_vs_epilog_bits epilog; - unsigned as_es:1; /* export shader */ - unsigned as_ls:1; /* local shader */ - } vs; - struct { - struct si_tcs_epilog_bits epilog; - } tcs; /* tessellation control shader */ - struct { - struct si_vs_epilog_bits epilog; /* same as VS */ - unsigned as_es:1; /* export shader */ - } tes; /* tessellation evaluation shader */ +struct si_shader_key { + /* Prolog and epilog flags. */ + union { + struct { + struct si_ps_prolog_bits prolog; + struct si_ps_epilog_bits epilog; + } ps; + struct { + struct si_vs_prolog_bits prolog; + struct si_vs_epilog_bits epilog; + } vs; + struct { + struct si_tcs_epilog_bits epilog; + } tcs; /* tessellation control shader */ + struct { + struct si_vs_epilog_bits epilog; /* same as VS */ + } tes; /* tessellation evaluation shader */ + struct { + struct si_gs_prolog_bits prolog; + } gs; + } part; + + /* These two are initially set according to the NEXT_SHADER property, + * or guessed if the property doesn't seem correct. + */ + unsigned as_es:1; /* export shader */ + unsigned as_ls:1; /* local shader */ + + /* Flags for monolithic compilation only. */ + union { + struct { + /* One nibble for every input: SI_FIX_FETCH_* enums. */ + uint64_t fix_fetch; + } vs; + struct { + uint64_t inputs_to_copy; /* for fixed-func TCS */ + } tcs; + } mono; + + /* Optimization flags for asynchronous compilation only. */ + union { + struct { + uint64_t kill_outputs; /* "get_unique_index" bits */ + uint32_t kill_outputs2; /* "get_unique_index2" bits */ + unsigned clip_disable:1; + } hw_vs; /* HW VS (it can be VS, TES, GS) */ + } opt; }; struct si_shader_config { unsigned num_sgprs; unsigned num_vgprs; + unsigned spilled_sgprs; + unsigned spilled_vgprs; + unsigned private_mem_vgprs; unsigned lds_size; unsigned spi_ps_input_ena; unsigned spi_ps_input_addr; @@ -400,6 +475,18 @@ unsigned rsrc2; }; +enum { + /* SPI_PS_INPUT_CNTL_i.OFFSET[0:4] */ + EXP_PARAM_OFFSET_0 = 0, + EXP_PARAM_OFFSET_31 = 31, + /* SPI_PS_INPUT_CNTL_i.DEFAULT_VAL[0:1] */ + EXP_PARAM_DEFAULT_VAL_0000 = 64, + EXP_PARAM_DEFAULT_VAL_0001, + EXP_PARAM_DEFAULT_VAL_1110, + EXP_PARAM_DEFAULT_VAL_1111, + EXP_PARAM_UNDEFINED = 255, +}; + /* GCN-specific shader info. */ struct si_shader_info { ubyte vs_output_param_offset[SI_MAX_VS_OUTPUTS]; @@ -412,24 +499,35 @@ }; struct si_shader { + struct si_compiler_ctx_state compiler_ctx_state; + struct si_shader_selector *selector; struct si_shader *next_variant; struct si_shader_part *prolog; struct si_shader_part *epilog; - struct si_shader *gs_copy_shader; struct si_pm4_state *pm4; struct r600_resource *bo; struct r600_resource *scratch_bo; - union si_shader_key key; + struct si_shader_key key; + struct util_queue_fence optimized_ready; + bool compilation_failed; + bool is_monolithic; + bool is_optimized; bool is_binary_shared; - unsigned z_order; + bool is_gs_copy_shader; /* The following data is all that's needed for binary shaders. */ struct radeon_shader_binary binary; struct si_shader_config config; struct si_shader_info info; + + /* Shader key + LLVM IR + disassembly + statistics. + * Generated for debug contexts only. + */ + char *shader_log; + size_t shader_log_size; }; struct si_shader_part { @@ -439,39 +537,12 @@ struct si_shader_config config; }; -static inline struct tgsi_shader_info *si_get_vs_info(struct si_context *sctx) -{ - if (sctx->gs_shader.cso) - return &sctx->gs_shader.cso->info; - else if (sctx->tes_shader.cso) - return &sctx->tes_shader.cso->info; - else if (sctx->vs_shader.cso) - return &sctx->vs_shader.cso->info; - else - return NULL; -} - -static inline struct si_shader* si_get_vs_state(struct si_context *sctx) -{ - if (sctx->gs_shader.current) - return sctx->gs_shader.current->gs_copy_shader; - else if (sctx->tes_shader.current) - return sctx->tes_shader.current; - else - return sctx->vs_shader.current; -} - -static inline bool si_vs_exports_prim_id(struct si_shader *shader) -{ - if (shader->selector->type == PIPE_SHADER_VERTEX) - return shader->key.vs.epilog.export_prim_id; - else if (shader->selector->type == PIPE_SHADER_TESS_EVAL) - return shader->key.tes.epilog.export_prim_id; - else - return false; -} - /* si_shader.c */ +struct si_shader * +si_generate_gs_copy_shader(struct si_screen *sscreen, + LLVMTargetMachineRef tm, + struct si_shader_selector *gs_selector, + struct pipe_debug_callback *debug); int si_compile_tgsi_shader(struct si_screen *sscreen, LLVMTargetMachineRef tm, struct si_shader *shader, @@ -480,7 +551,6 @@ int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm, struct si_shader *shader, struct pipe_debug_callback *debug); -void si_dump_shader_key(unsigned shader, union si_shader_key *key, FILE *f); int si_compile_llvm(struct si_screen *sscreen, struct radeon_shader_binary *binary, struct si_shader_config *conf, @@ -491,10 +561,13 @@ const char *name); void si_shader_destroy(struct si_shader *shader); unsigned si_shader_io_get_unique_index(unsigned semantic_name, unsigned index); +unsigned si_shader_io_get_unique_index2(unsigned name, unsigned index); int si_shader_binary_upload(struct si_screen *sscreen, struct si_shader *shader); void si_shader_dump(struct si_screen *sscreen, struct si_shader *shader, struct pipe_debug_callback *debug, unsigned processor, - FILE *f); + FILE *f, bool check_debug_option); +void si_multiwave_lds_size_workaround(struct si_screen *sscreen, + unsigned *lds_size); void si_shader_apply_scratch_relocs(struct si_context *sctx, struct si_shader *shader, struct si_shader_config *config, @@ -502,5 +575,7 @@ void si_shader_binary_read_config(struct radeon_shader_binary *binary, struct si_shader_config *conf, unsigned symbol_offset); +unsigned si_get_spi_shader_z_format(bool writes_z, bool writes_stencil, + bool writes_samplemask); #endif diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/si_shader_internal.h mesa-17.0.7/src/gallium/drivers/radeonsi/si_shader_internal.h --- mesa-12.0.6/src/gallium/drivers/radeonsi/si_shader_internal.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/si_shader_internal.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,224 @@ +/* + * Copyright 2016 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef SI_SHADER_PRIVATE_H +#define SI_SHADER_PRIVATE_H + +#include "si_shader.h" +#include "gallivm/lp_bld_init.h" +#include "gallivm/lp_bld_tgsi.h" +#include "tgsi/tgsi_parse.h" +#include "ac_llvm_util.h" + +#include +#include + +struct pipe_debug_callback; +struct radeon_shader_binary; + +#define RADEON_LLVM_MAX_INPUT_SLOTS 32 +#define RADEON_LLVM_MAX_INPUTS 32 * 4 +#define RADEON_LLVM_MAX_OUTPUTS 32 * 4 + +#define RADEON_LLVM_INITIAL_CF_DEPTH 4 + +#define RADEON_LLVM_MAX_SYSTEM_VALUES 4 +#define RADEON_LLVM_MAX_ADDRS 16 + +struct si_llvm_flow; + +struct si_shader_context { + struct lp_build_tgsi_context bld_base; + struct gallivm_state gallivm; + struct ac_llvm_context ac; + struct si_shader *shader; + struct si_screen *screen; + + unsigned type; /* PIPE_SHADER_* specifies the type of shader. */ + + /* Whether the prolog will be compiled separately. */ + bool separate_prolog; + + /** This function is responsible for initilizing the inputs array and will be + * called once for each input declared in the TGSI shader. + */ + void (*load_input)(struct si_shader_context *, + unsigned input_index, + const struct tgsi_full_declaration *decl, + LLVMValueRef out[4]); + + void (*load_system_value)(struct si_shader_context *, + unsigned index, + const struct tgsi_full_declaration *decl); + + void (*declare_memory_region)(struct si_shader_context *, + const struct tgsi_full_declaration *decl); + + /** This array contains the input values for the shader. Typically these + * values will be in the form of a target intrinsic that will inform the + * backend how to load the actual inputs to the shader. + */ + struct tgsi_full_declaration input_decls[RADEON_LLVM_MAX_INPUT_SLOTS]; + LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS]; + LLVMValueRef outputs[RADEON_LLVM_MAX_OUTPUTS][TGSI_NUM_CHANNELS]; + LLVMValueRef addrs[RADEON_LLVM_MAX_ADDRS][TGSI_NUM_CHANNELS]; + + /** This pointer is used to contain the temporary values. + * The amount of temporary used in tgsi can't be bound to a max value and + * thus we must allocate this array at runtime. + */ + LLVMValueRef *temps; + unsigned temps_count; + LLVMValueRef system_values[RADEON_LLVM_MAX_SYSTEM_VALUES]; + + LLVMValueRef *imms; + unsigned imms_num; + + struct si_llvm_flow *flow; + unsigned flow_depth; + unsigned flow_depth_max; + + struct tgsi_array_info *temp_arrays; + LLVMValueRef *temp_array_allocas; + + LLVMValueRef undef_alloca; + + LLVMValueRef main_fn; + LLVMTypeRef return_type; + + int param_streamout_config; + int param_streamout_write_index; + int param_streamout_offset[4]; + int param_vertex_id; + int param_rel_auto_id; + int param_vs_prim_id; + int param_instance_id; + int param_vertex_index0; + int param_tes_u; + int param_tes_v; + int param_tes_rel_patch_id; + int param_tes_patch_id; + int param_es2gs_offset; + int param_oc_lds; + + /* Sets a bit if the dynamic HS control word was 0x80000000. The bit is + * 0x800000 for VS, 0x1 for ES. + */ + int param_tess_offchip; + + LLVMTargetMachineRef tm; + + unsigned invariant_load_md_kind; + unsigned range_md_kind; + unsigned uniform_md_kind; + unsigned fpmath_md_kind; + LLVMValueRef fpmath_md_2p5_ulp; + LLVMValueRef empty_md; + + /* Preloaded descriptors. */ + LLVMValueRef esgs_ring; + LLVMValueRef gsvs_ring[4]; + + LLVMValueRef lds; + LLVMValueRef gs_next_vertex[4]; + LLVMValueRef return_value; + + LLVMTypeRef voidt; + LLVMTypeRef i1; + LLVMTypeRef i8; + LLVMTypeRef i32; + LLVMTypeRef i64; + LLVMTypeRef i128; + LLVMTypeRef f32; + LLVMTypeRef v16i8; + LLVMTypeRef v2i32; + LLVMTypeRef v4i32; + LLVMTypeRef v4f32; + LLVMTypeRef v8i32; + + LLVMValueRef shared_memory; +}; + +static inline struct si_shader_context * +si_shader_context(struct lp_build_tgsi_context *bld_base) +{ + return (struct si_shader_context*)bld_base; +} + +void si_llvm_add_attribute(LLVMValueRef F, const char *name, int value); +void si_llvm_shader_type(LLVMValueRef F, unsigned type); + +LLVMTargetRef si_llvm_get_amdgpu_target(const char *triple); + +unsigned si_llvm_compile(LLVMModuleRef M, struct radeon_shader_binary *binary, + LLVMTargetMachineRef tm, + struct pipe_debug_callback *debug); + +LLVMTypeRef tgsi2llvmtype(struct lp_build_tgsi_context *bld_base, + enum tgsi_opcode_type type); + +LLVMValueRef bitcast(struct lp_build_tgsi_context *bld_base, + enum tgsi_opcode_type type, LLVMValueRef value); + +LLVMValueRef si_llvm_bound_index(struct si_shader_context *ctx, + LLVMValueRef index, + unsigned num); + +void si_llvm_context_init(struct si_shader_context *ctx, + struct si_screen *sscreen, + struct si_shader *shader, + LLVMTargetMachineRef tm, + const struct tgsi_shader_info *info, + const struct tgsi_token *tokens); + +void si_llvm_create_func(struct si_shader_context *ctx, + const char *name, + LLVMTypeRef *return_types, unsigned num_return_elems, + LLVMTypeRef *ParamTypes, unsigned ParamCount); + +void si_llvm_dispose(struct si_shader_context *ctx); + +void si_llvm_finalize_module(struct si_shader_context *ctx, + bool run_verifier); + +LLVMValueRef si_llvm_emit_fetch_64bit(struct lp_build_tgsi_context *bld_base, + enum tgsi_opcode_type type, + LLVMValueRef ptr, + LLVMValueRef ptr2); + +LLVMValueRef si_llvm_saturate(struct lp_build_tgsi_context *bld_base, + LLVMValueRef value); + +LLVMValueRef si_llvm_emit_fetch(struct lp_build_tgsi_context *bld_base, + const struct tgsi_full_src_register *reg, + enum tgsi_opcode_type type, + unsigned swizzle); + +void si_llvm_emit_store(struct lp_build_tgsi_context *bld_base, + const struct tgsi_full_instruction *inst, + const struct tgsi_opcode_info *info, + LLVMValueRef dst[4]); + +void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base); + +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c mesa-17.0.7/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c --- mesa-12.0.6/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,908 @@ +/* + * Copyright 2016 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "si_shader_internal.h" +#include "gallivm/lp_bld_const.h" +#include "gallivm/lp_bld_intr.h" +#include "gallivm/lp_bld_gather.h" +#include "tgsi/tgsi_parse.h" + +static void kill_if_fetch_args(struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + const struct tgsi_full_instruction *inst = emit_data->inst; + struct gallivm_state *gallivm = bld_base->base.gallivm; + LLVMBuilderRef builder = gallivm->builder; + unsigned i; + LLVMValueRef conds[TGSI_NUM_CHANNELS]; + + for (i = 0; i < TGSI_NUM_CHANNELS; i++) { + LLVMValueRef value = lp_build_emit_fetch(bld_base, inst, 0, i); + conds[i] = LLVMBuildFCmp(builder, LLVMRealOLT, value, + bld_base->base.zero, ""); + } + + /* Or the conditions together */ + for (i = TGSI_NUM_CHANNELS - 1; i > 0; i--) { + conds[i - 1] = LLVMBuildOr(builder, conds[i], conds[i - 1], ""); + } + + emit_data->dst_type = LLVMVoidTypeInContext(gallivm->context); + emit_data->arg_count = 1; + emit_data->args[0] = LLVMBuildSelect(builder, conds[0], + lp_build_const_float(gallivm, -1.0f), + bld_base->base.zero, ""); +} + +static void kil_emit(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + unsigned i; + for (i = 0; i < emit_data->arg_count; i++) { + emit_data->output[i] = lp_build_intrinsic_unary( + bld_base->base.gallivm->builder, + action->intr_name, + emit_data->dst_type, emit_data->args[i]); + } +} + +static void emit_icmp(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + unsigned pred; + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + LLVMContextRef context = bld_base->base.gallivm->context; + + switch (emit_data->inst->Instruction.Opcode) { + case TGSI_OPCODE_USEQ: + case TGSI_OPCODE_U64SEQ: pred = LLVMIntEQ; break; + case TGSI_OPCODE_USNE: + case TGSI_OPCODE_U64SNE: pred = LLVMIntNE; break; + case TGSI_OPCODE_USGE: + case TGSI_OPCODE_U64SGE: pred = LLVMIntUGE; break; + case TGSI_OPCODE_USLT: + case TGSI_OPCODE_U64SLT: pred = LLVMIntULT; break; + case TGSI_OPCODE_ISGE: + case TGSI_OPCODE_I64SGE: pred = LLVMIntSGE; break; + case TGSI_OPCODE_ISLT: + case TGSI_OPCODE_I64SLT: pred = LLVMIntSLT; break; + default: + assert(!"unknown instruction"); + pred = 0; + break; + } + + LLVMValueRef v = LLVMBuildICmp(builder, pred, + emit_data->args[0], emit_data->args[1],""); + + v = LLVMBuildSExtOrBitCast(builder, v, + LLVMInt32TypeInContext(context), ""); + + emit_data->output[emit_data->chan] = v; +} + +static void emit_ucmp(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + + LLVMValueRef arg0 = LLVMBuildBitCast(builder, emit_data->args[0], + bld_base->uint_bld.elem_type, ""); + + LLVMValueRef v = LLVMBuildICmp(builder, LLVMIntNE, arg0, + bld_base->uint_bld.zero, ""); + + emit_data->output[emit_data->chan] = + LLVMBuildSelect(builder, v, emit_data->args[1], emit_data->args[2], ""); +} + +static void emit_cmp(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + LLVMValueRef cond, *args = emit_data->args; + + cond = LLVMBuildFCmp(builder, LLVMRealOLT, args[0], + bld_base->base.zero, ""); + + emit_data->output[emit_data->chan] = + LLVMBuildSelect(builder, cond, args[1], args[2], ""); +} + +static void emit_set_cond(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + LLVMRealPredicate pred; + LLVMValueRef cond; + + /* Use ordered for everything but NE (which is usual for + * float comparisons) + */ + switch (emit_data->inst->Instruction.Opcode) { + case TGSI_OPCODE_SGE: pred = LLVMRealOGE; break; + case TGSI_OPCODE_SEQ: pred = LLVMRealOEQ; break; + case TGSI_OPCODE_SLE: pred = LLVMRealOLE; break; + case TGSI_OPCODE_SLT: pred = LLVMRealOLT; break; + case TGSI_OPCODE_SNE: pred = LLVMRealUNE; break; + case TGSI_OPCODE_SGT: pred = LLVMRealOGT; break; + default: assert(!"unknown instruction"); pred = 0; break; + } + + cond = LLVMBuildFCmp(builder, + pred, emit_data->args[0], emit_data->args[1], ""); + + emit_data->output[emit_data->chan] = LLVMBuildSelect(builder, + cond, bld_base->base.one, bld_base->base.zero, ""); +} + +static void emit_fcmp(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + LLVMContextRef context = bld_base->base.gallivm->context; + LLVMRealPredicate pred; + + /* Use ordered for everything but NE (which is usual for + * float comparisons) + */ + switch (emit_data->inst->Instruction.Opcode) { + case TGSI_OPCODE_FSEQ: pred = LLVMRealOEQ; break; + case TGSI_OPCODE_FSGE: pred = LLVMRealOGE; break; + case TGSI_OPCODE_FSLT: pred = LLVMRealOLT; break; + case TGSI_OPCODE_FSNE: pred = LLVMRealUNE; break; + default: assert(!"unknown instruction"); pred = 0; break; + } + + LLVMValueRef v = LLVMBuildFCmp(builder, pred, + emit_data->args[0], emit_data->args[1],""); + + v = LLVMBuildSExtOrBitCast(builder, v, + LLVMInt32TypeInContext(context), ""); + + emit_data->output[emit_data->chan] = v; +} + +static void emit_dcmp(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + LLVMContextRef context = bld_base->base.gallivm->context; + LLVMRealPredicate pred; + + /* Use ordered for everything but NE (which is usual for + * float comparisons) + */ + switch (emit_data->inst->Instruction.Opcode) { + case TGSI_OPCODE_DSEQ: pred = LLVMRealOEQ; break; + case TGSI_OPCODE_DSGE: pred = LLVMRealOGE; break; + case TGSI_OPCODE_DSLT: pred = LLVMRealOLT; break; + case TGSI_OPCODE_DSNE: pred = LLVMRealUNE; break; + default: assert(!"unknown instruction"); pred = 0; break; + } + + LLVMValueRef v = LLVMBuildFCmp(builder, pred, + emit_data->args[0], emit_data->args[1],""); + + v = LLVMBuildSExtOrBitCast(builder, v, + LLVMInt32TypeInContext(context), ""); + + emit_data->output[emit_data->chan] = v; +} + +static void emit_not(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + LLVMValueRef v = bitcast(bld_base, TGSI_TYPE_UNSIGNED, + emit_data->args[0]); + emit_data->output[emit_data->chan] = LLVMBuildNot(builder, v, ""); +} + +static void emit_arl(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + LLVMValueRef floor_index = lp_build_emit_llvm_unary(bld_base, TGSI_OPCODE_FLR, emit_data->args[0]); + emit_data->output[emit_data->chan] = LLVMBuildFPToSI(builder, + floor_index, bld_base->base.int_elem_type , ""); +} + +static void emit_and(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + emit_data->output[emit_data->chan] = LLVMBuildAnd(builder, + emit_data->args[0], emit_data->args[1], ""); +} + +static void emit_or(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + emit_data->output[emit_data->chan] = LLVMBuildOr(builder, + emit_data->args[0], emit_data->args[1], ""); +} + +static void emit_uadd(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + emit_data->output[emit_data->chan] = LLVMBuildAdd(builder, + emit_data->args[0], emit_data->args[1], ""); +} + +static void emit_udiv(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + emit_data->output[emit_data->chan] = LLVMBuildUDiv(builder, + emit_data->args[0], emit_data->args[1], ""); +} + +static void emit_idiv(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + emit_data->output[emit_data->chan] = LLVMBuildSDiv(builder, + emit_data->args[0], emit_data->args[1], ""); +} + +static void emit_mod(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + emit_data->output[emit_data->chan] = LLVMBuildSRem(builder, + emit_data->args[0], emit_data->args[1], ""); +} + +static void emit_umod(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + emit_data->output[emit_data->chan] = LLVMBuildURem(builder, + emit_data->args[0], emit_data->args[1], ""); +} + +static void emit_shl(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + emit_data->output[emit_data->chan] = LLVMBuildShl(builder, + emit_data->args[0], emit_data->args[1], ""); +} + +static void emit_ushr(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + emit_data->output[emit_data->chan] = LLVMBuildLShr(builder, + emit_data->args[0], emit_data->args[1], ""); +} +static void emit_ishr(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + emit_data->output[emit_data->chan] = LLVMBuildAShr(builder, + emit_data->args[0], emit_data->args[1], ""); +} + +static void emit_xor(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + emit_data->output[emit_data->chan] = LLVMBuildXor(builder, + emit_data->args[0], emit_data->args[1], ""); +} + +static void emit_ssg(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + + LLVMValueRef cmp, val; + + if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_I64SSG) { + cmp = LLVMBuildICmp(builder, LLVMIntSGT, emit_data->args[0], bld_base->int64_bld.zero, ""); + val = LLVMBuildSelect(builder, cmp, bld_base->int64_bld.one, emit_data->args[0], ""); + cmp = LLVMBuildICmp(builder, LLVMIntSGE, val, bld_base->int64_bld.zero, ""); + val = LLVMBuildSelect(builder, cmp, val, LLVMConstInt(bld_base->int64_bld.elem_type, -1, true), ""); + } else if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_ISSG) { + cmp = LLVMBuildICmp(builder, LLVMIntSGT, emit_data->args[0], bld_base->int_bld.zero, ""); + val = LLVMBuildSelect(builder, cmp, bld_base->int_bld.one, emit_data->args[0], ""); + cmp = LLVMBuildICmp(builder, LLVMIntSGE, val, bld_base->int_bld.zero, ""); + val = LLVMBuildSelect(builder, cmp, val, LLVMConstInt(bld_base->int_bld.elem_type, -1, true), ""); + } else { // float SSG + cmp = LLVMBuildFCmp(builder, LLVMRealOGT, emit_data->args[0], bld_base->base.zero, ""); + val = LLVMBuildSelect(builder, cmp, bld_base->base.one, emit_data->args[0], ""); + cmp = LLVMBuildFCmp(builder, LLVMRealOGE, val, bld_base->base.zero, ""); + val = LLVMBuildSelect(builder, cmp, val, LLVMConstReal(bld_base->base.elem_type, -1), ""); + } + + emit_data->output[emit_data->chan] = val; +} + +static void emit_ineg(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + emit_data->output[emit_data->chan] = LLVMBuildNeg(builder, + emit_data->args[0], ""); +} + +static void emit_dneg(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + emit_data->output[emit_data->chan] = LLVMBuildFNeg(builder, + emit_data->args[0], ""); +} + +static void emit_frac(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + char *intr; + + if (emit_data->info->opcode == TGSI_OPCODE_FRC) + intr = "llvm.floor.f32"; + else if (emit_data->info->opcode == TGSI_OPCODE_DFRAC) + intr = "llvm.floor.f64"; + else { + assert(0); + return; + } + + LLVMValueRef floor = lp_build_intrinsic(builder, intr, emit_data->dst_type, + &emit_data->args[0], 1, + LP_FUNC_ATTR_READNONE); + emit_data->output[emit_data->chan] = LLVMBuildFSub(builder, + emit_data->args[0], floor, ""); +} + +static void emit_f2i(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + emit_data->output[emit_data->chan] = LLVMBuildFPToSI(builder, + emit_data->args[0], bld_base->int_bld.elem_type, ""); +} + +static void emit_f2u(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + emit_data->output[emit_data->chan] = LLVMBuildFPToUI(builder, + emit_data->args[0], bld_base->uint_bld.elem_type, ""); +} + +static void emit_i2f(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + emit_data->output[emit_data->chan] = LLVMBuildSIToFP(builder, + emit_data->args[0], bld_base->base.elem_type, ""); +} + +static void emit_u2f(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + emit_data->output[emit_data->chan] = LLVMBuildUIToFP(builder, + emit_data->args[0], bld_base->base.elem_type, ""); +} + +static void +build_tgsi_intrinsic_nomem(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + struct lp_build_context *base = &bld_base->base; + emit_data->output[emit_data->chan] = + lp_build_intrinsic(base->gallivm->builder, action->intr_name, + emit_data->dst_type, emit_data->args, + emit_data->arg_count, LP_FUNC_ATTR_READNONE); +} + +static void emit_bfi(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + struct gallivm_state *gallivm = bld_base->base.gallivm; + LLVMBuilderRef builder = gallivm->builder; + LLVMValueRef bfi_args[3]; + LLVMValueRef bfi_sm5; + LLVMValueRef cond; + + // Calculate the bitmask: (((1 << src3) - 1) << src2 + bfi_args[0] = LLVMBuildShl(builder, + LLVMBuildSub(builder, + LLVMBuildShl(builder, + bld_base->int_bld.one, + emit_data->args[3], ""), + bld_base->int_bld.one, ""), + emit_data->args[2], ""); + + bfi_args[1] = LLVMBuildShl(builder, emit_data->args[1], + emit_data->args[2], ""); + + bfi_args[2] = emit_data->args[0]; + + /* Calculate: + * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2) + * Use the right-hand side, which the LLVM backend can convert to V_BFI. + */ + bfi_sm5 = + LLVMBuildXor(builder, bfi_args[2], + LLVMBuildAnd(builder, bfi_args[0], + LLVMBuildXor(builder, bfi_args[1], bfi_args[2], + ""), ""), ""); + + /* Since shifts of >= 32 bits are undefined in LLVM IR, the backend + * uses the convenient V_BFI lowering for the above, which follows SM5 + * and disagrees with GLSL semantics when bits (src3) is 32. + */ + cond = LLVMBuildICmp(builder, LLVMIntUGE, emit_data->args[3], + lp_build_const_int32(gallivm, 32), ""); + emit_data->output[emit_data->chan] = + LLVMBuildSelect(builder, cond, emit_data->args[1], bfi_sm5, ""); +} + +static void emit_bfe(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + struct gallivm_state *gallivm = bld_base->base.gallivm; + LLVMBuilderRef builder = gallivm->builder; + LLVMValueRef bfe_sm5; + LLVMValueRef cond; + + bfe_sm5 = lp_build_intrinsic(builder, action->intr_name, + emit_data->dst_type, emit_data->args, + emit_data->arg_count, LP_FUNC_ATTR_READNONE); + + /* Correct for GLSL semantics. */ + cond = LLVMBuildICmp(builder, LLVMIntUGE, emit_data->args[2], + lp_build_const_int32(gallivm, 32), ""); + emit_data->output[emit_data->chan] = + LLVMBuildSelect(builder, cond, emit_data->args[0], bfe_sm5, ""); +} + +/* this is ffs in C */ +static void emit_lsb(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + struct gallivm_state *gallivm = bld_base->base.gallivm; + LLVMBuilderRef builder = gallivm->builder; + LLVMValueRef args[2] = { + emit_data->args[0], + + /* The value of 1 means that ffs(x=0) = undef, so LLVM won't + * add special code to check for x=0. The reason is that + * the LLVM behavior for x=0 is different from what we + * need here. However, LLVM also assumes that ffs(x) is + * in [0, 31], but GLSL expects that ffs(0) = -1, so + * a conditional assignment to handle 0 is still required. + */ + LLVMConstInt(LLVMInt1TypeInContext(gallivm->context), 1, 0) + }; + + LLVMValueRef lsb = + lp_build_intrinsic(gallivm->builder, "llvm.cttz.i32", + emit_data->dst_type, args, ARRAY_SIZE(args), + LP_FUNC_ATTR_READNONE); + + /* TODO: We need an intrinsic to skip this conditional. */ + /* Check for zero: */ + emit_data->output[emit_data->chan] = + LLVMBuildSelect(builder, + LLVMBuildICmp(builder, LLVMIntEQ, args[0], + bld_base->uint_bld.zero, ""), + lp_build_const_int32(gallivm, -1), lsb, ""); +} + +/* Find the last bit set. */ +static void emit_umsb(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + struct gallivm_state *gallivm = bld_base->base.gallivm; + LLVMBuilderRef builder = gallivm->builder; + LLVMValueRef args[2] = { + emit_data->args[0], + /* Don't generate code for handling zero: */ + LLVMConstInt(LLVMInt1TypeInContext(gallivm->context), 1, 0) + }; + + LLVMValueRef msb = + lp_build_intrinsic(builder, "llvm.ctlz.i32", + emit_data->dst_type, args, ARRAY_SIZE(args), + LP_FUNC_ATTR_READNONE); + + /* The HW returns the last bit index from MSB, but TGSI wants + * the index from LSB. Invert it by doing "31 - msb". */ + msb = LLVMBuildSub(builder, lp_build_const_int32(gallivm, 31), + msb, ""); + + /* Check for zero: */ + emit_data->output[emit_data->chan] = + LLVMBuildSelect(builder, + LLVMBuildICmp(builder, LLVMIntEQ, args[0], + bld_base->uint_bld.zero, ""), + lp_build_const_int32(gallivm, -1), msb, ""); +} + +/* Find the last bit opposite of the sign bit. */ +static void emit_imsb(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + struct gallivm_state *gallivm = bld_base->base.gallivm; + LLVMBuilderRef builder = gallivm->builder; + LLVMValueRef arg = emit_data->args[0]; + + LLVMValueRef msb = + lp_build_intrinsic(builder, "llvm.AMDGPU.flbit.i32", + emit_data->dst_type, &arg, 1, + LP_FUNC_ATTR_READNONE); + + /* The HW returns the last bit index from MSB, but TGSI wants + * the index from LSB. Invert it by doing "31 - msb". */ + msb = LLVMBuildSub(builder, lp_build_const_int32(gallivm, 31), + msb, ""); + + /* If arg == 0 || arg == -1 (0xffffffff), return -1. */ + LLVMValueRef all_ones = lp_build_const_int32(gallivm, -1); + + LLVMValueRef cond = + LLVMBuildOr(builder, + LLVMBuildICmp(builder, LLVMIntEQ, arg, + bld_base->uint_bld.zero, ""), + LLVMBuildICmp(builder, LLVMIntEQ, arg, + all_ones, ""), ""); + + emit_data->output[emit_data->chan] = + LLVMBuildSelect(builder, cond, all_ones, msb, ""); +} + +static void emit_iabs(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + + emit_data->output[emit_data->chan] = + lp_build_emit_llvm_binary(bld_base, TGSI_OPCODE_IMAX, + emit_data->args[0], + LLVMBuildNeg(builder, + emit_data->args[0], "")); +} + +static void emit_minmax_int(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + LLVMIntPredicate op; + + switch (emit_data->info->opcode) { + default: + assert(0); + case TGSI_OPCODE_IMAX: + case TGSI_OPCODE_I64MAX: + op = LLVMIntSGT; + break; + case TGSI_OPCODE_IMIN: + case TGSI_OPCODE_I64MIN: + op = LLVMIntSLT; + break; + case TGSI_OPCODE_UMAX: + case TGSI_OPCODE_U64MAX: + op = LLVMIntUGT; + break; + case TGSI_OPCODE_UMIN: + case TGSI_OPCODE_U64MIN: + op = LLVMIntULT; + break; + } + + emit_data->output[emit_data->chan] = + LLVMBuildSelect(builder, + LLVMBuildICmp(builder, op, emit_data->args[0], + emit_data->args[1], ""), + emit_data->args[0], + emit_data->args[1], ""); +} + +static void pk2h_fetch_args(struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + emit_data->args[0] = lp_build_emit_fetch(bld_base, emit_data->inst, + 0, TGSI_CHAN_X); + emit_data->args[1] = lp_build_emit_fetch(bld_base, emit_data->inst, + 0, TGSI_CHAN_Y); +} + +static void emit_pk2h(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + LLVMContextRef context = bld_base->base.gallivm->context; + struct lp_build_context *uint_bld = &bld_base->uint_bld; + LLVMTypeRef fp16, i16; + LLVMValueRef const16, comp[2]; + unsigned i; + + fp16 = LLVMHalfTypeInContext(context); + i16 = LLVMInt16TypeInContext(context); + const16 = lp_build_const_int32(uint_bld->gallivm, 16); + + for (i = 0; i < 2; i++) { + comp[i] = LLVMBuildFPTrunc(builder, emit_data->args[i], fp16, ""); + comp[i] = LLVMBuildBitCast(builder, comp[i], i16, ""); + comp[i] = LLVMBuildZExt(builder, comp[i], uint_bld->elem_type, ""); + } + + comp[1] = LLVMBuildShl(builder, comp[1], const16, ""); + comp[0] = LLVMBuildOr(builder, comp[0], comp[1], ""); + + emit_data->output[emit_data->chan] = comp[0]; +} + +static void up2h_fetch_args(struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + emit_data->args[0] = lp_build_emit_fetch(bld_base, emit_data->inst, + 0, TGSI_CHAN_X); +} + +static void emit_up2h(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + LLVMContextRef context = bld_base->base.gallivm->context; + struct lp_build_context *uint_bld = &bld_base->uint_bld; + LLVMTypeRef fp16, i16; + LLVMValueRef const16, input, val; + unsigned i; + + fp16 = LLVMHalfTypeInContext(context); + i16 = LLVMInt16TypeInContext(context); + const16 = lp_build_const_int32(uint_bld->gallivm, 16); + input = emit_data->args[0]; + + for (i = 0; i < 2; i++) { + val = i == 1 ? LLVMBuildLShr(builder, input, const16, "") : input; + val = LLVMBuildTrunc(builder, val, i16, ""); + val = LLVMBuildBitCast(builder, val, fp16, ""); + emit_data->output[i] = + LLVMBuildFPExt(builder, val, bld_base->base.elem_type, ""); + } +} + +static void emit_fdiv(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + struct si_shader_context *ctx = si_shader_context(bld_base); + + emit_data->output[emit_data->chan] = + LLVMBuildFDiv(bld_base->base.gallivm->builder, + emit_data->args[0], emit_data->args[1], ""); + + /* Use v_rcp_f32 instead of precise division. */ + if (HAVE_LLVM >= 0x0309 && + !LLVMIsConstant(emit_data->output[emit_data->chan])) + LLVMSetMetadata(emit_data->output[emit_data->chan], + ctx->fpmath_md_kind, ctx->fpmath_md_2p5_ulp); +} + +/* 1/sqrt is translated to rsq for f32 if fp32 denormals are not enabled in + * the target machine. f64 needs global unsafe math flags to get rsq. */ +static void emit_rsq(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + LLVMValueRef sqrt = + lp_build_emit_llvm_unary(bld_base, TGSI_OPCODE_SQRT, + emit_data->args[0]); + + emit_data->output[emit_data->chan] = + lp_build_emit_llvm_binary(bld_base, TGSI_OPCODE_DIV, + bld_base->base.one, sqrt); +} + +void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base) +{ + lp_set_default_actions(bld_base); + + bld_base->op_actions[TGSI_OPCODE_AND].emit = emit_and; + bld_base->op_actions[TGSI_OPCODE_ARL].emit = emit_arl; + bld_base->op_actions[TGSI_OPCODE_BFI].emit = emit_bfi; + bld_base->op_actions[TGSI_OPCODE_BREV].emit = build_tgsi_intrinsic_nomem; + bld_base->op_actions[TGSI_OPCODE_BREV].intr_name = + HAVE_LLVM >= 0x0308 ? "llvm.bitreverse.i32" : "llvm.AMDGPU.brev"; + bld_base->op_actions[TGSI_OPCODE_CEIL].emit = build_tgsi_intrinsic_nomem; + bld_base->op_actions[TGSI_OPCODE_CEIL].intr_name = "llvm.ceil.f32"; + bld_base->op_actions[TGSI_OPCODE_CLAMP].emit = build_tgsi_intrinsic_nomem; + bld_base->op_actions[TGSI_OPCODE_CLAMP].intr_name = + HAVE_LLVM >= 0x0308 ? "llvm.AMDGPU.clamp." : "llvm.AMDIL.clamp."; + bld_base->op_actions[TGSI_OPCODE_CMP].emit = emit_cmp; + bld_base->op_actions[TGSI_OPCODE_COS].emit = build_tgsi_intrinsic_nomem; + bld_base->op_actions[TGSI_OPCODE_COS].intr_name = "llvm.cos.f32"; + bld_base->op_actions[TGSI_OPCODE_DABS].emit = build_tgsi_intrinsic_nomem; + bld_base->op_actions[TGSI_OPCODE_DABS].intr_name = "llvm.fabs.f64"; + bld_base->op_actions[TGSI_OPCODE_DFMA].emit = build_tgsi_intrinsic_nomem; + bld_base->op_actions[TGSI_OPCODE_DFMA].intr_name = "llvm.fma.f64"; + bld_base->op_actions[TGSI_OPCODE_DFRAC].emit = emit_frac; + bld_base->op_actions[TGSI_OPCODE_DIV].emit = emit_fdiv; + bld_base->op_actions[TGSI_OPCODE_DNEG].emit = emit_dneg; + bld_base->op_actions[TGSI_OPCODE_DSEQ].emit = emit_dcmp; + bld_base->op_actions[TGSI_OPCODE_DSGE].emit = emit_dcmp; + bld_base->op_actions[TGSI_OPCODE_DSLT].emit = emit_dcmp; + bld_base->op_actions[TGSI_OPCODE_DSNE].emit = emit_dcmp; + bld_base->op_actions[TGSI_OPCODE_DRSQ].emit = build_tgsi_intrinsic_nomem; + bld_base->op_actions[TGSI_OPCODE_DRSQ].intr_name = + HAVE_LLVM >= 0x0309 ? "llvm.amdgcn.rsq.f64" : "llvm.AMDGPU.rsq.f64"; + bld_base->op_actions[TGSI_OPCODE_DSQRT].emit = build_tgsi_intrinsic_nomem; + bld_base->op_actions[TGSI_OPCODE_DSQRT].intr_name = "llvm.sqrt.f64"; + bld_base->op_actions[TGSI_OPCODE_EX2].emit = build_tgsi_intrinsic_nomem; + bld_base->op_actions[TGSI_OPCODE_EX2].intr_name = + HAVE_LLVM >= 0x0308 ? "llvm.exp2.f32" : "llvm.AMDIL.exp."; + bld_base->op_actions[TGSI_OPCODE_FLR].emit = build_tgsi_intrinsic_nomem; + bld_base->op_actions[TGSI_OPCODE_FLR].intr_name = "llvm.floor.f32"; + bld_base->op_actions[TGSI_OPCODE_FMA].emit = + bld_base->op_actions[TGSI_OPCODE_MAD].emit; + bld_base->op_actions[TGSI_OPCODE_FRC].emit = emit_frac; + bld_base->op_actions[TGSI_OPCODE_F2I].emit = emit_f2i; + bld_base->op_actions[TGSI_OPCODE_F2U].emit = emit_f2u; + bld_base->op_actions[TGSI_OPCODE_FSEQ].emit = emit_fcmp; + bld_base->op_actions[TGSI_OPCODE_FSGE].emit = emit_fcmp; + bld_base->op_actions[TGSI_OPCODE_FSLT].emit = emit_fcmp; + bld_base->op_actions[TGSI_OPCODE_FSNE].emit = emit_fcmp; + bld_base->op_actions[TGSI_OPCODE_IABS].emit = emit_iabs; + bld_base->op_actions[TGSI_OPCODE_IBFE].emit = emit_bfe; + bld_base->op_actions[TGSI_OPCODE_IBFE].intr_name = "llvm.AMDGPU.bfe.i32"; + bld_base->op_actions[TGSI_OPCODE_IDIV].emit = emit_idiv; + bld_base->op_actions[TGSI_OPCODE_IMAX].emit = emit_minmax_int; + bld_base->op_actions[TGSI_OPCODE_IMIN].emit = emit_minmax_int; + bld_base->op_actions[TGSI_OPCODE_IMSB].emit = emit_imsb; + bld_base->op_actions[TGSI_OPCODE_INEG].emit = emit_ineg; + bld_base->op_actions[TGSI_OPCODE_ISHR].emit = emit_ishr; + bld_base->op_actions[TGSI_OPCODE_ISGE].emit = emit_icmp; + bld_base->op_actions[TGSI_OPCODE_ISLT].emit = emit_icmp; + bld_base->op_actions[TGSI_OPCODE_ISSG].emit = emit_ssg; + bld_base->op_actions[TGSI_OPCODE_I2F].emit = emit_i2f; + bld_base->op_actions[TGSI_OPCODE_KILL_IF].fetch_args = kill_if_fetch_args; + bld_base->op_actions[TGSI_OPCODE_KILL_IF].emit = kil_emit; + bld_base->op_actions[TGSI_OPCODE_KILL_IF].intr_name = "llvm.AMDGPU.kill"; + bld_base->op_actions[TGSI_OPCODE_KILL].emit = lp_build_tgsi_intrinsic; + bld_base->op_actions[TGSI_OPCODE_KILL].intr_name = "llvm.AMDGPU.kilp"; + bld_base->op_actions[TGSI_OPCODE_LSB].emit = emit_lsb; + bld_base->op_actions[TGSI_OPCODE_LG2].emit = build_tgsi_intrinsic_nomem; + bld_base->op_actions[TGSI_OPCODE_LG2].intr_name = "llvm.log2.f32"; + bld_base->op_actions[TGSI_OPCODE_MAX].emit = build_tgsi_intrinsic_nomem; + bld_base->op_actions[TGSI_OPCODE_MAX].intr_name = "llvm.maxnum.f32"; + bld_base->op_actions[TGSI_OPCODE_MIN].emit = build_tgsi_intrinsic_nomem; + bld_base->op_actions[TGSI_OPCODE_MIN].intr_name = "llvm.minnum.f32"; + bld_base->op_actions[TGSI_OPCODE_MOD].emit = emit_mod; + bld_base->op_actions[TGSI_OPCODE_UMSB].emit = emit_umsb; + bld_base->op_actions[TGSI_OPCODE_NOT].emit = emit_not; + bld_base->op_actions[TGSI_OPCODE_OR].emit = emit_or; + bld_base->op_actions[TGSI_OPCODE_PK2H].fetch_args = pk2h_fetch_args; + bld_base->op_actions[TGSI_OPCODE_PK2H].emit = emit_pk2h; + bld_base->op_actions[TGSI_OPCODE_POPC].emit = build_tgsi_intrinsic_nomem; + bld_base->op_actions[TGSI_OPCODE_POPC].intr_name = "llvm.ctpop.i32"; + bld_base->op_actions[TGSI_OPCODE_POW].emit = build_tgsi_intrinsic_nomem; + bld_base->op_actions[TGSI_OPCODE_POW].intr_name = "llvm.pow.f32"; + bld_base->op_actions[TGSI_OPCODE_ROUND].emit = build_tgsi_intrinsic_nomem; + bld_base->op_actions[TGSI_OPCODE_ROUND].intr_name = "llvm.rint.f32"; + bld_base->op_actions[TGSI_OPCODE_RSQ].emit = emit_rsq; + bld_base->op_actions[TGSI_OPCODE_SGE].emit = emit_set_cond; + bld_base->op_actions[TGSI_OPCODE_SEQ].emit = emit_set_cond; + bld_base->op_actions[TGSI_OPCODE_SHL].emit = emit_shl; + bld_base->op_actions[TGSI_OPCODE_SLE].emit = emit_set_cond; + bld_base->op_actions[TGSI_OPCODE_SLT].emit = emit_set_cond; + bld_base->op_actions[TGSI_OPCODE_SNE].emit = emit_set_cond; + bld_base->op_actions[TGSI_OPCODE_SGT].emit = emit_set_cond; + bld_base->op_actions[TGSI_OPCODE_SIN].emit = build_tgsi_intrinsic_nomem; + bld_base->op_actions[TGSI_OPCODE_SIN].intr_name = "llvm.sin.f32"; + bld_base->op_actions[TGSI_OPCODE_SQRT].emit = build_tgsi_intrinsic_nomem; + bld_base->op_actions[TGSI_OPCODE_SQRT].intr_name = "llvm.sqrt.f32"; + bld_base->op_actions[TGSI_OPCODE_SSG].emit = emit_ssg; + bld_base->op_actions[TGSI_OPCODE_TRUNC].emit = build_tgsi_intrinsic_nomem; + bld_base->op_actions[TGSI_OPCODE_TRUNC].intr_name = "llvm.trunc.f32"; + bld_base->op_actions[TGSI_OPCODE_UADD].emit = emit_uadd; + bld_base->op_actions[TGSI_OPCODE_UBFE].emit = emit_bfe; + bld_base->op_actions[TGSI_OPCODE_UBFE].intr_name = "llvm.AMDGPU.bfe.u32"; + bld_base->op_actions[TGSI_OPCODE_UDIV].emit = emit_udiv; + bld_base->op_actions[TGSI_OPCODE_UMAX].emit = emit_minmax_int; + bld_base->op_actions[TGSI_OPCODE_UMIN].emit = emit_minmax_int; + bld_base->op_actions[TGSI_OPCODE_UMOD].emit = emit_umod; + bld_base->op_actions[TGSI_OPCODE_USEQ].emit = emit_icmp; + bld_base->op_actions[TGSI_OPCODE_USGE].emit = emit_icmp; + bld_base->op_actions[TGSI_OPCODE_USHR].emit = emit_ushr; + bld_base->op_actions[TGSI_OPCODE_USLT].emit = emit_icmp; + bld_base->op_actions[TGSI_OPCODE_USNE].emit = emit_icmp; + bld_base->op_actions[TGSI_OPCODE_U2F].emit = emit_u2f; + bld_base->op_actions[TGSI_OPCODE_XOR].emit = emit_xor; + bld_base->op_actions[TGSI_OPCODE_UCMP].emit = emit_ucmp; + bld_base->op_actions[TGSI_OPCODE_UP2H].fetch_args = up2h_fetch_args; + bld_base->op_actions[TGSI_OPCODE_UP2H].emit = emit_up2h; + + bld_base->op_actions[TGSI_OPCODE_I64MAX].emit = emit_minmax_int; + bld_base->op_actions[TGSI_OPCODE_I64MIN].emit = emit_minmax_int; + bld_base->op_actions[TGSI_OPCODE_U64MAX].emit = emit_minmax_int; + bld_base->op_actions[TGSI_OPCODE_U64MIN].emit = emit_minmax_int; + bld_base->op_actions[TGSI_OPCODE_I64ABS].emit = emit_iabs; + bld_base->op_actions[TGSI_OPCODE_I64SSG].emit = emit_ssg; + bld_base->op_actions[TGSI_OPCODE_I64NEG].emit = emit_ineg; + + bld_base->op_actions[TGSI_OPCODE_U64SEQ].emit = emit_icmp; + bld_base->op_actions[TGSI_OPCODE_U64SNE].emit = emit_icmp; + bld_base->op_actions[TGSI_OPCODE_U64SGE].emit = emit_icmp; + bld_base->op_actions[TGSI_OPCODE_U64SLT].emit = emit_icmp; + bld_base->op_actions[TGSI_OPCODE_I64SGE].emit = emit_icmp; + bld_base->op_actions[TGSI_OPCODE_I64SLT].emit = emit_icmp; + + bld_base->op_actions[TGSI_OPCODE_U64ADD].emit = emit_uadd; + bld_base->op_actions[TGSI_OPCODE_U64SHL].emit = emit_shl; + bld_base->op_actions[TGSI_OPCODE_U64SHR].emit = emit_ushr; + bld_base->op_actions[TGSI_OPCODE_I64SHR].emit = emit_ishr; + + bld_base->op_actions[TGSI_OPCODE_U64MOD].emit = emit_umod; + bld_base->op_actions[TGSI_OPCODE_I64MOD].emit = emit_mod; + bld_base->op_actions[TGSI_OPCODE_U64DIV].emit = emit_udiv; + bld_base->op_actions[TGSI_OPCODE_I64DIV].emit = emit_idiv; +} diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c mesa-17.0.7/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c --- mesa-12.0.6/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,1446 @@ +/* + * Copyright 2016 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "si_shader_internal.h" +#include "si_pipe.h" +#include "radeon/radeon_elf_util.h" + +#include "gallivm/lp_bld_const.h" +#include "gallivm/lp_bld_gather.h" +#include "gallivm/lp_bld_flow.h" +#include "gallivm/lp_bld_init.h" +#include "gallivm/lp_bld_intr.h" +#include "gallivm/lp_bld_misc.h" +#include "gallivm/lp_bld_swizzle.h" +#include "tgsi/tgsi_info.h" +#include "tgsi/tgsi_parse.h" +#include "util/u_math.h" +#include "util/u_memory.h" +#include "util/u_debug.h" + +#include +#include +#include +#include + +/* Data for if/else/endif and bgnloop/endloop control flow structures. + */ +struct si_llvm_flow { + /* Loop exit or next part of if/else/endif. */ + LLVMBasicBlockRef next_block; + LLVMBasicBlockRef loop_entry_block; +}; + +#define CPU_STRING_LEN 30 +#define FS_STRING_LEN 30 +#define TRIPLE_STRING_LEN 7 + +/** + * Shader types for the LLVM backend. + */ +enum si_llvm_shader_type { + RADEON_LLVM_SHADER_PS = 0, + RADEON_LLVM_SHADER_VS = 1, + RADEON_LLVM_SHADER_GS = 2, + RADEON_LLVM_SHADER_CS = 3, +}; + +enum si_llvm_calling_convention { + RADEON_LLVM_AMDGPU_VS = 87, + RADEON_LLVM_AMDGPU_GS = 88, + RADEON_LLVM_AMDGPU_PS = 89, + RADEON_LLVM_AMDGPU_CS = 90, +}; + +void si_llvm_add_attribute(LLVMValueRef F, const char *name, int value) +{ + char str[16]; + + snprintf(str, sizeof(str), "%i", value); + LLVMAddTargetDependentFunctionAttr(F, name, str); +} + +/** + * Set the shader type we want to compile + * + * @param type shader type to set + */ +void si_llvm_shader_type(LLVMValueRef F, unsigned type) +{ + enum si_llvm_shader_type llvm_type; + enum si_llvm_calling_convention calling_conv; + + switch (type) { + case PIPE_SHADER_VERTEX: + case PIPE_SHADER_TESS_CTRL: + case PIPE_SHADER_TESS_EVAL: + llvm_type = RADEON_LLVM_SHADER_VS; + calling_conv = RADEON_LLVM_AMDGPU_VS; + break; + case PIPE_SHADER_GEOMETRY: + llvm_type = RADEON_LLVM_SHADER_GS; + calling_conv = RADEON_LLVM_AMDGPU_GS; + break; + case PIPE_SHADER_FRAGMENT: + llvm_type = RADEON_LLVM_SHADER_PS; + calling_conv = RADEON_LLVM_AMDGPU_PS; + break; + case PIPE_SHADER_COMPUTE: + llvm_type = RADEON_LLVM_SHADER_CS; + calling_conv = RADEON_LLVM_AMDGPU_CS; + break; + default: + unreachable("Unhandle shader type"); + } + + if (HAVE_LLVM >= 0x309) + LLVMSetFunctionCallConv(F, calling_conv); + else + si_llvm_add_attribute(F, "ShaderType", llvm_type); +} + +static void init_amdgpu_target() +{ + gallivm_init_llvm_targets(); +#if HAVE_LLVM < 0x0307 + LLVMInitializeR600TargetInfo(); + LLVMInitializeR600Target(); + LLVMInitializeR600TargetMC(); + LLVMInitializeR600AsmPrinter(); +#else + LLVMInitializeAMDGPUTargetInfo(); + LLVMInitializeAMDGPUTarget(); + LLVMInitializeAMDGPUTargetMC(); + LLVMInitializeAMDGPUAsmPrinter(); + +#endif + if (HAVE_LLVM >= 0x0400) { + /* + * Workaround for bug in llvm 4.0 that causes image intrinsics + * to disappear. + * https://reviews.llvm.org/D26348 + */ + const char *argv[2] = {"mesa", "-simplifycfg-sink-common=false"}; + LLVMParseCommandLineOptions(2, argv, NULL); + } +} + +static once_flag init_amdgpu_target_once_flag = ONCE_FLAG_INIT; + +LLVMTargetRef si_llvm_get_amdgpu_target(const char *triple) +{ + LLVMTargetRef target = NULL; + char *err_message = NULL; + + call_once(&init_amdgpu_target_once_flag, init_amdgpu_target); + + if (LLVMGetTargetFromTriple(triple, &target, &err_message)) { + fprintf(stderr, "Cannot find target for triple %s ", triple); + if (err_message) { + fprintf(stderr, "%s\n", err_message); + } + LLVMDisposeMessage(err_message); + return NULL; + } + return target; +} + +struct si_llvm_diagnostics { + struct pipe_debug_callback *debug; + unsigned retval; +}; + +static void si_diagnostic_handler(LLVMDiagnosticInfoRef di, void *context) +{ + struct si_llvm_diagnostics *diag = (struct si_llvm_diagnostics *)context; + LLVMDiagnosticSeverity severity = LLVMGetDiagInfoSeverity(di); + char *description = LLVMGetDiagInfoDescription(di); + const char *severity_str = NULL; + + switch (severity) { + case LLVMDSError: + severity_str = "error"; + break; + case LLVMDSWarning: + severity_str = "warning"; + break; + case LLVMDSRemark: + severity_str = "remark"; + break; + case LLVMDSNote: + severity_str = "note"; + break; + default: + severity_str = "unknown"; + } + + pipe_debug_message(diag->debug, SHADER_INFO, + "LLVM diagnostic (%s): %s", severity_str, description); + + if (severity == LLVMDSError) { + diag->retval = 1; + fprintf(stderr,"LLVM triggered Diagnostic Handler: %s\n", description); + } + + LLVMDisposeMessage(description); +} + +/** + * Compile an LLVM module to machine code. + * + * @returns 0 for success, 1 for failure + */ +unsigned si_llvm_compile(LLVMModuleRef M, struct radeon_shader_binary *binary, + LLVMTargetMachineRef tm, + struct pipe_debug_callback *debug) +{ + struct si_llvm_diagnostics diag; + char *err; + LLVMContextRef llvm_ctx; + LLVMMemoryBufferRef out_buffer; + unsigned buffer_size; + const char *buffer_data; + LLVMBool mem_err; + + diag.debug = debug; + diag.retval = 0; + + /* Setup Diagnostic Handler*/ + llvm_ctx = LLVMGetModuleContext(M); + + LLVMContextSetDiagnosticHandler(llvm_ctx, si_diagnostic_handler, &diag); + + /* Compile IR*/ + mem_err = LLVMTargetMachineEmitToMemoryBuffer(tm, M, LLVMObjectFile, &err, + &out_buffer); + + /* Process Errors/Warnings */ + if (mem_err) { + fprintf(stderr, "%s: %s", __FUNCTION__, err); + pipe_debug_message(debug, SHADER_INFO, + "LLVM emit error: %s", err); + FREE(err); + diag.retval = 1; + goto out; + } + + /* Extract Shader Code*/ + buffer_size = LLVMGetBufferSize(out_buffer); + buffer_data = LLVMGetBufferStart(out_buffer); + + radeon_elf_read(buffer_data, buffer_size, binary); + + /* Clean up */ + LLVMDisposeMemoryBuffer(out_buffer); + +out: + if (diag.retval != 0) + pipe_debug_message(debug, SHADER_INFO, "LLVM compile failed"); + return diag.retval; +} + +LLVMTypeRef tgsi2llvmtype(struct lp_build_tgsi_context *bld_base, + enum tgsi_opcode_type type) +{ + LLVMContextRef ctx = bld_base->base.gallivm->context; + + switch (type) { + case TGSI_TYPE_UNSIGNED: + case TGSI_TYPE_SIGNED: + return LLVMInt32TypeInContext(ctx); + case TGSI_TYPE_UNSIGNED64: + case TGSI_TYPE_SIGNED64: + return LLVMInt64TypeInContext(ctx); + case TGSI_TYPE_DOUBLE: + return LLVMDoubleTypeInContext(ctx); + case TGSI_TYPE_UNTYPED: + case TGSI_TYPE_FLOAT: + return LLVMFloatTypeInContext(ctx); + default: break; + } + return 0; +} + +LLVMValueRef bitcast(struct lp_build_tgsi_context *bld_base, + enum tgsi_opcode_type type, LLVMValueRef value) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + LLVMTypeRef dst_type = tgsi2llvmtype(bld_base, type); + + if (dst_type) + return LLVMBuildBitCast(builder, value, dst_type, ""); + else + return value; +} + +/** + * Return a value that is equal to the given i32 \p index if it lies in [0,num) + * or an undefined value in the same interval otherwise. + */ +LLVMValueRef si_llvm_bound_index(struct si_shader_context *ctx, + LLVMValueRef index, + unsigned num) +{ + struct gallivm_state *gallivm = &ctx->gallivm; + LLVMBuilderRef builder = gallivm->builder; + LLVMValueRef c_max = lp_build_const_int32(gallivm, num - 1); + LLVMValueRef cc; + + if (util_is_power_of_two(num)) { + index = LLVMBuildAnd(builder, index, c_max, ""); + } else { + /* In theory, this MAX pattern should result in code that is + * as good as the bit-wise AND above. + * + * In practice, LLVM generates worse code (at the time of + * writing), because its value tracking is not strong enough. + */ + cc = LLVMBuildICmp(builder, LLVMIntULE, index, c_max, ""); + index = LLVMBuildSelect(builder, cc, index, c_max, ""); + } + + return index; +} + +static struct si_llvm_flow * +get_current_flow(struct si_shader_context *ctx) +{ + if (ctx->flow_depth > 0) + return &ctx->flow[ctx->flow_depth - 1]; + return NULL; +} + +static struct si_llvm_flow * +get_innermost_loop(struct si_shader_context *ctx) +{ + for (unsigned i = ctx->flow_depth; i > 0; --i) { + if (ctx->flow[i - 1].loop_entry_block) + return &ctx->flow[i - 1]; + } + return NULL; +} + +static struct si_llvm_flow * +push_flow(struct si_shader_context *ctx) +{ + struct si_llvm_flow *flow; + + if (ctx->flow_depth >= ctx->flow_depth_max) { + unsigned new_max = MAX2(ctx->flow_depth << 1, RADEON_LLVM_INITIAL_CF_DEPTH); + ctx->flow = REALLOC(ctx->flow, + ctx->flow_depth_max * sizeof(*ctx->flow), + new_max * sizeof(*ctx->flow)); + ctx->flow_depth_max = new_max; + } + + flow = &ctx->flow[ctx->flow_depth]; + ctx->flow_depth++; + + flow->next_block = NULL; + flow->loop_entry_block = NULL; + return flow; +} + +static LLVMValueRef emit_swizzle(struct lp_build_tgsi_context *bld_base, + LLVMValueRef value, + unsigned swizzle_x, + unsigned swizzle_y, + unsigned swizzle_z, + unsigned swizzle_w) +{ + LLVMValueRef swizzles[4]; + LLVMTypeRef i32t = + LLVMInt32TypeInContext(bld_base->base.gallivm->context); + + swizzles[0] = LLVMConstInt(i32t, swizzle_x, 0); + swizzles[1] = LLVMConstInt(i32t, swizzle_y, 0); + swizzles[2] = LLVMConstInt(i32t, swizzle_z, 0); + swizzles[3] = LLVMConstInt(i32t, swizzle_w, 0); + + return LLVMBuildShuffleVector(bld_base->base.gallivm->builder, + value, + LLVMGetUndef(LLVMTypeOf(value)), + LLVMConstVector(swizzles, 4), ""); +} + +/** + * Return the description of the array covering the given temporary register + * index. + */ +static unsigned +get_temp_array_id(struct lp_build_tgsi_context *bld_base, + unsigned reg_index, + const struct tgsi_ind_register *reg) +{ + struct si_shader_context *ctx = si_shader_context(bld_base); + unsigned num_arrays = ctx->bld_base.info->array_max[TGSI_FILE_TEMPORARY]; + unsigned i; + + if (reg && reg->ArrayID > 0 && reg->ArrayID <= num_arrays) + return reg->ArrayID; + + for (i = 0; i < num_arrays; i++) { + const struct tgsi_array_info *array = &ctx->temp_arrays[i]; + + if (reg_index >= array->range.First && reg_index <= array->range.Last) + return i + 1; + } + + return 0; +} + +static struct tgsi_declaration_range +get_array_range(struct lp_build_tgsi_context *bld_base, + unsigned File, unsigned reg_index, + const struct tgsi_ind_register *reg) +{ + struct si_shader_context *ctx = si_shader_context(bld_base); + struct tgsi_declaration_range range; + + if (File == TGSI_FILE_TEMPORARY) { + unsigned array_id = get_temp_array_id(bld_base, reg_index, reg); + if (array_id) + return ctx->temp_arrays[array_id - 1].range; + } + + range.First = 0; + range.Last = bld_base->info->file_max[File]; + return range; +} + +static LLVMValueRef +emit_array_index(struct si_shader_context *ctx, + const struct tgsi_ind_register *reg, + unsigned offset) +{ + struct gallivm_state *gallivm = ctx->bld_base.base.gallivm; + + if (!reg) { + return lp_build_const_int32(gallivm, offset); + } + LLVMValueRef addr = LLVMBuildLoad(gallivm->builder, ctx->addrs[reg->Index][reg->Swizzle], ""); + return LLVMBuildAdd(gallivm->builder, addr, lp_build_const_int32(gallivm, offset), ""); +} + +/** + * For indirect registers, construct a pointer directly to the requested + * element using getelementptr if possible. + * + * Returns NULL if the insertelement/extractelement fallback for array access + * must be used. + */ +static LLVMValueRef +get_pointer_into_array(struct si_shader_context *ctx, + unsigned file, + unsigned swizzle, + unsigned reg_index, + const struct tgsi_ind_register *reg_indirect) +{ + unsigned array_id; + struct tgsi_array_info *array; + struct gallivm_state *gallivm = ctx->bld_base.base.gallivm; + LLVMBuilderRef builder = gallivm->builder; + LLVMValueRef idxs[2]; + LLVMValueRef index; + LLVMValueRef alloca; + + if (file != TGSI_FILE_TEMPORARY) + return NULL; + + array_id = get_temp_array_id(&ctx->bld_base, reg_index, reg_indirect); + if (!array_id) + return NULL; + + alloca = ctx->temp_array_allocas[array_id - 1]; + if (!alloca) + return NULL; + + array = &ctx->temp_arrays[array_id - 1]; + + if (!(array->writemask & (1 << swizzle))) + return ctx->undef_alloca; + + index = emit_array_index(ctx, reg_indirect, + reg_index - ctx->temp_arrays[array_id - 1].range.First); + + /* Ensure that the index is within a valid range, to guard against + * VM faults and overwriting critical data (e.g. spilled resource + * descriptors). + * + * TODO It should be possible to avoid the additional instructions + * if LLVM is changed so that it guarantuees: + * 1. the scratch space descriptor isolates the current wave (this + * could even save the scratch offset SGPR at the cost of an + * additional SALU instruction) + * 2. the memory for allocas must be allocated at the _end_ of the + * scratch space (after spilled registers) + */ + index = si_llvm_bound_index(ctx, index, array->range.Last - array->range.First + 1); + + index = LLVMBuildMul( + builder, index, + lp_build_const_int32(gallivm, util_bitcount(array->writemask)), + ""); + index = LLVMBuildAdd( + builder, index, + lp_build_const_int32( + gallivm, + util_bitcount(array->writemask & ((1 << swizzle) - 1))), + ""); + idxs[0] = ctx->bld_base.uint_bld.zero; + idxs[1] = index; + return LLVMBuildGEP(builder, alloca, idxs, 2, ""); +} + +LLVMValueRef +si_llvm_emit_fetch_64bit(struct lp_build_tgsi_context *bld_base, + enum tgsi_opcode_type type, + LLVMValueRef ptr, + LLVMValueRef ptr2) +{ + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + LLVMValueRef result; + + result = LLVMGetUndef(LLVMVectorType(LLVMIntTypeInContext(bld_base->base.gallivm->context, 32), bld_base->base.type.length * 2)); + + result = LLVMBuildInsertElement(builder, + result, + bitcast(bld_base, TGSI_TYPE_UNSIGNED, ptr), + bld_base->int_bld.zero, ""); + result = LLVMBuildInsertElement(builder, + result, + bitcast(bld_base, TGSI_TYPE_UNSIGNED, ptr2), + bld_base->int_bld.one, ""); + return bitcast(bld_base, type, result); +} + +static LLVMValueRef +emit_array_fetch(struct lp_build_tgsi_context *bld_base, + unsigned File, enum tgsi_opcode_type type, + struct tgsi_declaration_range range, + unsigned swizzle) +{ + struct si_shader_context *ctx = si_shader_context(bld_base); + struct gallivm_state *gallivm = ctx->bld_base.base.gallivm; + + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + + unsigned i, size = range.Last - range.First + 1; + LLVMTypeRef vec = LLVMVectorType(tgsi2llvmtype(bld_base, type), size); + LLVMValueRef result = LLVMGetUndef(vec); + + struct tgsi_full_src_register tmp_reg = {}; + tmp_reg.Register.File = File; + + for (i = 0; i < size; ++i) { + tmp_reg.Register.Index = i + range.First; + LLVMValueRef temp = si_llvm_emit_fetch(bld_base, &tmp_reg, type, swizzle); + result = LLVMBuildInsertElement(builder, result, temp, + lp_build_const_int32(gallivm, i), "array_vector"); + } + return result; +} + +static LLVMValueRef +load_value_from_array(struct lp_build_tgsi_context *bld_base, + unsigned file, + enum tgsi_opcode_type type, + unsigned swizzle, + unsigned reg_index, + const struct tgsi_ind_register *reg_indirect) +{ + struct si_shader_context *ctx = si_shader_context(bld_base); + struct gallivm_state *gallivm = bld_base->base.gallivm; + LLVMBuilderRef builder = gallivm->builder; + LLVMValueRef ptr; + + ptr = get_pointer_into_array(ctx, file, swizzle, reg_index, reg_indirect); + if (ptr) { + LLVMValueRef val = LLVMBuildLoad(builder, ptr, ""); + if (tgsi_type_is_64bit(type)) { + LLVMValueRef ptr_hi, val_hi; + ptr_hi = LLVMBuildGEP(builder, ptr, &bld_base->uint_bld.one, 1, ""); + val_hi = LLVMBuildLoad(builder, ptr_hi, ""); + val = si_llvm_emit_fetch_64bit(bld_base, type, val, val_hi); + } + + return val; + } else { + struct tgsi_declaration_range range = + get_array_range(bld_base, file, reg_index, reg_indirect); + LLVMValueRef index = + emit_array_index(ctx, reg_indirect, reg_index - range.First); + LLVMValueRef array = + emit_array_fetch(bld_base, file, type, range, swizzle); + return LLVMBuildExtractElement(builder, array, index, ""); + } +} + +static void +store_value_to_array(struct lp_build_tgsi_context *bld_base, + LLVMValueRef value, + unsigned file, + unsigned chan_index, + unsigned reg_index, + const struct tgsi_ind_register *reg_indirect) +{ + struct si_shader_context *ctx = si_shader_context(bld_base); + struct gallivm_state *gallivm = bld_base->base.gallivm; + LLVMBuilderRef builder = gallivm->builder; + LLVMValueRef ptr; + + ptr = get_pointer_into_array(ctx, file, chan_index, reg_index, reg_indirect); + if (ptr) { + LLVMBuildStore(builder, value, ptr); + } else { + unsigned i, size; + struct tgsi_declaration_range range = get_array_range(bld_base, file, reg_index, reg_indirect); + LLVMValueRef index = emit_array_index(ctx, reg_indirect, reg_index - range.First); + LLVMValueRef array = + emit_array_fetch(bld_base, file, TGSI_TYPE_FLOAT, range, chan_index); + LLVMValueRef temp_ptr; + + array = LLVMBuildInsertElement(builder, array, value, index, ""); + + size = range.Last - range.First + 1; + for (i = 0; i < size; ++i) { + switch(file) { + case TGSI_FILE_OUTPUT: + temp_ptr = ctx->outputs[i + range.First][chan_index]; + break; + + case TGSI_FILE_TEMPORARY: + if (range.First + i >= ctx->temps_count) + continue; + temp_ptr = ctx->temps[(i + range.First) * TGSI_NUM_CHANNELS + chan_index]; + break; + + default: + continue; + } + value = LLVMBuildExtractElement(builder, array, + lp_build_const_int32(gallivm, i), ""); + LLVMBuildStore(builder, value, temp_ptr); + } + } +} + +/* If this is true, preload FS inputs at the beginning of shaders. Otherwise, + * reload them at each use. This must be true if the shader is using + * derivatives, because all inputs should be loaded in the WQM mode. + */ +static bool si_preload_fs_inputs(struct si_shader_context *ctx) +{ + return ctx->shader->selector->info.uses_derivatives; +} + +static LLVMValueRef +get_output_ptr(struct lp_build_tgsi_context *bld_base, unsigned index, + unsigned chan) +{ + struct si_shader_context *ctx = si_shader_context(bld_base); + + assert(index <= ctx->bld_base.info->file_max[TGSI_FILE_OUTPUT]); + return ctx->outputs[index][chan]; +} + +LLVMValueRef si_llvm_emit_fetch(struct lp_build_tgsi_context *bld_base, + const struct tgsi_full_src_register *reg, + enum tgsi_opcode_type type, + unsigned swizzle) +{ + struct si_shader_context *ctx = si_shader_context(bld_base); + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + LLVMValueRef result = NULL, ptr, ptr2; + + if (swizzle == ~0) { + LLVMValueRef values[TGSI_NUM_CHANNELS]; + unsigned chan; + for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) { + values[chan] = si_llvm_emit_fetch(bld_base, reg, type, chan); + } + return lp_build_gather_values(bld_base->base.gallivm, values, + TGSI_NUM_CHANNELS); + } + + if (reg->Register.Indirect) { + LLVMValueRef load = load_value_from_array(bld_base, reg->Register.File, type, + swizzle, reg->Register.Index, ®->Indirect); + return bitcast(bld_base, type, load); + } + + switch(reg->Register.File) { + case TGSI_FILE_IMMEDIATE: { + LLVMTypeRef ctype = tgsi2llvmtype(bld_base, type); + if (tgsi_type_is_64bit(type)) { + result = LLVMGetUndef(LLVMVectorType(LLVMIntTypeInContext(bld_base->base.gallivm->context, 32), bld_base->base.type.length * 2)); + result = LLVMConstInsertElement(result, + ctx->imms[reg->Register.Index * TGSI_NUM_CHANNELS + swizzle], + bld_base->int_bld.zero); + result = LLVMConstInsertElement(result, + ctx->imms[reg->Register.Index * TGSI_NUM_CHANNELS + swizzle + 1], + bld_base->int_bld.one); + return LLVMConstBitCast(result, ctype); + } else { + return LLVMConstBitCast(ctx->imms[reg->Register.Index * TGSI_NUM_CHANNELS + swizzle], ctype); + } + } + + case TGSI_FILE_INPUT: { + unsigned index = reg->Register.Index; + LLVMValueRef input[4]; + + /* I don't think doing this for vertex shaders is beneficial. + * For those, we want to make sure the VMEM loads are executed + * only once. Fragment shaders don't care much, because + * v_interp instructions are much cheaper than VMEM loads. + */ + if (!si_preload_fs_inputs(ctx) && + ctx->bld_base.info->processor == PIPE_SHADER_FRAGMENT) + ctx->load_input(ctx, index, &ctx->input_decls[index], input); + else + memcpy(input, &ctx->inputs[index * 4], sizeof(input)); + + result = input[swizzle]; + + if (tgsi_type_is_64bit(type)) { + ptr = result; + ptr2 = input[swizzle + 1]; + return si_llvm_emit_fetch_64bit(bld_base, type, ptr, ptr2); + } + break; + } + + case TGSI_FILE_TEMPORARY: + if (reg->Register.Index >= ctx->temps_count) + return LLVMGetUndef(tgsi2llvmtype(bld_base, type)); + ptr = ctx->temps[reg->Register.Index * TGSI_NUM_CHANNELS + swizzle]; + if (tgsi_type_is_64bit(type)) { + ptr2 = ctx->temps[reg->Register.Index * TGSI_NUM_CHANNELS + swizzle + 1]; + return si_llvm_emit_fetch_64bit(bld_base, type, + LLVMBuildLoad(builder, ptr, ""), + LLVMBuildLoad(builder, ptr2, "")); + } + result = LLVMBuildLoad(builder, ptr, ""); + break; + + case TGSI_FILE_OUTPUT: + ptr = get_output_ptr(bld_base, reg->Register.Index, swizzle); + if (tgsi_type_is_64bit(type)) { + ptr2 = get_output_ptr(bld_base, reg->Register.Index, swizzle + 1); + return si_llvm_emit_fetch_64bit(bld_base, type, + LLVMBuildLoad(builder, ptr, ""), + LLVMBuildLoad(builder, ptr2, "")); + } + result = LLVMBuildLoad(builder, ptr, ""); + break; + + default: + return LLVMGetUndef(tgsi2llvmtype(bld_base, type)); + } + + return bitcast(bld_base, type, result); +} + +static LLVMValueRef fetch_system_value(struct lp_build_tgsi_context *bld_base, + const struct tgsi_full_src_register *reg, + enum tgsi_opcode_type type, + unsigned swizzle) +{ + struct si_shader_context *ctx = si_shader_context(bld_base); + struct gallivm_state *gallivm = bld_base->base.gallivm; + + LLVMValueRef cval = ctx->system_values[reg->Register.Index]; + if (LLVMGetTypeKind(LLVMTypeOf(cval)) == LLVMVectorTypeKind) { + cval = LLVMBuildExtractElement(gallivm->builder, cval, + lp_build_const_int32(gallivm, swizzle), ""); + } + return bitcast(bld_base, type, cval); +} + +static void emit_declaration(struct lp_build_tgsi_context *bld_base, + const struct tgsi_full_declaration *decl) +{ + struct si_shader_context *ctx = si_shader_context(bld_base); + LLVMBuilderRef builder = bld_base->base.gallivm->builder; + unsigned first, last, i; + switch(decl->Declaration.File) { + case TGSI_FILE_ADDRESS: + { + unsigned idx; + for (idx = decl->Range.First; idx <= decl->Range.Last; idx++) { + unsigned chan; + for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) { + ctx->addrs[idx][chan] = lp_build_alloca_undef( + &ctx->gallivm, + ctx->bld_base.uint_bld.elem_type, ""); + } + } + break; + } + + case TGSI_FILE_TEMPORARY: + { + char name[16] = ""; + LLVMValueRef array_alloca = NULL; + unsigned decl_size; + unsigned writemask = decl->Declaration.UsageMask; + first = decl->Range.First; + last = decl->Range.Last; + decl_size = 4 * ((last - first) + 1); + + if (decl->Declaration.Array) { + unsigned id = decl->Array.ArrayID - 1; + unsigned array_size; + + writemask &= ctx->temp_arrays[id].writemask; + ctx->temp_arrays[id].writemask = writemask; + array_size = ((last - first) + 1) * util_bitcount(writemask); + + /* If the array has more than 16 elements, store it + * in memory using an alloca that spans the entire + * array. + * + * Otherwise, store each array element individually. + * We will then generate vectors (per-channel, up to + * <16 x float> if the usagemask is a single bit) for + * indirect addressing. + * + * Note that 16 is the number of vector elements that + * LLVM will store in a register, so theoretically an + * array with up to 4 * 16 = 64 elements could be + * handled this way, but whether that's a good idea + * depends on VGPR register pressure elsewhere. + * + * FIXME: We shouldn't need to have the non-alloca + * code path for arrays. LLVM should be smart enough to + * promote allocas into registers when profitable. + * + * LLVM 3.8 crashes with this. + */ + if (HAVE_LLVM >= 0x0309 && array_size > 16) { + array_alloca = LLVMBuildAlloca(builder, + LLVMArrayType(bld_base->base.vec_type, + array_size), "array"); + ctx->temp_array_allocas[id] = array_alloca; + } + } + + if (!ctx->temps_count) { + ctx->temps_count = bld_base->info->file_max[TGSI_FILE_TEMPORARY] + 1; + ctx->temps = MALLOC(TGSI_NUM_CHANNELS * ctx->temps_count * sizeof(LLVMValueRef)); + } + if (!array_alloca) { + for (i = 0; i < decl_size; ++i) { +#ifdef DEBUG + snprintf(name, sizeof(name), "TEMP%d.%c", + first + i / 4, "xyzw"[i % 4]); +#endif + ctx->temps[first * TGSI_NUM_CHANNELS + i] = + lp_build_alloca_undef(bld_base->base.gallivm, + bld_base->base.vec_type, + name); + } + } else { + LLVMValueRef idxs[2] = { + bld_base->uint_bld.zero, + NULL + }; + unsigned j = 0; + + if (writemask != TGSI_WRITEMASK_XYZW && + !ctx->undef_alloca) { + /* Create a dummy alloca. We use it so that we + * have a pointer that is safe to load from if + * a shader ever reads from a channel that + * it never writes to. + */ + ctx->undef_alloca = lp_build_alloca_undef( + bld_base->base.gallivm, + bld_base->base.vec_type, "undef"); + } + + for (i = 0; i < decl_size; ++i) { + LLVMValueRef ptr; + if (writemask & (1 << (i % 4))) { +#ifdef DEBUG + snprintf(name, sizeof(name), "TEMP%d.%c", + first + i / 4, "xyzw"[i % 4]); +#endif + idxs[1] = lp_build_const_int32(bld_base->base.gallivm, j); + ptr = LLVMBuildGEP(builder, array_alloca, idxs, 2, name); + j++; + } else { + ptr = ctx->undef_alloca; + } + ctx->temps[first * TGSI_NUM_CHANNELS + i] = ptr; + } + } + break; + } + case TGSI_FILE_INPUT: + { + unsigned idx; + for (idx = decl->Range.First; idx <= decl->Range.Last; idx++) { + if (ctx->load_input && + ctx->input_decls[idx].Declaration.File != TGSI_FILE_INPUT) { + ctx->input_decls[idx] = *decl; + ctx->input_decls[idx].Range.First = idx; + ctx->input_decls[idx].Range.Last = idx; + ctx->input_decls[idx].Semantic.Index += idx - decl->Range.First; + + if (si_preload_fs_inputs(ctx) || + bld_base->info->processor != PIPE_SHADER_FRAGMENT) + ctx->load_input(ctx, idx, &ctx->input_decls[idx], + &ctx->inputs[idx * 4]); + } + } + } + break; + + case TGSI_FILE_SYSTEM_VALUE: + { + unsigned idx; + for (idx = decl->Range.First; idx <= decl->Range.Last; idx++) { + ctx->load_system_value(ctx, idx, decl); + } + } + break; + + case TGSI_FILE_OUTPUT: + { + char name[16] = ""; + unsigned idx; + for (idx = decl->Range.First; idx <= decl->Range.Last; idx++) { + unsigned chan; + assert(idx < RADEON_LLVM_MAX_OUTPUTS); + if (ctx->outputs[idx][0]) + continue; + for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) { +#ifdef DEBUG + snprintf(name, sizeof(name), "OUT%d.%c", + idx, "xyzw"[chan % 4]); +#endif + ctx->outputs[idx][chan] = lp_build_alloca_undef( + &ctx->gallivm, + ctx->bld_base.base.elem_type, name); + } + } + break; + } + + case TGSI_FILE_MEMORY: + ctx->declare_memory_region(ctx, decl); + break; + + default: + break; + } +} + +LLVMValueRef si_llvm_saturate(struct lp_build_tgsi_context *bld_base, + LLVMValueRef value) +{ + struct lp_build_emit_data clamp_emit_data; + + memset(&clamp_emit_data, 0, sizeof(clamp_emit_data)); + clamp_emit_data.arg_count = 3; + clamp_emit_data.args[0] = value; + clamp_emit_data.args[2] = bld_base->base.one; + clamp_emit_data.args[1] = bld_base->base.zero; + + return lp_build_emit_llvm(bld_base, TGSI_OPCODE_CLAMP, + &clamp_emit_data); +} + +void si_llvm_emit_store(struct lp_build_tgsi_context *bld_base, + const struct tgsi_full_instruction *inst, + const struct tgsi_opcode_info *info, + LLVMValueRef dst[4]) +{ + struct si_shader_context *ctx = si_shader_context(bld_base); + struct gallivm_state *gallivm = ctx->bld_base.base.gallivm; + const struct tgsi_full_dst_register *reg = &inst->Dst[0]; + LLVMBuilderRef builder = ctx->bld_base.base.gallivm->builder; + LLVMValueRef temp_ptr, temp_ptr2 = NULL; + unsigned chan, chan_index; + bool is_vec_store = false; + enum tgsi_opcode_type dtype = tgsi_opcode_infer_dst_type(inst->Instruction.Opcode); + + if (dst[0]) { + LLVMTypeKind k = LLVMGetTypeKind(LLVMTypeOf(dst[0])); + is_vec_store = (k == LLVMVectorTypeKind); + } + + if (is_vec_store) { + LLVMValueRef values[4] = {}; + TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst, chan) { + LLVMValueRef index = lp_build_const_int32(gallivm, chan); + values[chan] = LLVMBuildExtractElement(gallivm->builder, + dst[0], index, ""); + } + bld_base->emit_store(bld_base, inst, info, values); + return; + } + + TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( inst, chan_index ) { + LLVMValueRef value = dst[chan_index]; + + if (tgsi_type_is_64bit(dtype) && (chan_index == 1 || chan_index == 3)) + continue; + if (inst->Instruction.Saturate) + value = si_llvm_saturate(bld_base, value); + + if (reg->Register.File == TGSI_FILE_ADDRESS) { + temp_ptr = ctx->addrs[reg->Register.Index][chan_index]; + LLVMBuildStore(builder, value, temp_ptr); + continue; + } + + if (!tgsi_type_is_64bit(dtype)) + value = bitcast(bld_base, TGSI_TYPE_FLOAT, value); + + if (reg->Register.Indirect) { + unsigned file = reg->Register.File; + unsigned reg_index = reg->Register.Index; + store_value_to_array(bld_base, value, file, chan_index, + reg_index, ®->Indirect); + } else { + switch(reg->Register.File) { + case TGSI_FILE_OUTPUT: + temp_ptr = ctx->outputs[reg->Register.Index][chan_index]; + if (tgsi_type_is_64bit(dtype)) + temp_ptr2 = ctx->outputs[reg->Register.Index][chan_index + 1]; + break; + + case TGSI_FILE_TEMPORARY: + { + if (reg->Register.Index >= ctx->temps_count) + continue; + + temp_ptr = ctx->temps[ TGSI_NUM_CHANNELS * reg->Register.Index + chan_index]; + if (tgsi_type_is_64bit(dtype)) + temp_ptr2 = ctx->temps[ TGSI_NUM_CHANNELS * reg->Register.Index + chan_index + 1]; + + break; + } + default: + return; + } + if (!tgsi_type_is_64bit(dtype)) + LLVMBuildStore(builder, value, temp_ptr); + else { + LLVMValueRef ptr = LLVMBuildBitCast(builder, value, + LLVMVectorType(LLVMIntTypeInContext(bld_base->base.gallivm->context, 32), 2), ""); + LLVMValueRef val2; + value = LLVMBuildExtractElement(builder, ptr, + bld_base->uint_bld.zero, ""); + val2 = LLVMBuildExtractElement(builder, ptr, + bld_base->uint_bld.one, ""); + + LLVMBuildStore(builder, bitcast(bld_base, TGSI_TYPE_FLOAT, value), temp_ptr); + LLVMBuildStore(builder, bitcast(bld_base, TGSI_TYPE_FLOAT, val2), temp_ptr2); + } + } + } +} + +static void set_basicblock_name(LLVMBasicBlockRef bb, const char *base, int pc) +{ + char buf[32]; + /* Subtract 1 so that the number shown is that of the corresponding + * opcode in the TGSI dump, e.g. an if block has the same suffix as + * the instruction number of the corresponding TGSI IF. + */ + snprintf(buf, sizeof(buf), "%s%d", base, pc - 1); + LLVMSetValueName(LLVMBasicBlockAsValue(bb), buf); +} + +/* Append a basic block at the level of the parent flow. + */ +static LLVMBasicBlockRef append_basic_block(struct si_shader_context *ctx, + const char *name) +{ + struct gallivm_state *gallivm = &ctx->gallivm; + + assert(ctx->flow_depth >= 1); + + if (ctx->flow_depth >= 2) { + struct si_llvm_flow *flow = &ctx->flow[ctx->flow_depth - 2]; + + return LLVMInsertBasicBlockInContext(gallivm->context, + flow->next_block, name); + } + + return LLVMAppendBasicBlockInContext(gallivm->context, ctx->main_fn, name); +} + +/* Emit a branch to the given default target for the current block if + * applicable -- that is, if the current block does not already contain a + * branch from a break or continue. + */ +static void emit_default_branch(LLVMBuilderRef builder, LLVMBasicBlockRef target) +{ + if (!LLVMGetBasicBlockTerminator(LLVMGetInsertBlock(builder))) + LLVMBuildBr(builder, target); +} + +static void bgnloop_emit(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + struct si_shader_context *ctx = si_shader_context(bld_base); + struct gallivm_state *gallivm = bld_base->base.gallivm; + struct si_llvm_flow *flow = push_flow(ctx); + flow->loop_entry_block = append_basic_block(ctx, "LOOP"); + flow->next_block = append_basic_block(ctx, "ENDLOOP"); + set_basicblock_name(flow->loop_entry_block, "loop", bld_base->pc); + LLVMBuildBr(gallivm->builder, flow->loop_entry_block); + LLVMPositionBuilderAtEnd(gallivm->builder, flow->loop_entry_block); +} + +static void brk_emit(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + struct si_shader_context *ctx = si_shader_context(bld_base); + struct gallivm_state *gallivm = bld_base->base.gallivm; + struct si_llvm_flow *flow = get_innermost_loop(ctx); + + LLVMBuildBr(gallivm->builder, flow->next_block); +} + +static void cont_emit(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + struct si_shader_context *ctx = si_shader_context(bld_base); + struct gallivm_state *gallivm = bld_base->base.gallivm; + struct si_llvm_flow *flow = get_innermost_loop(ctx); + + LLVMBuildBr(gallivm->builder, flow->loop_entry_block); +} + +static void else_emit(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + struct si_shader_context *ctx = si_shader_context(bld_base); + struct gallivm_state *gallivm = bld_base->base.gallivm; + struct si_llvm_flow *current_branch = get_current_flow(ctx); + LLVMBasicBlockRef endif_block; + + assert(!current_branch->loop_entry_block); + + endif_block = append_basic_block(ctx, "ENDIF"); + emit_default_branch(gallivm->builder, endif_block); + + LLVMPositionBuilderAtEnd(gallivm->builder, current_branch->next_block); + set_basicblock_name(current_branch->next_block, "else", bld_base->pc); + + current_branch->next_block = endif_block; +} + +static void endif_emit(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + struct si_shader_context *ctx = si_shader_context(bld_base); + struct gallivm_state *gallivm = bld_base->base.gallivm; + struct si_llvm_flow *current_branch = get_current_flow(ctx); + + assert(!current_branch->loop_entry_block); + + emit_default_branch(gallivm->builder, current_branch->next_block); + LLVMPositionBuilderAtEnd(gallivm->builder, current_branch->next_block); + set_basicblock_name(current_branch->next_block, "endif", bld_base->pc); + + ctx->flow_depth--; +} + +static void endloop_emit(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + struct si_shader_context *ctx = si_shader_context(bld_base); + struct gallivm_state *gallivm = bld_base->base.gallivm; + struct si_llvm_flow *current_loop = get_current_flow(ctx); + + assert(current_loop->loop_entry_block); + + emit_default_branch(gallivm->builder, current_loop->loop_entry_block); + + LLVMPositionBuilderAtEnd(gallivm->builder, current_loop->next_block); + set_basicblock_name(current_loop->next_block, "endloop", bld_base->pc); + ctx->flow_depth--; +} + +static void if_cond_emit(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data, + LLVMValueRef cond) +{ + struct si_shader_context *ctx = si_shader_context(bld_base); + struct gallivm_state *gallivm = bld_base->base.gallivm; + struct si_llvm_flow *flow = push_flow(ctx); + LLVMBasicBlockRef if_block; + + if_block = append_basic_block(ctx, "IF"); + flow->next_block = append_basic_block(ctx, "ELSE"); + set_basicblock_name(if_block, "if", bld_base->pc); + LLVMBuildCondBr(gallivm->builder, cond, if_block, flow->next_block); + LLVMPositionBuilderAtEnd(gallivm->builder, if_block); +} + +static void if_emit(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + struct gallivm_state *gallivm = bld_base->base.gallivm; + LLVMValueRef cond; + + cond = LLVMBuildFCmp(gallivm->builder, LLVMRealUNE, + emit_data->args[0], + bld_base->base.zero, ""); + + if_cond_emit(action, bld_base, emit_data, cond); +} + +static void uif_emit(const struct lp_build_tgsi_action *action, + struct lp_build_tgsi_context *bld_base, + struct lp_build_emit_data *emit_data) +{ + struct gallivm_state *gallivm = bld_base->base.gallivm; + LLVMValueRef cond; + + cond = LLVMBuildICmp(gallivm->builder, LLVMIntNE, + bitcast(bld_base, TGSI_TYPE_UNSIGNED, emit_data->args[0]), + bld_base->int_bld.zero, ""); + + if_cond_emit(action, bld_base, emit_data, cond); +} + +static void emit_immediate(struct lp_build_tgsi_context *bld_base, + const struct tgsi_full_immediate *imm) +{ + unsigned i; + struct si_shader_context *ctx = si_shader_context(bld_base); + + for (i = 0; i < 4; ++i) { + ctx->imms[ctx->imms_num * TGSI_NUM_CHANNELS + i] = + LLVMConstInt(bld_base->uint_bld.elem_type, imm->u[i].Uint, false ); + } + + ctx->imms_num++; +} + +void si_llvm_context_init(struct si_shader_context *ctx, + struct si_screen *sscreen, + struct si_shader *shader, + LLVMTargetMachineRef tm, + const struct tgsi_shader_info *info, + const struct tgsi_token *tokens) +{ + struct lp_type type; + + /* Initialize the gallivm object: + * We are only using the module, context, and builder fields of this struct. + * This should be enough for us to be able to pass our gallivm struct to the + * helper functions in the gallivm module. + */ + memset(ctx, 0, sizeof(*ctx)); + ctx->shader = shader; + ctx->screen = sscreen; + ctx->tm = tm; + ctx->type = info ? info->processor : -1; + + ctx->gallivm.context = LLVMContextCreate(); + ctx->gallivm.module = LLVMModuleCreateWithNameInContext("tgsi", + ctx->gallivm.context); + LLVMSetTarget(ctx->gallivm.module, "amdgcn--"); + + bool unsafe_fpmath = (sscreen->b.debug_flags & DBG_UNSAFE_MATH) != 0; + ctx->gallivm.builder = lp_create_builder(ctx->gallivm.context, + unsafe_fpmath); + + ac_llvm_context_init(&ctx->ac, ctx->gallivm.context); + ctx->ac.module = ctx->gallivm.module; + ctx->ac.builder = ctx->gallivm.builder; + + struct lp_build_tgsi_context *bld_base = &ctx->bld_base; + + bld_base->info = info; + + if (info && info->array_max[TGSI_FILE_TEMPORARY] > 0) { + int size = info->array_max[TGSI_FILE_TEMPORARY]; + + ctx->temp_arrays = CALLOC(size, sizeof(ctx->temp_arrays[0])); + ctx->temp_array_allocas = CALLOC(size, sizeof(ctx->temp_array_allocas[0])); + + if (tokens) + tgsi_scan_arrays(tokens, TGSI_FILE_TEMPORARY, size, + ctx->temp_arrays); + } + + if (info && info->file_max[TGSI_FILE_IMMEDIATE] >= 0) { + int size = info->file_max[TGSI_FILE_IMMEDIATE] + 1; + ctx->imms = MALLOC(size * TGSI_NUM_CHANNELS * sizeof(LLVMValueRef)); + } + + type.floating = true; + type.fixed = false; + type.sign = true; + type.norm = false; + type.width = 32; + type.length = 1; + + lp_build_context_init(&bld_base->base, &ctx->gallivm, type); + lp_build_context_init(&ctx->bld_base.uint_bld, &ctx->gallivm, lp_uint_type(type)); + lp_build_context_init(&ctx->bld_base.int_bld, &ctx->gallivm, lp_int_type(type)); + type.width *= 2; + lp_build_context_init(&ctx->bld_base.dbl_bld, &ctx->gallivm, type); + lp_build_context_init(&ctx->bld_base.uint64_bld, &ctx->gallivm, lp_uint_type(type)); + lp_build_context_init(&ctx->bld_base.int64_bld, &ctx->gallivm, lp_int_type(type)); + + bld_base->soa = 1; + bld_base->emit_store = si_llvm_emit_store; + bld_base->emit_swizzle = emit_swizzle; + bld_base->emit_declaration = emit_declaration; + bld_base->emit_immediate = emit_immediate; + + bld_base->emit_fetch_funcs[TGSI_FILE_IMMEDIATE] = si_llvm_emit_fetch; + bld_base->emit_fetch_funcs[TGSI_FILE_INPUT] = si_llvm_emit_fetch; + bld_base->emit_fetch_funcs[TGSI_FILE_TEMPORARY] = si_llvm_emit_fetch; + bld_base->emit_fetch_funcs[TGSI_FILE_OUTPUT] = si_llvm_emit_fetch; + bld_base->emit_fetch_funcs[TGSI_FILE_SYSTEM_VALUE] = fetch_system_value; + + /* metadata allowing 2.5 ULP */ + ctx->fpmath_md_kind = LLVMGetMDKindIDInContext(ctx->gallivm.context, + "fpmath", 6); + LLVMValueRef arg = lp_build_const_float(&ctx->gallivm, 2.5); + ctx->fpmath_md_2p5_ulp = LLVMMDNodeInContext(ctx->gallivm.context, + &arg, 1); + + bld_base->op_actions[TGSI_OPCODE_BGNLOOP].emit = bgnloop_emit; + bld_base->op_actions[TGSI_OPCODE_BRK].emit = brk_emit; + bld_base->op_actions[TGSI_OPCODE_CONT].emit = cont_emit; + bld_base->op_actions[TGSI_OPCODE_IF].emit = if_emit; + bld_base->op_actions[TGSI_OPCODE_UIF].emit = uif_emit; + bld_base->op_actions[TGSI_OPCODE_ELSE].emit = else_emit; + bld_base->op_actions[TGSI_OPCODE_ENDIF].emit = endif_emit; + bld_base->op_actions[TGSI_OPCODE_ENDLOOP].emit = endloop_emit; + + si_shader_context_init_alu(&ctx->bld_base); + + ctx->voidt = LLVMVoidTypeInContext(ctx->gallivm.context); + ctx->i1 = LLVMInt1TypeInContext(ctx->gallivm.context); + ctx->i8 = LLVMInt8TypeInContext(ctx->gallivm.context); + ctx->i32 = LLVMInt32TypeInContext(ctx->gallivm.context); + ctx->i64 = LLVMInt64TypeInContext(ctx->gallivm.context); + ctx->i128 = LLVMIntTypeInContext(ctx->gallivm.context, 128); + ctx->f32 = LLVMFloatTypeInContext(ctx->gallivm.context); + ctx->v16i8 = LLVMVectorType(ctx->i8, 16); + ctx->v2i32 = LLVMVectorType(ctx->i32, 2); + ctx->v4i32 = LLVMVectorType(ctx->i32, 4); + ctx->v4f32 = LLVMVectorType(ctx->f32, 4); + ctx->v8i32 = LLVMVectorType(ctx->i32, 8); +} + +void si_llvm_create_func(struct si_shader_context *ctx, + const char *name, + LLVMTypeRef *return_types, unsigned num_return_elems, + LLVMTypeRef *ParamTypes, unsigned ParamCount) +{ + LLVMTypeRef main_fn_type, ret_type; + LLVMBasicBlockRef main_fn_body; + + if (num_return_elems) + ret_type = LLVMStructTypeInContext(ctx->gallivm.context, + return_types, + num_return_elems, true); + else + ret_type = LLVMVoidTypeInContext(ctx->gallivm.context); + + /* Setup the function */ + ctx->return_type = ret_type; + main_fn_type = LLVMFunctionType(ret_type, ParamTypes, ParamCount, 0); + ctx->main_fn = LLVMAddFunction(ctx->gallivm.module, name, main_fn_type); + main_fn_body = LLVMAppendBasicBlockInContext(ctx->gallivm.context, + ctx->main_fn, "main_body"); + LLVMPositionBuilderAtEnd(ctx->gallivm.builder, main_fn_body); +} + +void si_llvm_finalize_module(struct si_shader_context *ctx, + bool run_verifier) +{ + struct gallivm_state *gallivm = ctx->bld_base.base.gallivm; + const char *triple = LLVMGetTarget(gallivm->module); + LLVMTargetLibraryInfoRef target_library_info; + + /* Create the pass manager */ + gallivm->passmgr = LLVMCreatePassManager(); + + target_library_info = gallivm_create_target_library_info(triple); + LLVMAddTargetLibraryInfo(target_library_info, gallivm->passmgr); + + if (run_verifier) + LLVMAddVerifierPass(gallivm->passmgr); + + LLVMAddAlwaysInlinerPass(gallivm->passmgr); + + /* This pass should eliminate all the load and store instructions */ + LLVMAddPromoteMemoryToRegisterPass(gallivm->passmgr); + + /* Add some optimization passes */ + LLVMAddScalarReplAggregatesPass(gallivm->passmgr); + LLVMAddLICMPass(gallivm->passmgr); + LLVMAddAggressiveDCEPass(gallivm->passmgr); + LLVMAddCFGSimplificationPass(gallivm->passmgr); + LLVMAddInstructionCombiningPass(gallivm->passmgr); + + /* Run the pass */ + LLVMRunPassManager(gallivm->passmgr, ctx->gallivm.module); + + LLVMDisposeBuilder(gallivm->builder); + LLVMDisposePassManager(gallivm->passmgr); + gallivm_dispose_target_library_info(target_library_info); +} + +void si_llvm_dispose(struct si_shader_context *ctx) +{ + LLVMDisposeModule(ctx->bld_base.base.gallivm->module); + LLVMContextDispose(ctx->bld_base.base.gallivm->context); + FREE(ctx->temp_arrays); + ctx->temp_arrays = NULL; + FREE(ctx->temp_array_allocas); + ctx->temp_array_allocas = NULL; + FREE(ctx->temps); + ctx->temps = NULL; + ctx->temps_count = 0; + FREE(ctx->imms); + ctx->imms = NULL; + ctx->imms_num = 0; + FREE(ctx->flow); + ctx->flow = NULL; + ctx->flow_depth_max = 0; +} diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/si_state.c mesa-17.0.7/src/gallium/drivers/radeonsi/si_state.c --- mesa-12.0.6/src/gallium/drivers/radeonsi/si_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/si_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,15 +25,14 @@ */ #include "si_pipe.h" -#include "si_shader.h" #include "sid.h" #include "radeon/r600_cs.h" +#include "radeon/r600_query.h" #include "util/u_dual_blend.h" #include "util/u_format.h" #include "util/u_format_s3tc.h" #include "util/u_memory.h" -#include "util/u_pstipple.h" #include "util/u_resource.h" /* Initialize an external atom (owned by ../radeon). */ @@ -88,24 +87,17 @@ /* * Inferred framebuffer and blender state. * - * One of the reasons CB_TARGET_MASK must be derived from the framebuffer state - * is that: - * - The blend state mask is 0xf most of the time. - * - The COLOR1 format isn't INVALID because of possible dual-source blending, - * so COLOR1 is enabled pretty much all the time. - * So CB_TARGET_MASK is the only register that can disable COLOR1. - * - * Another reason is to avoid a hang with dual source blending. + * CB_TARGET_MASK is emitted here to avoid a hang with dual source blending + * if there is not enough PS outputs. */ static void si_emit_cb_render_state(struct si_context *sctx, struct r600_atom *atom) { struct radeon_winsys_cs *cs = sctx->b.gfx.cs; struct si_state_blend *blend = sctx->queued.named.blend; - uint32_t cb_target_mask = 0, i; - - for (i = 0; i < sctx->framebuffer.state.nr_cbufs; i++) - if (sctx->framebuffer.state.cbufs[i]) - cb_target_mask |= 0xf << (4*i); + /* CB_COLORn_INFO.FORMAT=INVALID should disable unbound colorbuffers, + * but you never know. */ + uint32_t cb_target_mask = sctx->framebuffer.colorbuf_enabled_4bit; + unsigned i; if (blend) cb_target_mask &= blend->cb_target_mask; @@ -127,7 +119,7 @@ if (sctx->b.family == CHIP_STONEY) { unsigned spi_shader_col_format = sctx->ps_shader.cso ? - sctx->ps_shader.current->key.ps.epilog.spi_shader_col_format : 0; + sctx->ps_shader.current->key.part.ps.epilog.spi_shader_col_format : 0; unsigned sx_ps_downconvert = 0; unsigned sx_blend_opt_epsilon = 0; unsigned sx_blend_opt_control = 0; @@ -470,6 +462,17 @@ continue; } + /* Only addition and subtraction equations are supported with + * dual source blending. + */ + if (blend->dual_src_blend && + (eqRGB == PIPE_BLEND_MIN || eqRGB == PIPE_BLEND_MAX || + eqA == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MAX)) { + assert(!"Unsupported equation for dual source blending"); + si_pm4_set_reg(pm4, R_028780_CB_BLEND0_CONTROL + i * 4, blend_cntl); + continue; + } + /* cb_render_state will disable unused ones */ blend->cb_target_mask |= (unsigned)state->rt[j].colormask << (4 * i); @@ -590,6 +593,7 @@ struct si_context *sctx = (struct si_context *)ctx; si_pm4_bind_state(sctx, blend, (struct si_state_blend *)state); si_mark_atom_dirty(sctx, &sctx->cb_render_state); + sctx->do_update_shaders = true; } static void si_delete_blend_state(struct pipe_context *ctx, void *state) @@ -655,30 +659,50 @@ static void si_emit_clip_regs(struct si_context *sctx, struct r600_atom *atom) { struct radeon_winsys_cs *cs = sctx->b.gfx.cs; + struct si_shader *vs = si_get_vs_state(sctx); struct tgsi_shader_info *info = si_get_vs_info(sctx); + struct si_state_rasterizer *rs = sctx->queued.named.rasterizer; unsigned window_space = info->properties[TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION]; unsigned clipdist_mask = info->writes_clipvertex ? SIX_BITS : info->clipdist_writemask; + unsigned ucp_mask = clipdist_mask ? 0 : rs->clip_plane_enable & SIX_BITS; + unsigned culldist_mask = info->culldist_writemask << info->num_written_clipdistance; + unsigned total_mask; + bool misc_vec_ena; + + if (vs->key.opt.hw_vs.clip_disable) { + assert(!info->culldist_writemask); + clipdist_mask = 0; + culldist_mask = 0; + } + total_mask = clipdist_mask | culldist_mask; + + /* Clip distances on points have no effect, so need to be implemented + * as cull distances. This applies for the clipvertex case as well. + * + * Setting this for primitives other than points should have no adverse + * effects. + */ + clipdist_mask &= rs->clip_plane_enable; + culldist_mask |= clipdist_mask; + + misc_vec_ena = info->writes_psize || info->writes_edgeflag || + info->writes_layer || info->writes_viewport_index; radeon_set_context_reg(cs, R_02881C_PA_CL_VS_OUT_CNTL, S_02881C_USE_VTX_POINT_SIZE(info->writes_psize) | S_02881C_USE_VTX_EDGE_FLAG(info->writes_edgeflag) | S_02881C_USE_VTX_RENDER_TARGET_INDX(info->writes_layer) | S_02881C_USE_VTX_VIEWPORT_INDX(info->writes_viewport_index) | - S_02881C_VS_OUT_CCDIST0_VEC_ENA((clipdist_mask & 0x0F) != 0) | - S_02881C_VS_OUT_CCDIST1_VEC_ENA((clipdist_mask & 0xF0) != 0) | - S_02881C_VS_OUT_MISC_VEC_ENA(info->writes_psize || - info->writes_edgeflag || - info->writes_layer || - info->writes_viewport_index) | - S_02881C_VS_OUT_MISC_SIDE_BUS_ENA(1) | - (sctx->queued.named.rasterizer->clip_plane_enable & - clipdist_mask)); + S_02881C_VS_OUT_CCDIST0_VEC_ENA((total_mask & 0x0F) != 0) | + S_02881C_VS_OUT_CCDIST1_VEC_ENA((total_mask & 0xF0) != 0) | + S_02881C_VS_OUT_MISC_VEC_ENA(misc_vec_ena) | + S_02881C_VS_OUT_MISC_SIDE_BUS_ENA(misc_vec_ena) | + clipdist_mask | (culldist_mask << 8)); radeon_set_context_reg(cs, R_028810_PA_CL_CLIP_CNTL, - sctx->queued.named.rasterizer->pa_cl_clip_cntl | - (clipdist_mask ? 0 : - sctx->queued.named.rasterizer->clip_plane_enable & SIX_BITS) | + rs->pa_cl_clip_cntl | + ucp_mask | S_028810_CLIP_DISABLE(window_space)); /* reuse needs to be set off if we write oViewport */ @@ -693,9 +717,14 @@ { struct si_state_rasterizer *rs = sctx->queued.named.rasterizer; - if (!rs || !rs->uses_poly_offset || !sctx->framebuffer.state.zsbuf) + if (!rs || !rs->uses_poly_offset || !sctx->framebuffer.state.zsbuf) { + si_pm4_bind_state(sctx, poly_offset, NULL); return; + } + /* Use the user format, not db_render_format, so that the polygon + * offset behaves as expected by applications. + */ switch (sctx->framebuffer.state.zsbuf->texture->format) { case PIPE_FORMAT_Z16_UNORM: si_pm4_bind_state(sctx, poly_offset, &rs->pm4_poly_offset[0]); @@ -761,7 +790,6 @@ S_028A0C_LINE_PATTERN(state->line_stipple_pattern) | S_028A0C_REPEAT_COUNT(state->line_stipple_factor) : 0; rs->pa_cl_clip_cntl = - S_028810_PS_UCP_MODE(3) | S_028810_DX_CLIP_SPACE_DEF(state->clip_halfz) | S_028810_ZCLIP_NEAR_DISABLE(!state->depth_clip) | S_028810_ZCLIP_FAR_DISABLE(!state->depth_clip) | @@ -828,17 +856,26 @@ struct si_pm4_state *pm4 = &rs->pm4_poly_offset[i]; float offset_units = state->offset_units; float offset_scale = state->offset_scale * 16.0f; + uint32_t pa_su_poly_offset_db_fmt_cntl = 0; - switch (i) { - case 0: /* 16-bit zbuffer */ - offset_units *= 4.0f; - break; - case 1: /* 24-bit zbuffer */ - offset_units *= 2.0f; - break; - case 2: /* 32-bit zbuffer */ - offset_units *= 1.0f; - break; + if (!state->offset_units_unscaled) { + switch (i) { + case 0: /* 16-bit zbuffer */ + offset_units *= 4.0f; + pa_su_poly_offset_db_fmt_cntl = + S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-16); + break; + case 1: /* 24-bit zbuffer */ + offset_units *= 2.0f; + pa_su_poly_offset_db_fmt_cntl = + S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-24); + break; + case 2: /* 32-bit zbuffer */ + offset_units *= 1.0f; + pa_su_poly_offset_db_fmt_cntl = S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-23) | + S_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(1); + break; + } } si_pm4_set_reg(pm4, R_028B80_PA_SU_POLY_OFFSET_FRONT_SCALE, @@ -849,6 +886,8 @@ fui(offset_scale)); si_pm4_set_reg(pm4, R_028B8C_PA_SU_POLY_OFFSET_BACK_OFFSET, fui(offset_units)); + si_pm4_set_reg(pm4, R_028B78_PA_SU_POLY_OFFSET_DB_FMT_CNTL, + pa_su_poly_offset_db_fmt_cntl); } return rs; @@ -864,11 +903,12 @@ if (!state) return; - if (sctx->framebuffer.nr_samples > 1 && - (!old_rs || old_rs->multisample_enable != rs->multisample_enable)) { + if (!old_rs || old_rs->multisample_enable != rs->multisample_enable) { si_mark_atom_dirty(sctx, &sctx->db_render_state); - if (sctx->b.family >= CHIP_POLARIS10) + /* Update the small primitive filter workaround if necessary. */ + if (sctx->b.family >= CHIP_POLARIS10 && + sctx->framebuffer.nr_samples > 1) si_mark_atom_dirty(sctx, &sctx->msaa_sample_locs.atom); } @@ -878,6 +918,7 @@ si_update_poly_offset_state(sctx); si_mark_atom_dirty(sctx, &sctx->clip_regs); + sctx->do_update_shaders = true; } static void si_delete_rs_state(struct pipe_context *ctx, void *state) @@ -1027,6 +1068,7 @@ sctx->stencil_ref.dsa_part = dsa->stencil_ref; si_mark_atom_dirty(sctx, &sctx->stencil_ref.atom); } + sctx->do_update_shaders = true; } static void si_delete_dsa_state(struct pipe_context *ctx, void *state) @@ -1071,6 +1113,16 @@ si_mark_atom_dirty(sctx, &sctx->db_render_state); } +static void si_save_qbo_state(struct pipe_context *ctx, struct r600_qbo_state *st) +{ + struct si_context *sctx = (struct si_context*)ctx; + + st->saved_compute = sctx->cs_shader_state.program; + + si_get_pipe_constant_buffer(sctx, PIPE_SHADER_COMPUTE, 0, &st->saved_const0); + si_get_shader_buffers(sctx, PIPE_SHADER_COMPUTE, 0, 3, st->saved_ssbo); +} + static void si_emit_db_render_state(struct si_context *sctx, struct r600_atom *state) { struct radeon_winsys_cs *cs = sctx->b.gfx.cs; @@ -1129,8 +1181,7 @@ S_028010_DISABLE_SMEM_EXPCLEAR_OPTIMIZATION(sctx->db_stencil_disable_expclear) | S_028010_DECOMPRESS_Z_ON_FLUSH(sctx->framebuffer.nr_samples >= 4)); - db_shader_control = S_02880C_ALPHA_TO_MASK_DISABLE(sctx->framebuffer.cb0_is_integer) | - sctx->ps_db_shader_control; + db_shader_control = sctx->ps_db_shader_control; /* Bug workaround for smoothing (overrasterization) on SI. */ if (sctx->b.chip_class == SI && sctx->smoothing_enabled) { @@ -1139,7 +1190,7 @@ } /* Disable the gl_SampleMask fragment shader output if MSAA is disabled. */ - if (sctx->framebuffer.nr_samples <= 1 || (rs && !rs->multisample_enable)) + if (!rs || !rs->multisample_enable) db_shader_control &= C_02880C_MASK_EXPORT_ENABLE; if (sctx->b.family == CHIP_STONEY && @@ -1303,7 +1354,7 @@ bool enable_compressed_formats = (sscreen->b.info.drm_major == 2 && sscreen->b.info.drm_minor >= 31) || sscreen->b.info.drm_major == 3; - boolean uniform = TRUE; + bool uniform = true; int i; /* Colorspace (return non-RGB formats directly). */ @@ -1314,11 +1365,17 @@ case PIPE_FORMAT_Z16_UNORM: return V_008F14_IMG_DATA_FORMAT_16; case PIPE_FORMAT_X24S8_UINT: + case PIPE_FORMAT_S8X24_UINT: + /* + * Implemented as an 8_8_8_8 data format to fix texture + * gathers in stencil sampling. This affects at least + * GL45-CTS.texture_cube_map_array.sampling on VI. + */ + return V_008F14_IMG_DATA_FORMAT_8_8_8_8; case PIPE_FORMAT_Z24X8_UNORM: case PIPE_FORMAT_Z24_UNORM_S8_UINT: return V_008F14_IMG_DATA_FORMAT_8_24; case PIPE_FORMAT_X8Z24_UNORM: - case PIPE_FORMAT_S8X24_UINT: case PIPE_FORMAT_S8_UINT_Z24_UNORM: return V_008F14_IMG_DATA_FORMAT_24_8; case PIPE_FORMAT_S8_UINT: @@ -1648,17 +1705,12 @@ const struct util_format_description *desc, int first_non_void) { - unsigned type; int i; if (desc->format == PIPE_FORMAT_R11G11B10_FLOAT) return V_008F0C_BUF_DATA_FORMAT_10_11_11; assert(first_non_void >= 0); - type = desc->channel[first_non_void].type; - - if (type == UTIL_FORMAT_TYPE_FIXED) - return V_008F0C_BUF_DATA_FORMAT_INVALID; if (desc->nr_channels == 4 && desc->channel[0].size == 10 && @@ -1697,14 +1749,6 @@ } break; case 32: - /* From the Southern Islands ISA documentation about MTBUF: - * 'Memory reads of data in memory that is 32 or 64 bits do not - * undergo any format conversion.' - */ - if (type != UTIL_FORMAT_TYPE_FLOAT && - !desc->channel[first_non_void].pure_integer) - return V_008F0C_BUF_DATA_FORMAT_INVALID; - switch (desc->nr_channels) { case 1: return V_008F0C_BUF_DATA_FORMAT_32; @@ -1732,18 +1776,21 @@ switch (desc->channel[first_non_void].type) { case UTIL_FORMAT_TYPE_SIGNED: - if (desc->channel[first_non_void].normalized) - return V_008F0C_BUF_NUM_FORMAT_SNORM; - else if (desc->channel[first_non_void].pure_integer) + case UTIL_FORMAT_TYPE_FIXED: + if (desc->channel[first_non_void].size >= 32 || + desc->channel[first_non_void].pure_integer) return V_008F0C_BUF_NUM_FORMAT_SINT; + else if (desc->channel[first_non_void].normalized) + return V_008F0C_BUF_NUM_FORMAT_SNORM; else return V_008F0C_BUF_NUM_FORMAT_SSCALED; break; case UTIL_FORMAT_TYPE_UNSIGNED: - if (desc->channel[first_non_void].normalized) - return V_008F0C_BUF_NUM_FORMAT_UNORM; - else if (desc->channel[first_non_void].pure_integer) + if (desc->channel[first_non_void].size >= 32 || + desc->channel[first_non_void].pure_integer) return V_008F0C_BUF_NUM_FORMAT_UINT; + else if (desc->channel[first_non_void].normalized) + return V_008F0C_BUF_NUM_FORMAT_UNORM; else return V_008F0C_BUF_NUM_FORMAT_USCALED; break; @@ -1753,22 +1800,49 @@ } } -static bool si_is_vertex_format_supported(struct pipe_screen *screen, enum pipe_format format) +static unsigned si_is_vertex_format_supported(struct pipe_screen *screen, + enum pipe_format format, + unsigned usage) { const struct util_format_description *desc; int first_non_void; unsigned data_format; + assert((usage & ~(PIPE_BIND_SHADER_IMAGE | + PIPE_BIND_SAMPLER_VIEW | + PIPE_BIND_VERTEX_BUFFER)) == 0); + desc = util_format_description(format); + + /* There are no native 8_8_8 or 16_16_16 data formats, and we currently + * select 8_8_8_8 and 16_16_16_16 instead. This works reasonably well + * for read-only access (with caveats surrounding bounds checks), but + * obviously fails for write access which we have to implement for + * shader images. Luckily, OpenGL doesn't expect this to be supported + * anyway, and so the only impact is on PBO uploads / downloads, which + * shouldn't be expected to be fast for GL_RGB anyway. + */ + if (desc->block.bits == 3 * 8 || + desc->block.bits == 3 * 16) { + if (usage & (PIPE_BIND_SHADER_IMAGE | PIPE_BIND_SAMPLER_VIEW)) { + usage &= ~(PIPE_BIND_SHADER_IMAGE | PIPE_BIND_SAMPLER_VIEW); + if (!usage) + return 0; + } + } + first_non_void = util_format_get_first_non_void_channel(format); data_format = si_translate_buffer_dataformat(screen, desc, first_non_void); - return data_format != V_008F0C_BUF_DATA_FORMAT_INVALID; + if (data_format == V_008F0C_BUF_DATA_FORMAT_INVALID) + return 0; + + return usage; } static bool si_is_colorbuffer_format_supported(enum pipe_format format) { return si_translate_colorformat(format) != V_028C70_COLOR_INVALID && - r600_translate_colorswap(format, FALSE) != ~0U; + r600_translate_colorswap(format, false) != ~0U; } static bool si_is_zs_format_supported(enum pipe_format format) @@ -1776,25 +1850,28 @@ return si_translate_dbformat(format) != V_028040_Z_INVALID; } -boolean si_is_format_supported(struct pipe_screen *screen, - enum pipe_format format, - enum pipe_texture_target target, - unsigned sample_count, - unsigned usage) +static boolean si_is_format_supported(struct pipe_screen *screen, + enum pipe_format format, + enum pipe_texture_target target, + unsigned sample_count, + unsigned usage) { unsigned retval = 0; if (target >= PIPE_MAX_TEXTURE_TYPES) { R600_ERR("r600: unsupported texture type %d\n", target); - return FALSE; + return false; } if (!util_format_is_supported(format, usage)) - return FALSE; + return false; if (sample_count > 1) { if (!screen->get_param(screen, PIPE_CAP_TEXTURE_MULTISAMPLE)) - return FALSE; + return false; + + if (usage & PIPE_BIND_SHADER_IMAGE) + return false; switch (sample_count) { case 2: @@ -1803,21 +1880,24 @@ break; case 16: if (format == PIPE_FORMAT_NONE) - return TRUE; + return true; else - return FALSE; + return false; default: - return FALSE; + return false; } } - if (usage & PIPE_BIND_SAMPLER_VIEW) { + if (usage & (PIPE_BIND_SAMPLER_VIEW | + PIPE_BIND_SHADER_IMAGE)) { if (target == PIPE_BUFFER) { - if (si_is_vertex_format_supported(screen, format)) - retval |= PIPE_BIND_SAMPLER_VIEW; + retval |= si_is_vertex_format_supported( + screen, format, usage & (PIPE_BIND_SAMPLER_VIEW | + PIPE_BIND_SHADER_IMAGE)); } else { if (si_is_sampler_format_supported(screen, format)) - retval |= PIPE_BIND_SAMPLER_VIEW; + retval |= usage & (PIPE_BIND_SAMPLER_VIEW | + PIPE_BIND_SHADER_IMAGE); } } @@ -1842,16 +1922,11 @@ retval |= PIPE_BIND_DEPTH_STENCIL; } - if ((usage & PIPE_BIND_VERTEX_BUFFER) && - si_is_vertex_format_supported(screen, format)) { - retval |= PIPE_BIND_VERTEX_BUFFER; + if (usage & PIPE_BIND_VERTEX_BUFFER) { + retval |= si_is_vertex_format_supported(screen, format, + PIPE_BIND_VERTEX_BUFFER); } - if (usage & PIPE_BIND_TRANSFER_READ) - retval |= PIPE_BIND_TRANSFER_READ; - if (usage & PIPE_BIND_TRANSFER_WRITE) - retval |= PIPE_BIND_TRANSFER_WRITE; - if ((usage & PIPE_BIND_LINEAR) && !util_format_is_compressed(format) && !(usage & PIPE_BIND_DEPTH_STENCIL)) @@ -1860,19 +1935,6 @@ return retval == usage; } -static unsigned si_tile_mode_index(struct r600_texture *rtex, unsigned level, - bool stencil) -{ - unsigned tile_mode_index = 0; - - if (stencil) { - tile_mode_index = rtex->surface.stencil_tiling_index[level]; - } else { - tile_mode_index = rtex->surface.tiling_index[level]; - } - return tile_mode_index; -} - /* * framebuffer handling */ @@ -1998,11 +2060,7 @@ struct r600_surface *surf) { struct r600_texture *rtex = (struct r600_texture*)surf->base.texture; - unsigned level = surf->base.u.tex.level; - uint64_t offset = rtex->surface.level[level].offset; - unsigned pitch, slice; - unsigned color_info, color_attrib, color_pitch, color_view; - unsigned tile_mode_index; + unsigned color_info, color_attrib, color_view; unsigned format, swap, ntype, endian; const struct util_format_description *desc; int i; @@ -2011,14 +2069,6 @@ color_view = S_028C6C_SLICE_START(surf->base.u.tex.first_layer) | S_028C6C_SLICE_MAX(surf->base.u.tex.last_layer); - pitch = (rtex->surface.level[level].nblk_x) / 8 - 1; - slice = (rtex->surface.level[level].nblk_x * rtex->surface.level[level].nblk_y) / 64; - if (slice) { - slice = slice - 1; - } - - tile_mode_index = si_tile_mode_index(rtex, level, false); - desc = util_format_description(surf->base.format); for (i = 0; i < 4; i++) { if (desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) { @@ -2053,7 +2103,7 @@ R600_ERR("Invalid CB format: %d, disabling CB.\n", surf->base.format); } assert(format != V_028C70_COLOR_INVALID); - swap = r600_translate_colorswap(surf->base.format, FALSE); + swap = r600_translate_colorswap(surf->base.format, false); endian = si_colorformat_endian_swap(format); /* blend clamp should be set for all NORM/SRGB types */ @@ -2071,25 +2121,32 @@ blend_bypass = 1; } - if ((ntype == V_028C70_NUMBER_UINT || ntype == V_028C70_NUMBER_SINT) && - (format == V_028C70_COLOR_8 || - format == V_028C70_COLOR_8_8 || - format == V_028C70_COLOR_8_8_8_8)) - surf->color_is_int8 = true; + if (ntype == V_028C70_NUMBER_UINT || ntype == V_028C70_NUMBER_SINT) { + if (format == V_028C70_COLOR_8 || + format == V_028C70_COLOR_8_8 || + format == V_028C70_COLOR_8_8_8_8) + surf->color_is_int8 = true; + else if (format == V_028C70_COLOR_10_10_10_2 || + format == V_028C70_COLOR_2_10_10_10) + surf->color_is_int10 = true; + } color_info = S_028C70_FORMAT(format) | S_028C70_COMP_SWAP(swap) | S_028C70_BLEND_CLAMP(blend_clamp) | S_028C70_BLEND_BYPASS(blend_bypass) | + S_028C70_SIMPLE_FLOAT(1) | + S_028C70_ROUND_MODE(ntype != V_028C70_NUMBER_UNORM && + ntype != V_028C70_NUMBER_SNORM && + ntype != V_028C70_NUMBER_SRGB && + format != V_028C70_COLOR_8_24 && + format != V_028C70_COLOR_24_8) | S_028C70_NUMBER_TYPE(ntype) | S_028C70_ENDIAN(endian); - color_pitch = S_028C64_TILE_MAX(pitch); - /* Intensity is implemented as Red, so treat it that way. */ - color_attrib = S_028C74_TILE_MODE_INDEX(tile_mode_index) | - S_028C74_FORCE_DST_ALPHA_1(desc->swizzle[3] == PIPE_SWIZZLE_1 || - util_format_is_intensity(surf->base.format)); + color_attrib = S_028C74_FORCE_DST_ALPHA_1(desc->swizzle[3] == PIPE_SWIZZLE_1 || + util_format_is_intensity(surf->base.format)); if (rtex->resource.b.b.nr_samples > 1) { unsigned log_samples = util_logbase2(rtex->resource.b.b.nr_samples); @@ -2101,31 +2158,21 @@ color_info |= S_028C70_COMPRESSION(1); unsigned fmask_bankh = util_logbase2(rtex->fmask.bank_height); - color_attrib |= S_028C74_FMASK_TILE_MODE_INDEX(rtex->fmask.tile_mode_index); - if (sctx->b.chip_class == SI) { /* due to a hw bug, FMASK_BANK_HEIGHT must be set on SI too */ color_attrib |= S_028C74_FMASK_BANK_HEIGHT(fmask_bankh); } - if (sctx->b.chip_class >= CIK) { - color_pitch |= S_028C64_FMASK_TILE_MAX(rtex->fmask.pitch_in_pixels / 8 - 1); - } } } - offset += rtex->resource.gpu_address; - - surf->cb_color_base = offset >> 8; - surf->cb_color_pitch = color_pitch; - surf->cb_color_slice = S_028C68_TILE_MAX(slice); surf->cb_color_view = color_view; surf->cb_color_info = color_info; surf->cb_color_attrib = color_attrib; - if (sctx->b.chip_class >= VI && rtex->dcc_offset) { + if (sctx->b.chip_class >= VI) { unsigned max_uncompressed_block_size = 2; - if (rtex->surface.nsamples > 1) { + if (rtex->resource.b.b.nr_samples > 1) { if (rtex->surface.bpe == 1) max_uncompressed_block_size = 0; else if (rtex->surface.bpe == 2) @@ -2134,28 +2181,12 @@ surf->cb_dcc_control = S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(max_uncompressed_block_size) | S_028C78_INDEPENDENT_64B_BLOCKS(1); - surf->cb_dcc_base = (rtex->resource.gpu_address + - rtex->dcc_offset + - rtex->surface.level[level].dcc_offset) >> 8; } - if (rtex->fmask.size) { - surf->cb_color_fmask = (offset + rtex->fmask.offset) >> 8; - surf->cb_color_fmask_slice = S_028C88_TILE_MAX(rtex->fmask.slice_tile_max); - } else { - /* This must be set for fast clear to work without FMASK. */ - surf->cb_color_fmask = surf->cb_color_base; - surf->cb_color_fmask_slice = surf->cb_color_slice; - surf->cb_color_attrib |= S_028C74_FMASK_TILE_MODE_INDEX(tile_mode_index); - - if (sctx->b.chip_class == SI) { - unsigned bankh = util_logbase2(rtex->surface.bankh); - surf->cb_color_attrib |= S_028C74_FMASK_BANK_HEIGHT(bankh); - } - - if (sctx->b.chip_class >= CIK) { - surf->cb_color_pitch |= S_028C64_FMASK_TILE_MAX(pitch); - } + /* This must be set for fast clear to work without FMASK. */ + if (!rtex->fmask.size && sctx->b.chip_class == SI) { + unsigned bankh = util_logbase2(rtex->surface.bankh); + surf->cb_color_attrib |= S_028C74_FMASK_BANK_HEIGHT(bankh); } /* Determine pixel shader export format */ @@ -2173,28 +2204,9 @@ unsigned format; uint32_t z_info, s_info, db_depth_info; uint64_t z_offs, s_offs; - uint32_t db_htile_data_base, db_htile_surface, pa_su_poly_offset_db_fmt_cntl = 0; - - switch (sctx->framebuffer.state.zsbuf->texture->format) { - case PIPE_FORMAT_S8_UINT_Z24_UNORM: - case PIPE_FORMAT_X8Z24_UNORM: - case PIPE_FORMAT_Z24X8_UNORM: - case PIPE_FORMAT_Z24_UNORM_S8_UINT: - pa_su_poly_offset_db_fmt_cntl = S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-24); - break; - case PIPE_FORMAT_Z32_FLOAT: - case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT: - pa_su_poly_offset_db_fmt_cntl = S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-23) | - S_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(1); - break; - case PIPE_FORMAT_Z16_UNORM: - pa_su_poly_offset_db_fmt_cntl = S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-16); - break; - default: - assert(0); - } + uint32_t db_htile_data_base, db_htile_surface; - format = si_translate_dbformat(rtex->resource.b.b.format); + format = si_translate_dbformat(rtex->db_render_format); if (format == V_028040_Z_INVALID) { R600_ERR("Invalid DB format: %d, disabling DB.\n", rtex->resource.b.b.format); @@ -2205,7 +2217,7 @@ z_offs += rtex->surface.level[level].offset; s_offs += rtex->surface.stencil_level[level].offset; - db_depth_info = S_02803C_ADDR5_SWIZZLE_MASK(1); + db_depth_info = S_02803C_ADDR5_SWIZZLE_MASK(!rtex->tc_compatible_htile); z_info = S_028040_FORMAT(format); if (rtex->resource.b.b.nr_samples > 1) { @@ -2262,13 +2274,37 @@ */ if (rtex->resource.b.b.nr_samples <= 1) s_info |= S_028044_ALLOW_EXPCLEAR(1); - } else - /* Use all of the htile_buffer for depth if there's no stencil. */ + } else if (!rtex->tc_compatible_htile) { + /* Use all of the htile_buffer for depth if there's no stencil. + * This must not be set when TC-compatible HTILE is enabled + * due to a hw bug. + */ s_info |= S_028044_TILE_STENCIL_DISABLE(1); + } uint64_t va = rtex->htile_buffer->gpu_address; db_htile_data_base = va >> 8; db_htile_surface = S_028ABC_FULL_CACHE(1); + + if (rtex->tc_compatible_htile) { + db_htile_surface |= S_028ABC_TC_COMPATIBLE(1); + + switch (rtex->resource.b.b.nr_samples) { + case 0: + case 1: + z_info |= S_028040_DECOMPRESS_ON_N_ZPLANES(5); + break; + case 2: + case 4: + z_info |= S_028040_DECOMPRESS_ON_N_ZPLANES(3); + break; + case 8: + z_info |= S_028040_DECOMPRESS_ON_N_ZPLANES(2); + break; + default: + assert(0); + } + } } else { db_htile_data_base = 0; db_htile_surface = 0; @@ -2289,11 +2325,25 @@ surf->db_depth_slice = S_02805C_SLICE_TILE_MAX((levelinfo->nblk_x * levelinfo->nblk_y) / 64 - 1); surf->db_htile_surface = db_htile_surface; - surf->pa_su_poly_offset_db_fmt_cntl = pa_su_poly_offset_db_fmt_cntl; surf->depth_initialized = true; } +static void si_dec_framebuffer_counters(const struct pipe_framebuffer_state *state) +{ + for (int i = 0; i < state->nr_cbufs; ++i) { + struct r600_surface *surf = NULL; + struct r600_texture *rtex; + + if (!state->cbufs[i]) + continue; + surf = (struct r600_surface*)state->cbufs[i]; + rtex = (struct r600_texture*)surf->base.texture; + + p_atomic_dec(&rtex->framebuffers_bound); + } +} + static void si_set_framebuffer_state(struct pipe_context *ctx, const struct pipe_framebuffer_state *state) { @@ -2301,10 +2351,19 @@ struct pipe_constant_buffer constbuf = {0}; struct r600_surface *surf = NULL; struct r600_texture *rtex; - bool old_cb0_is_integer = sctx->framebuffer.cb0_is_integer; + bool old_any_dst_linear = sctx->framebuffer.any_dst_linear; unsigned old_nr_samples = sctx->framebuffer.nr_samples; int i; + for (i = 0; i < sctx->framebuffer.state.nr_cbufs; i++) { + if (!sctx->framebuffer.state.cbufs[i]) + continue; + + rtex = (struct r600_texture*)sctx->framebuffer.state.cbufs[i]->texture; + if (rtex->dcc_gather_statistics) + vi_separate_dcc_stop_query(ctx, rtex); + } + /* Only flush TC when changing the framebuffer state, because * the only client not using TC that can change textures is * the framebuffer. @@ -2324,22 +2383,21 @@ (1 << MAX2(sctx->framebuffer.state.nr_cbufs, state->nr_cbufs)) - 1; sctx->framebuffer.dirty_zsbuf |= sctx->framebuffer.state.zsbuf != state->zsbuf; + si_dec_framebuffer_counters(&sctx->framebuffer.state); util_copy_framebuffer_state(&sctx->framebuffer.state, state); + sctx->framebuffer.colorbuf_enabled_4bit = 0; sctx->framebuffer.spi_shader_col_format = 0; sctx->framebuffer.spi_shader_col_format_alpha = 0; sctx->framebuffer.spi_shader_col_format_blend = 0; sctx->framebuffer.spi_shader_col_format_blend_alpha = 0; sctx->framebuffer.color_is_int8 = 0; + sctx->framebuffer.color_is_int10 = 0; sctx->framebuffer.compressed_cb_mask = 0; sctx->framebuffer.nr_samples = util_framebuffer_get_num_samples(state); sctx->framebuffer.log_samples = util_logbase2(sctx->framebuffer.nr_samples); - sctx->framebuffer.cb0_is_integer = state->nr_cbufs && state->cbufs[0] && - util_format_is_pure_integer(state->cbufs[0]->format); - - if (sctx->framebuffer.cb0_is_integer != old_cb0_is_integer) - si_mark_atom_dirty(sctx, &sctx->db_render_state); + sctx->framebuffer.any_dst_linear = false; for (i = 0; i < state->nr_cbufs; i++) { if (!state->cbufs[i]) @@ -2352,6 +2410,7 @@ si_initialize_color_surface(sctx, surf); } + sctx->framebuffer.colorbuf_enabled_4bit |= 0xf << (i * 4); sctx->framebuffer.spi_shader_col_format |= surf->spi_shader_col_format << (i * 4); sctx->framebuffer.spi_shader_col_format_alpha |= @@ -2363,26 +2422,30 @@ if (surf->color_is_int8) sctx->framebuffer.color_is_int8 |= 1 << i; + if (surf->color_is_int10) + sctx->framebuffer.color_is_int10 |= 1 << i; - if (rtex->fmask.size && rtex->cmask.size) { + if (rtex->fmask.size) { sctx->framebuffer.compressed_cb_mask |= 1 << i; } + + if (rtex->surface.is_linear) + sctx->framebuffer.any_dst_linear = true; + r600_context_add_resource_size(ctx, surf->base.texture); - } - /* Set the second SPI format for possible dual-src blending. */ - if (i == 1 && surf) { - sctx->framebuffer.spi_shader_col_format |= - surf->spi_shader_col_format << (i * 4); - sctx->framebuffer.spi_shader_col_format_alpha |= - surf->spi_shader_col_format_alpha << (i * 4); - sctx->framebuffer.spi_shader_col_format_blend |= - surf->spi_shader_col_format_blend << (i * 4); - sctx->framebuffer.spi_shader_col_format_blend_alpha |= - surf->spi_shader_col_format_blend_alpha << (i * 4); + + p_atomic_inc(&rtex->framebuffers_bound); + + if (rtex->dcc_gather_statistics) { + /* Dirty tracking must be enabled for DCC usage analysis. */ + sctx->framebuffer.compressed_cb_mask |= 1 << i; + vi_separate_dcc_start_query(ctx, rtex); + } } if (state->zsbuf) { surf = (struct r600_surface*)state->zsbuf; + rtex = (struct r600_texture*)surf->base.texture; if (!surf->depth_initialized) { si_init_depth_surface(sctx, surf); @@ -2394,6 +2457,9 @@ si_mark_atom_dirty(sctx, &sctx->cb_render_state); si_mark_atom_dirty(sctx, &sctx->framebuffer.atom); + if (sctx->framebuffer.any_dst_linear != old_any_dst_linear) + si_mark_atom_dirty(sctx, &sctx->msaa_config); + if (sctx->framebuffer.nr_samples != old_nr_samples) { si_mark_atom_dirty(sctx, &sctx->msaa_config); si_mark_atom_dirty(sctx, &sctx->db_render_state); @@ -2425,6 +2491,9 @@ si_mark_atom_dirty(sctx, &sctx->msaa_sample_locs.atom); } + + sctx->need_check_render_feedback = true; + sctx->do_update_shaders = true; } static void si_emit_framebuffer_state(struct si_context *sctx, struct r600_atom *atom) @@ -2434,9 +2503,15 @@ unsigned i, nr_cbufs = state->nr_cbufs; struct r600_texture *tex = NULL; struct r600_surface *cb = NULL; + unsigned cb_color_info = 0; /* Colorbuffers. */ for (i = 0; i < nr_cbufs; i++) { + const struct radeon_surf_level *level_info; + unsigned pitch_tile_max, slice_tile_max, tile_mode_index; + unsigned cb_color_base, cb_color_fmask, cb_color_attrib; + unsigned cb_color_pitch, cb_color_slice, cb_color_fmask_slice; + if (!(sctx->framebuffer.dirty_cbufs & (1 << i))) continue; @@ -2448,9 +2523,10 @@ } tex = (struct r600_texture *)cb->base.texture; + level_info = &tex->surface.level[cb->base.u.tex.level]; radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, &tex->resource, RADEON_USAGE_READWRITE, - tex->surface.nsamples > 1 ? + tex->resource.b.b.nr_samples > 1 ? RADEON_PRIO_COLOR_BUFFER_MSAA : RADEON_PRIO_COLOR_BUFFER); @@ -2460,31 +2536,71 @@ RADEON_PRIO_CMASK); } + if (tex->dcc_separate_buffer) + radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, + tex->dcc_separate_buffer, + RADEON_USAGE_READWRITE, + RADEON_PRIO_DCC); + + /* Compute mutable surface parameters. */ + pitch_tile_max = level_info->nblk_x / 8 - 1; + slice_tile_max = level_info->nblk_x * + level_info->nblk_y / 64 - 1; + tile_mode_index = si_tile_mode_index(tex, cb->base.u.tex.level, false); + + cb_color_base = (tex->resource.gpu_address + level_info->offset) >> 8; + cb_color_pitch = S_028C64_TILE_MAX(pitch_tile_max); + cb_color_slice = S_028C68_TILE_MAX(slice_tile_max); + cb_color_attrib = cb->cb_color_attrib | + S_028C74_TILE_MODE_INDEX(tile_mode_index); + + if (tex->fmask.size) { + if (sctx->b.chip_class >= CIK) + cb_color_pitch |= S_028C64_FMASK_TILE_MAX(tex->fmask.pitch_in_pixels / 8 - 1); + cb_color_attrib |= S_028C74_FMASK_TILE_MODE_INDEX(tex->fmask.tile_mode_index); + cb_color_fmask = (tex->resource.gpu_address + tex->fmask.offset) >> 8; + cb_color_fmask_slice = S_028C88_TILE_MAX(tex->fmask.slice_tile_max); + } else { + /* This must be set for fast clear to work without FMASK. */ + if (sctx->b.chip_class >= CIK) + cb_color_pitch |= S_028C64_FMASK_TILE_MAX(pitch_tile_max); + cb_color_attrib |= S_028C74_FMASK_TILE_MODE_INDEX(tile_mode_index); + cb_color_fmask = cb_color_base; + cb_color_fmask_slice = S_028C88_TILE_MAX(slice_tile_max); + } + + cb_color_info = cb->cb_color_info | tex->cb_color_info; + + if (tex->dcc_offset && cb->base.u.tex.level < tex->surface.num_dcc_levels) { + bool is_msaa_resolve_dst = state->cbufs[0] && + state->cbufs[0]->texture->nr_samples > 1 && + state->cbufs[1] == &cb->base && + state->cbufs[1]->texture->nr_samples <= 1; + + if (!is_msaa_resolve_dst) + cb_color_info |= S_028C70_DCC_ENABLE(1); + } + radeon_set_context_reg_seq(cs, R_028C60_CB_COLOR0_BASE + i * 0x3C, sctx->b.chip_class >= VI ? 14 : 13); - radeon_emit(cs, cb->cb_color_base); /* R_028C60_CB_COLOR0_BASE */ - radeon_emit(cs, cb->cb_color_pitch); /* R_028C64_CB_COLOR0_PITCH */ - radeon_emit(cs, cb->cb_color_slice); /* R_028C68_CB_COLOR0_SLICE */ + radeon_emit(cs, cb_color_base); /* R_028C60_CB_COLOR0_BASE */ + radeon_emit(cs, cb_color_pitch); /* R_028C64_CB_COLOR0_PITCH */ + radeon_emit(cs, cb_color_slice); /* R_028C68_CB_COLOR0_SLICE */ radeon_emit(cs, cb->cb_color_view); /* R_028C6C_CB_COLOR0_VIEW */ - radeon_emit(cs, cb->cb_color_info | tex->cb_color_info); /* R_028C70_CB_COLOR0_INFO */ - radeon_emit(cs, cb->cb_color_attrib); /* R_028C74_CB_COLOR0_ATTRIB */ + radeon_emit(cs, cb_color_info); /* R_028C70_CB_COLOR0_INFO */ + radeon_emit(cs, cb_color_attrib); /* R_028C74_CB_COLOR0_ATTRIB */ radeon_emit(cs, cb->cb_dcc_control); /* R_028C78_CB_COLOR0_DCC_CONTROL */ radeon_emit(cs, tex->cmask.base_address_reg); /* R_028C7C_CB_COLOR0_CMASK */ radeon_emit(cs, tex->cmask.slice_tile_max); /* R_028C80_CB_COLOR0_CMASK_SLICE */ - radeon_emit(cs, cb->cb_color_fmask); /* R_028C84_CB_COLOR0_FMASK */ - radeon_emit(cs, cb->cb_color_fmask_slice); /* R_028C88_CB_COLOR0_FMASK_SLICE */ + radeon_emit(cs, cb_color_fmask); /* R_028C84_CB_COLOR0_FMASK */ + radeon_emit(cs, cb_color_fmask_slice); /* R_028C88_CB_COLOR0_FMASK_SLICE */ radeon_emit(cs, tex->color_clear_value[0]); /* R_028C8C_CB_COLOR0_CLEAR_WORD0 */ radeon_emit(cs, tex->color_clear_value[1]); /* R_028C90_CB_COLOR0_CLEAR_WORD1 */ - if (sctx->b.chip_class >= VI) - radeon_emit(cs, cb->cb_dcc_base); /* R_028C94_CB_COLOR0_DCC_BASE */ - } - /* set CB_COLOR1_INFO for possible dual-src blending */ - if (i == 1 && state->cbufs[0] && - sctx->framebuffer.dirty_cbufs & (1 << 0)) { - radeon_set_context_reg(cs, R_028C70_CB_COLOR0_INFO + 1 * 0x3C, - cb->cb_color_info | tex->cb_color_info); - i++; + if (sctx->b.chip_class >= VI) /* R_028C94_CB_COLOR0_DCC_BASE */ + radeon_emit(cs, ((!tex->dcc_separate_buffer ? tex->resource.gpu_address : 0) + + tex->dcc_offset + + tex->surface.level[cb->base.u.tex.level].dcc_offset) >> 8); } for (; i < 8 ; i++) if (sctx->framebuffer.dirty_cbufs & (1 << i)) @@ -2527,8 +2643,6 @@ radeon_emit(cs, fui(rtex->depth_clear_value)); /* R_02802C_DB_DEPTH_CLEAR */ radeon_set_context_reg(cs, R_028ABC_DB_HTILE_SURFACE, zb->db_htile_surface); - radeon_set_context_reg(cs, R_028B78_PA_SU_POLY_OFFSET_DB_FMT_CNTL, - zb->pa_su_poly_offset_db_fmt_cntl); } else if (sctx->framebuffer.dirty_zsbuf) { radeon_set_context_reg_seq(cs, R_028040_DB_Z_INFO, 2); radeon_emit(cs, S_028040_FORMAT(V_028040_Z_INVALID)); /* R_028040_DB_Z_INFO */ @@ -2559,7 +2673,10 @@ /* On Polaris, the small primitive filter uses the sample locations * even when MSAA is off, so we need to make sure they're set to 0. */ - if ((nr_samples > 1 || sctx->b.family >= CHIP_POLARIS10) && + if (sctx->b.family >= CHIP_POLARIS10) + nr_samples = MAX2(nr_samples, 1); + + if (nr_samples >= 1 && (nr_samples != sctx->msaa_sample_locs.nr_samples)) { sctx->msaa_sample_locs.nr_samples = nr_samples; cayman_emit_msaa_sample_locs(cs, nr_samples); @@ -2586,13 +2703,27 @@ static void si_emit_msaa_config(struct si_context *sctx, struct r600_atom *atom) { struct radeon_winsys_cs *cs = sctx->b.gfx.cs; + unsigned num_tile_pipes = sctx->screen->b.info.num_tile_pipes; + /* 33% faster rendering to linear color buffers */ + bool dst_is_linear = sctx->framebuffer.any_dst_linear; + unsigned sc_mode_cntl_1 = + S_028A4C_WALK_SIZE(dst_is_linear) | + S_028A4C_WALK_FENCE_ENABLE(!dst_is_linear) | + S_028A4C_WALK_FENCE_SIZE(num_tile_pipes == 2 ? 2 : 3) | + /* always 1: */ + S_028A4C_WALK_ALIGN8_PRIM_FITS_ST(1) | + S_028A4C_SUPERTILE_WALK_ORDER_ENABLE(1) | + S_028A4C_TILE_WALK_ORDER_ENABLE(1) | + S_028A4C_MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE(1) | + S_028A4C_FORCE_EOV_CNTDWN_ENABLE(1) | + S_028A4C_FORCE_EOV_REZ_ENABLE(1); cayman_emit_msaa_config(cs, sctx->framebuffer.nr_samples, sctx->ps_iter_samples, - sctx->smoothing_enabled ? SI_NUM_SMOOTH_AA_SAMPLES : 0); + sctx->smoothing_enabled ? SI_NUM_SMOOTH_AA_SAMPLES : 0, + sc_mode_cntl_1); } - static void si_set_min_samples(struct pipe_context *ctx, unsigned min_samples) { struct si_context *sctx = (struct si_context *)ctx; @@ -2601,6 +2732,7 @@ return; sctx->ps_iter_samples = min_samples; + sctx->do_update_shaders = true; if (sctx->framebuffer.nr_samples > 1) si_mark_atom_dirty(sctx, &sctx->msaa_config); @@ -2617,12 +2749,11 @@ void si_make_buffer_descriptor(struct si_screen *screen, struct r600_resource *buf, enum pipe_format format, - unsigned first_element, unsigned last_element, + unsigned offset, unsigned size, uint32_t *state) { const struct util_format_description *desc; int first_non_void; - uint64_t va; unsigned stride; unsigned num_records; unsigned num_format, data_format; @@ -2630,19 +2761,17 @@ desc = util_format_description(format); first_non_void = util_format_get_first_non_void_channel(format); stride = desc->block.bits / 8; - va = buf->gpu_address + first_element * stride; num_format = si_translate_buffer_numformat(&screen->b.b, desc, first_non_void); data_format = si_translate_buffer_dataformat(&screen->b.b, desc, first_non_void); - num_records = last_element + 1 - first_element; - num_records = MIN2(num_records, buf->b.b.width0 / stride); + num_records = size / stride; + num_records = MIN2(num_records, (buf->b.b.width0 - offset) / stride); if (screen->b.chip_class >= VI) num_records *= stride; - state[4] = va; - state[5] = S_008F04_BASE_ADDRESS_HI(va >> 32) | - S_008F04_STRIDE(stride); + state[4] = 0; + state[5] = S_008F04_STRIDE(stride); state[6] = num_records; state[7] = S_008F0C_DST_SEL_X(si_map_swizzle(desc->swizzle[0])) | S_008F0C_DST_SEL_Y(si_map_swizzle(desc->swizzle[1])) | @@ -2662,55 +2791,40 @@ enum pipe_texture_target target, enum pipe_format pipe_format, const unsigned char state_swizzle[4], - unsigned base_level, unsigned first_level, unsigned last_level, + unsigned first_level, unsigned last_level, unsigned first_layer, unsigned last_layer, unsigned width, unsigned height, unsigned depth, uint32_t *state, uint32_t *fmask_state) { struct pipe_resource *res = &tex->resource.b.b; - const struct radeon_surf_level *surflevel = tex->surface.level; const struct util_format_description *desc; unsigned char swizzle[4]; int first_non_void; unsigned num_format, data_format, type; - uint32_t pitch; uint64_t va; - /* Texturing with separate depth and stencil. */ - if (tex->is_depth && !tex->is_flushing_texture) { - switch (pipe_format) { - case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT: - pipe_format = PIPE_FORMAT_Z32_FLOAT; - break; - case PIPE_FORMAT_X8Z24_UNORM: - case PIPE_FORMAT_S8_UINT_Z24_UNORM: - /* Z24 is always stored like this. */ - pipe_format = PIPE_FORMAT_Z24X8_UNORM; - break; - case PIPE_FORMAT_X24S8_UINT: - case PIPE_FORMAT_S8X24_UINT: - case PIPE_FORMAT_X32_S8X24_UINT: - pipe_format = PIPE_FORMAT_S8_UINT; - surflevel = tex->surface.stencil_level; - break; - default:; - } - } - desc = util_format_description(pipe_format); if (desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS) { const unsigned char swizzle_xxxx[4] = {0, 0, 0, 0}; const unsigned char swizzle_yyyy[4] = {1, 1, 1, 1}; + const unsigned char swizzle_wwww[4] = {3, 3, 3, 3}; switch (pipe_format) { case PIPE_FORMAT_S8_UINT_Z24_UNORM: - case PIPE_FORMAT_X24S8_UINT: case PIPE_FORMAT_X32_S8X24_UINT: case PIPE_FORMAT_X8Z24_UNORM: util_format_compose_swizzles(swizzle_yyyy, state_swizzle, swizzle); break; + case PIPE_FORMAT_X24S8_UINT: + /* + * X24S8 is implemented as an 8_8_8_8 data format, to + * fix texture gathers. This affects at least + * GL45-CTS.texture_cube_map_array.sampling on VI. + */ + util_format_compose_swizzles(swizzle_wwww, state_swizzle, swizzle); + break; default: util_format_compose_swizzles(swizzle_xxxx, state_swizzle, swizzle); } @@ -2817,15 +2931,12 @@ } else if (type == V_008F1C_SQ_RSRC_IMG_CUBE) depth = res->array_size / 6; - pitch = surflevel[base_level].nblk_x * util_format_get_blockwidth(pipe_format); - va = tex->resource.gpu_address + surflevel[base_level].offset; - - state[0] = va >> 8; - state[1] = (S_008F14_BASE_ADDRESS_HI(va >> 40) | - S_008F14_DATA_FORMAT(data_format) | + state[0] = 0; + state[1] = (S_008F14_DATA_FORMAT(data_format) | S_008F14_NUM_FORMAT(num_format)); state[2] = (S_008F18_WIDTH(width - 1) | - S_008F18_HEIGHT(height - 1)); + S_008F18_HEIGHT(height - 1) | + S_008F18_PERF_MOD(4)); state[3] = (S_008F1C_DST_SEL_X(si_map_swizzle(swizzle[0])) | S_008F1C_DST_SEL_Y(si_map_swizzle(swizzle[1])) | S_008F1C_DST_SEL_Z(si_map_swizzle(swizzle[2])) | @@ -2835,24 +2946,19 @@ S_008F1C_LAST_LEVEL(res->nr_samples > 1 ? util_logbase2(res->nr_samples) : last_level) | - S_008F1C_TILING_INDEX(si_tile_mode_index(tex, base_level, false)) | S_008F1C_POW2_PAD(res->last_level > 0) | S_008F1C_TYPE(type)); - state[4] = (S_008F20_DEPTH(depth - 1) | S_008F20_PITCH(pitch - 1)); + state[4] = S_008F20_DEPTH(depth - 1); state[5] = (S_008F24_BASE_ARRAY(first_layer) | S_008F24_LAST_ARRAY(last_layer)); + state[6] = 0; + state[7] = 0; if (tex->dcc_offset) { - unsigned swap = r600_translate_colorswap(pipe_format, FALSE); + unsigned swap = r600_translate_colorswap(pipe_format, false); - state[6] = S_008F28_COMPRESSION_EN(1) | S_008F28_ALPHA_IS_ON_MSB(swap <= 1); - state[7] = (tex->resource.gpu_address + - tex->dcc_offset + - surflevel[base_level].dcc_offset) >> 8; + state[6] = S_008F28_ALPHA_IS_ON_MSB(swap <= 1); } else { - state[6] = 0; - state[7] = 0; - /* The last dword is unused by hw. The shader uses it to clear * bits in the first dword of sampler state. */ @@ -2930,6 +3036,8 @@ unsigned char state_swizzle[4]; unsigned height, depth, width; unsigned last_layer = state->u.tex.last_layer; + enum pipe_format pipe_format; + const struct radeon_surf_level *surflevel; if (!view) return NULL; @@ -2940,16 +3048,7 @@ view->base.reference.count = 1; view->base.context = ctx; - /* NULL resource, obey swizzle (only ZERO and ONE make sense). */ - if (!texture) { - view->state[3] = S_008F1C_DST_SEL_X(si_map_swizzle(state->swizzle_r)) | - S_008F1C_DST_SEL_Y(si_map_swizzle(state->swizzle_g)) | - S_008F1C_DST_SEL_Z(si_map_swizzle(state->swizzle_b)) | - S_008F1C_DST_SEL_W(si_map_swizzle(state->swizzle_a)) | - S_008F1C_TYPE(V_008F1C_SQ_RSRC_IMG_1D); - return &view->base; - } - + assert(texture); pipe_resource_reference(&view->base.texture, texture); if (state->format == PIPE_FORMAT_X24S8_UINT || @@ -2963,11 +3062,9 @@ si_make_buffer_descriptor(sctx->screen, (struct r600_resource *)texture, state->format, - state->u.buf.first_element, - state->u.buf.last_element, + state->u.buf.offset, + state->u.buf.size, view->state); - - LIST_ADDTAIL(&view->list, &sctx->b.texture_buffers); return &view->base; } @@ -3001,13 +3098,70 @@ state->target == PIPE_TEXTURE_CUBE) last_layer = state->u.tex.first_layer; - si_make_texture_descriptor(sctx->screen, tmp, true, state->target, - state->format, state_swizzle, - base_level, first_level, last_level, + /* Texturing with separate depth and stencil. */ + pipe_format = state->format; + + /* Depth/stencil texturing sometimes needs separate texture. */ + if (tmp->is_depth && !r600_can_sample_zs(tmp, view->is_stencil_sampler)) { + if (!tmp->flushed_depth_texture && + !r600_init_flushed_depth_texture(ctx, texture, NULL)) { + pipe_resource_reference(&view->base.texture, NULL); + FREE(view); + return NULL; + } + + assert(tmp->flushed_depth_texture); + + /* Override format for the case where the flushed texture + * contains only Z or only S. + */ + if (tmp->flushed_depth_texture->resource.b.b.format != tmp->resource.b.b.format) + pipe_format = tmp->flushed_depth_texture->resource.b.b.format; + + tmp = tmp->flushed_depth_texture; + } + + surflevel = tmp->surface.level; + + if (tmp->db_compatible) { + if (!view->is_stencil_sampler) + pipe_format = tmp->db_render_format; + + switch (pipe_format) { + case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT: + pipe_format = PIPE_FORMAT_Z32_FLOAT; + break; + case PIPE_FORMAT_X8Z24_UNORM: + case PIPE_FORMAT_S8_UINT_Z24_UNORM: + /* Z24 is always stored like this for DB + * compatibility. + */ + pipe_format = PIPE_FORMAT_Z24X8_UNORM; + break; + case PIPE_FORMAT_X24S8_UINT: + case PIPE_FORMAT_S8X24_UINT: + case PIPE_FORMAT_X32_S8X24_UINT: + pipe_format = PIPE_FORMAT_S8_UINT; + surflevel = tmp->surface.stencil_level; + break; + default:; + } + } + + vi_dcc_disable_if_incompatible_format(&sctx->b, texture, + state->u.tex.first_level, + state->format); + + si_make_texture_descriptor(sctx->screen, tmp, true, + state->target, pipe_format, state_swizzle, + first_level, last_level, state->u.tex.first_layer, last_layer, width, height, depth, view->state, view->fmask_state); + view->base_level_info = &surflevel[base_level]; + view->base_level = base_level; + view->block_width = util_format_get_blockwidth(pipe_format); return &view->base; } @@ -3026,9 +3180,6 @@ { struct si_sampler_view *view = (struct si_sampler_view *)state; - if (state->texture && state->texture->target == PIPE_BUFFER) - LIST_DELINIT(&view->list); - pipe_resource_reference(&state->texture, NULL); FREE(view); } @@ -3118,16 +3269,22 @@ } } +#ifdef DEBUG + rstate->magic = SI_SAMPLER_STATE_MAGIC; +#endif rstate->val[0] = (S_008F30_CLAMP_X(si_tex_wrap(state->wrap_s)) | S_008F30_CLAMP_Y(si_tex_wrap(state->wrap_t)) | S_008F30_CLAMP_Z(si_tex_wrap(state->wrap_r)) | S_008F30_MAX_ANISO_RATIO(max_aniso_ratio) | S_008F30_DEPTH_COMPARE_FUNC(si_tex_compare(state->compare_func)) | S_008F30_FORCE_UNNORMALIZED(!state->normalized_coords) | + S_008F30_ANISO_THRESHOLD(max_aniso_ratio >> 1) | + S_008F30_ANISO_BIAS(max_aniso_ratio) | S_008F30_DISABLE_CUBE_WRAP(!state->seamless_cube_map) | S_008F30_COMPAT_MODE(sctx->b.chip_class >= VI)); rstate->val[1] = (S_008F34_MIN_LOD(S_FIXED(CLAMP(state->min_lod, 0, 15), 8)) | - S_008F34_MAX_LOD(S_FIXED(CLAMP(state->max_lod, 0, 15), 8))); + S_008F34_MAX_LOD(S_FIXED(CLAMP(state->max_lod, 0, 15), 8)) | + S_008F34_PERF_MIP(max_aniso_ratio ? max_aniso_ratio + 6 : 0)); rstate->val[2] = (S_008F38_LOD_BIAS(S_FIXED(CLAMP(state->lod_bias, -16, 16), 8)) | S_008F38_XY_MAG_FILTER(eg_tex_filter(state->mag_img_filter, max_aniso)) | S_008F38_XY_MIN_FILTER(eg_tex_filter(state->min_img_filter, max_aniso)) | @@ -3157,6 +3314,13 @@ struct radeon_winsys_cs *cs = sctx->b.gfx.cs; unsigned mask = sctx->sample_mask.sample_mask; + /* Needed for line and polygon smoothing as well as for the Polaris + * small primitive filter. We expect the state tracker to take care of + * this for us. + */ + assert(mask == 0xffff || sctx->framebuffer.nr_samples > 1 || + (mask & 1 && sctx->blitter->running)); + radeon_set_context_reg_seq(cs, R_028C38_PA_SC_AA_MASK_X0Y0_X1Y0, 2); radeon_emit(cs, mask | (mask << 16)); radeon_emit(cs, mask | (mask << 16)); @@ -3164,6 +3328,12 @@ static void si_delete_sampler_state(struct pipe_context *ctx, void *state) { +#ifdef DEBUG + struct si_sampler_state *s = state; + + assert(s->magic == SI_SAMPLER_STATE_MAGIC); + s->magic = 0; +#endif free(state); } @@ -3176,6 +3346,7 @@ const struct pipe_vertex_element *elements) { struct si_vertex_element *v = CALLOC_STRUCT(si_vertex_element); + bool used[SI_NUM_VERTEX_BUFFERS] = {}; int i; assert(count <= SI_MAX_ATTRIBS); @@ -3185,13 +3356,26 @@ v->count = count; for (i = 0; i < count; ++i) { const struct util_format_description *desc; + const struct util_format_channel_description *channel; unsigned data_format, num_format; int first_non_void; + unsigned vbo_index = elements[i].vertex_buffer_index; + + if (vbo_index >= SI_NUM_VERTEX_BUFFERS) { + FREE(v); + return NULL; + } + + if (!used[vbo_index]) { + v->first_vb_use_mask |= 1 << i; + used[vbo_index] = true; + } desc = util_format_description(elements[i].src_format); first_non_void = util_format_get_first_non_void_channel(elements[i].src_format); data_format = si_translate_buffer_dataformat(ctx->screen, desc, first_non_void); num_format = si_translate_buffer_numformat(ctx->screen, desc, first_non_void); + channel = first_non_void >= 0 ? &desc->channel[first_non_void] : NULL; v->rsrc_word3[i] = S_008F0C_DST_SEL_X(si_map_swizzle(desc->swizzle[0])) | S_008F0C_DST_SEL_Y(si_map_swizzle(desc->swizzle[1])) | @@ -3200,6 +3384,54 @@ S_008F0C_NUM_FORMAT(num_format) | S_008F0C_DATA_FORMAT(data_format); v->format_size[i] = desc->block.bits / 8; + + /* The hardware always treats the 2-bit alpha channel as + * unsigned, so a shader workaround is needed. + */ + if (data_format == V_008F0C_BUF_DATA_FORMAT_2_10_10_10) { + if (num_format == V_008F0C_BUF_NUM_FORMAT_SNORM) { + v->fix_fetch |= (uint64_t)SI_FIX_FETCH_A2_SNORM << (4 * i); + } else if (num_format == V_008F0C_BUF_NUM_FORMAT_SSCALED) { + v->fix_fetch |= (uint64_t)SI_FIX_FETCH_A2_SSCALED << (4 * i); + } else if (num_format == V_008F0C_BUF_NUM_FORMAT_SINT) { + /* This isn't actually used in OpenGL. */ + v->fix_fetch |= (uint64_t)SI_FIX_FETCH_A2_SINT << (4 * i); + } + } else if (channel && channel->type == UTIL_FORMAT_TYPE_FIXED) { + if (desc->swizzle[3] == PIPE_SWIZZLE_1) + v->fix_fetch |= (uint64_t)SI_FIX_FETCH_RGBX_32_FIXED << (4 * i); + else + v->fix_fetch |= (uint64_t)SI_FIX_FETCH_RGBA_32_FIXED << (4 * i); + } else if (channel && channel->size == 32 && !channel->pure_integer) { + if (channel->type == UTIL_FORMAT_TYPE_SIGNED) { + if (channel->normalized) { + if (desc->swizzle[3] == PIPE_SWIZZLE_1) + v->fix_fetch |= (uint64_t)SI_FIX_FETCH_RGBX_32_SNORM << (4 * i); + else + v->fix_fetch |= (uint64_t)SI_FIX_FETCH_RGBA_32_SNORM << (4 * i); + } else { + v->fix_fetch |= (uint64_t)SI_FIX_FETCH_RGBA_32_SSCALED << (4 * i); + } + } else if (channel->type == UTIL_FORMAT_TYPE_UNSIGNED) { + if (channel->normalized) { + if (desc->swizzle[3] == PIPE_SWIZZLE_1) + v->fix_fetch |= (uint64_t)SI_FIX_FETCH_RGBX_32_UNORM << (4 * i); + else + v->fix_fetch |= (uint64_t)SI_FIX_FETCH_RGBA_32_UNORM << (4 * i); + } else { + v->fix_fetch |= (uint64_t)SI_FIX_FETCH_RGBA_32_USCALED << (4 * i); + } + } + } + + /* We work around the fact that 8_8_8 and 16_16_16 data formats + * do not exist by using the corresponding 4-component formats. + * This requires a fixup of the descriptor for bounds checks. + */ + if (desc->block.bits == 3 * 8 || + desc->block.bits == 3 * 16) { + v->fix_size3 |= (desc->block.bits / 24) << (2 * i); + } } memcpy(v->elements, elements, sizeof(struct pipe_vertex_element) * count); @@ -3213,6 +3445,7 @@ sctx->vertex_elements = v; sctx->vertex_buffers_dirty = true; + sctx->do_update_shaders = true; } static void si_delete_vertex_element(struct pipe_context *ctx, void *state) @@ -3238,11 +3471,14 @@ for (i = 0; i < count; i++) { const struct pipe_vertex_buffer *src = buffers + i; struct pipe_vertex_buffer *dsti = dst + i; + struct pipe_resource *buf = src->buffer; - pipe_resource_reference(&dsti->buffer, src->buffer); + pipe_resource_reference(&dsti->buffer, buf); dsti->buffer_offset = src->buffer_offset; dsti->stride = src->stride; - r600_context_add_resource_size(ctx, src->buffer); + r600_context_add_resource_size(ctx, buf); + if (buf) + r600_resource(buf)->bind_history |= PIPE_BIND_VERTEX_BUFFER; } } else { for (i = 0; i < count; i++) { @@ -3258,9 +3494,13 @@ struct si_context *sctx = (struct si_context *)ctx; if (ib) { - pipe_resource_reference(&sctx->index_buffer.buffer, ib->buffer); + struct pipe_resource *buf = ib->buffer; + + pipe_resource_reference(&sctx->index_buffer.buffer, buf); memcpy(&sctx->index_buffer, ib, sizeof(*ib)); - r600_context_add_resource_size(ctx, ib->buffer); + r600_context_add_resource_size(ctx, buf); + if (buf) + r600_resource(buf)->bind_history |= PIPE_BIND_INDEX_BUFFER; } else { pipe_resource_reference(&sctx->index_buffer.buffer, NULL); } @@ -3293,16 +3533,16 @@ pipe_resource_reference(&cb.buffer, NULL); } -static void si_texture_barrier(struct pipe_context *ctx) +static void si_texture_barrier(struct pipe_context *ctx, unsigned flags) { struct si_context *sctx = (struct si_context *)ctx; sctx->b.flags |= SI_CONTEXT_INV_VMEM_L1 | SI_CONTEXT_INV_GLOBAL_L2 | - SI_CONTEXT_FLUSH_AND_INV_CB | - SI_CONTEXT_CS_PARTIAL_FLUSH; + SI_CONTEXT_FLUSH_AND_INV_CB; } +/* This only ensures coherency for shader image/buffer stores. */ static void si_memory_barrier(struct pipe_context *ctx, unsigned flags) { struct si_context *sctx = (struct si_context *)ctx; @@ -3329,26 +3569,19 @@ } if (flags & PIPE_BARRIER_INDEX_BUFFER) { - sctx->b.flags |= SI_CONTEXT_INV_VMEM_L1; - - /* Indices are read through TC L2 since VI. */ + /* Indices are read through TC L2 since VI. + * L1 isn't used. + */ if (sctx->screen->b.chip_class <= CIK) - sctx->b.flags |= SI_CONTEXT_INV_GLOBAL_L2; + sctx->b.flags |= SI_CONTEXT_WRITEBACK_GLOBAL_L2; } if (flags & PIPE_BARRIER_FRAMEBUFFER) sctx->b.flags |= SI_CONTEXT_FLUSH_AND_INV_FRAMEBUFFER; - if (flags & (PIPE_BARRIER_MAPPED_BUFFER | - PIPE_BARRIER_FRAMEBUFFER | - PIPE_BARRIER_INDIRECT_BUFFER)) { - /* Not sure if INV_GLOBAL_L2 is the best thing here. - * - * We need to make sure that TC L1 & L2 are written back to - * memory, because neither CPU accesses nor CB fetches consider - * TC, but there's no need to invalidate any TC cache lines. */ - sctx->b.flags |= SI_CONTEXT_INV_GLOBAL_L2; - } + if (flags & (PIPE_BARRIER_FRAMEBUFFER | + PIPE_BARRIER_INDIRECT_BUFFER)) + sctx->b.flags |= SI_CONTEXT_WRITEBACK_GLOBAL_L2; } static void *si_create_blend_custom(struct si_context *sctx, unsigned mode) @@ -3377,7 +3610,6 @@ si_init_external_atom(sctx, &sctx->b.scissors.atom, &sctx->atoms.s.scissors); si_init_external_atom(sctx, &sctx->b.viewports.atom, &sctx->atoms.s.viewports); - si_init_atom(sctx, &sctx->cache_flush, &sctx->atoms.s.cache_flush, si_emit_cache_flush); si_init_atom(sctx, &sctx->framebuffer.atom, &sctx->atoms.s.framebuffer, si_emit_framebuffer_state); si_init_atom(sctx, &sctx->msaa_sample_locs.atom, &sctx->atoms.s.msaa_sample_locs, si_emit_msaa_sample_locs); si_init_atom(sctx, &sctx->db_render_state, &sctx->atoms.s.db_render_state, si_emit_db_render_state); @@ -3435,6 +3667,7 @@ sctx->b.b.set_active_query_state = si_set_active_query_state; sctx->b.set_occlusion_query_state = si_set_occlusion_query_state; + sctx->b.save_qbo_state = si_save_qbo_state; sctx->b.need_gfx_cs_space = si_need_gfx_cs_space; sctx->b.b.draw_vbo = si_draw_vbo; @@ -3466,6 +3699,7 @@ if (rscreen->info.drm_major != 3) return; + assert(rtex->dcc_separate_buffer == NULL); assert(rtex->fmask.size == 0); /* Metadata image format format version 1: @@ -3485,11 +3719,14 @@ si_make_texture_descriptor(sscreen, rtex, true, res->target, res->format, - swizzle, 0, 0, res->last_level, 0, + swizzle, 0, res->last_level, 0, is_array ? res->array_size - 1 : 0, res->width0, res->height0, res->depth0, desc, NULL); + si_set_mutable_tex_desc_fields(rtex, &rtex->surface.level[0], 0, 0, + rtex->surface.blk_w, false, desc); + /* Clear the base address and set the relative DCC offset. */ desc[0] = 0; desc[1] &= C_008F14_BASE_ADDRESS_HI; @@ -3529,11 +3766,11 @@ * be cleared here. */ rtex->dcc_offset = 0; - rtex->cb_color_info &= ~VI_S_028C70_DCC_ENABLE(1); } void si_init_screen_state_functions(struct si_screen *sscreen) { + sscreen->b.b.is_format_supported = si_is_format_supported; sscreen->b.query_opaque_metadata = si_query_opaque_metadata; sscreen->b.apply_opaque_metadata = si_apply_opaque_metadata; } @@ -3571,19 +3808,6 @@ * fields are for, so I'm leaving them as their default * values. */ - if ((num_se > 2) && ((!se_mask[0] && !se_mask[1]) || - (!se_mask[2] && !se_mask[3]))) { - raster_config_1 &= C_028354_SE_PAIR_MAP; - - if (!se_mask[0] && !se_mask[1]) { - raster_config_1 |= - S_028354_SE_PAIR_MAP(V_028354_RASTER_CONFIG_SE_PAIR_MAP_3); - } else { - raster_config_1 |= - S_028354_SE_PAIR_MAP(V_028354_RASTER_CONFIG_SE_PAIR_MAP_0); - } - } - for (se = 0; se < num_se; se++) { unsigned raster_config_se = raster_config; unsigned pkr0_mask = ((1 << rb_per_pkr) - 1) << (se * rb_per_se); @@ -3663,8 +3887,6 @@ S_030800_SE_INDEX(se) | S_030800_SH_BROADCAST_WRITES(1) | S_030800_INSTANCE_BROADCAST_WRITES(1)); si_pm4_set_reg(pm4, R_028350_PA_SC_RASTER_CONFIG, raster_config_se); - if (sctx->b.chip_class >= CIK) - si_pm4_set_reg(pm4, R_028354_PA_SC_RASTER_CONFIG_1, raster_config_1); } /* GRBM_GFX_INDEX has a different offset on SI and CI+ */ @@ -3672,10 +3894,26 @@ si_pm4_set_reg(pm4, GRBM_GFX_INDEX, SE_BROADCAST_WRITES | SH_BROADCAST_WRITES | INSTANCE_BROADCAST_WRITES); - else + else { si_pm4_set_reg(pm4, R_030800_GRBM_GFX_INDEX, S_030800_SE_BROADCAST_WRITES(1) | S_030800_SH_BROADCAST_WRITES(1) | S_030800_INSTANCE_BROADCAST_WRITES(1)); + + if ((num_se > 2) && ((!se_mask[0] && !se_mask[1]) || + (!se_mask[2] && !se_mask[3]))) { + raster_config_1 &= C_028354_SE_PAIR_MAP; + + if (!se_mask[0] && !se_mask[1]) { + raster_config_1 |= + S_028354_SE_PAIR_MAP(V_028354_RASTER_CONFIG_SE_PAIR_MAP_3); + } else { + raster_config_1 |= + S_028354_SE_PAIR_MAP(V_028354_RASTER_CONFIG_SE_PAIR_MAP_0); + } + } + + si_pm4_set_reg(pm4, R_028354_PA_SC_RASTER_CONFIG_1, raster_config_1); + } } static void si_init_config(struct si_context *sctx) @@ -3686,7 +3924,6 @@ unsigned raster_config, raster_config_1; uint64_t border_color_va = sctx->border_color_buffer->gpu_address; struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); - int i; if (!pm4) return; @@ -3718,11 +3955,6 @@ si_pm4_set_reg(pm4, R_02882C_PA_SU_PRIM_FILTER_CNTL, 0); - for (i = 0; i < 16; i++) { - si_pm4_set_reg(pm4, R_0282D0_PA_SC_VPORT_ZMIN_0 + i*8, 0); - si_pm4_set_reg(pm4, R_0282D4_PA_SC_VPORT_ZMAX_0 + i*8, fui(1.0)); - } - switch (sctx->screen->b.family) { case CHIP_TAHITI: case CHIP_PITCAIRN: @@ -3764,6 +3996,7 @@ raster_config_1 = 0x0000002a; break; case CHIP_POLARIS11: + case CHIP_POLARIS12: raster_config = 0x16000012; raster_config_1 = 0x00000000; break; @@ -3823,22 +4056,37 @@ S_028034_BR_X(16384) | S_028034_BR_Y(16384)); si_pm4_set_reg(pm4, R_02820C_PA_SC_CLIPRECT_RULE, 0xFFFF); - si_pm4_set_reg(pm4, R_028230_PA_SC_EDGERULE, 0xAAAAAAAA); + si_pm4_set_reg(pm4, R_028230_PA_SC_EDGERULE, + S_028230_ER_TRI(0xA) | + S_028230_ER_POINT(0xA) | + S_028230_ER_RECT(0xA) | + /* Required by DX10_DIAMOND_TEST_ENA: */ + S_028230_ER_LINE_LR(0x1A) | + S_028230_ER_LINE_RL(0x26) | + S_028230_ER_LINE_TB(0xA) | + S_028230_ER_LINE_BT(0xA)); /* PA_SU_HARDWARE_SCREEN_OFFSET must be 0 due to hw bug on SI */ si_pm4_set_reg(pm4, R_028234_PA_SU_HARDWARE_SCREEN_OFFSET, 0); si_pm4_set_reg(pm4, R_028820_PA_CL_NANINF_CNTL, 0); si_pm4_set_reg(pm4, R_028AC0_DB_SRESULTS_COMPARE_STATE0, 0x0); si_pm4_set_reg(pm4, R_028AC4_DB_SRESULTS_COMPARE_STATE1, 0x0); si_pm4_set_reg(pm4, R_028AC8_DB_PRELOAD_CONTROL, 0x0); - si_pm4_set_reg(pm4, R_02800C_DB_RENDER_OVERRIDE, - S_02800C_FORCE_HIS_ENABLE0(V_02800C_FORCE_DISABLE) | - S_02800C_FORCE_HIS_ENABLE1(V_02800C_FORCE_DISABLE)); + si_pm4_set_reg(pm4, R_02800C_DB_RENDER_OVERRIDE, 0); si_pm4_set_reg(pm4, R_028400_VGT_MAX_VTX_INDX, ~0); si_pm4_set_reg(pm4, R_028404_VGT_MIN_VTX_INDX, 0); si_pm4_set_reg(pm4, R_028408_VGT_INDX_OFFSET, 0); if (sctx->b.chip_class >= CIK) { + /* If this is 0, Bonaire can hang even if GS isn't being used. + * Other chips are unaffected. These are suboptimal values, + * but we don't use on-chip GS. + */ + si_pm4_set_reg(pm4, R_028A44_VGT_GS_ONCHIP_CNTL, + S_028A44_ES_VERTS_PER_SUBGRP(64) | + S_028A44_GS_PRIMS_PER_SUBGRP(4)); + + si_pm4_set_reg(pm4, R_00B51C_SPI_SHADER_PGM_RSRC3_LS, S_00B51C_CU_EN(0xffff)); si_pm4_set_reg(pm4, R_00B41C_SPI_SHADER_PGM_RSRC3_HS, 0); si_pm4_set_reg(pm4, R_00B31C_SPI_SHADER_PGM_RSRC3_ES, S_00B31C_CU_EN(0xffff)); si_pm4_set_reg(pm4, R_00B21C_SPI_SHADER_PGM_RSRC3_GS, S_00B21C_CU_EN(0xffff)); @@ -3851,7 +4099,6 @@ * * LATE_ALLOC_VS = 2 is the highest safe number. */ - si_pm4_set_reg(pm4, R_00B51C_SPI_SHADER_PGM_RSRC3_LS, S_00B51C_CU_EN(0xffff)); si_pm4_set_reg(pm4, R_00B118_SPI_SHADER_PGM_RSRC3_VS, S_00B118_CU_EN(0xffff)); si_pm4_set_reg(pm4, R_00B11C_SPI_SHADER_LATE_ALLOC_VS, S_00B11C_LIMIT(2)); } else { @@ -3860,7 +4107,6 @@ * - VS can't execute on CU0. * - If HS writes outputs to LDS, LS can't execute on CU0. */ - si_pm4_set_reg(pm4, R_00B51C_SPI_SHADER_PGM_RSRC3_LS, S_00B51C_CU_EN(0xfffe)); si_pm4_set_reg(pm4, R_00B118_SPI_SHADER_PGM_RSRC3_VS, S_00B118_CU_EN(0xfffe)); si_pm4_set_reg(pm4, R_00B11C_SPI_SHADER_LATE_ALLOC_VS, S_00B11C_LIMIT(31)); } @@ -3869,17 +4115,32 @@ } if (sctx->b.chip_class >= VI) { + unsigned vgt_tess_distribution; + si_pm4_set_reg(pm4, R_028424_CB_DCC_CONTROL, S_028424_OVERWRITE_COMBINER_MRT_SHARING_DISABLE(1) | S_028424_OVERWRITE_COMBINER_WATERMARK(4)); if (sctx->b.family < CHIP_POLARIS10) si_pm4_set_reg(pm4, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, 30); si_pm4_set_reg(pm4, R_028C5C_VGT_OUT_DEALLOC_CNTL, 32); - si_pm4_set_reg(pm4, R_028B50_VGT_TESS_DISTRIBUTION, - S_028B50_ACCUM_ISOLINE(32) | - S_028B50_ACCUM_TRI(11) | - S_028B50_ACCUM_QUAD(11) | - S_028B50_DONUT_SPLIT(16)); + + vgt_tess_distribution = + S_028B50_ACCUM_ISOLINE(32) | + S_028B50_ACCUM_TRI(11) | + S_028B50_ACCUM_QUAD(11) | + S_028B50_DONUT_SPLIT(16); + + /* Testing with Unigine Heaven extreme tesselation yielded best results + * with TRAP_SPLIT = 3. + */ + if (sctx->b.family == CHIP_FIJI || + sctx->b.family >= CHIP_POLARIS10) + vgt_tess_distribution |= S_028B50_TRAP_SPLIT(3); + + si_pm4_set_reg(pm4, R_028B50_VGT_TESS_DISTRIBUTION, vgt_tess_distribution); + } else { + si_pm4_set_reg(pm4, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, 14); + si_pm4_set_reg(pm4, R_028C5C_VGT_OUT_DEALLOC_CNTL, 16); } if (sctx->b.family == CHIP_STONEY) diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/si_state_draw.c mesa-17.0.7/src/gallium/drivers/radeonsi/si_state_draw.c --- mesa-12.0.6/src/gallium/drivers/radeonsi/si_state_draw.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/si_state_draw.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,14 +25,14 @@ */ #include "si_pipe.h" -#include "si_shader.h" #include "radeon/r600_cs.h" #include "sid.h" #include "util/u_index_modify.h" #include "util/u_upload_mgr.h" #include "util/u_prim.h" -#include "util/u_memory.h" + +#include "ac_debug.h" static unsigned si_conv_pipe_prim(unsigned mode) { @@ -108,7 +108,20 @@ unsigned input_patch_size, output_patch_size, output_patch0_offset; unsigned perpatch_output_offset, lds_size, ls_rsrc2; unsigned tcs_in_layout, tcs_out_layout, tcs_out_offsets; - unsigned offchip_layout, hardware_lds_size; + unsigned offchip_layout, hardware_lds_size, ls_hs_config; + + if (sctx->last_ls == ls->current && + sctx->last_tcs == tcs && + sctx->last_tes_sh_base == tes_sh_base && + sctx->last_num_tcs_input_cp == num_tcs_input_cp) { + *num_patches = sctx->last_num_patches; + return; + } + + sctx->last_ls = ls->current; + sctx->last_tcs = tcs; + sctx->last_tes_sh_base = tes_sh_base; + sctx->last_num_tcs_input_cp = num_tcs_input_cp; /* This calculates how shader inputs and outputs among VS, TCS, and TES * are laid out in LDS. */ @@ -147,14 +160,37 @@ output_patch_size)); /* Make sure the output data fits in the offchip buffer */ - *num_patches = MIN2(*num_patches, SI_TESS_OFFCHIP_BLOCK_SIZE / - output_patch_size); + *num_patches = MIN2(*num_patches, + (sctx->screen->tess_offchip_block_dw_size * 4) / + output_patch_size); /* Not necessary for correctness, but improves performance. The * specific value is taken from the proprietary driver. */ *num_patches = MIN2(*num_patches, 40); + /* SI bug workaround - limit LS-HS threadgroups to only one wave. */ + if (sctx->b.chip_class == SI) { + unsigned one_wave = 64 / MAX2(num_tcs_input_cp, num_tcs_output_cp); + *num_patches = MIN2(*num_patches, one_wave); + + if (sctx->screen->b.info.max_se == 1) { + /* The VGT HS block increments the patch ID unconditionally + * within a single threadgroup. This results in incorrect + * patch IDs when instanced draws are used. + * + * The intended solution is to restrict threadgroups to + * a single instance by setting SWITCH_ON_EOI, which + * should cause IA to split instances up. However, this + * doesn't work correctly on SI when there is no other + * SE to switch to. + */ + *num_patches = 1; + } + } + + sctx->last_num_patches = *num_patches; + output_patch0_offset = input_patch_size * *num_patches; perpatch_output_offset = output_patch0_offset + pervertex_output_patch_size; @@ -163,22 +199,13 @@ if (sctx->b.chip_class >= CIK) { assert(lds_size <= 65536); - ls_rsrc2 |= S_00B52C_LDS_SIZE(align(lds_size, 512) / 512); + lds_size = align(lds_size, 512) / 512; } else { assert(lds_size <= 32768); - ls_rsrc2 |= S_00B52C_LDS_SIZE(align(lds_size, 256) / 256); + lds_size = align(lds_size, 256) / 256; } - - if (sctx->last_ls == ls->current && - sctx->last_tcs == tcs && - sctx->last_tes_sh_base == tes_sh_base && - sctx->last_num_tcs_input_cp == num_tcs_input_cp) - return; - - sctx->last_ls = ls->current; - sctx->last_tcs = tcs; - sctx->last_tes_sh_base = tes_sh_base; - sctx->last_num_tcs_input_cp = num_tcs_input_cp; + si_multiwave_lds_size_workaround(sctx->screen, &lds_size); + ls_rsrc2 |= S_00B52C_LDS_SIZE(lds_size); /* Due to a hw bug, RSRC2_LS must be written twice with another * LS register written in between. */ @@ -223,6 +250,17 @@ /* Set them for TES. */ radeon_set_sh_reg_seq(cs, tes_sh_base + SI_SGPR_TCS_OFFCHIP_LAYOUT * 4, 1); radeon_emit(cs, offchip_layout); + + ls_hs_config = S_028B58_NUM_PATCHES(*num_patches) | + S_028B58_HS_NUM_INPUT_CP(num_tcs_input_cp) | + S_028B58_HS_NUM_OUTPUT_CP(num_tcs_output_cp); + + if (sctx->b.chip_class >= CIK) + radeon_set_context_reg_idx(cs, R_028B58_VGT_LS_HS_CONFIG, 2, + ls_hs_config); + else + radeon_set_context_reg(cs, R_028B58_VGT_LS_HS_CONFIG, + ls_hs_config); } static unsigned si_num_prims_for_vertices(const struct pipe_draw_info *info) @@ -257,16 +295,8 @@ primgroup_size = 64; /* recommended with a GS */ if (sctx->tes_shader.cso) { - unsigned num_cp_out = - sctx->tcs_shader.cso ? - sctx->tcs_shader.cso->info.properties[TGSI_PROPERTY_TCS_VERTICES_OUT] : - info->vertices_per_patch; - unsigned max_size = 256 / MAX2(info->vertices_per_patch, num_cp_out); - - primgroup_size = MIN2(primgroup_size, max_size); - /* primgroup_size must be set to a multiple of NUM_PATCHES */ - primgroup_size = (primgroup_size / num_patches) * num_patches; + primgroup_size = num_patches; /* SWITCH_ON_EOI must be set if PrimID is used. */ if ((sctx->tcs_shader.cso && sctx->tcs_shader.cso->info.uses_primid) || @@ -281,11 +311,20 @@ partial_vs_wave = true; /* Needed for 028B6C_DISTRIBUTION_MODE != 0 */ - if (sctx->b.chip_class >= VI) { - if (sctx->gs_shader.cso) + if (sctx->screen->has_distributed_tess) { + if (sctx->gs_shader.cso) { partial_es_wave = true; - else + + /* GPU hang workaround. */ + if (sctx->b.family == CHIP_TONGA || + sctx->b.family == CHIP_FIJI || + sctx->b.family == CHIP_POLARIS10 || + sctx->b.family == CHIP_POLARIS11 || + sctx->b.family == CHIP_POLARIS12) + partial_vs_wave = true; + } else { partial_vs_wave = true; + } } } @@ -299,13 +338,21 @@ if (sctx->b.chip_class >= CIK) { /* WD_SWITCH_ON_EOP has no effect on GPUs with less than * 4 shader engines. Set 1 to pass the assertion below. - * The other cases are hardware requirements. */ + * The other cases are hardware requirements. + * + * Polaris supports primitive restart with WD_SWITCH_ON_EOP=0 + * for points, line strips, and tri strips. + */ if (sctx->b.screen->info.max_se < 4 || prim == PIPE_PRIM_POLYGON || prim == PIPE_PRIM_LINE_LOOP || prim == PIPE_PRIM_TRIANGLE_FAN || prim == PIPE_PRIM_TRIANGLE_STRIP_ADJACENCY || - info->primitive_restart || + (info->primitive_restart && + (sctx->b.family < CHIP_POLARIS10 || + (prim != PIPE_PRIM_POINTS && + prim != PIPE_PRIM_LINE_STRIP && + prim != PIPE_PRIM_TRIANGLE_STRIP))) || info->count_from_stream_output) wd_switch_on_eop = true; @@ -316,6 +363,18 @@ (info->indirect || info->instance_count > 1)) wd_switch_on_eop = true; + /* Performance recommendation for 4 SE Gfx7-8 parts if + * instances are smaller than a primgroup. + * Assume indirect draws always use small instances. + * This is needed for good VS wave utilization. + */ + if (sctx->b.chip_class <= VI && + sctx->b.screen->info.max_se >= 4 && + (info->indirect || + (info->instance_count > 1 && + si_num_prims_for_vertices(info) < primgroup_size))) + wd_switch_on_eop = true; + /* Required on CIK and later. */ if (sctx->b.screen->info.max_se > 2 && !wd_switch_on_eop) ia_switch_on_eoi = true; @@ -332,6 +391,19 @@ (info->indirect || info->instance_count > 1)) partial_vs_wave = true; + /* GS hw bug with single-primitive instances and SWITCH_ON_EOI. + * The hw doc says all multi-SE chips are affected, but Vulkan + * only applies it to Hawaii. Do what Vulkan does. + */ + if (sctx->b.family == CHIP_HAWAII && + sctx->gs_shader.cso && + ia_switch_on_eoi && + (info->indirect || + (info->instance_count > 1 && + si_num_prims_for_vertices(info) <= 1))) + sctx->b.flags |= SI_CONTEXT_VGT_FLUSH; + + /* If the WD switch is false, the IA switch must be false too. */ assert(wd_switch_on_eop || !ia_switch_on_eop); } @@ -344,14 +416,6 @@ if (SI_GS_PER_ES / primgroup_size >= sctx->screen->gs_table_depth - 3) partial_es_wave = true; - /* Hw bug with single-primitive instances and SWITCH_ON_EOI - * on multi-SE chips. */ - if (sctx->b.screen->info.max_se >= 2 && ia_switch_on_eoi && - (info->indirect || - (info->instance_count > 1 && - si_num_prims_for_vertices(info) <= 1))) - sctx->b.flags |= SI_CONTEXT_VGT_FLUSH; - return S_028AA8_SWITCH_ON_EOP(ia_switch_on_eop) | S_028AA8_SWITCH_ON_EOI(ia_switch_on_eoi) | S_028AA8_PARTIAL_VS_WAVE_ON(partial_vs_wave) | @@ -362,24 +426,6 @@ max_primgroup_in_wave : 0); } -static unsigned si_get_ls_hs_config(struct si_context *sctx, - const struct pipe_draw_info *info, - unsigned num_patches) -{ - unsigned num_output_cp; - - if (!sctx->tes_shader.cso) - return 0; - - num_output_cp = sctx->tcs_shader.cso ? - sctx->tcs_shader.cso->info.properties[TGSI_PROPERTY_TCS_VERTICES_OUT] : - info->vertices_per_patch; - - return S_028B58_NUM_PATCHES(num_patches) | - S_028B58_HS_NUM_INPUT_CP(info->vertices_per_patch) | - S_028B58_HS_NUM_OUTPUT_CP(num_output_cp); -} - static void si_emit_scratch_reloc(struct si_context *sctx) { struct radeon_winsys_cs *cs = sctx->b.gfx.cs; @@ -418,10 +464,12 @@ rs->pa_sc_line_stipple == sctx->last_sc_line_stipple) return; + /* For lines, reset the stipple pattern at each primitive. Otherwise, + * reset the stipple pattern at each packet (line strips, line loops). + */ radeon_set_context_reg(cs, R_028A0C_PA_SC_LINE_STIPPLE, rs->pa_sc_line_stipple | - S_028A0C_AUTO_RESET_CNTL(rast_prim == PIPE_PRIM_LINES ? 1 : - rast_prim == PIPE_PRIM_LINE_STRIP ? 2 : 0)); + S_028A0C_AUTO_RESET_CNTL(rast_prim == PIPE_PRIM_LINES ? 1 : 2)); sctx->last_rast_prim = rast_prim; sctx->last_sc_line_stipple = rs->pa_sc_line_stipple; @@ -433,7 +481,7 @@ struct radeon_winsys_cs *cs = sctx->b.gfx.cs; unsigned prim = si_conv_pipe_prim(info->mode); unsigned gs_out_prim = si_conv_prim_to_gs_out(sctx->current_rast_prim); - unsigned ia_multi_vgt_param, ls_hs_config, num_patches = 0; + unsigned ia_multi_vgt_param, num_patches = 0; /* Polaris needs different VTX_REUSE_DEPTH settings depending on * whether the "fractional odd" tessellation spacing is used. @@ -458,30 +506,23 @@ si_emit_derived_tess_state(sctx, info, &num_patches); ia_multi_vgt_param = si_get_ia_multi_vgt_param(sctx, info, num_patches); - ls_hs_config = si_get_ls_hs_config(sctx, info, num_patches); /* Draw state. */ - if (prim != sctx->last_prim || - ia_multi_vgt_param != sctx->last_multi_vgt_param || - ls_hs_config != sctx->last_ls_hs_config) { - if (sctx->b.family >= CHIP_POLARIS10) { + if (ia_multi_vgt_param != sctx->last_multi_vgt_param) { + if (sctx->b.chip_class >= CIK) radeon_set_context_reg_idx(cs, R_028AA8_IA_MULTI_VGT_PARAM, 1, ia_multi_vgt_param); - radeon_set_context_reg_idx(cs, R_028B58_VGT_LS_HS_CONFIG, 2, ls_hs_config); + else + radeon_set_context_reg(cs, R_028AA8_IA_MULTI_VGT_PARAM, ia_multi_vgt_param); + + sctx->last_multi_vgt_param = ia_multi_vgt_param; + } + if (prim != sctx->last_prim) { + if (sctx->b.chip_class >= CIK) radeon_set_uconfig_reg_idx(cs, R_030908_VGT_PRIMITIVE_TYPE, 1, prim); - } else if (sctx->b.chip_class >= CIK) { - radeon_emit(cs, PKT3(PKT3_DRAW_PREAMBLE, 2, 0)); - radeon_emit(cs, prim); /* VGT_PRIMITIVE_TYPE */ - radeon_emit(cs, ia_multi_vgt_param); /* IA_MULTI_VGT_PARAM */ - radeon_emit(cs, ls_hs_config); /* VGT_LS_HS_CONFIG */ - } else { + else radeon_set_config_reg(cs, R_008958_VGT_PRIMITIVE_TYPE, prim); - radeon_set_context_reg(cs, R_028AA8_IA_MULTI_VGT_PARAM, ia_multi_vgt_param); - radeon_set_context_reg(cs, R_028B58_VGT_LS_HS_CONFIG, ls_hs_config); - } sctx->last_prim = prim; - sctx->last_multi_vgt_param = ia_multi_vgt_param; - sctx->last_ls_hs_config = ls_hs_config; } if (gs_out_prim != sctx->last_gs_out_prim) { @@ -511,6 +552,8 @@ struct radeon_winsys_cs *cs = sctx->b.gfx.cs; unsigned sh_base_reg = sctx->shader_userdata.sh_base[PIPE_SHADER_VERTEX]; bool render_cond_bit = sctx->b.render_cond && !sctx->b.render_cond_force_off; + uint32_t index_max_size = 0; + uint64_t index_va = 0; if (info->count_from_stream_output) { struct r600_so_target *t = @@ -537,27 +580,45 @@ /* draw packet */ if (info->indexed) { - radeon_emit(cs, PKT3(PKT3_INDEX_TYPE, 0, 0)); + if (ib->index_size != sctx->last_index_size) { + radeon_emit(cs, PKT3(PKT3_INDEX_TYPE, 0, 0)); - /* index type */ - switch (ib->index_size) { - case 1: - radeon_emit(cs, V_028A7C_VGT_INDEX_8); - break; - case 2: - radeon_emit(cs, V_028A7C_VGT_INDEX_16 | - (SI_BIG_ENDIAN && sctx->b.chip_class <= CIK ? - V_028A7C_VGT_DMA_SWAP_16_BIT : 0)); - break; - case 4: - radeon_emit(cs, V_028A7C_VGT_INDEX_32 | - (SI_BIG_ENDIAN && sctx->b.chip_class <= CIK ? - V_028A7C_VGT_DMA_SWAP_32_BIT : 0)); - break; - default: - assert(!"unreachable"); - return; + /* index type */ + switch (ib->index_size) { + case 1: + radeon_emit(cs, V_028A7C_VGT_INDEX_8); + break; + case 2: + radeon_emit(cs, V_028A7C_VGT_INDEX_16 | + (SI_BIG_ENDIAN && sctx->b.chip_class <= CIK ? + V_028A7C_VGT_DMA_SWAP_16_BIT : 0)); + break; + case 4: + radeon_emit(cs, V_028A7C_VGT_INDEX_32 | + (SI_BIG_ENDIAN && sctx->b.chip_class <= CIK ? + V_028A7C_VGT_DMA_SWAP_32_BIT : 0)); + break; + default: + assert(!"unreachable"); + return; + } + + sctx->last_index_size = ib->index_size; } + + index_max_size = (ib->buffer->width0 - ib->offset) / + ib->index_size; + index_va = r600_resource(ib->buffer)->gpu_address + ib->offset; + + radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, + (struct r600_resource *)ib->buffer, + RADEON_USAGE_READ, RADEON_PRIO_INDEX_BUFFER); + } else { + /* On CI and later, non-indexed draws overwrite VGT_INDEX_TYPE, + * so the state must be re-emitted before the next indexed draw. + */ + if (sctx->b.chip_class >= CIK) + sctx->last_index_size = -1; } if (!info->indirect) { @@ -572,70 +633,89 @@ if (base_vertex != sctx->last_base_vertex || sctx->last_base_vertex == SI_BASE_VERTEX_UNKNOWN || info->start_instance != sctx->last_start_instance || + info->drawid != sctx->last_drawid || sh_base_reg != sctx->last_sh_base_reg) { - radeon_set_sh_reg_seq(cs, sh_base_reg + SI_SGPR_BASE_VERTEX * 4, 2); + radeon_set_sh_reg_seq(cs, sh_base_reg + SI_SGPR_BASE_VERTEX * 4, 3); radeon_emit(cs, base_vertex); radeon_emit(cs, info->start_instance); + radeon_emit(cs, info->drawid); sctx->last_base_vertex = base_vertex; sctx->last_start_instance = info->start_instance; + sctx->last_drawid = info->drawid; sctx->last_sh_base_reg = sh_base_reg; } } else { + uint64_t indirect_va = r600_resource(info->indirect)->gpu_address; + + assert(indirect_va % 8 == 0); + si_invalidate_draw_sh_constants(sctx); + radeon_emit(cs, PKT3(PKT3_SET_BASE, 2, 0)); + radeon_emit(cs, 1); + radeon_emit(cs, indirect_va); + radeon_emit(cs, indirect_va >> 32); + radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, (struct r600_resource *)info->indirect, RADEON_USAGE_READ, RADEON_PRIO_DRAW_INDIRECT); } - if (info->indexed) { - uint32_t index_max_size = (ib->buffer->width0 - ib->offset) / - ib->index_size; - uint64_t index_va = r600_resource(ib->buffer)->gpu_address + ib->offset; - - radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, - (struct r600_resource *)ib->buffer, - RADEON_USAGE_READ, RADEON_PRIO_INDEX_BUFFER); - - if (info->indirect) { - uint64_t indirect_va = r600_resource(info->indirect)->gpu_address; + if (info->indirect) { + unsigned di_src_sel = info->indexed ? V_0287F0_DI_SRC_SEL_DMA + : V_0287F0_DI_SRC_SEL_AUTO_INDEX; - assert(indirect_va % 8 == 0); - assert(index_va % 2 == 0); - assert(info->indirect_offset % 4 == 0); - - radeon_emit(cs, PKT3(PKT3_SET_BASE, 2, 0)); - radeon_emit(cs, 1); - radeon_emit(cs, indirect_va); - radeon_emit(cs, indirect_va >> 32); + assert(info->indirect_offset % 4 == 0); + if (info->indexed) { radeon_emit(cs, PKT3(PKT3_INDEX_BASE, 1, 0)); radeon_emit(cs, index_va); radeon_emit(cs, index_va >> 32); radeon_emit(cs, PKT3(PKT3_INDEX_BUFFER_SIZE, 0, 0)); radeon_emit(cs, index_max_size); + } - if (sctx->b.family < CHIP_POLARIS10) { - radeon_emit(cs, PKT3(PKT3_DRAW_INDEX_INDIRECT, 3, render_cond_bit)); - radeon_emit(cs, info->indirect_offset); - radeon_emit(cs, (sh_base_reg + SI_SGPR_BASE_VERTEX * 4 - SI_SH_REG_OFFSET) >> 2); - radeon_emit(cs, (sh_base_reg + SI_SGPR_START_INSTANCE * 4 - SI_SH_REG_OFFSET) >> 2); - radeon_emit(cs, V_0287F0_DI_SRC_SEL_DMA); - } else { - radeon_emit(cs, PKT3(PKT3_DRAW_INDEX_INDIRECT_MULTI, 8, render_cond_bit)); - radeon_emit(cs, info->indirect_offset); - radeon_emit(cs, (sh_base_reg + SI_SGPR_BASE_VERTEX * 4 - SI_SH_REG_OFFSET) >> 2); - radeon_emit(cs, (sh_base_reg + SI_SGPR_START_INSTANCE * 4 - SI_SH_REG_OFFSET) >> 2); - radeon_emit(cs, 0); /* draw_index */ - radeon_emit(cs, 1); /* count */ - radeon_emit(cs, 0); /* count_addr -- disabled */ - radeon_emit(cs, 0); - radeon_emit(cs, 16); /* stride */ - radeon_emit(cs, V_0287F0_DI_SRC_SEL_DMA); - } + if (!sctx->screen->has_draw_indirect_multi) { + radeon_emit(cs, PKT3(info->indexed ? PKT3_DRAW_INDEX_INDIRECT + : PKT3_DRAW_INDIRECT, + 3, render_cond_bit)); + radeon_emit(cs, info->indirect_offset); + radeon_emit(cs, (sh_base_reg + SI_SGPR_BASE_VERTEX * 4 - SI_SH_REG_OFFSET) >> 2); + radeon_emit(cs, (sh_base_reg + SI_SGPR_START_INSTANCE * 4 - SI_SH_REG_OFFSET) >> 2); + radeon_emit(cs, di_src_sel); } else { + uint64_t count_va = 0; + + if (info->indirect_params) { + struct r600_resource *params_buf = + (struct r600_resource *)info->indirect_params; + + radeon_add_to_buffer_list( + &sctx->b, &sctx->b.gfx, params_buf, + RADEON_USAGE_READ, RADEON_PRIO_DRAW_INDIRECT); + + count_va = params_buf->gpu_address + info->indirect_params_offset; + } + + radeon_emit(cs, PKT3(info->indexed ? PKT3_DRAW_INDEX_INDIRECT_MULTI : + PKT3_DRAW_INDIRECT_MULTI, + 8, render_cond_bit)); + radeon_emit(cs, info->indirect_offset); + radeon_emit(cs, (sh_base_reg + SI_SGPR_BASE_VERTEX * 4 - SI_SH_REG_OFFSET) >> 2); + radeon_emit(cs, (sh_base_reg + SI_SGPR_START_INSTANCE * 4 - SI_SH_REG_OFFSET) >> 2); + radeon_emit(cs, ((sh_base_reg + SI_SGPR_DRAWID * 4 - SI_SH_REG_OFFSET) >> 2) | + S_2C3_DRAW_INDEX_ENABLE(1) | + S_2C3_COUNT_INDIRECT_ENABLE(!!info->indirect_params)); + radeon_emit(cs, info->indirect_count); + radeon_emit(cs, count_va); + radeon_emit(cs, count_va >> 32); + radeon_emit(cs, info->indirect_stride); + radeon_emit(cs, di_src_sel); + } + } else { + if (info->indexed) { index_va += info->start * ib->index_size; radeon_emit(cs, PKT3(PKT3_DRAW_INDEX_2, 4, render_cond_bit)); @@ -644,52 +724,37 @@ radeon_emit(cs, (index_va >> 32UL) & 0xFF); radeon_emit(cs, info->count); radeon_emit(cs, V_0287F0_DI_SRC_SEL_DMA); - } - } else { - if (info->indirect) { - uint64_t indirect_va = r600_resource(info->indirect)->gpu_address; - - assert(indirect_va % 8 == 0); - assert(info->indirect_offset % 4 == 0); - - radeon_emit(cs, PKT3(PKT3_SET_BASE, 2, 0)); - radeon_emit(cs, 1); - radeon_emit(cs, indirect_va); - radeon_emit(cs, indirect_va >> 32); - - if (sctx->b.family < CHIP_POLARIS10) { - radeon_emit(cs, PKT3(PKT3_DRAW_INDIRECT, 3, render_cond_bit)); - radeon_emit(cs, info->indirect_offset); - radeon_emit(cs, (sh_base_reg + SI_SGPR_BASE_VERTEX * 4 - SI_SH_REG_OFFSET) >> 2); - radeon_emit(cs, (sh_base_reg + SI_SGPR_START_INSTANCE * 4 - SI_SH_REG_OFFSET) >> 2); - radeon_emit(cs, V_0287F0_DI_SRC_SEL_AUTO_INDEX); - } else { - radeon_emit(cs, PKT3(PKT3_DRAW_INDIRECT_MULTI, 8, render_cond_bit)); - radeon_emit(cs, info->indirect_offset); - radeon_emit(cs, (sh_base_reg + SI_SGPR_BASE_VERTEX * 4 - SI_SH_REG_OFFSET) >> 2); - radeon_emit(cs, (sh_base_reg + SI_SGPR_START_INSTANCE * 4 - SI_SH_REG_OFFSET) >> 2); - radeon_emit(cs, 0); /* draw_index */ - radeon_emit(cs, 1); /* count */ - radeon_emit(cs, 0); /* count_addr -- disabled */ - radeon_emit(cs, 0); - radeon_emit(cs, 16); /* stride */ - radeon_emit(cs, V_0287F0_DI_SRC_SEL_AUTO_INDEX); - } } else { radeon_emit(cs, PKT3(PKT3_DRAW_INDEX_AUTO, 1, render_cond_bit)); radeon_emit(cs, info->count); radeon_emit(cs, V_0287F0_DI_SRC_SEL_AUTO_INDEX | - S_0287F0_USE_OPAQUE(!!info->count_from_stream_output)); + S_0287F0_USE_OPAQUE(!!info->count_from_stream_output)); } } } -void si_emit_cache_flush(struct si_context *si_ctx, struct r600_atom *atom) +static void si_emit_surface_sync(struct r600_common_context *rctx, + unsigned cp_coher_cntl) { - struct r600_common_context *sctx = &si_ctx->b; - struct radeon_winsys_cs *cs = sctx->gfx.cs; + struct radeon_winsys_cs *cs = rctx->gfx.cs; + + /* ACQUIRE_MEM is only required on a compute ring. */ + radeon_emit(cs, PKT3(PKT3_SURFACE_SYNC, 3, 0)); + radeon_emit(cs, cp_coher_cntl); /* CP_COHER_CNTL */ + radeon_emit(cs, 0xffffffff); /* CP_COHER_SIZE */ + radeon_emit(cs, 0); /* CP_COHER_BASE */ + radeon_emit(cs, 0x0000000A); /* POLL_INTERVAL */ +} + +void si_emit_cache_flush(struct si_context *sctx) +{ + struct r600_common_context *rctx = &sctx->b; + struct radeon_winsys_cs *cs = rctx->gfx.cs; uint32_t cp_coher_cntl = 0; + if (rctx->flags & SI_CONTEXT_FLUSH_AND_INV_FRAMEBUFFER) + sctx->b.num_fb_cache_flushes++; + /* SI has a bug that it always flushes ICACHE and KCACHE if either * bit is set. An alternative way is to write SQC_CACHES, but that * doesn't seem to work reliably. Since the bug doesn't affect @@ -698,21 +763,12 @@ * to add a workaround for it. */ - if (sctx->flags & SI_CONTEXT_INV_ICACHE) + if (rctx->flags & SI_CONTEXT_INV_ICACHE) cp_coher_cntl |= S_0085F0_SH_ICACHE_ACTION_ENA(1); - if (sctx->flags & SI_CONTEXT_INV_SMEM_L1) + if (rctx->flags & SI_CONTEXT_INV_SMEM_L1) cp_coher_cntl |= S_0085F0_SH_KCACHE_ACTION_ENA(1); - if (sctx->flags & SI_CONTEXT_INV_VMEM_L1) - cp_coher_cntl |= S_0085F0_TCL1_ACTION_ENA(1); - if (sctx->flags & SI_CONTEXT_INV_GLOBAL_L2) { - cp_coher_cntl |= S_0085F0_TC_ACTION_ENA(1); - - if (sctx->chip_class >= VI) - cp_coher_cntl |= S_0301F0_TC_WB_ACTION_ENA(1); - } - - if (sctx->flags & SI_CONTEXT_FLUSH_AND_INV_CB) { + if (rctx->flags & SI_CONTEXT_FLUSH_AND_INV_CB) { cp_coher_cntl |= S_0085F0_CB_ACTION_ENA(1) | S_0085F0_CB0_DEST_BASE_ENA(1) | S_0085F0_CB1_DEST_BASE_ENA(1) | @@ -724,59 +780,63 @@ S_0085F0_CB7_DEST_BASE_ENA(1); /* Necessary for DCC */ - if (sctx->chip_class >= VI) { - radeon_emit(cs, PKT3(PKT3_EVENT_WRITE_EOP, 4, 0)); - radeon_emit(cs, EVENT_TYPE(V_028A90_FLUSH_AND_INV_CB_DATA_TS) | - EVENT_INDEX(5)); - radeon_emit(cs, 0); - radeon_emit(cs, 0); - radeon_emit(cs, 0); - radeon_emit(cs, 0); - } + if (rctx->chip_class == VI) + r600_gfx_write_event_eop(rctx, V_028A90_FLUSH_AND_INV_CB_DATA_TS, + 0, 0, NULL, 0, 0, 0); } - if (sctx->flags & SI_CONTEXT_FLUSH_AND_INV_DB) { + if (rctx->flags & SI_CONTEXT_FLUSH_AND_INV_DB) { cp_coher_cntl |= S_0085F0_DB_ACTION_ENA(1) | S_0085F0_DB_DEST_BASE_ENA(1); } - if (sctx->flags & SI_CONTEXT_FLUSH_AND_INV_CB_META) { + if (rctx->flags & SI_CONTEXT_FLUSH_AND_INV_CB_META) { radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); radeon_emit(cs, EVENT_TYPE(V_028A90_FLUSH_AND_INV_CB_META) | EVENT_INDEX(0)); /* needed for wait for idle in SURFACE_SYNC */ - assert(sctx->flags & SI_CONTEXT_FLUSH_AND_INV_CB); + assert(rctx->flags & SI_CONTEXT_FLUSH_AND_INV_CB); } - if (sctx->flags & SI_CONTEXT_FLUSH_AND_INV_DB_META) { + if (rctx->flags & SI_CONTEXT_FLUSH_AND_INV_DB_META) { radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); radeon_emit(cs, EVENT_TYPE(V_028A90_FLUSH_AND_INV_DB_META) | EVENT_INDEX(0)); /* needed for wait for idle in SURFACE_SYNC */ - assert(sctx->flags & SI_CONTEXT_FLUSH_AND_INV_DB); + assert(rctx->flags & SI_CONTEXT_FLUSH_AND_INV_DB); } /* Wait for shader engines to go idle. * VS and PS waits are unnecessary if SURFACE_SYNC is going to wait * for everything including CB/DB cache flushes. */ - if (!(sctx->flags & (SI_CONTEXT_FLUSH_AND_INV_CB | + if (!(rctx->flags & (SI_CONTEXT_FLUSH_AND_INV_CB | SI_CONTEXT_FLUSH_AND_INV_DB))) { - if (sctx->flags & SI_CONTEXT_PS_PARTIAL_FLUSH) { + if (rctx->flags & SI_CONTEXT_PS_PARTIAL_FLUSH) { radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); radeon_emit(cs, EVENT_TYPE(V_028A90_PS_PARTIAL_FLUSH) | EVENT_INDEX(4)); - } else if (sctx->flags & SI_CONTEXT_VS_PARTIAL_FLUSH) { + /* Only count explicit shader flushes, not implicit ones + * done by SURFACE_SYNC. + */ + rctx->num_vs_flushes++; + rctx->num_ps_flushes++; + } else if (rctx->flags & SI_CONTEXT_VS_PARTIAL_FLUSH) { radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); radeon_emit(cs, EVENT_TYPE(V_028A90_VS_PARTIAL_FLUSH) | EVENT_INDEX(4)); + rctx->num_vs_flushes++; } } - if (sctx->flags & SI_CONTEXT_CS_PARTIAL_FLUSH) { + + if (rctx->flags & SI_CONTEXT_CS_PARTIAL_FLUSH && + sctx->compute_is_busy) { radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); radeon_emit(cs, EVENT_TYPE(V_028A90_CS_PARTIAL_FLUSH | EVENT_INDEX(4))); + rctx->num_cs_flushes++; + sctx->compute_is_busy = false; } /* VGT state synchronization. */ - if (sctx->flags & SI_CONTEXT_VGT_FLUSH) { + if (rctx->flags & SI_CONTEXT_VGT_FLUSH) { radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); radeon_emit(cs, EVENT_TYPE(V_028A90_VGT_FLUSH) | EVENT_INDEX(0)); } - if (sctx->flags & SI_CONTEXT_VGT_STREAMOUT_SYNC) { + if (rctx->flags & SI_CONTEXT_VGT_STREAMOUT_SYNC) { radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); radeon_emit(cs, EVENT_TYPE(V_028A90_VGT_STREAMOUT_SYNC) | EVENT_INDEX(0)); } @@ -784,34 +844,76 @@ /* Make sure ME is idle (it executes most packets) before continuing. * This prevents read-after-write hazards between PFP and ME. */ - if (cp_coher_cntl || (sctx->flags & SI_CONTEXT_CS_PARTIAL_FLUSH)) { + if (cp_coher_cntl || + (rctx->flags & (SI_CONTEXT_CS_PARTIAL_FLUSH | + SI_CONTEXT_INV_VMEM_L1 | + SI_CONTEXT_INV_GLOBAL_L2 | + SI_CONTEXT_WRITEBACK_GLOBAL_L2))) { radeon_emit(cs, PKT3(PKT3_PFP_SYNC_ME, 0, 0)); radeon_emit(cs, 0); } - /* When one of the DEST_BASE flags is set, SURFACE_SYNC waits for idle. - * Therefore, it should be last. Done in PFP. + /* When one of the CP_COHER_CNTL.DEST_BASE flags is set, SURFACE_SYNC + * waits for idle. Therefore, it should be last. SURFACE_SYNC is done + * in PFP. + * + * cp_coher_cntl should contain all necessary flags except TC flags + * at this point. + * + * SI-CIK don't support L2 write-back. */ - if (cp_coher_cntl) { - /* ACQUIRE_MEM is only required on a compute ring. */ - radeon_emit(cs, PKT3(PKT3_SURFACE_SYNC, 3, 0)); - radeon_emit(cs, cp_coher_cntl); /* CP_COHER_CNTL */ - radeon_emit(cs, 0xffffffff); /* CP_COHER_SIZE */ - radeon_emit(cs, 0); /* CP_COHER_BASE */ - radeon_emit(cs, 0x0000000A); /* POLL_INTERVAL */ + if (rctx->flags & SI_CONTEXT_INV_GLOBAL_L2 || + (rctx->chip_class <= CIK && + (rctx->flags & SI_CONTEXT_WRITEBACK_GLOBAL_L2))) { + /* Invalidate L1 & L2. (L1 is always invalidated on SI) + * WB must be set on VI+ when TC_ACTION is set. + */ + si_emit_surface_sync(rctx, cp_coher_cntl | + S_0085F0_TC_ACTION_ENA(1) | + S_0085F0_TCL1_ACTION_ENA(1) | + S_0301F0_TC_WB_ACTION_ENA(rctx->chip_class >= VI)); + cp_coher_cntl = 0; + sctx->b.num_L2_invalidates++; + } else { + /* L1 invalidation and L2 writeback must be done separately, + * because both operations can't be done together. + */ + if (rctx->flags & SI_CONTEXT_WRITEBACK_GLOBAL_L2) { + /* WB = write-back + * NC = apply to non-coherent MTYPEs + * (i.e. MTYPE <= 1, which is what we use everywhere) + * + * WB doesn't work without NC. + */ + si_emit_surface_sync(rctx, cp_coher_cntl | + S_0301F0_TC_WB_ACTION_ENA(1) | + S_0301F0_TC_NC_ACTION_ENA(1)); + cp_coher_cntl = 0; + sctx->b.num_L2_writebacks++; + } + if (rctx->flags & SI_CONTEXT_INV_VMEM_L1) { + /* Invalidate per-CU VMEM L1. */ + si_emit_surface_sync(rctx, cp_coher_cntl | + S_0085F0_TCL1_ACTION_ENA(1)); + cp_coher_cntl = 0; + } } - if (sctx->flags & R600_CONTEXT_START_PIPELINE_STATS) { + /* If TC flushes haven't cleared this... */ + if (cp_coher_cntl) + si_emit_surface_sync(rctx, cp_coher_cntl); + + if (rctx->flags & R600_CONTEXT_START_PIPELINE_STATS) { radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); radeon_emit(cs, EVENT_TYPE(V_028A90_PIPELINESTAT_START) | EVENT_INDEX(0)); - } else if (sctx->flags & R600_CONTEXT_STOP_PIPELINE_STATS) { + } else if (rctx->flags & R600_CONTEXT_STOP_PIPELINE_STATS) { radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); radeon_emit(cs, EVENT_TYPE(V_028A90_PIPELINESTAT_STOP) | EVENT_INDEX(0)); } - sctx->flags = 0; + rctx->flags = 0; } static void si_get_draw_start_count(struct si_context *sctx, @@ -819,13 +921,59 @@ unsigned *start, unsigned *count) { if (info->indirect) { - struct r600_resource *indirect = - (struct r600_resource*)info->indirect; - int *data = r600_buffer_map_sync_with_rings(&sctx->b, - indirect, PIPE_TRANSFER_READ); - data += info->indirect_offset/sizeof(int); - *start = data[2]; - *count = data[0]; + unsigned indirect_count; + struct pipe_transfer *transfer; + unsigned begin, end; + unsigned map_size; + unsigned *data; + + if (info->indirect_params) { + data = pipe_buffer_map_range(&sctx->b.b, + info->indirect_params, + info->indirect_params_offset, + sizeof(unsigned), + PIPE_TRANSFER_READ, &transfer); + + indirect_count = *data; + + pipe_buffer_unmap(&sctx->b.b, transfer); + } else { + indirect_count = info->indirect_count; + } + + if (!indirect_count) { + *start = *count = 0; + return; + } + + map_size = (indirect_count - 1) * info->indirect_stride + 3 * sizeof(unsigned); + data = pipe_buffer_map_range(&sctx->b.b, info->indirect, + info->indirect_offset, map_size, + PIPE_TRANSFER_READ, &transfer); + + begin = UINT_MAX; + end = 0; + + for (unsigned i = 0; i < indirect_count; ++i) { + unsigned count = data[0]; + unsigned start = data[2]; + + if (count > 0) { + begin = MIN2(begin, start); + end = MAX2(end, start + count); + } + + data += info->indirect_stride / sizeof(unsigned); + } + + pipe_buffer_unmap(&sctx->b.b, transfer); + + if (begin < end) { + *start = begin; + *count = end - begin; + } else { + *start = *count = 0; + } } else { *start = info->start; *count = info->count; @@ -853,33 +1001,54 @@ } } +static void cik_prefetch_shader_async(struct si_context *sctx, + struct si_pm4_state *state) +{ + if (state) { + struct pipe_resource *bo = &state->bo[0]->b.b; + assert(state->nbo == 1); + + cik_prefetch_TC_L2_async(sctx, bo, 0, bo->width0); + } +} + void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info) { struct si_context *sctx = (struct si_context *)ctx; struct si_state_rasterizer *rs = sctx->queued.named.rasterizer; struct pipe_index_buffer ib = {}; - unsigned mask, dirty_fb_counter; + unsigned mask, dirty_fb_counter, dirty_tex_counter, rast_prim; - if (!info->count && !info->indirect && - (info->indexed || !info->count_from_stream_output)) - return; + if (likely(!info->indirect)) { + /* SI-CI treat instance_count==0 as instance_count==1. There is + * no workaround for indirect draws, but we can at least skip + * direct draws. + */ + if (unlikely(!info->instance_count)) + return; - if (!sctx->vs_shader.cso) { + /* Handle count == 0. */ + if (unlikely(!info->count && + (info->indexed || !info->count_from_stream_output))) + return; + } + + if (unlikely(!sctx->vs_shader.cso)) { assert(0); return; } - if (!sctx->ps_shader.cso && (!rs || !rs->rasterizer_discard)) { + if (unlikely(!sctx->ps_shader.cso && (!rs || !rs->rasterizer_discard))) { assert(0); return; } - if (!!sctx->tes_shader.cso != (info->mode == PIPE_PRIM_PATCHES)) { + if (unlikely(!!sctx->tes_shader.cso != (info->mode == PIPE_PRIM_PATCHES))) { assert(0); return; } /* Re-emit the framebuffer state if needed. */ dirty_fb_counter = p_atomic_read(&sctx->b.screen->dirty_fb_counter); - if (dirty_fb_counter != sctx->b.last_dirty_fb_counter) { + if (unlikely(dirty_fb_counter != sctx->b.last_dirty_fb_counter)) { sctx->b.last_dirty_fb_counter = dirty_fb_counter; sctx->framebuffer.dirty_cbufs |= ((1 << sctx->framebuffer.state.nr_cbufs) - 1); @@ -887,6 +1056,13 @@ si_mark_atom_dirty(sctx, &sctx->framebuffer.atom); } + /* Invalidate & recompute texture descriptors if needed. */ + dirty_tex_counter = p_atomic_read(&sctx->b.screen->dirty_tex_descriptor_counter); + if (unlikely(dirty_tex_counter != sctx->b.last_dirty_tex_descriptor_counter)) { + sctx->b.last_dirty_tex_descriptor_counter = dirty_tex_counter; + si_update_all_texture_descriptors(sctx); + } + si_decompress_graphics_textures(sctx); /* Set the rasterization primitive type. @@ -895,15 +1071,39 @@ * draw_vbo recursively, and before si_update_shaders, which uses * current_rast_prim for this draw_vbo call. */ if (sctx->gs_shader.cso) - sctx->current_rast_prim = sctx->gs_shader.cso->gs_output_prim; + rast_prim = sctx->gs_shader.cso->gs_output_prim; else if (sctx->tes_shader.cso) - sctx->current_rast_prim = - sctx->tes_shader.cso->info.properties[TGSI_PROPERTY_TES_PRIM_MODE]; + rast_prim = sctx->tes_shader.cso->info.properties[TGSI_PROPERTY_TES_PRIM_MODE]; else - sctx->current_rast_prim = info->mode; + rast_prim = info->mode; + + if (rast_prim != sctx->current_rast_prim) { + sctx->current_rast_prim = rast_prim; + sctx->do_update_shaders = true; + } + + if (sctx->gs_shader.cso) { + /* Determine whether the GS triangle strip adjacency fix should + * be applied. Rotate every other triangle if + * - triangle strips with adjacency are fed to the GS and + * - primitive restart is disabled (the rotation doesn't help + * when the restart occurs after an odd number of triangles). + */ + bool gs_tri_strip_adj_fix = + !sctx->tes_shader.cso && + info->mode == PIPE_PRIM_TRIANGLE_STRIP_ADJACENCY && + !info->primitive_restart; + + if (gs_tri_strip_adj_fix != sctx->gs_tri_strip_adj_fix) { + sctx->gs_tri_strip_adj_fix = gs_tri_strip_adj_fix; + sctx->do_update_shaders = true; + } + } - if (!si_update_shaders(sctx) || - !si_upload_graphics_shader_descriptors(sctx)) + if (sctx->do_update_shaders && !si_update_shaders(sctx)) + return; + + if (!si_upload_graphics_shader_descriptors(sctx)) return; if (info->indexed) { @@ -921,7 +1121,7 @@ void *ptr; si_get_draw_start_count(sctx, info, &start, &count); - start_offset = start * ib.index_size; + start_offset = start * 2; u_upload_alloc(sctx->b.uploader, start_offset, count * 2, 256, &out_offset, &out_buffer, &ptr); @@ -930,8 +1130,8 @@ return; } - util_shorten_ubyte_elts_to_userptr(&sctx->b.b, &ib, 0, - ib.offset + start_offset, + util_shorten_ubyte_elts_to_userptr(&sctx->b.b, &ib, 0, 0, + ib.offset + start, count, ptr); pipe_resource_reference(&ib.buffer, NULL); @@ -959,21 +1159,64 @@ /* VI reads index buffers through TC L2. */ if (info->indexed && sctx->b.chip_class <= CIK && r600_resource(ib.buffer)->TC_L2_dirty) { - sctx->b.flags |= SI_CONTEXT_INV_GLOBAL_L2; + sctx->b.flags |= SI_CONTEXT_WRITEBACK_GLOBAL_L2; r600_resource(ib.buffer)->TC_L2_dirty = false; } if (info->indirect && r600_resource(info->indirect)->TC_L2_dirty) { - sctx->b.flags |= SI_CONTEXT_INV_GLOBAL_L2; + sctx->b.flags |= SI_CONTEXT_WRITEBACK_GLOBAL_L2; r600_resource(info->indirect)->TC_L2_dirty = false; } - /* Check flush flags. */ - if (sctx->b.flags) - si_mark_atom_dirty(sctx, sctx->atoms.s.cache_flush); + if (info->indirect_params && + r600_resource(info->indirect_params)->TC_L2_dirty) { + sctx->b.flags |= SI_CONTEXT_WRITEBACK_GLOBAL_L2; + r600_resource(info->indirect_params)->TC_L2_dirty = false; + } + + /* Add buffer sizes for memory checking in need_cs_space. */ + if (sctx->emit_scratch_reloc && sctx->scratch_buffer) + r600_context_add_resource_size(ctx, &sctx->scratch_buffer->b.b); + if (info->indirect) + r600_context_add_resource_size(ctx, info->indirect); si_need_cs_space(sctx); + /* Since we've called r600_context_add_resource_size for vertex buffers, + * this must be called after si_need_cs_space, because we must let + * need_cs_space flush before we add buffers to the buffer list. + */ + if (!si_upload_vertex_buffer_descriptors(sctx)) + return; + + /* Flushed caches prior to prefetching shaders. */ + if (sctx->b.flags) + si_emit_cache_flush(sctx); + + /* Prefetch shaders and VBO descriptors to TC L2. */ + if (sctx->b.chip_class >= CIK) { + if (si_pm4_state_changed(sctx, ls)) + cik_prefetch_shader_async(sctx, sctx->queued.named.ls); + if (si_pm4_state_changed(sctx, hs)) + cik_prefetch_shader_async(sctx, sctx->queued.named.hs); + if (si_pm4_state_changed(sctx, es)) + cik_prefetch_shader_async(sctx, sctx->queued.named.es); + if (si_pm4_state_changed(sctx, gs)) + cik_prefetch_shader_async(sctx, sctx->queued.named.gs); + if (si_pm4_state_changed(sctx, vs)) + cik_prefetch_shader_async(sctx, sctx->queued.named.vs); + + /* Vertex buffer descriptors are uploaded uncached, so prefetch + * them right after the VS binary. */ + if (sctx->vertex_buffer_pointer_dirty) { + cik_prefetch_TC_L2_async(sctx, &sctx->vertex_buffers.buffer->b.b, + sctx->vertex_buffers.buffer_offset, + sctx->vertex_elements->count * 16); + } + if (si_pm4_state_changed(sctx, ps)) + cik_prefetch_shader_async(sctx, sctx->queued.named.ps); + } + /* Emit states. */ mask = sctx->dirty_atoms; while (mask) { @@ -1011,7 +1254,8 @@ struct pipe_surface *surf = sctx->framebuffer.state.zsbuf; struct r600_texture *rtex = (struct r600_texture *)surf->texture; - rtex->dirty_level_mask |= 1 << surf->u.tex.level; + if (!rtex->tc_compatible_htile) + rtex->dirty_level_mask |= 1 << surf->u.tex.level; if (rtex->surface.flags & RADEON_SURF_SBUFFER) rtex->stencil_dirty_level_mask |= 1 << surf->u.tex.level; @@ -1026,12 +1270,17 @@ surf = sctx->framebuffer.state.cbufs[i]; rtex = (struct r600_texture*)surf->texture; - rtex->dirty_level_mask |= 1 << surf->u.tex.level; + if (rtex->fmask.size) + rtex->dirty_level_mask |= 1 << surf->u.tex.level; + if (rtex->dcc_gather_statistics) + rtex->separate_dcc_dirty = true; } while (mask); } pipe_resource_reference(&ib.buffer, NULL); sctx->b.num_draw_calls++; + if (G_0286E8_WAVESIZE(sctx->spi_tmpring_size)) + sctx->b.num_spill_draw_calls++; } void si_trace_emit(struct si_context *sctx) @@ -1049,5 +1298,5 @@ radeon_emit(cs, sctx->trace_buf->gpu_address >> 32); radeon_emit(cs, sctx->trace_id); radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); - radeon_emit(cs, SI_ENCODE_TRACE_POINT(sctx->trace_id)); + radeon_emit(cs, AC_ENCODE_TRACE_POINT(sctx->trace_id)); } diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/si_state.h mesa-17.0.7/src/gallium/drivers/radeonsi/si_state.h --- mesa-12.0.6/src/gallium/drivers/radeonsi/si_state.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/si_state.h 2017-06-01 10:37:10.000000000 +0000 @@ -40,8 +40,6 @@ #define SI_NUM_IMAGES 16 #define SI_NUM_SHADER_BUFFERS 16 -#define SI_TESS_OFFCHIP_BLOCK_SIZE (8192 * 4) - struct si_screen; struct si_shader; @@ -101,6 +99,14 @@ struct si_vertex_element { unsigned count; + unsigned first_vb_use_mask; + + /* Two bits per attribute indicating the size of each vector component + * in bytes if the size 3-workaround must be applied. + */ + uint32_t fix_size3; + uint64_t fix_fetch; + uint32_t rsrc_word3[SI_MAX_ATTRIBS]; uint32_t format_size[SI_MAX_ATTRIBS]; struct pipe_vertex_element elements[SI_MAX_ATTRIBS]; @@ -126,7 +132,6 @@ union si_state_atoms { struct { /* The order matters. */ - struct r600_atom *cache_flush; struct r600_atom *render_cond; struct r600_atom *streamout_begin; struct r600_atom *streamout_enable; /* must be after streamout_begin */ @@ -163,11 +168,7 @@ SI_ES_RING_ESGS, SI_GS_RING_ESGS, - SI_GS_RING_GSVS0, - SI_GS_RING_GSVS1, - SI_GS_RING_GSVS2, - SI_GS_RING_GSVS3, - SI_VS_RING_GSVS, + SI_RING_GSVS, SI_VS_STREAMOUT_BUF0, SI_VS_STREAMOUT_BUF1, @@ -182,12 +183,39 @@ SI_NUM_RW_BUFFERS, }; +/* Indices into sctx->descriptors, laid out so that gfx and compute pipelines + * are contiguous: + * + * 0 - rw buffers + * 1 - vertex const buffers + * 2 - vertex shader buffers + * ... + * 5 - fragment const buffers + * ... + * 21 - compute const buffers + * ... + */ +#define SI_SHADER_DESCS_CONST_BUFFERS 0 +#define SI_SHADER_DESCS_SHADER_BUFFERS 1 +#define SI_SHADER_DESCS_SAMPLERS 2 +#define SI_SHADER_DESCS_IMAGES 3 +#define SI_NUM_SHADER_DESCS 4 + +#define SI_DESCS_RW_BUFFERS 0 +#define SI_DESCS_FIRST_SHADER 1 +#define SI_DESCS_FIRST_COMPUTE (SI_DESCS_FIRST_SHADER + \ + PIPE_SHADER_COMPUTE * SI_NUM_SHADER_DESCS) +#define SI_NUM_DESCS (SI_DESCS_FIRST_SHADER + \ + SI_NUM_SHADERS * SI_NUM_SHADER_DESCS) + /* This represents descriptors in memory, such as buffer resources, * image resources, and sampler states. */ struct si_descriptors { /* The list of descriptors in malloc'd memory. */ uint32_t *list; + /* The list in mapped GPU memory. */ + uint32_t *gpu_list; /* The size of one descriptor. */ unsigned element_dw_size; /* The maximum number of descriptors. */ @@ -200,9 +228,6 @@ /* Offset in CE RAM */ unsigned ce_offset; - /* The i-th bit is set if that element is enabled (non-NULL resource). */ - unsigned enabled_mask; - /* elements of the list that are changed and need to be uploaded */ unsigned dirty_mask; @@ -213,21 +238,23 @@ /* The shader userdata offset within a shader where the 64-bit pointer to the descriptor * array will be stored. */ unsigned shader_userdata_offset; - /* Whether the pointer should be re-emitted. */ - bool pointer_dirty; }; struct si_sampler_views { - struct si_descriptors desc; struct pipe_sampler_view *views[SI_NUM_SAMPLERS]; - void *sampler_states[SI_NUM_SAMPLERS]; + struct si_sampler_state *sampler_states[SI_NUM_SAMPLERS]; + + /* The i-th bit is set if that element is enabled (non-NULL resource). */ + unsigned enabled_mask; }; struct si_buffer_resources { - struct si_descriptors desc; enum radeon_bo_usage shader_usage; /* READ, WRITE, or READWRITE */ enum radeon_bo_priority priority; struct pipe_resource **buffers; /* this has num_buffers elements */ + + /* The i-th bit is set if that element is enabled (non-NULL resource). */ + unsigned enabled_mask; }; #define si_pm4_block_idx(member) \ @@ -253,43 +280,49 @@ /* si_descriptors.c */ void si_ce_reinitialize_all_descriptors(struct si_context *sctx); void si_ce_enable_loads(struct radeon_winsys_cs *ib); +void si_set_mutable_tex_desc_fields(struct r600_texture *tex, + const struct radeon_surf_level *base_level_info, + unsigned base_level, unsigned first_level, + unsigned block_width, bool is_stencil, + uint32_t *state); +void si_get_pipe_constant_buffer(struct si_context *sctx, uint shader, + uint slot, struct pipe_constant_buffer *cbuf); +void si_get_shader_buffers(struct si_context *sctx, uint shader, + uint start_slot, uint count, + struct pipe_shader_buffer *sbuf); void si_set_ring_buffer(struct pipe_context *ctx, uint slot, struct pipe_resource *buffer, unsigned stride, unsigned num_records, bool add_tid, bool swizzle, unsigned element_size, unsigned index_stride, uint64_t offset); void si_init_all_descriptors(struct si_context *sctx); +bool si_upload_vertex_buffer_descriptors(struct si_context *sctx); bool si_upload_graphics_shader_descriptors(struct si_context *sctx); bool si_upload_compute_shader_descriptors(struct si_context *sctx); void si_release_all_descriptors(struct si_context *sctx); void si_all_descriptors_begin_new_cs(struct si_context *sctx); void si_upload_const_buffer(struct si_context *sctx, struct r600_resource **rbuffer, const uint8_t *ptr, unsigned size, uint32_t *const_offset); +void si_update_all_texture_descriptors(struct si_context *sctx); void si_shader_change_notify(struct si_context *sctx); void si_update_compressed_colortex_masks(struct si_context *sctx); void si_emit_graphics_shader_userdata(struct si_context *sctx, struct r600_atom *atom); void si_emit_compute_shader_userdata(struct si_context *sctx); void si_set_rw_buffer(struct si_context *sctx, - uint slot, struct pipe_constant_buffer *input); - + uint slot, const struct pipe_constant_buffer *input); /* si_state.c */ struct si_shader_selector; void si_init_atom(struct si_context *sctx, struct r600_atom *atom, struct r600_atom **list_elem, void (*emit_func)(struct si_context *ctx, struct r600_atom *state)); -boolean si_is_format_supported(struct pipe_screen *screen, - enum pipe_format format, - enum pipe_texture_target target, - unsigned sample_count, - unsigned usage); void si_init_state_functions(struct si_context *sctx); void si_init_screen_state_functions(struct si_screen *sscreen); void si_make_buffer_descriptor(struct si_screen *screen, struct r600_resource *buf, enum pipe_format format, - unsigned first_element, unsigned last_element, + unsigned offset, unsigned size, uint32_t *state); void si_make_texture_descriptor(struct si_screen *screen, @@ -298,7 +331,7 @@ enum pipe_texture_target target, enum pipe_format pipe_format, const unsigned char state_swizzle[4], - unsigned base_level, unsigned first_level, unsigned last_level, + unsigned first_level, unsigned last_level, unsigned first_layer, unsigned last_layer, unsigned width, unsigned height, unsigned depth, uint32_t *state, @@ -315,12 +348,23 @@ void si_init_shader_functions(struct si_context *sctx); bool si_init_shader_cache(struct si_screen *sscreen); void si_destroy_shader_cache(struct si_screen *sscreen); +void si_init_shader_selector_async(void *job, int thread_index); /* si_state_draw.c */ -void si_emit_cache_flush(struct si_context *sctx, struct r600_atom *atom); +void si_emit_cache_flush(struct si_context *sctx); void si_ce_pre_draw_synchronization(struct si_context *sctx); void si_ce_post_draw_synchronization(struct si_context *sctx); void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo); void si_trace_emit(struct si_context *sctx); + +static inline unsigned +si_tile_mode_index(struct r600_texture *rtex, unsigned level, bool stencil) +{ + if (stencil) + return rtex->surface.stencil_tiling_index[level]; + else + return rtex->surface.tiling_index[level]; +} + #endif diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/si_state_shaders.c mesa-17.0.7/src/gallium/drivers/radeonsi/si_state_shaders.c --- mesa-12.0.6/src/gallium/drivers/radeonsi/si_state_shaders.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/si_state_shaders.c 2017-06-01 10:37:10.000000000 +0000 @@ -26,17 +26,15 @@ */ #include "si_pipe.h" -#include "si_shader.h" #include "sid.h" #include "radeon/r600_cs.h" #include "tgsi/tgsi_parse.h" #include "tgsi/tgsi_ureg.h" #include "util/hash_table.h" -#include "util/u_hash.h" +#include "util/crc32.h" #include "util/u_memory.h" #include "util/u_prim.h" -#include "util/u_simple_shaders.h" /* SHADER_CACHE */ @@ -96,6 +94,8 @@ { *size = *ptr++; assert(*data == NULL); + if (!*size) + return ptr; *data = malloc(*size); return read_data(ptr, *data, *size); } @@ -110,6 +110,8 @@ unsigned relocs_size = shader->binary.reloc_count * sizeof(shader->binary.relocs[0]); unsigned disasm_size = strlen(shader->binary.disasm_string) + 1; + unsigned llvm_ir_size = shader->binary.llvm_ir_string ? + strlen(shader->binary.llvm_ir_string) + 1 : 0; unsigned size = 4 + /* total size */ 4 + /* CRC32 of the data below */ @@ -118,7 +120,8 @@ 4 + align(shader->binary.code_size, 4) + 4 + align(shader->binary.rodata_size, 4) + 4 + align(relocs_size, 4) + - 4 + align(disasm_size, 4); + 4 + align(disasm_size, 4) + + 4 + align(llvm_ir_size, 4); void *buffer = CALLOC(1, size); uint32_t *ptr = (uint32_t*)buffer; @@ -134,6 +137,7 @@ ptr = write_chunk(ptr, shader->binary.rodata, shader->binary.rodata_size); ptr = write_chunk(ptr, shader->binary.relocs, relocs_size); ptr = write_chunk(ptr, shader->binary.disasm_string, disasm_size); + ptr = write_chunk(ptr, shader->binary.llvm_ir_string, llvm_ir_size); assert((char *)ptr - (char *)buffer == size); /* Compute CRC32. */ @@ -165,6 +169,7 @@ ptr = read_chunk(ptr, (void**)&shader->binary.relocs, &chunk_size); shader->binary.reloc_count = chunk_size / sizeof(shader->binary.relocs[0]); ptr = read_chunk(ptr, (void**)&shader->binary.disasm_string, &chunk_size); + ptr = read_chunk(ptr, (void**)&shader->binary.llvm_ir_string, &chunk_size); return true; } @@ -179,8 +184,14 @@ void *tgsi_binary, struct si_shader *shader) { - void *hw_binary = si_get_shader_binary(shader); + void *hw_binary; + struct hash_entry *entry; + entry = _mesa_hash_table_search(sscreen->shader_cache, tgsi_binary); + if (entry) + return false; /* already added */ + + hw_binary = si_get_shader_binary(shader); if (!hw_binary) return false; @@ -202,7 +213,11 @@ if (!entry) return false; - return si_load_shader_binary(shader, entry->data); + if (!si_load_shader_binary(shader, entry->data)) + return false; + + p_atomic_inc(&sscreen->b.num_shader_cache_hits); + return true; } static uint32_t si_shader_cache_key_hash(const void *key) @@ -300,9 +315,13 @@ else topology = V_028B6C_OUTPUT_TRIANGLE_CW; - if (sscreen->b.chip_class >= VI) - distribution_mode = V_028B6C_DISTRIBUTION_MODE_DONUTS; - else + if (sscreen->has_distributed_tess) { + if (sscreen->b.family == CHIP_FIJI || + sscreen->b.family >= CHIP_POLARIS10) + distribution_mode = V_028B6C_DISTRIBUTION_MODE_TRAPEZOIDS; + else + distribution_mode = V_028B6C_DISTRIBUTION_MODE_DONUTS; + } else distribution_mode = V_028B6C_DISTRIBUTION_MODE_NO_DIST; si_pm4_set_reg(pm4, R_028B6C_VGT_TF_PARAM, @@ -312,18 +331,28 @@ S_028B6C_DISTRIBUTION_MODE(distribution_mode)); } +static struct si_pm4_state *si_get_shader_pm4_state(struct si_shader *shader) +{ + if (shader->pm4) + si_pm4_clear_state(shader->pm4); + else + shader->pm4 = CALLOC_STRUCT(si_pm4_state); + + return shader->pm4; +} + static void si_shader_ls(struct si_shader *shader) { struct si_pm4_state *pm4; unsigned vgpr_comp_cnt; uint64_t va; - pm4 = shader->pm4 = CALLOC_STRUCT(si_pm4_state); + pm4 = si_get_shader_pm4_state(shader); if (!pm4) return; va = shader->bo->gpu_address; - si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ, RADEON_PRIO_USER_SHADER); + si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ, RADEON_PRIO_SHADER_BINARY); /* We need at least 2 components for LS. * VGPR0-3: (VertexID, RelAutoindex, ???, InstanceID). */ @@ -346,12 +375,12 @@ struct si_pm4_state *pm4; uint64_t va; - pm4 = shader->pm4 = CALLOC_STRUCT(si_pm4_state); + pm4 = si_get_shader_pm4_state(shader); if (!pm4) return; va = shader->bo->gpu_address; - si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ, RADEON_PRIO_USER_SHADER); + si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ, RADEON_PRIO_SHADER_BINARY); si_pm4_set_reg(pm4, R_00B420_SPI_SHADER_PGM_LO_HS, va >> 8); si_pm4_set_reg(pm4, R_00B424_SPI_SHADER_PGM_HI_HS, va >> 40); @@ -374,13 +403,12 @@ uint64_t va; unsigned oc_lds_en; - pm4 = shader->pm4 = CALLOC_STRUCT(si_pm4_state); - + pm4 = si_get_shader_pm4_state(shader); if (!pm4) return; va = shader->bo->gpu_address; - si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ, RADEON_PRIO_USER_SHADER); + si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ, RADEON_PRIO_SHADER_BINARY); if (shader->selector->type == PIPE_SHADER_VERTEX) { vgpr_comp_cnt = shader->info.uses_instanceid ? 3 : 0; @@ -416,9 +444,9 @@ * Calculate the appropriate setting of VGT_GS_MODE when \p shader is a * geometry shader. */ -static uint32_t si_vgt_gs_mode(struct si_shader *shader) +static uint32_t si_vgt_gs_mode(struct si_shader_selector *sel) { - unsigned gs_max_vert_out = shader->selector->gs_max_out_vertices; + unsigned gs_max_vert_out = sel->gs_max_out_vertices; unsigned cut_mode; if (gs_max_vert_out <= 128) { @@ -440,42 +468,48 @@ static void si_shader_gs(struct si_shader *shader) { - unsigned gs_vert_itemsize = shader->selector->gsvs_vertex_size; - unsigned gsvs_itemsize = shader->selector->max_gsvs_emit_size >> 2; - unsigned gs_num_invocations = shader->selector->gs_num_invocations; + struct si_shader_selector *sel = shader->selector; + const ubyte *num_components = sel->info.num_stream_output_components; + unsigned gs_num_invocations = sel->gs_num_invocations; struct si_pm4_state *pm4; uint64_t va; - unsigned max_stream = shader->selector->max_gs_stream; - - /* The GSVS_RING_ITEMSIZE register takes 15 bits */ - assert(gsvs_itemsize < (1 << 15)); - - pm4 = shader->pm4 = CALLOC_STRUCT(si_pm4_state); + unsigned max_stream = sel->max_gs_stream; + unsigned offset; + pm4 = si_get_shader_pm4_state(shader); if (!pm4) return; - si_pm4_set_reg(pm4, R_028A40_VGT_GS_MODE, si_vgt_gs_mode(shader)); + si_pm4_set_reg(pm4, R_028A40_VGT_GS_MODE, si_vgt_gs_mode(shader->selector)); - si_pm4_set_reg(pm4, R_028A60_VGT_GSVS_RING_OFFSET_1, gsvs_itemsize); - si_pm4_set_reg(pm4, R_028A64_VGT_GSVS_RING_OFFSET_2, gsvs_itemsize * ((max_stream >= 2) ? 2 : 1)); - si_pm4_set_reg(pm4, R_028A68_VGT_GSVS_RING_OFFSET_3, gsvs_itemsize * ((max_stream >= 3) ? 3 : 1)); + offset = num_components[0] * sel->gs_max_out_vertices; + si_pm4_set_reg(pm4, R_028A60_VGT_GSVS_RING_OFFSET_1, offset); + if (max_stream >= 1) + offset += num_components[1] * sel->gs_max_out_vertices; + si_pm4_set_reg(pm4, R_028A64_VGT_GSVS_RING_OFFSET_2, offset); + if (max_stream >= 2) + offset += num_components[2] * sel->gs_max_out_vertices; + si_pm4_set_reg(pm4, R_028A68_VGT_GSVS_RING_OFFSET_3, offset); + if (max_stream >= 3) + offset += num_components[3] * sel->gs_max_out_vertices; + si_pm4_set_reg(pm4, R_028AB0_VGT_GSVS_RING_ITEMSIZE, offset); - si_pm4_set_reg(pm4, R_028AB0_VGT_GSVS_RING_ITEMSIZE, gsvs_itemsize * (max_stream + 1)); + /* The GSVS_RING_ITEMSIZE register takes 15 bits */ + assert(offset < (1 << 15)); si_pm4_set_reg(pm4, R_028B38_VGT_GS_MAX_VERT_OUT, shader->selector->gs_max_out_vertices); - si_pm4_set_reg(pm4, R_028B5C_VGT_GS_VERT_ITEMSIZE, gs_vert_itemsize >> 2); - si_pm4_set_reg(pm4, R_028B60_VGT_GS_VERT_ITEMSIZE_1, (max_stream >= 1) ? gs_vert_itemsize >> 2 : 0); - si_pm4_set_reg(pm4, R_028B64_VGT_GS_VERT_ITEMSIZE_2, (max_stream >= 2) ? gs_vert_itemsize >> 2 : 0); - si_pm4_set_reg(pm4, R_028B68_VGT_GS_VERT_ITEMSIZE_3, (max_stream >= 3) ? gs_vert_itemsize >> 2 : 0); + si_pm4_set_reg(pm4, R_028B5C_VGT_GS_VERT_ITEMSIZE, num_components[0]); + si_pm4_set_reg(pm4, R_028B60_VGT_GS_VERT_ITEMSIZE_1, (max_stream >= 1) ? num_components[1] : 0); + si_pm4_set_reg(pm4, R_028B64_VGT_GS_VERT_ITEMSIZE_2, (max_stream >= 2) ? num_components[2] : 0); + si_pm4_set_reg(pm4, R_028B68_VGT_GS_VERT_ITEMSIZE_3, (max_stream >= 3) ? num_components[3] : 0); si_pm4_set_reg(pm4, R_028B90_VGT_GS_INSTANCE_CNT, S_028B90_CNT(MIN2(gs_num_invocations, 127)) | S_028B90_ENABLE(gs_num_invocations > 0)); va = shader->bo->gpu_address; - si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ, RADEON_PRIO_USER_SHADER); + si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ, RADEON_PRIO_SHADER_BINARY); si_pm4_set_reg(pm4, R_00B220_SPI_SHADER_PGM_LO_GS, va >> 8); si_pm4_set_reg(pm4, R_00B224_SPI_SHADER_PGM_HI_GS, va >> 40); @@ -497,7 +531,7 @@ * is the copy shader. */ static void si_shader_vs(struct si_screen *sscreen, struct si_shader *shader, - struct si_shader *gs) + struct si_shader_selector *gs) { struct si_pm4_state *pm4; unsigned num_user_sgprs; @@ -508,8 +542,7 @@ shader->selector->info.properties[TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION]; bool enable_prim_id = si_vs_exports_prim_id(shader); - pm4 = shader->pm4 = CALLOC_STRUCT(si_pm4_state); - + pm4 = si_get_shader_pm4_state(shader); if (!pm4) return; @@ -530,7 +563,7 @@ } va = shader->bo->gpu_address; - si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ, RADEON_PRIO_USER_SHADER); + si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ, RADEON_PRIO_SHADER_BINARY); if (gs) { vgpr_comp_cnt = 0; /* only VertexID is needed for GS-COPY. */ @@ -600,7 +633,7 @@ unsigned num_colors = !!(info->colors_read & 0x0f) + !!(info->colors_read & 0xf0); unsigned num_interp = ps->selector->info.num_inputs + - (ps->key.ps.prolog.color_two_side ? num_colors : 0); + (ps->key.part.ps.prolog.color_two_side ? num_colors : 0); assert(num_interp <= 32); return MIN2(num_interp, 32); @@ -608,7 +641,7 @@ static unsigned si_get_spi_shader_col_format(struct si_shader *shader) { - unsigned value = shader->key.ps.epilog.spi_shader_col_format; + unsigned value = shader->key.part.ps.epilog.spi_shader_col_format; unsigned i, num_targets = (util_last_bit(value) + 3) / 4; /* If the i-th target format is set, all previous target formats must @@ -660,7 +693,6 @@ unsigned spi_ps_in_control, spi_shader_col_format, cb_shader_mask; unsigned spi_baryc_cntl = S_0286E0_FRONT_FACE_ALL_BITS(1); uint64_t va; - bool has_centroid; unsigned input_ena = shader->config.spi_ps_input_ena; /* we need to enable at least one of them, otherwise we hang the GPU */ @@ -672,9 +704,42 @@ G_0286CC_LINEAR_CENTER_ENA(input_ena) || G_0286CC_LINEAR_CENTROID_ENA(input_ena) || G_0286CC_LINE_STIPPLE_TEX_ENA(input_ena)); + /* POS_W_FLOAT_ENA requires one of the perspective weights. */ + assert(!G_0286CC_POS_W_FLOAT_ENA(input_ena) || + G_0286CC_PERSP_SAMPLE_ENA(input_ena) || + G_0286CC_PERSP_CENTER_ENA(input_ena) || + G_0286CC_PERSP_CENTROID_ENA(input_ena) || + G_0286CC_PERSP_PULL_MODEL_ENA(input_ena)); - pm4 = shader->pm4 = CALLOC_STRUCT(si_pm4_state); + /* Validate interpolation optimization flags (read as implications). */ + assert(!shader->key.part.ps.prolog.bc_optimize_for_persp || + (G_0286CC_PERSP_CENTER_ENA(input_ena) && + G_0286CC_PERSP_CENTROID_ENA(input_ena))); + assert(!shader->key.part.ps.prolog.bc_optimize_for_linear || + (G_0286CC_LINEAR_CENTER_ENA(input_ena) && + G_0286CC_LINEAR_CENTROID_ENA(input_ena))); + assert(!shader->key.part.ps.prolog.force_persp_center_interp || + (!G_0286CC_PERSP_SAMPLE_ENA(input_ena) && + !G_0286CC_PERSP_CENTROID_ENA(input_ena))); + assert(!shader->key.part.ps.prolog.force_linear_center_interp || + (!G_0286CC_LINEAR_SAMPLE_ENA(input_ena) && + !G_0286CC_LINEAR_CENTROID_ENA(input_ena))); + assert(!shader->key.part.ps.prolog.force_persp_sample_interp || + (!G_0286CC_PERSP_CENTER_ENA(input_ena) && + !G_0286CC_PERSP_CENTROID_ENA(input_ena))); + assert(!shader->key.part.ps.prolog.force_linear_sample_interp || + (!G_0286CC_LINEAR_CENTER_ENA(input_ena) && + !G_0286CC_LINEAR_CENTROID_ENA(input_ena))); + + /* Validate cases when the optimizations are off (read as implications). */ + assert(shader->key.part.ps.prolog.bc_optimize_for_persp || + !G_0286CC_PERSP_CENTER_ENA(input_ena) || + !G_0286CC_PERSP_CENTROID_ENA(input_ena)); + assert(shader->key.part.ps.prolog.bc_optimize_for_linear || + !G_0286CC_LINEAR_CENTER_ENA(input_ena) || + !G_0286CC_LINEAR_CENTROID_ENA(input_ena)); + pm4 = si_get_shader_pm4_state(shader); if (!pm4) return; @@ -725,27 +790,22 @@ shader->config.spi_ps_input_addr); /* Set interpolation controls. */ - has_centroid = G_0286CC_PERSP_CENTROID_ENA(shader->config.spi_ps_input_ena) || - G_0286CC_LINEAR_CENTROID_ENA(shader->config.spi_ps_input_ena); - - spi_ps_in_control = S_0286D8_NUM_INTERP(si_get_ps_num_interp(shader)) | - S_0286D8_BC_OPTIMIZE_DISABLE(has_centroid); + spi_ps_in_control = S_0286D8_NUM_INTERP(si_get_ps_num_interp(shader)); /* Set registers. */ si_pm4_set_reg(pm4, R_0286E0_SPI_BARYC_CNTL, spi_baryc_cntl); si_pm4_set_reg(pm4, R_0286D8_SPI_PS_IN_CONTROL, spi_ps_in_control); si_pm4_set_reg(pm4, R_028710_SPI_SHADER_Z_FORMAT, - info->writes_samplemask ? V_028710_SPI_SHADER_32_ABGR : - info->writes_stencil ? V_028710_SPI_SHADER_32_GR : - info->writes_z ? V_028710_SPI_SHADER_32_R : - V_028710_SPI_SHADER_ZERO); + si_get_spi_shader_z_format(info->writes_z, + info->writes_stencil, + info->writes_samplemask)); si_pm4_set_reg(pm4, R_028714_SPI_SHADER_COL_FORMAT, spi_shader_col_format); si_pm4_set_reg(pm4, R_02823C_CB_SHADER_MASK, cb_shader_mask); va = shader->bo->gpu_address; - si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ, RADEON_PRIO_USER_SHADER); + si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ, RADEON_PRIO_SHADER_BINARY); si_pm4_set_reg(pm4, R_00B020_SPI_SHADER_PGM_LO_PS, va >> 8); si_pm4_set_reg(pm4, R_00B024_SPI_SHADER_PGM_HI_PS, va >> 40); @@ -758,34 +818,16 @@ S_00B02C_EXTRA_LDS_SIZE(shader->config.lds_size) | S_00B02C_USER_SGPR(SI_PS_NUM_USER_SGPR) | S_00B32C_SCRATCH_EN(shader->config.scratch_bytes_per_wave > 0)); - - /* DON'T USE EARLY_Z_THEN_RE_Z !!! - * - * It decreases performance by 15% in DiRT: Showdown on Ultra settings. - * And it has pretty complex shaders. - * - * Shaders with side effects that must execute independently of the - * depth test require LATE_Z. - */ - if (info->writes_memory && - !info->properties[TGSI_PROPERTY_FS_EARLY_DEPTH_STENCIL]) - shader->z_order = V_02880C_LATE_Z; - else - shader->z_order = V_02880C_EARLY_Z_THEN_LATE_Z; } static void si_shader_init_pm4_state(struct si_screen *sscreen, struct si_shader *shader) { - - if (shader->pm4) - si_pm4_free_state_simple(shader->pm4); - switch (shader->selector->type) { case PIPE_SHADER_VERTEX: - if (shader->key.vs.as_ls) + if (shader->key.as_ls) si_shader_ls(shader); - else if (shader->key.vs.as_es) + else if (shader->key.as_es) si_shader_es(sscreen, shader); else si_shader_vs(sscreen, shader, NULL); @@ -794,14 +836,13 @@ si_shader_hs(shader); break; case PIPE_SHADER_TESS_EVAL: - if (shader->key.tes.as_es) + if (shader->key.as_es) si_shader_es(sscreen, shader); else si_shader_vs(sscreen, shader, NULL); break; case PIPE_SHADER_GEOMETRY: si_shader_gs(shader); - si_shader_vs(sscreen, shader->gs_copy_shader, shader); break; case PIPE_SHADER_FRAGMENT: si_shader_ps(shader); @@ -814,17 +855,68 @@ static unsigned si_get_alpha_test_func(struct si_context *sctx) { /* Alpha-test should be disabled if colorbuffer 0 is integer. */ - if (sctx->queued.named.dsa && - !sctx->framebuffer.cb0_is_integer) + if (sctx->queued.named.dsa) return sctx->queued.named.dsa->alpha_func; return PIPE_FUNC_ALWAYS; } +static void si_shader_selector_key_hw_vs(struct si_context *sctx, + struct si_shader_selector *vs, + struct si_shader_key *key) +{ + struct si_shader_selector *ps = sctx->ps_shader.cso; + + key->opt.hw_vs.clip_disable = + sctx->queued.named.rasterizer->clip_plane_enable == 0 && + (vs->info.clipdist_writemask || + vs->info.writes_clipvertex) && + !vs->info.culldist_writemask; + + /* Find out if PS is disabled. */ + bool ps_disabled = true; + if (ps) { + bool ps_modifies_zs = ps->info.uses_kill || + ps->info.writes_z || + ps->info.writes_stencil || + ps->info.writes_samplemask || + si_get_alpha_test_func(sctx) != PIPE_FUNC_ALWAYS; + + unsigned ps_colormask = sctx->framebuffer.colorbuf_enabled_4bit & + sctx->queued.named.blend->cb_target_mask; + if (!ps->info.properties[TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS]) + ps_colormask &= ps->colors_written_4bit; + + ps_disabled = sctx->queued.named.rasterizer->rasterizer_discard || + (!ps_colormask && + !ps_modifies_zs && + !ps->info.writes_memory); + } + + /* Find out which VS outputs aren't used by the PS. */ + uint64_t outputs_written = vs->outputs_written; + uint32_t outputs_written2 = vs->outputs_written2; + uint64_t inputs_read = 0; + uint32_t inputs_read2 = 0; + + outputs_written &= ~0x3; /* ignore POSITION, PSIZE */ + + if (!ps_disabled) { + inputs_read = ps->inputs_read; + inputs_read2 = ps->inputs_read2; + } + + uint64_t linked = outputs_written & inputs_read; + uint32_t linked2 = outputs_written2 & inputs_read2; + + key->opt.hw_vs.kill_outputs = ~linked & outputs_written; + key->opt.hw_vs.kill_outputs2 = ~linked2 & outputs_written2; +} + /* Compute the key for the hw shader variant */ static inline void si_shader_selector_key(struct pipe_context *ctx, struct si_shader_selector *sel, - union si_shader_key *key) + struct si_shader_key *key) { struct si_context *sctx = (struct si_context *)ctx; unsigned i; @@ -837,32 +929,43 @@ unsigned count = MIN2(sel->info.num_inputs, sctx->vertex_elements->count); for (i = 0; i < count; ++i) - key->vs.prolog.instance_divisors[i] = + key->part.vs.prolog.instance_divisors[i] = sctx->vertex_elements->elements[i].instance_divisor; + + key->mono.vs.fix_fetch = + sctx->vertex_elements->fix_fetch & + u_bit_consecutive64(0, 4 * count); } if (sctx->tes_shader.cso) - key->vs.as_ls = 1; + key->as_ls = 1; else if (sctx->gs_shader.cso) - key->vs.as_es = 1; + key->as_es = 1; + else { + si_shader_selector_key_hw_vs(sctx, sel, key); - if (!sctx->gs_shader.cso && sctx->ps_shader.cso && - sctx->ps_shader.cso->info.uses_primid) - key->vs.epilog.export_prim_id = 1; + if (sctx->ps_shader.cso && sctx->ps_shader.cso->info.uses_primid) + key->part.vs.epilog.export_prim_id = 1; + } break; case PIPE_SHADER_TESS_CTRL: - key->tcs.epilog.prim_mode = + key->part.tcs.epilog.prim_mode = sctx->tes_shader.cso->info.properties[TGSI_PROPERTY_TES_PRIM_MODE]; if (sel == sctx->fixed_func_tcs_shader.cso) - key->tcs.epilog.inputs_to_copy = sctx->vs_shader.cso->outputs_written; + key->mono.tcs.inputs_to_copy = sctx->vs_shader.cso->outputs_written; break; case PIPE_SHADER_TESS_EVAL: if (sctx->gs_shader.cso) - key->tes.as_es = 1; - else if (sctx->ps_shader.cso && sctx->ps_shader.cso->info.uses_primid) - key->tes.epilog.export_prim_id = 1; + key->as_es = 1; + else { + si_shader_selector_key_hw_vs(sctx, sel, key); + + if (sctx->ps_shader.cso && sctx->ps_shader.cso->info.uses_primid) + key->part.tes.epilog.export_prim_id = 1; + } break; case PIPE_SHADER_GEOMETRY: + key->part.gs.prolog.tri_strip_adj_fix = sctx->gs_tri_strip_adj_fix; break; case PIPE_SHADER_FRAGMENT: { struct si_state_rasterizer *rs = sctx->queued.named.rasterizer; @@ -870,13 +973,13 @@ if (sel->info.properties[TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS] && sel->info.colors_written == 0x1) - key->ps.epilog.last_cbuf = MAX2(sctx->framebuffer.state.nr_cbufs, 1) - 1; + key->part.ps.epilog.last_cbuf = MAX2(sctx->framebuffer.state.nr_cbufs, 1) - 1; if (blend) { /* Select the shader color format based on whether * blending or alpha are needed. */ - key->ps.epilog.spi_shader_col_format = + key->part.ps.epilog.spi_shader_col_format = (blend->blend_enable_4bit & blend->need_src_alpha_4bit & sctx->framebuffer.spi_shader_col_format_blend_alpha) | (blend->blend_enable_4bit & ~blend->need_src_alpha_4bit & @@ -885,27 +988,37 @@ sctx->framebuffer.spi_shader_col_format_alpha) | (~blend->blend_enable_4bit & ~blend->need_src_alpha_4bit & sctx->framebuffer.spi_shader_col_format); + + /* The output for dual source blending should have + * the same format as the first output. + */ + if (blend->dual_src_blend) + key->part.ps.epilog.spi_shader_col_format |= + (key->part.ps.epilog.spi_shader_col_format & 0xf) << 4; } else - key->ps.epilog.spi_shader_col_format = sctx->framebuffer.spi_shader_col_format; + key->part.ps.epilog.spi_shader_col_format = sctx->framebuffer.spi_shader_col_format; /* If alpha-to-coverage is enabled, we have to export alpha * even if there is no color buffer. */ - if (!(key->ps.epilog.spi_shader_col_format & 0xf) && + if (!(key->part.ps.epilog.spi_shader_col_format & 0xf) && blend && blend->alpha_to_coverage) - key->ps.epilog.spi_shader_col_format |= V_028710_SPI_SHADER_32_AR; + key->part.ps.epilog.spi_shader_col_format |= V_028710_SPI_SHADER_32_AR; /* On SI and CIK except Hawaii, the CB doesn't clamp outputs * to the range supported by the type if a channel has less * than 16 bits and the export format is 16_ABGR. */ - if (sctx->b.chip_class <= CIK && sctx->b.family != CHIP_HAWAII) - key->ps.epilog.color_is_int8 = sctx->framebuffer.color_is_int8; + if (sctx->b.chip_class <= CIK && sctx->b.family != CHIP_HAWAII) { + key->part.ps.epilog.color_is_int8 = sctx->framebuffer.color_is_int8; + key->part.ps.epilog.color_is_int10 = sctx->framebuffer.color_is_int10; + } /* Disable unwritten outputs (if WRITE_ALL_CBUFS isn't enabled). */ - if (!key->ps.epilog.last_cbuf) { - key->ps.epilog.spi_shader_col_format &= sel->colors_written_4bit; - key->ps.epilog.color_is_int8 &= sel->info.colors_written; + if (!key->part.ps.epilog.last_cbuf) { + key->part.ps.epilog.spi_shader_col_format &= sel->colors_written_4bit; + key->part.ps.epilog.color_is_int8 &= sel->info.colors_written; + key->part.ps.epilog.color_is_int10 &= sel->info.colors_written; } if (rs) { @@ -914,32 +1027,55 @@ sctx->current_rast_prim >= PIPE_PRIM_TRIANGLES_ADJACENCY; bool is_line = !is_poly && sctx->current_rast_prim != PIPE_PRIM_POINTS; - key->ps.prolog.color_two_side = rs->two_side && sel->info.colors_read; + key->part.ps.prolog.color_two_side = rs->two_side && sel->info.colors_read; + key->part.ps.prolog.flatshade_colors = rs->flatshade && sel->info.colors_read; if (sctx->queued.named.blend) { - key->ps.epilog.alpha_to_one = sctx->queued.named.blend->alpha_to_one && - rs->multisample_enable && - !sctx->framebuffer.cb0_is_integer; + key->part.ps.epilog.alpha_to_one = sctx->queued.named.blend->alpha_to_one && + rs->multisample_enable; } - key->ps.prolog.poly_stipple = rs->poly_stipple_enable && is_poly; - key->ps.epilog.poly_line_smoothing = ((is_poly && rs->poly_smooth) || + key->part.ps.prolog.poly_stipple = rs->poly_stipple_enable && is_poly; + key->part.ps.epilog.poly_line_smoothing = ((is_poly && rs->poly_smooth) || (is_line && rs->line_smooth)) && sctx->framebuffer.nr_samples <= 1; - key->ps.epilog.clamp_color = rs->clamp_fragment_color; + key->part.ps.epilog.clamp_color = rs->clamp_fragment_color; - key->ps.prolog.force_persample_interp = - rs->force_persample_interp && - rs->multisample_enable && - sctx->framebuffer.nr_samples > 1 && - sctx->ps_iter_samples > 1 && - (sel->info.uses_persp_center || - sel->info.uses_persp_centroid || - sel->info.uses_linear_center || - sel->info.uses_linear_centroid); + if (rs->force_persample_interp && + rs->multisample_enable && + sctx->framebuffer.nr_samples > 1 && + sctx->ps_iter_samples > 1) { + key->part.ps.prolog.force_persp_sample_interp = + sel->info.uses_persp_center || + sel->info.uses_persp_centroid; + + key->part.ps.prolog.force_linear_sample_interp = + sel->info.uses_linear_center || + sel->info.uses_linear_centroid; + } else if (rs->multisample_enable && + sctx->framebuffer.nr_samples > 1) { + key->part.ps.prolog.bc_optimize_for_persp = + sel->info.uses_persp_center && + sel->info.uses_persp_centroid; + key->part.ps.prolog.bc_optimize_for_linear = + sel->info.uses_linear_center && + sel->info.uses_linear_centroid; + } else { + /* Make sure SPI doesn't compute more than 1 pair + * of (i,j), which is the optimization here. */ + key->part.ps.prolog.force_persp_center_interp = + sel->info.uses_persp_center + + sel->info.uses_persp_centroid + + sel->info.uses_persp_sample > 1; + + key->part.ps.prolog.force_linear_center_interp = + sel->info.uses_linear_center + + sel->info.uses_linear_centroid + + sel->info.uses_linear_sample > 1; + } } - key->ps.epilog.alpha_func = si_get_alpha_test_func(sctx); + key->part.ps.epilog.alpha_func = si_get_alpha_test_func(sctx); break; } default: @@ -947,23 +1083,80 @@ } } +static void si_build_shader_variant(void *job, int thread_index) +{ + struct si_shader *shader = (struct si_shader *)job; + struct si_shader_selector *sel = shader->selector; + struct si_screen *sscreen = sel->screen; + LLVMTargetMachineRef tm; + struct pipe_debug_callback *debug = &shader->compiler_ctx_state.debug; + int r; + + if (thread_index >= 0) { + assert(thread_index < ARRAY_SIZE(sscreen->tm)); + tm = sscreen->tm[thread_index]; + if (!debug->async) + debug = NULL; + } else { + tm = shader->compiler_ctx_state.tm; + } + + r = si_shader_create(sscreen, tm, shader, debug); + if (unlikely(r)) { + R600_ERR("Failed to build shader variant (type=%u) %d\n", + sel->type, r); + shader->compilation_failed = true; + return; + } + + if (shader->compiler_ctx_state.is_debug_context) { + FILE *f = open_memstream(&shader->shader_log, + &shader->shader_log_size); + if (f) { + si_shader_dump(sscreen, shader, NULL, sel->type, f, false); + fclose(f); + } + } + + si_shader_init_pm4_state(sscreen, shader); +} + /* Select the hw shader variant depending on the current state. */ -static int si_shader_select_with_key(struct pipe_context *ctx, +static int si_shader_select_with_key(struct si_screen *sscreen, struct si_shader_ctx_state *state, - union si_shader_key *key) + struct si_compiler_ctx_state *compiler_state, + struct si_shader_key *key, + int thread_index) { - struct si_context *sctx = (struct si_context *)ctx; + static const struct si_shader_key zeroed; struct si_shader_selector *sel = state->cso; struct si_shader *current = state->current; struct si_shader *iter, *shader = NULL; - int r; + if (unlikely(sscreen->b.debug_flags & DBG_NO_OPT_VARIANT)) { + memset(&key->opt, 0, sizeof(key->opt)); + } + +again: /* Check if we don't need to change anything. * This path is also used for most shaders that don't need multiple * variants, it will cost just a computation of the key and this * test. */ - if (likely(current && memcmp(¤t->key, key, sizeof(*key)) == 0)) - return 0; + if (likely(current && + memcmp(¤t->key, key, sizeof(*key)) == 0 && + (!current->is_optimized || + util_queue_fence_is_signalled(¤t->optimized_ready)))) + return current->compilation_failed ? -1 : 0; + + /* This must be done before the mutex is locked, because async GS + * compilation calls this function too, and therefore must enter + * the mutex first. + * + * Only wait if we are in a draw call. Don't wait if we are + * in a compiler thread. + */ + if (thread_index < 0) + util_queue_job_wait(&sel->ready); pipe_mutex_lock(sel->mutex); @@ -972,6 +1165,22 @@ /* Don't check the "current" shader. We checked it above. */ if (current != iter && memcmp(&iter->key, key, sizeof(*key)) == 0) { + /* If it's an optimized shader and its compilation has + * been started but isn't done, use the unoptimized + * shader so as not to cause a stall due to compilation. + */ + if (iter->is_optimized && + !util_queue_fence_is_signalled(&iter->optimized_ready)) { + memset(&key->opt, 0, sizeof(key->opt)); + pipe_mutex_unlock(sel->mutex); + goto again; + } + + if (iter->compilation_failed) { + pipe_mutex_unlock(sel->mutex); + return -1; /* skip the draw call */ + } + state->current = iter; pipe_mutex_unlock(sel->mutex); return 0; @@ -986,16 +1195,22 @@ } shader->selector = sel; shader->key = *key; + shader->compiler_ctx_state = *compiler_state; - r = si_shader_create(sctx->screen, sctx->tm, shader, &sctx->b.debug); - if (unlikely(r)) { - R600_ERR("Failed to build shader variant (type=%u) %d\n", - sel->type, r); - FREE(shader); - pipe_mutex_unlock(sel->mutex); - return r; - } - si_shader_init_pm4_state(sctx->screen, shader); + /* Monolithic-only shaders don't make a distinction between optimized + * and unoptimized. */ + shader->is_monolithic = + !sel->main_shader_part || + sel->main_shader_part->key.as_ls != key->as_ls || + sel->main_shader_part->key.as_es != key->as_es || + memcmp(&key->opt, &zeroed.opt, sizeof(key->opt)) != 0 || + memcmp(&key->mono, &zeroed.mono, sizeof(key->mono)) != 0; + + shader->is_optimized = + !sscreen->use_monolithic_shaders && + memcmp(&key->opt, &zeroed.opt, sizeof(key->opt)) != 0; + if (shader->is_optimized) + util_queue_fence_init(&shader->optimized_ready); if (!sel->last_variant) { sel->first_variant = shader; @@ -1004,22 +1219,45 @@ sel->last_variant->next_variant = shader; sel->last_variant = shader; } - state->current = shader; + + /* If it's an optimized shader, compile it asynchronously. */ + if (shader->is_optimized && + thread_index < 0) { + /* Compile it asynchronously. */ + util_queue_add_job(&sscreen->shader_compiler_queue, + shader, &shader->optimized_ready, + si_build_shader_variant, NULL); + + /* Use the default (unoptimized) shader for now. */ + memset(&key->opt, 0, sizeof(key->opt)); + pipe_mutex_unlock(sel->mutex); + goto again; + } + + assert(!shader->is_optimized); + si_build_shader_variant(shader, thread_index); + + if (!shader->compilation_failed) + state->current = shader; + pipe_mutex_unlock(sel->mutex); - return 0; + return shader->compilation_failed ? -1 : 0; } static int si_shader_select(struct pipe_context *ctx, - struct si_shader_ctx_state *state) + struct si_shader_ctx_state *state, + struct si_compiler_ctx_state *compiler_state) { - union si_shader_key key; + struct si_context *sctx = (struct si_context *)ctx; + struct si_shader_key key; si_shader_selector_key(ctx, state->cso, &key); - return si_shader_select_with_key(ctx, state, &key); + return si_shader_select_with_key(sctx->screen, state, compiler_state, + &key, -1); } static void si_parse_next_shader_property(const struct tgsi_shader_info *info, - union si_shader_key *key) + struct si_shader_key *key) { unsigned next_shader = info->properties[TGSI_PROPERTY_NEXT_SHADER]; @@ -1027,22 +1265,193 @@ case PIPE_SHADER_VERTEX: switch (next_shader) { case PIPE_SHADER_GEOMETRY: - key->vs.as_es = 1; + key->as_es = 1; break; case PIPE_SHADER_TESS_CTRL: case PIPE_SHADER_TESS_EVAL: - key->vs.as_ls = 1; + key->as_ls = 1; break; + default: + /* If POSITION isn't written, it can't be a HW VS. + * Assume that it's a HW LS. (the next shader is TCS) + * This heuristic is needed for separate shader objects. + */ + if (!info->writes_position) + key->as_ls = 1; } break; case PIPE_SHADER_TESS_EVAL: - if (next_shader == PIPE_SHADER_GEOMETRY) - key->tes.as_es = 1; + if (next_shader == PIPE_SHADER_GEOMETRY || + !info->writes_position) + key->as_es = 1; break; } } +/** + * Compile the main shader part or the monolithic shader as part of + * si_shader_selector initialization. Since it can be done asynchronously, + * there is no way to report compile failures to applications. + */ +void si_init_shader_selector_async(void *job, int thread_index) +{ + struct si_shader_selector *sel = (struct si_shader_selector *)job; + struct si_screen *sscreen = sel->screen; + LLVMTargetMachineRef tm; + struct pipe_debug_callback *debug = &sel->compiler_ctx_state.debug; + unsigned i; + + if (thread_index >= 0) { + assert(thread_index < ARRAY_SIZE(sscreen->tm)); + tm = sscreen->tm[thread_index]; + if (!debug->async) + debug = NULL; + } else { + tm = sel->compiler_ctx_state.tm; + } + + /* Compile the main shader part for use with a prolog and/or epilog. + * If this fails, the driver will try to compile a monolithic shader + * on demand. + */ + if (!sscreen->use_monolithic_shaders) { + struct si_shader *shader = CALLOC_STRUCT(si_shader); + void *tgsi_binary; + + if (!shader) { + fprintf(stderr, "radeonsi: can't allocate a main shader part\n"); + return; + } + + shader->selector = sel; + si_parse_next_shader_property(&sel->info, &shader->key); + + tgsi_binary = si_get_tgsi_binary(sel); + + /* Try to load the shader from the shader cache. */ + pipe_mutex_lock(sscreen->shader_cache_mutex); + + if (tgsi_binary && + si_shader_cache_load_shader(sscreen, tgsi_binary, shader)) { + FREE(tgsi_binary); + pipe_mutex_unlock(sscreen->shader_cache_mutex); + } else { + pipe_mutex_unlock(sscreen->shader_cache_mutex); + + /* Compile the shader if it hasn't been loaded from the cache. */ + if (si_compile_tgsi_shader(sscreen, tm, shader, false, + debug) != 0) { + FREE(shader); + FREE(tgsi_binary); + fprintf(stderr, "radeonsi: can't compile a main shader part\n"); + return; + } + + if (tgsi_binary) { + pipe_mutex_lock(sscreen->shader_cache_mutex); + if (!si_shader_cache_insert_shader(sscreen, tgsi_binary, shader)) + FREE(tgsi_binary); + pipe_mutex_unlock(sscreen->shader_cache_mutex); + } + } + + sel->main_shader_part = shader; + + /* Unset "outputs_written" flags for outputs converted to + * DEFAULT_VAL, so that later inter-shader optimizations don't + * try to eliminate outputs that don't exist in the final + * shader. + * + * This is only done if non-monolithic shaders are enabled. + */ + if ((sel->type == PIPE_SHADER_VERTEX || + sel->type == PIPE_SHADER_TESS_EVAL) && + !shader->key.as_ls && + !shader->key.as_es) { + unsigned i; + + for (i = 0; i < sel->info.num_outputs; i++) { + unsigned offset = shader->info.vs_output_param_offset[i]; + + if (offset <= EXP_PARAM_OFFSET_31) + continue; + + unsigned name = sel->info.output_semantic_name[i]; + unsigned index = sel->info.output_semantic_index[i]; + unsigned id; + + switch (name) { + case TGSI_SEMANTIC_GENERIC: + /* don't process indices the function can't handle */ + if (index >= 60) + break; + /* fall through */ + case TGSI_SEMANTIC_CLIPDIST: + id = si_shader_io_get_unique_index(name, index); + sel->outputs_written &= ~(1ull << id); + break; + case TGSI_SEMANTIC_POSITION: /* ignore these */ + case TGSI_SEMANTIC_PSIZE: + case TGSI_SEMANTIC_CLIPVERTEX: + case TGSI_SEMANTIC_EDGEFLAG: + break; + default: + id = si_shader_io_get_unique_index2(name, index); + sel->outputs_written2 &= ~(1u << id); + } + } + } + } + + /* Pre-compilation. */ + if (sscreen->b.debug_flags & DBG_PRECOMPILE) { + struct si_shader_ctx_state state = {sel}; + struct si_shader_key key; + + memset(&key, 0, sizeof(key)); + si_parse_next_shader_property(&sel->info, &key); + + /* Set reasonable defaults, so that the shader key doesn't + * cause any code to be eliminated. + */ + switch (sel->type) { + case PIPE_SHADER_TESS_CTRL: + key.part.tcs.epilog.prim_mode = PIPE_PRIM_TRIANGLES; + break; + case PIPE_SHADER_FRAGMENT: + key.part.ps.prolog.bc_optimize_for_persp = + sel->info.uses_persp_center && + sel->info.uses_persp_centroid; + key.part.ps.prolog.bc_optimize_for_linear = + sel->info.uses_linear_center && + sel->info.uses_linear_centroid; + key.part.ps.epilog.alpha_func = PIPE_FUNC_ALWAYS; + for (i = 0; i < 8; i++) + if (sel->info.colors_written & (1 << i)) + key.part.ps.epilog.spi_shader_col_format |= + V_028710_SPI_SHADER_FP16_ABGR << (i * 4); + break; + } + + if (si_shader_select_with_key(sscreen, &state, + &sel->compiler_ctx_state, &key, + thread_index)) + fprintf(stderr, "radeonsi: can't create a monolithic shader\n"); + } + + /* The GS copy shader is always pre-compiled. */ + if (sel->type == PIPE_SHADER_GEOMETRY) { + sel->gs_copy_shader = si_generate_gs_copy_shader(sscreen, tm, sel, debug); + if (!sel->gs_copy_shader) { + fprintf(stderr, "radeonsi: can't create GS copy shader\n"); + return; + } + + si_shader_vs(sscreen, sel->gs_copy_shader, sel); + } +} + static void *si_create_shader_selector(struct pipe_context *ctx, const struct pipe_shader_state *state) { @@ -1054,6 +1463,10 @@ if (!sel) return NULL; + sel->screen = sscreen; + sel->compiler_ctx_state.tm = sctx->tm; + sel->compiler_ctx_state.debug = sctx->b.debug; + sel->compiler_ctx_state.is_debug_context = sctx->is_debug; sel->tokens = tgsi_dup_tokens(state->tokens); if (!sel->tokens) { FREE(sel); @@ -1120,15 +1533,48 @@ sel->patch_outputs_written |= 1llu << si_shader_io_get_unique_index(name, index); break; - default: + + case TGSI_SEMANTIC_GENERIC: + /* don't process indices the function can't handle */ + if (index >= 60) + break; + /* fall through */ + case TGSI_SEMANTIC_POSITION: + case TGSI_SEMANTIC_PSIZE: + case TGSI_SEMANTIC_CLIPDIST: sel->outputs_written |= 1llu << si_shader_io_get_unique_index(name, index); + break; + case TGSI_SEMANTIC_CLIPVERTEX: /* ignore these */ + case TGSI_SEMANTIC_EDGEFLAG: + break; + default: + sel->outputs_written2 |= + 1u << si_shader_io_get_unique_index2(name, index); } } sel->esgs_itemsize = util_last_bit64(sel->outputs_written) * 16; break; case PIPE_SHADER_FRAGMENT: + for (i = 0; i < sel->info.num_inputs; i++) { + unsigned name = sel->info.input_semantic_name[i]; + unsigned index = sel->info.input_semantic_index[i]; + + switch (name) { + case TGSI_SEMANTIC_CLIPDIST: + case TGSI_SEMANTIC_GENERIC: + sel->inputs_read |= + 1llu << si_shader_io_get_unique_index(name, index); + break; + case TGSI_SEMANTIC_PCOORD: /* ignore this */ + break; + default: + sel->inputs_read2 |= + 1u << si_shader_io_get_unique_index2(name, index); + } + } + for (i = 0; i < 8; i++) if (sel->info.colors_written & (1 << i)) sel->colors_written_4bit |= 0xf << (4 * i); @@ -1160,89 +1606,52 @@ break; } - if (sel->info.properties[TGSI_PROPERTY_FS_EARLY_DEPTH_STENCIL]) - sel->db_shader_control |= S_02880C_DEPTH_BEFORE_SHADER(1); - - if (sel->info.writes_memory) - sel->db_shader_control |= S_02880C_EXEC_ON_HIER_FAIL(1) | - S_02880C_EXEC_ON_NOOP(1); - - /* Compile the main shader part for use with a prolog and/or epilog. */ - if (sel->type != PIPE_SHADER_GEOMETRY && - !sscreen->use_monolithic_shaders) { - struct si_shader *shader = CALLOC_STRUCT(si_shader); - void *tgsi_binary; - - if (!shader) - goto error; - - shader->selector = sel; - si_parse_next_shader_property(&sel->info, &shader->key); - - tgsi_binary = si_get_tgsi_binary(sel); - - /* Try to load the shader from the shader cache. */ - pipe_mutex_lock(sscreen->shader_cache_mutex); - - if (tgsi_binary && - si_shader_cache_load_shader(sscreen, tgsi_binary, shader)) { - FREE(tgsi_binary); - } else { - /* Compile the shader if it hasn't been loaded from the cache. */ - if (si_compile_tgsi_shader(sscreen, sctx->tm, shader, false, - &sctx->b.debug) != 0) { - FREE(shader); - FREE(tgsi_binary); - pipe_mutex_unlock(sscreen->shader_cache_mutex); - goto error; - } - - if (tgsi_binary && - !si_shader_cache_insert_shader(sscreen, tgsi_binary, shader)) - FREE(tgsi_binary); - } - pipe_mutex_unlock(sscreen->shader_cache_mutex); - - sel->main_shader_part = shader; + /* Z_ORDER, EXEC_ON_HIER_FAIL and EXEC_ON_NOOP should be set as following: + * + * | early Z/S | writes_mem | allow_ReZ? | Z_ORDER | EXEC_ON_HIER_FAIL | EXEC_ON_NOOP + * --|-----------|------------|------------|--------------------|-------------------|------------- + * 1a| false | false | true | EarlyZ_Then_ReZ | 0 | 0 + * 1b| false | false | false | EarlyZ_Then_LateZ | 0 | 0 + * 2 | false | true | n/a | LateZ | 1 | 0 + * 3 | true | false | n/a | EarlyZ_Then_LateZ | 0 | 0 + * 4 | true | true | n/a | EarlyZ_Then_LateZ | 0 | 1 + * + * In cases 3 and 4, HW will force Z_ORDER to EarlyZ regardless of what's set in the register. + * In case 2, NOOP_CULL is a don't care field. In case 2, 3 and 4, ReZ doesn't make sense. + * + * Don't use ReZ without profiling !!! + * + * ReZ decreases performance by 15% in DiRT: Showdown on Ultra settings, which has pretty complex + * shaders. + */ + if (sel->info.properties[TGSI_PROPERTY_FS_EARLY_DEPTH_STENCIL]) { + /* Cases 3, 4. */ + sel->db_shader_control |= S_02880C_DEPTH_BEFORE_SHADER(1) | + S_02880C_Z_ORDER(V_02880C_EARLY_Z_THEN_LATE_Z) | + S_02880C_EXEC_ON_NOOP(sel->info.writes_memory); + } else if (sel->info.writes_memory) { + /* Case 2. */ + sel->db_shader_control |= S_02880C_Z_ORDER(V_02880C_LATE_Z) | + S_02880C_EXEC_ON_HIER_FAIL(1); + } else { + /* Case 1. */ + sel->db_shader_control |= S_02880C_Z_ORDER(V_02880C_EARLY_Z_THEN_LATE_Z); } - /* Pre-compilation. */ - if (sel->type == PIPE_SHADER_GEOMETRY || - sscreen->b.debug_flags & DBG_PRECOMPILE) { - struct si_shader_ctx_state state = {sel}; - union si_shader_key key; - - memset(&key, 0, sizeof(key)); - si_parse_next_shader_property(&sel->info, &key); - - /* Set reasonable defaults, so that the shader key doesn't - * cause any code to be eliminated. - */ - switch (sel->type) { - case PIPE_SHADER_TESS_CTRL: - key.tcs.epilog.prim_mode = PIPE_PRIM_TRIANGLES; - break; - case PIPE_SHADER_FRAGMENT: - key.ps.epilog.alpha_func = PIPE_FUNC_ALWAYS; - for (i = 0; i < 8; i++) - if (sel->info.colors_written & (1 << i)) - key.ps.epilog.spi_shader_col_format |= - V_028710_SPI_SHADER_FP16_ABGR << (i * 4); - break; - } + pipe_mutex_init(sel->mutex); + util_queue_fence_init(&sel->ready); - if (si_shader_select_with_key(ctx, &state, &key)) - goto error; - } + if ((sctx->b.debug.debug_message && !sctx->b.debug.async) || + sctx->is_debug || + r600_can_dump_shader(&sscreen->b, sel->info.processor) || + !util_queue_is_initialized(&sscreen->shader_compiler_queue)) + si_init_shader_selector_async(sel, -1); + else + util_queue_add_job(&sscreen->shader_compiler_queue, sel, + &sel->ready, si_init_shader_selector_async, + NULL); - pipe_mutex_init(sel->mutex); return sel; - -error: - fprintf(stderr, "radeonsi: can't create a shader\n"); - tgsi_free_tokens(sel->tokens); - FREE(sel); - return NULL; } static void si_bind_vs_shader(struct pipe_context *ctx, void *state) @@ -1255,6 +1664,7 @@ sctx->vs_shader.cso = sel; sctx->vs_shader.current = sel ? sel->first_variant : NULL; + sctx->do_update_shaders = true; si_mark_atom_dirty(sctx, &sctx->clip_regs); r600_update_vs_writes_viewport_index(&sctx->b, si_get_vs_info(sctx)); } @@ -1270,6 +1680,7 @@ sctx->gs_shader.cso = sel; sctx->gs_shader.current = sel ? sel->first_variant : NULL; + sctx->do_update_shaders = true; si_mark_atom_dirty(sctx, &sctx->clip_regs); sctx->last_rast_prim = -1; /* reset this so that it gets updated */ @@ -1289,6 +1700,7 @@ sctx->tcs_shader.cso = sel; sctx->tcs_shader.current = sel ? sel->first_variant : NULL; + sctx->do_update_shaders = true; if (enable_changed) sctx->last_tcs = NULL; /* invalidate derived tess state */ @@ -1305,6 +1717,7 @@ sctx->tes_shader.cso = sel; sctx->tes_shader.current = sel ? sel->first_variant : NULL; + sctx->do_update_shaders = true; si_mark_atom_dirty(sctx, &sctx->clip_regs); sctx->last_rast_prim = -1; /* reset this so that it gets updated */ @@ -1326,17 +1739,23 @@ sctx->ps_shader.cso = sel; sctx->ps_shader.current = sel ? sel->first_variant : NULL; + sctx->do_update_shaders = true; si_mark_atom_dirty(sctx, &sctx->cb_render_state); } static void si_delete_shader(struct si_context *sctx, struct si_shader *shader) { + if (shader->is_optimized) { + util_queue_job_wait(&shader->optimized_ready); + util_queue_fence_destroy(&shader->optimized_ready); + } + if (shader->pm4) { switch (shader->selector->type) { case PIPE_SHADER_VERTEX: - if (shader->key.vs.as_ls) + if (shader->key.as_ls) si_pm4_delete_state(sctx, ls, shader->pm4); - else if (shader->key.vs.as_es) + else if (shader->key.as_es) si_pm4_delete_state(sctx, es, shader->pm4); else si_pm4_delete_state(sctx, vs, shader->pm4); @@ -1345,14 +1764,16 @@ si_pm4_delete_state(sctx, hs, shader->pm4); break; case PIPE_SHADER_TESS_EVAL: - if (shader->key.tes.as_es) + if (shader->key.as_es) si_pm4_delete_state(sctx, es, shader->pm4); else si_pm4_delete_state(sctx, vs, shader->pm4); break; case PIPE_SHADER_GEOMETRY: - si_pm4_delete_state(sctx, gs, shader->pm4); - si_pm4_delete_state(sctx, vs, shader->gs_copy_shader->pm4); + if (shader->is_gs_copy_shader) + si_pm4_delete_state(sctx, vs, shader->pm4); + else + si_pm4_delete_state(sctx, gs, shader->pm4); break; case PIPE_SHADER_FRAGMENT: si_pm4_delete_state(sctx, ps, shader->pm4); @@ -1377,6 +1798,8 @@ [PIPE_SHADER_FRAGMENT] = &sctx->ps_shader, }; + util_queue_job_wait(&sel->ready); + if (current_shader[sel->type]->cso == sel) { current_shader[sel->type]->cso = NULL; current_shader[sel->type]->current = NULL; @@ -1390,7 +1813,10 @@ if (sel->main_shader_part) si_delete_shader(sctx, sel->main_shader_part); + if (sel->gs_copy_shader) + si_delete_shader(sctx, sel->gs_copy_shader); + util_queue_fence_destroy(&sel->ready); pipe_mutex_destroy(sel->mutex); free(sel->tokens); free(sel); @@ -1401,7 +1827,7 @@ unsigned index, unsigned interpolate) { struct tgsi_shader_info *vsinfo = &vs->selector->info; - unsigned j, ps_input_cntl = 0; + unsigned j, offset, ps_input_cntl = 0; if (interpolate == TGSI_INTERPOLATE_CONSTANT || (interpolate == TGSI_INTERPOLATE_COLOR && sctx->flatshade)) @@ -1416,7 +1842,25 @@ for (j = 0; j < vsinfo->num_outputs; j++) { if (name == vsinfo->output_semantic_name[j] && index == vsinfo->output_semantic_index[j]) { - ps_input_cntl |= S_028644_OFFSET(vs->info.vs_output_param_offset[j]); + offset = vs->info.vs_output_param_offset[j]; + + if (offset <= EXP_PARAM_OFFSET_31) { + /* The input is loaded from parameter memory. */ + ps_input_cntl |= S_028644_OFFSET(offset); + } else if (!G_028644_PT_SPRITE_TEX(ps_input_cntl)) { + if (offset == EXP_PARAM_UNDEFINED) { + /* This can happen with depth-only rendering. */ + offset = 0; + } else { + /* The input is a DEFAULT_VAL constant. */ + assert(offset >= EXP_PARAM_DEFAULT_VAL_0000 && + offset <= EXP_PARAM_DEFAULT_VAL_1111); + offset -= EXP_PARAM_DEFAULT_VAL_0000; + } + + ps_input_cntl = S_028644_OFFSET(0x20) | + S_028644_DEFAULT_VAL(offset); + } break; } } @@ -1466,7 +1910,7 @@ } } - if (ps->key.ps.prolog.color_two_side) { + if (ps->key.part.ps.prolog.color_two_side) { unsigned bcol = TGSI_SEMANTIC_BCOLOR; for (i = 0; i < 2; i++) { @@ -1489,6 +1933,12 @@ if (sctx->init_config_has_vgt_flush) return; + /* Done by Vulkan before VGT_FLUSH. */ + si_pm4_cmd_begin(sctx->init_config, PKT3_EVENT_WRITE); + si_pm4_cmd_add(sctx->init_config, + EVENT_TYPE(V_028A90_VS_PARTIAL_FLUSH) | EVENT_INDEX(4)); + si_pm4_cmd_end(sctx->init_config, false); + /* VGT_FLUSH is required even if VGT is idle. It resets VGT pointers. */ si_pm4_cmd_begin(sctx->init_config, PKT3_EVENT_WRITE); si_pm4_cmd_add(sctx->init_config, EVENT_TYPE(V_028A90_VGT_FLUSH) | EVENT_INDEX(0)); @@ -1508,7 +1958,10 @@ unsigned num_se = sctx->screen->b.info.max_se; unsigned wave_size = 64; unsigned max_gs_waves = 32 * num_se; /* max 32 per SE on GCN */ - unsigned gs_vertex_reuse = 16 * num_se; /* GS_VERTEX_REUSE register (per SE) */ + /* On SI-CI, the value comes from VGT_GS_VERTEX_REUSE = 16. + * On VI+, the value comes from VGT_VERTEX_REUSE_BLOCK_CNTL = 30 (+2). + */ + unsigned gs_vertex_reuse = (sctx->b.chip_class >= VI ? 32 : 16) * num_se; unsigned alignment = 256 * num_se; /* The maximum size is 63.999 MB per SE. */ unsigned max_size = ((unsigned)(63.999 * 1024 * 1024) & ~255) * num_se; @@ -1521,7 +1974,7 @@ unsigned esgs_ring_size = max_gs_waves * 2 * wave_size * es->esgs_itemsize * gs->gs_input_verts_per_prim; unsigned gsvs_ring_size = max_gs_waves * 2 * wave_size * - gs->max_gsvs_emit_size * (gs->max_gs_stream + 1); + gs->max_gsvs_emit_size; min_esgs_ring_size = align(min_esgs_ring_size, alignment); esgs_ring_size = align(esgs_ring_size, alignment); @@ -1545,7 +1998,7 @@ if (update_esgs) { pipe_resource_reference(&sctx->esgs_ring, NULL); - sctx->esgs_ring = pipe_buffer_create(sctx->b.b.screen, PIPE_BIND_CUSTOM, + sctx->esgs_ring = pipe_buffer_create(sctx->b.b.screen, 0, PIPE_USAGE_DEFAULT, esgs_ring_size); if (!sctx->esgs_ring) @@ -1554,7 +2007,7 @@ if (update_gsvs) { pipe_resource_reference(&sctx->gsvs_ring, NULL); - sctx->gsvs_ring = pipe_buffer_create(sctx->b.b.screen, PIPE_BIND_CUSTOM, + sctx->gsvs_ring = pipe_buffer_create(sctx->b.b.screen, 0, PIPE_USAGE_DEFAULT, gsvs_ring_size); if (!sctx->gsvs_ring) @@ -1605,41 +2058,13 @@ sctx->esgs_ring, 0, sctx->esgs_ring->width0, false, false, 0, 0, 0); } - if (sctx->gsvs_ring) - si_set_ring_buffer(&sctx->b.b, SI_VS_RING_GSVS, + if (sctx->gsvs_ring) { + si_set_ring_buffer(&sctx->b.b, SI_RING_GSVS, sctx->gsvs_ring, 0, sctx->gsvs_ring->width0, false, false, 0, 0, 0); - return true; -} - -static void si_update_gsvs_ring_bindings(struct si_context *sctx) -{ - unsigned gsvs_itemsize = sctx->gs_shader.cso->max_gsvs_emit_size; - uint64_t offset; - - if (!sctx->gsvs_ring || gsvs_itemsize == sctx->last_gsvs_itemsize) - return; - - sctx->last_gsvs_itemsize = gsvs_itemsize; + } - si_set_ring_buffer(&sctx->b.b, SI_GS_RING_GSVS0, - sctx->gsvs_ring, gsvs_itemsize, - 64, true, true, 4, 16, 0); - - offset = gsvs_itemsize * 64; - si_set_ring_buffer(&sctx->b.b, SI_GS_RING_GSVS1, - sctx->gsvs_ring, gsvs_itemsize, - 64, true, true, 4, 16, offset); - - offset = (gsvs_itemsize * 2) * 64; - si_set_ring_buffer(&sctx->b.b, SI_GS_RING_GSVS2, - sctx->gsvs_ring, gsvs_itemsize, - 64, true, true, 4, 16, offset); - - offset = (gsvs_itemsize * 3) * 64; - si_set_ring_buffer(&sctx->b.b, SI_GS_RING_GSVS3, - sctx->gsvs_ring, gsvs_itemsize, - 64, true, true, 4, 16, offset); + return true; } /** @@ -1718,12 +2143,10 @@ if (scratch_needed_size > 0) { if (scratch_needed_size > current_scratch_buffer_size) { /* Create a bigger scratch buffer */ - pipe_resource_reference( - (struct pipe_resource**)&sctx->scratch_buffer, - NULL); + r600_resource_reference(&sctx->scratch_buffer, NULL); - sctx->scratch_buffer = - si_resource_create_custom(&sctx->screen->b.b, + sctx->scratch_buffer = (struct r600_resource*) + pipe_buffer_create(&sctx->screen->b.b, 0, PIPE_USAGE_DEFAULT, scratch_needed_size); if (!sctx->scratch_buffer) return false; @@ -1793,10 +2216,41 @@ static void si_init_tess_factor_ring(struct si_context *sctx) { - unsigned offchip_blocks = sctx->b.chip_class >= CIK ? 256 : 64; - assert(!sctx->tf_ring); + bool double_offchip_buffers = sctx->b.chip_class >= CIK && + sctx->b.family != CHIP_CARRIZO && + sctx->b.family != CHIP_STONEY; + unsigned max_offchip_buffers_per_se = double_offchip_buffers ? 128 : 64; + unsigned max_offchip_buffers = max_offchip_buffers_per_se * + sctx->screen->b.info.max_se; + unsigned offchip_granularity; - sctx->tf_ring = pipe_buffer_create(sctx->b.b.screen, PIPE_BIND_CUSTOM, + switch (sctx->screen->tess_offchip_block_dw_size) { + default: + assert(0); + /* fall through */ + case 8192: + offchip_granularity = V_03093C_X_8K_DWORDS; + break; + case 4096: + offchip_granularity = V_03093C_X_4K_DWORDS; + break; + } + + switch (sctx->b.chip_class) { + case SI: + max_offchip_buffers = MIN2(max_offchip_buffers, 126); + break; + case CIK: + max_offchip_buffers = MIN2(max_offchip_buffers, 508); + break; + case VI: + default: + max_offchip_buffers = MIN2(max_offchip_buffers, 512); + break; + } + + assert(!sctx->tf_ring); + sctx->tf_ring = pipe_buffer_create(sctx->b.b.screen, 0, PIPE_USAGE_DEFAULT, 32768 * sctx->screen->b.info.max_se); if (!sctx->tf_ring) @@ -1804,11 +2258,10 @@ assert(((sctx->tf_ring->width0 / 4) & C_030938_SIZE) == 0); - sctx->tess_offchip_ring = pipe_buffer_create(sctx->b.b.screen, - PIPE_BIND_CUSTOM, + sctx->tess_offchip_ring = pipe_buffer_create(sctx->b.b.screen, 0, PIPE_USAGE_DEFAULT, - offchip_blocks * - SI_TESS_OFFCHIP_BLOCK_SIZE); + max_offchip_buffers * + sctx->screen->tess_offchip_block_dw_size * 4); if (!sctx->tess_offchip_ring) return; @@ -1816,24 +2269,24 @@ /* Append these registers to the init config state. */ if (sctx->b.chip_class >= CIK) { - unsigned offchip_buffering = offchip_blocks; - if(sctx->b.chip_class >= VI) - --offchip_buffering; + if (sctx->b.chip_class >= VI) + --max_offchip_buffers; si_pm4_set_reg(sctx->init_config, R_030938_VGT_TF_RING_SIZE, S_030938_SIZE(sctx->tf_ring->width0 / 4)); si_pm4_set_reg(sctx->init_config, R_030940_VGT_TF_MEMORY_BASE, r600_resource(sctx->tf_ring)->gpu_address >> 8); si_pm4_set_reg(sctx->init_config, R_03093C_VGT_HS_OFFCHIP_PARAM, - S_03093C_OFFCHIP_BUFFERING(offchip_buffering) | - S_03093C_OFFCHIP_GRANULARITY(V_03093C_X_8K_DWORDS)); + S_03093C_OFFCHIP_BUFFERING(max_offchip_buffers) | + S_03093C_OFFCHIP_GRANULARITY(offchip_granularity)); } else { + assert(offchip_granularity == V_03093C_X_8K_DWORDS); si_pm4_set_reg(sctx->init_config, R_008988_VGT_TF_RING_SIZE, S_008988_SIZE(sctx->tf_ring->width0 / 4)); si_pm4_set_reg(sctx->init_config, R_0089B8_VGT_TF_MEMORY_BASE, r600_resource(sctx->tf_ring)->gpu_address >> 8); si_pm4_set_reg(sctx->init_config, R_0089B0_VGT_HS_OFFCHIP_PARAM, - S_0089B0_OFFCHIP_BUFFERING(offchip_blocks)); + S_0089B0_OFFCHIP_BUFFERING(max_offchip_buffers)); } /* Flush the context to re-emit the init_config state. @@ -1931,9 +2384,16 @@ bool si_update_shaders(struct si_context *sctx) { struct pipe_context *ctx = (struct pipe_context*)sctx; + struct si_compiler_ctx_state compiler_state; struct si_state_rasterizer *rs = sctx->queued.named.rasterizer; + struct si_shader *old_vs = si_get_vs_state(sctx); + bool old_clip_disable = old_vs ? old_vs->key.opt.hw_vs.clip_disable : false; int r; + compiler_state.tm = sctx->tm; + compiler_state.debug = sctx->b.debug; + compiler_state.is_debug_context = sctx->is_debug; + /* Update stages before GS. */ if (sctx->tes_shader.cso) { if (!sctx->tf_ring) { @@ -1943,13 +2403,14 @@ } /* VS as LS */ - r = si_shader_select(ctx, &sctx->vs_shader); + r = si_shader_select(ctx, &sctx->vs_shader, &compiler_state); if (r) return false; si_pm4_bind_state(sctx, ls, sctx->vs_shader.current->pm4); if (sctx->tcs_shader.cso) { - r = si_shader_select(ctx, &sctx->tcs_shader); + r = si_shader_select(ctx, &sctx->tcs_shader, + &compiler_state); if (r) return false; si_pm4_bind_state(sctx, hs, sctx->tcs_shader.current->pm4); @@ -1960,14 +2421,15 @@ return false; } - r = si_shader_select(ctx, &sctx->fixed_func_tcs_shader); + r = si_shader_select(ctx, &sctx->fixed_func_tcs_shader, + &compiler_state); if (r) return false; si_pm4_bind_state(sctx, hs, sctx->fixed_func_tcs_shader.current->pm4); } - r = si_shader_select(ctx, &sctx->tes_shader); + r = si_shader_select(ctx, &sctx->tes_shader, &compiler_state); if (r) return false; @@ -1981,13 +2443,13 @@ } } else if (sctx->gs_shader.cso) { /* VS as ES */ - r = si_shader_select(ctx, &sctx->vs_shader); + r = si_shader_select(ctx, &sctx->vs_shader, &compiler_state); if (r) return false; si_pm4_bind_state(sctx, es, sctx->vs_shader.current->pm4); } else { /* VS as VS */ - r = si_shader_select(ctx, &sctx->vs_shader); + r = si_shader_select(ctx, &sctx->vs_shader, &compiler_state); if (r) return false; si_pm4_bind_state(sctx, vs, sctx->vs_shader.current->pm4); @@ -1996,17 +2458,15 @@ /* Update GS. */ if (sctx->gs_shader.cso) { - r = si_shader_select(ctx, &sctx->gs_shader); + r = si_shader_select(ctx, &sctx->gs_shader, &compiler_state); if (r) return false; si_pm4_bind_state(sctx, gs, sctx->gs_shader.current->pm4); - si_pm4_bind_state(sctx, vs, sctx->gs_shader.current->gs_copy_shader->pm4); + si_pm4_bind_state(sctx, vs, sctx->gs_shader.cso->gs_copy_shader->pm4); si_update_so(sctx, sctx->gs_shader.cso); if (!si_update_gs_ring_buffers(sctx)) return false; - - si_update_gsvs_ring_bindings(sctx); } else { si_pm4_bind_state(sctx, gs, NULL); si_pm4_bind_state(sctx, es, NULL); @@ -2014,18 +2474,20 @@ si_update_vgt_shader_config(sctx); + if (old_clip_disable != si_get_vs_state(sctx)->key.opt.hw_vs.clip_disable) + si_mark_atom_dirty(sctx, &sctx->clip_regs); + if (sctx->ps_shader.cso) { unsigned db_shader_control; - r = si_shader_select(ctx, &sctx->ps_shader); + r = si_shader_select(ctx, &sctx->ps_shader, &compiler_state); if (r) return false; si_pm4_bind_state(sctx, ps, sctx->ps_shader.current->pm4); db_shader_control = sctx->ps_shader.cso->db_shader_control | - S_02880C_KILL_ENABLE(si_get_alpha_test_func(sctx) != PIPE_FUNC_ALWAYS) | - S_02880C_Z_ORDER(sctx->ps_shader.current->z_order); + S_02880C_KILL_ENABLE(si_get_alpha_test_func(sctx) != PIPE_FUNC_ALWAYS); if (si_pm4_state_changed(sctx, ps) || si_pm4_state_changed(sctx, vs) || sctx->sprite_coord_enable != rs->sprite_coord_enable || @@ -2043,8 +2505,8 @@ si_mark_atom_dirty(sctx, &sctx->db_render_state); } - if (sctx->smoothing_enabled != sctx->ps_shader.current->key.ps.epilog.poly_line_smoothing) { - sctx->smoothing_enabled = sctx->ps_shader.current->key.ps.epilog.poly_line_smoothing; + if (sctx->smoothing_enabled != sctx->ps_shader.current->key.part.ps.epilog.poly_line_smoothing) { + sctx->smoothing_enabled = sctx->ps_shader.current->key.part.ps.epilog.poly_line_smoothing; si_mark_atom_dirty(sctx, &sctx->msaa_config); if (sctx->b.chip_class == SI) @@ -2064,6 +2526,8 @@ if (!si_update_spi_tmpring_size(sctx)) return false; } + + sctx->do_update_shaders = false; return true; } diff -Nru mesa-12.0.6/src/gallium/drivers/radeonsi/si_uvd.c mesa-17.0.7/src/gallium/drivers/radeonsi/si_uvd.c --- mesa-12.0.6/src/gallium/drivers/radeonsi/si_uvd.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/radeonsi/si_uvd.c 2017-06-01 10:37:10.000000000 +0000 @@ -113,7 +113,7 @@ error: for (i = 0; i < VL_NUM_COMPONENTS; ++i) - pipe_resource_reference((struct pipe_resource **)&resources[i], NULL); + r600_texture_reference(&resources[i], NULL); return NULL; } diff -Nru mesa-12.0.6/src/gallium/drivers/rbug/Makefile.in mesa-17.0.7/src/gallium/drivers/rbug/Makefile.in --- mesa-12.0.6/src/gallium/drivers/rbug/Makefile.in 2017-01-24 01:41:47.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/rbug/Makefile.in 2017-06-01 10:37:20.000000000 +0000 @@ -111,10 +111,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -215,6 +218,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -229,6 +234,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -258,10 +264,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -311,11 +318,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -355,8 +359,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -393,8 +395,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -403,7 +403,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -411,13 +410,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -446,6 +446,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -565,12 +566,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -582,7 +579,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ $(GALLIUM_DRIVER_CFLAGS) diff -Nru mesa-12.0.6/src/gallium/drivers/rbug/rbug_context.c mesa-17.0.7/src/gallium/drivers/rbug/rbug_context.c --- mesa-12.0.6/src/gallium/drivers/rbug/rbug_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/rbug/rbug_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -284,7 +284,8 @@ } static void -rbug_bind_sampler_states(struct pipe_context *_pipe, unsigned shader, +rbug_bind_sampler_states(struct pipe_context *_pipe, + enum pipe_shader_type shader, unsigned start, unsigned count, void **samplers) { @@ -624,7 +625,7 @@ rbug_set_constant_buffer(struct pipe_context *_pipe, uint shader, uint index, - struct pipe_constant_buffer *_cb) + const struct pipe_constant_buffer *_cb) { struct rbug_context *rb_pipe = rbug_context(_pipe); struct pipe_context *pipe = rb_pipe->pipe; @@ -726,7 +727,7 @@ static void rbug_set_sampler_views(struct pipe_context *_pipe, - unsigned shader, + enum pipe_shader_type shader, unsigned start, unsigned num, struct pipe_sampler_view **_views) @@ -952,7 +953,8 @@ struct pipe_surface *_dst, const union pipe_color_union *color, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct rbug_context *rb_pipe = rbug_context(_pipe); struct rbug_surface *rb_surface_dst = rbug_surface(_dst); @@ -966,7 +968,8 @@ dstx, dsty, width, - height); + height, + render_condition_enabled); pipe_mutex_unlock(rb_pipe->call_mutex); } @@ -977,7 +980,8 @@ double depth, unsigned stencil, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct rbug_context *rb_pipe = rbug_context(_pipe); struct rbug_surface *rb_surface_dst = rbug_surface(_dst); @@ -993,7 +997,8 @@ dstx, dsty, width, - height); + height, + render_condition_enabled); pipe_mutex_unlock(rb_pipe->call_mutex); } @@ -1141,14 +1146,31 @@ static void -rbug_context_transfer_inline_write(struct pipe_context *_context, - struct pipe_resource *_resource, - unsigned level, - unsigned usage, - const struct pipe_box *box, - const void *data, - unsigned stride, - unsigned layer_stride) +rbug_context_buffer_subdata(struct pipe_context *_context, + struct pipe_resource *_resource, + unsigned usage, unsigned offset, + unsigned size, const void *data) +{ + struct rbug_context *rb_pipe = rbug_context(_context); + struct rbug_resource *rb_resource = rbug_resource(_resource); + struct pipe_context *context = rb_pipe->pipe; + struct pipe_resource *resource = rb_resource->resource; + + pipe_mutex_lock(rb_pipe->call_mutex); + context->buffer_subdata(context, resource, usage, offset, size, data); + pipe_mutex_unlock(rb_pipe->call_mutex); +} + + +static void +rbug_context_texture_subdata(struct pipe_context *_context, + struct pipe_resource *_resource, + unsigned level, + unsigned usage, + const struct pipe_box *box, + const void *data, + unsigned stride, + unsigned layer_stride) { struct rbug_context *rb_pipe = rbug_context(_context); struct rbug_resource *rb_resource = rbug_resource(_resource); @@ -1156,14 +1178,14 @@ struct pipe_resource *resource = rb_resource->resource; pipe_mutex_lock(rb_pipe->call_mutex); - context->transfer_inline_write(context, - resource, - level, - usage, - box, - data, - stride, - layer_stride); + context->texture_subdata(context, + resource, + level, + usage, + box, + data, + stride, + layer_stride); pipe_mutex_unlock(rb_pipe->call_mutex); } @@ -1252,7 +1274,8 @@ rb_pipe->base.transfer_map = rbug_context_transfer_map; rb_pipe->base.transfer_unmap = rbug_context_transfer_unmap; rb_pipe->base.transfer_flush_region = rbug_context_transfer_flush_region; - rb_pipe->base.transfer_inline_write = rbug_context_transfer_inline_write; + rb_pipe->base.buffer_subdata = rbug_context_buffer_subdata; + rb_pipe->base.texture_subdata = rbug_context_texture_subdata; rb_pipe->pipe = pipe; diff -Nru mesa-12.0.6/src/gallium/drivers/rbug/rbug_screen.c mesa-17.0.7/src/gallium/drivers/rbug/rbug_screen.c --- mesa-12.0.6/src/gallium/drivers/rbug/rbug_screen.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/rbug/rbug_screen.c 2017-06-01 10:37:10.000000000 +0000 @@ -176,16 +176,19 @@ static boolean rbug_screen_resource_get_handle(struct pipe_screen *_screen, + struct pipe_context *_pipe, struct pipe_resource *_resource, struct winsys_handle *handle, unsigned usage) { struct rbug_screen *rb_screen = rbug_screen(_screen); + struct rbug_context *rb_pipe = rbug_context(_pipe); struct rbug_resource *rb_resource = rbug_resource(_resource); struct pipe_screen *screen = rb_screen->screen; struct pipe_resource *resource = rb_resource->resource; - return screen->resource_get_handle(screen, resource, handle, usage); + return screen->resource_get_handle(screen, rb_pipe ? rb_pipe->pipe : NULL, + resource, handle, usage); } @@ -229,15 +232,15 @@ static boolean rbug_screen_fence_finish(struct pipe_screen *_screen, + struct pipe_context *_ctx, struct pipe_fence_handle *fence, uint64_t timeout) { struct rbug_screen *rb_screen = rbug_screen(_screen); struct pipe_screen *screen = rb_screen->screen; + struct pipe_context *ctx = _ctx ? rbug_context(_ctx)->pipe : NULL; - return screen->fence_finish(screen, - fence, - timeout); + return screen->fence_finish(screen, ctx, fence, timeout); } boolean diff -Nru mesa-12.0.6/src/gallium/drivers/softpipe/Makefile.in mesa-17.0.7/src/gallium/drivers/softpipe/Makefile.in --- mesa-12.0.6/src/gallium/drivers/softpipe/Makefile.in 2017-01-24 01:41:47.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/softpipe/Makefile.in 2017-06-01 10:37:20.000000000 +0000 @@ -111,10 +111,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -223,6 +226,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -237,6 +242,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -266,10 +272,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -319,11 +326,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -363,8 +367,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -401,8 +403,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -411,7 +411,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -419,13 +418,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -454,6 +454,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -620,12 +621,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -637,7 +634,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ $(GALLIUM_DRIVER_CFLAGS) \ $(MSVC2013_COMPAT_CFLAGS) diff -Nru mesa-12.0.6/src/gallium/drivers/softpipe/sp_fence.c mesa-17.0.7/src/gallium/drivers/softpipe/sp_fence.c --- mesa-12.0.6/src/gallium/drivers/softpipe/sp_fence.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/softpipe/sp_fence.c 2017-06-01 10:37:10.000000000 +0000 @@ -42,6 +42,7 @@ static boolean softpipe_fence_finish(struct pipe_screen *screen, + struct pipe_context *ctx, struct pipe_fence_handle *fence, uint64_t timeout) { diff -Nru mesa-12.0.6/src/gallium/drivers/softpipe/sp_flush.c mesa-17.0.7/src/gallium/drivers/softpipe/sp_flush.c --- mesa-12.0.6/src/gallium/drivers/softpipe/sp_flush.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/softpipe/sp_flush.c 2017-06-01 10:37:10.000000000 +0000 @@ -153,7 +153,7 @@ * This is for illustrative purposes only, as softpipe does not * have fences. */ - pipe->screen->fence_finish(pipe->screen, fence, + pipe->screen->fence_finish(pipe->screen, NULL, fence, PIPE_TIMEOUT_INFINITE); pipe->screen->fence_reference(pipe->screen, &fence, NULL); } @@ -169,7 +169,7 @@ return TRUE; } -void softpipe_texture_barrier(struct pipe_context *pipe) +void softpipe_texture_barrier(struct pipe_context *pipe, unsigned flags) { struct softpipe_context *softpipe = softpipe_context(pipe); uint i, sh; @@ -192,5 +192,5 @@ void softpipe_memory_barrier(struct pipe_context *pipe, unsigned flags) { - softpipe_texture_barrier(pipe); + softpipe_texture_barrier(pipe, 0); } diff -Nru mesa-12.0.6/src/gallium/drivers/softpipe/sp_flush.h mesa-17.0.7/src/gallium/drivers/softpipe/sp_flush.h --- mesa-12.0.6/src/gallium/drivers/softpipe/sp_flush.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/softpipe/sp_flush.h 2017-06-01 10:37:10.000000000 +0000 @@ -55,6 +55,6 @@ boolean cpu_access, boolean do_not_block); -void softpipe_texture_barrier(struct pipe_context *pipe); +void softpipe_texture_barrier(struct pipe_context *pipe, unsigned flags); void softpipe_memory_barrier(struct pipe_context *pipe, unsigned flags); #endif diff -Nru mesa-12.0.6/src/gallium/drivers/softpipe/sp_image.c mesa-17.0.7/src/gallium/drivers/softpipe/sp_image.c --- mesa-12.0.6/src/gallium/drivers/softpipe/sp_image.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/softpipe/sp_image.c 2017-06-01 10:37:10.000000000 +0000 @@ -39,7 +39,7 @@ int base_layer = 0; if (spr->base.target == PIPE_BUFFER) - return iview->u.buf.first_element * util_format_get_blocksize(format); + return iview->u.buf.offset; if (spr->base.target == PIPE_TEXTURE_1D_ARRAY || spr->base.target == PIPE_TEXTURE_2D_ARRAY || @@ -153,7 +153,7 @@ unsigned *depth) { if (tgsi_tex_instr == TGSI_TEXTURE_BUFFER) { - *width = iview->u.buf.last_element - iview->u.buf.first_element + 1; + *width = iview->u.buf.size / util_format_get_blocksize(pformat); *height = 1; *depth = 1; /* @@ -752,7 +752,7 @@ return; if (params->tgsi_tex_instr == TGSI_TEXTURE_BUFFER) { - dims[0] = iview->u.buf.last_element - iview->u.buf.first_element + 1; + dims[0] = iview->u.buf.size / util_format_get_blocksize(iview->format); dims[1] = dims[2] = dims[3] = 0; return; } diff -Nru mesa-12.0.6/src/gallium/drivers/softpipe/sp_screen.c mesa-17.0.7/src/gallium/drivers/softpipe/sp_screen.c --- mesa-12.0.6/src/gallium/drivers/softpipe/sp_screen.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/softpipe/sp_screen.c 2017-06-01 10:37:10.000000000 +0000 @@ -67,6 +67,7 @@ switch (param) { case PIPE_CAP_NPOT_TEXTURES: case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES: + case PIPE_CAP_MIXED_COLOR_DEPTH_BITS: return 1; case PIPE_CAP_TWO_SIDED_STENCIL: return 1; @@ -162,6 +163,7 @@ case PIPE_CAP_USER_INDEX_BUFFERS: case PIPE_CAP_USER_CONSTANT_BUFFERS: case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME: + case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS: case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT: return 1; case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: @@ -229,6 +231,12 @@ if (!os_get_total_physical_memory(&system_memory)) return 0; + if (sizeof(void *) == 4) + /* Cap to 2 GB on 32 bits system. We do this because softpipe does + * eat application memory, which is quite limited on 32 bits. App + * shouldn't expect too much available memory. */ + system_memory = MIN2(system_memory, 2048 << 20); + return (int)(system_memory >> 20); } case PIPE_CAP_UMA: @@ -246,6 +254,9 @@ return 0; case PIPE_CAP_POLYGON_OFFSET_CLAMP: return 0; + case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS: + case PIPE_CAP_TGSI_ARRAY_COMPONENTS: + return 1; case PIPE_CAP_MULTISAMPLE_Z_RESOLVE: case PIPE_CAP_RESOURCE_FROM_USER_MEMORY: case PIPE_CAP_DEVICE_RESET_STATUS_QUERY: @@ -254,7 +265,6 @@ case PIPE_CAP_TGSI_TXQS: case PIPE_CAP_FORCE_PERSAMPLE_INTERP: case PIPE_CAP_SHAREABLE_SHADERS: - case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS: case PIPE_CAP_CLEAR_TEXTURE: case PIPE_CAP_DRAW_PARAMETERS: case PIPE_CAP_TGSI_PACK_HALF_FLOAT: @@ -274,6 +284,14 @@ case PIPE_CAP_PCI_FUNCTION: case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR: case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES: + case PIPE_CAP_TGSI_VOTE: + case PIPE_CAP_MAX_WINDOW_RECTANGLES: + case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED: + case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS: + case PIPE_CAP_TGSI_CAN_READ_OUTPUTS: + case PIPE_CAP_NATIVE_FENCE_FD: + case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY: + case PIPE_CAP_TGSI_FS_FBFETCH: return 0; case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT: return 4; @@ -395,6 +413,24 @@ return FALSE; } + if ((bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_SAMPLER_VIEW)) && + ((bind & PIPE_BIND_DISPLAY_TARGET) == 0) && + target != PIPE_BUFFER) { + const struct util_format_description *desc = + util_format_description(format); + if (desc->nr_channels == 3 && desc->is_array) { + /* Don't support any 3-component formats for rendering/texturing + * since we don't support the corresponding 8-bit 3 channel UNORM + * formats. This allows us to support GL_ARB_copy_image between + * GL_RGB8 and GL_RGB8UI, for example. Otherwise, we may be asked to + * do a resource copy between PIPE_FORMAT_R8G8B8_UINT and + * PIPE_FORMAT_R8G8B8X8_UNORM, for example, which will not work + * (different bpp). + */ + return FALSE; + } + } + if (format_desc->layout == UTIL_FORMAT_LAYOUT_ETC && format != PIPE_FORMAT_ETC1_RGB8) return FALSE; @@ -497,6 +533,8 @@ case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS: case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED: case PIPE_COMPUTE_CAP_SUBGROUP_SIZE: + case PIPE_COMPUTE_CAP_ADDRESS_BITS: + case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK: break; } return 0; diff -Nru mesa-12.0.6/src/gallium/drivers/softpipe/sp_state_derived.c mesa-17.0.7/src/gallium/drivers/softpipe/sp_state_derived.c --- mesa-12.0.6/src/gallium/drivers/softpipe/sp_state_derived.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/softpipe/sp_state_derived.c 2017-06-01 10:37:10.000000000 +0000 @@ -176,14 +176,14 @@ /* * Note that we'd actually want to skip position (as we won't use * the attribute in the fs) but can't. The reason is that we don't - * actually have a input/output map for setup (even though it looks + * actually have an input/output map for setup (even though it looks * like we do...). Could adjust for this though even without a map. */ } else { /* * Note that we'd actually want to skip position (as we won't use * the attribute in the fs) but can't. The reason is that we don't - * actually have a input/output map for setup (even though it looks + * actually have an input/output map for setup (even though it looks * like we do...). Could adjust for this though even without a map. */ draw_emit_vertex_attr(vinfo, EMIT_4F, vs_index); diff -Nru mesa-12.0.6/src/gallium/drivers/softpipe/sp_state.h mesa-17.0.7/src/gallium/drivers/softpipe/sp_state.h --- mesa-12.0.6/src/gallium/drivers/softpipe/sp_state.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/softpipe/sp_state.h 2017-06-01 10:37:10.000000000 +0000 @@ -172,7 +172,7 @@ void softpipe_set_sampler_views(struct pipe_context *pipe, - unsigned shader, + enum pipe_shader_type shader, unsigned start, unsigned num, struct pipe_sampler_view **views); diff -Nru mesa-12.0.6/src/gallium/drivers/softpipe/sp_state_image.c mesa-17.0.7/src/gallium/drivers/softpipe/sp_state_image.c --- mesa-12.0.6/src/gallium/drivers/softpipe/sp_state_image.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/softpipe/sp_state_image.c 2017-06-01 10:37:10.000000000 +0000 @@ -27,10 +27,10 @@ #include "sp_buffer.h" static void softpipe_set_shader_images(struct pipe_context *pipe, - unsigned shader, + enum pipe_shader_type shader, unsigned start, unsigned num, - struct pipe_image_view *images) + const struct pipe_image_view *images) { struct softpipe_context *softpipe = softpipe_context(pipe); unsigned i; @@ -53,10 +53,10 @@ } static void softpipe_set_shader_buffers(struct pipe_context *pipe, - unsigned shader, + enum pipe_shader_type shader, unsigned start, unsigned num, - struct pipe_shader_buffer *buffers) + const struct pipe_shader_buffer *buffers) { struct softpipe_context *softpipe = softpipe_context(pipe); unsigned i; diff -Nru mesa-12.0.6/src/gallium/drivers/softpipe/sp_state_sampler.c mesa-17.0.7/src/gallium/drivers/softpipe/sp_state_sampler.c --- mesa-12.0.6/src/gallium/drivers/softpipe/sp_state_sampler.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/softpipe/sp_state_sampler.c 2017-06-01 10:37:10.000000000 +0000 @@ -49,7 +49,7 @@ */ static void softpipe_bind_sampler_states(struct pipe_context *pipe, - unsigned shader, + enum pipe_shader_type shader, unsigned start, unsigned num, void **samplers) @@ -97,7 +97,7 @@ void softpipe_set_sampler_views(struct pipe_context *pipe, - unsigned shader, + enum pipe_shader_type shader, unsigned start, unsigned num, struct pipe_sampler_view **views) @@ -240,11 +240,9 @@ img_stride[0] = 0; /* everything specified in number of elements here. */ - width0 = view->u.buf.last_element - view->u.buf.first_element + 1; - addr = (uint8_t *)addr + view->u.buf.first_element * - view_blocksize; - assert(view->u.buf.first_element <= view->u.buf.last_element); - assert(view->u.buf.last_element * view_blocksize < res->width0); + width0 = view->u.buf.size / view_blocksize; + addr = (uint8_t *)addr + view->u.buf.offset; + assert(view->u.buf.offset + view->u.buf.size <= res->width0); } } else { diff -Nru mesa-12.0.6/src/gallium/drivers/softpipe/sp_state_shader.c mesa-17.0.7/src/gallium/drivers/softpipe/sp_state_shader.c --- mesa-12.0.6/src/gallium/drivers/softpipe/sp_state_shader.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/softpipe/sp_state_shader.c 2017-06-01 10:37:10.000000000 +0000 @@ -338,7 +338,7 @@ static void softpipe_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, - struct pipe_constant_buffer *cb) + const struct pipe_constant_buffer *cb) { struct softpipe_context *softpipe = softpipe_context(pipe); struct pipe_resource *constants = cb ? cb->buffer : NULL; @@ -420,7 +420,7 @@ softpipe_delete_compute_state(struct pipe_context *pipe, void *cs) { - struct softpipe_context *softpipe = softpipe_context(pipe); + MAYBE_UNUSED struct softpipe_context *softpipe = softpipe_context(pipe); struct sp_compute_shader *state = (struct sp_compute_shader *)cs; assert(softpipe->cs != state); diff -Nru mesa-12.0.6/src/gallium/drivers/softpipe/sp_surface.c mesa-17.0.7/src/gallium/drivers/softpipe/sp_surface.c --- mesa-12.0.6/src/gallium/drivers/softpipe/sp_surface.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/softpipe/sp_surface.c 2017-06-01 10:37:10.000000000 +0000 @@ -97,11 +97,12 @@ struct pipe_surface *dst, const union pipe_color_union *color, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct softpipe_context *softpipe = softpipe_context(pipe); - if (!softpipe_check_render_cond(softpipe)) + if (render_condition_enabled && !softpipe_check_render_cond(softpipe)) return; util_clear_render_target(pipe, dst, color, @@ -116,11 +117,12 @@ double depth, unsigned stencil, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct softpipe_context *softpipe = softpipe_context(pipe); - if (!softpipe_check_render_cond(softpipe)) + if (render_condition_enabled && !softpipe_check_render_cond(softpipe)) return; util_clear_depth_stencil(pipe, dst, clear_flags, diff -Nru mesa-12.0.6/src/gallium/drivers/softpipe/sp_tex_sample.c mesa-17.0.7/src/gallium/drivers/softpipe/sp_tex_sample.c --- mesa-12.0.6/src/gallium/drivers/softpipe/sp_tex_sample.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/softpipe/sp_tex_sample.c 2017-06-01 10:37:10.000000000 +0000 @@ -3192,7 +3192,7 @@ const struct pipe_resource *texture = view->texture; if (view->target == PIPE_BUFFER) { - dims[0] = (view->u.buf.last_element - view->u.buf.first_element) + 1; + dims[0] = view->u.buf.size / util_format_get_blocksize(view->format); /* the other values are undefined, but let's avoid potential valgrind * warnings. */ @@ -3264,17 +3264,22 @@ const int width = u_minify(texture->width0, level); const int height = u_minify(texture->height0, level); const int depth = u_minify(texture->depth0, level); + unsigned elem_size, first_element, last_element; addr.value = 0; addr.bits.level = level; switch (sp_sview->base.target) { case PIPE_BUFFER: + elem_size = util_format_get_blocksize(sp_sview->base.format); + first_element = sp_sview->base.u.buf.offset / elem_size; + last_element = (sp_sview->base.u.buf.offset + + sp_sview->base.u.buf.size) / elem_size - 1; for (j = 0; j < TGSI_QUAD_SIZE; j++) { const int x = CLAMP(v_i[j] + offset[0] + - sp_sview->base.u.buf.first_element, - sp_sview->base.u.buf.first_element, - sp_sview->base.u.buf.last_element); + first_element, + first_element, + last_element); tx = get_texel_2d_no_border(sp_sview, addr, x, 0); for (c = 0; c < 4; c++) { rgba[c][j] = tx[c]; diff -Nru mesa-12.0.6/src/gallium/drivers/softpipe/sp_texture.c mesa-17.0.7/src/gallium/drivers/softpipe/sp_texture.c --- mesa-12.0.6/src/gallium/drivers/softpipe/sp_texture.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/softpipe/sp_texture.c 2017-06-01 10:37:10.000000000 +0000 @@ -251,6 +251,7 @@ static boolean softpipe_resource_get_handle(struct pipe_screen *screen, + struct pipe_context *ctx, struct pipe_resource *pt, struct winsys_handle *whandle, unsigned usage) @@ -514,7 +515,8 @@ pipe->transfer_unmap = softpipe_transfer_unmap; pipe->transfer_flush_region = u_default_transfer_flush_region; - pipe->transfer_inline_write = u_default_transfer_inline_write; + pipe->buffer_subdata = u_default_buffer_subdata; + pipe->texture_subdata = u_default_texture_subdata; pipe->create_surface = softpipe_create_surface; pipe->surface_destroy = softpipe_surface_destroy; diff -Nru mesa-12.0.6/src/gallium/drivers/svga/Makefile.in mesa-17.0.7/src/gallium/drivers/svga/Makefile.in --- mesa-12.0.6/src/gallium/drivers/svga/Makefile.in 2017-01-24 01:41:47.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/Makefile.in 2017-06-01 10:37:20.000000000 +0000 @@ -112,10 +112,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -238,6 +241,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -254,6 +259,7 @@ CFLAGS = @CFLAGS@ -std=gnu99 CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -283,10 +289,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -336,11 +343,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -380,8 +384,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -418,8 +420,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -428,7 +428,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -436,13 +435,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -471,6 +471,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -550,6 +551,7 @@ svga_hw_reg.h \ svga_link.c \ svga_link.h \ + svga_mksstats.h \ svga_pipe_blend.c \ svga_pipe_blit.c \ svga_pipe_clear.c \ @@ -686,12 +688,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -703,7 +701,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ $(GALLIUM_DRIVER_CFLAGS) \ $(MSVC2013_COMPAT_CFLAGS) diff -Nru mesa-12.0.6/src/gallium/drivers/svga/Makefile.sources mesa-17.0.7/src/gallium/drivers/svga/Makefile.sources --- mesa-12.0.6/src/gallium/drivers/svga/Makefile.sources 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/Makefile.sources 2017-06-01 10:37:10.000000000 +0000 @@ -15,6 +15,7 @@ svga_hw_reg.h \ svga_link.c \ svga_link.h \ + svga_mksstats.h \ svga_pipe_blend.c \ svga_pipe_blit.c \ svga_pipe_clear.c \ diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_cmd.c mesa-17.0.7/src/gallium/drivers/svga/svga_cmd.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_cmd.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_cmd.c 2017-06-01 10:37:10.000000000 +0000 @@ -119,6 +119,8 @@ header->id = cmd; header->size = cmdSize; + swc->last_command = cmd; + return &header[1]; } @@ -1868,6 +1870,24 @@ return PIPE_OK; } +enum pipe_error +SVGA3D_InvalidateGBSurface(struct svga_winsys_context *swc, + struct svga_winsys_surface *surface) +{ + SVGA3dCmdInvalidateGBSurface *cmd = + SVGA3D_FIFOReserve(swc, + SVGA_3D_CMD_INVALIDATE_GB_SURFACE, + sizeof *cmd, + 1); /* one relocation */ + if (!cmd) + return PIPE_ERROR_OUT_OF_MEMORY; + + swc->surface_relocation(swc, &cmd->sid, NULL, surface, + SVGA_RELOC_READ | SVGA_RELOC_INTERNAL); + swc->commit(swc); + + return PIPE_OK; +} enum pipe_error SVGA3D_SetGBShaderConstsInline(struct svga_winsys_context *swc, diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_cmd.h mesa-17.0.7/src/gallium/drivers/svga/svga_cmd.h --- mesa-12.0.6/src/gallium/drivers/svga/svga_cmd.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_cmd.h 2017-06-01 10:37:10.000000000 +0000 @@ -35,6 +35,7 @@ #include "svga_types.h" +#include "svga_winsys.h" #include "svga_reg.h" #include "svga3d_reg.h" @@ -60,6 +61,25 @@ void SVGA_FIFOCommitAll(struct svga_winsys_context *swc); +/** + * Return the last command id put in the command buffer. + */ +static inline SVGAFifo3dCmdId +SVGA3D_GetLastCommand(const struct svga_winsys_context *swc) +{ + return swc->last_command; +} + +/** + * Reset/clear the last command put in the command buffer. + * To be called when buffer is flushed. + */ +static inline void +SVGA3D_ResetLastCommand(struct svga_winsys_context *swc) +{ + swc->last_command = 0; +} + /* * Context Management @@ -279,6 +299,10 @@ const SVGA3dBox *box, bool invertBox); +enum pipe_error +SVGA3D_InvalidateGBSurface(struct svga_winsys_context *swc, + struct svga_winsys_surface *surface); + enum pipe_error SVGA3D_SetGBShaderConstsInline(struct svga_winsys_context *swc, @@ -642,4 +666,20 @@ SVGA3D_vgpu10_GenMips(struct svga_winsys_context *swc, const SVGA3dShaderResourceViewId shaderResourceViewId, struct svga_winsys_surface *view); + +enum pipe_error +SVGA3D_vgpu10_BufferCopy(struct svga_winsys_context *swc, + struct svga_winsys_surface *src, + struct svga_winsys_surface *dst, + unsigned srcx, unsigned dstx, unsigned width); + +enum pipe_error +SVGA3D_vgpu10_TransferFromBuffer(struct svga_winsys_context *swc, + struct svga_winsys_surface *src, + unsigned srcOffset, unsigned srcPitch, + unsigned srcSlicePitch, + struct svga_winsys_surface *dst, + unsigned dstSubResource, + SVGA3dBox *dstBox); + #endif /* __SVGA3D_H__ */ diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_cmd_vgpu10.c mesa-17.0.7/src/gallium/drivers/svga/svga_cmd_vgpu10.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_cmd_vgpu10.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_cmd_vgpu10.c 2017-06-01 10:37:10.000000000 +0000 @@ -1314,3 +1314,56 @@ swc->commit(swc); return PIPE_OK; } + + +enum pipe_error +SVGA3D_vgpu10_BufferCopy(struct svga_winsys_context *swc, + struct svga_winsys_surface *src, + struct svga_winsys_surface *dst, + unsigned srcx, unsigned dstx, unsigned width) +{ + SVGA3dCmdDXBufferCopy *cmd; + + cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_BUFFER_COPY, sizeof *cmd, 2); + + if (!cmd) + return PIPE_ERROR_OUT_OF_MEMORY; + + swc->surface_relocation(swc, &cmd->dest, NULL, dst, SVGA_RELOC_WRITE); + swc->surface_relocation(swc, &cmd->src, NULL, src, SVGA_RELOC_READ); + cmd->destX = dstx; + cmd->srcX = srcx; + cmd->width = width; + + swc->commit(swc); + return PIPE_OK; +} + +enum pipe_error +SVGA3D_vgpu10_TransferFromBuffer(struct svga_winsys_context *swc, + struct svga_winsys_surface *src, + unsigned srcOffset, unsigned srcPitch, + unsigned srcSlicePitch, + struct svga_winsys_surface *dst, + unsigned dstSubResource, + SVGA3dBox *dstBox) +{ + SVGA3dCmdDXTransferFromBuffer *cmd; + + cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER, + sizeof(SVGA3dCmdDXTransferFromBuffer), 2); + + if (!cmd) + return PIPE_ERROR_OUT_OF_MEMORY; + + swc->surface_relocation(swc, &cmd->srcSid, NULL, src, SVGA_RELOC_READ); + swc->surface_relocation(swc, &cmd->destSid, NULL, dst, SVGA_RELOC_WRITE); + cmd->srcOffset = srcOffset; + cmd->srcPitch = srcPitch; + cmd->srcSlicePitch = srcSlicePitch; + cmd->destSubResource = dstSubResource; + cmd->destBox = *dstBox; + + swc->commit(swc); + return PIPE_OK; +} diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_context.c mesa-17.0.7/src/gallium/drivers/svga/svga_context.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -31,7 +31,6 @@ #include "util/u_memory.h" #include "util/u_bitmask.h" #include "util/u_upload_mgr.h" -#include "os/os_time.h" #include "svga_context.h" #include "svga_screen.h" @@ -51,13 +50,14 @@ DEBUG_GET_ONCE_BOOL_OPTION(no_swtnl, "SVGA_NO_SWTNL", FALSE) DEBUG_GET_ONCE_BOOL_OPTION(force_swtnl, "SVGA_FORCE_SWTNL", FALSE); DEBUG_GET_ONCE_BOOL_OPTION(use_min_mipmap, "SVGA_USE_MIN_MIPMAP", FALSE); -DEBUG_GET_ONCE_NUM_OPTION(disable_shader, "SVGA_DISABLE_SHADER", ~0); DEBUG_GET_ONCE_BOOL_OPTION(no_line_width, "SVGA_NO_LINE_WIDTH", FALSE); DEBUG_GET_ONCE_BOOL_OPTION(force_hw_line_stipple, "SVGA_FORCE_HW_LINE_STIPPLE", FALSE); -static void svga_destroy( struct pipe_context *pipe ) + +static void +svga_destroy(struct pipe_context *pipe) { - struct svga_context *svga = svga_context( pipe ); + struct svga_context *svga = svga_context(pipe); unsigned shader, i; /* free any alternate rasterizer states used for point sprite */ @@ -67,16 +67,6 @@ } } - /* free polygon stipple state */ - if (svga->polygon_stipple.sampler) { - pipe->delete_sampler_state(pipe, svga->polygon_stipple.sampler); - } - if (svga->polygon_stipple.sampler_view) { - pipe->sampler_view_destroy(pipe, - &svga->polygon_stipple.sampler_view->base); - } - pipe_resource_reference(&svga->polygon_stipple.texture, NULL); - /* free HW constant buffers */ for (shader = 0; shader < ARRAY_SIZE(svga->state.hw_draw.constbuf); shader++) { pipe_resource_reference(&svga->state.hw_draw.constbuf[shader], NULL); @@ -92,13 +82,13 @@ util_blitter_destroy(svga->blitter); - svga_cleanup_framebuffer( svga ); - svga_cleanup_tss_binding( svga ); - + svga_cleanup_sampler_state(svga); + svga_cleanup_framebuffer(svga); + svga_cleanup_tss_binding(svga); svga_cleanup_vertex_state(svga); - - svga_destroy_swtnl( svga ); - svga_hwtnl_destroy( svga->hwtnl ); + + svga_destroy_swtnl(svga); + svga_hwtnl_destroy(svga->hwtnl); svga->swc->destroy(svga->swc); @@ -113,6 +103,7 @@ util_bitmask_destroy(svga->stream_output_id_bm); util_bitmask_destroy(svga->query_id_bm); u_upload_destroy(svga->const0_upload); + svga_texture_transfer_map_upload_destroy(svga); /* free user's constant buffers */ for (shader = 0; shader < PIPE_SHADER_TYPES; ++shader) { @@ -121,13 +112,12 @@ } } - FREE( svga ); + FREE(svga); } - -struct pipe_context *svga_context_create(struct pipe_screen *screen, - void *priv, unsigned flags) +struct pipe_context * +svga_context_create(struct pipe_screen *screen, void *priv, unsigned flags) { struct svga_screen *svgascreen = svga_screen(screen); struct svga_context *svga = NULL; @@ -142,7 +132,6 @@ svga->pipe.screen = screen; svga->pipe.priv = priv; svga->pipe.destroy = svga_destroy; - svga->pipe.clear = svga_clear; svga->swc = svgascreen->sws->context_create(svgascreen->sws); if (!svga->swc) @@ -165,6 +154,7 @@ svga_init_query_functions(svga); svga_init_surface_functions(svga); svga_init_stream_output_functions(svga); + svga_init_clear_functions(svga); /* init misc state */ svga->curr.sample_mask = ~0; @@ -173,7 +163,6 @@ svga->debug.no_swtnl = debug_get_option_no_swtnl(); svga->debug.force_swtnl = debug_get_option_force_swtnl(); svga->debug.use_min_mipmap = debug_get_option_use_min_mipmap(); - svga->debug.disable_shader = debug_get_option_disable_shader(); svga->debug.no_line_width = debug_get_option_no_line_width(); svga->debug.force_hw_line_stipple = debug_get_option_force_hw_line_stipple(); @@ -214,7 +203,7 @@ if (!svga_init_swtnl(svga)) goto cleanup; - ret = svga_emit_initial_state( svga ); + ret = svga_emit_initial_state(svga); if (ret != PIPE_OK) goto cleanup; @@ -225,22 +214,33 @@ if (!svga->const0_upload) goto cleanup; + if (!svga_texture_transfer_map_upload_create(svga)) + goto cleanup; + /* Avoid shortcircuiting state with initial value of zero. */ memset(&svga->state.hw_clear, 0xcd, sizeof(svga->state.hw_clear)); - memset(&svga->state.hw_clear.framebuffer, 0x0, + memset(&svga->state.hw_clear.framebuffer, 0x0, sizeof(svga->state.hw_clear.framebuffer)); memset(&svga->state.hw_draw, 0xcd, sizeof(svga->state.hw_draw)); memset(&svga->state.hw_draw.views, 0x0, sizeof(svga->state.hw_draw.views)); + memset(&svga->state.hw_draw.num_samplers, 0, + sizeof(svga->state.hw_draw.num_samplers)); memset(&svga->state.hw_draw.num_sampler_views, 0, sizeof(svga->state.hw_draw.num_sampler_views)); + memset(svga->state.hw_draw.sampler_views, 0, + sizeof(svga->state.hw_draw.sampler_views)); svga->state.hw_draw.num_views = 0; + svga->state.hw_draw.num_rendertargets = 0; + svga->state.hw_draw.dsv = NULL; /* Initialize the shader pointers */ svga->state.hw_draw.vs = NULL; svga->state.hw_draw.gs = NULL; svga->state.hw_draw.fs = NULL; + + /* Initialize the currently bound buffer resources */ memset(svga->state.hw_draw.constbuf, 0, sizeof(svga->state.hw_draw.constbuf)); memset(svga->state.hw_draw.default_constbuf_size, 0, @@ -248,6 +248,11 @@ memset(svga->state.hw_draw.enabled_constbufs, 0, sizeof(svga->state.hw_draw.enabled_constbufs)); svga->state.hw_draw.ib = NULL; + svga->state.hw_draw.num_vbuffers = 0; + memset(svga->state.hw_draw.vbuffers, 0, + sizeof(svga->state.hw_draw.vbuffers)); + svga->state.hw_draw.const0_buffer = NULL; + svga->state.hw_draw.const0_handle = NULL; /* Create a no-operation blend state which we will bind whenever the * requested blend state is impossible (e.g. due to having an integer @@ -269,6 +274,7 @@ } svga->dirty = ~0; + svga->pred.query_id = SVGA3D_INVALID_ID; return &svga->pipe; @@ -277,6 +283,7 @@ if (svga->const0_upload) u_upload_destroy(svga->const0_upload); + svga_texture_transfer_map_upload_destroy(svga); if (svga->hwtnl) svga_hwtnl_destroy(svga->hwtnl); if (svga->swc) @@ -296,15 +303,29 @@ } -void svga_context_flush( struct svga_context *svga, - struct pipe_fence_handle **pfence ) +void +svga_context_flush(struct svga_context *svga, + struct pipe_fence_handle **pfence) { struct svga_screen *svgascreen = svga_screen(svga->pipe.screen); struct pipe_fence_handle *fence = NULL; uint64_t t0; + SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_CONTEXTFLUSH); + svga->curr.nr_fbs = 0; + /* Unmap the 0th/default constant buffer. The u_upload_unmap() function + * will call pipe_context::transfer_flush_region() to indicate the + * region of the buffer which was modified (and needs to be uploaded). + */ + if (svga->state.hw_draw.const0_handle) { + assert(svga->state.hw_draw.const0_buffer); + u_upload_unmap(svga->const0_upload); + pipe_resource_reference(&svga->state.hw_draw.const0_buffer, NULL); + svga->state.hw_draw.const0_handle = NULL; + } + /* Ensure that texture dma uploads are processed * before submitting commands. */ @@ -315,14 +336,16 @@ /* Flush pending commands to hardware: */ - t0 = os_time_get(); + t0 = svga_get_time(svga); svga->swc->flush(svga->swc, &fence); - svga->hud.flush_time += (os_time_get() - t0); + svga->hud.flush_time += (svga_get_time(svga) - t0); svga->hud.num_flushes++; svga_screen_cache_flush(svgascreen, fence); + SVGA3D_ResetLastCommand(svga->swc); + /* To force the re-emission of rendertargets and texture sampler bindings on * the next command buffer. */ @@ -343,7 +366,7 @@ if (SVGA_DEBUG & DEBUG_SYNC) { if (fence) - svga->pipe.screen->fence_finish( svga->pipe.screen, fence, + svga->pipe.screen->fence_finish(svga->pipe.screen, NULL, fence, PIPE_TIMEOUT_INFINITE); } @@ -351,6 +374,8 @@ svgascreen->sws->fence_reference(svgascreen->sws, pfence, fence); svgascreen->sws->fence_reference(svgascreen->sws, &fence, NULL); + + SVGA_STATS_TIME_POP(svga_sws(svga)); } @@ -363,9 +388,13 @@ struct pipe_screen *screen = svga->pipe.screen; struct pipe_fence_handle *fence = NULL; + SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_CONTEXTFINISH); + svga_context_flush(svga, &fence); - svga->pipe.screen->fence_finish(screen, fence, PIPE_TIMEOUT_INFINITE); + screen->fence_finish(screen, NULL, fence, PIPE_TIMEOUT_INFINITE); screen->fence_reference(screen, &fence, NULL); + + SVGA_STATS_TIME_POP(svga_sws(svga)); } @@ -374,14 +403,15 @@ * If the command buffer overflows, we flush it and retry. * \sa svga_hwtnl_flush() */ -void svga_hwtnl_flush_retry( struct svga_context *svga ) +void +svga_hwtnl_flush_retry(struct svga_context *svga) { enum pipe_error ret = PIPE_OK; - ret = svga_hwtnl_flush( svga->hwtnl ); + ret = svga_hwtnl_flush(svga->hwtnl); if (ret == PIPE_ERROR_OUT_OF_MEMORY) { - svga_context_flush( svga, NULL ); - ret = svga_hwtnl_flush( svga->hwtnl ); + svga_context_flush(svga, NULL); + ret = svga_hwtnl_flush(svga->hwtnl); } assert(ret == PIPE_OK); @@ -393,8 +423,9 @@ * * Otherwise DMA commands on the referred buffer will be emitted too late. */ -void svga_hwtnl_flush_buffer( struct svga_context *svga, - struct pipe_resource *buffer ) +void +svga_hwtnl_flush_buffer(struct svga_context *svga, + struct pipe_resource *buffer) { if (svga_hwtnl_is_buffer_referred(svga->hwtnl, buffer)) { svga_hwtnl_flush_retry(svga); @@ -402,32 +433,28 @@ } -/* Emit all operations pending on host surfaces. - */ -void svga_surfaces_flush(struct svga_context *svga) +/** + * Emit all operations pending on host surfaces. + */ +void +svga_surfaces_flush(struct svga_context *svga) { - struct svga_screen *svgascreen = svga_screen(svga->pipe.screen); - unsigned i; + SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_SURFACEFLUSH); /* Emit buffered drawing commands. */ - svga_hwtnl_flush_retry( svga ); + svga_hwtnl_flush_retry(svga); - /* Emit back-copy from render target view to texture. + /* Emit back-copy from render target views to textures. */ - for (i = 0; i < svgascreen->max_color_buffers; i++) { - if (svga->curr.framebuffer.cbufs[i]) - svga_propagate_surface(svga, svga->curr.framebuffer.cbufs[i]); - } - - if (svga->curr.framebuffer.zsbuf) - svga_propagate_surface(svga, svga->curr.framebuffer.zsbuf); + svga_propagate_rendertargets(svga); + SVGA_STATS_TIME_POP(svga_sws(svga)); } struct svga_winsys_context * -svga_winsys_context( struct pipe_context *pipe ) +svga_winsys_context(struct pipe_context *pipe) { - return svga_context( pipe )->swc; + return svga_context(pipe)->swc; } diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_context.h mesa-17.0.7/src/gallium/drivers/svga/svga_context.h --- mesa-12.0.6/src/gallium/drivers/svga/svga_context.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_context.h 2017-06-01 10:37:10.000000000 +0000 @@ -31,6 +31,8 @@ #include "pipe/p_defines.h" #include "pipe/p_state.h" +#include "os/os_time.h" + #include "util/u_blitter.h" #include "util/list.h" @@ -44,32 +46,36 @@ /** Non-GPU queries for gallium HUD */ +enum svga_hud { /* per-frame counters */ -#define SVGA_QUERY_NUM_DRAW_CALLS (PIPE_QUERY_DRIVER_SPECIFIC + 0) -#define SVGA_QUERY_NUM_FALLBACKS (PIPE_QUERY_DRIVER_SPECIFIC + 1) -#define SVGA_QUERY_NUM_FLUSHES (PIPE_QUERY_DRIVER_SPECIFIC + 2) -#define SVGA_QUERY_NUM_VALIDATIONS (PIPE_QUERY_DRIVER_SPECIFIC + 3) -#define SVGA_QUERY_MAP_BUFFER_TIME (PIPE_QUERY_DRIVER_SPECIFIC + 4) -#define SVGA_QUERY_NUM_RESOURCES_MAPPED (PIPE_QUERY_DRIVER_SPECIFIC + 5) -#define SVGA_QUERY_NUM_BYTES_UPLOADED (PIPE_QUERY_DRIVER_SPECIFIC + 6) -#define SVGA_QUERY_COMMAND_BUFFER_SIZE (PIPE_QUERY_DRIVER_SPECIFIC + 7) -#define SVGA_QUERY_FLUSH_TIME (PIPE_QUERY_DRIVER_SPECIFIC + 8) -#define SVGA_QUERY_SURFACE_WRITE_FLUSHES (PIPE_QUERY_DRIVER_SPECIFIC + 9) -#define SVGA_QUERY_NUM_READBACKS (PIPE_QUERY_DRIVER_SPECIFIC + 10) -#define SVGA_QUERY_NUM_RESOURCE_UPDATES (PIPE_QUERY_DRIVER_SPECIFIC + 11) -#define SVGA_QUERY_NUM_BUFFER_UPLOADS (PIPE_QUERY_DRIVER_SPECIFIC + 12) -#define SVGA_QUERY_NUM_CONST_BUF_UPDATES (PIPE_QUERY_DRIVER_SPECIFIC + 13) -#define SVGA_QUERY_NUM_CONST_UPDATES (PIPE_QUERY_DRIVER_SPECIFIC + 14) + SVGA_QUERY_NUM_DRAW_CALLS = PIPE_QUERY_DRIVER_SPECIFIC, + SVGA_QUERY_NUM_FALLBACKS, + SVGA_QUERY_NUM_FLUSHES, + SVGA_QUERY_NUM_VALIDATIONS, + SVGA_QUERY_MAP_BUFFER_TIME, + SVGA_QUERY_NUM_BUFFERS_MAPPED, + SVGA_QUERY_NUM_TEXTURES_MAPPED, + SVGA_QUERY_NUM_BYTES_UPLOADED, + SVGA_QUERY_COMMAND_BUFFER_SIZE, + SVGA_QUERY_FLUSH_TIME, + SVGA_QUERY_SURFACE_WRITE_FLUSHES, + SVGA_QUERY_NUM_READBACKS, + SVGA_QUERY_NUM_RESOURCE_UPDATES, + SVGA_QUERY_NUM_BUFFER_UPLOADS, + SVGA_QUERY_NUM_CONST_BUF_UPDATES, + SVGA_QUERY_NUM_CONST_UPDATES, /* running total counters */ -#define SVGA_QUERY_MEMORY_USED (PIPE_QUERY_DRIVER_SPECIFIC + 15) -#define SVGA_QUERY_NUM_SHADERS (PIPE_QUERY_DRIVER_SPECIFIC + 16) -#define SVGA_QUERY_NUM_RESOURCES (PIPE_QUERY_DRIVER_SPECIFIC + 17) -#define SVGA_QUERY_NUM_STATE_OBJECTS (PIPE_QUERY_DRIVER_SPECIFIC + 18) -#define SVGA_QUERY_NUM_SURFACE_VIEWS (PIPE_QUERY_DRIVER_SPECIFIC + 19) -#define SVGA_QUERY_NUM_GENERATE_MIPMAP (PIPE_QUERY_DRIVER_SPECIFIC + 20) + SVGA_QUERY_MEMORY_USED, + SVGA_QUERY_NUM_SHADERS, + SVGA_QUERY_NUM_RESOURCES, + SVGA_QUERY_NUM_STATE_OBJECTS, + SVGA_QUERY_NUM_SURFACE_VIEWS, + SVGA_QUERY_NUM_GENERATE_MIPMAP, + /*SVGA_QUERY_MAX has to be last because it is size of an array*/ -#define SVGA_QUERY_MAX (PIPE_QUERY_DRIVER_SPECIFIC + 21) + SVGA_QUERY_MAX +}; /** * Maximum supported number of constant buffers per shader @@ -332,21 +338,35 @@ */ struct svga_hw_draw_state { + /** VGPU9 rasterization state */ unsigned rs[SVGA3D_RS_MAX]; + /** VGPU9 texture sampler and bindings state */ unsigned ts[SVGA3D_PIXEL_SAMPLERREG_MAX][SVGA3D_TS_MAX]; + /** VGPU9 texture views */ + unsigned num_views; + struct svga_hw_view_state views[PIPE_MAX_SAMPLERS]; + /** VGPU9 constant buffer values */ float cb[PIPE_SHADER_TYPES][SVGA3D_CONSTREG_MAX][4]; + /** Currently bound shaders */ struct svga_shader_variant *fs; struct svga_shader_variant *vs; struct svga_shader_variant *gs; - struct svga_hw_view_state views[PIPE_MAX_SAMPLERS]; - unsigned num_views; + + /** Currently bound constant buffer, per shader stage */ struct pipe_resource *constbuf[PIPE_SHADER_TYPES]; - /* Bitmask of enabled constant bufffers */ + /** Bitmask of enabled constant buffers */ unsigned enabled_constbufs[PIPE_SHADER_TYPES]; - /* VGPU10 HW state (used to prevent emitting redundant state) */ + /** + * These are used to reduce the number of times we call u_upload_unmap() + * while updating the zero-th/default VGPU10 constant buffer. + */ + struct pipe_resource *const0_buffer; + struct svga_winsys_surface *const0_handle; + + /** VGPU10 HW state (used to prevent emitting redundant state) */ SVGA3dDepthStencilStateId depth_stencil_id; unsigned stencil_ref; SVGA3dBlendStateId blend_id; @@ -357,19 +377,26 @@ SVGA3dPrimitiveType topology; /** Vertex buffer state */ - SVGA3dVertexBuffer vbuffers[PIPE_MAX_ATTRIBS]; - struct svga_winsys_surface *vbuffer_handles[PIPE_MAX_ATTRIBS]; + SVGA3dVertexBuffer vbuffer_attrs[PIPE_MAX_ATTRIBS]; + struct pipe_resource *vbuffers[PIPE_MAX_ATTRIBS]; unsigned num_vbuffers; - struct svga_winsys_surface *ib; /**< index buffer for drawing */ + struct pipe_resource *ib; /**< index buffer for drawing */ SVGA3dSurfaceFormat ib_format; unsigned ib_offset; unsigned num_samplers[PIPE_SHADER_TYPES]; SVGA3dSamplerId samplers[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; - /* used for rebinding */ unsigned num_sampler_views[PIPE_SHADER_TYPES]; + struct pipe_sampler_view + *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; + + unsigned num_rendertargets; + struct pipe_surface *rtv[SVGA3D_MAX_RENDER_TARGETS]; + struct pipe_surface *dsv; + + /* used for rebinding */ unsigned default_constbuf_size[PIPE_SHADER_TYPES]; }; @@ -404,6 +431,7 @@ struct svga_winsys_context *swc; struct blitter_context *blitter; struct u_upload_mgr *const0_upload; + struct u_upload_mgr *tex_upload; struct { boolean no_swtnl; @@ -413,8 +441,6 @@ /* incremented for each shader */ unsigned shader_id; - unsigned disable_shader; - boolean no_line_width; boolean force_hw_line_stipple; @@ -511,7 +537,8 @@ uint64_t num_flushes; /**< SVGA_QUERY_NUM_FLUSHES */ uint64_t num_validations; /**< SVGA_QUERY_NUM_VALIDATIONS */ uint64_t map_buffer_time; /**< SVGA_QUERY_MAP_BUFFER_TIME */ - uint64_t num_resources_mapped; /**< SVGA_QUERY_NUM_RESOURCES_MAPPED */ + uint64_t num_buffers_mapped; /**< SVGA_QUERY_NUM_BUFFERS_MAPPED */ + uint64_t num_textures_mapped; /**< SVGA_QUERY_NUM_TEXTURES_MAPPED */ uint64_t command_buffer_size; /**< SVGA_QUERY_COMMAND_BUFFER_SIZE */ uint64_t flush_time; /**< SVGA_QUERY_FLUSH_TIME */ uint64_t surface_write_flushes; /**< SVGA_QUERY_SURFACE_WRITE_FLUSHES */ @@ -533,6 +560,8 @@ uint64_t num_surface_views; /**< SVGA_QUERY_NUM_SURFACE_VIEWS */ uint64_t num_bytes_uploaded; /**< SVGA_QUERY_NUM_BYTES_UPLOADED */ uint64_t num_generate_mipmap; /**< SVGA_QUERY_NUM_GENERATE_MIPMAP */ + + boolean uses_time; /**< os_time_get() calls needed? */ } hud; /** The currently bound stream output targets */ @@ -554,6 +583,14 @@ /** Alternate rasterizer states created for point sprite */ struct svga_rasterizer_state *rasterizer_no_cull[2]; + + /** Current conditional rendering predicate */ + struct { + SVGA3dQueryId query_id; + boolean cond; + } pred; + + boolean render_condition; }; /* A flag for each state_tracker state object: @@ -591,26 +628,6 @@ #define SVGA_NEW_TEXTURE_CONSTS 0x80000000 - - -/*********************************************************************** - * svga_clear.c: - */ -void svga_clear(struct pipe_context *pipe, - unsigned buffers, - const union pipe_color_union *color, - double depth, - unsigned stencil); - - -/*********************************************************************** - * svga_screen_texture.c: - */ -void svga_mark_surfaces_dirty(struct svga_context *svga); - - - - void svga_init_state_functions( struct svga_context *svga ); void svga_init_flush_functions( struct svga_context *svga ); void svga_init_string_functions( struct svga_context *svga ); @@ -630,8 +647,10 @@ void svga_init_query_functions( struct svga_context *svga ); void svga_init_surface_functions(struct svga_context *svga); void svga_init_stream_output_functions( struct svga_context *svga ); +void svga_init_clear_functions( struct svga_context *svga ); void svga_cleanup_vertex_state( struct svga_context *svga ); +void svga_cleanup_sampler_state( struct svga_context *svga ); void svga_cleanup_tss_binding( struct svga_context *svga ); void svga_cleanup_framebuffer( struct svga_context *svga ); @@ -661,6 +680,11 @@ return (struct svga_context *)pipe; } +static inline struct svga_winsys_screen * +svga_sws(struct svga_context *svga) +{ + return svga_screen(svga->pipe.screen)->sws; +} static inline boolean svga_have_gb_objects(const struct svga_context *svga) @@ -692,4 +716,15 @@ return memcmp(r1, r2, sizeof(*r1)) == 0; } +/** + * If the Gallium HUD is enabled, this will return the current time. + * Otherwise, just return zero. + */ +static inline int64_t +svga_get_time(struct svga_context *svga) +{ + return svga->hud.uses_time ? os_time_get() : 0; +} + + #endif diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_draw_arrays.c mesa-17.0.7/src/gallium/drivers/svga/svga_draw_arrays.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_draw_arrays.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_draw_arrays.c 2017-06-01 10:37:10.000000000 +0000 @@ -100,6 +100,8 @@ enum pipe_error ret = PIPE_OK; int i; + SVGA_STATS_TIME_PUSH(svga_sws(hwtnl->svga), SVGA_STATS_TIME_GENERATEINDICES); + for (i = 0; i < IDX_CACHE_MAX; i++) { if (hwtnl->index_cache[prim][i].buffer != NULL && hwtnl->index_cache[prim][i].generate == generate) { @@ -110,7 +112,7 @@ if (DBG) debug_printf("%s retrieve %d/%d\n", __FUNCTION__, i, gen_nr); - return PIPE_OK; + goto done; } else if (gen_type == U_GENERATE_REUSABLE) { pipe_resource_reference(&hwtnl->index_cache[prim][i].buffer, @@ -154,7 +156,7 @@ ret = generate_indices(hwtnl, gen_nr, gen_size, generate, out_buf); if (ret != PIPE_OK) - return ret; + goto done; hwtnl->index_cache[prim][i].generate = generate; hwtnl->index_cache[prim][i].gen_nr = gen_nr; @@ -164,7 +166,9 @@ debug_printf("%s cache %d/%d\n", __FUNCTION__, i, hwtnl->index_cache[prim][i].gen_nr); - return PIPE_OK; +done: + SVGA_STATS_TIME_POP(svga_sws(hwtnl->svga)); + return ret; } @@ -213,6 +217,8 @@ unsigned api_pv = hwtnl->api_pv; struct svga_context *svga = hwtnl->svga; + SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_HWTNLDRAWARRAYS); + if (svga->curr.rast->templ.fill_front != svga->curr.rast->templ.fill_back) { assert(hwtnl->api_fillmode == PIPE_POLYGON_MODE_FILL); @@ -266,7 +272,7 @@ } if (gen_type == U_GENERATE_LINEAR) { - return simple_draw_arrays(hwtnl, gen_prim, start, count, + ret = simple_draw_arrays(hwtnl, gen_prim, start, count, start_instance, instance_count); } else { @@ -296,13 +302,11 @@ gen_prim, 0, gen_nr, start_instance, instance_count); - if (ret != PIPE_OK) - goto done; - done: if (gen_buf) pipe_resource_reference(&gen_buf, NULL); - - return ret; } + + SVGA_STATS_TIME_POP(svga_sws(svga)); + return ret; } diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_draw.c mesa-17.0.7/src/gallium/drivers/svga/svga_draw.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_draw.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_draw.c 2017-06-01 10:37:10.000000000 +0000 @@ -311,7 +311,7 @@ static enum pipe_error validate_sampler_resources(struct svga_context *svga) { - unsigned shader; + enum pipe_shader_type shader; assert(svga_have_vgpu10(svga)); @@ -376,7 +376,7 @@ static enum pipe_error validate_constant_buffers(struct svga_context *svga) { - unsigned shader; + enum pipe_shader_type shader; assert(svga_have_vgpu10(svga)); @@ -427,6 +427,32 @@ } +/** + * Was the last command put into the command buffer a drawing command? + * We use this to determine if we can skip emitting buffer re-bind + * commands when we have a sequence of drawing commands that use the + * same vertex/index buffers with no intervening commands. + * + * The first drawing command will bind the vertex/index buffers. If + * the immediately following command is also a drawing command using the + * same buffers, we shouldn't have to rebind them. + */ +static bool +last_command_was_draw(const struct svga_context *svga) +{ + switch (SVGA3D_GetLastCommand(svga->swc)) { + case SVGA_3D_CMD_DX_DRAW: + case SVGA_3D_CMD_DX_DRAW_INDEXED: + case SVGA_3D_CMD_DX_DRAW_INSTANCED: + case SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED: + case SVGA_3D_CMD_DX_DRAW_AUTO: + return true; + default: + return false; + } +} + + static enum pipe_error draw_vgpu10(struct svga_hwtnl *hwtnl, const SVGA3dPrimitiveRange *range, @@ -436,9 +462,11 @@ unsigned start_instance, unsigned instance_count) { struct svga_context *svga = hwtnl->svga; - struct svga_winsys_surface *vb_handle[SVGA3D_INPUTREG_MAX]; + struct pipe_resource *vbuffers[SVGA3D_INPUTREG_MAX]; + struct svga_winsys_surface *vbuffer_handles[SVGA3D_INPUTREG_MAX]; struct svga_winsys_surface *ib_handle; const unsigned vbuf_count = hwtnl->cmd.vbuf_count; + int last_vbuf = -1; enum pipe_error ret; unsigned i; @@ -464,8 +492,11 @@ if (ret != PIPE_OK) return ret; - /* Force rebinding the index buffer when needed */ - svga->state.hw_draw.ib = NULL; + /* No need to explicitly rebind index buffer and vertex buffers here. + * Even if the same index buffer or vertex buffers are referenced for this + * draw and we skip emitting the redundant set command, we will still + * reference the associated resources. + */ } ret = validate_sampler_resources(svga); @@ -482,16 +513,24 @@ if (sbuf) { assert(sbuf->key.flags & SVGA3D_SURFACE_BIND_VERTEX_BUFFER); - vb_handle[i] = svga_buffer_handle(svga, &sbuf->b.b); - if (vb_handle[i] == NULL) + vbuffer_handles[i] = svga_buffer_handle(svga, &sbuf->b.b); + if (vbuffer_handles[i] == NULL) return PIPE_ERROR_OUT_OF_MEMORY; + vbuffers[i] = &sbuf->b.b; + last_vbuf = i; } else { - vb_handle[i] = NULL; + vbuffers[i] = NULL; + vbuffer_handles[i] = NULL; } } - /* Get handles for the index buffers */ + for (; i < svga->state.hw_draw.num_vbuffers; i++) { + vbuffers[i] = NULL; + vbuffer_handles[i] = NULL; + } + + /* Get handle for the index buffer */ if (ib) { struct svga_buffer *sbuf = svga_buffer(ib); @@ -518,33 +557,64 @@ /* setup vertex buffers */ { - SVGA3dVertexBuffer buffers[PIPE_MAX_ATTRIBS]; + SVGA3dVertexBuffer vbuffer_attrs[PIPE_MAX_ATTRIBS]; for (i = 0; i < vbuf_count; i++) { - buffers[i].stride = hwtnl->cmd.vbufs[i].stride; - buffers[i].offset = hwtnl->cmd.vbufs[i].buffer_offset; + vbuffer_attrs[i].stride = hwtnl->cmd.vbufs[i].stride; + vbuffer_attrs[i].offset = hwtnl->cmd.vbufs[i].buffer_offset; + vbuffer_attrs[i].sid = 0; } - if (vbuf_count > 0) { - /* If we haven't yet emitted a drawing command or if any - * vertex buffer state is changing, issue that state now. + + /* If we haven't yet emitted a drawing command or if any + * vertex buffer state is changing, issue that state now. + */ + if (((hwtnl->cmd.swc->hints & SVGA_HINT_FLAG_CAN_PRE_FLUSH) == 0) || + vbuf_count != svga->state.hw_draw.num_vbuffers || + memcmp(vbuffer_attrs, svga->state.hw_draw.vbuffer_attrs, + vbuf_count * sizeof(vbuffer_attrs[0])) || + memcmp(vbuffers, svga->state.hw_draw.vbuffers, + vbuf_count * sizeof(vbuffers[0]))) { + + unsigned num_vbuffers; + + /* get the max of the current bound vertex buffers count and + * the to-be-bound vertex buffers count, so as to unbind + * the unused vertex buffers. */ - if (((hwtnl->cmd.swc->hints & SVGA_HINT_FLAG_CAN_PRE_FLUSH) == 0) || - vbuf_count != svga->state.hw_draw.num_vbuffers || - memcmp(buffers, svga->state.hw_draw.vbuffers, - vbuf_count * sizeof(buffers[0])) || - memcmp(vb_handle, svga->state.hw_draw.vbuffer_handles, - vbuf_count * sizeof(vb_handle[0]))) { - ret = SVGA3D_vgpu10_SetVertexBuffers(svga->swc, vbuf_count, + num_vbuffers = MAX2(vbuf_count, svga->state.hw_draw.num_vbuffers); + + if (num_vbuffers > 0) { + + ret = SVGA3D_vgpu10_SetVertexBuffers(svga->swc, num_vbuffers, 0, /* startBuffer */ - buffers, vb_handle); + vbuffer_attrs, + vbuffer_handles); if (ret != PIPE_OK) return ret; - svga->state.hw_draw.num_vbuffers = vbuf_count; - memcpy(svga->state.hw_draw.vbuffers, buffers, - vbuf_count * sizeof(buffers[0])); - memcpy(svga->state.hw_draw.vbuffer_handles, vb_handle, - vbuf_count * sizeof(vb_handle[0])); + /* save the number of vertex buffers sent to the device, not + * including trailing unbound vertex buffers. + */ + svga->state.hw_draw.num_vbuffers = last_vbuf + 1; + memcpy(svga->state.hw_draw.vbuffer_attrs, vbuffer_attrs, + num_vbuffers * sizeof(vbuffer_attrs[0])); + for (i = 0; i < num_vbuffers; i++) { + pipe_resource_reference(&svga->state.hw_draw.vbuffers[i], + vbuffers[i]); + } + } + } + else { + /* Even though we can avoid emitting the redundant SetVertexBuffers + * command, we still need to reference the vertex buffers surfaces. + */ + for (i = 0; i < vbuf_count; i++) { + if (vbuffer_handles[i] && !last_command_was_draw(svga)) { + ret = svga->swc->resource_rebind(svga->swc, vbuffer_handles[i], + NULL, SVGA_RELOC_READ); + if (ret != PIPE_OK) + return ret; + } } } } @@ -563,18 +633,32 @@ SVGA3dSurfaceFormat indexFormat = xlate_index_format(range->indexWidth); /* setup index buffer */ - if (ib_handle != svga->state.hw_draw.ib || + if (ib != svga->state.hw_draw.ib || indexFormat != svga->state.hw_draw.ib_format || range->indexArray.offset != svga->state.hw_draw.ib_offset) { + + assert(indexFormat != SVGA3D_FORMAT_INVALID); ret = SVGA3D_vgpu10_SetIndexBuffer(svga->swc, ib_handle, indexFormat, range->indexArray.offset); if (ret != PIPE_OK) return ret; - svga->state.hw_draw.ib = ib_handle; + + pipe_resource_reference(&svga->state.hw_draw.ib, ib); svga->state.hw_draw.ib_format = indexFormat; svga->state.hw_draw.ib_offset = range->indexArray.offset; } + else { + /* Even though we can avoid emitting the redundant SetIndexBuffer + * command, we still need to reference the index buffer surface. + */ + if (!last_command_was_draw(svga)) { + ret = svga->swc->resource_rebind(svga->swc, ib_handle, + NULL, SVGA_RELOC_READ); + if (ret != PIPE_OK) + return ret; + } + } if (instance_count > 1) { ret = SVGA3D_vgpu10_DrawIndexedInstanced(svga->swc, @@ -598,16 +682,19 @@ } else { /* non-indexed drawing */ - if (svga->state.hw_draw.ib_format != SVGA3D_FORMAT_INVALID) { + if (svga->state.hw_draw.ib_format != SVGA3D_FORMAT_INVALID || + svga->state.hw_draw.ib != NULL) { /* Unbind previously bound index buffer */ ret = SVGA3D_vgpu10_SetIndexBuffer(svga->swc, NULL, SVGA3D_FORMAT_INVALID, 0); if (ret != PIPE_OK) return ret; + pipe_resource_reference(&svga->state.hw_draw.ib, NULL); svga->state.hw_draw.ib_format = SVGA3D_FORMAT_INVALID; - svga->state.hw_draw.ib = NULL; } + assert(svga->state.hw_draw.ib == NULL); + if (instance_count > 1) { ret = SVGA3D_vgpu10_DrawInstanced(svga->swc, vcount, @@ -644,11 +731,17 @@ enum pipe_error svga_hwtnl_flush(struct svga_hwtnl *hwtnl) { + enum pipe_error ret = PIPE_OK; + + SVGA_STATS_TIME_PUSH(svga_sws(hwtnl->svga), SVGA_STATS_TIME_HWTNLFLUSH); + if (!svga_have_vgpu10(hwtnl->svga) && hwtnl->cmd.prim_count) { /* we only queue up primitive for VGPU9 */ - return draw_vgpu9(hwtnl); + ret = draw_vgpu9(hwtnl); } - return PIPE_OK; + + SVGA_STATS_TIME_POP(svga_screen(hwtnl->svga->pipe.screen)->sws); + return ret; } @@ -822,6 +915,8 @@ { enum pipe_error ret = PIPE_OK; + SVGA_STATS_TIME_PUSH(svga_sws(hwtnl->svga), SVGA_STATS_TIME_HWTNLPRIM); + if (svga_have_vgpu10(hwtnl->svga)) { /* draw immediately */ ret = draw_vgpu10(hwtnl, range, vcount, min_index, max_index, ib, @@ -846,7 +941,7 @@ if (hwtnl->cmd.prim_count + 1 >= QSZ) { ret = svga_hwtnl_flush(hwtnl); if (ret != PIPE_OK) - return ret; + goto done; } /* min/max indices are relative to bias */ @@ -860,5 +955,7 @@ hwtnl->cmd.prim_count++; } +done: + SVGA_STATS_TIME_POP(svga_screen(hwtnl->svga->pipe.screen)->sws); return ret; } diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_draw_elements.c mesa-17.0.7/src/gallium/drivers/svga/svga_draw_elements.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_draw_elements.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_draw_elements.c 2017-06-01 10:37:10.000000000 +0000 @@ -37,26 +37,66 @@ #include "svga_hw_reg.h" +/** + * Return a new index buffer which contains a translation of the original + * index buffer. An example of a translation is converting from QUAD + * primitives to TRIANGLE primitives. Each set of four indexes for a quad + * will be converted to six indices for two triangles. + * + * Before generating the new index buffer we'll check if the incoming + * buffer already has a translated buffer that can be re-used. + * This benefits demos like Cinebench R15 which has many + * glDrawElements(GL_QUADS) commands (we can't draw quads natively). + * + * \param offset offset in bytes to first index to translate in src buffer + * \param orig_prim original primitive type (like PIPE_PRIM_QUADS) + * \param gen_prim new/generated primitive type (like PIPE_PRIM_TRIANGLES) + * \param orig_nr number of indexes to translate in source buffer + * \param gen_nr number of indexes to write into new/dest buffer + * \param index_size bytes per index (2 or 4) + * \param translate the translation function from the u_translate module + * \param out_buf returns the new/translated index buffer + * \return error code to indicate success failure + */ static enum pipe_error translate_indices(struct svga_hwtnl *hwtnl, struct pipe_resource *src, - unsigned offset, enum pipe_prim_type prim, unsigned nr, + unsigned offset, + enum pipe_prim_type orig_prim, enum pipe_prim_type gen_prim, + unsigned orig_nr, unsigned gen_nr, unsigned index_size, u_translate_func translate, struct pipe_resource **out_buf) { struct pipe_context *pipe = &hwtnl->svga->pipe; + struct svga_screen *screen = svga_screen(pipe->screen); + struct svga_buffer *src_sbuf = svga_buffer(src); struct pipe_transfer *src_transfer = NULL; struct pipe_transfer *dst_transfer = NULL; - unsigned size = index_size * nr; + unsigned size = index_size * gen_nr; const void *src_map = NULL; struct pipe_resource *dst = NULL; void *dst_map = NULL; + assert(index_size == 2 || index_size == 4); + + if (!screen->debug.no_cache_index_buffers) { + /* Check if we already have a translated index buffer */ + if (src_sbuf->translated_indices.buffer && + src_sbuf->translated_indices.orig_prim == orig_prim && + src_sbuf->translated_indices.new_prim == gen_prim && + src_sbuf->translated_indices.offset == offset && + src_sbuf->translated_indices.count == orig_nr && + src_sbuf->translated_indices.index_size == index_size) { + pipe_resource_reference(out_buf, src_sbuf->translated_indices.buffer); + return PIPE_OK; + } + } + /* Need to trim vertex count to make sure we don't write too much data * to the dst buffer in the translate() call. */ - u_trim_pipe_prim(prim, &nr); + u_trim_pipe_prim(gen_prim, &gen_nr); - size = index_size * nr; + size = index_size * gen_nr; dst = pipe_buffer_create(pipe->screen, PIPE_BIND_INDEX_BUFFER, PIPE_USAGE_DEFAULT, size); @@ -71,12 +111,25 @@ if (!dst_map) goto fail; - translate((const char *) src_map + offset, 0, 0, nr, 0, dst_map); + translate((const char *) src_map + offset, 0, 0, gen_nr, 0, dst_map); pipe_buffer_unmap(pipe, src_transfer); pipe_buffer_unmap(pipe, dst_transfer); *out_buf = dst; + + if (!screen->debug.no_cache_index_buffers) { + /* Save the new, translated index buffer in the hope we can use it + * again in the future. + */ + pipe_resource_reference(&src_sbuf->translated_indices.buffer, dst); + src_sbuf->translated_indices.orig_prim = orig_prim; + src_sbuf->translated_indices.new_prim = gen_prim; + src_sbuf->translated_indices.offset = offset; + src_sbuf->translated_indices.count = orig_nr; + src_sbuf->translated_indices.index_size = index_size; + } + return PIPE_OK; fail: @@ -139,6 +192,9 @@ u_translate_func gen_func; enum pipe_error ret = PIPE_OK; + SVGA_STATS_TIME_PUSH(svga_sws(hwtnl->svga), + SVGA_STATS_TIME_HWTNLDRAWELEMENTS); + if (svga_need_unfilled_fallback(hwtnl, prim)) { gen_type = u_unfilled_translator(prim, index_size, @@ -161,7 +217,7 @@ if (gen_type == U_TRANSLATE_MEMCPY) { /* No need for translation, just pass through to hardware: */ - return svga_hwtnl_simple_draw_range_elements(hwtnl, index_buffer, + ret = svga_hwtnl_simple_draw_range_elements(hwtnl, index_buffer, index_size, index_bias, min_index, @@ -183,7 +239,9 @@ ret = translate_indices(hwtnl, index_buffer, start * index_size, - gen_prim, gen_nr, gen_size, gen_func, &gen_buf); + prim, gen_prim, + count, gen_nr, gen_size, + gen_func, &gen_buf); if (ret != PIPE_OK) goto done; @@ -196,13 +254,11 @@ gen_prim, 0, gen_nr, start_instance, instance_count); - if (ret != PIPE_OK) - goto done; - done: if (gen_buf) pipe_resource_reference(&gen_buf, NULL); - - return ret; } + + SVGA_STATS_TIME_POP(svga_sws(hwtnl->svga)); + return ret; } diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svgadump/svga_dump.c mesa-17.0.7/src/gallium/drivers/svga/svgadump/svga_dump.c --- mesa-12.0.6/src/gallium/drivers/svga/svgadump/svga_dump.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svgadump/svga_dump.c 2017-06-01 10:37:10.000000000 +0000 @@ -30,6 +30,7 @@ * Generated automatically from svga3d_reg.h by svga_dump.py. */ +#include "../svga_format.h" #include "svga_types.h" #include "svga_shader_dump.h" #include "svga3d_reg.h" @@ -306,6 +307,49 @@ } static void +dump_SVGA3dViewport(const SVGA3dViewport *cmd) +{ + _debug_printf("\t\t.x = %f\n", (*cmd).x); + _debug_printf("\t\t.y = %f\n", (*cmd).y); + _debug_printf("\t\t.width = %f\n", (*cmd).width); + _debug_printf("\t\t.height = %f\n", (*cmd).height); + _debug_printf("\t\t.minDepth = %f\n", (*cmd).minDepth); + _debug_printf("\t\t.maxDepth = %f\n", (*cmd).maxDepth); +} + +static void +dump_SVGA3dSamplerId(const SVGA3dSamplerId *cmd) +{ + _debug_printf("\t\t.id = %u\n", *cmd); +} + +static void +dump_SVGA3dSoTarget(const SVGA3dSoTarget *cmd) +{ + _debug_printf("\t\t.sid = %u\n", (*cmd).sid); + _debug_printf("\t\t.offset = %u\n", (*cmd).offset); +} + +static void +dump_SVGA3dInputElementDesc(const SVGA3dInputElementDesc *cmd) +{ + _debug_printf("\t\t.inputSlot = %u\n", (*cmd).inputSlot); + _debug_printf("\t\t.alignedByteOffset = %u\n", (*cmd).alignedByteOffset); + _debug_printf("\t\t.format = %s\n", svga_format_name((*cmd).format)); + _debug_printf("\t\t.inputSlotClass = %u\n", (*cmd).inputSlotClass); + _debug_printf("\t\t.instanceDataStepRate = %u\n", (*cmd).instanceDataStepRate); + _debug_printf("\t\t.inputRegister = %u\n", (*cmd).inputRegister); +} + +static void +dump_SVGA3dVertexBuffer(const SVGA3dVertexBuffer *cmd) +{ + _debug_printf("\t\t.sid = %u\n", (*cmd).sid); + _debug_printf("\t\t.stride = %u\n", (*cmd).stride); + _debug_printf("\t\t.offset = %u\n", (*cmd).offset); +} + +static void dump_SVGA3dCopyBox(const SVGA3dCopyBox *cmd) { _debug_printf("\t\t.x = %u\n", (*cmd).x); @@ -320,6 +364,12 @@ } static void +dump_SVGA3dShaderResourceViewId(const SVGA3dShaderResourceViewId *id) +{ + _debug_printf("\t\t.id = %u\n", *id); +} + +static void dump_SVGA3dCmdSetClipPlane(const SVGA3dCmdSetClipPlane *cmd) { _debug_printf("\t\t.cid = %u\n", (*cmd).cid); @@ -921,9 +971,6 @@ case SVGA3D_SHADERTYPE_PS: _debug_printf("\t\t.type = SVGA3D_SHADERTYPE_PS\n"); break; - case SVGA3D_SHADERTYPE_PREDX_MAX: - _debug_printf("\t\t.type = SVGA3D_SHADERTYPE_MAX\n"); - break; default: _debug_printf("\t\t.type = %i\n", (*cmd).type); break; @@ -1240,9 +1287,6 @@ case SVGA3D_SHADERTYPE_PS: _debug_printf("\t\t.type = SVGA3D_SHADERTYPE_PS\n"); break; - case SVGA3D_SHADERTYPE_PREDX_MAX: - _debug_printf("\t\t.type = SVGA3D_SHADERTYPE_MAX\n"); - break; default: _debug_printf("\t\t.type = %i\n", (*cmd).type); break; @@ -1302,149 +1346,7 @@ _debug_printf("\t\t.surfaceFlags = %i\n", (*cmd).surfaceFlags); break; } - switch((*cmd).format) { - case SVGA3D_FORMAT_INVALID: - _debug_printf("\t\t.format = SVGA3D_FORMAT_INVALID\n"); - break; - case SVGA3D_X8R8G8B8: - _debug_printf("\t\t.format = SVGA3D_X8R8G8B8\n"); - break; - case SVGA3D_A8R8G8B8: - _debug_printf("\t\t.format = SVGA3D_A8R8G8B8\n"); - break; - case SVGA3D_R5G6B5: - _debug_printf("\t\t.format = SVGA3D_R5G6B5\n"); - break; - case SVGA3D_X1R5G5B5: - _debug_printf("\t\t.format = SVGA3D_X1R5G5B5\n"); - break; - case SVGA3D_A1R5G5B5: - _debug_printf("\t\t.format = SVGA3D_A1R5G5B5\n"); - break; - case SVGA3D_A4R4G4B4: - _debug_printf("\t\t.format = SVGA3D_A4R4G4B4\n"); - break; - case SVGA3D_Z_D32: - _debug_printf("\t\t.format = SVGA3D_Z_D32\n"); - break; - case SVGA3D_Z_D16: - _debug_printf("\t\t.format = SVGA3D_Z_D16\n"); - break; - case SVGA3D_Z_D24S8: - _debug_printf("\t\t.format = SVGA3D_Z_D24S8\n"); - break; - case SVGA3D_Z_D15S1: - _debug_printf("\t\t.format = SVGA3D_Z_D15S1\n"); - break; - case SVGA3D_LUMINANCE8: - _debug_printf("\t\t.format = SVGA3D_LUMINANCE8\n"); - break; - case SVGA3D_LUMINANCE4_ALPHA4: - _debug_printf("\t\t.format = SVGA3D_LUMINANCE4_ALPHA4\n"); - break; - case SVGA3D_LUMINANCE16: - _debug_printf("\t\t.format = SVGA3D_LUMINANCE16\n"); - break; - case SVGA3D_LUMINANCE8_ALPHA8: - _debug_printf("\t\t.format = SVGA3D_LUMINANCE8_ALPHA8\n"); - break; - case SVGA3D_DXT1: - _debug_printf("\t\t.format = SVGA3D_DXT1\n"); - break; - case SVGA3D_DXT2: - _debug_printf("\t\t.format = SVGA3D_DXT2\n"); - break; - case SVGA3D_DXT3: - _debug_printf("\t\t.format = SVGA3D_DXT3\n"); - break; - case SVGA3D_DXT4: - _debug_printf("\t\t.format = SVGA3D_DXT4\n"); - break; - case SVGA3D_DXT5: - _debug_printf("\t\t.format = SVGA3D_DXT5\n"); - break; - case SVGA3D_BUMPU8V8: - _debug_printf("\t\t.format = SVGA3D_BUMPU8V8\n"); - break; - case SVGA3D_BUMPL6V5U5: - _debug_printf("\t\t.format = SVGA3D_BUMPL6V5U5\n"); - break; - case SVGA3D_ARGB_S10E5: - _debug_printf("\t\t.format = SVGA3D_ARGB_S10E5\n"); - break; - case SVGA3D_ARGB_S23E8: - _debug_printf("\t\t.format = SVGA3D_ARGB_S23E8\n"); - break; - case SVGA3D_A2R10G10B10: - _debug_printf("\t\t.format = SVGA3D_A2R10G10B10\n"); - break; - case SVGA3D_V8U8: - _debug_printf("\t\t.format = SVGA3D_V8U8\n"); - break; - case SVGA3D_Q8W8V8U8: - _debug_printf("\t\t.format = SVGA3D_Q8W8V8U8\n"); - break; - case SVGA3D_CxV8U8: - _debug_printf("\t\t.format = SVGA3D_CxV8U8\n"); - break; - case SVGA3D_X8L8V8U8: - _debug_printf("\t\t.format = SVGA3D_X8L8V8U8\n"); - break; - case SVGA3D_A2W10V10U10: - _debug_printf("\t\t.format = SVGA3D_A2W10V10U10\n"); - break; - case SVGA3D_ALPHA8: - _debug_printf("\t\t.format = SVGA3D_ALPHA8\n"); - break; - case SVGA3D_R_S10E5: - _debug_printf("\t\t.format = SVGA3D_R_S10E5\n"); - break; - case SVGA3D_R_S23E8: - _debug_printf("\t\t.format = SVGA3D_R_S23E8\n"); - break; - case SVGA3D_RG_S10E5: - _debug_printf("\t\t.format = SVGA3D_RG_S10E5\n"); - break; - case SVGA3D_RG_S23E8: - _debug_printf("\t\t.format = SVGA3D_RG_S23E8\n"); - break; - case SVGA3D_BUFFER: - _debug_printf("\t\t.format = SVGA3D_BUFFER\n"); - break; - case SVGA3D_Z_D24X8: - _debug_printf("\t\t.format = SVGA3D_Z_D24X8\n"); - break; - case SVGA3D_G16R16: - _debug_printf("\t\t.format = SVGA3D_G16R16\n"); - break; - case SVGA3D_A16B16G16R16: - _debug_printf("\t\t.format = SVGA3D_A16B16G16R16\n"); - break; - case SVGA3D_UYVY: - _debug_printf("\t\t.format = SVGA3D_UYVY\n"); - break; - case SVGA3D_YUY2: - _debug_printf("\t\t.format = SVGA3D_YUY2\n"); - break; - case SVGA3D_NV12: - _debug_printf("\t\t.format = SVGA3D_NV12\n"); - break; - case SVGA3D_AYUV: - _debug_printf("\t\t.format = SVGA3D_AYUV\n"); - break; - case SVGA3D_Z_DF16: - _debug_printf("\t\t.format = SVGA3D_Z_D16\n"); - break; - case SVGA3D_Z_DF24: - _debug_printf("\t\t.format = SVGA3D_Z_DF24\n"); - break; - case SVGA3D_Z_D24S8_INT: - _debug_printf("\t\t.format = SVGA3D_Z_D24S8_INT\n"); - break; - default: - _debug_printf("\t\t.format = %i\n", (*cmd).format); - break; - } + _debug_printf("\t\t.format = %s\n", svga_format_name((*cmd).format)); _debug_printf("\t\t.face[0].numMipLevels = %u\n", (*cmd).face[0].numMipLevels); _debug_printf("\t\t.face[1].numMipLevels = %u\n", (*cmd).face[1].numMipLevels); _debug_printf("\t\t.face[2].numMipLevels = %u\n", (*cmd).face[2].numMipLevels); @@ -1463,6 +1365,14 @@ } static void +dump_SVGA3dBox(const SVGA3dBox *box) +{ + _debug_printf("\t\t.box = %u, %u, %u %u x %u x %u\n", + box->x, box->y, box->z, + box->w, box->h, box->d); +} + +static void dump_SVGA3dCmdBlitSurfaceToScreen(const SVGA3dCmdBlitSurfaceToScreen *cmd) { _debug_printf("\t\t.srcImage.sid = %u\n", (*cmd).srcImage.sid); @@ -1540,9 +1450,7 @@ _debug_printf("\t\t.image.sid = %u\n", cmd->image.sid); _debug_printf("\t\t.image.face = %u\n", cmd->image.face); _debug_printf("\t\t.image.mipmap = %u\n", cmd->image.mipmap); - _debug_printf("\t\t.box = %u, %u, %u %u x %u x %u\n", - cmd->box.x, cmd->box.y, cmd->box.z, - cmd->box.w, cmd->box.h, cmd->box.d); + dump_SVGA3dBox(&cmd->box); } static void @@ -1567,12 +1475,603 @@ _debug_printf("\t\t.image.sid = %u\n", cmd->image.sid); _debug_printf("\t\t.image.face = %u\n", cmd->image.face); _debug_printf("\t\t.image.mipmap = %u\n", cmd->image.mipmap); - _debug_printf("\t\t.box = %u, %u, %u %u x %u x %u\n", - cmd->box.x, cmd->box.y, cmd->box.z, - cmd->box.w, cmd->box.h, cmd->box.d); + dump_SVGA3dBox(&cmd->box); _debug_printf("\t\t.invertBox = %u\n", cmd->invertBox); } +/// SVGA_3D_CMD_DX + +#define __SVGA3D_DUMP_STRINGIFY(a) #a +#define SVGA3D_DUMP_STRINGIFY(a) __SVGA3D_DUMP_STRINGIFY(a) + +#define SVGA3D_DUMP_HEADER(CommandName) \ +static void \ +dump_SVGA3dCmdDX##CommandName(const SVGA3dCmdDX##CommandName *cmd) + +#define SVGA3D_DUMP_PARAMETER(ParameterName, ParameterType) \ +_debug_printf(SVGA3D_DUMP_STRINGIFY(\t\t.ParameterName = %ParameterType\n), cmd->ParameterName) + +#define SVGA3D_DUMP_TYPE_CASE(TypeVariableName, CaseName) \ +case CaseName: \ + _debug_printf(SVGA3D_DUMP_STRINGIFY(\t\t.TypeVariableName = CaseName) "\n"); \ + break; + +#define SVGA3D_DUMP_TYPE_DEFAULT(TypeVariableName) \ +default: \ + _debug_printf(SVGA3D_DUMP_STRINGIFY(\t\t.TypeVariableName = %i\n), (*cmd).TypeVariableName); \ + break; + +SVGA3D_DUMP_HEADER(SetShader) +{ + SVGA3D_DUMP_PARAMETER(shaderId, u); + debug_printf("\t\t.type = %s\n", shader_name(cmd->type)); +} + +SVGA3D_DUMP_HEADER(SetSamplers) +{ + SVGA3D_DUMP_PARAMETER(startSampler, u); + debug_printf("\t\t.type = %s\n", shader_name(cmd->type)); + /* XXX: note we're not printing the sampler IDs at this time */ +} + +SVGA3D_DUMP_HEADER(Draw) +{ + SVGA3D_DUMP_PARAMETER(vertexCount, u); + SVGA3D_DUMP_PARAMETER(startVertexLocation, u); +} + +SVGA3D_DUMP_HEADER(DrawIndexed) +{ + SVGA3D_DUMP_PARAMETER(indexCount, u); + SVGA3D_DUMP_PARAMETER(startIndexLocation, u); + SVGA3D_DUMP_PARAMETER(baseVertexLocation, i); +} + +SVGA3D_DUMP_HEADER(DrawInstanced) +{ + SVGA3D_DUMP_PARAMETER(vertexCountPerInstance, u); + SVGA3D_DUMP_PARAMETER(instanceCount, u); + SVGA3D_DUMP_PARAMETER(startVertexLocation, u); + SVGA3D_DUMP_PARAMETER(startInstanceLocation, u); +} + +SVGA3D_DUMP_HEADER(DrawIndexedInstanced) +{ + SVGA3D_DUMP_PARAMETER(indexCountPerInstance, u); + SVGA3D_DUMP_PARAMETER(instanceCount, u); + SVGA3D_DUMP_PARAMETER(startIndexLocation, u); + SVGA3D_DUMP_PARAMETER(baseVertexLocation, i); + SVGA3D_DUMP_PARAMETER(startInstanceLocation, u); +} + +SVGA3D_DUMP_HEADER(DrawAuto) +{ +} + +SVGA3D_DUMP_HEADER(SetBlendState) +{ + SVGA3D_DUMP_PARAMETER(blendId, u); + _debug_printf("\t\t.blendFactor[4] = %f %f %f %f\n", cmd->blendFactor[0], + cmd->blendFactor[1], + cmd->blendFactor[2], + cmd->blendFactor[3]); + SVGA3D_DUMP_PARAMETER(sampleMask, u); +} + +SVGA3D_DUMP_HEADER(SetDepthStencilState) +{ + SVGA3D_DUMP_PARAMETER(depthStencilId, u); + SVGA3D_DUMP_PARAMETER(stencilRef, u); +} + +SVGA3D_DUMP_HEADER(SetRasterizerState) +{ + SVGA3D_DUMP_PARAMETER(rasterizerId, u); +} + +SVGA3D_DUMP_HEADER(DefineQuery) +{ + SVGA3D_DUMP_PARAMETER(queryId, u); + switch (cmd->type) + { + SVGA3D_DUMP_TYPE_CASE(type, SVGA3D_QUERYTYPE_OCCLUSION); + SVGA3D_DUMP_TYPE_CASE(type, SVGA3D_QUERYTYPE_MAX); + SVGA3D_DUMP_TYPE_DEFAULT(type); + } + switch (cmd->flags) + { + SVGA3D_DUMP_TYPE_CASE(flags, SVGA3D_DXQUERY_FLAG_PREDICATEHINT); + SVGA3D_DUMP_TYPE_DEFAULT(flags); + } +} + +SVGA3D_DUMP_HEADER(DestroyQuery) +{ + SVGA3D_DUMP_PARAMETER(queryId, u); +} + +SVGA3D_DUMP_HEADER(BindAllQuery) +{ + SVGA3D_DUMP_PARAMETER(cid, u); + SVGA3D_DUMP_PARAMETER(mobid, u); +} + +SVGA3D_DUMP_HEADER(BindQuery) +{ + SVGA3D_DUMP_PARAMETER(queryId, u); + SVGA3D_DUMP_PARAMETER(mobid, u); +} + +SVGA3D_DUMP_HEADER(MoveQuery) +{ + SVGA3D_DUMP_PARAMETER(queryId, u); + SVGA3D_DUMP_PARAMETER(mobid, u); + SVGA3D_DUMP_PARAMETER(mobOffset, u); +} + +SVGA3D_DUMP_HEADER(ReadbackAllQuery) +{ + SVGA3D_DUMP_PARAMETER(cid, u); +} + +SVGA3D_DUMP_HEADER(SetQueryOffset) +{ + SVGA3D_DUMP_PARAMETER(queryId, u); + SVGA3D_DUMP_PARAMETER(mobOffset, u); +} + +SVGA3D_DUMP_HEADER(BeginQuery) +{ + SVGA3D_DUMP_PARAMETER(queryId, u); +} + +SVGA3D_DUMP_HEADER(EndQuery) +{ + SVGA3D_DUMP_PARAMETER(queryId, u); +} + +SVGA3D_DUMP_HEADER(SetPredication) +{ + SVGA3D_DUMP_PARAMETER(queryId, u); + SVGA3D_DUMP_PARAMETER(predicateValue, u); +} + +SVGA3D_DUMP_HEADER(SetSOTargets) +{ +} + + +SVGA3D_DUMP_HEADER(BindContext) +{ + SVGA3D_DUMP_PARAMETER(mobid, u); + SVGA3D_DUMP_PARAMETER(validContents, u); +} + +SVGA3D_DUMP_HEADER(SetViewports) +{ + + /* XXX: note we're not printing the SVGA3dViewport list at this time */ +} + +SVGA3D_DUMP_HEADER(SetScissorRects) +{ + + /* XXX: note we're not printing the SVGASignedRect list at this time */ +} + +SVGA3D_DUMP_HEADER(ClearRenderTargetView) +{ + SVGA3D_DUMP_PARAMETER(renderTargetViewId, u); + SVGA3D_DUMP_PARAMETER(rgba.r, f); + SVGA3D_DUMP_PARAMETER(rgba.g, f); + SVGA3D_DUMP_PARAMETER(rgba.b, f); + SVGA3D_DUMP_PARAMETER(rgba.a, f); +} + +SVGA3D_DUMP_HEADER(ClearDepthStencilView) +{ + SVGA3D_DUMP_PARAMETER(flags, u); + SVGA3D_DUMP_PARAMETER(stencil, u); + SVGA3D_DUMP_PARAMETER(depthStencilViewId, u); + SVGA3D_DUMP_PARAMETER(depth, f); +} + +SVGA3D_DUMP_HEADER(DefineShaderResourceView) +{ + SVGA3D_DUMP_PARAMETER(shaderResourceViewId, u); + SVGA3D_DUMP_PARAMETER(sid, u); + _debug_printf("\t\t.format = %s\n", svga_format_name(cmd->format)); + switch (cmd->resourceDimension) + { + SVGA3D_DUMP_TYPE_CASE(resourceDimension, SVGA3D_RESOURCE_BUFFER); + SVGA3D_DUMP_TYPE_CASE(resourceDimension, SVGA3D_RESOURCE_TEXTURE1D); + SVGA3D_DUMP_TYPE_CASE(resourceDimension, SVGA3D_RESOURCE_TEXTURE2D); + SVGA3D_DUMP_TYPE_CASE(resourceDimension, SVGA3D_RESOURCE_TEXTURE3D); + SVGA3D_DUMP_TYPE_CASE(resourceDimension, SVGA3D_RESOURCE_TEXTURECUBE); + SVGA3D_DUMP_TYPE_CASE(resourceDimension, SVGA3D_RESOURCE_TYPE_MAX); + SVGA3D_DUMP_TYPE_DEFAULT(resourceDimension); + } + if (cmd->resourceDimension == SVGA3D_RESOURCE_BUFFER) { + SVGA3D_DUMP_PARAMETER(desc.buffer.firstElement, u); + SVGA3D_DUMP_PARAMETER(desc.buffer.numElements, u); + } + else { + SVGA3D_DUMP_PARAMETER(desc.tex.mostDetailedMip, u); + SVGA3D_DUMP_PARAMETER(desc.tex.firstArraySlice, u); + SVGA3D_DUMP_PARAMETER(desc.tex.mipLevels, u); + SVGA3D_DUMP_PARAMETER(desc.tex.arraySize, u); + } +} + +SVGA3D_DUMP_HEADER(SetShaderResources) +{ + SVGA3D_DUMP_PARAMETER(startView, u); + debug_printf("\t\t.type = %s\n", shader_name(cmd->type)); +} + + +SVGA3D_DUMP_HEADER(DestroyShaderResourceView) +{ + SVGA3D_DUMP_PARAMETER(shaderResourceViewId, u); +} + +SVGA3D_DUMP_HEADER(DefineRenderTargetView) +{ + SVGA3D_DUMP_PARAMETER(renderTargetViewId, u); + SVGA3D_DUMP_PARAMETER(sid, u); + _debug_printf("\t\t.format = %s\n", svga_format_name(cmd->format)); + switch (cmd->resourceDimension) + { + SVGA3D_DUMP_TYPE_CASE(resourceDimension, SVGA3D_RESOURCE_BUFFER); + SVGA3D_DUMP_TYPE_CASE(resourceDimension, SVGA3D_RESOURCE_TEXTURE1D); + SVGA3D_DUMP_TYPE_CASE(resourceDimension, SVGA3D_RESOURCE_TEXTURE2D); + SVGA3D_DUMP_TYPE_CASE(resourceDimension, SVGA3D_RESOURCE_TEXTURE3D); + SVGA3D_DUMP_TYPE_CASE(resourceDimension, SVGA3D_RESOURCE_TEXTURECUBE); + SVGA3D_DUMP_TYPE_CASE(resourceDimension, SVGA3D_RESOURCE_TYPE_MAX); + SVGA3D_DUMP_TYPE_DEFAULT(resourceDimension); + } + SVGA3D_DUMP_PARAMETER(desc.buffer.firstElement, u); + SVGA3D_DUMP_PARAMETER(desc.buffer.numElements, u); + SVGA3D_DUMP_PARAMETER(desc.tex.mipSlice, u); + SVGA3D_DUMP_PARAMETER(desc.tex.firstArraySlice, u); + SVGA3D_DUMP_PARAMETER(desc.tex.arraySize, u); + SVGA3D_DUMP_PARAMETER(desc.tex3D.mipSlice, u); + SVGA3D_DUMP_PARAMETER(desc.tex3D.firstW, u); + SVGA3D_DUMP_PARAMETER(desc.tex3D.wSize, u); +} + +SVGA3D_DUMP_HEADER(DestroyRenderTargetView) +{ + SVGA3D_DUMP_PARAMETER(renderTargetViewId, u); +} + +SVGA3D_DUMP_HEADER(DefineDepthStencilView) +{ + SVGA3D_DUMP_PARAMETER(depthStencilViewId, u); + SVGA3D_DUMP_PARAMETER(sid, u); + _debug_printf("\t\t.format = %s\n", svga_format_name(cmd->format)); + switch (cmd->resourceDimension) + { + SVGA3D_DUMP_TYPE_CASE(resourceDimension, SVGA3D_RESOURCE_BUFFER); + SVGA3D_DUMP_TYPE_CASE(resourceDimension, SVGA3D_RESOURCE_TEXTURE1D); + SVGA3D_DUMP_TYPE_CASE(resourceDimension, SVGA3D_RESOURCE_TEXTURE2D); + SVGA3D_DUMP_TYPE_CASE(resourceDimension, SVGA3D_RESOURCE_TEXTURE3D); + SVGA3D_DUMP_TYPE_CASE(resourceDimension, SVGA3D_RESOURCE_TEXTURECUBE); + SVGA3D_DUMP_TYPE_CASE(resourceDimension, SVGA3D_RESOURCE_TYPE_MAX); + SVGA3D_DUMP_TYPE_DEFAULT(resourceDimension); + } + SVGA3D_DUMP_PARAMETER(mipSlice, u); + SVGA3D_DUMP_PARAMETER(firstArraySlice, u); + SVGA3D_DUMP_PARAMETER(arraySize, u); +} + +SVGA3D_DUMP_HEADER(DestroyDepthStencilView) +{ + SVGA3D_DUMP_PARAMETER(depthStencilViewId, u); +} + +SVGA3D_DUMP_HEADER(DefineElementLayout) +{ + SVGA3D_DUMP_PARAMETER(elementLayoutId, u); +} + +SVGA3D_DUMP_HEADER(DestroyElementLayout) +{ + SVGA3D_DUMP_PARAMETER(elementLayoutId, u); +} + +static void +dump_SVGA3dCmdDXDefineBlendState(const SVGA3dCmdDXDefineBlendState *cmd) +{ + unsigned i; + + SVGA3D_DUMP_PARAMETER(blendId, u); + SVGA3D_DUMP_PARAMETER(alphaToCoverageEnable, u); + SVGA3D_DUMP_PARAMETER(independentBlendEnable, u); + for (i = 0; i < SVGA3D_DX_MAX_RENDER_TARGETS; i++) { + const SVGA3dDXBlendStatePerRT *rt = cmd->perRT + i; + _debug_printf("\t\t.perRT[%u].blendEnable = %u\n", i, rt->blendEnable); + if (rt->blendEnable) { + _debug_printf("\t\t.perRT[%u].srcBlend = %u\n", i, rt->srcBlend); + _debug_printf("\t\t.perRT[%u].destBlend = %u\n", i, rt->destBlend); + _debug_printf("\t\t.perRT[%u].blendOp = %u\n", i, rt->blendOp); + _debug_printf("\t\t.perRT[%u].srcBlendAlpha = %u\n", i, rt->srcBlendAlpha); + _debug_printf("\t\t.perRT[%u].destBlendAlpha = %u\n", i, rt->destBlendAlpha); + _debug_printf("\t\t.perRT[%u].blendOpAlpha = %u\n", i, rt->blendOpAlpha); + } + _debug_printf("\t\t.perRT[%u].renderTargetWriteMask = %u\n", i, rt->renderTargetWriteMask); + _debug_printf("\t\t.perRT[%u].logicOpEnable = %u\n", i, rt->logicOpEnable); + if (rt->logicOpEnable) { + _debug_printf("\t\t.perRT[%u].logicOp = %u\n", i, rt->logicOp); + } + } +} + +SVGA3D_DUMP_HEADER(DestroyBlendState) +{ + SVGA3D_DUMP_PARAMETER(blendId, u); +} + +SVGA3D_DUMP_HEADER(DefineDepthStencilState) +{ + SVGA3D_DUMP_PARAMETER(depthStencilId, u); + SVGA3D_DUMP_PARAMETER(depthEnable, u); + SVGA3D_DUMP_PARAMETER(depthWriteMask, u); + SVGA3D_DUMP_PARAMETER(depthFunc, u); + SVGA3D_DUMP_PARAMETER(stencilEnable, u); + SVGA3D_DUMP_PARAMETER(frontEnable, u); + SVGA3D_DUMP_PARAMETER(backEnable, u); + SVGA3D_DUMP_PARAMETER(stencilReadMask, u); + SVGA3D_DUMP_PARAMETER(stencilWriteMask, u); + SVGA3D_DUMP_PARAMETER(frontStencilFailOp, u); + SVGA3D_DUMP_PARAMETER(frontStencilDepthFailOp, u); + SVGA3D_DUMP_PARAMETER(frontStencilPassOp, u); + SVGA3D_DUMP_PARAMETER(frontStencilFunc, u); + SVGA3D_DUMP_PARAMETER(backStencilFailOp, u); + SVGA3D_DUMP_PARAMETER(backStencilDepthFailOp, u); + SVGA3D_DUMP_PARAMETER(backStencilPassOp, u); + SVGA3D_DUMP_PARAMETER(backStencilFunc, u); +} + +SVGA3D_DUMP_HEADER(DestroyDepthStencilState) +{ + SVGA3D_DUMP_PARAMETER(depthStencilId, u); +} + +SVGA3D_DUMP_HEADER(DefineRasterizerState) +{ + SVGA3D_DUMP_PARAMETER(rasterizerId, u); + SVGA3D_DUMP_PARAMETER(fillMode, u); + SVGA3D_DUMP_PARAMETER(cullMode, u); + SVGA3D_DUMP_PARAMETER(frontCounterClockwise, u); + SVGA3D_DUMP_PARAMETER(depthBias, u); + SVGA3D_DUMP_PARAMETER(depthBiasClamp, f); + SVGA3D_DUMP_PARAMETER(slopeScaledDepthBias, f); + SVGA3D_DUMP_PARAMETER(depthClipEnable, u); + SVGA3D_DUMP_PARAMETER(scissorEnable, u); + SVGA3D_DUMP_PARAMETER(multisampleEnable, u); + SVGA3D_DUMP_PARAMETER(antialiasedLineEnable, u); + SVGA3D_DUMP_PARAMETER(lineWidth, f); + SVGA3D_DUMP_PARAMETER(lineStippleEnable, u); + SVGA3D_DUMP_PARAMETER(lineStippleFactor, u); + SVGA3D_DUMP_PARAMETER(lineStipplePattern, u); + SVGA3D_DUMP_PARAMETER(provokingVertexLast, u); +} + +SVGA3D_DUMP_HEADER(DestroyRasterizerState) +{ + SVGA3D_DUMP_PARAMETER(rasterizerId, u); +} + +SVGA3D_DUMP_HEADER(DefineSamplerState) +{ + SVGA3D_DUMP_PARAMETER(samplerId, u); + SVGA3D_DUMP_PARAMETER(filter, u); + SVGA3D_DUMP_PARAMETER(addressU, u); + SVGA3D_DUMP_PARAMETER(addressV, u); + SVGA3D_DUMP_PARAMETER(addressW, u); + SVGA3D_DUMP_PARAMETER(mipLODBias, f); + SVGA3D_DUMP_PARAMETER(maxAnisotropy, u); + SVGA3D_DUMP_PARAMETER(comparisonFunc, u); + SVGA3D_DUMP_PARAMETER(borderColor.r, f); + SVGA3D_DUMP_PARAMETER(borderColor.g, f); + SVGA3D_DUMP_PARAMETER(borderColor.b, f); + SVGA3D_DUMP_PARAMETER(borderColor.a, f); + SVGA3D_DUMP_PARAMETER(minLOD, f); + SVGA3D_DUMP_PARAMETER(maxLOD, f); +} + +SVGA3D_DUMP_HEADER(DestroySamplerState) +{ + SVGA3D_DUMP_PARAMETER(samplerId, u); +} + +SVGA3D_DUMP_HEADER(DefineShader) +{ + SVGA3D_DUMP_PARAMETER(shaderId, u); + debug_printf("\t\t.type = %s\n", shader_name(cmd->type)); + SVGA3D_DUMP_PARAMETER(sizeInBytes, u); +} + +SVGA3D_DUMP_HEADER(DestroyShader) +{ + SVGA3D_DUMP_PARAMETER(shaderId, u); +} + +SVGA3D_DUMP_HEADER(BindShader) +{ + SVGA3D_DUMP_PARAMETER(cid, u); + SVGA3D_DUMP_PARAMETER(shid, u); + SVGA3D_DUMP_PARAMETER(mobid, u); + SVGA3D_DUMP_PARAMETER(offsetInBytes, u); +} + +SVGA3D_DUMP_HEADER(DefineStreamOutput) +{ + int i; + SVGA3D_DUMP_PARAMETER(soid, u); + SVGA3D_DUMP_PARAMETER(numOutputStreamEntries, u); + for (i = 0; i < SVGA3D_DX_MAX_SOTARGETS; i++) { + _debug_printf("\t\t.streamOutputStrideInBytes[%d] = %u\n", + i, cmd->streamOutputStrideInBytes[i]); + } + for (i = 0; i < 16; i++) + { + _debug_printf("\t\t.decl[%d].outputSlot = %u\n", i, cmd->decl[i].outputSlot); + _debug_printf("\t\t.decl[%d].registerIndex = %u\n", i, cmd->decl[i].registerIndex); + _debug_printf("\t\t.decl[%d].registerMask = %u\n", i, cmd->decl[i].registerMask); + } +} + +SVGA3D_DUMP_HEADER(DestroyStreamOutput) +{ + SVGA3D_DUMP_PARAMETER(soid, u); +} + +SVGA3D_DUMP_HEADER(SetStreamOutput) +{ + SVGA3D_DUMP_PARAMETER(soid, u); +} + +SVGA3D_DUMP_HEADER(SetSingleConstantBuffer) +{ + SVGA3D_DUMP_PARAMETER(slot, u); + SVGA3D_DUMP_PARAMETER(sid, u); + debug_printf("\t\t.type = %s\n", shader_name(cmd->type)); + SVGA3D_DUMP_PARAMETER(offsetInBytes, u); + SVGA3D_DUMP_PARAMETER(sizeInBytes, u); +} + +SVGA3D_DUMP_HEADER(SetInputLayout) +{ + SVGA3D_DUMP_PARAMETER(elementLayoutId, u); +} + +SVGA3D_DUMP_HEADER(SetVertexBuffers) +{ + SVGA3D_DUMP_PARAMETER(startBuffer, u); + + /* XXX: note we're not printing the SVGA3dVertexBuffer list at this time */ +} + +SVGA3D_DUMP_HEADER(SetTopology) +{ + switch (cmd->topology) + { + SVGA3D_DUMP_TYPE_CASE(topology, SVGA3D_PRIMITIVE_INVALID); + SVGA3D_DUMP_TYPE_CASE(topology, SVGA3D_PRIMITIVE_TRIANGLELIST); + SVGA3D_DUMP_TYPE_CASE(topology, SVGA3D_PRIMITIVE_POINTLIST); + SVGA3D_DUMP_TYPE_CASE(topology, SVGA3D_PRIMITIVE_LINELIST); + SVGA3D_DUMP_TYPE_CASE(topology, SVGA3D_PRIMITIVE_LINESTRIP); + SVGA3D_DUMP_TYPE_CASE(topology, SVGA3D_PRIMITIVE_TRIANGLESTRIP); + SVGA3D_DUMP_TYPE_CASE(topology, SVGA3D_PRIMITIVE_TRIANGLEFAN); + SVGA3D_DUMP_TYPE_CASE(topology, SVGA3D_PRIMITIVE_MAX); + SVGA3D_DUMP_TYPE_DEFAULT(topology); + } +} + +SVGA3D_DUMP_HEADER(SetIndexBuffer) +{ + SVGA3D_DUMP_PARAMETER(sid, u); + _debug_printf("\t\t.format = %s\n", svga_format_name(cmd->format)); + SVGA3D_DUMP_PARAMETER(offset, u); +} + +SVGA3D_DUMP_HEADER(PredCopyRegion) +{ + SVGA3D_DUMP_PARAMETER(dstSid, u); + SVGA3D_DUMP_PARAMETER(dstSubResource, u); + SVGA3D_DUMP_PARAMETER(srcSid, u); + SVGA3D_DUMP_PARAMETER(srcSubResource, u); + dump_SVGA3dCopyBox(&cmd->box); +} + +SVGA3D_DUMP_HEADER(PredCopy) +{ + SVGA3D_DUMP_PARAMETER(dstSid, u); + SVGA3D_DUMP_PARAMETER(srcSid, u); +} + +static void +dump_SVGA3dCmdDXUpdateSubResource(const SVGA3dCmdDXUpdateSubResource *cmd) +{ + SVGA3D_DUMP_PARAMETER(sid, u); + SVGA3D_DUMP_PARAMETER(subResource, u); + dump_SVGA3dBox(&cmd->box); +} + +static void +dump_SVGA3dCmdDXReadbackSubResource(const SVGA3dCmdDXReadbackSubResource *cmd) +{ + SVGA3D_DUMP_PARAMETER(sid, u); + SVGA3D_DUMP_PARAMETER(subResource, u); +} + +SVGA3D_DUMP_HEADER(BufferCopy) +{ + SVGA3D_DUMP_PARAMETER(dest, u); + SVGA3D_DUMP_PARAMETER(src, u); + SVGA3D_DUMP_PARAMETER(destX, u); + SVGA3D_DUMP_PARAMETER(srcX, u); + SVGA3D_DUMP_PARAMETER(width, u); + +} + +SVGA3D_DUMP_HEADER(BufferUpdate) +{ + SVGA3D_DUMP_PARAMETER(sid, u); + SVGA3D_DUMP_PARAMETER(x, u); + SVGA3D_DUMP_PARAMETER(width, u); + +} + +SVGA3D_DUMP_HEADER(GenMips) +{ + SVGA3D_DUMP_PARAMETER(shaderResourceViewId, u); +} + +SVGA3D_DUMP_HEADER(TransferFromBuffer) +{ + SVGA3D_DUMP_PARAMETER(srcSid, u); + SVGA3D_DUMP_PARAMETER(srcOffset, u); + SVGA3D_DUMP_PARAMETER(srcPitch, u); + SVGA3D_DUMP_PARAMETER(srcSlicePitch, u); + SVGA3D_DUMP_PARAMETER(destSid, u); + SVGA3D_DUMP_PARAMETER(destSubResource, u); + dump_SVGA3dBox(&cmd->destBox); +} + +static void +dump_SVGA3dCmdInvalidateGBSurface(const SVGA3dCmdInvalidateGBSurface *cmd) +{ + SVGA3D_DUMP_PARAMETER(sid, u); +} + +#define SVGA3D_DUMP_CASE_BASIC(CommandName, CommandCode) \ +case SVGA_3D_CMD_DX_##CommandCode: \ + _debug_printf(SVGA3D_DUMP_STRINGIFY(\tSVGA_3D_CMD_DX_##CommandCode) "\n"); \ + { \ + const SVGA3dCmdDX##CommandName *cmd = (const SVGA3dCmdDX##CommandName *)body; \ + dump_SVGA3dCmdDX##CommandName(cmd); \ + body = (const uint8_t *)&cmd[1]; \ + } \ + break + +#define SVGA3D_DUMP_CASE_LIST(CommandName, CommandCode, ElementType) \ +case SVGA_3D_CMD_DX_##CommandCode: \ + _debug_printf(SVGA3D_DUMP_STRINGIFY(\tSVGA_3D_CMD_DX_##CommandCode) "\n"); \ + { \ + const SVGA3dCmdDX##CommandName *cmd = (const SVGA3dCmdDX##CommandName *)body; \ + dump_SVGA3dCmdDX##CommandName(cmd); \ + body = (const uint8_t *)&cmd[1]; \ + while (body + sizeof(ElementType) <= next) \ + { \ + dump_##ElementType((const ElementType *)body); \ + body += sizeof(ElementType); \ + } \ + } \ + break + void svga_dump_command(uint32_t cmd_id, const void *data, uint32_t size) { @@ -1580,6 +2079,86 @@ const uint8_t *next = body + size; switch(cmd_id) { + SVGA3D_DUMP_CASE_BASIC(BindContext, BIND_CONTEXT); + SVGA3D_DUMP_CASE_LIST(SetViewports, SET_VIEWPORTS, SVGA3dViewport); + SVGA3D_DUMP_CASE_BASIC(SetShader, SET_SHADER); + SVGA3D_DUMP_CASE_LIST(SetSamplers, SET_SAMPLERS, SVGA3dSamplerId); + SVGA3D_DUMP_CASE_BASIC(SetBlendState, SET_BLEND_STATE); + SVGA3D_DUMP_CASE_BASIC(SetDepthStencilState, SET_DEPTHSTENCIL_STATE); + SVGA3D_DUMP_CASE_BASIC(SetRasterizerState, SET_RASTERIZER_STATE); + SVGA3D_DUMP_CASE_BASIC(SetPredication, SET_PREDICATION); + SVGA3D_DUMP_CASE_LIST(SetSOTargets, SET_SOTARGETS, SVGA3dSoTarget); + SVGA3D_DUMP_CASE_LIST(SetScissorRects, SET_SCISSORRECTS, SVGASignedRect); + SVGA3D_DUMP_CASE_BASIC(SetStreamOutput, SET_STREAMOUTPUT); + SVGA3D_DUMP_CASE_BASIC(SetSingleConstantBuffer, SET_SINGLE_CONSTANT_BUFFER); + SVGA3D_DUMP_CASE_BASIC(Draw, DRAW); + SVGA3D_DUMP_CASE_BASIC(DrawIndexed, DRAW_INDEXED); + SVGA3D_DUMP_CASE_BASIC(DrawInstanced, DRAW_INSTANCED); + SVGA3D_DUMP_CASE_BASIC(DrawIndexedInstanced, DRAW_INDEXED_INSTANCED); + SVGA3D_DUMP_CASE_BASIC(DrawAuto, DRAW_AUTO); + SVGA3D_DUMP_CASE_BASIC(DefineQuery, DEFINE_QUERY); + SVGA3D_DUMP_CASE_BASIC(DestroyQuery, DESTROY_QUERY); + SVGA3D_DUMP_CASE_BASIC(BindAllQuery, BIND_ALL_QUERY); + SVGA3D_DUMP_CASE_BASIC(BindQuery, BIND_QUERY); + SVGA3D_DUMP_CASE_BASIC(MoveQuery, MOVE_QUERY); + SVGA3D_DUMP_CASE_BASIC(ReadbackAllQuery, READBACK_ALL_QUERY); + SVGA3D_DUMP_CASE_BASIC(SetQueryOffset, SET_QUERY_OFFSET); + SVGA3D_DUMP_CASE_BASIC(BeginQuery, BEGIN_QUERY); + SVGA3D_DUMP_CASE_BASIC(EndQuery, END_QUERY); + SVGA3D_DUMP_CASE_BASIC(ClearRenderTargetView, CLEAR_RENDERTARGET_VIEW); + SVGA3D_DUMP_CASE_BASIC(ClearDepthStencilView, CLEAR_DEPTHSTENCIL_VIEW); + SVGA3D_DUMP_CASE_BASIC(DefineShaderResourceView, DEFINE_SHADERRESOURCE_VIEW); + SVGA3D_DUMP_CASE_LIST(SetShaderResources, SET_SHADER_RESOURCES, SVGA3dShaderResourceViewId); + SVGA3D_DUMP_CASE_BASIC(DestroyShaderResourceView, DESTROY_SHADERRESOURCE_VIEW); + SVGA3D_DUMP_CASE_BASIC(DefineRenderTargetView, DEFINE_RENDERTARGET_VIEW); + SVGA3D_DUMP_CASE_BASIC(DestroyRenderTargetView, DESTROY_RENDERTARGET_VIEW); + SVGA3D_DUMP_CASE_BASIC(DefineDepthStencilView, DEFINE_DEPTHSTENCIL_VIEW); + SVGA3D_DUMP_CASE_BASIC(DestroyDepthStencilView, DESTROY_DEPTHSTENCIL_VIEW); + SVGA3D_DUMP_CASE_LIST(DefineElementLayout, DEFINE_ELEMENTLAYOUT, SVGA3dInputElementDesc); + SVGA3D_DUMP_CASE_BASIC(DestroyElementLayout, DESTROY_ELEMENTLAYOUT); + SVGA3D_DUMP_CASE_BASIC(DefineBlendState, DEFINE_BLEND_STATE); + SVGA3D_DUMP_CASE_BASIC(DestroyBlendState, DESTROY_BLEND_STATE); + SVGA3D_DUMP_CASE_BASIC(DefineDepthStencilState, DEFINE_DEPTHSTENCIL_STATE); + SVGA3D_DUMP_CASE_BASIC(DestroyDepthStencilState, DESTROY_DEPTHSTENCIL_STATE); + SVGA3D_DUMP_CASE_BASIC(DefineRasterizerState, DEFINE_RASTERIZER_STATE); + SVGA3D_DUMP_CASE_BASIC(DestroyRasterizerState, DESTROY_RASTERIZER_STATE); + SVGA3D_DUMP_CASE_BASIC(DefineSamplerState, DEFINE_SAMPLER_STATE); + SVGA3D_DUMP_CASE_BASIC(DestroySamplerState, DESTROY_SAMPLER_STATE); + SVGA3D_DUMP_CASE_BASIC(DefineShader, DEFINE_SHADER); + SVGA3D_DUMP_CASE_BASIC(DestroyShader, DESTROY_SHADER); + SVGA3D_DUMP_CASE_BASIC(BindShader, BIND_SHADER); + SVGA3D_DUMP_CASE_BASIC(DefineStreamOutput, DEFINE_STREAMOUTPUT); + SVGA3D_DUMP_CASE_BASIC(DestroyStreamOutput, DESTROY_STREAMOUTPUT); + SVGA3D_DUMP_CASE_BASIC(SetInputLayout, SET_INPUT_LAYOUT); + SVGA3D_DUMP_CASE_LIST(SetVertexBuffers, SET_VERTEX_BUFFERS, SVGA3dVertexBuffer); + SVGA3D_DUMP_CASE_BASIC(SetTopology, SET_TOPOLOGY); + SVGA3D_DUMP_CASE_BASIC(SetIndexBuffer, SET_INDEX_BUFFER); + + SVGA3D_DUMP_CASE_BASIC(PredCopy, PRED_COPY); + SVGA3D_DUMP_CASE_BASIC(UpdateSubResource, UPDATE_SUBRESOURCE); + SVGA3D_DUMP_CASE_BASIC(ReadbackSubResource, READBACK_SUBRESOURCE); + SVGA3D_DUMP_CASE_BASIC(PredCopyRegion, PRED_COPY_REGION); + SVGA3D_DUMP_CASE_BASIC(BufferCopy, BUFFER_COPY); + SVGA3D_DUMP_CASE_BASIC(BufferUpdate, BUFFER_UPDATE); + SVGA3D_DUMP_CASE_BASIC(GenMips, GENMIPS); + SVGA3D_DUMP_CASE_BASIC(TransferFromBuffer, TRANSFER_FROM_BUFFER); + + case SVGA_3D_CMD_DX_SET_RENDERTARGETS: + _debug_printf("\tSVGA_3D_CMD_DX_SET_RENDERTARGETS\n"); + { + const SVGA3dCmdDXSetRenderTargets *cmd = + (const SVGA3dCmdDXSetRenderTargets *) body; + _debug_printf("\t\t.depthStencilViewId = %u\n", + cmd->depthStencilViewId); + body = (const uint8_t *) &cmd[1]; + while (body + sizeof(SVGA3dRenderTargetViewId) <= next) { + _debug_printf("\t\t.renderTargetViewId = %u\n", + *((SVGA3dRenderTargetViewId *) body)); + body += sizeof(SVGA3dRenderTargetViewId); + } + } + break; + case SVGA_3D_CMD_SURFACE_DEFINE: _debug_printf("\tSVGA_3D_CMD_SURFACE_DEFINE\n"); { @@ -1972,6 +2551,14 @@ body = next; } break; + case SVGA_3D_CMD_INVALIDATE_GB_SURFACE: + _debug_printf("\tSVGA_3D_CMD_INVALIDATE_GB_SURFACE\n"); + { + const SVGA3dCmdInvalidateGBSurface *cmd = (const SVGA3dCmdInvalidateGBSurface *)body; + dump_SVGA3dCmdInvalidateGBSurface(cmd); + body = (const uint8_t *)&cmd[1]; + } + break; default: _debug_printf("\t0x%08x\n", cmd_id); break; diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svgadump/svga_shader_dump.c mesa-17.0.7/src/gallium/drivers/svga/svgadump/svga_shader_dump.c --- mesa-12.0.6/src/gallium/drivers/svga/svgadump/svga_shader_dump.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svgadump/svga_shader_dump.c 2017-06-01 10:37:10.000000000 +0000 @@ -30,6 +30,9 @@ * @author Michal Krol */ +#include +#include + #include "svga_shader.h" #include "svga_shader_dump.h" #include "svga_shader_op.h" @@ -413,6 +416,11 @@ static void dump_srcreg( struct sh_srcreg srcreg, struct sh_srcreg *indreg, const struct dump_info *di ) { + struct sh_reg srcreg_sh = {0}; + /* bit-fields carefully aligned, ensure they stay that way. */ + STATIC_ASSERT(sizeof(struct sh_reg) == sizeof(struct sh_srcreg)); + memcpy(&srcreg_sh, &srcreg, sizeof(srcreg_sh)); + switch (srcreg.modifier) { case SVGA3DSRCMOD_NEG: case SVGA3DSRCMOD_BIASNEG: @@ -427,7 +435,7 @@ case SVGA3DSRCMOD_NOT: _debug_printf( "!" ); } - dump_reg( *(struct sh_reg *) &srcreg, indreg, di ); + dump_reg(srcreg_sh, indreg, di ); switch (srcreg.modifier) { case SVGA3DSRCMOD_NONE: case SVGA3DSRCMOD_NEG: diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_format.c mesa-17.0.7/src/gallium/drivers/svga/svga_format.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_format.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_format.c 2017-06-01 10:37:10.000000000 +0000 @@ -242,11 +242,11 @@ { PIPE_FORMAT_R16G16B16A16_SINT, SVGA3D_R16G16B16A16_SINT, SVGA3D_R16G16B16A16_SINT, 0 }, { PIPE_FORMAT_R32_UINT, SVGA3D_R32_UINT, SVGA3D_R32_UINT, 0 }, { PIPE_FORMAT_R32G32_UINT, SVGA3D_R32G32_UINT, SVGA3D_R32G32_UINT, 0 }, - { PIPE_FORMAT_R32G32B32_UINT, SVGA3D_R32G32B32_UINT, SVGA3D_R32G32B32_UINT, 0 }, + { PIPE_FORMAT_R32G32B32_UINT, SVGA3D_R32G32B32_UINT, SVGA3D_FORMAT_INVALID, 0 }, { PIPE_FORMAT_R32G32B32A32_UINT, SVGA3D_R32G32B32A32_UINT, SVGA3D_R32G32B32A32_UINT, 0 }, { PIPE_FORMAT_R32_SINT, SVGA3D_R32_SINT, SVGA3D_R32_SINT, 0 }, { PIPE_FORMAT_R32G32_SINT, SVGA3D_R32G32_SINT, SVGA3D_R32G32_SINT, 0 }, - { PIPE_FORMAT_R32G32B32_SINT, SVGA3D_R32G32B32_SINT, SVGA3D_R32G32B32_SINT, 0 }, + { PIPE_FORMAT_R32G32B32_SINT, SVGA3D_R32G32B32_SINT, SVGA3D_FORMAT_INVALID, 0 }, { PIPE_FORMAT_R32G32B32A32_SINT, SVGA3D_R32G32B32A32_SINT, SVGA3D_R32G32B32A32_SINT, 0 }, { PIPE_FORMAT_A8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, { PIPE_FORMAT_I8_UINT, SVGA3D_FORMAT_INVALID, SVGA3D_FORMAT_INVALID, 0 }, @@ -379,7 +379,7 @@ * Translate from gallium format to SVGA3D format. */ SVGA3dSurfaceFormat -svga_translate_format(struct svga_screen *ss, +svga_translate_format(const struct svga_screen *ss, enum pipe_format format, unsigned bind) { @@ -1686,18 +1686,14 @@ SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET }, { - /* Special case: no devcap / report sampler, render target and - * depth/stencil ability - */ "SVGA3D_R32_FLOAT", SVGA3D_R32_FLOAT, - 0, /*SVGA3D_DEVCAP_DXFMT_R32_FLOAT*/ + SVGA3D_DEVCAP_DXFMT_R32_FLOAT, 1, 1, 4, SVGA3DFORMAT_OP_TEXTURE | SVGA3DFORMAT_OP_VOLUMETEXTURE | SVGA3DFORMAT_OP_CUBETEXTURE | - SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET | - SVGA3DFORMAT_OP_ZSTENCIL + SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET }, { "SVGA3D_R8G8_SNORM", @@ -1916,7 +1912,7 @@ *block_width = format_cap_table[format].block_width; *block_height = format_cap_table[format].block_height; *bytes_per_block = format_cap_table[format].block_bytes; - /* Make sure the the table entry was valid */ + /* Make sure the table entry was valid */ if (*block_width == 0) debug_printf("Bad table entry for %s\n", svga_format_name(format)); assert(*block_width); @@ -2193,3 +2189,54 @@ return format; } } + + +/** + * Is the given format an uncompressed snorm format? + */ +bool +svga_format_is_uncompressed_snorm(SVGA3dSurfaceFormat format) +{ + switch (format) { + case SVGA3D_R8G8B8A8_SNORM: + case SVGA3D_R8G8_SNORM: + case SVGA3D_R8_SNORM: + case SVGA3D_R16G16B16A16_SNORM: + case SVGA3D_R16G16_SNORM: + case SVGA3D_R16_SNORM: + return true; + default: + return false; + } +} + + +bool +svga_format_is_typeless(SVGA3dSurfaceFormat format) +{ + switch (format) { + case SVGA3D_R32G32B32A32_TYPELESS: + case SVGA3D_R32G32B32_TYPELESS: + case SVGA3D_R16G16B16A16_TYPELESS: + case SVGA3D_R32G32_TYPELESS: + case SVGA3D_R32G8X24_TYPELESS: + case SVGA3D_R10G10B10A2_TYPELESS: + case SVGA3D_R8G8B8A8_TYPELESS: + case SVGA3D_R16G16_TYPELESS: + case SVGA3D_R32_TYPELESS: + case SVGA3D_R24G8_TYPELESS: + case SVGA3D_R8G8_TYPELESS: + case SVGA3D_R16_TYPELESS: + case SVGA3D_R8_TYPELESS: + case SVGA3D_BC1_TYPELESS: + case SVGA3D_BC2_TYPELESS: + case SVGA3D_BC3_TYPELESS: + case SVGA3D_BC4_TYPELESS: + case SVGA3D_BC5_TYPELESS: + case SVGA3D_B8G8R8A8_TYPELESS: + case SVGA3D_B8G8R8X8_TYPELESS: + return true; + default: + return false; + } +} diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_format.h mesa-17.0.7/src/gallium/drivers/svga/svga_format.h --- mesa-12.0.6/src/gallium/drivers/svga/svga_format.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_format.h 2017-06-01 10:37:10.000000000 +0000 @@ -63,7 +63,7 @@ unsigned *vf_flags); enum SVGA3dSurfaceFormat -svga_translate_format(struct svga_screen *ss, +svga_translate_format(const struct svga_screen *ss, enum pipe_format format, unsigned bind); @@ -104,4 +104,11 @@ svga_sampler_format(SVGA3dSurfaceFormat format); +bool +svga_format_is_uncompressed_snorm(SVGA3dSurfaceFormat format); + + +bool +svga_format_is_typeless(SVGA3dSurfaceFormat format); + #endif /* SVGA_FORMAT_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_link.c mesa-17.0.7/src/gallium/drivers/svga/svga_link.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_link.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_link.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,6 +25,7 @@ #include "svga_context.h" #include "svga_link.h" +#include "svga_debug.h" #include "tgsi/tgsi_strings.h" @@ -97,13 +98,15 @@ } /* Debug */ - if (0) { + if (SVGA_DEBUG & DEBUG_TGSI) { unsigned reg = 0; + debug_printf("### linkage info:\n"); + for (i = 0; i < linkage->num_inputs; i++) { assert(linkage->input_map[i] != INVALID_INDEX); - debug_printf("input shader input[%d] slot %u %s %u %s\n", + debug_printf(" input[%d] slot %u %s %u %s\n", i, linkage->input_map[i], tgsi_semantic_names[inshader_info->input_semantic_name[i]], diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_mksstats.h mesa-17.0.7/src/gallium/drivers/svga/svga_mksstats.h --- mesa-12.0.6/src/gallium/drivers/svga/svga_mksstats.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_mksstats.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,49 @@ +/********************************************************** + * Copyright 2016 VMware, Inc. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + **********************************************************/ + +#ifndef _SVGA_MKSSTATS_H +#define _SVGA_MKSSTATS_H + +#include "svga_winsys.h" + +#ifdef VMX86_STATS +#define SVGA_STATS_COUNT_INC(_sws, _stat) \ + _sws->stats_inc(_stat); + +#define SVGA_STATS_TIME_PUSH(_sws, _stat) \ + struct svga_winsys_stats_timeframe timeFrame; \ + _sws->stats_time_push(_stat, &timeFrame); + +#define SVGA_STATS_TIME_POP(_sws) \ + _sws->stats_time_pop(); + +#else + +#define SVGA_STATS_COUNT_INC(_sws, _stat) +#define SVGA_STATS_TIME_PUSH(_sws, _stat) +#define SVGA_STATS_TIME_POP(_sws) + +#endif +#endif /* _SVGA_MKSSTATS_H */ diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_blend.c mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_blend.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_blend.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_blend.c 2017-06-01 10:37:10.000000000 +0000 @@ -37,6 +37,9 @@ static inline unsigned svga_translate_blend_factor(const struct svga_context *svga, unsigned factor) { + /* Note: there is no SVGA3D_BLENDOP_[INV]BLENDFACTORALPHA so + * we can't translate PIPE_BLENDFACTOR_[INV_]CONST_ALPHA properly. + */ switch (factor) { case PIPE_BLENDFACTOR_ZERO: return SVGA3D_BLENDOP_ZERO; case PIPE_BLENDFACTOR_SRC_ALPHA: return SVGA3D_BLENDOP_SRCALPHA; @@ -334,6 +337,8 @@ } svga->hud.num_blend_objects++; + SVGA_STATS_COUNT_INC(svga_screen(svga->pipe.screen)->sws, + SVGA_STATS_COUNT_BLENDSTATE); return blend; } diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_blit.c mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_blit.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_blit.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_blit.c 2017-06-01 10:37:10.000000000 +0000 @@ -23,10 +23,12 @@ * **********************************************************/ -#include "svga_resource_texture.h" #include "svga_context.h" #include "svga_debug.h" #include "svga_cmd.h" +#include "svga_format.h" +#include "svga_resource_buffer.h" +#include "svga_resource_texture.h" #include "svga_surface.h" //#include "util/u_blit_sw.h" @@ -36,15 +38,89 @@ #define FILE_DEBUG_FLAG DEBUG_BLIT +/** + * Copy an image between textures with the vgpu10 CopyRegion command. + */ static void -svga_surface_copy(struct pipe_context *pipe, - struct pipe_resource* dst_tex, - unsigned dst_level, - unsigned dstx, unsigned dsty, unsigned dstz, - struct pipe_resource* src_tex, - unsigned src_level, - const struct pipe_box *src_box) - { +copy_region_vgpu10(struct svga_context *svga, struct pipe_resource *src_tex, + unsigned src_x, unsigned src_y, unsigned src_z, + unsigned src_level, unsigned src_face, + struct pipe_resource *dst_tex, + unsigned dst_x, unsigned dst_y, unsigned dst_z, + unsigned dst_level, unsigned dst_face, + unsigned width, unsigned height, unsigned depth) +{ + enum pipe_error ret; + uint32 srcSubResource, dstSubResource; + struct svga_texture *dtex, *stex; + SVGA3dCopyBox box; + + stex = svga_texture(src_tex); + dtex = svga_texture(dst_tex); + + box.x = dst_x; + box.y = dst_y; + box.z = dst_z; + box.w = width; + box.h = height; + box.d = depth; + box.srcx = src_x; + box.srcy = src_y; + box.srcz = src_z; + + srcSubResource = src_face * (src_tex->last_level + 1) + src_level; + dstSubResource = dst_face * (dst_tex->last_level + 1) + dst_level; + + ret = SVGA3D_vgpu10_PredCopyRegion(svga->swc, + dtex->handle, dstSubResource, + stex->handle, srcSubResource, &box); + if (ret != PIPE_OK) { + svga_context_flush(svga, NULL); + ret = SVGA3D_vgpu10_PredCopyRegion(svga->swc, + dtex->handle, dstSubResource, + stex->handle, srcSubResource, &box); + assert(ret == PIPE_OK); + } + + /* Mark the texture subresource as defined. */ + svga_define_texture_level(dtex, dst_face, dst_level); + + /* Mark the texture subresource as rendered-to. */ + svga_set_texture_rendered_to(dtex, dst_face, dst_level); +} + + +/** + * For some texture types, we need to move the z (slice) coordinate + * to the layer value. For example, to select the z=3 slice of a 2D ARRAY + * texture, we need to use layer=3 and set z=0. + */ +static void +adjust_z_layer(enum pipe_texture_target target, + int z_in, unsigned *layer_out, unsigned *z_out) +{ + if (target == PIPE_TEXTURE_CUBE || + target == PIPE_TEXTURE_2D_ARRAY || + target == PIPE_TEXTURE_1D_ARRAY) { + *layer_out = z_in; + *z_out = 0; + } + else { + *layer_out = 0; + *z_out = z_in; + } +} + + +static void +svga_resource_copy_region(struct pipe_context *pipe, + struct pipe_resource *dst_tex, + unsigned dst_level, + unsigned dstx, unsigned dsty, unsigned dstz, + struct pipe_resource *src_tex, + unsigned src_level, + const struct pipe_box *src_box) +{ struct svga_context *svga = svga_context(pipe); struct svga_texture *stex, *dtex; unsigned dst_face_layer, dst_z, src_face_layer, src_z; @@ -53,78 +129,259 @@ */ svga_surfaces_flush( svga ); - /* Fallback for buffers. */ if (dst_tex->target == PIPE_BUFFER && src_tex->target == PIPE_BUFFER) { - util_resource_copy_region(pipe, dst_tex, dst_level, dstx, dsty, dstz, - src_tex, src_level, src_box); + /* can't copy within the same buffer, unfortunately */ + if (svga_have_vgpu10(svga) && src_tex != dst_tex) { + enum pipe_error ret; + struct svga_winsys_surface *src_surf; + struct svga_winsys_surface *dst_surf; + struct svga_buffer *dbuffer = svga_buffer(dst_tex); + + src_surf = svga_buffer_handle(svga, src_tex); + dst_surf = svga_buffer_handle(svga, dst_tex); + + ret = SVGA3D_vgpu10_BufferCopy(svga->swc, src_surf, dst_surf, + src_box->x, dstx, src_box->width); + if (ret != PIPE_OK) { + svga_context_flush(svga, NULL); + ret = SVGA3D_vgpu10_BufferCopy(svga->swc, src_surf, dst_surf, + src_box->x, dstx, src_box->width); + assert(ret == PIPE_OK); + } + + dbuffer->dirty = TRUE; + } + else { + /* use map/memcpy fallback */ + util_resource_copy_region(pipe, dst_tex, dst_level, dstx, + dsty, dstz, src_tex, src_level, src_box); + } return; } stex = svga_texture(src_tex); dtex = svga_texture(dst_tex); - if (src_tex->target == PIPE_TEXTURE_CUBE || - src_tex->target == PIPE_TEXTURE_1D_ARRAY) { - src_face_layer = src_box->z; - src_z = 0; - assert(src_box->depth == 1); - } - else { - src_face_layer = 0; - src_z = src_box->z; - } - - /* different src/dst type???*/ - if (dst_tex->target == PIPE_TEXTURE_CUBE || - dst_tex->target == PIPE_TEXTURE_1D_ARRAY) { - dst_face_layer = dstz; - dst_z = 0; - assert(src_box->depth == 1); - } - else { - dst_face_layer = 0; - dst_z = dstz; - } + adjust_z_layer(src_tex->target, src_box->z, &src_face_layer, &src_z); + adjust_z_layer(dst_tex->target, dstz, &dst_face_layer, &dst_z); - svga_texture_copy_handle(svga, - stex->handle, + if (svga_have_vgpu10(svga)) { + /* vgpu10 */ + if (util_format_is_compressed(src_tex->format) == + util_format_is_compressed(dst_tex->format) && + stex->handle != dtex->handle && + svga_resource_type(src_tex->target) == + svga_resource_type(dst_tex->target) && + stex->b.b.nr_samples == dtex->b.b.nr_samples) { + copy_region_vgpu10(svga, + src_tex, src_box->x, src_box->y, src_z, src_level, src_face_layer, - dtex->handle, + dst_tex, dstx, dsty, dst_z, dst_level, dst_face_layer, src_box->width, src_box->height, src_box->depth); + } + else { + util_resource_copy_region(pipe, dst_tex, dst_level, dstx, dsty, dstz, + src_tex, src_level, src_box); + } + } + else { + /* vgpu9 */ + if (src_tex->format == dst_tex->format) { + svga_texture_copy_handle(svga, + stex->handle, + src_box->x, src_box->y, src_z, + src_level, src_face_layer, + dtex->handle, + dstx, dsty, dst_z, + dst_level, dst_face_layer, + src_box->width, src_box->height, + src_box->depth); + } + else { + util_resource_copy_region(pipe, dst_tex, dst_level, dstx, dsty, dstz, + src_tex, src_level, src_box); + } + } /* Mark the destination image as being defined */ svga_define_texture_level(dtex, dst_face_layer, dst_level); } +/** + * Are the given pipe formats compatible, in terms of vgpu10's + * PredCopyRegion() command? + */ +static bool +formats_compatible(const struct svga_screen *ss, + enum pipe_format src_fmt, + enum pipe_format dst_fmt) +{ + SVGA3dSurfaceFormat src_svga_fmt, dst_svga_fmt; + + src_svga_fmt = svga_translate_format(ss, src_fmt, PIPE_BIND_SAMPLER_VIEW); + dst_svga_fmt = svga_translate_format(ss, dst_fmt, PIPE_BIND_SAMPLER_VIEW); + + src_svga_fmt = svga_typeless_format(src_svga_fmt); + dst_svga_fmt = svga_typeless_format(dst_svga_fmt); + + return src_svga_fmt == dst_svga_fmt; +} + + +/** + * The state tracker implements some resource copies with blits (for + * GL_ARB_copy_image). This function checks if we should really do the blit + * with a VGPU10 CopyRegion command or software fallback (for incompatible + * src/dst formats). + */ +static bool +can_blit_via_copy_region_vgpu10(struct svga_context *svga, + const struct pipe_blit_info *blit_info) +{ + struct svga_texture *dtex, *stex; + + if (!svga_have_vgpu10(svga)) + return false; + + stex = svga_texture(blit_info->src.resource); + dtex = svga_texture(blit_info->dst.resource); + + /* can't copy within one resource */ + if (stex->handle == dtex->handle) + return false; + + /* can't copy between different resource types */ + if (svga_resource_type(blit_info->src.resource->target) != + svga_resource_type(blit_info->dst.resource->target)) + return false; + + /* check that the blit src/dst regions are same size, no flipping, etc. */ + if (blit_info->src.box.width != blit_info->dst.box.width || + blit_info->src.box.height != blit_info->dst.box.height) + return false; + + /* check that sample counts are the same */ + if (stex->b.b.nr_samples != dtex->b.b.nr_samples) + return false; + + /* For depth+stencil formats, copy with mask != PIPE_MASK_ZS is not + * supported + */ + if (util_format_is_depth_and_stencil(blit_info->src.format) && + blit_info->mask != (PIPE_MASK_ZS)) + return false; + + if (blit_info->alpha_blend || + (svga->render_condition && blit_info->render_condition_enable) || + blit_info->scissor_enable) + return false; + + return formats_compatible(svga_screen(svga->pipe.screen), + blit_info->src.resource->format, + blit_info->dst.resource->format); +} + + +/** + * A helper function to determine if the specified view format + * is compatible with the surface format. + * It is compatible if the view format is the same as the surface format, + * or the associated svga format for the surface is a typeless format, or + * the view format is an adjusted format for BGRX/BGRA resource. + */ +static bool +is_view_format_compatible(enum pipe_format surf_fmt, + SVGA3dSurfaceFormat surf_svga_fmt, + enum pipe_format view_fmt) +{ + if (surf_fmt == view_fmt || svga_format_is_typeless(surf_svga_fmt)) + return true; + + if ((surf_fmt == PIPE_FORMAT_B8G8R8X8_UNORM && + view_fmt == PIPE_FORMAT_B8G8R8A8_UNORM) || + (surf_fmt == PIPE_FORMAT_B8G8R8A8_UNORM && + view_fmt == PIPE_FORMAT_B8G8R8X8_UNORM)) + return true; + + return false; +} + + static void svga_blit(struct pipe_context *pipe, const struct pipe_blit_info *blit_info) { struct svga_context *svga = svga_context(pipe); - struct pipe_blit_info info = *blit_info; + struct pipe_blit_info blit = *blit_info; + struct pipe_resource *src = blit.src.resource; + struct pipe_resource *dst = blit.dst.resource; + struct pipe_resource *newSrc = NULL; + struct pipe_resource *newDst = NULL; + bool can_create_src_view; + bool can_create_dst_view; if (!svga_have_vgpu10(svga) && - info.src.resource->nr_samples > 1 && - info.dst.resource->nr_samples <= 1 && - !util_format_is_depth_or_stencil(info.src.resource->format) && - !util_format_is_pure_integer(info.src.resource->format)) { + blit.src.resource->nr_samples > 1 && + blit.dst.resource->nr_samples <= 1 && + !util_format_is_depth_or_stencil(blit.src.resource->format) && + !util_format_is_pure_integer(blit.src.resource->format)) { debug_printf("svga: color resolve unimplemented\n"); return; } - if (util_try_blit_via_copy_region(pipe, &info)) { + if (can_blit_via_copy_region_vgpu10(svga, blit_info)) { + unsigned src_face, src_z, dst_face, dst_z; + + adjust_z_layer(blit.src.resource->target, blit.src.box.z, + &src_face, &src_z); + + adjust_z_layer(blit.dst.resource->target, blit.dst.box.z, + &dst_face, &dst_z); + + copy_region_vgpu10(svga, + blit.src.resource, + blit.src.box.x, blit.src.box.y, src_z, + blit.src.level, src_face, + blit.dst.resource, + blit.dst.box.x, blit.dst.box.y, dst_z, + blit.dst.level, dst_face, + blit.src.box.width, blit.src.box.height, + blit.src.box.depth); + return; + } + + if (util_can_blit_via_copy_region(blit_info, TRUE) || + util_can_blit_via_copy_region(blit_info, FALSE)) { + util_resource_copy_region(pipe, blit.dst.resource, + blit.dst.level, + blit.dst.box.x, blit.dst.box.y, + blit.dst.box.z, blit.src.resource, + blit.src.level, &blit.src.box); return; /* done */ } - if ((info.mask & PIPE_MASK_S) || - !util_blitter_is_blit_supported(svga->blitter, &info)) { + /* Check if we can create shader resource view and + * render target view for the quad blitter to work + */ + can_create_src_view = + is_view_format_compatible(src->format, svga_texture(src)->key.format, + blit.src.format); + + can_create_dst_view = + is_view_format_compatible(dst->format, svga_texture(dst)->key.format, + blit.dst.format); + + if ((blit.mask & PIPE_MASK_S) || + ((!can_create_dst_view || !can_create_src_view) + && !svga_have_vgpu10(svga)) || + !util_blitter_is_blit_supported(svga->blitter, &blit)) { debug_printf("svga: blit unsupported %s -> %s\n", - util_format_short_name(info.src.resource->format), - util_format_short_name(info.dst.resource->format)); + util_format_short_name(blit.src.resource->format), + util_format_short_name(blit.dst.resource->format)); return; } @@ -154,7 +411,98 @@ svga->curr.sampler_views[PIPE_SHADER_FRAGMENT]); /*util_blitter_save_render_condition(svga->blitter, svga->render_cond_query, svga->render_cond_cond, svga->render_cond_mode);*/ - util_blitter_blit(svga->blitter, &info); + + if (!can_create_src_view) { + struct pipe_resource template; + unsigned src_face, src_z; + + /** + * If the source blit format is not compatible with the source resource + * format, we will not be able to create a shader resource view. + * In order to avoid falling back to software blit, we'll create + * a new resource in the blit format, and use DXCopyResource to + * copy from the original format to the new format. The new + * resource will be used for the blit in util_blitter_blit(). + */ + template = *src; + template.format = blit.src.format; + newSrc = svga_texture_create(svga->pipe.screen, &template); + if (newSrc == NULL) { + debug_printf("svga_blit: fails to create temporary src\n"); + return; + } + + /* Copy from original resource to the temporary resource */ + adjust_z_layer(blit.src.resource->target, blit.src.box.z, + &src_face, &src_z); + + copy_region_vgpu10(svga, + blit.src.resource, + blit.src.box.x, blit.src.box.y, src_z, + blit.src.level, src_face, + newSrc, + blit.src.box.x, blit.src.box.y, src_z, + blit.src.level, src_face, + blit.src.box.width, blit.src.box.height, + blit.src.box.depth); + + blit.src.resource = newSrc; + } + + if (!can_create_dst_view) { + struct pipe_resource template; + + /** + * If the destination blit format is not compatible with the destination + * resource format, we will not be able to create a render target view. + * In order to avoid falling back to software blit, we'll create + * a new resource in the blit format, and use DXPredCopyRegion + * after the blit to copy from the blit format back to the resource + * format. + */ + template = *dst; + template.format = blit.dst.format; + newDst = svga_texture_create(svga->pipe.screen, &template); + if (newDst == NULL) { + debug_printf("svga_blit: fails to create temporary dst\n"); + return; + } + + blit.dst.resource = newDst; + } + + util_blitter_blit(svga->blitter, &blit); + + if (blit.dst.resource != dst) { + unsigned dst_face, dst_z; + + adjust_z_layer(blit.dst.resource->target, blit.dst.box.z, + &dst_face, &dst_z); + + /** + * A temporary resource was created for the blit, we need to + * copy from the temporary resource back to the original destination. + */ + copy_region_vgpu10(svga, + blit.dst.resource, + blit.dst.box.x, blit.dst.box.y, dst_z, + blit.dst.level, dst_face, + dst, + blit.dst.box.x, blit.dst.box.y, dst_z, + blit.dst.level, dst_face, + blit.dst.box.width, blit.dst.box.height, + blit.dst.box.depth); + + /* unreference the temporary resource */ + pipe_resource_reference(&newDst, NULL); + blit.dst.resource = dst; + } + + if (blit.src.resource != src) { + /* unreference the temporary resource */ + pipe_resource_reference(&newSrc, NULL); + blit.src.resource = src; + } } @@ -168,7 +516,7 @@ void svga_init_blit_functions(struct svga_context *svga) { - svga->pipe.resource_copy_region = svga_surface_copy; + svga->pipe.resource_copy_region = svga_resource_copy_region; svga->pipe.blit = svga_blit; svga->pipe.flush_resource = svga_flush_resource; } diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_clear.c mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_clear.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_clear.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_clear.c 2017-06-01 10:37:10.000000000 +0000 @@ -28,6 +28,7 @@ #include "pipe/p_defines.h" #include "util/u_pack_color.h" +#include "util/u_surface.h" #include "svga_context.h" #include "svga_state.h" @@ -35,18 +36,11 @@ /** - * Clear the whole color buffer(s) by drawing a quad. For VGPU10 we use - * this when clearing integer render targets. We'll also clear the - * depth and/or stencil buffers if the clear_buffers mask specifies them. + * Saving blitter states before doing any blitter operation */ static void -clear_buffers_with_quad(struct svga_context *svga, - unsigned clear_buffers, - const union pipe_color_union *color, - double depth, unsigned stencil) +begin_blit(struct svga_context *svga) { - const struct pipe_framebuffer_state *fb = &svga->curr.framebuffer; - util_blitter_save_vertex_buffer_slot(svga->blitter, svga->curr.vb); util_blitter_save_vertex_elements(svga->blitter, (void*)svga->curr.velems); util_blitter_save_vertex_shader(svga->blitter, svga->curr.vs); @@ -62,7 +56,23 @@ (void*)svga->curr.depth); util_blitter_save_stencil_ref(svga->blitter, &svga->curr.stencil_ref); util_blitter_save_sample_mask(svga->blitter, svga->curr.sample_mask); +} + + +/** + * Clear the whole color buffer(s) by drawing a quad. For VGPU10 we use + * this when clearing integer render targets. We'll also clear the + * depth and/or stencil buffers if the clear_buffers mask specifies them. + */ +static void +clear_buffers_with_quad(struct svga_context *svga, + unsigned clear_buffers, + const union pipe_color_union *color, + double depth, unsigned stencil) +{ + const struct pipe_framebuffer_state *fb = &svga->curr.framebuffer; + begin_blit(svga); util_blitter_clear(svga->blitter, fb->width, fb->height, 1, /* num_layers */ @@ -218,7 +228,7 @@ * Clear the given surface to the specified value. * No masking, no scissor (clear entire buffer). */ -void +static void svga_clear(struct pipe_context *pipe, unsigned buffers, const union pipe_color_union *color, double depth, unsigned stencil) @@ -255,3 +265,329 @@ assert (ret == PIPE_OK); } + + +static void +svga_clear_texture(struct pipe_context *pipe, + struct pipe_resource *res, + unsigned level, + const struct pipe_box *box, + const void *data) +{ + struct svga_context *svga = svga_context(pipe); + struct svga_surface *svga_surface_dst; + enum pipe_error ret; + struct pipe_surface tmpl; + struct pipe_surface *surface; + + memset(&tmpl, 0, sizeof(tmpl)); + tmpl.format = res->format; + tmpl.u.tex.first_layer = box->z; + tmpl.u.tex.last_layer = box->z + box->depth - 1; + tmpl.u.tex.level = level; + + surface = pipe->create_surface(pipe, res, &tmpl); + if (surface == NULL) { + debug_printf("failed to create surface\n"); + return; + } + svga_surface_dst = svga_surface(surface); + + union pipe_color_union color; + const struct util_format_description *desc = + util_format_description(surface->format); + + if (util_format_is_depth_or_stencil(surface->format)) { + float depth; + uint8_t stencil; + unsigned clear_flags = 0; + + /* If data is NULL, then set depthValue and stencilValue to zeros */ + if (data == NULL) { + depth = 0.0; + stencil = 0; + } + else { + desc->unpack_z_float(&depth, 0, data, 0, 1, 1); + desc->unpack_s_8uint(&stencil, 0, data, 0, 1, 1); + } + + if (util_format_has_depth(desc)) { + clear_flags |= PIPE_CLEAR_DEPTH; + } + if (util_format_has_stencil(desc)) { + clear_flags |= PIPE_CLEAR_STENCIL; + } + + /* Setup depth stencil view */ + struct pipe_surface *dsv = + svga_validate_surface_view(svga, svga_surface_dst); + + if (!dsv) { + pipe_surface_reference(&surface, NULL); + return; + } + + if (box->x == 0 && box->y == 0 && box->width == surface->width && + box->height == surface->height) { + /* clearing whole surface, use direct VGPU10 command */ + + + ret = SVGA3D_vgpu10_ClearDepthStencilView(svga->swc, dsv, + clear_flags, + stencil, depth); + if (ret != PIPE_OK) { + /* flush and try again */ + svga_context_flush(svga, NULL); + ret = SVGA3D_vgpu10_ClearDepthStencilView(svga->swc, dsv, + clear_flags, + stencil, depth); + assert(ret == PIPE_OK); + } + } + else { + /* To clear subtexture use software fallback */ + + util_blitter_save_framebuffer(svga->blitter, + &svga->curr.framebuffer); + begin_blit(svga); + util_blitter_clear_depth_stencil(svga->blitter, + dsv, clear_flags, + depth,stencil, + box->x, box->y, + box->width, box->height); + } + } + else { + /* non depth-stencil formats */ + + if (data == NULL) { + /* If data is NULL, the texture image is filled with zeros */ + color.f[0] = color.f[1] = color.f[2] = color.f[3] = 0; + } + else { + if (util_format_is_pure_sint(surface->format)) { + /* signed integer */ + desc->unpack_rgba_sint(color.i, 0, data, 0, 1, 1); + } + else if (util_format_is_pure_uint(surface->format)) { + /* unsigned integer */ + desc->unpack_rgba_uint(color.ui, 0, data, 0, 1, 1); + } + else { + /* floating point */ + desc->unpack_rgba_float(color.f, 0, data, 0, 1, 1); + } + } + + /* Setup render target view */ + struct pipe_surface *rtv = + svga_validate_surface_view(svga, svga_surface_dst); + + if (!rtv) { + pipe_surface_reference(&surface, NULL); + return; + } + + if (box->x == 0 && box->y == 0 && box->width == surface->width && + box->height == surface->height) { + struct pipe_framebuffer_state *curr = &svga->curr.framebuffer; + + if (is_integer_target(curr, PIPE_CLEAR_COLOR) && + !ints_fit_in_floats(&color)) { + /* To clear full texture with integer format */ + clear_buffers_with_quad(svga, PIPE_CLEAR_COLOR, &color, 0.0, 0); + } + else { + /* clearing whole surface using VGPU10 command */ + ret = SVGA3D_vgpu10_ClearRenderTargetView(svga->swc, rtv, + color.f); + if (ret != PIPE_OK) { + svga_context_flush(svga,NULL); + ret = SVGA3D_vgpu10_ClearRenderTargetView(svga->swc, rtv, + color.f); + assert(ret == PIPE_OK); + } + } + } + else { + /* To clear subtexture use software fallback */ + + /** + * util_blitter_clear_render_target doesn't support PIPE_TEXTURE_3D + * It tries to draw quad with depth 0 for PIPE_TEXTURE_3D so use + * util_clear_render_target() for PIPE_TEXTURE_3D. + */ + if (rtv->texture->target != PIPE_TEXTURE_3D && + pipe->screen->is_format_supported(pipe->screen, rtv->format, + rtv->texture->target, + rtv->texture->nr_samples, + PIPE_BIND_RENDER_TARGET)) { + /* clear with quad drawing */ + util_blitter_save_framebuffer(svga->blitter, + &svga->curr.framebuffer); + begin_blit(svga); + util_blitter_clear_render_target(svga->blitter, + rtv, + &color, + box->x, box->y, + box->width, box->height); + } + else { + /* clear with map/write/unmap */ + + /* store layer values */ + unsigned first_layer = rtv->u.tex.first_layer; + unsigned last_layer = rtv->u.tex.last_layer; + unsigned box_depth = last_layer - first_layer + 1; + + for (unsigned i = 0; i < box_depth; i++) { + rtv->u.tex.first_layer = rtv->u.tex.last_layer = + first_layer + i; + util_clear_render_target(pipe, rtv, &color, box->x, box->y, + box->width, box->height); + } + /* restore layer values */ + rtv->u.tex.first_layer = first_layer; + rtv->u.tex.last_layer = last_layer; + } + } + } + pipe_surface_reference(&surface, NULL); +} + +/** + * \brief Clear the whole render target using vgpu10 functionality + * + * \param svga[in] The svga context + * \param dst[in] The surface to clear + * \param color[in] Clear color + * \return PIPE_OK if all well, PIPE_ERROR_OUT_OF_MEMORY if ran out of + * command submission resources. + */ +static enum pipe_error +svga_try_clear_render_target(struct svga_context *svga, + struct pipe_surface *dst, + const union pipe_color_union *color) +{ + struct pipe_surface *rtv = + svga_validate_surface_view(svga, svga_surface(dst)); + + if (!rtv) + return PIPE_ERROR_OUT_OF_MEMORY; + + return SVGA3D_vgpu10_ClearRenderTargetView(svga->swc, rtv, color->f); + } + +/** + * \brief Clear part of render target using gallium blitter utilities + * + * \param svga[in] The svga context + * \param dst[in] The surface to clear + * \param color[in] Clear color + * \param dstx[in] Clear region left + * \param dsty[in] Clear region top + * \param width[in] Clear region width + * \param height[in] Clear region height + */ +static void +svga_blitter_clear_render_target(struct svga_context *svga, + struct pipe_surface *dst, + const union pipe_color_union *color, + unsigned dstx, unsigned dsty, + unsigned width, unsigned height) +{ + begin_blit(svga); + util_blitter_save_framebuffer(svga->blitter, &svga->curr.framebuffer); + + util_blitter_clear_render_target(svga->blitter, dst, color, + dstx, dsty, width, height); +} + +/** + * \brief Toggle conditional rendering if already enabled + * + * \param svga[in] The svga context + * \param render_condition_enabled[in] Whether to ignore requests to turn + * conditional rendering off + * \param on[in] Whether to turn conditional rendering on or off + */ +static void +svga_toggle_render_condition(struct svga_context *svga, + boolean render_condition_enabled, + boolean on) +{ + SVGA3dQueryId query_id; + enum pipe_error ret; + + if (render_condition_enabled || + svga->pred.query_id == SVGA3D_INVALID_ID) { + return; + } + + /* + * If we get here, it means that the system supports + * conditional rendering since svga->pred.query_id has already been + * modified for this context and thus support has already been + * verified. + */ + query_id = on ? svga->pred.query_id : SVGA3D_INVALID_ID; + + ret = SVGA3D_vgpu10_SetPredication(svga->swc, query_id, + (uint32) svga->pred.cond); + if (ret == PIPE_ERROR_OUT_OF_MEMORY) { + svga_context_flush(svga, NULL); + ret = SVGA3D_vgpu10_SetPredication(svga->swc, query_id, + (uint32) svga->pred.cond); + assert(ret == PIPE_OK); + } +} + +/** + * \brief Clear render target pipe callback + * + * \param pipe[in] The pipe context + * \param dst[in] The surface to clear + * \param color[in] Clear color + * \param dstx[in] Clear region left + * \param dsty[in] Clear region top + * \param width[in] Clear region width + * \param height[in] Clear region height + * \param render_condition_enabled[in] Whether to use conditional rendering + * to clear (if elsewhere enabled). + */ +static void +svga_clear_render_target(struct pipe_context *pipe, + struct pipe_surface *dst, + const union pipe_color_union *color, + unsigned dstx, unsigned dsty, + unsigned width, unsigned height, + bool render_condition_enabled) +{ + struct svga_context *svga = svga_context( pipe ); + + svga_toggle_render_condition(svga, render_condition_enabled, FALSE); + if (!svga_have_vgpu10(svga) || dstx != 0 || dsty != 0 || + width != dst->width || height != dst->height) { + svga_blitter_clear_render_target(svga, dst, color, dstx, dsty, width, + height); + } else { + enum pipe_error ret; + + ret = svga_try_clear_render_target(svga, dst, color); + if (ret == PIPE_ERROR_OUT_OF_MEMORY) { + svga_context_flush( svga, NULL ); + ret = svga_try_clear_render_target(svga, dst, color); + } + + assert (ret == PIPE_OK); + } + svga_toggle_render_condition(svga, render_condition_enabled, TRUE); +} + +void svga_init_clear_functions(struct svga_context *svga) +{ + svga->pipe.clear_render_target = svga_clear_render_target; + svga->pipe.clear_texture = svga_clear_texture; + svga->pipe.clear = svga_clear; +} diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_constants.c mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_constants.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_constants.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_constants.c 2017-06-01 10:37:10.000000000 +0000 @@ -46,7 +46,7 @@ static void svga_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, - struct pipe_constant_buffer *cb) + const struct pipe_constant_buffer *cb) { struct svga_screen *svgascreen = svga_screen(pipe->screen); struct svga_context *svga = svga_context(pipe); diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_depthstencil.c mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_depthstencil.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_depthstencil.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_depthstencil.c 2017-06-01 10:37:10.000000000 +0000 @@ -206,6 +206,9 @@ svga->hud.num_depthstencil_objects++; + SVGA_STATS_COUNT_INC(svga_screen(svga->pipe.screen)->sws, + SVGA_STATS_COUNT_DEPTHSTENCILSTATE); + return ds; } diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_draw.c mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_draw.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_draw.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_draw.c 2017-06-01 10:37:10.000000000 +0000 @@ -39,6 +39,7 @@ #include "svga_draw.h" #include "svga_shader.h" #include "svga_state.h" +#include "svga_surface.h" #include "svga_swtnl.h" #include "svga_debug.h" #include "svga_resource_buffer.h" @@ -59,6 +60,8 @@ { enum pipe_error ret = PIPE_OK; + SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_DRAWELEMENTS); + svga_hwtnl_set_fillmode(svga->hwtnl, svga->curr.rast->hw_fillmode); ret = svga_update_state( svga, SVGA_STATE_HW_DRAW ); @@ -81,20 +84,22 @@ if (ret != PIPE_OK) goto retry; - return PIPE_OK; + goto done; retry: svga_context_flush( svga, NULL ); if (do_retry) { - return retry_draw_range_elements( svga, - index_buffer, index_size, index_bias, - min_index, max_index, - prim, start, count, - start_instance, instance_count, FALSE ); + ret = retry_draw_range_elements(svga, + index_buffer, index_size, index_bias, + min_index, max_index, + prim, start, count, + start_instance, instance_count, FALSE); } +done: + SVGA_STATS_TIME_POP(svga_sws(svga)); return ret; } @@ -107,6 +112,8 @@ { enum pipe_error ret; + SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_DRAWARRAYS); + svga_hwtnl_set_fillmode(svga->hwtnl, svga->curr.rast->hw_fillmode); ret = svga_update_state( svga, SVGA_STATE_HW_DRAW ); @@ -126,18 +133,20 @@ if (ret != PIPE_OK) goto retry; - return PIPE_OK; + goto done; retry: if (ret == PIPE_ERROR_OUT_OF_MEMORY && do_retry) { svga_context_flush( svga, NULL ); - return retry_draw_arrays(svga, prim, start, count, - start_instance, instance_count, - FALSE ); + ret = retry_draw_arrays(svga, prim, start, count, + start_instance, instance_count, + FALSE); } +done: + SVGA_STATS_TIME_POP(svga_sws(svga)); return ret; } @@ -177,11 +186,13 @@ enum pipe_error ret = 0; boolean needed_swtnl; + SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_DRAWVBO); + svga->hud.num_draw_calls++; /* for SVGA_QUERY_NUM_DRAW_CALLS */ if (u_reduced_prim(info->mode) == PIPE_PRIM_TRIANGLES && svga->curr.rast->templ.cull_face == PIPE_FACE_FRONT_AND_BACK) - return; + goto done; /* * Mark currently bound target surfaces as dirty @@ -202,22 +213,16 @@ r = util_draw_vbo_without_prim_restart(pipe, &svga->curr.ib, info); assert(r == PIPE_OK); (void) r; - return; + goto done; } if (!u_trim_pipe_prim( info->mode, &count )) - return; + goto done; needed_swtnl = svga->state.sw.need_swtnl; svga_update_state_retry( svga, SVGA_STATE_NEED_SWTNL ); -#ifdef DEBUG - if (svga->curr.vs->base.id == svga->debug.disable_shader || - svga->curr.fs->base.id == svga->debug.disable_shader) - return; -#endif - if (svga->state.sw.need_swtnl) { svga->hud.num_fallbacks++; /* for SVGA_QUERY_NUM_FALLBACKS */ if (!needed_swtnl) { @@ -270,6 +275,10 @@ svga_hwtnl_flush_retry( svga ); svga_context_flush(svga, NULL); } + +done: + SVGA_STATS_TIME_POP(svga_sws(svga)); +; } diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_fs.c mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_fs.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_fs.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_fs.c 2017-06-01 10:37:10.000000000 +0000 @@ -48,6 +48,8 @@ if (!fs) return NULL; + SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_CREATEFS); + fs->base.tokens = tgsi_dup_tokens(templ->tokens); /* Collect basic info that we'll need later: @@ -62,6 +64,7 @@ fs->draw_shader = draw_create_fragment_shader(svga->swtnl.draw, templ); + SVGA_STATS_TIME_POP(svga_sws(svga)); return fs; } diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_gs.c mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_gs.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_gs.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_gs.c 2017-06-01 10:37:10.000000000 +0000 @@ -46,6 +46,8 @@ if (!gs) return NULL; + SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_CREATEGS); + gs->base.tokens = tgsi_dup_tokens(templ->tokens); /* Collect basic info that we'll need later: @@ -64,6 +66,7 @@ &templ->stream_output); } + SVGA_STATS_TIME_POP(svga_sws(svga)); return gs; } diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_misc.c mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_misc.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_misc.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_misc.c 2017-06-01 10:37:10.000000000 +0000 @@ -23,26 +23,26 @@ * **********************************************************/ -#include "svga_cmd.h" - #include "util/u_framebuffer.h" #include "util/u_inlines.h" #include "util/u_pstipple.h" +#include "svga_cmd.h" #include "svga_context.h" #include "svga_screen.h" #include "svga_surface.h" #include "svga_resource_texture.h" -static void svga_set_scissor_states( struct pipe_context *pipe, - unsigned start_slot, - unsigned num_scissors, - const struct pipe_scissor_state *scissors ) +static void +svga_set_scissor_states(struct pipe_context *pipe, + unsigned start_slot, + unsigned num_scissors, + const struct pipe_scissor_state *scissors) { struct svga_context *svga = svga_context(pipe); - memcpy( &svga->curr.scissor, scissors, sizeof(*scissors) ); + memcpy(&svga->curr.scissor, scissors, sizeof(*scissors)); svga->dirty |= SVGA_NEW_SCISSOR; } @@ -81,7 +81,8 @@ } -void svga_cleanup_framebuffer(struct svga_context *svga) +void +svga_cleanup_framebuffer(struct svga_context *svga) { struct svga_screen *svgascreen = svga_screen(svga->pipe.screen); struct pipe_framebuffer_state *curr = &svga->curr.framebuffer; @@ -103,12 +104,12 @@ #define DEPTH_BIAS_SCALE_FACTOR_D32 ((float)(1<<31)) -static void svga_set_framebuffer_state(struct pipe_context *pipe, - const struct pipe_framebuffer_state *fb) +static void +svga_set_framebuffer_state(struct pipe_context *pipe, + const struct pipe_framebuffer_state *fb) { struct svga_context *svga = svga_context(pipe); struct pipe_framebuffer_state *dst = &svga->curr.framebuffer; - boolean propagate = FALSE; unsigned i; /* make sure any pending drawing calls are flushed before changing @@ -120,22 +121,15 @@ dst->height = fb->height; dst->nr_cbufs = fb->nr_cbufs; - /* check if we need to propagate any of the target surfaces */ + /* Check if we need to propagate any of the render targets which we may + * be unbinding. + */ for (i = 0; i < dst->nr_cbufs; i++) { struct pipe_surface *s = i < fb->nr_cbufs ? fb->cbufs[i] : NULL; if (dst->cbufs[i] && dst->cbufs[i] != s) { if (svga_surface_needs_propagation(dst->cbufs[i])) { - propagate = TRUE; - break; - } - } - } - - if (propagate) { - for (i = 0; i < dst->nr_cbufs; i++) { - struct pipe_surface *s = i < fb->nr_cbufs ? fb->cbufs[i] : NULL; - if (dst->cbufs[i] && dst->cbufs[i] != s) svga_propagate_surface(svga, dst->cbufs[i]); + } } } @@ -177,8 +171,7 @@ } } - if (svga->curr.framebuffer.zsbuf) - { + if (svga->curr.framebuffer.zsbuf) { switch (svga->curr.framebuffer.zsbuf->format) { case PIPE_FORMAT_Z16_UNORM: svga->curr.depthscale = 1.0f / DEPTH_BIAS_SCALE_FACTOR_D16; @@ -215,9 +208,9 @@ } - -static void svga_set_clip_state( struct pipe_context *pipe, - const struct pipe_clip_state *clip ) +static void +svga_set_clip_state(struct pipe_context *pipe, + const struct pipe_clip_state *clip) { struct svga_context *svga = svga_context(pipe); @@ -227,14 +220,11 @@ } - -/* Called when driver state tracker notices changes to the viewport - * matrix: - */ -static void svga_set_viewport_states( struct pipe_context *pipe, - unsigned start_slot, - unsigned num_viewports, - const struct pipe_viewport_state *viewports ) +static void +svga_set_viewport_states(struct pipe_context *pipe, + unsigned start_slot, + unsigned num_viewports, + const struct pipe_viewport_state *viewports) { struct svga_context *svga = svga_context(pipe); @@ -264,7 +254,8 @@ } -void svga_init_misc_functions( struct svga_context *svga ) +void +svga_init_misc_functions(struct svga_context *svga) { svga->pipe.set_scissor_states = svga_set_scissor_states; svga->pipe.set_polygon_stipple = svga_set_polygon_stipple; @@ -273,5 +264,3 @@ svga->pipe.set_viewport_states = svga_set_viewport_states; svga->pipe.set_debug_callback = svga_set_debug_callback; } - - diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_query.c mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_query.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_query.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_query.c 2017-06-01 10:37:10.000000000 +0000 @@ -265,7 +265,7 @@ * any empty memory block around that can be freed up. */ index = -1; - for (i = 0; i < SVGA_QUERY_MAX && index == -1; i++) { + for (i = 0; i < SVGA3D_QUERYTYPE_MAX && index == -1; i++) { struct svga_qmem_alloc_entry *alloc_entry; struct svga_qmem_alloc_entry *prev_alloc_entry = NULL; @@ -380,7 +380,7 @@ int slot_index = -1; unsigned offset; - assert(type < SVGA_QUERY_MAX); + assert(type < SVGA3D_QUERYTYPE_MAX); alloc_entry = svga->gb_query_map[type]; @@ -453,7 +453,7 @@ struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws; unsigned i; - for (i = 0; i < SVGA_QUERY_MAX; i++) { + for (i = 0; i < SVGA3D_QUERYTYPE_MAX; i++) { struct svga_qmem_alloc_entry *alloc_entry, *next; alloc_entry = svga->gb_query_map[i]; while (alloc_entry) { @@ -610,7 +610,6 @@ static enum pipe_error end_query_vgpu10(struct svga_context *svga, struct svga_query *sq) { - struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws; enum pipe_error ret = PIPE_OK; if (svga->rebind.flags.query) { @@ -623,15 +622,6 @@ ret = SVGA3D_vgpu10_EndQuery(svga->swc, sq->id); } - /* Finish fence is copied here from get_query_result_vgpu10. This helps - * with cases where svga_begin_query might be called again before - * svga_get_query_result, such as GL_TIME_ELAPSED. - */ - if (!sq->fence) { - svga_context_flush(svga, &sq->fence); - } - sws->fence_finish(sws, sq->fence, SVGA_FENCE_FLAG_QUERY); - return ret; } @@ -648,7 +638,17 @@ sws->query_get_result(sws, sq->gb_query, sq->offset, &queryState, result, resultLen); - if (queryState == SVGA3D_QUERYSTATE_PENDING) { + if (queryState != SVGA3D_QUERYSTATE_SUCCEEDED && !sq->fence) { + /* We don't have the query result yet, and the query hasn't been + * submitted. We need to submit it now since the GL spec says + * "Querying the state for a given occlusion query forces that + * occlusion query to complete within a finite amount of time." + */ + svga_context_flush(svga, &sq->fence); + } + + if (queryState == SVGA3D_QUERYSTATE_PENDING || + queryState == SVGA3D_QUERYSTATE_NEW) { if (!wait) return FALSE; sws->fence_finish(sws, sq->fence, SVGA_FENCE_FLAG_QUERY); @@ -731,11 +731,10 @@ case SVGA_QUERY_NUM_FALLBACKS: case SVGA_QUERY_NUM_FLUSHES: case SVGA_QUERY_NUM_VALIDATIONS: - case SVGA_QUERY_MAP_BUFFER_TIME: - case SVGA_QUERY_NUM_RESOURCES_MAPPED: + case SVGA_QUERY_NUM_BUFFERS_MAPPED: + case SVGA_QUERY_NUM_TEXTURES_MAPPED: case SVGA_QUERY_NUM_BYTES_UPLOADED: case SVGA_QUERY_COMMAND_BUFFER_SIZE: - case SVGA_QUERY_FLUSH_TIME: case SVGA_QUERY_SURFACE_WRITE_FLUSHES: case SVGA_QUERY_MEMORY_USED: case SVGA_QUERY_NUM_SHADERS: @@ -749,6 +748,11 @@ case SVGA_QUERY_NUM_CONST_BUF_UPDATES: case SVGA_QUERY_NUM_CONST_UPDATES: break; + case SVGA_QUERY_FLUSH_TIME: + case SVGA_QUERY_MAP_BUFFER_TIME: + /* These queries need os_time_get() */ + svga->hud.uses_time = TRUE; + break; default: assert(!"unexpected query type in svga_create_query()"); } @@ -805,7 +809,8 @@ case SVGA_QUERY_NUM_FLUSHES: case SVGA_QUERY_NUM_VALIDATIONS: case SVGA_QUERY_MAP_BUFFER_TIME: - case SVGA_QUERY_NUM_RESOURCES_MAPPED: + case SVGA_QUERY_NUM_BUFFERS_MAPPED: + case SVGA_QUERY_NUM_TEXTURES_MAPPED: case SVGA_QUERY_NUM_BYTES_UPLOADED: case SVGA_QUERY_COMMAND_BUFFER_SIZE: case SVGA_QUERY_FLUSH_TIME: @@ -893,8 +898,11 @@ case SVGA_QUERY_MAP_BUFFER_TIME: sq->begin_count = svga->hud.map_buffer_time; break; - case SVGA_QUERY_NUM_RESOURCES_MAPPED: - sq->begin_count = svga->hud.num_resources_mapped; + case SVGA_QUERY_NUM_BUFFERS_MAPPED: + sq->begin_count = svga->hud.num_buffers_mapped; + break; + case SVGA_QUERY_NUM_TEXTURES_MAPPED: + sq->begin_count = svga->hud.num_textures_mapped; break; case SVGA_QUERY_NUM_BYTES_UPLOADED: sq->begin_count = svga->hud.num_bytes_uploaded; @@ -978,11 +986,6 @@ } assert(ret == PIPE_OK); (void) ret; - /* TODO: Delay flushing. We don't really need to flush here, just ensure - * that there is one flush before svga_get_query_result attempts to get - * the result. - */ - svga_context_flush(svga, NULL); break; case PIPE_QUERY_PRIMITIVES_GENERATED: case PIPE_QUERY_PRIMITIVES_EMITTED: @@ -1007,8 +1010,11 @@ case SVGA_QUERY_MAP_BUFFER_TIME: sq->end_count = svga->hud.map_buffer_time; break; - case SVGA_QUERY_NUM_RESOURCES_MAPPED: - sq->end_count = svga->hud.num_resources_mapped; + case SVGA_QUERY_NUM_BUFFERS_MAPPED: + sq->end_count = svga->hud.num_buffers_mapped; + break; + case SVGA_QUERY_NUM_TEXTURES_MAPPED: + sq->end_count = svga->hud.num_textures_mapped; break; case SVGA_QUERY_NUM_BYTES_UPLOADED: sq->end_count = svga->hud.num_bytes_uploaded; @@ -1088,7 +1094,7 @@ (void *)&occResult, sizeof(occResult)); vresult->b = occResult.anySamplesRendered != 0; } else { - uint64_t count; + uint64_t count = 0; ret = get_query_result_vgpu9(svga, sq, wait, &count); vresult->b = count != 0; } @@ -1139,7 +1145,8 @@ case SVGA_QUERY_NUM_FLUSHES: case SVGA_QUERY_NUM_VALIDATIONS: case SVGA_QUERY_MAP_BUFFER_TIME: - case SVGA_QUERY_NUM_RESOURCES_MAPPED: + case SVGA_QUERY_NUM_BUFFERS_MAPPED: + case SVGA_QUERY_NUM_TEXTURES_MAPPED: case SVGA_QUERY_NUM_BYTES_UPLOADED: case SVGA_QUERY_COMMAND_BUFFER_SIZE: case SVGA_QUERY_FLUSH_TIME: @@ -1232,7 +1239,11 @@ ret = SVGA3D_vgpu10_SetPredication(svga->swc, queryId, (uint32) condition); } + svga->pred.query_id = queryId; + svga->pred.cond = condition; } + + svga->render_condition = (sq != NULL); } diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_rasterizer.c mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_rasterizer.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_rasterizer.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_rasterizer.c 2017-06-01 10:37:10.000000000 +0000 @@ -105,18 +105,20 @@ define_rasterizer_object(struct svga_context *svga, struct svga_rasterizer_state *rast) { + struct svga_screen *svgascreen = svga_screen(svga->pipe.screen); unsigned fill_mode = translate_fill_mode(rast->templ.fill_front); - unsigned cull_mode = translate_cull_mode(rast->templ.cull_face); - int depth_bias = rast->templ.offset_units; - float slope_scaled_depth_bias = rast->templ.offset_scale; - float depth_bias_clamp = 0.0; /* XXX fix me */ - unsigned try; + const unsigned cull_mode = translate_cull_mode(rast->templ.cull_face); + const int depth_bias = rast->templ.offset_units; + const float slope_scaled_depth_bias = rast->templ.offset_scale; + /* PIPE_CAP_POLYGON_OFFSET_CLAMP not supported: */ + const float depth_bias_clamp = 0.0; const float line_width = rast->templ.line_width > 0.0f ? rast->templ.line_width : 1.0f; const uint8 line_factor = rast->templ.line_stipple_enable ? rast->templ.line_stipple_factor : 0; const uint16 line_pattern = rast->templ.line_stipple_enable ? rast->templ.line_stipple_pattern : 0; + unsigned try; rast->id = util_bitmask_add(svga->rast_object_id_bm); @@ -129,6 +131,8 @@ } for (try = 0; try < 2; try++) { + const uint8 pv_last = !rast->templ.flatshade_first && + svgascreen->haveProvokingVertex; enum pipe_error ret = SVGA3D_vgpu10_DefineRasterizerState(svga->swc, rast->id, @@ -146,7 +150,7 @@ rast->templ.line_stipple_enable, line_factor, line_pattern, - !rast->templ.flatshade_first); + pv_last); if (ret == PIPE_OK) return; svga_context_flush(svga, NULL); @@ -361,6 +365,8 @@ } svga->hud.num_rasterizer_objects++; + SVGA_STATS_COUNT_INC(svga_screen(svga->pipe.screen)->sws, + SVGA_STATS_COUNT_RASTERIZERSTATE); return rast; } diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_sampler.c mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_sampler.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_sampler.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_sampler.c 2017-06-01 10:37:10.000000000 +0000 @@ -277,6 +277,8 @@ cso->mipfilter == SVGA3D_TEX_FILTER_NONE ? "SVGA3D_TEX_FILTER_NONE" : "SOMETHING"); svga->hud.num_sampler_objects++; + SVGA_STATS_COUNT_INC(svga_screen(svga->pipe.screen)->sws, + SVGA_STATS_COUNT_SAMPLER); return cso; } @@ -284,7 +286,7 @@ static void svga_bind_sampler_states(struct pipe_context *pipe, - unsigned shader, + enum pipe_shader_type shader, unsigned start, unsigned num, void **samplers) @@ -367,6 +369,8 @@ sv->id = SVGA3D_INVALID_ID; svga->hud.num_samplerview_objects++; + SVGA_STATS_COUNT_INC(svga_screen(svga->pipe.screen)->sws, + SVGA_STATS_COUNT_SAMPLERVIEW); return &sv->base; } @@ -413,7 +417,7 @@ static void svga_set_sampler_views(struct pipe_context *pipe, - unsigned shader, + enum pipe_shader_type shader, unsigned start, unsigned num, struct pipe_sampler_view **views) @@ -433,6 +437,8 @@ if (!svga_have_vgpu10(svga) && shader != PIPE_SHADER_FRAGMENT) return; + SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_SETSAMPLERVIEWS); + /* This bit of code works around a quirk in the CSO module. * If start=num=0 it means all sampler views should be released. * Note that the CSO module treats sampler views for fragment shaders @@ -475,7 +481,7 @@ } if (!any_change) { - return; + goto done; } /* find highest non-null sampler_views[] entry */ @@ -505,30 +511,46 @@ } /* Check if any of the sampler view resources collide with the framebuffer - * color buffers or depth stencil resource. If so, enable the NEW_FRAME_BUFFER + * color buffers or depth stencil resource. If so, set the NEW_FRAME_BUFFER * dirty bit so that emit_framebuffer can be invoked to create backed view * for the conflicted surface view. */ - for (i = 0; i < svga->curr.framebuffer.nr_cbufs; i++) { - if (svga->curr.framebuffer.cbufs[i]) { - struct svga_surface *s = svga_surface(svga->curr.framebuffer.cbufs[i]); - if (svga_check_sampler_view_resource_collision(svga, s->handle, shader)) { - svga->dirty |= SVGA_NEW_FRAME_BUFFER; - break; - } - } + if (svga_check_sampler_framebuffer_resource_collision(svga, shader)) { + svga->dirty |= SVGA_NEW_FRAME_BUFFER; } - if (svga->curr.framebuffer.zsbuf) { - struct svga_surface *s = svga_surface(svga->curr.framebuffer.zsbuf); - if (s) { - if (svga_check_sampler_view_resource_collision(svga, s->handle, shader)) { - svga->dirty |= SVGA_NEW_FRAME_BUFFER; - } +done: + SVGA_STATS_TIME_POP(svga_sws(svga)); +} + +/** + * Clean up sampler, sampler view state at context destruction time + */ +void +svga_cleanup_sampler_state(struct svga_context *svga) +{ + enum pipe_shader_type shader; + + for (shader = 0; shader <= PIPE_SHADER_GEOMETRY; shader++) { + unsigned i; + + for (i = 0; i < svga->state.hw_draw.num_sampler_views[shader]; i++) { + pipe_sampler_view_release(&svga->pipe, + &svga->state.hw_draw.sampler_views[shader][i]); } } -} + + /* free polygon stipple state */ + if (svga->polygon_stipple.sampler) { + svga->pipe.delete_sampler_state(&svga->pipe, svga->polygon_stipple.sampler); + } + if (svga->polygon_stipple.sampler_view) { + svga->pipe.sampler_view_destroy(&svga->pipe, + &svga->polygon_stipple.sampler_view->base); + } + pipe_resource_reference(&svga->polygon_stipple.texture, NULL); +} void svga_init_sampler_functions( struct svga_context *svga ) diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_vertex.c mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_vertex.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_vertex.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_vertex.c 2017-06-01 10:37:10.000000000 +0000 @@ -276,6 +276,8 @@ } svga->hud.num_vertexelement_objects++; + SVGA_STATS_COUNT_INC(svga_screen(svga->pipe.screen)->sws, + SVGA_STATS_COUNT_VERTEXELEMENT); return velems; } @@ -327,6 +329,11 @@ for (i = 0 ; i < svga->curr.num_vertex_buffers; i++) pipe_resource_reference(&svga->curr.vb[i].buffer, NULL); + + pipe_resource_reference(&svga->state.hw_draw.ib, NULL); + + for (i = 0; i < svga->state.hw_draw.num_vbuffers; i++) + pipe_resource_reference(&svga->state.hw_draw.vbuffers[i], NULL); } diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_vs.c mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_vs.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_pipe_vs.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_pipe_vs.c 2017-06-01 10:37:10.000000000 +0000 @@ -104,6 +104,8 @@ if (!vs) return NULL; + SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_CREATEVS); + /* substitute a debug shader? */ vs->base.tokens = tgsi_dup_tokens(substitute_vs(svga->debug.shader_id, @@ -132,6 +134,7 @@ &templ->stream_output); } + SVGA_STATS_TIME_POP(svga_sws(svga)); return vs; } diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_resource_buffer.c mesa-17.0.7/src/gallium/drivers/svga/svga_resource_buffer.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_resource_buffer.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_resource_buffer.c 2017-06-01 10:37:10.000000000 +0000 @@ -29,7 +29,6 @@ #include "pipe/p_defines.h" #include "util/u_inlines.h" #include "os/os_thread.h" -#include "os/os_time.h" #include "util/u_math.h" #include "util/u_memory.h" #include "util/u_resource.h" @@ -69,7 +68,7 @@ svga_buffer_transfer_map(struct pipe_context *pipe, struct pipe_resource *resource, unsigned level, - enum pipe_resource_usage usage, + unsigned usage, const struct pipe_box *box, struct pipe_transfer **ptransfer) { @@ -77,44 +76,66 @@ struct svga_screen *ss = svga_screen(pipe->screen); struct svga_buffer *sbuf = svga_buffer(resource); struct pipe_transfer *transfer; - uint8_t *map; - int64_t begin = os_time_get(); + uint8_t *map = NULL; + int64_t begin = svga_get_time(svga); + + SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_BUFFERTRANSFERMAP); assert(box->y == 0); assert(box->z == 0); assert(box->height == 1); assert(box->depth == 1); - transfer = CALLOC_STRUCT(pipe_transfer); + transfer = MALLOC_STRUCT(pipe_transfer); if (!transfer) { - return NULL; + goto done; } transfer->resource = resource; transfer->level = level; transfer->usage = usage; transfer->box = *box; + transfer->stride = 0; + transfer->layer_stride = 0; + + if (usage & PIPE_TRANSFER_WRITE) { + /* If we write to the buffer for any reason, free any saved translated + * vertices. + */ + pipe_resource_reference(&sbuf->translated_indices.buffer, NULL); + } if ((usage & PIPE_TRANSFER_READ) && sbuf->dirty) { - /* Only need to test for vgpu10 since only vgpu10 features (streamout, - * buffer copy) can modify buffers on the device. + enum pipe_error ret; + + /* Host-side buffers can only be dirtied with vgpu10 features + * (streamout and buffer copy). */ - if (svga_have_vgpu10(svga)) { - enum pipe_error ret; - assert(sbuf->handle); - ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, sbuf->handle, 0); - if (ret != PIPE_OK) { - svga_context_flush(svga, NULL); - ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, sbuf->handle, 0); - assert(ret == PIPE_OK); - } + assert(svga_have_vgpu10(svga)); - svga->hud.num_readbacks++; + if (!sbuf->user) { + (void) svga_buffer_handle(svga, resource); + } + if (sbuf->dma.pending > 0) { + svga_buffer_upload_flush(svga, sbuf); svga_context_finish(svga); + } - sbuf->dirty = FALSE; + assert(sbuf->handle); + + ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, sbuf->handle, 0); + if (ret != PIPE_OK) { + svga_context_flush(svga, NULL); + ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, sbuf->handle, 0); + assert(ret == PIPE_OK); } + + svga->hud.num_readbacks++; + + svga_context_finish(svga); + + sbuf->dirty = FALSE; } if (usage & PIPE_TRANSFER_WRITE) { @@ -191,7 +212,7 @@ */ FREE(transfer); - return NULL; + goto done; } svga_context_flush(svga, NULL); @@ -218,7 +239,7 @@ sbuf->swbuf = align_malloc(sbuf->b.b.width0, 16); if (!sbuf->swbuf) { FREE(transfer); - return NULL; + goto done; } } } @@ -253,8 +274,10 @@ FREE(transfer); } - svga->hud.map_buffer_time += (os_time_get() - begin); + svga->hud.map_buffer_time += (svga_get_time(svga) - begin); +done: + SVGA_STATS_TIME_POP(svga_sws(svga)); return map; } @@ -287,6 +310,8 @@ struct svga_context *svga = svga_context(pipe); struct svga_buffer *sbuf = svga_buffer(transfer->resource); + SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_BUFFERTRANSFERUNMAP); + pipe_mutex_lock(ss->swc_mutex); assert(sbuf->map.count); @@ -316,6 +341,7 @@ pipe_mutex_unlock(ss->swc_mutex); FREE(transfer); + SVGA_STATS_TIME_POP(svga_sws(svga)); } @@ -342,6 +368,8 @@ if (sbuf->swbuf && !sbuf->user) align_free(sbuf->swbuf); + pipe_resource_reference(&sbuf->translated_indices.buffer, NULL); + ss->hud.total_resource_bytes -= sbuf->size; assert(ss->hud.num_resources > 0); if (ss->hud.num_resources > 0) @@ -358,7 +386,6 @@ svga_buffer_transfer_map, /* transfer_map */ svga_buffer_transfer_flush_region, /* transfer_flush_region */ svga_buffer_transfer_unmap, /* transfer_unmap */ - u_default_transfer_inline_write /* transfer_inline_write */ }; @@ -370,6 +397,8 @@ struct svga_screen *ss = svga_screen(screen); struct svga_buffer *sbuf; + SVGA_STATS_TIME_PUSH(ss->sws, SVGA_STATS_TIME_CREATEBUFFER); + sbuf = CALLOC_STRUCT(svga_buffer); if (!sbuf) goto error1; @@ -426,12 +455,14 @@ ss->hud.total_resource_bytes += sbuf->size; ss->hud.num_resources++; + SVGA_STATS_TIME_POP(ss->sws); return &sbuf->b.b; error2: FREE(sbuf); error1: + SVGA_STATS_TIME_POP(ss->sws); return NULL; } diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_resource_buffer.h mesa-17.0.7/src/gallium/drivers/svga/svga_resource_buffer.h --- mesa-12.0.6/src/gallium/drivers/svga/svga_resource_buffer.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_resource_buffer.h 2017-06-01 10:37:10.000000000 +0000 @@ -192,17 +192,26 @@ unsigned size; /**< Approximate size in bytes */ boolean dirty; /**< Need to do a readback before mapping? */ + + /** In some cases we try to keep the results of the translate_indices() + * function from svga_draw_elements.c + */ + struct { + enum pipe_prim_type orig_prim, new_prim; + struct pipe_resource *buffer; + unsigned index_size; + unsigned offset; /**< first index */ + unsigned count; /**< num indices */ + } translated_indices; }; static inline struct svga_buffer * -svga_buffer(struct pipe_resource *buffer) +svga_buffer(struct pipe_resource *resource) { - if (buffer) { - assert(((struct svga_buffer *)buffer)->b.vtbl == &svga_buffer_vtbl); - return (struct svga_buffer *)buffer; - } - return NULL; + struct svga_buffer *buf = (struct svga_buffer *) resource; + assert(buf == NULL || buf->b.vtbl == &svga_buffer_vtbl); + return buf; } @@ -254,7 +263,7 @@ { struct svga_winsys_screen *sws = svga_buffer_winsys_screen(sbuf); - svga->hud.num_resources_mapped++; + svga->hud.num_buffers_mapped++; if (sws->have_gb_objects) { return svga->swc->surface_map(svga->swc, sbuf->handle, flags, retry); diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_resource_buffer_upload.c mesa-17.0.7/src/gallium/drivers/svga/svga_resource_buffer_upload.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_resource_buffer_upload.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_resource_buffer_upload.c 2017-06-01 10:37:10.000000000 +0000 @@ -96,7 +96,7 @@ { struct svga_winsys_screen *sws = ss->sws; - assert(!sbuf->map.count); + assert(sbuf->map.count == 0); assert(sbuf->hwbuf); if (sbuf->hwbuf) { sws->buffer_destroy(sws, sbuf->hwbuf); @@ -146,6 +146,8 @@ assert(!sbuf->user); if (!sbuf->handle) { + boolean validated; + sbuf->key.flags = 0; sbuf->key.format = SVGA3D_BUFFER; @@ -166,6 +168,14 @@ if (sbuf->bind_flags & PIPE_BIND_SAMPLER_VIEW) sbuf->key.flags |= SVGA3D_SURFACE_BIND_SHADER_RESOURCE; + if (!sbuf->bind_flags && sbuf->b.b.usage == PIPE_USAGE_STAGING) { + /* This surface is to be used with the + * SVGA3D_CMD_DX_TRANSFER_FROM_BUFFER command, and no other + * bind flags are allowed to be set for this surface. + */ + sbuf->key.flags = SVGA3D_SURFACE_TRANSFER_FROM_BUFFER; + } + sbuf->key.size.width = sbuf->b.b.width0; sbuf->key.size.height = 1; sbuf->key.size.depth = 1; @@ -175,10 +185,12 @@ sbuf->key.cachable = 1; sbuf->key.arraySize = 1; - SVGA_DBG(DEBUG_DMA, "surface_create for buffer sz %d\n", sbuf->b.b.width0); + SVGA_DBG(DEBUG_DMA, "surface_create for buffer sz %d\n", + sbuf->b.b.width0); sbuf->handle = svga_screen_surface_create(ss, sbuf->b.b.bind, - sbuf->b.b.usage, &sbuf->key); + sbuf->b.b.usage, + &validated, &sbuf->key); if (!sbuf->handle) return PIPE_ERROR_OUT_OF_MEMORY; @@ -188,7 +200,8 @@ */ sbuf->dma.flags.discard = TRUE; - SVGA_DBG(DEBUG_DMA, " --> got sid %p sz %d (buffer)\n", sbuf->handle, sbuf->b.b.width0); + SVGA_DBG(DEBUG_DMA, " --> got sid %p sz %d (buffer)\n", + sbuf->handle, sbuf->b.b.width0); } return PIPE_OK; @@ -200,7 +213,8 @@ struct svga_buffer *sbuf) { if (sbuf->handle) { - SVGA_DBG(DEBUG_DMA, " ungrab sid %p sz %d\n", sbuf->handle, sbuf->b.b.width0); + SVGA_DBG(DEBUG_DMA, " ungrab sid %p sz %d\n", + sbuf->handle, sbuf->b.b.width0); svga_screen_surface_destroy(ss, &sbuf->key, &sbuf->handle); } } @@ -219,10 +233,11 @@ struct svga_winsys_context *swc = svga->swc; SVGA3dCmdUpdateGBImage *update_cmd; struct svga_3d_update_gb_image *whole_update_cmd = NULL; - uint32 numBoxes = sbuf->map.num_ranges; + const uint32 numBoxes = sbuf->map.num_ranges; struct pipe_resource *dummy; unsigned i; + assert(svga_have_gb_objects(svga)); assert(numBoxes); assert(sbuf->dma.updates == NULL); @@ -318,26 +333,27 @@ /** - * Variant of SVGA3D_BufferDMA which leaves the copy box temporarily in blank. + * Issue DMA commands to transfer guest memory to the host. + * Note that the memory segments (offset, size) will be patched in + * later in the svga_buffer_upload_flush() function. */ static enum pipe_error -svga_buffer_upload_command(struct svga_context *svga, - struct svga_buffer *sbuf) +svga_buffer_upload_hb_command(struct svga_context *svga, + struct svga_buffer *sbuf) { struct svga_winsys_context *swc = svga->swc; struct svga_winsys_buffer *guest = sbuf->hwbuf; struct svga_winsys_surface *host = sbuf->handle; - SVGA3dTransferType transfer = SVGA3D_WRITE_HOST_VRAM; + const SVGA3dTransferType transfer = SVGA3D_WRITE_HOST_VRAM; SVGA3dCmdSurfaceDMA *cmd; - uint32 numBoxes = sbuf->map.num_ranges; + const uint32 numBoxes = sbuf->map.num_ranges; SVGA3dCopyBox *boxes; SVGA3dCmdSurfaceDMASuffix *pSuffix; unsigned region_flags; unsigned surface_flags; struct pipe_resource *dummy; - if (svga_have_gb_objects(svga)) - return svga_buffer_upload_gb_command(svga, sbuf); + assert(!svga_have_gb_objects(svga)); if (transfer == SVGA3D_WRITE_HOST_VRAM) { region_flags = SVGA_RELOC_READ; @@ -394,6 +410,20 @@ /** + * Issue commands to transfer guest memory to the host. + */ +static enum pipe_error +svga_buffer_upload_command(struct svga_context *svga, struct svga_buffer *sbuf) +{ + if (svga_have_gb_objects(svga)) { + return svga_buffer_upload_gb_command(svga, sbuf); + } else { + return svga_buffer_upload_hb_command(svga, sbuf); + } +} + + +/** * Patch up the upload DMA command reserved by svga_buffer_upload_command * with the final ranges. */ @@ -503,9 +533,7 @@ * We try to lump as many contiguous DMA transfers together as possible. */ void -svga_buffer_add_range(struct svga_buffer *sbuf, - unsigned start, - unsigned end) +svga_buffer_add_range(struct svga_buffer *sbuf, unsigned start, unsigned end) { unsigned i; unsigned nearest_range; @@ -524,15 +552,10 @@ /* * Try to grow one of the ranges. */ - for (i = 0; i < sbuf->map.num_ranges; ++i) { - int left_dist; - int right_dist; - int dist; - - left_dist = start - sbuf->map.ranges[i].end; - right_dist = sbuf->map.ranges[i].start - end; - dist = MAX2(left_dist, right_dist); + const int left_dist = start - sbuf->map.ranges[i].end; + const int right_dist = sbuf->map.ranges[i].start - end; + const int dist = MAX2(left_dist, right_dist); if (dist <= 0) { /* @@ -543,7 +566,6 @@ * anything. If the ranges overlap here it must surely be because * PIPE_TRANSFER_UNSYNCHRONIZED was set. */ - sbuf->map.ranges[i].start = MIN2(sbuf->map.ranges[i].start, start); sbuf->map.ranges[i].end = MAX2(sbuf->map.ranges[i].end, end); return; @@ -552,7 +574,6 @@ /* * Discontiguous ranges -- keep track of the nearest range. */ - if (dist < nearest_dist) { nearest_range = i; nearest_dist = dist; @@ -589,8 +610,10 @@ assert(nearest_range < SVGA_BUFFER_MAX_RANGES); assert(nearest_range < sbuf->map.num_ranges); - sbuf->map.ranges[nearest_range].start = MIN2(sbuf->map.ranges[nearest_range].start, start); - sbuf->map.ranges[nearest_range].end = MAX2(sbuf->map.ranges[nearest_range].end, end); + sbuf->map.ranges[nearest_range].start = + MIN2(sbuf->map.ranges[nearest_range].start, start); + sbuf->map.ranges[nearest_range].end = + MAX2(sbuf->map.ranges[nearest_range].end, end); } } @@ -608,13 +631,13 @@ enum pipe_error ret; boolean retry; void *map; + unsigned i; assert(sbuf->swbuf); if (!sbuf->swbuf) return PIPE_ERROR; - ret = svga_buffer_create_hw_storage(svga_screen(sbuf->b.b.screen), - sbuf); + ret = svga_buffer_create_hw_storage(svga_screen(sbuf->b.b.screen), sbuf); if (ret != PIPE_OK) return ret; @@ -628,12 +651,18 @@ return PIPE_ERROR; } - memcpy(map, sbuf->swbuf, sbuf->b.b.width0); + /* Copy data from malloc'd swbuf to the new hardware buffer */ + for (i = 0; i < sbuf->map.num_ranges; i++) { + unsigned start = sbuf->map.ranges[i].start; + unsigned len = sbuf->map.ranges[i].end - start; + memcpy((uint8_t *) map + start, (uint8_t *) sbuf->swbuf + start, len); + } + svga_buffer_hw_storage_unmap(svga, sbuf); /* This user/malloc buffer is now indistinguishable from a gpu buffer */ - assert(!sbuf->map.count); - if (!sbuf->map.count) { + assert(sbuf->map.count == 0); + if (sbuf->map.count == 0) { if (sbuf->user) sbuf->user = FALSE; else @@ -673,7 +702,7 @@ SVGA_DBG(DEBUG_DMA, "dma to sid %p\n", sbuf->handle); for (i = 0; i < sbuf->map.num_ranges; ++i) { - struct svga_buffer_range *range = &sbuf->map.ranges[i]; + const struct svga_buffer_range *range = &sbuf->map.ranges[i]; unsigned offset = range->start; unsigned size = range->end - range->start; @@ -740,8 +769,7 @@ * if there are mapped ranges and the data is currently in a malloc'ed buffer. */ struct svga_winsys_surface * -svga_buffer_handle(struct svga_context *svga, - struct pipe_resource *buf) +svga_buffer_handle(struct svga_context *svga, struct pipe_resource *buf) { struct pipe_screen *screen = svga->pipe.screen; struct svga_screen *ss = svga_screen(screen); @@ -770,19 +798,12 @@ if (sbuf->map.num_ranges) { if (!sbuf->dma.pending) { - /* - * No pending DMA upload yet, so insert a DMA upload command now. - */ + /* No pending DMA/update commands yet. */ - /* - * Migrate the data from swbuf -> hwbuf if necessary. - */ + /* Migrate the data from swbuf -> hwbuf if necessary */ ret = svga_buffer_update_hw(svga, sbuf); if (ret == PIPE_OK) { - /* - * Queue a dma command. - */ - + /* Emit DMA or UpdateGBImage commands */ ret = svga_buffer_upload_command(svga, sbuf); if (ret == PIPE_ERROR_OUT_OF_MEMORY) { svga_context_flush(svga, NULL); @@ -820,7 +841,7 @@ } } - assert(!sbuf->map.num_ranges || sbuf->dma.pending); + assert(sbuf->map.num_ranges == 0 || sbuf->dma.pending); return sbuf->handle; } @@ -831,12 +852,13 @@ svga_context_flush_buffers(struct svga_context *svga) { struct list_head *curr, *next; - struct svga_buffer *sbuf; + + SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_BUFFERSFLUSH); curr = svga->dirty_buffers.next; next = curr->next; - while(curr != &svga->dirty_buffers) { - sbuf = LIST_ENTRY(struct svga_buffer, curr, head); + while (curr != &svga->dirty_buffers) { + struct svga_buffer *sbuf = LIST_ENTRY(struct svga_buffer, curr, head); assert(p_atomic_read(&sbuf->b.b.reference.count) != 0); assert(sbuf->dma.pending); @@ -846,4 +868,6 @@ curr = next; next = curr->next; } + + SVGA_STATS_TIME_POP(svga_sws(svga)); } diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_resource.c mesa-17.0.7/src/gallium/drivers/svga/svga_resource.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_resource.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_resource.c 2017-06-01 10:37:10.000000000 +0000 @@ -107,7 +107,8 @@ svga->pipe.transfer_map = u_transfer_map_vtbl; svga->pipe.transfer_flush_region = u_transfer_flush_region_vtbl; svga->pipe.transfer_unmap = u_transfer_unmap_vtbl; - svga->pipe.transfer_inline_write = u_transfer_inline_write_vtbl; + svga->pipe.buffer_subdata = u_default_buffer_subdata; + svga->pipe.texture_subdata = u_default_texture_subdata; if (svga_have_vgpu10(svga)) { svga->pipe.generate_mipmap = svga_texture_generate_mipmap; diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_resource_texture.c mesa-17.0.7/src/gallium/drivers/svga/svga_resource_texture.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_resource_texture.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_resource_texture.c 2017-06-01 10:37:10.000000000 +0000 @@ -29,12 +29,12 @@ #include "pipe/p_state.h" #include "pipe/p_defines.h" #include "os/os_thread.h" -#include "os/os_time.h" #include "util/u_format.h" #include "util/u_inlines.h" #include "util/u_math.h" #include "util/u_memory.h" #include "util/u_resource.h" +#include "util/u_upload_mgr.h" #include "svga_cmd.h" #include "svga_format.h" @@ -51,7 +51,9 @@ svga_transfer_dma_band(struct svga_context *svga, struct svga_transfer *st, SVGA3dTransferType transfer, - unsigned y, unsigned h, unsigned srcy, + unsigned x, unsigned y, unsigned z, + unsigned w, unsigned h, unsigned d, + unsigned srcx, unsigned srcy, unsigned srcz, SVGA3dSurfaceDMAFlags flags) { struct svga_texture *texture = svga_texture(st->base.resource); @@ -60,27 +62,27 @@ assert(!st->use_direct_map); - box.x = st->base.box.x; + box.x = x; box.y = y; - box.z = st->base.box.z; - box.w = st->base.box.width; + box.z = z; + box.w = w; box.h = h; - box.d = 1; - box.srcx = 0; + box.d = d; + box.srcx = srcx; box.srcy = srcy; - box.srcz = 0; + box.srcz = srcz; SVGA_DBG(DEBUG_DMA, "dma %s sid %p, face %u, (%u, %u, %u) - " "(%u, %u, %u), %ubpp\n", transfer == SVGA3D_WRITE_HOST_VRAM ? "to" : "from", texture->handle, st->slice, - st->base.box.x, + x, y, - box.z, - st->base.box.x + st->base.box.width, + z, + x + w, y + h, - box.z + 1, + z + 1, util_format_get_blocksize(texture->b.b.format) * 8 / (util_format_get_blockwidth(texture->b.b.format) * util_format_get_blockheight(texture->b.b.format))); @@ -119,7 +121,9 @@ if (!st->swbuf) { /* Do the DMA transfer in a single go */ svga_transfer_dma_band(svga, st, transfer, - st->base.box.y, st->base.box.height, 0, + st->base.box.x, st->base.box.y, st->base.box.z, + st->base.box.width, st->base.box.height, st->base.box.depth, + 0, 0, 0, flags); if (transfer == SVGA3D_READ_HOST_VRAM) { @@ -170,7 +174,10 @@ } } - svga_transfer_dma_band(svga, st, transfer, y, h, srcy, flags); + svga_transfer_dma_band(svga, st, transfer, + st->base.box.x, y, st->base.box.z, + st->base.box.width, h, st->base.box.depth, + 0, srcy, 0, flags); /* * Prevent the texture contents to be discarded on the next band @@ -194,6 +201,7 @@ } + static boolean svga_texture_get_handle(struct pipe_screen *screen, struct pipe_resource *texture, @@ -244,30 +252,39 @@ /** + * Determine if the resource was rendered to + */ +static inline boolean +was_tex_rendered_to(struct pipe_resource *resource, + const struct pipe_transfer *transfer) +{ + unsigned face; + + if (resource->target == PIPE_TEXTURE_CUBE) { + assert(transfer->box.depth == 1); + face = transfer->box.z; + } + else { + face = 0; + } + + return svga_was_texture_rendered_to(svga_texture(resource), + face, transfer->level); +} + + +/** * Determine if we need to read back a texture image before mapping it. */ -static boolean +static inline boolean need_tex_readback(struct pipe_transfer *transfer) { - struct svga_texture *t = svga_texture(transfer->resource); - if (transfer->usage & PIPE_TRANSFER_READ) return TRUE; if ((transfer->usage & PIPE_TRANSFER_WRITE) && ((transfer->usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) == 0)) { - unsigned face; - - if (transfer->resource->target == PIPE_TEXTURE_CUBE) { - assert(transfer->box.depth == 1); - face = transfer->box.z; - } - else { - face = 0; - } - if (svga_was_texture_rendered_to(t, face, transfer->level)) { - return TRUE; - } + return was_tex_rendered_to(transfer->resource, transfer); } return FALSE; @@ -311,209 +328,151 @@ } +/** + * Use DMA for the transfer request + */ static void * -svga_texture_transfer_map(struct pipe_context *pipe, - struct pipe_resource *texture, - unsigned level, - unsigned usage, - const struct pipe_box *box, - struct pipe_transfer **ptransfer) +svga_texture_transfer_map_dma(struct svga_context *svga, + struct svga_transfer *st) { - struct svga_context *svga = svga_context(pipe); - struct svga_screen *ss = svga_screen(pipe->screen); - struct svga_winsys_screen *sws = ss->sws; - struct svga_texture *tex = svga_texture(texture); - struct svga_transfer *st; + struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws; + struct pipe_resource *texture = st->base.resource; unsigned nblocksx, nblocksy; - boolean use_direct_map = svga_have_gb_objects(svga) && - !svga_have_gb_dma(svga); unsigned d; - void *returnVal; - int64_t begin = os_time_get(); - - /* We can't map texture storage directly unless we have GB objects */ - if (usage & PIPE_TRANSFER_MAP_DIRECTLY) { - if (svga_have_gb_objects(svga)) - use_direct_map = TRUE; - else - return NULL; - } - - st = CALLOC_STRUCT(svga_transfer); - if (!st) - return NULL; - - { - unsigned w, h; - if (use_direct_map) { - /* we'll directly access the guest-backed surface */ - w = u_minify(texture->width0, level); - h = u_minify(texture->height0, level); - d = u_minify(texture->depth0, level); - } - else { - /* we'll put the data into a tightly packed buffer */ - w = box->width; - h = box->height; - d = box->depth; - } - nblocksx = util_format_get_nblocksx(texture->format, w); - nblocksy = util_format_get_nblocksy(texture->format, h); - } + unsigned usage = st->base.usage; - pipe_resource_reference(&st->base.resource, texture); + /* we'll put the data into a tightly packed buffer */ + nblocksx = util_format_get_nblocksx(texture->format, st->base.box.width); + nblocksy = util_format_get_nblocksy(texture->format, st->base.box.height); + d = st->base.box.depth; - st->base.level = level; - st->base.usage = usage; - st->base.box = *box; st->base.stride = nblocksx*util_format_get_blocksize(texture->format); st->base.layer_stride = st->base.stride * nblocksy; + st->hw_nblocksy = nblocksy; - switch (tex->b.b.target) { - case PIPE_TEXTURE_CUBE: - case PIPE_TEXTURE_2D_ARRAY: - case PIPE_TEXTURE_1D_ARRAY: - st->slice = st->base.box.z; - st->base.box.z = 0; /* so we don't apply double offsets below */ - break; - default: - st->slice = 0; - break; - } + st->hwbuf = svga_winsys_buffer_create(svga, 1, 0, + st->hw_nblocksy * st->base.stride * d); - if (usage & PIPE_TRANSFER_WRITE) { - /* record texture upload for HUD */ - svga->hud.num_bytes_uploaded += - nblocksx * nblocksy * d * util_format_get_blocksize(texture->format); + while (!st->hwbuf && (st->hw_nblocksy /= 2)) { + st->hwbuf = + svga_winsys_buffer_create(svga, 1, 0, + st->hw_nblocksy * st->base.stride * d); } - if (!use_direct_map) { - /* Use a DMA buffer */ - st->hw_nblocksy = nblocksy; + if (!st->hwbuf) + return NULL; - st->hwbuf = svga_winsys_buffer_create(svga, 1, 0, - st->hw_nblocksy * st->base.stride * d); - while(!st->hwbuf && (st->hw_nblocksy /= 2)) { - st->hwbuf = svga_winsys_buffer_create(svga, 1, 0, - st->hw_nblocksy * st->base.stride * d); + if (st->hw_nblocksy < nblocksy) { + /* We couldn't allocate a hardware buffer big enough for the transfer, + * so allocate regular malloc memory instead + */ + if (0) { + debug_printf("%s: failed to allocate %u KB of DMA, " + "splitting into %u x %u KB DMA transfers\n", + __FUNCTION__, + (nblocksy * st->base.stride + 1023) / 1024, + (nblocksy + st->hw_nblocksy - 1) / st->hw_nblocksy, + (st->hw_nblocksy * st->base.stride + 1023) / 1024); } - if (!st->hwbuf) { - FREE(st); + st->swbuf = MALLOC(nblocksy * st->base.stride * d); + if (!st->swbuf) { + sws->buffer_destroy(sws, st->hwbuf); return NULL; } + } - if (st->hw_nblocksy < nblocksy) { - /* We couldn't allocate a hardware buffer big enough for the transfer, - * so allocate regular malloc memory instead */ - if (0) { - debug_printf("%s: failed to allocate %u KB of DMA, " - "splitting into %u x %u KB DMA transfers\n", - __FUNCTION__, - (nblocksy*st->base.stride + 1023)/1024, - (nblocksy + st->hw_nblocksy - 1)/st->hw_nblocksy, - (st->hw_nblocksy*st->base.stride + 1023)/1024); - } - - st->swbuf = MALLOC(nblocksy * st->base.stride * d); - if (!st->swbuf) { - sws->buffer_destroy(sws, st->hwbuf); - FREE(st); - return NULL; - } - } - - if (usage & PIPE_TRANSFER_READ) { - SVGA3dSurfaceDMAFlags flags; - memset(&flags, 0, sizeof flags); - svga_transfer_dma(svga, st, SVGA3D_READ_HOST_VRAM, flags); - } - } else { - struct pipe_transfer *transfer = &st->base; - struct svga_winsys_surface *surf = tex->handle; + if (usage & PIPE_TRANSFER_READ) { + SVGA3dSurfaceDMAFlags flags; + memset(&flags, 0, sizeof flags); + svga_transfer_dma(svga, st, SVGA3D_READ_HOST_VRAM, flags); + } - if (!surf) { - FREE(st); - return NULL; - } + if (st->swbuf) { + return st->swbuf; + } + else { + return sws->buffer_map(sws, st->hwbuf, usage); + } +} - /* If this is the first time mapping to the surface in this - * command buffer, clear the dirty masks of this surface. - */ - if (sws->surface_is_flushed(sws, surf)) { - svga_clear_texture_dirty(tex); - } - if (need_tex_readback(transfer)) { - enum pipe_error ret; +/** + * Use direct map for the transfer request + */ +static void * +svga_texture_transfer_map_direct(struct svga_context *svga, + struct svga_transfer *st) +{ + struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws; + struct pipe_transfer *transfer = &st->base; + struct pipe_resource *texture = transfer->resource; + struct svga_texture *tex = svga_texture(texture); + struct svga_winsys_surface *surf = tex->handle; + unsigned level = st->base.level; + unsigned w, h, nblocksx, nblocksy; + unsigned usage = st->base.usage; - svga_surfaces_flush(svga); + if (need_tex_readback(transfer)) { + enum pipe_error ret; - if (svga_have_vgpu10(svga)) { - ret = readback_image_vgpu10(svga, surf, st->slice, transfer->level, - tex->b.b.last_level + 1); - } else { - ret = readback_image_vgpu9(svga, surf, st->slice, transfer->level); - } + svga_surfaces_flush(svga); - svga->hud.num_readbacks++; + if (svga_have_vgpu10(svga)) { + ret = readback_image_vgpu10(svga, surf, st->slice, level, + tex->b.b.last_level + 1); + } else { + ret = readback_image_vgpu9(svga, surf, st->slice, level); + } - assert(ret == PIPE_OK); - (void) ret; + svga->hud.num_readbacks++; + SVGA_STATS_COUNT_INC(sws, SVGA_STATS_COUNT_TEXREADBACK); - svga_context_flush(svga, NULL); + assert(ret == PIPE_OK); + (void) ret; - /* - * Note: if PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE were specified - * we could potentially clear the flag for all faces/layers/mips. - */ - svga_clear_texture_rendered_to(tex, st->slice, transfer->level); - } - else { - assert(transfer->usage & PIPE_TRANSFER_WRITE); - if ((transfer->usage & PIPE_TRANSFER_UNSYNCHRONIZED) == 0) { - if (svga_is_texture_dirty(tex, st->slice, transfer->level)) { - /* - * do a surface flush if the subresource has been modified - * in this command buffer. - */ - svga_surfaces_flush(svga); - if (!sws->surface_is_flushed(sws, surf)) { - svga->hud.surface_write_flushes++; - svga_context_flush(svga, NULL); - } + svga_context_flush(svga, NULL); + /* + * Note: if PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE were specified + * we could potentially clear the flag for all faces/layers/mips. + */ + svga_clear_texture_rendered_to(tex, st->slice, level); + } + else { + assert(usage & PIPE_TRANSFER_WRITE); + if ((usage & PIPE_TRANSFER_UNSYNCHRONIZED) == 0) { + if (svga_is_texture_dirty(tex, st->slice, level)) { + /* + * do a surface flush if the subresource has been modified + * in this command buffer. + */ + svga_surfaces_flush(svga); + if (!sws->surface_is_flushed(sws, surf)) { + svga->hud.surface_write_flushes++; + SVGA_STATS_COUNT_INC(sws, SVGA_STATS_COUNT_SURFACEWRITEFLUSH); + svga_context_flush(svga, NULL); } - } - } - if (transfer->usage & PIPE_TRANSFER_WRITE) { - /* mark this texture level as dirty */ - svga_set_texture_dirty(tex, st->slice, transfer->level); + } } } - st->use_direct_map = use_direct_map; - - *ptransfer = &st->base; + /* we'll directly access the guest-backed surface */ + w = u_minify(texture->width0, level); + h = u_minify(texture->height0, level); + nblocksx = util_format_get_nblocksx(texture->format, w); + nblocksy = util_format_get_nblocksy(texture->format, h); + st->hw_nblocksy = nblocksy; + st->base.stride = nblocksx*util_format_get_blocksize(texture->format); + st->base.layer_stride = st->base.stride * nblocksy; /* * Begin mapping code */ - if (st->swbuf) { - returnVal = st->swbuf; - } - else if (!st->use_direct_map) { - returnVal = sws->buffer_map(sws, st->hwbuf, usage); - } - else { + { SVGA3dSize baseLevelSize; - struct svga_texture *tex = svga_texture(texture); - struct svga_winsys_surface *surf = tex->handle; uint8_t *map; boolean retry; unsigned offset, mip_width, mip_height; - unsigned xoffset = st->base.box.x; - unsigned yoffset = st->base.box.y; - unsigned zoffset = st->base.box.z; map = svga->swc->surface_map(svga->swc, surf, usage, &retry); if (map == NULL && retry) { @@ -521,6 +480,7 @@ * At this point, the svga_surfaces_flush() should already have * called in svga_texture_get_transfer(). */ + svga->hud.surface_write_flushes++; svga_context_flush(svga, NULL); map = svga->swc->surface_map(svga->swc, surf, usage, &retry); } @@ -529,8 +489,7 @@ * Make sure we return NULL if the map fails */ if (!map) { - FREE(st); - return map; + return NULL; } /** @@ -540,6 +499,13 @@ baseLevelSize.height = tex->b.b.height0; baseLevelSize.depth = tex->b.b.depth0; + if ((tex->b.b.target == PIPE_TEXTURE_1D_ARRAY) || + (tex->b.b.target == PIPE_TEXTURE_2D_ARRAY)) { + st->base.layer_stride = + svga3dsurface_get_image_offset(tex->key.format, baseLevelSize, + tex->b.b.last_level + 1, 1, 0); + } + offset = svga3dsurface_get_image_offset(tex->key.format, baseLevelSize, tex->b.b.last_level + 1, /* numMips */ st->slice, level); @@ -552,16 +518,152 @@ offset += svga3dsurface_get_pixel_offset(tex->key.format, mip_width, mip_height, - xoffset, yoffset, zoffset); - returnVal = (void *) (map + offset); + st->base.box.x, + st->base.box.y, + st->base.box.z); + return (void *) (map + offset); } +} - svga->hud.map_buffer_time += (os_time_get() - begin); - svga->hud.num_resources_mapped++; - return returnVal; -} +/** + * Request a transfer map to the texture resource + */ +static void * +svga_texture_transfer_map(struct pipe_context *pipe, + struct pipe_resource *texture, + unsigned level, + unsigned usage, + const struct pipe_box *box, + struct pipe_transfer **ptransfer) +{ + struct svga_context *svga = svga_context(pipe); + struct svga_winsys_screen *sws = svga_screen(pipe->screen)->sws; + struct svga_texture *tex = svga_texture(texture); + struct svga_transfer *st; + struct svga_winsys_surface *surf = tex->handle; + boolean use_direct_map = svga_have_gb_objects(svga) && + !svga_have_gb_dma(svga); + void *map = NULL; + int64_t begin = svga_get_time(svga); + + SVGA_STATS_TIME_PUSH(sws, SVGA_STATS_TIME_TEXTRANSFERMAP); + + if (!surf) + goto done; + + /* We can't map texture storage directly unless we have GB objects */ + if (usage & PIPE_TRANSFER_MAP_DIRECTLY) { + if (svga_have_gb_objects(svga)) + use_direct_map = TRUE; + else + goto done; + } + + st = CALLOC_STRUCT(svga_transfer); + if (!st) + goto done; + + st->base.level = level; + st->base.usage = usage; + st->base.box = *box; + + switch (tex->b.b.target) { + case PIPE_TEXTURE_CUBE: + st->slice = st->base.box.z; + st->base.box.z = 0; /* so we don't apply double offsets below */ + break; + case PIPE_TEXTURE_2D_ARRAY: + case PIPE_TEXTURE_1D_ARRAY: + st->slice = st->base.box.z; + st->base.box.z = 0; /* so we don't apply double offsets below */ + + /* Force direct map for transfering multiple slices */ + if (st->base.box.depth > 1) + use_direct_map = svga_have_gb_objects(svga); + + break; + default: + st->slice = 0; + break; + } + + st->use_direct_map = use_direct_map; + pipe_resource_reference(&st->base.resource, texture); + + /* If this is the first time mapping to the surface in this + * command buffer, clear the dirty masks of this surface. + */ + if (sws->surface_is_flushed(sws, surf)) { + svga_clear_texture_dirty(tex); + } + if (!use_direct_map) { + /* upload to the DMA buffer */ + map = svga_texture_transfer_map_dma(svga, st); + } + else { + boolean can_use_upload = tex->can_use_upload && + !(st->base.usage & PIPE_TRANSFER_READ); + boolean was_rendered_to = was_tex_rendered_to(texture, &st->base); + + /* If the texture was already rendered to and upload buffer + * is supported, then we will use upload buffer to + * avoid the need to read back the texture content; otherwise, + * we'll first try to map directly to the GB surface, if it is blocked, + * then we'll try the upload buffer. + */ + if (was_rendered_to && can_use_upload) { + map = svga_texture_transfer_map_upload(svga, st); + } + else { + unsigned orig_usage = st->base.usage; + + /* First try directly map to the GB surface */ + if (can_use_upload) + st->base.usage |= PIPE_TRANSFER_DONTBLOCK; + map = svga_texture_transfer_map_direct(svga, st); + st->base.usage = orig_usage; + + if (!map && can_use_upload) { + /* if direct map with DONTBLOCK fails, then try upload to the + * texture upload buffer. + */ + map = svga_texture_transfer_map_upload(svga, st); + } + } + + /* If upload fails, then try direct map again without forcing it + * to DONTBLOCK. + */ + if (!map) { + map = svga_texture_transfer_map_direct(svga, st); + } + } + + if (!map) { + FREE(st); + } + else { + *ptransfer = &st->base; + svga->hud.num_textures_mapped++; + if (usage & PIPE_TRANSFER_WRITE) { + /* record texture upload for HUD */ + svga->hud.num_bytes_uploaded += + st->base.layer_stride * st->base.box.depth; + + /* mark this texture level as dirty */ + svga_set_texture_dirty(tex, st->slice, level); + } + } + +done: + svga->hud.map_buffer_time += (svga_get_time(svga) - begin); + SVGA_STATS_TIME_POP(sws); + (void) sws; + + return map; +} /** * Unmap a GB texture surface. @@ -629,64 +731,84 @@ } +/** + * unmap DMA transfer request + */ static void -svga_texture_transfer_unmap(struct pipe_context *pipe, - struct pipe_transfer *transfer) +svga_texture_transfer_unmap_dma(struct svga_context *svga, + struct svga_transfer *st) { - struct svga_context *svga = svga_context(pipe); - struct svga_screen *ss = svga_screen(pipe->screen); - struct svga_winsys_screen *sws = ss->sws; - struct svga_transfer *st = svga_transfer(transfer); - struct svga_texture *tex = svga_texture(transfer->resource); + struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws; - if (!st->swbuf) { - if (st->use_direct_map) { - svga_texture_surface_unmap(svga, transfer); - } - else { - sws->buffer_unmap(sws, st->hwbuf); - } - } + if (st->hwbuf) + sws->buffer_unmap(sws, st->hwbuf); - if (!st->use_direct_map && (st->base.usage & PIPE_TRANSFER_WRITE)) { + if (st->base.usage & PIPE_TRANSFER_WRITE) { /* Use DMA to transfer texture data */ SVGA3dSurfaceDMAFlags flags; memset(&flags, 0, sizeof flags); - if (transfer->usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) { + if (st->base.usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) { flags.discard = TRUE; } - if (transfer->usage & PIPE_TRANSFER_UNSYNCHRONIZED) { + if (st->base.usage & PIPE_TRANSFER_UNSYNCHRONIZED) { flags.unsynchronized = TRUE; } svga_transfer_dma(svga, st, SVGA3D_WRITE_HOST_VRAM, flags); - } else if (transfer->usage & PIPE_TRANSFER_WRITE) { - struct svga_winsys_surface *surf = - svga_texture(transfer->resource)->handle; + } + + FREE(st->swbuf); + sws->buffer_destroy(sws, st->hwbuf); +} + + +/** + * unmap direct map transfer request + */ +static void +svga_texture_transfer_unmap_direct(struct svga_context *svga, + struct svga_transfer *st) +{ + struct pipe_transfer *transfer = &st->base; + struct svga_texture *tex = svga_texture(transfer->resource); + + svga_texture_surface_unmap(svga, transfer); + + /* Now send an update command to update the content in the backend. */ + if (st->base.usage & PIPE_TRANSFER_WRITE) { + struct svga_winsys_surface *surf = tex->handle; SVGA3dBox box; enum pipe_error ret; + unsigned nlayers = 1; assert(svga_have_gb_objects(svga)); /* update the effected region */ box.x = transfer->box.x; box.y = transfer->box.y; + box.w = transfer->box.width; + box.h = transfer->box.height; + box.d = transfer->box.depth; + switch (tex->b.b.target) { case PIPE_TEXTURE_CUBE: + box.z = 0; + break; case PIPE_TEXTURE_2D_ARRAY: + nlayers = box.d; box.z = 0; + box.d = 1; break; case PIPE_TEXTURE_1D_ARRAY: + nlayers = box.d; box.y = box.z = 0; + box.d = 1; break; default: box.z = transfer->box.z; break; } - box.w = transfer->box.width; - box.h = transfer->box.height; - box.d = transfer->box.depth; if (0) debug_printf("%s %d, %d, %d %d x %d x %d\n", @@ -695,32 +817,60 @@ box.w, box.h, box.d); if (svga_have_vgpu10(svga)) { - ret = update_image_vgpu10(svga, surf, &box, st->slice, transfer->level, - tex->b.b.last_level + 1); + unsigned i; + for (i = 0; i < nlayers; i++) { + ret = update_image_vgpu10(svga, surf, &box, + st->slice + i, transfer->level, + tex->b.b.last_level + 1); + assert(ret == PIPE_OK); + } } else { + assert(nlayers == 1); ret = update_image_vgpu9(svga, surf, &box, st->slice, transfer->level); + assert(ret == PIPE_OK); } - - svga->hud.num_resource_updates++; - - assert(ret == PIPE_OK); (void) ret; } +} - ss->texture_timestamp++; - svga_age_texture_view(tex, transfer->level); - if (transfer->resource->target == PIPE_TEXTURE_CUBE) - svga_define_texture_level(tex, st->slice, transfer->level); - else - svga_define_texture_level(tex, 0, transfer->level); +static void +svga_texture_transfer_unmap(struct pipe_context *pipe, + struct pipe_transfer *transfer) +{ + struct svga_context *svga = svga_context(pipe); + struct svga_screen *ss = svga_screen(pipe->screen); + struct svga_winsys_screen *sws = ss->sws; + struct svga_transfer *st = svga_transfer(transfer); + struct svga_texture *tex = svga_texture(transfer->resource); - pipe_resource_reference(&st->base.resource, NULL); + SVGA_STATS_TIME_PUSH(sws, SVGA_STATS_TIME_TEXTRANSFERUNMAP); - FREE(st->swbuf); if (!st->use_direct_map) { - sws->buffer_destroy(sws, st->hwbuf); + svga_texture_transfer_unmap_dma(svga, st); + } + else if (st->upload.buf) { + svga_texture_transfer_unmap_upload(svga, st); + } + else { + svga_texture_transfer_unmap_direct(svga, st); + } + + if (st->base.usage & PIPE_TRANSFER_WRITE) { + svga->hud.num_resource_updates++; + + /* Mark the texture level as dirty */ + ss->texture_timestamp++; + svga_age_texture_view(tex, transfer->level); + if (transfer->resource->target == PIPE_TEXTURE_CUBE) + svga_define_texture_level(tex, st->slice, transfer->level); + else + svga_define_texture_level(tex, 0, transfer->level); } + + pipe_resource_reference(&st->base.resource, NULL); FREE(st); + SVGA_STATS_TIME_POP(sws); + (void) sws; } @@ -742,7 +892,6 @@ svga_texture_transfer_map, /* transfer_map */ u_default_transfer_flush_region, /* transfer_flush_region */ svga_texture_transfer_unmap, /* transfer_unmap */ - u_default_transfer_inline_write /* transfer_inline_write */ }; @@ -754,21 +903,24 @@ struct svga_texture *tex; unsigned bindings = template->bind; + SVGA_STATS_TIME_PUSH(svgascreen->sws, + SVGA_STATS_TIME_CREATETEXTURE); + assert(template->last_level < SVGA_MAX_TEXTURE_LEVELS); if (template->last_level >= SVGA_MAX_TEXTURE_LEVELS) { - return NULL; + goto fail_notex; } tex = CALLOC_STRUCT(svga_texture); if (!tex) { - return NULL; + goto fail_notex; } tex->defined = CALLOC(template->depth0 * template->array_size, sizeof(tex->defined[0])); if (!tex->defined) { FREE(tex); - return NULL; + goto fail_notex; } tex->rendered_to = CALLOC(template->depth0 * template->array_size, @@ -794,7 +946,9 @@ tex->key.size.depth = template->depth0; tex->key.arraySize = 1; tex->key.numFaces = 1; - tex->key.sampleCount = template->nr_samples; + + /* single sample texture can be treated as non-multisamples texture */ + tex->key.sampleCount = template->nr_samples > 1 ? template->nr_samples : 0; if (template->nr_samples > 1) { tex->key.flags |= SVGA3D_SURFACE_MASKABLE_ANTIALIAS; @@ -855,7 +1009,7 @@ tex->key.flags |= SVGA3D_SURFACE_BIND_SHADER_RESOURCE; if (!(bindings & PIPE_BIND_RENDER_TARGET)) { - /* Also check if the format is renderable */ + /* Also check if the format is color renderable */ if (screen->is_format_supported(screen, template->format, template->target, template->nr_samples, @@ -863,6 +1017,16 @@ bindings |= PIPE_BIND_RENDER_TARGET; } } + + if (!(bindings & PIPE_BIND_DEPTH_STENCIL)) { + /* Also check if the format is depth/stencil renderable */ + if (screen->is_format_supported(screen, template->format, + template->target, + template->nr_samples, + PIPE_BIND_DEPTH_STENCIL)) { + bindings |= PIPE_BIND_DEPTH_STENCIL; + } + } } if (bindings & PIPE_BIND_DISPLAY_TARGET) { @@ -923,12 +1087,23 @@ svga_format_name(typeless), bindings); } + + if (svga_format_is_uncompressed_snorm(tex->key.format)) { + /* We can't normally render to snorm surfaces, but once we + * substitute a typeless format, we can if the rendertarget view + * is unorm. This can happen with GL_ARB_copy_image. + */ + tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET; + tex->key.flags |= SVGA3D_SURFACE_BIND_RENDER_TARGET; + } + tex->key.format = typeless; } SVGA_DBG(DEBUG_DMA, "surface_create for texture\n", tex->handle); tex->handle = svga_screen_surface_create(svgascreen, bindings, - tex->b.b.usage, &tex->key); + tex->b.b.usage, + &tex->validated, &tex->key); if (!tex->handle) { goto fail; } @@ -939,9 +1114,16 @@ (debug_reference_descriptor)debug_describe_resource, 0); tex->size = util_resource_size(template); + + /* Determine if texture upload buffer can be used to upload this texture */ + tex->can_use_upload = svga_texture_transfer_map_can_upload(svgascreen, + &tex->b.b); + svgascreen->hud.total_resource_bytes += tex->size; svgascreen->hud.num_resources++; + SVGA_STATS_TIME_POP(svgascreen->sws); + return &tex->b.b; fail: @@ -952,6 +1134,8 @@ if (tex->defined) FREE(tex->defined); FREE(tex); +fail_notex: + SVGA_STATS_TIME_POP(svgascreen->sws); return NULL; } @@ -1116,3 +1300,208 @@ return TRUE; } + + +/* texture upload buffer default size in bytes */ +#define TEX_UPLOAD_DEFAULT_SIZE (1024 * 1024) + +/** + * Create a texture upload buffer + */ +boolean +svga_texture_transfer_map_upload_create(struct svga_context *svga) +{ + svga->tex_upload = u_upload_create(&svga->pipe, TEX_UPLOAD_DEFAULT_SIZE, + 0, PIPE_USAGE_STAGING); + return svga->tex_upload != NULL; +} + + +/** + * Destroy the texture upload buffer + */ +void +svga_texture_transfer_map_upload_destroy(struct svga_context *svga) +{ + u_upload_destroy(svga->tex_upload); +} + + +/** + * Returns true if this transfer map request can use the upload buffer. + */ +boolean +svga_texture_transfer_map_can_upload(const struct svga_screen *svgascreen, + const struct pipe_resource *texture) +{ + if (svgascreen->sws->have_transfer_from_buffer_cmd == FALSE) + return FALSE; + + /* TransferFromBuffer command is not well supported with multi-samples surface */ + if (texture->nr_samples > 1) + return FALSE; + + if (util_format_is_compressed(texture->format)) { + /* XXX Need to take a closer look to see why texture upload + * with 3D texture with compressed format fails + */ + if (texture->target == PIPE_TEXTURE_3D) + return FALSE; + } + else if (texture->format == PIPE_FORMAT_R9G9B9E5_FLOAT) { + return FALSE; + } + + return TRUE; +} + + +/** + * Use upload buffer for the transfer map request. + */ +void * +svga_texture_transfer_map_upload(struct svga_context *svga, + struct svga_transfer *st) +{ + struct pipe_resource *texture = st->base.resource; + struct pipe_resource *tex_buffer = NULL; + void *tex_map; + unsigned nblocksx, nblocksy; + unsigned offset; + unsigned upload_size; + + assert(svga->tex_upload); + + st->upload.box.x = st->base.box.x; + st->upload.box.y = st->base.box.y; + st->upload.box.z = st->base.box.z; + st->upload.box.w = st->base.box.width; + st->upload.box.h = st->base.box.height; + st->upload.box.d = st->base.box.depth; + st->upload.nlayers = 1; + + switch (texture->target) { + case PIPE_TEXTURE_CUBE: + st->upload.box.z = 0; + break; + case PIPE_TEXTURE_2D_ARRAY: + st->upload.nlayers = st->base.box.depth; + st->upload.box.z = 0; + st->upload.box.d = 1; + break; + case PIPE_TEXTURE_1D_ARRAY: + st->upload.nlayers = st->base.box.depth; + st->upload.box.y = st->upload.box.z = 0; + st->upload.box.d = 1; + break; + default: + break; + } + + nblocksx = util_format_get_nblocksx(texture->format, st->base.box.width); + nblocksy = util_format_get_nblocksy(texture->format, st->base.box.height); + + st->base.stride = nblocksx * util_format_get_blocksize(texture->format); + st->base.layer_stride = st->base.stride * nblocksy; + + /* In order to use the TransferFromBuffer command to update the + * texture content from the buffer, the layer stride for a multi-layers + * surface needs to be in multiples of 16 bytes. + */ + if (st->upload.nlayers > 1 && st->base.layer_stride & 15) + return NULL; + + upload_size = st->base.layer_stride * st->base.box.depth; + upload_size = align(upload_size, 16); + +#ifdef DEBUG + if (util_format_is_compressed(texture->format)) { + struct svga_texture *tex = svga_texture(texture); + unsigned blockw, blockh, bytesPerBlock; + + svga_format_size(tex->key.format, &blockw, &blockh, &bytesPerBlock); + + /* dest box must start on block boundary */ + assert((st->base.box.x % blockw) == 0); + assert((st->base.box.y % blockh) == 0); + } +#endif + + /* If the upload size exceeds the default buffer size, the + * upload buffer manager code will try to allocate a new buffer + * with the new buffer size. + */ + u_upload_alloc(svga->tex_upload, 0, upload_size, 16, + &offset, &tex_buffer, &tex_map); + + if (!tex_map) { + return NULL; + } + + st->upload.buf = tex_buffer; + st->upload.map = tex_map; + st->upload.offset = offset; + + return tex_map; +} + + +/** + * Unmap upload map transfer request + */ +void +svga_texture_transfer_unmap_upload(struct svga_context *svga, + struct svga_transfer *st) +{ + struct svga_winsys_surface *srcsurf; + struct svga_winsys_surface *dstsurf; + struct pipe_resource *texture = st->base.resource; + struct svga_texture *tex = svga_texture(texture); + enum pipe_error ret; + unsigned subResource; + unsigned numMipLevels; + unsigned i, layer; + unsigned offset = st->upload.offset; + + assert(svga->tex_upload); + assert(st->upload.buf); + + /* unmap the texture upload buffer */ + u_upload_unmap(svga->tex_upload); + + srcsurf = svga_buffer_handle(svga, st->upload.buf); + dstsurf = svga_texture(texture)->handle; + assert(dstsurf); + + numMipLevels = texture->last_level + 1; + + for (i = 0, layer = st->slice; i < st->upload.nlayers; i++, layer++) { + subResource = layer * numMipLevels + st->base.level; + + /* send a transferFromBuffer command to update the host texture surface */ + assert((offset & 15) == 0); + + ret = SVGA3D_vgpu10_TransferFromBuffer(svga->swc, srcsurf, + offset, + st->base.stride, + st->base.layer_stride, + dstsurf, subResource, + &st->upload.box); + if (ret != PIPE_OK) { + svga_context_flush(svga, NULL); + ret = SVGA3D_vgpu10_TransferFromBuffer(svga->swc, srcsurf, + offset, + st->base.stride, + st->base.layer_stride, + dstsurf, subResource, + &st->upload.box); + assert(ret == PIPE_OK); + } + offset += st->base.layer_stride; + + /* Set rendered-to flag */ + svga_set_texture_rendered_to(tex, layer, st->base.level); + } + + pipe_resource_reference(&st->upload.buf, NULL); +} diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_resource_texture.h mesa-17.0.7/src/gallium/drivers/svga/svga_resource_texture.h --- mesa-12.0.6/src/gallium/drivers/svga/svga_resource_texture.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_resource_texture.h 2017-06-01 10:37:10.000000000 +0000 @@ -78,11 +78,23 @@ struct svga_winsys_surface *handle; /** + * Whether the host side surface is validated, either through the + * InvalidateGBSurface command or after the surface is updated + * or rendered to. + */ + boolean validated; + + /** * Whether the host side surface is imported and not created by this * driver. */ boolean imported; + /** + * Whether texture upload buffer can be used on this texture + */ + boolean can_use_upload; + unsigned size; /**< Approximate size in bytes */ /** array indexed by cube face or 3D/array slice, one bit per mipmap level */ @@ -113,11 +125,27 @@ * big enough */ void *swbuf; + /* True if guest backed surface is supported and we can directly map + * to the surface for this transfer. + */ boolean use_direct_map; + + struct { + struct pipe_resource *buf; /* points to the upload buffer if this + * transfer is done via the upload buffer + * instead of directly mapping to the + * resource's surface. + */ + void *map; + unsigned offset; + SVGA3dBox box; + unsigned nlayers; + } upload; }; -static inline struct svga_texture *svga_texture( struct pipe_resource *resource ) +static inline struct svga_texture * +svga_texture(struct pipe_resource *resource) { struct svga_texture *tex = (struct svga_texture *)resource; assert(tex == NULL || tex->b.vtbl == &svga_texture_vtbl); @@ -174,6 +202,7 @@ { check_face_level(tex, face, level); tex->defined[face] |= 1 << level; + tex->validated = TRUE; } @@ -192,6 +221,7 @@ { check_face_level(tex, face, level); tex->rendered_to[face] |= 1 << level; + tex->validated = TRUE; } @@ -255,5 +285,22 @@ unsigned first_layer, unsigned last_layer); +boolean +svga_texture_transfer_map_upload_create(struct svga_context *svga); + +void +svga_texture_transfer_map_upload_destroy(struct svga_context *svga); + +boolean +svga_texture_transfer_map_can_upload(const struct svga_screen *svgascreen, + const struct pipe_resource *pt); + +void * +svga_texture_transfer_map_upload(struct svga_context *svga, + struct svga_transfer *st); + +void +svga_texture_transfer_unmap_upload(struct svga_context *svga, + struct svga_transfer *st); #endif /* SVGA_TEXTURE_H */ diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_sampler_view.h mesa-17.0.7/src/gallium/drivers/svga/svga_sampler_view.h --- mesa-12.0.6/src/gallium/drivers/svga/svga_sampler_view.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_sampler_view.h 2017-06-01 10:37:10.000000000 +0000 @@ -102,7 +102,11 @@ boolean svga_check_sampler_view_resource_collision(struct svga_context *svga, struct svga_winsys_surface *res, - unsigned shader); + enum pipe_shader_type shader); + +boolean +svga_check_sampler_framebuffer_resource_collision(struct svga_context *svga, + enum pipe_shader_type shader); enum pipe_error svga_validate_pipe_sampler_view(struct svga_context *svga, diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_screen.c mesa-17.0.7/src/gallium/drivers/svga/svga_screen.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_screen.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_screen.c 2017-06-01 10:37:10.000000000 +0000 @@ -86,6 +86,8 @@ */ build = "build: DEBUG;"; mutex = "mutex: " PIPE_ATOMIC ";"; +#elif defined(VMX86_STATS) + build = "build: OPT;"; #else build = "build: RELEASE;"; #endif @@ -179,6 +181,7 @@ switch (param) { case PIPE_CAP_NPOT_TEXTURES: case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES: + case PIPE_CAP_MIXED_COLOR_DEPTH_BITS: return 1; case PIPE_CAP_TWO_SIDED_STENCIL: return 1; @@ -295,6 +298,7 @@ case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS: return sws->have_vgpu10 ? SVGA3D_MAX_STREAMOUT_DECLS : 0; case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME: + case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS: return 0; case PIPE_CAP_TEXTURE_MULTISAMPLE: return svgascreen->ms_samples ? 1 : 0; @@ -365,6 +369,7 @@ case PIPE_CAP_PCI_DEVICE: case PIPE_CAP_PCI_FUNCTION: case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR: + case PIPE_CAP_NATIVE_FENCE_FD: return 0; case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT: return 64; @@ -388,6 +393,10 @@ case PIPE_CAP_VIDEO_MEMORY: /* XXX: Query the host ? */ return 1; + case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS: + return sws->have_vgpu10; + case PIPE_CAP_CLEAR_TEXTURE: + return sws->have_vgpu10; case PIPE_CAP_UMA: case PIPE_CAP_RESOURCE_FROM_USER_MEMORY: case PIPE_CAP_DEVICE_RESET_STATUS_QUERY: @@ -398,8 +407,6 @@ case PIPE_CAP_TGSI_TXQS: case PIPE_CAP_FORCE_PERSAMPLE_INTERP: case PIPE_CAP_SHAREABLE_SHADERS: - case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS: - case PIPE_CAP_CLEAR_TEXTURE: case PIPE_CAP_DRAW_PARAMETERS: case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL: case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL: @@ -408,6 +415,14 @@ case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT: case PIPE_CAP_CULL_DISTANCE: case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES: + case PIPE_CAP_TGSI_VOTE: + case PIPE_CAP_MAX_WINDOW_RECTANGLES: + case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED: + case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS: + case PIPE_CAP_TGSI_ARRAY_COMPONENTS: + case PIPE_CAP_TGSI_CAN_READ_OUTPUTS: + case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY: + case PIPE_CAP_TGSI_FS_FBFETCH: return 0; } @@ -488,6 +503,7 @@ case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: + case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: return 0; case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: return 32; @@ -550,6 +566,7 @@ case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: + case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: return 0; case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: return 32; @@ -645,6 +662,7 @@ case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: + case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: return 0; case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: return 32; @@ -799,18 +817,28 @@ static boolean svga_fence_finish(struct pipe_screen *screen, + struct pipe_context *ctx, struct pipe_fence_handle *fence, uint64_t timeout) { struct svga_winsys_screen *sws = svga_screen(screen)->sws; + boolean retVal; - if (!timeout) - return sws->fence_signalled(sws, fence, 0) == 0; + SVGA_STATS_TIME_PUSH(sws, SVGA_STATS_TIME_FENCEFINISH); - SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "%s fence_ptr %p\n", - __FUNCTION__, fence); + if (!timeout) { + retVal = sws->fence_signalled(sws, fence, 0) == 0; + } + else { + SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "%s fence_ptr %p\n", + __FUNCTION__, fence); + + retVal = sws->fence_finish(sws, fence, 0) == 0; + } + + SVGA_STATS_TIME_POP(sws); - return sws->fence_finish(sws, fence, 0) == 0; + return retVal; } @@ -834,7 +862,9 @@ PIPE_DRIVER_QUERY_TYPE_UINT64), QUERY("map-buffer-time", SVGA_QUERY_MAP_BUFFER_TIME, PIPE_DRIVER_QUERY_TYPE_MICROSECONDS), - QUERY("num-resources-mapped", SVGA_QUERY_NUM_RESOURCES_MAPPED, + QUERY("num-buffers-mapped", SVGA_QUERY_NUM_BUFFERS_MAPPED, + PIPE_DRIVER_QUERY_TYPE_UINT64), + QUERY("num-textures-mapped", SVGA_QUERY_NUM_TEXTURES_MAPPED, PIPE_DRIVER_QUERY_TYPE_UINT64), QUERY("num-bytes-uploaded", SVGA_QUERY_NUM_BYTES_UPLOADED, PIPE_DRIVER_QUERY_TYPE_BYTES), @@ -925,6 +955,8 @@ debug_get_bool_option("SVGA_NO_SURFACE_VIEW", FALSE); svgascreen->debug.no_sampler_view = debug_get_bool_option("SVGA_NO_SAMPLER_VIEW", FALSE); + svgascreen->debug.no_cache_index_buffers = + debug_get_bool_option("SVGA_NO_CACHE_INDEX_BUFFERS", FALSE); screen = &svgascreen->screen; diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_screen_cache.c mesa-17.0.7/src/gallium/drivers/svga/svga_screen_cache.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_screen_cache.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_screen_cache.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,7 +25,7 @@ #include "util/u_math.h" #include "util/u_memory.h" -#include "util/u_hash.h" +#include "util/crc32.h" #include "svga_debug.h" #include "svga_format.h" @@ -320,19 +320,19 @@ pipe_mutex_lock(cache->mutex); - /* Loop over entries in the validated list */ - curr = cache->validated.next; + /* Loop over entries in the invalidated list */ + curr = cache->invalidated.next; next = curr->next; - while (curr != &cache->validated) { + while (curr != &cache->invalidated) { entry = LIST_ENTRY(struct svga_host_surface_cache_entry, curr, head); assert(entry->handle); if (sws->surface_is_flushed(sws, entry->handle)) { - /* remove entry from LRU list */ + /* remove entry from the invalidated list */ LIST_DEL(&entry->head); - svgascreen->sws->fence_reference(svgascreen->sws, &entry->fence, fence); + sws->fence_reference(sws, &entry->fence, fence); /* Add entry to the unused list */ LIST_ADD(&entry->head, &cache->unused); @@ -346,6 +346,28 @@ next = curr->next; } + curr = cache->validated.next; + next = curr->next; + while (curr != &cache->validated) { + entry = LIST_ENTRY(struct svga_host_surface_cache_entry, curr, head); + + assert(entry->handle); + + if (sws->surface_is_flushed(sws, entry->handle)) { + /* remove entry from the validated list */ + LIST_DEL(&entry->head); + + /* it is now safe to invalidate the surface content. */ + sws->surface_invalidate(sws, entry->handle); + + /* add the entry to the invalidated list */ + LIST_ADD(&entry->head, &cache->invalidated); + } + + curr = next; + next = curr->next; + } + pipe_mutex_unlock(cache->mutex); } @@ -371,8 +393,7 @@ } if (cache->entries[i].fence) - svgascreen->sws->fence_reference(svgascreen->sws, - &cache->entries[i].fence, NULL); + sws->fence_reference(sws, &cache->entries[i].fence, NULL); } pipe_mutex_destroy(cache->mutex); @@ -396,6 +417,8 @@ LIST_INITHEAD(&cache->validated); + LIST_INITHEAD(&cache->invalidated); + LIST_INITHEAD(&cache->empty); for (i = 0; i < SVGA_HOST_SURFACE_CACHE_SIZE; ++i) LIST_ADDTAIL(&cache->entries[i].head, &cache->empty); @@ -410,10 +433,12 @@ * allocate a new surface. * \param bind_flags bitmask of PIPE_BIND_x flags * \param usage one of PIPE_USAGE_x values + * \param validated return True if the surface is a reused surface */ struct svga_winsys_surface * svga_screen_surface_create(struct svga_screen *svgascreen, unsigned bind_flags, enum pipe_resource_usage usage, + boolean *validated, struct svga_host_surface_cache_key *key) { struct svga_winsys_screen *sws = svgascreen->sws; @@ -487,6 +512,7 @@ key->numMipLevels, key->numFaces, key->arraySize); + *validated = TRUE; } } @@ -513,6 +539,8 @@ key->size.width, key->size.height, key->size.depth); + + *validated = FALSE; } return handle; diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_screen_cache.h mesa-17.0.7/src/gallium/drivers/svga/svga_screen_cache.h --- mesa-12.0.6/src/gallium/drivers/svga/svga_screen_cache.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_screen_cache.h 2017-06-01 10:37:10.000000000 +0000 @@ -95,12 +95,13 @@ * A cache entry can be in the following stages: * 1. empty (entry->handle = NULL) * 2. holding a buffer in a validate list - * 3. holding a flushed buffer (not in any validate list) with an active fence - * 4. holding a flushed buffer with an expired fence + * 3. holding a buffer in an invalidate list + * 4. holding a flushed buffer (not in any validate list) with an active fence + * 5. holding a flushed buffer with an expired fence * - * An entry progresses from 1 -> 2 -> 3 -> 4. When we need an entry to put a + * An entry progresses from 1 -> 2 -> 3 -> 4 -> 5. When we need an entry to put a * buffer into we preferentially take from 1, or from the least recently used - * buffer from 3/4. + * buffer from 4/5. */ struct svga_host_surface_cache { @@ -113,9 +114,12 @@ * (3 and 4) */ struct list_head unused; - /* Entries with buffers still in validate lists (2) */ + /* Entries with buffers still in validate list (2) */ struct list_head validated; + /* Entries with buffers still in invalidate list (3) */ + struct list_head invalidated; + /** Empty entries (1) */ struct list_head empty; @@ -141,6 +145,7 @@ struct svga_winsys_surface * svga_screen_surface_create(struct svga_screen *svgascreen, unsigned bind_flags, enum pipe_resource_usage usage, + boolean *validated, struct svga_host_surface_cache_key *key); void diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_screen.h mesa-17.0.7/src/gallium/drivers/svga/svga_screen.h --- mesa-12.0.6/src/gallium/drivers/svga/svga_screen.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_screen.h 2017-06-01 10:37:10.000000000 +0000 @@ -62,6 +62,7 @@ boolean no_surface_view; boolean force_sampler_view; boolean no_sampler_view; + boolean no_cache_index_buffers; } debug; unsigned texture_timestamp; diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_shader.c mesa-17.0.7/src/gallium/drivers/svga/svga_shader.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_shader.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_shader.c 2017-06-01 10:37:10.000000000 +0000 @@ -166,7 +166,8 @@ * state. This is basically the texture-related state. */ void -svga_init_shader_key_common(const struct svga_context *svga, unsigned shader, +svga_init_shader_key_common(const struct svga_context *svga, + enum pipe_shader_type shader, struct svga_compile_key *key) { unsigned i, idx = 0; @@ -350,19 +351,22 @@ unsigned codeLen = variant->nr_tokens * sizeof(variant->tokens[0]); enum pipe_error ret; + SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_DEFINESHADER); + variant->id = UTIL_BITMASK_INVALID_INDEX; if (svga_have_gb_objects(svga)) { if (svga_have_vgpu10(svga)) - return define_gb_shader_vgpu10(svga, type, variant, codeLen); + ret = define_gb_shader_vgpu10(svga, type, variant, codeLen); else - return define_gb_shader_vgpu9(svga, type, variant, codeLen); + ret = define_gb_shader_vgpu9(svga, type, variant, codeLen); } else { /* Allocate an integer ID for the shader */ variant->id = util_bitmask_add(svga->shader_id_bm); if (variant->id == UTIL_BITMASK_INVALID_INDEX) { - return PIPE_ERROR_OUT_OF_MEMORY; + ret = PIPE_ERROR_OUT_OF_MEMORY; + goto done; } /* Issue SVGA3D device command to define the shader */ @@ -379,6 +383,8 @@ } } +done: + SVGA_STATS_TIME_POP(svga_sws(svga)); return ret; } diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_shader.h mesa-17.0.7/src/gallium/drivers/svga/svga_shader.h --- mesa-12.0.6/src/gallium/drivers/svga/svga_shader.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_shader.h 2017-06-01 10:37:10.000000000 +0000 @@ -253,7 +253,8 @@ int generic_index); void -svga_init_shader_key_common(const struct svga_context *svga, unsigned shader, +svga_init_shader_key_common(const struct svga_context *svga, + enum pipe_shader_type shader, struct svga_compile_key *key); struct svga_shader_variant * @@ -310,7 +311,7 @@ * Convert from PIPE_SHADER_* to SVGA3D_SHADERTYPE_* */ static inline SVGA3dShaderType -svga_shader_type(unsigned shader) +svga_shader_type(enum pipe_shader_type shader) { switch (shader) { case PIPE_SHADER_VERTEX: diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_state.c mesa-17.0.7/src/gallium/drivers/svga/svga_state.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -202,6 +202,8 @@ enum pipe_error ret = PIPE_OK; unsigned i; + SVGA_STATS_TIME_PUSH(screen->sws, SVGA_STATS_TIME_UPDATESTATE); + /* Check for updates to bound textures. This can't be done in an * atom as there is no flag which could provoke this test, and we * cannot create one. @@ -219,7 +221,7 @@ state_levels[i], &svga->dirty ); if (ret != PIPE_OK) - return ret; + goto done; svga->state.dirty[i] = 0; } @@ -232,7 +234,9 @@ svga->hud.num_validations++; - return PIPE_OK; +done: + SVGA_STATS_TIME_POP(screen->sws); + return ret; } diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_state_constants.c mesa-17.0.7/src/gallium/drivers/svga/svga_state_constants.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_state_constants.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_state_constants.c 2017-06-01 10:37:10.000000000 +0000 @@ -65,7 +65,7 @@ static unsigned svga_get_extra_constants_common(struct svga_context *svga, const struct svga_shader_variant *variant, - unsigned shader, float *dest) + enum pipe_shader_type shader, float *dest) { uint32_t *dest_u = (uint32_t *) dest; // uint version of dest unsigned i; @@ -271,7 +271,7 @@ * \param value the new float[4] value */ static enum pipe_error -emit_const(struct svga_context *svga, unsigned shader, unsigned i, +emit_const(struct svga_context *svga, enum pipe_shader_type shader, unsigned i, const float *value) { enum pipe_error ret = PIPE_OK; @@ -316,7 +316,7 @@ */ static enum pipe_error emit_const_range(struct svga_context *svga, - unsigned shader, + enum pipe_shader_type shader, unsigned offset, unsigned count, const float (*values)[4]) @@ -439,7 +439,7 @@ * On VGPU10, emit_consts_vgpu10 is used instead. */ static enum pipe_error -emit_consts_vgpu9(struct svga_context *svga, unsigned shader) +emit_consts_vgpu9(struct svga_context *svga, enum pipe_shader_type shader) { const struct pipe_constant_buffer *cbuf; struct svga_screen *ss = svga_screen(svga->pipe.screen); @@ -541,7 +541,7 @@ static enum pipe_error -emit_constbuf_vgpu10(struct svga_context *svga, unsigned shader) +emit_constbuf_vgpu10(struct svga_context *svga, enum pipe_shader_type shader) { const struct pipe_constant_buffer *cbuf; struct pipe_resource *dst_buffer = NULL; @@ -646,15 +646,29 @@ assert(extra_offset + extra_size <= new_buf_size); memcpy((char *) dst_map + extra_offset, extras, extra_size); } - u_upload_unmap(svga->const0_upload); - /* Issue the SetSingleConstantBuffer command */ - dst_handle = svga_buffer_handle(svga, dst_buffer); - if (!dst_handle) { - pipe_resource_reference(&dst_buffer, NULL); - return PIPE_ERROR_OUT_OF_MEMORY; + /* Get winsys handle for the constant buffer */ + if (svga->state.hw_draw.const0_buffer == dst_buffer && + svga->state.hw_draw.const0_handle) { + /* re-reference already mapped buffer */ + dst_handle = svga->state.hw_draw.const0_handle; + } + else { + /* we must unmap the buffer before getting the winsys handle */ + u_upload_unmap(svga->const0_upload); + + dst_handle = svga_buffer_handle(svga, dst_buffer); + if (!dst_handle) { + pipe_resource_reference(&dst_buffer, NULL); + return PIPE_ERROR_OUT_OF_MEMORY; + } + + /* save the buffer / handle for next time */ + pipe_resource_reference(&svga->state.hw_draw.const0_buffer, dst_buffer); + svga->state.hw_draw.const0_handle = dst_handle; } + /* Issue the SetSingleConstantBuffer command */ assert(new_buf_size % 16 == 0); ret = SVGA3D_vgpu10_SetSingleConstantBuffer(svga->swc, 0, /* index */ @@ -686,7 +700,7 @@ static enum pipe_error -emit_consts_vgpu10(struct svga_context *svga, unsigned shader) +emit_consts_vgpu10(struct svga_context *svga, enum pipe_shader_type shader) { enum pipe_error ret; unsigned dirty_constbufs; diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_state_framebuffer.c mesa-17.0.7/src/gallium/drivers/svga/svga_state_framebuffer.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_state_framebuffer.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_state_framebuffer.c 2017-06-01 10:37:10.000000000 +0000 @@ -168,8 +168,9 @@ struct pipe_framebuffer_state *curr = &svga->curr.framebuffer; struct pipe_framebuffer_state *hw = &svga->state.hw_clear.framebuffer; const unsigned num_color = MAX2(curr->nr_cbufs, hw->nr_cbufs); + int last_rtv = -1; unsigned i; - enum pipe_error ret; + enum pipe_error ret = PIPE_OK; assert(svga_have_vgpu10(svga)); @@ -187,6 +188,7 @@ } assert(svga_surface(rtv[i])->view_id != SVGA3D_INVALID_ID); + last_rtv = i; } else { rtv[i] = NULL; @@ -204,28 +206,41 @@ dsv = NULL; } - ret = SVGA3D_vgpu10_SetRenderTargets(svga->swc, num_color, rtv, dsv); - if (ret != PIPE_OK) - return ret; + /* avoid emitting redundant SetRenderTargets command */ + if ((num_color != svga->state.hw_draw.num_rendertargets) || + (dsv != svga->state.hw_draw.dsv) || + memcmp(rtv, svga->state.hw_draw.rtv, num_color * sizeof(rtv[0]))) { - for (i = 0; i < ss->max_color_buffers; i++) { - if (hw->cbufs[i] != curr->cbufs[i]) { - /* propagate the backed view surface before unbinding it */ - if (hw->cbufs[i] && svga_surface(hw->cbufs[i])->backed) { - svga_propagate_surface(svga, - &svga_surface(hw->cbufs[i])->backed->base); + ret = SVGA3D_vgpu10_SetRenderTargets(svga->swc, num_color, rtv, dsv); + if (ret != PIPE_OK) + return ret; + + /* number of render targets sent to the device, not including trailing + * unbound render targets. + */ + svga->state.hw_draw.num_rendertargets = last_rtv + 1; + svga->state.hw_draw.dsv = dsv; + memcpy(svga->state.hw_draw.rtv, rtv, num_color * sizeof(rtv[0])); + + for (i = 0; i < ss->max_color_buffers; i++) { + if (hw->cbufs[i] != curr->cbufs[i]) { + /* propagate the backed view surface before unbinding it */ + if (hw->cbufs[i] && svga_surface(hw->cbufs[i])->backed) { + svga_propagate_surface(svga, + &svga_surface(hw->cbufs[i])->backed->base); + } + pipe_surface_reference(&hw->cbufs[i], curr->cbufs[i]); } - pipe_surface_reference(&hw->cbufs[i], curr->cbufs[i]); } - } - hw->nr_cbufs = curr->nr_cbufs; + hw->nr_cbufs = curr->nr_cbufs; - if (hw->zsbuf != curr->zsbuf) { - /* propagate the backed view surface before unbinding it */ - if (hw->zsbuf && svga_surface(hw->zsbuf)->backed) { - svga_propagate_surface(svga, &svga_surface(hw->zsbuf)->backed->base); + if (hw->zsbuf != curr->zsbuf) { + /* propagate the backed view surface before unbinding it */ + if (hw->zsbuf && svga_surface(hw->zsbuf)->backed) { + svga_propagate_surface(svga, &svga_surface(hw->zsbuf)->backed->base); + } + pipe_surface_reference(&hw->zsbuf, curr->zsbuf); } - pipe_surface_reference(&hw->zsbuf, curr->zsbuf); } return ret; @@ -278,8 +293,7 @@ enum pipe_error svga_rebind_framebuffer_bindings(struct svga_context *svga) { - const struct svga_screen *ss = svga_screen(svga->pipe.screen); - struct pipe_framebuffer_state *hw = &svga->state.hw_clear.framebuffer; + struct svga_hw_draw_state *hw = &svga->state.hw_draw; unsigned i; enum pipe_error ret; @@ -288,10 +302,10 @@ if (!svga->rebind.flags.rendertargets) return PIPE_OK; - for (i = 0; i < ss->max_color_buffers; i++) { - if (hw->cbufs[i]) { + for (i = 0; i < hw->num_rendertargets; i++) { + if (hw->rtv[i]) { ret = svga->swc->resource_rebind(svga->swc, - svga_surface(hw->cbufs[i])->handle, + svga_surface(hw->rtv[i])->handle, NULL, SVGA_RELOC_WRITE); if (ret != PIPE_OK) @@ -299,9 +313,9 @@ } } - if (hw->zsbuf) { + if (hw->dsv) { ret = svga->swc->resource_rebind(svga->swc, - svga_surface(hw->zsbuf)->handle, + svga_surface(hw->dsv)->handle, NULL, SVGA_RELOC_WRITE); if (ret != PIPE_OK) diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_state_fs.c mesa-17.0.7/src/gallium/drivers/svga/svga_state_fs.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_state_fs.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_state_fs.c 2017-06-01 10:37:10.000000000 +0000 @@ -180,7 +180,7 @@ struct svga_fragment_shader *fs, struct svga_compile_key *key) { - const unsigned shader = PIPE_SHADER_FRAGMENT; + const enum pipe_shader_type shader = PIPE_SHADER_FRAGMENT; unsigned i; memset(key, 0, sizeof *key); @@ -407,6 +407,8 @@ struct svga_fragment_shader *fs = svga->curr.fs; struct svga_compile_key key; + SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_EMITFS); + /* SVGA_NEW_BLEND * SVGA_NEW_TEXTURE_BINDING * SVGA_NEW_RAST @@ -418,13 +420,13 @@ */ ret = make_fs_key(svga, fs, &key); if (ret != PIPE_OK) - return ret; + goto done; variant = svga_search_shader_key(&fs->base, &key); if (!variant) { ret = compile_fs(svga, fs, &key, &variant); if (ret != PIPE_OK) - return ret; + goto done; } assert(variant); @@ -432,7 +434,7 @@ if (variant != svga->state.hw_draw.fs) { ret = svga_set_shader(svga, SVGA3D_SHADERTYPE_PS, variant); if (ret != PIPE_OK) - return ret; + goto done; svga->rebind.flags.fs = FALSE; @@ -440,7 +442,9 @@ svga->state.hw_draw.fs = variant; } - return PIPE_OK; +done: + SVGA_STATS_TIME_POP(svga_sws(svga)); + return ret; } struct svga_tracked_state svga_hw_fs = diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_state_gs.c mesa-17.0.7/src/gallium/drivers/svga/svga_state_gs.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_state_gs.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_state_gs.c 2017-06-01 10:37:10.000000000 +0000 @@ -175,6 +175,8 @@ enum pipe_error ret = PIPE_OK; struct svga_compile_key key; + SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_EMITGS); + /* If there's a user-defined GS, we should have a pointer to a derived * GS. This should have been resolved in update_tgsi_transform(). */ @@ -190,7 +192,7 @@ ret = svga_set_shader(svga, SVGA3D_SHADERTYPE_GS, NULL); svga->state.hw_draw.gs = NULL; } - return ret; + goto done; } /* If there is stream output info for this geometry shader, then use @@ -218,7 +220,7 @@ if (!variant) { ret = compile_gs(svga, gs, &key, &variant); if (ret != PIPE_OK) - return ret; + goto done; /* insert the new variant at head of linked list */ assert(variant); @@ -231,14 +233,16 @@ /* Bind the new variant */ ret = svga_set_shader(svga, SVGA3D_SHADERTYPE_GS, variant); if (ret != PIPE_OK) - return ret; + goto done; svga->rebind.flags.gs = FALSE; svga->dirty |= SVGA_NEW_GS_VARIANT; svga->state.hw_draw.gs = variant; } - return PIPE_OK; +done: + SVGA_STATS_TIME_POP(svga_sws(svga)); + return ret; } struct svga_tracked_state svga_hw_gs = diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_state_sampler.c mesa-17.0.7/src/gallium/drivers/svga/svga_state_sampler.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_state_sampler.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_state_sampler.c 2017-06-01 10:37:10.000000000 +0000 @@ -30,6 +30,7 @@ #include "pipe/p_defines.h" #include "util/u_bitmask.h" +#include "util/u_format.h" #include "util/u_inlines.h" #include "util/u_math.h" #include "util/u_memory.h" @@ -39,9 +40,10 @@ #include "svga_format.h" #include "svga_resource_buffer.h" #include "svga_resource_texture.h" +#include "svga_sampler_view.h" #include "svga_shader.h" #include "svga_state.h" -#include "svga_sampler_view.h" +#include "svga_surface.h" /** Get resource handle for a texture or buffer */ @@ -64,7 +66,7 @@ boolean svga_check_sampler_view_resource_collision(struct svga_context *svga, struct svga_winsys_surface *res, - unsigned shader) + enum pipe_shader_type shader) { struct pipe_screen *screen = svga->pipe.screen; unsigned i; @@ -87,6 +89,36 @@ /** + * Check if there are any resources that are both bound to a render target + * and bound as a shader resource for the given type of shader. + */ +boolean +svga_check_sampler_framebuffer_resource_collision(struct svga_context *svga, + enum pipe_shader_type shader) +{ + struct svga_surface *surf; + unsigned i; + + for (i = 0; i < svga->curr.framebuffer.nr_cbufs; i++) { + surf = svga_surface(svga->curr.framebuffer.cbufs[i]); + if (surf && + svga_check_sampler_view_resource_collision(svga, surf->handle, + shader)) { + return TRUE; + } + } + + surf = svga_surface(svga->curr.framebuffer.zsbuf); + if (surf && + svga_check_sampler_view_resource_collision(svga, surf->handle, shader)) { + return TRUE; + } + + return FALSE; +} + + +/** * Create a DX ShaderResourceSamplerView for the given pipe_sampler_view, * if needed. */ @@ -103,17 +135,21 @@ SVGA3dSurfaceFormat format; SVGA3dResourceType resourceDim; SVGA3dShaderResourceViewDesc viewDesc; - enum pipe_format pformat = sv->base.format; + enum pipe_format viewFormat = sv->base.format; /* vgpu10 cannot create a BGRX view for a BGRA resource, so force it to - * create a BGRA view. + * create a BGRA view (and vice versa). */ - if (pformat == PIPE_FORMAT_B8G8R8X8_UNORM && - sv->base.texture->format == PIPE_FORMAT_B8G8R8A8_UNORM) { - pformat = PIPE_FORMAT_B8G8R8A8_UNORM; + if (viewFormat == PIPE_FORMAT_B8G8R8X8_UNORM && + texture->format == PIPE_FORMAT_B8G8R8A8_UNORM) { + viewFormat = PIPE_FORMAT_B8G8R8A8_UNORM; + } + else if (viewFormat == PIPE_FORMAT_B8G8R8A8_UNORM && + texture->format == PIPE_FORMAT_B8G8R8X8_UNORM) { + viewFormat = PIPE_FORMAT_B8G8R8X8_UNORM; } - format = svga_translate_format(ss, pformat, + format = svga_translate_format(ss, viewFormat, PIPE_BIND_SAMPLER_VIEW); assert(format != SVGA3D_FORMAT_INVALID); @@ -121,9 +157,10 @@ format = svga_sampler_format(format); if (texture->target == PIPE_BUFFER) { - viewDesc.buffer.firstElement = sv->base.u.buf.first_element; - viewDesc.buffer.numElements = (sv->base.u.buf.last_element - - sv->base.u.buf.first_element + 1); + unsigned elem_size = util_format_get_blocksize(sv->base.format); + + viewDesc.buffer.firstElement = sv->base.u.buf.offset / elem_size; + viewDesc.buffer.numElements = sv->base.u.buf.size / elem_size; } else { viewDesc.tex.mostDetailedMip = sv->base.u.tex.first_level; @@ -191,7 +228,7 @@ update_sampler_resources(struct svga_context *svga, unsigned dirty) { enum pipe_error ret = PIPE_OK; - unsigned shader; + enum pipe_shader_type shader; if (!svga_have_vgpu10(svga)) return PIPE_OK; @@ -199,6 +236,7 @@ for (shader = PIPE_SHADER_VERTEX; shader <= PIPE_SHADER_GEOMETRY; shader++) { SVGA3dShaderResourceViewId ids[PIPE_MAX_SAMPLERS]; struct svga_winsys_surface *surfaces[PIPE_MAX_SAMPLERS]; + struct pipe_sampler_view *sampler_views[PIPE_MAX_SAMPLERS]; unsigned count; unsigned nviews; unsigned i; @@ -207,10 +245,9 @@ for (i = 0; i < count; i++) { struct svga_pipe_sampler_view *sv = svga_pipe_sampler_view(svga->curr.sampler_views[shader][i]); - struct svga_winsys_surface *surface; if (sv) { - surface = svga_resource_handle(sv->base.texture); + surfaces[i] = svga_resource_handle(sv->base.texture); ret = svga_validate_pipe_sampler_view(svga, sv); if (ret != PIPE_OK) @@ -218,39 +255,19 @@ assert(sv->id != SVGA3D_INVALID_ID); ids[i] = sv->id; + sampler_views[i] = &sv->base; } else { - surface = NULL; + surfaces[i] = NULL; ids[i] = SVGA3D_INVALID_ID; + sampler_views[i] = NULL; } - surfaces[i] = surface; } - for (; i < ARRAY_SIZE(ids); i++) { + for (; i < svga->state.hw_draw.num_sampler_views[shader]; i++) { ids[i] = SVGA3D_INVALID_ID; surfaces[i] = NULL; - } - - if (shader == PIPE_SHADER_FRAGMENT) { - /* Handle polygon stipple sampler view */ - if (svga->curr.rast->templ.poly_stipple_enable) { - const unsigned unit = svga->state.hw_draw.fs->pstipple_sampler_unit; - struct svga_pipe_sampler_view *sv = - svga->polygon_stipple.sampler_view; - - assert(sv); - if (!sv) { - return PIPE_OK; /* probably out of memory */ - } - - ret = svga_validate_pipe_sampler_view(svga, sv); - if (ret != PIPE_OK) - return ret; - - ids[unit] = sv->id; - surfaces[unit] = svga_resource_handle(sv->base.texture); - count = MAX2(count, unit+1); - } + sampler_views[i] = NULL; } /* Number of ShaderResources that need to be modified. This includes @@ -258,20 +275,53 @@ */ nviews = MAX2(svga->state.hw_draw.num_sampler_views[shader], count); if (nviews > 0) { - ret = SVGA3D_vgpu10_SetShaderResources(svga->swc, + if (count != svga->state.hw_draw.num_sampler_views[shader] || + memcmp(sampler_views, svga->state.hw_draw.sampler_views[shader], + count * sizeof(sampler_views[0])) != 0) { + ret = SVGA3D_vgpu10_SetShaderResources(svga->swc, svga_shader_type(shader), 0, /* startView */ nviews, ids, surfaces); - if (ret != PIPE_OK) - return ret; - } + if (ret != PIPE_OK) + return ret; - /* Number of sampler views enabled in the device */ - svga->state.hw_draw.num_sampler_views[shader] = count; + /* Save referenced sampler views in the hw draw state. */ + svga->state.hw_draw.num_sampler_views[shader] = count; + for (i = 0; i < nviews; i++) { + pipe_sampler_view_reference( + &svga->state.hw_draw.sampler_views[shader][i], + sampler_views[i]); + } + } + } } + /* Handle polygon stipple sampler view */ + if (svga->curr.rast->templ.poly_stipple_enable) { + const unsigned unit = svga->state.hw_draw.fs->pstipple_sampler_unit; + struct svga_pipe_sampler_view *sv = svga->polygon_stipple.sampler_view; + struct svga_winsys_surface *surface; + + assert(sv); + if (!sv) { + return PIPE_OK; /* probably out of memory */ + } + + ret = svga_validate_pipe_sampler_view(svga, sv); + if (ret != PIPE_OK) + return ret; + + surface = svga_resource_handle(sv->base.texture); + ret = SVGA3D_vgpu10_SetShaderResources( + svga->swc, + svga_shader_type(PIPE_SHADER_FRAGMENT), + unit, /* startView */ + 1, + &sv->id, + &surface); + } return ret; } @@ -289,7 +339,7 @@ update_samplers(struct svga_context *svga, unsigned dirty ) { enum pipe_error ret = PIPE_OK; - unsigned shader; + enum pipe_shader_type shader; if (!svga_have_vgpu10(svga)) return PIPE_OK; @@ -298,6 +348,7 @@ const unsigned count = svga->curr.num_samplers[shader]; SVGA3dSamplerId ids[PIPE_MAX_SAMPLERS]; unsigned i; + unsigned nsamplers; for (i = 0; i < count; i++) { if (svga->curr.sampler[shader][i]) { @@ -309,20 +360,25 @@ } } - if (count > 0) { + for (; i < svga->state.hw_draw.num_samplers[shader]; i++) { + ids[i] = SVGA3D_INVALID_ID; + } + + nsamplers = MAX2(svga->state.hw_draw.num_samplers[shader], count); + if (nsamplers > 0) { if (count != svga->state.hw_draw.num_samplers[shader] || memcmp(ids, svga->state.hw_draw.samplers[shader], count * sizeof(ids[0])) != 0) { /* HW state is really changing */ ret = SVGA3D_vgpu10_SetSamplers(svga->swc, - count, + nsamplers, 0, /* start */ svga_shader_type(shader), /* type */ ids); if (ret != PIPE_OK) return ret; memcpy(svga->state.hw_draw.samplers[shader], ids, - count * sizeof(ids[0])); + nsamplers * sizeof(ids[0])); svga->state.hw_draw.num_samplers[shader] = count; } } @@ -338,11 +394,20 @@ return PIPE_OK; /* probably out of memory */ } - ret = SVGA3D_vgpu10_SetSamplers(svga->swc, - 1, /* count */ - unit, /* start */ - SVGA3D_SHADERTYPE_PS, - &sampler->id); + if (svga->state.hw_draw.samplers[PIPE_SHADER_FRAGMENT][unit] + != sampler->id) { + ret = SVGA3D_vgpu10_SetSamplers(svga->swc, + 1, /* count */ + unit, /* start */ + SVGA3D_SHADERTYPE_PS, + &sampler->id); + if (ret != PIPE_OK) + return ret; + + /* save the polygon stipple sampler in the hw draw state */ + svga->state.hw_draw.samplers[PIPE_SHADER_FRAGMENT][unit] = + sampler->id; + } } return ret; diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_state_tss.c mesa-17.0.7/src/gallium/drivers/svga/svga_state_tss.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_state_tss.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_state_tss.c 2017-06-01 10:37:10.000000000 +0000 @@ -41,7 +41,7 @@ */ void svga_cleanup_tss_binding(struct svga_context *svga) { - const unsigned shader = PIPE_SHADER_FRAGMENT; + const enum pipe_shader_type shader = PIPE_SHADER_FRAGMENT; unsigned i; for (i = 0; i < ARRAY_SIZE(svga->state.hw_draw.views); i++) { @@ -140,7 +140,7 @@ update_tss_binding(struct svga_context *svga, unsigned dirty ) { - const unsigned shader = PIPE_SHADER_FRAGMENT; + const enum pipe_shader_type shader = PIPE_SHADER_FRAGMENT; boolean reemit = svga->rebind.flags.texture_samplers; unsigned i; unsigned count = MAX2( svga->curr.num_sampler_views[shader], @@ -294,6 +294,7 @@ struct svga_tracked_state svga_hw_tss_binding = { "texture binding emit", + SVGA_NEW_FRAME_BUFFER | SVGA_NEW_TEXTURE_BINDING | SVGA_NEW_STIPPLE | SVGA_NEW_SAMPLER, @@ -380,7 +381,7 @@ update_tss(struct svga_context *svga, unsigned dirty ) { - const unsigned shader = PIPE_SHADER_FRAGMENT; + const enum pipe_shader_type shader = PIPE_SHADER_FRAGMENT; unsigned i; struct ts_queue queue; diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_state_vs.c mesa-17.0.7/src/gallium/drivers/svga/svga_state_vs.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_state_vs.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_state_vs.c 2017-06-01 10:37:10.000000000 +0000 @@ -162,7 +162,7 @@ static void make_vs_key(struct svga_context *svga, struct svga_compile_key *key) { - const unsigned shader = PIPE_SHADER_VERTEX; + const enum pipe_shader_type shader = PIPE_SHADER_VERTEX; memset(key, 0, sizeof *key); @@ -346,6 +346,8 @@ enum pipe_error ret = PIPE_OK; struct svga_compile_key key; + SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_EMITVS); + /* If there is an active geometry shader, and it has stream output * defined, then we will skip the stream output from the vertex shader */ @@ -381,7 +383,7 @@ ret = compile_vs(svga, vs, &key, &variant); } if (ret != PIPE_OK) - return ret; + goto done; /* insert the new variant at head of linked list */ assert(variant); @@ -395,7 +397,7 @@ if (variant) { ret = svga_set_shader(svga, SVGA3D_SHADERTYPE_VS, variant); if (ret != PIPE_OK) - return ret; + goto done; svga->rebind.flags.vs = FALSE; } @@ -403,7 +405,9 @@ svga->state.hw_draw.vs = variant; } - return PIPE_OK; +done: + SVGA_STATS_TIME_POP(svga_sws(svga)); + return ret; } struct svga_tracked_state svga_hw_vs = diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_surface.c mesa-17.0.7/src/gallium/drivers/svga/svga_surface.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_surface.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_surface.c 2017-06-01 10:37:10.000000000 +0000 @@ -120,8 +120,9 @@ struct svga_winsys_surface *handle; uint32_t i, j; unsigned z_offset = 0; + boolean validated; - SVGA_DBG(DEBUG_PERF, + SVGA_DBG(DEBUG_PERF, "svga: Create surface view: layer %d zslice %d mips %d..%d\n", layer_pick, zslice_pick, start_mip, start_mip+num_mip-1); @@ -134,12 +135,14 @@ key->cachable = 1; key->arraySize = 1; key->numFaces = 1; - key->sampleCount = tex->b.b.nr_samples; + + /* single sample surface can be treated as non-multisamples surface */ + key->sampleCount = tex->b.b.nr_samples > 1 ? tex->b.b.nr_samples : 0; if (key->sampleCount > 1) { key->flags |= SVGA3D_SURFACE_MASKABLE_ANTIALIAS; } - + if (tex->b.b.target == PIPE_TEXTURE_CUBE && layer_pick < 0) { key->flags |= SVGA3D_SURFACE_CUBEMAP; key->numFaces = 6; @@ -154,7 +157,8 @@ } SVGA_DBG(DEBUG_DMA, "surface_create for texture view\n"); - handle = svga_screen_surface_create(ss, bind_flags, PIPE_USAGE_DEFAULT, key); + handle = svga_screen_surface_create(ss, bind_flags, PIPE_USAGE_DEFAULT, + &validated, key); if (!handle) { key->cachable = 0; return NULL; @@ -176,9 +180,9 @@ 1); svga_texture_copy_handle(svga, - tex->handle, - 0, 0, z_offset, - i + start_mip, + tex->handle, + 0, 0, z_offset, + i + start_mip, j + layer_pick, handle, 0, 0, 0, i, j, u_minify(tex->b.b.width0, i + start_mip), @@ -212,11 +216,14 @@ unsigned nlayers = 1; SVGA3dSurfaceFlags flags = 0; SVGA3dSurfaceFormat format; + struct pipe_surface *retVal = NULL; s = CALLOC_STRUCT(svga_surface); if (!s) return NULL; + SVGA_STATS_TIME_PUSH(ss->sws, SVGA_STATS_TIME_CREATESURFACEVIEW); + if (pt->target == PIPE_TEXTURE_CUBE) { layer = surf_tmpl->u.tex.first_layer; zslice = 0; @@ -293,12 +300,13 @@ /* When we clone the surface view resource, use the format used in * the creation of the original resource. */ - s->handle = svga_texture_view_surface(svga, tex, bind, flags, tex->key.format, + s->handle = svga_texture_view_surface(svga, tex, bind, flags, + tex->key.format, surf_tmpl->u.tex.level, 1, layer, nlayers, zslice, &s->key); if (!s->handle) { FREE(s); - return NULL; + goto done; } s->key.format = format; @@ -306,7 +314,8 @@ s->real_level = 0; s->real_zslice = 0; } else { - SVGA_DBG(DEBUG_VIEWS, "svga: Surface view: no %p, level %u, layer %u, z %u, %p\n", + SVGA_DBG(DEBUG_VIEWS, + "svga: Surface view: no %p, level %u, layer %u, z %u, %p\n", pt, surf_tmpl->u.tex.level, layer, zslice, s); memset(&s->key, 0, sizeof s->key); @@ -318,8 +327,11 @@ } svga->hud.num_surface_views++; + retVal = &s->base; - return &s->base; +done: + SVGA_STATS_TIME_POP(ss->sws); + return retVal; } @@ -330,8 +342,11 @@ { struct svga_context *svga = svga_context(pipe); struct pipe_screen *screen = pipe->screen; + struct pipe_surface *surf = NULL; boolean view = FALSE; + SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_CREATESURFACE); + if (svga_screen(screen)->debug.force_surface_view) view = TRUE; @@ -345,7 +360,11 @@ if (svga_have_vgpu10(svga) || svga_screen(screen)->debug.no_surface_view) view = FALSE; - return svga_create_surface_view(pipe, pt, surf_tmpl, view); + surf = svga_create_surface_view(pipe, pt, surf_tmpl, view); + + SVGA_STATS_TIME_POP(svga_sws(svga)); + + return surf; } @@ -355,9 +374,10 @@ static struct svga_surface * create_backed_surface_view(struct svga_context *svga, struct svga_surface *s) { - struct svga_surface *bs = s->backed; + SVGA_STATS_TIME_PUSH(svga_sws(svga), + SVGA_STATS_TIME_CREATEBACKEDSURFACEVIEW); - if (!bs) { + if (!s->backed) { struct svga_texture *tex = svga_texture(s->base.texture); struct pipe_surface *backed_view; @@ -368,13 +388,14 @@ if (!backed_view) return NULL; - bs = svga_surface(backed_view); - s->backed = bs; + s->backed = svga_surface(backed_view); } - svga_mark_surface_dirty(&bs->base); + svga_mark_surface_dirty(&s->backed->base); + + SVGA_STATS_TIME_POP(svga_sws(svga)); - return bs; + return s->backed; } /** @@ -385,9 +406,13 @@ svga_validate_surface_view(struct svga_context *svga, struct svga_surface *s) { enum pipe_error ret = PIPE_OK; - unsigned shader; + enum pipe_shader_type shader; assert(svga_have_vgpu10(svga)); + assert(s); + + SVGA_STATS_TIME_PUSH(svga_sws(svga), + SVGA_STATS_TIME_VALIDATESURFACEVIEW); /** * DX spec explicitly specifies that no resource can be bound to a render @@ -403,16 +428,31 @@ "same resource used in shaderResource and renderTarget 0x%x\n", s->handle); s = create_backed_surface_view(svga, s); - if (!s) - return NULL; - + /* s may be null here if the function failed */ break; } } - if (s->view_id == SVGA3D_INVALID_ID) { + if (s && s->view_id == SVGA3D_INVALID_ID) { SVGA3dResourceType resType; SVGA3dRenderTargetViewDesc desc; + struct svga_texture *stex = svga_texture(s->base.texture); + + if (stex->validated == FALSE) { + assert(stex->handle); + + /* We are about to render into a surface that has not been validated. + * First invalidate the surface so that the device does not + * need to update the host-side copy with the invalid + * content when the associated mob is first bound to the surface. + */ + ret = SVGA3D_InvalidateGBSurface(svga->swc, stex->handle); + if (ret != PIPE_OK) { + s = NULL; + goto done; + } + stex->validated = TRUE; + } desc.tex.mipSlice = s->real_level; desc.tex.firstArraySlice = s->real_layer + s->real_zslice; @@ -421,25 +461,7 @@ s->view_id = util_bitmask_add(svga->surface_view_id_bm); - switch (s->base.texture->target) { - case PIPE_TEXTURE_1D: - case PIPE_TEXTURE_1D_ARRAY: - resType = SVGA3D_RESOURCE_TEXTURE1D; - break; - case PIPE_TEXTURE_RECT: - case PIPE_TEXTURE_2D: - case PIPE_TEXTURE_2D_ARRAY: - case PIPE_TEXTURE_CUBE: - /* drawing to cube map is treated as drawing to 2D array */ - resType = SVGA3D_RESOURCE_TEXTURE2D; - break; - case PIPE_TEXTURE_3D: - resType = SVGA3D_RESOURCE_TEXTURE3D; - break; - default: - assert(!"Unexpected texture target"); - resType = SVGA3D_RESOURCE_TEXTURE2D; - } + resType = svga_resource_type(s->base.texture->target); if (util_format_is_depth_or_stencil(s->base.format)) { ret = SVGA3D_vgpu10_DefineDepthStencilView(svga->swc, @@ -450,10 +472,23 @@ &desc); } else { + SVGA3dSurfaceFormat view_format = s->key.format; + const struct svga_texture *stex = svga_texture(s->base.texture); + + /* Can't create RGBA render target view of a RGBX surface so adjust + * the view format. We do something similar for texture samplers in + * svga_validate_pipe_sampler_view(). + */ + if (view_format == SVGA3D_B8G8R8A8_UNORM && + (stex->key.format == SVGA3D_B8G8R8X8_UNORM || + stex->key.format == SVGA3D_B8G8R8X8_TYPELESS)) { + view_format = SVGA3D_B8G8R8X8_UNORM; + } + ret = SVGA3D_vgpu10_DefineRenderTargetView(svga->swc, s->view_id, s->handle, - s->key.format, + view_format, resType, &desc); } @@ -461,10 +496,14 @@ if (ret != PIPE_OK) { util_bitmask_clear(svga->surface_view_id_bm, s->view_id); s->view_id = SVGA3D_INVALID_ID; - return NULL; + s = NULL; } } - return &s->base; + +done: + SVGA_STATS_TIME_POP(svga_sws(svga)); + + return s ? &s->base : NULL; } @@ -479,6 +518,8 @@ struct svga_screen *ss = svga_screen(surf->texture->screen); enum pipe_error ret = PIPE_OK; + SVGA_STATS_TIME_PUSH(ss->sws, SVGA_STATS_TIME_DESTROYSURFACE); + /* Destroy the backed view surface if it exists */ if (s->backed) { svga_surface_destroy(pipe, &s->backed->base); @@ -513,10 +554,11 @@ FREE(surf); svga->hud.num_surface_views--; + SVGA_STATS_TIME_POP(ss->sws); } -static void +static void svga_mark_surface_dirty(struct pipe_surface *surf) { struct svga_surface *s = svga_surface(surf); @@ -545,10 +587,9 @@ void svga_mark_surfaces_dirty(struct svga_context *svga) { - struct svga_screen *svgascreen = svga_screen(svga->pipe.screen); unsigned i; - for (i = 0; i < svgascreen->max_color_buffers; i++) { + for (i = 0; i < svga->curr.framebuffer.nr_cbufs; i++) { if (svga->curr.framebuffer.cbufs[i]) svga_mark_surface_dirty(svga->curr.framebuffer.cbufs[i]); } @@ -567,45 +608,79 @@ struct svga_surface *s = svga_surface(surf); struct svga_texture *tex = svga_texture(surf->texture); struct svga_screen *ss = svga_screen(surf->texture->screen); - unsigned zslice, layer; - unsigned nlayers = 1; - unsigned i; if (!s->dirty) return; - if (surf->texture->target == PIPE_TEXTURE_CUBE) { - zslice = 0; - layer = surf->u.tex.first_layer; - } - else if (surf->texture->target == PIPE_TEXTURE_1D_ARRAY || - surf->texture->target == PIPE_TEXTURE_2D_ARRAY) { - zslice = 0; - layer = surf->u.tex.first_layer; - nlayers = surf->u.tex.last_layer - surf->u.tex.first_layer + 1; - } - else { - zslice = surf->u.tex.first_layer; - layer = 0; - } + SVGA_STATS_TIME_PUSH(ss->sws, SVGA_STATS_TIME_PROPAGATESURFACE); s->dirty = FALSE; ss->texture_timestamp++; svga_age_texture_view(tex, surf->u.tex.level); if (s->handle != tex->handle) { + unsigned zslice, layer; + unsigned nlayers = 1; + unsigned i; + + if (surf->texture->target == PIPE_TEXTURE_CUBE) { + zslice = 0; + layer = surf->u.tex.first_layer; + } + else if (surf->texture->target == PIPE_TEXTURE_1D_ARRAY || + surf->texture->target == PIPE_TEXTURE_2D_ARRAY) { + zslice = 0; + layer = surf->u.tex.first_layer; + nlayers = surf->u.tex.last_layer - surf->u.tex.first_layer + 1; + } + else { + zslice = surf->u.tex.first_layer; + layer = 0; + } + SVGA_DBG(DEBUG_VIEWS, "svga: Surface propagate: tex %p, level %u, from %p\n", tex, surf->u.tex.level, surf); for (i = 0; i < nlayers; i++) { svga_texture_copy_handle(svga, - s->handle, 0, 0, 0, s->real_level, s->real_layer + i, - tex->handle, 0, 0, zslice, surf->u.tex.level, layer + i, + s->handle, 0, 0, 0, s->real_level, + s->real_layer + i, + tex->handle, 0, 0, zslice, surf->u.tex.level, + layer + i, u_minify(tex->b.b.width0, surf->u.tex.level), - u_minify(tex->b.b.height0, surf->u.tex.level), 1); + u_minify(tex->b.b.height0, surf->u.tex.level), + 1); svga_define_texture_level(tex, layer + i, surf->u.tex.level); } } + + SVGA_STATS_TIME_POP(ss->sws); +} + + +/** + * If any of the render targets are in backing texture views, propagate any + * changes to them back to the original texture. + */ +void +svga_propagate_rendertargets(struct svga_context *svga) +{ + unsigned i; + + /* Note that we examine the svga->state.hw_draw.framebuffer surfaces, + * not the svga->curr.framebuffer surfaces, because it's the former + * surfaces which may be backing surface views (the actual render targets). + */ + for (i = 0; i < svga->state.hw_draw.num_rendertargets; i++) { + struct pipe_surface *s = svga->state.hw_draw.rtv[i]; + if (s) { + svga_propagate_surface(svga, s); + } + } + + if (svga->state.hw_draw.dsv) { + svga_propagate_surface(svga, svga->state.hw_draw.dsv); + } } diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_surface.h mesa-17.0.7/src/gallium/drivers/svga/svga_surface.h --- mesa-12.0.6/src/gallium/drivers/svga/svga_surface.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_surface.h 2017-06-01 10:37:10.000000000 +0000 @@ -45,6 +45,12 @@ struct pipe_surface base; struct svga_host_surface_cache_key key; + + /* + * Note that the handle may point at a secondary / backing resource + * created by svga_texture_view_surface() which is something other + * than svga_texture(base->texture)->handle. + */ struct svga_winsys_surface *handle; unsigned real_layer; @@ -55,13 +61,29 @@ /* VGPU10 */ SVGA3dRenderTargetViewId view_id; + + /* + * As with 'handle' above, this may point to a secondary / backing resource. + * We can't have one resource bound as both a render target and a shader + * resource at the same time. But we sometimes want to do that, such as + * for mipmap generation where we sample from one level and render into + * another. + * In this situation, the backed surface is the render target while the + * original surface is the shader resource. + */ struct svga_surface *backed; }; +void +svga_mark_surfaces_dirty(struct svga_context *svga); + extern void svga_propagate_surface(struct svga_context *svga, struct pipe_surface *surf); +void +svga_propagate_rendertargets(struct svga_context *svga); + extern boolean svga_surface_needs_propagation(const struct pipe_surface *surf); @@ -93,7 +115,6 @@ static inline struct svga_surface * svga_surface(struct pipe_surface *surface) { - assert(surface); return (struct svga_surface *)surface; } @@ -101,12 +122,31 @@ static inline const struct svga_surface * svga_surface_const(const struct pipe_surface *surface) { - assert(surface); return (const struct svga_surface *)surface; } struct pipe_surface * svga_validate_surface_view(struct svga_context *svga, struct svga_surface *s); +static inline SVGA3dResourceType +svga_resource_type(enum pipe_texture_target target) +{ + switch (target) { + case PIPE_TEXTURE_1D: + case PIPE_TEXTURE_1D_ARRAY: + return SVGA3D_RESOURCE_TEXTURE1D; + case PIPE_TEXTURE_RECT: + case PIPE_TEXTURE_2D: + case PIPE_TEXTURE_2D_ARRAY: + case PIPE_TEXTURE_CUBE: + /* drawing to cube map is treated as drawing to 2D array */ + return SVGA3D_RESOURCE_TEXTURE2D; + case PIPE_TEXTURE_3D: + return SVGA3D_RESOURCE_TEXTURE3D; + default: + assert(!"Unexpected texture target"); + return SVGA3D_RESOURCE_TEXTURE2D; + } +} #endif diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_swtnl_backend.c mesa-17.0.7/src/gallium/drivers/svga/svga_swtnl_backend.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_swtnl_backend.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_swtnl_backend.c 2017-06-01 10:37:10.000000000 +0000 @@ -68,6 +68,9 @@ boolean new_vbuf = FALSE; boolean new_ibuf = FALSE; + SVGA_STATS_TIME_PUSH(svga_sws(svga), + SVGA_STATS_TIME_VBUFRENDERALLOCVERT); + if (svga_render->vertex_size != vertex_size) svga->swtnl.new_vdecl = TRUE; svga_render->vertex_size = (size_t)vertex_size; @@ -113,6 +116,8 @@ if (svga->swtnl.new_vdecl) svga_render->vdecl_offset = svga_render->vbuf_offset; + SVGA_STATS_TIME_POP(svga_sws(svga)); + return TRUE; } @@ -121,6 +126,10 @@ { struct svga_vbuf_render *svga_render = svga_vbuf_render(render); struct svga_context *svga = svga_render->svga; + void * retPtr = NULL; + + SVGA_STATS_TIME_PUSH(svga_sws(svga), + SVGA_STATS_TIME_VBUFRENDERMAPVERT); if (svga_render->vbuf) { char *ptr = (char*)pipe_buffer_map(&svga->pipe, @@ -132,18 +141,21 @@ &svga_render->vbuf_transfer); if (ptr) { svga_render->vbuf_ptr = ptr; - return ptr + svga_render->vbuf_offset; + retPtr = ptr + svga_render->vbuf_offset; } else { svga_render->vbuf_ptr = NULL; svga_render->vbuf_transfer = NULL; - return NULL; + retPtr = NULL; } } else { /* we probably ran out of memory when allocating the vertex buffer */ - return NULL; + retPtr = NULL; } + + SVGA_STATS_TIME_POP(svga_sws(svga)); + return retPtr; } static void @@ -156,6 +168,9 @@ unsigned offset, length; size_t used = svga_render->vertex_size * ((size_t)max_index + 1); + SVGA_STATS_TIME_PUSH(svga_sws(svga), + SVGA_STATS_TIME_VBUFRENDERUNMAPVERT); + offset = svga_render->vbuf_offset + svga_render->vertex_size * min_index; length = svga_render->vertex_size * (max_index + 1 - min_index); @@ -177,6 +192,8 @@ svga_render->min_index = min_index; svga_render->max_index = max_index; svga_render->vbuf_used = MAX2(svga_render->vbuf_used, used); + + SVGA_STATS_TIME_POP(svga_sws(svga)); } static void @@ -200,6 +217,9 @@ if (!svga->swtnl.new_vdecl) return; + SVGA_STATS_TIME_PUSH(svga_sws(svga), + SVGA_STATS_TIME_VBUFSUBMITSTATE); + memcpy(vdecl, svga_render->vdecl, sizeof(vdecl)); /* flush the hw state */ @@ -249,6 +269,7 @@ } svga->swtnl.new_vdecl = FALSE; + SVGA_STATS_TIME_POP(svga_sws(svga)); } static void @@ -263,6 +284,8 @@ const unsigned start_instance = 0; const unsigned instance_count = 1; + SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_VBUFDRAWARRAYS); + /* off to hardware */ svga_vbuf_submit_state(svga_render); @@ -282,6 +305,7 @@ svga->swtnl.new_vbuf = TRUE; assert(ret == PIPE_OK); } + SVGA_STATS_TIME_POP(svga_sws(svga)); } @@ -302,6 +326,8 @@ assert(( svga_render->vbuf_offset - svga_render->vdecl_offset) % svga_render->vertex_size == 0); + SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_VBUFDRAWELEMENTS); + if (svga_render->ibuf_size < svga_render->ibuf_offset + size) pipe_resource_reference(&svga_render->ibuf, NULL); @@ -350,8 +376,9 @@ svga->swtnl.new_vbuf = TRUE; assert(ret == PIPE_OK); } - svga_render->ibuf_offset += size; + + SVGA_STATS_TIME_POP(svga_sws(svga)); } diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_swtnl_draw.c mesa-17.0.7/src/gallium/drivers/svga/svga_swtnl_draw.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_swtnl_draw.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_swtnl_draw.c 2017-06-01 10:37:10.000000000 +0000 @@ -44,10 +44,13 @@ struct pipe_transfer *ib_transfer = NULL; struct pipe_transfer *cb_transfer[SVGA_MAX_CONST_BUFS] = { 0 }; struct draw_context *draw = svga->swtnl.draw; - unsigned i, old_num_vertex_buffers; + MAYBE_UNUSED unsigned old_num_vertex_buffers; + unsigned i; const void *map; enum pipe_error ret; + SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_SWTNLDRAWVBO); + assert(!svga->dirty); assert(svga->state.sw.need_swtnl); assert(draw); @@ -138,6 +141,7 @@ svga->state.sw.in_swtnl_draw = FALSE; svga->dirty |= SVGA_NEW_NEED_PIPELINE | SVGA_NEW_NEED_SWVFETCH; + SVGA_STATS_TIME_POP(svga_sws(svga)); return ret; } diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_swtnl_state.c mesa-17.0.7/src/gallium/drivers/svga/svga_swtnl_state.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_swtnl_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_swtnl_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -97,6 +97,8 @@ update_swtnl_draw( struct svga_context *svga, unsigned dirty ) { + SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_SWTNLUPDATEDRAW); + draw_flush( svga->swtnl.draw ); if (dirty & SVGA_NEW_VS) @@ -141,6 +143,7 @@ (svga->curr.framebuffer.zsbuf) ? svga->curr.framebuffer.zsbuf->format : PIPE_FORMAT_NONE); + SVGA_STATS_TIME_POP(svga_sws(svga)); return PIPE_OK; } @@ -227,6 +230,8 @@ unsigned i; int any_change; + SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_SWTNLUPDATEVDECL); + memset(vinfo, 0, sizeof(*vinfo)); memset(vdecl, 0, sizeof(vdecl)); @@ -299,7 +304,7 @@ enum pipe_error ret; if (!any_change && svga_render->layout_id != SVGA3D_INVALID_ID) { - return PIPE_OK; + goto done; } if (svga_render->layout_id != SVGA3D_INVALID_ID) { @@ -343,13 +348,15 @@ } else { if (!any_change) - return PIPE_OK; + goto done; } memcpy(svga_render->vdecl, vdecl, sizeof(vdecl)); svga->swtnl.new_vdecl = TRUE; - return 0; +done: + SVGA_STATS_TIME_POP(svga_sws(svga)); + return PIPE_OK; } diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_tgsi.c mesa-17.0.7/src/gallium/drivers/svga/svga_tgsi.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_tgsi.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_tgsi.c 2017-06-01 10:37:10.000000000 +0000 @@ -173,6 +173,8 @@ struct svga_shader_variant *variant = NULL; struct svga_shader_emitter emit; + SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_TGSIVGPU9TRANSLATE); + memset(&emit, 0, sizeof(emit)); emit.size = 1024; @@ -252,11 +254,15 @@ } #endif - return variant; + goto done; - fail: +fail: FREE(variant); if (emit.buf != err_buf) FREE(emit.buf); - return NULL; + variant = NULL; + +done: + SVGA_STATS_TIME_POP(svga_sws(svga)); + return variant; } diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_tgsi_insn.c mesa-17.0.7/src/gallium/drivers/svga/svga_tgsi_insn.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_tgsi_insn.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_tgsi_insn.c 2017-06-01 10:37:10.000000000 +0000 @@ -43,7 +43,6 @@ translate_opcode(uint opcode) { switch (opcode) { - case TGSI_OPCODE_ABS: return SVGA3DOP_ABS; case TGSI_OPCODE_ADD: return SVGA3DOP_ADD; case TGSI_OPCODE_DP2A: return SVGA3DOP_DP2ADD; case TGSI_OPCODE_DP3: return SVGA3DOP_DP3; @@ -669,6 +668,7 @@ * in one slot at least: */ assert(type1 == SVGA3DREG_SAMPLER); + (void) type1; if (type0 == SVGA3DREG_CONST && ((type3 == SVGA3DREG_CONST && src0.base.num != src3.base.num) || @@ -1403,30 +1403,6 @@ /** - * Translate/emit TGSI SUB instruction as: - * ADD DST, SRC0, negate(SRC1) - */ -static boolean -emit_sub(struct svga_shader_emitter *emit, - const struct tgsi_full_instruction *insn) -{ - SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 ); - struct src_register src0 = translate_src_register( - emit, &insn->Src[0] ); - struct src_register src1 = translate_src_register( - emit, &insn->Src[1] ); - - src1 = negate(src1); - - if (!submit_op2( emit, inst_token( SVGA3DOP_ADD ), dst, - src0, src1 )) - return FALSE; - - return TRUE; -} - - -/** * Translate/emit KILL_IF instruction (kill if any of X,Y,Z,W are negative). */ static boolean @@ -2989,9 +2965,6 @@ case TGSI_OPCODE_SLE: return emit_select_op( emit, PIPE_FUNC_LEQUAL, insn ); - case TGSI_OPCODE_SUB: - return emit_sub( emit, insn ); - case TGSI_OPCODE_POW: return emit_pow( emit, insn ); diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_tgsi_vgpu10.c mesa-17.0.7/src/gallium/drivers/svga/svga_tgsi_vgpu10.c --- mesa-12.0.6/src/gallium/drivers/svga/svga_tgsi_vgpu10.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_tgsi_vgpu10.c 2017-06-01 10:37:10.000000000 +0000 @@ -745,7 +745,7 @@ boolean indirect, boolean index2D, unsigned tempArrayID) { - unsigned indexDim, index0Rep, index1Rep = VGPU10_OPERAND_INDEX_0D; + unsigned indexDim, index0Rep, index1Rep = VGPU10_OPERAND_INDEX_IMMEDIATE32; /* * Compute index dimensions @@ -1762,7 +1762,7 @@ /** - * Allocate space for a int[4] immediate. + * Allocate space for an int[4] immediate. * \return the index/position of the immediate. */ static unsigned @@ -2631,6 +2631,28 @@ total_temps = emit->num_shader_temps; + /* If there is indirect access to non-indexable temps in the shader, + * convert those temps to indexable temps. This works around a bug + * in the GLSL->TGSI translator exposed in piglit test + * glsl-1.20/execution/fs-const-array-of-struct-of-array.shader_test. + * Internal temps added by the driver remain as non-indexable temps. + */ + if ((emit->info.indirect_files & (1 << TGSI_FILE_TEMPORARY)) && + emit->num_temp_arrays == 0) { + unsigned arrayID; + + arrayID = 1; + emit->num_temp_arrays = arrayID + 1; + emit->temp_arrays[arrayID].start = 0; + emit->temp_arrays[arrayID].size = total_temps; + + /* Fill in the temp_map entries for this temp array */ + for (i = 0; i < total_temps; i++) { + emit->temp_map[i].arrayId = arrayID; + emit->temp_map[i].index = i; + } + } + /* Allocate extra temps for specially-implemented instructions, * such as LIT. */ @@ -2740,16 +2762,17 @@ emit->temp_map[i].index = reg++; } } - total_temps = reg; if (0) { debug_printf("total_temps %u\n", total_temps); - for (i = 0; i < 30; i++) { + for (i = 0; i < total_temps; i++) { debug_printf("temp %u -> array %u index %u\n", i, emit->temp_map[i].arrayId, emit->temp_map[i].index); } } + total_temps = reg; + /* Emit declaration of ordinary temp registers */ if (total_temps > 0) { VGPU10OpcodeToken0 opcode0; @@ -3433,28 +3456,6 @@ /** - * Emit code for TGSI_OPCODE_ABS instruction. - */ -static boolean -emit_abs(struct svga_shader_emitter_v10 *emit, - const struct tgsi_full_instruction *inst) -{ - /* dst = ABS(s0): - * dst = abs(s0) - * Translates into: - * MOV dst, abs(s0) - */ - struct tgsi_full_src_register abs_src0 = absolute_src(&inst->Src[0]); - - /* MOV dst, abs(s0) */ - emit_instruction_op1(emit, VGPU10_OPCODE_MOV, &inst->Dst[0], - &abs_src0, inst->Instruction.Saturate); - - return TRUE; -} - - -/** * Emit code for TGSI_OPCODE_ARL or TGSI_OPCODE_UARL instruction. */ static boolean @@ -4714,29 +4715,6 @@ /** - * Emit code for TGSI_OPCODE_SUB instruction. - */ -static boolean -emit_sub(struct svga_shader_emitter_v10 *emit, - const struct tgsi_full_instruction *inst) -{ - /* dst = SUB(s0, s1): - * dst = s0 - s1 - * Translates into: - * ADD dst, s0, neg(s1) - */ - struct tgsi_full_src_register neg_src1 = negate_src(&inst->Src[1]); - - /* ADD dst, s0, neg(s1) */ - emit_instruction_op2(emit, VGPU10_OPCODE_ADD, &inst->Dst[0], - &inst->Src[0], &neg_src1, - inst->Instruction.Saturate); - - return TRUE; -} - - -/** * Emit a comparison instruction. The dest register will get * 0 or ~0 values depending on the outcome of comparing src0 to src1. */ @@ -5733,8 +5711,6 @@ return emit_vertex(emit, inst); case TGSI_OPCODE_ENDPRIM: return emit_endprim(emit, inst); - case TGSI_OPCODE_ABS: - return emit_abs(emit, inst); case TGSI_OPCODE_IABS: return emit_iabs(emit, inst); case TGSI_OPCODE_ARL: @@ -5802,8 +5778,6 @@ return emit_ssg(emit, inst); case TGSI_OPCODE_ISSG: return emit_issg(emit, inst); - case TGSI_OPCODE_SUB: - return emit_sub(emit, inst); case TGSI_OPCODE_TEX: return emit_tex(emit, inst); case TGSI_OPCODE_TXP: @@ -6692,12 +6666,13 @@ /* These two flags cannot be used together */ assert(key->vs.need_prescale + key->vs.undo_viewport <= 1); + SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_TGSIVGPU10TRANSLATE); /* * Setup the code emitter */ emit = alloc_emitter(); if (!emit) - return NULL; + goto done; emit->unit = unit; emit->key = *key; @@ -6862,5 +6837,7 @@ cleanup: free_emitter(emit); +done: + SVGA_STATS_TIME_POP(svga_sws(svga)); return variant; } diff -Nru mesa-12.0.6/src/gallium/drivers/svga/svga_winsys.h mesa-17.0.7/src/gallium/drivers/svga/svga_winsys.h --- mesa-12.0.6/src/gallium/drivers/svga/svga_winsys.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/svga/svga_winsys.h 2017-06-01 10:37:10.000000000 +0000 @@ -43,6 +43,7 @@ #include "pipe/p_compiler.h" #include "pipe/p_defines.h" +#include "svga_mksstats.h" struct svga_winsys_screen; struct svga_winsys_buffer; @@ -88,6 +89,139 @@ #define SVGA_HINT_FLAG_CAN_PRE_FLUSH (1 << 0) /* Can preemptively flush */ +/** + * SVGA mks statistics info + */ +struct svga_winsys_stats_timeframe { + void *counterTime; + uint64 startTime; + uint64 adjustedStartTime; + struct svga_winsys_stats_timeframe *enclosing; +}; + +enum svga_stats_count { + SVGA_STATS_COUNT_BLENDSTATE, + SVGA_STATS_COUNT_DEPTHSTENCILSTATE, + SVGA_STATS_COUNT_RASTERIZERSTATE, + SVGA_STATS_COUNT_SAMPLER, + SVGA_STATS_COUNT_SAMPLERVIEW, + SVGA_STATS_COUNT_SURFACEWRITEFLUSH, + SVGA_STATS_COUNT_TEXREADBACK, + SVGA_STATS_COUNT_VERTEXELEMENT, + SVGA_STATS_COUNT_MAX +}; + +enum svga_stats_time { + SVGA_STATS_TIME_BUFFERSFLUSH, + SVGA_STATS_TIME_BUFFERTRANSFERMAP, + SVGA_STATS_TIME_BUFFERTRANSFERUNMAP, + SVGA_STATS_TIME_CONTEXTFINISH, + SVGA_STATS_TIME_CONTEXTFLUSH, + SVGA_STATS_TIME_CREATEBACKEDSURFACEVIEW, + SVGA_STATS_TIME_CREATEBUFFER, + SVGA_STATS_TIME_CREATECONTEXT, + SVGA_STATS_TIME_CREATEFS, + SVGA_STATS_TIME_CREATEGS, + SVGA_STATS_TIME_CREATESURFACE, + SVGA_STATS_TIME_CREATESURFACEVIEW, + SVGA_STATS_TIME_CREATETEXTURE, + SVGA_STATS_TIME_CREATEVS, + SVGA_STATS_TIME_DEFINESHADER, + SVGA_STATS_TIME_DESTROYSURFACE, + SVGA_STATS_TIME_DRAWVBO, + SVGA_STATS_TIME_DRAWARRAYS, + SVGA_STATS_TIME_DRAWELEMENTS, + SVGA_STATS_TIME_EMITFS, + SVGA_STATS_TIME_EMITGS, + SVGA_STATS_TIME_EMITVS, + SVGA_STATS_TIME_FENCEFINISH, + SVGA_STATS_TIME_GENERATEINDICES, + SVGA_STATS_TIME_HWTNLDRAWARRAYS, + SVGA_STATS_TIME_HWTNLDRAWELEMENTS, + SVGA_STATS_TIME_HWTNLFLUSH, + SVGA_STATS_TIME_HWTNLPRIM, + SVGA_STATS_TIME_PROPAGATESURFACE, + SVGA_STATS_TIME_SETSAMPLERVIEWS, + SVGA_STATS_TIME_SURFACEFLUSH, + SVGA_STATS_TIME_SWTNLDRAWVBO, + SVGA_STATS_TIME_SWTNLUPDATEDRAW, + SVGA_STATS_TIME_SWTNLUPDATEVDECL, + SVGA_STATS_TIME_TEXTRANSFERMAP, + SVGA_STATS_TIME_TEXTRANSFERUNMAP, + SVGA_STATS_TIME_TGSIVGPU10TRANSLATE, + SVGA_STATS_TIME_TGSIVGPU9TRANSLATE, + SVGA_STATS_TIME_UPDATESTATE, + SVGA_STATS_TIME_VALIDATESURFACEVIEW, + SVGA_STATS_TIME_VBUFDRAWARRAYS, + SVGA_STATS_TIME_VBUFDRAWELEMENTS, + SVGA_STATS_TIME_VBUFRENDERALLOCVERT, + SVGA_STATS_TIME_VBUFRENDERMAPVERT, + SVGA_STATS_TIME_VBUFRENDERUNMAPVERT, + SVGA_STATS_TIME_VBUFSUBMITSTATE, + SVGA_STATS_TIME_MAX +}; + +#define SVGA_STATS_PREFIX "GuestGL_" + +#define SVGA_STATS_COUNT_NAMES \ + SVGA_STATS_PREFIX "BlendState", \ + SVGA_STATS_PREFIX "DepthStencilState", \ + SVGA_STATS_PREFIX "RasterizerState", \ + SVGA_STATS_PREFIX "Sampler", \ + SVGA_STATS_PREFIX "SamplerView", \ + SVGA_STATS_PREFIX "SurfaceWriteFlush", \ + SVGA_STATS_PREFIX "TextureReadback", \ + SVGA_STATS_PREFIX "VertexElement" \ + +#define SVGA_STATS_TIME_NAMES \ + SVGA_STATS_PREFIX "BuffersFlush", \ + SVGA_STATS_PREFIX "BufferTransferMap", \ + SVGA_STATS_PREFIX "BufferTransferUnmap", \ + SVGA_STATS_PREFIX "ContextFinish", \ + SVGA_STATS_PREFIX "ContextFlush", \ + SVGA_STATS_PREFIX "CreateBackedSurfaceView", \ + SVGA_STATS_PREFIX "CreateBuffer", \ + SVGA_STATS_PREFIX "CreateContext", \ + SVGA_STATS_PREFIX "CreateFS", \ + SVGA_STATS_PREFIX "CreateGS", \ + SVGA_STATS_PREFIX "CreateSurface", \ + SVGA_STATS_PREFIX "CreateSurfaceView", \ + SVGA_STATS_PREFIX "CreateTexture", \ + SVGA_STATS_PREFIX "CreateVS", \ + SVGA_STATS_PREFIX "DefineShader", \ + SVGA_STATS_PREFIX "DestroySurface", \ + SVGA_STATS_PREFIX "DrawVBO", \ + SVGA_STATS_PREFIX "DrawArrays", \ + SVGA_STATS_PREFIX "DrawElements", \ + SVGA_STATS_PREFIX "EmitFS", \ + SVGA_STATS_PREFIX "EmitGS", \ + SVGA_STATS_PREFIX "EmitVS", \ + SVGA_STATS_PREFIX "FenceFinish", \ + SVGA_STATS_PREFIX "GenerateIndices", \ + SVGA_STATS_PREFIX "HWtnlDrawArrays", \ + SVGA_STATS_PREFIX "HWtnlDrawElements", \ + SVGA_STATS_PREFIX "HWtnlFlush", \ + SVGA_STATS_PREFIX "HWtnlPrim", \ + SVGA_STATS_PREFIX "PropagateSurface", \ + SVGA_STATS_PREFIX "SetSamplerViews", \ + SVGA_STATS_PREFIX "SurfaceFlush", \ + SVGA_STATS_PREFIX "SwtnlDrawVBO", \ + SVGA_STATS_PREFIX "SwtnlUpdateDraw", \ + SVGA_STATS_PREFIX "SwtnlUpdateVDecl", \ + SVGA_STATS_PREFIX "TextureTransferMap", \ + SVGA_STATS_PREFIX "TextureTransferUnmap", \ + SVGA_STATS_PREFIX "TGSIVGPU10Translate", \ + SVGA_STATS_PREFIX "TGSIVGPU9Translate", \ + SVGA_STATS_PREFIX "UpdateState", \ + SVGA_STATS_PREFIX "ValidateSurfaceView", \ + SVGA_STATS_PREFIX "VbufDrawArrays", \ + SVGA_STATS_PREFIX "VbufDrawElements", \ + SVGA_STATS_PREFIX "VbufRenderAllocVertices", \ + SVGA_STATS_PREFIX "VbufRenderMapVertices", \ + SVGA_STATS_PREFIX "VbufRenderUnmapVertices", \ + SVGA_STATS_PREFIX "VbufSubmitState" + + /** Opaque surface handle */ struct svga_winsys_surface; @@ -290,6 +424,9 @@ /** To report perf/conformance/etc issues to the state tracker */ struct pipe_debug_callback *debug_callback; + + /** The more recent command issued to command buffer */ + SVGAFifo3dCmdId last_command; }; @@ -419,6 +556,14 @@ uint32 numMipLevels); /** + * Invalidate the content of this surface + */ + void + (*surface_invalidate)(struct svga_winsys_screen *sws, + struct svga_winsys_surface *surface); + + + /** * Buffer management. Buffer attributes are mostly fixed over its lifetime. * * @param usage bitmask of SVGA_BUFFER_USAGE_* flags. @@ -539,6 +684,25 @@ SVGA3dQueryState *queryState, void *result, uint32 resultLen); + /** + * Increment a statistic counter + */ + void + (*stats_inc)(enum svga_stats_count); + + /** + * Push a time frame onto the stack + */ + void + (*stats_time_push)(enum svga_stats_time, struct svga_winsys_stats_timeframe *); + + /** + * Pop a time frame. + */ + void + (*stats_time_pop)(); + + /** Have VGPU v10 hardware? */ boolean have_vgpu10; @@ -547,6 +711,7 @@ boolean have_generate_mipmap_cmd; boolean have_set_predication_cmd; + boolean have_transfer_from_buffer_cmd; }; diff -Nru mesa-12.0.6/src/gallium/drivers/swr/Makefile.am mesa-17.0.7/src/gallium/drivers/swr/Makefile.am --- mesa-12.0.6/src/gallium/drivers/swr/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -29,18 +29,22 @@ libmesaswr_la_SOURCES = $(LOADER_SOURCES) COMMON_CXXFLAGS = \ + -fno-strict-aliasing \ $(GALLIUM_DRIVER_CFLAGS) \ $(LLVM_CXXFLAGS) \ $(SWR_CXX11_CXXFLAGS) \ -I$(builddir)/rasterizer/scripts \ -I$(builddir)/rasterizer/jitter \ + -I$(builddir)/rasterizer/archrast \ -I$(srcdir)/rasterizer \ -I$(srcdir)/rasterizer/core \ -I$(srcdir)/rasterizer/scripts \ - -I$(srcdir)/rasterizer/jitter + -I$(srcdir)/rasterizer/jitter \ + -I$(srcdir)/rasterizer/archrast COMMON_SOURCES = \ $(CXX_SOURCES) \ + $(ARCHRAST_CXX_SOURCES) \ $(COMMON_CXX_SOURCES) \ $(CORE_CXX_SOURCES) \ $(JITTER_CXX_SOURCES) \ @@ -53,7 +57,11 @@ rasterizer/scripts/gen_knobs.h \ rasterizer/jitter/state_llvm.h \ rasterizer/jitter/builder_x86.h \ - rasterizer/jitter/builder_x86.cpp + rasterizer/jitter/builder_x86.cpp \ + rasterizer/archrast/gen_ar_event.h \ + rasterizer/archrast/gen_ar_event.cpp \ + rasterizer/archrast/gen_ar_eventhandler.h \ + rasterizer/archrast/gen_ar_eventhandlerfile.h MKDIR_GEN = $(AM_V_at)$(MKDIR_P) $(@D) PYTHON_GEN = $(AM_V_GEN)$(PYTHON2) $(PYTHON_FLAGS) @@ -63,11 +71,21 @@ --input $(srcdir)/swr_context.h \ --output swr_context_llvm.h -rasterizer/scripts/gen_knobs.cpp rasterizer/scripts/gen_knobs.h: rasterizer/scripts/gen_knobs.py rasterizer/scripts/knob_defs.py rasterizer/scripts/templates/knobs.template +rasterizer/scripts/gen_knobs.cpp: rasterizer/scripts/gen_knobs.py rasterizer/scripts/knob_defs.py rasterizer/scripts/templates/knobs.template $(MKDIR_GEN) $(PYTHON_GEN) \ $(srcdir)/rasterizer/scripts/gen_knobs.py \ - rasterizer/scripts + --input $(srcdir)/rasterizer/scripts/templates/knobs.template \ + --output rasterizer/scripts/gen_knobs.cpp \ + --gen_cpp + +rasterizer/scripts/gen_knobs.h: rasterizer/scripts/gen_knobs.py rasterizer/scripts/knob_defs.py rasterizer/scripts/templates/knobs.template + $(MKDIR_GEN) + $(PYTHON_GEN) \ + $(srcdir)/rasterizer/scripts/gen_knobs.py \ + --input $(srcdir)/rasterizer/scripts/templates/knobs.template \ + --output rasterizer/scripts/gen_knobs.h \ + --gen_h rasterizer/jitter/state_llvm.h: rasterizer/jitter/scripts/gen_llvm_types.py rasterizer/core/state.h $(MKDIR_GEN) @@ -106,6 +124,37 @@ --output rasterizer/jitter/builder_x86.cpp \ --gen_x86_cpp +rasterizer/archrast/gen_ar_event.h: rasterizer/scripts/gen_archrast.py rasterizer/scripts/templates/ar_event_h.template rasterizer/archrast/events.proto + $(MKDIR_GEN) + $(PYTHON_GEN) \ + $(srcdir)/rasterizer/scripts/gen_archrast.py \ + --proto $(srcdir)/rasterizer/archrast/events.proto \ + --output rasterizer/archrast/gen_ar_event.h \ + --gen_event_h + +rasterizer/archrast/gen_ar_event.cpp: rasterizer/scripts/gen_archrast.py rasterizer/scripts/templates/ar_event_cpp.template rasterizer/archrast/events.proto + $(MKDIR_GEN) + $(PYTHON_GEN) \ + $(srcdir)/rasterizer/scripts/gen_archrast.py \ + --proto $(srcdir)/rasterizer/archrast/events.proto \ + --output rasterizer/archrast/gen_ar_event.cpp \ + --gen_event_cpp + +rasterizer/archrast/gen_ar_eventhandler.h: rasterizer/scripts/gen_archrast.py rasterizer/scripts/templates/ar_eventhandler_h.template rasterizer/archrast/events.proto + $(MKDIR_GEN) + $(PYTHON_GEN) \ + $(srcdir)/rasterizer/scripts/gen_archrast.py \ + --proto $(srcdir)/rasterizer/archrast/events.proto \ + --output rasterizer/archrast/gen_ar_eventhandler.h \ + --gen_eventhandler_h + +rasterizer/archrast/gen_ar_eventhandlerfile.h: rasterizer/scripts/gen_archrast.py rasterizer/scripts/templates/ar_eventhandlerfile_h.template rasterizer/archrast/events.proto + $(MKDIR_GEN) + $(PYTHON_GEN) \ + $(srcdir)/rasterizer/scripts/gen_archrast.py \ + --proto $(srcdir)/rasterizer/archrast/events.proto \ + --output rasterizer/archrast/gen_ar_eventhandlerfile.h \ + --gen_eventhandlerfile_h COMMON_LIBADD = \ $(top_builddir)/src/gallium/auxiliary/libgallium.la \ @@ -196,8 +245,11 @@ include $(top_srcdir)/install-gallium-links.mk EXTRA_DIST = \ + SConscript \ + rasterizer/archrast/events.proto \ rasterizer/jitter/scripts/gen_llvm_ir_macros.py \ rasterizer/jitter/scripts/gen_llvm_types.py \ + rasterizer/scripts/gen_archrast.py \ rasterizer/scripts/gen_knobs.py \ rasterizer/scripts/knob_defs.py \ rasterizer/scripts/mako/ast.py \ @@ -217,4 +269,8 @@ rasterizer/scripts/mako/runtime.py \ rasterizer/scripts/mako/template.py \ rasterizer/scripts/mako/util.py \ - rasterizer/scripts/templates/knobs.template + rasterizer/scripts/templates/knobs.template \ + rasterizer/scripts/templates/ar_event_h.template \ + rasterizer/scripts/templates/ar_event_cpp.template \ + rasterizer/scripts/templates/ar_eventhandler_h.template \ + rasterizer/scripts/templates/ar_eventhandlerfile_h.template diff -Nru mesa-12.0.6/src/gallium/drivers/swr/Makefile.in mesa-17.0.7/src/gallium/drivers/swr/Makefile.in --- mesa-12.0.6/src/gallium/drivers/swr/Makefile.in 2017-01-24 01:41:48.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/Makefile.in 2017-06-01 10:37:21.000000000 +0000 @@ -134,10 +134,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -206,13 +209,16 @@ libswrAVX_la-swr_draw.lo libswrAVX_la-swr_screen.lo \ libswrAVX_la-swr_state.lo libswrAVX_la-swr_tex_sample.lo \ libswrAVX_la-swr_scratch.lo libswrAVX_la-swr_shader.lo \ - libswrAVX_la-swr_fence.lo libswrAVX_la-swr_query.lo + libswrAVX_la-swr_fence.lo libswrAVX_la-swr_fence_work.lo \ + libswrAVX_la-swr_query.lo am__dirstamp = $(am__leading_dot)dirstamp -am__objects_3 = rasterizer/common/libswrAVX_la-formats.lo \ +am__objects_3 = rasterizer/archrast/libswrAVX_la-archrast.lo +am__objects_4 = rasterizer/common/libswrAVX_la-formats.lo \ rasterizer/common/libswrAVX_la-rdtsc_buckets.lo \ rasterizer/common/libswrAVX_la-swr_assert.lo -am__objects_4 = rasterizer/core/libswrAVX_la-api.lo \ +am__objects_5 = rasterizer/core/libswrAVX_la-api.lo \ rasterizer/core/libswrAVX_la-backend.lo \ + rasterizer/core/libswrAVX_la-binner.lo \ rasterizer/core/libswrAVX_la-clip.lo \ rasterizer/core/libswrAVX_la-frontend.lo \ rasterizer/core/libswrAVX_la-multisample.lo \ @@ -221,20 +227,32 @@ rasterizer/core/libswrAVX_la-rdtsc_core.lo \ rasterizer/core/libswrAVX_la-threads.lo \ rasterizer/core/libswrAVX_la-tilemgr.lo -am__objects_5 = rasterizer/jitter/libswrAVX_la-blend_jit.lo \ +am__objects_6 = rasterizer/jitter/libswrAVX_la-blend_jit.lo \ rasterizer/jitter/libswrAVX_la-builder.lo \ rasterizer/jitter/libswrAVX_la-builder_misc.lo \ rasterizer/jitter/libswrAVX_la-fetch_jit.lo \ rasterizer/jitter/libswrAVX_la-JitManager.lo \ rasterizer/jitter/libswrAVX_la-streamout_jit.lo -am__objects_6 = rasterizer/memory/libswrAVX_la-ClearTile.lo \ +am__objects_7 = rasterizer/memory/libswrAVX_la-ClearTile.lo \ rasterizer/memory/libswrAVX_la-LoadTile.lo \ - rasterizer/memory/libswrAVX_la-StoreTile.lo -am__objects_7 = rasterizer/scripts/libswrAVX_la-gen_knobs.lo \ - rasterizer/jitter/libswrAVX_la-builder_x86.lo -am__objects_8 = $(am__objects_2) $(am__objects_3) $(am__objects_4) \ - $(am__objects_5) $(am__objects_6) $(am__objects_7) -am_libswrAVX_la_OBJECTS = $(am__objects_8) + rasterizer/memory/libswrAVX_la-LoadTile_Linear.lo \ + rasterizer/memory/libswrAVX_la-LoadTile_TileX.lo \ + rasterizer/memory/libswrAVX_la-LoadTile_TileY.lo \ + rasterizer/memory/libswrAVX_la-StoreTile.lo \ + rasterizer/memory/libswrAVX_la-StoreTile_Linear2.lo \ + rasterizer/memory/libswrAVX_la-StoreTile_Linear.lo \ + rasterizer/memory/libswrAVX_la-StoreTile_TileW.lo \ + rasterizer/memory/libswrAVX_la-StoreTile_TileX2.lo \ + rasterizer/memory/libswrAVX_la-StoreTile_TileX.lo \ + rasterizer/memory/libswrAVX_la-StoreTile_TileY2.lo \ + rasterizer/memory/libswrAVX_la-StoreTile_TileY.lo +am__objects_8 = rasterizer/scripts/libswrAVX_la-gen_knobs.lo \ + rasterizer/jitter/libswrAVX_la-builder_x86.lo \ + rasterizer/archrast/libswrAVX_la-gen_ar_event.lo +am__objects_9 = $(am__objects_2) $(am__objects_3) $(am__objects_4) \ + $(am__objects_5) $(am__objects_6) $(am__objects_7) \ + $(am__objects_8) +am_libswrAVX_la_OBJECTS = $(am__objects_9) nodist_libswrAVX_la_OBJECTS = \ rasterizer/jitter/libswrAVX_la-builder_gen.lo libswrAVX_la_OBJECTS = $(am_libswrAVX_la_OBJECTS) \ @@ -243,17 +261,19 @@ $(LIBTOOLFLAGS) --mode=link $(CXXLD) $(libswrAVX_la_CXXFLAGS) \ $(CXXFLAGS) $(libswrAVX_la_LDFLAGS) $(LDFLAGS) -o $@ libswrAVX2_la_DEPENDENCIES = $(am__DEPENDENCIES_2) -am__objects_9 = libswrAVX2_la-swr_clear.lo \ +am__objects_10 = libswrAVX2_la-swr_clear.lo \ libswrAVX2_la-swr_context.lo libswrAVX2_la-swr_draw.lo \ libswrAVX2_la-swr_screen.lo libswrAVX2_la-swr_state.lo \ libswrAVX2_la-swr_tex_sample.lo libswrAVX2_la-swr_scratch.lo \ libswrAVX2_la-swr_shader.lo libswrAVX2_la-swr_fence.lo \ - libswrAVX2_la-swr_query.lo -am__objects_10 = rasterizer/common/libswrAVX2_la-formats.lo \ + libswrAVX2_la-swr_fence_work.lo libswrAVX2_la-swr_query.lo +am__objects_11 = rasterizer/archrast/libswrAVX2_la-archrast.lo +am__objects_12 = rasterizer/common/libswrAVX2_la-formats.lo \ rasterizer/common/libswrAVX2_la-rdtsc_buckets.lo \ rasterizer/common/libswrAVX2_la-swr_assert.lo -am__objects_11 = rasterizer/core/libswrAVX2_la-api.lo \ +am__objects_13 = rasterizer/core/libswrAVX2_la-api.lo \ rasterizer/core/libswrAVX2_la-backend.lo \ + rasterizer/core/libswrAVX2_la-binner.lo \ rasterizer/core/libswrAVX2_la-clip.lo \ rasterizer/core/libswrAVX2_la-frontend.lo \ rasterizer/core/libswrAVX2_la-multisample.lo \ @@ -262,20 +282,32 @@ rasterizer/core/libswrAVX2_la-rdtsc_core.lo \ rasterizer/core/libswrAVX2_la-threads.lo \ rasterizer/core/libswrAVX2_la-tilemgr.lo -am__objects_12 = rasterizer/jitter/libswrAVX2_la-blend_jit.lo \ +am__objects_14 = rasterizer/jitter/libswrAVX2_la-blend_jit.lo \ rasterizer/jitter/libswrAVX2_la-builder.lo \ rasterizer/jitter/libswrAVX2_la-builder_misc.lo \ rasterizer/jitter/libswrAVX2_la-fetch_jit.lo \ rasterizer/jitter/libswrAVX2_la-JitManager.lo \ rasterizer/jitter/libswrAVX2_la-streamout_jit.lo -am__objects_13 = rasterizer/memory/libswrAVX2_la-ClearTile.lo \ +am__objects_15 = rasterizer/memory/libswrAVX2_la-ClearTile.lo \ rasterizer/memory/libswrAVX2_la-LoadTile.lo \ - rasterizer/memory/libswrAVX2_la-StoreTile.lo -am__objects_14 = rasterizer/scripts/libswrAVX2_la-gen_knobs.lo \ - rasterizer/jitter/libswrAVX2_la-builder_x86.lo -am__objects_15 = $(am__objects_9) $(am__objects_10) $(am__objects_11) \ - $(am__objects_12) $(am__objects_13) $(am__objects_14) -am_libswrAVX2_la_OBJECTS = $(am__objects_15) + rasterizer/memory/libswrAVX2_la-LoadTile_Linear.lo \ + rasterizer/memory/libswrAVX2_la-LoadTile_TileX.lo \ + rasterizer/memory/libswrAVX2_la-LoadTile_TileY.lo \ + rasterizer/memory/libswrAVX2_la-StoreTile.lo \ + rasterizer/memory/libswrAVX2_la-StoreTile_Linear2.lo \ + rasterizer/memory/libswrAVX2_la-StoreTile_Linear.lo \ + rasterizer/memory/libswrAVX2_la-StoreTile_TileW.lo \ + rasterizer/memory/libswrAVX2_la-StoreTile_TileX2.lo \ + rasterizer/memory/libswrAVX2_la-StoreTile_TileX.lo \ + rasterizer/memory/libswrAVX2_la-StoreTile_TileY2.lo \ + rasterizer/memory/libswrAVX2_la-StoreTile_TileY.lo +am__objects_16 = rasterizer/scripts/libswrAVX2_la-gen_knobs.lo \ + rasterizer/jitter/libswrAVX2_la-builder_x86.lo \ + rasterizer/archrast/libswrAVX2_la-gen_ar_event.lo +am__objects_17 = $(am__objects_10) $(am__objects_11) $(am__objects_12) \ + $(am__objects_13) $(am__objects_14) $(am__objects_15) \ + $(am__objects_16) +am_libswrAVX2_la_OBJECTS = $(am__objects_17) nodist_libswrAVX2_la_OBJECTS = \ rasterizer/jitter/libswrAVX2_la-builder_gen.lo libswrAVX2_la_OBJECTS = $(am_libswrAVX2_la_OBJECTS) \ @@ -375,6 +407,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -389,6 +423,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -418,10 +453,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -471,11 +507,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -515,8 +548,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -553,8 +584,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -563,7 +592,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -571,13 +599,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -606,6 +635,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -691,9 +721,16 @@ swr_memory.h \ swr_fence.h \ swr_fence.cpp \ + swr_fence_work.h \ + swr_fence_work.cpp \ swr_query.h \ swr_query.cpp +ARCHRAST_CXX_SOURCES := \ + rasterizer/archrast/archrast.cpp \ + rasterizer/archrast/archrast.h \ + rasterizer/archrast/eventmanager.h + COMMON_CXX_SOURCES := \ rasterizer/common/formats.cpp \ rasterizer/common/formats.h \ @@ -703,6 +740,7 @@ rasterizer/common/rdtsc_buckets.h \ rasterizer/common/rdtsc_buckets_shared.h \ rasterizer/common/rdtsc_buckets_shared.h \ + rasterizer/common/simd16intrin.h \ rasterizer/common/simdintrin.h \ rasterizer/common/swr_assert.cpp \ rasterizer/common/swr_assert.h @@ -713,9 +751,11 @@ rasterizer/core/arena.h \ rasterizer/core/backend.cpp \ rasterizer/core/backend.h \ + rasterizer/core/binner.cpp \ rasterizer/core/blend.h \ rasterizer/core/clip.cpp \ rasterizer/core/clip.h \ + rasterizer/core/conservativeRast.h \ rasterizer/core/context.h \ rasterizer/core/depthstencil.h \ rasterizer/core/fifo.hpp \ @@ -763,7 +803,19 @@ rasterizer/memory/ClearTile.cpp \ rasterizer/memory/Convert.h \ rasterizer/memory/LoadTile.cpp \ + rasterizer/memory/LoadTile.h \ + rasterizer/memory/LoadTile_Linear.cpp \ + rasterizer/memory/LoadTile_TileX.cpp \ + rasterizer/memory/LoadTile_TileY.cpp \ rasterizer/memory/StoreTile.cpp \ + rasterizer/memory/StoreTile.h \ + rasterizer/memory/StoreTile_Linear2.cpp \ + rasterizer/memory/StoreTile_Linear.cpp \ + rasterizer/memory/StoreTile_TileW.cpp \ + rasterizer/memory/StoreTile_TileX2.cpp \ + rasterizer/memory/StoreTile_TileX.cpp \ + rasterizer/memory/StoreTile_TileY2.cpp \ + rasterizer/memory/StoreTile_TileY.cpp \ rasterizer/memory/TilingFunctions.h \ rasterizer/memory/tilingtraits.h @@ -814,12 +866,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -831,23 +879,27 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CXXFLAGS = $(GALLIUM_DRIVER_CFLAGS) $(SWR_CXX11_CXXFLAGS) noinst_LTLIBRARIES = libmesaswr.la libmesaswr_la_SOURCES = $(LOADER_SOURCES) COMMON_CXXFLAGS = \ + -fno-strict-aliasing \ $(GALLIUM_DRIVER_CFLAGS) \ $(LLVM_CXXFLAGS) \ $(SWR_CXX11_CXXFLAGS) \ -I$(builddir)/rasterizer/scripts \ -I$(builddir)/rasterizer/jitter \ + -I$(builddir)/rasterizer/archrast \ -I$(srcdir)/rasterizer \ -I$(srcdir)/rasterizer/core \ -I$(srcdir)/rasterizer/scripts \ - -I$(srcdir)/rasterizer/jitter + -I$(srcdir)/rasterizer/jitter \ + -I$(srcdir)/rasterizer/archrast COMMON_SOURCES = \ $(CXX_SOURCES) \ + $(ARCHRAST_CXX_SOURCES) \ $(COMMON_CXX_SOURCES) \ $(CORE_CXX_SOURCES) \ $(JITTER_CXX_SOURCES) \ @@ -860,7 +912,11 @@ rasterizer/scripts/gen_knobs.h \ rasterizer/jitter/state_llvm.h \ rasterizer/jitter/builder_x86.h \ - rasterizer/jitter/builder_x86.cpp + rasterizer/jitter/builder_x86.cpp \ + rasterizer/archrast/gen_ar_event.h \ + rasterizer/archrast/gen_ar_event.cpp \ + rasterizer/archrast/gen_ar_eventhandler.h \ + rasterizer/archrast/gen_ar_eventhandlerfile.h MKDIR_GEN = $(AM_V_at)$(MKDIR_P) $(@D) PYTHON_GEN = $(AM_V_GEN)$(PYTHON2) $(PYTHON_FLAGS) @@ -931,8 +987,11 @@ $(COMMON_LDFLAGS) EXTRA_DIST = \ + SConscript \ + rasterizer/archrast/events.proto \ rasterizer/jitter/scripts/gen_llvm_ir_macros.py \ rasterizer/jitter/scripts/gen_llvm_types.py \ + rasterizer/scripts/gen_archrast.py \ rasterizer/scripts/gen_knobs.py \ rasterizer/scripts/knob_defs.py \ rasterizer/scripts/mako/ast.py \ @@ -952,7 +1011,11 @@ rasterizer/scripts/mako/runtime.py \ rasterizer/scripts/mako/template.py \ rasterizer/scripts/mako/util.py \ - rasterizer/scripts/templates/knobs.template + rasterizer/scripts/templates/knobs.template \ + rasterizer/scripts/templates/ar_event_h.template \ + rasterizer/scripts/templates/ar_event_cpp.template \ + rasterizer/scripts/templates/ar_eventhandler_h.template \ + rasterizer/scripts/templates/ar_eventhandlerfile_h.template all: $(BUILT_SOURCES) $(MAKE) $(AM_MAKEFLAGS) all-am @@ -1038,6 +1101,15 @@ libmesaswr.la: $(libmesaswr_la_OBJECTS) $(libmesaswr_la_DEPENDENCIES) $(EXTRA_libmesaswr_la_DEPENDENCIES) $(AM_V_CXXLD)$(CXXLINK) $(libmesaswr_la_OBJECTS) $(libmesaswr_la_LIBADD) $(LIBS) +rasterizer/archrast/$(am__dirstamp): + @$(MKDIR_P) rasterizer/archrast + @: > rasterizer/archrast/$(am__dirstamp) +rasterizer/archrast/$(DEPDIR)/$(am__dirstamp): + @$(MKDIR_P) rasterizer/archrast/$(DEPDIR) + @: > rasterizer/archrast/$(DEPDIR)/$(am__dirstamp) +rasterizer/archrast/libswrAVX_la-archrast.lo: \ + rasterizer/archrast/$(am__dirstamp) \ + rasterizer/archrast/$(DEPDIR)/$(am__dirstamp) rasterizer/common/$(am__dirstamp): @$(MKDIR_P) rasterizer/common @: > rasterizer/common/$(am__dirstamp) @@ -1064,6 +1136,9 @@ rasterizer/core/libswrAVX_la-backend.lo: \ rasterizer/core/$(am__dirstamp) \ rasterizer/core/$(DEPDIR)/$(am__dirstamp) +rasterizer/core/libswrAVX_la-binner.lo: \ + rasterizer/core/$(am__dirstamp) \ + rasterizer/core/$(DEPDIR)/$(am__dirstamp) rasterizer/core/libswrAVX_la-clip.lo: rasterizer/core/$(am__dirstamp) \ rasterizer/core/$(DEPDIR)/$(am__dirstamp) rasterizer/core/libswrAVX_la-frontend.lo: \ @@ -1123,9 +1198,39 @@ rasterizer/memory/libswrAVX_la-LoadTile.lo: \ rasterizer/memory/$(am__dirstamp) \ rasterizer/memory/$(DEPDIR)/$(am__dirstamp) +rasterizer/memory/libswrAVX_la-LoadTile_Linear.lo: \ + rasterizer/memory/$(am__dirstamp) \ + rasterizer/memory/$(DEPDIR)/$(am__dirstamp) +rasterizer/memory/libswrAVX_la-LoadTile_TileX.lo: \ + rasterizer/memory/$(am__dirstamp) \ + rasterizer/memory/$(DEPDIR)/$(am__dirstamp) +rasterizer/memory/libswrAVX_la-LoadTile_TileY.lo: \ + rasterizer/memory/$(am__dirstamp) \ + rasterizer/memory/$(DEPDIR)/$(am__dirstamp) rasterizer/memory/libswrAVX_la-StoreTile.lo: \ rasterizer/memory/$(am__dirstamp) \ rasterizer/memory/$(DEPDIR)/$(am__dirstamp) +rasterizer/memory/libswrAVX_la-StoreTile_Linear2.lo: \ + rasterizer/memory/$(am__dirstamp) \ + rasterizer/memory/$(DEPDIR)/$(am__dirstamp) +rasterizer/memory/libswrAVX_la-StoreTile_Linear.lo: \ + rasterizer/memory/$(am__dirstamp) \ + rasterizer/memory/$(DEPDIR)/$(am__dirstamp) +rasterizer/memory/libswrAVX_la-StoreTile_TileW.lo: \ + rasterizer/memory/$(am__dirstamp) \ + rasterizer/memory/$(DEPDIR)/$(am__dirstamp) +rasterizer/memory/libswrAVX_la-StoreTile_TileX2.lo: \ + rasterizer/memory/$(am__dirstamp) \ + rasterizer/memory/$(DEPDIR)/$(am__dirstamp) +rasterizer/memory/libswrAVX_la-StoreTile_TileX.lo: \ + rasterizer/memory/$(am__dirstamp) \ + rasterizer/memory/$(DEPDIR)/$(am__dirstamp) +rasterizer/memory/libswrAVX_la-StoreTile_TileY2.lo: \ + rasterizer/memory/$(am__dirstamp) \ + rasterizer/memory/$(DEPDIR)/$(am__dirstamp) +rasterizer/memory/libswrAVX_la-StoreTile_TileY.lo: \ + rasterizer/memory/$(am__dirstamp) \ + rasterizer/memory/$(DEPDIR)/$(am__dirstamp) rasterizer/scripts/$(am__dirstamp): @$(MKDIR_P) rasterizer/scripts @: > rasterizer/scripts/$(am__dirstamp) @@ -1138,12 +1243,18 @@ rasterizer/jitter/libswrAVX_la-builder_x86.lo: \ rasterizer/jitter/$(am__dirstamp) \ rasterizer/jitter/$(DEPDIR)/$(am__dirstamp) +rasterizer/archrast/libswrAVX_la-gen_ar_event.lo: \ + rasterizer/archrast/$(am__dirstamp) \ + rasterizer/archrast/$(DEPDIR)/$(am__dirstamp) rasterizer/jitter/libswrAVX_la-builder_gen.lo: \ rasterizer/jitter/$(am__dirstamp) \ rasterizer/jitter/$(DEPDIR)/$(am__dirstamp) libswrAVX.la: $(libswrAVX_la_OBJECTS) $(libswrAVX_la_DEPENDENCIES) $(EXTRA_libswrAVX_la_DEPENDENCIES) $(AM_V_CXXLD)$(libswrAVX_la_LINK) -rpath $(libdir) $(libswrAVX_la_OBJECTS) $(libswrAVX_la_LIBADD) $(LIBS) +rasterizer/archrast/libswrAVX2_la-archrast.lo: \ + rasterizer/archrast/$(am__dirstamp) \ + rasterizer/archrast/$(DEPDIR)/$(am__dirstamp) rasterizer/common/libswrAVX2_la-formats.lo: \ rasterizer/common/$(am__dirstamp) \ rasterizer/common/$(DEPDIR)/$(am__dirstamp) @@ -1158,6 +1269,9 @@ rasterizer/core/libswrAVX2_la-backend.lo: \ rasterizer/core/$(am__dirstamp) \ rasterizer/core/$(DEPDIR)/$(am__dirstamp) +rasterizer/core/libswrAVX2_la-binner.lo: \ + rasterizer/core/$(am__dirstamp) \ + rasterizer/core/$(DEPDIR)/$(am__dirstamp) rasterizer/core/libswrAVX2_la-clip.lo: \ rasterizer/core/$(am__dirstamp) \ rasterizer/core/$(DEPDIR)/$(am__dirstamp) @@ -1206,15 +1320,48 @@ rasterizer/memory/libswrAVX2_la-LoadTile.lo: \ rasterizer/memory/$(am__dirstamp) \ rasterizer/memory/$(DEPDIR)/$(am__dirstamp) +rasterizer/memory/libswrAVX2_la-LoadTile_Linear.lo: \ + rasterizer/memory/$(am__dirstamp) \ + rasterizer/memory/$(DEPDIR)/$(am__dirstamp) +rasterizer/memory/libswrAVX2_la-LoadTile_TileX.lo: \ + rasterizer/memory/$(am__dirstamp) \ + rasterizer/memory/$(DEPDIR)/$(am__dirstamp) +rasterizer/memory/libswrAVX2_la-LoadTile_TileY.lo: \ + rasterizer/memory/$(am__dirstamp) \ + rasterizer/memory/$(DEPDIR)/$(am__dirstamp) rasterizer/memory/libswrAVX2_la-StoreTile.lo: \ rasterizer/memory/$(am__dirstamp) \ rasterizer/memory/$(DEPDIR)/$(am__dirstamp) +rasterizer/memory/libswrAVX2_la-StoreTile_Linear2.lo: \ + rasterizer/memory/$(am__dirstamp) \ + rasterizer/memory/$(DEPDIR)/$(am__dirstamp) +rasterizer/memory/libswrAVX2_la-StoreTile_Linear.lo: \ + rasterizer/memory/$(am__dirstamp) \ + rasterizer/memory/$(DEPDIR)/$(am__dirstamp) +rasterizer/memory/libswrAVX2_la-StoreTile_TileW.lo: \ + rasterizer/memory/$(am__dirstamp) \ + rasterizer/memory/$(DEPDIR)/$(am__dirstamp) +rasterizer/memory/libswrAVX2_la-StoreTile_TileX2.lo: \ + rasterizer/memory/$(am__dirstamp) \ + rasterizer/memory/$(DEPDIR)/$(am__dirstamp) +rasterizer/memory/libswrAVX2_la-StoreTile_TileX.lo: \ + rasterizer/memory/$(am__dirstamp) \ + rasterizer/memory/$(DEPDIR)/$(am__dirstamp) +rasterizer/memory/libswrAVX2_la-StoreTile_TileY2.lo: \ + rasterizer/memory/$(am__dirstamp) \ + rasterizer/memory/$(DEPDIR)/$(am__dirstamp) +rasterizer/memory/libswrAVX2_la-StoreTile_TileY.lo: \ + rasterizer/memory/$(am__dirstamp) \ + rasterizer/memory/$(DEPDIR)/$(am__dirstamp) rasterizer/scripts/libswrAVX2_la-gen_knobs.lo: \ rasterizer/scripts/$(am__dirstamp) \ rasterizer/scripts/$(DEPDIR)/$(am__dirstamp) rasterizer/jitter/libswrAVX2_la-builder_x86.lo: \ rasterizer/jitter/$(am__dirstamp) \ rasterizer/jitter/$(DEPDIR)/$(am__dirstamp) +rasterizer/archrast/libswrAVX2_la-gen_ar_event.lo: \ + rasterizer/archrast/$(am__dirstamp) \ + rasterizer/archrast/$(DEPDIR)/$(am__dirstamp) rasterizer/jitter/libswrAVX2_la-builder_gen.lo: \ rasterizer/jitter/$(am__dirstamp) \ rasterizer/jitter/$(DEPDIR)/$(am__dirstamp) @@ -1224,6 +1371,8 @@ mostlyclean-compile: -rm -f *.$(OBJEXT) + -rm -f rasterizer/archrast/*.$(OBJEXT) + -rm -f rasterizer/archrast/*.lo -rm -f rasterizer/common/*.$(OBJEXT) -rm -f rasterizer/common/*.lo -rm -f rasterizer/core/*.$(OBJEXT) @@ -1242,6 +1391,7 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libswrAVX2_la-swr_context.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libswrAVX2_la-swr_draw.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libswrAVX2_la-swr_fence.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libswrAVX2_la-swr_fence_work.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libswrAVX2_la-swr_query.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libswrAVX2_la-swr_scratch.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libswrAVX2_la-swr_screen.Plo@am__quote@ @@ -1252,6 +1402,7 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libswrAVX_la-swr_context.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libswrAVX_la-swr_draw.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libswrAVX_la-swr_fence.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libswrAVX_la-swr_fence_work.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libswrAVX_la-swr_query.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libswrAVX_la-swr_scratch.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libswrAVX_la-swr_screen.Plo@am__quote@ @@ -1259,6 +1410,10 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libswrAVX_la-swr_state.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libswrAVX_la-swr_tex_sample.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/swr_loader.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@rasterizer/archrast/$(DEPDIR)/libswrAVX2_la-archrast.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@rasterizer/archrast/$(DEPDIR)/libswrAVX2_la-gen_ar_event.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@rasterizer/archrast/$(DEPDIR)/libswrAVX_la-archrast.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@rasterizer/archrast/$(DEPDIR)/libswrAVX_la-gen_ar_event.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rasterizer/common/$(DEPDIR)/libswrAVX2_la-formats.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rasterizer/common/$(DEPDIR)/libswrAVX2_la-rdtsc_buckets.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rasterizer/common/$(DEPDIR)/libswrAVX2_la-swr_assert.Plo@am__quote@ @@ -1267,6 +1422,7 @@ @AMDEP_TRUE@@am__include@ @am__quote@rasterizer/common/$(DEPDIR)/libswrAVX_la-swr_assert.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rasterizer/core/$(DEPDIR)/libswrAVX2_la-api.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rasterizer/core/$(DEPDIR)/libswrAVX2_la-backend.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@rasterizer/core/$(DEPDIR)/libswrAVX2_la-binner.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rasterizer/core/$(DEPDIR)/libswrAVX2_la-clip.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rasterizer/core/$(DEPDIR)/libswrAVX2_la-frontend.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rasterizer/core/$(DEPDIR)/libswrAVX2_la-multisample.Plo@am__quote@ @@ -1277,6 +1433,7 @@ @AMDEP_TRUE@@am__include@ @am__quote@rasterizer/core/$(DEPDIR)/libswrAVX2_la-tilemgr.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rasterizer/core/$(DEPDIR)/libswrAVX_la-api.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rasterizer/core/$(DEPDIR)/libswrAVX_la-backend.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@rasterizer/core/$(DEPDIR)/libswrAVX_la-binner.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rasterizer/core/$(DEPDIR)/libswrAVX_la-clip.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rasterizer/core/$(DEPDIR)/libswrAVX_la-frontend.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rasterizer/core/$(DEPDIR)/libswrAVX_la-multisample.Plo@am__quote@ @@ -1303,10 +1460,30 @@ @AMDEP_TRUE@@am__include@ @am__quote@rasterizer/jitter/$(DEPDIR)/libswrAVX_la-streamout_jit.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rasterizer/memory/$(DEPDIR)/libswrAVX2_la-ClearTile.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rasterizer/memory/$(DEPDIR)/libswrAVX2_la-LoadTile.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@rasterizer/memory/$(DEPDIR)/libswrAVX2_la-LoadTile_Linear.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@rasterizer/memory/$(DEPDIR)/libswrAVX2_la-LoadTile_TileX.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@rasterizer/memory/$(DEPDIR)/libswrAVX2_la-LoadTile_TileY.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rasterizer/memory/$(DEPDIR)/libswrAVX2_la-StoreTile.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@rasterizer/memory/$(DEPDIR)/libswrAVX2_la-StoreTile_Linear.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@rasterizer/memory/$(DEPDIR)/libswrAVX2_la-StoreTile_Linear2.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@rasterizer/memory/$(DEPDIR)/libswrAVX2_la-StoreTile_TileW.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@rasterizer/memory/$(DEPDIR)/libswrAVX2_la-StoreTile_TileX.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@rasterizer/memory/$(DEPDIR)/libswrAVX2_la-StoreTile_TileX2.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@rasterizer/memory/$(DEPDIR)/libswrAVX2_la-StoreTile_TileY.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@rasterizer/memory/$(DEPDIR)/libswrAVX2_la-StoreTile_TileY2.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rasterizer/memory/$(DEPDIR)/libswrAVX_la-ClearTile.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rasterizer/memory/$(DEPDIR)/libswrAVX_la-LoadTile.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@rasterizer/memory/$(DEPDIR)/libswrAVX_la-LoadTile_Linear.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@rasterizer/memory/$(DEPDIR)/libswrAVX_la-LoadTile_TileX.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@rasterizer/memory/$(DEPDIR)/libswrAVX_la-LoadTile_TileY.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rasterizer/memory/$(DEPDIR)/libswrAVX_la-StoreTile.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@rasterizer/memory/$(DEPDIR)/libswrAVX_la-StoreTile_Linear.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@rasterizer/memory/$(DEPDIR)/libswrAVX_la-StoreTile_Linear2.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@rasterizer/memory/$(DEPDIR)/libswrAVX_la-StoreTile_TileW.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@rasterizer/memory/$(DEPDIR)/libswrAVX_la-StoreTile_TileX.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@rasterizer/memory/$(DEPDIR)/libswrAVX_la-StoreTile_TileX2.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@rasterizer/memory/$(DEPDIR)/libswrAVX_la-StoreTile_TileY.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@rasterizer/memory/$(DEPDIR)/libswrAVX_la-StoreTile_TileY2.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rasterizer/scripts/$(DEPDIR)/libswrAVX2_la-gen_knobs.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rasterizer/scripts/$(DEPDIR)/libswrAVX_la-gen_knobs.Plo@am__quote@ @@ -1397,6 +1574,13 @@ @AMDEP_TRUE@@am__fastdepCXX_FALSE@ DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCXX_FALSE@ $(AM_V_CXX@am__nodep@)$(LIBTOOL) $(AM_V_lt) --tag=CXX $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libswrAVX_la_CXXFLAGS) $(CXXFLAGS) -c -o libswrAVX_la-swr_fence.lo `test -f 'swr_fence.cpp' || echo '$(srcdir)/'`swr_fence.cpp +libswrAVX_la-swr_fence_work.lo: swr_fence_work.cpp +@am__fastdepCXX_TRUE@ $(AM_V_CXX)$(LIBTOOL) $(AM_V_lt) --tag=CXX $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libswrAVX_la_CXXFLAGS) $(CXXFLAGS) -MT libswrAVX_la-swr_fence_work.lo -MD -MP -MF $(DEPDIR)/libswrAVX_la-swr_fence_work.Tpo -c -o libswrAVX_la-swr_fence_work.lo `test -f 'swr_fence_work.cpp' || echo '$(srcdir)/'`swr_fence_work.cpp +@am__fastdepCXX_TRUE@ $(AM_V_at)$(am__mv) $(DEPDIR)/libswrAVX_la-swr_fence_work.Tpo $(DEPDIR)/libswrAVX_la-swr_fence_work.Plo +@AMDEP_TRUE@@am__fastdepCXX_FALSE@ $(AM_V_CXX)source='swr_fence_work.cpp' object='libswrAVX_la-swr_fence_work.lo' libtool=yes @AMDEPBACKSLASH@ +@AMDEP_TRUE@@am__fastdepCXX_FALSE@ DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCXX_FALSE@ $(AM_V_CXX@am__nodep@)$(LIBTOOL) $(AM_V_lt) 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rasterizer/archrast/$(DEPDIR)/libswrAVX_la-archrast.Plo +@AMDEP_TRUE@@am__fastdepCXX_FALSE@ $(AM_V_CXX)source='rasterizer/archrast/archrast.cpp' object='rasterizer/archrast/libswrAVX_la-archrast.lo' libtool=yes @AMDEPBACKSLASH@ +@AMDEP_TRUE@@am__fastdepCXX_FALSE@ DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCXX_FALSE@ $(AM_V_CXX@am__nodep@)$(LIBTOOL) $(AM_V_lt) --tag=CXX $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libswrAVX_la_CXXFLAGS) $(CXXFLAGS) -c -o rasterizer/archrast/libswrAVX_la-archrast.lo `test -f 'rasterizer/archrast/archrast.cpp' || echo '$(srcdir)/'`rasterizer/archrast/archrast.cpp + rasterizer/common/libswrAVX_la-formats.lo: rasterizer/common/formats.cpp @am__fastdepCXX_TRUE@ $(AM_V_CXX)$(LIBTOOL) $(AM_V_lt) --tag=CXX $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libswrAVX_la_CXXFLAGS) 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+@am__fastdepCXX_TRUE@ $(AM_V_at)$(am__mv) rasterizer/memory/$(DEPDIR)/libswrAVX2_la-StoreTile_TileX.Tpo rasterizer/memory/$(DEPDIR)/libswrAVX2_la-StoreTile_TileX.Plo +@AMDEP_TRUE@@am__fastdepCXX_FALSE@ $(AM_V_CXX)source='rasterizer/memory/StoreTile_TileX.cpp' object='rasterizer/memory/libswrAVX2_la-StoreTile_TileX.lo' libtool=yes @AMDEPBACKSLASH@ +@AMDEP_TRUE@@am__fastdepCXX_FALSE@ DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCXX_FALSE@ $(AM_V_CXX@am__nodep@)$(LIBTOOL) $(AM_V_lt) --tag=CXX $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libswrAVX2_la_CXXFLAGS) $(CXXFLAGS) -c -o rasterizer/memory/libswrAVX2_la-StoreTile_TileX.lo `test -f 'rasterizer/memory/StoreTile_TileX.cpp' || echo '$(srcdir)/'`rasterizer/memory/StoreTile_TileX.cpp + +rasterizer/memory/libswrAVX2_la-StoreTile_TileY2.lo: rasterizer/memory/StoreTile_TileY2.cpp +@am__fastdepCXX_TRUE@ $(AM_V_CXX)$(LIBTOOL) $(AM_V_lt) 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'rasterizer/jitter/builder_x86.cpp' || echo '$(srcdir)/'`rasterizer/jitter/builder_x86.cpp +rasterizer/archrast/libswrAVX2_la-gen_ar_event.lo: rasterizer/archrast/gen_ar_event.cpp +@am__fastdepCXX_TRUE@ $(AM_V_CXX)$(LIBTOOL) $(AM_V_lt) --tag=CXX $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libswrAVX2_la_CXXFLAGS) $(CXXFLAGS) -MT rasterizer/archrast/libswrAVX2_la-gen_ar_event.lo -MD -MP -MF rasterizer/archrast/$(DEPDIR)/libswrAVX2_la-gen_ar_event.Tpo -c -o rasterizer/archrast/libswrAVX2_la-gen_ar_event.lo `test -f 'rasterizer/archrast/gen_ar_event.cpp' || echo '$(srcdir)/'`rasterizer/archrast/gen_ar_event.cpp +@am__fastdepCXX_TRUE@ $(AM_V_at)$(am__mv) rasterizer/archrast/$(DEPDIR)/libswrAVX2_la-gen_ar_event.Tpo rasterizer/archrast/$(DEPDIR)/libswrAVX2_la-gen_ar_event.Plo +@AMDEP_TRUE@@am__fastdepCXX_FALSE@ $(AM_V_CXX)source='rasterizer/archrast/gen_ar_event.cpp' object='rasterizer/archrast/libswrAVX2_la-gen_ar_event.lo' libtool=yes @AMDEPBACKSLASH@ +@AMDEP_TRUE@@am__fastdepCXX_FALSE@ DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCXX_FALSE@ $(AM_V_CXX@am__nodep@)$(LIBTOOL) $(AM_V_lt) --tag=CXX $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libswrAVX2_la_CXXFLAGS) $(CXXFLAGS) -c -o rasterizer/archrast/libswrAVX2_la-gen_ar_event.lo `test -f 'rasterizer/archrast/gen_ar_event.cpp' || echo '$(srcdir)/'`rasterizer/archrast/gen_ar_event.cpp + rasterizer/jitter/libswrAVX2_la-builder_gen.lo: rasterizer/jitter/builder_gen.cpp @am__fastdepCXX_TRUE@ $(AM_V_CXX)$(LIBTOOL) $(AM_V_lt) --tag=CXX $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libswrAVX2_la_CXXFLAGS) $(CXXFLAGS) -MT rasterizer/jitter/libswrAVX2_la-builder_gen.lo -MD -MP -MF rasterizer/jitter/$(DEPDIR)/libswrAVX2_la-builder_gen.Tpo -c -o rasterizer/jitter/libswrAVX2_la-builder_gen.lo `test -f 'rasterizer/jitter/builder_gen.cpp' || echo '$(srcdir)/'`rasterizer/jitter/builder_gen.cpp @am__fastdepCXX_TRUE@ $(AM_V_at)$(am__mv) rasterizer/jitter/$(DEPDIR)/libswrAVX2_la-builder_gen.Tpo rasterizer/jitter/$(DEPDIR)/libswrAVX2_la-builder_gen.Plo @@ -1829,6 +2202,7 @@ clean-libtool: -rm -rf .libs _libs + -rm -rf rasterizer/archrast/.libs rasterizer/archrast/_libs -rm -rf rasterizer/common/.libs rasterizer/common/_libs -rm -rf rasterizer/core/.libs rasterizer/core/_libs -rm -rf rasterizer/jitter/.libs rasterizer/jitter/_libs @@ -1955,6 +2329,8 @@ distclean-generic: -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES) -test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES) + -rm -f rasterizer/archrast/$(DEPDIR)/$(am__dirstamp) + -rm -f rasterizer/archrast/$(am__dirstamp) -rm -f rasterizer/common/$(DEPDIR)/$(am__dirstamp) -rm -f rasterizer/common/$(am__dirstamp) -rm -f rasterizer/core/$(DEPDIR)/$(am__dirstamp) @@ -1977,7 +2353,7 @@ clean-noinstLTLIBRARIES mostlyclean-am distclean: distclean-am - -rm -rf ./$(DEPDIR) rasterizer/common/$(DEPDIR) rasterizer/core/$(DEPDIR) rasterizer/jitter/$(DEPDIR) rasterizer/memory/$(DEPDIR) rasterizer/scripts/$(DEPDIR) + -rm -rf ./$(DEPDIR) rasterizer/archrast/$(DEPDIR) rasterizer/common/$(DEPDIR) rasterizer/core/$(DEPDIR) rasterizer/jitter/$(DEPDIR) rasterizer/memory/$(DEPDIR) rasterizer/scripts/$(DEPDIR) -rm -f Makefile distclean-am: clean-am distclean-compile distclean-generic \ distclean-local distclean-tags @@ -2023,7 +2399,7 @@ installcheck-am: maintainer-clean: maintainer-clean-am - -rm -rf ./$(DEPDIR) rasterizer/common/$(DEPDIR) rasterizer/core/$(DEPDIR) rasterizer/jitter/$(DEPDIR) rasterizer/memory/$(DEPDIR) rasterizer/scripts/$(DEPDIR) + -rm -rf ./$(DEPDIR) rasterizer/archrast/$(DEPDIR) rasterizer/common/$(DEPDIR) rasterizer/core/$(DEPDIR) rasterizer/jitter/$(DEPDIR) rasterizer/memory/$(DEPDIR) rasterizer/scripts/$(DEPDIR) -rm -f Makefile maintainer-clean-am: distclean-am maintainer-clean-generic @@ -2067,11 +2443,21 @@ --input $(srcdir)/swr_context.h \ --output swr_context_llvm.h -rasterizer/scripts/gen_knobs.cpp rasterizer/scripts/gen_knobs.h: rasterizer/scripts/gen_knobs.py rasterizer/scripts/knob_defs.py rasterizer/scripts/templates/knobs.template +rasterizer/scripts/gen_knobs.cpp: rasterizer/scripts/gen_knobs.py rasterizer/scripts/knob_defs.py rasterizer/scripts/templates/knobs.template + $(MKDIR_GEN) + $(PYTHON_GEN) \ + $(srcdir)/rasterizer/scripts/gen_knobs.py \ + --input $(srcdir)/rasterizer/scripts/templates/knobs.template \ + --output rasterizer/scripts/gen_knobs.cpp \ + --gen_cpp + +rasterizer/scripts/gen_knobs.h: rasterizer/scripts/gen_knobs.py rasterizer/scripts/knob_defs.py rasterizer/scripts/templates/knobs.template $(MKDIR_GEN) $(PYTHON_GEN) \ $(srcdir)/rasterizer/scripts/gen_knobs.py \ - rasterizer/scripts + --input $(srcdir)/rasterizer/scripts/templates/knobs.template \ + --output rasterizer/scripts/gen_knobs.h \ + --gen_h rasterizer/jitter/state_llvm.h: rasterizer/jitter/scripts/gen_llvm_types.py rasterizer/core/state.h $(MKDIR_GEN) @@ -2110,6 +2496,38 @@ --output rasterizer/jitter/builder_x86.cpp \ --gen_x86_cpp +rasterizer/archrast/gen_ar_event.h: rasterizer/scripts/gen_archrast.py rasterizer/scripts/templates/ar_event_h.template rasterizer/archrast/events.proto + $(MKDIR_GEN) + $(PYTHON_GEN) \ + $(srcdir)/rasterizer/scripts/gen_archrast.py \ + --proto $(srcdir)/rasterizer/archrast/events.proto \ + --output rasterizer/archrast/gen_ar_event.h \ + --gen_event_h + +rasterizer/archrast/gen_ar_event.cpp: rasterizer/scripts/gen_archrast.py rasterizer/scripts/templates/ar_event_cpp.template rasterizer/archrast/events.proto + $(MKDIR_GEN) + $(PYTHON_GEN) \ + $(srcdir)/rasterizer/scripts/gen_archrast.py \ + --proto $(srcdir)/rasterizer/archrast/events.proto \ + --output rasterizer/archrast/gen_ar_event.cpp \ + --gen_event_cpp + +rasterizer/archrast/gen_ar_eventhandler.h: rasterizer/scripts/gen_archrast.py rasterizer/scripts/templates/ar_eventhandler_h.template rasterizer/archrast/events.proto + $(MKDIR_GEN) + $(PYTHON_GEN) \ + $(srcdir)/rasterizer/scripts/gen_archrast.py \ + --proto $(srcdir)/rasterizer/archrast/events.proto \ + --output rasterizer/archrast/gen_ar_eventhandler.h \ + --gen_eventhandler_h + +rasterizer/archrast/gen_ar_eventhandlerfile.h: rasterizer/scripts/gen_archrast.py rasterizer/scripts/templates/ar_eventhandlerfile_h.template rasterizer/archrast/events.proto + $(MKDIR_GEN) + $(PYTHON_GEN) \ + $(srcdir)/rasterizer/scripts/gen_archrast.py \ + --proto $(srcdir)/rasterizer/archrast/events.proto \ + --output rasterizer/archrast/gen_ar_eventhandlerfile.h \ + --gen_eventhandlerfile_h + # XXX: As we cannot use BUILT_SOURCES (the files will end up in the dist # tarball) just annotate the dependency directly. # As the single direct user of builder_gen.h is a header (builder.h) trace all diff -Nru mesa-12.0.6/src/gallium/drivers/swr/Makefile.sources mesa-17.0.7/src/gallium/drivers/swr/Makefile.sources --- mesa-12.0.6/src/gallium/drivers/swr/Makefile.sources 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/Makefile.sources 2017-06-01 10:37:10.000000000 +0000 @@ -42,9 +42,16 @@ swr_memory.h \ swr_fence.h \ swr_fence.cpp \ + swr_fence_work.h \ + swr_fence_work.cpp \ swr_query.h \ swr_query.cpp +ARCHRAST_CXX_SOURCES := \ + rasterizer/archrast/archrast.cpp \ + rasterizer/archrast/archrast.h \ + rasterizer/archrast/eventmanager.h + COMMON_CXX_SOURCES := \ rasterizer/common/formats.cpp \ rasterizer/common/formats.h \ @@ -54,6 +61,7 @@ rasterizer/common/rdtsc_buckets.h \ rasterizer/common/rdtsc_buckets_shared.h \ rasterizer/common/rdtsc_buckets_shared.h \ + rasterizer/common/simd16intrin.h \ rasterizer/common/simdintrin.h \ rasterizer/common/swr_assert.cpp \ rasterizer/common/swr_assert.h @@ -64,9 +72,11 @@ rasterizer/core/arena.h \ rasterizer/core/backend.cpp \ rasterizer/core/backend.h \ + rasterizer/core/binner.cpp \ rasterizer/core/blend.h \ rasterizer/core/clip.cpp \ rasterizer/core/clip.h \ + rasterizer/core/conservativeRast.h \ rasterizer/core/context.h \ rasterizer/core/depthstencil.h \ rasterizer/core/fifo.hpp \ @@ -114,6 +124,18 @@ rasterizer/memory/ClearTile.cpp \ rasterizer/memory/Convert.h \ rasterizer/memory/LoadTile.cpp \ + rasterizer/memory/LoadTile.h \ + rasterizer/memory/LoadTile_Linear.cpp \ + rasterizer/memory/LoadTile_TileX.cpp \ + rasterizer/memory/LoadTile_TileY.cpp \ rasterizer/memory/StoreTile.cpp \ + rasterizer/memory/StoreTile.h \ + rasterizer/memory/StoreTile_Linear2.cpp \ + rasterizer/memory/StoreTile_Linear.cpp \ + rasterizer/memory/StoreTile_TileW.cpp \ + rasterizer/memory/StoreTile_TileX2.cpp \ + rasterizer/memory/StoreTile_TileX.cpp \ + rasterizer/memory/StoreTile_TileY2.cpp \ + rasterizer/memory/StoreTile_TileY.cpp \ rasterizer/memory/TilingFunctions.h \ rasterizer/memory/tilingtraits.h diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/archrast/archrast.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,375 @@ +/**************************************************************************** +* Copyright (C) 2016 Intel Corporation. All Rights Reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice (including the next +* paragraph) shall be included in all copies or substantial portions of the +* Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +* IN THE SOFTWARE. +* +* @file archrast.h +* +* @brief Definitions for archrast. +* +******************************************************************************/ +#include + +#include "common/os.h" +#include "archrast/archrast.h" +#include "archrast/eventmanager.h" +#include "gen_ar_eventhandlerfile.h" + +namespace ArchRast +{ + ////////////////////////////////////////////////////////////////////////// + /// @brief struct that keeps track of depth and stencil event information + struct DepthStencilStats + { + uint32_t earlyZTestPassCount = 0; + uint32_t earlyZTestFailCount = 0; + uint32_t lateZTestPassCount = 0; + uint32_t lateZTestFailCount = 0; + uint32_t earlyStencilTestPassCount = 0; + uint32_t earlyStencilTestFailCount = 0; + uint32_t lateStencilTestPassCount = 0; + uint32_t lateStencilTestFailCount = 0; + uint32_t earlyZTestCount = 0; + uint32_t lateZTestCount = 0; + uint32_t earlyStencilTestCount = 0; + uint32_t lateStencilTestCount = 0; + }; + + struct CStats + { + uint32_t clippedVerts = 0; + }; + + struct TEStats + { + uint32_t inputPrims = 0; + //@todo:: Change this to numPatches. Assumed: 1 patch per prim. If holds, its fine. + }; + + struct GSStats + { + uint32_t inputPrimCount; + uint32_t primGeneratedCount; + uint32_t vertsInput; + }; + + ////////////////////////////////////////////////////////////////////////// + /// @brief Event handler that saves stat events to event files. This + /// handler filters out unwanted events. + class EventHandlerStatsFile : public EventHandlerFile + { + public: + DepthStencilStats DSSingleSample = {}; + DepthStencilStats DSSampleRate = {}; + DepthStencilStats DSPixelRate = {}; + DepthStencilStats DSNullPS = {}; + DepthStencilStats DSOmZ = {}; + CStats CS = {}; + TEStats TS = {}; + GSStats GS = {}; + + EventHandlerStatsFile(uint32_t id) : EventHandlerFile(id) {} + + // These are events that we're not interested in saving in stats event files. + virtual void Handle(Start& event) {} + virtual void Handle(End& event) {} + + virtual void Handle(EarlyDepthStencilInfoSingleSample& event) + { + //earlyZ test compute + DSSingleSample.earlyZTestPassCount += _mm_popcnt_u32(event.data.depthPassMask); + DSSingleSample.earlyZTestFailCount += _mm_popcnt_u32((!event.data.depthPassMask) & event.data.coverageMask); + DSSingleSample.earlyZTestCount += (_mm_popcnt_u32(event.data.depthPassMask) + _mm_popcnt_u32((!event.data.depthPassMask) & event.data.coverageMask)); + + //earlyStencil test compute + DSSingleSample.earlyStencilTestPassCount += _mm_popcnt_u32(event.data.stencilPassMask); + DSSingleSample.earlyStencilTestFailCount += _mm_popcnt_u32((!event.data.stencilPassMask) & event.data.coverageMask); + DSSingleSample.earlyStencilTestCount += (_mm_popcnt_u32(event.data.stencilPassMask) + _mm_popcnt_u32((!event.data.stencilPassMask) & event.data.coverageMask)); + + //outputerMerger test compute + DSOmZ.earlyZTestPassCount += DSSingleSample.earlyZTestPassCount; + DSOmZ.earlyZTestFailCount += DSSingleSample.earlyZTestFailCount; + DSOmZ.earlyZTestCount += DSSingleSample.earlyZTestCount; + DSOmZ.earlyStencilTestPassCount += DSSingleSample.earlyStencilTestPassCount; + DSOmZ.earlyStencilTestFailCount += DSSingleSample.earlyStencilTestFailCount; + DSOmZ.earlyStencilTestCount += DSSingleSample.earlyStencilTestCount; + } + + virtual void Handle(EarlyDepthStencilInfoSampleRate& event) + { + //earlyZ test compute + DSSampleRate.earlyZTestPassCount += _mm_popcnt_u32(event.data.depthPassMask); + DSSampleRate.earlyZTestFailCount += _mm_popcnt_u32((!event.data.depthPassMask) & event.data.coverageMask); + DSSampleRate.earlyZTestCount += (_mm_popcnt_u32(event.data.depthPassMask) + _mm_popcnt_u32((!event.data.depthPassMask) & event.data.coverageMask)); + + //earlyStencil test compute + DSSampleRate.earlyStencilTestPassCount += _mm_popcnt_u32(event.data.stencilPassMask); + DSSampleRate.earlyStencilTestFailCount += _mm_popcnt_u32((!event.data.stencilPassMask) & event.data.coverageMask); + DSSampleRate.earlyStencilTestCount += (_mm_popcnt_u32(event.data.stencilPassMask) + _mm_popcnt_u32((!event.data.stencilPassMask) & event.data.coverageMask)); + + //outputerMerger test compute + DSOmZ.earlyZTestPassCount += DSSampleRate.earlyZTestPassCount; + DSOmZ.earlyZTestFailCount += DSSampleRate.earlyZTestFailCount; + DSOmZ.earlyZTestCount += DSSampleRate.earlyZTestCount; + DSOmZ.earlyStencilTestPassCount += DSSampleRate.earlyStencilTestPassCount; + DSOmZ.earlyStencilTestFailCount += DSSampleRate.earlyStencilTestFailCount; + DSOmZ.earlyStencilTestCount += DSSampleRate.earlyStencilTestCount; + } + + virtual void Handle(EarlyDepthStencilInfoNullPS& event) + { + //earlyZ test compute + DSNullPS.earlyZTestPassCount += _mm_popcnt_u32(event.data.depthPassMask); + DSNullPS.earlyZTestFailCount += _mm_popcnt_u32((!event.data.depthPassMask) & event.data.coverageMask); + DSNullPS.earlyZTestCount += (_mm_popcnt_u32(event.data.depthPassMask) + _mm_popcnt_u32((!event.data.depthPassMask) & event.data.coverageMask)); + + //earlyStencil test compute + DSNullPS.earlyStencilTestPassCount += _mm_popcnt_u32(event.data.stencilPassMask); + DSNullPS.earlyStencilTestFailCount += _mm_popcnt_u32((!event.data.stencilPassMask) & event.data.coverageMask); + DSNullPS.earlyStencilTestCount += (_mm_popcnt_u32(event.data.stencilPassMask) + _mm_popcnt_u32((!event.data.stencilPassMask) & event.data.coverageMask)); + + //outputerMerger test compute + DSOmZ.earlyZTestPassCount += DSNullPS.earlyZTestPassCount; + DSOmZ.earlyZTestFailCount += DSNullPS.earlyZTestFailCount; + DSOmZ.earlyZTestCount += DSNullPS.earlyZTestCount; + DSOmZ.earlyStencilTestPassCount += DSNullPS.earlyStencilTestPassCount; + DSOmZ.earlyStencilTestFailCount += DSNullPS.earlyStencilTestFailCount; + DSOmZ.earlyStencilTestCount += DSNullPS.earlyStencilTestCount; + } + + virtual void Handle(LateDepthStencilInfoSingleSample& event) + { + //lateZ test compute + DSSingleSample.lateZTestPassCount += _mm_popcnt_u32(event.data.depthPassMask); + DSSingleSample.lateZTestFailCount += _mm_popcnt_u32((!event.data.depthPassMask) & event.data.coverageMask); + DSSingleSample.lateZTestCount += (_mm_popcnt_u32(event.data.depthPassMask) + _mm_popcnt_u32((!event.data.depthPassMask) & event.data.coverageMask)); + + //lateStencil test compute + DSSingleSample.lateStencilTestPassCount += _mm_popcnt_u32(event.data.stencilPassMask); + DSSingleSample.lateStencilTestFailCount += _mm_popcnt_u32((!event.data.stencilPassMask) & event.data.coverageMask); + DSSingleSample.lateStencilTestCount += (_mm_popcnt_u32(event.data.stencilPassMask) + _mm_popcnt_u32((!event.data.stencilPassMask) & event.data.coverageMask)); + + //outputerMerger test compute + DSOmZ.lateZTestPassCount += DSSingleSample.lateZTestPassCount; + DSOmZ.lateZTestFailCount += DSSingleSample.lateZTestFailCount; + DSOmZ.lateZTestCount += DSSingleSample.lateZTestCount; + DSOmZ.lateStencilTestPassCount += DSSingleSample.lateStencilTestPassCount; + DSOmZ.lateStencilTestFailCount += DSSingleSample.lateStencilTestFailCount; + DSOmZ.lateStencilTestCount += DSSingleSample.lateStencilTestCount; + } + + virtual void Handle(LateDepthStencilInfoSampleRate& event) + { + //lateZ test compute + DSSampleRate.lateZTestPassCount += _mm_popcnt_u32(event.data.depthPassMask); + DSSampleRate.lateZTestFailCount += _mm_popcnt_u32((!event.data.depthPassMask) & event.data.coverageMask); + DSSampleRate.lateZTestCount += (_mm_popcnt_u32(event.data.depthPassMask) + _mm_popcnt_u32((!event.data.depthPassMask) & event.data.coverageMask)); + + //lateStencil test compute + DSSampleRate.lateStencilTestPassCount += _mm_popcnt_u32(event.data.stencilPassMask); + DSSampleRate.lateStencilTestFailCount += _mm_popcnt_u32((!event.data.stencilPassMask) & event.data.coverageMask); + DSSampleRate.lateStencilTestCount += (_mm_popcnt_u32(event.data.stencilPassMask) + _mm_popcnt_u32((!event.data.stencilPassMask) & event.data.coverageMask)); + + //outputerMerger test compute + DSOmZ.lateZTestPassCount += DSSampleRate.lateZTestPassCount; + DSOmZ.lateZTestFailCount += DSSampleRate.lateZTestFailCount; + DSOmZ.lateZTestCount += DSSampleRate.lateZTestCount; + DSOmZ.lateStencilTestPassCount += DSSampleRate.lateStencilTestPassCount; + DSOmZ.lateStencilTestFailCount += DSSampleRate.lateStencilTestFailCount; + DSOmZ.lateStencilTestCount += DSSampleRate.lateStencilTestCount; + } + + virtual void Handle(LateDepthStencilInfoNullPS& event) + { + //lateZ test compute + DSNullPS.lateZTestPassCount += _mm_popcnt_u32(event.data.depthPassMask); + DSNullPS.lateZTestFailCount += _mm_popcnt_u32((!event.data.depthPassMask) & event.data.coverageMask); + DSNullPS.lateZTestCount += (_mm_popcnt_u32(event.data.depthPassMask) + _mm_popcnt_u32((!event.data.depthPassMask) & event.data.coverageMask)); + + //lateStencil test compute + DSNullPS.lateStencilTestPassCount += _mm_popcnt_u32(event.data.stencilPassMask); + DSNullPS.lateStencilTestFailCount += _mm_popcnt_u32((!event.data.stencilPassMask) & event.data.coverageMask); + DSNullPS.lateStencilTestCount += (_mm_popcnt_u32(event.data.stencilPassMask) + _mm_popcnt_u32((!event.data.stencilPassMask) & event.data.coverageMask)); + + //outputerMerger test compute + DSOmZ.lateZTestPassCount += DSNullPS.lateZTestPassCount; + DSOmZ.lateZTestFailCount += DSNullPS.lateZTestFailCount; + DSOmZ.lateZTestCount += DSNullPS.lateZTestCount; + DSOmZ.lateStencilTestPassCount += DSNullPS.lateStencilTestPassCount; + DSOmZ.lateStencilTestFailCount += DSNullPS.lateStencilTestFailCount; + DSOmZ.lateStencilTestCount += DSNullPS.lateStencilTestCount; + } + + virtual void Handle(EarlyDepthInfoPixelRate& event) + { + //earlyZ test compute + DSPixelRate.earlyZTestCount += _mm_popcnt_u32(event.data.activeLanes); + DSPixelRate.earlyZTestPassCount += event.data.depthPassCount; + DSPixelRate.earlyZTestFailCount += (_mm_popcnt_u32(event.data.activeLanes) - event.data.depthPassCount); + + //outputerMerger test compute + DSOmZ.earlyZTestPassCount += DSPixelRate.earlyZTestPassCount; + DSOmZ.earlyZTestFailCount += DSPixelRate.earlyZTestFailCount; + DSOmZ.earlyZTestCount += DSPixelRate.earlyZTestCount; + } + + + virtual void Handle(LateDepthInfoPixelRate& event) + { + //lateZ test compute + DSPixelRate.lateZTestCount += _mm_popcnt_u32(event.data.activeLanes); + DSPixelRate.lateZTestPassCount += event.data.depthPassCount; + DSPixelRate.lateZTestFailCount += (_mm_popcnt_u32(event.data.activeLanes) - event.data.depthPassCount); + + //outputerMerger test compute + DSOmZ.lateZTestPassCount += DSPixelRate.lateZTestPassCount; + DSOmZ.lateZTestFailCount += DSPixelRate.lateZTestFailCount; + DSOmZ.lateZTestCount += DSPixelRate.lateZTestCount; + + } + + + virtual void Handle(BackendDrawEndEvent& event) + { + //singleSample + EventHandlerFile::Handle(EarlyZSingleSample(event.data.drawId, DSSingleSample.earlyZTestPassCount, DSSingleSample.earlyZTestFailCount, DSSingleSample.earlyZTestCount)); + EventHandlerFile::Handle(LateZSingleSample(event.data.drawId, DSSingleSample.lateZTestPassCount, DSSingleSample.lateZTestFailCount, DSSingleSample.lateZTestCount)); + EventHandlerFile::Handle(EarlyStencilSingleSample(event.data.drawId, DSSingleSample.earlyStencilTestPassCount, DSSingleSample.earlyStencilTestFailCount, DSSingleSample.earlyStencilTestCount)); + EventHandlerFile::Handle(LateStencilSingleSample(event.data.drawId, DSSingleSample.lateStencilTestPassCount, DSSingleSample.lateStencilTestFailCount, DSSingleSample.lateStencilTestCount)); + + //sampleRate + EventHandlerFile::Handle(EarlyZSampleRate(event.data.drawId, DSSampleRate.earlyZTestPassCount, DSSampleRate.earlyZTestFailCount, DSSampleRate.earlyZTestCount)); + EventHandlerFile::Handle(LateZSampleRate(event.data.drawId, DSSampleRate.lateZTestPassCount, DSSampleRate.lateZTestFailCount, DSSampleRate.lateZTestCount)); + EventHandlerFile::Handle(EarlyStencilSampleRate(event.data.drawId, DSSampleRate.earlyStencilTestPassCount, DSSampleRate.earlyStencilTestFailCount, DSSampleRate.earlyStencilTestCount)); + EventHandlerFile::Handle(LateStencilSampleRate(event.data.drawId, DSSampleRate.lateStencilTestPassCount, DSSampleRate.lateStencilTestFailCount, DSSampleRate.lateStencilTestCount)); + + //pixelRate + EventHandlerFile::Handle(EarlyZPixelRate(event.data.drawId, DSPixelRate.earlyZTestPassCount, DSPixelRate.earlyZTestFailCount, DSPixelRate.earlyZTestCount)); + EventHandlerFile::Handle(LateZPixelRate(event.data.drawId, DSPixelRate.lateZTestPassCount, DSPixelRate.lateZTestFailCount, DSPixelRate.lateZTestCount)); + + + //NullPS + EventHandlerFile::Handle(EarlyZNullPS(event.data.drawId, DSNullPS.earlyZTestPassCount, DSNullPS.earlyZTestFailCount, DSNullPS.earlyZTestCount)); + EventHandlerFile::Handle(EarlyStencilNullPS(event.data.drawId, DSNullPS.earlyStencilTestPassCount, DSNullPS.earlyStencilTestFailCount, DSNullPS.earlyStencilTestCount)); + + //OmZ + EventHandlerFile::Handle(EarlyOmZ(event.data.drawId, DSOmZ.earlyZTestPassCount, DSOmZ.earlyZTestFailCount, DSOmZ.earlyZTestCount)); + EventHandlerFile::Handle(EarlyOmStencil(event.data.drawId, DSOmZ.earlyStencilTestPassCount, DSOmZ.earlyStencilTestFailCount, DSOmZ.earlyStencilTestCount)); + EventHandlerFile::Handle(LateOmZ(event.data.drawId, DSOmZ.lateZTestPassCount, DSOmZ.lateZTestFailCount, DSOmZ.lateZTestCount)); + EventHandlerFile::Handle(LateOmStencil(event.data.drawId, DSOmZ.lateStencilTestPassCount, DSOmZ.lateStencilTestFailCount, DSOmZ.lateStencilTestCount)); + + //Reset Internal Counters + DSSingleSample = {}; + DSSampleRate = {}; + DSPixelRate = {}; + DSNullPS = {}; + DSOmZ = {}; + } + + virtual void Handle(FrontendDrawEndEvent& event) + { + //Clipper + EventHandlerFile::Handle(VertsClipped(event.data.drawId, CS.clippedVerts)); + + //Tesselator + EventHandlerFile::Handle(TessPrims(event.data.drawId, TS.inputPrims)); + + //Geometry Shader + EventHandlerFile::Handle(GSInputPrims(event.data.drawId, GS.inputPrimCount)); + EventHandlerFile::Handle(GSPrimsGen(event.data.drawId, GS.primGeneratedCount)); + EventHandlerFile::Handle(GSVertsInput(event.data.drawId, GS.vertsInput)); + + //Reset Internal Counters + CS = {}; + TS = {}; + GS = {}; + } + + virtual void Handle(GSPrimInfo& event) + { + GS.inputPrimCount += event.data.inputPrimCount; + GS.primGeneratedCount += event.data.primGeneratedCount; + GS.vertsInput += event.data.vertsInput; + } + + virtual void Handle(ClipVertexCount& event) + { + CS.clippedVerts += (_mm_popcnt_u32(event.data.primMask) * event.data.vertsPerPrim); + } + + virtual void Handle(TessPrimCount& event) + { + TS.inputPrims += event.data.primCount; + } + }; + + static EventManager* FromHandle(HANDLE hThreadContext) + { + return reinterpret_cast(hThreadContext); + } + + // Construct an event manager and associate a handler with it. + HANDLE CreateThreadContext(AR_THREAD type) + { + // Can we assume single threaded here? + static std::atomic counter(0); + uint32_t id = counter.fetch_add(1); + + EventManager* pManager = new EventManager(); + EventHandlerFile* pHandler = new EventHandlerStatsFile(id); + + if (pManager && pHandler) + { + pManager->Attach(pHandler); + + if (type == AR_THREAD::API) + { + pHandler->Handle(ThreadStartApiEvent()); + } + else + { + pHandler->Handle(ThreadStartWorkerEvent()); + } + pHandler->MarkHeader(); + + return pManager; + } + + SWR_ASSERT(0, "Failed to register thread."); + return nullptr; + } + + void DestroyThreadContext(HANDLE hThreadContext) + { + EventManager* pManager = FromHandle(hThreadContext); + SWR_ASSERT(pManager != nullptr); + + delete pManager; + } + + // Dispatch event for this thread. + void Dispatch(HANDLE hThreadContext, Event& event) + { + EventManager* pManager = FromHandle(hThreadContext); + SWR_ASSERT(pManager != nullptr); + + pManager->Dispatch(event); + } +} diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/archrast/archrast.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/archrast/archrast.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/archrast/archrast.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/archrast/archrast.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,47 @@ +/**************************************************************************** +* Copyright (C) 2016 Intel Corporation. All Rights Reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice (including the next +* paragraph) shall be included in all copies or substantial portions of the +* Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +* IN THE SOFTWARE. +* +* @file archrast.h +* +* @brief Definitions for archrast. +* +******************************************************************************/ +#pragma once + +#include "common/os.h" +#include "gen_ar_event.h" + +namespace ArchRast +{ + enum class AR_THREAD + { + API = 0, + WORKER = 1 + }; + + HANDLE CreateThreadContext(AR_THREAD type); + void DestroyThreadContext(HANDLE hThreadContext); + + // Dispatch event for this thread. + void Dispatch(HANDLE hThreadContext, Event& event); +}; + diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/archrast/eventmanager.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/archrast/eventmanager.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/archrast/eventmanager.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/archrast/eventmanager.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,80 @@ +/**************************************************************************** +* Copyright (C) 2016 Intel Corporation. All Rights Reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice (including the next +* paragraph) shall be included in all copies or substantial portions of the +* Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +* IN THE SOFTWARE. +* +* @file archrast.h +* +* @brief Definitions for the event manager. +* +******************************************************************************/ +#pragma once + +#include "common/os.h" + +#include "gen_ar_event.h" +#include "gen_ar_eventhandler.h" + +#include + +namespace ArchRast +{ + ////////////////////////////////////////////////////////////////////////// + /// EventManager - interface to dispatch events to handlers. + /// Event handling occurs only on a single thread. + ////////////////////////////////////////////////////////////////////////// + class EventManager + { + public: + EventManager() {} + + ~EventManager() + { + // Event manager owns destroying handler objects once attached. + ///@note See comment for Detach. + for (auto pHandler : mHandlers) + { + delete pHandler; + } + } + + void Attach(EventHandler* pHandler) + { + mHandlers.push_back(pHandler); + } + + void Dispatch(Event& event) + { + ///@todo Add event filter check here. + + for (auto pHandler : mHandlers) + { + event.Accept(pHandler); + } + } + private: + + // Handlers stay registered for life + void Detach(EventHandler* pHandler) { SWR_ASSERT(0); } + + std::vector mHandlers; + }; +}; + diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/archrast/events.proto mesa-17.0.7/src/gallium/drivers/swr/rasterizer/archrast/events.proto --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/archrast/events.proto 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/archrast/events.proto 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,427 @@ +# Copyright (C) 2016 Intel Corporation. All Rights Reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +# IN THE SOFTWARE. +# +# Provides definitions for events. + +enum GroupType +{ + APIClearRenderTarget, + APIDraw, + APIDrawWakeAllThreads, + APIDrawIndexed, + APIDispatch, + APIStoreTiles, + APIGetDrawContext, + APISync, + APIWaitForIdle, + FEProcessDraw, + FEProcessDrawIndexed, + FEFetchShader, + FEVertexShader, + FEHullShader, + FETessellation, + FEDomainShader, + FEGeometryShader, + FEStreamout, + FEPAAssemble, + FEBinPoints, + FEBinLines, + FEBinTriangles, + FETriangleSetup, + FEViewportCull, + FEGuardbandClip, + FEClipPoints, + FEClipLines, + FEClipTriangles, + FECullZeroAreaAndBackface, + FECullBetweenCenters, + FEProcessStoreTiles, + FEProcessInvalidateTiles, + WorkerWorkOnFifoBE, + WorkerFoundWork, + BELoadTiles, + BEDispatch, + BEClear, + BERasterizeLine, + BERasterizeTriangle, + BETriangleSetup, + BEStepSetup, + BECullZeroArea, + BEEmptyTriangle, + BETrivialAccept, + BETrivialReject, + BERasterizePartial, + BEPixelBackend, + BESetup, + BEBarycentric, + BEEarlyDepthTest, + BEPixelShader, + BESingleSampleBackend, + BEPixelRateBackend, + BESampleRateBackend, + BENullBackend, + BELateDepthTest, + BEOutputMerger, + BEStoreTiles, + BEEndTile, + WorkerWaitForThreadEvent, +}; + +event Start +{ + GroupType type; + uint32_t id; +}; + +event End +{ + GroupType type; + uint32_t count; +}; + +event ThreadStartApiEvent +{ +}; + +event ThreadStartWorkerEvent +{ +}; + +event DrawInstancedEvent +{ + uint32_t drawId; + uint32_t topology; + uint32_t numVertices; + int32_t startVertex; + uint32_t numInstances; + uint32_t startInstance; +}; + +event DrawIndexedInstancedEvent +{ + uint32_t drawId; + uint32_t topology; + uint32_t numIndices; + int32_t indexOffset; + int32_t baseVertex; + uint32_t numInstances; + uint32_t startInstance; +}; + +event DispatchEvent +{ + uint32_t drawId; + uint32_t threadGroupCountX; + uint32_t threadGroupCountY; + uint32_t threadGroupCountZ; +}; + +event FrameEndEvent +{ + uint32_t frameId; + uint32_t nextDrawId; +}; + +event FrontendStatsEvent +{ + uint32_t drawId; + uint64_t IaVertices; + uint64_t IaPrimitives; + uint64_t VsInvocations; + uint64_t HsInvocations; + uint64_t DsInvocations; + uint64_t GsInvocations; + uint64_t GsPrimitives; + uint64_t CInvocations; + uint64_t CPrimitives; + uint64_t SoPrimStorageNeeded0; + uint64_t SoPrimStorageNeeded1; + uint64_t SoPrimStorageNeeded2; + uint64_t SoPrimStorageNeeded3; + uint64_t SoNumPrimsWritten0; + uint64_t SoNumPrimsWritten1; + uint64_t SoNumPrimsWritten2; + uint64_t SoNumPrimsWritten3; +}; + +event BackendStatsEvent +{ + uint32_t drawId; + uint64_t DepthPassCount; + uint64_t PsInvocations; + uint64_t CsInvocations; + +}; + +event EarlyDepthStencilInfoSingleSample +{ + uint64_t depthPassMask; + uint64_t stencilPassMask; + uint64_t coverageMask; +}; + +event EarlyDepthStencilInfoSampleRate +{ + uint64_t depthPassMask; + uint64_t stencilPassMask; + uint64_t coverageMask; +}; + +event EarlyDepthStencilInfoNullPS +{ + uint64_t depthPassMask; + uint64_t stencilPassMask; + uint64_t coverageMask; +}; + +event LateDepthStencilInfoSingleSample +{ + uint64_t depthPassMask; + uint64_t stencilPassMask; + uint64_t coverageMask; +}; + +event LateDepthStencilInfoSampleRate +{ + uint64_t depthPassMask; + uint64_t stencilPassMask; + uint64_t coverageMask; +}; + +event LateDepthStencilInfoNullPS +{ + uint64_t depthPassMask; + uint64_t stencilPassMask; + uint64_t coverageMask; +}; + +event EarlyDepthInfoPixelRate +{ + uint64_t depthPassCount; + uint64_t activeLanes; +}; + + +event LateDepthInfoPixelRate +{ + uint64_t depthPassCount; + uint64_t activeLanes; +}; + + +event BackendDrawEndEvent +{ + uint32_t drawId; +}; + +event FrontendDrawEndEvent +{ + uint32_t drawId; +}; + +event EarlyZSingleSample +{ + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; +}; + +event LateZSingleSample +{ + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; +}; + +event EarlyStencilSingleSample +{ + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; +}; + +event LateStencilSingleSample +{ + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; +}; + +event EarlyZSampleRate +{ + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; +}; + +event LateZSampleRate +{ + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; +}; + +event EarlyStencilSampleRate +{ + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; +}; + +event LateStencilSampleRate +{ + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; +}; + +event EarlyZNullPS +{ + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; +}; + +event EarlyStencilNullPS +{ + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; +}; + +event EarlyZPixelRate +{ + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; +}; + +event LateZPixelRate +{ + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; +}; + + +event EarlyOmZ +{ + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; +}; + +event EarlyOmStencil +{ + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; +}; + +event LateOmZ +{ + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; +}; + +event LateOmStencil +{ + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; +}; + +event GSPrimInfo +{ + uint64_t inputPrimCount; + uint64_t primGeneratedCount; + uint64_t vertsInput; +}; + +event GSInputPrims +{ + uint32_t drawId; + uint64_t inputPrimCount; +}; + +event GSPrimsGen +{ + uint32_t drawId; + uint64_t primGeneratedCount; +}; + +event GSVertsInput +{ + uint32_t drawId; + uint64_t vertsInput; +}; + +event ClipVertexCount +{ + uint64_t vertsPerPrim; + uint64_t primMask; +}; + +//REMOVE AND REPLACE +event FlushVertClip +{ + uint32_t drawId; +}; + +event VertsClipped +{ + uint32_t drawId; + uint64_t clipCount; +}; + +event TessPrimCount +{ + uint64_t primCount; +}; + +//REMOVE AND REPLACE +event TessPrimFlush +{ + uint32_t drawId; +}; + +event TessPrims +{ + uint32_t drawId; + uint64_t primCount; +}; \ No newline at end of file diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/archrast/gen_ar_event.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/archrast/gen_ar_event.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/archrast/gen_ar_event.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/archrast/gen_ar_event.cpp 2017-06-01 10:38:09.000000000 +0000 @@ -0,0 +1,264 @@ +/**************************************************************************** +* Copyright (C) 2016 Intel Corporation. All Rights Reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice (including the next +* paragraph) shall be included in all copies or substantial portions of the +* Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +* IN THE SOFTWARE. +* +* @file gen_ar_event.cpp +* +* @brief Implementation for events. auto-generated file +* +* DO NOT EDIT +* +******************************************************************************/ +#include "common/os.h" +#include "gen_ar_event.h" +#include "gen_ar_eventhandler.h" + +using namespace ArchRast; + +void Start::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void End::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void ThreadStartApiEvent::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void ThreadStartWorkerEvent::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void DrawInstancedEvent::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void DrawIndexedInstancedEvent::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void DispatchEvent::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void FrameEndEvent::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void FrontendStatsEvent::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void BackendStatsEvent::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void EarlyDepthStencilInfoSingleSample::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void EarlyDepthStencilInfoSampleRate::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void EarlyDepthStencilInfoNullPS::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void LateDepthStencilInfoSingleSample::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void LateDepthStencilInfoSampleRate::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void LateDepthStencilInfoNullPS::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void EarlyDepthInfoPixelRate::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void LateDepthInfoPixelRate::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void BackendDrawEndEvent::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void FrontendDrawEndEvent::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void EarlyZSingleSample::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void LateZSingleSample::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void EarlyStencilSingleSample::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void LateStencilSingleSample::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void EarlyZSampleRate::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void LateZSampleRate::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void EarlyStencilSampleRate::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void LateStencilSampleRate::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void EarlyZNullPS::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void EarlyStencilNullPS::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void EarlyZPixelRate::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void LateZPixelRate::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void EarlyOmZ::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void EarlyOmStencil::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void LateOmZ::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void LateOmStencil::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void GSPrimInfo::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void GSInputPrims::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void GSPrimsGen::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void GSVertsInput::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void ClipVertexCount::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void FlushVertClip::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void VertsClipped::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void TessPrimCount::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void TessPrimFlush::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} + +void TessPrims::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/archrast/gen_ar_event.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/archrast/gen_ar_event.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/archrast/gen_ar_event.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/archrast/gen_ar_event.h 2017-06-01 10:38:09.000000000 +0000 @@ -0,0 +1,1763 @@ +/**************************************************************************** +* Copyright (C) 2016 Intel Corporation. All Rights Reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice (including the next +* paragraph) shall be included in all copies or substantial portions of the +* Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +* IN THE SOFTWARE. +* +* @file gen_ar_event.h +* +* @brief Definitions for events. auto-generated file +* +* DO NOT EDIT +* +******************************************************************************/ +#pragma once + +#include "common/os.h" +#include "core/state.h" + +namespace ArchRast +{ + enum GroupType + { + APIClearRenderTarget, + APIDraw, + APIDrawWakeAllThreads, + APIDrawIndexed, + APIDispatch, + APIStoreTiles, + APIGetDrawContext, + APISync, + APIWaitForIdle, + FEProcessDraw, + FEProcessDrawIndexed, + FEFetchShader, + FEVertexShader, + FEHullShader, + FETessellation, + FEDomainShader, + FEGeometryShader, + FEStreamout, + FEPAAssemble, + FEBinPoints, + FEBinLines, + FEBinTriangles, + FETriangleSetup, + FEViewportCull, + FEGuardbandClip, + FEClipPoints, + FEClipLines, + FEClipTriangles, + FECullZeroAreaAndBackface, + FECullBetweenCenters, + FEProcessStoreTiles, + FEProcessInvalidateTiles, + WorkerWorkOnFifoBE, + WorkerFoundWork, + BELoadTiles, + BEDispatch, + BEClear, + BERasterizeLine, + BERasterizeTriangle, + BETriangleSetup, + BEStepSetup, + BECullZeroArea, + BEEmptyTriangle, + BETrivialAccept, + BETrivialReject, + BERasterizePartial, + BEPixelBackend, + BESetup, + BEBarycentric, + BEEarlyDepthTest, + BEPixelShader, + BESingleSampleBackend, + BEPixelRateBackend, + BESampleRateBackend, + BENullBackend, + BELateDepthTest, + BEOutputMerger, + BEStoreTiles, + BEEndTile, + WorkerWaitForThreadEvent, + }; + + //Forward decl + class EventHandler; + + ////////////////////////////////////////////////////////////////////////// + /// Event - interface for handling events. + ////////////////////////////////////////////////////////////////////////// + struct Event + { + Event() {} + virtual ~Event() {} + + virtual void Accept(EventHandler* pHandler) = 0; + }; + + ////////////////////////////////////////////////////////////////////////// + /// StartData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct StartData + { + // Fields + GroupType type; + uint32_t id; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// Start + ////////////////////////////////////////////////////////////////////////// + struct Start : Event + { + StartData data; + + // Constructor + Start( + GroupType type, + uint32_t id + ) + { + data.type = type; + data.id = id; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// EndData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct EndData + { + // Fields + GroupType type; + uint32_t count; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// End + ////////////////////////////////////////////////////////////////////////// + struct End : Event + { + EndData data; + + // Constructor + End( + GroupType type, + uint32_t count + ) + { + data.type = type; + data.count = count; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// ThreadStartApiEventData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct ThreadStartApiEventData + { + // Fields + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// ThreadStartApiEvent + ////////////////////////////////////////////////////////////////////////// + struct ThreadStartApiEvent : Event + { + ThreadStartApiEventData data; + + // Constructor + ThreadStartApiEvent( + ) + { + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// ThreadStartWorkerEventData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct ThreadStartWorkerEventData + { + // Fields + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// ThreadStartWorkerEvent + ////////////////////////////////////////////////////////////////////////// + struct ThreadStartWorkerEvent : Event + { + ThreadStartWorkerEventData data; + + // Constructor + ThreadStartWorkerEvent( + ) + { + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// DrawInstancedEventData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct DrawInstancedEventData + { + // Fields + uint32_t drawId; + uint32_t topology; + uint32_t numVertices; + int32_t startVertex; + uint32_t numInstances; + uint32_t startInstance; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// DrawInstancedEvent + ////////////////////////////////////////////////////////////////////////// + struct DrawInstancedEvent : Event + { + DrawInstancedEventData data; + + // Constructor + DrawInstancedEvent( + uint32_t drawId, + uint32_t topology, + uint32_t numVertices, + int32_t startVertex, + uint32_t numInstances, + uint32_t startInstance + ) + { + data.drawId = drawId; + data.topology = topology; + data.numVertices = numVertices; + data.startVertex = startVertex; + data.numInstances = numInstances; + data.startInstance = startInstance; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// DrawIndexedInstancedEventData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct DrawIndexedInstancedEventData + { + // Fields + uint32_t drawId; + uint32_t topology; + uint32_t numIndices; + int32_t indexOffset; + int32_t baseVertex; + uint32_t numInstances; + uint32_t startInstance; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// DrawIndexedInstancedEvent + ////////////////////////////////////////////////////////////////////////// + struct DrawIndexedInstancedEvent : Event + { + DrawIndexedInstancedEventData data; + + // Constructor + DrawIndexedInstancedEvent( + uint32_t drawId, + uint32_t topology, + uint32_t numIndices, + int32_t indexOffset, + int32_t baseVertex, + uint32_t numInstances, + uint32_t startInstance + ) + { + data.drawId = drawId; + data.topology = topology; + data.numIndices = numIndices; + data.indexOffset = indexOffset; + data.baseVertex = baseVertex; + data.numInstances = numInstances; + data.startInstance = startInstance; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// DispatchEventData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct DispatchEventData + { + // Fields + uint32_t drawId; + uint32_t threadGroupCountX; + uint32_t threadGroupCountY; + uint32_t threadGroupCountZ; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// DispatchEvent + ////////////////////////////////////////////////////////////////////////// + struct DispatchEvent : Event + { + DispatchEventData data; + + // Constructor + DispatchEvent( + uint32_t drawId, + uint32_t threadGroupCountX, + uint32_t threadGroupCountY, + uint32_t threadGroupCountZ + ) + { + data.drawId = drawId; + data.threadGroupCountX = threadGroupCountX; + data.threadGroupCountY = threadGroupCountY; + data.threadGroupCountZ = threadGroupCountZ; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// FrameEndEventData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct FrameEndEventData + { + // Fields + uint32_t frameId; + uint32_t nextDrawId; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// FrameEndEvent + ////////////////////////////////////////////////////////////////////////// + struct FrameEndEvent : Event + { + FrameEndEventData data; + + // Constructor + FrameEndEvent( + uint32_t frameId, + uint32_t nextDrawId + ) + { + data.frameId = frameId; + data.nextDrawId = nextDrawId; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// FrontendStatsEventData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct FrontendStatsEventData + { + // Fields + uint32_t drawId; + uint64_t IaVertices; + uint64_t IaPrimitives; + uint64_t VsInvocations; + uint64_t HsInvocations; + uint64_t DsInvocations; + uint64_t GsInvocations; + uint64_t GsPrimitives; + uint64_t CInvocations; + uint64_t CPrimitives; + uint64_t SoPrimStorageNeeded0; + uint64_t SoPrimStorageNeeded1; + uint64_t SoPrimStorageNeeded2; + uint64_t SoPrimStorageNeeded3; + uint64_t SoNumPrimsWritten0; + uint64_t SoNumPrimsWritten1; + uint64_t SoNumPrimsWritten2; + uint64_t SoNumPrimsWritten3; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// FrontendStatsEvent + ////////////////////////////////////////////////////////////////////////// + struct FrontendStatsEvent : Event + { + FrontendStatsEventData data; + + // Constructor + FrontendStatsEvent( + uint32_t drawId, + uint64_t IaVertices, + uint64_t IaPrimitives, + uint64_t VsInvocations, + uint64_t HsInvocations, + uint64_t DsInvocations, + uint64_t GsInvocations, + uint64_t GsPrimitives, + uint64_t CInvocations, + uint64_t CPrimitives, + uint64_t SoPrimStorageNeeded0, + uint64_t SoPrimStorageNeeded1, + uint64_t SoPrimStorageNeeded2, + uint64_t SoPrimStorageNeeded3, + uint64_t SoNumPrimsWritten0, + uint64_t SoNumPrimsWritten1, + uint64_t SoNumPrimsWritten2, + uint64_t SoNumPrimsWritten3 + ) + { + data.drawId = drawId; + data.IaVertices = IaVertices; + data.IaPrimitives = IaPrimitives; + data.VsInvocations = VsInvocations; + data.HsInvocations = HsInvocations; + data.DsInvocations = DsInvocations; + data.GsInvocations = GsInvocations; + data.GsPrimitives = GsPrimitives; + data.CInvocations = CInvocations; + data.CPrimitives = CPrimitives; + data.SoPrimStorageNeeded0 = SoPrimStorageNeeded0; + data.SoPrimStorageNeeded1 = SoPrimStorageNeeded1; + data.SoPrimStorageNeeded2 = SoPrimStorageNeeded2; + data.SoPrimStorageNeeded3 = SoPrimStorageNeeded3; + data.SoNumPrimsWritten0 = SoNumPrimsWritten0; + data.SoNumPrimsWritten1 = SoNumPrimsWritten1; + data.SoNumPrimsWritten2 = SoNumPrimsWritten2; + data.SoNumPrimsWritten3 = SoNumPrimsWritten3; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// BackendStatsEventData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct BackendStatsEventData + { + // Fields + uint32_t drawId; + uint64_t DepthPassCount; + uint64_t PsInvocations; + uint64_t CsInvocations; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// BackendStatsEvent + ////////////////////////////////////////////////////////////////////////// + struct BackendStatsEvent : Event + { + BackendStatsEventData data; + + // Constructor + BackendStatsEvent( + uint32_t drawId, + uint64_t DepthPassCount, + uint64_t PsInvocations, + uint64_t CsInvocations + ) + { + data.drawId = drawId; + data.DepthPassCount = DepthPassCount; + data.PsInvocations = PsInvocations; + data.CsInvocations = CsInvocations; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// EarlyDepthStencilInfoSingleSampleData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct EarlyDepthStencilInfoSingleSampleData + { + // Fields + uint64_t depthPassMask; + uint64_t stencilPassMask; + uint64_t coverageMask; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// EarlyDepthStencilInfoSingleSample + ////////////////////////////////////////////////////////////////////////// + struct EarlyDepthStencilInfoSingleSample : Event + { + EarlyDepthStencilInfoSingleSampleData data; + + // Constructor + EarlyDepthStencilInfoSingleSample( + uint64_t depthPassMask, + uint64_t stencilPassMask, + uint64_t coverageMask + ) + { + data.depthPassMask = depthPassMask; + data.stencilPassMask = stencilPassMask; + data.coverageMask = coverageMask; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// EarlyDepthStencilInfoSampleRateData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct EarlyDepthStencilInfoSampleRateData + { + // Fields + uint64_t depthPassMask; + uint64_t stencilPassMask; + uint64_t coverageMask; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// EarlyDepthStencilInfoSampleRate + ////////////////////////////////////////////////////////////////////////// + struct EarlyDepthStencilInfoSampleRate : Event + { + EarlyDepthStencilInfoSampleRateData data; + + // Constructor + EarlyDepthStencilInfoSampleRate( + uint64_t depthPassMask, + uint64_t stencilPassMask, + uint64_t coverageMask + ) + { + data.depthPassMask = depthPassMask; + data.stencilPassMask = stencilPassMask; + data.coverageMask = coverageMask; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// EarlyDepthStencilInfoNullPSData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct EarlyDepthStencilInfoNullPSData + { + // Fields + uint64_t depthPassMask; + uint64_t stencilPassMask; + uint64_t coverageMask; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// EarlyDepthStencilInfoNullPS + ////////////////////////////////////////////////////////////////////////// + struct EarlyDepthStencilInfoNullPS : Event + { + EarlyDepthStencilInfoNullPSData data; + + // Constructor + EarlyDepthStencilInfoNullPS( + uint64_t depthPassMask, + uint64_t stencilPassMask, + uint64_t coverageMask + ) + { + data.depthPassMask = depthPassMask; + data.stencilPassMask = stencilPassMask; + data.coverageMask = coverageMask; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// LateDepthStencilInfoSingleSampleData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct LateDepthStencilInfoSingleSampleData + { + // Fields + uint64_t depthPassMask; + uint64_t stencilPassMask; + uint64_t coverageMask; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// LateDepthStencilInfoSingleSample + ////////////////////////////////////////////////////////////////////////// + struct LateDepthStencilInfoSingleSample : Event + { + LateDepthStencilInfoSingleSampleData data; + + // Constructor + LateDepthStencilInfoSingleSample( + uint64_t depthPassMask, + uint64_t stencilPassMask, + uint64_t coverageMask + ) + { + data.depthPassMask = depthPassMask; + data.stencilPassMask = stencilPassMask; + data.coverageMask = coverageMask; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// LateDepthStencilInfoSampleRateData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct LateDepthStencilInfoSampleRateData + { + // Fields + uint64_t depthPassMask; + uint64_t stencilPassMask; + uint64_t coverageMask; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// LateDepthStencilInfoSampleRate + ////////////////////////////////////////////////////////////////////////// + struct LateDepthStencilInfoSampleRate : Event + { + LateDepthStencilInfoSampleRateData data; + + // Constructor + LateDepthStencilInfoSampleRate( + uint64_t depthPassMask, + uint64_t stencilPassMask, + uint64_t coverageMask + ) + { + data.depthPassMask = depthPassMask; + data.stencilPassMask = stencilPassMask; + data.coverageMask = coverageMask; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// LateDepthStencilInfoNullPSData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct LateDepthStencilInfoNullPSData + { + // Fields + uint64_t depthPassMask; + uint64_t stencilPassMask; + uint64_t coverageMask; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// LateDepthStencilInfoNullPS + ////////////////////////////////////////////////////////////////////////// + struct LateDepthStencilInfoNullPS : Event + { + LateDepthStencilInfoNullPSData data; + + // Constructor + LateDepthStencilInfoNullPS( + uint64_t depthPassMask, + uint64_t stencilPassMask, + uint64_t coverageMask + ) + { + data.depthPassMask = depthPassMask; + data.stencilPassMask = stencilPassMask; + data.coverageMask = coverageMask; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// EarlyDepthInfoPixelRateData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct EarlyDepthInfoPixelRateData + { + // Fields + uint64_t depthPassCount; + uint64_t activeLanes; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// EarlyDepthInfoPixelRate + ////////////////////////////////////////////////////////////////////////// + struct EarlyDepthInfoPixelRate : Event + { + EarlyDepthInfoPixelRateData data; + + // Constructor + EarlyDepthInfoPixelRate( + uint64_t depthPassCount, + uint64_t activeLanes + ) + { + data.depthPassCount = depthPassCount; + data.activeLanes = activeLanes; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// LateDepthInfoPixelRateData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct LateDepthInfoPixelRateData + { + // Fields + uint64_t depthPassCount; + uint64_t activeLanes; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// LateDepthInfoPixelRate + ////////////////////////////////////////////////////////////////////////// + struct LateDepthInfoPixelRate : Event + { + LateDepthInfoPixelRateData data; + + // Constructor + LateDepthInfoPixelRate( + uint64_t depthPassCount, + uint64_t activeLanes + ) + { + data.depthPassCount = depthPassCount; + data.activeLanes = activeLanes; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// BackendDrawEndEventData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct BackendDrawEndEventData + { + // Fields + uint32_t drawId; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// BackendDrawEndEvent + ////////////////////////////////////////////////////////////////////////// + struct BackendDrawEndEvent : Event + { + BackendDrawEndEventData data; + + // Constructor + BackendDrawEndEvent( + uint32_t drawId + ) + { + data.drawId = drawId; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// FrontendDrawEndEventData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct FrontendDrawEndEventData + { + // Fields + uint32_t drawId; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// FrontendDrawEndEvent + ////////////////////////////////////////////////////////////////////////// + struct FrontendDrawEndEvent : Event + { + FrontendDrawEndEventData data; + + // Constructor + FrontendDrawEndEvent( + uint32_t drawId + ) + { + data.drawId = drawId; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// EarlyZSingleSampleData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct EarlyZSingleSampleData + { + // Fields + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// EarlyZSingleSample + ////////////////////////////////////////////////////////////////////////// + struct EarlyZSingleSample : Event + { + EarlyZSingleSampleData data; + + // Constructor + EarlyZSingleSample( + uint32_t drawId, + uint64_t passCount, + uint64_t failCount, + uint64_t testCount + ) + { + data.drawId = drawId; + data.passCount = passCount; + data.failCount = failCount; + data.testCount = testCount; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// LateZSingleSampleData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct LateZSingleSampleData + { + // Fields + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// LateZSingleSample + ////////////////////////////////////////////////////////////////////////// + struct LateZSingleSample : Event + { + LateZSingleSampleData data; + + // Constructor + LateZSingleSample( + uint32_t drawId, + uint64_t passCount, + uint64_t failCount, + uint64_t testCount + ) + { + data.drawId = drawId; + data.passCount = passCount; + data.failCount = failCount; + data.testCount = testCount; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// EarlyStencilSingleSampleData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct EarlyStencilSingleSampleData + { + // Fields + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// EarlyStencilSingleSample + ////////////////////////////////////////////////////////////////////////// + struct EarlyStencilSingleSample : Event + { + EarlyStencilSingleSampleData data; + + // Constructor + EarlyStencilSingleSample( + uint32_t drawId, + uint64_t passCount, + uint64_t failCount, + uint64_t testCount + ) + { + data.drawId = drawId; + data.passCount = passCount; + data.failCount = failCount; + data.testCount = testCount; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// LateStencilSingleSampleData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct LateStencilSingleSampleData + { + // Fields + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// LateStencilSingleSample + ////////////////////////////////////////////////////////////////////////// + struct LateStencilSingleSample : Event + { + LateStencilSingleSampleData data; + + // Constructor + LateStencilSingleSample( + uint32_t drawId, + uint64_t passCount, + uint64_t failCount, + uint64_t testCount + ) + { + data.drawId = drawId; + data.passCount = passCount; + data.failCount = failCount; + data.testCount = testCount; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// EarlyZSampleRateData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct EarlyZSampleRateData + { + // Fields + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// EarlyZSampleRate + ////////////////////////////////////////////////////////////////////////// + struct EarlyZSampleRate : Event + { + EarlyZSampleRateData data; + + // Constructor + EarlyZSampleRate( + uint32_t drawId, + uint64_t passCount, + uint64_t failCount, + uint64_t testCount + ) + { + data.drawId = drawId; + data.passCount = passCount; + data.failCount = failCount; + data.testCount = testCount; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// LateZSampleRateData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct LateZSampleRateData + { + // Fields + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// LateZSampleRate + ////////////////////////////////////////////////////////////////////////// + struct LateZSampleRate : Event + { + LateZSampleRateData data; + + // Constructor + LateZSampleRate( + uint32_t drawId, + uint64_t passCount, + uint64_t failCount, + uint64_t testCount + ) + { + data.drawId = drawId; + data.passCount = passCount; + data.failCount = failCount; + data.testCount = testCount; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// EarlyStencilSampleRateData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct EarlyStencilSampleRateData + { + // Fields + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// EarlyStencilSampleRate + ////////////////////////////////////////////////////////////////////////// + struct EarlyStencilSampleRate : Event + { + EarlyStencilSampleRateData data; + + // Constructor + EarlyStencilSampleRate( + uint32_t drawId, + uint64_t passCount, + uint64_t failCount, + uint64_t testCount + ) + { + data.drawId = drawId; + data.passCount = passCount; + data.failCount = failCount; + data.testCount = testCount; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// LateStencilSampleRateData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct LateStencilSampleRateData + { + // Fields + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// LateStencilSampleRate + ////////////////////////////////////////////////////////////////////////// + struct LateStencilSampleRate : Event + { + LateStencilSampleRateData data; + + // Constructor + LateStencilSampleRate( + uint32_t drawId, + uint64_t passCount, + uint64_t failCount, + uint64_t testCount + ) + { + data.drawId = drawId; + data.passCount = passCount; + data.failCount = failCount; + data.testCount = testCount; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// EarlyZNullPSData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct EarlyZNullPSData + { + // Fields + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// EarlyZNullPS + ////////////////////////////////////////////////////////////////////////// + struct EarlyZNullPS : Event + { + EarlyZNullPSData data; + + // Constructor + EarlyZNullPS( + uint32_t drawId, + uint64_t passCount, + uint64_t failCount, + uint64_t testCount + ) + { + data.drawId = drawId; + data.passCount = passCount; + data.failCount = failCount; + data.testCount = testCount; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// EarlyStencilNullPSData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct EarlyStencilNullPSData + { + // Fields + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// EarlyStencilNullPS + ////////////////////////////////////////////////////////////////////////// + struct EarlyStencilNullPS : Event + { + EarlyStencilNullPSData data; + + // Constructor + EarlyStencilNullPS( + uint32_t drawId, + uint64_t passCount, + uint64_t failCount, + uint64_t testCount + ) + { + data.drawId = drawId; + data.passCount = passCount; + data.failCount = failCount; + data.testCount = testCount; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// EarlyZPixelRateData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct EarlyZPixelRateData + { + // Fields + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// EarlyZPixelRate + ////////////////////////////////////////////////////////////////////////// + struct EarlyZPixelRate : Event + { + EarlyZPixelRateData data; + + // Constructor + EarlyZPixelRate( + uint32_t drawId, + uint64_t passCount, + uint64_t failCount, + uint64_t testCount + ) + { + data.drawId = drawId; + data.passCount = passCount; + data.failCount = failCount; + data.testCount = testCount; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// LateZPixelRateData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct LateZPixelRateData + { + // Fields + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// LateZPixelRate + ////////////////////////////////////////////////////////////////////////// + struct LateZPixelRate : Event + { + LateZPixelRateData data; + + // Constructor + LateZPixelRate( + uint32_t drawId, + uint64_t passCount, + uint64_t failCount, + uint64_t testCount + ) + { + data.drawId = drawId; + data.passCount = passCount; + data.failCount = failCount; + data.testCount = testCount; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// EarlyOmZData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct EarlyOmZData + { + // Fields + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// EarlyOmZ + ////////////////////////////////////////////////////////////////////////// + struct EarlyOmZ : Event + { + EarlyOmZData data; + + // Constructor + EarlyOmZ( + uint32_t drawId, + uint64_t passCount, + uint64_t failCount, + uint64_t testCount + ) + { + data.drawId = drawId; + data.passCount = passCount; + data.failCount = failCount; + data.testCount = testCount; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// EarlyOmStencilData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct EarlyOmStencilData + { + // Fields + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// EarlyOmStencil + ////////////////////////////////////////////////////////////////////////// + struct EarlyOmStencil : Event + { + EarlyOmStencilData data; + + // Constructor + EarlyOmStencil( + uint32_t drawId, + uint64_t passCount, + uint64_t failCount, + uint64_t testCount + ) + { + data.drawId = drawId; + data.passCount = passCount; + data.failCount = failCount; + data.testCount = testCount; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// LateOmZData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct LateOmZData + { + // Fields + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// LateOmZ + ////////////////////////////////////////////////////////////////////////// + struct LateOmZ : Event + { + LateOmZData data; + + // Constructor + LateOmZ( + uint32_t drawId, + uint64_t passCount, + uint64_t failCount, + uint64_t testCount + ) + { + data.drawId = drawId; + data.passCount = passCount; + data.failCount = failCount; + data.testCount = testCount; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// LateOmStencilData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct LateOmStencilData + { + // Fields + uint32_t drawId; + uint64_t passCount; + uint64_t failCount; + uint64_t testCount; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// LateOmStencil + ////////////////////////////////////////////////////////////////////////// + struct LateOmStencil : Event + { + LateOmStencilData data; + + // Constructor + LateOmStencil( + uint32_t drawId, + uint64_t passCount, + uint64_t failCount, + uint64_t testCount + ) + { + data.drawId = drawId; + data.passCount = passCount; + data.failCount = failCount; + data.testCount = testCount; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// GSPrimInfoData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct GSPrimInfoData + { + // Fields + uint64_t inputPrimCount; + uint64_t primGeneratedCount; + uint64_t vertsInput; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// GSPrimInfo + ////////////////////////////////////////////////////////////////////////// + struct GSPrimInfo : Event + { + GSPrimInfoData data; + + // Constructor + GSPrimInfo( + uint64_t inputPrimCount, + uint64_t primGeneratedCount, + uint64_t vertsInput + ) + { + data.inputPrimCount = inputPrimCount; + data.primGeneratedCount = primGeneratedCount; + data.vertsInput = vertsInput; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// GSInputPrimsData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct GSInputPrimsData + { + // Fields + uint32_t drawId; + uint64_t inputPrimCount; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// GSInputPrims + ////////////////////////////////////////////////////////////////////////// + struct GSInputPrims : Event + { + GSInputPrimsData data; + + // Constructor + GSInputPrims( + uint32_t drawId, + uint64_t inputPrimCount + ) + { + data.drawId = drawId; + data.inputPrimCount = inputPrimCount; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// GSPrimsGenData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct GSPrimsGenData + { + // Fields + uint32_t drawId; + uint64_t primGeneratedCount; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// GSPrimsGen + ////////////////////////////////////////////////////////////////////////// + struct GSPrimsGen : Event + { + GSPrimsGenData data; + + // Constructor + GSPrimsGen( + uint32_t drawId, + uint64_t primGeneratedCount + ) + { + data.drawId = drawId; + data.primGeneratedCount = primGeneratedCount; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// GSVertsInputData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct GSVertsInputData + { + // Fields + uint32_t drawId; + uint64_t vertsInput; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// GSVertsInput + ////////////////////////////////////////////////////////////////////////// + struct GSVertsInput : Event + { + GSVertsInputData data; + + // Constructor + GSVertsInput( + uint32_t drawId, + uint64_t vertsInput + ) + { + data.drawId = drawId; + data.vertsInput = vertsInput; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// ClipVertexCountData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct ClipVertexCountData + { + // Fields + uint64_t vertsPerPrim; + uint64_t primMask; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// ClipVertexCount + ////////////////////////////////////////////////////////////////////////// + struct ClipVertexCount : Event + { + ClipVertexCountData data; + + // Constructor + ClipVertexCount( + uint64_t vertsPerPrim, + uint64_t primMask + ) + { + data.vertsPerPrim = vertsPerPrim; + data.primMask = primMask; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// FlushVertClipData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct FlushVertClipData + { + // Fields + uint32_t drawId; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// FlushVertClip + ////////////////////////////////////////////////////////////////////////// + struct FlushVertClip : Event + { + FlushVertClipData data; + + // Constructor + FlushVertClip( + uint32_t drawId + ) + { + data.drawId = drawId; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// VertsClippedData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct VertsClippedData + { + // Fields + uint32_t drawId; + uint64_t clipCount; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// VertsClipped + ////////////////////////////////////////////////////////////////////////// + struct VertsClipped : Event + { + VertsClippedData data; + + // Constructor + VertsClipped( + uint32_t drawId, + uint64_t clipCount + ) + { + data.drawId = drawId; + data.clipCount = clipCount; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// TessPrimCountData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct TessPrimCountData + { + // Fields + uint64_t primCount; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// TessPrimCount + ////////////////////////////////////////////////////////////////////////// + struct TessPrimCount : Event + { + TessPrimCountData data; + + // Constructor + TessPrimCount( + uint64_t primCount + ) + { + data.primCount = primCount; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// TessPrimFlushData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct TessPrimFlushData + { + // Fields + uint32_t drawId; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// TessPrimFlush + ////////////////////////////////////////////////////////////////////////// + struct TessPrimFlush : Event + { + TessPrimFlushData data; + + // Constructor + TessPrimFlush( + uint32_t drawId + ) + { + data.drawId = drawId; + } + + virtual void Accept(EventHandler* pHandler); + }; + + ////////////////////////////////////////////////////////////////////////// + /// TessPrimsData + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct TessPrimsData + { + // Fields + uint32_t drawId; + uint64_t primCount; + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// TessPrims + ////////////////////////////////////////////////////////////////////////// + struct TessPrims : Event + { + TessPrimsData data; + + // Constructor + TessPrims( + uint32_t drawId, + uint64_t primCount + ) + { + data.drawId = drawId; + data.primCount = primCount; + } + + virtual void Accept(EventHandler* pHandler); + }; +} diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/archrast/gen_ar_eventhandlerfile.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/archrast/gen_ar_eventhandlerfile.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/archrast/gen_ar_eventhandlerfile.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/archrast/gen_ar_eventhandlerfile.h 2017-06-01 10:38:09.000000000 +0000 @@ -0,0 +1,419 @@ +/**************************************************************************** +* Copyright (C) 2016 Intel Corporation. All Rights Reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice (including the next +* paragraph) shall be included in all copies or substantial portions of the +* Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +* IN THE SOFTWARE. +* +* @file gen_ar_eventhandlerfile.h +* +* @brief Event handler interface. auto-generated file +* +* DO NOT EDIT +* +******************************************************************************/ +#pragma once + +#include "common/os.h" +#include "gen_ar_eventhandler.h" +#include +#include + +namespace ArchRast +{ + ////////////////////////////////////////////////////////////////////////// + /// EventHandlerFile - interface for handling events. + ////////////////////////////////////////////////////////////////////////// + class EventHandlerFile : public EventHandler + { + public: + EventHandlerFile(uint32_t id) + : mBufOffset(0) + { +#if defined(_WIN32) + DWORD pid = GetCurrentProcessId(); + TCHAR procname[MAX_PATH]; + GetModuleFileName(NULL, procname, MAX_PATH); + const char* pBaseName = strrchr(procname, '\\'); + std::stringstream outDir; + outDir << KNOB_DEBUG_OUTPUT_DIR << pBaseName << "_" << pid << std::ends; + CreateDirectory(outDir.str().c_str(), NULL); + + char buf[255]; + // There could be multiple threads creating thread pools. We + // want to make sure they are uniquly identified by adding in + // the creator's thread id into the filename. + sprintf(buf, "%s\\ar_event%d_%d.bin", outDir.str().c_str(), GetCurrentThreadId(), id); + mFilename = std::string(buf); +#else + char buf[255]; + // There could be multiple threads creating thread pools. We + // want to make sure they are uniquly identified by adding in + // the creator's thread id into the filename. + sprintf(buf, "%s/ar_event%d_%d.bin", "/tmp", GetCurrentThreadId(), id); + mFilename = std::string(buf); +#endif + } + + virtual ~EventHandlerFile() + { + FlushBuffer(); + } + + ////////////////////////////////////////////////////////////////////////// + /// @brief Flush buffer to file. + bool FlushBuffer() + { + if (mBufOffset > 0) + { + if (mBufOffset == mHeaderBufOffset) + { + // Nothing to flush. Only header has been generated. + return false; + } + + std::ofstream file; + file.open(mFilename, std::ios::out | std::ios::app | std::ios::binary); + + if (!file.is_open()) + { + SWR_ASSERT(0, "ArchRast: Could not open event file!"); + return false; + } + + file.write((char*)mBuffer, mBufOffset); + file.close(); + + mBufOffset = 0; + mHeaderBufOffset = 0; // Reset header offset so its no longer considered. + } + return true; + } + + ////////////////////////////////////////////////////////////////////////// + /// @brief Write event and its payload to the memory buffer. + void Write(uint32_t eventId, const char* pBlock, uint32_t size) + { + if ((mBufOffset + size + sizeof(eventId)) > mBufferSize) + { + if (!FlushBuffer()) + { + // Don't corrupt what's already in the buffer? + /// @todo Maybe add corrupt marker to buffer here in case we can open file in future? + return; + } + } + + memcpy(&mBuffer[mBufOffset], (char*)&eventId, sizeof(eventId)); + mBufOffset += sizeof(eventId); + memcpy(&mBuffer[mBufOffset], pBlock, size); + mBufOffset += size; + } + + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle Start event + virtual void Handle(Start event) + { + Write(1, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle End event + virtual void Handle(End event) + { + Write(2, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle ThreadStartApiEvent event + virtual void Handle(ThreadStartApiEvent event) + { + Write(3, (char*)&event.data, 0); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle ThreadStartWorkerEvent event + virtual void Handle(ThreadStartWorkerEvent event) + { + Write(4, (char*)&event.data, 0); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle DrawInstancedEvent event + virtual void Handle(DrawInstancedEvent event) + { + Write(5, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle DrawIndexedInstancedEvent event + virtual void Handle(DrawIndexedInstancedEvent event) + { + Write(6, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle DispatchEvent event + virtual void Handle(DispatchEvent event) + { + Write(7, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle FrameEndEvent event + virtual void Handle(FrameEndEvent event) + { + Write(8, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle FrontendStatsEvent event + virtual void Handle(FrontendStatsEvent event) + { + Write(9, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle BackendStatsEvent event + virtual void Handle(BackendStatsEvent event) + { + Write(10, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle EarlyDepthStencilInfoSingleSample event + virtual void Handle(EarlyDepthStencilInfoSingleSample event) + { + Write(11, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle EarlyDepthStencilInfoSampleRate event + virtual void Handle(EarlyDepthStencilInfoSampleRate event) + { + Write(12, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle EarlyDepthStencilInfoNullPS event + virtual void Handle(EarlyDepthStencilInfoNullPS event) + { + Write(13, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle LateDepthStencilInfoSingleSample event + virtual void Handle(LateDepthStencilInfoSingleSample event) + { + Write(14, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle LateDepthStencilInfoSampleRate event + virtual void Handle(LateDepthStencilInfoSampleRate event) + { + Write(15, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle LateDepthStencilInfoNullPS event + virtual void Handle(LateDepthStencilInfoNullPS event) + { + Write(16, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle EarlyDepthInfoPixelRate event + virtual void Handle(EarlyDepthInfoPixelRate event) + { + Write(17, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle LateDepthInfoPixelRate event + virtual void Handle(LateDepthInfoPixelRate event) + { + Write(18, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle BackendDrawEndEvent event + virtual void Handle(BackendDrawEndEvent event) + { + Write(19, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle FrontendDrawEndEvent event + virtual void Handle(FrontendDrawEndEvent event) + { + Write(20, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle EarlyZSingleSample event + virtual void Handle(EarlyZSingleSample event) + { + Write(21, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle LateZSingleSample event + virtual void Handle(LateZSingleSample event) + { + Write(22, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle EarlyStencilSingleSample event + virtual void Handle(EarlyStencilSingleSample event) + { + Write(23, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle LateStencilSingleSample event + virtual void Handle(LateStencilSingleSample event) + { + Write(24, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle EarlyZSampleRate event + virtual void Handle(EarlyZSampleRate event) + { + Write(25, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle LateZSampleRate event + virtual void Handle(LateZSampleRate event) + { + Write(26, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle EarlyStencilSampleRate event + virtual void Handle(EarlyStencilSampleRate event) + { + Write(27, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle LateStencilSampleRate event + virtual void Handle(LateStencilSampleRate event) + { + Write(28, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle EarlyZNullPS event + virtual void Handle(EarlyZNullPS event) + { + Write(29, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle EarlyStencilNullPS event + virtual void Handle(EarlyStencilNullPS event) + { + Write(30, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle EarlyZPixelRate event + virtual void Handle(EarlyZPixelRate event) + { + Write(31, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle LateZPixelRate event + virtual void Handle(LateZPixelRate event) + { + Write(32, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle EarlyOmZ event + virtual void Handle(EarlyOmZ event) + { + Write(33, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle EarlyOmStencil event + virtual void Handle(EarlyOmStencil event) + { + Write(34, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle LateOmZ event + virtual void Handle(LateOmZ event) + { + Write(35, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle LateOmStencil event + virtual void Handle(LateOmStencil event) + { + Write(36, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle GSPrimInfo event + virtual void Handle(GSPrimInfo event) + { + Write(37, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle GSInputPrims event + virtual void Handle(GSInputPrims event) + { + Write(38, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle GSPrimsGen event + virtual void Handle(GSPrimsGen event) + { + Write(39, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle GSVertsInput event + virtual void Handle(GSVertsInput event) + { + Write(40, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle ClipVertexCount event + virtual void Handle(ClipVertexCount event) + { + Write(41, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle FlushVertClip event + virtual void Handle(FlushVertClip event) + { + Write(42, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle VertsClipped event + virtual void Handle(VertsClipped event) + { + Write(43, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle TessPrimCount event + virtual void Handle(TessPrimCount event) + { + Write(44, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle TessPrimFlush event + virtual void Handle(TessPrimFlush event) + { + Write(45, (char*)&event.data, sizeof(event.data)); + } + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle TessPrims event + virtual void Handle(TessPrims event) + { + Write(46, (char*)&event.data, sizeof(event.data)); + } + + ////////////////////////////////////////////////////////////////////////// + /// @brief Everything written to buffer this point is the header. + virtual void MarkHeader() + { + mHeaderBufOffset = mBufOffset; + } + + std::string mFilename; + + static const uint32_t mBufferSize = 1024; + uint8_t mBuffer[mBufferSize]; + uint32_t mBufOffset{0}; + uint32_t mHeaderBufOffset{0}; + }; +} diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/archrast/gen_ar_eventhandler.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/archrast/gen_ar_eventhandler.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/archrast/gen_ar_eventhandler.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/archrast/gen_ar_eventhandler.h 2017-06-01 10:38:09.000000000 +0000 @@ -0,0 +1,92 @@ +/**************************************************************************** +* Copyright (C) 2016 Intel Corporation. All Rights Reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice (including the next +* paragraph) shall be included in all copies or substantial portions of the +* Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +* IN THE SOFTWARE. +* +* @file gen_ar_eventhandler.h +* +* @brief Event handler interface. auto-generated file +* +* DO NOT EDIT +* +******************************************************************************/ +#pragma once + +#include "gen_ar_event.h" + +namespace ArchRast +{ + ////////////////////////////////////////////////////////////////////////// + /// EventHandler - interface for handling events. + ////////////////////////////////////////////////////////////////////////// + class EventHandler + { + public: + EventHandler() {} + virtual ~EventHandler() {} + + virtual void Handle(Start event) {} + virtual void Handle(End event) {} + virtual void Handle(ThreadStartApiEvent event) {} + virtual void Handle(ThreadStartWorkerEvent event) {} + virtual void Handle(DrawInstancedEvent event) {} + virtual void Handle(DrawIndexedInstancedEvent event) {} + virtual void Handle(DispatchEvent event) {} + virtual void Handle(FrameEndEvent event) {} + virtual void Handle(FrontendStatsEvent event) {} + virtual void Handle(BackendStatsEvent event) {} + virtual void Handle(EarlyDepthStencilInfoSingleSample event) {} + virtual void Handle(EarlyDepthStencilInfoSampleRate event) {} + virtual void Handle(EarlyDepthStencilInfoNullPS event) {} + virtual void Handle(LateDepthStencilInfoSingleSample event) {} + virtual void Handle(LateDepthStencilInfoSampleRate event) {} + virtual void Handle(LateDepthStencilInfoNullPS event) {} + virtual void Handle(EarlyDepthInfoPixelRate event) {} + virtual void Handle(LateDepthInfoPixelRate event) {} + virtual void Handle(BackendDrawEndEvent event) {} + virtual void Handle(FrontendDrawEndEvent event) {} + virtual void Handle(EarlyZSingleSample event) {} + virtual void Handle(LateZSingleSample event) {} + virtual void Handle(EarlyStencilSingleSample event) {} + virtual void Handle(LateStencilSingleSample event) {} + virtual void Handle(EarlyZSampleRate event) {} + virtual void Handle(LateZSampleRate event) {} + virtual void Handle(EarlyStencilSampleRate event) {} + virtual void Handle(LateStencilSampleRate event) {} + virtual void Handle(EarlyZNullPS event) {} + virtual void Handle(EarlyStencilNullPS event) {} + virtual void Handle(EarlyZPixelRate event) {} + virtual void Handle(LateZPixelRate event) {} + virtual void Handle(EarlyOmZ event) {} + virtual void Handle(EarlyOmStencil event) {} + virtual void Handle(LateOmZ event) {} + virtual void Handle(LateOmStencil event) {} + virtual void Handle(GSPrimInfo event) {} + virtual void Handle(GSInputPrims event) {} + virtual void Handle(GSPrimsGen event) {} + virtual void Handle(GSVertsInput event) {} + virtual void Handle(ClipVertexCount event) {} + virtual void Handle(FlushVertClip event) {} + virtual void Handle(VertsClipped event) {} + virtual void Handle(TessPrimCount event) {} + virtual void Handle(TessPrimFlush event) {} + virtual void Handle(TessPrims event) {} + }; +} diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/common/formats.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/common/formats.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/common/formats.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/common/formats.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -1,6 +1,5 @@ - /**************************************************************************** -* Copyright (C) 2014-2015 Intel Corporation. All Rights Reserved. +* Copyright (C) 2016 Intel Corporation. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -20,39 +19,56 @@ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. -* -* @file formats.cpp -* +* +* @file gen_formats.cpp +* * @brief auto-generated file -* +* * DO NOT EDIT -* +* ******************************************************************************/ #include "formats.h" // lookup table for unorm8 srgb -> float conversion const uint32_t srgb8Table[256] = { - 0x00000000, 0x399f22b4, 0x3a1f22b4, 0x3a6eb40f, 0x3a9f22b4, 0x3ac6eb61, 0x3aeeb40f, 0x3b0b3e5e, 0x3b1f22b4, 0x3b33070b, 0x3b46eb61, 0x3b5b518d, 0x3b70f18d, 0x3b83e1c6, 0x3b8fe616, 0x3b9c87fd, - 0x3ba9c9b5, 0x3bb7ad6f, 0x3bc63549, 0x3bd5635f, 0x3be539c1, 0x3bf5ba70, 0x3c0373b5, 0x3c0c6152, 0x3c15a703, 0x3c1f45be, 0x3c293e6b, 0x3c3391f7, 0x3c3e4149, 0x3c494d43, 0x3c54b6c7, 0x3c607eb1, - 0x3c6ca5dc, 0x3c792d22, 0x3c830aa8, 0x3c89af9f, 0x3c9085db, 0x3c978dc5, 0x3c9ec7c0, 0x3ca63431, 0x3cadd37d, 0x3cb5a601, 0x3cbdac20, 0x3cc5e639, 0x3cce54ab, 0x3cd6f7d3, 0x3cdfd00e, 0x3ce8ddb9, - 0x3cf22131, 0x3cfb9ac6, 0x3d02a56c, 0x3d0798df, 0x3d0ca7e7, 0x3d11d2b0, 0x3d171965, 0x3d1c7c31, 0x3d21fb3c, 0x3d2796b2, 0x3d2d4ebe, 0x3d332384, 0x3d39152e, 0x3d3f23e6, 0x3d454fd4, 0x3d4b991f, - 0x3d51ffef, 0x3d58846a, 0x3d5f26b7, 0x3d65e6fe, 0x3d6cc564, 0x3d73c20f, 0x3d7add25, 0x3d810b66, 0x3d84b795, 0x3d887330, 0x3d8c3e4a, 0x3d9018f6, 0x3d940345, 0x3d97fd4a, 0x3d9c0716, 0x3da020bb, - 0x3da44a4b, 0x3da883d7, 0x3daccd70, 0x3db12728, 0x3db59110, 0x3dba0b38, 0x3dbe95b5, 0x3dc33092, 0x3dc7dbe2, 0x3dcc97b6, 0x3dd1641f, 0x3dd6412c, 0x3ddb2eef, 0x3de02d77, 0x3de53cd5, 0x3dea5d19, - 0x3def8e55, 0x3df4d093, 0x3dfa23e8, 0x3dff8861, 0x3e027f07, 0x3e054282, 0x3e080ea5, 0x3e0ae379, 0x3e0dc107, 0x3e10a755, 0x3e13966c, 0x3e168e53, 0x3e198f11, 0x3e1c98ae, 0x3e1fab32, 0x3e22c6a3, - 0x3e25eb09, 0x3e29186c, 0x3e2c4ed2, 0x3e2f8e45, 0x3e32d6c8, 0x3e362865, 0x3e398322, 0x3e3ce706, 0x3e405419, 0x3e43ca62, 0x3e4749e8, 0x3e4ad2b1, 0x3e4e64c6, 0x3e52002b, 0x3e55a4e9, 0x3e595307, - 0x3e5d0a8b, 0x3e60cb7c, 0x3e6495e0, 0x3e6869bf, 0x3e6c4720, 0x3e702e08, 0x3e741e7f, 0x3e78188c, 0x3e7c1c38, 0x3e8014c2, 0x3e82203c, 0x3e84308d, 0x3e8645ba, 0x3e885fc5, 0x3e8a7eb2, 0x3e8ca283, - 0x3e8ecb3d, 0x3e90f8e1, 0x3e932b74, 0x3e9562f8, 0x3e979f71, 0x3e99e0e2, 0x3e9c274e, 0x3e9e72b7, 0x3ea0c322, 0x3ea31892, 0x3ea57308, 0x3ea7d289, 0x3eaa3718, 0x3eaca0b7, 0x3eaf0f69, 0x3eb18333, - 0x3eb3fc16, 0x3eb67a15, 0x3eb8fd34, 0x3ebb8576, 0x3ebe12e1, 0x3ec0a571, 0x3ec33d2d, 0x3ec5da17, 0x3ec87c33, 0x3ecb2383, 0x3ecdd00b, 0x3ed081cd, 0x3ed338cc, 0x3ed5f50b, 0x3ed8b68d, 0x3edb7d54, - 0x3ede4965, 0x3ee11ac1, 0x3ee3f16b, 0x3ee6cd67, 0x3ee9aeb6, 0x3eec955d, 0x3eef815d, 0x3ef272ba, 0x3ef56976, 0x3ef86594, 0x3efb6717, 0x3efe6e02, 0x3f00bd2b, 0x3f02460c, 0x3f03d1a5, 0x3f055ff8, - 0x3f06f106, 0x3f0884cf, 0x3f0a1b57, 0x3f0bb49d, 0x3f0d50a2, 0x3f0eef69, 0x3f1090f2, 0x3f123540, 0x3f13dc53, 0x3f15862d, 0x3f1732cf, 0x3f18e23b, 0x3f1a9471, 0x3f1c4973, 0x3f1e0143, 0x3f1fbbe1, - 0x3f217950, 0x3f23398f, 0x3f24fca2, 0x3f26c288, 0x3f288b43, 0x3f2a56d5, 0x3f2c253f, 0x3f2df681, 0x3f2fca9e, 0x3f31a197, 0x3f337b6c, 0x3f355820, 0x3f3737b3, 0x3f391a26, 0x3f3aff7e, 0x3f3ce7b7, - 0x3f3ed2d4, 0x3f40c0d6, 0x3f42b1c0, 0x3f44a592, 0x3f469c4d, 0x3f4895f3, 0x3f4a9284, 0x3f4c9203, 0x3f4e9470, 0x3f5099cd, 0x3f52a21a, 0x3f54ad59, 0x3f56bb8c, 0x3f58ccb3, 0x3f5ae0cf, 0x3f5cf7e2, - 0x3f5f11ee, 0x3f612ef2, 0x3f634eef, 0x3f6571ec, 0x3f6797e1, 0x3f69c0d8, 0x3f6beccb, 0x3f6e1bc2, 0x3f704db6, 0x3f7282b1, 0x3f74baae, 0x3f76f5b3, 0x3f7933b9, 0x3f7b74cb, 0x3f7db8e0, 0x3f800000, + 0x00000000, 0x399f22b4, 0x3a1f22b4, 0x3a6eb40f, 0x3a9f22b4, 0x3ac6eb61, 0x3aeeb40f, 0x3b0b3e5e, + 0x3b1f22b4, 0x3b33070b, 0x3b46eb61, 0x3b5b518d, 0x3b70f18d, 0x3b83e1c6, 0x3b8fe616, 0x3b9c87fd, + 0x3ba9c9b5, 0x3bb7ad6f, 0x3bc63549, 0x3bd5635f, 0x3be539c1, 0x3bf5ba70, 0x3c0373b5, 0x3c0c6152, + 0x3c15a703, 0x3c1f45be, 0x3c293e6b, 0x3c3391f7, 0x3c3e4149, 0x3c494d43, 0x3c54b6c7, 0x3c607eb1, + 0x3c6ca5dc, 0x3c792d22, 0x3c830aa8, 0x3c89af9f, 0x3c9085db, 0x3c978dc5, 0x3c9ec7c0, 0x3ca63431, + 0x3cadd37d, 0x3cb5a601, 0x3cbdac20, 0x3cc5e639, 0x3cce54ab, 0x3cd6f7d3, 0x3cdfd00e, 0x3ce8ddb9, + 0x3cf22131, 0x3cfb9ac6, 0x3d02a56c, 0x3d0798df, 0x3d0ca7e7, 0x3d11d2b0, 0x3d171965, 0x3d1c7c31, + 0x3d21fb3c, 0x3d2796b2, 0x3d2d4ebe, 0x3d332384, 0x3d39152e, 0x3d3f23e6, 0x3d454fd4, 0x3d4b991f, + 0x3d51ffef, 0x3d58846a, 0x3d5f26b7, 0x3d65e6fe, 0x3d6cc564, 0x3d73c20f, 0x3d7add25, 0x3d810b66, + 0x3d84b795, 0x3d887330, 0x3d8c3e4a, 0x3d9018f6, 0x3d940345, 0x3d97fd4a, 0x3d9c0716, 0x3da020bb, + 0x3da44a4b, 0x3da883d7, 0x3daccd70, 0x3db12728, 0x3db59110, 0x3dba0b38, 0x3dbe95b5, 0x3dc33092, + 0x3dc7dbe2, 0x3dcc97b6, 0x3dd1641f, 0x3dd6412c, 0x3ddb2eef, 0x3de02d77, 0x3de53cd5, 0x3dea5d19, + 0x3def8e55, 0x3df4d093, 0x3dfa23e8, 0x3dff8861, 0x3e027f07, 0x3e054282, 0x3e080ea5, 0x3e0ae379, + 0x3e0dc107, 0x3e10a755, 0x3e13966c, 0x3e168e53, 0x3e198f11, 0x3e1c98ae, 0x3e1fab32, 0x3e22c6a3, + 0x3e25eb09, 0x3e29186c, 0x3e2c4ed2, 0x3e2f8e45, 0x3e32d6c8, 0x3e362865, 0x3e398322, 0x3e3ce706, + 0x3e405419, 0x3e43ca62, 0x3e4749e8, 0x3e4ad2b1, 0x3e4e64c6, 0x3e52002b, 0x3e55a4e9, 0x3e595307, + 0x3e5d0a8b, 0x3e60cb7c, 0x3e6495e0, 0x3e6869bf, 0x3e6c4720, 0x3e702e08, 0x3e741e7f, 0x3e78188c, + 0x3e7c1c38, 0x3e8014c2, 0x3e82203c, 0x3e84308d, 0x3e8645ba, 0x3e885fc5, 0x3e8a7eb2, 0x3e8ca283, + 0x3e8ecb3d, 0x3e90f8e1, 0x3e932b74, 0x3e9562f8, 0x3e979f71, 0x3e99e0e2, 0x3e9c274e, 0x3e9e72b7, + 0x3ea0c322, 0x3ea31892, 0x3ea57308, 0x3ea7d289, 0x3eaa3718, 0x3eaca0b7, 0x3eaf0f69, 0x3eb18333, + 0x3eb3fc16, 0x3eb67a15, 0x3eb8fd34, 0x3ebb8576, 0x3ebe12e1, 0x3ec0a571, 0x3ec33d2d, 0x3ec5da17, + 0x3ec87c33, 0x3ecb2383, 0x3ecdd00b, 0x3ed081cd, 0x3ed338cc, 0x3ed5f50b, 0x3ed8b68d, 0x3edb7d54, + 0x3ede4965, 0x3ee11ac1, 0x3ee3f16b, 0x3ee6cd67, 0x3ee9aeb6, 0x3eec955d, 0x3eef815d, 0x3ef272ba, + 0x3ef56976, 0x3ef86594, 0x3efb6717, 0x3efe6e02, 0x3f00bd2b, 0x3f02460c, 0x3f03d1a5, 0x3f055ff8, + 0x3f06f106, 0x3f0884cf, 0x3f0a1b57, 0x3f0bb49d, 0x3f0d50a2, 0x3f0eef69, 0x3f1090f2, 0x3f123540, + 0x3f13dc53, 0x3f15862d, 0x3f1732cf, 0x3f18e23b, 0x3f1a9471, 0x3f1c4973, 0x3f1e0143, 0x3f1fbbe1, + 0x3f217950, 0x3f23398f, 0x3f24fca2, 0x3f26c288, 0x3f288b43, 0x3f2a56d5, 0x3f2c253f, 0x3f2df681, + 0x3f2fca9e, 0x3f31a197, 0x3f337b6c, 0x3f355820, 0x3f3737b3, 0x3f391a26, 0x3f3aff7e, 0x3f3ce7b7, + 0x3f3ed2d4, 0x3f40c0d6, 0x3f42b1c0, 0x3f44a592, 0x3f469c4d, 0x3f4895f3, 0x3f4a9284, 0x3f4c9203, + 0x3f4e9470, 0x3f5099cd, 0x3f52a21a, 0x3f54ad59, 0x3f56bb8c, 0x3f58ccb3, 0x3f5ae0cf, 0x3f5cf7e2, + 0x3f5f11ee, 0x3f612ef2, 0x3f634eef, 0x3f6571ec, 0x3f6797e1, 0x3f69c0d8, 0x3f6beccb, 0x3f6e1bc2, + 0x3f704db6, 0x3f7282b1, 0x3f74baae, 0x3f76f5b3, 0x3f7933b9, 0x3f7b74cb, 0x3f7db8e0, 0x3f800000, }; // order must match SWR_FORMAT const SWR_FORMAT_INFO gFormatInfo[] = { + // R32G32B32A32_FLOAT (0x0) { "R32G32B32A32_FLOAT", @@ -66,12 +82,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R32G32B32A32_SINT (0x1) { "R32G32B32A32_SINT", @@ -85,12 +102,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R32G32B32A32_UINT (0x2) { "R32G32B32A32_UINT", @@ -104,36 +122,53 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // 0x3 (Padding) + + // padding (0x3) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x4 (Padding) + 1, 1 + }, + // padding (0x4) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x5 (Padding) + 1, 1 + }, + // R64G64_FLOAT (0x5) { - "UNKNOWN", - { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, - { false, false, false, false }, - { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, + "R64G64_FLOAT", + { SWR_TYPE_FLOAT, SWR_TYPE_FLOAT, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0x3f800000 }, // Defaults for missing components + { 0, 1, 0, 0 }, // Swizzle + { 64, 64, 0, 0 }, // Bits per component + 128, // Bits per element + 16, // Bytes per element + 2, // Num components + false, // isSRGB + false, // isBC + false, // isSubsampled + false, // isLuminance + { false, false, false, false }, // Is normalized? + { 1.0f, 1.0f, 0, 0 }, // To float scale factor + 1, // bcWidth + 1, // bcHeight + }, + // R32G32B32X32_FLOAT (0x6) { "R32G32B32X32_FLOAT", @@ -147,12 +182,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R32G32B32A32_SSCALED (0x7) { "R32G32B32A32_SSCALED", @@ -166,12 +202,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R32G32B32A32_USCALED (0x8) { "R32G32B32A32_USCALED", @@ -185,452 +222,573 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // 0x9 (Padding) + + // padding (0x9) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xa (Padding) + 1, 1 + }, + // padding (0xA) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xb (Padding) + 1, 1 + }, + // padding (0xB) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xc (Padding) + 1, 1 + }, + // padding (0xC) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xd (Padding) + 1, 1 + }, + // padding (0xD) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xe (Padding) + 1, 1 + }, + // padding (0xE) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xf (Padding) + 1, 1 + }, + // padding (0xF) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x10 (Padding) + 1, 1 + }, + // padding (0x10) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x11 (Padding) + 1, 1 + }, + // padding (0x11) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x12 (Padding) + 1, 1 + }, + // padding (0x12) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x13 (Padding) + 1, 1 + }, + // padding (0x13) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x14 (Padding) + 1, 1 + }, + // padding (0x14) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x15 (Padding) + 1, 1 + }, + // padding (0x15) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x16 (Padding) + 1, 1 + }, + // padding (0x16) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x17 (Padding) + 1, 1 + }, + // padding (0x17) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x18 (Padding) + 1, 1 + }, + // padding (0x18) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x19 (Padding) + 1, 1 + }, + // padding (0x19) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x1a (Padding) + 1, 1 + }, + // padding (0x1A) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x1b (Padding) + 1, 1 + }, + // padding (0x1B) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x1c (Padding) + 1, 1 + }, + // padding (0x1C) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x1d (Padding) + 1, 1 + }, + // padding (0x1D) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x1e (Padding) + 1, 1 + }, + // padding (0x1E) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x1f (Padding) + 1, 1 + }, + // padding (0x1F) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x20 (Padding) + 1, 1 + }, + // R32G32B32A32_SFIXED (0x20) { - "UNKNOWN", - { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, - { false, false, false, false }, - { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x21 (Padding) + "R32G32B32A32_SFIXED", + { SWR_TYPE_SFIXED, SWR_TYPE_SFIXED, SWR_TYPE_SFIXED, SWR_TYPE_SFIXED }, + { 0, 0, 0, 0x3f800000 }, // Defaults for missing components + { 0, 1, 2, 3 }, // Swizzle + { 32, 32, 32, 32 }, // Bits per component + 128, // Bits per element + 16, // Bytes per element + 4, // Num components + false, // isSRGB + false, // isBC + false, // isSubsampled + false, // isLuminance + { false, false, false, false }, // Is normalized? + { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor + 1, // bcWidth + 1, // bcHeight + }, + + // padding (0x21) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x22 (Padding) + 1, 1 + }, + // padding (0x22) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x23 (Padding) + 1, 1 + }, + // padding (0x23) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x24 (Padding) + 1, 1 + }, + // padding (0x24) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x25 (Padding) + 1, 1 + }, + // padding (0x25) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x26 (Padding) + 1, 1 + }, + // padding (0x26) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x27 (Padding) + 1, 1 + }, + // padding (0x27) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x28 (Padding) + 1, 1 + }, + // padding (0x28) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x29 (Padding) + 1, 1 + }, + // padding (0x29) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x2a (Padding) + 1, 1 + }, + // padding (0x2A) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x2b (Padding) + 1, 1 + }, + // padding (0x2B) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x2c (Padding) + 1, 1 + }, + // padding (0x2C) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x2d (Padding) + 1, 1 + }, + // padding (0x2D) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x2e (Padding) + 1, 1 + }, + // padding (0x2E) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x2f (Padding) + 1, 1 + }, + // padding (0x2F) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x30 (Padding) + 1, 1 + }, + // padding (0x30) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x31 (Padding) + 1, 1 + }, + // padding (0x31) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x32 (Padding) + 1, 1 + }, + // padding (0x32) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x33 (Padding) + 1, 1 + }, + // padding (0x33) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x34 (Padding) + 1, 1 + }, + // padding (0x34) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x35 (Padding) + 1, 1 + }, + // padding (0x35) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x36 (Padding) + 1, 1 + }, + // padding (0x36) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x37 (Padding) + 1, 1 + }, + // padding (0x37) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x38 (Padding) + 1, 1 + }, + // padding (0x38) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x39 (Padding) + 1, 1 + }, + // padding (0x39) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x3a (Padding) + 1, 1 + }, + // padding (0x3A) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x3b (Padding) + 1, 1 + }, + // padding (0x3B) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x3c (Padding) + 1, 1 + }, + // padding (0x3C) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x3d (Padding) + 1, 1 + }, + // padding (0x3D) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x3e (Padding) + 1, 1 + }, + // padding (0x3E) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x3f (Padding) + 1, 1 + }, + // padding (0x3F) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, + 1, 1 + }, // R32G32B32_FLOAT (0x40) { "R32G32B32_FLOAT", @@ -644,12 +802,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R32G32B32_SINT (0x41) { "R32G32B32_SINT", @@ -663,12 +822,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R32G32B32_UINT (0x42) { "R32G32B32_UINT", @@ -682,28 +842,33 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // 0x43 (Padding) + + // padding (0x43) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x44 (Padding) + 1, 1 + }, + // padding (0x44) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, + 1, 1 + }, // R32G32B32_SSCALED (0x45) { "R32G32B32_SSCALED", @@ -717,12 +882,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R32G32B32_USCALED (0x46) { "R32G32B32_USCALED", @@ -736,468 +902,593 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // 0x47 (Padding) + + // padding (0x47) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x48 (Padding) + 1, 1 + }, + // padding (0x48) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x49 (Padding) + 1, 1 + }, + // padding (0x49) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x4a (Padding) + 1, 1 + }, + // padding (0x4A) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x4b (Padding) + 1, 1 + }, + // padding (0x4B) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x4c (Padding) + 1, 1 + }, + // padding (0x4C) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x4d (Padding) + 1, 1 + }, + // padding (0x4D) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x4e (Padding) + 1, 1 + }, + // padding (0x4E) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x4f (Padding) + 1, 1 + }, + // padding (0x4F) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x50 (Padding) + 1, 1 + }, + // R32G32B32_SFIXED (0x50) { - "UNKNOWN", - { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, - { false, false, false, false }, - { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x51 (Padding) + "R32G32B32_SFIXED", + { SWR_TYPE_SFIXED, SWR_TYPE_SFIXED, SWR_TYPE_SFIXED, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0x3f800000 }, // Defaults for missing components + { 0, 1, 2, 0 }, // Swizzle + { 32, 32, 32, 0 }, // Bits per component + 96, // Bits per element + 12, // Bytes per element + 3, // Num components + false, // isSRGB + false, // isBC + false, // isSubsampled + false, // isLuminance + { false, false, false, false }, // Is normalized? + { 1.0f, 1.0f, 1.0f, 0 }, // To float scale factor + 1, // bcWidth + 1, // bcHeight + }, + + // padding (0x51) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x52 (Padding) + 1, 1 + }, + // padding (0x52) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x53 (Padding) + 1, 1 + }, + // padding (0x53) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x54 (Padding) + 1, 1 + }, + // padding (0x54) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x55 (Padding) + 1, 1 + }, + // padding (0x55) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x56 (Padding) + 1, 1 + }, + // padding (0x56) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x57 (Padding) + 1, 1 + }, + // padding (0x57) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x58 (Padding) + 1, 1 + }, + // padding (0x58) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x59 (Padding) + 1, 1 + }, + // padding (0x59) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x5a (Padding) + 1, 1 + }, + // padding (0x5A) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x5b (Padding) + 1, 1 + }, + // padding (0x5B) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x5c (Padding) + 1, 1 + }, + // padding (0x5C) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x5d (Padding) + 1, 1 + }, + // padding (0x5D) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x5e (Padding) + 1, 1 + }, + // padding (0x5E) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x5f (Padding) + 1, 1 + }, + // padding (0x5F) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x60 (Padding) + 1, 1 + }, + // padding (0x60) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x61 (Padding) + 1, 1 + }, + // padding (0x61) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x62 (Padding) + 1, 1 + }, + // padding (0x62) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x63 (Padding) + 1, 1 + }, + // padding (0x63) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x64 (Padding) + 1, 1 + }, + // padding (0x64) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x65 (Padding) + 1, 1 + }, + // padding (0x65) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x66 (Padding) + 1, 1 + }, + // padding (0x66) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x67 (Padding) + 1, 1 + }, + // padding (0x67) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x68 (Padding) + 1, 1 + }, + // padding (0x68) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x69 (Padding) + 1, 1 + }, + // padding (0x69) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x6a (Padding) + 1, 1 + }, + // padding (0x6A) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x6b (Padding) + 1, 1 + }, + // padding (0x6B) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x6c (Padding) + 1, 1 + }, + // padding (0x6C) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x6d (Padding) + 1, 1 + }, + // padding (0x6D) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x6e (Padding) + 1, 1 + }, + // padding (0x6E) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x6f (Padding) + 1, 1 + }, + // padding (0x6F) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x70 (Padding) + 1, 1 + }, + // padding (0x70) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x71 (Padding) + 1, 1 + }, + // padding (0x71) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x72 (Padding) + 1, 1 + }, + // padding (0x72) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x73 (Padding) + 1, 1 + }, + // padding (0x73) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x74 (Padding) + 1, 1 + }, + // padding (0x74) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x75 (Padding) + 1, 1 + }, + // padding (0x75) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x76 (Padding) + 1, 1 + }, + // padding (0x76) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x77 (Padding) + 1, 1 + }, + // padding (0x77) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x78 (Padding) + 1, 1 + }, + // padding (0x78) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x79 (Padding) + 1, 1 + }, + // padding (0x79) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x7a (Padding) + 1, 1 + }, + // padding (0x7A) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x7b (Padding) + 1, 1 + }, + // padding (0x7B) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x7c (Padding) + 1, 1 + }, + // padding (0x7C) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x7d (Padding) + 1, 1 + }, + // padding (0x7D) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x7e (Padding) + 1, 1 + }, + // padding (0x7E) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x7f (Padding) + 1, 1 + }, + // padding (0x7F) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, + 1, 1 + }, // R16G16B16A16_UNORM (0x80) { "R16G16B16A16_UNORM", @@ -1211,12 +1502,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { true, true, true, true }, // Is normalized? { 1.0f / 65535.0f, 1.0f / 65535.0f, 1.0f / 65535.0f, 1.0f / 65535.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R16G16B16A16_SNORM (0x81) { "R16G16B16A16_SNORM", @@ -1230,12 +1522,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { true, true, true, true }, // Is normalized? { 1.0f / 32767.0f, 1.0f / 32767.0f, 1.0f / 32767.0f, 1.0f / 32767.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R16G16B16A16_SINT (0x82) { "R16G16B16A16_SINT", @@ -1249,12 +1542,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R16G16B16A16_UINT (0x83) { "R16G16B16A16_UINT", @@ -1268,12 +1562,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R16G16B16A16_FLOAT (0x84) { "R16G16B16A16_FLOAT", @@ -1287,12 +1582,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R32G32_FLOAT (0x85) { "R32G32_FLOAT", @@ -1306,12 +1602,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R32G32_SINT (0x86) { "R32G32_SINT", @@ -1325,12 +1622,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R32G32_UINT (0x87) { "R32G32_UINT", @@ -1344,18 +1642,19 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R32_FLOAT_X8X24_TYPELESS (0x88) { "R32_FLOAT_X8X24_TYPELESS", - { SWR_TYPE_FLOAT, SWR_TYPE_FLOAT, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { SWR_TYPE_FLOAT, SWR_TYPE_UNUSED, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, { 0, 0, 0, 0x3f800000 }, // Defaults for missing components - { 0, 1, 0, 0 }, // Swizzle + { 0, 1, 2, 3 }, // Swizzle { 32, 32, 0, 0 }, // Bits per component 64, // Bits per element 8, // Bytes per element @@ -1363,18 +1662,19 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // X32_TYPELESS_G8X24_UINT (0x89) { "X32_TYPELESS_G8X24_UINT", - { SWR_TYPE_UINT, SWR_TYPE_UINT, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { SWR_TYPE_UINT, SWR_TYPE_UNUSED, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, { 0, 0, 0, 0x1 }, // Defaults for missing components - { 0, 1, 0, 0 }, // Swizzle + { 0, 1, 2, 3 }, // Swizzle { 32, 32, 0, 0 }, // Bits per component 64, // Bits per element 8, // Bytes per element @@ -1382,13 +1682,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // L32A32_FLOAT (0x8a) + + // L32A32_FLOAT (0x8A) { "L32A32_FLOAT", { SWR_TYPE_FLOAT, SWR_TYPE_FLOAT, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -1401,39 +1702,56 @@ false, // isSRGB false, // isBC false, // isSubsampled + true, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - true, // isLuminance }, - // 0x8b (Padding) - { - "UNKNOWN", - { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, - { false, false, false, false }, - { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x8c (Padding) + + // padding (0x8B) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x8d (Padding) + 1, 1 + }, + // padding (0x8C) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // R16G16B16X16_UNORM (0x8e) + 1, 1 + }, + // R64_FLOAT (0x8D) { - "R16G16B16X16_UNORM", + "R64_FLOAT", + { SWR_TYPE_FLOAT, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0x3f800000 }, // Defaults for missing components + { 0, 0, 0, 0 }, // Swizzle + { 64, 0, 0, 0 }, // Bits per component + 64, // Bits per element + 8, // Bytes per element + 1, // Num components + false, // isSRGB + false, // isBC + false, // isSubsampled + false, // isLuminance + { false, false, false, false }, // Is normalized? + { 1.0f, 0, 0, 0 }, // To float scale factor + 1, // bcWidth + 1, // bcHeight + }, + + // R16G16B16X16_UNORM (0x8E) + { + "R16G16B16X16_UNORM", { SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNUSED }, { 0, 0, 0, 0x3f800000 }, // Defaults for missing components { 0, 1, 2, 3 }, // Swizzle @@ -1444,13 +1762,14 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? - { 1.0f / 65535.0f, 1.0f / 65535.0f, 1.0f / 65535.0f, 1.0f / 65535.0f }, // To float scale factor + false, // isLuminance + { true, true, true, false }, // Is normalized? + { 1.0f / 65535.0f, 1.0f / 65535.0f, 1.0f / 65535.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R16G16B16X16_FLOAT (0x8f) + + // R16G16B16X16_FLOAT (0x8F) { "R16G16B16X16_FLOAT", { SWR_TYPE_FLOAT, SWR_TYPE_FLOAT, SWR_TYPE_FLOAT, SWR_TYPE_UNUSED }, @@ -1463,20 +1782,23 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // 0x90 (Padding) + + // padding (0x90) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, + 1, 1 + }, // L32X32_FLOAT (0x91) { "L32X32_FLOAT", @@ -1490,12 +1812,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + true, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - true, // isLuminance }, + // I32X32_FLOAT (0x92) { "I32X32_FLOAT", @@ -1509,12 +1832,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + true, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - true, // isLuminance }, + // R16G16B16A16_SSCALED (0x93) { "R16G16B16A16_SSCALED", @@ -1528,12 +1852,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R16G16B16A16_USCALED (0x94) { "R16G16B16A16_USCALED", @@ -1547,12 +1872,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R32G32_SSCALED (0x95) { "R32G32_SSCALED", @@ -1566,12 +1892,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R32G32_USCALED (0x96) { "R32G32_USCALED", @@ -1585,352 +1912,434 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // 0x97 (Padding) + + // padding (0x97) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // R32_FLOAT_X8X24_TYPELESS_LD (0x98) - { - "R32_FLOAT_X8X24_TYPELESS_LD", - { SWR_TYPE_FLOAT, SWR_TYPE_FLOAT, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0x3f800000 }, // Defaults for missing components - { 0, 1, 0, 0 }, // Swizzle - { 32, 32, 0, 0 }, // Bits per component - 64, // Bits per element - 8, // Bytes per element - 2, // Num components - false, // isSRGB - false, // isBC - false, // isSubsampled - { false, false, false, false }, // Is normalized? - { 1.0f, 1.0f, 0, 0 }, // To float scale factor - 1, // bcWidth - 1, // bcHeight - false, // isLuminance + 1, 1 }, - // 0x99 (Padding) + // padding (0x98) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x9a (Padding) + 1, 1 + }, + // padding (0x99) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x9b (Padding) + 1, 1 + }, + // padding (0x9A) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x9c (Padding) + 1, 1 + }, + // padding (0x9B) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x9d (Padding) + 1, 1 + }, + // padding (0x9C) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x9e (Padding) + 1, 1 + }, + // padding (0x9D) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x9f (Padding) + 1, 1 + }, + // padding (0x9E) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xa0 (Padding) + 1, 1 + }, + // padding (0x9F) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xa1 (Padding) + 1, 1 + }, + // R32G32_SFIXED (0xA0) + { + "R32G32_SFIXED", + { SWR_TYPE_SFIXED, SWR_TYPE_SFIXED, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0x3f800000 }, // Defaults for missing components + { 0, 1, 0, 0 }, // Swizzle + { 32, 32, 0, 0 }, // Bits per component + 64, // Bits per element + 8, // Bytes per element + 2, // Num components + false, // isSRGB + false, // isBC + false, // isSubsampled + false, // isLuminance + { false, false, false, false }, // Is normalized? + { 1.0f, 1.0f, 0, 0 }, // To float scale factor + 1, // bcWidth + 1, // bcHeight + }, + + // padding (0xA1) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xa2 (Padding) + 1, 1 + }, + // padding (0xA2) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xa3 (Padding) + 1, 1 + }, + // padding (0xA3) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xa4 (Padding) + 1, 1 + }, + // padding (0xA4) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xa5 (Padding) + 1, 1 + }, + // padding (0xA5) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xa6 (Padding) + 1, 1 + }, + // padding (0xA6) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xa7 (Padding) + 1, 1 + }, + // padding (0xA7) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xa8 (Padding) + 1, 1 + }, + // padding (0xA8) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xa9 (Padding) + 1, 1 + }, + // padding (0xA9) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xaa (Padding) + 1, 1 + }, + // padding (0xAA) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xab (Padding) + 1, 1 + }, + // padding (0xAB) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xac (Padding) + 1, 1 + }, + // padding (0xAC) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xad (Padding) + 1, 1 + }, + // padding (0xAD) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xae (Padding) + 1, 1 + }, + // padding (0xAE) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xaf (Padding) + 1, 1 + }, + // padding (0xAF) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xb0 (Padding) + 1, 1 + }, + // padding (0xB0) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xb1 (Padding) + 1, 1 + }, + // padding (0xB1) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xb2 (Padding) + 1, 1 + }, + // padding (0xB2) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xb3 (Padding) + 1, 1 + }, + // padding (0xB3) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xb4 (Padding) + 1, 1 + }, + // padding (0xB4) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xb5 (Padding) + 1, 1 + }, + // padding (0xB5) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xb6 (Padding) + 1, 1 + }, + // padding (0xB6) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xb7 (Padding) + 1, 1 + }, + // padding (0xB7) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xb8 (Padding) + 1, 1 + }, + // padding (0xB8) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xb9 (Padding) + 1, 1 + }, + // padding (0xB9) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xba (Padding) + 1, 1 + }, + // padding (0xBA) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xbb (Padding) + 1, 1 + }, + // padding (0xBB) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xbc (Padding) + 1, 1 + }, + // padding (0xBC) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xbd (Padding) + 1, 1 + }, + // padding (0xBD) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xbe (Padding) + 1, 1 + }, + // padding (0xBE) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xbf (Padding) + 1, 1 + }, + // padding (0xBF) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // B8G8R8A8_UNORM (0xc0) + 1, 1 + }, + // B8G8R8A8_UNORM (0xC0) { "B8G8R8A8_UNORM", { SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM }, @@ -1943,13 +2352,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { true, true, true, true }, // Is normalized? { 1.0f / 255.0f, 1.0f / 255.0f, 1.0f / 255.0f, 1.0f / 255.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // B8G8R8A8_UNORM_SRGB (0xc1) + + // B8G8R8A8_UNORM_SRGB (0xC1) { "B8G8R8A8_UNORM_SRGB", { SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM }, @@ -1962,13 +2372,14 @@ true, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { true, true, true, true }, // Is normalized? { 1.0f / 255.0f, 1.0f / 255.0f, 1.0f / 255.0f, 1.0f / 255.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R10G10B10A2_UNORM (0xc2) + + // R10G10B10A2_UNORM (0xC2) { "R10G10B10A2_UNORM", { SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM }, @@ -1981,13 +2392,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { true, true, true, true }, // Is normalized? { 1.0f / 1023.0f, 1.0f / 1023.0f, 1.0f / 1023.0f, 1.0f / 3.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R10G10B10A2_UNORM_SRGB (0xc3) + + // R10G10B10A2_UNORM_SRGB (0xC3) { "R10G10B10A2_UNORM_SRGB", { SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM }, @@ -2000,13 +2412,14 @@ true, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { true, true, true, true }, // Is normalized? { 1.0f / 1023.0f, 1.0f / 1023.0f, 1.0f / 1023.0f, 1.0f / 3.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R10G10B10A2_UINT (0xc4) + + // R10G10B10A2_UINT (0xC4) { "R10G10B10A2_UINT", { SWR_TYPE_UINT, SWR_TYPE_UINT, SWR_TYPE_UINT, SWR_TYPE_UINT }, @@ -2019,29 +2432,34 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // 0xc5 (Padding) + + // padding (0xC5) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xc6 (Padding) + 1, 1 + }, + // padding (0xC6) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // R8G8B8A8_UNORM (0xc7) + 1, 1 + }, + // R8G8B8A8_UNORM (0xC7) { "R8G8B8A8_UNORM", { SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM }, @@ -2054,13 +2472,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { true, true, true, true }, // Is normalized? { 1.0f / 255.0f, 1.0f / 255.0f, 1.0f / 255.0f, 1.0f / 255.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R8G8B8A8_UNORM_SRGB (0xc8) + + // R8G8B8A8_UNORM_SRGB (0xC8) { "R8G8B8A8_UNORM_SRGB", { SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM }, @@ -2073,13 +2492,14 @@ true, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { true, true, true, true }, // Is normalized? { 1.0f / 255.0f, 1.0f / 255.0f, 1.0f / 255.0f, 1.0f / 255.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R8G8B8A8_SNORM (0xc9) + + // R8G8B8A8_SNORM (0xC9) { "R8G8B8A8_SNORM", { SWR_TYPE_SNORM, SWR_TYPE_SNORM, SWR_TYPE_SNORM, SWR_TYPE_SNORM }, @@ -2092,13 +2512,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { true, true, true, true }, // Is normalized? { 1.0f / 127.0f, 1.0f / 127.0f, 1.0f / 127.0f, 1.0f / 127.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R8G8B8A8_SINT (0xca) + + // R8G8B8A8_SINT (0xCA) { "R8G8B8A8_SINT", { SWR_TYPE_SINT, SWR_TYPE_SINT, SWR_TYPE_SINT, SWR_TYPE_SINT }, @@ -2111,13 +2532,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R8G8B8A8_UINT (0xcb) + + // R8G8B8A8_UINT (0xCB) { "R8G8B8A8_UINT", { SWR_TYPE_UINT, SWR_TYPE_UINT, SWR_TYPE_UINT, SWR_TYPE_UINT }, @@ -2130,13 +2552,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R16G16_UNORM (0xcc) + + // R16G16_UNORM (0xCC) { "R16G16_UNORM", { SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -2149,13 +2572,14 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, true, false, false }, // Is normalized? { 1.0f / 65535.0f, 1.0f / 65535.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R16G16_SNORM (0xcd) + + // R16G16_SNORM (0xCD) { "R16G16_SNORM", { SWR_TYPE_SNORM, SWR_TYPE_SNORM, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -2168,13 +2592,14 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, true, false, false }, // Is normalized? { 1.0f / 32767.0f, 1.0f / 32767.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R16G16_SINT (0xce) + + // R16G16_SINT (0xCE) { "R16G16_SINT", { SWR_TYPE_SINT, SWR_TYPE_SINT, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -2187,13 +2612,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R16G16_UINT (0xcf) + + // R16G16_UINT (0xCF) { "R16G16_UINT", { SWR_TYPE_UINT, SWR_TYPE_UINT, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -2206,13 +2632,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R16G16_FLOAT (0xd0) + + // R16G16_FLOAT (0xD0) { "R16G16_FLOAT", { SWR_TYPE_FLOAT, SWR_TYPE_FLOAT, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -2225,13 +2652,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // B10G10R10A2_UNORM (0xd1) + + // B10G10R10A2_UNORM (0xD1) { "B10G10R10A2_UNORM", { SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM }, @@ -2244,13 +2672,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { true, true, true, true }, // Is normalized? { 1.0f / 1023.0f, 1.0f / 1023.0f, 1.0f / 1023.0f, 1.0f / 3.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // B10G10R10A2_UNORM_SRGB (0xd2) + + // B10G10R10A2_UNORM_SRGB (0xD2) { "B10G10R10A2_UNORM_SRGB", { SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM }, @@ -2263,13 +2692,14 @@ true, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { true, true, true, true }, // Is normalized? { 1.0f / 1023.0f, 1.0f / 1023.0f, 1.0f / 1023.0f, 1.0f / 3.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R11G11B10_FLOAT (0xd3) + + // R11G11B10_FLOAT (0xD3) { "R11G11B10_FLOAT", { SWR_TYPE_FLOAT, SWR_TYPE_FLOAT, SWR_TYPE_FLOAT, SWR_TYPE_UNKNOWN }, @@ -2282,29 +2712,44 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // 0xd4 (Padding) + + // padding (0xD4) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xd5 (Padding) + 1, 1 + }, + // R10G10B10_FLOAT_A2_UNORM (0xD5) { - "UNKNOWN", - { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, - { false, false, false, false }, - { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // R32_SINT (0xd6) + "R10G10B10_FLOAT_A2_UNORM", + { SWR_TYPE_FLOAT, SWR_TYPE_FLOAT, SWR_TYPE_FLOAT, SWR_TYPE_FLOAT }, + { 0, 0, 0, 0x3f800000 }, // Defaults for missing components + { 0, 1, 2, 3 }, // Swizzle + { 10, 10, 10, 2 }, // Bits per component + 32, // Bits per element + 4, // Bytes per element + 4, // Num components + false, // isSRGB + false, // isBC + false, // isSubsampled + false, // isLuminance + { false, false, false, false }, // Is normalized? + { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor + 1, // bcWidth + 1, // bcHeight + }, + + // R32_SINT (0xD6) { "R32_SINT", { SWR_TYPE_SINT, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -2317,13 +2762,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R32_UINT (0xd7) + + // R32_UINT (0xD7) { "R32_UINT", { SWR_TYPE_UINT, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -2336,13 +2782,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R32_FLOAT (0xd8) + + // R32_FLOAT (0xD8) { "R32_FLOAT", { SWR_TYPE_FLOAT, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -2355,18 +2802,19 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R24_UNORM_X8_TYPELESS (0xd9) + + // R24_UNORM_X8_TYPELESS (0xD9) { "R24_UNORM_X8_TYPELESS", { SWR_TYPE_UNORM, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, { 0, 0, 0, 0x3f800000 }, // Defaults for missing components - { 0, 0, 0, 0 }, // Swizzle + { 0, 1, 2, 3 }, // Swizzle { 24, 0, 0, 0 }, // Bits per component 32, // Bits per element 4, // Bytes per element @@ -2374,13 +2822,14 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, false, false, false }, // Is normalized? { 1.0f / 16777215.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // X24_TYPELESS_G8_UINT (0xda) + + // X24_TYPELESS_G8_UINT (0xDA) { "X24_TYPELESS_G8_UINT", { SWR_TYPE_UINT, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -2393,40 +2842,34 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // 0xdb (Padding) + + // padding (0xDB) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // R24_UNORM_X8_TYPELESS_LD (0xdc) + 1, 1 + }, + // padding (0xDC) { - "R24_UNORM_X8_TYPELESS_LD", - { SWR_TYPE_UNORM, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0x3f800000 }, // Defaults for missing components - { 0, 0, 0, 0 }, // Swizzle - { 24, 0, 0, 0 }, // Bits per component - 32, // Bits per element - 4, // Bytes per element - 1, // Num components - false, // isSRGB - false, // isBC - false, // isSubsampled - { true, true, true, true }, // Is normalized? - { 1.0f / 16777215.0f, 0, 0, 0 }, // To float scale factor - 1, // bcWidth - 1, // bcHeight - false, // isLuminance + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 }, - // L32_UNORM (0xdd) + // L32_UNORM (0xDD) { "L32_UNORM", { SWR_TYPE_UNORM, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -2439,21 +2882,24 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + true, // isLuminance + { true, false, false, false }, // Is normalized? { 1.0f / 4294967295.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - true, // isLuminance }, - // 0xde (Padding) + + // padding (0xDE) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // L16A16_UNORM (0xdf) + 1, 1 + }, + // L16A16_UNORM (0xDF) { "L16A16_UNORM", { SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -2466,13 +2912,14 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + true, // isLuminance + { true, true, false, false }, // Is normalized? { 1.0f / 65535.0f, 1.0f / 65535.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - true, // isLuminance }, - // I24X8_UNORM (0xe0) + + // I24X8_UNORM (0xE0) { "I24X8_UNORM", { SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -2485,13 +2932,14 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + true, // isLuminance + { true, true, false, false }, // Is normalized? { 1.0f / 16777215.0f, 1.0f / 255.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - true, // isLuminance }, - // L24X8_UNORM (0xe1) + + // L24X8_UNORM (0xE1) { "L24X8_UNORM", { SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -2504,21 +2952,24 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + true, // isLuminance + { true, true, false, false }, // Is normalized? { 1.0f / 16777215.0f, 1.0f / 255.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - true, // isLuminance }, - // 0xe2 (Padding) + + // padding (0xE2) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // I32_FLOAT (0xe3) + 1, 1 + }, + // I32_FLOAT (0xE3) { "I32_FLOAT", { SWR_TYPE_FLOAT, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -2531,13 +2982,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + true, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - true, // isLuminance }, - // L32_FLOAT (0xe4) + + // L32_FLOAT (0xE4) { "L32_FLOAT", { SWR_TYPE_FLOAT, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -2550,13 +3002,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + true, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - true, // isLuminance }, - // A32_FLOAT (0xe5) + + // A32_FLOAT (0xE5) { "A32_FLOAT", { SWR_TYPE_FLOAT, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -2569,37 +3022,44 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // 0xe6 (Padding) + + // padding (0xE6) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xe7 (Padding) + 1, 1 + }, + // padding (0xE7) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xe8 (Padding) + 1, 1 + }, + // padding (0xE8) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // B8G8R8X8_UNORM (0xe9) + 1, 1 + }, + // B8G8R8X8_UNORM (0xE9) { "B8G8R8X8_UNORM", { SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNUSED }, @@ -2612,13 +3072,14 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? - { 1.0f / 255.0f, 1.0f / 255.0f, 1.0f / 255.0f, 1.0f / 255.0f }, // To float scale factor + false, // isLuminance + { true, true, true, false }, // Is normalized? + { 1.0f / 255.0f, 1.0f / 255.0f, 1.0f / 255.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // B8G8R8X8_UNORM_SRGB (0xea) + + // B8G8R8X8_UNORM_SRGB (0xEA) { "B8G8R8X8_UNORM_SRGB", { SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNUSED }, @@ -2631,13 +3092,14 @@ true, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? - { 1.0f / 255.0f, 1.0f / 255.0f, 1.0f / 255.0f, 1.0f / 255.0f }, // To float scale factor + false, // isLuminance + { true, true, true, false }, // Is normalized? + { 1.0f / 255.0f, 1.0f / 255.0f, 1.0f / 255.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R8G8B8X8_UNORM (0xeb) + + // R8G8B8X8_UNORM (0xEB) { "R8G8B8X8_UNORM", { SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNUSED }, @@ -2650,13 +3112,14 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? - { 1.0f / 255.0f, 1.0f / 255.0f, 1.0f / 255.0f, 1.0f / 255.0f }, // To float scale factor + false, // isLuminance + { true, true, true, false }, // Is normalized? + { 1.0f / 255.0f, 1.0f / 255.0f, 1.0f / 255.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R8G8B8X8_UNORM_SRGB (0xec) + + // R8G8B8X8_UNORM_SRGB (0xEC) { "R8G8B8X8_UNORM_SRGB", { SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNUSED }, @@ -2669,13 +3132,14 @@ true, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? - { 1.0f / 255.0f, 1.0f / 255.0f, 1.0f / 255.0f, 1.0f / 255.0f }, // To float scale factor + false, // isLuminance + { true, true, true, false }, // Is normalized? + { 1.0f / 255.0f, 1.0f / 255.0f, 1.0f / 255.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R9G9B9E5_SHAREDEXP (0xed) + + // R9G9B9E5_SHAREDEXP (0xED) { "R9G9B9E5_SHAREDEXP", { SWR_TYPE_UINT, SWR_TYPE_UINT, SWR_TYPE_UINT, SWR_TYPE_UINT }, @@ -2688,13 +3152,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // B10G10R10X2_UNORM (0xee) + + // B10G10R10X2_UNORM (0xEE) { "B10G10R10X2_UNORM", { SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNUSED }, @@ -2707,21 +3172,24 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? - { 1.0f / 1023.0f, 1.0f / 1023.0f, 1.0f / 1023.0f, 1.0f / 3.0f }, // To float scale factor + false, // isLuminance + { true, true, true, false }, // Is normalized? + { 1.0f / 1023.0f, 1.0f / 1023.0f, 1.0f / 1023.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // 0xef (Padding) + + // padding (0xEF) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // L16A16_FLOAT (0xf0) + 1, 1 + }, + // L16A16_FLOAT (0xF0) { "L16A16_FLOAT", { SWR_TYPE_FLOAT, SWR_TYPE_FLOAT, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -2734,29 +3202,34 @@ false, // isSRGB false, // isBC false, // isSubsampled + true, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - true, // isLuminance }, - // 0xf1 (Padding) + + // padding (0xF1) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xf2 (Padding) + 1, 1 + }, + // padding (0xF2) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // R10G10B10X2_USCALED (0xf3) + 1, 1 + }, + // R10G10B10X2_USCALED (0xF3) { "R10G10B10X2_USCALED", { SWR_TYPE_USCALED, SWR_TYPE_USCALED, SWR_TYPE_USCALED, SWR_TYPE_UNUSED }, @@ -2769,13 +3242,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R8G8B8A8_SSCALED (0xf4) + + // R8G8B8A8_SSCALED (0xF4) { "R8G8B8A8_SSCALED", { SWR_TYPE_SSCALED, SWR_TYPE_SSCALED, SWR_TYPE_SSCALED, SWR_TYPE_SSCALED }, @@ -2788,13 +3262,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R8G8B8A8_USCALED (0xf5) + + // R8G8B8A8_USCALED (0xF5) { "R8G8B8A8_USCALED", { SWR_TYPE_USCALED, SWR_TYPE_USCALED, SWR_TYPE_USCALED, SWR_TYPE_USCALED }, @@ -2807,13 +3282,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R16G16_SSCALED (0xf6) + + // R16G16_SSCALED (0xF6) { "R16G16_SSCALED", { SWR_TYPE_SSCALED, SWR_TYPE_SSCALED, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -2826,13 +3302,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R16G16_USCALED (0xf7) + + // R16G16_USCALED (0xF7) { "R16G16_USCALED", { SWR_TYPE_USCALED, SWR_TYPE_USCALED, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -2845,13 +3322,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R32_SSCALED (0xf8) + + // R32_SSCALED (0xF8) { "R32_SSCALED", { SWR_TYPE_SSCALED, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -2864,13 +3342,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R32_USCALED (0xf9) + + // R32_USCALED (0xF9) { "R32_USCALED", { SWR_TYPE_USCALED, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -2883,60 +3362,73 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // 0xfa (Padding) + + // padding (0xFA) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xfb (Padding) + 1, 1 + }, + // padding (0xFB) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xfc (Padding) + 1, 1 + }, + // padding (0xFC) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xfd (Padding) + 1, 1 + }, + // padding (0xFD) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xfe (Padding) + 1, 1 + }, + // padding (0xFE) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0xff (Padding) + 1, 1 + }, + // padding (0xFF) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, + 1, 1 + }, // B5G6R5_UNORM (0x100) { "B5G6R5_UNORM", @@ -2950,12 +3442,13 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, true, true, false }, // Is normalized? { 1.0f / 31.0f, 1.0f / 63.0f, 1.0f / 31.0f, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // B5G6R5_UNORM_SRGB (0x101) { "B5G6R5_UNORM_SRGB", @@ -2969,12 +3462,13 @@ true, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, true, true, false }, // Is normalized? { 1.0f / 31.0f, 1.0f / 63.0f, 1.0f / 31.0f, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // B5G5R5A1_UNORM (0x102) { "B5G5R5A1_UNORM", @@ -2988,12 +3482,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { true, true, true, true }, // Is normalized? { 1.0f / 31.0f, 1.0f / 31.0f, 1.0f / 31.0f, 1.0f / 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // B5G5R5A1_UNORM_SRGB (0x103) { "B5G5R5A1_UNORM_SRGB", @@ -3007,12 +3502,13 @@ true, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { true, true, true, true }, // Is normalized? { 1.0f / 31.0f, 1.0f / 31.0f, 1.0f / 31.0f, 1.0f / 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // B4G4R4A4_UNORM (0x104) { "B4G4R4A4_UNORM", @@ -3026,12 +3522,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { true, true, true, true }, // Is normalized? { 1.0f / 15.0f, 1.0f / 15.0f, 1.0f / 15.0f, 1.0f / 15.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // B4G4R4A4_UNORM_SRGB (0x105) { "B4G4R4A4_UNORM_SRGB", @@ -3045,12 +3542,13 @@ true, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { true, true, true, true }, // Is normalized? { 1.0f / 15.0f, 1.0f / 15.0f, 1.0f / 15.0f, 1.0f / 15.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R8G8_UNORM (0x106) { "R8G8_UNORM", @@ -3064,12 +3562,13 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, true, false, false }, // Is normalized? { 1.0f / 255.0f, 1.0f / 255.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R8G8_SNORM (0x107) { "R8G8_SNORM", @@ -3083,12 +3582,13 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, true, false, false }, // Is normalized? { 1.0f / 127.0f, 1.0f / 127.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R8G8_SINT (0x108) { "R8G8_SINT", @@ -3102,12 +3602,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R8G8_UINT (0x109) { "R8G8_UINT", @@ -3121,13 +3622,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R16_UNORM (0x10a) + + // R16_UNORM (0x10A) { "R16_UNORM", { SWR_TYPE_UNORM, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -3140,13 +3642,14 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, false, false, false }, // Is normalized? { 1.0f / 65535.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R16_SNORM (0x10b) + + // R16_SNORM (0x10B) { "R16_SNORM", { SWR_TYPE_SNORM, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -3159,13 +3662,14 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, false, false, false }, // Is normalized? { 1.0f / 32767.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R16_SINT (0x10c) + + // R16_SINT (0x10C) { "R16_SINT", { SWR_TYPE_SINT, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -3178,13 +3682,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R16_UINT (0x10d) + + // R16_UINT (0x10D) { "R16_UINT", { SWR_TYPE_UINT, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -3197,13 +3702,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R16_FLOAT (0x10e) + + // R16_FLOAT (0x10E) { "R16_FLOAT", { SWR_TYPE_FLOAT, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -3216,28 +3722,33 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // 0x10f (Padding) + + // padding (0x10F) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x110 (Padding) + 1, 1 + }, + // padding (0x110) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, + 1, 1 + }, // I16_UNORM (0x111) { "I16_UNORM", @@ -3251,12 +3762,13 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + true, // isLuminance + { true, false, false, false }, // Is normalized? { 1.0f / 65535.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - true, // isLuminance }, + // L16_UNORM (0x112) { "L16_UNORM", @@ -3270,12 +3782,13 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + true, // isLuminance + { true, false, false, false }, // Is normalized? { 1.0f / 65535.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - true, // isLuminance }, + // A16_UNORM (0x113) { "A16_UNORM", @@ -3289,12 +3802,13 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, false, false, false }, // Is normalized? { 1.0f / 65535.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // L8A8_UNORM (0x114) { "L8A8_UNORM", @@ -3308,12 +3822,13 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + true, // isLuminance + { true, true, false, false }, // Is normalized? { 1.0f / 255.0f, 1.0f / 255.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - true, // isLuminance }, + // I16_FLOAT (0x115) { "I16_FLOAT", @@ -3327,12 +3842,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + true, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - true, // isLuminance }, + // L16_FLOAT (0x116) { "L16_FLOAT", @@ -3346,12 +3862,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + true, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - true, // isLuminance }, + // A16_FLOAT (0x117) { "A16_FLOAT", @@ -3365,12 +3882,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // L8A8_UNORM_SRGB (0x118) { "L8A8_UNORM_SRGB", @@ -3384,21 +3902,24 @@ true, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + true, // isLuminance + { true, true, false, false }, // Is normalized? { 1.0f / 255.0f, 1.0f / 255.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - true, // isLuminance }, - // 0x119 (Padding) + + // padding (0x119) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // B5G5R5X1_UNORM (0x11a) + 1, 1 + }, + // B5G5R5X1_UNORM (0x11A) { "B5G5R5X1_UNORM", { SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNUSED }, @@ -3411,13 +3932,14 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? - { 1.0f / 31.0f, 1.0f / 31.0f, 1.0f / 31.0f, 1.0f / 1.0f }, // To float scale factor + false, // isLuminance + { true, true, true, false }, // Is normalized? + { 1.0f / 31.0f, 1.0f / 31.0f, 1.0f / 31.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // B5G5R5X1_UNORM_SRGB (0x11b) + + // B5G5R5X1_UNORM_SRGB (0x11B) { "B5G5R5X1_UNORM_SRGB", { SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNUSED }, @@ -3430,13 +3952,14 @@ true, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? - { 1.0f / 31.0f, 1.0f / 31.0f, 1.0f / 31.0f, 1.0f / 1.0f }, // To float scale factor + false, // isLuminance + { true, true, true, false }, // Is normalized? + { 1.0f / 31.0f, 1.0f / 31.0f, 1.0f / 31.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R8G8_SSCALED (0x11c) + + // R8G8_SSCALED (0x11C) { "R8G8_SSCALED", { SWR_TYPE_SSCALED, SWR_TYPE_SSCALED, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -3449,13 +3972,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R8G8_USCALED (0x11d) + + // R8G8_USCALED (0x11D) { "R8G8_USCALED", { SWR_TYPE_USCALED, SWR_TYPE_USCALED, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -3468,13 +3992,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R16_SSCALED (0x11e) + + // R16_SSCALED (0x11E) { "R16_SSCALED", { SWR_TYPE_SSCALED, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -3487,13 +4012,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R16_USCALED (0x11f) + + // R16_USCALED (0x11F) { "R16_USCALED", { SWR_TYPE_USCALED, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -3506,60 +4032,93 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // 0x120 (Padding) + + // padding (0x120) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x121 (Padding) + 1, 1 + }, + // padding (0x121) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x122 (Padding) + 1, 1 + }, + // padding (0x122) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x123 (Padding) + 1, 1 + }, + // padding (0x123) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x124 (Padding) + 1, 1 + }, + // A1B5G5R5_UNORM (0x124) { - "UNKNOWN", - { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, - { false, false, false, false }, - { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x125 (Padding) + "A1B5G5R5_UNORM", + { SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM }, + { 0, 0, 0, 0x3f800000 }, // Defaults for missing components + { 3, 2, 1, 0 }, // Swizzle + { 1, 5, 5, 5 }, // Bits per component + 16, // Bits per element + 2, // Bytes per element + 4, // Num components + false, // isSRGB + false, // isBC + false, // isSubsampled + false, // isLuminance + { true, true, true, true }, // Is normalized? + { 1.0f / 1.0f, 1.0f / 31.0f, 1.0f / 31.0f, 1.0f / 31.0f }, // To float scale factor + 1, // bcWidth + 1, // bcHeight + }, + + // A4B4G4R4_UNORM (0x125) { - "UNKNOWN", - { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, - { false, false, false, false }, - { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, + "A4B4G4R4_UNORM", + { SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM }, + { 0, 0, 0, 0x3f800000 }, // Defaults for missing components + { 3, 2, 1, 0 }, // Swizzle + { 4, 4, 4, 4 }, // Bits per component + 16, // Bits per element + 2, // Bytes per element + 4, // Num components + false, // isSRGB + false, // isBC + false, // isSubsampled + false, // isLuminance + { true, true, true, true }, // Is normalized? + { 1.0f / 15.0f, 1.0f / 15.0f, 1.0f / 15.0f, 1.0f / 15.0f }, // To float scale factor + 1, // bcWidth + 1, // bcHeight + }, + // L8A8_UINT (0x126) { "L8A8_UINT", @@ -3573,12 +4132,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + true, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - true, // isLuminance }, + // L8A8_SINT (0x127) { "L8A8_SINT", @@ -3592,204 +4152,253 @@ false, // isSRGB false, // isBC false, // isSubsampled + true, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - true, // isLuminance }, - // 0x128 (Padding) + + // padding (0x128) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x129 (Padding) + 1, 1 + }, + // padding (0x129) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x12a (Padding) + 1, 1 + }, + // padding (0x12A) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x12b (Padding) + 1, 1 + }, + // padding (0x12B) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x12c (Padding) + 1, 1 + }, + // padding (0x12C) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x12d (Padding) + 1, 1 + }, + // padding (0x12D) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x12e (Padding) + 1, 1 + }, + // padding (0x12E) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x12f (Padding) + 1, 1 + }, + // padding (0x12F) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x130 (Padding) + 1, 1 + }, + // padding (0x130) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x131 (Padding) + 1, 1 + }, + // padding (0x131) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x132 (Padding) + 1, 1 + }, + // padding (0x132) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x133 (Padding) + 1, 1 + }, + // padding (0x133) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x134 (Padding) + 1, 1 + }, + // padding (0x134) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x135 (Padding) + 1, 1 + }, + // padding (0x135) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x136 (Padding) + 1, 1 + }, + // padding (0x136) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x137 (Padding) + 1, 1 + }, + // padding (0x137) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x138 (Padding) + 1, 1 + }, + // padding (0x138) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x139 (Padding) + 1, 1 + }, + // padding (0x139) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x13a (Padding) + 1, 1 + }, + // padding (0x13A) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x13b (Padding) + 1, 1 + }, + // padding (0x13B) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x13c (Padding) + 1, 1 + }, + // padding (0x13C) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x13d (Padding) + 1, 1 + }, + // padding (0x13D) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x13e (Padding) + 1, 1 + }, + // padding (0x13E) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x13f (Padding) + 1, 1 + }, + // padding (0x13F) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, + 1, 1 + }, // R8_UNORM (0x140) { "R8_UNORM", @@ -3803,12 +4412,13 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, false, false, false }, // Is normalized? { 1.0f / 255.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R8_SNORM (0x141) { "R8_SNORM", @@ -3822,12 +4432,13 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, false, false, false }, // Is normalized? { 1.0f / 127.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R8_SINT (0x142) { "R8_SINT", @@ -3841,12 +4452,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R8_UINT (0x143) { "R8_UINT", @@ -3860,12 +4472,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // A8_UNORM (0x144) { "A8_UNORM", @@ -3879,12 +4492,13 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, false, false, false }, // Is normalized? { 1.0f / 255.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // I8_UNORM (0x145) { "I8_UNORM", @@ -3898,12 +4512,13 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + true, // isLuminance + { true, false, false, false }, // Is normalized? { 1.0f / 255.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - true, // isLuminance }, + // L8_UNORM (0x146) { "L8_UNORM", @@ -3917,28 +4532,33 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + true, // isLuminance + { true, false, false, false }, // Is normalized? { 1.0f / 255.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - true, // isLuminance }, - // 0x147 (Padding) + + // padding (0x147) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x148 (Padding) + 1, 1 + }, + // padding (0x148) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, + 1, 1 + }, // R8_SSCALED (0x149) { "R8_SSCALED", @@ -3952,13 +4572,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R8_USCALED (0x14a) + + // R8_USCALED (0x14A) { "R8_USCALED", { SWR_TYPE_USCALED, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -3971,21 +4592,24 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // 0x14b (Padding) + + // padding (0x14B) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // L8_UNORM_SRGB (0x14c) + 1, 1 + }, + // L8_UNORM_SRGB (0x14C) { "L8_UNORM_SRGB", { SWR_TYPE_UNORM, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, @@ -3998,52 +4622,63 @@ true, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + true, // isLuminance + { true, false, false, false }, // Is normalized? { 1.0f / 255.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - true, // isLuminance }, - // 0x14d (Padding) + + // padding (0x14D) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x14e (Padding) + 1, 1 + }, + // padding (0x14E) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x14f (Padding) + 1, 1 + }, + // padding (0x14F) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x150 (Padding) + 1, 1 + }, + // padding (0x150) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x151 (Padding) + 1, 1 + }, + // padding (0x151) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, + 1, 1 + }, // L8_UINT (0x152) { "L8_UINT", @@ -4057,12 +4692,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + true, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - true, // isLuminance }, + // L8_SINT (0x153) { "L8_SINT", @@ -4076,12 +4712,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + true, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - true, // isLuminance }, + // I8_UINT (0x154) { "I8_UINT", @@ -4095,12 +4732,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + true, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - true, // isLuminance }, + // I8_SINT (0x155) { "I8_SINT", @@ -4114,372 +4752,463 @@ false, // isSRGB false, // isBC false, // isSubsampled + true, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 0, 0, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - true, // isLuminance }, - // 0x156 (Padding) + + // padding (0x156) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x157 (Padding) + 1, 1 + }, + // padding (0x157) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x158 (Padding) + 1, 1 + }, + // padding (0x158) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x159 (Padding) + 1, 1 + }, + // padding (0x159) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x15a (Padding) + 1, 1 + }, + // padding (0x15A) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x15b (Padding) + 1, 1 + }, + // padding (0x15B) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x15c (Padding) + 1, 1 + }, + // padding (0x15C) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x15d (Padding) + 1, 1 + }, + // padding (0x15D) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x15e (Padding) + 1, 1 + }, + // padding (0x15E) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x15f (Padding) + 1, 1 + }, + // padding (0x15F) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x160 (Padding) + 1, 1 + }, + // padding (0x160) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x161 (Padding) + 1, 1 + }, + // padding (0x161) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x162 (Padding) + 1, 1 + }, + // padding (0x162) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x163 (Padding) + 1, 1 + }, + // padding (0x163) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x164 (Padding) + 1, 1 + }, + // padding (0x164) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x165 (Padding) + 1, 1 + }, + // padding (0x165) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x166 (Padding) + 1, 1 + }, + // padding (0x166) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x167 (Padding) + 1, 1 + }, + // padding (0x167) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x168 (Padding) + 1, 1 + }, + // padding (0x168) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x169 (Padding) + 1, 1 + }, + // padding (0x169) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x16a (Padding) + 1, 1 + }, + // padding (0x16A) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x16b (Padding) + 1, 1 + }, + // padding (0x16B) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x16c (Padding) + 1, 1 + }, + // padding (0x16C) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x16d (Padding) + 1, 1 + }, + // padding (0x16D) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x16e (Padding) + 1, 1 + }, + // padding (0x16E) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x16f (Padding) + 1, 1 + }, + // padding (0x16F) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x170 (Padding) + 1, 1 + }, + // padding (0x170) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x171 (Padding) + 1, 1 + }, + // padding (0x171) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x172 (Padding) + 1, 1 + }, + // padding (0x172) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x173 (Padding) + 1, 1 + }, + // padding (0x173) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x174 (Padding) + 1, 1 + }, + // padding (0x174) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x175 (Padding) + 1, 1 + }, + // padding (0x175) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x176 (Padding) + 1, 1 + }, + // padding (0x176) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x177 (Padding) + 1, 1 + }, + // padding (0x177) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x178 (Padding) + 1, 1 + }, + // padding (0x178) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x179 (Padding) + 1, 1 + }, + // padding (0x179) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x17a (Padding) + 1, 1 + }, + // padding (0x17A) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x17b (Padding) + 1, 1 + }, + // padding (0x17B) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x17c (Padding) + 1, 1 + }, + // padding (0x17C) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x17d (Padding) + 1, 1 + }, + // padding (0x17D) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x17e (Padding) + 1, 1 + }, + // padding (0x17E) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x17f (Padding) + 1, 1 + }, + // padding (0x17F) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x180 (Padding) + 1, 1 + }, + // padding (0x180) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x181 (Padding) + 1, 1 + }, + // padding (0x181) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x182 (Padding) + 1, 1 + }, + // padding (0x182) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, + 1, 1 + }, // YCRCB_SWAPUVY (0x183) { "YCRCB_SWAPUVY", @@ -4493,189 +5222,204 @@ false, // isSRGB false, // isBC true, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 2, // bcWidth 1, // bcHeight - false, // isLuminance }, - // 0x184 (Padding) + + // padding (0x184) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x185 (Padding) + 1, 1 + }, + // padding (0x185) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, + 1, 1 + }, // BC1_UNORM (0x186) { "BC1_UNORM", { SWR_TYPE_UNORM, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, { 0, 0, 0, 0x3f800000 }, // Defaults for missing components - { 0, 0, 0, 0 }, // Swizzle - { 8, 0, 0, 0 }, // Bits per component + { 0, 1, 2, 3 }, // Swizzle + { 8, 8, 8, 8 }, // Bits per component 64, // Bits per element 8, // Bytes per element 1, // Num components false, // isSRGB true, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, false, false, false }, // Is normalized? { 1.0f / 255.0f, 0, 0, 0 }, // To float scale factor 4, // bcWidth 4, // bcHeight - false, // isLuminance }, + // BC2_UNORM (0x187) { "BC2_UNORM", { SWR_TYPE_UNORM, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, { 0, 0, 0, 0x3f800000 }, // Defaults for missing components - { 0, 0, 0, 0 }, // Swizzle - { 8, 0, 0, 0 }, // Bits per component + { 0, 1, 2, 3 }, // Swizzle + { 8, 8, 8, 8 }, // Bits per component 128, // Bits per element 16, // Bytes per element 1, // Num components false, // isSRGB true, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, false, false, false }, // Is normalized? { 1.0f / 255.0f, 0, 0, 0 }, // To float scale factor 4, // bcWidth 4, // bcHeight - false, // isLuminance }, + // BC3_UNORM (0x188) { "BC3_UNORM", { SWR_TYPE_UNORM, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, { 0, 0, 0, 0x3f800000 }, // Defaults for missing components - { 0, 0, 0, 0 }, // Swizzle - { 8, 0, 0, 0 }, // Bits per component + { 0, 1, 2, 3 }, // Swizzle + { 8, 8, 8, 8 }, // Bits per component 128, // Bits per element 16, // Bytes per element 1, // Num components false, // isSRGB true, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, false, false, false }, // Is normalized? { 1.0f / 255.0f, 0, 0, 0 }, // To float scale factor 4, // bcWidth 4, // bcHeight - false, // isLuminance }, + // BC4_UNORM (0x189) { "BC4_UNORM", { SWR_TYPE_UNORM, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, { 0, 0, 0, 0x3f800000 }, // Defaults for missing components - { 0, 0, 0, 0 }, // Swizzle - { 8, 0, 0, 0 }, // Bits per component + { 0, 1, 2, 3 }, // Swizzle + { 8, 8, 8, 8 }, // Bits per component 64, // Bits per element 8, // Bytes per element 1, // Num components false, // isSRGB true, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, false, false, false }, // Is normalized? { 1.0f / 255.0f, 0, 0, 0 }, // To float scale factor 4, // bcWidth 4, // bcHeight - false, // isLuminance }, - // BC5_UNORM (0x18a) + + // BC5_UNORM (0x18A) { "BC5_UNORM", { SWR_TYPE_UNORM, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, { 0, 0, 0, 0x3f800000 }, // Defaults for missing components - { 0, 0, 0, 0 }, // Swizzle - { 8, 0, 0, 0 }, // Bits per component + { 0, 1, 2, 3 }, // Swizzle + { 8, 8, 8, 8 }, // Bits per component 128, // Bits per element 16, // Bytes per element 1, // Num components false, // isSRGB true, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, false, false, false }, // Is normalized? { 1.0f / 255.0f, 0, 0, 0 }, // To float scale factor 4, // bcWidth 4, // bcHeight - false, // isLuminance }, - // BC1_UNORM_SRGB (0x18b) + + // BC1_UNORM_SRGB (0x18B) { "BC1_UNORM_SRGB", { SWR_TYPE_UNORM, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, { 0, 0, 0, 0x3f800000 }, // Defaults for missing components - { 0, 0, 0, 0 }, // Swizzle - { 8, 0, 0, 0 }, // Bits per component + { 0, 1, 2, 3 }, // Swizzle + { 8, 8, 8, 8 }, // Bits per component 64, // Bits per element 8, // Bytes per element 1, // Num components true, // isSRGB true, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, false, false, false }, // Is normalized? { 1.0f / 255.0f, 0, 0, 0 }, // To float scale factor 4, // bcWidth 4, // bcHeight - false, // isLuminance }, - // BC2_UNORM_SRGB (0x18c) + + // BC2_UNORM_SRGB (0x18C) { "BC2_UNORM_SRGB", { SWR_TYPE_UNORM, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, { 0, 0, 0, 0x3f800000 }, // Defaults for missing components - { 0, 0, 0, 0 }, // Swizzle - { 8, 0, 0, 0 }, // Bits per component + { 0, 1, 2, 3 }, // Swizzle + { 8, 8, 8, 8 }, // Bits per component 128, // Bits per element 16, // Bytes per element 1, // Num components true, // isSRGB true, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, false, false, false }, // Is normalized? { 1.0f / 255.0f, 0, 0, 0 }, // To float scale factor 4, // bcWidth 4, // bcHeight - false, // isLuminance }, - // BC3_UNORM_SRGB (0x18d) + + // BC3_UNORM_SRGB (0x18D) { "BC3_UNORM_SRGB", { SWR_TYPE_UNORM, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, { 0, 0, 0, 0x3f800000 }, // Defaults for missing components - { 0, 0, 0, 0 }, // Swizzle - { 8, 0, 0, 0 }, // Bits per component + { 0, 1, 2, 3 }, // Swizzle + { 8, 8, 8, 8 }, // Bits per component 128, // Bits per element 16, // Bytes per element 1, // Num components true, // isSRGB true, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, false, false, false }, // Is normalized? { 1.0f / 255.0f, 0, 0, 0 }, // To float scale factor 4, // bcWidth 4, // bcHeight - false, // isLuminance }, - // 0x18e (Padding) + + // padding (0x18E) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // YCRCB_SWAPUV (0x18f) + 1, 1 + }, + // YCRCB_SWAPUV (0x18F) { "YCRCB_SWAPUV", { SWR_TYPE_UINT, SWR_TYPE_UINT, SWR_TYPE_UINT, SWR_TYPE_UINT }, @@ -4688,36 +5432,43 @@ false, // isSRGB false, // isBC true, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 2, // bcWidth 1, // bcHeight - false, // isLuminance }, - // 0x190 (Padding) + + // padding (0x190) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x191 (Padding) + 1, 1 + }, + // padding (0x191) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x192 (Padding) + 1, 1 + }, + // padding (0x192) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, + 1, 1 + }, // R8G8B8_UNORM (0x193) { "R8G8B8_UNORM", @@ -4731,12 +5482,13 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, true, true, false }, // Is normalized? { 1.0f / 255.0f, 1.0f / 255.0f, 1.0f / 255.0f, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R8G8B8_SNORM (0x194) { "R8G8B8_SNORM", @@ -4750,12 +5502,13 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, true, true, false }, // Is normalized? { 1.0f / 127.0f, 1.0f / 127.0f, 1.0f / 127.0f, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R8G8B8_SSCALED (0x195) { "R8G8B8_SSCALED", @@ -4769,12 +5522,13 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, + // R8G8B8_USCALED (0x196) { "R8G8B8_USCALED", @@ -4788,67 +5542,94 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // 0x197 (Padding) + + // R64G64B64A64_FLOAT (0x197) { - "UNKNOWN", - { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, - { false, false, false, false }, - { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x198 (Padding) + "R64G64B64A64_FLOAT", + { SWR_TYPE_FLOAT, SWR_TYPE_FLOAT, SWR_TYPE_FLOAT, SWR_TYPE_FLOAT }, + { 0, 0, 0, 0x3f800000 }, // Defaults for missing components + { 0, 1, 2, 3 }, // Swizzle + { 64, 64, 64, 64 }, // Bits per component + 256, // Bits per element + 32, // Bytes per element + 4, // Num components + false, // isSRGB + false, // isBC + false, // isSubsampled + false, // isLuminance + { false, false, false, false }, // Is normalized? + { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor + 1, // bcWidth + 1, // bcHeight + }, + + // R64G64B64_FLOAT (0x198) { - "UNKNOWN", - { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, - { false, false, false, false }, - { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, + "R64G64B64_FLOAT", + { SWR_TYPE_FLOAT, SWR_TYPE_FLOAT, SWR_TYPE_FLOAT, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0x3f800000 }, // Defaults for missing components + { 0, 1, 2, 0 }, // Swizzle + { 64, 64, 64, 0 }, // Bits per component + 192, // Bits per element + 24, // Bytes per element + 3, // Num components + false, // isSRGB + false, // isBC + false, // isSubsampled + false, // isLuminance + { false, false, false, false }, // Is normalized? + { 1.0f, 1.0f, 1.0f, 0 }, // To float scale factor + 1, // bcWidth + 1, // bcHeight + }, + // BC4_SNORM (0x199) { "BC4_SNORM", { SWR_TYPE_SNORM, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, { 0, 0, 0, 0x3f800000 }, // Defaults for missing components - { 0, 0, 0, 0 }, // Swizzle - { 8, 0, 0, 0 }, // Bits per component + { 0, 1, 2, 3 }, // Swizzle + { 8, 8, 8, 8 }, // Bits per component 64, // Bits per element 8, // Bytes per element 1, // Num components false, // isSRGB true, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, false, false, false }, // Is normalized? { 1.0f / 127.0f, 0, 0, 0 }, // To float scale factor 4, // bcWidth 4, // bcHeight - false, // isLuminance }, - // BC5_SNORM (0x19a) + + // BC5_SNORM (0x19A) { "BC5_SNORM", { SWR_TYPE_SNORM, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, { 0, 0, 0, 0x3f800000 }, // Defaults for missing components - { 0, 0, 0, 0 }, // Swizzle - { 8, 0, 0, 0 }, // Bits per component + { 0, 1, 2, 3 }, // Swizzle + { 8, 8, 8, 8 }, // Bits per component 128, // Bits per element 16, // Bytes per element 1, // Num components false, // isSRGB true, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, false, false, false }, // Is normalized? { 1.0f / 127.0f, 0, 0, 0 }, // To float scale factor 4, // bcWidth 4, // bcHeight - false, // isLuminance }, - // R16G16B16_FLOAT (0x19b) + + // R16G16B16_FLOAT (0x19B) { "R16G16B16_FLOAT", { SWR_TYPE_FLOAT, SWR_TYPE_FLOAT, SWR_TYPE_FLOAT, SWR_TYPE_UNKNOWN }, @@ -4861,13 +5642,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R16G16B16_UNORM (0x19c) + + // R16G16B16_UNORM (0x19C) { "R16G16B16_UNORM", { SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNKNOWN }, @@ -4880,13 +5662,14 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, true, true, false }, // Is normalized? { 1.0f / 65535.0f, 1.0f / 65535.0f, 1.0f / 65535.0f, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R16G16B16_SNORM (0x19d) + + // R16G16B16_SNORM (0x19D) { "R16G16B16_SNORM", { SWR_TYPE_SNORM, SWR_TYPE_SNORM, SWR_TYPE_SNORM, SWR_TYPE_UNKNOWN }, @@ -4899,13 +5682,14 @@ false, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, true, true, false }, // Is normalized? { 1.0f / 32767.0f, 1.0f / 32767.0f, 1.0f / 32767.0f, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R16G16B16_SSCALED (0x19e) + + // R16G16B16_SSCALED (0x19E) { "R16G16B16_SSCALED", { SWR_TYPE_SSCALED, SWR_TYPE_SSCALED, SWR_TYPE_SSCALED, SWR_TYPE_UNKNOWN }, @@ -4918,13 +5702,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R16G16B16_USCALED (0x19f) + + // R16G16B16_USCALED (0x19F) { "R16G16B16_USCALED", { SWR_TYPE_USCALED, SWR_TYPE_USCALED, SWR_TYPE_USCALED, SWR_TYPE_UNKNOWN }, @@ -4937,121 +5722,134 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // 0x1a0 (Padding) + + // padding (0x1A0) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // BC6H_SF16 (0x1a1) + 1, 1 + }, + // BC6H_SF16 (0x1A1) { "BC6H_SF16", { SWR_TYPE_SNORM, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, { 0, 0, 0, 0x3f800000 }, // Defaults for missing components - { 0, 0, 0, 0 }, // Swizzle - { 8, 0, 0, 0 }, // Bits per component + { 0, 1, 2, 3 }, // Swizzle + { 8, 8, 8, 8 }, // Bits per component 128, // Bits per element 16, // Bytes per element 1, // Num components false, // isSRGB true, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, false, false, false }, // Is normalized? { 1.0f / 127.0f, 0, 0, 0 }, // To float scale factor 4, // bcWidth 4, // bcHeight - false, // isLuminance }, - // BC7_UNORM (0x1a2) + + // BC7_UNORM (0x1A2) { "BC7_UNORM", { SWR_TYPE_UNORM, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, { 0, 0, 0, 0x3f800000 }, // Defaults for missing components - { 0, 0, 0, 0 }, // Swizzle - { 8, 0, 0, 0 }, // Bits per component + { 0, 1, 2, 3 }, // Swizzle + { 8, 8, 8, 8 }, // Bits per component 128, // Bits per element 16, // Bytes per element 1, // Num components false, // isSRGB true, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, false, false, false }, // Is normalized? { 1.0f / 255.0f, 0, 0, 0 }, // To float scale factor 4, // bcWidth 4, // bcHeight - false, // isLuminance }, - // BC7_UNORM_SRGB (0x1a3) + + // BC7_UNORM_SRGB (0x1A3) { "BC7_UNORM_SRGB", { SWR_TYPE_UNORM, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, { 0, 0, 0, 0x3f800000 }, // Defaults for missing components - { 0, 0, 0, 0 }, // Swizzle - { 8, 0, 0, 0 }, // Bits per component + { 0, 1, 2, 3 }, // Swizzle + { 8, 8, 8, 8 }, // Bits per component 128, // Bits per element 16, // Bytes per element 1, // Num components true, // isSRGB true, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, false, false, false }, // Is normalized? { 1.0f / 255.0f, 0, 0, 0 }, // To float scale factor 4, // bcWidth 4, // bcHeight - false, // isLuminance }, - // BC6H_UF16 (0x1a4) + + // BC6H_UF16 (0x1A4) { "BC6H_UF16", { SWR_TYPE_UNORM, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, { 0, 0, 0, 0x3f800000 }, // Defaults for missing components - { 0, 0, 0, 0 }, // Swizzle - { 8, 0, 0, 0 }, // Bits per component + { 0, 1, 2, 3 }, // Swizzle + { 8, 8, 8, 8 }, // Bits per component 128, // Bits per element 16, // Bytes per element 1, // Num components false, // isSRGB true, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, false, false, false }, // Is normalized? { 1.0f / 255.0f, 0, 0, 0 }, // To float scale factor 4, // bcWidth 4, // bcHeight - false, // isLuminance }, - // 0x1a5 (Padding) + + // padding (0x1A5) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x1a6 (Padding) + 1, 1 + }, + // padding (0x1A6) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x1a7 (Padding) + 1, 1 + }, + // padding (0x1A7) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // R8G8B8_UNORM_SRGB (0x1a8) + 1, 1 + }, + // R8G8B8_UNORM_SRGB (0x1A8) { "R8G8B8_UNORM_SRGB", { SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNORM, SWR_TYPE_UNKNOWN }, @@ -5064,69 +5862,84 @@ true, // isSRGB false, // isBC false, // isSubsampled - { true, true, true, true }, // Is normalized? + false, // isLuminance + { true, true, true, false }, // Is normalized? { 1.0f / 255.0f, 1.0f / 255.0f, 1.0f / 255.0f, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // 0x1a9 (Padding) + + // padding (0x1A9) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x1aa (Padding) + 1, 1 + }, + // padding (0x1AA) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x1ab (Padding) + 1, 1 + }, + // padding (0x1AB) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x1ac (Padding) + 1, 1 + }, + // padding (0x1AC) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x1ad (Padding) + 1, 1 + }, + // padding (0x1AD) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x1ae (Padding) + 1, 1 + }, + // padding (0x1AE) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x1af (Padding) + 1, 1 + }, + // padding (0x1AF) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // R16G16B16_UINT (0x1b0) + 1, 1 + }, + // R16G16B16_UINT (0x1B0) { "R16G16B16_UINT", { SWR_TYPE_UINT, SWR_TYPE_UINT, SWR_TYPE_UINT, SWR_TYPE_UNKNOWN }, @@ -5139,13 +5952,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R16G16B16_SINT (0x1b1) + + // R16G16B16_SINT (0x1B1) { "R16G16B16_SINT", { SWR_TYPE_SINT, SWR_TYPE_SINT, SWR_TYPE_SINT, SWR_TYPE_UNKNOWN }, @@ -5158,21 +5972,34 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // 0x1b2 (Padding) + + // R32_SFIXED (0x1B2) { - "UNKNOWN", - { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, - { false, false, false, false }, - { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // R10G10B10A2_SNORM (0x1b3) + "R32_SFIXED", + { SWR_TYPE_SFIXED, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0x3f800000 }, // Defaults for missing components + { 0, 0, 0, 0 }, // Swizzle + { 32, 0, 0, 0 }, // Bits per component + 32, // Bits per element + 4, // Bytes per element + 1, // Num components + false, // isSRGB + false, // isBC + false, // isSubsampled + false, // isLuminance + { false, false, false, false }, // Is normalized? + { 1.0f, 0, 0, 0 }, // To float scale factor + 1, // bcWidth + 1, // bcHeight + }, + + // R10G10B10A2_SNORM (0x1B3) { "R10G10B10A2_SNORM", { SWR_TYPE_SNORM, SWR_TYPE_SNORM, SWR_TYPE_SNORM, SWR_TYPE_SNORM }, @@ -5185,13 +6012,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { true, true, true, true }, // Is normalized? { 1.0f / 511.0f, 1.0f / 511.0f, 1.0f / 511.0f, 1.0f / 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R10G10B10A2_USCALED (0x1b4) + + // R10G10B10A2_USCALED (0x1B4) { "R10G10B10A2_USCALED", { SWR_TYPE_USCALED, SWR_TYPE_USCALED, SWR_TYPE_USCALED, SWR_TYPE_USCALED }, @@ -5204,13 +6032,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R10G10B10A2_SSCALED (0x1b5) + + // R10G10B10A2_SSCALED (0x1B5) { "R10G10B10A2_SSCALED", { SWR_TYPE_SSCALED, SWR_TYPE_SSCALED, SWR_TYPE_SSCALED, SWR_TYPE_SSCALED }, @@ -5223,13 +6052,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R10G10B10A2_SINT (0x1b6) + + // R10G10B10A2_SINT (0x1B6) { "R10G10B10A2_SINT", { SWR_TYPE_SINT, SWR_TYPE_SINT, SWR_TYPE_SINT, SWR_TYPE_SINT }, @@ -5242,13 +6072,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // B10G10R10A2_SNORM (0x1b7) + + // B10G10R10A2_SNORM (0x1B7) { "B10G10R10A2_SNORM", { SWR_TYPE_SNORM, SWR_TYPE_SNORM, SWR_TYPE_SNORM, SWR_TYPE_SNORM }, @@ -5261,13 +6092,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { true, true, true, true }, // Is normalized? { 1.0f / 511.0f, 1.0f / 511.0f, 1.0f / 511.0f, 1.0f / 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // B10G10R10A2_USCALED (0x1b8) + + // B10G10R10A2_USCALED (0x1B8) { "B10G10R10A2_USCALED", { SWR_TYPE_USCALED, SWR_TYPE_USCALED, SWR_TYPE_USCALED, SWR_TYPE_USCALED }, @@ -5280,13 +6112,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // B10G10R10A2_SSCALED (0x1b9) + + // B10G10R10A2_SSCALED (0x1B9) { "B10G10R10A2_SSCALED", { SWR_TYPE_SSCALED, SWR_TYPE_SSCALED, SWR_TYPE_SSCALED, SWR_TYPE_SSCALED }, @@ -5299,13 +6132,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // B10G10R10A2_UINT (0x1ba) + + // B10G10R10A2_UINT (0x1BA) { "B10G10R10A2_UINT", { SWR_TYPE_UINT, SWR_TYPE_UINT, SWR_TYPE_UINT, SWR_TYPE_UINT }, @@ -5318,13 +6152,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // B10G10R10A2_SINT (0x1bb) + + // B10G10R10A2_SINT (0x1BB) { "B10G10R10A2_SINT", { SWR_TYPE_SINT, SWR_TYPE_SINT, SWR_TYPE_SINT, SWR_TYPE_SINT }, @@ -5337,109 +6172,134 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 1.0f }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // 0x1bc (Padding) + + // padding (0x1BC) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x1bd (Padding) + 1, 1 + }, + // padding (0x1BD) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x1be (Padding) + 1, 1 + }, + // padding (0x1BE) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x1bf (Padding) + 1, 1 + }, + // padding (0x1BF) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x1c0 (Padding) + 1, 1 + }, + // padding (0x1C0) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x1c1 (Padding) + 1, 1 + }, + // padding (0x1C1) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x1c2 (Padding) + 1, 1 + }, + // padding (0x1C2) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x1c3 (Padding) + 1, 1 + }, + // padding (0x1C3) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x1c4 (Padding) + 1, 1 + }, + // padding (0x1C4) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x1c5 (Padding) + 1, 1 + }, + // padding (0x1C5) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x1c6 (Padding) + 1, 1 + }, + // padding (0x1C6) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // 0x1c7 (Padding) + 1, 1 + }, + // padding (0x1C7) { - "UNKNOWN", + nullptr, { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, - { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, { 0, 0, 0, 0 }, 0, 0, 0, false, false, false, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, { false, false, false, false }, { 0.0f, 0.0f, 0.0f, 0.0f }, - 1, 1, false }, - // R8G8B8_UINT (0x1c8) + 1, 1 + }, + // R8G8B8_UINT (0x1C8) { "R8G8B8_UINT", { SWR_TYPE_UINT, SWR_TYPE_UINT, SWR_TYPE_UINT, SWR_TYPE_UNKNOWN }, @@ -5452,13 +6312,14 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight - false, // isLuminance }, - // R8G8B8_SINT (0x1c9) + + // R8G8B8_SINT (0x1C9) { "R8G8B8_SINT", { SWR_TYPE_SINT, SWR_TYPE_SINT, SWR_TYPE_SINT, SWR_TYPE_UNKNOWN }, @@ -5471,10 +6332,561 @@ false, // isSRGB false, // isBC false, // isSubsampled + false, // isLuminance { false, false, false, false }, // Is normalized? { 1.0f, 1.0f, 1.0f, 0 }, // To float scale factor 1, // bcWidth 1, // bcHeight + }, + + // padding (0x1CA) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1CB) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1CC) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1CD) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1CE) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1CF) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1D0) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1D1) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1D2) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1D3) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1D4) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1D5) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1D6) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1D7) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1D8) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1D9) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1DA) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1DB) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1DC) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1DD) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1DE) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1DF) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1E0) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1E1) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1E2) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1E3) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1E4) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1E5) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1E6) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1E7) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1E8) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1E9) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1EA) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1EB) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1EC) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1ED) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1EE) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1EF) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1F0) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1F1) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1F2) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1F3) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1F4) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1F5) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1F6) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1F7) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1F8) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1F9) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1FA) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1FB) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1FC) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1FD) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // padding (0x1FE) + { + nullptr, + { SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0 },{ 0, 0, 0, 0 },{ 0, 0, 0, 0 }, + 0, 0, 0, false, false, false, false, + { false, false, false, false }, + { 0.0f, 0.0f, 0.0f, 0.0f }, + 1, 1 + }, + // RAW (0x1FF) + { + "RAW", + { SWR_TYPE_UINT, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN, SWR_TYPE_UNKNOWN }, + { 0, 0, 0, 0x1 }, // Defaults for missing components + { 0, 1, 2, 3 }, // Swizzle + { 8, 0, 0, 0 }, // Bits per component + 8, // Bits per element + 1, // Bytes per element + 1, // Num components + false, // isSRGB + false, // isBC + false, // isSubsampled false, // isLuminance + { false, false, false, false }, // Is normalized? + { 1.0f, 0, 0, 0 }, // To float scale factor + 1, // bcWidth + 1, // bcHeight }, }; + diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/common/formats.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/common/formats.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/common/formats.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/common/formats.h 2017-06-01 10:37:10.000000000 +0000 @@ -1,6 +1,5 @@ - /**************************************************************************** -* Copyright (C) 2014-2015 Intel Corporation. All Rights Reserved. +* Copyright (C) 2016 Intel Corporation. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -21,7 +20,7 @@ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * -* @file formats.h +* @file gen_formats.h * * @brief auto-generated file * @@ -47,206 +46,222 @@ SWR_TYPE_FLOAT, SWR_TYPE_SSCALED, SWR_TYPE_USCALED, + SWR_TYPE_SFIXED, }; + ////////////////////////////////////////////////////////////////////////// /// SWR_FORMAT ////////////////////////////////////////////////////////////////////////// enum SWR_FORMAT { - R32G32B32A32_FLOAT = 0x0, - R32G32B32A32_SINT = 0x1, - R32G32B32A32_UINT = 0x2, - R32G32B32X32_FLOAT = 0x6, - R32G32B32A32_SSCALED = 0x7, - R32G32B32A32_USCALED = 0x8, - R32G32B32_FLOAT = 0x40, - R32G32B32_SINT = 0x41, - R32G32B32_UINT = 0x42, - R32G32B32_SSCALED = 0x45, - R32G32B32_USCALED = 0x46, - R16G16B16A16_UNORM = 0x80, - R16G16B16A16_SNORM = 0x81, - R16G16B16A16_SINT = 0x82, - R16G16B16A16_UINT = 0x83, - R16G16B16A16_FLOAT = 0x84, - R32G32_FLOAT = 0x85, - R32G32_SINT = 0x86, - R32G32_UINT = 0x87, - R32_FLOAT_X8X24_TYPELESS = 0x88, - X32_TYPELESS_G8X24_UINT = 0x89, - L32A32_FLOAT = 0x8A, - R16G16B16X16_UNORM = 0x8E, - R16G16B16X16_FLOAT = 0x8F, - L32X32_FLOAT = 0x91, - I32X32_FLOAT = 0x92, - R16G16B16A16_SSCALED = 0x93, - R16G16B16A16_USCALED = 0x94, - R32G32_SSCALED = 0x95, - R32G32_USCALED = 0x96, - R32_FLOAT_X8X24_TYPELESS_LD = 0x98, - B8G8R8A8_UNORM = 0xC0, - B8G8R8A8_UNORM_SRGB = 0xC1, - R10G10B10A2_UNORM = 0xC2, - R10G10B10A2_UNORM_SRGB = 0xC3, - R10G10B10A2_UINT = 0xC4, - R8G8B8A8_UNORM = 0xC7, - R8G8B8A8_UNORM_SRGB = 0xC8, - R8G8B8A8_SNORM = 0xC9, - R8G8B8A8_SINT = 0xCA, - R8G8B8A8_UINT = 0xCB, - R16G16_UNORM = 0xCC, - R16G16_SNORM = 0xCD, - R16G16_SINT = 0xCE, - R16G16_UINT = 0xCF, - R16G16_FLOAT = 0xD0, - B10G10R10A2_UNORM = 0xD1, - B10G10R10A2_UNORM_SRGB = 0xD2, - R11G11B10_FLOAT = 0xD3, - R32_SINT = 0xD6, - R32_UINT = 0xD7, - R32_FLOAT = 0xD8, - R24_UNORM_X8_TYPELESS = 0xD9, - X24_TYPELESS_G8_UINT = 0xDA, - R24_UNORM_X8_TYPELESS_LD = 0xDC, - L32_UNORM = 0xDD, - L16A16_UNORM = 0xDF, - I24X8_UNORM = 0xE0, - L24X8_UNORM = 0xE1, - I32_FLOAT = 0xE3, - L32_FLOAT = 0xE4, - A32_FLOAT = 0xE5, - B8G8R8X8_UNORM = 0xE9, - B8G8R8X8_UNORM_SRGB = 0xEA, - R8G8B8X8_UNORM = 0xEB, - R8G8B8X8_UNORM_SRGB = 0xEC, - R9G9B9E5_SHAREDEXP = 0xED, - B10G10R10X2_UNORM = 0xEE, - L16A16_FLOAT = 0xF0, - R10G10B10X2_USCALED = 0xF3, - R8G8B8A8_SSCALED = 0xF4, - R8G8B8A8_USCALED = 0xF5, - R16G16_SSCALED = 0xF6, - R16G16_USCALED = 0xF7, - R32_SSCALED = 0xF8, - R32_USCALED = 0xF9, - B5G6R5_UNORM = 0x100, - B5G6R5_UNORM_SRGB = 0x101, - B5G5R5A1_UNORM = 0x102, - B5G5R5A1_UNORM_SRGB = 0x103, - B4G4R4A4_UNORM = 0x104, - B4G4R4A4_UNORM_SRGB = 0x105, - R8G8_UNORM = 0x106, - R8G8_SNORM = 0x107, - R8G8_SINT = 0x108, - R8G8_UINT = 0x109, - R16_UNORM = 0x10A, - R16_SNORM = 0x10B, - R16_SINT = 0x10C, - R16_UINT = 0x10D, - R16_FLOAT = 0x10E, - I16_UNORM = 0x111, - L16_UNORM = 0x112, - A16_UNORM = 0x113, - L8A8_UNORM = 0x114, - I16_FLOAT = 0x115, - L16_FLOAT = 0x116, - A16_FLOAT = 0x117, - L8A8_UNORM_SRGB = 0x118, - B5G5R5X1_UNORM = 0x11A, - B5G5R5X1_UNORM_SRGB = 0x11B, - R8G8_SSCALED = 0x11C, - R8G8_USCALED = 0x11D, - R16_SSCALED = 0x11E, - R16_USCALED = 0x11F, - L8A8_UINT = 0x126, - L8A8_SINT = 0x127, - R8_UNORM = 0x140, - R8_SNORM = 0x141, - R8_SINT = 0x142, - R8_UINT = 0x143, - A8_UNORM = 0x144, - I8_UNORM = 0x145, - L8_UNORM = 0x146, - R8_SSCALED = 0x149, - R8_USCALED = 0x14A, - L8_UNORM_SRGB = 0x14C, - L8_UINT = 0x152, - L8_SINT = 0x153, - I8_UINT = 0x154, - I8_SINT = 0x155, - YCRCB_SWAPUVY = 0x183, - BC1_UNORM = 0x186, - BC2_UNORM = 0x187, - BC3_UNORM = 0x188, - BC4_UNORM = 0x189, - BC5_UNORM = 0x18A, - BC1_UNORM_SRGB = 0x18B, - BC2_UNORM_SRGB = 0x18C, - BC3_UNORM_SRGB = 0x18D, - YCRCB_SWAPUV = 0x18F, - R8G8B8_UNORM = 0x193, - R8G8B8_SNORM = 0x194, - R8G8B8_SSCALED = 0x195, - R8G8B8_USCALED = 0x196, - BC4_SNORM = 0x199, - BC5_SNORM = 0x19A, - R16G16B16_FLOAT = 0x19B, - R16G16B16_UNORM = 0x19C, - R16G16B16_SNORM = 0x19D, - R16G16B16_SSCALED = 0x19E, - R16G16B16_USCALED = 0x19F, - BC6H_SF16 = 0x1A1, - BC7_UNORM = 0x1A2, - BC7_UNORM_SRGB = 0x1A3, - BC6H_UF16 = 0x1A4, - R8G8B8_UNORM_SRGB = 0x1A8, - R16G16B16_UINT = 0x1B0, - R16G16B16_SINT = 0x1B1, - R10G10B10A2_SNORM = 0x1B3, - R10G10B10A2_USCALED = 0x1B4, - R10G10B10A2_SSCALED = 0x1B5, - R10G10B10A2_SINT = 0x1B6, - B10G10R10A2_SNORM = 0x1B7, - B10G10R10A2_USCALED = 0x1B8, - B10G10R10A2_SSCALED = 0x1B9, - B10G10R10A2_UINT = 0x1BA, - B10G10R10A2_SINT = 0x1BB, - R8G8B8_UINT = 0x1C8, - R8G8B8_SINT = 0x1C9, - NUM_SWR_FORMATS = 0x1CA, + R32G32B32A32_FLOAT = 0x0, + R32G32B32A32_SINT = 0x1, + R32G32B32A32_UINT = 0x2, + R64G64_FLOAT = 0x5, + R32G32B32X32_FLOAT = 0x6, + R32G32B32A32_SSCALED = 0x7, + R32G32B32A32_USCALED = 0x8, + R32G32B32A32_SFIXED = 0x20, + R32G32B32_FLOAT = 0x40, + R32G32B32_SINT = 0x41, + R32G32B32_UINT = 0x42, + R32G32B32_SSCALED = 0x45, + R32G32B32_USCALED = 0x46, + R32G32B32_SFIXED = 0x50, + R16G16B16A16_UNORM = 0x80, + R16G16B16A16_SNORM = 0x81, + R16G16B16A16_SINT = 0x82, + R16G16B16A16_UINT = 0x83, + R16G16B16A16_FLOAT = 0x84, + R32G32_FLOAT = 0x85, + R32G32_SINT = 0x86, + R32G32_UINT = 0x87, + R32_FLOAT_X8X24_TYPELESS = 0x88, + X32_TYPELESS_G8X24_UINT = 0x89, + L32A32_FLOAT = 0x8A, + R64_FLOAT = 0x8D, + R16G16B16X16_UNORM = 0x8E, + R16G16B16X16_FLOAT = 0x8F, + L32X32_FLOAT = 0x91, + I32X32_FLOAT = 0x92, + R16G16B16A16_SSCALED = 0x93, + R16G16B16A16_USCALED = 0x94, + R32G32_SSCALED = 0x95, + R32G32_USCALED = 0x96, + R32G32_SFIXED = 0xA0, + B8G8R8A8_UNORM = 0xC0, + B8G8R8A8_UNORM_SRGB = 0xC1, + R10G10B10A2_UNORM = 0xC2, + R10G10B10A2_UNORM_SRGB = 0xC3, + R10G10B10A2_UINT = 0xC4, + R8G8B8A8_UNORM = 0xC7, + R8G8B8A8_UNORM_SRGB = 0xC8, + R8G8B8A8_SNORM = 0xC9, + R8G8B8A8_SINT = 0xCA, + R8G8B8A8_UINT = 0xCB, + R16G16_UNORM = 0xCC, + R16G16_SNORM = 0xCD, + R16G16_SINT = 0xCE, + R16G16_UINT = 0xCF, + R16G16_FLOAT = 0xD0, + B10G10R10A2_UNORM = 0xD1, + B10G10R10A2_UNORM_SRGB = 0xD2, + R11G11B10_FLOAT = 0xD3, + R10G10B10_FLOAT_A2_UNORM = 0xD5, + R32_SINT = 0xD6, + R32_UINT = 0xD7, + R32_FLOAT = 0xD8, + R24_UNORM_X8_TYPELESS = 0xD9, + X24_TYPELESS_G8_UINT = 0xDA, + L32_UNORM = 0xDD, + L16A16_UNORM = 0xDF, + I24X8_UNORM = 0xE0, + L24X8_UNORM = 0xE1, + I32_FLOAT = 0xE3, + L32_FLOAT = 0xE4, + A32_FLOAT = 0xE5, + B8G8R8X8_UNORM = 0xE9, + B8G8R8X8_UNORM_SRGB = 0xEA, + R8G8B8X8_UNORM = 0xEB, + R8G8B8X8_UNORM_SRGB = 0xEC, + R9G9B9E5_SHAREDEXP = 0xED, + B10G10R10X2_UNORM = 0xEE, + L16A16_FLOAT = 0xF0, + R10G10B10X2_USCALED = 0xF3, + R8G8B8A8_SSCALED = 0xF4, + R8G8B8A8_USCALED = 0xF5, + R16G16_SSCALED = 0xF6, + R16G16_USCALED = 0xF7, + R32_SSCALED = 0xF8, + R32_USCALED = 0xF9, + B5G6R5_UNORM = 0x100, + B5G6R5_UNORM_SRGB = 0x101, + B5G5R5A1_UNORM = 0x102, + B5G5R5A1_UNORM_SRGB = 0x103, + B4G4R4A4_UNORM = 0x104, + B4G4R4A4_UNORM_SRGB = 0x105, + R8G8_UNORM = 0x106, + R8G8_SNORM = 0x107, + R8G8_SINT = 0x108, + R8G8_UINT = 0x109, + R16_UNORM = 0x10A, + R16_SNORM = 0x10B, + R16_SINT = 0x10C, + R16_UINT = 0x10D, + R16_FLOAT = 0x10E, + I16_UNORM = 0x111, + L16_UNORM = 0x112, + A16_UNORM = 0x113, + L8A8_UNORM = 0x114, + I16_FLOAT = 0x115, + L16_FLOAT = 0x116, + A16_FLOAT = 0x117, + L8A8_UNORM_SRGB = 0x118, + B5G5R5X1_UNORM = 0x11A, + B5G5R5X1_UNORM_SRGB = 0x11B, + R8G8_SSCALED = 0x11C, + R8G8_USCALED = 0x11D, + R16_SSCALED = 0x11E, + R16_USCALED = 0x11F, + A1B5G5R5_UNORM = 0x124, + A4B4G4R4_UNORM = 0x125, + L8A8_UINT = 0x126, + L8A8_SINT = 0x127, + R8_UNORM = 0x140, + R8_SNORM = 0x141, + R8_SINT = 0x142, + R8_UINT = 0x143, + A8_UNORM = 0x144, + I8_UNORM = 0x145, + L8_UNORM = 0x146, + R8_SSCALED = 0x149, + R8_USCALED = 0x14A, + L8_UNORM_SRGB = 0x14C, + L8_UINT = 0x152, + L8_SINT = 0x153, + I8_UINT = 0x154, + I8_SINT = 0x155, + YCRCB_SWAPUVY = 0x183, + BC1_UNORM = 0x186, + BC2_UNORM = 0x187, + BC3_UNORM = 0x188, + BC4_UNORM = 0x189, + BC5_UNORM = 0x18A, + BC1_UNORM_SRGB = 0x18B, + BC2_UNORM_SRGB = 0x18C, + BC3_UNORM_SRGB = 0x18D, + YCRCB_SWAPUV = 0x18F, + R8G8B8_UNORM = 0x193, + R8G8B8_SNORM = 0x194, + R8G8B8_SSCALED = 0x195, + R8G8B8_USCALED = 0x196, + R64G64B64A64_FLOAT = 0x197, + R64G64B64_FLOAT = 0x198, + BC4_SNORM = 0x199, + BC5_SNORM = 0x19A, + R16G16B16_FLOAT = 0x19B, + R16G16B16_UNORM = 0x19C, + R16G16B16_SNORM = 0x19D, + R16G16B16_SSCALED = 0x19E, + R16G16B16_USCALED = 0x19F, + BC6H_SF16 = 0x1A1, + BC7_UNORM = 0x1A2, + BC7_UNORM_SRGB = 0x1A3, + BC6H_UF16 = 0x1A4, + R8G8B8_UNORM_SRGB = 0x1A8, + R16G16B16_UINT = 0x1B0, + R16G16B16_SINT = 0x1B1, + R32_SFIXED = 0x1B2, + R10G10B10A2_SNORM = 0x1B3, + R10G10B10A2_USCALED = 0x1B4, + R10G10B10A2_SSCALED = 0x1B5, + R10G10B10A2_SINT = 0x1B6, + B10G10R10A2_SNORM = 0x1B7, + B10G10R10A2_USCALED = 0x1B8, + B10G10R10A2_SSCALED = 0x1B9, + B10G10R10A2_UINT = 0x1BA, + B10G10R10A2_SINT = 0x1BB, + R8G8B8_UINT = 0x1C8, + R8G8B8_SINT = 0x1C9, + RAW = 0x1FF, + NUM_SWR_FORMATS = 0x200, }; + ////////////////////////////////////////////////////////////////////////// /// SWR_FORMAT_INFO - Format information ////////////////////////////////////////////////////////////////////////// struct SWR_FORMAT_INFO { const char* name; - SWR_TYPE type[4]; - uint32_t defaults[4]; - uint32_t swizzle[4]; ///< swizzle per component - uint32_t bpc[4]; ///< bits per component - uint32_t bpp; ///< bits per pixel - uint32_t Bpp; ///< bytes per pixel - uint32_t numComps; ///< number of components - bool isSRGB; - bool isBC; - bool isSubsampled; - bool isNormalized[4]; - float toFloat[4]; - uint32_t bcWidth; - uint32_t bcHeight; - bool isLuminance; + SWR_TYPE type[4]; + uint32_t defaults[4]; + uint32_t swizzle[4]; ///< swizzle per component + uint32_t bpc[4]; ///< bits per component + uint32_t bpp; ///< bits per pixel + uint32_t Bpp; ///< bytes per pixel + uint32_t numComps; ///< number of components + bool isSRGB; + bool isBC; + bool isSubsampled; + bool isLuminance; + bool isNormalized[4]; + float toFloat[4]; + uint32_t bcWidth; + uint32_t bcHeight; }; -extern const SWR_FORMAT_INFO gFormatInfo[]; +extern const SWR_FORMAT_INFO gFormatInfo[NUM_SWR_FORMATS]; ////////////////////////////////////////////////////////////////////////// /// @brief Retrieves format info struct for given format. /// @param format - SWR format INLINE const SWR_FORMAT_INFO& GetFormatInfo(SWR_FORMAT format) { + SWR_ASSERT(format < NUM_SWR_FORMATS, "Invalid Surface Format: %d", format); + SWR_ASSERT(gFormatInfo[format].name != nullptr, "Invalid Surface Format: %d", format); return gFormatInfo[format]; } // lookup table for unorm8 srgb -> float conversion extern const uint32_t srgb8Table[256]; + diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/common/isa.hpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/common/isa.hpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/common/isa.hpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/common/isa.hpp 2017-06-01 10:37:10.000000000 +0000 @@ -30,7 +30,11 @@ #include #include -#if defined(_WIN32) +// Clang for Windows does supply an intrin.h with __cpuid intrinsics, however... +// It seems to not realize that a write to "b" (ebx) will kill the value in rbx. +// This attempts to use the "native" clang / gcc intrinsics instead of the windows +// compatible ones. +#if defined(_MSC_VER) && !defined(__clang__) #include #else #include @@ -128,7 +132,7 @@ // Calling __cpuid with 0x0 as the function_id argument // gets the number of the highest valid function ID. -#if defined(_WIN32) +#if defined(_MSC_VER) && !defined(__clang__) __cpuid(cpui.data(), 0); nIds_ = cpui[0]; #else @@ -137,7 +141,7 @@ for (int i = 0; i <= nIds_; ++i) { -#if defined(_WIN32) +#if defined(_MSC_VER) && !defined(__clang__) __cpuidex(cpui.data(), i, 0); #else int *data = cpui.data(); @@ -178,7 +182,7 @@ // Calling __cpuid with 0x80000000 as the function_id argument // gets the number of the highest valid extended ID. -#if defined(_WIN32) +#if defined(_MSC_VER) && !defined(__clang__) __cpuid(cpui.data(), 0x80000000); nExIds_ = cpui[0]; #else @@ -190,7 +194,7 @@ for (unsigned i = 0x80000000; i <= nExIds_; ++i) { -#if defined(_WIN32) +#if defined(_MSC_VER) && !defined(__clang__) __cpuidex(cpui.data(), i, 0); #else int *data = cpui.data(); diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/common/os.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/common/os.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/common/os.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/common/os.h 2017-06-01 10:37:10.000000000 +0000 @@ -33,11 +33,19 @@ #ifndef NOMINMAX #define NOMINMAX +#include +#undef NOMINMAX +#else +#include #endif -#include "Windows.h" #include #include +#if defined(MemoryFence) +// Windows.h defines MemoryFence as _mm_mfence, but this conflicts with llvm::sys::MemoryFence +#undef MemoryFence +#endif + #define OSALIGN(RWORD, WIDTH) __declspec(align(WIDTH)) RWORD #define THREAD __declspec(thread) #define INLINE __forceinline @@ -105,14 +113,30 @@ #define INLINE __inline #endif #define DEBUGBREAK asm ("int $3") + #if !defined(__CYGWIN__) + #ifndef __cdecl #define __cdecl #endif #ifndef __stdcall #define __stdcall #endif -#define __declspec(X) + +#if defined(__GNUC__) && !defined(__INTEL_COMPILER) + #define __declspec(x) __declspec_##x + #define __declspec_align(y) __attribute__((aligned(y))) + #define __declspec_deprecated __attribute__((deprecated)) + #define __declspec_dllexport + #define __declspec_dllimport + #define __declspec_noinline __attribute__((__noinline__)) + #define __declspec_nothrow __attribute__((nothrow)) + #define __declspec_novtable + #define __declspec_thread __thread +#else + #define __declspec(X) +#endif + #endif #define GCC_VERSION (__GNUC__ * 10000 \ @@ -195,6 +219,7 @@ #define sprintf_s sprintf #define strcpy_s(dst,size,src) strncpy(dst,src,size) #define GetCurrentProcessId getpid +pid_t gettid(void); #define GetCurrentThreadId gettid #define CreateDirectory(name, pSecurity) mkdir(name, 0777) @@ -204,6 +229,8 @@ #define InterlockedDecrement(Append) __sync_sub_and_fetch(Append, 1) #define InterlockedDecrement64(Append) __sync_sub_and_fetch(Append, 1) #define InterlockedIncrement(Append) __sync_add_and_fetch(Append, 1) +#define InterlockedAdd(Addend, Value) __sync_add_and_fetch(Addend, Value) +#define InterlockedAdd64(Addend, Value) __sync_add_and_fetch(Addend, Value) #define _ReadWriteBarrier() asm volatile("" ::: "memory") #define PRAGMA_WARNING_PUSH_DISABLE(...) @@ -222,7 +249,16 @@ #define OSALIGNLINE(RWORD) OSALIGN(RWORD, 64) #define OSALIGNSIMD(RWORD) OSALIGN(RWORD, KNOB_SIMD_BYTES) +#if ENABLE_AVX512_SIMD16 +#define OSALIGNSIMD16(RWORD) OSALIGN(RWORD, KNOB_SIMD16_BYTES) +#endif #include "common/swr_assert.h" +#ifdef __GNUC__ +#define ATTR_UNUSED __attribute__((unused)) +#else +#define ATTR_UNUSED +#endif + #endif//__SWR_OS_H__ diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/common/rdtsc_buckets.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/common/rdtsc_buckets.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/common/rdtsc_buckets.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/common/rdtsc_buckets.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -40,19 +40,12 @@ THREAD UINT tlsThreadId = 0; -void BucketManager::RegisterThread(const std::string& name) +BucketManager::~BucketManager() { - // lazy evaluate threadviz knob - if (!mThreadViz && KNOB_BUCKETS_ENABLE_THREADVIZ) - { - uint32_t pid = GetCurrentProcessId(); - std::stringstream str; - str << "threadviz." << pid; - mThreadVizDir = str.str(); - CreateDirectory(mThreadVizDir.c_str(), NULL); +} - mThreadViz = true; - } +void BucketManager::RegisterThread(const std::string& name) +{ BUCKET_THREAD newThread; newThread.name = name; @@ -68,15 +61,6 @@ newThread.id = (UINT)id; tlsThreadId = (UINT)id; - // open threadviz file if enabled - if (mThreadViz) - { - std::stringstream ss; - ss << mThreadVizDir << PATH_SEPARATOR; - ss << "threadviz_thread." << newThread.id << ".dat"; - newThread.vizFile = fopen(ss.str().c_str(), "wb"); - } - // store new thread mThreads.push_back(newThread); @@ -167,37 +151,8 @@ } } -void BucketManager::DumpThreadViz() -{ - // ensure all thread data is flushed - mThreadMutex.lock(); - for (auto& thread : mThreads) - { - fflush(thread.vizFile); - fclose(thread.vizFile); - thread.vizFile = nullptr; - } - mThreadMutex.unlock(); - - // dump bucket descriptions - std::stringstream ss; - ss << mThreadVizDir << PATH_SEPARATOR << "threadviz_buckets.dat"; - - FILE* f = fopen(ss.str().c_str(), "wb"); - for (auto& bucket : mBuckets) - { - Serialize(f, bucket); - } - fclose(f); -} - void BucketManager::PrintReport(const std::string& filename) { - if (mThreadViz) - { - DumpThreadViz(); - } - else { FILE* f = fopen(filename.c_str(), "w"); @@ -207,12 +162,22 @@ PrintThread(f, thread); fprintf(f, "\n"); } + mThreadMutex.unlock(); fclose(f); } } + +void BucketManager::StartCapture() +{ + + printf("Capture Starting\n"); + + mCapturing = true; +} + void BucketManager_StartBucket(BucketManager* pBucketMgr, uint32_t id) { pBucketMgr->StartBucket(id); diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/common/rdtsc_buckets.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/common/rdtsc_buckets.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/common/rdtsc_buckets.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/common/rdtsc_buckets.h 2017-06-01 10:37:10.000000000 +0000 @@ -36,6 +36,7 @@ #include "rdtsc_buckets_shared.h" + // unique thread id stored in thread local storage extern THREAD UINT tlsThreadId; @@ -48,22 +49,12 @@ { public: BucketManager() { } + ~BucketManager(); // removes all registered thread data void ClearThreads() { mThreadMutex.lock(); - // close out the threadviz files if threadviz is enabled - if (KNOB_BUCKETS_ENABLE_THREADVIZ) - { - for (auto& thread : mThreads) - { - if (thread.vizFile != nullptr) - { - fclose(thread.vizFile); - } - } - } mThreads.clear(); mThreadMutex.unlock(); } @@ -86,17 +77,12 @@ /// @return unique id UINT RegisterBucket(const BUCKET_DESC& desc); - // dump threadviz data - void DumpThreadViz(); - // print report void PrintReport(const std::string& filename); + // start capturing - INLINE void StartCapture() - { - mCapturing = true; - } + void StartCapture(); // stop capturing INLINE void StopCapture() @@ -117,6 +103,9 @@ } } } + + mDoneCapturing = true; + printf("Capture Stopped\n"); } // start a bucket @@ -129,17 +118,8 @@ BUCKET_THREAD& bt = mThreads[tlsThreadId]; - // if threadviz is enabled, only need to dump start info to threads viz file - if (mThreadViz) - { - SWR_ASSERT(bt.vizFile != nullptr); - if (mBuckets[id].enableThreadViz) - { - VIZ_START_DATA data{ VIZ_START, id, __rdtsc() }; - Serialize(bt.vizFile, data); - } - } - else + uint64_t tsc = __rdtsc(); + { if (bt.pCurrent->children.size() < mBuckets.size()) { @@ -148,12 +128,13 @@ BUCKET &child = bt.pCurrent->children[id]; child.pParent = bt.pCurrent; child.id = id; - child.start = __rdtsc(); + child.start = tsc; // update thread's currently executing bucket bt.pCurrent = &child; } + bt.level++; } @@ -163,23 +144,18 @@ SWR_ASSERT(tlsThreadId < mThreads.size()); BUCKET_THREAD &bt = mThreads[tlsThreadId]; - if (bt.level == 0) return; - - if (mThreadViz) + if (bt.level == 0) { - SWR_ASSERT(bt.vizFile != nullptr); - if (mBuckets[id].enableThreadViz) - { - VIZ_STOP_DATA data{ VIZ_STOP, __rdtsc() }; - Serialize(bt.vizFile, data); - } + return; } - else + + uint64_t tsc = __rdtsc(); + { if (bt.pCurrent->start == 0) return; SWR_ASSERT(bt.pCurrent->id == id, "Mismatched buckets detected"); - bt.pCurrent->elapsed += (__rdtsc() - bt.pCurrent->start); + bt.pCurrent->elapsed += (tsc - bt.pCurrent->start); bt.pCurrent->count++; // pop to parent @@ -198,7 +174,6 @@ BUCKET_THREAD& bt = mThreads[tlsThreadId]; // don't record events for threadviz - if (!mThreadViz) { if (bt.pCurrent->children.size() < mBuckets.size()) { @@ -224,11 +199,13 @@ // is capturing currently enabled volatile bool mCapturing{ false }; + // has capturing completed + volatile bool mDoneCapturing{ false }; + std::mutex mThreadMutex; - // enable threadviz - bool mThreadViz{ false }; std::string mThreadVizDir; + }; diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/common/rdtsc_buckets_shared.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/common/rdtsc_buckets_shared.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/common/rdtsc_buckets_shared.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/common/rdtsc_buckets_shared.h 2017-06-01 10:37:10.000000000 +0000 @@ -58,6 +58,7 @@ uint32_t color; }; + struct BUCKET_THREAD { // name of thread, used in reports @@ -78,6 +79,7 @@ // threadviz file object FILE* vizFile{ nullptr }; + BUCKET_THREAD() {} BUCKET_THREAD(const BUCKET_THREAD& that) { diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/common/simd16intrin.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/common/simd16intrin.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/common/simd16intrin.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/common/simd16intrin.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,1137 @@ +/**************************************************************************** +* Copyright (C) 2014-2015 Intel Corporation. All Rights Reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice (including the next +* paragraph) shall be included in all copies or substantial portions of the +* Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +* IN THE SOFTWARE. +****************************************************************************/ + +#ifndef __SWR_SIMD16INTRIN_H__ +#define __SWR_SIMD16INTRIN_H__ + +#if ENABLE_AVX512_SIMD16 + +#if KNOB_SIMD16_WIDTH == 16 + +#if ENABLE_AVX512_EMULATION +struct simd16scalar +{ + __m256 lo; + __m256 hi; +}; +struct simd16scalard +{ + __m256d lo; + __m256d hi; +}; +struct simd16scalari +{ + __m256i lo; + __m256i hi; +}; +typedef uint16_t simd16mask; + +#define _simd16_masklo(mask) ((mask) & 0xFF) +#define _simd16_maskhi(mask) (((mask) >> 8)) +#define _simd16_setmask(hi, lo) (((hi) << 8) | (lo)) + +#else +typedef __m512 simd16scalar; +typedef __m512d simd16scalard; +typedef __m512i simd16scalari; +typedef __mmask16 simd16mask; +#endif//ENABLE_AVX512_EMULATION +#else +#error Unsupported vector width +#endif//KNOB_SIMD16_WIDTH == 16 + +OSALIGN(union, KNOB_SIMD16_BYTES) simd16vector +{ + simd16scalar v[4]; + struct + { + simd16scalar x, y, z, w; + }; + + simd16scalar& operator[] (const int i) { return v[i]; } + const simd16scalar& operator[] (const int i) const { return v[i]; } +}; + +#if ENABLE_AVX512_EMULATION + +#define SIMD16_EMU_AVX512_0(type, func, intrin) \ +INLINE type func()\ +{\ + type result;\ +\ + result.lo = intrin();\ + result.hi = intrin();\ +\ + return result;\ +} + +#define SIMD16_EMU_AVX512_1(type, func, intrin) \ +INLINE type func(type a)\ +{\ + type result;\ +\ + result.lo = intrin(a.lo);\ + result.hi = intrin(a.hi);\ +\ + return result;\ +} + +#define SIMD16_EMU_AVX512_2(type, func, intrin) \ +INLINE type func(type a, type b)\ +{\ + type result;\ +\ + result.lo = intrin(a.lo, b.lo);\ + result.hi = intrin(a.hi, b.hi);\ +\ + return result;\ +} + +#define SIMD16_EMU_AVX512_3(type, func, intrin) \ +INLINE type func(type a, type b, type c)\ +{\ + type result;\ +\ + result.lo = intrin(a.lo, b.lo, c.lo);\ + result.hi = intrin(a.hi, b.hi, c.hi);\ +\ + return result;\ +} + +SIMD16_EMU_AVX512_0(simd16scalar, _simd16_setzero_ps, _mm256_setzero_ps) +SIMD16_EMU_AVX512_0(simd16scalari, _simd16_setzero_si, _mm256_setzero_si256) + +INLINE simd16scalar _simd16_set1_ps(float a) +{ + simd16scalar result; + + result.lo = _mm256_set1_ps(a); + result.hi = _mm256_set1_ps(a); + + return result; +} + +INLINE simd16scalari _simd16_set1_epi8(char a) +{ + simd16scalari result; + + result.lo = _mm256_set1_epi8(a); + result.hi = _mm256_set1_epi8(a); + + return result; +} + +INLINE simd16scalari _simd16_set1_epi32(int a) +{ + simd16scalari result; + + result.lo = _mm256_set1_epi32(a); + result.hi = _mm256_set1_epi32(a); + + return result; +} + +INLINE simd16scalar _simd16_set_ps(float e15, float e14, float e13, float e12, float e11, float e10, float e9, float e8, float e7, float e6, float e5, float e4, float e3, float e2, float e1, float e0) +{ + simd16scalar result; + + result.lo = _mm256_set_ps(e7, e6, e5, e4, e3, e2, e1, e0); + result.hi = _mm256_set_ps(e15, e14, e13, e12, e11, e10, e9, e8); + + return result; +} + +INLINE simd16scalari _simd16_set_epi32(int e15, int e14, int e13, int e12, int e11, int e10, int e9, int e8, int e7, int e6, int e5, int e4, int e3, int e2, int e1, int e0) +{ + simd16scalari result; + + result.lo = _mm256_set_epi32(e7, e6, e5, e4, e3, e2, e1, e0); + result.hi = _mm256_set_epi32(e15, e14, e13, e12, e11, e10, e9, e8); + + return result; +} + +INLINE simd16scalar _simd16_set_ps(float e7, float e6, float e5, float e4, float e3, float e2, float e1, float e0) +{ + simd16scalar result; + + result.lo = _mm256_set_ps(e7, e6, e5, e4, e3, e2, e1, e0); + result.hi = _mm256_set_ps(e7, e6, e5, e4, e3, e2, e1, e0); + + return result; +} + +INLINE simd16scalari _simd16_set_epi32(int e7, int e6, int e5, int e4, int e3, int e2, int e1, int e0) +{ + simd16scalari result; + + result.lo = _mm256_set_epi32(e7, e6, e5, e4, e3, e2, e1, e0); + result.hi = _mm256_set_epi32(e7, e6, e5, e4, e3, e2, e1, e0); + + return result; +} + +INLINE simd16scalar _simd16_load_ps(float const *m) +{ + simd16scalar result; + + float const *n = reinterpret_cast(reinterpret_cast(m) + sizeof(result.lo)); + + result.lo = _mm256_load_ps(m); + result.hi = _mm256_load_ps(n); + + return result; +} + +INLINE simd16scalar _simd16_loadu_ps(float const *m) +{ + simd16scalar result; + + float const *n = reinterpret_cast(reinterpret_cast(m) + sizeof(result.lo)); + + result.lo = _mm256_loadu_ps(m); + result.hi = _mm256_loadu_ps(n); + + return result; +} + +INLINE simd16scalar _simd16_load1_ps(float const *m) +{ + simd16scalar result; + + result.lo = _mm256_broadcast_ss(m); + result.hi = _mm256_broadcast_ss(m); + + return result; +} + +INLINE simd16scalari _simd16_load_si(simd16scalari const *m) +{ + simd16scalari result; + + result.lo = _mm256_load_si256(&m[0].lo); + result.hi = _mm256_load_si256(&m[0].hi); + + return result; +} + +INLINE simd16scalari _simd16_loadu_si(simd16scalari const *m) +{ + simd16scalari result; + + result.lo = _mm256_loadu_si256(&m[0].lo); + result.hi = _mm256_loadu_si256(&m[0].hi); + + return result; +} + +INLINE simd16scalar _simd16_broadcast_ss(float const *m) +{ + simd16scalar result; + + result.lo = _mm256_broadcast_ss(m); + result.hi = _mm256_broadcast_ss(m); + + return result; +} + +INLINE simd16scalar _simd16_broadcast_ps(__m128 const *m) +{ + simd16scalar result; + + result.lo = _mm256_broadcast_ps(m); + result.hi = _mm256_broadcast_ps(m); + + return result; +} + +INLINE void _simd16_store_ps(float *m, simd16scalar a) +{ + float *n = reinterpret_cast(reinterpret_cast(m) + sizeof(a.lo)); + + _mm256_store_ps(m, a.lo); + _mm256_store_ps(n, a.hi); +} + +INLINE void _simd16_maskstore_ps(float *m, simd16scalari mask, simd16scalar a) +{ + float *n = reinterpret_cast(reinterpret_cast(m) + sizeof(a.lo)); + + _mm256_maskstore_ps(m, mask.lo, a.lo); + _mm256_maskstore_ps(n, mask.hi, a.hi); +} + +INLINE void _simd16_store_si(simd16scalari *m, simd16scalari a) +{ + _mm256_store_si256(&m[0].lo, a.lo); + _mm256_store_si256(&m[0].hi, a.hi); +} + +INLINE simdscalar _simd16_extract_ps(simd16scalar a, int imm8) +{ + switch (imm8) + { + case 0: + return a.lo; + case 1: + return a.hi; + } + return _simd_set1_ps(0.0f); +} + +INLINE simdscalari _simd16_extract_si(simd16scalari a, int imm8) +{ + switch (imm8) + { + case 0: + return a.lo; + case 1: + return a.hi; + } + return _simd_set1_epi32(0); +} + +INLINE simd16scalar _simd16_insert_ps(simd16scalar a, simdscalar b, int imm8) +{ + switch (imm8) + { + case 0: + a.lo = b; + break; + case 1: + a.hi = b; + break; + } + return a; +} + +INLINE simd16scalari _simd16_insert_si(simd16scalari a, simdscalari b, int imm8) +{ + switch (imm8) + { + case 0: + a.lo = b; + break; + case 1: + a.hi = b; + break; + } + return a; +} + +template +INLINE simd16scalar _simd16_blend_ps_temp(simd16scalar a, simd16scalar b) +{ + simd16scalar result; + + result.lo = _mm256_blend_ps(a.lo, b.lo, _simd16_masklo(mask)); + result.hi = _mm256_blend_ps(a.hi, b.hi, _simd16_maskhi(mask)); + + return result; +} + +#define _simd16_blend_ps(a, b, mask) _simd16_blend_ps_temp(a, b) + +SIMD16_EMU_AVX512_3(simd16scalar, _simd16_blendv_ps, _mm256_blendv_ps) + +INLINE simd16scalari _simd16_blendv_epi32(simd16scalari a, simd16scalari b, const simd16scalar mask) +{ + simd16scalari result; + + result.lo = _mm256_castps_si256(_mm256_blendv_ps(_mm256_castsi256_ps(a.lo), _mm256_castsi256_ps(b.lo), mask.lo)); + result.hi = _mm256_castps_si256(_mm256_blendv_ps(_mm256_castsi256_ps(a.hi), _mm256_castsi256_ps(b.hi), mask.hi)); + + return result; +} + +INLINE simd16scalari _simd16_blendv_epi32(simd16scalari a, simd16scalari b, const simd16scalari mask) +{ + simd16scalari result; + + result.lo = _mm256_castps_si256(_mm256_blendv_ps(_mm256_castsi256_ps(a.lo), _mm256_castsi256_ps(b.lo), _mm256_castsi256_ps(mask.lo))); + result.hi = _mm256_castps_si256(_mm256_blendv_ps(_mm256_castsi256_ps(a.hi), _mm256_castsi256_ps(b.hi), _mm256_castsi256_ps(mask.hi))); + + return result; +} + +SIMD16_EMU_AVX512_2(simd16scalar, _simd16_mul_ps, _mm256_mul_ps) +SIMD16_EMU_AVX512_2(simd16scalar, _simd16_add_ps, _mm256_add_ps) +SIMD16_EMU_AVX512_2(simd16scalar, _simd16_sub_ps, _mm256_sub_ps) +SIMD16_EMU_AVX512_1(simd16scalar, _simd16_rsqrt_ps, _mm256_rsqrt_ps) +SIMD16_EMU_AVX512_2(simd16scalar, _simd16_min_ps, _mm256_min_ps) +SIMD16_EMU_AVX512_2(simd16scalar, _simd16_max_ps, _mm256_max_ps) + +INLINE simd16mask _simd16_movemask_ps(simd16scalar a) +{ + simd16mask mask; + + reinterpret_cast(&mask)[0] = _mm256_movemask_ps(a.lo); + reinterpret_cast(&mask)[1] = _mm256_movemask_ps(a.hi); + + return mask; +} + +INLINE simd16mask _simd16_movemask_pd(simd16scalard a) +{ + simd16mask mask; + + reinterpret_cast(&mask)[0] = _mm256_movemask_pd(a.lo); + reinterpret_cast(&mask)[1] = _mm256_movemask_pd(a.hi); + + return mask; +} + +INLINE simd16mask _simd16_movemask_epi8(simd16scalari a) +{ + simd16mask mask; + + reinterpret_cast(&mask)[0] = _mm256_movemask_epi8(a.lo); + reinterpret_cast(&mask)[1] = _mm256_movemask_epi8(a.hi); + + return mask; +} + +INLINE simd16scalari _simd16_cvtps_epi32(simd16scalar a) +{ + simd16scalari result; + + result.lo = _mm256_cvtps_epi32(a.lo); + result.hi = _mm256_cvtps_epi32(a.hi); + + return result; +} + +INLINE simd16scalari _simd16_cvttps_epi32(simd16scalar a) +{ + simd16scalari result; + + result.lo = _mm256_cvttps_epi32(a.lo); + result.hi = _mm256_cvttps_epi32(a.hi); + + return result; +} + +INLINE simd16scalar _simd16_cvtepi32_ps(simd16scalari a) +{ + simd16scalar result; + + result.lo = _mm256_cvtepi32_ps(a.lo); + result.hi = _mm256_cvtepi32_ps(a.hi); + + return result; +} + +template +INLINE simd16scalar _simd16_cmp_ps(simd16scalar a, simd16scalar b) +{ + simd16scalar result; + + result.lo = _mm256_cmp_ps(a.lo, b.lo, comp); + result.hi = _mm256_cmp_ps(a.hi, b.hi, comp); + + return result; +} + +#define _simd16_cmplt_ps(a, b) _simd16_cmp_ps<_CMP_LT_OQ>(a, b) +#define _simd16_cmpgt_ps(a, b) _simd16_cmp_ps<_CMP_GT_OQ>(a, b) +#define _simd16_cmpneq_ps(a, b) _simd16_cmp_ps<_CMP_NEQ_OQ>(a, b) +#define _simd16_cmpeq_ps(a, b) _simd16_cmp_ps<_CMP_EQ_OQ>(a, b) +#define _simd16_cmpge_ps(a, b) _simd16_cmp_ps<_CMP_GE_OQ>(a, b) +#define _simd16_cmple_ps(a, b) _simd16_cmp_ps<_CMP_LE_OQ>(a, b) + +SIMD16_EMU_AVX512_2(simd16scalar, _simd16_and_ps, _simd_and_ps) +SIMD16_EMU_AVX512_2(simd16scalar, _simd16_or_ps, _simd_or_ps) +SIMD16_EMU_AVX512_1(simd16scalar, _simd16_rcp_ps, _simd_rcp_ps) +SIMD16_EMU_AVX512_2(simd16scalar, _simd16_div_ps, _simd_div_ps) + +INLINE simd16scalar _simd16_castsi_ps(simd16scalari a) +{ + return *reinterpret_cast(&a); +} + +INLINE simd16scalari _simd16_castps_si(simd16scalar a) +{ + return *reinterpret_cast(&a); +} + +INLINE simd16scalard _simd16_castsi_pd(simd16scalari a) +{ + return *reinterpret_cast(&a); +} + +INLINE simd16scalari _simd16_castpd_si(simd16scalard a) +{ + return *reinterpret_cast(&a); +} + +INLINE simd16scalar _simd16_castpd_ps(simd16scalard a) +{ + return *reinterpret_cast(&a); +} + +INLINE simd16scalard _simd16_castps_pd(simd16scalar a) +{ + return *reinterpret_cast(&a); +} + +SIMD16_EMU_AVX512_2(simd16scalar, _simd16_andnot_ps, _mm256_andnot_ps) + +template +INLINE simd16scalar _simd16_round_ps_temp(simd16scalar a) +{ + simd16scalar result; + + result.lo = _mm256_round_ps(a.lo, mode); + result.hi = _mm256_round_ps(a.hi, mode); + + return result; +} + +#define _simd16_round_ps(a, mode) _simd16_round_ps_temp(a) + +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_mul_epi32, _simd_mul_epi32) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_mullo_epi32, _simd_mullo_epi32) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_sub_epi32, _simd_sub_epi32) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_sub_epi64, _simd_sub_epi64) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_min_epi32, _simd_min_epi32) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_max_epi32, _simd_max_epi32) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_min_epu32, _simd_min_epu32) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_max_epu32, _simd_max_epu32) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_add_epi32, _simd_add_epi32) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_and_si, _simd_and_si) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_andnot_si, _simd_andnot_si) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_or_si, _simd_or_si) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_xor_si, _simd_xor_si) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_cmpeq_epi32, _simd_cmpeq_epi32) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_cmpgt_epi32, _simd_cmpgt_epi32) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_cmplt_epi32, _simd_cmplt_epi32) + +INLINE int _simd16_testz_ps(simd16scalar a, simd16scalar b) +{ + int lo = _mm256_testz_ps(a.lo, b.lo); + int hi = _mm256_testz_ps(a.hi, b.hi); + + return lo & hi; +} + +#define _simd16_cmplt_epi32(a, b) _simd16_cmpgt_epi32(b, a) + +SIMD16_EMU_AVX512_2(simd16scalar, _simd16_unpacklo_ps, _simd_unpacklo_ps) +SIMD16_EMU_AVX512_2(simd16scalar, _simd16_unpackhi_ps, _simd_unpackhi_ps) +SIMD16_EMU_AVX512_2(simd16scalard, _simd16_unpacklo_pd, _simd_unpacklo_pd) +SIMD16_EMU_AVX512_2(simd16scalard, _simd16_unpackhi_pd, _simd_unpackhi_pd) + +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_unpacklo_epi8, _simd_unpacklo_epi8) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_unpackhi_epi8, _simd_unpackhi_epi8) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_unpacklo_epi16, _simd_unpacklo_epi16) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_unpackhi_epi16, _simd_unpackhi_epi16) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_unpacklo_epi32, _simd_unpacklo_epi32) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_unpackhi_epi32, _simd_unpackhi_epi32) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_unpacklo_epi64, _simd_unpacklo_epi64) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_unpackhi_epi64, _simd_unpackhi_epi64) + +template +INLINE simd16scalari _simd16_slli_epi32_temp(simd16scalari a) +{ + simd16scalari result; + + result.lo = _simd_slli_epi32(a.lo, imm8); + result.hi = _simd_slli_epi32(a.hi, imm8); + + return result; +} + +#define _simd16_slli_epi32(a, imm8) _simd16_slli_epi32_temp(a) + +template +INLINE simd16scalari _simd16_srai_epi32_temp(simd16scalari a) +{ + simd16scalari result; + + result.lo = _simd_srai_epi32(a.lo, imm8); + result.hi = _simd_srai_epi32(a.hi, imm8); + + return result; +} + +#define _simd16_srai_epi32(a, imm8) _simd16_srai_epi32_temp(a) + +template +INLINE simd16scalari _simd16_srli_epi32_temp(simd16scalari a) +{ + simd16scalari result; + + result.lo = _simd_srli_epi32(a.lo, imm8); + result.hi = _simd_srli_epi32(a.hi, imm8); + + return result; +} + +#define _simd16_srli_epi32(a, imm8) _simd16_srli_epi32_temp(a) + +SIMD16_EMU_AVX512_3(simd16scalar, _simd16_fmadd_ps, _simd_fmadd_ps) +SIMD16_EMU_AVX512_3(simd16scalar, _simd16_fmsub_ps, _simd_fmsub_ps) + +//__m256 _simd_i32gather_ps(const float* pBase, __m256i vOffsets, const int scale) +template +INLINE simd16scalar _simd16_i32gather_ps_temp(const float *m, simd16scalari index) +{ + simd16scalar result; + + result.lo = _simd_i32gather_ps(m, index.lo, scale); + result.hi = _simd_i32gather_ps(m, index.hi, scale); + + return result; +} + +#define _simd16_i32gather_ps(m, index, scale) _simd16_i32gather_ps_temp(m, index) + +//__m256 _simd_mask_i32gather_ps(__m256 vSrc, const float* pBase, __m256i vOffsets, __m256 vMask, const int scale) +template +INLINE simd16scalar _simd16_mask_i32gather_ps_temp(simd16scalar a, const float *m, simd16scalari index, simd16scalari mask) +{ + simd16scalar result; + + result.lo = _simd_mask_i32gather_ps(a.lo, m, index.lo, _simd_castsi_ps(mask.lo), scale); + result.hi = _simd_mask_i32gather_ps(a.hi, m, index.hi, _simd_castsi_ps(mask.hi), scale); + + return result; +} + +#define _simd16_mask_i32gather_ps(a, m, index, mask, scale) _simd16_mask_i32gather_ps_temp(a, m, mask, index) + +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_shuffle_epi8, _simd_shuffle_epi8) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_adds_epu8, _simd_adds_epu8) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_subs_epu8, _simd_subs_epu8) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_add_epi8, _simd_add_epi8) +SIMD16_EMU_AVX512_1(simd16scalari, _simd16_abs_epi32, _simd_abs_epi32) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_cmpeq_epi64, _simd_cmpeq_epi64) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_cmpgt_epi64, _simd_cmpgt_epi64) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_cmpeq_epi16, _simd_cmpeq_epi16) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_cmpgt_epi16, _simd_cmpgt_epi16) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_cmpeq_epi8, _simd_cmpeq_epi8) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_cmpgt_epi8, _simd_cmpgt_epi8) + +INLINE simd16scalar _simd16_permute_ps(simd16scalar a, simd16scalari i) +{ + simd16scalar result; + + const simdscalari mask = _simd_set1_epi32(7); + + simdscalar lolo = _simd_permute_ps(a.lo, _simd_and_si(i.lo, mask)); + simdscalar lohi = _simd_permute_ps(a.hi, _simd_and_si(i.lo, mask)); + + simdscalar hilo = _simd_permute_ps(a.lo, _simd_and_si(i.hi, mask)); + simdscalar hihi = _simd_permute_ps(a.hi, _simd_and_si(i.hi, mask)); + + result.lo = _simd_blendv_ps(lolo, lohi, _simd_castsi_ps(_simd_cmpgt_epi32(i.lo, mask))); + result.hi = _simd_blendv_ps(hilo, hihi, _simd_castsi_ps(_simd_cmpgt_epi32(i.hi, mask))); + + return result; +} + +INLINE simd16scalari _simd16_permute_epi32(simd16scalari a, simd16scalari i) +{ + return _simd16_castps_si(_simd16_permute_ps(_simd16_castsi_ps(a), i)); +} + +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_srlv_epi32, _simd_srlv_epi32) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_sllv_epi32, _simd_sllv_epi32) + +template +INLINE simd16scalar _simd16_permute2f128_ps_temp(simd16scalar a, simd16scalar b) +{ + simd16scalar result; + + result.lo = _simd_permute2f128_ps(a.lo, a.hi, ((imm8 & 0x03) << 0) | ((imm8 & 0x0C) << 2)); + result.hi = _simd_permute2f128_ps(b.lo, b.hi, ((imm8 & 0x30) >> 4) | ((imm8 & 0xC0) >> 2)); + + return result; +} + +#define _simd16_permute2f128_ps(a, b, imm8) _simd16_permute2f128_ps_temp(a, b) + +template +INLINE simd16scalard _simd16_permute2f128_pd_temp(simd16scalard a, simd16scalard b) +{ + simd16scalard result; + + result.lo = _simd_permute2f128_pd(a.lo, a.hi, ((imm8 & 0x03) << 0) | ((imm8 & 0x0C) << 2)); + result.hi = _simd_permute2f128_pd(b.lo, b.hi, ((imm8 & 0x30) >> 4) | ((imm8 & 0xC0) >> 2)); + + return result; +} + +#define _simd16_permute2f128_pd(a, b, imm8) _simd16_permute2f128_pd_temp(a, b) + +template +INLINE simd16scalari _simd16_permute2f128_si_temp(simd16scalari a, simd16scalari b) +{ + simd16scalari result; + + result.lo = _simd_permute2f128_si(a.lo, a.hi, ((imm8 & 0x03) << 0) | ((imm8 & 0x0C) << 2)); + result.hi = _simd_permute2f128_si(b.lo, b.hi, ((imm8 & 0x30) >> 4) | ((imm8 & 0xC0) >> 2)); + + return result; +} + +#define _simd16_permute2f128_si(a, b, imm8) _simd16_permute2f128_si_temp(a, b) + +template +INLINE simd16scalar _simd16_shuffle_ps_temp(simd16scalar a, simd16scalar b) +{ + simd16scalar result; + + result.lo = _simd_shuffle_ps(a.lo, b.lo, imm8); + result.hi = _simd_shuffle_ps(a.hi, b.hi, imm8); + + return result; +} + +#define _simd16_shuffle_ps(a, b, imm8) _simd16_shuffle_ps_temp(a, b) + +template +INLINE simd16scalard _simd16_shuffle_pd_temp(simd16scalard a, simd16scalard b) +{ + simd16scalard result; + + result.lo = _simd_shuffle_pd(a.lo, b.lo, (imm8 & 15)); + result.hi = _simd_shuffle_pd(a.hi, b.hi, (imm8 >> 4)); + + return result; +} + +#define _simd16_shuffle_pd(a, b, imm8) _simd16_shuffle_pd_temp(a, b) + +template +INLINE simd16scalari _simd16_shuffle_epi32_temp(simd16scalari a, simd16scalari b) +{ + return _simd16_castps_si(_simd16_shuffle_ps(_simd16_castsi_ps(a), _simd16_castsi_ps(b), imm8)); +} + +#define _simd16_shuffle_epi32(a, b, imm8) _simd16_shuffle_epi32_temp(a, b) + +template +INLINE simd16scalari _simd16_shuffle_epi64_temp(simd16scalari a, simd16scalari b) +{ + return _simd16_castpd_si(_simd16_shuffle_pd(_simd16_castsi_pd(a), _simd16_castsi_pd(b), imm8)); +} + +#define _simd16_shuffle_epi64(a, b, imm8) _simd16_shuffle_epi64_temp(a, b) + +INLINE simd16scalari _simd16_cvtepu8_epi16(simdscalari a) +{ + simd16scalari result; + + result.lo = _simd_cvtepu8_epi16(_mm256_extractf128_si256(a, 0)); + result.hi = _simd_cvtepu8_epi16(_mm256_extractf128_si256(a, 1)); + + return result; +} + +INLINE simd16scalari _simd16_cvtepu8_epi32(__m128i a) +{ + simd16scalari result; + + result.lo = _simd_cvtepu8_epi32(a); + result.hi = _simd_cvtepu8_epi32(_mm_srli_si128(a, 8)); + + return result; +} + +INLINE simd16scalari _simd16_cvtepu16_epi32(simdscalari a) +{ + simd16scalari result; + + result.lo = _simd_cvtepu16_epi32(_mm256_extractf128_si256(a, 0)); + result.hi = _simd_cvtepu16_epi32(_mm256_extractf128_si256(a, 1)); + + return result; +} + +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_packus_epi16, _simd_packus_epi16) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_packs_epi16, _simd_packs_epi16) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_packus_epi32, _simd_packus_epi32) +SIMD16_EMU_AVX512_2(simd16scalari, _simd16_packs_epi32, _simd_packs_epi32) + +INLINE simd16mask _simd16_int2mask(int mask) +{ + return mask; +} + +INLINE int _simd16_mask2int(simd16mask mask) +{ + return mask; +} + +INLINE simd16mask _simd16_cmplt_ps_mask(simd16scalar a, simd16scalar b) +{ + return _simd16_movemask_ps(_simd16_cmplt_ps(a, b)); +} + +// convert bitmask to vector mask +INLINE simd16scalar vMask16(int32_t mask) +{ + simd16scalari temp = _simd16_set1_epi32(mask); + + simd16scalari bits = _simd16_set_epi32(0x8000, 0x4000, 0x2000, 0x1000, 0x0800, 0x0400, 0x0200, 0x0100, 0x0080, 0x0040, 0x0020, 0x0010, 0x0008, 0x0004, 0x0002, 0x0001); + + simd16scalari result = _simd16_cmplt_epi32(_simd16_setzero_si(), _simd16_and_si(temp, bits)); + + return _simd16_castsi_ps(result); +} + +#else + +INLINE simd16mask _simd16_scalari2mask(simd16scalari mask) +{ + return _mm512_cmpneq_epu32_mask(mask, _mm512_setzero_epi32()); +} + +#if 0 +INLINE simd16mask _simd16_scalard2mask(simd16scalard mask) +{ + return _mm512_cmpneq_epu64_mask(mask, _mm512_setzero_epi64()); +} +#endif + +#define _simd16_setzero_ps _mm512_setzero_ps +#define _simd16_setzero_si _mm512_setzero_si512 +#define _simd16_set1_ps _mm512_set1_ps +#define _simd16_set1_epi8 _mm512_set1_epi8 +#define _simd16_set1_epi32 _mm512_set1_epi32 + +INLINE simd16scalar _simd16_set_ps(float e15, float e14, float e13, float e12, float e11, float e10, float e9, float e8, float e7, float e6, float e5, float e4, float e3, float e2, float e1, float e0) +{ + return _mm512_set_ps(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0); +} + +INLINE simd16scalari _simd16_set_epi32(int e15, int e14, int e13, int e12, int e11, int e10, int e9, int e8, int e7, int e6, int e5, int e4, int e3, int e2, int e1, int e0) +{ + return _mm512_set_epi32(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, e2, e1, e0); +} + +INLINE simd16scalar _simd16_set_ps(float e7, float e6, float e5, float e4, float e3, float e2, float e1, float e0) +{ + return _mm512_set_ps(e7, e6, e5, e4, e3, e2, e1, e0, e7, e6, e5, e4, e3, e2, e1, e0); +} + +INLINE simd16scalari _simd16_set_epi32(int e7, int e6, int e5, int e4, int e3, int e2, int e1, int e0) +{ + return _mm512_set_epi32(e7, e6, e5, e4, e3, e2, e1, e0, e7, e6, e5, e4, e3, e2, e1, e0); +} + +#define _simd16_load_ps _mm512_load_ps +#define _simd16_loadu_ps _mm512_loadu_ps +#if 1 +#define _simd16_load1_ps _simd16_broadcast_ss +#endif +#define _simd16_load_si _mm512_load_si512 +#define _simd16_loadu_si _mm512_loadu_si512 +#define _simd16_broadcast_ss(m) _mm512_extload_ps(m, _MM_UPCONV_PS_NONE, _MM_BROADCAST_1X16, 0) +#define _simd16_broadcast_ps(m) _mm512_extload_ps(m, _MM_UPCONV_PS_NONE, _MM_BROADCAST_4X16, 0) +#define _simd16_store_ps _mm512_store_ps +#define _simd16_store_si _mm512_store_si512 +#define _simd16_extract_ps _mm512_extractf32x8_ps +#define _simd16_extract_si _mm512_extracti32x8_epi32 +#define _simd16_insert_ps _mm512_insertf32x8 +#define _simd16_insert_si _mm512_inserti32x8 + +INLINE void _simd16_maskstore_ps(float *m, simd16scalari mask, simd16scalar a) +{ + simd16mask k = _simd16_scalari2mask(mask); + + _mm512_mask_store_ps(m, k, a); +} + +#define _simd16_blend_ps(a, b, mask) _mm512_mask_blend_ps(mask, a, b) + +INLINE simd16scalar _simd16_blendv_ps(simd16scalar a, simd16scalar b, const simd16scalar mask) +{ + simd16mask k = _simd16_scalari2mask(_mm512_castps_si512(mask)); + + _mm512_mask_blend_ps(k, a, b); +} + +INLINE simd16scalari _simd16_blendv_epi32(simd16scalari a, simd16scalari b, const simd16scalar mask) +{ + simd16mask k = _simd16_scalari2mask(_mm512_castps_si512(mask)); + + _mm512_mask_blend_epi32(k, a, b); +} + +INLINE simd16scalari _simd16_blendv_epi32(simd16scalari a, simd16scalari b, const simd16scalari mask) +{ + simd16mask k = _simd16_scalari2mask(mask); + + _mm512_mask_blend_epi32(k, a, b); +} + +#define _simd16_mul_ps _mm512_mul_ps +#define _simd16_add_ps _mm512_add_ps +#define _simd16_sub_ps _mm512_sub_ps +#define _simd16_rsqrt_ps _mm512_rsqrt14_ps +#define _simd16_min_ps _mm512_min_ps +#define _simd16_max_ps _mm512_max_ps + +INLINE simd16mask _simd16_movemask_ps(simd16scalar a) +{ + return _simd16_scalari2mask(_mm512_castps_si512(a)); +} + +#if 0 +INLINE simd16mask _simd16_movemask_pd(simd16scalard a) +{ + return _simd16_scalard2mask(_mm512i_castpd_si512(a)); +} +#endif + +#if 0 +INLINE int _simd16_movemask_epi8(simd16scalari a) +{ + return _simd16_scalar2mask(a); +} +#endif + +#define _simd16_cvtps_epi32 _mm512_cvtps_epi32 +#define _simd16_cvttps_epi32 _mm512_cvttps_epi32 +#define _simd16_cvtepi32_ps _mm512_cvtepi32_ps + +template +INLINE simd16scalar _simd16_cmp_ps_temp(simd16scalar a, simd16scalar b) +{ + simd16mask k = _mm512_cmpeq_ps_mask(a, b); + + return _mm512_castsi512_ps(_mm512_mask_blend_epi32(k, _mm512_setzero_epi32(), _mm512_set1_epi32(0xFFFFFFFF))); +} + +#define _simd16_cmp_ps(a, b, comp) _simd16_cmp_ps_temp(a, b) + +#define _simd16_cmplt_ps(a, b) _simd16_cmp_ps<_CMP_LT_OQ>(a, b) +#define _simd16_cmpgt_ps(a, b) _simd16_cmp_ps<_CMP_GT_OQ>(a, b) +#define _simd16_cmpneq_ps(a, b) _simd16_cmp_ps<_CMP_NEQ_OQ>(a, b) +#define _simd16_cmpeq_ps(a, b) _simd16_cmp_ps<_CMP_EQ_OQ>(a, b) +#define _simd16_cmpge_ps(a, b) _simd16_cmp_ps<_CMP_GE_OQ>(a, b) +#define _simd16_cmple_ps(a, b) _simd16_cmp_ps<_CMP_LE_OQ>(a, b) + +#define _simd16_castsi_ps _mm512_castsi512_ps +#define _simd16_castps_si _mm512_castps_si512 +#define _simd16_castsi_pd _mm512_castsi512_pd +#define _simd16_castpd_si _mm512_castpd_si512 +#define _simd16_castpd_ps _mm512_castpd_ps +#define _simd16_castps_pd _mm512_castps_pd + +#define _simd16_andnot_ps _mm512_andnot_ps + +template +INLINE simd16scalar _simd16_round_ps_temp(simd16scalar a) +{ + return _mm512_roundscale_ps(a, mode); +} + +#define _simd16_round_ps(a, mode) _simd16_round_ps_temp(a) + +#define _simd16_mul_epi32 _mm512_mul_epi32 +#define _simd16_mullo_epi32 _mm512_mullo_epi32 +#define _simd16_sub_epi32 _mm512_sub_epi32 +#define _simd16_sub_epi64 _mm512_sub_epi64 +#define _simd16_min_epi32 _mm512_min_epi32 +#define _simd16_max_epi32 _mm512_max_epi32 +#define _simd16_min_epu32 _mm512_min_epu32 +#define _simd16_max_epu32 _mm512_max_epu32 +#define _simd16_add_epi32 _mm512_add_epi32 +#define _simd16_and_si _mm512_and_si512 +#define _simd16_andnot_si _mm512_andnot_si512 +#define _simd16_or_si _mm512_or_si512 +#define _simd16_xor_si _mm512_xor_si512 + +INLINE simd16scalari _simd16_cmpeq_epi32(simd16scalari a, simd16scalari b) +{ + simd16mask k = _mm512_cmpeq_epi32_mask(a, b); + + return _mm512_mask_blend_epi32(k, _mm512_setzero_epi32(), _mm512_set1_epi32(0xFFFFFFFF)); +} + +INLINE simd16scalari _simd16_cmpgt_epi32(simd16scalari a, simd16scalari b) +{ + simd16mask k = _mm512_cmpgt_epi32_mask(a, b); + + return _mm512_mask_blend_epi32(k, _mm512_setzero_epi32(), _mm512_set1_epi32(0xFFFFFFFF)); +} + +INLINE simd16scalari _simd16_cmplt_epi32(simd16scalari a, simd16scalari b) +{ + simd16mask k = _mm512_cmplt_epi32_mask(a, b); + + return _mm512_mask_blend_epi32(k, _mm512_setzero_epi32(), _mm512_set1_epi32(0xFFFFFFFF)); +} + +#if 0 +INLINE int _simd16_testz_ps(simd16scalar a, simd16scalar b) +{ + int lo = _mm256_testz_ps(a.lo, b.lo); + int hi = _mm256_testz_ps(a.hi, b.hi); + + return lo & hi; +} + +#endif + +#define _simd16_unpacklo_ps _mm512_unpacklo_ps +#define _simd16_unpackhi_ps _mm512_unpackhi_ps +#define _simd16_unpacklo_pd _mm512_unpacklo_pd +#define _simd16_unpackhi_pd _mm512_unpackhi_pd +#define _simd16_unpacklo_epi8 _mm512_unpacklo_epi8 +#define _simd16_unpackhi_epi8 _mm512_unpackhi_epi8 +#define _simd16_unpacklo_epi16 _mm512_unpacklo_epi16 +#define _simd16_unpackhi_epi16 _mm512_unpackhi_epi16 +#define _simd16_unpacklo_epi32 _mm512_unpacklo_epi32 +#define _simd16_unpackhi_epi32 _mm512_unpackhi_epi32 +#define _simd16_unpacklo_epi64 _mm512_unpacklo_epi64 +#define _simd16_unpackhi_epi64 _mm512_unpackhi_epi64 +#define _simd16_slli_epi32 _mm512_slli_epi32 +#define _simd16_srli_epi32 _mm512_srli_epi32 +#define _simd16_srai_epi32 _mm512_srai_epi32 +#define _simd16_fmadd_ps _mm512_fmadd_ps +#define _simd16_fmsub_ps _mm512_fmsub_ps +#define _simd16_adds_epu8 _mm512_adds_epu8 +#define _simd16_subs_epu8 _mm512_subs_epu8 +#define _simd16_add_epi8 _mm512_add_epi8 +#define _simd16_shuffle_epi8 _mm512_shuffle_epi8 + +#define _simd16_fmadd_ps _mm512_fmadd_ps +#define _simd16_fmsub_ps _mm512_fmsub_ps + +#define _simd16_i32gather_ps(m, index, scale) _mm512_i32gather_ps(index, m, scale) +#define _simd16_mask_i32gather_ps(a, m, index, mask, scale) _mm512_mask_i32gather_ps(a, m, index, mask, scale) + +#define _simd16_abs_epi32 _mm512_abs_epi32 +#define _simd16_cmpeq_epi64 _mm512_abs_epi32 + +INLINE simd16scalari _simd16_cmpeq_epi64(simd16scalari a, simd16scalari b) +{ + __mmask8 k = _mm512_cmpeq_epi64_mask(a, b); + + return _mm512_mask_blend_epi64(k, _mm512_setzero_si512(), _mm512_set1_epi32(0xFFFFFFFF)); +} + +INLINE simd16scalari _simd16_cmpgt_epi64(simd16scalari a, simd16scalari b) +{ + __mmask8 k = _mm512_cmpgt_epi64_mask(a, b); + + return _mm512_mask_blend_epi64(k, _mm512_setzero_si512(), _mm512_set1_epi32(0xFFFFFFFF)); +} + +INLINE simd16scalari _simd16_cmpeq_epi16(simd16scalari a, simd16scalari b) +{ + __mmask32 k = _mm512_cmpeq_epi16_mask(a, b); + + return _mm512_mask_blend_epi16(k, _mm512_setzero_si512(), _mm512_set1_epi32(0xFFFFFFFF)); +} + +INLINE simd16scalari _simd16_cmpgt_epi16(simd16scalari a, simd16scalari b) +{ + __mmask32 k = _mm512_cmpgt_epi16_mask(a, b); + + return _mm512_mask_blend_epi16(k, _mm512_setzero_si512(), _mm512_set1_epi32(0xFFFFFFFF)); +} + +INLINE simd16scalari _simd16_cmpeq_epi8(simd16scalari a, simd16scalari b) +{ + __mmask64 k = _mm512_cmpeq_epi8_mask(a, b); + + return _mm512_mask_blend_epi8(k, _mm512_setzero_si512(), _mm512_set1_epi32(0xFFFFFFFF)); +} + +INLINE simd16scalari _simd16_cmpgt_epi8(simd16scalari a, simd16scalari b) +{ + __mmask64 k = _mm512_cmpgt_epi8_mask(a, b); + + return _mm512_mask_blend_epi8(k, _mm512_setzero_si512(), _mm512_set1_epi32(0xFFFFFFFF)); +} + +#define _simd16_permute_ps(a, i) _mm512_permutexvar_ps(i, a) +#define _simd16_permute_epi32(a, i) _mm512_permutexvar_epi32(i, a) +#define _simd16_sllv_epi32 _mm512_srlv_epi32 +#define _simd16_srlv_epi32 _mm512_sllv_epi32 +#define _simd16_permute2f128_ps _mm512_shuffle_f32x4 +#define _simd16_permute2f128_pd _mm512_shuffle_f64x2 +#define _simd16_permute2f128_si _mm512_shuffle_i32x4 +#define _simd16_shuffle_ps _mm512_shuffle_ps +#define _simd16_shuffle_pd _mm512_shuffle_pd +#define _simd16_cvtepu8_epi16 _mm512_cvtepu8_epi16 +#define _simd16_cvtepu8_epi32 _mm512_cvtepu8_epi32 +#define _simd16_cvtepu16_epi32 _mm512_cvtepu16_epi32 +#define _simd16_packus_epi16 _mm512_packus_epi16 +#define _simd16_packs_epi16 _mm512_packs_epi16 +#define _simd16_packus_epi32 _mm512_packus_epi32 +#define _simd16_packs_epi32 _mm512_packs_epi32 + +template +INLINE simd16scalari _simd16_shuffle_epi32_temp(simd16scalari a, simd16scalari b) +{ + return _simd16_castps_si(_simd16_shuffle_ps(_simd16_castsi_ps(a), _simd16_castsi_ps(b), imm8)); +} + +#define _simd16_shuffle_epi32(a, b, imm8) _simd16_shuffle_epi32_temp(a, b) + +template +INLINE simd16scalari _simd16_shuffle_epi64_temp(simd16scalari a, simd16scalari b) +{ + return _simd16_castpd_si(_simd16_shuffle_pd(_simd16_castsi_pd(a), _simd16_castsi_pd(b), imm8)); +} + +#define _simd16_shuffle_epi64(a, b, imm8) _simd16_shuffle_epi64_temp(a, b) + +INLINE simd16mask _simd16_int2mask(int mask) +{ + return _mm512_int2mask(mask); +} + +INLINE int _simd16_mask2int(simd16mask mask) +{ + return _mm512_mask2int(mask); +} + +INLINE simd16mask _simd16_cmplt_ps_mask(simd16scalar a, simd16scalar b) +{ + return _mm512_cmplt_ps_mask(a, b); +} + +// convert bitmask to vector mask +INLINE simd16scalar vMask16(int32_t mask) +{ + simd16scalari temp = _simd16_set1_epi32(mask); + + simd16scalari bits = _simd16_set_epi32(0x8000, 0x4000, 0x2000, 0x1000, 0x0800, 0x0400, 0x0200, 0x0100, 0x0080, 0x0040, 0x0020, 0x0010, 0x0008, 0x0004, 0x0002, 0x0001); + + simd16scalari result = _simd16_cmplt_epi32(_simd16_setzero_si(), _simd16_and_si(temp, bits)); + + return _simd16_castsi_ps(result); +} + +#endif//ENABLE_AVX512_EMULATION + +#endif//ENABLE_AVX512_SIMD16 + +#endif//__SWR_SIMD16INTRIN_H_ diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/common/simdintrin.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/common/simdintrin.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/common/simdintrin.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/common/simdintrin.h 2017-06-01 10:37:10.000000000 +0000 @@ -90,6 +90,7 @@ #define _simd_round_ps _mm256_round_ps #define _simd_castpd_ps _mm256_castpd_ps #define _simd_broadcast_ps(a) _mm256_broadcast_ps((const __m128*)(a)) +#define _simd_stream_ps _mm256_stream_ps #define _simd_load_sd _mm256_load_sd #define _simd_movemask_pd _mm256_movemask_pd @@ -271,6 +272,7 @@ #define _simd_cmplt_epi32 _simdemu_cmplt_epi32 #define _simd_cmpgt_epi32 _simdemu_cmpgt_epi32 #define _simd_or_si _simdemu_or_si +#define _simd_xor_si _simdemu_xor_si #define _simd_castps_si _mm256_castps_si256 #define _simd_adds_epu8 _simdemu_adds_epu8 #define _simd_subs_epu8 _simdemu_subs_epu8 @@ -302,6 +304,7 @@ SIMD_EMU_EPI(_simdemu_cmplt_epi32, _mm_cmplt_epi32) SIMD_EMU_EPI(_simdemu_cmpgt_epi32, _mm_cmpgt_epi32) SIMD_EMU_EPI(_simdemu_or_si, _mm_or_si128) +SIMD_EMU_EPI(_simdemu_xor_si, _mm_xor_si128) SIMD_EMU_EPI(_simdemu_adds_epu8, _mm_adds_epu8) SIMD_EMU_EPI(_simdemu_subs_epu8, _mm_subs_epu8) SIMD_EMU_EPI(_simdemu_add_epi8, _mm_add_epi8) @@ -311,9 +314,19 @@ SIMD_EMU_EPI(_simdemu_cmpeq_epi8, _mm_cmpeq_epi8) SIMD_EMU_EPI(_simdemu_cmpgt_epi16, _mm_cmpgt_epi16) SIMD_EMU_EPI(_simdemu_cmpeq_epi16, _mm_cmpeq_epi16) - +SIMD_EMU_EPI(_simdemu_unpacklo_epi8, _mm_unpacklo_epi8) +SIMD_EMU_EPI(_simdemu_unpackhi_epi8, _mm_unpackhi_epi8) +SIMD_EMU_EPI(_simdemu_unpacklo_epi16, _mm_unpacklo_epi16) +SIMD_EMU_EPI(_simdemu_unpackhi_epi16, _mm_unpackhi_epi16) + +#define _simd_unpacklo_epi8 _simdemu_unpacklo_epi8 +#define _simd_unpackhi_epi8 _simdemu_unpackhi_epi8 +#define _simd_unpacklo_epi16 _simdemu_unpacklo_epi16 +#define _simd_unpackhi_epi16 _simdemu_unpackhi_epi16 #define _simd_unpacklo_epi32(a, b) _mm256_castps_si256(_mm256_unpacklo_ps(_mm256_castsi256_ps(a), _mm256_castsi256_ps(b))) #define _simd_unpackhi_epi32(a, b) _mm256_castps_si256(_mm256_unpackhi_ps(_mm256_castsi256_ps(a), _mm256_castsi256_ps(b))) +#define _simd_unpacklo_epi64(a, b) _mm256_castpd_si256(_mm256_unpacklo_pd(_mm256_castsi256_pd(a), _mm256_castsi256_pd(b))) +#define _simd_unpackhi_epi64(a, b) _mm256_castpd_si256(_mm256_unpackhi_pd(_mm256_castsi256_pd(a), _mm256_castsi256_pd(b))) #define _simd_slli_epi32(a,i) _simdemu_slli_epi32(a,i) #define _simd_srai_epi32(a,i) _simdemu_srai_epi32(a,i) @@ -408,6 +421,108 @@ return (resHi << 16) | resLo; } + +INLINE +__m256i _simd_cvtepu8_epi16(__m128i a) +{ + __m128i resultlo = _mm_cvtepu8_epi16(a); + __m128i resulthi = _mm_cvtepu8_epi16(_mm_srli_si128(a, 8)); + + __m256i result = _mm256_castsi128_si256(resultlo); + + return _mm256_insertf128_si256(result, resulthi, 1); +} + +INLINE +__m256i _simd_cvtepu8_epi32(__m128i a) +{ + __m128i resultlo = _mm_cvtepu8_epi32(a); + __m128i resulthi = _mm_cvtepu8_epi32(_mm_srli_si128(a, 4)); + + __m256i result = _mm256_castsi128_si256(resultlo); + + return _mm256_insertf128_si256(result, resulthi, 1); +} + +INLINE +__m256i _simd_cvtepu16_epi32(__m128i a) +{ + __m128i resultlo = _mm_cvtepu16_epi32(a); + __m128i resulthi = _mm_cvtepu16_epi32(_mm_srli_si128(a, 8)); + + __m256i result = _mm256_castsi128_si256(resultlo); + + return _mm256_insertf128_si256(result, resulthi, 1); +} + +INLINE +__m256i _simd_packus_epi16(__m256i a, __m256i b) +{ + __m128i alo = _mm256_extractf128_si256(a, 0); + __m128i ahi = _mm256_extractf128_si256(a, 1); + + __m128i blo = _mm256_extractf128_si256(b, 0); + __m128i bhi = _mm256_extractf128_si256(b, 1); + + __m128i resultlo = _mm_packus_epi16(alo, blo); + __m128i resulthi = _mm_packus_epi16(ahi, bhi); + + __m256i result = _mm256_castsi128_si256(resultlo); + + return _mm256_insertf128_si256(result, resulthi, 1); +} + +INLINE +__m256i _simd_packs_epi16(__m256i a, __m256i b) +{ + __m128i alo = _mm256_extractf128_si256(a, 0); + __m128i ahi = _mm256_extractf128_si256(a, 1); + + __m128i blo = _mm256_extractf128_si256(b, 0); + __m128i bhi = _mm256_extractf128_si256(b, 1); + + __m128i resultlo = _mm_packs_epi16(alo, blo); + __m128i resulthi = _mm_packs_epi16(ahi, bhi); + + __m256i result = _mm256_castsi128_si256(resultlo); + + return _mm256_insertf128_si256(result, resulthi, 1); +} + +INLINE +__m256i _simd_packus_epi32(__m256i a, __m256i b) +{ + __m128i alo = _mm256_extractf128_si256(a, 0); + __m128i ahi = _mm256_extractf128_si256(a, 1); + + __m128i blo = _mm256_extractf128_si256(b, 0); + __m128i bhi = _mm256_extractf128_si256(b, 1); + + __m128i resultlo = _mm_packus_epi32(alo, blo); + __m128i resulthi = _mm_packus_epi32(ahi, bhi); + + __m256i result = _mm256_castsi128_si256(resultlo); + + return _mm256_insertf128_si256(result, resulthi, 1); +} + +INLINE +__m256i _simd_packs_epi32(__m256i a, __m256i b) +{ + __m128i alo = _mm256_extractf128_si256(a, 0); + __m128i ahi = _mm256_extractf128_si256(a, 1); + + __m128i blo = _mm256_extractf128_si256(b, 0); + __m128i bhi = _mm256_extractf128_si256(b, 1); + + __m128i resultlo = _mm_packs_epi32(alo, blo); + __m128i resulthi = _mm_packs_epi32(ahi, bhi); + + __m256i result = _mm256_castsi128_si256(resultlo); + + return _mm256_insertf128_si256(result, resulthi, 1); +} + #else #define _simd_mul_epi32 _mm256_mul_epi32 @@ -425,10 +540,17 @@ #define _simd_cmplt_epi32(a,b) _mm256_cmpgt_epi32(b,a) #define _simd_cmpgt_epi32(a,b) _mm256_cmpgt_epi32(a,b) #define _simd_or_si _mm256_or_si256 +#define _simd_xor_si _mm256_xor_si256 #define _simd_castps_si _mm256_castps_si256 +#define _simd_unpacklo_epi8 _mm256_unpacklo_epi8 +#define _simd_unpackhi_epi8 _mm256_unpackhi_epi8 +#define _simd_unpacklo_epi16 _mm256_unpacklo_epi16 +#define _simd_unpackhi_epi16 _mm256_unpackhi_epi16 #define _simd_unpacklo_epi32 _mm256_unpacklo_epi32 #define _simd_unpackhi_epi32 _mm256_unpackhi_epi32 +#define _simd_unpacklo_epi64 _mm256_unpacklo_epi64 +#define _simd_unpackhi_epi64 _mm256_unpackhi_epi64 #define _simd_srli_si(a,i) _simdemu_srli_si128(a) #define _simd_slli_epi32 _mm256_slli_epi32 @@ -454,18 +576,36 @@ #define _simd_cmpeq_epi16 _mm256_cmpeq_epi16 #define _simd_movemask_epi8 _mm256_movemask_epi8 #define _simd_permute_ps _mm256_permutevar8x32_ps +#define _simd_permute_epi32 _mm256_permutevar8x32_epi32 #define _simd_srlv_epi32 _mm256_srlv_epi32 #define _simd_sllv_epi32 _mm256_sllv_epi32 +#define _simd_cvtepu8_epi16 _mm256_cvtepu8_epi16 +#define _simd_cvtepu8_epi32 _mm256_cvtepu8_epi32 +#define _simd_cvtepu16_epi32 _mm256_cvtepu16_epi32 +#define _simd_packus_epi16 _mm256_packus_epi16 +#define _simd_packs_epi16 _mm256_packs_epi16 +#define _simd_packus_epi32 _mm256_packus_epi32 +#define _simd_packs_epi32 _mm256_packs_epi32 -INLINE -simdscalari _simd_permute_epi32(simdscalari a, simdscalari index) -{ - return _simd_castps_si(_mm256_permutevar8x32_ps(_mm256_castsi256_ps(a), index)); -} #endif -#define _simd_shuffleps_epi32(vA, vB, imm) _mm256_castps_si256(_mm256_shuffle_ps(_mm256_castsi256_ps(vA), _mm256_castsi256_ps(vB), imm)) +#define _simd_unpacklo_ps _mm256_unpacklo_ps +#define _simd_unpackhi_ps _mm256_unpackhi_ps +#define _simd_unpacklo_pd _mm256_unpacklo_pd +#define _simd_unpackhi_pd _mm256_unpackhi_pd +#define _simd_insertf128_ps _mm256_insertf128_ps +#define _simd_insertf128_pd _mm256_insertf128_pd +#define _simd_insertf128_si _mm256_insertf128_si256 +#define _simd_extractf128_ps _mm256_extractf128_ps +#define _simd_extractf128_pd _mm256_extractf128_pd +#define _simd_extractf128_si _mm256_extractf128_si256 +#define _simd_permute2f128_ps _mm256_permute2f128_ps +#define _simd_permute2f128_pd _mm256_permute2f128_pd +#define _simd_permute2f128_si _mm256_permute2f128_si256 #define _simd_shuffle_ps _mm256_shuffle_ps +#define _simd_shuffle_pd _mm256_shuffle_pd +#define _simd_shuffle_epi32(a, b, imm8) _mm256_castps_si256(_mm256_shuffle_ps(_mm256_castsi256_ps(a), _mm256_castsi256_ps(b), imm8)) +#define _simd_shuffle_epi64(a, b, imm8) _mm256_castps_si256(_mm256_shuffle_pd(_mm256_castsi256_pd(a), _mm256_castsi256_pd(b), imm8)) #define _simd_set1_epi32 _mm256_set1_epi32 #define _simd_set_epi32 _mm256_set_epi32 #define _simd_set1_epi8 _mm256_set1_epi8 @@ -480,6 +620,21 @@ #define _simd_testz_ps _mm256_testz_ps #define _simd_xor_ps _mm256_xor_ps +INLINE +simdscalari _simd_loadu2_si(const __m128i *hiaddr, const __m128i *loaddr) +{ + __m128i lo = _mm_loadu_si128(loaddr); + __m128i hi = _mm_loadu_si128(hiaddr); + + return _mm256_insertf128_si256(_mm256_castsi128_si256(lo), (hi), 1); +} + +INLINE +void _simd_storeu2_si(__m128i *hiaddr, __m128i *loaddr, simdscalari a) +{ + _mm_storeu_si128(loaddr, _mm256_castsi256_si128(a)); + _mm_storeu_si128(hiaddr, _mm256_extractf128_si256(a, 1)); +} INLINE simdscalari _simd_blendv_epi32(simdscalari a, simdscalari b, simdscalar mask) @@ -594,6 +749,7 @@ r[3] = v[3]; } +#if 0 // just move a lane from the source simdvector to dest simdvector INLINE void _simdvec_mov(simdvector &r, unsigned int rlane, simdvector& s, unsigned int slane) @@ -604,6 +760,7 @@ _simd_mov(r[3], rlane, s[3], slane); } +#endif INLINE void _simdvec_dp3_ps(simdscalar& r, const simdvector& v0, const simdvector& v1) { @@ -1002,7 +1159,7 @@ INLINE UINT pdep_u32(UINT a, UINT mask) { -#if KNOB_ARCH==KNOB_ARCH_AVX2 +#if KNOB_ARCH >= KNOB_ARCH_AVX2 return _pdep_u32(a, mask); #else UINT result = 0; @@ -1035,7 +1192,7 @@ INLINE UINT pext_u32(UINT a, UINT mask) { -#if KNOB_ARCH==KNOB_ARCH_AVX2 +#if KNOB_ARCH >= KNOB_ARCH_AVX2 return _pext_u32(a, mask); #else UINT result = 0; @@ -1056,4 +1213,8 @@ #endif } +#if ENABLE_AVX512_SIMD16 +#include "simd16intrin.h" +#endif//ENABLE_AVX512_SIMD16 + #endif//__SWR_SIMDINTRIN_H__ diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/common/swr_assert.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/common/swr_assert.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/common/swr_assert.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/common/swr_assert.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -25,6 +25,8 @@ #include #include #include +#include +#include #if SWR_ENABLE_ASSERTS || SWR_ENABLE_REL_ASSERTS @@ -111,32 +113,24 @@ #endif } -bool SwrAssert( - bool chkDebugger, - bool& enabled, - const char* pExpression, +static std::mutex g_stderrMutex; + +void SwrTrace( const char* pFileName, uint32_t lineNum, - const char* pFunction, - const char* pFmtString /* = nullptr */, + const char* function, + const char* pFmtString, ...) { - if (!enabled) return false; + std::lock_guard l(g_stderrMutex); SetTextColor(stderr, TEXT_CYAN, TEXT_NORMAL); - fprintf(stderr, "%s(%d): ", pFileName, lineNum); - - SetTextColor(stderr, TEXT_RED, TEXT_INTENSITY); - - fprintf(stderr, "ASSERT: %s\n", pExpression); - - SetTextColor(stderr, TEXT_CYAN, TEXT_INTENSITY); - fprintf(stderr, "\t%s\n", pFunction); + fprintf(stderr, "%s(%d): TRACE in %s:\n", pFileName, lineNum, function); if (pFmtString) { - SetTextColor(stderr, TEXT_YELLOW, TEXT_INTENSITY); + SetTextColor(stderr, TEXT_PURPLE, TEXT_INTENSITY); fprintf(stderr, "\t"); va_list args; va_start(args, pFmtString); @@ -151,6 +145,76 @@ static const int MAX_MESSAGE_LEN = 2048; char msgBuf[MAX_MESSAGE_LEN]; + sprintf_s(msgBuf, "%s(%d): TRACE in %s\n", pFileName, lineNum, function); + msgBuf[MAX_MESSAGE_LEN - 2] = '\n'; + msgBuf[MAX_MESSAGE_LEN - 1] = 0; + OutputDebugStringA(msgBuf); + + int offset = 0; + + if (pFmtString) + { + va_list args; + va_start(args, pFmtString); + offset = _vsnprintf_s( + msgBuf, + sizeof(msgBuf), + sizeof(msgBuf), + pFmtString, + args); + va_end(args); + + if (offset < 0) { return; } + + OutputDebugStringA("\t"); + OutputDebugStringA(msgBuf); + OutputDebugStringA("\n"); + } +#endif // _WIN32 +} + +bool SwrAssert( + bool chkDebugger, + bool& enabled, + const char* pExpression, + const char* pFileName, + uint32_t lineNum, + const char* pFunction, + const char* pFmtString /* = nullptr */, + ...) +{ + { + std::lock_guard l(g_stderrMutex); + + SetTextColor(stderr, TEXT_CYAN, TEXT_NORMAL); + + fprintf(stderr, "%s(%d): ", pFileName, lineNum); + + SetTextColor(stderr, TEXT_RED, TEXT_INTENSITY); + + fprintf(stderr, "ASSERT: %s\n", pExpression); + + SetTextColor(stderr, TEXT_CYAN, TEXT_INTENSITY); + fprintf(stderr, "\t%s\n", pFunction); + + if (pFmtString) + { + SetTextColor(stderr, TEXT_YELLOW, TEXT_INTENSITY); + fprintf(stderr, "\t"); + va_list args; + va_start(args, pFmtString); + vfprintf(stderr, pFmtString, args); + va_end(args); + fprintf(stderr, "\n"); + } + ResetTextColor(stderr); + fflush(stderr); + } + +#if defined(_WIN32) + static const int MAX_MESSAGE_LEN = 2048; + char msgBuf[MAX_MESSAGE_LEN]; + sprintf_s(msgBuf, "%s(%d): ASSERT: %s\n", pFileName, lineNum, pExpression); msgBuf[MAX_MESSAGE_LEN - 2] = '\n'; msgBuf[MAX_MESSAGE_LEN - 1] = 0; @@ -182,7 +246,7 @@ OutputDebugStringA("\n"); } - if (KNOB_ENABLE_ASSERT_DIALOGS) + if (enabled && KNOB_ENABLE_ASSERT_DIALOGS) { int retval = sprintf_s( &msgBuf[offset], @@ -228,11 +292,11 @@ } else { - return IsDebuggerPresent() || !chkDebugger; + return (IsDebuggerPresent() || !chkDebugger) && enabled; } #endif // _WIN32 - return true; + return enabled; } #endif // SWR_ENABLE_ASSERTS diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/common/swr_assert.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/common/swr_assert.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/common/swr_assert.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/common/swr_assert.h 2017-06-01 10:37:10.000000000 +0000 @@ -104,6 +104,13 @@ const char* pFmtString = nullptr, ...); +void SwrTrace( + const char* pFileName, + uint32_t lineNum, + const char* function, + const char* pFmtString, + ...); + #define _SWR_ASSERT(chkDebugger, e, ...) {\ bool expFailed = !(e);\ if (expFailed) {\ @@ -113,9 +120,13 @@ }\ } +#define _SWR_TRACE(_fmtstr, ...) \ + SwrTrace(__FILE__, __LINE__, __FUNCTION__, _fmtstr, ##__VA_ARGS__); + #if SWR_ENABLE_ASSERTS #define SWR_ASSERT(e, ...) _SWR_ASSERT(true, e, ##__VA_ARGS__) #define SWR_ASSUME_ASSERT(e, ...) SWR_ASSERT(e, ##__VA_ARGS__) +#define SWR_TRACE(_fmtstr, ...) _SWR_TRACE(_fmtstr, ##__VA_ARGS__) #if defined(assert) #undef assert @@ -127,6 +138,7 @@ #if SWR_ENABLE_REL_ASSERTS #define SWR_REL_ASSERT(e, ...) _SWR_ASSERT(false, e, ##__VA_ARGS__) #define SWR_REL_ASSUME_ASSERT(e, ...) SWR_REL_ASSERT(e, ##__VA_ARGS__) +#define SWR_REL_TRACE(_fmtstr, ...) _SWR_TRACE(_fmtstr, ##__VA_ARGS__) #endif #endif // C++ @@ -136,11 +148,13 @@ #if !SWR_ENABLE_ASSERTS #define SWR_ASSERT(e, ...) (void)(0) #define SWR_ASSUME_ASSERT(e, ...) SWR_ASSUME(e, ##__VA_ARGS__) +#define SWR_TRACE(_fmtstr, ...) (void)(0) #endif #if !SWR_ENABLE_REL_ASSERTS #define SWR_REL_ASSERT(e, ...) (void)(0) #define SWR_REL_ASSUME_ASSERT(e, ...) SWR_ASSUME(e, ##__VA_ARGS__) +#define SWR_REL_TRACE(_fmtstr, ...) (void)(0) #endif #define SWR_NOT_IMPL SWR_ASSERT(0, "%s not implemented", __FUNCTION__) diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/api.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/api.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/api.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/api.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -1,5 +1,5 @@ /**************************************************************************** -* Copyright (C) 2014-2015 Intel Corporation. All Rights Reserved. +* Copyright (C) 2014-2016 Intel Corporation. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -46,8 +46,20 @@ #include "common/simdintrin.h" #include "common/os.h" +static const SWR_RECT g_MaxScissorRect = { 0, 0, KNOB_MAX_SCISSOR_X, KNOB_MAX_SCISSOR_Y }; + void SetupDefaultState(SWR_CONTEXT *pContext); +static INLINE SWR_CONTEXT* GetContext(HANDLE hContext) +{ + return (SWR_CONTEXT*)hContext; +} + +void WakeAllThreads(SWR_CONTEXT *pContext) +{ + pContext->FifosNotEmpty.notify_all(); +} + ////////////////////////////////////////////////////////////////////////// /// @brief Create SWR Context. /// @param pCreateInfo - pointer to creation info. @@ -61,7 +73,6 @@ memset(pContextMem, 0, sizeof(SWR_CONTEXT)); SWR_CONTEXT *pContext = new (pContextMem) SWR_CONTEXT(); - pContext->driverType = pCreateInfo->driver; pContext->privateStateSize = pCreateInfo->privateStateSize; pContext->dcRing.Init(KNOB_MAX_DRAWS_IN_FLIGHT); @@ -79,25 +90,33 @@ pContext->dsRing[dc].pArena = new CachingArena(pContext->cachingArenaAllocator); } - if (!KNOB_SINGLE_THREADED) - { - memset(&pContext->WaitLock, 0, sizeof(pContext->WaitLock)); - memset(&pContext->FifosNotEmpty, 0, sizeof(pContext->FifosNotEmpty)); - new (&pContext->WaitLock) std::mutex(); - new (&pContext->FifosNotEmpty) std::condition_variable(); - - CreateThreadPool(pContext, &pContext->threadPool); - } + pContext->threadInfo.MAX_WORKER_THREADS = KNOB_MAX_WORKER_THREADS; + pContext->threadInfo.MAX_NUMA_NODES = KNOB_MAX_NUMA_NODES; + pContext->threadInfo.MAX_CORES_PER_NUMA_NODE = KNOB_MAX_CORES_PER_NUMA_NODE; + pContext->threadInfo.MAX_THREADS_PER_CORE = KNOB_MAX_THREADS_PER_CORE; + pContext->threadInfo.SINGLE_THREADED = KNOB_SINGLE_THREADED; - // Calling createThreadPool() above can set SINGLE_THREADED - if (KNOB_SINGLE_THREADED) + if (pCreateInfo->pThreadInfo) { - SET_KNOB(HYPERTHREADED_FE, false); - pContext->NumWorkerThreads = 1; - pContext->NumFEThreads = 1; - pContext->NumBEThreads = 1; + pContext->threadInfo = *pCreateInfo->pThreadInfo; } + memset(&pContext->WaitLock, 0, sizeof(pContext->WaitLock)); + memset(&pContext->FifosNotEmpty, 0, sizeof(pContext->FifosNotEmpty)); + new (&pContext->WaitLock) std::mutex(); + new (&pContext->FifosNotEmpty) std::condition_variable(); + + CreateThreadPool(pContext, &pContext->threadPool); + + pContext->ppScratch = new uint8_t*[pContext->NumWorkerThreads]; + pContext->pStats = new SWR_STATS[pContext->NumWorkerThreads]; + +#if defined(KNOB_ENABLE_AR) + // Setup ArchRast thread contexts which includes +1 for API thread. + pContext->pArContext = new HANDLE[pContext->NumWorkerThreads+1]; + pContext->pArContext[pContext->NumWorkerThreads] = ArchRast::CreateThreadContext(ArchRast::AR_THREAD::API); +#endif + // Allocate scratch space for workers. ///@note We could lazily allocate this but its rather small amount of memory. for (uint32_t i = 0; i < pContext->NumWorkerThreads; ++i) @@ -105,12 +124,17 @@ #if defined(_WIN32) uint32_t numaNode = pContext->threadPool.pThreadData ? pContext->threadPool.pThreadData[i].numaId : 0; - pContext->pScratch[i] = (uint8_t*)VirtualAllocExNuma( + pContext->ppScratch[i] = (uint8_t*)VirtualAllocExNuma( GetCurrentProcess(), nullptr, 32 * sizeof(KILOBYTE), MEM_RESERVE | MEM_COMMIT, PAGE_READWRITE, numaNode); #else - pContext->pScratch[i] = (uint8_t*)AlignedMalloc(32 * sizeof(KILOBYTE), KNOB_SIMD_WIDTH * 4); + pContext->ppScratch[i] = (uint8_t*)AlignedMalloc(32 * sizeof(KILOBYTE), KNOB_SIMD_WIDTH * 4); +#endif + +#if defined(KNOB_ENABLE_AR) + // Initialize worker thread context for ArchRast. + pContext->pArContext[i] = ArchRast::CreateThreadContext(ArchRast::AR_THREAD::WORKER); #endif } @@ -123,10 +147,14 @@ // initialize function pointer tables InitClearTilesTable(); - // initialize store tiles function + // initialize callback functions pContext->pfnLoadTile = pCreateInfo->pfnLoadTile; pContext->pfnStoreTile = pCreateInfo->pfnStoreTile; pContext->pfnClearTile = pCreateInfo->pfnClearTile; + pContext->pfnUpdateSoWriteOffset = pCreateInfo->pfnUpdateSoWriteOffset; + pContext->pfnUpdateStats = pCreateInfo->pfnUpdateStats; + pContext->pfnUpdateStatsFE = pCreateInfo->pfnUpdateStatsFE; + // pass pointer to bucket manager back to caller #ifdef KNOB_ENABLE_RDTSC @@ -135,40 +163,9 @@ pCreateInfo->contextSaveSize = sizeof(API_STATE); - return (HANDLE)pContext; -} - -void SwrDestroyContext(HANDLE hContext) -{ - SWR_CONTEXT *pContext = (SWR_CONTEXT*)hContext; - DestroyThreadPool(pContext, &pContext->threadPool); - - // free the fifos - for (uint32_t i = 0; i < KNOB_MAX_DRAWS_IN_FLIGHT; ++i) - { - delete pContext->dcRing[i].pArena; - delete pContext->dsRing[i].pArena; - pContext->pMacroTileManagerArray[i].~MacroTileMgr(); - pContext->pDispatchQueueArray[i].~DispatchQueue(); - } - - AlignedFree(pContext->pDispatchQueueArray); - AlignedFree(pContext->pMacroTileManagerArray); - - // Free scratch space. - for (uint32_t i = 0; i < pContext->NumWorkerThreads; ++i) - { -#if defined(_WIN32) - VirtualFree(pContext->pScratch[i], 0, MEM_RELEASE); -#else - AlignedFree(pContext->pScratch[i]); -#endif - } - - delete(pContext->pHotTileMgr); + StartThreadPool(pContext, &pContext->threadPool); - pContext->~SWR_CONTEXT(); - AlignedFree((SWR_CONTEXT*)hContext); + return (HANDLE)pContext; } void CopyState(DRAW_STATE& dst, const DRAW_STATE& src) @@ -176,11 +173,6 @@ memcpy(&dst.state, &src.state, sizeof(API_STATE)); } -void WakeAllThreads(SWR_CONTEXT *pContext) -{ - pContext->FifosNotEmpty.notify_all(); -} - template void QueueWork(SWR_CONTEXT *pContext) { @@ -199,13 +191,18 @@ // then moved on if all work is done.) pContext->pCurDrawContext->threadsDone = pContext->NumFEThreads + pContext->NumBEThreads; + if (IsDraw) + { + InterlockedIncrement((volatile LONG*)&pContext->drawsOutstandingFE); + } + _ReadWriteBarrier(); { std::unique_lock lock(pContext->WaitLock); pContext->dcRing.Enqueue(); } - if (KNOB_SINGLE_THREADED) + if (pContext->threadInfo.SINGLE_THREADED) { // flush denormals to 0 uint32_t mxcsr = _mm_getcsr(); @@ -213,14 +210,13 @@ if (IsDraw) { - static TileSet lockedTiles; - uint64_t curDraw[2] = { pContext->pCurDrawContext->drawId, pContext->pCurDrawContext->drawId }; + uint32_t curDraw[2] = { pContext->pCurDrawContext->drawId, pContext->pCurDrawContext->drawId }; WorkOnFifoFE(pContext, 0, curDraw[0]); - WorkOnFifoBE(pContext, 0, curDraw[1], lockedTiles, 0, 0); + WorkOnFifoBE(pContext, 0, curDraw[1], pContext->singleThreadLockedTiles, 0, 0); } else { - uint64_t curDispatch = pContext->pCurDrawContext->drawId; + uint32_t curDispatch = pContext->pCurDrawContext->drawId; WorkOnCompute(pContext, 0, curDispatch); } @@ -232,9 +228,9 @@ } else { - RDTSC_START(APIDrawWakeAllThreads); + AR_API_BEGIN(APIDrawWakeAllThreads, pDC->drawId); WakeAllThreads(pContext); - RDTSC_STOP(APIDrawWakeAllThreads, 1, 0); + AR_API_END(APIDrawWakeAllThreads, 1); } // Set current draw context to NULL so that next state call forces a new draw context to be created and populated. @@ -254,7 +250,7 @@ DRAW_CONTEXT* GetDrawContext(SWR_CONTEXT *pContext, bool isSplitDraw = false) { - RDTSC_START(APIGetDrawContext); + AR_API_BEGIN(APIGetDrawContext, 0); // If current draw context is null then need to obtain a new draw context to use from ring. if (pContext->pCurDrawContext == nullptr) { @@ -267,16 +263,14 @@ uint64_t curDraw = pContext->dcRing.GetHead(); uint32_t dcIndex = curDraw % KNOB_MAX_DRAWS_IN_FLIGHT; - static uint64_t lastDrawChecked; - static uint32_t lastFrameChecked; - if ((pContext->frameCount - lastFrameChecked) > 2 || - (curDraw - lastDrawChecked) > 0x10000) + if ((pContext->frameCount - pContext->lastFrameChecked) > 2 || + (curDraw - pContext->lastDrawChecked) > 0x10000) { // Take this opportunity to clean-up old arena allocations pContext->cachingArenaAllocator.FreeOldBlocks(); - lastFrameChecked = pContext->frameCount; - lastDrawChecked = curDraw; + pContext->lastFrameChecked = pContext->frameCount; + pContext->lastDrawChecked = curDraw; } DRAW_CONTEXT* pCurDrawContext = &pContext->dcRing[dcIndex]; @@ -321,25 +315,32 @@ SWR_ASSERT(pCurDrawContext->pArena->IsEmpty() == true); - pCurDrawContext->dependency = 0; + // Reset dependency + pCurDrawContext->dependent = false; + pCurDrawContext->dependentFE = false; + pCurDrawContext->pContext = pContext; pCurDrawContext->isCompute = false; // Dispatch has to set this to true. pCurDrawContext->doneFE = false; pCurDrawContext->FeLock = 0; pCurDrawContext->threadsDone = 0; + pCurDrawContext->retireCallback.pfnCallbackFunc = nullptr; + + pCurDrawContext->dynState.Reset(pContext->NumWorkerThreads); // Assign unique drawId for this DC pCurDrawContext->drawId = pContext->dcRing.GetHead(); pCurDrawContext->cleanupState = true; + } else { SWR_ASSERT(isSplitDraw == false, "Split draw should only be used when obtaining a new DC"); } - RDTSC_STOP(APIGetDrawContext, 0, 0); + AR_API_END(APIGetDrawContext, 0); return pContext->pCurDrawContext; } @@ -351,12 +352,61 @@ return &pDC->pState->state; } +void SwrDestroyContext(HANDLE hContext) +{ + SWR_CONTEXT *pContext = GetContext(hContext); + DRAW_CONTEXT* pDC = GetDrawContext(pContext); + + pDC->FeWork.type = SHUTDOWN; + pDC->FeWork.pfnWork = ProcessShutdown; + + //enqueue + QueueDraw(pContext); + + DestroyThreadPool(pContext, &pContext->threadPool); + + // free the fifos + for (uint32_t i = 0; i < KNOB_MAX_DRAWS_IN_FLIGHT; ++i) + { + delete[] pContext->dcRing[i].dynState.pStats; + delete pContext->dcRing[i].pArena; + delete pContext->dsRing[i].pArena; + pContext->pMacroTileManagerArray[i].~MacroTileMgr(); + pContext->pDispatchQueueArray[i].~DispatchQueue(); + } + + AlignedFree(pContext->pDispatchQueueArray); + AlignedFree(pContext->pMacroTileManagerArray); + + // Free scratch space. + for (uint32_t i = 0; i < pContext->NumWorkerThreads; ++i) + { +#if defined(_WIN32) + VirtualFree(pContext->ppScratch[i], 0, MEM_RELEASE); +#else + AlignedFree(pContext->ppScratch[i]); +#endif + +#if defined(KNOB_ENABLE_AR) + ArchRast::DestroyThreadContext(pContext->pArContext[i]); +#endif + } + + delete[] pContext->ppScratch; + delete[] pContext->pStats; + + delete(pContext->pHotTileMgr); + + pContext->~SWR_CONTEXT(); + AlignedFree(GetContext(hContext)); +} + void SWR_API SwrSaveState( HANDLE hContext, void* pOutputStateBlock, size_t memSize) { - SWR_CONTEXT *pContext = (SWR_CONTEXT*)hContext; + SWR_CONTEXT *pContext = GetContext(hContext); auto pSrc = GetDrawState(pContext); SWR_ASSERT(pOutputStateBlock && memSize >= sizeof(*pSrc)); @@ -368,7 +418,7 @@ const void* pStateBlock, size_t memSize) { - SWR_CONTEXT *pContext = (SWR_CONTEXT*)hContext; + SWR_CONTEXT *pContext = GetContext(hContext); auto pDst = GetDrawState(pContext); SWR_ASSERT(pStateBlock && memSize >= sizeof(*pDst)); @@ -381,50 +431,62 @@ pState->rastState.cullMode = SWR_CULLMODE_NONE; pState->rastState.frontWinding = SWR_FRONTWINDING_CCW; -} -static INLINE SWR_CONTEXT* GetContext(HANDLE hContext) -{ - return (SWR_CONTEXT*)hContext; + pState->depthBoundsState.depthBoundsTestEnable = false; + pState->depthBoundsState.depthBoundsTestMinValue = 0.0f; + pState->depthBoundsState.depthBoundsTestMaxValue = 1.0f; } void SwrSync(HANDLE hContext, PFN_CALLBACK_FUNC pfnFunc, uint64_t userData, uint64_t userData2, uint64_t userData3) { - RDTSC_START(APISync); - SWR_ASSERT(pfnFunc != nullptr); SWR_CONTEXT *pContext = GetContext(hContext); DRAW_CONTEXT* pDC = GetDrawContext(pContext); + AR_API_BEGIN(APISync, 0); + pDC->FeWork.type = SYNC; pDC->FeWork.pfnWork = ProcessSync; - pDC->FeWork.desc.sync.pfnCallbackFunc = pfnFunc; - pDC->FeWork.desc.sync.userData = userData; - pDC->FeWork.desc.sync.userData2 = userData2; - pDC->FeWork.desc.sync.userData3 = userData3; - // cannot execute until all previous draws have completed - pDC->dependency = pDC->drawId - 1; + // Setup callback function + pDC->retireCallback.pfnCallbackFunc = pfnFunc; + pDC->retireCallback.userData = userData; + pDC->retireCallback.userData2 = userData2; + pDC->retireCallback.userData3 = userData3; //enqueue QueueDraw(pContext); - RDTSC_STOP(APISync, 1, 0); + AR_API_END(APISync, 1); } void SwrWaitForIdle(HANDLE hContext) { SWR_CONTEXT *pContext = GetContext(hContext); - RDTSC_START(APIWaitForIdle); + AR_API_BEGIN(APIWaitForIdle, 0); while (!pContext->dcRing.IsEmpty()) { _mm_pause(); } - RDTSC_STOP(APIWaitForIdle, 1, 0); + AR_API_END(APIWaitForIdle, 1); +} + +void SwrWaitForIdleFE(HANDLE hContext) +{ + SWR_CONTEXT *pContext = GetContext(hContext); + + AR_API_BEGIN(APIWaitForIdle, 0); + + while (pContext->drawsOutstandingFE > 0) + { + _mm_pause(); + } + + AR_API_END(APIWaitForIdle, 1); } void SwrSetVertexBuffers( @@ -579,6 +641,15 @@ pState->backendState = *pBEState; } +void SwrSetDepthBoundsState( + HANDLE hContext, + SWR_DEPTH_BOUNDS_STATE *pDBState) +{ + API_STATE* pState = GetDrawState(GetContext(hContext)); + + pState->depthBoundsState = *pDBState; +} + void SwrSetPixelShaderState( HANDLE hContext, SWR_PS_STATE *pPSState) @@ -605,39 +676,19 @@ pState->pfnBlendFunc[renderTarget] = pfnBlendFunc; } -void SwrSetLinkage( - HANDLE hContext, - uint32_t mask, - const uint8_t* pMap) +// update guardband multipliers for the viewport +void updateGuardbands(API_STATE *pState) { - API_STATE* pState = GetDrawState(GetContext(hContext)); - - static const uint8_t IDENTITY_MAP[] = - { - 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, - 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, - }; - static_assert(sizeof(IDENTITY_MAP) == sizeof(pState->linkageMap), - "Update for new value of MAX_ATTRIBUTES"); - - pState->linkageMask = mask; - pState->linkageCount = _mm_popcnt_u32(mask); + uint32_t numGbs = pState->gsState.emitsRenderTargetArrayIndex ? KNOB_NUM_VIEWPORTS_SCISSORS : 1; - if (!pMap) + for(uint32_t i = 0; i < numGbs; ++i) { - pMap = IDENTITY_MAP; + // guardband center is viewport center + pState->gbState.left[i] = KNOB_GUARDBAND_WIDTH / pState->vp[i].width; + pState->gbState.right[i] = KNOB_GUARDBAND_WIDTH / pState->vp[i].width; + pState->gbState.top[i] = KNOB_GUARDBAND_HEIGHT / pState->vp[i].height; + pState->gbState.bottom[i] = KNOB_GUARDBAND_HEIGHT / pState->vp[i].height; } - memcpy(pState->linkageMap, pMap, pState->linkageCount); -} - -// update guardband multipliers for the viewport -void updateGuardband(API_STATE *pState) -{ - // guardband center is viewport center - pState->gbState.left = KNOB_GUARDBAND_WIDTH / pState->vp[0].width; - pState->gbState.right = KNOB_GUARDBAND_WIDTH / pState->vp[0].width; - pState->gbState.top = KNOB_GUARDBAND_HEIGHT / pState->vp[0].height; - pState->gbState.bottom = KNOB_GUARDBAND_HEIGHT / pState->vp[0].height; } void SwrSetRastState( @@ -654,7 +705,7 @@ HANDLE hContext, uint32_t numViewports, const SWR_VIEWPORT* pViewports, - const SWR_VIEWPORT_MATRIX* pMatrices) + const SWR_VIEWPORT_MATRICES* pMatrices) { SWR_ASSERT(numViewports <= KNOB_NUM_VIEWPORTS_SCISSORS, "Invalid number of viewports."); @@ -663,106 +714,81 @@ API_STATE* pState = GetDrawState(pContext); memcpy(&pState->vp[0], pViewports, sizeof(SWR_VIEWPORT) * numViewports); + // @todo Faster to copy portions of the SOA or just copy all of it? + memcpy(&pState->vpMatrices, pMatrices, sizeof(SWR_VIEWPORT_MATRICES)); - if (pMatrices != nullptr) - { - memcpy(&pState->vpMatrix[0], pMatrices, sizeof(SWR_VIEWPORT_MATRIX) * numViewports); - } - else - { - // Compute default viewport transform. - for (uint32_t i = 0; i < numViewports; ++i) - { - if (pContext->driverType == DX) - { - pState->vpMatrix[i].m00 = pState->vp[i].width / 2.0f; - pState->vpMatrix[i].m11 = -pState->vp[i].height / 2.0f; - pState->vpMatrix[i].m22 = pState->vp[i].maxZ - pState->vp[i].minZ; - pState->vpMatrix[i].m30 = pState->vp[i].x + pState->vpMatrix[i].m00; - pState->vpMatrix[i].m31 = pState->vp[i].y - pState->vpMatrix[i].m11; - pState->vpMatrix[i].m32 = pState->vp[i].minZ; - } - else - { - // Standard, with the exception that Y is inverted. - pState->vpMatrix[i].m00 = (pState->vp[i].width - pState->vp[i].x) / 2.0f; - pState->vpMatrix[i].m11 = (pState->vp[i].y - pState->vp[i].height) / 2.0f; - pState->vpMatrix[i].m22 = (pState->vp[i].maxZ - pState->vp[i].minZ) / 2.0f; - pState->vpMatrix[i].m30 = pState->vp[i].x + pState->vpMatrix[i].m00; - pState->vpMatrix[i].m31 = pState->vp[i].height + pState->vpMatrix[i].m11; - pState->vpMatrix[i].m32 = pState->vp[i].minZ + pState->vpMatrix[i].m22; - - // Now that the matrix is calculated, clip the view coords to screen size. - // OpenGL allows for -ve x,y in the viewport. - pState->vp[i].x = std::max(pState->vp[i].x, 0.0f); - pState->vp[i].y = std::max(pState->vp[i].y, 0.0f); - } - } - } - - updateGuardband(pState); + updateGuardbands(pState); } void SwrSetScissorRects( HANDLE hContext, uint32_t numScissors, - const BBOX* pScissors) + const SWR_RECT* pScissors) { SWR_ASSERT(numScissors <= KNOB_NUM_VIEWPORTS_SCISSORS, "Invalid number of scissor rects."); API_STATE* pState = GetDrawState(GetContext(hContext)); - memcpy(&pState->scissorRects[0], pScissors, numScissors * sizeof(BBOX)); + memcpy(&pState->scissorRects[0], pScissors, numScissors * sizeof(pScissors[0])); }; void SetupMacroTileScissors(DRAW_CONTEXT *pDC) { API_STATE *pState = &pDC->pState->state; - uint32_t left, right, top, bottom; + uint32_t numScissors = pState->gsState.emitsViewportArrayIndex ? KNOB_NUM_VIEWPORTS_SCISSORS : 1; + pState->scissorsTileAligned = true; - // Set up scissor dimensions based on scissor or viewport - if (pState->rastState.scissorEnable) - { - // scissor rect right/bottom edge are exclusive, core expects scissor dimensions to be inclusive, so subtract one pixel from right/bottom edges - left = pState->scissorRects[0].left; - right = pState->scissorRects[0].right; - top = pState->scissorRects[0].top; - bottom = pState->scissorRects[0].bottom; - } - else + for (uint32_t index = 0; index < numScissors; ++index) { - left = (int32_t)pState->vp[0].x; - right = (int32_t)pState->vp[0].x + (int32_t)pState->vp[0].width; - top = (int32_t)pState->vp[0].y; - bottom = (int32_t)pState->vp[0].y + (int32_t)pState->vp[0].height; - } + SWR_RECT &scissorInFixedPoint = pState->scissorsInFixedPoint[index]; + + // Set up scissor dimensions based on scissor or viewport + if (pState->rastState.scissorEnable) + { + scissorInFixedPoint = pState->scissorRects[index]; + } + else + { + // the vp width and height must be added to origin un-rounded then the result round to -inf. + // The cast to int works for rounding assuming all [left, right, top, bottom] are positive. + scissorInFixedPoint.xmin = (int32_t)pState->vp[index].x; + scissorInFixedPoint.xmax = (int32_t)(pState->vp[index].x + pState->vp[index].width); + scissorInFixedPoint.ymin = (int32_t)pState->vp[index].y; + scissorInFixedPoint.ymax = (int32_t)(pState->vp[index].y + pState->vp[index].height); + } - right = std::min(right, KNOB_MAX_SCISSOR_X); - bottom = std::min(bottom, KNOB_MAX_SCISSOR_Y); + // Clamp to max rect + scissorInFixedPoint &= g_MaxScissorRect; - if (left > KNOB_MAX_SCISSOR_X || top > KNOB_MAX_SCISSOR_Y) - { - pState->scissorInFixedPoint.left = 0; - pState->scissorInFixedPoint.right = 0; - pState->scissorInFixedPoint.top = 0; - pState->scissorInFixedPoint.bottom = 0; - } - else - { - pState->scissorInFixedPoint.left = left * FIXED_POINT_SCALE; - pState->scissorInFixedPoint.right = right * FIXED_POINT_SCALE - 1; - pState->scissorInFixedPoint.top = top * FIXED_POINT_SCALE; - pState->scissorInFixedPoint.bottom = bottom * FIXED_POINT_SCALE - 1; + // Test for tile alignment + bool tileAligned; + tileAligned = (scissorInFixedPoint.xmin % KNOB_TILE_X_DIM) == 0; + tileAligned &= (scissorInFixedPoint.ymin % KNOB_TILE_Y_DIM) == 0; + tileAligned &= (scissorInFixedPoint.xmax % KNOB_TILE_X_DIM) == 0; + tileAligned &= (scissorInFixedPoint.ymax % KNOB_TILE_Y_DIM) == 0; + + pState->scissorsTileAligned &= tileAligned; + + // Scale to fixed point + scissorInFixedPoint.xmin *= FIXED_POINT_SCALE; + scissorInFixedPoint.xmax *= FIXED_POINT_SCALE; + scissorInFixedPoint.ymin *= FIXED_POINT_SCALE; + scissorInFixedPoint.ymax *= FIXED_POINT_SCALE; + + // Make scissor inclusive + scissorInFixedPoint.xmax -= 1; + scissorInFixedPoint.ymax -= 1; } } // templated backend function tables -extern PFN_BACKEND_FUNC gBackendNullPs[SWR_MULTISAMPLE_TYPE_MAX]; -extern PFN_BACKEND_FUNC gBackendSingleSample[2][2][2]; -extern PFN_BACKEND_FUNC gBackendPixelRateTable[SWR_MULTISAMPLE_TYPE_MAX][SWR_MSAA_SAMPLE_PATTERN_MAX][SWR_INPUT_COVERAGE_MAX][2][2][2]; -extern PFN_BACKEND_FUNC gBackendSampleRateTable[SWR_MULTISAMPLE_TYPE_MAX][SWR_INPUT_COVERAGE_MAX][2][2]; +extern PFN_BACKEND_FUNC gBackendNullPs[SWR_MULTISAMPLE_TYPE_COUNT]; +extern PFN_BACKEND_FUNC gBackendSingleSample[SWR_INPUT_COVERAGE_COUNT][2][2]; +extern PFN_BACKEND_FUNC gBackendPixelRateTable[SWR_MULTISAMPLE_TYPE_COUNT][SWR_MSAA_SAMPLE_PATTERN_COUNT][SWR_INPUT_COVERAGE_COUNT][2][2][2]; +extern PFN_BACKEND_FUNC gBackendSampleRateTable[SWR_MULTISAMPLE_TYPE_COUNT][SWR_INPUT_COVERAGE_COUNT][2][2]; void SetupPipeline(DRAW_CONTEXT *pDC) { + SWR_CONTEXT* pContext = pDC->pContext; DRAW_STATE* pState = pDC->pState; const SWR_RASTSTATE &rastState = pState->state.rastState; const SWR_PS_STATE &psState = pState->state.psState; @@ -780,10 +806,6 @@ const uint32_t centroid = ((psState.barycentricsMask & SWR_BARYCENTRIC_CENTROID_MASK) > 0) ? 1 : 0; const uint32_t canEarlyZ = (psState.forceEarlyZ || (!psState.writesODepth && !psState.usesSourceDepth && !psState.usesUAV)) ? 1 : 0; - // currently only support 'normal' input coverage - SWR_ASSERT(psState.inputCoverage == SWR_INPUT_COVERAGE_NORMAL || - psState.inputCoverage == SWR_INPUT_COVERAGE_NONE); - SWR_BARYCENTRICS_MASK barycentricsMask = (SWR_BARYCENTRICS_MASK)psState.barycentricsMask; // select backend function @@ -832,10 +854,11 @@ break; default: pState->pfnProcessPrims = ClipTriangles; - pfnBinner = BinTriangles; + pfnBinner = GetBinTrianglesFunc((rastState.conservativeRast > 0)); break; }; + // disable clipper if viewport transform is disabled if (pState->state.frontendState.vpTransformDisable) { @@ -847,25 +870,45 @@ (pState->state.depthStencilState.depthWriteEnable == FALSE) && (pState->state.depthStencilState.stencilTestEnable == FALSE) && (pState->state.depthStencilState.stencilWriteEnable == FALSE) && - (pState->state.linkageCount == 0)) + (pState->state.backendState.numAttributes == 0)) { pState->pfnProcessPrims = nullptr; - pState->state.linkageMask = 0; } if (pState->state.soState.rasterizerDisable == true) { pState->pfnProcessPrims = nullptr; - pState->state.linkageMask = 0; } - // set up the frontend attrib mask - pState->state.feAttribMask = pState->state.linkageMask; + + // set up the frontend attribute count + pState->state.feNumAttributes = 0; + const SWR_BACKEND_STATE& backendState = pState->state.backendState; + if (backendState.swizzleEnable) + { + // attribute swizzling is enabled, iterate over the map and record the max attribute used + for (uint32_t i = 0; i < backendState.numAttributes; ++i) + { + pState->state.feNumAttributes = std::max(pState->state.feNumAttributes, (uint32_t)backendState.swizzleMap[i].sourceAttrib + 1); + } + } + else + { + pState->state.feNumAttributes = pState->state.backendState.numAttributes; + } + if (pState->state.soState.soEnable) { + uint32_t streamMasks = 0; for (uint32_t i = 0; i < 4; ++i) { - pState->state.feAttribMask |= pState->state.soState.streamMasks[i]; + streamMasks |= pState->state.soState.streamMasks[i]; + } + + DWORD maxAttrib; + if (_BitScanReverse(&maxAttrib, streamMasks)) + { + pState->state.feNumAttributes = std::max(pState->state.feNumAttributes, (uint32_t)(maxAttrib + 1)); } } @@ -873,9 +916,11 @@ // have to check for the special case where depth/stencil test is enabled but depthwrite is disabled. pState->state.depthHottileEnable = ((!(pState->state.depthStencilState.depthTestEnable && !pState->state.depthStencilState.depthWriteEnable && + !pState->state.depthBoundsState.depthBoundsTestEnable && pState->state.depthStencilState.depthTestFunc == ZFUNC_ALWAYS)) && (pState->state.depthStencilState.depthTestEnable || - pState->state.depthStencilState.depthWriteEnable)) ? true : false; + pState->state.depthStencilState.depthWriteEnable || + pState->state.depthBoundsState.depthBoundsTestEnable)) ? true : false; pState->state.stencilHottileEnable = (((!(pState->state.depthStencilState.stencilTestEnable && !pState->state.depthStencilState.stencilWriteEnable && @@ -934,6 +979,8 @@ SetupMacroTileScissors(pDC); SetupPipeline(pDC); } + + } ////////////////////////////////////////////////////////////////////////// @@ -1035,11 +1082,12 @@ return; } - RDTSC_START(APIDraw); - SWR_CONTEXT *pContext = GetContext(hContext); DRAW_CONTEXT* pDC = GetDrawContext(pContext); + AR_API_BEGIN(APIDraw, pDC->drawId); + AR_API_EVENT(DrawInstancedEvent(pDC->drawId, topology, numVertices, startVertex, numInstances, startInstance)); + uint32_t maxVertsPerDraw = MaxVertsPerDraw(pDC, numVertices, topology); uint32_t primsPerDraw = GetNumPrims(topology, maxVertsPerDraw); uint32_t remainingVerts = numVertices; @@ -1055,6 +1103,11 @@ pState->rastState.cullMode = SWR_CULLMODE_NONE; pState->forceFront = true; } + else if (topology == TOP_RECT_LIST) + { + pState->rastState.cullMode = SWR_CULLMODE_NONE; + } + int draw = 0; while (remainingVerts) @@ -1094,7 +1147,8 @@ pDC = GetDrawContext(pContext); pDC->pState->state.rastState.cullMode = oldCullMode; - RDTSC_STOP(APIDraw, numVertices * numInstances, 0); + + AR_API_END(APIDraw, numVertices * numInstances); } ////////////////////////////////////////////////////////////////////////// @@ -1155,12 +1209,13 @@ return; } - RDTSC_START(APIDrawIndexed); - SWR_CONTEXT *pContext = GetContext(hContext); DRAW_CONTEXT* pDC = GetDrawContext(pContext); API_STATE* pState = &pDC->pState->state; + AR_API_BEGIN(APIDrawIndexed, pDC->drawId); + AR_API_EVENT(DrawIndexedInstancedEvent(pDC->drawId, topology, numIndices, indexOffset, baseVertex, numInstances, startInstance)); + uint32_t maxIndicesPerDraw = MaxVertsPerDraw(pDC, numIndices, topology); uint32_t primsPerDraw = GetNumPrims(topology, maxIndicesPerDraw); uint32_t remainingIndices = numIndices; @@ -1189,6 +1244,11 @@ pState->rastState.cullMode = SWR_CULLMODE_NONE; pState->forceFront = true; } + else if (topology == TOP_RECT_LIST) + { + pState->rastState.cullMode = SWR_CULLMODE_NONE; + } + while (remainingIndices) { @@ -1197,6 +1257,7 @@ // When breaking up draw, we need to obtain new draw context for each iteration. bool isSplitDraw = (draw > 0) ? true : false; + pDC = GetDrawContext(pContext, isSplitDraw); InitDraw(pDC, isSplitDraw); @@ -1228,11 +1289,12 @@ draw++; } - // restore culling state + // Restore culling state pDC = GetDrawContext(pContext); pDC->pState->state.rastState.cullMode = oldCullMode; + - RDTSC_STOP(APIDrawIndexed, numIndices * numInstances, 0); + AR_API_END(APIDrawIndexed, numIndices * numInstances); } @@ -1279,22 +1341,26 @@ /// @brief SwrInvalidateTiles /// @param hContext - Handle passed back from SwrCreateContext /// @param attachmentMask - The mask specifies which surfaces attached to the hottiles to invalidate. -void SwrInvalidateTiles( +/// @param invalidateRect - The pixel-coordinate rectangle to invalidate. This will be expanded to +/// be hottile size-aligned. +void SWR_API SwrInvalidateTiles( HANDLE hContext, - uint32_t attachmentMask) + uint32_t attachmentMask, + const SWR_RECT& invalidateRect) { if (KNOB_TOSS_DRAW) { return; } - SWR_CONTEXT *pContext = (SWR_CONTEXT*)hContext; + SWR_CONTEXT *pContext = GetContext(hContext); DRAW_CONTEXT* pDC = GetDrawContext(pContext); pDC->FeWork.type = DISCARDINVALIDATETILES; pDC->FeWork.pfnWork = ProcessDiscardInvalidateTiles; pDC->FeWork.desc.discardInvalidateTiles.attachmentMask = attachmentMask; - memset(&pDC->FeWork.desc.discardInvalidateTiles.rect, 0, sizeof(SWR_RECT)); + pDC->FeWork.desc.discardInvalidateTiles.rect = invalidateRect; + pDC->FeWork.desc.discardInvalidateTiles.rect &= g_MaxScissorRect; pDC->FeWork.desc.discardInvalidateTiles.newTileState = SWR_TILE_INVALID; pDC->FeWork.desc.discardInvalidateTiles.createNewTiles = false; pDC->FeWork.desc.discardInvalidateTiles.fullTilesOnly = false; @@ -1307,18 +1373,19 @@ /// @brief SwrDiscardRect /// @param hContext - Handle passed back from SwrCreateContext /// @param attachmentMask - The mask specifies which surfaces attached to the hottiles to discard. -/// @param rect - if rect is all zeros, the entire attachment surface will be discarded -void SwrDiscardRect( +/// @param rect - The pixel-coordinate rectangle to discard. Only fully-covered hottiles will be +/// discarded. +void SWR_API SwrDiscardRect( HANDLE hContext, uint32_t attachmentMask, - SWR_RECT rect) + const SWR_RECT& rect) { if (KNOB_TOSS_DRAW) { return; } - SWR_CONTEXT *pContext = (SWR_CONTEXT*)hContext; + SWR_CONTEXT *pContext = GetContext(hContext); DRAW_CONTEXT* pDC = GetDrawContext(pContext); // Queue a load to the hottile @@ -1326,6 +1393,7 @@ pDC->FeWork.pfnWork = ProcessDiscardInvalidateTiles; pDC->FeWork.desc.discardInvalidateTiles.attachmentMask = attachmentMask; pDC->FeWork.desc.discardInvalidateTiles.rect = rect; + pDC->FeWork.desc.discardInvalidateTiles.rect &= g_MaxScissorRect; pDC->FeWork.desc.discardInvalidateTiles.newTileState = SWR_TILE_RESOLVED; pDC->FeWork.desc.discardInvalidateTiles.createNewTiles = true; pDC->FeWork.desc.discardInvalidateTiles.fullTilesOnly = true; @@ -1351,10 +1419,11 @@ return; } - RDTSC_START(APIDispatch); - SWR_CONTEXT *pContext = (SWR_CONTEXT*)hContext; + SWR_CONTEXT *pContext = GetContext(hContext); DRAW_CONTEXT* pDC = GetDrawContext(pContext); + AR_API_BEGIN(APIDispatch, pDC->drawId); + AR_API_EVENT(DispatchEvent(pDC->drawId, threadGroupCountX, threadGroupCountY, threadGroupCountZ)); pDC->isCompute = true; // This is a compute context. COMPUTE_DESC* pTaskData = (COMPUTE_DESC*)pDC->pArena->AllocAligned(sizeof(COMPUTE_DESC), 64); @@ -1366,68 +1435,77 @@ uint32_t totalThreadGroups = threadGroupCountX * threadGroupCountY * threadGroupCountZ; uint32_t dcIndex = pDC->drawId % KNOB_MAX_DRAWS_IN_FLIGHT; pDC->pDispatch = &pContext->pDispatchQueueArray[dcIndex]; - pDC->pDispatch->initialize(totalThreadGroups, pTaskData); + pDC->pDispatch->initialize(totalThreadGroups, pTaskData, &ProcessComputeBE); QueueDispatch(pContext); - RDTSC_STOP(APIDispatch, threadGroupCountX * threadGroupCountY * threadGroupCountZ, 0); + AR_API_END(APIDispatch, threadGroupCountX * threadGroupCountY * threadGroupCountZ); } // Deswizzles, converts and stores current contents of the hot tiles to surface // described by pState -void SwrStoreTiles( +void SWR_API SwrStoreTiles( HANDLE hContext, - SWR_RENDERTARGET_ATTACHMENT attachment, - SWR_TILE_STATE postStoreTileState) + uint32_t attachmentMask, + SWR_TILE_STATE postStoreTileState, + const SWR_RECT& storeRect) { if (KNOB_TOSS_DRAW) { return; } - RDTSC_START(APIStoreTiles); - - SWR_CONTEXT *pContext = (SWR_CONTEXT*)hContext; + SWR_CONTEXT *pContext = GetContext(hContext); DRAW_CONTEXT* pDC = GetDrawContext(pContext); - SetupMacroTileScissors(pDC); + AR_API_BEGIN(APIStoreTiles, pDC->drawId); pDC->FeWork.type = STORETILES; pDC->FeWork.pfnWork = ProcessStoreTiles; - pDC->FeWork.desc.storeTiles.attachment = attachment; + pDC->FeWork.desc.storeTiles.attachmentMask = attachmentMask; pDC->FeWork.desc.storeTiles.postStoreTileState = postStoreTileState; + pDC->FeWork.desc.storeTiles.rect = storeRect; + pDC->FeWork.desc.storeTiles.rect &= g_MaxScissorRect; //enqueue QueueDraw(pContext); - RDTSC_STOP(APIStoreTiles, 0, 0); + AR_API_END(APIStoreTiles, 1); } -void SwrClearRenderTarget( +////////////////////////////////////////////////////////////////////////// +/// @brief SwrClearRenderTarget - Clear attached render targets / depth / stencil +/// @param hContext - Handle passed back from SwrCreateContext +/// @param attachmentMask - combination of SWR_ATTACHMENT_*_BIT attachments to clear +/// @param renderTargetArrayIndex - the RT array index to clear +/// @param clearColor - color use for clearing render targets +/// @param z - depth value use for clearing depth buffer +/// @param stencil - stencil value used for clearing stencil buffer +/// @param clearRect - The pixel-coordinate rectangle to clear in all cleared buffers +void SWR_API SwrClearRenderTarget( HANDLE hContext, - uint32_t clearMask, + uint32_t attachmentMask, + uint32_t renderTargetArrayIndex, const float clearColor[4], float z, - uint8_t stencil) + uint8_t stencil, + const SWR_RECT& clearRect) { if (KNOB_TOSS_DRAW) { return; } - RDTSC_START(APIClearRenderTarget); - - SWR_CONTEXT *pContext = (SWR_CONTEXT*)hContext; - + SWR_CONTEXT *pContext = GetContext(hContext); DRAW_CONTEXT* pDC = GetDrawContext(pContext); - SetupMacroTileScissors(pDC); - - CLEAR_FLAGS flags; - flags.mask = clearMask; + AR_API_BEGIN(APIClearRenderTarget, pDC->drawId); pDC->FeWork.type = CLEAR; pDC->FeWork.pfnWork = ProcessClear; - pDC->FeWork.desc.clear.flags = flags; + pDC->FeWork.desc.clear.rect = clearRect; + pDC->FeWork.desc.clear.rect &= g_MaxScissorRect; + pDC->FeWork.desc.clear.attachmentMask = attachmentMask; + pDC->FeWork.desc.clear.renderTargetArrayIndex = renderTargetArrayIndex; pDC->FeWork.desc.clear.clearDepth = z; pDC->FeWork.desc.clear.clearRTColor[0] = clearColor[0]; pDC->FeWork.desc.clear.clearRTColor[1] = clearColor[1]; @@ -1438,7 +1516,7 @@ // enqueue draw QueueDraw(pContext); - RDTSC_STOP(APIClearRenderTarget, 0, pDC->drawId); + AR_API_END(APIClearRenderTarget, 1); } ////////////////////////////////////////////////////////////////////////// @@ -1482,44 +1560,31 @@ } ////////////////////////////////////////////////////////////////////////// -/// @brief Returns pointer to SWR stats. -/// @note The counters are atomically incremented by multiple threads. -/// When calling this, you need to ensure all previous operations -/// have completed. -/// @todo If necessary, add a callback to avoid stalling the pipe to -/// sample the counters. +/// @brief Enables stats counting /// @param hContext - Handle passed back from SwrCreateContext -/// @param pStats - SWR will fill this out for caller. -void SwrGetStats( +/// @param enable - If true then counts are incremented. +void SwrEnableStatsFE( HANDLE hContext, - SWR_STATS* pStats) + bool enable) { SWR_CONTEXT *pContext = GetContext(hContext); DRAW_CONTEXT* pDC = GetDrawContext(pContext); - pDC->FeWork.type = QUERYSTATS; - pDC->FeWork.pfnWork = ProcessQueryStats; - pDC->FeWork.desc.queryStats.pStats = pStats; - - // cannot execute until all previous draws have completed - pDC->dependency = pDC->drawId - 1; - - //enqueue - QueueDraw(pContext); + pDC->pState->state.enableStatsFE = enable; } ////////////////////////////////////////////////////////////////////////// /// @brief Enables stats counting /// @param hContext - Handle passed back from SwrCreateContext /// @param enable - If true then counts are incremented. -void SwrEnableStats( +void SwrEnableStatsBE( HANDLE hContext, bool enable) { SWR_CONTEXT *pContext = GetContext(hContext); DRAW_CONTEXT* pDC = GetDrawContext(pContext); - pDC->pState->state.enableStats = enable; + pDC->pState->state.enableStatsBE = enable; } ////////////////////////////////////////////////////////////////////////// @@ -1528,7 +1593,12 @@ void SWR_API SwrEndFrame( HANDLE hContext) { - RDTSC_ENDFRAME(); SWR_CONTEXT *pContext = GetContext(hContext); + DRAW_CONTEXT* pDC = GetDrawContext(pContext); + + RDTSC_ENDFRAME(); + AR_API_EVENT(FrameEndEvent(pContext->frameCount, pDC->drawId)); + pContext->frameCount++; } + diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/api.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/api.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/api.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/api.h 2017-06-01 10:37:10.000000000 +0000 @@ -1,5 +1,5 @@ /**************************************************************************** -* Copyright (C) 2014-2015 Intel Corporation. All Rights Reserved. +* Copyright (C) 2014-2016 Intel Corporation. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -32,18 +32,82 @@ #include "common/os.h" #include -#include +#include #include "common/simdintrin.h" #include "common/formats.h" -#include "core/utils.h" #include "core/state.h" -///@todo place all the API functions into the 'swr' namespace. - typedef void(SWR_API *PFN_CALLBACK_FUNC)(uint64_t data, uint64_t data2, uint64_t data3); ////////////////////////////////////////////////////////////////////////// +/// @brief Rectangle structure +struct SWR_RECT +{ + int32_t xmin; ///< inclusive + int32_t ymin; ///< inclusive + int32_t xmax; ///< exclusive + int32_t ymax; ///< exclusive + + bool operator == (const SWR_RECT& rhs) + { + return (this->ymin == rhs.ymin && + this->ymax == rhs.ymax && + this->xmin == rhs.xmin && + this->xmax == rhs.xmax); + } + + bool operator != (const SWR_RECT& rhs) + { + return !(*this == rhs); + } + + SWR_RECT& Intersect(const SWR_RECT& other) + { + this->xmin = std::max(this->xmin, other.xmin); + this->ymin = std::max(this->ymin, other.ymin); + this->xmax = std::min(this->xmax, other.xmax); + this->ymax = std::min(this->ymax, other.ymax); + + if (xmax - xmin < 0 || + ymax - ymin < 0) + { + // Zero area + ymin = ymax = xmin = xmax = 0; + } + + return *this; + } + SWR_RECT& operator &= (const SWR_RECT& other) + { + return Intersect(other); + } + + SWR_RECT& Union(const SWR_RECT& other) + { + this->xmin = std::min(this->xmin, other.xmin); + this->ymin = std::min(this->ymin, other.ymin); + this->xmax = std::max(this->xmax, other.xmax); + this->ymax = std::max(this->ymax, other.ymax); + + return *this; + } + + SWR_RECT& operator |= (const SWR_RECT& other) + { + return Union(other); + } + + void Translate(int32_t x, int32_t y) + { + xmin += x; + ymin += y; + xmax += x; + ymax += y; + } +}; + +////////////////////////////////////////////////////////////////////////// /// @brief Function signature for load hot tiles /// @param hPrivateContext - handle to private data /// @param dstFormat - format of the hot tile @@ -67,33 +131,80 @@ SWR_RENDERTARGET_ATTACHMENT renderTargetIndex, uint32_t x, uint32_t y, uint32_t renderTargetArrayIndex, uint8_t *pSrcHotTile); +////////////////////////////////////////////////////////////////////////// /// @brief Function signature for clearing from the hot tiles clear value /// @param hPrivateContext - handle to private data /// @param renderTargetIndex - render target to store, can be color, depth or stencil /// @param x - destination x coordinate /// @param y - destination y coordinate +/// @param renderTargetArrayIndex - render target array offset from arrayIndex /// @param pClearColor - pointer to the hot tile's clear value typedef void(SWR_API *PFN_CLEAR_TILE)(HANDLE hPrivateContext, SWR_RENDERTARGET_ATTACHMENT rtIndex, - uint32_t x, uint32_t y, const float* pClearColor); + uint32_t x, uint32_t y, uint32_t renderTargetArrayIndex, const float* pClearColor); + +////////////////////////////////////////////////////////////////////////// +/// @brief Callback to allow driver to update their copy of streamout write offset. +/// This is call is made for any draw operation that has streamout enabled +/// and has updated the write offset. +/// @param hPrivateContext - handle to private data +/// @param soBufferSlot - buffer slot for write offset +/// @param soWriteOffset - update value for so write offset. +typedef void(SWR_API *PFN_UPDATE_SO_WRITE_OFFSET)(HANDLE hPrivateContext, + uint32_t soBufferSlot, uint32_t soWriteOffset); + +////////////////////////////////////////////////////////////////////////// +/// @brief Callback to allow driver to update their copy of stats. +/// @param hPrivateContext - handle to private data +/// @param pStats - pointer to draw stats +typedef void(SWR_API *PFN_UPDATE_STATS)(HANDLE hPrivateContext, + const SWR_STATS* pStats); + +////////////////////////////////////////////////////////////////////////// +/// @brief Callback to allow driver to update their copy of FE stats. +/// @note Its optimal to have a separate callback for FE stats since +/// there is only one DC per FE thread. This means we do not have +/// to sum up the stats across all of the workers. +/// @param hPrivateContext - handle to private data +/// @param pStats - pointer to draw stats +typedef void(SWR_API *PFN_UPDATE_STATS_FE)(HANDLE hPrivateContext, + const SWR_STATS_FE* pStats); +////////////////////////////////////////////////////////////////////////// +/// BucketManager +/// Forward Declaration (see rdtsc_buckets.h for full definition) +///////////////////////////////////////////////////////////////////////// class BucketManager; ////////////////////////////////////////////////////////////////////////// +/// SWR_THREADING_INFO +///////////////////////////////////////////////////////////////////////// +struct SWR_THREADING_INFO +{ + uint32_t MAX_WORKER_THREADS; + uint32_t MAX_NUMA_NODES; + uint32_t MAX_CORES_PER_NUMA_NODE; + uint32_t MAX_THREADS_PER_CORE; + bool SINGLE_THREADED; +}; + +////////////////////////////////////////////////////////////////////////// /// SWR_CREATECONTEXT_INFO ///////////////////////////////////////////////////////////////////////// struct SWR_CREATECONTEXT_INFO { - DRIVER_TYPE driver; - // External functions (e.g. sampler) need per draw context state. // Use SwrGetPrivateContextState() to access private state. uint32_t privateStateSize; - // Tile manipulation functions - PFN_LOAD_TILE pfnLoadTile; - PFN_STORE_TILE pfnStoreTile; - PFN_CLEAR_TILE pfnClearTile; + // Callback functions + PFN_LOAD_TILE pfnLoadTile; + PFN_STORE_TILE pfnStoreTile; + PFN_CLEAR_TILE pfnClearTile; + PFN_UPDATE_SO_WRITE_OFFSET pfnUpdateSoWriteOffset; + PFN_UPDATE_STATS pfnUpdateStats; + PFN_UPDATE_STATS_FE pfnUpdateStatsFE; + // Pointer to rdtsc buckets mgr returned to the caller. // Only populated when KNOB_ENABLE_RDTSC is set @@ -101,17 +212,9 @@ // Output: size required memory passed to for SwrSaveState / SwrRestoreState size_t contextSaveSize; -}; -////////////////////////////////////////////////////////////////////////// -/// SWR_RECT -///////////////////////////////////////////////////////////////////////// -struct SWR_RECT -{ - uint32_t left; - uint32_t right; - uint32_t top; - uint32_t bottom; + // Input (optional): Threading info that overrides any set KNOB values. + SWR_THREADING_INFO* pThreadInfo; }; ////////////////////////////////////////////////////////////////////////// @@ -166,6 +269,12 @@ HANDLE hContext); ////////////////////////////////////////////////////////////////////////// +/// @brief Blocks until all FE rendering has been completed. +/// @param hContext - Handle passed back from SwrCreateContext +void SWR_API SwrWaitForIdleFE( + HANDLE hContext); + +////////////////////////////////////////////////////////////////////////// /// @brief Set vertex buffer state. /// @param hContext - Handle passed back from SwrCreateContext /// @param numBuffers - Number of vertex buffer state descriptors. @@ -304,6 +413,14 @@ SWR_BACKEND_STATE *pState); ////////////////////////////////////////////////////////////////////////// +/// @brief Set depth bounds state +/// @param hContext - Handle passed back from SwrCreateContext +/// @param pState - Pointer to state. +void SWR_API SwrSetDepthBoundsState( + HANDLE hContext, + SWR_DEPTH_BOUNDS_STATE *pState); + +////////////////////////////////////////////////////////////////////////// /// @brief Set pixel shader state /// @param hContext - Handle passed back from SwrCreateContext /// @param pState - Pointer to state. @@ -330,19 +447,6 @@ PFN_BLEND_JIT_FUNC pfnBlendFunc); ////////////////////////////////////////////////////////////////////////// -/// @brief Set linkage mask -/// @param hContext - Handle passed back from SwrCreateContext -/// @param mask - Specifies which vertex outputs are are needed by PS. -/// @param pMap - (Optional)Linkage map to specify where FE attributes are -/// gathered from to supply PS attribute values. The length -/// of the map buffer needs to match the number of set bits -/// in "mask". -void SWR_API SwrSetLinkage( - HANDLE hContext, - uint32_t mask, - const uint8_t* pMap); - -////////////////////////////////////////////////////////////////////////// /// @brief SwrDraw /// @param hContext - Handle passed back from SwrCreateContext /// @param topology - Specifies topology for draw. @@ -406,19 +510,23 @@ /// @brief SwrInvalidateTiles /// @param hContext - Handle passed back from SwrCreateContext /// @param attachmentMask - The mask specifies which surfaces attached to the hottiles to invalidate. +/// @param invalidateRect - The pixel-coordinate rectangle to invalidate. This will be expanded to +/// be hottile size-aligned. void SWR_API SwrInvalidateTiles( HANDLE hContext, - uint32_t attachmentMask); + uint32_t attachmentMask, + const SWR_RECT& invalidateRect); ////////////////////////////////////////////////////////////////////////// /// @brief SwrDiscardRect /// @param hContext - Handle passed back from SwrCreateContext /// @param attachmentMask - The mask specifies which surfaces attached to the hottiles to discard. -/// @param rect - if rect is all zeros, the entire attachment surface will be discarded +/// @param rect - The pixel-coordinate rectangle to discard. Only fully-covered hottiles will be +/// discarded. void SWR_API SwrDiscardRect( HANDLE hContext, uint32_t attachmentMask, - SWR_RECT rect); + const SWR_RECT& rect); ////////////////////////////////////////////////////////////////////////// /// @brief SwrDispatch @@ -443,16 +551,33 @@ /// @todo Add a good description for what attachments are and when and why you would use the different SWR_TILE_STATEs. void SWR_API SwrStoreTiles( HANDLE hContext, - SWR_RENDERTARGET_ATTACHMENT attachment, - SWR_TILE_STATE postStoreTileState); + uint32_t attachmentMask, + SWR_TILE_STATE postStoreTileState, + const SWR_RECT& storeRect); + +////////////////////////////////////////////////////////////////////////// +/// @brief SwrClearRenderTarget - Clear attached render targets / depth / stencil +/// @param hContext - Handle passed back from SwrCreateContext +/// @param attachmentMask - combination of SWR_ATTACHMENT_*_BIT attachments to clear +/// @param renderTargetArrayIndex - the RT array index to clear +/// @param clearColor - color use for clearing render targets +/// @param z - depth value use for clearing depth buffer +/// @param stencil - stencil value used for clearing stencil buffer +/// @param clearRect - The pixel-coordinate rectangle to clear in all cleared buffers void SWR_API SwrClearRenderTarget( HANDLE hContext, - uint32_t clearMask, + uint32_t attachmentMask, + uint32_t renderTargetArrayIndex, const float clearColor[4], float z, - uint8_t stencil); + uint8_t stencil, + const SWR_RECT& clearRect); +////////////////////////////////////////////////////////////////////////// +/// @brief SwrSetRastState +/// @param hContext - Handle passed back from SwrCreateContext +/// @param pRastState - New SWR_RASTSTATE used for SwrDraw* commands void SWR_API SwrSetRastState( HANDLE hContext, const SWR_RASTSTATE *pRastState); @@ -467,7 +592,7 @@ HANDLE hContext, uint32_t numViewports, const SWR_VIEWPORT* pViewports, - const SWR_VIEWPORT_MATRIX* pMatrices); + const SWR_VIEWPORT_MATRICES* pMatrices); ////////////////////////////////////////////////////////////////////////// /// @brief SwrSetScissorRects @@ -477,7 +602,7 @@ void SWR_API SwrSetScissorRects( HANDLE hContext, uint32_t numScissors, - const BBOX* pScissors); + const SWR_RECT* pScissors); ////////////////////////////////////////////////////////////////////////// /// @brief Returns a pointer to the private context state for the current @@ -504,21 +629,18 @@ uint32_t align); ////////////////////////////////////////////////////////////////////////// -/// @brief Returns pointer to SWR stats. -/// @note The counters are incremented by multiple threads. -/// When calling this, you need to ensure all previous operations -/// have completed. +/// @brief Enables stats counting /// @param hContext - Handle passed back from SwrCreateContext -/// @param pStats - SWR will fill this out for caller. -void SWR_API SwrGetStats( +/// @param enable - If true then counts are incremented. +void SWR_API SwrEnableStatsFE( HANDLE hContext, - SWR_STATS* pStats); + bool enable); ////////////////////////////////////////////////////////////////////////// /// @brief Enables stats counting /// @param hContext - Handle passed back from SwrCreateContext /// @param enable - If true then counts are incremented. -void SWR_API SwrEnableStats( +void SWR_API SwrEnableStatsBE( HANDLE hContext, bool enable); @@ -527,4 +649,6 @@ /// @param hContext - Handle passed back from SwrCreateContext void SWR_API SwrEndFrame( HANDLE hContext); -#endif//__SWR_API_H__ + + +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/backend.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/backend.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/backend.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/backend.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -37,7 +37,7 @@ #include -typedef void(*PFN_CLEAR_TILES)(DRAW_CONTEXT*, SWR_RENDERTARGET_ATTACHMENT rt, uint32_t, DWORD[4]); +typedef void(*PFN_CLEAR_TILES)(DRAW_CONTEXT*, SWR_RENDERTARGET_ATTACHMENT rt, uint32_t, uint32_t, DWORD[4], const SWR_RECT& rect); static PFN_CLEAR_TILES sClearTilesTable[NUM_SWR_FORMATS]; ////////////////////////////////////////////////////////////////////////// @@ -47,10 +47,10 @@ /// @param threadGroupId - the linear index for the thread group within the dispatch. void ProcessComputeBE(DRAW_CONTEXT* pDC, uint32_t workerId, uint32_t threadGroupId, void*& pSpillFillBuffer) { - RDTSC_START(BEDispatch); - SWR_CONTEXT *pContext = pDC->pContext; + AR_BEGIN(BEDispatch, pDC->drawId); + const COMPUTE_DESC* pTaskData = (COMPUTE_DESC*)pDC->pDispatch->GetTasksData(); SWR_ASSERT(pTaskData != nullptr); @@ -68,89 +68,92 @@ csContext.dispatchDims[0] = pTaskData->threadGroupCountX; csContext.dispatchDims[1] = pTaskData->threadGroupCountY; csContext.dispatchDims[2] = pTaskData->threadGroupCountZ; - csContext.pTGSM = pContext->pScratch[workerId]; + csContext.pTGSM = pContext->ppScratch[workerId]; csContext.pSpillFillBuffer = (uint8_t*)pSpillFillBuffer; state.pfnCsFunc(GetPrivateState(pDC), &csContext); - UPDATE_STAT(CsInvocations, state.totalThreadsInGroup); + UPDATE_STAT_BE(CsInvocations, state.totalThreadsInGroup); - RDTSC_STOP(BEDispatch, 1, 0); + AR_END(BEDispatch, 1); } -void ProcessSyncBE(DRAW_CONTEXT *pDC, uint32_t workerId, uint32_t macroTile, void *pUserData) +////////////////////////////////////////////////////////////////////////// +/// @brief Process shutdown. +/// @param pDC - pointer to draw context (dispatch). +/// @param workerId - The unique worker ID that is assigned to this thread. +/// @param threadGroupId - the linear index for the thread group within the dispatch. +void ProcessShutdownBE(DRAW_CONTEXT *pDC, uint32_t workerId, uint32_t macroTile, void *pUserData) { - SYNC_DESC *pSync = (SYNC_DESC*)pUserData; + // Dummy function +} +void ProcessSyncBE(DRAW_CONTEXT *pDC, uint32_t workerId, uint32_t macroTile, void *pUserData) +{ uint32_t x, y; MacroTileMgr::getTileIndices(macroTile, x, y); SWR_ASSERT(x == 0 && y == 0); - - if (pSync->pfnCallbackFunc != nullptr) - { - pSync->pfnCallbackFunc(pSync->userData, pSync->userData2, pSync->userData3); - } } -void ProcessQueryStatsBE(DRAW_CONTEXT *pDC, uint32_t workerId, uint32_t macroTile, void *pUserData) +template +void ClearRasterTile(uint8_t *pTileBuffer, simdvector &value) { - QUERY_DESC* pQueryDesc = (QUERY_DESC*)pUserData; - SWR_STATS* pStats = pQueryDesc->pStats; - SWR_CONTEXT *pContext = pDC->pContext; - - SWR_ASSERT(pStats != nullptr); - - for (uint32_t i = 0; i < pContext->NumWorkerThreads; ++i) + auto lambda = [&](int32_t comp) { - pStats->DepthPassCount += pContext->stats[i].DepthPassCount; + FormatTraits::storeSOA(comp, pTileBuffer, value.v[comp]); + + pTileBuffer += (KNOB_SIMD_WIDTH * FormatTraits::GetBPC(comp) / 8); + }; - pStats->IaVertices += pContext->stats[i].IaVertices; - pStats->IaPrimitives += pContext->stats[i].IaPrimitives; - pStats->VsInvocations += pContext->stats[i].VsInvocations; - pStats->HsInvocations += pContext->stats[i].HsInvocations; - pStats->DsInvocations += pContext->stats[i].DsInvocations; - pStats->GsInvocations += pContext->stats[i].GsInvocations; - pStats->PsInvocations += pContext->stats[i].PsInvocations; - pStats->CInvocations += pContext->stats[i].CInvocations; - pStats->CsInvocations += pContext->stats[i].CsInvocations; - pStats->CPrimitives += pContext->stats[i].CPrimitives; - pStats->GsPrimitives += pContext->stats[i].GsPrimitives; - - for (uint32_t stream = 0; stream < MAX_SO_STREAMS; ++stream) - { - pStats->SoWriteOffset[stream] += pContext->stats[i].SoWriteOffset[stream]; - - /// @note client is required to provide valid write offset before every draw, so we clear - /// out the contents of the write offset when storing stats - pContext->stats[i].SoWriteOffset[stream] = 0; + const uint32_t numIter = (KNOB_TILE_Y_DIM / SIMD_TILE_Y_DIM) * (KNOB_TILE_X_DIM / SIMD_TILE_X_DIM); - pStats->SoPrimStorageNeeded[stream] += pContext->stats[i].SoPrimStorageNeeded[stream]; - pStats->SoNumPrimsWritten[stream] += pContext->stats[i].SoNumPrimsWritten[stream]; - } + for (uint32_t i = 0; i < numIter; ++i) + { + UnrollerL<0, FormatTraits::numComps, 1>::step(lambda); } } +#if USE_8x2_TILE_BACKEND template -void ClearRasterTile(uint8_t *pTileBuffer, simdvector &value) +void ClearRasterTile(uint8_t *pTileBuffer, simd16vector &value) { - auto lambda = [&](int comp) + auto lambda = [&](int32_t comp) { FormatTraits::storeSOA(comp, pTileBuffer, value.v[comp]); - pTileBuffer += (KNOB_SIMD_WIDTH * FormatTraits::GetBPC(comp) / 8); + + pTileBuffer += (KNOB_SIMD16_WIDTH * FormatTraits::GetBPC(comp) / 8); }; - const uint32_t numIter = (KNOB_TILE_Y_DIM / SIMD_TILE_Y_DIM) * (KNOB_TILE_X_DIM / SIMD_TILE_X_DIM); + const uint32_t numIter = (KNOB_TILE_Y_DIM / SIMD16_TILE_Y_DIM) * (KNOB_TILE_X_DIM / SIMD16_TILE_X_DIM); + for (uint32_t i = 0; i < numIter; ++i) { UnrollerL<0, FormatTraits::numComps, 1>::step(lambda); } } +#endif template -INLINE void ClearMacroTile(DRAW_CONTEXT *pDC, SWR_RENDERTARGET_ATTACHMENT rt, uint32_t macroTile, DWORD clear[4]) +INLINE void ClearMacroTile(DRAW_CONTEXT *pDC, SWR_RENDERTARGET_ATTACHMENT rt, uint32_t macroTile, uint32_t renderTargetArrayIndex, DWORD clear[4], const SWR_RECT& rect) { // convert clear color to hottile format // clear color is in RGBA float/uint32 +#if USE_8x2_TILE_BACKEND + simd16vector vClear; + for (uint32_t comp = 0; comp < FormatTraits::numComps; ++comp) + { + simd16scalar vComp; + vComp = _simd16_load1_ps((const float*)&clear[comp]); + if (FormatTraits::isNormalized(comp)) + { + vComp = _simd16_mul_ps(vComp, _simd16_set1_ps(FormatTraits::fromFloat(comp))); + vComp = _simd16_castsi_ps(_simd16_cvtps_epi32(vComp)); + } + vComp = FormatTraits::pack(comp, vComp); + vClear.v[FormatTraits::swizzle(comp)] = vComp; + } + +#else simdvector vClear; for (uint32_t comp = 0; comp < FormatTraits::numComps; ++comp) { @@ -165,51 +168,53 @@ vClear.v[FormatTraits::swizzle(comp)] = vComp; } +#endif uint32_t tileX, tileY; MacroTileMgr::getTileIndices(macroTile, tileX, tileY); - const API_STATE& state = GetApiState(pDC); - - int top = KNOB_MACROTILE_Y_DIM_FIXED * tileY; - int bottom = top + KNOB_MACROTILE_Y_DIM_FIXED - 1; - int left = KNOB_MACROTILE_X_DIM_FIXED * tileX; - int right = left + KNOB_MACROTILE_X_DIM_FIXED - 1; - - // intersect with scissor - top = std::max(top, state.scissorInFixedPoint.top); - left = std::max(left, state.scissorInFixedPoint.left); - bottom = std::min(bottom, state.scissorInFixedPoint.bottom); - right = std::min(right, state.scissorInFixedPoint.right); + + // Init to full macrotile + SWR_RECT clearTile = + { + KNOB_MACROTILE_X_DIM * int32_t(tileX), + KNOB_MACROTILE_Y_DIM * int32_t(tileY), + KNOB_MACROTILE_X_DIM * int32_t(tileX + 1), + KNOB_MACROTILE_Y_DIM * int32_t(tileY + 1), + }; + + // intersect with clear rect + clearTile &= rect; // translate to local hottile origin - top -= KNOB_MACROTILE_Y_DIM_FIXED * tileY; - bottom -= KNOB_MACROTILE_Y_DIM_FIXED * tileY; - left -= KNOB_MACROTILE_X_DIM_FIXED * tileX; - right -= KNOB_MACROTILE_X_DIM_FIXED * tileX; + clearTile.Translate(-int32_t(tileX) * KNOB_MACROTILE_X_DIM, -int32_t(tileY) * KNOB_MACROTILE_Y_DIM); + + // Make maximums inclusive (needed for convert to raster tiles) + clearTile.xmax -= 1; + clearTile.ymax -= 1; // convert to raster tiles - top >>= (KNOB_TILE_Y_DIM_SHIFT + FIXED_POINT_SHIFT); - bottom >>= (KNOB_TILE_Y_DIM_SHIFT + FIXED_POINT_SHIFT); - left >>= (KNOB_TILE_X_DIM_SHIFT + FIXED_POINT_SHIFT); - right >>= (KNOB_TILE_X_DIM_SHIFT + FIXED_POINT_SHIFT); + clearTile.ymin >>= (KNOB_TILE_Y_DIM_SHIFT); + clearTile.ymax >>= (KNOB_TILE_Y_DIM_SHIFT); + clearTile.xmin >>= (KNOB_TILE_X_DIM_SHIFT); + clearTile.xmax >>= (KNOB_TILE_X_DIM_SHIFT); - const int numSamples = GetNumSamples(pDC->pState->state.rastState.sampleCount); + const int32_t numSamples = GetNumSamples(pDC->pState->state.rastState.sampleCount); // compute steps between raster tile samples / raster tiles / macro tile rows const uint32_t rasterTileSampleStep = KNOB_TILE_X_DIM * KNOB_TILE_Y_DIM * FormatTraits::bpp / 8; const uint32_t rasterTileStep = (KNOB_TILE_X_DIM * KNOB_TILE_Y_DIM * (FormatTraits::bpp / 8)) * numSamples; const uint32_t macroTileRowStep = (KNOB_MACROTILE_X_DIM / KNOB_TILE_X_DIM) * rasterTileStep; const uint32_t pitch = (FormatTraits::bpp * KNOB_MACROTILE_X_DIM / 8); - HOTTILE *pHotTile = pDC->pContext->pHotTileMgr->GetHotTile(pDC->pContext, pDC, macroTile, rt, true, numSamples); - uint32_t rasterTileStartOffset = (ComputeTileOffset2D< TilingTraits::bpp > >(pitch, left, top)) * numSamples; + HOTTILE *pHotTile = pDC->pContext->pHotTileMgr->GetHotTile(pDC->pContext, pDC, macroTile, rt, true, numSamples, renderTargetArrayIndex); + uint32_t rasterTileStartOffset = (ComputeTileOffset2D< TilingTraits::bpp > >(pitch, clearTile.xmin, clearTile.ymin)) * numSamples; uint8_t* pRasterTileRow = pHotTile->pBuffer + rasterTileStartOffset; //(ComputeTileOffset2D< TilingTraits::bpp > >(pitch, x, y)) * numSamples; // loop over all raster tiles in the current hot tile - for (int y = top; y <= bottom; ++y) + for (int32_t y = clearTile.ymin; y <= clearTile.ymax; ++y) { uint8_t* pRasterTile = pRasterTileRow; - for (int x = left; x <= right; ++x) + for (int32_t x = clearTile.xmin; x <= clearTile.xmax; ++x) { - for( int sampleNum = 0; sampleNum < numSamples; sampleNum++) + for( int32_t sampleNum = 0; sampleNum < numSamples; sampleNum++) { ClearRasterTile(pRasterTile, vClear); pRasterTile += rasterTileSampleStep; @@ -224,107 +229,113 @@ void ProcessClearBE(DRAW_CONTEXT *pDC, uint32_t workerId, uint32_t macroTile, void *pUserData) { + SWR_CONTEXT *pContext = pDC->pContext; + if (KNOB_FAST_CLEAR) { CLEAR_DESC *pClear = (CLEAR_DESC*)pUserData; - SWR_CONTEXT *pContext = pDC->pContext; SWR_MULTISAMPLE_COUNT sampleCount = pDC->pState->state.rastState.sampleCount; uint32_t numSamples = GetNumSamples(sampleCount); - SWR_ASSERT(pClear->flags.bits != 0); // shouldn't be here without a reason. + SWR_ASSERT(pClear->attachmentMask != 0); // shouldn't be here without a reason. - RDTSC_START(BEClear); + AR_BEGIN(BEClear, pDC->drawId); - if (pClear->flags.mask & SWR_CLEAR_COLOR) + if (pClear->attachmentMask & SWR_ATTACHMENT_MASK_COLOR) { - HOTTILE *pHotTile = pContext->pHotTileMgr->GetHotTile(pContext, pDC, macroTile, SWR_ATTACHMENT_COLOR0, true, numSamples); - // All we want to do here is to mark the hot tile as being in a "needs clear" state. - pHotTile->clearData[0] = *(DWORD*)&(pClear->clearRTColor[0]); - pHotTile->clearData[1] = *(DWORD*)&(pClear->clearRTColor[1]); - pHotTile->clearData[2] = *(DWORD*)&(pClear->clearRTColor[2]); - pHotTile->clearData[3] = *(DWORD*)&(pClear->clearRTColor[3]); - pHotTile->state = HOTTILE_CLEAR; + unsigned long rt = 0; + uint32_t mask = pClear->attachmentMask & SWR_ATTACHMENT_MASK_COLOR; + while (_BitScanForward(&rt, mask)) + { + mask &= ~(1 << rt); + + HOTTILE *pHotTile = pContext->pHotTileMgr->GetHotTile(pContext, pDC, macroTile, (SWR_RENDERTARGET_ATTACHMENT)rt, true, numSamples, pClear->renderTargetArrayIndex); + + // All we want to do here is to mark the hot tile as being in a "needs clear" state. + pHotTile->clearData[0] = *(DWORD*)&(pClear->clearRTColor[0]); + pHotTile->clearData[1] = *(DWORD*)&(pClear->clearRTColor[1]); + pHotTile->clearData[2] = *(DWORD*)&(pClear->clearRTColor[2]); + pHotTile->clearData[3] = *(DWORD*)&(pClear->clearRTColor[3]); + pHotTile->state = HOTTILE_CLEAR; + } } - if (pClear->flags.mask & SWR_CLEAR_DEPTH) + if (pClear->attachmentMask & SWR_ATTACHMENT_DEPTH_BIT) { - HOTTILE *pHotTile = pContext->pHotTileMgr->GetHotTile(pContext, pDC, macroTile, SWR_ATTACHMENT_DEPTH, true, numSamples); + HOTTILE *pHotTile = pContext->pHotTileMgr->GetHotTile(pContext, pDC, macroTile, SWR_ATTACHMENT_DEPTH, true, numSamples, pClear->renderTargetArrayIndex); pHotTile->clearData[0] = *(DWORD*)&pClear->clearDepth; pHotTile->state = HOTTILE_CLEAR; } - if (pClear->flags.mask & SWR_CLEAR_STENCIL) + if (pClear->attachmentMask & SWR_ATTACHMENT_STENCIL_BIT) { - HOTTILE *pHotTile = pContext->pHotTileMgr->GetHotTile(pContext, pDC, macroTile, SWR_ATTACHMENT_STENCIL, true, numSamples); + HOTTILE *pHotTile = pContext->pHotTileMgr->GetHotTile(pContext, pDC, macroTile, SWR_ATTACHMENT_STENCIL, true, numSamples, pClear->renderTargetArrayIndex); - pHotTile->clearData[0] = *(DWORD*)&pClear->clearStencil; + pHotTile->clearData[0] = pClear->clearStencil; pHotTile->state = HOTTILE_CLEAR; } - RDTSC_STOP(BEClear, 0, 0); + AR_END(BEClear, 1); } else { // Legacy clear CLEAR_DESC *pClear = (CLEAR_DESC*)pUserData; - RDTSC_START(BEClear); + AR_BEGIN(BEClear, pDC->drawId); - if (pClear->flags.mask & SWR_CLEAR_COLOR) + if (pClear->attachmentMask & SWR_ATTACHMENT_MASK_COLOR) { - /// @todo clear data should come in as RGBA32_FLOAT DWORD clearData[4]; - float clearFloat[4]; - clearFloat[0] = ((uint8_t*)(&pClear->clearRTColor))[0] / 255.0f; - clearFloat[1] = ((uint8_t*)(&pClear->clearRTColor))[1] / 255.0f; - clearFloat[2] = ((uint8_t*)(&pClear->clearRTColor))[2] / 255.0f; - clearFloat[3] = ((uint8_t*)(&pClear->clearRTColor))[3] / 255.0f; - clearData[0] = *(DWORD*)&clearFloat[0]; - clearData[1] = *(DWORD*)&clearFloat[1]; - clearData[2] = *(DWORD*)&clearFloat[2]; - clearData[3] = *(DWORD*)&clearFloat[3]; + clearData[0] = *(DWORD*)&(pClear->clearRTColor[0]); + clearData[1] = *(DWORD*)&(pClear->clearRTColor[1]); + clearData[2] = *(DWORD*)&(pClear->clearRTColor[2]); + clearData[3] = *(DWORD*)&(pClear->clearRTColor[3]); PFN_CLEAR_TILES pfnClearTiles = sClearTilesTable[KNOB_COLOR_HOT_TILE_FORMAT]; SWR_ASSERT(pfnClearTiles != nullptr); - pfnClearTiles(pDC, SWR_ATTACHMENT_COLOR0, macroTile, clearData); + unsigned long rt = 0; + uint32_t mask = pClear->attachmentMask & SWR_ATTACHMENT_MASK_COLOR; + while (_BitScanForward(&rt, mask)) + { + mask &= ~(1 << rt); + + pfnClearTiles(pDC, (SWR_RENDERTARGET_ATTACHMENT)rt, macroTile, pClear->renderTargetArrayIndex, clearData, pClear->rect); + } } - if (pClear->flags.mask & SWR_CLEAR_DEPTH) + if (pClear->attachmentMask & SWR_ATTACHMENT_DEPTH_BIT) { DWORD clearData[4]; clearData[0] = *(DWORD*)&pClear->clearDepth; PFN_CLEAR_TILES pfnClearTiles = sClearTilesTable[KNOB_DEPTH_HOT_TILE_FORMAT]; SWR_ASSERT(pfnClearTiles != nullptr); - pfnClearTiles(pDC, SWR_ATTACHMENT_DEPTH, macroTile, clearData); + pfnClearTiles(pDC, SWR_ATTACHMENT_DEPTH, macroTile, pClear->renderTargetArrayIndex, clearData, pClear->rect); } - if (pClear->flags.mask & SWR_CLEAR_STENCIL) + if (pClear->attachmentMask & SWR_ATTACHMENT_STENCIL_BIT) { - uint32_t value = pClear->clearStencil; DWORD clearData[4]; - clearData[0] = *(DWORD*)&value; + clearData[0] = pClear->clearStencil; PFN_CLEAR_TILES pfnClearTiles = sClearTilesTable[KNOB_STENCIL_HOT_TILE_FORMAT]; - pfnClearTiles(pDC, SWR_ATTACHMENT_STENCIL, macroTile, clearData); + pfnClearTiles(pDC, SWR_ATTACHMENT_STENCIL, macroTile, pClear->renderTargetArrayIndex, clearData, pClear->rect); } - RDTSC_STOP(BEClear, 0, 0); + AR_END(BEClear, 1); } } - -void ProcessStoreTileBE(DRAW_CONTEXT *pDC, uint32_t workerId, uint32_t macroTile, void *pData) +void ProcessStoreTileBE(DRAW_CONTEXT *pDC, uint32_t workerId, uint32_t macroTile, STORE_TILES_DESC* pDesc, + SWR_RENDERTARGET_ATTACHMENT attachment) { - RDTSC_START(BEStoreTiles); - STORE_TILES_DESC *pDesc = (STORE_TILES_DESC*)pData; SWR_CONTEXT *pContext = pDC->pContext; -#ifdef KNOB_ENABLE_RDTSC - uint32_t numTiles = 0; -#endif + AR_BEGIN(BEStoreTiles, pDC->drawId); + SWR_FORMAT srcFormat; - switch (pDesc->attachment) + switch (attachment) { case SWR_ATTACHMENT_COLOR0: case SWR_ATTACHMENT_COLOR1: @@ -336,14 +347,14 @@ case SWR_ATTACHMENT_COLOR7: srcFormat = KNOB_COLOR_HOT_TILE_FORMAT; break; case SWR_ATTACHMENT_DEPTH: srcFormat = KNOB_DEPTH_HOT_TILE_FORMAT; break; case SWR_ATTACHMENT_STENCIL: srcFormat = KNOB_STENCIL_HOT_TILE_FORMAT; break; - default: SWR_ASSERT(false, "Unknown attachment: %d", pDesc->attachment); srcFormat = KNOB_COLOR_HOT_TILE_FORMAT; break; + default: SWR_ASSERT(false, "Unknown attachment: %d", attachment); srcFormat = KNOB_COLOR_HOT_TILE_FORMAT; break; } uint32_t x, y; MacroTileMgr::getTileIndices(macroTile, x, y); // Only need to store the hottile if it's been rendered to... - HOTTILE *pHotTile = pContext->pHotTileMgr->GetHotTile(pContext, pDC, macroTile, pDesc->attachment, false); + HOTTILE *pHotTile = pContext->pHotTileMgr->GetHotTileNoLoad(pContext, pDC, macroTile, attachment, false); if (pHotTile) { // clear if clear is pending (i.e., not rendered to), then mark as dirty for store. @@ -352,16 +363,16 @@ PFN_CLEAR_TILES pfnClearTiles = sClearTilesTable[srcFormat]; SWR_ASSERT(pfnClearTiles != nullptr); - pfnClearTiles(pDC, pDesc->attachment, macroTile, pHotTile->clearData); + pfnClearTiles(pDC, attachment, macroTile, pHotTile->renderTargetArrayIndex, pHotTile->clearData, pDesc->rect); } if (pHotTile->state == HOTTILE_DIRTY || pDesc->postStoreTileState == (SWR_TILE_STATE)HOTTILE_DIRTY) { - int destX = KNOB_MACROTILE_X_DIM * x; - int destY = KNOB_MACROTILE_Y_DIM * y; + int32_t destX = KNOB_MACROTILE_X_DIM * x; + int32_t destY = KNOB_MACROTILE_Y_DIM * y; pContext->pfnStoreTile(GetPrivateState(pDC), srcFormat, - pDesc->attachment, destX, destY, pHotTile->renderTargetArrayIndex, pHotTile->pBuffer); + attachment, destX, destY, pHotTile->renderTargetArrayIndex, pHotTile->pBuffer); } @@ -370,16 +381,28 @@ pHotTile->state = (HOTTILE_STATE)pDesc->postStoreTileState; } } - RDTSC_STOP(BEStoreTiles, numTiles, pDC->drawId); + AR_END(BEStoreTiles, 1); } +void ProcessStoreTilesBE(DRAW_CONTEXT *pDC, uint32_t workerId, uint32_t macroTile, void *pData) +{ + STORE_TILES_DESC *pDesc = (STORE_TILES_DESC*)pData; + + unsigned long rt = 0; + uint32_t mask = pDesc->attachmentMask; + while (_BitScanForward(&rt, mask)) + { + mask &= ~(1 << rt); + ProcessStoreTileBE(pDC, workerId, macroTile, pDesc, (SWR_RENDERTARGET_ATTACHMENT)rt); + } +} void ProcessDiscardInvalidateTilesBE(DRAW_CONTEXT *pDC, uint32_t workerId, uint32_t macroTile, void *pData) { DISCARD_INVALIDATE_TILES_DESC *pDesc = (DISCARD_INVALIDATE_TILES_DESC *)pData; SWR_CONTEXT *pContext = pDC->pContext; - const int numSamples = GetNumSamples(pDC->pState->state.rastState.sampleCount); + const int32_t numSamples = GetNumSamples(pDC->pState->state.rastState.sampleCount); for (uint32_t i = 0; i < SWR_NUM_ATTACHMENTS; ++i) { @@ -404,12 +427,6 @@ #error Unsupported vector width #endif -INLINE -bool CanEarlyZ(const SWR_PS_STATE *pPSState) -{ - return (pPSState->forceEarlyZ || (!pPSState->writesODepth && !pPSState->usesSourceDepth && !pPSState->usesUAV)); -} - simdmask ComputeUserClipMask(uint8_t clipMask, float* pUserClipBuffer, simdscalar vI, simdscalar vJ) { simdscalar vClipMask = _simd_setzero_ps(); @@ -437,122 +454,101 @@ template void BackendSingleSample(DRAW_CONTEXT *pDC, uint32_t workerId, uint32_t x, uint32_t y, SWR_TRIANGLE_DESC &work, RenderOutputBuffers &renderBuffers) { - RDTSC_START(BESingleSampleBackend); - RDTSC_START(BESetup); - SWR_CONTEXT *pContext = pDC->pContext; - const API_STATE& state = GetApiState(pDC); - const SWR_RASTSTATE& rastState = state.rastState; - const SWR_PS_STATE *pPSState = &state.psState; - const SWR_BLEND_STATE *pBlendState = &state.blendState; - uint64_t coverageMask = work.coverageMask[0]; - // broadcast scalars - BarycentricCoeffs coeffs; - coeffs.vIa = _simd_broadcast_ss(&work.I[0]); - coeffs.vIb = _simd_broadcast_ss(&work.I[1]); - coeffs.vIc = _simd_broadcast_ss(&work.I[2]); + AR_BEGIN(BESingleSampleBackend, pDC->drawId); + AR_BEGIN(BESetup, pDC->drawId); - coeffs.vJa = _simd_broadcast_ss(&work.J[0]); - coeffs.vJb = _simd_broadcast_ss(&work.J[1]); - coeffs.vJc = _simd_broadcast_ss(&work.J[2]); + const API_STATE &state = GetApiState(pDC); - coeffs.vZa = _simd_broadcast_ss(&work.Z[0]); - coeffs.vZb = _simd_broadcast_ss(&work.Z[1]); - coeffs.vZc = _simd_broadcast_ss(&work.Z[2]); + BarycentricCoeffs coeffs; + SetupBarycentricCoeffs(&coeffs, work); - coeffs.vRecipDet = _simd_broadcast_ss(&work.recipDet); + uint8_t *pColorBuffer[SWR_NUM_RENDERTARGETS], *pDepthBuffer, *pStencilBuffer; + SetupRenderBuffers(pColorBuffer, &pDepthBuffer, &pStencilBuffer, state.psState.numRenderTargets, renderBuffers); - coeffs.vAOneOverW = _simd_broadcast_ss(&work.OneOverW[0]); - coeffs.vBOneOverW = _simd_broadcast_ss(&work.OneOverW[1]); - coeffs.vCOneOverW = _simd_broadcast_ss(&work.OneOverW[2]); + SWR_PS_CONTEXT psContext; + SetupPixelShaderContext(&psContext, work); - uint8_t *pColorBase[SWR_NUM_RENDERTARGETS]; - uint32_t NumRT = state.psState.numRenderTargets; - for(uint32_t rt = 0; rt < NumRT; ++rt) - { - pColorBase[rt] = renderBuffers.pColor[rt]; - } - uint8_t *pDepthBase = renderBuffers.pDepth, *pStencilBase = renderBuffers.pStencil; - RDTSC_STOP(BESetup, 0, 0); + AR_END(BESetup, 1); - SWR_PS_CONTEXT psContext; - psContext.pAttribs = work.pAttribs; - psContext.pPerspAttribs = work.pPerspAttribs; - psContext.frontFace = work.triFlags.frontFacing; - psContext.primID = work.triFlags.primID; - - // save Ia/Ib/Ic and Ja/Jb/Jc if we need to reevaluate i/j/k in the shader because of pull attribs - psContext.I = work.I; - psContext.J = work.J; - psContext.recipDet = work.recipDet; - psContext.pRecipW = work.pRecipW; - psContext.pSamplePosX = (const float*)&T::MultisampleT::samplePosX; - psContext.pSamplePosY = (const float*)&T::MultisampleT::samplePosY; + psContext.vY.UL = _simd_add_ps(vULOffsetsY, _simd_set1_ps(static_cast(y))); + psContext.vY.center = _simd_add_ps(vCenterOffsetsY, _simd_set1_ps(static_cast(y))); - for(uint32_t yy = y; yy < y + KNOB_TILE_Y_DIM; yy += SIMD_TILE_Y_DIM) + const simdscalar dy = _simd_set1_ps(static_cast(SIMD_TILE_Y_DIM)); + + for (uint32_t yy = y; yy < y + KNOB_TILE_Y_DIM; yy += SIMD_TILE_Y_DIM) { - // UL pixel corner - psContext.vY.UL = _simd_add_ps(vULOffsetsY, _simd_set1_ps((float)yy)); - // pixel center - psContext.vY.center = _simd_add_ps(vCenterOffsetsY, _simd_set1_ps((float)yy)); + psContext.vX.UL = _simd_add_ps(vULOffsetsX, _simd_set1_ps(static_cast(x))); + psContext.vX.center = _simd_add_ps(vCenterOffsetsX, _simd_set1_ps(static_cast(x))); - for(uint32_t xx = x; xx < x + KNOB_TILE_X_DIM; xx += SIMD_TILE_X_DIM) + const simdscalar dx = _simd_set1_ps(static_cast(SIMD_TILE_X_DIM)); + + for (uint32_t xx = x; xx < x + KNOB_TILE_X_DIM; xx += SIMD_TILE_X_DIM) { - if(coverageMask & MASK) +#if USE_8x2_TILE_BACKEND + const bool useAlternateOffset = ((xx & SIMD_TILE_X_DIM) != 0); + +#endif + simdmask coverageMask = work.coverageMask[0] & MASK; + + if (coverageMask) { - psContext.vX.UL = _simd_add_ps(vULOffsetsX, _simd_set1_ps((float)xx)); - // pixel center - psContext.vX.center = _simd_add_ps(vCenterOffsetsX, _simd_set1_ps((float)xx)); + if (state.depthHottileEnable && state.depthBoundsState.depthBoundsTestEnable) + { + static_assert(KNOB_DEPTH_HOT_TILE_FORMAT == R32_FLOAT, "Unsupported depth hot tile format"); + + const simdscalar z = _simd_load_ps(reinterpret_cast(pDepthBuffer)); + + const float minz = state.depthBoundsState.depthBoundsTestMinValue; + const float maxz = state.depthBoundsState.depthBoundsTestMaxValue; + + coverageMask &= CalcDepthBoundsAcceptMask(z, minz, maxz); + } - if(T::bInputCoverage) + if (T::InputCoverage != SWR_INPUT_COVERAGE_NONE) { - generateInputCoverage(&work.coverageMask[0], psContext.inputMask, pBlendState->sampleMask); + const uint64_t* pCoverageMask = (T::InputCoverage == SWR_INPUT_COVERAGE_INNER_CONSERVATIVE) ? &work.innerCoverageMask : &work.coverageMask[0]; + + generateInputCoverage(pCoverageMask, psContext.inputMask, state.blendState.sampleMask); } - RDTSC_START(BEBarycentric); + AR_BEGIN(BEBarycentric, pDC->drawId); + CalcPixelBarycentrics(coeffs, psContext); - if(T::bCentroidPos) - { - // for 1x case, centroid is pixel center - psContext.vX.centroid = psContext.vX.center; - psContext.vY.centroid = psContext.vY.center; - psContext.vI.centroid = psContext.vI.center; - psContext.vJ.centroid = psContext.vJ.center; - psContext.vOneOverW.centroid = psContext.vOneOverW.center; - } + CalcCentroid(&psContext, coeffs, work.coverageMask, state.blendState.sampleMask); // interpolate and quantize z psContext.vZ = vplaneps(coeffs.vZa, coeffs.vZb, coeffs.vZc, psContext.vI.center, psContext.vJ.center); psContext.vZ = state.pfnQuantizeDepth(psContext.vZ); - RDTSC_STOP(BEBarycentric, 0, 0); - simdmask clipCoverageMask = coverageMask & MASK; + AR_END(BEBarycentric, 1); + // interpolate user clip distance if available - if(rastState.clipDistanceMask) + if (state.rastState.clipDistanceMask) { - clipCoverageMask &= ~ComputeUserClipMask(rastState.clipDistanceMask, work.pUserClipBuffer, - psContext.vI.center, psContext.vJ.center); + coverageMask &= ~ComputeUserClipMask(state.rastState.clipDistanceMask, work.pUserClipBuffer, psContext.vI.center, psContext.vJ.center); } - simdscalar vCoverageMask = vMask(clipCoverageMask); + simdscalar vCoverageMask = vMask(coverageMask); simdscalar depthPassMask = vCoverageMask; simdscalar stencilPassMask = vCoverageMask; // Early-Z? - if(T::bCanEarlyZ) + if (T::bCanEarlyZ) { - RDTSC_START(BEEarlyDepthTest); - depthPassMask = DepthStencilTest(&state, work.triFlags.frontFacing, - psContext.vZ, pDepthBase, vCoverageMask, pStencilBase, &stencilPassMask); - RDTSC_STOP(BEEarlyDepthTest, 0, 0); + AR_BEGIN(BEEarlyDepthTest, pDC->drawId); + depthPassMask = DepthStencilTest(&state, work.triFlags.frontFacing, work.triFlags.viewportIndex, + psContext.vZ, pDepthBuffer, vCoverageMask, pStencilBuffer, &stencilPassMask); + AR_EVENT(EarlyDepthStencilInfoSingleSample(_simd_movemask_ps(depthPassMask), _simd_movemask_ps(vCoverageMask), _simd_movemask_ps(stencilPassMask))); + AR_END(BEEarlyDepthTest, 0); // early-exit if no pixels passed depth or earlyZ is forced on - if(pPSState->forceEarlyZ || !_simd_movemask_ps(depthPassMask)) + if (state.psState.forceEarlyZ || !_simd_movemask_ps(depthPassMask)) { - DepthStencilWrite(&state.vp[0], &state.depthStencilState, work.triFlags.frontFacing, psContext.vZ, - pDepthBase, depthPassMask, vCoverageMask, pStencilBase, stencilPassMask); + DepthStencilWrite(&state.vp[work.triFlags.viewportIndex], &state.depthStencilState, work.triFlags.frontFacing, psContext.vZ, + pDepthBuffer, depthPassMask, vCoverageMask, pStencilBuffer, stencilPassMask); if (!_simd_movemask_ps(depthPassMask)) { @@ -565,163 +561,169 @@ psContext.activeMask = _simd_castps_si(vCoverageMask); // execute pixel shader - RDTSC_START(BEPixelShader); - UPDATE_STAT(PsInvocations, _mm_popcnt_u32(_simd_movemask_ps(vCoverageMask))); + AR_BEGIN(BEPixelShader, pDC->drawId); + UPDATE_STAT_BE(PsInvocations, _mm_popcnt_u32(_simd_movemask_ps(vCoverageMask))); state.psState.pfnPixelShader(GetPrivateState(pDC), &psContext); - RDTSC_STOP(BEPixelShader, 0, 0); + AR_END(BEPixelShader, 0); vCoverageMask = _simd_castsi_ps(psContext.activeMask); // late-Z - if(!T::bCanEarlyZ) + if (!T::bCanEarlyZ) { - RDTSC_START(BELateDepthTest); - depthPassMask = DepthStencilTest(&state, work.triFlags.frontFacing, - psContext.vZ, pDepthBase, vCoverageMask, pStencilBase, &stencilPassMask); - RDTSC_STOP(BELateDepthTest, 0, 0); + AR_BEGIN(BELateDepthTest, pDC->drawId); + depthPassMask = DepthStencilTest(&state, work.triFlags.frontFacing, work.triFlags.viewportIndex, + psContext.vZ, pDepthBuffer, vCoverageMask, pStencilBuffer, &stencilPassMask); + AR_EVENT(LateDepthStencilInfoSingleSample(_simd_movemask_ps(depthPassMask), _simd_movemask_ps(vCoverageMask), _simd_movemask_ps(stencilPassMask))); + AR_END(BELateDepthTest, 0); - if(!_simd_movemask_ps(depthPassMask)) + if (!_simd_movemask_ps(depthPassMask)) { // need to call depth/stencil write for stencil write - DepthStencilWrite(&state.vp[0], &state.depthStencilState, work.triFlags.frontFacing, psContext.vZ, - pDepthBase, depthPassMask, vCoverageMask, pStencilBase, stencilPassMask); + DepthStencilWrite(&state.vp[work.triFlags.viewportIndex], &state.depthStencilState, work.triFlags.frontFacing, psContext.vZ, + pDepthBuffer, depthPassMask, vCoverageMask, pStencilBuffer, stencilPassMask); goto Endtile; } } uint32_t statMask = _simd_movemask_ps(depthPassMask); uint32_t statCount = _mm_popcnt_u32(statMask); - UPDATE_STAT(DepthPassCount, statCount); + UPDATE_STAT_BE(DepthPassCount, statCount); // output merger - RDTSC_START(BEOutputMerger); - OutputMerger(psContext, pColorBase, 0, pBlendState, state.pfnBlendFunc, vCoverageMask, depthPassMask, pPSState->numRenderTargets); + AR_BEGIN(BEOutputMerger, pDC->drawId); +#if USE_8x2_TILE_BACKEND + OutputMerger8x2(psContext, pColorBuffer, 0, &state.blendState, state.pfnBlendFunc, vCoverageMask, depthPassMask, state.psState.numRenderTargets, state.colorHottileEnable, useAlternateOffset); +#else + OutputMerger4x2(psContext, pColorBuffer, 0, &state.blendState, state.pfnBlendFunc, vCoverageMask, depthPassMask, state.psState.numRenderTargets); +#endif // do final depth write after all pixel kills - if (!pPSState->forceEarlyZ) + if (!state.psState.forceEarlyZ) { - DepthStencilWrite(&state.vp[0], &state.depthStencilState, work.triFlags.frontFacing, psContext.vZ, - pDepthBase, depthPassMask, vCoverageMask, pStencilBase, stencilPassMask); + DepthStencilWrite(&state.vp[work.triFlags.viewportIndex], &state.depthStencilState, work.triFlags.frontFacing, psContext.vZ, + pDepthBuffer, depthPassMask, vCoverageMask, pStencilBuffer, stencilPassMask); } - RDTSC_STOP(BEOutputMerger, 0, 0); + AR_END(BEOutputMerger, 0); } Endtile: - RDTSC_START(BEEndTile); - coverageMask >>= (SIMD_TILE_Y_DIM * SIMD_TILE_X_DIM); - pDepthBase += (KNOB_SIMD_WIDTH * FormatTraits::bpp) / 8; - pStencilBase += (KNOB_SIMD_WIDTH * FormatTraits::bpp) / 8; + AR_BEGIN(BEEndTile, pDC->drawId); + + work.coverageMask[0] >>= (SIMD_TILE_Y_DIM * SIMD_TILE_X_DIM); + if(T::InputCoverage == SWR_INPUT_COVERAGE_INNER_CONSERVATIVE) + { + work.innerCoverageMask >>= (SIMD_TILE_Y_DIM * SIMD_TILE_X_DIM); + } - for(uint32_t rt = 0; rt < NumRT; ++rt) +#if USE_8x2_TILE_BACKEND + if (useAlternateOffset) + { + for (uint32_t rt = 0; rt < state.psState.numRenderTargets; ++rt) + { + pColorBuffer[rt] += (2 * KNOB_SIMD_WIDTH * FormatTraits::bpp) / 8; + } + } +#else + for (uint32_t rt = 0; rt < state.psState.numRenderTargets; ++rt) { - pColorBase[rt] += (KNOB_SIMD_WIDTH * FormatTraits::bpp) / 8; + pColorBuffer[rt] += (KNOB_SIMD_WIDTH * FormatTraits::bpp) / 8; } - RDTSC_STOP(BEEndTile, 0, 0); +#endif + pDepthBuffer += (KNOB_SIMD_WIDTH * FormatTraits::bpp) / 8; + pStencilBuffer += (KNOB_SIMD_WIDTH * FormatTraits::bpp) / 8; + + AR_END(BEEndTile, 0); + + psContext.vX.UL = _simd_add_ps(psContext.vX.UL, dx); + psContext.vX.center = _simd_add_ps(psContext.vX.center, dx); } + + psContext.vY.UL = _simd_add_ps(psContext.vY.UL, dy); + psContext.vY.center = _simd_add_ps(psContext.vY.center, dy); } - RDTSC_STOP(BESingleSampleBackend, 0, 0); + + AR_END(BESingleSampleBackend, 0); } template void BackendSampleRate(DRAW_CONTEXT *pDC, uint32_t workerId, uint32_t x, uint32_t y, SWR_TRIANGLE_DESC &work, RenderOutputBuffers &renderBuffers) { - RDTSC_START(BESampleRateBackend); - RDTSC_START(BESetup); - SWR_CONTEXT *pContext = pDC->pContext; - const API_STATE& state = GetApiState(pDC); - const SWR_RASTSTATE& rastState = state.rastState; - const SWR_PS_STATE *pPSState = &state.psState; - const SWR_BLEND_STATE *pBlendState = &state.blendState; - // broadcast scalars - BarycentricCoeffs coeffs; - coeffs.vIa = _simd_broadcast_ss(&work.I[0]); - coeffs.vIb = _simd_broadcast_ss(&work.I[1]); - coeffs.vIc = _simd_broadcast_ss(&work.I[2]); + AR_BEGIN(BESampleRateBackend, pDC->drawId); + AR_BEGIN(BESetup, pDC->drawId); - coeffs.vJa = _simd_broadcast_ss(&work.J[0]); - coeffs.vJb = _simd_broadcast_ss(&work.J[1]); - coeffs.vJc = _simd_broadcast_ss(&work.J[2]); + const API_STATE &state = GetApiState(pDC); - coeffs.vZa = _simd_broadcast_ss(&work.Z[0]); - coeffs.vZb = _simd_broadcast_ss(&work.Z[1]); - coeffs.vZc = _simd_broadcast_ss(&work.Z[2]); + BarycentricCoeffs coeffs; + SetupBarycentricCoeffs(&coeffs, work); - coeffs.vRecipDet = _simd_broadcast_ss(&work.recipDet); + uint8_t *pColorBuffer[SWR_NUM_RENDERTARGETS], *pDepthBuffer, *pStencilBuffer; + SetupRenderBuffers(pColorBuffer, &pDepthBuffer, &pStencilBuffer, state.psState.numRenderTargets, renderBuffers); - coeffs.vAOneOverW = _simd_broadcast_ss(&work.OneOverW[0]); - coeffs.vBOneOverW = _simd_broadcast_ss(&work.OneOverW[1]); - coeffs.vCOneOverW = _simd_broadcast_ss(&work.OneOverW[2]); + SWR_PS_CONTEXT psContext; + SetupPixelShaderContext(&psContext, work); - uint8_t *pColorBase[SWR_NUM_RENDERTARGETS]; - uint32_t NumRT = state.psState.numRenderTargets; - for(uint32_t rt = 0; rt < NumRT; ++rt) - { - pColorBase[rt] = renderBuffers.pColor[rt]; - } - uint8_t *pDepthBase = renderBuffers.pDepth, *pStencilBase = renderBuffers.pStencil; - RDTSC_STOP(BESetup, 0, 0); + AR_END(BESetup, 0); - SWR_PS_CONTEXT psContext; - psContext.pAttribs = work.pAttribs; - psContext.pPerspAttribs = work.pPerspAttribs; - psContext.pRecipW = work.pRecipW; - psContext.frontFace = work.triFlags.frontFacing; - psContext.primID = work.triFlags.primID; - - // save Ia/Ib/Ic and Ja/Jb/Jc if we need to reevaluate i/j/k in the shader because of pull attribs - psContext.I = work.I; - psContext.J = work.J; - psContext.recipDet = work.recipDet; - psContext.pSamplePosX = (const float*)&T::MultisampleT::samplePosX; - psContext.pSamplePosY = (const float*)&T::MultisampleT::samplePosY; + psContext.vY.UL = _simd_add_ps(vULOffsetsY, _simd_set1_ps(static_cast(y))); + psContext.vY.center = _simd_add_ps(vCenterOffsetsY, _simd_set1_ps(static_cast(y))); + + const simdscalar dy = _simd_set1_ps(static_cast(SIMD_TILE_Y_DIM)); for (uint32_t yy = y; yy < y + KNOB_TILE_Y_DIM; yy += SIMD_TILE_Y_DIM) { - // UL pixel corner - psContext.vY.UL = _simd_add_ps(vULOffsetsY, _simd_set1_ps((float)yy)); - // pixel center - psContext.vY.center = _simd_add_ps(vCenterOffsetsY, _simd_set1_ps((float)yy)); - + psContext.vX.UL = _simd_add_ps(vULOffsetsX, _simd_set1_ps(static_cast(x))); + psContext.vX.center = _simd_add_ps(vCenterOffsetsX, _simd_set1_ps(static_cast(x))); + + const simdscalar dx = _simd_set1_ps(static_cast(SIMD_TILE_X_DIM)); + for (uint32_t xx = x; xx < x + KNOB_TILE_X_DIM; xx += SIMD_TILE_X_DIM) { - psContext.vX.UL = _simd_add_ps(vULOffsetsX, _simd_set1_ps((float)xx)); - // pixel center - psContext.vX.center = _simd_add_ps(vCenterOffsetsX, _simd_set1_ps((float)xx)); - - RDTSC_START(BEBarycentric); - CalcPixelBarycentrics(coeffs, psContext); - RDTSC_STOP(BEBarycentric, 0, 0); +#if USE_8x2_TILE_BACKEND + const bool useAlternateOffset = ((xx & SIMD_TILE_X_DIM) != 0); - if(T::bInputCoverage) +#endif + if (T::InputCoverage != SWR_INPUT_COVERAGE_NONE) { - generateInputCoverage(&work.coverageMask[0], psContext.inputMask, pBlendState->sampleMask); - } + const uint64_t* pCoverageMask = (T::InputCoverage == SWR_INPUT_COVERAGE_INNER_CONSERVATIVE) ? &work.innerCoverageMask : &work.coverageMask[0]; - if(T::bCentroidPos) - { - ///@ todo: don't need to genererate input coverage 2x if input coverage and centroid - RDTSC_START(BEBarycentric); - if(T::bIsStandardPattern) - { - CalcCentroidPos(psContext, &work.coverageMask[0], pBlendState->sampleMask, psContext.vX.UL, psContext.vY.UL); - } - else - { - psContext.vX.centroid = _simd_add_ps(psContext.vX.UL, _simd_set1_ps(0.5f)); - psContext.vY.centroid = _simd_add_ps(psContext.vY.UL, _simd_set1_ps(0.5f)); - } - CalcCentroidBarycentrics(coeffs, psContext, psContext.vX.UL, psContext.vY.UL); - RDTSC_STOP(BEBarycentric, 0, 0); + generateInputCoverage(pCoverageMask, psContext.inputMask, state.blendState.sampleMask); } - for(uint32_t sample = 0; sample < T::MultisampleT::numSamples; sample++) + AR_BEGIN(BEBarycentric, pDC->drawId); + + CalcPixelBarycentrics(coeffs, psContext); + + CalcCentroid(&psContext, coeffs, work.coverageMask, state.blendState.sampleMask); + + AR_END(BEBarycentric, 0); + + for (uint32_t sample = 0; sample < T::MultisampleT::numSamples; sample++) { simdmask coverageMask = work.coverageMask[sample] & MASK; + if (coverageMask) { - RDTSC_START(BEBarycentric); + // offset depth/stencil buffers current sample + uint8_t *pDepthSample = pDepthBuffer + RasterTileDepthOffset(sample); + uint8_t *pStencilSample = pStencilBuffer + RasterTileStencilOffset(sample); + + if (state.depthHottileEnable && state.depthBoundsState.depthBoundsTestEnable) + { + static_assert(KNOB_DEPTH_HOT_TILE_FORMAT == R32_FLOAT, "Unsupported depth hot tile format"); + + const simdscalar z = _simd_load_ps(reinterpret_cast(pDepthSample)); + + const float minz = state.depthBoundsState.depthBoundsTestMinValue; + const float maxz = state.depthBoundsState.depthBoundsTestMaxValue; + + coverageMask &= CalcDepthBoundsAcceptMask(z, minz, maxz); + } + + AR_BEGIN(BEBarycentric, pDC->drawId); + // calculate per sample positions psContext.vX.sample = _simd_add_ps(psContext.vX.UL, T::MultisampleT::vX(sample)); psContext.vY.sample = _simd_add_ps(psContext.vY.UL, T::MultisampleT::vY(sample)); @@ -731,35 +733,32 @@ // interpolate and quantize z psContext.vZ = vplaneps(coeffs.vZa, coeffs.vZb, coeffs.vZc, psContext.vI.sample, psContext.vJ.sample); psContext.vZ = state.pfnQuantizeDepth(psContext.vZ); - RDTSC_STOP(BEBarycentric, 0, 0); + + AR_END(BEBarycentric, 0); // interpolate user clip distance if available - if (rastState.clipDistanceMask) + if (state.rastState.clipDistanceMask) { - coverageMask &= ~ComputeUserClipMask(rastState.clipDistanceMask, work.pUserClipBuffer, - psContext.vI.sample, psContext.vJ.sample); + coverageMask &= ~ComputeUserClipMask(state.rastState.clipDistanceMask, work.pUserClipBuffer, psContext.vI.sample, psContext.vJ.sample); } simdscalar vCoverageMask = vMask(coverageMask); simdscalar depthPassMask = vCoverageMask; simdscalar stencilPassMask = vCoverageMask; - // offset depth/stencil buffers current sample - uint8_t *pDepthSample = pDepthBase + RasterTileDepthOffset(sample); - uint8_t *pStencilSample = pStencilBase + RasterTileStencilOffset(sample); - // Early-Z? if (T::bCanEarlyZ) { - RDTSC_START(BEEarlyDepthTest); - depthPassMask = DepthStencilTest(&state, work.triFlags.frontFacing, + AR_BEGIN(BEEarlyDepthTest, pDC->drawId); + depthPassMask = DepthStencilTest(&state, work.triFlags.frontFacing, work.triFlags.viewportIndex, psContext.vZ, pDepthSample, vCoverageMask, pStencilSample, &stencilPassMask); - RDTSC_STOP(BEEarlyDepthTest, 0, 0); + AR_EVENT(EarlyDepthStencilInfoSampleRate(_simd_movemask_ps(depthPassMask), _simd_movemask_ps(vCoverageMask), _simd_movemask_ps(stencilPassMask))); + AR_END(BEEarlyDepthTest, 0); // early-exit if no samples passed depth or earlyZ is forced on. - if (pPSState->forceEarlyZ || !_simd_movemask_ps(depthPassMask)) + if (state.psState.forceEarlyZ || !_simd_movemask_ps(depthPassMask)) { - DepthStencilWrite(&state.vp[0], &state.depthStencilState, work.triFlags.frontFacing, psContext.vZ, + DepthStencilWrite(&state.vp[work.triFlags.viewportIndex], &state.depthStencilState, work.triFlags.frontFacing, psContext.vZ, pDepthSample, depthPassMask, vCoverageMask, pStencilSample, stencilPassMask); if (!_simd_movemask_ps(depthPassMask)) @@ -774,25 +773,26 @@ psContext.activeMask = _simd_castps_si(vCoverageMask); // execute pixel shader - RDTSC_START(BEPixelShader); - UPDATE_STAT(PsInvocations, _mm_popcnt_u32(_simd_movemask_ps(vCoverageMask))); + AR_BEGIN(BEPixelShader, pDC->drawId); + UPDATE_STAT_BE(PsInvocations, _mm_popcnt_u32(_simd_movemask_ps(vCoverageMask))); state.psState.pfnPixelShader(GetPrivateState(pDC), &psContext); - RDTSC_STOP(BEPixelShader, 0, 0); + AR_END(BEPixelShader, 0); vCoverageMask = _simd_castsi_ps(psContext.activeMask); // late-Z if (!T::bCanEarlyZ) { - RDTSC_START(BELateDepthTest); - depthPassMask = DepthStencilTest(&state, work.triFlags.frontFacing, + AR_BEGIN(BELateDepthTest, pDC->drawId); + depthPassMask = DepthStencilTest(&state, work.triFlags.frontFacing, work.triFlags.viewportIndex, psContext.vZ, pDepthSample, vCoverageMask, pStencilSample, &stencilPassMask); - RDTSC_STOP(BELateDepthTest, 0, 0); + AR_EVENT(LateDepthStencilInfoSampleRate(_simd_movemask_ps(depthPassMask), _simd_movemask_ps(vCoverageMask), _simd_movemask_ps(stencilPassMask))); + AR_END(BELateDepthTest, 0); if (!_simd_movemask_ps(depthPassMask)) { // need to call depth/stencil write for stencil write - DepthStencilWrite(&state.vp[0], &state.depthStencilState, work.triFlags.frontFacing, psContext.vZ, + DepthStencilWrite(&state.vp[work.triFlags.viewportIndex], &state.depthStencilState, work.triFlags.frontFacing, psContext.vZ, pDepthSample, depthPassMask, vCoverageMask, pStencilSample, stencilPassMask); work.coverageMask[sample] >>= (SIMD_TILE_Y_DIM * SIMD_TILE_X_DIM); @@ -802,137 +802,131 @@ uint32_t statMask = _simd_movemask_ps(depthPassMask); uint32_t statCount = _mm_popcnt_u32(statMask); - UPDATE_STAT(DepthPassCount, statCount); + UPDATE_STAT_BE(DepthPassCount, statCount); // output merger - RDTSC_START(BEOutputMerger); - OutputMerger(psContext, pColorBase, sample, pBlendState, state.pfnBlendFunc, vCoverageMask, depthPassMask, pPSState->numRenderTargets); + AR_BEGIN(BEOutputMerger, pDC->drawId); +#if USE_8x2_TILE_BACKEND + OutputMerger8x2(psContext, pColorBuffer, sample, &state.blendState, state.pfnBlendFunc, vCoverageMask, depthPassMask, state.psState.numRenderTargets, state.colorHottileEnable, useAlternateOffset); +#else + OutputMerger4x2(psContext, pColorBuffer, sample, &state.blendState, state.pfnBlendFunc, vCoverageMask, depthPassMask, state.psState.numRenderTargets); +#endif // do final depth write after all pixel kills - if (!pPSState->forceEarlyZ) + if (!state.psState.forceEarlyZ) { - DepthStencilWrite(&state.vp[0], &state.depthStencilState, work.triFlags.frontFacing, psContext.vZ, + DepthStencilWrite(&state.vp[work.triFlags.viewportIndex], &state.depthStencilState, work.triFlags.frontFacing, psContext.vZ, pDepthSample, depthPassMask, vCoverageMask, pStencilSample, stencilPassMask); } - RDTSC_STOP(BEOutputMerger, 0, 0); + AR_END(BEOutputMerger, 0); } work.coverageMask[sample] >>= (SIMD_TILE_Y_DIM * SIMD_TILE_X_DIM); } - RDTSC_START(BEEndTile); - pDepthBase += (KNOB_SIMD_WIDTH * FormatTraits::bpp) / 8; - pStencilBase += (KNOB_SIMD_WIDTH * FormatTraits::bpp) / 8; - for (uint32_t rt = 0; rt < NumRT; ++rt) +Endtile: + ATTR_UNUSED; + + AR_BEGIN(BEEndTile, pDC->drawId); + + if(T::InputCoverage == SWR_INPUT_COVERAGE_INNER_CONSERVATIVE) + { + work.innerCoverageMask >>= (SIMD_TILE_Y_DIM * SIMD_TILE_X_DIM); + } + +#if USE_8x2_TILE_BACKEND + if (useAlternateOffset) + { + for (uint32_t rt = 0; rt < state.psState.numRenderTargets; ++rt) + { + pColorBuffer[rt] += (2 * KNOB_SIMD_WIDTH * FormatTraits::bpp) / 8; + } + } +#else + for (uint32_t rt = 0; rt < state.psState.numRenderTargets; ++rt) { - pColorBase[rt] += (KNOB_SIMD_WIDTH * FormatTraits::bpp) / 8; + pColorBuffer[rt] += (KNOB_SIMD_WIDTH * FormatTraits::bpp) / 8; } - RDTSC_STOP(BEEndTile, 0, 0); +#endif + pDepthBuffer += (KNOB_SIMD_WIDTH * FormatTraits::bpp) / 8; + pStencilBuffer += (KNOB_SIMD_WIDTH * FormatTraits::bpp) / 8; + + AR_END(BEEndTile, 0); + + psContext.vX.UL = _simd_add_ps(psContext.vX.UL, dx); + psContext.vX.center = _simd_add_ps(psContext.vX.center, dx); } + + psContext.vY.UL = _simd_add_ps(psContext.vY.UL, dy); + psContext.vY.center = _simd_add_ps(psContext.vY.center, dy); } - RDTSC_STOP(BESampleRateBackend, 0, 0); + + AR_END(BESampleRateBackend, 0); } template void BackendPixelRate(DRAW_CONTEXT *pDC, uint32_t workerId, uint32_t x, uint32_t y, SWR_TRIANGLE_DESC &work, RenderOutputBuffers &renderBuffers) { - RDTSC_START(BEPixelRateBackend); - RDTSC_START(BESetup); - SWR_CONTEXT *pContext = pDC->pContext; - const API_STATE& state = GetApiState(pDC); - const SWR_RASTSTATE& rastState = state.rastState; - const SWR_PS_STATE *pPSState = &state.psState; - const SWR_BLEND_STATE *pBlendState = &state.blendState; - // broadcast scalars + AR_BEGIN(BEPixelRateBackend, pDC->drawId); + AR_BEGIN(BESetup, pDC->drawId); + + const API_STATE &state = GetApiState(pDC); + BarycentricCoeffs coeffs; - coeffs.vIa = _simd_broadcast_ss(&work.I[0]); - coeffs.vIb = _simd_broadcast_ss(&work.I[1]); - coeffs.vIc = _simd_broadcast_ss(&work.I[2]); + SetupBarycentricCoeffs(&coeffs, work); - coeffs.vJa = _simd_broadcast_ss(&work.J[0]); - coeffs.vJb = _simd_broadcast_ss(&work.J[1]); - coeffs.vJc = _simd_broadcast_ss(&work.J[2]); + uint8_t *pColorBuffer[SWR_NUM_RENDERTARGETS], *pDepthBuffer, *pStencilBuffer; + SetupRenderBuffers(pColorBuffer, &pDepthBuffer, &pStencilBuffer, state.psState.numRenderTargets, renderBuffers); - coeffs.vZa = _simd_broadcast_ss(&work.Z[0]); - coeffs.vZb = _simd_broadcast_ss(&work.Z[1]); - coeffs.vZc = _simd_broadcast_ss(&work.Z[2]); + SWR_PS_CONTEXT psContext; + SetupPixelShaderContext(&psContext, work); - coeffs.vRecipDet = _simd_broadcast_ss(&work.recipDet); + AR_END(BESetup, 0); - coeffs.vAOneOverW = _simd_broadcast_ss(&work.OneOverW[0]); - coeffs.vBOneOverW = _simd_broadcast_ss(&work.OneOverW[1]); - coeffs.vCOneOverW = _simd_broadcast_ss(&work.OneOverW[2]); + PixelRateZTestLoop PixelRateZTest(pDC, workerId, work, coeffs, state, pDepthBuffer, pStencilBuffer, state.rastState.clipDistanceMask); - uint8_t *pColorBase[SWR_NUM_RENDERTARGETS]; - uint32_t NumRT = state.psState.numRenderTargets; - for(uint32_t rt = 0; rt < NumRT; ++rt) - { - pColorBase[rt] = renderBuffers.pColor[rt]; - } - uint8_t *pDepthBase = renderBuffers.pDepth, *pStencilBase = renderBuffers.pStencil; - RDTSC_STOP(BESetup, 0, 0); + psContext.vY.UL = _simd_add_ps(vULOffsetsY, _simd_set1_ps(static_cast(y))); + psContext.vY.center = _simd_add_ps(vCenterOffsetsY, _simd_set1_ps(static_cast(y))); - SWR_PS_CONTEXT psContext; - psContext.pAttribs = work.pAttribs; - psContext.pPerspAttribs = work.pPerspAttribs; - psContext.frontFace = work.triFlags.frontFacing; - psContext.primID = work.triFlags.primID; - psContext.pRecipW = work.pRecipW; - // save Ia/Ib/Ic and Ja/Jb/Jc if we need to reevaluate i/j/k in the shader because of pull attribs - psContext.I = work.I; - psContext.J = work.J; - psContext.recipDet = work.recipDet; - psContext.pSamplePosX = (const float*)&T::MultisampleT::samplePosX; - psContext.pSamplePosY = (const float*)&T::MultisampleT::samplePosY; - psContext.sampleIndex = 0; - - PixelRateZTestLoop PixelRateZTest(pDC, work, coeffs, state, pDepthBase, pStencilBase, rastState.clipDistanceMask); + const simdscalar dy = _simd_set1_ps(static_cast(SIMD_TILE_Y_DIM)); for(uint32_t yy = y; yy < y + KNOB_TILE_Y_DIM; yy += SIMD_TILE_Y_DIM) { - psContext.vY.UL = _simd_add_ps(vULOffsetsY, _simd_set1_ps((float)yy)); - psContext.vY.center = _simd_add_ps(vCenterOffsetsY, _simd_set1_ps((float)yy)); + psContext.vX.UL = _simd_add_ps(vULOffsetsX, _simd_set1_ps(static_cast(x))); + psContext.vX.center = _simd_add_ps(vCenterOffsetsX, _simd_set1_ps(static_cast(x))); + + const simdscalar dx = _simd_set1_ps(static_cast(SIMD_TILE_X_DIM)); + for(uint32_t xx = x; xx < x + KNOB_TILE_X_DIM; xx += SIMD_TILE_X_DIM) { +#if USE_8x2_TILE_BACKEND + const bool useAlternateOffset = ((xx & SIMD_TILE_X_DIM) != 0); + +#endif simdscalar activeLanes; if(!(work.anyCoveredSamples & MASK)) {goto Endtile;}; activeLanes = vMask(work.anyCoveredSamples & MASK); - psContext.vX.UL = _simd_add_ps(vULOffsetsX, _simd_set1_ps((float)xx)); - // set pixel center positions - psContext.vX.center = _simd_add_ps(vCenterOffsetsX, _simd_set1_ps((float)xx)); + if (T::InputCoverage != SWR_INPUT_COVERAGE_NONE) + { + const uint64_t* pCoverageMask = (T::InputCoverage == SWR_INPUT_COVERAGE_INNER_CONSERVATIVE) ? &work.innerCoverageMask : &work.coverageMask[0]; + + generateInputCoverage(pCoverageMask, psContext.inputMask, state.blendState.sampleMask); + } + + AR_BEGIN(BEBarycentric, pDC->drawId); - RDTSC_START(BEBarycentric); CalcPixelBarycentrics(coeffs, psContext); - RDTSC_STOP(BEBarycentric, 0, 0); - if (T::bInputCoverage) - { - generateInputCoverage(&work.coverageMask[0], psContext.inputMask, pBlendState->sampleMask); - } + CalcCentroid(&psContext, coeffs, work.coverageMask, state.blendState.sampleMask); - if(T::bCentroidPos) - { - ///@ todo: don't need to genererate input coverage 2x if input coverage and centroid - RDTSC_START(BEBarycentric); - if(T::bIsStandardPattern) - { - CalcCentroidPos(psContext, &work.coverageMask[0], pBlendState->sampleMask, psContext.vX.UL, psContext.vY.UL); - } - else - { - psContext.vX.centroid = _simd_add_ps(psContext.vX.UL, _simd_set1_ps(0.5f)); - psContext.vY.centroid = _simd_add_ps(psContext.vY.UL, _simd_set1_ps(0.5f)); - } - CalcCentroidBarycentrics(coeffs, psContext, psContext.vX.UL, psContext.vY.UL); - RDTSC_STOP(BEBarycentric, 0, 0); - } + AR_END(BEBarycentric, 0); if(T::bForcedSampleCount) { // candidate pixels (that passed coverage) will cause shader invocation if any bits in the samplemask are set - const simdscalar vSampleMask = _simd_castsi_ps(_simd_cmpgt_epi32(_simd_set1_epi32(pBlendState->sampleMask), _simd_setzero_si())); + const simdscalar vSampleMask = _simd_castsi_ps(_simd_cmpgt_epi32(_simd_set1_epi32(state.blendState.sampleMask), _simd_setzero_si())); activeLanes = _simd_and_ps(activeLanes, vSampleMask); } @@ -940,19 +934,20 @@ if(T::bCanEarlyZ && !T::bForcedSampleCount) { uint32_t depthPassCount = PixelRateZTest(activeLanes, psContext, BEEarlyDepthTest); - UPDATE_STAT(DepthPassCount, depthPassCount); + UPDATE_STAT_BE(DepthPassCount, depthPassCount); + AR_EVENT(EarlyDepthInfoPixelRate(depthPassCount, _simd_movemask_ps(activeLanes))); } // if we have no covered samples that passed depth at this point, go to next tile if(!_simd_movemask_ps(activeLanes)) { goto Endtile; }; - if(pPSState->usesSourceDepth) + if(state.psState.usesSourceDepth) { - RDTSC_START(BEBarycentric); + AR_BEGIN(BEBarycentric, pDC->drawId); // interpolate and quantize z psContext.vZ = vplaneps(coeffs.vZa, coeffs.vZb, coeffs.vZc, psContext.vI.center, psContext.vJ.center); psContext.vZ = state.pfnQuantizeDepth(psContext.vZ); - RDTSC_STOP(BEBarycentric, 0, 0); + AR_END(BEBarycentric, 0); } // pixels that are currently active @@ -960,10 +955,10 @@ psContext.oMask = T::MultisampleT::FullSampleMask(); // execute pixel shader - RDTSC_START(BEPixelShader); + AR_BEGIN(BEPixelShader, pDC->drawId); state.psState.pfnPixelShader(GetPrivateState(pDC), &psContext); - UPDATE_STAT(PsInvocations, _mm_popcnt_u32(_simd_movemask_ps(activeLanes))); - RDTSC_STOP(BEPixelShader, 0, 0); + UPDATE_STAT_BE(PsInvocations, _mm_popcnt_u32(_simd_movemask_ps(activeLanes))); + AR_END(BEPixelShader, 0); // update active lanes to remove any discarded or oMask'd pixels activeLanes = _simd_castsi_ps(_simd_and_si(psContext.activeMask, _simd_cmpgt_epi32(psContext.oMask, _simd_setzero_si()))); @@ -973,7 +968,8 @@ if(!T::bCanEarlyZ && !T::bForcedSampleCount) { uint32_t depthPassCount = PixelRateZTest(activeLanes, psContext, BELateDepthTest); - UPDATE_STAT(DepthPassCount, depthPassCount); + UPDATE_STAT_BE(DepthPassCount, depthPassCount); + AR_EVENT(LateDepthInfoPixelRate(depthPassCount, _simd_movemask_ps(activeLanes))); } // if we have no covered samples that passed depth at this point, skip OM and go to next tile @@ -981,9 +977,9 @@ // output merger // loop over all samples, broadcasting the results of the PS to all passing pixels - for(uint32_t sample = 0; sample < GetNumOMSamples(pBlendState->sampleCount); sample++) + for(uint32_t sample = 0; sample < GetNumOMSamples(state.blendState.sampleCount); sample++) { - RDTSC_START(BEOutputMerger); + AR_BEGIN(BEOutputMerger, pDC->drawId); // center pattern does a single coverage/depth/stencil test, standard pattern tests all samples uint32_t coverageSampleNum = (T::bIsStandardPattern) ? sample : 0; simdscalar coverageMask, depthMask; @@ -998,98 +994,136 @@ if(!_simd_movemask_ps(depthMask)) { // stencil should already have been written in early/lateZ tests - RDTSC_STOP(BEOutputMerger, 0, 0); + AR_END(BEOutputMerger, 0); continue; } } // broadcast the results of the PS to all passing pixels - OutputMerger(psContext, pColorBase, sample, pBlendState, state.pfnBlendFunc, coverageMask, depthMask, pPSState->numRenderTargets); +#if USE_8x2_TILE_BACKEND + OutputMerger8x2(psContext, pColorBuffer, sample, &state.blendState, state.pfnBlendFunc, coverageMask, depthMask, state.psState.numRenderTargets, state.colorHottileEnable, useAlternateOffset); +#else + OutputMerger4x2(psContext, pColorBuffer, sample, &state.blendState, state.pfnBlendFunc, coverageMask, depthMask, state.psState.numRenderTargets); +#endif - if(!pPSState->forceEarlyZ && !T::bForcedSampleCount) + if(!state.psState.forceEarlyZ && !T::bForcedSampleCount) { - uint8_t *pDepthSample = pDepthBase + RasterTileDepthOffset(sample); - uint8_t * pStencilSample = pStencilBase + RasterTileStencilOffset(sample); + uint8_t *pDepthSample = pDepthBuffer + RasterTileDepthOffset(sample); + uint8_t * pStencilSample = pStencilBuffer + RasterTileStencilOffset(sample); - DepthStencilWrite(&state.vp[0], &state.depthStencilState, work.triFlags.frontFacing, PixelRateZTest.vZ[coverageSampleNum], + DepthStencilWrite(&state.vp[work.triFlags.viewportIndex], &state.depthStencilState, work.triFlags.frontFacing, PixelRateZTest.vZ[coverageSampleNum], pDepthSample, depthMask, coverageMask, pStencilSample, PixelRateZTest.stencilPassMask[coverageSampleNum]); } - RDTSC_STOP(BEOutputMerger, 0, 0); + AR_END(BEOutputMerger, 0); } Endtile: - RDTSC_START(BEEndTile); + AR_BEGIN(BEEndTile, pDC->drawId); + for(uint32_t sample = 0; sample < T::MultisampleT::numCoverageSamples; sample++) { work.coverageMask[sample] >>= (SIMD_TILE_Y_DIM * SIMD_TILE_X_DIM); } + if(T::InputCoverage == SWR_INPUT_COVERAGE_INNER_CONSERVATIVE) + { + work.innerCoverageMask >>= (SIMD_TILE_Y_DIM * SIMD_TILE_X_DIM); + } work.anyCoveredSamples >>= (SIMD_TILE_Y_DIM * SIMD_TILE_X_DIM); - pDepthBase += (KNOB_SIMD_WIDTH * FormatTraits::bpp) / 8; - pStencilBase += (KNOB_SIMD_WIDTH * FormatTraits::bpp) / 8; - for(uint32_t rt = 0; rt < NumRT; ++rt) +#if USE_8x2_TILE_BACKEND + if (useAlternateOffset) { - pColorBase[rt] += (KNOB_SIMD_WIDTH * FormatTraits::bpp) / 8; + for (uint32_t rt = 0; rt < state.psState.numRenderTargets; ++rt) + { + pColorBuffer[rt] += (2 * KNOB_SIMD_WIDTH * FormatTraits::bpp) / 8; + } } - RDTSC_STOP(BEEndTile, 0, 0); +#else + for(uint32_t rt = 0; rt < state.psState.numRenderTargets; ++rt) + { + pColorBuffer[rt] += (KNOB_SIMD_WIDTH * FormatTraits::bpp) / 8; + } + pDepthBuffer += (KNOB_SIMD_WIDTH * FormatTraits::bpp) / 8; + pStencilBuffer += (KNOB_SIMD_WIDTH * FormatTraits::bpp) / 8; +#endif + + AR_END(BEEndTile, 0); + + psContext.vX.UL = _simd_add_ps(psContext.vX.UL, dx); + psContext.vX.center = _simd_add_ps(psContext.vX.center, dx); } + + psContext.vY.UL = _simd_add_ps(psContext.vY.UL, dy); + psContext.vY.center = _simd_add_ps(psContext.vY.center, dy); } - RDTSC_STOP(BEPixelRateBackend, 0, 0); + + AR_END(BEPixelRateBackend, 0); } // optimized backend flow with NULL PS template void BackendNullPS(DRAW_CONTEXT *pDC, uint32_t workerId, uint32_t x, uint32_t y, SWR_TRIANGLE_DESC &work, RenderOutputBuffers &renderBuffers) { - RDTSC_START(BENullBackend); + SWR_CONTEXT *pContext = pDC->pContext; + + AR_BEGIN(BENullBackend, pDC->drawId); ///@todo: handle center multisample pattern typedef SwrBackendTraits T; - RDTSC_START(BESetup); + AR_BEGIN(BESetup, pDC->drawId); - SWR_CONTEXT *pContext = pDC->pContext; - const API_STATE& state = GetApiState(pDC); - const SWR_RASTSTATE& rastState = pDC->pState->state.rastState; + const API_STATE &state = GetApiState(pDC); - // broadcast scalars BarycentricCoeffs coeffs; - coeffs.vIa = _simd_broadcast_ss(&work.I[0]); - coeffs.vIb = _simd_broadcast_ss(&work.I[1]); - coeffs.vIc = _simd_broadcast_ss(&work.I[2]); + SetupBarycentricCoeffs(&coeffs, work); - coeffs.vJa = _simd_broadcast_ss(&work.J[0]); - coeffs.vJb = _simd_broadcast_ss(&work.J[1]); - coeffs.vJc = _simd_broadcast_ss(&work.J[2]); + uint8_t *pDepthBuffer, *pStencilBuffer; + SetupRenderBuffers(NULL, &pDepthBuffer, &pStencilBuffer, 0, renderBuffers); - coeffs.vZa = _simd_broadcast_ss(&work.Z[0]); - coeffs.vZb = _simd_broadcast_ss(&work.Z[1]); - coeffs.vZc = _simd_broadcast_ss(&work.Z[2]); + SWR_PS_CONTEXT psContext; + // skip SetupPixelShaderContext(&psContext, ...); // not needed here - coeffs.vRecipDet = _simd_broadcast_ss(&work.recipDet); + AR_END(BESetup, 0); - uint8_t *pDepthBase = renderBuffers.pDepth, *pStencilBase = renderBuffers.pStencil; + simdscalar vYSamplePosUL = _simd_add_ps(vULOffsetsY, _simd_set1_ps(static_cast(y))); - RDTSC_STOP(BESetup, 0, 0); + const simdscalar dy = _simd_set1_ps(static_cast(SIMD_TILE_Y_DIM)); - SWR_PS_CONTEXT psContext; for (uint32_t yy = y; yy < y + KNOB_TILE_Y_DIM; yy += SIMD_TILE_Y_DIM) { - // UL pixel corner - simdscalar vYSamplePosUL = _simd_add_ps(vULOffsetsY, _simd_set1_ps((float)yy)); + simdscalar vXSamplePosUL = _simd_add_ps(vULOffsetsX, _simd_set1_ps(static_cast(x))); + + const simdscalar dx = _simd_set1_ps(static_cast(SIMD_TILE_X_DIM)); for (uint32_t xx = x; xx < x + KNOB_TILE_X_DIM; xx += SIMD_TILE_X_DIM) { - // UL pixel corners - simdscalar vXSamplePosUL = _simd_add_ps(vULOffsetsX, _simd_set1_ps((float)xx)); - // iterate over active samples unsigned long sample = 0; uint32_t sampleMask = state.blendState.sampleMask; while (_BitScanForward(&sample, sampleMask)) { sampleMask &= ~(1 << sample); + simdmask coverageMask = work.coverageMask[sample] & MASK; + if (coverageMask) { - RDTSC_START(BEBarycentric); + // offset depth/stencil buffers current sample + uint8_t *pDepthSample = pDepthBuffer + RasterTileDepthOffset(sample); + uint8_t *pStencilSample = pStencilBuffer + RasterTileStencilOffset(sample); + + if (state.depthHottileEnable && state.depthBoundsState.depthBoundsTestEnable) + { + static_assert(KNOB_DEPTH_HOT_TILE_FORMAT == R32_FLOAT, "Unsupported depth hot tile format"); + + const simdscalar z = _simd_load_ps(reinterpret_cast(pDepthSample)); + + const float minz = state.depthBoundsState.depthBoundsTestMinValue; + const float maxz = state.depthBoundsState.depthBoundsTestMaxValue; + + coverageMask &= CalcDepthBoundsAcceptMask(z, minz, maxz); + } + + AR_BEGIN(BEBarycentric, pDC->drawId); + // calculate per sample positions psContext.vX.sample = _simd_add_ps(vXSamplePosUL, T::MultisampleT::vX(sample)); psContext.vY.sample = _simd_add_ps(vYSamplePosUL, T::MultisampleT::vY(sample)); @@ -1100,40 +1134,45 @@ psContext.vZ = vplaneps(coeffs.vZa, coeffs.vZb, coeffs.vZc, psContext.vI.sample, psContext.vJ.sample); psContext.vZ = state.pfnQuantizeDepth(psContext.vZ); - RDTSC_STOP(BEBarycentric, 0, 0); + AR_END(BEBarycentric, 0); // interpolate user clip distance if available - if (rastState.clipDistanceMask) + if (state.rastState.clipDistanceMask) { - coverageMask &= ~ComputeUserClipMask(rastState.clipDistanceMask, work.pUserClipBuffer, - psContext.vI.sample, psContext.vJ.sample); + coverageMask &= ~ComputeUserClipMask(state.rastState.clipDistanceMask, work.pUserClipBuffer, psContext.vI.sample, psContext.vJ.sample); } simdscalar vCoverageMask = vMask(coverageMask); simdscalar stencilPassMask = vCoverageMask; - // offset depth/stencil buffers current sample - uint8_t *pDepthSample = pDepthBase + RasterTileDepthOffset(sample); - uint8_t *pStencilSample = pStencilBase + RasterTileStencilOffset(sample); - - RDTSC_START(BEEarlyDepthTest); - simdscalar depthPassMask = DepthStencilTest(&state, work.triFlags.frontFacing, + AR_BEGIN(BEEarlyDepthTest, pDC->drawId); + simdscalar depthPassMask = DepthStencilTest(&state, work.triFlags.frontFacing, work.triFlags.viewportIndex, psContext.vZ, pDepthSample, vCoverageMask, pStencilSample, &stencilPassMask); - DepthStencilWrite(&state.vp[0], &state.depthStencilState, work.triFlags.frontFacing, psContext.vZ, + AR_EVENT(EarlyDepthStencilInfoNullPS(_simd_movemask_ps(depthPassMask), _simd_movemask_ps(vCoverageMask), _simd_movemask_ps(stencilPassMask))); + DepthStencilWrite(&state.vp[work.triFlags.viewportIndex], &state.depthStencilState, work.triFlags.frontFacing, psContext.vZ, pDepthSample, depthPassMask, vCoverageMask, pStencilSample, stencilPassMask); - RDTSC_STOP(BEEarlyDepthTest, 0, 0); + AR_END(BEEarlyDepthTest, 0); uint32_t statMask = _simd_movemask_ps(depthPassMask); uint32_t statCount = _mm_popcnt_u32(statMask); - UPDATE_STAT(DepthPassCount, statCount); + UPDATE_STAT_BE(DepthPassCount, statCount); } + +Endtile: + ATTR_UNUSED; work.coverageMask[sample] >>= (SIMD_TILE_Y_DIM * SIMD_TILE_X_DIM); } - pDepthBase += (KNOB_SIMD_WIDTH * FormatTraits::bpp) / 8; - pStencilBase += (KNOB_SIMD_WIDTH * FormatTraits::bpp) / 8; + + pDepthBuffer += (KNOB_SIMD_WIDTH * FormatTraits::bpp) / 8; + pStencilBuffer += (KNOB_SIMD_WIDTH * FormatTraits::bpp) / 8; + + vXSamplePosUL = _simd_add_ps(vXSamplePosUL, dx); } + + vYSamplePosUL = _simd_add_ps(vYSamplePosUL, dy); } - RDTSC_STOP(BENullBackend, 0, 0); + + AR_END(BENullBackend, 0); } void InitClearTilesTable() @@ -1147,19 +1186,20 @@ sClearTilesTable[R8_UINT] = ClearMacroTile; } -PFN_BACKEND_FUNC gBackendNullPs[SWR_MULTISAMPLE_TYPE_MAX]; -PFN_BACKEND_FUNC gBackendSingleSample[2] // input coverage +PFN_BACKEND_FUNC gBackendNullPs[SWR_MULTISAMPLE_TYPE_COUNT]; +PFN_BACKEND_FUNC gBackendSingleSample[SWR_INPUT_COVERAGE_COUNT] [2] // centroid [2] // canEarlyZ = {}; -PFN_BACKEND_FUNC gBackendPixelRateTable[SWR_MULTISAMPLE_TYPE_MAX] - [SWR_MSAA_SAMPLE_PATTERN_MAX] - [SWR_INPUT_COVERAGE_MAX] +PFN_BACKEND_FUNC gBackendPixelRateTable[SWR_MULTISAMPLE_TYPE_COUNT] + [SWR_MSAA_SAMPLE_PATTERN_COUNT] + [SWR_INPUT_COVERAGE_COUNT] [2] // centroid [2] // forcedSampleCount [2] // canEarlyZ = {}; -PFN_BACKEND_FUNC gBackendSampleRateTable[SWR_MULTISAMPLE_TYPE_MAX][SWR_INPUT_COVERAGE_MAX] +PFN_BACKEND_FUNC gBackendSampleRateTable[SWR_MULTISAMPLE_TYPE_COUNT] + [SWR_INPUT_COVERAGE_COUNT] [2] // centroid [2] // canEarlyZ = {}; @@ -1201,6 +1241,22 @@ // Recursively parse args template + static PFN_BACKEND_FUNC GetFunc(SWR_INPUT_COVERAGE tArg, TArgsT... remainingArgs) + { + switch(tArg) + { + case SWR_INPUT_COVERAGE_NONE: return BEChooser::GetFunc(remainingArgs...); break; + case SWR_INPUT_COVERAGE_NORMAL: return BEChooser::GetFunc(remainingArgs...); break; + case SWR_INPUT_COVERAGE_INNER_CONSERVATIVE: return BEChooser::GetFunc(remainingArgs...); break; + default: + SWR_ASSERT(0 && "Invalid sample pattern\n"); + return BEChooser::GetFunc(remainingArgs...); + break; + } + } + + // Recursively parse args + template static PFN_BACKEND_FUNC GetFunc(SWR_MULTISAMPLE_COUNT tArg, TArgsT... remainingArgs) { switch(tArg) @@ -1230,30 +1286,29 @@ } }; -void InitBackendSingleFuncTable(PFN_BACKEND_FUNC (&table)[2][2][2]) +void InitBackendSingleFuncTable(PFN_BACKEND_FUNC (&table)[SWR_INPUT_COVERAGE_COUNT][2][2]) { - for(uint32_t inputCoverage = SWR_INPUT_COVERAGE_NONE; inputCoverage < SWR_INPUT_COVERAGE_MAX; inputCoverage++) + for(uint32_t inputCoverage = 0; inputCoverage < SWR_INPUT_COVERAGE_COUNT; inputCoverage++) { for(uint32_t isCentroid = 0; isCentroid < 2; isCentroid++) { for(uint32_t canEarlyZ = 0; canEarlyZ < 2; canEarlyZ++) { table[inputCoverage][isCentroid][canEarlyZ] = - BEChooser<>::GetFunc(SWR_MULTISAMPLE_1X, SWR_MSAA_STANDARD_PATTERN, (inputCoverage == SWR_INPUT_COVERAGE_NORMAL), + BEChooser<>::GetFunc(SWR_MULTISAMPLE_1X, SWR_MSAA_STANDARD_PATTERN, (SWR_INPUT_COVERAGE)inputCoverage, (isCentroid > 0), false, (canEarlyZ > 0), SWR_BACKEND_SINGLE_SAMPLE); } } } } -void InitBackendPixelFuncTable(PFN_BACKEND_FUNC (&table)[SWR_MULTISAMPLE_TYPE_MAX][SWR_MSAA_SAMPLE_PATTERN_MAX][SWR_INPUT_COVERAGE_MAX] - [2][2][2]) +void InitBackendPixelFuncTable(PFN_BACKEND_FUNC (&table)[SWR_MULTISAMPLE_TYPE_COUNT][SWR_MSAA_SAMPLE_PATTERN_COUNT][SWR_INPUT_COVERAGE_COUNT][2][2][2]) { - for(uint32_t sampleCount = SWR_MULTISAMPLE_1X; sampleCount < SWR_MULTISAMPLE_TYPE_MAX; sampleCount++) + for(uint32_t sampleCount = SWR_MULTISAMPLE_1X; sampleCount < SWR_MULTISAMPLE_TYPE_COUNT; sampleCount++) { - for(uint32_t samplePattern = SWR_MSAA_CENTER_PATTERN; samplePattern < SWR_MSAA_SAMPLE_PATTERN_MAX; samplePattern++) + for(uint32_t samplePattern = SWR_MSAA_CENTER_PATTERN; samplePattern < SWR_MSAA_SAMPLE_PATTERN_COUNT; samplePattern++) { - for(uint32_t inputCoverage = SWR_INPUT_COVERAGE_NONE; inputCoverage < SWR_INPUT_COVERAGE_MAX; inputCoverage++) + for(uint32_t inputCoverage = 0; inputCoverage < SWR_INPUT_COVERAGE_COUNT; inputCoverage++) { for(uint32_t isCentroid = 0; isCentroid < 2; isCentroid++) { @@ -1262,7 +1317,7 @@ for(uint32_t canEarlyZ = 0; canEarlyZ < 2; canEarlyZ++) { table[sampleCount][samplePattern][inputCoverage][isCentroid][forcedSampleCount][canEarlyZ] = - BEChooser<>::GetFunc((SWR_MULTISAMPLE_COUNT)sampleCount, (SWR_MSAA_SAMPLE_PATTERN)samplePattern, (inputCoverage == SWR_INPUT_COVERAGE_NORMAL), + BEChooser<>::GetFunc((SWR_MULTISAMPLE_COUNT)sampleCount, (SWR_MSAA_SAMPLE_PATTERN)samplePattern, (SWR_INPUT_COVERAGE)inputCoverage, (isCentroid > 0), (forcedSampleCount > 0), (canEarlyZ > 0), SWR_BACKEND_MSAA_PIXEL_RATE); } } @@ -1272,18 +1327,18 @@ } } -void InitBackendSampleFuncTable(PFN_BACKEND_FUNC (&table)[SWR_MULTISAMPLE_TYPE_MAX][SWR_INPUT_COVERAGE_MAX][2][2]) +void InitBackendSampleFuncTable(PFN_BACKEND_FUNC (&table)[SWR_MULTISAMPLE_TYPE_COUNT][SWR_INPUT_COVERAGE_COUNT][2][2]) { - for(uint32_t sampleCount = SWR_MULTISAMPLE_1X; sampleCount < SWR_MULTISAMPLE_TYPE_MAX; sampleCount++) + for(uint32_t sampleCount = SWR_MULTISAMPLE_1X; sampleCount < SWR_MULTISAMPLE_TYPE_COUNT; sampleCount++) { - for(uint32_t inputCoverage = SWR_INPUT_COVERAGE_NONE; inputCoverage < SWR_INPUT_COVERAGE_MAX; inputCoverage++) + for(uint32_t inputCoverage = 0; inputCoverage < SWR_INPUT_COVERAGE_COUNT; inputCoverage++) { for(uint32_t centroid = 0; centroid < 2; centroid++) { for(uint32_t canEarlyZ = 0; canEarlyZ < 2; canEarlyZ++) { table[sampleCount][inputCoverage][centroid][canEarlyZ] = - BEChooser<>::GetFunc((SWR_MULTISAMPLE_COUNT)sampleCount, SWR_MSAA_STANDARD_PATTERN, (inputCoverage == SWR_INPUT_COVERAGE_NORMAL), + BEChooser<>::GetFunc((SWR_MULTISAMPLE_COUNT)sampleCount, SWR_MSAA_STANDARD_PATTERN, (SWR_INPUT_COVERAGE)inputCoverage, (centroid > 0), false, (canEarlyZ > 0), (SWR_BACKEND_FUNCS)SWR_BACKEND_MSAA_SAMPLE_RATE); } } diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/backend.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/backend.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/backend.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/backend.h 2017-06-01 10:37:10.000000000 +0000 @@ -35,10 +35,10 @@ void ProcessComputeBE(DRAW_CONTEXT* pDC, uint32_t workerId, uint32_t threadGroupId, void*& pSpillFillBuffer); void ProcessSyncBE(DRAW_CONTEXT *pDC, uint32_t workerId, uint32_t macroTile, void *pUserData); -void ProcessQueryStatsBE(DRAW_CONTEXT *pDC, uint32_t workerId, uint32_t macroTile, void *pUserData); void ProcessClearBE(DRAW_CONTEXT *pDC, uint32_t workerId, uint32_t macroTile, void *pUserData); -void ProcessStoreTileBE(DRAW_CONTEXT *pDC, uint32_t workerId, uint32_t macroTile, void *pData); +void ProcessStoreTilesBE(DRAW_CONTEXT *pDC, uint32_t workerId, uint32_t macroTile, void *pData); void ProcessDiscardInvalidateTilesBE(DRAW_CONTEXT *pDC, uint32_t workerId, uint32_t macroTile, void *pData); +void ProcessShutdownBE(DRAW_CONTEXT *pDC, uint32_t workerId, uint32_t macroTile, void *pUserData); void BackendNullPS(DRAW_CONTEXT *pDC, uint32_t workerId, uint32_t x, uint32_t y, SWR_TRIANGLE_DESC &work, RenderOutputBuffers &renderBuffers); void InitClearTilesTable(); simdmask ComputeUserClipMask(uint8_t clipMask, float* pUserClipBuffer, simdscalar vI, simdscalar vJ); @@ -134,154 +134,183 @@ return RasterTileStencilOffsets[sampleNum]; } -template -INLINE void generateInputCoverage(const uint64_t *const coverageMask, uint32_t (&inputMask)[KNOB_SIMD_WIDTH], const uint32_t sampleMask) +template +struct generateInputCoverage { - - // will need to update for avx512 - assert(KNOB_SIMD_WIDTH == 8); - - __m256i mask[2]; - __m256i sampleCoverage[2]; - if(T::bIsStandardPattern) + INLINE generateInputCoverage(const uint64_t *const coverageMask, uint32_t (&inputMask)[KNOB_SIMD_WIDTH], const uint32_t sampleMask) { - __m256i src = _mm256_set1_epi32(0); - __m256i index0 = _mm256_set_epi32(7, 6, 5, 4, 3, 2, 1, 0), index1; + // will need to update for avx512 + assert(KNOB_SIMD_WIDTH == 8); - if(T::MultisampleT::numSamples == 1) - { - mask[0] = _mm256_set_epi32(0, 0, 0, 0, 0, 0, 0, -1); - } - else if(T::MultisampleT::numSamples == 2) - { - mask[0] = _mm256_set_epi32(0, 0, 0, 0, 0, 0, -1, -1); - } - else if(T::MultisampleT::numSamples == 4) - { - mask[0] = _mm256_set_epi32(0, 0, 0, 0, -1, -1, -1, -1); - } - else if(T::MultisampleT::numSamples == 8) + __m256i mask[2]; + __m256i sampleCoverage[2]; + if(T::bIsStandardPattern) { - mask[0] = _mm256_set1_epi32(-1); + __m256i src = _mm256_set1_epi32(0); + __m256i index0 = _mm256_set_epi32(7, 6, 5, 4, 3, 2, 1, 0), index1; + + if(T::MultisampleT::numSamples == 1) + { + mask[0] = _mm256_set_epi32(0, 0, 0, 0, 0, 0, 0, -1); + } + else if(T::MultisampleT::numSamples == 2) + { + mask[0] = _mm256_set_epi32(0, 0, 0, 0, 0, 0, -1, -1); + } + else if(T::MultisampleT::numSamples == 4) + { + mask[0] = _mm256_set_epi32(0, 0, 0, 0, -1, -1, -1, -1); + } + else if(T::MultisampleT::numSamples == 8) + { + mask[0] = _mm256_set1_epi32(-1); + } + else if(T::MultisampleT::numSamples == 16) + { + mask[0] = _mm256_set1_epi32(-1); + mask[1] = _mm256_set1_epi32(-1); + index1 = _mm256_set_epi32(15, 14, 13, 12, 11, 10, 9, 8); + } + + // gather coverage for samples 0-7 + sampleCoverage[0] = _mm256_castps_si256(_simd_mask_i32gather_ps(_mm256_castsi256_ps(src), (const float*)coverageMask, index0, _mm256_castsi256_ps(mask[0]), 8)); + if(T::MultisampleT::numSamples > 8) + { + // gather coverage for samples 8-15 + sampleCoverage[1] = _mm256_castps_si256(_simd_mask_i32gather_ps(_mm256_castsi256_ps(src), (const float*)coverageMask, index1, _mm256_castsi256_ps(mask[1]), 8)); + } } - else if(T::MultisampleT::numSamples == 16) + else { - mask[0] = _mm256_set1_epi32(-1); - mask[1] = _mm256_set1_epi32(-1); - index1 = _mm256_set_epi32(15, 14, 13, 12, 11, 10, 9, 8); + // center coverage is the same for all samples; just broadcast to the sample slots + uint32_t centerCoverage = ((uint32_t)(*coverageMask) & MASK); + if(T::MultisampleT::numSamples == 1) + { + sampleCoverage[0] = _mm256_set_epi32(0, 0, 0, 0, 0, 0, 0, centerCoverage); + } + else if(T::MultisampleT::numSamples == 2) + { + sampleCoverage[0] = _mm256_set_epi32(0, 0, 0, 0, 0, 0, centerCoverage, centerCoverage); + } + else if(T::MultisampleT::numSamples == 4) + { + sampleCoverage[0] = _mm256_set_epi32(0, 0, 0, 0, centerCoverage, centerCoverage, centerCoverage, centerCoverage); + } + else if(T::MultisampleT::numSamples == 8) + { + sampleCoverage[0] = _mm256_set1_epi32(centerCoverage); + } + else if(T::MultisampleT::numSamples == 16) + { + sampleCoverage[0] = _mm256_set1_epi32(centerCoverage); + sampleCoverage[1] = _mm256_set1_epi32(centerCoverage); + } } - // gather coverage for samples 0-7 - sampleCoverage[0] = _mm256_castps_si256(_simd_mask_i32gather_ps(_mm256_castsi256_ps(src), (const float*)coverageMask, index0, _mm256_castsi256_ps(mask[0]), 8)); + mask[0] = _mm256_set_epi8(-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 0xC, 0x8, 0x4, 0x0, + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 0xC, 0x8, 0x4, 0x0); + // pull out the 8bit 4x2 coverage for samples 0-7 into the lower 32 bits of each 128bit lane + __m256i packedCoverage0 = _simd_shuffle_epi8(sampleCoverage[0], mask[0]); + + __m256i packedCoverage1; if(T::MultisampleT::numSamples > 8) { - // gather coverage for samples 8-15 - sampleCoverage[1] = _mm256_castps_si256(_simd_mask_i32gather_ps(_mm256_castsi256_ps(src), (const float*)coverageMask, index1, _mm256_castsi256_ps(mask[1]), 8)); + // pull out the 8bit 4x2 coverage for samples 8-15 into the lower 32 bits of each 128bit lane + packedCoverage1 = _simd_shuffle_epi8(sampleCoverage[1], mask[0]); } - } - else - { - // center coverage is the same for all samples; just broadcast to the sample slots - uint32_t centerCoverage = ((uint32_t)(*coverageMask) & MASK); - if(T::MultisampleT::numSamples == 1) - { - sampleCoverage[0] = _mm256_set_epi32(0, 0, 0, 0, 0, 0, 0, centerCoverage); - } - else if(T::MultisampleT::numSamples == 2) + + #if (KNOB_ARCH == KNOB_ARCH_AVX) + // pack lower 32 bits of each 128 bit lane into lower 64 bits of single 128 bit lane + __m256i hiToLow = _mm256_permute2f128_si256(packedCoverage0, packedCoverage0, 0x83); + __m256 shufRes = _mm256_shuffle_ps(_mm256_castsi256_ps(hiToLow), _mm256_castsi256_ps(hiToLow), _MM_SHUFFLE(1, 1, 0, 1)); + packedCoverage0 = _mm256_castps_si256(_mm256_blend_ps(_mm256_castsi256_ps(packedCoverage0), shufRes, 0xFE)); + + __m256i packedSampleCoverage; + if(T::MultisampleT::numSamples > 8) { - sampleCoverage[0] = _mm256_set_epi32(0, 0, 0, 0, 0, 0, centerCoverage, centerCoverage); - } - else if(T::MultisampleT::numSamples == 4) + // pack lower 32 bits of each 128 bit lane into upper 64 bits of single 128 bit lane + hiToLow = _mm256_permute2f128_si256(packedCoverage1, packedCoverage1, 0x83); + shufRes = _mm256_shuffle_ps(_mm256_castsi256_ps(hiToLow), _mm256_castsi256_ps(hiToLow), _MM_SHUFFLE(1, 1, 0, 1)); + shufRes = _mm256_blend_ps(_mm256_castsi256_ps(packedCoverage1), shufRes, 0xFE); + packedCoverage1 = _mm256_castps_si256(_mm256_castpd_ps(_mm256_shuffle_pd(_mm256_castps_pd(shufRes), _mm256_castps_pd(shufRes), 0x01))); + packedSampleCoverage = _mm256_castps_si256(_mm256_blend_ps(_mm256_castsi256_ps(packedCoverage0), _mm256_castsi256_ps(packedCoverage1), 0xFC)); + } + else + { + packedSampleCoverage = packedCoverage0; + } + #else + __m256i permMask = _mm256_set_epi32(0x7, 0x7, 0x7, 0x7, 0x7, 0x7, 0x4, 0x0); + // pack lower 32 bits of each 128 bit lane into lower 64 bits of single 128 bit lane + packedCoverage0 = _mm256_permutevar8x32_epi32(packedCoverage0, permMask); + + __m256i packedSampleCoverage; + if(T::MultisampleT::numSamples > 8) { - sampleCoverage[0] = _mm256_set_epi32(0, 0, 0, 0, centerCoverage, centerCoverage, centerCoverage, centerCoverage); + permMask = _mm256_set_epi32(0x7, 0x7, 0x7, 0x7, 0x4, 0x0, 0x7, 0x7); + // pack lower 32 bits of each 128 bit lane into upper 64 bits of single 128 bit lane + packedCoverage1 = _mm256_permutevar8x32_epi32(packedCoverage1, permMask); + + // blend coverage masks for samples 0-7 and samples 8-15 into single 128 bit lane + packedSampleCoverage = _mm256_blend_epi32(packedCoverage0, packedCoverage1, 0x0C); } - else if(T::MultisampleT::numSamples == 8) + else { - sampleCoverage[0] = _mm256_set1_epi32(centerCoverage); + packedSampleCoverage = packedCoverage0; } - else if(T::MultisampleT::numSamples == 16) + #endif + + for(int32_t i = KNOB_SIMD_WIDTH - 1; i >= 0; i--) { - sampleCoverage[0] = _mm256_set1_epi32(centerCoverage); - sampleCoverage[1] = _mm256_set1_epi32(centerCoverage); - } - } + // convert packed sample coverage masks into single coverage masks for all samples for each pixel in the 4x2 + inputMask[i] = _simd_movemask_epi8(packedSampleCoverage); - mask[0] = _mm256_set_epi8(-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 0xC, 0x8, 0x4, 0x0, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 0xC, 0x8, 0x4, 0x0); - // pull out the the 8bit 4x2 coverage for samples 0-7 into the lower 32 bits of each 128bit lane - __m256i packedCoverage0 = _simd_shuffle_epi8(sampleCoverage[0], mask[0]); + if(!T::bForcedSampleCount) + { + // input coverage has to be anded with sample mask if MSAA isn't forced on + inputMask[i] &= sampleMask; + } - __m256i packedCoverage1; - if(T::MultisampleT::numSamples > 8) - { - // pull out the the 8bit 4x2 coverage for samples 8-15 into the lower 32 bits of each 128bit lane - packedCoverage1 = _simd_shuffle_epi8(sampleCoverage[1], mask[0]); + // shift to the next pixel in the 4x2 + packedSampleCoverage = _simd_slli_epi32(packedSampleCoverage, 1); + } } -#if (KNOB_ARCH == KNOB_ARCH_AVX) - // pack lower 32 bits of each 128 bit lane into lower 64 bits of single 128 bit lane - __m256i hiToLow = _mm256_permute2f128_si256(packedCoverage0, packedCoverage0, 0x83); - __m256 shufRes = _mm256_shuffle_ps(_mm256_castsi256_ps(hiToLow), _mm256_castsi256_ps(hiToLow), _MM_SHUFFLE(1, 1, 0, 1)); - packedCoverage0 = _mm256_castps_si256(_mm256_blend_ps(_mm256_castsi256_ps(packedCoverage0), shufRes, 0xFE)); - - __m256i packedSampleCoverage; - if(T::MultisampleT::numSamples > 8) - { - // pack lower 32 bits of each 128 bit lane into upper 64 bits of single 128 bit lane - hiToLow = _mm256_permute2f128_si256(packedCoverage1, packedCoverage1, 0x83); - shufRes = _mm256_shuffle_ps(_mm256_castsi256_ps(hiToLow), _mm256_castsi256_ps(hiToLow), _MM_SHUFFLE(1, 1, 0, 1)); - shufRes = _mm256_blend_ps(_mm256_castsi256_ps(packedCoverage1), shufRes, 0xFE); - packedCoverage1 = _mm256_castps_si256(_mm256_castpd_ps(_mm256_shuffle_pd(_mm256_castps_pd(shufRes), _mm256_castps_pd(shufRes), 0x01))); - packedSampleCoverage = _mm256_castps_si256(_mm256_blend_ps(_mm256_castsi256_ps(packedCoverage0), _mm256_castsi256_ps(packedCoverage1), 0xFC)); - } - else + INLINE generateInputCoverage(const uint64_t *const coverageMask, __m256 &inputCoverage, const uint32_t sampleMask) { - packedSampleCoverage = packedCoverage0; + uint32_t inputMask[KNOB_SIMD_WIDTH]; + generateInputCoverage(coverageMask, inputMask, sampleMask); + inputCoverage = _simd_castsi_ps(_mm256_set_epi32(inputMask[7], inputMask[6], inputMask[5], inputMask[4], inputMask[3], inputMask[2], inputMask[1], inputMask[0])); } -#else - __m256i permMask = _mm256_set_epi32(0x7, 0x7, 0x7, 0x7, 0x7, 0x7, 0x4, 0x0); - // pack lower 32 bits of each 128 bit lane into lower 64 bits of single 128 bit lane - packedCoverage0 = _mm256_permutevar8x32_epi32(packedCoverage0, permMask); - - __m256i packedSampleCoverage; - if(T::MultisampleT::numSamples > 8) - { - permMask = _mm256_set_epi32(0x7, 0x7, 0x7, 0x7, 0x4, 0x0, 0x7, 0x7); - // pack lower 32 bits of each 128 bit lane into upper 64 bits of single 128 bit lane - packedCoverage1 = _mm256_permutevar8x32_epi32(packedCoverage1, permMask); - // blend coverage masks for samples 0-7 and samples 8-15 into single 128 bit lane - packedSampleCoverage = _mm256_blend_epi32(packedCoverage0, packedCoverage1, 0x0C); - } - else +}; + +template +struct generateInputCoverage +{ + INLINE generateInputCoverage(const uint64_t *const coverageMask, __m256 &inputCoverage, const uint32_t sampleMask) { - packedSampleCoverage = packedCoverage0; + // will need to update for avx512 + assert(KNOB_SIMD_WIDTH == 8); + __m256i vec = _mm256_set1_epi32(coverageMask[0]); + const __m256i bit = _mm256_set_epi32(0x80, 0x40, 0x20, 0x10, 0x08, 0x04, 0x02, 0x01); + vec = _simd_and_si(vec, bit); + vec = _simd_cmplt_epi32(_mm256_setzero_si256(), vec); + vec = _simd_blendv_epi32(_simd_setzero_si(), _simd_set1_epi32(1), vec); + inputCoverage = _simd_castsi_ps(vec); } -#endif - for(int32_t i = KNOB_SIMD_WIDTH - 1; i >= 0; i--) + INLINE generateInputCoverage(const uint64_t *const coverageMask, uint32_t (&inputMask)[KNOB_SIMD_WIDTH], const uint32_t sampleMask) { - // convert packed sample coverage masks into single coverage masks for all samples for each pixel in the 4x2 - inputMask[i] = _simd_movemask_epi8(packedSampleCoverage); - - if(!T::bForcedSampleCount) + uint32_t simdCoverage = (coverageMask[0] & MASK); + static const uint32_t FullCoverageMask = (1 << T::MultisampleT::numSamples) - 1; + for(int i = 0; i < KNOB_SIMD_WIDTH; i++) { - // input coverage has to be anded with sample mask if MSAA isn't forced on - inputMask[i] &= sampleMask; + // set all samples to covered if conservative coverage mask is set for that pixel + inputMask[i] = (((1 << i) & simdCoverage) > 0) ? FullCoverageMask : 0; } - - // shift to the next pixel in the 4x2 - packedSampleCoverage = _simd_slli_epi32(packedSampleCoverage, 1); } -} - -template -INLINE void generateInputCoverage(const uint64_t *const coverageMask, __m256 &inputCoverage, const uint32_t sampleMask) -{ - uint32_t inputMask[KNOB_SIMD_WIDTH]; - generateInputCoverage(coverageMask, inputMask, sampleMask); - inputCoverage = _simd_castsi_ps(_mm256_set_epi32(inputMask[7], inputMask[6], inputMask[5], inputMask[4], inputMask[3], inputMask[2], inputMask[1], inputMask[0])); -} +}; //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// // Centroid behaves exactly as follows : @@ -298,7 +327,7 @@ const simdscalar vXSamplePosUL, const simdscalar vYSamplePosUL) { uint32_t inputMask[KNOB_SIMD_WIDTH]; - generateInputCoverage(coverageMask, inputMask, sampleMask); + generateInputCoverage(coverageMask, inputMask, sampleMask); // Case (2) - partially covered pixel @@ -381,6 +410,14 @@ psContext.vOneOverW.centroid = vplaneps(coeffs.vAOneOverW, coeffs.vBOneOverW, coeffs.vCOneOverW, psContext.vI.centroid, psContext.vJ.centroid); } +INLINE simdmask CalcDepthBoundsAcceptMask(simdscalar z, float minz, float maxz) +{ + const simdscalar minzMask = _simd_cmpge_ps(z, _simd_set1_ps(minz)); + const simdscalar maxzMask = _simd_cmple_ps(z, _simd_set1_ps(maxz)); + + return _simd_movemask_ps(_simd_and_ps(minzMask, maxzMask)); +} + template INLINE uint32_t GetNumOMSamples(SWR_MULTISAMPLE_COUNT blendSampleCount) { @@ -401,18 +438,124 @@ } } +inline void SetupBarycentricCoeffs(BarycentricCoeffs *coeffs, const SWR_TRIANGLE_DESC &work) +{ + // broadcast scalars + + coeffs->vIa = _simd_broadcast_ss(&work.I[0]); + coeffs->vIb = _simd_broadcast_ss(&work.I[1]); + coeffs->vIc = _simd_broadcast_ss(&work.I[2]); + + coeffs->vJa = _simd_broadcast_ss(&work.J[0]); + coeffs->vJb = _simd_broadcast_ss(&work.J[1]); + coeffs->vJc = _simd_broadcast_ss(&work.J[2]); + + coeffs->vZa = _simd_broadcast_ss(&work.Z[0]); + coeffs->vZb = _simd_broadcast_ss(&work.Z[1]); + coeffs->vZc = _simd_broadcast_ss(&work.Z[2]); + + coeffs->vRecipDet = _simd_broadcast_ss(&work.recipDet); + + coeffs->vAOneOverW = _simd_broadcast_ss(&work.OneOverW[0]); + coeffs->vBOneOverW = _simd_broadcast_ss(&work.OneOverW[1]); + coeffs->vCOneOverW = _simd_broadcast_ss(&work.OneOverW[2]); +} + +inline void SetupRenderBuffers(uint8_t *pColorBuffer[SWR_NUM_RENDERTARGETS], uint8_t **pDepthBuffer, uint8_t **pStencilBuffer, uint32_t colorBufferCount, RenderOutputBuffers &renderBuffers) +{ + assert(colorBufferCount <= SWR_NUM_RENDERTARGETS); + + if (pColorBuffer) + { + for (uint32_t index = 0; index < colorBufferCount; index += 1) + { + pColorBuffer[index] = renderBuffers.pColor[index]; + } + } + + if (pDepthBuffer) + { + *pDepthBuffer = renderBuffers.pDepth; + } + + if (pStencilBuffer) + { + *pStencilBuffer = renderBuffers.pStencil;; + } +} + +template +void SetupPixelShaderContext(SWR_PS_CONTEXT *psContext, const SWR_TRIANGLE_DESC &work) +{ + psContext->pAttribs = work.pAttribs; + psContext->pPerspAttribs = work.pPerspAttribs; + psContext->frontFace = work.triFlags.frontFacing; + psContext->primID = work.triFlags.primID; + + // save Ia/Ib/Ic and Ja/Jb/Jc if we need to reevaluate i/j/k in the shader because of pull attribs + psContext->I = work.I; + psContext->J = work.J; + + psContext->recipDet = work.recipDet; + psContext->pRecipW = work.pRecipW; + psContext->pSamplePosX = reinterpret_cast(&T::MultisampleT::samplePosX); + psContext->pSamplePosY = reinterpret_cast(&T::MultisampleT::samplePosY); + psContext->rasterizerSampleCount = T::MultisampleT::numSamples; + psContext->sampleIndex = 0; +} + +template +void CalcCentroid(SWR_PS_CONTEXT *psContext, const BarycentricCoeffs &coeffs, const uint64_t * const coverageMask, uint32_t sampleMask) +{ + if (IsSingleSample) // if (T::MultisampleT::numSamples == 1) // doesn't cut it, the centroid positions are still different + { + // for 1x case, centroid is pixel center + psContext->vX.centroid = psContext->vX.center; + psContext->vY.centroid = psContext->vY.center; + psContext->vI.centroid = psContext->vI.center; + psContext->vJ.centroid = psContext->vJ.center; + psContext->vOneOverW.centroid = psContext->vOneOverW.center; + } + else + { + if (T::bCentroidPos) + { + ///@ todo: don't need to genererate input coverage 2x if input coverage and centroid + if (T::bIsStandardPattern) + { + // add param: const uint32_t inputMask[KNOB_SIMD_WIDTH] to eliminate 'generate coverage 2X'.. + CalcCentroidPos(*psContext, coverageMask, sampleMask, psContext->vX.UL, psContext->vY.UL); + } + else + { + psContext->vX.centroid = _simd_add_ps(psContext->vX.UL, _simd_set1_ps(0.5f)); + psContext->vY.centroid = _simd_add_ps(psContext->vY.UL, _simd_set1_ps(0.5f)); + } + + CalcCentroidBarycentrics(coeffs, *psContext, psContext->vX.UL, psContext->vY.UL); + } + else + { + psContext->vX.centroid = psContext->vX.sample; + psContext->vY.centroid = psContext->vY.sample; + } + } +} + template struct PixelRateZTestLoop { - PixelRateZTestLoop(DRAW_CONTEXT *DC, const SWR_TRIANGLE_DESC &Work, const BarycentricCoeffs& Coeffs, const API_STATE& apiState, - uint8_t*& depthBase, uint8_t*& stencilBase, const uint8_t ClipDistanceMask) : - work(Work), coeffs(Coeffs), state(apiState), psState(apiState.psState), - clipDistanceMask(ClipDistanceMask), pDepthBase(depthBase), pStencilBase(stencilBase) {}; + PixelRateZTestLoop(DRAW_CONTEXT *DC, uint32_t _workerId, const SWR_TRIANGLE_DESC &Work, const BarycentricCoeffs& Coeffs, const API_STATE& apiState, + uint8_t*& depthBuffer, uint8_t*& stencilBuffer, const uint8_t ClipDistanceMask) : + pDC(DC), workerId(_workerId), work(Work), coeffs(Coeffs), state(apiState), psState(apiState.psState), + clipDistanceMask(ClipDistanceMask), pDepthBuffer(depthBuffer), pStencilBuffer(stencilBuffer) {}; INLINE uint32_t operator()(simdscalar& activeLanes, SWR_PS_CONTEXT& psContext, const CORE_BUCKETS BEDepthBucket, uint32_t currentSimdIn8x8 = 0) { + SWR_CONTEXT *pContext = pDC->pContext; + uint32_t statCount = 0; simdscalar anyDepthSamplePassed = _simd_setzero_ps(); for(uint32_t sample = 0; sample < T::MultisampleT::numCoverageSamples; sample++) @@ -426,7 +569,24 @@ continue; } - RDTSC_START(BEBarycentric); + // offset depth/stencil buffers current sample + uint8_t *pDepthSample = pDepthBuffer + RasterTileDepthOffset(sample); + uint8_t * pStencilSample = pStencilBuffer + RasterTileStencilOffset(sample); + + if (state.depthHottileEnable && state.depthBoundsState.depthBoundsTestEnable) + { + static_assert(KNOB_DEPTH_HOT_TILE_FORMAT == R32_FLOAT, "Unsupported depth hot tile format"); + + const simdscalar z = _simd_load_ps(reinterpret_cast(pDepthSample)); + + const float minz = state.depthBoundsState.depthBoundsTestMinValue; + const float maxz = state.depthBoundsState.depthBoundsTestMaxValue; + + vCoverageMask[sample] = _simd_and_ps(vCoverageMask[sample], vMask(CalcDepthBoundsAcceptMask(z, minz, maxz))); + } + + AR_BEGIN(BEBarycentric, pDC->drawId); + // calculate per sample positions psContext.vX.sample = _simd_add_ps(psContext.vX.UL, T::MultisampleT::vX(sample)); psContext.vY.sample = _simd_add_ps(psContext.vY.UL, T::MultisampleT::vY(sample)); @@ -444,33 +604,32 @@ vZ[sample] = vplaneps(coeffs.vZa, coeffs.vZb, coeffs.vZc, psContext.vI.sample, psContext.vJ.sample); vZ[sample] = state.pfnQuantizeDepth(vZ[sample]); } - RDTSC_STOP(BEBarycentric, 0, 0); + + AR_END(BEBarycentric, 0); ///@todo: perspective correct vs non-perspective correct clipping? // if clip distances are enabled, we need to interpolate for each sample if(clipDistanceMask) { - uint8_t clipMask = ComputeUserClipMask(clipDistanceMask, work.pUserClipBuffer, - psContext.vI.sample, psContext.vJ.sample); + uint8_t clipMask = ComputeUserClipMask(clipDistanceMask, work.pUserClipBuffer, psContext.vI.sample, psContext.vJ.sample); + vCoverageMask[sample] = _simd_and_ps(vCoverageMask[sample], vMask(~clipMask)); } - // offset depth/stencil buffers current sample - uint8_t *pDepthSample = pDepthBase + RasterTileDepthOffset(sample); - uint8_t * pStencilSample = pStencilBase + RasterTileStencilOffset(sample); - // ZTest for this sample - RDTSC_START(BEDepthBucket); + ///@todo Need to uncomment out this bucket. + //AR_BEGIN(BEDepthBucket, pDC->drawId); depthPassMask[sample] = vCoverageMask[sample]; stencilPassMask[sample] = vCoverageMask[sample]; - depthPassMask[sample] = DepthStencilTest(&state, work.triFlags.frontFacing, vZ[sample], pDepthSample, - vCoverageMask[sample], pStencilSample, &stencilPassMask[sample]); - RDTSC_STOP(BEDepthBucket, 0, 0); + depthPassMask[sample] = DepthStencilTest(&state, work.triFlags.frontFacing, work.triFlags.viewportIndex, + vZ[sample], pDepthSample, vCoverageMask[sample], + pStencilSample, &stencilPassMask[sample]); + //AR_END(BEDepthBucket, 0); // early-exit if no pixels passed depth or earlyZ is forced on if(psState.forceEarlyZ || !_simd_movemask_ps(depthPassMask[sample])) { - DepthStencilWrite(&state.vp[0], &state.depthStencilState, work.triFlags.frontFacing, vZ[sample], + DepthStencilWrite(&state.vp[work.triFlags.viewportIndex], &state.depthStencilState, work.triFlags.frontFacing, vZ[sample], pDepthSample, depthPassMask[sample], vCoverageMask[sample], pStencilSample, stencilPassMask[sample]); if(!_simd_movemask_ps(depthPassMask[sample])) @@ -496,13 +655,16 @@ private: // functor inputs + DRAW_CONTEXT* pDC; + uint32_t workerId; + const SWR_TRIANGLE_DESC& work; const BarycentricCoeffs& coeffs; const API_STATE& state; const SWR_PS_STATE& psState; const uint8_t clipDistanceMask; - uint8_t*& pDepthBase; - uint8_t*& pStencilBase; + uint8_t*& pDepthBuffer; + uint8_t*& pStencilBuffer; }; INLINE void CalcPixelBarycentrics(const BarycentricCoeffs& coeffs, SWR_PS_CONTEXT &psContext) @@ -529,8 +691,9 @@ psContext.vOneOverW.sample = vplaneps(coeffs.vAOneOverW, coeffs.vBOneOverW, coeffs.vCOneOverW, psContext.vI.sample, psContext.vJ.sample); } -INLINE void OutputMerger(SWR_PS_CONTEXT &psContext, uint8_t* (&pColorBase)[SWR_NUM_RENDERTARGETS], uint32_t sample, const SWR_BLEND_STATE *pBlendState, - const PFN_BLEND_JIT_FUNC (&pfnBlendFunc)[SWR_NUM_RENDERTARGETS], simdscalar &coverageMask, simdscalar depthPassMask, const uint32_t NumRT) +// Merge Output to 4x2 SIMD Tile Format +INLINE void OutputMerger4x2(SWR_PS_CONTEXT &psContext, uint8_t* (&pColorBase)[SWR_NUM_RENDERTARGETS], uint32_t sample, const SWR_BLEND_STATE *pBlendState, + const PFN_BLEND_JIT_FUNC (&pfnBlendFunc)[SWR_NUM_RENDERTARGETS], simdscalar &coverageMask, simdscalar depthPassMask, const uint32_t NumRT) { // type safety guaranteed from template instantiation in BEChooser<>::GetFunc const uint32_t rasterTileColorOffset = RasterTileColorOffset(sample); @@ -552,6 +715,7 @@ pBlendState, psContext.shaded[rt], psContext.shaded[1], + psContext.shaded[0].w, sample, pColorSample, blendOut, @@ -587,12 +751,88 @@ } } +#if USE_8x2_TILE_BACKEND +// Merge Output to 8x2 SIMD16 Tile Format +INLINE void OutputMerger8x2(SWR_PS_CONTEXT &psContext, uint8_t* (&pColorBase)[SWR_NUM_RENDERTARGETS], uint32_t sample, const SWR_BLEND_STATE *pBlendState, + const PFN_BLEND_JIT_FUNC(&pfnBlendFunc)[SWR_NUM_RENDERTARGETS], simdscalar &coverageMask, simdscalar depthPassMask, const uint32_t NumRT, const uint32_t colorBufferEnableMask, bool useAlternateOffset) +{ + // type safety guaranteed from template instantiation in BEChooser<>::GetFunc + uint32_t rasterTileColorOffset = RasterTileColorOffset(sample); + + if (useAlternateOffset) + { + rasterTileColorOffset += sizeof(simdscalar); + } + + simdvector blendSrc; + simdvector blendOut; + + uint32_t colorBufferBit = 1; + for (uint32_t rt = 0; rt < NumRT; rt += 1, colorBufferBit <<= 1) + { + simdscalar *pColorSample = reinterpret_cast(pColorBase[rt] + rasterTileColorOffset); + + const SWR_RENDER_TARGET_BLEND_STATE *pRTBlend = &pBlendState->renderTarget[rt]; + // pfnBlendFunc may not update all channels. Initialize with PS output. + /// TODO: move this into the blend JIT. + blendOut = psContext.shaded[rt]; + + if (colorBufferBit & colorBufferEnableMask) + { + blendSrc[0] = pColorSample[0]; + blendSrc[1] = pColorSample[2]; + blendSrc[2] = pColorSample[4]; + blendSrc[3] = pColorSample[6]; + } + + // Blend outputs and update coverage mask for alpha test + if (pfnBlendFunc[rt] != nullptr) + { + pfnBlendFunc[rt]( + pBlendState, + psContext.shaded[rt], + psContext.shaded[1], + psContext.shaded[0].w, + sample, + reinterpret_cast(&blendSrc), + blendOut, + &psContext.oMask, + reinterpret_cast(&coverageMask)); + } + + // final write mask + simdscalari outputMask = _simd_castps_si(_simd_and_ps(coverageMask, depthPassMask)); + + ///@todo can only use maskstore fast path if bpc is 32. Assuming hot tile is RGBA32_FLOAT. + static_assert(KNOB_COLOR_HOT_TILE_FORMAT == R32G32B32A32_FLOAT, "Unsupported hot tile format"); + + // store with color mask + if (!pRTBlend->writeDisableRed) + { + _simd_maskstore_ps(reinterpret_cast(&pColorSample[0]), outputMask, blendOut.x); + } + if (!pRTBlend->writeDisableGreen) + { + _simd_maskstore_ps(reinterpret_cast(&pColorSample[2]), outputMask, blendOut.y); + } + if (!pRTBlend->writeDisableBlue) + { + _simd_maskstore_ps(reinterpret_cast(&pColorSample[4]), outputMask, blendOut.z); + } + if (!pRTBlend->writeDisableAlpha) + { + _simd_maskstore_ps(reinterpret_cast(&pColorSample[6]), outputMask, blendOut.w); + } + } +} + +#endif template struct SwrBackendTraits { static const bool bIsStandardPattern = (samplePattern == SWR_MSAA_STANDARD_PATTERN); - static const bool bInputCoverage = (coverage == 1); + static const uint32_t InputCoverage = coverage; static const bool bCentroidPos = (centroid == 1); static const bool bForcedSampleCount = (forced == 1); static const bool bCanEarlyZ = (canEarlyZ == 1); diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/binner.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/binner.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/binner.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/binner.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,1505 @@ +/**************************************************************************** +* Copyright (C) 2014-2015 Intel Corporation. All Rights Reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice (including the next +* paragraph) shall be included in all copies or substantial portions of the +* Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +* IN THE SOFTWARE. +* +* @file binner.cpp +* +* @brief Implementation for the macrotile binner +* +******************************************************************************/ + +#include "context.h" +#include "frontend.h" +#include "conservativeRast.h" +#include "pa.h" +#include "rasterizer.h" +#include "rdtsc_core.h" +#include "tilemgr.h" + +// Function Prototype +void BinPostSetupLines(DRAW_CONTEXT *pDC, PA_STATE& pa, uint32_t workerId, simdvector prims[3], simdscalar vRecipW[2], uint32_t primMask, simdscalari primID, simdscalari viewportIdx); + +////////////////////////////////////////////////////////////////////////// +/// @brief Offsets added to post-viewport vertex positions based on +/// raster state. +static const simdscalar g_pixelOffsets[SWR_PIXEL_LOCATION_UL + 1] = +{ + _simd_set1_ps(0.0f), // SWR_PIXEL_LOCATION_CENTER + _simd_set1_ps(0.5f), // SWR_PIXEL_LOCATION_UL +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief Convert the X,Y coords of a triangle to the requested Fixed +/// Point precision from FP32. +template > +INLINE simdscalari fpToFixedPointVertical(const simdscalar vIn) +{ + simdscalar vFixed = _simd_mul_ps(vIn, _simd_set1_ps(PT::ScaleT::value)); + return _simd_cvtps_epi32(vFixed); +} + +////////////////////////////////////////////////////////////////////////// +/// @brief Helper function to set the X,Y coords of a triangle to the +/// requested Fixed Point precision from FP32. +/// @param tri: simdvector[3] of FP triangle verts +/// @param vXi: fixed point X coords of tri verts +/// @param vYi: fixed point Y coords of tri verts +INLINE static void FPToFixedPoint(const simdvector * const tri, simdscalari(&vXi)[3], simdscalari(&vYi)[3]) +{ + vXi[0] = fpToFixedPointVertical(tri[0].x); + vYi[0] = fpToFixedPointVertical(tri[0].y); + vXi[1] = fpToFixedPointVertical(tri[1].x); + vYi[1] = fpToFixedPointVertical(tri[1].y); + vXi[2] = fpToFixedPointVertical(tri[2].x); + vYi[2] = fpToFixedPointVertical(tri[2].y); +} + +////////////////////////////////////////////////////////////////////////// +/// @brief Calculate bounding box for current triangle +/// @tparam CT: ConservativeRastFETraits type +/// @param vX: fixed point X position for triangle verts +/// @param vY: fixed point Y position for triangle verts +/// @param bbox: fixed point bbox +/// *Note*: expects vX, vY to be in the correct precision for the type +/// of rasterization. This avoids unnecessary FP->fixed conversions. +template +INLINE void calcBoundingBoxIntVertical(const simdvector * const tri, simdscalari(&vX)[3], simdscalari(&vY)[3], simdBBox &bbox) +{ + simdscalari vMinX = vX[0]; + vMinX = _simd_min_epi32(vMinX, vX[1]); + vMinX = _simd_min_epi32(vMinX, vX[2]); + + simdscalari vMaxX = vX[0]; + vMaxX = _simd_max_epi32(vMaxX, vX[1]); + vMaxX = _simd_max_epi32(vMaxX, vX[2]); + + simdscalari vMinY = vY[0]; + vMinY = _simd_min_epi32(vMinY, vY[1]); + vMinY = _simd_min_epi32(vMinY, vY[2]); + + simdscalari vMaxY = vY[0]; + vMaxY = _simd_max_epi32(vMaxY, vY[1]); + vMaxY = _simd_max_epi32(vMaxY, vY[2]); + + bbox.xmin = vMinX; + bbox.xmax = vMaxX; + bbox.ymin = vMinY; + bbox.ymax = vMaxY; +} + +////////////////////////////////////////////////////////////////////////// +/// @brief FEConservativeRastT specialization of calcBoundingBoxIntVertical +/// Offsets BBox for conservative rast +template <> +INLINE void calcBoundingBoxIntVertical(const simdvector * const tri, simdscalari(&vX)[3], simdscalari(&vY)[3], simdBBox &bbox) +{ + // FE conservative rast traits + typedef FEConservativeRastT CT; + + simdscalari vMinX = vX[0]; + vMinX = _simd_min_epi32(vMinX, vX[1]); + vMinX = _simd_min_epi32(vMinX, vX[2]); + + simdscalari vMaxX = vX[0]; + vMaxX = _simd_max_epi32(vMaxX, vX[1]); + vMaxX = _simd_max_epi32(vMaxX, vX[2]); + + simdscalari vMinY = vY[0]; + vMinY = _simd_min_epi32(vMinY, vY[1]); + vMinY = _simd_min_epi32(vMinY, vY[2]); + + simdscalari vMaxY = vY[0]; + vMaxY = _simd_max_epi32(vMaxY, vY[1]); + vMaxY = _simd_max_epi32(vMaxY, vY[2]); + + /// Bounding box needs to be expanded by 1/512 before snapping to 16.8 for conservative rasterization + /// expand bbox by 1/256; coverage will be correctly handled in the rasterizer. + bbox.xmin = _simd_sub_epi32(vMinX, _simd_set1_epi32(CT::BoundingBoxOffsetT::value)); + bbox.xmax = _simd_add_epi32(vMaxX, _simd_set1_epi32(CT::BoundingBoxOffsetT::value)); + bbox.ymin = _simd_sub_epi32(vMinY, _simd_set1_epi32(CT::BoundingBoxOffsetT::value)); + bbox.ymax = _simd_add_epi32(vMaxY, _simd_set1_epi32(CT::BoundingBoxOffsetT::value)); +} + +////////////////////////////////////////////////////////////////////////// +/// @brief Processes attributes for the backend based on linkage mask and +/// linkage map. Essentially just doing an SOA->AOS conversion and pack. +/// @param pDC - Draw context +/// @param pa - Primitive Assembly state +/// @param linkageMask - Specifies which VS outputs are routed to PS. +/// @param pLinkageMap - maps VS attribute slot to PS slot +/// @param triIndex - Triangle to process attributes for +/// @param pBuffer - Output result +template +INLINE void ProcessAttributes( + DRAW_CONTEXT *pDC, + PA_STATE&pa, + uint32_t triIndex, + uint32_t primId, + float *pBuffer) +{ + static_assert(NumVertsT::value > 0 && NumVertsT::value <= 3, "Invalid value for NumVertsT"); + const SWR_BACKEND_STATE& backendState = pDC->pState->state.backendState; + // Conservative Rasterization requires degenerate tris to have constant attribute interpolation + LONG constantInterpMask = IsDegenerate::value ? 0xFFFFFFFF : backendState.constantInterpolationMask; + const uint32_t provokingVertex = pDC->pState->state.frontendState.topologyProvokingVertex; + const PRIMITIVE_TOPOLOGY topo = pDC->pState->state.topology; + + static const float constTable[3][4] = { + { 0.0f, 0.0f, 0.0f, 0.0f }, + { 0.0f, 0.0f, 0.0f, 1.0f }, + { 1.0f, 1.0f, 1.0f, 1.0f } + }; + + for (uint32_t i = 0; i < backendState.numAttributes; ++i) + { + uint32_t inputSlot; + if (IsSwizzledT::value) + { + SWR_ATTRIB_SWIZZLE attribSwizzle = backendState.swizzleMap[i]; + inputSlot = VERTEX_ATTRIB_START_SLOT + attribSwizzle.sourceAttrib; + + } + else + { + inputSlot = VERTEX_ATTRIB_START_SLOT + i; + } + + __m128 attrib[3]; // triangle attribs (always 4 wide) + float* pAttribStart = pBuffer; + + if (HasConstantInterpT::value || IsDegenerate::value) + { + if (_bittest(&constantInterpMask, i)) + { + uint32_t vid; + uint32_t adjustedTriIndex; + static const uint32_t tristripProvokingVertex[] = { 0, 2, 1 }; + static const int32_t quadProvokingTri[2][4] = { { 0, 0, 0, 1 },{ 0, -1, 0, 0 } }; + static const uint32_t quadProvokingVertex[2][4] = { { 0, 1, 2, 2 },{ 0, 1, 1, 2 } }; + static const int32_t qstripProvokingTri[2][4] = { { 0, 0, 0, 1 },{ -1, 0, 0, 0 } }; + static const uint32_t qstripProvokingVertex[2][4] = { { 0, 1, 2, 1 },{ 0, 0, 2, 1 } }; + + switch (topo) { + case TOP_QUAD_LIST: + adjustedTriIndex = triIndex + quadProvokingTri[triIndex & 1][provokingVertex]; + vid = quadProvokingVertex[triIndex & 1][provokingVertex]; + break; + case TOP_QUAD_STRIP: + adjustedTriIndex = triIndex + qstripProvokingTri[triIndex & 1][provokingVertex]; + vid = qstripProvokingVertex[triIndex & 1][provokingVertex]; + break; + case TOP_TRIANGLE_STRIP: + adjustedTriIndex = triIndex; + vid = (triIndex & 1) + ? tristripProvokingVertex[provokingVertex] + : provokingVertex; + break; + default: + adjustedTriIndex = triIndex; + vid = provokingVertex; + break; + } + + pa.AssembleSingle(inputSlot, adjustedTriIndex, attrib); + + for (uint32_t i = 0; i < NumVertsT::value; ++i) + { + _mm_store_ps(pBuffer, attrib[vid]); + pBuffer += 4; + } + } + else + { + pa.AssembleSingle(inputSlot, triIndex, attrib); + + for (uint32_t i = 0; i < NumVertsT::value; ++i) + { + _mm_store_ps(pBuffer, attrib[i]); + pBuffer += 4; + } + } + } + else + { + pa.AssembleSingle(inputSlot, triIndex, attrib); + + for (uint32_t i = 0; i < NumVertsT::value; ++i) + { + _mm_store_ps(pBuffer, attrib[i]); + pBuffer += 4; + } + } + + // pad out the attrib buffer to 3 verts to ensure the triangle + // interpolation code in the pixel shader works correctly for the + // 3 topologies - point, line, tri. This effectively zeros out the + // effect of the missing vertices in the triangle interpolation. + for (uint32_t v = NumVertsT::value; v < 3; ++v) + { + _mm_store_ps(pBuffer, attrib[NumVertsT::value - 1]); + pBuffer += 4; + } + + // check for constant source overrides + if (IsSwizzledT::value) + { + uint32_t mask = backendState.swizzleMap[i].componentOverrideMask; + if (mask) + { + DWORD comp; + while (_BitScanForward(&comp, mask)) + { + mask &= ~(1 << comp); + + float constantValue = 0.0f; + switch ((SWR_CONSTANT_SOURCE)backendState.swizzleMap[i].constantSource) + { + case SWR_CONSTANT_SOURCE_CONST_0000: + case SWR_CONSTANT_SOURCE_CONST_0001_FLOAT: + case SWR_CONSTANT_SOURCE_CONST_1111_FLOAT: + constantValue = constTable[backendState.swizzleMap[i].constantSource][comp]; + break; + case SWR_CONSTANT_SOURCE_PRIM_ID: + constantValue = *(float*)&primId; + break; + } + + // apply constant value to all 3 vertices + for (uint32_t v = 0; v < 3; ++v) + { + pAttribStart[comp + v * 4] = constantValue; + } + } + } + } + } +} + +////////////////////////////////////////////////////////////////////////// +/// @brief Gather scissor rect data based on per-prim viewport indices. +/// @param pScissorsInFixedPoint - array of scissor rects in 16.8 fixed point. +/// @param pViewportIndex - array of per-primitive vewport indexes. +/// @param scisXmin - output vector of per-prmitive scissor rect Xmin data. +/// @param scisYmin - output vector of per-prmitive scissor rect Ymin data. +/// @param scisXmax - output vector of per-prmitive scissor rect Xmax data. +/// @param scisYmax - output vector of per-prmitive scissor rect Ymax data. +// +/// @todo: Look at speeding this up -- weigh against corresponding costs in rasterizer. +template +struct GatherScissors +{ + static void Gather(const SWR_RECT* pScissorsInFixedPoint, const uint32_t* pViewportIndex, + simdscalari &scisXmin, simdscalari &scisYmin, + simdscalari &scisXmax, simdscalari &scisYmax) + { + SWR_ASSERT(0, "Unhandled Simd Width in Scissor Rect Gather"); + } +}; + +template<> +struct GatherScissors<8> +{ + static void Gather(const SWR_RECT* pScissorsInFixedPoint, const uint32_t* pViewportIndex, + simdscalari &scisXmin, simdscalari &scisYmin, + simdscalari &scisXmax, simdscalari &scisYmax) + { + scisXmin = _simd_set_epi32(pScissorsInFixedPoint[pViewportIndex[0]].xmin, + pScissorsInFixedPoint[pViewportIndex[1]].xmin, + pScissorsInFixedPoint[pViewportIndex[2]].xmin, + pScissorsInFixedPoint[pViewportIndex[3]].xmin, + pScissorsInFixedPoint[pViewportIndex[4]].xmin, + pScissorsInFixedPoint[pViewportIndex[5]].xmin, + pScissorsInFixedPoint[pViewportIndex[6]].xmin, + pScissorsInFixedPoint[pViewportIndex[7]].xmin); + scisYmin = _simd_set_epi32(pScissorsInFixedPoint[pViewportIndex[0]].ymin, + pScissorsInFixedPoint[pViewportIndex[1]].ymin, + pScissorsInFixedPoint[pViewportIndex[2]].ymin, + pScissorsInFixedPoint[pViewportIndex[3]].ymin, + pScissorsInFixedPoint[pViewportIndex[4]].ymin, + pScissorsInFixedPoint[pViewportIndex[5]].ymin, + pScissorsInFixedPoint[pViewportIndex[6]].ymin, + pScissorsInFixedPoint[pViewportIndex[7]].ymin); + scisXmax = _simd_set_epi32(pScissorsInFixedPoint[pViewportIndex[0]].xmax, + pScissorsInFixedPoint[pViewportIndex[1]].xmax, + pScissorsInFixedPoint[pViewportIndex[2]].xmax, + pScissorsInFixedPoint[pViewportIndex[3]].xmax, + pScissorsInFixedPoint[pViewportIndex[4]].xmax, + pScissorsInFixedPoint[pViewportIndex[5]].xmax, + pScissorsInFixedPoint[pViewportIndex[6]].xmax, + pScissorsInFixedPoint[pViewportIndex[7]].xmax); + scisYmax = _simd_set_epi32(pScissorsInFixedPoint[pViewportIndex[0]].ymax, + pScissorsInFixedPoint[pViewportIndex[1]].ymax, + pScissorsInFixedPoint[pViewportIndex[2]].ymax, + pScissorsInFixedPoint[pViewportIndex[3]].ymax, + pScissorsInFixedPoint[pViewportIndex[4]].ymax, + pScissorsInFixedPoint[pViewportIndex[5]].ymax, + pScissorsInFixedPoint[pViewportIndex[6]].ymax, + pScissorsInFixedPoint[pViewportIndex[7]].ymax); + } +}; + +typedef void(*PFN_PROCESS_ATTRIBUTES)(DRAW_CONTEXT*, PA_STATE&, uint32_t, uint32_t, float*); + +struct ProcessAttributesChooser +{ + typedef PFN_PROCESS_ATTRIBUTES FuncType; + + template + static FuncType GetFunc() + { + return ProcessAttributes; + } +}; + +PFN_PROCESS_ATTRIBUTES GetProcessAttributesFunc(uint32_t NumVerts, bool IsSwizzled, bool HasConstantInterp, bool IsDegenerate = false) +{ + return TemplateArgUnroller::GetFunc(IntArg<1, 3>{NumVerts}, IsSwizzled, HasConstantInterp, IsDegenerate); +} + +////////////////////////////////////////////////////////////////////////// +/// @brief Processes enabled user clip distances. Loads the active clip +/// distances from the PA, sets up barycentric equations, and +/// stores the results to the output buffer +/// @param pa - Primitive Assembly state +/// @param primIndex - primitive index to process +/// @param clipDistMask - mask of enabled clip distances +/// @param pUserClipBuffer - buffer to store results +template +void ProcessUserClipDist(PA_STATE& pa, uint32_t primIndex, uint8_t clipDistMask, float *pRecipW, float* pUserClipBuffer) +{ + DWORD clipDist; + while (_BitScanForward(&clipDist, clipDistMask)) + { + clipDistMask &= ~(1 << clipDist); + uint32_t clipSlot = clipDist >> 2; + uint32_t clipComp = clipDist & 0x3; + uint32_t clipAttribSlot = clipSlot == 0 ? + VERTEX_CLIPCULL_DIST_LO_SLOT : VERTEX_CLIPCULL_DIST_HI_SLOT; + + __m128 primClipDist[3]; + pa.AssembleSingle(clipAttribSlot, primIndex, primClipDist); + + float vertClipDist[NumVerts]; + for (uint32_t e = 0; e < NumVerts; ++e) + { + OSALIGNSIMD(float) aVertClipDist[4]; + _mm_store_ps(aVertClipDist, primClipDist[e]); + vertClipDist[e] = aVertClipDist[clipComp]; + }; + + // setup plane equations for barycentric interpolation in the backend + float baryCoeff[NumVerts]; + float last = vertClipDist[NumVerts - 1] * pRecipW[NumVerts - 1]; + for (uint32_t e = 0; e < NumVerts - 1; ++e) + { + baryCoeff[e] = vertClipDist[e] * pRecipW[e] - last; + } + baryCoeff[NumVerts - 1] = last; + + for (uint32_t e = 0; e < NumVerts; ++e) + { + *(pUserClipBuffer++) = baryCoeff[e]; + } + } +} + +////////////////////////////////////////////////////////////////////////// +/// @brief Bin triangle primitives to macro tiles. Performs setup, clipping +/// culling, viewport transform, etc. +/// @param pDC - pointer to draw context. +/// @param pa - The primitive assembly object. +/// @param workerId - thread's worker id. Even thread has a unique id. +/// @param tri - Contains triangle position data for SIMDs worth of triangles. +/// @param primID - Primitive ID for each triangle. +/// @param viewportIdx - viewport array index for each triangle. +/// @tparam CT - ConservativeRastFETraits +template +void BinTriangles( + DRAW_CONTEXT *pDC, + PA_STATE& pa, + uint32_t workerId, + simdvector tri[3], + uint32_t triMask, + simdscalari primID, + simdscalari viewportIdx) +{ + SWR_CONTEXT *pContext = pDC->pContext; + + AR_BEGIN(FEBinTriangles, pDC->drawId); + + const API_STATE& state = GetApiState(pDC); + const SWR_RASTSTATE& rastState = state.rastState; + const SWR_FRONTEND_STATE& feState = state.frontendState; + const SWR_GS_STATE& gsState = state.gsState; + MacroTileMgr *pTileMgr = pDC->pTileMgr; + + simdscalar vRecipW0 = _simd_set1_ps(1.0f); + simdscalar vRecipW1 = _simd_set1_ps(1.0f); + simdscalar vRecipW2 = _simd_set1_ps(1.0f); + + if (feState.vpTransformDisable) + { + // RHW is passed in directly when VP transform is disabled + vRecipW0 = tri[0].v[3]; + vRecipW1 = tri[1].v[3]; + vRecipW2 = tri[2].v[3]; + } + else + { + // Perspective divide + vRecipW0 = _simd_div_ps(_simd_set1_ps(1.0f), tri[0].w); + vRecipW1 = _simd_div_ps(_simd_set1_ps(1.0f), tri[1].w); + vRecipW2 = _simd_div_ps(_simd_set1_ps(1.0f), tri[2].w); + + tri[0].v[0] = _simd_mul_ps(tri[0].v[0], vRecipW0); + tri[1].v[0] = _simd_mul_ps(tri[1].v[0], vRecipW1); + tri[2].v[0] = _simd_mul_ps(tri[2].v[0], vRecipW2); + + tri[0].v[1] = _simd_mul_ps(tri[0].v[1], vRecipW0); + tri[1].v[1] = _simd_mul_ps(tri[1].v[1], vRecipW1); + tri[2].v[1] = _simd_mul_ps(tri[2].v[1], vRecipW2); + + tri[0].v[2] = _simd_mul_ps(tri[0].v[2], vRecipW0); + tri[1].v[2] = _simd_mul_ps(tri[1].v[2], vRecipW1); + tri[2].v[2] = _simd_mul_ps(tri[2].v[2], vRecipW2); + + // Viewport transform to screen space coords + if (state.gsState.emitsViewportArrayIndex) + { + viewportTransform<3>(tri, state.vpMatrices, viewportIdx); + } + else + { + viewportTransform<3>(tri, state.vpMatrices); + } + } + + // Adjust for pixel center location + simdscalar offset = g_pixelOffsets[rastState.pixelLocation]; + tri[0].x = _simd_add_ps(tri[0].x, offset); + tri[0].y = _simd_add_ps(tri[0].y, offset); + + tri[1].x = _simd_add_ps(tri[1].x, offset); + tri[1].y = _simd_add_ps(tri[1].y, offset); + + tri[2].x = _simd_add_ps(tri[2].x, offset); + tri[2].y = _simd_add_ps(tri[2].y, offset); + + simdscalari vXi[3], vYi[3]; + // Set vXi, vYi to required fixed point precision + FPToFixedPoint(tri, vXi, vYi); + + // triangle setup + simdscalari vAi[3], vBi[3]; + triangleSetupABIntVertical(vXi, vYi, vAi, vBi); + + // determinant + simdscalari vDet[2]; + calcDeterminantIntVertical(vAi, vBi, vDet); + + // cull zero area + int maskLo = _simd_movemask_pd(_simd_castsi_pd(_simd_cmpeq_epi64(vDet[0], _simd_setzero_si()))); + int maskHi = _simd_movemask_pd(_simd_castsi_pd(_simd_cmpeq_epi64(vDet[1], _simd_setzero_si()))); + + int cullZeroAreaMask = maskLo | (maskHi << (KNOB_SIMD_WIDTH / 2)); + + uint32_t origTriMask = triMask; + // don't cull degenerate triangles if we're conservatively rasterizing + if (rastState.fillMode == SWR_FILLMODE_SOLID && !CT::IsConservativeT::value) + { + triMask &= ~cullZeroAreaMask; + } + + // determine front winding tris + // CW +det + // CCW det < 0; + // 0 area triangles are marked as backfacing regardless of winding order, + // which is required behavior for conservative rast and wireframe rendering + uint32_t frontWindingTris; + if (rastState.frontWinding == SWR_FRONTWINDING_CW) + { + maskLo = _simd_movemask_pd(_simd_castsi_pd(_simd_cmpgt_epi64(vDet[0], _simd_setzero_si()))); + maskHi = _simd_movemask_pd(_simd_castsi_pd(_simd_cmpgt_epi64(vDet[1], _simd_setzero_si()))); + } + else + { + maskLo = _simd_movemask_pd(_simd_castsi_pd(_simd_cmpgt_epi64(_simd_setzero_si(), vDet[0]))); + maskHi = _simd_movemask_pd(_simd_castsi_pd(_simd_cmpgt_epi64(_simd_setzero_si(), vDet[1]))); + } + frontWindingTris = maskLo | (maskHi << (KNOB_SIMD_WIDTH / 2)); + + // cull + uint32_t cullTris; + switch ((SWR_CULLMODE)rastState.cullMode) + { + case SWR_CULLMODE_BOTH: cullTris = 0xffffffff; break; + case SWR_CULLMODE_NONE: cullTris = 0x0; break; + case SWR_CULLMODE_FRONT: cullTris = frontWindingTris; break; + // 0 area triangles are marked as backfacing, which is required behavior for conservative rast + case SWR_CULLMODE_BACK: cullTris = ~frontWindingTris; break; + default: SWR_ASSERT(false, "Invalid cull mode: %d", rastState.cullMode); cullTris = 0x0; break; + } + + triMask &= ~cullTris; + + if (origTriMask ^ triMask) + { + RDTSC_EVENT(FECullZeroAreaAndBackface, _mm_popcnt_u32(origTriMask ^ triMask), 0); + } + + // Simple non-conformant wireframe mode, useful for debugging + if (rastState.fillMode == SWR_FILLMODE_WIREFRAME) + { + // construct 3 SIMD lines out of the triangle and call the line binner for each SIMD + simdvector line[2]; + simdscalar recipW[2]; + line[0] = tri[0]; + line[1] = tri[1]; + recipW[0] = vRecipW0; + recipW[1] = vRecipW1; + BinPostSetupLines(pDC, pa, workerId, line, recipW, triMask, primID, viewportIdx); + + line[0] = tri[1]; + line[1] = tri[2]; + recipW[0] = vRecipW1; + recipW[1] = vRecipW2; + BinPostSetupLines(pDC, pa, workerId, line, recipW, triMask, primID, viewportIdx); + + line[0] = tri[2]; + line[1] = tri[0]; + recipW[0] = vRecipW2; + recipW[1] = vRecipW0; + BinPostSetupLines(pDC, pa, workerId, line, recipW, triMask, primID, viewportIdx); + + AR_END(FEBinTriangles, 1); + return; + } + + /// Note: these variable initializations must stay above any 'goto endBenTriangles' + // compute per tri backface + uint32_t frontFaceMask = frontWindingTris; + uint32_t *pPrimID = (uint32_t *)&primID; + const uint32_t *pViewportIndex = (uint32_t *)&viewportIdx; + DWORD triIndex = 0; + // for center sample pattern, all samples are at pixel center; calculate coverage + // once at center and broadcast the results in the backend + const SWR_MULTISAMPLE_COUNT sampleCount = (rastState.samplePattern == SWR_MSAA_STANDARD_PATTERN) ? rastState.sampleCount : SWR_MULTISAMPLE_1X; + uint32_t edgeEnable; + PFN_WORK_FUNC pfnWork; + if (CT::IsConservativeT::value) + { + // determine which edges of the degenerate tri, if any, are valid to rasterize. + // used to call the appropriate templated rasterizer function + if (cullZeroAreaMask > 0) + { + // e0 = v1-v0 + simdscalari x0x1Mask = _simd_cmpeq_epi32(vXi[0], vXi[1]); + simdscalari y0y1Mask = _simd_cmpeq_epi32(vYi[0], vYi[1]); + uint32_t e0Mask = _simd_movemask_ps(_simd_castsi_ps(_simd_and_si(x0x1Mask, y0y1Mask))); + + // e1 = v2-v1 + simdscalari x1x2Mask = _simd_cmpeq_epi32(vXi[1], vXi[2]); + simdscalari y1y2Mask = _simd_cmpeq_epi32(vYi[1], vYi[2]); + uint32_t e1Mask = _simd_movemask_ps(_simd_castsi_ps(_simd_and_si(x1x2Mask, y1y2Mask))); + + // e2 = v0-v2 + // if v0 == v1 & v1 == v2, v0 == v2 + uint32_t e2Mask = e0Mask & e1Mask; + SWR_ASSERT(KNOB_SIMD_WIDTH == 8, "Need to update degenerate mask code for avx512"); + + // edge order: e0 = v0v1, e1 = v1v2, e2 = v0v2 + // 32 bit binary: 0000 0000 0010 0100 1001 0010 0100 1001 + e0Mask = pdep_u32(e0Mask, 0x00249249); + // 32 bit binary: 0000 0000 0100 1001 0010 0100 1001 0010 + e1Mask = pdep_u32(e1Mask, 0x00492492); + // 32 bit binary: 0000 0000 1001 0010 0100 1001 0010 0100 + e2Mask = pdep_u32(e2Mask, 0x00924924); + + edgeEnable = (0x00FFFFFF & (~(e0Mask | e1Mask | e2Mask))); + } + else + { + edgeEnable = 0x00FFFFFF; + } + } + else + { + // degenerate triangles won't be sent to rasterizer; just enable all edges + pfnWork = GetRasterizerFunc(sampleCount, (rastState.conservativeRast > 0), + (SWR_INPUT_COVERAGE)pDC->pState->state.psState.inputCoverage, ALL_EDGES_VALID, + (state.scissorsTileAligned == false)); + } + + if (!triMask) + { + goto endBinTriangles; + } + + // Calc bounding box of triangles + simdBBox bbox; + calcBoundingBoxIntVertical(tri, vXi, vYi, bbox); + + // determine if triangle falls between pixel centers and discard + // only discard for non-MSAA case and when conservative rast is disabled + // (xmin + 127) & ~255 + // (xmax + 128) & ~255 + if (rastState.sampleCount == SWR_MULTISAMPLE_1X && (!CT::IsConservativeT::value)) + { + origTriMask = triMask; + + int cullCenterMask; + { + simdscalari xmin = _simd_add_epi32(bbox.xmin, _simd_set1_epi32(127)); + xmin = _simd_and_si(xmin, _simd_set1_epi32(~255)); + simdscalari xmax = _simd_add_epi32(bbox.xmax, _simd_set1_epi32(128)); + xmax = _simd_and_si(xmax, _simd_set1_epi32(~255)); + + simdscalari vMaskH = _simd_cmpeq_epi32(xmin, xmax); + + simdscalari ymin = _simd_add_epi32(bbox.ymin, _simd_set1_epi32(127)); + ymin = _simd_and_si(ymin, _simd_set1_epi32(~255)); + simdscalari ymax = _simd_add_epi32(bbox.ymax, _simd_set1_epi32(128)); + ymax = _simd_and_si(ymax, _simd_set1_epi32(~255)); + + simdscalari vMaskV = _simd_cmpeq_epi32(ymin, ymax); + vMaskV = _simd_or_si(vMaskH, vMaskV); + cullCenterMask = _simd_movemask_ps(_simd_castsi_ps(vMaskV)); + } + + triMask &= ~cullCenterMask; + + if (origTriMask ^ triMask) + { + RDTSC_EVENT(FECullBetweenCenters, _mm_popcnt_u32(origTriMask ^ triMask), 0); + } + } + + // Intersect with scissor/viewport. Subtract 1 ULP in x.8 fixed point since xmax/ymax edge is exclusive. + // Gather the AOS effective scissor rects based on the per-prim VP index. + /// @todo: Look at speeding this up -- weigh against corresponding costs in rasterizer. + simdscalari scisXmin, scisYmin, scisXmax, scisYmax; + if (state.gsState.emitsViewportArrayIndex) + { + GatherScissors::Gather(&state.scissorsInFixedPoint[0], pViewportIndex, + scisXmin, scisYmin, scisXmax, scisYmax); + } + else // broadcast fast path for non-VPAI case. + { + scisXmin = _simd_set1_epi32(state.scissorsInFixedPoint[0].xmin); + scisYmin = _simd_set1_epi32(state.scissorsInFixedPoint[0].ymin); + scisXmax = _simd_set1_epi32(state.scissorsInFixedPoint[0].xmax); + scisYmax = _simd_set1_epi32(state.scissorsInFixedPoint[0].ymax); + } + + bbox.xmin = _simd_max_epi32(bbox.xmin, scisXmin); + bbox.ymin = _simd_max_epi32(bbox.ymin, scisYmin); + bbox.xmax = _simd_min_epi32(_simd_sub_epi32(bbox.xmax, _simd_set1_epi32(1)), scisXmax); + bbox.ymax = _simd_min_epi32(_simd_sub_epi32(bbox.ymax, _simd_set1_epi32(1)), scisYmax); + + if (CT::IsConservativeT::value) + { + // in the case where a degenerate triangle is on a scissor edge, we need to make sure the primitive bbox has + // some area. Bump the xmax/ymax edges out + simdscalari topEqualsBottom = _simd_cmpeq_epi32(bbox.ymin, bbox.ymax); + bbox.ymax = _simd_blendv_epi32(bbox.ymax, _simd_add_epi32(bbox.ymax, _simd_set1_epi32(1)), topEqualsBottom); + simdscalari leftEqualsRight = _simd_cmpeq_epi32(bbox.xmin, bbox.xmax); + bbox.xmax = _simd_blendv_epi32(bbox.xmax, _simd_add_epi32(bbox.xmax, _simd_set1_epi32(1)), leftEqualsRight); + } + + // Cull tris completely outside scissor + { + simdscalari maskOutsideScissorX = _simd_cmpgt_epi32(bbox.xmin, bbox.xmax); + simdscalari maskOutsideScissorY = _simd_cmpgt_epi32(bbox.ymin, bbox.ymax); + simdscalari maskOutsideScissorXY = _simd_or_si(maskOutsideScissorX, maskOutsideScissorY); + uint32_t maskOutsideScissor = _simd_movemask_ps(_simd_castsi_ps(maskOutsideScissorXY)); + triMask = triMask & ~maskOutsideScissor; + } + + if (!triMask) + { + goto endBinTriangles; + } + + // Convert triangle bbox to macrotile units. + bbox.xmin = _simd_srai_epi32(bbox.xmin, KNOB_MACROTILE_X_DIM_FIXED_SHIFT); + bbox.ymin = _simd_srai_epi32(bbox.ymin, KNOB_MACROTILE_Y_DIM_FIXED_SHIFT); + bbox.xmax = _simd_srai_epi32(bbox.xmax, KNOB_MACROTILE_X_DIM_FIXED_SHIFT); + bbox.ymax = _simd_srai_epi32(bbox.ymax, KNOB_MACROTILE_Y_DIM_FIXED_SHIFT); + + OSALIGNSIMD(uint32_t) aMTLeft[KNOB_SIMD_WIDTH], aMTRight[KNOB_SIMD_WIDTH], aMTTop[KNOB_SIMD_WIDTH], aMTBottom[KNOB_SIMD_WIDTH]; + _simd_store_si((simdscalari*)aMTLeft, bbox.xmin); + _simd_store_si((simdscalari*)aMTRight, bbox.xmax); + _simd_store_si((simdscalari*)aMTTop, bbox.ymin); + _simd_store_si((simdscalari*)aMTBottom, bbox.ymax); + + // transpose verts needed for backend + /// @todo modify BE to take non-transformed verts + __m128 vHorizX[8], vHorizY[8], vHorizZ[8], vHorizW[8]; + vTranspose3x8(vHorizX, tri[0].x, tri[1].x, tri[2].x); + vTranspose3x8(vHorizY, tri[0].y, tri[1].y, tri[2].y); + vTranspose3x8(vHorizZ, tri[0].z, tri[1].z, tri[2].z); + vTranspose3x8(vHorizW, vRecipW0, vRecipW1, vRecipW2); + + // store render target array index + OSALIGNSIMD(uint32_t) aRTAI[KNOB_SIMD_WIDTH]; + if (gsState.gsEnable && gsState.emitsRenderTargetArrayIndex) + { + simdvector vRtai[3]; + pa.Assemble(VERTEX_RTAI_SLOT, vRtai); + simdscalari vRtaii; + vRtaii = _simd_castps_si(vRtai[0].x); + _simd_store_si((simdscalari*)aRTAI, vRtaii); + } + else + { + _simd_store_si((simdscalari*)aRTAI, _simd_setzero_si()); + } + +endBinTriangles: + + // scan remaining valid triangles and bin each separately + while (_BitScanForward(&triIndex, triMask)) + { + uint32_t linkageCount = state.backendState.numAttributes; + uint32_t numScalarAttribs = linkageCount * 4; + + BE_WORK work; + work.type = DRAW; + + bool isDegenerate; + if (CT::IsConservativeT::value) + { + // only rasterize valid edges if we have a degenerate primitive + int32_t triEdgeEnable = (edgeEnable >> (triIndex * 3)) & ALL_EDGES_VALID; + work.pfnWork = GetRasterizerFunc(sampleCount, (rastState.conservativeRast > 0), + (SWR_INPUT_COVERAGE)pDC->pState->state.psState.inputCoverage, triEdgeEnable, + (state.scissorsTileAligned == false)); + + // Degenerate triangles are required to be constant interpolated + isDegenerate = (triEdgeEnable != ALL_EDGES_VALID) ? true : false; + } + else + { + isDegenerate = false; + work.pfnWork = pfnWork; + } + + // Select attribute processor + PFN_PROCESS_ATTRIBUTES pfnProcessAttribs = GetProcessAttributesFunc(3, + state.backendState.swizzleEnable, state.backendState.constantInterpolationMask, isDegenerate); + + TRIANGLE_WORK_DESC &desc = work.desc.tri; + + desc.triFlags.frontFacing = state.forceFront ? 1 : ((frontFaceMask >> triIndex) & 1); + desc.triFlags.primID = pPrimID[triIndex]; + desc.triFlags.renderTargetArrayIndex = aRTAI[triIndex]; + desc.triFlags.viewportIndex = pViewportIndex[triIndex]; + + auto pArena = pDC->pArena; + SWR_ASSERT(pArena != nullptr); + + // store active attribs + float *pAttribs = (float*)pArena->AllocAligned(numScalarAttribs * 3 * sizeof(float), 16); + desc.pAttribs = pAttribs; + desc.numAttribs = linkageCount; + pfnProcessAttribs(pDC, pa, triIndex, pPrimID[triIndex], desc.pAttribs); + + // store triangle vertex data + desc.pTriBuffer = (float*)pArena->AllocAligned(4 * 4 * sizeof(float), 16); + + _mm_store_ps(&desc.pTriBuffer[0], vHorizX[triIndex]); + _mm_store_ps(&desc.pTriBuffer[4], vHorizY[triIndex]); + _mm_store_ps(&desc.pTriBuffer[8], vHorizZ[triIndex]); + _mm_store_ps(&desc.pTriBuffer[12], vHorizW[triIndex]); + + // store user clip distances + if (rastState.clipDistanceMask) + { + uint32_t numClipDist = _mm_popcnt_u32(rastState.clipDistanceMask); + desc.pUserClipBuffer = (float*)pArena->Alloc(numClipDist * 3 * sizeof(float)); + ProcessUserClipDist<3>(pa, triIndex, rastState.clipDistanceMask, &desc.pTriBuffer[12], desc.pUserClipBuffer); + } + + for (uint32_t y = aMTTop[triIndex]; y <= aMTBottom[triIndex]; ++y) + { + for (uint32_t x = aMTLeft[triIndex]; x <= aMTRight[triIndex]; ++x) + { +#if KNOB_ENABLE_TOSS_POINTS + if (!KNOB_TOSS_SETUP_TRIS) +#endif + { + pTileMgr->enqueue(x, y, &work); + } + } + } + triMask &= ~(1 << triIndex); + } + + AR_END(FEBinTriangles, 1); +} + +struct FEBinTrianglesChooser +{ + typedef PFN_PROCESS_PRIMS FuncType; + + template + static FuncType GetFunc() + { + return BinTriangles>; + } +}; + +// Selector for correct templated BinTrinagles function +PFN_PROCESS_PRIMS GetBinTrianglesFunc(bool IsConservative) +{ + return TemplateArgUnroller::GetFunc(IsConservative); +} + + +////////////////////////////////////////////////////////////////////////// +/// @brief Bin SIMD points to the backend. Only supports point size of 1 +/// @param pDC - pointer to draw context. +/// @param pa - The primitive assembly object. +/// @param workerId - thread's worker id. Even thread has a unique id. +/// @param tri - Contains point position data for SIMDs worth of points. +/// @param primID - Primitive ID for each point. +void BinPoints( + DRAW_CONTEXT *pDC, + PA_STATE& pa, + uint32_t workerId, + simdvector prim[3], + uint32_t primMask, + simdscalari primID, + simdscalari viewportIdx) +{ + SWR_CONTEXT *pContext = pDC->pContext; + + AR_BEGIN(FEBinPoints, pDC->drawId); + + simdvector& primVerts = prim[0]; + + const API_STATE& state = GetApiState(pDC); + const SWR_FRONTEND_STATE& feState = state.frontendState; + const SWR_GS_STATE& gsState = state.gsState; + const SWR_RASTSTATE& rastState = state.rastState; + const uint32_t *pViewportIndex = (uint32_t *)&viewportIdx; + + // Select attribute processor + PFN_PROCESS_ATTRIBUTES pfnProcessAttribs = GetProcessAttributesFunc(1, + state.backendState.swizzleEnable, state.backendState.constantInterpolationMask); + + if (!feState.vpTransformDisable) + { + // perspective divide + simdscalar vRecipW0 = _simd_div_ps(_simd_set1_ps(1.0f), primVerts.w); + primVerts.x = _simd_mul_ps(primVerts.x, vRecipW0); + primVerts.y = _simd_mul_ps(primVerts.y, vRecipW0); + primVerts.z = _simd_mul_ps(primVerts.z, vRecipW0); + + // viewport transform to screen coords + if (state.gsState.emitsViewportArrayIndex) + { + viewportTransform<1>(&primVerts, state.vpMatrices, viewportIdx); + } + else + { + viewportTransform<1>(&primVerts, state.vpMatrices); + } + } + + // adjust for pixel center location + simdscalar offset = g_pixelOffsets[rastState.pixelLocation]; + primVerts.x = _simd_add_ps(primVerts.x, offset); + primVerts.y = _simd_add_ps(primVerts.y, offset); + + // convert to fixed point + simdscalari vXi, vYi; + vXi = fpToFixedPointVertical(primVerts.x); + vYi = fpToFixedPointVertical(primVerts.y); + + if (CanUseSimplePoints(pDC)) + { + // adjust for ymin-xmin rule + vXi = _simd_sub_epi32(vXi, _simd_set1_epi32(1)); + vYi = _simd_sub_epi32(vYi, _simd_set1_epi32(1)); + + // cull points off the ymin-xmin edge of the viewport + primMask &= ~_simd_movemask_ps(_simd_castsi_ps(vXi)); + primMask &= ~_simd_movemask_ps(_simd_castsi_ps(vYi)); + + // compute macro tile coordinates + simdscalari macroX = _simd_srai_epi32(vXi, KNOB_MACROTILE_X_DIM_FIXED_SHIFT); + simdscalari macroY = _simd_srai_epi32(vYi, KNOB_MACROTILE_Y_DIM_FIXED_SHIFT); + + OSALIGNSIMD(uint32_t) aMacroX[KNOB_SIMD_WIDTH], aMacroY[KNOB_SIMD_WIDTH]; + _simd_store_si((simdscalari*)aMacroX, macroX); + _simd_store_si((simdscalari*)aMacroY, macroY); + + // compute raster tile coordinates + simdscalari rasterX = _simd_srai_epi32(vXi, KNOB_TILE_X_DIM_SHIFT + FIXED_POINT_SHIFT); + simdscalari rasterY = _simd_srai_epi32(vYi, KNOB_TILE_Y_DIM_SHIFT + FIXED_POINT_SHIFT); + + // compute raster tile relative x,y for coverage mask + simdscalari tileAlignedX = _simd_slli_epi32(rasterX, KNOB_TILE_X_DIM_SHIFT); + simdscalari tileAlignedY = _simd_slli_epi32(rasterY, KNOB_TILE_Y_DIM_SHIFT); + + simdscalari tileRelativeX = _simd_sub_epi32(_simd_srai_epi32(vXi, FIXED_POINT_SHIFT), tileAlignedX); + simdscalari tileRelativeY = _simd_sub_epi32(_simd_srai_epi32(vYi, FIXED_POINT_SHIFT), tileAlignedY); + + OSALIGNSIMD(uint32_t) aTileRelativeX[KNOB_SIMD_WIDTH]; + OSALIGNSIMD(uint32_t) aTileRelativeY[KNOB_SIMD_WIDTH]; + _simd_store_si((simdscalari*)aTileRelativeX, tileRelativeX); + _simd_store_si((simdscalari*)aTileRelativeY, tileRelativeY); + + OSALIGNSIMD(uint32_t) aTileAlignedX[KNOB_SIMD_WIDTH]; + OSALIGNSIMD(uint32_t) aTileAlignedY[KNOB_SIMD_WIDTH]; + _simd_store_si((simdscalari*)aTileAlignedX, tileAlignedX); + _simd_store_si((simdscalari*)aTileAlignedY, tileAlignedY); + + OSALIGNSIMD(float) aZ[KNOB_SIMD_WIDTH]; + _simd_store_ps((float*)aZ, primVerts.z); + + // store render target array index + OSALIGNSIMD(uint32_t) aRTAI[KNOB_SIMD_WIDTH]; + if (gsState.gsEnable && gsState.emitsRenderTargetArrayIndex) + { + simdvector vRtai; + pa.Assemble(VERTEX_RTAI_SLOT, &vRtai); + simdscalari vRtaii = _simd_castps_si(vRtai.x); + _simd_store_si((simdscalari*)aRTAI, vRtaii); + } + else + { + _simd_store_si((simdscalari*)aRTAI, _simd_setzero_si()); + } + + uint32_t *pPrimID = (uint32_t *)&primID; + DWORD primIndex = 0; + + const SWR_BACKEND_STATE& backendState = pDC->pState->state.backendState; + + // scan remaining valid triangles and bin each separately + while (_BitScanForward(&primIndex, primMask)) + { + uint32_t linkageCount = backendState.numAttributes; + uint32_t numScalarAttribs = linkageCount * 4; + + BE_WORK work; + work.type = DRAW; + + TRIANGLE_WORK_DESC &desc = work.desc.tri; + + // points are always front facing + desc.triFlags.frontFacing = 1; + desc.triFlags.primID = pPrimID[primIndex]; + desc.triFlags.renderTargetArrayIndex = aRTAI[primIndex]; + desc.triFlags.viewportIndex = pViewportIndex[primIndex]; + + work.pfnWork = RasterizeSimplePoint; + + auto pArena = pDC->pArena; + SWR_ASSERT(pArena != nullptr); + + // store attributes + float *pAttribs = (float*)pArena->AllocAligned(3 * numScalarAttribs * sizeof(float), 16); + desc.pAttribs = pAttribs; + desc.numAttribs = linkageCount; + + pfnProcessAttribs(pDC, pa, primIndex, pPrimID[primIndex], pAttribs); + + // store raster tile aligned x, y, perspective correct z + float *pTriBuffer = (float*)pArena->AllocAligned(4 * sizeof(float), 16); + desc.pTriBuffer = pTriBuffer; + *(uint32_t*)pTriBuffer++ = aTileAlignedX[primIndex]; + *(uint32_t*)pTriBuffer++ = aTileAlignedY[primIndex]; + *pTriBuffer = aZ[primIndex]; + + uint32_t tX = aTileRelativeX[primIndex]; + uint32_t tY = aTileRelativeY[primIndex]; + + // pack the relative x,y into the coverageMask, the rasterizer will + // generate the true coverage mask from it + work.desc.tri.triFlags.coverageMask = tX | (tY << 4); + + // bin it + MacroTileMgr *pTileMgr = pDC->pTileMgr; +#if KNOB_ENABLE_TOSS_POINTS + if (!KNOB_TOSS_SETUP_TRIS) +#endif + { + pTileMgr->enqueue(aMacroX[primIndex], aMacroY[primIndex], &work); + } + primMask &= ~(1 << primIndex); + } + } + else + { + // non simple points need to be potentially binned to multiple macro tiles + simdscalar vPointSize; + if (rastState.pointParam) + { + simdvector size[3]; + pa.Assemble(VERTEX_POINT_SIZE_SLOT, size); + vPointSize = size[0].x; + } + else + { + vPointSize = _simd_set1_ps(rastState.pointSize); + } + + // bloat point to bbox + simdBBox bbox; + bbox.xmin = bbox.xmax = vXi; + bbox.ymin = bbox.ymax = vYi; + + simdscalar vHalfWidth = _simd_mul_ps(vPointSize, _simd_set1_ps(0.5f)); + simdscalari vHalfWidthi = fpToFixedPointVertical(vHalfWidth); + bbox.xmin = _simd_sub_epi32(bbox.xmin, vHalfWidthi); + bbox.xmax = _simd_add_epi32(bbox.xmax, vHalfWidthi); + bbox.ymin = _simd_sub_epi32(bbox.ymin, vHalfWidthi); + bbox.ymax = _simd_add_epi32(bbox.ymax, vHalfWidthi); + + // Intersect with scissor/viewport. Subtract 1 ULP in x.8 fixed point since xmax/ymax edge is exclusive. + // Gather the AOS effective scissor rects based on the per-prim VP index. + /// @todo: Look at speeding this up -- weigh against corresponding costs in rasterizer. + simdscalari scisXmin, scisYmin, scisXmax, scisYmax; + if (state.gsState.emitsViewportArrayIndex) + { + GatherScissors::Gather(&state.scissorsInFixedPoint[0], pViewportIndex, + scisXmin, scisYmin, scisXmax, scisYmax); + } + else // broadcast fast path for non-VPAI case. + { + scisXmin = _simd_set1_epi32(state.scissorsInFixedPoint[0].xmin); + scisYmin = _simd_set1_epi32(state.scissorsInFixedPoint[0].ymin); + scisXmax = _simd_set1_epi32(state.scissorsInFixedPoint[0].xmax); + scisYmax = _simd_set1_epi32(state.scissorsInFixedPoint[0].ymax); + } + + bbox.xmin = _simd_max_epi32(bbox.xmin, scisXmin); + bbox.ymin = _simd_max_epi32(bbox.ymin, scisYmin); + bbox.xmax = _simd_min_epi32(_simd_sub_epi32(bbox.xmax, _simd_set1_epi32(1)), scisXmax); + bbox.ymax = _simd_min_epi32(_simd_sub_epi32(bbox.ymax, _simd_set1_epi32(1)), scisYmax); + + // Cull bloated points completely outside scissor + simdscalari maskOutsideScissorX = _simd_cmpgt_epi32(bbox.xmin, bbox.xmax); + simdscalari maskOutsideScissorY = _simd_cmpgt_epi32(bbox.ymin, bbox.ymax); + simdscalari maskOutsideScissorXY = _simd_or_si(maskOutsideScissorX, maskOutsideScissorY); + uint32_t maskOutsideScissor = _simd_movemask_ps(_simd_castsi_ps(maskOutsideScissorXY)); + primMask = primMask & ~maskOutsideScissor; + + // Convert bbox to macrotile units. + bbox.xmin = _simd_srai_epi32(bbox.xmin, KNOB_MACROTILE_X_DIM_FIXED_SHIFT); + bbox.ymin = _simd_srai_epi32(bbox.ymin, KNOB_MACROTILE_Y_DIM_FIXED_SHIFT); + bbox.xmax = _simd_srai_epi32(bbox.xmax, KNOB_MACROTILE_X_DIM_FIXED_SHIFT); + bbox.ymax = _simd_srai_epi32(bbox.ymax, KNOB_MACROTILE_Y_DIM_FIXED_SHIFT); + + OSALIGNSIMD(uint32_t) aMTLeft[KNOB_SIMD_WIDTH], aMTRight[KNOB_SIMD_WIDTH], aMTTop[KNOB_SIMD_WIDTH], aMTBottom[KNOB_SIMD_WIDTH]; + _simd_store_si((simdscalari*)aMTLeft, bbox.xmin); + _simd_store_si((simdscalari*)aMTRight, bbox.xmax); + _simd_store_si((simdscalari*)aMTTop, bbox.ymin); + _simd_store_si((simdscalari*)aMTBottom, bbox.ymax); + + // store render target array index + OSALIGNSIMD(uint32_t) aRTAI[KNOB_SIMD_WIDTH]; + if (gsState.gsEnable && gsState.emitsRenderTargetArrayIndex) + { + simdvector vRtai[2]; + pa.Assemble(VERTEX_RTAI_SLOT, vRtai); + simdscalari vRtaii = _simd_castps_si(vRtai[0].x); + _simd_store_si((simdscalari*)aRTAI, vRtaii); + } + else + { + _simd_store_si((simdscalari*)aRTAI, _simd_setzero_si()); + } + + OSALIGNSIMD(float) aPointSize[KNOB_SIMD_WIDTH]; + _simd_store_ps((float*)aPointSize, vPointSize); + + uint32_t *pPrimID = (uint32_t *)&primID; + + OSALIGNSIMD(float) aPrimVertsX[KNOB_SIMD_WIDTH]; + OSALIGNSIMD(float) aPrimVertsY[KNOB_SIMD_WIDTH]; + OSALIGNSIMD(float) aPrimVertsZ[KNOB_SIMD_WIDTH]; + + _simd_store_ps((float*)aPrimVertsX, primVerts.x); + _simd_store_ps((float*)aPrimVertsY, primVerts.y); + _simd_store_ps((float*)aPrimVertsZ, primVerts.z); + + // scan remaining valid prims and bin each separately + const SWR_BACKEND_STATE& backendState = state.backendState; + DWORD primIndex; + while (_BitScanForward(&primIndex, primMask)) + { + uint32_t linkageCount = backendState.numAttributes; + uint32_t numScalarAttribs = linkageCount * 4; + + BE_WORK work; + work.type = DRAW; + + TRIANGLE_WORK_DESC &desc = work.desc.tri; + + desc.triFlags.frontFacing = 1; + desc.triFlags.primID = pPrimID[primIndex]; + desc.triFlags.pointSize = aPointSize[primIndex]; + desc.triFlags.renderTargetArrayIndex = aRTAI[primIndex]; + desc.triFlags.viewportIndex = pViewportIndex[primIndex]; + + work.pfnWork = RasterizeTriPoint; + + auto pArena = pDC->pArena; + SWR_ASSERT(pArena != nullptr); + + // store active attribs + desc.pAttribs = (float*)pArena->AllocAligned(numScalarAttribs * 3 * sizeof(float), 16); + desc.numAttribs = linkageCount; + pfnProcessAttribs(pDC, pa, primIndex, pPrimID[primIndex], desc.pAttribs); + + // store point vertex data + float *pTriBuffer = (float*)pArena->AllocAligned(4 * sizeof(float), 16); + desc.pTriBuffer = pTriBuffer; + *pTriBuffer++ = aPrimVertsX[primIndex]; + *pTriBuffer++ = aPrimVertsY[primIndex]; + *pTriBuffer = aPrimVertsZ[primIndex]; + + // store user clip distances + if (rastState.clipDistanceMask) + { + uint32_t numClipDist = _mm_popcnt_u32(rastState.clipDistanceMask); + desc.pUserClipBuffer = (float*)pArena->Alloc(numClipDist * 3 * sizeof(float)); + float dists[8]; + float one = 1.0f; + ProcessUserClipDist<1>(pa, primIndex, rastState.clipDistanceMask, &one, dists); + for (uint32_t i = 0; i < numClipDist; i++) { + desc.pUserClipBuffer[3*i + 0] = 0.0f; + desc.pUserClipBuffer[3*i + 1] = 0.0f; + desc.pUserClipBuffer[3*i + 2] = dists[i]; + } + } + + MacroTileMgr *pTileMgr = pDC->pTileMgr; + for (uint32_t y = aMTTop[primIndex]; y <= aMTBottom[primIndex]; ++y) + { + for (uint32_t x = aMTLeft[primIndex]; x <= aMTRight[primIndex]; ++x) + { +#if KNOB_ENABLE_TOSS_POINTS + if (!KNOB_TOSS_SETUP_TRIS) +#endif + { + pTileMgr->enqueue(x, y, &work); + } + } + } + + primMask &= ~(1 << primIndex); + } + } + + AR_END(FEBinPoints, 1); +} + +////////////////////////////////////////////////////////////////////////// +/// @brief Bin SIMD lines to the backend. +/// @param pDC - pointer to draw context. +/// @param pa - The primitive assembly object. +/// @param workerId - thread's worker id. Even thread has a unique id. +/// @param tri - Contains line position data for SIMDs worth of points. +/// @param primID - Primitive ID for each line. +/// @param viewportIdx - Viewport Array Index for each line. +void BinPostSetupLines( + DRAW_CONTEXT *pDC, + PA_STATE& pa, + uint32_t workerId, + simdvector prim[], + simdscalar recipW[], + uint32_t primMask, + simdscalari primID, + simdscalari viewportIdx) +{ + SWR_CONTEXT *pContext = pDC->pContext; + + AR_BEGIN(FEBinLines, pDC->drawId); + + const API_STATE& state = GetApiState(pDC); + const SWR_RASTSTATE& rastState = state.rastState; + const SWR_FRONTEND_STATE& feState = state.frontendState; + const SWR_GS_STATE& gsState = state.gsState; + + // Select attribute processor + PFN_PROCESS_ATTRIBUTES pfnProcessAttribs = GetProcessAttributesFunc(2, + state.backendState.swizzleEnable, state.backendState.constantInterpolationMask); + + simdscalar& vRecipW0 = recipW[0]; + simdscalar& vRecipW1 = recipW[1]; + + // convert to fixed point + simdscalari vXi[2], vYi[2]; + vXi[0] = fpToFixedPointVertical(prim[0].x); + vYi[0] = fpToFixedPointVertical(prim[0].y); + vXi[1] = fpToFixedPointVertical(prim[1].x); + vYi[1] = fpToFixedPointVertical(prim[1].y); + + // compute x-major vs y-major mask + simdscalari xLength = _simd_abs_epi32(_simd_sub_epi32(vXi[0], vXi[1])); + simdscalari yLength = _simd_abs_epi32(_simd_sub_epi32(vYi[0], vYi[1])); + simdscalar vYmajorMask = _simd_castsi_ps(_simd_cmpgt_epi32(yLength, xLength)); + uint32_t yMajorMask = _simd_movemask_ps(vYmajorMask); + + // cull zero-length lines + simdscalari vZeroLengthMask = _simd_cmpeq_epi32(xLength, _simd_setzero_si()); + vZeroLengthMask = _simd_and_si(vZeroLengthMask, _simd_cmpeq_epi32(yLength, _simd_setzero_si())); + + primMask &= ~_simd_movemask_ps(_simd_castsi_ps(vZeroLengthMask)); + + uint32_t *pPrimID = (uint32_t *)&primID; + const uint32_t *pViewportIndex = (uint32_t *)&viewportIdx; + + simdscalar vUnused = _simd_setzero_ps(); + + // Calc bounding box of lines + simdBBox bbox; + bbox.xmin = _simd_min_epi32(vXi[0], vXi[1]); + bbox.xmax = _simd_max_epi32(vXi[0], vXi[1]); + bbox.ymin = _simd_min_epi32(vYi[0], vYi[1]); + bbox.ymax = _simd_max_epi32(vYi[0], vYi[1]); + + // bloat bbox by line width along minor axis + simdscalar vHalfWidth = _simd_set1_ps(rastState.lineWidth / 2.0f); + simdscalari vHalfWidthi = fpToFixedPointVertical(vHalfWidth); + simdBBox bloatBox; + bloatBox.xmin = _simd_sub_epi32(bbox.xmin, vHalfWidthi); + bloatBox.xmax = _simd_add_epi32(bbox.xmax, vHalfWidthi); + bloatBox.ymin = _simd_sub_epi32(bbox.ymin, vHalfWidthi); + bloatBox.ymax = _simd_add_epi32(bbox.ymax, vHalfWidthi); + + bbox.xmin = _simd_blendv_epi32(bbox.xmin, bloatBox.xmin, vYmajorMask); + bbox.xmax = _simd_blendv_epi32(bbox.xmax, bloatBox.xmax, vYmajorMask); + bbox.ymin = _simd_blendv_epi32(bloatBox.ymin, bbox.ymin, vYmajorMask); + bbox.ymax = _simd_blendv_epi32(bloatBox.ymax, bbox.ymax, vYmajorMask); + + // Intersect with scissor/viewport. Subtract 1 ULP in x.8 fixed point since xmax/ymax edge is exclusive. + simdscalari scisXmin, scisYmin, scisXmax, scisYmax; + if (state.gsState.emitsViewportArrayIndex) + { + GatherScissors::Gather(&state.scissorsInFixedPoint[0], pViewportIndex, + scisXmin, scisYmin, scisXmax, scisYmax); + } + else // broadcast fast path for non-VPAI case. + { + scisXmin = _simd_set1_epi32(state.scissorsInFixedPoint[0].xmin); + scisYmin = _simd_set1_epi32(state.scissorsInFixedPoint[0].ymin); + scisXmax = _simd_set1_epi32(state.scissorsInFixedPoint[0].xmax); + scisYmax = _simd_set1_epi32(state.scissorsInFixedPoint[0].ymax); + } + + bbox.xmin = _simd_max_epi32(bbox.xmin, scisXmin); + bbox.ymin = _simd_max_epi32(bbox.ymin, scisYmin); + bbox.xmax = _simd_min_epi32(_simd_sub_epi32(bbox.xmax, _simd_set1_epi32(1)), scisXmax); + bbox.ymax = _simd_min_epi32(_simd_sub_epi32(bbox.ymax, _simd_set1_epi32(1)), scisYmax); + + // Cull prims completely outside scissor + { + simdscalari maskOutsideScissorX = _simd_cmpgt_epi32(bbox.xmin, bbox.xmax); + simdscalari maskOutsideScissorY = _simd_cmpgt_epi32(bbox.ymin, bbox.ymax); + simdscalari maskOutsideScissorXY = _simd_or_si(maskOutsideScissorX, maskOutsideScissorY); + uint32_t maskOutsideScissor = _simd_movemask_ps(_simd_castsi_ps(maskOutsideScissorXY)); + primMask = primMask & ~maskOutsideScissor; + } + + if (!primMask) + { + goto endBinLines; + } + + // Convert triangle bbox to macrotile units. + bbox.xmin = _simd_srai_epi32(bbox.xmin, KNOB_MACROTILE_X_DIM_FIXED_SHIFT); + bbox.ymin = _simd_srai_epi32(bbox.ymin, KNOB_MACROTILE_Y_DIM_FIXED_SHIFT); + bbox.xmax = _simd_srai_epi32(bbox.xmax, KNOB_MACROTILE_X_DIM_FIXED_SHIFT); + bbox.ymax = _simd_srai_epi32(bbox.ymax, KNOB_MACROTILE_Y_DIM_FIXED_SHIFT); + + OSALIGNSIMD(uint32_t) aMTLeft[KNOB_SIMD_WIDTH], aMTRight[KNOB_SIMD_WIDTH], aMTTop[KNOB_SIMD_WIDTH], aMTBottom[KNOB_SIMD_WIDTH]; + _simd_store_si((simdscalari*)aMTLeft, bbox.xmin); + _simd_store_si((simdscalari*)aMTRight, bbox.xmax); + _simd_store_si((simdscalari*)aMTTop, bbox.ymin); + _simd_store_si((simdscalari*)aMTBottom, bbox.ymax); + + // transpose verts needed for backend + /// @todo modify BE to take non-transformed verts + __m128 vHorizX[8], vHorizY[8], vHorizZ[8], vHorizW[8]; + vTranspose3x8(vHorizX, prim[0].x, prim[1].x, vUnused); + vTranspose3x8(vHorizY, prim[0].y, prim[1].y, vUnused); + vTranspose3x8(vHorizZ, prim[0].z, prim[1].z, vUnused); + vTranspose3x8(vHorizW, vRecipW0, vRecipW1, vUnused); + + // store render target array index + OSALIGNSIMD(uint32_t) aRTAI[KNOB_SIMD_WIDTH]; + if (gsState.gsEnable && gsState.emitsRenderTargetArrayIndex) + { + simdvector vRtai[2]; + pa.Assemble(VERTEX_RTAI_SLOT, vRtai); + simdscalari vRtaii = _simd_castps_si(vRtai[0].x); + _simd_store_si((simdscalari*)aRTAI, vRtaii); + } + else + { + _simd_store_si((simdscalari*)aRTAI, _simd_setzero_si()); + } + + // scan remaining valid prims and bin each separately + DWORD primIndex; + while (_BitScanForward(&primIndex, primMask)) + { + uint32_t linkageCount = state.backendState.numAttributes; + uint32_t numScalarAttribs = linkageCount * 4; + + BE_WORK work; + work.type = DRAW; + + TRIANGLE_WORK_DESC &desc = work.desc.tri; + + desc.triFlags.frontFacing = 1; + desc.triFlags.primID = pPrimID[primIndex]; + desc.triFlags.yMajor = (yMajorMask >> primIndex) & 1; + desc.triFlags.renderTargetArrayIndex = aRTAI[primIndex]; + desc.triFlags.viewportIndex = pViewportIndex[primIndex]; + + work.pfnWork = RasterizeLine; + + auto pArena = pDC->pArena; + SWR_ASSERT(pArena != nullptr); + + // store active attribs + desc.pAttribs = (float*)pArena->AllocAligned(numScalarAttribs * 3 * sizeof(float), 16); + desc.numAttribs = linkageCount; + pfnProcessAttribs(pDC, pa, primIndex, pPrimID[primIndex], desc.pAttribs); + + // store line vertex data + desc.pTriBuffer = (float*)pArena->AllocAligned(4 * 4 * sizeof(float), 16); + _mm_store_ps(&desc.pTriBuffer[0], vHorizX[primIndex]); + _mm_store_ps(&desc.pTriBuffer[4], vHorizY[primIndex]); + _mm_store_ps(&desc.pTriBuffer[8], vHorizZ[primIndex]); + _mm_store_ps(&desc.pTriBuffer[12], vHorizW[primIndex]); + + // store user clip distances + if (rastState.clipDistanceMask) + { + uint32_t numClipDist = _mm_popcnt_u32(rastState.clipDistanceMask); + desc.pUserClipBuffer = (float*)pArena->Alloc(numClipDist * 2 * sizeof(float)); + ProcessUserClipDist<2>(pa, primIndex, rastState.clipDistanceMask, &desc.pTriBuffer[12], desc.pUserClipBuffer); + } + + MacroTileMgr *pTileMgr = pDC->pTileMgr; + for (uint32_t y = aMTTop[primIndex]; y <= aMTBottom[primIndex]; ++y) + { + for (uint32_t x = aMTLeft[primIndex]; x <= aMTRight[primIndex]; ++x) + { +#if KNOB_ENABLE_TOSS_POINTS + if (!KNOB_TOSS_SETUP_TRIS) +#endif + { + pTileMgr->enqueue(x, y, &work); + } + } + } + + primMask &= ~(1 << primIndex); + } + +endBinLines: + + AR_END(FEBinLines, 1); +} + +////////////////////////////////////////////////////////////////////////// +/// @brief Bin SIMD lines to the backend. +/// @param pDC - pointer to draw context. +/// @param pa - The primitive assembly object. +/// @param workerId - thread's worker id. Even thread has a unique id. +/// @param tri - Contains line position data for SIMDs worth of points. +/// @param primID - Primitive ID for each line. +/// @param viewportIdx - Viewport Array Index for each line. +void BinLines( + DRAW_CONTEXT *pDC, + PA_STATE& pa, + uint32_t workerId, + simdvector prim[], + uint32_t primMask, + simdscalari primID, + simdscalari viewportIdx) +{ + SWR_CONTEXT *pContext = pDC->pContext; + + const API_STATE& state = GetApiState(pDC); + const SWR_RASTSTATE& rastState = state.rastState; + const SWR_FRONTEND_STATE& feState = state.frontendState; + const SWR_GS_STATE& gsState = state.gsState; + + // Select attribute processor + PFN_PROCESS_ATTRIBUTES pfnProcessAttribs = GetProcessAttributesFunc(2, + state.backendState.swizzleEnable, state.backendState.constantInterpolationMask); + + simdscalar vRecipW[2] = { _simd_set1_ps(1.0f), _simd_set1_ps(1.0f) }; + + if (!feState.vpTransformDisable) + { + // perspective divide + vRecipW[0] = _simd_div_ps(_simd_set1_ps(1.0f), prim[0].w); + vRecipW[1] = _simd_div_ps(_simd_set1_ps(1.0f), prim[1].w); + + prim[0].v[0] = _simd_mul_ps(prim[0].v[0], vRecipW[0]); + prim[1].v[0] = _simd_mul_ps(prim[1].v[0], vRecipW[1]); + + prim[0].v[1] = _simd_mul_ps(prim[0].v[1], vRecipW[0]); + prim[1].v[1] = _simd_mul_ps(prim[1].v[1], vRecipW[1]); + + prim[0].v[2] = _simd_mul_ps(prim[0].v[2], vRecipW[0]); + prim[1].v[2] = _simd_mul_ps(prim[1].v[2], vRecipW[1]); + + // viewport transform to screen coords + if (state.gsState.emitsViewportArrayIndex) + { + viewportTransform<2>(prim, state.vpMatrices, viewportIdx); + } + else + { + viewportTransform<2>(prim, state.vpMatrices); + } + } + + // adjust for pixel center location + simdscalar offset = g_pixelOffsets[rastState.pixelLocation]; + prim[0].x = _simd_add_ps(prim[0].x, offset); + prim[0].y = _simd_add_ps(prim[0].y, offset); + + prim[1].x = _simd_add_ps(prim[1].x, offset); + prim[1].y = _simd_add_ps(prim[1].y, offset); + + BinPostSetupLines( + pDC, + pa, + workerId, + prim, + vRecipW, + primMask, + primID, + viewportIdx); +} diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/clip.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/clip.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/clip.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/clip.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -179,26 +179,29 @@ return; } -void ClipTriangles(DRAW_CONTEXT *pDC, PA_STATE& pa, uint32_t workerId, simdvector prims[], uint32_t primMask, simdscalari primId) +void ClipTriangles(DRAW_CONTEXT *pDC, PA_STATE& pa, uint32_t workerId, simdvector prims[], uint32_t primMask, simdscalari primId, simdscalari viewportIdx) { - RDTSC_START(FEClipTriangles); + SWR_CONTEXT *pContext = pDC->pContext; + AR_BEGIN(FEClipTriangles, pDC->drawId); Clipper<3> clipper(workerId, pDC); - clipper.ExecuteStage(pa, prims, primMask, primId); - RDTSC_STOP(FEClipTriangles, 1, 0); + clipper.ExecuteStage(pa, prims, primMask, primId, viewportIdx); + AR_END(FEClipTriangles, 1); } -void ClipLines(DRAW_CONTEXT *pDC, PA_STATE& pa, uint32_t workerId, simdvector prims[], uint32_t primMask, simdscalari primId) +void ClipLines(DRAW_CONTEXT *pDC, PA_STATE& pa, uint32_t workerId, simdvector prims[], uint32_t primMask, simdscalari primId, simdscalari viewportIdx) { - RDTSC_START(FEClipLines); + SWR_CONTEXT *pContext = pDC->pContext; + AR_BEGIN(FEClipLines, pDC->drawId); Clipper<2> clipper(workerId, pDC); - clipper.ExecuteStage(pa, prims, primMask, primId); - RDTSC_STOP(FEClipLines, 1, 0); + clipper.ExecuteStage(pa, prims, primMask, primId, viewportIdx); + AR_END(FEClipLines, 1); } -void ClipPoints(DRAW_CONTEXT *pDC, PA_STATE& pa, uint32_t workerId, simdvector prims[], uint32_t primMask, simdscalari primId) +void ClipPoints(DRAW_CONTEXT *pDC, PA_STATE& pa, uint32_t workerId, simdvector prims[], uint32_t primMask, simdscalari primId, simdscalari viewportIdx) { - RDTSC_START(FEClipPoints); + SWR_CONTEXT *pContext = pDC->pContext; + AR_BEGIN(FEClipPoints, pDC->drawId); Clipper<1> clipper(workerId, pDC); - clipper.ExecuteStage(pa, prims, primMask, primId); - RDTSC_STOP(FEClipPoints, 1, 0); + clipper.ExecuteStage(pa, prims, primMask, primId, viewportIdx); + AR_END(FEClipPoints, 1); } diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/clip.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/clip.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/clip.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/clip.h 2017-06-01 10:37:10.000000000 +0000 @@ -63,7 +63,7 @@ int *numVerts, float *pOutAttribs); INLINE -void ComputeClipCodes(DRIVER_TYPE type, const API_STATE& state, const simdvector& vertex, simdscalar& clipCodes) +void ComputeClipCodes(const API_STATE& state, const simdvector& vertex, simdscalar& clipCodes, simdscalari viewportIndexes) { clipCodes = _simd_setzero_ps(); @@ -90,7 +90,7 @@ { // FRUSTUM_NEAR // DX clips depth [0..w], GL clips [-w..w] - if (type == DX) + if (state.rastState.clipHalfZ) { vRes = _simd_cmplt_ps(vertex.z, _simd_setzero_ps()); } @@ -110,22 +110,22 @@ clipCodes = _simd_or_ps(clipCodes, _simd_and_ps(vRes, _simd_castsi_ps(_simd_set1_epi32(NEGW)))); // GUARDBAND_LEFT - simdscalar gbMult = _simd_mul_ps(vNegW, _simd_set1_ps(state.gbState.left)); + simdscalar gbMult = _simd_mul_ps(vNegW, _simd_i32gather_ps(&state.gbState.left[0], viewportIndexes, 4)); vRes = _simd_cmplt_ps(vertex.x, gbMult); clipCodes = _simd_or_ps(clipCodes, _simd_and_ps(vRes, _simd_castsi_ps(_simd_set1_epi32(GUARDBAND_LEFT)))); // GUARDBAND_TOP - gbMult = _simd_mul_ps(vNegW, _simd_set1_ps(state.gbState.top)); + gbMult = _simd_mul_ps(vNegW, _simd_i32gather_ps(&state.gbState.top[0], viewportIndexes, 4)); vRes = _simd_cmplt_ps(vertex.y, gbMult); clipCodes = _simd_or_ps(clipCodes, _simd_and_ps(vRes, _simd_castsi_ps(_simd_set1_epi32(GUARDBAND_TOP)))); // GUARDBAND_RIGHT - gbMult = _simd_mul_ps(vertex.w, _simd_set1_ps(state.gbState.right)); + gbMult = _simd_mul_ps(vertex.w, _simd_i32gather_ps(&state.gbState.right[0], viewportIndexes, 4)); vRes = _simd_cmpgt_ps(vertex.x, gbMult); clipCodes = _simd_or_ps(clipCodes, _simd_and_ps(vRes, _simd_castsi_ps(_simd_set1_epi32(GUARDBAND_RIGHT)))); // GUARDBAND_BOTTOM - gbMult = _simd_mul_ps(vertex.w, _simd_set1_ps(state.gbState.bottom)); + gbMult = _simd_mul_ps(vertex.w, _simd_i32gather_ps(&state.gbState.bottom[0], viewportIndexes, 4)); vRes = _simd_cmpgt_ps(vertex.y, gbMult); clipCodes = _simd_or_ps(clipCodes, _simd_and_ps(vRes, _simd_castsi_ps(_simd_set1_epi32(GUARDBAND_BOTTOM)))); } @@ -135,16 +135,16 @@ { public: Clipper(uint32_t in_workerId, DRAW_CONTEXT* in_pDC) : - workerId(in_workerId), driverType(in_pDC->pContext->driverType), pDC(in_pDC), state(GetApiState(in_pDC)) + workerId(in_workerId), pDC(in_pDC), state(GetApiState(in_pDC)) { static_assert(NumVertsPerPrim >= 1 && NumVertsPerPrim <= 3, "Invalid NumVertsPerPrim"); } - void ComputeClipCodes(simdvector vertex[]) + void ComputeClipCodes(simdvector vertex[], simdscalari viewportIndexes) { for (uint32_t i = 0; i < NumVertsPerPrim; ++i) { - ::ComputeClipCodes(this->driverType, this->state, vertex[i], this->clipCodes[i]); + ::ComputeClipCodes(this->state, vertex[i], this->clipCodes[i], viewportIndexes); } } @@ -262,47 +262,8 @@ return _simd_movemask_ps(vClipCullMask); } - // clip a single primitive - int ClipScalar(PA_STATE& pa, uint32_t primIndex, float* pOutPos, float* pOutAttribs) - { - OSALIGNSIMD(float) inVerts[3 * 4]; - OSALIGNSIMD(float) inAttribs[3 * KNOB_NUM_ATTRIBUTES * 4]; - - // transpose primitive position - __m128 verts[3]; - pa.AssembleSingle(VERTEX_POSITION_SLOT, primIndex, verts); - _mm_store_ps(&inVerts[0], verts[0]); - _mm_store_ps(&inVerts[4], verts[1]); - _mm_store_ps(&inVerts[8], verts[2]); - - // transpose attribs - uint32_t numScalarAttribs = this->state.linkageCount * 4; - - int idx = 0; - DWORD slot = 0; - uint32_t mapIdx = 0; - uint32_t tmpLinkage = uint32_t(this->state.linkageMask); - while (_BitScanForward(&slot, tmpLinkage)) - { - tmpLinkage &= ~(1 << slot); - // Compute absolute attrib slot in vertex array - uint32_t inputSlot = VERTEX_ATTRIB_START_SLOT + this->state.linkageMap[mapIdx++]; - __m128 attrib[3]; // triangle attribs (always 4 wide) - pa.AssembleSingle(inputSlot, primIndex, attrib); - _mm_store_ps(&inAttribs[idx], attrib[0]); - _mm_store_ps(&inAttribs[idx + numScalarAttribs], attrib[1]); - _mm_store_ps(&inAttribs[idx + numScalarAttribs * 2], attrib[2]); - idx += 4; - } - - int numVerts; - Clip(inVerts, inAttribs, numScalarAttribs, pOutPos, &numVerts, pOutAttribs); - - return numVerts; - } - // clip SIMD primitives - void ClipSimd(const simdscalar& vPrimMask, const simdscalar& vClipMask, PA_STATE& pa, const simdscalari& vPrimId) + void ClipSimd(const simdscalar& vPrimMask, const simdscalar& vClipMask, PA_STATE& pa, const simdscalari& vPrimId, const simdscalari& vViewportIdx) { // input/output vertex store for clipper simdvertex vertices[7]; // maximum 7 verts generated per triangle @@ -324,16 +285,13 @@ } // assemble attribs - DWORD slot = 0; - uint32_t mapIdx = 0; - uint32_t tmpLinkage = this->state.linkageMask; + const SWR_BACKEND_STATE& backendState = this->state.backendState; int32_t maxSlot = -1; - while (_BitScanForward(&slot, tmpLinkage)) + for (uint32_t slot = 0; slot < backendState.numAttributes; ++slot) { - tmpLinkage &= ~(1 << slot); // Compute absolute attrib slot in vertex array - uint32_t mapSlot = this->state.linkageMap[mapIdx++]; + uint32_t mapSlot = backendState.swizzleEnable ? backendState.swizzleMap[slot].sourceAttrib : slot; maxSlot = std::max(maxSlot, mapSlot); uint32_t inputSlot = VERTEX_ATTRIB_START_SLOT + mapSlot; @@ -385,12 +343,13 @@ PRIMITIVE_TOPOLOGY clipTopology = TOP_UNKNOWN; if (NumVertsPerPrim == 3) { - pfnBinFunc = BinTriangles; + pfnBinFunc = GetBinTrianglesFunc((pa.pDC->pState->state.rastState.conservativeRast > 0)); clipTopology = TOP_TRIANGLE_FAN; // so that the binner knows to bloat wide points later if (pa.binTopology == TOP_POINT_LIST) clipTopology = TOP_POINT_LIST; + } else if (NumVertsPerPrim == 2) { @@ -402,9 +361,9 @@ SWR_ASSERT(0 && "Unexpected points in clipper."); } - uint32_t* pVertexCount = (uint32_t*)&vNumClippedVerts; uint32_t* pPrimitiveId = (uint32_t*)&vPrimId; + uint32_t* pViewportIdx = (uint32_t*)&vViewportIdx; const simdscalari vOffsets = _mm256_set_epi32( 0 * sizeof(simdvertex), // unused lane @@ -490,20 +449,22 @@ if (assemble) { static const uint32_t primMaskMap[] = { 0x0, 0x1, 0x3, 0x7, 0xf, 0x1f, 0x3f, 0x7f, 0xff }; - pfnBinFunc(this->pDC, clipPa, this->workerId, attrib, primMaskMap[numEmittedPrims], _simd_set1_epi32(pPrimitiveId[inputPrim])); + pfnBinFunc(this->pDC, clipPa, this->workerId, attrib, primMaskMap[numEmittedPrims], _simd_set1_epi32(pPrimitiveId[inputPrim]), _simd_set1_epi32(pViewportIdx[inputPrim])); } } while (clipPa.NextPrim()); } } // update global pipeline stat - SWR_CONTEXT* pContext = this->pDC->pContext; - UPDATE_STAT(CPrimitives, numClippedPrims); + UPDATE_STAT_FE(CPrimitives, numClippedPrims); } // execute the clipper stage - void ExecuteStage(PA_STATE& pa, simdvector prim[], uint32_t primMask, simdscalari primId) + void ExecuteStage(PA_STATE& pa, simdvector prim[], uint32_t primMask, simdscalari primId, simdscalari viewportIdx) { + SWR_ASSERT(pa.pDC != nullptr); + SWR_CONTEXT* pContext = pa.pDC->pContext; + // set up binner based on PA state PFN_PROCESS_PRIMS pfnBinner; switch (pa.binTopology) @@ -519,16 +480,15 @@ pfnBinner = BinLines; break; default: - pfnBinner = BinTriangles; + pfnBinner = GetBinTrianglesFunc((pa.pDC->pState->state.rastState.conservativeRast > 0)); break; }; // update clipper invocations pipeline stat - SWR_CONTEXT* pContext = this->pDC->pContext; uint32_t numInvoc = _mm_popcnt_u32(primMask); - UPDATE_STAT(CInvocations, numInvoc); + UPDATE_STAT_FE(CInvocations, numInvoc); - ComputeClipCodes(prim); + ComputeClipCodes(prim, viewportIdx); // cull prims with NAN coords primMask &= ~ComputeNaNMask(prim); @@ -552,20 +512,19 @@ if (clipMask) { - RDTSC_START(FEGuardbandClip); + AR_BEGIN(FEGuardbandClip, pa.pDC->drawId); // we have to clip tris, execute the clipper, which will also // call the binner - ClipSimd(vMask(primMask), vMask(clipMask), pa, primId); - RDTSC_STOP(FEGuardbandClip, 1, 0); + ClipSimd(vMask(primMask), vMask(clipMask), pa, primId, viewportIdx); + AR_END(FEGuardbandClip, 1); } else if (validMask) { // update CPrimitives pipeline state - SWR_CONTEXT* pContext = this->pDC->pContext; - UPDATE_STAT(CPrimitives, _mm_popcnt_u32(validMask)); + UPDATE_STAT_FE(CPrimitives, _mm_popcnt_u32(validMask)); // forward valid prims directly to binner - pfnBinner(this->pDC, pa, this->workerId, prim, validMask, primId); + pfnBinner(this->pDC, pa, this->workerId, prim, validMask, primId, viewportIdx); } } @@ -641,7 +600,7 @@ case FRUSTUM_BOTTOM: t = ComputeInterpFactor(_simd_sub_ps(v1[3], v1[1]), _simd_sub_ps(v2[3], v2[1])); break; case FRUSTUM_NEAR: // DX Znear plane is 0, GL is -w - if (this->driverType == DX) + if (this->state.rastState.clipHalfZ) { t = ComputeInterpFactor(v1[2], v2[2]); } @@ -709,7 +668,7 @@ case FRUSTUM_RIGHT: return _simd_cmple_ps(v[0], v[3]); case FRUSTUM_TOP: return _simd_cmpge_ps(v[1], _simd_mul_ps(v[3], _simd_set1_ps(-1.0f))); case FRUSTUM_BOTTOM: return _simd_cmple_ps(v[1], v[3]); - case FRUSTUM_NEAR: return _simd_cmpge_ps(v[2], this->driverType == DX ? _simd_setzero_ps() : _simd_mul_ps(v[3], _simd_set1_ps(-1.0f))); + case FRUSTUM_NEAR: return _simd_cmpge_ps(v[2], this->state.rastState.clipHalfZ ? _simd_setzero_ps() : _simd_mul_ps(v[3], _simd_set1_ps(-1.0f))); case FRUSTUM_FAR: return _simd_cmple_ps(v[2], v[3]); default: SWR_ASSERT(false, "invalid clipping plane: %d", ClippingPlane); @@ -943,7 +902,6 @@ } const uint32_t workerId{ 0 }; - const DRIVER_TYPE driverType{ DX }; DRAW_CONTEXT* pDC{ nullptr }; const API_STATE& state; simdscalar clipCodes[NumVertsPerPrim]; @@ -951,6 +909,6 @@ // pipeline stage functions -void ClipTriangles(DRAW_CONTEXT *pDC, PA_STATE& pa, uint32_t workerId, simdvector prims[], uint32_t primMask, simdscalari primId); -void ClipLines(DRAW_CONTEXT *pDC, PA_STATE& pa, uint32_t workerId, simdvector prims[], uint32_t primMask, simdscalari primId); -void ClipPoints(DRAW_CONTEXT *pDC, PA_STATE& pa, uint32_t workerId, simdvector prims[], uint32_t primMask, simdscalari primId); +void ClipTriangles(DRAW_CONTEXT *pDC, PA_STATE& pa, uint32_t workerId, simdvector prims[], uint32_t primMask, simdscalari primId, simdscalari viewportIdx); +void ClipLines(DRAW_CONTEXT *pDC, PA_STATE& pa, uint32_t workerId, simdvector prims[], uint32_t primMask, simdscalari primId, simdscalari viewportIdx); +void ClipPoints(DRAW_CONTEXT *pDC, PA_STATE& pa, uint32_t workerId, simdvector prims[], uint32_t primMask, simdscalari primId, simdscalari viewportIdx); diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/conservativeRast.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/conservativeRast.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/conservativeRast.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/conservativeRast.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,215 @@ +/**************************************************************************** +* Copyright (C) 2014-2016 Intel Corporation. All Rights Reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice (including the next +* paragraph) shall be included in all copies or substantial portions of the +* Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +* IN THE SOFTWARE. +* +* @file conservativerast.h +* +******************************************************************************/ +#pragma once +#include +#include "common/simdintrin.h" + +enum FixedPointFmt +{ + FP_UNINIT, + _16_8, + _16_9, + _X_16, +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief convenience typedefs for supported Fixed Point precisions +typedef std::integral_constant Fixed_Uninit; +typedef std::integral_constant Fixed_16_8; +typedef std::integral_constant Fixed_16_9; +typedef std::integral_constant Fixed_X_16; + +////////////////////////////////////////////////////////////////////////// +/// @struct FixedPointTraits +/// @brief holds constants relating to converting between FP and Fixed point +/// @tparam FT: fixed precision type +template +struct FixedPointTraits{}; + +////////////////////////////////////////////////////////////////////////// +/// @brief Fixed_16_8 specialization of FixedPointTraits +template<> +struct FixedPointTraits +{ + /// multiplier to go from FP32 to Fixed Point 16.8 + typedef std::integral_constant ScaleT; + /// number of bits to shift to go from 16.8 fixed => int32 + typedef std::integral_constant BitsT; + typedef Fixed_16_8 TypeT; +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief Fixed_16_9 specialization of FixedPointTraits +template<> +struct FixedPointTraits +{ + /// multiplier to go from FP32 to Fixed Point 16.9 + typedef std::integral_constant ScaleT; + /// number of bits to shift to go from 16.9 fixed => int32 + typedef std::integral_constant BitsT; + typedef Fixed_16_9 TypeT; +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief Fixed_16_9 specialization of FixedPointTraits +template<> +struct FixedPointTraits +{ + /// multiplier to go from FP32 to Fixed Point X.16 + typedef std::integral_constant ScaleT; + /// number of bits to shift to go from X.16 fixed => int32 + typedef std::integral_constant BitsT; + typedef Fixed_X_16 TypeT; +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief convenience typedefs for conservative rasterization modes +typedef std::false_type StandardRastT; +typedef std::true_type ConservativeRastT; + +////////////////////////////////////////////////////////////////////////// +/// @brief convenience typedefs for Input Coverage rasterization modes +typedef std::integral_constant NoInputCoverageT; +typedef std::integral_constant OuterConservativeCoverageT; +typedef std::integral_constant InnerConservativeCoverageT; + +////////////////////////////////////////////////////////////////////////// +/// @struct ConservativeRastTraits +/// @brief primary ConservativeRastTraits template. Shouldn't be instantiated +/// @tparam ConservativeT: type of conservative rasterization +template +struct ConservativeRastFETraits {}; + +////////////////////////////////////////////////////////////////////////// +/// @brief StandardRast specialization of ConservativeRastTraits +template <> +struct ConservativeRastFETraits +{ + typedef std::false_type IsConservativeT; +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief ConservativeRastT specialization of ConservativeRastTraits +template <> +struct ConservativeRastFETraits +{ + typedef std::true_type IsConservativeT; + typedef std::integral_constant BoundingBoxOffsetT; +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief convenience typedefs for ConservativeRastFETraits +typedef ConservativeRastFETraits FEStandardRastT; +typedef ConservativeRastFETraits FEConservativeRastT; + +////////////////////////////////////////////////////////////////////////// +/// @struct ConservativeRastBETraits +/// @brief primary ConservativeRastBETraits template. Shouldn't be instantiated; +/// default to standard rasterization behavior +/// @tparam ConservativeT: type of conservative rasterization +/// @tparam InputCoverageT: type of input coverage requested, if any +template +struct ConservativeRastBETraits { + typedef std::false_type IsConservativeT; + typedef _InputCoverageT InputCoverageT; + typedef FixedPointTraits ConservativePrecisionT; + typedef std::integral_constant ConservativeEdgeOffsetT; + typedef std::integral_constant InnerConservativeEdgeOffsetT; +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief StandardRastT specialization of ConservativeRastBETraits +template +struct ConservativeRastBETraits +{ + typedef std::false_type IsConservativeT; + typedef _InputCoverageT InputCoverageT; + typedef FixedPointTraits ConservativePrecisionT; + typedef std::integral_constant ConservativeEdgeOffsetT; + typedef std::integral_constant InnerConservativeEdgeOffsetT; +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief ConservativeRastT specialization of ConservativeRastBETraits +/// with no input coverage +template <> +struct ConservativeRastBETraits +{ + typedef std::true_type IsConservativeT; + typedef NoInputCoverageT InputCoverageT; + + typedef FixedPointTraits ConservativePrecisionT; + + /// offset edge away from pixel center by 1/2 pixel + 1/512, in Fixed 16.9 precision + /// this allows the rasterizer to do the 3 edge coverage tests against a single point, instead of + /// of having to compare individual edges to pixel corners to check if any part of the triangle + /// intersects a pixel + typedef std::integral_constant ConservativeEdgeOffsetT; + typedef std::integral_constant InnerConservativeEdgeOffsetT; +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief ConservativeRastT specialization of ConservativeRastBETraits +/// with OuterConservativeCoverage +template <> +struct ConservativeRastBETraits +{ + typedef std::true_type IsConservativeT; + typedef OuterConservativeCoverageT InputCoverageT; + + typedef FixedPointTraits ConservativePrecisionT; + + /// offset edge away from pixel center by 1/2 pixel + 1/512, in Fixed 16.9 precision + /// this allows the rasterizer to do the 3 edge coverage tests against a single point, instead of + /// of having to compare individual edges to pixel corners to check if any part of the triangle + /// intersects a pixel + typedef std::integral_constant ConservativeEdgeOffsetT; + typedef std::integral_constant InnerConservativeEdgeOffsetT; + +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief ConservativeRastT specialization of ConservativeRastBETraits +/// with InnerConservativeCoverage +template <> +struct ConservativeRastBETraits +{ + typedef std::true_type IsConservativeT; + typedef InnerConservativeCoverageT InputCoverageT; + + typedef FixedPointTraits ConservativePrecisionT; + + /// offset edge away from pixel center by 1/2 pixel + 1/512, in Fixed 16.9 precision + /// this allows the rasterizer to do the 3 edge coverage tests against a single point, instead of + /// of having to compare individual edges to pixel corners to check if any part of the triangle + /// intersects a pixel + typedef std::integral_constant ConservativeEdgeOffsetT; + + /// undo the outer conservative offset and offset edge towards from pixel center by 1/2 pixel + 1/512, in Fixed 16.9 precision + /// this allows the rasterizer to do the 3 edge coverage tests against a single point, instead of + /// of having to compare individual edges to pixel corners to check if a pixel is fully covered by a triangle + typedef std::integral_constant(-((ConservativePrecisionT::ScaleT::value/2) + 1) - ConservativeEdgeOffsetT::value)> InnerConservativeEdgeOffsetT; +}; \ No newline at end of file diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/context.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/context.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/context.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/context.h 2017-06-01 10:37:10.000000000 +0000 @@ -1,5 +1,5 @@ /**************************************************************************** -* Copyright (C) 2014-2015 Intel Corporation. All Rights Reserved. +* Copyright (C) 2014-2016 Intel Corporation. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -42,6 +42,7 @@ #include "common/simdintrin.h" #include "core/threads.h" #include "ringbuffer.h" +#include "archrast/archrast.h" // x.8 fixed point precision values #define FIXED_POINT_SHIFT 8 @@ -63,6 +64,7 @@ float pointSize; uint32_t primID; uint32_t renderTargetArrayIndex; + uint32_t viewportIndex; }; ////////////////////////////////////////////////////////////////////////// @@ -83,6 +85,7 @@ float *pUserClipBuffer; uint64_t coverageMask[SWR_MAX_NUM_MULTISAMPLES]; + uint64_t innerCoverageMask; // Conservative rasterization inner coverage: marked covered if entire pixel is covered uint64_t anyCoveredSamples; TRI_FLAGS triFlags; @@ -97,18 +100,11 @@ TRI_FLAGS triFlags; }; -union CLEAR_FLAGS -{ - struct - { - uint32_t mask : 3; - }; - uint32_t bits; -}; - struct CLEAR_DESC { - CLEAR_FLAGS flags; + SWR_RECT rect; + uint32_t attachmentMask; + uint32_t renderTargetArrayIndex; float clearRTColor[4]; // RGBA_32F float clearDepth; // [0..1] uint8_t clearStencil; @@ -131,15 +127,11 @@ uint64_t userData3; }; -struct QUERY_DESC -{ - SWR_STATS* pStats; -}; - struct STORE_TILES_DESC { - SWR_RENDERTARGET_ATTACHMENT attachment; + uint32_t attachmentMask; SWR_TILE_STATE postStoreTileState; + SWR_RECT rect; }; struct COMPUTE_DESC @@ -158,10 +150,10 @@ CLEAR, DISCARDINVALIDATETILES, STORETILES, - QUERYSTATS, + SHUTDOWN, }; -struct BE_WORK +OSALIGNSIMD(struct) BE_WORK { WORK_TYPE type; PFN_WORK_FUNC pfnWork; @@ -172,7 +164,6 @@ CLEAR_DESC clear; DISCARD_INVALIDATE_TILES_DESC discardInvalidateTiles; STORE_TILES_DESC storeTiles; - QUERY_DESC queryStats; } desc; }; @@ -209,20 +200,22 @@ CLEAR_DESC clear; DISCARD_INVALIDATE_TILES_DESC discardInvalidateTiles; STORE_TILES_DESC storeTiles; - QUERY_DESC queryStats; } desc; }; -struct GUARDBAND +struct GUARDBANDS { - float left, right, top, bottom; + float left[KNOB_NUM_VIEWPORTS_SCISSORS]; + float right[KNOB_NUM_VIEWPORTS_SCISSORS]; + float top[KNOB_NUM_VIEWPORTS_SCISSORS]; + float bottom[KNOB_NUM_VIEWPORTS_SCISSORS]; }; struct PA_STATE; // function signature for pipeline stages that execute after primitive assembly typedef void(*PFN_PROCESS_PRIMS)(DRAW_CONTEXT *pDC, PA_STATE& pa, uint32_t workerId, simdvector prims[], - uint32_t primMask, simdscalari primID); + uint32_t primMask, simdscalari primID, simdscalari viewportIdx); OSALIGNLINE(struct) API_STATE { @@ -262,15 +255,8 @@ PFN_DS_FUNC pfnDsFunc; SWR_TS_STATE tsState; - // Specifies which VS outputs are sent to PS. - // Does not include position - uint32_t linkageMask; - uint32_t linkageCount; - uint8_t linkageMap[MAX_ATTRIBUTES]; - - // attrib mask, specifies the total set of attributes used - // by the frontend (vs, so, gs) - uint32_t feAttribMask; + // Number of attributes used by the frontend (vs, so, gs) + uint32_t feNumAttributes; PRIMITIVE_TOPOLOGY topology; bool forceFront; @@ -280,17 +266,20 @@ // floating point multisample offsets float samplePos[SWR_MAX_NUM_MULTISAMPLES * 2]; - GUARDBAND gbState; + GUARDBANDS gbState; SWR_VIEWPORT vp[KNOB_NUM_VIEWPORTS_SCISSORS]; - SWR_VIEWPORT_MATRIX vpMatrix[KNOB_NUM_VIEWPORTS_SCISSORS]; + SWR_VIEWPORT_MATRICES vpMatrices; - BBOX scissorRects[KNOB_NUM_VIEWPORTS_SCISSORS]; - BBOX scissorInFixedPoint; + SWR_RECT scissorRects[KNOB_NUM_VIEWPORTS_SCISSORS]; + SWR_RECT scissorsInFixedPoint[KNOB_NUM_VIEWPORTS_SCISSORS]; + bool scissorsTileAligned; // Backend state SWR_BACKEND_STATE backendState; + SWR_DEPTH_BOUNDS_STATE depthBoundsState; + // PS - Pixel shader state SWR_PS_STATE psState; @@ -300,14 +289,13 @@ SWR_BLEND_STATE blendState; PFN_BLEND_JIT_FUNC pfnBlendFunc[SWR_NUM_RENDERTARGETS]; - // Stats are incremented when this is true. - bool enableStats; - struct { - uint32_t colorHottileEnable : 8; - uint32_t depthHottileEnable: 1; - uint32_t stencilHottileEnable : 1; + uint32_t enableStatsFE : 1; // Enable frontend pipeline stats + uint32_t enableStatsBE : 1; // Enable backend pipeline stats + uint32_t colorHottileEnable : 8; // Bitmask of enabled color hottiles + uint32_t depthHottileEnable: 1; // Enable depth buffer hottile + uint32_t stencilHottileEnable : 1; // Enable stencil buffer hottile }; PFN_QUANTIZE_DEPTH pfnQuantizeDepth; @@ -373,22 +361,42 @@ CachingArena* pArena; // This should only be used by API thread. }; +struct DRAW_DYNAMIC_STATE +{ + void Reset(uint32_t numThreads) + { + SWR_STATS* pSavePtr = pStats; + memset(this, 0, sizeof(*this)); + pStats = pSavePtr; + memset(pStats, 0, sizeof(SWR_STATS) * numThreads); + } + ///@todo Currently assumes only a single FE can do stream output for a draw. + uint32_t SoWriteOffset[4]; + bool SoWriteOffsetDirty[4]; + + SWR_STATS_FE statsFE; // Only one FE thread per DC. + SWR_STATS* pStats; +}; + // Draw Context // The api thread sets up a draw context that exists for the life of the draw. // This draw context maintains all of the state needed for the draw operation. struct DRAW_CONTEXT { SWR_CONTEXT* pContext; - uint64_t drawId; union { MacroTileMgr* pTileMgr; DispatchQueue* pDispatch; // Queue for thread groups. (isCompute) }; - uint64_t dependency; - DRAW_STATE* pState; + DRAW_STATE* pState; // Read-only state. Core should not update this outside of API thread. + DRAW_DYNAMIC_STATE dynState; + CachingArena* pArena; + uint32_t drawId; + bool dependentFE; // Frontend work is dependent on all previous FE + bool dependent; // Backend work is dependent on all previous BE bool isCompute; // Is this DC a compute context? bool cleanupState; // True if this is the last draw using an entry in the state ring. volatile bool doneFE; // Is FE work done for this draw? @@ -396,7 +404,11 @@ FE_WORK FeWork; volatile OSALIGNLINE(uint32_t) FeLock; - volatile int64_t threadsDone; + volatile int32_t threadsDone; + + SYNC_DESC retireCallback; // Call this func when this DC is retired. + + }; static_assert((sizeof(DRAW_CONTEXT) & 63) == 0, "Invalid size for DRAW_CONTEXT"); @@ -459,33 +471,71 @@ uint32_t NumBEThreads; THREAD_POOL threadPool; // Thread pool associated with this context + SWR_THREADING_INFO threadInfo; std::condition_variable FifosNotEmpty; std::mutex WaitLock; - DRIVER_TYPE driverType; - uint32_t privateStateSize; HotTileMgr *pHotTileMgr; - // tile load/store functions, passed in at create context time - PFN_LOAD_TILE pfnLoadTile; - PFN_STORE_TILE pfnStoreTile; - PFN_CLEAR_TILE pfnClearTile; + // Callback functions, passed in at create context time + PFN_LOAD_TILE pfnLoadTile; + PFN_STORE_TILE pfnStoreTile; + PFN_CLEAR_TILE pfnClearTile; + PFN_UPDATE_SO_WRITE_OFFSET pfnUpdateSoWriteOffset; + PFN_UPDATE_STATS pfnUpdateStats; + PFN_UPDATE_STATS_FE pfnUpdateStatsFE; + // Global Stats - SWR_STATS stats[KNOB_MAX_NUM_THREADS]; + SWR_STATS* pStats; // Scratch space for workers. - uint8_t* pScratch[KNOB_MAX_NUM_THREADS]; + uint8_t** ppScratch; + + volatile int32_t drawsOutstandingFE; CachingAllocator cachingArenaAllocator; uint32_t frameCount; -}; - -void WaitForDependencies(SWR_CONTEXT *pContext, uint64_t drawId); -void WakeAllThreads(SWR_CONTEXT *pContext); -#define UPDATE_STAT(name, count) if (GetApiState(pDC).enableStats) { pContext->stats[workerId].name += count; } -#define SET_STAT(name, count) if (GetApiState(pDC).enableStats) { pContext->stats[workerId].name = count; } + uint32_t lastFrameChecked; + uint64_t lastDrawChecked; + TileSet singleThreadLockedTiles; + + // ArchRast thread contexts. + HANDLE* pArContext; +}; + +#define UPDATE_STAT_BE(name, count) if (GetApiState(pDC).enableStatsBE) { pDC->dynState.pStats[workerId].name += count; } +#define UPDATE_STAT_FE(name, count) if (GetApiState(pDC).enableStatsFE) { pDC->dynState.statsFE.name += count; } + +// ArchRast instrumentation framework +#define AR_WORKER_CTX pContext->pArContext[workerId] +#define AR_API_CTX pContext->pArContext[pContext->NumWorkerThreads] + +#ifdef KNOB_ENABLE_AR + #define _AR_BEGIN(ctx, type, id) ArchRast::Dispatch(ctx, ArchRast::Start(ArchRast::type, id)) + #define _AR_END(ctx, type, count) ArchRast::Dispatch(ctx, ArchRast::End(ArchRast::type, count)) + #define _AR_EVENT(ctx, event) ArchRast::Dispatch(ctx, ArchRast::event) +#else + #ifdef KNOB_ENABLE_RDTSC + #define _AR_BEGIN(ctx, type, id) (void)ctx; RDTSC_START(type) + #define _AR_END(ctx, type, id) RDTSC_STOP(type, id, 0) + #else + #define _AR_BEGIN(ctx, type, id) (void)ctx + #define _AR_END(ctx, type, id) + #endif + #define _AR_EVENT(ctx, event) +#endif + +// Use these macros for api thread. +#define AR_API_BEGIN(type, id) _AR_BEGIN(AR_API_CTX, type, id) +#define AR_API_END(type, count) _AR_END(AR_API_CTX, type, count) +#define AR_API_EVENT(event) _AR_EVENT(AR_API_CTX, event) + +// Use these macros for worker threads. +#define AR_BEGIN(type, id) _AR_BEGIN(AR_WORKER_CTX, type, id) +#define AR_END(type, count) _AR_END(AR_WORKER_CTX, type, count) +#define AR_EVENT(event) _AR_EVENT(AR_WORKER_CTX, event) diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/depthstencil.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/depthstencil.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/depthstencil.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/depthstencil.h 2017-06-01 10:37:10.000000000 +0000 @@ -117,14 +117,14 @@ INLINE simdscalar DepthStencilTest(const API_STATE* pState, - bool frontFacing, simdscalar interpZ, uint8_t* pDepthBase, simdscalar coverageMask, uint8_t *pStencilBase, - simdscalar* pStencilMask) + bool frontFacing, uint32_t viewportIndex, simdscalar interpZ, uint8_t* pDepthBase, simdscalar coverageMask, + uint8_t *pStencilBase, simdscalar* pStencilMask) { static_assert(KNOB_DEPTH_HOT_TILE_FORMAT == R32_FLOAT, "Unsupported depth hot tile format"); static_assert(KNOB_STENCIL_HOT_TILE_FORMAT == R8_UINT, "Unsupported stencil hot tile format"); const SWR_DEPTH_STENCIL_STATE* pDSState = &pState->depthStencilState; - const SWR_VIEWPORT* pViewport = &pState->vp[0]; + const SWR_VIEWPORT* pViewport = &pState->vp[viewportIndex]; simdscalar depthResult = _simd_set1_ps(-1.0f); simdscalar zbuf; diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/fifo.hpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/fifo.hpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/fifo.hpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/fifo.hpp 2017-06-01 10:37:10.000000000 +0000 @@ -55,13 +55,11 @@ mHead = 0; mTail = 0; mBlocks.clear(); - T* pNewBlock = (T*)arena.Alloc(sizeof(T)*mBlockSize); + T* pNewBlock = (T*)arena.AllocAligned(sizeof(T)*mBlockSize, KNOB_SIMD_WIDTH*4); mBlocks.push_back(pNewBlock); mCurBlock = pNewBlock; mCurBlockIdx = 0; - mNumEntries = 0; - _ReadWriteBarrier(); mLock = 0; } @@ -106,7 +104,20 @@ template bool enqueue_try_nosync(ArenaT& arena, const T* entry) { - memcpy(&mCurBlock[mTail], entry, sizeof(T)); + const float* pSrc = (const float*)entry; + float* pDst = (float*)&mCurBlock[mTail]; + + auto lambda = [&](int32_t i) + { + __m256 vSrc = _simd_load_ps(pSrc + i*KNOB_SIMD_WIDTH); + _simd_stream_ps(pDst + i*KNOB_SIMD_WIDTH, vSrc); + }; + + const uint32_t numSimdLines = sizeof(T) / (KNOB_SIMD_WIDTH*4); + static_assert(numSimdLines * KNOB_SIMD_WIDTH * 4 == sizeof(T), + "FIFO element size should be multiple of SIMD width."); + + UnrollerL<0, numSimdLines, 1>::step(lambda); mTail ++; if (mTail == mBlockSize) @@ -117,7 +128,7 @@ } else { - T* newBlock = (T*)arena.Alloc(sizeof(T)*mBlockSize); + T* newBlock = (T*)arena.AllocAligned(sizeof(T)*mBlockSize, KNOB_SIMD_WIDTH*4); SWR_ASSERT(newBlock); mBlocks.push_back(newBlock); diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/format_conversion.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/format_conversion.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/format_conversion.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/format_conversion.h 2017-06-01 10:37:10.000000000 +0000 @@ -194,3 +194,173 @@ UnrollerL<0, FormatTraits::numComps, 1>::step(lambda); } + +#if ENABLE_AVX512_SIMD16 +////////////////////////////////////////////////////////////////////////// +/// @brief Load SIMD packed pixels in SOA format and converts to +/// SOA RGBA32_FLOAT format. +/// @param pSrc - source data in SOA form +/// @param dst - output data in SOA form +template +INLINE void LoadSOA(const uint8_t *pSrc, simd16vector &dst) +{ + // fast path for float32 + if ((FormatTraits::GetType(0) == SWR_TYPE_FLOAT) && (FormatTraits::GetBPC(0) == 32)) + { + auto lambda = [&](int comp) + { + simd16scalar vComp = _simd16_load_ps(reinterpret_cast(pSrc + comp * sizeof(simd16scalar))); + + dst.v[FormatTraits::swizzle(comp)] = vComp; + }; + + UnrollerL<0, FormatTraits::numComps, 1>::step(lambda); + return; + } + + auto lambda = [&](int comp) + { + // load SIMD components + simd16scalar vComp = FormatTraits::loadSOA_16(comp, pSrc); + + // unpack + vComp = FormatTraits::unpack(comp, vComp); + + // convert + if (FormatTraits::isNormalized(comp)) + { + vComp = _simd16_cvtepi32_ps(_simd16_castps_si(vComp)); + vComp = _simd16_mul_ps(vComp, _simd16_set1_ps(FormatTraits::toFloat(comp))); + } + + dst.v[FormatTraits::swizzle(comp)] = vComp; + + pSrc += (FormatTraits::GetBPC(comp) * KNOB_SIMD16_WIDTH) / 8; + }; + + UnrollerL<0, FormatTraits::numComps, 1>::step(lambda); +} + +////////////////////////////////////////////////////////////////////////// +/// @brief Clamps the given component based on the requirements on the +/// Format template arg +/// @param vComp - SIMD vector of floats +/// @param Component - component +template +INLINE simd16scalar Clamp(simd16scalar vComp, uint32_t Component) +{ + if (FormatTraits::isNormalized(Component)) + { + if (FormatTraits::GetType(Component) == SWR_TYPE_UNORM) + { + vComp = _simd16_max_ps(vComp, _simd16_setzero_ps()); + } + + if (FormatTraits::GetType(Component) == SWR_TYPE_SNORM) + { + vComp = _simd16_max_ps(vComp, _simd16_set1_ps(-1.0f)); + } + vComp = _simd16_min_ps(vComp, _simd16_set1_ps(1.0f)); + } + else if (FormatTraits::GetBPC(Component) < 32) + { + if (FormatTraits::GetType(Component) == SWR_TYPE_UINT) + { + int iMax = (1 << FormatTraits::GetBPC(Component)) - 1; + int iMin = 0; + simd16scalari vCompi = _simd16_castps_si(vComp); + vCompi = _simd16_max_epu32(vCompi, _simd16_set1_epi32(iMin)); + vCompi = _simd16_min_epu32(vCompi, _simd16_set1_epi32(iMax)); + vComp = _simd16_castsi_ps(vCompi); + } + else if (FormatTraits::GetType(Component) == SWR_TYPE_SINT) + { + int iMax = (1 << (FormatTraits::GetBPC(Component) - 1)) - 1; + int iMin = -1 - iMax; + simd16scalari vCompi = _simd16_castps_si(vComp); + vCompi = _simd16_max_epi32(vCompi, _simd16_set1_epi32(iMin)); + vCompi = _simd16_min_epi32(vCompi, _simd16_set1_epi32(iMax)); + vComp = _simd16_castsi_ps(vCompi); + } + } + + return vComp; +} + +////////////////////////////////////////////////////////////////////////// +/// @brief Normalize the given component based on the requirements on the +/// Format template arg +/// @param vComp - SIMD vector of floats +/// @param Component - component +template +INLINE simd16scalar Normalize(simd16scalar vComp, uint32_t Component) +{ + if (FormatTraits::isNormalized(Component)) + { + vComp = _simd16_mul_ps(vComp, _simd16_set1_ps(FormatTraits::fromFloat(Component))); + vComp = _simd16_castsi_ps(_simd16_cvtps_epi32(vComp)); + } + return vComp; +} + +////////////////////////////////////////////////////////////////////////// +/// @brief Convert and store simdvector of pixels in SOA +/// RGBA32_FLOAT to SOA format +/// @param src - source data in SOA form +/// @param dst - output data in SOA form +template +INLINE void StoreSOA(const simd16vector &src, uint8_t *pDst) +{ + // fast path for float32 + if ((FormatTraits::GetType(0) == SWR_TYPE_FLOAT) && (FormatTraits::GetBPC(0) == 32)) + { + for (uint32_t comp = 0; comp < FormatTraits::numComps; ++comp) + { + simd16scalar vComp = src.v[FormatTraits::swizzle(comp)]; + + // Gamma-correct + if (FormatTraits::isSRGB) + { + if (comp < 3) // Input format is always RGBA32_FLOAT. + { + vComp = FormatTraits::convertSrgb(comp, vComp); + } + } + + _simd16_store_ps(reinterpret_cast(pDst + comp * sizeof(simd16scalar)), vComp); + } + return; + } + + auto lambda = [&](int comp) + { + simd16scalar vComp = src.v[FormatTraits::swizzle(comp)]; + + // Gamma-correct + if (FormatTraits::isSRGB) + { + if (comp < 3) // Input format is always RGBA32_FLOAT. + { + vComp = FormatTraits::convertSrgb(comp, vComp); + } + } + + // clamp + vComp = Clamp(vComp, comp); + + // normalize + vComp = Normalize(vComp, comp); + + // pack + vComp = FormatTraits::pack(comp, vComp); + + // store + FormatTraits::storeSOA(comp, pDst, vComp); + + pDst += (FormatTraits::GetBPC(comp) * KNOB_SIMD16_WIDTH) / 8; + }; + + UnrollerL<0, FormatTraits::numComps, 1>::step(lambda); +} + +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/format_traits.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/format_traits.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/format_traits.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/format_traits.h 2017-06-01 10:37:10.000000000 +0000 @@ -1,6 +1,5 @@ - /**************************************************************************** -* Copyright (C) 2014-2015 Intel Corporation. All Rights Reserved. +* Copyright (C) 2016 Intel Corporation. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -20,21 +19,19 @@ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. -* -* @file format_traits.h -* -* @brief auto-generated file -* +* +* @file gen_format_traits.h +* +* @brief Format Traits. auto-generated file +* * DO NOT EDIT -* +* ******************************************************************************/ - #pragma once #include "format_types.h" #include "utils.h" - ////////////////////////////////////////////////////////////////////////// /// FormatSwizzle - Component swizzle selects ////////////////////////////////////////////////////////////////////////// @@ -66,8 +63,8 @@ static const bool isSRGB{ false }; static const bool isBC{ false }; static const bool isSubsampled{ false }; - static const uint32_t bcWidth{1}; - static const uint32_t bcHeight{1}; + static const uint32_t bcWidth{ 1 }; + static const uint32_t bcHeight{ 1 }; }; ////////////////////////////////////////////////////////////////////////// @@ -88,7 +85,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose32_32_32_32 TransposeT; + typedef Transpose32_32_32_32 TransposeT; typedef Format4<32, 32, 32, 32> FormatT; }; @@ -110,7 +107,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose32_32_32_32 TransposeT; + typedef Transpose32_32_32_32 TransposeT; typedef Format4<32, 32, 32, 32> FormatT; }; @@ -132,11 +129,33 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose32_32_32_32 TransposeT; + typedef Transpose32_32_32_32 TransposeT; typedef Format4<32, 32, 32, 32> FormatT; }; ////////////////////////////////////////////////////////////////////////// +/// FormatTraits - Format traits specialization for R64G64_FLOAT +////////////////////////////////////////////////////////////////////////// +template<> struct FormatTraits : + ComponentTraits, + FormatSwizzle<0, 1>, + Defaults<0, 0, 0, 0x3f800000> +{ + static const uint32_t bpp{ 128 }; + static const uint32_t numComps{ 2 }; + static const bool hasAlpha{ false }; + static const uint32_t alphaComp{ 0 }; + static const bool isSRGB{ false }; + static const bool isBC{ false }; + static const bool isSubsampled{ false }; + static const uint32_t bcWidth{ 1 }; + static const uint32_t bcHeight{ 1 }; + + typedef Transpose64_64 TransposeT; + typedef Format2<64, 64> FormatT; +}; + +////////////////////////////////////////////////////////////////////////// /// FormatTraits - Format traits specialization for R32G32B32X32_FLOAT ////////////////////////////////////////////////////////////////////////// template<> struct FormatTraits : @@ -154,7 +173,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose32_32_32_32 TransposeT; + typedef Transpose32_32_32_32 TransposeT; typedef Format4<32, 32, 32, 32> FormatT; }; @@ -176,7 +195,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose32_32_32_32 TransposeT; + typedef Transpose32_32_32_32 TransposeT; typedef Format4<32, 32, 32, 32> FormatT; }; @@ -198,7 +217,29 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose32_32_32_32 TransposeT; + typedef Transpose32_32_32_32 TransposeT; + typedef Format4<32, 32, 32, 32> FormatT; +}; + +////////////////////////////////////////////////////////////////////////// +/// FormatTraits - Format traits specialization for R32G32B32A32_SFIXED +////////////////////////////////////////////////////////////////////////// +template<> struct FormatTraits : + ComponentTraits, + FormatSwizzle<0, 1, 2, 3>, + Defaults<0, 0, 0, 0x3f800000> +{ + static const uint32_t bpp{ 128 }; + static const uint32_t numComps{ 4 }; + static const bool hasAlpha{ true }; + static const uint32_t alphaComp{ 3 }; + static const bool isSRGB{ false }; + static const bool isBC{ false }; + static const bool isSubsampled{ false }; + static const uint32_t bcWidth{ 1 }; + static const uint32_t bcHeight{ 1 }; + + typedef Transpose32_32_32_32 TransposeT; typedef Format4<32, 32, 32, 32> FormatT; }; @@ -220,7 +261,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose32_32_32 TransposeT; + typedef Transpose32_32_32 TransposeT; typedef Format3<32, 32, 32> FormatT; }; @@ -242,7 +283,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose32_32_32 TransposeT; + typedef Transpose32_32_32 TransposeT; typedef Format3<32, 32, 32> FormatT; }; @@ -264,7 +305,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose32_32_32 TransposeT; + typedef Transpose32_32_32 TransposeT; typedef Format3<32, 32, 32> FormatT; }; @@ -286,7 +327,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose32_32_32 TransposeT; + typedef Transpose32_32_32 TransposeT; typedef Format3<32, 32, 32> FormatT; }; @@ -308,7 +349,29 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose32_32_32 TransposeT; + typedef Transpose32_32_32 TransposeT; + typedef Format3<32, 32, 32> FormatT; +}; + +////////////////////////////////////////////////////////////////////////// +/// FormatTraits - Format traits specialization for R32G32B32_SFIXED +////////////////////////////////////////////////////////////////////////// +template<> struct FormatTraits : + ComponentTraits, + FormatSwizzle<0, 1, 2>, + Defaults<0, 0, 0, 0x3f800000> +{ + static const uint32_t bpp{ 96 }; + static const uint32_t numComps{ 3 }; + static const bool hasAlpha{ false }; + static const uint32_t alphaComp{ 0 }; + static const bool isSRGB{ false }; + static const bool isBC{ false }; + static const bool isSubsampled{ false }; + static const uint32_t bcWidth{ 1 }; + static const uint32_t bcHeight{ 1 }; + + typedef Transpose32_32_32 TransposeT; typedef Format3<32, 32, 32> FormatT; }; @@ -330,7 +393,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose16_16_16_16 TransposeT; + typedef Transpose16_16_16_16 TransposeT; typedef Format4<16, 16, 16, 16> FormatT; }; @@ -352,7 +415,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose16_16_16_16 TransposeT; + typedef Transpose16_16_16_16 TransposeT; typedef Format4<16, 16, 16, 16> FormatT; }; @@ -374,7 +437,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose16_16_16_16 TransposeT; + typedef Transpose16_16_16_16 TransposeT; typedef Format4<16, 16, 16, 16> FormatT; }; @@ -396,7 +459,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose16_16_16_16 TransposeT; + typedef Transpose16_16_16_16 TransposeT; typedef Format4<16, 16, 16, 16> FormatT; }; @@ -418,7 +481,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose16_16_16_16 TransposeT; + typedef Transpose16_16_16_16 TransposeT; typedef Format4<16, 16, 16, 16> FormatT; }; @@ -440,7 +503,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose32_32 TransposeT; + typedef Transpose32_32 TransposeT; typedef Format2<32, 32> FormatT; }; @@ -462,7 +525,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose32_32 TransposeT; + typedef Transpose32_32 TransposeT; typedef Format2<32, 32> FormatT; }; @@ -484,7 +547,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose32_32 TransposeT; + typedef Transpose32_32 TransposeT; typedef Format2<32, 32> FormatT; }; @@ -506,7 +569,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose32_32 TransposeT; + typedef Transpose32_32 TransposeT; typedef Format2<32, 32> FormatT; }; @@ -528,7 +591,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose32_32 TransposeT; + typedef Transpose32_32 TransposeT; typedef Format2<32, 32> FormatT; }; @@ -550,11 +613,33 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose32_32 TransposeT; + typedef Transpose32_32 TransposeT; typedef Format2<32, 32> FormatT; }; ////////////////////////////////////////////////////////////////////////// +/// FormatTraits - Format traits specialization for R64_FLOAT +////////////////////////////////////////////////////////////////////////// +template<> struct FormatTraits : + ComponentTraits, + FormatSwizzle<0>, + Defaults<0, 0, 0, 0x3f800000> +{ + static const uint32_t bpp{ 64 }; + static const uint32_t numComps{ 1 }; + static const bool hasAlpha{ false }; + static const uint32_t alphaComp{ 0 }; + static const bool isSRGB{ false }; + static const bool isBC{ false }; + static const bool isSubsampled{ false }; + static const uint32_t bcWidth{ 1 }; + static const uint32_t bcHeight{ 1 }; + + typedef TransposeSingleComponent<64> TransposeT; + typedef Format1<64> FormatT; +}; + +////////////////////////////////////////////////////////////////////////// /// FormatTraits - Format traits specialization for R16G16B16X16_UNORM ////////////////////////////////////////////////////////////////////////// template<> struct FormatTraits : @@ -572,7 +657,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose16_16_16_16 TransposeT; + typedef Transpose16_16_16_16 TransposeT; typedef Format4<16, 16, 16, 16> FormatT; }; @@ -594,7 +679,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose16_16_16_16 TransposeT; + typedef Transpose16_16_16_16 TransposeT; typedef Format4<16, 16, 16, 16> FormatT; }; @@ -616,7 +701,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose32_32 TransposeT; + typedef Transpose32_32 TransposeT; typedef Format2<32, 32> FormatT; }; @@ -638,7 +723,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose32_32 TransposeT; + typedef Transpose32_32 TransposeT; typedef Format2<32, 32> FormatT; }; @@ -660,7 +745,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose16_16_16_16 TransposeT; + typedef Transpose16_16_16_16 TransposeT; typedef Format4<16, 16, 16, 16> FormatT; }; @@ -682,7 +767,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose16_16_16_16 TransposeT; + typedef Transpose16_16_16_16 TransposeT; typedef Format4<16, 16, 16, 16> FormatT; }; @@ -704,7 +789,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose32_32 TransposeT; + typedef Transpose32_32 TransposeT; typedef Format2<32, 32> FormatT; }; @@ -726,29 +811,29 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose32_32 TransposeT; + typedef Transpose32_32 TransposeT; typedef Format2<32, 32> FormatT; }; ////////////////////////////////////////////////////////////////////////// -/// FormatTraits - Format traits specialization for R32_FLOAT_X8X24_TYPELESS_LD +/// FormatTraits - Format traits specialization for R32G32_SFIXED ////////////////////////////////////////////////////////////////////////// -template<> struct FormatTraits : - ComponentTraits, +template<> struct FormatTraits : + ComponentTraits, FormatSwizzle<0, 1>, Defaults<0, 0, 0, 0x3f800000> { static const uint32_t bpp{ 64 }; - static const uint32_t numComps{ 1 }; + static const uint32_t numComps{ 2 }; static const bool hasAlpha{ false }; - static const uint32_t alphaComp{ 3 }; + static const uint32_t alphaComp{ 0 }; static const bool isSRGB{ false }; static const bool isBC{ false }; static const bool isSubsampled{ false }; static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose32_32 TransposeT; + typedef Transpose32_32 TransposeT; typedef Format2<32, 32> FormatT; }; @@ -770,7 +855,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8_8_8 TransposeT; + typedef Transpose8_8_8_8 TransposeT; typedef Format4<8, 8, 8, 8> FormatT; }; @@ -792,7 +877,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8_8_8 TransposeT; + typedef Transpose8_8_8_8 TransposeT; typedef Format4<8, 8, 8, 8> FormatT; }; @@ -814,7 +899,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose10_10_10_2 TransposeT; + typedef Transpose10_10_10_2 TransposeT; typedef Format4<10, 10, 10, 2> FormatT; }; @@ -836,7 +921,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose10_10_10_2 TransposeT; + typedef Transpose10_10_10_2 TransposeT; typedef Format4<10, 10, 10, 2> FormatT; }; @@ -858,7 +943,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose10_10_10_2 TransposeT; + typedef Transpose10_10_10_2 TransposeT; typedef Format4<10, 10, 10, 2> FormatT; }; @@ -880,7 +965,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8_8_8 TransposeT; + typedef Transpose8_8_8_8 TransposeT; typedef Format4<8, 8, 8, 8> FormatT; }; @@ -902,7 +987,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8_8_8 TransposeT; + typedef Transpose8_8_8_8 TransposeT; typedef Format4<8, 8, 8, 8> FormatT; }; @@ -924,7 +1009,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8_8_8 TransposeT; + typedef Transpose8_8_8_8 TransposeT; typedef Format4<8, 8, 8, 8> FormatT; }; @@ -946,7 +1031,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8_8_8 TransposeT; + typedef Transpose8_8_8_8 TransposeT; typedef Format4<8, 8, 8, 8> FormatT; }; @@ -968,7 +1053,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8_8_8 TransposeT; + typedef Transpose8_8_8_8 TransposeT; typedef Format4<8, 8, 8, 8> FormatT; }; @@ -990,7 +1075,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose16_16 TransposeT; + typedef Transpose16_16 TransposeT; typedef Format2<16, 16> FormatT; }; @@ -1012,7 +1097,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose16_16 TransposeT; + typedef Transpose16_16 TransposeT; typedef Format2<16, 16> FormatT; }; @@ -1034,7 +1119,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose16_16 TransposeT; + typedef Transpose16_16 TransposeT; typedef Format2<16, 16> FormatT; }; @@ -1056,7 +1141,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose16_16 TransposeT; + typedef Transpose16_16 TransposeT; typedef Format2<16, 16> FormatT; }; @@ -1078,7 +1163,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose16_16 TransposeT; + typedef Transpose16_16 TransposeT; typedef Format2<16, 16> FormatT; }; @@ -1100,7 +1185,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose10_10_10_2 TransposeT; + typedef Transpose10_10_10_2 TransposeT; typedef Format4<10, 10, 10, 2> FormatT; }; @@ -1122,7 +1207,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose10_10_10_2 TransposeT; + typedef Transpose10_10_10_2 TransposeT; typedef Format4<10, 10, 10, 2> FormatT; }; @@ -1144,11 +1229,33 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose11_11_10 TransposeT; + typedef Transpose11_11_10 TransposeT; typedef Format3<11, 11, 10> FormatT; }; ////////////////////////////////////////////////////////////////////////// +/// FormatTraits - Format traits specialization for R10G10B10_FLOAT_A2_UNORM +////////////////////////////////////////////////////////////////////////// +template<> struct FormatTraits : + ComponentTraits, + FormatSwizzle<0, 1, 2, 3>, + Defaults<0, 0, 0, 0x3f800000> +{ + static const uint32_t bpp{ 32 }; + static const uint32_t numComps{ 4 }; + static const bool hasAlpha{ true }; + static const uint32_t alphaComp{ 3 }; + static const bool isSRGB{ false }; + static const bool isBC{ false }; + static const bool isSubsampled{ false }; + static const uint32_t bcWidth{ 1 }; + static const uint32_t bcHeight{ 1 }; + + typedef Transpose10_10_10_2 TransposeT; + typedef Format4<10, 10, 10, 2> FormatT; +}; + +////////////////////////////////////////////////////////////////////////// /// FormatTraits - Format traits specialization for R32_SINT ////////////////////////////////////////////////////////////////////////// template<> struct FormatTraits : @@ -1167,7 +1274,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<32> TransposeT; - typedef Format1<32> FormatT; + typedef Format1<32> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -1189,7 +1296,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<32> TransposeT; - typedef Format1<32> FormatT; + typedef Format1<32> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -1211,7 +1318,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<32> TransposeT; - typedef Format1<32> FormatT; + typedef Format1<32> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -1233,7 +1340,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<32> TransposeT; - typedef Format1<24> FormatT; + typedef Format1<24> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -1255,21 +1362,21 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<32> TransposeT; - typedef Format1<32> FormatT; + typedef Format1<32> FormatT; }; ////////////////////////////////////////////////////////////////////////// -/// FormatTraits - Format traits specialization for R24_UNORM_X8_TYPELESS_LD +/// FormatTraits - Format traits specialization for L32_UNORM ////////////////////////////////////////////////////////////////////////// -template<> struct FormatTraits : - ComponentTraits, +template<> struct FormatTraits : + ComponentTraits, FormatSwizzle<0>, Defaults<0, 0, 0, 0x3f800000> { static const uint32_t bpp{ 32 }; static const uint32_t numComps{ 1 }; static const bool hasAlpha{ false }; - static const uint32_t alphaComp{ 3 }; + static const uint32_t alphaComp{ 0 }; static const bool isSRGB{ false }; static const bool isBC{ false }; static const bool isSubsampled{ false }; @@ -1277,7 +1384,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<32> TransposeT; - typedef Format1<24> FormatT; + typedef Format1<32> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -1298,7 +1405,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose16_16 TransposeT; + typedef Transpose16_16 TransposeT; typedef Format2<16, 16> FormatT; }; @@ -1320,7 +1427,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose24_8 TransposeT; + typedef Transpose24_8 TransposeT; typedef Format2<24, 8> FormatT; }; @@ -1342,7 +1449,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose24_8 TransposeT; + typedef Transpose24_8 TransposeT; typedef Format2<24, 8> FormatT; }; @@ -1365,7 +1472,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<32> TransposeT; - typedef Format1<32> FormatT; + typedef Format1<32> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -1387,7 +1494,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<32> TransposeT; - typedef Format1<32> FormatT; + typedef Format1<32> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -1409,7 +1516,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<32> TransposeT; - typedef Format1<32> FormatT; + typedef Format1<32> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -1430,7 +1537,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8_8_8 TransposeT; + typedef Transpose8_8_8_8 TransposeT; typedef Format4<8, 8, 8, 8> FormatT; }; @@ -1452,7 +1559,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8_8_8 TransposeT; + typedef Transpose8_8_8_8 TransposeT; typedef Format4<8, 8, 8, 8> FormatT; }; @@ -1474,7 +1581,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8_8_8 TransposeT; + typedef Transpose8_8_8_8 TransposeT; typedef Format4<8, 8, 8, 8> FormatT; }; @@ -1496,7 +1603,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8_8_8 TransposeT; + typedef Transpose8_8_8_8 TransposeT; typedef Format4<8, 8, 8, 8> FormatT; }; @@ -1518,7 +1625,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose9_9_9_5 TransposeT; + typedef Transpose9_9_9_5 TransposeT; typedef Format4<9, 9, 9, 5> FormatT; }; @@ -1540,7 +1647,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose10_10_10_2 TransposeT; + typedef Transpose10_10_10_2 TransposeT; typedef Format4<10, 10, 10, 2> FormatT; }; @@ -1562,7 +1669,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose16_16 TransposeT; + typedef Transpose16_16 TransposeT; typedef Format2<16, 16> FormatT; }; @@ -1584,7 +1691,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose10_10_10_2 TransposeT; + typedef Transpose10_10_10_2 TransposeT; typedef Format4<10, 10, 10, 2> FormatT; }; @@ -1606,7 +1713,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8_8_8 TransposeT; + typedef Transpose8_8_8_8 TransposeT; typedef Format4<8, 8, 8, 8> FormatT; }; @@ -1628,7 +1735,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8_8_8 TransposeT; + typedef Transpose8_8_8_8 TransposeT; typedef Format4<8, 8, 8, 8> FormatT; }; @@ -1650,7 +1757,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose16_16 TransposeT; + typedef Transpose16_16 TransposeT; typedef Format2<16, 16> FormatT; }; @@ -1672,7 +1779,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose16_16 TransposeT; + typedef Transpose16_16 TransposeT; typedef Format2<16, 16> FormatT; }; @@ -1695,7 +1802,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<32> TransposeT; - typedef Format1<32> FormatT; + typedef Format1<32> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -1717,7 +1824,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<32> TransposeT; - typedef Format1<32> FormatT; + typedef Format1<32> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -1738,7 +1845,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose5_6_5 TransposeT; + typedef Transpose5_6_5 TransposeT; typedef Format3<5, 6, 5> FormatT; }; @@ -1760,7 +1867,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose5_6_5 TransposeT; + typedef Transpose5_6_5 TransposeT; typedef Format3<5, 6, 5> FormatT; }; @@ -1782,7 +1889,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose5_5_5_1 TransposeT; + typedef Transpose5_5_5_1 TransposeT; typedef Format4<5, 5, 5, 1> FormatT; }; @@ -1804,7 +1911,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose5_5_5_1 TransposeT; + typedef Transpose5_5_5_1 TransposeT; typedef Format4<5, 5, 5, 1> FormatT; }; @@ -1826,7 +1933,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose4_4_4_4 TransposeT; + typedef Transpose4_4_4_4 TransposeT; typedef Format4<4, 4, 4, 4> FormatT; }; @@ -1848,7 +1955,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose4_4_4_4 TransposeT; + typedef Transpose4_4_4_4 TransposeT; typedef Format4<4, 4, 4, 4> FormatT; }; @@ -1870,7 +1977,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8 TransposeT; + typedef Transpose8_8 TransposeT; typedef Format2<8, 8> FormatT; }; @@ -1892,7 +1999,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8 TransposeT; + typedef Transpose8_8 TransposeT; typedef Format2<8, 8> FormatT; }; @@ -1914,7 +2021,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8 TransposeT; + typedef Transpose8_8 TransposeT; typedef Format2<8, 8> FormatT; }; @@ -1936,7 +2043,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8 TransposeT; + typedef Transpose8_8 TransposeT; typedef Format2<8, 8> FormatT; }; @@ -1959,7 +2066,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<16> TransposeT; - typedef Format1<16> FormatT; + typedef Format1<16> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -1981,7 +2088,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<16> TransposeT; - typedef Format1<16> FormatT; + typedef Format1<16> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2003,7 +2110,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<16> TransposeT; - typedef Format1<16> FormatT; + typedef Format1<16> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2025,7 +2132,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<16> TransposeT; - typedef Format1<16> FormatT; + typedef Format1<16> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2047,7 +2154,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<16> TransposeT; - typedef Format1<16> FormatT; + typedef Format1<16> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2069,7 +2176,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<16> TransposeT; - typedef Format1<16> FormatT; + typedef Format1<16> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2091,7 +2198,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<16> TransposeT; - typedef Format1<16> FormatT; + typedef Format1<16> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2113,7 +2220,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<16> TransposeT; - typedef Format1<16> FormatT; + typedef Format1<16> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2134,7 +2241,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8 TransposeT; + typedef Transpose8_8 TransposeT; typedef Format2<8, 8> FormatT; }; @@ -2157,7 +2264,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<16> TransposeT; - typedef Format1<16> FormatT; + typedef Format1<16> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2179,7 +2286,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<16> TransposeT; - typedef Format1<16> FormatT; + typedef Format1<16> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2201,7 +2308,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<16> TransposeT; - typedef Format1<16> FormatT; + typedef Format1<16> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2222,7 +2329,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8 TransposeT; + typedef Transpose8_8 TransposeT; typedef Format2<8, 8> FormatT; }; @@ -2244,7 +2351,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose5_5_5_1 TransposeT; + typedef Transpose5_5_5_1 TransposeT; typedef Format4<5, 5, 5, 1> FormatT; }; @@ -2266,7 +2373,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose5_5_5_1 TransposeT; + typedef Transpose5_5_5_1 TransposeT; typedef Format4<5, 5, 5, 1> FormatT; }; @@ -2288,7 +2395,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8 TransposeT; + typedef Transpose8_8 TransposeT; typedef Format2<8, 8> FormatT; }; @@ -2310,7 +2417,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8 TransposeT; + typedef Transpose8_8 TransposeT; typedef Format2<8, 8> FormatT; }; @@ -2333,7 +2440,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<16> TransposeT; - typedef Format1<16> FormatT; + typedef Format1<16> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2355,7 +2462,51 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<16> TransposeT; - typedef Format1<16> FormatT; + typedef Format1<16> FormatT; +}; + +////////////////////////////////////////////////////////////////////////// +/// FormatTraits - Format traits specialization for A1B5G5R5_UNORM +////////////////////////////////////////////////////////////////////////// +template<> struct FormatTraits : + ComponentTraits, + FormatSwizzle<3, 2, 1, 0>, + Defaults<0, 0, 0, 0x3f800000> +{ + static const uint32_t bpp{ 16 }; + static const uint32_t numComps{ 4 }; + static const bool hasAlpha{ true }; + static const uint32_t alphaComp{ 3 }; + static const bool isSRGB{ false }; + static const bool isBC{ false }; + static const bool isSubsampled{ false }; + static const uint32_t bcWidth{ 1 }; + static const uint32_t bcHeight{ 1 }; + + typedef Transpose1_5_5_5 TransposeT; + typedef Format4<1, 5, 5, 5> FormatT; +}; + +////////////////////////////////////////////////////////////////////////// +/// FormatTraits - Format traits specialization for A4B4G4R4_UNORM +////////////////////////////////////////////////////////////////////////// +template<> struct FormatTraits : + ComponentTraits, + FormatSwizzle<3, 2, 1, 0>, + Defaults<0, 0, 0, 0x3f800000> +{ + static const uint32_t bpp{ 16 }; + static const uint32_t numComps{ 4 }; + static const bool hasAlpha{ true }; + static const uint32_t alphaComp{ 3 }; + static const bool isSRGB{ false }; + static const bool isBC{ false }; + static const bool isSubsampled{ false }; + static const uint32_t bcWidth{ 1 }; + static const uint32_t bcHeight{ 1 }; + + typedef Transpose4_4_4_4 TransposeT; + typedef Format4<4, 4, 4, 4> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2376,7 +2527,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8 TransposeT; + typedef Transpose8_8 TransposeT; typedef Format2<8, 8> FormatT; }; @@ -2398,7 +2549,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8 TransposeT; + typedef Transpose8_8 TransposeT; typedef Format2<8, 8> FormatT; }; @@ -2421,7 +2572,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<8> TransposeT; - typedef Format1<8> FormatT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2443,7 +2594,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<8> TransposeT; - typedef Format1<8> FormatT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2465,7 +2616,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<8> TransposeT; - typedef Format1<8> FormatT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2487,7 +2638,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<8> TransposeT; - typedef Format1<8> FormatT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2509,7 +2660,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<8> TransposeT; - typedef Format1<8> FormatT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2531,7 +2682,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<8> TransposeT; - typedef Format1<8> FormatT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2553,7 +2704,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<8> TransposeT; - typedef Format1<8> FormatT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2575,7 +2726,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<8> TransposeT; - typedef Format1<8> FormatT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2597,7 +2748,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<8> TransposeT; - typedef Format1<8> FormatT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2619,7 +2770,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<8> TransposeT; - typedef Format1<8> FormatT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2641,7 +2792,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<8> TransposeT; - typedef Format1<8> FormatT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2663,7 +2814,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<8> TransposeT; - typedef Format1<8> FormatT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2685,7 +2836,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<8> TransposeT; - typedef Format1<8> FormatT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2707,7 +2858,7 @@ static const uint32_t bcHeight{ 1 }; typedef TransposeSingleComponent<8> TransposeT; - typedef Format1<8> FormatT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2728,7 +2879,7 @@ static const uint32_t bcWidth{ 2 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8_8_8 TransposeT; + typedef Transpose8_8_8_8 TransposeT; typedef Format4<8, 8, 8, 8> FormatT; }; @@ -2750,8 +2901,8 @@ static const uint32_t bcWidth{ 4 }; static const uint32_t bcHeight{ 4 }; - typedef TransposeSingleComponent<64> TransposeT; - typedef Format1<8> FormatT; + typedef TransposeSingleComponent<8> TransposeT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2772,8 +2923,8 @@ static const uint32_t bcWidth{ 4 }; static const uint32_t bcHeight{ 4 }; - typedef TransposeSingleComponent<128> TransposeT; - typedef Format1<8> FormatT; + typedef TransposeSingleComponent<8> TransposeT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2794,8 +2945,8 @@ static const uint32_t bcWidth{ 4 }; static const uint32_t bcHeight{ 4 }; - typedef TransposeSingleComponent<128> TransposeT; - typedef Format1<8> FormatT; + typedef TransposeSingleComponent<8> TransposeT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2816,8 +2967,8 @@ static const uint32_t bcWidth{ 4 }; static const uint32_t bcHeight{ 4 }; - typedef TransposeSingleComponent<64> TransposeT; - typedef Format1<8> FormatT; + typedef TransposeSingleComponent<8> TransposeT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2838,8 +2989,8 @@ static const uint32_t bcWidth{ 4 }; static const uint32_t bcHeight{ 4 }; - typedef TransposeSingleComponent<128> TransposeT; - typedef Format1<8> FormatT; + typedef TransposeSingleComponent<8> TransposeT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2860,8 +3011,8 @@ static const uint32_t bcWidth{ 4 }; static const uint32_t bcHeight{ 4 }; - typedef TransposeSingleComponent<64> TransposeT; - typedef Format1<8> FormatT; + typedef TransposeSingleComponent<8> TransposeT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2882,8 +3033,8 @@ static const uint32_t bcWidth{ 4 }; static const uint32_t bcHeight{ 4 }; - typedef TransposeSingleComponent<128> TransposeT; - typedef Format1<8> FormatT; + typedef TransposeSingleComponent<8> TransposeT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2904,8 +3055,8 @@ static const uint32_t bcWidth{ 4 }; static const uint32_t bcHeight{ 4 }; - typedef TransposeSingleComponent<128> TransposeT; - typedef Format1<8> FormatT; + typedef TransposeSingleComponent<8> TransposeT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -2926,7 +3077,7 @@ static const uint32_t bcWidth{ 2 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8_8_8 TransposeT; + typedef Transpose8_8_8_8 TransposeT; typedef Format4<8, 8, 8, 8> FormatT; }; @@ -2948,7 +3099,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8_8 TransposeT; + typedef Transpose8_8_8 TransposeT; typedef Format3<8, 8, 8> FormatT; }; @@ -2970,7 +3121,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8_8 TransposeT; + typedef Transpose8_8_8 TransposeT; typedef Format3<8, 8, 8> FormatT; }; @@ -2992,7 +3143,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8_8 TransposeT; + typedef Transpose8_8_8 TransposeT; typedef Format3<8, 8, 8> FormatT; }; @@ -3014,11 +3165,55 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8_8 TransposeT; + typedef Transpose8_8_8 TransposeT; typedef Format3<8, 8, 8> FormatT; }; ////////////////////////////////////////////////////////////////////////// +/// FormatTraits - Format traits specialization for R64G64B64A64_FLOAT +////////////////////////////////////////////////////////////////////////// +template<> struct FormatTraits : + ComponentTraits, + FormatSwizzle<0, 1, 2, 3>, + Defaults<0, 0, 0, 0x3f800000> +{ + static const uint32_t bpp{ 256 }; + static const uint32_t numComps{ 4 }; + static const bool hasAlpha{ true }; + static const uint32_t alphaComp{ 3 }; + static const bool isSRGB{ false }; + static const bool isBC{ false }; + static const bool isSubsampled{ false }; + static const uint32_t bcWidth{ 1 }; + static const uint32_t bcHeight{ 1 }; + + typedef Transpose64_64_64_64 TransposeT; + typedef Format4<64, 64, 64, 64> FormatT; +}; + +////////////////////////////////////////////////////////////////////////// +/// FormatTraits - Format traits specialization for R64G64B64_FLOAT +////////////////////////////////////////////////////////////////////////// +template<> struct FormatTraits : + ComponentTraits, + FormatSwizzle<0, 1, 2>, + Defaults<0, 0, 0, 0x3f800000> +{ + static const uint32_t bpp{ 192 }; + static const uint32_t numComps{ 3 }; + static const bool hasAlpha{ false }; + static const uint32_t alphaComp{ 0 }; + static const bool isSRGB{ false }; + static const bool isBC{ false }; + static const bool isSubsampled{ false }; + static const uint32_t bcWidth{ 1 }; + static const uint32_t bcHeight{ 1 }; + + typedef Transpose64_64_64 TransposeT; + typedef Format3<64, 64, 64> FormatT; +}; + +////////////////////////////////////////////////////////////////////////// /// FormatTraits - Format traits specialization for BC4_SNORM ////////////////////////////////////////////////////////////////////////// template<> struct FormatTraits : @@ -3036,8 +3231,8 @@ static const uint32_t bcWidth{ 4 }; static const uint32_t bcHeight{ 4 }; - typedef TransposeSingleComponent<64> TransposeT; - typedef Format1<8> FormatT; + typedef TransposeSingleComponent<8> TransposeT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -3058,8 +3253,8 @@ static const uint32_t bcWidth{ 4 }; static const uint32_t bcHeight{ 4 }; - typedef TransposeSingleComponent<128> TransposeT; - typedef Format1<8> FormatT; + typedef TransposeSingleComponent<8> TransposeT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -3080,7 +3275,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose16_16_16 TransposeT; + typedef Transpose16_16_16 TransposeT; typedef Format3<16, 16, 16> FormatT; }; @@ -3102,7 +3297,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose16_16_16 TransposeT; + typedef Transpose16_16_16 TransposeT; typedef Format3<16, 16, 16> FormatT; }; @@ -3124,7 +3319,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose16_16_16 TransposeT; + typedef Transpose16_16_16 TransposeT; typedef Format3<16, 16, 16> FormatT; }; @@ -3146,7 +3341,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose16_16_16 TransposeT; + typedef Transpose16_16_16 TransposeT; typedef Format3<16, 16, 16> FormatT; }; @@ -3168,7 +3363,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose16_16_16 TransposeT; + typedef Transpose16_16_16 TransposeT; typedef Format3<16, 16, 16> FormatT; }; @@ -3190,8 +3385,8 @@ static const uint32_t bcWidth{ 4 }; static const uint32_t bcHeight{ 4 }; - typedef TransposeSingleComponent<128> TransposeT; - typedef Format1<8> FormatT; + typedef TransposeSingleComponent<8> TransposeT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -3212,8 +3407,8 @@ static const uint32_t bcWidth{ 4 }; static const uint32_t bcHeight{ 4 }; - typedef TransposeSingleComponent<128> TransposeT; - typedef Format1<8> FormatT; + typedef TransposeSingleComponent<8> TransposeT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -3234,8 +3429,8 @@ static const uint32_t bcWidth{ 4 }; static const uint32_t bcHeight{ 4 }; - typedef TransposeSingleComponent<128> TransposeT; - typedef Format1<8> FormatT; + typedef TransposeSingleComponent<8> TransposeT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -3256,8 +3451,8 @@ static const uint32_t bcWidth{ 4 }; static const uint32_t bcHeight{ 4 }; - typedef TransposeSingleComponent<128> TransposeT; - typedef Format1<8> FormatT; + typedef TransposeSingleComponent<8> TransposeT; + typedef Format1<8> FormatT; }; ////////////////////////////////////////////////////////////////////////// @@ -3278,7 +3473,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8_8 TransposeT; + typedef Transpose8_8_8 TransposeT; typedef Format3<8, 8, 8> FormatT; }; @@ -3300,7 +3495,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose16_16_16 TransposeT; + typedef Transpose16_16_16 TransposeT; typedef Format3<16, 16, 16> FormatT; }; @@ -3322,11 +3517,33 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose16_16_16 TransposeT; + typedef Transpose16_16_16 TransposeT; typedef Format3<16, 16, 16> FormatT; }; ////////////////////////////////////////////////////////////////////////// +/// FormatTraits - Format traits specialization for R32_SFIXED +////////////////////////////////////////////////////////////////////////// +template<> struct FormatTraits : + ComponentTraits, + FormatSwizzle<0>, + Defaults<0, 0, 0, 0x3f800000> +{ + static const uint32_t bpp{ 32 }; + static const uint32_t numComps{ 1 }; + static const bool hasAlpha{ false }; + static const uint32_t alphaComp{ 0 }; + static const bool isSRGB{ false }; + static const bool isBC{ false }; + static const bool isSubsampled{ false }; + static const uint32_t bcWidth{ 1 }; + static const uint32_t bcHeight{ 1 }; + + typedef TransposeSingleComponent<32> TransposeT; + typedef Format1<32> FormatT; +}; + +////////////////////////////////////////////////////////////////////////// /// FormatTraits - Format traits specialization for R10G10B10A2_SNORM ////////////////////////////////////////////////////////////////////////// template<> struct FormatTraits : @@ -3344,7 +3561,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose10_10_10_2 TransposeT; + typedef Transpose10_10_10_2 TransposeT; typedef Format4<10, 10, 10, 2> FormatT; }; @@ -3366,7 +3583,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose10_10_10_2 TransposeT; + typedef Transpose10_10_10_2 TransposeT; typedef Format4<10, 10, 10, 2> FormatT; }; @@ -3388,7 +3605,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose10_10_10_2 TransposeT; + typedef Transpose10_10_10_2 TransposeT; typedef Format4<10, 10, 10, 2> FormatT; }; @@ -3410,7 +3627,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose10_10_10_2 TransposeT; + typedef Transpose10_10_10_2 TransposeT; typedef Format4<10, 10, 10, 2> FormatT; }; @@ -3432,7 +3649,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose10_10_10_2 TransposeT; + typedef Transpose10_10_10_2 TransposeT; typedef Format4<10, 10, 10, 2> FormatT; }; @@ -3454,7 +3671,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose10_10_10_2 TransposeT; + typedef Transpose10_10_10_2 TransposeT; typedef Format4<10, 10, 10, 2> FormatT; }; @@ -3476,7 +3693,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose10_10_10_2 TransposeT; + typedef Transpose10_10_10_2 TransposeT; typedef Format4<10, 10, 10, 2> FormatT; }; @@ -3498,7 +3715,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose10_10_10_2 TransposeT; + typedef Transpose10_10_10_2 TransposeT; typedef Format4<10, 10, 10, 2> FormatT; }; @@ -3520,7 +3737,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose10_10_10_2 TransposeT; + typedef Transpose10_10_10_2 TransposeT; typedef Format4<10, 10, 10, 2> FormatT; }; @@ -3542,7 +3759,7 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8_8 TransposeT; + typedef Transpose8_8_8 TransposeT; typedef Format3<8, 8, 8> FormatT; }; @@ -3564,7 +3781,28 @@ static const uint32_t bcWidth{ 1 }; static const uint32_t bcHeight{ 1 }; - typedef Transpose8_8_8 TransposeT; + typedef Transpose8_8_8 TransposeT; typedef Format3<8, 8, 8> FormatT; }; +////////////////////////////////////////////////////////////////////////// +/// FormatTraits - Format traits specialization for RAW +////////////////////////////////////////////////////////////////////////// +template<> struct FormatTraits : + ComponentTraits, + FormatSwizzle<0>, + Defaults<0, 0, 0, 0x1> +{ + static const uint32_t bpp{ 8 }; + static const uint32_t numComps{ 1 }; + static const bool hasAlpha{ false }; + static const uint32_t alphaComp{ 3 }; + static const bool isSRGB{ false }; + static const bool isBC{ false }; + static const bool isSubsampled{ false }; + static const uint32_t bcWidth{ 1 }; + static const uint32_t bcHeight{ 1 }; + + typedef TransposeSingleComponent<8> TransposeT; + typedef Format1<8> FormatT; +}; diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/format_types.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/format_types.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/format_types.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/format_types.h 2017-06-01 10:37:10.000000000 +0000 @@ -40,6 +40,12 @@ static void storeSOA(uint8_t *pDst, simdscalar src) = delete; static simdscalar unpack(simdscalar &in) = delete; static simdscalar pack(simdscalar &in) = delete; +#if ENABLE_AVX512_SIMD16 + static simd16scalar loadSOA_16(const uint8_t *pSrc) = delete; + static void storeSOA(uint8_t *pDst, simd16scalar src) = delete; + static simd16scalar unpack(simd16scalar &in) = delete; + static simd16scalar pack(simd16scalar &in) = delete; +#endif }; ////////////////////////////////////////////////////////////////////////// @@ -54,9 +60,14 @@ static void storeSOA(uint8_t *pDst, simdscalar src) { return; } static simdscalar unpack(simdscalar &in) { return _simd_setzero_ps(); } static simdscalar pack(simdscalar &in) { return _simd_setzero_ps(); } +#if ENABLE_AVX512_SIMD16 + static simd16scalar loadSOA_16(const uint8_t *pSrc) { return _simd16_setzero_ps(); } + static void storeSOA(uint8_t *pDst, simd16scalar src) { return; } + static simd16scalar unpack(simd16scalar &in) { return _simd16_setzero_ps(); } + static simd16scalar pack(simd16scalar &in) { return _simd16_setzero_ps(); } +#endif }; - ////////////////////////////////////////////////////////////////////////// /// PackTraits - Helpers for packing / unpacking 8 bit unsigned channels ////////////////////////////////////////////////////////////////////////// @@ -98,7 +109,7 @@ __m256i result = _mm256_castsi128_si256(resLo); result = _mm256_insertf128_si256(result, resHi, 1); return _mm256_castsi256_ps(result); -#elif KNOB_ARCH==KNOB_ARCH_AVX2 +#elif KNOB_ARCH>=KNOB_ARCH_AVX2 return _mm256_castsi256_ps(_mm256_cvtepu8_epi32(_mm_castps_si128(_mm256_castps256_ps128(in)))); #endif #else @@ -117,6 +128,58 @@ #error Unsupported vector width #endif } +#if ENABLE_AVX512_SIMD16 + + static simd16scalar loadSOA_16(const uint8_t *pSrc) + { + simd16scalar result = _simd16_setzero_ps(); + simdscalar resultlo = _simd_setzero_ps(); + + const __m128 src = _mm_load_ps(reinterpret_cast(pSrc)); + + resultlo = _mm256_insertf128_ps(resultlo, src, 0); + result = _simd16_insert_ps(result, resultlo, 0); + + return result; + } + + static void storeSOA(uint8_t *pDst, simd16scalar src) + { + // store simd16 bytes + _mm_store_ps(reinterpret_cast(pDst), _mm256_castps256_ps128(_simd16_extract_ps(src, 0))); + } + + static simd16scalar unpack(simd16scalar &in) + { + simd16scalari result = _simd16_cvtepu8_epi32(_mm_castps_si128(_mm256_castps256_ps128(_simd16_extract_ps(in, 0)))); + + return _simd16_castsi_ps(result); + } + + static simd16scalar pack(simd16scalar &in) + { + simd16scalari result = _simd16_setzero_si(); + + simdscalari inlo = _simd_castps_si(_simd16_extract_ps(in, 0)); // r0 r1 r2 r3 r4 r5 r6 r7 (32b) + simdscalari inhi = _simd_castps_si(_simd16_extract_ps(in, 1)); // r8 r9 rA rB rC rD rE rF + + simdscalari permlo = _simd_permute2f128_si(inlo, inhi, 0x20); // r0 r1 r2 r3 r8 r9 rA rB (32b) + simdscalari permhi = _simd_permute2f128_si(inlo, inhi, 0x31); // r4 r5 r6 r7 rC rD rE rF (32b) + + simdscalari pack = _simd_packus_epi32(permlo, permhi); // r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 rA rB rC rD rE rF (16b) + + const simdscalari zero = _simd_setzero_si(); + + permlo = _simd_permute2f128_si(pack, zero, 0x20); // (2, 0) // r0 r1 r2 r3 r4 r5 r6 r7 00 00 00 00 00 00 00 00 (16b) + permhi = _simd_permute2f128_si(pack, zero, 0x31); // (3, 1) // r8 r9 rA rB rC rD rE rF 00 00 00 00 00 00 00 00 (16b) + + pack = _simd_packus_epi16(permlo, permhi); // r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 rA rB rC rD rE rF 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 (8b) + + result = _simd16_insert_si(result, pack, 0); + + return _simd16_castsi_ps(result); + } +#endif }; ////////////////////////////////////////////////////////////////////////// @@ -161,7 +224,7 @@ __m256i result = _mm256_castsi128_si256(resLo); result = _mm256_insertf128_si256(result, resHi, 1); return _mm256_castsi256_ps(result); -#elif KNOB_ARCH==KNOB_ARCH_AVX2 +#elif KNOB_ARCH>=KNOB_ARCH_AVX2 return _mm256_castsi256_ps(_mm256_cvtepi8_epi32(_mm_castps_si128(_mm256_castps256_ps128(in)))); #endif #else @@ -180,6 +243,58 @@ #error Unsupported vector width #endif } +#if ENABLE_AVX512_SIMD16 + + static simd16scalar loadSOA_16(const uint8_t *pSrc) + { + simd16scalar result = _simd16_setzero_ps(); + simdscalar resultlo = _simd_setzero_ps(); + + const __m128 src = _mm_load_ps(reinterpret_cast(pSrc)); + + resultlo = _mm256_insertf128_ps(resultlo, src, 0); + result = _simd16_insert_ps(result, resultlo, 0); + + return result; + } + + static void storeSOA(uint8_t *pDst, simd16scalar src) + { + // store simd16 bytes + _mm_store_ps(reinterpret_cast(pDst), _mm256_castps256_ps128(_simd16_extract_ps(src, 0))); + } + + static simd16scalar unpack(simd16scalar &in) + { + simd16scalari result = _simd16_cvtepu8_epi32(_mm_castps_si128(_mm256_castps256_ps128(_simd16_extract_ps(in, 0)))); + + return _simd16_castsi_ps(result); + } + + static simd16scalar pack(simd16scalar &in) + { + simd16scalari result = _simd16_setzero_si(); + + simdscalari inlo = _simd_castps_si(_simd16_extract_ps(in, 0)); // r0 r1 r2 r3 r4 r5 r6 r7 (32b) + simdscalari inhi = _simd_castps_si(_simd16_extract_ps(in, 1)); // r8 r9 rA rB rC rD rE rF + + simdscalari permlo = _simd_permute2f128_si(inlo, inhi, 0x20); // r0 r1 r2 r3 r8 r9 rA rB (32b) + simdscalari permhi = _simd_permute2f128_si(inlo, inhi, 0x31); // r4 r5 r6 r7 rC rD rE rF (32b) + + simdscalari pack = _simd_packs_epi32(permlo, permhi); // r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 rA rB rC rD rE rF (16b) + + const simdscalari zero = _simd_setzero_si(); + + permlo = _simd_permute2f128_si(pack, zero, 0x20); // (2, 0) // r0 r1 r2 r3 r4 r5 r6 r7 00 00 00 00 00 00 00 00 (16b) + permhi = _simd_permute2f128_si(pack, zero, 0x31); // (3, 1) // r8 r9 rA rB rC rD rE rF 00 00 00 00 00 00 00 00 (16b) + + pack = _simd_packs_epi16(permlo, permhi); // r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 rA rB rC rD rE rF 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 (8b) + + result = _simd16_insert_si(result, pack, 0); + + return _simd16_castsi_ps(result); + } +#endif }; ////////////////////////////////////////////////////////////////////////// @@ -223,7 +338,7 @@ __m256i result = _mm256_castsi128_si256(resLo); result = _mm256_insertf128_si256(result, resHi, 1); return _mm256_castsi256_ps(result); -#elif KNOB_ARCH==KNOB_ARCH_AVX2 +#elif KNOB_ARCH>=KNOB_ARCH_AVX2 return _mm256_castsi256_ps(_mm256_cvtepu16_epi32(_mm_castps_si128(_mm256_castps256_ps128(in)))); #endif #else @@ -241,6 +356,43 @@ #error Unsupported vector width #endif } +#if ENABLE_AVX512_SIMD16 + + static simd16scalar loadSOA_16(const uint8_t *pSrc) + { + simd16scalar result = _simd16_setzero_ps(); + + simdscalar resultlo = _simd_load_ps(reinterpret_cast(pSrc)); + + result = _simd16_insert_ps(result, resultlo, 0); + + return result; + } + + static void storeSOA(uint8_t *pDst, simd16scalar src) + { + _simd_store_ps(reinterpret_cast(pDst), _simd16_extract_ps(src, 0)); + } + + static simd16scalar unpack(simd16scalar &in) + { + simd16scalari result = _simd16_cvtepu16_epi32(_simd_castps_si(_simd16_extract_ps(in, 0))); + + return _simd16_castsi_ps(result); + } + + static simd16scalar pack(simd16scalar &in) + { + const simd16scalari zero = _simd16_setzero_si(); + + simd16scalari permlo = _simd16_permute2f128_si(_simd16_castps_si(in), zero, 0x08); // (0, 0, 2, 0) // r0 r1 r2 r3 r8 r9 rA rB 00 00 00 00 00 00 00 00 (32b) + simd16scalari permhi = _simd16_permute2f128_si(_simd16_castps_si(in), zero, 0x0D); // (0, 0, 3, 1) // r4 r5 r6 r7 rC rD rE rF 00 00 00 00 00 00 00 00 + + simd16scalari result = _simd16_packus_epi32(permlo, permhi); // r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 rA rB rC rD rE rF 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 (16b) + + return _simd16_castsi_ps(result); + } +#endif }; ////////////////////////////////////////////////////////////////////////// @@ -285,7 +437,7 @@ __m256i result = _mm256_castsi128_si256(resLo); result = _mm256_insertf128_si256(result, resHi, 1); return _mm256_castsi256_ps(result); -#elif KNOB_ARCH==KNOB_ARCH_AVX2 +#elif KNOB_ARCH>=KNOB_ARCH_AVX2 return _mm256_castsi256_ps(_mm256_cvtepi16_epi32(_mm_castps_si128(_mm256_castps256_ps128(in)))); #endif #else @@ -303,6 +455,43 @@ #error Unsupported vector width #endif } +#if ENABLE_AVX512_SIMD16 + + static simd16scalar loadSOA_16(const uint8_t *pSrc) + { + simd16scalar result = _simd16_setzero_ps(); + + simdscalar resultlo = _simd_load_ps(reinterpret_cast(pSrc)); + + result = _simd16_insert_ps(result, resultlo, 0); + + return result; + } + + static void storeSOA(uint8_t *pDst, simd16scalar src) + { + _simd_store_ps(reinterpret_cast(pDst), _simd16_extract_ps(src, 0)); + } + + static simd16scalar unpack(simd16scalar &in) + { + simd16scalari result = _simd16_cvtepu16_epi32(_simd_castps_si(_simd16_extract_ps(in, 0))); + + return _simd16_castsi_ps(result); + } + + static simd16scalar pack(simd16scalar &in) + { + const simd16scalari zero = _simd16_setzero_si(); + + simd16scalari permlo = _simd16_permute2f128_si(_simd16_castps_si(in), zero, 0x08); // (0, 0, 2, 0) // r0 r1 r2 r3 r8 r9 rA rB 00 00 00 00 00 00 00 00 (32b) + simd16scalari permhi = _simd16_permute2f128_si(_simd16_castps_si(in), zero, 0x0D); // (0, 0, 3, 1) // r4 r5 r6 r7 rC rD rE rF 00 00 00 00 00 00 00 00 + + simd16scalari result = _simd16_packs_epi32(permlo, permhi); // r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 rA rB rC rD rE rF 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 (16b) + + return _simd16_castsi_ps(result); + } +#endif }; ////////////////////////////////////////////////////////////////////////// @@ -317,6 +506,28 @@ static void storeSOA(uint8_t *pDst, simdscalar src) { _simd_store_ps((float*)pDst, src); } static simdscalar unpack(simdscalar &in) { return in; } static simdscalar pack(simdscalar &in) { return in; } +#if ENABLE_AVX512_SIMD16 + + static simd16scalar loadSOA_16(const uint8_t *pSrc) + { + return _simd16_load_ps(reinterpret_cast(pSrc)); + } + + static void storeSOA(uint8_t *pDst, simd16scalar src) + { + _simd16_store_ps(reinterpret_cast(pDst), src); + } + + static simd16scalar unpack(simd16scalar &in) + { + return in; + } + + static simd16scalar pack(simd16scalar &in) + { + return in; + } +#endif }; ////////////////////////////////////////////////////////////////////////// @@ -531,10 +742,10 @@ { float *f = (float *)(&Base); - return _mm_set_ps(powf(f[0], Exp), - powf(f[1], Exp), + return _mm_set_ps(powf(f[3], Exp), powf(f[2], Exp), - powf(f[3], Exp)); + powf(f[1], Exp), + powf(f[0], Exp)); } static inline __m128 ConvertFloatToSRGB2(__m128& Src) @@ -598,6 +809,115 @@ return Result; } +#if ENABLE_AVX512_SIMD16 +template< unsigned expnum, unsigned expden, unsigned coeffnum, unsigned coeffden > +inline static simd16scalar fastpow(simd16scalar value) +{ + static const float factor1 = exp2(127.0f * expden / expnum - 127.0f) + * powf(1.0f * coeffnum / coeffden, 1.0f * expden / expnum); + + // Apply a constant pre-correction factor. + simd16scalar result = _simd16_mul_ps(value, _simd16_set1_ps(factor1)); + + // Reinterpret arg as integer to obtain logarithm. + //asm("cvtdq2ps %1, %0" : "=x" (result) : "x" (result)); + result = _simd16_cvtepi32_ps(_simd16_castps_si(result)); + + // Multiply logarithm by power. + result = _simd16_mul_ps(result, _simd16_set1_ps(1.0f * expnum / expden)); + + // Convert back to "integer" to exponentiate. + //asm("cvtps2dq %1, %0" : "=x" (result) : "x" (result)); + result = _simd16_castsi_ps(_simd16_cvtps_epi32(result)); + + return result; +} + +inline static simd16scalar pow512_4(simd16scalar arg) +{ + // 5/12 is too small, so compute the 4th root of 20/12 instead. + // 20/12 = 5/3 = 1 + 2/3 = 2 - 1/3. 2/3 is a suitable argument for fastpow. + // weighting coefficient: a^-1/2 = 2 a; a = 2^-2/3 + simd16scalar xf = fastpow< 2, 3, int(0.629960524947437 * 1e9), int(1e9) >(arg); + simd16scalar xover = _simd16_mul_ps(arg, xf); + + simd16scalar xfm1 = _simd16_rsqrt_ps(xf); + simd16scalar x2 = _simd16_mul_ps(arg, arg); + simd16scalar xunder = _simd16_mul_ps(x2, xfm1); + + // sqrt2 * over + 2 * sqrt2 * under + simd16scalar xavg = _simd16_mul_ps(_simd16_set1_ps(1.0f / (3.0f * 0.629960524947437f) * 0.999852f), _simd16_add_ps(xover, xunder)); + + xavg = _simd16_mul_ps(xavg, _simd16_rsqrt_ps(xavg)); + xavg = _simd16_mul_ps(xavg, _simd16_rsqrt_ps(xavg)); + + return xavg; +} + +inline static simd16scalar powf_wrapper(const simd16scalar base, float exp) +{ + const float *f = reinterpret_cast(&base); + + return _simd16_set_ps( + powf(f[15], exp), + powf(f[14], exp), + powf(f[13], exp), + powf(f[12], exp), + powf(f[11], exp), + powf(f[10], exp), + powf(f[ 9], exp), + powf(f[ 8], exp), + powf(f[ 7], exp), + powf(f[ 6], exp), + powf(f[ 5], exp), + powf(f[ 4], exp), + powf(f[ 3], exp), + powf(f[ 2], exp), + powf(f[ 1], exp), + powf(f[ 0], exp) + ); +} + +// float to SRGB conversion formula +// +// if (value < 0.0031308f) +// value *= 12.92f; +// else +// value = 1.055f * pow(value, 1.0f / 2.4f) - 0.055f; +// +static inline simd16scalar ConvertFloatToSRGB2(const simd16scalar &value) +{ + // create a mask where the source is < the minimal SRGB float value + const simd16mask mask = _simd16_cmplt_ps_mask(value, _simd16_set1_ps(0.0031308f)); + + // if all elements are < the threshold, result = value * 12.92 + simd16scalar result = _simd16_mul_ps(value, _simd16_set1_ps(12.92f)); + + if (_simd16_mask2int(mask) != 0xFFFF) + { + // some elements are >= threshold, result = 1.055 * power(value, 1.0 / 2.4) - 0.055 +#if KNOB_USE_FAST_SRGB == TRUE + // 1.0f / 2.4f is 5.0f / 12.0f which is used for approximation. + simd16scalar result2 = pow512_4(value); +#else + simd16scalar result2 = powf_wrapper(value, 1.0f / 2.4f); +#endif + + result2 = _simd16_mul_ps(result2, _simd16_set1_ps(1.055f)); + result2 = _simd16_sub_ps(result2, _simd16_set1_ps(0.055f)); + +#if (KNOB_ARCH == KNOB_ARCH_AVX512) + // only native AVX512 can directly use the computed mask for the blend operation + result = _mm512_mask_blend_ps(mask, result2, result); +#else + result = _simd16_blendv_ps(result2, result, _simd16_cmplt_ps(value, _simd16_set1_ps(0.0031308f))); +#endif + } + + return result; +} + +#endif ////////////////////////////////////////////////////////////////////////// /// TypeTraits - Format type traits specialization for FLOAT16 ////////////////////////////////////////////////////////////////////////// @@ -720,6 +1040,40 @@ SWR_ASSERT(0); // @todo return _simd_setzero_ps(); } +#if ENABLE_AVX512_SIMD16 + + static simd16scalar pack(const simd16scalar &in) + { + simd16scalari result = _simd16_setzero_si(); + simdscalari resultlo = _simd_setzero_si(); + +#if (KNOB_ARCH == KNOB_ARCH_AVX) + simdscalar simdlo = pack(_simd16_extract_ps(in, 0)); + simdscalar simdhi = pack(_simd16_extract_ps(in, 1)); + + __m128i templo = _simd_extractf128_si(_simd_castps_si(simdlo), 0); + __m128i temphi = _simd_extractf128_si(_simd_castps_si(simdhi), 0); + +#else + __m128i templo = _mm256_cvtps_ph(_simd16_extract_ps(in, 0), _MM_FROUND_TRUNC); + __m128i temphi = _mm256_cvtps_ph(_simd16_extract_ps(in, 1), _MM_FROUND_TRUNC); + +#endif + resultlo = _simd_insertf128_si(resultlo, templo, 0); + resultlo = _simd_insertf128_si(resultlo, temphi, 1); + + result = _simd16_insert_si(result, resultlo, 0); + + return _simd16_castsi_ps(result); + } + + static simd16scalar unpack(const simd16scalar &in) + { + // input is 16 packed float16, output is 16 packed float32 + SWR_ASSERT(0); // @todo + return _simd16_setzero_ps(); + } +#endif }; ////////////////////////////////////////////////////////////////////////// @@ -732,6 +1086,7 @@ static float fromFloat() { return 1.0f; } static inline simdscalar convertSrgb(simdscalar &in) { +#if KNOB_SIMD_WIDTH == 8 #if (KNOB_ARCH == KNOB_ARCH_AVX || KNOB_ARCH == KNOB_ARCH_AVX2) __m128 srcLo = _mm256_extractf128_ps(in, 0); __m128 srcHi = _mm256_extractf128_ps(in, 1); @@ -741,10 +1096,19 @@ in = _mm256_insertf128_ps(in, srcLo, 0); in = _mm256_insertf128_ps(in, srcHi, 1); - +#endif +#else +#error Unsupported vector width #endif return in; } +#if ENABLE_AVX512_SIMD16 + + static inline simd16scalar convertSrgb(simd16scalar &in) + { + return ConvertFloatToSRGB2(in); + } +#endif }; ////////////////////////////////////////////////////////////////////////// @@ -1073,4 +1437,95 @@ SWR_ASSERT(0); return TypeTraits::convertSrgb(in); } +#if ENABLE_AVX512_SIMD16 + + INLINE static simd16scalar loadSOA_16(uint32_t comp, const uint8_t* pSrc) + { + switch (comp) + { + case 0: + return TypeTraits::loadSOA_16(pSrc); + case 1: + return TypeTraits::loadSOA_16(pSrc); + case 2: + return TypeTraits::loadSOA_16(pSrc); + case 3: + return TypeTraits::loadSOA_16(pSrc); + } + SWR_ASSERT(0); + return TypeTraits::loadSOA_16(pSrc); + } + + INLINE static void storeSOA(uint32_t comp, uint8_t *pDst, simd16scalar src) + { + switch (comp) + { + case 0: + TypeTraits::storeSOA(pDst, src); + return; + case 1: + TypeTraits::storeSOA(pDst, src); + return; + case 2: + TypeTraits::storeSOA(pDst, src); + return; + case 3: + TypeTraits::storeSOA(pDst, src); + return; + } + SWR_ASSERT(0); + TypeTraits::storeSOA(pDst, src); + } + + INLINE static simd16scalar unpack(uint32_t comp, simd16scalar &in) + { + switch (comp) + { + case 0: + return TypeTraits::unpack(in); + case 1: + return TypeTraits::unpack(in); + case 2: + return TypeTraits::unpack(in); + case 3: + return TypeTraits::unpack(in); + } + SWR_ASSERT(0); + return TypeTraits::unpack(in); + } + + INLINE static simd16scalar pack(uint32_t comp, simd16scalar &in) + { + switch (comp) + { + case 0: + return TypeTraits::pack(in); + case 1: + return TypeTraits::pack(in); + case 2: + return TypeTraits::pack(in); + case 3: + return TypeTraits::pack(in); + } + SWR_ASSERT(0); + return TypeTraits::pack(in); + } + + INLINE static simd16scalar convertSrgb(uint32_t comp, simd16scalar &in) + { + switch (comp) + { + case 0: + return TypeTraits::convertSrgb(in); + case 1: + return TypeTraits::convertSrgb(in); + case 2: + return TypeTraits::convertSrgb(in); + case 3: + return TypeTraits::convertSrgb(in); + } + SWR_ASSERT(0); + return TypeTraits::convertSrgb(in); + } +#endif }; diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/frontend.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/frontend.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/frontend.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/frontend.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -32,7 +32,6 @@ #include "backend.h" #include "context.h" #include "rdtsc_core.h" -#include "rasterizer.h" #include "utils.h" #include "threads.h" #include "pa.h" @@ -50,15 +49,6 @@ } ////////////////////////////////////////////////////////////////////////// -/// @brief Offsets added to post-viewport vertex positions based on -/// raster state. -static const simdscalar g_pixelOffsets[SWR_PIXEL_LOCATION_UL + 1] = -{ - _simd_set1_ps(0.0f), // SWR_PIXEL_LOCATION_CENTER - _simd_set1_ps(0.5f), // SWR_PIXEL_LOCATION_UL -}; - -////////////////////////////////////////////////////////////////////////// /// @brief FE handler for SwrSync. /// @param pContext - pointer to SWR context. /// @param pDC - pointer to draw context. @@ -71,37 +61,42 @@ uint32_t workerId, void *pUserData) { - SYNC_DESC *pSync = (SYNC_DESC*)pUserData; BE_WORK work; work.type = SYNC; work.pfnWork = ProcessSyncBE; - work.desc.sync = *pSync; MacroTileMgr *pTileMgr = pDC->pTileMgr; pTileMgr->enqueue(0, 0, &work); } ////////////////////////////////////////////////////////////////////////// -/// @brief FE handler for SwrGetStats. +/// @brief FE handler for SwrDestroyContext. /// @param pContext - pointer to SWR context. /// @param pDC - pointer to draw context. /// @param workerId - thread's worker id. Even thread has a unique id. -/// @param pUserData - Pointer to user data passed back to stats callback. -/// @todo This should go away when we switch this to use compute threading. -void ProcessQueryStats( +/// @param pUserData - Pointer to user data passed back to sync callback. +void ProcessShutdown( SWR_CONTEXT *pContext, DRAW_CONTEXT *pDC, uint32_t workerId, void *pUserData) { - QUERY_DESC *pQueryStats = (QUERY_DESC*)pUserData; BE_WORK work; - work.type = QUERYSTATS; - work.pfnWork = ProcessQueryStatsBE; - work.desc.queryStats = *pQueryStats; + work.type = SHUTDOWN; + work.pfnWork = ProcessShutdownBE; MacroTileMgr *pTileMgr = pDC->pTileMgr; - pTileMgr->enqueue(0, 0, &work); + // Enqueue at least 1 work item for each worker thread + // account for number of numa nodes + uint32_t numNumaNodes = pContext->threadPool.numaMask + 1; + + for (uint32_t i = 0; i < pContext->threadPool.numThreads; ++i) + { + for (uint32_t n = 0; n < numNumaNodes; ++n) + { + pTileMgr->enqueue(i, n, &work); + } + } } ////////////////////////////////////////////////////////////////////////// @@ -117,26 +112,24 @@ uint32_t workerId, void *pUserData) { - CLEAR_DESC *pClear = (CLEAR_DESC*)pUserData; + CLEAR_DESC *pDesc = (CLEAR_DESC*)pUserData; MacroTileMgr *pTileMgr = pDC->pTileMgr; - const API_STATE& state = GetApiState(pDC); - // queue a clear to each macro tile - // compute macro tile bounds for the current scissor/viewport - uint32_t macroTileLeft = state.scissorInFixedPoint.left / KNOB_MACROTILE_X_DIM_FIXED; - uint32_t macroTileRight = state.scissorInFixedPoint.right / KNOB_MACROTILE_X_DIM_FIXED; - uint32_t macroTileTop = state.scissorInFixedPoint.top / KNOB_MACROTILE_Y_DIM_FIXED; - uint32_t macroTileBottom = state.scissorInFixedPoint.bottom / KNOB_MACROTILE_Y_DIM_FIXED; + // compute macro tile bounds for the specified rect + uint32_t macroTileXMin = pDesc->rect.xmin / KNOB_MACROTILE_X_DIM; + uint32_t macroTileXMax = (pDesc->rect.xmax - 1) / KNOB_MACROTILE_X_DIM; + uint32_t macroTileYMin = pDesc->rect.ymin / KNOB_MACROTILE_Y_DIM; + uint32_t macroTileYMax = (pDesc->rect.ymax - 1) / KNOB_MACROTILE_Y_DIM; BE_WORK work; work.type = CLEAR; work.pfnWork = ProcessClearBE; - work.desc.clear = *pClear; + work.desc.clear = *pDesc; - for (uint32_t y = macroTileTop; y <= macroTileBottom; ++y) + for (uint32_t y = macroTileYMin; y <= macroTileYMax; ++y) { - for (uint32_t x = macroTileLeft; x <= macroTileRight; ++x) + for (uint32_t x = macroTileXMin; x <= macroTileXMax; ++x) { pTileMgr->enqueue(x, y, &work); } @@ -156,35 +149,32 @@ uint32_t workerId, void *pUserData) { - RDTSC_START(FEProcessStoreTiles); - STORE_TILES_DESC *pStore = (STORE_TILES_DESC*)pUserData; + AR_BEGIN(FEProcessStoreTiles, pDC->drawId); MacroTileMgr *pTileMgr = pDC->pTileMgr; - - const API_STATE& state = GetApiState(pDC); + STORE_TILES_DESC* pDesc = (STORE_TILES_DESC*)pUserData; // queue a store to each macro tile - // compute macro tile bounds for the current render target - const uint32_t macroWidth = KNOB_MACROTILE_X_DIM; - const uint32_t macroHeight = KNOB_MACROTILE_Y_DIM; - - uint32_t numMacroTilesX = ((uint32_t)state.vp[0].width + (uint32_t)state.vp[0].x + (macroWidth - 1)) / macroWidth; - uint32_t numMacroTilesY = ((uint32_t)state.vp[0].height + (uint32_t)state.vp[0].y + (macroHeight - 1)) / macroHeight; + // compute macro tile bounds for the specified rect + uint32_t macroTileXMin = pDesc->rect.xmin / KNOB_MACROTILE_X_DIM; + uint32_t macroTileXMax = (pDesc->rect.xmax - 1) / KNOB_MACROTILE_X_DIM; + uint32_t macroTileYMin = pDesc->rect.ymin / KNOB_MACROTILE_Y_DIM; + uint32_t macroTileYMax = (pDesc->rect.ymax - 1) / KNOB_MACROTILE_Y_DIM; // store tiles BE_WORK work; work.type = STORETILES; - work.pfnWork = ProcessStoreTileBE; - work.desc.storeTiles = *pStore; + work.pfnWork = ProcessStoreTilesBE; + work.desc.storeTiles = *pDesc; - for (uint32_t x = 0; x < numMacroTilesX; ++x) + for (uint32_t y = macroTileYMin; y <= macroTileYMax; ++y) { - for (uint32_t y = 0; y < numMacroTilesY; ++y) + for (uint32_t x = macroTileXMin; x <= macroTileXMax; ++x) { pTileMgr->enqueue(x, y, &work); } } - RDTSC_STOP(FEProcessStoreTiles, 0, pDC->drawId); + AR_END(FEProcessStoreTiles, 0); } ////////////////////////////////////////////////////////////////////////// @@ -200,71 +190,46 @@ uint32_t workerId, void *pUserData) { - RDTSC_START(FEProcessInvalidateTiles); - DISCARD_INVALIDATE_TILES_DESC *pInv = (DISCARD_INVALIDATE_TILES_DESC*)pUserData; + AR_BEGIN(FEProcessInvalidateTiles, pDC->drawId); + DISCARD_INVALIDATE_TILES_DESC *pDesc = (DISCARD_INVALIDATE_TILES_DESC*)pUserData; MacroTileMgr *pTileMgr = pDC->pTileMgr; - SWR_RECT rect; + // compute macro tile bounds for the specified rect + uint32_t macroTileXMin = (pDesc->rect.xmin + KNOB_MACROTILE_X_DIM - 1) / KNOB_MACROTILE_X_DIM; + uint32_t macroTileXMax = (pDesc->rect.xmax / KNOB_MACROTILE_X_DIM) - 1; + uint32_t macroTileYMin = (pDesc->rect.ymin + KNOB_MACROTILE_Y_DIM - 1) / KNOB_MACROTILE_Y_DIM; + uint32_t macroTileYMax = (pDesc->rect.ymax / KNOB_MACROTILE_Y_DIM) - 1; - if (pInv->rect.top | pInv->rect.bottom | pInv->rect.right | pInv->rect.left) - { - // Valid rect - rect = pInv->rect; - } - else - { - // Use viewport dimensions - const API_STATE& state = GetApiState(pDC); - - rect.left = (uint32_t)state.vp[0].x; - rect.right = (uint32_t)(state.vp[0].x + state.vp[0].width); - rect.top = (uint32_t)state.vp[0].y; - rect.bottom = (uint32_t)(state.vp[0].y + state.vp[0].height); - } - - // queue a store to each macro tile - // compute macro tile bounds for the current render target - uint32_t macroWidth = KNOB_MACROTILE_X_DIM; - uint32_t macroHeight = KNOB_MACROTILE_Y_DIM; - - // Setup region assuming full tiles - uint32_t macroTileStartX = (rect.left + (macroWidth - 1)) / macroWidth; - uint32_t macroTileStartY = (rect.top + (macroHeight - 1)) / macroHeight; - - uint32_t macroTileEndX = rect.right / macroWidth; - uint32_t macroTileEndY = rect.bottom / macroHeight; - - if (pInv->fullTilesOnly == false) + if (pDesc->fullTilesOnly == false) { // include partial tiles - macroTileStartX = rect.left / macroWidth; - macroTileStartY = rect.top / macroHeight; - - macroTileEndX = (rect.right + macroWidth - 1) / macroWidth; - macroTileEndY = (rect.bottom + macroHeight - 1) / macroHeight; + macroTileXMin = pDesc->rect.xmin / KNOB_MACROTILE_X_DIM; + macroTileXMax = (pDesc->rect.xmax - 1) / KNOB_MACROTILE_X_DIM; + macroTileYMin = pDesc->rect.ymin / KNOB_MACROTILE_Y_DIM; + macroTileYMax = (pDesc->rect.ymax - 1) / KNOB_MACROTILE_Y_DIM; } - SWR_ASSERT(macroTileEndX <= KNOB_NUM_HOT_TILES_X); - SWR_ASSERT(macroTileEndY <= KNOB_NUM_HOT_TILES_Y); + SWR_ASSERT(macroTileXMax <= KNOB_NUM_HOT_TILES_X); + SWR_ASSERT(macroTileYMax <= KNOB_NUM_HOT_TILES_Y); - macroTileEndX = std::min(macroTileEndX, KNOB_NUM_HOT_TILES_X); - macroTileEndY = std::min(macroTileEndY, KNOB_NUM_HOT_TILES_Y); + macroTileXMax = std::min(macroTileXMax, KNOB_NUM_HOT_TILES_X); + macroTileYMax = std::min(macroTileYMax, KNOB_NUM_HOT_TILES_Y); // load tiles BE_WORK work; work.type = DISCARDINVALIDATETILES; work.pfnWork = ProcessDiscardInvalidateTilesBE; - work.desc.discardInvalidateTiles = *pInv; + work.desc.discardInvalidateTiles = *pDesc; - for (uint32_t x = macroTileStartX; x < macroTileEndX; ++x) + for (uint32_t x = macroTileXMin; x <= macroTileXMax; ++x) { - for (uint32_t y = macroTileStartY; y < macroTileEndY; ++y) + for (uint32_t y = macroTileYMin; y <= macroTileYMax; ++y) { pTileMgr->enqueue(x, y, &work); } } - RDTSC_STOP(FEProcessInvalidateTiles, 0, pDC->drawId); + AR_END(FEProcessInvalidateTiles, 0); } ////////////////////////////////////////////////////////////////////////// @@ -532,9 +497,9 @@ uint32_t* pPrimData, uint32_t streamIndex) { - RDTSC_START(FEStreamout); + SWR_CONTEXT *pContext = pDC->pContext; - SWR_CONTEXT* pContext = pDC->pContext; + AR_BEGIN(FEStreamout, pDC->drawId); const API_STATE& state = GetApiState(pDC); const SWR_STREAMOUT_STATE &soState = state.soState; @@ -595,23 +560,25 @@ if (state.soBuffer[i].pWriteOffset) { *state.soBuffer[i].pWriteOffset = soContext.pBuffer[i]->streamOffset * sizeof(uint32_t); + } - // The SOS increments the existing write offset. So we don't want to increment - // the SoWriteOffset stat using an absolute offset instead of relative. - SET_STAT(SoWriteOffset[i], soContext.pBuffer[i]->streamOffset); + if (state.soBuffer[i].soWriteEnable) + { + pDC->dynState.SoWriteOffset[i] = soContext.pBuffer[i]->streamOffset * sizeof(uint32_t); + pDC->dynState.SoWriteOffsetDirty[i] = true; } } - UPDATE_STAT(SoPrimStorageNeeded[streamIndex], soContext.numPrimStorageNeeded); - UPDATE_STAT(SoNumPrimsWritten[streamIndex], soContext.numPrimsWritten); + UPDATE_STAT_FE(SoPrimStorageNeeded[streamIndex], soContext.numPrimStorageNeeded); + UPDATE_STAT_FE(SoNumPrimsWritten[streamIndex], soContext.numPrimsWritten); - RDTSC_STOP(FEStreamout, 1, 0); + AR_END(FEStreamout, 1); } ////////////////////////////////////////////////////////////////////////// /// @brief Computes number of invocations. The current index represents /// the start of the SIMD. The max index represents how much work -/// items are remaining. If there is less then a SIMD's left of work +/// items are remaining. If there is less then a SIMD's xmin of work /// then return the remaining amount of work. /// @param curIndex - The start index for the SIMD. /// @param maxIndex - The last index for all work items. @@ -688,9 +655,9 @@ uint32_t* pSoPrimData, simdscalari primID) { - RDTSC_START(FEGeometryShader); + SWR_CONTEXT *pContext = pDC->pContext; - SWR_CONTEXT* pContext = pDC->pContext; + AR_BEGIN(FEGeometryShader, pDC->drawId); const API_STATE& state = GetApiState(pDC); const SWR_GS_STATE* pState = &state.gsState; @@ -793,15 +760,7 @@ uint8_t* pBase = pInstanceBase + instance * instanceStride; uint8_t* pCutBase = pCutBufferBase + instance * cutInstanceStride; - DWORD numAttribs; - if (_BitScanReverse(&numAttribs, state.feAttribMask)) - { - numAttribs++; - } - else - { - numAttribs = 0; - } + uint32_t numAttribs = state.feNumAttributes; for (uint32_t stream = 0; stream < MAX_SO_STREAMS; ++stream) { @@ -863,7 +822,26 @@ vPrimId = _simd_set1_epi32(pPrimitiveId[inputPrim]); } - pfnClipFunc(pDC, gsPa, workerId, attrib, GenMask(gsPa.NumPrims()), vPrimId); + // use viewport array index if GS declares it as an output attribute. Otherwise use index 0. + simdscalari vViewPortIdx; + if (state.gsState.emitsViewportArrayIndex) + { + simdvector vpiAttrib[3]; + gsPa.Assemble(VERTEX_VIEWPORT_ARRAY_INDEX_SLOT, vpiAttrib); + + // OOB indices => forced to zero. + simdscalari vNumViewports = _simd_set1_epi32(KNOB_NUM_VIEWPORTS_SCISSORS); + simdscalari vClearMask = _simd_cmplt_epi32(_simd_castps_si(vpiAttrib[0].x), vNumViewports); + vpiAttrib[0].x = _simd_and_ps(_simd_castsi_ps(vClearMask), vpiAttrib[0].x); + + vViewPortIdx = _simd_castps_si(vpiAttrib[0].x); + } + else + { + vViewPortIdx = _simd_set1_epi32(0); + } + + pfnClipFunc(pDC, gsPa, workerId, attrib, GenMask(gsPa.NumPrims()), vPrimId, vViewPortIdx); } } } while (gsPa.NextPrim()); @@ -873,10 +851,10 @@ } // update GS pipeline stats - UPDATE_STAT(GsInvocations, numInputPrims * pState->instanceCount); - UPDATE_STAT(GsPrimitives, totalPrimsGenerated); - - RDTSC_STOP(FEGeometryShader, 1, 0); + UPDATE_STAT_FE(GsInvocations, numInputPrims * pState->instanceCount); + UPDATE_STAT_FE(GsPrimitives, totalPrimsGenerated); + AR_EVENT(GSPrimInfo(numInputPrims, totalPrimsGenerated, numVertsPerPrim*numInputPrims)); + AR_END(FEGeometryShader, 1); } ////////////////////////////////////////////////////////////////////////// @@ -971,9 +949,9 @@ uint32_t* pSoPrimData, simdscalari primID) { + SWR_CONTEXT *pContext = pDC->pContext; const API_STATE& state = GetApiState(pDC); const SWR_TS_STATE& tsState = state.tsState; - SWR_CONTEXT *pContext = pDC->pContext; // Needed for UPDATE_STATS macro SWR_ASSERT(gt_pTessellationThreadData); @@ -1035,11 +1013,11 @@ hsContext.mask = GenerateMask(numPrims); // Run the HS - RDTSC_START(FEHullShader); + AR_BEGIN(FEHullShader, pDC->drawId); state.pfnHsFunc(GetPrivateState(pDC), &hsContext); - RDTSC_STOP(FEHullShader, 0, 0); + AR_END(FEHullShader, 0); - UPDATE_STAT(HsInvocations, numPrims); + UPDATE_STAT_FE(HsInvocations, numPrims); const uint32_t* pPrimId = (const uint32_t*)&primID; @@ -1047,9 +1025,10 @@ { // Run Tessellator SWR_TS_TESSELLATED_DATA tsData = { 0 }; - RDTSC_START(FETessellation); + AR_BEGIN(FETessellation, pDC->drawId); TSTessellate(tsCtx, hsContext.pCPout[p].tessFactors, tsData); - RDTSC_STOP(FETessellation, 0, 0); + AR_EVENT(TessPrimCount(1)); + AR_END(FETessellation, 0); if (tsData.NumPrimitives == 0) { @@ -1089,13 +1068,13 @@ { dsContext.mask = GenerateMask(tsData.NumDomainPoints - dsInvocations); - RDTSC_START(FEDomainShader); + AR_BEGIN(FEDomainShader, pDC->drawId); state.pfnDsFunc(GetPrivateState(pDC), &dsContext); - RDTSC_STOP(FEDomainShader, 0, 0); + AR_END(FEDomainShader, 0); dsInvocations += KNOB_SIMD_WIDTH; } - UPDATE_STAT(DsInvocations, tsData.NumDomainPoints); + UPDATE_STAT_FE(DsInvocations, tsData.NumDomainPoints); PA_TESS tessPa( pDC, @@ -1124,17 +1103,17 @@ if (HasRastT::value) { simdvector prim[3]; // Only deal with triangles, lines, or points - RDTSC_START(FEPAAssemble); + AR_BEGIN(FEPAAssemble, pDC->drawId); #if SWR_ENABLE_ASSERTS bool assemble = #endif tessPa.Assemble(VERTEX_POSITION_SLOT, prim); - RDTSC_STOP(FEPAAssemble, 1, 0); + AR_END(FEPAAssemble, 1); SWR_ASSERT(assemble); SWR_ASSERT(pfnClipFunc); pfnClipFunc(pDC, tessPa, workerId, prim, - GenMask(tessPa.NumPrims()), _simd_set1_epi32(dsContext.PrimitiveID)); + GenMask(tessPa.NumPrims()), _simd_set1_epi32(dsContext.PrimitiveID), _simd_set1_epi32(0)); } } @@ -1178,7 +1157,7 @@ } #endif - RDTSC_START(FEProcessDraw); + AR_BEGIN(FEProcessDraw, pDC->drawId); DRAW_WORK& work = *(DRAW_WORK*)pUserData; const API_STATE& state = GetApiState(pDC); @@ -1242,7 +1221,7 @@ fetchInfo.StartVertex = work.startVertex; } -#ifdef KNOB_ENABLE_RDTSC +#if defined(KNOB_ENABLE_RDTSC) || defined(KNOB_ENABLE_AR) uint32_t numPrims = GetNumPrims(state.topology, work.numVerts); #endif @@ -1274,13 +1253,6 @@ if (HasStreamOutT::value) { pSoPrimData = (uint32_t*)pDC->pArena->AllocAligned(4096, 16); - - // update the - for (uint32_t i = 0; i < 4; ++i) - { - SET_STAT(SoWriteOffset[i], state.soBuffer[i].streamOffset); - } - } // choose primitive assembler @@ -1323,9 +1295,9 @@ { // 1. Execute FS/VS for a single SIMD. - RDTSC_START(FEFetchShader); + AR_BEGIN(FEFetchShader, pDC->drawId); state.pfnFetchFunc(fetchInfo, vin); - RDTSC_STOP(FEFetchShader, 0, 0); + AR_END(FEFetchShader, 0); // forward fetch generated vertex IDs to the vertex shader vsContext.VertexID = fetchInfo.VertexID; @@ -1339,17 +1311,17 @@ *pvCutIndices = _simd_movemask_ps(_simd_castsi_ps(fetchInfo.CutMask)); } - UPDATE_STAT(IaVertices, GetNumInvocations(i, endVertex)); + UPDATE_STAT_FE(IaVertices, GetNumInvocations(i, endVertex)); #if KNOB_ENABLE_TOSS_POINTS if (!KNOB_TOSS_FETCH) #endif { - RDTSC_START(FEVertexShader); + AR_BEGIN(FEVertexShader, pDC->drawId); state.pfnVertexFunc(GetPrivateState(pDC), &vsContext); - RDTSC_STOP(FEVertexShader, 0, 0); + AR_END(FEVertexShader, 0); - UPDATE_STAT(VsInvocations, GetNumInvocations(i, endVertex)); + UPDATE_STAT_FE(VsInvocations, GetNumInvocations(i, endVertex)); } } @@ -1358,9 +1330,9 @@ { simdvector prim[MAX_NUM_VERTS_PER_PRIM]; // PaAssemble returns false if there is not enough verts to assemble. - RDTSC_START(FEPAAssemble); + AR_BEGIN(FEPAAssemble, pDC->drawId); bool assemble = pa.Assemble(VERTEX_POSITION_SLOT, prim); - RDTSC_STOP(FEPAAssemble, 1, 0); + AR_END(FEPAAssemble, 1); #if KNOB_ENABLE_TOSS_POINTS if (!KNOB_TOSS_FETCH) @@ -1372,7 +1344,7 @@ { if (assemble) { - UPDATE_STAT(IaPrimitives, pa.NumPrims()); + UPDATE_STAT_FE(IaPrimitives, pa.NumPrims()); if (HasTessellationT::value) { @@ -1396,7 +1368,7 @@ { SWR_ASSERT(pDC->pState->pfnProcessPrims); pDC->pState->pfnProcessPrims(pDC, pa, workerId, prim, - GenMask(pa.NumPrims()), pa.GetPrimID(work.startPrimID)); + GenMask(pa.NumPrims()), pa.GetPrimID(work.startPrimID), _simd_set1_epi32(0)); } } } @@ -1417,7 +1389,8 @@ pa.Reset(); } - RDTSC_STOP(FEProcessDraw, numPrims * work.numInstances, pDC->drawId); + + AR_END(FEProcessDraw, numPrims * work.numInstances); } struct FEDrawChooser @@ -1442,940 +1415,4 @@ bool HasRasterization) { return TemplateArgUnroller::GetFunc(IsIndexed, IsCutIndexEnabled, HasTessellation, HasGeometryShader, HasStreamOut, HasRasterization); -} - - -////////////////////////////////////////////////////////////////////////// -/// @brief Processes attributes for the backend based on linkage mask and -/// linkage map. Essentially just doing an SOA->AOS conversion and pack. -/// @param pDC - Draw context -/// @param pa - Primitive Assembly state -/// @param linkageMask - Specifies which VS outputs are routed to PS. -/// @param pLinkageMap - maps VS attribute slot to PS slot -/// @param triIndex - Triangle to process attributes for -/// @param pBuffer - Output result -template -INLINE void ProcessAttributes( - DRAW_CONTEXT *pDC, - PA_STATE&pa, - uint32_t linkageMask, - const uint8_t* pLinkageMap, - uint32_t triIndex, - float *pBuffer) -{ - DWORD slot = 0; - uint32_t mapIdx = 0; - LONG constantInterpMask = pDC->pState->state.backendState.constantInterpolationMask; - const uint32_t provokingVertex = pDC->pState->state.frontendState.topologyProvokingVertex; - - while (_BitScanForward(&slot, linkageMask)) - { - linkageMask &= ~(1 << slot); // done with this bit. - - // compute absolute slot in vertex attrib array - uint32_t inputSlot = VERTEX_ATTRIB_START_SLOT + pLinkageMap[mapIdx]; - - __m128 attrib[3]; // triangle attribs (always 4 wide) - pa.AssembleSingle(inputSlot, triIndex, attrib); - - if (_bittest(&constantInterpMask, mapIdx)) - { - for (uint32_t i = 0; i < NumVerts; ++i) - { - _mm_store_ps(pBuffer, attrib[provokingVertex]); - pBuffer += 4; - } - } - else - { - for (uint32_t i = 0; i < NumVerts; ++i) - { - _mm_store_ps(pBuffer, attrib[i]); - pBuffer += 4; - } - } - - // pad out the attrib buffer to 3 verts to ensure the triangle - // interpolation code in the pixel shader works correctly for the - // 3 topologies - point, line, tri. This effectively zeros out the - // effect of the missing vertices in the triangle interpolation. - for (uint32_t i = NumVerts; i < 3; ++i) - { - _mm_store_ps(pBuffer, attrib[NumVerts - 1]); - pBuffer += 4; - } - - mapIdx++; - } -} - -////////////////////////////////////////////////////////////////////////// -/// @brief Processes enabled user clip distances. Loads the active clip -/// distances from the PA, sets up barycentric equations, and -/// stores the results to the output buffer -/// @param pa - Primitive Assembly state -/// @param primIndex - primitive index to process -/// @param clipDistMask - mask of enabled clip distances -/// @param pUserClipBuffer - buffer to store results -template -void ProcessUserClipDist(PA_STATE& pa, uint32_t primIndex, uint8_t clipDistMask, float* pUserClipBuffer) -{ - DWORD clipDist; - while (_BitScanForward(&clipDist, clipDistMask)) - { - clipDistMask &= ~(1 << clipDist); - uint32_t clipSlot = clipDist >> 2; - uint32_t clipComp = clipDist & 0x3; - uint32_t clipAttribSlot = clipSlot == 0 ? - VERTEX_CLIPCULL_DIST_LO_SLOT : VERTEX_CLIPCULL_DIST_HI_SLOT; - - __m128 primClipDist[3]; - pa.AssembleSingle(clipAttribSlot, primIndex, primClipDist); - - float vertClipDist[NumVerts]; - for (uint32_t e = 0; e < NumVerts; ++e) - { - OSALIGNSIMD(float) aVertClipDist[4]; - _mm_store_ps(aVertClipDist, primClipDist[e]); - vertClipDist[e] = aVertClipDist[clipComp]; - }; - - // setup plane equations for barycentric interpolation in the backend - float baryCoeff[NumVerts]; - for (uint32_t e = 0; e < NumVerts - 1; ++e) - { - baryCoeff[e] = vertClipDist[e] - vertClipDist[NumVerts - 1]; - } - baryCoeff[NumVerts - 1] = vertClipDist[NumVerts - 1]; - - for (uint32_t e = 0; e < NumVerts; ++e) - { - *(pUserClipBuffer++) = baryCoeff[e]; - } - } -} - -////////////////////////////////////////////////////////////////////////// -/// @brief Bin triangle primitives to macro tiles. Performs setup, clipping -/// culling, viewport transform, etc. -/// @param pDC - pointer to draw context. -/// @param pa - The primitive assembly object. -/// @param workerId - thread's worker id. Even thread has a unique id. -/// @param tri - Contains triangle position data for SIMDs worth of triangles. -/// @param primID - Primitive ID for each triangle. -void BinTriangles( - DRAW_CONTEXT *pDC, - PA_STATE& pa, - uint32_t workerId, - simdvector tri[3], - uint32_t triMask, - simdscalari primID) -{ - RDTSC_START(FEBinTriangles); - - const API_STATE& state = GetApiState(pDC); - const SWR_RASTSTATE& rastState = state.rastState; - const SWR_FRONTEND_STATE& feState = state.frontendState; - const SWR_GS_STATE& gsState = state.gsState; - MacroTileMgr *pTileMgr = pDC->pTileMgr; - - // Simple wireframe mode for debugging purposes only - - simdscalar vRecipW0 = _simd_set1_ps(1.0f); - simdscalar vRecipW1 = _simd_set1_ps(1.0f); - simdscalar vRecipW2 = _simd_set1_ps(1.0f); - - if (!feState.vpTransformDisable) - { - // perspective divide - vRecipW0 = _simd_div_ps(_simd_set1_ps(1.0f), tri[0].w); - vRecipW1 = _simd_div_ps(_simd_set1_ps(1.0f), tri[1].w); - vRecipW2 = _simd_div_ps(_simd_set1_ps(1.0f), tri[2].w); - - tri[0].v[0] = _simd_mul_ps(tri[0].v[0], vRecipW0); - tri[1].v[0] = _simd_mul_ps(tri[1].v[0], vRecipW1); - tri[2].v[0] = _simd_mul_ps(tri[2].v[0], vRecipW2); - - tri[0].v[1] = _simd_mul_ps(tri[0].v[1], vRecipW0); - tri[1].v[1] = _simd_mul_ps(tri[1].v[1], vRecipW1); - tri[2].v[1] = _simd_mul_ps(tri[2].v[1], vRecipW2); - - tri[0].v[2] = _simd_mul_ps(tri[0].v[2], vRecipW0); - tri[1].v[2] = _simd_mul_ps(tri[1].v[2], vRecipW1); - tri[2].v[2] = _simd_mul_ps(tri[2].v[2], vRecipW2); - - // viewport transform to screen coords - viewportTransform<3>(tri, state.vpMatrix[0]); - } - - // adjust for pixel center location - simdscalar offset = g_pixelOffsets[rastState.pixelLocation]; - tri[0].x = _simd_add_ps(tri[0].x, offset); - tri[0].y = _simd_add_ps(tri[0].y, offset); - - tri[1].x = _simd_add_ps(tri[1].x, offset); - tri[1].y = _simd_add_ps(tri[1].y, offset); - - tri[2].x = _simd_add_ps(tri[2].x, offset); - tri[2].y = _simd_add_ps(tri[2].y, offset); - - // convert to fixed point - simdscalari vXi[3], vYi[3]; - vXi[0] = fpToFixedPointVertical(tri[0].x); - vYi[0] = fpToFixedPointVertical(tri[0].y); - vXi[1] = fpToFixedPointVertical(tri[1].x); - vYi[1] = fpToFixedPointVertical(tri[1].y); - vXi[2] = fpToFixedPointVertical(tri[2].x); - vYi[2] = fpToFixedPointVertical(tri[2].y); - - // triangle setup - simdscalari vAi[3], vBi[3]; - triangleSetupABIntVertical(vXi, vYi, vAi, vBi); - - // determinant - simdscalari vDet[2]; - calcDeterminantIntVertical(vAi, vBi, vDet); - - // cull zero area - int maskLo = _simd_movemask_pd(_simd_castsi_pd(_simd_cmpeq_epi64(vDet[0], _simd_setzero_si()))); - int maskHi = _simd_movemask_pd(_simd_castsi_pd(_simd_cmpeq_epi64(vDet[1], _simd_setzero_si()))); - - int cullZeroAreaMask = maskLo | (maskHi << (KNOB_SIMD_WIDTH / 2)); - - uint32_t origTriMask = triMask; - triMask &= ~cullZeroAreaMask; - - // determine front winding tris - // CW +det - // CCW -det - maskLo = _simd_movemask_pd(_simd_castsi_pd(_simd_cmpgt_epi64(vDet[0], _simd_setzero_si()))); - maskHi = _simd_movemask_pd(_simd_castsi_pd(_simd_cmpgt_epi64(vDet[1], _simd_setzero_si()))); - int cwTriMask = maskLo | (maskHi << (KNOB_SIMD_WIDTH /2) ); - - uint32_t frontWindingTris; - if (rastState.frontWinding == SWR_FRONTWINDING_CW) - { - frontWindingTris = cwTriMask; - } - else - { - frontWindingTris = ~cwTriMask; - } - - // cull - uint32_t cullTris; - switch ((SWR_CULLMODE)rastState.cullMode) - { - case SWR_CULLMODE_BOTH: cullTris = 0xffffffff; break; - case SWR_CULLMODE_NONE: cullTris = 0x0; break; - case SWR_CULLMODE_FRONT: cullTris = frontWindingTris; break; - case SWR_CULLMODE_BACK: cullTris = ~frontWindingTris; break; - default: SWR_ASSERT(false, "Invalid cull mode: %d", rastState.cullMode); cullTris = 0x0; break; - } - - triMask &= ~cullTris; - - if (origTriMask ^ triMask) - { - RDTSC_EVENT(FECullZeroAreaAndBackface, _mm_popcnt_u32(origTriMask ^ triMask), 0); - } - - // compute per tri backface - uint32_t frontFaceMask = frontWindingTris; - - uint32_t *pPrimID = (uint32_t *)&primID; - DWORD triIndex = 0; - - if (!triMask) - { - goto endBinTriangles; - } - - // Calc bounding box of triangles - simdBBox bbox; - calcBoundingBoxIntVertical(vXi, vYi, bbox); - - // determine if triangle falls between pixel centers and discard - // only discard for non-MSAA case - // (left + 127) & ~255 - // (right + 128) & ~255 - - if(rastState.sampleCount == SWR_MULTISAMPLE_1X) - { - origTriMask = triMask; - - int cullCenterMask; - { - simdscalari left = _simd_add_epi32(bbox.left, _simd_set1_epi32(127)); - left = _simd_and_si(left, _simd_set1_epi32(~255)); - simdscalari right = _simd_add_epi32(bbox.right, _simd_set1_epi32(128)); - right = _simd_and_si(right, _simd_set1_epi32(~255)); - - simdscalari vMaskH = _simd_cmpeq_epi32(left, right); - - simdscalari top = _simd_add_epi32(bbox.top, _simd_set1_epi32(127)); - top = _simd_and_si(top, _simd_set1_epi32(~255)); - simdscalari bottom = _simd_add_epi32(bbox.bottom, _simd_set1_epi32(128)); - bottom = _simd_and_si(bottom, _simd_set1_epi32(~255)); - - simdscalari vMaskV = _simd_cmpeq_epi32(top, bottom); - vMaskV = _simd_or_si(vMaskH, vMaskV); - cullCenterMask = _simd_movemask_ps(_simd_castsi_ps(vMaskV)); - } - - triMask &= ~cullCenterMask; - - if(origTriMask ^ triMask) - { - RDTSC_EVENT(FECullBetweenCenters, _mm_popcnt_u32(origTriMask ^ triMask), 0); - } - } - - // Intersect with scissor/viewport. Subtract 1 ULP in x.8 fixed point since right/bottom edge is exclusive. - bbox.left = _simd_max_epi32(bbox.left, _simd_set1_epi32(state.scissorInFixedPoint.left)); - bbox.top = _simd_max_epi32(bbox.top, _simd_set1_epi32(state.scissorInFixedPoint.top)); - bbox.right = _simd_min_epi32(_simd_sub_epi32(bbox.right, _simd_set1_epi32(1)), _simd_set1_epi32(state.scissorInFixedPoint.right)); - bbox.bottom = _simd_min_epi32(_simd_sub_epi32(bbox.bottom, _simd_set1_epi32(1)), _simd_set1_epi32(state.scissorInFixedPoint.bottom)); - - // Cull tris completely outside scissor - { - simdscalari maskOutsideScissorX = _simd_cmpgt_epi32(bbox.left, bbox.right); - simdscalari maskOutsideScissorY = _simd_cmpgt_epi32(bbox.top, bbox.bottom); - simdscalari maskOutsideScissorXY = _simd_or_si(maskOutsideScissorX, maskOutsideScissorY); - uint32_t maskOutsideScissor = _simd_movemask_ps(_simd_castsi_ps(maskOutsideScissorXY)); - triMask = triMask & ~maskOutsideScissor; - } - - if (!triMask) - { - goto endBinTriangles; - } - - // Convert triangle bbox to macrotile units. - bbox.left = _simd_srai_epi32(bbox.left, KNOB_MACROTILE_X_DIM_FIXED_SHIFT); - bbox.top = _simd_srai_epi32(bbox.top, KNOB_MACROTILE_Y_DIM_FIXED_SHIFT); - bbox.right = _simd_srai_epi32(bbox.right, KNOB_MACROTILE_X_DIM_FIXED_SHIFT); - bbox.bottom = _simd_srai_epi32(bbox.bottom, KNOB_MACROTILE_Y_DIM_FIXED_SHIFT); - - OSALIGNSIMD(uint32_t) aMTLeft[KNOB_SIMD_WIDTH], aMTRight[KNOB_SIMD_WIDTH], aMTTop[KNOB_SIMD_WIDTH], aMTBottom[KNOB_SIMD_WIDTH]; - _simd_store_si((simdscalari*)aMTLeft, bbox.left); - _simd_store_si((simdscalari*)aMTRight, bbox.right); - _simd_store_si((simdscalari*)aMTTop, bbox.top); - _simd_store_si((simdscalari*)aMTBottom, bbox.bottom); - - // transpose verts needed for backend - /// @todo modify BE to take non-transformed verts - __m128 vHorizX[8], vHorizY[8], vHorizZ[8], vHorizW[8]; - vTranspose3x8(vHorizX, tri[0].x, tri[1].x, tri[2].x); - vTranspose3x8(vHorizY, tri[0].y, tri[1].y, tri[2].y); - vTranspose3x8(vHorizZ, tri[0].z, tri[1].z, tri[2].z); - vTranspose3x8(vHorizW, vRecipW0, vRecipW1, vRecipW2); - - // store render target array index - OSALIGNSIMD(uint32_t) aRTAI[KNOB_SIMD_WIDTH]; - if (gsState.gsEnable && gsState.emitsRenderTargetArrayIndex) - { - simdvector vRtai[3]; - pa.Assemble(VERTEX_RTAI_SLOT, vRtai); - simdscalari vRtaii; - vRtaii = _simd_castps_si(vRtai[0].x); - _simd_store_si((simdscalari*)aRTAI, vRtaii); - } - else - { - _simd_store_si((simdscalari*)aRTAI, _simd_setzero_si()); - } - - - // scan remaining valid triangles and bin each separately - while (_BitScanForward(&triIndex, triMask)) - { - uint32_t linkageCount = state.linkageCount; - uint32_t linkageMask = state.linkageMask; - uint32_t numScalarAttribs = linkageCount * 4; - - BE_WORK work; - work.type = DRAW; - - TRIANGLE_WORK_DESC &desc = work.desc.tri; - - desc.triFlags.frontFacing = state.forceFront ? 1 : ((frontFaceMask >> triIndex) & 1); - desc.triFlags.primID = pPrimID[triIndex]; - desc.triFlags.renderTargetArrayIndex = aRTAI[triIndex]; - - if(rastState.samplePattern == SWR_MSAA_STANDARD_PATTERN) - { - work.pfnWork = gRasterizerTable[rastState.scissorEnable][rastState.sampleCount]; - } - else - { - // for center sample pattern, all samples are at pixel center; calculate coverage - // once at center and broadcast the results in the backend - work.pfnWork = gRasterizerTable[rastState.scissorEnable][SWR_MULTISAMPLE_1X]; - } - - auto pArena = pDC->pArena; - SWR_ASSERT(pArena != nullptr); - - // store active attribs - float *pAttribs = (float*)pArena->AllocAligned(numScalarAttribs * 3 * sizeof(float), 16); - desc.pAttribs = pAttribs; - desc.numAttribs = linkageCount; - ProcessAttributes<3>(pDC, pa, linkageMask, state.linkageMap, triIndex, desc.pAttribs); - - // store triangle vertex data - desc.pTriBuffer = (float*)pArena->AllocAligned(4 * 4 * sizeof(float), 16); - - _mm_store_ps(&desc.pTriBuffer[0], vHorizX[triIndex]); - _mm_store_ps(&desc.pTriBuffer[4], vHorizY[triIndex]); - _mm_store_ps(&desc.pTriBuffer[8], vHorizZ[triIndex]); - _mm_store_ps(&desc.pTriBuffer[12], vHorizW[triIndex]); - - // store user clip distances - if (rastState.clipDistanceMask) - { - uint32_t numClipDist = _mm_popcnt_u32(rastState.clipDistanceMask); - desc.pUserClipBuffer = (float*)pArena->Alloc(numClipDist * 3 * sizeof(float)); - ProcessUserClipDist<3>(pa, triIndex, rastState.clipDistanceMask, desc.pUserClipBuffer); - } - - for (uint32_t y = aMTTop[triIndex]; y <= aMTBottom[triIndex]; ++y) - { - for (uint32_t x = aMTLeft[triIndex]; x <= aMTRight[triIndex]; ++x) - { -#if KNOB_ENABLE_TOSS_POINTS - if (!KNOB_TOSS_SETUP_TRIS) -#endif - { - pTileMgr->enqueue(x, y, &work); - } - } - } - triMask &= ~(1 << triIndex); - } - -endBinTriangles: - RDTSC_STOP(FEBinTriangles, 1, 0); -} - - - -////////////////////////////////////////////////////////////////////////// -/// @brief Bin SIMD points to the backend. Only supports point size of 1 -/// @param pDC - pointer to draw context. -/// @param pa - The primitive assembly object. -/// @param workerId - thread's worker id. Even thread has a unique id. -/// @param tri - Contains point position data for SIMDs worth of points. -/// @param primID - Primitive ID for each point. -void BinPoints( - DRAW_CONTEXT *pDC, - PA_STATE& pa, - uint32_t workerId, - simdvector prim[3], - uint32_t primMask, - simdscalari primID) -{ - RDTSC_START(FEBinPoints); - - simdvector& primVerts = prim[0]; - - const API_STATE& state = GetApiState(pDC); - const SWR_FRONTEND_STATE& feState = state.frontendState; - const SWR_GS_STATE& gsState = state.gsState; - const SWR_RASTSTATE& rastState = state.rastState; - - if (!feState.vpTransformDisable) - { - // perspective divide - simdscalar vRecipW0 = _simd_div_ps(_simd_set1_ps(1.0f), primVerts.w); - primVerts.x = _simd_mul_ps(primVerts.x, vRecipW0); - primVerts.y = _simd_mul_ps(primVerts.y, vRecipW0); - primVerts.z = _simd_mul_ps(primVerts.z, vRecipW0); - - // viewport transform to screen coords - viewportTransform<1>(&primVerts, state.vpMatrix[0]); - } - - // adjust for pixel center location - simdscalar offset = g_pixelOffsets[rastState.pixelLocation]; - primVerts.x = _simd_add_ps(primVerts.x, offset); - primVerts.y = _simd_add_ps(primVerts.y, offset); - - // convert to fixed point - simdscalari vXi, vYi; - vXi = fpToFixedPointVertical(primVerts.x); - vYi = fpToFixedPointVertical(primVerts.y); - - if (CanUseSimplePoints(pDC)) - { - // adjust for top-left rule - vXi = _simd_sub_epi32(vXi, _simd_set1_epi32(1)); - vYi = _simd_sub_epi32(vYi, _simd_set1_epi32(1)); - - // cull points off the top-left edge of the viewport - primMask &= ~_simd_movemask_ps(_simd_castsi_ps(vXi)); - primMask &= ~_simd_movemask_ps(_simd_castsi_ps(vYi)); - - // compute macro tile coordinates - simdscalari macroX = _simd_srai_epi32(vXi, KNOB_MACROTILE_X_DIM_FIXED_SHIFT); - simdscalari macroY = _simd_srai_epi32(vYi, KNOB_MACROTILE_Y_DIM_FIXED_SHIFT); - - OSALIGNSIMD(uint32_t) aMacroX[KNOB_SIMD_WIDTH], aMacroY[KNOB_SIMD_WIDTH]; - _simd_store_si((simdscalari*)aMacroX, macroX); - _simd_store_si((simdscalari*)aMacroY, macroY); - - // compute raster tile coordinates - simdscalari rasterX = _simd_srai_epi32(vXi, KNOB_TILE_X_DIM_SHIFT + FIXED_POINT_SHIFT); - simdscalari rasterY = _simd_srai_epi32(vYi, KNOB_TILE_Y_DIM_SHIFT + FIXED_POINT_SHIFT); - - // compute raster tile relative x,y for coverage mask - simdscalari tileAlignedX = _simd_slli_epi32(rasterX, KNOB_TILE_X_DIM_SHIFT); - simdscalari tileAlignedY = _simd_slli_epi32(rasterY, KNOB_TILE_Y_DIM_SHIFT); - - simdscalari tileRelativeX = _simd_sub_epi32(_simd_srai_epi32(vXi, FIXED_POINT_SHIFT), tileAlignedX); - simdscalari tileRelativeY = _simd_sub_epi32(_simd_srai_epi32(vYi, FIXED_POINT_SHIFT), tileAlignedY); - - OSALIGNSIMD(uint32_t) aTileRelativeX[KNOB_SIMD_WIDTH]; - OSALIGNSIMD(uint32_t) aTileRelativeY[KNOB_SIMD_WIDTH]; - _simd_store_si((simdscalari*)aTileRelativeX, tileRelativeX); - _simd_store_si((simdscalari*)aTileRelativeY, tileRelativeY); - - OSALIGNSIMD(uint32_t) aTileAlignedX[KNOB_SIMD_WIDTH]; - OSALIGNSIMD(uint32_t) aTileAlignedY[KNOB_SIMD_WIDTH]; - _simd_store_si((simdscalari*)aTileAlignedX, tileAlignedX); - _simd_store_si((simdscalari*)aTileAlignedY, tileAlignedY); - - OSALIGNSIMD(float) aZ[KNOB_SIMD_WIDTH]; - _simd_store_ps((float*)aZ, primVerts.z); - - // store render target array index - OSALIGNSIMD(uint32_t) aRTAI[KNOB_SIMD_WIDTH]; - if (gsState.gsEnable && gsState.emitsRenderTargetArrayIndex) - { - simdvector vRtai; - pa.Assemble(VERTEX_RTAI_SLOT, &vRtai); - simdscalari vRtaii = _simd_castps_si(vRtai.x); - _simd_store_si((simdscalari*)aRTAI, vRtaii); - } - else - { - _simd_store_si((simdscalari*)aRTAI, _simd_setzero_si()); - } - - uint32_t *pPrimID = (uint32_t *)&primID; - DWORD primIndex = 0; - // scan remaining valid triangles and bin each separately - while (_BitScanForward(&primIndex, primMask)) - { - uint32_t linkageCount = state.linkageCount; - uint32_t linkageMask = state.linkageMask; - - uint32_t numScalarAttribs = linkageCount * 4; - - BE_WORK work; - work.type = DRAW; - - TRIANGLE_WORK_DESC &desc = work.desc.tri; - - // points are always front facing - desc.triFlags.frontFacing = 1; - desc.triFlags.primID = pPrimID[primIndex]; - desc.triFlags.renderTargetArrayIndex = aRTAI[primIndex]; - - work.pfnWork = RasterizeSimplePoint; - - auto pArena = pDC->pArena; - SWR_ASSERT(pArena != nullptr); - - // store attributes - float *pAttribs = (float*)pArena->AllocAligned(3 * numScalarAttribs * sizeof(float), 16); - desc.pAttribs = pAttribs; - desc.numAttribs = linkageCount; - - ProcessAttributes<1>(pDC, pa, linkageMask, state.linkageMap, primIndex, pAttribs); - - // store raster tile aligned x, y, perspective correct z - float *pTriBuffer = (float*)pArena->AllocAligned(4 * sizeof(float), 16); - desc.pTriBuffer = pTriBuffer; - *(uint32_t*)pTriBuffer++ = aTileAlignedX[primIndex]; - *(uint32_t*)pTriBuffer++ = aTileAlignedY[primIndex]; - *pTriBuffer = aZ[primIndex]; - - uint32_t tX = aTileRelativeX[primIndex]; - uint32_t tY = aTileRelativeY[primIndex]; - - // pack the relative x,y into the coverageMask, the rasterizer will - // generate the true coverage mask from it - work.desc.tri.triFlags.coverageMask = tX | (tY << 4); - - // bin it - MacroTileMgr *pTileMgr = pDC->pTileMgr; -#if KNOB_ENABLE_TOSS_POINTS - if (!KNOB_TOSS_SETUP_TRIS) -#endif - { - pTileMgr->enqueue(aMacroX[primIndex], aMacroY[primIndex], &work); - } - primMask &= ~(1 << primIndex); - } - } - else - { - // non simple points need to be potentially binned to multiple macro tiles - simdscalar vPointSize; - if (rastState.pointParam) - { - simdvector size[3]; - pa.Assemble(VERTEX_POINT_SIZE_SLOT, size); - vPointSize = size[0].x; - } - else - { - vPointSize = _simd_set1_ps(rastState.pointSize); - } - - // bloat point to bbox - simdBBox bbox; - bbox.left = bbox.right = vXi; - bbox.top = bbox.bottom = vYi; - - simdscalar vHalfWidth = _simd_mul_ps(vPointSize, _simd_set1_ps(0.5f)); - simdscalari vHalfWidthi = fpToFixedPointVertical(vHalfWidth); - bbox.left = _simd_sub_epi32(bbox.left, vHalfWidthi); - bbox.right = _simd_add_epi32(bbox.right, vHalfWidthi); - bbox.top = _simd_sub_epi32(bbox.top, vHalfWidthi); - bbox.bottom = _simd_add_epi32(bbox.bottom, vHalfWidthi); - - // Intersect with scissor/viewport. Subtract 1 ULP in x.8 fixed point since right/bottom edge is exclusive. - bbox.left = _simd_max_epi32(bbox.left, _simd_set1_epi32(state.scissorInFixedPoint.left)); - bbox.top = _simd_max_epi32(bbox.top, _simd_set1_epi32(state.scissorInFixedPoint.top)); - bbox.right = _simd_min_epi32(_simd_sub_epi32(bbox.right, _simd_set1_epi32(1)), _simd_set1_epi32(state.scissorInFixedPoint.right)); - bbox.bottom = _simd_min_epi32(_simd_sub_epi32(bbox.bottom, _simd_set1_epi32(1)), _simd_set1_epi32(state.scissorInFixedPoint.bottom)); - - // Cull bloated points completely outside scissor - simdscalari maskOutsideScissorX = _simd_cmpgt_epi32(bbox.left, bbox.right); - simdscalari maskOutsideScissorY = _simd_cmpgt_epi32(bbox.top, bbox.bottom); - simdscalari maskOutsideScissorXY = _simd_or_si(maskOutsideScissorX, maskOutsideScissorY); - uint32_t maskOutsideScissor = _simd_movemask_ps(_simd_castsi_ps(maskOutsideScissorXY)); - primMask = primMask & ~maskOutsideScissor; - - // Convert bbox to macrotile units. - bbox.left = _simd_srai_epi32(bbox.left, KNOB_MACROTILE_X_DIM_FIXED_SHIFT); - bbox.top = _simd_srai_epi32(bbox.top, KNOB_MACROTILE_Y_DIM_FIXED_SHIFT); - bbox.right = _simd_srai_epi32(bbox.right, KNOB_MACROTILE_X_DIM_FIXED_SHIFT); - bbox.bottom = _simd_srai_epi32(bbox.bottom, KNOB_MACROTILE_Y_DIM_FIXED_SHIFT); - - OSALIGNSIMD(uint32_t) aMTLeft[KNOB_SIMD_WIDTH], aMTRight[KNOB_SIMD_WIDTH], aMTTop[KNOB_SIMD_WIDTH], aMTBottom[KNOB_SIMD_WIDTH]; - _simd_store_si((simdscalari*)aMTLeft, bbox.left); - _simd_store_si((simdscalari*)aMTRight, bbox.right); - _simd_store_si((simdscalari*)aMTTop, bbox.top); - _simd_store_si((simdscalari*)aMTBottom, bbox.bottom); - - // store render target array index - OSALIGNSIMD(uint32_t) aRTAI[KNOB_SIMD_WIDTH]; - if (gsState.gsEnable && gsState.emitsRenderTargetArrayIndex) - { - simdvector vRtai[2]; - pa.Assemble(VERTEX_RTAI_SLOT, vRtai); - simdscalari vRtaii = _simd_castps_si(vRtai[0].x); - _simd_store_si((simdscalari*)aRTAI, vRtaii); - } - else - { - _simd_store_si((simdscalari*)aRTAI, _simd_setzero_si()); - } - - OSALIGNSIMD(float) aPointSize[KNOB_SIMD_WIDTH]; - _simd_store_ps((float*)aPointSize, vPointSize); - - uint32_t *pPrimID = (uint32_t *)&primID; - - OSALIGNSIMD(float) aPrimVertsX[KNOB_SIMD_WIDTH]; - OSALIGNSIMD(float) aPrimVertsY[KNOB_SIMD_WIDTH]; - OSALIGNSIMD(float) aPrimVertsZ[KNOB_SIMD_WIDTH]; - - _simd_store_ps((float*)aPrimVertsX, primVerts.x); - _simd_store_ps((float*)aPrimVertsY, primVerts.y); - _simd_store_ps((float*)aPrimVertsZ, primVerts.z); - - // scan remaining valid prims and bin each separately - DWORD primIndex; - while (_BitScanForward(&primIndex, primMask)) - { - uint32_t linkageCount = state.linkageCount; - uint32_t linkageMask = state.linkageMask; - uint32_t numScalarAttribs = linkageCount * 4; - - BE_WORK work; - work.type = DRAW; - - TRIANGLE_WORK_DESC &desc = work.desc.tri; - - desc.triFlags.frontFacing = 1; - desc.triFlags.primID = pPrimID[primIndex]; - desc.triFlags.pointSize = aPointSize[primIndex]; - desc.triFlags.renderTargetArrayIndex = aRTAI[primIndex]; - - work.pfnWork = RasterizeTriPoint; - - auto pArena = pDC->pArena; - SWR_ASSERT(pArena != nullptr); - - // store active attribs - desc.pAttribs = (float*)pArena->AllocAligned(numScalarAttribs * 3 * sizeof(float), 16); - desc.numAttribs = linkageCount; - ProcessAttributes<1>(pDC, pa, linkageMask, state.linkageMap, primIndex, desc.pAttribs); - - // store point vertex data - float *pTriBuffer = (float*)pArena->AllocAligned(4 * sizeof(float), 16); - desc.pTriBuffer = pTriBuffer; - *pTriBuffer++ = aPrimVertsX[primIndex]; - *pTriBuffer++ = aPrimVertsY[primIndex]; - *pTriBuffer = aPrimVertsZ[primIndex]; - - // store user clip distances - if (rastState.clipDistanceMask) - { - uint32_t numClipDist = _mm_popcnt_u32(rastState.clipDistanceMask); - desc.pUserClipBuffer = (float*)pArena->Alloc(numClipDist * 2 * sizeof(float)); - ProcessUserClipDist<2>(pa, primIndex, rastState.clipDistanceMask, desc.pUserClipBuffer); - } - - MacroTileMgr *pTileMgr = pDC->pTileMgr; - for (uint32_t y = aMTTop[primIndex]; y <= aMTBottom[primIndex]; ++y) - { - for (uint32_t x = aMTLeft[primIndex]; x <= aMTRight[primIndex]; ++x) - { -#if KNOB_ENABLE_TOSS_POINTS - if (!KNOB_TOSS_SETUP_TRIS) -#endif - { - pTileMgr->enqueue(x, y, &work); - } - } - } - - primMask &= ~(1 << primIndex); - } - } - - - - - RDTSC_STOP(FEBinPoints, 1, 0); -} - -////////////////////////////////////////////////////////////////////////// -/// @brief Bin SIMD lines to the backend. -/// @param pDC - pointer to draw context. -/// @param pa - The primitive assembly object. -/// @param workerId - thread's worker id. Even thread has a unique id. -/// @param tri - Contains line position data for SIMDs worth of points. -/// @param primID - Primitive ID for each line. -void BinLines( - DRAW_CONTEXT *pDC, - PA_STATE& pa, - uint32_t workerId, - simdvector prim[], - uint32_t primMask, - simdscalari primID) -{ - RDTSC_START(FEBinLines); - - const API_STATE& state = GetApiState(pDC); - const SWR_RASTSTATE& rastState = state.rastState; - const SWR_FRONTEND_STATE& feState = state.frontendState; - const SWR_GS_STATE& gsState = state.gsState; - - simdscalar vRecipW0 = _simd_set1_ps(1.0f); - simdscalar vRecipW1 = _simd_set1_ps(1.0f); - - if (!feState.vpTransformDisable) - { - // perspective divide - vRecipW0 = _simd_div_ps(_simd_set1_ps(1.0f), prim[0].w); - vRecipW1 = _simd_div_ps(_simd_set1_ps(1.0f), prim[1].w); - - prim[0].v[0] = _simd_mul_ps(prim[0].v[0], vRecipW0); - prim[1].v[0] = _simd_mul_ps(prim[1].v[0], vRecipW1); - - prim[0].v[1] = _simd_mul_ps(prim[0].v[1], vRecipW0); - prim[1].v[1] = _simd_mul_ps(prim[1].v[1], vRecipW1); - - prim[0].v[2] = _simd_mul_ps(prim[0].v[2], vRecipW0); - prim[1].v[2] = _simd_mul_ps(prim[1].v[2], vRecipW1); - - // viewport transform to screen coords - viewportTransform<2>(prim, state.vpMatrix[0]); - } - - // adjust for pixel center location - simdscalar offset = g_pixelOffsets[rastState.pixelLocation]; - prim[0].x = _simd_add_ps(prim[0].x, offset); - prim[0].y = _simd_add_ps(prim[0].y, offset); - - prim[1].x = _simd_add_ps(prim[1].x, offset); - prim[1].y = _simd_add_ps(prim[1].y, offset); - - // convert to fixed point - simdscalari vXi[2], vYi[2]; - vXi[0] = fpToFixedPointVertical(prim[0].x); - vYi[0] = fpToFixedPointVertical(prim[0].y); - vXi[1] = fpToFixedPointVertical(prim[1].x); - vYi[1] = fpToFixedPointVertical(prim[1].y); - - // compute x-major vs y-major mask - simdscalari xLength = _simd_abs_epi32(_simd_sub_epi32(vXi[0], vXi[1])); - simdscalari yLength = _simd_abs_epi32(_simd_sub_epi32(vYi[0], vYi[1])); - simdscalar vYmajorMask = _simd_castsi_ps(_simd_cmpgt_epi32(yLength, xLength)); - uint32_t yMajorMask = _simd_movemask_ps(vYmajorMask); - - // cull zero-length lines - simdscalari vZeroLengthMask = _simd_cmpeq_epi32(xLength, _simd_setzero_si()); - vZeroLengthMask = _simd_and_si(vZeroLengthMask, _simd_cmpeq_epi32(yLength, _simd_setzero_si())); - - primMask &= ~_simd_movemask_ps(_simd_castsi_ps(vZeroLengthMask)); - - uint32_t *pPrimID = (uint32_t *)&primID; - - simdscalar vUnused = _simd_setzero_ps(); - - // Calc bounding box of lines - simdBBox bbox; - bbox.left = _simd_min_epi32(vXi[0], vXi[1]); - bbox.right = _simd_max_epi32(vXi[0], vXi[1]); - bbox.top = _simd_min_epi32(vYi[0], vYi[1]); - bbox.bottom = _simd_max_epi32(vYi[0], vYi[1]); - - // bloat bbox by line width along minor axis - simdscalar vHalfWidth = _simd_set1_ps(rastState.lineWidth / 2.0f); - simdscalari vHalfWidthi = fpToFixedPointVertical(vHalfWidth); - simdBBox bloatBox; - bloatBox.left = _simd_sub_epi32(bbox.left, vHalfWidthi); - bloatBox.right = _simd_add_epi32(bbox.right, vHalfWidthi); - bloatBox.top = _simd_sub_epi32(bbox.top, vHalfWidthi); - bloatBox.bottom = _simd_add_epi32(bbox.bottom, vHalfWidthi); - - bbox.left = _simd_blendv_epi32(bbox.left, bloatBox.left, vYmajorMask); - bbox.right = _simd_blendv_epi32(bbox.right, bloatBox.right, vYmajorMask); - bbox.top = _simd_blendv_epi32(bloatBox.top, bbox.top, vYmajorMask); - bbox.bottom = _simd_blendv_epi32(bloatBox.bottom, bbox.bottom, vYmajorMask); - - // Intersect with scissor/viewport. Subtract 1 ULP in x.8 fixed point since right/bottom edge is exclusive. - bbox.left = _simd_max_epi32(bbox.left, _simd_set1_epi32(state.scissorInFixedPoint.left)); - bbox.top = _simd_max_epi32(bbox.top, _simd_set1_epi32(state.scissorInFixedPoint.top)); - bbox.right = _simd_min_epi32(_simd_sub_epi32(bbox.right, _simd_set1_epi32(1)), _simd_set1_epi32(state.scissorInFixedPoint.right)); - bbox.bottom = _simd_min_epi32(_simd_sub_epi32(bbox.bottom, _simd_set1_epi32(1)), _simd_set1_epi32(state.scissorInFixedPoint.bottom)); - - // Cull prims completely outside scissor - { - simdscalari maskOutsideScissorX = _simd_cmpgt_epi32(bbox.left, bbox.right); - simdscalari maskOutsideScissorY = _simd_cmpgt_epi32(bbox.top, bbox.bottom); - simdscalari maskOutsideScissorXY = _simd_or_si(maskOutsideScissorX, maskOutsideScissorY); - uint32_t maskOutsideScissor = _simd_movemask_ps(_simd_castsi_ps(maskOutsideScissorXY)); - primMask = primMask & ~maskOutsideScissor; - } - - if (!primMask) - { - goto endBinLines; - } - - // Convert triangle bbox to macrotile units. - bbox.left = _simd_srai_epi32(bbox.left, KNOB_MACROTILE_X_DIM_FIXED_SHIFT); - bbox.top = _simd_srai_epi32(bbox.top, KNOB_MACROTILE_Y_DIM_FIXED_SHIFT); - bbox.right = _simd_srai_epi32(bbox.right, KNOB_MACROTILE_X_DIM_FIXED_SHIFT); - bbox.bottom = _simd_srai_epi32(bbox.bottom, KNOB_MACROTILE_Y_DIM_FIXED_SHIFT); - - OSALIGNSIMD(uint32_t) aMTLeft[KNOB_SIMD_WIDTH], aMTRight[KNOB_SIMD_WIDTH], aMTTop[KNOB_SIMD_WIDTH], aMTBottom[KNOB_SIMD_WIDTH]; - _simd_store_si((simdscalari*)aMTLeft, bbox.left); - _simd_store_si((simdscalari*)aMTRight, bbox.right); - _simd_store_si((simdscalari*)aMTTop, bbox.top); - _simd_store_si((simdscalari*)aMTBottom, bbox.bottom); - - // transpose verts needed for backend - /// @todo modify BE to take non-transformed verts - __m128 vHorizX[8], vHorizY[8], vHorizZ[8], vHorizW[8]; - vTranspose3x8(vHorizX, prim[0].x, prim[1].x, vUnused); - vTranspose3x8(vHorizY, prim[0].y, prim[1].y, vUnused); - vTranspose3x8(vHorizZ, prim[0].z, prim[1].z, vUnused); - vTranspose3x8(vHorizW, vRecipW0, vRecipW1, vUnused); - - // store render target array index - OSALIGNSIMD(uint32_t) aRTAI[KNOB_SIMD_WIDTH]; - if (gsState.gsEnable && gsState.emitsRenderTargetArrayIndex) - { - simdvector vRtai[2]; - pa.Assemble(VERTEX_RTAI_SLOT, vRtai); - simdscalari vRtaii = _simd_castps_si(vRtai[0].x); - _simd_store_si((simdscalari*)aRTAI, vRtaii); - } - else - { - _simd_store_si((simdscalari*)aRTAI, _simd_setzero_si()); - } - - // scan remaining valid prims and bin each separately - DWORD primIndex; - while (_BitScanForward(&primIndex, primMask)) - { - uint32_t linkageCount = state.linkageCount; - uint32_t linkageMask = state.linkageMask; - uint32_t numScalarAttribs = linkageCount * 4; - - BE_WORK work; - work.type = DRAW; - - TRIANGLE_WORK_DESC &desc = work.desc.tri; - - desc.triFlags.frontFacing = 1; - desc.triFlags.primID = pPrimID[primIndex]; - desc.triFlags.yMajor = (yMajorMask >> primIndex) & 1; - desc.triFlags.renderTargetArrayIndex = aRTAI[primIndex]; - - work.pfnWork = RasterizeLine; - - auto pArena = pDC->pArena; - SWR_ASSERT(pArena != nullptr); - - // store active attribs - desc.pAttribs = (float*)pArena->AllocAligned(numScalarAttribs * 3 * sizeof(float), 16); - desc.numAttribs = linkageCount; - ProcessAttributes<2>(pDC, pa, linkageMask, state.linkageMap, primIndex, desc.pAttribs); - - // store line vertex data - desc.pTriBuffer = (float*)pArena->AllocAligned(4 * 4 * sizeof(float), 16); - _mm_store_ps(&desc.pTriBuffer[0], vHorizX[primIndex]); - _mm_store_ps(&desc.pTriBuffer[4], vHorizY[primIndex]); - _mm_store_ps(&desc.pTriBuffer[8], vHorizZ[primIndex]); - _mm_store_ps(&desc.pTriBuffer[12], vHorizW[primIndex]); - - // store user clip distances - if (rastState.clipDistanceMask) - { - uint32_t numClipDist = _mm_popcnt_u32(rastState.clipDistanceMask); - desc.pUserClipBuffer = (float*)pArena->Alloc(numClipDist * 2 * sizeof(float)); - ProcessUserClipDist<2>(pa, primIndex, rastState.clipDistanceMask, desc.pUserClipBuffer); - } - - MacroTileMgr *pTileMgr = pDC->pTileMgr; - for (uint32_t y = aMTTop[primIndex]; y <= aMTBottom[primIndex]; ++y) - { - for (uint32_t x = aMTLeft[primIndex]; x <= aMTRight[primIndex]; ++x) - { -#if KNOB_ENABLE_TOSS_POINTS - if (!KNOB_TOSS_SETUP_TRIS) -#endif - { - pTileMgr->enqueue(x, y, &work); - } - } - } - - primMask &= ~(1 << primIndex); - } - -endBinLines: - - RDTSC_STOP(FEBinLines, 1, 0); -} +} \ No newline at end of file diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/frontend.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/frontend.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/frontend.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/frontend.h 2017-06-01 10:37:10.000000000 +0000 @@ -30,21 +30,6 @@ #include "context.h" #include -INLINE -__m128i fpToFixedPoint(const __m128 vIn) -{ - __m128 vFixed = _mm_mul_ps(vIn, _mm_set1_ps(FIXED_POINT_SCALE)); - return _mm_cvtps_epi32(vFixed); -} - -INLINE -simdscalari fpToFixedPointVertical(const simdscalar vIn) -{ - simdscalar vFixed = _simd_mul_ps(vIn, _simd_set1_ps(FIXED_POINT_SCALE)); - return _simd_cvtps_epi32(vFixed); -} - - // Calculates the A and B coefficients for the 3 edges of the triangle // // maths for edge equations: @@ -217,14 +202,34 @@ template INLINE -void viewportTransform(simdvector *v, const SWR_VIEWPORT_MATRIX & vpMatrix) +void viewportTransform(simdvector *v, const SWR_VIEWPORT_MATRICES & vpMatrices) +{ + simdscalar m00 = _simd_load1_ps(&vpMatrices.m00[0]); + simdscalar m30 = _simd_load1_ps(&vpMatrices.m30[0]); + simdscalar m11 = _simd_load1_ps(&vpMatrices.m11[0]); + simdscalar m31 = _simd_load1_ps(&vpMatrices.m31[0]); + simdscalar m22 = _simd_load1_ps(&vpMatrices.m22[0]); + simdscalar m32 = _simd_load1_ps(&vpMatrices.m32[0]); + + for (uint32_t i = 0; i < NumVerts; ++i) + { + v[i].x = _simd_fmadd_ps(v[i].x, m00, m30); + v[i].y = _simd_fmadd_ps(v[i].y, m11, m31); + v[i].z = _simd_fmadd_ps(v[i].z, m22, m32); + } +} + +template +INLINE +void viewportTransform(simdvector *v, const SWR_VIEWPORT_MATRICES & vpMatrices, simdscalari vViewportIdx) { - simdscalar m00 = _simd_load1_ps(&vpMatrix.m00); - simdscalar m30 = _simd_load1_ps(&vpMatrix.m30); - simdscalar m11 = _simd_load1_ps(&vpMatrix.m11); - simdscalar m31 = _simd_load1_ps(&vpMatrix.m31); - simdscalar m22 = _simd_load1_ps(&vpMatrix.m22); - simdscalar m32 = _simd_load1_ps(&vpMatrix.m32); + // perform a gather of each matrix element based on the viewport array indexes + simdscalar m00 = _simd_i32gather_ps(&vpMatrices.m00[0], vViewportIdx, 4); + simdscalar m30 = _simd_i32gather_ps(&vpMatrices.m30[0], vViewportIdx, 4); + simdscalar m11 = _simd_i32gather_ps(&vpMatrices.m11[0], vViewportIdx, 4); + simdscalar m31 = _simd_i32gather_ps(&vpMatrices.m31[0], vViewportIdx, 4); + simdscalar m22 = _simd_i32gather_ps(&vpMatrices.m22[0], vViewportIdx, 4); + simdscalar m32 = _simd_i32gather_ps(&vpMatrices.m32[0], vViewportIdx, 4); for (uint32_t i = 0; i < NumVerts; ++i) { @@ -235,7 +240,7 @@ } INLINE -void calcBoundingBoxInt(const __m128i &vX, const __m128i &vY, BBOX &bbox) +void calcBoundingBoxInt(const __m128i &vX, const __m128i &vY, SWR_RECT &bbox) { // Need horizontal fp min here __m128i vX1 = _mm_shuffle_epi32(vX, _MM_SHUFFLE(3, 2, 0, 1)); @@ -257,43 +262,10 @@ __m128i vMaxY = _mm_max_epi32(vY, vY1); vMaxY = _mm_max_epi32(vMaxY, vY2); - bbox.left = _mm_extract_epi32(vMinX, 0); - bbox.right = _mm_extract_epi32(vMaxX, 0); - bbox.top = _mm_extract_epi32(vMinY, 0); - bbox.bottom = _mm_extract_epi32(vMaxY, 0); - -#if 0 - Jacob: A = _mm_shuffle_ps(X, Y, 0 0 0 0) -B = _mm_shuffle_ps(Z, W, 0 0 0 0) -A = _mm_shuffle_epi32(A, 3 0 3 0) -A = _mm_shuffle_ps(A, B, 1 0 1 0) -#endif - -} - -INLINE -void calcBoundingBoxIntVertical(const simdscalari (&vX)[3], const simdscalari (&vY)[3], simdBBox &bbox) -{ - simdscalari vMinX = vX[0]; - vMinX = _simd_min_epi32(vMinX, vX[1]); - vMinX = _simd_min_epi32(vMinX, vX[2]); - - simdscalari vMaxX = vX[0]; - vMaxX = _simd_max_epi32(vMaxX, vX[1]); - vMaxX = _simd_max_epi32(vMaxX, vX[2]); - - simdscalari vMinY = vY[0]; - vMinY = _simd_min_epi32(vMinY, vY[1]); - vMinY = _simd_min_epi32(vMinY, vY[2]); - - simdscalari vMaxY = vY[0]; - vMaxY = _simd_max_epi32(vMaxY, vY[1]); - vMaxY = _simd_max_epi32(vMaxY, vY[2]); - - bbox.left = vMinX; - bbox.right = vMaxX; - bbox.top = vMinY; - bbox.bottom = vMaxY; + bbox.xmin = _mm_extract_epi32(vMinX, 0); + bbox.xmax = _mm_extract_epi32(vMaxX, 0); + bbox.ymin = _mm_extract_epi32(vMinY, 0); + bbox.ymax = _mm_extract_epi32(vMaxY, 0); } INLINE @@ -332,10 +304,11 @@ void ProcessStoreTiles(SWR_CONTEXT *pContext, DRAW_CONTEXT *pDC, uint32_t workerId, void *pUserData); void ProcessDiscardInvalidateTiles(SWR_CONTEXT *pContext, DRAW_CONTEXT *pDC, uint32_t workerId, void *pUserData); void ProcessSync(SWR_CONTEXT *pContext, DRAW_CONTEXT *pDC, uint32_t workerId, void *pUserData); -void ProcessQueryStats(SWR_CONTEXT *pContext, DRAW_CONTEXT *pDC, uint32_t workerId, void *pUserData); +void ProcessShutdown(SWR_CONTEXT *pContext, DRAW_CONTEXT *pDC, uint32_t workerId, void *pUserData); + +PFN_PROCESS_PRIMS GetBinTrianglesFunc(bool IsConservative); struct PA_STATE_BASE; // forward decl -void BinTriangles(DRAW_CONTEXT *pDC, PA_STATE& pa, uint32_t workerId, simdvector tri[3], uint32_t primMask, simdscalari primID); -void BinPoints(DRAW_CONTEXT *pDC, PA_STATE& pa, uint32_t workerId, simdvector prims[3], uint32_t primMask, simdscalari primID); -void BinLines(DRAW_CONTEXT *pDC, PA_STATE& pa, uint32_t workerId, simdvector prims[3], uint32_t primMask, simdscalari primID); +void BinPoints(DRAW_CONTEXT *pDC, PA_STATE& pa, uint32_t workerId, simdvector prims[3], uint32_t primMask, simdscalari primID, simdscalari viewportIdx); +void BinLines(DRAW_CONTEXT *pDC, PA_STATE& pa, uint32_t workerId, simdvector prims[3], uint32_t primMask, simdscalari primID, simdscalari viewportIdx); diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/knobs.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/knobs.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/knobs.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/knobs.h 2017-06-01 10:37:10.000000000 +0000 @@ -35,6 +35,13 @@ #define KNOB_ARCH_AVX512 2 /////////////////////////////////////////////////////////////////////////////// +// AVX512 Support +/////////////////////////////////////////////////////////////////////////////// + +#define ENABLE_AVX512_SIMD16 0 +#define USE_8x2_TILE_BACKEND 0 + +/////////////////////////////////////////////////////////////////////////////// // Architecture validation /////////////////////////////////////////////////////////////////////////////// #if !defined(KNOB_ARCH) @@ -52,27 +59,45 @@ #define KNOB_SIMD_WIDTH 8 #define KNOB_SIMD_BYTES 32 #elif (KNOB_ARCH == KNOB_ARCH_AVX512) +#if 0 +// not ready to enable this globally, enabled on the side (below) #define KNOB_ARCH_ISA AVX512F #define KNOB_ARCH_STR "AVX512" #define KNOB_SIMD_WIDTH 16 #define KNOB_SIMD_BYTES 64 -#error "AVX512 not yet supported" +#else +#define KNOB_ARCH_ISA AVX2 +#define KNOB_ARCH_STR "AVX2" +#define KNOB_SIMD_WIDTH 8 +#define KNOB_SIMD_BYTES 32 +#endif #else #error "Unknown architecture" #endif +#if ENABLE_AVX512_SIMD16 + +#define KNOB_SIMD16_WIDTH 16 +#define KNOB_SIMD16_BYTES 64 + +#if (KNOB_ARCH == KNOB_ARCH_AVX512) +#define ENABLE_AVX512_EMULATION 0 +#else +#define ENABLE_AVX512_EMULATION 1 +#endif + +#endif + #define MAX_KNOB_ARCH_STR_LEN sizeof("AVX512_PLUS_PADDING") /////////////////////////////////////////////////////////////////////////////// // Configuration knobs /////////////////////////////////////////////////////////////////////////////// -#define KNOB_MAX_NUM_THREADS 256 // Supports up to dual-HSW-Xeon. - // Maximum supported number of active vertex buffer streams #define KNOB_NUM_STREAMS 32 // Maximum supported number of attributes per vertex -#define KNOB_NUM_ATTRIBUTES 38 +#define KNOB_NUM_ATTRIBUTES 39 // Maximum supported active viewports and scissors #define KNOB_NUM_VIEWPORTS_SCISSORS 16 @@ -93,12 +118,12 @@ // fixed macrotile pixel dimension for now, eventually will be // dynamically set based on tile format and pixel size -#define KNOB_MACROTILE_X_DIM 64 -#define KNOB_MACROTILE_Y_DIM 64 +#define KNOB_MACROTILE_X_DIM 32 +#define KNOB_MACROTILE_Y_DIM 32 +#define KNOB_MACROTILE_X_DIM_FIXED_SHIFT 13 +#define KNOB_MACROTILE_Y_DIM_FIXED_SHIFT 13 #define KNOB_MACROTILE_X_DIM_FIXED (KNOB_MACROTILE_X_DIM << 8) #define KNOB_MACROTILE_Y_DIM_FIXED (KNOB_MACROTILE_Y_DIM << 8) -#define KNOB_MACROTILE_X_DIM_FIXED_SHIFT 14 -#define KNOB_MACROTILE_Y_DIM_FIXED_SHIFT 14 #define KNOB_MACROTILE_X_DIM_IN_TILES (KNOB_MACROTILE_X_DIM >> KNOB_TILE_X_DIM_SHIFT) #define KNOB_MACROTILE_Y_DIM_IN_TILES (KNOB_MACROTILE_Y_DIM >> KNOB_TILE_Y_DIM_SHIFT) @@ -118,6 +143,12 @@ #error "incompatible width/tile dimensions" #endif +#if ENABLE_AVX512_SIMD16 +#if KNOB_SIMD16_WIDTH == 16 && KNOB_TILE_X_DIM < 8 +#error "incompatible width/tile dimensions" +#endif +#endif + #if KNOB_SIMD_WIDTH == 8 #define SIMD_TILE_X_DIM 4 #define SIMD_TILE_Y_DIM 2 @@ -125,6 +156,15 @@ #error "Invalid simd width" #endif +#if ENABLE_AVX512_SIMD16 +#if KNOB_SIMD16_WIDTH == 16 +#define SIMD16_TILE_X_DIM 8 +#define SIMD16_TILE_Y_DIM 2 +#else +#error "Invalid simd width" +#endif +#endif + /////////////////////////////////////////////////////////////////////////////// // Optimization knobs /////////////////////////////////////////////////////////////////////////////// diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/knobs_init.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/knobs_init.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/knobs_init.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/knobs_init.h 2017-06-01 10:37:10.000000000 +0000 @@ -38,7 +38,9 @@ static inline void ConvertEnvToKnob(const char* pOverride, T& knobValue) { uint32_t value = 0; - if (sscanf(pOverride, "%u", &value)) + char* pStopped = nullptr; + value = strtoul(pOverride, &pStopped, 0); + if (pStopped != pOverride) { knobValue = static_cast(value); } @@ -64,10 +66,11 @@ // Try converting to a number and casting to bool uint32_t value = 0; - if (sscanf(pOverride, "%u", &value)) + char* pStopped = nullptr; + value = strtoul(pOverride, &pStopped, 0); + if (pStopped != pOverride) { knobValue = value != 0; - return; } } diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/multisample.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/multisample.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/multisample.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/multisample.h 2017-06-01 10:37:10.000000000 +0000 @@ -29,11 +29,15 @@ #include "context.h" #include "format_traits.h" +////////////////////////////////////////////////////////////////////////// +/// @brief convenience typedef for testing for single sample case +typedef std::integral_constant SingleSampleT; + INLINE uint32_t GetNumSamples(SWR_MULTISAMPLE_COUNT sampleCount) { - static const uint32_t sampleCountLUT[SWR_MULTISAMPLE_TYPE_MAX] {1, 2, 4, 8, 16}; - assert(sampleCount < SWR_MULTISAMPLE_TYPE_MAX); + static const uint32_t sampleCountLUT[SWR_MULTISAMPLE_TYPE_COUNT] {1, 2, 4, 8, 16}; + assert(sampleCount < SWR_MULTISAMPLE_TYPE_COUNT); return sampleCountLUT[sampleCount]; } diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/pa_avx.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/pa_avx.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/pa_avx.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/pa_avx.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -197,6 +197,8 @@ bool PaTriList2(PA_STATE_OPT& pa, uint32_t slot, simdvector verts[]) { +#if KNOB_ARCH == KNOB_ARCH_AVX + simdvector& a = PaGetSimdVector(pa, 0, slot); simdvector& b = PaGetSimdVector(pa, 1, slot); simdvector& c = PaGetSimdVector(pa, 2, slot); @@ -207,7 +209,7 @@ // v1 -> 1 4 7 10 13 16 19 22 // v2 -> 2 5 8 11 14 17 20 23 - for(int i = 0; i < 4; ++i) + for (int i = 0; i < 4; ++i) { simdvector& v0 = verts[0]; v0[i] = _simd_blend_ps(a[i], b[i], 0x92); @@ -231,6 +233,38 @@ v2[i] = _simd_blend_ps(v2[i], s, 0x22); } +#elif KNOB_ARCH >= KNOB_ARCH_AVX2 + + simdvector &a = PaGetSimdVector(pa, 0, slot); + simdvector &b = PaGetSimdVector(pa, 1, slot); + simdvector &c = PaGetSimdVector(pa, 2, slot); + + // v0 -> a0 a3 a6 b1 b4 b7 c2 c5 + // v1 -> a1 a4 a7 b2 b5 c0 c3 c6 + // v2 -> a2 a5 b0 b3 b6 c1 c4 c7 + + const simdscalari perm0 = _simd_set_epi32(5, 2, 7, 4, 1, 6, 3, 0); + const simdscalari perm1 = _simd_set_epi32(6, 3, 0, 5, 2, 7, 4, 1); + const simdscalari perm2 = _simd_set_epi32(7, 4, 1, 6, 3, 0, 5, 2); + + simdvector &v0 = verts[0]; + simdvector &v1 = verts[1]; + simdvector &v2 = verts[2]; + + for (int i = 0; i < 4; ++i) + { + v0[i] = _simd_blend_ps(_simd_blend_ps(a[i], b[i], 0x92), c[i], 0x24); + v0[i] = _mm256_permutevar8x32_ps(v0[i], perm0); + + v1[i] = _simd_blend_ps(_simd_blend_ps(a[i], b[i], 0x24), c[i], 0x49); + v1[i] = _mm256_permutevar8x32_ps(v1[i], perm1); + + v2[i] = _simd_blend_ps(_simd_blend_ps(a[i], b[i], 0x49), c[i], 0x92); + v2[i] = _mm256_permutevar8x32_ps(v2[i], perm2); + } + +#endif + SetNextPaState(pa, PaTriList0, PaTriListSingle0, 0, KNOB_SIMD_WIDTH, true); return true; } diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/pa.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/pa.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/pa.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/pa.h 2017-06-01 10:37:10.000000000 +0000 @@ -1159,25 +1159,15 @@ if ((IsIndexedT::value && IsCutIndexEnabledT::value && ( topo == TOP_TRIANGLE_STRIP || topo == TOP_POINT_LIST || topo == TOP_LINE_LIST || topo == TOP_LINE_STRIP || - topo == TOP_TRIANGLE_LIST || topo == TOP_LINE_LIST_ADJ || - topo == TOP_LISTSTRIP_ADJ || topo == TOP_TRI_LIST_ADJ || - topo == TOP_TRI_STRIP_ADJ)) || + topo == TOP_TRIANGLE_LIST)) || // non-indexed draws with adjacency topologies must use cut-aware PA until we add support // for them in the optimized PA - (!IsIndexedT::value && ( - topo == TOP_LINE_LIST_ADJ || topo == TOP_LISTSTRIP_ADJ || topo == TOP_TRI_LIST_ADJ || topo == TOP_TRI_STRIP_ADJ))) + (topo == TOP_LINE_LIST_ADJ || topo == TOP_LISTSTRIP_ADJ || topo == TOP_TRI_LIST_ADJ || topo == TOP_TRI_STRIP_ADJ)) { memset(&indexStore, 0, sizeof(indexStore)); - DWORD numAttribs; - if (_BitScanReverse(&numAttribs, state.feAttribMask)) - { - numAttribs++; - } - else - { - numAttribs = 0; - } + uint32_t numAttribs = state.feNumAttributes; + new (&this->paCut) PA_STATE_CUT(pDC, (uint8_t*)&this->vertexStore[0], MAX_NUM_VERTS_PER_PRIM * KNOB_SIMD_WIDTH, &this->indexStore[0], numVerts, numAttribs, state.topology, false); cutPA = true; diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/rasterizer.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/rasterizer.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/rasterizer.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/rasterizer.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -30,7 +30,6 @@ #include #include "rasterizer.h" -#include "multisample.h" #include "rdtsc_core.h" #include "backend.h" #include "utils.h" @@ -38,11 +37,12 @@ #include "tilemgr.h" #include "memory/tilingtraits.h" -void GetRenderHotTiles(DRAW_CONTEXT *pDC, uint32_t macroID, uint32_t x, uint32_t y, RenderOutputBuffers &renderBuffers, - uint32_t numSamples, uint32_t renderTargetArrayIndex); -void StepRasterTileX(uint32_t MaxRT, RenderOutputBuffers &buffers, uint32_t colorTileStep, uint32_t depthTileStep, uint32_t stencilTileStep); -void StepRasterTileY(uint32_t MaxRT, RenderOutputBuffers &buffers, RenderOutputBuffers &startBufferRow, - uint32_t colorRowStep, uint32_t depthRowStep, uint32_t stencilRowStep); +template +void GetRenderHotTiles(DRAW_CONTEXT *pDC, uint32_t macroID, uint32_t x, uint32_t y, RenderOutputBuffers &renderBuffers, uint32_t renderTargetArrayIndex); +template +void StepRasterTileX(uint32_t MaxRT, RenderOutputBuffers &buffers); +template +void StepRasterTileY(uint32_t MaxRT, RenderOutputBuffers &buffers, RenderOutputBuffers &startBufferRow); #define MASKTOVEC(i3,i2,i1,i0) {-i0,-i1,-i2,-i3} const __m256d gMaskToVecpd[] = @@ -88,7 +88,7 @@ /// @param vA, vB - A & B coefs for each edge of the triangle (Ax + Bx + C) /// @param vStepQuad0-2 - edge equations evaluated at the UL corners of the 2x2 pixel quad. /// Used to step between quads when sweeping over the raster tile. -template +template INLINE uint64_t rasterizePartialTile(DRAW_CONTEXT *pDC, double startEdges[NumEdges], EDGE *pRastEdges) { uint64_t coverageMask = 0; @@ -120,25 +120,31 @@ // evaluate which pixels in the quad are covered #define EVAL \ - UnrollerL<0, NumEdges, 1>::step(eval_lambda); + UnrollerLMask<0, NumEdges, 1, EdgeMaskT::value>::step(eval_lambda); // update coverage mask + // if edge 0 is degenerate and will be skipped; init the mask #define UPDATE_MASK(bit) \ - mask = edgeMask[0]; \ - UnrollerL<1, NumEdges, 1>::step(update_lambda); \ + if(std::is_same::value || std::is_same::value){\ + mask = 0xf;\ + }\ + else{\ + mask = edgeMask[0]; \ + }\ + UnrollerLMask<1, NumEdges, 1, EdgeMaskT::value>::step(update_lambda); \ coverageMask |= (mask << bit); // step in the +x direction to the next quad #define INCX \ - UnrollerL<0, NumEdges, 1>::step(incx_lambda); + UnrollerLMask<0, NumEdges, 1, EdgeMaskT::value>::step(incx_lambda); // step in the +y direction to the next quad #define INCY \ - UnrollerL<0, NumEdges, 1>::step(incy_lambda); + UnrollerLMask<0, NumEdges, 1, EdgeMaskT::value>::step(incy_lambda); // step in the -x direction to the next quad #define DECX \ - UnrollerL<0, NumEdges, 1>::step(decx_lambda); + UnrollerLMask<0, NumEdges, 1, EdgeMaskT::value>::step(decx_lambda); // sweep 2x2 quad back and forth through the raster tile, // computing coverage masks for the entire tile @@ -254,7 +260,7 @@ // Top left: a sample is in if it is a top or left edge. // Out: !(horizontal && above) = !horizontal && below // Out: !horizontal && left = !(!horizontal && left) = horizontal and right -INLINE __m256d adjustTopLeftRuleIntFix16(const __m128i vA, const __m128i vB, const __m256d vEdge) +INLINE void adjustTopLeftRuleIntFix16(const __m128i vA, const __m128i vB, __m256d &vEdge) { // if vA < 0, vC-- // if vA == 0 && vB < 0, vC-- @@ -271,10 +277,144 @@ msk2 &= _mm_movemask_ps(_mm_castsi128_ps(vB)); // if either of these are true and we're on the line (edge == 0), bump it outside the line - vEdgeOut = _mm256_blendv_pd(vEdgeOut, vEdgeAdjust, gMaskToVecpd[msk | msk2]); - return vEdgeOut; + vEdge = _mm256_blendv_pd(vEdgeOut, vEdgeAdjust, gMaskToVecpd[msk | msk2]); } +////////////////////////////////////////////////////////////////////////// +/// @brief calculates difference in precision between the result of manh +/// calculation and the edge precision, based on compile time trait values +template +constexpr int64_t ManhToEdgePrecisionAdjust() +{ + static_assert(RT::PrecisionT::BitsT::value + RT::ConservativePrecisionT::BitsT::value >= RT::EdgePrecisionT::BitsT::value, + "Inadequate precision of result of manh calculation "); + return ((RT::PrecisionT::BitsT::value + RT::ConservativePrecisionT::BitsT::value) - RT::EdgePrecisionT::BitsT::value); +} + +////////////////////////////////////////////////////////////////////////// +/// @struct adjustEdgeConservative +/// @brief Primary template definition used for partially specializing +/// the adjustEdgeConservative function. This struct should never +/// be instantiated. +/// @tparam RT: rasterizer traits +/// @tparam ConservativeEdgeOffsetT: does the edge need offsetting? +template +struct adjustEdgeConservative +{ + ////////////////////////////////////////////////////////////////////////// + /// @brief Performs calculations to adjust each edge of a triangle away + /// from the pixel center by 1/2 pixel + uncertainty region in both the x and y + /// direction. + /// + /// Uncertainty regions arise from fixed point rounding, which + /// can snap a vertex +/- by min fixed point value. + /// Adding 1/2 pixel in x/y bumps the edge equation tests out towards the pixel corners. + /// This allows the rasterizer to test for coverage only at the pixel center, + /// instead of having to test individual pixel corners for conservative coverage + INLINE adjustEdgeConservative(const __m128i &vAi, const __m128i &vBi, __m256d &vEdge) + { + // Assumes CCW winding order. Subtracting from the evaluated edge equation moves the edge away + // from the pixel center (in the direction of the edge normal A/B) + + // edge = Ax + Bx + C - (manh/e) + // manh = manhattan distance = abs(A) + abs(B) + // e = absolute rounding error from snapping from float to fixed point precision + + // 'fixed point' multiply (in double to be avx1 friendly) + // need doubles to hold result of a fixed multiply: 16.8 * 16.9 = 32.17, for example + __m256d vAai = _mm256_cvtepi32_pd(_mm_abs_epi32(vAi)), vBai = _mm256_cvtepi32_pd(_mm_abs_epi32(vBi)); + __m256d manh = _mm256_add_pd(_mm256_mul_pd(vAai, _mm256_set1_pd(ConservativeEdgeOffsetT::value)), + _mm256_mul_pd(vBai, _mm256_set1_pd(ConservativeEdgeOffsetT::value))); + + static_assert(RT::PrecisionT::BitsT::value + RT::ConservativePrecisionT::BitsT::value >= RT::EdgePrecisionT::BitsT::value, + "Inadequate precision of result of manh calculation "); + + // rasterizer incoming edge precision is x.16, so we need to get our edge offset into the same precision + // since we're doing fixed math in double format, multiply by multiples of 1/2 instead of a bit shift right + manh = _mm256_mul_pd(manh, _mm256_set1_pd(ManhToEdgePrecisionAdjust() * 0.5)); + + // move the edge away from the pixel center by the required conservative precision + 1/2 pixel + // this allows the rasterizer to do a single conservative coverage test to see if the primitive + // intersects the pixel at all + vEdge = _mm256_sub_pd(vEdge, manh); + }; +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief adjustEdgeConservative specialization where no edge offset is needed +template +struct adjustEdgeConservative> +{ + INLINE adjustEdgeConservative(const __m128i &vAi, const __m128i &vBi, __m256d &vEdge) {}; +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief calculates the distance a degenerate BBox needs to be adjusted +/// for conservative rast based on compile time trait values +template +constexpr int64_t ConservativeScissorOffset() +{ + static_assert(RT::ConservativePrecisionT::BitsT::value - RT::PrecisionT::BitsT::value >= 0, "Rasterizer precision > conservative precision"); + // if we have a degenerate triangle, we need to compensate for adjusting the degenerate BBox when calculating scissor edges + typedef std::integral_constant DegenerateEdgeOffsetT; + // 1/2 pixel edge offset + conservative offset - degenerateTriangle + return RT::ConservativeEdgeOffsetT::value - (DegenerateEdgeOffsetT::value << (RT::ConservativePrecisionT::BitsT::value - RT::PrecisionT::BitsT::value)); +} + +////////////////////////////////////////////////////////////////////////// +/// @brief Performs calculations to adjust each a vector of evaluated edges out +/// from the pixel center by 1/2 pixel + uncertainty region in both the x and y +/// direction. +template +INLINE void adjustScissorEdge(const double a, const double b, __m256d &vEdge) +{ + int64_t aabs = std::abs(static_cast(a)), babs = std::abs(static_cast(b)); + int64_t manh = ((aabs * ConservativeScissorOffset()) + (babs * ConservativeScissorOffset())) >> ManhToEdgePrecisionAdjust(); + vEdge = _mm256_sub_pd(vEdge, _mm256_set1_pd(manh)); +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief Performs calculations to adjust each a scalar evaluated edge out +/// from the pixel center by 1/2 pixel + uncertainty region in both the x and y +/// direction. +template +INLINE double adjustScalarEdge(const double a, const double b, const double Edge) +{ + int64_t aabs = std::abs(static_cast(a)), babs = std::abs(static_cast(b)); + int64_t manh = ((aabs * OffsetT::value) + (babs * OffsetT::value)) >> ManhToEdgePrecisionAdjust(); + return (Edge - manh); +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief Perform any needed adjustments to evaluated triangle edges +template +struct adjustEdgesFix16 +{ + INLINE adjustEdgesFix16(const __m128i &vAi, const __m128i &vBi, __m256d &vEdge) + { + static_assert(std::is_same>::value, + "Edge equation expected to be in x.16 fixed point"); + + static_assert(RT::IsConservativeT::value, "Edge offset assumes conservative rasterization is enabled"); + + // need to apply any edge offsets before applying the top-left rule + adjustEdgeConservative(vAi, vBi, vEdge); + + adjustTopLeftRuleIntFix16(vAi, vBi, vEdge); + } +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief Perform top left adjustments to evaluated triangle edges +template +struct adjustEdgesFix16> +{ + INLINE adjustEdgesFix16(const __m128i &vAi, const __m128i &vBi, __m256d &vEdge) + { + adjustTopLeftRuleIntFix16(vAi, vBi, vEdge); + } +}; + // max(abs(dz/dx), abs(dz,dy) INLINE float ComputeMaxDepthSlope(const SWR_TRIANGLE_DESC* pDesc) { @@ -409,9 +549,295 @@ ComputeEdgeData(p0.y - p1.y, p1.x - p0.x, edge); } -template +////////////////////////////////////////////////////////////////////////// +/// @brief Primary template definition used for partially specializing +/// the UpdateEdgeMasks function. Offset evaluated edges from UL pixel +/// corner to sample position, and test for coverage +/// @tparam sampleCount: multisample count +template +INLINE void UpdateEdgeMasks(const __m256d (&vEdgeTileBbox)[3], const __m256d* vEdgeFix16, + int32_t &mask0, int32_t &mask1, int32_t &mask2) +{ + __m256d vSampleBboxTest0, vSampleBboxTest1, vSampleBboxTest2; + // evaluate edge equations at the tile multisample bounding box + vSampleBboxTest0 = _mm256_add_pd(vEdgeTileBbox[0], vEdgeFix16[0]); + vSampleBboxTest1 = _mm256_add_pd(vEdgeTileBbox[1], vEdgeFix16[1]); + vSampleBboxTest2 = _mm256_add_pd(vEdgeTileBbox[2], vEdgeFix16[2]); + mask0 = _mm256_movemask_pd(vSampleBboxTest0); + mask1 = _mm256_movemask_pd(vSampleBboxTest1); + mask2 = _mm256_movemask_pd(vSampleBboxTest2); +} + +////////////////////////////////////////////////////////////////////////// +/// @brief UpdateEdgeMasks specialization, instantiated +/// when only rasterizing a single coverage test point +template <> +INLINE void UpdateEdgeMasks(const __m256d(&)[3], const __m256d* vEdgeFix16, + int32_t &mask0, int32_t &mask1, int32_t &mask2) +{ + mask0 = _mm256_movemask_pd(vEdgeFix16[0]); + mask1 = _mm256_movemask_pd(vEdgeFix16[1]); + mask2 = _mm256_movemask_pd(vEdgeFix16[2]); +} + +////////////////////////////////////////////////////////////////////////// +/// @struct ComputeScissorEdges +/// @brief Primary template definition. Allows the function to be generically +/// called. When paired with below specializations, will result in an empty +/// inlined function if scissor is not enabled +/// @tparam RasterScissorEdgesT: is scissor enabled? +/// @tparam IsConservativeT: is conservative rast enabled? +/// @tparam RT: rasterizer traits +template +struct ComputeScissorEdges +{ + INLINE ComputeScissorEdges(const SWR_RECT &triBBox, const SWR_RECT &scissorBBox, const int32_t x, const int32_t y, + EDGE (&rastEdges)[RT::NumEdgesT::value], __m256d (&vEdgeFix16)[7]){}; +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief ComputeScissorEdges partial +/// specialization. Instantiated when conservative rast and scissor are enabled +template +struct ComputeScissorEdges +{ + ////////////////////////////////////////////////////////////////////////// + /// @brief Intersect tri bbox with scissor, compute scissor edge vectors, + /// evaluate edge equations and offset them away from pixel center. + INLINE ComputeScissorEdges(const SWR_RECT &triBBox, const SWR_RECT &scissorBBox, const int32_t x, const int32_t y, + EDGE (&rastEdges)[RT::NumEdgesT::value], __m256d (&vEdgeFix16)[7]) + { + // if conservative rasterizing, triangle bbox intersected with scissor bbox is used + SWR_RECT scissor; + scissor.xmin = std::max(triBBox.xmin, scissorBBox.xmin); + scissor.xmax = std::min(triBBox.xmax, scissorBBox.xmax); + scissor.ymin = std::max(triBBox.ymin, scissorBBox.ymin); + scissor.ymax = std::min(triBBox.ymax, scissorBBox.ymax); + + POS topLeft{scissor.xmin, scissor.ymin}; + POS bottomLeft{scissor.xmin, scissor.ymax}; + POS topRight{scissor.xmax, scissor.ymin}; + POS bottomRight{scissor.xmax, scissor.ymax}; + + // construct 4 scissor edges in ccw direction + ComputeEdgeData(topLeft, bottomLeft, rastEdges[3]); + ComputeEdgeData(bottomLeft, bottomRight, rastEdges[4]); + ComputeEdgeData(bottomRight, topRight, rastEdges[5]); + ComputeEdgeData(topRight, topLeft, rastEdges[6]); + + vEdgeFix16[3] = _mm256_set1_pd((rastEdges[3].a * (x - scissor.xmin)) + (rastEdges[3].b * (y - scissor.ymin))); + vEdgeFix16[4] = _mm256_set1_pd((rastEdges[4].a * (x - scissor.xmin)) + (rastEdges[4].b * (y - scissor.ymax))); + vEdgeFix16[5] = _mm256_set1_pd((rastEdges[5].a * (x - scissor.xmax)) + (rastEdges[5].b * (y - scissor.ymax))); + vEdgeFix16[6] = _mm256_set1_pd((rastEdges[6].a * (x - scissor.xmax)) + (rastEdges[6].b * (y - scissor.ymin))); + + // if conservative rasterizing, need to bump the scissor edges out by the conservative uncertainty distance, else do nothing + adjustScissorEdge(rastEdges[3].a, rastEdges[3].b, vEdgeFix16[3]); + adjustScissorEdge(rastEdges[4].a, rastEdges[4].b, vEdgeFix16[4]); + adjustScissorEdge(rastEdges[5].a, rastEdges[5].b, vEdgeFix16[5]); + adjustScissorEdge(rastEdges[6].a, rastEdges[6].b, vEdgeFix16[6]); + + // Upper left rule for scissor + vEdgeFix16[3] = _mm256_sub_pd(vEdgeFix16[3], _mm256_set1_pd(1.0)); + vEdgeFix16[6] = _mm256_sub_pd(vEdgeFix16[6], _mm256_set1_pd(1.0)); + } +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief ComputeScissorEdges partial +/// specialization. Instantiated when scissor is enabled and conservative rast +/// is disabled. +template +struct ComputeScissorEdges +{ + ////////////////////////////////////////////////////////////////////////// + /// @brief Compute scissor edge vectors and evaluate edge equations + INLINE ComputeScissorEdges(const SWR_RECT &, const SWR_RECT &scissorBBox, const int32_t x, const int32_t y, + EDGE (&rastEdges)[RT::NumEdgesT::value], __m256d (&vEdgeFix16)[7]) + { + const SWR_RECT &scissor = scissorBBox; + POS topLeft{scissor.xmin, scissor.ymin}; + POS bottomLeft{scissor.xmin, scissor.ymax}; + POS topRight{scissor.xmax, scissor.ymin}; + POS bottomRight{scissor.xmax, scissor.ymax}; + + // construct 4 scissor edges in ccw direction + ComputeEdgeData(topLeft, bottomLeft, rastEdges[3]); + ComputeEdgeData(bottomLeft, bottomRight, rastEdges[4]); + ComputeEdgeData(bottomRight, topRight, rastEdges[5]); + ComputeEdgeData(topRight, topLeft, rastEdges[6]); + + vEdgeFix16[3] = _mm256_set1_pd((rastEdges[3].a * (x - scissor.xmin)) + (rastEdges[3].b * (y - scissor.ymin))); + vEdgeFix16[4] = _mm256_set1_pd((rastEdges[4].a * (x - scissor.xmin)) + (rastEdges[4].b * (y - scissor.ymax))); + vEdgeFix16[5] = _mm256_set1_pd((rastEdges[5].a * (x - scissor.xmax)) + (rastEdges[5].b * (y - scissor.ymax))); + vEdgeFix16[6] = _mm256_set1_pd((rastEdges[6].a * (x - scissor.xmax)) + (rastEdges[6].b * (y - scissor.ymin))); + + // Upper left rule for scissor + vEdgeFix16[3] = _mm256_sub_pd(vEdgeFix16[3], _mm256_set1_pd(1.0)); + vEdgeFix16[6] = _mm256_sub_pd(vEdgeFix16[6], _mm256_set1_pd(1.0)); + } +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief Primary function template for TrivialRejectTest. Should +/// never be called, but TemplateUnroller instantiates a few unused values, +/// so it calls a runtime assert instead of a static_assert. +template +INLINE bool TrivialRejectTest(const int, const int, const int) +{ + SWR_ASSERT(0, "Primary templated function should never be called"); + return false; +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief E0E1ValidT specialization of TrivialRejectTest. Tests edge 0 +/// and edge 1 for trivial coverage reject +template <> +INLINE bool TrivialRejectTest(const int mask0, const int mask1, const int) +{ + return (!(mask0 && mask1)) ? true : false; +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief E0E2ValidT specialization of TrivialRejectTest. Tests edge 0 +/// and edge 2 for trivial coverage reject +template <> +INLINE bool TrivialRejectTest(const int mask0, const int, const int mask2) +{ + return (!(mask0 && mask2)) ? true : false; +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief E1E2ValidT specialization of TrivialRejectTest. Tests edge 1 +/// and edge 2 for trivial coverage reject +template <> +INLINE bool TrivialRejectTest(const int, const int mask1, const int mask2) +{ + return (!(mask1 && mask2)) ? true : false; +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief AllEdgesValidT specialization of TrivialRejectTest. Tests all +/// primitive edges for trivial coverage reject +template <> +INLINE bool TrivialRejectTest(const int mask0, const int mask1, const int mask2) +{ + return (!(mask0 && mask1 && mask2)) ? true : false;; +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief NoEdgesValidT specialization of TrivialRejectTest. Degenerate +/// point, so return false and rasterize against conservative BBox +template <> +INLINE bool TrivialRejectTest(const int, const int, const int) +{ + return false; +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief Primary function template for TrivialAcceptTest. Always returns +/// false, since it will only be called for degenerate tris, and as such +/// will never cover the entire raster tile +template +INLINE bool TrivialAcceptTest(const int, const int, const int) +{ + return false; +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief AllEdgesValidT specialization for TrivialAcceptTest. Test all +/// edge masks for a fully covered raster tile +template <> +INLINE bool TrivialAcceptTest(const int mask0, const int mask1, const int mask2) +{ + return ((mask0 & mask1 & mask2) == 0xf); +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief Primary function template for GenerateSVInnerCoverage. Results +/// in an empty function call if SVInnerCoverage isn't requested +template +struct GenerateSVInnerCoverage +{ + INLINE GenerateSVInnerCoverage(DRAW_CONTEXT*, uint32_t, EDGE*, double*, uint64_t &){}; +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief Specialization of GenerateSVInnerCoverage where all edges +/// are non-degenerate and SVInnerCoverage is requested. Offsets the evaluated +/// edge values from OuterConservative to InnerConservative and rasterizes. +template +struct GenerateSVInnerCoverage +{ + INLINE GenerateSVInnerCoverage(DRAW_CONTEXT* pDC, uint32_t workerId, EDGE* pRastEdges, double* pStartQuadEdges, uint64_t &innerCoverageMask) + { + SWR_CONTEXT *pContext = pDC->pContext; + + double startQuadEdgesAdj[RT::NumEdgesT::value]; + for(uint32_t e = 0; e < RT::NumEdgesT::value; ++e) + { + startQuadEdgesAdj[e] = adjustScalarEdge(pRastEdges[e].a, pRastEdges[e].b, pStartQuadEdges[e]); + } + + // not trivial accept or reject, must rasterize full tile + AR_BEGIN(BERasterizePartial, pDC->drawId); + innerCoverageMask = rasterizePartialTile(pDC, startQuadEdgesAdj, pRastEdges); + AR_END(BERasterizePartial, 0); + } +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief Primary function template for UpdateEdgeMasksInnerConservative. Results +/// in an empty function call if SVInnerCoverage isn't requested +template +struct UpdateEdgeMasksInnerConservative +{ + INLINE UpdateEdgeMasksInnerConservative(const __m256d (&vEdgeTileBbox)[3], const __m256d*, + const __m128i, const __m128i, int32_t &, int32_t &, int32_t &){}; +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief Specialization of UpdateEdgeMasksInnerConservative where all edges +/// are non-degenerate and SVInnerCoverage is requested. Offsets the edges +/// evaluated at raster tile corners to inner conservative position and +/// updates edge masks +template +struct UpdateEdgeMasksInnerConservative +{ + INLINE UpdateEdgeMasksInnerConservative(const __m256d (&vEdgeTileBbox)[3], const __m256d* vEdgeFix16, + const __m128i vAi, const __m128i vBi, int32_t &mask0, int32_t &mask1, int32_t &mask2) + { + __m256d vTempEdge[3]{vEdgeFix16[0], vEdgeFix16[1], vEdgeFix16[2]}; + + // instead of keeping 2 copies of evaluated edges around, just compensate for the outer + // conservative evaluated edge when adjusting the edge in for inner conservative tests + adjustEdgeConservative(vAi, vBi, vTempEdge[0]); + adjustEdgeConservative(vAi, vBi, vTempEdge[1]); + adjustEdgeConservative(vAi, vBi, vTempEdge[2]); + + UpdateEdgeMasks(vEdgeTileBbox, vTempEdge, mask0, mask1, mask2); + } +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief Specialization of UpdateEdgeMasksInnerConservative where SVInnerCoverage +/// is requested but at least one edge is degenerate. Since a degenerate triangle cannot +/// cover an entire raster tile, set mask0 to 0 to force it down the +/// rastierizePartialTile path +template +struct UpdateEdgeMasksInnerConservative +{ + INLINE UpdateEdgeMasksInnerConservative(const __m256d (&)[3], const __m256d*, + const __m128i, const __m128i, int32_t &mask0, int32_t &, int32_t &) + { + // set one mask to zero to force the triangle down the rastierizePartialTile path + mask0 = 0; + } +}; + +template void RasterizeTriangle(DRAW_CONTEXT* pDC, uint32_t workerId, uint32_t macroTile, void* pDesc) { + SWR_CONTEXT *pContext = pDC->pContext; const TRIANGLE_WORK_DESC &workDesc = *((TRIANGLE_WORK_DESC*)pDesc); #if KNOB_ENABLE_TOSS_POINTS if (KNOB_TOSS_BIN_TRIS) @@ -419,9 +845,9 @@ return; } #endif - RDTSC_START(BERasterizeTriangle); + AR_BEGIN(BERasterizeTriangle, pDC->drawId); + AR_BEGIN(BETriangleSetup, pDC->drawId); - RDTSC_START(BETriangleSetup); const API_STATE &state = GetApiState(pDC); const SWR_RASTSTATE &rastState = state.rastState; const BACKEND_FUNCS& backendFuncs = pDC->pState->backendFuncs; @@ -439,6 +865,7 @@ vRecipW = _mm_load_ps(workDesc.pTriBuffer + 12); // convert to fixed point + static_assert(std::is_same>::value, "Rasterizer expects 16.8 fixed point precision"); __m128i vXi = fpToFixedPoint(vX); __m128i vYi = fpToFixedPoint(vY); @@ -457,7 +884,8 @@ // determinant float det = calcDeterminantInt(vAi, vBi); - /// @todo: This test is flipped...we have a stray '-' sign somewhere + // Verts in Pixel Coordinate Space at this point + // Det > 0 = CW winding order // Convert CW triangles to CCW if (det > 0.0) { @@ -472,22 +900,35 @@ // Finish triangle setup - C edge coef triangleSetupC(vX, vY, vA, vB, vC); - // compute barycentric i and j - // i = (A1x + B1y + C1)/det - // j = (A2x + B2y + C2)/det - __m128 vDet = _mm_set1_ps(det); - __m128 vRecipDet = _mm_div_ps(_mm_set1_ps(1.0f), vDet);//_mm_rcp_ps(vDet); - _mm_store_ss(&triDesc.recipDet, vRecipDet); - - // only extract coefs for 2 of the barycentrics; the 3rd can be - // determined from the barycentric equation: - // i + j + k = 1 <=> k = 1 - j - i - _MM_EXTRACT_FLOAT(triDesc.I[0], vA, 1); - _MM_EXTRACT_FLOAT(triDesc.I[1], vB, 1); - _MM_EXTRACT_FLOAT(triDesc.I[2], vC, 1); - _MM_EXTRACT_FLOAT(triDesc.J[0], vA, 2); - _MM_EXTRACT_FLOAT(triDesc.J[1], vB, 2); - _MM_EXTRACT_FLOAT(triDesc.J[2], vC, 2); + if(RT::ValidEdgeMaskT::value != ALL_EDGES_VALID) + { + // If we have degenerate edge(s) to rasterize, set I and J coefs + // to 0 for constant interpolation of attributes + triDesc.I[0] = 0.0f; + triDesc.I[1] = 0.0f; + triDesc.I[2] = 0.0f; + triDesc.J[0] = 0.0f; + triDesc.J[1] = 0.0f; + triDesc.J[2] = 0.0f; + + // Degenerate triangles have no area + triDesc.recipDet = 0.0f; + } + else + { + // only extract coefs for 2 of the barycentrics; the 3rd can be + // determined from the barycentric equation: + // i + j + k = 1 <=> k = 1 - j - i + _MM_EXTRACT_FLOAT(triDesc.I[0], vA, 1); + _MM_EXTRACT_FLOAT(triDesc.I[1], vB, 1); + _MM_EXTRACT_FLOAT(triDesc.I[2], vC, 1); + _MM_EXTRACT_FLOAT(triDesc.J[0], vA, 2); + _MM_EXTRACT_FLOAT(triDesc.J[1], vB, 2); + _MM_EXTRACT_FLOAT(triDesc.J[2], vC, 2); + + // compute recipDet, used to calculate barycentric i and j in the backend + triDesc.recipDet = 1.0f/det; + } OSALIGNSIMD(float) oneOverW[4]; _mm_store_ps(oneOverW, vRecipW); @@ -533,43 +974,26 @@ // add depth bias triDesc.Z[2] += ComputeDepthBias(&rastState, &triDesc, workDesc.pTriBuffer + 8); - // Compute edge data - OSALIGNSIMD(int32_t) aAi[4], aBi[4]; - _mm_store_si128((__m128i*)aAi, vAi); - _mm_store_si128((__m128i*)aBi, vBi); - - const uint32_t numEdges = 3 + (RasterizeScissorEdges ? 4 : 0); - EDGE rastEdges[7]; + // Calc bounding box of triangle + OSALIGNSIMD(SWR_RECT) bbox; + calcBoundingBoxInt(vXi, vYi, bbox); - // compute triangle edges - ComputeEdgeData(aAi[0], aBi[0], rastEdges[0]); - ComputeEdgeData(aAi[1], aBi[1], rastEdges[1]); - ComputeEdgeData(aAi[2], aBi[2], rastEdges[2]); + const SWR_RECT &scissorInFixedPoint = state.scissorsInFixedPoint[workDesc.triFlags.viewportIndex]; - // compute scissor edges if enabled - if (RasterizeScissorEdges) + if(RT::ValidEdgeMaskT::value != ALL_EDGES_VALID) { - POS topLeft{state.scissorInFixedPoint.left, state.scissorInFixedPoint.top}; - POS bottomLeft{state.scissorInFixedPoint.left, state.scissorInFixedPoint.bottom}; - POS topRight{state.scissorInFixedPoint.right, state.scissorInFixedPoint.top}; - POS bottomRight{state.scissorInFixedPoint.right, state.scissorInFixedPoint.bottom}; - - // construct 4 scissor edges in ccw direction - ComputeEdgeData(topLeft, bottomLeft, rastEdges[3]); - ComputeEdgeData(bottomLeft, bottomRight, rastEdges[4]); - ComputeEdgeData(bottomRight, topRight, rastEdges[5]); - ComputeEdgeData(topRight, topLeft, rastEdges[6]); + // If we're rasterizing a degenerate triangle, expand bounding box to guarantee the BBox is valid + bbox.xmin--; bbox.xmax++; bbox.ymin--; bbox.ymax++; + SWR_ASSERT(scissorInFixedPoint.xmin >= 0 && scissorInFixedPoint.ymin >= 0, + "Conservative rast degenerate handling requires a valid scissor rect"); } - // Calc bounding box of triangle - OSALIGNSIMD(BBOX) bbox; - calcBoundingBoxInt(vXi, vYi, bbox); - // Intersect with scissor/viewport - bbox.left = std::max(bbox.left, state.scissorInFixedPoint.left); - bbox.right = std::min(bbox.right - 1, state.scissorInFixedPoint.right); - bbox.top = std::max(bbox.top, state.scissorInFixedPoint.top); - bbox.bottom = std::min(bbox.bottom - 1, state.scissorInFixedPoint.bottom); + OSALIGNSIMD(SWR_RECT) intersect; + intersect.xmin = std::max(bbox.xmin, scissorInFixedPoint.xmin); + intersect.xmax = std::min(bbox.xmax - 1, scissorInFixedPoint.xmax); + intersect.ymin = std::max(bbox.ymin, scissorInFixedPoint.ymin); + intersect.ymax = std::min(bbox.ymax - 1, scissorInFixedPoint.ymax); triDesc.triFlags = workDesc.triFlags; @@ -581,39 +1005,43 @@ int32_t macroBoxTop = macroY * KNOB_MACROTILE_Y_DIM_FIXED; int32_t macroBoxBottom = macroBoxTop + KNOB_MACROTILE_Y_DIM_FIXED - 1; - OSALIGNSIMD(BBOX) intersect; - intersect.left = std::max(bbox.left, macroBoxLeft); - intersect.top = std::max(bbox.top, macroBoxTop); - intersect.right = std::min(bbox.right, macroBoxRight); - intersect.bottom = std::min(bbox.bottom, macroBoxBottom); + intersect.xmin = std::max(intersect.xmin, macroBoxLeft); + intersect.ymin = std::max(intersect.ymin, macroBoxTop); + intersect.xmax = std::min(intersect.xmax, macroBoxRight); + intersect.ymax = std::min(intersect.ymax, macroBoxBottom); - SWR_ASSERT(intersect.left <= intersect.right && intersect.top <= intersect.bottom && intersect.left >= 0 && intersect.right >= 0 && intersect.top >= 0 && intersect.bottom >= 0); + SWR_ASSERT(intersect.xmin <= intersect.xmax && intersect.ymin <= intersect.ymax && intersect.xmin >= 0 && intersect.xmax >= 0 && intersect.ymin >= 0 && intersect.ymax >= 0); - RDTSC_STOP(BETriangleSetup, 0, pDC->drawId); + AR_END(BETriangleSetup, 0); // update triangle desc - uint32_t tileX = intersect.left >> (KNOB_TILE_X_DIM_SHIFT + FIXED_POINT_SHIFT); - uint32_t tileY = intersect.top >> (KNOB_TILE_Y_DIM_SHIFT + FIXED_POINT_SHIFT); - uint32_t maxTileX = intersect.right >> (KNOB_TILE_X_DIM_SHIFT + FIXED_POINT_SHIFT); - uint32_t maxTileY = intersect.bottom >> (KNOB_TILE_Y_DIM_SHIFT + FIXED_POINT_SHIFT); - uint32_t numTilesX = maxTileX - tileX + 1; - uint32_t numTilesY = maxTileY - tileY + 1; + uint32_t minTileX = intersect.xmin >> (KNOB_TILE_X_DIM_SHIFT + FIXED_POINT_SHIFT); + uint32_t minTileY = intersect.ymin >> (KNOB_TILE_Y_DIM_SHIFT + FIXED_POINT_SHIFT); + uint32_t maxTileX = intersect.xmax >> (KNOB_TILE_X_DIM_SHIFT + FIXED_POINT_SHIFT); + uint32_t maxTileY = intersect.ymax >> (KNOB_TILE_Y_DIM_SHIFT + FIXED_POINT_SHIFT); + uint32_t numTilesX = maxTileX - minTileX + 1; + uint32_t numTilesY = maxTileY - minTileY + 1; if (numTilesX == 0 || numTilesY == 0) { RDTSC_EVENT(BEEmptyTriangle, 1, 0); - RDTSC_STOP(BERasterizeTriangle, 1, 0); + AR_END(BERasterizeTriangle, 1); return; } - RDTSC_START(BEStepSetup); + AR_BEGIN(BEStepSetup, pDC->drawId); // Step to pixel center of top-left pixel of the triangle bbox // Align intersect bbox (top/left) to raster tile's (top/left). - int32_t x = AlignDown(intersect.left, (FIXED_POINT_SCALE * KNOB_TILE_X_DIM)); - int32_t y = AlignDown(intersect.top, (FIXED_POINT_SCALE * KNOB_TILE_Y_DIM)); + int32_t x = AlignDown(intersect.xmin, (FIXED_POINT_SCALE * KNOB_TILE_X_DIM)); + int32_t y = AlignDown(intersect.ymin, (FIXED_POINT_SCALE * KNOB_TILE_Y_DIM)); - if(sampleCount == SWR_MULTISAMPLE_1X) + // convenience typedef + typedef typename RT::NumRasterSamplesT NumRasterSamplesT; + + // single sample rasterization evaluates edges at pixel center, + // multisample evaluates edges UL pixel corner and steps to each sample position + if(std::is_same::value) { // Add 0.5, in fixed point, to offset to pixel center x += (FIXED_POINT_SCALE / 2); @@ -624,9 +1052,6 @@ __m128i vTopLeftY = _mm_set1_epi32(y); // evaluate edge equations at top-left pixel using 64bit math - // all other evaluations will be 32bit steps from it - // small triangles could skip this and do all 32bit math - // edge 0 // // line = Ax + By + C // solving for C: @@ -634,18 +1059,15 @@ // we know x0 and y0 are on the line; plug them in: // C = -Ax0 - By0 // plug C back into line equation: - // line = Ax - Bx - Ax0 - Bx1 + // line = Ax - By - Ax0 - By0 // line = A(x - x0) + B(y - y0) - // line = A(x0+dX) + B(y0+dY) + C = Ax0 + AdX + By0 + BdY + c = AdX + BdY + // dX = (x-x0), dY = (y-y0) + // so all this simplifies to + // edge = A(dX) + B(dY), our first test at the top left of the bbox we're rasterizing within - // edge 0 and 1 - // edge0 = A0(x - x0) + B0(y - y0) - // edge1 = A1(x - x1) + B1(y - y1) __m128i vDeltaX = _mm_sub_epi32(vTopLeftX, vXi); __m128i vDeltaY = _mm_sub_epi32(vTopLeftY, vYi); - __m256d vEdgeFix16[7]; - // evaluate A(dx) and B(dY) for all points __m256d vAipd = _mm256_cvtepi32_pd(vAi); __m256d vBipd = _mm256_cvtepi32_pd(vBi); @@ -656,28 +1078,33 @@ __m256d vBiDeltaYFix16 = _mm256_mul_pd(vBipd, vDeltaYpd); __m256d vEdge = _mm256_add_pd(vAiDeltaXFix16, vBiDeltaYFix16); - // adjust for top-left rule - vEdge = adjustTopLeftRuleIntFix16(vAi, vBi, vEdge); + // apply any edge adjustments(top-left, crast, etc) + adjustEdgesFix16(vAi, vBi, vEdge); // broadcast respective edge results to all lanes double* pEdge = (double*)&vEdge; + __m256d vEdgeFix16[7]; vEdgeFix16[0] = _mm256_set1_pd(pEdge[0]); vEdgeFix16[1] = _mm256_set1_pd(pEdge[1]); vEdgeFix16[2] = _mm256_set1_pd(pEdge[2]); - // evaluate edge equations for scissor edges - if (RasterizeScissorEdges) - { - const BBOX &scissor = state.scissorInFixedPoint; - vEdgeFix16[3] = _mm256_set1_pd((rastEdges[3].a * (x - scissor.left)) + (rastEdges[3].b * (y - scissor.top))); - vEdgeFix16[4] = _mm256_set1_pd((rastEdges[4].a * (x - scissor.left)) + (rastEdges[4].b * (y - scissor.bottom))); - vEdgeFix16[5] = _mm256_set1_pd((rastEdges[5].a * (x - scissor.right)) + (rastEdges[5].b * (y - scissor.bottom))); - vEdgeFix16[6] = _mm256_set1_pd((rastEdges[6].a * (x - scissor.right)) + (rastEdges[6].b * (y - scissor.top))); - } + OSALIGNSIMD(int32_t) aAi[4], aBi[4]; + _mm_store_si128((__m128i*)aAi, vAi); + _mm_store_si128((__m128i*)aBi, vBi); + EDGE rastEdges[RT::NumEdgesT::value]; + + // Compute and store triangle edge data + ComputeEdgeData(aAi[0], aBi[0], rastEdges[0]); + ComputeEdgeData(aAi[1], aBi[1], rastEdges[1]); + ComputeEdgeData(aAi[2], aBi[2], rastEdges[2]); + + // Compute and store triangle edge data if scissor needs to rasterized + ComputeScissorEdges + (bbox, scissorInFixedPoint, x, y, rastEdges, vEdgeFix16); // Evaluate edge equations at sample positions of each of the 4 corners of a raster tile // used to for testing if entire raster tile is inside a triangle - for (uint32_t e = 0; e < numEdges; ++e) + for (uint32_t e = 0; e < RT::NumEdgesT::value; ++e) { vEdgeFix16[e] = _mm256_add_pd(vEdgeFix16[e], rastEdges[e].vRasterTileOffsets); } @@ -689,10 +1116,10 @@ // | | // min(xSamples),max(ySamples) ------ max(xSamples),max(ySamples) __m256d vEdgeTileBbox[3]; - if (sampleCount > SWR_MULTISAMPLE_1X) + if (NumRasterSamplesT::value > 1) { - __m128i vTileSampleBBoxXh = MultisampleTraits::TileSampleOffsetsX(); - __m128i vTileSampleBBoxYh = MultisampleTraits::TileSampleOffsetsY(); + __m128i vTileSampleBBoxXh = RT::MT::TileSampleOffsetsX(); + __m128i vTileSampleBBoxYh = RT::MT::TileSampleOffsetsY(); __m256d vTileSampleBBoxXFix8 = _mm256_cvtepi32_pd(vTileSampleBBoxXh); __m256d vTileSampleBBoxYFix8 = _mm256_cvtepi32_pd(vTileSampleBBoxYh); @@ -704,35 +1131,28 @@ __m256d vResultAxFix16 = _mm256_mul_pd(_mm256_set1_pd(rastEdges[e].a), vTileSampleBBoxXFix8); __m256d vResultByFix16 = _mm256_mul_pd(_mm256_set1_pd(rastEdges[e].b), vTileSampleBBoxYFix8); vEdgeTileBbox[e] = _mm256_add_pd(vResultAxFix16, vResultByFix16); + + // adjust for msaa tile bbox edges outward for conservative rast, if enabled + adjustEdgeConservative(vAi, vBi, vEdgeTileBbox[e]); } } - RDTSC_STOP(BEStepSetup, 0, pDC->drawId); + AR_END(BEStepSetup, 0); - uint32_t tY = tileY; - uint32_t tX = tileX; + uint32_t tY = minTileY; + uint32_t tX = minTileX; uint32_t maxY = maxTileY; uint32_t maxX = maxTileX; - // compute steps between raster tiles for render output buffers - static const uint32_t colorRasterTileStep{(KNOB_TILE_X_DIM * KNOB_TILE_Y_DIM * (FormatTraits::bpp / 8)) * MultisampleTraits::numSamples}; - static const uint32_t colorRasterTileRowStep{(KNOB_MACROTILE_X_DIM / KNOB_TILE_X_DIM) * colorRasterTileStep}; - static const uint32_t depthRasterTileStep{(KNOB_TILE_X_DIM * KNOB_TILE_Y_DIM * (FormatTraits::bpp / 8)) * MultisampleTraits::numSamples}; - static const uint32_t depthRasterTileRowStep{(KNOB_MACROTILE_X_DIM / KNOB_TILE_X_DIM)* depthRasterTileStep}; - static const uint32_t stencilRasterTileStep{(KNOB_TILE_X_DIM * KNOB_TILE_Y_DIM * (FormatTraits::bpp / 8)) * MultisampleTraits::numSamples}; - static const uint32_t stencilRasterTileRowStep{(KNOB_MACROTILE_X_DIM / KNOB_TILE_X_DIM) * stencilRasterTileStep}; RenderOutputBuffers renderBuffers, currentRenderBufferRow; - - GetRenderHotTiles(pDC, macroTile, tileX, tileY, renderBuffers, MultisampleTraits::numSamples, - triDesc.triFlags.renderTargetArrayIndex); + GetRenderHotTiles(pDC, macroTile, minTileX, minTileY, renderBuffers, triDesc.triFlags.renderTargetArrayIndex); currentRenderBufferRow = renderBuffers; // rasterize and generate coverage masks per sample - uint32_t maxSamples = MultisampleTraits::numSamples; for (uint32_t tileY = tY; tileY <= maxY; ++tileY) { - __m256d vStartOfRowEdge[numEdges]; - for (uint32_t e = 0; e < numEdges; ++e) + __m256d vStartOfRowEdge[RT::NumEdgesT::value]; + for (uint32_t e = 0; e < RT::NumEdgesT::value; ++e) { vStartOfRowEdge[e] = vEdgeFix16[e]; } @@ -743,63 +1163,56 @@ // is the corner of the edge outside of the raster tile? (vEdge < 0) int mask0, mask1, mask2; - if (sampleCount == SWR_MULTISAMPLE_1X) - { - mask0 = _mm256_movemask_pd(vEdgeFix16[0]); - mask1 = _mm256_movemask_pd(vEdgeFix16[1]); - mask2 = _mm256_movemask_pd(vEdgeFix16[2]); - } - else - { - __m256d vSampleBboxTest0, vSampleBboxTest1, vSampleBboxTest2; - // evaluate edge equations at the tile multisample bounding box - vSampleBboxTest0 = _mm256_add_pd(vEdgeTileBbox[0], vEdgeFix16[0]); - vSampleBboxTest1 = _mm256_add_pd(vEdgeTileBbox[1], vEdgeFix16[1]); - vSampleBboxTest2 = _mm256_add_pd(vEdgeTileBbox[2], vEdgeFix16[2]); - mask0 = _mm256_movemask_pd(vSampleBboxTest0); - mask1 = _mm256_movemask_pd(vSampleBboxTest1); - mask2 = _mm256_movemask_pd(vSampleBboxTest2); - } + UpdateEdgeMasks(vEdgeTileBbox, vEdgeFix16, mask0, mask1, mask2); - for (uint32_t sampleNum = 0; sampleNum < maxSamples; sampleNum++) + for (uint32_t sampleNum = 0; sampleNum < NumRasterSamplesT::value; sampleNum++) { // trivial reject, at least one edge has all 4 corners of raster tile outside - bool trivialReject = (!(mask0 && mask1 && mask2)) ? true : false; + bool trivialReject = TrivialRejectTest(mask0, mask1, mask2); if (!trivialReject) { // trivial accept mask triDesc.coverageMask[sampleNum] = 0xffffffffffffffffULL; - if ((mask0 & mask1 & mask2) == 0xf) + + // Update the raster tile edge masks based on inner conservative edge offsets, if enabled + UpdateEdgeMasksInnerConservative + (vEdgeTileBbox, vEdgeFix16, vAi, vBi, mask0, mask1, mask2); + + // @todo Make this a bit smarter to allow use of trivial accept when: + // 1) scissor/vp intersection rect is raster tile aligned + // 2) raster tile is entirely within scissor/vp intersection rect + if (TrivialAcceptTest(mask0, mask1, mask2)) { - triDesc.anyCoveredSamples = triDesc.coverageMask[sampleNum]; // trivial accept, all 4 corners of all 3 edges are negative // i.e. raster tile completely inside triangle + triDesc.anyCoveredSamples = triDesc.coverageMask[sampleNum]; + if(std::is_same::value) + { + triDesc.innerCoverageMask = 0xffffffffffffffffULL; + } RDTSC_EVENT(BETrivialAccept, 1, 0); } else { - __m256d vEdgeAtSample[numEdges]; - if(sampleCount == SWR_MULTISAMPLE_1X) + __m256d vEdgeAtSample[RT::NumEdgesT::value]; + if(std::is_same::value) { // should get optimized out for single sample case (global value numbering or copy propagation) - for (uint32_t e = 0; e < numEdges; ++e) + for (uint32_t e = 0; e < RT::NumEdgesT::value; ++e) { vEdgeAtSample[e] = vEdgeFix16[e]; } } else { - __m128i vSampleOffsetXh = MultisampleTraits::vXi(sampleNum); - __m128i vSampleOffsetYh = MultisampleTraits::vYi(sampleNum); + __m128i vSampleOffsetXh = RT::MT::vXi(sampleNum); + __m128i vSampleOffsetYh = RT::MT::vYi(sampleNum); __m256d vSampleOffsetX = _mm256_cvtepi32_pd(vSampleOffsetXh); __m256d vSampleOffsetY = _mm256_cvtepi32_pd(vSampleOffsetYh); - // *note*: none of this needs to be vectorized as rasterizePartialTile just takes vEdge[0] - // for each edge and broadcasts it before offsetting to individual pixel quads - // step edge equation tests from UL tile corner to pixel sample position - for (uint32_t e = 0; e < numEdges; ++e) + for (uint32_t e = 0; e < RT::NumEdgesT::value; ++e) { __m256d vResultAxFix16 = _mm256_mul_pd(_mm256_set1_pd(rastEdges[e].a), vSampleOffsetX); __m256d vResultByFix16 = _mm256_mul_pd(_mm256_set1_pd(rastEdges[e].b), vSampleOffsetY); @@ -808,32 +1221,28 @@ } } - double startQuadEdges[numEdges]; + double startQuadEdges[RT::NumEdgesT::value]; const __m256i vLane0Mask = _mm256_set_epi32(0, 0, 0, 0, 0, 0, -1, -1); - for (uint32_t e = 0; e < numEdges; ++e) + for (uint32_t e = 0; e < RT::NumEdgesT::value; ++e) { _mm256_maskstore_pd(&startQuadEdges[e], vLane0Mask, vEdgeAtSample[e]); } // not trivial accept or reject, must rasterize full tile - RDTSC_START(BERasterizePartial); - if (RasterizeScissorEdges) - { - triDesc.coverageMask[sampleNum] = rasterizePartialTile<7>(pDC, startQuadEdges, rastEdges); - } - else - { - triDesc.coverageMask[sampleNum] = rasterizePartialTile<3>(pDC, startQuadEdges, rastEdges); - } - RDTSC_STOP(BERasterizePartial, 0, 0); + AR_BEGIN(BERasterizePartial, pDC->drawId); + triDesc.coverageMask[sampleNum] = rasterizePartialTile(pDC, startQuadEdges, rastEdges); + AR_END(BERasterizePartial, 0); triDesc.anyCoveredSamples |= triDesc.coverageMask[sampleNum]; + + // Output SV InnerCoverage, if needed + GenerateSVInnerCoverage(pDC, workerId, rastEdges, startQuadEdges, triDesc.innerCoverageMask); } } else { // if we're calculating coverage per sample, need to store it off. otherwise no covered samples, don't need to do anything - if(sampleCount > SWR_MULTISAMPLE_1X) + if(NumRasterSamplesT::value > 1) { triDesc.coverageMask[sampleNum] = 0; } @@ -850,28 +1259,36 @@ #endif if(triDesc.anyCoveredSamples) { - RDTSC_START(BEPixelBackend); + // if conservative rast and MSAA are enabled, conservative coverage for a pixel means all samples in that pixel are covered + // copy conservative coverage result to all samples + if(RT::IsConservativeT::value) + { + auto copyCoverage = [&](int sample){triDesc.coverageMask[sample] = triDesc.coverageMask[0]; }; + UnrollerL<1, RT::MT::numSamples, 1>::step(copyCoverage); + } + + AR_BEGIN(BEPixelBackend, pDC->drawId); backendFuncs.pfnBackend(pDC, workerId, tileX << KNOB_TILE_X_DIM_SHIFT, tileY << KNOB_TILE_Y_DIM_SHIFT, triDesc, renderBuffers); - RDTSC_STOP(BEPixelBackend, 0, 0); + AR_END(BEPixelBackend, 0); } // step to the next tile in X - for (uint32_t e = 0; e < numEdges; ++e) + for (uint32_t e = 0; e < RT::NumEdgesT::value; ++e) { vEdgeFix16[e] = _mm256_add_pd(vEdgeFix16[e], _mm256_set1_pd(rastEdges[e].stepRasterTileX)); } - StepRasterTileX(state.psState.numRenderTargets, renderBuffers, colorRasterTileStep, depthRasterTileStep, stencilRasterTileStep); + StepRasterTileX(state.psState.numRenderTargets, renderBuffers); } // step to the next tile in Y - for (uint32_t e = 0; e < numEdges; ++e) + for (uint32_t e = 0; e < RT::NumEdgesT::value; ++e) { vEdgeFix16[e] = _mm256_add_pd(vStartOfRowEdge[e], _mm256_set1_pd(rastEdges[e].stepRasterTileY)); } - StepRasterTileY(state.psState.numRenderTargets, renderBuffers, currentRenderBufferRow, colorRasterTileRowStep, depthRasterTileRowStep, stencilRasterTileRowStep); + StepRasterTileY(state.psState.numRenderTargets, renderBuffers, currentRenderBufferRow); } - RDTSC_STOP(BERasterizeTriangle, 1, 0); + AR_END(BERasterizeTriangle, 1); } void RasterizeTriPoint(DRAW_CONTEXT *pDC, uint32_t workerId, uint32_t macroTile, void* pData) @@ -922,16 +1339,11 @@ // setup triangle rasterizer function PFN_WORK_FUNC pfnTriRast; - if (rastState.samplePattern == SWR_MSAA_STANDARD_PATTERN) - { - pfnTriRast = gRasterizerTable[rastState.scissorEnable][rastState.sampleCount]; - } - else - { - // for center sample pattern, all samples are at pixel center; calculate coverage - // once at center and broadcast the results in the backend - pfnTriRast = gRasterizerTable[rastState.scissorEnable][SWR_MULTISAMPLE_1X]; - } + // for center sample pattern, all samples are at pixel center; calculate coverage + // once at center and broadcast the results in the backend + uint32_t sampleCount = (rastState.samplePattern == SWR_MSAA_STANDARD_PATTERN) ? rastState.sampleCount : SWR_MULTISAMPLE_1X; + // conservative rast not supported for points/lines + pfnTriRast = GetRasterizerFunc(sampleCount, false, SWR_INPUT_COVERAGE_NONE, ALL_EDGES_VALID, (pDC->pState->state.scissorsTileAligned == false)); // overwrite texcoords for point sprites if (isPointSpriteTexCoordEnabled) @@ -1011,6 +1423,8 @@ void RasterizeSimplePoint(DRAW_CONTEXT *pDC, uint32_t workerId, uint32_t macroTile, void* pData) { + SWR_CONTEXT *pContext = pDC->pContext; + #if KNOB_ENABLE_TOSS_POINTS if (KNOB_TOSS_BIN_TRIS) { @@ -1064,16 +1478,16 @@ RenderOutputBuffers renderBuffers; GetRenderHotTiles(pDC, macroTile, tileAlignedX >> KNOB_TILE_X_DIM_SHIFT , tileAlignedY >> KNOB_TILE_Y_DIM_SHIFT, - renderBuffers, 1, triDesc.triFlags.renderTargetArrayIndex); + renderBuffers, triDesc.triFlags.renderTargetArrayIndex); - RDTSC_START(BEPixelBackend); + AR_BEGIN(BEPixelBackend, pDC->drawId); backendFuncs.pfnBackend(pDC, workerId, tileAlignedX, tileAlignedY, triDesc, renderBuffers); - RDTSC_STOP(BEPixelBackend, 0, 0); + AR_END(BEPixelBackend, 0); } // Get pointers to hot tile memory for color RT, depth, stencil -void GetRenderHotTiles(DRAW_CONTEXT *pDC, uint32_t macroID, uint32_t tileX, uint32_t tileY, RenderOutputBuffers &renderBuffers, - uint32_t numSamples, uint32_t renderTargetArrayIndex) +template +void GetRenderHotTiles(DRAW_CONTEXT *pDC, uint32_t macroID, uint32_t tileX, uint32_t tileY, RenderOutputBuffers &renderBuffers, uint32_t renderTargetArrayIndex) { const API_STATE& state = GetApiState(pDC); SWR_CONTEXT *pContext = pDC->pContext; @@ -1123,54 +1537,36 @@ } } -INLINE -void StepRasterTileX(uint32_t NumRT, RenderOutputBuffers &buffers, uint32_t colorTileStep, uint32_t depthTileStep, uint32_t stencilTileStep) +template +INLINE void StepRasterTileX(uint32_t NumRT, RenderOutputBuffers &buffers) { for(uint32_t rt = 0; rt < NumRT; ++rt) { - buffers.pColor[rt] += colorTileStep; + buffers.pColor[rt] += RT::colorRasterTileStep; } - buffers.pDepth += depthTileStep; - buffers.pStencil += stencilTileStep; + buffers.pDepth += RT::depthRasterTileStep; + buffers.pStencil += RT::stencilRasterTileStep; } -INLINE -void StepRasterTileY(uint32_t NumRT, RenderOutputBuffers &buffers, RenderOutputBuffers &startBufferRow, uint32_t colorRowStep, uint32_t depthRowStep, uint32_t stencilRowStep) +template +INLINE void StepRasterTileY(uint32_t NumRT, RenderOutputBuffers &buffers, RenderOutputBuffers &startBufferRow) { for(uint32_t rt = 0; rt < NumRT; ++rt) { - startBufferRow.pColor[rt] += colorRowStep; + startBufferRow.pColor[rt] += RT::colorRasterTileRowStep; buffers.pColor[rt] = startBufferRow.pColor[rt]; } - startBufferRow.pDepth += depthRowStep; + startBufferRow.pDepth += RT::depthRasterTileRowStep; buffers.pDepth = startBufferRow.pDepth; - startBufferRow.pStencil += stencilRowStep; + startBufferRow.pStencil += RT::stencilRasterTileRowStep; buffers.pStencil = startBufferRow.pStencil; } -// initialize rasterizer function table -PFN_WORK_FUNC gRasterizerTable[2][SWR_MULTISAMPLE_TYPE_MAX] = -{ - { - RasterizeTriangle, - RasterizeTriangle, - RasterizeTriangle, - RasterizeTriangle, - RasterizeTriangle - }, - { - RasterizeTriangle, - RasterizeTriangle, - RasterizeTriangle, - RasterizeTriangle, - RasterizeTriangle - } -}; - void RasterizeLine(DRAW_CONTEXT *pDC, uint32_t workerId, uint32_t macroTile, void *pData) { + SWR_CONTEXT *pContext = pDC->pContext; const TRIANGLE_WORK_DESC &workDesc = *((TRIANGLE_WORK_DESC*)pData); #if KNOB_ENABLE_TOSS_POINTS if (KNOB_TOSS_BIN_TRIS) @@ -1180,7 +1576,7 @@ #endif // bloat line to two tris and call the triangle rasterizer twice - RDTSC_START(BERasterizeLine); + AR_BEGIN(BERasterizeLine, pDC->drawId); const API_STATE &state = GetApiState(pDC); const SWR_RASTSTATE &rastState = state.rastState; @@ -1193,6 +1589,8 @@ int32_t macroBoxTop = macroY * KNOB_MACROTILE_Y_DIM_FIXED; int32_t macroBoxBottom = macroBoxTop + KNOB_MACROTILE_Y_DIM_FIXED - 1; + const SWR_RECT &scissorInFixedPoint = state.scissorsInFixedPoint[workDesc.triFlags.viewportIndex]; + // create a copy of the triangle buffer to write our adjusted vertices to OSALIGNSIMD(float) newTriBuffer[4 * 4]; TRIANGLE_WORK_DESC newWorkDesc = workDesc; @@ -1274,22 +1672,28 @@ } } + // setup triangle rasterizer function + PFN_WORK_FUNC pfnTriRast; + uint32_t sampleCount = (rastState.samplePattern == SWR_MSAA_STANDARD_PATTERN) ? rastState.sampleCount : SWR_MULTISAMPLE_1X; + // conservative rast not supported for points/lines + pfnTriRast = GetRasterizerFunc(sampleCount, false, SWR_INPUT_COVERAGE_NONE, ALL_EDGES_VALID, (pDC->pState->state.scissorsTileAligned == false)); + // make sure this macrotile intersects the triangle __m128i vXai = fpToFixedPoint(vXa); __m128i vYai = fpToFixedPoint(vYa); - OSALIGNSIMD(BBOX) bboxA; + OSALIGNSIMD(SWR_RECT) bboxA; calcBoundingBoxInt(vXai, vYai, bboxA); - if (!(bboxA.left > macroBoxRight || - bboxA.left > state.scissorInFixedPoint.right || - bboxA.right - 1 < macroBoxLeft || - bboxA.right - 1 < state.scissorInFixedPoint.left || - bboxA.top > macroBoxBottom || - bboxA.top > state.scissorInFixedPoint.bottom || - bboxA.bottom - 1 < macroBoxTop || - bboxA.bottom - 1 < state.scissorInFixedPoint.top)) { + if (!(bboxA.xmin > macroBoxRight || + bboxA.xmin > scissorInFixedPoint.xmax || + bboxA.xmax - 1 < macroBoxLeft || + bboxA.xmax - 1 < scissorInFixedPoint.xmin || + bboxA.ymin > macroBoxBottom || + bboxA.ymin > scissorInFixedPoint.ymax || + bboxA.ymax - 1 < macroBoxTop || + bboxA.ymax - 1 < scissorInFixedPoint.ymin)) { // rasterize triangle - gRasterizerTable[rastState.scissorEnable][rastState.sampleCount](pDC, workerId, macroTile, (void*)&newWorkDesc); + pfnTriRast(pDC, workerId, macroTile, (void*)&newWorkDesc); } // triangle 1 @@ -1353,18 +1757,45 @@ vYai = fpToFixedPoint(vYa); calcBoundingBoxInt(vXai, vYai, bboxA); - if (!(bboxA.left > macroBoxRight || - bboxA.left > state.scissorInFixedPoint.right || - bboxA.right - 1 < macroBoxLeft || - bboxA.right - 1 < state.scissorInFixedPoint.left || - bboxA.top > macroBoxBottom || - bboxA.top > state.scissorInFixedPoint.bottom || - bboxA.bottom - 1 < macroBoxTop || - bboxA.bottom - 1 < state.scissorInFixedPoint.top)) { + if (!(bboxA.xmin > macroBoxRight || + bboxA.xmin > scissorInFixedPoint.xmax || + bboxA.xmax - 1 < macroBoxLeft || + bboxA.xmax - 1 < scissorInFixedPoint.xmin || + bboxA.ymin > macroBoxBottom || + bboxA.ymin > scissorInFixedPoint.ymax || + bboxA.ymax - 1 < macroBoxTop || + bboxA.ymax - 1 < scissorInFixedPoint.ymin)) { // rasterize triangle - gRasterizerTable[rastState.scissorEnable][rastState.sampleCount](pDC, workerId, macroTile, (void*)&newWorkDesc); + pfnTriRast(pDC, workerId, macroTile, (void*)&newWorkDesc); } - RDTSC_STOP(BERasterizeLine, 1, 0); + AR_END(BERasterizeLine, 1); } +struct RasterizerChooser +{ + typedef PFN_WORK_FUNC FuncType; + + template + static FuncType GetFunc() + { + return RasterizeTriangle>; + } +}; + +// Selector for correct templated RasterizeTriangle function +PFN_WORK_FUNC GetRasterizerFunc( + uint32_t numSamples, + bool IsConservative, + uint32_t InputCoverage, + uint32_t EdgeEnable, + bool RasterizeScissorEdges +) +{ + return TemplateArgUnroller::GetFunc( + IntArg{numSamples}, + IsConservative, + IntArg{InputCoverage}, + IntArg<0, VALID_TRI_EDGE_COUNT-1>{EdgeEnable}, + RasterizeScissorEdges); +} diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/rasterizer.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/rasterizer.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/rasterizer.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/rasterizer.h 2017-06-01 10:37:10.000000000 +0000 @@ -28,8 +28,110 @@ #pragma once #include "context.h" +#include +#include "conservativeRast.h" +#include "multisample.h" -extern PFN_WORK_FUNC gRasterizerTable[2][SWR_MULTISAMPLE_TYPE_MAX]; void RasterizeLine(DRAW_CONTEXT *pDC, uint32_t workerId, uint32_t macroTile, void *pData); void RasterizeSimplePoint(DRAW_CONTEXT *pDC, uint32_t workerId, uint32_t macroTile, void *pData); void RasterizeTriPoint(DRAW_CONTEXT *pDC, uint32_t workerId, uint32_t macroTile, void *pData); + +INLINE +__m128i fpToFixedPoint(const __m128 vIn) +{ + __m128 vFixed = _mm_mul_ps(vIn, _mm_set1_ps(FIXED_POINT_SCALE)); + return _mm_cvtps_epi32(vFixed); +} + +// Selector for correct templated RasterizeTriangle function +PFN_WORK_FUNC GetRasterizerFunc( + uint32_t numSamples, + bool IsConservative, + uint32_t InputCoverage, + uint32_t EdgeEnable, + bool RasterizeScissorEdges); + +enum ValidTriEdges +{ + NO_VALID_EDGES = 0, + E0_E1_VALID = 0x3, + E0_E2_VALID = 0x5, + E1_E2_VALID = 0x6, + ALL_EDGES_VALID = 0x7, + VALID_TRI_EDGE_COUNT, +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief ValidTriEdges convenience typedefs used for templated function +/// specialization supported Fixed Point precisions +typedef std::integral_constant AllEdgesValidT; +typedef std::integral_constant E0E1ValidT; +typedef std::integral_constant E0E2ValidT; +typedef std::integral_constant E1E2ValidT; +typedef std::integral_constant NoEdgesValidT; + +////////////////////////////////////////////////////////////////////////// +/// @struct RasterScissorEdgesT +/// @brief Primary RasterScissorEdgesT templated struct that holds compile +/// time information about the number of edges needed to be rasterized, +/// If either the scissor rect or conservative rast is enabled, +/// the scissor test is enabled and the rasterizer will test +/// 3 triangle edges + 4 scissor edges for coverage. +/// @tparam RasterScissorEdgesT: number of multisamples +/// @tparam ConservativeT: is this a conservative rasterization +/// @tparam EdgeMaskT: Which edges are valid(not degenerate) +template +struct RasterEdgeTraits +{ + typedef std::true_type RasterizeScissorEdgesT; + typedef std::integral_constant NumEdgesT; + typedef std::integral_constant ValidEdgeMaskT; +}; + +////////////////////////////////////////////////////////////////////////// +/// @brief specialization of RasterEdgeTraits. If neither scissor rect +/// nor conservative rast is enabled, only test 3 triangle edges +/// for coverage +template +struct RasterEdgeTraits +{ + typedef std::false_type RasterizeScissorEdgesT; + typedef std::integral_constant NumEdgesT; + // no need for degenerate edge masking in non-conservative case; rasterize all triangle edges + typedef std::integral_constant ValidEdgeMaskT; +}; + +////////////////////////////////////////////////////////////////////////// +/// @struct RasterizerTraits +/// @brief templated struct that holds compile time information used +/// during rasterization. Inherits EdgeTraits and ConservativeRastBETraits. +/// @tparam NumSamplesT: number of multisamples +/// @tparam ConservativeT: is this a conservative rasterization +/// @tparam InputCoverageT: what type of input coverage is the PS expecting? +/// (only used with conservative rasterization) +/// @tparam RasterScissorEdgesT: do we need to rasterize with a scissor? +template +struct RasterizerTraits final : public ConservativeRastBETraits, + public RasterEdgeTraits> +{ + typedef MultisampleTraits(NumSamplesT::value)> MT; + + /// Fixed point precision the rasterizer is using + typedef FixedPointTraits PrecisionT; + /// Fixed point precision of the edge tests used during rasterization + typedef FixedPointTraits EdgePrecisionT; + + // If conservative rast is enabled, only need a single sample coverage test, with the result copied to all samples + typedef std::integral_constant NumRasterSamplesT; + + static_assert(EdgePrecisionT::BitsT::value >= ConservativeRastBETraits::ConservativePrecisionT::BitsT::value, + "Rasterizer edge fixed point precision < required conservative rast precision"); + + /// constants used to offset between different types of raster tiles + static const int colorRasterTileStep{(KNOB_TILE_X_DIM * KNOB_TILE_Y_DIM * (FormatTraits::bpp / 8)) * MT::numSamples}; + static const int depthRasterTileStep{(KNOB_TILE_X_DIM * KNOB_TILE_Y_DIM * (FormatTraits::bpp / 8)) * MT::numSamples}; + static const int stencilRasterTileStep{(KNOB_TILE_X_DIM * KNOB_TILE_Y_DIM * (FormatTraits::bpp / 8)) * MT::numSamples}; + static const int colorRasterTileRowStep{(KNOB_MACROTILE_X_DIM / KNOB_TILE_X_DIM) * colorRasterTileStep}; + static const int depthRasterTileRowStep{(KNOB_MACROTILE_X_DIM / KNOB_TILE_X_DIM)* depthRasterTileStep}; + static const int stencilRasterTileRowStep{(KNOB_MACROTILE_X_DIM / KNOB_TILE_X_DIM) * stencilRasterTileStep}; +}; diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/rdtsc_core.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/rdtsc_core.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/rdtsc_core.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/rdtsc_core.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -85,7 +85,6 @@ { "BEOutputMerger", "", false, 0xffffffff }, { "BEStoreTiles", "", true, 0xff00cccc }, { "BEEndTile", "", false, 0xffffffff }, - { "WorkerWaitForThreadEvent", "", false, 0xffffffff }, }; /// @todo bucketmanager and mapping should probably be a part of the SWR context diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/rdtsc_core.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/rdtsc_core.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/rdtsc_core.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/rdtsc_core.h 2017-06-01 10:37:10.000000000 +0000 @@ -90,7 +90,6 @@ BEOutputMerger, BEStoreTiles, BEEndTile, - WorkerWaitForThreadEvent, NumBuckets }; @@ -169,12 +168,12 @@ { gCurrentFrame++; - if (gCurrentFrame == KNOB_BUCKETS_START_FRAME) + if (gCurrentFrame == KNOB_BUCKETS_START_FRAME && KNOB_BUCKETS_START_FRAME < KNOB_BUCKETS_END_FRAME) { gBucketMgr.StartCapture(); } - if (gCurrentFrame == KNOB_BUCKETS_END_FRAME) + if (gCurrentFrame == KNOB_BUCKETS_END_FRAME && KNOB_BUCKETS_START_FRAME < KNOB_BUCKETS_END_FRAME) { gBucketMgr.StopCapture(); gBucketMgr.PrintReport("rdtsc.txt"); diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/ringbuffer.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/ringbuffer.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/ringbuffer.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/ringbuffer.h 2017-06-01 10:37:10.000000000 +0000 @@ -46,6 +46,7 @@ void Init(uint32_t numEntries) { SWR_ASSERT(numEntries > 0); + SWR_ASSERT(((1ULL << 32) % numEntries) == 0, "%d is not evenly divisible into 2 ^ 32. Wrap errors will occur!", numEntries); mNumEntries = numEntries; mpRingBuffer = (T*)AlignedMalloc(sizeof(T)*numEntries, 64); SWR_ASSERT(mpRingBuffer != nullptr); @@ -67,6 +68,8 @@ INLINE void Enqueue() { mRingHead++; // There's only one producer. + // Assert to find wrap-around cases, NEVER ENABLE DURING CHECKIN!! + // SWR_REL_ASSERT(mRingHead); } INLINE void Dequeue() @@ -81,22 +84,19 @@ INLINE bool IsFull() { - ///@note We don't handle wrap case due to using 64-bit indices. - /// It would take 11 million years to wrap at 50,000 DCs per sec. - /// If we used 32-bit indices then its about 23 hours to wrap. - uint64_t numEnqueued = GetHead() - GetTail(); + uint32_t numEnqueued = GetHead() - GetTail(); SWR_ASSERT(numEnqueued <= mNumEntries); return (numEnqueued == mNumEntries); } - INLINE uint64_t GetTail() volatile { return mRingTail; } - INLINE uint64_t GetHead() volatile { return mRingHead; } + INLINE uint32_t GetTail() volatile { return mRingTail; } + INLINE uint32_t GetHead() volatile { return mRingHead; } protected: T* mpRingBuffer; uint32_t mNumEntries; - OSALIGNLINE(volatile uint64_t) mRingHead; // Consumer Counter - OSALIGNLINE(volatile uint64_t) mRingTail; // Producer Counter + OSALIGNLINE(volatile uint32_t) mRingHead; // Consumer Counter + OSALIGNLINE(volatile uint32_t) mRingTail; // Producer Counter }; diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/state.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/state.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/state.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/state.h 2017-06-01 10:37:10.000000000 +0000 @@ -30,18 +30,6 @@ #include "common/formats.h" #include "common/simdintrin.h" -// clear flags -#define SWR_CLEAR_NONE 0 -#define SWR_CLEAR_COLOR (1 << 0) -#define SWR_CLEAR_DEPTH (1 << 1) -#define SWR_CLEAR_STENCIL (1 << 2) - -enum DRIVER_TYPE -{ - DX, - GL -}; - ////////////////////////////////////////////////////////////////////////// /// PRIMITIVE_TOPOLOGY. ////////////////////////////////////////////////////////////////////////// @@ -197,6 +185,7 @@ #define VERTEX_CLIPCULL_DIST_LO_SLOT 35 // VS writes lower 4 clip/cull dist #define VERTEX_CLIPCULL_DIST_HI_SLOT 36 // VS writes upper 4 clip/cull dist #define VERTEX_POINT_SIZE_SLOT 37 // VS writes point size here +#define VERTEX_VIEWPORT_ARRAY_INDEX_SLOT 38 // SoAoSoA struct simdvertex { @@ -339,6 +328,8 @@ uint32_t primID; // IN: primitive ID uint32_t sampleIndex; // IN: sampleIndex + uint32_t rasterizerSampleCount; // IN: sample count used by the rasterizer + }; ////////////////////////////////////////////////////////////////////////// @@ -477,6 +468,21 @@ LOGICOP_SET, }; +////////////////////////////////////////////////////////////////////////// +/// SWR_AUX_MODE +/// @brief Specifies how the auxiliary buffer is used by the driver. +////////////////////////////////////////////////////////////////////////// +enum SWR_AUX_MODE +{ + AUX_MODE_NONE, + AUX_MODE_COLOR, + AUX_MODE_UAV, + AUX_MODE_DEPTH, +}; + +////////////////////////////////////////////////////////////////////////// +/// SWR_SURFACE_STATE +////////////////////////////////////////////////////////////////////////// struct SWR_SURFACE_STATE { uint8_t *pBaseAddress; @@ -503,6 +509,7 @@ uint32_t lodOffsets[2][15]; // lod offsets for sampled surfaces uint8_t *pAuxBaseAddress; // Used for compression, append/consume counter, etc. + SWR_AUX_MODE auxMode; // @llvm_enum bool bInterleavedSamples; // are MSAA samples stored interleaved or planar }; @@ -555,26 +562,35 @@ /// @brief All statistics generated by SWR go here. These are public /// to driver. ///////////////////////////////////////////////////////////////////////// -struct SWR_STATS +OSALIGNLINE(struct) SWR_STATS { // Occlusion Query uint64_t DepthPassCount; // Number of passing depth tests. Not exact. // Pipeline Stats + uint64_t PsInvocations; // Number of Pixel Shader invocations + uint64_t CsInvocations; // Number of Compute Shader invocations + +}; + +////////////////////////////////////////////////////////////////////////// +/// SWR_STATS +/// +/// @brief All statistics generated by FE. +///////////////////////////////////////////////////////////////////////// +OSALIGNLINE(struct) SWR_STATS_FE +{ uint64_t IaVertices; // Number of Fetch Shader vertices uint64_t IaPrimitives; // Number of PA primitives. uint64_t VsInvocations; // Number of Vertex Shader invocations uint64_t HsInvocations; // Number of Hull Shader invocations uint64_t DsInvocations; // Number of Domain Shader invocations uint64_t GsInvocations; // Number of Geometry Shader invocations - uint64_t PsInvocations; // Number of Pixel Shader invocations - uint64_t CsInvocations; // Number of Compute Shader invocations + uint64_t GsPrimitives; // Number of prims GS outputs. uint64_t CInvocations; // Number of clipper invocations uint64_t CPrimitives; // Number of clipper primitives. - uint64_t GsPrimitives; // Number of prims GS outputs. // Streamout Stats - uint32_t SoWriteOffset[4]; uint64_t SoPrimStorageNeeded[4]; uint64_t SoNumPrimsWritten[4]; }; @@ -584,11 +600,13 @@ ///////////////////////////////////////////////////////////////////////// #define MAX_SO_STREAMS 4 +#define MAX_SO_BUFFERS 4 #define MAX_ATTRIBUTES 32 struct SWR_STREAMOUT_BUFFER { bool enable; + bool soWriteEnable; // Pointers to streamout buffers. uint32_t* pBuffer; @@ -626,7 +644,7 @@ // The stream masks specify which attributes are sent to which streams. // These masks help the FE to setup the pPrimData buffer that is passed - // the the Stream Output Shader (SOS) function. + // the Stream Output Shader (SOS) function. uint32_t streamMasks[MAX_SO_STREAMS]; // Number of attributes, including position, per vertex that are streamed out. @@ -675,6 +693,9 @@ // geometry shader emits PrimitiveID bool emitsPrimitiveID; + // geometry shader emits ViewportArrayIndex + bool emitsViewportArrayIndex; + // if true, geometry shader emits a single stream, with separate cut buffer. // if false, geometry shader emits vertices for multiple streams to the stream buffer, with a separate StreamID buffer // to map vertices to streams @@ -757,7 +778,7 @@ SWR_MULTISAMPLE_4X, SWR_MULTISAMPLE_8X, SWR_MULTISAMPLE_16X, - SWR_MULTISAMPLE_TYPE_MAX + SWR_MULTISAMPLE_TYPE_COUNT }; struct SWR_BLEND_STATE @@ -788,9 +809,13 @@ typedef void(__cdecl *PFN_SO_FUNC)(SWR_STREAMOUT_CONTEXT& soContext); typedef void(__cdecl *PFN_PIXEL_KERNEL)(HANDLE hPrivateData, SWR_PS_CONTEXT *pContext); typedef void(__cdecl *PFN_CPIXEL_KERNEL)(HANDLE hPrivateData, SWR_PS_CONTEXT *pContext); -typedef void(__cdecl *PFN_BLEND_JIT_FUNC)(const SWR_BLEND_STATE*, simdvector&, simdvector&, uint32_t, uint8_t*, simdvector&, simdscalari*, simdscalari*); +typedef void(__cdecl *PFN_BLEND_JIT_FUNC)(const SWR_BLEND_STATE*, + simdvector& vSrc, simdvector& vSrc1, simdscalar& vSrc0Alpha, uint32_t sample, + uint8_t* pDst, simdvector& vResult, simdscalari* vOMask, simdscalari* vCoverageMask); typedef simdscalar(*PFN_QUANTIZE_DEPTH)(simdscalar); + + ////////////////////////////////////////////////////////////////////////// /// FRONTEND_STATE ///////////////////////////////////////////////////////////////////////// @@ -827,6 +852,19 @@ }; ////////////////////////////////////////////////////////////////////////// +/// VIEWPORT_MATRIXES +///////////////////////////////////////////////////////////////////////// +struct SWR_VIEWPORT_MATRICES +{ + float m00[KNOB_NUM_VIEWPORTS_SCISSORS]; + float m11[KNOB_NUM_VIEWPORTS_SCISSORS]; + float m22[KNOB_NUM_VIEWPORTS_SCISSORS]; + float m30[KNOB_NUM_VIEWPORTS_SCISSORS]; + float m31[KNOB_NUM_VIEWPORTS_SCISSORS]; + float m32[KNOB_NUM_VIEWPORTS_SCISSORS]; +}; + +////////////////////////////////////////////////////////////////////////// /// SWR_VIEWPORT ///////////////////////////////////////////////////////////////////////// struct SWR_VIEWPORT @@ -868,7 +906,7 @@ { SWR_MSAA_CENTER_PATTERN, SWR_MSAA_STANDARD_PATTERN, - SWR_MSAA_SAMPLE_PATTERN_MAX + SWR_MSAA_SAMPLE_PATTERN_COUNT }; enum SWR_PIXEL_LOCATION @@ -902,6 +940,7 @@ uint32_t frontWinding : 1; uint32_t scissorEnable : 1; uint32_t depthClipEnable : 1; + uint32_t clipHalfZ : 1; uint32_t pointParam : 1; uint32_t pointSpriteEnable : 1; uint32_t pointSpriteTopOrigin : 1; @@ -909,6 +948,7 @@ uint32_t forcedSampleCount : 1; uint32_t pixelOffset : 1; uint32_t depthBiasPreAdjusted : 1; ///< depth bias constant is in float units, not per-format Z units + uint32_t conservativeRast : 1; float pointSize; float lineWidth; @@ -933,13 +973,34 @@ uint8_t clipDistanceMask; }; +enum SWR_CONSTANT_SOURCE +{ + SWR_CONSTANT_SOURCE_CONST_0000, + SWR_CONSTANT_SOURCE_CONST_0001_FLOAT, + SWR_CONSTANT_SOURCE_CONST_1111_FLOAT, + SWR_CONSTANT_SOURCE_PRIM_ID +}; + +struct SWR_ATTRIB_SWIZZLE +{ + uint16_t sourceAttrib : 5; // source attribute + uint16_t constantSource : 2; // constant source to apply + uint16_t componentOverrideMask : 4; // override component with constant source +}; + // backend state struct SWR_BACKEND_STATE { - uint32_t constantInterpolationMask; - uint32_t pointSpriteTexCoordMask; - uint8_t numAttributes; - uint8_t numComponents[KNOB_NUM_ATTRIBUTES]; + uint32_t constantInterpolationMask; // bitmask indicating which attributes have constant interpolation + uint32_t pointSpriteTexCoordMask; // bitmask indicating the attribute(s) which should be interpreted as tex coordinates + + uint8_t numAttributes; // total number of attributes to send to backend (up to 32) + uint8_t numComponents[32]; // number of components to setup per attribute, this reduces some calculations for unneeded components + + bool swizzleEnable; // when enabled, core will parse the swizzle map when + // setting up attributes for the backend, otherwise + // all attributes up to numAttributes will be sent + SWR_ATTRIB_SWIZZLE swizzleMap[32]; }; @@ -982,14 +1043,15 @@ { SWR_SHADING_RATE_PIXEL, SWR_SHADING_RATE_SAMPLE, - SWR_SHADING_RATE_MAX, + SWR_SHADING_RATE_COUNT, }; enum SWR_INPUT_COVERAGE { SWR_INPUT_COVERAGE_NONE, SWR_INPUT_COVERAGE_NORMAL, - SWR_INPUT_COVERAGE_MAX, + SWR_INPUT_COVERAGE_INNER_CONSERVATIVE, + SWR_INPUT_COVERAGE_COUNT, }; enum SWR_PS_POSITION_OFFSET @@ -997,7 +1059,7 @@ SWR_PS_POSITION_SAMPLE_NONE, SWR_PS_POSITION_SAMPLE_OFFSET, SWR_PS_POSITION_CENTROID_OFFSET, - SWR_PS_POSITION_OFFSET_MAX, + SWR_PS_POSITION_OFFSET_COUNT, }; enum SWR_BARYCENTRICS_MASK @@ -1005,7 +1067,6 @@ SWR_BARYCENTRIC_PER_PIXEL_MASK = 0x1, SWR_BARYCENTRIC_CENTROID_MASK = 0x2, SWR_BARYCENTRIC_PER_SAMPLE_MASK = 0x4, - SWR_BARYCENTRICS_MASK_MAX = 0x8 }; // pixel shader state @@ -1016,7 +1077,7 @@ // dword 2 uint32_t killsPixel : 1; // pixel shader can kill pixels - uint32_t inputCoverage : 1; // type of input coverage PS uses + uint32_t inputCoverage : 2; // ps uses input coverage uint32_t writesODepth : 1; // pixel shader writes to depth uint32_t usesSourceDepth : 1; // pixel shader reads depth uint32_t shadingRate : 2; // shading per pixel / sample / coarse pixel @@ -1027,3 +1088,12 @@ uint32_t forceEarlyZ : 1; // force execution of early depth/stencil test }; + +// depth bounds state +struct SWR_DEPTH_BOUNDS_STATE +{ + bool depthBoundsTestEnable; + float depthBoundsTestMinValue; + float depthBoundsTestMaxValue; +}; + diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/threads.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/threads.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/threads.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/threads.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -1,5 +1,5 @@ /**************************************************************************** -* Copyright (C) 2014-2015 Intel Corporation. All Rights Reserved. +* Copyright (C) 2014-2016 Intel Corporation. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -73,14 +73,19 @@ static std::mutex m; std::lock_guard l(m); - static SYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX buffer[KNOB_MAX_NUM_THREADS]; - DWORD bufSize = sizeof(buffer); + DWORD bufSize = 0; - BOOL ret = GetLogicalProcessorInformationEx(RelationProcessorCore, buffer, &bufSize); + BOOL ret = GetLogicalProcessorInformationEx(RelationProcessorCore, nullptr, &bufSize); + SWR_ASSERT(ret == FALSE && GetLastError() == ERROR_INSUFFICIENT_BUFFER); + + PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX pBufferMem = (PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX)malloc(bufSize); + SWR_ASSERT(pBufferMem); + + ret = GetLogicalProcessorInformationEx(RelationProcessorCore, pBufferMem, &bufSize); SWR_ASSERT(ret != FALSE, "Failed to get Processor Topology Information"); - uint32_t count = bufSize / buffer->Size; - PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX pBuffer = buffer; + uint32_t count = bufSize / pBufferMem->Size; + PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX pBuffer = pBufferMem; for (uint32_t i = 0; i < count; ++i) { @@ -150,6 +155,8 @@ pBuffer = PtrAdd(pBuffer, pBuffer->Size); } + free(pBufferMem); + #elif defined(__linux__) || defined (__gnu_linux__) @@ -210,6 +217,15 @@ out_numThreadsPerProcGroup++; } + /* Prune empty numa nodes */ + for (auto it = out_nodes.begin(); it != out_nodes.end(); ) { + if ((*it).cores.size() == 0) + it = out_nodes.erase(it); + else + ++it; + } + + /* Prune empty core nodes */ for (uint32_t node = 0; node < out_nodes.size(); node++) { auto& numaNode = out_nodes[node]; auto it = numaNode.cores.begin(); @@ -221,16 +237,6 @@ } } -#elif defined(__CYGWIN__) - - // Dummy data just to compile - NumaNode node; - Core core; - core.threadIds.push_back(0); - node.cores.push_back(core); - out_nodes.push_back(node); - out_numThreadsPerProcGroup = 1; - #else #error Unsupported platform @@ -239,10 +245,10 @@ } -void bindThread(uint32_t threadId, uint32_t procGroupId = 0, bool bindProcGroup=false) +void bindThread(SWR_CONTEXT* pContext, uint32_t threadId, uint32_t procGroupId = 0, bool bindProcGroup=false) { // Only bind threads when MAX_WORKER_THREADS isn't set. - if (KNOB_MAX_WORKER_THREADS && bindProcGroup == false) + if (pContext->threadInfo.MAX_WORKER_THREADS && bindProcGroup == false) { return; } @@ -267,9 +273,9 @@ else #endif { - // If KNOB_MAX_WORKER_THREADS is set, only bind to the proc group, + // If MAX_WORKER_THREADS is set, only bind to the proc group, // Not the individual HW thread. - if (!KNOB_MAX_WORKER_THREADS) + if (!pContext->threadInfo.MAX_WORKER_THREADS) { affinity.Mask = KAFFINITY(1) << threadId; } @@ -277,10 +283,6 @@ SetThreadGroupAffinity(GetCurrentThread(), &affinity, nullptr); -#elif defined(__CYGWIN__) - - // do nothing - #else cpu_set_t cpuset; @@ -294,32 +296,84 @@ } INLINE -uint64_t GetEnqueuedDraw(SWR_CONTEXT *pContext) +uint32_t GetEnqueuedDraw(SWR_CONTEXT *pContext) { return pContext->dcRing.GetHead(); } INLINE -DRAW_CONTEXT *GetDC(SWR_CONTEXT *pContext, uint64_t drawId) +DRAW_CONTEXT *GetDC(SWR_CONTEXT *pContext, uint32_t drawId) { return &pContext->dcRing[(drawId-1) % KNOB_MAX_DRAWS_IN_FLIGHT]; } +INLINE +bool IDComparesLess(uint32_t a, uint32_t b) +{ + // Use signed delta to ensure that wrap-around to 0 is correctly handled. + int32_t delta = int32_t(a - b); + return (delta < 0); +} + // returns true if dependency not met INLINE -bool CheckDependency(SWR_CONTEXT *pContext, DRAW_CONTEXT *pDC, uint64_t lastRetiredDraw) +bool CheckDependency(SWR_CONTEXT *pContext, DRAW_CONTEXT *pDC, uint32_t lastRetiredDraw) +{ + return pDC->dependent && IDComparesLess(lastRetiredDraw, pDC->drawId - 1); +} + +bool CheckDependencyFE(SWR_CONTEXT *pContext, DRAW_CONTEXT *pDC, uint32_t lastRetiredDraw) +{ + return pDC->dependentFE && IDComparesLess(lastRetiredDraw, pDC->drawId - 1); +} + +////////////////////////////////////////////////////////////////////////// +/// @brief Update client stats. +INLINE void UpdateClientStats(SWR_CONTEXT* pContext, uint32_t workerId, DRAW_CONTEXT* pDC) +{ + if ((pContext->pfnUpdateStats == nullptr) || (GetApiState(pDC).enableStatsBE == false)) + { + return; + } + + DRAW_DYNAMIC_STATE& dynState = pDC->dynState; + SWR_STATS stats{ 0 }; + + // Sum up stats across all workers before sending to client. + for (uint32_t i = 0; i < pContext->NumWorkerThreads; ++i) + { + stats.DepthPassCount += dynState.pStats[i].DepthPassCount; + + stats.PsInvocations += dynState.pStats[i].PsInvocations; + stats.CsInvocations += dynState.pStats[i].CsInvocations; + } + + + pContext->pfnUpdateStats(GetPrivateState(pDC), &stats); +} + +INLINE void ExecuteCallbacks(SWR_CONTEXT* pContext, uint32_t workerId, DRAW_CONTEXT* pDC) { - return (pDC->dependency > lastRetiredDraw); + UpdateClientStats(pContext, workerId, pDC); + + if (pDC->retireCallback.pfnCallbackFunc) + { + pDC->retireCallback.pfnCallbackFunc(pDC->retireCallback.userData, + pDC->retireCallback.userData2, + pDC->retireCallback.userData3); + } } // inlined-only version -INLINE int64_t CompleteDrawContextInl(SWR_CONTEXT* pContext, DRAW_CONTEXT* pDC) +INLINE int32_t CompleteDrawContextInl(SWR_CONTEXT* pContext, uint32_t workerId, DRAW_CONTEXT* pDC) { - int64_t result = InterlockedDecrement64(&pDC->threadsDone); + int32_t result = InterlockedDecrement((volatile LONG*)&pDC->threadsDone); SWR_ASSERT(result >= 0); if (result == 0) { + ExecuteCallbacks(pContext, workerId, pDC); + // Cleanup memory allocations pDC->pArena->Reset(true); if (!pDC->isCompute) @@ -340,16 +394,16 @@ } // available to other translation modules -int64_t CompleteDrawContext(SWR_CONTEXT* pContext, DRAW_CONTEXT* pDC) +int32_t CompleteDrawContext(SWR_CONTEXT* pContext, DRAW_CONTEXT* pDC) { - return CompleteDrawContextInl(pContext, pDC); + return CompleteDrawContextInl(pContext, 0, pDC); } -INLINE bool FindFirstIncompleteDraw(SWR_CONTEXT* pContext, uint64_t& curDrawBE, uint64_t& drawEnqueued) +INLINE bool FindFirstIncompleteDraw(SWR_CONTEXT* pContext, uint32_t workerId, uint32_t& curDrawBE, uint32_t& drawEnqueued) { // increment our current draw id to the first incomplete draw drawEnqueued = GetEnqueuedDraw(pContext); - while (curDrawBE < drawEnqueued) + while (IDComparesLess(curDrawBE, drawEnqueued)) { DRAW_CONTEXT *pDC = &pContext->dcRing[curDrawBE % KNOB_MAX_DRAWS_IN_FLIGHT]; @@ -363,7 +417,7 @@ if (isWorkComplete) { curDrawBE++; - CompleteDrawContextInl(pContext, pDC); + CompleteDrawContextInl(pContext, workerId, pDC); } else { @@ -372,7 +426,7 @@ } // If there are no more incomplete draws then return false. - return (curDrawBE >= drawEnqueued) ? false : true; + return IDComparesLess(curDrawBE, drawEnqueued); } ////////////////////////////////////////////////////////////////////////// @@ -389,23 +443,26 @@ /// still have work pending in a previous draw. Additionally, the lockedTiles is /// hueristic that can steer a worker back to the same macrotile that it had been /// working on in a previous draw. -void WorkOnFifoBE( +/// @returns true if worker thread should shutdown +bool WorkOnFifoBE( SWR_CONTEXT *pContext, uint32_t workerId, - uint64_t &curDrawBE, + uint32_t &curDrawBE, TileSet& lockedTiles, uint32_t numaNode, uint32_t numaMask) { + bool bShutdown = false; + // Find the first incomplete draw that has pending work. If no such draw is found then // return. FindFirstIncompleteDraw is responsible for incrementing the curDrawBE. - uint64_t drawEnqueued = 0; - if (FindFirstIncompleteDraw(pContext, curDrawBE, drawEnqueued) == false) + uint32_t drawEnqueued = 0; + if (FindFirstIncompleteDraw(pContext, workerId, curDrawBE, drawEnqueued) == false) { - return; + return false; } - uint64_t lastRetiredDraw = pContext->dcRing[curDrawBE % KNOB_MAX_DRAWS_IN_FLIGHT].drawId - 1; + uint32_t lastRetiredDraw = pContext->dcRing[curDrawBE % KNOB_MAX_DRAWS_IN_FLIGHT].drawId - 1; // Reset our history for locked tiles. We'll have to re-learn which tiles are locked. lockedTiles.clear(); @@ -415,29 +472,31 @@ // 2. If we're trying to work on draws after curDrawBE, we are restricted to // working on those macrotiles that are known to be complete in the prior draw to // maintain order. The locked tiles provides the history to ensures this. - for (uint64_t i = curDrawBE; i < drawEnqueued; ++i) + for (uint32_t i = curDrawBE; IDComparesLess(i, drawEnqueued); ++i) { DRAW_CONTEXT *pDC = &pContext->dcRing[i % KNOB_MAX_DRAWS_IN_FLIGHT]; - if (pDC->isCompute) return; // We don't look at compute work. + if (pDC->isCompute) return false; // We don't look at compute work. // First wait for FE to be finished with this draw. This keeps threading model simple // but if there are lots of bubbles between draws then serializing FE and BE may // need to be revisited. - if (!pDC->doneFE) return; + if (!pDC->doneFE) return false; // If this draw is dependent on a previous draw then we need to bail. if (CheckDependency(pContext, pDC, lastRetiredDraw)) { - return; + return false; } // Grab the list of all dirty macrotiles. A tile is dirty if it has work queued to it. - std::vector ¯oTiles = pDC->pTileMgr->getDirtyTiles(); + auto ¯oTiles = pDC->pTileMgr->getDirtyTiles(); - for (uint32_t tileID : macroTiles) + for (auto tile : macroTiles) { - // Only work on tiles for for this numa node + uint32_t tileID = tile->mId; + + // Only work on tiles for this numa node uint32_t x, y; pDC->pTileMgr->getTileIndices(tileID, x, y); if (((x ^ y) & numaMask) != numaNode) @@ -445,9 +504,7 @@ continue; } - MacroTileQueue &tile = pDC->pTileMgr->getMacroTileQueue(tileID); - - if (!tile.getNumQueued()) + if (!tile->getNumQueued()) { continue; } @@ -458,28 +515,32 @@ continue; } - if (tile.tryLock()) + if (tile->tryLock()) { BE_WORK *pWork; - RDTSC_START(WorkerFoundWork); + AR_BEGIN(WorkerFoundWork, pDC->drawId); - uint32_t numWorkItems = tile.getNumQueued(); + uint32_t numWorkItems = tile->getNumQueued(); SWR_ASSERT(numWorkItems); - pWork = tile.peek(); + pWork = tile->peek(); SWR_ASSERT(pWork); if (pWork->type == DRAW) { - pContext->pHotTileMgr->InitializeHotTiles(pContext, pDC, tileID); + pContext->pHotTileMgr->InitializeHotTiles(pContext, pDC, workerId, tileID); + } + else if (pWork->type == SHUTDOWN) + { + bShutdown = true; } - while ((pWork = tile.peek()) != nullptr) + while ((pWork = tile->peek()) != nullptr) { pWork->pfnWork(pDC, workerId, tileID, &pWork->desc); - tile.dequeue(); + tile->dequeue(); } - RDTSC_STOP(WorkerFoundWork, numWorkItems, pDC->drawId); + AR_END(WorkerFoundWork, numWorkItems); _ReadWriteBarrier(); @@ -487,17 +548,22 @@ // Optimization: If the draw is complete and we're the last one to have worked on it then // we can reset the locked list as we know that all previous draws before the next are guaranteed to be complete. - if ((curDrawBE == i) && pDC->pTileMgr->isWorkComplete()) + if ((curDrawBE == i) && (bShutdown || pDC->pTileMgr->isWorkComplete())) { // We can increment the current BE and safely move to next draw since we know this draw is complete. curDrawBE++; - CompleteDrawContextInl(pContext, pDC); + CompleteDrawContextInl(pContext, workerId, pDC); lastRetiredDraw++; lockedTiles.clear(); break; } + + if (bShutdown) + { + break; + } } else { @@ -506,19 +572,59 @@ } } } + + return bShutdown; } -void WorkOnFifoFE(SWR_CONTEXT *pContext, uint32_t workerId, uint64_t &curDrawFE) +////////////////////////////////////////////////////////////////////////// +/// @brief Called when FE work is complete for this DC. +INLINE void CompleteDrawFE(SWR_CONTEXT* pContext, uint32_t workerId, DRAW_CONTEXT* pDC) +{ + if (pContext->pfnUpdateStatsFE && GetApiState(pDC).enableStatsFE) + { + SWR_STATS_FE& stats = pDC->dynState.statsFE; + + AR_EVENT(FrontendStatsEvent(pDC->drawId, + stats.IaVertices, stats.IaPrimitives, stats.VsInvocations, stats.HsInvocations, + stats.DsInvocations, stats.GsInvocations, stats.GsPrimitives, stats.CInvocations, stats.CPrimitives, + stats.SoPrimStorageNeeded[0], stats.SoPrimStorageNeeded[1], stats.SoPrimStorageNeeded[2], stats.SoPrimStorageNeeded[3], + stats.SoNumPrimsWritten[0], stats.SoNumPrimsWritten[1], stats.SoNumPrimsWritten[2], stats.SoNumPrimsWritten[3] + )); + AR_EVENT(FrontendDrawEndEvent(pDC->drawId)); + + pContext->pfnUpdateStatsFE(GetPrivateState(pDC), &stats); + } + + if (pContext->pfnUpdateSoWriteOffset) + { + for (uint32_t i = 0; i < MAX_SO_BUFFERS; ++i) + { + if ((pDC->dynState.SoWriteOffsetDirty[i]) && + (pDC->pState->state.soBuffer[i].soWriteEnable)) + { + pContext->pfnUpdateSoWriteOffset(GetPrivateState(pDC), i, pDC->dynState.SoWriteOffset[i]); + } + } + } + + // Ensure all streaming writes are globally visible before marking this FE done + _mm_mfence(); + pDC->doneFE = true; + + InterlockedDecrement((volatile LONG*)&pContext->drawsOutstandingFE); +} + +void WorkOnFifoFE(SWR_CONTEXT *pContext, uint32_t workerId, uint32_t &curDrawFE) { // Try to grab the next DC from the ring - uint64_t drawEnqueued = GetEnqueuedDraw(pContext); - while (curDrawFE < drawEnqueued) + uint32_t drawEnqueued = GetEnqueuedDraw(pContext); + while (IDComparesLess(curDrawFE, drawEnqueued)) { uint32_t dcSlot = curDrawFE % KNOB_MAX_DRAWS_IN_FLIGHT; DRAW_CONTEXT *pDC = &pContext->dcRing[dcSlot]; - if (pDC->isCompute || pDC->doneFE || pDC->FeLock) + if (pDC->isCompute || pDC->doneFE) { - CompleteDrawContextInl(pContext, pDC); + CompleteDrawContextInl(pContext, workerId, pDC); curDrawFE++; } else @@ -527,22 +633,27 @@ } } - uint64_t curDraw = curDrawFE; - while (curDraw < drawEnqueued) + uint32_t lastRetiredFE = curDrawFE - 1; + uint32_t curDraw = curDrawFE; + while (IDComparesLess(curDraw, drawEnqueued)) { uint32_t dcSlot = curDraw % KNOB_MAX_DRAWS_IN_FLIGHT; DRAW_CONTEXT *pDC = &pContext->dcRing[dcSlot]; if (!pDC->isCompute && !pDC->FeLock) { + if (CheckDependencyFE(pContext, pDC, lastRetiredFE)) + { + return; + } + uint32_t initial = InterlockedCompareExchange((volatile uint32_t*)&pDC->FeLock, 1, 0); if (initial == 0) { // successfully grabbed the DC, now run the FE pDC->FeWork.pfnWork(pContext, pDC, workerId, &pDC->FeWork.desc); - _ReadWriteBarrier(); - pDC->doneFE = true; + CompleteDrawFE(pContext, workerId, pDC); } } curDraw++; @@ -559,17 +670,17 @@ void WorkOnCompute( SWR_CONTEXT *pContext, uint32_t workerId, - uint64_t& curDrawBE) + uint32_t& curDrawBE) { - uint64_t drawEnqueued = 0; - if (FindFirstIncompleteDraw(pContext, curDrawBE, drawEnqueued) == false) + uint32_t drawEnqueued = 0; + if (FindFirstIncompleteDraw(pContext, workerId, curDrawBE, drawEnqueued) == false) { return; } - uint64_t lastRetiredDraw = pContext->dcRing[curDrawBE % KNOB_MAX_DRAWS_IN_FLIGHT].drawId - 1; + uint32_t lastRetiredDraw = pContext->dcRing[curDrawBE % KNOB_MAX_DRAWS_IN_FLIGHT].drawId - 1; - for (uint64_t i = curDrawBE; curDrawBE < drawEnqueued; ++i) + for (uint64_t i = curDrawBE; IDComparesLess(i, drawEnqueued); ++i) { DRAW_CONTEXT *pDC = &pContext->dcRing[i % KNOB_MAX_DRAWS_IN_FLIGHT]; if (pDC->isCompute == false) return; @@ -590,10 +701,12 @@ uint32_t threadGroupId = 0; while (queue.getWork(threadGroupId)) { - ProcessComputeBE(pDC, workerId, threadGroupId, pSpillFillBuffer); - + queue.dispatch(pDC, workerId, threadGroupId, pSpillFillBuffer); queue.finishedWork(); } + + // Ensure all streaming writes are globally visible before moving onto the next draw + _mm_mfence(); } } } @@ -606,7 +719,7 @@ uint32_t threadId = pThreadData->threadId; uint32_t workerId = pThreadData->workerId; - bindThread(threadId, pThreadData->procGroupId, pThreadData->forceBindProcGroup); + bindThread(pContext, threadId, pThreadData->procGroupId, pThreadData->forceBindProcGroup); RDTSC_INIT(threadId); @@ -639,13 +752,20 @@ // the worker can safely increment its oldestDraw counter and move on to the next draw. std::unique_lock lock(pContext->WaitLock, std::defer_lock); - auto threadHasWork = [&](uint64_t curDraw) { return curDraw != pContext->dcRing.GetHead(); }; + auto threadHasWork = [&](uint32_t curDraw) { return curDraw != pContext->dcRing.GetHead(); }; + + uint32_t curDrawBE = 0; + uint32_t curDrawFE = 0; - uint64_t curDrawBE = 0; - uint64_t curDrawFE = 0; + bool bShutdown = false; - while (pContext->threadPool.inThreadShutdown == false) + while (true) { + if (bShutdown && !threadHasWork(curDrawBE)) + { + break; + } + uint32_t loop = 0; while (loop++ < KNOB_WORKER_SPIN_LOOP_COUNT && !threadHasWork(curDrawBE)) { @@ -663,30 +783,15 @@ continue; } - if (pContext->threadPool.inThreadShutdown) - { - lock.unlock(); - break; - } - - RDTSC_START(WorkerWaitForThreadEvent); - pContext->FifosNotEmpty.wait(lock); lock.unlock(); - - RDTSC_STOP(WorkerWaitForThreadEvent, 0, 0); - - if (pContext->threadPool.inThreadShutdown) - { - break; - } } if (IsBEThread) { - RDTSC_START(WorkerWorkOnFifoBE); - WorkOnFifoBE(pContext, workerId, curDrawBE, lockedTiles, numaNode, numaMask); - RDTSC_STOP(WorkerWorkOnFifoBE, 0, 0); + AR_BEGIN(WorkerWorkOnFifoBE, 0); + bShutdown |= WorkOnFifoBE(pContext, workerId, curDrawBE, lockedTiles, numaNode, numaMask); + AR_END(WorkerWorkOnFifoBE, 0); WorkOnCompute(pContext, workerId, curDrawBE); } @@ -727,9 +832,13 @@ } template<> DWORD workerThreadInit(LPVOID pData) = delete; -void CreateThreadPool(SWR_CONTEXT *pContext, THREAD_POOL *pPool) +////////////////////////////////////////////////////////////////////////// +/// @brief Creates thread pool info but doesn't launch threads. +/// @param pContext - pointer to context +/// @param pPool - pointer to thread pool object. +void CreateThreadPool(SWR_CONTEXT* pContext, THREAD_POOL* pPool) { - bindThread(0); + bindThread(pContext, 0); CPUNumaNodes nodes; uint32_t numThreadsPerProcGroup = 0; @@ -754,33 +863,23 @@ uint32_t numCoresPerNode = numHWCoresPerNode; uint32_t numHyperThreads = numHWHyperThreads; - if (KNOB_MAX_WORKER_THREADS) - { - SET_KNOB(HYPERTHREADED_FE, false); - } - - if (KNOB_HYPERTHREADED_FE) - { - SET_KNOB(MAX_THREADS_PER_CORE, 0); - } - - if (KNOB_MAX_NUMA_NODES) + if (pContext->threadInfo.MAX_NUMA_NODES) { - numNodes = std::min(numNodes, KNOB_MAX_NUMA_NODES); + numNodes = std::min(numNodes, pContext->threadInfo.MAX_NUMA_NODES); } - if (KNOB_MAX_CORES_PER_NUMA_NODE) + if (pContext->threadInfo.MAX_CORES_PER_NUMA_NODE) { - numCoresPerNode = std::min(numCoresPerNode, KNOB_MAX_CORES_PER_NUMA_NODE); + numCoresPerNode = std::min(numCoresPerNode, pContext->threadInfo.MAX_CORES_PER_NUMA_NODE); } - if (KNOB_MAX_THREADS_PER_CORE) + if (pContext->threadInfo.MAX_THREADS_PER_CORE) { - numHyperThreads = std::min(numHyperThreads, KNOB_MAX_THREADS_PER_CORE); + numHyperThreads = std::min(numHyperThreads, pContext->threadInfo.MAX_THREADS_PER_CORE); } #if defined(_WIN32) && !defined(_WIN64) - if (!KNOB_MAX_WORKER_THREADS) + if (!pContext->threadInfo.MAX_WORKER_THREADS) { // Limit 32-bit windows to bindable HW threads only if ((numCoresPerNode * numHWHyperThreads) > 32) @@ -790,26 +889,14 @@ } #endif - if (numHyperThreads < 2) - { - SET_KNOB(HYPERTHREADED_FE, false); - } - // Calculate numThreads uint32_t numThreads = numNodes * numCoresPerNode * numHyperThreads; numThreads = std::min(numThreads, numHWThreads); - if (KNOB_MAX_WORKER_THREADS) + if (pContext->threadInfo.MAX_WORKER_THREADS) { uint32_t maxHWThreads = numHWNodes * numHWCoresPerNode * numHWHyperThreads; - numThreads = std::min(KNOB_MAX_WORKER_THREADS, maxHWThreads); - } - - if (numThreads > KNOB_MAX_NUM_THREADS) - { - printf("WARNING: system thread count %u exceeds max %u, " - "performance will be degraded\n", - numThreads, KNOB_MAX_NUM_THREADS); + numThreads = std::min(pContext->threadInfo.MAX_WORKER_THREADS, maxHWThreads); } uint32_t numAPIReservedThreads = 1; @@ -833,9 +920,7 @@ } else { - pPool->numThreads = 0; - SET_KNOB(SINGLE_THREADED, true); - return; + pContext->threadInfo.SINGLE_THREADED = true; } } else @@ -851,14 +936,37 @@ } } + if (pContext->threadInfo.SINGLE_THREADED) + { + numThreads = 1; + } + + // Initialize DRAW_CONTEXT's per-thread stats + for (uint32_t dc = 0; dc < KNOB_MAX_DRAWS_IN_FLIGHT; ++dc) + { + pContext->dcRing[dc].dynState.pStats = new SWR_STATS[numThreads]; + memset(pContext->dcRing[dc].dynState.pStats, 0, sizeof(SWR_STATS) * numThreads); + } + + if (pContext->threadInfo.SINGLE_THREADED) + { + pContext->NumWorkerThreads = 1; + pContext->NumFEThreads = 1; + pContext->NumBEThreads = 1; + pPool->numThreads = 0; + + return; + } + pPool->numThreads = numThreads; pContext->NumWorkerThreads = pPool->numThreads; - pPool->inThreadShutdown = false; pPool->pThreadData = (THREAD_DATA *)malloc(pPool->numThreads * sizeof(THREAD_DATA)); pPool->numaMask = 0; - if (KNOB_MAX_WORKER_THREADS) + pPool->pThreads = new THREAD_PTR[pPool->numThreads]; + + if (pContext->threadInfo.MAX_WORKER_THREADS) { bool bForceBindProcGroup = (numThreads > numThreadsPerProcGroup); uint32_t numProcGroups = (numThreads + numThreadsPerProcGroup - 1) / numThreadsPerProcGroup; @@ -874,7 +982,6 @@ pPool->pThreadData[workerId].htId = 0; pPool->pThreadData[workerId].pContext = pContext; pPool->pThreadData[workerId].forceBindProcGroup = bForceBindProcGroup; - pPool->threads[workerId] = new std::thread(workerThreadInit, &pPool->pThreadData[workerId]); pContext->NumBEThreads++; pContext->NumFEThreads++; @@ -920,51 +1027,56 @@ pPool->pThreadData[workerId].htId = t; pPool->pThreadData[workerId].pContext = pContext; - if (KNOB_HYPERTHREADED_FE) - { - if (t == 0) - { - pContext->NumBEThreads++; - pPool->threads[workerId] = new std::thread(workerThreadInit, &pPool->pThreadData[workerId]); - } - else - { - pContext->NumFEThreads++; - pPool->threads[workerId] = new std::thread(workerThreadInit, &pPool->pThreadData[workerId]); - } - } - else - { - pPool->threads[workerId] = new std::thread(workerThreadInit, &pPool->pThreadData[workerId]); - pContext->NumBEThreads++; - pContext->NumFEThreads++; - } + pContext->NumBEThreads++; + pContext->NumFEThreads++; ++workerId; } } } + SWR_ASSERT(workerId == pContext->NumWorkerThreads); } } +////////////////////////////////////////////////////////////////////////// +/// @brief Launches worker threads in thread pool. +/// @param pContext - pointer to context +/// @param pPool - pointer to thread pool object. +void StartThreadPool(SWR_CONTEXT* pContext, THREAD_POOL* pPool) +{ + if (pContext->threadInfo.SINGLE_THREADED) + { + return; + } + + for (uint32_t workerId = 0; workerId < pContext->NumWorkerThreads; ++workerId) + { + pPool->pThreads[workerId] = new std::thread(workerThreadInit, &pPool->pThreadData[workerId]); + } +} + +////////////////////////////////////////////////////////////////////////// +/// @brief Destroys thread pool. +/// @param pContext - pointer to context +/// @param pPool - pointer to thread pool object. void DestroyThreadPool(SWR_CONTEXT *pContext, THREAD_POOL *pPool) { - if (!KNOB_SINGLE_THREADED) + if (!pContext->threadInfo.SINGLE_THREADED) { - // Inform threads to finish up - std::unique_lock lock(pContext->WaitLock); - pPool->inThreadShutdown = true; - _mm_mfence(); - pContext->FifosNotEmpty.notify_all(); - lock.unlock(); + // Wait for all threads to finish + SwrWaitForIdle(pContext); // Wait for threads to finish and destroy them for (uint32_t t = 0; t < pPool->numThreads; ++t) { - pPool->threads[t]->join(); - delete(pPool->threads[t]); + // Detach from thread. Cannot join() due to possibility (in Windows) of code + // in some DLLMain(THREAD_DETATCH case) blocking the thread until after this returns. + pPool->pThreads[t]->detach(); + delete(pPool->pThreads[t]); } + delete [] pPool->pThreads; + // Clean up data used by threads free(pPool->pThreadData); } diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/threads.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/threads.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/threads.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/threads.h 2017-06-01 10:37:10.000000000 +0000 @@ -1,5 +1,5 @@ /**************************************************************************** -* Copyright (C) 2014-2015 Intel Corporation. All Rights Reserved. +* Copyright (C) 2014-2016 Intel Corporation. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -45,26 +45,26 @@ uint32_t htId; // Hyperthread id uint32_t workerId; SWR_CONTEXT *pContext; - bool forceBindProcGroup; // Only useful when KNOB_MAX_WORKER_THREADS is set. + bool forceBindProcGroup; // Only useful when MAX_WORKER_THREADS is set. }; struct THREAD_POOL { - THREAD_PTR threads[KNOB_MAX_NUM_THREADS]; + THREAD_PTR* pThreads; uint32_t numThreads; uint32_t numaMask; - volatile bool inThreadShutdown; THREAD_DATA *pThreadData; }; typedef std::unordered_set TileSet; void CreateThreadPool(SWR_CONTEXT *pContext, THREAD_POOL *pPool); +void StartThreadPool(SWR_CONTEXT* pContext, THREAD_POOL* pPool); void DestroyThreadPool(SWR_CONTEXT *pContext, THREAD_POOL *pPool); // Expose FE and BE worker functions to the API thread if single threaded -void WorkOnFifoFE(SWR_CONTEXT *pContext, uint32_t workerId, uint64_t &curDrawFE); -void WorkOnFifoBE(SWR_CONTEXT *pContext, uint32_t workerId, uint64_t &curDrawBE, TileSet &usedTiles, uint32_t numaNode, uint32_t numaMask); -void WorkOnCompute(SWR_CONTEXT *pContext, uint32_t workerId, uint64_t &curDrawBE); -int64_t CompleteDrawContext(SWR_CONTEXT* pContext, DRAW_CONTEXT* pDC); \ No newline at end of file +void WorkOnFifoFE(SWR_CONTEXT *pContext, uint32_t workerId, uint32_t &curDrawFE); +bool WorkOnFifoBE(SWR_CONTEXT *pContext, uint32_t workerId, uint32_t &curDrawBE, TileSet &usedTiles, uint32_t numaNode, uint32_t numaMask); +void WorkOnCompute(SWR_CONTEXT *pContext, uint32_t workerId, uint32_t &curDrawBE); +int32_t CompleteDrawContext(SWR_CONTEXT* pContext, DRAW_CONTEXT* pDC); diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/tilemgr.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/tilemgr.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/tilemgr.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/tilemgr.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -54,11 +54,12 @@ MacroTileQueue &tile = mTiles[id]; tile.mWorkItemsFE++; + tile.mId = id; if (tile.mWorkItemsFE == 1) { tile.clear(mArena); - mDirtyTiles.push_back(id); + mDirtyTiles.push_back(&tile); } mWorkItemsProduced++; @@ -148,6 +149,18 @@ default: SWR_ASSERT(false, "Unknown attachment: %d", attachment); format = KNOB_COLOR_HOT_TILE_FORMAT; break; } + if (hotTile.state == HOTTILE_CLEAR) + { + if (attachment == SWR_ATTACHMENT_STENCIL) + ClearStencilHotTile(&hotTile); + else if (attachment == SWR_ATTACHMENT_DEPTH) + ClearDepthHotTile(&hotTile); + else + ClearColorHotTile(&hotTile); + + hotTile.state = HOTTILE_DIRTY; + } + if (hotTile.state == HOTTILE_DIRTY) { pContext->pfnStoreTile(GetPrivateState(pDC), format, attachment, @@ -195,6 +208,88 @@ return &hotTile; } +#if USE_8x2_TILE_BACKEND +void HotTileMgr::ClearColorHotTile(const HOTTILE* pHotTile) // clear a macro tile from float4 clear data. +{ + // Load clear color into SIMD register... + float *pClearData = (float *)(pHotTile->clearData); + simd16scalar valR = _simd16_broadcast_ss(&pClearData[0]); + simd16scalar valG = _simd16_broadcast_ss(&pClearData[1]); + simd16scalar valB = _simd16_broadcast_ss(&pClearData[2]); + simd16scalar valA = _simd16_broadcast_ss(&pClearData[3]); + + float *pfBuf = (float *)pHotTile->pBuffer; + uint32_t numSamples = pHotTile->numSamples; + + for (uint32_t row = 0; row < KNOB_MACROTILE_Y_DIM; row += KNOB_TILE_Y_DIM) + { + for (uint32_t col = 0; col < KNOB_MACROTILE_X_DIM; col += KNOB_TILE_X_DIM) + { + for (uint32_t si = 0; si < (KNOB_TILE_X_DIM * KNOB_TILE_Y_DIM * numSamples); si += SIMD16_TILE_X_DIM * SIMD16_TILE_Y_DIM) + { + _simd16_store_ps(pfBuf, valR); + pfBuf += KNOB_SIMD16_WIDTH; + + _simd16_store_ps(pfBuf, valG); + pfBuf += KNOB_SIMD16_WIDTH; + + _simd16_store_ps(pfBuf, valB); + pfBuf += KNOB_SIMD16_WIDTH; + + _simd16_store_ps(pfBuf, valA); + pfBuf += KNOB_SIMD16_WIDTH; + } + } + } +} + +void HotTileMgr::ClearDepthHotTile(const HOTTILE* pHotTile) // clear a macro tile from float4 clear data. +{ + // Load clear color into SIMD register... + float *pClearData = (float *)(pHotTile->clearData); + simd16scalar valZ = _simd16_broadcast_ss(&pClearData[0]); + + float *pfBuf = (float *)pHotTile->pBuffer; + uint32_t numSamples = pHotTile->numSamples; + + for (uint32_t row = 0; row < KNOB_MACROTILE_Y_DIM; row += KNOB_TILE_Y_DIM) + { + for (uint32_t col = 0; col < KNOB_MACROTILE_X_DIM; col += KNOB_TILE_X_DIM) + { + for (uint32_t si = 0; si < (KNOB_TILE_X_DIM * KNOB_TILE_Y_DIM * numSamples); si += SIMD16_TILE_X_DIM * SIMD16_TILE_Y_DIM) + { + _simd16_store_ps(pfBuf, valZ); + pfBuf += KNOB_SIMD16_WIDTH; + } + } + } +} + +void HotTileMgr::ClearStencilHotTile(const HOTTILE* pHotTile) +{ + // convert from F32 to U8. + uint8_t clearVal = (uint8_t)(pHotTile->clearData[0]); + //broadcast 32x into __m256i... + simd16scalari valS = _simd16_set1_epi8(clearVal); + + simd16scalari *pBuf = (simd16scalari *)pHotTile->pBuffer; + uint32_t numSamples = pHotTile->numSamples; + + for (uint32_t row = 0; row < KNOB_MACROTILE_Y_DIM; row += KNOB_TILE_Y_DIM) + { + for (uint32_t col = 0; col < KNOB_MACROTILE_X_DIM; col += KNOB_TILE_X_DIM) + { + // We're putting 4 pixels in each of the 32-bit slots, so increment 4 times as quickly. + for (uint32_t si = 0; si < (KNOB_TILE_X_DIM * KNOB_TILE_Y_DIM * numSamples); si += SIMD16_TILE_X_DIM * SIMD16_TILE_Y_DIM * 4) + { + _simd16_store_si(pBuf, valS); + pBuf += 1; + } + } + } +} + +#else void HotTileMgr::ClearColorHotTile(const HOTTILE* pHotTile) // clear a macro tile from float4 clear data. { // Load clear color into SIMD register... @@ -272,6 +367,7 @@ } } +#endif ////////////////////////////////////////////////////////////////////////// /// @brief InitializeHotTiles /// for draw calls, we initialize the active hot tiles and perform deferred @@ -280,7 +376,7 @@ /// to avoid unnecessary setup every triangle /// @todo support deferred clear /// @param pCreateInfo - pointer to creation info. -void HotTileMgr::InitializeHotTiles(SWR_CONTEXT* pContext, DRAW_CONTEXT* pDC, uint32_t macroID) +void HotTileMgr::InitializeHotTiles(SWR_CONTEXT* pContext, DRAW_CONTEXT* pDC, uint32_t workerId, uint32_t macroID) { const API_STATE& state = GetApiState(pDC); @@ -300,19 +396,19 @@ if (pHotTile->state == HOTTILE_INVALID) { - RDTSC_START(BELoadTiles); + AR_BEGIN(BELoadTiles, pDC->drawId); // invalid hottile before draw requires a load from surface before we can draw to it pContext->pfnLoadTile(GetPrivateState(pDC), KNOB_COLOR_HOT_TILE_FORMAT, (SWR_RENDERTARGET_ATTACHMENT)(SWR_ATTACHMENT_COLOR0 + rtSlot), x, y, pHotTile->renderTargetArrayIndex, pHotTile->pBuffer); pHotTile->state = HOTTILE_DIRTY; - RDTSC_STOP(BELoadTiles, 0, 0); + AR_END(BELoadTiles, 0); } else if (pHotTile->state == HOTTILE_CLEAR) { - RDTSC_START(BELoadTiles); + AR_BEGIN(BELoadTiles, pDC->drawId); // Clear the tile. ClearColorHotTile(pHotTile); pHotTile->state = HOTTILE_DIRTY; - RDTSC_STOP(BELoadTiles, 0, 0); + AR_END(BELoadTiles, 0); } colorHottileEnableMask &= ~(1 << rtSlot); } @@ -323,19 +419,19 @@ HOTTILE* pHotTile = GetHotTile(pContext, pDC, macroID, SWR_ATTACHMENT_DEPTH, true, numSamples); if (pHotTile->state == HOTTILE_INVALID) { - RDTSC_START(BELoadTiles); + AR_BEGIN(BELoadTiles, pDC->drawId); // invalid hottile before draw requires a load from surface before we can draw to it pContext->pfnLoadTile(GetPrivateState(pDC), KNOB_DEPTH_HOT_TILE_FORMAT, SWR_ATTACHMENT_DEPTH, x, y, pHotTile->renderTargetArrayIndex, pHotTile->pBuffer); pHotTile->state = HOTTILE_DIRTY; - RDTSC_STOP(BELoadTiles, 0, 0); + AR_END(BELoadTiles, 0); } else if (pHotTile->state == HOTTILE_CLEAR) { - RDTSC_START(BELoadTiles); + AR_BEGIN(BELoadTiles, pDC->drawId); // Clear the tile. ClearDepthHotTile(pHotTile); pHotTile->state = HOTTILE_DIRTY; - RDTSC_STOP(BELoadTiles, 0, 0); + AR_END(BELoadTiles, 0); } } @@ -345,19 +441,19 @@ HOTTILE* pHotTile = GetHotTile(pContext, pDC, macroID, SWR_ATTACHMENT_STENCIL, true, numSamples); if (pHotTile->state == HOTTILE_INVALID) { - RDTSC_START(BELoadTiles); + AR_BEGIN(BELoadTiles, pDC->drawId); // invalid hottile before draw requires a load from surface before we can draw to it pContext->pfnLoadTile(GetPrivateState(pDC), KNOB_STENCIL_HOT_TILE_FORMAT, SWR_ATTACHMENT_STENCIL, x, y, pHotTile->renderTargetArrayIndex, pHotTile->pBuffer); pHotTile->state = HOTTILE_DIRTY; - RDTSC_STOP(BELoadTiles, 0, 0); + AR_END(BELoadTiles, 0); } else if (pHotTile->state == HOTTILE_CLEAR) { - RDTSC_START(BELoadTiles); + AR_BEGIN(BELoadTiles, pDC->drawId); // Clear the tile. ClearStencilHotTile(pHotTile); pHotTile->state = HOTTILE_DIRTY; - RDTSC_STOP(BELoadTiles, 0, 0); + AR_END(BELoadTiles, 0); } } } diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/tilemgr.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/tilemgr.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/tilemgr.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/tilemgr.h 2017-06-01 10:37:10.000000000 +0000 @@ -95,6 +95,7 @@ ///@todo This will all be private. uint32_t mWorkItemsFE = 0; uint32_t mWorkItemsBE = 0; + uint32_t mId = 0; private: QUEUE mFifo; @@ -123,8 +124,7 @@ mDirtyTiles.clear(); } - INLINE std::vector& getDirtyTiles() { return mDirtyTiles; } - INLINE MacroTileQueue& getMacroTileQueue(uint32_t id) { return mTiles[id]; } + INLINE std::vector& getDirtyTiles() { return mDirtyTiles; } void markTileComplete(uint32_t id); INLINE bool isWorkComplete() @@ -145,12 +145,14 @@ std::unordered_map mTiles; // Any tile that has work queued to it is a dirty tile. - std::vector mDirtyTiles; + std::vector mDirtyTiles; OSALIGNLINE(LONG) mWorkItemsProduced { 0 }; OSALIGNLINE(volatile LONG) mWorkItemsConsumed { 0 }; }; +typedef void(*PFN_DISPATCH)(DRAW_CONTEXT* pDC, uint32_t workerId, uint32_t threadGroupId, void*& pSpillFillBuffer); + ////////////////////////////////////////////////////////////////////////// /// DispatchQueue - work queue for dispatch ////////////////////////////////////////////////////////////////////////// @@ -161,7 +163,7 @@ ////////////////////////////////////////////////////////////////////////// /// @brief Setup the producer consumer counts. - void initialize(uint32_t totalTasks, void* pTaskData) + void initialize(uint32_t totalTasks, void* pTaskData, PFN_DISPATCH pfnDispatch) { // The available and outstanding counts start with total tasks. // At the start there are N tasks available and outstanding. @@ -173,6 +175,7 @@ mTasksOutstanding = totalTasks; mpTaskData = pTaskData; + mPfnDispatch = pfnDispatch; } ////////////////////////////////////////////////////////////////////////// @@ -226,7 +229,16 @@ return mpTaskData; } + ////////////////////////////////////////////////////////////////////////// + /// @brief Dispatches a unit of work + void dispatch(DRAW_CONTEXT* pDC, uint32_t workerId, uint32_t threadGroupId, void*& pSpillFillBuffer) + { + SWR_ASSERT(mPfnDispatch != nullptr); + mPfnDispatch(pDC, workerId, threadGroupId, pSpillFillBuffer); + } + void* mpTaskData{ nullptr }; // The API thread will set this up and the callback task function will interpet this. + PFN_DISPATCH mPfnDispatch{ nullptr }; // Function to call per dispatch OSALIGNLINE(volatile LONG) mTasksAvailable{ 0 }; OSALIGNLINE(volatile LONG) mTasksOutstanding{ 0 }; @@ -291,7 +303,7 @@ } } - void InitializeHotTiles(SWR_CONTEXT* pContext, DRAW_CONTEXT* pDC, uint32_t macroID); + void InitializeHotTiles(SWR_CONTEXT* pContext, DRAW_CONTEXT* pDC, uint32_t workerId, uint32_t macroID); HOTTILE *GetHotTile(SWR_CONTEXT* pContext, DRAW_CONTEXT* pDC, uint32_t macroID, SWR_RENDERTARGET_ATTACHMENT attachment, bool create, uint32_t numSamples = 1, uint32_t renderTargetArrayIndex = 0); diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/utils.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/utils.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/core/utils.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/core/utils.h 2017-06-01 10:37:10.000000000 +0000 @@ -29,15 +29,17 @@ #include #include +#include #include "common/os.h" #include "common/simdintrin.h" #include "common/swr_assert.h" +#include "core/api.h" #if defined(_WIN64) || defined(__x86_64__) #define _MM_INSERT_EPI64 _mm_insert_epi64 #define _MM_EXTRACT_EPI64 _mm_extract_epi64 #else -INLINE INT64 _MM_EXTRACT_EPI64(__m128i a, const int32_t ndx) +INLINE int64_t _MM_EXTRACT_EPI64(__m128i a, const int32_t ndx) { OSALIGNLINE(uint32_t) elems[4]; _mm_store_si128((__m128i*)elems, a); @@ -55,7 +57,7 @@ } } -INLINE __m128i _MM_INSERT_EPI64(__m128i a, INT64 b, const int32_t ndx) +INLINE __m128i _MM_INSERT_EPI64(__m128i a, int64_t b, const int32_t ndx) { OSALIGNLINE(int64_t) elems[2]; _mm_store_si128((__m128i*)elems, a); @@ -73,36 +75,12 @@ } #endif -OSALIGNLINE(struct) BBOX -{ - int top{ 0 }; - int bottom{ 0 }; - int left{ 0 }; - int right{ 0 }; - - BBOX() {} - BBOX(int t, int b, int l, int r) : top(t), bottom(b), left(l), right(r) {} - - bool operator==(const BBOX& rhs) - { - return (this->top == rhs.top && - this->bottom == rhs.bottom && - this->left == rhs.left && - this->right == rhs.right); - } - - bool operator!=(const BBOX& rhs) - { - return !(*this == rhs); - } -}; - struct simdBBox { - simdscalari top; - simdscalari bottom; - simdscalari left; - simdscalari right; + simdscalari ymin; + simdscalari ymax; + simdscalari xmin; + simdscalari xmax; }; INLINE @@ -169,7 +147,7 @@ #if KNOB_SIMD_WIDTH == 8 INLINE -void vTranspose3x8(__m128 (&vDst)[8], __m256 &vSrc0, __m256 &vSrc1, __m256 &vSrc2) +void vTranspose3x8(__m128 (&vDst)[8], const __m256 &vSrc0, const __m256 &vSrc1, const __m256 &vSrc2) { __m256 r0r2 = _mm256_unpacklo_ps(vSrc0, vSrc2); //x0z0x1z1 x4z4x5z5 __m256 r1rx = _mm256_unpacklo_ps(vSrc1, _mm256_undefined_ps()); //y0w0y1w1 y4w4y5w5 @@ -193,7 +171,7 @@ } INLINE -void vTranspose4x8(__m128 (&vDst)[8], __m256 &vSrc0, __m256 &vSrc1, __m256 &vSrc2, __m256 &vSrc3) +void vTranspose4x8(__m128 (&vDst)[8], const __m256 &vSrc0, const __m256 &vSrc1, const __m256 &vSrc2, const __m256 &vSrc3) { __m256 r0r2 = _mm256_unpacklo_ps(vSrc0, vSrc2); //x0z0x1z1 x4z4x5z5 __m256 r1rx = _mm256_unpacklo_ps(vSrc1, vSrc3); //y0w0y1w1 y4w4y5w5 @@ -216,6 +194,29 @@ vDst[7] = _mm256_extractf128_ps(r02r1xhihi, 1); } +#if ENABLE_AVX512_SIMD16 +INLINE +void vTranspose4x16(simd16scalar(&dst)[4], const simd16scalar &src0, const simd16scalar &src1, const simd16scalar &src2, const simd16scalar &src3) +{ + const simd16scalari perm = _simd16_set_epi32(15, 11, 7, 3, 14, 10, 6, 2, 13, 9, 5, 1, 12, 8, 4, 0); // pre-permute input to setup the right order after all the unpacking + + simd16scalar pre0 = _simd16_permute_ps(src0, perm); // r + simd16scalar pre1 = _simd16_permute_ps(src1, perm); // g + simd16scalar pre2 = _simd16_permute_ps(src2, perm); // b + simd16scalar pre3 = _simd16_permute_ps(src3, perm); // a + + simd16scalar rblo = _simd16_unpacklo_ps(pre0, pre2); + simd16scalar galo = _simd16_unpacklo_ps(pre1, pre3); + simd16scalar rbhi = _simd16_unpackhi_ps(pre0, pre2); + simd16scalar gahi = _simd16_unpackhi_ps(pre1, pre3); + + dst[0] = _simd16_unpacklo_ps(rblo, galo); + dst[1] = _simd16_unpackhi_ps(rblo, galo); + dst[2] = _simd16_unpacklo_ps(rbhi, gahi); + dst[3] = _simd16_unpackhi_ps(rbhi, gahi); +} + +#endif INLINE void vTranspose8x8(__m256 (&vDst)[8], const __m256 &vMask0, const __m256 &vMask1, const __m256 &vMask2, const __m256 &vMask3, const __m256 &vMask4, const __m256 &vMask5, const __m256 &vMask6, const __m256 &vMask7) { @@ -267,6 +268,13 @@ { memcpy(pDst, pSrc, (bpp * KNOB_SIMD_WIDTH) / 8); } +#if ENABLE_AVX512_SIMD16 + + INLINE static void Transpose_16(const uint8_t* pSrc, uint8_t* pDst) + { + memcpy(pDst, pSrc, (bpp * KNOB_SIMD16_WIDTH) / 8); + } +#endif }; ////////////////////////////////////////////////////////////////////////// @@ -281,6 +289,7 @@ INLINE static void Transpose(const uint8_t* pSrc, uint8_t* pDst) { simdscalari src = _simd_load_si((const simdscalari*)pSrc); + #if KNOB_SIMD_WIDTH == 8 #if KNOB_ARCH == KNOB_ARCH_AVX __m128i c0c1 = _mm256_castsi256_si128(src); // rrrrrrrrgggggggg @@ -306,6 +315,29 @@ #error Unsupported vector width #endif } +#if ENABLE_AVX512_SIMD16 + + INLINE static void Transpose_16(const uint8_t* pSrc, uint8_t* pDst) + { + __m128i src0 = _mm_load_si128(reinterpret_cast(pSrc)); // rrrrrrrrrrrrrrrr + __m128i src1 = _mm_load_si128(reinterpret_cast(pSrc) + 1); // gggggggggggggggg + __m128i src2 = _mm_load_si128(reinterpret_cast(pSrc) + 2); // bbbbbbbbbbbbbbbb + __m128i src3 = _mm_load_si128(reinterpret_cast(pSrc) + 3); // aaaaaaaaaaaaaaaa + + simd16scalari cvt0 = _simd16_cvtepu8_epi32(src0); + simd16scalari cvt1 = _simd16_cvtepu8_epi32(src1); + simd16scalari cvt2 = _simd16_cvtepu8_epi32(src2); + simd16scalari cvt3 = _simd16_cvtepu8_epi32(src3); + + simd16scalari shl1 = _simd16_slli_epi32(cvt1, 8); + simd16scalari shl2 = _simd16_slli_epi32(cvt2, 16); + simd16scalari shl3 = _simd16_slli_epi32(cvt3, 24); + + simd16scalari dst = _simd16_or_si(_simd16_or_si(cvt0, shl1), _simd16_or_si(shl2, shl3)); + + _simd16_store_si(reinterpret_cast(pDst), dst); // rgbargbargbargbargbargbargbargbargbargbargbargbargbargbargbargba + } +#endif }; ////////////////////////////////////////////////////////////////////////// @@ -318,6 +350,10 @@ /// @param pSrc - source data in SOA form /// @param pDst - output data in AOS form INLINE static void Transpose(const uint8_t* pSrc, uint8_t* pDst) = delete; +#if ENABLE_AVX512_SIMD16 + + INLINE static void Transpose_16(const uint8_t* pSrc, uint8_t* pDst) = delete; +#endif }; ////////////////////////////////////////////////////////////////////////// @@ -331,9 +367,9 @@ /// @param pDst - output data in AOS form INLINE static void Transpose(const uint8_t* pSrc, uint8_t* pDst) { +#if KNOB_SIMD_WIDTH == 8 simdscalari src = _simd_load_si((const simdscalari*)pSrc); -#if KNOB_SIMD_WIDTH == 8 __m128i rg = _mm256_castsi256_si128(src); // rrrrrrrr gggggggg __m128i g = _mm_unpackhi_epi64(rg, rg); // gggggggg gggggggg rg = _mm_unpacklo_epi8(rg, g); @@ -342,6 +378,23 @@ #error Unsupported vector width #endif } +#if ENABLE_AVX512_SIMD16 + + INLINE static void Transpose_16(const uint8_t* pSrc, uint8_t* pDst) + { + __m128i src0 = _mm_load_si128(reinterpret_cast(pSrc)); // rrrrrrrrrrrrrrrr + __m128i src1 = _mm_load_si128(reinterpret_cast(pSrc) + 1); // gggggggggggggggg + + simdscalari cvt0 = _simd_cvtepu8_epi16(src0); + simdscalari cvt1 = _simd_cvtepu8_epi16(src1); + + simdscalari shl1 = _simd_slli_epi32(cvt1, 8); + + simdscalari dst = _simd_or_si(cvt0, shl1); + + _simd_store_si(reinterpret_cast(pDst), dst); // rgrgrgrgrgrgrgrgrgrgrgrgrgrgrgrg + } +#endif }; ////////////////////////////////////////////////////////////////////////// @@ -375,6 +428,25 @@ #error Unsupported vector width #endif } +#if ENABLE_AVX512_SIMD16 + + INLINE static void Transpose_16(const uint8_t* pSrc, uint8_t* pDst) + { + simd16scalar src0 = _simd16_load_ps(reinterpret_cast(pSrc)); + simd16scalar src1 = _simd16_load_ps(reinterpret_cast(pSrc) + 16); + simd16scalar src2 = _simd16_load_ps(reinterpret_cast(pSrc) + 32); + simd16scalar src3 = _simd16_load_ps(reinterpret_cast(pSrc) + 48); + + simd16scalar dst[4]; + + vTranspose4x16(dst, src0, src1, src2, src3); + + _simd16_store_ps(reinterpret_cast(pDst) + 0, dst[0]); + _simd16_store_ps(reinterpret_cast(pDst) + 16, dst[1]); + _simd16_store_ps(reinterpret_cast(pDst) + 32, dst[2]); + _simd16_store_ps(reinterpret_cast(pDst) + 48, dst[3]); + } +#endif }; ////////////////////////////////////////////////////////////////////////// @@ -407,6 +479,25 @@ #error Unsupported vector width #endif } +#if ENABLE_AVX512_SIMD16 + + INLINE static void Transpose_16(const uint8_t* pSrc, uint8_t* pDst) + { + simd16scalar src0 = _simd16_load_ps(reinterpret_cast(pSrc)); + simd16scalar src1 = _simd16_load_ps(reinterpret_cast(pSrc) + 16); + simd16scalar src2 = _simd16_load_ps(reinterpret_cast(pSrc) + 32); + simd16scalar src3 = _simd16_setzero_ps(); + + simd16scalar dst[4]; + + vTranspose4x16(dst, src0, src1, src2, src3); + + _simd16_store_ps(reinterpret_cast(pDst) + 0, dst[0]); + _simd16_store_ps(reinterpret_cast(pDst) + 16, dst[1]); + _simd16_store_ps(reinterpret_cast(pDst) + 32, dst[2]); + _simd16_store_ps(reinterpret_cast(pDst) + 48, dst[3]); + } +#endif }; ////////////////////////////////////////////////////////////////////////// @@ -420,6 +511,7 @@ /// @param pDst - output data in AOS form INLINE static void Transpose(const uint8_t* pSrc, uint8_t* pDst) { +#if KNOB_SIMD_WIDTH == 8 const float* pfSrc = (const float*)pSrc; __m128 src_r0 = _mm_load_ps(pfSrc + 0); __m128 src_r1 = _mm_load_ps(pfSrc + 4); @@ -436,7 +528,30 @@ _mm_store_ps(pfDst + 4, dst1); _mm_store_ps(pfDst + 8, dst2); _mm_store_ps(pfDst + 12, dst3); +#else +#error Unsupported vector width +#endif + } +#if ENABLE_AVX512_SIMD16 + + INLINE static void Transpose_16(const uint8_t* pSrc, uint8_t* pDst) + { + simd16scalar src0 = _simd16_load_ps(reinterpret_cast(pSrc)); // rrrrrrrrrrrrrrrr + simd16scalar src1 = _simd16_load_ps(reinterpret_cast(pSrc) + 16); // gggggggggggggggg + + simd16scalar tmp0 = _simd16_unpacklo_ps(src0, src1); // r0 g0 r1 g1 r4 g4 r5 g5 r8 g8 r9 g9 rC gC rD gD + simd16scalar tmp1 = _simd16_unpackhi_ps(src0, src1); // r2 g2 r3 g3 r6 g6 r7 g7 rA gA rB gB rE gE rF gF + + simd16scalar per0 = _simd16_permute2f128_ps(tmp0, tmp1, 0x44); // (1, 0, 1, 0) // r0 g0 r1 g1 r4 g4 r5 g5 r2 g2 r3 g3 r6 g6 r7 g7 + simd16scalar per1 = _simd16_permute2f128_ps(tmp0, tmp1, 0xEE); // (3, 2, 3, 2) // r8 g8 r9 g9 rC gC rD gD rA gA rB gB rE gE rF gF + + simd16scalar dst0 = _simd16_permute2f128_ps(per0, per0, 0xD8); // (3, 1, 2, 0) // r0 g0 r1 g1 r2 g2 r3 g3 r4 g4 r5 g5 r6 g6 r7 g7 + simd16scalar dst1 = _simd16_permute2f128_ps(per1, per1, 0xD8); // (3, 1, 2, 0) // r8 g8 r9 g9 rA gA rB gB rC gC rD gD rE gE rF gF + + _simd16_store_ps(reinterpret_cast(pDst) + 0, dst0); // rgrgrgrgrgrgrgrg + _simd16_store_ps(reinterpret_cast(pDst) + 16, dst1); // rgrgrgrgrgrgrgrg } +#endif }; ////////////////////////////////////////////////////////////////////////// @@ -477,6 +592,36 @@ #error Unsupported vector width #endif } +#if ENABLE_AVX512_SIMD16 + + INLINE static void Transpose_16(const uint8_t* pSrc, uint8_t* pDst) + { + simdscalari src0 = _simd_load_si(reinterpret_cast(pSrc)); // rrrrrrrrrrrrrrrr + simdscalari src1 = _simd_load_si(reinterpret_cast(pSrc) + 1); // gggggggggggggggg + simdscalari src2 = _simd_load_si(reinterpret_cast(pSrc) + 2); // bbbbbbbbbbbbbbbb + simdscalari src3 = _simd_load_si(reinterpret_cast(pSrc) + 3); // aaaaaaaaaaaaaaaa + + simdscalari pre0 = _simd_unpacklo_epi16(src0, src1); // rg0 rg1 rg2 rg3 rg8 rg9 rgA rgB + simdscalari pre1 = _simd_unpackhi_epi16(src0, src1); // rg4 rg5 rg6 rg7 rgC rgD rgE rgF + simdscalari pre2 = _simd_unpacklo_epi16(src2, src3); // ba0 ba1 ba3 ba3 ba8 ba9 baA baB + simdscalari pre3 = _simd_unpackhi_epi16(src2, src3); // ba4 ba5 ba6 ba7 baC baD baE baF + + simdscalari tmp0 = _simd_unpacklo_epi32(pre0, pre2); // rbga0 rbga1 rbga8 rbga9 + simdscalari tmp1 = _simd_unpackhi_epi32(pre0, pre2); // rbga2 rbga3 rbgaA rbgaB + simdscalari tmp2 = _simd_unpacklo_epi32(pre1, pre3); // rbga4 rbga5 rgbaC rbgaD + simdscalari tmp3 = _simd_unpackhi_epi32(pre1, pre3); // rbga6 rbga7 rbgaE rbgaF + + simdscalari dst0 = _simd_permute2f128_si(tmp0, tmp1, 0x20); // (2, 0) // rbga0 rbga1 rbga2 rbga3 + simdscalari dst1 = _simd_permute2f128_si(tmp2, tmp3, 0x20); // (2, 0) // rbga4 rbga5 rbga6 rbga7 + simdscalari dst2 = _simd_permute2f128_si(tmp0, tmp1, 0x31); // (3, 1) // rbga8 rbga9 rbgaA rbgaB + simdscalari dst3 = _simd_permute2f128_si(tmp2, tmp3, 0x31); // (3, 1) // rbgaC rbgaD rbgaE rbgaF + + _simd_store_si(reinterpret_cast(pDst) + 0, dst0); // rgbargbargbargba + _simd_store_si(reinterpret_cast(pDst) + 1, dst1); // rgbargbargbargba + _simd_store_si(reinterpret_cast(pDst) + 2, dst2); // rgbargbargbargba + _simd_store_si(reinterpret_cast(pDst) + 3, dst3); // rgbargbargbargba + } +#endif }; ////////////////////////////////////////////////////////////////////////// @@ -516,6 +661,36 @@ #error Unsupported vector width #endif } +#if ENABLE_AVX512_SIMD16 + + INLINE static void Transpose_16(const uint8_t* pSrc, uint8_t* pDst) + { + simdscalari src0 = _simd_load_si(reinterpret_cast(pSrc)); // rrrrrrrrrrrrrrrr + simdscalari src1 = _simd_load_si(reinterpret_cast(pSrc) + 1); // gggggggggggggggg + simdscalari src2 = _simd_load_si(reinterpret_cast(pSrc) + 2); // bbbbbbbbbbbbbbbb + simdscalari src3 = _simd_setzero_si(); // aaaaaaaaaaaaaaaa + + simdscalari pre0 = _simd_unpacklo_epi16(src0, src1); // rg0 rg1 rg2 rg3 rg8 rg9 rgA rgB + simdscalari pre1 = _simd_unpackhi_epi16(src0, src1); // rg4 rg5 rg6 rg7 rgC rgD rgE rgF + simdscalari pre2 = _simd_unpacklo_epi16(src2, src3); // ba0 ba1 ba3 ba3 ba8 ba9 baA baB + simdscalari pre3 = _simd_unpackhi_epi16(src2, src3); // ba4 ba5 ba6 ba7 baC baD baE baF + + simdscalari tmp0 = _simd_unpacklo_epi32(pre0, pre2); // rbga0 rbga1 rbga8 rbga9 + simdscalari tmp1 = _simd_unpackhi_epi32(pre0, pre2); // rbga2 rbga3 rbgaA rbgaB + simdscalari tmp2 = _simd_unpacklo_epi32(pre1, pre3); // rbga4 rbga5 rgbaC rbgaD + simdscalari tmp3 = _simd_unpackhi_epi32(pre1, pre3); // rbga6 rbga7 rbgaE rbgaF + + simdscalari dst0 = _simd_permute2f128_si(tmp0, tmp1, 0x20); // (2, 0) // rbga0 rbga1 rbga2 rbga3 + simdscalari dst1 = _simd_permute2f128_si(tmp2, tmp3, 0x20); // (2, 0) // rbga4 rbga5 rbga6 rbga7 + simdscalari dst2 = _simd_permute2f128_si(tmp0, tmp1, 0x31); // (3, 1) // rbga8 rbga9 rbgaA rbgaB + simdscalari dst3 = _simd_permute2f128_si(tmp2, tmp3, 0x31); // (3, 1) // rbgaC rbgaD rbgaE rbgaF + + _simd_store_si(reinterpret_cast(pDst) + 0, dst0); // rgbargbargbargba + _simd_store_si(reinterpret_cast(pDst) + 1, dst1); // rgbargbargbargba + _simd_store_si(reinterpret_cast(pDst) + 2, dst2); // rgbargbargbargba + _simd_store_si(reinterpret_cast(pDst) + 3, dst3); // rgbargbargbargba + } +#endif }; ////////////////////////////////////////////////////////////////////////// @@ -529,9 +704,9 @@ /// @param pDst - output data in AOS form INLINE static void Transpose(const uint8_t* pSrc, uint8_t* pDst) { +#if KNOB_SIMD_WIDTH == 8 simdscalar src = _simd_load_ps((const float*)pSrc); -#if KNOB_SIMD_WIDTH == 8 __m128 comp0 = _mm256_castps256_ps128(src); __m128 comp1 = _mm256_extractf128_ps(src, 1); @@ -547,6 +722,23 @@ #error Unsupported vector width #endif } +#if ENABLE_AVX512_SIMD16 + + INLINE static void Transpose_16(const uint8_t* pSrc, uint8_t* pDst) + { + simdscalari src0 = _simd_load_si(reinterpret_cast(pSrc)); // rrrrrrrrrrrrrrrr + simdscalari src1 = _simd_load_si(reinterpret_cast(pSrc) + 1); // gggggggggggggggg + + simdscalari tmp0 = _simd_unpacklo_epi16(src0, src1); // rg0 rg1 rg2 rg3 rg8 rg9 rgA rgB + simdscalari tmp1 = _simd_unpackhi_epi16(src0, src1); // rg4 rg5 rg6 rg7 rgC rgD rgE rgF + + simdscalari dst0 = _simd_permute2f128_si(tmp0, tmp1, 0x20); // (2, 0) // rg0 rg1 rg2 rg3 rg4 rg5 rg6 rg7 + simdscalari dst1 = _simd_permute2f128_si(tmp0, tmp1, 0x31); // (3, 1) // rg8 rg9 rgA rgB rgC rgD rgE rgF + + _simd_store_si(reinterpret_cast(pDst) + 0, dst0); // rgrgrgrgrgrgrgrg + _simd_store_si(reinterpret_cast(pDst) + 1, dst1); // rgrgrgrgrgrgrgrg + } +#endif }; ////////////////////////////////////////////////////////////////////////// @@ -559,6 +751,10 @@ /// @param pSrc - source data in SOA form /// @param pDst - output data in AOS form static void Transpose(const uint8_t* pSrc, uint8_t* pDst) = delete; +#if ENABLE_AVX512_SIMD16 + + static void Transpose_16(const uint8_t* pSrc, uint8_t* pDst) = delete; +#endif }; ////////////////////////////////////////////////////////////////////////// @@ -571,9 +767,11 @@ /// @param pSrc - source data in SOA form /// @param pDst - output data in AOS form static void Transpose(const uint8_t* pSrc, uint8_t* pDst) = delete; -}; - +#if ENABLE_AVX512_SIMD16 + static void Transpose_16(const uint8_t* pSrc, uint8_t* pDst) = delete; +#endif +}; ////////////////////////////////////////////////////////////////////////// /// Transpose4_4_4_4 @@ -585,6 +783,10 @@ /// @param pSrc - source data in SOA form /// @param pDst - output data in AOS form static void Transpose(const uint8_t* pSrc, uint8_t* pDst) = delete; +#if ENABLE_AVX512_SIMD16 + + static void Transpose_16(const uint8_t* pSrc, uint8_t* pDst) = delete; +#endif }; ////////////////////////////////////////////////////////////////////////// @@ -597,6 +799,10 @@ /// @param pSrc - source data in SOA form /// @param pDst - output data in AOS form static void Transpose(const uint8_t* pSrc, uint8_t* pDst) = delete; +#if ENABLE_AVX512_SIMD16 + + static void Transpose_16(const uint8_t* pSrc, uint8_t* pDst) = delete; +#endif }; ////////////////////////////////////////////////////////////////////////// @@ -609,6 +815,10 @@ /// @param pSrc - source data in SOA form /// @param pDst - output data in AOS form static void Transpose(const uint8_t* pSrc, uint8_t* pDst) = delete; +#if ENABLE_AVX512_SIMD16 + + static void Transpose_16(const uint8_t* pSrc, uint8_t* pDst) = delete; +#endif }; ////////////////////////////////////////////////////////////////////////// @@ -621,6 +831,22 @@ /// @param pSrc - source data in SOA form /// @param pDst - output data in AOS form static void Transpose(const uint8_t* pSrc, uint8_t* pDst) = delete; +#if ENABLE_AVX512_SIMD16 + + static void Transpose_16(const uint8_t* pSrc, uint8_t* pDst) = delete; +#endif +}; + +////////////////////////////////////////////////////////////////////////// +/// Transpose1_5_5_5 +////////////////////////////////////////////////////////////////////////// +struct Transpose1_5_5_5 +{ + ////////////////////////////////////////////////////////////////////////// + /// @brief Performs an SOA to AOS conversion for packed 5_5_5_1 data. + /// @param pSrc - source data in SOA form + /// @param pDst - output data in AOS form + static void Transpose(const uint8_t* pSrc, uint8_t* pDst) = delete; }; ////////////////////////////////////////////////////////////////////////// @@ -633,6 +859,10 @@ /// @param pSrc - source data in SOA form /// @param pDst - output data in AOS form static void Transpose(const uint8_t* pSrc, uint8_t* pDst) = delete; +#if ENABLE_AVX512_SIMD16 + + static void Transpose_16(const uint8_t* pSrc, uint8_t* pDst) = delete; +#endif }; ////////////////////////////////////////////////////////////////////////// @@ -645,6 +875,74 @@ /// @param pSrc - source data in SOA form /// @param pDst - output data in AOS form static void Transpose(const uint8_t* pSrc, uint8_t* pDst) = delete; +#if ENABLE_AVX512_SIMD16 + + static void Transpose_16(const uint8_t* pSrc, uint8_t* pDst) = delete; +#endif +}; + +////////////////////////////////////////////////////////////////////////// +/// Transpose64 +////////////////////////////////////////////////////////////////////////// +struct Transpose64 +{ + ////////////////////////////////////////////////////////////////////////// + /// @brief Performs an SOA to AOS conversion + /// @param pSrc - source data in SOA form + /// @param pDst - output data in AOS form + static void Transpose(const uint8_t* pSrc, uint8_t* pDst) = delete; +#if ENABLE_AVX512_SIMD16 + + static void Transpose_16(const uint8_t* pSrc, uint8_t* pDst) = delete; +#endif +}; + +////////////////////////////////////////////////////////////////////////// +/// Transpose64_64 +////////////////////////////////////////////////////////////////////////// +struct Transpose64_64 +{ + ////////////////////////////////////////////////////////////////////////// + /// @brief Performs an SOA to AOS conversion + /// @param pSrc - source data in SOA form + /// @param pDst - output data in AOS form + static void Transpose(const uint8_t* pSrc, uint8_t* pDst) = delete; +#if ENABLE_AVX512_SIMD16 + + static void Transpose_16(const uint8_t* pSrc, uint8_t* pDst) = delete; +#endif +}; + +////////////////////////////////////////////////////////////////////////// +/// Transpose64_64_64 +////////////////////////////////////////////////////////////////////////// +struct Transpose64_64_64 +{ + ////////////////////////////////////////////////////////////////////////// + /// @brief Performs an SOA to AOS conversion + /// @param pSrc - source data in SOA form + /// @param pDst - output data in AOS form + static void Transpose(const uint8_t* pSrc, uint8_t* pDst) = delete; +#if ENABLE_AVX512_SIMD16 + + static void Transpose_16(const uint8_t* pSrc, uint8_t* pDst) = delete; +#endif +}; + +////////////////////////////////////////////////////////////////////////// +/// Transpose64_64_64_64 +////////////////////////////////////////////////////////////////////////// +struct Transpose64_64_64_64 +{ + ////////////////////////////////////////////////////////////////////////// + /// @brief Performs an SOA to AOS conversion + /// @param pSrc - source data in SOA form + /// @param pDst - output data in AOS form + static void Transpose(const uint8_t* pSrc, uint8_t* pDst) = delete; +#if ENABLE_AVX512_SIMD16 + + static void Transpose_16(const uint8_t* pSrc, uint8_t* pDst) = delete; +#endif }; // helper function to unroll loops @@ -664,6 +962,26 @@ } }; +// helper function to unroll loops, with mask to skip specific iterations +template +struct UnrollerLMask { + template + INLINE static void step(Lambda& func) { + if(Mask & (1 << Begin)) + { + func(Begin); + } + UnrollerL::step(func); + } +}; + +template +struct UnrollerLMask { + template + static void step(Lambda& func) { + } +}; + // general CRC compute INLINE uint32_t ComputeCRC(uint32_t crc, const void *pData, uint32_t size) @@ -822,11 +1140,22 @@ } }; +// Ranged integer argument for TemplateArgUnroller +template +struct IntArg +{ + uint32_t val; +}; + // Recursive template used to auto-nest conditionals. Converts dynamic boolean function // arguments to static template arguments. template struct TemplateArgUnroller { + //----------------------------------------- + // Boolean value + //----------------------------------------- + // Last Arg Terminator static typename TermT::FuncType GetFunc(bool bArg) { @@ -849,6 +1178,52 @@ return TemplateArgUnroller::GetFunc(remainingArgs...); } + + //----------------------------------------- + // Integer value (within specified range) + //----------------------------------------- + + // Last Arg Terminator + template + static typename TermT::FuncType GetFunc(IntArg iArg) + { + if (iArg.val == TMax) + { + return TermT::template GetFunc>(); + } + if (TMax > TMin) + { + return TemplateArgUnroller::GetFunc(IntArg{iArg.val}); + } + SWR_ASSUME(false); return nullptr; + } + template + static typename TermT::FuncType GetFunc(IntArg iArg) + { + SWR_ASSERT(iArg.val == TVal); + return TermT::template GetFunc>(); + } + + // Recursively parse args + template + static typename TermT::FuncType GetFunc(IntArg iArg, TArgsT... remainingArgs) + { + if (iArg.val == TMax) + { + return TemplateArgUnroller>::GetFunc(remainingArgs...); + } + if (TMax > TMin) + { + return TemplateArgUnroller::GetFunc(IntArg{iArg.val}, remainingArgs...); + } + SWR_ASSUME(false); return nullptr; + } + template + static typename TermT::FuncType GetFunc(IntArg iArg, TArgsT... remainingArgs) + { + SWR_ASSERT(iArg.val == TVal); + return TemplateArgUnroller>::GetFunc(remainingArgs...); + } }; diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/blend_jit.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/blend_jit.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/blend_jit.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/blend_jit.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -37,6 +37,9 @@ // components with bit-widths <= the QUANTIZE_THRESHOLD will be quantized #define QUANTIZE_THRESHOLD 2 +using namespace llvm; +using namespace SwrJit; + ////////////////////////////////////////////////////////////////////////// /// Interface to Jitting a blend shader ////////////////////////////////////////////////////////////////////////// @@ -217,7 +220,7 @@ const SWR_FORMAT_INFO& info = GetFormatInfo(format); for (uint32_t c = 0; c < info.numComps; ++c) { - if (info.bpc[c] <= QUANTIZE_THRESHOLD) + if (info.bpc[c] <= QUANTIZE_THRESHOLD && info.type[c] != SWR_TYPE_UNUSED) { uint32_t swizComp = info.swizzle[c]; float factor = (float)((1 << info.bpc[c]) - 1); @@ -440,10 +443,13 @@ } } - void AlphaTest(const BLEND_COMPILE_STATE& state, Value* pBlendState, Value* pAlpha, Value* ppMask) + void AlphaTest(const BLEND_COMPILE_STATE& state, Value* pBlendState, Value* ppAlpha, Value* ppMask) { // load uint32_t reference Value* pRef = VBROADCAST(LOAD(pBlendState, { 0, SWR_BLEND_STATE_alphaTestReference })); + + // load alpha + Value* pAlpha = LOAD(ppAlpha); Value* pTest = nullptr; if (state.alphaTestFormat == ALPHA_TEST_UNORM8) @@ -520,6 +526,7 @@ PointerType::get(Gen_SWR_BLEND_STATE(JM()), 0), // SWR_BLEND_STATE* PointerType::get(mSimdFP32Ty, 0), // simdvector& src PointerType::get(mSimdFP32Ty, 0), // simdvector& src1 + PointerType::get(mSimdFP32Ty, 0), // src0alpha Type::getInt32Ty(JM()->mContext), // sampleNum PointerType::get(mSimdFP32Ty, 0), // uint8_t* pDst PointerType::get(mSimdFP32Ty, 0), // simdvector& result @@ -535,13 +542,15 @@ IRB()->SetInsertPoint(entry); // arguments - auto argitr = blendFunc->getArgumentList().begin(); + auto argitr = blendFunc->arg_begin(); Value* pBlendState = &*argitr++; pBlendState->setName("pBlendState"); Value* pSrc = &*argitr++; pSrc->setName("src"); Value* pSrc1 = &*argitr++; pSrc1->setName("src1"); + Value* pSrc0Alpha = &*argitr++; + pSrc0Alpha->setName("src0alpha"); Value* sampleNum = &*argitr++; sampleNum->setName("sampleNum"); Value* pDst = &*argitr++; @@ -585,7 +594,7 @@ // alpha test if (state.desc.alphaTestEnable) { - AlphaTest(state, pBlendState, src[3], ppMask); + AlphaTest(state, pBlendState, pSrc0Alpha, ppMask); } // color blend @@ -646,29 +655,59 @@ if(state.blendState.logicOpEnable) { const SWR_FORMAT_INFO& info = GetFormatInfo(state.format); - SWR_ASSERT(info.type[0] == SWR_TYPE_UINT); Value* vMask[4]; + float scale[4]; + + if (!state.blendState.blendEnable) + { + Clamp(state.format, src); + Clamp(state.format, dst); + } + for(uint32_t i = 0; i < 4; i++) { - switch(info.bpc[i]) + if (info.type[i] == SWR_TYPE_UNUSED) { - case 0: vMask[i] = VIMMED1(0x00000000); break; - case 2: vMask[i] = VIMMED1(0x00000003); break; - case 5: vMask[i] = VIMMED1(0x0000001F); break; - case 6: vMask[i] = VIMMED1(0x0000003F); break; - case 8: vMask[i] = VIMMED1(0x000000FF); break; - case 10: vMask[i] = VIMMED1(0x000003FF); break; - case 11: vMask[i] = VIMMED1(0x000007FF); break; - case 16: vMask[i] = VIMMED1(0x0000FFFF); break; - case 24: vMask[i] = VIMMED1(0x00FFFFFF); break; - case 32: vMask[i] = VIMMED1(0xFFFFFFFF); break; + continue; + } + + if (info.bpc[i] >= 32) { + vMask[i] = VIMMED1(0xFFFFFFFF); + scale[i] = 0xFFFFFFFF; + } else { + vMask[i] = VIMMED1((1 << info.bpc[i]) - 1); + if (info.type[i] == SWR_TYPE_SNORM) + scale[i] = (1 << (info.bpc[i] - 1)) - 1; + else + scale[i] = (1 << info.bpc[i]) - 1; + } + + switch (info.type[i]) { default: - vMask[i] = VIMMED1(0x0); - SWR_ASSERT(0, "Unsupported bpc for logic op\n"); + SWR_ASSERT(0, "Unsupported type for logic op\n"); + /* fallthrough */ + case SWR_TYPE_UINT: + case SWR_TYPE_SINT: + src[i] = BITCAST(src[i], mSimdInt32Ty); + dst[i] = BITCAST(dst[i], mSimdInt32Ty); + break; + case SWR_TYPE_SNORM: + src[i] = FP_TO_SI( + FMUL(src[i], VIMMED1(scale[i])), + mSimdInt32Ty); + dst[i] = FP_TO_SI( + FMUL(dst[i], VIMMED1(scale[i])), + mSimdInt32Ty); + break; + case SWR_TYPE_UNORM: + src[i] = FP_TO_UI( + FMUL(src[i], VIMMED1(scale[i])), + mSimdInt32Ty); + dst[i] = FP_TO_UI( + FMUL(dst[i], VIMMED1(scale[i])), + mSimdInt32Ty); break; } - src[i] = BITCAST(src[i], mSimdInt32Ty);//, vMask[i]); - dst[i] = BITCAST(dst[i], mSimdInt32Ty); } LogicOpFunc(state.blendState.logicOpFunc, src, dst, result); @@ -676,10 +715,35 @@ // store results out for(uint32_t i = 0; i < 4; ++i) { + if (info.type[i] == SWR_TYPE_UNUSED) + { + continue; + } + // clear upper bits from PS output not in RT format after doing logic op result[i] = AND(result[i], vMask[i]); - STORE(BITCAST(result[i], mSimdFP32Ty), pResult, {i}); + switch (info.type[i]) { + default: + SWR_ASSERT(0, "Unsupported type for logic op\n"); + /* fallthrough */ + case SWR_TYPE_UINT: + case SWR_TYPE_SINT: + result[i] = BITCAST(result[i], mSimdFP32Ty); + break; + case SWR_TYPE_SNORM: + result[i] = SHL(result[i], C(32 - info.bpc[i])); + result[i] = ASHR(result[i], C(32 - info.bpc[i])); + result[i] = FMUL(SI_TO_FP(result[i], mSimdFP32Ty), + VIMMED1(1.0f / scale[i])); + break; + case SWR_TYPE_UNORM: + result[i] = FMUL(UI_TO_FP(result[i], mSimdFP32Ty), + VIMMED1(1.0f / scale[i])); + break; + } + + STORE(result[i], pResult, {i}); } } diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/blend_jit.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/blend_jit.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/blend_jit.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/blend_jit.h 2017-06-01 10:37:10.000000000 +0000 @@ -89,4 +89,41 @@ { return memcmp(this, &other, sizeof(BLEND_COMPILE_STATE)) == 0; } + + // Canonicalize state to reduce unnecessary JIT compiles + void Canonicalize() + { + if (!desc.alphaTestEnable) + { + alphaTestFormat = (ALPHA_TEST_FORMAT)0; + alphaTestFunction = (SWR_ZFUNCTION)0; + } + + if (!blendState.blendEnable) + { + blendState.sourceAlphaBlendFactor = (SWR_BLEND_FACTOR)0; + blendState.destAlphaBlendFactor = (SWR_BLEND_FACTOR)0; + blendState.sourceBlendFactor = (SWR_BLEND_FACTOR)0; + blendState.destBlendFactor = (SWR_BLEND_FACTOR)0; + blendState.colorBlendFunc = (SWR_BLEND_OP)0; + blendState.alphaBlendFunc = (SWR_BLEND_OP)0; + } + + if (!blendState.logicOpEnable) + { + blendState.logicOpFunc = (SWR_LOGIC_OP)0; + } + + if (!blendState.blendEnable && !blendState.logicOpEnable) + { + format = (SWR_FORMAT)0; + } + + if (!desc.independentAlphaBlendEnable) + { + blendState.sourceAlphaBlendFactor = (SWR_BLEND_FACTOR)0; + blendState.destAlphaBlendFactor = (SWR_BLEND_FACTOR)0; + blendState.alphaBlendFunc = (SWR_BLEND_OP)0; + } + } }; diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/builder.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/builder.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/builder.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/builder.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -30,49 +30,53 @@ #include "builder.h" -using namespace llvm; - -////////////////////////////////////////////////////////////////////////// -/// @brief Contructor for Builder. -/// @param pJitMgr - JitManager which contains modules, function passes, etc. -Builder::Builder(JitManager *pJitMgr) - : mpJitMgr(pJitMgr) +namespace SwrJit { - mVWidth = pJitMgr->mVWidth; + using namespace llvm; - mpIRBuilder = &pJitMgr->mBuilder; + ////////////////////////////////////////////////////////////////////////// + /// @brief Contructor for Builder. + /// @param pJitMgr - JitManager which contains modules, function passes, etc. + Builder::Builder(JitManager *pJitMgr) + : mpJitMgr(pJitMgr) + { + mVWidth = pJitMgr->mVWidth; - mVoidTy = Type::getVoidTy(pJitMgr->mContext); - mFP16Ty = Type::getHalfTy(pJitMgr->mContext); - mFP32Ty = Type::getFloatTy(pJitMgr->mContext); - mDoubleTy = Type::getDoubleTy(pJitMgr->mContext); - mInt1Ty = Type::getInt1Ty(pJitMgr->mContext); - mInt8Ty = Type::getInt8Ty(pJitMgr->mContext); - mInt16Ty = Type::getInt16Ty(pJitMgr->mContext); - mInt32Ty = Type::getInt32Ty(pJitMgr->mContext); - mInt8PtrTy = PointerType::get(mInt8Ty, 0); - mInt16PtrTy = PointerType::get(mInt16Ty, 0); - mInt32PtrTy = PointerType::get(mInt32Ty, 0); - mInt64Ty = Type::getInt64Ty(pJitMgr->mContext); - mV4FP32Ty = StructType::get(pJitMgr->mContext, std::vector(4, mFP32Ty), false); // vector4 float type (represented as structure) - mV4Int32Ty = StructType::get(pJitMgr->mContext, std::vector(4, mInt32Ty), false); // vector4 int type - mSimdInt1Ty = VectorType::get(mInt1Ty, mVWidth); - mSimdInt16Ty = VectorType::get(mInt16Ty, mVWidth); - mSimdInt32Ty = VectorType::get(mInt32Ty, mVWidth); - mSimdInt64Ty = VectorType::get(mInt64Ty, mVWidth); - mSimdFP16Ty = VectorType::get(mFP16Ty, mVWidth); - mSimdFP32Ty = VectorType::get(mFP32Ty, mVWidth); - mSimdVectorTy = StructType::get(pJitMgr->mContext, std::vector(4, mSimdFP32Ty), false); + mpIRBuilder = &pJitMgr->mBuilder; - if (sizeof(uint32_t*) == 4) - { - mIntPtrTy = mInt32Ty; - mSimdIntPtrTy = mSimdInt32Ty; - } - else - { - SWR_ASSERT(sizeof(uint32_t*) == 8); - mIntPtrTy = mInt64Ty; - mSimdIntPtrTy = mSimdInt64Ty; + mVoidTy = Type::getVoidTy(pJitMgr->mContext); + mFP16Ty = Type::getHalfTy(pJitMgr->mContext); + mFP32Ty = Type::getFloatTy(pJitMgr->mContext); + mDoubleTy = Type::getDoubleTy(pJitMgr->mContext); + mInt1Ty = Type::getInt1Ty(pJitMgr->mContext); + mInt8Ty = Type::getInt8Ty(pJitMgr->mContext); + mInt16Ty = Type::getInt16Ty(pJitMgr->mContext); + mInt32Ty = Type::getInt32Ty(pJitMgr->mContext); + mInt8PtrTy = PointerType::get(mInt8Ty, 0); + mInt16PtrTy = PointerType::get(mInt16Ty, 0); + mInt32PtrTy = PointerType::get(mInt32Ty, 0); + mInt64Ty = Type::getInt64Ty(pJitMgr->mContext); + mV4FP32Ty = StructType::get(pJitMgr->mContext, std::vector(4, mFP32Ty), false); // vector4 float type (represented as structure) + mV4Int32Ty = StructType::get(pJitMgr->mContext, std::vector(4, mInt32Ty), false); // vector4 int type + mSimdInt1Ty = VectorType::get(mInt1Ty, mVWidth); + mSimdInt16Ty = VectorType::get(mInt16Ty, mVWidth); + mSimdInt32Ty = VectorType::get(mInt32Ty, mVWidth); + mSimdInt64Ty = VectorType::get(mInt64Ty, mVWidth); + mSimdFP16Ty = VectorType::get(mFP16Ty, mVWidth); + mSimdFP32Ty = VectorType::get(mFP32Ty, mVWidth); + mSimdVectorTy = StructType::get(pJitMgr->mContext, std::vector(4, mSimdFP32Ty), false); + mSimdVectorTRTy = StructType::get(pJitMgr->mContext, std::vector(5, mSimdFP32Ty), false); + + if (sizeof(uint32_t*) == 4) + { + mIntPtrTy = mInt32Ty; + mSimdIntPtrTy = mSimdInt32Ty; + } + else + { + SWR_ASSERT(sizeof(uint32_t*) == 8); + mIntPtrTy = mInt64Ty; + mSimdIntPtrTy = mSimdInt64Ty; + } } } diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/builder.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/builder.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/builder.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/builder.h 2017-06-01 10:37:10.000000000 +0000 @@ -32,47 +32,49 @@ #include "JitManager.h" #include "common/formats.h" -using namespace llvm; - -struct Builder +namespace SwrJit { - Builder(JitManager *pJitMgr); - IRBuilder<>* IRB() { return mpIRBuilder; }; - JitManager* JM() { return mpJitMgr; } - - JitManager* mpJitMgr; - IRBuilder<>* mpIRBuilder; - - uint32_t mVWidth; - - // Built in types. - Type* mVoidTy; - Type* mInt1Ty; - Type* mInt8Ty; - Type* mInt16Ty; - Type* mInt32Ty; - Type* mInt64Ty; - Type* mIntPtrTy; - Type* mFP16Ty; - Type* mFP32Ty; - Type* mDoubleTy; - Type* mInt8PtrTy; - Type* mInt16PtrTy; - Type* mInt32PtrTy; - Type* mSimdFP16Ty; - Type* mSimdFP32Ty; - Type* mSimdInt1Ty; - Type* mSimdInt16Ty; - Type* mSimdInt32Ty; - Type* mSimdInt64Ty; - Type* mSimdIntPtrTy; - Type* mSimdVectorTy; - StructType* mV4FP32Ty; - StructType* mV4Int32Ty; + using namespace llvm; + struct Builder + { + Builder(JitManager *pJitMgr); + IRBuilder<>* IRB() { return mpIRBuilder; }; + JitManager* JM() { return mpJitMgr; } + + JitManager* mpJitMgr; + IRBuilder<>* mpIRBuilder; + + uint32_t mVWidth; + + // Built in types. + Type* mVoidTy; + Type* mInt1Ty; + Type* mInt8Ty; + Type* mInt16Ty; + Type* mInt32Ty; + Type* mInt64Ty; + Type* mIntPtrTy; + Type* mFP16Ty; + Type* mFP32Ty; + Type* mDoubleTy; + Type* mInt8PtrTy; + Type* mInt16PtrTy; + Type* mInt32PtrTy; + Type* mSimdFP16Ty; + Type* mSimdFP32Ty; + Type* mSimdInt1Ty; + Type* mSimdInt16Ty; + Type* mSimdInt32Ty; + Type* mSimdInt64Ty; + Type* mSimdIntPtrTy; + Type* mSimdVectorTy; + Type* mSimdVectorTRTy; + StructType* mV4FP32Ty; + StructType* mV4Int32Ty; #include "builder_gen.h" #include "builder_x86.h" #include "builder_misc.h" #include "builder_math.h" - -}; + }; +} diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/builder_misc.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/builder_misc.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/builder_misc.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/builder_misc.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -30,962 +30,1101 @@ #include "builder.h" #include "common/rdtsc_buckets.h" -void __cdecl CallPrint(const char* fmt, ...); +#include -////////////////////////////////////////////////////////////////////////// -/// @brief Convert an IEEE 754 32-bit single precision float to an -/// 16 bit float with 5 exponent bits and a variable -/// number of mantissa bits. -/// @param val - 32-bit float -/// @todo Maybe move this outside of this file into a header? -static uint16_t Convert32To16Float(float val) +namespace SwrJit { - uint32_t sign, exp, mant; - uint32_t roundBits; + void __cdecl CallPrint(const char* fmt, ...); - // Extract the sign, exponent, and mantissa - uint32_t uf = *(uint32_t*)&val; - sign = (uf & 0x80000000) >> 31; - exp = (uf & 0x7F800000) >> 23; - mant = uf & 0x007FFFFF; - - // Check for out of range - if (std::isnan(val)) - { - exp = 0x1F; - mant = 0x200; - sign = 1; // set the sign bit for NANs - } - else if (std::isinf(val)) - { - exp = 0x1f; - mant = 0x0; - } - else if (exp > (0x70 + 0x1E)) // Too big to represent -> max representable value - { - exp = 0x1E; - mant = 0x3FF; - } - else if ((exp <= 0x70) && (exp >= 0x66)) // It's a denorm - { - mant |= 0x00800000; - for (; exp <= 0x70; mant >>= 1, exp++) - ; - exp = 0; - mant = mant >> 13; - } - else if (exp < 0x66) // Too small to represent -> Zero - { - exp = 0; - mant = 0; - } - else + ////////////////////////////////////////////////////////////////////////// + /// @brief Convert an IEEE 754 32-bit single precision float to an + /// 16 bit float with 5 exponent bits and a variable + /// number of mantissa bits. + /// @param val - 32-bit float + /// @todo Maybe move this outside of this file into a header? + static uint16_t Convert32To16Float(float val) { - // Saves bits that will be shifted off for rounding - roundBits = mant & 0x1FFFu; - // convert exponent and mantissa to 16 bit format - exp = exp - 0x70; - mant = mant >> 13; + uint32_t sign, exp, mant; + uint32_t roundBits; - // Essentially RTZ, but round up if off by only 1 lsb - if (roundBits == 0x1FFFu) + // Extract the sign, exponent, and mantissa + uint32_t uf = *(uint32_t*)&val; + sign = (uf & 0x80000000) >> 31; + exp = (uf & 0x7F800000) >> 23; + mant = uf & 0x007FFFFF; + + // Check for out of range + if (std::isnan(val)) { - mant++; - // check for overflow - if ((mant & 0xC00u) != 0) - exp++; - // make sure only the needed bits are used - mant &= 0x3FF; + exp = 0x1F; + mant = 0x200; + sign = 1; // set the sign bit for NANs } - } + else if (std::isinf(val)) + { + exp = 0x1f; + mant = 0x0; + } + else if (exp > (0x70 + 0x1E)) // Too big to represent -> max representable value + { + exp = 0x1E; + mant = 0x3FF; + } + else if ((exp <= 0x70) && (exp >= 0x66)) // It's a denorm + { + mant |= 0x00800000; + for (; exp <= 0x70; mant >>= 1, exp++) + ; + exp = 0; + mant = mant >> 13; + } + else if (exp < 0x66) // Too small to represent -> Zero + { + exp = 0; + mant = 0; + } + else + { + // Saves bits that will be shifted off for rounding + roundBits = mant & 0x1FFFu; + // convert exponent and mantissa to 16 bit format + exp = exp - 0x70; + mant = mant >> 13; - uint32_t tmpVal = (sign << 15) | (exp << 10) | mant; - return (uint16_t)tmpVal; -} + // Essentially RTZ, but round up if off by only 1 lsb + if (roundBits == 0x1FFFu) + { + mant++; + // check for overflow + if ((mant & 0xC00u) != 0) + exp++; + // make sure only the needed bits are used + mant &= 0x3FF; + } + } -////////////////////////////////////////////////////////////////////////// -/// @brief Convert an IEEE 754 16-bit float to an 32-bit single precision -/// float -/// @param val - 16-bit float -/// @todo Maybe move this outside of this file into a header? -static float ConvertSmallFloatTo32(UINT val) -{ - UINT result; - if ((val & 0x7fff) == 0) - { - result = ((uint32_t)(val & 0x8000)) << 16; - } - else if ((val & 0x7c00) == 0x7c00) - { - result = ((val & 0x3ff) == 0) ? 0x7f800000 : 0x7fc00000; - result |= ((uint32_t)val & 0x8000) << 16; + uint32_t tmpVal = (sign << 15) | (exp << 10) | mant; + return (uint16_t)tmpVal; } - else + + ////////////////////////////////////////////////////////////////////////// + /// @brief Convert an IEEE 754 16-bit float to an 32-bit single precision + /// float + /// @param val - 16-bit float + /// @todo Maybe move this outside of this file into a header? + static float ConvertSmallFloatTo32(UINT val) { - uint32_t sign = (val & 0x8000) << 16; - uint32_t mant = (val & 0x3ff) << 13; - uint32_t exp = (val >> 10) & 0x1f; - if ((exp == 0) && (mant != 0)) // Adjust exponent and mantissa for denormals + UINT result; + if ((val & 0x7fff) == 0) + { + result = ((uint32_t)(val & 0x8000)) << 16; + } + else if ((val & 0x7c00) == 0x7c00) + { + result = ((val & 0x3ff) == 0) ? 0x7f800000 : 0x7fc00000; + result |= ((uint32_t)val & 0x8000) << 16; + } + else { - mant <<= 1; - while (mant < (0x400 << 13)) + uint32_t sign = (val & 0x8000) << 16; + uint32_t mant = (val & 0x3ff) << 13; + uint32_t exp = (val >> 10) & 0x1f; + if ((exp == 0) && (mant != 0)) // Adjust exponent and mantissa for denormals { - exp--; mant <<= 1; + while (mant < (0x400 << 13)) + { + exp--; + mant <<= 1; + } + mant &= (0x3ff << 13); } - mant &= (0x3ff << 13); + exp = ((exp - 15 + 127) & 0xff) << 23; + result = sign | exp | mant; } - exp = ((exp - 15 + 127) & 0xff) << 23; - result = sign | exp | mant; - } - return *(float*)&result; -} - -Constant *Builder::C(bool i) -{ - return ConstantInt::get(IRB()->getInt1Ty(), (i ? 1 : 0)); -} - -Constant *Builder::C(char i) -{ - return ConstantInt::get(IRB()->getInt8Ty(), i); -} - -Constant *Builder::C(uint8_t i) -{ - return ConstantInt::get(IRB()->getInt8Ty(), i); -} + return *(float*)&result; + } -Constant *Builder::C(int i) -{ - return ConstantInt::get(IRB()->getInt32Ty(), i); -} + Constant *Builder::C(bool i) + { + return ConstantInt::get(IRB()->getInt1Ty(), (i ? 1 : 0)); + } -Constant *Builder::C(int64_t i) -{ - return ConstantInt::get(IRB()->getInt64Ty(), i); -} + Constant *Builder::C(char i) + { + return ConstantInt::get(IRB()->getInt8Ty(), i); + } -Constant *Builder::C(uint16_t i) -{ - return ConstantInt::get(mInt16Ty,i); -} + Constant *Builder::C(uint8_t i) + { + return ConstantInt::get(IRB()->getInt8Ty(), i); + } -Constant *Builder::C(uint32_t i) -{ - return ConstantInt::get(IRB()->getInt32Ty(), i); -} + Constant *Builder::C(int i) + { + return ConstantInt::get(IRB()->getInt32Ty(), i); + } -Constant *Builder::C(float i) -{ - return ConstantFP::get(IRB()->getFloatTy(), i); -} + Constant *Builder::C(int64_t i) + { + return ConstantInt::get(IRB()->getInt64Ty(), i); + } -Constant *Builder::PRED(bool pred) -{ - return ConstantInt::get(IRB()->getInt1Ty(), (pred ? 1 : 0)); -} + Constant *Builder::C(uint16_t i) + { + return ConstantInt::get(mInt16Ty,i); + } -Value *Builder::VIMMED1(int i) -{ - return ConstantVector::getSplat(mVWidth, cast(C(i))); -} + Constant *Builder::C(uint32_t i) + { + return ConstantInt::get(IRB()->getInt32Ty(), i); + } -Value *Builder::VIMMED1(uint32_t i) -{ - return ConstantVector::getSplat(mVWidth, cast(C(i))); -} + Constant *Builder::C(float i) + { + return ConstantFP::get(IRB()->getFloatTy(), i); + } -Value *Builder::VIMMED1(float i) -{ - return ConstantVector::getSplat(mVWidth, cast(C(i))); -} + Constant *Builder::PRED(bool pred) + { + return ConstantInt::get(IRB()->getInt1Ty(), (pred ? 1 : 0)); + } -Value *Builder::VIMMED1(bool i) -{ - return ConstantVector::getSplat(mVWidth, cast(C(i))); -} + Value *Builder::VIMMED1(int i) + { + return ConstantVector::getSplat(mVWidth, cast(C(i))); + } -Value *Builder::VUNDEF_IPTR() -{ - return UndefValue::get(VectorType::get(mInt32PtrTy,mVWidth)); -} + Value *Builder::VIMMED1(uint32_t i) + { + return ConstantVector::getSplat(mVWidth, cast(C(i))); + } -Value *Builder::VUNDEF_I() -{ - return UndefValue::get(VectorType::get(mInt32Ty, mVWidth)); -} + Value *Builder::VIMMED1(float i) + { + return ConstantVector::getSplat(mVWidth, cast(C(i))); + } -Value *Builder::VUNDEF(Type *ty, uint32_t size) -{ - return UndefValue::get(VectorType::get(ty, size)); -} + Value *Builder::VIMMED1(bool i) + { + return ConstantVector::getSplat(mVWidth, cast(C(i))); + } -Value *Builder::VUNDEF_F() -{ - return UndefValue::get(VectorType::get(mFP32Ty, mVWidth)); -} + Value *Builder::VUNDEF_IPTR() + { + return UndefValue::get(VectorType::get(mInt32PtrTy,mVWidth)); + } -Value *Builder::VUNDEF(Type* t) -{ - return UndefValue::get(VectorType::get(t, mVWidth)); -} + Value *Builder::VUNDEF_I() + { + return UndefValue::get(VectorType::get(mInt32Ty, mVWidth)); + } -#if HAVE_LLVM == 0x306 -Value *Builder::VINSERT(Value *vec, Value *val, uint64_t index) -{ - return VINSERT(vec, val, C((int64_t)index)); -} -#endif + Value *Builder::VUNDEF(Type *ty, uint32_t size) + { + return UndefValue::get(VectorType::get(ty, size)); + } -Value *Builder::VBROADCAST(Value *src) -{ - // check if src is already a vector - if (src->getType()->isVectorTy()) + Value *Builder::VUNDEF_F() { - return src; + return UndefValue::get(VectorType::get(mFP32Ty, mVWidth)); } - return VECTOR_SPLAT(mVWidth, src); -} + Value *Builder::VUNDEF(Type* t) + { + return UndefValue::get(VectorType::get(t, mVWidth)); + } -uint32_t Builder::IMMED(Value* v) -{ - SWR_ASSERT(isa(v)); - ConstantInt *pValConst = cast(v); - return pValConst->getZExtValue(); -} + #if HAVE_LLVM == 0x306 + Value *Builder::VINSERT(Value *vec, Value *val, uint64_t index) + { + return VINSERT(vec, val, C((int64_t)index)); + } + #endif -int32_t Builder::S_IMMED(Value* v) -{ - SWR_ASSERT(isa(v)); - ConstantInt *pValConst = cast(v); - return pValConst->getSExtValue(); -} + Value *Builder::VBROADCAST(Value *src) + { + // check if src is already a vector + if (src->getType()->isVectorTy()) + { + return src; + } -Value *Builder::GEP(Value* ptr, const std::initializer_list &indexList) -{ - std::vector indices; - for (auto i : indexList) - indices.push_back(i); - return GEPA(ptr, indices); -} + return VECTOR_SPLAT(mVWidth, src); + } -Value *Builder::GEP(Value* ptr, const std::initializer_list &indexList) -{ - std::vector indices; - for (auto i : indexList) - indices.push_back(C(i)); - return GEPA(ptr, indices); -} + uint32_t Builder::IMMED(Value* v) + { + SWR_ASSERT(isa(v)); + ConstantInt *pValConst = cast(v); + return pValConst->getZExtValue(); + } -LoadInst *Builder::LOAD(Value *basePtr, const std::initializer_list &indices, const llvm::Twine& name) -{ - std::vector valIndices; - for (auto i : indices) - valIndices.push_back(C(i)); - return LOAD(GEPA(basePtr, valIndices), name); -} + int32_t Builder::S_IMMED(Value* v) + { + SWR_ASSERT(isa(v)); + ConstantInt *pValConst = cast(v); + return pValConst->getSExtValue(); + } -LoadInst *Builder::LOADV(Value *basePtr, const std::initializer_list &indices, const llvm::Twine& name) -{ - std::vector valIndices; - for (auto i : indices) - valIndices.push_back(i); - return LOAD(GEPA(basePtr, valIndices), name); -} + Value *Builder::GEP(Value* ptr, const std::initializer_list &indexList) + { + std::vector indices; + for (auto i : indexList) + indices.push_back(i); + return GEPA(ptr, indices); + } -StoreInst *Builder::STORE(Value *val, Value *basePtr, const std::initializer_list &indices) -{ - std::vector valIndices; - for (auto i : indices) - valIndices.push_back(C(i)); - return STORE(val, GEPA(basePtr, valIndices)); -} + Value *Builder::GEP(Value* ptr, const std::initializer_list &indexList) + { + std::vector indices; + for (auto i : indexList) + indices.push_back(C(i)); + return GEPA(ptr, indices); + } -StoreInst *Builder::STOREV(Value *val, Value *basePtr, const std::initializer_list &indices) -{ - std::vector valIndices; - for (auto i : indices) - valIndices.push_back(i); - return STORE(val, GEPA(basePtr, valIndices)); -} + LoadInst *Builder::LOAD(Value *basePtr, const std::initializer_list &indices, const llvm::Twine& name) + { + std::vector valIndices; + for (auto i : indices) + valIndices.push_back(C(i)); + return LOAD(GEPA(basePtr, valIndices), name); + } -CallInst *Builder::CALL(Value *Callee, const std::initializer_list &argsList) -{ - std::vector args; - for (auto arg : argsList) - args.push_back(arg); - return CALLA(Callee, args); -} + LoadInst *Builder::LOADV(Value *basePtr, const std::initializer_list &indices, const llvm::Twine& name) + { + std::vector valIndices; + for (auto i : indices) + valIndices.push_back(i); + return LOAD(GEPA(basePtr, valIndices), name); + } -#if HAVE_LLVM > 0x306 -CallInst *Builder::CALL(Value *Callee, Value* arg) -{ - std::vector args; - args.push_back(arg); - return CALLA(Callee, args); -} + StoreInst *Builder::STORE(Value *val, Value *basePtr, const std::initializer_list &indices) + { + std::vector valIndices; + for (auto i : indices) + valIndices.push_back(C(i)); + return STORE(val, GEPA(basePtr, valIndices)); + } -CallInst *Builder::CALL2(Value *Callee, Value* arg1, Value* arg2) -{ - std::vector args; - args.push_back(arg1); - args.push_back(arg2); - return CALLA(Callee, args); -} + StoreInst *Builder::STOREV(Value *val, Value *basePtr, const std::initializer_list &indices) + { + std::vector valIndices; + for (auto i : indices) + valIndices.push_back(i); + return STORE(val, GEPA(basePtr, valIndices)); + } -CallInst *Builder::CALL3(Value *Callee, Value* arg1, Value* arg2, Value* arg3) -{ - std::vector args; - args.push_back(arg1); - args.push_back(arg2); - args.push_back(arg3); - return CALLA(Callee, args); -} -#endif + CallInst *Builder::CALL(Value *Callee, const std::initializer_list &argsList) + { + std::vector args; + for (auto arg : argsList) + args.push_back(arg); + return CALLA(Callee, args); + } -Value *Builder::VRCP(Value *va) -{ - return FDIV(VIMMED1(1.0f), va); // 1 / a -} + #if HAVE_LLVM > 0x306 + CallInst *Builder::CALL(Value *Callee, Value* arg) + { + std::vector args; + args.push_back(arg); + return CALLA(Callee, args); + } -Value *Builder::VPLANEPS(Value* vA, Value* vB, Value* vC, Value* &vX, Value* &vY) -{ - Value* vOut = FMADDPS(vA, vX, vC); - vOut = FMADDPS(vB, vY, vOut); - return vOut; -} + CallInst *Builder::CALL2(Value *Callee, Value* arg1, Value* arg2) + { + std::vector args; + args.push_back(arg1); + args.push_back(arg2); + return CALLA(Callee, args); + } -////////////////////////////////////////////////////////////////////////// -/// @brief Generate an i32 masked load operation in LLVM IR. If not -/// supported on the underlying platform, emulate it with float masked load -/// @param src - base address pointer for the load -/// @param vMask - SIMD wide mask that controls whether to access memory load 0 -Value *Builder::MASKLOADD(Value* src,Value* mask) -{ - Value* vResult; - // use avx2 gather instruction is available - if(JM()->mArch.AVX2()) - { - Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx2_maskload_d_256); - vResult = CALL(func,{src,mask}); - } - else - { - // maskload intrinsic expects integer mask operand in llvm >= 3.8 -#if (LLVM_VERSION_MAJOR > 3) || (LLVM_VERSION_MAJOR == 3 && LLVM_VERSION_MINOR >= 8) - mask = BITCAST(mask,VectorType::get(mInt32Ty,mVWidth)); -#else - mask = BITCAST(mask,VectorType::get(mFP32Ty,mVWidth)); -#endif - Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule,Intrinsic::x86_avx_maskload_ps_256); - vResult = BITCAST(CALL(func,{src,mask}), VectorType::get(mInt32Ty,mVWidth)); + CallInst *Builder::CALL3(Value *Callee, Value* arg1, Value* arg2, Value* arg3) + { + std::vector args; + args.push_back(arg1); + args.push_back(arg2); + args.push_back(arg3); + return CALLA(Callee, args); } - return vResult; -} + #endif -////////////////////////////////////////////////////////////////////////// -/// @brief insert a JIT call to CallPrint -/// - outputs formatted string to both stdout and VS output window -/// - DEBUG builds only -/// Usage example: -/// PRINT("index %d = 0x%p\n",{C(lane), pIndex}); -/// where C(lane) creates a constant value to print, and pIndex is the Value* -/// result from a GEP, printing out the pointer to memory -/// @param printStr - constant string to print, which includes format specifiers -/// @param printArgs - initializer list of Value*'s to print to std out -CallInst *Builder::PRINT(const std::string &printStr,const std::initializer_list &printArgs) -{ - // push the arguments to CallPrint into a vector - std::vector printCallArgs; - // save room for the format string. we still need to modify it for vectors - printCallArgs.resize(1); + Value *Builder::VRCP(Value *va) + { + return FDIV(VIMMED1(1.0f), va); // 1 / a + } - // search through the format string for special processing - size_t pos = 0; - std::string tempStr(printStr); - pos = tempStr.find('%', pos); - auto v = printArgs.begin(); + Value *Builder::VPLANEPS(Value* vA, Value* vB, Value* vC, Value* &vX, Value* &vY) + { + Value* vOut = FMADDPS(vA, vX, vC); + vOut = FMADDPS(vB, vY, vOut); + return vOut; + } - while ((pos != std::string::npos) && (v != printArgs.end())) + ////////////////////////////////////////////////////////////////////////// + /// @brief Generate an i32 masked load operation in LLVM IR. If not + /// supported on the underlying platform, emulate it with float masked load + /// @param src - base address pointer for the load + /// @param vMask - SIMD wide mask that controls whether to access memory load 0 + Value *Builder::MASKLOADD(Value* src,Value* mask) { - Value* pArg = *v; - Type* pType = pArg->getType(); + Value* vResult; + // use avx2 gather instruction is available + if(JM()->mArch.AVX2()) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx2_maskload_d_256); + vResult = CALL(func,{src,mask}); + } + else + { + // maskload intrinsic expects integer mask operand in llvm >= 3.8 + #if (LLVM_VERSION_MAJOR > 3) || (LLVM_VERSION_MAJOR == 3 && LLVM_VERSION_MINOR >= 8) + mask = BITCAST(mask,VectorType::get(mInt32Ty,mVWidth)); + #else + mask = BITCAST(mask,VectorType::get(mFP32Ty,mVWidth)); + #endif + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule,Intrinsic::x86_avx_maskload_ps_256); + vResult = BITCAST(CALL(func,{src,mask}), VectorType::get(mInt32Ty,mVWidth)); + } + return vResult; + } + + ////////////////////////////////////////////////////////////////////////// + /// @brief insert a JIT call to CallPrint + /// - outputs formatted string to both stdout and VS output window + /// - DEBUG builds only + /// Usage example: + /// PRINT("index %d = 0x%p\n",{C(lane), pIndex}); + /// where C(lane) creates a constant value to print, and pIndex is the Value* + /// result from a GEP, printing out the pointer to memory + /// @param printStr - constant string to print, which includes format specifiers + /// @param printArgs - initializer list of Value*'s to print to std out + CallInst *Builder::PRINT(const std::string &printStr,const std::initializer_list &printArgs) + { + // push the arguments to CallPrint into a vector + std::vector printCallArgs; + // save room for the format string. we still need to modify it for vectors + printCallArgs.resize(1); + + // search through the format string for special processing + size_t pos = 0; + std::string tempStr(printStr); + pos = tempStr.find('%', pos); + auto v = printArgs.begin(); - if (pType->isVectorTy()) + while ((pos != std::string::npos) && (v != printArgs.end())) { - Type* pContainedType = pType->getContainedType(0); + Value* pArg = *v; + Type* pType = pArg->getType(); - if (toupper(tempStr[pos + 1]) == 'X') + if (pType->isVectorTy()) { - tempStr[pos] = '0'; - tempStr[pos + 1] = 'x'; - tempStr.insert(pos + 2, "%08X "); - pos += 7; + Type* pContainedType = pType->getContainedType(0); - printCallArgs.push_back(VEXTRACT(pArg, C(0))); + if (toupper(tempStr[pos + 1]) == 'X') + { + tempStr[pos] = '0'; + tempStr[pos + 1] = 'x'; + tempStr.insert(pos + 2, "%08X "); + pos += 7; + + printCallArgs.push_back(VEXTRACT(pArg, C(0))); + + std::string vectorFormatStr; + for (uint32_t i = 1; i < pType->getVectorNumElements(); ++i) + { + vectorFormatStr += "0x%08X "; + printCallArgs.push_back(VEXTRACT(pArg, C(i))); + } - std::string vectorFormatStr; - for (uint32_t i = 1; i < pType->getVectorNumElements(); ++i) + tempStr.insert(pos, vectorFormatStr); + pos += vectorFormatStr.size(); + } + else if ((tempStr[pos + 1] == 'f') && (pContainedType->isFloatTy())) + { + uint32_t i = 0; + for (; i < (pArg->getType()->getVectorNumElements()) - 1; i++) + { + tempStr.insert(pos, std::string("%f ")); + pos += 3; + printCallArgs.push_back(FP_EXT(VEXTRACT(pArg, C(i)), Type::getDoubleTy(JM()->mContext))); + } + printCallArgs.push_back(FP_EXT(VEXTRACT(pArg, C(i)), Type::getDoubleTy(JM()->mContext))); + } + else if ((tempStr[pos + 1] == 'd') && (pContainedType->isIntegerTy())) { - vectorFormatStr += "0x%08X "; + uint32_t i = 0; + for (; i < (pArg->getType()->getVectorNumElements()) - 1; i++) + { + tempStr.insert(pos, std::string("%d ")); + pos += 3; + printCallArgs.push_back(VEXTRACT(pArg, C(i))); + } printCallArgs.push_back(VEXTRACT(pArg, C(i))); } - - tempStr.insert(pos, vectorFormatStr); - pos += vectorFormatStr.size(); } - else if ((tempStr[pos + 1] == 'f') && (pContainedType->isFloatTy())) + else { - uint32_t i = 0; - for (; i < (pArg->getType()->getVectorNumElements()) - 1; i++) + if (toupper(tempStr[pos + 1]) == 'X') { - tempStr.insert(pos, std::string("%f ")); + tempStr[pos] = '0'; + tempStr.insert(pos + 1, "x%08"); + printCallArgs.push_back(pArg); pos += 3; - printCallArgs.push_back(FP_EXT(VEXTRACT(pArg, C(i)), Type::getDoubleTy(JM()->mContext))); } - printCallArgs.push_back(FP_EXT(VEXTRACT(pArg, C(i)), Type::getDoubleTy(JM()->mContext))); - } - else if ((tempStr[pos + 1] == 'd') && (pContainedType->isIntegerTy())) - { - uint32_t i = 0; - for (; i < (pArg->getType()->getVectorNumElements()) - 1; i++) + // for %f we need to cast float Values to doubles so that they print out correctly + else if ((tempStr[pos + 1] == 'f') && (pType->isFloatTy())) { - tempStr.insert(pos, std::string("%d ")); - pos += 3; - printCallArgs.push_back(VEXTRACT(pArg, C(i))); + printCallArgs.push_back(FP_EXT(pArg, Type::getDoubleTy(JM()->mContext))); + pos++; + } + else + { + printCallArgs.push_back(pArg); } - printCallArgs.push_back(VEXTRACT(pArg, C(i))); } + + // advance to the next arguement + v++; + pos = tempStr.find('%', ++pos); } - else + + // create global variable constant string + Constant *constString = ConstantDataArray::getString(JM()->mContext,tempStr,true); + GlobalVariable *gvPtr = new GlobalVariable(constString->getType(),true,GlobalValue::InternalLinkage,constString,"printStr"); + JM()->mpCurrentModule->getGlobalList().push_back(gvPtr); + + // get a pointer to the first character in the constant string array + std::vector geplist{C(0),C(0)}; + #if HAVE_LLVM == 0x306 + Constant *strGEP = ConstantExpr::getGetElementPtr(gvPtr,geplist,false); + #else + Constant *strGEP = ConstantExpr::getGetElementPtr(nullptr, gvPtr,geplist,false); + #endif + + // insert the pointer to the format string in the argument vector + printCallArgs[0] = strGEP; + + // get pointer to CallPrint function and insert decl into the module if needed + std::vector args; + args.push_back(PointerType::get(mInt8Ty,0)); + FunctionType* callPrintTy = FunctionType::get(Type::getVoidTy(JM()->mContext),args,true); + Function *callPrintFn = cast(JM()->mpCurrentModule->getOrInsertFunction("CallPrint", callPrintTy)); + + // if we haven't yet added the symbol to the symbol table + if((sys::DynamicLibrary::SearchForAddressOfSymbol("CallPrint")) == nullptr) { - if (toupper(tempStr[pos + 1]) == 'X') - { - tempStr[pos] = '0'; - tempStr.insert(pos + 1, "x%08"); - printCallArgs.push_back(pArg); - pos += 3; - } - // for %f we need to cast float Values to doubles so that they print out correctly - else if ((tempStr[pos + 1] == 'f') && (pType->isFloatTy())) - { - printCallArgs.push_back(FP_EXT(pArg, Type::getDoubleTy(JM()->mContext))); - pos++; - } - else - { - printCallArgs.push_back(pArg); - } + sys::DynamicLibrary::AddSymbol("CallPrint", (void *)&CallPrint); } - // advance to the next arguement - v++; - pos = tempStr.find('%', ++pos); + // insert a call to CallPrint + return CALLA(callPrintFn,printCallArgs); } - // create global variable constant string - Constant *constString = ConstantDataArray::getString(JM()->mContext,tempStr,true); - GlobalVariable *gvPtr = new GlobalVariable(constString->getType(),true,GlobalValue::InternalLinkage,constString,"printStr"); - JM()->mpCurrentModule->getGlobalList().push_back(gvPtr); + ////////////////////////////////////////////////////////////////////////// + /// @brief Wrapper around PRINT with initializer list. + CallInst* Builder::PRINT(const std::string &printStr) + { + return PRINT(printStr, {}); + } - // get a pointer to the first character in the constant string array - std::vector geplist{C(0),C(0)}; -#if HAVE_LLVM == 0x306 - Constant *strGEP = ConstantExpr::getGetElementPtr(gvPtr,geplist,false); -#else - Constant *strGEP = ConstantExpr::getGetElementPtr(nullptr, gvPtr,geplist,false); -#endif + ////////////////////////////////////////////////////////////////////////// + /// @brief Generate a masked gather operation in LLVM IR. If not + /// supported on the underlying platform, emulate it with loads + /// @param vSrc - SIMD wide value that will be loaded if mask is invalid + /// @param pBase - Int8* base VB address pointer value + /// @param vIndices - SIMD wide value of VB byte offsets + /// @param vMask - SIMD wide mask that controls whether to access memory or the src values + /// @param scale - value to scale indices by + Value *Builder::GATHERPS(Value* vSrc, Value* pBase, Value* vIndices, Value* vMask, Value* scale) + { + Value* vGather; - // insert the pointer to the format string in the argument vector - printCallArgs[0] = strGEP; + // use avx2 gather instruction if available + if(JM()->mArch.AVX2()) + { + // force mask to , required by vgather + vMask = BITCAST(vMask, mSimdFP32Ty); + vGather = VGATHERPS(vSrc,pBase,vIndices,vMask,scale); + } + else + { + Value* pStack = STACKSAVE(); - // get pointer to CallPrint function and insert decl into the module if needed - std::vector args; - args.push_back(PointerType::get(mInt8Ty,0)); - FunctionType* callPrintTy = FunctionType::get(Type::getVoidTy(JM()->mContext),args,true); - Function *callPrintFn = cast(JM()->mpCurrentModule->getOrInsertFunction("CallPrint", callPrintTy)); + // store vSrc on the stack. this way we can select between a valid load address and the vSrc address + Value* vSrcPtr = ALLOCA(vSrc->getType()); + STORE(vSrc, vSrcPtr); + + vGather = VUNDEF_F(); + Value *vScaleVec = VBROADCAST(Z_EXT(scale,mInt32Ty)); + Value *vOffsets = MUL(vIndices,vScaleVec); + Value *mask = MASK(vMask); + for(uint32_t i = 0; i < mVWidth; ++i) + { + // single component byte index + Value *offset = VEXTRACT(vOffsets,C(i)); + // byte pointer to component + Value *loadAddress = GEP(pBase,offset); + loadAddress = BITCAST(loadAddress,PointerType::get(mFP32Ty,0)); + // pointer to the value to load if we're masking off a component + Value *maskLoadAddress = GEP(vSrcPtr,{C(0), C(i)}); + Value *selMask = VEXTRACT(mask,C(i)); + // switch in a safe address to load if we're trying to access a vertex + Value *validAddress = SELECT(selMask, loadAddress, maskLoadAddress); + Value *val = LOAD(validAddress); + vGather = VINSERT(vGather,val,C(i)); + } + STACKRESTORE(pStack); + } - // if we haven't yet added the symbol to the symbol table - if((sys::DynamicLibrary::SearchForAddressOfSymbol("CallPrint")) == nullptr) - { - sys::DynamicLibrary::AddSymbol("CallPrint", (void *)&CallPrint); + return vGather; } - // insert a call to CallPrint - return CALLA(callPrintFn,printCallArgs); -} + ////////////////////////////////////////////////////////////////////////// + /// @brief Generate a masked gather operation in LLVM IR. If not + /// supported on the underlying platform, emulate it with loads + /// @param vSrc - SIMD wide value that will be loaded if mask is invalid + /// @param pBase - Int8* base VB address pointer value + /// @param vIndices - SIMD wide value of VB byte offsets + /// @param vMask - SIMD wide mask that controls whether to access memory or the src values + /// @param scale - value to scale indices by + Value *Builder::GATHERDD(Value* vSrc, Value* pBase, Value* vIndices, Value* vMask, Value* scale) + { + Value* vGather; -////////////////////////////////////////////////////////////////////////// -/// @brief Wrapper around PRINT with initializer list. -CallInst* Builder::PRINT(const std::string &printStr) -{ - return PRINT(printStr, {}); -} + // use avx2 gather instruction if available + if(JM()->mArch.AVX2()) + { + vGather = VGATHERDD(vSrc, pBase, vIndices, vMask, scale); + } + else + { + Value* pStack = STACKSAVE(); -////////////////////////////////////////////////////////////////////////// -/// @brief Generate a masked gather operation in LLVM IR. If not -/// supported on the underlying platform, emulate it with loads -/// @param vSrc - SIMD wide value that will be loaded if mask is invalid -/// @param pBase - Int8* base VB address pointer value -/// @param vIndices - SIMD wide value of VB byte offsets -/// @param vMask - SIMD wide mask that controls whether to access memory or the src values -/// @param scale - value to scale indices by -Value *Builder::GATHERPS(Value* vSrc, Value* pBase, Value* vIndices, Value* vMask, Value* scale) -{ - Value* vGather; + // store vSrc on the stack. this way we can select between a valid load address and the vSrc address + Value* vSrcPtr = ALLOCA(vSrc->getType()); + STORE(vSrc, vSrcPtr); + + vGather = VUNDEF_I(); + Value *vScaleVec = VBROADCAST(Z_EXT(scale, mInt32Ty)); + Value *vOffsets = MUL(vIndices, vScaleVec); + Value *mask = MASK(vMask); + for(uint32_t i = 0; i < mVWidth; ++i) + { + // single component byte index + Value *offset = VEXTRACT(vOffsets, C(i)); + // byte pointer to component + Value *loadAddress = GEP(pBase, offset); + loadAddress = BITCAST(loadAddress, PointerType::get(mInt32Ty, 0)); + // pointer to the value to load if we're masking off a component + Value *maskLoadAddress = GEP(vSrcPtr, {C(0), C(i)}); + Value *selMask = VEXTRACT(mask, C(i)); + // switch in a safe address to load if we're trying to access a vertex + Value *validAddress = SELECT(selMask, loadAddress, maskLoadAddress); + Value *val = LOAD(validAddress, C(0)); + vGather = VINSERT(vGather, val, C(i)); + } - // use avx2 gather instruction if available - if(JM()->mArch.AVX2()) - { - // force mask to , required by vgather - vMask = BITCAST(vMask, mSimdFP32Ty); - vGather = VGATHERPS(vSrc,pBase,vIndices,vMask,scale); - } - else - { - Value* pStack = STACKSAVE(); - - // store vSrc on the stack. this way we can select between a valid load address and the vSrc address - Value* vSrcPtr = ALLOCA(vSrc->getType()); - STORE(vSrc, vSrcPtr); - - vGather = VUNDEF_F(); - Value *vScaleVec = VBROADCAST(Z_EXT(scale,mInt32Ty)); - Value *vOffsets = MUL(vIndices,vScaleVec); - Value *mask = MASK(vMask); - for(uint32_t i = 0; i < mVWidth; ++i) - { - // single component byte index - Value *offset = VEXTRACT(vOffsets,C(i)); - // byte pointer to component - Value *loadAddress = GEP(pBase,offset); - loadAddress = BITCAST(loadAddress,PointerType::get(mFP32Ty,0)); - // pointer to the value to load if we're masking off a component - Value *maskLoadAddress = GEP(vSrcPtr,{C(0), C(i)}); - Value *selMask = VEXTRACT(mask,C(i)); - // switch in a safe address to load if we're trying to access a vertex - Value *validAddress = SELECT(selMask, loadAddress, maskLoadAddress); - Value *val = LOAD(validAddress); - vGather = VINSERT(vGather,val,C(i)); + STACKRESTORE(pStack); } - STACKRESTORE(pStack); + return vGather; } - return vGather; -} + ////////////////////////////////////////////////////////////////////////// + /// @brief Generate a masked gather operation in LLVM IR. If not + /// supported on the underlying platform, emulate it with loads + /// @param vSrc - SIMD wide value that will be loaded if mask is invalid + /// @param pBase - Int8* base VB address pointer value + /// @param vIndices - SIMD wide value of VB byte offsets + /// @param vMask - SIMD wide mask that controls whether to access memory or the src values + /// @param scale - value to scale indices by + Value *Builder::GATHERPD(Value* vSrc, Value* pBase, Value* vIndices, Value* vMask, Value* scale) + { + Value* vGather; -////////////////////////////////////////////////////////////////////////// -/// @brief Generate a masked gather operation in LLVM IR. If not -/// supported on the underlying platform, emulate it with loads -/// @param vSrc - SIMD wide value that will be loaded if mask is invalid -/// @param pBase - Int8* base VB address pointer value -/// @param vIndices - SIMD wide value of VB byte offsets -/// @param vMask - SIMD wide mask that controls whether to access memory or the src values -/// @param scale - value to scale indices by -Value *Builder::GATHERDD(Value* vSrc, Value* pBase, Value* vIndices, Value* vMask, Value* scale) -{ - Value* vGather; + // use avx2 gather instruction if available + if(JM()->mArch.AVX2()) + { + vGather = VGATHERPD(vSrc, pBase, vIndices, vMask, scale); + } + else + { + Value* pStack = STACKSAVE(); - // use avx2 gather instruction if available - if(JM()->mArch.AVX2()) - { - vGather = VGATHERDD(vSrc, pBase, vIndices, vMask, scale); + // store vSrc on the stack. this way we can select between a valid load address and the vSrc address + Value* vSrcPtr = ALLOCA(vSrc->getType()); + STORE(vSrc, vSrcPtr); + + vGather = UndefValue::get(VectorType::get(mDoubleTy, 4)); + Value *vScaleVec = VECTOR_SPLAT(4, Z_EXT(scale,mInt32Ty)); + Value *vOffsets = MUL(vIndices,vScaleVec); + Value *mask = MASK(vMask); + for(uint32_t i = 0; i < mVWidth/2; ++i) + { + // single component byte index + Value *offset = VEXTRACT(vOffsets,C(i)); + // byte pointer to component + Value *loadAddress = GEP(pBase,offset); + loadAddress = BITCAST(loadAddress,PointerType::get(mDoubleTy,0)); + // pointer to the value to load if we're masking off a component + Value *maskLoadAddress = GEP(vSrcPtr,{C(0), C(i)}); + Value *selMask = VEXTRACT(mask,C(i)); + // switch in a safe address to load if we're trying to access a vertex + Value *validAddress = SELECT(selMask, loadAddress, maskLoadAddress); + Value *val = LOAD(validAddress); + vGather = VINSERT(vGather,val,C(i)); + } + STACKRESTORE(pStack); + } + return vGather; } - else + + ////////////////////////////////////////////////////////////////////////// + /// @brief convert x86 mask to llvm mask + Value* Builder::MASK(Value* vmask) { - Value* pStack = STACKSAVE(); + Value* src = BITCAST(vmask, mSimdInt32Ty); + return ICMP_SLT(src, VIMMED1(0)); + } - // store vSrc on the stack. this way we can select between a valid load address and the vSrc address - Value* vSrcPtr = ALLOCA(vSrc->getType()); - STORE(vSrc, vSrcPtr); + ////////////////////////////////////////////////////////////////////////// + /// @brief convert llvm mask to x86 mask + Value* Builder::VMASK(Value* mask) + { + return S_EXT(mask, mSimdInt32Ty); + } - vGather = VUNDEF_I(); - Value *vScaleVec = VBROADCAST(Z_EXT(scale, mInt32Ty)); - Value *vOffsets = MUL(vIndices, vScaleVec); - Value *mask = MASK(vMask); - for(uint32_t i = 0; i < mVWidth; ++i) + ////////////////////////////////////////////////////////////////////////// + /// @brief Generate a VPSHUFB operation in LLVM IR. If not + /// supported on the underlying platform, emulate it + /// @param a - 256bit SIMD(32x8bit) of 8bit integer values + /// @param b - 256bit SIMD(32x8bit) of 8bit integer mask values + /// Byte masks in lower 128 lane of b selects 8 bit values from lower + /// 128bits of a, and vice versa for the upper lanes. If the mask + /// value is negative, '0' is inserted. + Value *Builder::PSHUFB(Value* a, Value* b) + { + Value* res; + // use avx2 pshufb instruction if available + if(JM()->mArch.AVX2()) { - // single component byte index - Value *offset = VEXTRACT(vOffsets, C(i)); - // byte pointer to component - Value *loadAddress = GEP(pBase, offset); - loadAddress = BITCAST(loadAddress, PointerType::get(mInt32Ty, 0)); - // pointer to the value to load if we're masking off a component - Value *maskLoadAddress = GEP(vSrcPtr, {C(0), C(i)}); - Value *selMask = VEXTRACT(mask, C(i)); - // switch in a safe address to load if we're trying to access a vertex - Value *validAddress = SELECT(selMask, loadAddress, maskLoadAddress); - Value *val = LOAD(validAddress, C(0)); - vGather = VINSERT(vGather, val, C(i)); + res = VPSHUFB(a, b); } + else + { + Constant* cB = dyn_cast(b); + // number of 8 bit elements in b + uint32_t numElms = cast(cB->getType())->getNumElements(); + // output vector + Value* vShuf = UndefValue::get(VectorType::get(mInt8Ty, numElms)); + + // insert an 8 bit value from the high and low lanes of a per loop iteration + numElms /= 2; + for(uint32_t i = 0; i < numElms; i++) + { + ConstantInt* cLow128b = cast(cB->getAggregateElement(i)); + ConstantInt* cHigh128b = cast(cB->getAggregateElement(i + numElms)); - STACKRESTORE(pStack); - } - return vGather; -} + // extract values from constant mask + char valLow128bLane = (char)(cLow128b->getSExtValue()); + char valHigh128bLane = (char)(cHigh128b->getSExtValue()); + + Value* insertValLow128b; + Value* insertValHigh128b; + + // if the mask value is negative, insert a '0' in the respective output position + // otherwise, lookup the value at mask position (bits 3..0 of the respective mask byte) in a and insert in output vector + insertValLow128b = (valLow128bLane < 0) ? C((char)0) : VEXTRACT(a, C((valLow128bLane & 0xF))); + insertValHigh128b = (valHigh128bLane < 0) ? C((char)0) : VEXTRACT(a, C((valHigh128bLane & 0xF) + numElms)); -////////////////////////////////////////////////////////////////////////// -/// @brief convert x86 mask to llvm mask -Value* Builder::MASK(Value* vmask) -{ - Value* src = BITCAST(vmask, mSimdInt32Ty); - return ICMP_SLT(src, VIMMED1(0)); -} - -////////////////////////////////////////////////////////////////////////// -/// @brief convert llvm mask to x86 mask -Value* Builder::VMASK(Value* mask) -{ - return S_EXT(mask, mSimdInt32Ty); -} + vShuf = VINSERT(vShuf, insertValLow128b, i); + vShuf = VINSERT(vShuf, insertValHigh128b, (i + numElms)); + } + res = vShuf; + } + return res; + } -////////////////////////////////////////////////////////////////////////// -/// @brief Generate a VPSHUFB operation in LLVM IR. If not -/// supported on the underlying platform, emulate it -/// @param a - 256bit SIMD(32x8bit) of 8bit integer values -/// @param b - 256bit SIMD(32x8bit) of 8bit integer mask values -/// Byte masks in lower 128 lane of b selects 8 bit values from lower -/// 128bits of a, and vice versa for the upper lanes. If the mask -/// value is negative, '0' is inserted. -Value *Builder::PSHUFB(Value* a, Value* b) -{ - Value* res; - // use avx2 pshufb instruction if available - if(JM()->mArch.AVX2()) + ////////////////////////////////////////////////////////////////////////// + /// @brief Generate a VPSHUFB operation (sign extend 8 8bit values to 32 + /// bits)in LLVM IR. If not supported on the underlying platform, emulate it + /// @param a - 128bit SIMD lane(16x8bit) of 8bit integer values. Only + /// lower 8 values are used. + Value *Builder::PMOVSXBD(Value* a) { - res = VPSHUFB(a, b); + // llvm-3.9 removed the pmovsxbd intrinsic + #if HAVE_LLVM < 0x309 + // use avx2 byte sign extend instruction if available + if(JM()->mArch.AVX2()) + { + Function *pmovsxbd = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx2_pmovsxbd); + return CALL(pmovsxbd, std::initializer_list{a}); + } + else + #endif + { + // VPMOVSXBD output type + Type* v8x32Ty = VectorType::get(mInt32Ty, 8); + // Extract 8 values from 128bit lane and sign extend + return S_EXT(VSHUFFLE(a, a, C({0, 1, 2, 3, 4, 5, 6, 7})), v8x32Ty); + } } - else - { - Constant* cB = dyn_cast(b); - // number of 8 bit elements in b - uint32_t numElms = cast(cB->getType())->getNumElements(); - // output vector - Value* vShuf = UndefValue::get(VectorType::get(mInt8Ty, numElms)); - // insert an 8 bit value from the high and low lanes of a per loop iteration - numElms /= 2; - for(uint32_t i = 0; i < numElms; i++) + ////////////////////////////////////////////////////////////////////////// + /// @brief Generate a VPSHUFB operation (sign extend 8 16bit values to 32 + /// bits)in LLVM IR. If not supported on the underlying platform, emulate it + /// @param a - 128bit SIMD lane(8x16bit) of 16bit integer values. + Value *Builder::PMOVSXWD(Value* a) + { + // llvm-3.9 removed the pmovsxwd intrinsic + #if HAVE_LLVM < 0x309 + // use avx2 word sign extend if available + if(JM()->mArch.AVX2()) + { + Function *pmovsxwd = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx2_pmovsxwd); + return CALL(pmovsxwd, std::initializer_list{a}); + } + else + #endif { - ConstantInt* cLow128b = cast(cB->getAggregateElement(i)); - ConstantInt* cHigh128b = cast(cB->getAggregateElement(i + numElms)); + // VPMOVSXWD output type + Type* v8x32Ty = VectorType::get(mInt32Ty, 8); + // Extract 8 values from 128bit lane and sign extend + return S_EXT(VSHUFFLE(a, a, C({0, 1, 2, 3, 4, 5, 6, 7})), v8x32Ty); + } + } - // extract values from constant mask - char valLow128bLane = (char)(cLow128b->getSExtValue()); - char valHigh128bLane = (char)(cHigh128b->getSExtValue()); + ////////////////////////////////////////////////////////////////////////// + /// @brief Generate a VPERMD operation (shuffle 32 bit integer values + /// across 128 bit lanes) in LLVM IR. If not supported on the underlying + /// platform, emulate it + /// @param a - 256bit SIMD lane(8x32bit) of integer values. + /// @param idx - 256bit SIMD lane(8x32bit) of 3 bit lane index values + Value *Builder::PERMD(Value* a, Value* idx) + { + Value* res; + // use avx2 permute instruction if available + if(JM()->mArch.AVX2()) + { + res = VPERMD(a, idx); + } + else + { + if (isa(idx)) + { + res = VSHUFFLE(a, a, idx); + } + else + { + res = VUNDEF_I(); + for (uint32_t l = 0; l < JM()->mVWidth; ++l) + { + Value* pIndex = VEXTRACT(idx, C(l)); + Value* pVal = VEXTRACT(a, pIndex); + res = VINSERT(res, pVal, C(l)); + } + } + } + return res; + } - Value* insertValLow128b; - Value* insertValHigh128b; + ////////////////////////////////////////////////////////////////////////// + /// @brief Generate a VPERMPS operation (shuffle 32 bit float values + /// across 128 bit lanes) in LLVM IR. If not supported on the underlying + /// platform, emulate it + /// @param a - 256bit SIMD lane(8x32bit) of float values. + /// @param idx - 256bit SIMD lane(8x32bit) of 3 bit lane index values + Value *Builder::PERMPS(Value* a, Value* idx) + { + Value* res; + // use avx2 permute instruction if available + if (JM()->mArch.AVX2()) + { + // llvm 3.6.0 swapped the order of the args to vpermd + res = VPERMPS(idx, a); + } + else + { + if (isa(idx)) + { + res = VSHUFFLE(a, a, idx); + } + else + { + res = VUNDEF_F(); + for (uint32_t l = 0; l < JM()->mVWidth; ++l) + { + Value* pIndex = VEXTRACT(idx, C(l)); + Value* pVal = VEXTRACT(a, pIndex); + res = VINSERT(res, pVal, C(l)); + } + } + } - // if the mask value is negative, insert a '0' in the respective output position - // otherwise, lookup the value at mask position (bits 3..0 of the respective mask byte) in a and insert in output vector - insertValLow128b = (valLow128bLane < 0) ? C((char)0) : VEXTRACT(a, C((valLow128bLane & 0xF))); - insertValHigh128b = (valHigh128bLane < 0) ? C((char)0) : VEXTRACT(a, C((valHigh128bLane & 0xF) + numElms)); + return res; + } - vShuf = VINSERT(vShuf, insertValLow128b, i); - vShuf = VINSERT(vShuf, insertValHigh128b, (i + numElms)); + ////////////////////////////////////////////////////////////////////////// + /// @brief Generate a VCVTPH2PS operation (float16->float32 conversion) + /// in LLVM IR. If not supported on the underlying platform, emulate it + /// @param a - 128bit SIMD lane(8x16bit) of float16 in int16 format. + Value *Builder::CVTPH2PS(Value* a) + { + if (JM()->mArch.F16C()) + { + return VCVTPH2PS(a); } - res = vShuf; - } - return res; -} + else + { + FunctionType* pFuncTy = FunctionType::get(mFP32Ty, mInt16Ty); + Function* pCvtPh2Ps = cast(JM()->mpCurrentModule->getOrInsertFunction("ConvertSmallFloatTo32", pFuncTy)); -////////////////////////////////////////////////////////////////////////// -/// @brief Generate a VPSHUFB operation (sign extend 8 8bit values to 32 -/// bits)in LLVM IR. If not supported on the underlying platform, emulate it -/// @param a - 128bit SIMD lane(16x8bit) of 8bit integer values. Only -/// lower 8 values are used. -Value *Builder::PMOVSXBD(Value* a) -{ - // llvm-3.9 removed the pmovsxbd intrinsic -#if HAVE_LLVM < 0x309 - // use avx2 byte sign extend instruction if available - if(JM()->mArch.AVX2()) - { - Function *pmovsxbd = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx2_pmovsxbd); - return CALL(pmovsxbd, std::initializer_list{a}); - } - else -#endif - { - // VPMOVSXBD output type - Type* v8x32Ty = VectorType::get(mInt32Ty, 8); - // Extract 8 values from 128bit lane and sign extend - return S_EXT(VSHUFFLE(a, a, C({0, 1, 2, 3, 4, 5, 6, 7})), v8x32Ty); - } -} + if (sys::DynamicLibrary::SearchForAddressOfSymbol("ConvertSmallFloatTo32") == nullptr) + { + sys::DynamicLibrary::AddSymbol("ConvertSmallFloatTo32", (void *)&ConvertSmallFloatTo32); + } + + Value* pResult = UndefValue::get(mSimdFP32Ty); + for (uint32_t i = 0; i < mVWidth; ++i) + { + Value* pSrc = VEXTRACT(a, C(i)); + Value* pConv = CALL(pCvtPh2Ps, std::initializer_list{pSrc}); + pResult = VINSERT(pResult, pConv, C(i)); + } -////////////////////////////////////////////////////////////////////////// -/// @brief Generate a VPSHUFB operation (sign extend 8 16bit values to 32 -/// bits)in LLVM IR. If not supported on the underlying platform, emulate it -/// @param a - 128bit SIMD lane(8x16bit) of 16bit integer values. -Value *Builder::PMOVSXWD(Value* a) -{ - // llvm-3.9 removed the pmovsxwd intrinsic -#if HAVE_LLVM < 0x309 - // use avx2 word sign extend if available - if(JM()->mArch.AVX2()) - { - Function *pmovsxwd = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx2_pmovsxwd); - return CALL(pmovsxwd, std::initializer_list{a}); - } - else -#endif - { - // VPMOVSXWD output type - Type* v8x32Ty = VectorType::get(mInt32Ty, 8); - // Extract 8 values from 128bit lane and sign extend - return S_EXT(VSHUFFLE(a, a, C({0, 1, 2, 3, 4, 5, 6, 7})), v8x32Ty); + return pResult; + } } -} -////////////////////////////////////////////////////////////////////////// -/// @brief Generate a VPERMD operation (shuffle 32 bit integer values -/// across 128 bit lanes) in LLVM IR. If not supported on the underlying -/// platform, emulate it -/// @param a - 256bit SIMD lane(8x32bit) of integer values. -/// @param idx - 256bit SIMD lane(8x32bit) of 3 bit lane index values -Value *Builder::PERMD(Value* a, Value* idx) -{ - Value* res; - // use avx2 permute instruction if available - if(JM()->mArch.AVX2()) + ////////////////////////////////////////////////////////////////////////// + /// @brief Generate a VCVTPS2PH operation (float32->float16 conversion) + /// in LLVM IR. If not supported on the underlying platform, emulate it + /// @param a - 128bit SIMD lane(8x16bit) of float16 in int16 format. + Value *Builder::CVTPS2PH(Value* a, Value* rounding) { - res = VPERMD(a, idx); - } - else - { - if (isa(idx)) + if (JM()->mArch.F16C()) { - res = VSHUFFLE(a, a, idx); + return VCVTPS2PH(a, rounding); } else { - res = VUNDEF_I(); - for (uint32_t l = 0; l < JM()->mVWidth; ++l) + // call scalar C function for now + FunctionType* pFuncTy = FunctionType::get(mInt16Ty, mFP32Ty); + Function* pCvtPs2Ph = cast(JM()->mpCurrentModule->getOrInsertFunction("Convert32To16Float", pFuncTy)); + + if (sys::DynamicLibrary::SearchForAddressOfSymbol("Convert32To16Float") == nullptr) + { + sys::DynamicLibrary::AddSymbol("Convert32To16Float", (void *)&Convert32To16Float); + } + + Value* pResult = UndefValue::get(mSimdInt16Ty); + for (uint32_t i = 0; i < mVWidth; ++i) { - Value* pIndex = VEXTRACT(idx, C(l)); - Value* pVal = VEXTRACT(a, pIndex); - res = VINSERT(res, pVal, C(l)); + Value* pSrc = VEXTRACT(a, C(i)); + Value* pConv = CALL(pCvtPs2Ph, std::initializer_list{pSrc}); + pResult = VINSERT(pResult, pConv, C(i)); } + + return pResult; } } - return res; -} -////////////////////////////////////////////////////////////////////////// -/// @brief Generate a VPERMPS operation (shuffle 32 bit float values -/// across 128 bit lanes) in LLVM IR. If not supported on the underlying -/// platform, emulate it -/// @param a - 256bit SIMD lane(8x32bit) of float values. -/// @param idx - 256bit SIMD lane(8x32bit) of 3 bit lane index values -Value *Builder::PERMPS(Value* a, Value* idx) -{ - Value* res; - // use avx2 permute instruction if available - if (JM()->mArch.AVX2()) - { - // llvm 3.6.0 swapped the order of the args to vpermd - res = VPERMPS(idx, a); - } - else + Value *Builder::PMAXSD(Value* a, Value* b) { - if (isa(idx)) + // llvm-3.9 removed the pmax intrinsics + #if HAVE_LLVM >= 0x309 + Value* cmp = ICMP_SGT(a, b); + return SELECT(cmp, a, b); + #else + if (JM()->mArch.AVX2()) { - res = VSHUFFLE(a, a, idx); + Function* pmaxsd = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx2_pmaxs_d); + return CALL(pmaxsd, {a, b}); } else { - res = VUNDEF_F(); - for (uint32_t l = 0; l < JM()->mVWidth; ++l) - { - Value* pIndex = VEXTRACT(idx, C(l)); - Value* pVal = VEXTRACT(a, pIndex); - res = VINSERT(res, pVal, C(l)); - } - } - } + // use 4-wide sse max intrinsic on lower/upper halves of 8-wide sources + Function* pmaxsd = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_sse41_pmaxsd); - return res; -} + // low 128 + Value* aLo = VEXTRACTI128(a, C((uint8_t)0)); + Value* bLo = VEXTRACTI128(b, C((uint8_t)0)); + Value* resLo = CALL(pmaxsd, {aLo, bLo}); -////////////////////////////////////////////////////////////////////////// -/// @brief Generate a VCVTPH2PS operation (float16->float32 conversion) -/// in LLVM IR. If not supported on the underlying platform, emulate it -/// @param a - 128bit SIMD lane(8x16bit) of float16 in int16 format. -Value *Builder::CVTPH2PS(Value* a) -{ - if (JM()->mArch.F16C()) - { - return VCVTPH2PS(a); - } - else - { - FunctionType* pFuncTy = FunctionType::get(mFP32Ty, mInt16Ty); - Function* pCvtPh2Ps = cast(JM()->mpCurrentModule->getOrInsertFunction("ConvertSmallFloatTo32", pFuncTy)); + // high 128 + Value* aHi = VEXTRACTI128(a, C((uint8_t)1)); + Value* bHi = VEXTRACTI128(b, C((uint8_t)1)); + Value* resHi = CALL(pmaxsd, {aHi, bHi}); - if (sys::DynamicLibrary::SearchForAddressOfSymbol("ConvertSmallFloatTo32") == nullptr) - { - sys::DynamicLibrary::AddSymbol("ConvertSmallFloatTo32", (void *)&ConvertSmallFloatTo32); + // combine + Value* result = VINSERTI128(VUNDEF_I(), resLo, C((uint8_t)0)); + result = VINSERTI128(result, resHi, C((uint8_t)1)); + + return result; } + #endif + } - Value* pResult = UndefValue::get(mSimdFP32Ty); - for (uint32_t i = 0; i < mVWidth; ++i) + Value *Builder::PMINSD(Value* a, Value* b) + { + // llvm-3.9 removed the pmin intrinsics + #if HAVE_LLVM >= 0x309 + Value* cmp = ICMP_SLT(a, b); + return SELECT(cmp, a, b); + #else + if (JM()->mArch.AVX2()) { - Value* pSrc = VEXTRACT(a, C(i)); - Value* pConv = CALL(pCvtPh2Ps, std::initializer_list{pSrc}); - pResult = VINSERT(pResult, pConv, C(i)); + Function* pminsd = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx2_pmins_d); + return CALL(pminsd, {a, b}); } + else + { + // use 4-wide sse max intrinsic on lower/upper halves of 8-wide sources + Function* pminsd = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_sse41_pminsd); - return pResult; - } -} + // low 128 + Value* aLo = VEXTRACTI128(a, C((uint8_t)0)); + Value* bLo = VEXTRACTI128(b, C((uint8_t)0)); + Value* resLo = CALL(pminsd, {aLo, bLo}); -////////////////////////////////////////////////////////////////////////// -/// @brief Generate a VCVTPS2PH operation (float32->float16 conversion) -/// in LLVM IR. If not supported on the underlying platform, emulate it -/// @param a - 128bit SIMD lane(8x16bit) of float16 in int16 format. -Value *Builder::CVTPS2PH(Value* a, Value* rounding) -{ - if (JM()->mArch.F16C()) - { - return VCVTPS2PH(a, rounding); + // high 128 + Value* aHi = VEXTRACTI128(a, C((uint8_t)1)); + Value* bHi = VEXTRACTI128(b, C((uint8_t)1)); + Value* resHi = CALL(pminsd, {aHi, bHi}); + + // combine + Value* result = VINSERTI128(VUNDEF_I(), resLo, C((uint8_t)0)); + result = VINSERTI128(result, resHi, C((uint8_t)1)); + + return result; + } + #endif } - else - { - // call scalar C function for now - FunctionType* pFuncTy = FunctionType::get(mInt16Ty, mFP32Ty); - Function* pCvtPs2Ph = cast(JM()->mpCurrentModule->getOrInsertFunction("Convert32To16Float", pFuncTy)); - if (sys::DynamicLibrary::SearchForAddressOfSymbol("Convert32To16Float") == nullptr) + void Builder::Gather4(const SWR_FORMAT format, Value* pSrcBase, Value* byteOffsets, + Value* mask, Value* vGatherComponents[], bool bPackedOutput) + { + const SWR_FORMAT_INFO &info = GetFormatInfo(format); + if(info.type[0] == SWR_TYPE_FLOAT && info.bpc[0] == 32) { - sys::DynamicLibrary::AddSymbol("Convert32To16Float", (void *)&Convert32To16Float); + // ensure our mask is the correct type + mask = BITCAST(mask, mSimdFP32Ty); + GATHER4PS(info, pSrcBase, byteOffsets, mask, vGatherComponents, bPackedOutput); } - - Value* pResult = UndefValue::get(mSimdInt16Ty); - for (uint32_t i = 0; i < mVWidth; ++i) + else { - Value* pSrc = VEXTRACT(a, C(i)); - Value* pConv = CALL(pCvtPs2Ph, std::initializer_list{pSrc}); - pResult = VINSERT(pResult, pConv, C(i)); + // ensure our mask is the correct type + mask = BITCAST(mask, mSimdInt32Ty); + GATHER4DD(info, pSrcBase, byteOffsets, mask, vGatherComponents, bPackedOutput); } - - return pResult; } -} -Value *Builder::PMAXSD(Value* a, Value* b) -{ - // llvm-3.9 removed the pmax intrinsics -#if HAVE_LLVM >= 0x309 - Value* cmp = ICMP_SGT(a, b); - return SELECT(cmp, a, b); -#else - if (JM()->mArch.AVX2()) - { - Function* pmaxsd = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx2_pmaxs_d); - return CALL(pmaxsd, {a, b}); - } - else - { - // use 4-wide sse max intrinsic on lower/upper halves of 8-wide sources - Function* pmaxsd = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_sse41_pmaxsd); - - // low 128 - Value* aLo = VEXTRACTI128(a, C((uint8_t)0)); - Value* bLo = VEXTRACTI128(b, C((uint8_t)0)); - Value* resLo = CALL(pmaxsd, {aLo, bLo}); - - // high 128 - Value* aHi = VEXTRACTI128(a, C((uint8_t)1)); - Value* bHi = VEXTRACTI128(b, C((uint8_t)1)); - Value* resHi = CALL(pmaxsd, {aHi, bHi}); - - // combine - Value* result = VINSERTI128(VUNDEF_I(), resLo, C((uint8_t)0)); - result = VINSERTI128(result, resHi, C((uint8_t)1)); + void Builder::GATHER4PS(const SWR_FORMAT_INFO &info, Value* pSrcBase, Value* byteOffsets, + Value* mask, Value* vGatherComponents[], bool bPackedOutput) + { + switch(info.bpp / info.numComps) + { + case 16: + { + Value* vGatherResult[2]; + Value *vMask; - return result; - } -#endif -} + // TODO: vGatherMaskedVal + Value* vGatherMaskedVal = VIMMED1((float)0); -Value *Builder::PMINSD(Value* a, Value* b) -{ - // llvm-3.9 removed the pmin intrinsics -#if HAVE_LLVM >= 0x309 - Value* cmp = ICMP_SLT(a, b); - return SELECT(cmp, a, b); -#else - if (JM()->mArch.AVX2()) - { - Function* pminsd = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx2_pmins_d); - return CALL(pminsd, {a, b}); - } - else - { - // use 4-wide sse max intrinsic on lower/upper halves of 8-wide sources - Function* pminsd = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_sse41_pminsd); - - // low 128 - Value* aLo = VEXTRACTI128(a, C((uint8_t)0)); - Value* bLo = VEXTRACTI128(b, C((uint8_t)0)); - Value* resLo = CALL(pminsd, {aLo, bLo}); - - // high 128 - Value* aHi = VEXTRACTI128(a, C((uint8_t)1)); - Value* bHi = VEXTRACTI128(b, C((uint8_t)1)); - Value* resHi = CALL(pminsd, {aHi, bHi}); - - // combine - Value* result = VINSERTI128(VUNDEF_I(), resLo, C((uint8_t)0)); - result = VINSERTI128(result, resHi, C((uint8_t)1)); + // always have at least one component out of x or y to fetch - return result; - } -#endif -} + // save mask as it is zero'd out after each gather + vMask = mask; -void Builder::Gather4(const SWR_FORMAT format, Value* pSrcBase, Value* byteOffsets, - Value* mask, Value* vGatherComponents[], bool bPackedOutput) -{ - const SWR_FORMAT_INFO &info = GetFormatInfo(format); - if(info.type[0] == SWR_TYPE_FLOAT && info.bpc[0] == 32) - { - // ensure our mask is the correct type - mask = BITCAST(mask, mSimdFP32Ty); - GATHER4PS(info, pSrcBase, byteOffsets, mask, vGatherComponents, bPackedOutput); - } - else - { - // ensure our mask is the correct type - mask = BITCAST(mask, mSimdInt32Ty); - GATHER4DD(info, pSrcBase, byteOffsets, mask, vGatherComponents, bPackedOutput); + vGatherResult[0] = GATHERPS(vGatherMaskedVal, pSrcBase, byteOffsets, vMask, C((char)1)); + // e.g. result of first 8x32bit integer gather for 16bit components + // 256i - 0 1 2 3 4 5 6 7 + // xyxy xyxy xyxy xyxy xyxy xyxy xyxy xyxy + // + + // if we have at least one component out of x or y to fetch + if(info.numComps > 2) + { + // offset base to the next components(zw) in the vertex to gather + pSrcBase = GEP(pSrcBase, C((char)4)); + vMask = mask; + + vGatherResult[1] = GATHERPS(vGatherMaskedVal, pSrcBase, byteOffsets, vMask, C((char)1)); + // e.g. result of second 8x32bit integer gather for 16bit components + // 256i - 0 1 2 3 4 5 6 7 + // zwzw zwzw zwzw zwzw zwzw zwzw zwzw zwzw + // + } + else + { + vGatherResult[1] = vGatherMaskedVal; + } + + // Shuffle gathered components into place, each row is a component + Shuffle16bpcGather4(info, vGatherResult, vGatherComponents, bPackedOutput); + } + break; + case 32: + { + // apply defaults + for (uint32_t i = 0; i < 4; ++i) + { + vGatherComponents[i] = VIMMED1(*(float*)&info.defaults[i]); + } + + for(uint32_t i = 0; i < info.numComps; i++) + { + uint32_t swizzleIndex = info.swizzle[i]; + + // save mask as it is zero'd out after each gather + Value *vMask = mask; + + // Gather a SIMD of components + vGatherComponents[swizzleIndex] = GATHERPS(vGatherComponents[swizzleIndex], pSrcBase, byteOffsets, vMask, C((char)1)); + + // offset base to the next component to gather + pSrcBase = GEP(pSrcBase, C((char)4)); + } + } + break; + default: + SWR_ASSERT(0, "Invalid float format"); + break; + } } -} -void Builder::GATHER4PS(const SWR_FORMAT_INFO &info, Value* pSrcBase, Value* byteOffsets, - Value* mask, Value* vGatherComponents[], bool bPackedOutput) -{ - switch(info.bpp / info.numComps) + void Builder::GATHER4DD(const SWR_FORMAT_INFO &info, Value* pSrcBase, Value* byteOffsets, + Value* mask, Value* vGatherComponents[], bool bPackedOutput) { - case 16: + switch (info.bpp / info.numComps) { + case 8: + { + Value* vGatherMaskedVal = VIMMED1((int32_t)0); + Value* vGatherResult = GATHERDD(vGatherMaskedVal, pSrcBase, byteOffsets, mask, C((char)1)); + // e.g. result of an 8x32bit integer gather for 8bit components + // 256i - 0 1 2 3 4 5 6 7 + // xyzw xyzw xyzw xyzw xyzw xyzw xyzw xyzw + + Shuffle8bpcGather4(info, vGatherResult, vGatherComponents, bPackedOutput); + } + break; + case 16: + { Value* vGatherResult[2]; Value *vMask; // TODO: vGatherMaskedVal - Value* vGatherMaskedVal = VIMMED1((float)0); + Value* vGatherMaskedVal = VIMMED1((int32_t)0); // always have at least one component out of x or y to fetch // save mask as it is zero'd out after each gather vMask = mask; - vGatherResult[0] = GATHERPS(vGatherMaskedVal, pSrcBase, byteOffsets, vMask, C((char)1)); + vGatherResult[0] = GATHERDD(vGatherMaskedVal, pSrcBase, byteOffsets, vMask, C((char)1)); // e.g. result of first 8x32bit integer gather for 16bit components // 256i - 0 1 2 3 4 5 6 7 // xyxy xyxy xyxy xyxy xyxy xyxy xyxy xyxy @@ -998,7 +1137,7 @@ pSrcBase = GEP(pSrcBase, C((char)4)); vMask = mask; - vGatherResult[1] = GATHERPS(vGatherMaskedVal, pSrcBase, byteOffsets, vMask, C((char)1)); + vGatherResult[1] = GATHERDD(vGatherMaskedVal, pSrcBase, byteOffsets, vMask, C((char)1)); // e.g. result of second 8x32bit integer gather for 16bit components // 256i - 0 1 2 3 4 5 6 7 // zwzw zwzw zwzw zwzw zwzw zwzw zwzw zwzw @@ -1006,539 +1145,532 @@ } else { - vGatherResult[1] = vGatherMaskedVal; + vGatherResult[1] = vGatherMaskedVal; } // Shuffle gathered components into place, each row is a component - Shuffle16bpcGather4(info, vGatherResult, vGatherComponents, bPackedOutput); - } - break; - case 32: - { - // apply defaults - for (uint32_t i = 0; i < 4; ++i) - { - vGatherComponents[i] = VIMMED1(*(float*)&info.defaults[i]); - } + Shuffle16bpcGather4(info, vGatherResult, vGatherComponents, bPackedOutput); - for(uint32_t i = 0; i < info.numComps; i++) + } + break; + case 32: { - uint32_t swizzleIndex = info.swizzle[i]; + // apply defaults + for (uint32_t i = 0; i < 4; ++i) + { + vGatherComponents[i] = VIMMED1((int)info.defaults[i]); + } - // save mask as it is zero'd out after each gather - Value *vMask = mask; + for(uint32_t i = 0; i < info.numComps; i++) + { + uint32_t swizzleIndex = info.swizzle[i]; + + // save mask as it is zero'd out after each gather + Value *vMask = mask; - // Gather a SIMD of components - vGatherComponents[swizzleIndex] = GATHERPS(vGatherComponents[swizzleIndex], pSrcBase, byteOffsets, vMask, C((char)1)); + // Gather a SIMD of components + vGatherComponents[swizzleIndex] = GATHERDD(vGatherComponents[swizzleIndex], pSrcBase, byteOffsets, vMask, C((char)1)); - // offset base to the next component to gather - pSrcBase = GEP(pSrcBase, C((char)4)); + // offset base to the next component to gather + pSrcBase = GEP(pSrcBase, C((char)4)); + } } - } - break; - default: - SWR_ASSERT(0, "Invalid float format"); + break; + default: + SWR_ASSERT(0, "unsupported format"); break; + } } -} -void Builder::GATHER4DD(const SWR_FORMAT_INFO &info, Value* pSrcBase, Value* byteOffsets, - Value* mask, Value* vGatherComponents[], bool bPackedOutput) -{ - switch (info.bpp / info.numComps) + void Builder::Shuffle16bpcGather4(const SWR_FORMAT_INFO &info, Value* vGatherInput[2], Value* vGatherOutput[4], bool bPackedOutput) { - case 8: - { - Value* vGatherMaskedVal = VIMMED1((int32_t)0); - Value* vGatherResult = GATHERDD(vGatherMaskedVal, pSrcBase, byteOffsets, mask, C((char)1)); - // e.g. result of an 8x32bit integer gather for 8bit components - // 256i - 0 1 2 3 4 5 6 7 - // xyzw xyzw xyzw xyzw xyzw xyzw xyzw xyzw - - Shuffle8bpcGather4(info, vGatherResult, vGatherComponents, bPackedOutput); - } - break; - case 16: - { - Value* vGatherResult[2]; - Value *vMask; + // cast types + Type* vGatherTy = VectorType::get(IntegerType::getInt32Ty(JM()->mContext), mVWidth); + Type* v32x8Ty = VectorType::get(mInt8Ty, mVWidth * 4); // vwidth is units of 32 bits - // TODO: vGatherMaskedVal - Value* vGatherMaskedVal = VIMMED1((int32_t)0); + // input could either be float or int vector; do shuffle work in int + vGatherInput[0] = BITCAST(vGatherInput[0], mSimdInt32Ty); + vGatherInput[1] = BITCAST(vGatherInput[1], mSimdInt32Ty); - // always have at least one component out of x or y to fetch + if(bPackedOutput) + { + Type* v128bitTy = VectorType::get(IntegerType::getIntNTy(JM()->mContext, 128), mVWidth / 4); // vwidth is units of 32 bits - // save mask as it is zero'd out after each gather - vMask = mask; + // shuffle mask + Value* vConstMask = C({0, 1, 4, 5, 8, 9, 12, 13, 2, 3, 6, 7, 10, 11, 14, 15, + 0, 1, 4, 5, 8, 9, 12, 13, 2, 3, 6, 7, 10, 11, 14, 15}); + Value* vShufResult = BITCAST(PSHUFB(BITCAST(vGatherInput[0], v32x8Ty), vConstMask), vGatherTy); + // after pshufb: group components together in each 128bit lane + // 256i - 0 1 2 3 4 5 6 7 + // xxxx xxxx yyyy yyyy xxxx xxxx yyyy yyyy - vGatherResult[0] = GATHERDD(vGatherMaskedVal, pSrcBase, byteOffsets, vMask, C((char)1)); - // e.g. result of first 8x32bit integer gather for 16bit components + Value* vi128XY = BITCAST(PERMD(vShufResult, C({0, 1, 4, 5, 2, 3, 6, 7})), v128bitTy); + // after PERMD: move and pack xy components into each 128bit lane // 256i - 0 1 2 3 4 5 6 7 - // xyxy xyxy xyxy xyxy xyxy xyxy xyxy xyxy - // + // xxxx xxxx xxxx xxxx yyyy yyyy yyyy yyyy - // if we have at least one component out of x or y to fetch - if(info.numComps > 2) + // do the same for zw components + Value* vi128ZW = nullptr; + if(info.numComps > 2) { - // offset base to the next components(zw) in the vertex to gather - pSrcBase = GEP(pSrcBase, C((char)4)); - vMask = mask; - - vGatherResult[1] = GATHERDD(vGatherMaskedVal, pSrcBase, byteOffsets, vMask, C((char)1)); - // e.g. result of second 8x32bit integer gather for 16bit components - // 256i - 0 1 2 3 4 5 6 7 - // zwzw zwzw zwzw zwzw zwzw zwzw zwzw zwzw - // + Value* vShufResult = BITCAST(PSHUFB(BITCAST(vGatherInput[1], v32x8Ty), vConstMask), vGatherTy); + vi128ZW = BITCAST(PERMD(vShufResult, C({0, 1, 4, 5, 2, 3, 6, 7})), v128bitTy); } - else + + for(uint32_t i = 0; i < 4; i++) { - vGatherResult[1] = vGatherMaskedVal; - } + uint32_t swizzleIndex = info.swizzle[i]; + // todo: fixed for packed + Value* vGatherMaskedVal = VIMMED1((int32_t)(info.defaults[i])); + if(i >= info.numComps) + { + // set the default component val + vGatherOutput[swizzleIndex] = vGatherMaskedVal; + continue; + } + + // if x or z, extract 128bits from lane 0, else for y or w, extract from lane 1 + uint32_t lane = ((i == 0) || (i == 2)) ? 0 : 1; + // if x or y, use vi128XY permute result, else use vi128ZW + Value* selectedPermute = (i < 2) ? vi128XY : vi128ZW; - // Shuffle gathered components into place, each row is a component - Shuffle16bpcGather4(info, vGatherResult, vGatherComponents, bPackedOutput); + // extract packed component 128 bit lanes + vGatherOutput[swizzleIndex] = VEXTRACT(selectedPermute, C(lane)); + } } - break; - case 32: + else { + // pshufb masks for each component + Value* vConstMask[2]; + // x/z shuffle mask + vConstMask[0] = C({0, 1, -1, -1, 4, 5, -1, -1, 8, 9, -1, -1, 12, 13, -1, -1, + 0, 1, -1, -1, 4, 5, -1, -1, 8, 9, -1, -1, 12, 13, -1, -1, }); + + // y/w shuffle mask + vConstMask[1] = C({2, 3, -1, -1, 6, 7, -1, -1, 10, 11, -1, -1, 14, 15, -1, -1, + 2, 3, -1, -1, 6, 7, -1, -1, 10, 11, -1, -1, 14, 15, -1, -1}); + + + // shuffle enabled components into lower word of each 32bit lane, 0 extending to 32 bits // apply defaults for (uint32_t i = 0; i < 4; ++i) { - vGatherComponents[i] = VIMMED1((int)info.defaults[i]); + vGatherOutput[i] = VIMMED1((int32_t)info.defaults[i]); } for(uint32_t i = 0; i < info.numComps; i++) { uint32_t swizzleIndex = info.swizzle[i]; - // save mask as it is zero'd out after each gather - Value *vMask = mask; - - // Gather a SIMD of components - vGatherComponents[swizzleIndex] = GATHERDD(vGatherComponents[swizzleIndex], pSrcBase, byteOffsets, vMask, C((char)1)); + // select correct constMask for x/z or y/w pshufb + uint32_t selectedMask = ((i == 0) || (i == 2)) ? 0 : 1; + // if x or y, use vi128XY permute result, else use vi128ZW + uint32_t selectedGather = (i < 2) ? 0 : 1; - // offset base to the next component to gather - pSrcBase = GEP(pSrcBase, C((char)4)); + vGatherOutput[swizzleIndex] = BITCAST(PSHUFB(BITCAST(vGatherInput[selectedGather], v32x8Ty), vConstMask[selectedMask]), vGatherTy); + // after pshufb mask for x channel; z uses the same shuffle from the second gather + // 256i - 0 1 2 3 4 5 6 7 + // xx00 xx00 xx00 xx00 xx00 xx00 xx00 xx00 } } - break; - default: - SWR_ASSERT(0, "unsupported format"); - break; } -} - -void Builder::Shuffle16bpcGather4(const SWR_FORMAT_INFO &info, Value* vGatherInput[2], Value* vGatherOutput[4], bool bPackedOutput) -{ - // cast types - Type* vGatherTy = VectorType::get(IntegerType::getInt32Ty(JM()->mContext), mVWidth); - Type* v32x8Ty = VectorType::get(mInt8Ty, mVWidth * 4); // vwidth is units of 32 bits - - // input could either be float or int vector; do shuffle work in int - vGatherInput[0] = BITCAST(vGatherInput[0], mSimdInt32Ty); - vGatherInput[1] = BITCAST(vGatherInput[1], mSimdInt32Ty); - if(bPackedOutput) + void Builder::Shuffle8bpcGather4(const SWR_FORMAT_INFO &info, Value* vGatherInput, Value* vGatherOutput[], bool bPackedOutput) { - Type* v128bitTy = VectorType::get(IntegerType::getIntNTy(JM()->mContext, 128), mVWidth / 4); // vwidth is units of 32 bits + // cast types + Type* vGatherTy = VectorType::get(IntegerType::getInt32Ty(JM()->mContext), mVWidth); + Type* v32x8Ty = VectorType::get(mInt8Ty, mVWidth * 4 ); // vwidth is units of 32 bits + + if(bPackedOutput) + { + Type* v128Ty = VectorType::get(IntegerType::getIntNTy(JM()->mContext, 128), mVWidth / 4); // vwidth is units of 32 bits + // shuffle mask + Value* vConstMask = C({0, 4, 8, 12, 1, 5, 9, 13, 2, 6, 10, 14, 3, 7, 11, 15, + 0, 4, 8, 12, 1, 5, 9, 13, 2, 6, 10, 14, 3, 7, 11, 15}); + Value* vShufResult = BITCAST(PSHUFB(BITCAST(vGatherInput, v32x8Ty), vConstMask), vGatherTy); + // after pshufb: group components together in each 128bit lane + // 256i - 0 1 2 3 4 5 6 7 + // xxxx yyyy zzzz wwww xxxx yyyy zzzz wwww - // shuffle mask - Value* vConstMask = C({0, 1, 4, 5, 8, 9, 12, 13, 2, 3, 6, 7, 10, 11, 14, 15, - 0, 1, 4, 5, 8, 9, 12, 13, 2, 3, 6, 7, 10, 11, 14, 15}); - Value* vShufResult = BITCAST(PSHUFB(BITCAST(vGatherInput[0], v32x8Ty), vConstMask), vGatherTy); - // after pshufb: group components together in each 128bit lane - // 256i - 0 1 2 3 4 5 6 7 - // xxxx xxxx yyyy yyyy xxxx xxxx yyyy yyyy + Value* vi128XY = BITCAST(PERMD(vShufResult, C({0, 4, 0, 0, 1, 5, 0, 0})), v128Ty); + // after PERMD: move and pack xy and zw components in low 64 bits of each 128bit lane + // 256i - 0 1 2 3 4 5 6 7 + // xxxx xxxx dcdc dcdc yyyy yyyy dcdc dcdc (dc - don't care) - Value* vi128XY = BITCAST(PERMD(vShufResult, C({0, 1, 4, 5, 2, 3, 6, 7})), v128bitTy); - // after PERMD: move and pack xy components into each 128bit lane - // 256i - 0 1 2 3 4 5 6 7 - // xxxx xxxx xxxx xxxx yyyy yyyy yyyy yyyy + // do the same for zw components + Value* vi128ZW = nullptr; + if(info.numComps > 2) + { + vi128ZW = BITCAST(PERMD(vShufResult, C({2, 6, 0, 0, 3, 7, 0, 0})), v128Ty); + } - // do the same for zw components - Value* vi128ZW = nullptr; - if(info.numComps > 2) - { - Value* vShufResult = BITCAST(PSHUFB(BITCAST(vGatherInput[1], v32x8Ty), vConstMask), vGatherTy); - vi128ZW = BITCAST(PERMD(vShufResult, C({0, 1, 4, 5, 2, 3, 6, 7})), v128bitTy); - } + // sign extend all enabled components. If we have a fill vVertexElements, output to current simdvertex + for(uint32_t i = 0; i < 4; i++) + { + uint32_t swizzleIndex = info.swizzle[i]; + // todo: fix for packed + Value* vGatherMaskedVal = VIMMED1((int32_t)(info.defaults[i])); + if(i >= info.numComps) + { + // set the default component val + vGatherOutput[swizzleIndex] = vGatherMaskedVal; + continue; + } - for(uint32_t i = 0; i < 4; i++) - { - uint32_t swizzleIndex = info.swizzle[i]; - // todo: fixed for packed - Value* vGatherMaskedVal = VIMMED1((int32_t)(info.defaults[i])); - if(i >= info.numComps) + // if x or z, extract 128bits from lane 0, else for y or w, extract from lane 1 + uint32_t lane = ((i == 0) || (i == 2)) ? 0 : 1; + // if x or y, use vi128XY permute result, else use vi128ZW + Value* selectedPermute = (i < 2) ? vi128XY : vi128ZW; + + // sign extend + vGatherOutput[swizzleIndex] = VEXTRACT(selectedPermute, C(lane)); + } + } + // else zero extend + else{ + // shuffle enabled components into lower byte of each 32bit lane, 0 extending to 32 bits + // apply defaults + for (uint32_t i = 0; i < 4; ++i) { - // set the default component val - vGatherOutput[swizzleIndex] = vGatherMaskedVal; - continue; + vGatherOutput[i] = VIMMED1((int32_t)info.defaults[i]); } - // if x or z, extract 128bits from lane 0, else for y or w, extract from lane 1 - uint32_t lane = ((i == 0) || (i == 2)) ? 0 : 1; - // if x or y, use vi128XY permute result, else use vi128ZW - Value* selectedPermute = (i < 2) ? vi128XY : vi128ZW; + for(uint32_t i = 0; i < info.numComps; i++){ + uint32_t swizzleIndex = info.swizzle[i]; + + // pshufb masks for each component + Value* vConstMask; + switch(i) + { + case 0: + // x shuffle mask + vConstMask = C({0, -1, -1, -1, 4, -1, -1, -1, 8, -1, -1, -1, 12, -1, -1, -1, + 0, -1, -1, -1, 4, -1, -1, -1, 8, -1, -1, -1, 12, -1, -1, -1}); + break; + case 1: + // y shuffle mask + vConstMask = C({1, -1, -1, -1, 5, -1, -1, -1, 9, -1, -1, -1, 13, -1, -1, -1, + 1, -1, -1, -1, 5, -1, -1, -1, 9, -1, -1, -1, 13, -1, -1, -1}); + break; + case 2: + // z shuffle mask + vConstMask = C({2, -1, -1, -1, 6, -1, -1, -1, 10, -1, -1, -1, 14, -1, -1, -1, + 2, -1, -1, -1, 6, -1, -1, -1, 10, -1, -1, -1, 14, -1, -1, -1}); + break; + case 3: + // w shuffle mask + vConstMask = C({3, -1, -1, -1, 7, -1, -1, -1, 11, -1, -1, -1, 15, -1, -1, -1, + 3, -1, -1, -1, 7, -1, -1, -1, 11, -1, -1, -1, 15, -1, -1, -1}); + break; + default: + vConstMask = nullptr; + break; + } - // extract packed component 128 bit lanes - vGatherOutput[swizzleIndex] = VEXTRACT(selectedPermute, C(lane)); + vGatherOutput[swizzleIndex] = BITCAST(PSHUFB(BITCAST(vGatherInput, v32x8Ty), vConstMask), vGatherTy); + // after pshufb for x channel + // 256i - 0 1 2 3 4 5 6 7 + // x000 x000 x000 x000 x000 x000 x000 x000 + } } + } + // Helper function to create alloca in entry block of function + Value* Builder::CreateEntryAlloca(Function* pFunc, Type* pType) + { + auto saveIP = IRB()->saveIP(); + IRB()->SetInsertPoint(&pFunc->getEntryBlock(), + pFunc->getEntryBlock().begin()); + Value* pAlloca = ALLOCA(pType); + IRB()->restoreIP(saveIP); + return pAlloca; } - else + + ////////////////////////////////////////////////////////////////////////// + /// @brief emulates a scatter operation. + /// @param pDst - pointer to destination + /// @param vSrc - vector of src data to scatter + /// @param vOffsets - vector of byte offsets from pDst + /// @param vMask - mask of valid lanes + void Builder::SCATTERPS(Value* pDst, Value* vSrc, Value* vOffsets, Value* vMask) { - // pshufb masks for each component - Value* vConstMask[2]; - // x/z shuffle mask - vConstMask[0] = C({0, 1, -1, -1, 4, 5, -1, -1, 8, 9, -1, -1, 12, 13, -1, -1, - 0, 1, -1, -1, 4, 5, -1, -1, 8, 9, -1, -1, 12, 13, -1, -1, }); + /* Scatter algorithm + + while(Index = BitScanForward(mask)) + srcElem = srcVector[Index] + offsetElem = offsetVector[Index] + *(pDst + offsetElem) = srcElem + Update mask (&= ~(1<({2, 3, -1, -1, 6, 7, -1, -1, 10, 11, -1, -1, 14, 15, -1, -1, - 2, 3, -1, -1, 6, 7, -1, -1, 10, 11, -1, -1, 14, 15, -1, -1}); + */ + BasicBlock* pCurBB = IRB()->GetInsertBlock(); + Function* pFunc = pCurBB->getParent(); + Type* pSrcTy = vSrc->getType()->getVectorElementType(); - // shuffle enabled components into lower word of each 32bit lane, 0 extending to 32 bits - // apply defaults - for (uint32_t i = 0; i < 4; ++i) + // Store vectors on stack + if (pScatterStackSrc == nullptr) { - vGatherOutput[i] = VIMMED1((int32_t)info.defaults[i]); + // Save off stack allocations and reuse per scatter. Significantly reduces stack + // requirements for shaders with a lot of scatters. + pScatterStackSrc = CreateEntryAlloca(pFunc, mSimdInt64Ty); + pScatterStackOffsets = CreateEntryAlloca(pFunc, mSimdInt32Ty); } + + Value* pSrcArrayPtr = BITCAST(pScatterStackSrc, PointerType::get(vSrc->getType(), 0)); + Value* pOffsetsArrayPtr = pScatterStackOffsets; + STORE(vSrc, pSrcArrayPtr); + STORE(vOffsets, pOffsetsArrayPtr); - for(uint32_t i = 0; i < info.numComps; i++) - { - uint32_t swizzleIndex = info.swizzle[i]; - - // select correct constMask for x/z or y/w pshufb - uint32_t selectedMask = ((i == 0) || (i == 2)) ? 0 : 1; - // if x or y, use vi128XY permute result, else use vi128ZW - uint32_t selectedGather = (i < 2) ? 0 : 1; + // Cast to pointers for random access + pSrcArrayPtr = POINTER_CAST(pSrcArrayPtr, PointerType::get(pSrcTy, 0)); + pOffsetsArrayPtr = POINTER_CAST(pOffsetsArrayPtr, PointerType::get(mInt32Ty, 0)); - vGatherOutput[swizzleIndex] = BITCAST(PSHUFB(BITCAST(vGatherInput[selectedGather], v32x8Ty), vConstMask[selectedMask]), vGatherTy); - // after pshufb mask for x channel; z uses the same shuffle from the second gather - // 256i - 0 1 2 3 4 5 6 7 - // xx00 xx00 xx00 xx00 xx00 xx00 xx00 xx00 - } - } -} + Value* pMask = VMOVMSKPS(BITCAST(vMask, mSimdFP32Ty)); -void Builder::Shuffle8bpcGather4(const SWR_FORMAT_INFO &info, Value* vGatherInput, Value* vGatherOutput[], bool bPackedOutput) -{ - // cast types - Type* vGatherTy = VectorType::get(IntegerType::getInt32Ty(JM()->mContext), mVWidth); - Type* v32x8Ty = VectorType::get(mInt8Ty, mVWidth * 4 ); // vwidth is units of 32 bits - - if(bPackedOutput) - { - Type* v128Ty = VectorType::get(IntegerType::getIntNTy(JM()->mContext, 128), mVWidth / 4); // vwidth is units of 32 bits - // shuffle mask - Value* vConstMask = C({0, 4, 8, 12, 1, 5, 9, 13, 2, 6, 10, 14, 3, 7, 11, 15, - 0, 4, 8, 12, 1, 5, 9, 13, 2, 6, 10, 14, 3, 7, 11, 15}); - Value* vShufResult = BITCAST(PSHUFB(BITCAST(vGatherInput, v32x8Ty), vConstMask), vGatherTy); - // after pshufb: group components together in each 128bit lane - // 256i - 0 1 2 3 4 5 6 7 - // xxxx yyyy zzzz wwww xxxx yyyy zzzz wwww - - Value* vi128XY = BITCAST(PERMD(vShufResult, C({0, 4, 0, 0, 1, 5, 0, 0})), v128Ty); - // after PERMD: move and pack xy and zw components in low 64 bits of each 128bit lane - // 256i - 0 1 2 3 4 5 6 7 - // xxxx xxxx dcdc dcdc yyyy yyyy dcdc dcdc (dc - don't care) - - // do the same for zw components - Value* vi128ZW = nullptr; - if(info.numComps > 2) - { - vi128ZW = BITCAST(PERMD(vShufResult, C({2, 6, 0, 0, 3, 7, 0, 0})), v128Ty); - } - - // sign extend all enabled components. If we have a fill vVertexElements, output to current simdvertex - for(uint32_t i = 0; i < 4; i++) - { - uint32_t swizzleIndex = info.swizzle[i]; - // todo: fix for packed - Value* vGatherMaskedVal = VIMMED1((int32_t)(info.defaults[i])); - if(i >= info.numComps) - { - // set the default component val - vGatherOutput[swizzleIndex] = vGatherMaskedVal; - continue; - } - - // if x or z, extract 128bits from lane 0, else for y or w, extract from lane 1 - uint32_t lane = ((i == 0) || (i == 2)) ? 0 : 1; - // if x or y, use vi128XY permute result, else use vi128ZW - Value* selectedPermute = (i < 2) ? vi128XY : vi128ZW; - - // sign extend - vGatherOutput[swizzleIndex] = VEXTRACT(selectedPermute, C(lane)); - } - } - // else zero extend - else{ - // shuffle enabled components into lower byte of each 32bit lane, 0 extending to 32 bits - // apply defaults - for (uint32_t i = 0; i < 4; ++i) - { - vGatherOutput[i] = VIMMED1((int32_t)info.defaults[i]); - } + // Get cttz function + Function* pfnCttz = Intrinsic::getDeclaration(mpJitMgr->mpCurrentModule, Intrinsic::cttz, { mInt32Ty }); + + // Setup loop basic block + BasicBlock* pLoop = BasicBlock::Create(mpJitMgr->mContext, "Scatter Loop", pFunc); - for(uint32_t i = 0; i < info.numComps; i++){ - uint32_t swizzleIndex = info.swizzle[i]; + // compute first set bit + Value* pIndex = CALL(pfnCttz, { pMask, C(false) }); - // pshufb masks for each component - Value* vConstMask; - switch(i) - { - case 0: - // x shuffle mask - vConstMask = C({0, -1, -1, -1, 4, -1, -1, -1, 8, -1, -1, -1, 12, -1, -1, -1, - 0, -1, -1, -1, 4, -1, -1, -1, 8, -1, -1, -1, 12, -1, -1, -1}); - break; - case 1: - // y shuffle mask - vConstMask = C({1, -1, -1, -1, 5, -1, -1, -1, 9, -1, -1, -1, 13, -1, -1, -1, - 1, -1, -1, -1, 5, -1, -1, -1, 9, -1, -1, -1, 13, -1, -1, -1}); - break; - case 2: - // z shuffle mask - vConstMask = C({2, -1, -1, -1, 6, -1, -1, -1, 10, -1, -1, -1, 14, -1, -1, -1, - 2, -1, -1, -1, 6, -1, -1, -1, 10, -1, -1, -1, 14, -1, -1, -1}); - break; - case 3: - // w shuffle mask - vConstMask = C({3, -1, -1, -1, 7, -1, -1, -1, 11, -1, -1, -1, 15, -1, -1, -1, - 3, -1, -1, -1, 7, -1, -1, -1, 11, -1, -1, -1, 15, -1, -1, -1}); - break; - default: - vConstMask = nullptr; - break; - } + Value* pIsUndef = ICMP_EQ(pIndex, C(32)); - vGatherOutput[swizzleIndex] = BITCAST(PSHUFB(BITCAST(vGatherInput, v32x8Ty), vConstMask), vGatherTy); - // after pshufb for x channel - // 256i - 0 1 2 3 4 5 6 7 - // x000 x000 x000 x000 x000 x000 x000 x000 - } - } -} + // Split current block + BasicBlock* pPostLoop = pCurBB->splitBasicBlock(cast(pIsUndef)->getNextNode()); -////////////////////////////////////////////////////////////////////////// -/// @brief emulates a scatter operation. -/// @param pDst - pointer to destination -/// @param vSrc - vector of src data to scatter -/// @param vOffsets - vector of byte offsets from pDst -/// @param vMask - mask of valid lanes -void Builder::SCATTERPS(Value* pDst, Value* vSrc, Value* vOffsets, Value* vMask) -{ - Value* pStack = STACKSAVE(); + // Remove unconditional jump created by splitBasicBlock + pCurBB->getTerminator()->eraseFromParent(); - Type* pSrcTy = vSrc->getType()->getVectorElementType(); + // Add terminator to end of original block + IRB()->SetInsertPoint(pCurBB); - // allocate tmp stack for masked off lanes - Value* vTmpPtr = ALLOCA(pSrcTy); + // Add conditional branch + COND_BR(pIsUndef, pPostLoop, pLoop); - Value *mask = MASK(vMask); - for (uint32_t i = 0; i < mVWidth; ++i) - { - Value *offset = VEXTRACT(vOffsets, C(i)); - // byte pointer to component - Value *storeAddress = GEP(pDst, offset); - storeAddress = BITCAST(storeAddress, PointerType::get(pSrcTy, 0)); - Value *selMask = VEXTRACT(mask, C(i)); - Value *srcElem = VEXTRACT(vSrc, C(i)); - // switch in a safe address to load if we're trying to access a vertex - Value *validAddress = SELECT(selMask, storeAddress, vTmpPtr); - STORE(srcElem, validAddress); - } + // Add loop basic block contents + IRB()->SetInsertPoint(pLoop); + PHINode* pIndexPhi = PHI(mInt32Ty, 2); + PHINode* pMaskPhi = PHI(mInt32Ty, 2); - STACKRESTORE(pStack); -} + pIndexPhi->addIncoming(pIndex, pCurBB); + pMaskPhi->addIncoming(pMask, pCurBB); -Value* Builder::VABSPS(Value* a) -{ - Value* asInt = BITCAST(a, mSimdInt32Ty); - Value* result = BITCAST(AND(asInt, VIMMED1(0x7fffffff)), mSimdFP32Ty); - return result; -} + // Extract elements for this index + Value* pSrcElem = LOADV(pSrcArrayPtr, { pIndexPhi }); + Value* pOffsetElem = LOADV(pOffsetsArrayPtr, { pIndexPhi }); -Value *Builder::ICLAMP(Value* src, Value* low, Value* high) -{ - Value *lowCmp = ICMP_SLT(src, low); - Value *ret = SELECT(lowCmp, low, src); + // GEP to this offset in dst + Value* pCurDst = GEP(pDst, pOffsetElem); + pCurDst = POINTER_CAST(pCurDst, PointerType::get(pSrcTy, 0)); + STORE(pSrcElem, pCurDst); - Value *highCmp = ICMP_SGT(ret, high); - ret = SELECT(highCmp, high, ret); + // Update the mask + Value* pNewMask = AND(pMaskPhi, NOT(SHL(C(1), pIndexPhi))); - return ret; -} + // Terminator + Value* pNewIndex = CALL(pfnCttz, { pNewMask, C(false) }); -Value *Builder::FCLAMP(Value* src, Value* low, Value* high) -{ - Value *lowCmp = FCMP_OLT(src, low); - Value *ret = SELECT(lowCmp, low, src); + pIsUndef = ICMP_EQ(pNewIndex, C(32)); + COND_BR(pIsUndef, pPostLoop, pLoop); - Value *highCmp = FCMP_OGT(ret, high); - ret = SELECT(highCmp, high, ret); + // Update phi edges + pIndexPhi->addIncoming(pNewIndex, pLoop); + pMaskPhi->addIncoming(pNewMask, pLoop); - return ret; -} + // Move builder to beginning of post loop + IRB()->SetInsertPoint(pPostLoop, pPostLoop->begin()); + } -Value *Builder::FCLAMP(Value* src, float low, float high) -{ - Value* result = VMAXPS(src, VIMMED1(low)); - result = VMINPS(result, VIMMED1(high)); + Value* Builder::VABSPS(Value* a) + { + Value* asInt = BITCAST(a, mSimdInt32Ty); + Value* result = BITCAST(AND(asInt, VIMMED1(0x7fffffff)), mSimdFP32Ty); + return result; + } - return result; -} + Value *Builder::ICLAMP(Value* src, Value* low, Value* high) + { + Value *lowCmp = ICMP_SLT(src, low); + Value *ret = SELECT(lowCmp, low, src); -////////////////////////////////////////////////////////////////////////// -/// @brief save/restore stack, providing ability to push/pop the stack and -/// reduce overall stack requirements for temporary stack use -Value* Builder::STACKSAVE() -{ - Function* pfnStackSave = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::stacksave); -#if HAVE_LLVM == 0x306 - return CALL(pfnStackSave); -#else - return CALLA(pfnStackSave); -#endif -} + Value *highCmp = ICMP_SGT(ret, high); + ret = SELECT(highCmp, high, ret); -void Builder::STACKRESTORE(Value* pSaved) -{ - Function* pfnStackRestore = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::stackrestore); - CALL(pfnStackRestore, std::initializer_list{pSaved}); -} + return ret; + } -Value *Builder::FMADDPS(Value* a, Value* b, Value* c) -{ - Value* vOut; - // use FMADs if available - if(JM()->mArch.AVX2()) + Value *Builder::FCLAMP(Value* src, Value* low, Value* high) { - vOut = VFMADDPS(a, b, c); + Value *lowCmp = FCMP_OLT(src, low); + Value *ret = SELECT(lowCmp, low, src); + + Value *highCmp = FCMP_OGT(ret, high); + ret = SELECT(highCmp, high, ret); + + return ret; } - else + + Value *Builder::FCLAMP(Value* src, float low, float high) { - vOut = FADD(FMUL(a, b), c); - } - return vOut; -} + Value* result = VMAXPS(src, VIMMED1(low)); + result = VMINPS(result, VIMMED1(high)); -Value* Builder::POPCNT(Value* a) -{ - Function* pCtPop = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::ctpop, { a->getType() }); - return CALL(pCtPop, std::initializer_list{a}); -} + return result; + } -////////////////////////////////////////////////////////////////////////// -/// @brief C functions called by LLVM IR -////////////////////////////////////////////////////////////////////////// - -////////////////////////////////////////////////////////////////////////// -/// @brief called in JIT code, inserted by PRINT -/// output to both stdout and visual studio debug console -void __cdecl CallPrint(const char* fmt, ...) -{ - va_list args; - va_start(args, fmt); - vprintf(fmt, args); - -#if defined( _WIN32 ) - char strBuf[1024]; - vsnprintf_s(strBuf, _TRUNCATE, fmt, args); - OutputDebugString(strBuf); -#endif + ////////////////////////////////////////////////////////////////////////// + /// @brief save/restore stack, providing ability to push/pop the stack and + /// reduce overall stack requirements for temporary stack use + Value* Builder::STACKSAVE() + { + Function* pfnStackSave = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::stacksave); + #if HAVE_LLVM == 0x306 + return CALL(pfnStackSave); + #else + return CALLA(pfnStackSave); + #endif + } - va_end(args); -} + void Builder::STACKRESTORE(Value* pSaved) + { + Function* pfnStackRestore = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::stackrestore); + CALL(pfnStackRestore, std::initializer_list{pSaved}); + } -Value *Builder::VEXTRACTI128(Value* a, Constant* imm8) -{ -#if HAVE_LLVM == 0x306 - Function *func = - Intrinsic::getDeclaration(JM()->mpCurrentModule, - Intrinsic::x86_avx_vextractf128_si_256); - return CALL(func, {a, imm8}); -#else - bool flag = !imm8->isZeroValue(); - SmallVector idx; - for (unsigned i = 0; i < mVWidth / 2; i++) { - idx.push_back(C(flag ? i + mVWidth / 2 : i)); + Value *Builder::FMADDPS(Value* a, Value* b, Value* c) + { + Value* vOut; + // use FMADs if available + if(JM()->mArch.AVX2()) + { + vOut = VFMADDPS(a, b, c); + } + else + { + vOut = FADD(FMUL(a, b), c); + } + return vOut; } - return VSHUFFLE(a, VUNDEF_I(), ConstantVector::get(idx)); -#endif -} -Value *Builder::VINSERTI128(Value* a, Value* b, Constant* imm8) -{ -#if HAVE_LLVM == 0x306 - Function *func = - Intrinsic::getDeclaration(JM()->mpCurrentModule, - Intrinsic::x86_avx_vinsertf128_si_256); - return CALL(func, {a, b, imm8}); -#else - bool flag = !imm8->isZeroValue(); - SmallVector idx; - for (unsigned i = 0; i < mVWidth; i++) { - idx.push_back(C(i)); - } - Value *inter = VSHUFFLE(b, VUNDEF_I(), ConstantVector::get(idx)); - - SmallVector idx2; - for (unsigned i = 0; i < mVWidth / 2; i++) { - idx2.push_back(C(flag ? i : i + mVWidth)); + Value* Builder::POPCNT(Value* a) + { + Function* pCtPop = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::ctpop, { a->getType() }); + return CALL(pCtPop, std::initializer_list{a}); } - for (unsigned i = mVWidth / 2; i < mVWidth; i++) { - idx2.push_back(C(flag ? i + mVWidth / 2 : i)); + + ////////////////////////////////////////////////////////////////////////// + /// @brief C functions called by LLVM IR + ////////////////////////////////////////////////////////////////////////// + + ////////////////////////////////////////////////////////////////////////// + /// @brief called in JIT code, inserted by PRINT + /// output to both stdout and visual studio debug console + void __cdecl CallPrint(const char* fmt, ...) + { + va_list args; + va_start(args, fmt); + vprintf(fmt, args); + + #if defined( _WIN32 ) + char strBuf[1024]; + vsnprintf_s(strBuf, _TRUNCATE, fmt, args); + OutputDebugString(strBuf); + #endif + + va_end(args); } - return VSHUFFLE(a, inter, ConstantVector::get(idx2)); -#endif -} -// rdtsc buckets macros -void Builder::RDTSC_START(Value* pBucketMgr, Value* pId) -{ - // @todo due to an issue with thread local storage propagation in llvm, we can only safely call into - // buckets framework when single threaded - if (KNOB_SINGLE_THREADED) + Value *Builder::VEXTRACTI128(Value* a, Constant* imm8) { - std::vector args{ - PointerType::get(mInt32Ty, 0), // pBucketMgr - mInt32Ty // id - }; + #if HAVE_LLVM == 0x306 + Function *func = + Intrinsic::getDeclaration(JM()->mpCurrentModule, + Intrinsic::x86_avx_vextractf128_si_256); + return CALL(func, {a, imm8}); + #else + bool flag = !imm8->isZeroValue(); + SmallVector idx; + for (unsigned i = 0; i < mVWidth / 2; i++) { + idx.push_back(C(flag ? i + mVWidth / 2 : i)); + } + return VSHUFFLE(a, VUNDEF_I(), ConstantVector::get(idx)); + #endif + } - FunctionType* pFuncTy = FunctionType::get(Type::getVoidTy(JM()->mContext), args, false); - Function* pFunc = cast(JM()->mpCurrentModule->getOrInsertFunction("BucketManager_StartBucket", pFuncTy)); - if (sys::DynamicLibrary::SearchForAddressOfSymbol("BucketManager_StartBucket") == nullptr) - { - sys::DynamicLibrary::AddSymbol("BucketManager_StartBucket", (void*)&BucketManager_StartBucket); + Value *Builder::VINSERTI128(Value* a, Value* b, Constant* imm8) + { + #if HAVE_LLVM == 0x306 + Function *func = + Intrinsic::getDeclaration(JM()->mpCurrentModule, + Intrinsic::x86_avx_vinsertf128_si_256); + return CALL(func, {a, b, imm8}); + #else + bool flag = !imm8->isZeroValue(); + SmallVector idx; + for (unsigned i = 0; i < mVWidth; i++) { + idx.push_back(C(i)); } + Value *inter = VSHUFFLE(b, VUNDEF_I(), ConstantVector::get(idx)); - CALL(pFunc, { pBucketMgr, pId }); + SmallVector idx2; + for (unsigned i = 0; i < mVWidth / 2; i++) { + idx2.push_back(C(flag ? i : i + mVWidth)); + } + for (unsigned i = mVWidth / 2; i < mVWidth; i++) { + idx2.push_back(C(flag ? i + mVWidth / 2 : i)); + } + return VSHUFFLE(a, inter, ConstantVector::get(idx2)); + #endif } -} -void Builder::RDTSC_STOP(Value* pBucketMgr, Value* pId) -{ - // @todo due to an issue with thread local storage propagation in llvm, we can only safely call into - // buckets framework when single threaded - if (KNOB_SINGLE_THREADED) + // rdtsc buckets macros + void Builder::RDTSC_START(Value* pBucketMgr, Value* pId) { - std::vector args{ - PointerType::get(mInt32Ty, 0), // pBucketMgr - mInt32Ty // id - }; - - FunctionType* pFuncTy = FunctionType::get(Type::getVoidTy(JM()->mContext), args, false); - Function* pFunc = cast(JM()->mpCurrentModule->getOrInsertFunction("BucketManager_StopBucket", pFuncTy)); - if (sys::DynamicLibrary::SearchForAddressOfSymbol("BucketManager_StopBucket") == nullptr) + // @todo due to an issue with thread local storage propagation in llvm, we can only safely call into + // buckets framework when single threaded + if (KNOB_SINGLE_THREADED) { - sys::DynamicLibrary::AddSymbol("BucketManager_StopBucket", (void*)&BucketManager_StopBucket); + std::vector args{ + PointerType::get(mInt32Ty, 0), // pBucketMgr + mInt32Ty // id + }; + + FunctionType* pFuncTy = FunctionType::get(Type::getVoidTy(JM()->mContext), args, false); + Function* pFunc = cast(JM()->mpCurrentModule->getOrInsertFunction("BucketManager_StartBucket", pFuncTy)); + if (sys::DynamicLibrary::SearchForAddressOfSymbol("BucketManager_StartBucket") == nullptr) + { + sys::DynamicLibrary::AddSymbol("BucketManager_StartBucket", (void*)&BucketManager_StartBucket); + } + + CALL(pFunc, { pBucketMgr, pId }); } + } + + void Builder::RDTSC_STOP(Value* pBucketMgr, Value* pId) + { + // @todo due to an issue with thread local storage propagation in llvm, we can only safely call into + // buckets framework when single threaded + if (KNOB_SINGLE_THREADED) + { + std::vector args{ + PointerType::get(mInt32Ty, 0), // pBucketMgr + mInt32Ty // id + }; + + FunctionType* pFuncTy = FunctionType::get(Type::getVoidTy(JM()->mContext), args, false); + Function* pFunc = cast(JM()->mpCurrentModule->getOrInsertFunction("BucketManager_StopBucket", pFuncTy)); + if (sys::DynamicLibrary::SearchForAddressOfSymbol("BucketManager_StopBucket") == nullptr) + { + sys::DynamicLibrary::AddSymbol("BucketManager_StopBucket", (void*)&BucketManager_StopBucket); + } - CALL(pFunc, { pBucketMgr, pId }); + CALL(pFunc, { pBucketMgr, pId }); + } } -} +} diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/builder_misc.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/builder_misc.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/builder_misc.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/builder_misc.h 2017-06-01 10:37:10.000000000 +0000 @@ -113,6 +113,8 @@ void GATHER4DD(const SWR_FORMAT_INFO &info, Value* pSrcBase, Value* byteOffsets, Value* mask, Value* vGatherComponents[], bool bPackedOutput); +Value *GATHERPD(Value* src, Value* pBase, Value* indices, Value* mask, Value* scale); + void SCATTERPS(Value* pDst, Value* vSrc, Value* vOffsets, Value* vMask); void Shuffle8bpcGather4(const SWR_FORMAT_INFO &info, Value* vGatherInput, Value* vGatherOutput[], bool bPackedOutput); @@ -159,3 +161,10 @@ // rdtsc buckets macros void RDTSC_START(Value* pBucketMgr, Value* pId); void RDTSC_STOP(Value* pBucketMgr, Value* pId); + +Value* CreateEntryAlloca(Function* pFunc, Type* pType); + +// Static stack allocations for scatter operations +Value* pScatterStackSrc{ nullptr }; +Value* pScatterStackOffsets{ nullptr }; + diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/builder_x86.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/builder_x86.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/builder_x86.cpp 2017-01-24 01:43:37.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/builder_x86.cpp 2017-06-01 10:38:09.000000000 +0000 @@ -30,175 +30,201 @@ #include "builder.h" -////////////////////////////////////////////////////////////////////////// -Value *Builder::VGATHERPS(Value* src, Value* pBase, Value* indices, Value* mask, Value* scale) +namespace SwrJit { - Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx2_gather_d_ps_256); - return CALL(func, std::initializer_list{src, pBase, indices, mask, scale}); -} - -////////////////////////////////////////////////////////////////////////// -Value *Builder::VGATHERDD(Value* src, Value* pBase, Value* indices, Value* mask, Value* scale) -{ - Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx2_gather_d_d_256); - return CALL(func, std::initializer_list{src, pBase, indices, mask, scale}); -} - -////////////////////////////////////////////////////////////////////////// -Value *Builder::VSQRTPS(Value* a) -{ - Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_sqrt_ps_256); - return CALL(func, std::initializer_list{a}); -} - -////////////////////////////////////////////////////////////////////////// -Value *Builder::VRSQRTPS(Value* a) -{ - Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_rsqrt_ps_256); - return CALL(func, std::initializer_list{a}); -} - -////////////////////////////////////////////////////////////////////////// -Value *Builder::VRCPPS(Value* a) -{ - Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_rcp_ps_256); - return CALL(func, std::initializer_list{a}); -} - -////////////////////////////////////////////////////////////////////////// -Value *Builder::VMINPS(Value* a, Value* b) -{ - Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_min_ps_256); - return CALL(func, std::initializer_list{a, b}); -} - -////////////////////////////////////////////////////////////////////////// -Value *Builder::VMAXPS(Value* a, Value* b) -{ - Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_max_ps_256); - return CALL(func, std::initializer_list{a, b}); -} - -////////////////////////////////////////////////////////////////////////// -Value *Builder::VROUND(Value* a, Value* rounding) -{ - Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_round_ps_256); - return CALL(func, std::initializer_list{a, rounding}); -} - -////////////////////////////////////////////////////////////////////////// -Value *Builder::VCMPPS(Value* a, Value* b, Value* cmpop) -{ - Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_cmp_ps_256); - return CALL(func, std::initializer_list{a, b, cmpop}); -} - -////////////////////////////////////////////////////////////////////////// -Value *Builder::VBLENDVPS(Value* a, Value* b, Value* mask) -{ - Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_blendv_ps_256); - return CALL(func, std::initializer_list{a, b, mask}); -} - -////////////////////////////////////////////////////////////////////////// -Value *Builder::BEXTR_32(Value* src, Value* control) -{ - Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_bmi_bextr_32); - return CALL(func, std::initializer_list{src, control}); -} - -////////////////////////////////////////////////////////////////////////// -Value *Builder::VMASKLOADD(Value* src, Value* mask) -{ - Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx2_maskload_d_256); - return CALL(func, std::initializer_list{src, mask}); -} + using namespace llvm; -////////////////////////////////////////////////////////////////////////// -Value *Builder::VMASKMOVPS(Value* src, Value* mask) -{ - Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_maskload_ps_256); - return CALL(func, std::initializer_list{src, mask}); -} - -////////////////////////////////////////////////////////////////////////// -Value *Builder::VPSHUFB(Value* a, Value* b) -{ - Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx2_pshuf_b); - return CALL(func, std::initializer_list{a, b}); -} - -////////////////////////////////////////////////////////////////////////// -Value *Builder::VPERMD(Value* a, Value* idx) -{ - Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx2_permd); + ////////////////////////////////////////////////////////////////////////// + Value *Builder::VGATHERPD(Value* src, Value* pBase, Value* indices, Value* mask, Value* scale) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx2_gather_d_pd_256); + return CALL(func, std::initializer_list{src, pBase, indices, mask, scale}); + } + + ////////////////////////////////////////////////////////////////////////// + Value *Builder::VGATHERPS(Value* src, Value* pBase, Value* indices, Value* mask, Value* scale) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx2_gather_d_ps_256); + return CALL(func, std::initializer_list{src, pBase, indices, mask, scale}); + } + + ////////////////////////////////////////////////////////////////////////// + Value *Builder::VGATHERDD(Value* src, Value* pBase, Value* indices, Value* mask, Value* scale) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx2_gather_d_d_256); + return CALL(func, std::initializer_list{src, pBase, indices, mask, scale}); + } + + ////////////////////////////////////////////////////////////////////////// + Value *Builder::VSQRTPS(Value* a) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_sqrt_ps_256); + return CALL(func, std::initializer_list{a}); + } + + ////////////////////////////////////////////////////////////////////////// + Value *Builder::VRSQRTPS(Value* a) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_rsqrt_ps_256); + return CALL(func, std::initializer_list{a}); + } + + ////////////////////////////////////////////////////////////////////////// + Value *Builder::VRCPPS(Value* a) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_rcp_ps_256); + return CALL(func, std::initializer_list{a}); + } + + ////////////////////////////////////////////////////////////////////////// + Value *Builder::VMINPS(Value* a, Value* b) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_min_ps_256); + return CALL(func, std::initializer_list{a, b}); + } + + ////////////////////////////////////////////////////////////////////////// + Value *Builder::VMAXPS(Value* a, Value* b) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_max_ps_256); + return CALL(func, std::initializer_list{a, b}); + } + + ////////////////////////////////////////////////////////////////////////// + Value *Builder::VROUND(Value* a, Value* rounding) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_round_ps_256); + return CALL(func, std::initializer_list{a, rounding}); + } + + ////////////////////////////////////////////////////////////////////////// + Value *Builder::VCMPPS(Value* a, Value* b, Value* cmpop) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_cmp_ps_256); + return CALL(func, std::initializer_list{a, b, cmpop}); + } + + ////////////////////////////////////////////////////////////////////////// + Value *Builder::VBLENDVPS(Value* a, Value* b, Value* mask) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_blendv_ps_256); + return CALL(func, std::initializer_list{a, b, mask}); + } + + ////////////////////////////////////////////////////////////////////////// + Value *Builder::BEXTR_32(Value* src, Value* control) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_bmi_bextr_32); + return CALL(func, std::initializer_list{src, control}); + } + + ////////////////////////////////////////////////////////////////////////// + Value *Builder::VMASKLOADD(Value* src, Value* mask) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx2_maskload_d_256); + return CALL(func, std::initializer_list{src, mask}); + } + + ////////////////////////////////////////////////////////////////////////// + Value *Builder::VMASKMOVPS(Value* src, Value* mask) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_maskload_ps_256); + return CALL(func, std::initializer_list{src, mask}); + } + + ////////////////////////////////////////////////////////////////////////// + Value *Builder::VMASKSTOREPS(Value* src, Value* mask, Value* val) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_maskstore_ps_256); + return CALL(func, std::initializer_list{src, mask, val}); + } + + ////////////////////////////////////////////////////////////////////////// + Value *Builder::VPSHUFB(Value* a, Value* b) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx2_pshuf_b); + return CALL(func, std::initializer_list{a, b}); + } + + ////////////////////////////////////////////////////////////////////////// + Value *Builder::VPERMD(Value* a, Value* idx) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx2_permd); #if (HAVE_LLVM == 0x306) && (LLVM_VERSION_PATCH == 0) - return CALL(func, std::initializer_list{idx, a}); + return CALL(func, std::initializer_list{idx, a}); #else - return CALL(func, std::initializer_list{a, idx}); + return CALL(func, std::initializer_list{a, idx}); #endif -} + } -////////////////////////////////////////////////////////////////////////// -Value *Builder::VPERMPS(Value* idx, Value* a) -{ - Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx2_permps); - return CALL(func, std::initializer_list{idx, a}); -} - -////////////////////////////////////////////////////////////////////////// -Value *Builder::VCVTPH2PS(Value* a) -{ - Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_vcvtph2ps_256); - return CALL(func, std::initializer_list{a}); -} + ////////////////////////////////////////////////////////////////////////// + Value *Builder::VPERMPS(Value* idx, Value* a) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx2_permps); + return CALL(func, std::initializer_list{idx, a}); + } + + ////////////////////////////////////////////////////////////////////////// + Value *Builder::VCVTPD2PS(Value* a) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_cvt_pd2_ps_256); + return CALL(func, std::initializer_list{a}); + } + + ////////////////////////////////////////////////////////////////////////// + Value *Builder::VCVTPH2PS(Value* a) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_vcvtph2ps_256); + return CALL(func, std::initializer_list{a}); + } + + ////////////////////////////////////////////////////////////////////////// + Value *Builder::VCVTPS2PH(Value* a, Value* round) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_vcvtps2ph_256); + return CALL(func, std::initializer_list{a, round}); + } + + ////////////////////////////////////////////////////////////////////////// + Value *Builder::VHSUBPS(Value* a, Value* b) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_hsub_ps_256); + return CALL(func, std::initializer_list{a, b}); + } + + ////////////////////////////////////////////////////////////////////////// + Value *Builder::VPTESTC(Value* a, Value* b) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_ptestc_256); + return CALL(func, std::initializer_list{a, b}); + } + + ////////////////////////////////////////////////////////////////////////// + Value *Builder::VPTESTZ(Value* a, Value* b) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_ptestz_256); + return CALL(func, std::initializer_list{a, b}); + } + + ////////////////////////////////////////////////////////////////////////// + Value *Builder::VFMADDPS(Value* a, Value* b, Value* c) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_fma_vfmadd_ps_256); + return CALL(func, std::initializer_list{a, b, c}); + } + + ////////////////////////////////////////////////////////////////////////// + Value *Builder::VMOVMSKPS(Value* a) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_movmsk_ps_256); + return CALL(func, std::initializer_list{a}); + } + + ////////////////////////////////////////////////////////////////////////// + Value *Builder::INTERRUPT(Value* a) + { + Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_int); + return CALL(func, std::initializer_list{a}); + } -////////////////////////////////////////////////////////////////////////// -Value *Builder::VCVTPS2PH(Value* a, Value* round) -{ - Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_vcvtps2ph_256); - return CALL(func, std::initializer_list{a, round}); -} - -////////////////////////////////////////////////////////////////////////// -Value *Builder::VHSUBPS(Value* a, Value* b) -{ - Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_hsub_ps_256); - return CALL(func, std::initializer_list{a, b}); } - -////////////////////////////////////////////////////////////////////////// -Value *Builder::VPTESTC(Value* a, Value* b) -{ - Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_ptestc_256); - return CALL(func, std::initializer_list{a, b}); -} - -////////////////////////////////////////////////////////////////////////// -Value *Builder::VPTESTZ(Value* a, Value* b) -{ - Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_ptestz_256); - return CALL(func, std::initializer_list{a, b}); -} - -////////////////////////////////////////////////////////////////////////// -Value *Builder::VFMADDPS(Value* a, Value* b, Value* c) -{ - Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_fma_vfmadd_ps_256); - return CALL(func, std::initializer_list{a, b, c}); -} - -////////////////////////////////////////////////////////////////////////// -Value *Builder::VMOVMSKPS(Value* a) -{ - Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_avx_movmsk_ps_256); - return CALL(func, std::initializer_list{a}); -} - -////////////////////////////////////////////////////////////////////////// -Value *Builder::INTERRUPT(Value* a) -{ - Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::x86_int); - return CALL(func, std::initializer_list{a}); -} - diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/builder_x86.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/builder_x86.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/builder_x86.h 2017-01-24 01:43:37.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/builder_x86.h 2017-06-01 10:38:09.000000000 +0000 @@ -33,6 +33,7 @@ ////////////////////////////////////////////////////////////////////////// /// Auto-generated x86 intrinsics ////////////////////////////////////////////////////////////////////////// +Value *VGATHERPD(Value* src, Value* pBase, Value* indices, Value* mask, Value* scale); Value *VGATHERPS(Value* src, Value* pBase, Value* indices, Value* mask, Value* scale); Value *VGATHERDD(Value* src, Value* pBase, Value* indices, Value* mask, Value* scale); Value *VSQRTPS(Value* a); @@ -46,9 +47,11 @@ Value *BEXTR_32(Value* src, Value* control); Value *VMASKLOADD(Value* src, Value* mask); Value *VMASKMOVPS(Value* src, Value* mask); +Value *VMASKSTOREPS(Value* src, Value* mask, Value* val); Value *VPSHUFB(Value* a, Value* b); Value *VPERMD(Value* a, Value* idx); Value *VPERMPS(Value* idx, Value* a); +Value *VCVTPD2PS(Value* a); Value *VCVTPH2PS(Value* a); Value *VCVTPS2PH(Value* a, Value* round); Value *VHSUBPS(Value* a, Value* b); diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -35,6 +35,8 @@ #include //#define FETCH_DUMP_VERTEX 1 +using namespace llvm; +using namespace SwrJit; bool isComponentEnabled(ComponentEnable enableMask, uint8_t component); @@ -44,6 +46,7 @@ CONVERT_NORMALIZED, CONVERT_USCALED, CONVERT_SSCALED, + CONVERT_SFIXED, }; ////////////////////////////////////////////////////////////////////////// @@ -61,27 +64,27 @@ // package up Shuffle*bpcGatherd args into a tuple for convenience typedef std::tuple Shuffle8bpcArgs; + const uint32_t(&)[4]> Shuffle8bpcArgs; void Shuffle8bpcGatherd(Shuffle8bpcArgs &args); typedef std::tuple Shuffle16bpcArgs; + uint32_t&, uint32_t&, const ComponentEnable, const ComponentControl(&)[4], Value*(&)[4]> Shuffle16bpcArgs; void Shuffle16bpcGather(Shuffle16bpcArgs &args); void StoreVertexElements(Value* pVtxOut, const uint32_t outputElt, const uint32_t numEltsToStore, Value* (&vVertexElements)[4]); Value* GenerateCompCtrlVector(const ComponentControl ctrl); - void JitLoadVertices(const FETCH_COMPILE_STATE &fetchState, Value* fetchInfo, Value* streams, Value* vIndices, Value* pVtxOut); - void JitGatherVertices(const FETCH_COMPILE_STATE &fetchState, Value* fetchInfo, Value* streams, Value* vIndices, Value* pVtxOut); + void JitLoadVertices(const FETCH_COMPILE_STATE &fetchState, Value* streams, Value* vIndices, Value* pVtxOut); + void JitGatherVertices(const FETCH_COMPILE_STATE &fetchState, Value* streams, Value* vIndices, Value* pVtxOut); bool IsOddFormat(SWR_FORMAT format); bool IsUniformFormat(SWR_FORMAT format); void UnpackComponents(SWR_FORMAT format, Value* vInput, Value* result[4]); - void CreateGatherOddFormats(SWR_FORMAT format, Value* pBase, Value* offsets, Value* result[4]); + void CreateGatherOddFormats(SWR_FORMAT format, Value* pMask, Value* pBase, Value* offsets, Value* result[4]); void ConvertFormat(SWR_FORMAT format, Value *texels[4]); + Value* mpFetchInfo; }; Function* FetchJit::Create(const FETCH_COMPILE_STATE& fetchState) @@ -96,11 +99,11 @@ IRB()->SetInsertPoint(entry); - auto argitr = fetch->getArgumentList().begin(); + auto argitr = fetch->arg_begin(); // Fetch shader arguments - Value* fetchInfo = &*argitr; ++argitr; - fetchInfo->setName("fetchInfo"); + mpFetchInfo = &*argitr; ++argitr; + mpFetchInfo->setName("fetchInfo"); Value* pVtxOut = &*argitr; pVtxOut->setName("vtxOutput"); // this is just shorthand to tell LLVM to get a pointer to the base address of simdvertex @@ -114,15 +117,15 @@ pVtxOut = BITCAST(pVtxOut, PointerType::get(VectorType::get(mFP32Ty, mVWidth), 0)); // SWR_FETCH_CONTEXT::pStreams - Value* streams = LOAD(fetchInfo,{0, SWR_FETCH_CONTEXT_pStreams}); + Value* streams = LOAD(mpFetchInfo,{0, SWR_FETCH_CONTEXT_pStreams}); streams->setName("pStreams"); // SWR_FETCH_CONTEXT::pIndices - Value* indices = LOAD(fetchInfo,{0, SWR_FETCH_CONTEXT_pIndices}); + Value* indices = LOAD(mpFetchInfo,{0, SWR_FETCH_CONTEXT_pIndices}); indices->setName("pIndices"); // SWR_FETCH_CONTEXT::pLastIndex - Value* pLastIndex = LOAD(fetchInfo,{0, SWR_FETCH_CONTEXT_pLastIndex}); + Value* pLastIndex = LOAD(mpFetchInfo,{0, SWR_FETCH_CONTEXT_pLastIndex}); pLastIndex->setName("pLastIndex"); @@ -158,27 +161,39 @@ default: SWR_ASSERT(0, "Unsupported index type"); vIndices = nullptr; break; } + Value* vVertexId = vIndices; + if (fetchState.bVertexIDOffsetEnable) + { + // Assuming one of baseVertex or startVertex is 0, so adding both should be functionally correct + Value* vBaseVertex = VBROADCAST(LOAD(mpFetchInfo, { 0, SWR_FETCH_CONTEXT_BaseVertex })); + Value* vStartVertex = VBROADCAST(LOAD(mpFetchInfo, { 0, SWR_FETCH_CONTEXT_StartVertex })); + vVertexId = ADD(vIndices, vBaseVertex); + vVertexId = ADD(vVertexId, vStartVertex); + } + // store out vertex IDs - STORE(vIndices, GEP(fetchInfo, { 0, SWR_FETCH_CONTEXT_VertexID })); + STORE(vVertexId, GEP(mpFetchInfo, { 0, SWR_FETCH_CONTEXT_VertexID })); // store out cut mask if enabled if (fetchState.bEnableCutIndex) { Value* vCutIndex = VIMMED1(fetchState.cutIndex); Value* cutMask = VMASK(ICMP_EQ(vIndices, vCutIndex)); - STORE(cutMask, GEP(fetchInfo, { 0, SWR_FETCH_CONTEXT_CutMask })); + STORE(cutMask, GEP(mpFetchInfo, { 0, SWR_FETCH_CONTEXT_CutMask })); } // Fetch attributes from memory and output to a simdvertex struct // since VGATHER has a perf penalty on HSW vs BDW, allow client to choose which fetch method to use - (fetchState.bDisableVGATHER) ? JitLoadVertices(fetchState, fetchInfo, streams, vIndices, pVtxOut) - : JitGatherVertices(fetchState, fetchInfo, streams, vIndices, pVtxOut); + (fetchState.bDisableVGATHER) ? JitLoadVertices(fetchState, streams, vIndices, pVtxOut) + : JitGatherVertices(fetchState, streams, vIndices, pVtxOut); RET_VOID(); JitManager::DumpToFile(fetch, "src"); +#if defined(_DEBUG) verifyFunction(*fetch); +#endif ::FunctionPassManager setupPasses(JM()->mpCurrentModule); @@ -215,12 +230,12 @@ /// @brief Loads attributes from memory using LOADs, shuffling the /// components into SOA form. /// *Note* currently does not support component control, -/// component packing, instancing, InstanceID SGVs, or VertexID SGVs +/// component packing, instancing /// @param fetchState - info about attributes to be fetched from memory /// @param streams - value pointer to the current vertex stream /// @param vIndices - vector value of indices to load /// @param pVtxOut - value pointer to output simdvertex struct -void FetchJit::JitLoadVertices(const FETCH_COMPILE_STATE &fetchState, Value* fetchInfo, Value* streams, Value* vIndices, Value* pVtxOut) +void FetchJit::JitLoadVertices(const FETCH_COMPILE_STATE &fetchState, Value* streams, Value* vIndices, Value* pVtxOut) { // Zack shuffles; a variant of the Charleston. @@ -233,10 +248,10 @@ Constant* promoteMask = ConstantVector::get(pMask); Constant* uwvec = UndefValue::get(VectorType::get(mFP32Ty, 4)); - Value* startVertex = LOAD(fetchInfo, {0, SWR_FETCH_CONTEXT_StartVertex}); - Value* startInstance = LOAD(fetchInfo, {0, SWR_FETCH_CONTEXT_StartInstance}); - Value* curInstance = LOAD(fetchInfo, {0, SWR_FETCH_CONTEXT_CurInstance}); - Value* vBaseVertex = VBROADCAST(LOAD(fetchInfo, {0, SWR_FETCH_CONTEXT_BaseVertex})); + Value* startVertex = LOAD(mpFetchInfo, {0, SWR_FETCH_CONTEXT_StartVertex}); + Value* startInstance = LOAD(mpFetchInfo, {0, SWR_FETCH_CONTEXT_StartInstance}); + Value* curInstance = LOAD(mpFetchInfo, {0, SWR_FETCH_CONTEXT_CurInstance}); + Value* vBaseVertex = VBROADCAST(LOAD(mpFetchInfo, {0, SWR_FETCH_CONTEXT_BaseVertex})); curInstance->setName("curInstance"); for(uint32_t nelt = 0; nelt < fetchState.numAttribs; ++nelt) @@ -248,6 +263,9 @@ uint32_t numComponents = info.numComps; uint32_t bpc = info.bpp / info.numComps; ///@todo Code below assumes all components are same size. Need to fix. + // load path doesn't support component packing + SWR_ASSERT(ied.ComponentPacking == ComponentEnable::XYZW, "Fetch load path doesn't support component packing."); + vectors.clear(); Value *vCurIndices; @@ -407,6 +425,9 @@ case SWR_TYPE_SSCALED: vec = SI_TO_FP(vec, VectorType::get(mFP32Ty, 4)); break; + case SWR_TYPE_SFIXED: + vec = FMUL(SI_TO_FP(vec, VectorType::get(mFP32Ty, 4)), VBROADCAST(C(1/65536.0f))); + break; case SWR_TYPE_UNKNOWN: case SWR_TYPE_UNUSED: SWR_ASSERT(false, "Unsupported type %d!", info.type[0]); @@ -498,7 +519,7 @@ bool FetchJit::IsOddFormat(SWR_FORMAT format) { const SWR_FORMAT_INFO& info = GetFormatInfo(format); - if (info.bpc[0] != 8 && info.bpc[0] != 16 && info.bpc[0] != 32) + if (info.bpc[0] != 8 && info.bpc[0] != 16 && info.bpc[0] != 32 && info.bpc[0] != 64) { return true; } @@ -547,7 +568,7 @@ // gather for odd component size formats // gather SIMD full pixels per lane then shift/mask to move each component to their // own vector -void FetchJit::CreateGatherOddFormats(SWR_FORMAT format, Value* pBase, Value* offsets, Value* result[4]) +void FetchJit::CreateGatherOddFormats(SWR_FORMAT format, Value* pMask, Value* pBase, Value* offsets, Value* result[4]) { const SWR_FORMAT_INFO &info = GetFormatInfo(format); @@ -562,23 +583,34 @@ result[comp] = VIMMED1((int)info.defaults[comp]); } + // load the proper amount of data based on component size + PointerType* pLoadTy = nullptr; + switch (info.bpp) + { + case 8: pLoadTy = Type::getInt8PtrTy(JM()->mContext); break; + case 16: pLoadTy = Type::getInt16PtrTy(JM()->mContext); break; + case 24: + case 32: pLoadTy = Type::getInt32PtrTy(JM()->mContext); break; + default: SWR_ASSERT(0); + } + + // allocate temporary memory for masked off lanes + Value* pTmp = ALLOCA(pLoadTy->getElementType()); + // gather SIMD pixels for (uint32_t e = 0; e < JM()->mVWidth; ++e) { - Value* elemOffset = VEXTRACT(offsets, C(e)); - Value* load = GEP(pBase, elemOffset); + Value* pElemOffset = VEXTRACT(offsets, C(e)); + Value* pLoad = GEP(pBase, pElemOffset); + Value* pLaneMask = VEXTRACT(pMask, C(e)); - // load the proper amount of data based on component size - switch (info.bpp) - { - case 8: load = POINTER_CAST(load, Type::getInt8PtrTy(JM()->mContext)); break; - case 16: load = POINTER_CAST(load, Type::getInt16PtrTy(JM()->mContext)); break; - case 32: load = POINTER_CAST(load, Type::getInt32PtrTy(JM()->mContext)); break; - default: SWR_ASSERT(0); - } + pLoad = POINTER_CAST(pLoad, pLoadTy); + + // mask in tmp pointer for disabled lanes + pLoad = SELECT(pLaneMask, pLoad, pTmp); // load pixel - Value *val = LOAD(load); + Value *val = LOAD(pLoad); // zero extend to 32bit integer val = INT_CAST(val, mInt32Ty, false); @@ -658,26 +690,32 @@ ////////////////////////////////////////////////////////////////////////// /// @brief Loads attributes from memory using AVX2 GATHER(s) /// @param fetchState - info about attributes to be fetched from memory -/// @param fetchInfo - first argument passed to fetch shader /// @param streams - value pointer to the current vertex stream /// @param vIndices - vector value of indices to gather /// @param pVtxOut - value pointer to output simdvertex struct -void FetchJit::JitGatherVertices(const FETCH_COMPILE_STATE &fetchState, Value* fetchInfo, +void FetchJit::JitGatherVertices(const FETCH_COMPILE_STATE &fetchState, Value* streams, Value* vIndices, Value* pVtxOut) { uint32_t currentVertexElement = 0; uint32_t outputElt = 0; Value* vVertexElements[4]; - Value* startVertex = LOAD(fetchInfo, {0, SWR_FETCH_CONTEXT_StartVertex}); - Value* startInstance = LOAD(fetchInfo, {0, SWR_FETCH_CONTEXT_StartInstance}); - Value* curInstance = LOAD(fetchInfo, {0, SWR_FETCH_CONTEXT_CurInstance}); - Value* vBaseVertex = VBROADCAST(LOAD(fetchInfo, {0, SWR_FETCH_CONTEXT_BaseVertex})); + Value* startVertex = LOAD(mpFetchInfo, {0, SWR_FETCH_CONTEXT_StartVertex}); + Value* startInstance = LOAD(mpFetchInfo, {0, SWR_FETCH_CONTEXT_StartInstance}); + Value* curInstance = LOAD(mpFetchInfo, {0, SWR_FETCH_CONTEXT_CurInstance}); + Value* vBaseVertex = VBROADCAST(LOAD(mpFetchInfo, {0, SWR_FETCH_CONTEXT_BaseVertex})); curInstance->setName("curInstance"); for(uint32_t nInputElt = 0; nInputElt < fetchState.numAttribs; ++nInputElt) { const INPUT_ELEMENT_DESC& ied = fetchState.layout[nInputElt]; + + // skip element if all components are disabled + if (ied.ComponentPacking == ComponentEnable::NONE) + { + continue; + } + const SWR_FORMAT_INFO &info = GetFormatInfo((SWR_FORMAT)ied.Format); SWR_ASSERT((info.bpp != 0), "Unsupported format in JitGatherVertices."); uint32_t bpc = info.bpp / info.numComps; ///@todo Code below assumes all components are same size. Need to fix. @@ -745,6 +783,10 @@ // is the element is <= the partially valid size Value* vElementInBoundsMask = ICMP_SLE(vBpp, SUB(vPartialVertexSize, vAlignmentOffsets)); + // override cur indices with 0 if pitch is 0 + Value* pZeroPitchMask = ICMP_EQ(vStride, VIMMED1(0)); + vCurIndices = SELECT(pZeroPitchMask, VIMMED1(0), vCurIndices); + // are vertices partially OOB? Value* vMaxVertex = VBROADCAST(maxVertex); Value* vPartialOOBMask = ICMP_EQ(vCurIndices, vMaxVertex); @@ -754,6 +796,7 @@ // blend in any partially OOB indices that have valid elements vGatherMask = SELECT(vPartialOOBMask, vElementInBoundsMask, vGatherMask); + Value* pMask = vGatherMask; vGatherMask = VMASK(vGatherMask); // calculate the actual offsets into the VB @@ -768,31 +811,23 @@ // Special gather/conversion for formats without equal component sizes if (IsOddFormat((SWR_FORMAT)ied.Format)) { - // Only full 4 component fetch is supported for odd formats - SWR_ASSERT(compMask == XYZW); Value* pResults[4]; - CreateGatherOddFormats((SWR_FORMAT)ied.Format, pStreamBase, vOffsets, pResults); + CreateGatherOddFormats((SWR_FORMAT)ied.Format, pMask, pStreamBase, vOffsets, pResults); ConvertFormat((SWR_FORMAT)ied.Format, pResults); - // check for InstanceID SGV - if (fetchState.InstanceIdEnable && (fetchState.InstanceIdElementOffset == nInputElt)) + for (uint32_t c = 0; c < 4; ++c) { - SWR_ASSERT(fetchState.InstanceIdComponentNumber < (sizeof(pResults) / sizeof(pResults[0]))); - - // Load a SIMD of InstanceIDs - pResults[fetchState.InstanceIdComponentNumber] = VBROADCAST(LOAD(GEP(fetchInfo, { 0, SWR_FETCH_CONTEXT_CurInstance }))); // InstanceID - } - // check for VertexID SGV - else if (fetchState.VertexIdEnable && (fetchState.VertexIdElementOffset == nInputElt)) - { - SWR_ASSERT(fetchState.VertexIdComponentNumber < (sizeof(pResults) / sizeof(pResults[0]))); - - // Load a SIMD of VertexIDs - pResults[fetchState.VertexIdComponentNumber] = LOAD(GEP(fetchInfo, { 0, SWR_FETCH_CONTEXT_VertexID })); + if (isComponentEnabled(compMask, c)) + { + vVertexElements[currentVertexElement++] = pResults[c]; + if (currentVertexElement > 3) + { + StoreVertexElements(pVtxOut, outputElt++, 4, vVertexElements); + // reset to the next vVertexElement to output + currentVertexElement = 0; + } + } } - - StoreVertexElements(pVtxOut, outputElt++, 4, pResults); - currentVertexElement = 0; } else if(info.type[0] == SWR_TYPE_FLOAT) { @@ -837,12 +872,8 @@ // if we have at least one component to shuffle into place if(compMask){ - const bool instanceIdEnable = (fetchState.InstanceIdEnable) && (fetchState.InstanceIdElementOffset == nInputElt); - const bool vertexIdEnable = (fetchState.VertexIdEnable) && (fetchState.VertexIdElementOffset == nInputElt); - Shuffle16bpcArgs args = std::forward_as_tuple(vGatherResult, pVtxOut, Instruction::CastOps::FPExt, CONVERT_NONE, - currentVertexElement, outputElt, compMask, compCtrl, vVertexElements, fetchInfo, instanceIdEnable, - fetchState.InstanceIdComponentNumber, vertexIdEnable, fetchState.VertexIdComponentNumber); + currentVertexElement, outputElt, compMask, compCtrl, vVertexElements); // Shuffle gathered components into place in simdvertex struct Shuffle16bpcGather(args); // outputs to vVertexElements ref @@ -855,20 +886,8 @@ { if (isComponentEnabled(compMask, i)) { - // check for InstanceID SGV - if ((fetchState.InstanceIdEnable) && (fetchState.InstanceIdElementOffset == nInputElt) && (fetchState.InstanceIdComponentNumber == currentVertexElement)) - { - // Load a SIMD of InstanceIDs - vVertexElements[currentVertexElement++] = VBROADCAST(LOAD(GEP(fetchInfo, { 0, SWR_FETCH_CONTEXT_CurInstance }))); // InstanceID - } - // check for VertexID SGV - else if ((fetchState.VertexIdEnable) && (fetchState.VertexIdElementOffset == nInputElt) && (fetchState.VertexIdComponentNumber == currentVertexElement)) - { - // Load a SIMD of VertexIDs - vVertexElements[currentVertexElement++] = LOAD(GEP(fetchInfo, { 0, SWR_FETCH_CONTEXT_VertexID })); - } // if we need to gather the component - else if (compCtrl[i] == StoreSrc) + if (compCtrl[i] == StoreSrc) { // save mask as it is zero'd out after each gather Value *vMask = vGatherMask; @@ -895,6 +914,58 @@ } } break; + case 64: + { + for (uint32_t i = 0; i < 4; i++) + { + if (isComponentEnabled(compMask, i)) + { + // if we need to gather the component + if (compCtrl[i] == StoreSrc) + { + Value *vMaskLo = VSHUFFLE(pMask, VUNDEF(mInt1Ty, 8), C({0, 1, 2, 3})); + Value *vMaskHi = VSHUFFLE(pMask, VUNDEF(mInt1Ty, 8), C({4, 5, 6, 7})); + vMaskLo = S_EXT(vMaskLo, VectorType::get(mInt64Ty, 4)); + vMaskHi = S_EXT(vMaskHi, VectorType::get(mInt64Ty, 4)); + vMaskLo = BITCAST(vMaskLo, VectorType::get(mDoubleTy, 4)); + vMaskHi = BITCAST(vMaskHi, VectorType::get(mDoubleTy, 4)); + + Value *vOffsetsLo = VEXTRACTI128(vOffsets, C(0)); + Value *vOffsetsHi = VEXTRACTI128(vOffsets, C(1)); + + Value *vZeroDouble = VECTOR_SPLAT(4, ConstantFP::get(IRB()->getDoubleTy(), 0.0f)); + + Value* pGatherLo = GATHERPD(vZeroDouble, + pStreamBase, vOffsetsLo, vMaskLo, C((char)1)); + Value* pGatherHi = GATHERPD(vZeroDouble, + pStreamBase, vOffsetsHi, vMaskHi, C((char)1)); + + pGatherLo = VCVTPD2PS(pGatherLo); + pGatherHi = VCVTPD2PS(pGatherHi); + + Value *pGather = VSHUFFLE(pGatherLo, pGatherHi, C({0, 1, 2, 3, 4, 5, 6, 7})); + + vVertexElements[currentVertexElement++] = pGather; + } + else + { + vVertexElements[currentVertexElement++] = GenerateCompCtrlVector(compCtrl[i]); + } + + if (currentVertexElement > 3) + { + StoreVertexElements(pVtxOut, outputElt++, 4, vVertexElements); + // reset to the next vVertexElement to output + currentVertexElement = 0; + } + + } + + // offset base to the next component in the vertex to gather + pStreamBase = GEP(pStreamBase, C((char)8)); + } + } + break; default: SWR_ASSERT(0, "Tried to fetch invalid FP format"); break; @@ -928,6 +999,10 @@ conversionType = CONVERT_SSCALED; extendCastType = Instruction::CastOps::SIToFP; break; + case SWR_TYPE_SFIXED: + conversionType = CONVERT_SFIXED; + extendCastType = Instruction::CastOps::SExt; + break; default: break; } @@ -948,12 +1023,8 @@ // 256i - 0 1 2 3 4 5 6 7 // xyzw xyzw xyzw xyzw xyzw xyzw xyzw xyzw - const bool instanceIdEnable = fetchState.InstanceIdEnable && (fetchState.InstanceIdElementOffset == nInputElt); - const bool vertexIdEnable = fetchState.VertexIdEnable && (fetchState.VertexIdElementOffset == nInputElt); - Shuffle8bpcArgs args = std::forward_as_tuple(vGatherResult, pVtxOut, extendCastType, conversionType, - currentVertexElement, outputElt, compMask, compCtrl, vVertexElements, info.swizzle, fetchInfo, - instanceIdEnable, fetchState.InstanceIdComponentNumber, vertexIdEnable, fetchState.VertexIdComponentNumber); + currentVertexElement, outputElt, compMask, compCtrl, vVertexElements, info.swizzle); // Shuffle gathered components into place in simdvertex struct Shuffle8bpcGatherd(args); // outputs to vVertexElements ref @@ -992,12 +1063,8 @@ // if we have at least one component to shuffle into place if(compMask){ - const bool instanceIdEnable = fetchState.InstanceIdEnable && (fetchState.InstanceIdElementOffset == nInputElt); - const bool vertexIdEnable = fetchState.VertexIdEnable && (fetchState.VertexIdElementOffset == nInputElt); - Shuffle16bpcArgs args = std::forward_as_tuple(vGatherResult, pVtxOut, extendCastType, conversionType, - currentVertexElement, outputElt, compMask, compCtrl, vVertexElements, fetchInfo, instanceIdEnable, - fetchState.InstanceIdComponentNumber, vertexIdEnable, fetchState.VertexIdComponentNumber); + currentVertexElement, outputElt, compMask, compCtrl, vVertexElements); // Shuffle gathered components into place in simdvertex struct Shuffle16bpcGather(args); // outputs to vVertexElements ref @@ -1006,33 +1073,33 @@ break; case 32: { - SWR_ASSERT(conversionType == CONVERT_NONE); - // Gathered components into place in simdvertex struct for (uint32_t i = 0; i < 4; i++) { if (isComponentEnabled(compMask, i)) { - // check for InstanceID SGV - if (fetchState.InstanceIdEnable && (fetchState.InstanceIdElementOffset == nInputElt) && (fetchState.InstanceIdComponentNumber == currentVertexElement)) - { - // Load a SIMD of InstanceIDs - vVertexElements[currentVertexElement++] = VBROADCAST(LOAD(GEP(fetchInfo, { 0, SWR_FETCH_CONTEXT_CurInstance }))); // InstanceID - } - // check for VertexID SGV - else if (fetchState.VertexIdEnable && (fetchState.VertexIdElementOffset == nInputElt) && (fetchState.VertexIdComponentNumber == currentVertexElement)) - { - // Load a SIMD of VertexIDs - vVertexElements[currentVertexElement++] = LOAD(GEP(fetchInfo, { 0, SWR_FETCH_CONTEXT_VertexID })); - } // if we need to gather the component - else if (compCtrl[i] == StoreSrc) + if (compCtrl[i] == StoreSrc) { // save mask as it is zero'd out after each gather Value *vMask = vGatherMask; - vVertexElements[currentVertexElement++] = GATHERDD(gatherSrc, pStreamBase, vOffsets, vMask, C((char)1)); + Value* pGather = GATHERDD(gatherSrc, pStreamBase, vOffsets, vMask, C((char)1)); + + if (conversionType == CONVERT_USCALED) + { + pGather = UI_TO_FP(pGather, mSimdFP32Ty); + } + else if (conversionType == CONVERT_SSCALED) + { + pGather = SI_TO_FP(pGather, mSimdFP32Ty); + } + else if (conversionType == CONVERT_SFIXED) + { + pGather = FMUL(SI_TO_FP(pGather, mSimdFP32Ty), VBROADCAST(C(1/65536.0f))); + } + vVertexElements[currentVertexElement++] = pGather; // e.g. result of a single 8x32bit integer gather for 32bit components // 256i - 0 1 2 3 4 5 6 7 // xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx @@ -1062,7 +1129,7 @@ // if we have a partially filled vVertexElement struct, output it if(currentVertexElement > 0){ - StoreVertexElements(pVtxOut, outputElt++, currentVertexElement+1, vVertexElements); + StoreVertexElements(pVtxOut, outputElt++, currentVertexElement, vVertexElements); } } @@ -1187,11 +1254,6 @@ /// @param compCtrl - component control val /// @param vVertexElements[4] - vertex components to output /// @param swizzle[4] - component swizzle location -/// @param fetchInfo - fetch shader info -/// @param instanceIdEnable - InstanceID enabled? -/// @param instanceIdComponentNumber - InstanceID component override -/// @param vertexIdEnable - VertexID enabled? -/// @param vertexIdComponentNumber - VertexID component override void FetchJit::Shuffle8bpcGatherd(Shuffle8bpcArgs &args) { // Unpack tuple args @@ -1205,11 +1267,6 @@ const ComponentControl (&compCtrl)[4] = std::get<7>(args); Value* (&vVertexElements)[4] = std::get<8>(args); const uint32_t (&swizzle)[4] = std::get<9>(args); - Value *fetchInfo = std::get<10>(args); - const bool instanceIdEnable = std::get<11>(args); - const uint32_t instanceIdComponentNumber = std::get<12>(args); - const bool vertexIdEnable = std::get<13>(args); - const uint32_t vertexIdComponentNumber = std::get<14>(args); // cast types Type* vGatherTy = mSimdInt32Ty; @@ -1280,19 +1337,7 @@ { if (isComponentEnabled(compMask, i)) { - // check for InstanceID SGV - if (instanceIdEnable && (instanceIdComponentNumber == currentVertexElement)) - { - // Load a SIMD of InstanceIDs - vVertexElements[currentVertexElement++] = VBROADCAST(LOAD(GEP(fetchInfo, { 0, SWR_FETCH_CONTEXT_CurInstance }))); // InstanceID - } - // check for VertexID SGV - else if (vertexIdEnable && (vertexIdComponentNumber == currentVertexElement)) - { - // Load a SIMD of VertexIDs - vVertexElements[currentVertexElement++] = LOAD(GEP(fetchInfo, { 0, SWR_FETCH_CONTEXT_VertexID })); - } - else if (compCtrl[i] == ComponentControl::StoreSrc) + if (compCtrl[i] == ComponentControl::StoreSrc) { // if x or z, extract 128bits from lane 0, else for y or w, extract from lane 1 uint32_t lane = ((i == 0) || (i == 2)) ? 0 : 1; @@ -1355,19 +1400,7 @@ { if (isComponentEnabled(compMask, i)) { - // check for InstanceID SGV - if (instanceIdEnable && (instanceIdComponentNumber == currentVertexElement)) - { - // Load a SIMD of InstanceIDs - vVertexElements[currentVertexElement++] = VBROADCAST(LOAD(GEP(fetchInfo, { 0, SWR_FETCH_CONTEXT_CurInstance }))); // InstanceID - } - // check for VertexID SGV - else if (vertexIdEnable && (vertexIdComponentNumber == currentVertexElement)) - { - // Load a SIMD of VertexIDs - vVertexElements[currentVertexElement++] = LOAD(GEP(fetchInfo, { 0, SWR_FETCH_CONTEXT_VertexID })); - } - else if (compCtrl[i] == ComponentControl::StoreSrc) + if (compCtrl[i] == ComponentControl::StoreSrc) { // pshufb masks for each component Value* vConstMask; @@ -1444,11 +1477,6 @@ /// @param compMask - component packing mask /// @param compCtrl - component control val /// @param vVertexElements[4] - vertex components to output -/// @param fetchInfo - fetch shader info -/// @param instanceIdEnable - InstanceID enabled? -/// @param instanceIdComponentNumber - InstanceID component override -/// @param vertexIdEnable - VertexID enabled? -/// @param vertexIdComponentNumber - VertexID component override void FetchJit::Shuffle16bpcGather(Shuffle16bpcArgs &args) { // Unpack tuple args @@ -1461,11 +1489,6 @@ const ComponentEnable compMask = std::get<6>(args); const ComponentControl(&compCtrl)[4] = std::get<7>(args); Value* (&vVertexElements)[4] = std::get<8>(args); - Value *fetchInfo = std::get<9>(args); - const bool instanceIdEnable = std::get<10>(args); - const uint32_t instanceIdComponentNumber = std::get<11>(args); - const bool vertexIdEnable = std::get<12>(args); - const uint32_t vertexIdComponentNumber = std::get<13>(args); // cast types Type* vGatherTy = VectorType::get(IntegerType::getInt32Ty(JM()->mContext), mVWidth); @@ -1533,19 +1556,7 @@ { if (isComponentEnabled(compMask, i)) { - // check for InstanceID SGV - if (instanceIdEnable && (instanceIdComponentNumber == currentVertexElement)) - { - // Load a SIMD of InstanceIDs - vVertexElements[currentVertexElement++] = VBROADCAST(LOAD(GEP(fetchInfo, { 0, SWR_FETCH_CONTEXT_CurInstance }))); // InstanceID - } - // check for VertexID SGV - else if (vertexIdEnable && (vertexIdComponentNumber == currentVertexElement)) - { - // Load a SIMD of VertexIDs - vVertexElements[currentVertexElement++] = LOAD(GEP(fetchInfo, { 0, SWR_FETCH_CONTEXT_VertexID })); - } - else if (compCtrl[i] == ComponentControl::StoreSrc) + if (compCtrl[i] == ComponentControl::StoreSrc) { // if x or z, extract 128bits from lane 0, else for y or w, extract from lane 1 uint32_t lane = ((i == 0) || (i == 2)) ? 0 : 1; @@ -1627,19 +1638,7 @@ { if (isComponentEnabled(compMask, i)) { - // check for InstanceID SGV - if (instanceIdEnable && (instanceIdComponentNumber == currentVertexElement)) - { - // Load a SIMD of InstanceIDs - vVertexElements[currentVertexElement++] = VBROADCAST(LOAD(GEP(fetchInfo, { 0, SWR_FETCH_CONTEXT_CurInstance }))); // InstanceID - } - // check for VertexID SGV - else if (vertexIdEnable && (vertexIdComponentNumber == currentVertexElement)) - { - // Load a SIMD of VertexIDs - vVertexElements[currentVertexElement++] = LOAD(GEP(fetchInfo, { 0, SWR_FETCH_CONTEXT_VertexID })); - } - else if (compCtrl[i] == ComponentControl::StoreSrc) + if (compCtrl[i] == ComponentControl::StoreSrc) { // select correct constMask for x/z or y/w pshufb uint32_t selectedMask = ((i == 0) || (i == 2)) ? 0 : 1; @@ -1686,6 +1685,8 @@ /// @param vVertexElements - LLVM Value*[] simdvertex to write out void FetchJit::StoreVertexElements(Value* pVtxOut, const uint32_t outputElt, const uint32_t numEltsToStore, Value* (&vVertexElements)[4]) { + SWR_ASSERT(numEltsToStore <= 4, "Invalid element count."); + for(uint32_t c = 0; c < numEltsToStore; ++c) { // STORE expects FP32 x vWidth type, just bitcast if needed @@ -1720,6 +1721,16 @@ case Store0: return VIMMED1(0); case Store1Fp: return VIMMED1(1.0f); case Store1Int: return VIMMED1(1); + case StoreVertexId: + { + Value* pId = BITCAST(LOAD(GEP(mpFetchInfo, { 0, SWR_FETCH_CONTEXT_VertexID })), mSimdFP32Ty); + return VBROADCAST(pId); + } + case StoreInstanceId: + { + Value* pId = BITCAST(LOAD(GEP(mpFetchInfo, { 0, SWR_FETCH_CONTEXT_CurInstance })), mFP32Ty); + return VBROADCAST(pId); + } case StoreSrc: default: SWR_ASSERT(0, "Invalid component control"); return VUNDEF_I(); } @@ -1771,6 +1782,8 @@ fclose(fd); #endif + pJitMgr->DumpAsm(const_cast(func), "final"); + return pfnFetch; } diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.h 2017-06-01 10:37:10.000000000 +0000 @@ -80,11 +80,13 @@ enum ComponentControl { - NoStore = 0, - StoreSrc = 1, - Store0 = 2, - Store1Fp = 3, - Store1Int = 4, + NoStore = 0, + StoreSrc = 1, + Store0 = 2, + Store1Fp = 3, + Store1Int = 4, + StoreVertexId = 5, + StoreInstanceId = 6 }; ////////////////////////////////////////////////////////////////////////// @@ -97,17 +99,11 @@ SWR_FORMAT indexType; uint32_t cutIndex{ 0xffffffff }; - bool InstanceIdEnable; - uint32_t InstanceIdElementOffset; - uint32_t InstanceIdComponentNumber; - bool VertexIdEnable; - uint32_t VertexIdElementOffset; - uint32_t VertexIdComponentNumber; - // Options that effect the JIT'd code - bool bDisableVGATHER; // if enabled, FetchJit will generate loads/shuffles instead of VGATHERs - bool bDisableIndexOOBCheck; // if enabled, FetchJit will exclude index OOB check - bool bEnableCutIndex{ false }; // compares indices with the cut index and returns a cut mask + bool bDisableVGATHER; // If enabled, FetchJit will generate loads/shuffles instead of VGATHERs + bool bDisableIndexOOBCheck; // If enabled, FetchJit will exclude index OOB check + bool bEnableCutIndex{ false }; // Compares indices with the cut index and returns a cut mask + bool bVertexIDOffsetEnable{ false }; // Offset vertexID by StartVertex for non-indexed draws or BaseVertex for indexed draws FETCH_COMPILE_STATE(bool disableVGATHER = false, bool diableIndexOOBCheck = false): bDisableVGATHER(disableVGATHER), bDisableIndexOOBCheck(diableIndexOOBCheck){ }; @@ -120,19 +116,7 @@ if (bDisableIndexOOBCheck != other.bDisableIndexOOBCheck) return false; if (bEnableCutIndex != other.bEnableCutIndex) return false; if (cutIndex != other.cutIndex) return false; - - if (InstanceIdEnable != other.InstanceIdEnable) return false; - if (InstanceIdEnable) - { - if (InstanceIdComponentNumber != other.InstanceIdComponentNumber) return false; - if (InstanceIdElementOffset != other.InstanceIdElementOffset) return false; - } - if (VertexIdEnable != other.VertexIdEnable) return false; - if (VertexIdEnable) - { - if (VertexIdComponentNumber != other.VertexIdComponentNumber) return false; - if (VertexIdElementOffset != other.VertexIdElementOffset) return false; - } + if (bVertexIDOffsetEnable != other.bVertexIDOffsetEnable) return false; for(uint32_t i = 0; i < numAttribs; ++i) { diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/jit_api.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/jit_api.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/jit_api.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/jit_api.h 2017-06-01 10:37:10.000000000 +0000 @@ -47,8 +47,7 @@ #define JITCALL #endif -extern "C" -{ + struct ShaderInfo; @@ -64,9 +63,12 @@ bool enableJitSampler; }; +extern "C" +{ + ////////////////////////////////////////////////////////////////////////// /// @brief Create JIT context. -HANDLE JITCALL JitCreateContext(uint32_t targetSimdWidth, const char* arch); +HANDLE JITCALL JitCreateContext(uint32_t targetSimdWidth, const char* arch, const char* core); ////////////////////////////////////////////////////////////////////////// /// @brief Destroy JIT context. @@ -107,5 +109,5 @@ /// @param state - blend state to build function from PFN_BLEND_JIT_FUNC JITCALL JitCompileBlend(HANDLE hJitContext, const BLEND_COMPILE_STATE& state); +} -}; // extern "C" diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/JitManager.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/JitManager.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/JitManager.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/JitManager.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -72,11 +72,12 @@ #endif using namespace llvm; +using namespace SwrJit; ////////////////////////////////////////////////////////////////////////// /// @brief Contructor for JitManager. /// @param simdWidth - SIMD width to be used in generated program. -JitManager::JitManager(uint32_t simdWidth, const char *arch) +JitManager::JitManager(uint32_t simdWidth, const char *arch, const char* core) : mContext(), mBuilder(mContext), mIsModuleFinalized(true), mJitNumber(0), mVWidth(simdWidth), mArch(arch) { InitializeNativeTarget(); @@ -96,6 +97,9 @@ //tOpts.PrintMachineCode = true; + mCore = std::string(core); + std::transform(mCore.begin(), mCore.end(), mCore.begin(), ::tolower); + std::stringstream fnName("JitModule", std::ios_base::in | std::ios_base::out | std::ios_base::ate); fnName << mJitNumber++; std::unique_ptr newModule(new Module(fnName.str(), mContext)); @@ -107,47 +111,7 @@ StringRef hostCPUName; - // force JIT to use the same CPU arch as the rest of swr - if(mArch.AVX512F()) - { - assert(0 && "Implement AVX512 jitter"); - hostCPUName = sys::getHostCPUName(); - if (mVWidth == 0) - { - mVWidth = 16; - } - } - else if(mArch.AVX2()) - { - hostCPUName = StringRef("core-avx2"); - if (mVWidth == 0) - { - mVWidth = 8; - } - } - else if(mArch.AVX()) - { - if (mArch.F16C()) - { - hostCPUName = StringRef("core-avx-i"); - } - else - { - hostCPUName = StringRef("corei7-avx"); - } - if (mVWidth == 0) - { - mVWidth = 8; - } - } - else - { - hostCPUName = sys::getHostCPUName(); - if (mVWidth == 0) - { - mVWidth = 8; // 4? - } - } + hostCPUName = sys::getHostCPUName(); EB.setMCPU(hostCPUName); @@ -235,9 +199,12 @@ SMDiagnostic Err; std::unique_ptr newModule = parseIR(pMem.get()->getMemBufferRef(), Err, mContext); + SWR_REL_ASSERT( + !(newModule == nullptr), + "Parse failed!\n" + "%s", Err.getMessage().data()); if (newModule == nullptr) { - SWR_ASSERT(0, "Parse failed! Check Err for details."); return false; } @@ -352,18 +319,23 @@ extern "C" { + bool g_DllActive = true; + ////////////////////////////////////////////////////////////////////////// /// @brief Create JIT context. /// @param simdWidth - SIMD width to be used in generated program. - HANDLE JITCALL JitCreateContext(uint32_t targetSimdWidth, const char* arch) + HANDLE JITCALL JitCreateContext(uint32_t targetSimdWidth, const char* arch, const char* core) { - return new JitManager(targetSimdWidth, arch); + return new JitManager(targetSimdWidth, arch, core); } ////////////////////////////////////////////////////////////////////////// /// @brief Destroy JIT context. void JITCALL JitDestroyContext(HANDLE hJitContext) { - delete reinterpret_cast(hJitContext); + if (g_DllActive) + { + delete reinterpret_cast(hJitContext); + } } } diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/JitManager.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/JitManager.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/JitManager.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/JitManager.h 2017-06-01 10:37:10.000000000 +0000 @@ -86,7 +86,6 @@ #pragma pop_macro("DEBUG") -using namespace llvm; ////////////////////////////////////////////////////////////////////////// /// JitInstructionSet /// @brief Subclass of InstructionSet that allows users to override @@ -136,7 +135,7 @@ -struct JitLLVMContext : LLVMContext +struct JitLLVMContext : llvm::LLVMContext { }; @@ -146,42 +145,43 @@ ////////////////////////////////////////////////////////////////////////// struct JitManager { - JitManager(uint32_t w, const char *arch); + JitManager(uint32_t w, const char* arch, const char* core); ~JitManager(){}; JitLLVMContext mContext; ///< LLVM compiler - IRBuilder<> mBuilder; ///< LLVM IR Builder - ExecutionEngine* mpExec; + llvm::IRBuilder<> mBuilder; ///< LLVM IR Builder + llvm::ExecutionEngine* mpExec; // Need to be rebuilt after a JIT and before building new IR - Module* mpCurrentModule; + llvm::Module* mpCurrentModule; bool mIsModuleFinalized; uint32_t mJitNumber; uint32_t mVWidth; // Built in types. - Type* mInt8Ty; - Type* mInt32Ty; - Type* mInt64Ty; - Type* mFP32Ty; - StructType* mV4FP32Ty; - StructType* mV4Int32Ty; + llvm::Type* mInt8Ty; + llvm::Type* mInt32Ty; + llvm::Type* mInt64Ty; + llvm::Type* mFP32Ty; + llvm::StructType* mV4FP32Ty; + llvm::StructType* mV4Int32Ty; - Type* mSimtFP32Ty; - Type* mSimtInt32Ty; + llvm::Type* mSimtFP32Ty; + llvm::Type* mSimtInt32Ty; - Type* mSimdVectorInt32Ty; - Type* mSimdVectorTy; + llvm::Type* mSimdVectorInt32Ty; + llvm::Type* mSimdVectorTy; // fetch shader types - FunctionType* mFetchShaderTy; + llvm::FunctionType* mFetchShaderTy; JitInstructionSet mArch; + std::string mCore; void SetupNewModule(); bool SetupModuleFromIR(const uint8_t *pIR); - void DumpAsm(Function* pFunction, const char* fileName); - static void DumpToFile(Function *f, const char *fileName); + void DumpAsm(llvm::Function* pFunction, const char* fileName); + static void DumpToFile(llvm::Function *f, const char *fileName); }; diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/scripts/gen_llvm_ir_macros.py mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/scripts/gen_llvm_ir_macros.py --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/scripts/gen_llvm_ir_macros.py 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/scripts/gen_llvm_ir_macros.py 2017-06-01 10:37:10.000000000 +0000 @@ -84,6 +84,7 @@ } intrinsics = [ + ["VGATHERPD", "x86_avx2_gather_d_pd_256", ["src", "pBase", "indices", "mask", "scale"]], ["VGATHERPS", "x86_avx2_gather_d_ps_256", ["src", "pBase", "indices", "mask", "scale"]], ["VGATHERDD", "x86_avx2_gather_d_d_256", ["src", "pBase", "indices", "mask", "scale"]], ["VSQRTPS", "x86_avx_sqrt_ps_256", ["a"]], @@ -97,9 +98,11 @@ ["BEXTR_32", "x86_bmi_bextr_32", ["src", "control"]], ["VMASKLOADD", "x86_avx2_maskload_d_256", ["src", "mask"]], ["VMASKMOVPS", "x86_avx_maskload_ps_256", ["src", "mask"]], + ["VMASKSTOREPS", "x86_avx_maskstore_ps_256", ["src", "mask", "val"]], ["VPSHUFB", "x86_avx2_pshuf_b", ["a", "b"]], ["VPERMD", "x86_avx2_permd", ["a", "idx"]], ["VPERMPS", "x86_avx2_permps", ["idx", "a"]], + ["VCVTPD2PS", "x86_avx_cvt_pd2_ps_256", ["a"]], ["VCVTPH2PS", "x86_vcvtph2ps_256", ["a"]], ["VCVTPS2PH", "x86_vcvtps2ph_256", ["a", "round"]], ["VHSUBPS", "x86_avx_hsub_ps_256", ["a", "b"]], @@ -258,7 +261,11 @@ output_lines += [ '#include \"builder.h\"', - '' + '', + 'namespace SwrJit', + '{', + ' using namespace llvm;', + '', ] for func in functions: @@ -276,14 +283,14 @@ first_arg = False output_lines += [ - '//////////////////////////////////////////////////////////////////////////', - '%sBuilder::%s(%s)' % (func['return'], name, func['args_nodefs']), - '{', - ' return IRB()->%s(%s);' % (func['name'], func_args), - '}', + ' //////////////////////////////////////////////////////////////////////////', + ' %sBuilder::%s(%s)' % (func['return'], name, func['args_nodefs']), + ' {', + ' return IRB()->%s(%s);' % (func['name'], func_args), + ' }', '', ] - + output_lines.append('}') output_file.write('\n'.join(output_lines) + '\n') """ @@ -325,7 +332,11 @@ output_lines += [ '#include \"builder.h\"', - '' + '', + 'namespace SwrJit', + '{', + ' using namespace llvm;', + '', ] for inst in intrinsics: @@ -343,10 +354,10 @@ first = False output_lines += [ - '//////////////////////////////////////////////////////////////////////////', - 'Value *Builder::%s(%s)' % (inst[0], args), - '{', - ' Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::%s);' % inst[1], + ' //////////////////////////////////////////////////////////////////////////', + ' Value *Builder::%s(%s)' % (inst[0], args), + ' {', + ' Function *func = Intrinsic::getDeclaration(JM()->mpCurrentModule, Intrinsic::%s);' % inst[1], ] if inst[0] == "VPERMD": rev_args = '' @@ -359,21 +370,22 @@ output_lines += [ '#if (HAVE_LLVM == 0x306) && (LLVM_VERSION_PATCH == 0)', - ' return CALL(func, std::initializer_list{%s});' % rev_args, + ' return CALL(func, std::initializer_list{%s});' % rev_args, '#else', ] output_lines += [ - ' return CALL(func, std::initializer_list{%s});' % pass_args, + ' return CALL(func, std::initializer_list{%s});' % pass_args, ] if inst[0] == "VPERMD": output_lines += [ '#endif', ] output_lines += [ - '}', + ' }', '', ] + output_lines.append('}') output_file.write('\n'.join(output_lines) + '\n') """ diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/scripts/gen_llvm_types.py mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/scripts/gen_llvm_types.py --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/scripts/gen_llvm_types.py 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/scripts/gen_llvm_types.py 2017-06-01 10:37:10.000000000 +0000 @@ -59,6 +59,10 @@ #pragma once +namespace SwrJit +{ + using namespace llvm; + """ """ @@ -120,7 +124,7 @@ elif is_array: llvm_type = 'ArrayType::get(%s, %s)' % (llvm_type, array_count) - return [' members.push_back( %s ); // %s' % (llvm_type, name)] + return [' members.push_back( %s ); // %s' % (llvm_type, name)] """ """ @@ -151,12 +155,12 @@ struct_name = match.group(3).strip() output_lines += [ - '//////////////////////////////////////////////////////////////////////////', - '/// Generate LLVM type information for %s' % struct_name, - 'INLINE static StructType *Gen_%s%s(JitManager* pJitMgr)' % (struct_name, postfix_name), - '{', - ' LLVMContext& ctx = pJitMgr->mContext;', - ' std::vector members;', + ' //////////////////////////////////////////////////////////////////////////', + ' /// Generate LLVM type information for %s' % struct_name, + ' INLINE static StructType *Gen_%s%s(JitManager* pJitMgr)' % (struct_name, postfix_name), + ' {', + ' LLVMContext& ctx = pJitMgr->mContext;', + ' std::vector members;', '', ] @@ -309,16 +313,17 @@ if (end_of_struct): output_lines += [ '', - ' return StructType::get(ctx, members, false);', - '}', + ' return StructType::get(ctx, members, false);', + ' }', '', ] for i in range(len(llvm_args)): - output_lines.append('static const uint32_t %s%s_%s = %s;' % (struct_name, postfix_name, llvm_args[i], i)) + output_lines.append(' static const uint32_t %s%s_%s = %s;' % (struct_name, postfix_name, llvm_args[i], i)) output_lines.append('') + output_lines.append('}') output_file.write('\n'.join(output_lines) + '\n') """ diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/state_llvm.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/state_llvm.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/state_llvm.h 2017-01-24 01:43:37.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/state_llvm.h 2017-06-01 10:38:09.000000000 +0000 @@ -31,819 +31,858 @@ #pragma once -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for simdvertex -INLINE static StructType *Gen_simdvertex(JitManager* pJitMgr) +namespace SwrJit { - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; + using namespace llvm; - members.push_back( ArrayType::get(ArrayType::get(VectorType::get(Type::getFloatTy(ctx), pJitMgr->mVWidth), 4), KNOB_NUM_ATTRIBUTES) ); // attrib + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for simdvertex + INLINE static StructType *Gen_simdvertex(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( ArrayType::get(ArrayType::get(VectorType::get(Type::getFloatTy(ctx), pJitMgr->mVWidth), 4), KNOB_NUM_ATTRIBUTES) ); // attrib + + return StructType::get(ctx, members, false); + } + + static const uint32_t simdvertex_attrib = 0; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_VS_CONTEXT + INLINE static StructType *Gen_SWR_VS_CONTEXT(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( PointerType::get(Gen_simdvertex(pJitMgr), 0) ); // pVin + members.push_back( PointerType::get(Gen_simdvertex(pJitMgr), 0) ); // pVout + members.push_back( Type::getInt32Ty(ctx) ); // InstanceID + members.push_back( VectorType::get(Type::getInt32Ty(ctx), pJitMgr->mVWidth) ); // VertexID + members.push_back( VectorType::get(Type::getInt32Ty(ctx), pJitMgr->mVWidth) ); // mask + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_VS_CONTEXT_pVin = 0; + static const uint32_t SWR_VS_CONTEXT_pVout = 1; + static const uint32_t SWR_VS_CONTEXT_InstanceID = 2; + static const uint32_t SWR_VS_CONTEXT_VertexID = 3; + static const uint32_t SWR_VS_CONTEXT_mask = 4; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for ScalarAttrib + INLINE static StructType *Gen_ScalarAttrib(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( Type::getFloatTy(ctx) ); // x + members.push_back( Type::getFloatTy(ctx) ); // y + members.push_back( Type::getFloatTy(ctx) ); // z + members.push_back( Type::getFloatTy(ctx) ); // w + + return StructType::get(ctx, members, false); + } + + static const uint32_t ScalarAttrib_x = 0; + static const uint32_t ScalarAttrib_y = 1; + static const uint32_t ScalarAttrib_z = 2; + static const uint32_t ScalarAttrib_w = 3; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for ScalarCPoint + INLINE static StructType *Gen_ScalarCPoint(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( ArrayType::get(Gen_ScalarAttrib(pJitMgr), KNOB_NUM_ATTRIBUTES) ); // attrib + + return StructType::get(ctx, members, false); + } + + static const uint32_t ScalarCPoint_attrib = 0; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_TESSELLATION_FACTORS + INLINE static StructType *Gen_SWR_TESSELLATION_FACTORS(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( ArrayType::get(Type::getFloatTy(ctx), SWR_NUM_OUTER_TESS_FACTORS) ); // OuterTessFactors + members.push_back( ArrayType::get(Type::getFloatTy(ctx), SWR_NUM_INNER_TESS_FACTORS) ); // InnerTessFactors + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_TESSELLATION_FACTORS_OuterTessFactors = 0; + static const uint32_t SWR_TESSELLATION_FACTORS_InnerTessFactors = 1; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for ScalarPatch + INLINE static StructType *Gen_ScalarPatch(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( Gen_SWR_TESSELLATION_FACTORS(pJitMgr) ); // tessFactors + members.push_back( ArrayType::get(Gen_ScalarCPoint(pJitMgr), MAX_NUM_VERTS_PER_PRIM) ); // cp + members.push_back( Gen_ScalarCPoint(pJitMgr) ); // patchData + + return StructType::get(ctx, members, false); + } + + static const uint32_t ScalarPatch_tessFactors = 0; + static const uint32_t ScalarPatch_cp = 1; + static const uint32_t ScalarPatch_patchData = 2; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_HS_CONTEXT + INLINE static StructType *Gen_SWR_HS_CONTEXT(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( ArrayType::get(Gen_simdvertex(pJitMgr), MAX_NUM_VERTS_PER_PRIM) ); // vert + members.push_back( VectorType::get(Type::getInt32Ty(ctx), pJitMgr->mVWidth) ); // PrimitiveID + members.push_back( VectorType::get(Type::getInt32Ty(ctx), pJitMgr->mVWidth) ); // mask + members.push_back( PointerType::get(Gen_ScalarPatch(pJitMgr), 0) ); // pCPout + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_HS_CONTEXT_vert = 0; + static const uint32_t SWR_HS_CONTEXT_PrimitiveID = 1; + static const uint32_t SWR_HS_CONTEXT_mask = 2; + static const uint32_t SWR_HS_CONTEXT_pCPout = 3; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_DS_CONTEXT + INLINE static StructType *Gen_SWR_DS_CONTEXT(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( Type::getInt32Ty(ctx) ); // PrimitiveID + members.push_back( Type::getInt32Ty(ctx) ); // vectorOffset + members.push_back( Type::getInt32Ty(ctx) ); // vectorStride + members.push_back( PointerType::get(Gen_ScalarPatch(pJitMgr), 0) ); // pCpIn + members.push_back( PointerType::get(VectorType::get(Type::getFloatTy(ctx), pJitMgr->mVWidth), 0) ); // pDomainU + members.push_back( PointerType::get(VectorType::get(Type::getFloatTy(ctx), pJitMgr->mVWidth), 0) ); // pDomainV + members.push_back( VectorType::get(Type::getInt32Ty(ctx), pJitMgr->mVWidth) ); // mask + members.push_back( PointerType::get(VectorType::get(Type::getFloatTy(ctx), pJitMgr->mVWidth), 0) ); // pOutputData + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_DS_CONTEXT_PrimitiveID = 0; + static const uint32_t SWR_DS_CONTEXT_vectorOffset = 1; + static const uint32_t SWR_DS_CONTEXT_vectorStride = 2; + static const uint32_t SWR_DS_CONTEXT_pCpIn = 3; + static const uint32_t SWR_DS_CONTEXT_pDomainU = 4; + static const uint32_t SWR_DS_CONTEXT_pDomainV = 5; + static const uint32_t SWR_DS_CONTEXT_mask = 6; + static const uint32_t SWR_DS_CONTEXT_pOutputData = 7; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_GS_CONTEXT + INLINE static StructType *Gen_SWR_GS_CONTEXT(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( ArrayType::get(Gen_simdvertex(pJitMgr), MAX_NUM_VERTS_PER_PRIM) ); // vert + members.push_back( VectorType::get(Type::getInt32Ty(ctx), pJitMgr->mVWidth) ); // PrimitiveID + members.push_back( Type::getInt32Ty(ctx) ); // InstanceID + members.push_back( VectorType::get(Type::getInt32Ty(ctx), pJitMgr->mVWidth) ); // mask + members.push_back( PointerType::get(Type::getInt8Ty(ctx), 0) ); // pStream + members.push_back( PointerType::get(Type::getInt8Ty(ctx), 0) ); // pCutOrStreamIdBuffer + members.push_back( VectorType::get(Type::getInt32Ty(ctx), pJitMgr->mVWidth) ); // vertexCount + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_GS_CONTEXT_vert = 0; + static const uint32_t SWR_GS_CONTEXT_PrimitiveID = 1; + static const uint32_t SWR_GS_CONTEXT_InstanceID = 2; + static const uint32_t SWR_GS_CONTEXT_mask = 3; + static const uint32_t SWR_GS_CONTEXT_pStream = 4; + static const uint32_t SWR_GS_CONTEXT_pCutOrStreamIdBuffer = 5; + static const uint32_t SWR_GS_CONTEXT_vertexCount = 6; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for PixelPositions + INLINE static StructType *Gen_PixelPositions(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( VectorType::get(Type::getFloatTy(ctx), pJitMgr->mVWidth) ); // UL + members.push_back( VectorType::get(Type::getFloatTy(ctx), pJitMgr->mVWidth) ); // center + members.push_back( VectorType::get(Type::getFloatTy(ctx), pJitMgr->mVWidth) ); // sample + members.push_back( VectorType::get(Type::getFloatTy(ctx), pJitMgr->mVWidth) ); // centroid + + return StructType::get(ctx, members, false); + } + + static const uint32_t PixelPositions_UL = 0; + static const uint32_t PixelPositions_center = 1; + static const uint32_t PixelPositions_sample = 2; + static const uint32_t PixelPositions_centroid = 3; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_PS_CONTEXT + INLINE static StructType *Gen_SWR_PS_CONTEXT(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( Gen_PixelPositions(pJitMgr) ); // vX + members.push_back( Gen_PixelPositions(pJitMgr) ); // vY + members.push_back( VectorType::get(Type::getFloatTy(ctx), pJitMgr->mVWidth) ); // vZ + members.push_back( VectorType::get(Type::getInt32Ty(ctx), pJitMgr->mVWidth) ); // activeMask + members.push_back( VectorType::get(Type::getFloatTy(ctx), pJitMgr->mVWidth) ); // inputMask + members.push_back( VectorType::get(Type::getInt32Ty(ctx), pJitMgr->mVWidth) ); // oMask + members.push_back( Gen_PixelPositions(pJitMgr) ); // vI + members.push_back( Gen_PixelPositions(pJitMgr) ); // vJ + members.push_back( Gen_PixelPositions(pJitMgr) ); // vOneOverW + members.push_back( PointerType::get(Type::getFloatTy(ctx), 0) ); // pAttribs + members.push_back( PointerType::get(Type::getFloatTy(ctx), 0) ); // pPerspAttribs + members.push_back( PointerType::get(Type::getFloatTy(ctx), 0) ); // pRecipW + members.push_back( PointerType::get(Type::getFloatTy(ctx), 0) ); // I + members.push_back( PointerType::get(Type::getFloatTy(ctx), 0) ); // J + members.push_back( Type::getFloatTy(ctx) ); // recipDet + members.push_back( PointerType::get(Type::getFloatTy(ctx), 0) ); // pSamplePosX + members.push_back( PointerType::get(Type::getFloatTy(ctx), 0) ); // pSamplePosY + members.push_back( ArrayType::get(ArrayType::get(VectorType::get(Type::getFloatTy(ctx), pJitMgr->mVWidth), 4), SWR_NUM_RENDERTARGETS) ); // shaded + members.push_back( Type::getInt32Ty(ctx) ); // frontFace + members.push_back( Type::getInt32Ty(ctx) ); // primID + members.push_back( Type::getInt32Ty(ctx) ); // sampleIndex + members.push_back( Type::getInt32Ty(ctx) ); // rasterizerSampleCount + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_PS_CONTEXT_vX = 0; + static const uint32_t SWR_PS_CONTEXT_vY = 1; + static const uint32_t SWR_PS_CONTEXT_vZ = 2; + static const uint32_t SWR_PS_CONTEXT_activeMask = 3; + static const uint32_t SWR_PS_CONTEXT_inputMask = 4; + static const uint32_t SWR_PS_CONTEXT_oMask = 5; + static const uint32_t SWR_PS_CONTEXT_vI = 6; + static const uint32_t SWR_PS_CONTEXT_vJ = 7; + static const uint32_t SWR_PS_CONTEXT_vOneOverW = 8; + static const uint32_t SWR_PS_CONTEXT_pAttribs = 9; + static const uint32_t SWR_PS_CONTEXT_pPerspAttribs = 10; + static const uint32_t SWR_PS_CONTEXT_pRecipW = 11; + static const uint32_t SWR_PS_CONTEXT_I = 12; + static const uint32_t SWR_PS_CONTEXT_J = 13; + static const uint32_t SWR_PS_CONTEXT_recipDet = 14; + static const uint32_t SWR_PS_CONTEXT_pSamplePosX = 15; + static const uint32_t SWR_PS_CONTEXT_pSamplePosY = 16; + static const uint32_t SWR_PS_CONTEXT_shaded = 17; + static const uint32_t SWR_PS_CONTEXT_frontFace = 18; + static const uint32_t SWR_PS_CONTEXT_primID = 19; + static const uint32_t SWR_PS_CONTEXT_sampleIndex = 20; + static const uint32_t SWR_PS_CONTEXT_rasterizerSampleCount = 21; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_CS_CONTEXT + INLINE static StructType *Gen_SWR_CS_CONTEXT(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( Type::getInt32Ty(ctx) ); // tileCounter + members.push_back( ArrayType::get(Type::getInt32Ty(ctx), 3) ); // dispatchDims + members.push_back( PointerType::get(Type::getInt8Ty(ctx), 0) ); // pTGSM + members.push_back( PointerType::get(Type::getInt8Ty(ctx), 0) ); // pSpillFillBuffer + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_CS_CONTEXT_tileCounter = 0; + static const uint32_t SWR_CS_CONTEXT_dispatchDims = 1; + static const uint32_t SWR_CS_CONTEXT_pTGSM = 2; + static const uint32_t SWR_CS_CONTEXT_pSpillFillBuffer = 3; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_SURFACE_STATE + INLINE static StructType *Gen_SWR_SURFACE_STATE(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( PointerType::get(Type::getInt8Ty(ctx), 0) ); // pBaseAddress + members.push_back( Type::getInt32Ty(ctx) ); // type + members.push_back( Type::getInt32Ty(ctx) ); // format + members.push_back( Type::getInt32Ty(ctx) ); // width + members.push_back( Type::getInt32Ty(ctx) ); // height + members.push_back( Type::getInt32Ty(ctx) ); // depth + members.push_back( Type::getInt32Ty(ctx) ); // numSamples + members.push_back( Type::getInt32Ty(ctx) ); // samplePattern + members.push_back( Type::getInt32Ty(ctx) ); // pitch + members.push_back( Type::getInt32Ty(ctx) ); // qpitch + members.push_back( Type::getInt32Ty(ctx) ); // minLod + members.push_back( Type::getInt32Ty(ctx) ); // maxLod + members.push_back( Type::getFloatTy(ctx) ); // resourceMinLod + members.push_back( Type::getInt32Ty(ctx) ); // lod + members.push_back( Type::getInt32Ty(ctx) ); // arrayIndex + members.push_back( Type::getInt32Ty(ctx) ); // tileMode + members.push_back( Type::getInt32Ty(ctx) ); // halign + members.push_back( Type::getInt32Ty(ctx) ); // valign + members.push_back( Type::getInt32Ty(ctx) ); // xOffset + members.push_back( Type::getInt32Ty(ctx) ); // yOffset + members.push_back( ArrayType::get(ArrayType::get(Type::getInt32Ty(ctx), 15), 2) ); // lodOffsets + members.push_back( PointerType::get(Type::getInt8Ty(ctx), 0) ); // pAuxBaseAddress + members.push_back( Type::getInt32Ty(ctx) ); // auxMode + members.push_back( Type::getInt8Ty(ctx) ); // bInterleavedSamples + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_SURFACE_STATE_pBaseAddress = 0; + static const uint32_t SWR_SURFACE_STATE_type = 1; + static const uint32_t SWR_SURFACE_STATE_format = 2; + static const uint32_t SWR_SURFACE_STATE_width = 3; + static const uint32_t SWR_SURFACE_STATE_height = 4; + static const uint32_t SWR_SURFACE_STATE_depth = 5; + static const uint32_t SWR_SURFACE_STATE_numSamples = 6; + static const uint32_t SWR_SURFACE_STATE_samplePattern = 7; + static const uint32_t SWR_SURFACE_STATE_pitch = 8; + static const uint32_t SWR_SURFACE_STATE_qpitch = 9; + static const uint32_t SWR_SURFACE_STATE_minLod = 10; + static const uint32_t SWR_SURFACE_STATE_maxLod = 11; + static const uint32_t SWR_SURFACE_STATE_resourceMinLod = 12; + static const uint32_t SWR_SURFACE_STATE_lod = 13; + static const uint32_t SWR_SURFACE_STATE_arrayIndex = 14; + static const uint32_t SWR_SURFACE_STATE_tileMode = 15; + static const uint32_t SWR_SURFACE_STATE_halign = 16; + static const uint32_t SWR_SURFACE_STATE_valign = 17; + static const uint32_t SWR_SURFACE_STATE_xOffset = 18; + static const uint32_t SWR_SURFACE_STATE_yOffset = 19; + static const uint32_t SWR_SURFACE_STATE_lodOffsets = 20; + static const uint32_t SWR_SURFACE_STATE_pAuxBaseAddress = 21; + static const uint32_t SWR_SURFACE_STATE_auxMode = 22; + static const uint32_t SWR_SURFACE_STATE_bInterleavedSamples = 23; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_VERTEX_BUFFER_STATE + INLINE static StructType *Gen_SWR_VERTEX_BUFFER_STATE(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( Type::getInt32Ty(ctx) ); // index + members.push_back( Type::getInt32Ty(ctx) ); // pitch + members.push_back( PointerType::get(Type::getInt8Ty(ctx), 0) ); // pData + members.push_back( Type::getInt32Ty(ctx) ); // size + members.push_back( Type::getInt32Ty(ctx) ); // numaNode + members.push_back( Type::getInt32Ty(ctx) ); // maxVertex + members.push_back( Type::getInt32Ty(ctx) ); // partialInboundsSize + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_VERTEX_BUFFER_STATE_index = 0; + static const uint32_t SWR_VERTEX_BUFFER_STATE_pitch = 1; + static const uint32_t SWR_VERTEX_BUFFER_STATE_pData = 2; + static const uint32_t SWR_VERTEX_BUFFER_STATE_size = 3; + static const uint32_t SWR_VERTEX_BUFFER_STATE_numaNode = 4; + static const uint32_t SWR_VERTEX_BUFFER_STATE_maxVertex = 5; + static const uint32_t SWR_VERTEX_BUFFER_STATE_partialInboundsSize = 6; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_INDEX_BUFFER_STATE + INLINE static StructType *Gen_SWR_INDEX_BUFFER_STATE(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( Type::getInt32Ty(ctx) ); // format + members.push_back( PointerType::get(Type::getInt32Ty(ctx), 0) ); // pIndices + members.push_back( Type::getInt32Ty(ctx) ); // size + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_INDEX_BUFFER_STATE_format = 0; + static const uint32_t SWR_INDEX_BUFFER_STATE_pIndices = 1; + static const uint32_t SWR_INDEX_BUFFER_STATE_size = 2; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_FETCH_CONTEXT + INLINE static StructType *Gen_SWR_FETCH_CONTEXT(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( PointerType::get(Gen_SWR_VERTEX_BUFFER_STATE(pJitMgr), 0) ); // pStreams + members.push_back( PointerType::get(Type::getInt32Ty(ctx), 0) ); // pIndices + members.push_back( PointerType::get(Type::getInt32Ty(ctx), 0) ); // pLastIndex + members.push_back( Type::getInt32Ty(ctx) ); // CurInstance + members.push_back( Type::getInt32Ty(ctx) ); // BaseVertex + members.push_back( Type::getInt32Ty(ctx) ); // StartVertex + members.push_back( Type::getInt32Ty(ctx) ); // StartInstance + members.push_back( VectorType::get(Type::getInt32Ty(ctx), pJitMgr->mVWidth) ); // VertexID + members.push_back( VectorType::get(Type::getInt32Ty(ctx), pJitMgr->mVWidth) ); // CutMask + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_FETCH_CONTEXT_pStreams = 0; + static const uint32_t SWR_FETCH_CONTEXT_pIndices = 1; + static const uint32_t SWR_FETCH_CONTEXT_pLastIndex = 2; + static const uint32_t SWR_FETCH_CONTEXT_CurInstance = 3; + static const uint32_t SWR_FETCH_CONTEXT_BaseVertex = 4; + static const uint32_t SWR_FETCH_CONTEXT_StartVertex = 5; + static const uint32_t SWR_FETCH_CONTEXT_StartInstance = 6; + static const uint32_t SWR_FETCH_CONTEXT_VertexID = 7; + static const uint32_t SWR_FETCH_CONTEXT_CutMask = 8; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_STREAMOUT_BUFFER + INLINE static StructType *Gen_SWR_STREAMOUT_BUFFER(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( Type::getInt8Ty(ctx) ); // enable + members.push_back( Type::getInt8Ty(ctx) ); // soWriteEnable + members.push_back( PointerType::get(Type::getInt32Ty(ctx), 0) ); // pBuffer + members.push_back( Type::getInt32Ty(ctx) ); // bufferSize + members.push_back( Type::getInt32Ty(ctx) ); // pitch + members.push_back( Type::getInt32Ty(ctx) ); // streamOffset + members.push_back( PointerType::get(Type::getInt32Ty(ctx), 0) ); // pWriteOffset + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_STREAMOUT_BUFFER_enable = 0; + static const uint32_t SWR_STREAMOUT_BUFFER_soWriteEnable = 1; + static const uint32_t SWR_STREAMOUT_BUFFER_pBuffer = 2; + static const uint32_t SWR_STREAMOUT_BUFFER_bufferSize = 3; + static const uint32_t SWR_STREAMOUT_BUFFER_pitch = 4; + static const uint32_t SWR_STREAMOUT_BUFFER_streamOffset = 5; + static const uint32_t SWR_STREAMOUT_BUFFER_pWriteOffset = 6; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_STREAMOUT_STATE + INLINE static StructType *Gen_SWR_STREAMOUT_STATE(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( Type::getInt8Ty(ctx) ); // soEnable + members.push_back( ArrayType::get(Type::getInt8Ty(ctx), MAX_SO_STREAMS) ); // streamEnable + members.push_back( Type::getInt8Ty(ctx) ); // rasterizerDisable + members.push_back( Type::getInt32Ty(ctx) ); // streamToRasterizer + members.push_back( ArrayType::get(Type::getInt32Ty(ctx), MAX_SO_STREAMS) ); // streamMasks + members.push_back( ArrayType::get(Type::getInt32Ty(ctx), MAX_SO_STREAMS) ); // streamNumEntries + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_STREAMOUT_STATE_soEnable = 0; + static const uint32_t SWR_STREAMOUT_STATE_streamEnable = 1; + static const uint32_t SWR_STREAMOUT_STATE_rasterizerDisable = 2; + static const uint32_t SWR_STREAMOUT_STATE_streamToRasterizer = 3; + static const uint32_t SWR_STREAMOUT_STATE_streamMasks = 4; + static const uint32_t SWR_STREAMOUT_STATE_streamNumEntries = 5; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_STREAMOUT_CONTEXT + INLINE static StructType *Gen_SWR_STREAMOUT_CONTEXT(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( PointerType::get(Type::getInt32Ty(ctx), 0) ); // pPrimData + members.push_back( ArrayType::get(PointerType::get(Gen_SWR_STREAMOUT_BUFFER(pJitMgr), 0), MAX_SO_STREAMS) ); // pBuffer + members.push_back( Type::getInt32Ty(ctx) ); // numPrimsWritten + members.push_back( Type::getInt32Ty(ctx) ); // numPrimStorageNeeded + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_STREAMOUT_CONTEXT_pPrimData = 0; + static const uint32_t SWR_STREAMOUT_CONTEXT_pBuffer = 1; + static const uint32_t SWR_STREAMOUT_CONTEXT_numPrimsWritten = 2; + static const uint32_t SWR_STREAMOUT_CONTEXT_numPrimStorageNeeded = 3; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_GS_STATE + INLINE static StructType *Gen_SWR_GS_STATE(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( Type::getInt8Ty(ctx) ); // gsEnable + members.push_back( Type::getInt32Ty(ctx) ); // numInputAttribs + members.push_back( Type::getInt32Ty(ctx) ); // outputTopology + members.push_back( Type::getInt32Ty(ctx) ); // maxNumVerts + members.push_back( Type::getInt32Ty(ctx) ); // instanceCount + members.push_back( Type::getInt8Ty(ctx) ); // emitsRenderTargetArrayIndex + members.push_back( Type::getInt8Ty(ctx) ); // emitsPrimitiveID + members.push_back( Type::getInt8Ty(ctx) ); // emitsViewportArrayIndex + members.push_back( Type::getInt8Ty(ctx) ); // isSingleStream + members.push_back( Type::getInt32Ty(ctx) ); // singleStreamID + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_GS_STATE_gsEnable = 0; + static const uint32_t SWR_GS_STATE_numInputAttribs = 1; + static const uint32_t SWR_GS_STATE_outputTopology = 2; + static const uint32_t SWR_GS_STATE_maxNumVerts = 3; + static const uint32_t SWR_GS_STATE_instanceCount = 4; + static const uint32_t SWR_GS_STATE_emitsRenderTargetArrayIndex = 5; + static const uint32_t SWR_GS_STATE_emitsPrimitiveID = 6; + static const uint32_t SWR_GS_STATE_emitsViewportArrayIndex = 7; + static const uint32_t SWR_GS_STATE_isSingleStream = 8; + static const uint32_t SWR_GS_STATE_singleStreamID = 9; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_TS_STATE + INLINE static StructType *Gen_SWR_TS_STATE(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( Type::getInt8Ty(ctx) ); // tsEnable + members.push_back( Type::getInt32Ty(ctx) ); // tsOutputTopology + members.push_back( Type::getInt32Ty(ctx) ); // partitioning + members.push_back( Type::getInt32Ty(ctx) ); // domain + members.push_back( Type::getInt32Ty(ctx) ); // postDSTopology + members.push_back( Type::getInt32Ty(ctx) ); // numHsInputAttribs + members.push_back( Type::getInt32Ty(ctx) ); // numHsOutputAttribs + members.push_back( Type::getInt32Ty(ctx) ); // numDsOutputAttribs + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_TS_STATE_tsEnable = 0; + static const uint32_t SWR_TS_STATE_tsOutputTopology = 1; + static const uint32_t SWR_TS_STATE_partitioning = 2; + static const uint32_t SWR_TS_STATE_domain = 3; + static const uint32_t SWR_TS_STATE_postDSTopology = 4; + static const uint32_t SWR_TS_STATE_numHsInputAttribs = 5; + static const uint32_t SWR_TS_STATE_numHsOutputAttribs = 6; + static const uint32_t SWR_TS_STATE_numDsOutputAttribs = 7; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_RENDER_TARGET_BLEND_STATE + INLINE static StructType *Gen_SWR_RENDER_TARGET_BLEND_STATE(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( Type::getInt8Ty(ctx) ); // writeDisableRed + members.push_back( Type::getInt8Ty(ctx) ); // writeDisableGreen + members.push_back( Type::getInt8Ty(ctx) ); // writeDisableBlue + members.push_back( Type::getInt8Ty(ctx) ); // writeDisableAlpha + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_RENDER_TARGET_BLEND_STATE_writeDisableRed = 0; + static const uint32_t SWR_RENDER_TARGET_BLEND_STATE_writeDisableGreen = 1; + static const uint32_t SWR_RENDER_TARGET_BLEND_STATE_writeDisableBlue = 2; + static const uint32_t SWR_RENDER_TARGET_BLEND_STATE_writeDisableAlpha = 3; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_BLEND_STATE + INLINE static StructType *Gen_SWR_BLEND_STATE(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( ArrayType::get(Type::getFloatTy(ctx), 4) ); // constantColor + members.push_back( Type::getInt32Ty(ctx) ); // alphaTestReference + members.push_back( Type::getInt32Ty(ctx) ); // sampleMask + members.push_back( Type::getInt32Ty(ctx) ); // sampleCount + members.push_back( ArrayType::get(Gen_SWR_RENDER_TARGET_BLEND_STATE(pJitMgr), SWR_NUM_RENDERTARGETS) ); // renderTarget + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_BLEND_STATE_constantColor = 0; + static const uint32_t SWR_BLEND_STATE_alphaTestReference = 1; + static const uint32_t SWR_BLEND_STATE_sampleMask = 2; + static const uint32_t SWR_BLEND_STATE_sampleCount = 3; + static const uint32_t SWR_BLEND_STATE_renderTarget = 4; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_FRONTEND_STATE + INLINE static StructType *Gen_SWR_FRONTEND_STATE(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( Type::getInt8Ty(ctx) ); // vpTransformDisable + members.push_back( Type::getInt8Ty(ctx) ); // bEnableCutIndex + members.push_back( Type::getInt32Ty(ctx) ); // triFan + members.push_back( Type::getInt32Ty(ctx) ); // lineStripList + members.push_back( Type::getInt32Ty(ctx) ); // triStripList + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_FRONTEND_STATE_vpTransformDisable = 0; + static const uint32_t SWR_FRONTEND_STATE_bEnableCutIndex = 1; + static const uint32_t SWR_FRONTEND_STATE_triFan = 2; + static const uint32_t SWR_FRONTEND_STATE_lineStripList = 3; + static const uint32_t SWR_FRONTEND_STATE_triStripList = 4; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_VIEWPORT_MATRIX + INLINE static StructType *Gen_SWR_VIEWPORT_MATRIX(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( Type::getFloatTy(ctx) ); // m00 + members.push_back( Type::getFloatTy(ctx) ); // m11 + members.push_back( Type::getFloatTy(ctx) ); // m22 + members.push_back( Type::getFloatTy(ctx) ); // m30 + members.push_back( Type::getFloatTy(ctx) ); // m31 + members.push_back( Type::getFloatTy(ctx) ); // m32 + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_VIEWPORT_MATRIX_m00 = 0; + static const uint32_t SWR_VIEWPORT_MATRIX_m11 = 1; + static const uint32_t SWR_VIEWPORT_MATRIX_m22 = 2; + static const uint32_t SWR_VIEWPORT_MATRIX_m30 = 3; + static const uint32_t SWR_VIEWPORT_MATRIX_m31 = 4; + static const uint32_t SWR_VIEWPORT_MATRIX_m32 = 5; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_VIEWPORT_MATRICES + INLINE static StructType *Gen_SWR_VIEWPORT_MATRICES(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( ArrayType::get(Type::getFloatTy(ctx), KNOB_NUM_VIEWPORTS_SCISSORS) ); // m00 + members.push_back( ArrayType::get(Type::getFloatTy(ctx), KNOB_NUM_VIEWPORTS_SCISSORS) ); // m11 + members.push_back( ArrayType::get(Type::getFloatTy(ctx), KNOB_NUM_VIEWPORTS_SCISSORS) ); // m22 + members.push_back( ArrayType::get(Type::getFloatTy(ctx), KNOB_NUM_VIEWPORTS_SCISSORS) ); // m30 + members.push_back( ArrayType::get(Type::getFloatTy(ctx), KNOB_NUM_VIEWPORTS_SCISSORS) ); // m31 + members.push_back( ArrayType::get(Type::getFloatTy(ctx), KNOB_NUM_VIEWPORTS_SCISSORS) ); // m32 + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_VIEWPORT_MATRICES_m00 = 0; + static const uint32_t SWR_VIEWPORT_MATRICES_m11 = 1; + static const uint32_t SWR_VIEWPORT_MATRICES_m22 = 2; + static const uint32_t SWR_VIEWPORT_MATRICES_m30 = 3; + static const uint32_t SWR_VIEWPORT_MATRICES_m31 = 4; + static const uint32_t SWR_VIEWPORT_MATRICES_m32 = 5; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_VIEWPORT + INLINE static StructType *Gen_SWR_VIEWPORT(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( Type::getFloatTy(ctx) ); // x + members.push_back( Type::getFloatTy(ctx) ); // y + members.push_back( Type::getFloatTy(ctx) ); // width + members.push_back( Type::getFloatTy(ctx) ); // height + members.push_back( Type::getFloatTy(ctx) ); // minZ + members.push_back( Type::getFloatTy(ctx) ); // maxZ + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_VIEWPORT_x = 0; + static const uint32_t SWR_VIEWPORT_y = 1; + static const uint32_t SWR_VIEWPORT_width = 2; + static const uint32_t SWR_VIEWPORT_height = 3; + static const uint32_t SWR_VIEWPORT_minZ = 4; + static const uint32_t SWR_VIEWPORT_maxZ = 5; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_MULTISAMPLE_POS + INLINE static StructType *Gen_SWR_MULTISAMPLE_POS(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( Type::getInt32Ty(ctx) ); // x + members.push_back( Type::getInt32Ty(ctx) ); // y + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_MULTISAMPLE_POS_x = 0; + static const uint32_t SWR_MULTISAMPLE_POS_y = 1; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_RASTSTATE + INLINE static StructType *Gen_SWR_RASTSTATE(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( Type::getInt32Ty(ctx) ); // cullMode + members.push_back( Type::getInt32Ty(ctx) ); // fillMode + members.push_back( Type::getInt32Ty(ctx) ); // frontWinding + members.push_back( Type::getInt32Ty(ctx) ); // scissorEnable + members.push_back( Type::getInt32Ty(ctx) ); // depthClipEnable + members.push_back( Type::getInt32Ty(ctx) ); // clipHalfZ + members.push_back( Type::getInt32Ty(ctx) ); // pointParam + members.push_back( Type::getInt32Ty(ctx) ); // pointSpriteEnable + members.push_back( Type::getInt32Ty(ctx) ); // pointSpriteTopOrigin + members.push_back( Type::getInt32Ty(ctx) ); // msaaRastEnable + members.push_back( Type::getInt32Ty(ctx) ); // forcedSampleCount + members.push_back( Type::getInt32Ty(ctx) ); // pixelOffset + members.push_back( Type::getInt32Ty(ctx) ); // depthBiasPreAdjusted + members.push_back( Type::getInt32Ty(ctx) ); // conservativeRast + members.push_back( Type::getFloatTy(ctx) ); // pointSize + members.push_back( Type::getFloatTy(ctx) ); // lineWidth + members.push_back( Type::getFloatTy(ctx) ); // depthBias + members.push_back( Type::getFloatTy(ctx) ); // slopeScaledDepthBias + members.push_back( Type::getFloatTy(ctx) ); // depthBiasClamp + members.push_back( Type::getInt32Ty(ctx) ); // depthFormat + members.push_back( Type::getInt32Ty(ctx) ); // rastMode + members.push_back( Type::getInt32Ty(ctx) ); // sampleCount + members.push_back( Type::getInt32Ty(ctx) ); // pixelLocation + members.push_back( ArrayType::get(Gen_SWR_MULTISAMPLE_POS(pJitMgr), SWR_MAX_NUM_MULTISAMPLES) ); // iSamplePos + members.push_back( Type::getInt32Ty(ctx) ); // samplePattern + members.push_back( Type::getInt8Ty(ctx) ); // cullDistanceMask + members.push_back( Type::getInt8Ty(ctx) ); // clipDistanceMask + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_RASTSTATE_cullMode = 0; + static const uint32_t SWR_RASTSTATE_fillMode = 1; + static const uint32_t SWR_RASTSTATE_frontWinding = 2; + static const uint32_t SWR_RASTSTATE_scissorEnable = 3; + static const uint32_t SWR_RASTSTATE_depthClipEnable = 4; + static const uint32_t SWR_RASTSTATE_clipHalfZ = 5; + static const uint32_t SWR_RASTSTATE_pointParam = 6; + static const uint32_t SWR_RASTSTATE_pointSpriteEnable = 7; + static const uint32_t SWR_RASTSTATE_pointSpriteTopOrigin = 8; + static const uint32_t SWR_RASTSTATE_msaaRastEnable = 9; + static const uint32_t SWR_RASTSTATE_forcedSampleCount = 10; + static const uint32_t SWR_RASTSTATE_pixelOffset = 11; + static const uint32_t SWR_RASTSTATE_depthBiasPreAdjusted = 12; + static const uint32_t SWR_RASTSTATE_conservativeRast = 13; + static const uint32_t SWR_RASTSTATE_pointSize = 14; + static const uint32_t SWR_RASTSTATE_lineWidth = 15; + static const uint32_t SWR_RASTSTATE_depthBias = 16; + static const uint32_t SWR_RASTSTATE_slopeScaledDepthBias = 17; + static const uint32_t SWR_RASTSTATE_depthBiasClamp = 18; + static const uint32_t SWR_RASTSTATE_depthFormat = 19; + static const uint32_t SWR_RASTSTATE_rastMode = 20; + static const uint32_t SWR_RASTSTATE_sampleCount = 21; + static const uint32_t SWR_RASTSTATE_pixelLocation = 22; + static const uint32_t SWR_RASTSTATE_iSamplePos = 23; + static const uint32_t SWR_RASTSTATE_samplePattern = 24; + static const uint32_t SWR_RASTSTATE_cullDistanceMask = 25; + static const uint32_t SWR_RASTSTATE_clipDistanceMask = 26; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_ATTRIB_SWIZZLE + INLINE static StructType *Gen_SWR_ATTRIB_SWIZZLE(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( Type::getInt16Ty(ctx) ); // sourceAttrib + members.push_back( Type::getInt16Ty(ctx) ); // constantSource + members.push_back( Type::getInt16Ty(ctx) ); // componentOverrideMask + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_ATTRIB_SWIZZLE_sourceAttrib = 0; + static const uint32_t SWR_ATTRIB_SWIZZLE_constantSource = 1; + static const uint32_t SWR_ATTRIB_SWIZZLE_componentOverrideMask = 2; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_BACKEND_STATE + INLINE static StructType *Gen_SWR_BACKEND_STATE(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( Type::getInt32Ty(ctx) ); // constantInterpolationMask + members.push_back( Type::getInt32Ty(ctx) ); // pointSpriteTexCoordMask + members.push_back( Type::getInt8Ty(ctx) ); // numAttributes + members.push_back( ArrayType::get(Type::getInt8Ty(ctx), 32) ); // numComponents + members.push_back( Type::getInt8Ty(ctx) ); // swizzleEnable + members.push_back( ArrayType::get(Gen_SWR_ATTRIB_SWIZZLE(pJitMgr), 32) ); // swizzleMap + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_BACKEND_STATE_constantInterpolationMask = 0; + static const uint32_t SWR_BACKEND_STATE_pointSpriteTexCoordMask = 1; + static const uint32_t SWR_BACKEND_STATE_numAttributes = 2; + static const uint32_t SWR_BACKEND_STATE_numComponents = 3; + static const uint32_t SWR_BACKEND_STATE_swizzleEnable = 4; + static const uint32_t SWR_BACKEND_STATE_swizzleMap = 5; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_PS_STATE + INLINE static StructType *Gen_SWR_PS_STATE(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( PointerType::get(Type::getInt8Ty(ctx), 0) ); // pfnPixelShader + members.push_back( Type::getInt32Ty(ctx) ); // killsPixel + members.push_back( Type::getInt32Ty(ctx) ); // inputCoverage + members.push_back( Type::getInt32Ty(ctx) ); // writesODepth + members.push_back( Type::getInt32Ty(ctx) ); // usesSourceDepth + members.push_back( Type::getInt32Ty(ctx) ); // shadingRate + members.push_back( Type::getInt32Ty(ctx) ); // numRenderTargets + members.push_back( Type::getInt32Ty(ctx) ); // posOffset + members.push_back( Type::getInt32Ty(ctx) ); // barycentricsMask + members.push_back( Type::getInt32Ty(ctx) ); // usesUAV + members.push_back( Type::getInt32Ty(ctx) ); // forceEarlyZ + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_PS_STATE_pfnPixelShader = 0; + static const uint32_t SWR_PS_STATE_killsPixel = 1; + static const uint32_t SWR_PS_STATE_inputCoverage = 2; + static const uint32_t SWR_PS_STATE_writesODepth = 3; + static const uint32_t SWR_PS_STATE_usesSourceDepth = 4; + static const uint32_t SWR_PS_STATE_shadingRate = 5; + static const uint32_t SWR_PS_STATE_numRenderTargets = 6; + static const uint32_t SWR_PS_STATE_posOffset = 7; + static const uint32_t SWR_PS_STATE_barycentricsMask = 8; + static const uint32_t SWR_PS_STATE_usesUAV = 9; + static const uint32_t SWR_PS_STATE_forceEarlyZ = 10; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for SWR_DEPTH_BOUNDS_STATE + INLINE static StructType *Gen_SWR_DEPTH_BOUNDS_STATE(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( Type::getInt8Ty(ctx) ); // depthBoundsTestEnable + members.push_back( Type::getFloatTy(ctx) ); // depthBoundsTestMinValue + members.push_back( Type::getFloatTy(ctx) ); // depthBoundsTestMaxValue + + return StructType::get(ctx, members, false); + } + + static const uint32_t SWR_DEPTH_BOUNDS_STATE_depthBoundsTestEnable = 0; + static const uint32_t SWR_DEPTH_BOUNDS_STATE_depthBoundsTestMinValue = 1; + static const uint32_t SWR_DEPTH_BOUNDS_STATE_depthBoundsTestMaxValue = 2; - return StructType::get(ctx, members, false); } - -static const uint32_t simdvertex_attrib = 0; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for SWR_VS_CONTEXT -INLINE static StructType *Gen_SWR_VS_CONTEXT(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( PointerType::get(Gen_simdvertex(pJitMgr), 0) ); // pVin - members.push_back( PointerType::get(Gen_simdvertex(pJitMgr), 0) ); // pVout - members.push_back( Type::getInt32Ty(ctx) ); // InstanceID - members.push_back( VectorType::get(Type::getInt32Ty(ctx), pJitMgr->mVWidth) ); // VertexID - members.push_back( VectorType::get(Type::getInt32Ty(ctx), pJitMgr->mVWidth) ); // mask - - return StructType::get(ctx, members, false); -} - -static const uint32_t SWR_VS_CONTEXT_pVin = 0; -static const uint32_t SWR_VS_CONTEXT_pVout = 1; -static const uint32_t SWR_VS_CONTEXT_InstanceID = 2; -static const uint32_t SWR_VS_CONTEXT_VertexID = 3; -static const uint32_t SWR_VS_CONTEXT_mask = 4; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for ScalarAttrib -INLINE static StructType *Gen_ScalarAttrib(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( Type::getFloatTy(ctx) ); // x - members.push_back( Type::getFloatTy(ctx) ); // y - members.push_back( Type::getFloatTy(ctx) ); // z - members.push_back( Type::getFloatTy(ctx) ); // w - - return StructType::get(ctx, members, false); -} - -static const uint32_t ScalarAttrib_x = 0; -static const uint32_t ScalarAttrib_y = 1; -static const uint32_t ScalarAttrib_z = 2; -static const uint32_t ScalarAttrib_w = 3; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for ScalarCPoint -INLINE static StructType *Gen_ScalarCPoint(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( ArrayType::get(Gen_ScalarAttrib(pJitMgr), KNOB_NUM_ATTRIBUTES) ); // attrib - - return StructType::get(ctx, members, false); -} - -static const uint32_t ScalarCPoint_attrib = 0; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for SWR_TESSELLATION_FACTORS -INLINE static StructType *Gen_SWR_TESSELLATION_FACTORS(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( ArrayType::get(Type::getFloatTy(ctx), SWR_NUM_OUTER_TESS_FACTORS) ); // OuterTessFactors - members.push_back( ArrayType::get(Type::getFloatTy(ctx), SWR_NUM_INNER_TESS_FACTORS) ); // InnerTessFactors - - return StructType::get(ctx, members, false); -} - -static const uint32_t SWR_TESSELLATION_FACTORS_OuterTessFactors = 0; -static const uint32_t SWR_TESSELLATION_FACTORS_InnerTessFactors = 1; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for ScalarPatch -INLINE static StructType *Gen_ScalarPatch(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( Gen_SWR_TESSELLATION_FACTORS(pJitMgr) ); // tessFactors - members.push_back( ArrayType::get(Gen_ScalarCPoint(pJitMgr), MAX_NUM_VERTS_PER_PRIM) ); // cp - members.push_back( Gen_ScalarCPoint(pJitMgr) ); // patchData - - return StructType::get(ctx, members, false); -} - -static const uint32_t ScalarPatch_tessFactors = 0; -static const uint32_t ScalarPatch_cp = 1; -static const uint32_t ScalarPatch_patchData = 2; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for SWR_HS_CONTEXT -INLINE static StructType *Gen_SWR_HS_CONTEXT(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( ArrayType::get(Gen_simdvertex(pJitMgr), MAX_NUM_VERTS_PER_PRIM) ); // vert - members.push_back( VectorType::get(Type::getInt32Ty(ctx), pJitMgr->mVWidth) ); // PrimitiveID - members.push_back( VectorType::get(Type::getInt32Ty(ctx), pJitMgr->mVWidth) ); // mask - members.push_back( PointerType::get(Gen_ScalarPatch(pJitMgr), 0) ); // pCPout - - return StructType::get(ctx, members, false); -} - -static const uint32_t SWR_HS_CONTEXT_vert = 0; -static const uint32_t SWR_HS_CONTEXT_PrimitiveID = 1; -static const uint32_t SWR_HS_CONTEXT_mask = 2; -static const uint32_t SWR_HS_CONTEXT_pCPout = 3; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for SWR_DS_CONTEXT -INLINE static StructType *Gen_SWR_DS_CONTEXT(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( Type::getInt32Ty(ctx) ); // PrimitiveID - members.push_back( Type::getInt32Ty(ctx) ); // vectorOffset - members.push_back( Type::getInt32Ty(ctx) ); // vectorStride - members.push_back( PointerType::get(Gen_ScalarPatch(pJitMgr), 0) ); // pCpIn - members.push_back( PointerType::get(VectorType::get(Type::getFloatTy(ctx), pJitMgr->mVWidth), 0) ); // pDomainU - members.push_back( PointerType::get(VectorType::get(Type::getFloatTy(ctx), pJitMgr->mVWidth), 0) ); // pDomainV - members.push_back( VectorType::get(Type::getInt32Ty(ctx), pJitMgr->mVWidth) ); // mask - members.push_back( PointerType::get(VectorType::get(Type::getFloatTy(ctx), pJitMgr->mVWidth), 0) ); // pOutputData - - return StructType::get(ctx, members, false); -} - -static const uint32_t SWR_DS_CONTEXT_PrimitiveID = 0; -static const uint32_t SWR_DS_CONTEXT_vectorOffset = 1; -static const uint32_t SWR_DS_CONTEXT_vectorStride = 2; -static const uint32_t SWR_DS_CONTEXT_pCpIn = 3; -static const uint32_t SWR_DS_CONTEXT_pDomainU = 4; -static const uint32_t SWR_DS_CONTEXT_pDomainV = 5; -static const uint32_t SWR_DS_CONTEXT_mask = 6; -static const uint32_t SWR_DS_CONTEXT_pOutputData = 7; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for SWR_GS_CONTEXT -INLINE static StructType *Gen_SWR_GS_CONTEXT(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( ArrayType::get(Gen_simdvertex(pJitMgr), MAX_NUM_VERTS_PER_PRIM) ); // vert - members.push_back( VectorType::get(Type::getInt32Ty(ctx), pJitMgr->mVWidth) ); // PrimitiveID - members.push_back( Type::getInt32Ty(ctx) ); // InstanceID - members.push_back( VectorType::get(Type::getInt32Ty(ctx), pJitMgr->mVWidth) ); // mask - members.push_back( PointerType::get(Type::getInt8Ty(ctx), 0) ); // pStream - members.push_back( PointerType::get(Type::getInt8Ty(ctx), 0) ); // pCutOrStreamIdBuffer - members.push_back( VectorType::get(Type::getInt32Ty(ctx), pJitMgr->mVWidth) ); // vertexCount - - return StructType::get(ctx, members, false); -} - -static const uint32_t SWR_GS_CONTEXT_vert = 0; -static const uint32_t SWR_GS_CONTEXT_PrimitiveID = 1; -static const uint32_t SWR_GS_CONTEXT_InstanceID = 2; -static const uint32_t SWR_GS_CONTEXT_mask = 3; -static const uint32_t SWR_GS_CONTEXT_pStream = 4; -static const uint32_t SWR_GS_CONTEXT_pCutOrStreamIdBuffer = 5; -static const uint32_t SWR_GS_CONTEXT_vertexCount = 6; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for PixelPositions -INLINE static StructType *Gen_PixelPositions(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( VectorType::get(Type::getFloatTy(ctx), pJitMgr->mVWidth) ); // UL - members.push_back( VectorType::get(Type::getFloatTy(ctx), pJitMgr->mVWidth) ); // center - members.push_back( VectorType::get(Type::getFloatTy(ctx), pJitMgr->mVWidth) ); // sample - members.push_back( VectorType::get(Type::getFloatTy(ctx), pJitMgr->mVWidth) ); // centroid - - return StructType::get(ctx, members, false); -} - -static const uint32_t PixelPositions_UL = 0; -static const uint32_t PixelPositions_center = 1; -static const uint32_t PixelPositions_sample = 2; -static const uint32_t PixelPositions_centroid = 3; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for SWR_PS_CONTEXT -INLINE static StructType *Gen_SWR_PS_CONTEXT(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( Gen_PixelPositions(pJitMgr) ); // vX - members.push_back( Gen_PixelPositions(pJitMgr) ); // vY - members.push_back( VectorType::get(Type::getFloatTy(ctx), pJitMgr->mVWidth) ); // vZ - members.push_back( VectorType::get(Type::getInt32Ty(ctx), pJitMgr->mVWidth) ); // activeMask - members.push_back( VectorType::get(Type::getFloatTy(ctx), pJitMgr->mVWidth) ); // inputMask - members.push_back( VectorType::get(Type::getInt32Ty(ctx), pJitMgr->mVWidth) ); // oMask - members.push_back( Gen_PixelPositions(pJitMgr) ); // vI - members.push_back( Gen_PixelPositions(pJitMgr) ); // vJ - members.push_back( Gen_PixelPositions(pJitMgr) ); // vOneOverW - members.push_back( PointerType::get(Type::getFloatTy(ctx), 0) ); // pAttribs - members.push_back( PointerType::get(Type::getFloatTy(ctx), 0) ); // pPerspAttribs - members.push_back( PointerType::get(Type::getFloatTy(ctx), 0) ); // pRecipW - members.push_back( PointerType::get(Type::getFloatTy(ctx), 0) ); // I - members.push_back( PointerType::get(Type::getFloatTy(ctx), 0) ); // J - members.push_back( Type::getFloatTy(ctx) ); // recipDet - members.push_back( PointerType::get(Type::getFloatTy(ctx), 0) ); // pSamplePosX - members.push_back( PointerType::get(Type::getFloatTy(ctx), 0) ); // pSamplePosY - members.push_back( ArrayType::get(ArrayType::get(VectorType::get(Type::getFloatTy(ctx), pJitMgr->mVWidth), 4), SWR_NUM_RENDERTARGETS) ); // shaded - members.push_back( Type::getInt32Ty(ctx) ); // frontFace - members.push_back( Type::getInt32Ty(ctx) ); // primID - members.push_back( Type::getInt32Ty(ctx) ); // sampleIndex - - return StructType::get(ctx, members, false); -} - -static const uint32_t SWR_PS_CONTEXT_vX = 0; -static const uint32_t SWR_PS_CONTEXT_vY = 1; -static const uint32_t SWR_PS_CONTEXT_vZ = 2; -static const uint32_t SWR_PS_CONTEXT_activeMask = 3; -static const uint32_t SWR_PS_CONTEXT_inputMask = 4; -static const uint32_t SWR_PS_CONTEXT_oMask = 5; -static const uint32_t SWR_PS_CONTEXT_vI = 6; -static const uint32_t SWR_PS_CONTEXT_vJ = 7; -static const uint32_t SWR_PS_CONTEXT_vOneOverW = 8; -static const uint32_t SWR_PS_CONTEXT_pAttribs = 9; -static const uint32_t SWR_PS_CONTEXT_pPerspAttribs = 10; -static const uint32_t SWR_PS_CONTEXT_pRecipW = 11; -static const uint32_t SWR_PS_CONTEXT_I = 12; -static const uint32_t SWR_PS_CONTEXT_J = 13; -static const uint32_t SWR_PS_CONTEXT_recipDet = 14; -static const uint32_t SWR_PS_CONTEXT_pSamplePosX = 15; -static const uint32_t SWR_PS_CONTEXT_pSamplePosY = 16; -static const uint32_t SWR_PS_CONTEXT_shaded = 17; -static const uint32_t SWR_PS_CONTEXT_frontFace = 18; -static const uint32_t SWR_PS_CONTEXT_primID = 19; -static const uint32_t SWR_PS_CONTEXT_sampleIndex = 20; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for SWR_CS_CONTEXT -INLINE static StructType *Gen_SWR_CS_CONTEXT(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( Type::getInt32Ty(ctx) ); // tileCounter - members.push_back( ArrayType::get(Type::getInt32Ty(ctx), 3) ); // dispatchDims - members.push_back( PointerType::get(Type::getInt8Ty(ctx), 0) ); // pTGSM - members.push_back( PointerType::get(Type::getInt8Ty(ctx), 0) ); // pSpillFillBuffer - - return StructType::get(ctx, members, false); -} - -static const uint32_t SWR_CS_CONTEXT_tileCounter = 0; -static const uint32_t SWR_CS_CONTEXT_dispatchDims = 1; -static const uint32_t SWR_CS_CONTEXT_pTGSM = 2; -static const uint32_t SWR_CS_CONTEXT_pSpillFillBuffer = 3; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for SWR_SURFACE_STATE -INLINE static StructType *Gen_SWR_SURFACE_STATE(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( PointerType::get(Type::getInt8Ty(ctx), 0) ); // pBaseAddress - members.push_back( Type::getInt32Ty(ctx) ); // type - members.push_back( Type::getInt32Ty(ctx) ); // format - members.push_back( Type::getInt32Ty(ctx) ); // width - members.push_back( Type::getInt32Ty(ctx) ); // height - members.push_back( Type::getInt32Ty(ctx) ); // depth - members.push_back( Type::getInt32Ty(ctx) ); // numSamples - members.push_back( Type::getInt32Ty(ctx) ); // samplePattern - members.push_back( Type::getInt32Ty(ctx) ); // pitch - members.push_back( Type::getInt32Ty(ctx) ); // qpitch - members.push_back( Type::getInt32Ty(ctx) ); // minLod - members.push_back( Type::getInt32Ty(ctx) ); // maxLod - members.push_back( Type::getFloatTy(ctx) ); // resourceMinLod - members.push_back( Type::getInt32Ty(ctx) ); // lod - members.push_back( Type::getInt32Ty(ctx) ); // arrayIndex - members.push_back( Type::getInt32Ty(ctx) ); // tileMode - members.push_back( Type::getInt32Ty(ctx) ); // halign - members.push_back( Type::getInt32Ty(ctx) ); // valign - members.push_back( Type::getInt32Ty(ctx) ); // xOffset - members.push_back( Type::getInt32Ty(ctx) ); // yOffset - members.push_back( ArrayType::get(ArrayType::get(Type::getInt32Ty(ctx), 15), 2) ); // lodOffsets - members.push_back( PointerType::get(Type::getInt8Ty(ctx), 0) ); // pAuxBaseAddress - members.push_back( Type::getInt8Ty(ctx) ); // bInterleavedSamples - - return StructType::get(ctx, members, false); -} - -static const uint32_t SWR_SURFACE_STATE_pBaseAddress = 0; -static const uint32_t SWR_SURFACE_STATE_type = 1; -static const uint32_t SWR_SURFACE_STATE_format = 2; -static const uint32_t SWR_SURFACE_STATE_width = 3; -static const uint32_t SWR_SURFACE_STATE_height = 4; -static const uint32_t SWR_SURFACE_STATE_depth = 5; -static const uint32_t SWR_SURFACE_STATE_numSamples = 6; -static const uint32_t SWR_SURFACE_STATE_samplePattern = 7; -static const uint32_t SWR_SURFACE_STATE_pitch = 8; -static const uint32_t SWR_SURFACE_STATE_qpitch = 9; -static const uint32_t SWR_SURFACE_STATE_minLod = 10; -static const uint32_t SWR_SURFACE_STATE_maxLod = 11; -static const uint32_t SWR_SURFACE_STATE_resourceMinLod = 12; -static const uint32_t SWR_SURFACE_STATE_lod = 13; -static const uint32_t SWR_SURFACE_STATE_arrayIndex = 14; -static const uint32_t SWR_SURFACE_STATE_tileMode = 15; -static const uint32_t SWR_SURFACE_STATE_halign = 16; -static const uint32_t SWR_SURFACE_STATE_valign = 17; -static const uint32_t SWR_SURFACE_STATE_xOffset = 18; -static const uint32_t SWR_SURFACE_STATE_yOffset = 19; -static const uint32_t SWR_SURFACE_STATE_lodOffsets = 20; -static const uint32_t SWR_SURFACE_STATE_pAuxBaseAddress = 21; -static const uint32_t SWR_SURFACE_STATE_bInterleavedSamples = 22; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for SWR_VERTEX_BUFFER_STATE -INLINE static StructType *Gen_SWR_VERTEX_BUFFER_STATE(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( Type::getInt32Ty(ctx) ); // index - members.push_back( Type::getInt32Ty(ctx) ); // pitch - members.push_back( PointerType::get(Type::getInt8Ty(ctx), 0) ); // pData - members.push_back( Type::getInt32Ty(ctx) ); // size - members.push_back( Type::getInt32Ty(ctx) ); // numaNode - members.push_back( Type::getInt32Ty(ctx) ); // maxVertex - members.push_back( Type::getInt32Ty(ctx) ); // partialInboundsSize - - return StructType::get(ctx, members, false); -} - -static const uint32_t SWR_VERTEX_BUFFER_STATE_index = 0; -static const uint32_t SWR_VERTEX_BUFFER_STATE_pitch = 1; -static const uint32_t SWR_VERTEX_BUFFER_STATE_pData = 2; -static const uint32_t SWR_VERTEX_BUFFER_STATE_size = 3; -static const uint32_t SWR_VERTEX_BUFFER_STATE_numaNode = 4; -static const uint32_t SWR_VERTEX_BUFFER_STATE_maxVertex = 5; -static const uint32_t SWR_VERTEX_BUFFER_STATE_partialInboundsSize = 6; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for SWR_INDEX_BUFFER_STATE -INLINE static StructType *Gen_SWR_INDEX_BUFFER_STATE(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( Type::getInt32Ty(ctx) ); // format - members.push_back( PointerType::get(Type::getInt32Ty(ctx), 0) ); // pIndices - members.push_back( Type::getInt32Ty(ctx) ); // size - - return StructType::get(ctx, members, false); -} - -static const uint32_t SWR_INDEX_BUFFER_STATE_format = 0; -static const uint32_t SWR_INDEX_BUFFER_STATE_pIndices = 1; -static const uint32_t SWR_INDEX_BUFFER_STATE_size = 2; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for SWR_FETCH_CONTEXT -INLINE static StructType *Gen_SWR_FETCH_CONTEXT(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( PointerType::get(Gen_SWR_VERTEX_BUFFER_STATE(pJitMgr), 0) ); // pStreams - members.push_back( PointerType::get(Type::getInt32Ty(ctx), 0) ); // pIndices - members.push_back( PointerType::get(Type::getInt32Ty(ctx), 0) ); // pLastIndex - members.push_back( Type::getInt32Ty(ctx) ); // CurInstance - members.push_back( Type::getInt32Ty(ctx) ); // BaseVertex - members.push_back( Type::getInt32Ty(ctx) ); // StartVertex - members.push_back( Type::getInt32Ty(ctx) ); // StartInstance - members.push_back( VectorType::get(Type::getInt32Ty(ctx), pJitMgr->mVWidth) ); // VertexID - members.push_back( VectorType::get(Type::getInt32Ty(ctx), pJitMgr->mVWidth) ); // CutMask - - return StructType::get(ctx, members, false); -} - -static const uint32_t SWR_FETCH_CONTEXT_pStreams = 0; -static const uint32_t SWR_FETCH_CONTEXT_pIndices = 1; -static const uint32_t SWR_FETCH_CONTEXT_pLastIndex = 2; -static const uint32_t SWR_FETCH_CONTEXT_CurInstance = 3; -static const uint32_t SWR_FETCH_CONTEXT_BaseVertex = 4; -static const uint32_t SWR_FETCH_CONTEXT_StartVertex = 5; -static const uint32_t SWR_FETCH_CONTEXT_StartInstance = 6; -static const uint32_t SWR_FETCH_CONTEXT_VertexID = 7; -static const uint32_t SWR_FETCH_CONTEXT_CutMask = 8; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for SWR_STATS -INLINE static StructType *Gen_SWR_STATS(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( Type::getInt64Ty(ctx) ); // DepthPassCount - members.push_back( Type::getInt64Ty(ctx) ); // IaVertices - members.push_back( Type::getInt64Ty(ctx) ); // IaPrimitives - members.push_back( Type::getInt64Ty(ctx) ); // VsInvocations - members.push_back( Type::getInt64Ty(ctx) ); // HsInvocations - members.push_back( Type::getInt64Ty(ctx) ); // DsInvocations - members.push_back( Type::getInt64Ty(ctx) ); // GsInvocations - members.push_back( Type::getInt64Ty(ctx) ); // PsInvocations - members.push_back( Type::getInt64Ty(ctx) ); // CsInvocations - members.push_back( Type::getInt64Ty(ctx) ); // CInvocations - members.push_back( Type::getInt64Ty(ctx) ); // CPrimitives - members.push_back( Type::getInt64Ty(ctx) ); // GsPrimitives - members.push_back( ArrayType::get(Type::getInt32Ty(ctx), 4) ); // SoWriteOffset - members.push_back( ArrayType::get(Type::getInt64Ty(ctx), 4) ); // SoPrimStorageNeeded - members.push_back( ArrayType::get(Type::getInt64Ty(ctx), 4) ); // SoNumPrimsWritten - - return StructType::get(ctx, members, false); -} - -static const uint32_t SWR_STATS_DepthPassCount = 0; -static const uint32_t SWR_STATS_IaVertices = 1; -static const uint32_t SWR_STATS_IaPrimitives = 2; -static const uint32_t SWR_STATS_VsInvocations = 3; -static const uint32_t SWR_STATS_HsInvocations = 4; -static const uint32_t SWR_STATS_DsInvocations = 5; -static const uint32_t SWR_STATS_GsInvocations = 6; -static const uint32_t SWR_STATS_PsInvocations = 7; -static const uint32_t SWR_STATS_CsInvocations = 8; -static const uint32_t SWR_STATS_CInvocations = 9; -static const uint32_t SWR_STATS_CPrimitives = 10; -static const uint32_t SWR_STATS_GsPrimitives = 11; -static const uint32_t SWR_STATS_SoWriteOffset = 12; -static const uint32_t SWR_STATS_SoPrimStorageNeeded = 13; -static const uint32_t SWR_STATS_SoNumPrimsWritten = 14; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for SWR_STREAMOUT_BUFFER -INLINE static StructType *Gen_SWR_STREAMOUT_BUFFER(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( Type::getInt8Ty(ctx) ); // enable - members.push_back( PointerType::get(Type::getInt32Ty(ctx), 0) ); // pBuffer - members.push_back( Type::getInt32Ty(ctx) ); // bufferSize - members.push_back( Type::getInt32Ty(ctx) ); // pitch - members.push_back( Type::getInt32Ty(ctx) ); // streamOffset - members.push_back( PointerType::get(Type::getInt32Ty(ctx), 0) ); // pWriteOffset - - return StructType::get(ctx, members, false); -} - -static const uint32_t SWR_STREAMOUT_BUFFER_enable = 0; -static const uint32_t SWR_STREAMOUT_BUFFER_pBuffer = 1; -static const uint32_t SWR_STREAMOUT_BUFFER_bufferSize = 2; -static const uint32_t SWR_STREAMOUT_BUFFER_pitch = 3; -static const uint32_t SWR_STREAMOUT_BUFFER_streamOffset = 4; -static const uint32_t SWR_STREAMOUT_BUFFER_pWriteOffset = 5; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for SWR_STREAMOUT_STATE -INLINE static StructType *Gen_SWR_STREAMOUT_STATE(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( Type::getInt8Ty(ctx) ); // soEnable - members.push_back( ArrayType::get(Type::getInt8Ty(ctx), MAX_SO_STREAMS) ); // streamEnable - members.push_back( Type::getInt8Ty(ctx) ); // rasterizerDisable - members.push_back( Type::getInt32Ty(ctx) ); // streamToRasterizer - members.push_back( ArrayType::get(Type::getInt32Ty(ctx), MAX_SO_STREAMS) ); // streamMasks - members.push_back( ArrayType::get(Type::getInt32Ty(ctx), MAX_SO_STREAMS) ); // streamNumEntries - - return StructType::get(ctx, members, false); -} - -static const uint32_t SWR_STREAMOUT_STATE_soEnable = 0; -static const uint32_t SWR_STREAMOUT_STATE_streamEnable = 1; -static const uint32_t SWR_STREAMOUT_STATE_rasterizerDisable = 2; -static const uint32_t SWR_STREAMOUT_STATE_streamToRasterizer = 3; -static const uint32_t SWR_STREAMOUT_STATE_streamMasks = 4; -static const uint32_t SWR_STREAMOUT_STATE_streamNumEntries = 5; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for SWR_STREAMOUT_CONTEXT -INLINE static StructType *Gen_SWR_STREAMOUT_CONTEXT(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( PointerType::get(Type::getInt32Ty(ctx), 0) ); // pPrimData - members.push_back( ArrayType::get(PointerType::get(Gen_SWR_STREAMOUT_BUFFER(pJitMgr), 0), MAX_SO_STREAMS) ); // pBuffer - members.push_back( Type::getInt32Ty(ctx) ); // numPrimsWritten - members.push_back( Type::getInt32Ty(ctx) ); // numPrimStorageNeeded - - return StructType::get(ctx, members, false); -} - -static const uint32_t SWR_STREAMOUT_CONTEXT_pPrimData = 0; -static const uint32_t SWR_STREAMOUT_CONTEXT_pBuffer = 1; -static const uint32_t SWR_STREAMOUT_CONTEXT_numPrimsWritten = 2; -static const uint32_t SWR_STREAMOUT_CONTEXT_numPrimStorageNeeded = 3; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for SWR_GS_STATE -INLINE static StructType *Gen_SWR_GS_STATE(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( Type::getInt8Ty(ctx) ); // gsEnable - members.push_back( Type::getInt32Ty(ctx) ); // numInputAttribs - members.push_back( Type::getInt32Ty(ctx) ); // outputTopology - members.push_back( Type::getInt32Ty(ctx) ); // maxNumVerts - members.push_back( Type::getInt32Ty(ctx) ); // instanceCount - members.push_back( Type::getInt8Ty(ctx) ); // emitsRenderTargetArrayIndex - members.push_back( Type::getInt8Ty(ctx) ); // emitsPrimitiveID - members.push_back( Type::getInt8Ty(ctx) ); // isSingleStream - members.push_back( Type::getInt32Ty(ctx) ); // singleStreamID - - return StructType::get(ctx, members, false); -} - -static const uint32_t SWR_GS_STATE_gsEnable = 0; -static const uint32_t SWR_GS_STATE_numInputAttribs = 1; -static const uint32_t SWR_GS_STATE_outputTopology = 2; -static const uint32_t SWR_GS_STATE_maxNumVerts = 3; -static const uint32_t SWR_GS_STATE_instanceCount = 4; -static const uint32_t SWR_GS_STATE_emitsRenderTargetArrayIndex = 5; -static const uint32_t SWR_GS_STATE_emitsPrimitiveID = 6; -static const uint32_t SWR_GS_STATE_isSingleStream = 7; -static const uint32_t SWR_GS_STATE_singleStreamID = 8; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for SWR_TS_STATE -INLINE static StructType *Gen_SWR_TS_STATE(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( Type::getInt8Ty(ctx) ); // tsEnable - members.push_back( Type::getInt32Ty(ctx) ); // tsOutputTopology - members.push_back( Type::getInt32Ty(ctx) ); // partitioning - members.push_back( Type::getInt32Ty(ctx) ); // domain - members.push_back( Type::getInt32Ty(ctx) ); // postDSTopology - members.push_back( Type::getInt32Ty(ctx) ); // numHsInputAttribs - members.push_back( Type::getInt32Ty(ctx) ); // numHsOutputAttribs - members.push_back( Type::getInt32Ty(ctx) ); // numDsOutputAttribs - - return StructType::get(ctx, members, false); -} - -static const uint32_t SWR_TS_STATE_tsEnable = 0; -static const uint32_t SWR_TS_STATE_tsOutputTopology = 1; -static const uint32_t SWR_TS_STATE_partitioning = 2; -static const uint32_t SWR_TS_STATE_domain = 3; -static const uint32_t SWR_TS_STATE_postDSTopology = 4; -static const uint32_t SWR_TS_STATE_numHsInputAttribs = 5; -static const uint32_t SWR_TS_STATE_numHsOutputAttribs = 6; -static const uint32_t SWR_TS_STATE_numDsOutputAttribs = 7; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for SWR_RENDER_TARGET_BLEND_STATE -INLINE static StructType *Gen_SWR_RENDER_TARGET_BLEND_STATE(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( Type::getInt8Ty(ctx) ); // writeDisableRed - members.push_back( Type::getInt8Ty(ctx) ); // writeDisableGreen - members.push_back( Type::getInt8Ty(ctx) ); // writeDisableBlue - members.push_back( Type::getInt8Ty(ctx) ); // writeDisableAlpha - - return StructType::get(ctx, members, false); -} - -static const uint32_t SWR_RENDER_TARGET_BLEND_STATE_writeDisableRed = 0; -static const uint32_t SWR_RENDER_TARGET_BLEND_STATE_writeDisableGreen = 1; -static const uint32_t SWR_RENDER_TARGET_BLEND_STATE_writeDisableBlue = 2; -static const uint32_t SWR_RENDER_TARGET_BLEND_STATE_writeDisableAlpha = 3; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for SWR_BLEND_STATE -INLINE static StructType *Gen_SWR_BLEND_STATE(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( ArrayType::get(Type::getFloatTy(ctx), 4) ); // constantColor - members.push_back( Type::getInt32Ty(ctx) ); // alphaTestReference - members.push_back( Type::getInt32Ty(ctx) ); // sampleMask - members.push_back( Type::getInt32Ty(ctx) ); // sampleCount - members.push_back( ArrayType::get(Gen_SWR_RENDER_TARGET_BLEND_STATE(pJitMgr), SWR_NUM_RENDERTARGETS) ); // renderTarget - - return StructType::get(ctx, members, false); -} - -static const uint32_t SWR_BLEND_STATE_constantColor = 0; -static const uint32_t SWR_BLEND_STATE_alphaTestReference = 1; -static const uint32_t SWR_BLEND_STATE_sampleMask = 2; -static const uint32_t SWR_BLEND_STATE_sampleCount = 3; -static const uint32_t SWR_BLEND_STATE_renderTarget = 4; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for SWR_FRONTEND_STATE -INLINE static StructType *Gen_SWR_FRONTEND_STATE(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( Type::getInt8Ty(ctx) ); // vpTransformDisable - members.push_back( Type::getInt8Ty(ctx) ); // bEnableCutIndex - members.push_back( Type::getInt32Ty(ctx) ); // triFan - members.push_back( Type::getInt32Ty(ctx) ); // lineStripList - members.push_back( Type::getInt32Ty(ctx) ); // triStripList - - return StructType::get(ctx, members, false); -} - -static const uint32_t SWR_FRONTEND_STATE_vpTransformDisable = 0; -static const uint32_t SWR_FRONTEND_STATE_bEnableCutIndex = 1; -static const uint32_t SWR_FRONTEND_STATE_triFan = 2; -static const uint32_t SWR_FRONTEND_STATE_lineStripList = 3; -static const uint32_t SWR_FRONTEND_STATE_triStripList = 4; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for SWR_VIEWPORT_MATRIX -INLINE static StructType *Gen_SWR_VIEWPORT_MATRIX(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( Type::getFloatTy(ctx) ); // m00 - members.push_back( Type::getFloatTy(ctx) ); // m11 - members.push_back( Type::getFloatTy(ctx) ); // m22 - members.push_back( Type::getFloatTy(ctx) ); // m30 - members.push_back( Type::getFloatTy(ctx) ); // m31 - members.push_back( Type::getFloatTy(ctx) ); // m32 - - return StructType::get(ctx, members, false); -} - -static const uint32_t SWR_VIEWPORT_MATRIX_m00 = 0; -static const uint32_t SWR_VIEWPORT_MATRIX_m11 = 1; -static const uint32_t SWR_VIEWPORT_MATRIX_m22 = 2; -static const uint32_t SWR_VIEWPORT_MATRIX_m30 = 3; -static const uint32_t SWR_VIEWPORT_MATRIX_m31 = 4; -static const uint32_t SWR_VIEWPORT_MATRIX_m32 = 5; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for SWR_VIEWPORT -INLINE static StructType *Gen_SWR_VIEWPORT(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( Type::getFloatTy(ctx) ); // x - members.push_back( Type::getFloatTy(ctx) ); // y - members.push_back( Type::getFloatTy(ctx) ); // width - members.push_back( Type::getFloatTy(ctx) ); // height - members.push_back( Type::getFloatTy(ctx) ); // minZ - members.push_back( Type::getFloatTy(ctx) ); // maxZ - - return StructType::get(ctx, members, false); -} - -static const uint32_t SWR_VIEWPORT_x = 0; -static const uint32_t SWR_VIEWPORT_y = 1; -static const uint32_t SWR_VIEWPORT_width = 2; -static const uint32_t SWR_VIEWPORT_height = 3; -static const uint32_t SWR_VIEWPORT_minZ = 4; -static const uint32_t SWR_VIEWPORT_maxZ = 5; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for SWR_MULTISAMPLE_POS -INLINE static StructType *Gen_SWR_MULTISAMPLE_POS(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( Type::getInt32Ty(ctx) ); // x - members.push_back( Type::getInt32Ty(ctx) ); // y - - return StructType::get(ctx, members, false); -} - -static const uint32_t SWR_MULTISAMPLE_POS_x = 0; -static const uint32_t SWR_MULTISAMPLE_POS_y = 1; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for SWR_RASTSTATE -INLINE static StructType *Gen_SWR_RASTSTATE(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( Type::getInt32Ty(ctx) ); // cullMode - members.push_back( Type::getInt32Ty(ctx) ); // fillMode - members.push_back( Type::getInt32Ty(ctx) ); // frontWinding - members.push_back( Type::getInt32Ty(ctx) ); // scissorEnable - members.push_back( Type::getInt32Ty(ctx) ); // depthClipEnable - members.push_back( Type::getInt32Ty(ctx) ); // pointParam - members.push_back( Type::getInt32Ty(ctx) ); // pointSpriteEnable - members.push_back( Type::getInt32Ty(ctx) ); // pointSpriteTopOrigin - members.push_back( Type::getInt32Ty(ctx) ); // msaaRastEnable - members.push_back( Type::getInt32Ty(ctx) ); // forcedSampleCount - members.push_back( Type::getInt32Ty(ctx) ); // pixelOffset - members.push_back( Type::getInt32Ty(ctx) ); // depthBiasPreAdjusted - members.push_back( Type::getFloatTy(ctx) ); // pointSize - members.push_back( Type::getFloatTy(ctx) ); // lineWidth - members.push_back( Type::getFloatTy(ctx) ); // depthBias - members.push_back( Type::getFloatTy(ctx) ); // slopeScaledDepthBias - members.push_back( Type::getFloatTy(ctx) ); // depthBiasClamp - members.push_back( Type::getInt32Ty(ctx) ); // depthFormat - members.push_back( Type::getInt32Ty(ctx) ); // rastMode - members.push_back( Type::getInt32Ty(ctx) ); // sampleCount - members.push_back( Type::getInt32Ty(ctx) ); // pixelLocation - members.push_back( ArrayType::get(Gen_SWR_MULTISAMPLE_POS(pJitMgr), SWR_MAX_NUM_MULTISAMPLES) ); // iSamplePos - members.push_back( Type::getInt32Ty(ctx) ); // samplePattern - members.push_back( Type::getInt8Ty(ctx) ); // cullDistanceMask - members.push_back( Type::getInt8Ty(ctx) ); // clipDistanceMask - - return StructType::get(ctx, members, false); -} - -static const uint32_t SWR_RASTSTATE_cullMode = 0; -static const uint32_t SWR_RASTSTATE_fillMode = 1; -static const uint32_t SWR_RASTSTATE_frontWinding = 2; -static const uint32_t SWR_RASTSTATE_scissorEnable = 3; -static const uint32_t SWR_RASTSTATE_depthClipEnable = 4; -static const uint32_t SWR_RASTSTATE_pointParam = 5; -static const uint32_t SWR_RASTSTATE_pointSpriteEnable = 6; -static const uint32_t SWR_RASTSTATE_pointSpriteTopOrigin = 7; -static const uint32_t SWR_RASTSTATE_msaaRastEnable = 8; -static const uint32_t SWR_RASTSTATE_forcedSampleCount = 9; -static const uint32_t SWR_RASTSTATE_pixelOffset = 10; -static const uint32_t SWR_RASTSTATE_depthBiasPreAdjusted = 11; -static const uint32_t SWR_RASTSTATE_pointSize = 12; -static const uint32_t SWR_RASTSTATE_lineWidth = 13; -static const uint32_t SWR_RASTSTATE_depthBias = 14; -static const uint32_t SWR_RASTSTATE_slopeScaledDepthBias = 15; -static const uint32_t SWR_RASTSTATE_depthBiasClamp = 16; -static const uint32_t SWR_RASTSTATE_depthFormat = 17; -static const uint32_t SWR_RASTSTATE_rastMode = 18; -static const uint32_t SWR_RASTSTATE_sampleCount = 19; -static const uint32_t SWR_RASTSTATE_pixelLocation = 20; -static const uint32_t SWR_RASTSTATE_iSamplePos = 21; -static const uint32_t SWR_RASTSTATE_samplePattern = 22; -static const uint32_t SWR_RASTSTATE_cullDistanceMask = 23; -static const uint32_t SWR_RASTSTATE_clipDistanceMask = 24; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for SWR_BACKEND_STATE -INLINE static StructType *Gen_SWR_BACKEND_STATE(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( Type::getInt32Ty(ctx) ); // constantInterpolationMask - members.push_back( Type::getInt32Ty(ctx) ); // pointSpriteTexCoordMask - members.push_back( Type::getInt8Ty(ctx) ); // numAttributes - members.push_back( ArrayType::get(Type::getInt8Ty(ctx), KNOB_NUM_ATTRIBUTES) ); // numComponents - - return StructType::get(ctx, members, false); -} - -static const uint32_t SWR_BACKEND_STATE_constantInterpolationMask = 0; -static const uint32_t SWR_BACKEND_STATE_pointSpriteTexCoordMask = 1; -static const uint32_t SWR_BACKEND_STATE_numAttributes = 2; -static const uint32_t SWR_BACKEND_STATE_numComponents = 3; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for SWR_PS_STATE -INLINE static StructType *Gen_SWR_PS_STATE(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( PointerType::get(Type::getInt8Ty(ctx), 0) ); // pfnPixelShader - members.push_back( Type::getInt32Ty(ctx) ); // killsPixel - members.push_back( Type::getInt32Ty(ctx) ); // inputCoverage - members.push_back( Type::getInt32Ty(ctx) ); // writesODepth - members.push_back( Type::getInt32Ty(ctx) ); // usesSourceDepth - members.push_back( Type::getInt32Ty(ctx) ); // shadingRate - members.push_back( Type::getInt32Ty(ctx) ); // numRenderTargets - members.push_back( Type::getInt32Ty(ctx) ); // posOffset - members.push_back( Type::getInt32Ty(ctx) ); // barycentricsMask - members.push_back( Type::getInt32Ty(ctx) ); // usesUAV - members.push_back( Type::getInt32Ty(ctx) ); // forceEarlyZ - - return StructType::get(ctx, members, false); -} - -static const uint32_t SWR_PS_STATE_pfnPixelShader = 0; -static const uint32_t SWR_PS_STATE_killsPixel = 1; -static const uint32_t SWR_PS_STATE_inputCoverage = 2; -static const uint32_t SWR_PS_STATE_writesODepth = 3; -static const uint32_t SWR_PS_STATE_usesSourceDepth = 4; -static const uint32_t SWR_PS_STATE_shadingRate = 5; -static const uint32_t SWR_PS_STATE_numRenderTargets = 6; -static const uint32_t SWR_PS_STATE_posOffset = 7; -static const uint32_t SWR_PS_STATE_barycentricsMask = 8; -static const uint32_t SWR_PS_STATE_usesUAV = 9; -static const uint32_t SWR_PS_STATE_forceEarlyZ = 10; - diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/streamout_jit.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/streamout_jit.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/jitter/streamout_jit.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/jitter/streamout_jit.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -36,6 +36,9 @@ #include #include +using namespace llvm; +using namespace SwrJit; + ////////////////////////////////////////////////////////////////////////// /// Interface to Jitting a fetch shader ////////////////////////////////////////////////////////////////////////// @@ -278,7 +281,7 @@ IRB()->SetInsertPoint(entry); // arguments - auto argitr = soFunc->getArgumentList().begin(); + auto argitr = soFunc->arg_begin(); Value* pSoCtx = &*argitr++; pSoCtx->setName("pSoCtx"); diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/ClearTile.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/ClearTile.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/ClearTile.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/ClearTile.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -33,7 +33,7 @@ #include "memory/tilingtraits.h" #include "memory/Convert.h" -typedef void(*PFN_STORE_TILES_CLEAR)(const float*, SWR_SURFACE_STATE*, UINT, UINT); +typedef void(*PFN_STORE_TILES_CLEAR)(const float*, SWR_SURFACE_STATE*, UINT, UINT, uint32_t); ////////////////////////////////////////////////////////////////////////// /// Clear Raster Tile Function Tables. @@ -57,18 +57,29 @@ const uint8_t* dstFormattedColor, UINT dstBytesPerPixel, SWR_SURFACE_STATE* pDstSurface, - UINT x, UINT y) // (x, y) pixel coordinate to start of raster tile. + UINT x, UINT y, // (x, y) pixel coordinate to start of raster tile. + uint32_t renderTargetArrayIndex) { + // If we're outside of the surface, stop. + uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod, 1U); + uint32_t lodHeight = std::max(pDstSurface->height >> pDstSurface->lod, 1U); + if (x >= lodWidth || y >= lodHeight) + return; + // Compute destination address for raster tile. - uint8_t* pDstTile = (uint8_t*)pDstSurface->pBaseAddress + - (y * pDstSurface->pitch) + (x * dstBytesPerPixel); + uint8_t* pDstTile = (uint8_t*)ComputeSurfaceAddress( + x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, + pDstSurface->arrayIndex + renderTargetArrayIndex, + 0, // sampleNum + pDstSurface->lod, + pDstSurface); // start of first row uint8_t* pDst = pDstTile; UINT dstBytesPerRow = 0; // For each raster tile pixel in row 0 (rx, 0) - for (UINT rx = 0; (rx < KNOB_TILE_X_DIM) && ((x + rx) < pDstSurface->width); ++rx) + for (UINT rx = 0; (rx < KNOB_TILE_X_DIM) && ((x + rx) < lodWidth); ++rx) { memcpy(pDst, dstFormattedColor, dstBytesPerPixel); @@ -81,7 +92,7 @@ pDst = pDstTile + pDstSurface->pitch; // For each remaining row in the rest of the raster tile - for (UINT ry = 1; (ry < KNOB_TILE_Y_DIM) && ((y + ry) < pDstSurface->height); ++ry) + for (UINT ry = 1; (ry < KNOB_TILE_Y_DIM) && ((y + ry) < lodHeight); ++ry) { // copy row memcpy(pDst, pDstTile, dstBytesPerRow); @@ -106,7 +117,7 @@ static void StoreClear( const float *pColor, SWR_SURFACE_STATE* pDstSurface, - UINT x, UINT y) + UINT x, UINT y, uint32_t renderTargetArrayIndex) { UINT dstBytesPerPixel = (FormatTraits::bpp / 8); @@ -129,7 +140,7 @@ { for (UINT col = 0; col < KNOB_MACROTILE_X_DIM; col += KNOB_TILE_X_DIM) { - StoreRasterTileClear::StoreClear(dstFormattedColor, dstBytesPerPixel, pDstSurface, (x + col), (y + row)); + StoreRasterTileClear::StoreClear(dstFormattedColor, dstBytesPerPixel, pDstSurface, (x + col), (y + row), renderTargetArrayIndex); } } } @@ -146,20 +157,24 @@ SWR_RENDERTARGET_ATTACHMENT renderTargetIndex, UINT x, UINT y, + uint32_t renderTargetArrayIndex, const float* pClearColor) { PFN_STORE_TILES_CLEAR pfnStoreTilesClear = NULL; - SWR_ASSERT(renderTargetIndex != SWR_ATTACHMENT_STENCIL); ///@todo Not supported yet. - - if (renderTargetIndex != SWR_ATTACHMENT_DEPTH) + if (renderTargetIndex == SWR_ATTACHMENT_STENCIL) { - pfnStoreTilesClear = sStoreTilesClearColorTable[pDstSurface->format]; + SWR_ASSERT(pDstSurface->format == R8_UINT); + pfnStoreTilesClear = StoreMacroTileClear::StoreClear; } - else + else if (renderTargetIndex == SWR_ATTACHMENT_DEPTH) { pfnStoreTilesClear = sStoreTilesClearDepthTable[pDstSurface->format]; } + else + { + pfnStoreTilesClear = sStoreTilesClearColorTable[pDstSurface->format]; + } SWR_ASSERT(pfnStoreTilesClear != NULL); @@ -167,7 +182,7 @@ /// @todo Once all formats are supported then if check can go away. This is to help us near term to make progress. if (pfnStoreTilesClear != NULL) { - pfnStoreTilesClear(pClearColor, pDstSurface, x, y); + pfnStoreTilesClear(pClearColor, pDstSurface, x, y, renderTargetArrayIndex); } } @@ -276,7 +291,9 @@ memset(sStoreTilesClearDepthTable, 0, sizeof(sStoreTilesClearDepthTable)); \ \ sStoreTilesClearDepthTable[R32_FLOAT] = StoreMacroTileClear::StoreClear; \ + sStoreTilesClearDepthTable[R32_FLOAT_X8X24_TYPELESS] = StoreMacroTileClear::StoreClear; \ sStoreTilesClearDepthTable[R24_UNORM_X8_TYPELESS] = StoreMacroTileClear::StoreClear; \ + sStoreTilesClearDepthTable[R16_UNORM] = StoreMacroTileClear::StoreClear; \ ////////////////////////////////////////////////////////////////////////// /// @brief Sets up tables for ClearTile diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/Convert.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/Convert.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/Convert.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/Convert.h 2017-06-01 10:37:10.000000000 +0000 @@ -336,7 +336,7 @@ // Convert from 32-bit float to 16-bit float using _mm_cvtps_ph // @todo 16bit float instruction support is orthogonal to avx support. need to // add check for F16C support instead. -#if KNOB_ARCH == KNOB_ARCH_AVX2 +#if KNOB_ARCH >= KNOB_ARCH_AVX2 __m128 src128 = _mm_set1_ps(src); __m128i srci128 = _mm_cvtps_ph(src128, _MM_FROUND_TRUNC); UINT value = _mm_extract_epi16(srci128, 0); @@ -519,7 +519,7 @@ float dst; if (FormatTraits::GetBPC(comp) == 16) { -#if KNOB_ARCH == KNOB_ARCH_AVX2 +#if KNOB_ARCH >= KNOB_ARCH_AVX2 // Convert from 16-bit float to 32-bit float using _mm_cvtph_ps // @todo 16bit float instruction support is orthogonal to avx support. need to // add check for F16C support instead. @@ -581,13 +581,16 @@ case R32G32_SINT: ConvertPixelFromFloat(pDst, srcPixel); break; case R32G32_UINT: ConvertPixelFromFloat(pDst, srcPixel); break; case R32_FLOAT_X8X24_TYPELESS: ConvertPixelFromFloat(pDst, srcPixel); break; + case X32_TYPELESS_G8X24_UINT: ConvertPixelFromFloat(pDst, srcPixel); break; + case L32A32_FLOAT: ConvertPixelFromFloat(pDst, srcPixel); break; case R16G16B16X16_UNORM: ConvertPixelFromFloat(pDst, srcPixel); break; case R16G16B16X16_FLOAT: ConvertPixelFromFloat(pDst, srcPixel); break; + case L32X32_FLOAT: ConvertPixelFromFloat(pDst, srcPixel); break; + case I32X32_FLOAT: ConvertPixelFromFloat(pDst, srcPixel); break; case R16G16B16A16_SSCALED: ConvertPixelFromFloat(pDst, srcPixel); break; case R16G16B16A16_USCALED: ConvertPixelFromFloat(pDst, srcPixel); break; case R32G32_SSCALED: ConvertPixelFromFloat(pDst, srcPixel); break; case R32G32_USCALED: ConvertPixelFromFloat(pDst, srcPixel); break; - case R32_FLOAT_X8X24_TYPELESS_LD: ConvertPixelFromFloat(pDst, srcPixel); break; case B8G8R8A8_UNORM: ConvertPixelFromFloat(pDst, srcPixel); break; case B8G8R8A8_UNORM_SRGB: ConvertPixelFromFloat(pDst, srcPixel); break; case R10G10B10A2_UNORM: ConvertPixelFromFloat(pDst, srcPixel); break; @@ -606,11 +609,18 @@ case B10G10R10A2_UNORM: ConvertPixelFromFloat(pDst, srcPixel); break; case B10G10R10A2_UNORM_SRGB: ConvertPixelFromFloat(pDst, srcPixel); break; case R11G11B10_FLOAT: ConvertPixelFromFloat(pDst, srcPixel); break; + case R10G10B10_FLOAT_A2_UNORM: ConvertPixelFromFloat(pDst, srcPixel); break; case R32_SINT: ConvertPixelFromFloat(pDst, srcPixel); break; case R32_UINT: ConvertPixelFromFloat(pDst, srcPixel); break; case R32_FLOAT: ConvertPixelFromFloat(pDst, srcPixel); break; case R24_UNORM_X8_TYPELESS: ConvertPixelFromFloat(pDst, srcPixel); break; - case R24_UNORM_X8_TYPELESS_LD: ConvertPixelFromFloat(pDst, srcPixel); break; + case X24_TYPELESS_G8_UINT: ConvertPixelFromFloat(pDst, srcPixel); break; + case L32_UNORM: ConvertPixelFromFloat(pDst, srcPixel); break; + case L16A16_UNORM: ConvertPixelFromFloat(pDst, srcPixel); break; + case I24X8_UNORM: ConvertPixelFromFloat(pDst, srcPixel); break; + case L24X8_UNORM: ConvertPixelFromFloat(pDst, srcPixel); break; + case I32_FLOAT: ConvertPixelFromFloat(pDst, srcPixel); break; + case L32_FLOAT: ConvertPixelFromFloat(pDst, srcPixel); break; case A32_FLOAT: ConvertPixelFromFloat(pDst, srcPixel); break; case B8G8R8X8_UNORM: ConvertPixelFromFloat(pDst, srcPixel); break; case B8G8R8X8_UNORM_SRGB: ConvertPixelFromFloat(pDst, srcPixel); break; @@ -618,6 +628,7 @@ case R8G8B8X8_UNORM_SRGB: ConvertPixelFromFloat(pDst, srcPixel); break; case R9G9B9E5_SHAREDEXP: ConvertPixelFromFloat(pDst, srcPixel); break; case B10G10R10X2_UNORM: ConvertPixelFromFloat(pDst, srcPixel); break; + case L16A16_FLOAT: ConvertPixelFromFloat(pDst, srcPixel); break; case R10G10B10X2_USCALED: ConvertPixelFromFloat(pDst, srcPixel); break; case R8G8B8A8_SSCALED: ConvertPixelFromFloat(pDst, srcPixel); break; case R8G8B8A8_USCALED: ConvertPixelFromFloat(pDst, srcPixel); break; @@ -640,21 +651,38 @@ case R16_SINT: ConvertPixelFromFloat(pDst, srcPixel); break; case R16_UINT: ConvertPixelFromFloat(pDst, srcPixel); break; case R16_FLOAT: ConvertPixelFromFloat(pDst, srcPixel); break; + case I16_UNORM: ConvertPixelFromFloat(pDst, srcPixel); break; + case L16_UNORM: ConvertPixelFromFloat(pDst, srcPixel); break; case A16_UNORM: ConvertPixelFromFloat(pDst, srcPixel); break; + case L8A8_UNORM: ConvertPixelFromFloat(pDst, srcPixel); break; + case I16_FLOAT: ConvertPixelFromFloat(pDst, srcPixel); break; + case L16_FLOAT: ConvertPixelFromFloat(pDst, srcPixel); break; case A16_FLOAT: ConvertPixelFromFloat(pDst, srcPixel); break; + case L8A8_UNORM_SRGB: ConvertPixelFromFloat(pDst, srcPixel); break; case B5G5R5X1_UNORM: ConvertPixelFromFloat(pDst, srcPixel); break; case B5G5R5X1_UNORM_SRGB: ConvertPixelFromFloat(pDst, srcPixel); break; case R8G8_SSCALED: ConvertPixelFromFloat(pDst, srcPixel); break; case R8G8_USCALED: ConvertPixelFromFloat(pDst, srcPixel); break; case R16_SSCALED: ConvertPixelFromFloat(pDst, srcPixel); break; case R16_USCALED: ConvertPixelFromFloat(pDst, srcPixel); break; + case A1B5G5R5_UNORM: ConvertPixelFromFloat(pDst, srcPixel); break; + case A4B4G4R4_UNORM: ConvertPixelFromFloat(pDst, srcPixel); break; + case L8A8_UINT: ConvertPixelFromFloat(pDst, srcPixel); break; + case L8A8_SINT: ConvertPixelFromFloat(pDst, srcPixel); break; case R8_UNORM: ConvertPixelFromFloat(pDst, srcPixel); break; case R8_SNORM: ConvertPixelFromFloat(pDst, srcPixel); break; case R8_SINT: ConvertPixelFromFloat(pDst, srcPixel); break; case R8_UINT: ConvertPixelFromFloat(pDst, srcPixel); break; case A8_UNORM: ConvertPixelFromFloat(pDst, srcPixel); break; + case I8_UNORM: ConvertPixelFromFloat(pDst, srcPixel); break; + case L8_UNORM: ConvertPixelFromFloat(pDst, srcPixel); break; case R8_SSCALED: ConvertPixelFromFloat(pDst, srcPixel); break; case R8_USCALED: ConvertPixelFromFloat(pDst, srcPixel); break; + case L8_UNORM_SRGB: ConvertPixelFromFloat(pDst, srcPixel); break; + case L8_UINT: ConvertPixelFromFloat(pDst, srcPixel); break; + case L8_SINT: ConvertPixelFromFloat(pDst, srcPixel); break; + case I8_UINT: ConvertPixelFromFloat(pDst, srcPixel); break; + case I8_SINT: ConvertPixelFromFloat(pDst, srcPixel); break; case YCRCB_SWAPUVY: ConvertPixelFromFloat(pDst, srcPixel); break; case BC1_UNORM: ConvertPixelFromFloat(pDst, srcPixel); break; case BC2_UNORM: ConvertPixelFromFloat(pDst, srcPixel); break; @@ -676,8 +704,10 @@ case R16G16B16_SNORM: ConvertPixelFromFloat(pDst, srcPixel); break; case R16G16B16_SSCALED: ConvertPixelFromFloat(pDst, srcPixel); break; case R16G16B16_USCALED: ConvertPixelFromFloat(pDst, srcPixel); break; + case BC6H_SF16: ConvertPixelFromFloat(pDst, srcPixel); break; case BC7_UNORM: ConvertPixelFromFloat(pDst, srcPixel); break; case BC7_UNORM_SRGB: ConvertPixelFromFloat(pDst, srcPixel); break; + case BC6H_UF16: ConvertPixelFromFloat(pDst, srcPixel); break; case R8G8B8_UNORM_SRGB: ConvertPixelFromFloat(pDst, srcPixel); break; case R16G16B16_UINT: ConvertPixelFromFloat(pDst, srcPixel); break; case R16G16B16_SINT: ConvertPixelFromFloat(pDst, srcPixel); break; @@ -692,9 +722,9 @@ case B10G10R10A2_SINT: ConvertPixelFromFloat(pDst, srcPixel); break; case R8G8B8_UINT: ConvertPixelFromFloat(pDst, srcPixel); break; case R8G8B8_SINT: ConvertPixelFromFloat(pDst, srcPixel); break; + case RAW: ConvertPixelFromFloat(pDst, srcPixel); break; default: + SWR_ASSERT(0); break; } } - - diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/LoadTile.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/LoadTile.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/LoadTile.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/LoadTile.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -1,5 +1,5 @@ /**************************************************************************** -* Copyright (C) 2014-2015 Intel Corporation. All Rights Reserved. +* Copyright (C) 2014-2016 Intel Corporation. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -25,125 +25,7 @@ * @brief Functionality for Load * ******************************************************************************/ -#include "common/os.h" -#include "common/formats.h" -#include "core/context.h" -#include "core/rdtsc_core.h" -#include "memory/TilingFunctions.h" -#include "memory/tilingtraits.h" -#include "memory/Convert.h" - -typedef void(*PFN_LOAD_TILES)(const SWR_SURFACE_STATE*, uint8_t*, uint32_t, uint32_t, uint32_t); - -////////////////////////////////////////////////////////////////////////// -/// Load Raster Tile Function Tables. -////////////////////////////////////////////////////////////////////////// -static PFN_LOAD_TILES sLoadTilesColorTable_SWR_TILE_NONE[NUM_SWR_FORMATS]; -static PFN_LOAD_TILES sLoadTilesDepthTable_SWR_TILE_NONE[NUM_SWR_FORMATS]; - -static PFN_LOAD_TILES sLoadTilesColorTable_SWR_TILE_MODE_YMAJOR[NUM_SWR_FORMATS]; -static PFN_LOAD_TILES sLoadTilesColorTable_SWR_TILE_MODE_XMAJOR[NUM_SWR_FORMATS]; - -static PFN_LOAD_TILES sLoadTilesDepthTable_SWR_TILE_MODE_YMAJOR[NUM_SWR_FORMATS]; - -////////////////////////////////////////////////////////////////////////// -/// LoadRasterTile -////////////////////////////////////////////////////////////////////////// -template -struct LoadRasterTile -{ - ////////////////////////////////////////////////////////////////////////// - /// @brief Retrieve color from hot tile source which is always float. - /// @param pSrc - Pointer to raster tile. - /// @param x, y - Coordinates to raster tile. - /// @param output - output color - INLINE static void SetSwizzledDstColor( - const float srcColor[4], - uint32_t x, uint32_t y, - uint8_t* pDst) - { - typedef SimdTile SimdT; - - SimdT* pDstSimdTiles = (SimdT*)pDst; - - // Compute which simd tile we're accessing within 8x8 tile. - // i.e. Compute linear simd tile coordinate given (x, y) in pixel coordinates. - uint32_t simdIndex = (y / SIMD_TILE_Y_DIM) * (KNOB_TILE_X_DIM / SIMD_TILE_X_DIM) + (x / SIMD_TILE_X_DIM); - - SimdT* pSimdTile = &pDstSimdTiles[simdIndex]; - - uint32_t simdOffset = (y % SIMD_TILE_Y_DIM) * SIMD_TILE_X_DIM + (x % SIMD_TILE_X_DIM); - - pSimdTile->SetSwizzledColor(simdOffset, srcColor); - } - - ////////////////////////////////////////////////////////////////////////// - /// @brief Loads an 8x8 raster tile from the src surface. - /// @param pSrcSurface - Src surface state - /// @param pDst - Destination hot tile pointer - /// @param x, y - Coordinates to raster tile. - INLINE static void Load( - const SWR_SURFACE_STATE* pSrcSurface, - uint8_t* pDst, - uint32_t x, uint32_t y, uint32_t sampleNum, uint32_t renderTargetArrayIndex) // (x, y) pixel coordinate to start of raster tile. - { - uint32_t lodWidth = (pSrcSurface->width == 1) ? 1 : pSrcSurface->width >> pSrcSurface->lod; - uint32_t lodHeight = (pSrcSurface->height == 1) ? 1 : pSrcSurface->height >> pSrcSurface->lod; - - // For each raster tile pixel (rx, ry) - for (uint32_t ry = 0; ry < KNOB_TILE_Y_DIM; ++ry) - { - for (uint32_t rx = 0; rx < KNOB_TILE_X_DIM; ++rx) - { - if (((x + rx) < lodWidth) && - ((y + ry) < lodHeight)) - { - uint8_t* pSrc = (uint8_t*)ComputeSurfaceAddress(x + rx, y + ry, pSrcSurface->arrayIndex + renderTargetArrayIndex, - pSrcSurface->arrayIndex + renderTargetArrayIndex, sampleNum, - pSrcSurface->lod, pSrcSurface); - - float srcColor[4]; - ConvertPixelToFloat(srcColor, pSrc); - - // store pixel to hottile - SetSwizzledDstColor(srcColor, rx, ry, pDst); - } - } - } - } -}; - -////////////////////////////////////////////////////////////////////////// -/// LoadMacroTile - Loads a macro tile which consists of raster tiles. -////////////////////////////////////////////////////////////////////////// -template -struct LoadMacroTile -{ - ////////////////////////////////////////////////////////////////////////// - /// @brief Load a macrotile to the destination surface. - /// @param pSrc - Pointer to macro tile. - /// @param pDstSurface - Destination surface state - /// @param x, y - Coordinates to macro tile - static void Load( - const SWR_SURFACE_STATE* pSrcSurface, - uint8_t *pDstHotTile, - uint32_t x, uint32_t y, uint32_t renderTargetArrayIndex) - { - // Load each raster tile from the hot tile to the destination surface. - for (uint32_t row = 0; row < KNOB_MACROTILE_Y_DIM; row += KNOB_TILE_Y_DIM) - { - for (uint32_t col = 0; col < KNOB_MACROTILE_X_DIM; col += KNOB_TILE_X_DIM) - { - for (uint32_t sampleNum = 0; sampleNum < pSrcSurface->numSamples; sampleNum++) - { - LoadRasterTile::Load(pSrcSurface, pDstHotTile, - (x + col), (y + row), sampleNum, renderTargetArrayIndex); - pDstHotTile += KNOB_TILE_X_DIM * KNOB_TILE_Y_DIM * (FormatTraits::bpp / 8); - } - } - } - } -}; +#include "LoadTile.h" static void BUCKETS_START(UINT id) @@ -276,123 +158,9 @@ } -////////////////////////////////////////////////////////////////////////// -/// INIT_LOAD_TILES_TABLE - Helper macro for setting up the tables. -#define INIT_LOAD_TILES_COLOR_TABLE(tilemode) \ - memset(sLoadTilesColorTable_##tilemode, 0, sizeof(sLoadTilesColorTable_##tilemode)); \ - \ - sLoadTilesColorTable_##tilemode[R32G32B32A32_FLOAT] = LoadMacroTile, R32G32B32A32_FLOAT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R32G32B32A32_SINT] = LoadMacroTile, R32G32B32A32_SINT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R32G32B32A32_UINT] = LoadMacroTile, R32G32B32A32_UINT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R32G32B32X32_FLOAT] = LoadMacroTile, R32G32B32X32_FLOAT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R32G32B32_FLOAT] = LoadMacroTile, R32G32B32_FLOAT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R32G32B32_SINT] = LoadMacroTile, R32G32B32_SINT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R32G32B32_UINT] = LoadMacroTile, R32G32B32_UINT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R16G16B16A16_UNORM] = LoadMacroTile, R16G16B16A16_UNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R16G16B16A16_SNORM] = LoadMacroTile, R16G16B16A16_SNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R16G16B16A16_SINT] = LoadMacroTile, R16G16B16A16_SINT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R16G16B16A16_UINT] = LoadMacroTile, R16G16B16A16_UINT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R16G16B16A16_FLOAT] = LoadMacroTile, R16G16B16A16_FLOAT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R32G32_FLOAT] = LoadMacroTile, R32G32_FLOAT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R32G32_SINT] = LoadMacroTile, R32G32_SINT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R32G32_UINT] = LoadMacroTile, R32G32_UINT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R16G16B16X16_UNORM] = LoadMacroTile, R16G16B16X16_UNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R16G16B16X16_FLOAT] = LoadMacroTile, R16G16B16X16_FLOAT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[B8G8R8A8_UNORM] = LoadMacroTile, B8G8R8A8_UNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[B8G8R8A8_UNORM_SRGB] = LoadMacroTile, B8G8R8A8_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R10G10B10A2_UNORM] = LoadMacroTile, R10G10B10A2_UNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R10G10B10A2_UNORM_SRGB] = LoadMacroTile, R10G10B10A2_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R10G10B10A2_UINT] = LoadMacroTile, R10G10B10A2_UINT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R8G8B8A8_UNORM] = LoadMacroTile, R8G8B8A8_UNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R8G8B8A8_UNORM_SRGB] = LoadMacroTile, R8G8B8A8_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R8G8B8A8_SNORM] = LoadMacroTile, R8G8B8A8_SNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R8G8B8A8_SINT] = LoadMacroTile, R8G8B8A8_SINT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R8G8B8A8_UINT] = LoadMacroTile, R8G8B8A8_UINT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R16G16_UNORM] = LoadMacroTile, R16G16_UNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R16G16_SNORM] = LoadMacroTile, R16G16_SNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R16G16_SINT] = LoadMacroTile, R16G16_SINT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R16G16_UINT] = LoadMacroTile, R16G16_UINT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R16G16_FLOAT] = LoadMacroTile, R16G16_FLOAT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[B10G10R10A2_UNORM] = LoadMacroTile, B10G10R10A2_UNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[B10G10R10A2_UNORM_SRGB] = LoadMacroTile, B10G10R10A2_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R11G11B10_FLOAT] = LoadMacroTile, R11G11B10_FLOAT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R32_SINT] = LoadMacroTile, R32_SINT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R32_UINT] = LoadMacroTile, R32_UINT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R32_FLOAT] = LoadMacroTile, R32_FLOAT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[A32_FLOAT] = LoadMacroTile, A32_FLOAT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[B8G8R8X8_UNORM] = LoadMacroTile, B8G8R8X8_UNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[B8G8R8X8_UNORM_SRGB] = LoadMacroTile, B8G8R8X8_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R8G8B8X8_UNORM] = LoadMacroTile, R8G8B8X8_UNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R8G8B8X8_UNORM_SRGB] = LoadMacroTile, R8G8B8X8_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[B10G10R10X2_UNORM] = LoadMacroTile, B10G10R10X2_UNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[B5G6R5_UNORM] = LoadMacroTile, B5G6R5_UNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[B5G6R5_UNORM_SRGB] = LoadMacroTile, B5G6R5_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[B5G5R5A1_UNORM] = LoadMacroTile, B5G5R5A1_UNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[B5G5R5A1_UNORM_SRGB] = LoadMacroTile, B5G5R5A1_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[B4G4R4A4_UNORM] = LoadMacroTile, B4G4R4A4_UNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[B4G4R4A4_UNORM_SRGB] = LoadMacroTile, B4G4R4A4_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R8G8_UNORM] = LoadMacroTile, R8G8_UNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R8G8_SNORM] = LoadMacroTile, R8G8_SNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R8G8_SINT] = LoadMacroTile, R8G8_SINT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R8G8_UINT] = LoadMacroTile, R8G8_UINT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R16_UNORM] = LoadMacroTile, R16_UNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R16_SNORM] = LoadMacroTile, R16_SNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R16_SINT] = LoadMacroTile, R16_SINT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R16_UINT] = LoadMacroTile, R16_UINT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R16_FLOAT] = LoadMacroTile, R16_FLOAT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[A16_UNORM] = LoadMacroTile, A16_UNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[A16_FLOAT] = LoadMacroTile, A16_FLOAT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[B5G5R5X1_UNORM] = LoadMacroTile, B5G5R5X1_UNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[B5G5R5X1_UNORM_SRGB] = LoadMacroTile, B5G5R5X1_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R8_UNORM] = LoadMacroTile, R8_UNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R8_SNORM] = LoadMacroTile, R8_SNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R8_SINT] = LoadMacroTile, R8_SINT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R8_UINT] = LoadMacroTile, R8_UINT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[A8_UNORM] = LoadMacroTile, A8_UNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[BC1_UNORM] = LoadMacroTile, BC1_UNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[BC2_UNORM] = LoadMacroTile, BC2_UNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[BC3_UNORM] = LoadMacroTile, BC3_UNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[BC4_UNORM] = LoadMacroTile, BC4_UNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[BC5_UNORM] = LoadMacroTile, BC5_UNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[BC1_UNORM_SRGB] = LoadMacroTile, BC1_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[BC2_UNORM_SRGB] = LoadMacroTile, BC2_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[BC3_UNORM_SRGB] = LoadMacroTile, BC3_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R8G8B8_UNORM] = LoadMacroTile, R8G8B8_UNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R8G8B8_SNORM] = LoadMacroTile, R8G8B8_SNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[BC4_SNORM] = LoadMacroTile, BC4_SNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[BC5_SNORM] = LoadMacroTile, BC5_SNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R16G16B16_FLOAT] = LoadMacroTile, R16G16B16_FLOAT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R16G16B16_UNORM] = LoadMacroTile, R16G16B16_UNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R16G16B16_SNORM] = LoadMacroTile, R16G16B16_SNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R8G8B8_UNORM_SRGB] = LoadMacroTile, R8G8B8_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R16G16B16_UINT] = LoadMacroTile, R16G16B16_UINT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R16G16B16_SINT] = LoadMacroTile, R16G16B16_SINT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R10G10B10A2_SNORM] = LoadMacroTile, R10G10B10A2_SNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R10G10B10A2_SINT] = LoadMacroTile, R10G10B10A2_SINT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[B10G10R10A2_SNORM] = LoadMacroTile, B10G10R10A2_SNORM, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[B10G10R10A2_UINT] = LoadMacroTile, B10G10R10A2_UINT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[B10G10R10A2_SINT] = LoadMacroTile, B10G10R10A2_SINT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R8G8B8_UINT] = LoadMacroTile, R8G8B8_UINT, R32G32B32A32_FLOAT>::Load; \ - sLoadTilesColorTable_##tilemode[R8G8B8_SINT] = LoadMacroTile, R8G8B8_SINT, R32G32B32A32_FLOAT>::Load; \ - -////////////////////////////////////////////////////////////////////////// -/// INIT_LOAD_TILES_TABLE - Helper macro for setting up the tables. -#define INIT_LOAD_TILES_DEPTH_TABLE(tilemode) \ - memset(sLoadTilesDepthTable_##tilemode, 0, sizeof(sLoadTilesDepthTable_##tilemode)); \ - \ - sLoadTilesDepthTable_##tilemode[R16_UNORM] = LoadMacroTile, R16_UNORM, R32_FLOAT>::Load; \ - sLoadTilesDepthTable_##tilemode[R32_FLOAT] = LoadMacroTile, R32_FLOAT, R32_FLOAT>::Load; \ - sLoadTilesDepthTable_##tilemode[R24_UNORM_X8_TYPELESS] = LoadMacroTile, R24_UNORM_X8_TYPELESS, R32_FLOAT>::Load; \ - -////////////////////////////////////////////////////////////////////////// -/// @brief Sets up tables for LoadTile void InitSimLoadTilesTable() { - INIT_LOAD_TILES_COLOR_TABLE(SWR_TILE_NONE); - INIT_LOAD_TILES_DEPTH_TABLE(SWR_TILE_NONE); - - INIT_LOAD_TILES_COLOR_TABLE(SWR_TILE_MODE_YMAJOR); - INIT_LOAD_TILES_COLOR_TABLE(SWR_TILE_MODE_XMAJOR); - - INIT_LOAD_TILES_DEPTH_TABLE(SWR_TILE_MODE_YMAJOR); + InitLoadTilesTable_Linear(); + InitLoadTilesTable_XMajor(); + InitLoadTilesTable_YMajor(); } diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/LoadTile.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/LoadTile.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/LoadTile.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/LoadTile.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,354 @@ +/**************************************************************************** +* Copyright (C) 2014-2016 Intel Corporation. All Rights Reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice (including the next +* paragraph) shall be included in all copies or substantial portions of the +* Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +* IN THE SOFTWARE. +* +* @file LoadTile.h +* +* @brief Functionality for Load +* +******************************************************************************/ +#include "common/os.h" +#include "common/formats.h" +#include "core/context.h" +#include "core/rdtsc_core.h" +#include "memory/TilingFunctions.h" +#include "memory/tilingtraits.h" +#include "memory/Convert.h" + +typedef void(*PFN_LOAD_TILES)(const SWR_SURFACE_STATE*, uint8_t*, uint32_t, uint32_t, uint32_t); +typedef void(*PFN_LOAD_RASTER_TILES)(const SWR_SURFACE_STATE*, uint8_t*, uint32_t, uint32_t, uint32_t, uint32_t); + +////////////////////////////////////////////////////////////////////////// +/// Load Raster Tile Function Tables. +////////////////////////////////////////////////////////////////////////// +extern PFN_LOAD_TILES sLoadTilesColorTable_SWR_TILE_NONE[NUM_SWR_FORMATS]; +extern PFN_LOAD_TILES sLoadTilesDepthTable_SWR_TILE_NONE[NUM_SWR_FORMATS]; + +extern PFN_LOAD_TILES sLoadTilesColorTable_SWR_TILE_MODE_YMAJOR[NUM_SWR_FORMATS]; +extern PFN_LOAD_TILES sLoadTilesColorTable_SWR_TILE_MODE_XMAJOR[NUM_SWR_FORMATS]; + +extern PFN_LOAD_TILES sLoadTilesDepthTable_SWR_TILE_MODE_YMAJOR[NUM_SWR_FORMATS]; + +void InitLoadTilesTable_Linear(); +void InitLoadTilesTable_XMajor(); +void InitLoadTilesTable_YMajor(); + +////////////////////////////////////////////////////////////////////////// +/// LoadRasterTile +////////////////////////////////////////////////////////////////////////// +template +struct LoadRasterTile +{ + ////////////////////////////////////////////////////////////////////////// + /// @brief Retrieve color from hot tile source which is always float. + /// @param pSrc - Pointer to raster tile. + /// @param x, y - Coordinates to raster tile. + /// @param output - output color + INLINE static void SetSwizzledDstColor( + const float srcColor[4], + uint32_t x, uint32_t y, + uint8_t* pDst) + { +#if USE_8x2_TILE_BACKEND + typedef SimdTile_16 SimdT; + + SimdT* pDstSimdTiles = (SimdT*)pDst; + + // Compute which simd tile we're accessing within 8x8 tile. + // i.e. Compute linear simd tile coordinate given (x, y) in pixel coordinates. + uint32_t simdIndex = (y / SIMD16_TILE_Y_DIM) * (KNOB_TILE_X_DIM / SIMD16_TILE_X_DIM) + (x / SIMD16_TILE_X_DIM); + + SimdT* pSimdTile = &pDstSimdTiles[simdIndex]; + + uint32_t simdOffset = (y % SIMD16_TILE_Y_DIM) * SIMD16_TILE_X_DIM + (x % SIMD16_TILE_X_DIM); + + pSimdTile->SetSwizzledColor(simdOffset, srcColor); +#else + typedef SimdTile SimdT; + + SimdT* pDstSimdTiles = (SimdT*)pDst; + + // Compute which simd tile we're accessing within 8x8 tile. + // i.e. Compute linear simd tile coordinate given (x, y) in pixel coordinates. + uint32_t simdIndex = (y / SIMD_TILE_Y_DIM) * (KNOB_TILE_X_DIM / SIMD_TILE_X_DIM) + (x / SIMD_TILE_X_DIM); + + SimdT* pSimdTile = &pDstSimdTiles[simdIndex]; + + uint32_t simdOffset = (y % SIMD_TILE_Y_DIM) * SIMD_TILE_X_DIM + (x % SIMD_TILE_X_DIM); + + pSimdTile->SetSwizzledColor(simdOffset, srcColor); +#endif + } + + ////////////////////////////////////////////////////////////////////////// + /// @brief Loads an 8x8 raster tile from the src surface. + /// @param pSrcSurface - Src surface state + /// @param pDst - Destination hot tile pointer + /// @param x, y - Coordinates to raster tile. + INLINE static void Load( + const SWR_SURFACE_STATE* pSrcSurface, + uint8_t* pDst, + uint32_t x, uint32_t y, uint32_t sampleNum, uint32_t renderTargetArrayIndex) // (x, y) pixel coordinate to start of raster tile. + { + uint32_t lodWidth = (pSrcSurface->width == 1) ? 1 : pSrcSurface->width >> pSrcSurface->lod; + uint32_t lodHeight = (pSrcSurface->height == 1) ? 1 : pSrcSurface->height >> pSrcSurface->lod; + + // For each raster tile pixel (rx, ry) + for (uint32_t ry = 0; ry < KNOB_TILE_Y_DIM; ++ry) + { + for (uint32_t rx = 0; rx < KNOB_TILE_X_DIM; ++rx) + { + if (((x + rx) < lodWidth) && + ((y + ry) < lodHeight)) + { + uint8_t* pSrc = (uint8_t*)ComputeSurfaceAddress(x + rx, y + ry, pSrcSurface->arrayIndex + renderTargetArrayIndex, + pSrcSurface->arrayIndex + renderTargetArrayIndex, sampleNum, + pSrcSurface->lod, pSrcSurface); + + float srcColor[4]; + ConvertPixelToFloat(srcColor, pSrc); + + // store pixel to hottile + SetSwizzledDstColor(srcColor, rx, ry, pDst); + } + } + } + } +}; + +////////////////////////////////////////////////////////////////////////// +/// LoadMacroTile - Loads a macro tile which consists of raster tiles. +////////////////////////////////////////////////////////////////////////// +template +struct LoadMacroTile +{ + ////////////////////////////////////////////////////////////////////////// + /// @brief Load a macrotile to the destination surface. + /// @param pSrc - Pointer to macro tile. + /// @param pDstSurface - Destination surface state + /// @param x, y - Coordinates to macro tile + static void Load( + const SWR_SURFACE_STATE* pSrcSurface, + uint8_t *pDstHotTile, + uint32_t x, uint32_t y, uint32_t renderTargetArrayIndex) + { + PFN_LOAD_RASTER_TILES loadRasterTileFn; + loadRasterTileFn = LoadRasterTile::Load; + + // Load each raster tile from the hot tile to the destination surface. + for (uint32_t row = 0; row < KNOB_MACROTILE_Y_DIM; row += KNOB_TILE_Y_DIM) + { + for (uint32_t col = 0; col < KNOB_MACROTILE_X_DIM; col += KNOB_TILE_X_DIM) + { + for (uint32_t sampleNum = 0; sampleNum < pSrcSurface->numSamples; sampleNum++) + { + loadRasterTileFn(pSrcSurface, pDstHotTile, (x + col), (y + row), sampleNum, renderTargetArrayIndex); + pDstHotTile += KNOB_TILE_X_DIM * KNOB_TILE_Y_DIM * (FormatTraits::bpp / 8); + } + } + } + } +}; + +////////////////////////////////////////////////////////////////////////// +/// InitLoadTileColorTable - Helper function for setting up the tables. +template +static INLINE void InitLoadTileColorTable(PFN_LOAD_TILES (&table)[NUM_SWR_FORMATS]) +{ + memset(table, 0, sizeof(table)); + + table[R32G32B32A32_FLOAT] = LoadMacroTile, R32G32B32A32_FLOAT, R32G32B32A32_FLOAT>::Load; + table[R32G32B32A32_SINT] = LoadMacroTile, R32G32B32A32_SINT, R32G32B32A32_FLOAT>::Load; + table[R32G32B32A32_UINT] = LoadMacroTile, R32G32B32A32_UINT, R32G32B32A32_FLOAT>::Load; + table[R32G32B32X32_FLOAT] = LoadMacroTile, R32G32B32X32_FLOAT, R32G32B32A32_FLOAT>::Load; + table[R32G32B32A32_SSCALED] = LoadMacroTile, R32G32B32A32_SSCALED, R32G32B32A32_FLOAT>::Load; + table[R32G32B32A32_USCALED] = LoadMacroTile, R32G32B32A32_USCALED, R32G32B32A32_FLOAT>::Load; + table[R32G32B32_FLOAT] = LoadMacroTile, R32G32B32_FLOAT, R32G32B32A32_FLOAT>::Load; + table[R32G32B32_SINT] = LoadMacroTile, R32G32B32_SINT, R32G32B32A32_FLOAT>::Load; + table[R32G32B32_UINT] = LoadMacroTile, R32G32B32_UINT, R32G32B32A32_FLOAT>::Load; + table[R32G32B32_SSCALED] = LoadMacroTile, R32G32B32_SSCALED, R32G32B32A32_FLOAT>::Load; + table[R32G32B32_USCALED] = LoadMacroTile, R32G32B32_USCALED, R32G32B32A32_FLOAT>::Load; + table[R16G16B16A16_UNORM] = LoadMacroTile, R16G16B16A16_UNORM, R32G32B32A32_FLOAT>::Load; + table[R16G16B16A16_SNORM] = LoadMacroTile, R16G16B16A16_SNORM, R32G32B32A32_FLOAT>::Load; + table[R16G16B16A16_SINT] = LoadMacroTile, R16G16B16A16_SINT, R32G32B32A32_FLOAT>::Load; + table[R16G16B16A16_UINT] = LoadMacroTile, R16G16B16A16_UINT, R32G32B32A32_FLOAT>::Load; + table[R16G16B16A16_FLOAT] = LoadMacroTile, R16G16B16A16_FLOAT, R32G32B32A32_FLOAT>::Load; + table[R32G32_FLOAT] = LoadMacroTile, R32G32_FLOAT, R32G32B32A32_FLOAT>::Load; + table[R32G32_SINT] = LoadMacroTile, R32G32_SINT, R32G32B32A32_FLOAT>::Load; + table[R32G32_UINT] = LoadMacroTile, R32G32_UINT, R32G32B32A32_FLOAT>::Load; + table[R32_FLOAT_X8X24_TYPELESS] = LoadMacroTile, R32_FLOAT_X8X24_TYPELESS, R32G32B32A32_FLOAT>::Load; + table[X32_TYPELESS_G8X24_UINT] = LoadMacroTile, X32_TYPELESS_G8X24_UINT, R32G32B32A32_FLOAT>::Load; + table[L32A32_FLOAT] = LoadMacroTile, L32A32_FLOAT, R32G32B32A32_FLOAT>::Load; + table[R16G16B16X16_UNORM] = LoadMacroTile, R16G16B16X16_UNORM, R32G32B32A32_FLOAT>::Load; + table[R16G16B16X16_FLOAT] = LoadMacroTile, R16G16B16X16_FLOAT, R32G32B32A32_FLOAT>::Load; + table[L32X32_FLOAT] = LoadMacroTile, L32X32_FLOAT, R32G32B32A32_FLOAT>::Load; + table[I32X32_FLOAT] = LoadMacroTile, I32X32_FLOAT, R32G32B32A32_FLOAT>::Load; + table[R16G16B16A16_SSCALED] = LoadMacroTile, R16G16B16A16_SSCALED, R32G32B32A32_FLOAT>::Load; + table[R16G16B16A16_USCALED] = LoadMacroTile, R16G16B16A16_USCALED, R32G32B32A32_FLOAT>::Load; + table[R32G32_SSCALED] = LoadMacroTile, R32G32_SSCALED, R32G32B32A32_FLOAT>::Load; + table[R32G32_USCALED] = LoadMacroTile, R32G32_USCALED, R32G32B32A32_FLOAT>::Load; + table[B8G8R8A8_UNORM] = LoadMacroTile, B8G8R8A8_UNORM, R32G32B32A32_FLOAT>::Load; + table[B8G8R8A8_UNORM_SRGB] = LoadMacroTile, B8G8R8A8_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; + table[R10G10B10A2_UNORM] = LoadMacroTile, R10G10B10A2_UNORM, R32G32B32A32_FLOAT>::Load; + table[R10G10B10A2_UNORM_SRGB] = LoadMacroTile, R10G10B10A2_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; + table[R10G10B10A2_UINT] = LoadMacroTile, R10G10B10A2_UINT, R32G32B32A32_FLOAT>::Load; + table[R8G8B8A8_UNORM] = LoadMacroTile, R8G8B8A8_UNORM, R32G32B32A32_FLOAT>::Load; + table[R8G8B8A8_UNORM_SRGB] = LoadMacroTile, R8G8B8A8_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; + table[R8G8B8A8_SNORM] = LoadMacroTile, R8G8B8A8_SNORM, R32G32B32A32_FLOAT>::Load; + table[R8G8B8A8_SINT] = LoadMacroTile, R8G8B8A8_SINT, R32G32B32A32_FLOAT>::Load; + table[R8G8B8A8_UINT] = LoadMacroTile, R8G8B8A8_UINT, R32G32B32A32_FLOAT>::Load; + table[R16G16_UNORM] = LoadMacroTile, R16G16_UNORM, R32G32B32A32_FLOAT>::Load; + table[R16G16_SNORM] = LoadMacroTile, R16G16_SNORM, R32G32B32A32_FLOAT>::Load; + table[R16G16_SINT] = LoadMacroTile, R16G16_SINT, R32G32B32A32_FLOAT>::Load; + table[R16G16_UINT] = LoadMacroTile, R16G16_UINT, R32G32B32A32_FLOAT>::Load; + table[R16G16_FLOAT] = LoadMacroTile, R16G16_FLOAT, R32G32B32A32_FLOAT>::Load; + table[B10G10R10A2_UNORM] = LoadMacroTile, B10G10R10A2_UNORM, R32G32B32A32_FLOAT>::Load; + table[B10G10R10A2_UNORM_SRGB] = LoadMacroTile, B10G10R10A2_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; + table[R11G11B10_FLOAT] = LoadMacroTile, R11G11B10_FLOAT, R32G32B32A32_FLOAT>::Load; + table[R10G10B10_FLOAT_A2_UNORM] = LoadMacroTile, R10G10B10_FLOAT_A2_UNORM, R32G32B32A32_FLOAT>::Load; + table[R32_SINT] = LoadMacroTile, R32_SINT, R32G32B32A32_FLOAT>::Load; + table[R32_UINT] = LoadMacroTile, R32_UINT, R32G32B32A32_FLOAT>::Load; + table[R32_FLOAT] = LoadMacroTile, R32_FLOAT, R32G32B32A32_FLOAT>::Load; + table[R24_UNORM_X8_TYPELESS] = LoadMacroTile, R24_UNORM_X8_TYPELESS, R32G32B32A32_FLOAT>::Load; + table[X24_TYPELESS_G8_UINT] = LoadMacroTile, X24_TYPELESS_G8_UINT, R32G32B32A32_FLOAT>::Load; + table[L32_UNORM] = LoadMacroTile, L32_UNORM, R32G32B32A32_FLOAT>::Load; + table[L16A16_UNORM] = LoadMacroTile, L16A16_UNORM, R32G32B32A32_FLOAT>::Load; + table[I24X8_UNORM] = LoadMacroTile, I24X8_UNORM, R32G32B32A32_FLOAT>::Load; + table[L24X8_UNORM] = LoadMacroTile, L24X8_UNORM, R32G32B32A32_FLOAT>::Load; + table[I32_FLOAT] = LoadMacroTile, I32_FLOAT, R32G32B32A32_FLOAT>::Load; + table[L32_FLOAT] = LoadMacroTile, L32_FLOAT, R32G32B32A32_FLOAT>::Load; + table[A32_FLOAT] = LoadMacroTile, A32_FLOAT, R32G32B32A32_FLOAT>::Load; + table[B8G8R8X8_UNORM] = LoadMacroTile, B8G8R8X8_UNORM, R32G32B32A32_FLOAT>::Load; + table[B8G8R8X8_UNORM_SRGB] = LoadMacroTile, B8G8R8X8_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; + table[R8G8B8X8_UNORM] = LoadMacroTile, R8G8B8X8_UNORM, R32G32B32A32_FLOAT>::Load; + table[R8G8B8X8_UNORM_SRGB] = LoadMacroTile, R8G8B8X8_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; + table[R9G9B9E5_SHAREDEXP] = LoadMacroTile, R9G9B9E5_SHAREDEXP, R32G32B32A32_FLOAT>::Load; + table[B10G10R10X2_UNORM] = LoadMacroTile, B10G10R10X2_UNORM, R32G32B32A32_FLOAT>::Load; + table[L16A16_FLOAT] = LoadMacroTile, L16A16_FLOAT, R32G32B32A32_FLOAT>::Load; + table[R10G10B10X2_USCALED] = LoadMacroTile, R10G10B10X2_USCALED, R32G32B32A32_FLOAT>::Load; + table[R8G8B8A8_SSCALED] = LoadMacroTile, R8G8B8A8_SSCALED, R32G32B32A32_FLOAT>::Load; + table[R8G8B8A8_USCALED] = LoadMacroTile, R8G8B8A8_USCALED, R32G32B32A32_FLOAT>::Load; + table[R16G16_SSCALED] = LoadMacroTile, R16G16_SSCALED, R32G32B32A32_FLOAT>::Load; + table[R16G16_USCALED] = LoadMacroTile, R16G16_USCALED, R32G32B32A32_FLOAT>::Load; + table[R32_SSCALED] = LoadMacroTile, R32_SSCALED, R32G32B32A32_FLOAT>::Load; + table[R32_USCALED] = LoadMacroTile, R32_USCALED, R32G32B32A32_FLOAT>::Load; + table[B5G6R5_UNORM] = LoadMacroTile, B5G6R5_UNORM, R32G32B32A32_FLOAT>::Load; + table[B5G6R5_UNORM_SRGB] = LoadMacroTile, B5G6R5_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; + table[B5G5R5A1_UNORM] = LoadMacroTile, B5G5R5A1_UNORM, R32G32B32A32_FLOAT>::Load; + table[B5G5R5A1_UNORM_SRGB] = LoadMacroTile, B5G5R5A1_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; + table[B4G4R4A4_UNORM] = LoadMacroTile, B4G4R4A4_UNORM, R32G32B32A32_FLOAT>::Load; + table[B4G4R4A4_UNORM_SRGB] = LoadMacroTile, B4G4R4A4_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; + table[R8G8_UNORM] = LoadMacroTile, R8G8_UNORM, R32G32B32A32_FLOAT>::Load; + table[R8G8_SNORM] = LoadMacroTile, R8G8_SNORM, R32G32B32A32_FLOAT>::Load; + table[R8G8_SINT] = LoadMacroTile, R8G8_SINT, R32G32B32A32_FLOAT>::Load; + table[R8G8_UINT] = LoadMacroTile, R8G8_UINT, R32G32B32A32_FLOAT>::Load; + table[R16_UNORM] = LoadMacroTile, R16_UNORM, R32G32B32A32_FLOAT>::Load; + table[R16_SNORM] = LoadMacroTile, R16_SNORM, R32G32B32A32_FLOAT>::Load; + table[R16_SINT] = LoadMacroTile, R16_SINT, R32G32B32A32_FLOAT>::Load; + table[R16_UINT] = LoadMacroTile, R16_UINT, R32G32B32A32_FLOAT>::Load; + table[R16_FLOAT] = LoadMacroTile, R16_FLOAT, R32G32B32A32_FLOAT>::Load; + table[I16_UNORM] = LoadMacroTile, I16_UNORM, R32G32B32A32_FLOAT>::Load; + table[L16_UNORM] = LoadMacroTile, L16_UNORM, R32G32B32A32_FLOAT>::Load; + table[A16_UNORM] = LoadMacroTile, A16_UNORM, R32G32B32A32_FLOAT>::Load; + table[L8A8_UNORM] = LoadMacroTile, L8A8_UNORM, R32G32B32A32_FLOAT>::Load; + table[I16_FLOAT] = LoadMacroTile, I16_FLOAT, R32G32B32A32_FLOAT>::Load; + table[L16_FLOAT] = LoadMacroTile, L16_FLOAT, R32G32B32A32_FLOAT>::Load; + table[A16_FLOAT] = LoadMacroTile, A16_FLOAT, R32G32B32A32_FLOAT>::Load; + table[L8A8_UNORM_SRGB] = LoadMacroTile, L8A8_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; + table[B5G5R5X1_UNORM] = LoadMacroTile, B5G5R5X1_UNORM, R32G32B32A32_FLOAT>::Load; + table[B5G5R5X1_UNORM_SRGB] = LoadMacroTile, B5G5R5X1_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; + table[R8G8_SSCALED] = LoadMacroTile, R8G8_SSCALED, R32G32B32A32_FLOAT>::Load; + table[R8G8_USCALED] = LoadMacroTile, R8G8_USCALED, R32G32B32A32_FLOAT>::Load; + table[R16_SSCALED] = LoadMacroTile, R16_SSCALED, R32G32B32A32_FLOAT>::Load; + table[R16_USCALED] = LoadMacroTile, R16_USCALED, R32G32B32A32_FLOAT>::Load; + table[A1B5G5R5_UNORM] = LoadMacroTile, A1B5G5R5_UNORM, R32G32B32A32_FLOAT>::Load; + table[A4B4G4R4_UNORM] = LoadMacroTile, A4B4G4R4_UNORM, R32G32B32A32_FLOAT>::Load; + table[L8A8_UINT] = LoadMacroTile, L8A8_UINT, R32G32B32A32_FLOAT>::Load; + table[L8A8_SINT] = LoadMacroTile, L8A8_SINT, R32G32B32A32_FLOAT>::Load; + table[R8_UNORM] = LoadMacroTile, R8_UNORM, R32G32B32A32_FLOAT>::Load; + table[R8_SNORM] = LoadMacroTile, R8_SNORM, R32G32B32A32_FLOAT>::Load; + table[R8_SINT] = LoadMacroTile, R8_SINT, R32G32B32A32_FLOAT>::Load; + table[R8_UINT] = LoadMacroTile, R8_UINT, R32G32B32A32_FLOAT>::Load; + table[A8_UNORM] = LoadMacroTile, A8_UNORM, R32G32B32A32_FLOAT>::Load; + table[I8_UNORM] = LoadMacroTile, I8_UNORM, R32G32B32A32_FLOAT>::Load; + table[L8_UNORM] = LoadMacroTile, L8_UNORM, R32G32B32A32_FLOAT>::Load; + table[R8_SSCALED] = LoadMacroTile, R8_SSCALED, R32G32B32A32_FLOAT>::Load; + table[R8_USCALED] = LoadMacroTile, R8_USCALED, R32G32B32A32_FLOAT>::Load; + table[L8_UNORM_SRGB] = LoadMacroTile, L8_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; + table[L8_UINT] = LoadMacroTile, L8_UINT, R32G32B32A32_FLOAT>::Load; + table[L8_SINT] = LoadMacroTile, L8_SINT, R32G32B32A32_FLOAT>::Load; + table[I8_UINT] = LoadMacroTile, I8_UINT, R32G32B32A32_FLOAT>::Load; + table[I8_SINT] = LoadMacroTile, I8_SINT, R32G32B32A32_FLOAT>::Load; + table[YCRCB_SWAPUVY] = LoadMacroTile, YCRCB_SWAPUVY, R32G32B32A32_FLOAT>::Load; + table[BC1_UNORM] = LoadMacroTile, BC1_UNORM, R32G32B32A32_FLOAT>::Load; + table[BC2_UNORM] = LoadMacroTile, BC2_UNORM, R32G32B32A32_FLOAT>::Load; + table[BC3_UNORM] = LoadMacroTile, BC3_UNORM, R32G32B32A32_FLOAT>::Load; + table[BC4_UNORM] = LoadMacroTile, BC4_UNORM, R32G32B32A32_FLOAT>::Load; + table[BC5_UNORM] = LoadMacroTile, BC5_UNORM, R32G32B32A32_FLOAT>::Load; + table[BC1_UNORM_SRGB] = LoadMacroTile, BC1_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; + table[BC2_UNORM_SRGB] = LoadMacroTile, BC2_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; + table[BC3_UNORM_SRGB] = LoadMacroTile, BC3_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; + table[YCRCB_SWAPUV] = LoadMacroTile, YCRCB_SWAPUV, R32G32B32A32_FLOAT>::Load; + table[R8G8B8_UNORM] = LoadMacroTile, R8G8B8_UNORM, R32G32B32A32_FLOAT>::Load; + table[R8G8B8_SNORM] = LoadMacroTile, R8G8B8_SNORM, R32G32B32A32_FLOAT>::Load; + table[R8G8B8_SSCALED] = LoadMacroTile, R8G8B8_SSCALED, R32G32B32A32_FLOAT>::Load; + table[R8G8B8_USCALED] = LoadMacroTile, R8G8B8_USCALED, R32G32B32A32_FLOAT>::Load; + table[BC4_SNORM] = LoadMacroTile, BC4_SNORM, R32G32B32A32_FLOAT>::Load; + table[BC5_SNORM] = LoadMacroTile, BC5_SNORM, R32G32B32A32_FLOAT>::Load; + table[R16G16B16_FLOAT] = LoadMacroTile, R16G16B16_FLOAT, R32G32B32A32_FLOAT>::Load; + table[R16G16B16_UNORM] = LoadMacroTile, R16G16B16_UNORM, R32G32B32A32_FLOAT>::Load; + table[R16G16B16_SNORM] = LoadMacroTile, R16G16B16_SNORM, R32G32B32A32_FLOAT>::Load; + table[R16G16B16_SSCALED] = LoadMacroTile, R16G16B16_SSCALED, R32G32B32A32_FLOAT>::Load; + table[R16G16B16_USCALED] = LoadMacroTile, R16G16B16_USCALED, R32G32B32A32_FLOAT>::Load; + table[BC6H_SF16] = LoadMacroTile, BC6H_SF16, R32G32B32A32_FLOAT>::Load; + table[BC7_UNORM] = LoadMacroTile, BC7_UNORM, R32G32B32A32_FLOAT>::Load; + table[BC7_UNORM_SRGB] = LoadMacroTile, BC7_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; + table[BC6H_UF16] = LoadMacroTile, BC6H_UF16, R32G32B32A32_FLOAT>::Load; + table[R8G8B8_UNORM_SRGB] = LoadMacroTile, R8G8B8_UNORM_SRGB, R32G32B32A32_FLOAT>::Load; + table[R16G16B16_UINT] = LoadMacroTile, R16G16B16_UINT, R32G32B32A32_FLOAT>::Load; + table[R16G16B16_SINT] = LoadMacroTile, R16G16B16_SINT, R32G32B32A32_FLOAT>::Load; + table[R10G10B10A2_SNORM] = LoadMacroTile, R10G10B10A2_SNORM, R32G32B32A32_FLOAT>::Load; + table[R10G10B10A2_USCALED] = LoadMacroTile, R10G10B10A2_USCALED, R32G32B32A32_FLOAT>::Load; + table[R10G10B10A2_SSCALED] = LoadMacroTile, R10G10B10A2_SSCALED, R32G32B32A32_FLOAT>::Load; + table[R10G10B10A2_SINT] = LoadMacroTile, R10G10B10A2_SINT, R32G32B32A32_FLOAT>::Load; + table[B10G10R10A2_SNORM] = LoadMacroTile, B10G10R10A2_SNORM, R32G32B32A32_FLOAT>::Load; + table[B10G10R10A2_USCALED] = LoadMacroTile, B10G10R10A2_USCALED, R32G32B32A32_FLOAT>::Load; + table[B10G10R10A2_SSCALED] = LoadMacroTile, B10G10R10A2_SSCALED, R32G32B32A32_FLOAT>::Load; + table[B10G10R10A2_UINT] = LoadMacroTile, B10G10R10A2_UINT, R32G32B32A32_FLOAT>::Load; + table[B10G10R10A2_SINT] = LoadMacroTile, B10G10R10A2_SINT, R32G32B32A32_FLOAT>::Load; + table[R8G8B8_UINT] = LoadMacroTile, R8G8B8_UINT, R32G32B32A32_FLOAT>::Load; + table[R8G8B8_SINT] = LoadMacroTile, R8G8B8_SINT, R32G32B32A32_FLOAT>::Load; + table[RAW] = LoadMacroTile, RAW, R32G32B32A32_FLOAT>::Load; +} + +////////////////////////////////////////////////////////////////////////// +/// InitLoadTileColorTable - Helper function for setting up the tables. +template +static INLINE void InitLoadTileDepthTable(PFN_LOAD_TILES(&table)[NUM_SWR_FORMATS]) +{ + memset(table, 0, sizeof(table)); + + table[R32_FLOAT] = LoadMacroTile, R32_FLOAT, R32_FLOAT>::Load; + table[R32_FLOAT_X8X24_TYPELESS] = LoadMacroTile, R32_FLOAT_X8X24_TYPELESS, R32_FLOAT>::Load; + table[R24_UNORM_X8_TYPELESS] = LoadMacroTile, R24_UNORM_X8_TYPELESS, R32_FLOAT>::Load; + table[R16_UNORM] = LoadMacroTile, R16_UNORM, R32_FLOAT>::Load; +} + diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/LoadTile_Linear.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/LoadTile_Linear.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/LoadTile_Linear.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/LoadTile_Linear.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,39 @@ +/**************************************************************************** +* Copyright (C) 2016 Intel Corporation. All Rights Reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice (including the next +* paragraph) shall be included in all copies or substantial portions of the +* Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +* IN THE SOFTWARE. +* +* @file LoadTile.cpp +* +* @brief Functionality for Load +* +******************************************************************************/ +#include "LoadTile.h" + +PFN_LOAD_TILES sLoadTilesColorTable_SWR_TILE_NONE[NUM_SWR_FORMATS]; +PFN_LOAD_TILES sLoadTilesDepthTable_SWR_TILE_NONE[NUM_SWR_FORMATS]; + +////////////////////////////////////////////////////////////////////////// +/// @brief Sets up tables for LoadTile +void InitLoadTilesTable_Linear() +{ + InitLoadTileColorTable(sLoadTilesColorTable_SWR_TILE_NONE); + InitLoadTileDepthTable(sLoadTilesDepthTable_SWR_TILE_NONE); +} diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/LoadTile_TileX.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/LoadTile_TileX.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/LoadTile_TileX.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/LoadTile_TileX.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,37 @@ +/**************************************************************************** +* Copyright (C) 2016 Intel Corporation. All Rights Reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice (including the next +* paragraph) shall be included in all copies or substantial portions of the +* Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +* IN THE SOFTWARE. +* +* @file LoadTile.cpp +* +* @brief Functionality for Load +* +******************************************************************************/ +#include "LoadTile.h" + +PFN_LOAD_TILES sLoadTilesColorTable_SWR_TILE_MODE_XMAJOR[NUM_SWR_FORMATS]; + +////////////////////////////////////////////////////////////////////////// +/// @brief Sets up tables for LoadTile +void InitLoadTilesTable_XMajor() +{ + InitLoadTileColorTable(sLoadTilesColorTable_SWR_TILE_MODE_XMAJOR); +} diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/LoadTile_TileY.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/LoadTile_TileY.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/LoadTile_TileY.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/LoadTile_TileY.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,39 @@ +/**************************************************************************** +* Copyright (C) 2016 Intel Corporation. All Rights Reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice (including the next +* paragraph) shall be included in all copies or substantial portions of the +* Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +* IN THE SOFTWARE. +* +* @file LoadTile.cpp +* +* @brief Functionality for Load +* +******************************************************************************/ +#include "LoadTile.h" + +PFN_LOAD_TILES sLoadTilesColorTable_SWR_TILE_MODE_YMAJOR[NUM_SWR_FORMATS]; +PFN_LOAD_TILES sLoadTilesDepthTable_SWR_TILE_MODE_YMAJOR[NUM_SWR_FORMATS]; + +////////////////////////////////////////////////////////////////////////// +/// @brief Sets up tables for LoadTile +void InitLoadTilesTable_YMajor() +{ + InitLoadTileColorTable(sLoadTilesColorTable_SWR_TILE_MODE_YMAJOR); + InitLoadTileDepthTable(sLoadTilesDepthTable_SWR_TILE_MODE_YMAJOR); +} diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/StoreTile.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/StoreTile.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/StoreTile.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/StoreTile.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -1,5 +1,5 @@ /**************************************************************************** -* Copyright (C) 2014-2015 Intel Corporation. All Rights Reserved. +* Copyright (C) 2014-2016 Intel Corporation. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -25,1458 +25,13 @@ * @brief Functionality for Store. * ******************************************************************************/ -#include "common/os.h" -#include "common/formats.h" -#include "core/context.h" -#include "core/rdtsc_core.h" -#include "core/format_conversion.h" - -#include "memory/TilingFunctions.h" -#include "memory/tilingtraits.h" -#include "memory/Convert.h" -#include "core/multisample.h" - -#include -#include - -typedef void(*PFN_STORE_TILES)(uint8_t*, SWR_SURFACE_STATE*, uint32_t, uint32_t, uint32_t); - +#include "StoreTile.h" ////////////////////////////////////////////////////////////////////////// /// Store Raster Tile Function Tables. ////////////////////////////////////////////////////////////////////////// -static PFN_STORE_TILES sStoreTilesTableColor[SWR_TILE_MODE_COUNT][NUM_SWR_FORMATS] = {}; -static PFN_STORE_TILES sStoreTilesTableDepth[SWR_TILE_MODE_COUNT][NUM_SWR_FORMATS] = {}; -static PFN_STORE_TILES sStoreTilesTableStencil[SWR_TILE_MODE_COUNT][NUM_SWR_FORMATS] = {}; - -////////////////////////////////////////////////////////////////////////// -/// StorePixels -/// @brief Stores a 4x2 (AVX) raster-tile to two rows. -/// @param pSrc - Pointer to source raster tile in SWRZ pixel order -/// @param ppDsts - Array of destination pointers. Each pointer is -/// to a single row of at most 16B. -/// @tparam NumDests - Number of destination pointers. Each pair of -/// pointers is for a 16-byte column of two rows. -////////////////////////////////////////////////////////////////////////// -template -struct StorePixels -{ - static void Store(const uint8_t* pSrc, uint8_t* (&ppDsts)[NumDests]) = delete; -}; - -////////////////////////////////////////////////////////////////////////// -/// StorePixels (32-bit pixel specialization) -/// @brief Stores a 4x2 (AVX) raster-tile to two rows. -/// @param pSrc - Pointer to source raster tile in SWRZ pixel order -/// @param ppDsts - Array of destination pointers. Each pointer is -/// to a single row of at most 16B. -/// @tparam NumDests - Number of destination pointers. Each pair of -/// pointers is for a 16-byte column of two rows. -////////////////////////////////////////////////////////////////////////// -template <> -struct StorePixels<8, 2> -{ - static void Store(const uint8_t* pSrc, uint8_t* (&ppDsts)[2]) - { - // Each 4-pixel row is 4 bytes. - const uint16_t* pPixSrc = (const uint16_t*)pSrc; - - // Unswizzle from SWR-Z order - uint16_t* pRow = (uint16_t*)ppDsts[0]; - pRow[0] = pPixSrc[0]; - pRow[1] = pPixSrc[2]; - - pRow = (uint16_t*)ppDsts[1]; - pRow[0] = pPixSrc[1]; - pRow[1] = pPixSrc[3]; - } -}; - -////////////////////////////////////////////////////////////////////////// -/// StorePixels (32-bit pixel specialization) -/// @brief Stores a 4x2 (AVX) raster-tile to two rows. -/// @param pSrc - Pointer to source raster tile in SWRZ pixel order -/// @param ppDsts - Array of destination pointers. Each pointer is -/// to a single row of at most 16B. -/// @tparam NumDests - Number of destination pointers. Each pair of -/// pointers is for a 16-byte column of two rows. -////////////////////////////////////////////////////////////////////////// -template <> -struct StorePixels<16, 2> -{ - static void Store(const uint8_t* pSrc, uint8_t* (&ppDsts)[2]) - { - // Each 4-pixel row is 8 bytes. - const uint32_t* pPixSrc = (const uint32_t*)pSrc; - - // Unswizzle from SWR-Z order - uint32_t* pRow = (uint32_t*)ppDsts[0]; - pRow[0] = pPixSrc[0]; - pRow[1] = pPixSrc[2]; - - pRow = (uint32_t*)ppDsts[1]; - pRow[0] = pPixSrc[1]; - pRow[1] = pPixSrc[3]; - } -}; - -////////////////////////////////////////////////////////////////////////// -/// StorePixels (32-bit pixel specialization) -/// @brief Stores a 4x2 (AVX) raster-tile to two rows. -/// @param pSrc - Pointer to source raster tile in SWRZ pixel order -/// @param ppDsts - Array of destination pointers. Each pointer is -/// to a single row of at most 16B. -/// @tparam NumDests - Number of destination pointers. Each pair of -/// pointers is for a 16-byte column of two rows. -////////////////////////////////////////////////////////////////////////// -template <> -struct StorePixels<32, 2> -{ - static void Store(const uint8_t* pSrc, uint8_t* (&ppDsts)[2]) - { - // Each 4-pixel row is 16-bytes - __m128i *pZRow01 = (__m128i*)pSrc; - __m128i vQuad00 = _mm_load_si128(pZRow01); - __m128i vQuad01 = _mm_load_si128(pZRow01 + 1); - - __m128i vRow00 = _mm_unpacklo_epi64(vQuad00, vQuad01); - __m128i vRow10 = _mm_unpackhi_epi64(vQuad00, vQuad01); - - _mm_storeu_si128((__m128i*)ppDsts[0], vRow00); - _mm_storeu_si128((__m128i*)ppDsts[1], vRow10); - } -}; - -////////////////////////////////////////////////////////////////////////// -/// StorePixels (32-bit pixel specialization) -/// @brief Stores a 4x2 (AVX) raster-tile to two rows. -/// @param pSrc - Pointer to source raster tile in SWRZ pixel order -/// @param ppDsts - Array of destination pointers. Each pointer is -/// to a single row of at most 16B. -/// @tparam NumDests - Number of destination pointers. Each pair of -/// pointers is for a 16-byte column of two rows. -////////////////////////////////////////////////////////////////////////// -template <> -struct StorePixels<64, 4> -{ - static void Store(const uint8_t* pSrc, uint8_t* (&ppDsts)[4]) - { - // Each 4-pixel row is 32 bytes. - const __m128i* pPixSrc = (const __m128i*)pSrc; - - // order of pointers match SWR-Z layout - __m128i** pvDsts = (__m128i**)&ppDsts[0]; - *pvDsts[0] = pPixSrc[0]; - *pvDsts[1] = pPixSrc[1]; - *pvDsts[2] = pPixSrc[2]; - *pvDsts[3] = pPixSrc[3]; - } -}; - -////////////////////////////////////////////////////////////////////////// -/// StorePixels (32-bit pixel specialization) -/// @brief Stores a 4x2 (AVX) raster-tile to two rows. -/// @param pSrc - Pointer to source raster tile in SWRZ pixel order -/// @param ppDsts - Array of destination pointers. Each pointer is -/// to a single row of at most 16B. -/// @tparam NumDests - Number of destination pointers. Each pair of -/// pointers is for a 16-byte column of two rows. -////////////////////////////////////////////////////////////////////////// -template <> -struct StorePixels<128, 8> -{ - static void Store(const uint8_t* pSrc, uint8_t* (&ppDsts)[8]) - { - // Each 4-pixel row is 64 bytes. - const __m128i* pPixSrc = (const __m128i*)pSrc; - - // Unswizzle from SWR-Z order - __m128i** pvDsts = (__m128i**)&ppDsts[0]; - *pvDsts[0] = pPixSrc[0]; - *pvDsts[1] = pPixSrc[2]; - *pvDsts[2] = pPixSrc[1]; - *pvDsts[3] = pPixSrc[3]; - *pvDsts[4] = pPixSrc[4]; - *pvDsts[5] = pPixSrc[6]; - *pvDsts[6] = pPixSrc[5]; - *pvDsts[7] = pPixSrc[7]; - } -}; - -////////////////////////////////////////////////////////////////////////// -/// ConvertPixelsSOAtoAOS - Conversion for SIMD pixel (4x2 or 2x2) -////////////////////////////////////////////////////////////////////////// -template -struct ConvertPixelsSOAtoAOS -{ - ////////////////////////////////////////////////////////////////////////// - /// @brief Converts a SIMD from the Hot Tile to the destination format - /// and converts from SOA to AOS. - /// @param pSrc - Pointer to raster tile. - /// @param pDst - Pointer to destination surface or deswizzling buffer. - template - INLINE static void Convert(const uint8_t* pSrc, uint8_t* (&ppDsts)[NumDests]) - { - static const uint32_t MAX_RASTER_TILE_BYTES = 128; // 8 pixels * 16 bytes per pixel - - OSALIGNSIMD(uint8_t) soaTile[MAX_RASTER_TILE_BYTES]; - OSALIGNSIMD(uint8_t) aosTile[MAX_RASTER_TILE_BYTES]; - - // Convert from SrcFormat --> DstFormat - simdvector src; - LoadSOA(pSrc, src); - StoreSOA(src, soaTile); - - // Convert from SOA --> AOS - FormatTraits::TransposeT::Transpose(soaTile, aosTile); - - // Store data into destination - StorePixels::bpp, NumDests>::Store(aosTile, ppDsts); - } -}; - -////////////////////////////////////////////////////////////////////////// -/// ConvertPixelsSOAtoAOS - Conversion for SIMD pixel (4x2 or 2x2) -/// Specialization for no format conversion -////////////////////////////////////////////////////////////////////////// -template -struct ConvertPixelsSOAtoAOS -{ - ////////////////////////////////////////////////////////////////////////// - /// @brief Converts a SIMD from the Hot Tile to the destination format - /// and converts from SOA to AOS. - /// @param pSrc - Pointer to raster tile. - /// @param pDst - Pointer to destination surface or deswizzling buffer. - template - INLINE static void Convert(const uint8_t* pSrc, uint8_t* (&ppDsts)[NumDests]) - { - static const uint32_t MAX_RASTER_TILE_BYTES = 128; // 8 pixels * 16 bytes per pixel - - OSALIGNSIMD(uint8_t) aosTile[MAX_RASTER_TILE_BYTES]; - - // Convert from SOA --> AOS - FormatTraits::TransposeT::Transpose(pSrc, aosTile); - - // Store data into destination - StorePixels::bpp, NumDests>::Store(aosTile, ppDsts); - } -}; - -////////////////////////////////////////////////////////////////////////// -/// ConvertPixelsSOAtoAOS - Specialization conversion for B5G6R6_UNORM -////////////////////////////////////////////////////////////////////////// -template<> -struct ConvertPixelsSOAtoAOS < R32G32B32A32_FLOAT, B5G6R5_UNORM > -{ - ////////////////////////////////////////////////////////////////////////// - /// @brief Converts a SIMD from the Hot Tile to the destination format - /// and converts from SOA to AOS. - /// @param pSrc - Pointer to raster tile. - /// @param pDst - Pointer to destination surface or deswizzling buffer. - template - INLINE static void Convert(const uint8_t* pSrc, uint8_t* (&ppDsts)[NumDests]) - { - static const SWR_FORMAT SrcFormat = R32G32B32A32_FLOAT; - static const SWR_FORMAT DstFormat = B5G6R5_UNORM; - static const uint32_t MAX_RASTER_TILE_BYTES = 128; // 8 pixels * 16 bytes per pixel - - OSALIGNSIMD(uint8_t) aosTile[MAX_RASTER_TILE_BYTES]; - - // Load hot-tile - simdvector src, dst; - LoadSOA(pSrc, src); - - // deswizzle - dst.x = src[FormatTraits::swizzle(0)]; - dst.y = src[FormatTraits::swizzle(1)]; - dst.z = src[FormatTraits::swizzle(2)]; - - // clamp - dst.x = Clamp(dst.x, 0); - dst.y = Clamp(dst.y, 1); - dst.z = Clamp(dst.z, 2); - - // normalize - dst.x = Normalize(dst.x, 0); - dst.y = Normalize(dst.y, 1); - dst.z = Normalize(dst.z, 2); - - // pack - simdscalari packed = _simd_castps_si(dst.x); - packed = _simd_or_si(packed, _simd_slli_epi32(_simd_castps_si(dst.y), FormatTraits::GetBPC(0))); - packed = _simd_or_si(packed, _simd_slli_epi32(_simd_castps_si(dst.z), FormatTraits::GetBPC(0) + - FormatTraits::GetBPC(1))); - - // pack low 16 bits of each 32 bit lane to low 128 bits of dst - uint32_t *pPacked = (uint32_t*)&packed; - uint16_t *pAosTile = (uint16_t*)&aosTile[0]; - for (uint32_t t = 0; t < KNOB_SIMD_WIDTH; ++t) - { - *pAosTile++ = *pPacked++; - } - - // Store data into destination - StorePixels::bpp, NumDests>::Store(aosTile, ppDsts); - } -}; - -////////////////////////////////////////////////////////////////////////// -/// ConvertPixelsSOAtoAOS - Conversion for SIMD pixel (4x2 or 2x2) -////////////////////////////////////////////////////////////////////////// -template<> -struct ConvertPixelsSOAtoAOS -{ - static const SWR_FORMAT SrcFormat = R32_FLOAT; - static const SWR_FORMAT DstFormat = R24_UNORM_X8_TYPELESS; - - ////////////////////////////////////////////////////////////////////////// - /// @brief Converts a SIMD from the Hot Tile to the destination format - /// and converts from SOA to AOS. - /// @param pSrc - Pointer to raster tile. - /// @param pDst - Pointer to destination surface or deswizzling buffer. - template - INLINE static void Convert(const uint8_t* pSrc, uint8_t* (&ppDsts)[NumDests]) - { - static const uint32_t MAX_RASTER_TILE_BYTES = 128; // 8 pixels * 16 bytes per pixel - - OSALIGNSIMD(uint8_t) soaTile[MAX_RASTER_TILE_BYTES]; - OSALIGNSIMD(uint8_t) aosTile[MAX_RASTER_TILE_BYTES]; - - // Convert from SrcFormat --> DstFormat - simdvector src; - LoadSOA(pSrc, src); - StoreSOA(src, soaTile); - - // Convert from SOA --> AOS - FormatTraits::TransposeT::Transpose(soaTile, aosTile); - - // Store data into destination but don't overwrite the X8 bits - // Each 4-pixel row is 16-bytes - __m128i *pZRow01 = (__m128i*)aosTile; - __m128i vQuad00 = _mm_load_si128(pZRow01); - __m128i vQuad01 = _mm_load_si128(pZRow01 + 1); - - __m128i vRow00 = _mm_unpacklo_epi64(vQuad00, vQuad01); - __m128i vRow10 = _mm_unpackhi_epi64(vQuad00, vQuad01); - - __m128i vDst0 = _mm_loadu_si128((const __m128i*)ppDsts[0]); - __m128i vDst1 = _mm_loadu_si128((const __m128i*)ppDsts[1]); - - __m128i vMask = _mm_set1_epi32(0xFFFFFF); - - vDst0 = _mm_andnot_si128(vMask, vDst0); - vDst0 = _mm_or_si128(vDst0, _mm_and_si128(vRow00, vMask)); - vDst1 = _mm_andnot_si128(vMask, vDst1); - vDst1 = _mm_or_si128(vDst1, _mm_and_si128(vRow10, vMask)); - - _mm_storeu_si128((__m128i*)ppDsts[0], vDst0); - _mm_storeu_si128((__m128i*)ppDsts[1], vDst1); - } -}; - -template -INLINE static void FlatConvert(const uint8_t* pSrc, uint8_t* pDst, uint8_t* pDst1) -{ - static const uint32_t offset = sizeof(simdscalar); - - // swizzle rgba -> bgra while we load - simdscalar vComp0 = _simd_load_ps((const float*)(pSrc + (FormatTraits::swizzle(0))*offset)); // float32 rrrrrrrr - simdscalar vComp1 = _simd_load_ps((const float*)(pSrc + (FormatTraits::swizzle(1))*offset)); // float32 gggggggg - simdscalar vComp2 = _simd_load_ps((const float*)(pSrc + (FormatTraits::swizzle(2))*offset)); // float32 bbbbbbbb - simdscalar vComp3 = _simd_load_ps((const float*)(pSrc + (FormatTraits::swizzle(3))*offset)); // float32 aaaaaaaa - - // clamp - vComp0 = _simd_max_ps(vComp0, _simd_setzero_ps()); - vComp0 = _simd_min_ps(vComp0, _simd_set1_ps(1.0f)); - - vComp1 = _simd_max_ps(vComp1, _simd_setzero_ps()); - vComp1 = _simd_min_ps(vComp1, _simd_set1_ps(1.0f)); - - vComp2 = _simd_max_ps(vComp2, _simd_setzero_ps()); - vComp2 = _simd_min_ps(vComp2, _simd_set1_ps(1.0f)); - - vComp3 = _simd_max_ps(vComp3, _simd_setzero_ps()); - vComp3 = _simd_min_ps(vComp3, _simd_set1_ps(1.0f)); - - if (FormatTraits::isSRGB) - { - // Gamma-correct only rgb - vComp0 = FormatTraits::convertSrgb(0, vComp0); - vComp1 = FormatTraits::convertSrgb(1, vComp1); - vComp2 = FormatTraits::convertSrgb(2, vComp2); - } - - // convert float components from 0.0f .. 1.0f to correct scale for 0 .. 255 dest format - vComp0 = _simd_mul_ps(vComp0, _simd_set1_ps(FormatTraits::fromFloat(0))); - vComp1 = _simd_mul_ps(vComp1, _simd_set1_ps(FormatTraits::fromFloat(1))); - vComp2 = _simd_mul_ps(vComp2, _simd_set1_ps(FormatTraits::fromFloat(2))); - vComp3 = _simd_mul_ps(vComp3, _simd_set1_ps(FormatTraits::fromFloat(3))); - - // moving to 8 wide integer vector types - __m256i src0 = _simd_cvtps_epi32(vComp0); // padded byte rrrrrrrr - __m256i src1 = _simd_cvtps_epi32(vComp1); // padded byte gggggggg - __m256i src2 = _simd_cvtps_epi32(vComp2); // padded byte bbbbbbbb - __m256i src3 = _simd_cvtps_epi32(vComp3); // padded byte aaaaaaaa - -#if KNOB_ARCH == KNOB_ARCH_AVX - - // splitting into two sets of 4 wide integer vector types - // because AVX doesn't have instructions to support this operation at 8 wide - __m128i srcLo0 = _mm256_castsi256_si128(src0); // 000r000r000r000r - __m128i srcLo1 = _mm256_castsi256_si128(src1); // 000g000g000g000g - __m128i srcLo2 = _mm256_castsi256_si128(src2); // 000b000b000b000b - __m128i srcLo3 = _mm256_castsi256_si128(src3); // 000a000a000a000a - - __m128i srcHi0 = _mm256_extractf128_si256(src0, 1); // 000r000r000r000r - __m128i srcHi1 = _mm256_extractf128_si256(src1, 1); // 000g000g000g000g - __m128i srcHi2 = _mm256_extractf128_si256(src2, 1); // 000b000b000b000b - __m128i srcHi3 = _mm256_extractf128_si256(src3, 1); // 000a000a000a000a - - srcLo1 = _mm_slli_si128(srcLo1, 1); // 00g000g000g000g0 - srcHi1 = _mm_slli_si128(srcHi1, 1); // 00g000g000g000g0 - srcLo2 = _mm_slli_si128(srcLo2, 2); // 0b000b000b000b00 - srcHi2 = _mm_slli_si128(srcHi2, 2); // 0b000b000b000b00 - srcLo3 = _mm_slli_si128(srcLo3, 3); // a000a000a000a000 - srcHi3 = _mm_slli_si128(srcHi3, 3); // a000a000a000a000 - - srcLo0 = _mm_or_si128(srcLo0, srcLo1); // 00gr00gr00gr00gr - srcLo2 = _mm_or_si128(srcLo2, srcLo3); // ab00ab00ab00ab00 - - srcHi0 = _mm_or_si128(srcHi0, srcHi1); // 00gr00gr00gr00gr - srcHi2 = _mm_or_si128(srcHi2, srcHi3); // ab00ab00ab00ab00 - - srcLo0 = _mm_or_si128(srcLo0, srcLo2); // abgrabgrabgrabgr - srcHi0 = _mm_or_si128(srcHi0, srcHi2); // abgrabgrabgrabgr - - // unpack into rows that get the tiling order correct - __m128i vRow00 = _mm_unpacklo_epi64(srcLo0, srcHi0); // abgrabgrabgrabgrabgrabgrabgrabgr - __m128i vRow10 = _mm_unpackhi_epi64(srcLo0, srcHi0); - - __m256i final = _mm256_castsi128_si256(vRow00); - final = _mm256_insertf128_si256(final, vRow10, 1); - -#elif KNOB_ARCH == KNOB_ARCH_AVX2 - - // logic is as above, only wider - src1 = _mm256_slli_si256(src1, 1); - src2 = _mm256_slli_si256(src2, 2); - src3 = _mm256_slli_si256(src3, 3); - - src0 = _mm256_or_si256(src0, src1); - src2 = _mm256_or_si256(src2, src3); - - __m256i final = _mm256_or_si256(src0, src2); - - // adjust the data to get the tiling order correct 0 1 2 3 -> 0 2 1 3 - final = _mm256_permute4x64_epi64(final, 0xD8); - -#endif - - _mm256_storeu2_m128i((__m128i*)pDst1, (__m128i*)pDst, final); -} - -template -INLINE static void FlatConvertNoAlpha(const uint8_t* pSrc, uint8_t* pDst, uint8_t* pDst1) -{ - static const uint32_t offset = sizeof(simdscalar); - - // swizzle rgba -> bgra while we load - simdscalar vComp0 = _simd_load_ps((const float*)(pSrc + (FormatTraits::swizzle(0))*offset)); // float32 rrrrrrrr - simdscalar vComp1 = _simd_load_ps((const float*)(pSrc + (FormatTraits::swizzle(1))*offset)); // float32 gggggggg - simdscalar vComp2 = _simd_load_ps((const float*)(pSrc + (FormatTraits::swizzle(2))*offset)); // float32 bbbbbbbb - // clamp - vComp0 = _simd_max_ps(vComp0, _simd_setzero_ps()); - vComp0 = _simd_min_ps(vComp0, _simd_set1_ps(1.0f)); - - vComp1 = _simd_max_ps(vComp1, _simd_setzero_ps()); - vComp1 = _simd_min_ps(vComp1, _simd_set1_ps(1.0f)); - - vComp2 = _simd_max_ps(vComp2, _simd_setzero_ps()); - vComp2 = _simd_min_ps(vComp2, _simd_set1_ps(1.0f)); - - if (FormatTraits::isSRGB) - { - // Gamma-correct only rgb - vComp0 = FormatTraits::convertSrgb(0, vComp0); - vComp1 = FormatTraits::convertSrgb(1, vComp1); - vComp2 = FormatTraits::convertSrgb(2, vComp2); - } - - // convert float components from 0.0f .. 1.0f to correct scale for 0 .. 255 dest format - vComp0 = _simd_mul_ps(vComp0, _simd_set1_ps(FormatTraits::fromFloat(0))); - vComp1 = _simd_mul_ps(vComp1, _simd_set1_ps(FormatTraits::fromFloat(1))); - vComp2 = _simd_mul_ps(vComp2, _simd_set1_ps(FormatTraits::fromFloat(2))); - - // moving to 8 wide integer vector types - __m256i src0 = _simd_cvtps_epi32(vComp0); // padded byte rrrrrrrr - __m256i src1 = _simd_cvtps_epi32(vComp1); // padded byte gggggggg - __m256i src2 = _simd_cvtps_epi32(vComp2); // padded byte bbbbbbbb - -#if KNOB_ARCH == KNOB_ARCH_AVX - - // splitting into two sets of 4 wide integer vector types - // because AVX doesn't have instructions to support this operation at 8 wide - __m128i srcLo0 = _mm256_castsi256_si128(src0); // 000r000r000r000r - __m128i srcLo1 = _mm256_castsi256_si128(src1); // 000g000g000g000g - __m128i srcLo2 = _mm256_castsi256_si128(src2); // 000b000b000b000b - - __m128i srcHi0 = _mm256_extractf128_si256(src0, 1); // 000r000r000r000r - __m128i srcHi1 = _mm256_extractf128_si256(src1, 1); // 000g000g000g000g - __m128i srcHi2 = _mm256_extractf128_si256(src2, 1); // 000b000b000b000b - - srcLo1 = _mm_slli_si128(srcLo1, 1); // 00g000g000g000g0 - srcHi1 = _mm_slli_si128(srcHi1, 1); // 00g000g000g000g0 - srcLo2 = _mm_slli_si128(srcLo2, 2); // 0b000b000b000b00 - srcHi2 = _mm_slli_si128(srcHi2, 2); // 0b000b000b000b00 - - srcLo0 = _mm_or_si128(srcLo0, srcLo1); // 00gr00gr00gr00gr - - srcHi0 = _mm_or_si128(srcHi0, srcHi1); // 00gr00gr00gr00gr - - srcLo0 = _mm_or_si128(srcLo0, srcLo2); // 0bgr0bgr0bgr0bgr - srcHi0 = _mm_or_si128(srcHi0, srcHi2); // 0bgr0bgr0bgr0bgr - - // unpack into rows that get the tiling order correct - __m128i vRow00 = _mm_unpacklo_epi64(srcLo0, srcHi0); // 0bgr0bgr0bgr0bgr0bgr0bgr0bgr0bgr - __m128i vRow10 = _mm_unpackhi_epi64(srcLo0, srcHi0); - - __m256i final = _mm256_castsi128_si256(vRow00); - final = _mm256_insertf128_si256(final, vRow10, 1); - -#elif KNOB_ARCH == KNOB_ARCH_AVX2 - - // logic is as above, only wider - src1 = _mm256_slli_si256(src1, 1); - src2 = _mm256_slli_si256(src2, 2); - - src0 = _mm256_or_si256(src0, src1); - - __m256i final = _mm256_or_si256(src0, src2); - - // adjust the data to get the tiling order correct 0 1 2 3 -> 0 2 1 3 - final = _mm256_permute4x64_epi64(final, 0xD8); - -#endif - - _mm256_storeu2_m128i((__m128i*)pDst1, (__m128i*)pDst, final); -} - -template<> -struct ConvertPixelsSOAtoAOS -{ - template - INLINE static void Convert(const uint8_t* pSrc, uint8_t* (&ppDsts)[NumDests]) - { - FlatConvert(pSrc, ppDsts[0], ppDsts[1]); - } -}; - -template<> -struct ConvertPixelsSOAtoAOS -{ - template - INLINE static void Convert(const uint8_t* pSrc, uint8_t* (&ppDsts)[NumDests]) - { - FlatConvertNoAlpha(pSrc, ppDsts[0], ppDsts[1]); - } -}; - -template<> -struct ConvertPixelsSOAtoAOS < R32G32B32A32_FLOAT, B8G8R8A8_UNORM_SRGB > -{ - template - INLINE static void Convert(const uint8_t* pSrc, uint8_t* (&ppDsts)[NumDests]) - { - FlatConvert(pSrc, ppDsts[0], ppDsts[1]); - } -}; - -template<> -struct ConvertPixelsSOAtoAOS < R32G32B32A32_FLOAT, B8G8R8X8_UNORM_SRGB > -{ - template - INLINE static void Convert(const uint8_t* pSrc, uint8_t* (&ppDsts)[NumDests]) - { - FlatConvertNoAlpha(pSrc, ppDsts[0], ppDsts[1]); - } -}; - -template<> -struct ConvertPixelsSOAtoAOS < R32G32B32A32_FLOAT, R8G8B8A8_UNORM > -{ - template - INLINE static void Convert(const uint8_t* pSrc, uint8_t* (&ppDsts)[NumDests]) - { - FlatConvert(pSrc, ppDsts[0], ppDsts[1]); - } -}; - -template<> -struct ConvertPixelsSOAtoAOS < R32G32B32A32_FLOAT, R8G8B8X8_UNORM > -{ - template - INLINE static void Convert(const uint8_t* pSrc, uint8_t* (&ppDsts)[NumDests]) - { - FlatConvertNoAlpha(pSrc, ppDsts[0], ppDsts[1]); - } -}; - -template<> -struct ConvertPixelsSOAtoAOS < R32G32B32A32_FLOAT, R8G8B8A8_UNORM_SRGB > -{ - template - INLINE static void Convert(const uint8_t* pSrc, uint8_t* (&ppDsts)[NumDests]) - { - FlatConvert(pSrc, ppDsts[0], ppDsts[1]); - } -}; - -template<> -struct ConvertPixelsSOAtoAOS < R32G32B32A32_FLOAT, R8G8B8X8_UNORM_SRGB > -{ - template - INLINE static void Convert(const uint8_t* pSrc, uint8_t* (&ppDsts)[NumDests]) - { - FlatConvertNoAlpha(pSrc, ppDsts[0], ppDsts[1]); - } -}; - -////////////////////////////////////////////////////////////////////////// -/// StoreRasterTile -////////////////////////////////////////////////////////////////////////// -template -struct StoreRasterTile -{ - ////////////////////////////////////////////////////////////////////////// - /// @brief Retrieve color from hot tile source which is always float. - /// @param pSrc - Pointer to raster tile. - /// @param x, y - Coordinates to raster tile. - /// @param output - output color - INLINE static void GetSwizzledSrcColor( - uint8_t* pSrc, - uint32_t x, uint32_t y, - float outputColor[4]) - { - typedef SimdTile SimdT; - - SimdT* pSrcSimdTiles = (SimdT*)pSrc; - - // Compute which simd tile we're accessing within 8x8 tile. - // i.e. Compute linear simd tile coordinate given (x, y) in pixel coordinates. - uint32_t simdIndex = (y / SIMD_TILE_Y_DIM) * (KNOB_TILE_X_DIM / SIMD_TILE_X_DIM) + (x / SIMD_TILE_X_DIM); - - SimdT* pSimdTile = &pSrcSimdTiles[simdIndex]; - - uint32_t simdOffset = (y % SIMD_TILE_Y_DIM) * SIMD_TILE_X_DIM + (x % SIMD_TILE_X_DIM); - - pSimdTile->GetSwizzledColor(simdOffset, outputColor); - } - - ////////////////////////////////////////////////////////////////////////// - /// @brief Stores an 8x8 raster tile to the destination surface. - /// @param pSrc - Pointer to raster tile. - /// @param pDstSurface - Destination surface state - /// @param x, y - Coordinates to raster tile. - INLINE static void Store( - uint8_t *pSrc, - SWR_SURFACE_STATE* pDstSurface, - uint32_t x, uint32_t y, uint32_t sampleNum, uint32_t renderTargetArrayIndex) // (x, y) pixel coordinate to start of raster tile. - { - uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod, 1U); - uint32_t lodHeight = std::max(pDstSurface->height >> pDstSurface->lod, 1U); - - // For each raster tile pixel (rx, ry) - for (uint32_t ry = 0; ry < KNOB_TILE_Y_DIM; ++ry) - { - for (uint32_t rx = 0; rx < KNOB_TILE_X_DIM; ++rx) - { - // Perform bounds checking. - if (((x + rx) < lodWidth) && - ((y + ry) < lodHeight)) - { - float srcColor[4]; - GetSwizzledSrcColor(pSrc, rx, ry, srcColor); - - uint8_t *pDst = (uint8_t*)ComputeSurfaceAddress((x + rx), (y + ry), - pDstSurface->arrayIndex + renderTargetArrayIndex, pDstSurface->arrayIndex + renderTargetArrayIndex, - sampleNum, pDstSurface->lod, pDstSurface); - ConvertPixelFromFloat(pDst, srcColor); - } - } - } - } -}; - -template -struct OptStoreRasterTile : StoreRasterTile -{}; - -////////////////////////////////////////////////////////////////////////// -/// OptStoreRasterTile - SWR_TILE_MODE_NONE specialization for 8bpp -////////////////////////////////////////////////////////////////////////// -template -struct OptStoreRasterTile< TilingTraits, SrcFormat, DstFormat > -{ - typedef StoreRasterTile, SrcFormat, DstFormat> GenericStoreTile; - static const size_t SRC_BYTES_PER_PIXEL = FormatTraits::bpp / 8; - static const size_t DST_BYTES_PER_PIXEL = FormatTraits::bpp / 8; - - ////////////////////////////////////////////////////////////////////////// - /// @brief Stores an 8x8 raster tile to the destination surface. - /// @param pSrc - Pointer to raster tile. - /// @param pDstSurface - Destination surface state - /// @param x, y - Coordinates to raster tile. - INLINE static void Store( - uint8_t *pSrc, - SWR_SURFACE_STATE* pDstSurface, - uint32_t x, uint32_t y, uint32_t sampleNum, uint32_t renderTargetArrayIndex) - { - // Punt non-full tiles to generic store - uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod, 1U); - uint32_t lodHeight = std::max(pDstSurface->height >> pDstSurface->lod, 1U); - if (x + KNOB_TILE_X_DIM > lodWidth || - y + KNOB_TILE_Y_DIM > lodHeight) - { - return GenericStoreTile::Store(pSrc, pDstSurface, x, y, sampleNum, renderTargetArrayIndex); - } - - uint8_t* pDst = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, - pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); - uint8_t* ppRows[] = { pDst, pDst + pDstSurface->pitch }; - - for (uint32_t row = 0; row < KNOB_TILE_Y_DIM / SIMD_TILE_Y_DIM; ++row) - { - uint8_t* ppStartRows[] = { ppRows[0], ppRows[1] }; - - for (uint32_t col = 0; col < KNOB_TILE_X_DIM / SIMD_TILE_X_DIM; ++col) - { - // Format conversion and convert from SOA to AOS, and store the rows. - ConvertPixelsSOAtoAOS::Convert(pSrc, ppRows); - - ppRows[0] += KNOB_SIMD_WIDTH * DST_BYTES_PER_PIXEL / 2; - ppRows[1] += KNOB_SIMD_WIDTH * DST_BYTES_PER_PIXEL / 2; - pSrc += SRC_BYTES_PER_PIXEL * KNOB_SIMD_WIDTH; - } - - ppRows[0] = ppStartRows[0] + 2 * pDstSurface->pitch; - ppRows[1] = ppStartRows[1] + 2 * pDstSurface->pitch; - } - } -}; - -////////////////////////////////////////////////////////////////////////// -/// OptStoreRasterTile - SWR_TILE_MODE_NONE specialization for 16bpp -////////////////////////////////////////////////////////////////////////// -template -struct OptStoreRasterTile< TilingTraits, SrcFormat, DstFormat > -{ - typedef StoreRasterTile, SrcFormat, DstFormat> GenericStoreTile; - static const size_t SRC_BYTES_PER_PIXEL = FormatTraits::bpp / 8; - static const size_t DST_BYTES_PER_PIXEL = FormatTraits::bpp / 8; - - ////////////////////////////////////////////////////////////////////////// - /// @brief Stores an 8x8 raster tile to the destination surface. - /// @param pSrc - Pointer to raster tile. - /// @param pDstSurface - Destination surface state - /// @param x, y - Coordinates to raster tile. - INLINE static void Store( - uint8_t *pSrc, - SWR_SURFACE_STATE* pDstSurface, - uint32_t x, uint32_t y, uint32_t sampleNum, uint32_t renderTargetArrayIndex) - { - // Punt non-full tiles to generic store - uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod, 1U); - uint32_t lodHeight = std::max(pDstSurface->height >> pDstSurface->lod, 1U); - if (x + KNOB_TILE_X_DIM > lodWidth || - y + KNOB_TILE_Y_DIM > lodHeight) - { - return GenericStoreTile::Store(pSrc, pDstSurface, x, y, sampleNum, renderTargetArrayIndex); - } - - uint8_t* pDst = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, - pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); - uint8_t* ppRows[] = { pDst, pDst + pDstSurface->pitch }; - - for (uint32_t row = 0; row < KNOB_TILE_Y_DIM / SIMD_TILE_Y_DIM; ++row) - { - uint8_t* ppStartRows[] = { ppRows[0], ppRows[1] }; - - for (uint32_t col = 0; col < KNOB_TILE_X_DIM / SIMD_TILE_X_DIM; ++col) - { - // Format conversion and convert from SOA to AOS, and store the rows. - ConvertPixelsSOAtoAOS::Convert(pSrc, ppRows); - - ppRows[0] += KNOB_SIMD_WIDTH * DST_BYTES_PER_PIXEL / 2; - ppRows[1] += KNOB_SIMD_WIDTH * DST_BYTES_PER_PIXEL / 2; - pSrc += SRC_BYTES_PER_PIXEL * KNOB_SIMD_WIDTH; - } - - ppRows[0] = ppStartRows[0] + 2 * pDstSurface->pitch; - ppRows[1] = ppStartRows[1] + 2 * pDstSurface->pitch; - } - } -}; - -////////////////////////////////////////////////////////////////////////// -/// OptStoreRasterTile - SWR_TILE_MODE_NONE specialization for 32bpp -////////////////////////////////////////////////////////////////////////// -template -struct OptStoreRasterTile< TilingTraits, SrcFormat, DstFormat > -{ - typedef StoreRasterTile, SrcFormat, DstFormat> GenericStoreTile; - static const size_t SRC_BYTES_PER_PIXEL = FormatTraits::bpp / 8; - static const size_t DST_BYTES_PER_PIXEL = FormatTraits::bpp / 8; - - ////////////////////////////////////////////////////////////////////////// - /// @brief Stores an 8x8 raster tile to the destination surface. - /// @param pSrc - Pointer to raster tile. - /// @param pDstSurface - Destination surface state - /// @param x, y - Coordinates to raster tile. - INLINE static void Store( - uint8_t *pSrc, - SWR_SURFACE_STATE* pDstSurface, - uint32_t x, uint32_t y, uint32_t sampleNum, uint32_t renderTargetArrayIndex) - { - // Punt non-full tiles to generic store - uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod, 1U); - uint32_t lodHeight = std::max(pDstSurface->height >> pDstSurface->lod, 1U); - if (x + KNOB_TILE_X_DIM > lodWidth || - y + KNOB_TILE_Y_DIM > lodHeight) - { - return GenericStoreTile::Store(pSrc, pDstSurface, x, y, sampleNum, renderTargetArrayIndex); - } - - uint8_t* pDst = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, - pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); - uint8_t* ppRows[] = { pDst, pDst + pDstSurface->pitch }; - - for (uint32_t row = 0; row < KNOB_TILE_Y_DIM / SIMD_TILE_Y_DIM; ++row) - { - uint8_t* ppStartRows[] = { ppRows[0], ppRows[1] }; - - for (uint32_t col = 0; col < KNOB_TILE_X_DIM / SIMD_TILE_X_DIM; ++col) - { - // Format conversion and convert from SOA to AOS, and store the rows. - ConvertPixelsSOAtoAOS::Convert(pSrc, ppRows); - - ppRows[0] += KNOB_SIMD_WIDTH * DST_BYTES_PER_PIXEL / 2; - ppRows[1] += KNOB_SIMD_WIDTH * DST_BYTES_PER_PIXEL / 2; - pSrc += SRC_BYTES_PER_PIXEL * KNOB_SIMD_WIDTH; - } - - ppRows[0] = ppStartRows[0] + 2 * pDstSurface->pitch; - ppRows[1] = ppStartRows[1] + 2 * pDstSurface->pitch; - } - } -}; - -////////////////////////////////////////////////////////////////////////// -/// OptStoreRasterTile - SWR_TILE_MODE_NONE specialization for 64bpp -////////////////////////////////////////////////////////////////////////// -template -struct OptStoreRasterTile< TilingTraits, SrcFormat, DstFormat > -{ - typedef StoreRasterTile, SrcFormat, DstFormat> GenericStoreTile; - static const size_t DST_BYTES_PER_PIXEL = FormatTraits::bpp / 8; - static const size_t SRC_BYTES_PER_PIXEL = FormatTraits::bpp / 8; - static const size_t MAX_DST_COLUMN_BYTES = 16; - static const size_t SRC_COLUMN_BYTES = KNOB_SIMD_WIDTH * SRC_BYTES_PER_PIXEL; - static const size_t DST_COLUMN_BYTES_PER_SRC = KNOB_SIMD_WIDTH * DST_BYTES_PER_PIXEL / 2; - - ////////////////////////////////////////////////////////////////////////// - /// @brief Stores an 8x8 raster tile to the destination surface. - /// @param pSrc - Pointer to raster tile. - /// @param pDstSurface - Destination surface state - /// @param x, y - Coordinates to raster tile. - INLINE static void Store( - uint8_t *pSrc, - SWR_SURFACE_STATE* pDstSurface, - uint32_t x, uint32_t y, uint32_t sampleNum, uint32_t renderTargetArrayIndex) - { - // Punt non-full tiles to generic store - uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod, 1U); - uint32_t lodHeight = std::max(pDstSurface->height >> pDstSurface->lod, 1U); - if (x + KNOB_TILE_X_DIM > lodWidth || - y + KNOB_TILE_Y_DIM > lodHeight) - { - return GenericStoreTile::Store(pSrc, pDstSurface, x, y, sampleNum, renderTargetArrayIndex); - } - - uint8_t* pDst = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, - pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); - uint8_t* ppDsts[] = - { - pDst, // row 0, col 0 - pDst + pDstSurface->pitch, // row 1, col 0 - pDst + MAX_DST_COLUMN_BYTES, // row 0, col 1 - pDst + pDstSurface->pitch + MAX_DST_COLUMN_BYTES, // row 1, col 1 - }; - - for (uint32_t row = 0; row < KNOB_TILE_Y_DIM / SIMD_TILE_Y_DIM; ++row) - { - uint8_t* ppStartRows[] = - { - ppDsts[0], - ppDsts[1], - ppDsts[2], - ppDsts[3], - }; - - for (uint32_t col = 0; col < KNOB_TILE_X_DIM / SIMD_TILE_X_DIM; ++col) - { - // Format conversion and convert from SOA to AOS, and store the rows. - ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); - - ppDsts[0] += DST_COLUMN_BYTES_PER_SRC; - ppDsts[1] += DST_COLUMN_BYTES_PER_SRC; - ppDsts[2] += DST_COLUMN_BYTES_PER_SRC; - ppDsts[3] += DST_COLUMN_BYTES_PER_SRC; - pSrc += SRC_COLUMN_BYTES; - } - - ppDsts[0] = ppStartRows[0] + 2 * pDstSurface->pitch; - ppDsts[1] = ppStartRows[1] + 2 * pDstSurface->pitch; - ppDsts[2] = ppStartRows[2] + 2 * pDstSurface->pitch; - ppDsts[3] = ppStartRows[3] + 2 * pDstSurface->pitch; - } - } -}; - -////////////////////////////////////////////////////////////////////////// -/// OptStoreRasterTile - SWR_TILE_MODE_NONE specialization for 128bpp -////////////////////////////////////////////////////////////////////////// -template -struct OptStoreRasterTile< TilingTraits, SrcFormat, DstFormat > -{ - typedef StoreRasterTile, SrcFormat, DstFormat> GenericStoreTile; - static const size_t DST_BYTES_PER_PIXEL = FormatTraits::bpp / 8; - static const size_t SRC_BYTES_PER_PIXEL = FormatTraits::bpp / 8; - static const size_t MAX_DST_COLUMN_BYTES = 16; - static const size_t SRC_COLUMN_BYTES = KNOB_SIMD_WIDTH * SRC_BYTES_PER_PIXEL; - static const size_t DST_COLUMN_BYTES_PER_SRC = KNOB_SIMD_WIDTH * DST_BYTES_PER_PIXEL / 2; - - ////////////////////////////////////////////////////////////////////////// - /// @brief Stores an 8x8 raster tile to the destination surface. - /// @param pSrc - Pointer to raster tile. - /// @param pDstSurface - Destination surface state - /// @param x, y - Coordinates to raster tile. - INLINE static void Store( - uint8_t *pSrc, - SWR_SURFACE_STATE* pDstSurface, - uint32_t x, uint32_t y, uint32_t sampleNum, uint32_t renderTargetArrayIndex) - { - // Punt non-full tiles to generic store - uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod, 1U); - uint32_t lodHeight = std::max(pDstSurface->height >> pDstSurface->lod, 1U); - if (x + KNOB_TILE_X_DIM > lodWidth || - y + KNOB_TILE_Y_DIM > lodHeight) - { - return GenericStoreTile::Store(pSrc, pDstSurface, x, y, sampleNum, renderTargetArrayIndex); - } - - uint8_t* pDst = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, - pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); - struct DstPtrs - { - uint8_t* ppDsts[8]; - } ptrs; - - // Need 8 pointers, 4 columns of 2 rows each - for (uint32_t y = 0; y < 2; ++y) - { - for (uint32_t x = 0; x < 4; ++x) - { - ptrs.ppDsts[x * 2 + y] = pDst + y * pDstSurface->pitch + x * MAX_DST_COLUMN_BYTES; - } - } - - for (uint32_t row = 0; row < KNOB_TILE_Y_DIM / SIMD_TILE_Y_DIM; ++row) - { - DstPtrs startPtrs = ptrs; - - for (uint32_t col = 0; col < KNOB_TILE_X_DIM / SIMD_TILE_X_DIM; ++col) - { - // Format conversion and convert from SOA to AOS, and store the rows. - ConvertPixelsSOAtoAOS::Convert(pSrc, ptrs.ppDsts); - - ptrs.ppDsts[0] += DST_COLUMN_BYTES_PER_SRC; - ptrs.ppDsts[1] += DST_COLUMN_BYTES_PER_SRC; - ptrs.ppDsts[2] += DST_COLUMN_BYTES_PER_SRC; - ptrs.ppDsts[3] += DST_COLUMN_BYTES_PER_SRC; - ptrs.ppDsts[4] += DST_COLUMN_BYTES_PER_SRC; - ptrs.ppDsts[5] += DST_COLUMN_BYTES_PER_SRC; - ptrs.ppDsts[6] += DST_COLUMN_BYTES_PER_SRC; - ptrs.ppDsts[7] += DST_COLUMN_BYTES_PER_SRC; - pSrc += SRC_COLUMN_BYTES; - } - - ptrs.ppDsts[0] = startPtrs.ppDsts[0] + 2 * pDstSurface->pitch; - ptrs.ppDsts[1] = startPtrs.ppDsts[1] + 2 * pDstSurface->pitch; - ptrs.ppDsts[2] = startPtrs.ppDsts[2] + 2 * pDstSurface->pitch; - ptrs.ppDsts[3] = startPtrs.ppDsts[3] + 2 * pDstSurface->pitch; - ptrs.ppDsts[4] = startPtrs.ppDsts[4] + 2 * pDstSurface->pitch; - ptrs.ppDsts[5] = startPtrs.ppDsts[5] + 2 * pDstSurface->pitch; - ptrs.ppDsts[6] = startPtrs.ppDsts[6] + 2 * pDstSurface->pitch; - ptrs.ppDsts[7] = startPtrs.ppDsts[7] + 2 * pDstSurface->pitch; - } - } -}; - -////////////////////////////////////////////////////////////////////////// -/// OptStoreRasterTile - TILE_MODE_YMAJOR specialization for 8bpp -////////////////////////////////////////////////////////////////////////// -template -struct OptStoreRasterTile< TilingTraits, SrcFormat, DstFormat > -{ - typedef StoreRasterTile, SrcFormat, DstFormat> GenericStoreTile; - - ////////////////////////////////////////////////////////////////////////// - /// @brief Stores an 8x8 raster tile to the destination surface. - /// @param pSrc - Pointer to raster tile. - /// @param pDstSurface - Destination surface state - /// @param x, y - Coordinates to raster tile. - INLINE static void Store( - uint8_t *pSrc, - SWR_SURFACE_STATE* pDstSurface, - uint32_t x, uint32_t y, uint32_t sampleNum, uint32_t renderTargetArrayIndex) - { - static const uint32_t DestRowWidthBytes = 16; // 16B rows - - // Punt non-full tiles to generic store - uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod, 1U); - uint32_t lodHeight = std::max(pDstSurface->height >> pDstSurface->lod, 1U); - if (x + KNOB_TILE_X_DIM > lodWidth || - y + KNOB_TILE_Y_DIM > lodHeight) - { - return GenericStoreTile::Store(pSrc, pDstSurface, x, y, sampleNum, renderTargetArrayIndex); - } - - // TileY is a column-major tiling mode where each 4KB tile consist of 8 columns of 32 x 16B rows. - // We can compute the offsets to each column within the raster tile once and increment from these. - // There will be 2 x 4-wide columns in an 8x8 raster tile. - uint8_t* pCol0 = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, - pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); - - // Increment by a whole SIMD. 4x2 for AVX. 2x2 for SSE. - uint32_t pSrcInc = (FormatTraits::bpp * KNOB_SIMD_WIDTH) / 8; - - // The Hot Tile uses a row-major tiling mode and has a larger memory footprint. So we iterate in a row-major pattern. - for (uint32_t row = 0; row < KNOB_TILE_Y_DIM; row += SIMD_TILE_Y_DIM) - { - uint32_t rowOffset = row * DestRowWidthBytes; - - uint8_t* pRow = pCol0 + rowOffset; - uint8_t* ppDsts[] = { pRow, pRow + DestRowWidthBytes }; - - ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); - pSrc += pSrcInc; - - ppDsts[0] += DestRowWidthBytes / 4; - ppDsts[1] += DestRowWidthBytes / 4; - - ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); - pSrc += pSrcInc; - } - } -}; - -////////////////////////////////////////////////////////////////////////// -/// OptStoreRasterTile - TILE_MODE_YMAJOR specialization for 16bpp -////////////////////////////////////////////////////////////////////////// -template -struct OptStoreRasterTile< TilingTraits, SrcFormat, DstFormat > -{ - typedef StoreRasterTile, SrcFormat, DstFormat> GenericStoreTile; - - ////////////////////////////////////////////////////////////////////////// - /// @brief Stores an 8x8 raster tile to the destination surface. - /// @param pSrc - Pointer to raster tile. - /// @param pDstSurface - Destination surface state - /// @param x, y - Coordinates to raster tile. - INLINE static void Store( - uint8_t *pSrc, - SWR_SURFACE_STATE* pDstSurface, - uint32_t x, uint32_t y, uint32_t sampleNum, uint32_t renderTargetArrayIndex) - { - static const uint32_t DestRowWidthBytes = 16; // 16B rows - - // Punt non-full tiles to generic store - uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod, 1U); - uint32_t lodHeight = std::max(pDstSurface->height >> pDstSurface->lod, 1U); - if (x + KNOB_TILE_X_DIM > lodWidth || - y + KNOB_TILE_Y_DIM > lodHeight) - { - return GenericStoreTile::Store(pSrc, pDstSurface, x, y, sampleNum, renderTargetArrayIndex); - } - - // TileY is a column-major tiling mode where each 4KB tile consist of 8 columns of 32 x 16B rows. - // We can compute the offsets to each column within the raster tile once and increment from these. - // There will be 2 x 4-wide columns in an 8x8 raster tile. - uint8_t* pCol0 = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, - pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); - - // Increment by a whole SIMD. 4x2 for AVX. 2x2 for SSE. - uint32_t pSrcInc = (FormatTraits::bpp * KNOB_SIMD_WIDTH) / 8; - - // The Hot Tile uses a row-major tiling mode and has a larger memory footprint. So we iterate in a row-major pattern. - for (uint32_t row = 0; row < KNOB_TILE_Y_DIM; row += SIMD_TILE_Y_DIM) - { - uint32_t rowOffset = row * DestRowWidthBytes; - - uint8_t* pRow = pCol0 + rowOffset; - uint8_t* ppDsts[] = { pRow, pRow + DestRowWidthBytes }; - - ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); - pSrc += pSrcInc; - - ppDsts[0] += DestRowWidthBytes / 2; - ppDsts[1] += DestRowWidthBytes / 2; - - ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); - pSrc += pSrcInc; - } - } -}; - -////////////////////////////////////////////////////////////////////////// -/// OptStoreRasterTile - TILE_MODE_XMAJOR specialization for 32bpp -////////////////////////////////////////////////////////////////////////// -template -struct OptStoreRasterTile< TilingTraits, SrcFormat, DstFormat > -{ - typedef StoreRasterTile, SrcFormat, DstFormat> GenericStoreTile; - - ////////////////////////////////////////////////////////////////////////// - /// @brief Stores an 8x8 raster tile to the destination surface. - /// @param pSrc - Pointer to raster tile. - /// @param pDstSurface - Destination surface state - /// @param x, y - Coordinates to raster tile. - INLINE static void Store( - uint8_t *pSrc, - SWR_SURFACE_STATE* pDstSurface, - uint32_t x, uint32_t y, uint32_t sampleNum, uint32_t renderTargetArrayIndex) - { - static const uint32_t DestRowWidthBytes = 512; // 512B rows - - // Punt non-full tiles to generic store - uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod, 1U); - uint32_t lodHeight = std::max(pDstSurface->height >> pDstSurface->lod, 1U); - if (x + KNOB_TILE_X_DIM > lodWidth || - y + KNOB_TILE_Y_DIM > lodHeight) - { - return GenericStoreTile::Store(pSrc, pDstSurface, x, y, sampleNum, renderTargetArrayIndex); - } - - // TileX is a row-major tiling mode where each 4KB tile consist of 8 x 512B rows. - // We can compute the offsets to each column within the raster tile once and increment from these. - uint8_t *pRow0 = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, - pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); - uint8_t* pRow1 = pRow0 + DestRowWidthBytes; - - for (uint32_t row = 0; row < KNOB_TILE_Y_DIM; row += SIMD_TILE_Y_DIM) - { - for (uint32_t col = 0; col < KNOB_TILE_X_DIM; col += SIMD_TILE_X_DIM) - { - uint32_t xRowOffset = col * (FormatTraits::bpp / 8); - - uint8_t* ppDsts[] = { pRow0 + xRowOffset, pRow1 + xRowOffset }; - ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); - - // Increment by a whole SIMD. 4x2 for AVX. 2x2 for SSE. - pSrc += (FormatTraits::bpp * KNOB_SIMD_WIDTH) / 8; - } - - pRow0 += (DestRowWidthBytes * 2); - pRow1 += (DestRowWidthBytes * 2); - } - } -}; - -////////////////////////////////////////////////////////////////////////// -/// OptStoreRasterTile - TILE_MODE_YMAJOR specialization for 32bpp -////////////////////////////////////////////////////////////////////////// -template -struct OptStoreRasterTile< TilingTraits, SrcFormat, DstFormat > -{ - typedef StoreRasterTile, SrcFormat, DstFormat> GenericStoreTile; - - ////////////////////////////////////////////////////////////////////////// - /// @brief Stores an 8x8 raster tile to the destination surface. - /// @param pSrc - Pointer to raster tile. - /// @param pDstSurface - Destination surface state - /// @param x, y - Coordinates to raster tile. - INLINE static void Store( - uint8_t *pSrc, - SWR_SURFACE_STATE* pDstSurface, - uint32_t x, uint32_t y, uint32_t sampleNum, uint32_t renderTargetArrayIndex) - { - static const uint32_t DestRowWidthBytes = 16; // 16B rows - static const uint32_t DestColumnBytes = DestRowWidthBytes * 32; // 16B x 32 rows. - - // Punt non-full tiles to generic store - uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod, 1U); - uint32_t lodHeight = std::max(pDstSurface->height >> pDstSurface->lod, 1U); - if (x + KNOB_TILE_X_DIM > lodWidth || - y + KNOB_TILE_Y_DIM > lodHeight) - { - return GenericStoreTile::Store(pSrc, pDstSurface, x, y, sampleNum, renderTargetArrayIndex); - } - - // TileY is a column-major tiling mode where each 4KB tile consist of 8 columns of 32 x 16B rows. - // We can compute the offsets to each column within the raster tile once and increment from these. - // There will be 2 x 4-wide columns in an 8x8 raster tile. - uint8_t* pCol0 = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, - pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); - - // Increment by a whole SIMD. 4x2 for AVX. 2x2 for SSE. - uint32_t pSrcInc = (FormatTraits::bpp * KNOB_SIMD_WIDTH) / 8; - - // The Hot Tile uses a row-major tiling mode and has a larger memory footprint. So we iterate in a row-major pattern. - for (uint32_t row = 0; row < KNOB_TILE_Y_DIM; row += SIMD_TILE_Y_DIM) - { - uint32_t rowOffset = row * DestRowWidthBytes; - - uint8_t* pRow = pCol0 + rowOffset; - uint8_t* ppDsts[] = { pRow, pRow + DestRowWidthBytes }; - - ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); - pSrc += pSrcInc; - - ppDsts[0] += DestColumnBytes; - ppDsts[1] += DestColumnBytes; - - ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); - pSrc += pSrcInc; - } - } -}; - -////////////////////////////////////////////////////////////////////////// -/// OptStoreRasterTile - TILE_MODE_YMAJOR specialization for 64bpp -////////////////////////////////////////////////////////////////////////// -template -struct OptStoreRasterTile< TilingTraits, SrcFormat, DstFormat > -{ - typedef StoreRasterTile, SrcFormat, DstFormat> GenericStoreTile; - - ////////////////////////////////////////////////////////////////////////// - /// @brief Stores an 8x8 raster tile to the destination surface. - /// @param pSrc - Pointer to raster tile. - /// @param pDstSurface - Destination surface state - /// @param x, y - Coordinates to raster tile. - INLINE static void Store( - uint8_t *pSrc, - SWR_SURFACE_STATE* pDstSurface, - uint32_t x, uint32_t y, uint32_t sampleNum, uint32_t renderTargetArrayIndex) - { - static const uint32_t DestRowWidthBytes = 16; // 16B rows - static const uint32_t DestColumnBytes = DestRowWidthBytes * 32; // 16B x 32 rows. - - // Punt non-full tiles to generic store - uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod, 1U); - uint32_t lodHeight = std::max(pDstSurface->height >> pDstSurface->lod, 1U); - if (x + KNOB_TILE_X_DIM > lodWidth || - y + KNOB_TILE_Y_DIM > lodHeight) - { - return GenericStoreTile::Store(pSrc, pDstSurface, x, y, sampleNum, renderTargetArrayIndex); - } - - // TileY is a column-major tiling mode where each 4KB tile consist of 8 columns of 32 x 16B rows. - // We can compute the offsets to each column within the raster tile once and increment from these. - // There will be 2 x 4-wide columns in an 8x8 raster tile. - uint8_t* pCol0 = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, - pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); - uint8_t* pCol1 = pCol0 + DestColumnBytes; - - // There are 4 columns, each 2 pixels wide when we have 64bpp pixels. - // Increment by a whole SIMD. 4x2 for AVX. 2x2 for SSE. - uint32_t pSrcInc = (FormatTraits::bpp * KNOB_SIMD_WIDTH) / 8; - - // The Hot Tile uses a row-major tiling mode and has a larger memory footprint. So we iterate in a row-major pattern. - for (uint32_t row = 0; row < KNOB_TILE_Y_DIM; row += SIMD_TILE_Y_DIM) - { - uint32_t rowOffset = row * DestRowWidthBytes; - uint8_t* ppDsts[] = - { - pCol0 + rowOffset, - pCol0 + rowOffset + DestRowWidthBytes, - pCol1 + rowOffset, - pCol1 + rowOffset + DestRowWidthBytes, - }; - - ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); - pSrc += pSrcInc; - - ppDsts[0] += DestColumnBytes * 2; - ppDsts[1] += DestColumnBytes * 2; - ppDsts[2] += DestColumnBytes * 2; - ppDsts[3] += DestColumnBytes * 2; - - ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); - pSrc += pSrcInc; - } - } -}; - -////////////////////////////////////////////////////////////////////////// -/// OptStoreRasterTile - SWR_TILE_MODE_YMAJOR specialization for 128bpp -////////////////////////////////////////////////////////////////////////// -template -struct OptStoreRasterTile< TilingTraits, SrcFormat, DstFormat > -{ - typedef StoreRasterTile, SrcFormat, DstFormat> GenericStoreTile; - - static const size_t TILE_Y_COL_WIDTH_BYTES = 16; - static const size_t TILE_Y_ROWS = 32; - static const size_t TILE_Y_COL_BYTES = TILE_Y_ROWS * TILE_Y_COL_WIDTH_BYTES; - - static const size_t DST_BYTES_PER_PIXEL = FormatTraits::bpp / 8; - static const size_t SRC_BYTES_PER_PIXEL = FormatTraits::bpp / 8; - static const size_t MAX_DST_COLUMN_BYTES = 16; - - static const size_t SRC_COLUMN_BYTES = KNOB_SIMD_WIDTH * SRC_BYTES_PER_PIXEL; - static const size_t DST_COLUMN_BYTES_PER_SRC = TILE_Y_COL_BYTES * 4; - - ////////////////////////////////////////////////////////////////////////// - /// @brief Stores an 8x8 raster tile to the destination surface. - /// @param pSrc - Pointer to raster tile. - /// @param pDstSurface - Destination surface state - /// @param x, y - Coordinates to raster tile. - INLINE static void Store( - uint8_t *pSrc, - SWR_SURFACE_STATE* pDstSurface, - uint32_t x, uint32_t y, uint32_t sampleNum, uint32_t renderTargetArrayIndex) - { - // Punt non-full tiles to generic store - uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod, 1U); - uint32_t lodHeight = std::max(pDstSurface->height >> pDstSurface->lod, 1U); - if (x + KNOB_TILE_X_DIM > lodWidth || - y + KNOB_TILE_Y_DIM > lodHeight) - { - return GenericStoreTile::Store(pSrc, pDstSurface, x, y, sampleNum, renderTargetArrayIndex); - } - - uint8_t* pDst = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, - pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); - struct DstPtrs - { - uint8_t* ppDsts[8]; - } ptrs; - - // Need 8 pointers, 4 columns of 2 rows each - for (uint32_t y = 0; y < 2; ++y) - { - for (uint32_t x = 0; x < 4; ++x) - { - ptrs.ppDsts[x * 2 + y] = pDst + y * TILE_Y_COL_WIDTH_BYTES + x * TILE_Y_COL_BYTES; - } - } - - for (uint32_t row = 0; row < KNOB_TILE_Y_DIM / SIMD_TILE_Y_DIM; ++row) - { - DstPtrs startPtrs = ptrs; - - for (uint32_t col = 0; col < KNOB_TILE_X_DIM / SIMD_TILE_X_DIM; ++col) - { - // Format conversion and convert from SOA to AOS, and store the rows. - ConvertPixelsSOAtoAOS::Convert(pSrc, ptrs.ppDsts); - - ptrs.ppDsts[0] += DST_COLUMN_BYTES_PER_SRC; - ptrs.ppDsts[1] += DST_COLUMN_BYTES_PER_SRC; - ptrs.ppDsts[2] += DST_COLUMN_BYTES_PER_SRC; - ptrs.ppDsts[3] += DST_COLUMN_BYTES_PER_SRC; - ptrs.ppDsts[4] += DST_COLUMN_BYTES_PER_SRC; - ptrs.ppDsts[5] += DST_COLUMN_BYTES_PER_SRC; - ptrs.ppDsts[6] += DST_COLUMN_BYTES_PER_SRC; - ptrs.ppDsts[7] += DST_COLUMN_BYTES_PER_SRC; - pSrc += SRC_COLUMN_BYTES; - } - - ptrs.ppDsts[0] = startPtrs.ppDsts[0] + 2 * TILE_Y_COL_WIDTH_BYTES; - ptrs.ppDsts[1] = startPtrs.ppDsts[1] + 2 * TILE_Y_COL_WIDTH_BYTES; - ptrs.ppDsts[2] = startPtrs.ppDsts[2] + 2 * TILE_Y_COL_WIDTH_BYTES; - ptrs.ppDsts[3] = startPtrs.ppDsts[3] + 2 * TILE_Y_COL_WIDTH_BYTES; - ptrs.ppDsts[4] = startPtrs.ppDsts[4] + 2 * TILE_Y_COL_WIDTH_BYTES; - ptrs.ppDsts[5] = startPtrs.ppDsts[5] + 2 * TILE_Y_COL_WIDTH_BYTES; - ptrs.ppDsts[6] = startPtrs.ppDsts[6] + 2 * TILE_Y_COL_WIDTH_BYTES; - ptrs.ppDsts[7] = startPtrs.ppDsts[7] + 2 * TILE_Y_COL_WIDTH_BYTES; - } - } -}; - -////////////////////////////////////////////////////////////////////////// -/// StoreMacroTile - Stores a macro tile which consists of raster tiles. -////////////////////////////////////////////////////////////////////////// -template -struct StoreMacroTile -{ - ////////////////////////////////////////////////////////////////////////// - /// @brief Stores a macrotile to the destination surface using safe implementation. - /// @param pSrc - Pointer to macro tile. - /// @param pDstSurface - Destination surface state - /// @param x, y - Coordinates to macro tile - static void StoreGeneric( - uint8_t *pSrcHotTile, - SWR_SURFACE_STATE* pDstSurface, - uint32_t x, uint32_t y, uint32_t renderTargetArrayIndex) - { - // Store each raster tile from the hot tile to the destination surface. - for(uint32_t row = 0; row < KNOB_MACROTILE_Y_DIM; row += KNOB_TILE_Y_DIM) - { - for(uint32_t col = 0; col < KNOB_MACROTILE_X_DIM; col += KNOB_TILE_X_DIM) - { - for(uint32_t sampleNum = 0; sampleNum < pDstSurface->numSamples; sampleNum++) - { - StoreRasterTile::Store (pSrcHotTile, pDstSurface, (x + col), (y + row), sampleNum, - renderTargetArrayIndex); - pSrcHotTile += KNOB_TILE_X_DIM * KNOB_TILE_Y_DIM * (FormatTraits::bpp / 8); - } - } - } - } - - typedef void(*PFN_STORE_TILES_INTERNAL)(uint8_t*, SWR_SURFACE_STATE*, uint32_t, uint32_t, uint32_t, uint32_t); - ////////////////////////////////////////////////////////////////////////// - /// @brief Stores a macrotile to the destination surface. - /// @param pSrc - Pointer to macro tile. - /// @param pDstSurface - Destination surface state - /// @param x, y - Coordinates to macro tile - static void Store( - uint8_t *pSrcHotTile, - SWR_SURFACE_STATE* pDstSurface, - uint32_t x, uint32_t y, uint32_t renderTargetArrayIndex) - { - PFN_STORE_TILES_INTERNAL pfnStore[SWR_MAX_NUM_MULTISAMPLES]; - for(uint32_t sampleNum = 0; sampleNum < pDstSurface->numSamples; sampleNum++) - { - size_t dstSurfAddress = (size_t)ComputeSurfaceAddress( - 0, - 0, - pDstSurface->arrayIndex + renderTargetArrayIndex, // z for 3D surfaces - pDstSurface->arrayIndex + renderTargetArrayIndex, // array index for 2D arrays - sampleNum, - pDstSurface->lod, - pDstSurface); - - // Only support generic store-tile if lod surface doesn't start on a page boundary and is non-linear - bool bForceGeneric = ((pDstSurface->tileMode != SWR_TILE_NONE) && (0 != (dstSurfAddress & 0xfff))) || (pDstSurface->bInterleavedSamples); - - pfnStore[sampleNum] = (bForceGeneric || KNOB_USE_GENERIC_STORETILE) ? StoreRasterTile::Store : OptStoreRasterTile::Store; - } - - // Store each raster tile from the hot tile to the destination surface. - for(uint32_t row = 0; row < KNOB_MACROTILE_Y_DIM; row += KNOB_TILE_Y_DIM) - { - for(uint32_t col = 0; col < KNOB_MACROTILE_X_DIM; col += KNOB_TILE_X_DIM) - { - for(uint32_t sampleNum = 0; sampleNum < pDstSurface->numSamples; sampleNum++) - { - pfnStore[sampleNum](pSrcHotTile, pDstSurface, (x + col), (y + row), sampleNum, renderTargetArrayIndex); - pSrcHotTile += KNOB_TILE_X_DIM * KNOB_TILE_Y_DIM * (FormatTraits::bpp / 8); - } - } - } - } -}; +PFN_STORE_TILES sStoreTilesTableColor[SWR_TILE_MODE_COUNT][NUM_SWR_FORMATS] = {}; +PFN_STORE_TILES sStoreTilesTableDepth[SWR_TILE_MODE_COUNT][NUM_SWR_FORMATS] = {}; +PFN_STORE_TILES sStoreTilesTableStencil[SWR_TILE_MODE_COUNT][NUM_SWR_FORMATS] = {}; static void BUCKETS_START(UINT id) { @@ -1503,7 +58,7 @@ /// @param renderTargetIndex - Index to destination render target /// @param x, y - Coordinates to raster tile. /// @param pSrcHotTile - Pointer to Hot Tile -void StoreHotTile( +void StoreHotTileToSurface( SWR_SURFACE_STATE *pDstSurface, SWR_FORMAT srcFormat, SWR_RENDERTARGET_ATTACHMENT renderTargetIndex, @@ -1563,139 +118,6 @@ BUCKETS_STOP(sBuckets[pDstSurface->format]); } -////////////////////////////////////////////////////////////////////////// -/// InitStoreTilesTable - Helper for setting up the tables. -template -void InitStoreTilesTableColor( - PFN_STORE_TILES (&table)[NumTileModesT][ArraySizeT]) -{ - table[TileModeT][R32G32B32A32_FLOAT] = StoreMacroTile, R32G32B32A32_FLOAT, R32G32B32A32_FLOAT>::Store; - table[TileModeT][R32G32B32A32_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, R32G32B32A32_SINT>::Store; - table[TileModeT][R32G32B32A32_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R32G32B32A32_UINT>::Store; - table[TileModeT][R32G32B32X32_FLOAT] = StoreMacroTile, R32G32B32A32_FLOAT, R32G32B32X32_FLOAT>::Store; - table[TileModeT][R32G32B32_FLOAT] = StoreMacroTile, R32G32B32A32_FLOAT, R32G32B32_FLOAT>::Store; - table[TileModeT][R32G32B32_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, R32G32B32_SINT>::Store; - table[TileModeT][R32G32B32_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R32G32B32_UINT>::Store; - table[TileModeT][R16G16B16A16_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16A16_UNORM>::Store; - table[TileModeT][R16G16B16A16_SNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16A16_SNORM>::Store; - table[TileModeT][R16G16B16A16_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16A16_SINT>::Store; - table[TileModeT][R16G16B16A16_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16A16_UINT>::Store; - table[TileModeT][R16G16B16A16_FLOAT] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16A16_FLOAT>::Store; - table[TileModeT][R32G32_FLOAT] = StoreMacroTile, R32G32B32A32_FLOAT, R32G32_FLOAT>::Store; - table[TileModeT][R32G32_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, R32G32_SINT>::Store; - table[TileModeT][R32G32_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R32G32_UINT>::Store; - table[TileModeT][R16G16B16X16_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16X16_UNORM>::Store; - table[TileModeT][R16G16B16X16_FLOAT] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16X16_FLOAT>::Store; - table[TileModeT][B8G8R8A8_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, B8G8R8A8_UNORM>::Store; - table[TileModeT][B8G8R8A8_UNORM_SRGB] = StoreMacroTile, R32G32B32A32_FLOAT, B8G8R8A8_UNORM_SRGB>::Store; - - // 101010_2, 565, 555_1, and 444_4 formats force generic store tile for now - table[TileModeT][R10G10B10A2_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R10G10B10A2_UNORM>::StoreGeneric; - table[TileModeT][R10G10B10A2_UNORM_SRGB] = StoreMacroTile, R32G32B32A32_FLOAT, R10G10B10A2_UNORM_SRGB>::StoreGeneric; - table[TileModeT][R10G10B10A2_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R10G10B10A2_UINT>::StoreGeneric; - - table[TileModeT][R8G8B8A8_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8A8_UNORM>::Store; - table[TileModeT][R8G8B8A8_UNORM_SRGB] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8A8_UNORM_SRGB>::Store; - table[TileModeT][R8G8B8A8_SNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8A8_SNORM>::Store; - table[TileModeT][R8G8B8A8_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8A8_SINT>::Store; - table[TileModeT][R8G8B8A8_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8A8_UINT>::Store; - table[TileModeT][R16G16_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16_UNORM>::Store; - table[TileModeT][R16G16_SNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16_SNORM>::Store; - table[TileModeT][R16G16_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16_SINT>::Store; - table[TileModeT][R16G16_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16_UINT>::Store; - table[TileModeT][R16G16_FLOAT] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16_FLOAT>::Store; - - // 101010_2, 565, 555_1, and 444_4 formats force generic store tile for now - table[TileModeT][B10G10R10A2_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, B10G10R10A2_UNORM>::StoreGeneric; - table[TileModeT][B10G10R10A2_UNORM_SRGB] = StoreMacroTile, R32G32B32A32_FLOAT, B10G10R10A2_UNORM_SRGB>::StoreGeneric; - table[TileModeT][R11G11B10_FLOAT] = StoreMacroTile, R32G32B32A32_FLOAT, R11G11B10_FLOAT>::StoreGeneric; - - table[TileModeT][R32_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, R32_SINT>::Store; - table[TileModeT][R32_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R32_UINT>::Store; - table[TileModeT][R32_FLOAT] = StoreMacroTile, R32G32B32A32_FLOAT, R32_FLOAT>::Store; - table[TileModeT][A32_FLOAT] = StoreMacroTile, R32G32B32A32_FLOAT, A32_FLOAT>::Store; - table[TileModeT][B8G8R8X8_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, B8G8R8X8_UNORM>::Store; - table[TileModeT][B8G8R8X8_UNORM_SRGB] = StoreMacroTile, R32G32B32A32_FLOAT, B8G8R8X8_UNORM_SRGB>::Store; - table[TileModeT][R8G8B8X8_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8X8_UNORM>::Store; - table[TileModeT][R8G8B8X8_UNORM_SRGB] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8X8_UNORM_SRGB>::Store; - - // 101010_2, 565, 555_1, and 444_4 formats force generic store tile for now - table[TileModeT][B10G10R10X2_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, B10G10R10X2_UNORM>::StoreGeneric; - table[TileModeT][B5G6R5_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, B5G6R5_UNORM>::Store; - table[TileModeT][B5G6R5_UNORM_SRGB] = StoreMacroTile, R32G32B32A32_FLOAT, B5G6R5_UNORM_SRGB>::StoreGeneric; - table[TileModeT][B5G5R5A1_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, B5G5R5A1_UNORM>::StoreGeneric; - table[TileModeT][B5G5R5A1_UNORM_SRGB] = StoreMacroTile, R32G32B32A32_FLOAT, B5G5R5A1_UNORM_SRGB>::StoreGeneric; - table[TileModeT][B4G4R4A4_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, B4G4R4A4_UNORM>::StoreGeneric; - table[TileModeT][B4G4R4A4_UNORM_SRGB] = StoreMacroTile, R32G32B32A32_FLOAT, B4G4R4A4_UNORM_SRGB>::StoreGeneric; - - table[TileModeT][R8G8_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8_UNORM>::Store; - table[TileModeT][R8G8_SNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8_SNORM>::Store; - table[TileModeT][R8G8_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8_SINT>::Store; - table[TileModeT][R8G8_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8_UINT>::Store; - table[TileModeT][R16_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R16_UNORM>::Store; - table[TileModeT][R16_SNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R16_SNORM>::Store; - table[TileModeT][R16_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, R16_SINT>::Store; - table[TileModeT][R16_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R16_UINT>::Store; - table[TileModeT][R16_FLOAT] = StoreMacroTile, R32G32B32A32_FLOAT, R16_FLOAT>::Store; - table[TileModeT][A16_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, A16_UNORM>::Store; - table[TileModeT][A16_FLOAT] = StoreMacroTile, R32G32B32A32_FLOAT, A16_FLOAT>::Store; - - // 101010_2, 565, 555_1, and 444_4 formats force generic store tile for now - table[TileModeT][B5G5R5X1_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, B5G5R5X1_UNORM>::StoreGeneric; - table[TileModeT][B5G5R5X1_UNORM_SRGB] = StoreMacroTile, R32G32B32A32_FLOAT, B5G5R5X1_UNORM_SRGB>::StoreGeneric; - - table[TileModeT][R8_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R8_UNORM>::Store; - table[TileModeT][R8_SNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R8_SNORM>::Store; - table[TileModeT][R8_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, R8_SINT>::Store; - table[TileModeT][R8_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R8_UINT>::Store; - table[TileModeT][A8_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, A8_UNORM>::Store; - table[TileModeT][BC1_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, BC1_UNORM>::Store; - table[TileModeT][BC2_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, BC2_UNORM>::Store; - table[TileModeT][BC3_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, BC3_UNORM>::Store; - table[TileModeT][BC4_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, BC4_UNORM>::Store; - table[TileModeT][BC5_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, BC5_UNORM>::Store; - table[TileModeT][BC1_UNORM_SRGB] = StoreMacroTile, R32G32B32A32_FLOAT, BC1_UNORM_SRGB>::Store; - table[TileModeT][BC2_UNORM_SRGB] = StoreMacroTile, R32G32B32A32_FLOAT, BC2_UNORM_SRGB>::Store; - table[TileModeT][BC3_UNORM_SRGB] = StoreMacroTile, R32G32B32A32_FLOAT, BC3_UNORM_SRGB>::Store; - table[TileModeT][R8G8B8_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8_UNORM>::Store; - table[TileModeT][R8G8B8_SNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8_SNORM>::Store; - table[TileModeT][BC4_SNORM] = StoreMacroTile, R32G32B32A32_FLOAT, BC4_SNORM>::Store; - table[TileModeT][BC5_SNORM] = StoreMacroTile, R32G32B32A32_FLOAT, BC5_SNORM>::Store; - table[TileModeT][R16G16B16_FLOAT] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16_FLOAT>::Store; - table[TileModeT][R16G16B16_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16_UNORM>::Store; - table[TileModeT][R16G16B16_SNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16_SNORM>::Store; - table[TileModeT][R8G8B8_UNORM_SRGB] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8_UNORM_SRGB>::Store; - table[TileModeT][R16G16B16_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16_UINT>::Store; - table[TileModeT][R16G16B16_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16_SINT>::Store; - - // 101010_2, 565, 555_1, and 444_4 formats force generic store tile for now - table[TileModeT][R10G10B10A2_SNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R10G10B10A2_SNORM>::StoreGeneric; - table[TileModeT][R10G10B10A2_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, R10G10B10A2_SINT>::StoreGeneric; - table[TileModeT][B10G10R10A2_SNORM] = StoreMacroTile, R32G32B32A32_FLOAT, B10G10R10A2_SNORM>::StoreGeneric; - table[TileModeT][B10G10R10A2_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, B10G10R10A2_UINT>::StoreGeneric; - table[TileModeT][B10G10R10A2_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, B10G10R10A2_SINT>::StoreGeneric; - - table[TileModeT][R8G8B8_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8_UINT>::Store; - table[TileModeT][R8G8B8_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8_SINT>::Store; -} - -////////////////////////////////////////////////////////////////////////// -/// INIT_STORE_TILES_TABLE - Helper macro for setting up the tables. -template -void InitStoreTilesTableDepth( - PFN_STORE_TILES(&table)[NumTileModes][ArraySizeT]) -{ - table[TileModeT][R32_FLOAT] = StoreMacroTile, R32_FLOAT, R32_FLOAT>::Store; - table[TileModeT][R24_UNORM_X8_TYPELESS] = StoreMacroTile, R32_FLOAT, R24_UNORM_X8_TYPELESS>::Store; - table[TileModeT][R16_UNORM] = StoreMacroTile, R32_FLOAT, R16_UNORM>::Store; -} - -template -void InitStoreTilesTableStencil( - PFN_STORE_TILES(&table)[NumTileModes][ArraySizeT]) -{ - table[TileModeT][R8_UINT] = StoreMacroTile, R8_UINT, R8_UINT>::Store; -} ////////////////////////////////////////////////////////////////////////// /// @brief Sets up tables for StoreTile @@ -1704,16 +126,11 @@ memset(sStoreTilesTableColor, 0, sizeof(sStoreTilesTableColor)); memset(sStoreTilesTableDepth, 0, sizeof(sStoreTilesTableDepth)); - InitStoreTilesTableColor(sStoreTilesTableColor); - InitStoreTilesTableDepth(sStoreTilesTableDepth); - InitStoreTilesTableStencil(sStoreTilesTableStencil); - - InitStoreTilesTableColor(sStoreTilesTableColor); - InitStoreTilesTableColor(sStoreTilesTableColor); - - InitStoreTilesTableDepth(sStoreTilesTableDepth); - InitStoreTilesTableStencil(sStoreTilesTableStencil); - - // special color hot tile -> 8-bit WMAJOR - sStoreTilesTableColor[SWR_TILE_MODE_WMAJOR][R8_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R8_UINT>::Store; + InitStoreTilesTable_Linear_1(); + InitStoreTilesTable_Linear_2(); + InitStoreTilesTable_TileX_1(); + InitStoreTilesTable_TileX_2(); + InitStoreTilesTable_TileY_1(); + InitStoreTilesTable_TileY_2(); + InitStoreTilesTable_TileW(); } diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/StoreTile.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/StoreTile.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/StoreTile.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/StoreTile.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,2492 @@ +/**************************************************************************** +* Copyright (C) 2014-2016 Intel Corporation. All Rights Reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice (including the next +* paragraph) shall be included in all copies or substantial portions of the +* Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +* IN THE SOFTWARE. +* +* @file StoreTile.h +* +* @brief Functionality for Store. +* +******************************************************************************/ +#pragma once + +#include "common/os.h" +#include "common/formats.h" +#include "core/context.h" +#include "core/rdtsc_core.h" +#include "core/format_conversion.h" + +#include "memory/TilingFunctions.h" +#include "memory/Convert.h" +#include "core/multisample.h" + +#include +#include + +// Function pointer to different storing functions for color, depth, and stencil based on incoming formats. +typedef void(*PFN_STORE_TILES)(uint8_t*, SWR_SURFACE_STATE*, uint32_t, uint32_t, uint32_t); + +////////////////////////////////////////////////////////////////////////// +/// Store Raster Tile Function Tables. +////////////////////////////////////////////////////////////////////////// +extern PFN_STORE_TILES sStoreTilesTableColor[SWR_TILE_MODE_COUNT][NUM_SWR_FORMATS]; +extern PFN_STORE_TILES sStoreTilesTableDepth[SWR_TILE_MODE_COUNT][NUM_SWR_FORMATS]; +extern PFN_STORE_TILES sStoreTilesTableStencil[SWR_TILE_MODE_COUNT][NUM_SWR_FORMATS]; + +void InitStoreTilesTable_Linear_1(); +void InitStoreTilesTable_Linear_2(); +void InitStoreTilesTable_TileX_1(); +void InitStoreTilesTable_TileX_2(); +void InitStoreTilesTable_TileY_1(); +void InitStoreTilesTable_TileY_2(); +void InitStoreTilesTable_TileW(); +void InitStoreTilesTable(); + +////////////////////////////////////////////////////////////////////////// +/// StorePixels +/// @brief Stores a 4x2 (AVX) raster-tile to two rows. +/// @param pSrc - Pointer to source raster tile in SWRZ pixel order +/// @param ppDsts - Array of destination pointers. Each pointer is +/// to a single row of at most 16B. +/// @tparam NumDests - Number of destination pointers. Each pair of +/// pointers is for a 16-byte column of two rows. +////////////////////////////////////////////////////////////////////////// +template +struct StorePixels +{ + static void Store(const uint8_t* pSrc, uint8_t* (&ppDsts)[NumDests]) = delete; +}; + +////////////////////////////////////////////////////////////////////////// +/// StorePixels (32-bit pixel specialization) +/// @brief Stores a 4x2 (AVX) raster-tile to two rows. +/// @param pSrc - Pointer to source raster tile in SWRZ pixel order +/// @param ppDsts - Array of destination pointers. Each pointer is +/// to a single row of at most 16B. +/// @tparam NumDests - Number of destination pointers. Each pair of +/// pointers is for a 16-byte column of two rows. +////////////////////////////////////////////////////////////////////////// +template <> +struct StorePixels<8, 2> +{ + static void Store(const uint8_t* pSrc, uint8_t* (&ppDsts)[2]) + { + // Each 4-pixel row is 4 bytes. + const uint16_t* pPixSrc = (const uint16_t*)pSrc; + + // Unswizzle from SWR-Z order + uint16_t* pRow = (uint16_t*)ppDsts[0]; + pRow[0] = pPixSrc[0]; + pRow[1] = pPixSrc[2]; + + pRow = (uint16_t*)ppDsts[1]; + pRow[0] = pPixSrc[1]; + pRow[1] = pPixSrc[3]; + } +}; + +#if USE_8x2_TILE_BACKEND +template <> +struct StorePixels<8, 4> +{ + static void Store(const uint8_t* pSrc, uint8_t* (&ppDsts)[4]) + { + // 8 x 2 bytes = 16 bytes, 16 pixels + const uint16_t *pSrc16 = reinterpret_cast(pSrc); + + uint16_t **ppDsts16 = reinterpret_cast(ppDsts); + + // Unswizzle from SWR-Z order + ppDsts16[0][0] = pSrc16[0]; // 0 1 + ppDsts16[0][1] = pSrc16[2]; // 4 5 + + ppDsts16[1][0] = pSrc16[1]; // 2 3 + ppDsts16[1][1] = pSrc16[3]; // 6 7 + + ppDsts16[2][0] = pSrc16[4]; // 8 9 + ppDsts16[2][1] = pSrc16[6]; // C D + + ppDsts16[3][0] = pSrc16[5]; // A B + ppDsts16[3][1] = pSrc16[7]; // E F + } +}; + +#endif +////////////////////////////////////////////////////////////////////////// +/// StorePixels (32-bit pixel specialization) +/// @brief Stores a 4x2 (AVX) raster-tile to two rows. +/// @param pSrc - Pointer to source raster tile in SWRZ pixel order +/// @param ppDsts - Array of destination pointers. Each pointer is +/// to a single row of at most 16B. +/// @tparam NumDests - Number of destination pointers. Each pair of +/// pointers is for a 16-byte column of two rows. +////////////////////////////////////////////////////////////////////////// +template <> +struct StorePixels<16, 2> +{ + static void Store(const uint8_t* pSrc, uint8_t* (&ppDsts)[2]) + { + // Each 4-pixel row is 8 bytes. + const uint32_t* pPixSrc = (const uint32_t*)pSrc; + + // Unswizzle from SWR-Z order + uint32_t* pRow = (uint32_t*)ppDsts[0]; + pRow[0] = pPixSrc[0]; + pRow[1] = pPixSrc[2]; + + pRow = (uint32_t*)ppDsts[1]; + pRow[0] = pPixSrc[1]; + pRow[1] = pPixSrc[3]; + } +}; + +#if USE_8x2_TILE_BACKEND +template <> +struct StorePixels<16, 4> +{ + static void Store(const uint8_t* pSrc, uint8_t* (&ppDsts)[4]) + { + // 8 x 4 bytes = 32 bytes, 16 pixels + const uint32_t *pSrc32 = reinterpret_cast(pSrc); + + uint32_t **ppDsts32 = reinterpret_cast(ppDsts); + + // Unswizzle from SWR-Z order + ppDsts32[0][0] = pSrc32[0]; // 0 1 + ppDsts32[0][1] = pSrc32[2]; // 4 5 + + ppDsts32[1][0] = pSrc32[1]; // 2 3 + ppDsts32[1][1] = pSrc32[3]; // 6 7 + + ppDsts32[2][0] = pSrc32[4]; // 8 9 + ppDsts32[2][1] = pSrc32[6]; // C D + + ppDsts32[3][0] = pSrc32[5]; // A B + ppDsts32[3][1] = pSrc32[7]; // E F + } +}; + +#endif +////////////////////////////////////////////////////////////////////////// +/// StorePixels (32-bit pixel specialization) +/// @brief Stores a 4x2 (AVX) raster-tile to two rows. +/// @param pSrc - Pointer to source raster tile in SWRZ pixel order +/// @param ppDsts - Array of destination pointers. Each pointer is +/// to a single row of at most 16B. +/// @tparam NumDests - Number of destination pointers. Each pair of +/// pointers is for a 16-byte column of two rows. +////////////////////////////////////////////////////////////////////////// +template <> +struct StorePixels<32, 2> +{ + static void Store(const uint8_t* pSrc, uint8_t* (&ppDsts)[2]) + { + // Each 4-pixel row is 16-bytes + __m128i *pZRow01 = (__m128i*)pSrc; + __m128i vQuad00 = _mm_load_si128(pZRow01); + __m128i vQuad01 = _mm_load_si128(pZRow01 + 1); + + __m128i vRow00 = _mm_unpacklo_epi64(vQuad00, vQuad01); + __m128i vRow10 = _mm_unpackhi_epi64(vQuad00, vQuad01); + + _mm_storeu_si128((__m128i*)ppDsts[0], vRow00); + _mm_storeu_si128((__m128i*)ppDsts[1], vRow10); + } +}; + +#if USE_8x2_TILE_BACKEND +template <> +struct StorePixels<32, 4> +{ + static void Store(const uint8_t* pSrc, uint8_t* (&ppDsts)[4]) + { + // 4 x 16 bytes = 64 bytes, 16 pixels + const __m128i *pSrc128 = reinterpret_cast(pSrc); + + __m128i **ppDsts128 = reinterpret_cast<__m128i **>(ppDsts); + + // Unswizzle from SWR-Z order + __m128i quad0 = _mm_load_si128(&pSrc128[0]); // 0 1 2 3 + __m128i quad1 = _mm_load_si128(&pSrc128[1]); // 4 5 6 7 + __m128i quad2 = _mm_load_si128(&pSrc128[2]); // 8 9 A B + __m128i quad3 = _mm_load_si128(&pSrc128[3]); // C D E F + + _mm_storeu_si128(ppDsts128[0], _mm_unpacklo_epi64(quad0, quad1)); // 0 1 4 5 + _mm_storeu_si128(ppDsts128[1], _mm_unpackhi_epi64(quad0, quad1)); // 2 3 6 7 + _mm_storeu_si128(ppDsts128[2], _mm_unpacklo_epi64(quad2, quad3)); // 8 9 C D + _mm_storeu_si128(ppDsts128[3], _mm_unpackhi_epi64(quad2, quad3)); // A B E F + } +}; + +#endif +////////////////////////////////////////////////////////////////////////// +/// StorePixels (32-bit pixel specialization) +/// @brief Stores a 4x2 (AVX) raster-tile to two rows. +/// @param pSrc - Pointer to source raster tile in SWRZ pixel order +/// @param ppDsts - Array of destination pointers. Each pointer is +/// to a single row of at most 16B. +/// @tparam NumDests - Number of destination pointers. Each pair of +/// pointers is for a 16-byte column of two rows. +////////////////////////////////////////////////////////////////////////// +template <> +struct StorePixels<64, 4> +{ + static void Store(const uint8_t* pSrc, uint8_t* (&ppDsts)[4]) + { + // Each 4-pixel row is 32 bytes. + const __m128i* pPixSrc = (const __m128i*)pSrc; + + // order of pointers match SWR-Z layout + __m128i** pvDsts = (__m128i**)&ppDsts[0]; + *pvDsts[0] = pPixSrc[0]; + *pvDsts[1] = pPixSrc[1]; + *pvDsts[2] = pPixSrc[2]; + *pvDsts[3] = pPixSrc[3]; + } +}; + +#if USE_8x2_TILE_BACKEND +template <> +struct StorePixels<64, 8> +{ + static void Store(const uint8_t* pSrc, uint8_t* (&ppDsts)[8]) + { + // 8 x 16 bytes = 128 bytes, 16 pixels + const __m128i *pSrc128 = reinterpret_cast(pSrc); + + __m128i **ppDsts128 = reinterpret_cast<__m128i **>(ppDsts); + + // order of pointers match SWR-Z layout + *ppDsts128[0] = pSrc128[0]; // 0 1 + *ppDsts128[1] = pSrc128[1]; // 2 3 + *ppDsts128[2] = pSrc128[2]; // 4 5 + *ppDsts128[3] = pSrc128[3]; // 6 7 + *ppDsts128[4] = pSrc128[4]; // 8 9 + *ppDsts128[5] = pSrc128[5]; // A B + *ppDsts128[6] = pSrc128[6]; // C D + *ppDsts128[7] = pSrc128[7]; // E F + } +}; + +#endif +////////////////////////////////////////////////////////////////////////// +/// StorePixels (32-bit pixel specialization) +/// @brief Stores a 4x2 (AVX) raster-tile to two rows. +/// @param pSrc - Pointer to source raster tile in SWRZ pixel order +/// @param ppDsts - Array of destination pointers. Each pointer is +/// to a single row of at most 16B. +/// @tparam NumDests - Number of destination pointers. Each pair of +/// pointers is for a 16-byte column of two rows. +////////////////////////////////////////////////////////////////////////// +template <> +struct StorePixels<128, 8> +{ + static void Store(const uint8_t* pSrc, uint8_t* (&ppDsts)[8]) + { + // Each 4-pixel row is 64 bytes. + const __m128i* pPixSrc = (const __m128i*)pSrc; + + // Unswizzle from SWR-Z order + __m128i** pvDsts = (__m128i**)&ppDsts[0]; + *pvDsts[0] = pPixSrc[0]; + *pvDsts[1] = pPixSrc[2]; + *pvDsts[2] = pPixSrc[1]; + *pvDsts[3] = pPixSrc[3]; + *pvDsts[4] = pPixSrc[4]; + *pvDsts[5] = pPixSrc[6]; + *pvDsts[6] = pPixSrc[5]; + *pvDsts[7] = pPixSrc[7]; + } +}; + +#if USE_8x2_TILE_BACKEND +template <> +struct StorePixels<128, 16> +{ + static void Store(const uint8_t* pSrc, uint8_t* (&ppDsts)[16]) + { + // 16 x 16 bytes = 256 bytes, 16 pixels + const __m128i *pSrc128 = reinterpret_cast(pSrc); + + __m128i **ppDsts128 = reinterpret_cast<__m128i **>(ppDsts); + + for (uint32_t i = 0; i < 16; i += 4) + { + *ppDsts128[i + 0] = pSrc128[i + 0]; + *ppDsts128[i + 1] = pSrc128[i + 2]; + *ppDsts128[i + 2] = pSrc128[i + 1]; + *ppDsts128[i + 3] = pSrc128[i + 3]; + } + } +}; + +#endif +////////////////////////////////////////////////////////////////////////// +/// ConvertPixelsSOAtoAOS - Conversion for SIMD pixel (4x2 or 2x2) +////////////////////////////////////////////////////////////////////////// +template +struct ConvertPixelsSOAtoAOS +{ + ////////////////////////////////////////////////////////////////////////// + /// @brief Converts a SIMD from the Hot Tile to the destination format + /// and converts from SOA to AOS. + /// @param pSrc - Pointer to raster tile. + /// @param pDst - Pointer to destination surface or deswizzling buffer. + template + INLINE static void Convert(const uint8_t* pSrc, uint8_t* (&ppDsts)[NumDests]) + { +#if USE_8x2_TILE_BACKEND + static const uint32_t MAX_RASTER_TILE_BYTES = 16 * 16; // 16 pixels * 16 bytes per pixel + + OSALIGNSIMD16(uint8_t) soaTile[MAX_RASTER_TILE_BYTES]; + OSALIGNSIMD16(uint8_t) aosTile[MAX_RASTER_TILE_BYTES]; + + // Convert from SrcFormat --> DstFormat + simd16vector src; + LoadSOA(pSrc, src); + StoreSOA(src, soaTile); + + // Convert from SOA --> AOS + FormatTraits::TransposeT::Transpose_16(soaTile, aosTile); + +#else + static const uint32_t MAX_RASTER_TILE_BYTES = 128; // 8 pixels * 16 bytes per pixel + + OSALIGNSIMD(uint8_t) soaTile[MAX_RASTER_TILE_BYTES]; + OSALIGNSIMD(uint8_t) aosTile[MAX_RASTER_TILE_BYTES]; + + // Convert from SrcFormat --> DstFormat + simdvector src; + LoadSOA(pSrc, src); + StoreSOA(src, soaTile); + + // Convert from SOA --> AOS + FormatTraits::TransposeT::Transpose(soaTile, aosTile); + +#endif + // Store data into destination + StorePixels::bpp, NumDests>::Store(aosTile, ppDsts); + } +}; + +////////////////////////////////////////////////////////////////////////// +/// ConvertPixelsSOAtoAOS - Conversion for SIMD pixel (4x2 or 2x2) +/// Specialization for no format conversion +////////////////////////////////////////////////////////////////////////// +template +struct ConvertPixelsSOAtoAOS +{ + ////////////////////////////////////////////////////////////////////////// + /// @brief Converts a SIMD from the Hot Tile to the destination format + /// and converts from SOA to AOS. + /// @param pSrc - Pointer to raster tile. + /// @param pDst - Pointer to destination surface or deswizzling buffer. + template + INLINE static void Convert(const uint8_t* pSrc, uint8_t* (&ppDsts)[NumDests]) + { +#if USE_8x2_TILE_BACKEND + static const uint32_t MAX_RASTER_TILE_BYTES = 16 * 16; // 16 pixels * 16 bytes per pixel + + OSALIGNSIMD16(uint8_t) aosTile[MAX_RASTER_TILE_BYTES]; + + // Convert from SOA --> AOS + FormatTraits::TransposeT::Transpose_16(pSrc, aosTile); + +#else + static const uint32_t MAX_RASTER_TILE_BYTES = 128; // 8 pixels * 16 bytes per pixel + + OSALIGNSIMD(uint8_t) aosTile[MAX_RASTER_TILE_BYTES]; + + // Convert from SOA --> AOS + FormatTraits::TransposeT::Transpose(pSrc, aosTile); + +#endif + // Store data into destination + StorePixels::bpp, NumDests>::Store(aosTile, ppDsts); + } +}; + +////////////////////////////////////////////////////////////////////////// +/// ConvertPixelsSOAtoAOS - Specialization conversion for B5G6R6_UNORM +////////////////////////////////////////////////////////////////////////// +template<> +struct ConvertPixelsSOAtoAOS < R32G32B32A32_FLOAT, B5G6R5_UNORM > +{ + ////////////////////////////////////////////////////////////////////////// + /// @brief Converts a SIMD from the Hot Tile to the destination format + /// and converts from SOA to AOS. + /// @param pSrc - Pointer to raster tile. + /// @param pDst - Pointer to destination surface or deswizzling buffer. + template + INLINE static void Convert(const uint8_t* pSrc, uint8_t* (&ppDsts)[NumDests]) + { +#if USE_8x2_TILE_BACKEND + static const SWR_FORMAT SrcFormat = R32G32B32A32_FLOAT; + static const SWR_FORMAT DstFormat = B5G6R5_UNORM; + + static const uint32_t MAX_RASTER_TILE_BYTES = 16 * 16; // 16 pixels * 16 bytes per pixel + + OSALIGNSIMD16(uint8_t) aosTile[MAX_RASTER_TILE_BYTES]; + + // Load hot-tile + simd16vector src, dst; + LoadSOA(pSrc, src); + + // deswizzle + dst.x = src[FormatTraits::swizzle(0)]; + dst.y = src[FormatTraits::swizzle(1)]; + dst.z = src[FormatTraits::swizzle(2)]; + + // clamp + dst.x = Clamp(dst.x, 0); + dst.y = Clamp(dst.y, 1); + dst.z = Clamp(dst.z, 2); + + // normalize + dst.x = Normalize(dst.x, 0); + dst.y = Normalize(dst.y, 1); + dst.z = Normalize(dst.z, 2); + + // pack + simd16scalari packed = _simd16_castps_si(dst.x); + + SWR_ASSERT(FormatTraits::GetBPC(0) == 5); + SWR_ASSERT(FormatTraits::GetBPC(1) == 6); + + packed = _simd16_or_si(packed, _simd16_slli_epi32(_simd16_castps_si(dst.y), 5)); + packed = _simd16_or_si(packed, _simd16_slli_epi32(_simd16_castps_si(dst.z), 5 + 6)); + + // pack low 16 bits of each 32 bit lane to low 128 bits of dst + uint32_t *pPacked = (uint32_t*)&packed; + uint16_t *pAosTile = (uint16_t*)&aosTile[0]; + for (uint32_t t = 0; t < KNOB_SIMD16_WIDTH; ++t) + { + *pAosTile++ = *pPacked++; + } + +#else + static const SWR_FORMAT SrcFormat = R32G32B32A32_FLOAT; + static const SWR_FORMAT DstFormat = B5G6R5_UNORM; + static const uint32_t MAX_RASTER_TILE_BYTES = 128; // 8 pixels * 16 bytes per pixel + + OSALIGNSIMD(uint8_t) aosTile[MAX_RASTER_TILE_BYTES]; + + // Load hot-tile + simdvector src, dst; + LoadSOA(pSrc, src); + + // deswizzle + dst.x = src[FormatTraits::swizzle(0)]; + dst.y = src[FormatTraits::swizzle(1)]; + dst.z = src[FormatTraits::swizzle(2)]; + + // clamp + dst.x = Clamp(dst.x, 0); + dst.y = Clamp(dst.y, 1); + dst.z = Clamp(dst.z, 2); + + // normalize + dst.x = Normalize(dst.x, 0); + dst.y = Normalize(dst.y, 1); + dst.z = Normalize(dst.z, 2); + + // pack + simdscalari packed = _simd_castps_si(dst.x); + packed = _simd_or_si(packed, _simd_slli_epi32(_simd_castps_si(dst.y), FormatTraits::GetBPC(0))); + packed = _simd_or_si(packed, _simd_slli_epi32(_simd_castps_si(dst.z), FormatTraits::GetBPC(0) + + FormatTraits::GetBPC(1))); + + // pack low 16 bits of each 32 bit lane to low 128 bits of dst + uint32_t *pPacked = (uint32_t*)&packed; + uint16_t *pAosTile = (uint16_t*)&aosTile[0]; + for (uint32_t t = 0; t < KNOB_SIMD_WIDTH; ++t) + { + *pAosTile++ = *pPacked++; + } + +#endif + // Store data into destination + StorePixels::bpp, NumDests>::Store(aosTile, ppDsts); + } +}; + +////////////////////////////////////////////////////////////////////////// +/// ConvertPixelsSOAtoAOS - Conversion for SIMD pixel (4x2 or 2x2) +////////////////////////////////////////////////////////////////////////// +template<> +struct ConvertPixelsSOAtoAOS +{ + static const SWR_FORMAT SrcFormat = R32_FLOAT; + static const SWR_FORMAT DstFormat = R24_UNORM_X8_TYPELESS; + + ////////////////////////////////////////////////////////////////////////// + /// @brief Converts a SIMD from the Hot Tile to the destination format + /// and converts from SOA to AOS. + /// @param pSrc - Pointer to raster tile. + /// @param pDst - Pointer to destination surface or deswizzling buffer. + template + INLINE static void Convert(const uint8_t* pSrc, uint8_t* (&ppDsts)[NumDests]) + { +#if USE_8x2_TILE_BACKEND + simd16scalar comp = _simd16_load_ps(reinterpret_cast(pSrc)); + + // clamp + const simd16scalar zero = _simd16_setzero_ps(); + const simd16scalar ones = _simd16_set1_ps(1.0f); + + comp = _simd16_max_ps(comp, zero); + comp = _simd16_min_ps(comp, ones); + + // normalize + comp = _simd16_mul_ps(comp, _simd16_set1_ps(FormatTraits::fromFloat(0))); + + simd16scalari temp = _simd16_cvtps_epi32(comp); + + // swizzle + temp = _simd16_permute_epi32(temp, _simd16_set_epi32(15, 14, 11, 10, 13, 12, 9, 8, 7, 6, 3, 2, 5, 4, 1, 0)); + + // merge/store data into destination but don't overwrite the X8 bits + simdscalari destlo = _simd_loadu2_si(reinterpret_cast<__m128i *>(ppDsts[1]), reinterpret_cast<__m128i *>(ppDsts[0])); + simdscalari desthi = _simd_loadu2_si(reinterpret_cast<__m128i *>(ppDsts[3]), reinterpret_cast<__m128i *>(ppDsts[2])); + + simd16scalari dest = _simd16_setzero_si(); + + dest = _simd16_insert_si(dest, destlo, 0); + dest = _simd16_insert_si(dest, desthi, 1); + + simd16scalari mask = _simd16_set1_epi32(0x00FFFFFF); + + dest = _simd16_or_si(_simd16_andnot_si(mask, dest), _simd16_and_si(mask, temp)); + + _simd_storeu2_si(reinterpret_cast<__m128i *>(ppDsts[1]), reinterpret_cast<__m128i *>(ppDsts[0]), _simd16_extract_si(dest, 0)); + _simd_storeu2_si(reinterpret_cast<__m128i *>(ppDsts[3]), reinterpret_cast<__m128i *>(ppDsts[2]), _simd16_extract_si(dest, 1)); +#else + static const uint32_t MAX_RASTER_TILE_BYTES = 128; // 8 pixels * 16 bytes per pixel + + OSALIGNSIMD(uint8_t) soaTile[MAX_RASTER_TILE_BYTES]; + OSALIGNSIMD(uint8_t) aosTile[MAX_RASTER_TILE_BYTES]; + + // Convert from SrcFormat --> DstFormat + simdvector src; + LoadSOA(pSrc, src); + StoreSOA(src, soaTile); + + // Convert from SOA --> AOS + FormatTraits::TransposeT::Transpose(soaTile, aosTile); + + // Store data into destination but don't overwrite the X8 bits + // Each 4-pixel row is 16-bytes + __m128i *pZRow01 = (__m128i*)aosTile; + __m128i vQuad00 = _mm_load_si128(pZRow01); + __m128i vQuad01 = _mm_load_si128(pZRow01 + 1); + + __m128i vRow00 = _mm_unpacklo_epi64(vQuad00, vQuad01); + __m128i vRow10 = _mm_unpackhi_epi64(vQuad00, vQuad01); + + __m128i vDst0 = _mm_loadu_si128((const __m128i*)ppDsts[0]); + __m128i vDst1 = _mm_loadu_si128((const __m128i*)ppDsts[1]); + + __m128i vMask = _mm_set1_epi32(0xFFFFFF); + + vDst0 = _mm_andnot_si128(vMask, vDst0); + vDst0 = _mm_or_si128(vDst0, _mm_and_si128(vRow00, vMask)); + vDst1 = _mm_andnot_si128(vMask, vDst1); + vDst1 = _mm_or_si128(vDst1, _mm_and_si128(vRow10, vMask)); + + _mm_storeu_si128((__m128i*)ppDsts[0], vDst0); + _mm_storeu_si128((__m128i*)ppDsts[1], vDst1); +#endif + } +}; + +#if USE_8x2_TILE_BACKEND +template +INLINE static void FlatConvert(const uint8_t* pSrc, uint8_t* pDst0, uint8_t* pDst1, uint8_t* pDst2, uint8_t* pDst3) +{ + // swizzle rgba -> bgra while we load + simd16scalar comp0 = _simd16_load_ps(reinterpret_cast(pSrc + FormatTraits::swizzle(0) * sizeof(simd16scalar))); // float32 rrrrrrrrrrrrrrrr + simd16scalar comp1 = _simd16_load_ps(reinterpret_cast(pSrc + FormatTraits::swizzle(1) * sizeof(simd16scalar))); // float32 gggggggggggggggg + simd16scalar comp2 = _simd16_load_ps(reinterpret_cast(pSrc + FormatTraits::swizzle(2) * sizeof(simd16scalar))); // float32 bbbbbbbbbbbbbbbb + simd16scalar comp3 = _simd16_load_ps(reinterpret_cast(pSrc + FormatTraits::swizzle(3) * sizeof(simd16scalar))); // float32 aaaaaaaaaaaaaaaa + + // clamp + const simd16scalar zero = _simd16_setzero_ps(); + const simd16scalar ones = _simd16_set1_ps(1.0f); + + comp0 = _simd16_max_ps(comp0, zero); + comp0 = _simd16_min_ps(comp0, ones); + + comp1 = _simd16_max_ps(comp1, zero); + comp1 = _simd16_min_ps(comp1, ones); + + comp2 = _simd16_max_ps(comp2, zero); + comp2 = _simd16_min_ps(comp2, ones); + + comp3 = _simd16_max_ps(comp3, zero); + comp3 = _simd16_min_ps(comp3, ones); + + // gamma-correct only rgb + if (FormatTraits::isSRGB) + { + comp0 = FormatTraits::convertSrgb(0, comp0); + comp1 = FormatTraits::convertSrgb(1, comp1); + comp2 = FormatTraits::convertSrgb(2, comp2); + } + + // convert float components from 0.0f..1.0f to correct scale for 0..255 dest format + comp0 = _simd16_mul_ps(comp0, _simd16_set1_ps(FormatTraits::fromFloat(0))); + comp1 = _simd16_mul_ps(comp1, _simd16_set1_ps(FormatTraits::fromFloat(1))); + comp2 = _simd16_mul_ps(comp2, _simd16_set1_ps(FormatTraits::fromFloat(2))); + comp3 = _simd16_mul_ps(comp3, _simd16_set1_ps(FormatTraits::fromFloat(3))); + + // moving to 16 wide integer vector types + simd16scalari src0 = _simd16_cvtps_epi32(comp0); // padded byte rrrrrrrrrrrrrrrr + simd16scalari src1 = _simd16_cvtps_epi32(comp1); // padded byte gggggggggggggggg + simd16scalari src2 = _simd16_cvtps_epi32(comp2); // padded byte bbbbbbbbbbbbbbbb + simd16scalari src3 = _simd16_cvtps_epi32(comp3); // padded byte aaaaaaaaaaaaaaaa + + // SOA to AOS conversion + src1 = _simd16_slli_epi32(src1, 8); + src2 = _simd16_slli_epi32(src2, 16); + src3 = _simd16_slli_epi32(src3, 24); + + simd16scalari final = _simd16_or_si(_simd16_or_si(src0, src1), _simd16_or_si(src2, src3)); // 0 1 2 3 4 5 6 7 8 9 A B C D E F + + // de-swizzle conversion +#if 1 + simd16scalari final0 = _simd16_permute2f128_si(final, final, 0xA0); // (2, 2, 0, 0) // 0 1 2 3 0 1 2 3 8 9 A B 8 9 A B + simd16scalari final1 = _simd16_permute2f128_si(final, final, 0xF5); // (3, 3, 1, 1) // 4 5 6 7 4 5 6 7 C D E F C D E F + + final = _simd16_shuffle_epi64(final0, final1, 0xCC); // (1 1 0 0 1 1 0 0) // 0 1 4 5 2 3 6 7 8 9 C D A B E F + +#else + final = _simd16_permute_epi32(final, _simd16_set_epi32(15, 14, 11, 10, 13, 12, 9, 8, 7, 6, 3, 2, 5, 4, 1, 0)); + +#endif + // store 8x2 memory order: + // row0: [ pDst0, pDst2 ] = { 0 1 4 5 }, { 8 9 C D } + // row1: [ pDst1, pDst3 ] = { 2 3 6 7 }, { A B E F } + _simd_storeu2_si(reinterpret_cast<__m128i *>(pDst1), reinterpret_cast<__m128i *>(pDst0), _simd16_extract_si(final, 0)); + _simd_storeu2_si(reinterpret_cast<__m128i *>(pDst3), reinterpret_cast<__m128i *>(pDst2), _simd16_extract_si(final, 1)); +} + +#endif +template +INLINE static void FlatConvert(const uint8_t* pSrc, uint8_t* pDst, uint8_t* pDst1) +{ + static const uint32_t offset = sizeof(simdscalar); + + // swizzle rgba -> bgra while we load + simdscalar vComp0 = _simd_load_ps((const float*)(pSrc + (FormatTraits::swizzle(0))*offset)); // float32 rrrrrrrr + simdscalar vComp1 = _simd_load_ps((const float*)(pSrc + (FormatTraits::swizzle(1))*offset)); // float32 gggggggg + simdscalar vComp2 = _simd_load_ps((const float*)(pSrc + (FormatTraits::swizzle(2))*offset)); // float32 bbbbbbbb + simdscalar vComp3 = _simd_load_ps((const float*)(pSrc + (FormatTraits::swizzle(3))*offset)); // float32 aaaaaaaa + + // clamp + vComp0 = _simd_max_ps(vComp0, _simd_setzero_ps()); + vComp0 = _simd_min_ps(vComp0, _simd_set1_ps(1.0f)); + + vComp1 = _simd_max_ps(vComp1, _simd_setzero_ps()); + vComp1 = _simd_min_ps(vComp1, _simd_set1_ps(1.0f)); + + vComp2 = _simd_max_ps(vComp2, _simd_setzero_ps()); + vComp2 = _simd_min_ps(vComp2, _simd_set1_ps(1.0f)); + + vComp3 = _simd_max_ps(vComp3, _simd_setzero_ps()); + vComp3 = _simd_min_ps(vComp3, _simd_set1_ps(1.0f)); + + if (FormatTraits::isSRGB) + { + // Gamma-correct only rgb + vComp0 = FormatTraits::convertSrgb(0, vComp0); + vComp1 = FormatTraits::convertSrgb(1, vComp1); + vComp2 = FormatTraits::convertSrgb(2, vComp2); + } + + // convert float components from 0.0f .. 1.0f to correct scale for 0 .. 255 dest format + vComp0 = _simd_mul_ps(vComp0, _simd_set1_ps(FormatTraits::fromFloat(0))); + vComp1 = _simd_mul_ps(vComp1, _simd_set1_ps(FormatTraits::fromFloat(1))); + vComp2 = _simd_mul_ps(vComp2, _simd_set1_ps(FormatTraits::fromFloat(2))); + vComp3 = _simd_mul_ps(vComp3, _simd_set1_ps(FormatTraits::fromFloat(3))); + + // moving to 8 wide integer vector types + __m256i src0 = _simd_cvtps_epi32(vComp0); // padded byte rrrrrrrr + __m256i src1 = _simd_cvtps_epi32(vComp1); // padded byte gggggggg + __m256i src2 = _simd_cvtps_epi32(vComp2); // padded byte bbbbbbbb + __m256i src3 = _simd_cvtps_epi32(vComp3); // padded byte aaaaaaaa + +#if KNOB_ARCH == KNOB_ARCH_AVX + + // splitting into two sets of 4 wide integer vector types + // because AVX doesn't have instructions to support this operation at 8 wide + __m128i srcLo0 = _mm256_castsi256_si128(src0); // 000r000r000r000r + __m128i srcLo1 = _mm256_castsi256_si128(src1); // 000g000g000g000g + __m128i srcLo2 = _mm256_castsi256_si128(src2); // 000b000b000b000b + __m128i srcLo3 = _mm256_castsi256_si128(src3); // 000a000a000a000a + + __m128i srcHi0 = _mm256_extractf128_si256(src0, 1); // 000r000r000r000r + __m128i srcHi1 = _mm256_extractf128_si256(src1, 1); // 000g000g000g000g + __m128i srcHi2 = _mm256_extractf128_si256(src2, 1); // 000b000b000b000b + __m128i srcHi3 = _mm256_extractf128_si256(src3, 1); // 000a000a000a000a + + srcLo1 = _mm_slli_si128(srcLo1, 1); // 00g000g000g000g0 + srcHi1 = _mm_slli_si128(srcHi1, 1); // 00g000g000g000g0 + srcLo2 = _mm_slli_si128(srcLo2, 2); // 0b000b000b000b00 + srcHi2 = _mm_slli_si128(srcHi2, 2); // 0b000b000b000b00 + srcLo3 = _mm_slli_si128(srcLo3, 3); // a000a000a000a000 + srcHi3 = _mm_slli_si128(srcHi3, 3); // a000a000a000a000 + + srcLo0 = _mm_or_si128(srcLo0, srcLo1); // 00gr00gr00gr00gr + srcLo2 = _mm_or_si128(srcLo2, srcLo3); // ab00ab00ab00ab00 + + srcHi0 = _mm_or_si128(srcHi0, srcHi1); // 00gr00gr00gr00gr + srcHi2 = _mm_or_si128(srcHi2, srcHi3); // ab00ab00ab00ab00 + + srcLo0 = _mm_or_si128(srcLo0, srcLo2); // abgrabgrabgrabgr + srcHi0 = _mm_or_si128(srcHi0, srcHi2); // abgrabgrabgrabgr + + // unpack into rows that get the tiling order correct + __m128i vRow00 = _mm_unpacklo_epi64(srcLo0, srcHi0); // abgrabgrabgrabgrabgrabgrabgrabgr + __m128i vRow10 = _mm_unpackhi_epi64(srcLo0, srcHi0); + + __m256i final = _mm256_castsi128_si256(vRow00); + final = _mm256_insertf128_si256(final, vRow10, 1); + +#elif KNOB_ARCH >= KNOB_ARCH_AVX2 + + // logic is as above, only wider + src1 = _mm256_slli_si256(src1, 1); + src2 = _mm256_slli_si256(src2, 2); + src3 = _mm256_slli_si256(src3, 3); + + src0 = _mm256_or_si256(src0, src1); + src2 = _mm256_or_si256(src2, src3); + + __m256i final = _mm256_or_si256(src0, src2); +#if 0 + + __m256i perm = _mm256_set_epi32(7, 6, 3, 2, 5, 4, 1, 0); + + final = _mm256_permutevar8x32_epi32(final, perm); +#else + + // adjust the data to get the tiling order correct 0 1 2 3 -> 0 2 1 3 + final = _mm256_permute4x64_epi64(final, 0xD8); +#endif +#endif + + _simd_storeu2_si((__m128i*)pDst1, (__m128i*)pDst, final); +} + +#if USE_8x2_TILE_BACKEND +template +INLINE static void FlatConvertNoAlpha(const uint8_t* pSrc, uint8_t* pDst0, uint8_t* pDst1, uint8_t* pDst2, uint8_t* pDst3) +{ + // swizzle rgba -> bgra while we load + simd16scalar comp0 = _simd16_load_ps(reinterpret_cast(pSrc + FormatTraits::swizzle(0) * sizeof(simd16scalar))); // float32 rrrrrrrrrrrrrrrr + simd16scalar comp1 = _simd16_load_ps(reinterpret_cast(pSrc + FormatTraits::swizzle(1) * sizeof(simd16scalar))); // float32 gggggggggggggggg + simd16scalar comp2 = _simd16_load_ps(reinterpret_cast(pSrc + FormatTraits::swizzle(2) * sizeof(simd16scalar))); // float32 bbbbbbbbbbbbbbbb + + // clamp + const simd16scalar zero = _simd16_setzero_ps(); + const simd16scalar ones = _simd16_set1_ps(1.0f); + + comp0 = _simd16_max_ps(comp0, zero); + comp0 = _simd16_min_ps(comp0, ones); + + comp1 = _simd16_max_ps(comp1, zero); + comp1 = _simd16_min_ps(comp1, ones); + + comp2 = _simd16_max_ps(comp2, zero); + comp2 = _simd16_min_ps(comp2, ones); + + // gamma-correct only rgb + if (FormatTraits::isSRGB) + { + comp0 = FormatTraits::convertSrgb(0, comp0); + comp1 = FormatTraits::convertSrgb(1, comp1); + comp2 = FormatTraits::convertSrgb(2, comp2); + } + + // convert float components from 0.0f..1.0f to correct scale for 0..255 dest format + comp0 = _simd16_mul_ps(comp0, _simd16_set1_ps(FormatTraits::fromFloat(0))); + comp1 = _simd16_mul_ps(comp1, _simd16_set1_ps(FormatTraits::fromFloat(1))); + comp2 = _simd16_mul_ps(comp2, _simd16_set1_ps(FormatTraits::fromFloat(2))); + + // moving to 16 wide integer vector types + simd16scalari src0 = _simd16_cvtps_epi32(comp0); // padded byte rrrrrrrrrrrrrrrr + simd16scalari src1 = _simd16_cvtps_epi32(comp1); // padded byte gggggggggggggggg + simd16scalari src2 = _simd16_cvtps_epi32(comp2); // padded byte bbbbbbbbbbbbbbbb + + // SOA to AOS conversion + src1 = _simd16_slli_epi32(src1, 8); + src2 = _simd16_slli_epi32(src2, 16); + + simd16scalari final = _simd16_or_si(_simd16_or_si(src0, src1), src2); // 0 1 2 3 4 5 6 7 8 9 A B C D E F + + // de-swizzle conversion +#if 1 + simd16scalari final0 = _simd16_permute2f128_si(final, final, 0xA0); // (2, 2, 0, 0) // 0 1 2 3 0 1 2 3 8 9 A B 8 9 A B + simd16scalari final1 = _simd16_permute2f128_si(final, final, 0xF5); // (3, 3, 1, 1) // 4 5 6 7 4 5 6 7 C D E F C D E F + + final = _simd16_shuffle_epi64(final0, final1, 0xCC); // (1 1 0 0 1 1 0 0) // 0 1 4 5 2 3 6 7 8 9 C D A B E F + +#else + final = _simd16_permute_epi32(final, _simd16_set_epi32(15, 14, 11, 10, 13, 12, 9, 8, 7, 6, 3, 2, 5, 4, 1, 0)); + +#endif + // store 8x2 memory order: + // row0: [ pDst0, pDst2 ] = { 0 1 4 5 }, { 8 9 C D } + // row1: [ pDst1, pDst3 ] = { 2 3 6 7 }, { A B E F } + _simd_storeu2_si(reinterpret_cast<__m128i *>(pDst1), reinterpret_cast<__m128i *>(pDst0), _simd16_extract_si(final, 0)); + _simd_storeu2_si(reinterpret_cast<__m128i *>(pDst3), reinterpret_cast<__m128i *>(pDst2), _simd16_extract_si(final, 1)); +} + +#endif +template +INLINE static void FlatConvertNoAlpha(const uint8_t* pSrc, uint8_t* pDst, uint8_t* pDst1) +{ + static const uint32_t offset = sizeof(simdscalar); + + // swizzle rgba -> bgra while we load + simdscalar vComp0 = _simd_load_ps((const float*)(pSrc + (FormatTraits::swizzle(0))*offset)); // float32 rrrrrrrr + simdscalar vComp1 = _simd_load_ps((const float*)(pSrc + (FormatTraits::swizzle(1))*offset)); // float32 gggggggg + simdscalar vComp2 = _simd_load_ps((const float*)(pSrc + (FormatTraits::swizzle(2))*offset)); // float32 bbbbbbbb + // clamp + vComp0 = _simd_max_ps(vComp0, _simd_setzero_ps()); + vComp0 = _simd_min_ps(vComp0, _simd_set1_ps(1.0f)); + + vComp1 = _simd_max_ps(vComp1, _simd_setzero_ps()); + vComp1 = _simd_min_ps(vComp1, _simd_set1_ps(1.0f)); + + vComp2 = _simd_max_ps(vComp2, _simd_setzero_ps()); + vComp2 = _simd_min_ps(vComp2, _simd_set1_ps(1.0f)); + + if (FormatTraits::isSRGB) + { + // Gamma-correct only rgb + vComp0 = FormatTraits::convertSrgb(0, vComp0); + vComp1 = FormatTraits::convertSrgb(1, vComp1); + vComp2 = FormatTraits::convertSrgb(2, vComp2); + } + + // convert float components from 0.0f .. 1.0f to correct scale for 0 .. 255 dest format + vComp0 = _simd_mul_ps(vComp0, _simd_set1_ps(FormatTraits::fromFloat(0))); + vComp1 = _simd_mul_ps(vComp1, _simd_set1_ps(FormatTraits::fromFloat(1))); + vComp2 = _simd_mul_ps(vComp2, _simd_set1_ps(FormatTraits::fromFloat(2))); + + // moving to 8 wide integer vector types + __m256i src0 = _simd_cvtps_epi32(vComp0); // padded byte rrrrrrrr + __m256i src1 = _simd_cvtps_epi32(vComp1); // padded byte gggggggg + __m256i src2 = _simd_cvtps_epi32(vComp2); // padded byte bbbbbbbb + +#if KNOB_ARCH == KNOB_ARCH_AVX + + // splitting into two sets of 4 wide integer vector types + // because AVX doesn't have instructions to support this operation at 8 wide + __m128i srcLo0 = _mm256_castsi256_si128(src0); // 000r000r000r000r + __m128i srcLo1 = _mm256_castsi256_si128(src1); // 000g000g000g000g + __m128i srcLo2 = _mm256_castsi256_si128(src2); // 000b000b000b000b + + __m128i srcHi0 = _mm256_extractf128_si256(src0, 1); // 000r000r000r000r + __m128i srcHi1 = _mm256_extractf128_si256(src1, 1); // 000g000g000g000g + __m128i srcHi2 = _mm256_extractf128_si256(src2, 1); // 000b000b000b000b + + srcLo1 = _mm_slli_si128(srcLo1, 1); // 00g000g000g000g0 + srcHi1 = _mm_slli_si128(srcHi1, 1); // 00g000g000g000g0 + srcLo2 = _mm_slli_si128(srcLo2, 2); // 0b000b000b000b00 + srcHi2 = _mm_slli_si128(srcHi2, 2); // 0b000b000b000b00 + + srcLo0 = _mm_or_si128(srcLo0, srcLo1); // 00gr00gr00gr00gr + + srcHi0 = _mm_or_si128(srcHi0, srcHi1); // 00gr00gr00gr00gr + + srcLo0 = _mm_or_si128(srcLo0, srcLo2); // 0bgr0bgr0bgr0bgr + srcHi0 = _mm_or_si128(srcHi0, srcHi2); // 0bgr0bgr0bgr0bgr + + // unpack into rows that get the tiling order correct + __m128i vRow00 = _mm_unpacklo_epi64(srcLo0, srcHi0); // 0bgr0bgr0bgr0bgr0bgr0bgr0bgr0bgr + __m128i vRow10 = _mm_unpackhi_epi64(srcLo0, srcHi0); + + __m256i final = _mm256_castsi128_si256(vRow00); + final = _mm256_insertf128_si256(final, vRow10, 1); + +#elif KNOB_ARCH >= KNOB_ARCH_AVX2 + + // logic is as above, only wider + src1 = _mm256_slli_si256(src1, 1); + src2 = _mm256_slli_si256(src2, 2); + + src0 = _mm256_or_si256(src0, src1); + + __m256i final = _mm256_or_si256(src0, src2); + + // adjust the data to get the tiling order correct 0 1 2 3 -> 0 2 1 3 + final = _mm256_permute4x64_epi64(final, 0xD8); + +#endif + + _simd_storeu2_si((__m128i*)pDst1, (__m128i*)pDst, final); +} + +template<> +struct ConvertPixelsSOAtoAOS +{ + template + INLINE static void Convert(const uint8_t* pSrc, uint8_t* (&ppDsts)[NumDests]) + { +#if USE_8x2_TILE_BACKEND + FlatConvert(pSrc, ppDsts[0], ppDsts[1], ppDsts[2], ppDsts[3]); +#else + FlatConvert(pSrc, ppDsts[0], ppDsts[1]); +#endif + } +}; + +template<> +struct ConvertPixelsSOAtoAOS +{ + template + INLINE static void Convert(const uint8_t* pSrc, uint8_t* (&ppDsts)[NumDests]) + { +#if USE_8x2_TILE_BACKEND + FlatConvertNoAlpha(pSrc, ppDsts[0], ppDsts[1], ppDsts[2], ppDsts[3]); +#else + FlatConvertNoAlpha(pSrc, ppDsts[0], ppDsts[1]); +#endif + } +}; + +template<> +struct ConvertPixelsSOAtoAOS < R32G32B32A32_FLOAT, B8G8R8A8_UNORM_SRGB > +{ + template + INLINE static void Convert(const uint8_t* pSrc, uint8_t* (&ppDsts)[NumDests]) + { +#if USE_8x2_TILE_BACKEND + FlatConvert(pSrc, ppDsts[0], ppDsts[1], ppDsts[2], ppDsts[3]); +#else + FlatConvert(pSrc, ppDsts[0], ppDsts[1]); +#endif + } +}; + +template<> +struct ConvertPixelsSOAtoAOS < R32G32B32A32_FLOAT, B8G8R8X8_UNORM_SRGB > +{ + template + INLINE static void Convert(const uint8_t* pSrc, uint8_t* (&ppDsts)[NumDests]) + { +#if USE_8x2_TILE_BACKEND + FlatConvertNoAlpha(pSrc, ppDsts[0], ppDsts[1], ppDsts[2], ppDsts[3]); +#else + FlatConvertNoAlpha(pSrc, ppDsts[0], ppDsts[1]); +#endif + } +}; + +template<> +struct ConvertPixelsSOAtoAOS < R32G32B32A32_FLOAT, R8G8B8A8_UNORM > +{ + template + INLINE static void Convert(const uint8_t* pSrc, uint8_t* (&ppDsts)[NumDests]) + { +#if USE_8x2_TILE_BACKEND + FlatConvert(pSrc, ppDsts[0], ppDsts[1], ppDsts[2], ppDsts[3]); +#else + FlatConvert(pSrc, ppDsts[0], ppDsts[1]); +#endif + } +}; + +template<> +struct ConvertPixelsSOAtoAOS < R32G32B32A32_FLOAT, R8G8B8X8_UNORM > +{ + template + INLINE static void Convert(const uint8_t* pSrc, uint8_t* (&ppDsts)[NumDests]) + { +#if USE_8x2_TILE_BACKEND + FlatConvertNoAlpha(pSrc, ppDsts[0], ppDsts[1], ppDsts[2], ppDsts[3]); +#else + FlatConvertNoAlpha(pSrc, ppDsts[0], ppDsts[1]); +#endif + } +}; + +template<> +struct ConvertPixelsSOAtoAOS < R32G32B32A32_FLOAT, R8G8B8A8_UNORM_SRGB > +{ + template + INLINE static void Convert(const uint8_t* pSrc, uint8_t* (&ppDsts)[NumDests]) + { +#if USE_8x2_TILE_BACKEND + FlatConvert(pSrc, ppDsts[0], ppDsts[1], ppDsts[2], ppDsts[3]); +#else + FlatConvert(pSrc, ppDsts[0], ppDsts[1]); +#endif + } +}; + +template<> +struct ConvertPixelsSOAtoAOS < R32G32B32A32_FLOAT, R8G8B8X8_UNORM_SRGB > +{ + template + INLINE static void Convert(const uint8_t* pSrc, uint8_t* (&ppDsts)[NumDests]) + { +#if USE_8x2_TILE_BACKEND + FlatConvertNoAlpha(pSrc, ppDsts[0], ppDsts[1], ppDsts[2], ppDsts[3]); +#else + FlatConvertNoAlpha(pSrc, ppDsts[0], ppDsts[1]); +#endif + } +}; + +////////////////////////////////////////////////////////////////////////// +/// StoreRasterTile +////////////////////////////////////////////////////////////////////////// +template +struct StoreRasterTile +{ + ////////////////////////////////////////////////////////////////////////// + /// @brief Retrieve color from hot tile source which is always float. + /// @param pSrc - Pointer to raster tile. + /// @param x, y - Coordinates to raster tile. + /// @param output - output color + INLINE static void GetSwizzledSrcColor( + uint8_t* pSrc, + uint32_t x, uint32_t y, + float outputColor[4]) + { +#if USE_8x2_TILE_BACKEND + typedef SimdTile_16 SimdT; + + SimdT *pSrcSimdTiles = reinterpret_cast(pSrc); + + // Compute which simd tile we're accessing within 8x8 tile. + // i.e. Compute linear simd tile coordinate given (x, y) in pixel coordinates. + uint32_t simdIndex = (y / SIMD16_TILE_Y_DIM) * (KNOB_TILE_X_DIM / SIMD16_TILE_X_DIM) + (x / SIMD16_TILE_X_DIM); + + SimdT *pSimdTile = &pSrcSimdTiles[simdIndex]; + + uint32_t simdOffset = (y % SIMD16_TILE_Y_DIM) * SIMD16_TILE_X_DIM + (x % SIMD16_TILE_X_DIM); + + pSimdTile->GetSwizzledColor(simdOffset, outputColor); +#else + typedef SimdTile SimdT; + + SimdT* pSrcSimdTiles = (SimdT*)pSrc; + + // Compute which simd tile we're accessing within 8x8 tile. + // i.e. Compute linear simd tile coordinate given (x, y) in pixel coordinates. + uint32_t simdIndex = (y / SIMD_TILE_Y_DIM) * (KNOB_TILE_X_DIM / SIMD_TILE_X_DIM) + (x / SIMD_TILE_X_DIM); + + SimdT* pSimdTile = &pSrcSimdTiles[simdIndex]; + + uint32_t simdOffset = (y % SIMD_TILE_Y_DIM) * SIMD_TILE_X_DIM + (x % SIMD_TILE_X_DIM); + + pSimdTile->GetSwizzledColor(simdOffset, outputColor); +#endif + } + + ////////////////////////////////////////////////////////////////////////// + /// @brief Stores an 8x8 raster tile to the destination surface. + /// @param pSrc - Pointer to raster tile. + /// @param pDstSurface - Destination surface state + /// @param x, y - Coordinates to raster tile. + INLINE static void Store( + uint8_t *pSrc, + SWR_SURFACE_STATE* pDstSurface, + uint32_t x, uint32_t y, uint32_t sampleNum, uint32_t renderTargetArrayIndex) // (x, y) pixel coordinate to start of raster tile. + { + uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod, 1U); + uint32_t lodHeight = std::max(pDstSurface->height >> pDstSurface->lod, 1U); + + // For each raster tile pixel (rx, ry) + for (uint32_t ry = 0; ry < KNOB_TILE_Y_DIM; ++ry) + { + for (uint32_t rx = 0; rx < KNOB_TILE_X_DIM; ++rx) + { + // Perform bounds checking. + if (((x + rx) < lodWidth) && + ((y + ry) < lodHeight)) + { + float srcColor[4]; + GetSwizzledSrcColor(pSrc, rx, ry, srcColor); + + uint8_t *pDst = (uint8_t*)ComputeSurfaceAddress((x + rx), (y + ry), + pDstSurface->arrayIndex + renderTargetArrayIndex, pDstSurface->arrayIndex + renderTargetArrayIndex, + sampleNum, pDstSurface->lod, pDstSurface); + { + ConvertPixelFromFloat(pDst, srcColor); + } + } + } + } + } +}; + +template +struct OptStoreRasterTile : StoreRasterTile +{}; + +////////////////////////////////////////////////////////////////////////// +/// OptStoreRasterTile - SWR_TILE_MODE_NONE specialization for 8bpp +////////////////////////////////////////////////////////////////////////// +template +struct OptStoreRasterTile< TilingTraits, SrcFormat, DstFormat> +{ + typedef StoreRasterTile, SrcFormat, DstFormat> GenericStoreTile; + static const size_t SRC_BYTES_PER_PIXEL = FormatTraits::bpp / 8; + static const size_t DST_BYTES_PER_PIXEL = FormatTraits::bpp / 8; + + ////////////////////////////////////////////////////////////////////////// + /// @brief Stores an 8x8 raster tile to the destination surface. + /// @param pSrc - Pointer to raster tile. + /// @param pDstSurface - Destination surface state + /// @param x, y - Coordinates to raster tile. + INLINE static void Store( + uint8_t *pSrc, + SWR_SURFACE_STATE* pDstSurface, + uint32_t x, uint32_t y, uint32_t sampleNum, uint32_t renderTargetArrayIndex) + { + // Punt non-full tiles to generic store + uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod, 1U); + uint32_t lodHeight = std::max(pDstSurface->height >> pDstSurface->lod, 1U); + + if (x + KNOB_TILE_X_DIM > lodWidth || y + KNOB_TILE_Y_DIM > lodHeight) + { + return GenericStoreTile::Store(pSrc, pDstSurface, x, y, sampleNum, renderTargetArrayIndex); + } + + uint8_t *pDst = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, + pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); +#if USE_8x2_TILE_BACKEND + + const uint32_t dx = SIMD16_TILE_X_DIM * DST_BYTES_PER_PIXEL; + const uint32_t dy = SIMD16_TILE_Y_DIM * pDstSurface->pitch - KNOB_TILE_X_DIM * DST_BYTES_PER_PIXEL; + + uint8_t* ppDsts[] = + { + pDst, // row 0, col 0 + pDst + pDstSurface->pitch, // row 1, col 0 + pDst + dx / 2, // row 0, col 1 + pDst + pDstSurface->pitch + dx / 2 // row 1, col 1 + }; + + for (uint32_t yy = 0; yy < KNOB_TILE_Y_DIM; yy += SIMD16_TILE_Y_DIM) + { + for (uint32_t xx = 0; xx < KNOB_TILE_X_DIM; xx += SIMD16_TILE_X_DIM) + { + ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); + + pSrc += KNOB_SIMD16_WIDTH * SRC_BYTES_PER_PIXEL; + + ppDsts[0] += dx; + ppDsts[1] += dx; + ppDsts[2] += dx; + ppDsts[3] += dx; + } + + ppDsts[0] += dy; + ppDsts[1] += dy; + ppDsts[2] += dy; + ppDsts[3] += dy; + } +#else + uint8_t* ppRows[] = { pDst, pDst + pDstSurface->pitch }; + + for (uint32_t row = 0; row < KNOB_TILE_Y_DIM / SIMD_TILE_Y_DIM; ++row) + { + uint8_t* ppStartRows[] = { ppRows[0], ppRows[1] }; + + for (uint32_t col = 0; col < KNOB_TILE_X_DIM / SIMD_TILE_X_DIM; ++col) + { + // Format conversion and convert from SOA to AOS, and store the rows. + ConvertPixelsSOAtoAOS::Convert(pSrc, ppRows); + + ppRows[0] += KNOB_SIMD_WIDTH * DST_BYTES_PER_PIXEL / 2; + ppRows[1] += KNOB_SIMD_WIDTH * DST_BYTES_PER_PIXEL / 2; + pSrc += SRC_BYTES_PER_PIXEL * KNOB_SIMD_WIDTH; + } + + ppRows[0] = ppStartRows[0] + 2 * pDstSurface->pitch; + ppRows[1] = ppStartRows[1] + 2 * pDstSurface->pitch; + } +#endif + } +}; + +////////////////////////////////////////////////////////////////////////// +/// OptStoreRasterTile - SWR_TILE_MODE_NONE specialization for 16bpp +////////////////////////////////////////////////////////////////////////// +template +struct OptStoreRasterTile< TilingTraits, SrcFormat, DstFormat> +{ + typedef StoreRasterTile, SrcFormat, DstFormat> GenericStoreTile; + static const size_t SRC_BYTES_PER_PIXEL = FormatTraits::bpp / 8; + static const size_t DST_BYTES_PER_PIXEL = FormatTraits::bpp / 8; + + ////////////////////////////////////////////////////////////////////////// + /// @brief Stores an 8x8 raster tile to the destination surface. + /// @param pSrc - Pointer to raster tile. + /// @param pDstSurface - Destination surface state + /// @param x, y - Coordinates to raster tile. + INLINE static void Store( + uint8_t *pSrc, + SWR_SURFACE_STATE* pDstSurface, + uint32_t x, uint32_t y, uint32_t sampleNum, uint32_t renderTargetArrayIndex) + { + // Punt non-full tiles to generic store + uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod, 1U); + uint32_t lodHeight = std::max(pDstSurface->height >> pDstSurface->lod, 1U); + + if (x + KNOB_TILE_X_DIM > lodWidth || y + KNOB_TILE_Y_DIM > lodHeight) + { + return GenericStoreTile::Store(pSrc, pDstSurface, x, y, sampleNum, renderTargetArrayIndex); + } + + uint8_t *pDst = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, + pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); +#if USE_8x2_TILE_BACKEND + + const uint32_t dx = SIMD16_TILE_X_DIM * DST_BYTES_PER_PIXEL; + const uint32_t dy = SIMD16_TILE_Y_DIM * pDstSurface->pitch - KNOB_TILE_X_DIM * DST_BYTES_PER_PIXEL; + + uint8_t* ppDsts[] = + { + pDst, // row 0, col 0 + pDst + pDstSurface->pitch, // row 1, col 0 + pDst + dx / 2, // row 0, col 1 + pDst + pDstSurface->pitch + dx / 2 // row 1, col 1 + }; + + for (uint32_t yy = 0; yy < KNOB_TILE_Y_DIM; yy += SIMD16_TILE_Y_DIM) + { + for (uint32_t xx = 0; xx < KNOB_TILE_X_DIM; xx += SIMD16_TILE_X_DIM) + { + ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); + + pSrc += KNOB_SIMD16_WIDTH * SRC_BYTES_PER_PIXEL; + + ppDsts[0] += dx; + ppDsts[1] += dx; + ppDsts[2] += dx; + ppDsts[3] += dx; + } + + ppDsts[0] += dy; + ppDsts[1] += dy; + ppDsts[2] += dy; + ppDsts[3] += dy; + } +#else + uint8_t* ppRows[] = { pDst, pDst + pDstSurface->pitch }; + + for (uint32_t row = 0; row < KNOB_TILE_Y_DIM / SIMD_TILE_Y_DIM; ++row) + { + uint8_t* ppStartRows[] = { ppRows[0], ppRows[1] }; + + for (uint32_t col = 0; col < KNOB_TILE_X_DIM / SIMD_TILE_X_DIM; ++col) + { + // Format conversion and convert from SOA to AOS, and store the rows. + ConvertPixelsSOAtoAOS::Convert(pSrc, ppRows); + + ppRows[0] += KNOB_SIMD_WIDTH * DST_BYTES_PER_PIXEL / 2; + ppRows[1] += KNOB_SIMD_WIDTH * DST_BYTES_PER_PIXEL / 2; + pSrc += SRC_BYTES_PER_PIXEL * KNOB_SIMD_WIDTH; + } + + ppRows[0] = ppStartRows[0] + 2 * pDstSurface->pitch; + ppRows[1] = ppStartRows[1] + 2 * pDstSurface->pitch; + } +#endif + } +}; + +////////////////////////////////////////////////////////////////////////// +/// OptStoreRasterTile - SWR_TILE_MODE_NONE specialization for 32bpp +////////////////////////////////////////////////////////////////////////// +template +struct OptStoreRasterTile< TilingTraits, SrcFormat, DstFormat> +{ + typedef StoreRasterTile, SrcFormat, DstFormat> GenericStoreTile; + static const size_t SRC_BYTES_PER_PIXEL = FormatTraits::bpp / 8; + static const size_t DST_BYTES_PER_PIXEL = FormatTraits::bpp / 8; + + ////////////////////////////////////////////////////////////////////////// + /// @brief Stores an 8x8 raster tile to the destination surface. + /// @param pSrc - Pointer to raster tile. + /// @param pDstSurface - Destination surface state + /// @param x, y - Coordinates to raster tile. + INLINE static void Store( + uint8_t *pSrc, + SWR_SURFACE_STATE* pDstSurface, + uint32_t x, uint32_t y, uint32_t sampleNum, uint32_t renderTargetArrayIndex) + { + // Punt non-full tiles to generic store + uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod, 1U); + uint32_t lodHeight = std::max(pDstSurface->height >> pDstSurface->lod, 1U); + + if (x + KNOB_TILE_X_DIM > lodWidth || y + KNOB_TILE_Y_DIM > lodHeight) + { + return GenericStoreTile::Store(pSrc, pDstSurface, x, y, sampleNum, renderTargetArrayIndex); + } + + uint8_t *pDst = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, + pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); +#if USE_8x2_TILE_BACKEND + + const uint32_t dx = SIMD16_TILE_X_DIM * DST_BYTES_PER_PIXEL; + const uint32_t dy = SIMD16_TILE_Y_DIM * pDstSurface->pitch - KNOB_TILE_X_DIM * DST_BYTES_PER_PIXEL; + + uint8_t* ppDsts[] = + { + pDst, // row 0, col 0 + pDst + pDstSurface->pitch, // row 1, col 0 + pDst + dx / 2, // row 0, col 1 + pDst + pDstSurface->pitch + dx / 2 // row 1, col 1 + }; + + for (uint32_t yy = 0; yy < KNOB_TILE_Y_DIM; yy += SIMD16_TILE_Y_DIM) + { + for (uint32_t xx = 0; xx < KNOB_TILE_X_DIM; xx += SIMD16_TILE_X_DIM) + { + ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); + + pSrc += KNOB_SIMD16_WIDTH * SRC_BYTES_PER_PIXEL; + + ppDsts[0] += dx; + ppDsts[1] += dx; + ppDsts[2] += dx; + ppDsts[3] += dx; + } + + ppDsts[0] += dy; + ppDsts[1] += dy; + ppDsts[2] += dy; + ppDsts[3] += dy; + } +#else + uint8_t* ppRows[] = { pDst, pDst + pDstSurface->pitch }; + + for (uint32_t row = 0; row < KNOB_TILE_Y_DIM / SIMD_TILE_Y_DIM; ++row) + { + uint8_t* ppStartRows[] = { ppRows[0], ppRows[1] }; + + for (uint32_t col = 0; col < KNOB_TILE_X_DIM / SIMD_TILE_X_DIM; ++col) + { + // Format conversion and convert from SOA to AOS, and store the rows. + ConvertPixelsSOAtoAOS::Convert(pSrc, ppRows); + + ppRows[0] += KNOB_SIMD_WIDTH * DST_BYTES_PER_PIXEL / 2; + ppRows[1] += KNOB_SIMD_WIDTH * DST_BYTES_PER_PIXEL / 2; + pSrc += SRC_BYTES_PER_PIXEL * KNOB_SIMD_WIDTH; + } + + ppRows[0] = ppStartRows[0] + 2 * pDstSurface->pitch; + ppRows[1] = ppStartRows[1] + 2 * pDstSurface->pitch; + } +#endif + } +}; + +////////////////////////////////////////////////////////////////////////// +/// OptStoreRasterTile - SWR_TILE_MODE_NONE specialization for 64bpp +////////////////////////////////////////////////////////////////////////// +template +struct OptStoreRasterTile< TilingTraits, SrcFormat, DstFormat> +{ + typedef StoreRasterTile, SrcFormat, DstFormat> GenericStoreTile; + static const size_t SRC_BYTES_PER_PIXEL = FormatTraits::bpp / 8; + static const size_t DST_BYTES_PER_PIXEL = FormatTraits::bpp / 8; + static const size_t MAX_DST_COLUMN_BYTES = 16; +#if !USE_8x2_TILE_BACKEND + static const size_t SRC_COLUMN_BYTES = KNOB_SIMD_WIDTH * SRC_BYTES_PER_PIXEL; + static const size_t DST_COLUMN_BYTES_PER_SRC = KNOB_SIMD_WIDTH * DST_BYTES_PER_PIXEL / 2; +#endif + + ////////////////////////////////////////////////////////////////////////// + /// @brief Stores an 8x8 raster tile to the destination surface. + /// @param pSrc - Pointer to raster tile. + /// @param pDstSurface - Destination surface state + /// @param x, y - Coordinates to raster tile. + INLINE static void Store( + uint8_t *pSrc, + SWR_SURFACE_STATE* pDstSurface, + uint32_t x, uint32_t y, uint32_t sampleNum, uint32_t renderTargetArrayIndex) + { + // Punt non-full tiles to generic store + uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod, 1U); + uint32_t lodHeight = std::max(pDstSurface->height >> pDstSurface->lod, 1U); + + if (x + KNOB_TILE_X_DIM > lodWidth || y + KNOB_TILE_Y_DIM > lodHeight) + { + return GenericStoreTile::Store(pSrc, pDstSurface, x, y, sampleNum, renderTargetArrayIndex); + } + + uint8_t *pDst = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, + pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); +#if USE_8x2_TILE_BACKEND + + const uint32_t dx = SIMD16_TILE_X_DIM * DST_BYTES_PER_PIXEL; + const uint32_t dy = SIMD16_TILE_Y_DIM * pDstSurface->pitch; + + // we have to break these large spans up, since ConvertPixelsSOAtoAOS() can only work on max 16B spans (a TileY limitation) + static_assert(dx == MAX_DST_COLUMN_BYTES * 4, "Invalid column offsets"); + + uint8_t *ppDsts[] = + { + pDst, // row 0, col 0 + pDst + pDstSurface->pitch, // row 1, col 0 + pDst + MAX_DST_COLUMN_BYTES, // row 0, col 1 + pDst + pDstSurface->pitch + MAX_DST_COLUMN_BYTES, // row 1, col 1 + pDst + MAX_DST_COLUMN_BYTES * 2, // row 0, col 2 + pDst + pDstSurface->pitch + MAX_DST_COLUMN_BYTES * 2, // row 1, col 2 + pDst + MAX_DST_COLUMN_BYTES * 3, // row 0, col 3 + pDst + pDstSurface->pitch + MAX_DST_COLUMN_BYTES * 3 // row 1, col 3 + }; + + for (uint32_t yy = 0; yy < KNOB_TILE_Y_DIM; yy += SIMD16_TILE_Y_DIM) + { + // Raster tile width is same as simd16 tile width + static_assert(KNOB_TILE_X_DIM == SIMD16_TILE_X_DIM, "Invalid tile x dim"); + + ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); + + pSrc += KNOB_SIMD16_WIDTH * SRC_BYTES_PER_PIXEL; + + for (uint32_t i = 0; i < sizeof(ppDsts) / sizeof(ppDsts[0]); i += 1) + { + ppDsts[i] += dy; + } + } +#else + uint8_t* ppDsts[] = + { + pDst, // row 0, col 0 + pDst + pDstSurface->pitch, // row 1, col 0 + pDst + MAX_DST_COLUMN_BYTES, // row 0, col 1 + pDst + pDstSurface->pitch + MAX_DST_COLUMN_BYTES, // row 1, col 1 + }; + + for (uint32_t row = 0; row < KNOB_TILE_Y_DIM / SIMD_TILE_Y_DIM; ++row) + { + uint8_t* ppStartRows[] = + { + ppDsts[0], + ppDsts[1], + ppDsts[2], + ppDsts[3], + }; + + for (uint32_t col = 0; col < KNOB_TILE_X_DIM / SIMD_TILE_X_DIM; ++col) + { + // Format conversion and convert from SOA to AOS, and store the rows. + ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); + + ppDsts[0] += DST_COLUMN_BYTES_PER_SRC; + ppDsts[1] += DST_COLUMN_BYTES_PER_SRC; + ppDsts[2] += DST_COLUMN_BYTES_PER_SRC; + ppDsts[3] += DST_COLUMN_BYTES_PER_SRC; + pSrc += SRC_COLUMN_BYTES; + } + + ppDsts[0] = ppStartRows[0] + 2 * pDstSurface->pitch; + ppDsts[1] = ppStartRows[1] + 2 * pDstSurface->pitch; + ppDsts[2] = ppStartRows[2] + 2 * pDstSurface->pitch; + ppDsts[3] = ppStartRows[3] + 2 * pDstSurface->pitch; + } +#endif + } +}; + +////////////////////////////////////////////////////////////////////////// +/// OptStoreRasterTile - SWR_TILE_MODE_NONE specialization for 128bpp +////////////////////////////////////////////////////////////////////////// +template +struct OptStoreRasterTile< TilingTraits, SrcFormat, DstFormat> +{ + typedef StoreRasterTile, SrcFormat, DstFormat> GenericStoreTile; + static const size_t SRC_BYTES_PER_PIXEL = FormatTraits::bpp / 8; + static const size_t DST_BYTES_PER_PIXEL = FormatTraits::bpp / 8; + static const size_t MAX_DST_COLUMN_BYTES = 16; +#if !USE_8x2_TILE_BACKEND + static const size_t SRC_COLUMN_BYTES = KNOB_SIMD_WIDTH * SRC_BYTES_PER_PIXEL; + static const size_t DST_COLUMN_BYTES_PER_SRC = KNOB_SIMD_WIDTH * DST_BYTES_PER_PIXEL / 2; +#endif + + ////////////////////////////////////////////////////////////////////////// + /// @brief Stores an 8x8 raster tile to the destination surface. + /// @param pSrc - Pointer to raster tile. + /// @param pDstSurface - Destination surface state + /// @param x, y - Coordinates to raster tile. + INLINE static void Store( + uint8_t *pSrc, + SWR_SURFACE_STATE* pDstSurface, + uint32_t x, uint32_t y, uint32_t sampleNum, uint32_t renderTargetArrayIndex) + { + // Punt non-full tiles to generic store + uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod, 1U); + uint32_t lodHeight = std::max(pDstSurface->height >> pDstSurface->lod, 1U); + + if (x + KNOB_TILE_X_DIM > lodWidth || y + KNOB_TILE_Y_DIM > lodHeight) + { + return GenericStoreTile::Store(pSrc, pDstSurface, x, y, sampleNum, renderTargetArrayIndex); + } + + uint8_t *pDst = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, + pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); +#if USE_8x2_TILE_BACKEND + + const uint32_t dx = SIMD16_TILE_X_DIM * DST_BYTES_PER_PIXEL; + const uint32_t dy = SIMD16_TILE_Y_DIM * pDstSurface->pitch; + + // we have to break these large spans up, since ConvertPixelsSOAtoAOS() can only work on max 16B spans (a TileY limitation) + static_assert(dx == MAX_DST_COLUMN_BYTES * 8, "Invalid column offsets"); + + uint8_t* ppDsts[] = + { + pDst, // row 0, col 0 + pDst + pDstSurface->pitch, // row 1, col 0 + pDst + MAX_DST_COLUMN_BYTES, // row 0, col 1 + pDst + pDstSurface->pitch + MAX_DST_COLUMN_BYTES, // row 1, col 1 + pDst + MAX_DST_COLUMN_BYTES * 2, // row 0, col 2 + pDst + pDstSurface->pitch + MAX_DST_COLUMN_BYTES * 2, // row 1, col 2 + pDst + MAX_DST_COLUMN_BYTES * 3, // row 0, col 3 + pDst + pDstSurface->pitch + MAX_DST_COLUMN_BYTES * 3, // row 1, col 3 + pDst + MAX_DST_COLUMN_BYTES * 4, // row 0, col 4 + pDst + pDstSurface->pitch + MAX_DST_COLUMN_BYTES * 4, // row 1, col 4 + pDst + MAX_DST_COLUMN_BYTES * 5, // row 0, col 5 + pDst + pDstSurface->pitch + MAX_DST_COLUMN_BYTES * 5, // row 1, col 5 + pDst + MAX_DST_COLUMN_BYTES * 6, // row 0, col 6 + pDst + pDstSurface->pitch + MAX_DST_COLUMN_BYTES * 6, // row 1, col 6 + pDst + MAX_DST_COLUMN_BYTES * 7, // row 0, col 7 + pDst + pDstSurface->pitch + MAX_DST_COLUMN_BYTES * 7, // row 1, col 7 + }; + + for (uint32_t yy = 0; yy < KNOB_TILE_Y_DIM; yy += SIMD16_TILE_Y_DIM) + { + // Raster tile width is same as simd16 tile width + static_assert(KNOB_TILE_X_DIM == SIMD16_TILE_X_DIM, "Invalid tile x dim"); + + ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); + + pSrc += KNOB_SIMD16_WIDTH * SRC_BYTES_PER_PIXEL; + + for (uint32_t i = 0; i < sizeof(ppDsts) / sizeof(ppDsts[0]); i += 1) + { + ppDsts[i] += dy; + } + } +#else + struct DstPtrs + { + uint8_t* ppDsts[8]; + } ptrs; + + // Need 8 pointers, 4 columns of 2 rows each + for (uint32_t y = 0; y < 2; ++y) + { + for (uint32_t x = 0; x < 4; ++x) + { + ptrs.ppDsts[x * 2 + y] = pDst + y * pDstSurface->pitch + x * MAX_DST_COLUMN_BYTES; + } + } + + for (uint32_t row = 0; row < KNOB_TILE_Y_DIM / SIMD_TILE_Y_DIM; ++row) + { + DstPtrs startPtrs = ptrs; + + for (uint32_t col = 0; col < KNOB_TILE_X_DIM / SIMD_TILE_X_DIM; ++col) + { + // Format conversion and convert from SOA to AOS, and store the rows. + ConvertPixelsSOAtoAOS::Convert(pSrc, ptrs.ppDsts); + + ptrs.ppDsts[0] += DST_COLUMN_BYTES_PER_SRC; + ptrs.ppDsts[1] += DST_COLUMN_BYTES_PER_SRC; + ptrs.ppDsts[2] += DST_COLUMN_BYTES_PER_SRC; + ptrs.ppDsts[3] += DST_COLUMN_BYTES_PER_SRC; + ptrs.ppDsts[4] += DST_COLUMN_BYTES_PER_SRC; + ptrs.ppDsts[5] += DST_COLUMN_BYTES_PER_SRC; + ptrs.ppDsts[6] += DST_COLUMN_BYTES_PER_SRC; + ptrs.ppDsts[7] += DST_COLUMN_BYTES_PER_SRC; + pSrc += SRC_COLUMN_BYTES; + } + + ptrs.ppDsts[0] = startPtrs.ppDsts[0] + 2 * pDstSurface->pitch; + ptrs.ppDsts[1] = startPtrs.ppDsts[1] + 2 * pDstSurface->pitch; + ptrs.ppDsts[2] = startPtrs.ppDsts[2] + 2 * pDstSurface->pitch; + ptrs.ppDsts[3] = startPtrs.ppDsts[3] + 2 * pDstSurface->pitch; + ptrs.ppDsts[4] = startPtrs.ppDsts[4] + 2 * pDstSurface->pitch; + ptrs.ppDsts[5] = startPtrs.ppDsts[5] + 2 * pDstSurface->pitch; + ptrs.ppDsts[6] = startPtrs.ppDsts[6] + 2 * pDstSurface->pitch; + ptrs.ppDsts[7] = startPtrs.ppDsts[7] + 2 * pDstSurface->pitch; + } +#endif + } +}; + +////////////////////////////////////////////////////////////////////////// +/// OptStoreRasterTile - TILE_MODE_YMAJOR specialization for 8bpp +////////////////////////////////////////////////////////////////////////// +template +struct OptStoreRasterTile< TilingTraits, SrcFormat, DstFormat> +{ + typedef StoreRasterTile, SrcFormat, DstFormat> GenericStoreTile; + static const size_t SRC_BYTES_PER_PIXEL = FormatTraits::bpp / 8; + + ////////////////////////////////////////////////////////////////////////// + /// @brief Stores an 8x8 raster tile to the destination surface. + /// @param pSrc - Pointer to raster tile. + /// @param pDstSurface - Destination surface state + /// @param x, y - Coordinates to raster tile. + INLINE static void Store( + uint8_t *pSrc, + SWR_SURFACE_STATE* pDstSurface, + uint32_t x, uint32_t y, uint32_t sampleNum, uint32_t renderTargetArrayIndex) + { + static const uint32_t DestRowWidthBytes = 16; // 16B rows + + // Punt non-full tiles to generic store + uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod, 1U); + uint32_t lodHeight = std::max(pDstSurface->height >> pDstSurface->lod, 1U); + + if (x + KNOB_TILE_X_DIM > lodWidth || y + KNOB_TILE_Y_DIM > lodHeight) + { + return GenericStoreTile::Store(pSrc, pDstSurface, x, y, sampleNum, renderTargetArrayIndex); + } + + // TileY is a column-major tiling mode where each 4KB tile consist of 8 columns of 32 x 16B rows. + // We can compute the offsets to each column within the raster tile once and increment from these. +#if USE_8x2_TILE_BACKEND + // There will be 4 8x2 simd tiles in an 8x8 raster tile. + uint8_t *pDst = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, + pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); + + const uint32_t dy = SIMD16_TILE_Y_DIM * DestRowWidthBytes; + + // The Hot Tile uses a row-major tiling mode and has a larger memory footprint. So we iterate in a row-major pattern. + uint8_t *ppDsts[] = + { + pDst, + pDst + DestRowWidthBytes, + pDst + DestRowWidthBytes / 4, + pDst + DestRowWidthBytes + DestRowWidthBytes / 4 + }; + + for (uint32_t yy = 0; yy < KNOB_TILE_Y_DIM; yy += SIMD16_TILE_Y_DIM) + { + // Raster tile width is same as simd16 tile width + static_assert(KNOB_TILE_X_DIM == SIMD16_TILE_X_DIM, "Invalid tile x dim"); + + ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); + + pSrc += KNOB_SIMD16_WIDTH * SRC_BYTES_PER_PIXEL; + + ppDsts[0] += dy; + ppDsts[1] += dy; + ppDsts[2] += dy; + ppDsts[3] += dy; + } +#else + // There will be 8 4x2 simd tiles in an 8x8 raster tile. + uint8_t* pCol0 = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, + pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); + + // Increment by a whole SIMD. 4x2 for AVX. 2x2 for SSE. + uint32_t pSrcInc = (FormatTraits::bpp * KNOB_SIMD_WIDTH) / 8; + + // The Hot Tile uses a row-major tiling mode and has a larger memory footprint. So we iterate in a row-major pattern. + for (uint32_t row = 0; row < KNOB_TILE_Y_DIM; row += SIMD_TILE_Y_DIM) + { + uint32_t rowOffset = row * DestRowWidthBytes; + + uint8_t* pRow = pCol0 + rowOffset; + uint8_t* ppDsts[] = { pRow, pRow + DestRowWidthBytes }; + + ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); + pSrc += pSrcInc; + + ppDsts[0] += DestRowWidthBytes / 4; + ppDsts[1] += DestRowWidthBytes / 4; + + ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); + pSrc += pSrcInc; + } +#endif + } +}; + +////////////////////////////////////////////////////////////////////////// +/// OptStoreRasterTile - TILE_MODE_YMAJOR specialization for 16bpp +////////////////////////////////////////////////////////////////////////// +template +struct OptStoreRasterTile< TilingTraits, SrcFormat, DstFormat> +{ + typedef StoreRasterTile, SrcFormat, DstFormat> GenericStoreTile; + static const size_t SRC_BYTES_PER_PIXEL = FormatTraits::bpp / 8; + + ////////////////////////////////////////////////////////////////////////// + /// @brief Stores an 8x8 raster tile to the destination surface. + /// @param pSrc - Pointer to raster tile. + /// @param pDstSurface - Destination surface state + /// @param x, y - Coordinates to raster tile. + INLINE static void Store( + uint8_t *pSrc, + SWR_SURFACE_STATE* pDstSurface, + uint32_t x, uint32_t y, uint32_t sampleNum, uint32_t renderTargetArrayIndex) + { + static const uint32_t DestRowWidthBytes = 16; // 16B rows + + // Punt non-full tiles to generic store + uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod, 1U); + uint32_t lodHeight = std::max(pDstSurface->height >> pDstSurface->lod, 1U); + + if (x + KNOB_TILE_X_DIM > lodWidth || y + KNOB_TILE_Y_DIM > lodHeight) + { + return GenericStoreTile::Store(pSrc, pDstSurface, x, y, sampleNum, renderTargetArrayIndex); + } + + // TileY is a column-major tiling mode where each 4KB tile consist of 8 columns of 32 x 16B rows. + // We can compute the offsets to each column within the raster tile once and increment from these. +#if USE_8x2_TILE_BACKEND + // There will be 4 8x2 simd tiles in an 8x8 raster tile. + uint8_t *pDst = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, + pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); + + const uint32_t dy = SIMD16_TILE_Y_DIM * DestRowWidthBytes; + + // The Hot Tile uses a row-major tiling mode and has a larger memory footprint. So we iterate in a row-major pattern. + uint8_t *ppDsts[] = + { + pDst, + pDst + DestRowWidthBytes, + pDst + DestRowWidthBytes / 2, + pDst + DestRowWidthBytes + DestRowWidthBytes / 2 + }; + + for (uint32_t yy = 0; yy < KNOB_TILE_Y_DIM; yy += SIMD16_TILE_Y_DIM) + { + // Raster tile width is same as simd16 tile width + static_assert(KNOB_TILE_X_DIM == SIMD16_TILE_X_DIM, "Invalid tile x dim"); + + ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); + + pSrc += KNOB_SIMD16_WIDTH * SRC_BYTES_PER_PIXEL; + + ppDsts[0] += dy; + ppDsts[1] += dy; + ppDsts[2] += dy; + ppDsts[3] += dy; + } +#else + // There will be 8 4x2 simd tiles in an 8x8 raster tile. + uint8_t* pCol0 = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, + pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); + + // Increment by a whole SIMD. 4x2 for AVX. 2x2 for SSE. + uint32_t pSrcInc = (FormatTraits::bpp * KNOB_SIMD_WIDTH) / 8; + + // The Hot Tile uses a row-major tiling mode and has a larger memory footprint. So we iterate in a row-major pattern. + for (uint32_t row = 0; row < KNOB_TILE_Y_DIM; row += SIMD_TILE_Y_DIM) + { + uint32_t rowOffset = row * DestRowWidthBytes; + + uint8_t* pRow = pCol0 + rowOffset; + uint8_t* ppDsts[] = { pRow, pRow + DestRowWidthBytes }; + + ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); + pSrc += pSrcInc; + + ppDsts[0] += DestRowWidthBytes / 2; + ppDsts[1] += DestRowWidthBytes / 2; + + ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); + pSrc += pSrcInc; + } +#endif + } +}; + +////////////////////////////////////////////////////////////////////////// +/// OptStoreRasterTile - TILE_MODE_XMAJOR specialization for 32bpp +////////////////////////////////////////////////////////////////////////// +template +struct OptStoreRasterTile< TilingTraits, SrcFormat, DstFormat> +{ + typedef StoreRasterTile, SrcFormat, DstFormat> GenericStoreTile; + static const size_t SRC_BYTES_PER_PIXEL = FormatTraits::bpp / 8; + static const size_t DST_BYTES_PER_PIXEL = FormatTraits::bpp / 8; + + ////////////////////////////////////////////////////////////////////////// + /// @brief Stores an 8x8 raster tile to the destination surface. + /// @param pSrc - Pointer to raster tile. + /// @param pDstSurface - Destination surface state + /// @param x, y - Coordinates to raster tile. + INLINE static void Store( + uint8_t *pSrc, + SWR_SURFACE_STATE* pDstSurface, + uint32_t x, uint32_t y, uint32_t sampleNum, uint32_t renderTargetArrayIndex) + { + static const uint32_t DestRowWidthBytes = 512; // 512B rows + + // Punt non-full tiles to generic store + uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod, 1U); + uint32_t lodHeight = std::max(pDstSurface->height >> pDstSurface->lod, 1U); + + if (x + KNOB_TILE_X_DIM > lodWidth || y + KNOB_TILE_Y_DIM > lodHeight) + { + return GenericStoreTile::Store(pSrc, pDstSurface, x, y, sampleNum, renderTargetArrayIndex); + } + + // TileX is a row-major tiling mode where each 4KB tile consist of 8 x 512B rows. + // We can compute the offsets to each column within the raster tile once and increment from these. +#if USE_8x2_TILE_BACKEND + uint8_t *pDst = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, + pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); + + const uint32_t dx = SIMD16_TILE_X_DIM * DST_BYTES_PER_PIXEL; + const uint32_t dy = SIMD16_TILE_Y_DIM * DestRowWidthBytes - KNOB_TILE_X_DIM * DST_BYTES_PER_PIXEL; + + uint8_t* ppDsts[] = + { + pDst, // row 0, col 0 + pDst + DestRowWidthBytes, // row 1, col 0 + pDst + dx / 2, // row 0, col 1 + pDst + DestRowWidthBytes + dx / 2 // row 1, col 1 + }; + + for (uint32_t yy = 0; yy < KNOB_TILE_Y_DIM; yy += SIMD16_TILE_Y_DIM) + { + for (uint32_t xx = 0; xx < KNOB_TILE_X_DIM; xx += SIMD16_TILE_X_DIM) + { + ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); + + pSrc += KNOB_SIMD16_WIDTH * SRC_BYTES_PER_PIXEL; + + ppDsts[0] += dx; + ppDsts[1] += dx; + ppDsts[2] += dx; + ppDsts[3] += dx; + } + + ppDsts[0] += dy; + ppDsts[1] += dy; + ppDsts[2] += dy; + ppDsts[3] += dy; + } +#else + uint8_t *pRow0 = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, + pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); + uint8_t* pRow1 = pRow0 + DestRowWidthBytes; + + for (uint32_t row = 0; row < KNOB_TILE_Y_DIM; row += SIMD_TILE_Y_DIM) + { + for (uint32_t col = 0; col < KNOB_TILE_X_DIM; col += SIMD_TILE_X_DIM) + { + uint32_t xRowOffset = col * (FormatTraits::bpp / 8); + + uint8_t* ppDsts[] = { pRow0 + xRowOffset, pRow1 + xRowOffset }; + ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); + + // Increment by a whole SIMD. 4x2 for AVX. 2x2 for SSE. + pSrc += (FormatTraits::bpp * KNOB_SIMD_WIDTH) / 8; + } + + pRow0 += (DestRowWidthBytes * 2); + pRow1 += (DestRowWidthBytes * 2); + } +#endif + } +}; + +////////////////////////////////////////////////////////////////////////// +/// OptStoreRasterTile - TILE_MODE_YMAJOR specialization for 32bpp +////////////////////////////////////////////////////////////////////////// +template +struct OptStoreRasterTile< TilingTraits, SrcFormat, DstFormat> +{ + typedef StoreRasterTile, SrcFormat, DstFormat> GenericStoreTile; + static const size_t SRC_BYTES_PER_PIXEL = FormatTraits::bpp / 8; + + ////////////////////////////////////////////////////////////////////////// + /// @brief Stores an 8x8 raster tile to the destination surface. + /// @param pSrc - Pointer to raster tile. + /// @param pDstSurface - Destination surface state + /// @param x, y - Coordinates to raster tile. + INLINE static void Store( + uint8_t *pSrc, + SWR_SURFACE_STATE* pDstSurface, + uint32_t x, uint32_t y, uint32_t sampleNum, uint32_t renderTargetArrayIndex) + { + static const uint32_t DestRowWidthBytes = 16; // 16B rows + static const uint32_t DestColumnBytes = DestRowWidthBytes * 32; // 16B x 32 rows. + + // Punt non-full tiles to generic store + uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod, 1U); + uint32_t lodHeight = std::max(pDstSurface->height >> pDstSurface->lod, 1U); + + if (x + KNOB_TILE_X_DIM > lodWidth || y + KNOB_TILE_Y_DIM > lodHeight) + { + return GenericStoreTile::Store(pSrc, pDstSurface, x, y, sampleNum, renderTargetArrayIndex); + } + + // TileY is a column-major tiling mode where each 4KB tile consist of 8 columns of 32 x 16B rows. + // We can compute the offsets to each column within the raster tile once and increment from these. +#if USE_8x2_TILE_BACKEND + // There will be 4 8x2 simd tiles in an 8x8 raster tile. + uint8_t *pDst = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, + pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); + + // we have to break these large spans up, since ConvertPixelsSOAtoAOS() can only work on max 16B spans (a TileY limitation) + const uint32_t dy = SIMD16_TILE_Y_DIM * DestRowWidthBytes; + + // The Hot Tile uses a row-major tiling mode and has a larger memory footprint. So we iterate in a row-major pattern. + uint8_t *ppDsts[] = + { + pDst, // row 0, col 0 + pDst + DestRowWidthBytes, // row 1, col 0 + pDst + DestColumnBytes, // row 0, col 1 + pDst + DestRowWidthBytes + DestColumnBytes // row 1, col 1 + }; + + for (uint32_t yy = 0; yy < KNOB_TILE_Y_DIM; yy += SIMD16_TILE_Y_DIM) + { + // Raster tile width is same as simd16 tile width + static_assert(KNOB_TILE_X_DIM == SIMD16_TILE_X_DIM, "Invalid tile x dim"); + + ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); + + pSrc += KNOB_SIMD16_WIDTH * SRC_BYTES_PER_PIXEL; + + ppDsts[0] += dy; + ppDsts[1] += dy; + ppDsts[2] += dy; + ppDsts[3] += dy; + } +#else + // There will be 8 4x2 simd tiles in an 8x8 raster tile. + uint8_t* pCol0 = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, + pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); + + // Increment by a whole SIMD. 4x2 for AVX. 2x2 for SSE. + uint32_t pSrcInc = (FormatTraits::bpp * KNOB_SIMD_WIDTH) / 8; + + // The Hot Tile uses a row-major tiling mode and has a larger memory footprint. So we iterate in a row-major pattern. + for (uint32_t row = 0; row < KNOB_TILE_Y_DIM; row += SIMD_TILE_Y_DIM) + { + uint32_t rowOffset = row * DestRowWidthBytes; + + uint8_t* pRow = pCol0 + rowOffset; + uint8_t* ppDsts[] = { pRow, pRow + DestRowWidthBytes }; + + ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); + pSrc += pSrcInc; + + ppDsts[0] += DestColumnBytes; + ppDsts[1] += DestColumnBytes; + + ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); + pSrc += pSrcInc; + } +#endif + } +}; + +////////////////////////////////////////////////////////////////////////// +/// OptStoreRasterTile - TILE_MODE_YMAJOR specialization for 64bpp +////////////////////////////////////////////////////////////////////////// +template +struct OptStoreRasterTile< TilingTraits, SrcFormat, DstFormat> +{ + typedef StoreRasterTile, SrcFormat, DstFormat> GenericStoreTile; + static const size_t SRC_BYTES_PER_PIXEL = FormatTraits::bpp / 8; + + ////////////////////////////////////////////////////////////////////////// + /// @brief Stores an 8x8 raster tile to the destination surface. + /// @param pSrc - Pointer to raster tile. + /// @param pDstSurface - Destination surface state + /// @param x, y - Coordinates to raster tile. + INLINE static void Store( + uint8_t *pSrc, + SWR_SURFACE_STATE* pDstSurface, + uint32_t x, uint32_t y, uint32_t sampleNum, uint32_t renderTargetArrayIndex) + { + static const uint32_t DestRowWidthBytes = 16; // 16B rows + static const uint32_t DestColumnBytes = DestRowWidthBytes * 32; // 16B x 32 rows. + + // Punt non-full tiles to generic store + uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod, 1U); + uint32_t lodHeight = std::max(pDstSurface->height >> pDstSurface->lod, 1U); + + if (x + KNOB_TILE_X_DIM > lodWidth || y + KNOB_TILE_Y_DIM > lodHeight) + { + return GenericStoreTile::Store(pSrc, pDstSurface, x, y, sampleNum, renderTargetArrayIndex); + } + + // TileY is a column-major tiling mode where each 4KB tile consist of 8 columns of 32 x 16B rows. + // We can compute the offsets to each column within the raster tile once and increment from these. +#if USE_8x2_TILE_BACKEND + // There will be 4 8x2 simd tiles in an 8x8 raster tile. + uint8_t *pDst = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, + pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); + + // we have to break these large spans up, since ConvertPixelsSOAtoAOS() can only work on max 16B spans (a TileY limitation) + const uint32_t dy = SIMD16_TILE_Y_DIM * DestRowWidthBytes; + + // The Hot Tile uses a row-major tiling mode and has a larger memory footprint. So we iterate in a row-major pattern. + uint8_t *ppDsts[] = + { + pDst, // row 0, col 0 + pDst + DestRowWidthBytes, // row 1, col 0 + pDst + DestColumnBytes, // row 0, col 1 + pDst + DestRowWidthBytes + DestColumnBytes, // row 1, col 1 + pDst + DestColumnBytes * 2, // row 0, col 2 + pDst + DestRowWidthBytes + DestColumnBytes * 2, // row 1, col 2 + pDst + DestColumnBytes * 3, // row 0, col 3 + pDst + DestRowWidthBytes + DestColumnBytes * 3 // row 1, col 3 + }; + + for (uint32_t yy = 0; yy < KNOB_TILE_Y_DIM; yy += SIMD16_TILE_Y_DIM) + { + // Raster tile width is same as simd16 tile width + static_assert(KNOB_TILE_X_DIM == SIMD16_TILE_X_DIM, "Invalid tile x dim"); + + ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); + + pSrc += KNOB_SIMD16_WIDTH * SRC_BYTES_PER_PIXEL; + + for (uint32_t i = 0; i < sizeof(ppDsts) / sizeof(ppDsts[0]); i += 1) + { + ppDsts[i] += dy; + } + } +#else + // There will be 8 4x2 simd tiles in an 8x8 raster tile. + uint8_t* pCol0 = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, + pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); + uint8_t* pCol1 = pCol0 + DestColumnBytes; + + // There are 4 columns, each 2 pixels wide when we have 64bpp pixels. + // Increment by a whole SIMD. 4x2 for AVX. 2x2 for SSE. + uint32_t pSrcInc = (FormatTraits::bpp * KNOB_SIMD_WIDTH) / 8; + + // The Hot Tile uses a row-major tiling mode and has a larger memory footprint. So we iterate in a row-major pattern. + for (uint32_t row = 0; row < KNOB_TILE_Y_DIM; row += SIMD_TILE_Y_DIM) + { + uint32_t rowOffset = row * DestRowWidthBytes; + uint8_t* ppDsts[] = + { + pCol0 + rowOffset, + pCol0 + rowOffset + DestRowWidthBytes, + pCol1 + rowOffset, + pCol1 + rowOffset + DestRowWidthBytes, + }; + + ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); + pSrc += pSrcInc; + + ppDsts[0] += DestColumnBytes * 2; + ppDsts[1] += DestColumnBytes * 2; + ppDsts[2] += DestColumnBytes * 2; + ppDsts[3] += DestColumnBytes * 2; + + ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); + pSrc += pSrcInc; + } +#endif + } +}; + +////////////////////////////////////////////////////////////////////////// +/// OptStoreRasterTile - SWR_TILE_MODE_YMAJOR specialization for 128bpp +////////////////////////////////////////////////////////////////////////// +template +struct OptStoreRasterTile< TilingTraits, SrcFormat, DstFormat> +{ + typedef StoreRasterTile, SrcFormat, DstFormat> GenericStoreTile; +#if USE_8x2_TILE_BACKEND + static const size_t SRC_BYTES_PER_PIXEL = FormatTraits::bpp / 8; + +#else + static const size_t TILE_Y_COL_WIDTH_BYTES = 16; + static const size_t TILE_Y_ROWS = 32; + static const size_t TILE_Y_COL_BYTES = TILE_Y_ROWS * TILE_Y_COL_WIDTH_BYTES; + + static const size_t DST_BYTES_PER_PIXEL = FormatTraits::bpp / 8; + static const size_t SRC_BYTES_PER_PIXEL = FormatTraits::bpp / 8; + static const size_t MAX_DST_COLUMN_BYTES = 16; + + static const size_t SRC_COLUMN_BYTES = KNOB_SIMD_WIDTH * SRC_BYTES_PER_PIXEL; + static const size_t DST_COLUMN_BYTES_PER_SRC = TILE_Y_COL_BYTES * 4; + +#endif + ////////////////////////////////////////////////////////////////////////// + /// @brief Stores an 8x8 raster tile to the destination surface. + /// @param pSrc - Pointer to raster tile. + /// @param pDstSurface - Destination surface state + /// @param x, y - Coordinates to raster tile. + INLINE static void Store( + uint8_t *pSrc, + SWR_SURFACE_STATE* pDstSurface, + uint32_t x, uint32_t y, uint32_t sampleNum, uint32_t renderTargetArrayIndex) + { +#if USE_8x2_TILE_BACKEND + static const uint32_t DestRowWidthBytes = 16; // 16B rows + static const uint32_t DestColumnBytes = DestRowWidthBytes * 32; // 16B x 32 rows. +#endif + + // Punt non-full tiles to generic store + uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod, 1U); + uint32_t lodHeight = std::max(pDstSurface->height >> pDstSurface->lod, 1U); + + if (x + KNOB_TILE_X_DIM > lodWidth || y + KNOB_TILE_Y_DIM > lodHeight) + { + return GenericStoreTile::Store(pSrc, pDstSurface, x, y, sampleNum, renderTargetArrayIndex); + } + + // TileY is a column-major tiling mode where each 4KB tile consist of 8 columns of 32 x 16B rows. + // We can compute the offsets to each column within the raster tile once and increment from these. +#if USE_8x2_TILE_BACKEND + // There will be 4 8x2 simd tiles in an 8x8 raster tile. + uint8_t *pDst = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, + pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); + + // we have to break these large spans up, since ConvertPixelsSOAtoAOS() can only work on max 16B spans (a TileY limitation) + const uint32_t dy = SIMD16_TILE_Y_DIM * DestRowWidthBytes; + + // The Hot Tile uses a row-major tiling mode and has a larger memory footprint. So we iterate in a row-major pattern. + uint8_t *ppDsts[] = + { + pDst, // row 0, col 0 + pDst + DestRowWidthBytes, // row 1, col 0 + pDst + DestColumnBytes, // row 0, col 1 + pDst + DestRowWidthBytes + DestColumnBytes, // row 1, col 1 + pDst + DestColumnBytes * 2, // row 0, col 2 + pDst + DestRowWidthBytes + DestColumnBytes * 2, // row 1, col 2 + pDst + DestColumnBytes * 3, // row 0, col 3 + pDst + DestRowWidthBytes + DestColumnBytes * 3, // row 1, col 3 + pDst + DestColumnBytes * 4, // row 0, col 4 + pDst + DestRowWidthBytes + DestColumnBytes * 4, // row 1, col 4 + pDst + DestColumnBytes * 5, // row 0, col 5 + pDst + DestRowWidthBytes + DestColumnBytes * 5, // row 1, col 5 + pDst + DestColumnBytes * 6, // row 0, col 6 + pDst + DestRowWidthBytes + DestColumnBytes * 6, // row 1, col 6 + pDst + DestColumnBytes * 7, // row 0, col 7 + pDst + DestRowWidthBytes + DestColumnBytes * 7 // row 1, col 7 + }; + + for (uint32_t yy = 0; yy < KNOB_TILE_Y_DIM; yy += SIMD16_TILE_Y_DIM) + { + // Raster tile width is same as simd16 tile width + static_assert(KNOB_TILE_X_DIM == SIMD16_TILE_X_DIM, "Invalid tile x dim"); + + ConvertPixelsSOAtoAOS::Convert(pSrc, ppDsts); + + pSrc += KNOB_SIMD16_WIDTH * SRC_BYTES_PER_PIXEL; + + for (uint32_t i = 0; i < sizeof(ppDsts) / sizeof(ppDsts[0]); i += 1) + { + ppDsts[i] += dy; + } + } +#else + // There will be 8 4x2 simd tiles in an 8x8 raster tile. + uint8_t* pDst = (uint8_t*)ComputeSurfaceAddress(x, y, pDstSurface->arrayIndex + renderTargetArrayIndex, + pDstSurface->arrayIndex + renderTargetArrayIndex, sampleNum, pDstSurface->lod, pDstSurface); + struct DstPtrs + { + uint8_t* ppDsts[8]; + } ptrs; + + // Need 8 pointers, 4 columns of 2 rows each + for (uint32_t y = 0; y < 2; ++y) + { + for (uint32_t x = 0; x < 4; ++x) + { + ptrs.ppDsts[x * 2 + y] = pDst + y * TILE_Y_COL_WIDTH_BYTES + x * TILE_Y_COL_BYTES; + } + } + + for (uint32_t row = 0; row < KNOB_TILE_Y_DIM / SIMD_TILE_Y_DIM; ++row) + { + DstPtrs startPtrs = ptrs; + + for (uint32_t col = 0; col < KNOB_TILE_X_DIM / SIMD_TILE_X_DIM; ++col) + { + // Format conversion and convert from SOA to AOS, and store the rows. + ConvertPixelsSOAtoAOS::Convert(pSrc, ptrs.ppDsts); + + ptrs.ppDsts[0] += DST_COLUMN_BYTES_PER_SRC; + ptrs.ppDsts[1] += DST_COLUMN_BYTES_PER_SRC; + ptrs.ppDsts[2] += DST_COLUMN_BYTES_PER_SRC; + ptrs.ppDsts[3] += DST_COLUMN_BYTES_PER_SRC; + ptrs.ppDsts[4] += DST_COLUMN_BYTES_PER_SRC; + ptrs.ppDsts[5] += DST_COLUMN_BYTES_PER_SRC; + ptrs.ppDsts[6] += DST_COLUMN_BYTES_PER_SRC; + ptrs.ppDsts[7] += DST_COLUMN_BYTES_PER_SRC; + pSrc += SRC_COLUMN_BYTES; + } + + ptrs.ppDsts[0] = startPtrs.ppDsts[0] + 2 * TILE_Y_COL_WIDTH_BYTES; + ptrs.ppDsts[1] = startPtrs.ppDsts[1] + 2 * TILE_Y_COL_WIDTH_BYTES; + ptrs.ppDsts[2] = startPtrs.ppDsts[2] + 2 * TILE_Y_COL_WIDTH_BYTES; + ptrs.ppDsts[3] = startPtrs.ppDsts[3] + 2 * TILE_Y_COL_WIDTH_BYTES; + ptrs.ppDsts[4] = startPtrs.ppDsts[4] + 2 * TILE_Y_COL_WIDTH_BYTES; + ptrs.ppDsts[5] = startPtrs.ppDsts[5] + 2 * TILE_Y_COL_WIDTH_BYTES; + ptrs.ppDsts[6] = startPtrs.ppDsts[6] + 2 * TILE_Y_COL_WIDTH_BYTES; + ptrs.ppDsts[7] = startPtrs.ppDsts[7] + 2 * TILE_Y_COL_WIDTH_BYTES; + } +#endif + } +}; + +////////////////////////////////////////////////////////////////////////// +/// StoreMacroTile - Stores a macro tile which consists of raster tiles. +////////////////////////////////////////////////////////////////////////// +template +struct StoreMacroTile +{ + ////////////////////////////////////////////////////////////////////////// + /// @brief Stores a macrotile to the destination surface using safe implementation. + /// @param pSrc - Pointer to macro tile. + /// @param pDstSurface - Destination surface state + /// @param x, y - Coordinates to macro tile + static void StoreGeneric( + uint8_t *pSrcHotTile, + SWR_SURFACE_STATE* pDstSurface, + uint32_t x, uint32_t y, uint32_t renderTargetArrayIndex) + { + PFN_STORE_TILES_INTERNAL pfnStore; + pfnStore = StoreRasterTile::Store; + + // Store each raster tile from the hot tile to the destination surface. + for (uint32_t row = 0; row < KNOB_MACROTILE_Y_DIM; row += KNOB_TILE_Y_DIM) + { + for (uint32_t col = 0; col < KNOB_MACROTILE_X_DIM; col += KNOB_TILE_X_DIM) + { + for (uint32_t sampleNum = 0; sampleNum < pDstSurface->numSamples; sampleNum++) + { + pfnStore(pSrcHotTile, pDstSurface, (x + col), (y + row), sampleNum, renderTargetArrayIndex); + pSrcHotTile += KNOB_TILE_X_DIM * KNOB_TILE_Y_DIM * (FormatTraits::bpp / 8); + } + } + } + + } + + typedef void(*PFN_STORE_TILES_INTERNAL)(uint8_t*, SWR_SURFACE_STATE*, uint32_t, uint32_t, uint32_t, uint32_t); + ////////////////////////////////////////////////////////////////////////// + /// @brief Stores a macrotile to the destination surface. + /// @param pSrc - Pointer to macro tile. + /// @param pDstSurface - Destination surface state + /// @param x, y - Coordinates to macro tile + static void Store( + uint8_t *pSrcHotTile, + SWR_SURFACE_STATE* pDstSurface, + uint32_t x, uint32_t y, uint32_t renderTargetArrayIndex) + { + PFN_STORE_TILES_INTERNAL pfnStore[SWR_MAX_NUM_MULTISAMPLES]; + + for (uint32_t sampleNum = 0; sampleNum < pDstSurface->numSamples; sampleNum++) + { + size_t dstSurfAddress = (size_t)ComputeSurfaceAddress( + 0, + 0, + pDstSurface->arrayIndex + renderTargetArrayIndex, // z for 3D surfaces + pDstSurface->arrayIndex + renderTargetArrayIndex, // array index for 2D arrays + sampleNum, + pDstSurface->lod, + pDstSurface); + + // Only support generic store-tile if lod surface doesn't start on a page boundary and is non-linear + bool bForceGeneric = ((pDstSurface->tileMode != SWR_TILE_NONE) && (0 != (dstSurfAddress & 0xfff))) || + (pDstSurface->bInterleavedSamples); + + pfnStore[sampleNum] = (bForceGeneric || KNOB_USE_GENERIC_STORETILE) ? StoreRasterTile::Store : OptStoreRasterTile::Store; + } + + // Store each raster tile from the hot tile to the destination surface. + for(uint32_t row = 0; row < KNOB_MACROTILE_Y_DIM; row += KNOB_TILE_Y_DIM) + { + for(uint32_t col = 0; col < KNOB_MACROTILE_X_DIM; col += KNOB_TILE_X_DIM) + { + for(uint32_t sampleNum = 0; sampleNum < pDstSurface->numSamples; sampleNum++) + { + pfnStore[sampleNum](pSrcHotTile, pDstSurface, (x + col), (y + row), sampleNum, renderTargetArrayIndex); + pSrcHotTile += KNOB_TILE_X_DIM * KNOB_TILE_Y_DIM * (FormatTraits::bpp / 8); + } + } + } + } +}; + +////////////////////////////////////////////////////////////////////////// +/// InitStoreTilesTable - Helper for setting up the tables. +template +void InitStoreTilesTableColor_Half1( + PFN_STORE_TILES (&table)[NumTileModesT][ArraySizeT]) +{ + table[TTileMode][R32G32B32A32_FLOAT] = StoreMacroTile, R32G32B32A32_FLOAT, R32G32B32A32_FLOAT>::Store; + table[TTileMode][R32G32B32A32_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, R32G32B32A32_SINT>::Store; + table[TTileMode][R32G32B32A32_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R32G32B32A32_UINT>::Store; + table[TTileMode][R32G32B32X32_FLOAT] = StoreMacroTile, R32G32B32A32_FLOAT, R32G32B32X32_FLOAT>::Store; + table[TTileMode][R32G32B32A32_SSCALED] = StoreMacroTile, R32G32B32A32_FLOAT, R32G32B32A32_SSCALED>::Store; + table[TTileMode][R32G32B32A32_USCALED] = StoreMacroTile, R32G32B32A32_FLOAT, R32G32B32A32_USCALED>::Store; + table[TTileMode][R32G32B32_FLOAT] = StoreMacroTile, R32G32B32A32_FLOAT, R32G32B32_FLOAT>::Store; + table[TTileMode][R32G32B32_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, R32G32B32_SINT>::Store; + table[TTileMode][R32G32B32_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R32G32B32_UINT>::Store; + table[TTileMode][R32G32B32_SSCALED] = StoreMacroTile, R32G32B32A32_FLOAT, R32G32B32_SSCALED>::Store; + table[TTileMode][R32G32B32_USCALED] = StoreMacroTile, R32G32B32A32_FLOAT, R32G32B32_USCALED>::Store; + table[TTileMode][R16G16B16A16_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16A16_UNORM>::Store; + table[TTileMode][R16G16B16A16_SNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16A16_SNORM>::Store; + table[TTileMode][R16G16B16A16_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16A16_SINT>::Store; + table[TTileMode][R16G16B16A16_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16A16_UINT>::Store; + table[TTileMode][R16G16B16A16_FLOAT] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16A16_FLOAT>::Store; + table[TTileMode][R32G32_FLOAT] = StoreMacroTile, R32G32B32A32_FLOAT, R32G32_FLOAT>::Store; + table[TTileMode][R32G32_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, R32G32_SINT>::Store; + table[TTileMode][R32G32_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R32G32_UINT>::Store; + table[TTileMode][R32_FLOAT_X8X24_TYPELESS] = StoreMacroTile, R32G32B32A32_FLOAT, R32_FLOAT_X8X24_TYPELESS>::Store; + table[TTileMode][X32_TYPELESS_G8X24_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, X32_TYPELESS_G8X24_UINT>::Store; + table[TTileMode][R16G16B16X16_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16X16_UNORM>::Store; + table[TTileMode][R16G16B16X16_FLOAT] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16X16_FLOAT>::Store; + table[TTileMode][R16G16B16A16_SSCALED] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16A16_SSCALED>::Store; + table[TTileMode][R16G16B16A16_USCALED] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16A16_USCALED>::Store; + table[TTileMode][R32G32_SSCALED] = StoreMacroTile, R32G32B32A32_FLOAT, R32G32_SSCALED>::Store; + table[TTileMode][R32G32_USCALED] = StoreMacroTile, R32G32B32A32_FLOAT, R32G32_USCALED>::Store; + table[TTileMode][B8G8R8A8_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, B8G8R8A8_UNORM>::Store; + table[TTileMode][B8G8R8A8_UNORM_SRGB] = StoreMacroTile, R32G32B32A32_FLOAT, B8G8R8A8_UNORM_SRGB>::Store; + table[TTileMode][R10G10B10A2_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R10G10B10A2_UNORM>::StoreGeneric; + table[TTileMode][R10G10B10A2_UNORM_SRGB] = StoreMacroTile, R32G32B32A32_FLOAT, R10G10B10A2_UNORM_SRGB>::StoreGeneric; + table[TTileMode][R10G10B10A2_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R10G10B10A2_UINT>::StoreGeneric; + table[TTileMode][R8G8B8A8_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8A8_UNORM>::Store; + table[TTileMode][R8G8B8A8_UNORM_SRGB] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8A8_UNORM_SRGB>::Store; + table[TTileMode][R8G8B8A8_SNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8A8_SNORM>::Store; + table[TTileMode][R8G8B8A8_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8A8_SINT>::Store; + table[TTileMode][R8G8B8A8_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8A8_UINT>::Store; + table[TTileMode][R16G16_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16_UNORM>::Store; + table[TTileMode][R16G16_SNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16_SNORM>::Store; + table[TTileMode][R16G16_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16_SINT>::Store; + table[TTileMode][R16G16_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16_UINT>::Store; + table[TTileMode][R16G16_FLOAT] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16_FLOAT>::Store; + table[TTileMode][B10G10R10A2_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, B10G10R10A2_UNORM>::StoreGeneric; + table[TTileMode][B10G10R10A2_UNORM_SRGB] = StoreMacroTile, R32G32B32A32_FLOAT, B10G10R10A2_UNORM_SRGB>::StoreGeneric; + table[TTileMode][R11G11B10_FLOAT] = StoreMacroTile, R32G32B32A32_FLOAT, R11G11B10_FLOAT>::StoreGeneric; + table[TTileMode][R10G10B10_FLOAT_A2_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R10G10B10_FLOAT_A2_UNORM>::StoreGeneric; + table[TTileMode][R32_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, R32_SINT>::Store; + table[TTileMode][R32_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R32_UINT>::Store; + table[TTileMode][R32_FLOAT] = StoreMacroTile, R32G32B32A32_FLOAT, R32_FLOAT>::Store; + table[TTileMode][R24_UNORM_X8_TYPELESS] = StoreMacroTile, R32G32B32A32_FLOAT, R24_UNORM_X8_TYPELESS>::StoreGeneric; + table[TTileMode][X24_TYPELESS_G8_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, X24_TYPELESS_G8_UINT>::StoreGeneric; + table[TTileMode][A32_FLOAT] = StoreMacroTile, R32G32B32A32_FLOAT, A32_FLOAT>::Store; + table[TTileMode][B8G8R8X8_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, B8G8R8X8_UNORM>::Store; + table[TTileMode][B8G8R8X8_UNORM_SRGB] = StoreMacroTile, R32G32B32A32_FLOAT, B8G8R8X8_UNORM_SRGB>::Store; + table[TTileMode][R8G8B8X8_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8X8_UNORM>::Store; + table[TTileMode][R8G8B8X8_UNORM_SRGB] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8X8_UNORM_SRGB>::Store; +} + +template +void InitStoreTilesTableColor_Half2( + PFN_STORE_TILES(&table)[NumTileModesT][ArraySizeT]) +{ + table[TTileMode][R9G9B9E5_SHAREDEXP] = StoreMacroTile, R32G32B32A32_FLOAT, R9G9B9E5_SHAREDEXP>::StoreGeneric; + table[TTileMode][B10G10R10X2_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, B10G10R10X2_UNORM>::StoreGeneric; + table[TTileMode][R10G10B10X2_USCALED] = StoreMacroTile, R32G32B32A32_FLOAT, R10G10B10X2_USCALED>::StoreGeneric; + table[TTileMode][R8G8B8A8_SSCALED] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8A8_SSCALED>::Store; + table[TTileMode][R8G8B8A8_USCALED] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8A8_USCALED>::Store; + table[TTileMode][R16G16_SSCALED] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16_SSCALED>::Store; + table[TTileMode][R16G16_USCALED] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16_USCALED>::Store; + table[TTileMode][R32_SSCALED] = StoreMacroTile, R32G32B32A32_FLOAT, R32_SSCALED>::Store; + table[TTileMode][R32_USCALED] = StoreMacroTile, R32G32B32A32_FLOAT, R32_USCALED>::Store; + table[TTileMode][B5G6R5_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, B5G6R5_UNORM>::Store; + table[TTileMode][B5G6R5_UNORM_SRGB] = StoreMacroTile, R32G32B32A32_FLOAT, B5G6R5_UNORM_SRGB>::StoreGeneric; + table[TTileMode][B5G5R5A1_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, B5G5R5A1_UNORM>::StoreGeneric; + table[TTileMode][B5G5R5A1_UNORM_SRGB] = StoreMacroTile, R32G32B32A32_FLOAT, B5G5R5A1_UNORM_SRGB>::StoreGeneric; + table[TTileMode][B4G4R4A4_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, B4G4R4A4_UNORM>::StoreGeneric; + table[TTileMode][B4G4R4A4_UNORM_SRGB] = StoreMacroTile, R32G32B32A32_FLOAT, B4G4R4A4_UNORM_SRGB>::StoreGeneric; + table[TTileMode][R8G8_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8_UNORM>::Store; + table[TTileMode][R8G8_SNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8_SNORM>::Store; + table[TTileMode][R8G8_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8_SINT>::Store; + table[TTileMode][R8G8_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8_UINT>::Store; + table[TTileMode][R16_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R16_UNORM>::Store; + table[TTileMode][R16_SNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R16_SNORM>::Store; + table[TTileMode][R16_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, R16_SINT>::Store; + table[TTileMode][R16_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R16_UINT>::Store; + table[TTileMode][R16_FLOAT] = StoreMacroTile, R32G32B32A32_FLOAT, R16_FLOAT>::Store; + table[TTileMode][A16_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, A16_UNORM>::Store; + table[TTileMode][A16_FLOAT] = StoreMacroTile, R32G32B32A32_FLOAT, A16_FLOAT>::Store; + table[TTileMode][B5G5R5X1_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, B5G5R5X1_UNORM>::StoreGeneric; + table[TTileMode][B5G5R5X1_UNORM_SRGB] = StoreMacroTile, R32G32B32A32_FLOAT, B5G5R5X1_UNORM_SRGB>::StoreGeneric; + table[TTileMode][R8G8_SSCALED] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8_SSCALED>::Store; + table[TTileMode][R8G8_USCALED] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8_USCALED>::Store; + table[TTileMode][R16_SSCALED] = StoreMacroTile, R32G32B32A32_FLOAT, R16_SSCALED>::Store; + table[TTileMode][R16_USCALED] = StoreMacroTile, R32G32B32A32_FLOAT, R16_USCALED>::Store; + table[TTileMode][A1B5G5R5_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, A1B5G5R5_UNORM>::StoreGeneric; + table[TTileMode][A4B4G4R4_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, A4B4G4R4_UNORM>::StoreGeneric; + table[TTileMode][R8_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R8_UNORM>::Store; + table[TTileMode][R8_SNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R8_SNORM>::Store; + table[TTileMode][R8_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, R8_SINT>::Store; + table[TTileMode][R8_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R8_UINT>::Store; + table[TTileMode][A8_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, A8_UNORM>::Store; + table[TTileMode][R8_SSCALED] = StoreMacroTile, R32G32B32A32_FLOAT, R8_SSCALED>::Store; + table[TTileMode][R8_USCALED] = StoreMacroTile, R32G32B32A32_FLOAT, R8_USCALED>::Store; + table[TTileMode][R8G8B8_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8_UNORM>::Store; + table[TTileMode][R8G8B8_SNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8_SNORM>::Store; + table[TTileMode][R8G8B8_SSCALED] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8_SSCALED>::Store; + table[TTileMode][R8G8B8_USCALED] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8_USCALED>::Store; + table[TTileMode][R16G16B16_FLOAT] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16_FLOAT>::Store; + table[TTileMode][R16G16B16_UNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16_UNORM>::Store; + table[TTileMode][R16G16B16_SNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16_SNORM>::Store; + table[TTileMode][R16G16B16_SSCALED] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16_SSCALED>::Store; + table[TTileMode][R16G16B16_USCALED] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16_USCALED>::Store; + table[TTileMode][R8G8B8_UNORM_SRGB] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8_UNORM_SRGB>::Store; + table[TTileMode][R16G16B16_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16_UINT>::Store; + table[TTileMode][R16G16B16_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, R16G16B16_SINT>::Store; + table[TTileMode][R10G10B10A2_SNORM] = StoreMacroTile, R32G32B32A32_FLOAT, R10G10B10A2_SNORM>::StoreGeneric; + table[TTileMode][R10G10B10A2_USCALED] = StoreMacroTile, R32G32B32A32_FLOAT, R10G10B10A2_USCALED>::StoreGeneric; + table[TTileMode][R10G10B10A2_SSCALED] = StoreMacroTile, R32G32B32A32_FLOAT, R10G10B10A2_SSCALED>::StoreGeneric; + table[TTileMode][R10G10B10A2_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, R10G10B10A2_SINT>::StoreGeneric; + table[TTileMode][B10G10R10A2_SNORM] = StoreMacroTile, R32G32B32A32_FLOAT, B10G10R10A2_SNORM>::StoreGeneric; + table[TTileMode][B10G10R10A2_USCALED] = StoreMacroTile, R32G32B32A32_FLOAT, B10G10R10A2_USCALED>::StoreGeneric; + table[TTileMode][B10G10R10A2_SSCALED] = StoreMacroTile, R32G32B32A32_FLOAT, B10G10R10A2_SSCALED>::StoreGeneric; + table[TTileMode][B10G10R10A2_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, B10G10R10A2_UINT>::StoreGeneric; + table[TTileMode][B10G10R10A2_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, B10G10R10A2_SINT>::StoreGeneric; + table[TTileMode][R8G8B8_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8_UINT>::Store; + table[TTileMode][R8G8B8_SINT] = StoreMacroTile, R32G32B32A32_FLOAT, R8G8B8_SINT>::Store; +} + +////////////////////////////////////////////////////////////////////////// +/// INIT_STORE_TILES_TABLE - Helper macro for setting up the tables. +template +void InitStoreTilesTableDepth( + PFN_STORE_TILES(&table)[NumTileModes][ArraySizeT]) +{ + table[TTileMode][R32_FLOAT] = StoreMacroTile, R32_FLOAT, R32_FLOAT>::Store; + table[TTileMode][R32_FLOAT_X8X24_TYPELESS] = StoreMacroTile, R32_FLOAT, R32_FLOAT_X8X24_TYPELESS>::Store; + table[TTileMode][R24_UNORM_X8_TYPELESS] = StoreMacroTile, R32_FLOAT, R24_UNORM_X8_TYPELESS>::Store; + table[TTileMode][R16_UNORM] = StoreMacroTile, R32_FLOAT, R16_UNORM>::Store; +} + +template +void InitStoreTilesTableStencil( + PFN_STORE_TILES(&table)[NumTileModes][ArraySizeT]) +{ + table[TTileMode][R8_UINT] = StoreMacroTile, R8_UINT, R8_UINT>::Store; +} diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/StoreTile_Linear2.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/StoreTile_Linear2.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/StoreTile_Linear2.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/StoreTile_Linear2.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,33 @@ +/**************************************************************************** +* Copyright (C) 2016 Intel Corporation. All Rights Reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice (including the next +* paragraph) shall be included in all copies or substantial portions of the +* Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +* IN THE SOFTWARE. +* +* @file StoreTile_Linear.cpp +* +* @brief Functionality for Store. +* +******************************************************************************/ +#include "StoreTile.h" + +void InitStoreTilesTable_Linear_2() +{ + InitStoreTilesTableColor_Half2(sStoreTilesTableColor); +} diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/StoreTile_Linear.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/StoreTile_Linear.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/StoreTile_Linear.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/StoreTile_Linear.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,35 @@ +/**************************************************************************** +* Copyright (C) 2016 Intel Corporation. All Rights Reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice (including the next +* paragraph) shall be included in all copies or substantial portions of the +* Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +* IN THE SOFTWARE. +* +* @file StoreTile_Linear.cpp +* +* @brief Functionality for Store. +* +******************************************************************************/ +#include "StoreTile.h" + +void InitStoreTilesTable_Linear_1() +{ + InitStoreTilesTableColor_Half1(sStoreTilesTableColor); + InitStoreTilesTableDepth(sStoreTilesTableDepth); + InitStoreTilesTableStencil(sStoreTilesTableStencil); +} diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/StoreTile_TileW.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/StoreTile_TileW.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/StoreTile_TileW.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/StoreTile_TileW.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,35 @@ +/**************************************************************************** +* Copyright (C) 2016 Intel Corporation. All Rights Reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice (including the next +* paragraph) shall be included in all copies or substantial portions of the +* Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +* IN THE SOFTWARE. +* +* @file StoreTile_TileW.cpp +* +* @brief Functionality for Store. +* +******************************************************************************/ +#include "StoreTile.h" + +void InitStoreTilesTable_TileW() +{ + InitStoreTilesTableStencil(sStoreTilesTableStencil); + // special color hot tile -> 8-bit WMAJOR + sStoreTilesTableColor[SWR_TILE_MODE_WMAJOR][R8_UINT] = StoreMacroTile, R32G32B32A32_FLOAT, R8_UINT>::Store; +} diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/StoreTile_TileX2.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/StoreTile_TileX2.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/StoreTile_TileX2.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/StoreTile_TileX2.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,33 @@ +/**************************************************************************** +* Copyright (C) 2016 Intel Corporation. All Rights Reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice (including the next +* paragraph) shall be included in all copies or substantial portions of the +* Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +* IN THE SOFTWARE. +* +* @file StoreTile_TIleX.cpp +* +* @brief Functionality for Store. +* +******************************************************************************/ +#include "StoreTile.h" + +void InitStoreTilesTable_TileX_2() +{ + InitStoreTilesTableColor_Half2(sStoreTilesTableColor); +} diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/StoreTile_TileX.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/StoreTile_TileX.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/StoreTile_TileX.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/StoreTile_TileX.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,33 @@ +/**************************************************************************** +* Copyright (C) 2016 Intel Corporation. All Rights Reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice (including the next +* paragraph) shall be included in all copies or substantial portions of the +* Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +* IN THE SOFTWARE. +* +* @file StoreTile_TIleX.cpp +* +* @brief Functionality for Store. +* +******************************************************************************/ +#include "StoreTile.h" + +void InitStoreTilesTable_TileX_1() +{ + InitStoreTilesTableColor_Half1(sStoreTilesTableColor); +} diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/StoreTile_TileY2.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/StoreTile_TileY2.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/StoreTile_TileY2.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/StoreTile_TileY2.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,33 @@ +/**************************************************************************** +* Copyright (C) 2016 Intel Corporation. All Rights Reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice (including the next +* paragraph) shall be included in all copies or substantial portions of the +* Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +* IN THE SOFTWARE. +* +* @file StoreTile_TileY.cpp +* +* @brief Functionality for Store. +* +******************************************************************************/ +#include "StoreTile.h" + +void InitStoreTilesTable_TileY_2() +{ + InitStoreTilesTableColor_Half2(sStoreTilesTableColor); +} diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/StoreTile_TileY.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/StoreTile_TileY.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/StoreTile_TileY.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/StoreTile_TileY.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,34 @@ +/**************************************************************************** +* Copyright (C) 2016 Intel Corporation. All Rights Reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice (including the next +* paragraph) shall be included in all copies or substantial portions of the +* Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +* IN THE SOFTWARE. +* +* @file StoreTile_TileY.cpp +* +* @brief Functionality for Store. +* +******************************************************************************/ +#include "StoreTile.h" + +void InitStoreTilesTable_TileY_1() +{ + InitStoreTilesTableColor_Half1(sStoreTilesTableColor); + InitStoreTilesTableDepth(sStoreTilesTableDepth); +} diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/TilingFunctions.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/TilingFunctions.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/memory/TilingFunctions.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/memory/TilingFunctions.h 2017-06-01 10:37:10.000000000 +0000 @@ -153,6 +153,107 @@ } }; +#if ENABLE_AVX512_SIMD16 +////////////////////////////////////////////////////////////////////////// +/// SimdTile 8x2 for AVX-512 +////////////////////////////////////////////////////////////////////////// + +template +struct SimdTile_16 +{ + // SimdTile is SOA (e.g. rrrrrrrrrrrrrrrr gggggggggggggggg bbbbbbbbbbbbbbbb aaaaaaaaaaaaaaaa ) + float color[FormatTraits::numComps][KNOB_SIMD16_WIDTH]; + + ////////////////////////////////////////////////////////////////////////// + /// @brief Retrieve color from simd. + /// @param index - linear index to color within simd. + /// @param outputColor - output color + INLINE void GetSwizzledColor( + uint32_t index, + float outputColor[4]) + { + // SOA pattern for 8x2.. + // 0 1 4 5 8 9 C D + // 2 3 6 7 A B E F + // The offset converts pattern to linear + static const uint32_t offset[KNOB_SIMD16_WIDTH] = { 0, 1, 4, 5, 8, 9, 12, 13, 2, 3, 6, 7, 10, 11, 14, 15 }; + + for (uint32_t i = 0; i < FormatTraits::numComps; ++i) + { + outputColor[i] = this->color[FormatTraits::swizzle(i)][offset[index]]; + } + } + + ////////////////////////////////////////////////////////////////////////// + /// @brief Retrieve color from simd. + /// @param index - linear index to color within simd. + /// @param outputColor - output color + INLINE void SetSwizzledColor( + uint32_t index, + const float src[4]) + { + // SOA pattern for 8x2.. + // 0 1 4 5 8 9 C D + // 2 3 6 7 A B E F + // The offset converts pattern to linear + static const uint32_t offset[KNOB_SIMD16_WIDTH] = { 0, 1, 4, 5, 8, 9, 12, 13, 2, 3, 6, 7, 10, 11, 14, 15 }; + + for (uint32_t i = 0; i < FormatTraits::numComps; ++i) + { + this->color[i][offset[index]] = src[i]; + } + } +}; + +template<> +struct SimdTile_16 +{ + // SimdTile is SOA (e.g. rrrrrrrrrrrrrrrr gggggggggggggggg bbbbbbbbbbbbbbbb aaaaaaaaaaaaaaaa ) + uint8_t color[FormatTraits::numComps][KNOB_SIMD16_WIDTH]; + + ////////////////////////////////////////////////////////////////////////// + /// @brief Retrieve color from simd. + /// @param index - linear index to color within simd. + /// @param outputColor - output color + INLINE void GetSwizzledColor( + uint32_t index, + float outputColor[4]) + { + // SOA pattern for 8x2.. + // 0 1 4 5 8 9 C D + // 2 3 6 7 A B E F + // The offset converts pattern to linear + static const uint32_t offset[KNOB_SIMD16_WIDTH] = { 0, 1, 4, 5, 8, 9, 12, 13, 2, 3, 6, 7, 10, 11, 14, 15 }; + + for (uint32_t i = 0; i < FormatTraits::numComps; ++i) + { + uint32_t src = this->color[FormatTraits::swizzle(i)][offset[index]]; + outputColor[i] = *(float*)&src; + } + } + + ////////////////////////////////////////////////////////////////////////// + /// @brief Retrieve color from simd. + /// @param index - linear index to color within simd. + /// @param outputColor - output color + INLINE void SetSwizzledColor( + uint32_t index, + const float src[4]) + { + // SOA pattern for 8x2.. + // 0 1 4 5 8 9 C D + // 2 3 6 7 A B E F + // The offset converts pattern to linear + static const uint32_t offset[KNOB_SIMD16_WIDTH] = { 0, 1, 4, 5, 8, 9, 12, 13, 2, 3, 6, 7, 10, 11, 14, 15 }; + + for (uint32_t i = 0; i < FormatTraits::numComps; ++i) + { + this->color[i][offset[index]] = *(uint8_t*)&src[i]; + } + } +}; + +#endif ////////////////////////////////////////////////////////////////////////// /// @brief Computes lod offset for 1D surface at specified lod. /// @param baseWidth - width of basemip (mip 0). @@ -173,18 +274,21 @@ else { uint32_t curWidth = baseWidth; - // translate mip width from pixels to blocks for block compressed formats - // @note hAlign is already in blocks for compressed formats so no need to convert - if (info.isBC) curWidth /= info.bcWidth; + // @note hAlign is already in blocks for compressed formats so upconvert + // so that we have the desired alignment post-divide. + if (info.isBC) + { + hAlign *= info.bcWidth; + } offset = GFX_ALIGN(curWidth, hAlign); for (uint32_t l = 1; l < lod; ++l) { - curWidth = GFX_ALIGN(std::max(curWidth >> 1, 1U), hAlign); - offset += curWidth; + curWidth = std::max(curWidth >> 1, 1U); + offset += GFX_ALIGN(curWidth, hAlign); } - if (info.isSubsampled) + if (info.isSubsampled || info.isBC) { offset /= info.bcWidth; } @@ -211,14 +315,17 @@ else { uint32_t curWidth = baseWidth; - // convert mip width from pixels to blocks for block compressed formats - // @note hAlign is already in blocks for compressed formats so no need to convert - if (info.isBC) curWidth /= info.bcWidth; + // @note hAlign is already in blocks for compressed formats so upconvert + // so that we have the desired alignment post-divide. + if (info.isBC) + { + hAlign *= info.bcWidth; + } curWidth = std::max(curWidth >> 1, 1U); curWidth = GFX_ALIGN(curWidth, hAlign); - if (info.isSubsampled) + if (info.isSubsampled || info.isBC) { curWidth /= info.bcWidth; } @@ -249,9 +356,12 @@ offset = 0; uint32_t mipHeight = baseHeight; - // translate mip height from pixels to blocks for block compressed formats - // @note VAlign is already in blocks for compressed formats so no need to convert - if (info.isBC) mipHeight /= info.bcHeight; + // @note vAlign is already in blocks for compressed formats so upconvert + // so that we have the desired alignment post-divide. + if (info.isBC) + { + vAlign *= info.bcHeight; + } for (uint32_t l = 1; l <= lod; ++l) { @@ -259,6 +369,11 @@ offset += ((l != 2) ? alignedMipHeight : 0); mipHeight = std::max(mipHeight >> 1, 1U); } + + if (info.isBC) + { + offset /= info.bcHeight; + } } } @@ -565,6 +680,8 @@ return (uint32_t) NULL; } +typedef void*(*PFN_COMPUTESURFADDR)(uint32_t, uint32_t, uint32_t, uint32_t, uint32_t, uint32_t, const SWR_SURFACE_STATE*); + ////////////////////////////////////////////////////////////////////////// /// @brief Computes surface address at the given location and lod /// @param x - x location in pixels @@ -573,7 +690,7 @@ /// @param array - array slice for 1D and 2D surfaces /// @param lod - level of detail /// @param pState - pointer to the surface state -template +template INLINE void* ComputeSurfaceAddress(uint32_t x, uint32_t y, uint32_t z, uint32_t array, uint32_t sampleNum, uint32_t lod, const SWR_SURFACE_STATE *pState) { diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/scripts/gen_archrast.py mesa-17.0.7/src/gallium/drivers/swr/rasterizer/scripts/gen_archrast.py --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/scripts/gen_archrast.py 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/scripts/gen_archrast.py 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,215 @@ +# Copyright (C) 2014-2016 Intel Corporation. All Rights Reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +# IN THE SOFTWARE. + +# Python source +from __future__ import print_function +import os +import sys +import re +import argparse +from mako.template import Template +from mako.exceptions import RichTraceback + +def write_template_to_string(template_filename, **kwargs): + try: + template = Template(filename=template_filename) + # Split + Join fixes line-endings for whatever platform you are using + return '\n'.join(template.render(**kwargs).splitlines()) + except: + traceback = RichTraceback() + for (filename, lineno, function, line) in traceback.traceback: + print("File %s, line %s, in %s" % (filename, lineno, function)) + print(line, "\n") + print("%s: %s" % (str(traceback.error.__class__.__name__), traceback.error)) + +def write_template_to_file(template_filename, output_filename, **kwargs): + with open(output_filename, "w") as outfile: + print(write_template_to_string(template_filename, **kwargs), file=outfile) + +def parse_event_fields(lines, idx, event_dict): + field_names = [] + field_types = [] + end_of_event = False + + num_fields = 0 + + # record all fields in event definition. + # note: we don't check if there's a leading brace. + while not end_of_event and idx < len(lines): + line = lines[idx].rstrip() + idx += 1 + + field = re.match(r"(\s*)(\w+)(\s*)(\w+)", line) + + if field: + field_types.append(field.group(2)) + field_names.append(field.group(4)) + num_fields += 1 + + end_of_event = re.match(r"(\s*)};", line) + + event_dict['field_types'] = field_types + event_dict['field_names'] = field_names + event_dict['num_fields'] = num_fields + + return idx + +def parse_enums(lines, idx, event_dict): + enum_names = [] + end_of_enum = False + + # record all enum values in enumeration + # note: we don't check if there's a leading brace. + while not end_of_enum and idx < len(lines): + line = lines[idx].rstrip() + idx += 1 + + preprocessor = re.search(r"#if|#endif", line) + + if not preprocessor: + enum = re.match(r"(\s*)(\w+)(\s*)", line) + + if enum: + enum_names.append(line) + + end_of_enum = re.match(r"(\s*)};", line) + + event_dict['names'] = enum_names + return idx + +def parse_protos(filename): + protos = {} + + with open(filename, 'r') as f: + lines=f.readlines() + + idx = 0 + + protos['events'] = {} # event dictionary containing events with their fields + protos['event_names'] = [] # needed to keep events in order parsed. dict is not ordered. + protos['enums'] = {} + protos['enum_names'] = [] + + eventId = 0 + raw_text = [] + while idx < len(lines): + line = lines[idx].rstrip() + idx += 1 + + # search for event definitions. + match = re.match(r"(\s*)event(\s*)(\w+)", line) + + if match: + eventId += 1 + event_name = match.group(3) + protos['event_names'].append(event_name) + + protos['events'][event_name] = {} + protos['events'][event_name]['event_id'] = eventId + idx = parse_event_fields(lines, idx, protos['events'][event_name]) + + # search for enums. + match = re.match(r"(\s*)enum(\s*)(\w+)", line) + + if match: + enum_name = match.group(3) + protos['enum_names'].append(enum_name) + + protos['enums'][enum_name] = {} + idx = parse_enums(lines, idx, protos['enums'][enum_name]) + + return protos + +def main(): + + # Parse args... + parser = argparse.ArgumentParser() + parser.add_argument("--proto", "-p", help="Path to proto file", required=True) + parser.add_argument("--output", "-o", help="Output filename (i.e. event.h)", required=True) + parser.add_argument("--gen_event_h", "-geh", help="Generate event header", action="store_true", default=False) + parser.add_argument("--gen_event_cpp", "-gec", help="Generate event cpp", action="store_true", default=False) + parser.add_argument("--gen_eventhandler_h", "-gehh", help="Generate eventhandler header", action="store_true", default=False) + parser.add_argument("--gen_eventhandlerfile_h", "-gehf", help="Generate eventhandler header for writing to files", action="store_true", default=False) + args = parser.parse_args() + + proto_filename = args.proto + + (output_dir, output_filename) = os.path.split(args.output) + + if not output_dir: + output_dir = "." + + #print("output_dir = %s" % output_dir, file=sys.stderr) + #print("output_filename = %s" % output_filename, file=sys.stderr) + + if not os.path.exists(proto_filename): + print("Error: Could not find proto file %s" % proto_filename, file=sys.stderr) + return 1 + + protos = parse_protos(proto_filename) + + # Generate event header + if args.gen_event_h: + curdir = os.path.dirname(os.path.abspath(__file__)) + template_file = os.sep.join([curdir, 'templates', 'ar_event_h.template']) + output_fullpath = os.sep.join([output_dir, output_filename]) + + write_template_to_file(template_file, output_fullpath, + filename=output_filename, + protos=protos) + + # Generate event implementation + if args.gen_event_cpp: + curdir = os.path.dirname(os.path.abspath(__file__)) + template_file = os.sep.join([curdir, 'templates', 'ar_event_cpp.template']) + output_fullpath = os.sep.join([output_dir, output_filename]) + + write_template_to_file(template_file, output_fullpath, + filename=output_filename, + protos=protos) + + # Generate event handler header + if args.gen_eventhandler_h: + curdir = os.path.dirname(os.path.abspath(__file__)) + template_file = os.sep.join([curdir, 'templates', 'ar_eventhandler_h.template']) + output_fullpath = os.sep.join([output_dir, output_filename]) + + write_template_to_file(template_file, output_fullpath, + filename=output_filename, + event_header="gen_ar_event.h", # todo: fix this! + protos=protos) + + # Generate event handler header + if args.gen_eventhandlerfile_h: + curdir = os.path.dirname(os.path.abspath(__file__)) + template_file = os.sep.join([curdir, 'templates', 'ar_eventhandlerfile_h.template']) + output_fullpath = os.sep.join([output_dir, output_filename]) + + write_template_to_file(template_file, output_fullpath, + filename=output_filename, + event_header="gen_ar_eventhandler.h", # todo: fix this! + protos=protos) + + return 0 + +if __name__ == '__main__': + sys.exit(main()) + diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/scripts/gen_knobs.cpp mesa-17.0.7/src/gallium/drivers/swr/rasterizer/scripts/gen_knobs.cpp --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/scripts/gen_knobs.cpp 2017-01-24 01:43:36.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/scripts/gen_knobs.cpp 2017-06-01 10:38:09.000000000 +0000 @@ -37,8 +37,8 @@ //======================================================== GlobalKnobs::GlobalKnobs() { + InitKnob(ENABLE_ASSERT_DIALOGS); InitKnob(SINGLE_THREADED); - InitKnob(HYPERTHREADED_FE); InitKnob(DUMP_SHADER_IR); InitKnob(USE_GENERIC_STORETILE); InitKnob(FAST_CLEAR); @@ -52,7 +52,7 @@ InitKnob(MAX_DRAWS_IN_FLIGHT); InitKnob(MAX_PRIMS_PER_DRAW); InitKnob(MAX_TESS_PRIMS_PER_DRAW); - InitKnob(BUCKETS_ENABLE_THREADVIZ); + InitKnob(DEBUG_OUTPUT_DIR); InitKnob(TOSS_DRAW); InitKnob(TOSS_QUEUE_FE); InitKnob(TOSS_FETCH); @@ -73,10 +73,10 @@ if (optPerLinePrefix == nullptr) { optPerLinePrefix = ""; } + str << optPerLinePrefix << "KNOB_ENABLE_ASSERT_DIALOGS: "; + str << (KNOB_ENABLE_ASSERT_DIALOGS ? "+\n" : "-\n"); str << optPerLinePrefix << "KNOB_SINGLE_THREADED: "; str << (KNOB_SINGLE_THREADED ? "+\n" : "-\n"); - str << optPerLinePrefix << "KNOB_HYPERTHREADED_FE: "; - str << (KNOB_HYPERTHREADED_FE ? "+\n" : "-\n"); str << optPerLinePrefix << "KNOB_DUMP_SHADER_IR: "; str << (KNOB_DUMP_SHADER_IR ? "+\n" : "-\n"); str << optPerLinePrefix << "KNOB_USE_GENERIC_STORETILE: "; @@ -113,8 +113,8 @@ str << optPerLinePrefix << "KNOB_MAX_TESS_PRIMS_PER_DRAW: "; str << std::hex << std::setw(11) << std::left << KNOB_MAX_TESS_PRIMS_PER_DRAW; str << std::dec << KNOB_MAX_TESS_PRIMS_PER_DRAW << "\n"; - str << optPerLinePrefix << "KNOB_BUCKETS_ENABLE_THREADVIZ: "; - str << (KNOB_BUCKETS_ENABLE_THREADVIZ ? "+\n" : "-\n"); + str << optPerLinePrefix << "KNOB_DEBUG_OUTPUT_DIR: "; + str << KNOB_DEBUG_OUTPUT_DIR << "\n"; str << optPerLinePrefix << "KNOB_TOSS_DRAW: "; str << (KNOB_TOSS_DRAW ? "+\n" : "-\n"); str << optPerLinePrefix << "KNOB_TOSS_QUEUE_FE: "; diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/scripts/gen_knobs.h mesa-17.0.7/src/gallium/drivers/swr/rasterizer/scripts/gen_knobs.h --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/scripts/gen_knobs.h 2017-01-24 01:43:36.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/scripts/gen_knobs.h 2017-06-01 10:38:09.000000000 +0000 @@ -51,23 +51,20 @@ struct GlobalKnobs { //----------------------------------------------------------- - // KNOB_SINGLE_THREADED + // KNOB_ENABLE_ASSERT_DIALOGS // - // If enabled will perform all rendering on the API thread. - // This is useful mainly for debugging purposes. + // Use dialogs when asserts fire. + // Asserts are only enabled in debug builds // - DEFINE_KNOB(SINGLE_THREADED, bool, false); + DEFINE_KNOB(ENABLE_ASSERT_DIALOGS, bool, true); //----------------------------------------------------------- - // KNOB_HYPERTHREADED_FE + // KNOB_SINGLE_THREADED // - // EXPERIMENTAL!! - // If enabled will attempt to use secondary threads per core to perform - // front-end (VS/GS) work. - // - // Note: Setting this will cause KNOB_MAX_THREADS_PER_CORE to be ignored. + // If enabled will perform all rendering on the API thread. + // This is useful mainly for debugging purposes. // - DEFINE_KNOB(HYPERTHREADED_FE, bool, false); + DEFINE_KNOB(SINGLE_THREADED, bool, false); //----------------------------------------------------------- // KNOB_DUMP_SHADER_IR @@ -162,8 +159,9 @@ // KNOB_MAX_DRAWS_IN_FLIGHT // // Maximum number of draws outstanding before API thread blocks. + // This value MUST be evenly divisible into 2^32 // - DEFINE_KNOB(MAX_DRAWS_IN_FLIGHT, uint32_t, 96); + DEFINE_KNOB(MAX_DRAWS_IN_FLIGHT, uint32_t, 128); //----------------------------------------------------------- // KNOB_MAX_PRIMS_PER_DRAW @@ -184,11 +182,11 @@ DEFINE_KNOB(MAX_TESS_PRIMS_PER_DRAW, uint32_t, 16); //----------------------------------------------------------- - // KNOB_BUCKETS_ENABLE_THREADVIZ + // KNOB_DEBUG_OUTPUT_DIR // - // Enable threadviz output. + // Output directory for debug data. // - DEFINE_KNOB(BUCKETS_ENABLE_THREADVIZ, bool, false); + DEFINE_KNOB(DEBUG_OUTPUT_DIR, std::string, "/tmp/Rast/DebugOutput"); //----------------------------------------------------------- // KNOB_TOSS_DRAW @@ -265,8 +263,10 @@ }; extern GlobalKnobs g_GlobalKnobs; +#undef DEFINE_KNOB + +#define KNOB_ENABLE_ASSERT_DIALOGS GET_KNOB(ENABLE_ASSERT_DIALOGS) #define KNOB_SINGLE_THREADED GET_KNOB(SINGLE_THREADED) -#define KNOB_HYPERTHREADED_FE GET_KNOB(HYPERTHREADED_FE) #define KNOB_DUMP_SHADER_IR GET_KNOB(DUMP_SHADER_IR) #define KNOB_USE_GENERIC_STORETILE GET_KNOB(USE_GENERIC_STORETILE) #define KNOB_FAST_CLEAR GET_KNOB(FAST_CLEAR) @@ -280,7 +280,7 @@ #define KNOB_MAX_DRAWS_IN_FLIGHT GET_KNOB(MAX_DRAWS_IN_FLIGHT) #define KNOB_MAX_PRIMS_PER_DRAW GET_KNOB(MAX_PRIMS_PER_DRAW) #define KNOB_MAX_TESS_PRIMS_PER_DRAW GET_KNOB(MAX_TESS_PRIMS_PER_DRAW) -#define KNOB_BUCKETS_ENABLE_THREADVIZ GET_KNOB(BUCKETS_ENABLE_THREADVIZ) +#define KNOB_DEBUG_OUTPUT_DIR GET_KNOB(DEBUG_OUTPUT_DIR) #define KNOB_TOSS_DRAW GET_KNOB(TOSS_DRAW) #define KNOB_TOSS_QUEUE_FE GET_KNOB(TOSS_QUEUE_FE) #define KNOB_TOSS_FETCH GET_KNOB(TOSS_FETCH) diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/scripts/gen_knobs.py mesa-17.0.7/src/gallium/drivers/swr/rasterizer/scripts/gen_knobs.py --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/scripts/gen_knobs.py 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/scripts/gen_knobs.py 2017-06-01 10:37:10.000000000 +0000 @@ -23,13 +23,14 @@ from __future__ import print_function import os import sys +import argparse import knob_defs from mako.template import Template from mako.exceptions import RichTraceback def write_template_to_string(template_filename, **kwargs): try: - template = Template(filename=template_filename) + template = Template(filename=os.path.abspath(template_filename)) # Split + Join fixes line-endings for whatever platform you are using return '\n'.join(template.render(**kwargs).splitlines()) except: @@ -40,37 +41,39 @@ print("%s: %s" % (str(traceback.error.__class__.__name__), traceback.error)) def write_template_to_file(template_filename, output_filename, **kwargs): + output_dirname = os.path.dirname(output_filename) + if not os.path.exists(output_dirname): + os.makedirs(output_dirname) with open(output_filename, "w") as outfile: print(write_template_to_string(template_filename, **kwargs), file=outfile) def main(args=sys.argv[1:]): - if len(args) != 1: - print('Usage:', sys.argv[0], '', file=sys.stderr) - return 1 - - output_dir = args[0] - if not os.path.isdir(output_dir): - if os.path.exists(output_dir): - print('ERROR: Invalid output directory:', output_dir, file=sys.stderr) - return 1 - - try: - os.makedirs(output_dir) - except: - print('ERROR: Could not create output directory:', output_dir, file=sys.stderr) - return 1 - - # Output path exists, now just run the template - template_file = os.sep.join([sys.path[0], 'templates', 'knobs.template']) - output_file = os.sep.join([output_dir, 'gen_knobs.cpp']) - output_header = os.sep.join([output_dir, 'gen_knobs.h']) - - for f in [output_header, output_file]: - write_template_to_file(template_file, f, - filename='gen_knobs', - knobs=knob_defs.KNOBS, - includes=['core/knobs_init.h', 'common/os.h', 'sstream', 'iomanip'], - gen_header=True if f == output_header else False) + + # parse args + parser = argparse.ArgumentParser() + parser.add_argument("--input", "-i", help="Path to knobs.template", required=True) + parser.add_argument("--output", "-o", help="Path to output file", required=True) + parser.add_argument("--gen_h", "-gen_h", help="Generate gen_knobs.h", action="store_true", default=False) + parser.add_argument("--gen_cpp", "-gen_cpp", help="Generate gen_knobs.cpp", action="store_true", required=False) + + args = parser.parse_args() + + if args.input: + if args.gen_h: + write_template_to_file(args.input, + args.output, + filename='gen_knobs', + knobs=knob_defs.KNOBS, + includes=['core/knobs_init.h', 'common/os.h', 'sstream', 'iomanip'], + gen_header=True) + + if args.gen_cpp: + write_template_to_file(args.input, + args.output, + filename='gen_knobs', + knobs=knob_defs.KNOBS, + includes=['core/knobs_init.h', 'common/os.h', 'sstream', 'iomanip'], + gen_header=False) return 0 diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/scripts/knob_defs.py mesa-17.0.7/src/gallium/drivers/swr/rasterizer/scripts/knob_defs.py --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/scripts/knob_defs.py 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/scripts/knob_defs.py 2017-06-01 10:37:10.000000000 +0000 @@ -22,24 +22,20 @@ # Python source KNOBS = [ - ['SINGLE_THREADED', { + ['ENABLE_ASSERT_DIALOGS', { 'type' : 'bool', - 'default' : 'false', - 'desc' : ['If enabled will perform all rendering on the API thread.', - 'This is useful mainly for debugging purposes.'], + 'default' : 'true', + 'desc' : ['Use dialogs when asserts fire.', + 'Asserts are only enabled in debug builds'], 'category' : 'debug', }], - ['HYPERTHREADED_FE', { + ['SINGLE_THREADED', { 'type' : 'bool', 'default' : 'false', - 'desc' : ['EXPERIMENTAL!!', - 'If enabled will attempt to use secondary threads per core to perform', - 'front-end (VS/GS) work.', - '', - 'Note: Setting this will cause KNOB_MAX_THREADS_PER_CORE to be ignored.'], - 'category' : 'perf', - 'advanced' : 'true', + 'desc' : ['If enabled will perform all rendering on the API thread.', + 'This is useful mainly for debugging purposes.'], + 'category' : 'debug', }], ['DUMP_SHADER_IR', { @@ -133,8 +129,9 @@ ['MAX_DRAWS_IN_FLIGHT', { 'type' : 'uint32_t', - 'default' : '96', - 'desc' : ['Maximum number of draws outstanding before API thread blocks.'], + 'default' : '128', + 'desc' : ['Maximum number of draws outstanding before API thread blocks.', + 'This value MUST be evenly divisible into 2^32'], 'category' : 'perf', }], @@ -157,11 +154,11 @@ }], - ['BUCKETS_ENABLE_THREADVIZ', { - 'type' : 'bool', - 'default' : 'false', - 'desc' : ['Enable threadviz output.'], - 'category' : 'perf', + ['DEBUG_OUTPUT_DIR', { + 'type' : 'std::string', + 'default' : '/tmp/Rast/DebugOutput', + 'desc' : ['Output directory for debug data.'], + 'category' : 'debug', }], ['TOSS_DRAW', { diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/scripts/templates/ar_event_cpp.template mesa-17.0.7/src/gallium/drivers/swr/rasterizer/scripts/templates/ar_event_cpp.template --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/scripts/templates/ar_event_cpp.template 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/scripts/templates/ar_event_cpp.template 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,41 @@ +/**************************************************************************** +* Copyright (C) 2016 Intel Corporation. All Rights Reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice (including the next +* paragraph) shall be included in all copies or substantial portions of the +* Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +* IN THE SOFTWARE. +* +* @file ${filename} +* +* @brief Implementation for events. auto-generated file +* +* DO NOT EDIT +* +******************************************************************************/ +#include "common/os.h" +#include "gen_ar_event.h" +#include "gen_ar_eventhandler.h" + +using namespace ArchRast; +% for name in protos['event_names']: + +void ${name}::Accept(EventHandler* pHandler) +{ + pHandler->Handle(*this); +} +% endfor diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/scripts/templates/ar_eventhandlerfile_h.template mesa-17.0.7/src/gallium/drivers/swr/rasterizer/scripts/templates/ar_eventhandlerfile_h.template --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/scripts/templates/ar_eventhandlerfile_h.template 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/scripts/templates/ar_eventhandlerfile_h.template 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,155 @@ +/**************************************************************************** +* Copyright (C) 2016 Intel Corporation. All Rights Reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice (including the next +* paragraph) shall be included in all copies or substantial portions of the +* Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +* IN THE SOFTWARE. +* +* @file ${filename} +* +* @brief Event handler interface. auto-generated file +* +* DO NOT EDIT +* +******************************************************************************/ +#pragma once + +#include "common/os.h" +#include "${event_header}" +#include +#include + +namespace ArchRast +{ + ////////////////////////////////////////////////////////////////////////// + /// EventHandlerFile - interface for handling events. + ////////////////////////////////////////////////////////////////////////// + class EventHandlerFile : public EventHandler + { + public: + EventHandlerFile(uint32_t id) + : mBufOffset(0) + { +#if defined(_WIN32) + DWORD pid = GetCurrentProcessId(); + TCHAR procname[MAX_PATH]; + GetModuleFileName(NULL, procname, MAX_PATH); + const char* pBaseName = strrchr(procname, '\\'); + std::stringstream outDir; + outDir << KNOB_DEBUG_OUTPUT_DIR << pBaseName << "_" << pid << std::ends; + CreateDirectory(outDir.str().c_str(), NULL); + + char buf[255]; + // There could be multiple threads creating thread pools. We + // want to make sure they are uniquly identified by adding in + // the creator's thread id into the filename. + sprintf(buf, "%s\\ar_event%d_%d.bin", outDir.str().c_str(), GetCurrentThreadId(), id); + mFilename = std::string(buf); +#else + char buf[255]; + // There could be multiple threads creating thread pools. We + // want to make sure they are uniquly identified by adding in + // the creator's thread id into the filename. + sprintf(buf, "%s/ar_event%d_%d.bin", "/tmp", GetCurrentThreadId(), id); + mFilename = std::string(buf); +#endif + } + + virtual ~EventHandlerFile() + { + FlushBuffer(); + } + + ////////////////////////////////////////////////////////////////////////// + /// @brief Flush buffer to file. + bool FlushBuffer() + { + if (mBufOffset > 0) + { + if (mBufOffset == mHeaderBufOffset) + { + // Nothing to flush. Only header has been generated. + return false; + } + + std::ofstream file; + file.open(mFilename, std::ios::out | std::ios::app | std::ios::binary); + + if (!file.is_open()) + { + SWR_ASSERT(0, "ArchRast: Could not open event file!"); + return false; + } + + file.write((char*)mBuffer, mBufOffset); + file.close(); + + mBufOffset = 0; + mHeaderBufOffset = 0; // Reset header offset so its no longer considered. + } + return true; + } + + ////////////////////////////////////////////////////////////////////////// + /// @brief Write event and its payload to the memory buffer. + void Write(uint32_t eventId, const char* pBlock, uint32_t size) + { + if ((mBufOffset + size + sizeof(eventId)) > mBufferSize) + { + if (!FlushBuffer()) + { + // Don't corrupt what's already in the buffer? + /// @todo Maybe add corrupt marker to buffer here in case we can open file in future? + return; + } + } + + memcpy(&mBuffer[mBufOffset], (char*)&eventId, sizeof(eventId)); + mBufOffset += sizeof(eventId); + memcpy(&mBuffer[mBufOffset], pBlock, size); + mBufOffset += size; + } + +% for name in protos['event_names']: + ////////////////////////////////////////////////////////////////////////// + /// @brief Handle ${name} event + virtual void Handle(${name} event) + { +% if protos['events'][name]['num_fields'] == 0: + Write(${protos['events'][name]['event_id']}, (char*)&event.data, 0); +% else: + Write(${protos['events'][name]['event_id']}, (char*)&event.data, sizeof(event.data)); +%endif + } +% endfor + + ////////////////////////////////////////////////////////////////////////// + /// @brief Everything written to buffer this point is the header. + virtual void MarkHeader() + { + mHeaderBufOffset = mBufOffset; + } + + std::string mFilename; + + static const uint32_t mBufferSize = 1024; + uint8_t mBuffer[mBufferSize]; + uint32_t mBufOffset{0}; + uint32_t mHeaderBufOffset{0}; + }; +} diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/scripts/templates/ar_eventhandler_h.template mesa-17.0.7/src/gallium/drivers/swr/rasterizer/scripts/templates/ar_eventhandler_h.template --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/scripts/templates/ar_eventhandler_h.template 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/scripts/templates/ar_eventhandler_h.template 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,49 @@ +/**************************************************************************** +* Copyright (C) 2016 Intel Corporation. All Rights Reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice (including the next +* paragraph) shall be included in all copies or substantial portions of the +* Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +* IN THE SOFTWARE. +* +* @file ${filename} +* +* @brief Event handler interface. auto-generated file +* +* DO NOT EDIT +* +******************************************************************************/ +#pragma once + +#include "${event_header}" + +namespace ArchRast +{ + ////////////////////////////////////////////////////////////////////////// + /// EventHandler - interface for handling events. + ////////////////////////////////////////////////////////////////////////// + class EventHandler + { + public: + EventHandler() {} + virtual ~EventHandler() {} + +% for name in protos['event_names']: + virtual void Handle(${name} event) {} +% endfor + }; +} diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/scripts/templates/ar_event_h.template mesa-17.0.7/src/gallium/drivers/swr/rasterizer/scripts/templates/ar_event_h.template --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/scripts/templates/ar_event_h.template 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/scripts/templates/ar_event_h.template 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,105 @@ +/**************************************************************************** +* Copyright (C) 2016 Intel Corporation. All Rights Reserved. +* +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice (including the next +* paragraph) shall be included in all copies or substantial portions of the +* Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +* IN THE SOFTWARE. +* +* @file ${filename} +* +* @brief Definitions for events. auto-generated file +* +* DO NOT EDIT +* +******************************************************************************/ +#pragma once + +#include "common/os.h" +#include "core/state.h" + +namespace ArchRast +{ +% for name in protos['enum_names']: + enum ${name} + {<% names = protos['enums'][name]['names'] %> + % for i in range(len(names)): + ${names[i].lstrip()} + % endfor + }; +% endfor + + //Forward decl + class EventHandler; + + ////////////////////////////////////////////////////////////////////////// + /// Event - interface for handling events. + ////////////////////////////////////////////////////////////////////////// + struct Event + { + Event() {} + virtual ~Event() {} + + virtual void Accept(EventHandler* pHandler) = 0; + }; +% for name in protos['event_names']: + + ////////////////////////////////////////////////////////////////////////// + /// ${name}Data + ////////////////////////////////////////////////////////////////////////// +#pragma pack(push, 1) + struct ${name}Data + {<% + field_names = protos['events'][name]['field_names'] + field_types = protos['events'][name]['field_types'] %> + // Fields + % for i in range(len(field_names)): + ${field_types[i]} ${field_names[i]}; + % endfor + }; +#pragma pack(pop) + + ////////////////////////////////////////////////////////////////////////// + /// ${name} + ////////////////////////////////////////////////////////////////////////// + struct ${name} : Event + {<% + field_names = protos['events'][name]['field_names'] + field_types = protos['events'][name]['field_types'] %> + ${name}Data data; + + // Constructor + ${name}( + % for i in range(len(field_names)): + % if i < len(field_names)-1: + ${field_types[i]} ${field_names[i]}, + % endif + % if i == len(field_names)-1: + ${field_types[i]} ${field_names[i]} + % endif + % endfor + ) + { + % for i in range(len(field_names)): + data.${field_names[i]} = ${field_names[i]}; + % endfor + } + + virtual void Accept(EventHandler* pHandler); + }; +% endfor +} \ No newline at end of file diff -Nru mesa-12.0.6/src/gallium/drivers/swr/rasterizer/scripts/templates/knobs.template mesa-17.0.7/src/gallium/drivers/swr/rasterizer/scripts/templates/knobs.template --- mesa-12.0.6/src/gallium/drivers/swr/rasterizer/scripts/templates/knobs.template 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/rasterizer/scripts/templates/knobs.template 2017-06-01 10:37:10.000000000 +0000 @@ -112,6 +112,8 @@ }; extern GlobalKnobs g_GlobalKnobs; +#undef DEFINE_KNOB + % for knob in knobs: #define KNOB_${knob[0]}${space_knob(knob[0])} GET_KNOB(${knob[0]}) % endfor diff -Nru mesa-12.0.6/src/gallium/drivers/swr/SConscript mesa-17.0.7/src/gallium/drivers/swr/SConscript --- mesa-12.0.6/src/gallium/drivers/swr/SConscript 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/SConscript 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,217 @@ +Import('*') + +from sys import executable as python_cmd +import os.path +import distutils.version + +if not env['swr']: + Return() + +if not env['llvm']: + print 'warning: LLVM disabled: not building swr' + env['swr'] = False + Return() + +if env['LLVM_VERSION'] < distutils.version.LooseVersion('3.9'): + print "warning: swr requires LLVM >= 3.9: not building swr" + env['swr'] = False + Return() + +if env['platform'] != 'windows': + print "warning: swr scons build only supports windows: not building swr" + env['swr'] = False + Return() + +env.MSVC2013Compat() + +env = env.Clone() + +# construct llvm include dir +if env['platform'] == 'windows': + # on windows there is no llvm-config, so LLVM is defined + llvm_includedir = os.path.join(os.environ['LLVM'], 'include') +else: + llvm_config = os.environ.get('LLVM_CONFIG', 'llvm-config') + llvm_includedir = env.backtick('%s --includedir' % llvm_config).rstrip() + print "llvm include dir %s" % llvm_includedir + +# the loader is included in the mesa lib itself +# All the remaining files are in loadable modules +loadersource = env.ParseSourceList('Makefile.sources', [ + 'LOADER_SOURCES' +]) + +env.Append(CPPDEFINES = [ + '__STDC_CONSTANT_MACROS', + '__STDC_LIMIT_MACROS' + ]) + +if not env['msvc'] : + env.Append(CCFLAGS = [ + '-std=c++11', + ]) + +swrroot = '#src/gallium/drivers/swr/' + +env.CodeGenerate( + target = 'rasterizer/scripts/gen_knobs.cpp', + script = swrroot + 'rasterizer/scripts/gen_knobs.py', + source = 'rasterizer/scripts/templates/knobs.template', + command = python_cmd + ' $SCRIPT --input $SOURCE --output $TARGET --gen_cpp' +) + +env.CodeGenerate( + target = 'rasterizer/scripts/gen_knobs.h', + script = swrroot + 'rasterizer/scripts/gen_knobs.py', + source = 'rasterizer/scripts/templates/knobs.template', + command = python_cmd + ' $SCRIPT --input $SOURCE --output $TARGET --gen_h' +) + +env.CodeGenerate( + target = 'rasterizer/jitter/state_llvm.h', + script = swrroot + 'rasterizer/jitter/scripts/gen_llvm_types.py', + source = 'rasterizer/core/state.h', + command = python_cmd + ' $SCRIPT --input $SOURCE --output $TARGET' +) + +env.CodeGenerate( + target = 'rasterizer/jitter/builder_gen.h', + script = swrroot + 'rasterizer/jitter/scripts/gen_llvm_ir_macros.py', + source = os.path.join(llvm_includedir, 'llvm/IR/IRBuilder.h'), + command = python_cmd + ' $SCRIPT --input $SOURCE --output $TARGET --gen_h' +) + +env.CodeGenerate( + target = 'rasterizer/jitter/builder_gen.cpp', + script = swrroot + 'rasterizer/jitter/scripts/gen_llvm_ir_macros.py', + source = os.path.join(llvm_includedir, 'llvm/IR/IRBuilder.h'), + command = python_cmd + ' $SCRIPT --input $SOURCE --output $TARGET --gen_cpp' +) + +env.CodeGenerate( + target = 'rasterizer/jitter/builder_x86.h', + script = swrroot + 'rasterizer/jitter/scripts/gen_llvm_ir_macros.py', + source = '', + command = python_cmd + ' $SCRIPT --output $TARGET --gen_x86_h' +) + +env.CodeGenerate( + target = 'rasterizer/jitter/builder_x86.cpp', + script = swrroot + 'rasterizer/jitter/scripts/gen_llvm_ir_macros.py', + source = '', + command = python_cmd + ' $SCRIPT --output $TARGET --gen_x86_cpp' +) + +env.CodeGenerate( + target = 'swr_context_llvm.h', + script = swrroot + 'rasterizer/jitter/scripts/gen_llvm_types.py', + source = 'swr_context.h', + command = python_cmd + ' $SCRIPT --input $SOURCE --output $TARGET' +) + +env.CodeGenerate( + target = 'rasterizer/archrast/gen_ar_event.h', + script = swrroot + 'rasterizer/scripts/gen_archrast.py', + source = 'rasterizer/archrast/events.proto', + command = python_cmd + ' $SCRIPT --proto $SOURCE --output $TARGET --gen_event_h' +) + +env.CodeGenerate( + target = 'rasterizer/archrast/gen_ar_event.cpp', + script = swrroot + 'rasterizer/scripts/gen_archrast.py', + source = 'rasterizer/archrast/events.proto', + command = python_cmd + ' $SCRIPT --proto $SOURCE --output $TARGET --gen_event_cpp' +) + +env.CodeGenerate( + target = 'rasterizer/archrast/gen_ar_eventhandler.h', + script = swrroot + 'rasterizer/scripts/gen_archrast.py', + source = 'rasterizer/archrast/events.proto', + command = python_cmd + ' $SCRIPT --proto $SOURCE --output $TARGET --gen_eventhandler_h' +) + +env.CodeGenerate( + target = 'rasterizer/archrast/gen_ar_eventhandlerfile.h', + script = swrroot + 'rasterizer/scripts/gen_archrast.py', + source = 'rasterizer/archrast/events.proto', + command = python_cmd + ' $SCRIPT --proto $SOURCE --output $TARGET --gen_eventhandlerfile_h' +) + +# Auto-generated .cpp files (that need to generate object files) +built_sources = [ + 'rasterizer/scripts/gen_knobs.cpp', + 'rasterizer/jitter/builder_gen.cpp', + 'rasterizer/jitter/builder_x86.cpp', + 'rasterizer/archrast/gen_ar_event.cpp', + ] + +source = built_sources +source += env.ParseSourceList(swrroot + 'Makefile.sources', [ + 'CXX_SOURCES', + 'ARCHRAST_CXX_SOURCES', + 'COMMON_CXX_SOURCES', + 'CORE_CXX_SOURCES', + 'JITTER_CXX_SOURCES', + 'MEMORY_CXX_SOURCES' +]) + +env.Prepend(LIBS = [ mesautil, mesa, gallium ]) + +env.Prepend(CPPPATH = [ + '.', + 'rasterizer', + 'rasterizer/scripts', + 'rasterizer/core', + 'rasterizer/jitter', + 'rasterizer/archrast', + ]) + +# AVX lib +envavx = env.Clone() + +envavx.Append(CPPDEFINES = ['KNOB_ARCH=KNOB_ARCH_AVX']) +if env['platform'] == 'windows': + envavx.Append(CCFLAGS = ['/arch:AVX']) +else: + envavx.Append(CCFLAGS = ['-mavx']) + +swrAVX = envavx.SharedLibrary( + target = 'swrAVX', + source = source, + OBJPREFIX = 'avx_' + ) +env.Alias('swrAVX', swrAVX) + +# AVX2 lib +envavx2 = env.Clone() + +envavx2.Append(CPPDEFINES = ['KNOB_ARCH=KNOB_ARCH_AVX2']) +if env['platform'] == 'windows': + envavx2.Append(CCFLAGS = ['/arch:AVX2']) +else: + envavx2.Append(CCFLAGS = ['-mavx2']) + +swrAVX2 = envavx2.SharedLibrary( + target = 'swrAVX2', + source = source, + OBJPREFIX = 'avx2_' + ) +env.Alias('swrAVX2', swrAVX2) + + +# main SWR lib +swr = env.ConvenienceLibrary( + target = 'swr', + source = loadersource, + ) + + +# treat arch libs as dependencies, even though they are not linked +# into swr, so we don't have to build them separately +Depends(swr, ['swrAVX', 'swrAVX2']) + +env.Alias('swr', swr) + +env.Prepend(LIBS = [swr]) + +Export('swr') diff -Nru mesa-12.0.6/src/gallium/drivers/swr/swr_clear.cpp mesa-17.0.7/src/gallium/drivers/swr/swr_clear.cpp --- mesa-12.0.6/src/gallium/drivers/swr/swr_clear.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/swr_clear.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -35,49 +35,55 @@ struct pipe_framebuffer_state *fb = &ctx->framebuffer; UINT clearMask = 0; + unsigned layers = 0; if (!swr_check_render_cond(pipe)) return; - if (ctx->dirty) - swr_update_derived(pipe); + swr_update_derived(pipe); -/* Update clearMask/targetMask */ -#if 0 /* XXX SWR currently only clears SWR_ATTACHMENT_COLOR0, don't bother \ - checking others yet. */ if (buffers & PIPE_CLEAR_COLOR && fb->nr_cbufs) { - UINT i; - for (i = 0; i < fb->nr_cbufs; ++i) - if (fb->cbufs[i]) - clearMask |= (SWR_CLEAR_COLOR0 << i); + for (unsigned i = 0; i < fb->nr_cbufs; ++i) + if (fb->cbufs[i] && (buffers & (PIPE_CLEAR_COLOR0 << i))) { + clearMask |= (SWR_ATTACHMENT_COLOR0_BIT << i); + layers = std::max(layers, fb->cbufs[i]->u.tex.last_layer - + fb->cbufs[i]->u.tex.first_layer + 1u); + } } -#else - if (buffers & PIPE_CLEAR_COLOR && fb->cbufs[0]) - clearMask |= SWR_CLEAR_COLOR; -#endif - if (buffers & PIPE_CLEAR_DEPTH && fb->zsbuf) - clearMask |= SWR_CLEAR_DEPTH; + if (buffers & PIPE_CLEAR_DEPTH && fb->zsbuf) { + clearMask |= SWR_ATTACHMENT_DEPTH_BIT; + layers = std::max(layers, fb->zsbuf->u.tex.last_layer - + fb->zsbuf->u.tex.first_layer + 1u); + } - if (buffers & PIPE_CLEAR_STENCIL && fb->zsbuf) - clearMask |= SWR_CLEAR_STENCIL; + if (buffers & PIPE_CLEAR_STENCIL && fb->zsbuf) { + clearMask |= SWR_ATTACHMENT_STENCIL_BIT; + layers = std::max(layers, fb->zsbuf->u.tex.last_layer - + fb->zsbuf->u.tex.first_layer + 1u); + } #if 0 // XXX HACK, override clear color alpha. On ubuntu, clears are // transparent. ((union pipe_color_union *)color)->f[3] = 1.0; /* cast off your const'd-ness */ #endif - /* Reset viewport to full framebuffer width/height before clear, then - * restore it */ - /* Scissor affects clear, viewport should not */ - ctx->dirty |= SWR_NEW_VIEWPORT; - SWR_VIEWPORT vp = {0}; - vp.width = ctx->framebuffer.width; - vp.height = ctx->framebuffer.height; - SwrSetViewports(ctx->swrContext, 1, &vp, NULL); - - swr_update_draw_context(ctx); - SwrClearRenderTarget(ctx->swrContext, clearMask, color->f, depth, stencil); + for (unsigned i = 0; i < layers; ++i) { + swr_update_draw_context(ctx); + SwrClearRenderTarget(ctx->swrContext, clearMask, i, + color->f, depth, stencil, + ctx->swr_scissor); + + // Mask out the attachments that are out of layers. + if (fb->zsbuf && + (fb->zsbuf->u.tex.last_layer <= fb->zsbuf->u.tex.first_layer + i)) + clearMask &= ~(SWR_ATTACHMENT_DEPTH_BIT | SWR_ATTACHMENT_STENCIL_BIT); + for (unsigned c = 0; c < fb->nr_cbufs; ++c) { + const struct pipe_surface *sf = fb->cbufs[c]; + if (sf && (sf->u.tex.last_layer <= sf->u.tex.first_layer + i)) + clearMask &= ~(SWR_ATTACHMENT_COLOR0_BIT << c); + } + } } @@ -86,7 +92,8 @@ static void swr_clear_render_target(struct pipe_context *pipe, struct pipe_surface *ps, const union pipe_color_union *color, - unsigned x, unsigned y, unsigned w, unsigned h) + unsigned x, unsigned y, unsigned w, unsigned h, + bool render_condition_enabled) { struct swr_context *ctx = swr_context(pipe); fprintf(stderr, "SWR swr_clear_render_target!\n"); @@ -97,7 +104,8 @@ static void swr_clear_depth_stencil(struct pipe_context *pipe, struct pipe_surface *ps, unsigned buffers, double depth, unsigned stencil, - unsigned x, unsigned y, unsigned w, unsigned h) + unsigned x, unsigned y, unsigned w, unsigned h, + bool render_condition_enabled) { struct swr_context *ctx = swr_context(pipe); fprintf(stderr, "SWR swr_clear_depth_stencil!\n"); diff -Nru mesa-12.0.6/src/gallium/drivers/swr/swr_context.cpp mesa-17.0.7/src/gallium/drivers/swr/swr_context.cpp --- mesa-12.0.6/src/gallium/drivers/swr/swr_context.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/swr_context.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -21,23 +21,24 @@ * IN THE SOFTWARE. ***************************************************************************/ +#include "swr_context.h" +#include "swr_memory.h" +#include "swr_screen.h" +#include "swr_resource.h" +#include "swr_scratch.h" +#include "swr_query.h" +#include "swr_fence.h" + #include "util/u_memory.h" #include "util/u_inlines.h" #include "util/u_format.h" +#include "util/u_atomic.h" extern "C" { #include "util/u_transfer.h" #include "util/u_surface.h" } -#include "swr_context.h" -#include "swr_memory.h" -#include "swr_screen.h" -#include "swr_resource.h" -#include "swr_scratch.h" -#include "swr_query.h" -#include "swr_fence.h" - #include "api.h" #include "backend.h" @@ -61,10 +62,6 @@ ps->u.tex.level = surf_tmpl->u.tex.level; ps->u.tex.first_layer = surf_tmpl->u.tex.first_layer; ps->u.tex.last_layer = surf_tmpl->u.tex.last_layer; - if (ps->u.tex.first_layer != ps->u.tex.last_layer) { - debug_printf("creating surface with multiple layers, rendering " - "to first layer only\n"); - } } else { /* setting width as number of elements should get us correct * renderbuffer width */ @@ -128,7 +125,7 @@ if (!swr_is_fence_pending(screen->flush_fence)) swr_fence_submit(swr_context(pipe), screen->flush_fence); - swr_fence_finish(pipe->screen, screen->flush_fence, 0); + swr_fence_finish(pipe->screen, NULL, screen->flush_fence, 0); swr_resource_unused(resource); } } @@ -138,26 +135,41 @@ if (!pt) return NULL; pipe_resource_reference(&pt->resource, resource); + pt->usage = (pipe_transfer_usage)usage; pt->level = level; pt->box = *box; - pt->stride = spr->row_stride[level]; - pt->layer_stride = spr->img_stride[level]; + pt->stride = spr->swr.pitch; + pt->layer_stride = spr->swr.qpitch * spr->swr.pitch; - /* if we're mapping the depth/stencil, copy in stencil */ - if (spr->base.format == PIPE_FORMAT_Z24_UNORM_S8_UINT - && spr->has_stencil) { - for (unsigned i = 0; i < spr->alignedWidth * spr->alignedHeight; i++) { - spr->swr.pBaseAddress[4 * i + 3] = spr->secondary.pBaseAddress[i]; - } - } else if (spr->base.format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT - && spr->has_stencil) { - for (unsigned i = 0; i < spr->alignedWidth * spr->alignedHeight; i++) { - spr->swr.pBaseAddress[8 * i + 4] = spr->secondary.pBaseAddress[i]; + /* if we're mapping the depth/stencil, copy in stencil for the section + * being read in + */ + if (usage & PIPE_TRANSFER_READ && spr->has_depth && spr->has_stencil) { + size_t zbase, sbase; + for (int z = box->z; z < box->z + box->depth; z++) { + zbase = (z * spr->swr.qpitch + box->y) * spr->swr.pitch + + spr->mip_offsets[level]; + sbase = (z * spr->secondary.qpitch + box->y) * spr->secondary.pitch + + spr->secondary_mip_offsets[level]; + for (int y = box->y; y < box->y + box->height; y++) { + if (spr->base.format == PIPE_FORMAT_Z24_UNORM_S8_UINT) { + for (int x = box->x; x < box->x + box->width; x++) + spr->swr.pBaseAddress[zbase + 4 * x + 3] = + spr->secondary.pBaseAddress[sbase + x]; + } else if (spr->base.format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT) { + for (int x = box->x; x < box->x + box->width; x++) + spr->swr.pBaseAddress[zbase + 8 * x + 4] = + spr->secondary.pBaseAddress[sbase + x]; + } + zbase += spr->swr.pitch; + sbase += spr->secondary.pitch; + } } } - unsigned offset = box->z * pt->layer_stride + box->y * pt->stride - + box->x * util_format_get_blocksize(format); + unsigned offset = box->z * pt->layer_stride + + util_format_get_nblocksy(format, box->y) * pt->stride + + util_format_get_stride(format, box->x); *transfer = pt; @@ -165,23 +177,60 @@ } static void -swr_transfer_unmap(struct pipe_context *pipe, struct pipe_transfer *transfer) +swr_transfer_flush_region(struct pipe_context *pipe, + struct pipe_transfer *transfer, + const struct pipe_box *flush_box) { assert(transfer->resource); + assert(transfer->usage & PIPE_TRANSFER_WRITE); - struct swr_resource *res = swr_resource(transfer->resource); - /* if we're mapping the depth/stencil, copy out stencil */ - if (res->base.format == PIPE_FORMAT_Z24_UNORM_S8_UINT - && res->has_stencil) { - for (unsigned i = 0; i < res->alignedWidth * res->alignedHeight; i++) { - res->secondary.pBaseAddress[i] = res->swr.pBaseAddress[4 * i + 3]; - } - } else if (res->base.format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT - && res->has_stencil) { - for (unsigned i = 0; i < res->alignedWidth * res->alignedHeight; i++) { - res->secondary.pBaseAddress[i] = res->swr.pBaseAddress[8 * i + 4]; + struct swr_resource *spr = swr_resource(transfer->resource); + if (!spr->has_depth || !spr->has_stencil) + return; + + size_t zbase, sbase; + struct pipe_box box = *flush_box; + box.x += transfer->box.x; + box.y += transfer->box.y; + box.z += transfer->box.z; + for (int z = box.z; z < box.z + box.depth; z++) { + zbase = (z * spr->swr.qpitch + box.y) * spr->swr.pitch + + spr->mip_offsets[transfer->level]; + sbase = (z * spr->secondary.qpitch + box.y) * spr->secondary.pitch + + spr->secondary_mip_offsets[transfer->level]; + for (int y = box.y; y < box.y + box.height; y++) { + if (spr->base.format == PIPE_FORMAT_Z24_UNORM_S8_UINT) { + for (int x = box.x; x < box.x + box.width; x++) + spr->secondary.pBaseAddress[sbase + x] = + spr->swr.pBaseAddress[zbase + 4 * x + 3]; + } else if (spr->base.format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT) { + for (int x = box.x; x < box.x + box.width; x++) + spr->secondary.pBaseAddress[sbase + x] = + spr->swr.pBaseAddress[zbase + 8 * x + 4]; + } + zbase += spr->swr.pitch; + sbase += spr->secondary.pitch; } } +} + +static void +swr_transfer_unmap(struct pipe_context *pipe, struct pipe_transfer *transfer) +{ + assert(transfer->resource); + + struct swr_resource *spr = swr_resource(transfer->resource); + /* if we're mapping the depth/stencil, copy in stencil for the section + * being written out + */ + if (transfer->usage & PIPE_TRANSFER_WRITE && + !(transfer->usage & PIPE_TRANSFER_FLUSH_EXPLICIT) && + spr->has_depth && spr->has_stencil) { + struct pipe_box box; + u_box_3d(0, 0, 0, transfer->box.width, transfer->box.height, + transfer->box.depth, &box); + swr_transfer_flush_region(pipe, transfer, &box); + } pipe_resource_reference(&transfer->resource, NULL); FREE(transfer); @@ -205,7 +254,7 @@ swr_store_dirty_resource(pipe, src, SWR_TILE_RESOLVED); swr_store_dirty_resource(pipe, dst, SWR_TILE_RESOLVED); - swr_fence_finish(pipe->screen, screen->flush_fence, 0); + swr_fence_finish(pipe->screen, NULL, screen->flush_fence, 0); swr_resource_unused(src); swr_resource_unused(dst); @@ -252,7 +301,10 @@ return; } - /* XXX turn off occlusion and streamout queries */ + if (ctx->active_queries) { + SwrEnableStatsFE(ctx->swrContext, FALSE); + SwrEnableStatsBE(ctx->swrContext, FALSE); + } util_blitter_save_vertex_buffer_slot(ctx->blitter, ctx->vertex_buffer); util_blitter_save_vertex_elements(ctx->blitter, (void *)ctx->velems); @@ -286,6 +338,11 @@ ctx->render_cond_mode); util_blitter_blit(ctx->blitter, &info); + + if (ctx->active_queries) { + SwrEnableStatsFE(ctx->swrContext, TRUE); + SwrEnableStatsBE(ctx->swrContext, TRUE); + } } @@ -298,9 +355,6 @@ if (ctx->blitter) util_blitter_destroy(ctx->blitter); - /* Idle core before deleting context */ - SwrWaitForIdle(ctx->swrContext); - for (unsigned i = 0; i < PIPE_MAX_COLOR_BUFS; i++) { pipe_surface_reference(&ctx->framebuffer.cbufs[i], NULL); } @@ -315,6 +369,10 @@ pipe_sampler_view_reference(&ctx->sampler_views[PIPE_SHADER_VERTEX][i], NULL); } + /* Idle core after destroying buffer resources, but before deleting + * context. Destroying resources has potentially called StoreTiles.*/ + SwrWaitForIdle(ctx->swrContext); + if (ctx->swrContext) SwrDestroyContext(ctx->swrContext); @@ -322,8 +380,10 @@ swr_destroy_scratch_buffers(ctx); + /* Only update screen->pipe if current context is being destroyed */ assert(screen); - screen->pipe = NULL; + if (screen->pipe == pipe) + screen->pipe = NULL; FREE(ctx); } @@ -342,20 +402,67 @@ ctx->render_cond_cond = condition; } +static void +swr_UpdateStats(HANDLE hPrivateContext, const SWR_STATS *pStats) +{ + swr_draw_context *pDC = (swr_draw_context*)hPrivateContext; + + if (!pDC) + return; + + struct swr_query_result *pqr = (struct swr_query_result *)pDC->pStats; + + SWR_STATS *pSwrStats = &pqr->core; + + pSwrStats->DepthPassCount += pStats->DepthPassCount; + pSwrStats->PsInvocations += pStats->PsInvocations; + pSwrStats->CsInvocations += pStats->CsInvocations; +} + +static void +swr_UpdateStatsFE(HANDLE hPrivateContext, const SWR_STATS_FE *pStats) +{ + swr_draw_context *pDC = (swr_draw_context*)hPrivateContext; + + if (!pDC) + return; + + struct swr_query_result *pqr = (struct swr_query_result *)pDC->pStats; + + SWR_STATS_FE *pSwrStats = &pqr->coreFE; + p_atomic_add(&pSwrStats->IaVertices, pStats->IaVertices); + p_atomic_add(&pSwrStats->IaPrimitives, pStats->IaPrimitives); + p_atomic_add(&pSwrStats->VsInvocations, pStats->VsInvocations); + p_atomic_add(&pSwrStats->HsInvocations, pStats->HsInvocations); + p_atomic_add(&pSwrStats->DsInvocations, pStats->DsInvocations); + p_atomic_add(&pSwrStats->GsInvocations, pStats->GsInvocations); + p_atomic_add(&pSwrStats->CInvocations, pStats->CInvocations); + p_atomic_add(&pSwrStats->CPrimitives, pStats->CPrimitives); + p_atomic_add(&pSwrStats->GsPrimitives, pStats->GsPrimitives); + + for (unsigned i = 0; i < 4; i++) { + p_atomic_add(&pSwrStats->SoPrimStorageNeeded[i], + pStats->SoPrimStorageNeeded[i]); + p_atomic_add(&pSwrStats->SoNumPrimsWritten[i], + pStats->SoNumPrimsWritten[i]); + } +} + struct pipe_context * swr_create_context(struct pipe_screen *p_screen, void *priv, unsigned flags) { struct swr_context *ctx = CALLOC_STRUCT(swr_context); - struct swr_screen *screen = swr_screen(p_screen); ctx->blendJIT = new std::unordered_map; SWR_CREATECONTEXT_INFO createInfo; - createInfo.driver = GL; + memset(&createInfo, 0, sizeof(createInfo)); createInfo.privateStateSize = sizeof(swr_draw_context); createInfo.pfnLoadTile = swr_LoadHotTile; createInfo.pfnStoreTile = swr_StoreHotTile; createInfo.pfnClearTile = swr_StoreHotTileClear; + createInfo.pfnUpdateStats = swr_UpdateStats; + createInfo.pfnUpdateStatsFE = swr_UpdateStatsFE; ctx->swrContext = SwrCreateContext(&createInfo); /* Init Load/Store/ClearTiles Tables */ @@ -366,7 +473,6 @@ if (ctx->swrContext == NULL) goto fail; - screen->pipe = &ctx->pipe; ctx->pipe.screen = p_screen; ctx->pipe.destroy = swr_destroy; ctx->pipe.priv = priv; @@ -374,9 +480,10 @@ ctx->pipe.surface_destroy = swr_surface_destroy; ctx->pipe.transfer_map = swr_transfer_map; ctx->pipe.transfer_unmap = swr_transfer_unmap; + ctx->pipe.transfer_flush_region = swr_transfer_flush_region; - ctx->pipe.transfer_flush_region = u_default_transfer_flush_region; - ctx->pipe.transfer_inline_write = u_default_transfer_inline_write; + ctx->pipe.buffer_subdata = u_default_buffer_subdata; + ctx->pipe.texture_subdata = u_default_texture_subdata; ctx->pipe.resource_copy_region = swr_resource_copy; ctx->pipe.render_condition = swr_render_condition; diff -Nru mesa-12.0.6/src/gallium/drivers/swr/swr_context.h mesa-17.0.7/src/gallium/drivers/swr/swr_context.h --- mesa-12.0.6/src/gallium/drivers/swr/swr_context.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/swr_context.h 2017-06-01 10:37:10.000000000 +0000 @@ -24,6 +24,8 @@ #ifndef SWR_CONTEXT_H #define SWR_CONTEXT_H +#include "common/os.h" + #include "pipe/p_context.h" #include "pipe/p_state.h" #include "util/u_blitter.h" @@ -89,7 +91,10 @@ swr_jit_texture texturesFS[PIPE_MAX_SHADER_SAMPLER_VIEWS]; swr_jit_sampler samplersFS[PIPE_MAX_SAMPLERS]; + float userClipPlanes[PIPE_MAX_CLIP_PLANES][4]; + SWR_SURFACE_STATE renderTargets[SWR_NUM_ATTACHMENTS]; + void *pStats; }; /* gen_llvm_types FINI */ @@ -118,6 +123,7 @@ struct pipe_framebuffer_state framebuffer; struct pipe_poly_stipple poly_stipple; struct pipe_scissor_state scissor; + SWR_RECT swr_scissor; struct pipe_sampler_view * sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SHADER_SAMPLER_VIEWS]; @@ -165,10 +171,13 @@ } static INLINE void -swr_update_draw_context(struct swr_context *ctx) +swr_update_draw_context(struct swr_context *ctx, + struct swr_query_result *pqr = nullptr) { swr_draw_context *pDC = (swr_draw_context *)SwrGetPrivateContextState(ctx->swrContext); + if (pqr) + ctx->swrDC.pStats = pqr; memcpy(pDC, &ctx->swrDC, sizeof(swr_draw_context)); } diff -Nru mesa-12.0.6/src/gallium/drivers/swr/swr_context_llvm.h mesa-17.0.7/src/gallium/drivers/swr/swr_context_llvm.h --- mesa-12.0.6/src/gallium/drivers/swr/swr_context_llvm.h 2017-01-24 01:43:36.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/swr_context_llvm.h 2017-06-01 10:38:09.000000000 +0000 @@ -31,83 +31,92 @@ #pragma once -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for swr_jit_texture -INLINE static StructType *Gen_swr_jit_texture(JitManager* pJitMgr) +namespace SwrJit { - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; + using namespace llvm; - members.push_back( Type::getInt32Ty(ctx) ); // width - members.push_back( Type::getInt32Ty(ctx) ); // height - members.push_back( Type::getInt32Ty(ctx) ); // depth - members.push_back( Type::getInt32Ty(ctx) ); // first_level - members.push_back( Type::getInt32Ty(ctx) ); // last_level - members.push_back( PointerType::get(Type::getInt8Ty(ctx), 0) ); // base_ptr - members.push_back( ArrayType::get(Type::getInt32Ty(ctx), PIPE_MAX_TEXTURE_LEVELS) ); // row_stride - members.push_back( ArrayType::get(Type::getInt32Ty(ctx), PIPE_MAX_TEXTURE_LEVELS) ); // img_stride - members.push_back( ArrayType::get(Type::getInt32Ty(ctx), PIPE_MAX_TEXTURE_LEVELS) ); // mip_offsets + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for swr_jit_texture + INLINE static StructType *Gen_swr_jit_texture(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( Type::getInt32Ty(ctx) ); // width + members.push_back( Type::getInt32Ty(ctx) ); // height + members.push_back( Type::getInt32Ty(ctx) ); // depth + members.push_back( Type::getInt32Ty(ctx) ); // first_level + members.push_back( Type::getInt32Ty(ctx) ); // last_level + members.push_back( PointerType::get(Type::getInt8Ty(ctx), 0) ); // base_ptr + members.push_back( ArrayType::get(Type::getInt32Ty(ctx), PIPE_MAX_TEXTURE_LEVELS) ); // row_stride + members.push_back( ArrayType::get(Type::getInt32Ty(ctx), PIPE_MAX_TEXTURE_LEVELS) ); // img_stride + members.push_back( ArrayType::get(Type::getInt32Ty(ctx), PIPE_MAX_TEXTURE_LEVELS) ); // mip_offsets + + return StructType::get(ctx, members, false); + } + + static const uint32_t swr_jit_texture_width = 0; + static const uint32_t swr_jit_texture_height = 1; + static const uint32_t swr_jit_texture_depth = 2; + static const uint32_t swr_jit_texture_first_level = 3; + static const uint32_t swr_jit_texture_last_level = 4; + static const uint32_t swr_jit_texture_base_ptr = 5; + static const uint32_t swr_jit_texture_row_stride = 6; + static const uint32_t swr_jit_texture_img_stride = 7; + static const uint32_t swr_jit_texture_mip_offsets = 8; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for swr_jit_sampler + INLINE static StructType *Gen_swr_jit_sampler(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( Type::getFloatTy(ctx) ); // min_lod + members.push_back( Type::getFloatTy(ctx) ); // max_lod + members.push_back( Type::getFloatTy(ctx) ); // lod_bias + members.push_back( ArrayType::get(Type::getFloatTy(ctx), 4) ); // border_color + + return StructType::get(ctx, members, false); + } + + static const uint32_t swr_jit_sampler_min_lod = 0; + static const uint32_t swr_jit_sampler_max_lod = 1; + static const uint32_t swr_jit_sampler_lod_bias = 2; + static const uint32_t swr_jit_sampler_border_color = 3; + + ////////////////////////////////////////////////////////////////////////// + /// Generate LLVM type information for swr_draw_context + INLINE static StructType *Gen_swr_draw_context(JitManager* pJitMgr) + { + LLVMContext& ctx = pJitMgr->mContext; + std::vector members; + + members.push_back( ArrayType::get(PointerType::get(Type::getFloatTy(ctx), 0), PIPE_MAX_CONSTANT_BUFFERS) ); // constantVS + members.push_back( ArrayType::get(Type::getInt32Ty(ctx), PIPE_MAX_CONSTANT_BUFFERS) ); // num_constantsVS + members.push_back( ArrayType::get(PointerType::get(Type::getFloatTy(ctx), 0), PIPE_MAX_CONSTANT_BUFFERS) ); // constantFS + members.push_back( ArrayType::get(Type::getInt32Ty(ctx), PIPE_MAX_CONSTANT_BUFFERS) ); // num_constantsFS + members.push_back( ArrayType::get(Gen_swr_jit_texture(pJitMgr), PIPE_MAX_SHADER_SAMPLER_VIEWS) ); // texturesVS + members.push_back( ArrayType::get(Gen_swr_jit_sampler(pJitMgr), PIPE_MAX_SAMPLERS) ); // samplersVS + members.push_back( ArrayType::get(Gen_swr_jit_texture(pJitMgr), PIPE_MAX_SHADER_SAMPLER_VIEWS) ); // texturesFS + members.push_back( ArrayType::get(Gen_swr_jit_sampler(pJitMgr), PIPE_MAX_SAMPLERS) ); // samplersFS + members.push_back( ArrayType::get(ArrayType::get(Type::getFloatTy(ctx), 4), PIPE_MAX_CLIP_PLANES) ); // userClipPlanes + members.push_back( ArrayType::get(Gen_SWR_SURFACE_STATE(pJitMgr), SWR_NUM_ATTACHMENTS) ); // renderTargets + members.push_back( PointerType::get(Type::getInt32Ty(ctx), 0) ); // pStats + + return StructType::get(ctx, members, false); + } + + static const uint32_t swr_draw_context_constantVS = 0; + static const uint32_t swr_draw_context_num_constantsVS = 1; + static const uint32_t swr_draw_context_constantFS = 2; + static const uint32_t swr_draw_context_num_constantsFS = 3; + static const uint32_t swr_draw_context_texturesVS = 4; + static const uint32_t swr_draw_context_samplersVS = 5; + static const uint32_t swr_draw_context_texturesFS = 6; + static const uint32_t swr_draw_context_samplersFS = 7; + static const uint32_t swr_draw_context_userClipPlanes = 8; + static const uint32_t swr_draw_context_renderTargets = 9; + static const uint32_t swr_draw_context_pStats = 10; - return StructType::get(ctx, members, false); } - -static const uint32_t swr_jit_texture_width = 0; -static const uint32_t swr_jit_texture_height = 1; -static const uint32_t swr_jit_texture_depth = 2; -static const uint32_t swr_jit_texture_first_level = 3; -static const uint32_t swr_jit_texture_last_level = 4; -static const uint32_t swr_jit_texture_base_ptr = 5; -static const uint32_t swr_jit_texture_row_stride = 6; -static const uint32_t swr_jit_texture_img_stride = 7; -static const uint32_t swr_jit_texture_mip_offsets = 8; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for swr_jit_sampler -INLINE static StructType *Gen_swr_jit_sampler(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( Type::getFloatTy(ctx) ); // min_lod - members.push_back( Type::getFloatTy(ctx) ); // max_lod - members.push_back( Type::getFloatTy(ctx) ); // lod_bias - members.push_back( ArrayType::get(Type::getFloatTy(ctx), 4) ); // border_color - - return StructType::get(ctx, members, false); -} - -static const uint32_t swr_jit_sampler_min_lod = 0; -static const uint32_t swr_jit_sampler_max_lod = 1; -static const uint32_t swr_jit_sampler_lod_bias = 2; -static const uint32_t swr_jit_sampler_border_color = 3; - -////////////////////////////////////////////////////////////////////////// -/// Generate LLVM type information for swr_draw_context -INLINE static StructType *Gen_swr_draw_context(JitManager* pJitMgr) -{ - LLVMContext& ctx = pJitMgr->mContext; - std::vector members; - - members.push_back( ArrayType::get(PointerType::get(Type::getFloatTy(ctx), 0), PIPE_MAX_CONSTANT_BUFFERS) ); // constantVS - members.push_back( ArrayType::get(Type::getInt32Ty(ctx), PIPE_MAX_CONSTANT_BUFFERS) ); // num_constantsVS - members.push_back( ArrayType::get(PointerType::get(Type::getFloatTy(ctx), 0), PIPE_MAX_CONSTANT_BUFFERS) ); // constantFS - members.push_back( ArrayType::get(Type::getInt32Ty(ctx), PIPE_MAX_CONSTANT_BUFFERS) ); // num_constantsFS - members.push_back( ArrayType::get(Gen_swr_jit_texture(pJitMgr), PIPE_MAX_SHADER_SAMPLER_VIEWS) ); // texturesVS - members.push_back( ArrayType::get(Gen_swr_jit_sampler(pJitMgr), PIPE_MAX_SAMPLERS) ); // samplersVS - members.push_back( ArrayType::get(Gen_swr_jit_texture(pJitMgr), PIPE_MAX_SHADER_SAMPLER_VIEWS) ); // texturesFS - members.push_back( ArrayType::get(Gen_swr_jit_sampler(pJitMgr), PIPE_MAX_SAMPLERS) ); // samplersFS - members.push_back( ArrayType::get(Gen_SWR_SURFACE_STATE(pJitMgr), SWR_NUM_ATTACHMENTS) ); // renderTargets - - return StructType::get(ctx, members, false); -} - -static const uint32_t swr_draw_context_constantVS = 0; -static const uint32_t swr_draw_context_num_constantsVS = 1; -static const uint32_t swr_draw_context_constantFS = 2; -static const uint32_t swr_draw_context_num_constantsFS = 3; -static const uint32_t swr_draw_context_texturesVS = 4; -static const uint32_t swr_draw_context_samplersVS = 5; -static const uint32_t swr_draw_context_texturesFS = 6; -static const uint32_t swr_draw_context_samplersFS = 7; -static const uint32_t swr_draw_context_renderTargets = 8; - diff -Nru mesa-12.0.6/src/gallium/drivers/swr/swr_draw.cpp mesa-17.0.7/src/gallium/drivers/swr/swr_draw.cpp --- mesa-12.0.6/src/gallium/drivers/swr/swr_draw.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/swr_draw.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -90,8 +90,7 @@ } /* Update derived state, pass draw info to update function */ - if (ctx->dirty) - swr_update_derived(pipe, info); + swr_update_derived(pipe, info); swr_update_draw_context(ctx); @@ -162,6 +161,36 @@ /* Set up frontend state * XXX setup provokingVertex & topologyProvokingVertex */ SWR_FRONTEND_STATE feState = {0}; + if (ctx->rasterizer->flatshade_first) { + feState.provokingVertex = {1, 0, 0}; + } else { + feState.provokingVertex = {2, 1, 2}; + } + + switch (info->mode) { + case PIPE_PRIM_TRIANGLE_FAN: + feState.topologyProvokingVertex = feState.provokingVertex.triFan; + break; + case PIPE_PRIM_TRIANGLE_STRIP: + case PIPE_PRIM_TRIANGLES: + feState.topologyProvokingVertex = feState.provokingVertex.triStripList; + break; + case PIPE_PRIM_QUAD_STRIP: + case PIPE_PRIM_QUADS: + if (ctx->rasterizer->flatshade_first) + feState.topologyProvokingVertex = 0; + else + feState.topologyProvokingVertex = 3; + break; + case PIPE_PRIM_LINES: + case PIPE_PRIM_LINE_LOOP: + case PIPE_PRIM_LINE_STRIP: + feState.topologyProvokingVertex = feState.provokingVertex.lineStripList; + break; + default: + feState.topologyProvokingVertex = 0; + } + feState.bEnableCutIndex = info->primitive_restart; SwrSetFrontendState(ctx->swrContext, &feState); @@ -209,7 +238,7 @@ struct pipe_fence_handle *fence = nullptr; swr_flush(pipe, &fence, 0); - swr_fence_finish(pipe->screen, fence, 0); + swr_fence_finish(pipe->screen, NULL, fence, 0); swr_fence_reference(pipe->screen, &fence, NULL); } @@ -228,37 +257,15 @@ /* Only proceed if there's a valid surface to store to */ if (renderTarget->pBaseAddress) { - /* Set viewport to full renderTarget width/height and disable scissor - * before StoreTiles */ - boolean change_viewport = - (ctx->derived.vp.x != 0.0f || ctx->derived.vp.y != 0.0f - || ctx->derived.vp.width != renderTarget->width - || ctx->derived.vp.height != renderTarget->height); - if (change_viewport) { - SWR_VIEWPORT vp = {0}; - vp.width = renderTarget->width; - vp.height = renderTarget->height; - SwrSetViewports(ctx->swrContext, 1, &vp, NULL); - } - - boolean scissor_enable = ctx->derived.rastState.scissorEnable; - if (scissor_enable) { - ctx->derived.rastState.scissorEnable = FALSE; - SwrSetRastState(ctx->swrContext, &ctx->derived.rastState); - } - swr_update_draw_context(ctx); + SWR_RECT full_rect = + {0, 0, + (int32_t)u_minify(renderTarget->width, renderTarget->lod), + (int32_t)u_minify(renderTarget->height, renderTarget->lod)}; SwrStoreTiles(ctx->swrContext, - (enum SWR_RENDERTARGET_ATTACHMENT)attachment, - post_tile_state); - - /* Restore viewport and scissor enable */ - if (change_viewport) - SwrSetViewports(ctx->swrContext, 1, &ctx->derived.vp, &ctx->derived.vpm); - if (scissor_enable) { - ctx->derived.rastState.scissorEnable = scissor_enable; - SwrSetRastState(ctx->swrContext, &ctx->derived.rastState); - } + 1 << attachment, + post_tile_state, + full_rect); } } @@ -276,7 +283,9 @@ swr_draw_context *pDC = &ctx->swrDC; SWR_SURFACE_STATE *renderTargets = pDC->renderTargets; for (uint32_t i = 0; i < SWR_NUM_ATTACHMENTS; i++) - if (renderTargets[i].pBaseAddress == spr->swr.pBaseAddress) { + if (renderTargets[i].pBaseAddress == spr->swr.pBaseAddress || + (spr->secondary.pBaseAddress && + renderTargets[i].pBaseAddress == spr->secondary.pBaseAddress)) { swr_store_render_target(pipe, i, post_tile_state); /* Mesa thinks depth/stencil are fused, so we'll never get an diff -Nru mesa-12.0.6/src/gallium/drivers/swr/swr_fence.cpp mesa-17.0.7/src/gallium/drivers/swr/swr_fence.cpp --- mesa-12.0.6/src/gallium/drivers/swr/swr_fence.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/swr_fence.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -38,10 +38,13 @@ * to SwrSync call. */ static void -swr_sync_cb(uint64_t userData, uint64_t userData2, uint64_t userData3) +swr_fence_cb(uint64_t userData, uint64_t userData2, uint64_t userData3) { struct swr_fence *fence = (struct swr_fence *)userData; + /* Complete all work attached to the fence */ + swr_fence_do_work(fence); + /* Correct value is in SwrSync data, and not the fence write field. */ fence->read = userData2; } @@ -56,7 +59,7 @@ fence->write++; fence->pending = TRUE; - SwrSync(ctx->swrContext, swr_sync_cb, (uint64_t)fence, fence->write, 0); + SwrSync(ctx->swrContext, swr_fence_cb, (uint64_t)fence, fence->write, 0); } /* @@ -72,6 +75,7 @@ pipe_reference_init(&fence->reference, 1); fence->id = fence_id++; + fence->work.tail = &fence->work.head; return (struct pipe_fence_handle *)fence; } @@ -80,6 +84,8 @@ static void swr_fence_destroy(struct swr_fence *fence) { + /* Complete any work left if fence was not submitted */ + swr_fence_do_work(fence); FREE(fence); } @@ -101,8 +107,10 @@ old = NULL; } - if (pipe_reference(&old->reference, &fence->reference)) + if (pipe_reference(&old->reference, &fence->reference)) { + swr_fence_finish(screen, NULL, (struct pipe_fence_handle *) old, 0); swr_fence_destroy(old); + } } @@ -111,6 +119,7 @@ */ boolean swr_fence_finish(struct pipe_screen *screen, + struct pipe_context *ctx, struct pipe_fence_handle *fence_handle, uint64_t timeout) { diff -Nru mesa-12.0.6/src/gallium/drivers/swr/swr_fence.h mesa-17.0.7/src/gallium/drivers/swr/swr_fence.h --- mesa-12.0.6/src/gallium/drivers/swr/swr_fence.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/swr_fence.h 2017-06-01 10:37:10.000000000 +0000 @@ -25,6 +25,8 @@ #include "pipe/p_state.h" #include "util/u_inlines.h" +#include "swr_fence_work.h" + struct pipe_screen; struct swr_fence { @@ -36,6 +38,12 @@ unsigned pending; unsigned id; /* Just for reference */ + + struct { + uint32_t count; + struct swr_fence_work head; + struct swr_fence_work *tail; + } work; }; @@ -69,6 +77,7 @@ struct pipe_fence_handle *f); boolean swr_fence_finish(struct pipe_screen *screen, + struct pipe_context *ctx, struct pipe_fence_handle *fence_handle, uint64_t timeout); diff -Nru mesa-12.0.6/src/gallium/drivers/swr/swr_fence_work.cpp mesa-17.0.7/src/gallium/drivers/swr/swr_fence_work.cpp --- mesa-12.0.6/src/gallium/drivers/swr/swr_fence_work.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/swr_fence_work.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,148 @@ +/**************************************************************************** + * Copyright (C) 2016 Intel Corporation. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + ***************************************************************************/ + +#include "swr_context.h" +#include "swr_fence.h" + +#include "util/u_inlines.h" +#include "util/u_memory.h" + +/* + * Called by swr_fence_cb to complete the work queue + */ +void +swr_fence_do_work(struct swr_fence *fence) +{ + struct swr_fence_work *work, *tmp; + + if (fence->work.head.next) { + work = fence->work.head.next; + /* Immediately clear the head so any new work gets added to a new work + * queue */ + p_atomic_set(&fence->work.head.next, 0); + p_atomic_set(&fence->work.tail, &fence->work.head); + p_atomic_set(&fence->work.count, 0); + + do { + tmp = work->next; + work->callback(work); + FREE(work); + work = tmp; + } while(work); + } +} + + +/* + * Called by one of the specialized work routines below + */ +static inline void +swr_add_fence_work(struct pipe_fence_handle *fh, + struct swr_fence_work *work) +{ + /* If no fence, just do the work now */ + if (!fh) { + work->callback(work); + FREE(work); + return; + } + + struct swr_fence *fence = swr_fence(fh); + p_atomic_set(&fence->work.tail->next, work); + p_atomic_set(&fence->work.tail, work); + p_atomic_inc(&fence->work.count); +} + + +/* + * Generic free/free_aligned, and delete vs/fs + */ +template +static void +swr_free_cb(struct swr_fence_work *work) +{ + if (aligned_free) + AlignedFree(work->free.data); + else + FREE(work->free.data); +} + +static void +swr_delete_vs_cb(struct swr_fence_work *work) +{ + delete work->free.swr_vs; +} + +static void +swr_delete_fs_cb(struct swr_fence_work *work) +{ + delete work->free.swr_fs; +} + +bool +swr_fence_work_free(struct pipe_fence_handle *fence, void *data, + bool aligned_free) +{ + struct swr_fence_work *work = CALLOC_STRUCT(swr_fence_work); + if (!work) + return false; + if (aligned_free) + work->callback = swr_free_cb; + else + work->callback = swr_free_cb; + work->free.data = data; + + swr_add_fence_work(fence, work); + + return true; +} + +bool +swr_fence_work_delete_vs(struct pipe_fence_handle *fence, + struct swr_vertex_shader *swr_vs) +{ + struct swr_fence_work *work = CALLOC_STRUCT(swr_fence_work); + if (!work) + return false; + work->callback = swr_delete_vs_cb; + work->free.swr_vs = swr_vs; + + swr_add_fence_work(fence, work); + + return true; +} + +bool +swr_fence_work_delete_fs(struct pipe_fence_handle *fence, + struct swr_fragment_shader *swr_fs) +{ + struct swr_fence_work *work = CALLOC_STRUCT(swr_fence_work); + if (!work) + return false; + work->callback = swr_delete_fs_cb; + work->free.swr_fs = swr_fs; + + swr_add_fence_work(fence, work); + + return true; +} diff -Nru mesa-12.0.6/src/gallium/drivers/swr/swr_fence_work.h mesa-17.0.7/src/gallium/drivers/swr/swr_fence_work.h --- mesa-12.0.6/src/gallium/drivers/swr/swr_fence_work.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/swr_fence_work.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,47 @@ +/**************************************************************************** + * Copyright (C) 2016 Intel Corporation. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN + * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + ***************************************************************************/ + +#ifndef SWR_FENCE_WORK_H +#define SWR_FENCE_WORK_H + +typedef void(*SWR_WORK_CALLBACK_FUNC)(struct swr_fence_work *work); + +struct swr_fence_work { + SWR_WORK_CALLBACK_FUNC callback; + + union { + void *data; + struct swr_vertex_shader *swr_vs; + struct swr_fragment_shader *swr_fs; + } free; + + struct swr_fence_work *next; +}; + +void swr_fence_do_work(struct swr_fence *fence); + +bool swr_fence_work_free(struct pipe_fence_handle *fence, void *data, + bool aligned_free = false); +bool swr_fence_work_delete_vs(struct pipe_fence_handle *fence, + struct swr_vertex_shader *swr_vs); +bool swr_fence_work_delete_fs(struct pipe_fence_handle *fence, + struct swr_fragment_shader *swr_vs); +#endif diff -Nru mesa-12.0.6/src/gallium/drivers/swr/swr_loader.cpp mesa-17.0.7/src/gallium/drivers/swr/swr_loader.cpp --- mesa-12.0.6/src/gallium/drivers/swr/swr_loader.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/swr_loader.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -25,14 +25,16 @@ #include "util/u_dl.h" #include "swr_public.h" +#include "pipe/p_screen.h" + #include -#include typedef pipe_screen *(*screen_create_proc)(struct sw_winsys *winsys); struct pipe_screen * swr_create_screen(struct sw_winsys *winsys) { + char filename[256]; fprintf(stderr, "SWR detected "); util_dl_library *pLibrary = nullptr; @@ -40,21 +42,22 @@ util_cpu_detect(); if (util_cpu_caps.has_avx2) { fprintf(stderr, "AVX2\n"); - pLibrary = util_dl_open("libswrAVX2.so"); + sprintf(filename, "%s%s%s", UTIL_DL_PREFIX, "swrAVX2", UTIL_DL_EXT); } else if (util_cpu_caps.has_avx) { fprintf(stderr, "AVX\n"); - pLibrary = util_dl_open("libswrAVX.so"); + sprintf(filename, "%s%s%s", UTIL_DL_PREFIX, "swrAVX", UTIL_DL_EXT); } else { fprintf(stderr, "no AVX/AVX2 support. Aborting!\n"); exit(-1); } + pLibrary = util_dl_open(filename); if (!pLibrary) { fprintf(stderr, "SWR library load failure: %s\n", util_dl_error()); exit(-1); } - util_dl_proc pScreenProc = util_dl_get_proc_address(pLibrary, "swr_create_screen"); + util_dl_proc pScreenProc = util_dl_get_proc_address(pLibrary, "swr_create_screen_internal"); if (!pScreenProc) { fprintf(stderr, "SWR library search failure: %s\n", util_dl_error()); @@ -65,3 +68,21 @@ return pScreenCreate(winsys); } + + +#ifdef _WIN32 +// swap function called from libl_gdi.c + +void +swr_gdi_swap(struct pipe_screen *screen, + struct pipe_resource *res, + void *hDC) +{ + screen->flush_frontbuffer(screen, + res, + 0, 0, + hDC, + NULL); +} + +#endif /* _WIN32 */ diff -Nru mesa-12.0.6/src/gallium/drivers/swr/swr_memory.h mesa-17.0.7/src/gallium/drivers/swr/swr_memory.h --- mesa-12.0.6/src/gallium/drivers/swr/swr_memory.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/swr_memory.h 2017-06-01 10:37:10.000000000 +0000 @@ -30,7 +30,7 @@ UINT x, UINT y, uint32_t renderTargetArrayIndex, uint8_t *pDstHotTile); -void StoreHotTile( +void StoreHotTileToSurface( SWR_SURFACE_STATE *pDstSurface, SWR_FORMAT srcFormat, SWR_RENDERTARGET_ATTACHMENT renderTargetIndex, @@ -42,6 +42,7 @@ SWR_RENDERTARGET_ATTACHMENT renderTargetIndex, UINT x, UINT y, + uint32_t renderTargetArrayIndex, const float* pClearColor); INLINE void @@ -69,7 +70,7 @@ swr_draw_context *pDC = (swr_draw_context*)hPrivateContext; SWR_SURFACE_STATE *pDstSurface = &pDC->renderTargets[renderTargetIndex]; - StoreHotTile(pDstSurface, srcFormat, renderTargetIndex, x, y, renderTargetArrayIndex, pSrcHotTile); + StoreHotTileToSurface(pDstSurface, srcFormat, renderTargetIndex, x, y, renderTargetArrayIndex, pSrcHotTile); } INLINE void @@ -77,13 +78,14 @@ SWR_RENDERTARGET_ATTACHMENT renderTargetIndex, UINT x, UINT y, + uint32_t renderTargetArrayIndex, const float* pClearColor) { // Grab destination surface state from private context swr_draw_context *pDC = (swr_draw_context*)hPrivateContext; SWR_SURFACE_STATE *pDstSurface = &pDC->renderTargets[renderTargetIndex]; - StoreHotTileClear(pDstSurface, renderTargetIndex, x, y, pClearColor); + StoreHotTileClear(pDstSurface, renderTargetIndex, x, y, renderTargetArrayIndex, pClearColor); } void InitSimLoadTilesTable(); diff -Nru mesa-12.0.6/src/gallium/drivers/swr/swr_public.h mesa-17.0.7/src/gallium/drivers/swr/swr_public.h --- mesa-12.0.6/src/gallium/drivers/swr/swr_public.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/swr_public.h 2017-06-01 10:37:10.000000000 +0000 @@ -32,12 +32,17 @@ extern "C" { #endif +// driver entry point struct pipe_screen *swr_create_screen(struct sw_winsys *winsys); -struct sw_winsys *swr_get_winsys(struct pipe_screen *pipe); - -struct sw_displaytarget *swr_get_displaytarget(struct pipe_resource *resource); +// arch-specific dll entry point +PUBLIC struct pipe_screen *swr_create_screen_internal(struct sw_winsys *winsys); +#ifdef _WIN32 +void swr_gdi_swap(struct pipe_screen *screen, + struct pipe_resource *res, + void *hDC); +#endif /* _WIN32 */ #ifdef __cplusplus } diff -Nru mesa-12.0.6/src/gallium/drivers/swr/swr_query.cpp mesa-17.0.7/src/gallium/drivers/swr/swr_query.cpp --- mesa-12.0.6/src/gallium/drivers/swr/swr_query.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/swr_query.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -29,7 +29,7 @@ #include "swr_query.h" #include "swr_screen.h" #include "swr_state.h" - +#include "common/os.h" static struct swr_query * swr_query(struct pipe_query *p) @@ -45,7 +45,8 @@ assert(type < PIPE_QUERY_TYPES); assert(index < MAX_SO_STREAMS); - pq = CALLOC_STRUCT(swr_query); + pq = (struct swr_query *) AlignedMalloc(sizeof(struct swr_query), 64); + memset(pq, 0, sizeof(*pq)); if (pq) { pq->type = type; @@ -63,53 +64,11 @@ if (pq->fence) { if (swr_is_fence_pending(pq->fence)) - swr_fence_finish(pipe->screen, pq->fence, 0); + swr_fence_finish(pipe->screen, NULL, pq->fence, 0); swr_fence_reference(pipe->screen, &pq->fence, NULL); } - FREE(pq); -} - - -static void -swr_gather_stats(struct pipe_context *pipe, struct swr_query *pq) -{ - struct swr_context *ctx = swr_context(pipe); - - assert(pq->result); - struct swr_query_result *result = pq->result; - boolean enable_stats = pq->enable_stats; - - /* A few results don't require the core, so don't involve it */ - switch (pq->type) { - case PIPE_QUERY_TIMESTAMP: - case PIPE_QUERY_TIME_ELAPSED: - result->timestamp = swr_get_timestamp(pipe->screen); - break; - case PIPE_QUERY_TIMESTAMP_DISJOINT: - case PIPE_QUERY_GPU_FINISHED: - /* nothing to do here */ - break; - default: - /* - * All other results are collected from SwrCore counters via - * SwrGetStats. This returns immediately, but results are later filled - * in by the backend. Fence status is the only indication of - * completion. */ - SwrGetStats(ctx->swrContext, &result->core); - - if (!pq->fence) { - struct swr_screen *screen = swr_screen(pipe->screen); - swr_fence_reference(pipe->screen, &pq->fence, screen->flush_fence); - } - swr_fence_submit(ctx, pq->fence); - - /* Only change stat collection if there are no active queries */ - if (ctx->active_queries == 0) - SwrEnableStats(ctx->swrContext, enable_stats); - - break; - } + AlignedFree(pq); } @@ -120,52 +79,47 @@ union pipe_query_result *result) { struct swr_query *pq = swr_query(q); - struct swr_query_result *start = &pq->start; - struct swr_query_result *end = &pq->end; unsigned index = pq->index; if (pq->fence) { if (!wait && !swr_is_fence_done(pq->fence)) return FALSE; - swr_fence_finish(pipe->screen, pq->fence, 0); + swr_fence_finish(pipe->screen, NULL, pq->fence, 0); swr_fence_reference(pipe->screen, &pq->fence, NULL); } - /* XXX: Need to handle counter rollover */ - + /* All values are reset to 0 at swr_begin_query, except starting timestamp. + * Counters become simply end values. */ switch (pq->type) { /* Booleans */ case PIPE_QUERY_OCCLUSION_PREDICATE: - result->b = end->core.DepthPassCount != start->core.DepthPassCount; + result->b = pq->result.core.DepthPassCount != 0; break; case PIPE_QUERY_GPU_FINISHED: result->b = TRUE; break; /* Counters */ case PIPE_QUERY_OCCLUSION_COUNTER: - result->u64 = end->core.DepthPassCount - start->core.DepthPassCount; + result->u64 = pq->result.core.DepthPassCount; break; case PIPE_QUERY_TIMESTAMP: case PIPE_QUERY_TIME_ELAPSED: - result->u64 = end->timestamp - start->timestamp; + result->u64 = pq->result.timestamp_end - pq->result.timestamp_start; break; case PIPE_QUERY_PRIMITIVES_GENERATED: - result->u64 = end->core.IaPrimitives - start->core.IaPrimitives; + result->u64 = pq->result.coreFE.IaPrimitives; break; case PIPE_QUERY_PRIMITIVES_EMITTED: - result->u64 = end->core.SoNumPrimsWritten[index] - - start->core.SoNumPrimsWritten[index]; + result->u64 = pq->result.coreFE.SoNumPrimsWritten[index]; break; /* Structures */ case PIPE_QUERY_SO_STATISTICS: { struct pipe_query_data_so_statistics *so_stats = &result->so_statistics; - struct SWR_STATS *start = &pq->start.core; - struct SWR_STATS *end = &pq->end.core; so_stats->num_primitives_written = - end->SoNumPrimsWritten[index] - start->SoNumPrimsWritten[index]; + pq->result.coreFE.SoNumPrimsWritten[index]; so_stats->primitives_storage_needed = - end->SoPrimStorageNeeded[index] - start->SoPrimStorageNeeded[index]; + pq->result.coreFE.SoPrimStorageNeeded[index]; } break; case PIPE_QUERY_TIMESTAMP_DISJOINT: /* os_get_time_nano returns nanoseconds */ @@ -175,27 +129,23 @@ case PIPE_QUERY_PIPELINE_STATISTICS: { struct pipe_query_data_pipeline_statistics *p_stats = &result->pipeline_statistics; - struct SWR_STATS *start = &pq->start.core; - struct SWR_STATS *end = &pq->end.core; - p_stats->ia_vertices = end->IaVertices - start->IaVertices; - p_stats->ia_primitives = end->IaPrimitives - start->IaPrimitives; - p_stats->vs_invocations = end->VsInvocations - start->VsInvocations; - p_stats->gs_invocations = end->GsInvocations - start->GsInvocations; - p_stats->gs_primitives = end->GsPrimitives - start->GsPrimitives; - p_stats->c_invocations = end->CPrimitives - start->CPrimitives; - p_stats->c_primitives = end->CPrimitives - start->CPrimitives; - p_stats->ps_invocations = end->PsInvocations - start->PsInvocations; - p_stats->hs_invocations = end->HsInvocations - start->HsInvocations; - p_stats->ds_invocations = end->DsInvocations - start->DsInvocations; - p_stats->cs_invocations = end->CsInvocations - start->CsInvocations; + p_stats->ia_vertices = pq->result.coreFE.IaVertices; + p_stats->ia_primitives = pq->result.coreFE.IaPrimitives; + p_stats->vs_invocations = pq->result.coreFE.VsInvocations; + p_stats->gs_invocations = pq->result.coreFE.GsInvocations; + p_stats->gs_primitives = pq->result.coreFE.GsPrimitives; + p_stats->c_invocations = pq->result.coreFE.CPrimitives; + p_stats->c_primitives = pq->result.coreFE.CPrimitives; + p_stats->ps_invocations = pq->result.core.PsInvocations; + p_stats->hs_invocations = pq->result.coreFE.HsInvocations; + p_stats->ds_invocations = pq->result.coreFE.DsInvocations; + p_stats->cs_invocations = pq->result.core.CsInvocations; } break; case PIPE_QUERY_SO_OVERFLOW_PREDICATE: { - struct SWR_STATS *start = &pq->start.core; - struct SWR_STATS *end = &pq->end.core; uint64_t num_primitives_written = - end->SoNumPrimsWritten[index] - start->SoNumPrimsWritten[index]; + pq->result.coreFE.SoNumPrimsWritten[index]; uint64_t primitives_storage_needed = - end->SoPrimStorageNeeded[index] - start->SoPrimStorageNeeded[index]; + pq->result.coreFE.SoPrimStorageNeeded[index]; result->b = num_primitives_written > primitives_storage_needed; } break; @@ -213,21 +163,30 @@ struct swr_context *ctx = swr_context(pipe); struct swr_query *pq = swr_query(q); - assert(!pq->enable_stats && "swr_begin_query: Query is already active!"); - /* Initialize Results */ - memset(&pq->start, 0, sizeof(pq->start)); - memset(&pq->end, 0, sizeof(pq->end)); + memset(&pq->result, 0, sizeof(pq->result)); + switch (pq->type) { + case PIPE_QUERY_GPU_FINISHED: + case PIPE_QUERY_TIMESTAMP: + /* nothing to do, but don't want the default */ + break; + case PIPE_QUERY_TIME_ELAPSED: + pq->result.timestamp_start = swr_get_timestamp(pipe->screen); + break; + default: + /* Core counters required. Update draw context with location to + * store results. */ + swr_update_draw_context(ctx, &pq->result); + + /* Only change stat collection if there are no active queries */ + if (ctx->active_queries == 0) { + SwrEnableStatsFE(ctx->swrContext, TRUE); + SwrEnableStatsBE(ctx->swrContext, TRUE); + } + ctx->active_queries++; + break; + } - /* Gather start stats and enable SwrCore counters */ - pq->result = &pq->start; - pq->enable_stats = TRUE; - swr_gather_stats(pipe, pq); - ctx->active_queries++; - - /* override start timestamp to 0 for TIMESTAMP query */ - if (pq->type == PIPE_QUERY_TIMESTAMP) - pq->start.timestamp = 0; return true; } @@ -238,14 +197,33 @@ struct swr_context *ctx = swr_context(pipe); struct swr_query *pq = swr_query(q); - assert(ctx->active_queries - && "swr_end_query, there are no active queries!"); - ctx->active_queries--; - - /* Gather end stats and disable SwrCore counters */ - pq->result = &pq->end; - pq->enable_stats = FALSE; - swr_gather_stats(pipe, pq); + switch (pq->type) { + case PIPE_QUERY_GPU_FINISHED: + /* nothing to do, but don't want the default */ + break; + case PIPE_QUERY_TIMESTAMP: + case PIPE_QUERY_TIME_ELAPSED: + pq->result.timestamp_end = swr_get_timestamp(pipe->screen); + break; + default: + /* Stats are updated asynchronously, a fence is used to signal + * completion. */ + if (!pq->fence) { + struct swr_screen *screen = swr_screen(pipe->screen); + swr_fence_reference(pipe->screen, &pq->fence, screen->flush_fence); + } + swr_fence_submit(ctx, pq->fence); + + /* Only change stat collection if there are no active queries */ + ctx->active_queries--; + if (ctx->active_queries == 0) { + SwrEnableStatsFE(ctx->swrContext, FALSE); + SwrEnableStatsBE(ctx->swrContext, FALSE); + } + + break; + } + return true; } diff -Nru mesa-12.0.6/src/gallium/drivers/swr/swr_query.h mesa-17.0.7/src/gallium/drivers/swr/swr_query.h --- mesa-12.0.6/src/gallium/drivers/swr/swr_query.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/swr_query.h 2017-06-01 10:37:10.000000000 +0000 @@ -29,20 +29,17 @@ struct swr_query_result { SWR_STATS core; - uint64_t timestamp; + SWR_STATS_FE coreFE; + uint64_t timestamp_start; + uint64_t timestamp_end; }; -struct swr_query { +OSALIGNLINE(struct) swr_query { unsigned type; /* PIPE_QUERY_* */ unsigned index; - struct swr_query_result *result; - struct swr_query_result start; - struct swr_query_result end; - + struct swr_query_result result; struct pipe_fence_handle *fence; - - boolean enable_stats; }; extern void swr_query_init(struct pipe_context *pipe); diff -Nru mesa-12.0.6/src/gallium/drivers/swr/swr_resource.h mesa-17.0.7/src/gallium/drivers/swr/swr_resource.h --- mesa-12.0.6/src/gallium/drivers/swr/swr_resource.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/swr_resource.h 2017-06-01 10:37:10.000000000 +0000 @@ -41,17 +41,13 @@ bool has_depth; bool has_stencil; - UINT alignedWidth; - UINT alignedHeight; - SWR_SURFACE_STATE swr; SWR_SURFACE_STATE secondary; /* for faking depth/stencil merged formats */ struct sw_displaytarget *display_target; - unsigned row_stride[PIPE_MAX_TEXTURE_LEVELS]; - unsigned img_stride[PIPE_MAX_TEXTURE_LEVELS]; - unsigned mip_offsets[PIPE_MAX_TEXTURE_LEVELS]; + size_t mip_offsets[PIPE_MAX_TEXTURE_LEVELS]; + size_t secondary_mip_offsets[PIPE_MAX_TEXTURE_LEVELS]; enum swr_resource_status status; }; diff -Nru mesa-12.0.6/src/gallium/drivers/swr/swr_scratch.cpp mesa-17.0.7/src/gallium/drivers/swr/swr_scratch.cpp --- mesa-12.0.6/src/gallium/drivers/swr/swr_scratch.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/swr_scratch.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -23,7 +23,9 @@ #include "util/u_memory.h" #include "swr_context.h" +#include "swr_screen.h" #include "swr_scratch.h" +#include "swr_fence_work.h" #include "api.h" @@ -35,7 +37,6 @@ { void *ptr; assert(space); - assert(user_buffer); assert(size); if (size >= 2048) { /* XXX TODO create KNOB_ for this */ @@ -47,18 +48,18 @@ /* Need to grow space */ if (max_size_in_flight > space->current_size) { - /* Must idle the pipeline, this is infrequent */ - SwrWaitForIdle(ctx->swrContext); - space->current_size = max_size_in_flight; if (space->base) { - align_free(space->base); + /* defer delete, use aligned-free */ + struct swr_screen *screen = swr_screen(ctx->pipe.screen); + swr_fence_work_free(screen->flush_fence, space->base, true); space->base = NULL; } if (!space->base) { - space->base = (uint8_t *)align_malloc(space->current_size, 4); + space->base = (uint8_t *)AlignedMalloc(space->current_size, + sizeof(void *)); space->head = (void *)space->base; } } @@ -66,14 +67,6 @@ /* Wrap */ if (((uint8_t *)space->head + size) >= ((uint8_t *)space->base + space->current_size)) { - /* - * TODO XXX: Should add a fence on wrap. Assumption is that - * current_space >> size, and there are at least MAX_DRAWS_IN_FLIGHT - * draws in scratch. So fence would always be met on wrap. A fence - * would ensure that first frame in buffer is done before wrapping. - * If fence ever needs to be waited on, can increase buffer size. - * So far in testing, this hasn't been necessary. - */ space->head = space->base; } @@ -82,7 +75,8 @@ } /* Copy user_buffer to scratch */ - memcpy(ptr, user_buffer, size); + if (user_buffer) + memcpy(ptr, user_buffer, size); return ptr; } @@ -103,14 +97,10 @@ struct swr_scratch_buffers *scratch = ctx->scratch; if (scratch) { - if (scratch->vs_constants.base) - align_free(scratch->vs_constants.base); - if (scratch->fs_constants.base) - align_free(scratch->fs_constants.base); - if (scratch->vertex_buffer.base) - align_free(scratch->vertex_buffer.base); - if (scratch->index_buffer.base) - align_free(scratch->index_buffer.base); + AlignedFree(scratch->vs_constants.base); + AlignedFree(scratch->fs_constants.base); + AlignedFree(scratch->vertex_buffer.base); + AlignedFree(scratch->index_buffer.base); FREE(scratch); } } diff -Nru mesa-12.0.6/src/gallium/drivers/swr/swr_screen.cpp mesa-17.0.7/src/gallium/drivers/swr/swr_screen.cpp --- mesa-12.0.6/src/gallium/drivers/swr/swr_screen.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/swr_screen.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -21,6 +21,13 @@ * IN THE SOFTWARE. ***************************************************************************/ +#include "swr_context.h" +#include "swr_public.h" +#include "swr_screen.h" +#include "swr_resource.h" +#include "swr_fence.h" +#include "gen_knobs.h" + #include "pipe/p_screen.h" #include "pipe/p_defines.h" #include "util/u_memory.h" @@ -28,23 +35,16 @@ #include "util/u_inlines.h" #include "util/u_cpu_detect.h" #include "util/u_format_s3tc.h" +#include "util/u_string.h" #include "state_tracker/sw_winsys.h" -extern "C" { -#include "gallivm/lp_bld_limits.h" -} - -#include "swr_public.h" -#include "swr_screen.h" -#include "swr_context.h" -#include "swr_resource.h" -#include "swr_fence.h" -#include "gen_knobs.h" - #include "jit_api.h" +#include "memory/TilingFunctions.h" + #include +#include /* MSVC case instensitive compare */ #if defined(PIPE_CC_MSVC) @@ -55,7 +55,7 @@ * Max texture sizes * XXX Check max texture size values against core and sampler. */ -#define SWR_MAX_TEXTURE_SIZE (4 * 1048 * 1048 * 1024ULL) /* 4GB */ +#define SWR_MAX_TEXTURE_SIZE (4 * 1024 * 1024 * 1024ULL) /* 4GB */ #define SWR_MAX_TEXTURE_2D_LEVELS 14 /* 8K x 8K for now */ #define SWR_MAX_TEXTURE_3D_LEVELS 12 /* 2K x 2K x 2K for now */ #define SWR_MAX_TEXTURE_CUBE_LEVELS 14 /* 8K x 8K for now */ @@ -64,7 +64,11 @@ static const char * swr_get_name(struct pipe_screen *screen) { - return "SWR"; + static char buf[100]; + util_snprintf(buf, sizeof(buf), "SWR (LLVM %u.%u, %u bits)", + HAVE_LLVM >> 8, HAVE_LLVM & 0xff, + lp_native_vector_width ); + return buf; } static const char * @@ -150,58 +154,20 @@ swr_get_param(struct pipe_screen *screen, enum pipe_cap param) { switch (param) { - case PIPE_CAP_NPOT_TEXTURES: - case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES: - return 1; - case PIPE_CAP_TWO_SIDED_STENCIL: - return 1; - case PIPE_CAP_SM3: - return 1; - case PIPE_CAP_ANISOTROPIC_FILTER: - return 0; - case PIPE_CAP_POINT_SPRITE: - return 1; + /* limits */ case PIPE_CAP_MAX_RENDER_TARGETS: return PIPE_MAX_COLOR_BUFS; - case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS: - return 1; - case PIPE_CAP_OCCLUSION_QUERY: - case PIPE_CAP_QUERY_TIME_ELAPSED: - case PIPE_CAP_QUERY_PIPELINE_STATISTICS: - return 1; - case PIPE_CAP_TEXTURE_MIRROR_CLAMP: - return 1; - case PIPE_CAP_TEXTURE_SHADOW_MAP: - return 1; - case PIPE_CAP_TEXTURE_SWIZZLE: - return 1; - case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK: - return 0; case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: return SWR_MAX_TEXTURE_2D_LEVELS; case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: return SWR_MAX_TEXTURE_3D_LEVELS; case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: return SWR_MAX_TEXTURE_CUBE_LEVELS; - case PIPE_CAP_BLEND_EQUATION_SEPARATE: - return 1; - case PIPE_CAP_INDEP_BLEND_ENABLE: - return 1; - case PIPE_CAP_INDEP_BLEND_FUNC: - return 1; - case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT: - return 0; // Don't support lower left frag coord. - case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT: - case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER: - case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: - return 1; - case PIPE_CAP_DEPTH_CLIP_DISABLE: - return 1; case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS: return MAX_SO_STREAMS; case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS: case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS: - return MAX_ATTRIBUTES; + return MAX_ATTRIBUTES * 4; case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES: case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS: return 1024; @@ -209,130 +175,111 @@ return 1; case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE: return 2048; - case PIPE_CAP_PRIMITIVE_RESTART: - return 1; - case PIPE_CAP_SHADER_STENCIL_EXPORT: - return 1; - case PIPE_CAP_TGSI_INSTANCEID: - case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR: - case PIPE_CAP_START_INSTANCE: - return 1; - case PIPE_CAP_SEAMLESS_CUBE_MAP: - case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE: - return 1; case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS: return SWR_MAX_TEXTURE_ARRAY_LAYERS; case PIPE_CAP_MIN_TEXEL_OFFSET: return -8; case PIPE_CAP_MAX_TEXEL_OFFSET: return 7; - case PIPE_CAP_CONDITIONAL_RENDER: - return 1; - case PIPE_CAP_TEXTURE_BARRIER: - return 0; - case PIPE_CAP_FRAGMENT_COLOR_CLAMPED: - case PIPE_CAP_VERTEX_COLOR_UNCLAMPED: /* draw module */ - case PIPE_CAP_VERTEX_COLOR_CLAMPED: /* draw module */ - return 1; - case PIPE_CAP_MIXED_COLORBUFFER_FORMATS: - return 1; case PIPE_CAP_GLSL_FEATURE_LEVEL: return 330; - case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION: - return 0; - case PIPE_CAP_COMPUTE: - return 0; - case PIPE_CAP_USER_VERTEX_BUFFERS: - case PIPE_CAP_USER_INDEX_BUFFERS: - case PIPE_CAP_USER_CONSTANT_BUFFERS: - case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME: - case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT: - return 1; case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: return 16; - case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS: - case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY: - case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY: - case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY: - case PIPE_CAP_TEXTURE_MULTISAMPLE: - return 0; case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT: return 64; - case PIPE_CAP_QUERY_TIMESTAMP: - return 1; - case PIPE_CAP_CUBE_MAP_ARRAY: - return 0; - case PIPE_CAP_TEXTURE_BUFFER_OBJECTS: - return 1; case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE: return 65536; case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT: return 0; - case PIPE_CAP_TGSI_TEXCOORD: - case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER: - return 0; case PIPE_CAP_MAX_VIEWPORTS: return 1; case PIPE_CAP_ENDIANNESS: return PIPE_ENDIAN_NATIVE; - case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS: - case PIPE_CAP_TEXTURE_GATHER_SM5: + case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET: + case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET: return 0; + + /* supported features */ + case PIPE_CAP_NPOT_TEXTURES: + case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES: + case PIPE_CAP_MIXED_COLOR_DEPTH_BITS: + case PIPE_CAP_TWO_SIDED_STENCIL: + case PIPE_CAP_SM3: + case PIPE_CAP_POINT_SPRITE: + case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS: + case PIPE_CAP_OCCLUSION_QUERY: + case PIPE_CAP_QUERY_TIME_ELAPSED: + case PIPE_CAP_QUERY_PIPELINE_STATISTICS: + case PIPE_CAP_TEXTURE_MIRROR_CLAMP: + case PIPE_CAP_TEXTURE_SHADOW_MAP: + case PIPE_CAP_TEXTURE_SWIZZLE: + case PIPE_CAP_BLEND_EQUATION_SEPARATE: + case PIPE_CAP_INDEP_BLEND_ENABLE: + case PIPE_CAP_INDEP_BLEND_FUNC: + case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT: + case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER: + case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: + case PIPE_CAP_DEPTH_CLIP_DISABLE: + case PIPE_CAP_PRIMITIVE_RESTART: + case PIPE_CAP_TGSI_INSTANCEID: + case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR: + case PIPE_CAP_START_INSTANCE: + case PIPE_CAP_SEAMLESS_CUBE_MAP: + case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE: + case PIPE_CAP_CONDITIONAL_RENDER: + case PIPE_CAP_VERTEX_COLOR_UNCLAMPED: + case PIPE_CAP_MIXED_COLORBUFFER_FORMATS: + case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION: + case PIPE_CAP_USER_VERTEX_BUFFERS: + case PIPE_CAP_USER_INDEX_BUFFERS: + case PIPE_CAP_USER_CONSTANT_BUFFERS: + case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS: + case PIPE_CAP_QUERY_TIMESTAMP: + case PIPE_CAP_TEXTURE_BUFFER_OBJECTS: case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT: + case PIPE_CAP_FAKE_SW_MSAA: + case PIPE_CAP_DRAW_INDIRECT: + case PIPE_CAP_UMA: + case PIPE_CAP_CONDITIONAL_RENDER_INVERTED: + case PIPE_CAP_CLIP_HALFZ: + case PIPE_CAP_POLYGON_OFFSET_CLAMP: + case PIPE_CAP_DEPTH_BOUNDS_TEST: + case PIPE_CAP_TEXTURE_FLOAT_LINEAR: + case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR: + case PIPE_CAP_CULL_DISTANCE: + case PIPE_CAP_CUBE_MAP_ARRAY: return 1; + + /* unsupported features */ + case PIPE_CAP_ANISOTROPIC_FILTER: + case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK: + case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT: + case PIPE_CAP_SHADER_STENCIL_EXPORT: + case PIPE_CAP_TEXTURE_BARRIER: + case PIPE_CAP_FRAGMENT_COLOR_CLAMPED: + case PIPE_CAP_VERTEX_COLOR_CLAMPED: + case PIPE_CAP_COMPUTE: + case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT: + case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS: + case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY: + case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY: + case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY: + case PIPE_CAP_TEXTURE_MULTISAMPLE: + case PIPE_CAP_TGSI_TEXCOORD: + case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER: + case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS: + case PIPE_CAP_TEXTURE_GATHER_SM5: case PIPE_CAP_TEXTURE_QUERY_LOD: case PIPE_CAP_SAMPLE_SHADING: case PIPE_CAP_TEXTURE_GATHER_OFFSETS: case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION: case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE: case PIPE_CAP_SAMPLER_VIEW_TARGET: - return 0; - case PIPE_CAP_FAKE_SW_MSAA: - return 1; - case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET: - case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET: - return 0; - case PIPE_CAP_DRAW_INDIRECT: - return 1; - - case PIPE_CAP_VENDOR_ID: - return 0xFFFFFFFF; - case PIPE_CAP_DEVICE_ID: - return 0xFFFFFFFF; - case PIPE_CAP_ACCELERATED: - return 0; - case PIPE_CAP_VIDEO_MEMORY: { - /* XXX: Do we want to return the full amount of system memory ? */ - uint64_t system_memory; - - if (!os_get_total_physical_memory(&system_memory)) - return 0; - - return (int)(system_memory >> 20); - } - case PIPE_CAP_UMA: - return 1; - case PIPE_CAP_CONDITIONAL_RENDER_INVERTED: - return 1; - case PIPE_CAP_CLIP_HALFZ: - return 1; case PIPE_CAP_VERTEXID_NOBASE: - return 0; - case PIPE_CAP_POLYGON_OFFSET_CLAMP: - return 1; case PIPE_CAP_MULTISAMPLE_Z_RESOLVE: - return 0; case PIPE_CAP_RESOURCE_FROM_USER_MEMORY: - return 0; // xxx case PIPE_CAP_DEVICE_RESET_STATUS_QUERY: - return 0; case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS: - return 0; - case PIPE_CAP_DEPTH_BOUNDS_TEST: - return 0; // xxx - case PIPE_CAP_TEXTURE_FLOAT_LINEAR: - case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR: - return 1; case PIPE_CAP_TGSI_TXQS: case PIPE_CAP_FORCE_PERSAMPLE_INTERP: case PIPE_CAP_SHAREABLE_SHADERS: @@ -358,9 +305,34 @@ case PIPE_CAP_PCI_DEVICE: case PIPE_CAP_PCI_FUNCTION: case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT: - case PIPE_CAP_CULL_DISTANCE: case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES: + case PIPE_CAP_TGSI_VOTE: + case PIPE_CAP_MAX_WINDOW_RECTANGLES: + case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED: + case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS: + case PIPE_CAP_TGSI_ARRAY_COMPONENTS: + case PIPE_CAP_TGSI_CAN_READ_OUTPUTS: + case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME: + case PIPE_CAP_NATIVE_FENCE_FD: + case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY: + case PIPE_CAP_TGSI_FS_FBFETCH: return 0; + + case PIPE_CAP_VENDOR_ID: + return 0xFFFFFFFF; + case PIPE_CAP_DEVICE_ID: + return 0xFFFFFFFF; + case PIPE_CAP_ACCELERATED: + return 0; + case PIPE_CAP_VIDEO_MEMORY: { + /* XXX: Do we want to return the full amount of system memory ? */ + uint64_t system_memory; + + if (!os_get_total_physical_memory(&system_memory)) + return 0; + + return (int)(system_memory >> 20); + } } /* should only get here on unhandled cases */ @@ -394,7 +366,7 @@ case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY: return 0.0; case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS: - return 0.0; + return 16.0; /* arbitrary */ case PIPE_CAPF_GUARD_BAND_LEFT: case PIPE_CAPF_GUARD_BAND_TOP: case PIPE_CAPF_GUARD_BAND_RIGHT: @@ -409,46 +381,221 @@ SWR_FORMAT mesa_to_swr_format(enum pipe_format format) { - const struct util_format_description *format_desc = - util_format_description(format); - if (!format_desc) - return (SWR_FORMAT)-1; + static const std::map mesa2swr = { + /* depth / stencil */ + {PIPE_FORMAT_Z16_UNORM, R16_UNORM}, // z + {PIPE_FORMAT_Z32_FLOAT, R32_FLOAT}, // z + {PIPE_FORMAT_Z24_UNORM_S8_UINT, R24_UNORM_X8_TYPELESS}, // z + {PIPE_FORMAT_Z24X8_UNORM, R24_UNORM_X8_TYPELESS}, // z + {PIPE_FORMAT_Z32_FLOAT_S8X24_UINT, R32_FLOAT_X8X24_TYPELESS}, // z + + /* alpha */ + {PIPE_FORMAT_A8_UNORM, A8_UNORM}, + {PIPE_FORMAT_A16_UNORM, A16_UNORM}, + {PIPE_FORMAT_A16_FLOAT, A16_FLOAT}, + {PIPE_FORMAT_A32_FLOAT, A32_FLOAT}, + + /* odd sizes, bgr */ + {PIPE_FORMAT_B5G6R5_UNORM, B5G6R5_UNORM}, + {PIPE_FORMAT_B5G6R5_SRGB, B5G6R5_UNORM_SRGB}, + {PIPE_FORMAT_B5G5R5A1_UNORM, B5G5R5A1_UNORM}, + {PIPE_FORMAT_B5G5R5X1_UNORM, B5G5R5X1_UNORM}, + {PIPE_FORMAT_B4G4R4A4_UNORM, B4G4R4A4_UNORM}, + {PIPE_FORMAT_B8G8R8A8_UNORM, B8G8R8A8_UNORM}, + {PIPE_FORMAT_B8G8R8A8_SRGB, B8G8R8A8_UNORM_SRGB}, + {PIPE_FORMAT_B8G8R8X8_UNORM, B8G8R8X8_UNORM}, + {PIPE_FORMAT_B8G8R8X8_SRGB, B8G8R8X8_UNORM_SRGB}, + + /* rgb10a2 */ + {PIPE_FORMAT_R10G10B10A2_UNORM, R10G10B10A2_UNORM}, + {PIPE_FORMAT_R10G10B10A2_SNORM, R10G10B10A2_SNORM}, + {PIPE_FORMAT_R10G10B10A2_USCALED, R10G10B10A2_USCALED}, + {PIPE_FORMAT_R10G10B10A2_SSCALED, R10G10B10A2_SSCALED}, + {PIPE_FORMAT_R10G10B10A2_UINT, R10G10B10A2_UINT}, + + /* rgb10x2 */ + {PIPE_FORMAT_R10G10B10X2_USCALED, R10G10B10X2_USCALED}, + + /* bgr10a2 */ + {PIPE_FORMAT_B10G10R10A2_UNORM, B10G10R10A2_UNORM}, + {PIPE_FORMAT_B10G10R10A2_SNORM, B10G10R10A2_SNORM}, + {PIPE_FORMAT_B10G10R10A2_USCALED, B10G10R10A2_USCALED}, + {PIPE_FORMAT_B10G10R10A2_SSCALED, B10G10R10A2_SSCALED}, + {PIPE_FORMAT_B10G10R10A2_UINT, B10G10R10A2_UINT}, + + /* bgr10x2 */ + {PIPE_FORMAT_B10G10R10X2_UNORM, B10G10R10X2_UNORM}, + + /* r11g11b10 */ + {PIPE_FORMAT_R11G11B10_FLOAT, R11G11B10_FLOAT}, + + /* 32 bits per component */ + {PIPE_FORMAT_R32_FLOAT, R32_FLOAT}, + {PIPE_FORMAT_R32G32_FLOAT, R32G32_FLOAT}, + {PIPE_FORMAT_R32G32B32_FLOAT, R32G32B32_FLOAT}, + {PIPE_FORMAT_R32G32B32A32_FLOAT, R32G32B32A32_FLOAT}, + {PIPE_FORMAT_R32G32B32X32_FLOAT, R32G32B32X32_FLOAT}, + + {PIPE_FORMAT_R32_USCALED, R32_USCALED}, + {PIPE_FORMAT_R32G32_USCALED, R32G32_USCALED}, + {PIPE_FORMAT_R32G32B32_USCALED, R32G32B32_USCALED}, + {PIPE_FORMAT_R32G32B32A32_USCALED, R32G32B32A32_USCALED}, + + {PIPE_FORMAT_R32_SSCALED, R32_SSCALED}, + {PIPE_FORMAT_R32G32_SSCALED, R32G32_SSCALED}, + {PIPE_FORMAT_R32G32B32_SSCALED, R32G32B32_SSCALED}, + {PIPE_FORMAT_R32G32B32A32_SSCALED, R32G32B32A32_SSCALED}, + + {PIPE_FORMAT_R32_UINT, R32_UINT}, + {PIPE_FORMAT_R32G32_UINT, R32G32_UINT}, + {PIPE_FORMAT_R32G32B32_UINT, R32G32B32_UINT}, + {PIPE_FORMAT_R32G32B32A32_UINT, R32G32B32A32_UINT}, + + {PIPE_FORMAT_R32_SINT, R32_SINT}, + {PIPE_FORMAT_R32G32_SINT, R32G32_SINT}, + {PIPE_FORMAT_R32G32B32_SINT, R32G32B32_SINT}, + {PIPE_FORMAT_R32G32B32A32_SINT, R32G32B32A32_SINT}, + + /* 16 bits per component */ + {PIPE_FORMAT_R16_UNORM, R16_UNORM}, + {PIPE_FORMAT_R16G16_UNORM, R16G16_UNORM}, + {PIPE_FORMAT_R16G16B16_UNORM, R16G16B16_UNORM}, + {PIPE_FORMAT_R16G16B16A16_UNORM, R16G16B16A16_UNORM}, + {PIPE_FORMAT_R16G16B16X16_UNORM, R16G16B16X16_UNORM}, + + {PIPE_FORMAT_R16_USCALED, R16_USCALED}, + {PIPE_FORMAT_R16G16_USCALED, R16G16_USCALED}, + {PIPE_FORMAT_R16G16B16_USCALED, R16G16B16_USCALED}, + {PIPE_FORMAT_R16G16B16A16_USCALED, R16G16B16A16_USCALED}, + + {PIPE_FORMAT_R16_SNORM, R16_SNORM}, + {PIPE_FORMAT_R16G16_SNORM, R16G16_SNORM}, + {PIPE_FORMAT_R16G16B16_SNORM, R16G16B16_SNORM}, + {PIPE_FORMAT_R16G16B16A16_SNORM, R16G16B16A16_SNORM}, + + {PIPE_FORMAT_R16_SSCALED, R16_SSCALED}, + {PIPE_FORMAT_R16G16_SSCALED, R16G16_SSCALED}, + {PIPE_FORMAT_R16G16B16_SSCALED, R16G16B16_SSCALED}, + {PIPE_FORMAT_R16G16B16A16_SSCALED, R16G16B16A16_SSCALED}, + + {PIPE_FORMAT_R16_UINT, R16_UINT}, + {PIPE_FORMAT_R16G16_UINT, R16G16_UINT}, + {PIPE_FORMAT_R16G16B16_UINT, R16G16B16_UINT}, + {PIPE_FORMAT_R16G16B16A16_UINT, R16G16B16A16_UINT}, + + {PIPE_FORMAT_R16_SINT, R16_SINT}, + {PIPE_FORMAT_R16G16_SINT, R16G16_SINT}, + {PIPE_FORMAT_R16G16B16_SINT, R16G16B16_SINT}, + {PIPE_FORMAT_R16G16B16A16_SINT, R16G16B16A16_SINT}, + + {PIPE_FORMAT_R16_FLOAT, R16_FLOAT}, + {PIPE_FORMAT_R16G16_FLOAT, R16G16_FLOAT}, + {PIPE_FORMAT_R16G16B16_FLOAT, R16G16B16_FLOAT}, + {PIPE_FORMAT_R16G16B16A16_FLOAT, R16G16B16A16_FLOAT}, + {PIPE_FORMAT_R16G16B16X16_FLOAT, R16G16B16X16_FLOAT}, + + /* 8 bits per component */ + {PIPE_FORMAT_R8_UNORM, R8_UNORM}, + {PIPE_FORMAT_R8G8_UNORM, R8G8_UNORM}, + {PIPE_FORMAT_R8G8B8_UNORM, R8G8B8_UNORM}, + {PIPE_FORMAT_R8G8B8_SRGB, R8G8B8_UNORM_SRGB}, + {PIPE_FORMAT_R8G8B8A8_UNORM, R8G8B8A8_UNORM}, + {PIPE_FORMAT_R8G8B8A8_SRGB, R8G8B8A8_UNORM_SRGB}, + {PIPE_FORMAT_R8G8B8X8_UNORM, R8G8B8X8_UNORM}, + {PIPE_FORMAT_R8G8B8X8_SRGB, R8G8B8X8_UNORM_SRGB}, + + {PIPE_FORMAT_R8_USCALED, R8_USCALED}, + {PIPE_FORMAT_R8G8_USCALED, R8G8_USCALED}, + {PIPE_FORMAT_R8G8B8_USCALED, R8G8B8_USCALED}, + {PIPE_FORMAT_R8G8B8A8_USCALED, R8G8B8A8_USCALED}, + + {PIPE_FORMAT_R8_SNORM, R8_SNORM}, + {PIPE_FORMAT_R8G8_SNORM, R8G8_SNORM}, + {PIPE_FORMAT_R8G8B8_SNORM, R8G8B8_SNORM}, + {PIPE_FORMAT_R8G8B8A8_SNORM, R8G8B8A8_SNORM}, + + {PIPE_FORMAT_R8_SSCALED, R8_SSCALED}, + {PIPE_FORMAT_R8G8_SSCALED, R8G8_SSCALED}, + {PIPE_FORMAT_R8G8B8_SSCALED, R8G8B8_SSCALED}, + {PIPE_FORMAT_R8G8B8A8_SSCALED, R8G8B8A8_SSCALED}, + + {PIPE_FORMAT_R8_UINT, R8_UINT}, + {PIPE_FORMAT_R8G8_UINT, R8G8_UINT}, + {PIPE_FORMAT_R8G8B8_UINT, R8G8B8_UINT}, + {PIPE_FORMAT_R8G8B8A8_UINT, R8G8B8A8_UINT}, + + {PIPE_FORMAT_R8_SINT, R8_SINT}, + {PIPE_FORMAT_R8G8_SINT, R8G8_SINT}, + {PIPE_FORMAT_R8G8B8_SINT, R8G8B8_SINT}, + {PIPE_FORMAT_R8G8B8A8_SINT, R8G8B8A8_SINT}, + + /* These formats are valid for vertex data, but should not be used + * for render targets. + */ - // more robust check would be comparing all attributes of the formats - // luckily format names are mostly standardized - for (int i = 0; i < NUM_SWR_FORMATS; i++) { - const SWR_FORMAT_INFO &swr_desc = GetFormatInfo((SWR_FORMAT)i); - - if (!strcasecmp(format_desc->short_name, swr_desc.name)) - return (SWR_FORMAT)i; - } - - // ... with some exceptions - switch (format) { - case PIPE_FORMAT_R8G8B8A8_SRGB: - return R8G8B8A8_UNORM_SRGB; - case PIPE_FORMAT_B8G8R8A8_SRGB: - return B8G8R8A8_UNORM_SRGB; - case PIPE_FORMAT_I8_UNORM: - return R8_UNORM; - case PIPE_FORMAT_Z16_UNORM: - return R16_UNORM; - case PIPE_FORMAT_Z24X8_UNORM: - case PIPE_FORMAT_Z24_UNORM_S8_UINT: - return R24_UNORM_X8_TYPELESS; - case PIPE_FORMAT_Z32_FLOAT: - return R32_FLOAT; - case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT: - return R32_FLOAT_X8X24_TYPELESS; - case PIPE_FORMAT_L8A8_UNORM: - return R8G8_UNORM; - default: - break; - } - - debug_printf("asked to convert unsupported format %s\n", - format_desc->name); - return (SWR_FORMAT)-1; + {PIPE_FORMAT_R32_FIXED, R32_SFIXED}, + {PIPE_FORMAT_R32G32_FIXED, R32G32_SFIXED}, + {PIPE_FORMAT_R32G32B32_FIXED, R32G32B32_SFIXED}, + {PIPE_FORMAT_R32G32B32A32_FIXED, R32G32B32A32_SFIXED}, + + {PIPE_FORMAT_R64_FLOAT, R64_FLOAT}, + {PIPE_FORMAT_R64G64_FLOAT, R64G64_FLOAT}, + {PIPE_FORMAT_R64G64B64_FLOAT, R64G64B64_FLOAT}, + {PIPE_FORMAT_R64G64B64A64_FLOAT, R64G64B64A64_FLOAT}, + + /* These formats have entries in SWR but don't have Load/StoreTile + * implementations. That means these aren't renderable, and thus having + * a mapping entry here is detrimental. + */ + /* + + {PIPE_FORMAT_L8_UNORM, L8_UNORM}, + {PIPE_FORMAT_I8_UNORM, I8_UNORM}, + {PIPE_FORMAT_L8A8_UNORM, L8A8_UNORM}, + {PIPE_FORMAT_L16_UNORM, L16_UNORM}, + {PIPE_FORMAT_UYVY, YCRCB_SWAPUVY}, + + {PIPE_FORMAT_L8_SRGB, L8_UNORM_SRGB}, + {PIPE_FORMAT_L8A8_SRGB, L8A8_UNORM_SRGB}, + + {PIPE_FORMAT_DXT1_RGBA, BC1_UNORM}, + {PIPE_FORMAT_DXT3_RGBA, BC2_UNORM}, + {PIPE_FORMAT_DXT5_RGBA, BC3_UNORM}, + + {PIPE_FORMAT_DXT1_SRGBA, BC1_UNORM_SRGB}, + {PIPE_FORMAT_DXT3_SRGBA, BC2_UNORM_SRGB}, + {PIPE_FORMAT_DXT5_SRGBA, BC3_UNORM_SRGB}, + + {PIPE_FORMAT_RGTC1_UNORM, BC4_UNORM}, + {PIPE_FORMAT_RGTC1_SNORM, BC4_SNORM}, + {PIPE_FORMAT_RGTC2_UNORM, BC5_UNORM}, + {PIPE_FORMAT_RGTC2_SNORM, BC5_SNORM}, + + {PIPE_FORMAT_L16A16_UNORM, L16A16_UNORM}, + {PIPE_FORMAT_I16_UNORM, I16_UNORM}, + {PIPE_FORMAT_L16_FLOAT, L16_FLOAT}, + {PIPE_FORMAT_L16A16_FLOAT, L16A16_FLOAT}, + {PIPE_FORMAT_I16_FLOAT, I16_FLOAT}, + {PIPE_FORMAT_L32_FLOAT, L32_FLOAT}, + {PIPE_FORMAT_L32A32_FLOAT, L32A32_FLOAT}, + {PIPE_FORMAT_I32_FLOAT, I32_FLOAT}, + + {PIPE_FORMAT_I8_UINT, I8_UINT}, + {PIPE_FORMAT_L8_UINT, L8_UINT}, + {PIPE_FORMAT_L8A8_UINT, L8A8_UINT}, + + {PIPE_FORMAT_I8_SINT, I8_SINT}, + {PIPE_FORMAT_L8_SINT, L8_SINT}, + {PIPE_FORMAT_L8A8_SINT, L8A8_SINT}, + + */ + }; + + auto it = mesa2swr.find(format); + if (it == mesa2swr.end()) + return (SWR_FORMAT)-1; + else + return it->second; } static boolean @@ -457,12 +604,14 @@ struct sw_winsys *winsys = screen->winsys; struct sw_displaytarget *dt; + const unsigned width = align(res->swr.width, res->swr.halign); + const unsigned height = align(res->swr.height, res->swr.valign); + UINT stride; dt = winsys->displaytarget_create(winsys, res->base.bind, res->base.format, - res->alignedWidth, - res->alignedHeight, + width, height, 64, NULL, &stride); @@ -476,14 +625,14 @@ /* Clear the display target surface */ if (map) - memset(map, 0, res->alignedHeight * stride); + memset(map, 0, height * stride); winsys->displaytarget_unmap(winsys, dt); return TRUE; } -static boolean +static bool swr_texture_layout(struct swr_screen *screen, struct swr_resource *res, boolean allocate) @@ -499,86 +648,164 @@ if (res->has_stencil && !res->has_depth) fmt = PIPE_FORMAT_R8_UINT; + /* We always use the SWR layout. For 2D and 3D textures this looks like: + * + * |<------- pitch ------->| + * +=======================+------- + * |Array 0 | ^ + * | | | + * | Level 0 | | + * | | | + * | | qpitch + * +-----------+-----------+ | + * | | L2L2L2L2 | | + * | Level 1 | L3L3 | | + * | | L4 | v + * +===========+===========+------- + * |Array 1 | + * | | + * | Level 0 | + * | | + * | | + * +-----------+-----------+ + * | | L2L2L2L2 | + * | Level 1 | L3L3 | + * | | L4 | + * +===========+===========+ + * + * The overall width in bytes is known as the pitch, while the overall + * height in rows is the qpitch. Array slices are laid out logically below + * one another, qpitch rows apart. For 3D surfaces, the "level" values are + * just invalid for the higher array numbers (since depth is also + * minified). 1D and 1D array surfaces are stored effectively the same way, + * except that pitch never plays into it. All the levels are logically + * adjacent to each other on the X axis. The qpitch becomes the number of + * elements between array slices, while the pitch is unused. + * + * Each level's sizes are subject to the valign and halign settings of the + * surface. For compressed formats that swr is unaware of, we will use an + * appropriately-sized uncompressed format, and scale the widths/heights. + * + * This surface is stored inside res->swr. For depth/stencil textures, + * res->secondary will have an identically-laid-out but R8_UINT-formatted + * stencil tree. In the Z32F_S8 case, the primary surface still has 64-bpp + * texels, to simplify map/unmap logic which copies the stencil values + * in/out. + */ + res->swr.width = pt->width0; res->swr.height = pt->height0; - res->swr.depth = pt->depth0; res->swr.type = swr_convert_target_type(pt->target); res->swr.tileMode = SWR_TILE_NONE; res->swr.format = mesa_to_swr_format(fmt); - res->swr.numSamples = (1 << pt->nr_samples); - - SWR_FORMAT_INFO finfo = GetFormatInfo(res->swr.format); - - unsigned total_size = 0; - unsigned width = pt->width0; - unsigned height = pt->height0; - unsigned depth = pt->depth0; - unsigned layers = pt->array_size; + res->swr.numSamples = std::max(1u, pt->nr_samples); - for (int level = 0; level <= pt->last_level; level++) { - unsigned alignedWidth, alignedHeight; - unsigned num_slices; + if (pt->bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) { + res->swr.halign = KNOB_MACROTILE_X_DIM; + res->swr.valign = KNOB_MACROTILE_Y_DIM; + } else { + res->swr.halign = 1; + res->swr.valign = 1; + } - if (pt->bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) { - alignedWidth = align(width, KNOB_MACROTILE_X_DIM); - alignedHeight = align(height, KNOB_MACROTILE_Y_DIM); - } else { - alignedWidth = width; - alignedHeight = height; + unsigned halign = res->swr.halign * util_format_get_blockwidth(fmt); + unsigned width = align(pt->width0, halign); + if (pt->target == PIPE_TEXTURE_1D || pt->target == PIPE_TEXTURE_1D_ARRAY) { + for (int level = 1; level <= pt->last_level; level++) + width += align(u_minify(pt->width0, level), halign); + res->swr.pitch = util_format_get_blocksize(fmt); + res->swr.qpitch = util_format_get_nblocksx(fmt, width); + } else { + // The pitch is the overall width of the texture in bytes. Most of the + // time this is the pitch of level 0 since all the other levels fit + // underneath it. However in some degenerate situations, the width of + // level1 + level2 may be larger. In that case, we use those + // widths. This can happen if, e.g. halign is 32, and the width of level + // 0 is 32 or less. In that case, the aligned levels 1 and 2 will also + // be 32 each, adding up to 64. + unsigned valign = res->swr.valign * util_format_get_blockheight(fmt); + if (pt->last_level > 1) { + width = std::max( + width, + align(u_minify(pt->width0, 1), halign) + + align(u_minify(pt->width0, 2), halign)); } + res->swr.pitch = util_format_get_stride(fmt, width); - if (level == 0) { - res->alignedWidth = alignedWidth; - res->alignedHeight = alignedHeight; + // The qpitch is controlled by either the height of the second LOD, or + // the combination of all the later LODs. + unsigned height = align(pt->height0, valign); + if (pt->last_level == 1) { + height += align(u_minify(pt->height0, 1), valign); + } else if (pt->last_level > 1) { + unsigned level1 = align(u_minify(pt->height0, 1), valign); + unsigned level2 = 0; + for (int level = 2; level <= pt->last_level; level++) { + level2 += align(u_minify(pt->height0, level), valign); + } + height += std::max(level1, level2); } + res->swr.qpitch = util_format_get_nblocksy(fmt, height); + } - res->row_stride[level] = alignedWidth * finfo.Bpp; - res->img_stride[level] = res->row_stride[level] * alignedHeight; - res->mip_offsets[level] = total_size; - - if (pt->target == PIPE_TEXTURE_3D) - num_slices = depth; - else if (pt->target == PIPE_TEXTURE_1D_ARRAY - || pt->target == PIPE_TEXTURE_2D_ARRAY - || pt->target == PIPE_TEXTURE_CUBE - || pt->target == PIPE_TEXTURE_CUBE_ARRAY) - num_slices = layers; - else - num_slices = 1; - - total_size += res->img_stride[level] * num_slices; - if (total_size > SWR_MAX_TEXTURE_SIZE) - return FALSE; + if (pt->target == PIPE_TEXTURE_3D) + res->swr.depth = pt->depth0; + else + res->swr.depth = pt->array_size; + + // Fix up swr format if necessary so that LOD offset computation works + if (res->swr.format == (SWR_FORMAT)-1) { + switch (util_format_get_blocksize(fmt)) { + default: + unreachable("Unexpected format block size"); + case 1: res->swr.format = R8_UINT; break; + case 2: res->swr.format = R16_UINT; break; + case 4: res->swr.format = R32_UINT; break; + case 8: + if (util_format_is_compressed(fmt)) + res->swr.format = BC4_UNORM; + else + res->swr.format = R32G32_UINT; + break; + case 16: + if (util_format_is_compressed(fmt)) + res->swr.format = BC5_UNORM; + else + res->swr.format = R32G32B32A32_UINT; + break; + } + } - width = u_minify(width, 1); - height = u_minify(height, 1); - depth = u_minify(depth, 1); + for (int level = 0; level <= pt->last_level; level++) { + res->mip_offsets[level] = + ComputeSurfaceOffset(0, 0, 0, 0, 0, level, &res->swr); } - res->swr.halign = res->alignedWidth; - res->swr.valign = res->alignedHeight; - res->swr.pitch = res->row_stride[0]; + size_t total_size = + (size_t)res->swr.depth * res->swr.qpitch * res->swr.pitch; + if (total_size > SWR_MAX_TEXTURE_SIZE) + return false; if (allocate) { res->swr.pBaseAddress = (uint8_t *)AlignedMalloc(total_size, 64); if (res->has_depth && res->has_stencil) { - SWR_FORMAT_INFO finfo = GetFormatInfo(res->secondary.format); - res->secondary.width = pt->width0; - res->secondary.height = pt->height0; - res->secondary.depth = pt->depth0; - res->secondary.type = SURFACE_2D; - res->secondary.tileMode = SWR_TILE_NONE; + res->secondary = res->swr; res->secondary.format = R8_UINT; - res->secondary.numSamples = (1 << pt->nr_samples); - res->secondary.pitch = res->alignedWidth * finfo.Bpp; + res->secondary.pitch = res->swr.pitch / util_format_get_blocksize(fmt); + + for (int level = 0; level <= pt->last_level; level++) { + res->secondary_mip_offsets[level] = + ComputeSurfaceOffset(0, 0, 0, 0, 0, level, &res->secondary); + } res->secondary.pBaseAddress = (uint8_t *)AlignedMalloc( - res->alignedHeight * res->secondary.pitch, 64); + res->secondary.depth * res->secondary.qpitch * + res->secondary.pitch, 64); } } - return TRUE; + return true; } static boolean @@ -645,29 +872,21 @@ struct swr_resource *spr = swr_resource(pt); struct pipe_context *pipe = screen->pipe; - /* Only wait on fence if the resource is being used */ - if (pipe && spr->status) { - /* But, if there's no fence pending, submit one. - * XXX: Remove once draw timestamps are implmented. */ - if (!swr_is_fence_pending(screen->flush_fence)) - swr_fence_submit(swr_context(pipe), screen->flush_fence); - - swr_fence_finish(p_screen, screen->flush_fence, 0); - swr_resource_unused(pt); - } - - /* - * Free resource primary surface. If resource is display target, winsys - * manages the buffer and will free it on displaytarget_destroy. - */ if (spr->display_target) { - /* display target */ + /* If resource is display target, winsys manages the buffer and will + * free it on displaytarget_destroy. */ + swr_fence_finish(p_screen, NULL, screen->flush_fence, 0); + struct sw_winsys *winsys = screen->winsys; winsys->displaytarget_destroy(winsys, spr->display_target); - } else - AlignedFree(spr->swr.pBaseAddress); - AlignedFree(spr->secondary.pBaseAddress); + } else { + /* For regular resources, defer deletion */ + swr_resource_unused(pt); + swr_fence_work_free(screen->flush_fence, spr->swr.pBaseAddress, true); + swr_fence_work_free(screen->flush_fence, + spr->secondary.pBaseAddress, true); + } FREE(spr); } @@ -687,7 +906,7 @@ struct pipe_context *pipe = screen->pipe; if (pipe) { - swr_fence_finish(p_screen, screen->flush_fence, 0); + swr_fence_finish(p_screen, NULL, screen->flush_fence, 0); swr_resource_unused(resource); SwrEndFrame(swr_context(pipe)->swrContext); } @@ -707,7 +926,7 @@ fprintf(stderr, "SWR destroy screen!\n"); - swr_fence_finish(p_screen, screen->flush_fence, 0); + swr_fence_finish(p_screen, NULL, screen->flush_fence, 0); swr_fence_reference(p_screen, &screen->flush_fence, NULL); JitDestroyContext(screen->hJitMgr); @@ -720,7 +939,7 @@ PUBLIC struct pipe_screen * -swr_create_screen(struct sw_winsys *winsys) +swr_create_screen_internal(struct sw_winsys *winsys) { struct swr_screen *screen = CALLOC_STRUCT(swr_screen); @@ -731,6 +950,11 @@ g_GlobalKnobs.MAX_PRIMS_PER_DRAW.Value(49152); } + if (!lp_build_init()) { + FREE(screen); + return NULL; + } + screen->winsys = winsys; screen->base.get_name = swr_get_name; screen->base.get_vendor = swr_get_vendor; @@ -748,7 +972,7 @@ screen->base.flush_frontbuffer = swr_flush_frontbuffer; - screen->hJitMgr = JitCreateContext(KNOB_SIMD_WIDTH, KNOB_ARCH_STR); + screen->hJitMgr = JitCreateContext(KNOB_SIMD_WIDTH, KNOB_ARCH_STR, "swr"); swr_fence_init(&screen->base); @@ -757,14 +981,3 @@ return &screen->base; } -struct sw_winsys * -swr_get_winsys(struct pipe_screen *pipe) -{ - return ((struct swr_screen *)pipe)->winsys; -} - -struct sw_displaytarget * -swr_get_displaytarget(struct pipe_resource *resource) -{ - return ((struct swr_resource *)resource)->display_target; -} diff -Nru mesa-12.0.6/src/gallium/drivers/swr/swr_shader.cpp mesa-17.0.7/src/gallium/drivers/swr/swr_shader.cpp --- mesa-12.0.6/src/gallium/drivers/swr/swr_shader.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/swr_shader.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -34,6 +34,7 @@ #include "builder.h" #include "tgsi/tgsi_strings.h" +#include "util/u_format.h" #include "gallivm/lp_bld_init.h" #include "gallivm/lp_bld_flow.h" #include "gallivm/lp_bld_struct.h" @@ -41,9 +42,15 @@ #include "swr_context.h" #include "swr_context_llvm.h" +#include "swr_resource.h" #include "swr_state.h" #include "swr_screen.h" +using namespace SwrJit; + +static unsigned +locate_linkage(ubyte name, ubyte index, struct tgsi_shader_info *info); + bool operator==(const swr_jit_fs_key &lhs, const swr_jit_fs_key &rhs) { return !memcmp(&lhs, &rhs, sizeof(lhs)); @@ -80,18 +87,36 @@ info.base.file_max[TGSI_FILE_SAMPLER_VIEW] + 1; for (unsigned i = 0; i < key.nr_sampler_views; i++) { if (info.base.file_mask[TGSI_FILE_SAMPLER_VIEW] & (1 << i)) { + const struct pipe_sampler_view *view = + ctx->sampler_views[shader_type][i]; lp_sampler_static_texture_state( - &key.sampler[i].texture_state, - ctx->sampler_views[shader_type][i]); + &key.sampler[i].texture_state, view); + if (view) { + struct swr_resource *swr_res = swr_resource(view->texture); + const struct util_format_description *desc = + util_format_description(view->format); + if (swr_res->has_depth && swr_res->has_stencil && + !util_format_has_depth(desc)) + key.sampler[i].texture_state.format = PIPE_FORMAT_S8_UINT; + } } } } else { key.nr_sampler_views = key.nr_samplers; for (unsigned i = 0; i < key.nr_sampler_views; i++) { if (info.base.file_mask[TGSI_FILE_SAMPLER] & (1 << i)) { + const struct pipe_sampler_view *view = + ctx->sampler_views[shader_type][i]; lp_sampler_static_texture_state( - &key.sampler[i].texture_state, - ctx->sampler_views[shader_type][i]); + &key.sampler[i].texture_state, view); + if (view) { + struct swr_resource *swr_res = swr_resource(view->texture); + const struct util_format_description *desc = + util_format_description(view->format); + if (swr_res->has_depth && swr_res->has_stencil && + !util_format_has_depth(desc)) + key.sampler[i].texture_state.format = PIPE_FORMAT_S8_UINT; + } } } } @@ -106,7 +131,7 @@ key.nr_cbufs = ctx->framebuffer.nr_cbufs; key.light_twoside = ctx->rasterizer->light_twoside; - key.flatshade = ctx->rasterizer->flatshade; + key.sprite_coord_enable = ctx->rasterizer->sprite_coord_enable; memcpy(&key.vs_output_semantic_name, &ctx->vs->info.base.output_semantic_name, sizeof(key.vs_output_semantic_name)); @@ -124,6 +149,11 @@ { memset(&key, 0, sizeof(key)); + key.clip_plane_mask = + swr_vs->info.base.clipdist_writemask ? + swr_vs->info.base.clipdist_writemask & ctx->rasterizer->clip_plane_enable : + ctx->rasterizer->clip_plane_enable; + swr_generate_sampler_key(swr_vs->info, ctx, PIPE_SHADER_VERTEX, key); } @@ -150,18 +180,6 @@ { struct swr_vertex_shader *swr_vs = ctx->vs; - swr_vs->linkageMask = 0; - - for (unsigned i = 0; i < swr_vs->info.base.num_outputs; i++) { - switch (swr_vs->info.base.output_semantic_name[i]) { - case TGSI_SEMANTIC_POSITION: - break; - default: - swr_vs->linkageMask |= (1 << i); - break; - } - } - LLVMValueRef inputs[PIPE_MAX_SHADER_INPUTS][TGSI_NUM_CHANNELS]; LLVMValueRef outputs[PIPE_MAX_SHADER_OUTPUTS][TGSI_NUM_CHANNELS]; @@ -256,6 +274,63 @@ } } + if (ctx->rasterizer->clip_plane_enable || + swr_vs->info.base.culldist_writemask) { + unsigned clip_mask = ctx->rasterizer->clip_plane_enable; + + unsigned cv = 0; + if (swr_vs->info.base.writes_clipvertex) { + cv = 1 + locate_linkage(TGSI_SEMANTIC_CLIPVERTEX, 0, + &swr_vs->info.base); + } else { + for (int i = 0; i < PIPE_MAX_SHADER_OUTPUTS; i++) { + if (swr_vs->info.base.output_semantic_name[i] == TGSI_SEMANTIC_POSITION && + swr_vs->info.base.output_semantic_index[i] == 0) { + cv = i; + break; + } + } + } + LLVMValueRef cx = LLVMBuildLoad(gallivm->builder, outputs[cv][0], ""); + LLVMValueRef cy = LLVMBuildLoad(gallivm->builder, outputs[cv][1], ""); + LLVMValueRef cz = LLVMBuildLoad(gallivm->builder, outputs[cv][2], ""); + LLVMValueRef cw = LLVMBuildLoad(gallivm->builder, outputs[cv][3], ""); + + for (unsigned val = 0; val < PIPE_MAX_CLIP_PLANES; val++) { + // clip distance overrides user clip planes + if ((swr_vs->info.base.clipdist_writemask & clip_mask & (1 << val)) || + ((swr_vs->info.base.culldist_writemask << swr_vs->info.base.num_written_clipdistance) & (1 << val))) { + unsigned cv = 1 + locate_linkage(TGSI_SEMANTIC_CLIPDIST, val < 4 ? 0 : 1, + &swr_vs->info.base); + if (val < 4) { + LLVMValueRef dist = LLVMBuildLoad(gallivm->builder, outputs[cv][val], ""); + STORE(unwrap(dist), vtxOutput, {0, 0, VERTEX_CLIPCULL_DIST_LO_SLOT, val}); + } else { + LLVMValueRef dist = LLVMBuildLoad(gallivm->builder, outputs[cv][val - 4], ""); + STORE(unwrap(dist), vtxOutput, {0, 0, VERTEX_CLIPCULL_DIST_HI_SLOT, val - 4}); + } + continue; + } + + if (!(clip_mask & (1 << val))) + continue; + + Value *px = LOAD(GEP(hPrivateData, {0, swr_draw_context_userClipPlanes, val, 0})); + Value *py = LOAD(GEP(hPrivateData, {0, swr_draw_context_userClipPlanes, val, 1})); + Value *pz = LOAD(GEP(hPrivateData, {0, swr_draw_context_userClipPlanes, val, 2})); + Value *pw = LOAD(GEP(hPrivateData, {0, swr_draw_context_userClipPlanes, val, 3})); + Value *dist = FADD(FMUL(unwrap(cx), VBROADCAST(px)), + FADD(FMUL(unwrap(cy), VBROADCAST(py)), + FADD(FMUL(unwrap(cz), VBROADCAST(pz)), + FMUL(unwrap(cw), VBROADCAST(pw))))); + + if (val < 4) + STORE(dist, vtxOutput, {0, 0, VERTEX_CLIPCULL_DIST_LO_SLOT, val}); + else + STORE(dist, vtxOutput, {0, 0, VERTEX_CLIPCULL_DIST_HI_SLOT, val - 4}); + } + } + RET_VOID(); gallivm_verify_function(gallivm, wrap(pFunction)); @@ -269,9 +344,7 @@ debug_printf("vert shader %p\n", pFunc); assert(pFunc && "Error: VertShader = NULL"); -#if (LLVM_VERSION_MAJOR == 3) && (LLVM_VERSION_MINOR >= 5) JM()->mIsModuleFinalized = true; -#endif return pFunc; } @@ -298,15 +371,6 @@ } } - if (name == TGSI_SEMANTIC_COLOR) { // BCOLOR fallback - for (int i = 0; i < PIPE_MAX_SHADER_OUTPUTS; i++) { - if ((info->output_semantic_name[i] == TGSI_SEMANTIC_BCOLOR) - && (info->output_semantic_index[i] == index)) { - return i - 1; // position is not part of the linkage - } - } - } - return 0xFFFFFFFF; } @@ -355,15 +419,13 @@ GEP(hPrivateData, {0, swr_draw_context_num_constantsFS}); const_sizes_ptr->setName("num_fs_constants"); - // xxx should check for flat shading versus interpolation - - // load *pAttribs, *pPerspAttribs Value *pRawAttribs = LOAD(pPS, {0, SWR_PS_CONTEXT_pAttribs}, "pRawAttribs"); Value *pPerspAttribs = LOAD(pPS, {0, SWR_PS_CONTEXT_pPerspAttribs}, "pPerspAttribs"); swr_fs->constantMask = 0; + swr_fs->flatConstantMask = 0; swr_fs->pointSpriteMask = 0; for (int attrib = 0; attrib < PIPE_MAX_SHADER_INPUTS; attrib++) { @@ -393,7 +455,8 @@ // load/compute w Value *vw = nullptr, *pAttribs; - if (interpMode == TGSI_INTERPOLATE_PERSPECTIVE) { + if (interpMode == TGSI_INTERPOLATE_PERSPECTIVE || + interpMode == TGSI_INTERPOLATE_COLOR) { pAttribs = pPerspAttribs; switch (interpLoc) { case TGSI_INTERPOLATE_LOC_CENTER: @@ -428,8 +491,14 @@ inputs[attrib][3] = wrap(VIMMED1(1.0f)); continue; } else if (semantic_name == TGSI_SEMANTIC_POSITION) { // gl_FragCoord - inputs[attrib][0] = wrap(LOAD(pPS, {0, SWR_PS_CONTEXT_vX, PixelPositions_center}, "vX")); - inputs[attrib][1] = wrap(LOAD(pPS, {0, SWR_PS_CONTEXT_vY, PixelPositions_center}, "vY")); + if (swr_fs->info.base.properties[TGSI_PROPERTY_FS_COORD_PIXEL_CENTER] == + TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER) { + inputs[attrib][0] = wrap(LOAD(pPS, {0, SWR_PS_CONTEXT_vX, PixelPositions_center}, "vX")); + inputs[attrib][1] = wrap(LOAD(pPS, {0, SWR_PS_CONTEXT_vY, PixelPositions_center}, "vY")); + } else { + inputs[attrib][0] = wrap(LOAD(pPS, {0, SWR_PS_CONTEXT_vX, PixelPositions_UL}, "vX")); + inputs[attrib][1] = wrap(LOAD(pPS, {0, SWR_PS_CONTEXT_vY, PixelPositions_UL}, "vY")); + } inputs[attrib][2] = wrap(LOAD(pPS, {0, SWR_PS_CONTEXT_vZ}, "vZ")); inputs[attrib][3] = wrap(LOAD(pPS, {0, SWR_PS_CONTEXT_vOneOverW, PixelPositions_center}, "vOneOverW")); @@ -445,50 +514,70 @@ unsigned linkedAttrib = locate_linkage(semantic_name, semantic_idx, &ctx->vs->info.base); - if (linkedAttrib == 0xFFFFFFFF) { - // not found - check for point sprite - if (ctx->rasterizer->sprite_coord_enable) { - linkedAttrib = ctx->vs->info.base.num_outputs - 1; - swr_fs->pointSpriteMask |= (1 << linkedAttrib); - } else { - fprintf(stderr, - "Missing %s[%d]\n", - tgsi_semantic_names[semantic_name], - semantic_idx); - assert(0 && "attribute linkage not found"); + if (semantic_name == TGSI_SEMANTIC_GENERIC && + key.sprite_coord_enable & (1 << semantic_idx)) { + /* we add an extra attrib to the backendState in swr_update_derived. */ + linkedAttrib = ctx->vs->info.base.num_outputs - 1; + swr_fs->pointSpriteMask |= (1 << linkedAttrib); + } else if (linkedAttrib == 0xFFFFFFFF) { + inputs[attrib][0] = wrap(VIMMED1(0.0f)); + inputs[attrib][1] = wrap(VIMMED1(0.0f)); + inputs[attrib][2] = wrap(VIMMED1(0.0f)); + inputs[attrib][3] = wrap(VIMMED1(1.0f)); + /* If we're reading in color and 2-sided lighting is enabled, we have + * to keep going. + */ + if (semantic_name != TGSI_SEMANTIC_COLOR || !key.light_twoside) + continue; + } else { + if (interpMode == TGSI_INTERPOLATE_CONSTANT) { + swr_fs->constantMask |= 1 << linkedAttrib; + } else if (interpMode == TGSI_INTERPOLATE_COLOR) { + swr_fs->flatConstantMask |= 1 << linkedAttrib; } } - if (interpMode == TGSI_INTERPOLATE_CONSTANT) { - swr_fs->constantMask |= 1 << linkedAttrib; - } - - for (int channel = 0; channel < TGSI_NUM_CHANNELS; channel++) { - if (mask & (1 << channel)) { - Value *indexA = C(linkedAttrib * 12 + channel); - Value *indexB = C(linkedAttrib * 12 + channel + 4); - Value *indexC = C(linkedAttrib * 12 + channel + 8); + unsigned bcolorAttrib = 0xFFFFFFFF; + Value *offset = NULL; + if (semantic_name == TGSI_SEMANTIC_COLOR && key.light_twoside) { + bcolorAttrib = locate_linkage( + TGSI_SEMANTIC_BCOLOR, semantic_idx, &ctx->vs->info.base); + /* Neither front nor back colors were available. Nothing to load. */ + if (bcolorAttrib == 0xFFFFFFFF && linkedAttrib == 0xFFFFFFFF) + continue; + /* If there is no front color, just always use the back color. */ + if (linkedAttrib == 0xFFFFFFFF) + linkedAttrib = bcolorAttrib; - if ((semantic_name == TGSI_SEMANTIC_COLOR) - && ctx->rasterizer->light_twoside) { - unsigned bcolorAttrib = locate_linkage( - TGSI_SEMANTIC_BCOLOR, semantic_idx, &ctx->vs->info.base); + if (bcolorAttrib != 0xFFFFFFFF) { + if (interpMode == TGSI_INTERPOLATE_CONSTANT) { + swr_fs->constantMask |= 1 << bcolorAttrib; + } else if (interpMode == TGSI_INTERPOLATE_COLOR) { + swr_fs->flatConstantMask |= 1 << bcolorAttrib; + } - unsigned diff = 12 * (bcolorAttrib - linkedAttrib); + unsigned diff = 12 * (bcolorAttrib - linkedAttrib); + if (diff) { Value *back = XOR(C(1), LOAD(pPS, {0, SWR_PS_CONTEXT_frontFace}), "backFace"); - Value *offset = MUL(back, C(diff)); + offset = MUL(back, C(diff)); offset->setName("offset"); + } + } + } + for (int channel = 0; channel < TGSI_NUM_CHANNELS; channel++) { + if (mask & (1 << channel)) { + Value *indexA = C(linkedAttrib * 12 + channel); + Value *indexB = C(linkedAttrib * 12 + channel + 4); + Value *indexC = C(linkedAttrib * 12 + channel + 8); + + if (offset) { indexA = ADD(indexA, offset); indexB = ADD(indexB, offset); indexC = ADD(indexC, offset); - - if (interpMode == TGSI_INTERPOLATE_CONSTANT) { - swr_fs->constantMask |= 1 << bcolorAttrib; - } } Value *va = VBROADCAST(LOAD(GEP(pAttribs, indexA))); @@ -497,9 +586,6 @@ if (interpMode == TGSI_INTERPOLATE_CONSTANT) { inputs[attrib][channel] = wrap(va); - } else if ((interpMode == TGSI_INTERPOLATE_COLOR) && - (key.flatshade == true)) { - inputs[attrib][channel] = wrap(vc); } else { Value *vk = FSUB(FSUB(VIMMED1(1.0f), vi), vj); @@ -509,7 +595,8 @@ Value *interp1 = FMUL(vb, vj); interp = FADD(interp, interp1); interp = FADD(interp, vc); - if (interpMode == TGSI_INTERPOLATE_PERSPECTIVE) + if (interpMode == TGSI_INTERPOLATE_PERSPECTIVE || + interpMode == TGSI_INTERPOLATE_COLOR) interp = FMUL(interp, vw); inputs[attrib][channel] = wrap(interp); } @@ -566,7 +653,8 @@ LLVMValueRef out = LLVMBuildLoad(gallivm->builder, outputs[attrib][channel], ""); - if (swr_fs->info.base.properties[TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS]) { + if (swr_fs->info.base.properties[TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS] && + swr_fs->info.base.output_semantic_index[attrib] == 0) { for (uint32_t rt = 0; rt < key.nr_cbufs; rt++) { STORE(unwrap(out), pPS, @@ -616,9 +704,7 @@ debug_printf("frag shader %p\n", kernel); assert(kernel && "Error: FragShader = NULL"); -#if (LLVM_VERSION_MAJOR == 3) && (LLVM_VERSION_MINOR >= 5) JM()->mIsModuleFinalized = true; -#endif return kernel; } diff -Nru mesa-12.0.6/src/gallium/drivers/swr/swr_shader.h mesa-17.0.7/src/gallium/drivers/swr/swr_shader.h --- mesa-12.0.6/src/gallium/drivers/swr/swr_shader.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/swr_shader.h 2017-06-01 10:37:10.000000000 +0000 @@ -51,12 +51,13 @@ struct swr_jit_fs_key : swr_jit_sampler_key { unsigned nr_cbufs; unsigned light_twoside; - unsigned flatshade; + unsigned sprite_coord_enable; ubyte vs_output_semantic_name[PIPE_MAX_SHADER_OUTPUTS]; ubyte vs_output_semantic_idx[PIPE_MAX_SHADER_OUTPUTS]; }; struct swr_jit_vs_key : swr_jit_sampler_key { + unsigned clip_plane_mask; // from rasterizer state & vs_info }; namespace std diff -Nru mesa-12.0.6/src/gallium/drivers/swr/swr_state.cpp mesa-17.0.7/src/gallium/drivers/swr/swr_state.cpp --- mesa-12.0.6/src/gallium/drivers/swr/swr_state.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/swr_state.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -38,6 +38,7 @@ #include "util/u_inlines.h" #include "util/u_helpers.h" #include "util/u_framebuffer.h" +#include "util/u_viewport.h" #include "swr_state.h" #include "swr_context.h" @@ -235,7 +236,7 @@ static void swr_bind_sampler_states(struct pipe_context *pipe, - unsigned shader, + enum pipe_shader_type shader, unsigned start, unsigned num, void **samplers) @@ -282,7 +283,7 @@ static void swr_set_sampler_views(struct pipe_context *pipe, - unsigned shader, + enum pipe_shader_type shader, unsigned start, unsigned num, struct pipe_sampler_view **views) @@ -370,7 +371,10 @@ { struct swr_vertex_shader *swr_vs = (swr_vertex_shader *)vs; FREE((void *)swr_vs->pipe.tokens); - delete swr_vs; + struct swr_screen *screen = swr_screen(pipe->screen); + + /* Defer deletion of vs state */ + swr_fence_work_delete_vs(screen->flush_fence, swr_vs); } static void * @@ -406,7 +410,10 @@ { struct swr_fragment_shader *swr_fs = (swr_fragment_shader *)fs; FREE((void *)swr_fs->pipe.tokens); - delete swr_fs; + struct swr_screen *screen = swr_screen(pipe->screen); + + /* Defer deleton of fs state */ + swr_fence_work_delete_fs(screen->flush_fence, swr_fs); } @@ -414,7 +421,7 @@ swr_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, - struct pipe_constant_buffer *cb) + const struct pipe_constant_buffer *cb) { struct swr_context *ctx = swr_context(pipe); struct pipe_resource *constants = cb ? cb->buffer : NULL; @@ -446,6 +453,7 @@ assert(num_elements <= PIPE_MAX_ATTRIBS); velems = CALLOC_STRUCT(swr_vertex_element_state); if (velems) { + velems->fsState.bVertexIDOffsetEnable = true; velems->fsState.numAttribs = num_elements; for (unsigned i = 0; i < num_elements; i++) { // XXX: we should do this keyed on the VS usage info @@ -484,6 +492,15 @@ const SWR_FORMAT_INFO &swr_desc = GetFormatInfo( mesa_to_swr_format(attribs[i].src_format)); velems->stream_pitch[attribs[i].vertex_buffer_index] += swr_desc.Bpp; + + if (attribs[i].instance_divisor != 0) { + velems->instanced_bufs |= 1U << attribs[i].vertex_buffer_index; + uint32_t *min_instance_div = + &velems->min_instance_div[attribs[i].vertex_buffer_index]; + if (!*min_instance_div || + attribs[i].instance_divisor < *min_instance_div) + *min_instance_div = attribs[i].instance_divisor; + } } } @@ -575,6 +592,10 @@ struct swr_context *ctx = swr_context(pipe); ctx->scissor = *scissor; + ctx->swr_scissor.xmin = scissor->minx; + ctx->swr_scissor.xmax = scissor->maxx; + ctx->swr_scissor.ymin = scissor->miny; + ctx->swr_scissor.ymax = scissor->maxy; ctx->dirty |= SWR_NEW_SCISSOR; } @@ -603,18 +624,7 @@ assert(fb->height <= KNOB_GUARDBAND_HEIGHT); if (changed) { - unsigned i; - for (i = 0; i < fb->nr_cbufs; ++i) - pipe_surface_reference(&ctx->framebuffer.cbufs[i], fb->cbufs[i]); - for (; i < ctx->framebuffer.nr_cbufs; ++i) - pipe_surface_reference(&ctx->framebuffer.cbufs[i], NULL); - - ctx->framebuffer.nr_cbufs = fb->nr_cbufs; - - ctx->framebuffer.width = fb->width; - ctx->framebuffer.height = fb->height; - - pipe_surface_reference(&ctx->framebuffer.zsbuf, fb->zsbuf); + util_copy_framebuffer_state(&ctx->framebuffer, fb); ctx->dirty |= SWR_NEW_FRAMEBUFFER; } @@ -668,12 +678,29 @@ swr_resource_read(ib->buffer); } + /* transform feedback buffers */ + for (uint32_t i = 0; i < ctx->num_so_targets; i++) { + struct pipe_stream_output_target *target = ctx->so_targets[i]; + if (target && target->buffer) + swr_resource_write(target->buffer); + } + /* texture sampler views */ - for (uint32_t i = 0; i < PIPE_MAX_SHADER_SAMPLER_VIEWS; i++) { - struct pipe_sampler_view *view = - ctx->sampler_views[PIPE_SHADER_FRAGMENT][i]; - if (view) - swr_resource_read(view->texture); + for (uint32_t j : {PIPE_SHADER_VERTEX, PIPE_SHADER_FRAGMENT}) { + for (uint32_t i = 0; i < ctx->num_sampler_views[j]; i++) { + struct pipe_sampler_view *view = ctx->sampler_views[j][i]; + if (view) + swr_resource_read(view->texture); + } + } + + /* constant buffers */ + for (uint32_t j : {PIPE_SHADER_VERTEX, PIPE_SHADER_FRAGMENT}) { + for (uint32_t i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) { + struct pipe_constant_buffer *cb = &ctx->constants[j][i]; + if (cb->buffer) + swr_resource_read(cb->buffer); + } } } @@ -686,25 +713,46 @@ for (unsigned i = 0; i < num_sampler_views; i++) { struct pipe_sampler_view *view = ctx->sampler_views[shader_type][i]; + struct swr_jit_texture *jit_tex = &textures[i]; + memset(jit_tex, 0, sizeof(*jit_tex)); if (view) { struct pipe_resource *res = view->texture; struct swr_resource *swr_res = swr_resource(res); - struct swr_jit_texture *jit_tex = &textures[i]; - memset(jit_tex, 0, sizeof(*jit_tex)); + SWR_SURFACE_STATE *swr = &swr_res->swr; + size_t *mip_offsets = swr_res->mip_offsets; + if (swr_res->has_depth && swr_res->has_stencil && + !util_format_has_depth(util_format_description(view->format))) { + swr = &swr_res->secondary; + mip_offsets = swr_res->secondary_mip_offsets; + } + jit_tex->width = res->width0; jit_tex->height = res->height0; - jit_tex->depth = res->depth0; - jit_tex->first_level = view->u.tex.first_level; - jit_tex->last_level = view->u.tex.last_level; - jit_tex->base_ptr = swr_res->swr.pBaseAddress; + jit_tex->base_ptr = swr->pBaseAddress; + if (view->target != PIPE_BUFFER) { + jit_tex->first_level = view->u.tex.first_level; + jit_tex->last_level = view->u.tex.last_level; + if (view->target == PIPE_TEXTURE_3D) + jit_tex->depth = res->depth0; + else + jit_tex->depth = + view->u.tex.last_layer - view->u.tex.first_layer + 1; + jit_tex->base_ptr += view->u.tex.first_layer * + swr->qpitch * swr->pitch; + } else { + unsigned view_blocksize = util_format_get_blocksize(view->format); + jit_tex->base_ptr += view->u.buf.offset; + jit_tex->width = view->u.buf.size / view_blocksize; + jit_tex->depth = 1; + } for (unsigned level = jit_tex->first_level; level <= jit_tex->last_level; level++) { - jit_tex->row_stride[level] = swr_res->row_stride[level]; - jit_tex->img_stride[level] = swr_res->img_stride[level]; - jit_tex->mip_offsets[level] = swr_res->mip_offsets[level]; + jit_tex->row_stride[level] = swr->pitch; + jit_tex->img_stride[level] = swr->qpitch * swr->pitch; + jit_tex->mip_offsets[level] = mip_offsets[level]; } } } @@ -774,12 +822,99 @@ } } +static bool +swr_change_rt(struct swr_context *ctx, + unsigned attachment, + const struct pipe_surface *sf) +{ + swr_draw_context *pDC = &ctx->swrDC; + struct SWR_SURFACE_STATE *rt = &pDC->renderTargets[attachment]; + + /* Do nothing if the render target hasn't changed */ + if ((!sf || !sf->texture) && rt->pBaseAddress == nullptr) + return false; + + /* Deal with disabling RT up front */ + if (!sf || !sf->texture) { + /* If detaching attachment, mark tiles as RESOLVED so core + * won't try to load from non-existent target. */ + swr_store_render_target(&ctx->pipe, attachment, SWR_TILE_RESOLVED); + *rt = {0}; + return true; + } + + const struct swr_resource *swr = swr_resource(sf->texture); + const SWR_SURFACE_STATE *swr_surface = &swr->swr; + SWR_FORMAT fmt = mesa_to_swr_format(sf->format); + + if (attachment == SWR_ATTACHMENT_STENCIL && swr->secondary.pBaseAddress) { + swr_surface = &swr->secondary; + fmt = swr_surface->format; + } + + if (rt->pBaseAddress == swr_surface->pBaseAddress && + rt->format == fmt && + rt->lod == sf->u.tex.level && + rt->arrayIndex == sf->u.tex.first_layer) + return false; + + bool need_fence = false; + + /* StoreTile for changed target */ + if (rt->pBaseAddress) { + /* If changing attachment to a new target, mark tiles as + * INVALID so they are reloaded from surface. */ + swr_store_render_target(&ctx->pipe, attachment, SWR_TILE_INVALID); + need_fence = true; + } + + /* Make new attachment */ + *rt = *swr_surface; + rt->format = fmt; + rt->lod = sf->u.tex.level; + rt->arrayIndex = sf->u.tex.first_layer; + + return need_fence; +} + +static inline void +swr_user_vbuf_range(const struct pipe_draw_info *info, + const struct swr_vertex_element_state *velems, + const struct pipe_vertex_buffer *vb, + uint32_t i, + uint32_t *totelems, + uint32_t *base, + uint32_t *size) +{ + /* FIXME: The size is too large - we don't access the full extra stride. */ + unsigned elems; + if (velems->instanced_bufs & (1U << i)) { + elems = info->instance_count / velems->min_instance_div[i] + 1; + *totelems = info->start_instance + elems; + *base = info->start_instance * vb->stride; + *size = elems * vb->stride; + } else if (vb->stride) { + elems = info->max_index - info->min_index + 1; + *totelems = info->max_index + 1; + *base = info->min_index * vb->stride; + *size = elems * vb->stride; + } else { + *totelems = 1; + *base = 0; + *size = velems->stream_pitch[i]; + } +} + void swr_update_derived(struct pipe_context *pipe, const struct pipe_draw_info *p_draw_info) { struct swr_context *ctx = swr_context(pipe); - struct swr_screen *screen = swr_screen(ctx->pipe.screen); + struct swr_screen *screen = swr_screen(pipe->screen); + + /* Update screen->pipe to current pipe context. */ + if (screen->pipe != pipe) + screen->pipe = pipe; /* Any state that requires dirty flags to be re-triggered sets this mask */ /* For example, user_buffer vertex and index buffers. */ @@ -788,64 +923,30 @@ /* Render Targets */ if (ctx->dirty & SWR_NEW_FRAMEBUFFER) { struct pipe_framebuffer_state *fb = &ctx->framebuffer; - SWR_SURFACE_STATE *new_attachment[SWR_NUM_ATTACHMENTS] = {0}; - UINT i; + const struct util_format_description *desc = NULL; + bool need_fence = false; /* colorbuffer targets */ - if (fb->nr_cbufs) - for (i = 0; i < fb->nr_cbufs; ++i) - if (fb->cbufs[i]) { - struct swr_resource *colorBuffer = - swr_resource(fb->cbufs[i]->texture); - new_attachment[SWR_ATTACHMENT_COLOR0 + i] = &colorBuffer->swr; - } + if (fb->nr_cbufs) { + for (unsigned i = 0; i < fb->nr_cbufs; ++i) + need_fence |= swr_change_rt( + ctx, SWR_ATTACHMENT_COLOR0 + i, fb->cbufs[i]); + } + for (unsigned i = fb->nr_cbufs; i < SWR_NUM_RENDERTARGETS; ++i) + need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_COLOR0 + i, NULL); /* depth/stencil target */ - if (fb->zsbuf) { - struct swr_resource *depthStencilBuffer = - swr_resource(fb->zsbuf->texture); - if (depthStencilBuffer->has_depth) { - new_attachment[SWR_ATTACHMENT_DEPTH] = &depthStencilBuffer->swr; - - if (depthStencilBuffer->has_stencil) - new_attachment[SWR_ATTACHMENT_STENCIL] = - &depthStencilBuffer->secondary; - - } else if (depthStencilBuffer->has_stencil) - new_attachment[SWR_ATTACHMENT_STENCIL] = &depthStencilBuffer->swr; - } - - /* Make the attachment updates */ - swr_draw_context *pDC = &ctx->swrDC; - SWR_SURFACE_STATE *renderTargets = pDC->renderTargets; - unsigned need_fence = FALSE; - for (i = 0; i < SWR_NUM_ATTACHMENTS; i++) { - void *new_base = nullptr; - if (new_attachment[i]) - new_base = new_attachment[i]->pBaseAddress; - - /* StoreTile for changed target */ - if (renderTargets[i].pBaseAddress != new_base) { - if (renderTargets[i].pBaseAddress) { - /* If changing attachment to a new target, mark tiles as - * INVALID so they are reloaded from surface. - * If detaching attachment, mark tiles as RESOLVED so core - * won't try to load from non-existent target. */ - enum SWR_TILE_STATE post_state = (new_attachment[i] - ? SWR_TILE_INVALID : SWR_TILE_RESOLVED); - swr_store_render_target(pipe, i, post_state); - - need_fence |= TRUE; - } + if (fb->zsbuf) + desc = util_format_description(fb->zsbuf->format); + if (fb->zsbuf && util_format_has_depth(desc)) + need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_DEPTH, fb->zsbuf); + else + need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_DEPTH, NULL); - /* Make new attachment */ - if (new_attachment[i]) - renderTargets[i] = *new_attachment[i]; - else - if (renderTargets[i].pBaseAddress) - renderTargets[i] = {0}; - } - } + if (fb->zsbuf && util_format_has_stencil(desc)) + need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_STENCIL, fb->zsbuf); + else + need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_STENCIL, NULL); /* This fence ensures any attachment changes are resolved before the * next draw */ @@ -854,7 +955,9 @@ } /* Raster state */ - if (ctx->dirty & (SWR_NEW_RASTERIZER | SWR_NEW_FRAMEBUFFER)) { + if (ctx->dirty & (SWR_NEW_RASTERIZER | + SWR_NEW_VS | // clipping + SWR_NEW_FRAMEBUFFER)) { pipe_rasterizer_state *rasterizer = ctx->rasterizer; pipe_framebuffer_state *fb = &ctx->framebuffer; @@ -910,16 +1013,22 @@ rastState->depthFormat = swr_resource(zb->texture)->swr.format; rastState->depthClipEnable = rasterizer->depth_clip; + rastState->clipHalfZ = rasterizer->clip_halfz; + + rastState->clipDistanceMask = + ctx->vs->info.base.num_written_clipdistance ? + ctx->vs->info.base.clipdist_writemask & rasterizer->clip_plane_enable : + rasterizer->clip_plane_enable; + + rastState->cullDistanceMask = + ctx->vs->info.base.culldist_writemask << ctx->vs->info.base.num_written_clipdistance; SwrSetRastState(ctx->swrContext, rastState); } /* Scissor */ if (ctx->dirty & SWR_NEW_SCISSOR) { - pipe_scissor_state *scissor = &ctx->scissor; - BBOX bbox(scissor->miny, scissor->maxy, - scissor->minx, scissor->maxx); - SwrSetScissorRects(ctx->swrContext, 1, &bbox); + SwrSetScissorRects(ctx->swrContext, 1, &ctx->swr_scissor); } /* Viewport */ @@ -930,33 +1039,34 @@ pipe_rasterizer_state *rasterizer = ctx->rasterizer; SWR_VIEWPORT *vp = &ctx->derived.vp; - SWR_VIEWPORT_MATRIX *vpm = &ctx->derived.vpm; + SWR_VIEWPORT_MATRICES *vpm = &ctx->derived.vpm; vp->x = state->translate[0] - state->scale[0]; - vp->width = state->translate[0] + state->scale[0]; + vp->width = 2 * state->scale[0]; vp->y = state->translate[1] - fabs(state->scale[1]); - vp->height = state->translate[1] + fabs(state->scale[1]); - if (rasterizer->clip_halfz == 0) { - vp->minZ = state->translate[2] - state->scale[2]; - vp->maxZ = state->translate[2] + state->scale[2]; - } else { - vp->minZ = state->translate[2]; - vp->maxZ = state->translate[2] + state->scale[2]; - } - - vpm->m00 = state->scale[0]; - vpm->m11 = state->scale[1]; - vpm->m22 = state->scale[2]; - vpm->m30 = state->translate[0]; - vpm->m31 = state->translate[1]; - vpm->m32 = state->translate[2]; + vp->height = 2 * fabs(state->scale[1]); + util_viewport_zmin_zmax(state, rasterizer->clip_halfz, + &vp->minZ, &vp->maxZ); + + vpm->m00[0] = state->scale[0]; + vpm->m11[0] = state->scale[1]; + vpm->m22[0] = state->scale[2]; + vpm->m30[0] = state->translate[0]; + vpm->m31[0] = state->translate[1]; + vpm->m32[0] = state->translate[2]; /* Now that the matrix is calculated, clip the view coords to screen * size. OpenGL allows for -ve x,y in the viewport. */ - vp->x = std::max(vp->x, 0.0f); - vp->y = std::max(vp->y, 0.0f); - vp->width = std::min(vp->width, (float)fb->width); - vp->height = std::min(vp->height, (float)fb->height); + if (vp->x < 0.0f) { + vp->width += vp->x; + vp->x = 0.0f; + } + if (vp->y < 0.0f) { + vp->height += vp->y; + vp->y = 0.0f; + } + vp->width = std::min(vp->width, (float)fb->width - vp->x); + vp->height = std::min(vp->height, (float)fb->height - vp->y); SwrSetViewports(ctx->swrContext, 1, vp, vpm); } @@ -964,17 +1074,37 @@ /* Set vertex & index buffers */ /* (using draw info if called by swr_draw_vbo) */ if (ctx->dirty & SWR_NEW_VERTEX) { - uint32_t size, pitch, max_vertex, partial_inbounds; - const uint8_t *p_data; + uint32_t scratch_total; + uint8_t *scratch = NULL; /* If being called by swr_draw_vbo, copy draw details */ struct pipe_draw_info info = {0}; if (p_draw_info) info = *p_draw_info; + /* We must get all the scratch space in one go */ + scratch_total = 0; + for (UINT i = 0; i < ctx->num_vertex_buffers; i++) { + struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i]; + + if (!vb->user_buffer) + continue; + + uint32_t elems, base, size; + swr_user_vbuf_range(&info, ctx->velems, vb, i, &elems, &base, &size); + scratch_total += AlignUp(size, 4); + } + + if (scratch_total) { + scratch = (uint8_t *)swr_copy_to_scratch_space( + ctx, &ctx->scratch->vertex_buffer, NULL, scratch_total); + } + /* vertex buffers */ SWR_VERTEX_BUFFER_STATE swrVertexBuffers[PIPE_MAX_ATTRIBS]; for (UINT i = 0; i < ctx->num_vertex_buffers; i++) { + uint32_t size, pitch, elems, partial_inbounds; + const uint8_t *p_data; struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i]; pitch = vb->stride; @@ -983,7 +1113,7 @@ * size is based on buffer->width0 rather than info.max_index * to prevent having to validate VBO on each draw */ size = vb->buffer->width0; - max_vertex = size / pitch; + elems = size / pitch; partial_inbounds = size % pitch; p_data = swr_resource_data(vb->buffer) + vb->buffer_offset; @@ -993,24 +1123,17 @@ * revalidate on each draw */ post_update_dirty_flags |= SWR_NEW_VERTEX; - if (pitch) { - size = (info.max_index - info.min_index + 1) * pitch; - } else { - /* pitch = 0, means constant value - * set size to 1 vertex */ - size = ctx->velems->stream_pitch[i]; - } - - max_vertex = info.max_index + 1; + uint32_t base; + swr_user_vbuf_range(&info, ctx->velems, vb, i, &elems, &base, &size); partial_inbounds = 0; /* Copy only needed vertices to scratch space */ size = AlignUp(size, 4); - const void *ptr = (const uint8_t *) vb->user_buffer - + info.min_index * pitch; - ptr = swr_copy_to_scratch_space( - ctx, &ctx->scratch->vertex_buffer, ptr, size); - p_data = (const uint8_t *)ptr - info.min_index * pitch; + const void *ptr = (const uint8_t *) vb->user_buffer + base; + memcpy(scratch, ptr, size); + ptr = scratch; + scratch += size; + p_data = (const uint8_t *)ptr - base; } swrVertexBuffers[i] = {0}; @@ -1018,7 +1141,7 @@ swrVertexBuffers[i].pitch = pitch; swrVertexBuffers[i].pData = p_data; swrVertexBuffers[i].size = size; - swrVertexBuffers[i].maxVertex = max_vertex; + swrVertexBuffers[i].maxVertex = elems; swrVertexBuffers[i].partialInboundsSize = partial_inbounds; } @@ -1028,6 +1151,8 @@ /* index buffer, if required (info passed in by swr_draw_vbo) */ SWR_FORMAT index_type = R32_UINT; /* Default for non-indexed draws */ if (info.indexed) { + const uint8_t *p_data; + uint32_t size, pitch; struct pipe_index_buffer *ib = &ctx->index_buffer; pitch = ib->index_size ? ib->index_size : sizeof(uint32_t); @@ -1072,6 +1197,7 @@ /* VertexShader */ if (ctx->dirty & (SWR_NEW_VS | + SWR_NEW_RASTERIZER | // for clip planes SWR_NEW_SAMPLER | SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) { @@ -1189,6 +1315,7 @@ struct pipe_depth_state *depth = &(ctx->depth_stencil->depth); struct pipe_stencil_state *stencil = ctx->depth_stencil->stencil; SWR_DEPTH_STENCIL_STATE depthStencilState = {{0}}; + SWR_DEPTH_BOUNDS_STATE depthBoundsState = {0}; /* XXX, incomplete. Need to flesh out stencil & alpha test state struct pipe_stencil_state *front_stencil = @@ -1235,6 +1362,11 @@ depthStencilState.depthTestFunc = swr_convert_depth_func(depth->func); depthStencilState.depthWriteEnable = depth->writemask; SwrSetDepthStencilState(ctx->swrContext, &depthStencilState); + + depthBoundsState.depthBoundsTestEnable = depth->bounds_test; + depthBoundsState.depthBoundsTestMinValue = depth->bounds_min; + depthBoundsState.depthBoundsTestMaxValue = depth->bounds_max; + SwrSetDepthBoundsState(ctx->swrContext, &depthBoundsState); } /* Blend State */ @@ -1283,8 +1415,18 @@ &ctx->blend->compileState[target], sizeof(compileState.blendState)); + const SWR_FORMAT_INFO& info = GetFormatInfo(compileState.format); + if (compileState.blendState.logicOpEnable && + ((info.type[0] == SWR_TYPE_FLOAT) || info.isSRGB)) { + compileState.blendState.logicOpEnable = false; + } + + if (info.type[0] == SWR_TYPE_SINT || info.type[0] == SWR_TYPE_UINT) + compileState.blendState.blendEnable = false; + if (compileState.blendState.blendEnable == false && - compileState.blendState.logicOpEnable == false) { + compileState.blendState.logicOpEnable == false && + ctx->depth_stencil->alpha.enabled == 0) { SwrSetBlendFunc(ctx->swrContext, target, NULL); continue; } @@ -1292,7 +1434,12 @@ compileState.desc.alphaTestEnable = ctx->depth_stencil->alpha.enabled; compileState.desc.independentAlphaBlendEnable = - ctx->blend->pipe.independent_blend_enable; + (compileState.blendState.sourceBlendFactor != + compileState.blendState.sourceAlphaBlendFactor) || + (compileState.blendState.destBlendFactor != + compileState.blendState.destAlphaBlendFactor) || + (compileState.blendState.colorBlendFunc != + compileState.blendState.alphaBlendFunc); compileState.desc.alphaToCoverageEnable = ctx->blend->pipe.alpha_to_coverage; compileState.desc.sampleMaskEnable = 0; // XXX @@ -1302,6 +1449,8 @@ swr_convert_depth_func(ctx->depth_stencil->alpha.func); compileState.alphaTestFormat = ALPHA_TEST_FLOAT32; // xxx + compileState.Canonicalize(); + PFN_BLEND_JIT_FUNC func = NULL; auto search = ctx->blendJIT->find(compileState); if (search != ctx->blendJIT->end()) { @@ -1337,33 +1486,44 @@ continue; buffer.enable = true; buffer.pBuffer = - (uint32_t *)swr_resource_data(ctx->so_targets[i]->buffer); + (uint32_t *)(swr_resource_data(ctx->so_targets[i]->buffer) + + ctx->so_targets[i]->buffer_offset); buffer.bufferSize = ctx->so_targets[i]->buffer_size >> 2; buffer.pitch = stream_output->stride[i]; - buffer.streamOffset = ctx->so_targets[i]->buffer_offset >> 2; + buffer.streamOffset = 0; SwrSetSoBuffers(ctx->swrContext, &buffer, i); } } - uint32_t linkage = ctx->vs->linkageMask; - if (ctx->rasterizer->sprite_coord_enable) - linkage |= (1 << ctx->vs->info.base.num_outputs); - - SwrSetLinkage(ctx->swrContext, linkage, NULL); + if (ctx->dirty & SWR_NEW_CLIP) { + // shader exporting clip distances overrides all user clip planes + if (ctx->rasterizer->clip_plane_enable && + !ctx->vs->info.base.num_written_clipdistance) + { + swr_draw_context *pDC = &ctx->swrDC; + memcpy(pDC->userClipPlanes, + ctx->clip.ucp, + sizeof(pDC->userClipPlanes)); + } + } // set up backend state SWR_BACKEND_STATE backendState = {0}; - backendState.numAttributes = 1; - backendState.numComponents[0] = 4; - backendState.constantInterpolationMask = ctx->fs->constantMask; + backendState.numAttributes = + ctx->vs->info.base.num_outputs - 1 + + (ctx->rasterizer->sprite_coord_enable ? 1 : 0); + for (unsigned i = 0; i < backendState.numAttributes; i++) + backendState.numComponents[i] = 4; + backendState.constantInterpolationMask = ctx->fs->constantMask | + (ctx->rasterizer->flatshade ? ctx->fs->flatConstantMask : 0); backendState.pointSpriteTexCoordMask = ctx->fs->pointSpriteMask; SwrSetBackendState(ctx->swrContext, &backendState); /* Ensure that any in-progress attachment change StoreTiles finish */ if (swr_is_fence_pending(screen->flush_fence)) - swr_fence_finish(pipe->screen, screen->flush_fence, 0); + swr_fence_finish(pipe->screen, NULL, screen->flush_fence, 0); /* Finally, update the in-use status of all resources involved in draw */ swr_update_resource_status(pipe, p_draw_info); @@ -1409,7 +1569,7 @@ struct swr_context *swr = swr_context(pipe); uint32_t i; - assert(num_targets < MAX_SO_STREAMS); + assert(num_targets <= MAX_SO_STREAMS); for (i = 0; i < num_targets; i++) { pipe_so_target_reference( @@ -1424,7 +1584,7 @@ swr->num_so_targets = num_targets; - swr->dirty = SWR_NEW_SO; + swr->dirty |= SWR_NEW_SO; } diff -Nru mesa-12.0.6/src/gallium/drivers/swr/swr_state.h mesa-17.0.7/src/gallium/drivers/swr/swr_state.h --- mesa-12.0.6/src/gallium/drivers/swr/swr_state.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/swr_state.h 2017-06-01 10:37:10.000000000 +0000 @@ -30,7 +30,7 @@ #include "tgsi/tgsi_dump.h" #include "gallivm/lp_bld_init.h" #include "gallivm/lp_bld_tgsi.h" -#include "util/u_hash.h" +#include "util/crc32.h" #include "api.h" #include "swr_tex_sample.h" #include "swr_shader.h" @@ -53,7 +53,6 @@ struct swr_vertex_shader { struct pipe_shader_state pipe; struct lp_tgsi_info info; - unsigned linkageMask; std::unordered_map> map; SWR_STREAMOUT_STATE soState; PFN_SO_FUNC soFunc[PIPE_PRIM_MAX] {0}; @@ -63,6 +62,7 @@ struct pipe_shader_state pipe; struct lp_tgsi_info info; uint32_t constantMask; + uint32_t flatConstantMask; uint32_t pointSpriteMask; std::unordered_map> map; }; @@ -72,6 +72,8 @@ FETCH_COMPILE_STATE fsState; PFN_FETCH_FUNC fsFunc; uint32_t stream_pitch[PIPE_MAX_ATTRIBS]; + uint32_t min_instance_div[PIPE_MAX_ATTRIBS]; + uint32_t instanced_bufs; }; struct swr_blend_state { @@ -87,7 +89,7 @@ struct swr_derived_state { SWR_RASTSTATE rastState; SWR_VIEWPORT vp; - SWR_VIEWPORT_MATRIX vpm; + SWR_VIEWPORT_MATRICES vpm; }; void swr_update_derived(struct pipe_context *, @@ -106,7 +108,7 @@ case PIPE_LOGICOP_NOR: return LOGICOP_NOR; case PIPE_LOGICOP_AND_INVERTED: - return LOGICOP_CLEAR; + return LOGICOP_AND_INVERTED; case PIPE_LOGICOP_COPY_INVERTED: return LOGICOP_COPY_INVERTED; case PIPE_LOGICOP_AND_REVERSE: diff -Nru mesa-12.0.6/src/gallium/drivers/swr/swr_tex_sample.cpp mesa-17.0.7/src/gallium/drivers/swr/swr_tex_sample.cpp --- mesa-12.0.6/src/gallium/drivers/swr/swr_tex_sample.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/swr/swr_tex_sample.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -60,6 +60,7 @@ #include "swr_tex_sample.h" #include "swr_context_llvm.h" +using namespace SwrJit; /** * This provides the bridge between the sampler state store in diff -Nru mesa-12.0.6/src/gallium/drivers/trace/Makefile.in mesa-17.0.7/src/gallium/drivers/trace/Makefile.in --- mesa-12.0.6/src/gallium/drivers/trace/Makefile.in 2017-01-24 01:41:48.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/trace/Makefile.in 2017-06-01 10:37:21.000000000 +0000 @@ -89,10 +89,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -193,6 +196,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -207,6 +212,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -236,10 +242,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -289,11 +296,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -333,8 +337,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -371,8 +373,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -381,7 +381,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -389,13 +388,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -424,6 +424,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -547,12 +548,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -564,7 +561,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ $(GALLIUM_DRIVER_CFLAGS) \ $(MSVC2013_COMPAT_CFLAGS) diff -Nru mesa-12.0.6/src/gallium/drivers/trace/tr_context.c mesa-17.0.7/src/gallium/drivers/trace/tr_context.c --- mesa-12.0.6/src/gallium/drivers/trace/tr_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/trace/tr_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -377,7 +377,7 @@ static void trace_context_bind_sampler_states(struct pipe_context *_pipe, - unsigned shader, + enum pipe_shader_type shader, unsigned start, unsigned num_states, void **states) @@ -772,7 +772,7 @@ static void trace_context_set_constant_buffer(struct pipe_context *_pipe, uint shader, uint index, - struct pipe_constant_buffer *constant_buffer) + const struct pipe_constant_buffer *constant_buffer) { struct trace_context *tr_ctx = trace_context(_pipe); struct pipe_context *pipe = tr_ctx->pipe; @@ -1016,7 +1016,7 @@ static void trace_context_set_sampler_views(struct pipe_context *_pipe, - unsigned shader, + enum pipe_shader_type shader, unsigned start, unsigned num, struct pipe_sampler_view **views) @@ -1291,7 +1291,8 @@ struct pipe_surface *dst, const union pipe_color_union *color, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct trace_context *tr_ctx = trace_context(_pipe); struct pipe_context *pipe = tr_ctx->pipe; @@ -1307,8 +1308,10 @@ trace_dump_arg(uint, dsty); trace_dump_arg(uint, width); trace_dump_arg(uint, height); + trace_dump_arg(bool, render_condition_enabled); - pipe->clear_render_target(pipe, dst, color, dstx, dsty, width, height); + pipe->clear_render_target(pipe, dst, color, dstx, dsty, width, height, + render_condition_enabled); trace_dump_call_end(); } @@ -1320,7 +1323,8 @@ double depth, unsigned stencil, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct trace_context *tr_ctx = trace_context(_pipe); struct pipe_context *pipe = tr_ctx->pipe; @@ -1338,9 +1342,11 @@ trace_dump_arg(uint, dsty); trace_dump_arg(uint, width); trace_dump_arg(uint, height); + trace_dump_arg(bool, render_condition_enabled); pipe->clear_depth_stencil(pipe, dst, clear_flags, depth, stencil, - dstx, dsty, width, height); + dstx, dsty, width, height, + render_condition_enabled); trace_dump_call_end(); } @@ -1470,7 +1476,7 @@ /* * Map and transfers can't be serialized so we convert all write transfers - * to transfer_inline_write and ignore read transfers. + * to texture/buffer_subdata and ignore read transfers. */ map = context->transfer_map(context, texture, level, usage, box, &result); @@ -1512,7 +1518,7 @@ if (tr_trans->map) { /* - * Fake a transfer_inline_write + * Fake a texture/buffer_subdata */ struct pipe_resource *resource = transfer->resource; @@ -1522,7 +1528,10 @@ unsigned stride = transfer->stride; unsigned layer_stride = transfer->layer_stride; - trace_dump_call_begin("pipe_context", "transfer_inline_write"); + if (resource->target == PIPE_BUFFER) + trace_dump_call_begin("pipe_context", "buffer_subdata"); + else + trace_dump_call_begin("pipe_context", "texture_subdata"); trace_dump_arg(ptr, context); trace_dump_arg(ptr, resource); @@ -1552,14 +1561,47 @@ static void -trace_context_transfer_inline_write(struct pipe_context *_context, - struct pipe_resource *_resource, - unsigned level, - unsigned usage, - const struct pipe_box *box, - const void *data, - unsigned stride, - unsigned layer_stride) +trace_context_buffer_subdata(struct pipe_context *_context, + struct pipe_resource *_resource, + unsigned usage, unsigned offset, + unsigned size, const void *data) +{ + struct trace_context *tr_context = trace_context(_context); + struct trace_resource *tr_res = trace_resource(_resource); + struct pipe_context *context = tr_context->pipe; + struct pipe_resource *resource = tr_res->resource; + struct pipe_box box; + + assert(resource->screen == context->screen); + + trace_dump_call_begin("pipe_context", "buffer_subdata"); + + trace_dump_arg(ptr, context); + trace_dump_arg(ptr, resource); + trace_dump_arg(uint, usage); + trace_dump_arg(uint, offset); + trace_dump_arg(uint, size); + + trace_dump_arg_begin("data"); + u_box_1d(offset, size, &box); + trace_dump_box_bytes(data, resource, &box, 0, 0); + trace_dump_arg_end(); + + trace_dump_call_end(); + + context->buffer_subdata(context, resource, usage, offset, size, data); +} + + +static void +trace_context_texture_subdata(struct pipe_context *_context, + struct pipe_resource *_resource, + unsigned level, + unsigned usage, + const struct pipe_box *box, + const void *data, + unsigned stride, + unsigned layer_stride) { struct trace_context *tr_context = trace_context(_context); struct trace_resource *tr_res = trace_resource(_resource); @@ -1568,7 +1610,7 @@ assert(resource->screen == context->screen); - trace_dump_call_begin("pipe_context", "transfer_inline_write"); + trace_dump_call_begin("pipe_context", "texture_subdata"); trace_dump_arg(ptr, context); trace_dump_arg(ptr, resource); @@ -1589,10 +1631,30 @@ trace_dump_call_end(); - context->transfer_inline_write(context, resource, level, usage, box, - data, stride, layer_stride); + context->texture_subdata(context, resource, level, usage, box, + data, stride, layer_stride); } +static void +trace_context_invalidate_resource(struct pipe_context *_context, + struct pipe_resource *_resource) +{ + struct trace_context *tr_context = trace_context(_context); + struct trace_resource *tr_res = trace_resource(_resource); + struct pipe_context *context = tr_context->pipe; + struct pipe_resource *resource = tr_res->resource; + + assert(resource->screen == context->screen); + + trace_dump_call_begin("pipe_context", "invalidate_resource"); + + trace_dump_arg(ptr, context); + trace_dump_arg(ptr, resource); + + trace_dump_call_end(); + + context->invalidate_resource(context, resource); +} static void trace_context_render_condition(struct pipe_context *_context, @@ -1619,7 +1681,7 @@ static void -trace_context_texture_barrier(struct pipe_context *_context) +trace_context_texture_barrier(struct pipe_context *_context, unsigned flags) { struct trace_context *tr_context = trace_context(_context); struct pipe_context *context = tr_context->pipe; @@ -1627,10 +1689,11 @@ trace_dump_call_begin("pipe_context", "texture_barrier"); trace_dump_arg(ptr, context); + trace_dump_arg(uint, flags); trace_dump_call_end(); - context->texture_barrier(context); + context->texture_barrier(context, flags); } @@ -1669,9 +1732,9 @@ static void trace_context_set_shader_buffers(struct pipe_context *_context, - unsigned shader, + enum pipe_shader_type shader, unsigned start, unsigned nr, - struct pipe_shader_buffer *buffers) + const struct pipe_shader_buffer *buffers) { struct trace_context *tr_context = trace_context(_context); struct pipe_context *context = tr_context->pipe; @@ -1707,9 +1770,9 @@ } static void trace_context_set_shader_images(struct pipe_context *_context, - unsigned shader, + enum pipe_shader_type shader, unsigned start, unsigned nr, - struct pipe_image_view *images) + const struct pipe_image_view *images) { struct trace_context *tr_context = trace_context(_context); struct pipe_context *context = tr_context->pipe; @@ -1873,7 +1936,9 @@ TR_CTX_INIT(transfer_map); TR_CTX_INIT(transfer_unmap); TR_CTX_INIT(transfer_flush_region); - TR_CTX_INIT(transfer_inline_write); + TR_CTX_INIT(buffer_subdata); + TR_CTX_INIT(texture_subdata); + TR_CTX_INIT(invalidate_resource); #undef TR_CTX_INIT diff -Nru mesa-12.0.6/src/gallium/drivers/trace/tr_dump_state.c mesa-17.0.7/src/gallium/drivers/trace/tr_dump_state.c --- mesa-12.0.6/src/gallium/drivers/trace/tr_dump_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/trace/tr_dump_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -543,8 +543,8 @@ if (target == PIPE_BUFFER) { trace_dump_member_begin("buf"); trace_dump_struct_begin(""); /* anonymous */ - trace_dump_member(uint, &state->u.buf, first_element); - trace_dump_member(uint, &state->u.buf, last_element); + trace_dump_member(uint, &state->u.buf, offset); + trace_dump_member(uint, &state->u.buf, size); trace_dump_struct_end(); /* anonymous */ trace_dump_member_end(); /* buf */ } else { @@ -760,8 +760,8 @@ if (state->resource->target == PIPE_BUFFER) { trace_dump_member_begin("buf"); trace_dump_struct_begin(""); /* anonymous */ - trace_dump_member(uint, &state->u.buf, first_element); - trace_dump_member(uint, &state->u.buf, last_element); + trace_dump_member(uint, &state->u.buf, offset); + trace_dump_member(uint, &state->u.buf, size); trace_dump_struct_end(); /* anonymous */ trace_dump_member_end(); /* buf */ } else { diff -Nru mesa-12.0.6/src/gallium/drivers/trace/tr_screen.c mesa-17.0.7/src/gallium/drivers/trace/tr_screen.c --- mesa-12.0.6/src/gallium/drivers/trace/tr_screen.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/trace/tr_screen.c 2017-06-01 10:37:10.000000000 +0000 @@ -333,18 +333,21 @@ static boolean trace_screen_resource_get_handle(struct pipe_screen *_screen, + struct pipe_context *_pipe, struct pipe_resource *_resource, struct winsys_handle *handle, unsigned usage) { struct trace_screen *tr_screen = trace_screen(_screen); + struct trace_context *tr_pipe = _pipe ? trace_context(_pipe) : NULL; struct trace_resource *tr_resource = trace_resource(_resource); struct pipe_screen *screen = tr_screen->screen; struct pipe_resource *resource = tr_resource->resource; /* TODO trace call */ - return screen->resource_get_handle(screen, resource, handle, usage); + return screen->resource_get_handle(screen, tr_pipe ? tr_pipe->pipe : NULL, + resource, handle, usage); } @@ -402,20 +405,23 @@ static boolean trace_screen_fence_finish(struct pipe_screen *_screen, + struct pipe_context *_ctx, struct pipe_fence_handle *fence, uint64_t timeout) { struct trace_screen *tr_scr = trace_screen(_screen); struct pipe_screen *screen = tr_scr->screen; + struct pipe_context *ctx = _ctx ? trace_context(_ctx)->pipe : NULL; int result; trace_dump_call_begin("pipe_screen", "fence_finish"); trace_dump_arg(ptr, screen); + trace_dump_arg(ptr, ctx); trace_dump_arg(ptr, fence); trace_dump_arg(uint, timeout); - result = screen->fence_finish(screen, fence, timeout); + result = screen->fence_finish(screen, ctx, fence, timeout); trace_dump_ret(bool, result); diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/kernel/vc4_drv.h mesa-17.0.7/src/gallium/drivers/vc4/kernel/vc4_drv.h --- mesa-12.0.6/src/gallium/drivers/vc4/kernel/vc4_drv.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/kernel/vc4_drv.h 2017-06-01 10:37:10.000000000 +0000 @@ -147,6 +147,11 @@ uint32_t uniforms_src_size; uint32_t num_texture_samples; struct vc4_texture_sample_info *texture_samples; + + uint32_t num_uniform_addr_offsets; + uint32_t *uniform_addr_offsets; + + bool is_threaded; }; /* vc4_validate.c */ diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/kernel/vc4_validate.c mesa-17.0.7/src/gallium/drivers/vc4/kernel/vc4_validate.c --- mesa-12.0.6/src/gallium/drivers/vc4/kernel/vc4_validate.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/kernel/vc4_validate.c 2017-06-01 10:37:10.000000000 +0000 @@ -640,6 +640,13 @@ cpp = 1; break; case VC4_TEXTURE_TYPE_ETC1: + /* ETC1 is arranged as 64-bit blocks, where each block is 4x4 + * pixels. + */ + cpp = 8; + width = (width + 3) >> 2; + height = (height + 3) >> 2; + break; case VC4_TEXTURE_TYPE_BW1: case VC4_TEXTURE_TYPE_A4: case VC4_TEXTURE_TYPE_A1: @@ -773,11 +780,6 @@ exec->shader_rec_v += roundup(packet_size, 16); exec->shader_rec_size -= packet_size; - if (!(*(uint16_t *)pkt_u & VC4_SHADER_FLAG_FS_SINGLE_THREAD)) { - DRM_ERROR("Multi-threaded fragment shaders not supported.\n"); - return -EINVAL; - } - for (i = 0; i < shader_reloc_count; i++) { if (src_handles[i] > exec->bo_count) { DRM_ERROR("Shader handle %d too big\n", src_handles[i]); @@ -794,13 +796,25 @@ return -EINVAL; } + if (((*(uint16_t *)pkt_u & VC4_SHADER_FLAG_FS_SINGLE_THREAD) == 0) != + to_vc4_bo(&bo[0]->base)->validated_shader->is_threaded) { + DRM_ERROR("Thread mode of CL and FS do not match\n"); + return -EINVAL; + } + + if (to_vc4_bo(&bo[1]->base)->validated_shader->is_threaded || + to_vc4_bo(&bo[2]->base)->validated_shader->is_threaded) { + DRM_ERROR("cs and vs cannot be threaded\n"); + return -EINVAL; + } + for (i = 0; i < shader_reloc_count; i++) { struct vc4_validated_shader_info *validated_shader; uint32_t o = shader_reloc_offsets[i]; uint32_t src_offset = *(uint32_t *)(pkt_u + o); uint32_t *texture_handles_u; void *uniform_data_u; - uint32_t tex; + uint32_t tex, uni; *(uint32_t *)(pkt_v + o) = bo[i]->paddr + src_offset; @@ -838,6 +852,17 @@ } } + /* Fill in the uniform slots that need this shader's + * start-of-uniforms address (used for resetting the uniform + * stream in the presence of control flow). + */ + for (uni = 0; + uni < validated_shader->num_uniform_addr_offsets; + uni++) { + uint32_t o = validated_shader->uniform_addr_offsets[uni]; + ((uint32_t *)exec->uniforms_v)[o] = exec->uniforms_p; + } + *(uint32_t *)(pkt_v + o + 4) = exec->uniforms_p; exec->uniforms_u += validated_shader->uniforms_src_size; diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c mesa-17.0.7/src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c --- mesa-12.0.6/src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c 2017-06-01 10:37:10.000000000 +0000 @@ -40,7 +40,17 @@ #include "vc4_qpu.h" #include "vc4_qpu_defines.h" +#define LIVE_REG_COUNT (32 + 32 + 4) + struct vc4_shader_validation_state { + /* Current IP being validated. */ + uint32_t ip; + + /* IP at the end of the BO, do not read shader[max_ip] */ + uint32_t max_ip; + + uint64_t *shader; + struct vc4_texture_sample_info tmu_setup[2]; int tmu_write_count[2]; @@ -50,8 +60,38 @@ * * This is used for the validation of direct address memory reads. */ - uint32_t live_min_clamp_offsets[32 + 32 + 4]; - bool live_max_clamp_regs[32 + 32 + 4]; + uint32_t live_min_clamp_offsets[LIVE_REG_COUNT]; + bool live_max_clamp_regs[LIVE_REG_COUNT]; + uint32_t live_immediates[LIVE_REG_COUNT]; + + /* Bitfield of which IPs are used as branch targets. + * + * Used for validation that the uniform stream is updated at the right + * points and clearing the texturing/clamping state. + */ + unsigned long *branch_targets; + + /* Set when entering a basic block, and cleared when the uniform + * address update is found. This is used to make sure that we don't + * read uniforms when the address is undefined. + */ + bool needs_uniform_address_update; + + /* Set when we find a backwards branch. If the branch is backwards, + * the taraget is probably doing an address reset to read uniforms, + * and so we need to be sure that a uniforms address is present in the + * stream, even if the shader didn't need to read uniforms in later + * basic blocks. + */ + bool needs_uniform_address_for_loop; + + /* Set when we find an instruction which violates the criterion for a + * threaded shader. These are: + * - only write the lower half of the register space + * - last thread switch signaled at the end + * So track the usage of the thread switches and the register usage. + */ + bool all_registers_used; }; static uint32_t @@ -87,6 +127,12 @@ return ~0; } +static bool live_reg_is_upper_half(uint32_t lri) +{ + return (lri >=16 && lri < 32) || + (lri >=32 + 16 && lri < 32 + 32); +} + static bool is_tmu_submit(uint32_t waddr) { @@ -130,11 +176,11 @@ } static bool -check_tmu_write(uint64_t inst, - struct vc4_validated_shader_info *validated_shader, +check_tmu_write(struct vc4_validated_shader_info *validated_shader, struct vc4_shader_validation_state *validation_state, bool is_mul) { + uint64_t inst = validation_state->shader[validation_state->ip]; uint32_t waddr = (is_mul ? QPU_GET_FIELD(inst, QPU_WADDR_MUL) : QPU_GET_FIELD(inst, QPU_WADDR_ADD)); @@ -163,7 +209,7 @@ return false; } - /* We assert that the the clamped address is the first + /* We assert that the clamped address is the first * argument, and the UBO base address is the second argument. * This is arbitrary, but simpler than supporting flipping the * two either way. @@ -213,8 +259,14 @@ /* Since direct uses a RADDR uniform reference, it will get counted in * check_instruction_reads() */ - if (!is_direct) + if (!is_direct) { + if (validation_state->needs_uniform_address_update) { + DRM_ERROR("Texturing with undefined uniform address\n"); + return false; + } + validated_shader->uniforms_size += 4; + } if (submit) { if (!record_texture_sample(validated_shader, @@ -228,23 +280,141 @@ return true; } +static bool require_uniform_address_uniform(struct vc4_validated_shader_info *validated_shader) +{ + uint32_t o = validated_shader->num_uniform_addr_offsets; + uint32_t num_uniforms = validated_shader->uniforms_size / 4; + + validated_shader->uniform_addr_offsets = + krealloc(validated_shader->uniform_addr_offsets, + (o + 1) * + sizeof(*validated_shader->uniform_addr_offsets), + GFP_KERNEL); + if (!validated_shader->uniform_addr_offsets) + return false; + + validated_shader->uniform_addr_offsets[o] = num_uniforms; + validated_shader->num_uniform_addr_offsets++; + + return true; +} + +static bool +validate_uniform_address_write(struct vc4_validated_shader_info *validated_shader, + struct vc4_shader_validation_state *validation_state, + bool is_mul) +{ + uint64_t inst = validation_state->shader[validation_state->ip]; + u32 add_b = QPU_GET_FIELD(inst, QPU_ADD_B); + u32 raddr_a = QPU_GET_FIELD(inst, QPU_RADDR_A); + u32 raddr_b = QPU_GET_FIELD(inst, QPU_RADDR_B); + u32 add_lri = raddr_add_a_to_live_reg_index(inst); + /* We want our reset to be pointing at whatever uniform follows the + * uniforms base address. + */ + u32 expected_offset = validated_shader->uniforms_size + 4; + + /* We only support absolute uniform address changes, and we + * require that they be in the current basic block before any + * of its uniform reads. + * + * One could potentially emit more efficient QPU code, by + * noticing that (say) an if statement does uniform control + * flow for all threads and that the if reads the same number + * of uniforms on each side. However, this scheme is easy to + * validate so it's all we allow for now. + */ + + if (QPU_GET_FIELD(inst, QPU_SIG) != QPU_SIG_NONE) { + DRM_ERROR("uniforms address change must be " + "normal math\n"); + return false; + } + + if (is_mul || QPU_GET_FIELD(inst, QPU_OP_ADD) != QPU_A_ADD) { + DRM_ERROR("Uniform address reset must be an ADD.\n"); + return false; + } + + if (QPU_GET_FIELD(inst, QPU_COND_ADD) != QPU_COND_ALWAYS) { + DRM_ERROR("Uniform address reset must be unconditional.\n"); + return false; + } + + if (QPU_GET_FIELD(inst, QPU_PACK) != QPU_PACK_A_NOP && + !(inst & QPU_PM)) { + DRM_ERROR("No packing allowed on uniforms reset\n"); + return false; + } + + if (add_lri == -1) { + DRM_ERROR("First argument of uniform address write must be " + "an immediate value.\n"); + return false; + } + + if (validation_state->live_immediates[add_lri] != expected_offset) { + DRM_ERROR("Resetting uniforms with offset %db instead of %db\n", + validation_state->live_immediates[add_lri], + expected_offset); + return false; + } + + if (!(add_b == QPU_MUX_A && raddr_a == QPU_R_UNIF) && + !(add_b == QPU_MUX_B && raddr_b == QPU_R_UNIF)) { + DRM_ERROR("Second argument of uniform address write must be " + "a uniform.\n"); + return false; + } + + validation_state->needs_uniform_address_update = false; + validation_state->needs_uniform_address_for_loop = false; + return require_uniform_address_uniform(validated_shader); +} + static bool -check_reg_write(uint64_t inst, - struct vc4_validated_shader_info *validated_shader, +check_reg_write(struct vc4_validated_shader_info *validated_shader, struct vc4_shader_validation_state *validation_state, bool is_mul) { + uint64_t inst = validation_state->shader[validation_state->ip]; uint32_t waddr = (is_mul ? QPU_GET_FIELD(inst, QPU_WADDR_MUL) : QPU_GET_FIELD(inst, QPU_WADDR_ADD)); + uint32_t sig = QPU_GET_FIELD(inst, QPU_SIG); + bool ws = inst & QPU_WS; + bool is_b = is_mul ^ ws; + u32 lri = waddr_to_live_reg_index(waddr, is_b); + + if (lri != -1) { + uint32_t cond_add = QPU_GET_FIELD(inst, QPU_COND_ADD); + uint32_t cond_mul = QPU_GET_FIELD(inst, QPU_COND_MUL); + + if (sig == QPU_SIG_LOAD_IMM && + QPU_GET_FIELD(inst, QPU_PACK) == QPU_PACK_A_NOP && + ((is_mul && cond_mul == QPU_COND_ALWAYS) || + (!is_mul && cond_add == QPU_COND_ALWAYS))) { + validation_state->live_immediates[lri] = + QPU_GET_FIELD(inst, QPU_LOAD_IMM); + } else { + validation_state->live_immediates[lri] = ~0; + } + + if (live_reg_is_upper_half(lri)) + validation_state->all_registers_used = true; + } switch (waddr) { case QPU_W_UNIFORMS_ADDRESS: - /* XXX: We'll probably need to support this for reladdr, but - * it's definitely a security-related one. - */ - DRM_ERROR("uniforms address load unsupported\n"); - return false; + if (is_b) { + DRM_ERROR("relative uniforms address change " + "unsupported\n"); + return false; + } + + return validate_uniform_address_write(validated_shader, + validation_state, + is_mul); case QPU_W_TLB_COLOR_MS: case QPU_W_TLB_COLOR_ALL: @@ -262,7 +432,7 @@ case QPU_W_TMU1_T: case QPU_W_TMU1_R: case QPU_W_TMU1_B: - return check_tmu_write(inst, validated_shader, validation_state, + return check_tmu_write(validated_shader, validation_state, is_mul); case QPU_W_HOST_INT: @@ -295,10 +465,10 @@ } static void -track_live_clamps(uint64_t inst, - struct vc4_validated_shader_info *validated_shader, +track_live_clamps(struct vc4_validated_shader_info *validated_shader, struct vc4_shader_validation_state *validation_state) { + uint64_t inst = validation_state->shader[validation_state->ip]; uint32_t op_add = QPU_GET_FIELD(inst, QPU_OP_ADD); uint32_t waddr_add = QPU_GET_FIELD(inst, QPU_WADDR_ADD); uint32_t waddr_mul = QPU_GET_FIELD(inst, QPU_WADDR_MUL); @@ -370,10 +540,10 @@ } static bool -check_instruction_writes(uint64_t inst, - struct vc4_validated_shader_info *validated_shader, +check_instruction_writes(struct vc4_validated_shader_info *validated_shader, struct vc4_shader_validation_state *validation_state) { + uint64_t inst = validation_state->shader[validation_state->ip]; uint32_t waddr_add = QPU_GET_FIELD(inst, QPU_WADDR_ADD); uint32_t waddr_mul = QPU_GET_FIELD(inst, QPU_WADDR_MUL); bool ok; @@ -383,20 +553,44 @@ return false; } - ok = (check_reg_write(inst, validated_shader, validation_state, - false) && - check_reg_write(inst, validated_shader, validation_state, - true)); + ok = (check_reg_write(validated_shader, validation_state, false) && + check_reg_write(validated_shader, validation_state, true)); - track_live_clamps(inst, validated_shader, validation_state); + track_live_clamps(validated_shader, validation_state); return ok; } static bool -check_instruction_reads(uint64_t inst, - struct vc4_validated_shader_info *validated_shader) +check_branch(uint64_t inst, + struct vc4_validated_shader_info *validated_shader, + struct vc4_shader_validation_state *validation_state, + int ip) +{ + int32_t branch_imm = QPU_GET_FIELD(inst, QPU_BRANCH_TARGET); + uint32_t waddr_add = QPU_GET_FIELD(inst, QPU_WADDR_ADD); + uint32_t waddr_mul = QPU_GET_FIELD(inst, QPU_WADDR_MUL); + + if ((int)branch_imm < 0) + validation_state->needs_uniform_address_for_loop = true; + + /* We don't want to have to worry about validation of this, and + * there's no need for it. + */ + if (waddr_add != QPU_W_NOP || waddr_mul != QPU_W_NOP) { + DRM_ERROR("branch instruction at %d wrote a register.\n", + validation_state->ip); + return false; + } + + return true; +} + +static bool +check_instruction_reads(struct vc4_validated_shader_info *validated_shader, + struct vc4_shader_validation_state *validation_state) { + uint64_t inst = validation_state->shader[validation_state->ip]; uint32_t raddr_a = QPU_GET_FIELD(inst, QPU_RADDR_A); uint32_t raddr_b = QPU_GET_FIELD(inst, QPU_RADDR_B); uint32_t sig = QPU_GET_FIELD(inst, QPU_SIG); @@ -408,8 +602,166 @@ * already be OOM. */ validated_shader->uniforms_size += 4; + + if (validation_state->needs_uniform_address_update) { + DRM_ERROR("Uniform read with undefined uniform " + "address\n"); + return false; + } + } + + if ((raddr_a >= 16 && raddr_a < 32) || + (raddr_b >= 16 && raddr_b < 32 && sig != QPU_SIG_SMALL_IMM)) { + validation_state->all_registers_used = true; + } + + return true; +} + +/* Make sure that all branches are absolute and point within the shader, and + * note their targets for later. + */ +static bool +vc4_validate_branches(struct vc4_shader_validation_state *validation_state) +{ + uint32_t max_branch_target = 0; + int ip; + int last_branch = -2; + + for (ip = 0; ip < validation_state->max_ip; ip++) { + uint64_t inst = validation_state->shader[ip]; + int32_t branch_imm = QPU_GET_FIELD(inst, QPU_BRANCH_TARGET); + uint32_t sig = QPU_GET_FIELD(inst, QPU_SIG); + uint32_t after_delay_ip = ip + 4; + uint32_t branch_target_ip; + + if (sig == QPU_SIG_PROG_END) { + /* There are two delay slots after program end is + * signaled that are still executed, then we're + * finished. validation_state->max_ip is the + * instruction after the last valid instruction in the + * program. + */ + validation_state->max_ip = ip + 3; + continue; + } + + if (sig != QPU_SIG_BRANCH) + continue; + + if (ip - last_branch < 4) { + DRM_ERROR("Branch at %d during delay slots\n", ip); + return false; + } + last_branch = ip; + + if (inst & QPU_BRANCH_REG) { + DRM_ERROR("branching from register relative " + "not supported\n"); + return false; + } + + if (!(inst & QPU_BRANCH_REL)) { + DRM_ERROR("relative branching required\n"); + return false; + } + + /* The actual branch target is the instruction after the delay + * slots, plus whatever byte offset is in the low 32 bits of + * the instruction. Make sure we're not branching beyond the + * end of the shader object. + */ + if (branch_imm % sizeof(inst) != 0) { + DRM_ERROR("branch target not aligned\n"); + return false; + }; + + branch_target_ip = after_delay_ip + (branch_imm >> 3); + if (branch_target_ip >= validation_state->max_ip) { + DRM_ERROR("Branch at %d outside of shader (ip %d/%d)\n", + ip, branch_target_ip, + validation_state->max_ip); + return false; + } + set_bit(branch_target_ip, validation_state->branch_targets); + + /* Make sure that the non-branching path is also not outside + * the shader. + */ + if (after_delay_ip >= validation_state->max_ip) { + DRM_ERROR("Branch at %d continues past shader end " + "(%d/%d)\n", + ip, after_delay_ip, validation_state->max_ip); + return false; + } + set_bit(after_delay_ip, validation_state->branch_targets); + max_branch_target = max(max_branch_target, after_delay_ip); + } + + if (max_branch_target > validation_state->max_ip - 3) { + DRM_ERROR("Branch landed after QPU_SIG_PROG_END"); + return false; + } + + return true; +} + +/* Resets any known state for the shader, used when we may be branched to from + * multiple locations in the program (or at shader start). + */ +static void +reset_validation_state(struct vc4_shader_validation_state *validation_state) +{ + int i; + + for (i = 0; i < 8; i++) + validation_state->tmu_setup[i / 4].p_offset[i % 4] = ~0; + + for (i = 0; i < LIVE_REG_COUNT; i++) { + validation_state->live_min_clamp_offsets[i] = ~0; + validation_state->live_max_clamp_regs[i] = false; + validation_state->live_immediates[i] = ~0; + } +} + +static bool +texturing_in_progress(struct vc4_shader_validation_state *validation_state) +{ + return (validation_state->tmu_write_count[0] != 0 || + validation_state->tmu_write_count[1] != 0); +} + +static bool +vc4_handle_branch_target(struct vc4_shader_validation_state *validation_state) +{ + uint32_t ip = validation_state->ip; + + if (!test_bit(ip, validation_state->branch_targets)) + return true; + + if (texturing_in_progress(validation_state)) { + DRM_ERROR("Branch target landed during TMU setup\n"); + return false; } + /* Reset our live values tracking, since this instruction may have + * multiple predecessors. + * + * One could potentially do analysis to determine that, for + * example, all predecessors have a live max clamp in the same + * register, but we don't bother with that. + */ + reset_validation_state(validation_state); + + /* Since we've entered a basic block from potentially multiple + * predecessors, we need the uniforms address to be updated before any + * unforms are read. We require that after any branch point, the next + * uniform to be loaded is a uniform address offset. That uniform's + * offset will be marked by the uniform address register write + * validation, or a one-off the end-of-program check. + */ + validation_state->needs_uniform_address_update = true; + return true; } @@ -418,30 +770,49 @@ { bool found_shader_end = false; int shader_end_ip = 0; - uint32_t ip, max_ip; - uint64_t *shader; - struct vc4_validated_shader_info *validated_shader; + uint32_t last_thread_switch_ip = -3; + uint32_t ip; + struct vc4_validated_shader_info *validated_shader = NULL; struct vc4_shader_validation_state validation_state; - int i; memset(&validation_state, 0, sizeof(validation_state)); + validation_state.shader = shader_obj->vaddr; + validation_state.max_ip = shader_obj->base.size / sizeof(uint64_t); - for (i = 0; i < 8; i++) - validation_state.tmu_setup[i / 4].p_offset[i % 4] = ~0; - for (i = 0; i < ARRAY_SIZE(validation_state.live_min_clamp_offsets); i++) - validation_state.live_min_clamp_offsets[i] = ~0; + reset_validation_state(&validation_state); - shader = shader_obj->vaddr; - max_ip = shader_obj->base.size / sizeof(uint64_t); + validation_state.branch_targets = + kcalloc(BITS_TO_LONGS(validation_state.max_ip), + sizeof(unsigned long), GFP_KERNEL); + if (!validation_state.branch_targets) + goto fail; validated_shader = kcalloc(1, sizeof(*validated_shader), GFP_KERNEL); if (!validated_shader) - return NULL; + goto fail; + + if (!vc4_validate_branches(&validation_state)) + goto fail; - for (ip = 0; ip < max_ip; ip++) { - uint64_t inst = shader[ip]; + for (ip = 0; ip < validation_state.max_ip; ip++) { + uint64_t inst = validation_state.shader[ip]; uint32_t sig = QPU_GET_FIELD(inst, QPU_SIG); + validation_state.ip = ip; + + if (!vc4_handle_branch_target(&validation_state)) + goto fail; + + if (ip == last_thread_switch_ip + 3) { + /* Reset r0-r3 live clamp data */ + int i; + for (i = 64; i < LIVE_REG_COUNT; i++) { + validation_state.live_min_clamp_offsets[i] = ~0; + validation_state.live_max_clamp_regs[i] = false; + validation_state.live_immediates[i] = ~0; + } + } + switch (sig) { case QPU_SIG_NONE: case QPU_SIG_WAIT_FOR_SCOREBOARD: @@ -451,13 +822,16 @@ case QPU_SIG_LOAD_TMU1: case QPU_SIG_PROG_END: case QPU_SIG_SMALL_IMM: - if (!check_instruction_writes(inst, validated_shader, + case QPU_SIG_THREAD_SWITCH: + case QPU_SIG_LAST_THREAD_SWITCH: + if (!check_instruction_writes(validated_shader, &validation_state)) { DRM_ERROR("Bad write at ip %d\n", ip); goto fail; } - if (!check_instruction_reads(inst, validated_shader)) + if (!check_instruction_reads(validated_shader, + &validation_state)) goto fail; if (sig == QPU_SIG_PROG_END) { @@ -465,16 +839,40 @@ shader_end_ip = ip; } + if (sig == QPU_SIG_THREAD_SWITCH || + sig == QPU_SIG_LAST_THREAD_SWITCH) { + validated_shader->is_threaded = true; + + if (ip < last_thread_switch_ip + 3) { + DRM_ERROR("Thread switch too soon after " + "last switch at ip %d\n", ip); + goto fail; + } + last_thread_switch_ip = ip; + } + break; case QPU_SIG_LOAD_IMM: - if (!check_instruction_writes(inst, validated_shader, + if (!check_instruction_writes(validated_shader, &validation_state)) { DRM_ERROR("Bad LOAD_IMM write at ip %d\n", ip); goto fail; } break; + case QPU_SIG_BRANCH: + if (!check_branch(inst, validated_shader, + &validation_state, ip)) + goto fail; + + if (ip < last_thread_switch_ip + 3) { + DRM_ERROR("Branch in thread switch at ip %d", + ip); + goto fail; + } + + break; default: DRM_ERROR("Unsupported QPU signal %d at " "instruction %d\n", sig, ip); @@ -488,13 +886,36 @@ break; } - if (ip == max_ip) { + if (ip == validation_state.max_ip) { DRM_ERROR("shader failed to terminate before " "shader BO end at %zd\n", shader_obj->base.size); goto fail; } + /* Might corrupt other thread */ + if (validated_shader->is_threaded && + validation_state.all_registers_used) { + DRM_ERROR("Shader uses threading, but uses the upper " + "half of the registers, too\n"); + goto fail; + } + + /* If we did a backwards branch and we haven't emitted a uniforms + * reset since then, we still need the uniforms stream to have the + * uniforms address available so that the backwards branch can do its + * uniforms reset. + * + * We could potentially prove that the backwards branch doesn't + * contain any uses of uniforms until program exit, but that doesn't + * seem to be worth the trouble. + */ + if (validation_state.needs_uniform_address_for_loop) { + if (!require_uniform_address_uniform(validated_shader)) + goto fail; + validated_shader->uniforms_size += 4; + } + /* Again, no chance of integer overflow here because the worst case * scenario is 8 bytes of uniforms plus handles per 8-byte * instruction. @@ -503,9 +924,12 @@ (validated_shader->uniforms_size + 4 * validated_shader->num_texture_samples); + kfree(validation_state.branch_targets); + return validated_shader; fail: + kfree(validation_state.branch_targets); if (validated_shader) { kfree(validated_shader->texture_samples); kfree(validated_shader); diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/Makefile.am mesa-17.0.7/src/gallium/drivers/vc4/Makefile.am --- mesa-12.0.6/src/gallium/drivers/vc4/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -29,12 +29,14 @@ AM_CFLAGS = \ -I$(top_builddir)/src/compiler/nir \ $(LIBDRM_CFLAGS) \ + $(VC4_CFLAGS) \ $(GALLIUM_DRIVER_CFLAGS) \ $(SIM_CFLAGS) \ + $(VALGRIND_CFLAGS) \ $() noinst_LTLIBRARIES = libvc4.la libvc4_la_SOURCES = $(C_SOURCES) -libvc4_la_LIBADD = $(SIM_LIB) +libvc4_la_LIBADD = $(SIM_LIB) $(VC4_LIBS) libvc4_la_LDFLAGS = $(SIM_LDFLAGS) diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/Makefile.in mesa-17.0.7/src/gallium/drivers/vc4/Makefile.in --- mesa-12.0.6/src/gallium/drivers/vc4/Makefile.in 2017-01-24 01:41:48.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/Makefile.in 2017-06-01 10:37:21.000000000 +0000 @@ -110,10 +110,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -136,7 +139,8 @@ CONFIG_CLEAN_FILES = CONFIG_CLEAN_VPATH_FILES = LTLIBRARIES = $(noinst_LTLIBRARIES) -libvc4_la_DEPENDENCIES = +am__DEPENDENCIES_1 = +libvc4_la_DEPENDENCIES = $(am__DEPENDENCIES_1) am__dirstamp = $(am__leading_dot)dirstamp am__objects_1 = kernel/vc4_gem.lo kernel/vc4_render_cl.lo \ kernel/vc4_validate.lo kernel/vc4_validate_shaders.lo \ @@ -146,13 +150,15 @@ vc4_nir_lower_io.lo vc4_nir_lower_txf_ms.lo \ vc4_opt_algebraic.lo vc4_opt_constant_folding.lo \ vc4_opt_copy_propagation.lo vc4_opt_dead_code.lo \ - vc4_opt_small_immediates.lo vc4_opt_vpm.lo vc4_program.lo \ - vc4_qir.lo vc4_qir_lower_uniforms.lo vc4_qir_schedule.lo \ - vc4_qir_validate.lo vc4_qpu.lo vc4_qpu_disasm.lo \ - vc4_qpu_emit.lo vc4_qpu_schedule.lo vc4_qpu_validate.lo \ - vc4_query.lo vc4_register_allocate.lo vc4_reorder_uniforms.lo \ - vc4_resource.lo vc4_screen.lo vc4_simulator.lo vc4_state.lo \ - vc4_tiling.lo vc4_uniforms.lo + vc4_opt_peephole_sf.lo vc4_opt_small_immediates.lo \ + vc4_opt_vpm.lo vc4_opt_coalesce_ff_writes.lo vc4_program.lo \ + vc4_qir.lo vc4_qir_emit_uniform_stream_resets.lo \ + vc4_qir_live_variables.lo vc4_qir_lower_uniforms.lo \ + vc4_qir_schedule.lo vc4_qir_validate.lo vc4_qpu.lo \ + vc4_qpu_disasm.lo vc4_qpu_emit.lo vc4_qpu_schedule.lo \ + vc4_qpu_validate.lo vc4_query.lo vc4_register_allocate.lo \ + vc4_reorder_uniforms.lo vc4_resource.lo vc4_screen.lo \ + vc4_simulator.lo vc4_state.lo vc4_tiling.lo vc4_uniforms.lo am_libvc4_la_OBJECTS = $(am__objects_1) libvc4_la_OBJECTS = $(am_libvc4_la_OBJECTS) AM_V_lt = $(am__v_lt_@AM_V@) @@ -231,6 +237,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -245,6 +253,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -274,10 +283,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -327,11 +337,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -371,8 +378,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -409,8 +414,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -419,7 +422,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -427,13 +429,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -462,6 +465,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -540,7 +544,6 @@ vc4_context.c \ vc4_context.h \ vc4_draw.c \ - vc4_drm.h \ vc4_emit.c \ vc4_fence.c \ vc4_formats.c \ @@ -552,10 +555,14 @@ vc4_opt_constant_folding.c \ vc4_opt_copy_propagation.c \ vc4_opt_dead_code.c \ + vc4_opt_peephole_sf.c \ vc4_opt_small_immediates.c \ vc4_opt_vpm.c \ + vc4_opt_coalesce_ff_writes.c \ vc4_program.c \ vc4_qir.c \ + vc4_qir_emit_uniform_stream_resets.c \ + vc4_qir_live_variables.c \ vc4_qir_lower_uniforms.c \ vc4_qir_schedule.c \ vc4_qir_validate.c \ @@ -629,12 +636,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -646,18 +649,20 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) @USE_VC4_SIMULATOR_TRUE@SIM_LDFLAGS = -lsimpenrose AM_CFLAGS = \ -I$(top_builddir)/src/compiler/nir \ $(LIBDRM_CFLAGS) \ + $(VC4_CFLAGS) \ $(GALLIUM_DRIVER_CFLAGS) \ $(SIM_CFLAGS) \ + $(VALGRIND_CFLAGS) \ $() noinst_LTLIBRARIES = libvc4.la libvc4_la_SOURCES = $(C_SOURCES) -libvc4_la_LIBADD = $(SIM_LIB) +libvc4_la_LIBADD = $(SIM_LIB) $(VC4_LIBS) libvc4_la_LDFLAGS = $(SIM_LDFLAGS) all: all-am @@ -744,13 +749,17 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vc4_nir_lower_io.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vc4_nir_lower_txf_ms.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vc4_opt_algebraic.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vc4_opt_coalesce_ff_writes.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vc4_opt_constant_folding.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vc4_opt_copy_propagation.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vc4_opt_dead_code.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vc4_opt_peephole_sf.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vc4_opt_small_immediates.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vc4_opt_vpm.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vc4_program.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vc4_qir.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vc4_qir_emit_uniform_stream_resets.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vc4_qir_live_variables.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vc4_qir_lower_uniforms.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vc4_qir_schedule.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vc4_qir_validate.Plo@am__quote@ diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/Makefile.sources mesa-17.0.7/src/gallium/drivers/vc4/Makefile.sources --- mesa-12.0.6/src/gallium/drivers/vc4/Makefile.sources 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/Makefile.sources 2017-06-01 10:37:10.000000000 +0000 @@ -14,7 +14,6 @@ vc4_context.c \ vc4_context.h \ vc4_draw.c \ - vc4_drm.h \ vc4_emit.c \ vc4_fence.c \ vc4_formats.c \ @@ -26,10 +25,14 @@ vc4_opt_constant_folding.c \ vc4_opt_copy_propagation.c \ vc4_opt_dead_code.c \ + vc4_opt_peephole_sf.c \ vc4_opt_small_immediates.c \ vc4_opt_vpm.c \ + vc4_opt_coalesce_ff_writes.c \ vc4_program.c \ vc4_qir.c \ + vc4_qir_emit_uniform_stream_resets.c \ + vc4_qir_live_variables.c \ vc4_qir_lower_uniforms.c \ vc4_qir_schedule.c \ vc4_qir_validate.c \ diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_blit.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_blit.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_blit.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_blit.c 2017-06-01 10:37:10.000000000 +0000 @@ -51,9 +51,6 @@ vc4_tile_blit(struct pipe_context *pctx, const struct pipe_blit_info *info) { struct vc4_context *vc4 = vc4_context(pctx); - bool old_msaa = vc4->msaa; - int old_tile_width = vc4->tile_width; - int old_tile_height = vc4->tile_height; bool msaa = (info->src.resource->nr_samples > 1 || info->dst.resource->nr_samples > 1); int tile_width = msaa ? 32 : 64; @@ -114,8 +111,6 @@ if (info->dst.resource->format != info->src.resource->format) return false; - vc4_flush(pctx); - if (false) { fprintf(stderr, "RCL blit from %d,%d to %d,%d (%d,%d)\n", info->src.box.x, @@ -131,34 +126,34 @@ struct pipe_surface *src_surf = vc4_get_blit_surface(pctx, info->src.resource, info->src.level); - pipe_surface_reference(&vc4->color_read, src_surf); - pipe_surface_reference(&vc4->color_write, - dst_surf->texture->nr_samples > 1 ? - NULL : dst_surf); - pipe_surface_reference(&vc4->msaa_color_write, - dst_surf->texture->nr_samples > 1 ? - dst_surf : NULL); - pipe_surface_reference(&vc4->zs_read, NULL); - pipe_surface_reference(&vc4->zs_write, NULL); - pipe_surface_reference(&vc4->msaa_zs_write, NULL); - - vc4->draw_min_x = info->dst.box.x; - vc4->draw_min_y = info->dst.box.y; - vc4->draw_max_x = info->dst.box.x + info->dst.box.width; - vc4->draw_max_y = info->dst.box.y + info->dst.box.height; - vc4->draw_width = dst_surf->width; - vc4->draw_height = dst_surf->height; - - vc4->tile_width = tile_width; - vc4->tile_height = tile_height; - vc4->msaa = msaa; - vc4->needs_flush = true; - - vc4_job_submit(vc4); - - vc4->msaa = old_msaa; - vc4->tile_width = old_tile_width; - vc4->tile_height = old_tile_height; + vc4_flush_jobs_reading_resource(vc4, info->src.resource); + + struct vc4_job *job = vc4_get_job(vc4, dst_surf, NULL); + pipe_surface_reference(&job->color_read, src_surf); + + /* If we're resolving from MSAA to single sample, we still need to run + * the engine in MSAA mode for the load. + */ + if (!job->msaa && info->src.resource->nr_samples > 1) { + job->msaa = true; + job->tile_width = 32; + job->tile_height = 32; + } + + job->draw_min_x = info->dst.box.x; + job->draw_min_y = info->dst.box.y; + job->draw_max_x = info->dst.box.x + info->dst.box.width; + job->draw_max_y = info->dst.box.y + info->dst.box.height; + job->draw_width = dst_surf->width; + job->draw_height = dst_surf->height; + + job->tile_width = tile_width; + job->tile_height = tile_height; + job->msaa = msaa; + job->needs_flush = true; + job->resolve |= PIPE_CLEAR_COLOR; + + vc4_job_submit(vc4, job); pipe_surface_reference(&dst_surf, NULL); pipe_surface_reference(&src_surf, NULL); @@ -166,18 +161,9 @@ return true; } -static bool -vc4_render_blit(struct pipe_context *ctx, struct pipe_blit_info *info) +void +vc4_blitter_save(struct vc4_context *vc4) { - struct vc4_context *vc4 = vc4_context(ctx); - - if (!util_blitter_is_blit_supported(vc4->blitter, info)) { - fprintf(stderr, "blit unsupported %s -> %s\n", - util_format_short_name(info->src.resource->format), - util_format_short_name(info->dst.resource->format)); - return false; - } - util_blitter_save_vertex_buffer_slot(vc4->blitter, vc4->vertexbuf.vb); util_blitter_save_vertex_elements(vc4->blitter, vc4->vtx); util_blitter_save_vertex_shader(vc4->blitter, vc4->prog.bind_vs); @@ -195,7 +181,21 @@ (void **)vc4->fragtex.samplers); util_blitter_save_fragment_sampler_views(vc4->blitter, vc4->fragtex.num_textures, vc4->fragtex.textures); +} + +static bool +vc4_render_blit(struct pipe_context *ctx, struct pipe_blit_info *info) +{ + struct vc4_context *vc4 = vc4_context(ctx); + + if (!util_blitter_is_blit_supported(vc4->blitter, info)) { + fprintf(stderr, "blit unsupported %s -> %s\n", + util_format_short_name(info->src.resource->format), + util_format_short_name(info->dst.resource->format)); + return false; + } + vc4_blitter_save(vc4); util_blitter_blit(vc4->blitter, info); return true; diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_bufmgr.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_bufmgr.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_bufmgr.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_bufmgr.c 2017-06-01 10:37:10.000000000 +0000 @@ -35,6 +35,14 @@ #include "vc4_context.h" #include "vc4_screen.h" +#ifdef HAVE_VALGRIND +#include +#include +#define VG(x) x +#else +#define VG(x) +#endif + static bool dump_stats = false; static void @@ -140,28 +148,17 @@ bo->name = name; bo->private = true; + retry: + ; + bool cleared_and_retried = false; -retry: - if (!using_vc4_simulator) { - struct drm_vc4_create_bo create; - memset(&create, 0, sizeof(create)); - - create.size = size; - - ret = drmIoctl(screen->fd, DRM_IOCTL_VC4_CREATE_BO, &create); - bo->handle = create.handle; - } else { - struct drm_mode_create_dumb create; - memset(&create, 0, sizeof(create)); - - create.width = 128; - create.bpp = 8; - create.height = (size + 127) / 128; - - ret = drmIoctl(screen->fd, DRM_IOCTL_MODE_CREATE_DUMB, &create); - bo->handle = create.handle; - assert(create.size >= size); - } + struct drm_vc4_create_bo create = { + .size = size + }; + + ret = vc4_ioctl(screen->fd, DRM_IOCTL_VC4_CREATE_BO, &create); + bo->handle = create.handle; + if (ret != 0) { if (!list_empty(&screen->bo_cache.time_list) && !cleared_and_retried) { @@ -202,19 +199,19 @@ struct vc4_screen *screen = bo->screen; if (bo->map) { -#ifdef USE_VC4_SIMULATOR - if (bo->simulator_winsys_map) { + if (using_vc4_simulator && bo->name && + strcmp(bo->name, "winsys") == 0) { free(bo->map); - bo->map = bo->simulator_winsys_map; + } else { + munmap(bo->map, bo->size); + VG(VALGRIND_FREELIKE_BLOCK(bo->map, 0)); } -#endif - munmap(bo->map, bo->size); } struct drm_gem_close c; memset(&c, 0, sizeof(c)); c.handle = bo->handle; - int ret = drmIoctl(screen->fd, DRM_IOCTL_GEM_CLOSE, &c); + int ret = vc4_ioctl(screen->fd, DRM_IOCTL_GEM_CLOSE, &c); if (ret != 0) fprintf(stderr, "close object %d: %s\n", bo->handle, strerror(errno)); @@ -292,17 +289,8 @@ /* Move old list contents over (since the array has moved, and * therefore the pointers to the list heads have to change). */ - for (int i = 0; i < cache->size_list_size; i++) { - struct list_head *old_head = &cache->size_list[i]; - if (list_empty(old_head)) - list_inithead(&new_list[i]); - else { - new_list[i].next = old_head->next; - new_list[i].prev = old_head->prev; - new_list[i].next->prev = &new_list[i]; - new_list[i].prev->next = &new_list[i]; - } - } + for (int i = 0; i < cache->size_list_size; i++) + list_replace(&cache->size_list[i], &new_list[i]); for (int i = cache->size_list_size; i < page_index + 1; i++) list_inithead(&new_list[i]); @@ -351,9 +339,8 @@ bo->private = false; #ifdef USE_VC4_SIMULATOR - vc4_bo_map(bo); - bo->simulator_winsys_map = bo->map; - bo->simulator_winsys_stride = winsys_stride; + vc4_simulator_open_from_handle(screen->fd, winsys_stride, + bo->handle, bo->size); bo->map = malloc(bo->size); #endif @@ -371,7 +358,7 @@ struct drm_gem_open o = { .name = name }; - int ret = drmIoctl(screen->fd, DRM_IOCTL_GEM_OPEN, &o); + int ret = vc4_ioctl(screen->fd, DRM_IOCTL_GEM_OPEN, &o); if (ret) { fprintf(stderr, "Failed to open bo %d: %s\n", name, strerror(errno)); @@ -438,30 +425,15 @@ bo->name = "code"; bo->private = false; /* Make sure it doesn't go back to the cache. */ - if (!using_vc4_simulator) { - struct drm_vc4_create_shader_bo create = { - .size = size, - .data = (uintptr_t)data, - }; - - ret = drmIoctl(screen->fd, DRM_IOCTL_VC4_CREATE_SHADER_BO, - &create); - bo->handle = create.handle; - } else { - struct drm_mode_create_dumb create; - memset(&create, 0, sizeof(create)); - - create.width = 128; - create.bpp = 8; - create.height = (size + 127) / 128; - - ret = drmIoctl(screen->fd, DRM_IOCTL_MODE_CREATE_DUMB, &create); - bo->handle = create.handle; - assert(create.size >= size); + struct drm_vc4_create_shader_bo create = { + .size = size, + .data = (uintptr_t)data, + }; + + ret = vc4_ioctl(screen->fd, DRM_IOCTL_VC4_CREATE_SHADER_BO, + &create); + bo->handle = create.handle; - vc4_bo_map(bo); - memcpy(bo->map, data, size); - } if (ret != 0) { fprintf(stderr, "create shader ioctl failure\n"); abort(); @@ -483,7 +455,7 @@ struct drm_gem_flink flink = { .handle = bo->handle, }; - int ret = drmIoctl(bo->screen->fd, DRM_IOCTL_GEM_FLINK, &flink); + int ret = vc4_ioctl(bo->screen->fd, DRM_IOCTL_GEM_FLINK, &flink); if (ret) { fprintf(stderr, "Failed to flink bo %d: %s\n", bo->handle, strerror(errno)); @@ -499,14 +471,11 @@ static int vc4_wait_seqno_ioctl(int fd, uint64_t seqno, uint64_t timeout_ns) { - if (using_vc4_simulator) - return 0; - struct drm_vc4_wait_seqno wait = { .seqno = seqno, .timeout_ns = timeout_ns, }; - int ret = drmIoctl(fd, DRM_IOCTL_VC4_WAIT_SEQNO, &wait); + int ret = vc4_ioctl(fd, DRM_IOCTL_VC4_WAIT_SEQNO, &wait); if (ret == -1) return -errno; else @@ -544,14 +513,11 @@ static int vc4_wait_bo_ioctl(int fd, uint32_t handle, uint64_t timeout_ns) { - if (using_vc4_simulator) - return 0; - struct drm_vc4_wait_bo wait = { .handle = handle, .timeout_ns = timeout_ns, }; - int ret = drmIoctl(fd, DRM_IOCTL_VC4_WAIT_BO, &wait); + int ret = vc4_ioctl(fd, DRM_IOCTL_VC4_WAIT_BO, &wait); if (ret == -1) return -errno; else @@ -593,19 +559,11 @@ if (bo->map) return bo->map; - if (!using_vc4_simulator) { - struct drm_vc4_mmap_bo map; - memset(&map, 0, sizeof(map)); - map.handle = bo->handle; - ret = drmIoctl(bo->screen->fd, DRM_IOCTL_VC4_MMAP_BO, &map); - offset = map.offset; - } else { - struct drm_mode_map_dumb map; - memset(&map, 0, sizeof(map)); - map.handle = bo->handle; - ret = drmIoctl(bo->screen->fd, DRM_IOCTL_MODE_MAP_DUMB, &map); - offset = map.offset; - } + struct drm_vc4_mmap_bo map; + memset(&map, 0, sizeof(map)); + map.handle = bo->handle; + ret = vc4_ioctl(bo->screen->fd, DRM_IOCTL_VC4_MMAP_BO, &map); + offset = map.offset; if (ret != 0) { fprintf(stderr, "map ioctl failure\n"); abort(); @@ -618,6 +576,7 @@ bo->handle, (long long)offset, bo->size); abort(); } + VG(VALGRIND_MALLOCLIKE_BLOCK(bo->map, bo->size, 0, false)); return bo->map; } diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_bufmgr.h mesa-17.0.7/src/gallium/drivers/vc4/vc4_bufmgr.h --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_bufmgr.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_bufmgr.h 2017-06-01 10:37:10.000000000 +0000 @@ -39,11 +39,6 @@ uint32_t handle; uint32_t size; -#ifdef USE_VC4_SIMULATOR - void *simulator_winsys_map; - uint32_t simulator_winsys_stride; -#endif - /** Entry in the linked list of buffers freed, by age. */ struct list_head time_list; /** Entry in the per-page-count linked list of buffers freed (by age). */ diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_cl.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_cl.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_cl.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_cl.c 2017-06-01 10:37:10.000000000 +0000 @@ -26,9 +26,9 @@ #include "vc4_context.h" void -vc4_init_cl(struct vc4_context *vc4, struct vc4_cl *cl) +vc4_init_cl(void *mem_ctx, struct vc4_cl *cl) { - cl->base = ralloc_size(vc4, 1); + cl->base = rzalloc_size(mem_ctx, 1); /* TODO: don't use rzalloc */ cl->next = cl->base; cl->size = 0; } @@ -56,25 +56,27 @@ } uint32_t -vc4_gem_hindex(struct vc4_context *vc4, struct vc4_bo *bo) +vc4_gem_hindex(struct vc4_job *job, struct vc4_bo *bo) { uint32_t hindex; - uint32_t *current_handles = vc4->bo_handles.base; + uint32_t *current_handles = job->bo_handles.base; - for (hindex = 0; hindex < cl_offset(&vc4->bo_handles) / 4; hindex++) { + for (hindex = 0; hindex < cl_offset(&job->bo_handles) / 4; hindex++) { if (current_handles[hindex] == bo->handle) return hindex; } struct vc4_cl_out *out; - out = cl_start(&vc4->bo_handles); + out = cl_start(&job->bo_handles); cl_u32(&out, bo->handle); - cl_end(&vc4->bo_handles, out); + cl_end(&job->bo_handles, out); - out = cl_start(&vc4->bo_pointers); + out = cl_start(&job->bo_pointers); cl_ptr(&out, vc4_bo_reference(bo)); - cl_end(&vc4->bo_pointers, out); + cl_end(&job->bo_pointers, out); + + job->bo_space += bo->size; return hindex; } diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_cl.h mesa-17.0.7/src/gallium/drivers/vc4/vc4_cl.h --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_cl.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_cl.h 2017-06-01 10:37:10.000000000 +0000 @@ -32,6 +32,7 @@ #include "kernel/vc4_packet.h" struct vc4_bo; +struct vc4_job; /** * Undefined structure, used for typechecking that you're passing the pointers @@ -49,10 +50,10 @@ #endif }; -void vc4_init_cl(struct vc4_context *vc4, struct vc4_cl *cl); +void vc4_init_cl(void *mem_ctx, struct vc4_cl *cl); void vc4_reset_cl(struct vc4_cl *cl); void vc4_dump_cl(void *cl, uint32_t size, bool is_render); -uint32_t vc4_gem_hindex(struct vc4_context *vc4, struct vc4_bo *bo); +uint32_t vc4_gem_hindex(struct vc4_job *job, struct vc4_bo *bo); struct PACKED unaligned_16 { uint16_t x; }; struct PACKED unaligned_32 { uint32_t x; }; @@ -174,10 +175,10 @@ } static inline void -cl_reloc(struct vc4_context *vc4, struct vc4_cl *cl, struct vc4_cl_out **cl_out, +cl_reloc(struct vc4_job *job, struct vc4_cl *cl, struct vc4_cl_out **cl_out, struct vc4_bo *bo, uint32_t offset) { - *(uint32_t *)cl->reloc_next = vc4_gem_hindex(vc4, bo); + *(uint32_t *)cl->reloc_next = vc4_gem_hindex(job, bo); cl_advance(&cl->reloc_next, 4); #ifdef DEBUG @@ -188,11 +189,11 @@ } static inline void -cl_aligned_reloc(struct vc4_context *vc4, struct vc4_cl *cl, +cl_aligned_reloc(struct vc4_job *job, struct vc4_cl *cl, struct vc4_cl_out **cl_out, struct vc4_bo *bo, uint32_t offset) { - *(uint32_t *)cl->reloc_next = vc4_gem_hindex(vc4, bo); + *(uint32_t *)cl->reloc_next = vc4_gem_hindex(job, bo); cl_advance(&cl->reloc_next, 4); #ifdef DEBUG diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_context.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_context.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -41,73 +41,12 @@ vc4_flush(struct pipe_context *pctx) { struct vc4_context *vc4 = vc4_context(pctx); - struct pipe_surface *cbuf = vc4->framebuffer.cbufs[0]; - struct pipe_surface *zsbuf = vc4->framebuffer.zsbuf; - if (!vc4->needs_flush) - return; - - /* The RCL setup would choke if the draw bounds cause no drawing, so - * just drop the drawing if that's the case. - */ - if (vc4->draw_max_x <= vc4->draw_min_x || - vc4->draw_max_y <= vc4->draw_min_y) { - vc4_job_reset(vc4); - return; - } - - /* Increment the semaphore indicating that binning is done and - * unblocking the render thread. Note that this doesn't act until the - * FLUSH completes. - */ - cl_ensure_space(&vc4->bcl, 8); - struct vc4_cl_out *bcl = cl_start(&vc4->bcl); - cl_u8(&bcl, VC4_PACKET_INCREMENT_SEMAPHORE); - /* The FLUSH caps all of our bin lists with a VC4_PACKET_RETURN. */ - cl_u8(&bcl, VC4_PACKET_FLUSH); - cl_end(&vc4->bcl, bcl); - - if (cbuf && (vc4->resolve & PIPE_CLEAR_COLOR0)) { - pipe_surface_reference(&vc4->color_write, - cbuf->texture->nr_samples > 1 ? - NULL : cbuf); - pipe_surface_reference(&vc4->msaa_color_write, - cbuf->texture->nr_samples > 1 ? - cbuf : NULL); - - if (!(vc4->cleared & PIPE_CLEAR_COLOR0)) { - pipe_surface_reference(&vc4->color_read, cbuf); - } else { - pipe_surface_reference(&vc4->color_read, NULL); - } - - } else { - pipe_surface_reference(&vc4->color_write, NULL); - pipe_surface_reference(&vc4->color_read, NULL); - pipe_surface_reference(&vc4->msaa_color_write, NULL); - } - - if (vc4->framebuffer.zsbuf && - (vc4->resolve & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL))) { - pipe_surface_reference(&vc4->zs_write, - zsbuf->texture->nr_samples > 1 ? - NULL : zsbuf); - pipe_surface_reference(&vc4->msaa_zs_write, - zsbuf->texture->nr_samples > 1 ? - zsbuf : NULL); - - if (!(vc4->cleared & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL))) { - pipe_surface_reference(&vc4->zs_read, zsbuf); - } else { - pipe_surface_reference(&vc4->zs_read, NULL); - } - } else { - pipe_surface_reference(&vc4->zs_write, NULL); - pipe_surface_reference(&vc4->zs_read, NULL); - pipe_surface_reference(&vc4->msaa_zs_write, NULL); + struct hash_entry *entry; + hash_table_foreach(vc4->jobs, entry) { + struct vc4_job *job = entry->data; + vc4_job_submit(vc4, job); } - - vc4_job_submit(vc4); } static void @@ -127,63 +66,22 @@ } } -/** - * Flushes the current command lists if they reference the given BO. - * - * This helps avoid flushing the command buffers when unnecessary. - */ -bool -vc4_cl_references_bo(struct pipe_context *pctx, struct vc4_bo *bo, - bool include_reads) -{ - struct vc4_context *vc4 = vc4_context(pctx); - - if (!vc4->needs_flush) - return false; - - /* Walk all the referenced BOs in the drawing command list to see if - * they match. - */ - if (include_reads) { - struct vc4_bo **referenced_bos = vc4->bo_pointers.base; - for (int i = 0; i < cl_offset(&vc4->bo_handles) / 4; i++) { - if (referenced_bos[i] == bo) { - return true; - } - } - } - - /* Also check for the Z/color buffers, since the references to those - * are only added immediately before submit. - */ - struct vc4_surface *csurf = vc4_surface(vc4->framebuffer.cbufs[0]); - if (csurf) { - struct vc4_resource *ctex = vc4_resource(csurf->base.texture); - if (ctex->bo == bo) { - return true; - } - } - - struct vc4_surface *zsurf = vc4_surface(vc4->framebuffer.zsbuf); - if (zsurf) { - struct vc4_resource *ztex = - vc4_resource(zsurf->base.texture); - if (ztex->bo == bo) { - return true; - } - } - - return false; -} - static void vc4_invalidate_resource(struct pipe_context *pctx, struct pipe_resource *prsc) { struct vc4_context *vc4 = vc4_context(pctx); - struct pipe_surface *zsurf = vc4->framebuffer.zsbuf; + struct vc4_resource *rsc = vc4_resource(prsc); - if (zsurf && zsurf->texture == prsc) - vc4->resolve &= ~(PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL); + rsc->initialized_buffers = 0; + + struct hash_entry *entry = _mesa_hash_table_search(vc4->write_jobs, + prsc); + if (!entry) + return; + + struct vc4_job *job = entry->data; + if (job->key.zsbuf && job->key.zsbuf->texture == prsc) + job->resolve &= ~(PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL); } static void @@ -191,6 +89,8 @@ { struct vc4_context *vc4 = vc4_context(pctx); + vc4_flush(pctx); + if (vc4->blitter) util_blitter_destroy(vc4->blitter); @@ -200,14 +100,11 @@ if (vc4->uploader) u_upload_destroy(vc4->uploader); - util_slab_destroy(&vc4->transfer_pool); + slab_destroy_child(&vc4->transfer_pool); pipe_surface_reference(&vc4->framebuffer.cbufs[0], NULL); pipe_surface_reference(&vc4->framebuffer.zsbuf, NULL); - pipe_surface_reference(&vc4->color_write, NULL); - pipe_surface_reference(&vc4->color_read, NULL); - vc4_program_fini(pctx); ralloc_free(vc4); @@ -246,8 +143,7 @@ vc4->fd = screen->fd; - util_slab_create(&vc4->transfer_pool, sizeof(struct vc4_transfer), - 16, UTIL_SLAB_SINGLETHREADED); + slab_create_child(&vc4->transfer_pool, &screen->transfer_pool); vc4->blitter = util_blitter_create(pctx); if (!vc4->blitter) goto fail; diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_context.h mesa-17.0.7/src/gallium/drivers/vc4/vc4_context.h --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_context.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_context.h 2017-06-01 10:37:10.000000000 +0000 @@ -29,7 +29,8 @@ #include "pipe/p_context.h" #include "pipe/p_state.h" -#include "util/u_slab.h" +#include "util/slab.h" +#include "xf86drm.h" #define __user #include "vc4_drm.h" @@ -38,6 +39,13 @@ #include "vc4_cl.h" #include "vc4_qir.h" +#ifndef DRM_VC4_PARAM_SUPPORTS_ETC1 +#define DRM_VC4_PARAM_SUPPORTS_ETC1 4 +#endif +#ifndef DRM_VC4_PARAM_SUPPORTS_THREADED_FS +#define DRM_VC4_PARAM_SUPPORTS_THREADED_FS 5 +#endif + #ifdef USE_VC4_SIMULATOR #define using_vc4_simulator true #else @@ -49,7 +57,6 @@ #define VC4_DIRTY_ZSA (1 << 2) #define VC4_DIRTY_FRAGTEX (1 << 3) #define VC4_DIRTY_VERTTEX (1 << 4) -#define VC4_DIRTY_TEXSTATE (1 << 5) #define VC4_DIRTY_BLEND_COLOR (1 << 7) #define VC4_DIRTY_STENCIL_REF (1 << 8) @@ -70,11 +77,13 @@ #define VC4_DIRTY_COMPILED_CS (1 << 23) #define VC4_DIRTY_COMPILED_VS (1 << 24) #define VC4_DIRTY_COMPILED_FS (1 << 25) +#define VC4_DIRTY_FS_INPUTS (1 << 26) struct vc4_sampler_view { struct pipe_sampler_view base; uint32_t texture_p0; uint32_t texture_p1; + bool force_first_level; }; struct vc4_sampler_state { @@ -87,7 +96,6 @@ unsigned num_textures; struct pipe_sampler_state *samplers[PIPE_MAX_SAMPLERS]; unsigned num_samplers; - unsigned dirty_samplers; }; struct vc4_shader_uniform_info { @@ -124,6 +132,17 @@ uint32_t size; }; +struct vc4_fs_inputs { + /** + * Array of the meanings of the VPM inputs this shader needs. + * + * It doesn't include those that aren't part of the VPM, like + * point/line coordinates. + */ + struct vc4_varying_slot *input_slots; + uint32_t num_inputs; +}; + struct vc4_compiled_shader { uint64_t program_id; struct vc4_bo *bo; @@ -145,6 +164,14 @@ bool disable_early_z; + /* Set if the compile failed, likely due to register allocation + * failure. In this case, we have no shader to run and should not try + * to do any draws. + */ + bool failed; + + bool fs_threaded; + uint8_t num_inputs; /* Byte offsets for the start of the vertex attributes 0-7, and the @@ -153,13 +180,7 @@ uint8_t vattr_offsets[9]; uint8_t vattrs_live; - /** - * Array of the meanings of the VPM inputs this shader needs. - * - * It doesn't include those that aren't part of the VPM, like - * point/line coordinates. - */ - struct vc4_varying_slot *input_slots; + const struct vc4_fs_inputs *fs_inputs; }; struct vc4_program_stateobj { @@ -185,18 +206,35 @@ unsigned num_elements; }; -struct vc4_context { - struct pipe_context base; - - int fd; - struct vc4_screen *screen; - +/* Hash table key for vc4->jobs */ +struct vc4_job_key { + struct pipe_surface *cbuf; + struct pipe_surface *zsbuf; +}; + +/** + * A complete bin/render job. + * + * This is all of the state necessary to submit a bin/render to the kernel. + * We want to be able to have multiple in progress at a time, so that we don't + * need to flush an existing CL just to switch to rendering to a new render + * target (which would mean reading back from the old render target when + * starting to render to it again). + */ +struct vc4_job { struct vc4_cl bcl; struct vc4_cl shader_rec; struct vc4_cl uniforms; struct vc4_cl bo_handles; struct vc4_cl bo_pointers; uint32_t shader_rec_count; + /** + * Amount of memory used by the BOs in bo_pointers. + * + * Used for checking when we should flush the job early so we don't + * OOM. + */ + uint32_t bo_space; /** @{ Surfaces to submit rendering for. */ struct pipe_surface *color_read; @@ -233,11 +271,6 @@ bool msaa; /** @} */ - struct util_slab_mempool transfer_pool; - struct blitter_context *blitter; - - /** bitfield of VC4_DIRTY_* */ - uint32_t dirty; /* Bitmask of PIPE_CLEAR_* of buffers that were cleared before the * first rendering. */ @@ -263,25 +296,58 @@ */ uint32_t draw_calls_queued; - /** Maximum index buffer valid for the current shader_rec. */ - uint32_t max_index; - /** Last index bias baked into the current shader_rec. */ - uint32_t last_index_bias; + struct vc4_job_key key; +}; + +struct vc4_context { + struct pipe_context base; + + int fd; + struct vc4_screen *screen; + + /** The 3D rendering job for the currently bound FBO. */ + struct vc4_job *job; + + /* Map from struct vc4_job_key to the job for that FBO. + */ + struct hash_table *jobs; + + /** + * Map from vc4_resource to a job writing to that resource. + * + * Primarily for flushing jobs rendering to textures that are now + * being read from. + */ + struct hash_table *write_jobs; + + struct slab_child_pool transfer_pool; + struct blitter_context *blitter; + + /** bitfield of VC4_DIRTY_* */ + uint32_t dirty; struct primconvert_context *primconvert; struct hash_table *fs_cache, *vs_cache; + struct set *fs_inputs_set; uint32_t next_uncompiled_program_id; uint64_t next_compiled_program_id; struct ra_regs *regs; - unsigned int reg_class_any; - unsigned int reg_class_a_or_b_or_acc; - unsigned int reg_class_r4_or_a; - unsigned int reg_class_a; + unsigned int reg_class_any[2]; + unsigned int reg_class_a_or_b[2]; + unsigned int reg_class_a_or_b_or_acc[2]; + unsigned int reg_class_r0_r3; + unsigned int reg_class_r4_or_a[2]; + unsigned int reg_class_a[2]; uint8_t prim_mode; + /** Maximum index buffer valid for the current shader_rec. */ + uint32_t max_index; + /** Last index bias baked into the current shader_rec. */ + uint32_t last_index_bias; + /** Seqno of the last CL flush's job. */ uint64_t last_emit_seqno; @@ -381,8 +447,22 @@ void vc4_program_fini(struct pipe_context *pctx); void vc4_query_init(struct pipe_context *pctx); void vc4_simulator_init(struct vc4_screen *screen); +void vc4_simulator_destroy(struct vc4_screen *screen); int vc4_simulator_flush(struct vc4_context *vc4, - struct drm_vc4_submit_cl *args); + struct drm_vc4_submit_cl *args, + struct vc4_job *job); +int vc4_simulator_ioctl(int fd, unsigned long request, void *arg); +void vc4_simulator_open_from_handle(int fd, uint32_t winsys_stride, + int handle, uint32_t size); + +static inline int +vc4_ioctl(int fd, unsigned long request, void *arg) +{ + if (using_vc4_simulator) + return vc4_simulator_ioctl(fd, request, arg); + else + return drmIoctl(fd, request, arg); +} void vc4_set_shader_uniform_dirty_flags(struct vc4_compiled_shader *shader); void vc4_write_uniforms(struct vc4_context *vc4, @@ -392,14 +472,20 @@ void vc4_flush(struct pipe_context *pctx); void vc4_job_init(struct vc4_context *vc4); -void vc4_job_submit(struct vc4_context *vc4); -void vc4_job_reset(struct vc4_context *vc4); -bool vc4_cl_references_bo(struct pipe_context *pctx, struct vc4_bo *bo, - bool include_reads); +struct vc4_job *vc4_get_job(struct vc4_context *vc4, + struct pipe_surface *cbuf, + struct pipe_surface *zsbuf); +struct vc4_job *vc4_get_job_for_fbo(struct vc4_context *vc4); + +void vc4_job_submit(struct vc4_context *vc4, struct vc4_job *job); +void vc4_flush_jobs_writing_resource(struct vc4_context *vc4, + struct pipe_resource *prsc); +void vc4_flush_jobs_reading_resource(struct vc4_context *vc4, + struct pipe_resource *prsc); void vc4_emit_state(struct pipe_context *pctx); void vc4_generate_code(struct vc4_context *vc4, struct vc4_compile *c); struct qpu_reg *vc4_register_allocate(struct vc4_context *vc4, struct vc4_compile *c); -void vc4_update_compiled_shaders(struct vc4_context *vc4, uint8_t prim_mode); +bool vc4_update_compiled_shaders(struct vc4_context *vc4, uint8_t prim_mode); bool vc4_rt_format_supported(enum pipe_format f); bool vc4_rt_format_is_565(enum pipe_format f); @@ -408,4 +494,5 @@ const uint8_t *vc4_get_format_swizzle(enum pipe_format f); void vc4_init_query_functions(struct vc4_context *vc4); void vc4_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info); +void vc4_blitter_save(struct vc4_context *vc4); #endif /* VC4_CONTEXT_H */ diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_draw.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_draw.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_draw.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_draw.c 2017-06-01 10:37:10.000000000 +0000 @@ -22,6 +22,7 @@ * IN THE SOFTWARE. */ +#include "util/u_blitter.h" #include "util/u_prim.h" #include "util/u_format.h" #include "util/u_pack_color.h" @@ -31,8 +32,10 @@ #include "vc4_context.h" #include "vc4_resource.h" +#define VC4_HW_2116_COUNT 0x1ef0 + static void -vc4_get_draw_cl_space(struct vc4_context *vc4, int vert_count) +vc4_get_draw_cl_space(struct vc4_job *job, int vert_count) { /* The SW-5891 workaround may cause us to emit multiple shader recs * and draw packets. @@ -42,7 +45,7 @@ /* Binner gets our packet state -- vc4_emit.c contents, * and the primitive itself. */ - cl_ensure_space(&vc4->bcl, + cl_ensure_space(&job->bcl, 256 + (VC4_PACKET_GL_ARRAY_PRIMITIVE_SIZE + VC4_PACKET_GL_SHADER_STATE_SIZE) * num_draws); @@ -52,7 +55,7 @@ * sized shader_rec (104 bytes base for 8 vattrs plus 32 bytes of * vattr stride). */ - cl_ensure_space(&vc4->shader_rec, + cl_ensure_space(&job->shader_rec, (12 * sizeof(uint32_t) + 104 + 8 * 32) * num_draws); /* Uniforms are covered by vc4_write_uniforms(). */ @@ -60,8 +63,8 @@ /* There could be up to 16 textures per stage, plus misc other * pointers. */ - cl_ensure_space(&vc4->bo_handles, (2 * 16 + 20) * sizeof(uint32_t)); - cl_ensure_space(&vc4->bo_pointers, + cl_ensure_space(&job->bo_handles, (2 * 16 + 20) * sizeof(uint32_t)); + cl_ensure_space(&job->bo_pointers, (2 * 16 + 20) * sizeof(struct vc4_bo *)); } @@ -69,24 +72,26 @@ * Does the initial bining command list setup for drawing to a given FBO. */ static void -vc4_start_draw(struct vc4_context *vc4, int vert_count) +vc4_start_draw(struct vc4_context *vc4) { - if (vc4->needs_flush) + struct vc4_job *job = vc4->job; + + if (job->needs_flush) return; - vc4_get_draw_cl_space(vc4, 0); + vc4_get_draw_cl_space(job, 0); - struct vc4_cl_out *bcl = cl_start(&vc4->bcl); + struct vc4_cl_out *bcl = cl_start(&job->bcl); // Tile state data is 48 bytes per tile, I think it can be thrown away // as soon as binning is finished. cl_u8(&bcl, VC4_PACKET_TILE_BINNING_MODE_CONFIG); cl_u32(&bcl, 0); /* tile alloc addr, filled by kernel */ cl_u32(&bcl, 0); /* tile alloc size, filled by kernel */ cl_u32(&bcl, 0); /* tile state addr, filled by kernel */ - cl_u8(&bcl, vc4->draw_tiles_x); - cl_u8(&bcl, vc4->draw_tiles_y); + cl_u8(&bcl, job->draw_tiles_x); + cl_u8(&bcl, job->draw_tiles_y); /* Other flags are filled by kernel. */ - cl_u8(&bcl, vc4->msaa ? VC4_BIN_CONFIG_MS_MODE_4X : 0); + cl_u8(&bcl, job->msaa ? VC4_BIN_CONFIG_MS_MODE_4X : 0); /* START_TILE_BINNING resets the statechange counters in the hardware, * which are what is used when a primitive is binned to a tile to @@ -104,18 +109,19 @@ cl_u8(&bcl, (VC4_PRIMITIVE_LIST_FORMAT_16_INDEX | VC4_PRIMITIVE_LIST_FORMAT_TYPE_TRIANGLES)); - vc4->needs_flush = true; - vc4->draw_calls_queued++; - vc4->draw_width = vc4->framebuffer.width; - vc4->draw_height = vc4->framebuffer.height; + job->needs_flush = true; + job->draw_width = vc4->framebuffer.width; + job->draw_height = vc4->framebuffer.height; - cl_end(&vc4->bcl, bcl); + cl_end(&job->bcl, bcl); } static void -vc4_update_shadow_textures(struct pipe_context *pctx, +vc4_predraw_check_textures(struct pipe_context *pctx, struct vc4_texture_stateobj *stage_tex) { + struct vc4_context *vc4 = vc4_context(pctx); + for (int i = 0; i < stage_tex->num_textures; i++) { struct pipe_sampler_view *view = stage_tex->textures[i]; if (!view) @@ -123,13 +129,17 @@ struct vc4_resource *rsc = vc4_resource(view->texture); if (rsc->shadow_parent) vc4_update_shadow_baselevel_texture(pctx, view); + + vc4_flush_jobs_writing_resource(vc4, view->texture); } } static void -vc4_emit_gl_shader_state(struct vc4_context *vc4, const struct pipe_draw_info *info, +vc4_emit_gl_shader_state(struct vc4_context *vc4, + const struct pipe_draw_info *info, uint32_t extra_index_bias) { + struct vc4_job *job = vc4->job; /* VC4_DIRTY_VTXSTATE */ struct vc4_vertex_stateobj *vtx = vc4->vtx; /* VC4_DIRTY_VTXBUF */ @@ -141,11 +151,12 @@ uint32_t num_elements_emit = MAX2(vtx->num_elements, 1); /* Emit the shader record. */ struct vc4_cl_out *shader_rec = - cl_start_shader_reloc(&vc4->shader_rec, 3 + num_elements_emit); + cl_start_shader_reloc(&job->shader_rec, 3 + num_elements_emit); /* VC4_DIRTY_PRIM_MODE | VC4_DIRTY_RASTERIZER */ cl_u16(&shader_rec, VC4_SHADER_FLAG_ENABLE_CLIPPING | - VC4_SHADER_FLAG_FS_SINGLE_THREAD | + (vc4->prog.fs->fs_threaded ? + 0 : VC4_SHADER_FLAG_FS_SINGLE_THREAD) | ((info->mode == PIPE_PRIM_POINTS && vc4->rasterizer->base.point_size_per_vertex) ? VC4_SHADER_FLAG_VS_POINT_SIZE : 0)); @@ -153,21 +164,21 @@ /* VC4_DIRTY_COMPILED_FS */ cl_u8(&shader_rec, 0); /* fs num uniforms (unused) */ cl_u8(&shader_rec, vc4->prog.fs->num_inputs); - cl_reloc(vc4, &vc4->shader_rec, &shader_rec, vc4->prog.fs->bo, 0); + cl_reloc(job, &job->shader_rec, &shader_rec, vc4->prog.fs->bo, 0); cl_u32(&shader_rec, 0); /* UBO offset written by kernel */ /* VC4_DIRTY_COMPILED_VS */ cl_u16(&shader_rec, 0); /* vs num uniforms */ cl_u8(&shader_rec, vc4->prog.vs->vattrs_live); cl_u8(&shader_rec, vc4->prog.vs->vattr_offsets[8]); - cl_reloc(vc4, &vc4->shader_rec, &shader_rec, vc4->prog.vs->bo, 0); + cl_reloc(job, &job->shader_rec, &shader_rec, vc4->prog.vs->bo, 0); cl_u32(&shader_rec, 0); /* UBO offset written by kernel */ /* VC4_DIRTY_COMPILED_CS */ cl_u16(&shader_rec, 0); /* cs num uniforms */ cl_u8(&shader_rec, vc4->prog.cs->vattrs_live); cl_u8(&shader_rec, vc4->prog.cs->vattr_offsets[8]); - cl_reloc(vc4, &vc4->shader_rec, &shader_rec, vc4->prog.cs->bo, 0); + cl_reloc(job, &job->shader_rec, &shader_rec, vc4->prog.cs->bo, 0); cl_u32(&shader_rec, 0); /* UBO offset written by kernel */ uint32_t max_index = 0xffff; @@ -185,7 +196,7 @@ uint32_t elem_size = util_format_get_blocksize(elem->src_format); - cl_reloc(vc4, &vc4->shader_rec, &shader_rec, rsc->bo, offset); + cl_reloc(job, &job->shader_rec, &shader_rec, rsc->bo, offset); cl_u8(&shader_rec, elem_size - 1); cl_u8(&shader_rec, vb->stride); cl_u8(&shader_rec, vc4->prog.vs->vattr_offsets[i]); @@ -200,16 +211,16 @@ if (vtx->num_elements == 0) { assert(num_elements_emit == 1); struct vc4_bo *bo = vc4_bo_alloc(vc4->screen, 4096, "scratch VBO"); - cl_reloc(vc4, &vc4->shader_rec, &shader_rec, bo, 0); + cl_reloc(job, &job->shader_rec, &shader_rec, bo, 0); cl_u8(&shader_rec, 16 - 1); /* element size */ cl_u8(&shader_rec, 0); /* stride */ cl_u8(&shader_rec, 0); /* VS VPM offset */ cl_u8(&shader_rec, 0); /* CS VPM offset */ vc4_bo_unreference(&bo); } - cl_end(&vc4->shader_rec, shader_rec); + cl_end(&job->shader_rec, shader_rec); - struct vc4_cl_out *bcl = cl_start(&vc4->bcl); + struct vc4_cl_out *bcl = cl_start(&job->bcl); /* the actual draw call. */ cl_u8(&bcl, VC4_PACKET_GL_SHADER_STATE); assert(vtx->num_elements <= 8); @@ -217,7 +228,7 @@ * attributes. This field also contains the offset into shader_rec. */ cl_u32(&bcl, num_elements_emit & 0x7); - cl_end(&vc4->bcl, bcl); + cl_end(&job->bcl, bcl); vc4_write_uniforms(vc4, vc4->prog.fs, &vc4->constbuf[PIPE_SHADER_FRAGMENT], @@ -231,7 +242,7 @@ vc4->last_index_bias = info->index_bias + extra_index_bias; vc4->max_index = max_index; - vc4->shader_rec_count++; + job->shader_rec_count++; } /** @@ -255,14 +266,15 @@ * tiles with VC4_PACKET_RETURN_FROM_LIST. */ static void -vc4_hw_2116_workaround(struct pipe_context *pctx) +vc4_hw_2116_workaround(struct pipe_context *pctx, int vert_count) { struct vc4_context *vc4 = vc4_context(pctx); + struct vc4_job *job = vc4_get_job_for_fbo(vc4); - if (vc4->draw_calls_queued == 0x1ef0) { + if (job->draw_calls_queued + vert_count / 65535 >= VC4_HW_2116_COUNT) { perf_debug("Flushing batch due to HW-2116 workaround " "(too many draw calls per scene\n"); - vc4_flush(pctx); + vc4_job_submit(vc4, job); } } @@ -281,22 +293,26 @@ } /* Before setting up the draw, do any fixup blits necessary. */ - vc4_update_shadow_textures(pctx, &vc4->verttex); - vc4_update_shadow_textures(pctx, &vc4->fragtex); + vc4_predraw_check_textures(pctx, &vc4->verttex); + vc4_predraw_check_textures(pctx, &vc4->fragtex); + + vc4_hw_2116_workaround(pctx, info->count); - vc4_hw_2116_workaround(pctx); + struct vc4_job *job = vc4_get_job_for_fbo(vc4); - vc4_get_draw_cl_space(vc4, info->count); + vc4_get_draw_cl_space(job, info->count); if (vc4->prim_mode != info->mode) { vc4->prim_mode = info->mode; vc4->dirty |= VC4_DIRTY_PRIM_MODE; } - vc4_start_draw(vc4, info->count); - vc4_update_compiled_shaders(vc4, info->mode); + vc4_start_draw(vc4); + if (!vc4_update_compiled_shaders(vc4, info->mode)) { + debug_warn_once("shader compile failed, skipping draw call.\n"); + return; + } - uint32_t start_draw_calls_queued = vc4->draw_calls_queued; vc4_emit_state(pctx); if ((vc4->dirty & (VC4_DIRTY_VTXBUF | @@ -318,7 +334,7 @@ /* Note that the primitive type fields match with OpenGL/gallium * definitions, up to but not including QUADS. */ - struct vc4_cl_out *bcl = cl_start(&vc4->bcl); + struct vc4_cl_out *bcl = cl_start(&job->bcl); if (info->indexed) { uint32_t offset = vc4->indexbuf.offset; uint32_t index_size = vc4->indexbuf.index_size; @@ -340,7 +356,7 @@ } struct vc4_resource *rsc = vc4_resource(prsc); - cl_start_reloc(&vc4->bcl, &bcl, 1); + cl_start_reloc(&job->bcl, &bcl, 1); cl_u8(&bcl, VC4_PACKET_GL_INDEXED_PRIMITIVE); cl_u8(&bcl, info->mode | @@ -348,8 +364,9 @@ VC4_INDEX_BUFFER_U16: VC4_INDEX_BUFFER_U8)); cl_u32(&bcl, info->count); - cl_reloc(vc4, &vc4->bcl, &bcl, rsc->bo, offset); + cl_reloc(job, &job->bcl, &bcl, rsc->bo, offset); cl_u32(&bcl, vc4->max_index); + job->draw_calls_queued++; if (vc4->indexbuf.index_size == 4 || vc4->indexbuf.user_buffer) pipe_resource_reference(&prsc, NULL); @@ -375,10 +392,10 @@ * plus whatever remainder. */ if (extra_index_bias) { - cl_end(&vc4->bcl, bcl); + cl_end(&job->bcl, bcl); vc4_emit_gl_shader_state(vc4, info, extra_index_bias); - bcl = cl_start(&vc4->bcl); + bcl = cl_start(&job->bcl); } if (start + count > max_verts) { @@ -418,26 +435,43 @@ cl_u8(&bcl, info->mode); cl_u32(&bcl, this_count); cl_u32(&bcl, start); + job->draw_calls_queued++; count -= step; extra_index_bias += start + step; start = 0; } } - cl_end(&vc4->bcl, bcl); + cl_end(&job->bcl, bcl); - /* No flushes of the job should have happened between when we started - * emitting state for our draw and when we just emitted our draw's - * primitives. + /* We shouldn't have tripped the HW_2116 bug with the GFXH-515 + * workaround. */ - assert(start_draw_calls_queued == vc4->draw_calls_queued); + assert(job->draw_calls_queued <= VC4_HW_2116_COUNT); - if (vc4->zsa && vc4->zsa->base.depth.enabled) { - vc4->resolve |= PIPE_CLEAR_DEPTH; + if (vc4->zsa && vc4->framebuffer.zsbuf) { + struct vc4_resource *rsc = + vc4_resource(vc4->framebuffer.zsbuf->texture); + + if (vc4->zsa->base.depth.enabled) { + job->resolve |= PIPE_CLEAR_DEPTH; + rsc->initialized_buffers = PIPE_CLEAR_DEPTH; + } + + if (vc4->zsa->base.stencil[0].enabled) { + job->resolve |= PIPE_CLEAR_STENCIL; + rsc->initialized_buffers |= PIPE_CLEAR_STENCIL; + } } - if (vc4->zsa && vc4->zsa->base.stencil[0].enabled) - vc4->resolve |= PIPE_CLEAR_STENCIL; - vc4->resolve |= PIPE_CLEAR_COLOR0; + + job->resolve |= PIPE_CLEAR_COLOR0; + + /* If we've used half of the presumably 256MB CMA area, flush the job + * so that we don't accumulate a job that will end up not being + * executable. + */ + if (job->bo_space > 128 * 1024 * 1024) + vc4_flush(pctx); if (vc4_debug & VC4_DEBUG_ALWAYS_FLUSH) vc4_flush(pctx); @@ -459,45 +493,95 @@ const union pipe_color_union *color, double depth, unsigned stencil) { struct vc4_context *vc4 = vc4_context(pctx); + struct vc4_job *job = vc4_get_job_for_fbo(vc4); /* We can't flag new buffers for clearing once we've queued draws. We * could avoid this by using the 3d engine to clear. */ - if (vc4->draw_calls_queued) { + if (job->draw_calls_queued) { perf_debug("Flushing rendering to process new clear.\n"); - vc4_flush(pctx); + vc4_job_submit(vc4, job); + job = vc4_get_job_for_fbo(vc4); } if (buffers & PIPE_CLEAR_COLOR0) { - vc4->clear_color[0] = vc4->clear_color[1] = - pack_rgba(vc4->framebuffer.cbufs[0]->format, - color->f); + struct vc4_resource *rsc = + vc4_resource(vc4->framebuffer.cbufs[0]->texture); + uint32_t clear_color; + + if (vc4_rt_format_is_565(vc4->framebuffer.cbufs[0]->format)) { + /* In 565 mode, the hardware will be packing our color + * for us. + */ + clear_color = pack_rgba(PIPE_FORMAT_R8G8B8A8_UNORM, + color->f); + } else { + /* Otherwise, we need to do this packing because we + * support multiple swizzlings of RGBA8888. + */ + clear_color = + pack_rgba(vc4->framebuffer.cbufs[0]->format, + color->f); + } + job->clear_color[0] = job->clear_color[1] = clear_color; + rsc->initialized_buffers |= (buffers & PIPE_CLEAR_COLOR0); } - if (buffers & PIPE_CLEAR_DEPTH) { + if (buffers & PIPE_CLEAR_DEPTHSTENCIL) { + struct vc4_resource *rsc = + vc4_resource(vc4->framebuffer.zsbuf->texture); + unsigned zsclear = buffers & PIPE_CLEAR_DEPTHSTENCIL; + + /* Clearing ZS will clear both Z and stencil, so if we're + * trying to clear just one then we need to draw a quad to do + * it instead. + */ + if ((zsclear == PIPE_CLEAR_DEPTH || + zsclear == PIPE_CLEAR_STENCIL) && + (rsc->initialized_buffers & ~(zsclear | job->cleared)) && + util_format_is_depth_and_stencil(vc4->framebuffer.zsbuf->format)) { + perf_debug("Partial clear of Z+stencil buffer, " + "drawing a quad instead of fast clearing\n"); + vc4_blitter_save(vc4); + util_blitter_clear(vc4->blitter, + vc4->framebuffer.width, + vc4->framebuffer.height, + 1, + zsclear, + NULL, depth, stencil); + buffers &= ~zsclear; + if (!buffers) + return; + } + /* Though the depth buffer is stored with Z in the high 24, * for this field we just need to store it in the low 24. */ - vc4->clear_depth = util_pack_z(PIPE_FORMAT_Z24X8_UNORM, depth); - } + if (buffers & PIPE_CLEAR_DEPTH) { + job->clear_depth = util_pack_z(PIPE_FORMAT_Z24X8_UNORM, + depth); + } + if (buffers & PIPE_CLEAR_STENCIL) + job->clear_stencil = stencil; - if (buffers & PIPE_CLEAR_STENCIL) - vc4->clear_stencil = stencil; + rsc->initialized_buffers |= zsclear; + } - vc4->draw_min_x = 0; - vc4->draw_min_y = 0; - vc4->draw_max_x = vc4->framebuffer.width; - vc4->draw_max_y = vc4->framebuffer.height; - vc4->cleared |= buffers; - vc4->resolve |= buffers; + job->draw_min_x = 0; + job->draw_min_y = 0; + job->draw_max_x = vc4->framebuffer.width; + job->draw_max_y = vc4->framebuffer.height; + job->cleared |= buffers; + job->resolve |= buffers; - vc4_start_draw(vc4, 0); + vc4_start_draw(vc4); } static void vc4_clear_render_target(struct pipe_context *pctx, struct pipe_surface *ps, const union pipe_color_union *color, - unsigned x, unsigned y, unsigned w, unsigned h) + unsigned x, unsigned y, unsigned w, unsigned h, + bool render_condition_enabled) { fprintf(stderr, "unimpl: clear RT\n"); } @@ -505,7 +589,8 @@ static void vc4_clear_depth_stencil(struct pipe_context *pctx, struct pipe_surface *ps, unsigned buffers, double depth, unsigned stencil, - unsigned x, unsigned y, unsigned w, unsigned h) + unsigned x, unsigned y, unsigned w, unsigned h, + bool render_condition_enabled) { fprintf(stderr, "unimpl: clear DS\n"); } diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_drm.h mesa-17.0.7/src/gallium/drivers/vc4/vc4_drm.h --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_drm.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_drm.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,279 +0,0 @@ -/* - * Copyright © 2014-2015 Broadcom - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - -#ifndef _UAPI_VC4_DRM_H_ -#define _UAPI_VC4_DRM_H_ - -#include - -#define DRM_VC4_SUBMIT_CL 0x00 -#define DRM_VC4_WAIT_SEQNO 0x01 -#define DRM_VC4_WAIT_BO 0x02 -#define DRM_VC4_CREATE_BO 0x03 -#define DRM_VC4_MMAP_BO 0x04 -#define DRM_VC4_CREATE_SHADER_BO 0x05 -#define DRM_VC4_GET_HANG_STATE 0x06 - -#define DRM_IOCTL_VC4_SUBMIT_CL DRM_IOWR( DRM_COMMAND_BASE + DRM_VC4_SUBMIT_CL, struct drm_vc4_submit_cl) -#define DRM_IOCTL_VC4_WAIT_SEQNO DRM_IOWR( DRM_COMMAND_BASE + DRM_VC4_WAIT_SEQNO, struct drm_vc4_wait_seqno) -#define DRM_IOCTL_VC4_WAIT_BO DRM_IOWR( DRM_COMMAND_BASE + DRM_VC4_WAIT_BO, struct drm_vc4_wait_bo) -#define DRM_IOCTL_VC4_CREATE_BO DRM_IOWR( DRM_COMMAND_BASE + DRM_VC4_CREATE_BO, struct drm_vc4_create_bo) -#define DRM_IOCTL_VC4_MMAP_BO DRM_IOWR( DRM_COMMAND_BASE + DRM_VC4_MMAP_BO, struct drm_vc4_mmap_bo) -#define DRM_IOCTL_VC4_CREATE_SHADER_BO DRM_IOWR( DRM_COMMAND_BASE + DRM_VC4_CREATE_SHADER_BO, struct drm_vc4_create_shader_bo) -#define DRM_IOCTL_VC4_GET_HANG_STATE DRM_IOWR( DRM_COMMAND_BASE + DRM_VC4_GET_HANG_STATE, struct drm_vc4_get_hang_state) - -struct drm_vc4_submit_rcl_surface { - uint32_t hindex; /* Handle index, or ~0 if not present. */ - uint32_t offset; /* Offset to start of buffer. */ - /* - * Bits for either render config (color_write) or load/store packet. - * Bits should all be 0 for MSAA load/stores. - */ - uint16_t bits; - -#define VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES (1 << 0) - uint16_t flags; -}; - -/** - * struct drm_vc4_submit_cl - ioctl argument for submitting commands to the 3D - * engine. - * - * Drivers typically use GPU BOs to store batchbuffers / command lists and - * their associated state. However, because the VC4 lacks an MMU, we have to - * do validation of memory accesses by the GPU commands. If we were to store - * our commands in BOs, we'd need to do uncached readback from them to do the - * validation process, which is too expensive. Instead, userspace accumulates - * commands and associated state in plain memory, then the kernel copies the - * data to its own address space, and then validates and stores it in a GPU - * BO. - */ -struct drm_vc4_submit_cl { - /* Pointer to the binner command list. - * - * This is the first set of commands executed, which runs the - * coordinate shader to determine where primitives land on the screen, - * then writes out the state updates and draw calls necessary per tile - * to the tile allocation BO. - */ - uint64_t bin_cl; - - /* Pointer to the shader records. - * - * Shader records are the structures read by the hardware that contain - * pointers to uniforms, shaders, and vertex attributes. The - * reference to the shader record has enough information to determine - * how many pointers are necessary (fixed number for shaders/uniforms, - * and an attribute count), so those BO indices into bo_handles are - * just stored as uint32_ts before each shader record passed in. - */ - uint64_t shader_rec; - - /* Pointer to uniform data and texture handles for the textures - * referenced by the shader. - * - * For each shader state record, there is a set of uniform data in the - * order referenced by the record (FS, VS, then CS). Each set of - * uniform data has a uint32_t index into bo_handles per texture - * sample operation, in the order the QPU_W_TMUn_S writes appear in - * the program. Following the texture BO handle indices is the actual - * uniform data. - * - * The individual uniform state blocks don't have sizes passed in, - * because the kernel has to determine the sizes anyway during shader - * code validation. - */ - uint64_t uniforms; - uint64_t bo_handles; - - /* Size in bytes of the binner command list. */ - uint32_t bin_cl_size; - /* Size in bytes of the set of shader records. */ - uint32_t shader_rec_size; - /* Number of shader records. - * - * This could just be computed from the contents of shader_records and - * the address bits of references to them from the bin CL, but it - * keeps the kernel from having to resize some allocations it makes. - */ - uint32_t shader_rec_count; - /* Size in bytes of the uniform state. */ - uint32_t uniforms_size; - - /* Number of BO handles passed in (size is that times 4). */ - uint32_t bo_handle_count; - - /* RCL setup: */ - uint16_t width; - uint16_t height; - uint8_t min_x_tile; - uint8_t min_y_tile; - uint8_t max_x_tile; - uint8_t max_y_tile; - struct drm_vc4_submit_rcl_surface color_read; - struct drm_vc4_submit_rcl_surface color_write; - struct drm_vc4_submit_rcl_surface zs_read; - struct drm_vc4_submit_rcl_surface zs_write; - struct drm_vc4_submit_rcl_surface msaa_color_write; - struct drm_vc4_submit_rcl_surface msaa_zs_write; - uint32_t clear_color[2]; - uint32_t clear_z; - uint8_t clear_s; - - uint32_t pad:24; - -#define VC4_SUBMIT_CL_USE_CLEAR_COLOR (1 << 0) - uint32_t flags; - - /* Returned value of the seqno of this render job (for the - * wait ioctl). - */ - uint64_t seqno; -}; - -/** - * struct drm_vc4_wait_seqno - ioctl argument for waiting for - * DRM_VC4_SUBMIT_CL completion using its returned seqno. - * - * timeout_ns is the timeout in nanoseconds, where "0" means "don't - * block, just return the status." - */ -struct drm_vc4_wait_seqno { - uint64_t seqno; - uint64_t timeout_ns; -}; - -/** - * struct drm_vc4_wait_bo - ioctl argument for waiting for - * completion of the last DRM_VC4_SUBMIT_CL on a BO. - * - * This is useful for cases where multiple processes might be - * rendering to a BO and you want to wait for all rendering to be - * completed. - */ -struct drm_vc4_wait_bo { - uint32_t handle; - uint32_t pad; - uint64_t timeout_ns; -}; - -/** - * struct drm_vc4_create_bo - ioctl argument for creating VC4 BOs. - * - * There are currently no values for the flags argument, but it may be - * used in a future extension. - */ -struct drm_vc4_create_bo { - uint32_t size; - uint32_t flags; - /** Returned GEM handle for the BO. */ - uint32_t handle; - uint32_t pad; -}; - -/** - * struct drm_vc4_create_shader_bo - ioctl argument for creating VC4 - * shader BOs. - * - * Since allowing a shader to be overwritten while it's also being - * executed from would allow privlege escalation, shaders must be - * created using this ioctl, and they can't be mmapped later. - */ -struct drm_vc4_create_shader_bo { - /* Size of the data argument. */ - uint32_t size; - /* Flags, currently must be 0. */ - uint32_t flags; - - /* Pointer to the data. */ - uint64_t data; - - /** Returned GEM handle for the BO. */ - uint32_t handle; - /* Pad, must be 0. */ - uint32_t pad; -}; - -/** - * struct drm_vc4_mmap_bo - ioctl argument for mapping VC4 BOs. - * - * This doesn't actually perform an mmap. Instead, it returns the - * offset you need to use in an mmap on the DRM device node. This - * means that tools like valgrind end up knowing about the mapped - * memory. - * - * There are currently no values for the flags argument, but it may be - * used in a future extension. - */ -struct drm_vc4_mmap_bo { - /** Handle for the object being mapped. */ - uint32_t handle; - uint32_t flags; - /** offset into the drm node to use for subsequent mmap call. */ - uint64_t offset; -}; - -struct drm_vc4_get_hang_state_bo { - uint32_t handle; - uint32_t paddr; - uint32_t size; - uint32_t pad; -}; - -/** - * struct drm_vc4_hang_state - ioctl argument for collecting state - * from a GPU hang for analysis. -*/ -struct drm_vc4_get_hang_state { - /** Pointer to array of struct drm_vc4_get_hang_state_bo. */ - uint64_t bo; - /** - * On input, the size of the bo array. Output is the number - * of bos to be returned. - */ - uint32_t bo_count; - - uint32_t start_bin, start_render; - - uint32_t ct0ca, ct0ea; - uint32_t ct1ca, ct1ea; - uint32_t ct0cs, ct1cs; - uint32_t ct0ra0, ct1ra0; - - uint32_t bpca, bpcs; - uint32_t bpoa, bpos; - - uint32_t vpmbase; - - uint32_t dbge; - uint32_t fdbgo; - uint32_t fdbgb; - uint32_t fdbgr; - uint32_t fdbgs; - uint32_t errstat; - - /* Pad that we may save more registers into in the future. */ - uint32_t pad[16]; -}; - -#endif /* _UAPI_VC4_DRM_H_ */ diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_emit.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_emit.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_emit.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_emit.c 2017-06-01 10:37:10.000000000 +0000 @@ -27,8 +27,9 @@ vc4_emit_state(struct pipe_context *pctx) { struct vc4_context *vc4 = vc4_context(pctx); + struct vc4_job *job = vc4->job; - struct vc4_cl_out *bcl = cl_start(&vc4->bcl); + struct vc4_cl_out *bcl = cl_start(&job->bcl); if (vc4->dirty & (VC4_DIRTY_SCISSOR | VC4_DIRTY_VIEWPORT | VC4_DIRTY_RASTERIZER)) { float *vpscale = vc4->viewport.scale; @@ -50,8 +51,8 @@ if (!vc4->rasterizer->base.scissor) { minx = MAX2(vp_minx, 0); miny = MAX2(vp_miny, 0); - maxx = MIN2(vp_maxx, vc4->draw_width); - maxy = MIN2(vp_maxy, vc4->draw_height); + maxx = MIN2(vp_maxx, job->draw_width); + maxy = MIN2(vp_maxy, job->draw_height); } else { minx = MAX2(vp_minx, vc4->scissor.minx); miny = MAX2(vp_miny, vc4->scissor.miny); @@ -65,16 +66,17 @@ cl_u16(&bcl, maxx - minx); cl_u16(&bcl, maxy - miny); - vc4->draw_min_x = MIN2(vc4->draw_min_x, minx); - vc4->draw_min_y = MIN2(vc4->draw_min_y, miny); - vc4->draw_max_x = MAX2(vc4->draw_max_x, maxx); - vc4->draw_max_y = MAX2(vc4->draw_max_y, maxy); + job->draw_min_x = MIN2(job->draw_min_x, minx); + job->draw_min_y = MIN2(job->draw_min_y, miny); + job->draw_max_x = MAX2(job->draw_max_x, maxx); + job->draw_max_y = MAX2(job->draw_max_y, maxy); } if (vc4->dirty & (VC4_DIRTY_RASTERIZER | VC4_DIRTY_ZSA | VC4_DIRTY_COMPILED_FS)) { uint8_t ez_enable_mask_out = ~0; + uint8_t rasosm_mask_out = ~0; /* HW-2905: If the RCL ends up doing a full-res load when * multisampling, then early Z tracking may end up with values @@ -85,13 +87,23 @@ * was seeing bad rendering on glxgears -samples 4 even in * that case. */ - if (vc4->msaa || vc4->prog.fs->disable_early_z) + if (job->msaa || vc4->prog.fs->disable_early_z) ez_enable_mask_out &= ~VC4_CONFIG_BITS_EARLY_Z; + /* Don't set the rasterizer to oversample if we're doing our + * binning and load/stores in single-sample mode. This is for + * the samples == 1 case, where vc4 doesn't do any + * multisampling behavior. + */ + if (!job->msaa) { + rasosm_mask_out &= + ~VC4_CONFIG_BITS_RASTERIZER_OVERSAMPLE_4X; + } + cl_u8(&bcl, VC4_PACKET_CONFIGURATION_BITS); cl_u8(&bcl, - vc4->rasterizer->config_bits[0] | - vc4->zsa->config_bits[0]); + (vc4->rasterizer->config_bits[0] | + vc4->zsa->config_bits[0]) & rasosm_mask_out); cl_u8(&bcl, vc4->rasterizer->config_bits[1] | vc4->zsa->config_bits[1]); @@ -132,5 +144,5 @@ vc4->prog.fs->color_inputs : 0); } - cl_end(&vc4->bcl, bcl); + cl_end(&job->bcl, bcl); } diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_fence.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_fence.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_fence.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_fence.c 2017-06-01 10:37:10.000000000 +0000 @@ -61,6 +61,7 @@ static boolean vc4_fence_finish(struct pipe_screen *pscreen, + struct pipe_context *ctx, struct pipe_fence_handle *pf, uint64_t timeout_ns) { diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_formats.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_formats.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_formats.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_formats.c 2017-06-01 10:37:10.000000000 +0000 @@ -83,6 +83,8 @@ FORMAT(B5G6R5_UNORM, RGB565, RGB565, SWIZ(X, Y, Z, 1)), + FORMAT(ETC1_RGB8, NO, ETC1, SWIZ(X, Y, Z, 1)), + /* Depth sampling will be handled by doing nearest filtering and not * unpacking the RGBA value. */ diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_job.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_job.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_job.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_job.c 2017-06-01 10:37:10.000000000 +0000 @@ -28,65 +28,254 @@ #include #include "vc4_context.h" +#include "util/hash_table.h" + +static void +remove_from_ht(struct hash_table *ht, void *key) +{ + struct hash_entry *entry = _mesa_hash_table_search(ht, key); + _mesa_hash_table_remove(ht, entry); +} + +static void +vc4_job_free(struct vc4_context *vc4, struct vc4_job *job) +{ + struct vc4_bo **referenced_bos = job->bo_pointers.base; + for (int i = 0; i < cl_offset(&job->bo_handles) / 4; i++) { + vc4_bo_unreference(&referenced_bos[i]); + } + + remove_from_ht(vc4->jobs, &job->key); + + if (job->color_write) { + remove_from_ht(vc4->write_jobs, job->color_write->texture); + pipe_surface_reference(&job->color_write, NULL); + } + if (job->msaa_color_write) { + remove_from_ht(vc4->write_jobs, job->msaa_color_write->texture); + pipe_surface_reference(&job->msaa_color_write, NULL); + } + if (job->zs_write) { + remove_from_ht(vc4->write_jobs, job->zs_write->texture); + pipe_surface_reference(&job->zs_write, NULL); + } + if (job->msaa_zs_write) { + remove_from_ht(vc4->write_jobs, job->msaa_zs_write->texture); + pipe_surface_reference(&job->msaa_zs_write, NULL); + } + + pipe_surface_reference(&job->color_read, NULL); + pipe_surface_reference(&job->zs_read, NULL); + + if (vc4->job == job) + vc4->job = NULL; + + ralloc_free(job); +} + +static struct vc4_job * +vc4_job_create(struct vc4_context *vc4) +{ + struct vc4_job *job = rzalloc(vc4, struct vc4_job); + + vc4_init_cl(job, &job->bcl); + vc4_init_cl(job, &job->shader_rec); + vc4_init_cl(job, &job->uniforms); + vc4_init_cl(job, &job->bo_handles); + vc4_init_cl(job, &job->bo_pointers); + + job->draw_min_x = ~0; + job->draw_min_y = ~0; + job->draw_max_x = 0; + job->draw_max_y = 0; + + return job; +} void -vc4_job_init(struct vc4_context *vc4) +vc4_flush_jobs_writing_resource(struct vc4_context *vc4, + struct pipe_resource *prsc) { - vc4_init_cl(vc4, &vc4->bcl); - vc4_init_cl(vc4, &vc4->shader_rec); - vc4_init_cl(vc4, &vc4->uniforms); - vc4_init_cl(vc4, &vc4->bo_handles); - vc4_init_cl(vc4, &vc4->bo_pointers); - vc4_job_reset(vc4); + struct hash_entry *entry = _mesa_hash_table_search(vc4->write_jobs, + prsc); + if (entry) { + struct vc4_job *job = entry->data; + vc4_job_submit(vc4, job); + } } void -vc4_job_reset(struct vc4_context *vc4) +vc4_flush_jobs_reading_resource(struct vc4_context *vc4, + struct pipe_resource *prsc) { - struct vc4_bo **referenced_bos = vc4->bo_pointers.base; - for (int i = 0; i < cl_offset(&vc4->bo_handles) / 4; i++) { - vc4_bo_unreference(&referenced_bos[i]); + struct vc4_resource *rsc = vc4_resource(prsc); + + vc4_flush_jobs_writing_resource(vc4, prsc); + + struct hash_entry *entry; + hash_table_foreach(vc4->jobs, entry) { + struct vc4_job *job = entry->data; + + struct vc4_bo **referenced_bos = job->bo_pointers.base; + for (int i = 0; i < cl_offset(&job->bo_handles) / 4; i++) { + if (referenced_bos[i] == rsc->bo) { + vc4_job_submit(vc4, job); + continue; + } + } + + /* Also check for the Z/color buffers, since the references to + * those are only added immediately before submit. + */ + if (job->color_read && !(job->cleared & PIPE_CLEAR_COLOR)) { + struct vc4_resource *ctex = + vc4_resource(job->color_read->texture); + if (ctex->bo == rsc->bo) { + vc4_job_submit(vc4, job); + continue; + } + } + + if (job->zs_read && !(job->cleared & + (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL))) { + struct vc4_resource *ztex = + vc4_resource(job->zs_read->texture); + if (ztex->bo == rsc->bo) { + vc4_job_submit(vc4, job); + continue; + } + } } - vc4_reset_cl(&vc4->bcl); - vc4_reset_cl(&vc4->shader_rec); - vc4_reset_cl(&vc4->uniforms); - vc4_reset_cl(&vc4->bo_handles); - vc4_reset_cl(&vc4->bo_pointers); - vc4->shader_rec_count = 0; - - vc4->needs_flush = false; - vc4->draw_calls_queued = 0; - - /* We have no hardware context saved between our draw calls, so we - * need to flag the next draw as needing all state emitted. Emitting - * all state at the start of our draws is also what ensures that we - * return to the state we need after a previous tile has finished. +} + +/** + * Returns a vc4_job struture for tracking V3D rendering to a particular FBO. + * + * If we've already started rendering to this FBO, then return old same job, + * otherwise make a new one. If we're beginning rendering to an FBO, make + * sure that any previous reads of the FBO (or writes to its color/Z surfaces) + * have been flushed. + */ +struct vc4_job * +vc4_get_job(struct vc4_context *vc4, + struct pipe_surface *cbuf, struct pipe_surface *zsbuf) +{ + /* Return the existing job for this FBO if we have one */ + struct vc4_job_key local_key = {.cbuf = cbuf, .zsbuf = zsbuf}; + struct hash_entry *entry = _mesa_hash_table_search(vc4->jobs, + &local_key); + if (entry) + return entry->data; + + /* Creating a new job. Make sure that any previous jobs reading or + * writing these buffers are flushed. + */ + if (cbuf) + vc4_flush_jobs_reading_resource(vc4, cbuf->texture); + if (zsbuf) + vc4_flush_jobs_reading_resource(vc4, zsbuf->texture); + + struct vc4_job *job = vc4_job_create(vc4); + + if (cbuf) { + if (cbuf->texture->nr_samples > 1) { + job->msaa = true; + pipe_surface_reference(&job->msaa_color_write, cbuf); + } else { + pipe_surface_reference(&job->color_write, cbuf); + } + } + + if (zsbuf) { + if (zsbuf->texture->nr_samples > 1) { + job->msaa = true; + pipe_surface_reference(&job->msaa_zs_write, zsbuf); + } else { + pipe_surface_reference(&job->zs_write, zsbuf); + } + } + + if (job->msaa) { + job->tile_width = 32; + job->tile_height = 32; + } else { + job->tile_width = 64; + job->tile_height = 64; + } + + if (cbuf) + _mesa_hash_table_insert(vc4->write_jobs, cbuf->texture, job); + if (zsbuf) + _mesa_hash_table_insert(vc4->write_jobs, zsbuf->texture, job); + + job->key.cbuf = cbuf; + job->key.zsbuf = zsbuf; + _mesa_hash_table_insert(vc4->jobs, &job->key, job); + + return job; +} + +struct vc4_job * +vc4_get_job_for_fbo(struct vc4_context *vc4) +{ + if (vc4->job) + return vc4->job; + + struct pipe_surface *cbuf = vc4->framebuffer.cbufs[0]; + struct pipe_surface *zsbuf = vc4->framebuffer.zsbuf; + struct vc4_job *job = vc4_get_job(vc4, cbuf, zsbuf); + + /* The dirty flags are tracking what's been updated while vc4->job has + * been bound, so set them all to ~0 when switching between jobs. We + * also need to reset all state at the start of rendering. */ vc4->dirty = ~0; - vc4->resolve = 0; - vc4->cleared = 0; - vc4->draw_min_x = ~0; - vc4->draw_min_y = ~0; - vc4->draw_max_x = 0; - vc4->draw_max_y = 0; + /* Set up the read surfaces in the job. If they aren't actually + * getting read (due to a clear starting the frame), job->cleared will + * mask out the read. + */ + pipe_surface_reference(&job->color_read, cbuf); + pipe_surface_reference(&job->zs_read, zsbuf); + + /* If we're binding to uninitialized buffers, no need to load their + * contents before drawing. + */ + if (cbuf) { + struct vc4_resource *rsc = vc4_resource(cbuf->texture); + if (!rsc->writes) + job->cleared |= PIPE_CLEAR_COLOR0; + } + + if (zsbuf) { + struct vc4_resource *rsc = vc4_resource(zsbuf->texture); + if (!rsc->writes) + job->cleared |= PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL; + } + + job->draw_tiles_x = DIV_ROUND_UP(vc4->framebuffer.width, + job->tile_width); + job->draw_tiles_y = DIV_ROUND_UP(vc4->framebuffer.height, + job->tile_height); + + vc4->job = job; + + return job; } static void -vc4_submit_setup_rcl_surface(struct vc4_context *vc4, +vc4_submit_setup_rcl_surface(struct vc4_job *job, struct drm_vc4_submit_rcl_surface *submit_surf, struct pipe_surface *psurf, bool is_depth, bool is_write) { struct vc4_surface *surf = vc4_surface(psurf); - if (!surf) { - submit_surf->hindex = ~0; + if (!surf) return; - } struct vc4_resource *rsc = vc4_resource(psurf->texture); - submit_surf->hindex = vc4_gem_hindex(vc4, rsc->bo); + submit_surf->hindex = vc4_gem_hindex(job, rsc->bo); submit_surf->offset = surf->offset; if (psurf->texture->nr_samples <= 1) { @@ -117,19 +306,17 @@ } static void -vc4_submit_setup_rcl_render_config_surface(struct vc4_context *vc4, +vc4_submit_setup_rcl_render_config_surface(struct vc4_job *job, struct drm_vc4_submit_rcl_surface *submit_surf, struct pipe_surface *psurf) { struct vc4_surface *surf = vc4_surface(psurf); - if (!surf) { - submit_surf->hindex = ~0; + if (!surf) return; - } struct vc4_resource *rsc = vc4_resource(psurf->texture); - submit_surf->hindex = vc4_gem_hindex(vc4, rsc->bo); + submit_surf->hindex = vc4_gem_hindex(job, rsc->bo); submit_surf->offset = surf->offset; if (psurf->texture->nr_samples <= 1) { @@ -146,19 +333,17 @@ } static void -vc4_submit_setup_rcl_msaa_surface(struct vc4_context *vc4, +vc4_submit_setup_rcl_msaa_surface(struct vc4_job *job, struct drm_vc4_submit_rcl_surface *submit_surf, struct pipe_surface *psurf) { struct vc4_surface *surf = vc4_surface(psurf); - if (!surf) { - submit_surf->hindex = ~0; + if (!surf) return; - } struct vc4_resource *rsc = vc4_resource(psurf->texture); - submit_surf->hindex = vc4_gem_hindex(vc4, rsc->bo); + submit_surf->hindex = vc4_gem_hindex(job, rsc->bo); submit_surf->offset = surf->offset; submit_surf->bits = 0; rsc->writes++; @@ -168,34 +353,75 @@ * Submits the job to the kernel and then reinitializes it. */ void -vc4_job_submit(struct vc4_context *vc4) +vc4_job_submit(struct vc4_context *vc4, struct vc4_job *job) { + if (!job->needs_flush) + goto done; + + /* The RCL setup would choke if the draw bounds cause no drawing, so + * just drop the drawing if that's the case. + */ + if (job->draw_max_x <= job->draw_min_x || + job->draw_max_y <= job->draw_min_y) { + goto done; + } + if (vc4_debug & VC4_DEBUG_CL) { fprintf(stderr, "BCL:\n"); - vc4_dump_cl(vc4->bcl.base, cl_offset(&vc4->bcl), false); + vc4_dump_cl(job->bcl.base, cl_offset(&job->bcl), false); } - struct drm_vc4_submit_cl submit; - memset(&submit, 0, sizeof(submit)); - - cl_ensure_space(&vc4->bo_handles, 6 * sizeof(uint32_t)); - cl_ensure_space(&vc4->bo_pointers, 6 * sizeof(struct vc4_bo *)); - - vc4_submit_setup_rcl_surface(vc4, &submit.color_read, - vc4->color_read, false, false); - vc4_submit_setup_rcl_render_config_surface(vc4, &submit.color_write, - vc4->color_write); - vc4_submit_setup_rcl_surface(vc4, &submit.zs_read, - vc4->zs_read, true, false); - vc4_submit_setup_rcl_surface(vc4, &submit.zs_write, - vc4->zs_write, true, true); - - vc4_submit_setup_rcl_msaa_surface(vc4, &submit.msaa_color_write, - vc4->msaa_color_write); - vc4_submit_setup_rcl_msaa_surface(vc4, &submit.msaa_zs_write, - vc4->msaa_zs_write); + if (cl_offset(&job->bcl) > 0) { + /* Increment the semaphore indicating that binning is done and + * unblocking the render thread. Note that this doesn't act + * until the FLUSH completes. + */ + cl_ensure_space(&job->bcl, 8); + struct vc4_cl_out *bcl = cl_start(&job->bcl); + cl_u8(&bcl, VC4_PACKET_INCREMENT_SEMAPHORE); + /* The FLUSH caps all of our bin lists with a + * VC4_PACKET_RETURN. + */ + cl_u8(&bcl, VC4_PACKET_FLUSH); + cl_end(&job->bcl, bcl); + } + struct drm_vc4_submit_cl submit = { + .color_read.hindex = ~0, + .zs_read.hindex = ~0, + .color_write.hindex = ~0, + .msaa_color_write.hindex = ~0, + .zs_write.hindex = ~0, + .msaa_zs_write.hindex = ~0, + }; + + cl_ensure_space(&job->bo_handles, 6 * sizeof(uint32_t)); + cl_ensure_space(&job->bo_pointers, 6 * sizeof(struct vc4_bo *)); + + if (job->resolve & PIPE_CLEAR_COLOR) { + if (!(job->cleared & PIPE_CLEAR_COLOR)) { + vc4_submit_setup_rcl_surface(job, &submit.color_read, + job->color_read, + false, false); + } + vc4_submit_setup_rcl_render_config_surface(job, + &submit.color_write, + job->color_write); + vc4_submit_setup_rcl_msaa_surface(job, + &submit.msaa_color_write, + job->msaa_color_write); + } + if (job->resolve & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) { + if (!(job->cleared & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL))) { + vc4_submit_setup_rcl_surface(job, &submit.zs_read, + job->zs_read, true, false); + } + vc4_submit_setup_rcl_surface(job, &submit.zs_write, + job->zs_write, true, true); + vc4_submit_setup_rcl_msaa_surface(job, &submit.msaa_zs_write, + job->msaa_zs_write); + } - if (vc4->msaa) { + if (job->msaa) { /* This bit controls how many pixels the general * (i.e. subsampled) loads/stores are iterating over * (multisample loads replicate out to the other samples). @@ -207,29 +433,29 @@ submit.color_write.bits |= VC4_RENDER_CONFIG_DECIMATE_MODE_4X; } - submit.bo_handles = (uintptr_t)vc4->bo_handles.base; - submit.bo_handle_count = cl_offset(&vc4->bo_handles) / 4; - submit.bin_cl = (uintptr_t)vc4->bcl.base; - submit.bin_cl_size = cl_offset(&vc4->bcl); - submit.shader_rec = (uintptr_t)vc4->shader_rec.base; - submit.shader_rec_size = cl_offset(&vc4->shader_rec); - submit.shader_rec_count = vc4->shader_rec_count; - submit.uniforms = (uintptr_t)vc4->uniforms.base; - submit.uniforms_size = cl_offset(&vc4->uniforms); - - assert(vc4->draw_min_x != ~0 && vc4->draw_min_y != ~0); - submit.min_x_tile = vc4->draw_min_x / vc4->tile_width; - submit.min_y_tile = vc4->draw_min_y / vc4->tile_height; - submit.max_x_tile = (vc4->draw_max_x - 1) / vc4->tile_width; - submit.max_y_tile = (vc4->draw_max_y - 1) / vc4->tile_height; - submit.width = vc4->draw_width; - submit.height = vc4->draw_height; - if (vc4->cleared) { + submit.bo_handles = (uintptr_t)job->bo_handles.base; + submit.bo_handle_count = cl_offset(&job->bo_handles) / 4; + submit.bin_cl = (uintptr_t)job->bcl.base; + submit.bin_cl_size = cl_offset(&job->bcl); + submit.shader_rec = (uintptr_t)job->shader_rec.base; + submit.shader_rec_size = cl_offset(&job->shader_rec); + submit.shader_rec_count = job->shader_rec_count; + submit.uniforms = (uintptr_t)job->uniforms.base; + submit.uniforms_size = cl_offset(&job->uniforms); + + assert(job->draw_min_x != ~0 && job->draw_min_y != ~0); + submit.min_x_tile = job->draw_min_x / job->tile_width; + submit.min_y_tile = job->draw_min_y / job->tile_height; + submit.max_x_tile = (job->draw_max_x - 1) / job->tile_width; + submit.max_y_tile = (job->draw_max_y - 1) / job->tile_height; + submit.width = job->draw_width; + submit.height = job->draw_height; + if (job->cleared) { submit.flags |= VC4_SUBMIT_CL_USE_CLEAR_COLOR; - submit.clear_color[0] = vc4->clear_color[0]; - submit.clear_color[1] = vc4->clear_color[1]; - submit.clear_z = vc4->clear_depth; - submit.clear_s = vc4->clear_stencil; + submit.clear_color[0] = job->clear_color[0]; + submit.clear_color[1] = job->clear_color[1]; + submit.clear_z = job->clear_depth; + submit.clear_s = job->clear_stencil; } if (!(vc4_debug & VC4_DEBUG_NORAST)) { @@ -238,7 +464,7 @@ #ifndef USE_VC4_SIMULATOR ret = drmIoctl(vc4->fd, DRM_IOCTL_VC4_SUBMIT_CL, &submit); #else - ret = vc4_simulator_flush(vc4, &submit); + ret = vc4_simulator_flush(vc4, &submit, job); #endif static bool warned = false; if (ret && !warned) { @@ -267,5 +493,30 @@ } } - vc4_job_reset(vc4); +done: + vc4_job_free(vc4, job); } + +static bool +vc4_job_compare(const void *a, const void *b) +{ + return memcmp(a, b, sizeof(struct vc4_job_key)) == 0; +} + +static uint32_t +vc4_job_hash(const void *key) +{ + return _mesa_hash_data(key, sizeof(struct vc4_job_key)); +} + +void +vc4_job_init(struct vc4_context *vc4) +{ + vc4->jobs = _mesa_hash_table_create(vc4, + vc4_job_hash, + vc4_job_compare); + vc4->write_jobs = _mesa_hash_table_create(vc4, + _mesa_hash_pointer, + _mesa_key_pointer_equal); +} + diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_nir_lower_blend.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_nir_lower_blend.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_nir_lower_blend.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_nir_lower_blend.c 2017-06-01 10:37:10.000000000 +0000 @@ -60,7 +60,7 @@ nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_input); load->num_components = 1; - load->const_index[0] = VC4_NIR_TLB_COLOR_READ_INPUT + sample; + nir_intrinsic_set_base(load, VC4_NIR_TLB_COLOR_READ_INPUT + sample); load->src[0] = nir_src_for_ssa(nir_imm_int(b, 0)); nir_ssa_dest_init(&load->instr, &load->dest, 1, 32, NULL); nir_builder_instr_insert(b, &load->instr); @@ -127,9 +127,12 @@ return nir_imm_float(b, 1.0); } case PIPE_BLENDFACTOR_CONST_COLOR: - return vc4_nir_get_state_uniform(b, QUNIFORM_BLEND_CONST_COLOR_X + channel); + return nir_load_system_value(b, + nir_intrinsic_load_blend_const_color_r_float + + channel, + 0); case PIPE_BLENDFACTOR_CONST_ALPHA: - return vc4_nir_get_state_uniform(b, QUNIFORM_BLEND_CONST_COLOR_W); + return nir_load_blend_const_color_a_float(b); case PIPE_BLENDFACTOR_ZERO: return nir_imm_float(b, 0.0); case PIPE_BLENDFACTOR_INV_SRC_COLOR: @@ -142,10 +145,13 @@ return nir_fsub(b, nir_imm_float(b, 1.0), dst[channel]); case PIPE_BLENDFACTOR_INV_CONST_COLOR: return nir_fsub(b, nir_imm_float(b, 1.0), - vc4_nir_get_state_uniform(b, QUNIFORM_BLEND_CONST_COLOR_X + channel)); + nir_load_system_value(b, + nir_intrinsic_load_blend_const_color_r_float + + channel, + 0)); case PIPE_BLENDFACTOR_INV_CONST_ALPHA: return nir_fsub(b, nir_imm_float(b, 1.0), - vc4_nir_get_state_uniform(b, QUNIFORM_BLEND_CONST_COLOR_W)); + nir_load_blend_const_color_a_float(b)); default: case PIPE_BLENDFACTOR_SRC1_COLOR: @@ -196,9 +202,9 @@ nir_imm_int(b, ~0), a_chan); case PIPE_BLENDFACTOR_CONST_COLOR: - return vc4_nir_get_state_uniform(b, QUNIFORM_BLEND_CONST_COLOR_RGBA); + return nir_load_blend_const_color_rgba8888_unorm(b); case PIPE_BLENDFACTOR_CONST_ALPHA: - return vc4_nir_get_state_uniform(b, QUNIFORM_BLEND_CONST_COLOR_AAAA); + return nir_load_blend_const_color_aaaa8888_unorm(b); case PIPE_BLENDFACTOR_ZERO: return nir_imm_int(b, 0); case PIPE_BLENDFACTOR_INV_SRC_COLOR: @@ -210,9 +216,11 @@ case PIPE_BLENDFACTOR_INV_DST_COLOR: return nir_inot(b, dst); case PIPE_BLENDFACTOR_INV_CONST_COLOR: - return nir_inot(b, vc4_nir_get_state_uniform(b, QUNIFORM_BLEND_CONST_COLOR_RGBA)); + return nir_inot(b, + nir_load_blend_const_color_rgba8888_unorm(b)); case PIPE_BLENDFACTOR_INV_CONST_ALPHA: - return nir_inot(b, vc4_nir_get_state_uniform(b, QUNIFORM_BLEND_CONST_COLOR_AAAA)); + return nir_inot(b, + nir_load_blend_const_color_aaaa8888_unorm(b)); default: case PIPE_BLENDFACTOR_SRC1_COLOR: @@ -475,11 +483,10 @@ if (!c->fs_key->alpha_test) return; - nir_ssa_def *alpha_ref = - vc4_nir_get_state_uniform(b, QUNIFORM_ALPHA_REF); nir_ssa_def *condition = vc4_nir_pipe_compare_func(b, c->fs_key->alpha_test_func, - alpha, alpha_ref); + alpha, + nir_load_alpha_ref_float(b)); nir_intrinsic_instr *discard = nir_intrinsic_instr_create(b->shader, @@ -487,6 +494,7 @@ discard->num_components = 1; discard->src[0] = nir_src_for_ssa(nir_inot(b, condition)); nir_builder_instr_insert(b, &discard->instr); + c->s->info->fs.uses_discard = true; } static nir_ssa_def * @@ -609,7 +617,7 @@ nir_intrinsic_instr *intr = nir_intrinsic_instr_create(c->s, nir_intrinsic_store_output); intr->num_components = 1; - intr->const_index[0] = sample_mask->data.driver_location; + nir_intrinsic_set_base(intr, sample_mask->data.driver_location); intr->src[0] = nir_src_for_ssa(val); intr->src[1] = nir_src_for_ssa(nir_imm_int(b, 0)); @@ -685,7 +693,8 @@ nir_variable *output_var = NULL; nir_foreach_variable(var, &c->s->outputs) { - if (var->data.driver_location == intr->const_index[0]) { + if (var->data.driver_location == + nir_intrinsic_base(intr)) { output_var = var; break; } diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_nir_lower_io.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_nir_lower_io.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_nir_lower_io.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_nir_lower_io.c 2017-06-01 10:37:10.000000000 +0000 @@ -26,26 +26,27 @@ #include "util/u_format.h" /** - * Walks the NIR generated by TGSI-to-NIR to lower its io intrinsics into - * something amenable to the VC4 architecture. + * Walks the NIR generated by TGSI-to-NIR or GLSL-to-NIR to lower its io + * intrinsics into something amenable to the VC4 architecture. * - * Currently, it split inputs, outputs, and uniforms into scalars, drops any + * Currently, it splits VS inputs and uniforms into scalars, drops any * non-position outputs in coordinate shaders, and fixes up the addressing on - * indirect uniform loads. + * indirect uniform loads. FS input and VS output scalarization is handled by + * nir_lower_io_to_scalar(). */ static void -replace_intrinsic_with_vec4(nir_builder *b, nir_intrinsic_instr *intr, - nir_ssa_def **comps) +replace_intrinsic_with_vec(nir_builder *b, nir_intrinsic_instr *intr, + nir_ssa_def **comps) { - /* Batch things back together into a vec4. This will get split by the - * later ALU scalarization pass. + /* Batch things back together into a vector. This will get split by + * the later ALU scalarization pass. */ - nir_ssa_def *vec = nir_vec4(b, comps[0], comps[1], comps[2], comps[3]); + nir_ssa_def *vec = nir_vec(b, comps, intr->num_components); /* Replace the old intrinsic with a reference to our reconstructed - * vec4. + * vector. */ nir_ssa_def_rewrite_uses(&intr->dest.ssa, nir_src_for_ssa(vec)); nir_instr_remove(&intr->instr); @@ -172,13 +173,10 @@ { b->cursor = nir_before_instr(&intr->instr); - int attr = intr->const_index[0]; + int attr = nir_intrinsic_base(intr); enum pipe_format format = c->vs_key->attr_formats[attr]; uint32_t attr_size = util_format_get_blocksize(format); - /* All TGSI-to-NIR inputs are vec4. */ - assert(intr->num_components == 4); - /* We only accept direct outputs and TGSI only ever gives them to us * with an offset value of 0. */ @@ -195,7 +193,8 @@ nir_intrinsic_instr_create(c->s, nir_intrinsic_load_input); intr_comp->num_components = 1; - intr_comp->const_index[0] = intr->const_index[0] * 4 + i; + nir_intrinsic_set_base(intr_comp, nir_intrinsic_base(intr)); + nir_intrinsic_set_component(intr_comp, i); intr_comp->src[0] = nir_src_for_ssa(nir_imm_int(b, 0)); nir_ssa_dest_init(&intr_comp->instr, &intr_comp->dest, 1, 32, NULL); nir_builder_instr_insert(b, &intr_comp->instr); @@ -208,7 +207,7 @@ util_format_description(format); nir_ssa_def *dests[4]; - for (int i = 0; i < 4; i++) { + for (int i = 0; i < intr->num_components; i++) { uint8_t swiz = desc->swizzle[i]; dests[i] = vc4_nir_get_vattr_channel_vpm(c, b, vpm_reads, swiz, desc); @@ -224,87 +223,78 @@ } } - replace_intrinsic_with_vec4(b, intr, dests); + replace_intrinsic_with_vec(b, intr, dests); +} + +static bool +is_point_sprite(struct vc4_compile *c, nir_variable *var) +{ + if (var->data.location < VARYING_SLOT_VAR0 || + var->data.location > VARYING_SLOT_VAR31) + return false; + + return (c->fs_key->point_sprite_mask & + (1 << (var->data.location - VARYING_SLOT_VAR0))); } static void vc4_nir_lower_fs_input(struct vc4_compile *c, nir_builder *b, nir_intrinsic_instr *intr) { - b->cursor = nir_before_instr(&intr->instr); + b->cursor = nir_after_instr(&intr->instr); - if (intr->const_index[0] >= VC4_NIR_TLB_COLOR_READ_INPUT && - intr->const_index[0] < (VC4_NIR_TLB_COLOR_READ_INPUT + - VC4_MAX_SAMPLES)) { + if (nir_intrinsic_base(intr) >= VC4_NIR_TLB_COLOR_READ_INPUT && + nir_intrinsic_base(intr) < (VC4_NIR_TLB_COLOR_READ_INPUT + + VC4_MAX_SAMPLES)) { /* This doesn't need any lowering. */ return; } nir_variable *input_var = NULL; nir_foreach_variable(var, &c->s->inputs) { - if (var->data.driver_location == intr->const_index[0]) { + if (var->data.driver_location == nir_intrinsic_base(intr)) { input_var = var; break; } } assert(input_var); - /* All TGSI-to-NIR inputs are vec4. */ - assert(intr->num_components == 4); - - /* We only accept direct inputs and TGSI only ever gives them to us - * with an offset value of 0. - */ - assert(nir_src_as_const_value(intr->src[0]) && - nir_src_as_const_value(intr->src[0])->u32[0] == 0); - - /* Generate scalar loads equivalent to the original VEC4. */ - nir_ssa_def *dests[4]; - for (unsigned i = 0; i < intr->num_components; i++) { - nir_intrinsic_instr *intr_comp = - nir_intrinsic_instr_create(c->s, nir_intrinsic_load_input); - intr_comp->num_components = 1; - intr_comp->const_index[0] = intr->const_index[0] * 4 + i; - intr_comp->src[0] = nir_src_for_ssa(nir_imm_int(b, 0)); + int comp = nir_intrinsic_component(intr); - nir_ssa_dest_init(&intr_comp->instr, &intr_comp->dest, 1, 32, NULL); - nir_builder_instr_insert(b, &intr_comp->instr); + /* Lower away point coordinates, and fix up PNTC. */ + if (is_point_sprite(c, input_var) || + input_var->data.location == VARYING_SLOT_PNTC) { + assert(intr->num_components == 1); + + nir_ssa_def *result = &intr->dest.ssa; + + switch (comp) { + case 0: + case 1: + /* If we're not rendering points, we need to set a + * defined value for the input that would come from + * PNTC. + */ + if (!c->fs_key->is_points) + result = nir_imm_float(b, 0.0); + break; + case 2: + result = nir_imm_float(b, 0.0); + break; + case 3: + result = nir_imm_float(b, 1.0); + break; + } - dests[i] = &intr_comp->dest.ssa; - } + if (c->fs_key->point_coord_upper_left && comp == 1) + result = nir_fsub(b, nir_imm_float(b, 1.0), result); - if (input_var->data.location == VARYING_SLOT_FACE) { - /* TGSI-to-NIR's front face. Convert to using the system - * value boolean instead. - */ - nir_ssa_def *face = - nir_load_system_value(b, - nir_intrinsic_load_front_face, - 0); - dests[0] = nir_bcsel(b, face, nir_imm_float(b, 1.0), - nir_imm_float(b, -1.0)); - dests[1] = nir_imm_float(b, 0.0); - dests[2] = nir_imm_float(b, 0.0); - dests[3] = nir_imm_float(b, 1.0); - } else if (input_var->data.location >= VARYING_SLOT_VAR0) { - if (c->fs_key->point_sprite_mask & - (1 << (input_var->data.location - - VARYING_SLOT_VAR0))) { - if (!c->fs_key->is_points) { - dests[0] = nir_imm_float(b, 0.0); - dests[1] = nir_imm_float(b, 0.0); - } - if (c->fs_key->point_coord_upper_left) { - dests[1] = nir_fsub(b, - nir_imm_float(b, 1.0), - dests[1]); - } - dests[2] = nir_imm_float(b, 0.0); - dests[3] = nir_imm_float(b, 1.0); + if (result != &intr->dest.ssa) { + nir_ssa_def_rewrite_uses_after(&intr->dest.ssa, + nir_src_for_ssa(result), + result->parent_instr); } } - - replace_intrinsic_with_vec4(b, intr, dests); } static void @@ -313,7 +303,7 @@ { nir_variable *output_var = NULL; nir_foreach_variable(var, &c->s->outputs) { - if (var->data.driver_location == intr->const_index[0]) { + if (var->data.driver_location == nir_intrinsic_base(intr)) { output_var = var; break; } @@ -326,57 +316,15 @@ nir_instr_remove(&intr->instr); return; } - - /* Color output is lowered by vc4_nir_lower_blend(). */ - if (c->stage == QSTAGE_FRAG && - (output_var->data.location == FRAG_RESULT_COLOR || - output_var->data.location == FRAG_RESULT_DATA0 || - output_var->data.location == FRAG_RESULT_SAMPLE_MASK)) { - intr->const_index[0] *= 4; - return; - } - - /* All TGSI-to-NIR outputs are VEC4. */ - assert(intr->num_components == 4); - - /* We only accept direct outputs and TGSI only ever gives them to us - * with an offset value of 0. - */ - assert(nir_src_as_const_value(intr->src[1]) && - nir_src_as_const_value(intr->src[1])->u32[0] == 0); - - b->cursor = nir_before_instr(&intr->instr); - - for (unsigned i = 0; i < intr->num_components; i++) { - nir_intrinsic_instr *intr_comp = - nir_intrinsic_instr_create(c->s, nir_intrinsic_store_output); - intr_comp->num_components = 1; - intr_comp->const_index[0] = intr->const_index[0] * 4 + i; - - assert(intr->src[0].is_ssa); - intr_comp->src[0] = - nir_src_for_ssa(nir_channel(b, intr->src[0].ssa, i)); - intr_comp->src[1] = nir_src_for_ssa(nir_imm_int(b, 0)); - nir_builder_instr_insert(b, &intr_comp->instr); - } - - nir_instr_remove(&intr->instr); } static void vc4_nir_lower_uniform(struct vc4_compile *c, nir_builder *b, nir_intrinsic_instr *intr) { - /* All TGSI-to-NIR uniform loads are vec4, but we need byte offsets - * in the backend. - */ - if (intr->num_components == 1) - return; - assert(intr->num_components == 4); - b->cursor = nir_before_instr(&intr->instr); - /* Generate scalar loads equivalent to the original VEC4. */ + /* Generate scalar loads equivalent to the original vector. */ nir_ssa_def *dests[4]; for (unsigned i = 0; i < intr->num_components; i++) { nir_intrinsic_instr *intr_comp = @@ -384,10 +332,13 @@ intr_comp->num_components = 1; nir_ssa_dest_init(&intr_comp->instr, &intr_comp->dest, 1, 32, NULL); - /* Convert the uniform offset to bytes. If it happens to be a - * constant, constant-folding will clean up the shift for us. + /* Convert the uniform offset to bytes. If it happens + * to be a constant, constant-folding will clean up + * the shift for us. */ - intr_comp->const_index[0] = (intr->const_index[0] * 16 + i * 4); + nir_intrinsic_set_base(intr_comp, + nir_intrinsic_base(intr) * 16 + + i * 4); intr_comp->src[0] = nir_src_for_ssa(nir_ishl(b, intr->src[0].ssa, @@ -398,7 +349,7 @@ nir_builder_instr_insert(b, &intr_comp->instr); } - replace_intrinsic_with_vec4(b, intr, dests); + replace_intrinsic_with_vec(b, intr, dests); } static void diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_opt_algebraic.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_opt_algebraic.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_opt_algebraic.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_opt_algebraic.c 2017-06-01 10:37:10.000000000 +0000 @@ -94,14 +94,17 @@ replace_with_mov(struct vc4_compile *c, struct qinst *inst, struct qreg arg) { dump_from(c, inst); + + inst->src[0] = arg; + if (qir_has_implicit_tex_uniform(inst)) + inst->src[1] = inst->src[qir_get_tex_uniform_src(inst)]; + if (qir_is_mul(inst)) inst->op = QOP_MMOV; else if (qir_is_float_input(inst)) inst->op = QOP_FMOV; else inst->op = QOP_MOV; - inst->src[0] = arg; - inst->src[1] = c->undef; dump_to(c, inst); } @@ -143,7 +146,7 @@ { bool progress = false; - list_for_each_entry(struct qinst, inst, &c->instructions, link) { + qir_for_each_inst_inorder(inst, c) { switch (inst->op) { case QOP_FMIN: if (is_1f(c, inst->src[1]) && @@ -172,8 +175,12 @@ break; case QOP_ADD: - if (replace_x_0_with_x(c, inst, 0) || - replace_x_0_with_x(c, inst, 1)) { + /* Kernel validation requires that we use an actual + * add instruction. + */ + if (inst->dst.file != QFILE_TEX_S_DIRECT && + (replace_x_0_with_x(c, inst, 0) || + replace_x_0_with_x(c, inst, 1))) { progress = true; break; } diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_opt_coalesce_ff_writes.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_opt_coalesce_ff_writes.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_opt_coalesce_ff_writes.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_opt_coalesce_ff_writes.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,107 @@ +/* + * Copyright © 2014 Broadcom + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +/** + * @file vc4_opt_coalesce_ff_writes.c + * + * This modifies instructions that generate the value consumed by a VPM or TMU + * coordinate write to write directly into the VPM or TMU. + */ + +#include "vc4_qir.h" + +bool +qir_opt_coalesce_ff_writes(struct vc4_compile *c) +{ + /* For now, only do this pass when we don't have control flow. */ + struct qblock *block = qir_entry_block(c); + if (block != qir_exit_block(c)) + return false; + + bool progress = false; + uint32_t use_count[c->num_temps]; + memset(&use_count, 0, sizeof(use_count)); + + qir_for_each_inst_inorder(inst, c) { + for (int i = 0; i < qir_get_nsrc(inst); i++) { + if (inst->src[i].file == QFILE_TEMP) { + uint32_t temp = inst->src[i].index; + use_count[temp]++; + } + } + } + + qir_for_each_inst_inorder(mov_inst, c) { + if (!qir_is_raw_mov(mov_inst) || mov_inst->sf) + continue; + if (mov_inst->src[0].file != QFILE_TEMP) + continue; + + if (!(mov_inst->dst.file == QFILE_VPM || qir_is_tex(mov_inst))) + continue; + + uint32_t temp = mov_inst->src[0].index; + if (use_count[temp] != 1) + continue; + + struct qinst *inst = c->defs[temp]; + if (!inst) + continue; + + /* Don't bother trying to fold in an ALU op using a uniform to + * a texture op, as we'll just have to lower the uniform back + * out. + */ + if (qir_is_tex(mov_inst) && qir_has_uniform_read(inst)) + continue; + + if (qir_depends_on_flags(inst) || inst->sf) + continue; + + if (qir_has_side_effects(c, inst) || + qir_has_side_effect_reads(c, inst) || + inst->op == QOP_VARY_ADD_C) { + continue; + } + + /* Move the generating instruction into the position of the FF + * write. + */ + c->defs[inst->dst.index] = NULL; + inst->dst.file = mov_inst->dst.file; + inst->dst.index = mov_inst->dst.index; + if (qir_has_implicit_tex_uniform(mov_inst)) { + inst->src[qir_get_tex_uniform_src(inst)] = + mov_inst->src[qir_get_tex_uniform_src(mov_inst)]; + } + + list_del(&inst->link); + list_addtail(&inst->link, &mov_inst->link); + + qir_remove_instruction(c, mov_inst); + + progress = true; + } + + return progress; +} diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_opt_constant_folding.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_opt_constant_folding.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_opt_constant_folding.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_opt_constant_folding.c 2017-06-01 10:37:10.000000000 +0000 @@ -58,7 +58,7 @@ static bool constant_fold(struct vc4_compile *c, struct qinst *inst) { - int nsrc = qir_get_op_nsrc(inst->op); + int nsrc = qir_get_nsrc(inst); uint32_t ui[nsrc]; for (int i = 0; i < nsrc; i++) { @@ -99,7 +99,7 @@ { bool progress = false; - list_for_each_entry(struct qinst, inst, &c->instructions, link) { + qir_for_each_inst_inorder(inst, c) { if (constant_fold(c, inst)) progress = true; } diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_opt_copy_propagation.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_opt_copy_propagation.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_opt_copy_propagation.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_opt_copy_propagation.c 2017-06-01 10:37:10.000000000 +0000 @@ -34,85 +34,168 @@ #include "vc4_qir.h" -bool -qir_opt_copy_propagation(struct vc4_compile *c) +static bool +is_copy_mov(struct qinst *inst) +{ + if (!inst) + return false; + + if (inst->op != QOP_MOV && + inst->op != QOP_FMOV && + inst->op != QOP_MMOV) { + return false; + } + + if (inst->dst.file != QFILE_TEMP) + return false; + + if (inst->src[0].file != QFILE_TEMP && + inst->src[0].file != QFILE_UNIF) { + return false; + } + + if (inst->dst.pack || inst->cond != QPU_COND_ALWAYS) + return false; + + return true; + +} + +static bool +try_copy_prop(struct vc4_compile *c, struct qinst *inst, struct qinst **movs) { - bool progress = false; bool debug = false; + bool progress = false; - list_for_each_entry(struct qinst, inst, &c->instructions, link) { - int nsrc = qir_get_op_nsrc(inst->op); - for (int i = 0; i < nsrc; i++) { - if (inst->src[i].file != QFILE_TEMP) + for (int i = 0; i < qir_get_nsrc(inst); i++) { + if (inst->src[i].file != QFILE_TEMP) + continue; + + /* We have two ways of finding MOVs we can copy propagate + * from. One is if it's an SSA def: then we can reuse it from + * any block in the program, as long as its source is also an + * SSA def. Alternatively, if it's in the "movs" array + * tracked within the block, then we know the sources for it + * haven't been changed since we saw the instruction within + * our block. + */ + struct qinst *mov = movs[inst->src[i].index]; + if (!mov) { + if (!is_copy_mov(c->defs[inst->src[i].index])) continue; + mov = c->defs[inst->src[i].index]; - struct qinst *mov = c->defs[inst->src[i].index]; - if (!mov || - (mov->op != QOP_MOV && - mov->op != QOP_FMOV && - mov->op != QOP_MMOV)) { + if (mov->src[0].file == QFILE_TEMP && + !c->defs[mov->src[0].index]) continue; - } + } - if (mov->src[0].file != QFILE_TEMP && - mov->src[0].file != QFILE_UNIF) { + /* Mul rotation's source needs to be in an r0-r3 accumulator, + * so no uniforms or regfile-a/r4 unpacking allowed. + */ + if (inst->op == QOP_ROT_MUL && + (mov->src[0].file != QFILE_TEMP || + mov->src[0].pack)) + continue; + + uint8_t unpack; + if (mov->src[0].pack) { + /* Make sure that the meaning of the unpack + * would be the same between the two + * instructions. + */ + if (qir_is_float_input(inst) != + qir_is_float_input(mov)) { continue; } - if (mov->dst.pack) + /* There's only one unpack field, so make sure + * this instruction doesn't already use it. + */ + bool already_has_unpack = false; + for (int j = 0; j < qir_get_nsrc(inst); j++) { + if (inst->src[j].pack) + already_has_unpack = true; + } + if (already_has_unpack) continue; - uint8_t unpack; - if (mov->src[0].pack) { - /* Make sure that the meaning of the unpack - * would be the same between the two - * instructions. - */ - if (qir_is_float_input(inst) != - qir_is_float_input(mov)) { - continue; - } - - /* There's only one unpack field, so make sure - * this instruction doesn't already use it. - */ - bool already_has_unpack = false; - for (int j = 0; j < nsrc; j++) { - if (inst->src[j].pack) - already_has_unpack = true; - } - if (already_has_unpack) - continue; - - /* A destination pack requires the PM bit to - * be set to a specific value already, which - * may be different from ours. - */ - if (inst->dst.pack) - continue; - - unpack = mov->src[0].pack; - } else { - unpack = inst->src[i].pack; - } + /* A destination pack requires the PM bit to + * be set to a specific value already, which + * may be different from ours. + */ + if (inst->dst.pack) + continue; - if (debug) { - fprintf(stderr, "Copy propagate: "); - qir_dump_inst(c, inst); - fprintf(stderr, "\n"); - } + unpack = mov->src[0].pack; + } else { + unpack = inst->src[i].pack; + } - inst->src[i] = mov->src[0]; - inst->src[i].pack = unpack; + if (debug) { + fprintf(stderr, "Copy propagate: "); + qir_dump_inst(c, inst); + fprintf(stderr, "\n"); + } - if (debug) { - fprintf(stderr, "to: "); - qir_dump_inst(c, inst); - fprintf(stderr, "\n"); - } + inst->src[i] = mov->src[0]; + inst->src[i].pack = unpack; - progress = true; + if (debug) { + fprintf(stderr, "to: "); + qir_dump_inst(c, inst); + fprintf(stderr, "\n"); + } + + progress = true; + } + + return progress; +} + +static void +apply_kills(struct vc4_compile *c, struct qinst **movs, struct qinst *inst) +{ + if (inst->dst.file != QFILE_TEMP) + return; + + for (int i = 0; i < c->num_temps; i++) { + if (movs[i] && + (movs[i]->dst.index == inst->dst.index || + (movs[i]->src[0].file == QFILE_TEMP && + movs[i]->src[0].index == inst->dst.index))) { + movs[i] = NULL; + } + } +} + +bool +qir_opt_copy_propagation(struct vc4_compile *c) +{ + bool progress = false; + struct qinst **movs; + + movs = ralloc_array(c, struct qinst *, c->num_temps); + if (!movs) + return false; + + qir_for_each_block(block, c) { + /* The MOVs array tracks only available movs within the + * block. + */ + memset(movs, 0, sizeof(struct qinst *) * c->num_temps); + + qir_for_each_inst(inst, block) { + progress = try_copy_prop(c, inst, movs) || progress; + + apply_kills(c, movs, inst); + + if (is_copy_mov(inst)) + movs[inst->dst.index] = inst; } } + + ralloc_free(movs); + return progress; } diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_opt_dead_code.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_opt_dead_code.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_opt_dead_code.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_opt_dead_code.c 2017-06-01 10:37:10.000000000 +0000 @@ -24,11 +24,15 @@ /** * @file vc4_opt_dead_code.c * - * This is a simmple dead code eliminator for QIR with no control flow. + * This is a simple dead code eliminator for SSA values in QIR. * - * It walks from the bottom of the instruction list, removing instructions - * with a destination that is never used, and marking the sources of non-dead - * instructions as used. + * It walks all the instructions finding what temps are used, then walks again + * to remove instructions writing unused temps. + * + * This is an inefficient implementation if you have long chains of + * instructions where the entire chain is dead, but we expect those to have + * been eliminated at the NIR level, and here we're just cleaning up small + * problems produced by NIR->QIR. */ #include "vc4_qir.h" @@ -50,7 +54,7 @@ static bool has_nonremovable_reads(struct vc4_compile *c, struct qinst *inst) { - for (int i = 0; i < qir_get_op_nsrc(inst->op); i++) { + for (int i = 0; i < qir_get_nsrc(inst); i++) { if (inst->src[i].file == QFILE_VPM) { uint32_t attr = inst->src[i].index / 4; uint32_t offset = (inst->src[i].index % 4) * 4; @@ -82,16 +86,50 @@ { bool progress = false; bool *used = calloc(c->num_temps, sizeof(bool)); - bool sf_used = false; - list_for_each_entry_safe_rev(struct qinst, inst, &c->instructions, - link) { - if (inst->dst.file == QFILE_TEMP && - !used[inst->dst.index] && - !inst->sf && - !qir_has_side_effects(c, inst) && - !has_nonremovable_reads(c, inst)) { - for (int i = 0; i < qir_get_op_nsrc(inst->op); i++) { + qir_for_each_inst_inorder(inst, c) { + for (int i = 0; i < qir_get_nsrc(inst); i++) { + if (inst->src[i].file == QFILE_TEMP) + used[inst->src[i].index] = true; + } + } + + qir_for_each_block(block, c) { + qir_for_each_inst_safe(inst, block) { + if (inst->dst.file != QFILE_NULL && + !(inst->dst.file == QFILE_TEMP && + !used[inst->dst.index])) { + continue; + } + + if (qir_has_side_effects(c, inst)) + continue; + + if (inst->sf || + has_nonremovable_reads(c, inst)) { + /* If we can't remove the instruction, but we + * don't need its destination value, just + * remove the destination. The register + * allocator would trivially color it and it + * wouldn't cause any register pressure, but + * it's nicer to read the QIR code without + * unused destination regs. + */ + if (inst->dst.file == QFILE_TEMP) { + if (debug) { + fprintf(stderr, + "Removing dst from: "); + qir_dump_inst(c, inst); + fprintf(stderr, "\n"); + } + c->defs[inst->dst.index] = NULL; + inst->dst.file = QFILE_NULL; + progress = true; + } + continue; + } + + for (int i = 0; i < qir_get_nsrc(inst); i++) { if (inst->src[i].file != QFILE_VPM) continue; uint32_t attr = inst->src[i].index / 4; @@ -107,27 +145,6 @@ progress = true; continue; } - - if (qir_depends_on_flags(inst)) - sf_used = true; - if (inst->sf) { - if (!sf_used) { - if (debug) { - fprintf(stderr, "Removing SF on: "); - qir_dump_inst(c, inst); - fprintf(stderr, "\n"); - } - - inst->sf = false; - progress = true; - } - sf_used = false; - } - - for (int i = 0; i < qir_get_op_nsrc(inst->op); i++) { - if (inst->src[i].file == QFILE_TEMP) - used[inst->src[i].index] = true; - } } free(used); diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_opt_peephole_sf.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_opt_peephole_sf.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_opt_peephole_sf.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_opt_peephole_sf.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,169 @@ +/* + * Copyright © 2016 Broadcom + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +/** + * @file vc4_opt_peephole_sf.c + * + * Quick optimization to eliminate unused or identical SF updates. + */ + +#include "vc4_qir.h" +#include "util/u_math.h" + +static bool debug; + +static void +dump_from(struct vc4_compile *c, struct qinst *inst, const char *type) +{ + if (!debug) + return; + + fprintf(stderr, "optimizing %s: ", type); + qir_dump_inst(c, inst); + fprintf(stderr, "\n"); +} + +static void +dump_to(struct vc4_compile *c, struct qinst *inst) +{ + if (!debug) + return; + + fprintf(stderr, "to: "); + qir_dump_inst(c, inst); + fprintf(stderr, "\n"); +} + +static bool +inst_srcs_updated(struct qinst *inst, struct qinst *writer) +{ + /* If the sources get overwritten, stop tracking the + * last instruction writing SF. + */ + switch (writer->dst.file) { + case QFILE_TEMP: + for (int i = 0; i < qir_get_nsrc(inst); i++) { + if (inst->src[i].file == QFILE_TEMP && + inst->src[i].index == writer->dst.index) { + return true; + } + } + return false; + default: + return false; + } +} + +static bool +src_file_varies_on_reread(struct qreg reg) +{ + switch (reg.file) { + case QFILE_VARY: + case QFILE_VPM: + return true; + default: + return false; + } +} + +static bool +inst_result_equals(struct qinst *a, struct qinst *b) +{ + if (a->op != b->op || + qir_depends_on_flags(a) || + qir_depends_on_flags(b)) { + return false; + } + + for (int i = 0; i < qir_get_nsrc(a); i++) { + if (!qir_reg_equals(a->src[i], b->src[i]) || + src_file_varies_on_reread(a->src[i]) || + src_file_varies_on_reread(b->src[i])) { + return false; + } + } + + return true; +} + +static bool +qir_opt_peephole_sf_block(struct vc4_compile *c, struct qblock *block) +{ + bool progress = false; + /* We don't have liveness dataflow analysis for flags, but we also + * never generate a use of flags across control flow, so just treat + * them as unused at block exit. + */ + bool sf_live = false; + struct qinst *last_sf = NULL; + + /* Walk the block from bottom to top, tracking if the SF is used, and + * removing unused or repeated ones. + */ + qir_for_each_inst_rev(inst, block) { + if (inst->sf) { + if (!sf_live) { + /* Our instruction's SF isn't read, so drop it. + */ + dump_from(c, inst, "dead SF"); + inst->sf = false; + dump_to(c, inst); + progress = true; + } else if (last_sf && + inst_result_equals(last_sf, inst)) { + /* The last_sf sets up same value as inst, so + * just drop the later one. + */ + dump_from(c, last_sf, "repeated SF"); + last_sf->sf = false; + dump_to(c, last_sf); + progress = true; + last_sf = inst; + } else { + last_sf = inst; + } + sf_live = false; + } + + if (last_sf) { + if (inst_srcs_updated(last_sf, inst)) + last_sf = NULL; + } + + if (qir_depends_on_flags(inst)) + sf_live = true; + } + + return progress; +} + +bool +qir_opt_peephole_sf(struct vc4_compile *c) +{ + bool progress = false; + + qir_for_each_block(block, c) + progress = qir_opt_peephole_sf_block(c, block) || progress; + + return progress; +} diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_opt_small_immediates.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_opt_small_immediates.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_opt_small_immediates.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_opt_small_immediates.c 2017-06-01 10:37:10.000000000 +0000 @@ -38,21 +38,32 @@ { bool progress = false; - list_for_each_entry(struct qinst, inst, &c->instructions, link) { + qir_for_each_inst_inorder(inst, c) { /* The small immediate value sits in the raddr B field, so we * can't have 2 small immediates in one instruction (unless * they're the same value, but that should be optimized away * elsewhere). */ bool uses_small_imm = false; - for (int i = 0; i < qir_get_op_nsrc(inst->op); i++) { + for (int i = 0; i < qir_get_nsrc(inst); i++) { if (inst->src[i].file == QFILE_SMALL_IMM) uses_small_imm = true; } if (uses_small_imm) continue; - for (int i = 0; i < qir_get_op_nsrc(inst->op); i++) { + /* Don't propagate small immediates into the top-end bounds + * checking for indirect UBO loads. The kernel doesn't parse + * small immediates and rejects the shader in this case. UBO + * loads are much more expensive than the uniform load, and + * indirect UBO regions are usually much larger than a small + * immediate, so it's not worth updating the kernel to allow + * optimizing it. + */ + if (inst->op == QOP_MIN_NOIMM) + continue; + + for (int i = 0; i < qir_get_nsrc(inst); i++) { struct qreg src = qir_follow_movs(c, inst->src[i]); if (src.file != QFILE_UNIF || @@ -62,11 +73,8 @@ continue; } - if (i == 1 && - (inst->op == QOP_TEX_S || - inst->op == QOP_TEX_T || - inst->op == QOP_TEX_R || - inst->op == QOP_TEX_B)) { + if (qir_is_tex(inst) && + i == qir_get_tex_uniform_src(inst)) { /* No turning the implicit uniform read into * an immediate. */ diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_opt_vpm.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_opt_vpm.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_opt_vpm.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_opt_vpm.c 2017-06-01 10:37:10.000000000 +0000 @@ -24,10 +24,8 @@ /** * @file vc4_opt_vpm.c * - * This modifies instructions that: - * 1. exclusively consume a value read from the VPM to directly read the VPM if - * other operands allow it. - * 2. generate the value consumed by a VPM write to write directly into the VPM. + * This modifies instructions that exclusively consume a value read from the + * VPM to directly read the VPM if other operands allow it. */ #include "vc4_qir.h" @@ -38,22 +36,17 @@ if (c->stage == QSTAGE_FRAG) return false; + /* For now, only do this pass when we don't have control flow. */ + struct qblock *block = qir_entry_block(c); + if (block != qir_exit_block(c)) + return false; + bool progress = false; - struct qinst *vpm_writes[64] = { 0 }; uint32_t use_count[c->num_temps]; - uint32_t vpm_write_count = 0; memset(&use_count, 0, sizeof(use_count)); - list_for_each_entry(struct qinst, inst, &c->instructions, link) { - switch (inst->dst.file) { - case QFILE_VPM: - vpm_writes[vpm_write_count++] = inst; - break; - default: - break; - } - - for (int i = 0; i < qir_get_op_nsrc(inst->op); i++) { + qir_for_each_inst_inorder(inst, c) { + for (int i = 0; i < qir_get_nsrc(inst); i++) { if (inst->src[i].file == QFILE_TEMP) { uint32_t temp = inst->src[i].index; use_count[temp]++; @@ -64,7 +57,7 @@ /* For instructions reading from a temporary that contains a VPM read * result, try to move the instruction up in place of the VPM read. */ - list_for_each_entry(struct qinst, inst, &c->instructions, link) { + qir_for_each_inst_inorder(inst, c) { if (!inst) continue; @@ -76,7 +69,7 @@ qir_is_tex(inst)) continue; - for (int j = 0; j < qir_get_op_nsrc(inst->op); j++) { + for (int j = 0; j < qir_get_nsrc(inst); j++) { if (inst->src[j].file != QFILE_TEMP || inst->src[j].pack) continue; @@ -101,7 +94,7 @@ } uint32_t temps = 0; - for (int k = 0; k < qir_get_op_nsrc(inst->op); k++) { + for (int k = 0; k < qir_get_nsrc(inst); k++) { if (inst->src[k].file == QFILE_TEMP) temps++; } @@ -122,42 +115,5 @@ } } - for (int i = 0; i < vpm_write_count; i++) { - if (!qir_is_raw_mov(vpm_writes[i]) || - vpm_writes[i]->src[0].file != QFILE_TEMP) { - continue; - } - - uint32_t temp = vpm_writes[i]->src[0].index; - if (use_count[temp] != 1) - continue; - - struct qinst *inst = c->defs[temp]; - if (!inst) - continue; - - if (qir_depends_on_flags(inst) || inst->sf) - continue; - - if (qir_has_side_effects(c, inst) || - qir_has_side_effect_reads(c, inst)) { - continue; - } - - /* Move the generating instruction to the end of the program - * to maintain the order of the VPM writes. - */ - assert(!vpm_writes[i]->sf); - list_del(&inst->link); - list_addtail(&inst->link, &vpm_writes[i]->link); - qir_remove_instruction(c, vpm_writes[i]); - - c->defs[inst->dst.index] = NULL; - inst->dst.file = QFILE_VPM; - inst->dst.index = 0; - - progress = true; - } - return progress; } diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_program.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_program.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_program.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_program.c 2017-06-01 10:37:10.000000000 +0000 @@ -24,7 +24,7 @@ #include #include "util/u_format.h" -#include "util/u_hash.h" +#include "util/crc32.h" #include "util/u_math.h" #include "util/u_memory.h" #include "util/ralloc.h" @@ -37,12 +37,12 @@ #include "vc4_context.h" #include "vc4_qpu.h" #include "vc4_qir.h" -#ifdef USE_VC4_SIMULATOR -#include "simpenrose/simpenrose.h" -#endif +#include "mesa/state_tracker/st_glsl_types.h" static struct qreg ntq_get_src(struct vc4_compile *c, nir_src src, int i); +static void +ntq_emit_cf_list(struct vc4_compile *c, struct exec_list *list); static void resize_qreg_array(struct vc4_compile *c, @@ -65,11 +65,28 @@ (*regs)[i] = c->undef; } +static void +ntq_emit_thrsw(struct vc4_compile *c) +{ + if (!c->fs_threaded) + return; + + /* Always thread switch after each texture operation for now. + * + * We could do better by batching a bunch of texture fetches up and + * then doing one thread switch and collecting all their results + * afterward. + */ + qir_emit_nondef(c, qir_inst(QOP_THRSW, c->undef, + c->undef, c->undef)); + c->last_thrsw_at_top_level = (c->execute.file == QFILE_NULL); +} + static struct qreg indirect_uniform_load(struct vc4_compile *c, nir_intrinsic_instr *intr) { struct qreg indirect_offset = ntq_get_src(c, intr->src[0], 0); - uint32_t offset = intr->const_index[0]; + uint32_t offset = nir_intrinsic_base(intr); struct vc4_compiler_ubo_range *range = NULL; unsigned i; for (i = 0; i < c->num_uniform_ranges; i++) { @@ -99,27 +116,19 @@ /* Clamp to [0, array size). Note that MIN/MAX are signed. */ indirect_offset = qir_MAX(c, indirect_offset, qir_uniform_ui(c, 0)); - indirect_offset = qir_MIN(c, indirect_offset, - qir_uniform_ui(c, (range->dst_offset + - range->size - 4))); + indirect_offset = qir_MIN_NOIMM(c, indirect_offset, + qir_uniform_ui(c, (range->dst_offset + + range->size - 4))); + + qir_ADD_dest(c, qir_reg(QFILE_TEX_S_DIRECT, 0), + indirect_offset, + qir_uniform(c, QUNIFORM_UBO_ADDR, 0)); - qir_TEX_DIRECT(c, indirect_offset, qir_uniform(c, QUNIFORM_UBO_ADDR, 0)); c->num_texture_samples++; - return qir_TEX_RESULT(c); -} -nir_ssa_def *vc4_nir_get_state_uniform(struct nir_builder *b, - enum quniform_contents contents) -{ - nir_intrinsic_instr *intr = - nir_intrinsic_instr_create(b->shader, - nir_intrinsic_load_uniform); - intr->const_index[0] = (VC4_NIR_STATE_UNIFORM_OFFSET + contents) * 4; - intr->num_components = 1; - intr->src[0] = nir_src_for_ssa(nir_imm_int(b, 0)); - nir_ssa_dest_init(&intr->instr, &intr->dest, 1, 32, NULL); - nir_builder_instr_insert(b, &intr->instr); - return &intr->dest.ssa; + ntq_emit_thrsw(c); + + return qir_TEX_RESULT(c); } nir_ssa_def * @@ -151,6 +160,86 @@ return qregs; } +/** + * This function is responsible for getting QIR results into the associated + * storage for a NIR instruction. + * + * If it's a NIR SSA def, then we just set the associated hash table entry to + * the new result. + * + * If it's a NIR reg, then we need to update the existing qreg assigned to the + * NIR destination with the incoming value. To do that without introducing + * new MOVs, we require that the incoming qreg either be a uniform, or be + * SSA-defined by the previous QIR instruction in the block and rewritable by + * this function. That lets us sneak ahead and insert the SF flag beforehand + * (knowing that the previous instruction doesn't depend on flags) and rewrite + * its destination to be the NIR reg's destination + */ +static void +ntq_store_dest(struct vc4_compile *c, nir_dest *dest, int chan, + struct qreg result) +{ + struct qinst *last_inst = NULL; + if (!list_empty(&c->cur_block->instructions)) + last_inst = (struct qinst *)c->cur_block->instructions.prev; + + assert(result.file == QFILE_UNIF || + (result.file == QFILE_TEMP && + last_inst && last_inst == c->defs[result.index])); + + if (dest->is_ssa) { + assert(chan < dest->ssa.num_components); + + struct qreg *qregs; + struct hash_entry *entry = + _mesa_hash_table_search(c->def_ht, &dest->ssa); + + if (entry) + qregs = entry->data; + else + qregs = ntq_init_ssa_def(c, &dest->ssa); + + qregs[chan] = result; + } else { + nir_register *reg = dest->reg.reg; + assert(dest->reg.base_offset == 0); + assert(reg->num_array_elems == 0); + struct hash_entry *entry = + _mesa_hash_table_search(c->def_ht, reg); + struct qreg *qregs = entry->data; + + /* Insert a MOV if the source wasn't an SSA def in the + * previous instruction. + */ + if (result.file == QFILE_UNIF) { + result = qir_MOV(c, result); + last_inst = c->defs[result.index]; + } + + /* We know they're both temps, so just rewrite index. */ + c->defs[last_inst->dst.index] = NULL; + last_inst->dst.index = qregs[chan].index; + + /* If we're in control flow, then make this update of the reg + * conditional on the execution mask. + */ + if (c->execute.file != QFILE_NULL) { + last_inst->dst.index = qregs[chan].index; + + /* Set the flags to the current exec mask. To insert + * the SF, we temporarily remove our SSA instruction. + */ + list_del(&last_inst->link); + qir_SF(c, c->execute); + list_addtail(&last_inst->link, + &c->cur_block->instructions); + + last_inst->cond = QPU_COND_ZS; + last_inst->cond_is_exec_mask = true; + } + } +} + static struct qreg * ntq_get_dest(struct vc4_compile *c, nir_dest *dest) { @@ -293,22 +382,25 @@ /* Perform the clamping required by kernel validation. */ addr = qir_MAX(c, addr, qir_uniform_ui(c, 0)); - addr = qir_MIN(c, addr, qir_uniform_ui(c, size - 4)); + addr = qir_MIN_NOIMM(c, addr, qir_uniform_ui(c, size - 4)); - qir_TEX_DIRECT(c, addr, qir_uniform(c, QUNIFORM_TEXTURE_MSAA_ADDR, unit)); + qir_ADD_dest(c, qir_reg(QFILE_TEX_S_DIRECT, 0), + addr, qir_uniform(c, QUNIFORM_TEXTURE_MSAA_ADDR, unit)); + + ntq_emit_thrsw(c); struct qreg tex = qir_TEX_RESULT(c); c->num_texture_samples++; - struct qreg *dest = ntq_get_dest(c, &instr->dest); enum pipe_format format = c->key->tex[unit].format; if (util_format_is_depth_or_stencil(format)) { struct qreg scaled = ntq_scale_depth_texture(c, tex); for (int i = 0; i < 4; i++) - dest[i] = scaled; + ntq_store_dest(c, &instr->dest, i, qir_MOV(c, scaled)); } else { for (int i = 0; i < 4; i++) - dest[i] = qir_UNPACK_8_F(c, tex, i); + ntq_store_dest(c, &instr->dest, i, + qir_UNPACK_8_F(c, tex, i)); } } @@ -343,7 +435,7 @@ lod = ntq_get_src(c, instr->src[i].src, 0); is_txl = true; break; - case nir_tex_src_comparitor: + case nir_tex_src_comparator: compare = ntq_get_src(c, instr->src[i].src, 0); break; default: @@ -351,6 +443,22 @@ } } + if (c->stage != QSTAGE_FRAG && !is_txl) { + /* From the GLSL 1.20 spec: + * + * "If it is mip-mapped and running on the vertex shader, + * then the base texture is used." + */ + is_txl = true; + lod = qir_uniform_ui(c, 0); + } + + if (c->key->tex[unit].force_first_level) { + lod = qir_uniform(c, QUNIFORM_TEXTURE_FIRST_LEVEL, unit); + is_txl = true; + is_txb = false; + } + struct qreg texture_u[] = { qir_uniform(c, QUNIFORM_TEXTURE_CONFIG_P0, unit), qir_uniform(c, QUNIFORM_TEXTURE_CONFIG_P1, unit), @@ -375,14 +483,20 @@ unit | (is_txl << 16)); } + struct qinst *tmu; if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) { - qir_TEX_R(c, r, texture_u[next_texture_u++]); + tmu = qir_MOV_dest(c, qir_reg(QFILE_TEX_R, 0), r); + tmu->src[qir_get_tex_uniform_src(tmu)] = + texture_u[next_texture_u++]; } else if (c->key->tex[unit].wrap_s == PIPE_TEX_WRAP_CLAMP_TO_BORDER || c->key->tex[unit].wrap_s == PIPE_TEX_WRAP_CLAMP || c->key->tex[unit].wrap_t == PIPE_TEX_WRAP_CLAMP_TO_BORDER || c->key->tex[unit].wrap_t == PIPE_TEX_WRAP_CLAMP) { - qir_TEX_R(c, qir_uniform(c, QUNIFORM_TEXTURE_BORDER_COLOR, unit), - texture_u[next_texture_u++]); + tmu = qir_MOV_dest(c, qir_reg(QFILE_TEX_R, 0), + qir_uniform(c, QUNIFORM_TEXTURE_BORDER_COLOR, + unit)); + tmu->src[qir_get_tex_uniform_src(tmu)] = + texture_u[next_texture_u++]; } if (c->key->tex[unit].wrap_s == PIPE_TEX_WRAP_CLAMP) { @@ -393,14 +507,23 @@ t = qir_SAT(c, t); } - qir_TEX_T(c, t, texture_u[next_texture_u++]); - - if (is_txl || is_txb) - qir_TEX_B(c, lod, texture_u[next_texture_u++]); + tmu = qir_MOV_dest(c, qir_reg(QFILE_TEX_T, 0), t); + tmu->src[qir_get_tex_uniform_src(tmu)] = + texture_u[next_texture_u++]; + + if (is_txl || is_txb) { + tmu = qir_MOV_dest(c, qir_reg(QFILE_TEX_B, 0), lod); + tmu->src[qir_get_tex_uniform_src(tmu)] = + texture_u[next_texture_u++]; + } - qir_TEX_S(c, s, texture_u[next_texture_u++]); + tmu = qir_MOV_dest(c, qir_reg(QFILE_TEX_S, 0), s); + tmu->src[qir_get_tex_uniform_src(tmu)] = texture_u[next_texture_u++]; c->num_texture_samples++; + + ntq_emit_thrsw(c); + struct qreg tex = qir_TEX_RESULT(c); enum pipe_format format = c->key->tex[unit].format; @@ -413,6 +536,15 @@ struct qreg u0 = qir_uniform_f(c, 0.0f); struct qreg u1 = qir_uniform_f(c, 1.0f); if (c->key->tex[unit].compare_mode) { + /* From the GL_ARB_shadow spec: + * + * "Let Dt (D subscript t) be the depth texture + * value, in the range [0, 1]. Let R be the + * interpolated texture coordinate clamped to the + * range [0, 1]." + */ + compare = qir_SAT(c, compare); + switch (c->key->tex[unit].compare_func) { case PIPE_FUNC_NEVER: depth_output = qir_uniform_f(c, 0.0f); @@ -467,8 +599,9 @@ struct qreg trunc = qir_ITOF(c, qir_FTOI(c, src)); struct qreg diff = qir_FSUB(c, src, trunc); qir_SF(c, diff); - return qir_SEL(c, QPU_COND_NS, - qir_FADD(c, diff, qir_uniform_f(c, 1.0)), diff); + return qir_MOV(c, qir_SEL(c, QPU_COND_NS, + qir_FADD(c, diff, qir_uniform_f(c, 1.0)), + diff)); } /** @@ -485,8 +618,9 @@ */ qir_SF(c, qir_FSUB(c, src, trunc)); - return qir_SEL(c, QPU_COND_NS, - qir_FSUB(c, trunc, qir_uniform_f(c, 1.0)), trunc); + return qir_MOV(c, qir_SEL(c, QPU_COND_NS, + qir_FSUB(c, trunc, qir_uniform_f(c, 1.0)), + trunc)); } /** @@ -503,8 +637,9 @@ */ qir_SF(c, qir_FSUB(c, trunc, src)); - return qir_SEL(c, QPU_COND_NS, - qir_FADD(c, trunc, qir_uniform_f(c, 1.0)), trunc); + return qir_MOV(c, qir_SEL(c, QPU_COND_NS, + qir_FADD(c, trunc, qir_uniform_f(c, 1.0)), + trunc)); } static struct qreg @@ -585,7 +720,7 @@ qir_MOV_dest(c, t, qir_uniform_f(c, 0.0)); qir_MOV_dest(c, t, qir_uniform_f(c, 1.0))->cond = QPU_COND_ZC; qir_MOV_dest(c, t, qir_uniform_f(c, -1.0))->cond = QPU_COND_NS; - return t; + return qir_MOV(c, t); } static void @@ -731,10 +866,10 @@ if (instr->src[0].swizzle[0] == instr->src[0].swizzle[1] && instr->src[0].swizzle[0] == instr->src[0].swizzle[2] && instr->src[0].swizzle[0] == instr->src[0].swizzle[3]) { - struct qreg *dest = ntq_get_dest(c, &instr->dest.dest); - *dest = qir_PACK_8888_F(c, - ntq_get_src(c, instr->src[0].src, - instr->src[0].swizzle[0])); + struct qreg rep = ntq_get_src(c, + instr->src[0].src, + instr->src[0].swizzle[0]); + ntq_store_dest(c, &instr->dest.dest, 0, qir_PACK_8888_F(c, rep)); return; } @@ -764,8 +899,7 @@ qir_PACK_8_F(c, result, src, i); } - struct qreg *dest = ntq_get_dest(c, &instr->dest.dest); - *dest = result; + ntq_store_dest(c, &instr->dest.dest, 0, qir_MOV(c, result)); } /** Handles sign-extended bitfield extracts for 16 bits. */ @@ -871,6 +1005,9 @@ break; } + /* Make the temporary for nir_store_dest(). */ + *dest = qir_MOV(c, *dest); + return true; } @@ -884,6 +1021,8 @@ { if (!instr->src[0].src.is_ssa) goto out; + if (instr->src[0].src.ssa->parent_instr->type != nir_instr_type_alu) + goto out; nir_alu_instr *compare = nir_instr_as_alu(instr->src[0].src.ssa->parent_instr); if (!compare) @@ -895,12 +1034,55 @@ out: qir_SF(c, src[0]); - return qir_SEL(c, QPU_COND_NS, src[1], src[2]); + return qir_MOV(c, qir_SEL(c, QPU_COND_NS, src[1], src[2])); +} + +static struct qreg +ntq_fddx(struct vc4_compile *c, struct qreg src) +{ + /* Make sure that we have a bare temp to use for MUL rotation, so it + * can be allocated to an accumulator. + */ + if (src.pack || src.file != QFILE_TEMP) + src = qir_MOV(c, src); + + struct qreg from_left = qir_ROT_MUL(c, src, 1); + struct qreg from_right = qir_ROT_MUL(c, src, 15); + + /* Distinguish left/right pixels of the quad. */ + qir_SF(c, qir_AND(c, qir_reg(QFILE_QPU_ELEMENT, 0), + qir_uniform_ui(c, 1))); + + return qir_MOV(c, qir_SEL(c, QPU_COND_ZS, + qir_FSUB(c, from_right, src), + qir_FSUB(c, src, from_left))); +} + +static struct qreg +ntq_fddy(struct vc4_compile *c, struct qreg src) +{ + if (src.pack || src.file != QFILE_TEMP) + src = qir_MOV(c, src); + + struct qreg from_bottom = qir_ROT_MUL(c, src, 2); + struct qreg from_top = qir_ROT_MUL(c, src, 14); + + /* Distinguish top/bottom pixels of the quad. */ + qir_SF(c, qir_AND(c, + qir_reg(QFILE_QPU_ELEMENT, 0), + qir_uniform_ui(c, 2))); + + return qir_MOV(c, qir_SEL(c, QPU_COND_ZS, + qir_FSUB(c, from_top, src), + qir_FSUB(c, src, from_bottom))); } static void ntq_emit_alu(struct vc4_compile *c, nir_alu_instr *instr) { + /* This should always be lowered to ALU operations for VC4. */ + assert(!instr->dest.saturate); + /* Vectors are special in that they have non-scalarized writemasks, * and just take the first swizzle channel for each argument in order * into each writemask channel. @@ -912,9 +1094,9 @@ for (int i = 0; i < nir_op_infos[instr->op].num_inputs; i++) srcs[i] = ntq_get_src(c, instr->src[i].src, instr->src[i].swizzle[0]); - struct qreg *dest = ntq_get_dest(c, &instr->dest.dest); for (int i = 0; i < nir_op_infos[instr->op].num_inputs; i++) - dest[i] = srcs[i]; + ntq_store_dest(c, &instr->dest.dest, i, + qir_MOV(c, srcs[i])); return; } @@ -926,10 +1108,10 @@ if (instr->op == nir_op_unpack_unorm_4x8) { struct qreg src = ntq_get_src(c, instr->src[0].src, instr->src[0].swizzle[0]); - struct qreg *dest = ntq_get_dest(c, &instr->dest.dest); for (int i = 0; i < 4; i++) { if (instr->dest.write_mask & (1 << i)) - dest[i] = qir_UNPACK_8_F(c, src, i); + ntq_store_dest(c, &instr->dest.dest, i, + qir_UNPACK_8_F(c, src, i)); } return; } @@ -940,91 +1122,87 @@ src[i] = ntq_get_alu_src(c, instr, i); } - /* Pick the channel to store the output in. */ - assert(!instr->dest.saturate); - struct qreg *dest = ntq_get_dest(c, &instr->dest.dest); - assert(util_is_power_of_two(instr->dest.write_mask)); - dest += ffs(instr->dest.write_mask) - 1; + struct qreg result; switch (instr->op) { case nir_op_fmov: case nir_op_imov: - *dest = qir_MOV(c, src[0]); + result = qir_MOV(c, src[0]); break; case nir_op_fmul: - *dest = qir_FMUL(c, src[0], src[1]); + result = qir_FMUL(c, src[0], src[1]); break; case nir_op_fadd: - *dest = qir_FADD(c, src[0], src[1]); + result = qir_FADD(c, src[0], src[1]); break; case nir_op_fsub: - *dest = qir_FSUB(c, src[0], src[1]); + result = qir_FSUB(c, src[0], src[1]); break; case nir_op_fmin: - *dest = qir_FMIN(c, src[0], src[1]); + result = qir_FMIN(c, src[0], src[1]); break; case nir_op_fmax: - *dest = qir_FMAX(c, src[0], src[1]); + result = qir_FMAX(c, src[0], src[1]); break; case nir_op_f2i: case nir_op_f2u: - *dest = qir_FTOI(c, src[0]); + result = qir_FTOI(c, src[0]); break; case nir_op_i2f: case nir_op_u2f: - *dest = qir_ITOF(c, src[0]); + result = qir_ITOF(c, src[0]); break; case nir_op_b2f: - *dest = qir_AND(c, src[0], qir_uniform_f(c, 1.0)); + result = qir_AND(c, src[0], qir_uniform_f(c, 1.0)); break; case nir_op_b2i: - *dest = qir_AND(c, src[0], qir_uniform_ui(c, 1)); + result = qir_AND(c, src[0], qir_uniform_ui(c, 1)); break; case nir_op_i2b: case nir_op_f2b: qir_SF(c, src[0]); - *dest = qir_SEL(c, QPU_COND_ZC, - qir_uniform_ui(c, ~0), - qir_uniform_ui(c, 0)); + result = qir_MOV(c, qir_SEL(c, QPU_COND_ZC, + qir_uniform_ui(c, ~0), + qir_uniform_ui(c, 0))); break; case nir_op_iadd: - *dest = qir_ADD(c, src[0], src[1]); + result = qir_ADD(c, src[0], src[1]); break; case nir_op_ushr: - *dest = qir_SHR(c, src[0], src[1]); + result = qir_SHR(c, src[0], src[1]); break; case nir_op_isub: - *dest = qir_SUB(c, src[0], src[1]); + result = qir_SUB(c, src[0], src[1]); break; case nir_op_ishr: - *dest = qir_ASR(c, src[0], src[1]); + result = qir_ASR(c, src[0], src[1]); break; case nir_op_ishl: - *dest = qir_SHL(c, src[0], src[1]); + result = qir_SHL(c, src[0], src[1]); break; case nir_op_imin: - *dest = qir_MIN(c, src[0], src[1]); + result = qir_MIN(c, src[0], src[1]); break; case nir_op_imax: - *dest = qir_MAX(c, src[0], src[1]); + result = qir_MAX(c, src[0], src[1]); break; case nir_op_iand: - *dest = qir_AND(c, src[0], src[1]); + result = qir_AND(c, src[0], src[1]); break; case nir_op_ior: - *dest = qir_OR(c, src[0], src[1]); + result = qir_OR(c, src[0], src[1]); break; case nir_op_ixor: - *dest = qir_XOR(c, src[0], src[1]); + result = qir_XOR(c, src[0], src[1]); break; case nir_op_inot: - *dest = qir_NOT(c, src[0]); + result = qir_NOT(c, src[0]); break; case nir_op_imul: - *dest = ntq_umul(c, src[0], src[1]); + result = ntq_umul(c, src[0], src[1]); break; case nir_op_seq: @@ -1040,90 +1218,102 @@ case nir_op_ige: case nir_op_uge: case nir_op_ilt: - if (!ntq_emit_comparison(c, dest, instr, instr)) { + if (!ntq_emit_comparison(c, &result, instr, instr)) { fprintf(stderr, "Bad comparison instruction\n"); } break; case nir_op_bcsel: - *dest = ntq_emit_bcsel(c, instr, src); + result = ntq_emit_bcsel(c, instr, src); break; case nir_op_fcsel: qir_SF(c, src[0]); - *dest = qir_SEL(c, QPU_COND_ZC, src[1], src[2]); + result = qir_MOV(c, qir_SEL(c, QPU_COND_ZC, src[1], src[2])); break; case nir_op_frcp: - *dest = ntq_rcp(c, src[0]); + result = ntq_rcp(c, src[0]); break; case nir_op_frsq: - *dest = ntq_rsq(c, src[0]); + result = ntq_rsq(c, src[0]); break; case nir_op_fexp2: - *dest = qir_EXP2(c, src[0]); + result = qir_EXP2(c, src[0]); break; case nir_op_flog2: - *dest = qir_LOG2(c, src[0]); + result = qir_LOG2(c, src[0]); break; case nir_op_ftrunc: - *dest = qir_ITOF(c, qir_FTOI(c, src[0])); + result = qir_ITOF(c, qir_FTOI(c, src[0])); break; case nir_op_fceil: - *dest = ntq_fceil(c, src[0]); + result = ntq_fceil(c, src[0]); break; case nir_op_ffract: - *dest = ntq_ffract(c, src[0]); + result = ntq_ffract(c, src[0]); break; case nir_op_ffloor: - *dest = ntq_ffloor(c, src[0]); + result = ntq_ffloor(c, src[0]); break; case nir_op_fsin: - *dest = ntq_fsin(c, src[0]); + result = ntq_fsin(c, src[0]); break; case nir_op_fcos: - *dest = ntq_fcos(c, src[0]); + result = ntq_fcos(c, src[0]); break; case nir_op_fsign: - *dest = ntq_fsign(c, src[0]); + result = ntq_fsign(c, src[0]); break; case nir_op_fabs: - *dest = qir_FMAXABS(c, src[0], src[0]); + result = qir_FMAXABS(c, src[0], src[0]); break; case nir_op_iabs: - *dest = qir_MAX(c, src[0], + result = qir_MAX(c, src[0], qir_SUB(c, qir_uniform_ui(c, 0), src[0])); break; case nir_op_ibitfield_extract: - *dest = ntq_emit_ibfe(c, src[0], src[1], src[2]); + result = ntq_emit_ibfe(c, src[0], src[1], src[2]); break; case nir_op_ubitfield_extract: - *dest = ntq_emit_ubfe(c, src[0], src[1], src[2]); + result = ntq_emit_ubfe(c, src[0], src[1], src[2]); break; case nir_op_usadd_4x8: - *dest = qir_V8ADDS(c, src[0], src[1]); + result = qir_V8ADDS(c, src[0], src[1]); break; case nir_op_ussub_4x8: - *dest = qir_V8SUBS(c, src[0], src[1]); + result = qir_V8SUBS(c, src[0], src[1]); break; case nir_op_umin_4x8: - *dest = qir_V8MIN(c, src[0], src[1]); + result = qir_V8MIN(c, src[0], src[1]); break; case nir_op_umax_4x8: - *dest = qir_V8MAX(c, src[0], src[1]); + result = qir_V8MAX(c, src[0], src[1]); break; case nir_op_umul_unorm_4x8: - *dest = qir_V8MULD(c, src[0], src[1]); + result = qir_V8MULD(c, src[0], src[1]); + break; + + case nir_op_fddx: + case nir_op_fddx_coarse: + case nir_op_fddx_fine: + result = ntq_fddx(c, src[0]); + break; + + case nir_op_fddy: + case nir_op_fddy_coarse: + case nir_op_fddy_fine: + result = ntq_fddy(c, src[0]); break; default: @@ -1132,6 +1322,13 @@ fprintf(stderr, "\n"); abort(); } + + /* We have a scalar result, so the instruction should only have a + * single channel written to. + */ + assert(util_is_power_of_two(instr->dest.write_mask)); + ntq_store_dest(c, &instr->dest.dest, + ffs(instr->dest.write_mask) - 1, result); } static void @@ -1145,7 +1342,7 @@ } uint32_t discard_cond = QPU_COND_ALWAYS; - if (c->discard.file != QFILE_NULL) { + if (c->s->info->fs.uses_discard) { qir_SF(c, c->discard); discard_cond = QPU_COND_ZS; } @@ -1171,7 +1368,7 @@ if (c->output_position_index != -1) { qir_FTOI_dest(c, qir_reg(QFILE_TLB_Z_WRITE, 0), qir_FMUL(c, - c->outputs[c->output_position_index + 2], + c->outputs[c->output_position_index], qir_uniform_f(c, 0xffffff)))->cond = discard_cond; } else { qir_MOV_dest(c, qir_reg(QFILE_TLB_Z_WRITE, 0), @@ -1274,7 +1471,7 @@ struct vc4_varying_slot *fs_inputs, uint32_t num_fs_inputs) { - struct qreg rcp_w = qir_RCP(c, c->outputs[c->output_position_index + 3]); + struct qreg rcp_w = ntq_rcp(c, c->outputs[c->output_position_index + 3]); emit_stub_vpm_read(c); @@ -1332,16 +1529,21 @@ progress = false; NIR_PASS_V(s, nir_lower_vars_to_ssa); - NIR_PASS_V(s, nir_lower_alu_to_scalar); - NIR_PASS_V(s, nir_lower_phis_to_scalar); - + NIR_PASS(progress, s, nir_lower_alu_to_scalar); + NIR_PASS(progress, s, nir_lower_phis_to_scalar); NIR_PASS(progress, s, nir_copy_prop); + NIR_PASS(progress, s, nir_opt_remove_phis); NIR_PASS(progress, s, nir_opt_dce); + NIR_PASS(progress, s, nir_opt_dead_cf); NIR_PASS(progress, s, nir_opt_cse); - NIR_PASS(progress, s, nir_opt_peephole_select); + NIR_PASS(progress, s, nir_opt_peephole_select, 8); NIR_PASS(progress, s, nir_opt_algebraic); NIR_PASS(progress, s, nir_opt_constant_folding); NIR_PASS(progress, s, nir_opt_undef); + NIR_PASS(progress, s, nir_opt_loop_unroll, + nir_var_shader_in | + nir_var_shader_out | + nir_var_local); } while (progress); } @@ -1387,10 +1589,11 @@ if (c->stage == QSTAGE_FRAG) { if (var->data.location == VARYING_SLOT_POS) { emit_fragcoord_input(c, loc); - } else if (var->data.location >= VARYING_SLOT_VAR0 && - (c->fs_key->point_sprite_mask & - (1 << (var->data.location - - VARYING_SLOT_VAR0)))) { + } else if (var->data.location == VARYING_SLOT_PNTC || + (var->data.location >= VARYING_SLOT_VAR0 && + (c->fs_key->point_sprite_mask & + (1 << (var->data.location - + VARYING_SLOT_VAR0))))) { c->inputs[loc * 4 + 0] = c->point_x; c->inputs[loc * 4 + 1] = c->point_y; } else { @@ -1445,11 +1648,11 @@ ntq_setup_uniforms(struct vc4_compile *c) { nir_foreach_variable(var, &c->s->uniforms) { - unsigned array_len = MAX2(glsl_get_length(var->type), 1); - unsigned array_elem_size = 4 * sizeof(float); + uint32_t vec4_count = st_glsl_type_size(var->type); + unsigned vec4_size = 4 * sizeof(float); - declare_uniform_range(c, var->data.driver_location * array_elem_size, - array_len * array_elem_size); + declare_uniform_range(c, var->data.driver_location * vec4_size, + vec4_count * vec4_size); } } @@ -1471,7 +1674,7 @@ _mesa_hash_table_insert(c->def_ht, nir_reg, qregs); for (int i = 0; i < array_len * nir_reg->num_components; i++) - qregs[i] = qir_uniform_ui(c, 0); + qregs[i] = qir_get_temp(c); } } @@ -1500,67 +1703,90 @@ static void ntq_emit_intrinsic(struct vc4_compile *c, nir_intrinsic_instr *instr) { - const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; nir_const_value *const_offset; unsigned offset; - struct qreg *dest = NULL; - - if (info->has_dest) { - dest = ntq_get_dest(c, &instr->dest); - } switch (instr->intrinsic) { case nir_intrinsic_load_uniform: assert(instr->num_components == 1); const_offset = nir_src_as_const_value(instr->src[0]); if (const_offset) { - offset = instr->const_index[0] + const_offset->u32[0]; + offset = nir_intrinsic_base(instr) + const_offset->u32[0]; assert(offset % 4 == 0); /* We need dwords */ offset = offset / 4; - if (offset < VC4_NIR_STATE_UNIFORM_OFFSET) { - *dest = qir_uniform(c, QUNIFORM_UNIFORM, - offset); - } else { - *dest = qir_uniform(c, offset - - VC4_NIR_STATE_UNIFORM_OFFSET, - 0); - } + ntq_store_dest(c, &instr->dest, 0, + qir_uniform(c, QUNIFORM_UNIFORM, + offset)); } else { - *dest = indirect_uniform_load(c, instr); + ntq_store_dest(c, &instr->dest, 0, + indirect_uniform_load(c, instr)); } break; case nir_intrinsic_load_user_clip_plane: for (int i = 0; i < instr->num_components; i++) { - dest[i] = qir_uniform(c, QUNIFORM_USER_CLIP_PLANE, - instr->const_index[0] * 4 + i); + ntq_store_dest(c, &instr->dest, i, + qir_uniform(c, QUNIFORM_USER_CLIP_PLANE, + nir_intrinsic_ucp_id(instr) * + 4 + i)); } break; + case nir_intrinsic_load_blend_const_color_r_float: + case nir_intrinsic_load_blend_const_color_g_float: + case nir_intrinsic_load_blend_const_color_b_float: + case nir_intrinsic_load_blend_const_color_a_float: + ntq_store_dest(c, &instr->dest, 0, + qir_uniform(c, QUNIFORM_BLEND_CONST_COLOR_X + + (instr->intrinsic - + nir_intrinsic_load_blend_const_color_r_float), + 0)); + break; + + case nir_intrinsic_load_blend_const_color_rgba8888_unorm: + ntq_store_dest(c, &instr->dest, 0, + qir_uniform(c, QUNIFORM_BLEND_CONST_COLOR_RGBA, + 0)); + break; + + case nir_intrinsic_load_blend_const_color_aaaa8888_unorm: + ntq_store_dest(c, &instr->dest, 0, + qir_uniform(c, QUNIFORM_BLEND_CONST_COLOR_AAAA, + 0)); + break; + + case nir_intrinsic_load_alpha_ref_float: + ntq_store_dest(c, &instr->dest, 0, + qir_uniform(c, QUNIFORM_ALPHA_REF, 0)); + break; + case nir_intrinsic_load_sample_mask_in: - *dest = qir_uniform(c, QUNIFORM_SAMPLE_MASK, 0); + ntq_store_dest(c, &instr->dest, 0, + qir_uniform(c, QUNIFORM_SAMPLE_MASK, 0)); break; case nir_intrinsic_load_front_face: /* The register contains 0 (front) or 1 (back), and we need to * turn it into a NIR bool where true means front. */ - *dest = qir_ADD(c, - qir_uniform_ui(c, -1), - qir_reg(QFILE_FRAG_REV_FLAG, 0)); + ntq_store_dest(c, &instr->dest, 0, + qir_ADD(c, + qir_uniform_ui(c, -1), + qir_reg(QFILE_FRAG_REV_FLAG, 0))); break; case nir_intrinsic_load_input: assert(instr->num_components == 1); const_offset = nir_src_as_const_value(instr->src[0]); assert(const_offset && "vc4 doesn't support indirect inputs"); - if (instr->const_index[0] >= VC4_NIR_TLB_COLOR_READ_INPUT) { + if (c->stage == QSTAGE_FRAG && + nir_intrinsic_base(instr) >= VC4_NIR_TLB_COLOR_READ_INPUT) { assert(const_offset->u32[0] == 0); /* Reads of the per-sample color need to be done in * order. */ - int sample_index = (instr->const_index[0] - + int sample_index = (nir_intrinsic_base(instr) - VC4_NIR_TLB_COLOR_READ_INPUT); for (int i = 0; i <= sample_index; i++) { if (c->color_reads[i].file == QFILE_NULL) { @@ -1568,17 +1794,20 @@ qir_TLB_COLOR_READ(c); } } - *dest = c->color_reads[sample_index]; + ntq_store_dest(c, &instr->dest, 0, + qir_MOV(c, c->color_reads[sample_index])); } else { - offset = instr->const_index[0] + const_offset->u32[0]; - *dest = c->inputs[offset]; + offset = nir_intrinsic_base(instr) + const_offset->u32[0]; + int comp = nir_intrinsic_component(instr); + ntq_store_dest(c, &instr->dest, 0, + qir_MOV(c, c->inputs[offset * 4 + comp])); } break; case nir_intrinsic_store_output: const_offset = nir_src_as_const_value(instr->src[1]); assert(const_offset && "vc4 doesn't support indirect outputs"); - offset = instr->const_index[0] + const_offset->u32[0]; + offset = nir_intrinsic_base(instr) + const_offset->u32[0]; /* MSAA color outputs are the only case where we have an * output that's not lowered to being a store of a single 32 @@ -1592,6 +1821,7 @@ i)); } } else { + offset = offset * 4 + nir_intrinsic_component(instr); assert(instr->num_components == 1); c->outputs[offset] = qir_MOV(c, ntq_get_src(c, instr->src[0], 0)); @@ -1600,15 +1830,33 @@ break; case nir_intrinsic_discard: - c->discard = qir_uniform_ui(c, ~0); + if (c->execute.file != QFILE_NULL) { + qir_SF(c, c->execute); + qir_MOV_cond(c, QPU_COND_ZS, c->discard, + qir_uniform_ui(c, ~0)); + } else { + qir_MOV_dest(c, c->discard, qir_uniform_ui(c, ~0)); + } break; - case nir_intrinsic_discard_if: - if (c->discard.file == QFILE_NULL) - c->discard = qir_uniform_ui(c, 0); - c->discard = qir_OR(c, c->discard, + case nir_intrinsic_discard_if: { + /* true (~0) if we're discarding */ + struct qreg cond = ntq_get_src(c, instr->src[0], 0); + + if (c->execute.file != QFILE_NULL) { + /* execute == 0 means the channel is active. Invert + * the condition so that we can use zero as "executing + * and discarding." + */ + qir_SF(c, qir_AND(c, c->execute, qir_NOT(c, cond))); + qir_MOV_cond(c, QPU_COND_ZS, c->discard, cond); + } else { + qir_OR_dest(c, c->discard, c->discard, ntq_get_src(c, instr->src[0], 0)); + } + break; + } default: fprintf(stderr, "Unknown intrinsic: "); @@ -1618,10 +1866,124 @@ } } +/* Clears (activates) the execute flags for any channels whose jump target + * matches this block. + */ +static void +ntq_activate_execute_for_block(struct vc4_compile *c) +{ + qir_SF(c, qir_SUB(c, + c->execute, + qir_uniform_ui(c, c->cur_block->index))); + qir_MOV_cond(c, QPU_COND_ZS, c->execute, qir_uniform_ui(c, 0)); +} + static void ntq_emit_if(struct vc4_compile *c, nir_if *if_stmt) { - fprintf(stderr, "general IF statements not handled.\n"); + if (!c->vc4->screen->has_control_flow) { + fprintf(stderr, + "IF statement support requires updated kernel.\n"); + return; + } + + nir_block *nir_else_block = nir_if_first_else_block(if_stmt); + bool empty_else_block = + (nir_else_block == nir_if_last_else_block(if_stmt) && + exec_list_is_empty(&nir_else_block->instr_list)); + + struct qblock *then_block = qir_new_block(c); + struct qblock *after_block = qir_new_block(c); + struct qblock *else_block; + if (empty_else_block) + else_block = after_block; + else + else_block = qir_new_block(c); + + bool was_top_level = false; + if (c->execute.file == QFILE_NULL) { + c->execute = qir_MOV(c, qir_uniform_ui(c, 0)); + was_top_level = true; + } + + /* Set ZS for executing (execute == 0) and jumping (if->condition == + * 0) channels, and then update execute flags for those to point to + * the ELSE block. + */ + qir_SF(c, qir_OR(c, + c->execute, + ntq_get_src(c, if_stmt->condition, 0))); + qir_MOV_cond(c, QPU_COND_ZS, c->execute, + qir_uniform_ui(c, else_block->index)); + + /* Jump to ELSE if nothing is active for THEN, otherwise fall + * through. + */ + qir_SF(c, c->execute); + qir_BRANCH(c, QPU_COND_BRANCH_ALL_ZC); + qir_link_blocks(c->cur_block, else_block); + qir_link_blocks(c->cur_block, then_block); + + /* Process the THEN block. */ + qir_set_emit_block(c, then_block); + ntq_emit_cf_list(c, &if_stmt->then_list); + + if (!empty_else_block) { + /* Handle the end of the THEN block. First, all currently + * active channels update their execute flags to point to + * ENDIF + */ + qir_SF(c, c->execute); + qir_MOV_cond(c, QPU_COND_ZS, c->execute, + qir_uniform_ui(c, after_block->index)); + + /* If everything points at ENDIF, then jump there immediately. */ + qir_SF(c, qir_SUB(c, c->execute, qir_uniform_ui(c, after_block->index))); + qir_BRANCH(c, QPU_COND_BRANCH_ALL_ZS); + qir_link_blocks(c->cur_block, after_block); + qir_link_blocks(c->cur_block, else_block); + + qir_set_emit_block(c, else_block); + ntq_activate_execute_for_block(c); + ntq_emit_cf_list(c, &if_stmt->else_list); + } + + qir_link_blocks(c->cur_block, after_block); + + qir_set_emit_block(c, after_block); + if (was_top_level) + c->execute = c->undef; + else + ntq_activate_execute_for_block(c); + +} + +static void +ntq_emit_jump(struct vc4_compile *c, nir_jump_instr *jump) +{ + struct qblock *jump_block; + switch (jump->type) { + case nir_jump_break: + jump_block = c->loop_break_block; + break; + case nir_jump_continue: + jump_block = c->loop_cont_block; + break; + default: + unreachable("Unsupported jump type\n"); + } + + qir_SF(c, c->execute); + qir_MOV_cond(c, QPU_COND_ZS, c->execute, + qir_uniform_ui(c, jump_block->index)); + + /* Jump to the destination block if everyone has taken the jump. */ + qir_SF(c, qir_SUB(c, c->execute, qir_uniform_ui(c, jump_block->index))); + qir_BRANCH(c, QPU_COND_BRANCH_ALL_ZS); + struct qblock *new_block = qir_new_block(c); + qir_link_blocks(c->cur_block, jump_block); + qir_link_blocks(c->cur_block, new_block); + qir_set_emit_block(c, new_block); } static void @@ -1648,6 +2010,10 @@ ntq_emit_tex(c, nir_instr_as_tex(instr)); break; + case nir_instr_type_jump: + ntq_emit_jump(c, nir_instr_as_jump(instr)); + break; + default: fprintf(stderr, "Unknown NIR instr type: "); nir_print_instr(instr, stderr); @@ -1667,10 +2033,59 @@ static void ntq_emit_cf_list(struct vc4_compile *c, struct exec_list *list); static void -ntq_emit_loop(struct vc4_compile *c, nir_loop *nloop) +ntq_emit_loop(struct vc4_compile *c, nir_loop *loop) { - fprintf(stderr, "LOOPS not fully handled. Rendering errors likely.\n"); - ntq_emit_cf_list(c, &nloop->body); + if (!c->vc4->screen->has_control_flow) { + fprintf(stderr, + "loop support requires updated kernel.\n"); + ntq_emit_cf_list(c, &loop->body); + return; + } + + bool was_top_level = false; + if (c->execute.file == QFILE_NULL) { + c->execute = qir_MOV(c, qir_uniform_ui(c, 0)); + was_top_level = true; + } + + struct qblock *save_loop_cont_block = c->loop_cont_block; + struct qblock *save_loop_break_block = c->loop_break_block; + + c->loop_cont_block = qir_new_block(c); + c->loop_break_block = qir_new_block(c); + + qir_link_blocks(c->cur_block, c->loop_cont_block); + qir_set_emit_block(c, c->loop_cont_block); + ntq_activate_execute_for_block(c); + + ntq_emit_cf_list(c, &loop->body); + + /* If anything had explicitly continued, or is here at the end of the + * loop, then we need to loop again. SF updates are masked by the + * instruction's condition, so we can do the OR of the two conditions + * within SF. + */ + qir_SF(c, c->execute); + struct qinst *cont_check = + qir_SUB_dest(c, + c->undef, + c->execute, + qir_uniform_ui(c, c->loop_cont_block->index)); + cont_check->cond = QPU_COND_ZC; + cont_check->sf = true; + + qir_BRANCH(c, QPU_COND_BRANCH_ANY_ZS); + qir_link_blocks(c->cur_block, c->loop_cont_block); + qir_link_blocks(c->cur_block, c->loop_break_block); + + qir_set_emit_block(c, c->loop_break_block); + if (was_top_level) + c->execute = c->undef; + else + ntq_activate_execute_for_block(c); + + c->loop_break_block = save_loop_break_block; + c->loop_cont_block = save_loop_cont_block; } static void @@ -1718,6 +2133,9 @@ static void nir_to_qir(struct vc4_compile *c) { + if (c->stage == QSTAGE_FRAG && c->s->info->fs.uses_discard) + c->discard = qir_MOV(c, qir_uniform_ui(c, 0)); + ntq_setup_inputs(c); ntq_setup_outputs(c); ntq_setup_uniforms(c); @@ -1740,8 +2158,17 @@ .lower_fsat = true, .lower_fsqrt = true, .lower_negate = true, + .native_integers = true, + .max_unroll_iterations = 32, }; +const void * +vc4_screen_get_compiler_options(struct pipe_screen *pscreen, + enum pipe_shader_ir ir, unsigned shader) +{ + return &nir_options; +} + static int count_nir_instrs(nir_shader *nir) { @@ -1759,15 +2186,17 @@ static struct vc4_compile * vc4_shader_ntq(struct vc4_context *vc4, enum qstage stage, - struct vc4_key *key) + struct vc4_key *key, bool fs_threaded) { struct vc4_compile *c = qir_compile_init(); + c->vc4 = vc4; c->stage = stage; c->shader_state = &key->shader_state->base; c->program_id = key->shader_state->program_id; c->variant_id = p_atomic_inc_return(&key->shader_state->compiled_variant_count); + c->fs_threaded = fs_threaded; c->key = key; switch (stage) { @@ -1789,8 +2218,6 @@ } c->s = nir_shader_clone(c, key->shader_state->base.ir.nir); - NIR_PASS_V(c->s, nir_opt_global_to_local); - NIR_PASS_V(c->s, nir_convert_to_ssa); if (stage == QSTAGE_FRAG) NIR_PASS_V(c->s, vc4_nir_lower_blend, c); @@ -1834,7 +2261,6 @@ tex_options.lower_srgb |= (1 << i); } - NIR_PASS_V(c->s, nir_normalize_cubemap_coords); NIR_PASS_V(c->s, nir_lower_tex, &tex_options); if (c->fs_key && c->fs_key->light_twoside) @@ -1843,19 +2269,31 @@ if (c->vs_key && c->vs_key->clamp_color) NIR_PASS_V(c->s, nir_lower_clamp_color_outputs); - if (stage == QSTAGE_FRAG) - NIR_PASS_V(c->s, nir_lower_clip_fs, c->key->ucp_enables); + if (c->key->ucp_enables) { + if (stage == QSTAGE_FRAG) { + NIR_PASS_V(c->s, nir_lower_clip_fs, c->key->ucp_enables); + } else { + NIR_PASS_V(c->s, nir_lower_clip_vs, c->key->ucp_enables); + NIR_PASS_V(c->s, nir_lower_io_to_scalar, + nir_var_shader_out); + } + } + + /* FS input scalarizing must happen after nir_lower_two_sided_color, + * which only handles a vec4 at a time. Similarly, VS output + * scalarizing must happen after nir_lower_clip_vs. + */ + if (c->stage == QSTAGE_FRAG) + NIR_PASS_V(c->s, nir_lower_io_to_scalar, nir_var_shader_in); else - NIR_PASS_V(c->s, nir_lower_clip_vs, c->key->ucp_enables); + NIR_PASS_V(c->s, nir_lower_io_to_scalar, nir_var_shader_out); NIR_PASS_V(c->s, vc4_nir_lower_io, c); NIR_PASS_V(c->s, vc4_nir_lower_txf_ms, c); NIR_PASS_V(c->s, nir_lower_idiv); - NIR_PASS_V(c->s, nir_lower_load_const_to_scalar); vc4_optimize_nir(c->s); - NIR_PASS_V(c->s, nir_remove_dead_variables, nir_var_local); NIR_PASS_V(c->s, nir_convert_from_ssa, true); if (vc4_debug & VC4_DEBUG_SHADERDB) { @@ -1876,12 +2314,23 @@ switch (stage) { case QSTAGE_FRAG: + /* FS threading requires that the thread execute + * QPU_SIG_LAST_THREAD_SWITCH exactly once before terminating + * (with no other THRSW afterwards, obviously). If we didn't + * fetch a texture at a top level block, this wouldn't be + * true. + */ + if (c->fs_threaded && !c->last_thrsw_at_top_level) { + c->failed = true; + return c; + } + emit_frag_end(c); break; case QSTAGE_VERT: emit_vert_end(c, - vc4->prog.fs->input_slots, - vc4->prog.fs->num_inputs); + c->vs_key->fs_inputs->input_slots, + c->vs_key->fs_inputs->num_inputs); break; case QSTAGE_COORD: emit_coord_end(c); @@ -1900,6 +2349,7 @@ qir_lower_uniforms(c); qir_schedule_instructions(c); + qir_emit_uniform_stream_resets(c); if (vc4_debug & VC4_DEBUG_QIR) { fprintf(stderr, "%s prog %d/%d QIR:\n", @@ -1939,19 +2389,49 @@ so->program_id = vc4->next_uncompiled_program_id++; - nir_shader *s = tgsi_to_nir(cso->tokens, &nir_options); + nir_shader *s; - if (vc4_debug & VC4_DEBUG_TGSI) { - fprintf(stderr, "%s prog %d TGSI:\n", - gl_shader_stage_name(s->stage), - so->program_id); - tgsi_dump(cso->tokens, 0); - fprintf(stderr, "\n"); + if (cso->type == PIPE_SHADER_IR_NIR) { + /* The backend takes ownership of the NIR shader on state + * creation. + */ + s = cso->ir.nir; + } else { + assert(cso->type == PIPE_SHADER_IR_TGSI); + + if (vc4_debug & VC4_DEBUG_TGSI) { + fprintf(stderr, "prog %d TGSI:\n", + so->program_id); + tgsi_dump(cso->tokens, 0); + fprintf(stderr, "\n"); + } + s = tgsi_to_nir(cso->tokens, &nir_options); } + NIR_PASS_V(s, nir_opt_global_to_local); + NIR_PASS_V(s, nir_lower_regs_to_ssa); + NIR_PASS_V(s, nir_normalize_cubemap_coords); + + NIR_PASS_V(s, nir_lower_load_const_to_scalar); + + vc4_optimize_nir(s); + + NIR_PASS_V(s, nir_remove_dead_variables, nir_var_local); + + /* Garbage collect dead instructions */ + nir_sweep(s); + so->base.type = PIPE_SHADER_IR_NIR; so->base.ir.nir = s; + if (vc4_debug & VC4_DEBUG_NIR) { + fprintf(stderr, "%s prog %d NIR:\n", + gl_shader_stage_name(s->stage), + so->program_id); + nir_print_shader(s, stderr); + fprintf(stderr, "\n"); + } + return so; } @@ -1974,18 +2454,87 @@ vc4_set_shader_uniform_dirty_flags(shader); } +static void +vc4_setup_compiled_fs_inputs(struct vc4_context *vc4, struct vc4_compile *c, + struct vc4_compiled_shader *shader) +{ + struct vc4_fs_inputs inputs; + + memset(&inputs, 0, sizeof(inputs)); + inputs.input_slots = ralloc_array(shader, + struct vc4_varying_slot, + c->num_input_slots); + + bool input_live[c->num_input_slots]; + + memset(input_live, 0, sizeof(input_live)); + qir_for_each_inst_inorder(inst, c) { + for (int i = 0; i < qir_get_nsrc(inst); i++) { + if (inst->src[i].file == QFILE_VARY) + input_live[inst->src[i].index] = true; + } + } + + for (int i = 0; i < c->num_input_slots; i++) { + struct vc4_varying_slot *slot = &c->input_slots[i]; + + if (!input_live[i]) + continue; + + /* Skip non-VS-output inputs. */ + if (slot->slot == (uint8_t)~0) + continue; + + if (slot->slot == VARYING_SLOT_COL0 || + slot->slot == VARYING_SLOT_COL1 || + slot->slot == VARYING_SLOT_BFC0 || + slot->slot == VARYING_SLOT_BFC1) { + shader->color_inputs |= (1 << inputs.num_inputs); + } + + inputs.input_slots[inputs.num_inputs] = *slot; + inputs.num_inputs++; + } + shader->num_inputs = inputs.num_inputs; + + /* Add our set of inputs to the set of all inputs seen. This way, we + * can have a single pointer that identifies an FS inputs set, + * allowing VS to avoid recompiling when the FS is recompiled (or a + * new one is bound using separate shader objects) but the inputs + * don't change. + */ + struct set_entry *entry = _mesa_set_search(vc4->fs_inputs_set, &inputs); + if (entry) { + shader->fs_inputs = entry->key; + ralloc_free(inputs.input_slots); + } else { + struct vc4_fs_inputs *alloc_inputs; + + alloc_inputs = rzalloc(vc4->fs_inputs_set, struct vc4_fs_inputs); + memcpy(alloc_inputs, &inputs, sizeof(inputs)); + ralloc_steal(alloc_inputs, inputs.input_slots); + _mesa_set_add(vc4->fs_inputs_set, alloc_inputs); + + shader->fs_inputs = alloc_inputs; + } +} + static struct vc4_compiled_shader * vc4_get_compiled_shader(struct vc4_context *vc4, enum qstage stage, struct vc4_key *key) { struct hash_table *ht; uint32_t key_size; + bool try_threading; + if (stage == QSTAGE_FRAG) { ht = vc4->fs_cache; key_size = sizeof(struct vc4_fs_key); + try_threading = vc4->screen->has_threaded_fs; } else { ht = vc4->vs_cache; key_size = sizeof(struct vc4_vs_key); + try_threading = false; } struct vc4_compiled_shader *shader; @@ -1993,49 +2542,22 @@ if (entry) return entry->data; - struct vc4_compile *c = vc4_shader_ntq(vc4, stage, key); + struct vc4_compile *c = vc4_shader_ntq(vc4, stage, key, try_threading); + /* If the FS failed to compile threaded, fall back to single threaded. */ + if (try_threading && c->failed) { + qir_compile_destroy(c); + c = vc4_shader_ntq(vc4, stage, key, false); + } + shader = rzalloc(NULL, struct vc4_compiled_shader); shader->program_id = vc4->next_compiled_program_id++; if (stage == QSTAGE_FRAG) { - bool input_live[c->num_input_slots]; - - memset(input_live, 0, sizeof(input_live)); - list_for_each_entry(struct qinst, inst, &c->instructions, link) { - for (int i = 0; i < qir_get_op_nsrc(inst->op); i++) { - if (inst->src[i].file == QFILE_VARY) - input_live[inst->src[i].index] = true; - } - } - - shader->input_slots = ralloc_array(shader, - struct vc4_varying_slot, - c->num_input_slots); - - for (int i = 0; i < c->num_input_slots; i++) { - struct vc4_varying_slot *slot = &c->input_slots[i]; - - if (!input_live[i]) - continue; - - /* Skip non-VS-output inputs. */ - if (slot->slot == (uint8_t)~0) - continue; - - if (slot->slot == VARYING_SLOT_COL0 || - slot->slot == VARYING_SLOT_COL1 || - slot->slot == VARYING_SLOT_BFC0 || - slot->slot == VARYING_SLOT_BFC1) { - shader->color_inputs |= (1 << shader->num_inputs); - } - - shader->input_slots[shader->num_inputs] = *slot; - shader->num_inputs++; - } + vc4_setup_compiled_fs_inputs(vc4, c, shader); /* Note: the temporary clone in c->s has been freed. */ nir_shader *orig_shader = key->shader_state->base.ir.nir; - if (orig_shader->info.outputs_written & (1 << FRAG_RESULT_DEPTH)) + if (orig_shader->info->outputs_written & (1 << FRAG_RESULT_DEPTH)) shader->disable_early_z = true; } else { shader->num_inputs = c->num_inputs; @@ -2050,9 +2572,17 @@ } } - copy_uniform_state_to_shader(shader, c); - shader->bo = vc4_bo_alloc_shader(vc4->screen, c->qpu_insts, - c->qpu_inst_count * sizeof(uint64_t)); + shader->failed = c->failed; + if (c->failed) { + shader->failed = true; + } else { + copy_uniform_state_to_shader(shader, c); + shader->bo = vc4_bo_alloc_shader(vc4->screen, c->qpu_insts, + c->qpu_inst_count * + sizeof(uint64_t)); + } + + shader->fs_threaded = c->fs_threaded; /* Copy the compiler UBO range state to the compiled shader, dropping * out arrays that were never referenced by an indirect load. @@ -2090,7 +2620,7 @@ qir_compile_destroy(c); struct vc4_key *dup_key; - dup_key = ralloc_size(shader, key_size); + dup_key = rzalloc_size(shader, key_size); /* TODO: don't use rzalloc */ memcpy(dup_key, key, key_size); _mesa_hash_table_insert(ht, dup_key, shader); @@ -2103,6 +2633,7 @@ { for (int i = 0; i < texstate->num_textures; i++) { struct pipe_sampler_view *sampler = texstate->textures[i]; + struct vc4_sampler_view *vc4_sampler = vc4_sampler_view(sampler); struct pipe_sampler_state *sampler_state = texstate->samplers[i]; @@ -2123,6 +2654,8 @@ key->tex[i].compare_func = sampler_state->compare_func; key->tex[i].wrap_s = sampler_state->wrap_s; key->tex[i].wrap_t = sampler_state->wrap_t; + key->tex[i].force_first_level = + vc4_sampler->force_first_level; } } @@ -2132,6 +2665,7 @@ static void vc4_update_compiled_fs(struct vc4_context *vc4, uint8_t prim_mode) { + struct vc4_job *job = vc4->job; struct vc4_fs_key local_key; struct vc4_fs_key *key = &local_key; @@ -2142,7 +2676,6 @@ VC4_DIRTY_RASTERIZER | VC4_DIRTY_SAMPLE_MASK | VC4_DIRTY_FRAGTEX | - VC4_DIRTY_TEXSTATE | VC4_DIRTY_UNCOMPILED_FS))) { return; } @@ -2159,7 +2692,7 @@ } else { key->logicop_func = PIPE_LOGICOP_COPY; } - if (vc4->msaa) { + if (job->msaa) { key->msaa = vc4->rasterizer->base.multisample; key->sample_coverage = (vc4->rasterizer->base.multisample && vc4->sample_mask != (1 << VC4_MAX_SAMPLES) - 1); @@ -2196,10 +2729,14 @@ return; vc4->dirty |= VC4_DIRTY_COMPILED_FS; + if (vc4->rasterizer->base.flatshade && old_fs && vc4->prog.fs->color_inputs != old_fs->color_inputs) { vc4->dirty |= VC4_DIRTY_FLAT_SHADE_FLAGS; } + + if (old_fs && vc4->prog.fs->fs_inputs != old_fs->fs_inputs) + vc4->dirty |= VC4_DIRTY_FS_INPUTS; } static void @@ -2211,17 +2748,16 @@ if (!(vc4->dirty & (VC4_DIRTY_PRIM_MODE | VC4_DIRTY_RASTERIZER | VC4_DIRTY_VERTTEX | - VC4_DIRTY_TEXSTATE | VC4_DIRTY_VTXSTATE | VC4_DIRTY_UNCOMPILED_VS | - VC4_DIRTY_COMPILED_FS))) { + VC4_DIRTY_FS_INPUTS))) { return; } memset(key, 0, sizeof(*key)); vc4_setup_shared_key(vc4, &key->base, &vc4->verttex); key->base.shader_state = vc4->prog.bind_vs; - key->compiled_fs_id = vc4->prog.fs->program_id; + key->fs_inputs = vc4->prog.fs->fs_inputs; key->clamp_color = vc4->rasterizer->base.clamp_vertex_color; for (int i = 0; i < ARRAY_SIZE(key->attr_formats); i++) @@ -2239,6 +2775,8 @@ } key->is_coord = true; + /* Coord shaders don't care what the FS inputs are. */ + key->fs_inputs = NULL; struct vc4_compiled_shader *cs = vc4_get_compiled_shader(vc4, QSTAGE_COORD, &key->base); if (cs != vc4->prog.cs) { @@ -2247,11 +2785,15 @@ } } -void +bool vc4_update_compiled_shaders(struct vc4_context *vc4, uint8_t prim_mode) { vc4_update_compiled_fs(vc4, prim_mode); vc4_update_compiled_vs(vc4, prim_mode); + + return !(vc4->prog.cs->failed || + vc4->prog.vs->failed || + vc4->prog.fs->failed); } static uint32_t @@ -2278,6 +2820,29 @@ return memcmp(key1, key2, sizeof(struct vc4_vs_key)) == 0; } +static uint32_t +fs_inputs_hash(const void *key) +{ + const struct vc4_fs_inputs *inputs = key; + + return _mesa_hash_data(inputs->input_slots, + sizeof(*inputs->input_slots) * + inputs->num_inputs); +} + +static bool +fs_inputs_compare(const void *key1, const void *key2) +{ + const struct vc4_fs_inputs *inputs1 = key1; + const struct vc4_fs_inputs *inputs2 = key2; + + return (inputs1->num_inputs == inputs2->num_inputs && + memcmp(inputs1->input_slots, + inputs2->input_slots, + sizeof(*inputs1->input_slots) * + inputs1->num_inputs) == 0); +} + static void delete_from_cache_if_matches(struct hash_table *ht, struct hash_entry *entry, @@ -2343,6 +2908,8 @@ fs_cache_compare); vc4->vs_cache = _mesa_hash_table_create(pctx, vs_cache_hash, vs_cache_compare); + vc4->fs_inputs_set = _mesa_set_create(pctx, fs_inputs_hash, + fs_inputs_compare); } void diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_qir.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_qir.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_qir.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_qir.c 2017-06-01 10:37:10.000000000 +0000 @@ -58,6 +58,7 @@ [QOP_ASR] = { "asr", 1, 2 }, [QOP_SHL] = { "shl", 1, 2 }, [QOP_MIN] = { "min", 1, 2 }, + [QOP_MIN_NOIMM] = { "min_noimm", 1, 2 }, [QOP_MAX] = { "max", 1, 2 }, [QOP_AND] = { "and", 1, 2 }, [QOP_OR] = { "or", 1, 2 }, @@ -75,14 +76,18 @@ [QOP_FRAG_Z] = { "frag_z", 1, 0 }, [QOP_FRAG_W] = { "frag_w", 1, 0 }, - [QOP_TEX_S] = { "tex_s", 0, 2 }, - [QOP_TEX_T] = { "tex_t", 0, 2 }, - [QOP_TEX_R] = { "tex_r", 0, 2 }, - [QOP_TEX_B] = { "tex_b", 0, 2 }, - [QOP_TEX_DIRECT] = { "tex_direct", 0, 2 }, [QOP_TEX_RESULT] = { "tex_result", 1, 0, true }, + [QOP_THRSW] = { "thrsw", 0, 0, true }, + [QOP_LOAD_IMM] = { "load_imm", 0, 1 }, + [QOP_LOAD_IMM_U2] = { "load_imm_u2", 0, 1 }, + [QOP_LOAD_IMM_I2] = { "load_imm_i2", 0, 1 }, + + [QOP_ROT_MUL] = { "rot_mul", 0, 2 }, + + [QOP_BRANCH] = { "branch", 0, 0, true }, + [QOP_UNIFORMS_RESET] = { "uniforms_reset", 0, 2, true }, }; static const char * @@ -95,12 +100,35 @@ } int -qir_get_op_nsrc(enum qop qop) +qir_get_non_sideband_nsrc(struct qinst *inst) { - if (qop < ARRAY_SIZE(qir_op_info) && qir_op_info[qop].name) - return qir_op_info[qop].nsrc; - else - abort(); + assert(qir_op_info[inst->op].name); + return qir_op_info[inst->op].nsrc; +} + +int +qir_get_nsrc(struct qinst *inst) +{ + assert(qir_op_info[inst->op].name); + + int nsrc = qir_get_non_sideband_nsrc(inst); + + /* Normal (non-direct) texture coordinate writes also implicitly load + * a uniform for the texture parameters. + */ + if (qir_is_tex(inst) && inst->dst.file != QFILE_TEX_S_DIRECT) + nsrc++; + + return nsrc; +} + +/* The sideband uniform for textures gets stored after the normal ALU + * arguments. + */ +int +qir_get_tex_uniform_src(struct qinst *inst) +{ + return qir_get_nsrc(inst) - 1; } /** @@ -115,6 +143,11 @@ case QFILE_TLB_COLOR_WRITE: case QFILE_TLB_COLOR_WRITE_MS: case QFILE_TLB_STENCIL_SETUP: + case QFILE_TEX_S_DIRECT: + case QFILE_TEX_S: + case QFILE_TEX_T: + case QFILE_TEX_R: + case QFILE_TEX_B: return true; default: break; @@ -131,7 +164,7 @@ * point/line coordinates reads, because they're generated by * fixed-function hardware. */ - for (int i = 0; i < qir_get_op_nsrc(inst->op); i++) { + for (int i = 0; i < qir_get_nsrc(inst); i++) { if (inst->src[i].file == QFILE_VARY && c->input_slots[inst->src[i].index].slot == 0xff) { return true; @@ -148,6 +181,17 @@ } bool +qir_has_uniform_read(struct qinst *inst) +{ + for (int i = 0; i < qir_get_nsrc(inst); i++) { + if (inst->src[i].file == QFILE_UNIF) + return true; + } + + return false; +} + +bool qir_is_mul(struct qinst *inst) { switch (inst->op) { @@ -159,6 +203,7 @@ case QOP_V8MAX: case QOP_V8ADDS: case QOP_V8SUBS: + case QOP_ROT_MUL: return true; default: return false; @@ -198,14 +243,41 @@ bool qir_is_tex(struct qinst *inst) { - return inst->op >= QOP_TEX_S && inst->op <= QOP_TEX_DIRECT; + switch (inst->dst.file) { + case QFILE_TEX_S_DIRECT: + case QFILE_TEX_S: + case QFILE_TEX_T: + case QFILE_TEX_R: + case QFILE_TEX_B: + return true; + default: + return false; + } +} + +bool +qir_has_implicit_tex_uniform(struct qinst *inst) +{ + switch (inst->dst.file) { + case QFILE_TEX_S: + case QFILE_TEX_T: + case QFILE_TEX_R: + case QFILE_TEX_B: + return true; + default: + return false; + } } bool qir_depends_on_flags(struct qinst *inst) { - return (inst->cond != QPU_COND_ALWAYS && - inst->cond != QPU_COND_NEVER); + if (inst->op == QOP_BRANCH) { + return inst->cond != QPU_COND_BRANCH_ALWAYS; + } else { + return (inst->cond != QPU_COND_ALWAYS && + inst->cond != QPU_COND_NEVER); + } } bool @@ -224,6 +296,53 @@ } } +uint8_t +qir_channels_written(struct qinst *inst) +{ + if (qir_is_mul(inst)) { + switch (inst->dst.pack) { + case QPU_PACK_MUL_NOP: + case QPU_PACK_MUL_8888: + return 0xf; + case QPU_PACK_MUL_8A: + return 0x1; + case QPU_PACK_MUL_8B: + return 0x2; + case QPU_PACK_MUL_8C: + return 0x4; + case QPU_PACK_MUL_8D: + return 0x8; + } + } else { + switch (inst->dst.pack) { + case QPU_PACK_A_NOP: + case QPU_PACK_A_8888: + case QPU_PACK_A_8888_SAT: + case QPU_PACK_A_32_SAT: + return 0xf; + case QPU_PACK_A_8A: + case QPU_PACK_A_8A_SAT: + return 0x1; + case QPU_PACK_A_8B: + case QPU_PACK_A_8B_SAT: + return 0x2; + case QPU_PACK_A_8C: + case QPU_PACK_A_8C_SAT: + return 0x4; + case QPU_PACK_A_8D: + case QPU_PACK_A_8D_SAT: + return 0x8; + case QPU_PACK_A_16A: + case QPU_PACK_A_16A_SAT: + return 0x3; + case QPU_PACK_A_16B: + case QPU_PACK_A_16B_SAT: + return 0xc; + } + } + unreachable("Bad pack field"); +} + static void qir_print_reg(struct vc4_compile *c, struct qreg reg, bool write) { @@ -238,6 +357,12 @@ [QFILE_FRAG_X] = "frag_x", [QFILE_FRAG_Y] = "frag_y", [QFILE_FRAG_REV_FLAG] = "frag_rev_flag", + [QFILE_QPU_ELEMENT] = "elem", + [QFILE_TEX_S_DIRECT] = "tex_s_direct", + [QFILE_TEX_S] = "tex_s", + [QFILE_TEX_T] = "tex_t", + [QFILE_TEX_R] = "tex_r", + [QFILE_TEX_B] = "tex_b", }; switch (reg.file) { @@ -270,6 +395,11 @@ case QFILE_TLB_COLOR_WRITE_MS: case QFILE_TLB_Z_WRITE: case QFILE_TLB_STENCIL_SETUP: + case QFILE_TEX_S_DIRECT: + case QFILE_TEX_S: + case QFILE_TEX_T: + case QFILE_TEX_R: + case QFILE_TEX_B: fprintf(stderr, "%s", files[reg.file]); break; @@ -290,21 +420,27 @@ qir_dump_inst(struct vc4_compile *c, struct qinst *inst) { fprintf(stderr, "%s", qir_get_op_name(inst->op)); - vc4_qpu_disasm_cond(stderr, inst->cond); + if (inst->op == QOP_BRANCH) + vc4_qpu_disasm_cond_branch(stderr, inst->cond); + else + vc4_qpu_disasm_cond(stderr, inst->cond); if (inst->sf) fprintf(stderr, ".sf"); fprintf(stderr, " "); - qir_print_reg(c, inst->dst, true); - if (inst->dst.pack) { + if (inst->op != QOP_BRANCH) { + qir_print_reg(c, inst->dst, true); if (inst->dst.pack) { - if (qir_is_mul(inst)) - vc4_qpu_disasm_pack_mul(stderr, inst->dst.pack); - else - vc4_qpu_disasm_pack_a(stderr, inst->dst.pack); + if (inst->dst.pack) { + if (qir_is_mul(inst)) + vc4_qpu_disasm_pack_mul(stderr, inst->dst.pack); + else + vc4_qpu_disasm_pack_a(stderr, inst->dst.pack); + } } } - for (int i = 0; i < qir_get_op_nsrc(inst->op); i++) { + + for (int i = 0; i < qir_get_nsrc(inst); i++) { fprintf(stderr, ", "); qir_print_reg(c, inst->src[i], false); vc4_qpu_disasm_unpack(stderr, inst->src[i].pack); @@ -314,9 +450,70 @@ void qir_dump(struct vc4_compile *c) { - list_for_each_entry(struct qinst, inst, &c->instructions, link) { - qir_dump_inst(c, inst); - fprintf(stderr, "\n"); + int ip = 0; + int pressure = 0; + + qir_for_each_block(block, c) { + fprintf(stderr, "BLOCK %d:\n", block->index); + qir_for_each_inst(inst, block) { + if (c->temp_start) { + bool first = true; + + fprintf(stderr, "%3d ", pressure); + + for (int i = 0; i < c->num_temps; i++) { + if (c->temp_start[i] != ip) + continue; + + if (first) { + first = false; + } else { + fprintf(stderr, ", "); + } + fprintf(stderr, "S%4d", i); + pressure++; + } + + if (first) + fprintf(stderr, " "); + else + fprintf(stderr, " "); + } + + if (c->temp_end) { + bool first = true; + + for (int i = 0; i < c->num_temps; i++) { + if (c->temp_end[i] != ip) + continue; + + if (first) { + first = false; + } else { + fprintf(stderr, ", "); + } + fprintf(stderr, "E%4d", i); + pressure--; + } + + if (first) + fprintf(stderr, " "); + else + fprintf(stderr, " "); + } + + qir_dump_inst(c, inst); + fprintf(stderr, "\n"); + ip++; + } + if (block->successors[1]) { + fprintf(stderr, "-> BLOCK %d, %d\n", + block->successors[0]->index, + block->successors[1]->index); + } else if (block->successors[0]) { + fprintf(stderr, "-> BLOCK %d\n", + block->successors[0]->index); + } } } @@ -348,7 +545,6 @@ inst->op = op; inst->dst = dst; - inst->src = calloc(2, sizeof(inst->src[0])); inst->src[0] = src0; inst->src[1] = src1; inst->cond = QPU_COND_ALWAYS; @@ -356,39 +552,91 @@ return inst; } -struct qinst * -qir_inst4(enum qop op, struct qreg dst, - struct qreg a, - struct qreg b, - struct qreg c, - struct qreg d) +static void +qir_emit(struct vc4_compile *c, struct qinst *inst) { - struct qinst *inst = CALLOC_STRUCT(qinst); + list_addtail(&inst->link, &c->cur_block->instructions); +} - inst->op = op; - inst->dst = dst; - inst->src = calloc(4, sizeof(*inst->src)); - inst->src[0] = a; - inst->src[1] = b; - inst->src[2] = c; - inst->src[3] = d; +/* Updates inst to write to a new temporary, emits it, and notes the def. */ +struct qreg +qir_emit_def(struct vc4_compile *c, struct qinst *inst) +{ + assert(inst->dst.file == QFILE_NULL); - return inst; + inst->dst = qir_get_temp(c); + + if (inst->dst.file == QFILE_TEMP) + c->defs[inst->dst.index] = inst; + + qir_emit(c, inst); + + return inst->dst; } -void -qir_emit(struct vc4_compile *c, struct qinst *inst) +struct qinst * +qir_emit_nondef(struct vc4_compile *c, struct qinst *inst) { if (inst->dst.file == QFILE_TEMP) - c->defs[inst->dst.index] = inst; + c->defs[inst->dst.index] = NULL; + + qir_emit(c, inst); - qir_emit_nodef(c, inst); + return inst; } bool qir_reg_equals(struct qreg a, struct qreg b) { - return a.file == b.file && a.index == b.index; + return a.file == b.file && a.index == b.index && a.pack == b.pack; +} + +struct qblock * +qir_new_block(struct vc4_compile *c) +{ + struct qblock *block = rzalloc(c, struct qblock); + + list_inithead(&block->instructions); + list_inithead(&block->qpu_inst_list); + + block->predecessors = _mesa_set_create(block, + _mesa_hash_pointer, + _mesa_key_pointer_equal); + + block->index = c->next_block_index++; + + return block; +} + +void +qir_set_emit_block(struct vc4_compile *c, struct qblock *block) +{ + c->cur_block = block; + list_addtail(&block->link, &c->blocks); +} + +struct qblock * +qir_entry_block(struct vc4_compile *c) +{ + return list_first_entry(&c->blocks, struct qblock, link); +} + +struct qblock * +qir_exit_block(struct vc4_compile *c) +{ + return list_last_entry(&c->blocks, struct qblock, link); +} + +void +qir_link_blocks(struct qblock *predecessor, struct qblock *successor) +{ + _mesa_set_add(successor->predecessors, predecessor); + if (predecessor->successors[0]) { + assert(!predecessor->successors[1]); + predecessor->successors[1] = successor; + } else { + predecessor->successors[0] = successor; + } } struct vc4_compile * @@ -396,7 +644,8 @@ { struct vc4_compile *c = rzalloc(NULL, struct vc4_compile); - list_inithead(&c->instructions); + list_inithead(&c->blocks); + qir_set_emit_block(c, qir_new_block(c)); c->output_position_index = -1; c->output_color_index = -1; @@ -416,7 +665,6 @@ c->defs[qinst->dst.index] = NULL; list_del(&qinst->link); - free(qinst->src); free(qinst); } @@ -442,10 +690,13 @@ void qir_compile_destroy(struct vc4_compile *c) { - while (!list_empty(&c->instructions)) { - struct qinst *qinst = - (struct qinst *)c->instructions.next; - qir_remove_instruction(c, qinst); + qir_for_each_block(block, c) { + while (!list_empty(&block->instructions)) { + struct qinst *qinst = + list_first_entry(&block->instructions, + struct qinst, link); + qir_remove_instruction(c, qinst); + } } ralloc_free(c); @@ -499,8 +750,9 @@ qir_SF(struct vc4_compile *c, struct qreg src) { struct qinst *last_inst = NULL; - if (!list_empty(&c->instructions)) - last_inst = (struct qinst *)c->instructions.prev; + + if (!list_empty(&c->cur_block->instructions)) + last_inst = (struct qinst *)c->cur_block->instructions.prev; /* We don't have any way to guess which kind of MOV is implied. */ assert(!src.pack); @@ -509,7 +761,7 @@ !c->defs[src.index] || last_inst != c->defs[src.index]) { last_inst = qir_MOV_dest(c, qir_reg(QFILE_NULL, 0), src); - last_inst = (struct qinst *)c->instructions.prev; + last_inst = (struct qinst *)c->cur_block->instructions.prev; } last_inst->sf = true; } @@ -540,9 +792,11 @@ OPTPASS(qir_opt_algebraic); OPTPASS(qir_opt_constant_folding); OPTPASS(qir_opt_copy_propagation); + OPTPASS(qir_opt_peephole_sf); OPTPASS(qir_opt_dead_code); OPTPASS(qir_opt_small_immediates); OPTPASS(qir_opt_vpm); + OPTPASS(qir_opt_coalesce_ff_writes); if (!progress) break; diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_qir_emit_uniform_stream_resets.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_qir_emit_uniform_stream_resets.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_qir_emit_uniform_stream_resets.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_qir_emit_uniform_stream_resets.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,87 @@ +/* + * Copyright © 2014 Broadcom + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +/** + * @file vc4_qir_emit_uniform_stream_resets.c + * + * Adds updates to the uniform stream address at the start of each basic block + * that uses uniforms. + * + * This will be done just before the translation to QPU instructions, once we + * have performed optimization know how many uniforms are used in each block. + */ + +#include "vc4_qir.h" +#include "util/hash_table.h" +#include "util/u_math.h" + +static bool +block_reads_any_uniform(struct qblock *block) +{ + qir_for_each_inst(inst, block) { + if (qir_has_uniform_read(inst)) + return true; + } + + return false; +} + +void +qir_emit_uniform_stream_resets(struct vc4_compile *c) +{ + uint32_t uniform_count = 0; + + qir_for_each_block(block, c) { + if (block != qir_entry_block(c) && + (block_reads_any_uniform(block) || + block == qir_exit_block(c))) { + struct qreg t = qir_get_temp(c); + struct qreg uni_addr = + qir_uniform(c, QUNIFORM_UNIFORMS_ADDRESS, 0); + + /* Load the offset of the next uniform in the stream + * after the one we're generating here. + */ + struct qinst *load_imm = + qir_inst(QOP_LOAD_IMM, + t, + qir_reg(QFILE_LOAD_IMM, + (uniform_count + 1) * 4), + c->undef); + struct qinst *add = + qir_inst(QOP_UNIFORMS_RESET, c->undef, + t, uni_addr); + + /* Pushes to the top of the block, so in reverse + * order. + */ + list_add(&add->link, &block->instructions); + list_add(&load_imm->link, &block->instructions); + } + + qir_for_each_inst(inst, block) { + if (qir_has_uniform_read(inst)) + uniform_count++; + } + } +} diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_qir.h mesa-17.0.7/src/gallium/drivers/vc4/vc4_qir.h --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_qir.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_qir.h 2017-06-01 10:37:10.000000000 +0000 @@ -38,6 +38,7 @@ #include "vc4_screen.h" #include "vc4_qpu_defines.h" +#include "vc4_qpu.h" #include "kernel/vc4_packet.h" #include "pipe/p_state.h" @@ -54,12 +55,25 @@ QFILE_TLB_Z_WRITE, QFILE_TLB_STENCIL_SETUP, + /* If tex_s is written on its own without preceding t/r/b setup, it's + * a direct memory access using the input value, without the sideband + * uniform load. We represent these in QIR as a separate write + * destination so we can tell if the sideband uniform is present. + */ + QFILE_TEX_S_DIRECT, + + QFILE_TEX_S, + QFILE_TEX_T, + QFILE_TEX_R, + QFILE_TEX_B, + /* Payload registers that aren't in the physical register file, so we * can just use the corresponding qpu_reg at qpu_emit time. */ QFILE_FRAG_X, QFILE_FRAG_Y, QFILE_FRAG_REV_FLAG, + QFILE_QPU_ELEMENT, /** * Stores an immediate value in the index field that will be used @@ -109,6 +123,7 @@ QOP_SHR, QOP_ASR, QOP_MIN, + QOP_MIN_NOIMM, QOP_MAX, QOP_AND, QOP_OR, @@ -130,31 +145,47 @@ QOP_FRAG_Z, QOP_FRAG_W, - /** Texture x coordinate parameter write */ - QOP_TEX_S, - /** Texture y coordinate parameter write */ - QOP_TEX_T, - /** Texture border color parameter or cube map z coordinate write */ - QOP_TEX_R, - /** Texture LOD bias parameter write */ - QOP_TEX_B, - - /** - * Texture-unit 4-byte read with address provided direct in S - * cooordinate. - * - * The first operand is the offset from the start of the UBO, and the - * second is the uniform that has the UBO's base pointer. - */ - QOP_TEX_DIRECT, - /** * Signal of texture read being necessary and then reading r4 into * the destination */ QOP_TEX_RESULT, + /** + * Insert the signal for switching threads in a threaded fragment + * shader. No value can be live in an accumulator across a thrsw. + * + * At the QPU level, this will have several delay slots before the + * switch happens. Those slots are the responsibility of the + * scheduler. + */ + QOP_THRSW, + + /* 32-bit immediate loaded to each SIMD channel */ QOP_LOAD_IMM, + + /* 32-bit immediate divided into 16 2-bit unsigned int values and + * loaded to each corresponding SIMD channel. + */ + QOP_LOAD_IMM_U2, + /* 32-bit immediate divided into 16 2-bit signed int values and + * loaded to each corresponding SIMD channel. + */ + QOP_LOAD_IMM_I2, + + QOP_ROT_MUL, + + /* Jumps to block->successor[0] if the qinst->cond (as a + * QPU_COND_BRANCH_*) passes, or block->successor[1] if not. Note + * that block->successor[1] may be unset if the condition is ALWAYS. + */ + QOP_BRANCH, + + /* Emits an ADD from src[0] to src[1], where src[0] must be a + * QOP_LOAD_IMM result and src[1] is a QUNIFORM_UNIFORMS_ADDRESS, + * required by the kernel as part of its branch validation. + */ + QOP_UNIFORMS_RESET, }; struct queued_qpu_inst { @@ -167,8 +198,9 @@ enum qop op; struct qreg dst; - struct qreg *src; + struct qreg src[3]; bool sf; + bool cond_is_exec_mask; uint8_t cond; }; @@ -233,6 +265,8 @@ /** A reference to a texture config parameter 2 cubemap stride uniform */ QUNIFORM_TEXTURE_CONFIG_P2, + QUNIFORM_TEXTURE_FIRST_LEVEL, + QUNIFORM_TEXTURE_MSAA_ADDR, QUNIFORM_UBO_ADDR, @@ -253,6 +287,11 @@ QUNIFORM_ALPHA_REF, QUNIFORM_SAMPLE_MASK, + + /* Placeholder uniform that will be updated by the kernel when used by + * an instruction writing to QPU_W_UNIFORMS_ADDRESS. + */ + QUNIFORM_UNIFORMS_ADDRESS, }; struct vc4_varying_slot { @@ -296,6 +335,7 @@ unsigned compare_func:3; unsigned wrap_s:3; unsigned wrap_t:3; + bool force_first_level:1; }; struct { uint16_t msaa_width, msaa_height; @@ -331,18 +371,45 @@ struct vc4_vs_key { struct vc4_key base; - /** - * This is a proxy for the array of FS input semantics, which is - * larger than we would want to put in the key. - */ - uint64_t compiled_fs_id; - + const struct vc4_fs_inputs *fs_inputs; enum pipe_format attr_formats[8]; bool is_coord; bool per_vertex_point_size; bool clamp_color; }; +/** A basic block of QIR intructions. */ +struct qblock { + struct list_head link; + + struct list_head instructions; + struct list_head qpu_inst_list; + + struct set *predecessors; + struct qblock *successors[2]; + + int index; + + /* Instruction IPs for the first and last instruction of the block. + * Set by vc4_qpu_schedule.c. + */ + uint32_t start_qpu_ip; + uint32_t end_qpu_ip; + + /* Instruction IP for the branch instruction of the block. Set by + * vc4_qpu_schedule.c. + */ + uint32_t branch_qpu_ip; + + /** @{ used by vc4_qir_live_variables.c */ + BITSET_WORD *def; + BITSET_WORD *use; + BITSET_WORD *live_in; + BITSET_WORD *live_out; + int start_ip, end_ip; + /** @} */ +}; + struct vc4_compile { struct vc4_context *vc4; nir_shader *s; @@ -381,7 +448,13 @@ uint32_t num_ubo_ranges; uint32_t next_ubo_dst_offset; + /* State for whether we're executing on each channel currently. 0 if + * yes, otherwise a block number + 1 that the channel jumped to. + */ + struct qreg execute; + struct qreg line_x, point_x, point_y; + /** boolean (~0 -> true) if the fragment has been discarded. */ struct qreg discard; struct qreg payload_FRAG_Z; struct qreg payload_FRAG_W; @@ -410,6 +483,9 @@ struct vc4_fs_key *fs_key; struct vc4_vs_key *vs_key; + /* Live ranges of temps. */ + int *temp_start, *temp_end; + uint32_t *uniform_data; enum quniform_contents *uniform_contents; uint32_t uniform_array_size; @@ -424,16 +500,47 @@ struct qreg undef; enum qstage stage; uint32_t num_temps; - struct list_head instructions; + + struct list_head blocks; + int next_block_index; + struct qblock *cur_block; + struct qblock *loop_cont_block; + struct qblock *loop_break_block; struct list_head qpu_inst_list; + + /* Pre-QPU-scheduled instruction containing the last THRSW */ + uint64_t *last_thrsw; + uint64_t *qpu_insts; uint32_t qpu_inst_count; uint32_t qpu_inst_size; uint32_t num_inputs; + /** + * Number of inputs from num_inputs remaining to be queued to the read + * FIFO in the VS/CS. + */ + uint32_t num_inputs_remaining; + + /* Number of inputs currently in the read FIFO for the VS/CS */ + uint32_t num_inputs_in_fifo; + + /** Next offset in the VPM to read from in the VS/CS */ + uint32_t vpm_read_offset; + uint32_t program_id; uint32_t variant_id; + + /* Set to compile program in threaded FS mode, where SIG_THREAD_SWITCH + * is used to hide texturing latency at the cost of limiting ourselves + * to the bottom half of physical reg space. + */ + bool fs_threaded; + + bool last_thrsw_at_top_level; + + bool failed; }; /* Special nir_load_input intrinsic index for loading the current TLB @@ -443,47 +550,44 @@ #define VC4_NIR_MS_MASK_OUTPUT 2000000000 -/* Special offset for nir_load_uniform values to get a QUNIFORM_* - * state-dependent value. - */ -#define VC4_NIR_STATE_UNIFORM_OFFSET 1000000000 - struct vc4_compile *qir_compile_init(void); void qir_compile_destroy(struct vc4_compile *c); +struct qblock *qir_new_block(struct vc4_compile *c); +void qir_set_emit_block(struct vc4_compile *c, struct qblock *block); +void qir_link_blocks(struct qblock *predecessor, struct qblock *successor); +struct qblock *qir_entry_block(struct vc4_compile *c); +struct qblock *qir_exit_block(struct vc4_compile *c); struct qinst *qir_inst(enum qop op, struct qreg dst, struct qreg src0, struct qreg src1); -struct qinst *qir_inst4(enum qop op, struct qreg dst, - struct qreg a, - struct qreg b, - struct qreg c, - struct qreg d); void qir_remove_instruction(struct vc4_compile *c, struct qinst *qinst); struct qreg qir_uniform(struct vc4_compile *c, enum quniform_contents contents, uint32_t data); void qir_schedule_instructions(struct vc4_compile *c); void qir_reorder_uniforms(struct vc4_compile *c); +void qir_emit_uniform_stream_resets(struct vc4_compile *c); -void qir_emit(struct vc4_compile *c, struct qinst *inst); -static inline struct qinst * -qir_emit_nodef(struct vc4_compile *c, struct qinst *inst) -{ - list_addtail(&inst->link, &c->instructions); - return inst; -} +struct qreg qir_emit_def(struct vc4_compile *c, struct qinst *inst); +struct qinst *qir_emit_nondef(struct vc4_compile *c, struct qinst *inst); struct qreg qir_get_temp(struct vc4_compile *c); -int qir_get_op_nsrc(enum qop qop); +void qir_calculate_live_intervals(struct vc4_compile *c); +int qir_get_nsrc(struct qinst *inst); +int qir_get_non_sideband_nsrc(struct qinst *inst); +int qir_get_tex_uniform_src(struct qinst *inst); bool qir_reg_equals(struct qreg a, struct qreg b); bool qir_has_side_effects(struct vc4_compile *c, struct qinst *inst); bool qir_has_side_effect_reads(struct vc4_compile *c, struct qinst *inst); +bool qir_has_uniform_read(struct qinst *inst); bool qir_is_mul(struct qinst *inst); bool qir_is_raw_mov(struct qinst *inst); bool qir_is_tex(struct qinst *inst); +bool qir_has_implicit_tex_uniform(struct qinst *inst); bool qir_is_float_input(struct qinst *inst); bool qir_depends_on_flags(struct qinst *inst); bool qir_writes_r4(struct qinst *inst); struct qreg qir_follow_movs(struct vc4_compile *c, struct qreg reg); +uint8_t qir_channels_written(struct qinst *inst); void qir_dump(struct vc4_compile *c); void qir_dump_inst(struct vc4_compile *c, struct qinst *inst); @@ -493,15 +597,15 @@ void qir_optimize(struct vc4_compile *c); bool qir_opt_algebraic(struct vc4_compile *c); +bool qir_opt_coalesce_ff_writes(struct vc4_compile *c); bool qir_opt_constant_folding(struct vc4_compile *c); bool qir_opt_copy_propagation(struct vc4_compile *c); bool qir_opt_dead_code(struct vc4_compile *c); +bool qir_opt_peephole_sf(struct vc4_compile *c); bool qir_opt_small_immediates(struct vc4_compile *c); bool qir_opt_vpm(struct vc4_compile *c); void vc4_nir_lower_blend(nir_shader *s, struct vc4_compile *c); void vc4_nir_lower_io(nir_shader *s, struct vc4_compile *c); -nir_ssa_def *vc4_nir_get_state_uniform(struct nir_builder *b, - enum quniform_contents contents); nir_ssa_def *vc4_nir_get_swizzled_channel(struct nir_builder *b, nir_ssa_def **srcs, int swiz); void vc4_nir_lower_txf_ms(nir_shader *s, struct vc4_compile *c); @@ -527,70 +631,58 @@ static inline struct qreg \ qir_##name(struct vc4_compile *c) \ { \ - struct qreg t = qir_get_temp(c); \ - qir_emit(c, qir_inst(QOP_##name, t, c->undef, c->undef)); \ - return t; \ + return qir_emit_def(c, qir_inst(QOP_##name, c->undef, \ + c->undef, c->undef)); \ +} \ +static inline struct qinst * \ +qir_##name##_dest(struct vc4_compile *c, struct qreg dest) \ +{ \ + return qir_emit_nondef(c, qir_inst(QOP_##name, dest, \ + c->undef, c->undef)); \ } #define QIR_ALU1(name) \ static inline struct qreg \ qir_##name(struct vc4_compile *c, struct qreg a) \ { \ - struct qreg t = qir_get_temp(c); \ - qir_emit(c, qir_inst(QOP_##name, t, a, c->undef)); \ - return t; \ + return qir_emit_def(c, qir_inst(QOP_##name, c->undef, \ + a, c->undef)); \ } \ static inline struct qinst * \ qir_##name##_dest(struct vc4_compile *c, struct qreg dest, \ struct qreg a) \ { \ - if (dest.file == QFILE_TEMP) \ - c->defs[dest.index] = NULL; \ - return qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, \ - c->undef)); \ + return qir_emit_nondef(c, qir_inst(QOP_##name, dest, a, \ + c->undef)); \ } #define QIR_ALU2(name) \ static inline struct qreg \ qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \ { \ - struct qreg t = qir_get_temp(c); \ - qir_emit(c, qir_inst(QOP_##name, t, a, b)); \ - return t; \ + return qir_emit_def(c, qir_inst(QOP_##name, c->undef, a, b)); \ } \ -static inline void \ +static inline struct qinst * \ qir_##name##_dest(struct vc4_compile *c, struct qreg dest, \ struct qreg a, struct qreg b) \ { \ - qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, b)); \ + return qir_emit_nondef(c, qir_inst(QOP_##name, dest, a, b)); \ } #define QIR_NODST_1(name) \ static inline struct qinst * \ qir_##name(struct vc4_compile *c, struct qreg a) \ { \ - struct qinst *inst = qir_inst(QOP_##name, c->undef, \ - a, c->undef); \ - qir_emit(c, inst); \ - return inst; \ + return qir_emit_nondef(c, qir_inst(QOP_##name, c->undef, \ + a, c->undef)); \ } #define QIR_NODST_2(name) \ static inline struct qinst * \ qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \ { \ - struct qinst *inst = qir_inst(QOP_##name, c->undef, \ - a, b); \ - qir_emit(c, inst); \ - return inst; \ -} - -#define QIR_PACK(name) \ -static inline struct qreg \ -qir_##name(struct vc4_compile *c, struct qreg dest, struct qreg a) \ -{ \ - qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, c->undef)); \ - return dest; \ + return qir_emit_nondef(c, qir_inst(QOP_##name, c->undef, \ + a, b)); \ } #define QIR_PAYLOAD(name) \ @@ -603,7 +695,8 @@ *payload = qir_get_temp(c); \ struct qinst *inst = qir_inst(QOP_##name, *payload, \ c->undef, c->undef); \ - list_add(&inst->link, &c->instructions); \ + struct qblock *entry = qir_entry_block(c); \ + list_add(&inst->link, &entry->instructions); \ c->defs[payload->index] = inst; \ return *payload; \ } @@ -633,6 +726,7 @@ QIR_ALU2(SHR) QIR_ALU2(ASR) QIR_ALU2(MIN) +QIR_ALU2(MIN_NOIMM) QIR_ALU2(MAX) QIR_ALU2(AND) QIR_ALU2(OR) @@ -644,11 +738,6 @@ QIR_ALU1(EXP2) QIR_ALU1(LOG2) QIR_ALU1(VARY_ADD_C) -QIR_NODST_2(TEX_S) -QIR_NODST_2(TEX_T) -QIR_NODST_2(TEX_R) -QIR_NODST_2(TEX_B) -QIR_NODST_2(TEX_DIRECT) QIR_PAYLOAD(FRAG_Z) QIR_PAYLOAD(FRAG_W) QIR_ALU0(TEX_RESULT) @@ -659,10 +748,8 @@ qir_SEL(struct vc4_compile *c, uint8_t cond, struct qreg src0, struct qreg src1) { struct qreg t = qir_get_temp(c); - struct qinst *a = qir_MOV_dest(c, t, src0); - struct qinst *b = qir_MOV_dest(c, t, src1); - a->cond = cond; - b->cond = cond ^ 1; + qir_MOV_dest(c, t, src1); + qir_MOV_dest(c, t, src0)->cond = cond; return t; } @@ -703,9 +790,7 @@ { assert(!dest.pack); dest.pack = QPU_PACK_MUL_8A + chan; - qir_emit(c, qir_inst(QOP_MMOV, dest, val, c->undef)); - if (dest.file == QFILE_TEMP) - c->defs[dest.index] = NULL; + qir_emit_nondef(c, qir_inst(QOP_MMOV, dest, val, c->undef)); } static inline struct qreg @@ -733,10 +818,78 @@ static inline struct qreg qir_LOAD_IMM(struct vc4_compile *c, uint32_t val) { - struct qreg t = qir_get_temp(c); - qir_emit(c, qir_inst(QOP_LOAD_IMM, t, - qir_reg(QFILE_LOAD_IMM, val), c->undef)); - return t; + return qir_emit_def(c, qir_inst(QOP_LOAD_IMM, c->undef, + qir_reg(QFILE_LOAD_IMM, val), c->undef)); } +static inline struct qreg +qir_LOAD_IMM_U2(struct vc4_compile *c, uint32_t val) +{ + return qir_emit_def(c, qir_inst(QOP_LOAD_IMM_U2, c->undef, + qir_reg(QFILE_LOAD_IMM, val), + c->undef)); +} + +static inline struct qreg +qir_LOAD_IMM_I2(struct vc4_compile *c, uint32_t val) +{ + return qir_emit_def(c, qir_inst(QOP_LOAD_IMM_I2, c->undef, + qir_reg(QFILE_LOAD_IMM, val), + c->undef)); +} + +/** Shifts the multiply output to the right by rot channels */ +static inline struct qreg +qir_ROT_MUL(struct vc4_compile *c, struct qreg val, uint32_t rot) +{ + return qir_emit_def(c, qir_inst(QOP_ROT_MUL, c->undef, + val, + qir_reg(QFILE_LOAD_IMM, + QPU_SMALL_IMM_MUL_ROT + rot))); +} + +static inline struct qinst * +qir_MOV_cond(struct vc4_compile *c, uint8_t cond, + struct qreg dest, struct qreg src) +{ + struct qinst *mov = qir_MOV_dest(c, dest, src); + mov->cond = cond; + return mov; +} + +static inline struct qinst * +qir_BRANCH(struct vc4_compile *c, uint8_t cond) +{ + struct qinst *inst = qir_inst(QOP_BRANCH, c->undef, c->undef, c->undef); + inst->cond = cond; + qir_emit_nondef(c, inst); + return inst; +} + +#define qir_for_each_block(block, c) \ + list_for_each_entry(struct qblock, block, &c->blocks, link) + +#define qir_for_each_block_rev(block, c) \ + list_for_each_entry_rev(struct qblock, block, &c->blocks, link) + +/* Loop over the non-NULL members of the successors array. */ +#define qir_for_each_successor(succ, block) \ + for (struct qblock *succ = block->successors[0]; \ + succ != NULL; \ + succ = (succ == block->successors[1] ? NULL : \ + block->successors[1])) + +#define qir_for_each_inst(inst, block) \ + list_for_each_entry(struct qinst, inst, &block->instructions, link) + +#define qir_for_each_inst_rev(inst, block) \ + list_for_each_entry_rev(struct qinst, inst, &block->instructions, link) + +#define qir_for_each_inst_safe(inst, block) \ + list_for_each_entry_safe(struct qinst, inst, &block->instructions, link) + +#define qir_for_each_inst_inorder(inst, c) \ + qir_for_each_block(_block, c) \ + qir_for_each_inst_safe(inst, _block) + #endif /* VC4_QIR_H */ diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_qir_live_variables.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_qir_live_variables.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_qir_live_variables.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_qir_live_variables.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,330 @@ +/* + * Copyright © 2012 Intel Corporation + * Copyright © 2016 Broadcom + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#define MAX_INSTRUCTION (1 << 30) + +#include "util/ralloc.h" +#include "util/register_allocate.h" +#include "vc4_context.h" +#include "vc4_qir.h" + +struct partial_update_state { + struct qinst *insts[4]; + uint8_t channels; +}; + +static uint32_t +int_hash(const void *key) +{ + return _mesa_hash_data(key, sizeof(int)); +} + +static bool +int_compare(const void *key1, const void *key2) +{ + return *(const int *)key1 == *(const int *)key2; +} + +static int +qir_reg_to_var(struct qreg reg) +{ + if (reg.file == QFILE_TEMP) + return reg.index; + + return -1; +} + +static void +qir_setup_use(struct vc4_compile *c, struct qblock *block, int ip, + struct qreg src) +{ + int var = qir_reg_to_var(src); + if (var == -1) + return; + + c->temp_start[var] = MIN2(c->temp_start[var], ip); + c->temp_end[var] = MAX2(c->temp_end[var], ip); + + /* The use[] bitset marks when the block makes + * use of a variable without having completely + * defined that variable within the block. + */ + if (!BITSET_TEST(block->def, var)) + BITSET_SET(block->use, var); +} + +static struct partial_update_state * +get_partial_update_state(struct hash_table *partial_update_ht, + struct qinst *inst) +{ + struct hash_entry *entry = + _mesa_hash_table_search(partial_update_ht, + &inst->dst.index); + if (entry) + return entry->data; + + struct partial_update_state *state = + rzalloc(partial_update_ht, struct partial_update_state); + + _mesa_hash_table_insert(partial_update_ht, &inst->dst.index, state); + + return state; +} + +static void +qir_setup_def(struct vc4_compile *c, struct qblock *block, int ip, + struct hash_table *partial_update_ht, struct qinst *inst) +{ + /* The def[] bitset marks when an initialization in a + * block completely screens off previous updates of + * that variable. + */ + int var = qir_reg_to_var(inst->dst); + if (var == -1) + return; + + c->temp_start[var] = MIN2(c->temp_start[var], ip); + c->temp_end[var] = MAX2(c->temp_end[var], ip); + + /* If we've already tracked this as a def, or already used it within + * the block, there's nothing to do. + */ + if (BITSET_TEST(block->use, var) || BITSET_TEST(block->def, var)) + return; + + /* Easy, common case: unconditional full register update. + * + * We treat conditioning on the exec mask as the same as not being + * conditional. This makes sure that if the register gets set on + * either side of an if, it is treated as being screened off before + * the if. Otherwise, if there was no intervening def, its live + * interval doesn't extend back to the start of he program, and if too + * many registers did that we'd fail to register allocate. + */ + if ((inst->cond == QPU_COND_ALWAYS || + inst->cond_is_exec_mask) && !inst->dst.pack) { + BITSET_SET(block->def, var); + return; + } + + /* Finally, look at the condition code and packing and mark it as a + * def. We need to make sure that we understand sequences + * instructions like: + * + * mov.zs t0, t1 + * mov.zc t0, t2 + * + * or: + * + * mmov t0.8a, t1 + * mmov t0.8b, t2 + * mmov t0.8c, t3 + * mmov t0.8d, t4 + * + * as defining the temp within the block, because otherwise dst's live + * range will get extended up the control flow to the top of the + * program. + */ + struct partial_update_state *state = + get_partial_update_state(partial_update_ht, inst); + uint8_t mask = qir_channels_written(inst); + + if (inst->cond == QPU_COND_ALWAYS) { + state->channels |= mask; + } else { + for (int i = 0; i < 4; i++) { + if (!(mask & (1 << i))) + continue; + + if (state->insts[i] && + state->insts[i]->cond == + qpu_cond_complement(inst->cond)) + state->channels |= 1 << i; + else + state->insts[i] = inst; + } + } + + if (state->channels == 0xf) + BITSET_SET(block->def, var); +} + +static void +sf_state_clear(struct hash_table *partial_update_ht) +{ + struct hash_entry *entry; + + hash_table_foreach(partial_update_ht, entry) { + struct partial_update_state *state = entry->data; + + for (int i = 0; i < 4; i++) { + if (state->insts[i] && state->insts[i]->cond) + state->insts[i] = NULL; + } + } +} + +/* Sets up the def/use arrays for when variables are used-before-defined or + * defined-before-used in the block. + * + * Also initializes the temp_start/temp_end to cover just the instruction IPs + * where the variable is used, which will be extended later in + * qir_compute_start_end(). + */ +static void +qir_setup_def_use(struct vc4_compile *c) +{ + struct hash_table *partial_update_ht = + _mesa_hash_table_create(c, int_hash, int_compare); + int ip = 0; + + qir_for_each_block(block, c) { + block->start_ip = ip; + + _mesa_hash_table_clear(partial_update_ht, NULL); + + qir_for_each_inst(inst, block) { + for (int i = 0; i < qir_get_nsrc(inst); i++) + qir_setup_use(c, block, ip, inst->src[i]); + + qir_setup_def(c, block, ip, partial_update_ht, inst); + + if (inst->sf) + sf_state_clear(partial_update_ht); + + switch (inst->op) { + case QOP_FRAG_Z: + case QOP_FRAG_W: + /* The payload registers have values + * implicitly loaded at the start of the + * program. + */ + if (inst->dst.file == QFILE_TEMP) + c->temp_start[inst->dst.index] = 0; + break; + default: + break; + } + ip++; + } + block->end_ip = ip; + } + + _mesa_hash_table_destroy(partial_update_ht, NULL); +} + +static bool +qir_live_variables_dataflow(struct vc4_compile *c, int bitset_words) +{ + bool cont = false; + + qir_for_each_block_rev(block, c) { + /* Update live_out: Any successor using the variable + * on entrance needs us to have the variable live on + * exit. + */ + qir_for_each_successor(succ, block) { + for (int i = 0; i < bitset_words; i++) { + BITSET_WORD new_live_out = (succ->live_in[i] & + ~block->live_out[i]); + if (new_live_out) { + block->live_out[i] |= new_live_out; + cont = true; + } + } + } + + /* Update live_in */ + for (int i = 0; i < bitset_words; i++) { + BITSET_WORD new_live_in = (block->use[i] | + (block->live_out[i] & + ~block->def[i])); + if (new_live_in & ~block->live_in[i]) { + block->live_in[i] |= new_live_in; + cont = true; + } + } + } + + return cont; +} + +/** + * Extend the start/end ranges for each variable to account for the + * new information calculated from control flow. + */ +static void +qir_compute_start_end(struct vc4_compile *c, int num_vars) +{ + qir_for_each_block(block, c) { + for (int i = 0; i < num_vars; i++) { + if (BITSET_TEST(block->live_in, i)) { + c->temp_start[i] = MIN2(c->temp_start[i], + block->start_ip); + c->temp_end[i] = MAX2(c->temp_end[i], + block->start_ip); + } + + if (BITSET_TEST(block->live_out, i)) { + c->temp_start[i] = MIN2(c->temp_start[i], + block->end_ip); + c->temp_end[i] = MAX2(c->temp_end[i], + block->end_ip); + } + } + } +} + +void +qir_calculate_live_intervals(struct vc4_compile *c) +{ + int bitset_words = BITSET_WORDS(c->num_temps); + + /* If we called this function more than once, then we should be + * freeing the previous arrays. + */ + assert(!c->temp_start); + + c->temp_start = rzalloc_array(c, int, c->num_temps); + c->temp_end = rzalloc_array(c, int, c->num_temps); + + for (int i = 0; i < c->num_temps; i++) { + c->temp_start[i] = MAX_INSTRUCTION; + c->temp_end[i] = -1; + } + + qir_for_each_block(block, c) { + block->def = rzalloc_array(c, BITSET_WORD, bitset_words); + block->use = rzalloc_array(c, BITSET_WORD, bitset_words); + block->live_in = rzalloc_array(c, BITSET_WORD, bitset_words); + block->live_out = rzalloc_array(c, BITSET_WORD, bitset_words); + } + + qir_setup_def_use(c); + + while (qir_live_variables_dataflow(c, bitset_words)) + ; + + qir_compute_start_end(c, c->num_temps); +} diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_qir_lower_uniforms.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_qir_lower_uniforms.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_qir_lower_uniforms.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_qir_lower_uniforms.c 2017-06-01 10:37:10.000000000 +0000 @@ -77,7 +77,7 @@ if (inst->src[i].file != QFILE_UNIF) return false; if (qir_is_tex(inst)) - return i != 1; + return i != qir_get_tex_uniform_src(inst); return true; } @@ -89,7 +89,7 @@ { uint32_t count = 0; - for (int i = 0; i < qir_get_op_nsrc(inst->op); i++) { + for (int i = 0; i < qir_get_nsrc(inst); i++) { if (inst->src[i].file != QFILE_UNIF) continue; @@ -118,8 +118,8 @@ * than one uniform referenced, and add those uniform values to the * ht. */ - list_for_each_entry(struct qinst, inst, &c->instructions, link) { - uint32_t nsrc = qir_get_op_nsrc(inst->op); + qir_for_each_inst_inorder(inst, c) { + uint32_t nsrc = qir_get_nsrc(inst); if (qir_get_instruction_uniform_count(inst) <= 1) continue; @@ -146,41 +146,56 @@ } } + struct qreg unif = qir_reg(QFILE_UNIF, max_index); + /* Now, find the instructions using this uniform and make them * reference a temp instead. */ - struct qreg temp = qir_get_temp(c); - struct qreg unif = qir_reg(QFILE_UNIF, max_index); - struct qinst *mov = qir_inst(QOP_MOV, temp, unif, c->undef); - list_add(&mov->link, &c->instructions); - c->defs[temp.index] = mov; - list_for_each_entry(struct qinst, inst, &c->instructions, link) { - uint32_t nsrc = qir_get_op_nsrc(inst->op); - - uint32_t count = qir_get_instruction_uniform_count(inst); - - if (count <= 1) - continue; - - bool removed = false; - for (int i = 0; i < nsrc; i++) { - if (is_lowerable_uniform(inst, i) && - inst->src[i].index == max_index) { - inst->src[i] = temp; - remove_uniform(ht, unif); - removed = true; + qir_for_each_block(block, c) { + struct qinst *mov = NULL; + + qir_for_each_inst(inst, block) { + uint32_t nsrc = qir_get_nsrc(inst); + + uint32_t count = qir_get_instruction_uniform_count(inst); + + if (count <= 1) + continue; + + /* If the block doesn't have a load of hte + * uniform yet, add it. We could potentially + * do better and CSE MOVs from multiple blocks + * into dominating blocks, except that may + * cause troubles for register allocation. + */ + if (!mov) { + mov = qir_inst(QOP_MOV, qir_get_temp(c), + unif, c->undef); + list_add(&mov->link, + &block->instructions); + c->defs[mov->dst.index] = mov; } - } - if (removed) - count--; - /* If the instruction doesn't need lowering any more, - * then drop it from the list. - */ - if (count <= 1) { + bool removed = false; for (int i = 0; i < nsrc; i++) { - if (is_lowerable_uniform(inst, i)) - remove_uniform(ht, inst->src[i]); + if (is_lowerable_uniform(inst, i) && + inst->src[i].index == max_index) { + inst->src[i] = mov->dst; + remove_uniform(ht, unif); + removed = true; + } + } + if (removed) + count--; + + /* If the instruction doesn't need lowering any more, + * then drop it from the list. + */ + if (count <= 1) { + for (int i = 0; i < nsrc; i++) { + if (is_lowerable_uniform(inst, i)) + remove_uniform(ht, inst->src[i]); + } } } } diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_qir_schedule.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_qir_schedule.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_qir_schedule.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_qir_schedule.c 2017-06-01 10:37:10.000000000 +0000 @@ -138,6 +138,7 @@ struct schedule_node *last_tex_coord; struct schedule_node *last_tex_result; struct schedule_node *last_tlb; + struct schedule_node *last_uniforms_reset; enum direction dir; /** @@ -186,7 +187,7 @@ * ignore uniforms accesses, because qir_reorder_uniforms() happens * after this. */ - for (int i = 0; i < qir_get_op_nsrc(inst->op); i++) { + for (int i = 0; i < qir_get_nsrc(inst); i++) { switch (inst->src[i].file) { case QFILE_TEMP: add_dep(dir, @@ -211,23 +212,35 @@ add_dep(dir, state->last_vary_read, n); break; - case QOP_TEX_S: - case QOP_TEX_T: - case QOP_TEX_R: - case QOP_TEX_B: - case QOP_TEX_DIRECT: - /* Texturing setup gets scheduled in order, because - * the uniforms referenced by them have to land in a - * specific order. - */ - add_write_dep(dir, &state->last_tex_coord, n); - break; - case QOP_TEX_RESULT: /* Results have to be fetched in order. */ add_write_dep(dir, &state->last_tex_result, n); break; + case QOP_THRSW: + /* After a new THRSW, one must collect all texture samples + * queued since the previous THRSW/program start. For now, we + * have one THRSW in between each texture setup and its + * results collection as our input, and we just make sure that + * that ordering is maintained. + */ + add_write_dep(dir, &state->last_tex_coord, n); + add_write_dep(dir, &state->last_tex_result, n); + + /* accumulators and flags are lost across thread switches. */ + add_write_dep(dir, &state->last_sf, n); + + /* Setup, like the varyings, will need to be drained before we + * thread switch. + */ + add_write_dep(dir, &state->last_vary_read, n); + + /* The TLB-locking operations have to stay after the last + * thread switch. + */ + add_write_dep(dir, &state->last_tlb, n); + break; + case QOP_TLB_COLOR_READ: case QOP_MS_MASK: add_write_dep(dir, &state->last_tlb, n); @@ -253,6 +266,18 @@ add_write_dep(dir, &state->last_tlb, n); break; + case QFILE_TEX_S_DIRECT: + case QFILE_TEX_S: + case QFILE_TEX_T: + case QFILE_TEX_R: + case QFILE_TEX_B: + /* Texturing setup gets scheduled in order, because + * the uniforms referenced by them have to land in a + * specific order. + */ + add_write_dep(dir, &state->last_tex_coord, n); + break; + default: break; } @@ -280,26 +305,69 @@ calculate_deps(&state, n); - switch (inst->op) { - case QOP_TEX_S: - case QOP_TEX_T: - case QOP_TEX_R: - case QOP_TEX_B: - case QOP_TEX_DIRECT: - /* If the texture coordinate fifo is full, - * block this on the last QOP_TEX_RESULT. + for (int i = 0; i < qir_get_nsrc(inst); i++) { + switch (inst->src[i].file) { + case QFILE_UNIF: + add_dep(state.dir, state.last_uniforms_reset, n); + break; + default: + break; + } + } + + switch (inst->dst.file) { + case QFILE_TEX_S_DIRECT: + case QFILE_TEX_S: + case QFILE_TEX_T: + case QFILE_TEX_R: + case QFILE_TEX_B: + /* From the VC4 spec: + * + * "The TFREQ input FIFO holds two full lots of s, + * t, r, b data, plus associated setup data, per + * QPU, that is, there are eight data slots. For + * each texture request, slots are only consumed + * for the components of s, t, r, and b actually + * written. Thus the FIFO can hold four requests + * of just (s, t) data, or eight requests of just + * s data (for direct addressed data lookups). + * + * Note that there is one FIFO per QPU, and the + * FIFO has no concept of threads - that is, + * multi-threaded shaders must be careful to use + * only 1/2 the FIFO depth before reading + * back. Multi-threaded programs must also + * therefore always thread switch on texture + * fetch as the other thread may have data + * waiting in the FIFO." + * + * If the texture coordinate fifo is full, block this + * on the last QOP_TEX_RESULT. */ - if (state.tfreq_count == 8) { + if (state.tfreq_count == (c->fs_threaded ? 4 : 8)) { block_until_tex_result(&state, n); } - /* If the texture result fifo is full, block - * adding any more to it until the last - * QOP_TEX_RESULT. + /* From the VC4 spec: + * + * "Since the maximum number of texture requests + * in the input (TFREQ) FIFO is four lots of (s, + * t) data, the output (TFRCV) FIFO is sized to + * holds four lots of max-size color data per + * QPU. For non-float color, reads are packed + * RGBA8888 data (one read per pixel). For 16-bit + * float color, two reads are necessary per + * pixel, with reads packed as RG1616 then + * BA1616. So per QPU there are eight color slots + * in the TFRCV FIFO." + * + * If the texture result fifo is full, block adding + * any more to it until the last QOP_TEX_RESULT. */ - if (inst->op == QOP_TEX_S || - inst->op == QOP_TEX_DIRECT) { - if (state.tfrcv_count == 4) + if (inst->dst.file == QFILE_TEX_S || + inst->dst.file == QFILE_TEX_S_DIRECT) { + if (state.tfrcv_count == + (c->fs_threaded ? 2 : 4)) block_until_tex_result(&state, n); state.tfrcv_count++; } @@ -308,6 +376,11 @@ state.tfreq_count++; break; + default: + break; + } + + switch (inst->op) { case QOP_TEX_RESULT: /* Results have to be fetched after the * coordinate setup. Note that we're assuming @@ -324,8 +397,12 @@ memset(&state.tex_fifo[state.tex_fifo_pos], 0, sizeof(state.tex_fifo[0])); break; + + case QOP_UNIFORMS_RESET: + add_write_dep(state.dir, &state.last_uniforms_reset, n); + break; + default: - assert(!qir_is_tex(inst)); break; } } @@ -356,7 +433,7 @@ state->temp_writes[inst->dst.index] == 1) cost--; - for (int i = 0; i < qir_get_op_nsrc(inst->op); i++) { + for (int i = 0; i < qir_get_nsrc(inst); i++) { if (inst->src[i].file == QFILE_TEMP && !BITSET_TEST(state->temp_live, inst->src[i].index)) { cost++; @@ -388,6 +465,14 @@ struct schedule_node *chosen = NULL; list_for_each_entry(struct schedule_node, n, &state->worklist, link) { + /* The branches aren't being tracked as dependencies. Make + * sure that they stay scheduled as the last instruction of + * the block, which is to say the first one we choose to + * schedule. + */ + if (n->inst->op == QOP_BRANCH) + return n; + if (!chosen) { chosen = n; continue; @@ -407,7 +492,7 @@ } /* If we would block on the previously chosen node, but would - * block less on this one, then then prefer it. + * block less on this one, then prefer it. */ if (chosen->unblocked_time > state->time && n->unblocked_time < chosen->unblocked_time) { @@ -479,11 +564,33 @@ static uint32_t latency_between(struct schedule_node *before, struct schedule_node *after) { - if ((before->inst->op == QOP_TEX_S || - before->inst->op == QOP_TEX_DIRECT) && + if ((before->inst->dst.file == QFILE_TEX_S || + before->inst->dst.file == QFILE_TEX_S_DIRECT) && after->inst->op == QOP_TEX_RESULT) return 100; + switch (before->inst->op) { + case QOP_RCP: + case QOP_RSQ: + case QOP_EXP2: + case QOP_LOG2: + for (int i = 0; i < qir_get_nsrc(after->inst); i++) { + if (after->inst->src[i].file == + before->inst->dst.file && + after->inst->src[i].index == + before->inst->dst.index) { + /* There are two QPU delay slots before we can + * read a math result, which could be up to 4 + * QIR instructions if they packed well. + */ + return 4; + } + } + break; + default: + break; + } + return 1; } @@ -508,13 +615,14 @@ compute_delay(n->children[i]); n->delay = MAX2(n->delay, n->children[i]->delay + - latency_between(n, n->children[i])); + latency_between(n->children[i], n)); } } } static void -schedule_instructions(struct vc4_compile *c, struct schedule_state *state) +schedule_instructions(struct vc4_compile *c, + struct qblock *block, struct schedule_state *state) { if (debug) { fprintf(stderr, "initial deps:\n"); @@ -546,7 +654,7 @@ /* Schedule this instruction back onto the QIR list. */ list_del(&chosen->link); - list_add(&inst->link, &c->instructions); + list_add(&inst->link, &block->instructions); /* Now that we've scheduled a new instruction, some of its * children can be promoted to the list of instructions ready to @@ -558,15 +666,15 @@ child->unblocked_time = MAX2(child->unblocked_time, state->time + - latency_between(chosen, - child)); + latency_between(child, + chosen)); child->parent_count--; if (child->parent_count == 0) list_add(&child->link, &state->worklist); } /* Update our tracking of register pressure. */ - for (int i = 0; i < qir_get_op_nsrc(inst->op); i++) { + for (int i = 0; i < qir_get_nsrc(inst); i++) { if (inst->src[i].file == QFILE_TEMP) BITSET_SET(state->temp_live, inst->src[i].index); } @@ -580,24 +688,20 @@ } } -void -qir_schedule_instructions(struct vc4_compile *c) +static void +qir_schedule_instructions_block(struct vc4_compile *c, + struct qblock *block) { void *mem_ctx = ralloc_context(NULL); struct schedule_state state = { { 0 } }; - if (debug) { - fprintf(stderr, "Pre-schedule instructions\n"); - qir_dump(c); - } - state.temp_writes = rzalloc_array(mem_ctx, uint32_t, c->num_temps); state.temp_live = rzalloc_array(mem_ctx, BITSET_WORD, BITSET_WORDS(c->num_temps)); list_inithead(&state.worklist); /* Wrap each instruction in a scheduler structure. */ - list_for_each_entry_safe(struct qinst, inst, &c->instructions, link) { + qir_for_each_inst_safe(inst, block) { struct schedule_node *n = rzalloc(mem_ctx, struct schedule_node); n->inst = inst; @@ -616,12 +720,25 @@ list_for_each_entry(struct schedule_node, n, &state.worklist, link) compute_delay(n); - schedule_instructions(c, &state); + schedule_instructions(c, block, &state); + + ralloc_free(mem_ctx); +} + +void +qir_schedule_instructions(struct vc4_compile *c) +{ if (debug) { - fprintf(stderr, "Post-schedule instructions\n"); + fprintf(stderr, "Pre-schedule instructions\n"); qir_dump(c); } - ralloc_free(mem_ctx); + qir_for_each_block(block, c) + qir_schedule_instructions_block(c, block); + + if (debug) { + fprintf(stderr, "Post-schedule instructions\n"); + qir_dump(c); + } } diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_qir_validate.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_qir_validate.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_qir_validate.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_qir_validate.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,10 +25,10 @@ #include "vc4_qpu.h" static void -fail_instr(struct qinst *inst, const char *msg) +fail_instr(struct vc4_compile *c, struct qinst *inst, const char *msg) { fprintf(stderr, "qir_validate: %s: ", msg); - qir_dump_inst(stderr, inst); + qir_dump_inst(c, inst); fprintf(stderr, "\n"); abort(); } @@ -50,18 +50,18 @@ struct qinst *def = c->defs[i]; if (def && def->cond != QPU_COND_ALWAYS) - fail_instr(def, "SSA def with condition"); + fail_instr(c, def, "SSA def with condition"); } - list_for_each_entry(struct qinst, inst, &c->instructions, link) { + qir_for_each_inst_inorder(inst, c) { switch (inst->dst.file) { case QFILE_TEMP: if (inst->dst.index >= c->num_temps) - fail_instr(inst, "bad temp index"); + fail_instr(c, inst, "bad temp index"); if (c->defs[inst->dst.index] && already_assigned[inst->dst.index]) { - fail_instr(inst, "Re-assignment of SSA value"); + fail_instr(c, inst, "Re-assignment of SSA value"); } already_assigned[inst->dst.index] = true; break; @@ -79,37 +79,58 @@ case QFILE_FRAG_X: case QFILE_FRAG_Y: case QFILE_FRAG_REV_FLAG: + case QFILE_QPU_ELEMENT: case QFILE_SMALL_IMM: case QFILE_LOAD_IMM: - fail_instr(inst, "Bad dest file"); + fail_instr(c, inst, "Bad dest file"); + break; + + case QFILE_TEX_S: + case QFILE_TEX_T: + case QFILE_TEX_R: + case QFILE_TEX_B: + if (inst->src[qir_get_tex_uniform_src(inst)].file != + QFILE_UNIF) { + fail_instr(c, inst, + "tex op missing implicit uniform"); + } + break; + + case QFILE_TEX_S_DIRECT: + if (inst->op != QOP_ADD) { + fail_instr(c, inst, + "kernel validation requires that " + "direct texture lookups use an ADD"); + } break; } - for (int i = 0; i < qir_get_op_nsrc(inst->op); i++) { + for (int i = 0; i < qir_get_nsrc(inst); i++) { struct qreg src = inst->src[i]; switch (src.file) { case QFILE_TEMP: if (src.index >= c->num_temps) - fail_instr(inst, "bad temp index"); + fail_instr(c, inst, "bad temp index"); break; case QFILE_VARY: case QFILE_UNIF: case QFILE_VPM: case QFILE_LOAD_IMM: + case QFILE_QPU_ELEMENT: break; case QFILE_SMALL_IMM: if (qpu_encode_small_immediate(src.index) == ~0) - fail_instr(inst, "bad small immediate"); + fail_instr(c, inst, "bad small immediate"); break; case QFILE_FRAG_X: case QFILE_FRAG_Y: case QFILE_FRAG_REV_FLAG: if (c->stage != QSTAGE_FRAG) - fail_instr(inst, "frag access in VS/CS"); + fail_instr(c, inst, "frag access in VS/CS"); break; case QFILE_NULL: @@ -117,7 +138,12 @@ case QFILE_TLB_COLOR_WRITE_MS: case QFILE_TLB_Z_WRITE: case QFILE_TLB_STENCIL_SETUP: - fail_instr(inst, "Bad src file"); + case QFILE_TEX_S_DIRECT: + case QFILE_TEX_S: + case QFILE_TEX_T: + case QFILE_TEX_R: + case QFILE_TEX_B: + fail_instr(c, inst, "Bad src file"); break; } } diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_qpu.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_qpu.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_qpu.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_qpu.c 2017-06-01 10:37:10.000000000 +0000 @@ -165,6 +165,34 @@ } uint64_t +qpu_load_imm_u2(struct qpu_reg dst, uint32_t val) +{ + return qpu_load_imm_ui(dst, val) | QPU_SET_FIELD(QPU_LOAD_IMM_MODE_U2, + QPU_LOAD_IMM_MODE); +} + +uint64_t +qpu_load_imm_i2(struct qpu_reg dst, uint32_t val) +{ + return qpu_load_imm_ui(dst, val) | QPU_SET_FIELD(QPU_LOAD_IMM_MODE_I2, + QPU_LOAD_IMM_MODE); +} + +uint64_t +qpu_branch(uint32_t cond, uint32_t target) +{ + uint64_t inst = 0; + + inst |= qpu_a_dst(qpu_ra(QPU_W_NOP)); + inst |= qpu_m_dst(qpu_rb(QPU_W_NOP)); + inst |= QPU_SET_FIELD(cond, QPU_BRANCH_COND); + inst |= QPU_SET_FIELD(QPU_SIG_BRANCH, QPU_SIG); + inst |= QPU_SET_FIELD(target, QPU_BRANCH_TARGET); + + return inst; +} + +uint64_t qpu_a_alu2(enum qpu_op_add op, struct qpu_reg dst, struct qpu_reg src0, struct qpu_reg src1) { @@ -206,6 +234,19 @@ return inst; } +uint64_t +qpu_m_rot(struct qpu_reg dst, struct qpu_reg src0, int rot) +{ + uint64_t inst = 0; + inst = qpu_m_alu2(QPU_M_V8MIN, dst, src0, src0); + + inst = QPU_UPDATE_FIELD(inst, QPU_SIG_SMALL_IMM, QPU_SIG); + inst = QPU_UPDATE_FIELD(inst, QPU_SMALL_IMM_MUL_ROT + rot, + QPU_SMALL_IMM); + + return inst; +} + static bool merge_fields(uint64_t *merge, uint64_t a, uint64_t b, @@ -282,6 +323,7 @@ case QPU_W_ACC1: case QPU_W_ACC2: case QPU_W_ACC3: + case QPU_W_NOP: case QPU_W_TLB_Z: case QPU_W_TLB_COLOR_MS: case QPU_W_TLB_COLOR_ALL: @@ -446,7 +488,9 @@ if (a_sig == QPU_SIG_LOAD_IMM || b_sig == QPU_SIG_LOAD_IMM || a_sig == QPU_SIG_SMALL_IMM || - b_sig == QPU_SIG_SMALL_IMM) { + b_sig == QPU_SIG_SMALL_IMM || + a_sig == QPU_SIG_BRANCH || + b_sig == QPU_SIG_BRANCH) { return 0; } diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_qpu_defines.h mesa-17.0.7/src/gallium/drivers/vc4/vc4_qpu_defines.h --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_qpu_defines.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_qpu_defines.h 2017-06-01 10:37:10.000000000 +0000 @@ -165,6 +165,23 @@ QPU_COND_CC, }; +enum qpu_branch_cond { + QPU_COND_BRANCH_ALL_ZS, + QPU_COND_BRANCH_ALL_ZC, + QPU_COND_BRANCH_ANY_ZS, + QPU_COND_BRANCH_ANY_ZC, + QPU_COND_BRANCH_ALL_NS, + QPU_COND_BRANCH_ALL_NC, + QPU_COND_BRANCH_ANY_NS, + QPU_COND_BRANCH_ANY_NC, + QPU_COND_BRANCH_ALL_CS, + QPU_COND_BRANCH_ALL_CC, + QPU_COND_BRANCH_ANY_CS, + QPU_COND_BRANCH_ANY_CC, + + QPU_COND_BRANCH_ALWAYS = 15 +}; + enum qpu_pack_mul { QPU_PACK_MUL_NOP, QPU_PACK_MUL_8888 = 3, /* replicated to each 8 bits of the 32-bit dst. */ @@ -229,6 +246,12 @@ #define QPU_UNPACK_SHIFT 57 #define QPU_UNPACK_MASK QPU_MASK(59, 57) +#define QPU_LOAD_IMM_MODE_SHIFT 57 +#define QPU_LOAD_IMM_MODE_MASK QPU_MASK(59, 57) +# define QPU_LOAD_IMM_MODE_U32 0 +# define QPU_LOAD_IMM_MODE_I2 1 +# define QPU_LOAD_IMM_MODE_U2 3 + /** * If set, the pack field means PACK_MUL or R4 packing, instead of normal * regfile a packing. @@ -243,6 +266,16 @@ #define QPU_COND_MUL_SHIFT 46 #define QPU_COND_MUL_MASK QPU_MASK(48, 46) + +#define QPU_BRANCH_COND_SHIFT 52 +#define QPU_BRANCH_COND_MASK QPU_MASK(55, 52) + +#define QPU_BRANCH_REL ((uint64_t)1 << 51) +#define QPU_BRANCH_REG ((uint64_t)1 << 50) + +#define QPU_BRANCH_RADDR_A_SHIFT 45 +#define QPU_BRANCH_RADDR_A_MASK QPU_MASK(49, 45) + #define QPU_SF ((uint64_t)1 << 45) #define QPU_WADDR_ADD_SHIFT 38 @@ -259,6 +292,10 @@ #define QPU_RADDR_B_MASK QPU_MASK(17, 12) #define QPU_SMALL_IMM_SHIFT 12 #define QPU_SMALL_IMM_MASK QPU_MASK(17, 12) +/* Small immediate value for rotate-by-r5, and 49-63 are "rotate by n + * channels" + */ +#define QPU_SMALL_IMM_MUL_ROT 48 #define QPU_ADD_A_SHIFT 9 #define QPU_ADD_A_MASK QPU_MASK(11, 9) @@ -274,4 +311,10 @@ #define QPU_OP_ADD_SHIFT 24 #define QPU_OP_ADD_MASK QPU_MASK(28, 24) +#define QPU_LOAD_IMM_SHIFT 0 +#define QPU_LOAD_IMM_MASK QPU_MASK(31, 0) + +#define QPU_BRANCH_TARGET_SHIFT 0 +#define QPU_BRANCH_TARGET_MASK QPU_MASK(31, 0) + #endif /* VC4_QPU_DEFINES_H */ diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_qpu_disasm.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_qpu_disasm.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_qpu_disasm.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_qpu_disasm.c 2017-06-01 10:37:10.000000000 +0000 @@ -86,11 +86,11 @@ static const char *qpu_pack_mul[] = { [QPU_PACK_MUL_NOP] = "", - [QPU_PACK_MUL_8888] = "8888", - [QPU_PACK_MUL_8A] = "8a", - [QPU_PACK_MUL_8B] = "8b", - [QPU_PACK_MUL_8C] = "8c", - [QPU_PACK_MUL_8D] = "8d", + [QPU_PACK_MUL_8888] = ".8888", + [QPU_PACK_MUL_8A] = ".8a", + [QPU_PACK_MUL_8B] = ".8b", + [QPU_PACK_MUL_8C] = ".8c", + [QPU_PACK_MUL_8D] = ".8d", }; /* The QPU unpack for A and R4 files can be described the same, it's just that @@ -224,6 +224,22 @@ [QPU_COND_CC] = ".cc", }; +static const char *qpu_cond_branch[] = { + [QPU_COND_BRANCH_ALL_ZS] = ".all_zs", + [QPU_COND_BRANCH_ALL_ZC] = ".all_zc", + [QPU_COND_BRANCH_ANY_ZS] = ".any_zs", + [QPU_COND_BRANCH_ANY_ZC] = ".any_zc", + [QPU_COND_BRANCH_ALL_NS] = ".all_ns", + [QPU_COND_BRANCH_ALL_NC] = ".all_nc", + [QPU_COND_BRANCH_ANY_NS] = ".any_ns", + [QPU_COND_BRANCH_ANY_NC] = ".any_nc", + [QPU_COND_BRANCH_ALL_CS] = ".all_cs", + [QPU_COND_BRANCH_ALL_CC] = ".all_cc", + [QPU_COND_BRANCH_ANY_CS] = ".any_cs", + [QPU_COND_BRANCH_ANY_CC] = ".any_cc", + [QPU_COND_BRANCH_ALWAYS] = "", +}; + #define DESC(array, index) \ ((index >= ARRAY_SIZE(array) || !(array)[index]) ? \ "???" : (array)[index]) @@ -248,7 +264,7 @@ void vc4_qpu_disasm_pack_mul(FILE *out, uint32_t pack) { - fprintf(out, ".%s", DESC(qpu_pack_mul, pack)); + fprintf(out, "%s", DESC(qpu_pack_mul, pack)); } void @@ -270,6 +286,12 @@ fprintf(out, "%s", DESC(qpu_cond, cond)); } +void +vc4_qpu_disasm_cond_branch(FILE *out, uint32_t cond) +{ + fprintf(out, "%s", DESC(qpu_cond_branch, cond)); +} + static void print_alu_dst(uint64_t inst, bool is_mul) { @@ -295,7 +317,7 @@ } static void -print_alu_src(uint64_t inst, uint32_t mux) +print_alu_src(uint64_t inst, uint32_t mux, bool is_mul) { bool is_a = mux != QPU_MUX_B; const char *file = is_a ? "a" : "b"; @@ -303,12 +325,14 @@ QPU_GET_FIELD(inst, QPU_RADDR_A) : QPU_GET_FIELD(inst, QPU_RADDR_B)); uint32_t unpack = QPU_GET_FIELD(inst, QPU_UNPACK); + bool has_si = QPU_GET_FIELD(inst, QPU_SIG) == QPU_SIG_SMALL_IMM; + uint32_t si = QPU_GET_FIELD(inst, QPU_SMALL_IMM); - if (mux <= QPU_MUX_R5) + if (mux <= QPU_MUX_R5) { fprintf(stderr, "r%d", mux); - else if (!is_a && - QPU_GET_FIELD(inst, QPU_SIG) == QPU_SIG_SMALL_IMM) { - uint32_t si = QPU_GET_FIELD(inst, QPU_SMALL_IMM); + if (has_si && is_mul && si >= QPU_SMALL_IMM_MUL_ROT + 1) + fprintf(stderr, "+%d", si - QPU_SMALL_IMM_MUL_ROT); + } else if (!is_a && has_si) { if (si <= 15) fprintf(stderr, "%d", si); else if (si <= 31) @@ -358,12 +382,12 @@ print_alu_dst(inst, false); fprintf(stderr, ", "); - print_alu_src(inst, QPU_GET_FIELD(inst, QPU_ADD_A)); + print_alu_src(inst, QPU_GET_FIELD(inst, QPU_ADD_A), false); if (!is_mov) { fprintf(stderr, ", "); - print_alu_src(inst, QPU_GET_FIELD(inst, QPU_ADD_B)); + print_alu_src(inst, QPU_GET_FIELD(inst, QPU_ADD_B), false); } } @@ -392,11 +416,11 @@ print_alu_dst(inst, true); fprintf(stderr, ", "); - print_alu_src(inst, QPU_GET_FIELD(inst, QPU_MUL_A)); + print_alu_src(inst, QPU_GET_FIELD(inst, QPU_MUL_A), true); if (!is_mov) { fprintf(stderr, ", "); - print_alu_src(inst, QPU_GET_FIELD(inst, QPU_MUL_B)); + print_alu_src(inst, QPU_GET_FIELD(inst, QPU_MUL_B), true); } } @@ -434,7 +458,13 @@ switch (sig) { case QPU_SIG_BRANCH: fprintf(stderr, "branch"); + vc4_qpu_disasm_cond_branch(stderr, + QPU_GET_FIELD(inst, + QPU_BRANCH_COND)); + + fprintf(stderr, " %d", (uint32_t)inst); break; + case QPU_SIG_LOAD_IMM: print_load_imm(inst); break; diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_qpu_emit.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_qpu_emit.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_qpu_emit.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_qpu_emit.c 2017-06-01 10:37:10.000000000 +0000 @@ -44,31 +44,31 @@ } static void -queue(struct vc4_compile *c, uint64_t inst) +queue(struct qblock *block, uint64_t inst) { - struct queued_qpu_inst *q = rzalloc(c, struct queued_qpu_inst); + struct queued_qpu_inst *q = rzalloc(block, struct queued_qpu_inst); q->inst = inst; - list_addtail(&q->link, &c->qpu_inst_list); + list_addtail(&q->link, &block->qpu_inst_list); } static uint64_t * -last_inst(struct vc4_compile *c) +last_inst(struct qblock *block) { struct queued_qpu_inst *q = - (struct queued_qpu_inst *)c->qpu_inst_list.prev; + (struct queued_qpu_inst *)block->qpu_inst_list.prev; return &q->inst; } static void -set_last_cond_add(struct vc4_compile *c, uint32_t cond) +set_last_cond_add(struct qblock *block, uint32_t cond) { - *last_inst(c) = qpu_set_cond_add(*last_inst(c), cond); + *last_inst(block) = qpu_set_cond_add(*last_inst(block), cond); } static void -set_last_cond_mul(struct vc4_compile *c, uint32_t cond) +set_last_cond_mul(struct qblock *block, uint32_t cond) { - *last_inst(c) = qpu_set_cond_mul(*last_inst(c), cond); + *last_inst(block) = qpu_set_cond_mul(*last_inst(block), cond); } /** @@ -97,16 +97,70 @@ } /** + * Sets up the VPM read FIFO before we do any VPM read. + * + * VPM reads (vertex attribute input) and VPM writes (varyings output) from + * the QPU reuse the VRI (varying interpolation) block's FIFOs to talk to the + * VPM block. In the VS/CS (unlike in the FS), the block starts out + * uninitialized, and you need to emit setup to the block before any VPM + * reads/writes. + * + * VRI has a FIFO in each direction, with each FIFO able to hold four + * 32-bit-per-vertex values. VPM reads come through the read FIFO and VPM + * writes go through the write FIFO. The read/write setup values from QPU go + * through the write FIFO as well, with a sideband signal indicating that + * they're setup values. Once a read setup reaches the other side of the + * FIFO, the VPM block will start asynchronously reading vertex attributes and + * filling the read FIFO -- that way hopefully the QPU doesn't have to block + * on reads later. + * + * VPM read setup can configure 16 32-bit-per-vertex values to be read at a + * time, which is 4 vec4s. If more than that is being read (since we support + * 8 vec4 vertex attributes), then multiple read setup writes need to be done. + * + * The existence of the FIFO makes it seem like you should be able to emit + * both setups for the 5-8 attribute cases and then do all the attribute + * reads. However, once the setup value makes it to the other end of the + * write FIFO, it will immediately update the VPM block's setup register. + * That updated setup register would be used for read FIFO fills from then on, + * breaking whatever remaining VPM values were supposed to be read into the + * read FIFO from the previous attribute set. + * + * As a result, we need to emit the read setup, pull every VPM read value from + * that setup, and only then emit the second setup if applicable. + */ +static void +setup_for_vpm_read(struct vc4_compile *c, struct qblock *block) +{ + if (c->num_inputs_in_fifo) { + c->num_inputs_in_fifo--; + return; + } + + c->num_inputs_in_fifo = MIN2(c->num_inputs_remaining, 16); + + queue(block, + qpu_load_imm_ui(qpu_vrsetup(), + c->vpm_read_offset | + 0x00001a00 | + ((c->num_inputs_in_fifo & 0xf) << 20))); + c->num_inputs_remaining -= c->num_inputs_in_fifo; + c->vpm_read_offset += c->num_inputs_in_fifo; + + c->num_inputs_in_fifo--; +} + +/** * This is used to resolve the fact that we might register-allocate two * different operands of an instruction to the same physical register file * even though instructions have only one field for the register file source * address. * * In that case, we need to move one to a temporary that can be used in the - * instruction, instead. We reserve ra31/rb31 for this purpose. + * instruction, instead. We reserve ra14/rb14 for this purpose. */ static void -fixup_raddr_conflict(struct vc4_compile *c, +fixup_raddr_conflict(struct qblock *block, struct qpu_reg dst, struct qpu_reg *src0, struct qpu_reg *src1, struct qinst *inst, uint64_t *unpack) @@ -129,39 +183,39 @@ * in case of unpacks. */ if (qir_is_float_input(inst)) - queue(c, qpu_a_FMAX(qpu_rb(31), *src0, *src0)); + queue(block, qpu_a_FMAX(qpu_rb(14), *src0, *src0)); else - queue(c, qpu_a_MOV(qpu_rb(31), *src0)); + queue(block, qpu_a_MOV(qpu_rb(14), *src0)); /* If we had an unpack on this A-file source, we need to put * it into this MOV, not into the later move from regfile B. */ if (inst->src[0].pack) { - *last_inst(c) |= *unpack; + *last_inst(block) |= *unpack; *unpack = 0; } - *src0 = qpu_rb(31); + *src0 = qpu_rb(14); } else { - queue(c, qpu_a_MOV(qpu_ra(31), *src0)); - *src0 = qpu_ra(31); + queue(block, qpu_a_MOV(qpu_ra(14), *src0)); + *src0 = qpu_ra(14); } } static void -set_last_dst_pack(struct vc4_compile *c, struct qinst *inst) +set_last_dst_pack(struct qblock *block, struct qinst *inst) { - bool had_pm = *last_inst(c) & QPU_PM; - bool had_ws = *last_inst(c) & QPU_WS; - uint32_t unpack = QPU_GET_FIELD(*last_inst(c), QPU_UNPACK); + bool had_pm = *last_inst(block) & QPU_PM; + bool had_ws = *last_inst(block) & QPU_WS; + uint32_t unpack = QPU_GET_FIELD(*last_inst(block), QPU_UNPACK); if (!inst->dst.pack) return; - *last_inst(c) |= QPU_SET_FIELD(inst->dst.pack, QPU_PACK); + *last_inst(block) |= QPU_SET_FIELD(inst->dst.pack, QPU_PACK); if (qir_is_mul(inst)) { assert(!unpack || had_pm); - *last_inst(c) |= QPU_PM; + *last_inst(block) |= QPU_PM; } else { assert(!unpack || !had_pm); assert(!had_ws); /* dst must be a-file to pack. */ @@ -169,51 +223,23 @@ } static void -handle_r4_qpu_write(struct vc4_compile *c, struct qinst *qinst, +handle_r4_qpu_write(struct qblock *block, struct qinst *qinst, struct qpu_reg dst) { if (dst.mux != QPU_MUX_R4) - queue(c, qpu_a_MOV(dst, qpu_r4())); + queue(block, qpu_a_MOV(dst, qpu_r4())); else if (qinst->sf) - queue(c, qpu_a_MOV(qpu_ra(QPU_W_NOP), qpu_r4())); + queue(block, qpu_a_MOV(qpu_ra(QPU_W_NOP), qpu_r4())); } -void -vc4_generate_code(struct vc4_context *vc4, struct vc4_compile *c) +static void +vc4_generate_code_block(struct vc4_compile *c, + struct qblock *block, + struct qpu_reg *temp_registers) { - struct qpu_reg *temp_registers = vc4_register_allocate(vc4, c); - uint32_t inputs_remaining = c->num_inputs; - uint32_t vpm_read_fifo_count = 0; - uint32_t vpm_read_offset = 0; int last_vpm_read_index = -1; - list_inithead(&c->qpu_inst_list); - - switch (c->stage) { - case QSTAGE_VERT: - case QSTAGE_COORD: - /* There's a 4-entry FIFO for VPMVCD reads, each of which can - * load up to 16 dwords (4 vec4s) per vertex. - */ - while (inputs_remaining) { - uint32_t num_entries = MIN2(inputs_remaining, 16); - queue(c, qpu_load_imm_ui(qpu_vrsetup(), - vpm_read_offset | - 0x00001a00 | - ((num_entries & 0xf) << 20))); - inputs_remaining -= num_entries; - vpm_read_offset += num_entries; - vpm_read_fifo_count++; - } - assert(vpm_read_fifo_count <= 4); - - queue(c, qpu_load_imm_ui(qpu_vwsetup(), 0x00001a00)); - break; - case QSTAGE_FRAG: - break; - } - - list_for_each_entry(struct qinst, qinst, &c->instructions, link) { + qir_for_each_inst(qinst, block) { #if 0 fprintf(stderr, "translating qinst to qpu: "); qir_dump_inst(qinst); @@ -259,11 +285,13 @@ [QOP_MOV] = { QPU_A_OR }, [QOP_FMOV] = { QPU_A_FMAX }, [QOP_MMOV] = { QPU_M_V8MIN }, + + [QOP_MIN_NOIMM] = { QPU_A_MIN }, }; uint64_t unpack = 0; - struct qpu_reg src[4]; - for (int i = 0; i < qir_get_op_nsrc(qinst->op); i++) { + struct qpu_reg src[ARRAY_SIZE(qinst->src)]; + for (int i = 0; i < qir_get_nsrc(qinst); i++) { int index = qinst->src[i].index; switch (qinst->src[i].file) { case QFILE_NULL: @@ -296,6 +324,7 @@ assert(src[i].addr <= 47); break; case QFILE_VPM: + setup_for_vpm_read(c, block); assert((int)qinst->src[i].index >= last_vpm_read_index); (void)last_vpm_read_index; @@ -312,11 +341,19 @@ case QFILE_FRAG_REV_FLAG: src[i] = qpu_rb(QPU_R_MS_REV_FLAGS); break; + case QFILE_QPU_ELEMENT: + src[i] = qpu_ra(QPU_R_ELEM_QPU); + break; case QFILE_TLB_COLOR_WRITE: case QFILE_TLB_COLOR_WRITE_MS: case QFILE_TLB_Z_WRITE: case QFILE_TLB_STENCIL_SETUP: + case QFILE_TEX_S: + case QFILE_TEX_S_DIRECT: + case QFILE_TEX_T: + case QFILE_TEX_R: + case QFILE_TEX_B: unreachable("bad qir src file"); } } @@ -349,6 +386,23 @@ dst = qpu_ra(QPU_W_TLB_STENCIL_SETUP); break; + case QFILE_TEX_S: + case QFILE_TEX_S_DIRECT: + dst = qpu_rb(QPU_W_TMU0_S); + break; + + case QFILE_TEX_T: + dst = qpu_rb(QPU_W_TMU0_T); + break; + + case QFILE_TEX_R: + dst = qpu_rb(QPU_W_TMU0_R); + break; + + case QFILE_TEX_B: + dst = qpu_rb(QPU_W_TMU0_B); + break; + case QFILE_VARY: case QFILE_UNIF: case QFILE_SMALL_IMM: @@ -356,6 +410,7 @@ case QFILE_FRAG_X: case QFILE_FRAG_Y: case QFILE_FRAG_REV_FLAG: + case QFILE_QPU_ELEMENT: assert(!"not reached"); break; } @@ -369,40 +424,63 @@ case QOP_LOG2: switch (qinst->op) { case QOP_RCP: - queue(c, qpu_a_MOV(qpu_rb(QPU_W_SFU_RECIP), - src[0]) | unpack); + queue(block, qpu_a_MOV(qpu_rb(QPU_W_SFU_RECIP), + src[0]) | unpack); break; case QOP_RSQ: - queue(c, qpu_a_MOV(qpu_rb(QPU_W_SFU_RECIPSQRT), - src[0]) | unpack); + queue(block, qpu_a_MOV(qpu_rb(QPU_W_SFU_RECIPSQRT), + src[0]) | unpack); break; case QOP_EXP2: - queue(c, qpu_a_MOV(qpu_rb(QPU_W_SFU_EXP), - src[0]) | unpack); + queue(block, qpu_a_MOV(qpu_rb(QPU_W_SFU_EXP), + src[0]) | unpack); break; case QOP_LOG2: - queue(c, qpu_a_MOV(qpu_rb(QPU_W_SFU_LOG), - src[0]) | unpack); + queue(block, qpu_a_MOV(qpu_rb(QPU_W_SFU_LOG), + src[0]) | unpack); break; default: abort(); } - handle_r4_qpu_write(c, qinst, dst); + handle_r4_qpu_write(block, qinst, dst); break; case QOP_LOAD_IMM: assert(qinst->src[0].file == QFILE_LOAD_IMM); - queue(c, qpu_load_imm_ui(dst, qinst->src[0].index)); + queue(block, qpu_load_imm_ui(dst, qinst->src[0].index)); + break; + + case QOP_LOAD_IMM_U2: + queue(block, qpu_load_imm_u2(dst, qinst->src[0].index)); + break; + + case QOP_LOAD_IMM_I2: + queue(block, qpu_load_imm_i2(dst, qinst->src[0].index)); + break; + + case QOP_ROT_MUL: + /* Rotation at the hardware level occurs on the inputs + * to the MUL unit, and they must be accumulators in + * order to have the time necessary to move things. + */ + assert(src[0].mux <= QPU_MUX_R3); + + queue(block, + qpu_m_rot(dst, src[0], qinst->src[1].index - + QPU_SMALL_IMM_MUL_ROT) | unpack); + set_last_cond_mul(block, qinst->cond); + handled_qinst_cond = true; + set_last_dst_pack(block, qinst); break; case QOP_MS_MASK: src[1] = qpu_ra(QPU_R_MS_REV_FLAGS); - fixup_raddr_conflict(c, dst, &src[0], &src[1], + fixup_raddr_conflict(block, dst, &src[0], &src[1], qinst, &unpack); - queue(c, qpu_a_AND(qpu_ra(QPU_W_MS_FLAGS), - src[0], src[1]) | unpack); + queue(block, qpu_a_AND(qpu_ra(QPU_W_MS_FLAGS), + src[0], src[1]) | unpack); break; case QOP_FRAG_Z: @@ -413,37 +491,46 @@ break; case QOP_TLB_COLOR_READ: - queue(c, qpu_NOP()); - *last_inst(c) = qpu_set_sig(*last_inst(c), - QPU_SIG_COLOR_LOAD); - handle_r4_qpu_write(c, qinst, dst); + queue(block, qpu_NOP()); + *last_inst(block) = qpu_set_sig(*last_inst(block), + QPU_SIG_COLOR_LOAD); + handle_r4_qpu_write(block, qinst, dst); break; case QOP_VARY_ADD_C: - queue(c, qpu_a_FADD(dst, src[0], qpu_r5()) | unpack); + queue(block, qpu_a_FADD(dst, src[0], qpu_r5()) | unpack); break; - case QOP_TEX_S: - case QOP_TEX_T: - case QOP_TEX_R: - case QOP_TEX_B: - queue(c, qpu_a_MOV(qpu_rb(QPU_W_TMU0_S + - (qinst->op - QOP_TEX_S)), - src[0]) | unpack); + + case QOP_TEX_RESULT: + queue(block, qpu_NOP()); + *last_inst(block) = qpu_set_sig(*last_inst(block), + QPU_SIG_LOAD_TMU0); + handle_r4_qpu_write(block, qinst, dst); + break; + + case QOP_THRSW: + queue(block, qpu_NOP()); + *last_inst(block) = qpu_set_sig(*last_inst(block), + QPU_SIG_THREAD_SWITCH); + c->last_thrsw = last_inst(block); + break; + + case QOP_BRANCH: + /* The branch target will be updated at QPU scheduling + * time. + */ + queue(block, (qpu_branch(qinst->cond, 0) | + QPU_BRANCH_REL)); + handled_qinst_cond = true; break; - case QOP_TEX_DIRECT: - fixup_raddr_conflict(c, dst, &src[0], &src[1], + case QOP_UNIFORMS_RESET: + fixup_raddr_conflict(block, dst, &src[0], &src[1], qinst, &unpack); - queue(c, qpu_a_ADD(qpu_rb(QPU_W_TMU0_S), - src[0], src[1]) | unpack); - break; - case QOP_TEX_RESULT: - queue(c, qpu_NOP()); - *last_inst(c) = qpu_set_sig(*last_inst(c), - QPU_SIG_LOAD_TMU0); - handle_r4_qpu_write(c, qinst, dst); + queue(block, qpu_a_ADD(qpu_ra(QPU_W_UNIFORMS_ADDRESS), + src[0], src[1])); break; default: @@ -460,25 +547,25 @@ * argument slot as well so that we don't take up * another raddr just to get unused data. */ - if (qir_get_op_nsrc(qinst->op) == 1) + if (qir_get_non_sideband_nsrc(qinst) == 1) src[1] = src[0]; - fixup_raddr_conflict(c, dst, &src[0], &src[1], + fixup_raddr_conflict(block, dst, &src[0], &src[1], qinst, &unpack); if (qir_is_mul(qinst)) { - queue(c, qpu_m_alu2(translate[qinst->op].op, - dst, - src[0], src[1]) | unpack); - set_last_cond_mul(c, qinst->cond); + queue(block, qpu_m_alu2(translate[qinst->op].op, + dst, + src[0], src[1]) | unpack); + set_last_cond_mul(block, qinst->cond); } else { - queue(c, qpu_a_alu2(translate[qinst->op].op, - dst, - src[0], src[1]) | unpack); - set_last_cond_add(c, qinst->cond); + queue(block, qpu_a_alu2(translate[qinst->op].op, + dst, + src[0], src[1]) | unpack); + set_last_cond_add(block, qinst->cond); } handled_qinst_cond = true; - set_last_dst_pack(c, qinst); + set_last_dst_pack(block, qinst); break; } @@ -487,7 +574,48 @@ handled_qinst_cond); if (qinst->sf) - *last_inst(c) |= QPU_SF; + *last_inst(block) |= QPU_SF; + } +} + +void +vc4_generate_code(struct vc4_context *vc4, struct vc4_compile *c) +{ + struct qblock *start_block = list_first_entry(&c->blocks, + struct qblock, link); + + struct qpu_reg *temp_registers = vc4_register_allocate(vc4, c); + if (!temp_registers) + return; + + switch (c->stage) { + case QSTAGE_VERT: + case QSTAGE_COORD: + c->num_inputs_remaining = c->num_inputs; + queue(start_block, qpu_load_imm_ui(qpu_vwsetup(), 0x00001a00)); + break; + case QSTAGE_FRAG: + break; + } + + qir_for_each_block(block, c) + vc4_generate_code_block(c, block, temp_registers); + + /* Switch the last SIG_THRSW instruction to SIG_LAST_THRSW. + * + * LAST_THRSW is a new signal in BCM2708B0 (including Raspberry Pi) + * that ensures that a later thread doesn't try to lock the scoreboard + * and terminate before an earlier-spawned thread on the same QPU, by + * delaying switching back to the later shader until earlier has + * finished. Otherwise, if the earlier thread was hitting the same + * quad, the scoreboard would deadlock. + */ + if (c->last_thrsw) { + assert(QPU_GET_FIELD(*c->last_thrsw, QPU_SIG) == + QPU_SIG_THREAD_SWITCH); + *c->last_thrsw = ((*c->last_thrsw & ~QPU_SIG_MASK) | + QPU_SET_FIELD(QPU_SIG_LAST_THREAD_SWITCH, + QPU_SIG)); } uint32_t cycles = qpu_schedule_instructions(c); diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_qpu.h mesa-17.0.7/src/gallium/drivers/vc4/vc4_qpu.h --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_qpu.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_qpu.h 2017-06-01 10:37:10.000000000 +0000 @@ -143,16 +143,26 @@ struct qpu_reg src0, struct qpu_reg src1) ATTRIBUTE_CONST; uint64_t qpu_merge_inst(uint64_t a, uint64_t b) ATTRIBUTE_CONST; uint64_t qpu_load_imm_ui(struct qpu_reg dst, uint32_t val) ATTRIBUTE_CONST; +uint64_t qpu_load_imm_u2(struct qpu_reg dst, uint32_t val) ATTRIBUTE_CONST; +uint64_t qpu_load_imm_i2(struct qpu_reg dst, uint32_t val) ATTRIBUTE_CONST; +uint64_t qpu_branch(uint32_t cond, uint32_t target) ATTRIBUTE_CONST; uint64_t qpu_set_sig(uint64_t inst, uint32_t sig) ATTRIBUTE_CONST; uint64_t qpu_set_cond_add(uint64_t inst, uint32_t cond) ATTRIBUTE_CONST; uint64_t qpu_set_cond_mul(uint64_t inst, uint32_t cond) ATTRIBUTE_CONST; uint32_t qpu_encode_small_immediate(uint32_t i) ATTRIBUTE_CONST; +uint64_t qpu_m_rot(struct qpu_reg dst, struct qpu_reg src, int rot) ATTRIBUTE_CONST; bool qpu_waddr_is_tlb(uint32_t waddr) ATTRIBUTE_CONST; bool qpu_inst_is_tlb(uint64_t inst) ATTRIBUTE_CONST; int qpu_num_sf_accesses(uint64_t inst) ATTRIBUTE_CONST; void qpu_serialize_one_inst(struct vc4_compile *c, uint64_t inst); +static inline enum qpu_cond +qpu_cond_complement(enum qpu_cond cond) +{ + return cond ^ 1; +} + static inline uint64_t qpu_load_imm_f(struct qpu_reg dst, float val) { @@ -232,4 +242,7 @@ void vc4_qpu_disasm_cond(FILE *out, uint32_t cond); +void +vc4_qpu_disasm_cond_branch(FILE *out, uint32_t cond); + #endif /* VC4_QPU_H */ diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_qpu_schedule.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_qpu_schedule.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_qpu_schedule.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_qpu_schedule.c 2017-06-01 10:37:10.000000000 +0000 @@ -92,6 +92,7 @@ struct schedule_node *last_tmu_write; struct schedule_node *last_tlb; struct schedule_node *last_vpm; + struct schedule_node *last_uniforms_reset; enum direction dir; /* Estimated cycle when the current instruction would start. */ uint32_t time; @@ -184,6 +185,9 @@ break; case QPU_R_UNIF: + add_read_dep(state, state->last_uniforms_reset, n); + break; + case QPU_R_NOP: case QPU_R_ELEM_QPU: case QPU_R_XY_PIXEL_COORD: @@ -259,6 +263,7 @@ } } else if (is_tmu_write(waddr)) { add_write_dep(state, &state->last_tmu_write, n); + add_read_dep(state, state->last_uniforms_reset, n); } else if (qpu_waddr_is_tlb(waddr) || waddr == QPU_W_MS_FLAGS) { add_write_dep(state, &state->last_tlb, n); @@ -305,6 +310,10 @@ add_write_dep(state, &state->last_tlb, n); break; + case QPU_W_UNIFORMS_ADDRESS: + add_write_dep(state, &state->last_uniforms_reset, n); + break; + case QPU_W_NOP: break; @@ -354,7 +363,8 @@ if (sig != QPU_SIG_LOAD_IMM) { process_raddr_deps(state, n, raddr_a, true); - if (sig != QPU_SIG_SMALL_IMM) + if (sig != QPU_SIG_SMALL_IMM && + sig != QPU_SIG_BRANCH) process_raddr_deps(state, n, raddr_b, false); } @@ -375,12 +385,27 @@ switch (sig) { case QPU_SIG_SW_BREAKPOINT: case QPU_SIG_NONE: - case QPU_SIG_THREAD_SWITCH: - case QPU_SIG_LAST_THREAD_SWITCH: case QPU_SIG_SMALL_IMM: case QPU_SIG_LOAD_IMM: break; + case QPU_SIG_THREAD_SWITCH: + case QPU_SIG_LAST_THREAD_SWITCH: + /* All accumulator contents and flags are undefined after the + * switch. + */ + for (int i = 0; i < ARRAY_SIZE(state->last_r); i++) + add_write_dep(state, &state->last_r[i], n); + add_write_dep(state, &state->last_sf, n); + + /* Scoreboard-locking operations have to stay after the last + * thread switch. + */ + add_write_dep(state, &state->last_tlb, n); + + add_write_dep(state, &state->last_tmu_write, n); + break; + case QPU_SIG_LOAD_TMU0: case QPU_SIG_LOAD_TMU1: /* TMU loads are coming from a FIFO, so ordering is important. @@ -392,20 +417,23 @@ add_read_dep(state, state->last_tlb, n); break; + case QPU_SIG_BRANCH: + add_read_dep(state, state->last_sf, n); + break; + case QPU_SIG_PROG_END: case QPU_SIG_WAIT_FOR_SCOREBOARD: case QPU_SIG_SCOREBOARD_UNLOCK: case QPU_SIG_COVERAGE_LOAD: case QPU_SIG_COLOR_LOAD_END: case QPU_SIG_ALPHA_MASK_LOAD: - case QPU_SIG_BRANCH: fprintf(stderr, "Unhandled signal bits %d\n", sig); abort(); } process_cond_deps(state, n, QPU_GET_FIELD(inst, QPU_COND_ADD)); - process_cond_deps(state, n, QPU_GET_FIELD(inst, QPU_COND_ADD)); - if (inst & QPU_SF) + process_cond_deps(state, n, QPU_GET_FIELD(inst, QPU_COND_MUL)); + if ((inst & QPU_SF) && sig != QPU_SIG_BRANCH) add_write_dep(state, &state->last_sf, n); } @@ -438,7 +466,9 @@ struct choose_scoreboard { int tick; int last_sfu_write_tick; + int last_uniforms_reset_tick; uint32_t last_waddr_a, last_waddr_b; + bool tlb_locked; }; static bool @@ -447,6 +477,11 @@ uint32_t raddr_a = QPU_GET_FIELD(inst, QPU_RADDR_A); uint32_t raddr_b = QPU_GET_FIELD(inst, QPU_RADDR_B); uint32_t sig = QPU_GET_FIELD(inst, QPU_SIG); + + /* Full immediate loads don't read any registers. */ + if (sig == QPU_SIG_LOAD_IMM) + return false; + uint32_t src_muxes[] = { QPU_GET_FIELD(inst, QPU_ADD_A), QPU_GET_FIELD(inst, QPU_ADD_B), @@ -472,6 +507,24 @@ } } + if (sig == QPU_SIG_SMALL_IMM && + QPU_GET_FIELD(inst, QPU_SMALL_IMM) >= QPU_SMALL_IMM_MUL_ROT) { + uint32_t mux_a = QPU_GET_FIELD(inst, QPU_MUL_A); + uint32_t mux_b = QPU_GET_FIELD(inst, QPU_MUL_B); + + if (scoreboard->last_waddr_a == mux_a + QPU_W_ACC0 || + scoreboard->last_waddr_a == mux_b + QPU_W_ACC0 || + scoreboard->last_waddr_b == mux_a + QPU_W_ACC0 || + scoreboard->last_waddr_b == mux_b + QPU_W_ACC0) { + return true; + } + } + + if (reads_uniform(inst) && + scoreboard->tick - scoreboard->last_uniforms_reset_tick <= 2) { + return true; + } + return false; } @@ -522,8 +575,31 @@ struct schedule_node *chosen = NULL; int chosen_prio = 0; + /* Don't pair up anything with a thread switch signal -- emit_thrsw() + * will handle pairing it along with filling the delay slots. + */ + if (prev_inst) { + uint32_t prev_sig = QPU_GET_FIELD(prev_inst->inst->inst, + QPU_SIG); + if (prev_sig == QPU_SIG_THREAD_SWITCH || + prev_sig == QPU_SIG_LAST_THREAD_SWITCH) { + return NULL; + } + } + list_for_each_entry(struct schedule_node, n, schedule_list, link) { uint64_t inst = n->inst->inst; + uint32_t sig = QPU_GET_FIELD(inst, QPU_SIG); + + /* Don't choose the branch instruction until it's the last one + * left. XXX: We could potentially choose it before it's the + * last one, if the remaining instructions fit in the delay + * slots. + */ + if (sig == QPU_SIG_BRANCH && + !list_is_singular(schedule_list)) { + continue; + } /* "An instruction must not read from a location in physical * regfile A or B that was written to by the previous @@ -544,9 +620,25 @@ * that they're compatible. */ if (prev_inst) { + /* Don't pair up a thread switch signal -- we'll + * handle pairing it when we pick it on its own. + */ + if (sig == QPU_SIG_THREAD_SWITCH || + sig == QPU_SIG_LAST_THREAD_SWITCH) { + continue; + } + if (prev_inst->uniform != -1 && n->uniform != -1) continue; + /* Don't merge in something that will lock the TLB. + * Hopwefully what we have in inst will release some + * other instructions, allowing us to delay the + * TLB-locking instruction until later. + */ + if (!scoreboard->tlb_locked && qpu_inst_is_tlb(inst)) + continue; + inst = qpu_merge_inst(prev_inst->inst->inst, inst); if (!inst) continue; @@ -600,6 +692,14 @@ (waddr_mul >= QPU_W_SFU_RECIP && waddr_mul <= QPU_W_SFU_LOG)) { scoreboard->last_sfu_write_tick = scoreboard->tick; } + + if (waddr_add == QPU_W_UNIFORMS_ADDRESS || + waddr_mul == QPU_W_UNIFORMS_ADDRESS) { + scoreboard->last_uniforms_reset_tick = scoreboard->tick; + } + + if (qpu_inst_is_tlb(inst)) + scoreboard->tlb_locked = true; } static void @@ -631,6 +731,26 @@ /* Apply some huge latency between texture fetch requests and getting * their results back. + * + * FIXME: This is actually pretty bogus. If we do: + * + * mov tmu0_s, a + * + * mov tmu0_s, b + * load_tmu0 + * + * load_tmu0 + * + * we count that as worse than + * + * mov tmu0_s, a + * mov tmu0_s, b + * + * load_tmu0 + * + * load_tmu0 + * + * because we associate the first load_tmu0 with the *second* tmu0_s. */ if (waddr == QPU_W_TMU0_S) { if (QPU_GET_FIELD(after, QPU_SIG) == QPU_SIG_LOAD_TMU0) @@ -721,27 +841,61 @@ } } -static uint32_t -schedule_instructions(struct vc4_compile *c, struct list_head *schedule_list) +/** + * Emits a THRSW/LTHRSW signal in the stream, trying to move it up to pair + * with another instruction. + */ +static void +emit_thrsw(struct vc4_compile *c, + struct choose_scoreboard *scoreboard, + uint64_t inst) { - struct choose_scoreboard scoreboard; - uint32_t time = 0; + uint32_t sig = QPU_GET_FIELD(inst, QPU_SIG); - /* We reorder the uniforms as we schedule instructions, so save the - * old data off and replace it. + /* There should be nothing in a thrsw inst being scheduled other than + * the signal bits. */ - uint32_t *uniform_data = c->uniform_data; - enum quniform_contents *uniform_contents = c->uniform_contents; - c->uniform_contents = ralloc_array(c, enum quniform_contents, - c->num_uniforms); - c->uniform_data = ralloc_array(c, uint32_t, c->num_uniforms); - c->uniform_array_size = c->num_uniforms; - uint32_t next_uniform = 0; + assert(QPU_GET_FIELD(inst, QPU_OP_ADD) == QPU_A_NOP); + assert(QPU_GET_FIELD(inst, QPU_OP_MUL) == QPU_M_NOP); - memset(&scoreboard, 0, sizeof(scoreboard)); - scoreboard.last_waddr_a = ~0; - scoreboard.last_waddr_b = ~0; - scoreboard.last_sfu_write_tick = -10; + /* Try to find an earlier scheduled instruction that we can merge the + * thrsw into. + */ + int thrsw_ip = c->qpu_inst_count; + for (int i = 1; i <= MIN2(c->qpu_inst_count, 3); i++) { + uint64_t prev_instr = c->qpu_insts[c->qpu_inst_count - i]; + uint32_t prev_sig = QPU_GET_FIELD(prev_instr, QPU_SIG); + + if (prev_sig == QPU_SIG_NONE) + thrsw_ip = c->qpu_inst_count - i; + } + + if (thrsw_ip != c->qpu_inst_count) { + /* Merge the thrsw into the existing instruction. */ + c->qpu_insts[thrsw_ip] = + QPU_UPDATE_FIELD(c->qpu_insts[thrsw_ip], sig, QPU_SIG); + } else { + qpu_serialize_one_inst(c, inst); + update_scoreboard_for_chosen(scoreboard, inst); + } + + /* Fill the delay slots. */ + while (c->qpu_inst_count < thrsw_ip + 3) { + update_scoreboard_for_chosen(scoreboard, qpu_NOP()); + qpu_serialize_one_inst(c, qpu_NOP()); + } +} + +static uint32_t +schedule_instructions(struct vc4_compile *c, + struct choose_scoreboard *scoreboard, + struct qblock *block, + struct list_head *schedule_list, + enum quniform_contents *orig_uniform_contents, + uint32_t *orig_uniform_data, + uint32_t *next_uniform) +{ + uint32_t time = 0; if (debug) { fprintf(stderr, "initial deps:\n"); @@ -757,7 +911,7 @@ while (!list_empty(schedule_list)) { struct schedule_node *chosen = - choose_instruction_to_schedule(&scoreboard, + choose_instruction_to_schedule(scoreboard, schedule_list, NULL); struct schedule_node *merge = NULL; @@ -785,14 +939,14 @@ mark_instruction_scheduled(schedule_list, time, chosen, true); if (chosen->uniform != -1) { - c->uniform_data[next_uniform] = - uniform_data[chosen->uniform]; - c->uniform_contents[next_uniform] = - uniform_contents[chosen->uniform]; - next_uniform++; + c->uniform_data[*next_uniform] = + orig_uniform_data[chosen->uniform]; + c->uniform_contents[*next_uniform] = + orig_uniform_contents[chosen->uniform]; + (*next_uniform)++; } - merge = choose_instruction_to_schedule(&scoreboard, + merge = choose_instruction_to_schedule(scoreboard, schedule_list, chosen); if (merge) { @@ -801,11 +955,11 @@ inst = qpu_merge_inst(inst, merge->inst->inst); assert(inst != 0); if (merge->uniform != -1) { - c->uniform_data[next_uniform] = - uniform_data[merge->uniform]; - c->uniform_contents[next_uniform] = - uniform_contents[merge->uniform]; - next_uniform++; + c->uniform_data[*next_uniform] = + orig_uniform_data[merge->uniform]; + c->uniform_contents[*next_uniform] = + orig_uniform_contents[merge->uniform]; + (*next_uniform)++; } if (debug) { @@ -824,10 +978,6 @@ fprintf(stderr, "\n"); } - qpu_serialize_one_inst(c, inst); - - update_scoreboard_for_chosen(&scoreboard, inst); - /* Now that we've scheduled a new instruction, some of its * children can be promoted to the list of instructions ready to * be scheduled. Update the children's unblocked time for this @@ -836,51 +986,68 @@ mark_instruction_scheduled(schedule_list, time, chosen, false); mark_instruction_scheduled(schedule_list, time, merge, false); - scoreboard.tick++; + if (QPU_GET_FIELD(inst, QPU_SIG) == QPU_SIG_THREAD_SWITCH || + QPU_GET_FIELD(inst, QPU_SIG) == QPU_SIG_LAST_THREAD_SWITCH) { + emit_thrsw(c, scoreboard, inst); + } else { + qpu_serialize_one_inst(c, inst); + update_scoreboard_for_chosen(scoreboard, inst); + } + + scoreboard->tick++; time++; - } - assert(next_uniform == c->num_uniforms); + if (QPU_GET_FIELD(inst, QPU_SIG) == QPU_SIG_BRANCH) { + block->branch_qpu_ip = c->qpu_inst_count - 1; + /* Fill the delay slots. + * + * We should fill these with actual instructions, + * instead, but that will probably need to be done + * after this, once we know what the leading + * instructions of the successors are (so we can + * handle A/B register file write latency) + */ + inst = qpu_NOP(); + update_scoreboard_for_chosen(scoreboard, inst); + qpu_serialize_one_inst(c, inst); + qpu_serialize_one_inst(c, inst); + qpu_serialize_one_inst(c, inst); + } + } return time; } -uint32_t -qpu_schedule_instructions(struct vc4_compile *c) +static uint32_t +qpu_schedule_instructions_block(struct vc4_compile *c, + struct choose_scoreboard *scoreboard, + struct qblock *block, + enum quniform_contents *orig_uniform_contents, + uint32_t *orig_uniform_data, + uint32_t *next_uniform) { void *mem_ctx = ralloc_context(NULL); struct list_head schedule_list; list_inithead(&schedule_list); - if (debug) { - fprintf(stderr, "Pre-schedule instructions\n"); - list_for_each_entry(struct queued_qpu_inst, q, - &c->qpu_inst_list, link) { - vc4_qpu_disasm(&q->inst, 1); - fprintf(stderr, "\n"); - } - fprintf(stderr, "\n"); - } - /* Wrap each instruction in a scheduler structure. */ - uint32_t next_uniform = 0; - while (!list_empty(&c->qpu_inst_list)) { + uint32_t next_sched_uniform = *next_uniform; + while (!list_empty(&block->qpu_inst_list)) { struct queued_qpu_inst *inst = - (struct queued_qpu_inst *)c->qpu_inst_list.next; + (struct queued_qpu_inst *)block->qpu_inst_list.next; struct schedule_node *n = rzalloc(mem_ctx, struct schedule_node); n->inst = inst; if (reads_uniform(inst->inst)) { - n->uniform = next_uniform++; + n->uniform = next_sched_uniform++; } else { n->uniform = -1; } list_del(&inst->link); list_addtail(&n->link, &schedule_list); } - assert(next_uniform == c->num_uniforms); calculate_forward_deps(c, &schedule_list); calculate_reverse_deps(c, &schedule_list); @@ -889,7 +1056,109 @@ compute_delay(n); } - uint32_t cycles = schedule_instructions(c, &schedule_list); + uint32_t cycles = schedule_instructions(c, scoreboard, block, + &schedule_list, + orig_uniform_contents, + orig_uniform_data, + next_uniform); + + ralloc_free(mem_ctx); + + return cycles; +} + +static void +qpu_set_branch_targets(struct vc4_compile *c) +{ + qir_for_each_block(block, c) { + /* The end block of the program has no branch. */ + if (!block->successors[0]) + continue; + + /* If there was no branch instruction, then the successor + * block must follow immediately after this one. + */ + if (block->branch_qpu_ip == ~0) { + assert(block->end_qpu_ip + 1 == + block->successors[0]->start_qpu_ip); + continue; + } + + /* Set the branch target for the block that doesn't follow + * immediately after ours. + */ + uint64_t *branch_inst = &c->qpu_insts[block->branch_qpu_ip]; + assert(QPU_GET_FIELD(*branch_inst, QPU_SIG) == QPU_SIG_BRANCH); + assert(QPU_GET_FIELD(*branch_inst, QPU_BRANCH_TARGET) == 0); + + uint32_t branch_target = + (block->successors[0]->start_qpu_ip - + (block->branch_qpu_ip + 4)) * sizeof(uint64_t); + *branch_inst = (*branch_inst | + QPU_SET_FIELD(branch_target, QPU_BRANCH_TARGET)); + + /* Make sure that the if-we-don't-jump successor was scheduled + * just after the delay slots. + */ + if (block->successors[1]) { + assert(block->successors[1]->start_qpu_ip == + block->branch_qpu_ip + 4); + } + } +} + +uint32_t +qpu_schedule_instructions(struct vc4_compile *c) +{ + /* We reorder the uniforms as we schedule instructions, so save the + * old data off and replace it. + */ + uint32_t *uniform_data = c->uniform_data; + enum quniform_contents *uniform_contents = c->uniform_contents; + c->uniform_contents = ralloc_array(c, enum quniform_contents, + c->num_uniforms); + c->uniform_data = ralloc_array(c, uint32_t, c->num_uniforms); + c->uniform_array_size = c->num_uniforms; + uint32_t next_uniform = 0; + + struct choose_scoreboard scoreboard; + memset(&scoreboard, 0, sizeof(scoreboard)); + scoreboard.last_waddr_a = ~0; + scoreboard.last_waddr_b = ~0; + scoreboard.last_sfu_write_tick = -10; + scoreboard.last_uniforms_reset_tick = -10; + + if (debug) { + fprintf(stderr, "Pre-schedule instructions\n"); + qir_for_each_block(block, c) { + fprintf(stderr, "BLOCK %d\n", block->index); + list_for_each_entry(struct queued_qpu_inst, q, + &block->qpu_inst_list, link) { + vc4_qpu_disasm(&q->inst, 1); + fprintf(stderr, "\n"); + } + } + fprintf(stderr, "\n"); + } + + uint32_t cycles = 0; + qir_for_each_block(block, c) { + block->start_qpu_ip = c->qpu_inst_count; + block->branch_qpu_ip = ~0; + + cycles += qpu_schedule_instructions_block(c, + &scoreboard, + block, + uniform_contents, + uniform_data, + &next_uniform); + + block->end_qpu_ip = c->qpu_inst_count - 1; + } + + qpu_set_branch_targets(c); + + assert(next_uniform == c->num_uniforms); if (debug) { fprintf(stderr, "Post-schedule instructions\n"); @@ -897,7 +1166,5 @@ fprintf(stderr, "\n"); } - ralloc_free(mem_ctx); - return cycles; } diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_qpu_validate.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_qpu_validate.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_qpu_validate.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_qpu_validate.c 2017-06-01 10:37:10.000000000 +0000 @@ -52,6 +52,16 @@ { QPU_GET_FIELD(inst, QPU_MUL_B) }, }; + /* Branches only reference raddr_a (no mux), and we don't use that + * feature of branching. + */ + if (QPU_GET_FIELD(inst, QPU_SIG) == QPU_SIG_BRANCH) + return false; + + /* Load immediates don't read any registers. */ + if (QPU_GET_FIELD(inst, QPU_SIG) == QPU_SIG_LOAD_IMM) + return false; + for (int i = 0; i < ARRAY_SIZE(src_regs); i++) { if (!ignore_a && src_regs[i].mux == QPU_MUX_A && @@ -103,6 +113,7 @@ vc4_qpu_validate(uint64_t *insts, uint32_t num_inst) { bool scoreboard_locked = false; + bool threaded = false; /* We don't want to do validation in release builds, but we want to * keep compiling the validation code to make sure it doesn't get @@ -114,11 +125,17 @@ for (int i = 0; i < num_inst; i++) { uint64_t inst = insts[i]; + uint32_t sig = QPU_GET_FIELD(inst, QPU_SIG); - if (QPU_GET_FIELD(inst, QPU_SIG) != QPU_SIG_PROG_END) { + if (sig != QPU_SIG_PROG_END) { if (qpu_inst_is_tlb(inst)) scoreboard_locked = true; + if (sig == QPU_SIG_THREAD_SWITCH || + sig == QPU_SIG_LAST_THREAD_SWITCH) { + threaded = true; + } + continue; } @@ -252,19 +269,48 @@ last_sfu_inst = i; } - int last_r5_write = -10; for (int i = 0; i < num_inst - 1; i++) { uint64_t inst = insts[i]; - /* "An instruction that does a vector rotate by r5 must not - * immediately follow an instruction that writes to r5." - */ - if (last_r5_write == i - 1 && - QPU_GET_FIELD(inst, QPU_SIG) == QPU_SIG_SMALL_IMM && - QPU_GET_FIELD(inst, QPU_SMALL_IMM) == 48) { - fail_instr(inst, - "vector rotate by r5 immediately " - "after r5 write"); + if (QPU_GET_FIELD(inst, QPU_SIG) == QPU_SIG_SMALL_IMM && + QPU_GET_FIELD(inst, QPU_SMALL_IMM) >= + QPU_SMALL_IMM_MUL_ROT) { + uint32_t mux_a = QPU_GET_FIELD(inst, QPU_MUL_A); + uint32_t mux_b = QPU_GET_FIELD(inst, QPU_MUL_B); + + /* "The full horizontal vector rotate is only + * available when both of the mul ALU input arguments + * are taken from accumulators r0-r3." + */ + if (mux_a > QPU_MUX_R3 || mux_b > QPU_MUX_R3) { + fail_instr(inst, + "MUL rotate using non-accumulator " + "input"); + } + + if (QPU_GET_FIELD(inst, QPU_SMALL_IMM) == + QPU_SMALL_IMM_MUL_ROT) { + /* "An instruction that does a vector rotate + * by r5 must not immediately follow an + * instruction that writes to r5." + */ + if (writes_reg(insts[i - 1], QPU_W_ACC5)) { + fail_instr(inst, + "vector rotate by r5 " + "immediately after r5 write"); + } + } + + /* "An instruction that does a vector rotate must not + * immediately follow an instruction that writes to the + * accumulator that is being rotated." + */ + if (writes_reg(insts[i - 1], QPU_W_ACC0 + mux_a) || + writes_reg(insts[i - 1], QPU_W_ACC0 + mux_b)) { + fail_instr(inst, + "vector rotate of value " + "written in previous instruction"); + } } } @@ -302,4 +348,120 @@ if (qpu_num_sf_accesses(inst) > 1) fail_instr(inst, "Single instruction writes SFU twice"); } + + /* "The uniform base pointer can be written (from SIMD element 0) by + * the processor to reset the stream, there must be at least two + * nonuniform-accessing instructions following a pointer change + * before uniforms can be accessed once more." + */ + int last_unif_pointer_update = -3; + for (int i = 0; i < num_inst; i++) { + uint64_t inst = insts[i]; + uint32_t waddr_add = QPU_GET_FIELD(inst, QPU_WADDR_ADD); + uint32_t waddr_mul = QPU_GET_FIELD(inst, QPU_WADDR_MUL); + + if (reads_reg(inst, QPU_R_UNIF) && + i - last_unif_pointer_update <= 2) { + fail_instr(inst, + "uniform read too soon after pointer update"); + } + + if (waddr_add == QPU_W_UNIFORMS_ADDRESS || + waddr_mul == QPU_W_UNIFORMS_ADDRESS) + last_unif_pointer_update = i; + } + + if (threaded) { + bool last_thrsw_found = false; + bool scoreboard_locked = false; + int tex_samples_outstanding = 0; + int last_tex_samples_outstanding = 0; + int thrsw_ip = -1; + + for (int i = 0; i < num_inst; i++) { + uint64_t inst = insts[i]; + uint32_t sig = QPU_GET_FIELD(inst, QPU_SIG); + + if (i == thrsw_ip) { + /* In order to get texture results back in the + * correct order, before a new thrsw we have + * to read all the texture results from before + * the previous thrsw. + * + * FIXME: Is collecting the remaining results + * during the delay slots OK, or should we do + * this at THRSW signal time? + */ + if (last_tex_samples_outstanding != 0) { + fail_instr(inst, "THRSW with texture " + "results from the previous " + "THRSW still in the FIFO."); + } + + last_tex_samples_outstanding = + tex_samples_outstanding; + tex_samples_outstanding = 0; + } + + if (qpu_inst_is_tlb(inst)) + scoreboard_locked = true; + + switch (sig) { + case QPU_SIG_THREAD_SWITCH: + case QPU_SIG_LAST_THREAD_SWITCH: + /* No thread switching with the scoreboard + * locked. Doing so means we may deadlock + * when the other thread tries to lock + * scoreboard. + */ + if (scoreboard_locked) { + fail_instr(inst, "THRSW with the " + "scoreboard locked."); + } + + /* No thread switching after lthrsw, since + * lthrsw means that we get delayed until the + * other shader is ready for us to terminate. + */ + if (last_thrsw_found) { + fail_instr(inst, "THRSW after a " + "previous LTHRSW"); + } + + if (sig == QPU_SIG_LAST_THREAD_SWITCH) + last_thrsw_found = true; + + /* No THRSW while we already have a THRSW + * queued. + */ + if (i < thrsw_ip) { + fail_instr(inst, + "THRSW with a THRSW queued."); + } + + thrsw_ip = i + 3; + break; + + case QPU_SIG_LOAD_TMU0: + case QPU_SIG_LOAD_TMU1: + if (last_tex_samples_outstanding == 0) { + fail_instr(inst, "TMU load with nothing " + "in the results fifo from " + "the previous THRSW."); + } + + last_tex_samples_outstanding--; + break; + } + + uint32_t waddr_add = QPU_GET_FIELD(inst, QPU_WADDR_ADD); + uint32_t waddr_mul = QPU_GET_FIELD(inst, QPU_WADDR_MUL); + if (waddr_add == QPU_W_TMU0_S || + waddr_add == QPU_W_TMU1_S || + waddr_mul == QPU_W_TMU0_S || + waddr_mul == QPU_W_TMU1_S) { + tex_samples_outstanding++; + } + } + } } diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_register_allocate.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_register_allocate.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_register_allocate.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_register_allocate.c 2017-06-01 10:37:10.000000000 +0000 @@ -115,33 +115,67 @@ vc4->regs = ra_alloc_reg_set(vc4, ARRAY_SIZE(vc4_regs), true); - vc4->reg_class_any = ra_alloc_reg_class(vc4->regs); - vc4->reg_class_a_or_b_or_acc = ra_alloc_reg_class(vc4->regs); - vc4->reg_class_r4_or_a = ra_alloc_reg_class(vc4->regs); - vc4->reg_class_a = ra_alloc_reg_class(vc4->regs); - for (uint32_t i = 0; i < ARRAY_SIZE(vc4_regs); i++) { - /* Reserve ra31/rb31 for spilling fixup_raddr_conflict() in + /* The physical regfiles split us into two classes, with [0] being the + * whole space and [1] being the bottom half (for threaded fragment + * shaders). + */ + for (int i = 0; i < 2; i++) { + vc4->reg_class_any[i] = ra_alloc_reg_class(vc4->regs); + vc4->reg_class_a_or_b[i] = ra_alloc_reg_class(vc4->regs); + vc4->reg_class_a_or_b_or_acc[i] = ra_alloc_reg_class(vc4->regs); + vc4->reg_class_r4_or_a[i] = ra_alloc_reg_class(vc4->regs); + vc4->reg_class_a[i] = ra_alloc_reg_class(vc4->regs); + } + vc4->reg_class_r0_r3 = ra_alloc_reg_class(vc4->regs); + + /* r0-r3 */ + for (uint32_t i = ACC_INDEX; i < ACC_INDEX + 4; i++) { + ra_class_add_reg(vc4->regs, vc4->reg_class_r0_r3, i); + ra_class_add_reg(vc4->regs, vc4->reg_class_a_or_b_or_acc[0], i); + ra_class_add_reg(vc4->regs, vc4->reg_class_a_or_b_or_acc[1], i); + } + + /* R4 gets a special class because it can't be written as a general + * purpose register. (it's TMU_NOSWAP as a write address). + */ + for (int i = 0; i < 2; i++) { + ra_class_add_reg(vc4->regs, vc4->reg_class_r4_or_a[i], + ACC_INDEX + 4); + ra_class_add_reg(vc4->regs, vc4->reg_class_any[i], + ACC_INDEX + 4); + } + + /* A/B */ + for (uint32_t i = AB_INDEX; i < AB_INDEX + 64; i ++) { + /* Reserve ra14/rb14 for spilling fixup_raddr_conflict() in * vc4_qpu_emit.c */ - if (vc4_regs[i].addr == 31) + if (vc4_regs[i].addr == 14) continue; - /* R4 can't be written as a general purpose register. (it's - * TMU_NOSWAP as a write address). - */ - if (vc4_regs[i].mux == QPU_MUX_R4) { - ra_class_add_reg(vc4->regs, vc4->reg_class_r4_or_a, i); - ra_class_add_reg(vc4->regs, vc4->reg_class_any, i); - continue; + ra_class_add_reg(vc4->regs, vc4->reg_class_any[0], i); + ra_class_add_reg(vc4->regs, vc4->reg_class_a_or_b[0], i); + ra_class_add_reg(vc4->regs, vc4->reg_class_a_or_b_or_acc[0], i); + + if (vc4_regs[i].addr < 16) { + ra_class_add_reg(vc4->regs, vc4->reg_class_any[1], i); + ra_class_add_reg(vc4->regs, vc4->reg_class_a_or_b[1], i); + ra_class_add_reg(vc4->regs, vc4->reg_class_a_or_b_or_acc[1], i); } - ra_class_add_reg(vc4->regs, vc4->reg_class_any, i); - ra_class_add_reg(vc4->regs, vc4->reg_class_a_or_b_or_acc, i); - } - for (uint32_t i = AB_INDEX; i < AB_INDEX + 64; i += 2) { - ra_class_add_reg(vc4->regs, vc4->reg_class_a, i); - ra_class_add_reg(vc4->regs, vc4->reg_class_r4_or_a, i); + /* A only */ + if (((i - AB_INDEX) & 1) == 0) { + ra_class_add_reg(vc4->regs, vc4->reg_class_a[0], i); + ra_class_add_reg(vc4->regs, vc4->reg_class_r4_or_a[0], i); + + if (vc4_regs[i].addr < 16) { + ra_class_add_reg(vc4->regs, + vc4->reg_class_a[1], i); + ra_class_add_reg(vc4->regs, + vc4->reg_class_r4_or_a[1], i); + } + } } ra_set_finalize(vc4->regs, NULL); @@ -162,8 +196,9 @@ } #define CLASS_BIT_A (1 << 0) -#define CLASS_BIT_B_OR_ACC (1 << 1) +#define CLASS_BIT_B (1 << 1) #define CLASS_BIT_R4 (1 << 2) +#define CLASS_BIT_R0_R3 (1 << 4) /** * Returns a mapping from QFILE_TEMP indices to struct qpu_regs. @@ -175,14 +210,9 @@ { struct node_to_temp_map map[c->num_temps]; uint32_t temp_to_node[c->num_temps]; - uint32_t def[c->num_temps]; - uint32_t use[c->num_temps]; uint8_t class_bits[c->num_temps]; struct qpu_reg *temp_registers = calloc(c->num_temps, sizeof(*temp_registers)); - for (int i = 0; i < ARRAY_SIZE(def); i++) - def[i] = ~0; - memset(use, 0, sizeof(use)); /* If things aren't ever written (undefined values), just read from * r0. @@ -195,38 +225,12 @@ struct ra_graph *g = ra_alloc_interference_graph(vc4->regs, c->num_temps); - /* Compute the live ranges so we can figure out interference. - */ - uint32_t ip = 0; - list_for_each_entry(struct qinst, inst, &c->instructions, link) { - if (inst->dst.file == QFILE_TEMP) { - def[inst->dst.index] = MIN2(ip, def[inst->dst.index]); - use[inst->dst.index] = ip; - } - - for (int i = 0; i < qir_get_op_nsrc(inst->op); i++) { - if (inst->src[i].file == QFILE_TEMP) - use[inst->src[i].index] = ip; - } - - switch (inst->op) { - case QOP_FRAG_Z: - case QOP_FRAG_W: - /* The payload registers have values implicitly loaded - * at the start of the program. - */ - def[inst->dst.index] = 0; - break; - default: - break; - } - - ip++; - } + /* Compute the live ranges so we can figure out interference. */ + qir_calculate_live_intervals(c); for (uint32_t i = 0; i < c->num_temps; i++) { map[i].temp = i; - map[i].priority = use[i] - def[i]; + map[i].priority = c->temp_end[i] - c->temp_start[i]; } qsort(map, c->num_temps, sizeof(map[0]), node_to_temp_priority); for (uint32_t i = 0; i < c->num_temps; i++) { @@ -238,18 +242,18 @@ * incrementally remove bits that the temp definitely can't be in. */ memset(class_bits, - CLASS_BIT_A | CLASS_BIT_B_OR_ACC | CLASS_BIT_R4, + CLASS_BIT_A | CLASS_BIT_B | CLASS_BIT_R4 | CLASS_BIT_R0_R3, sizeof(class_bits)); - ip = 0; - list_for_each_entry(struct qinst, inst, &c->instructions, link) { + int ip = 0; + qir_for_each_inst_inorder(inst, c) { if (qir_writes_r4(inst)) { /* This instruction writes r4 (and optionally moves * its result to a temp), so nothing else can be * stored in r4 across it. */ for (int i = 0; i < c->num_temps; i++) { - if (def[i] < ip && use[i] > ip) + if (c->temp_start[i] < ip && c->temp_end[i] > ip) class_bits[i] &= ~CLASS_BIT_R4; } } else { @@ -271,6 +275,22 @@ AB_INDEX + QPU_R_FRAG_PAYLOAD_ZW * 2); break; + case QOP_ROT_MUL: + assert(inst->src[0].file == QFILE_TEMP); + class_bits[inst->src[0].index] &= CLASS_BIT_R0_R3; + break; + + case QOP_THRSW: + /* All accumulators are invalidated across a thread + * switch. + */ + for (int i = 0; i < c->num_temps; i++) { + if (c->temp_start[i] < ip && c->temp_end[i] > ip) + class_bits[i] &= ~(CLASS_BIT_R0_R3 | + CLASS_BIT_R4); + } + break; + default: break; } @@ -286,7 +306,7 @@ * can only be done from regfile A, while float unpacks can be * either A or R4. */ - for (int i = 0; i < qir_get_op_nsrc(inst->op); i++) { + for (int i = 0; i < qir_get_nsrc(inst); i++) { if (inst->src[i].file == QFILE_TEMP && inst->src[i].pack) { if (qir_is_float_input(inst)) { @@ -306,19 +326,40 @@ int node = temp_to_node[i]; switch (class_bits[i]) { - case CLASS_BIT_A | CLASS_BIT_B_OR_ACC | CLASS_BIT_R4: - ra_set_node_class(g, node, vc4->reg_class_any); + case CLASS_BIT_A | CLASS_BIT_B | CLASS_BIT_R4 | CLASS_BIT_R0_R3: + ra_set_node_class(g, node, + vc4->reg_class_any[c->fs_threaded]); break; - case CLASS_BIT_A | CLASS_BIT_B_OR_ACC: - ra_set_node_class(g, node, vc4->reg_class_a_or_b_or_acc); + case CLASS_BIT_A | CLASS_BIT_B: + ra_set_node_class(g, node, + vc4->reg_class_a_or_b[c->fs_threaded]); + break; + case CLASS_BIT_A | CLASS_BIT_B | CLASS_BIT_R0_R3: + ra_set_node_class(g, node, + vc4->reg_class_a_or_b_or_acc[c->fs_threaded]); break; case CLASS_BIT_A | CLASS_BIT_R4: - ra_set_node_class(g, node, vc4->reg_class_r4_or_a); + ra_set_node_class(g, node, + vc4->reg_class_r4_or_a[c->fs_threaded]); break; case CLASS_BIT_A: - ra_set_node_class(g, node, vc4->reg_class_a); + ra_set_node_class(g, node, + vc4->reg_class_a[c->fs_threaded]); + break; + case CLASS_BIT_R0_R3: + ra_set_node_class(g, node, vc4->reg_class_r0_r3); break; + default: + /* DDX/DDY used across thread switched might get us + * here. + */ + if (c->fs_threaded) { + c->failed = true; + free(temp_registers); + return NULL; + } + fprintf(stderr, "temp %d: bad class bits: 0x%x\n", i, class_bits[i]); abort(); @@ -328,7 +369,8 @@ for (uint32_t i = 0; i < c->num_temps; i++) { for (uint32_t j = i + 1; j < c->num_temps; j++) { - if (!(def[i] >= use[j] || def[j] >= use[i])) { + if (!(c->temp_start[i] >= c->temp_end[j] || + c->temp_start[j] >= c->temp_end[i])) { ra_add_node_interference(g, temp_to_node[i], temp_to_node[j]); @@ -338,9 +380,14 @@ bool ok = ra_allocate(g); if (!ok) { - fprintf(stderr, "Failed to register allocate:\n"); - qir_dump(c); - abort(); + if (!c->fs_threaded) { + fprintf(stderr, "Failed to register allocate:\n"); + qir_dump(c); + } + + c->failed = true; + free(temp_registers); + return NULL; } for (uint32_t i = 0; i < c->num_temps; i++) { @@ -349,7 +396,7 @@ /* If the value's never used, just write to the NOP register * for clarity in debug output. */ - if (def[i] == use[i]) + if (c->temp_start[i] == c->temp_end[i]) temp_registers[i] = qpu_ra(QPU_W_NOP); } diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_reorder_uniforms.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_reorder_uniforms.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_reorder_uniforms.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_reorder_uniforms.c 2017-06-01 10:37:10.000000000 +0000 @@ -43,10 +43,10 @@ uint32_t uniform_index_size = 0; uint32_t next_uniform = 0; - list_for_each_entry(struct qinst, inst, &c->instructions, link) { + qir_for_each_inst_inorder(inst, c) { uint32_t new = ~0; - for (int i = 0; i < qir_get_op_nsrc(inst->op); i++) { + for (int i = 0; i < qir_get_nsrc(inst); i++) { if (inst->src[i].file != QFILE_UNIF) continue; diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_resource.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_resource.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_resource.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_resource.c 2017-06-01 10:37:10.000000000 +0000 @@ -115,13 +115,12 @@ blit.filter = PIPE_TEX_FILTER_NEAREST; pctx->blit(pctx, &blit); - vc4_flush(pctx); pipe_resource_reference(&trans->ss_resource, NULL); } pipe_resource_reference(&ptrans->resource, NULL); - util_slab_free(&vc4->transfer_pool, ptrans); + slab_free(&vc4->transfer_pool, ptrans); } static struct pipe_resource * @@ -156,51 +155,57 @@ enum pipe_format format = prsc->format; char *buf; + /* Upgrade DISCARD_RANGE to WHOLE_RESOURCE if the whole resource is + * being mapped. + */ + if ((usage & PIPE_TRANSFER_DISCARD_RANGE) && + !(usage & PIPE_TRANSFER_UNSYNCHRONIZED) && + !(prsc->flags & PIPE_RESOURCE_FLAG_MAP_COHERENT) && + prsc->last_level == 0 && + prsc->width0 == box->width && + prsc->height0 == box->height && + prsc->depth0 == box->depth && + prsc->array_size == 1 && + rsc->bo->private) { + usage |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE; + } + if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) { if (vc4_resource_bo_alloc(rsc)) { - /* If it might be bound as one of our vertex buffers, * make sure we re-emit vertex buffer state. */ if (prsc->bind & PIPE_BIND_VERTEX_BUFFER) vc4->dirty |= VC4_DIRTY_VTXBUF; } else { - /* If we failed to reallocate, flush everything so - * that we don't violate any syncing requirements. + /* If we failed to reallocate, flush users so that we + * don't violate any syncing requirements. */ - vc4_flush(pctx); + vc4_flush_jobs_reading_resource(vc4, prsc); } } else if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) { /* If we're writing and the buffer is being used by the CL, we * have to flush the CL first. If we're only reading, we need * to flush if the CL has written our buffer. */ - if (vc4_cl_references_bo(pctx, rsc->bo, - usage & PIPE_TRANSFER_WRITE)) { - if ((usage & PIPE_TRANSFER_DISCARD_RANGE) && - prsc->last_level == 0 && - prsc->width0 == box->width && - prsc->height0 == box->height && - prsc->depth0 == box->depth && - vc4_resource_bo_alloc(rsc)) { - if (prsc->bind & PIPE_BIND_VERTEX_BUFFER) - vc4->dirty |= VC4_DIRTY_VTXBUF; - } else { - vc4_flush(pctx); - } - } + if (usage & PIPE_TRANSFER_WRITE) + vc4_flush_jobs_reading_resource(vc4, prsc); + else + vc4_flush_jobs_writing_resource(vc4, prsc); } - if (usage & PIPE_TRANSFER_WRITE) + if (usage & PIPE_TRANSFER_WRITE) { rsc->writes++; + rsc->initialized_buffers = ~0; + } - trans = util_slab_alloc(&vc4->transfer_pool); + trans = slab_alloc(&vc4->transfer_pool); if (!trans) return NULL; /* XXX: Handle DONTBLOCK, DISCARD_RANGE, PERSISTENT, COHERENT. */ - /* util_slab_alloc() doesn't zero: */ + /* slab_alloc_st() doesn't zero: */ memset(trans, 0, sizeof(*trans)); ptrans = &trans->base; @@ -242,7 +247,7 @@ blit.filter = PIPE_TEX_FILTER_NEAREST; pctx->blit(pctx, &blit); - vc4_flush(pctx); + vc4_flush_jobs_writing_resource(vc4, blit.dst.resource); } /* The rest of the mapping process should use our temporary. */ @@ -279,27 +284,63 @@ if (usage & PIPE_TRANSFER_MAP_DIRECTLY) return NULL; + if (format == PIPE_FORMAT_ETC1_RGB8) { + /* ETC1 is arranged as 64-bit blocks, where each block + * is 4x4 pixels. Texture tiling operates on the + * 64-bit block the way it would an uncompressed + * pixels. + */ + assert(!(ptrans->box.x & 3)); + assert(!(ptrans->box.y & 3)); + ptrans->box.x >>= 2; + ptrans->box.y >>= 2; + ptrans->box.width = (ptrans->box.width + 3) >> 2; + ptrans->box.height = (ptrans->box.height + 3) >> 2; + } + /* We need to align the box to utile boundaries, since that's - * what load/store operate on. + * what load/store operates on. This may cause us to need to + * read out the original contents in that border area. Right + * now we just read out the entire contents, including the + * middle area that will just get overwritten. */ - uint32_t orig_width = ptrans->box.width; - uint32_t orig_height = ptrans->box.height; uint32_t box_start_x = ptrans->box.x & (utile_w - 1); uint32_t box_start_y = ptrans->box.y & (utile_h - 1); - ptrans->box.width += box_start_x; - ptrans->box.x -= box_start_x; - ptrans->box.height += box_start_y; - ptrans->box.y -= box_start_y; - ptrans->box.width = align(ptrans->box.width, utile_w); - ptrans->box.height = align(ptrans->box.height, utile_h); + bool needs_load = (usage & PIPE_TRANSFER_READ) != 0; + + if (box_start_x) { + ptrans->box.width += box_start_x; + ptrans->box.x -= box_start_x; + needs_load = true; + } + if (box_start_y) { + ptrans->box.height += box_start_y; + ptrans->box.y -= box_start_y; + needs_load = true; + } + if (ptrans->box.width & (utile_w - 1)) { + /* We only need to force a load if our border region + * we're extending into is actually part of the + * texture. + */ + uint32_t slice_width = u_minify(prsc->width0, level); + if (ptrans->box.x + ptrans->box.width != slice_width) + needs_load = true; + ptrans->box.width = align(ptrans->box.width, utile_w); + } + if (ptrans->box.height & (utile_h - 1)) { + uint32_t slice_height = u_minify(prsc->height0, level); + if (ptrans->box.y + ptrans->box.height != slice_height) + needs_load = true; + ptrans->box.height = align(ptrans->box.height, utile_h); + } ptrans->stride = ptrans->box.width * rsc->cpp; ptrans->layer_stride = ptrans->stride * ptrans->box.height; trans->map = malloc(ptrans->layer_stride * ptrans->box.depth); - if (usage & PIPE_TRANSFER_READ || - ptrans->box.width != orig_width || - ptrans->box.height != orig_height) { + + if (needs_load) { vc4_load_tiled_image(trans->map, ptrans->stride, buf + slice->offset + ptrans->box.z * rsc->cube_map_stride, @@ -353,7 +394,6 @@ .transfer_map = vc4_resource_transfer_map, .transfer_flush_region = u_default_transfer_flush_region, .transfer_unmap = vc4_resource_transfer_unmap, - .transfer_inline_write = u_default_transfer_inline_write, }; static void @@ -362,6 +402,11 @@ struct pipe_resource *prsc = &rsc->base.b; uint32_t width = prsc->width0; uint32_t height = prsc->height0; + if (prsc->format == PIPE_FORMAT_ETC1_RGB8) { + width = (width + 3) >> 2; + height = (height + 3) >> 2; + } + uint32_t pot_width = util_next_power_of_two(width); uint32_t pot_height = util_next_power_of_two(height); uint32_t offset = 0; @@ -418,9 +463,11 @@ [VC4_TILING_FORMAT_T] = 'T' }; fprintf(stderr, - "rsc setup %p (format %d), %dx%d: " + "rsc setup %p (format %s: vc4 %d), %dx%d: " "level %d (%c) -> %dx%d, stride %d@0x%08x\n", - rsc, rsc->vc4_format, + rsc, + util_format_short_name(prsc->format), + rsc->vc4_format, prsc->width0, prsc->height0, i, tiling_chars[slice->tiling], level_width, level_height, @@ -552,7 +599,7 @@ handle->stride, expected_stride); } - return NULL; + goto fail; } rsc->tiled = false; @@ -877,7 +924,9 @@ if (shadow->writes == orig->writes && orig->bo->private) return; - perf_debug("Updating shadow texture due to %s\n", + perf_debug("Updating %dx%d@%d shadow texture due to %s\n", + orig->base.b.width0, orig->base.b.height0, + view->u.tex.first_level, view->u.tex.first_level ? "base level" : "raster layout"); for (int i = 0; i <= shadow->base.b.last_level; i++) { @@ -983,7 +1032,8 @@ pctx->transfer_map = u_transfer_map_vtbl; pctx->transfer_flush_region = u_transfer_flush_region_vtbl; pctx->transfer_unmap = u_transfer_unmap_vtbl; - pctx->transfer_inline_write = u_transfer_inline_write_vtbl; + pctx->buffer_subdata = u_default_buffer_subdata; + pctx->texture_subdata = u_default_texture_subdata; pctx->create_surface = vc4_create_surface; pctx->surface_destroy = vc4_surface_destroy; pctx->resource_copy_region = util_resource_copy_region; diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_resource.h mesa-17.0.7/src/gallium/drivers/vc4/vc4_resource.h --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_resource.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_resource.h 2017-06-01 10:37:10.000000000 +0000 @@ -71,6 +71,17 @@ uint64_t writes; /** + * Bitmask of PIPE_CLEAR_COLOR0, PIPE_CLEAR_DEPTH, PIPE_CLEAR_STENCIL + * for which parts of the resource are defined. + * + * Used for avoiding fallback to quad clears for clearing just depth, + * when the stencil contents have never been initialized. Note that + * we're lazy and fields not present in the buffer (DEPTH in a color + * buffer) may get marked. + */ + uint32_t initialized_buffers; + + /** * Resource containing the non-GL_TEXTURE_BASE_LEVEL-rebased texture * contents, or the 4-byte index buffer. * diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_screen.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_screen.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_screen.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_screen.c 2017-06-01 10:37:10.000000000 +0000 @@ -33,6 +33,8 @@ #include "util/u_hash_table.h" #include "util/ralloc.h" +#include +#include "vc4_drm.h" #include "vc4_screen.h" #include "vc4_context.h" #include "vc4_resource.h" @@ -71,7 +73,16 @@ static const char * vc4_screen_get_name(struct pipe_screen *pscreen) { - return "VC4"; + struct vc4_screen *screen = vc4_screen(pscreen); + + if (!screen->name) { + screen->name = ralloc_asprintf(screen, + "VC4 V3D %d.%d", + screen->v3d_ver / 10, + screen->v3d_ver % 10); + } + + return screen->name; } static const char * @@ -87,6 +98,12 @@ util_hash_table_destroy(screen->bo_handles); vc4_bufmgr_destroy(pscreen); + slab_destroy_parent(&screen->transfer_pool); + +#if USE_VC4_SIMULATOR + vc4_simulator_destroy(screen); +#endif + close(screen->fd); ralloc_free(pscreen); } @@ -130,6 +147,7 @@ return 1; case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES: + case PIPE_CAP_MIXED_COLOR_DEPTH_BITS: return 1; /* Unsupported features. */ @@ -216,11 +234,21 @@ case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR: case PIPE_CAP_CULL_DISTANCE: case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES: + case PIPE_CAP_TGSI_VOTE: + case PIPE_CAP_MAX_WINDOW_RECTANGLES: + case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED: + case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS: + case PIPE_CAP_TGSI_ARRAY_COMPONENTS: + case PIPE_CAP_TGSI_CAN_READ_OUTPUTS: + case PIPE_CAP_NATIVE_FENCE_FD: + case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY: + case PIPE_CAP_TGSI_FS_FBFETCH: return 0; /* Stream output. */ case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS: case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME: + case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS: case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS: case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS: return 0; @@ -328,8 +356,10 @@ case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS: case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS: return 16384; + case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH: - return 0; + return vc4_screen(pscreen)->has_control_flow; + case PIPE_SHADER_CAP_MAX_INPUTS: if (shader == PIPE_SHADER_FRAGMENT) return 8; @@ -369,13 +399,14 @@ case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS: return VC4_MAX_TEXTURE_SAMPLERS; case PIPE_SHADER_CAP_PREFERRED_IR: - return PIPE_SHADER_IR_TGSI; + return PIPE_SHADER_IR_NIR; case PIPE_SHADER_CAP_SUPPORTED_IRS: return 0; case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: return 32; case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: + case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: return 0; default: fprintf(stderr, "unknown shader param %d\n", param); @@ -391,6 +422,7 @@ unsigned sample_count, unsigned usage) { + struct vc4_screen *screen = vc4_screen(pscreen); unsigned retval = 0; if (sample_count > 1 && sample_count != VC4_MAX_SAMPLES) @@ -460,7 +492,8 @@ } if ((usage & PIPE_BIND_SAMPLER_VIEW) && - vc4_tex_format_supported(format)) { + vc4_tex_format_supported(format) && + (format != PIPE_FORMAT_ETC1_RGB8 || screen->has_etc1)) { retval |= PIPE_BIND_SAMPLER_VIEW; } @@ -476,11 +509,6 @@ retval |= PIPE_BIND_INDEX_BUFFER; } - if (usage & PIPE_BIND_TRANSFER_READ) - retval |= PIPE_BIND_TRANSFER_READ; - if (usage & PIPE_BIND_TRANSFER_WRITE) - retval |= PIPE_BIND_TRANSFER_WRITE; - #if 0 if (retval != usage) { fprintf(stderr, @@ -505,6 +533,67 @@ return PTR_TO_UINT(key1) != PTR_TO_UINT(key2); } +static bool +vc4_has_feature(struct vc4_screen *screen, uint32_t feature) +{ + struct drm_vc4_get_param p = { + .param = feature, + }; + int ret = vc4_ioctl(screen->fd, DRM_IOCTL_VC4_GET_PARAM, &p); + + if (ret != 0) + return false; + + return p.value; +} + +static bool +vc4_get_chip_info(struct vc4_screen *screen) +{ + struct drm_vc4_get_param ident0 = { + .param = DRM_VC4_PARAM_V3D_IDENT0, + }; + struct drm_vc4_get_param ident1 = { + .param = DRM_VC4_PARAM_V3D_IDENT1, + }; + int ret; + + ret = vc4_ioctl(screen->fd, DRM_IOCTL_VC4_GET_PARAM, &ident0); + if (ret != 0) { + if (errno == EINVAL) { + /* Backwards compatibility with 2835 kernels which + * only do V3D 2.1. + */ + screen->v3d_ver = 21; + return true; + } else { + fprintf(stderr, "Couldn't get V3D IDENT0: %s\n", + strerror(errno)); + return false; + } + } + ret = vc4_ioctl(screen->fd, DRM_IOCTL_VC4_GET_PARAM, &ident1); + if (ret != 0) { + fprintf(stderr, "Couldn't get V3D IDENT1: %s\n", + strerror(errno)); + return false; + } + + uint32_t major = (ident0.value >> 24) & 0xff; + uint32_t minor = (ident1.value >> 0) & 0xf; + screen->v3d_ver = major * 10 + minor; + + if (screen->v3d_ver != 21) { + fprintf(stderr, + "V3D %d.%d not supported by this version of Mesa.\n", + screen->v3d_ver / 10, + screen->v3d_ver % 10); + return false; + } + + return true; +} + struct pipe_screen * vc4_screen_create(int fd) { @@ -525,6 +614,18 @@ pipe_mutex_init(screen->bo_handles_mutex); screen->bo_handles = util_hash_table_create(handle_hash, handle_compare); + screen->has_control_flow = + vc4_has_feature(screen, DRM_VC4_PARAM_SUPPORTS_BRANCHES); + screen->has_etc1 = + vc4_has_feature(screen, DRM_VC4_PARAM_SUPPORTS_ETC1); + screen->has_threaded_fs = + vc4_has_feature(screen, DRM_VC4_PARAM_SUPPORTS_THREADED_FS); + + if (!vc4_get_chip_info(screen)) + goto fail; + + slab_create_parent(&screen->transfer_pool, sizeof(struct vc4_transfer), 16); + vc4_fence_init(screen); vc4_debug = debug_get_option_vc4_debug(); @@ -540,8 +641,14 @@ pscreen->get_name = vc4_screen_get_name; pscreen->get_vendor = vc4_screen_get_vendor; pscreen->get_device_vendor = vc4_screen_get_vendor; + pscreen->get_compiler_options = vc4_screen_get_compiler_options; return pscreen; + +fail: + close(fd); + ralloc_free(pscreen); + return NULL; } boolean diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_screen.h mesa-17.0.7/src/gallium/drivers/vc4/vc4_screen.h --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_screen.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_screen.h 2017-06-01 10:37:10.000000000 +0000 @@ -28,6 +28,11 @@ #include "os/os_thread.h" #include "state_tracker/drm_driver.h" #include "util/list.h" +#include "util/slab.h" + +#ifndef DRM_VC4_PARAM_SUPPORTS_ETC1 +#define DRM_VC4_PARAM_SUPPORTS_ETC1 4 +#endif struct vc4_bo; @@ -46,12 +51,15 @@ #define VC4_MAX_MIP_LEVELS 12 #define VC4_MAX_TEXTURE_SAMPLERS 16 +struct vc4_simulator_file; + struct vc4_screen { struct pipe_screen base; int fd; - void *simulator_mem_base; - uint32_t simulator_mem_size; + int v3d_ver; + + const char *name; /** The last seqno we've completed a wait for. * @@ -60,6 +68,8 @@ */ uint64_t finished_seqno; + struct slab_parent_pool transfer_pool; + struct vc4_bo_cache { /** List of struct vc4_bo freed, by age. */ struct list_head time_list; @@ -78,6 +88,11 @@ uint32_t bo_size; uint32_t bo_count; + bool has_control_flow; + bool has_etc1; + bool has_threaded_fs; + + struct vc4_simulator_file *sim_file; }; static inline struct vc4_screen * @@ -95,6 +110,10 @@ vc4_screen_bo_from_handle(struct pipe_screen *pscreen, struct winsys_handle *whandle); +const void * +vc4_screen_get_compiler_options(struct pipe_screen *pscreen, + enum pipe_shader_ir ir, unsigned shader); + extern uint32_t vc4_debug; void diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_simulator.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_simulator.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_simulator.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_simulator.c 2017-06-01 10:37:10.000000000 +0000 @@ -21,9 +21,37 @@ * IN THE SOFTWARE. */ +/** + * @file vc4_simulator.c + * + * Implements VC4 simulation on top of a non-VC4 GEM fd. + * + * This file's goal is to emulate the VC4 ioctls' behavior in the kernel on + * top of the simpenrose software simulator. Generally, VC4 driver BOs have a + * GEM-side copy of their contents and a simulator-side memory area that the + * GEM contents get copied into during simulation. Once simulation is done, + * the simulator's data is copied back out to the GEM BOs, so that rendering + * appears on the screen as if actual hardware rendering had been done. + * + * One of the limitations of this code is that we shouldn't really need a + * GEM-side BO for non-window-system BOs. However, do we need unique BO + * handles for each of our GEM bos so that this file can look up its state + * from the handle passed in at submit ioctl time (also, a couple of places + * outside of this file still call ioctls directly on the fd). + * + * Another limitation is that BO import doesn't work unless the underlying + * window system's BO size matches what VC4 is going to use, which of course + * doesn't work out in practice. This means that for now, only DRI3 (VC4 + * makes the winsys BOs) is supported, not DRI2 (window system makes the winys + * BOs). + */ + #ifdef USE_VC4_SIMULATOR +#include +#include "xf86drm.h" #include "util/u_memory.h" +#include "util/u_mm.h" #include "util/ralloc.h" #include "vc4_screen.h" @@ -32,61 +60,173 @@ #include "vc4_simulator_validate.h" #include "simpenrose/simpenrose.h" +/** Global (across GEM fds) state for the simulator */ +static struct vc4_simulator_state { + mtx_t mutex; + + void *mem; + ssize_t mem_size; + struct mem_block *heap; + struct mem_block *overflow; + + /** Mapping from GEM handle to struct vc4_simulator_bo * */ + struct hash_table *fd_map; + + int refcount; +} sim_state = { + .mutex = _MTX_INITIALIZER_NP, +}; + +/** Per-GEM-fd state for the simulator. */ +struct vc4_simulator_file { + int fd; + + /* This is weird -- we make a "vc4_device" per file, even though on + * the kernel side this is a global. We do this so that kernel code + * calling us for BO allocation can get to our screen. + */ + struct drm_device dev; + + /** Mapping from GEM handle to struct vc4_simulator_bo * */ + struct hash_table *bo_map; +}; + +/** Wrapper for drm_vc4_bo tracking the simulator-specific state. */ +struct vc4_simulator_bo { + struct drm_vc4_bo base; + struct vc4_simulator_file *file; + + /** Area for this BO within sim_state->mem */ + struct mem_block *block; + void *winsys_map; + uint32_t winsys_stride; + + int handle; +}; + +static void * +int_to_key(int key) +{ + return (void *)(uintptr_t)key; +} + +static struct vc4_simulator_file * +vc4_get_simulator_file_for_fd(int fd) +{ + struct hash_entry *entry = _mesa_hash_table_search(sim_state.fd_map, + int_to_key(fd + 1)); + return entry ? entry->data : NULL; +} + /* A marker placed just after each BO, then checked after rendering to make * sure it's still there. */ #define BO_SENTINEL 0xfedcba98 -#define OVERFLOW_SIZE (32 * 1024 * 1024) +#define PAGE_ALIGN2 12 -static struct drm_gem_cma_object * -vc4_wrap_bo_with_cma(struct drm_device *dev, struct vc4_bo *bo) +/** + * Allocates space in simulator memory and returns a tracking struct for it + * that also contains the drm_gem_cma_object struct. + */ +static struct vc4_simulator_bo * +vc4_create_simulator_bo(int fd, int handle, unsigned size) { - struct vc4_context *vc4 = dev->vc4; - struct vc4_screen *screen = vc4->screen; - struct drm_vc4_bo *drm_bo = CALLOC_STRUCT(drm_vc4_bo); - struct drm_gem_cma_object *obj = &drm_bo->base; - uint32_t size = align(bo->size, 4096); + struct vc4_simulator_file *file = vc4_get_simulator_file_for_fd(fd); + struct vc4_simulator_bo *sim_bo = rzalloc(file, + struct vc4_simulator_bo); + struct drm_vc4_bo *bo = &sim_bo->base; + struct drm_gem_cma_object *obj = &bo->base; + size = align(size, 4096); + + sim_bo->file = file; + sim_bo->handle = handle; + + mtx_lock(&sim_state.mutex); + sim_bo->block = u_mmAllocMem(sim_state.heap, size + 4, PAGE_ALIGN2, 0); + mtx_unlock(&sim_state.mutex); + assert(sim_bo->block); - drm_bo->bo = bo; obj->base.size = size; - obj->base.dev = dev; - obj->vaddr = screen->simulator_mem_base + dev->simulator_mem_next; + obj->base.dev = &file->dev; + obj->vaddr = sim_state.mem + sim_bo->block->ofs; obj->paddr = simpenrose_hw_addr(obj->vaddr); - dev->simulator_mem_next += size + sizeof(uint32_t); - dev->simulator_mem_next = align(dev->simulator_mem_next, 4096); - assert(dev->simulator_mem_next <= screen->simulator_mem_size); + *(uint32_t *)(obj->vaddr + size) = BO_SENTINEL; - *(uint32_t *)(obj->vaddr + bo->size) = BO_SENTINEL; + /* A handle of 0 is used for vc4_gem.c internal allocations that + * don't need to go in the lookup table. + */ + if (handle != 0) { + mtx_lock(&sim_state.mutex); + _mesa_hash_table_insert(file->bo_map, int_to_key(handle), bo); + mtx_unlock(&sim_state.mutex); + } - return obj; + return sim_bo; +} + +static void +vc4_free_simulator_bo(struct vc4_simulator_bo *sim_bo) +{ + struct vc4_simulator_file *sim_file = sim_bo->file; + struct drm_vc4_bo *bo = &sim_bo->base; + struct drm_gem_cma_object *obj = &bo->base; + + if (sim_bo->winsys_map) + munmap(sim_bo->winsys_map, obj->base.size); + + mtx_lock(&sim_state.mutex); + u_mmFreeMem(sim_bo->block); + if (sim_bo->handle) { + struct hash_entry *entry = + _mesa_hash_table_search(sim_file->bo_map, + int_to_key(sim_bo->handle)); + _mesa_hash_table_remove(sim_file->bo_map, entry); + } + mtx_unlock(&sim_state.mutex); + ralloc_free(sim_bo); +} + +static struct vc4_simulator_bo * +vc4_get_simulator_bo(struct vc4_simulator_file *file, int gem_handle) +{ + mtx_lock(&sim_state.mutex); + struct hash_entry *entry = + _mesa_hash_table_search(file->bo_map, int_to_key(gem_handle)); + mtx_unlock(&sim_state.mutex); + + return entry ? entry->data : NULL; } struct drm_gem_cma_object * drm_gem_cma_create(struct drm_device *dev, size_t size) { - struct vc4_context *vc4 = dev->vc4; - struct vc4_screen *screen = vc4->screen; - - struct vc4_bo *bo = vc4_bo_alloc(screen, size, "simulator validate"); - return vc4_wrap_bo_with_cma(dev, bo); + struct vc4_screen *screen = dev->screen; + struct vc4_simulator_bo *sim_bo = vc4_create_simulator_bo(screen->fd, + 0, size); + return &sim_bo->base.base; } static int -vc4_simulator_pin_bos(struct drm_device *dev, struct vc4_exec_info *exec) +vc4_simulator_pin_bos(struct drm_device *dev, struct vc4_job *job, + struct vc4_exec_info *exec) { + int fd = dev->screen->fd; + struct vc4_simulator_file *file = vc4_get_simulator_file_for_fd(fd); struct drm_vc4_submit_cl *args = exec->args; - struct vc4_context *vc4 = dev->vc4; - struct vc4_bo **bos = vc4->bo_pointers.base; + struct vc4_bo **bos = job->bo_pointers.base; exec->bo_count = args->bo_handle_count; exec->bo = calloc(exec->bo_count, sizeof(void *)); for (int i = 0; i < exec->bo_count; i++) { struct vc4_bo *bo = bos[i]; - struct drm_gem_cma_object *obj = vc4_wrap_bo_with_cma(dev, bo); + struct vc4_simulator_bo *sim_bo = + vc4_get_simulator_bo(file, bo->handle); + struct drm_vc4_bo *drm_bo = &sim_bo->base; + struct drm_gem_cma_object *obj = &drm_bo->base; - struct drm_vc4_bo *drm_bo = to_vc4_bo(&obj->base); + drm_bo->bo = bo; #if 0 fprintf(stderr, "bo hindex %d: %s\n", i, bo->name); #endif @@ -116,14 +256,14 @@ struct drm_vc4_bo *drm_bo = to_vc4_bo(&obj->base); struct vc4_bo *bo = drm_bo->bo; - assert(*(uint32_t *)(obj->vaddr + bo->size) == BO_SENTINEL); + assert(*(uint32_t *)(obj->vaddr + + obj->base.size) == BO_SENTINEL); memcpy(bo->map, obj->vaddr, bo->size); if (drm_bo->validated_shader) { free(drm_bo->validated_shader->texture_samples); free(drm_bo->validated_shader); } - free(obj); } free(exec->bo); @@ -192,8 +332,8 @@ /* Add the static overflow memory area. */ bo_state[i].handle = exec->bo_count; - bo_state[i].paddr = 0; - bo_state[i].size = OVERFLOW_SIZE; + bo_state[i].paddr = sim_state.overflow->ofs; + bo_state[i].size = sim_state.overflow->size; i++; fwrite(bo_state, sizeof(*bo_state), state->bo_count, f); @@ -209,8 +349,8 @@ fwrite(cma_bo->vaddr, cma_bo->base.size, 1, f); } - void *overflow = calloc(1, OVERFLOW_SIZE); - fwrite(overflow, 1, OVERFLOW_SIZE, f); + void *overflow = calloc(1, sim_state.overflow->size); + fwrite(overflow, 1, sim_state.overflow->size, f); free(overflow); free(state); @@ -219,26 +359,26 @@ } int -vc4_simulator_flush(struct vc4_context *vc4, struct drm_vc4_submit_cl *args) +vc4_simulator_flush(struct vc4_context *vc4, + struct drm_vc4_submit_cl *args, struct vc4_job *job) { struct vc4_screen *screen = vc4->screen; + int fd = screen->fd; + struct vc4_simulator_file *file = vc4_get_simulator_file_for_fd(fd); struct vc4_surface *csurf = vc4_surface(vc4->framebuffer.cbufs[0]); struct vc4_resource *ctex = csurf ? vc4_resource(csurf->base.texture) : NULL; - uint32_t winsys_stride = ctex ? ctex->bo->simulator_winsys_stride : 0; + struct vc4_simulator_bo *csim_bo = ctex ? vc4_get_simulator_bo(file, ctex->bo->handle) : NULL; + uint32_t winsys_stride = ctex ? csim_bo->winsys_stride : 0; uint32_t sim_stride = ctex ? ctex->slices[0].stride : 0; uint32_t row_len = MIN2(sim_stride, winsys_stride); struct vc4_exec_info exec; - struct drm_device local_dev = { - .vc4 = vc4, - .simulator_mem_next = OVERFLOW_SIZE, - }; - struct drm_device *dev = &local_dev; + struct drm_device *dev = &file->dev; int ret; memset(&exec, 0, sizeof(exec)); list_inithead(&exec.unref_list); - if (ctex && ctex->bo->simulator_winsys_map) { + if (ctex && csim_bo->winsys_map) { #if 0 fprintf(stderr, "%dx%d %d %d %d\n", ctex->base.b.width0, ctex->base.b.height0, @@ -249,14 +389,14 @@ for (int y = 0; y < ctex->base.b.height0; y++) { memcpy(ctex->bo->map + y * sim_stride, - ctex->bo->simulator_winsys_map + y * winsys_stride, + csim_bo->winsys_map + y * winsys_stride, row_len); } } exec.args = args; - ret = vc4_simulator_pin_bos(dev, &exec); + ret = vc4_simulator_pin_bos(dev, job, &exec); if (ret) return ret; @@ -266,7 +406,7 @@ if (vc4_debug & VC4_DEBUG_CL) { fprintf(stderr, "RCL:\n"); - vc4_dump_cl(screen->simulator_mem_base + exec.ct1ca, + vc4_dump_cl(sim_state.mem + exec.ct1ca, exec.ct1ea - exec.ct1ca, true); } @@ -278,7 +418,7 @@ fprintf(stderr, "Binning returned %d flushes, should be 1.\n", bfc); fprintf(stderr, "Relocated binning command list:\n"); - vc4_dump_cl(screen->simulator_mem_base + exec.ct0ca, + vc4_dump_cl(sim_state.mem + exec.ct0ca, exec.ct0ea - exec.ct0ca, false); abort(); } @@ -288,7 +428,7 @@ fprintf(stderr, "Rendering returned %d frames, should be 1.\n", rfc); fprintf(stderr, "Relocated render command list:\n"); - vc4_dump_cl(screen->simulator_mem_base + exec.ct1ca, + vc4_dump_cl(sim_state.mem + exec.ct1ca, exec.ct1ea - exec.ct1ca, true); abort(); } @@ -299,16 +439,17 @@ list_for_each_entry_safe(struct drm_vc4_bo, bo, &exec.unref_list, unref_head) { + struct vc4_simulator_bo *sim_bo = (struct vc4_simulator_bo *)bo; + struct drm_gem_cma_object *obj = &sim_bo->base.base; list_del(&bo->unref_head); - assert(*(uint32_t *)(bo->base.vaddr + bo->bo->size) == + assert(*(uint32_t *)(obj->vaddr + obj->base.size) == BO_SENTINEL); - vc4_bo_unreference(&bo->bo); - free(bo); + vc4_free_simulator_bo(sim_bo); } - if (ctex && ctex->bo->simulator_winsys_map) { + if (ctex && csim_bo->winsys_map) { for (int y = 0; y < ctex->base.b.height0; y++) { - memcpy(ctex->bo->simulator_winsys_map + y * winsys_stride, + memcpy(csim_bo->winsys_map + y * winsys_stride, ctex->bo->map + y * sim_stride, row_len); } @@ -317,18 +458,234 @@ return 0; } -void -vc4_simulator_init(struct vc4_screen *screen) +/** + * Map the underlying GEM object from the real hardware GEM handle. + */ +static void * +vc4_simulator_map_winsys_bo(int fd, struct vc4_simulator_bo *sim_bo) { - screen->simulator_mem_size = 256 * 1024 * 1024; - screen->simulator_mem_base = ralloc_size(screen, - screen->simulator_mem_size); + struct drm_vc4_bo *bo = &sim_bo->base; + struct drm_gem_cma_object *obj = &bo->base; + int ret; + void *map; + + struct drm_mode_map_dumb map_dumb = { + .handle = sim_bo->handle, + }; + ret = drmIoctl(fd, DRM_IOCTL_MODE_MAP_DUMB, &map_dumb); + if (ret != 0) { + fprintf(stderr, "map ioctl failure\n"); + abort(); + } + + map = mmap(NULL, obj->base.size, PROT_READ | PROT_WRITE, MAP_SHARED, + fd, map_dumb.offset); + if (map == MAP_FAILED) { + fprintf(stderr, + "mmap of bo %d (offset 0x%016llx, size %d) failed\n", + sim_bo->handle, (long long)map_dumb.offset, + (int)obj->base.size); + abort(); + } + + return map; +} + +/** + * Do fixups after a BO has been opened from a handle. + * + * This could be done at DRM_IOCTL_GEM_OPEN/DRM_IOCTL_GEM_PRIME_FD_TO_HANDLE + * time, but we're still using drmPrimeFDToHandle() so we have this helper to + * be called afterward instead. + */ +void vc4_simulator_open_from_handle(int fd, uint32_t winsys_stride, + int handle, uint32_t size) +{ + struct vc4_simulator_bo *sim_bo = + vc4_create_simulator_bo(fd, handle, size); + + sim_bo->winsys_stride = winsys_stride; + sim_bo->winsys_map = vc4_simulator_map_winsys_bo(fd, sim_bo); +} + +/** + * Simulated ioctl(fd, DRM_VC4_CREATE_BO) implementation. + * + * Making a VC4 BO is just a matter of making a corresponding BO on the host. + */ +static int +vc4_simulator_create_bo_ioctl(int fd, struct drm_vc4_create_bo *args) +{ + int ret; + struct drm_mode_create_dumb create = { + .width = 128, + .bpp = 8, + .height = (args->size + 127) / 128, + }; + + ret = drmIoctl(fd, DRM_IOCTL_MODE_CREATE_DUMB, &create); + assert(create.size >= args->size); + + args->handle = create.handle; + + vc4_create_simulator_bo(fd, create.handle, args->size); + + return ret; +} + +/** + * Simulated ioctl(fd, DRM_VC4_CREATE_SHADER_BO) implementation. + * + * In simulation we defer shader validation until exec time. Just make a host + * BO and memcpy the contents in. + */ +static int +vc4_simulator_create_shader_bo_ioctl(int fd, + struct drm_vc4_create_shader_bo *args) +{ + int ret; + struct drm_mode_create_dumb create = { + .width = 128, + .bpp = 8, + .height = (args->size + 127) / 128, + }; + + ret = drmIoctl(fd, DRM_IOCTL_MODE_CREATE_DUMB, &create); + if (ret) + return ret; + assert(create.size >= args->size); + + args->handle = create.handle; + + vc4_create_simulator_bo(fd, create.handle, args->size); + + struct drm_mode_map_dumb map = { + .handle = create.handle + }; + ret = drmIoctl(fd, DRM_IOCTL_MODE_MAP_DUMB, &map); + if (ret) + return ret; + + void *shader = mmap(NULL, args->size, PROT_READ | PROT_WRITE, MAP_SHARED, + fd, map.offset); + memcpy(shader, (void *)(uintptr_t)args->data, args->size); + munmap(shader, args->size); + + return 0; +} + +/** + * Simulated ioctl(fd, DRM_VC4_MMAP_BO) implementation. + * + * We just pass this straight through to dumb mmap. + */ +static int +vc4_simulator_mmap_bo_ioctl(int fd, struct drm_vc4_mmap_bo *args) +{ + int ret; + struct drm_mode_map_dumb map = { + .handle = args->handle, + }; + + ret = drmIoctl(fd, DRM_IOCTL_MODE_MAP_DUMB, &map); + args->offset = map.offset; + + return ret; +} + +static int +vc4_simulator_gem_close_ioctl(int fd, struct drm_gem_close *args) +{ + /* Free the simulator's internal tracking. */ + struct vc4_simulator_file *file = vc4_get_simulator_file_for_fd(fd); + struct vc4_simulator_bo *sim_bo = vc4_get_simulator_bo(file, + args->handle); + + vc4_free_simulator_bo(sim_bo); + + /* Pass the call on down. */ + return drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, args); +} + +static int +vc4_simulator_get_param_ioctl(int fd, struct drm_vc4_get_param *args) +{ + switch (args->param) { + case DRM_VC4_PARAM_SUPPORTS_BRANCHES: + case DRM_VC4_PARAM_SUPPORTS_ETC1: + case DRM_VC4_PARAM_SUPPORTS_THREADED_FS: + args->value = true; + return 0; + + case DRM_VC4_PARAM_V3D_IDENT0: + args->value = 0x02000000; + return 0; + + case DRM_VC4_PARAM_V3D_IDENT1: + args->value = 0x00000001; + return 0; + + default: + fprintf(stderr, "Unknown DRM_IOCTL_VC4_GET_PARAM(%lld)\n", + (long long)args->param); + abort(); + }; +} + +int +vc4_simulator_ioctl(int fd, unsigned long request, void *args) +{ + switch (request) { + case DRM_IOCTL_VC4_CREATE_BO: + return vc4_simulator_create_bo_ioctl(fd, args); + case DRM_IOCTL_VC4_CREATE_SHADER_BO: + return vc4_simulator_create_shader_bo_ioctl(fd, args); + case DRM_IOCTL_VC4_MMAP_BO: + return vc4_simulator_mmap_bo_ioctl(fd, args); + + case DRM_IOCTL_VC4_WAIT_BO: + case DRM_IOCTL_VC4_WAIT_SEQNO: + /* We do all of the vc4 rendering synchronously, so we just + * return immediately on the wait ioctls. This ignores any + * native rendering to the host BO, so it does mean we race on + * front buffer rendering. + */ + return 0; + + case DRM_IOCTL_VC4_GET_PARAM: + return vc4_simulator_get_param_ioctl(fd, args); + + case DRM_IOCTL_GEM_CLOSE: + return vc4_simulator_gem_close_ioctl(fd, args); + + case DRM_IOCTL_GEM_OPEN: + case DRM_IOCTL_GEM_FLINK: + return drmIoctl(fd, request, args); + default: + fprintf(stderr, "Unknown ioctl 0x%08x\n", (int)request); + abort(); + } +} + +static void +vc4_simulator_init_global(void) +{ + mtx_lock(&sim_state.mutex); + if (sim_state.refcount++) { + mtx_unlock(&sim_state.mutex); + return; + } + + sim_state.mem_size = 256 * 1024 * 1024; + sim_state.mem = calloc(sim_state.mem_size, 1); + if (!sim_state.mem) + abort(); + sim_state.heap = u_mmInit(0, sim_state.mem_size); /* We supply our own memory so that we can have more aperture * available (256MB instead of simpenrose's default 64MB). */ - simpenrose_init_hardware_supply_mem(screen->simulator_mem_base, - screen->simulator_mem_size); + simpenrose_init_hardware_supply_mem(sim_state.mem, sim_state.mem_size); /* Carve out low memory for tile allocation overflow. The kernel * should be automatically handling overflow memory setup on real @@ -337,7 +694,50 @@ * up over the whole lifetime of simpenrose (not reused on each * flush), so it had better be big. */ - simpenrose_supply_overflow_mem(0, OVERFLOW_SIZE); + sim_state.overflow = u_mmAllocMem(sim_state.heap, 32 * 1024 * 1024, + PAGE_ALIGN2, 0); + simpenrose_supply_overflow_mem(sim_state.overflow->ofs, + sim_state.overflow->size); + + mtx_unlock(&sim_state.mutex); + + sim_state.fd_map = + _mesa_hash_table_create(NULL, + _mesa_hash_pointer, + _mesa_key_pointer_equal); +} + +void +vc4_simulator_init(struct vc4_screen *screen) +{ + vc4_simulator_init_global(); + + screen->sim_file = rzalloc(screen, struct vc4_simulator_file); + + screen->sim_file->bo_map = + _mesa_hash_table_create(screen->sim_file, + _mesa_hash_pointer, + _mesa_key_pointer_equal); + + mtx_lock(&sim_state.mutex); + _mesa_hash_table_insert(sim_state.fd_map, int_to_key(screen->fd + 1), + screen->sim_file); + mtx_unlock(&sim_state.mutex); + + screen->sim_file->dev.screen = screen; +} + +void +vc4_simulator_destroy(struct vc4_screen *screen) +{ + mtx_lock(&sim_state.mutex); + if (!--sim_state.refcount) { + _mesa_hash_table_destroy(sim_state.fd_map, NULL); + u_mmDestroy(sim_state.heap); + free(sim_state.mem); + /* No memsetting it, because it contains the mutex. */ + } + mtx_unlock(&sim_state.mutex); } #endif /* USE_VC4_SIMULATOR */ diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_simulator_validate.h mesa-17.0.7/src/gallium/drivers/vc4/vc4_simulator_validate.h --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_simulator_validate.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_simulator_validate.h 2017-06-01 10:37:10.000000000 +0000 @@ -47,6 +47,24 @@ #define max(x, y) MAX2(x, y) #define min(x, y) MIN2(x, y) #define BUG_ON(condition) assert(!(condition)) +#define BIT(bit) (1u << bit) + +/* Unsigned long-based bitmap interface in the linux kernel */ +#define BITMAP_WORDBITS (sizeof(unsigned long) * 8) +#define BITS_TO_LONGS(bits) (roundup(bits, BITMAP_WORDBITS) / \ + sizeof(unsigned long)) +static inline bool +test_bit(unsigned int bit, unsigned long *addr) +{ + return addr[bit / BITMAP_WORDBITS] & (1ul << (bit % BITMAP_WORDBITS)); +} + +static inline bool +set_bit(unsigned int bit, unsigned long *addr) +{ + return addr[bit / BITMAP_WORDBITS] |= (1ul << (bit % BITMAP_WORDBITS)); +} + static inline int copy_from_user(void *dst, void *src, size_t size) @@ -60,8 +78,7 @@ typedef uint32_t u32; struct drm_device { - struct vc4_context *vc4; - uint32_t simulator_mem_next; + struct vc4_screen *screen; }; struct drm_gem_object { diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_state.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_state.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -375,7 +375,7 @@ static void vc4_set_constant_buffer(struct pipe_context *pctx, uint shader, uint index, - struct pipe_constant_buffer *cb) + const struct pipe_constant_buffer *cb) { struct vc4_context *vc4 = vc4_context(pctx); struct vc4_constbuf_stateobj *so = &vc4->constbuf[shader]; @@ -409,7 +409,7 @@ struct pipe_framebuffer_state *cso = &vc4->framebuffer; unsigned i; - vc4_flush(pctx); + vc4->job = NULL; for (i = 0; i < framebuffer->nr_cbufs; i++) pipe_surface_reference(&cso->cbufs[i], framebuffer->cbufs[i]); @@ -423,23 +423,6 @@ cso->width = framebuffer->width; cso->height = framebuffer->height; - /* If we're binding to uninitialized buffers, no need to load their - * contents before drawing.. - */ - if (cso->cbufs[0]) { - struct vc4_resource *rsc = - vc4_resource(cso->cbufs[0]->texture); - if (!rsc->writes) - vc4->cleared |= PIPE_CLEAR_COLOR0; - } - - if (cso->zsbuf) { - struct vc4_resource *rsc = - vc4_resource(cso->zsbuf->texture); - if (!rsc->writes) - vc4->cleared |= PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL; - } - /* Nonzero texture mipmap levels are laid out as if they were in * power-of-two-sized spaces. The renderbuffer config infers its * stride from the width parameter, so we need to configure our @@ -460,30 +443,12 @@ rsc->cpp); } - vc4->msaa = false; - if (cso->cbufs[0]) - vc4->msaa = cso->cbufs[0]->texture->nr_samples > 1; - else if (cso->zsbuf) - vc4->msaa = cso->zsbuf->texture->nr_samples > 1; - - if (vc4->msaa) { - vc4->tile_width = 32; - vc4->tile_height = 32; - } else { - vc4->tile_width = 64; - vc4->tile_height = 64; - } - vc4->draw_tiles_x = DIV_ROUND_UP(cso->width, vc4->tile_width); - vc4->draw_tiles_y = DIV_ROUND_UP(cso->height, vc4->tile_height); - vc4->dirty |= VC4_DIRTY_FRAMEBUFFER; } static struct vc4_texture_stateobj * -vc4_get_stage_tex(struct vc4_context *vc4, unsigned shader) +vc4_get_stage_tex(struct vc4_context *vc4, enum pipe_shader_type shader) { - vc4->dirty |= VC4_DIRTY_TEXSTATE; - switch (shader) { case PIPE_SHADER_FRAGMENT: vc4->dirty |= VC4_DIRTY_FRAGTEX; @@ -561,7 +526,7 @@ static void vc4_sampler_states_bind(struct pipe_context *pctx, - unsigned shader, unsigned start, + enum pipe_shader_type shader, unsigned start, unsigned nr, void **hwcso) { struct vc4_context *vc4 = vc4_context(pctx); @@ -575,12 +540,10 @@ if (hwcso[i]) new_nr = i + 1; stage_tex->samplers[i] = hwcso[i]; - stage_tex->dirty_samplers |= (1 << i); } for (; i < stage_tex->num_samplers; i++) { stage_tex->samplers[i] = NULL; - stage_tex->dirty_samplers |= (1 << i); } stage_tex->num_samplers = new_nr; @@ -590,7 +553,7 @@ vc4_create_sampler_view(struct pipe_context *pctx, struct pipe_resource *prsc, const struct pipe_sampler_view *cso) { - struct vc4_sampler_view *so = malloc(sizeof(*so)); + struct vc4_sampler_view *so = CALLOC_STRUCT(vc4_sampler_view); struct vc4_resource *rsc = vc4_resource(prsc); if (!so) @@ -607,7 +570,8 @@ * Also, Raspberry Pi doesn't support sampling from raster textures, * so we also have to copy to a temporary then. */ - if (cso->u.tex.first_level || + if ((cso->u.tex.first_level && + (cso->u.tex.first_level != cso->u.tex.last_level)) || rsc->vc4_format == VC4_TEXTURE_TYPE_RGBA32R) { struct vc4_resource *shadow_parent = vc4_resource(prsc); struct pipe_resource tmpl = shadow_parent->base.b; @@ -630,6 +594,8 @@ clone->writes = shadow_parent->writes - 1; assert(clone->vc4_format != VC4_TEXTURE_TYPE_RGBA32R); + } else if (cso->u.tex.first_level) { + so->force_first_level = true; } so->base.texture = prsc; so->base.reference.count = 1; @@ -638,7 +604,9 @@ so->texture_p0 = (VC4_SET_FIELD(rsc->slices[0].offset >> 12, VC4_TEX_P0_OFFSET) | VC4_SET_FIELD(rsc->vc4_format & 15, VC4_TEX_P0_TYPE) | - VC4_SET_FIELD(cso->u.tex.last_level - + VC4_SET_FIELD(so->force_first_level ? + cso->u.tex.last_level : + cso->u.tex.last_level - cso->u.tex.first_level, VC4_TEX_P0_MIPLVLS) | VC4_SET_FIELD(cso->target == PIPE_TEXTURE_CUBE, VC4_TEX_P0_CMMODE)); @@ -647,6 +615,9 @@ VC4_SET_FIELD(prsc->height0 & 2047, VC4_TEX_P1_HEIGHT) | VC4_SET_FIELD(prsc->width0 & 2047, VC4_TEX_P1_WIDTH)); + if (prsc->format == PIPE_FORMAT_ETC1_RGB8) + so->texture_p1 |= VC4_TEX_P1_ETCFLIP_MASK; + return &so->base; } @@ -659,7 +630,8 @@ } static void -vc4_set_sampler_views(struct pipe_context *pctx, unsigned shader, +vc4_set_sampler_views(struct pipe_context *pctx, + enum pipe_shader_type shader, unsigned start, unsigned nr, struct pipe_sampler_view **views) { @@ -670,18 +642,14 @@ assert(start == 0); - vc4->dirty |= VC4_DIRTY_TEXSTATE; - for (i = 0; i < nr; i++) { if (views[i]) new_nr = i + 1; pipe_sampler_view_reference(&stage_tex->textures[i], views[i]); - stage_tex->dirty_samplers |= (1 << i); } for (; i < stage_tex->num_textures; i++) { pipe_sampler_view_reference(&stage_tex->textures[i], NULL); - stage_tex->dirty_samplers |= (1 << i); } stage_tex->num_textures = new_nr; diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_tiling.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_tiling.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_tiling.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_tiling.c 2017-06-01 10:37:10.000000000 +0000 @@ -52,27 +52,9 @@ #include "vc4_context.h" #include "vc4_tiling.h" -/** Return the width in pixels of a 64-byte microtile. */ -uint32_t -vc4_utile_width(int cpp) -{ - switch (cpp) { - case 1: - case 2: - return 8; - case 4: - return 4; - case 8: - return 2; - default: - fprintf(stderr, "unknown cpp: %d\n", cpp); - abort(); - } -} - -/** Return the height in pixels of a 64-byte microtile. */ -uint32_t -vc4_utile_height(int cpp) +/** Returns the stride in bytes of a 64-byte microtile. */ +static uint32_t +vc4_utile_stride(int cpp) { switch (cpp) { case 1: @@ -80,10 +62,9 @@ case 2: case 4: case 8: - return 4; + return 16; default: - fprintf(stderr, "unknown cpp: %d\n", cpp); - abort(); + unreachable("bad cpp"); } } @@ -98,28 +79,24 @@ height <= 4 * vc4_utile_height(cpp)); } -void +static void vc4_load_utile(void *dst, void *src, uint32_t dst_stride, uint32_t cpp) { - uint32_t utile_h = vc4_utile_height(cpp); - uint32_t row_size = 64 / utile_h; + uint32_t src_stride = vc4_utile_stride(cpp); - for (int y = 0; y < utile_h; y++) { - memcpy(dst, src, row_size); + for (uint32_t src_offset = 0; src_offset < 64; src_offset += src_stride) { + memcpy(dst, src + src_offset, src_stride); dst += dst_stride; - src += row_size; } } -void +static void vc4_store_utile(void *dst, void *src, uint32_t src_stride, uint32_t cpp) { - uint32_t utile_h = vc4_utile_height(cpp); - uint32_t row_size = 64 / utile_h; + uint32_t dst_stride = vc4_utile_stride(cpp); - for (int y = 0; y < utile_h; y++) { - memcpy(dst, src, row_size); - dst += row_size; + for (uint32_t dst_offset = 0; dst_offset < 64; dst_offset += dst_stride) { + memcpy(dst + dst_offset, src, dst_stride); src += src_stride; } } @@ -209,7 +186,10 @@ odd_stile_map[stile_index] : even_stile_map[stile_index]); - uint32_t utile_offset = 64 * ((utile_y & 3) * 4 + (utile_x & 3)); + /* This function no longer handles the utile offset within a subtile. + * Walking subtiles is the job of the LT image handler. + */ + assert(!(utile_x & 3) && !(utile_y & 3)); #if 0 fprintf(stderr, "utile %d,%d -> %d + %d + %d (stride %d,%d) = %d\n", @@ -219,29 +199,70 @@ tile_offset + stile_offset + utile_offset); #endif - return tile_offset + stile_offset + utile_offset; + return tile_offset + stile_offset; } -static void -vc4_load_t_image(void *dst, uint32_t dst_stride, - void *src, uint32_t src_stride, - int cpp, const struct pipe_box *box) +/** + * Loads or stores a T texture image by breaking it down into subtiles + * (1024-byte, 4x4-utile) sub-images that we can use the LT tiling functions + * on. + */ +static inline void +vc4_t_image_helper(void *gpu, uint32_t gpu_stride, + void *cpu, uint32_t cpu_stride, + int cpp, const struct pipe_box *box, + bool to_cpu) { uint32_t utile_w = vc4_utile_width(cpp); uint32_t utile_h = vc4_utile_height(cpp); - uint32_t utile_stride = src_stride / cpp / utile_w; - uint32_t xstart = box->x / utile_w; - uint32_t ystart = box->y / utile_h; - - for (uint32_t y = 0; y < box->height / utile_h; y++) { - for (int x = 0; x < box->width / utile_w; x++) { - vc4_load_utile(dst + (y * utile_h * dst_stride + - x * utile_w * cpp), - src + t_utile_address(xstart + x, - ystart + y, - utile_stride), - dst_stride, cpp); + uint32_t utile_w_shift = ffs(utile_w) - 1; + uint32_t utile_h_shift = ffs(utile_h) - 1; + uint32_t stile_w = 4 * utile_w; + uint32_t stile_h = 4 * utile_h; + assert(stile_w * stile_h * cpp == 1024); + uint32_t utile_stride = gpu_stride / cpp / utile_w; + uint32_t x1 = box->x; + uint32_t y1 = box->y; + uint32_t x2 = box->x + box->width; + uint32_t y2 = box->y + box->height; + struct pipe_box partial_box; + uint32_t gpu_lt_stride = stile_w * cpp; + + for (uint32_t y = y1; y < y2; y = align(y + 1, stile_h)) { + partial_box.y = y & (stile_h - 1); + partial_box.height = MIN2(y2 - y, stile_h - partial_box.y); + + uint32_t cpu_offset = 0; + for (uint32_t x = x1; x < x2; x = align(x + 1, stile_w)) { + partial_box.x = x & (stile_w - 1); + partial_box.width = MIN2(x2 - x, + stile_w - partial_box.x); + + /* The dst offset we want is the start of this + * subtile + */ + uint32_t gpu_offset = + t_utile_address((x >> utile_w_shift) & ~0x3, + (y >> utile_h_shift) & ~0x3, + utile_stride); + + if (to_cpu) { + vc4_load_lt_image(cpu + cpu_offset, + cpu_stride, + gpu + gpu_offset, + gpu_lt_stride, + cpp, &partial_box); + } else { + vc4_store_lt_image(gpu + gpu_offset, + gpu_lt_stride, + cpu + cpu_offset, + cpu_stride, + cpp, &partial_box); + } + + cpu_offset += partial_box.width * cpp; } + cpu += cpu_stride * partial_box.height; } } @@ -250,22 +271,19 @@ void *src, uint32_t src_stride, int cpp, const struct pipe_box *box) { - uint32_t utile_w = vc4_utile_width(cpp); - uint32_t utile_h = vc4_utile_height(cpp); - uint32_t utile_stride = dst_stride / cpp / utile_w; - uint32_t xstart = box->x / utile_w; - uint32_t ystart = box->y / utile_h; - - for (uint32_t y = 0; y < box->height / utile_h; y++) { - for (int x = 0; x < box->width / utile_w; x++) { - vc4_store_utile(dst + t_utile_address(xstart + x, - ystart + y, - utile_stride), - src + (y * utile_h * src_stride + - x * utile_w * cpp), - src_stride, cpp); - } - } + vc4_t_image_helper(dst, dst_stride, + src, src_stride, + cpp, box, false); +} + +static void +vc4_load_t_image(void *dst, uint32_t dst_stride, + void *src, uint32_t src_stride, + int cpp, const struct pipe_box *box) +{ + vc4_t_image_helper(src, src_stride, + dst, dst_stride, + cpp, box, true); } /** diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_tiling.h mesa-17.0.7/src/gallium/drivers/vc4/vc4_tiling.h --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_tiling.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_tiling.h 2017-06-01 10:37:10.000000000 +0000 @@ -24,11 +24,43 @@ #ifndef VC4_TILING_H #define VC4_TILING_H -uint32_t vc4_utile_width(int cpp) ATTRIBUTE_CONST; -uint32_t vc4_utile_height(int cpp) ATTRIBUTE_CONST; + +/** Return the width in pixels of a 64-byte microtile. */ +static inline uint32_t +vc4_utile_width(int cpp) +{ + switch (cpp) { + case 1: + case 2: + return 8; + case 4: + return 4; + case 8: + return 2; + default: + fprintf(stderr, "unknown cpp: %d\n", cpp); + abort(); + } +} + +/** Return the height in pixels of a 64-byte microtile. */ +static inline uint32_t +vc4_utile_height(int cpp) +{ + switch (cpp) { + case 1: + return 8; + case 2: + case 4: + case 8: + return 4; + default: + fprintf(stderr, "unknown cpp: %d\n", cpp); + abort(); + } +} + bool vc4_size_is_lt(uint32_t width, uint32_t height, int cpp) ATTRIBUTE_CONST; -void vc4_load_utile(void *dst, void *src, uint32_t dst_stride, uint32_t cpp); -void vc4_store_utile(void *dst, void *src, uint32_t src_stride, uint32_t cpp); void vc4_load_tiled_image(void *dst, uint32_t dst_stride, void *src, uint32_t src_stride, uint8_t tiling_format, int cpp, diff -Nru mesa-12.0.6/src/gallium/drivers/vc4/vc4_uniforms.c mesa-17.0.7/src/gallium/drivers/vc4/vc4_uniforms.c --- mesa-12.0.6/src/gallium/drivers/vc4/vc4_uniforms.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/vc4/vc4_uniforms.c 2017-06-01 10:37:10.000000000 +0000 @@ -28,7 +28,7 @@ #include "vc4_qir.h" static void -write_texture_p0(struct vc4_context *vc4, +write_texture_p0(struct vc4_job *job, struct vc4_cl_out **uniforms, struct vc4_texture_stateobj *texstate, uint32_t unit) @@ -37,11 +37,11 @@ vc4_sampler_view(texstate->textures[unit]); struct vc4_resource *rsc = vc4_resource(sview->base.texture); - cl_reloc(vc4, &vc4->uniforms, uniforms, rsc->bo, sview->texture_p0); + cl_reloc(job, &job->uniforms, uniforms, rsc->bo, sview->texture_p0); } static void -write_texture_p1(struct vc4_context *vc4, +write_texture_p1(struct vc4_job *job, struct vc4_cl_out **uniforms, struct vc4_texture_stateobj *texstate, uint32_t unit) @@ -55,7 +55,7 @@ } static void -write_texture_p2(struct vc4_context *vc4, +write_texture_p2(struct vc4_job *job, struct vc4_cl_out **uniforms, struct vc4_texture_stateobj *texstate, uint32_t data) @@ -72,7 +72,19 @@ } static void -write_texture_msaa_addr(struct vc4_context *vc4, +write_texture_first_level(struct vc4_job *job, + struct vc4_cl_out **uniforms, + struct vc4_texture_stateobj *texstate, + uint32_t data) +{ + uint32_t unit = data & 0xffff; + struct pipe_sampler_view *texture = texstate->textures[unit]; + + cl_aligned_f(uniforms, texture->u.tex.first_level); +} + +static void +write_texture_msaa_addr(struct vc4_job *job, struct vc4_cl_out **uniforms, struct vc4_texture_stateobj *texstate, uint32_t unit) @@ -80,7 +92,7 @@ struct pipe_sampler_view *texture = texstate->textures[unit]; struct vc4_resource *rsc = vc4_resource(texture->texture); - cl_aligned_reloc(vc4, &vc4->uniforms, uniforms, rsc->bo, 0); + cl_aligned_reloc(job, &job->uniforms, uniforms, rsc->bo, 0); } @@ -92,7 +104,7 @@ } static void -write_texture_border_color(struct vc4_context *vc4, +write_texture_border_color(struct vc4_job *job, struct vc4_cl_out **uniforms, struct vc4_texture_stateobj *texstate, uint32_t unit) @@ -182,10 +194,11 @@ return NULL; struct vc4_bo *ubo = vc4_bo_alloc(vc4->screen, shader->ubo_size, "ubo"); - uint32_t *data = vc4_bo_map(ubo); + void *data = vc4_bo_map(ubo); for (uint32_t i = 0; i < shader->num_ubo_ranges; i++) { memcpy(data + shader->ubo_ranges[i].dst_offset, - gallium_uniforms + shader->ubo_ranges[i].src_offset, + ((const void *)gallium_uniforms + + shader->ubo_ranges[i].src_offset), shader->ubo_ranges[i].size); } @@ -198,14 +211,15 @@ struct vc4_texture_stateobj *texstate) { struct vc4_shader_uniform_info *uinfo = &shader->uniforms; + struct vc4_job *job = vc4->job; const uint32_t *gallium_uniforms = cb->cb[0].user_buffer; struct vc4_bo *ubo = vc4_upload_ubo(vc4, shader, gallium_uniforms); - cl_ensure_space(&vc4->uniforms, (uinfo->count + + cl_ensure_space(&job->uniforms, (uinfo->count + uinfo->num_texture_samples) * 4); struct vc4_cl_out *uniforms = - cl_start_shader_reloc(&vc4->uniforms, + cl_start_shader_reloc(&job->uniforms, uinfo->num_texture_samples); for (int i = 0; i < uinfo->count; i++) { @@ -238,31 +252,36 @@ break; case QUNIFORM_TEXTURE_CONFIG_P0: - write_texture_p0(vc4, &uniforms, texstate, + write_texture_p0(job, &uniforms, texstate, uinfo->data[i]); break; case QUNIFORM_TEXTURE_CONFIG_P1: - write_texture_p1(vc4, &uniforms, texstate, + write_texture_p1(job, &uniforms, texstate, uinfo->data[i]); break; case QUNIFORM_TEXTURE_CONFIG_P2: - write_texture_p2(vc4, &uniforms, texstate, + write_texture_p2(job, &uniforms, texstate, uinfo->data[i]); break; + case QUNIFORM_TEXTURE_FIRST_LEVEL: + write_texture_first_level(job, &uniforms, texstate, + uinfo->data[i]); + break; + case QUNIFORM_UBO_ADDR: - cl_aligned_reloc(vc4, &vc4->uniforms, &uniforms, ubo, 0); + cl_aligned_reloc(job, &job->uniforms, &uniforms, ubo, 0); break; case QUNIFORM_TEXTURE_MSAA_ADDR: - write_texture_msaa_addr(vc4, &uniforms, + write_texture_msaa_addr(job, &uniforms, texstate, uinfo->data[i]); break; case QUNIFORM_TEXTURE_BORDER_COLOR: - write_texture_border_color(vc4, &uniforms, + write_texture_border_color(job, &uniforms, texstate, uinfo->data[i]); break; @@ -324,6 +343,11 @@ case QUNIFORM_SAMPLE_MASK: cl_aligned_u32(&uniforms, vc4->sample_mask); break; + + case QUNIFORM_UNIFORMS_ADDRESS: + /* This will be filled in by the kernel. */ + cl_aligned_u32(&uniforms, 0xd0d0d0d0); + break; } #if 0 uint32_t written_val = *((uint32_t *)uniforms - 1); @@ -332,7 +356,7 @@ #endif } - cl_end(&vc4->uniforms, uniforms); + cl_end(&job->uniforms, uniforms); vc4_bo_unreference(&ubo); } @@ -345,6 +369,7 @@ for (int i = 0; i < shader->uniforms.count; i++) { switch (shader->uniforms.contents[i]) { case QUNIFORM_CONSTANT: + case QUNIFORM_UNIFORMS_ADDRESS: break; case QUNIFORM_UNIFORM: case QUNIFORM_UBO_ADDR: @@ -366,10 +391,14 @@ case QUNIFORM_TEXTURE_CONFIG_P1: case QUNIFORM_TEXTURE_CONFIG_P2: case QUNIFORM_TEXTURE_BORDER_COLOR: + case QUNIFORM_TEXTURE_FIRST_LEVEL: case QUNIFORM_TEXTURE_MSAA_ADDR: case QUNIFORM_TEXRECT_SCALE_X: case QUNIFORM_TEXRECT_SCALE_Y: - dirty |= VC4_DIRTY_TEXSTATE; + /* We could flag this on just the stage we're + * compiling for, but it's not passed in. + */ + dirty |= VC4_DIRTY_FRAGTEX | VC4_DIRTY_VERTTEX; break; case QUNIFORM_BLEND_CONST_COLOR_X: diff -Nru mesa-12.0.6/src/gallium/drivers/virgl/Makefile.in mesa-17.0.7/src/gallium/drivers/virgl/Makefile.in --- mesa-12.0.6/src/gallium/drivers/virgl/Makefile.in 2017-01-24 01:41:48.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/virgl/Makefile.in 2017-06-01 10:37:21.000000000 +0000 @@ -111,10 +111,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -216,6 +219,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -230,6 +235,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -259,10 +265,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -312,11 +319,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -356,8 +360,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -394,8 +396,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -404,7 +404,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -412,13 +411,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -447,6 +447,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -575,12 +576,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -592,7 +589,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CPPFLAGS = \ $(GALLIUM_DRIVER_CFLAGS) \ $(LIBDRM_CFLAGS) diff -Nru mesa-12.0.6/src/gallium/drivers/virgl/virgl_buffer.c mesa-17.0.7/src/gallium/drivers/virgl/virgl_buffer.c --- mesa-12.0.6/src/gallium/drivers/virgl/virgl_buffer.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/virgl/virgl_buffer.c 2017-06-01 10:37:10.000000000 +0000 @@ -62,7 +62,7 @@ if (doflushwait) ctx->flush(ctx, NULL, 0); - trans = util_slab_alloc(&vctx->texture_transfer_pool); + trans = slab_alloc(&vctx->texture_transfer_pool); if (!trans) return NULL; @@ -114,7 +114,7 @@ } } - util_slab_free(&vctx->texture_transfer_pool, trans); + slab_free(&vctx->texture_transfer_pool, trans); } static void virgl_buffer_transfer_flush_region(struct pipe_context *ctx, @@ -145,7 +145,6 @@ virgl_buffer_transfer_map, /* transfer_map */ virgl_buffer_transfer_flush_region, /* transfer_flush_region */ virgl_buffer_transfer_unmap, /* transfer_unmap */ - virgl_transfer_inline_write /* transfer_inline_write */ }; struct pipe_resource *virgl_buffer_create(struct virgl_screen *vs, diff -Nru mesa-12.0.6/src/gallium/drivers/virgl/virgl_context.c mesa-17.0.7/src/gallium/drivers/virgl/virgl_context.c --- mesa-12.0.6/src/gallium/drivers/virgl/virgl_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/virgl/virgl_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -32,7 +32,7 @@ #include "util/u_format.h" #include "util/u_transfer.h" #include "util/u_helpers.h" -#include "util/u_slab.h" +#include "util/slab.h" #include "util/u_upload_mgr.h" #include "util/u_blitter.h" #include "tgsi/tgsi_text.h" @@ -426,7 +426,7 @@ static void virgl_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index, - struct pipe_constant_buffer *buf) + const struct pipe_constant_buffer *buf) { struct virgl_context *vctx = virgl_context(ctx); @@ -690,7 +690,7 @@ } static void virgl_set_sampler_views(struct pipe_context *ctx, - unsigned shader_type, + enum pipe_shader_type shader_type, unsigned start_slot, unsigned num_views, struct pipe_sampler_view **views) @@ -765,7 +765,8 @@ } static void virgl_bind_sampler_states(struct pipe_context *ctx, - unsigned shader, unsigned start_slot, + enum pipe_shader_type shader, + unsigned start_slot, unsigned num_samplers, void **samplers) { @@ -861,7 +862,7 @@ u_upload_destroy(vctx->uploader); util_primconvert_destroy(vctx->primconvert); - util_slab_destroy(&vctx->texture_transfer_pool); + slab_destroy_child(&vctx->texture_transfer_pool); FREE(vctx); } @@ -900,7 +901,6 @@ vctx->base.set_vertex_buffers = virgl_set_vertex_buffers; vctx->base.set_index_buffer = virgl_set_index_buffer; vctx->base.set_constant_buffer = virgl_set_constant_buffer; - vctx->base.transfer_inline_write = virgl_transfer_inline_write; vctx->base.create_vs_state = virgl_create_vs_state; vctx->base.create_gs_state = virgl_create_gs_state; @@ -943,8 +943,7 @@ virgl_init_so_functions(vctx); list_inithead(&vctx->to_flush_bufs); - util_slab_create(&vctx->texture_transfer_pool, sizeof(struct virgl_transfer), - 16, UTIL_SLAB_SINGLETHREADED); + slab_create_child(&vctx->texture_transfer_pool, &rs->texture_transfer_pool); vctx->primconvert = util_primconvert_create(&vctx->base, rs->caps.caps.v1.prim_mask); vctx->uploader = u_upload_create(&vctx->base, 1024 * 1024, diff -Nru mesa-12.0.6/src/gallium/drivers/virgl/virgl_context.h mesa-17.0.7/src/gallium/drivers/virgl/virgl_context.h --- mesa-12.0.6/src/gallium/drivers/virgl/virgl_context.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/virgl/virgl_context.h 2017-06-01 10:37:10.000000000 +0000 @@ -25,7 +25,7 @@ #include "pipe/p_state.h" #include "pipe/p_context.h" -#include "util/u_slab.h" +#include "util/slab.h" #include "util/list.h" struct pipe_screen; @@ -56,7 +56,7 @@ struct pipe_framebuffer_state framebuffer; - struct util_slab_mempool texture_transfer_pool; + struct slab_child_pool texture_transfer_pool; struct pipe_index_buffer index_buffer; struct u_upload_mgr *uploader; diff -Nru mesa-12.0.6/src/gallium/drivers/virgl/virgl_encode.c mesa-17.0.7/src/gallium/drivers/virgl/virgl_encode.c --- mesa-12.0.6/src/gallium/drivers/virgl/virgl_encode.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/virgl/virgl_encode.c 2017-06-01 10:37:10.000000000 +0000 @@ -21,7 +21,10 @@ * USE OR OTHER DEALINGS IN THE SOFTWARE. */ #include +#include +#include +#include "util/u_format.h" #include "util/u_memory.h" #include "util/u_math.h" #include "pipe/p_state.h" @@ -314,12 +317,16 @@ double depth, unsigned stencil) { int i; + uint64_t qword; + + STATIC_ASSERT(sizeof(qword) == sizeof(depth)); + memcpy(&qword, &depth, sizeof(qword)); virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_CLEAR, 0, VIRGL_OBJ_CLEAR_SIZE)); virgl_encoder_write_dword(ctx->cbuf, buffers); for (i = 0; i < 4; i++) virgl_encoder_write_dword(ctx->cbuf, color->ui[i]); - virgl_encoder_write_qword(ctx->cbuf, *(uint64_t *)&depth); + virgl_encoder_write_qword(ctx->cbuf, qword); virgl_encoder_write_dword(ctx->cbuf, stencil); return 0; } @@ -562,14 +569,16 @@ struct virgl_resource *res, const struct pipe_sampler_view *state) { + unsigned elem_size = util_format_get_blocksize(state->format); + uint32_t tmp; virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_CREATE_OBJECT, VIRGL_OBJECT_SAMPLER_VIEW, VIRGL_OBJ_SAMPLER_VIEW_SIZE)); virgl_encoder_write_dword(ctx->cbuf, handle); virgl_encoder_write_res(ctx, res); virgl_encoder_write_dword(ctx->cbuf, state->format); if (res->u.b.target == PIPE_BUFFER) { - virgl_encoder_write_dword(ctx->cbuf, state->u.buf.first_element); - virgl_encoder_write_dword(ctx->cbuf, state->u.buf.last_element); + virgl_encoder_write_dword(ctx->cbuf, state->u.buf.offset / elem_size); + virgl_encoder_write_dword(ctx->cbuf, (state->u.buf.offset + state->u.buf.size) / elem_size - 1); } else { virgl_encoder_write_dword(ctx->cbuf, state->u.tex.first_layer | state->u.tex.last_layer << 16); virgl_encoder_write_dword(ctx->cbuf, state->u.tex.first_level | state->u.tex.last_level << 8); diff -Nru mesa-12.0.6/src/gallium/drivers/virgl/virgl_resource.c mesa-17.0.7/src/gallium/drivers/virgl/virgl_resource.c --- mesa-12.0.6/src/gallium/drivers/virgl/virgl_resource.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/virgl/virgl_resource.c 2017-06-01 10:37:10.000000000 +0000 @@ -82,10 +82,27 @@ screen->resource_destroy = u_resource_destroy_vtbl; } +static void virgl_buffer_subdata(struct pipe_context *pipe, + struct pipe_resource *resource, + unsigned usage, unsigned offset, + unsigned size, const void *data) +{ + struct pipe_box box; + + if (offset == 0 && size == resource->width0) + usage |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE; + else + usage |= PIPE_TRANSFER_DISCARD_RANGE; + + u_box_1d(offset, size, &box); + virgl_transfer_inline_write(pipe, resource, 0, usage, &box, data, 0, 0); +} + void virgl_init_context_resource_functions(struct pipe_context *ctx) { ctx->transfer_map = u_transfer_map_vtbl; ctx->transfer_flush_region = u_transfer_flush_region_vtbl; ctx->transfer_unmap = u_transfer_unmap_vtbl; - ctx->transfer_inline_write = u_transfer_inline_write_vtbl; + ctx->buffer_subdata = virgl_buffer_subdata; + ctx->texture_subdata = u_default_texture_subdata; } diff -Nru mesa-12.0.6/src/gallium/drivers/virgl/virgl_screen.c mesa-17.0.7/src/gallium/drivers/virgl/virgl_screen.c --- mesa-12.0.6/src/gallium/drivers/virgl/virgl_screen.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/virgl/virgl_screen.c 2017-06-01 10:37:10.000000000 +0000 @@ -148,6 +148,7 @@ case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: return 16; case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME: + case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS: return vscreen->caps.caps.v1.bset.streamout_pause_resume; case PIPE_CAP_START_INSTANCE: return vscreen->caps.caps.v1.bset.start_instance; @@ -184,6 +185,7 @@ case PIPE_CAP_ENDIANNESS: return 0; case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES: + case PIPE_CAP_MIXED_COLOR_DEPTH_BITS: return 1; case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT: return 0; @@ -243,6 +245,14 @@ case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR: case PIPE_CAP_CULL_DISTANCE: case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES: + case PIPE_CAP_TGSI_VOTE: + case PIPE_CAP_MAX_WINDOW_RECTANGLES: + case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED: + case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS: + case PIPE_CAP_TGSI_ARRAY_COMPONENTS: + case PIPE_CAP_TGSI_CAN_READ_OUTPUTS: + case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY: + case PIPE_CAP_TGSI_FS_FBFETCH: return 0; case PIPE_CAP_VENDOR_ID: return 0x1af4; @@ -253,6 +263,8 @@ case PIPE_CAP_UMA: case PIPE_CAP_VIDEO_MEMORY: return 0; + case PIPE_CAP_NATIVE_FENCE_FD: + return 0; } /* should only get here on unhandled cases */ debug_printf("Unexpected PIPE_CAP %d query\n", param); @@ -305,6 +317,7 @@ return 32; case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE: return 4096 * sizeof(float[4]); + case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: default: return 0; } @@ -520,6 +533,7 @@ } static boolean virgl_fence_finish(struct pipe_screen *screen, + struct pipe_context *ctx, struct pipe_fence_handle *fence, uint64_t timeout) { @@ -541,6 +555,8 @@ struct virgl_screen *vscreen = virgl_screen(screen); struct virgl_winsys *vws = vscreen->vws; + slab_destroy_parent(&vscreen->texture_transfer_pool); + if (vws) vws->destroy(vws); FREE(vscreen); @@ -575,6 +591,8 @@ screen->refcnt = 1; + slab_create_parent(&screen->texture_transfer_pool, sizeof(struct virgl_transfer), 16); + util_format_s3tc_init(); return &screen->base; } diff -Nru mesa-12.0.6/src/gallium/drivers/virgl/virgl_screen.h mesa-17.0.7/src/gallium/drivers/virgl/virgl_screen.h --- mesa-12.0.6/src/gallium/drivers/virgl/virgl_screen.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/virgl/virgl_screen.h 2017-06-01 10:37:10.000000000 +0000 @@ -24,6 +24,7 @@ #define VIRGL_H #include "pipe/p_screen.h" +#include "util/slab.h" #include "virgl_winsys.h" struct virgl_screen { @@ -38,6 +39,8 @@ struct virgl_drm_caps caps; + struct slab_parent_pool texture_transfer_pool; + uint32_t sub_ctx_id; }; diff -Nru mesa-12.0.6/src/gallium/drivers/virgl/virgl_texture.c mesa-17.0.7/src/gallium/drivers/virgl/virgl_texture.c --- mesa-12.0.6/src/gallium/drivers/virgl/virgl_texture.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/drivers/virgl/virgl_texture.c 2017-06-01 10:37:10.000000000 +0000 @@ -145,7 +145,7 @@ if (doflushwait) ctx->flush(ctx, NULL, 0); - trans = util_slab_alloc(&vctx->texture_transfer_pool); + trans = slab_alloc(&vctx->texture_transfer_pool); if (!trans) return NULL; @@ -235,7 +235,7 @@ if (trans->resolve_tmp) pipe_resource_reference((struct pipe_resource **)&trans->resolve_tmp, NULL); - util_slab_free(&vctx->texture_transfer_pool, trans); + slab_free(&vctx->texture_transfer_pool, trans); } @@ -304,7 +304,6 @@ virgl_texture_transfer_map, /* transfer_map */ NULL, /* transfer_flush_region */ virgl_texture_transfer_unmap, /* transfer_unmap */ - u_default_transfer_inline_write /* transfer_inline_write */ }; struct pipe_resource * diff -Nru mesa-12.0.6/src/gallium/include/pipe/p_config.h mesa-17.0.7/src/gallium/include/pipe/p_config.h --- mesa-12.0.6/src/gallium/include/pipe/p_config.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/include/pipe/p_config.h 2017-06-01 10:37:10.000000000 +0000 @@ -53,7 +53,6 @@ #if defined(__GNUC__) #define PIPE_CC_GCC -#define PIPE_CC_GCC_VERSION (__GNUC__ * 100 + __GNUC_MINOR__) #endif /* @@ -126,44 +125,8 @@ * Endian detection. */ -#ifdef __GLIBC__ -#include - -#if __BYTE_ORDER == __LITTLE_ENDIAN -# define PIPE_ARCH_LITTLE_ENDIAN -#elif __BYTE_ORDER == __BIG_ENDIAN -# define PIPE_ARCH_BIG_ENDIAN -#endif - -#elif defined(__APPLE__) -#include - -#if __DARWIN_BYTE_ORDER == __DARWIN_LITTLE_ENDIAN -# define PIPE_ARCH_LITTLE_ENDIAN -#elif __DARWIN_BYTE_ORDER == __DARWIN_BIG_ENDIAN -# define PIPE_ARCH_BIG_ENDIAN -#endif - -#elif defined(__sun) -#include - -#if defined(_LITTLE_ENDIAN) -# define PIPE_ARCH_LITTLE_ENDIAN -#elif defined(_BIG_ENDIAN) -# define PIPE_ARCH_BIG_ENDIAN -#endif - -#elif defined(__OpenBSD__) || defined(__NetBSD__) -#include -#include - -#if _BYTE_ORDER == _LITTLE_ENDIAN -# define PIPE_ARCH_LITTLE_ENDIAN -#elif _BYTE_ORDER == _BIG_ENDIAN -# define PIPE_ARCH_BIG_ENDIAN -#endif - -#else +#include "util/u_endian.h" +#if !defined(PIPE_ARCH_LITTLE_ENDIAN) && !defined(PIPE_ARCH_BIG_ENDIAN) #if defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64) || defined(PIPE_ARCH_ARM) || defined(PIPE_ARCH_AARCH64) #define PIPE_ARCH_LITTLE_ENDIAN diff -Nru mesa-12.0.6/src/gallium/include/pipe/p_context.h mesa-17.0.7/src/gallium/include/pipe/p_context.h --- mesa-12.0.6/src/gallium/include/pipe/p_context.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/include/pipe/p_context.h 2017-06-01 10:37:10.000000000 +0000 @@ -47,6 +47,7 @@ struct pipe_constant_buffer; struct pipe_debug_callback; struct pipe_depth_stencil_alpha_state; +struct pipe_device_reset_callback; struct pipe_draw_info; struct pipe_grid_info; struct pipe_fence_handle; @@ -193,8 +194,9 @@ void * (*create_sampler_state)(struct pipe_context *, const struct pipe_sampler_state *); void (*bind_sampler_states)(struct pipe_context *, - unsigned shader, unsigned start_slot, - unsigned num_samplers, void **samplers); + enum pipe_shader_type shader, + unsigned start_slot, unsigned num_samplers, + void **samplers); void (*delete_sampler_state)(struct pipe_context *, void *); void * (*create_rasterizer_state)(struct pipe_context *, @@ -261,7 +263,7 @@ void (*set_constant_buffer)( struct pipe_context *, uint shader, uint index, - struct pipe_constant_buffer *buf ); + const struct pipe_constant_buffer *buf ); void (*set_framebuffer_state)( struct pipe_context *, const struct pipe_framebuffer_state * ); @@ -274,12 +276,18 @@ unsigned num_scissors, const struct pipe_scissor_state * ); + void (*set_window_rectangles)( struct pipe_context *, + boolean include, + unsigned num_rectangles, + const struct pipe_scissor_state * ); + void (*set_viewport_states)( struct pipe_context *, unsigned start_slot, unsigned num_viewports, const struct pipe_viewport_state *); - void (*set_sampler_views)(struct pipe_context *, unsigned shader, + void (*set_sampler_views)(struct pipe_context *, + enum pipe_shader_type shader, unsigned start_slot, unsigned num_views, struct pipe_sampler_view **); @@ -307,9 +315,10 @@ * unless it's NULL, in which case no buffers will * be bound. */ - void (*set_shader_buffers)(struct pipe_context *, unsigned shader, + void (*set_shader_buffers)(struct pipe_context *, + enum pipe_shader_type shader, unsigned start_slot, unsigned count, - struct pipe_shader_buffer *buffers); + const struct pipe_shader_buffer *buffers); /** * Bind an array of images that will be used by a shader. @@ -324,9 +333,10 @@ * unless it's NULL, in which case no images will * be bound. */ - void (*set_shader_images)(struct pipe_context *, unsigned shader, + void (*set_shader_images)(struct pipe_context *, + enum pipe_shader_type shader, unsigned start_slot, unsigned count, - struct pipe_image_view *images); + const struct pipe_image_view *images); void (*set_vertex_buffers)( struct pipe_context *, unsigned start_slot, @@ -411,7 +421,8 @@ struct pipe_surface *dst, const union pipe_color_union *color, unsigned dstx, unsigned dsty, - unsigned width, unsigned height); + unsigned width, unsigned height, + bool render_condition_enabled); /** * Clear a depth-stencil surface. @@ -425,7 +436,8 @@ double depth, unsigned stencil, unsigned dstx, unsigned dsty, - unsigned width, unsigned height); + unsigned width, unsigned height, + bool render_condition_enabled); /** * Clear the texture with the specified texel. Not guaranteed to be a @@ -463,6 +475,25 @@ unsigned flags); /** + * Create a fence from a native sync fd. + * + * This is used for importing a foreign/external fence fd. + * + * \param fence if not NULL, an old fence to unref and transfer a + * new fence reference to + * \param fd native fence fd + */ + void (*create_fence_fd)(struct pipe_context *pipe, + struct pipe_fence_handle **fence, + int fd); + + /** + * Insert commands to have GPU wait for fence to be signaled. + */ + void (*fence_server_sync)(struct pipe_context *pipe, + struct pipe_fence_handle *fence); + + /** * Create a view on a texture to be used by a shader stage. */ struct pipe_sampler_view * (*create_sampler_view)(struct pipe_context *ctx, @@ -514,21 +545,28 @@ struct pipe_transfer *transfer); /* One-shot transfer operation with data supplied in a user - * pointer. XXX: strides?? + * pointer. */ - void (*transfer_inline_write)( struct pipe_context *, - struct pipe_resource *, - unsigned level, - unsigned usage, /* a combination of PIPE_TRANSFER_x */ - const struct pipe_box *, - const void *data, - unsigned stride, - unsigned layer_stride); + void (*buffer_subdata)(struct pipe_context *, + struct pipe_resource *, + unsigned usage, /* a combination of PIPE_TRANSFER_x */ + unsigned offset, + unsigned size, + const void *data); + + void (*texture_subdata)(struct pipe_context *, + struct pipe_resource *, + unsigned level, + unsigned usage, /* a combination of PIPE_TRANSFER_x */ + const struct pipe_box *, + const void *data, + unsigned stride, + unsigned layer_stride); /** * Flush any pending framebuffer writes and invalidate texture caches. */ - void (*texture_barrier)(struct pipe_context *); + void (*texture_barrier)(struct pipe_context *, unsigned flags); /** * Flush caches according to flags. @@ -673,12 +711,19 @@ enum pipe_reset_status (*get_device_reset_status)(struct pipe_context *ctx); /** + * Sets the reset status callback. If the pointer is null, then no callback + * is set, otherwise a copy of the data should be made. + */ + void (*set_device_reset_callback)(struct pipe_context *ctx, + const struct pipe_device_reset_callback *cb); + + /** * Dump driver-specific debug information into a stream. This is * used by debugging tools. * * \param ctx pipe context * \param stream where the output should be written to - * \param flags a mask of PIPE_DEBUG_* flags + * \param flags a mask of PIPE_DUMP_* flags */ void (*dump_debug_state)(struct pipe_context *ctx, FILE *stream, unsigned flags); diff -Nru mesa-12.0.6/src/gallium/include/pipe/p_defines.h mesa-17.0.7/src/gallium/include/pipe/p_defines.h --- mesa-12.0.6/src/gallium/include/pipe/p_defines.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/include/pipe/p_defines.h 2017-06-01 10:37:10.000000000 +0000 @@ -278,7 +278,7 @@ * * See also: * - Direct3D's D3DLOCK_DONOTWAIT flag. - * - Mesa3D's MESA_MAP_NOWAIT_BIT flag. + * - Mesa's MESA_MAP_NOWAIT_BIT flag. * - WDDM's D3DDDICB_LOCKFLAGS.DonotWait flag. */ PIPE_TRANSFER_DONTBLOCK = (1 << 9), @@ -348,13 +348,18 @@ */ enum pipe_flush_flags { - PIPE_FLUSH_END_OF_FRAME = (1 << 0) + PIPE_FLUSH_END_OF_FRAME = (1 << 0), + PIPE_FLUSH_DEFERRED = (1 << 1), + PIPE_FLUSH_FENCE_FD = (1 << 2), }; /** * Flags for pipe_context::dump_debug_state. */ -#define PIPE_DEBUG_DEVICE_IS_HUNG (1 << 0) +#define PIPE_DUMP_DEVICE_STATUS_REGISTERS (1 << 0) +#define PIPE_DUMP_CURRENT_STATES (1 << 1) +#define PIPE_DUMP_CURRENT_SHADERS (1 << 2) +#define PIPE_DUMP_LAST_COMMAND_BUFFER (1 << 3) /** * Create a compute-only context. Use in pipe_screen::context_create. @@ -392,6 +397,13 @@ #define PIPE_BARRIER_FRAMEBUFFER (1 << 9) #define PIPE_BARRIER_STREAMOUT_BUFFER (1 << 10) #define PIPE_BARRIER_GLOBAL_BUFFER (1 << 11) +#define PIPE_BARRIER_ALL ((1 << 12) - 1) + +/** + * Flags for pipe_context::texture_barrier. + */ +#define PIPE_TEXTURE_BARRIER_SAMPLER (1 << 0) +#define PIPE_TEXTURE_BARRIER_FRAMEBUFFER (1 << 1) /** * Resource binding flags -- state tracker must specify in advance all @@ -405,8 +417,7 @@ #define PIPE_BIND_INDEX_BUFFER (1 << 5) /* draw_elements */ #define PIPE_BIND_CONSTANT_BUFFER (1 << 6) /* set_constant_buffer */ #define PIPE_BIND_DISPLAY_TARGET (1 << 7) /* flush_front_buffer */ -#define PIPE_BIND_TRANSFER_WRITE (1 << 8) /* transfer_map */ -#define PIPE_BIND_TRANSFER_READ (1 << 9) /* transfer_map */ +/* gap */ #define PIPE_BIND_STREAM_OUTPUT (1 << 10) /* set_stream_output_buffers */ #define PIPE_BIND_CURSOR (1 << 11) /* mouse cursor */ #define PIPE_BIND_CUSTOM (1 << 12) /* state-tracker/winsys usages */ @@ -446,6 +457,7 @@ */ #define PIPE_RESOURCE_FLAG_MAP_PERSISTENT (1 << 0) #define PIPE_RESOURCE_FLAG_MAP_COHERENT (1 << 1) +#define PIPE_RESOURCE_FLAG_TEXTURING_MORE_LIKELY (1 << 2) #define PIPE_RESOURCE_FLAG_DRV_PRIV (1 << 16) /* driver/winsys private */ #define PIPE_RESOURCE_FLAG_ST_PRIV (1 << 24) /* state-tracker/winsys private */ @@ -728,6 +740,17 @@ PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR, PIPE_CAP_CULL_DISTANCE, PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES, + PIPE_CAP_TGSI_VOTE, + PIPE_CAP_MAX_WINDOW_RECTANGLES, + PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED, + PIPE_CAP_VIEWPORT_SUBPIXEL_BITS, + PIPE_CAP_MIXED_COLOR_DEPTH_BITS, + PIPE_CAP_TGSI_ARRAY_COMPONENTS, + PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS, + PIPE_CAP_TGSI_CAN_READ_OUTPUTS, + PIPE_CAP_NATIVE_FENCE_FD, + PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY, + PIPE_CAP_TGSI_FS_FBFETCH, }; #define PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_NV50 (1 << 0) @@ -797,6 +820,7 @@ PIPE_SHADER_CAP_MAX_SHADER_BUFFERS, PIPE_SHADER_CAP_SUPPORTED_IRS, PIPE_SHADER_CAP_MAX_SHADER_IMAGES, + PIPE_SHADER_CAP_LOWER_IF_THRESHOLD, }; /** @@ -824,6 +848,7 @@ */ enum pipe_compute_cap { + PIPE_COMPUTE_CAP_ADDRESS_BITS, PIPE_COMPUTE_CAP_IR_TARGET, PIPE_COMPUTE_CAP_GRID_DIMENSION, PIPE_COMPUTE_CAP_MAX_GRID_SIZE, @@ -837,7 +862,8 @@ PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY, PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS, PIPE_COMPUTE_CAP_IMAGES_SUPPORTED, - PIPE_COMPUTE_CAP_SUBGROUP_SIZE + PIPE_COMPUTE_CAP_SUBGROUP_SIZE, + PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK, }; /** @@ -955,6 +981,11 @@ PIPE_DRIVER_QUERY_TYPE_BYTES, PIPE_DRIVER_QUERY_TYPE_MICROSECONDS, PIPE_DRIVER_QUERY_TYPE_HZ, + PIPE_DRIVER_QUERY_TYPE_DBM, + PIPE_DRIVER_QUERY_TYPE_TEMPERATURE, + PIPE_DRIVER_QUERY_TYPE_VOLTS, + PIPE_DRIVER_QUERY_TYPE_AMPS, + PIPE_DRIVER_QUERY_TYPE_WATTS, }; /* Whether an average value per frame or a cumulative value should be diff -Nru mesa-12.0.6/src/gallium/include/pipe/p_screen.h mesa-17.0.7/src/gallium/include/pipe/p_screen.h --- mesa-12.0.6/src/gallium/include/pipe/p_screen.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/include/pipe/p_screen.h 2017-06-01 10:37:10.000000000 +0000 @@ -206,6 +206,12 @@ * that the texture is created with a special usage flag like * DISPLAYTARGET or PRIMARY. * + * The context parameter can optionally be used to flush the resource and + * the context to make sure the resource is coherent with whatever user + * will use it. Some drivers may also use the context to convert + * the resource into a format compatible for sharing. The use case is + * OpenGL-OpenCL interop. The context parameter is allowed to be NULL. + * * NOTE: in the case of DRM_API_HANDLE_TYPE_FD handles, the caller * takes ownership of the FD. (This is consistent with * EGL_MESA_image_dma_buf_export) @@ -213,6 +219,7 @@ * \param usage A combination of PIPE_HANDLE_USAGE_* flags. */ boolean (*resource_get_handle)(struct pipe_screen *, + struct pipe_context *context, struct pipe_resource *tex, struct winsys_handle *handle, unsigned usage); @@ -242,11 +249,30 @@ /** * Wait for the fence to finish. + * + * If the fence was created with PIPE_FLUSH_DEFERRED, and the context is + * still unflushed, and the ctx parameter of fence_finish is equal to + * the context where the fence was created, fence_finish will flush + * the context prior to waiting for the fence. + * + * In all other cases, the ctx parameter has no effect. + * * \param timeout in nanoseconds (may be PIPE_TIMEOUT_INFINITE). */ - boolean (*fence_finish)( struct pipe_screen *screen, - struct pipe_fence_handle *fence, - uint64_t timeout ); + boolean (*fence_finish)(struct pipe_screen *screen, + struct pipe_context *ctx, + struct pipe_fence_handle *fence, + uint64_t timeout); + + /** + * For fences created with PIPE_FLUSH_FENCE_FD (exported fd) or + * by create_fence_fd() (imported fd), return the native fence fd + * associated with the fence. This may return -1 for fences + * created with PIPE_FLUSH_DEFERRED if the fence command has not + * been flushed yet. + */ + int (*fence_get_fd)(struct pipe_screen *screen, + struct pipe_fence_handle *fence); /** * Returns a driver-specific query. diff -Nru mesa-12.0.6/src/gallium/include/pipe/p_shader_tokens.h mesa-17.0.7/src/gallium/include/pipe/p_shader_tokens.h --- mesa-12.0.6/src/gallium/include/pipe/p_shader_tokens.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/include/pipe/p_shader_tokens.h 2017-06-01 10:37:10.000000000 +0000 @@ -199,6 +199,7 @@ TGSI_SEMANTIC_HELPER_INVOCATION, /**< current invocation is helper */ TGSI_SEMANTIC_BASEINSTANCE, TGSI_SEMANTIC_DRAWID, + TGSI_SEMANTIC_WORK_DIM, /**< opencl get_work_dim value */ TGSI_SEMANTIC_COUNT, /**< number of semantic values */ }; @@ -206,7 +207,10 @@ { unsigned Name : 8; /**< one of TGSI_SEMANTIC_x */ unsigned Index : 16; /**< UINT */ - unsigned Padding : 8; + unsigned StreamX : 2; /**< vertex stream (for GS output) */ + unsigned StreamY : 2; + unsigned StreamZ : 2; + unsigned StreamW : 2; }; struct tgsi_declaration_image { @@ -244,6 +248,8 @@ TGSI_IMM_UINT32, TGSI_IMM_INT32, TGSI_IMM_FLOAT64, + TGSI_IMM_UINT64, + TGSI_IMM_INT64, }; struct tgsi_immediate @@ -339,12 +345,13 @@ #define TGSI_OPCODE_SLT 14 #define TGSI_OPCODE_SGE 15 #define TGSI_OPCODE_MAD 16 -#define TGSI_OPCODE_SUB 17 +/* gap */ #define TGSI_OPCODE_LRP 18 #define TGSI_OPCODE_FMA 19 #define TGSI_OPCODE_SQRT 20 #define TGSI_OPCODE_DP2A 21 - /* gap */ +#define TGSI_OPCODE_F2U64 22 +#define TGSI_OPCODE_F2I64 23 #define TGSI_OPCODE_FRC 24 #define TGSI_OPCODE_CLAMP 25 #define TGSI_OPCODE_FLR 26 @@ -353,9 +360,9 @@ #define TGSI_OPCODE_LG2 29 #define TGSI_OPCODE_POW 30 #define TGSI_OPCODE_XPD 31 - /* gap */ -#define TGSI_OPCODE_ABS 33 - /* gap */ +#define TGSI_OPCODE_U2I64 32 +/* gap */ +#define TGSI_OPCODE_I2I64 34 #define TGSI_OPCODE_DPH 35 #define TGSI_OPCODE_COS 36 #define TGSI_OPCODE_DDX 37 @@ -365,14 +372,14 @@ #define TGSI_OPCODE_PK2US 41 #define TGSI_OPCODE_PK4B 42 #define TGSI_OPCODE_PK4UB 43 - /* gap */ +#define TGSI_OPCODE_D2U64 44 #define TGSI_OPCODE_SEQ 45 - /* gap */ +#define TGSI_OPCODE_D2I64 46 #define TGSI_OPCODE_SGT 47 #define TGSI_OPCODE_SIN 48 #define TGSI_OPCODE_SLE 49 #define TGSI_OPCODE_SNE 50 - /* gap */ +#define TGSI_OPCODE_U642D 51 #define TGSI_OPCODE_TEX 52 #define TGSI_OPCODE_TXD 53 #define TGSI_OPCODE_TXP 54 @@ -380,22 +387,24 @@ #define TGSI_OPCODE_UP2US 56 #define TGSI_OPCODE_UP4B 57 #define TGSI_OPCODE_UP4UB 58 - /* gap */ +#define TGSI_OPCODE_U642F 59 +#define TGSI_OPCODE_I642F 60 #define TGSI_OPCODE_ARR 61 - /* gap */ +#define TGSI_OPCODE_I642D 62 #define TGSI_OPCODE_CAL 63 #define TGSI_OPCODE_RET 64 #define TGSI_OPCODE_SSG 65 /* SGN */ #define TGSI_OPCODE_CMP 66 #define TGSI_OPCODE_SCS 67 #define TGSI_OPCODE_TXB 68 - /* gap */ +#define TGSI_OPCODE_FBFETCH 69 #define TGSI_OPCODE_DIV 70 #define TGSI_OPCODE_DP2 71 #define TGSI_OPCODE_TXL 72 #define TGSI_OPCODE_BRK 73 #define TGSI_OPCODE_IF 74 #define TGSI_OPCODE_UIF 75 + /* gap */ #define TGSI_OPCODE_ELSE 77 #define TGSI_OPCODE_ENDIF 78 @@ -561,7 +570,41 @@ #define TGSI_OPCODE_DFLR 220 /* nvc0 */ #define TGSI_OPCODE_DROUND 221 /* nvc0 */ #define TGSI_OPCODE_DSSG 222 -#define TGSI_OPCODE_LAST 223 + +#define TGSI_OPCODE_VOTE_ANY 223 +#define TGSI_OPCODE_VOTE_ALL 224 +#define TGSI_OPCODE_VOTE_EQ 225 + +#define TGSI_OPCODE_U64SEQ 226 +#define TGSI_OPCODE_U64SNE 227 +#define TGSI_OPCODE_I64SLT 228 +#define TGSI_OPCODE_U64SLT 229 +#define TGSI_OPCODE_I64SGE 230 +#define TGSI_OPCODE_U64SGE 231 + +#define TGSI_OPCODE_I64MIN 232 +#define TGSI_OPCODE_U64MIN 233 +#define TGSI_OPCODE_I64MAX 234 +#define TGSI_OPCODE_U64MAX 235 + +#define TGSI_OPCODE_I64ABS 236 +#define TGSI_OPCODE_I64SSG 237 +#define TGSI_OPCODE_I64NEG 238 + +#define TGSI_OPCODE_U64ADD 239 +#define TGSI_OPCODE_U64MUL 240 +#define TGSI_OPCODE_U64SHL 241 +#define TGSI_OPCODE_I64SHR 242 +#define TGSI_OPCODE_U64SHR 243 + +#define TGSI_OPCODE_I64DIV 244 +#define TGSI_OPCODE_U64DIV 245 +#define TGSI_OPCODE_I64MOD 246 +#define TGSI_OPCODE_U64MOD 247 + +#define TGSI_OPCODE_DDIV 248 + +#define TGSI_OPCODE_LAST 249 /** * Opcode is the operation code to execute. A given operation defines the diff -Nru mesa-12.0.6/src/gallium/include/pipe/p_state.h mesa-17.0.7/src/gallium/include/pipe/p_state.h --- mesa-12.0.6/src/gallium/include/pipe/p_state.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/include/pipe/p_state.h 2017-06-01 10:37:10.000000000 +0000 @@ -69,6 +69,7 @@ #define PIPE_MAX_VIEWPORTS 16 #define PIPE_MAX_CLIP_OR_CULL_DISTANCE_COUNT 8 #define PIPE_MAX_CLIP_OR_CULL_DISTANCE_ELEMENT_COUNT 2 +#define PIPE_MAX_WINDOW_RECTANGLES 8 struct pipe_reference @@ -139,6 +140,13 @@ unsigned clip_halfz:1; /** + * When true do not scale offset_units and use same rules for unorm and + * float depth buffers (D3D9). When false use GL/D3D1X behaviour. + * This depends on PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED. + */ + unsigned offset_units_unscaled:1; + + /** * Enable bits for clipping half-spaces. * This applies to both user clip planes and shader clip distances. * Note that if the bound shader exports any clip distances, these @@ -187,6 +195,18 @@ float ucp[PIPE_MAX_CLIP_PLANES][4]; }; +/** + * A single output for vertex transform feedback. + */ +struct pipe_stream_output +{ + unsigned register_index:8; /**< 0 to PIPE_MAX_SHADER_OUTPUTS */ + unsigned start_component:2; /** 0 to 3 */ + unsigned num_components:3; /** 1 to 4 */ + unsigned output_buffer:3; /**< 0 to PIPE_MAX_SO_BUFFERS */ + unsigned dst_offset:16; /**< offset into the buffer in dwords */ + unsigned stream:2; /**< 0 to 3 */ +}; /** * Stream output for vertex transform feedback. @@ -201,14 +221,7 @@ * Array of stream outputs, in the order they are to be written in. * Selected components are tightly packed into the output buffer. */ - struct { - unsigned register_index:8; /**< 0 to PIPE_MAX_SHADER_OUTPUTS */ - unsigned start_component:2; /** 0 to 3 */ - unsigned num_components:3; /** 1 to 4 */ - unsigned output_buffer:3; /**< 0 to PIPE_MAX_SO_BUFFERS */ - unsigned dst_offset:16; /**< offset into the buffer in dwords */ - unsigned stream:2; /**< 0 to 3 */ - } output[PIPE_MAX_SO_OUTPUTS]; + struct pipe_stream_output output[PIPE_MAX_SO_OUTPUTS]; }; /** @@ -356,19 +369,30 @@ unsigned wrap_s:3; /**< PIPE_TEX_WRAP_x */ unsigned wrap_t:3; /**< PIPE_TEX_WRAP_x */ unsigned wrap_r:3; /**< PIPE_TEX_WRAP_x */ - unsigned min_img_filter:2; /**< PIPE_TEX_FILTER_x */ + unsigned min_img_filter:1; /**< PIPE_TEX_FILTER_x */ unsigned min_mip_filter:2; /**< PIPE_TEX_MIPFILTER_x */ - unsigned mag_img_filter:2; /**< PIPE_TEX_FILTER_x */ + unsigned mag_img_filter:1; /**< PIPE_TEX_FILTER_x */ unsigned compare_mode:1; /**< PIPE_TEX_COMPARE_x */ unsigned compare_func:3; /**< PIPE_FUNC_x */ unsigned normalized_coords:1; /**< Are coords normalized to [0,1]? */ - unsigned max_anisotropy:6; + unsigned max_anisotropy:5; unsigned seamless_cube_map:1; float lod_bias; /**< LOD/lambda bias */ float min_lod, max_lod; /**< LOD clamp range, after bias */ union pipe_color_union border_color; }; +union pipe_surface_desc { + struct { + unsigned level; + unsigned first_layer:16; + unsigned last_layer:16; + } tex; + struct { + unsigned first_element; + unsigned last_element; + } buf; +}; /** * A view into a texture that can be bound to a color render target / @@ -387,17 +411,7 @@ unsigned writable:1; /**< writable shader resource */ - union { - struct { - unsigned level; - unsigned first_layer:16; - unsigned last_layer:16; - } tex; - struct { - unsigned first_element; - unsigned last_element; - } buf; - } u; + union pipe_surface_desc u; }; @@ -419,8 +433,8 @@ unsigned last_level:8; /**< last mipmap level to use */ } tex; struct { - unsigned first_element; - unsigned last_element; + unsigned offset; /**< offset in bytes */ + unsigned size; /**< size of the readable sub-range in bytes */ } buf; } u; unsigned swizzle_r:3; /**< PIPE_SWIZZLE_x for red component */ @@ -447,8 +461,8 @@ unsigned level:8; /**< mipmap level to use */ } tex; struct { - unsigned first_element; - unsigned last_element; + unsigned offset; /**< offset in bytes */ + unsigned size; /**< size of the accessible sub-range in bytes */ } buf; } u; }; @@ -489,6 +503,12 @@ unsigned bind; /**< bitmask of PIPE_BIND_x */ unsigned flags; /**< bitmask of PIPE_RESOURCE_FLAG_x */ + + /** + * For planar images, ie. YUV EGLImage external, etc, pointer to the + * next plane. + */ + struct pipe_resource *next; }; @@ -710,6 +730,11 @@ boolean scissor_enable; struct pipe_scissor_state scissor; + /* Window rectangles can either be inclusive or exclusive. */ + boolean window_rectangle_include; + unsigned num_window_rectangles; + struct pipe_scissor_state window_rectangles[PIPE_MAX_WINDOW_RECTANGLES]; + boolean render_condition_enable; /**< whether the blit should honor the current render condition */ boolean alpha_blend; /* dst.rgb = src.rgb * src.a + dst.rgb * (1 - src.a) */ @@ -733,6 +758,13 @@ void *input; /** + * Grid number of dimensions, 1-3, e.g. the work_dim parameter passed to + * clEnqueueNDRangeKernel. Note block[] and grid[] must be padded with + * 1 for non-used dimensions. + */ + uint work_dim; + + /** * Determine the layout of the working block (in thread units) to be used. */ uint block[3]; @@ -779,6 +811,12 @@ struct pipe_debug_callback { /** + * When set to \c true, the callback may be called asynchronously from a + * driver-created thread. + */ + bool async; + + /** * Callback for the driver to report debug/performance/etc information back * to the state tracker. * @@ -797,6 +835,25 @@ void *data; }; +/** + * Structure that contains a callback for device reset messages from the driver + * back to the state tracker. + * + * The callback must not be called from driver-created threads. + */ +struct pipe_device_reset_callback +{ + /** + * Callback for the driver to report when a device reset is detected. + * + * \param data user-supplied data pointer + * \param status PIPE_*_RESET + */ + void (*reset)(void *data, enum pipe_reset_status status); + + void *data; +}; + /** * Information about memory usage. All sizes are in kilobytes. */ diff -Nru mesa-12.0.6/src/gallium/include/pipe/p_video_codec.h mesa-17.0.7/src/gallium/include/pipe/p_video_codec.h --- mesa-12.0.6/src/gallium/include/pipe/p_video_codec.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/include/pipe/p_video_codec.h 2017-06-01 10:37:10.000000000 +0000 @@ -126,6 +126,7 @@ unsigned width; unsigned height; bool interlaced; + unsigned bind; /** * destroy this video buffer @@ -133,17 +134,17 @@ void (*destroy)(struct pipe_video_buffer *buffer); /** - * get a individual sampler view for each plane + * get an individual sampler view for each plane */ struct pipe_sampler_view **(*get_sampler_view_planes)(struct pipe_video_buffer *buffer); /** - * get a individual sampler view for each component + * get an individual sampler view for each component */ struct pipe_sampler_view **(*get_sampler_view_components)(struct pipe_video_buffer *buffer); /** - * get a individual surfaces for each plane + * get an individual surfaces for each plane */ struct pipe_surface **(*get_surfaces)(struct pipe_video_buffer *buffer); diff -Nru mesa-12.0.6/src/gallium/include/pipe/p_video_state.h mesa-17.0.7/src/gallium/include/pipe/p_video_state.h --- mesa-12.0.6/src/gallium/include/pipe/p_video_state.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/include/pipe/p_video_state.h 2017-06-01 10:37:10.000000000 +0000 @@ -131,6 +131,7 @@ struct pipe_picture_desc { enum pipe_video_profile profile; + enum pipe_video_entrypoint entry_point; }; struct pipe_quant_matrix @@ -352,9 +353,29 @@ unsigned frame_rate_num; unsigned frame_rate_den; unsigned vbv_buffer_size; + unsigned vbv_buf_lv; unsigned target_bits_picture; unsigned peak_bits_picture_integer; unsigned peak_bits_picture_fraction; + unsigned fill_data_enable; + unsigned enforce_hrd; +}; + +struct pipe_h264_enc_motion_estimation +{ + unsigned motion_est_quarter_pixel; + unsigned enc_disable_sub_mode; + unsigned lsmvert; + unsigned enc_en_ime_overw_dis_subm; + unsigned enc_ime_overw_dis_subm_no; + unsigned enc_ime2_search_range_x; + unsigned enc_ime2_search_range_y; +}; + +struct pipe_h264_enc_pic_control +{ + unsigned enc_cabac_enable; + unsigned enc_constraint_set_flags; }; struct pipe_h264_enc_picture_desc @@ -363,17 +384,30 @@ struct pipe_h264_enc_rate_control rate_ctrl; + struct pipe_h264_enc_motion_estimation motion_est; + struct pipe_h264_enc_pic_control pic_ctrl; + unsigned quant_i_frames; unsigned quant_p_frames; unsigned quant_b_frames; enum pipe_h264_enc_picture_type picture_type; unsigned frame_num; + unsigned frame_num_cnt; + unsigned p_remain; + unsigned i_remain; + unsigned idr_pic_id; + unsigned gop_cnt; unsigned pic_order_cnt; unsigned ref_idx_l0; unsigned ref_idx_l1; + unsigned gop_size; + unsigned ref_pic_mode; bool not_referenced; + bool is_idr; + bool enable_vui; + unsigned int frame_idx[32]; }; struct pipe_h265_sps diff -Nru mesa-12.0.6/src/gallium/include/state_tracker/drm_driver.h mesa-17.0.7/src/gallium/include/state_tracker/drm_driver.h --- mesa-12.0.6/src/gallium/include/state_tracker/drm_driver.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/include/state_tracker/drm_driver.h 2017-06-01 10:37:10.000000000 +0000 @@ -86,12 +86,7 @@ struct drm_driver_descriptor { /** - * Identifying sufix/prefix of the binary, used by egl. - */ - const char *name; - - /** - * Kernel driver name, as accepted by drmOpenByName. + * Identifying prefix/suffix of the binary, used by the pipe-loader. */ const char *driver_name; @@ -103,7 +98,6 @@ */ struct pipe_screen* (*create_screen)(int drm_fd); - /** * Return a configuration value. * @@ -114,14 +108,13 @@ const struct drm_conf_ret *(*configuration) (enum drm_conf conf); }; -extern struct drm_driver_descriptor driver_descriptor; +extern const struct drm_driver_descriptor driver_descriptor; /** * Instantiate a drm_driver_descriptor struct. */ -#define DRM_DRIVER_DESCRIPTOR(name_str, driver_name_str, func, conf) \ -struct drm_driver_descriptor driver_descriptor = { \ - .name = name_str, \ +#define DRM_DRIVER_DESCRIPTOR(driver_name_str, func, conf) \ +const struct drm_driver_descriptor driver_descriptor = { \ .driver_name = driver_name_str, \ .create_screen = func, \ .configuration = (conf), \ diff -Nru mesa-12.0.6/src/gallium/include/state_tracker/st_api.h mesa-17.0.7/src/gallium/include/state_tracker/st_api.h --- mesa-12.0.6/src/gallium/include/state_tracker/st_api.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/include/state_tracker/st_api.h 2017-06-01 10:37:10.000000000 +0000 @@ -175,11 +175,6 @@ ST_MANAGER_BROKEN_INVALIDATE }; -/** - * The return type of st_api->get_proc_address. - */ -typedef void (*st_proc_t)(void); - struct pipe_context; struct pipe_resource; struct pipe_fence_handle; @@ -205,6 +200,9 @@ /* this is owned by the caller */ struct pipe_resource *texture; + /* format only differs from texture->format for multi-planar (YUV): */ + enum pipe_format format; + unsigned level; unsigned layer; }; @@ -215,7 +213,7 @@ struct st_visual { /** - * Available buffers. Tested with ST_FRAMEBUFFER_*_MASK. + * Available buffers. Bitfield of ST_ATTACHMENT_*_MASK bits. */ unsigned buffer_mask; @@ -499,13 +497,6 @@ int *gl_es2_version); /** - * Return an API entry point. - * - * For GL this is the same as _glapi_get_proc_address. - */ - st_proc_t (*get_proc_address)(struct st_api *stapi, const char *procname); - - /** * Create a rendering context. */ struct st_context_iface *(*create_context)(struct st_api *stapi, diff -Nru mesa-12.0.6/src/gallium/include/state_tracker/sw_driver.h mesa-17.0.7/src/gallium/include/state_tracker/sw_driver.h --- mesa-12.0.6/src/gallium/include/state_tracker/sw_driver.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/include/state_tracker/sw_driver.h 2017-06-01 10:37:10.000000000 +0000 @@ -16,6 +16,6 @@ } winsys[]; }; -extern struct sw_driver_descriptor swrast_driver_descriptor; +extern const struct sw_driver_descriptor swrast_driver_descriptor; #endif diff -Nru mesa-12.0.6/src/gallium/include/state_tracker/vdpau_dmabuf.h mesa-17.0.7/src/gallium/include/state_tracker/vdpau_dmabuf.h --- mesa-12.0.6/src/gallium/include/state_tracker/vdpau_dmabuf.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/include/state_tracker/vdpau_dmabuf.h 2017-06-01 10:37:10.000000000 +0000 @@ -87,7 +87,7 @@ ); typedef VdpStatus VdpOutputSurfaceDMABuf( - VdpVideoSurface surface, + VdpOutputSurface surface, struct VdpSurfaceDMABufDesc * result ); diff -Nru mesa-12.0.6/src/gallium/Makefile.am mesa-17.0.7/src/gallium/Makefile.am --- mesa-12.0.6/src/gallium/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -68,6 +68,14 @@ SUBDIRS += winsys/radeon/drm endif +if HAVE_GALLIUM_ETNAVIV +SUBDIRS += drivers/etnaviv winsys/etnaviv/drm +endif + +if HAVE_GALLIUM_IMX +SUBDIRS += drivers/imx winsys/imx/drm +endif + ## swrast/softpipe if HAVE_GALLIUM_SOFTPIPE SUBDIRS += drivers/softpipe diff -Nru mesa-12.0.6/src/gallium/Makefile.in mesa-17.0.7/src/gallium/Makefile.in --- mesa-12.0.6/src/gallium/Makefile.in 2017-01-24 01:41:45.000000000 +0000 +++ mesa-17.0.7/src/gallium/Makefile.in 2017-06-01 10:37:19.000000000 +0000 @@ -99,26 +99,28 @@ @HAVE_GALLIUM_RADEONSI_TRUE@am__append_9 = drivers/radeonsi \ @HAVE_GALLIUM_RADEONSI_TRUE@ winsys/amdgpu/drm @NEED_RADEON_DRM_WINSYS_TRUE@am__append_10 = winsys/radeon/drm -@HAVE_GALLIUM_SOFTPIPE_TRUE@am__append_11 = drivers/softpipe -@HAVE_GALLIUM_LLVMPIPE_TRUE@@HAVE_GALLIUM_SOFTPIPE_TRUE@am__append_12 = drivers/llvmpipe -@HAVE_GALLIUM_SWR_TRUE@am__append_13 = drivers/swr -@HAVE_GALLIUM_VC4_TRUE@am__append_14 = drivers/vc4 winsys/vc4/drm -@HAVE_GALLIUM_VIRGL_TRUE@am__append_15 = drivers/virgl winsys/virgl/drm winsys/virgl/vtest -@NEED_WINSYS_XLIB_TRUE@am__append_16 = winsys/sw/xlib -@HAVE_DRISW_TRUE@am__append_17 = winsys/sw/dri -@HAVE_DRISW_KMS_TRUE@am__append_18 = winsys/sw/kms-dri -@HAVE_CLOVER_TRUE@am__append_19 = targets/pipe-loader \ +@HAVE_GALLIUM_ETNAVIV_TRUE@am__append_11 = drivers/etnaviv winsys/etnaviv/drm +@HAVE_GALLIUM_IMX_TRUE@am__append_12 = drivers/imx winsys/imx/drm +@HAVE_GALLIUM_SOFTPIPE_TRUE@am__append_13 = drivers/softpipe +@HAVE_GALLIUM_LLVMPIPE_TRUE@@HAVE_GALLIUM_SOFTPIPE_TRUE@am__append_14 = drivers/llvmpipe +@HAVE_GALLIUM_SWR_TRUE@am__append_15 = drivers/swr +@HAVE_GALLIUM_VC4_TRUE@am__append_16 = drivers/vc4 winsys/vc4/drm +@HAVE_GALLIUM_VIRGL_TRUE@am__append_17 = drivers/virgl winsys/virgl/drm winsys/virgl/vtest +@NEED_WINSYS_XLIB_TRUE@am__append_18 = winsys/sw/xlib +@HAVE_DRISW_TRUE@am__append_19 = winsys/sw/dri +@HAVE_DRISW_KMS_TRUE@am__append_20 = winsys/sw/kms-dri +@HAVE_CLOVER_TRUE@am__append_21 = targets/pipe-loader \ @HAVE_CLOVER_TRUE@ state_trackers/clover targets/opencl -@HAVE_DRICOMMON_TRUE@am__append_20 = state_trackers/dri targets/dri -@HAVE_GALLIUM_XLIB_GLX_TRUE@am__append_21 = state_trackers/glx/xlib targets/libgl-xlib -@HAVE_ST_OMX_TRUE@am__append_22 = state_trackers/omx targets/omx -@HAVE_GALLIUM_OSMESA_TRUE@am__append_23 = state_trackers/osmesa targets/osmesa -@HAVE_ST_VA_TRUE@am__append_24 = state_trackers/va targets/va -@HAVE_ST_VDPAU_TRUE@am__append_25 = state_trackers/vdpau targets/vdpau -@HAVE_ST_XA_TRUE@am__append_26 = state_trackers/xa targets/xa -@HAVE_ST_XVMC_TRUE@am__append_27 = state_trackers/xvmc targets/xvmc -@HAVE_ST_NINE_TRUE@am__append_28 = state_trackers/nine targets/d3dadapter9 -@HAVE_GALLIUM_TESTS_TRUE@am__append_29 = \ +@HAVE_DRICOMMON_TRUE@am__append_22 = state_trackers/dri targets/dri +@HAVE_GALLIUM_XLIB_GLX_TRUE@am__append_23 = state_trackers/glx/xlib targets/libgl-xlib +@HAVE_ST_OMX_TRUE@am__append_24 = state_trackers/omx targets/omx +@HAVE_GALLIUM_OSMESA_TRUE@am__append_25 = state_trackers/osmesa targets/osmesa +@HAVE_ST_VA_TRUE@am__append_26 = state_trackers/va targets/va +@HAVE_ST_VDPAU_TRUE@am__append_27 = state_trackers/vdpau targets/vdpau +@HAVE_ST_XA_TRUE@am__append_28 = state_trackers/xa targets/xa +@HAVE_ST_XVMC_TRUE@am__append_29 = state_trackers/xvmc targets/xvmc +@HAVE_ST_NINE_TRUE@am__append_30 = state_trackers/nine targets/d3dadapter9 +@HAVE_GALLIUM_TESTS_TRUE@am__append_31 = \ @HAVE_GALLIUM_TESTS_TRUE@ tests/trivial \ @HAVE_GALLIUM_TESTS_TRUE@ tests/unit @@ -200,7 +202,8 @@ winsys/intel/drm drivers/nouveau winsys/nouveau/drm \ drivers/svga winsys/svga/drm drivers/r300 drivers/radeon \ drivers/r600 drivers/radeonsi winsys/amdgpu/drm \ - winsys/radeon/drm drivers/softpipe drivers/llvmpipe \ + winsys/radeon/drm drivers/etnaviv winsys/etnaviv/drm \ + drivers/imx winsys/imx/drm drivers/softpipe drivers/llvmpipe \ drivers/swr drivers/vc4 winsys/vc4/drm drivers/virgl \ winsys/virgl/drm winsys/virgl/vtest winsys/sw/null \ winsys/sw/xlib winsys/sw/dri winsys/sw/kms-dri \ @@ -244,6 +247,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -258,6 +263,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -287,10 +293,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -340,11 +347,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -384,8 +388,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -422,8 +424,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -432,7 +432,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -440,13 +439,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -475,6 +475,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -543,12 +544,13 @@ $(am__append_6) $(am__append_7) $(am__append_8) \ $(am__append_9) $(am__append_10) $(am__append_11) \ $(am__append_12) $(am__append_13) $(am__append_14) \ - $(am__append_15) winsys/sw/null $(am__append_16) \ - $(am__append_17) $(am__append_18) winsys/sw/wrapper \ - $(am__append_19) $(am__append_20) $(am__append_21) \ + $(am__append_15) $(am__append_16) $(am__append_17) \ + winsys/sw/null $(am__append_18) $(am__append_19) \ + $(am__append_20) winsys/sw/wrapper $(am__append_21) \ $(am__append_22) $(am__append_23) $(am__append_24) \ $(am__append_25) $(am__append_26) $(am__append_27) \ - $(am__append_28) $(am__append_29) + $(am__append_28) $(am__append_29) $(am__append_30) \ + $(am__append_31) EXTRA_DIST = docs README.portability SConscript winsys/sw/gdi \ winsys/sw/hgl include state_trackers/README state_trackers/wgl \ targets/libgl-gdi targets/graw-gdi targets/graw-null \ diff -Nru mesa-12.0.6/src/gallium/SConscript mesa-17.0.7/src/gallium/SConscript --- mesa-12.0.6/src/gallium/SConscript 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/SConscript 2017-06-01 10:37:10.000000000 +0000 @@ -18,6 +18,7 @@ 'drivers/softpipe/SConscript', 'drivers/svga/SConscript', 'drivers/trace/SConscript', + 'drivers/swr/SConscript', ]) # diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/api/device.cpp mesa-17.0.7/src/gallium/state_trackers/clover/api/device.cpp --- mesa-12.0.6/src/gallium/state_trackers/clover/api/device.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/api/device.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -158,7 +158,7 @@ break; case CL_DEVICE_ADDRESS_BITS: - buf.as_scalar() = 32; + buf.as_scalar() = dev.address_bits(); break; case CL_DEVICE_MAX_READ_IMAGE_ARGS: @@ -184,6 +184,14 @@ buf.as_scalar() = 1 << dev.max_image_levels_3d(); break; + case CL_DEVICE_IMAGE_MAX_BUFFER_SIZE: + buf.as_scalar() = dev.max_image_buffer_size(); + break; + + case CL_DEVICE_IMAGE_MAX_ARRAY_SIZE: + buf.as_scalar() = dev.max_image_array_number(); + break; + case CL_DEVICE_IMAGE_SUPPORT: buf.as_scalar() = dev.image_support(); break; @@ -273,6 +281,7 @@ case CL_DEVICE_AVAILABLE: case CL_DEVICE_COMPILER_AVAILABLE: + case CL_DEVICE_LINKER_AVAILABLE: buf.as_scalar() = CL_TRUE; break; @@ -284,6 +293,10 @@ buf.as_scalar() = CL_QUEUE_PROFILING_ENABLE; break; + case CL_DEVICE_BUILT_IN_KERNELS: + buf.as_string() = ""; + break; + case CL_DEVICE_NAME: buf.as_string() = dev.device_name(); break; @@ -358,6 +371,16 @@ buf.as_string() = "OpenCL C 1.1 "; break; + case CL_DEVICE_PRINTF_BUFFER_SIZE: + // Per the spec, the minimum value for the FULL profile is 1 MB. + // However, clover is not ready yet to support it + buf.as_scalar() = 0 /* 1024 */; + break; + + case CL_DEVICE_PREFERRED_INTEROP_USER_SYNC: + buf.as_scalar() = CL_TRUE; + break; + case CL_DEVICE_PARENT_DEVICE: buf.as_scalar() = NULL; break; diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/api/dispatch.cpp mesa-17.0.7/src/gallium/state_trackers/clover/api/dispatch.cpp --- mesa-12.0.6/src/gallium/state_trackers/clover/api/dispatch.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/api/dispatch.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -131,7 +131,7 @@ clEnqueueMigrateMemObjects, clEnqueueMarkerWithWaitList, clEnqueueBarrierWithWaitList, - NULL, // clGetExtensionFunctionAddressForPlatform + GetExtensionFunctionAddressForPlatform, NULL, // clCreateFromGLTexture NULL, // clGetDeviceIDsFromD3D11KHR NULL, // clCreateFromD3D11BufferKHR diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/api/dispatch.hpp mesa-17.0.7/src/gallium/state_trackers/clover/api/dispatch.hpp --- mesa-12.0.6/src/gallium/state_trackers/clover/api/dispatch.hpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/api/dispatch.hpp 2017-06-01 10:37:10.000000000 +0000 @@ -777,6 +777,10 @@ void * GetExtensionFunctionAddress(const char *p_name); + void * + GetExtensionFunctionAddressForPlatform(cl_platform_id d_platform, + const char *p_name); + cl_int IcdGetPlatformIDsKHR(cl_uint num_entries, cl_platform_id *rd_platforms, cl_uint *rnum_platforms); diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/api/kernel.cpp mesa-17.0.7/src/gallium/state_trackers/clover/api/kernel.cpp --- mesa-12.0.6/src/gallium/state_trackers/clover/api/kernel.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/api/kernel.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -215,7 +215,10 @@ }, kern.args())) throw error(CL_INVALID_KERNEL_ARGS); - if (!count(q.device(), kern.program().devices())) + // If the command queue's device is not associated to the program, we get + // a module, with no sections, which will also fail the following test. + auto &m = kern.program().build(q.device()).binary; + if (!any_of(type_equals(module::section::text_executable), m.secs)) throw error(CL_INVALID_PROGRAM_EXECUTABLE); } diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/api/platform.cpp mesa-17.0.7/src/gallium/state_trackers/clover/api/platform.cpp --- mesa-12.0.6/src/gallium/state_trackers/clover/api/platform.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/api/platform.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -92,6 +92,16 @@ } void * +clover::GetExtensionFunctionAddressForPlatform(cl_platform_id d_platform, + const char *p_name) try { + obj(d_platform); + return GetExtensionFunctionAddress(p_name); + +} catch (error &e) { + return NULL; +} + +void * clover::GetExtensionFunctionAddress(const char *p_name) { std::string name { p_name }; @@ -118,6 +128,12 @@ return GetExtensionFunctionAddress(p_name); } +CLOVER_ICD_API void * +clGetExtensionFunctionAddressForPlatform(cl_platform_id d_platform, + const char *p_name) { + return GetExtensionFunctionAddressForPlatform(d_platform, p_name); +} + CLOVER_ICD_API cl_int clIcdGetPlatformIDsKHR(cl_uint num_entries, cl_platform_id *rd_platforms, cl_uint *rnum_platforms) { diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/api/program.cpp mesa-17.0.7/src/gallium/state_trackers/clover/api/program.cpp --- mesa-12.0.6/src/gallium/state_trackers/clover/api/program.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/api/program.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -22,18 +22,19 @@ #include "api/util.hpp" #include "core/program.hpp" +#include "util/u_debug.h" #include using namespace clover; namespace { - void validate_build_program_common(const program &prog, cl_uint num_devs, - const cl_device_id *d_devs, - void (*pfn_notify)(cl_program, void *), - void *user_data) { - - if ((!pfn_notify && user_data)) + void + validate_build_common(const program &prog, cl_uint num_devs, + const cl_device_id *d_devs, + void (*pfn_notify)(cl_program, void *), + void *user_data) { + if (!pfn_notify && user_data) throw error(CL_INVALID_VALUE); if (prog.kernel_ref_count()) @@ -177,17 +178,19 @@ auto &prog = obj(d_prog); auto devs = (d_devs ? objs(d_devs, num_devs) : ref_vector(prog.context().devices())); - auto opts = (p_opts ? p_opts : ""); + const auto opts = std::string(p_opts ? p_opts : "") + " " + + debug_get_option("CLOVER_EXTRA_BUILD_OPTIONS", ""); + + validate_build_common(prog, num_devs, d_devs, pfn_notify, user_data); - validate_build_program_common(prog, num_devs, d_devs, pfn_notify, user_data); + if (prog.has_source) { + prog.compile(devs, opts); + prog.link(devs, opts, { prog }); + } - prog.build(devs, opts); return CL_SUCCESS; + } catch (error &e) { - if (e.get() == CL_INVALID_COMPILER_OPTIONS) - return CL_INVALID_BUILD_OPTIONS; - if (e.get() == CL_COMPILE_PROGRAM_FAILURE) - return CL_BUILD_PROGRAM_FAILURE; return e.get(); } @@ -201,10 +204,11 @@ auto &prog = obj(d_prog); auto devs = (d_devs ? objs(d_devs, num_devs) : ref_vector(prog.context().devices())); - auto opts = (p_opts ? p_opts : ""); + const auto opts = std::string(p_opts ? p_opts : "") + " " + + debug_get_option("CLOVER_EXTRA_COMPILE_OPTIONS", ""); header_map headers; - validate_build_program_common(prog, num_devs, d_devs, pfn_notify, user_data); + validate_build_common(prog, num_devs, d_devs, pfn_notify, user_data); if (bool(num_headers) != bool(header_names)) throw error(CL_INVALID_VALUE); @@ -212,7 +216,6 @@ if (!prog.has_source) throw error(CL_INVALID_OPERATION); - for_each([&](const char *name, const program &header) { if (!header.has_source) throw error(CL_INVALID_OPERATION); @@ -224,20 +227,81 @@ range(header_names, num_headers), objs(d_header_progs, num_headers)); - prog.build(devs, opts, headers); + prog.compile(devs, opts, headers); return CL_SUCCESS; +} catch (invalid_build_options_error &e) { + return CL_INVALID_COMPILER_OPTIONS; + +} catch (build_error &e) { + return CL_COMPILE_PROGRAM_FAILURE; + } catch (error &e) { return e.get(); } +namespace { + ref_vector + validate_link_devices(const ref_vector &progs, + const ref_vector &all_devs) { + std::vector devs; + + for (auto &dev : all_devs) { + const auto has_binary = [&](const program &prog) { + const auto t = prog.build(dev).binary_type(); + return t == CL_PROGRAM_BINARY_TYPE_COMPILED_OBJECT || + t == CL_PROGRAM_BINARY_TYPE_LIBRARY; + }; + + // According to the CL 1.2 spec, when "all programs specified [..] + // contain a compiled binary or library for the device [..] a link is + // performed", + if (all_of(has_binary, progs)) + devs.push_back(&dev); + + // otherwise if "none of the programs contain a compiled binary or + // library for that device [..] no link is performed. All other + // cases will return a CL_INVALID_OPERATION error." + else if (any_of(has_binary, progs)) + throw error(CL_INVALID_OPERATION); + } + + return map(derefs(), devs); + } +} + CLOVER_API cl_program clLinkProgram(cl_context d_ctx, cl_uint num_devs, const cl_device_id *d_devs, const char *p_opts, cl_uint num_progs, const cl_program *d_progs, - void (*pfn_notify)(cl_program, void *), void *user_data, - cl_int *r_errcode) { - CLOVER_NOT_SUPPORTED_UNTIL("1.2"); - ret_error(r_errcode, CL_LINKER_NOT_AVAILABLE); + void (*pfn_notify) (cl_program, void *), void *user_data, + cl_int *r_errcode) try { + auto &ctx = obj(d_ctx); + const auto opts = std::string(p_opts ? p_opts : "") + " " + + debug_get_option("CLOVER_EXTRA_LINK_OPTIONS", ""); + auto progs = objs(d_progs, num_progs); + auto prog = create(ctx); + auto devs = validate_link_devices(progs, + (d_devs ? objs(d_devs, num_devs) : + ref_vector(ctx.devices()))); + + validate_build_common(prog, num_devs, d_devs, pfn_notify, user_data); + + try { + prog().link(devs, opts, progs); + ret_error(r_errcode, CL_SUCCESS); + + } catch (build_error &e) { + ret_error(r_errcode, CL_LINK_PROGRAM_FAILURE); + } + + return ret_object(prog); + +} catch (invalid_build_options_error &e) { + ret_error(r_errcode, CL_INVALID_LINKER_OPTIONS); + return NULL; + +} catch (error &e) { + ret_error(r_errcode, e); return NULL; } @@ -284,7 +348,7 @@ case CL_PROGRAM_BINARY_SIZES: buf.as_vector() = map([&](const device &dev) { - return prog.binary(dev).size(); + return prog.build(dev).binary.size(); }, prog.devices()); break; @@ -293,7 +357,7 @@ buf.as_matrix() = map([&](const device &dev) { std::stringbuf bin; std::ostream s(&bin); - prog.binary(dev).serialize(s); + prog.build(dev).binary.serialize(s); return bin.str(); }, prog.devices()); @@ -332,15 +396,19 @@ switch (param) { case CL_PROGRAM_BUILD_STATUS: - buf.as_scalar() = prog.build_status(dev); + buf.as_scalar() = prog.build(dev).status(); break; case CL_PROGRAM_BUILD_OPTIONS: - buf.as_string() = prog.build_opts(dev); + buf.as_string() = prog.build(dev).opts; break; case CL_PROGRAM_BUILD_LOG: - buf.as_string() = prog.build_log(dev); + buf.as_string() = prog.build(dev).log; + break; + + case CL_PROGRAM_BINARY_TYPE: + buf.as_scalar() = prog.build(dev).binary_type(); break; default: diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/api/util.hpp mesa-17.0.7/src/gallium/state_trackers/clover/api/util.hpp --- mesa-12.0.6/src/gallium/state_trackers/clover/api/util.hpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/api/util.hpp 2017-06-01 10:37:10.000000000 +0000 @@ -68,6 +68,17 @@ *p = desc(v()); } } + + /// + /// Return an API object from an intrusive reference to a Clover object, + /// incrementing the reference count of the object. + /// + template + typename T::descriptor_type * + ret_object(const intrusive_ref &v) { + v().retain(); + return desc(v()); + } } #endif diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/core/compiler.hpp mesa-17.0.7/src/gallium/state_trackers/clover/core/compiler.hpp --- mesa-12.0.6/src/gallium/state_trackers/clover/core/compiler.hpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/core/compiler.hpp 1970-01-01 00:00:00.000000000 +0000 @@ -1,44 +0,0 @@ -// -// Copyright 2012 Francisco Jerez -// -// Permission is hereby granted, free of charge, to any person obtaining a -// copy of this software and associated documentation files (the "Software"), -// to deal in the Software without restriction, including without limitation -// the rights to use, copy, modify, merge, publish, distribute, sublicense, -// and/or sell copies of the Software, and to permit persons to whom the -// Software is furnished to do so, subject to the following conditions: -// -// The above copyright notice and this permission notice shall be included in -// all copies or substantial portions of the Software. -// -// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -// THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR -// OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, -// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -// OTHER DEALINGS IN THE SOFTWARE. -// - -#ifndef CLOVER_CORE_COMPILER_HPP -#define CLOVER_CORE_COMPILER_HPP - -#include "core/error.hpp" -#include "core/module.hpp" -#include "pipe/p_defines.h" - -namespace clover { - typedef std::vector > header_map; - - module compile_program_llvm(const std::string &source, - const header_map &headers, - pipe_shader_ir ir, - const std::string &target, - const std::string &opts, - std::string &r_log); - - module compile_program_tgsi(const std::string &source, - std::string &r_log); -} - -#endif diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/core/device.cpp mesa-17.0.7/src/gallium/state_trackers/clover/core/device.cpp --- mesa-12.0.6/src/gallium/state_trackers/clover/core/device.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/core/device.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -98,6 +98,11 @@ return PIPE_MAX_SHADER_IMAGES; } +size_t +device::max_image_buffer_size() const { + return pipe->get_param(pipe, PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE); +} + cl_uint device::max_image_levels_2d() const { return pipe->get_param(pipe, PIPE_CAP_MAX_TEXTURE_2D_LEVELS); @@ -108,6 +113,11 @@ return pipe->get_param(pipe, PIPE_CAP_MAX_TEXTURE_3D_LEVELS); } +size_t +device::max_image_array_number() const { + return pipe->get_param(pipe, PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS); +} + cl_uint device::max_samplers() const { return pipe->get_shader_param(pipe, PIPE_SHADER_COMPUTE, @@ -193,6 +203,12 @@ PIPE_COMPUTE_CAP_SUBGROUP_SIZE)[0]; } +cl_uint +device::address_bits() const { + return get_compute_param(pipe, ir_format(), + PIPE_COMPUTE_CAP_ADDRESS_BITS)[0]; +} + std::string device::device_name() const { return pipe->get_name(pipe); diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/core/device.hpp mesa-17.0.7/src/gallium/state_trackers/clover/core/device.hpp --- mesa-12.0.6/src/gallium/state_trackers/clover/core/device.hpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/core/device.hpp 2017-06-01 10:37:10.000000000 +0000 @@ -51,8 +51,10 @@ cl_uint vendor_id() const; size_t max_images_read() const; size_t max_images_write() const; + size_t max_image_buffer_size() const; cl_uint max_image_levels_2d() const; cl_uint max_image_levels_3d() const; + size_t max_image_array_number() const; cl_uint max_samplers() const; cl_ulong max_mem_global() const; cl_ulong max_mem_local() const; @@ -68,6 +70,7 @@ std::vector max_block_size() const; cl_uint subgroup_size() const; + cl_uint address_bits() const; std::string device_name() const; std::string vendor_name() const; enum pipe_shader_ir ir_format() const; diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/core/error.hpp mesa-17.0.7/src/gallium/state_trackers/clover/core/error.hpp --- mesa-12.0.6/src/gallium/state_trackers/clover/core/error.hpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/core/error.hpp 2017-06-01 10:37:10.000000000 +0000 @@ -65,11 +65,16 @@ cl_int code; }; - class compile_error : public error { + class invalid_build_options_error : public error { public: - compile_error(const std::string &what = "") : - error(CL_COMPILE_PROGRAM_FAILURE, what) { - } + invalid_build_options_error(const std::string &what = "") : + error(CL_INVALID_BUILD_OPTIONS, what) {} + }; + + class build_error : public error { + public: + build_error(const std::string &what = "") : + error(CL_BUILD_PROGRAM_FAILURE, what) {} }; template diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/core/event.cpp mesa-17.0.7/src/gallium/state_trackers/clover/core/event.cpp --- mesa-12.0.6/src/gallium/state_trackers/clover/core/event.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/core/event.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -141,7 +141,7 @@ else if (!_fence) return CL_QUEUED; - else if (!screen->fence_finish(screen, _fence, 0)) + else if (!screen->fence_finish(screen, NULL, _fence, 0)) return CL_SUBMITTED; else @@ -168,7 +168,7 @@ queue()->flush(); if (!_fence || - !screen->fence_finish(screen, _fence, PIPE_TIMEOUT_INFINITE)) + !screen->fence_finish(screen, NULL, _fence, PIPE_TIMEOUT_INFINITE)) throw error(CL_EXEC_STATUS_ERROR_FOR_EVENTS_IN_WAIT_LIST); } diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/core/format.cpp mesa-17.0.7/src/gallium/state_trackers/clover/core/format.cpp --- mesa-12.0.6/src/gallium/state_trackers/clover/core/format.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/core/format.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -147,9 +147,7 @@ std::set s; pipe_texture_target target = translate_target(type); unsigned bindings = (PIPE_BIND_SAMPLER_VIEW | - PIPE_BIND_COMPUTE_RESOURCE | - PIPE_BIND_TRANSFER_READ | - PIPE_BIND_TRANSFER_WRITE); + PIPE_BIND_COMPUTE_RESOURCE); for (auto f : formats) { if (all_of([=](const device &dev) { diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/core/kernel.cpp mesa-17.0.7/src/gallium/state_trackers/clover/core/kernel.cpp --- mesa-12.0.6/src/gallium/state_trackers/clover/core/kernel.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/core/kernel.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -51,7 +51,7 @@ const std::vector &grid_offset, const std::vector &grid_size, const std::vector &block_size) { - const auto m = program().binary(q.device()); + const auto m = program().build(q.device()).binary; const auto reduced_grid_size = map(divides(), grid_size, block_size); void *st = exec.bind(&q, grid_offset); @@ -76,6 +76,7 @@ exec.g_buffers.data(), g_handles.data()); // Fill information for the launch_grid() call. + info.work_dim = grid_size.size(); copy(pad_vector(q, block_size, 1), info.block); copy(pad_vector(q, reduced_grid_size, 1), info.grid); info.pc = find(name_equals(_name), m.syms).offset; @@ -141,7 +142,7 @@ const module & kernel::module(const command_queue &q) const { - return program().binary(q.device()); + return program().build(q.device()).binary; } kernel::exec_context::exec_context(kernel &kern) : @@ -159,9 +160,9 @@ std::swap(q, _q); // Bind kernel arguments. - auto &m = kern.program().binary(q->device()); + auto &m = kern.program().build(q->device()).binary; auto margs = find(name_equals(kern.name()), m.syms).args; - auto msec = find(type_equals(module::section::text), m.secs); + auto msec = find(type_equals(module::section::text_executable), m.secs); auto explicit_arg = kern._args.begin(); for (auto &marg : margs) { diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/core/module.hpp mesa-17.0.7/src/gallium/state_trackers/clover/core/module.hpp --- mesa-12.0.6/src/gallium/state_trackers/clover/core/module.hpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/core/module.hpp 2017-06-01 10:37:10.000000000 +0000 @@ -33,7 +33,9 @@ struct section { enum type { - text, + text_intermediate, + text_library, + text_executable, data_constant, data_global, data_local, @@ -43,7 +45,7 @@ section(resource_id id, enum type type, size_t size, const std::vector &data) : id(id), type(type), size(size), data(data) { } - section() : id(0), type(text), size(0), data() { } + section() : id(0), type(text_intermediate), size(0), data() { } resource_id id; type type; diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/core/program.cpp mesa-17.0.7/src/gallium/state_trackers/clover/core/program.cpp --- mesa-12.0.6/src/gallium/state_trackers/clover/core/program.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/core/program.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -21,6 +21,8 @@ // #include "core/program.hpp" +#include "llvm/invocation.hpp" +#include "tgsi/invocation.hpp" using namespace clover; @@ -34,43 +36,58 @@ has_source(false), context(ctx), _devices(devs), _kernel_ref_counter(0) { for_each([&](device &dev, const module &bin) { - _binaries.insert({ &dev, bin }); + _builds[&dev] = { bin }; }, devs, binaries); } void -program::build(const ref_vector &devs, const char *opts, - const header_map &headers) { +program::compile(const ref_vector &devs, const std::string &opts, + const header_map &headers) { if (has_source) { _devices = devs; for (auto &dev : devs) { - _binaries.erase(&dev); - _logs.erase(&dev); - _opts.erase(&dev); - - _opts.insert({ &dev, opts }); - std::string log; try { - auto module = (dev.ir_format() == PIPE_SHADER_IR_TGSI ? - compile_program_tgsi(_source, log) : - compile_program_llvm(_source, headers, - dev.ir_format(), - dev.ir_target(), build_opts(dev), - log)); - _binaries.insert({ &dev, module }); - _logs.insert({ &dev, log }); - } catch (const error &) { - _logs.insert({ &dev, log }); + const module m = (dev.ir_format() == PIPE_SHADER_IR_TGSI ? + tgsi::compile_program(_source, log) : + llvm::compile_program(_source, headers, + dev.ir_target(), opts, log)); + _builds[&dev] = { m, opts, log }; + } catch (...) { + _builds[&dev] = { module(), opts, log }; throw; } } } } +void +program::link(const ref_vector &devs, const std::string &opts, + const ref_vector &progs) { + _devices = devs; + + for (auto &dev : devs) { + const std::vector ms = map([&](const program &prog) { + return prog.build(dev).binary; + }, progs); + std::string log = _builds[&dev].log; + + try { + const module m = (dev.ir_format() == PIPE_SHADER_IR_TGSI ? + tgsi::link_program(ms) : + llvm::link_program(ms, dev.ir_format(), + dev.ir_target(), opts, log)); + _builds[&dev] = { m, opts, log }; + } catch (...) { + _builds[&dev] = { module(), opts, log }; + throw; + } + } +} + const std::string & program::source() const { return _source; @@ -81,37 +98,40 @@ return map(evals(), _devices); } -const module & -program::binary(const device &dev) const { - return _binaries.find(&dev)->second; -} - cl_build_status -program::build_status(const device &dev) const { - if (_binaries.count(&dev)) +program::build::status() const { + if (!binary.secs.empty()) return CL_BUILD_SUCCESS; - else if (_logs.count(&dev)) + else if (log.size()) return CL_BUILD_ERROR; else return CL_BUILD_NONE; } -std::string -program::build_opts(const device &dev) const { - return _opts.count(&dev) ? _opts.find(&dev)->second : ""; +cl_program_binary_type +program::build::binary_type() const { + if (any_of(type_equals(module::section::text_intermediate), binary.secs)) + return CL_PROGRAM_BINARY_TYPE_COMPILED_OBJECT; + else if (any_of(type_equals(module::section::text_library), binary.secs)) + return CL_PROGRAM_BINARY_TYPE_LIBRARY; + else if (any_of(type_equals(module::section::text_executable), binary.secs)) + return CL_PROGRAM_BINARY_TYPE_EXECUTABLE; + else + return CL_PROGRAM_BINARY_TYPE_NONE; } -std::string -program::build_log(const device &dev) const { - return _logs.count(&dev) ? _logs.find(&dev)->second : ""; +const struct program::build & +program::build(const device &dev) const { + static const struct build null; + return _builds.count(&dev) ? _builds.find(&dev)->second : null; } const std::vector & program::symbols() const { - if (_binaries.empty()) + if (_builds.empty()) throw error(CL_INVALID_PROGRAM_EXECUTABLE); - return _binaries.begin()->second.syms; + return _builds.begin()->second.binary.syms; } unsigned diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/core/program.hpp mesa-17.0.7/src/gallium/state_trackers/clover/core/program.hpp --- mesa-12.0.6/src/gallium/state_trackers/clover/core/program.hpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/core/program.hpp 2017-06-01 10:37:10.000000000 +0000 @@ -28,9 +28,10 @@ #include "core/object.hpp" #include "core/context.hpp" #include "core/module.hpp" -#include "core/compiler.hpp" namespace clover { + typedef std::vector> header_map; + class program : public ref_counter, public _cl_program { private: typedef adaptor_range< @@ -40,25 +41,36 @@ program(clover::context &ctx, const std::string &source); program(clover::context &ctx, - const ref_vector &devs, - const std::vector &binaries); + const ref_vector &devs = {}, + const std::vector &binaries = {}); program(const program &prog) = delete; program & operator=(const program &prog) = delete; - void build(const ref_vector &devs, const char *opts, - const header_map &headers = {}); + void compile(const ref_vector &devs, const std::string &opts, + const header_map &headers = {}); + void link(const ref_vector &devs, const std::string &opts, + const ref_vector &progs); const bool has_source; const std::string &source() const; device_range devices() const; - const module &binary(const device &dev) const; - cl_build_status build_status(const device &dev) const; - std::string build_opts(const device &dev) const; - std::string build_log(const device &dev) const; + struct build { + build(const module &m = {}, const std::string &opts = {}, + const std::string &log = {}) : binary(m), opts(opts), log(log) {} + + cl_build_status status() const; + cl_program_binary_type binary_type() const; + + module binary; + std::string opts; + std::string log; + }; + + const build &build(const device &dev) const; const std::vector &symbols() const; @@ -70,9 +82,7 @@ private: std::vector> _devices; - std::map _binaries; - std::map _logs; - std::map _opts; + std::map _builds; std::string _source; ref_counter _kernel_ref_counter; }; diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/core/queue.cpp mesa-17.0.7/src/gallium/state_trackers/clover/core/queue.cpp --- mesa-12.0.6/src/gallium/state_trackers/clover/core/queue.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/core/queue.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -50,7 +50,10 @@ throw error(CL_INVALID_DEVICE); if (ctx.notify) { - struct pipe_debug_callback cb = { &debug_notify_callback, this }; + struct pipe_debug_callback cb; + memset(&cb, 0, sizeof(cb)); + cb.debug_message = &debug_notify_callback; + cb.data = this; if (pipe->set_debug_callback) pipe->set_debug_callback(pipe, &cb); } diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/core/resource.cpp mesa-17.0.7/src/gallium/state_trackers/clover/core/resource.cpp --- mesa-12.0.6/src/gallium/state_trackers/clover/core/resource.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/core/resource.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -25,6 +25,7 @@ #include "pipe/p_screen.h" #include "util/u_sampler.h" #include "util/u_format.h" +#include "util/u_inlines.h" using namespace clover; @@ -136,9 +137,7 @@ info.target = translate_target(obj.type()); info.bind = (PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_COMPUTE_RESOURCE | - PIPE_BIND_GLOBAL | - PIPE_BIND_TRANSFER_READ | - PIPE_BIND_TRANSFER_WRITE); + PIPE_BIND_GLOBAL); if (obj.flags() & CL_MEM_USE_HOST_PTR && user_ptr_support) { // Page alignment is normally required for this, just try, hope for the @@ -161,9 +160,13 @@ box rect { {{ 0, 0, 0 }}, {{ info.width0, info.height0, info.depth0 }} }; unsigned cpp = util_format_get_blocksize(info.format); - q.pipe->transfer_inline_write(q.pipe, pipe, 0, PIPE_TRANSFER_WRITE, - rect, data_ptr, cpp * info.width0, - cpp * info.width0 * info.height0); + if (pipe->target == PIPE_BUFFER) + q.pipe->buffer_subdata(q.pipe, pipe, PIPE_TRANSFER_WRITE, + 0, info.width0, data_ptr); + else + q.pipe->texture_subdata(q.pipe, pipe, 0, PIPE_TRANSFER_WRITE, + rect, data_ptr, cpp * info.width0, + cpp * info.width0 * info.height0); } } @@ -174,7 +177,7 @@ } root_resource::~root_resource() { - device().pipe->resource_destroy(device().pipe, pipe); + pipe_resource_reference(&this->pipe, NULL); } sub_resource::sub_resource(resource &r, const vector &offset) : @@ -187,7 +190,7 @@ cl_map_flags flags, bool blocking, const resource::vector &origin, const resource::vector ®ion) : - pctx(q.pipe) { + pctx(q.pipe), pres(NULL) { unsigned usage = ((flags & CL_MAP_WRITE ? PIPE_TRANSFER_WRITE : 0 ) | (flags & CL_MAP_READ ? PIPE_TRANSFER_READ : 0 ) | (flags & CL_MAP_WRITE_INVALIDATE_REGION ? @@ -200,12 +203,14 @@ pxfer = NULL; throw error(CL_OUT_OF_RESOURCES); } + pipe_resource_reference(&pres, r.pipe); } mapping::mapping(mapping &&m) : - pctx(m.pctx), pxfer(m.pxfer), p(m.p) { + pctx(m.pctx), pxfer(m.pxfer), pres(m.pres), p(m.p) { m.pctx = NULL; m.pxfer = NULL; + m.pres = NULL; m.p = NULL; } @@ -213,12 +218,14 @@ if (pxfer) { pctx->transfer_unmap(pctx, pxfer); } + pipe_resource_reference(&pres, NULL); } mapping & mapping::operator=(mapping m) { std::swap(pctx, m.pctx); std::swap(pxfer, m.pxfer); + std::swap(pres, m.pres); std::swap(p, m.p); return *this; } diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/core/resource.hpp mesa-17.0.7/src/gallium/state_trackers/clover/core/resource.hpp --- mesa-12.0.6/src/gallium/state_trackers/clover/core/resource.hpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/core/resource.hpp 2017-06-01 10:37:10.000000000 +0000 @@ -125,6 +125,7 @@ private: pipe_context *pctx; pipe_transfer *pxfer; + pipe_resource *pres; void *p; }; } diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/llvm/codegen/bitcode.cpp mesa-17.0.7/src/gallium/state_trackers/clover/llvm/codegen/bitcode.cpp --- mesa-12.0.6/src/gallium/state_trackers/clover/llvm/codegen/bitcode.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/llvm/codegen/bitcode.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,108 @@ +// +// Copyright 2012-2016 Francisco Jerez +// Copyright 2012-2016 Advanced Micro Devices, Inc. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included in +// all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +// THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR +// OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// + +/// +/// \file +/// Trivial codegen back-end that simply passes through the existing LLVM IR +/// and either formats it so it can be consumed by pipe drivers (if +/// build_module_bitcode() is used) or serializes so it can be deserialized at +/// a later point and passed to the actual codegen back-end (if +/// build_module_library() / parse_module_library() is used), potentially +/// after linking against other bitcode object files. +/// + +#include "llvm/codegen.hpp" +#include "llvm/compat.hpp" +#include "llvm/metadata.hpp" +#include "core/error.hpp" +#include "util/algorithm.hpp" + +#include +#if HAVE_LLVM < 0x0400 +#include +#else +#include +#include +#endif +#include + +using namespace clover; +using namespace clover::llvm; + +namespace { + std::map + get_symbol_offsets(const ::llvm::Module &mod) { + std::map offsets; + unsigned i = 0; + + for (const auto &name : map(std::mem_fn(&::llvm::Function::getName), + get_kernels(mod))) + offsets[name] = i++; + + return offsets; + } + + std::vector + emit_code(const ::llvm::Module &mod) { + ::llvm::SmallVector data; + ::llvm::raw_svector_ostream os { data }; + WriteBitcodeToFile(&mod, os); + return { os.str().begin(), os.str().end() }; + } +} + +module +clover::llvm::build_module_bitcode(const ::llvm::Module &mod, + const clang::CompilerInstance &c) { + return build_module_common(mod, emit_code(mod), get_symbol_offsets(mod), c); +} + +std::string +clover::llvm::print_module_bitcode(const ::llvm::Module &mod) { + std::string s; + ::llvm::raw_string_ostream os { s }; + mod.print(os, NULL); + return os.str(); +} + +module +clover::llvm::build_module_library(const ::llvm::Module &mod, + enum module::section::type section_type) { + module m; + const auto code = emit_code(mod); + m.secs.emplace_back(0, section_type, code.size(), code); + return m; +} + +std::unique_ptr< ::llvm::Module> +clover::llvm::parse_module_library(const module &m, ::llvm::LLVMContext &ctx, + std::string &r_log) { + auto mod = ::llvm::parseBitcodeFile(::llvm::MemoryBufferRef( + as_string(m.secs[0].data), " "), ctx); + + compat::handle_module_error(mod, [&](const std::string &s) { + fail(r_log, error(CL_INVALID_PROGRAM), s); + }); + + return std::unique_ptr< ::llvm::Module>(std::move(*mod)); +} diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/llvm/codegen/common.cpp mesa-17.0.7/src/gallium/state_trackers/clover/llvm/codegen/common.cpp --- mesa-12.0.6/src/gallium/state_trackers/clover/llvm/codegen/common.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/llvm/codegen/common.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,210 @@ +// +// Copyright 2012-2016 Francisco Jerez +// Copyright 2012-2016 Advanced Micro Devices, Inc. +// Copyright 2015 Zoltan Gilian +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included in +// all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +// THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR +// OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// + +/// +/// \file +/// Codegen back-end-independent part of the construction of an executable +/// clover::module, including kernel argument metadata extraction and +/// formatting of the pre-generated binary code in a form that can be +/// understood by pipe drivers. +/// + +#include "llvm/codegen.hpp" +#include "llvm/metadata.hpp" + +#include "CL/cl.h" + +#include "pipe/p_state.h" +#include "util/u_math.h" + +#include + +using namespace clover; +using namespace clover::llvm; + +using ::llvm::Module; +using ::llvm::Function; +using ::llvm::Type; +using ::llvm::isa; +using ::llvm::cast; +using ::llvm::dyn_cast; + +namespace { + enum module::argument::type + get_image_type(const std::string &type, + const std::string &qual) { + if (type == "image2d_t" && qual == "read_only") + return module::argument::image2d_rd; + else if (type == "image2d_t" && qual == "write_only") + return module::argument::image2d_wr; + else if (type == "image3d_t" && qual == "read_only") + return module::argument::image3d_rd; + else if (type == "image3d_t" && qual == "write_only") + return module::argument::image3d_wr; + else + unreachable("Unknown image type"); + } + + std::vector + make_kernel_args(const Module &mod, const std::string &kernel_name, + const clang::CompilerInstance &c) { + std::vector args; + const auto address_spaces = c.getTarget().getAddressSpaceMap(); + const Function &f = *mod.getFunction(kernel_name); + ::llvm::DataLayout dl(&mod); + const auto size_type = + dl.getSmallestLegalIntType(mod.getContext(), sizeof(cl_uint) * 8); + + for (const auto &arg : f.args()) { + const auto arg_type = arg.getType(); + + // OpenCL 1.2 specification, Ch. 6.1.5: "A built-in data + // type that is not a power of two bytes in size must be + // aligned to the next larger power of two. + // This rule applies to built-in types only, not structs or unions." + const unsigned arg_store_size = dl.getTypeStoreSize(arg_type); + const unsigned arg_api_size = dl.getTypeAllocSize(arg_type); + + const auto target_type = !arg_type->isIntegerTy() ? arg_type : + dl.getSmallestLegalIntType(mod.getContext(), arg_store_size * 8); + const unsigned target_size = dl.getTypeStoreSize(target_type); + const unsigned target_align = dl.getABITypeAlignment(target_type); + + const auto type_name = get_argument_metadata(f, arg, + "kernel_arg_type"); + + if (type_name == "image2d_t" || type_name == "image3d_t") { + // Image. + const auto access_qual = get_argument_metadata( + f, arg, "kernel_arg_access_qual"); + args.emplace_back(get_image_type(type_name, access_qual), + arg_store_size, target_size, + target_align, module::argument::zero_ext); + + } else if (type_name == "__llvm_image_size") { + // Image size implicit argument. + args.emplace_back(module::argument::scalar, sizeof(cl_uint), + dl.getTypeStoreSize(size_type), + dl.getABITypeAlignment(size_type), + module::argument::zero_ext, + module::argument::image_size); + + } else if (type_name == "__llvm_image_format") { + // Image format implicit argument. + args.emplace_back(module::argument::scalar, sizeof(cl_uint), + dl.getTypeStoreSize(size_type), + dl.getABITypeAlignment(size_type), + module::argument::zero_ext, + module::argument::image_format); + + } else { + // Other types. + const auto actual_type = + isa< ::llvm::PointerType>(arg_type) && arg.hasByValAttr() ? + cast< ::llvm::PointerType>(arg_type)->getElementType() : arg_type; + + if (actual_type->isPointerTy()) { + const unsigned address_space = + cast< ::llvm::PointerType>(actual_type)->getAddressSpace(); + + if (address_space == address_spaces[clang::LangAS::opencl_local + - clang::LangAS::Offset]) { + args.emplace_back(module::argument::local, arg_api_size, + target_size, target_align, + module::argument::zero_ext); + } else { + // XXX: Correctly handle constant address space. There is no + // way for r600g to pass a handle for constant buffers back + // to clover like it can for global buffers, so + // creating constant arguments will break r600g. For now, + // continue treating constant buffers as global buffers + // until we can come up with a way to create handles for + // constant buffers. + args.emplace_back(module::argument::global, arg_api_size, + target_size, target_align, + module::argument::zero_ext); + } + + } else { + const bool needs_sign_ext = f.getAttributes().hasAttribute( + arg.getArgNo() + 1, ::llvm::Attribute::SExt); + + args.emplace_back(module::argument::scalar, arg_api_size, + target_size, target_align, + (needs_sign_ext ? module::argument::sign_ext : + module::argument::zero_ext)); + } + } + } + + // Append implicit arguments. XXX - The types, ordering and + // vector size of the implicit arguments should depend on the + // target according to the selected calling convention. + args.emplace_back(module::argument::scalar, sizeof(cl_uint), + dl.getTypeStoreSize(size_type), + dl.getABITypeAlignment(size_type), + module::argument::zero_ext, + module::argument::grid_dimension); + + args.emplace_back(module::argument::scalar, sizeof(cl_uint), + dl.getTypeStoreSize(size_type), + dl.getABITypeAlignment(size_type), + module::argument::zero_ext, + module::argument::grid_offset); + + return args; + } + + module::section + make_text_section(const std::vector &code) { + const pipe_llvm_program_header header { uint32_t(code.size()) }; + module::section text { 0, module::section::text_executable, + header.num_bytes, {} }; + + text.data.insert(text.data.end(), reinterpret_cast(&header), + reinterpret_cast(&header) + sizeof(header)); + text.data.insert(text.data.end(), code.begin(), code.end()); + + return text; + } +} + +module +clover::llvm::build_module_common(const Module &mod, + const std::vector &code, + const std::map &offsets, + const clang::CompilerInstance &c) { + module m; + + for (const auto &name : map(std::mem_fn(&Function::getName), + get_kernels(mod))) { + if (offsets.count(name)) + m.syms.emplace_back(name, 0, offsets.at(name), + make_kernel_args(mod, name, c)); + } + + m.secs.push_back(make_text_section(code)); + return m; +} diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/llvm/codegen/native.cpp mesa-17.0.7/src/gallium/state_trackers/clover/llvm/codegen/native.cpp --- mesa-12.0.6/src/gallium/state_trackers/clover/llvm/codegen/native.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/llvm/codegen/native.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,165 @@ +// +// Copyright 2012-2016 Francisco Jerez +// Copyright 2012-2016 Advanced Micro Devices, Inc. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included in +// all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +// THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR +// OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// + +/// +/// \file +/// Generate code using an arbitrary LLVM back-end capable of emitting +/// executable code as an ELF object file. +/// + +#include "llvm/codegen.hpp" +#include "llvm/compat.hpp" +#include "llvm/util.hpp" +#include "core/error.hpp" + +#include +#include +#include + +#include +#include + +using namespace clover; +using namespace clover::llvm; +using ::llvm::TargetMachine; + +namespace { + namespace elf { + std::unique_ptr + get(const std::vector &code) { + // One of the libelf implementations + // (http://www.mr511.de/software/english.htm) requires calling + // elf_version() before elf_memory(). + elf_version(EV_CURRENT); + return { elf_memory(const_cast(code.data()), code.size()), + elf_end }; + } + + Elf_Scn * + get_symbol_table(Elf *elf) { + size_t section_str_index; + elf_getshdrstrndx(elf, §ion_str_index); + + for (Elf_Scn *s = elf_nextscn(elf, NULL); s; s = elf_nextscn(elf, s)) { + GElf_Shdr header; + if (gelf_getshdr(s, &header) != &header) + return nullptr; + + if (!std::strcmp(elf_strptr(elf, section_str_index, header.sh_name), + ".symtab")) + return s; + } + + return nullptr; + } + + std::map + get_symbol_offsets(Elf *elf, Elf_Scn *symtab) { + Elf_Data *const symtab_data = elf_getdata(symtab, NULL); + GElf_Shdr header; + if (gelf_getshdr(symtab, &header) != &header) + return {}; + + std::map symbol_offsets; + GElf_Sym symbol; + unsigned i = 0; + + while (GElf_Sym *s = gelf_getsym(symtab_data, i++, &symbol)) { + const char *name = elf_strptr(elf, header.sh_link, s->st_name); + symbol_offsets[name] = s->st_value; + } + + return symbol_offsets; + } + } + + std::map + get_symbol_offsets(const std::vector &code, std::string &r_log) { + const auto elf = elf::get(code); + const auto symtab = elf::get_symbol_table(elf.get()); + if (!symtab) + fail(r_log, build_error(), "Unable to find symbol table."); + + return elf::get_symbol_offsets(elf.get(), symtab); + } + + std::vector + emit_code(::llvm::Module &mod, const target &target, + TargetMachine::CodeGenFileType ft, + std::string &r_log) { + std::string err; + auto t = ::llvm::TargetRegistry::lookupTarget(target.triple, err); + if (!t) + fail(r_log, build_error(), err); + + std::unique_ptr tm { + t->createTargetMachine(target.triple, target.cpu, "", {}, + compat::default_reloc_model, + ::llvm::CodeModel::Default, + ::llvm::CodeGenOpt::Default) }; + if (!tm) + fail(r_log, build_error(), + "Could not create TargetMachine: " + target.triple); + + ::llvm::SmallVector data; + + { + compat::pass_manager pm; + ::llvm::raw_svector_ostream os { data }; + compat::raw_ostream_to_emit_file fos(os); + + mod.setDataLayout(compat::get_data_layout(*tm)); + tm->Options.MCOptions.AsmVerbose = + (ft == TargetMachine::CGFT_AssemblyFile); + + if (tm->addPassesToEmitFile(pm, fos, ft)) + fail(r_log, build_error(), "TargetMachine can't emit this file"); + + pm.run(mod); + } + + return { data.begin(), data.end() }; + } +} + +module +clover::llvm::build_module_native(::llvm::Module &mod, const target &target, + const clang::CompilerInstance &c, + std::string &r_log) { + const auto code = emit_code(mod, target, + TargetMachine::CGFT_ObjectFile, r_log); + return build_module_common(mod, code, get_symbol_offsets(code, r_log), c); +} + +std::string +clover::llvm::print_module_native(const ::llvm::Module &mod, + const target &target) { + std::string log; + try { + std::unique_ptr< ::llvm::Module> cmod { CloneModule(&mod) }; + return as_string(emit_code(*cmod, target, + TargetMachine::CGFT_AssemblyFile, log)); + } catch (...) { + return "Couldn't output native disassembly: " + log; + } +} diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/llvm/codegen.hpp mesa-17.0.7/src/gallium/state_trackers/clover/llvm/codegen.hpp --- mesa-12.0.6/src/gallium/state_trackers/clover/llvm/codegen.hpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/llvm/codegen.hpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,72 @@ +// +// Copyright 2016 Francisco Jerez +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included in +// all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +// THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR +// OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// + +/// +/// \file +/// Tools to generate various forms of binary code from existing LLVM IR in +/// the given llvm::Module object and output the result as a clover::module. +/// + +#ifndef CLOVER_LLVM_CODEGEN_HPP +#define CLOVER_LLVM_CODEGEN_HPP + +#include "llvm/util.hpp" +#include "core/module.hpp" + +#include + +#include + +namespace clover { + namespace llvm { + module + build_module_bitcode(const ::llvm::Module &mod, + const clang::CompilerInstance &c); + + std::string + print_module_bitcode(const ::llvm::Module &mod); + + module + build_module_library(const ::llvm::Module &mod, + enum module::section::type section_type); + + std::unique_ptr< ::llvm::Module> + parse_module_library(const module &m, ::llvm::LLVMContext &ctx, + std::string &r_log); + + module + build_module_native(::llvm::Module &mod, const target &target, + const clang::CompilerInstance &c, + std::string &r_log); + + std::string + print_module_native(const ::llvm::Module &mod, const target &target); + + module + build_module_common(const ::llvm::Module &mod, + const std::vector &code, + const std::map &offsets, + const clang::CompilerInstance &c); + } +} + +#endif diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/llvm/compat.hpp mesa-17.0.7/src/gallium/state_trackers/clover/llvm/compat.hpp --- mesa-12.0.6/src/gallium/state_trackers/clover/llvm/compat.hpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/llvm/compat.hpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,183 @@ +// +// Copyright 2016 Francisco Jerez +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included in +// all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +// THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR +// OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// + +/// +/// \file +/// Some thin wrappers around the Clang/LLVM API used to preserve +/// compatibility with older API versions while keeping the ifdef clutter low +/// in the rest of the clover::llvm subtree. In case of an API break please +/// consider whether it's possible to preserve backwards compatibility by +/// introducing a new one-liner inline function or typedef here under the +/// compat namespace in order to keep the running code free from preprocessor +/// conditionals. +/// + +#ifndef CLOVER_LLVM_COMPAT_HPP +#define CLOVER_LLVM_COMPAT_HPP + +#include "util/algorithm.hpp" + +#include +#include +#include +#if HAVE_LLVM >= 0x0400 +#include +#else +#include +#endif + +#if HAVE_LLVM >= 0x0307 +#include +#include +#else +#include +#include +#include +#include +#endif + +#include +#include + +namespace clover { + namespace llvm { + namespace compat { +#if HAVE_LLVM >= 0x0307 + typedef ::llvm::TargetLibraryInfoImpl target_library_info; +#else + typedef ::llvm::TargetLibraryInfo target_library_info; +#endif + + inline void + set_lang_defaults(clang::CompilerInvocation &inv, + clang::LangOptions &lopts, clang::InputKind ik, + const ::llvm::Triple &t, + clang::PreprocessorOptions &ppopts, + clang::LangStandard::Kind std) { +#if HAVE_LLVM >= 0x0309 + inv.setLangDefaults(lopts, ik, t, ppopts, std); +#else + inv.setLangDefaults(lopts, ik, std); +#endif + } + + inline void + add_link_bitcode_file(clang::CodeGenOptions &opts, + const std::string &path) { +#if HAVE_LLVM >= 0x0308 + opts.LinkBitcodeFiles.emplace_back(::llvm::Linker::Flags::None, path); +#else + opts.LinkBitcodeFile = path; +#endif + } + +#if HAVE_LLVM >= 0x0307 + typedef ::llvm::legacy::PassManager pass_manager; +#else + typedef ::llvm::PassManager pass_manager; +#endif + + inline void + add_data_layout_pass(pass_manager &pm) { +#if HAVE_LLVM < 0x0307 + pm.add(new ::llvm::DataLayoutPass()); +#endif + } + + inline void + add_internalize_pass(pass_manager &pm, + const std::vector &names) { +#if HAVE_LLVM >= 0x0309 + pm.add(::llvm::createInternalizePass( + [=](const ::llvm::GlobalValue &gv) { + return std::find(names.begin(), names.end(), + gv.getName()) != names.end(); + })); +#else + pm.add(::llvm::createInternalizePass(std::vector( + map(std::mem_fn(&std::string::data), names)))); +#endif + } + + inline std::unique_ptr< ::llvm::Linker> + create_linker(::llvm::Module &mod) { +#if HAVE_LLVM >= 0x0308 + return std::unique_ptr< ::llvm::Linker>(new ::llvm::Linker(mod)); +#else + return std::unique_ptr< ::llvm::Linker>(new ::llvm::Linker(&mod)); +#endif + } + + inline bool + link_in_module(::llvm::Linker &linker, + std::unique_ptr< ::llvm::Module> mod) { +#if HAVE_LLVM >= 0x0308 + return linker.linkInModule(std::move(mod)); +#else + return linker.linkInModule(mod.get()); +#endif + } + +#if HAVE_LLVM >= 0x0307 + typedef ::llvm::raw_svector_ostream &raw_ostream_to_emit_file; +#else + typedef ::llvm::formatted_raw_ostream raw_ostream_to_emit_file; +#endif + +#if HAVE_LLVM >= 0x0307 + typedef ::llvm::DataLayout data_layout; +#else + typedef const ::llvm::DataLayout *data_layout; +#endif + + inline data_layout + get_data_layout(::llvm::TargetMachine &tm) { +#if HAVE_LLVM >= 0x0307 + return tm.createDataLayout(); +#else + return tm.getSubtargetImpl()->getDataLayout(); +#endif + } + +#if HAVE_LLVM >= 0x0309 + const auto default_reloc_model = ::llvm::None; +#else + const auto default_reloc_model = ::llvm::Reloc::Default; +#endif + + template void + handle_module_error(M &mod, const F &f) { +#if HAVE_LLVM >= 0x0400 + if (::llvm::Error err = mod.takeError()) + ::llvm::handleAllErrors(std::move(err), [&](::llvm::ErrorInfoBase &eib) { + f(eib.message()); + }); +#else + if (!mod) + f(mod.getError().message()); +#endif + } + } + } +} + +#endif diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/llvm/invocation.cpp mesa-17.0.7/src/gallium/state_trackers/clover/llvm/invocation.cpp --- mesa-12.0.6/src/gallium/state_trackers/clover/llvm/invocation.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/llvm/invocation.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -1,5 +1,9 @@ // -// Copyright 2012 Francisco Jerez +// Copyright 2012-2016 Francisco Jerez +// Copyright 2012-2016 Advanced Micro Devices, Inc. +// Copyright 2014-2016 Jan Vesely +// Copyright 2014-2015 Serge Martin +// Copyright 2015 Zoltan Gilian // // Permission is hereby granted, free of charge, to any person obtaining a // copy of this software and associated documentation files (the "Software"), @@ -20,166 +24,127 @@ // OTHER DEALINGS IN THE SOFTWARE. // -#include "core/compiler.hpp" - -#include -#include -#include -#include -#include -#include -#include -#include -#include #include -#include +#include #include -#include -#include -#include -#if HAVE_LLVM >= 0x0307 -#include -#else -#include -#endif -#include -#include -#include -#include -#include -#include +#include #include -#include +#include +#include +#include +#include +#include +#include -#include -#if HAVE_LLVM >= 0x0307 -#include -#else -#include -#endif -#include -#include +// We need to include internal headers last, because the internal headers +// include CL headers which have #define's like: +// +//#define cl_khr_gl_sharing 1 +//#define cl_khr_icd 1 +// +// Which will break the compilation of clang/Basic/OpenCLOptions.h -#include -#include -#include +#include "core/error.hpp" +#include "llvm/codegen.hpp" +#include "llvm/compat.hpp" +#include "llvm/invocation.hpp" +#include "llvm/metadata.hpp" +#include "llvm/util.hpp" +#include "util/algorithm.hpp" -#include "pipe/p_state.h" -#include "util/u_memory.h" -#include "util/u_math.h" - -#include -#include -#include -#include -#include -#include -#include using namespace clover; +using namespace clover::llvm; + +using ::llvm::Function; +using ::llvm::LLVMContext; +using ::llvm::Module; +using ::llvm::raw_string_ostream; namespace { -#if 0 void - build_binary(const std::string &source, const std::string &target, - const std::string &name) { - clang::CompilerInstance c; - clang::EmitObjAction act(&llvm::getGlobalContext()); - std::string log; - llvm::raw_string_ostream s_log(log); - - LLVMInitializeTGSITarget(); - LLVMInitializeTGSITargetInfo(); - LLVMInitializeTGSITargetMC(); - LLVMInitializeTGSIAsmPrinter(); - - c.getFrontendOpts().Inputs.push_back( - std::make_pair(clang::IK_OpenCL, name)); - c.getHeaderSearchOpts().UseBuiltinIncludes = false; - c.getHeaderSearchOpts().UseStandardIncludes = false; - c.getLangOpts().NoBuiltin = true; - c.getTargetOpts().Triple = target; - c.getInvocation().setLangDefaults(clang::IK_OpenCL); - c.createDiagnostics(0, NULL, new clang::TextDiagnosticPrinter( - s_log, c.getDiagnosticOpts())); - - c.getPreprocessorOpts().addRemappedFile( - name, llvm::MemoryBuffer::getMemBuffer(source)); - - if (!c.ExecuteAction(act)) - throw compile_error(log); + init_targets() { + static bool targets_initialized = false; + if (!targets_initialized) { + LLVMInitializeAllTargets(); + LLVMInitializeAllTargetInfos(); + LLVMInitializeAllTargetMCs(); + LLVMInitializeAllAsmPrinters(); + targets_initialized = true; + } } - module - load_binary(const char *name) { - std::ifstream fs((name)); - std::vector str((std::istreambuf_iterator(fs)), - (std::istreambuf_iterator())); - compat::istream cs(str); - return module::deserialize(cs); - } -#endif - void debug_log(const std::string &msg, const std::string &suffix) { - const char *dbg_file = debug_get_option("CLOVER_DEBUG_FILE", "stderr"); - if (!strcmp("stderr", dbg_file)) { - std::cerr << msg; - } else { - std::ofstream file(dbg_file + suffix, std::ios::app); - file << msg; - } + void + diagnostic_handler(const ::llvm::DiagnosticInfo &di, void *data) { + if (di.getSeverity() == ::llvm::DS_Error) { + raw_string_ostream os { *reinterpret_cast(data) }; + ::llvm::DiagnosticPrinterRawOStream printer { os }; + di.print(printer); + throw build_error(); + } } - llvm::Module * - compile_llvm(llvm::LLVMContext &llvm_ctx, const std::string &source, - const header_map &headers, - const std::string &name, const std::string &triple, - const std::string &processor, const std::string &opts, - clang::LangAS::Map& address_spaces, unsigned &optimization_level, - std::string &r_log) { - - clang::CompilerInstance c; - clang::EmitLLVMOnlyAction act(&llvm_ctx); - std::string log; - llvm::raw_string_ostream s_log(log); - std::string libclc_path = LIBCLC_LIBEXECDIR + processor + "-" - + triple + ".bc"; - - // Parse the compiler options: - std::vector opts_array; - std::istringstream ss(opts); - - while (!ss.eof()) { - std::string opt; - getline(ss, opt, ' '); - opts_array.push_back(opt); - } + std::unique_ptr + create_context(std::string &r_log) { + init_targets(); + std::unique_ptr ctx { new LLVMContext }; + ctx->setDiagnosticHandler(diagnostic_handler, &r_log); + return ctx; + } + + std::unique_ptr + create_compiler_instance(const target &target, + const std::vector &opts, + std::string &r_log) { + std::unique_ptr c { new clang::CompilerInstance }; + clang::TextDiagnosticBuffer *diag_buffer = new clang::TextDiagnosticBuffer; + clang::DiagnosticsEngine diag { new clang::DiagnosticIDs, + new clang::DiagnosticOptions, diag_buffer }; + + // Parse the compiler options. A file name should be present at the end + // and must have the .cl extension in order for the CompilerInvocation + // class to recognize it as an OpenCL source file. + const std::vector copts = + map(std::mem_fn(&std::string::c_str), opts); + + if (!clang::CompilerInvocation::CreateFromArgs( + c->getInvocation(), copts.data(), copts.data() + copts.size(), diag)) + throw invalid_build_options_error(); + + diag_buffer->FlushDiagnostics(diag); + if (diag.hasErrorOccurred()) + throw invalid_build_options_error(); + + c->getTargetOpts().CPU = target.cpu; + c->getTargetOpts().Triple = target.triple; + c->getLangOpts().NoBuiltin = true; - opts_array.push_back(name); + // This is a workaround for a Clang bug which causes the number + // of warnings and errors to be printed to stderr. + // http://www.llvm.org/bugs/show_bug.cgi?id=19735 + c->getDiagnosticOpts().ShowCarets = false; - std::vector opts_carray; - for (unsigned i = 0; i < opts_array.size(); i++) { - opts_carray.push_back(opts_array.at(i).c_str()); - } + compat::set_lang_defaults(c->getInvocation(), c->getLangOpts(), + clang::IK_OpenCL, ::llvm::Triple(target.triple), + c->getPreprocessorOpts(), + clang::LangStandard::lang_opencl11); - llvm::IntrusiveRefCntPtr DiagID; - llvm::IntrusiveRefCntPtr DiagOpts; - clang::TextDiagnosticBuffer *DiagsBuffer; - - DiagID = new clang::DiagnosticIDs(); - DiagOpts = new clang::DiagnosticOptions(); - DiagsBuffer = new clang::TextDiagnosticBuffer(); - - clang::DiagnosticsEngine Diags(DiagID, &*DiagOpts, DiagsBuffer); - bool Success; - - Success = clang::CompilerInvocation::CreateFromArgs(c.getInvocation(), - opts_carray.data(), - opts_carray.data() + opts_carray.size(), - Diags); - if (!Success) { - throw error(CL_INVALID_COMPILER_OPTIONS); - } + c->createDiagnostics(new clang::TextDiagnosticPrinter( + *new raw_string_ostream(r_log), + &c->getDiagnosticOpts(), true)); + + c->setTarget(clang::TargetInfo::CreateTargetInfo( + c->getDiagnostics(), c->getInvocation().TargetOpts)); + + return c; + } + + std::unique_ptr + compile(LLVMContext &ctx, clang::CompilerInstance &c, + const std::string &name, const std::string &source, + const header_map &headers, const std::string &target, + const std::string &opts, std::string &r_log) { c.getFrontendOpts().ProgramAction = clang::frontend::EmitLLVMOnly; c.getHeaderSearchOpts().UseBuiltinIncludes = true; c.getHeaderSearchOpts().UseStandardSystemIncludes = true; @@ -188,131 +153,80 @@ // Add libclc generic search path c.getHeaderSearchOpts().AddPath(LIBCLC_INCLUDEDIR, clang::frontend::Angled, - false, false - ); + false, false); // Add libclc include c.getPreprocessorOpts().Includes.push_back("clc/clc.h"); + // Add definition for the OpenCL version + c.getPreprocessorOpts().addMacroDef("__OPENCL_VERSION__=110"); + // clc.h requires that this macro be defined: c.getPreprocessorOpts().addMacroDef("cl_clang_storage_class_specifiers"); - - c.getLangOpts().NoBuiltin = true; - c.getTargetOpts().Triple = triple; - c.getTargetOpts().CPU = processor; - - // This is a workaround for a Clang bug which causes the number - // of warnings and errors to be printed to stderr. - // http://www.llvm.org/bugs/show_bug.cgi?id=19735 - c.getDiagnosticOpts().ShowCarets = false; - c.getInvocation().setLangDefaults(c.getLangOpts(), clang::IK_OpenCL, -#if HAVE_LLVM >= 0x0309 - llvm::Triple(triple), c.getPreprocessorOpts(), -#endif - clang::LangStandard::lang_opencl11); - c.createDiagnostics( - new clang::TextDiagnosticPrinter( - s_log, - &c.getDiagnosticOpts())); - -#if HAVE_LLVM >= 0x0306 - c.getPreprocessorOpts().addRemappedFile(name, - llvm::MemoryBuffer::getMemBuffer(source).release()); -#else - c.getPreprocessorOpts().addRemappedFile(name, - llvm::MemoryBuffer::getMemBuffer(source)); -#endif + c.getPreprocessorOpts().addRemappedFile( + name, ::llvm::MemoryBuffer::getMemBuffer(source).release()); if (headers.size()) { const std::string tmp_header_path = "/tmp/clover/"; c.getHeaderSearchOpts().AddPath(tmp_header_path, clang::frontend::Angled, - false, false - ); + false, false); - for (header_map::const_iterator it = headers.begin(); - it != headers.end(); ++it) { - const std::string path = tmp_header_path + std::string(it->first); - c.getPreprocessorOpts().addRemappedFile(path, -#if HAVE_LLVM >= 0x0306 - llvm::MemoryBuffer::getMemBuffer(it->second.c_str()).release()); -#else - llvm::MemoryBuffer::getMemBuffer(it->second.c_str())); -#endif - } - } - - // Setting this attribute tells clang to link this file before - // performing any optimizations. This is required so that - // we can replace calls to the OpenCL C barrier() builtin - // with calls to target intrinsics that have the noduplicate - // attribute. This attribute will prevent Clang from creating - // illegal uses of barrier() (e.g. Moving barrier() inside a conditional - // that is no executed by all threads) during its optimizaton passes. -#if HAVE_LLVM >= 0x0308 - c.getCodeGenOpts().LinkBitcodeFiles.emplace_back(llvm::Linker::Flags::None, - libclc_path); -#else - c.getCodeGenOpts().LinkBitcodeFile = libclc_path; -#endif - optimization_level = c.getCodeGenOpts().OptimizationLevel; + for (const auto &header : headers) + c.getPreprocessorOpts().addRemappedFile( + tmp_header_path + header.first, + ::llvm::MemoryBuffer::getMemBuffer(header.second).release()); + } + + // Tell clang to link this file before performing any + // optimizations. This is required so that we can replace calls + // to the OpenCL C barrier() builtin with calls to target + // intrinsics that have the noduplicate attribute. This + // attribute will prevent Clang from creating illegal uses of + // barrier() (e.g. Moving barrier() inside a conditional that is + // no executed by all threads) during its optimizaton passes. + compat::add_link_bitcode_file(c.getCodeGenOpts(), + LIBCLC_LIBEXECDIR + target + ".bc"); // Compile the code - bool ExecSuccess = c.ExecuteAction(act); - r_log = log; - - if (!ExecSuccess) - throw compile_error(); + clang::EmitLLVMOnlyAction act(&ctx); + if (!c.ExecuteAction(act)) + throw build_error(); - // Get address spaces map to be able to find kernel argument address space - memcpy(address_spaces, c.getTarget().getAddressSpaceMap(), - sizeof(address_spaces)); - -#if HAVE_LLVM >= 0x0306 - return act.takeModule().release(); -#else return act.takeModule(); -#endif } +} - std::vector - find_kernels(const llvm::Module *mod) { - const llvm::NamedMDNode *kernel_node = - mod->getNamedMetadata("opencl.kernels"); - // This means there are no kernels in the program. The spec does not - // require that we return an error here, but there will be an error if - // the user tries to pass this program to a clCreateKernel() call. - if (!kernel_node) { - return std::vector(); - } +module +clover::llvm::compile_program(const std::string &source, + const header_map &headers, + const std::string &target, + const std::string &opts, + std::string &r_log) { + if (has_flag(debug::clc)) + debug::log(".cl", "// Options: " + opts + '\n' + source); + + auto ctx = create_context(r_log); + auto c = create_compiler_instance(target, tokenize(opts + " input.cl"), + r_log); + auto mod = compile(*ctx, *c, "input.cl", source, headers, target, opts, + r_log); - std::vector kernels; - kernels.reserve(kernel_node->getNumOperands()); - for (unsigned i = 0; i < kernel_node->getNumOperands(); ++i) { -#if HAVE_LLVM >= 0x0306 - kernels.push_back(llvm::mdconst::dyn_extract( -#else - kernels.push_back(llvm::dyn_cast( -#endif - kernel_node->getOperand(i)->getOperand(0))); - } - return kernels; - } + if (has_flag(debug::llvm)) + debug::log(".ll", print_module_bitcode(*mod)); - void - optimize(llvm::Module *mod, unsigned optimization_level) { + return build_module_library(*mod, module::section::text_intermediate); +} -#if HAVE_LLVM >= 0x0307 - llvm::legacy::PassManager PM; -#else - llvm::PassManager PM; -#endif +namespace { + void + optimize(Module &mod, unsigned optimization_level, + bool internalize_symbols) { + compat::pass_manager pm; - const std::vector kernels = find_kernels(mod); + compat::add_data_layout_pass(pm); - // Add a function internalizer pass. - // // By default, the function internalizer pass will look for a function // called "main" and then mark all other functions as internal. Marking // functions as internal enables the optimizer to perform optimizations @@ -325,595 +239,64 @@ // list of kernel functions to the internalizer. The internalizer will // treat the functions in the list as "main" functions and internalize // all of the other functions. -#if HAVE_LLVM >= 0x0309 - auto preserve_kernels = [=](const llvm::GlobalValue &GV) { - for (const auto &kernel : kernels) { - if (GV.getName() == kernel->getName()) - return true; - } - return false; - }; -#else - std::vector export_list; - for (std::vector::const_iterator I = kernels.begin(), - E = kernels.end(); - I != E; ++I) { - llvm::Function *kernel = *I; - export_list.push_back(kernel->getName().data()); - } -#endif -#if HAVE_LLVM < 0x0306 - PM.add(new llvm::DataLayoutPass(mod)); -#elif HAVE_LLVM < 0x0307 - PM.add(new llvm::DataLayoutPass()); -#endif -#if HAVE_LLVM >= 0x0309 - PM.add(llvm::createInternalizePass(preserve_kernels)); -#else - PM.add(llvm::createInternalizePass(export_list)); -#endif - - llvm::PassManagerBuilder PMB; - PMB.OptLevel = optimization_level; -#if HAVE_LLVM < 0x0307 - PMB.LibraryInfo = new llvm::TargetLibraryInfo( -#else - PMB.LibraryInfo = new llvm::TargetLibraryInfoImpl( -#endif - llvm::Triple(mod->getTargetTriple())); - PMB.populateModulePassManager(PM); - PM.run(*mod); - } - - // Kernel metadata - - struct kernel_arg_md { - llvm::StringRef type_name; - llvm::StringRef access_qual; - kernel_arg_md(llvm::StringRef type_name_, llvm::StringRef access_qual_): - type_name(type_name_), access_qual(access_qual_) {} - }; - -#if HAVE_LLVM >= 0x0306 - - const llvm::MDNode * - get_kernel_metadata(const llvm::Function *kernel_func) { - auto mod = kernel_func->getParent(); - auto kernels_node = mod->getNamedMetadata("opencl.kernels"); - if (!kernels_node) { - return nullptr; - } - - const llvm::MDNode *kernel_node = nullptr; - for (unsigned i = 0; i < kernels_node->getNumOperands(); ++i) { - auto func = llvm::mdconst::dyn_extract( - kernels_node->getOperand(i)->getOperand(0)); - if (func == kernel_func) { - kernel_node = kernels_node->getOperand(i); - break; - } - } - - return kernel_node; - } - - llvm::MDNode* - node_from_op_checked(const llvm::MDOperand &md_operand, - llvm::StringRef expect_name, - unsigned expect_num_args) - { - auto node = llvm::cast(md_operand); - assert(node->getNumOperands() == expect_num_args && - "Wrong number of operands."); - - auto str_node = llvm::cast(node->getOperand(0)); - assert(str_node->getString() == expect_name && - "Wrong metadata node name."); - - return node; - } - - std::vector - get_kernel_arg_md(const llvm::Function *kernel_func) { - auto num_args = kernel_func->getArgumentList().size(); - - auto kernel_node = get_kernel_metadata(kernel_func); - auto aq = node_from_op_checked(kernel_node->getOperand(2), - "kernel_arg_access_qual", num_args + 1); - auto ty = node_from_op_checked(kernel_node->getOperand(3), - "kernel_arg_type", num_args + 1); - - std::vector res; - res.reserve(num_args); - for (unsigned i = 0; i < num_args; ++i) { - res.push_back(kernel_arg_md( - llvm::cast(ty->getOperand(i+1))->getString(), - llvm::cast(aq->getOperand(i+1))->getString())); - } - - return res; - } - -#else - - std::vector - get_kernel_arg_md(const llvm::Function *kernel_func) { - return std::vector( - kernel_func->getArgumentList().size(), - kernel_arg_md("", "")); - } - -#endif // HAVE_LLVM >= 0x0306 - - std::vector - get_kernel_args(const llvm::Module *mod, const std::string &kernel_name, - const clang::LangAS::Map &address_spaces) { - - std::vector args; - llvm::Function *kernel_func = mod->getFunction(kernel_name); - assert(kernel_func && "Kernel name not found in module."); - auto arg_md = get_kernel_arg_md(kernel_func); - - llvm::DataLayout TD(mod); - llvm::Type *size_type = - TD.getSmallestLegalIntType(mod->getContext(), sizeof(cl_uint) * 8); - - for (const auto &arg: kernel_func->args()) { - - llvm::Type *arg_type = arg.getType(); - const unsigned arg_store_size = TD.getTypeStoreSize(arg_type); - - // OpenCL 1.2 specification, Ch. 6.1.5: "A built-in data - // type that is not a power of two bytes in size must be - // aligned to the next larger power of two". We need this - // alignment for three element vectors, which have - // non-power-of-2 store size. - const unsigned arg_api_size = util_next_power_of_two(arg_store_size); - - llvm::Type *target_type = arg_type->isIntegerTy() ? - TD.getSmallestLegalIntType(mod->getContext(), arg_store_size * 8) - : arg_type; - unsigned target_size = TD.getTypeStoreSize(target_type); - unsigned target_align = TD.getABITypeAlignment(target_type); - - llvm::StringRef type_name = arg_md[arg.getArgNo()].type_name; - llvm::StringRef access_qual = arg_md[arg.getArgNo()].access_qual; - - // Image - const bool is_image2d = type_name == "image2d_t"; - const bool is_image3d = type_name == "image3d_t"; - if (is_image2d || is_image3d) { - const bool is_write_only = access_qual == "write_only"; - const bool is_read_only = access_qual == "read_only"; - - enum module::argument::type marg_type; - if (is_image2d && is_read_only) { - marg_type = module::argument::image2d_rd; - } else if (is_image2d && is_write_only) { - marg_type = module::argument::image2d_wr; - } else if (is_image3d && is_read_only) { - marg_type = module::argument::image3d_rd; - } else if (is_image3d && is_write_only) { - marg_type = module::argument::image3d_wr; - } else { - assert(0 && "Wrong image access qualifier"); - } - - args.push_back(module::argument(marg_type, - arg_store_size, target_size, - target_align, - module::argument::zero_ext)); - continue; - } - - // Image size implicit argument - if (type_name == "__llvm_image_size") { - args.push_back(module::argument(module::argument::scalar, - sizeof(cl_uint), - TD.getTypeStoreSize(size_type), - TD.getABITypeAlignment(size_type), - module::argument::zero_ext, - module::argument::image_size)); - continue; - } - - // Image format implicit argument - if (type_name == "__llvm_image_format") { - args.push_back(module::argument(module::argument::scalar, - sizeof(cl_uint), - TD.getTypeStoreSize(size_type), - TD.getABITypeAlignment(size_type), - module::argument::zero_ext, - module::argument::image_format)); - continue; - } - - // Other types - if (llvm::isa(arg_type) && arg.hasByValAttr()) { - arg_type = - llvm::dyn_cast(arg_type)->getElementType(); - } - - if (arg_type->isPointerTy()) { - unsigned address_space = llvm::cast(arg_type)->getAddressSpace(); - if (address_space == address_spaces[clang::LangAS::opencl_local - - clang::LangAS::Offset]) { - args.push_back(module::argument(module::argument::local, - arg_api_size, target_size, - target_align, - module::argument::zero_ext)); - } else { - // XXX: Correctly handle constant address space. There is no - // way for r600g to pass a handle for constant buffers back - // to clover like it can for global buffers, so - // creating constant arguments will break r600g. For now, - // continue treating constant buffers as global buffers - // until we can come up with a way to create handles for - // constant buffers. - args.push_back(module::argument(module::argument::global, - arg_api_size, target_size, - target_align, - module::argument::zero_ext)); - } - - } else { - llvm::AttributeSet attrs = kernel_func->getAttributes(); - enum module::argument::ext_type ext_type = - (attrs.hasAttribute(arg.getArgNo() + 1, - llvm::Attribute::SExt) ? - module::argument::sign_ext : - module::argument::zero_ext); - - args.push_back( - module::argument(module::argument::scalar, arg_api_size, - target_size, target_align, ext_type)); - } - } - - // Append implicit arguments. XXX - The types, ordering and - // vector size of the implicit arguments should depend on the - // target according to the selected calling convention. - args.push_back( - module::argument(module::argument::scalar, sizeof(cl_uint), - TD.getTypeStoreSize(size_type), - TD.getABITypeAlignment(size_type), - module::argument::zero_ext, - module::argument::grid_dimension)); - - args.push_back( - module::argument(module::argument::scalar, sizeof(cl_uint), - TD.getTypeStoreSize(size_type), - TD.getABITypeAlignment(size_type), - module::argument::zero_ext, - module::argument::grid_offset)); - - return args; - } - - module - build_module_llvm(llvm::Module *mod, - clang::LangAS::Map& address_spaces) { - - module m; - struct pipe_llvm_program_header header; - - llvm::SmallVector llvm_bitcode; - llvm::raw_svector_ostream bitcode_ostream(llvm_bitcode); - llvm::BitstreamWriter writer(llvm_bitcode); - llvm::WriteBitcodeToFile(mod, bitcode_ostream); -#if HAVE_LLVM < 0x0308 - bitcode_ostream.flush(); -#endif - - const std::vector kernels = find_kernels(mod); - for (unsigned i = 0; i < kernels.size(); ++i) { - std::string kernel_name = kernels[i]->getName(); - std::vector args = - get_kernel_args(mod, kernel_name, address_spaces); - - m.syms.push_back(module::symbol(kernel_name, 0, i, args )); - } - - header.num_bytes = llvm_bitcode.size(); - std::vector data; - data.insert(data.end(), (char*)(&header), - (char*)(&header) + sizeof(header)); - data.insert(data.end(), llvm_bitcode.begin(), - llvm_bitcode.end()); - m.secs.push_back(module::section(0, module::section::text, - header.num_bytes, data)); - - return m; - } - - void - emit_code(LLVMTargetMachineRef tm, LLVMModuleRef mod, - LLVMCodeGenFileType file_type, - LLVMMemoryBufferRef *out_buffer, - std::string &r_log) { - LLVMBool err; - char *err_message = NULL; - - err = LLVMTargetMachineEmitToMemoryBuffer(tm, mod, file_type, - &err_message, out_buffer); - - if (err) { - r_log = std::string(err_message); + if (internalize_symbols) + compat::add_internalize_pass(pm, map(std::mem_fn(&Function::getName), + get_kernels(mod))); + + ::llvm::PassManagerBuilder pmb; + pmb.OptLevel = optimization_level; + pmb.LibraryInfo = new compat::target_library_info( + ::llvm::Triple(mod.getTargetTriple())); + pmb.populateModulePassManager(pm); + pm.run(mod); + } + + std::unique_ptr + link(LLVMContext &ctx, const clang::CompilerInstance &c, + const std::vector &modules, std::string &r_log) { + std::unique_ptr mod { new Module("link", ctx) }; + auto linker = compat::create_linker(*mod); + + for (auto &m : modules) { + if (compat::link_in_module(*linker, + parse_module_library(m, ctx, r_log))) + throw build_error(); } - LLVMDisposeMessage(err_message); - - if (err) { - throw compile_error(); - } + return std::move(mod); } +} - std::vector - compile_native(const llvm::Module *mod, const std::string &triple, - const std::string &processor, unsigned dump_asm, - std::string &r_log) { - - std::string log; - LLVMTargetRef target; - char *error_message; - LLVMMemoryBufferRef out_buffer; - unsigned buffer_size; - const char *buffer_data; - LLVMModuleRef mod_ref = wrap(mod); - - if (LLVMGetTargetFromTriple(triple.c_str(), &target, &error_message)) { - r_log = std::string(error_message); - LLVMDisposeMessage(error_message); - throw compile_error(); - } - - LLVMTargetMachineRef tm = LLVMCreateTargetMachine( - target, triple.c_str(), processor.c_str(), "", - LLVMCodeGenLevelDefault, LLVMRelocDefault, LLVMCodeModelDefault); - - if (!tm) { - r_log = "Could not create TargetMachine: " + triple; - throw compile_error(); - } - - if (dump_asm) { - LLVMSetTargetMachineAsmVerbosity(tm, true); -#if HAVE_LLVM >= 0x0308 - LLVMModuleRef debug_mod = wrap(llvm::CloneModule(mod).release()); -#else - LLVMModuleRef debug_mod = wrap(llvm::CloneModule(mod)); -#endif - emit_code(tm, debug_mod, LLVMAssemblyFile, &out_buffer, r_log); - buffer_size = LLVMGetBufferSize(out_buffer); - buffer_data = LLVMGetBufferStart(out_buffer); - debug_log(std::string(buffer_data, buffer_size), ".asm"); - - LLVMSetTargetMachineAsmVerbosity(tm, false); - LLVMDisposeMemoryBuffer(out_buffer); - LLVMDisposeModule(debug_mod); - } - - emit_code(tm, mod_ref, LLVMObjectFile, &out_buffer, r_log); - - buffer_size = LLVMGetBufferSize(out_buffer); - buffer_data = LLVMGetBufferStart(out_buffer); - - std::vector code(buffer_data, buffer_data + buffer_size); - - LLVMDisposeMemoryBuffer(out_buffer); - LLVMDisposeTargetMachine(tm); - - return code; - } +module +clover::llvm::link_program(const std::vector &modules, + enum pipe_shader_ir ir, const std::string &target, + const std::string &opts, std::string &r_log) { + std::vector options = tokenize(opts + " input.cl"); + const bool create_library = count("-create-library", options); + erase_if(equals("-create-library"), options); - std::map - get_kernel_offsets(std::vector &code, - const std::vector &kernels, - std::string &r_log) { - - // One of the libelf implementations - // (http://www.mr511.de/software/english.htm) requires calling - // elf_version() before elf_memory(). - // - elf_version(EV_CURRENT); + auto ctx = create_context(r_log); + auto c = create_compiler_instance(target, options, r_log); + auto mod = link(*ctx, *c, modules, r_log); - Elf *elf = elf_memory(&code[0], code.size()); - size_t section_str_index; - elf_getshdrstrndx(elf, §ion_str_index); - Elf_Scn *section = NULL; - Elf_Scn *symtab = NULL; - GElf_Shdr symtab_header; - - // Find the symbol table - try { - while ((section = elf_nextscn(elf, section))) { - const char *name; - if (gelf_getshdr(section, &symtab_header) != &symtab_header) { - r_log = "Failed to read ELF section header."; - throw compile_error(); - } - name = elf_strptr(elf, section_str_index, symtab_header.sh_name); - if (!strcmp(name, ".symtab")) { - symtab = section; - break; - } - } - if (!symtab) { - r_log = "Unable to find symbol table."; - throw compile_error(); - } - } catch (compile_error &e) { - elf_end(elf); - throw e; - } + optimize(*mod, c->getCodeGenOpts().OptimizationLevel, !create_library); + if (has_flag(debug::llvm)) + debug::log(".ll", print_module_bitcode(*mod)); - // Extract symbol information from the table - Elf_Data *symtab_data = NULL; - GElf_Sym *symbol; - GElf_Sym s; - - std::map kernel_offsets; - symtab_data = elf_getdata(symtab, symtab_data); - - // Determine the offsets for each kernel - for (int i = 0; (symbol = gelf_getsym(symtab_data, i, &s)); i++) { - char *name = elf_strptr(elf, symtab_header.sh_link, symbol->st_name); - for (std::vector::const_iterator it = kernels.begin(), - e = kernels.end(); it != e; ++it) { - llvm::Function *f = *it; - if (f->getName() == std::string(name)) - kernel_offsets[f->getName()] = symbol->st_value; - } - } - elf_end(elf); - return kernel_offsets; - } + if (create_library) { + return build_module_library(*mod, module::section::text_library); - module - build_module_native(std::vector &code, - const llvm::Module *mod, - const clang::LangAS::Map &address_spaces, - std::string &r_log) { - - const std::vector kernels = find_kernels(mod); - - std::map kernel_offsets = - get_kernel_offsets(code, kernels, r_log); - - // Begin building the clover module - module m; - struct pipe_llvm_program_header header; - - // Store the generated ELF binary in the module's text section. - header.num_bytes = code.size(); - std::vector data; - data.insert(data.end(), (char*)(&header), - (char*)(&header) + sizeof(header)); - data.insert(data.end(), code.begin(), code.end()); - m.secs.push_back(module::section(0, module::section::text, - header.num_bytes, data)); - - for (std::map::iterator i = kernel_offsets.begin(), - e = kernel_offsets.end(); i != e; ++i) { - std::vector args = - get_kernel_args(mod, i->first, address_spaces); - m.syms.push_back(module::symbol(i->first, 0, i->second, args )); - } + } else if (ir == PIPE_SHADER_IR_LLVM) { + return build_module_bitcode(*mod, *c); - return m; - } + } else if (ir == PIPE_SHADER_IR_NATIVE) { + if (has_flag(debug::native)) + debug::log(".asm", print_module_native(*mod, target)); - void - diagnostic_handler(const llvm::DiagnosticInfo &di, void *data) { - if (di.getSeverity() == llvm::DS_Error) { - std::string message = *(std::string*)data; - llvm::raw_string_ostream stream(message); - llvm::DiagnosticPrinterRawOStream dp(stream); - di.print(dp); - stream.flush(); - *(std::string*)data = message; + return build_module_native(*mod, target, *c, r_log); - throw compile_error(); - } + } else { + unreachable("Unsupported IR."); } - - void - init_targets() { - static bool targets_initialized = false; - if (!targets_initialized) { - LLVMInitializeAllTargets(); - LLVMInitializeAllTargetInfos(); - LLVMInitializeAllTargetMCs(); - LLVMInitializeAllAsmPrinters(); - targets_initialized = true; - } - } - -#define DBG_CLC (1 << 0) -#define DBG_LLVM (1 << 1) -#define DBG_ASM (1 << 2) - - unsigned - get_debug_flags() { - static const struct debug_named_value debug_options[] = { - {"clc", DBG_CLC, "Dump the OpenCL C code for all kernels."}, - {"llvm", DBG_LLVM, "Dump the generated LLVM IR for all kernels."}, - {"asm", DBG_ASM, "Dump kernel assembly code for targets specifying " - "PIPE_SHADER_IR_NATIVE"}, - DEBUG_NAMED_VALUE_END // must be last - }; - static const unsigned debug_flags = - debug_get_flags_option("CLOVER_DEBUG", debug_options, 0); - - return debug_flags; - } - -} // End anonymous namespace - -module -clover::compile_program_llvm(const std::string &source, - const header_map &headers, - enum pipe_shader_ir ir, - const std::string &target, - const std::string &opts, - std::string &r_log) { - - init_targets(); - - size_t processor_str_len = std::string(target).find_first_of("-"); - std::string processor(target, 0, processor_str_len); - std::string triple(target, processor_str_len + 1, - target.size() - processor_str_len - 1); - clang::LangAS::Map address_spaces; - llvm::LLVMContext llvm_ctx; - unsigned optimization_level; - - llvm_ctx.setDiagnosticHandler(diagnostic_handler, &r_log); - - if (get_debug_flags() & DBG_CLC) - debug_log("// Build options: " + opts + '\n' + source, ".cl"); - - // The input file name must have the .cl extension in order for the - // CompilerInvocation class to recognize it as an OpenCL source file. - llvm::Module *mod = compile_llvm(llvm_ctx, source, headers, "input.cl", - triple, processor, opts, address_spaces, - optimization_level, r_log); - - optimize(mod, optimization_level); - - if (get_debug_flags() & DBG_LLVM) { - std::string log; - llvm::raw_string_ostream s_log(log); - mod->print(s_log, NULL); - s_log.flush(); - debug_log(log, ".ll"); - } - - module m; - // Build the clover::module - switch (ir) { - case PIPE_SHADER_IR_NIR: - case PIPE_SHADER_IR_TGSI: - //XXX: Handle TGSI, NIR - assert(0); - m = module(); - break; - case PIPE_SHADER_IR_LLVM: - m = build_module_llvm(mod, address_spaces); - break; - case PIPE_SHADER_IR_NATIVE: { - std::vector code = compile_native(mod, triple, processor, - get_debug_flags() & DBG_ASM, - r_log); - m = build_module_native(code, mod, address_spaces, r_log); - break; - } - } -#if HAVE_LLVM >= 0x0306 - // LLVM 3.6 and newer, the user takes ownership of the module. - delete mod; -#endif - - return m; } diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/llvm/invocation.hpp mesa-17.0.7/src/gallium/state_trackers/clover/llvm/invocation.hpp --- mesa-12.0.6/src/gallium/state_trackers/clover/llvm/invocation.hpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/llvm/invocation.hpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,47 @@ +// +// Copyright 2016 Francisco Jerez +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included in +// all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +// THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR +// OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// + +#ifndef CLOVER_LLVM_INVOCATION_HPP +#define CLOVER_LLVM_INVOCATION_HPP + +#include "core/error.hpp" +#include "core/module.hpp" +#include "core/program.hpp" +#include "pipe/p_defines.h" + +namespace clover { + namespace llvm { + module compile_program(const std::string &source, + const header_map &headers, + const std::string &target, + const std::string &opts, + std::string &r_log); + + module link_program(const std::vector &modules, + enum pipe_shader_ir ir, + const std::string &target, + const std::string &opts, + std::string &r_log); + } +} + +#endif diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/llvm/metadata.hpp mesa-17.0.7/src/gallium/state_trackers/clover/llvm/metadata.hpp --- mesa-12.0.6/src/gallium/state_trackers/clover/llvm/metadata.hpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/llvm/metadata.hpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,132 @@ +// +// Copyright 2016 Francisco Jerez +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included in +// all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +// THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR +// OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// + +/// +/// \file +/// Utility functions for LLVM IR metadata introspection. +/// + +#ifndef CLOVER_LLVM_METADATA_HPP +#define CLOVER_LLVM_METADATA_HPP + +#include "llvm/compat.hpp" +#include "util/algorithm.hpp" + +#include +#include +#include + +namespace clover { + namespace llvm { + namespace detail { + inline std::vector + get_kernel_nodes(const ::llvm::Module &mod) { + if (const ::llvm::NamedMDNode *n = + mod.getNamedMetadata("opencl.kernels")) + return { n->op_begin(), n->op_end() }; + else + return {}; + } + + inline std::function + is_kernel_node_for(const ::llvm::Function &f) { + return [&](const ::llvm::MDNode *n) { + using ::llvm::mdconst::dyn_extract; + return &f == dyn_extract< ::llvm::Function>(n->getOperand(0)); + }; + } + + inline bool + is_kernel(const ::llvm::Function &f) { +#if HAVE_LLVM >= 0x0309 + return f.getMetadata("kernel_arg_type"); +#else + return clover::any_of(is_kernel_node_for(f), + get_kernel_nodes(*f.getParent())); +#endif + } + + inline iterator_range< ::llvm::MDNode::op_iterator> + get_kernel_metadata_operands(const ::llvm::Function &f, + const std::string &name) { +#if HAVE_LLVM >= 0x0309 + // On LLVM v3.9+ kernel argument attributes are stored as + // function metadata. + const auto data_node = f.getMetadata(name); + return range(data_node->op_begin(), data_node->op_end()); +#else + using ::llvm::cast; + using ::llvm::dyn_cast; + const auto kernel_node = find(is_kernel_node_for(f), + get_kernel_nodes(*f.getParent())); + + const auto data_node = cast< ::llvm::MDNode>( + find([&](const ::llvm::MDOperand &op) { + if (auto m = dyn_cast< ::llvm::MDNode>(op)) + if (m->getNumOperands()) + if (auto m_name = dyn_cast< ::llvm::MDString>( + m->getOperand(0).get())) + return m_name->getString() == name; + + return false; + }, + kernel_node->operands())); + + // Skip the first operand node which is just the metadata + // attribute name. + return range(data_node->op_begin() + 1, data_node->op_end()); +#endif + } + } + + /// + /// Extract the string metadata node \p name corresponding to the kernel + /// argument given by \p arg. + /// + inline std::string + get_argument_metadata(const ::llvm::Function &f, + const ::llvm::Argument &arg, + const std::string &name) { + return ::llvm::cast< ::llvm::MDString>( + detail::get_kernel_metadata_operands(f, name)[arg.getArgNo()]) + ->getString(); + } + + /// + /// Return a vector with all CL kernel functions found in the LLVM + /// module \p mod. + /// + inline std::vector + get_kernels(const ::llvm::Module &mod) { + std::vector fs; + + for (auto &f : mod.getFunctionList()) { + if (detail::is_kernel(f)) + fs.push_back(&f); + } + + return fs; + } + } +} + +#endif diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/llvm/util.hpp mesa-17.0.7/src/gallium/state_trackers/clover/llvm/util.hpp --- mesa-12.0.6/src/gallium/state_trackers/clover/llvm/util.hpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/llvm/util.hpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,135 @@ +// +// Copyright 2012-2016 Francisco Jerez +// Copyright 2012-2016 Advanced Micro Devices, Inc. +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included in +// all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +// THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR +// OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// + +#ifndef CLOVER_LLVM_UTIL_HPP +#define CLOVER_LLVM_UTIL_HPP + +#include "core/error.hpp" +#include "util/u_debug.h" + +#include +#include +#include +#include + +namespace clover { + namespace llvm { + template void + fail(std::string &r_log, E &&e, const std::string &s) { + r_log += s; + throw e; + } + + inline std::vector + tokenize(const std::string &s) { + std::vector ss; + std::ostringstream oss; + + // OpenCL programs can pass a quoted argument, most frequently the + // include path. This is useful so that path containing spaces is + // treated as a single argument instead of being split by the spaces. + // Additionally, the argument should also be unquoted before being + // passed to the compiler. We avoid using std::string::replace here to + // remove quotes, as the single and double quote characters can be a + // part of the file name. + bool escape_next = false; + bool in_quote_double = false; + bool in_quote_single = false; + + for (auto c : s) { + if (escape_next) { + oss.put(c); + escape_next = false; + } else if (c == '\\') { + escape_next = true; + } else if (c == '"' && !in_quote_single) { + in_quote_double = !in_quote_double; + } else if (c == '\'' && !in_quote_double) { + in_quote_single = !in_quote_single; + } else if (c != ' ' || in_quote_single || in_quote_double) { + oss.put(c); + } else if (oss.tellp() > 0) { + ss.emplace_back(oss.str()); + oss.str(""); + } + } + + if (oss.tellp() > 0) + ss.emplace_back(oss.str()); + + if (in_quote_double || in_quote_single) + throw invalid_build_options_error(); + + return ss; + } + + inline std::string + as_string(const std::vector &v) { + return { v.begin(), v.end() }; + } + + struct target { + target(const std::string &s) : + cpu(s.begin(), s.begin() + s.find_first_of("-")), + triple(s.begin() + s.find_first_of("-") + 1, s.end()) {} + + std::string cpu; + std::string triple; + }; + + namespace debug { + enum flag { + clc = 1 << 0, + llvm = 1 << 1, + native = 1 << 2 + }; + + inline bool + has_flag(flag f) { + static const struct debug_named_value debug_options[] = { + { "clc", clc, "Dump the OpenCL C code for all kernels." }, + { "llvm", llvm, "Dump the generated LLVM IR for all kernels." }, + { "native", native, "Dump kernel assembly code for targets " + "specifying PIPE_SHADER_IR_NATIVE" }, + DEBUG_NAMED_VALUE_END + }; + static const unsigned flags = + debug_get_flags_option("CLOVER_DEBUG", debug_options, 0); + + return flags & f; + } + + inline void + log(const std::string &suffix, const std::string &s) { + const std::string path = debug_get_option("CLOVER_DEBUG_FILE", + "stderr"); + if (path == "stderr") + std::cerr << s; + else + std::ofstream(path + suffix, std::ios::app) << s; + } + } + } +} + +#endif diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/Makefile.am mesa-17.0.7/src/gallium/state_trackers/clover/Makefile.am --- mesa-12.0.6/src/gallium/state_trackers/clover/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -2,12 +2,12 @@ AM_CPPFLAGS = \ -I$(top_srcdir)/include \ + -I$(top_builddir)/src \ -I$(top_srcdir)/src \ -I$(top_srcdir)/src/gallium/include \ -I$(top_srcdir)/src/gallium/drivers \ -I$(top_srcdir)/src/gallium/auxiliary \ -I$(top_srcdir)/src/gallium/winsys \ - -I$(top_builddir)/src \ -I$(srcdir) if HAVE_CLOVER_ICD @@ -33,6 +33,7 @@ libcltgsi_la_CXXFLAGS = \ -std=c++11 \ + $(CLOVER_STD_OVERRIDE) \ $(VISIBILITY_CXXFLAGS) libcltgsi_la_SOURCES = $(TGSI_SOURCES) @@ -41,6 +42,7 @@ -std=c++11 \ $(VISIBILITY_CXXFLAGS) \ $(LLVM_CXXFLAGS) \ + $(CLOVER_STD_OVERRIDE) \ $(DEFINES) \ $(LIBELF_CFLAGS) \ -DLIBCLC_INCLUDEDIR=\"$(LIBCLC_INCLUDEDIR)/\" \ @@ -51,6 +53,7 @@ libclover_la_CXXFLAGS = \ -std=c++11 \ + $(CLOVER_STD_OVERRIDE) \ $(VISIBILITY_CXXFLAGS) libclover_la_LIBADD = \ diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/Makefile.in mesa-17.0.7/src/gallium/state_trackers/clover/Makefile.in --- mesa-12.0.6/src/gallium/state_trackers/clover/Makefile.in 2017-01-24 01:41:48.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/Makefile.in 2017-06-01 10:37:21.000000000 +0000 @@ -113,7 +113,10 @@ LTLIBRARIES = $(noinst_LTLIBRARIES) libclllvm_la_LIBADD = am__dirstamp = $(am__leading_dot)dirstamp -am__objects_1 = llvm/libclllvm_la-invocation.lo +am__objects_1 = llvm/codegen/libclllvm_la-bitcode.lo \ + llvm/codegen/libclllvm_la-common.lo \ + llvm/codegen/libclllvm_la-native.lo \ + llvm/libclllvm_la-invocation.lo am_libclllvm_la_OBJECTS = $(am__objects_1) libclllvm_la_OBJECTS = $(am_libclllvm_la_OBJECTS) AM_V_lt = $(am__v_lt_@AM_V@) @@ -277,6 +280,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -291,6 +296,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -320,10 +326,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -373,11 +380,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -417,8 +421,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -455,8 +457,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -465,7 +465,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -473,13 +472,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -508,6 +508,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -585,7 +586,6 @@ api/sampler.cpp \ api/transfer.cpp \ api/util.hpp \ - core/compiler.hpp \ core/context.cpp \ core/context.hpp \ core/device.cpp \ @@ -626,17 +626,25 @@ util/tuple.hpp LLVM_SOURCES := \ - llvm/invocation.cpp + llvm/codegen/bitcode.cpp \ + llvm/codegen/common.cpp \ + llvm/codegen/native.cpp \ + llvm/codegen.hpp \ + llvm/compat.hpp \ + llvm/invocation.cpp \ + llvm/invocation.hpp \ + llvm/metadata.hpp \ + llvm/util.hpp TGSI_SOURCES := \ - tgsi/compiler.cpp + tgsi/compiler.cpp \ + tgsi/invocation.hpp -AM_CPPFLAGS = -I$(top_srcdir)/include -I$(top_srcdir)/src \ - -I$(top_srcdir)/src/gallium/include \ +AM_CPPFLAGS = -I$(top_srcdir)/include -I$(top_builddir)/src \ + -I$(top_srcdir)/src -I$(top_srcdir)/src/gallium/include \ -I$(top_srcdir)/src/gallium/drivers \ -I$(top_srcdir)/src/gallium/auxiliary \ - -I$(top_srcdir)/src/gallium/winsys -I$(top_builddir)/src \ - -I$(srcdir) $(am__append_1) + -I$(top_srcdir)/src/gallium/winsys -I$(srcdir) $(am__append_1) # Only install the headers if we are building a stand-alone implementation @HAVE_CLOVER_ICD_FALSE@cldir = $(includedir)/CL @HAVE_CLOVER_ICD_FALSE@cl_HEADERS = \ @@ -655,6 +663,7 @@ noinst_LTLIBRARIES = libclover.la libcltgsi.la libclllvm.la libcltgsi_la_CXXFLAGS = \ -std=c++11 \ + $(CLOVER_STD_OVERRIDE) \ $(VISIBILITY_CXXFLAGS) libcltgsi_la_SOURCES = $(TGSI_SOURCES) @@ -662,6 +671,7 @@ -std=c++11 \ $(VISIBILITY_CXXFLAGS) \ $(LLVM_CXXFLAGS) \ + $(CLOVER_STD_OVERRIDE) \ $(DEFINES) \ $(LIBELF_CFLAGS) \ -DLIBCLC_INCLUDEDIR=\"$(LIBCLC_INCLUDEDIR)/\" \ @@ -671,6 +681,7 @@ libclllvm_la_SOURCES = $(LLVM_SOURCES) libclover_la_CXXFLAGS = \ -std=c++11 \ + $(CLOVER_STD_OVERRIDE) \ $(VISIBILITY_CXXFLAGS) libclover_la_LIBADD = \ @@ -723,6 +734,18 @@ echo rm -f $${locs}; \ rm -f $${locs}; \ } +llvm/codegen/$(am__dirstamp): + @$(MKDIR_P) llvm/codegen + @: > llvm/codegen/$(am__dirstamp) +llvm/codegen/$(DEPDIR)/$(am__dirstamp): + @$(MKDIR_P) llvm/codegen/$(DEPDIR) + @: > llvm/codegen/$(DEPDIR)/$(am__dirstamp) +llvm/codegen/libclllvm_la-bitcode.lo: llvm/codegen/$(am__dirstamp) \ + llvm/codegen/$(DEPDIR)/$(am__dirstamp) +llvm/codegen/libclllvm_la-common.lo: llvm/codegen/$(am__dirstamp) \ + llvm/codegen/$(DEPDIR)/$(am__dirstamp) +llvm/codegen/libclllvm_la-native.lo: llvm/codegen/$(am__dirstamp) \ + llvm/codegen/$(DEPDIR)/$(am__dirstamp) llvm/$(am__dirstamp): @$(MKDIR_P) llvm @: > llvm/$(am__dirstamp) @@ -819,6 +842,8 @@ -rm -f core/*.lo -rm -f llvm/*.$(OBJEXT) -rm -f llvm/*.lo + -rm -f llvm/codegen/*.$(OBJEXT) + -rm -f llvm/codegen/*.lo -rm -f tgsi/*.$(OBJEXT) -rm -f tgsi/*.lo @@ -851,6 +876,9 @@ @AMDEP_TRUE@@am__include@ @am__quote@core/$(DEPDIR)/libclover_la-sampler.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@core/$(DEPDIR)/libclover_la-timestamp.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@llvm/$(DEPDIR)/libclllvm_la-invocation.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@llvm/codegen/$(DEPDIR)/libclllvm_la-bitcode.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@llvm/codegen/$(DEPDIR)/libclllvm_la-common.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@llvm/codegen/$(DEPDIR)/libclllvm_la-native.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@tgsi/$(DEPDIR)/libcltgsi_la-compiler.Plo@am__quote@ .cpp.o: @@ -877,6 +905,27 @@ @AMDEP_TRUE@@am__fastdepCXX_FALSE@ DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCXX_FALSE@ $(AM_V_CXX@am__nodep@)$(LTCXXCOMPILE) -c -o $@ $< +llvm/codegen/libclllvm_la-bitcode.lo: llvm/codegen/bitcode.cpp +@am__fastdepCXX_TRUE@ $(AM_V_CXX)$(LIBTOOL) $(AM_V_lt) --tag=CXX $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libclllvm_la_CXXFLAGS) $(CXXFLAGS) -MT llvm/codegen/libclllvm_la-bitcode.lo -MD -MP -MF llvm/codegen/$(DEPDIR)/libclllvm_la-bitcode.Tpo -c -o llvm/codegen/libclllvm_la-bitcode.lo `test -f 'llvm/codegen/bitcode.cpp' || echo '$(srcdir)/'`llvm/codegen/bitcode.cpp +@am__fastdepCXX_TRUE@ $(AM_V_at)$(am__mv) llvm/codegen/$(DEPDIR)/libclllvm_la-bitcode.Tpo llvm/codegen/$(DEPDIR)/libclllvm_la-bitcode.Plo +@AMDEP_TRUE@@am__fastdepCXX_FALSE@ $(AM_V_CXX)source='llvm/codegen/bitcode.cpp' object='llvm/codegen/libclllvm_la-bitcode.lo' libtool=yes @AMDEPBACKSLASH@ +@AMDEP_TRUE@@am__fastdepCXX_FALSE@ DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCXX_FALSE@ $(AM_V_CXX@am__nodep@)$(LIBTOOL) $(AM_V_lt) --tag=CXX $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libclllvm_la_CXXFLAGS) $(CXXFLAGS) -c -o llvm/codegen/libclllvm_la-bitcode.lo `test -f 'llvm/codegen/bitcode.cpp' || echo '$(srcdir)/'`llvm/codegen/bitcode.cpp + +llvm/codegen/libclllvm_la-common.lo: llvm/codegen/common.cpp +@am__fastdepCXX_TRUE@ $(AM_V_CXX)$(LIBTOOL) $(AM_V_lt) --tag=CXX $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libclllvm_la_CXXFLAGS) $(CXXFLAGS) -MT llvm/codegen/libclllvm_la-common.lo -MD -MP -MF llvm/codegen/$(DEPDIR)/libclllvm_la-common.Tpo -c -o llvm/codegen/libclllvm_la-common.lo `test -f 'llvm/codegen/common.cpp' || echo '$(srcdir)/'`llvm/codegen/common.cpp +@am__fastdepCXX_TRUE@ $(AM_V_at)$(am__mv) llvm/codegen/$(DEPDIR)/libclllvm_la-common.Tpo llvm/codegen/$(DEPDIR)/libclllvm_la-common.Plo +@AMDEP_TRUE@@am__fastdepCXX_FALSE@ $(AM_V_CXX)source='llvm/codegen/common.cpp' object='llvm/codegen/libclllvm_la-common.lo' libtool=yes @AMDEPBACKSLASH@ +@AMDEP_TRUE@@am__fastdepCXX_FALSE@ DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCXX_FALSE@ $(AM_V_CXX@am__nodep@)$(LIBTOOL) $(AM_V_lt) --tag=CXX $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libclllvm_la_CXXFLAGS) $(CXXFLAGS) -c -o llvm/codegen/libclllvm_la-common.lo `test -f 'llvm/codegen/common.cpp' || echo '$(srcdir)/'`llvm/codegen/common.cpp + +llvm/codegen/libclllvm_la-native.lo: llvm/codegen/native.cpp +@am__fastdepCXX_TRUE@ $(AM_V_CXX)$(LIBTOOL) $(AM_V_lt) --tag=CXX $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libclllvm_la_CXXFLAGS) $(CXXFLAGS) -MT llvm/codegen/libclllvm_la-native.lo -MD -MP -MF llvm/codegen/$(DEPDIR)/libclllvm_la-native.Tpo -c -o llvm/codegen/libclllvm_la-native.lo `test -f 'llvm/codegen/native.cpp' || echo '$(srcdir)/'`llvm/codegen/native.cpp +@am__fastdepCXX_TRUE@ $(AM_V_at)$(am__mv) llvm/codegen/$(DEPDIR)/libclllvm_la-native.Tpo llvm/codegen/$(DEPDIR)/libclllvm_la-native.Plo +@AMDEP_TRUE@@am__fastdepCXX_FALSE@ $(AM_V_CXX)source='llvm/codegen/native.cpp' object='llvm/codegen/libclllvm_la-native.lo' libtool=yes @AMDEPBACKSLASH@ +@AMDEP_TRUE@@am__fastdepCXX_FALSE@ DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCXX_FALSE@ $(AM_V_CXX@am__nodep@)$(LIBTOOL) $(AM_V_lt) --tag=CXX $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libclllvm_la_CXXFLAGS) $(CXXFLAGS) -c -o llvm/codegen/libclllvm_la-native.lo `test -f 'llvm/codegen/native.cpp' || echo '$(srcdir)/'`llvm/codegen/native.cpp + llvm/libclllvm_la-invocation.lo: llvm/invocation.cpp @am__fastdepCXX_TRUE@ $(AM_V_CXX)$(LIBTOOL) $(AM_V_lt) --tag=CXX $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libclllvm_la_CXXFLAGS) $(CXXFLAGS) -MT llvm/libclllvm_la-invocation.lo -MD -MP -MF llvm/$(DEPDIR)/libclllvm_la-invocation.Tpo -c -o llvm/libclllvm_la-invocation.lo `test -f 'llvm/invocation.cpp' || echo '$(srcdir)/'`llvm/invocation.cpp @am__fastdepCXX_TRUE@ $(AM_V_at)$(am__mv) llvm/$(DEPDIR)/libclllvm_la-invocation.Tpo llvm/$(DEPDIR)/libclllvm_la-invocation.Plo @@ -1074,6 +1123,7 @@ -rm -rf api/.libs api/_libs -rm -rf core/.libs core/_libs -rm -rf llvm/.libs llvm/_libs + -rm -rf llvm/codegen/.libs llvm/codegen/_libs -rm -rf tgsi/.libs tgsi/_libs install-clHEADERS: $(cl_HEADERS) @$(NORMAL_INSTALL) @@ -1218,6 +1268,8 @@ -rm -f core/$(am__dirstamp) -rm -f llvm/$(DEPDIR)/$(am__dirstamp) -rm -f llvm/$(am__dirstamp) + -rm -f llvm/codegen/$(DEPDIR)/$(am__dirstamp) + -rm -f llvm/codegen/$(am__dirstamp) -rm -f tgsi/$(DEPDIR)/$(am__dirstamp) -rm -f tgsi/$(am__dirstamp) @@ -1230,7 +1282,7 @@ mostlyclean-am distclean: distclean-am - -rm -rf api/$(DEPDIR) core/$(DEPDIR) llvm/$(DEPDIR) tgsi/$(DEPDIR) + -rm -rf api/$(DEPDIR) core/$(DEPDIR) llvm/$(DEPDIR) llvm/codegen/$(DEPDIR) tgsi/$(DEPDIR) -rm -f Makefile distclean-am: clean-am distclean-compile distclean-generic \ distclean-tags @@ -1276,7 +1328,7 @@ installcheck-am: maintainer-clean: maintainer-clean-am - -rm -rf api/$(DEPDIR) core/$(DEPDIR) llvm/$(DEPDIR) tgsi/$(DEPDIR) + -rm -rf api/$(DEPDIR) core/$(DEPDIR) llvm/$(DEPDIR) llvm/codegen/$(DEPDIR) tgsi/$(DEPDIR) -rm -f Makefile maintainer-clean-am: distclean-am maintainer-clean-generic diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/Makefile.sources mesa-17.0.7/src/gallium/state_trackers/clover/Makefile.sources --- mesa-12.0.6/src/gallium/state_trackers/clover/Makefile.sources 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/Makefile.sources 2017-06-01 10:37:10.000000000 +0000 @@ -13,7 +13,6 @@ api/sampler.cpp \ api/transfer.cpp \ api/util.hpp \ - core/compiler.hpp \ core/context.cpp \ core/context.hpp \ core/device.cpp \ @@ -54,7 +53,16 @@ util/tuple.hpp LLVM_SOURCES := \ - llvm/invocation.cpp + llvm/codegen/bitcode.cpp \ + llvm/codegen/common.cpp \ + llvm/codegen/native.cpp \ + llvm/codegen.hpp \ + llvm/compat.hpp \ + llvm/invocation.cpp \ + llvm/invocation.hpp \ + llvm/metadata.hpp \ + llvm/util.hpp TGSI_SOURCES := \ - tgsi/compiler.cpp + tgsi/compiler.cpp \ + tgsi/invocation.hpp diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/tgsi/compiler.cpp mesa-17.0.7/src/gallium/state_trackers/clover/tgsi/compiler.cpp --- mesa-12.0.6/src/gallium/state_trackers/clover/tgsi/compiler.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/tgsi/compiler.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -22,7 +22,8 @@ #include -#include "core/compiler.hpp" +#include "tgsi/invocation.hpp" +#include "core/error.hpp" #include "tgsi/tgsi_parse.h" #include "tgsi/tgsi_text.h" @@ -47,7 +48,7 @@ if (!(ts >> offset)) { r_log = "invalid kernel start address"; - throw compile_error(); + throw build_error(); } while (ts >> tok) { @@ -71,7 +72,7 @@ args.push_back({ module::argument::sampler, 0 }); else { r_log = "invalid kernel argument"; - throw compile_error(); + throw build_error(); } } @@ -85,21 +86,21 @@ if (!tgsi_text_translate(source, prog, ARRAY_SIZE(prog))) { r_log = "translate failed"; - throw compile_error(); + throw build_error(); } unsigned sz = tgsi_num_tokens(prog) * sizeof(tgsi_token); std::vector data( (char *)prog, (char *)prog + sz ); - m.secs.push_back({ 0, module::section::text, sz, data }); + m.secs.push_back({ 0, module::section::text_executable, sz, data }); } } module -clover::compile_program_tgsi(const std::string &source, std::string &r_log) { +clover::tgsi::compile_program(const std::string &source, std::string &r_log) { const size_t body_pos = source.find("COMP\n"); if (body_pos == std::string::npos) { r_log = "invalid source"; - throw compile_error(); + throw build_error(); } const char *body = &source[body_pos]; @@ -110,3 +111,10 @@ return m; } + +module +clover::tgsi::link_program(const std::vector &modules) +{ + assert(modules.size() == 1 && "Not implemented"); + return modules[0]; +} diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/tgsi/invocation.hpp mesa-17.0.7/src/gallium/state_trackers/clover/tgsi/invocation.hpp --- mesa-12.0.6/src/gallium/state_trackers/clover/tgsi/invocation.hpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/tgsi/invocation.hpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,37 @@ +// +// Copyright 2016 Francisco Jerez +// +// Permission is hereby granted, free of charge, to any person obtaining a +// copy of this software and associated documentation files (the "Software"), +// to deal in the Software without restriction, including without limitation +// the rights to use, copy, modify, merge, publish, distribute, sublicense, +// and/or sell copies of the Software, and to permit persons to whom the +// Software is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included in +// all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +// THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR +// OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +// OTHER DEALINGS IN THE SOFTWARE. +// + +#ifndef CLOVER_TGSI_INVOCATION_HPP +#define CLOVER_TGSI_INVOCATION_HPP + +#include "core/module.hpp" + +namespace clover { + namespace tgsi { + module compile_program(const std::string &source, + std::string &r_log); + + module link_program(const std::vector &modules); + } +} + +#endif diff -Nru mesa-12.0.6/src/gallium/state_trackers/clover/util/functional.hpp mesa-17.0.7/src/gallium/state_trackers/clover/util/functional.hpp --- mesa-12.0.6/src/gallium/state_trackers/clover/util/functional.hpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/clover/util/functional.hpp 2017-06-01 10:37:10.000000000 +0000 @@ -311,6 +311,27 @@ } }; + template + class equals_t { + public: + equals_t(T &&x) : x(x) {} + + template + bool + operator()(S &&y) const { + return x == y; + } + + private: + T x; + }; + + template + equals_t + equals(T &&x) { + return { std::forward(x) }; + } + class name_equals { public: name_equals(const std::string &name) : name(name) { diff -Nru mesa-12.0.6/src/gallium/state_trackers/dri/dri2.c mesa-17.0.7/src/gallium/state_trackers/dri/dri2.c --- mesa-12.0.6/src/gallium/state_trackers/dri/dri2.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/dri/dri2.c 2017-06-01 10:37:10.000000000 +0000 @@ -84,6 +84,21 @@ format = __DRI_IMAGE_FORMAT_GR88; dri_components = __DRI_IMAGE_COMPONENTS_RG; break; + /* + * For multi-planar YUV formats, we return the format of the first + * plane only. Since there is only one caller which supports multi- + * planar YUV it gets to figure out the remaining planes on it's + * own. + */ + case __DRI_IMAGE_FOURCC_YUV420: + case __DRI_IMAGE_FOURCC_YVU420: + format = __DRI_IMAGE_FORMAT_R8; + dri_components = __DRI_IMAGE_COMPONENTS_Y_U_V; + break; + case __DRI_IMAGE_FOURCC_NV12: + format = __DRI_IMAGE_FORMAT_R8; + dri_components = __DRI_IMAGE_COMPONENTS_Y_UV; + break; default: return -1; } @@ -91,6 +106,11 @@ return format; } +/* NOTE this probably isn't going to do the right thing for YUV images + * (but I think the same can be said for intel_query_image()). I think + * only needed for exporting dmabuf's, so I think I won't loose much + * sleep over it. + */ static int convert_to_fourcc(int format) { switch(format) { @@ -168,6 +188,7 @@ dri2InvalidateDrawable(dPriv); drawable->dPriv->lastStamp = drawable->dPriv->dri2.stamp; + drawable->texture_mask = 0; p_atomic_inc(&drawable->base.stamp); } @@ -404,7 +425,7 @@ else whandle.type = DRM_API_HANDLE_TYPE_KMS; - screen->base.screen->resource_get_handle(screen->base.screen, + screen->base.screen->resource_get_handle(screen->base.screen, NULL, buffer->resource, &whandle, PIPE_HANDLE_USAGE_EXPLICIT_FLUSH | PIPE_HANDLE_USAGE_READ); @@ -762,14 +783,16 @@ static __DRIimage * dri2_create_image_from_winsys(__DRIscreen *_screen, int width, int height, int format, - struct winsys_handle *whandle, + int num_handles, struct winsys_handle *whandle, void *loaderPrivate) { struct dri_screen *screen = dri_screen(_screen); + struct pipe_screen *pscreen = screen->base.screen; __DRIimage *img; struct pipe_resource templ; unsigned tex_usage; enum pipe_format pf; + int i; tex_usage = PIPE_BIND_RENDER_TARGET | PIPE_BIND_SAMPLER_VIEW; @@ -783,19 +806,47 @@ memset(&templ, 0, sizeof(templ)); templ.bind = tex_usage; - templ.format = pf; templ.target = screen->target; templ.last_level = 0; - templ.width0 = width; - templ.height0 = height; templ.depth0 = 1; templ.array_size = 1; - img->texture = screen->base.screen->resource_from_handle(screen->base.screen, - &templ, whandle, PIPE_HANDLE_USAGE_READ_WRITE); - if (!img->texture) { - FREE(img); - return NULL; + for (i = num_handles - 1; i >= 0; i--) { + struct pipe_resource *tex; + + /* TODO: something a lot less ugly */ + switch (i) { + case 0: + templ.width0 = width; + templ.height0 = height; + templ.format = pf; + break; + case 1: + templ.width0 = width / 2; + templ.height0 = height / 2; + templ.format = (num_handles == 2) ? + PIPE_FORMAT_RG88_UNORM : /* NV12, etc */ + PIPE_FORMAT_R8_UNORM; /* I420, etc */ + break; + case 2: + templ.width0 = width / 2; + templ.height0 = height / 2; + templ.format = PIPE_FORMAT_R8_UNORM; + break; + default: + unreachable("too many planes!"); + } + + tex = pscreen->resource_from_handle(pscreen, + &templ, &whandle[i], PIPE_HANDLE_USAGE_READ_WRITE); + if (!tex) { + pipe_resource_reference(&img->texture, NULL); + FREE(img); + return NULL; + } + + tex->next = img->texture; + img->texture = tex; } img->level = 0; @@ -826,7 +877,7 @@ whandle.stride = pitch * util_format_get_blocksize(pf); return dri2_create_image_from_winsys(_screen, width, height, format, - &whandle, loaderPrivate); + 1, &whandle, loaderPrivate); } static __DRIimage * @@ -836,12 +887,26 @@ int *offsets, unsigned *error, int *dri_components, void *loaderPrivate) { - struct winsys_handle whandle; + struct winsys_handle whandles[3]; int format; __DRIimage *img = NULL; unsigned err = __DRI_IMAGE_ERROR_SUCCESS; + int expected_num_fds, i; - if (num_fds != 1) { + switch (fourcc) { + case __DRI_IMAGE_FOURCC_YUV420: + case __DRI_IMAGE_FOURCC_YVU420: + expected_num_fds = 3; + break; + case __DRI_IMAGE_FOURCC_NV12: + expected_num_fds = 2; + break; + default: + expected_num_fds = 1; + break; + } + + if (num_fds != expected_num_fds) { err = __DRI_IMAGE_ERROR_BAD_MATCH; goto exit; } @@ -852,19 +917,30 @@ goto exit; } - if (fds[0] < 0) { - err = __DRI_IMAGE_ERROR_BAD_ALLOC; - goto exit; - } + memset(whandles, 0, sizeof(whandles)); - memset(&whandle, 0, sizeof(whandle)); - whandle.type = DRM_API_HANDLE_TYPE_FD; - whandle.handle = (unsigned)fds[0]; - whandle.stride = (unsigned)strides[0]; - whandle.offset = (unsigned)offsets[0]; + for (i = 0; i < num_fds; i++) { + if (fds[i] < 0) { + err = __DRI_IMAGE_ERROR_BAD_ALLOC; + goto exit; + } + + whandles[i].type = DRM_API_HANDLE_TYPE_FD; + whandles[i].handle = (unsigned)fds[i]; + whandles[i].stride = (unsigned)strides[i]; + whandles[i].offset = (unsigned)offsets[i]; + } + + if (fourcc == __DRI_IMAGE_FOURCC_YVU420) { + /* convert to YUV420 by swapping 2nd and 3rd planes: */ + struct winsys_handle tmp = whandles[1]; + whandles[1] = whandles[2]; + whandles[2] = tmp; + fourcc = __DRI_IMAGE_FOURCC_YUV420; + } img = dri2_create_image_from_winsys(_screen, width, height, format, - &whandle, loaderPrivate); + num_fds, whandles, loaderPrivate); if(img == NULL) err = __DRI_IMAGE_ERROR_BAD_ALLOC; @@ -963,25 +1039,25 @@ case __DRI_IMAGE_ATTRIB_STRIDE: whandle.type = DRM_API_HANDLE_TYPE_KMS; image->texture->screen->resource_get_handle(image->texture->screen, - image->texture, &whandle, usage); + NULL, image->texture, &whandle, usage); *value = whandle.stride; return GL_TRUE; case __DRI_IMAGE_ATTRIB_HANDLE: whandle.type = DRM_API_HANDLE_TYPE_KMS; image->texture->screen->resource_get_handle(image->texture->screen, - image->texture, &whandle, usage); + NULL, image->texture, &whandle, usage); *value = whandle.handle; return GL_TRUE; case __DRI_IMAGE_ATTRIB_NAME: whandle.type = DRM_API_HANDLE_TYPE_SHARED; image->texture->screen->resource_get_handle(image->texture->screen, - image->texture, &whandle, usage); + NULL, image->texture, &whandle, usage); *value = whandle.handle; return GL_TRUE; case __DRI_IMAGE_ATTRIB_FD: whandle.type= DRM_API_HANDLE_TYPE_FD; if (!image->texture->screen->resource_get_handle(image->texture->screen, - image->texture, &whandle, usage)) + NULL, image->texture, &whandle, usage)) return GL_FALSE; *value = whandle.handle; @@ -1069,7 +1145,7 @@ whandle.offset = offsets[0]; img = dri2_create_image_from_winsys(screen, width, height, format, - &whandle, loaderPrivate); + 1, &whandle, loaderPrivate); if (img == NULL) return NULL; @@ -1254,7 +1330,7 @@ screen = dri_screen(ctx->sPriv)->base.screen; pipe->flush_resource(pipe, dst->texture); ctx->st->flush(ctx->st, 0, &fence); - (void) screen->fence_finish(screen, fence, PIPE_TIMEOUT_INFINITE); + (void) screen->fence_finish(screen, NULL, fence, PIPE_TIMEOUT_INFINITE); screen->fence_reference(screen, &fence, NULL); } } @@ -1381,6 +1457,18 @@ void *cl_event; }; +static unsigned dri2_fence_get_caps(__DRIscreen *_screen) +{ + struct dri_screen *driscreen = dri_screen(_screen); + struct pipe_screen *screen = driscreen->base.screen; + unsigned caps = 0; + + if (screen->get_param(screen, PIPE_CAP_NATIVE_FENCE_FD)) + caps |= __DRI_FENCE_CAP_NATIVE_FD; + + return caps; +} + static void * dri2_create_fence(__DRIcontext *_ctx) { @@ -1402,6 +1490,39 @@ } static void * +dri2_create_fence_fd(__DRIcontext *_ctx, int fd) +{ + struct pipe_context *ctx = dri_context(_ctx)->st->pipe; + struct dri2_fence *fence = CALLOC_STRUCT(dri2_fence); + + if (fd == -1) { + /* exporting driver created fence, flush: */ + ctx->flush(ctx, &fence->pipe_fence, + PIPE_FLUSH_DEFERRED | PIPE_FLUSH_FENCE_FD); + } else { + /* importing a foreign fence fd: */ + ctx->create_fence_fd(ctx, &fence->pipe_fence, fd); + } + if (!fence->pipe_fence) { + FREE(fence); + return NULL; + } + + fence->driscreen = dri_screen(_ctx->driScreenPriv); + return fence; +} + +static int +dri2_get_fence_fd(__DRIscreen *_screen, void *_fence) +{ + struct dri_screen *driscreen = dri_screen(_screen); + struct pipe_screen *screen = driscreen->base.screen; + struct dri2_fence *fence = (struct dri2_fence*)_fence; + + return screen->fence_get_fd(screen, fence->pipe_fence); +} + +static void * dri2_get_fence_from_cl_event(__DRIscreen *_screen, intptr_t cl_event) { struct dri_screen *driscreen = dri_screen(_screen); @@ -1453,13 +1574,13 @@ /* No need to flush. The context was flushed when the fence was created. */ if (fence->pipe_fence) - return screen->fence_finish(screen, fence->pipe_fence, timeout); + return screen->fence_finish(screen, NULL, fence->pipe_fence, timeout); else if (fence->cl_event) { struct pipe_fence_handle *pipe_fence = driscreen->opencl_dri_event_get_fence(fence->cl_event); if (pipe_fence) - return screen->fence_finish(screen, pipe_fence, timeout); + return screen->fence_finish(screen, NULL, pipe_fence, timeout); else return driscreen->opencl_dri_event_wait(fence->cl_event, timeout); } @@ -1472,17 +1593,24 @@ static void dri2_server_wait_sync(__DRIcontext *_ctx, void *_fence, unsigned flags) { - /* AFAIK, no driver currently supports parallel context execution. */ + struct pipe_context *ctx = dri_context(_ctx)->st->pipe; + struct dri2_fence *fence = (struct dri2_fence*)_fence; + + if (ctx->fence_server_sync) + ctx->fence_server_sync(ctx, fence->pipe_fence); } static __DRI2fenceExtension dri2FenceExtension = { - .base = { __DRI2_FENCE, 1 }, + .base = { __DRI2_FENCE, 2 }, .create_fence = dri2_create_fence, .get_fence_from_cl_event = dri2_get_fence_from_cl_event, .destroy_fence = dri2_destroy_fence, .client_wait_sync = dri2_client_wait_sync, - .server_wait_sync = dri2_server_wait_sync + .server_wait_sync = dri2_server_wait_sync, + .get_capabilities = dri2_fence_get_caps, + .create_fence_fd = dri2_create_fence_fd, + .get_fence_fd = dri2_get_fence_fd, }; static const __DRIrobustnessExtension dri2Robustness = { @@ -1676,7 +1804,7 @@ return MESA_GLINTEROP_INVALID_MIP_LEVEL; } - if (!st_finalize_texture(ctx, st->pipe, obj)) { + if (!st_finalize_texture(ctx, st->pipe, obj, 0)) { mtx_unlock(&ctx->Shared->Mutex); return MESA_GLINTEROP_OUT_OF_RESOURCES; } @@ -1722,7 +1850,8 @@ memset(&whandle, 0, sizeof(whandle)); whandle.type = DRM_API_HANDLE_TYPE_FD; - success = screen->resource_get_handle(screen, res, &whandle, usage); + success = screen->resource_get_handle(screen, st->pipe, res, &whandle, + usage); mtx_unlock(&ctx->Shared->Mutex); if (!success) @@ -1992,6 +2121,7 @@ &driImageDriverExtension.base, &driDRI2Extension.base, &gallium_config_options.base, + &dri2FenceExtension.base, NULL }; diff -Nru mesa-12.0.6/src/gallium/state_trackers/dri/dri_drawable.c mesa-17.0.7/src/gallium/state_trackers/dri/dri_drawable.c --- mesa-12.0.6/src/gallium/state_trackers/dri/dri_drawable.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/dri/dri_drawable.c 2017-06-01 10:37:10.000000000 +0000 @@ -525,7 +525,7 @@ fence = swap_fences_pop_front(drawable); if (fence) { - (void) screen->fence_finish(screen, fence, PIPE_TIMEOUT_INFINITE); + (void) screen->fence_finish(screen, NULL, fence, PIPE_TIMEOUT_INFINITE); screen->fence_reference(screen, &fence, NULL); } diff -Nru mesa-12.0.6/src/gallium/state_trackers/dri/dri_screen.c mesa-17.0.7/src/gallium/state_trackers/dri/dri_screen.c --- mesa-12.0.6/src/gallium/state_trackers/dri/dri_screen.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/dri/dri_screen.c 2017-06-01 10:37:10.000000000 +0000 @@ -128,6 +128,7 @@ unsigned i; struct pipe_screen *p_screen = screen->base.screen; boolean pf_z16, pf_x8z24, pf_z24x8, pf_s8z24, pf_z24s8, pf_z32; + boolean mixed_color_depth; static const GLenum back_buffer_modes[] = { GLX_NONE, GLX_SWAP_UNDEFINED_OML, GLX_SWAP_COPY_OML @@ -142,7 +143,7 @@ stencil_bits_array[0] = 0; depth_buffer_factor = 1; } - + msaa_samples_max = (screen->st_api->feature_mask & ST_API_FEATURE_MS_VISUALS_MASK) ? MSAA_VISUAL_MAX_SAMPLES : 1; @@ -184,6 +185,9 @@ stencil_bits_array[depth_buffer_factor++] = 0; } + mixed_color_depth = + p_screen->get_param(p_screen, PIPE_CAP_MIXED_COLOR_DEPTH_BITS); + assert(ARRAY_SIZE(mesa_formats) == ARRAY_SIZE(pipe_formats)); /* Add configs. */ @@ -214,7 +218,7 @@ depth_buffer_factor, back_buffer_modes, ARRAY_SIZE(back_buffer_modes), msaa_modes, 1, - GL_TRUE); + GL_TRUE, !mixed_color_depth); configs = driConcatConfigs(configs, new_configs); /* Multi-sample configs without an accumulation buffer. */ @@ -224,7 +228,7 @@ depth_buffer_factor, back_buffer_modes, ARRAY_SIZE(back_buffer_modes), msaa_modes+1, num_msaa_modes-1, - GL_FALSE); + GL_FALSE, !mixed_color_depth); configs = driConcatConfigs(configs, new_configs); } } @@ -330,6 +334,17 @@ stimg->texture = NULL; pipe_resource_reference(&stimg->texture, img->texture); + switch (img->dri_components) { + case __DRI_IMAGE_COMPONENTS_Y_U_V: + stimg->format = PIPE_FORMAT_IYUV; + break; + case __DRI_IMAGE_COMPONENTS_Y_UV: + stimg->format = PIPE_FORMAT_NV12; + break; + default: + stimg->format = img->texture->format; + break; + } stimg->level = img->level; stimg->layer = img->layer; diff -Nru mesa-12.0.6/src/gallium/state_trackers/dri/Makefile.am mesa-17.0.7/src/gallium/state_trackers/dri/Makefile.am --- mesa-12.0.6/src/gallium/state_trackers/dri/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/dri/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -28,8 +28,8 @@ -I$(top_srcdir)/include \ -I$(top_srcdir)/src/mapi \ -I$(top_srcdir)/src/mesa \ - -I$(top_srcdir)/src/mesa/drivers/dri/common \ -I$(top_builddir)/src/mesa/drivers/dri/common \ + -I$(top_srcdir)/src/mesa/drivers/dri/common \ $(GALLIUM_CFLAGS) \ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) diff -Nru mesa-12.0.6/src/gallium/state_trackers/dri/Makefile.in mesa-17.0.7/src/gallium/state_trackers/dri/Makefile.in --- mesa-12.0.6/src/gallium/state_trackers/dri/Makefile.in 2017-01-24 01:41:48.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/dri/Makefile.in 2017-06-01 10:37:21.000000000 +0000 @@ -112,18 +112,21 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_SOFTPIPE_TRUE@am__append_3 = \ +@HAVE_GALLIUM_SOFTPIPE_TRUE@am__append_4 = \ @HAVE_GALLIUM_SOFTPIPE_TRUE@ -DGALLIUM_SOFTPIPE -@HAVE_DRISW_TRUE@am__append_4 = $(drisw_SOURCES) -@HAVE_DRI2_TRUE@am__append_5 = $(dri2_SOURCES) +@HAVE_DRISW_TRUE@am__append_5 = $(drisw_SOURCES) +@HAVE_DRI2_TRUE@am__append_6 = $(dri2_SOURCES) subdir = src/gallium/state_trackers/dri ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps = $(top_srcdir)/m4/ax_check_gnu_make.m4 \ @@ -230,6 +233,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -244,6 +249,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -273,10 +279,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -326,11 +333,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -370,8 +374,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -408,8 +410,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -418,7 +418,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -426,13 +425,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -461,6 +461,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -587,12 +588,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -604,15 +601,14 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CPPFLAGS = -I$(top_srcdir)/include -I$(top_srcdir)/src/mapi \ -I$(top_srcdir)/src/mesa \ - -I$(top_srcdir)/src/mesa/drivers/dri/common \ -I$(top_builddir)/src/mesa/drivers/dri/common \ - $(GALLIUM_CFLAGS) $(LIBDRM_CFLAGS) $(VISIBILITY_CFLAGS) \ - $(am__append_3) + -I$(top_srcdir)/src/mesa/drivers/dri/common $(GALLIUM_CFLAGS) \ + $(LIBDRM_CFLAGS) $(VISIBILITY_CFLAGS) $(am__append_4) noinst_LTLIBRARIES = libdri.la -libdri_la_SOURCES = $(common_SOURCES) $(am__append_4) $(am__append_5) +libdri_la_SOURCES = $(common_SOURCES) $(am__append_5) $(am__append_6) EXTRA_DIST = SConscript all: all-am diff -Nru mesa-12.0.6/src/gallium/state_trackers/glx/xlib/Makefile.am mesa-17.0.7/src/gallium/state_trackers/glx/xlib/Makefile.am --- mesa-12.0.6/src/gallium/state_trackers/glx/xlib/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/glx/xlib/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -25,6 +25,7 @@ AM_CFLAGS = \ $(GALLIUM_CFLAGS) \ + $(GLPROTO_CFLAGS) \ $(X11_INCLUDES) AM_CPPFLAGS = \ -I$(top_srcdir)/include \ diff -Nru mesa-12.0.6/src/gallium/state_trackers/glx/xlib/Makefile.in mesa-17.0.7/src/gallium/state_trackers/glx/xlib/Makefile.in --- mesa-12.0.6/src/gallium/state_trackers/glx/xlib/Makefile.in 2017-01-24 01:41:48.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/glx/xlib/Makefile.in 2017-06-01 10:37:21.000000000 +0000 @@ -111,10 +111,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -215,6 +218,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -229,6 +234,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -258,10 +264,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -311,11 +318,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -355,8 +359,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -393,8 +395,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -403,7 +403,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -411,13 +410,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -446,6 +446,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -565,12 +566,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -582,9 +579,10 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ $(GALLIUM_CFLAGS) \ + $(GLPROTO_CFLAGS) \ $(X11_INCLUDES) AM_CPPFLAGS = \ diff -Nru mesa-12.0.6/src/gallium/state_trackers/glx/xlib/xm_api.c mesa-17.0.7/src/gallium/state_trackers/glx/xlib/xm_api.c --- mesa-12.0.6/src/gallium/state_trackers/glx/xlib/xm_api.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/glx/xlib/xm_api.c 2017-06-01 10:37:10.000000000 +0000 @@ -1376,7 +1376,7 @@ c->st->flush(c->st, ST_FLUSH_FRONT, &fence); if (fence) { - xmdpy->screen->fence_finish(xmdpy->screen, fence, + xmdpy->screen->fence_finish(xmdpy->screen, NULL, fence, PIPE_TIMEOUT_INFINITE); xmdpy->screen->fence_reference(xmdpy->screen, &fence, NULL); } diff -Nru mesa-12.0.6/src/gallium/state_trackers/hgl/.editorconfig mesa-17.0.7/src/gallium/state_trackers/hgl/.editorconfig --- mesa-12.0.6/src/gallium/state_trackers/hgl/.editorconfig 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/hgl/.editorconfig 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,2 @@ +[*.{c,h,cpp,hpp}] +indent_style = tab diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/adapter9.c mesa-17.0.7/src/gallium/state_trackers/nine/adapter9.c --- mesa-12.0.6/src/gallium/state_trackers/nine/adapter9.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/adapter9.c 2017-06-01 10:37:10.000000000 +0000 @@ -204,14 +204,18 @@ hr = NineAdapter9_GetScreen(This, DevType, &screen); if (FAILED(hr)) { return hr; } + /* The display format is not handled in Nine. We always present an XRGB8888 + * buffer (and the display server will eventually do the conversion). We probably + * don't need to check for anything for the adapter format support, since if the + * display server advertise support, it will likely be able to do the conversion. + * We do the approximation that a format is available in the display server if + * the format passes with NINE_BIND_BACKBUFFER_FLAGS */ dfmt = d3d9_to_pipe_format_checked(screen, AdapterFormat, PIPE_TEXTURE_2D, 1, - PIPE_BIND_DISPLAY_TARGET | - PIPE_BIND_SHARED, FALSE, FALSE); + NINE_BIND_BACKBUFFER_FLAGS, FALSE, FALSE); bfmt = d3d9_to_pipe_format_checked(screen, BackBufferFormat, PIPE_TEXTURE_2D, 1, - PIPE_BIND_DISPLAY_TARGET | - PIPE_BIND_SHARED, FALSE, FALSE); + NINE_BIND_BACKBUFFER_FLAGS, FALSE, FALSE); if (dfmt == PIPE_FORMAT_NONE || bfmt == PIPE_FORMAT_NONE) { DBG("Unsupported Adapter/BackBufferFormat.\n"); return D3DERR_NOTAVAILABLE; @@ -293,7 +297,11 @@ bind = 0; if (Usage & D3DUSAGE_RENDERTARGET) bind |= PIPE_BIND_RENDER_TARGET; - if (Usage & D3DUSAGE_DEPTHSTENCIL) bind |= PIPE_BIND_DEPTH_STENCIL; + if (Usage & D3DUSAGE_DEPTHSTENCIL) { + if (!depth_stencil_format(CheckFormat)) + return D3DERR_NOTAVAILABLE; + bind |= d3d9_get_pipe_depth_format_bindings(CheckFormat); + } /* API hack because setting RT[0] to NULL is forbidden */ if (CheckFormat == D3DFMT_NULL && bind == PIPE_BIND_RENDER_TARGET && @@ -381,6 +389,12 @@ d3dformat_to_string(SurfaceFormat), Windowed, MultiSampleType, pQualityLevels); + if (pQualityLevels) { + /* In error cases return only 1 quality level supported */ + *pQualityLevels = 1; + } + user_assert(MultiSampleType <= D3DMULTISAMPLE_16_SAMPLES, D3DERR_INVALIDCALL); + hr = NineAdapter9_GetScreen(This, DeviceType, &screen); if (FAILED(hr)) return hr; @@ -388,20 +402,33 @@ if (depth_stencil_format(SurfaceFormat)) bind = d3d9_get_pipe_depth_format_bindings(SurfaceFormat); else /* render-target */ - bind = PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_TRANSFER_READ | - PIPE_BIND_TRANSFER_WRITE | PIPE_BIND_RENDER_TARGET; + bind = PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_RENDER_TARGET; + + pf = d3d9_to_pipe_format_checked(screen, SurfaceFormat, PIPE_TEXTURE_2D, + 0, PIPE_BIND_SAMPLER_VIEW, FALSE, FALSE); + + if (pf == PIPE_FORMAT_NONE && SurfaceFormat != D3DFMT_NULL) { + DBG("%s not available.\n", d3dformat_to_string(SurfaceFormat)); + return D3DERR_INVALIDCALL; + } pf = d3d9_to_pipe_format_checked(screen, SurfaceFormat, PIPE_TEXTURE_2D, MultiSampleType, bind, FALSE, FALSE); - if (pf == PIPE_FORMAT_NONE) { + if (pf == PIPE_FORMAT_NONE && SurfaceFormat != D3DFMT_NULL) { DBG("%s with %u samples not available.\n", d3dformat_to_string(SurfaceFormat), MultiSampleType); return D3DERR_NOTAVAILABLE; } - if (pQualityLevels) - *pQualityLevels = 1; /* gallium doesn't have quality levels */ + if (pQualityLevels) { + /* NONMASKABLE MultiSampleType might have more than one quality level, + * while MASKABLE MultiSampleTypes have only one level. + * Advertise quality levels and map each level to a sample count. */ + (void ) d3dmultisample_type_check(screen, SurfaceFormat, + &MultiSampleType, D3DMULTISAMPLE_16_SAMPLES, pQualityLevels); + DBG("advertising %u quality levels\n", *pQualityLevels); + } return D3D_OK; } @@ -430,11 +457,10 @@ if (FAILED(hr)) { return hr; } dfmt = d3d9_to_pipe_format_checked(screen, AdapterFormat, PIPE_TEXTURE_2D, 0, - PIPE_BIND_DISPLAY_TARGET | - PIPE_BIND_SHARED, FALSE, FALSE); + NINE_BIND_BACKBUFFER_FLAGS, FALSE, FALSE); bfmt = d3d9_to_pipe_format_checked(screen, RenderTargetFormat, PIPE_TEXTURE_2D, 0, - PIPE_BIND_RENDER_TARGET, FALSE, FALSE); + NINE_BIND_BACKBUFFER_FLAGS, FALSE, FALSE); if (RenderTargetFormat == D3DFMT_NULL) bfmt = dfmt; zsfmt = d3d9_to_pipe_format_checked(screen, DepthStencilFormat, @@ -474,11 +500,9 @@ if (FAILED(hr)) { return hr; } dfmt = d3d9_to_pipe_format_checked(screen, TargetFormat, PIPE_TEXTURE_2D, 1, - PIPE_BIND_DISPLAY_TARGET | - PIPE_BIND_SHARED, FALSE, FALSE); + NINE_BIND_BACKBUFFER_FLAGS, FALSE, FALSE); bfmt = d3d9_to_pipe_format_checked(screen, SourceFormat, PIPE_TEXTURE_2D, 1, - PIPE_BIND_DISPLAY_TARGET | - PIPE_BIND_SHARED, FALSE, FALSE); + NINE_BIND_BACKBUFFER_FLAGS, FALSE, FALSE); if (dfmt == PIPE_FORMAT_NONE || bfmt == PIPE_FORMAT_NONE) { DBG("%s to %s not supported.\n", @@ -576,7 +600,7 @@ D3DPMISCCAPS_BLENDOP | D3DPIPECAP(INDEP_BLEND_ENABLE, D3DPMISCCAPS_INDEPENDENTWRITEMASKS) | D3DPMISCCAPS_PERSTAGECONSTANT | - /*D3DPMISCCAPS_POSTBLENDSRGBCONVERT |*/ /* TODO */ + /*D3DPMISCCAPS_POSTBLENDSRGBCONVERT |*/ /* TODO: advertise if Ex and dx10 able card */ D3DPMISCCAPS_FOGANDSPECULARALPHA | /* Note: documentation of the flag is wrong */ D3DPIPECAP(BLEND_EQUATION_SEPARATE, D3DPMISCCAPS_SEPARATEALPHABLEND) | D3DPIPECAP(MIXED_COLORBUFFER_FORMATS, D3DPMISCCAPS_MRTINDEPENDENTBITDEPTHS) | @@ -771,7 +795,7 @@ pCaps->MaxSimultaneousTextures = NINE_MAX_SAMPLERS_PS; pCaps->VertexProcessingCaps = D3DVTXPCAPS_TEXGEN | - /*D3DVTXPCAPS_TEXGEN_SPHEREMAP |*/ + D3DVTXPCAPS_TEXGEN_SPHEREMAP | D3DVTXPCAPS_MATERIALSOURCE7 | D3DVTXPCAPS_DIRECTIONALLIGHTS | D3DVTXPCAPS_POSITIONALLIGHTS | @@ -782,7 +806,7 @@ pCaps->MaxActiveLights = NINE_MAX_LIGHTS_ACTIVE; /* like GL_LIGHTi */ pCaps->MaxUserClipPlanes = PIPE_MAX_CLIP_PLANES; pCaps->MaxVertexBlendMatrices = 4; /* 1 vec4 BLENDWEIGHT/INDICES input */ - pCaps->MaxVertexBlendMatrixIndex = 7; /* D3DTS_WORLDMATRIX(0..7) */ + pCaps->MaxVertexBlendMatrixIndex = 8; /* D3DTS_WORLDMATRIX(0..8) */ pCaps->MaxPointSize = screen->get_paramf(screen, PIPE_CAPF_MAX_POINT_WIDTH); diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/adapter9.h mesa-17.0.7/src/gallium/state_trackers/nine/adapter9.h --- mesa-12.0.6/src/gallium/state_trackers/nine/adapter9.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/adapter9.h 2017-06-01 10:37:10.000000000 +0000 @@ -39,6 +39,9 @@ int throttling_value; int vblank_mode; BOOL thread_submit; + BOOL discard_delayed_release; + BOOL tearfree_discard; + int csmt_force; void (*destroy)( struct d3dadapter9_context *ctx ); }; diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/basetexture9.c mesa-17.0.7/src/gallium/state_trackers/nine/basetexture9.c --- mesa-12.0.6/src/gallium/state_trackers/nine/basetexture9.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/basetexture9.c 2017-06-01 10:37:10.000000000 +0000 @@ -34,7 +34,6 @@ #endif #include "util/u_format.h" -#include "util/u_gen_mipmap.h" #define DBG_CHANNEL DBG_BASETEXTURE @@ -65,7 +64,6 @@ return hr; This->format = format; - This->pipe = pParams->device->pipe; This->mipfilter = (Usage & D3DUSAGE_AUTOGENMIPMAP) ? D3DTEXF_LINEAR : D3DTEXF_NONE; This->managed.lod = 0; @@ -204,17 +202,6 @@ pipe_sampler_view_reference(&This->view[0], NULL); pipe_sampler_view_reference(&This->view[1], NULL); - if (This->bind_count) { - /* mark state dirty */ - struct nine_state *state = &This->base.base.device->state; - unsigned s; - for (s = 0; s < NINE_MAX_SAMPLERS; ++s) - if (state->texture[s] == This) - state->changed.texture |= 1 << s; - if (state->changed.texture) - state->changed.group |= NINE_STATE_TEXTURE; - } - /* Allocate a new resource */ hr = NineBaseTexture9_CreatePipeResource(This, This->managed.lod_resident != -1); if (FAILED(hr)) @@ -379,6 +366,16 @@ if (This->base.usage & D3DUSAGE_AUTOGENMIPMAP) This->dirty_mip = TRUE; + /* Set again the textures currently bound to update the texture data */ + if (This->bind_count) { + struct nine_state *state = &This->base.base.device->state; + unsigned s; + for (s = 0; s < NINE_MAX_SAMPLERS; ++s) + /* Dirty tracking is done in device9 state, not nine_context. */ + if (state->texture[s] == This) + nine_context_set_texture(This->base.base.device, s, This); + } + DBG("DONE, generate mip maps = %i\n", This->dirty_mip); return D3D_OK; } @@ -386,7 +383,6 @@ void NINE_WINAPI NineBaseTexture9_GenerateMipSubLevels( struct NineBaseTexture9 *This ) { - struct pipe_resource *resource; unsigned base_level = 0; unsigned last_level = This->base.info.last_level - This->managed.lod; unsigned first_layer = 0; @@ -409,11 +405,10 @@ last_layer = util_max_layer(This->view[0]->texture, base_level); - resource = This->base.resource; - - util_gen_mipmap(This->pipe, resource, - resource->format, base_level, last_level, - first_layer, last_layer, filter); + nine_context_gen_mipmap(This->base.base.device, (struct NineUnknown *)This, + This->base.resource, + base_level, last_level, + first_layer, last_layer, filter); This->dirty_mip = FALSE; } @@ -422,7 +417,7 @@ NineBaseTexture9_CreatePipeResource( struct NineBaseTexture9 *This, BOOL CopyData ) { - struct pipe_context *pipe = This->pipe; + struct pipe_context *pipe; struct pipe_screen *screen = This->base.info.screen; struct pipe_resource templ; unsigned l, m; @@ -469,6 +464,8 @@ box.height = u_minify(templ.height0, l); box.depth = u_minify(templ.depth0, l); + pipe = nine_context_get_pipe_acquire(This->base.base.device); + for (; l <= templ.last_level; ++l, ++m) { pipe->resource_copy_region(pipe, res, l, 0, 0, 0, @@ -477,6 +474,8 @@ box.height = u_minify(box.height, 1); box.depth = u_minify(box.depth, 1); } + + nine_context_get_pipe_release(This->base.base.device); } pipe_resource_reference(&old, NULL); @@ -492,8 +491,8 @@ const int sRGB ) { const struct util_format_description *desc; - struct pipe_context *pipe = This->pipe; - struct pipe_screen *screen = pipe->screen; + struct pipe_context *pipe; + struct pipe_screen *screen = NineDevice9_GetScreen(This->base.base.device); struct pipe_resource *resource = This->base.resource; struct pipe_sampler_view templ; enum pipe_format srgb_format; @@ -573,7 +572,9 @@ templ.swizzle_a = swizzle[3]; templ.target = resource->target; + pipe = nine_context_get_pipe_acquire(This->base.base.device); This->view[sRGB] = pipe->create_sampler_view(pipe, resource, &templ); + nine_context_get_pipe_release(This->base.base.device); DBG("sampler view = %p(resource = %p)\n", This->view[sRGB], resource); diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/basetexture9.h mesa-17.0.7/src/gallium/state_trackers/nine/basetexture9.h --- mesa-12.0.6/src/gallium/state_trackers/nine/basetexture9.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/basetexture9.h 2017-06-01 10:37:10.000000000 +0000 @@ -23,6 +23,7 @@ #ifndef _NINE_BASETEXTURE9_H_ #define _NINE_BASETEXTURE9_H_ +#include "device9.h" #include "resource9.h" #include "util/u_inlines.h" #include "util/list.h" @@ -34,7 +35,6 @@ struct list_head list2; /* for managed_textures */ /* g3d */ - struct pipe_context *pipe; struct pipe_sampler_view *view[2]; /* linear and sRGB */ D3DFORMAT format; @@ -131,6 +131,25 @@ return This->view[sRGB]; } +static void inline +NineBindTextureToDevice( struct NineDevice9 *device, + struct NineBaseTexture9 **slot, + struct NineBaseTexture9 *tex ) +{ + struct NineBaseTexture9 *old = *slot; + + if (tex) { + if ((tex->managed.dirty | tex->dirty_mip) && LIST_IS_EMPTY(&tex->list)) + list_add(&tex->list, &device->update_textures); + + tex->bind_count++; + } + if (old) + old->bind_count--; + + nine_bind(slot, tex); +} + #ifdef DEBUG void NineBaseTexture9_Dump( struct NineBaseTexture9 *This ); @@ -140,7 +159,7 @@ #endif #define BASETEX_REGISTER_UPDATE(t) do { \ - if (((t)->managed.dirty | ((t)->dirty_mip)) && (t)->base.base.bind) \ + if (((t)->managed.dirty | ((t)->dirty_mip)) && (t)->bind_count) \ if (LIST_IS_EMPTY(&(t)->list)) \ list_add(&(t)->list, &(t)->base.base.device->update_textures); \ } while(0) diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/buffer9.c mesa-17.0.7/src/gallium/state_trackers/nine/buffer9.c --- mesa-12.0.6/src/gallium/state_trackers/nine/buffer9.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/buffer9.c 2017-06-01 10:37:10.000000000 +0000 @@ -23,6 +23,7 @@ #include "buffer9.h" #include "device9.h" +#include "nine_buffer_upload.h" #include "nine_helpers.h" #include "nine_pipe.h" @@ -32,6 +33,7 @@ #include "pipe/p_defines.h" #include "pipe/p_format.h" #include "util/u_box.h" +#include "util/u_inlines.h" #define DBG_CHANNEL (DBG_INDEXBUFFER|DBG_VERTEXBUFFER) @@ -50,15 +52,13 @@ user_assert(Pool != D3DPOOL_SCRATCH, D3DERR_INVALIDCALL); - This->maps = MALLOC(sizeof(struct pipe_transfer *)); + This->maps = MALLOC(sizeof(struct NineTransfer)); if (!This->maps) return E_OUTOFMEMORY; This->nmaps = 0; This->maxmaps = 1; This->size = Size; - This->pipe = pParams->device->pipe; - info->screen = pParams->device->screen; info->target = PIPE_BUFFER; info->format = PIPE_FORMAT_R8_UNORM; @@ -67,7 +67,7 @@ /* Note: WRITEONLY is just tip for resource placement, the resource * can still be read (but slower). */ - info->bind = PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_TRANSFER_WRITE | PIPE_BIND_TRANSFER_READ; + info->bind = PIPE_BIND_VERTEX_BUFFER; /* It is hard to find clear information on where to place the buffer in * memory depending on the flag. @@ -101,14 +101,19 @@ else info->usage = PIPE_USAGE_DYNAMIC; + /* When Writeonly is not set, we don't want to enable the + * optimizations */ + This->discard_nooverwrite_only = !!(Usage & D3DUSAGE_WRITEONLY) && + pParams->device->buffer_upload; /* if (pDesc->Usage & D3DUSAGE_DONOTCLIP) { } */ /* if (pDesc->Usage & D3DUSAGE_NONSECURE) { } */ /* if (pDesc->Usage & D3DUSAGE_NPATCHES) { } */ /* if (pDesc->Usage & D3DUSAGE_POINTS) { } */ /* if (pDesc->Usage & D3DUSAGE_RTPATCHES) { } */ + /* The buffer must be usable with both sw and hw + * vertex processing. It is expected to be slower with hw. */ if (Usage & D3DUSAGE_SOFTWAREPROCESSING) - DBG("Application asked for Software Vertex Processing, " - "but this is unimplemented\n"); + info->usage = PIPE_USAGE_STAGING; /* if (pDesc->Usage & D3DUSAGE_TEXTAPI) { } */ info->height0 = 1; @@ -124,7 +129,7 @@ return hr; if (Pool == D3DPOOL_MANAGED) { - This->managed.data = align_malloc( + This->managed.data = align_calloc( nine_format_get_level_alloc_size(This->base.info.format, Size, 1, 0), 32); if (!This->managed.data) @@ -134,7 +139,6 @@ u_box_1d(0, Size, &This->managed.dirty_box); list_inithead(&This->managed.list); list_inithead(&This->managed.list2); - list_add(&This->managed.list, &pParams->device->update_buffers); list_add(&This->managed.list2, &pParams->device->managed_buffers); } @@ -162,15 +166,40 @@ list_del(&This->managed.list2); } + if (This->buf) + nine_upload_release_buffer(This->base.base.device->buffer_upload, This->buf); + NineResource9_dtor(&This->base); } struct pipe_resource * -NineBuffer9_GetResource( struct NineBuffer9 *This ) +NineBuffer9_GetResource( struct NineBuffer9 *This, unsigned *offset ) { + if (This->buf) + return nine_upload_buffer_resource_and_offset(This->buf, offset); + *offset = 0; return NineResource9_GetResource(&This->base); } +static void +NineBuffer9_RebindIfRequired( struct NineBuffer9 *This, + struct NineDevice9 *device ) +{ + int i; + + if (!This->bind_count) + return; + for (i = 0; i < device->caps.MaxStreams; i++) { + if (device->state.stream[i] == (struct NineVertexBuffer9 *)This) + nine_context_set_stream_source(device, i, + (struct NineVertexBuffer9 *)This, + device->state.vtxbuf[i].buffer_offset, + device->state.vtxbuf[i].stride); + } + if (device->state.idxbuf == (struct NineIndexBuffer9 *)This) + nine_context_set_indices(device, (struct NineIndexBuffer9 *)This); +} + HRESULT NINE_WINAPI NineBuffer9_Lock( struct NineBuffer9 *This, UINT OffsetToLock, @@ -178,7 +207,9 @@ void **ppbData, DWORD Flags ) { + struct NineDevice9 *device = This->base.base.device; struct pipe_box box; + struct pipe_context *pipe; void *data; unsigned usage; @@ -203,17 +234,19 @@ if (This->base.pool == D3DPOOL_MANAGED) { /* READONLY doesn't dirty the buffer */ + /* Tests on Win: READONLY doesn't wait for the upload */ if (!(Flags & D3DLOCK_READONLY)) { if (!This->managed.dirty) { assert(LIST_IS_EMPTY(&This->managed.list)); This->managed.dirty = TRUE; This->managed.dirty_box = box; - } else { + if (p_atomic_read(&This->managed.pending_upload)) + nine_csmt_process(This->base.base.device); + } else u_box_union_2d(&This->managed.dirty_box, &This->managed.dirty_box, &box); - /* Do not upload while we are locking, we'll add it back later */ - if (!LIST_IS_EMPTY(&This->managed.list)) - list_delinit(&This->managed.list); - } + /* Tests trying to draw while the buffer is locked show that + * MANAGED buffers are made dirty at Lock time */ + BASEBUF_REGISTER_UPDATE(This); } *ppbData = (char *)This->managed.data + OffsetToLock; DBG("returning pointer %p\n", *ppbData); @@ -230,7 +263,11 @@ * D3DERR_WASSTILLDRAWING if the resource is in use, except for DYNAMIC. * Our tests: some apps do use both DISCARD and NOOVERWRITE at the same * time. On windows it seems to return different pointer, thus indicating - * DISCARD is taken into account. */ + * DISCARD is taken into account. + * Our tests: SYSTEMMEM doesn't DISCARD */ + + if (This->base.pool == D3DPOOL_SYSTEMMEM) + Flags &= ~D3DLOCK_DISCARD; if (Flags & D3DLOCK_DISCARD) usage = PIPE_TRANSFER_WRITE | PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE; @@ -241,10 +278,12 @@ if (Flags & D3DLOCK_DONOTWAIT && !(This->base.usage & D3DUSAGE_DYNAMIC)) usage |= PIPE_TRANSFER_DONTBLOCK; + This->discard_nooverwrite_only &= !!(Flags & (D3DLOCK_DISCARD | D3DLOCK_NOOVERWRITE)); + if (This->nmaps == This->maxmaps) { - struct pipe_transfer **newmaps = - REALLOC(This->maps, sizeof(struct pipe_transfer *)*This->maxmaps, - sizeof(struct pipe_transfer *)*(This->maxmaps << 1)); + struct NineTransfer *newmaps = + REALLOC(This->maps, sizeof(struct NineTransfer)*This->maxmaps, + sizeof(struct NineTransfer)*(This->maxmaps << 1)); if (newmaps == NULL) return E_OUTOFMEMORY; @@ -252,8 +291,88 @@ This->maps = newmaps; } - data = This->pipe->transfer_map(This->pipe, This->base.resource, 0, - usage, &box, &This->maps[This->nmaps]); + if (This->buf && !This->discard_nooverwrite_only) { + struct pipe_box src_box; + unsigned offset; + struct pipe_resource *src_res; + DBG("Disabling nine_subbuffer for a buffer having" + "used a nine_subbuffer buffer\n"); + /* Copy buffer content to the buffer resource, which + * we will now use. + * Note: The behaviour may be different from what is expected + * with double lock. However applications can't really make expectations + * about double locks, and don't really use them, so that's ok. */ + src_res = nine_upload_buffer_resource_and_offset(This->buf, &offset); + u_box_1d(offset, This->size, &src_box); + + pipe = NineDevice9_GetPipe(device); + pipe->resource_copy_region(pipe, This->base.resource, 0, 0, 0, 0, + src_res, 0, &src_box); + /* Release previous resource */ + if (This->nmaps >= 1) + This->maps[This->nmaps-1].should_destroy_buf = true; + else + nine_upload_release_buffer(device->buffer_upload, This->buf); + This->buf = NULL; + /* Rebind buffer */ + NineBuffer9_RebindIfRequired(This, device); + } + + This->maps[This->nmaps].transfer = NULL; + This->maps[This->nmaps].is_pipe_secondary = false; + This->maps[This->nmaps].buf = NULL; + This->maps[This->nmaps].should_destroy_buf = false; + + if (This->discard_nooverwrite_only) { + if (This->buf && (Flags & D3DLOCK_DISCARD)) { + /* Release previous buffer */ + if (This->nmaps >= 1) + This->maps[This->nmaps-1].should_destroy_buf = true; + else + nine_upload_release_buffer(device->buffer_upload, This->buf); + This->buf = NULL; + } + + if (!This->buf) { + This->buf = nine_upload_create_buffer(device->buffer_upload, This->base.info.width0); + NineBuffer9_RebindIfRequired(This, device); + } + + if (This->buf) { + This->maps[This->nmaps].buf = This->buf; + This->nmaps++; + *ppbData = nine_upload_buffer_get_map(This->buf) + OffsetToLock; + return D3D_OK; + } else { + /* Fallback to normal path, and don't try again */ + This->discard_nooverwrite_only = false; + } + } + + /* When csmt is active, we want to avoid stalls as much as possible, + * and thus we want to create a new resource on discard and map it + * with the secondary pipe, instead of waiting on the main pipe. */ + if (Flags & D3DLOCK_DISCARD && device->csmt_active) { + struct pipe_screen *screen = NineDevice9_GetScreen(device); + struct pipe_resource *new_res = screen->resource_create(screen, &This->base.info); + if (new_res) { + /* Use the new resource */ + pipe_resource_reference(&This->base.resource, new_res); + pipe_resource_reference(&new_res, NULL); + usage = PIPE_TRANSFER_WRITE | PIPE_TRANSFER_UNSYNCHRONIZED; + NineBuffer9_RebindIfRequired(This, device); + This->maps[This->nmaps].is_pipe_secondary = TRUE; + } + } else if (Flags & D3DLOCK_NOOVERWRITE && device->csmt_active) + This->maps[This->nmaps].is_pipe_secondary = TRUE; + + if (This->maps[This->nmaps].is_pipe_secondary) + pipe = device->pipe_secondary; + else + pipe = NineDevice9_GetPipe(device); + + data = pipe->transfer_map(pipe, This->base.resource, 0, + usage, &box, &This->maps[This->nmaps].transfer); if (!data) { DBG("pipe::transfer_map failed\n" @@ -277,17 +396,25 @@ HRESULT NINE_WINAPI NineBuffer9_Unlock( struct NineBuffer9 *This ) { + struct NineDevice9 *device = This->base.base.device; + struct pipe_context *pipe; DBG("This=%p\n", This); user_assert(This->nmaps > 0, D3DERR_INVALIDCALL); - if (This->base.pool != D3DPOOL_MANAGED) - This->pipe->transfer_unmap(This->pipe, This->maps[--(This->nmaps)]); - else { - This->nmaps--; - /* TODO: Fix this to upload at the first draw call needing the data, - * instead of at the next draw call */ - if (!This->nmaps && This->managed.dirty && LIST_IS_EMPTY(&This->managed.list)) - list_add(&This->managed.list, &This->base.base.device->update_buffers); + This->nmaps--; + if (This->base.pool != D3DPOOL_MANAGED) { + if (!This->maps[This->nmaps].buf) { + pipe = This->maps[This->nmaps].is_pipe_secondary ? + device->pipe_secondary : + nine_context_get_pipe_acquire(device); + pipe->transfer_unmap(pipe, This->maps[This->nmaps].transfer); + /* We need to flush in case the driver does implicit copies */ + if (This->maps[This->nmaps].is_pipe_secondary) + pipe->flush(pipe, NULL, 0); + else + nine_context_get_pipe_release(device); + } else if (This->maps[This->nmaps].should_destroy_buf) + nine_upload_release_buffer(device->buffer_upload, This->maps[This->nmaps].buf); } return D3D_OK; } @@ -297,10 +424,7 @@ { assert(This->base.pool == D3DPOOL_MANAGED); - if (!This->managed.dirty) { - assert(LIST_IS_EMPTY(&This->managed.list)); - list_add(&This->managed.list, &This->base.base.device->update_buffers); - This->managed.dirty = TRUE; - } + This->managed.dirty = TRUE; u_box_1d(0, This->size, &This->managed.dirty_box); + BASEBUF_REGISTER_UPDATE(This); } diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/buffer9.h mesa-17.0.7/src/gallium/state_trackers/nine/buffer9.h --- mesa-12.0.6/src/gallium/state_trackers/nine/buffer9.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/buffer9.h 2017-06-01 10:37:10.000000000 +0000 @@ -24,6 +24,9 @@ #ifndef _NINE_BUFFER9_H_ #define _NINE_BUFFER9_H_ +#include "device9.h" +#include "nine_buffer_upload.h" +#include "nine_state.h" #include "resource9.h" #include "pipe/p_context.h" #include "pipe/p_state.h" @@ -33,16 +36,28 @@ struct pipe_context; struct pipe_transfer; +struct NineTransfer { + struct pipe_transfer *transfer; + bool is_pipe_secondary; + struct nine_subbuffer *buf; /* NULL unless subbuffer are used */ + bool should_destroy_buf; /* If the subbuffer should be destroyed */ +}; + struct NineBuffer9 { struct NineResource9 base; /* G3D */ - struct pipe_context *pipe; - struct pipe_transfer **maps; + struct NineTransfer *maps; int nmaps, maxmaps; UINT size; + int16_t bind_count; /* to Device9->state.stream */ + /* Whether only discard and nooverwrite were used so far + * for this buffer. Allows some optimization. */ + boolean discard_nooverwrite_only; + struct nine_subbuffer *buf; + /* Specific to managed buffers */ struct { void *data; @@ -50,6 +65,7 @@ struct pipe_box dirty_box; struct list_head list; /* for update_buffers */ struct list_head list2; /* for managed_buffers */ + unsigned pending_upload; /* for uploads */ } managed; }; static inline struct NineBuffer9 * @@ -70,7 +86,7 @@ NineBuffer9_dtor( struct NineBuffer9 *This ); struct pipe_resource * -NineBuffer9_GetResource( struct NineBuffer9 *This ); +NineBuffer9_GetResource( struct NineBuffer9 *This, unsigned *offset ); HRESULT NINE_WINAPI NineBuffer9_Lock( struct NineBuffer9 *This, @@ -85,17 +101,41 @@ static inline void NineBuffer9_Upload( struct NineBuffer9 *This ) { - struct pipe_context *pipe = This->pipe; + struct NineDevice9 *device = This->base.base.device; assert(This->base.pool == D3DPOOL_MANAGED && This->managed.dirty); - pipe->transfer_inline_write(pipe, This->base.resource, 0, 0, - &This->managed.dirty_box, - (char *)This->managed.data + This->managed.dirty_box.x, - This->size, This->size); + nine_context_range_upload(device, &This->managed.pending_upload, This->base.resource, + This->managed.dirty_box.x, + This->managed.dirty_box.width, + (char *)This->managed.data + This->managed.dirty_box.x); This->managed.dirty = FALSE; } +static void inline +NineBindBufferToDevice( struct NineDevice9 *device, + struct NineBuffer9 **slot, + struct NineBuffer9 *buf ) +{ + struct NineBuffer9 *old = *slot; + + if (buf) { + if ((buf->managed.dirty) && LIST_IS_EMPTY(&buf->managed.list)) + list_add(&buf->managed.list, &device->update_buffers); + buf->bind_count++; + } + if (old) + old->bind_count--; + + nine_bind(slot, buf); +} + void NineBuffer9_SetDirty( struct NineBuffer9 *This ); +#define BASEBUF_REGISTER_UPDATE(b) { \ + if ((b)->managed.dirty && (b)->bind_count) \ + if (LIST_IS_EMPTY(&(b)->managed.list)) \ + list_add(&(b)->managed.list, &(b)->base.base.device->update_buffers); \ + } + #endif /* _NINE_BUFFER9_H_ */ diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/cubetexture9.c mesa-17.0.7/src/gallium/state_trackers/nine/cubetexture9.c --- mesa-12.0.6/src/gallium/state_trackers/nine/cubetexture9.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/cubetexture9.c 2017-06-01 10:37:10.000000000 +0000 @@ -101,9 +101,6 @@ if (Usage & D3DUSAGE_DYNAMIC) { info->usage = PIPE_USAGE_DYNAMIC; - info->bind |= - PIPE_BIND_TRANSFER_READ | - PIPE_BIND_TRANSFER_WRITE; } if (Usage & D3DUSAGE_SOFTWAREPROCESSING) DBG("Application asked for Software Vertex Processing, " @@ -114,7 +111,7 @@ face_size = nine_format_get_size_and_offsets(pf, level_offsets, EdgeLength, EdgeLength, info->last_level); - This->managed_buffer = align_malloc(6 * face_size, 32); + This->managed_buffer = align_calloc(6 * face_size, 32); if (!This->managed_buffer) return E_OUTOFMEMORY; } @@ -176,7 +173,7 @@ DBG("This=%p\n", This); if (This->surfaces) { - for (i = 0; i < This->base.base.info.last_level * 6; ++i) + for (i = 0; i < (This->base.base.info.last_level + 1) * 6; ++i) NineUnknown_Destroy(&This->surfaces[i]->base.base); FREE(This->surfaces); } @@ -288,10 +285,14 @@ This->base.base.info.height0, &This->dirty_rect[FaceType]); } else { - struct pipe_box box; - rect_to_pipe_box_clamp(&box, pDirtyRect); - u_box_union_2d(&This->dirty_rect[FaceType], &This->dirty_rect[FaceType], - &box); + if (This->dirty_rect[FaceType].width == 0) { + rect_to_pipe_box_clamp(&This->dirty_rect[FaceType], pDirtyRect); + } else { + struct pipe_box box; + rect_to_pipe_box_clamp(&box, pDirtyRect); + u_box_union_2d(&This->dirty_rect[FaceType], &This->dirty_rect[FaceType], + &box); + } (void) u_box_clip_2d(&This->dirty_rect[FaceType], &This->dirty_rect[FaceType], This->base.base.info.width0, @@ -305,9 +306,9 @@ (void *)NineUnknown_AddRef, (void *)NineUnknown_Release, (void *)NineUnknown_GetDevice, /* actually part of Resource9 iface */ - (void *)NineResource9_SetPrivateData, - (void *)NineResource9_GetPrivateData, - (void *)NineResource9_FreePrivateData, + (void *)NineUnknown_SetPrivateData, + (void *)NineUnknown_GetPrivateData, + (void *)NineUnknown_FreePrivateData, (void *)NineResource9_SetPriority, (void *)NineResource9_GetPriority, (void *)NineBaseTexture9_PreLoad, diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/device9.c mesa-17.0.7/src/gallium/state_trackers/nine/device9.c --- mesa-12.0.6/src/gallium/state_trackers/nine/device9.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/device9.c 2017-06-01 10:37:10.000000000 +0000 @@ -34,6 +34,7 @@ #include "texture9.h" #include "cubetexture9.h" #include "volumetexture9.h" +#include "nine_buffer_upload.h" #include "nine_helpers.h" #include "nine_pipe.h" #include "nine_ff.h" @@ -92,31 +93,28 @@ nine_state_set_defaults(This, &This->caps, is_reset); + refSurf = This->swapchains[0]->buffers[0]; + assert(refSurf); + This->state.viewport.X = 0; This->state.viewport.Y = 0; - This->state.viewport.Width = 0; - This->state.viewport.Height = 0; + This->state.viewport.Width = refSurf->desc.Width; + This->state.viewport.Height = refSurf->desc.Height; + + nine_context_set_viewport(This, &This->state.viewport); This->state.scissor.minx = 0; This->state.scissor.miny = 0; - This->state.scissor.maxx = 0xffff; - This->state.scissor.maxy = 0xffff; + This->state.scissor.maxx = refSurf->desc.Width; + This->state.scissor.maxy = refSurf->desc.Height; - if (This->nswapchains && This->swapchains[0]->params.BackBufferCount) - refSurf = This->swapchains[0]->buffers[0]; - - if (refSurf) { - This->state.viewport.Width = refSurf->desc.Width; - This->state.viewport.Height = refSurf->desc.Height; - This->state.scissor.maxx = refSurf->desc.Width; - This->state.scissor.maxy = refSurf->desc.Height; - } + nine_context_set_scissor(This, &This->state.scissor); if (This->nswapchains && This->swapchains[0]->params.EnableAutoDepthStencil) { - This->state.rs[D3DRS_ZENABLE] = TRUE; + nine_context_set_render_state(This, D3DRS_ZENABLE, TRUE); This->state.rs_advertised[D3DRS_ZENABLE] = TRUE; } - if (This->state.rs[D3DRS_ZENABLE]) + if (This->state.rs_advertised[D3DRS_ZENABLE]) NineDevice9_SetDepthStencilSurface( This, (IDirect3DSurface9 *)This->swapchains[0]->zsbuf); } @@ -152,6 +150,7 @@ list_inithead(&This->managed_textures); This->screen = pScreen; + This->screen_sw = pCTX->ref; This->caps = *pCaps; This->d3d9 = pD3D9; This->params = *pCreationParameters; @@ -165,19 +164,48 @@ if (!(This->params.BehaviorFlags & D3DCREATE_FPU_PRESERVE)) nine_setup_fpu(); - if (This->params.BehaviorFlags & D3DCREATE_SOFTWARE_VERTEXPROCESSING) - DBG("Application asked full Software Vertex Processing. Ignoring.\n"); - if (This->params.BehaviorFlags & D3DCREATE_MIXED_VERTEXPROCESSING) - DBG("Application asked mixed Software Vertex Processing. Ignoring.\n"); - - This->pipe = This->screen->context_create(This->screen, NULL, 0); - if (!This->pipe) { return E_OUTOFMEMORY; } /* guess */ - - This->cso = cso_create_context(This->pipe); - if (!This->cso) { return E_OUTOFMEMORY; } /* also a guess */ + if (This->params.BehaviorFlags & D3DCREATE_SOFTWARE_VERTEXPROCESSING) { + DBG("Application asked full Software Vertex Processing.\n"); + This->swvp = true; + This->may_swvp = true; + } else + This->swvp = false; + if (This->params.BehaviorFlags & D3DCREATE_MIXED_VERTEXPROCESSING) { + DBG("Application asked mixed Software Vertex Processing.\n"); + This->may_swvp = true; + } + This->context.swvp = This->swvp; + /* TODO: check if swvp is resetted by device Resets */ + + if (This->may_swvp && + (This->screen->get_shader_param(This->screen, PIPE_SHADER_VERTEX, + PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE) + < (NINE_MAX_CONST_F_SWVP/2) * sizeof(float[4]) || + This->screen->get_shader_param(This->screen, PIPE_SHADER_VERTEX, + PIPE_SHADER_CAP_MAX_CONST_BUFFERS) < 5)) { + /* Note: We just go on, some apps never use the abilities of + * swvp, and just set more constants than allowed at init. + * Only cards we support that are affected are the r500 */ + WARN("Card unable to handle Software Vertex Processing. Game may fail\n"); + } + + /* When may_swvp, SetConstant* limits are different */ + if (This->may_swvp) + This->caps.MaxVertexShaderConst = NINE_MAX_CONST_F_SWVP; + + This->context.pipe = This->screen->context_create(This->screen, NULL, 0); + This->pipe_secondary = This->screen->context_create(This->screen, NULL, 0); + if (!This->context.pipe || !This->pipe_secondary) { return E_OUTOFMEMORY; } /* guess */ + This->pipe_sw = This->screen_sw->context_create(This->screen_sw, NULL, 0); + if (!This->pipe_sw) { return E_OUTOFMEMORY; } + + This->context.cso = cso_create_context(This->context.pipe); + if (!This->context.cso) { return E_OUTOFMEMORY; } /* also a guess */ + This->cso_sw = cso_create_context(This->pipe_sw); + if (!This->cso_sw) { return E_OUTOFMEMORY; } /* Create first, it messes up our state. */ - This->hud = hud_create(This->pipe, This->cso); /* NULL result is fine */ + This->hud = hud_create(This->context.pipe, This->context.cso); /* NULL result is fine */ /* Available memory counter. Updated only for allocations with this device * instance. This is the Win 7 behavior. @@ -234,9 +262,36 @@ if (FAILED(hr)) return hr; NineUnknown_ConvertRefToBind(NineUnknown(This->state.rt[i])); + nine_bind(&This->context.rt[i], This->state.rt[i]); + } + + /* Initialize CSMT */ + if (pCTX->csmt_force == 1) + This->csmt_active = true; + else if (pCTX->csmt_force == 0) + This->csmt_active = false; + else + /* r600 and radeonsi are thread safe. */ + This->csmt_active = strstr(pScreen->get_name(pScreen), "AMD") != NULL; + + /* We rely on u_upload_mgr using persistent coherent buffers (which don't + * require flush to work in multi-pipe_context scenario) for vertex and + * index buffers */ + if (!GET_PCAP(BUFFER_MAP_PERSISTENT_COHERENT)) + This->csmt_active = false; + + if (This->csmt_active) { + This->csmt_ctx = nine_csmt_create(This); + if (!This->csmt_ctx) + return E_OUTOFMEMORY; } - /* Initialize a dummy VBO to be used when a a vertex declaration does not + if (This->csmt_active) + DBG("\033[1;32mCSMT is active\033[0m\n"); + + This->buffer_upload = nine_upload_create(This->pipe_secondary, 4 * 1024 * 1024, 4); + + /* Initialize a dummy VBO to be used when a vertex declaration does not * specify all the inputs needed by vertex shader, on win default behavior * is to pass 0,0,0,0 to the shader */ { @@ -245,6 +300,7 @@ struct pipe_box box; unsigned char *data; + memset(&tmpl, 0, sizeof(tmpl)); tmpl.target = PIPE_BUFFER; tmpl.format = PIPE_FORMAT_R8_UNORM; tmpl.width0 = 16; /* 4 floats */ @@ -254,7 +310,7 @@ tmpl.last_level = 0; tmpl.nr_samples = 0; tmpl.usage = PIPE_USAGE_DEFAULT; - tmpl.bind = PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_TRANSFER_WRITE; + tmpl.bind = PIPE_BIND_VERTEX_BUFFER; tmpl.flags = 0; This->dummy_vbo = pScreen->resource_create(pScreen, &tmpl); @@ -262,14 +318,14 @@ return D3DERR_OUTOFVIDEOMEMORY; u_box_1d(0, 16, &box); - data = This->pipe->transfer_map(This->pipe, This->dummy_vbo, 0, + data = This->context.pipe->transfer_map(This->context.pipe, This->dummy_vbo, 0, PIPE_TRANSFER_WRITE | PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE, &box, &transfer); assert(data); assert(transfer); memset(data, 0, 16); - This->pipe->transfer_unmap(This->pipe, transfer); + This->context.pipe->transfer_unmap(This->context.pipe, transfer); } This->cursor.software = FALSE; @@ -277,6 +333,7 @@ This->cursor.hotspot.y = -1; { struct pipe_resource tmpl; + memset(&tmpl, 0, sizeof(tmpl)); tmpl.target = PIPE_TEXTURE_2D; tmpl.format = PIPE_FORMAT_R8G8B8A8_UNORM; tmpl.width0 = 64; @@ -292,11 +349,15 @@ This->cursor.image = pScreen->resource_create(pScreen, &tmpl); if (!This->cursor.image) return D3DERR_OUTOFVIDEOMEMORY; + + /* For uploading 32x32 (argb) cursor */ + This->cursor.hw_upload_temp = MALLOC(32 * 4 * 32); + if (!This->cursor.hw_upload_temp) + return D3DERR_OUTOFVIDEOMEMORY; } /* Create constant buffers. */ { - struct pipe_resource tmpl; unsigned max_const_vs, max_const_ps; /* vs 3.0: >= 256 float constants, but for cards with exactly 256 slots, @@ -317,41 +378,43 @@ This->vs_const_size = max_const_vs * sizeof(float[4]); This->ps_const_size = max_const_ps * sizeof(float[4]); /* Include space for I,B constants for user constbuf. */ - This->state.vs_const_f = CALLOC(This->vs_const_size, 1); + if (This->may_swvp) { + This->state.vs_const_f = CALLOC(NINE_MAX_CONST_F_SWVP * sizeof(float[4]),1); + This->context.vs_const_f_swvp = CALLOC(NINE_MAX_CONST_F_SWVP * sizeof(float[4]),1); + if (!This->context.vs_const_f_swvp) + return E_OUTOFMEMORY; + This->state.vs_lconstf_temp = CALLOC(NINE_MAX_CONST_F_SWVP * sizeof(float[4]),1); + This->context.vs_lconstf_temp = CALLOC(NINE_MAX_CONST_F_SWVP * sizeof(float[4]),1); + This->state.vs_const_i = CALLOC(NINE_MAX_CONST_I_SWVP * sizeof(int[4]), 1); + This->context.vs_const_i = CALLOC(NINE_MAX_CONST_I_SWVP * sizeof(int[4]), 1); + This->state.vs_const_b = CALLOC(NINE_MAX_CONST_B_SWVP * sizeof(BOOL), 1); + This->context.vs_const_b = CALLOC(NINE_MAX_CONST_B_SWVP * sizeof(BOOL), 1); + } else { + This->state.vs_const_f = CALLOC(NINE_MAX_CONST_F * sizeof(float[4]), 1); + This->context.vs_const_f_swvp = NULL; + This->state.vs_lconstf_temp = CALLOC(This->vs_const_size,1); + This->context.vs_lconstf_temp = CALLOC(This->vs_const_size,1); + This->state.vs_const_i = CALLOC(NINE_MAX_CONST_I * sizeof(int[4]), 1); + This->context.vs_const_i = CALLOC(NINE_MAX_CONST_I * sizeof(int[4]), 1); + This->state.vs_const_b = CALLOC(NINE_MAX_CONST_B * sizeof(BOOL), 1); + This->context.vs_const_b = CALLOC(NINE_MAX_CONST_B * sizeof(BOOL), 1); + } + This->context.vs_const_f = CALLOC(This->vs_const_size, 1); This->state.ps_const_f = CALLOC(This->ps_const_size, 1); - This->state.vs_lconstf_temp = CALLOC(This->vs_const_size,1); - This->state.ps_lconstf_temp = CALLOC(This->ps_const_size,1); - if (!This->state.vs_const_f || !This->state.ps_const_f || - !This->state.vs_lconstf_temp || !This->state.ps_lconstf_temp) + This->context.ps_const_f = CALLOC(This->ps_const_size, 1); + This->context.ps_lconstf_temp = CALLOC(This->ps_const_size,1); + if (!This->state.vs_const_f || !This->context.vs_const_f || + !This->state.ps_const_f || !This->context.ps_const_f || + !This->state.vs_lconstf_temp || !This->context.vs_lconstf_temp || + !This->context.ps_lconstf_temp || + !This->state.vs_const_i || !This->context.vs_const_i || + !This->state.vs_const_b || !This->context.vs_const_b) return E_OUTOFMEMORY; if (strstr(pScreen->get_name(pScreen), "AMD") || strstr(pScreen->get_name(pScreen), "ATI")) { This->driver_bugs.buggy_barycentrics = TRUE; } - - /* Disable NV path for now, needs some fixes */ - This->prefer_user_constbuf = TRUE; - - tmpl.target = PIPE_BUFFER; - tmpl.format = PIPE_FORMAT_R8_UNORM; - tmpl.height0 = 1; - tmpl.depth0 = 1; - tmpl.array_size = 1; - tmpl.last_level = 0; - tmpl.nr_samples = 0; - tmpl.usage = PIPE_USAGE_DYNAMIC; - tmpl.bind = PIPE_BIND_CONSTANT_BUFFER; - tmpl.flags = 0; - - tmpl.width0 = This->vs_const_size; - This->constbuf_vs = pScreen->resource_create(pScreen, &tmpl); - - tmpl.width0 = This->ps_const_size; - This->constbuf_ps = pScreen->resource_create(pScreen, &tmpl); - - if (!This->constbuf_vs || !This->constbuf_ps) - return E_OUTOFMEMORY; } /* allocate dummy texture/sampler for when there are missing ones bound */ @@ -359,6 +422,7 @@ struct pipe_resource tmplt; struct pipe_sampler_view templ; struct pipe_sampler_state samp; + memset(&tmplt, 0, sizeof(tmplt)); memset(&samp, 0, sizeof(samp)); tmplt.target = PIPE_TEXTURE_2D; @@ -388,7 +452,7 @@ templ.swizzle_a = PIPE_SWIZZLE_1; templ.target = This->dummy_texture->target; - This->dummy_sampler_view = This->pipe->create_sampler_view(This->pipe, This->dummy_texture, &templ); + This->dummy_sampler_view = This->context.pipe->create_sampler_view(This->context.pipe, This->dummy_texture, &templ); if (!This->dummy_sampler_view) return D3DERR_DRIVERINTERNALERROR; @@ -402,31 +466,46 @@ samp.compare_mode = PIPE_TEX_COMPARE_NONE; samp.compare_func = PIPE_FUNC_LEQUAL; samp.normalized_coords = 1; - samp.seamless_cube_map = 1; + samp.seamless_cube_map = 0; This->dummy_sampler_state = samp; } /* Allocate upload helper for drivers that suck (from st pov ;). */ - This->driver_caps.user_vbufs = GET_PCAP(USER_VERTEX_BUFFERS); - This->driver_caps.user_ibufs = GET_PCAP(USER_INDEX_BUFFERS); + This->driver_caps.user_vbufs = GET_PCAP(USER_VERTEX_BUFFERS) && !This->csmt_active; + This->driver_caps.user_ibufs = GET_PCAP(USER_INDEX_BUFFERS) && !This->csmt_active; This->driver_caps.user_cbufs = GET_PCAP(USER_CONSTANT_BUFFERS); + This->driver_caps.user_sw_vbufs = This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_VERTEX_BUFFERS); + This->driver_caps.user_sw_cbufs = This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_CONSTANT_BUFFERS); + /* Implicit use of context pipe for vertex and index uploaded when + * csmt is not active. Does not need to sync since csmt is unactive, + * thus no need to call NineDevice9_GetPipe at each upload. */ if (!This->driver_caps.user_vbufs) - This->vertex_uploader = u_upload_create(This->pipe, 65536, + This->vertex_uploader = u_upload_create(This->csmt_active ? + This->pipe_secondary : This->context.pipe, + 65536, PIPE_BIND_VERTEX_BUFFER, PIPE_USAGE_STREAM); + This->vertex_sw_uploader = u_upload_create(This->pipe_sw, 65536, + PIPE_BIND_VERTEX_BUFFER, PIPE_USAGE_STREAM); if (!This->driver_caps.user_ibufs) - This->index_uploader = u_upload_create(This->pipe, 128 * 1024, + This->index_uploader = u_upload_create(This->csmt_active ? + This->pipe_secondary : This->context.pipe, + 128 * 1024, PIPE_BIND_INDEX_BUFFER, PIPE_USAGE_STREAM); if (!This->driver_caps.user_cbufs) { This->constbuf_alignment = GET_PCAP(CONSTANT_BUFFER_OFFSET_ALIGNMENT); - This->constbuf_uploader = u_upload_create(This->pipe, This->vs_const_size, + This->constbuf_uploader = u_upload_create(This->context.pipe, This->vs_const_size, PIPE_BIND_CONSTANT_BUFFER, PIPE_USAGE_STREAM); } + This->constbuf_sw_uploader = u_upload_create(This->pipe_sw, 128 * 1024, + PIPE_BIND_CONSTANT_BUFFER, PIPE_USAGE_STREAM); + This->driver_caps.window_space_position_support = GET_PCAP(TGSI_VS_WINDOW_SPACE_POSITION); This->driver_caps.vs_integer = pScreen->get_shader_param(pScreen, PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_INTEGERS); This->driver_caps.ps_integer = pScreen->get_shader_param(pScreen, PIPE_SHADER_FRAGMENT, PIPE_SHADER_CAP_INTEGERS); + This->driver_caps.offset_units_unscaled = GET_PCAP(POLYGON_OFFSET_UNITS_UNSCALED); nine_ff_init(This); /* initialize fixed function code */ @@ -435,13 +514,15 @@ { struct pipe_poly_stipple stipple; memset(&stipple, ~0, sizeof(stipple)); - This->pipe->set_polygon_stipple(This->pipe, &stipple); + This->context.pipe->set_polygon_stipple(This->context.pipe, &stipple); } This->update = &This->state; - nine_update_state(This); + + nine_state_init_sw(This); ID3DPresentGroup_Release(This->present); + nine_csmt_process(This); return D3D_OK; } @@ -454,10 +535,22 @@ DBG("This=%p\n", This); - if (This->pipe && This->cso) - nine_pipe_context_clear(This); + /* Flush all pending commands to get refcount right, + * and properly release bound objects. It is ok to still + * execute commands while we are in device dtor, because + * we haven't released anything yet. Note that no pending + * command can increase the device refcount. */ + if (This->csmt_active && This->csmt_ctx) { + nine_csmt_process(This); + nine_csmt_destroy(This, This->csmt_ctx); + This->csmt_active = FALSE; + This->csmt_ctx = NULL; + } + nine_ff_fini(This); + nine_state_destroy_sw(This); nine_state_clear(&This->state, TRUE); + nine_context_clear(This); if (This->vertex_uploader) u_upload_destroy(This->vertex_uploader); @@ -465,18 +558,31 @@ u_upload_destroy(This->index_uploader); if (This->constbuf_uploader) u_upload_destroy(This->constbuf_uploader); + if (This->vertex_sw_uploader) + u_upload_destroy(This->vertex_sw_uploader); + if (This->constbuf_sw_uploader) + u_upload_destroy(This->constbuf_sw_uploader); nine_bind(&This->record, NULL); pipe_sampler_view_reference(&This->dummy_sampler_view, NULL); pipe_resource_reference(&This->dummy_texture, NULL); - pipe_resource_reference(&This->constbuf_vs, NULL); - pipe_resource_reference(&This->constbuf_ps, NULL); pipe_resource_reference(&This->dummy_vbo, NULL); FREE(This->state.vs_const_f); + FREE(This->context.vs_const_f); FREE(This->state.ps_const_f); + FREE(This->context.ps_const_f); FREE(This->state.vs_lconstf_temp); - FREE(This->state.ps_lconstf_temp); + FREE(This->context.vs_lconstf_temp); + FREE(This->context.ps_lconstf_temp); + FREE(This->state.vs_const_i); + FREE(This->context.vs_const_i); + FREE(This->state.vs_const_b); + FREE(This->context.vs_const_b); + FREE(This->context.vs_const_f_swvp); + + pipe_resource_reference(&This->cursor.image, NULL); + FREE(This->cursor.hw_upload_temp); if (This->swapchains) { for (i = 0; i < This->nswapchains; ++i) @@ -485,13 +591,15 @@ FREE(This->swapchains); } - /* state stuff */ - if (This->pipe) { - if (This->cso) { - cso_destroy_context(This->cso); - } - if (This->pipe->destroy) { This->pipe->destroy(This->pipe); } - } + if (This->buffer_upload) + nine_upload_destroy(This->buffer_upload); + + /* Destroy cso first */ + if (This->context.cso) { cso_destroy_context(This->context.cso); } + if (This->cso_sw) { cso_destroy_context(This->cso_sw); } + if (This->context.pipe && This->context.pipe->destroy) { This->context.pipe->destroy(This->context.pipe); } + if (This->pipe_secondary && This->pipe_secondary->destroy) { This->pipe_secondary->destroy(This->pipe_secondary); } + if (This->pipe_sw && This->pipe_sw->destroy) { This->pipe_sw->destroy(This->pipe_sw); } if (This->present) { ID3DPresentGroup_Release(This->present); } if (This->d3d9) { IDirect3D9_Release(This->d3d9); } @@ -508,13 +616,7 @@ struct pipe_context * NineDevice9_GetPipe( struct NineDevice9 *This ) { - return This->pipe; -} - -struct cso_context * -NineDevice9_GetCSO( struct NineDevice9 *This ) -{ - return This->cso; + return nine_context_get_pipe(This); } const D3DCAPS9 * @@ -632,7 +734,7 @@ IDirect3DSurface9 *pCursorBitmap ) { struct NineSurface9 *surf = NineSurface9(pCursorBitmap); - struct pipe_context *pipe = This->pipe; + struct pipe_context *pipe = NineDevice9_GetPipe(This); struct pipe_box box; struct pipe_transfer *transfer; BOOL hw_cursor; @@ -683,11 +785,20 @@ lock.pBits, lock.Pitch, This->cursor.w, This->cursor.h); - if (hw_cursor) + if (hw_cursor) { + void *data = lock.pBits; + /* SetCursor assumes 32x32 argb with pitch 128 */ + if (lock.Pitch != 128) { + sfmt->unpack_rgba_8unorm(This->cursor.hw_upload_temp, 128, + lock.pBits, lock.Pitch, + 32, 32); + data = This->cursor.hw_upload_temp; + } hw_cursor = ID3DPresent_SetCursor(This->swapchains[0]->present, - lock.pBits, + data, &This->cursor.hotspot, This->cursor.visible) == D3D_OK; + } NineSurface9_UnlockRect(surf); } @@ -811,8 +922,9 @@ break; } - nine_pipe_context_clear(This); + nine_csmt_process(This); nine_state_clear(&This->state, TRUE); + nine_context_clear(This); NineDevice9_SetDefaultState(This, TRUE); NineDevice9_SetRenderTarget( @@ -1100,11 +1212,8 @@ HANDLE *pSharedHandle) { struct NineSurface9 *surface; - struct pipe_screen *screen = This->screen; - struct pipe_resource *resource = NULL; HRESULT hr; D3DSURFACE_DESC desc; - struct pipe_resource templ; DBG("This=%p type=%u Pool=%s Width=%u Height=%u Format=%s MS=%u Quality=%u " "Discard_or_Lockable=%i ppSurface=%p pSharedHandle=%p\n", @@ -1118,30 +1227,6 @@ user_assert(Width && Height, D3DERR_INVALIDCALL); user_assert(Pool != D3DPOOL_MANAGED, D3DERR_INVALIDCALL); - templ.target = PIPE_TEXTURE_2D; - templ.width0 = Width; - templ.height0 = Height; - templ.depth0 = 1; - templ.array_size = 1; - templ.last_level = 0; - templ.nr_samples = (unsigned)MultiSample; - templ.usage = PIPE_USAGE_DEFAULT; - templ.flags = 0; - templ.bind = PIPE_BIND_SAMPLER_VIEW; /* StretchRect */ - switch (type) { - case 0: templ.bind |= PIPE_BIND_RENDER_TARGET; break; - case 1: templ.bind = d3d9_get_pipe_depth_format_bindings(Format); break; - default: - assert(type == 2); - break; - } - templ.format = d3d9_to_pipe_format_checked(screen, Format, templ.target, - templ.nr_samples, templ.bind, - FALSE, Pool == D3DPOOL_SCRATCH); - - if (templ.format == PIPE_FORMAT_NONE && Format != D3DFMT_NULL) - return D3DERR_INVALIDCALL; - desc.Format = Format; desc.Type = D3DRTYPE_SURFACE; desc.Usage = 0; @@ -1153,31 +1238,17 @@ switch (type) { case 0: desc.Usage = D3DUSAGE_RENDERTARGET; break; case 1: desc.Usage = D3DUSAGE_DEPTHSTENCIL; break; - default: break; + default: assert(type == 2); break; } - if (compressed_format(Format)) { - const unsigned w = util_format_get_blockwidth(templ.format); - const unsigned h = util_format_get_blockheight(templ.format); - - user_assert(!(Width % w) && !(Height % h), D3DERR_INVALIDCALL); - } + hr = NineSurface9_new(This, NULL, NULL, NULL, 0, 0, 0, &desc, &surface); + if (SUCCEEDED(hr)) { + *ppSurface = (IDirect3DSurface9 *)surface; - if (Pool == D3DPOOL_DEFAULT && Format != D3DFMT_NULL) { - /* resource_create doesn't return an error code, so check format here */ - user_assert(templ.format != PIPE_FORMAT_NONE, D3DERR_INVALIDCALL); - resource = screen->resource_create(screen, &templ); - user_assert(resource, D3DERR_OUTOFVIDEOMEMORY); - if (Discard_or_Lockable && (desc.Usage & D3DUSAGE_RENDERTARGET)) - resource->flags |= NINE_RESOURCE_FLAG_LOCKABLE; - } else { - resource = NULL; + if (surface->base.resource && Discard_or_Lockable && (type != 1)) + surface->base.resource->flags |= NINE_RESOURCE_FLAG_LOCKABLE; } - hr = NineSurface9_new(This, NULL, resource, NULL, 0, 0, 0, &desc, &surface); - pipe_resource_reference(&resource, NULL); - if (SUCCEEDED(hr)) - *ppSurface = (IDirect3DSurface9 *)surface; return hr; } @@ -1462,6 +1533,8 @@ DBG("This=%p pRenderTarget=%p pDestSurface=%p\n", This, pRenderTarget, pDestSurface); + user_assert(pRenderTarget && pDestSurface, D3DERR_INVALIDCALL); + user_assert(dst->desc.Pool == D3DPOOL_SYSTEMMEM, D3DERR_INVALIDCALL); user_assert(src->desc.Pool == D3DPOOL_DEFAULT, D3DERR_INVALIDCALL); @@ -1471,6 +1544,8 @@ user_assert(src->desc.Width == dst->desc.Width, D3DERR_INVALIDCALL); user_assert(src->desc.Height == dst->desc.Height, D3DERR_INVALIDCALL); + user_assert(src->desc.Format != D3DFMT_NULL, D3DERR_INVALIDCALL); + NineSurface9_CopyDefaultToMem(dst, src); return D3D_OK; @@ -1500,7 +1575,6 @@ D3DTEXTUREFILTERTYPE Filter ) { struct pipe_screen *screen = This->screen; - struct pipe_context *pipe = This->pipe; struct NineSurface9 *dst = NineSurface9(pDestSurface); struct NineSurface9 *src = NineSurface9(pSourceSurface); struct pipe_resource *dst_res = NineSurface9_GetResource(dst); @@ -1660,7 +1734,8 @@ clamped = !!xy; } - ms = (dst->desc.MultiSampleType | 1) != (src->desc.MultiSampleType | 1); + ms = (dst->desc.MultiSampleType != src->desc.MultiSampleType) || + (dst->desc.MultiSampleQuality != src->desc.MultiSampleQuality); if (clamped || scaled || (blit.dst.format != blit.src.format) || ms) { DBG("using pipe->blit()\n"); @@ -1672,7 +1747,8 @@ PIPE_BIND_RENDER_TARGET), D3DERR_INVALIDCALL); - pipe->blit(pipe, &blit); + nine_context_blit(This, (struct NineUnknown *)dst, + (struct NineUnknown *)src, &blit); } else { assert(blit.dst.box.x >= 0 && blit.dst.box.y >= 0 && blit.src.box.x >= 0 && blit.src.box.y >= 0 && @@ -1682,11 +1758,12 @@ blit.src.box.y + blit.src.box.height <= src->desc.Height); /* Or drivers might crash ... */ DBG("Using resource_copy_region.\n"); - pipe->resource_copy_region(pipe, - blit.dst.resource, blit.dst.level, - blit.dst.box.x, blit.dst.box.y, blit.dst.box.z, - blit.src.resource, blit.src.level, - &blit.src.box); + nine_context_resource_copy_region(This, (struct NineUnknown *)dst, + (struct NineUnknown *)src, + blit.dst.resource, blit.dst.level, + &blit.dst.box, + blit.src.resource, blit.src.level, + &blit.src.box); } /* Communicate the container it needs to update sublevels - if apply */ @@ -1701,12 +1778,8 @@ const RECT *pRect, D3DCOLOR color ) { - struct pipe_context *pipe = This->pipe; struct NineSurface9 *surf = NineSurface9(pSurface); - struct pipe_surface *psurf; unsigned x, y, w, h; - union pipe_color_union rgba; - boolean fallback; DBG("This=%p pSurface=%p pRect=%p color=%08x\n", This, pSurface, pRect, color); @@ -1740,24 +1813,15 @@ w = surf->desc.Width; h = surf->desc.Height; } - d3dcolor_to_pipe_color_union(&rgba, color); - - fallback = !(surf->base.info.bind & PIPE_BIND_RENDER_TARGET); - - if (!fallback) { - psurf = NineSurface9_GetSurface(surf, 0); - if (!psurf) - fallback = TRUE; - } - if (!fallback) { - pipe->clear_render_target(pipe, psurf, &rgba, x, y, w, h); + if (surf->base.info.bind & PIPE_BIND_RENDER_TARGET) { + nine_context_clear_render_target(This, surf, color, x, y, w, h); } else { D3DLOCKED_RECT lock; union util_color uc; HRESULT hr; /* XXX: lock pRect and fix util_fill_rect */ - hr = NineSurface9_LockRect(surf, &lock, NULL, 0); + hr = NineSurface9_LockRect(surf, &lock, NULL, pRect ? 0 : D3DLOCK_DISCARD); if (FAILED(hr)) return hr; util_pack_color_ub(color >> 16, color >> 8, color >> 0, color >> 24, @@ -1831,14 +1895,12 @@ This->state.scissor.miny = 0; This->state.scissor.maxx = rt->desc.Width; This->state.scissor.maxy = rt->desc.Height; - - This->state.changed.group |= NINE_STATE_VIEWPORT | NINE_STATE_SCISSOR | NINE_STATE_MULTISAMPLE; } - if (This->state.rt[i] != NineSurface9(pRenderTarget)) { - nine_bind(&This->state.rt[i], pRenderTarget); - This->state.changed.group |= NINE_STATE_FB; - } + if (This->state.rt[i] != NineSurface9(pRenderTarget)) + nine_bind(&This->state.rt[i], pRenderTarget); + + nine_context_set_render_target(This, i, rt); return D3D_OK; } @@ -1864,11 +1926,12 @@ NineDevice9_SetDepthStencilSurface( struct NineDevice9 *This, IDirect3DSurface9 *pNewZStencil ) { + struct NineSurface9 *ds = NineSurface9(pNewZStencil); DBG("This=%p pNewZStencil=%p\n", This, pNewZStencil); - if (This->state.ds != NineSurface9(pNewZStencil)) { - nine_bind(&This->state.ds, pNewZStencil); - This->state.changed.group |= NINE_STATE_FB; + if (This->state.ds != ds) { + nine_bind(&This->state.ds, ds); + nine_context_set_depth_stencil(This, ds); } return D3D_OK; } @@ -1915,16 +1978,7 @@ float Z, DWORD Stencil ) { - const int sRGB = This->state.rs[D3DRS_SRGBWRITEENABLE] ? 1 : 0; - struct pipe_surface *cbuf, *zsbuf; - struct pipe_context *pipe = This->pipe; struct NineSurface9 *zsbuf_surf = This->state.ds; - struct NineSurface9 *rt; - unsigned bufs = 0; - unsigned r, i; - union pipe_color_union rgba; - unsigned rt_mask = 0; - D3DRECT rect; DBG("This=%p Count=%u pRects=%p Flags=%x Color=%08x Z=%f Stencil=%x\n", This, Count, pRects, Flags, Color, Z, Stencil); @@ -1945,126 +1999,7 @@ Count = 0; #endif - nine_update_state_framebuffer_clear(This); - - if (Flags & D3DCLEAR_TARGET) bufs |= PIPE_CLEAR_COLOR; - /* Ignore Z buffer if not bound */ - if (This->state.fb.zsbuf != NULL) { - if (Flags & D3DCLEAR_ZBUFFER) bufs |= PIPE_CLEAR_DEPTH; - if (Flags & D3DCLEAR_STENCIL) bufs |= PIPE_CLEAR_STENCIL; - } - if (!bufs) - return D3D_OK; - d3dcolor_to_pipe_color_union(&rgba, Color); - - rect.x1 = This->state.viewport.X; - rect.y1 = This->state.viewport.Y; - rect.x2 = This->state.viewport.Width + rect.x1; - rect.y2 = This->state.viewport.Height + rect.y1; - - /* Both rectangles apply, which is weird, but that's D3D9. */ - if (This->state.rs[D3DRS_SCISSORTESTENABLE]) { - rect.x1 = MAX2(rect.x1, This->state.scissor.minx); - rect.y1 = MAX2(rect.y1, This->state.scissor.miny); - rect.x2 = MIN2(rect.x2, This->state.scissor.maxx); - rect.y2 = MIN2(rect.y2, This->state.scissor.maxy); - } - - if (Count) { - /* Maybe apps like to specify a large rect ? */ - if (pRects[0].x1 <= rect.x1 && pRects[0].x2 >= rect.x2 && - pRects[0].y1 <= rect.y1 && pRects[0].y2 >= rect.y2) { - DBG("First rect covers viewport.\n"); - Count = 0; - pRects = NULL; - } - } - - if (rect.x1 >= This->state.fb.width || rect.y1 >= This->state.fb.height) - return D3D_OK; - - for (i = 0; i < This->caps.NumSimultaneousRTs; ++i) { - if (This->state.rt[i] && This->state.rt[i]->desc.Format != D3DFMT_NULL) - rt_mask |= 1 << i; - } - - /* fast path, clears everything at once */ - if (!Count && - (!(bufs & PIPE_CLEAR_COLOR) || (rt_mask == This->state.rt_mask)) && - rect.x1 == 0 && rect.y1 == 0 && - /* Case we clear only render target. Check clear region vs rt. */ - ((!(bufs & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) && - rect.x2 >= This->state.fb.width && - rect.y2 >= This->state.fb.height) || - /* Case we clear depth buffer (and eventually rt too). - * depth buffer size is always >= rt size. Compare to clear region */ - ((bufs & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) && - rect.x2 >= zsbuf_surf->desc.Width && - rect.y2 >= zsbuf_surf->desc.Height))) { - DBG("Clear fast path\n"); - pipe->clear(pipe, bufs, &rgba, Z, Stencil); - return D3D_OK; - } - - if (!Count) { - Count = 1; - pRects = ▭ - } - - for (i = 0; i < This->caps.NumSimultaneousRTs; ++i) { - rt = This->state.rt[i]; - if (!rt || rt->desc.Format == D3DFMT_NULL || - !(bufs & PIPE_CLEAR_COLOR)) - continue; /* save space, compiler should hoist this */ - cbuf = NineSurface9_GetSurface(rt, sRGB); - for (r = 0; r < Count; ++r) { - /* Don't trust users to pass these in the right order. */ - unsigned x1 = MIN2(pRects[r].x1, pRects[r].x2); - unsigned y1 = MIN2(pRects[r].y1, pRects[r].y2); - unsigned x2 = MAX2(pRects[r].x1, pRects[r].x2); - unsigned y2 = MAX2(pRects[r].y1, pRects[r].y2); -#ifndef NINE_LAX - /* Drop negative rectangles (like wine expects). */ - if (pRects[r].x1 > pRects[r].x2) continue; - if (pRects[r].y1 > pRects[r].y2) continue; -#endif - - x1 = MAX2(x1, rect.x1); - y1 = MAX2(y1, rect.y1); - x2 = MIN3(x2, rect.x2, rt->desc.Width); - y2 = MIN3(y2, rect.y2, rt->desc.Height); - - DBG("Clearing (%u..%u)x(%u..%u)\n", x1, x2, y1, y2); - pipe->clear_render_target(pipe, cbuf, &rgba, - x1, y1, x2 - x1, y2 - y1); - } - } - if (!(bufs & PIPE_CLEAR_DEPTHSTENCIL)) - return D3D_OK; - - bufs &= PIPE_CLEAR_DEPTHSTENCIL; - - for (r = 0; r < Count; ++r) { - unsigned x1 = MIN2(pRects[r].x1, pRects[r].x2); - unsigned y1 = MIN2(pRects[r].y1, pRects[r].y2); - unsigned x2 = MAX2(pRects[r].x1, pRects[r].x2); - unsigned y2 = MAX2(pRects[r].y1, pRects[r].y2); -#ifndef NINE_LAX - /* Drop negative rectangles. */ - if (pRects[r].x1 > pRects[r].x2) continue; - if (pRects[r].y1 > pRects[r].y2) continue; -#endif - - x1 = MIN2(x1, rect.x1); - y1 = MIN2(y1, rect.y1); - x2 = MIN3(x2, rect.x2, zsbuf_surf->desc.Width); - y2 = MIN3(y2, rect.y2, zsbuf_surf->desc.Height); - - zsbuf = NineSurface9_GetSurface(zsbuf_surf, 0); - assert(zsbuf); - pipe->clear_depth_stencil(pipe, zsbuf, bufs, Z, Stencil, - x1, y1, x2 - x1, y2 - y1); - } + nine_context_clear_fb(This, Count, pRects, Flags, Color, Z, Stencil); return D3D_OK; } @@ -2074,15 +2009,18 @@ const D3DMATRIX *pMatrix ) { struct nine_state *state = This->update; - D3DMATRIX *M = nine_state_access_transform(state, State, TRUE); + D3DMATRIX *M = nine_state_access_transform(&state->ff, State, TRUE); DBG("This=%p State=%d pMatrix=%p\n", This, State, pMatrix); user_assert(M, D3DERR_INVALIDCALL); *M = *pMatrix; - state->ff.changed.transform[State / 32] |= 1 << (State % 32); - state->changed.group |= NINE_STATE_FF; + if (unlikely(This->is_recording)) { + state->ff.changed.transform[State / 32] |= 1 << (State % 32); + state->changed.group |= NINE_STATE_FF; + } else + nine_context_set_transform(This, State, pMatrix); return D3D_OK; } @@ -2092,7 +2030,7 @@ D3DTRANSFORMSTATETYPE State, D3DMATRIX *pMatrix ) { - D3DMATRIX *M = nine_state_access_transform(&This->state, State, FALSE); + D3DMATRIX *M = nine_state_access_transform(&This->state.ff, State, FALSE); user_assert(M, D3DERR_INVALIDCALL); *pMatrix = *M; return D3D_OK; @@ -2105,7 +2043,7 @@ { struct nine_state *state = This->update; D3DMATRIX T; - D3DMATRIX *M = nine_state_access_transform(state, State, TRUE); + D3DMATRIX *M = nine_state_access_transform(&state->ff, State, TRUE); DBG("This=%p State=%d pMatrix=%p\n", This, State, pMatrix); @@ -2126,7 +2064,7 @@ pViewport->MinZ, pViewport->MaxZ); state->viewport = *pViewport; - state->changed.group |= NINE_STATE_VIEWPORT; + nine_context_set_viewport(This, pViewport); return D3D_OK; } @@ -2152,7 +2090,10 @@ user_assert(pMaterial, E_POINTER); state->ff.material = *pMaterial; - state->changed.group |= NINE_STATE_FF_MATERIAL; + if (unlikely(This->is_recording)) + state->changed.group |= NINE_STATE_FF_MATERIAL; + else + nine_context_set_material(This, pMaterial); return D3D_OK; } @@ -2172,6 +2113,7 @@ const D3DLIGHT9 *pLight ) { struct nine_state *state = This->update; + HRESULT hr; DBG("This=%p Index=%u pLight=%p\n", This, Index, pLight); if (pLight) @@ -2182,27 +2124,10 @@ user_assert(Index < NINE_MAX_LIGHTS, D3DERR_INVALIDCALL); /* sanity */ - if (Index >= state->ff.num_lights) { - unsigned n = state->ff.num_lights; - unsigned N = Index + 1; - - state->ff.light = REALLOC(state->ff.light, n * sizeof(D3DLIGHT9), - N * sizeof(D3DLIGHT9)); - if (!state->ff.light) - return E_OUTOFMEMORY; - state->ff.num_lights = N; - - for (; n < Index; ++n) { - memset(&state->ff.light[n], 0, sizeof(D3DLIGHT9)); - state->ff.light[n].Type = (D3DLIGHTTYPE)NINED3DLIGHT_INVALID; - } - } - state->ff.light[Index] = *pLight; + hr = nine_state_set_light(&state->ff, Index, pLight); + if (hr != D3D_OK) + return hr; - if (pLight->Type == D3DLIGHT_SPOT && pLight->Theta >= pLight->Phi) { - DBG("Warning: clamping D3DLIGHT9.Theta\n"); - state->ff.light[Index].Theta = state->ff.light[Index].Phi; - } if (pLight->Type != D3DLIGHT_DIRECTIONAL && pLight->Attenuation0 == 0.0f && pLight->Attenuation1 == 0.0f && @@ -2210,7 +2135,10 @@ DBG("Warning: all D3DLIGHT9.Attenuation[i] are 0\n"); } - state->changed.group |= NINE_STATE_FF_LIGHTING; + if (unlikely(This->is_recording)) + state->changed.group |= NINE_STATE_FF_LIGHTING; + else + nine_context_set_light(This, Index, pLight); return D3D_OK; } @@ -2238,7 +2166,6 @@ BOOL Enable ) { struct nine_state *state = This->update; - unsigned i; DBG("This=%p Index=%u Enable=%i\n", This, Index, Enable); @@ -2254,30 +2181,10 @@ light.Direction.z = 1.0f; NineDevice9_SetLight(This, Index, &light); } - user_assert(Index < state->ff.num_lights, D3DERR_INVALIDCALL); - - for (i = 0; i < state->ff.num_lights_active; ++i) { - if (state->ff.active_light[i] == Index) - break; - } - if (Enable) { - if (i < state->ff.num_lights_active) - return D3D_OK; - /* XXX wine thinks this should still succeed: - */ - user_assert(i < NINE_MAX_LIGHTS_ACTIVE, D3DERR_INVALIDCALL); - - state->ff.active_light[i] = Index; - state->ff.num_lights_active++; - } else { - if (i == state->ff.num_lights_active) - return D3D_OK; - --state->ff.num_lights_active; - for (; i < state->ff.num_lights_active; ++i) - state->ff.active_light[i] = state->ff.active_light[i + 1]; - } - state->changed.group |= NINE_STATE_FF_LIGHTING; + nine_state_light_enable(&state->ff, &state->changed.group, Index, Enable); + if (likely(!This->is_recording)) + nine_context_light_enable(This, Index, Enable); return D3D_OK; } @@ -2319,7 +2226,10 @@ user_assert(Index < PIPE_MAX_CLIP_PLANES, D3DERR_INVALIDCALL); memcpy(&state->clip.ucp[Index][0], pPlane, sizeof(state->clip.ucp[0])); - state->changed.ucp |= 1 << Index; + if (unlikely(This->is_recording)) + state->changed.ucp |= 1 << Index; + else + nine_context_set_clip_plane(This, Index, (struct nine_clipplane *)pPlane); return D3D_OK; } @@ -2337,64 +2247,6 @@ return D3D_OK; } -#define RESZ_CODE 0x7fa05000 - -static HRESULT -NineDevice9_ResolveZ( struct NineDevice9 *This ) -{ - struct nine_state *state = &This->state; - const struct util_format_description *desc; - struct NineSurface9 *source = state->ds; - struct NineBaseTexture9 *destination = state->texture[0]; - struct pipe_resource *src, *dst; - struct pipe_blit_info blit; - - DBG("RESZ resolve\n"); - - user_assert(source && destination && - destination->base.type == D3DRTYPE_TEXTURE, D3DERR_INVALIDCALL); - - src = source->base.resource; - dst = destination->base.resource; - - user_assert(src && dst, D3DERR_INVALIDCALL); - - /* check dst is depth format. we know already for src */ - desc = util_format_description(dst->format); - user_assert(desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS, D3DERR_INVALIDCALL); - - memset(&blit, 0, sizeof(blit)); - blit.src.resource = src; - blit.src.level = 0; - blit.src.format = src->format; - blit.src.box.z = 0; - blit.src.box.depth = 1; - blit.src.box.x = 0; - blit.src.box.y = 0; - blit.src.box.width = src->width0; - blit.src.box.height = src->height0; - - blit.dst.resource = dst; - blit.dst.level = 0; - blit.dst.format = dst->format; - blit.dst.box.z = 0; - blit.dst.box.depth = 1; - blit.dst.box.x = 0; - blit.dst.box.y = 0; - blit.dst.box.width = dst->width0; - blit.dst.box.height = dst->height0; - - blit.mask = PIPE_MASK_ZS; - blit.filter = PIPE_TEX_FILTER_NEAREST; - blit.scissor_enable = FALSE; - - This->pipe->blit(This->pipe, &blit); - return D3D_OK; -} - -#define ALPHA_TO_COVERAGE_ENABLE MAKEFOURCC('A', '2', 'M', '1') -#define ALPHA_TO_COVERAGE_DISABLE MAKEFOURCC('A', '2', 'M', '0') - HRESULT NINE_WINAPI NineDevice9_SetRenderState( struct NineDevice9 *This, D3DRENDERSTATETYPE State, @@ -2407,43 +2259,19 @@ user_assert(State < D3DRS_COUNT, D3DERR_INVALIDCALL); - if (state->rs_advertised[State] == Value && likely(!This->is_recording)) + if (unlikely(This->is_recording)) { + state->rs_advertised[State] = Value; + /* only need to record changed render states for stateblocks */ + state->changed.rs[State / 32] |= 1 << (State % 32); + state->changed.group |= nine_render_state_group[State]; return D3D_OK; - - state->rs_advertised[State] = Value; - - /* Amd hacks (equivalent to GL extensions) */ - if (unlikely(State == D3DRS_POINTSIZE)) { - if (Value == RESZ_CODE) - return NineDevice9_ResolveZ(This); - - if (Value == ALPHA_TO_COVERAGE_ENABLE || - Value == ALPHA_TO_COVERAGE_DISABLE) { - state->rs[NINED3DRS_ALPHACOVERAGE] = (Value == ALPHA_TO_COVERAGE_ENABLE); - state->changed.group |= NINE_STATE_BLEND; - return D3D_OK; - } } - /* NV hack */ - if (unlikely(State == D3DRS_ADAPTIVETESS_Y)) { - if (Value == D3DFMT_ATOC || (Value == D3DFMT_UNKNOWN && state->rs[NINED3DRS_ALPHACOVERAGE])) { - state->rs[NINED3DRS_ALPHACOVERAGE] = (Value == D3DFMT_ATOC) ? 3 : 0; - state->rs[NINED3DRS_ALPHACOVERAGE] &= state->rs[D3DRS_ALPHATESTENABLE] ? 3 : 2; - state->changed.group |= NINE_STATE_BLEND; - return D3D_OK; - } - } - if (unlikely(State == D3DRS_ALPHATESTENABLE && (state->rs[NINED3DRS_ALPHACOVERAGE] & 2))) { - DWORD alphacoverage_prev = state->rs[NINED3DRS_ALPHACOVERAGE]; - state->rs[NINED3DRS_ALPHACOVERAGE] = (Value ? 3 : 2); - if (state->rs[NINED3DRS_ALPHACOVERAGE] != alphacoverage_prev) - state->changed.group |= NINE_STATE_BLEND; - } + if (state->rs_advertised[State] == Value) + return D3D_OK; - state->rs[State] = nine_fix_render_state_value(State, Value); - state->changed.rs[State / 32] |= 1 << (State % 32); - state->changed.group |= nine_render_state_group[State]; + state->rs_advertised[State] = Value; + nine_context_set_render_state(This, State, Value); return D3D_OK; } @@ -2502,10 +2330,12 @@ /* TODO: texture/sampler state */ memcpy(dst->changed.rs, nine_render_states_vertex, sizeof(dst->changed.rs)); - nine_ranges_insert(&dst->changed.vs_const_f, 0, This->max_vs_const_f, + nine_ranges_insert(&dst->changed.vs_const_f, 0, This->may_swvp ? NINE_MAX_CONST_F_SWVP : This->max_vs_const_f, + &This->range_pool); + nine_ranges_insert(&dst->changed.vs_const_i, 0, This->may_swvp ? NINE_MAX_CONST_I_SWVP : NINE_MAX_CONST_I, + &This->range_pool); + nine_ranges_insert(&dst->changed.vs_const_b, 0, This->may_swvp ? NINE_MAX_CONST_B_SWVP : NINE_MAX_CONST_B, &This->range_pool); - dst->changed.vs_const_i = 0xffff; - dst->changed.vs_const_b = 0xffff; for (s = 0; s < NINE_MAX_SAMPLERS; ++s) dst->changed.sampler[s] |= 1 << D3DSAMP_DMAPOFFSET; if (This->state.ff.num_lights) { @@ -2523,8 +2353,10 @@ } if (Type == D3DSBT_ALL || Type == D3DSBT_PIXELSTATE) { dst->changed.group |= - NINE_STATE_PS | NINE_STATE_PS_CONST; - /* TODO: texture/sampler state */ + NINE_STATE_PS | NINE_STATE_PS_CONST | NINE_STATE_BLEND | + NINE_STATE_FF_OTHER | NINE_STATE_FF_PSSTAGES | NINE_STATE_PS_CONST | + NINE_STATE_FB | NINE_STATE_DSA | NINE_STATE_MULTISAMPLE | + NINE_STATE_RASTERIZER | NINE_STATE_STENCIL_REF; memcpy(dst->changed.rs, nine_render_states_pixel, sizeof(dst->changed.rs)); nine_ranges_insert(&dst->changed.ps_const_f, 0, This->max_ps_const_f, @@ -2533,6 +2365,10 @@ dst->changed.ps_const_b = 0xffff; for (s = 0; s < NINE_MAX_SAMPLERS; ++s) dst->changed.sampler[s] |= 0x1ffe; + for (s = 0; s < NINE_MAX_TEXTURE_STAGES; ++s) { + dst->ff.changed.tex_stage[s][0] |= 0xffffffff; + dst->ff.changed.tex_stage[s][1] |= 0xffffffff; + } } if (Type == D3DSBT_ALL) { dst->changed.group |= @@ -2640,6 +2476,7 @@ { struct nine_state *state = This->update; struct NineBaseTexture9 *tex = NineBaseTexture9(pTexture); + struct NineBaseTexture9 *old; DBG("This=%p Stage=%u pTexture=%p\n", This, Stage, pTexture); @@ -2653,27 +2490,20 @@ if (Stage >= D3DDMAPSAMPLER) Stage = Stage - D3DDMAPSAMPLER + NINE_MAX_SAMPLERS_PS; - if (!This->is_recording) { - struct NineBaseTexture9 *old = state->texture[Stage]; - if (old == tex) - return D3D_OK; - - state->samplers_shadow &= ~(1 << Stage); - if (tex) { - state->samplers_shadow |= tex->shadow << Stage; + if (This->is_recording) { + state->changed.texture |= 1 << Stage; + state->changed.group |= NINE_STATE_TEXTURE; + nine_bind(&state->texture[Stage], pTexture); + return D3D_OK; + } - if ((tex->managed.dirty | tex->dirty_mip) && LIST_IS_EMPTY(&tex->list)) - list_add(&tex->list, &This->update_textures); + old = state->texture[Stage]; + if (old == tex) + return D3D_OK; - tex->bind_count++; - } - if (old) - old->bind_count--; - } - nine_bind(&state->texture[Stage], pTexture); + NineBindTextureToDevice(This, &state->texture[Stage], tex); - state->changed.texture |= 1 << Stage; - state->changed.group |= NINE_STATE_TEXTURE; + nine_context_set_texture(This, Stage, tex); return D3D_OK; } @@ -2701,7 +2531,6 @@ DWORD Value ) { struct nine_state *state = This->update; - int bumpmap_index = -1; DBG("Stage=%u Type=%u Value=%08x\n", Stage, Type, Value); nine_dump_D3DTSS_value(DBG_FF, Type, Value); @@ -2710,39 +2539,14 @@ user_assert(Type < ARRAY_SIZE(state->ff.tex_stage[0]), D3DERR_INVALIDCALL); state->ff.tex_stage[Stage][Type] = Value; - switch (Type) { - case D3DTSS_BUMPENVMAT00: - bumpmap_index = 4 * Stage; - break; - case D3DTSS_BUMPENVMAT10: - bumpmap_index = 4 * Stage + 1; - break; - case D3DTSS_BUMPENVMAT01: - bumpmap_index = 4 * Stage + 2; - break; - case D3DTSS_BUMPENVMAT11: - bumpmap_index = 4 * Stage + 3; - break; - case D3DTSS_BUMPENVLSCALE: - bumpmap_index = 4 * 8 + 2 * Stage; - break; - case D3DTSS_BUMPENVLOFFSET: - bumpmap_index = 4 * 8 + 2 * Stage + 1; - break; - case D3DTSS_TEXTURETRANSFORMFLAGS: - state->changed.group |= NINE_STATE_PS1X_SHADER; - break; - default: - break; - } - - if (bumpmap_index >= 0) { - state->bumpmap_vars[bumpmap_index] = Value; - state->changed.group |= NINE_STATE_PS_CONST; - } - state->changed.group |= NINE_STATE_FF_PSSTAGES; - state->ff.changed.tex_stage[Stage][Type / 32] |= 1 << (Type % 32); + if (unlikely(This->is_recording)) { + if (Type == D3DTSS_TEXTURETRANSFORMFLAGS) + state->changed.group |= NINE_STATE_PS1X_SHADER; + state->changed.group |= NINE_STATE_FF_PSSTAGES; + state->ff.changed.tex_stage[Stage][Type / 32] |= 1 << (Type % 32); + } else + nine_context_set_texture_stage_state(This, Stage, Type, Value); return D3D_OK; } @@ -2761,7 +2565,7 @@ if (Sampler >= D3DDMAPSAMPLER) Sampler = Sampler - D3DDMAPSAMPLER + NINE_MAX_SAMPLERS_PS; - *pValue = This->state.samp[Sampler][Type]; + *pValue = This->state.samp_advertised[Sampler][Type]; return D3D_OK; } @@ -2784,12 +2588,19 @@ if (Sampler >= D3DDMAPSAMPLER) Sampler = Sampler - D3DDMAPSAMPLER + NINE_MAX_SAMPLERS_PS; - if (state->samp[Sampler][Type] != Value || unlikely(This->is_recording)) { - state->samp[Sampler][Type] = Value; + if (unlikely(This->is_recording)) { + state->samp_advertised[Sampler][Type] = Value; state->changed.group |= NINE_STATE_SAMPLER; state->changed.sampler[Sampler] |= 1 << Type; + return D3D_OK; } + if (state->samp_advertised[Sampler][Type] == Value) + return D3D_OK; + + state->samp_advertised[Sampler][Type] = Value; + nine_context_set_sampler_state(This, Sampler, Type, Value); + return D3D_OK; } @@ -2803,9 +2614,9 @@ DBG("This=%p pNumPasses=%p\n", This, pNumPasses); - for (i = 0; i < ARRAY_SIZE(state->samp); ++i) { - if (state->samp[i][D3DSAMP_MINFILTER] == D3DTEXF_NONE || - state->samp[i][D3DSAMP_MAGFILTER] == D3DTEXF_NONE) + for (i = 0; i < ARRAY_SIZE(state->samp_advertised); ++i) { + if (state->samp_advertised[i][D3DSAMP_MINFILTER] == D3DTEXF_NONE || + state->samp_advertised[i][D3DSAMP_MAGFILTER] == D3DTEXF_NONE) return D3DERR_UNSUPPORTEDTEXTUREFILTER; } @@ -2821,7 +2632,7 @@ } } if (state->ds && - (state->rs[D3DRS_ZENABLE] || state->rs[D3DRS_STENCILENABLE])) { + (state->rs_advertised[D3DRS_ZENABLE] || state->rs_advertised[D3DRS_STENCILENABLE])) { if (w != 0 && (state->ds->desc.Width != w || state->ds->desc.Height != h)) return D3DERR_CONFLICTINGRENDERSTATE; @@ -2877,7 +2688,10 @@ state->scissor.maxx = pRect->right; state->scissor.maxy = pRect->bottom; - state->changed.group |= NINE_STATE_SCISSOR; + if (unlikely(This->is_recording)) + state->changed.group |= NINE_STATE_SCISSOR; + else + nine_context_set_scissor(This, &state->scissor); return D3D_OK; } @@ -2898,20 +2712,25 @@ NineDevice9_SetSoftwareVertexProcessing( struct NineDevice9 *This, BOOL bSoftware ) { - STUB(D3DERR_INVALIDCALL); + if (This->params.BehaviorFlags & D3DCREATE_MIXED_VERTEXPROCESSING) { + This->swvp = bSoftware; + nine_context_set_swvp(This, bSoftware); + return D3D_OK; + } else + return D3DERR_INVALIDCALL; /* msdn. TODO: check in practice */ } BOOL NINE_WINAPI NineDevice9_GetSoftwareVertexProcessing( struct NineDevice9 *This ) { - return !!(This->params.BehaviorFlags & D3DCREATE_SOFTWARE_VERTEXPROCESSING); + return This->swvp; } HRESULT NINE_WINAPI NineDevice9_SetNPatchMode( struct NineDevice9 *This, float nSegments ) { - STUB(D3DERR_INVALIDCALL); + return D3D_OK; /* Nothing to do because we don't advertise NPatch support */ } float NINE_WINAPI @@ -2920,20 +2739,53 @@ STUB(0); } -static inline void -init_draw_info(struct pipe_draw_info *info, - struct NineDevice9 *dev, D3DPRIMITIVETYPE type, UINT count) +/* TODO: only go through dirty textures */ +static void +validate_textures(struct NineDevice9 *device) +{ + struct NineBaseTexture9 *tex, *ptr; + LIST_FOR_EACH_ENTRY_SAFE(tex, ptr, &device->update_textures, list) { + list_delinit(&tex->list); + NineBaseTexture9_Validate(tex); + } +} + +static void +update_managed_buffers(struct NineDevice9 *device) +{ + struct NineBuffer9 *buf, *ptr; + LIST_FOR_EACH_ENTRY_SAFE(buf, ptr, &device->update_buffers, managed.list) { + list_delinit(&buf->managed.list); + NineBuffer9_Upload(buf); + } +} + +static void +NineBeforeDraw( struct NineDevice9 *This ) { - info->mode = d3dprimitivetype_to_pipe_prim(type); - info->count = prim_count_to_vertex_count(type, count); - info->start_instance = 0; - info->instance_count = 1; - if (dev->state.stream_instancedata_mask & dev->state.stream_usage_mask) - info->instance_count = MAX2(dev->state.stream_freq[0] & 0x7FFFFF, 1); - info->primitive_restart = FALSE; - info->restart_index = 0; - info->count_from_stream_output = NULL; - info->indirect = NULL; + /* Upload Managed dirty content */ + validate_textures(This); /* may clobber state */ + update_managed_buffers(This); +} + +static void +NineAfterDraw( struct NineDevice9 *This ) +{ + unsigned i; + struct nine_state *state = &This->state; + unsigned ps_mask = state->ps ? state->ps->rt_mask : 1; + + /* Flag render-targets with autogenmipmap for mipmap regeneration */ + for (i = 0; i < This->caps.NumSimultaneousRTs; ++i) { + struct NineSurface9 *rt = state->rt[i]; + + if (rt && rt->desc.Format != D3DFMT_NULL && (ps_mask & (1 << i)) && + rt->desc.Usage & D3DUSAGE_AUTOGENMIPMAP) { + assert(rt->texture == D3DRTYPE_TEXTURE || + rt->texture == D3DRTYPE_CUBETEXTURE); + NineBaseTexture9(rt->base.base.container)->dirty_mip = TRUE; + } + } } HRESULT NINE_WINAPI @@ -2942,21 +2794,12 @@ UINT StartVertex, UINT PrimitiveCount ) { - struct pipe_draw_info info; - DBG("iface %p, PrimitiveType %u, StartVertex %u, PrimitiveCount %u\n", This, PrimitiveType, StartVertex, PrimitiveCount); - nine_update_state(This); - - init_draw_info(&info, This, PrimitiveType, PrimitiveCount); - info.indexed = FALSE; - info.start = StartVertex; - info.index_bias = 0; - info.min_index = info.start; - info.max_index = info.count - 1; - - This->pipe->draw_vbo(This->pipe, &info); + NineBeforeDraw(This); + nine_context_draw_primitive(This, PrimitiveType, StartVertex, PrimitiveCount); + NineAfterDraw(This); return D3D_OK; } @@ -2970,8 +2813,6 @@ UINT StartIndex, UINT PrimitiveCount ) { - struct pipe_draw_info info; - DBG("iface %p, PrimitiveType %u, BaseVertexIndex %u, MinVertexIndex %u " "NumVertices %u, StartIndex %u, PrimitiveCount %u\n", This, PrimitiveType, BaseVertexIndex, MinVertexIndex, NumVertices, @@ -2980,17 +2821,11 @@ user_assert(This->state.idxbuf, D3DERR_INVALIDCALL); user_assert(This->state.vdecl, D3DERR_INVALIDCALL); - nine_update_state(This); - - init_draw_info(&info, This, PrimitiveType, PrimitiveCount); - info.indexed = TRUE; - info.start = StartIndex; - info.index_bias = BaseVertexIndex; - /* These don't include index bias: */ - info.min_index = MinVertexIndex; - info.max_index = MinVertexIndex + NumVertices - 1; - - This->pipe->draw_vbo(This->pipe, &info); + NineBeforeDraw(This); + nine_context_draw_indexed_primitive(This, PrimitiveType, BaseVertexIndex, + MinVertexIndex, NumVertices, StartIndex, + PrimitiveCount); + NineAfterDraw(This); return D3D_OK; } @@ -3003,7 +2838,6 @@ UINT VertexStreamZeroStride ) { struct pipe_vertex_buffer vtxbuf; - struct pipe_draw_info info; DBG("iface %p, PrimitiveType %u, PrimitiveCount %u, data %p, stride %u\n", This, PrimitiveType, PrimitiveCount, @@ -3011,15 +2845,7 @@ user_assert(pVertexStreamZeroData && VertexStreamZeroStride, D3DERR_INVALIDCALL); - - nine_update_state(This); - - init_draw_info(&info, This, PrimitiveType, PrimitiveCount); - info.indexed = FALSE; - info.start = 0; - info.index_bias = 0; - info.min_index = 0; - info.max_index = info.count - 1; + user_assert(PrimitiveCount, D3D_OK); vtxbuf.stride = VertexStreamZeroStride; vtxbuf.buffer_offset = 0; @@ -3029,7 +2855,7 @@ if (!This->driver_caps.user_vbufs) { u_upload_data(This->vertex_uploader, 0, - (info.max_index + 1) * VertexStreamZeroStride, /* XXX */ + (prim_count_to_vertex_count(PrimitiveType, PrimitiveCount)) * VertexStreamZeroStride, /* XXX */ 4, vtxbuf.user_buffer, &vtxbuf.buffer_offset, @@ -3038,16 +2864,16 @@ vtxbuf.user_buffer = NULL; } - This->pipe->set_vertex_buffers(This->pipe, 0, 1, &vtxbuf); + NineBeforeDraw(This); + nine_context_draw_primitive_from_vtxbuf(This, PrimitiveType, PrimitiveCount, &vtxbuf); + NineAfterDraw(This); - This->pipe->draw_vbo(This->pipe, &info); + pipe_resource_reference(&vtxbuf.buffer, NULL); NineDevice9_PauseRecording(This); NineDevice9_SetStreamSource(This, 0, NULL, 0, 0); NineDevice9_ResumeRecording(This); - pipe_resource_reference(&vtxbuf.buffer, NULL); - return D3D_OK; } @@ -3062,7 +2888,6 @@ const void *pVertexStreamZeroData, UINT VertexStreamZeroStride ) { - struct pipe_draw_info info; struct pipe_vertex_buffer vbuf; struct pipe_index_buffer ibuf; @@ -3077,15 +2902,7 @@ user_assert(VertexStreamZeroStride, D3DERR_INVALIDCALL); user_assert(IndexDataFormat == D3DFMT_INDEX16 || IndexDataFormat == D3DFMT_INDEX32, D3DERR_INVALIDCALL); - - nine_update_state(This); - - init_draw_info(&info, This, PrimitiveType, PrimitiveCount); - info.indexed = TRUE; - info.start = 0; - info.index_bias = 0; - info.min_index = MinVertexIndex; - info.max_index = MinVertexIndex + NumVertices - 1; + user_assert(PrimitiveCount, D3D_OK); vbuf.stride = VertexStreamZeroStride; vbuf.buffer_offset = 0; @@ -3098,11 +2915,10 @@ ibuf.user_buffer = pIndexData; if (!This->driver_caps.user_vbufs) { - const unsigned base = info.min_index * VertexStreamZeroStride; + const unsigned base = MinVertexIndex * VertexStreamZeroStride; u_upload_data(This->vertex_uploader, base, - (info.max_index - - info.min_index + 1) * VertexStreamZeroStride, /* XXX */ + NumVertices * VertexStreamZeroStride, /* XXX */ 4, (const uint8_t *)vbuf.user_buffer + base, &vbuf.buffer_offset, @@ -3115,7 +2931,7 @@ if (!This->driver_caps.user_ibufs) { u_upload_data(This->index_uploader, 0, - info.count * ibuf.index_size, + (prim_count_to_vertex_count(PrimitiveType, PrimitiveCount)) * ibuf.index_size, 4, ibuf.user_buffer, &ibuf.offset, @@ -3124,10 +2940,14 @@ ibuf.user_buffer = NULL; } - This->pipe->set_vertex_buffers(This->pipe, 0, 1, &vbuf); - This->pipe->set_index_buffer(This->pipe, &ibuf); - - This->pipe->draw_vbo(This->pipe, &info); + NineBeforeDraw(This); + nine_context_draw_indexed_primitive_from_vtxbuf_idxbuf(This, PrimitiveType, + MinVertexIndex, + NumVertices, + PrimitiveCount, + &vbuf, + &ibuf); + NineAfterDraw(This); pipe_resource_reference(&vbuf.buffer, NULL); pipe_resource_reference(&ibuf.buffer, NULL); @@ -3140,9 +2960,6 @@ return D3D_OK; } -/* TODO: Write to pDestBuffer directly if vertex declaration contains - * only f32 formats. - */ HRESULT NINE_WINAPI NineDevice9_ProcessVertices( struct NineDevice9 *This, UINT SrcStartIndex, @@ -3152,35 +2969,73 @@ IDirect3DVertexDeclaration9 *pVertexDecl, DWORD Flags ) { - struct pipe_screen *screen = This->screen; + struct pipe_screen *screen_sw = This->screen_sw; + struct pipe_context *pipe_sw = This->pipe_sw; struct NineVertexDeclaration9 *vdecl = NineVertexDeclaration9(pVertexDecl); + struct NineVertexBuffer9 *dst = NineVertexBuffer9(pDestBuffer); struct NineVertexShader9 *vs; struct pipe_resource *resource; + struct pipe_transfer *transfer = NULL; + struct pipe_stream_output_info so; struct pipe_stream_output_target *target; struct pipe_draw_info draw; + struct pipe_box box; + bool programmable_vs = This->state.vs && !(This->state.vdecl && This->state.vdecl->position_t); + unsigned offsets[1] = {0}; HRESULT hr; - unsigned buffer_offset, buffer_size; + unsigned buffer_size; + void *map; DBG("This=%p SrcStartIndex=%u DestIndex=%u VertexCount=%u " "pDestBuffer=%p pVertexDecl=%p Flags=%d\n", This, SrcStartIndex, DestIndex, VertexCount, pDestBuffer, pVertexDecl, Flags); - if (!screen->get_param(screen, PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS)) - STUB(D3DERR_INVALIDCALL); + if (!screen_sw->get_param(screen_sw, PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS)) { + DBG("ProcessVertices not supported\n"); + return D3DERR_INVALIDCALL; + } - nine_update_state(This); - /* TODO: Create shader with stream output. */ - STUB(D3DERR_INVALIDCALL); - struct NineVertexBuffer9 *dst = NineVertexBuffer9(pDestBuffer); + vs = programmable_vs ? This->state.vs : This->ff.vs; + /* Note: version is 0 for ff */ + user_assert(vdecl || (vs->byte_code.version < 0x30 && dst->desc.FVF), + D3DERR_INVALIDCALL); + if (!vdecl) { + DWORD FVF = dst->desc.FVF; + vdecl = util_hash_table_get(This->ff.ht_fvf, &FVF); + if (!vdecl) { + hr = NineVertexDeclaration9_new_from_fvf(This, FVF, &vdecl); + if (FAILED(hr)) + return hr; + vdecl->fvf = FVF; + util_hash_table_set(This->ff.ht_fvf, &vdecl->fvf, vdecl); + NineUnknown_ConvertRefToBind(NineUnknown(vdecl)); + } + } + + /* Flags: Can be 0 or D3DPV_DONOTCOPYDATA, and/or lock flags + * D3DPV_DONOTCOPYDATA -> Has effect only for ff. In particular + * if not set, everything from src will be used, and dst + * must match exactly the ff vs outputs. + * TODO: Handle all the checks, etc for ff */ + user_assert(vdecl->position_t || programmable_vs, + D3DERR_INVALIDCALL); + + /* TODO: Support vs < 3 and ff */ + user_assert(vs->byte_code.version == 0x30, + D3DERR_INVALIDCALL); + /* TODO: Not hardcode the constant buffers for swvp */ + user_assert(This->may_swvp, + D3DERR_INVALIDCALL); - vs = This->state.vs ? This->state.vs : This->ff.vs; + nine_state_prepare_draw_sw(This, vdecl, SrcStartIndex, VertexCount, &so); - buffer_size = VertexCount * vs->so->stride[0]; - if (1) { + buffer_size = VertexCount * so.stride[0] * 4; + { struct pipe_resource templ; + memset(&templ, 0, sizeof(templ)); templ.target = PIPE_BUFFER; templ.format = PIPE_FORMAT_R8_UNORM; templ.width0 = buffer_size; @@ -3190,49 +3045,57 @@ templ.height0 = templ.depth0 = templ.array_size = 1; templ.last_level = templ.nr_samples = 0; - resource = This->screen->resource_create(This->screen, &templ); + resource = screen_sw->resource_create(screen_sw, &templ); if (!resource) return E_OUTOFMEMORY; - buffer_offset = 0; - } else { - /* SO matches vertex declaration */ - resource = NineVertexBuffer9_GetResource(dst); - buffer_offset = DestIndex * vs->so->stride[0]; - } - target = This->pipe->create_stream_output_target(This->pipe, resource, - buffer_offset, - buffer_size); + } + target = pipe_sw->create_stream_output_target(pipe_sw, resource, + 0, buffer_size); if (!target) { pipe_resource_reference(&resource, NULL); return D3DERR_DRIVERINTERNALERROR; } - if (!vdecl) { - hr = NineVertexDeclaration9_new_from_fvf(This, dst->desc.FVF, &vdecl); - if (FAILED(hr)) - goto out; - } - - init_draw_info(&draw, This, D3DPT_POINTLIST, VertexCount); + draw.mode = PIPE_PRIM_POINTS; + draw.count = VertexCount; + draw.start_instance = 0; + draw.primitive_restart = FALSE; + draw.restart_index = 0; + draw.count_from_stream_output = NULL; + draw.indirect = NULL; + draw.indirect_params = NULL; draw.instance_count = 1; draw.indexed = FALSE; - draw.start = SrcStartIndex; + draw.start = 0; draw.index_bias = 0; - draw.min_index = SrcStartIndex; - draw.max_index = SrcStartIndex + VertexCount - 1; + draw.min_index = 0; + draw.max_index = VertexCount - 1; + - This->pipe->set_stream_output_targets(This->pipe, 1, &target, 0); - This->pipe->draw_vbo(This->pipe, &draw); - This->pipe->set_stream_output_targets(This->pipe, 0, NULL, 0); - This->pipe->stream_output_target_destroy(This->pipe, target); + pipe_sw->set_stream_output_targets(pipe_sw, 1, &target, offsets); + + pipe_sw->draw_vbo(pipe_sw, &draw); + + pipe_sw->set_stream_output_targets(pipe_sw, 0, NULL, 0); + pipe_sw->stream_output_target_destroy(pipe_sw, target); + + u_box_1d(0, VertexCount * so.stride[0] * 4, &box); + map = pipe_sw->transfer_map(pipe_sw, resource, 0, PIPE_TRANSFER_READ, &box, + &transfer); + if (!map) { + hr = D3DERR_DRIVERINTERNALERROR; + goto out; + } hr = NineVertexDeclaration9_ConvertStreamOutput(vdecl, dst, DestIndex, VertexCount, - resource, vs->so); + map, &so); + if (transfer) + pipe_sw->transfer_unmap(pipe_sw, transfer); + out: + nine_state_after_draw_sw(This); pipe_resource_reference(&resource, NULL); - if (!pVertexDecl) - NineUnknown_Release(NineUnknown(vdecl)); return hr; } @@ -3258,22 +3121,22 @@ IDirect3DVertexDeclaration9 *pDecl ) { struct nine_state *state = This->update; - BOOL was_programmable_vs = This->state.programmable_vs; + struct NineVertexDeclaration9 *vdecl = NineVertexDeclaration9(pDecl); DBG("This=%p pDecl=%p\n", This, pDecl); - if (likely(!This->is_recording) && state->vdecl == NineVertexDeclaration9(pDecl)) + if (unlikely(This->is_recording)) { + nine_bind(&state->vdecl, vdecl); + state->changed.group |= NINE_STATE_VDECL; return D3D_OK; + } - nine_bind(&state->vdecl, pDecl); + if (state->vdecl == vdecl) + return D3D_OK; - This->state.programmable_vs = This->state.vs && !(This->state.vdecl && This->state.vdecl->position_t); - if (likely(!This->is_recording) && was_programmable_vs != This->state.programmable_vs) { - state->commit |= NINE_STATE_COMMIT_CONST_VS; - state->changed.group |= NINE_STATE_VS; - } + nine_bind(&state->vdecl, vdecl); - state->changed.group |= NINE_STATE_VDECL; + nine_context_set_vertex_declaration(This, vdecl); return D3D_OK; } @@ -3344,22 +3207,22 @@ IDirect3DVertexShader9 *pShader ) { struct nine_state *state = This->update; - BOOL was_programmable_vs = This->state.programmable_vs; + struct NineVertexShader9 *vs_shader = (struct NineVertexShader9*)pShader; DBG("This=%p pShader=%p\n", This, pShader); - if (!This->is_recording && state->vs == (struct NineVertexShader9*)pShader) - return D3D_OK; - - nine_bind(&state->vs, pShader); + if (unlikely(This->is_recording)) { + nine_bind(&state->vs, vs_shader); + state->changed.group |= NINE_STATE_VS; + return D3D_OK; + } - This->state.programmable_vs = This->state.vs && !(This->state.vdecl && This->state.vdecl->position_t); + if (state->vs == vs_shader) + return D3D_OK; - /* ff -> non-ff: commit back non-ff constants */ - if (!was_programmable_vs && This->state.programmable_vs) - state->commit |= NINE_STATE_COMMIT_CONST_VS; + nine_bind(&state->vs, vs_shader); - state->changed.group |= NINE_STATE_VS; + nine_context_set_vertex_shader(This, vs_shader); return D3D_OK; } @@ -3380,6 +3243,7 @@ UINT Vector4fCount ) { struct nine_state *state = This->update; + float *vs_const_f = state->vs_const_f; DBG("This=%p StartRegister=%u pConstantData=%p Vector4fCount=%u\n", This, StartRegister, pConstantData, Vector4fCount); @@ -3391,21 +3255,31 @@ return D3D_OK; user_assert(pConstantData, D3DERR_INVALIDCALL); - if (!This->is_recording) { - if (!memcmp(&state->vs_const_f[StartRegister * 4], pConstantData, - Vector4fCount * 4 * sizeof(state->vs_const_f[0]))) - return D3D_OK; + if (unlikely(This->is_recording)) { + memcpy(&vs_const_f[StartRegister * 4], + pConstantData, + Vector4fCount * 4 * sizeof(state->vs_const_f[0])); + + nine_ranges_insert(&state->changed.vs_const_f, + StartRegister, StartRegister + Vector4fCount, + &This->range_pool); + + state->changed.group |= NINE_STATE_VS_CONST; + + return D3D_OK; } - memcpy(&state->vs_const_f[StartRegister * 4], + if (!memcmp(&vs_const_f[StartRegister * 4], pConstantData, + Vector4fCount * 4 * sizeof(state->vs_const_f[0]))) + return D3D_OK; + + memcpy(&vs_const_f[StartRegister * 4], pConstantData, Vector4fCount * 4 * sizeof(state->vs_const_f[0])); - nine_ranges_insert(&state->changed.vs_const_f, - StartRegister, StartRegister + Vector4fCount, - &This->range_pool); - - state->changed.group |= NINE_STATE_VS_CONST; + nine_context_set_vertex_shader_constant_f(This, StartRegister, pConstantData, + Vector4fCount * 4 * sizeof(state->vs_const_f[0]), + Vector4fCount); return D3D_OK; } @@ -3441,30 +3315,38 @@ DBG("This=%p StartRegister=%u pConstantData=%p Vector4iCount=%u\n", This, StartRegister, pConstantData, Vector4iCount); - user_assert(StartRegister < NINE_MAX_CONST_I, D3DERR_INVALIDCALL); - user_assert(StartRegister + Vector4iCount <= NINE_MAX_CONST_I, D3DERR_INVALIDCALL); + user_assert(StartRegister < (This->may_swvp ? NINE_MAX_CONST_I_SWVP : NINE_MAX_CONST_I), + D3DERR_INVALIDCALL); + user_assert(StartRegister + Vector4iCount <= (This->may_swvp ? NINE_MAX_CONST_I_SWVP : NINE_MAX_CONST_I), + D3DERR_INVALIDCALL); user_assert(pConstantData, D3DERR_INVALIDCALL); if (This->driver_caps.vs_integer) { if (!This->is_recording) { - if (!memcmp(&state->vs_const_i[StartRegister][0], pConstantData, - Vector4iCount * sizeof(state->vs_const_i[0]))) + if (!memcmp(&state->vs_const_i[4 * StartRegister], pConstantData, + Vector4iCount * sizeof(int[4]))) return D3D_OK; } - memcpy(&state->vs_const_i[StartRegister][0], + memcpy(&state->vs_const_i[4 * StartRegister], pConstantData, - Vector4iCount * sizeof(state->vs_const_i[0])); + Vector4iCount * sizeof(int[4])); } else { for (i = 0; i < Vector4iCount; i++) { - state->vs_const_i[StartRegister+i][0] = fui((float)(pConstantData[4*i])); - state->vs_const_i[StartRegister+i][1] = fui((float)(pConstantData[4*i+1])); - state->vs_const_i[StartRegister+i][2] = fui((float)(pConstantData[4*i+2])); - state->vs_const_i[StartRegister+i][3] = fui((float)(pConstantData[4*i+3])); + state->vs_const_i[4 * (StartRegister + i)] = fui((float)(pConstantData[4 * i])); + state->vs_const_i[4 * (StartRegister + i) + 1] = fui((float)(pConstantData[4 * i + 1])); + state->vs_const_i[4 * (StartRegister + i) + 2] = fui((float)(pConstantData[4 * i + 2])); + state->vs_const_i[4 * (StartRegister + i) + 3] = fui((float)(pConstantData[4 * i + 3])); } } - state->changed.vs_const_i |= ((1 << Vector4iCount) - 1) << StartRegister; - state->changed.group |= NINE_STATE_VS_CONST; + if (unlikely(This->is_recording)) { + nine_ranges_insert(&state->changed.vs_const_i, + StartRegister, StartRegister + Vector4iCount, + &This->range_pool); + state->changed.group |= NINE_STATE_VS_CONST; + } else + nine_context_set_vertex_shader_constant_i(This, StartRegister, pConstantData, + Vector4iCount * sizeof(int[4]), Vector4iCount); return D3D_OK; } @@ -3478,20 +3360,22 @@ const struct nine_state *state = &This->state; int i; - user_assert(StartRegister < NINE_MAX_CONST_I, D3DERR_INVALIDCALL); - user_assert(StartRegister + Vector4iCount <= NINE_MAX_CONST_I, D3DERR_INVALIDCALL); + user_assert(StartRegister < (This->may_swvp ? NINE_MAX_CONST_I_SWVP : NINE_MAX_CONST_I), + D3DERR_INVALIDCALL); + user_assert(StartRegister + Vector4iCount <= (This->may_swvp ? NINE_MAX_CONST_I_SWVP : NINE_MAX_CONST_I), + D3DERR_INVALIDCALL); user_assert(pConstantData, D3DERR_INVALIDCALL); if (This->driver_caps.vs_integer) { memcpy(pConstantData, - &state->vs_const_i[StartRegister][0], - Vector4iCount * sizeof(state->vs_const_i[0])); + &state->vs_const_i[4 * StartRegister], + Vector4iCount * sizeof(int[4])); } else { for (i = 0; i < Vector4iCount; i++) { - pConstantData[4*i] = (int32_t) uif(state->vs_const_i[StartRegister+i][0]); - pConstantData[4*i+1] = (int32_t) uif(state->vs_const_i[StartRegister+i][1]); - pConstantData[4*i+2] = (int32_t) uif(state->vs_const_i[StartRegister+i][2]); - pConstantData[4*i+3] = (int32_t) uif(state->vs_const_i[StartRegister+i][3]); + pConstantData[4 * i] = (int32_t) uif(state->vs_const_i[4 * (StartRegister + i)]); + pConstantData[4 * i + 1] = (int32_t) uif(state->vs_const_i[4 * (StartRegister + i) + 1]); + pConstantData[4 * i + 2] = (int32_t) uif(state->vs_const_i[4 * (StartRegister + i) + 2]); + pConstantData[4 * i + 3] = (int32_t) uif(state->vs_const_i[4 * (StartRegister + i) + 3]); } } @@ -3511,8 +3395,10 @@ DBG("This=%p StartRegister=%u pConstantData=%p BoolCount=%u\n", This, StartRegister, pConstantData, BoolCount); - user_assert(StartRegister < NINE_MAX_CONST_B, D3DERR_INVALIDCALL); - user_assert(StartRegister + BoolCount <= NINE_MAX_CONST_B, D3DERR_INVALIDCALL); + user_assert(StartRegister < (This->may_swvp ? NINE_MAX_CONST_B_SWVP : NINE_MAX_CONST_B), + D3DERR_INVALIDCALL); + user_assert(StartRegister + BoolCount <= (This->may_swvp ? NINE_MAX_CONST_B_SWVP : NINE_MAX_CONST_B), + D3DERR_INVALIDCALL); user_assert(pConstantData, D3DERR_INVALIDCALL); if (!This->is_recording) { @@ -3528,8 +3414,14 @@ for (i = 0; i < BoolCount; i++) state->vs_const_b[StartRegister + i] = pConstantData[i] ? bool_true : 0; - state->changed.vs_const_b |= ((1 << BoolCount) - 1) << StartRegister; - state->changed.group |= NINE_STATE_VS_CONST; + if (unlikely(This->is_recording)) { + nine_ranges_insert(&state->changed.vs_const_b, + StartRegister, StartRegister + BoolCount, + &This->range_pool); + state->changed.group |= NINE_STATE_VS_CONST; + } else + nine_context_set_vertex_shader_constant_b(This, StartRegister, pConstantData, + sizeof(BOOL) * BoolCount, BoolCount); return D3D_OK; } @@ -3543,8 +3435,10 @@ const struct nine_state *state = &This->state; int i; - user_assert(StartRegister < NINE_MAX_CONST_B, D3DERR_INVALIDCALL); - user_assert(StartRegister + BoolCount <= NINE_MAX_CONST_B, D3DERR_INVALIDCALL); + user_assert(StartRegister < (This->may_swvp ? NINE_MAX_CONST_B_SWVP : NINE_MAX_CONST_B), + D3DERR_INVALIDCALL); + user_assert(StartRegister + BoolCount <= (This->may_swvp ? NINE_MAX_CONST_B_SWVP : NINE_MAX_CONST_B), + D3DERR_INVALIDCALL); user_assert(pConstantData, D3DERR_INVALIDCALL); for (i = 0; i < BoolCount; i++) @@ -3570,22 +3464,31 @@ user_assert(StreamNumber < This->caps.MaxStreams, D3DERR_INVALIDCALL); user_assert(Stride <= This->caps.MaxStreamStride, D3DERR_INVALIDCALL); - if (likely(!This->is_recording)) { - if (state->stream[i] == NineVertexBuffer9(pStreamData) && - state->vtxbuf[i].stride == Stride && - state->vtxbuf[i].buffer_offset == OffsetInBytes) - return D3D_OK; - } - nine_bind(&state->stream[i], pStreamData); - - state->changed.vtxbuf |= 1 << StreamNumber; - - if (pStreamData) { + if (unlikely(This->is_recording)) { + nine_bind(&state->stream[i], pStreamData); + state->changed.vtxbuf |= 1 << StreamNumber; state->vtxbuf[i].stride = Stride; state->vtxbuf[i].buffer_offset = OffsetInBytes; + return D3D_OK; } - pipe_resource_reference(&state->vtxbuf[i].buffer, - pStreamData ? NineVertexBuffer9_GetResource(pVBuf9) : NULL); + + if (state->stream[i] == NineVertexBuffer9(pStreamData) && + state->vtxbuf[i].stride == Stride && + state->vtxbuf[i].buffer_offset == OffsetInBytes) + return D3D_OK; + + state->vtxbuf[i].stride = Stride; + state->vtxbuf[i].buffer_offset = OffsetInBytes; + + NineBindBufferToDevice(This, + (struct NineBuffer9 **)&state->stream[i], + (struct NineBuffer9 *)pVBuf9); + + nine_context_set_stream_source(This, + StreamNumber, + pVBuf9, + OffsetInBytes, + Stride); return D3D_OK; } @@ -3628,19 +3531,20 @@ (Setting & D3DSTREAMSOURCE_INDEXEDDATA)), D3DERR_INVALIDCALL); user_assert(Setting, D3DERR_INVALIDCALL); - if (likely(!This->is_recording) && state->stream_freq[StreamNumber] == Setting) + if (unlikely(This->is_recording)) { + state->stream_freq[StreamNumber] = Setting; + state->changed.stream_freq |= 1 << StreamNumber; + if (StreamNumber != 0) + state->changed.group |= NINE_STATE_STREAMFREQ; return D3D_OK; + } - state->stream_freq[StreamNumber] = Setting; + if (state->stream_freq[StreamNumber] == Setting) + return D3D_OK; - if (Setting & D3DSTREAMSOURCE_INSTANCEDATA) - state->stream_instancedata_mask |= 1 << StreamNumber; - else - state->stream_instancedata_mask &= ~(1 << StreamNumber); + state->stream_freq[StreamNumber] = Setting; - state->changed.stream_freq |= 1 << StreamNumber; /* Used for stateblocks */ - if (StreamNumber != 0) - state->changed.group |= NINE_STATE_STREAMFREQ; + nine_context_set_stream_source_freq(This, StreamNumber, Setting); return D3D_OK; } @@ -3659,15 +3563,24 @@ IDirect3DIndexBuffer9 *pIndexData ) { struct nine_state *state = This->update; + struct NineIndexBuffer9 *idxbuf = NineIndexBuffer9(pIndexData); DBG("This=%p pIndexData=%p\n", This, pIndexData); - if (likely(!This->is_recording)) - if (state->idxbuf == NineIndexBuffer9(pIndexData)) - return D3D_OK; - nine_bind(&state->idxbuf, pIndexData); + if (unlikely(This->is_recording)) { + nine_bind(&state->idxbuf, idxbuf); + state->changed.group |= NINE_STATE_IDXBUF; + return D3D_OK; + } + + if (state->idxbuf == idxbuf) + return D3D_OK; - state->changed.group |= NINE_STATE_IDXBUF; + NineBindBufferToDevice(This, + (struct NineBuffer9 **)&state->idxbuf, + (struct NineBuffer9 *)idxbuf); + + nine_context_set_indices(This, idxbuf); return D3D_OK; } @@ -3706,27 +3619,25 @@ IDirect3DPixelShader9 *pShader ) { struct nine_state *state = This->update; - unsigned old_mask = state->ps ? state->ps->rt_mask : 1; - unsigned mask; + struct NinePixelShader9 *ps = (struct NinePixelShader9*)pShader; DBG("This=%p pShader=%p\n", This, pShader); - if (!This->is_recording && state->ps == (struct NinePixelShader9*)pShader) - return D3D_OK; + if (unlikely(This->is_recording)) { + /* Technically we need NINE_STATE_FB only + * if the ps mask changes, but put it always + * to be safe */ + nine_bind(&state->ps, pShader); + state->changed.group |= NINE_STATE_PS | NINE_STATE_FB; + return D3D_OK; + } + + if (state->ps == ps) + return D3D_OK; + + nine_bind(&state->ps, ps); - /* ff -> non-ff: commit back non-ff constants */ - if (!state->ps && pShader) - state->commit |= NINE_STATE_COMMIT_CONST_PS; - - nine_bind(&state->ps, pShader); - - state->changed.group |= NINE_STATE_PS; - - mask = state->ps ? state->ps->rt_mask : 1; - /* We need to update cbufs if the pixel shader would - * write to different render targets */ - if (mask != old_mask) - state->changed.group |= NINE_STATE_FB; + nine_context_set_pixel_shader(This, ps); return D3D_OK; } @@ -3758,21 +3669,30 @@ return D3D_OK; user_assert(pConstantData, D3DERR_INVALIDCALL); - if (!This->is_recording) { - if (!memcmp(&state->ps_const_f[StartRegister * 4], pConstantData, - Vector4fCount * 4 * sizeof(state->ps_const_f[0]))) - return D3D_OK; + if (unlikely(This->is_recording)) { + memcpy(&state->ps_const_f[StartRegister * 4], + pConstantData, + Vector4fCount * 4 * sizeof(state->ps_const_f[0])); + + nine_ranges_insert(&state->changed.ps_const_f, + StartRegister, StartRegister + Vector4fCount, + &This->range_pool); + + state->changed.group |= NINE_STATE_PS_CONST; + return D3D_OK; } + if (!memcmp(&state->ps_const_f[StartRegister * 4], pConstantData, + Vector4fCount * 4 * sizeof(state->ps_const_f[0]))) + return D3D_OK; + memcpy(&state->ps_const_f[StartRegister * 4], pConstantData, Vector4fCount * 4 * sizeof(state->ps_const_f[0])); - nine_ranges_insert(&state->changed.ps_const_f, - StartRegister, StartRegister + Vector4fCount, - &This->range_pool); - - state->changed.group |= NINE_STATE_PS_CONST; + nine_context_set_pixel_shader_constant_f(This, StartRegister, pConstantData, + Vector4fCount * 4 * sizeof(state->ps_const_f[0]), + Vector4fCount); return D3D_OK; } @@ -3829,8 +3749,13 @@ state->ps_const_i[StartRegister+i][3] = fui((float)(pConstantData[4*i+3])); } } - state->changed.ps_const_i |= ((1 << Vector4iCount) - 1) << StartRegister; - state->changed.group |= NINE_STATE_PS_CONST; + + if (unlikely(This->is_recording)) { + state->changed.ps_const_i |= ((1 << Vector4iCount) - 1) << StartRegister; + state->changed.group |= NINE_STATE_PS_CONST; + } else + nine_context_set_pixel_shader_constant_i(This, StartRegister, pConstantData, + sizeof(state->ps_const_i[0]) * Vector4iCount, Vector4iCount); return D3D_OK; } @@ -3894,8 +3819,12 @@ for (i = 0; i < BoolCount; i++) state->ps_const_b[StartRegister + i] = pConstantData[i] ? bool_true : 0; - state->changed.ps_const_b |= ((1 << BoolCount) - 1) << StartRegister; - state->changed.group |= NINE_STATE_PS_CONST; + if (unlikely(This->is_recording)) { + state->changed.ps_const_b |= ((1 << BoolCount) - 1) << StartRegister; + state->changed.group |= NINE_STATE_PS_CONST; + } else + nine_context_set_pixel_shader_constant_b(This, StartRegister, pConstantData, + sizeof(BOOL) * BoolCount, BoolCount); return D3D_OK; } diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/device9ex.c mesa-17.0.7/src/gallium/state_trackers/nine/device9ex.c --- mesa-12.0.6/src/gallium/state_trackers/nine/device9ex.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/device9ex.c 2017-06-01 10:37:10.000000000 +0000 @@ -257,8 +257,9 @@ break; } - nine_pipe_context_clear((struct NineDevice9 *)This); + nine_csmt_process(&This->base); nine_state_clear(&This->base.state, TRUE); + nine_context_clear(&This->base); NineDevice9_SetDefaultState((struct NineDevice9 *)This, TRUE); NineDevice9_SetRenderTarget( diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/device9.h mesa-17.0.7/src/gallium/state_trackers/nine/device9.h --- mesa-12.0.6/src/gallium/state_trackers/nine/device9.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/device9.h 2017-06-01 10:37:10.000000000 +0000 @@ -38,6 +38,7 @@ struct cso_context; struct hud_context; struct u_upload_mgr; +struct csmt_context; struct NineSwapChain9; struct NineStateBlock9; @@ -48,11 +49,22 @@ { struct NineUnknown base; boolean ex; + boolean may_swvp; /* G3D context */ struct pipe_screen *screen; - struct pipe_context *pipe; - struct cso_context *cso; + /* For first time upload. No Sync with rendering thread */ + struct pipe_context *pipe_secondary; + struct pipe_screen *screen_sw; + struct pipe_context *pipe_sw; + struct cso_context *cso_sw; + + /* CSMT context */ + struct csmt_context *csmt_ctx; + BOOL csmt_active; + + /* For DISCARD/NOOVERWRITE */ + struct nine_buffer_upload *buffer_upload; /* creation parameters */ D3DCAPS9 caps; @@ -67,6 +79,8 @@ struct NineStateBlock9 *record; struct nine_state *update; /* state to update (&state / &record->state) */ struct nine_state state; /* device state */ + struct nine_context context; + struct nine_state_sw_internal state_sw_internal; struct list_head update_buffers; struct list_head update_textures; @@ -76,10 +90,6 @@ boolean is_recording; boolean in_scene; - boolean prefer_user_constbuf; - - struct pipe_resource *constbuf_vs; - struct pipe_resource *constbuf_ps; uint16_t vs_const_size; uint16_t ps_const_size; uint16_t max_vs_const_f; @@ -112,15 +122,19 @@ POINT pos; BOOL visible; boolean software; + void *hw_upload_temp; } cursor; struct { boolean user_vbufs; boolean user_ibufs; boolean user_cbufs; + boolean user_sw_vbufs; + boolean user_sw_cbufs; boolean window_space_position_support; boolean vs_integer; boolean ps_integer; + boolean offset_units_unscaled; } driver_caps; struct { @@ -130,6 +144,8 @@ struct u_upload_mgr *vertex_uploader; struct u_upload_mgr *index_uploader; struct u_upload_mgr *constbuf_uploader; + struct u_upload_mgr *vertex_sw_uploader; + struct u_upload_mgr *constbuf_sw_uploader; unsigned constbuf_alignment; struct nine_range_pool range_pool; @@ -143,6 +159,9 @@ int minor_version_num; long long available_texture_mem; long long available_texture_limit; + + /* software vertex processing */ + boolean swvp; }; static inline struct NineDevice9 * NineDevice9( void *data ) @@ -190,9 +209,6 @@ struct pipe_context * NineDevice9_GetPipe( struct NineDevice9 *This ); -struct cso_context * -NineDevice9_GetCSO( struct NineDevice9 *This ); - const D3DCAPS9 * NineDevice9_GetCaps( struct NineDevice9 *This ); diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/indexbuffer9.c mesa-17.0.7/src/gallium/state_trackers/nine/indexbuffer9.c --- mesa-12.0.6/src/gallium/state_trackers/nine/indexbuffer9.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/indexbuffer9.c 2017-06-01 10:37:10.000000000 +0000 @@ -49,7 +49,7 @@ if (FAILED(hr)) return hr; - This->buffer.buffer = NineIndexBuffer9_GetResource(This); + This->buffer.buffer = NULL; This->buffer.offset = 0; switch (pDesc->Format) { @@ -76,15 +76,11 @@ const struct pipe_index_buffer * NineIndexBuffer9_GetBuffer( struct NineIndexBuffer9 *This ) { + /* The resource may change */ + This->buffer.buffer = NineBuffer9_GetResource(&This->base, &This->buffer.offset); return &This->buffer; } -struct pipe_resource * -NineIndexBuffer9_GetResource( struct NineIndexBuffer9 *This ) -{ - return NineBuffer9_GetResource(&This->base); -} - HRESULT NINE_WINAPI NineIndexBuffer9_Lock( struct NineIndexBuffer9 *This, UINT OffsetToLock, @@ -115,9 +111,9 @@ (void *)NineUnknown_AddRef, (void *)NineUnknown_Release, (void *)NineUnknown_GetDevice, /* actually part of Resource9 iface */ - (void *)NineResource9_SetPrivateData, - (void *)NineResource9_GetPrivateData, - (void *)NineResource9_FreePrivateData, + (void *)NineUnknown_SetPrivateData, + (void *)NineUnknown_GetPrivateData, + (void *)NineUnknown_FreePrivateData, (void *)NineResource9_SetPriority, (void *)NineResource9_GetPriority, (void *)NineResource9_PreLoad, diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/indexbuffer9.h mesa-17.0.7/src/gallium/state_trackers/nine/indexbuffer9.h --- mesa-12.0.6/src/gallium/state_trackers/nine/indexbuffer9.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/indexbuffer9.h 2017-06-01 10:37:10.000000000 +0000 @@ -66,8 +66,6 @@ const struct pipe_index_buffer * NineIndexBuffer9_GetBuffer( struct NineIndexBuffer9 *This ); -struct pipe_resource * -NineIndexBuffer9_GetResource( struct NineIndexBuffer9 *This ); /*** Direct3D public ***/ HRESULT NINE_WINAPI diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/iunknown.c mesa-17.0.7/src/gallium/state_trackers/nine/iunknown.c --- mesa-12.0.6/src/gallium/state_trackers/nine/iunknown.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/iunknown.c 2017-06-01 10:37:10.000000000 +0000 @@ -22,7 +22,11 @@ #include "iunknown.h" #include "util/u_atomic.h" +#include "util/u_hash_table.h" + #include "nine_helpers.h" +#include "nine_pdata.h" +#include "nine_lock.h" #define DBG_CHANNEL DBG_UNKNOWN @@ -43,6 +47,10 @@ This->guids = pParams->guids; This->dtor = pParams->dtor; + This->pdata = util_hash_table_create(ht_guid_hash, ht_guid_compare); + if (!This->pdata) + return E_OUTOFMEMORY; + return D3D_OK; } @@ -51,6 +59,12 @@ { if (This->refs && This->device) /* Possible only if early exit after a ctor failed */ (void) NineUnknown_Release(NineUnknown(This->device)); + + if (This->pdata) { + util_hash_table_foreach(This->pdata, ht_guid_delete, NULL); + util_hash_table_destroy(This->pdata); + } + FREE(This); } @@ -60,15 +74,22 @@ void **ppvObject ) { unsigned i = 0; + char guid_str[64]; + + DBG("This=%p riid=%p id=%s ppvObject=%p\n", + This, riid, riid ? GUID_sprintf(guid_str, riid) : "", ppvObject); - DBG("This=%p riid=%p ppvObject=%p\n", This, riid, ppvObject); + (void)guid_str; if (!ppvObject) return E_POINTER; do { if (GUID_equal(This->guids[i], riid)) { *ppvObject = This; - assert(This->refs); + /* Tests showed that this call succeeds even on objects with + * zero refcount. This can happen if the app released all references + * but the resource is still bound. + */ NineUnknown_AddRef(This); return S_OK; } @@ -90,9 +111,6 @@ if (r == 1) { if (This->device) NineUnknown_AddRef(NineUnknown(This->device)); - /* This shouldn't be necessary: - if (This->container) - NineUnknown_Bind(NineUnknown(This->container)); */ } return r; } @@ -110,11 +128,34 @@ if (NineUnknown_Release(NineUnknown(This->device)) == 0) return r; /* everything's gone */ } - if (This->container) { - /* NineUnknown_Unbind(NineUnknown(This->container)); */ - } else - if (This->bind == 0) { + /* Containers (here with !forward) take care of item destruction */ + if (!This->container && This->bind == 0) { + This->dtor(This); + } + } + return r; +} + +/* No need to lock the mutex protecting nine (when D3DCREATE_MULTITHREADED) + * for AddRef and Release, except for dtor as some of the dtors require it. */ +ULONG NINE_WINAPI +NineUnknown_ReleaseWithDtorLock( struct NineUnknown *This ) +{ + if (This->forward) + return NineUnknown_ReleaseWithDtorLock(This->container); + + ULONG r = p_atomic_dec_return(&This->refs); + + if (r == 0) { + if (This->device) { + if (NineUnknown_ReleaseWithDtorLock(NineUnknown(This->device)) == 0) + return r; /* everything's gone */ + } + /* Containers (here with !forward) take care of item destruction */ + if (!This->container && This->bind == 0) { + NineLockGlobalMutex(); This->dtor(This); + NineUnlockGlobalMutex(); } } return r; @@ -129,3 +170,114 @@ *ppDevice = (IDirect3DDevice9 *)This->device; return D3D_OK; } + +HRESULT NINE_WINAPI +NineUnknown_SetPrivateData( struct NineUnknown *This, + REFGUID refguid, + const void *pData, + DWORD SizeOfData, + DWORD Flags ) +{ + enum pipe_error err; + struct pheader *header; + const void *user_data = pData; + char guid_str[64]; + void *header_data; + + DBG("This=%p GUID=%s pData=%p SizeOfData=%u Flags=%x\n", + This, GUID_sprintf(guid_str, refguid), pData, SizeOfData, Flags); + + (void)guid_str; + + if (Flags & D3DSPD_IUNKNOWN) + user_assert(SizeOfData == sizeof(IUnknown *), D3DERR_INVALIDCALL); + + /* data consists of a header and the actual data. avoiding 2 mallocs */ + header = CALLOC_VARIANT_LENGTH_STRUCT(pheader, SizeOfData); + if (!header) { return E_OUTOFMEMORY; } + header->unknown = (Flags & D3DSPD_IUNKNOWN) ? TRUE : FALSE; + + /* if the refguid already exists, delete it */ + NineUnknown_FreePrivateData(This, refguid); + + /* IUnknown special case */ + if (header->unknown) { + /* here the pointer doesn't point to the data we want, so point at the + * pointer making what we eventually copy is the pointer itself */ + user_data = &pData; + } + + header->size = SizeOfData; + header_data = (void *)header + sizeof(*header); + memcpy(header_data, user_data, header->size); + memcpy(&header->guid, refguid, sizeof(header->guid)); + + err = util_hash_table_set(This->pdata, &header->guid, header); + if (err == PIPE_OK) { + if (header->unknown) { IUnknown_AddRef(*(IUnknown **)header_data); } + return D3D_OK; + } + + FREE(header); + if (err == PIPE_ERROR_OUT_OF_MEMORY) { return E_OUTOFMEMORY; } + + return D3DERR_DRIVERINTERNALERROR; +} + +HRESULT NINE_WINAPI +NineUnknown_GetPrivateData( struct NineUnknown *This, + REFGUID refguid, + void *pData, + DWORD *pSizeOfData ) +{ + struct pheader *header; + DWORD sizeofdata; + char guid_str[64]; + void *header_data; + + DBG("This=%p GUID=%s pData=%p pSizeOfData=%p\n", + This, GUID_sprintf(guid_str, refguid), pData, pSizeOfData); + + (void)guid_str; + + header = util_hash_table_get(This->pdata, refguid); + if (!header) { return D3DERR_NOTFOUND; } + + user_assert(pSizeOfData, E_POINTER); + sizeofdata = *pSizeOfData; + *pSizeOfData = header->size; + + if (!pData) { + return D3D_OK; + } + if (sizeofdata < header->size) { + return D3DERR_MOREDATA; + } + + header_data = (void *)header + sizeof(*header); + if (header->unknown) { IUnknown_AddRef(*(IUnknown **)header_data); } + memcpy(pData, header_data, header->size); + + return D3D_OK; +} + +HRESULT NINE_WINAPI +NineUnknown_FreePrivateData( struct NineUnknown *This, + REFGUID refguid ) +{ + struct pheader *header; + char guid_str[64]; + + DBG("This=%p GUID=%s\n", This, GUID_sprintf(guid_str, refguid)); + + (void)guid_str; + + header = util_hash_table_get(This->pdata, refguid); + if (!header) + return D3DERR_NOTFOUND; + + ht_guid_delete(NULL, header, NULL); + util_hash_table_remove(This->pdata, refguid); + + return D3D_OK; +} diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/iunknown.h mesa-17.0.7/src/gallium/state_trackers/nine/iunknown.h --- mesa-12.0.6/src/gallium/state_trackers/nine/iunknown.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/iunknown.h 2017-06-01 10:37:10.000000000 +0000 @@ -25,6 +25,7 @@ #include "pipe/p_compiler.h" +#include "util/u_atomic.h" #include "util/u_memory.h" #include "guid.h" @@ -48,11 +49,19 @@ int32_t bind; /* internal bind count */ boolean forward; /* whether to forward references to the container */ - struct NineUnknown *container; /* referenced if (refs | bind) */ + /* container: for surfaces and volumes only. + * Can be a texture, a volume texture or a swapchain. + * forward is set to false for the swapchain case. + * If forward is set, refs are passed to the container if forward is set + * and the container has bind increased if the object has non null bind. */ + struct NineUnknown *container; struct NineDevice9 *device; /* referenced if (refs) */ const GUID **guids; /* for QueryInterface */ + /* for [GS]etPrivateData/FreePrivateData */ + struct util_hash_table *pdata; + void (*dtor)(void *data); /* top-level dtor */ }; static inline struct NineUnknown * @@ -91,10 +100,30 @@ ULONG NINE_WINAPI NineUnknown_Release( struct NineUnknown *This ); +ULONG NINE_WINAPI +NineUnknown_ReleaseWithDtorLock( struct NineUnknown *This ); + HRESULT NINE_WINAPI NineUnknown_GetDevice( struct NineUnknown *This, IDirect3DDevice9 **ppDevice ); +HRESULT NINE_WINAPI +NineUnknown_SetPrivateData( struct NineUnknown *This, + REFGUID refguid, + const void *pData, + DWORD SizeOfData, + DWORD Flags ); + +HRESULT NINE_WINAPI +NineUnknown_GetPrivateData( struct NineUnknown *This, + REFGUID refguid, + void *pData, + DWORD *pSizeOfData ); + +HRESULT NINE_WINAPI +NineUnknown_FreePrivateData( struct NineUnknown *This, + REFGUID refguid ); + /*** Nine private methods ***/ static inline void @@ -107,28 +136,25 @@ static inline UINT NineUnknown_Bind( struct NineUnknown *This ) { - UINT b = ++This->bind; + UINT b = p_atomic_inc_return(&This->bind); assert(b); - if (b == 1 && This->container) { - if (This->container != NineUnknown(This->device)) - NineUnknown_Bind(This->container); - } + + if (b == 1 && This->forward) + NineUnknown_Bind(This->container); + return b; } static inline UINT NineUnknown_Unbind( struct NineUnknown *This ) { - UINT b = --This->bind; - if (!b) { - if (This->container) { - if (This->container != NineUnknown(This->device)) - NineUnknown_Unbind(This->container); - } else - if (This->refs == 0) { - This->dtor(This); - } - } + UINT b = p_atomic_dec_return(&This->bind); + + if (b == 0 && This->forward) + NineUnknown_Unbind(This->container); + else if (b == 0 && This->refs == 0 && !This->container) + This->dtor(This); + return b; } @@ -144,10 +170,7 @@ NineUnknown_Detach( struct NineUnknown *This ) { assert(This->container && !This->forward); - if (This->refs) - NineUnknown_Unbind(This->container); - if (This->bind) - NineUnknown_Unbind(This->container); + This->container = NULL; if (!(This->refs | This->bind)) This->dtor(This); diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/Makefile.in mesa-17.0.7/src/gallium/state_trackers/nine/Makefile.in --- mesa-12.0.6/src/gallium/state_trackers/nine/Makefile.in 2017-01-24 01:41:49.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/Makefile.in 2017-06-01 10:37:21.000000000 +0000 @@ -89,10 +89,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -119,12 +122,12 @@ am__objects_1 = adapter9.lo authenticatedchannel9.lo basetexture9.lo \ buffer9.lo cryptosession9.lo cubetexture9.lo device9.lo \ device9ex.lo device9video.lo guid.lo indexbuffer9.lo \ - iunknown.lo nine_debug.lo nine_dump.lo \ + iunknown.lo nine_buffer_upload.lo nine_debug.lo nine_dump.lo \ nineexoverlayextension.lo nine_ff.lo nine_helpers.lo \ - nine_lock.lo nine_pipe.lo nine_quirk.lo nine_shader.lo \ - nine_state.lo pixelshader9.lo query9.lo resource9.lo \ - stateblock9.lo surface9.lo swapchain9.lo swapchain9ex.lo \ - texture9.lo threadpool.lo vertexbuffer9.lo \ + nine_lock.lo nine_pipe.lo nine_quirk.lo nine_queue.lo \ + nine_shader.lo nine_state.lo pixelshader9.lo query9.lo \ + resource9.lo stateblock9.lo surface9.lo swapchain9.lo \ + swapchain9ex.lo texture9.lo threadpool.lo vertexbuffer9.lo \ vertexdeclaration9.lo vertexshader9.lo volume9.lo \ volumetexture9.lo am_libninetracker_la_OBJECTS = $(am__objects_1) @@ -202,6 +205,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -216,6 +221,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -245,10 +251,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -298,11 +305,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -342,8 +346,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -380,8 +382,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -390,7 +390,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -398,13 +397,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -433,6 +433,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -520,6 +521,9 @@ indexbuffer9.h \ iunknown.c \ iunknown.h \ + nine_buffer_upload.c \ + nine_buffer_upload.h \ + nine_csmt_helper.h \ nine_debug.c \ nine_debug.h \ nine_defines.h \ @@ -540,6 +544,8 @@ nine_pipe.h \ nine_quirk.c \ nine_quirk.h \ + nine_queue.c \ + nine_queue.h \ nine_shader.c \ nine_shader.h \ nine_state.c \ @@ -620,12 +626,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -637,7 +639,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ -I$(top_srcdir)/include/D3D9 \ $(GALLIUM_CFLAGS) \ @@ -713,12 +715,14 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/guid.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/indexbuffer9.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/iunknown.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/nine_buffer_upload.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/nine_debug.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/nine_dump.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/nine_ff.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/nine_helpers.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/nine_lock.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/nine_pipe.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/nine_queue.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/nine_quirk.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/nine_shader.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/nine_state.Plo@am__quote@ diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/Makefile.sources mesa-17.0.7/src/gallium/state_trackers/nine/Makefile.sources --- mesa-12.0.6/src/gallium/state_trackers/nine/Makefile.sources 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/Makefile.sources 2017-06-01 10:37:10.000000000 +0000 @@ -23,6 +23,9 @@ indexbuffer9.h \ iunknown.c \ iunknown.h \ + nine_buffer_upload.c \ + nine_buffer_upload.h \ + nine_csmt_helper.h \ nine_debug.c \ nine_debug.h \ nine_defines.h \ @@ -43,6 +46,8 @@ nine_pipe.h \ nine_quirk.c \ nine_quirk.h \ + nine_queue.c \ + nine_queue.h \ nine_shader.c \ nine_shader.h \ nine_state.c \ diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/nine_buffer_upload.c mesa-17.0.7/src/gallium/state_trackers/nine/nine_buffer_upload.c --- mesa-12.0.6/src/gallium/state_trackers/nine/nine_buffer_upload.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/nine_buffer_upload.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,294 @@ +/************************************************************************** + * + * Copyright 2009 VMware, Inc. + * Copyright 2016 Axel Davy + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ +/* Adapted from u_upload_mgr. + * Makes suballocations from bigger allocations, + * while enabling fast mapping. */ + +#include "pipe/p_defines.h" +#include "util/u_inlines.h" +#include "pipe/p_context.h" +#include "util/u_memory.h" +#include "util/u_math.h" +#include "util/slab.h" + +#include "nine_buffer_upload.h" + +#include "nine_debug.h" + +#define DBG_CHANNEL (DBG_INDEXBUFFER|DBG_VERTEXBUFFER) + +struct nine_buffer_group { + unsigned refcount; /* How many sub-buffers live inside the buffer */ + struct pipe_resource *resource; + struct pipe_transfer *transfer; + uint8_t *map; + unsigned free_offset; /* Aligned offset to the upload buffer, pointing + * at the first unused byte. */ +}; + +struct nine_subbuffer { + struct nine_buffer_group *parent; /* Can be NULL */ + struct pipe_resource *resource; /* The parent resource if apply */ + unsigned offset; /* Offset inside the resource */ + /* If there is no parent, the resource map. Else NULL. */ + struct pipe_transfer *transfer; + uint8_t *map; +}; + +struct nine_buffer_upload { + struct pipe_context *pipe; + struct slab_mempool buffer_pool; + + unsigned buffers_size; /* Size of the big allocated buffers */ + unsigned num_buffers; + struct nine_buffer_group *buffers; +}; + +static void +nine_upload_create_buffer_group(struct nine_buffer_upload *upload, + struct nine_buffer_group *group) +{ + struct pipe_resource resource; + struct pipe_screen *screen = upload->pipe->screen; + DBG("%p %p\n", upload, group); + + memset(&resource, 0, sizeof(resource)); + resource.target = PIPE_BUFFER; + resource.format = PIPE_FORMAT_R8_UNORM; + resource.bind = PIPE_BIND_VERTEX_BUFFER; + resource.usage = PIPE_USAGE_STREAM; + resource.width0 = upload->buffers_size; + resource.height0 = 1; + resource.depth0 = 1; + resource.array_size = 1; + resource.flags = PIPE_RESOURCE_FLAG_MAP_PERSISTENT | + PIPE_RESOURCE_FLAG_MAP_COHERENT; + + group->refcount = 0; + group->resource = screen->resource_create(screen, &resource); + if (group->resource == NULL) + return; + + group->map = pipe_buffer_map_range(upload->pipe, group->resource, + 0, upload->buffers_size, + PIPE_TRANSFER_WRITE | + PIPE_TRANSFER_PERSISTENT | + PIPE_TRANSFER_COHERENT, + &group->transfer); + if (group->map == NULL) { + group->transfer = NULL; + pipe_resource_reference(&group->resource, NULL); + return; + } + + group->free_offset = 0; +} + +static void +nine_upload_destroy_buffer_group(struct nine_buffer_upload *upload, + struct nine_buffer_group *group) +{ + DBG("%p %p\n", upload, group); + assert(group->refcount == 0); + + if (group->transfer) + pipe_transfer_unmap(upload->pipe, group->transfer); + if (group->resource) + pipe_resource_reference(&group->resource, NULL); + group->transfer = NULL; + group->map = NULL; +} + +struct nine_buffer_upload * +nine_upload_create(struct pipe_context *pipe, unsigned buffers_size, + unsigned num_buffers) +{ + struct nine_buffer_upload *upload; + int i; + + DBG("\n"); + + if (!pipe->screen->get_param(pipe->screen, + PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT)) + return NULL; + + upload = CALLOC_STRUCT(nine_buffer_upload); + + if (!upload) + return NULL; + + slab_create(&upload->buffer_pool, sizeof(struct nine_subbuffer), 4096); + + upload->pipe = pipe; + upload->buffers_size = align(buffers_size, 4096); + upload->num_buffers = num_buffers; + + upload->buffers = CALLOC(num_buffers, sizeof(struct nine_buffer_group)); + if (!upload->buffers) + goto buffers_fail; + + for (i = 0; i < num_buffers; i++) + nine_upload_create_buffer_group(upload, &upload->buffers[i]); + + return upload; + +buffers_fail: + slab_destroy(&upload->buffer_pool); + FREE(upload); + return NULL; +} + +void +nine_upload_destroy(struct nine_buffer_upload *upload) +{ + int i; + + DBG("%p\n", upload); + + for (i = 0; i < upload->num_buffers; i++) + nine_upload_destroy_buffer_group(upload, &upload->buffers[i]); + slab_destroy(&upload->buffer_pool); + FREE(upload); +} + +struct nine_subbuffer * +nine_upload_create_buffer(struct nine_buffer_upload *upload, + unsigned buffer_size) +{ + struct nine_subbuffer *buf = slab_alloc_st(&upload->buffer_pool); + struct nine_buffer_group *group = NULL; + unsigned size = align(buffer_size, 4096); + int i = 0; + + DBG("%p %d\n", upload, buffer_size); + + if (!buf) + return NULL; + + for (i = 0; i < upload->num_buffers; i++) { + group = &upload->buffers[i]; + if (group->resource && + group->free_offset + size <= upload->buffers_size) + break; + } + + if (i == upload->num_buffers) { + /* Allocate lonely buffer */ + struct pipe_resource resource; + struct pipe_screen *screen = upload->pipe->screen; + + DBG("Allocating buffer\n"); + buf->parent = NULL; + + memset(&resource, 0, sizeof(resource)); + resource.target = PIPE_BUFFER; + resource.format = PIPE_FORMAT_R8_UNORM; + resource.bind = PIPE_BIND_VERTEX_BUFFER; + resource.usage = PIPE_USAGE_STREAM; + resource.width0 = buffer_size; + resource.height0 = 1; + resource.depth0 = 1; + resource.array_size = 1; + resource.flags = PIPE_RESOURCE_FLAG_MAP_PERSISTENT | + PIPE_RESOURCE_FLAG_MAP_COHERENT; + + buf->resource = screen->resource_create(screen, &resource); + if (buf->resource == NULL) { + slab_free_st(&upload->buffer_pool, buf); + return NULL; + } + + buf->map = pipe_buffer_map_range(upload->pipe, buf->resource, + 0, buffer_size, + PIPE_TRANSFER_WRITE | + PIPE_TRANSFER_PERSISTENT | + PIPE_TRANSFER_COHERENT, + &buf->transfer); + if (buf->map == NULL) { + pipe_resource_reference(&buf->resource, NULL); + slab_free_st(&upload->buffer_pool, buf); + return NULL; + } + buf->offset = 0; + return buf; + } + + DBG("Using buffer group %d\n", i); + + buf->parent = group; + buf->resource = NULL; + pipe_resource_reference(&buf->resource, group->resource); + buf->offset = group->free_offset; + + group->free_offset += size; + group->refcount += 1; + + return buf; +} + +void +nine_upload_release_buffer(struct nine_buffer_upload *upload, + struct nine_subbuffer *buf) +{ + DBG("%p %p %p\n", upload, buf, buf->parent); + + if (buf->parent) { + pipe_resource_reference(&buf->resource, NULL); + buf->parent->refcount--; + if (buf->parent->refcount == 0) { + /* Allocate new buffer */ + nine_upload_destroy_buffer_group(upload, buf->parent); + nine_upload_create_buffer_group(upload, buf->parent); + } + } else { + /* lonely buffer */ + if (buf->transfer) + pipe_transfer_unmap(upload->pipe, buf->transfer); + pipe_resource_reference(&buf->resource, NULL); + } + + slab_free_st(&upload->buffer_pool, buf); +} + +uint8_t * +nine_upload_buffer_get_map(struct nine_subbuffer *buf) +{ + if (buf->parent) { + return buf->parent->map + buf->offset; + } + /* lonely buffer */ + return buf->map; +} + +struct pipe_resource * +nine_upload_buffer_resource_and_offset(struct nine_subbuffer *buf, + unsigned *offset) +{ + *offset = buf->offset; + return buf->resource; +} diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/nine_buffer_upload.h mesa-17.0.7/src/gallium/state_trackers/nine/nine_buffer_upload.h --- mesa-12.0.6/src/gallium/state_trackers/nine/nine_buffer_upload.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/nine_buffer_upload.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,59 @@ +/************************************************************************** + * + * Copyright 2009 VMware, Inc. + * Copyright 2016 Axel Davy + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#ifndef _NINE_BUFFER_UPLOAD_H_ +#define _NINE_BUFFER_UPLOAD_H_ + +#include "pipe/p_defines.h" + +struct nine_buffer_upload; +struct nine_subbuffer; + +struct nine_buffer_upload * +nine_upload_create(struct pipe_context *pipe, unsigned buffers_size, + unsigned num_buffers); + +void +nine_upload_destroy(struct nine_buffer_upload *upload); + +struct nine_subbuffer * +nine_upload_create_buffer(struct nine_buffer_upload *upload, + unsigned buffer_size); + +void +nine_upload_release_buffer(struct nine_buffer_upload *upload, + struct nine_subbuffer *buf); + +uint8_t * +nine_upload_buffer_get_map(struct nine_subbuffer *buf); + +struct pipe_resource * +nine_upload_buffer_resource_and_offset(struct nine_subbuffer *buf, + unsigned *offset); + +#endif /* _NINE_BUFFER_UPLOAD_H_ */ diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/nine_csmt_helper.h mesa-17.0.7/src/gallium/state_trackers/nine/nine_csmt_helper.h --- mesa-12.0.6/src/gallium/state_trackers/nine/nine_csmt_helper.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/nine_csmt_helper.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,427 @@ +/* + * Copyright 2016 Patrick Rudolph + * + * Permission is hereby granted, free of charge, f, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, f, copy, modify, merge, f, publish, distribute, f, sub + * license, f, and/or sell copies of the Software, f, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISe, f, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +/* get number of arguments with __NARG__ */ +#define __NARG__(...) __NARG_I_(__VA_ARGS__,__RSEQ_N()) +#define __NARG_I_(...) __ARG_N(__VA_ARGS__) +#define __ARG_N( \ + _1, _2, _3, _4, _5, _6, _7, _8, _9,_10, \ + _11,_12,_13,_14,_15,_16,_17,_18,_19,_20, \ + _21,_22,_23,_24,_25,_26,_27,_28,_29,_30, \ + _31,_32,_33,_34,_35,_36,_37,_38,_39,_40, \ + _41,_42,_43,_44,_45,_46,_47,_48,_49,_50, \ + _51,_52,_53,_54,_55,_56,_57,_58,_59,_60, \ + _61,_62,_63,N,...) N +#define __RSEQ_N() \ + 63,62,61,60, \ + 59,58,57,56,55,54,53,52,51,50, \ + 49,48,47,46,45,44,43,42,41,40, \ + 39,38,37,36,35,34,33,32,31,30, \ + 29,28,27,26,25,24,23,22,21,20, \ + 19,18,17,16,15,14,13,12,11,10, \ + 9,8,7,6,5,4,3,2,1,0 + + +#define _args_for_bypass_1(a) a +#define _args_for_bypass_7(a, b, c, d, e, f, g) ,g +#define _args_for_bypass_14(a, b, c, d, e, f, g, ...) ,g _args_for_bypass_7(__VA_ARGS__) +#define _args_for_bypass_21(a, b, c, d, e, f, g, ...) ,g _args_for_bypass_14(__VA_ARGS__) +#define _args_for_bypass_28(a, b, c, d, e, f, g, ...) ,g _args_for_bypass_21(__VA_ARGS__) +#define _args_for_bypass_35(a, b, c, d, e, f, g, ...) ,g _args_for_bypass_28(__VA_ARGS__) +#define _args_for_bypass_42(a, b, c, d, e, f, g, ...) ,g _args_for_bypass_35(__VA_ARGS__) +#define _args_for_bypass_49(a, b, c, d, e, f, g, ...) ,g _args_for_bypass_42(__VA_ARGS__) +#define _args_for_bypass_56(a, b, c, d, e, f, g, ...) ,g _args_for_bypass_49(__VA_ARGS__) +#define _args_for_bypass_63(a, b, c, d, e, f, g, ...) ,g _args_for_bypass_56(__VA_ARGS__) +#define _args_for_bypass_70(a, b, c, d, e, f, g, ...) ,g _args_for_bypass_63(__VA_ARGS__) + +#define _GFUNC_(n) _args_for_bypass_##n +#define _GFUNC(n) _GFUNC_(n) + +#define ARGS_FOR_BYPASS(...) _GFUNC(__NARG__(__VA_ARGS__)) (__VA_ARGS__) + +#define _args_for_mem_1(a) a; +#define _args_for_mem_7(a, b, c, d, e, f, g) f; +#define _args_for_mem_14(a, b, c, d, e, f, g, ...) f; _args_for_mem_7(__VA_ARGS__) +#define _args_for_mem_21(a, b, c, d, e, f, g, ...) f; _args_for_mem_14(__VA_ARGS__) +#define _args_for_mem_28(a, b, c, d, e, f, g, ...) f; _args_for_mem_21(__VA_ARGS__) +#define _args_for_mem_35(a, b, c, d, e, f, g, ...) f; _args_for_mem_28(__VA_ARGS__) +#define _args_for_mem_42(a, b, c, d, e, f, g, ...) f; _args_for_mem_35(__VA_ARGS__) +#define _args_for_mem_49(a, b, c, d, e, f, g, ...) f; _args_for_mem_42(__VA_ARGS__) +#define _args_for_mem_56(a, b, c, d, e, f, g, ...) f; _args_for_mem_49(__VA_ARGS__) +#define _args_for_mem_63(a, b, c, d, e, f, g, ...) f; _args_for_mem_56(__VA_ARGS__) +#define _args_for_mem_70(a, b, c, d, e, f, g, ...) f; _args_for_mem_63(__VA_ARGS__) + +#define _FFUNC_(n) _args_for_mem_##n +#define _FFUNC(n) _FFUNC_(n) + +#define ARGS_FOR_MEM(...) _FFUNC(__NARG__(__VA_ARGS__)) (__VA_ARGS__) + +#define _args_for_unbind_1(a) a; +#define _args_for_unbind_7(a, b, c, d, e, f, g) e; +#define _args_for_unbind_14(a, b, c, d, e, f, g, ...) e; _args_for_unbind_7(__VA_ARGS__) +#define _args_for_unbind_21(a, b, c, d, e, f, g, ...) e; _args_for_unbind_14(__VA_ARGS__) +#define _args_for_unbind_28(a, b, c, d, e, f, g, ...) e; _args_for_unbind_21(__VA_ARGS__) +#define _args_for_unbind_35(a, b, c, d, e, f, g, ...) e; _args_for_unbind_28(__VA_ARGS__) +#define _args_for_unbind_42(a, b, c, d, e, f, g, ...) e; _args_for_unbind_35(__VA_ARGS__) +#define _args_for_unbind_49(a, b, c, d, e, f, g, ...) e; _args_for_unbind_42(__VA_ARGS__) +#define _args_for_unbind_56(a, b, c, d, e, f, g, ...) e; _args_for_unbind_49(__VA_ARGS__) +#define _args_for_unbind_63(a, b, c, d, e, f, g, ...) e; _args_for_unbind_56(__VA_ARGS__) +#define _args_for_unbind_70(a, b, c, d, e, f, g, ...) e; _args_for_unbind_63(__VA_ARGS__) + +#define _EFUNC_(n) _args_for_unbind_##n +#define _EFUNC(n) _EFUNC_(n) + +#define ARGS_FOR_UNBIND(...) _EFUNC(__NARG__(__VA_ARGS__)) (__VA_ARGS__) + +#define _args_for_call_1(a) a +#define _args_for_call_7(a, b, c, d, e, f, g) ,d +#define _args_for_call_14(a, b, c, d, e, f, g, ...) ,d _args_for_call_7(__VA_ARGS__) +#define _args_for_call_21(a, b, c, d, e, f, g, ...) ,d _args_for_call_14(__VA_ARGS__) +#define _args_for_call_28(a, b, c, d, e, f, g, ...) ,d _args_for_call_21(__VA_ARGS__) +#define _args_for_call_35(a, b, c, d, e, f, g, ...) ,d _args_for_call_28(__VA_ARGS__) +#define _args_for_call_42(a, b, c, d, e, f, g, ...) ,d _args_for_call_35(__VA_ARGS__) +#define _args_for_call_49(a, b, c, d, e, f, g, ...) ,d _args_for_call_42(__VA_ARGS__) +#define _args_for_call_56(a, b, c, d, e, f, g, ...) ,d _args_for_call_49(__VA_ARGS__) +#define _args_for_call_63(a, b, c, d, e, f, g, ...) ,d _args_for_call_56(__VA_ARGS__) +#define _args_for_call_70(a, b, c, d, e, f, g, ...) ,d _args_for_call_63(__VA_ARGS__) + +#define _DFUNC_(n) _args_for_call_##n +#define _DFUNC(n) _DFUNC_(n) + +#define ARGS_FOR_CALL(...) _DFUNC(__NARG__(__VA_ARGS__)) (__VA_ARGS__) + +#define _args_for_decl_1(a) a +#define _args_for_decl_7(a, b, c, d, e, f, g) ,c +#define _args_for_decl_14(a, b, c, d, e, f, g, ...) ,c _args_for_decl_7(__VA_ARGS__) +#define _args_for_decl_21(a, b, c, d, e, f, g, ...) ,c _args_for_decl_14(__VA_ARGS__) +#define _args_for_decl_28(a, b, c, d, e, f, g, ...) ,c _args_for_decl_21(__VA_ARGS__) +#define _args_for_decl_35(a, b, c, d, e, f, g, ...) ,c _args_for_decl_28(__VA_ARGS__) +#define _args_for_decl_42(a, b, c, d, e, f, g, ...) ,c _args_for_decl_35(__VA_ARGS__) +#define _args_for_decl_49(a, b, c, d, e, f, g, ...) ,c _args_for_decl_42(__VA_ARGS__) +#define _args_for_decl_56(a, b, c, d, e, f, g, ...) ,c _args_for_decl_49(__VA_ARGS__) +#define _args_for_decl_63(a, b, c, d, e, f, g, ...) ,c _args_for_decl_56(__VA_ARGS__) +#define _args_for_decl_70(a, b, c, d, e, f, g, ...) ,c _args_for_decl_63(__VA_ARGS__) + +#define _CFUNC_(n) _args_for_decl_##n +#define _CFUNC(n) _CFUNC_(n) + +#define ARGS_FOR_DECLARATION(...) _CFUNC(__NARG__(__VA_ARGS__)) (__VA_ARGS__) + +#define _args_for_assign_1(a) a +#define _args_for_assign_7(a, b, c, d, e, f, g) b; +#define _args_for_assign_14(a, b, c, d, e, f, g, ...) b; _args_for_assign_7(__VA_ARGS__) +#define _args_for_assign_21(a, b, c, d, e, f, g, ...) b; _args_for_assign_14(__VA_ARGS__) +#define _args_for_assign_28(a, b, c, d, e, f, g, ...) b; _args_for_assign_21(__VA_ARGS__) +#define _args_for_assign_35(a, b, c, d, e, f, g, ...) b; _args_for_assign_28(__VA_ARGS__) +#define _args_for_assign_42(a, b, c, d, e, f, g, ...) b; _args_for_assign_35(__VA_ARGS__) +#define _args_for_assign_49(a, b, c, d, e, f, g, ...) b; _args_for_assign_42(__VA_ARGS__) +#define _args_for_assign_56(a, b, c, d, e, f, g, ...) b; _args_for_assign_49(__VA_ARGS__) +#define _args_for_assign_63(a, b, c, d, e, f, g, ...) b; _args_for_assign_56(__VA_ARGS__) +#define _args_for_assign_70(a, b, c, d, e, f, g, ...) b; _args_for_assign_63(__VA_ARGS__) + +#define _BFUNC_(n) _args_for_assign_##n +#define _BFUNC(n) _BFUNC_(n) + +#define ARGS_FOR_ASSIGN(...) _BFUNC(__NARG__(__VA_ARGS__)) (__VA_ARGS__) + +#define _args_for_struct_1(a) a; +#define _args_for_struct_7(a, b, c, d, e, f, g) a; +#define _args_for_struct_14(a, b, c, d, e, f, g, ...) a; _args_for_struct_7(__VA_ARGS__) +#define _args_for_struct_21(a, b, c, d, e, f, g, ...) a; _args_for_struct_14(__VA_ARGS__) +#define _args_for_struct_28(a, b, c, d, e, f, g, ...) a; _args_for_struct_21(__VA_ARGS__) +#define _args_for_struct_35(a, b, c, d, e, f, g, ...) a; _args_for_struct_28(__VA_ARGS__) +#define _args_for_struct_42(a, b, c, d, e, f, g, ...) a; _args_for_struct_35(__VA_ARGS__) +#define _args_for_struct_49(a, b, c, d, e, f, g, ...) a; _args_for_struct_42(__VA_ARGS__) +#define _args_for_struct_56(a, b, c, d, e, f, g, ...) a; _args_for_struct_49(__VA_ARGS__) +#define _args_for_struct_63(a, b, c, d, e, f, g, ...) a; _args_for_struct_56(__VA_ARGS__) +#define _args_for_struct_70(a, b, c, d, e, f, g, ...) a; _args_for_struct_63(__VA_ARGS__) + +#define _AFUNC_(n) _args_for_struct_##n +#define _AFUNC(n) _AFUNC_(n) + +#define ARGS_FOR_STRUCT(...) _AFUNC(__NARG__(__VA_ARGS__)) (__VA_ARGS__) + +/* Serialization and deserialization */ + +#define CSMT_ITEM_NO_WAIT(name, ...) \ +\ +struct s_##name##_private { \ + struct csmt_instruction instr; \ + ARGS_FOR_STRUCT( __VA_ARGS__ ) \ +}; \ +\ +static void \ +name##_priv( struct NineDevice9 *device ARGS_FOR_DECLARATION( __VA_ARGS__ ) ); \ +\ +static int \ +name##_rx( struct NineDevice9 *device, struct csmt_instruction *instr ) \ +{ \ + struct csmt_context *ctx = device->csmt_ctx; \ + struct s_##name##_private *args = (struct s_##name##_private *)instr; \ + \ + (void) args; \ + (void) ctx; \ + name##_priv( \ + device ARGS_FOR_CALL( __VA_ARGS__ ) \ + ); \ + ARGS_FOR_UNBIND( __VA_ARGS__ ) \ + return 0; \ +} \ +\ +void \ +name( struct NineDevice9 *device ARGS_FOR_DECLARATION( __VA_ARGS__ ) ) \ +{ \ + struct csmt_context *ctx = device->csmt_ctx; \ + struct s_##name##_private *args; \ + unsigned memsize = sizeof(struct s_##name##_private); \ + unsigned memsize2 = 0; \ + \ + if (!device->csmt_active) { \ + name##_priv( \ + device ARGS_FOR_BYPASS( __VA_ARGS__ ) \ + ); \ + return; \ + } \ + ARGS_FOR_MEM ( __VA_ARGS__ ) \ + args = nine_queue_alloc(ctx->pool, memsize + memsize2); \ + assert(args); \ + args->instr.func = &name##_rx; \ + ARGS_FOR_ASSIGN( __VA_ARGS__ ) \ +} \ +\ +static void \ +name##_priv( struct NineDevice9 *device ARGS_FOR_DECLARATION( __VA_ARGS__ ) ) + +#define CSMT_ITEM_NO_WAIT_WITH_COUNTER(name, ...) \ +\ +struct s_##name##_private { \ + struct csmt_instruction instr; \ + unsigned *counter; \ + ARGS_FOR_STRUCT( __VA_ARGS__ ) \ +}; \ +\ +static void \ +name##_priv( struct NineDevice9 *device ARGS_FOR_DECLARATION( __VA_ARGS__ ) ); \ +\ +static int \ +name##_rx( struct NineDevice9 *device, struct csmt_instruction *instr ) \ +{ \ + struct csmt_context *ctx = device->csmt_ctx; \ + struct s_##name##_private *args = (struct s_##name##_private *)instr; \ + \ + (void) args; \ + (void) ctx; \ + name##_priv( \ + device ARGS_FOR_CALL( __VA_ARGS__ ) \ + ); \ + p_atomic_dec(args->counter); \ + ARGS_FOR_UNBIND( __VA_ARGS__ ) \ + return 0; \ +} \ +\ +void \ +name( struct NineDevice9 *device, unsigned *counter ARGS_FOR_DECLARATION( __VA_ARGS__ ) ) \ +{ \ + struct csmt_context *ctx = device->csmt_ctx; \ + struct s_##name##_private *args; \ + unsigned memsize = sizeof(struct s_##name##_private); \ + unsigned memsize2 = 0; \ + \ + if (!device->csmt_active) { \ + name##_priv( \ + device ARGS_FOR_BYPASS( __VA_ARGS__ ) \ + ); \ + return; \ + } \ + assert(counter); \ + p_atomic_inc(counter); \ + ARGS_FOR_MEM ( __VA_ARGS__ ) \ + args = nine_queue_alloc(ctx->pool, memsize + memsize2); \ + assert(args); \ + args->instr.func = &name##_rx; \ + args->counter = counter; \ + ARGS_FOR_ASSIGN( __VA_ARGS__ ) \ +} \ +\ +static void \ +name##_priv( struct NineDevice9 *device ARGS_FOR_DECLARATION( __VA_ARGS__ ) ) + +#define CSMT_ITEM_DO_WAIT(name, ...) \ +\ +struct s_##name##_private { \ + struct csmt_instruction instr; \ + ARGS_FOR_STRUCT( __VA_ARGS__ ) \ +}; \ +static void \ +name##_priv( struct NineDevice9 *device ARGS_FOR_DECLARATION( __VA_ARGS__ ) ); \ +\ +static int \ +name##_rx( struct NineDevice9 *device, struct csmt_instruction *instr) \ +{ \ + struct csmt_context *ctx = device->csmt_ctx; \ + struct s_##name##_private *args = (struct s_##name##_private *)instr; \ + \ + (void) args; \ + (void) ctx; \ + name##_priv( \ + device ARGS_FOR_CALL( __VA_ARGS__ ) \ + ); \ + ARGS_FOR_UNBIND( __VA_ARGS__ ) \ + return 1; \ +} \ +\ +void \ +name( struct NineDevice9 *device ARGS_FOR_DECLARATION( __VA_ARGS__ ) ) \ +{ \ + struct csmt_context *ctx = device->csmt_ctx; \ + struct s_##name##_private *args; \ + unsigned memsize = sizeof(struct s_##name##_private); \ + unsigned memsize2 = 0; \ + \ + if (!device->csmt_active) { \ + name##_priv( \ + device ARGS_FOR_BYPASS( __VA_ARGS__ ) \ + ); \ + return; \ + } \ + ARGS_FOR_MEM ( __VA_ARGS__ ) \ + args = nine_queue_alloc(ctx->pool, memsize + memsize2); \ + assert(args); \ + args->instr.func = &name##_rx; \ + ARGS_FOR_ASSIGN( __VA_ARGS__ ) \ + ctx->processed = FALSE; \ + nine_queue_flush(ctx->pool); \ + nine_csmt_wait_processed(ctx); \ +} \ +\ +static void \ +name##_priv( struct NineDevice9 *device ARGS_FOR_DECLARATION( __VA_ARGS__ ) ) + +/* ARGS_FOR_STRUCT, ARGS_FOR_ASSIGN, ARGS_FOR_DECLARATION, ARGS_FOR_CALL, ARGS_FOR_UNBIND, ARGS_FOR_MEM, ARGS_FOR_BYPASS */ +#define ARG_VAL(x, y) \ + x _##y ; ,\ + args->_##y = y ; ,\ + x y ,\ + args->_##y ,\ + ,\ + ,\ + y + +#define ARG_REF(x, y) \ + x* _##y ; ,\ + args->_##y = y; ,\ + x *y ,\ + args->_##y ,\ + ,\ + ,\ + y + +#define ARG_COPY_REF(x, y) \ + x * _##y ; x __##y ; ,\ + if ( y ) { args->_##y = &args->__##y ; args->__##y = *y ; } else { args->_##y = NULL; } ,\ + const x *y ,\ + (const x *)args->_##y ,\ + ,\ + ,\ + (const x *)y + +#define ARG_BIND_REF(x, y) \ + x * _##y ,\ + if ( y ) \ + NineUnknown_Bind( (void *)y ); \ + args->_##y = y ; ,\ + x *y ,\ + args->_##y,\ + if (args->_##y) \ + NineUnknown_Unbind((void *)(args->_##y)); \ + args->_##y = NULL; ,\ + ,\ + y + +#define ARG_BIND_RES(x, y) \ + x * _##y ,\ + args->_##y = NULL; \ + if (y) \ + pipe_resource_reference(&args->_##y, y); ,\ + x *y ,\ + args->_##y ,\ + if (args->_##y) \ + pipe_resource_reference(&args->_##y, NULL); ,\ + ,\ + y + +#define ARG_MEM(x, y) \ + x * _##y ,\ + args->_##y = (void *)args + memsize;\ + memcpy(args->_##y, y, memsize2); ,\ + const x *y ,\ + (const x *)args->_##y ,\ + ,\ + ,\ + (const x *)y + +#define ARG_MEM_SIZE(x, y) \ + x _##y ,\ + args->_##y = y; ,\ + x y ,\ + args->_##y ,\ + ,\ + memsize2 = y, \ + y + +#define ARG_BIND_BLIT(x, y) \ + x _##y ,\ + memcpy(&args->_##y , y, sizeof(x)); \ + args->_##y.src.resource = NULL; \ + args->_##y.dst.resource = NULL; \ + pipe_resource_reference(&args->_##y.src.resource, y->src.resource); \ + pipe_resource_reference(&args->_##y.dst.resource, y->dst.resource);,\ + x *y ,\ + &args->_##y ,\ + pipe_resource_reference(&args->_##y.src.resource, NULL); \ + pipe_resource_reference(&args->_##y.dst.resource, NULL);,\ + ,\ + y + +#define ARG_BIND_BUF(x, y) \ + x _##y ,\ + memcpy(&args->_##y , y, sizeof(x)); \ + args->_##y.buffer = NULL; \ + pipe_resource_reference(&args->_##y.buffer, y->buffer); ,\ + x *y ,\ + &args->_##y ,\ + pipe_resource_reference(&args->_##y.buffer, NULL); ,\ + ,\ + y + +#define ARG_BIND_VIEW(x, y) \ + x * _##y ,\ + args->_##y = NULL; \ + if (y) \ + pipe_sampler_view_reference(&args->_##y, y); ,\ + x *y ,\ + args->_##y ,\ + if (args->_##y) \ + pipe_sampler_view_reference(&args->_##y, NULL); ,\ + ,\ + y + diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/nine_debug.c mesa-17.0.7/src/gallium/state_trackers/nine/nine_debug.c --- mesa-12.0.6/src/gallium/state_trackers/nine/nine_debug.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/nine_debug.c 2017-06-01 10:37:10.000000000 +0000 @@ -23,6 +23,7 @@ #include "nine_debug.h" #include +#include "c11/threads.h" static const struct debug_named_value nine_debug_flags[] = { { "unknown", DBG_UNKNOWN, "IUnknown implementation." }, @@ -52,6 +53,7 @@ { "user", DBG_USER, "User errors, both fixable and unfixable." }, { "error", DBG_ERROR, "Driver errors, always visible." }, { "warn", DBG_WARN, "Driver warnings, always visible in debug builds." }, + { "tid", DBG_TID, "Display thread-ids." }, DEBUG_NAMED_VALUE_END }; @@ -63,17 +65,26 @@ { static boolean first = TRUE; static unsigned long dbg_flags = DBG_ERROR | DBG_WARN; + unsigned long tid = 0; if (first) { first = FALSE; dbg_flags |= debug_get_flags_option("NINE_DEBUG", nine_debug_flags, 0); } + +#if defined(HAVE_PTHREAD) +# if defined(__GNU_LIBRARY__) && defined(__GLIBC__) && defined(__GLIBC_MINOR__) && \ + (__GLIBC__ >= 3 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 12)) + if (dbg_flags & DBG_TID) + tid = pthread_self(); +# endif +#endif + if (dbg_flags & flag) { const char *f = func ? strrchr(func, '_') : NULL; va_list ap; - - /* inside a class this will print nine:classinlowercase:func: while - * outside a class (rarely used) it will just print nine:func: + /* inside a class this will print nine:tid:classinlowercase:func: while + * outside a class (rarely used) it will just print nine:tid:func * the reason for lower case is simply to match the filenames, as it * will also strip off the "Nine" */ if (f && strncmp(func, "Nine", 4) == 0) { @@ -81,10 +92,15 @@ char *ptr = klass; for (func += 4; func != f; ++func) { *ptr++ = tolower(*func); } *ptr = '\0'; - - debug_printf("nine:%s:%s: ", klass, ++f); + if (tid) + debug_printf("nine:0x%08lx:%s:%s: ", tid, klass, ++f); + else + debug_printf("nine:%s:%s: ", klass, ++f); } else if (func) { - debug_printf("nine:%s: ", func); + if (tid) + debug_printf("nine:0x%08lx:%s ", tid, func); + else + debug_printf("nine:%s ", func); } va_start(ap, fmt); diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/nine_debug.h mesa-17.0.7/src/gallium/state_trackers/nine/nine_debug.h --- mesa-12.0.6/src/gallium/state_trackers/nine/nine_debug.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/nine_debug.h 2017-06-01 10:37:10.000000000 +0000 @@ -83,6 +83,7 @@ #define DBG_USER (1<<24) #define DBG_ERROR (1<<25) #define DBG_WARN (1<<26) +#define DBG_TID (1<<27) void _nine_stub( const char *file, diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/nine_defines.h mesa-17.0.7/src/gallium/state_trackers/nine/nine_defines.h --- mesa-12.0.6/src/gallium/state_trackers/nine/nine_defines.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/nine_defines.h 2017-06-01 10:37:10.000000000 +0000 @@ -54,4 +54,12 @@ #define NINED3DCLEAR_DEPTHSTENCIL (D3DCLEAR_ZBUFFER | D3DCLEAR_STENCIL) +#define NINE_BIND_BACKBUFFER_FLAGS (PIPE_BIND_RENDER_TARGET |\ + PIPE_BIND_SAMPLER_VIEW) + +#define NINE_BIND_PRESENTBUFFER_FLAGS (PIPE_BIND_RENDER_TARGET |\ + PIPE_BIND_DISPLAY_TARGET |\ + PIPE_BIND_SCANOUT |\ + PIPE_BIND_SHARED) + #endif /* _NINE_DEFINES_H_ */ diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/nine_ff.c mesa-17.0.7/src/gallium/state_trackers/nine/nine_ff.c --- mesa-12.0.6/src/gallium/state_trackers/nine/nine_ff.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/nine_ff.c 2017-06-01 10:37:10.000000000 +0000 @@ -26,7 +26,7 @@ #define DBG_CHANNEL DBG_FF -#define NINE_FF_NUM_VS_CONST 256 +#define NINE_FF_NUM_VS_CONST 196 #define NINE_FF_NUM_PS_CONST 24 struct fvec4 @@ -54,10 +54,12 @@ uint32_t fog_mode : 2; uint32_t fog_range : 1; uint32_t color0in_one : 1; - uint32_t color1in_one : 1; + uint32_t color1in_zero : 1; + uint32_t has_normal : 1; uint32_t fog : 1; - uint32_t specular_enable : 1; - uint32_t pad1 : 6; + uint32_t normalizenormals : 1; + uint32_t ucp : 1; + uint32_t pad1 : 4; uint32_t tc_dim_input: 16; /* 8 * 2 bits */ uint32_t pad2 : 16; uint32_t tc_dim_output: 24; /* 8 * 3 bits */ @@ -109,8 +111,9 @@ uint32_t projected : 16; uint32_t fog : 1; /* for vFog coming from VS */ uint32_t fog_mode : 2; + uint32_t fog_source : 1; /* 0: Z, 1: W */ uint32_t specular : 1; - uint32_t pad1 : 12; /* 9 32-bit words with this */ + uint32_t pad1 : 11; /* 9 32-bit words with this */ uint8_t colorarg_b4[3]; uint8_t colorarg_b5[3]; uint8_t alphaarg_b4[3]; /* 11 32-bit words plus a byte */ @@ -200,11 +203,11 @@ * * CONST[ 0.. 3] D3DTS_WORLD * D3DTS_VIEW * D3DTS_PROJECTION * CONST[ 4.. 7] D3DTS_WORLD * D3DTS_VIEW - * CONST[ 8..11] D3DTS_VIEW * D3DTS_PROJECTION - * CONST[12..15] D3DTS_VIEW + * CONST[ 8..11] D3DTS_PROJECTION + * CONST[12..15] D3DTS_VIEW^(-1) * CONST[16..18] Normal matrix * - * CONST[19] MATERIAL.Emissive + Material.Ambient * RS.Ambient + * CONST[19].xyz MATERIAL.Emissive + Material.Ambient * RS.Ambient * CONST[20] MATERIAL.Diffuse * CONST[21] MATERIAL.Ambient * CONST[22] MATERIAL.Specular @@ -265,10 +268,10 @@ * CONST[152..155] D3DTS_TEXTURE6 * CONST[156..159] D3DTS_TEXTURE7 * - * CONST[224] D3DTS_WORLDMATRIX[0] - * CONST[228] D3DTS_WORLDMATRIX[1] + * CONST[160] D3DTS_WORLDMATRIX[0] * D3DTS_VIEW + * CONST[164] D3DTS_WORLDMATRIX[1] * D3DTS_VIEW * ... - * CONST[252] D3DTS_WORLDMATRIX[7] + * CONST[192] D3DTS_WORLDMATRIX[8] * D3DTS_VIEW */ struct vs_build_ctx { @@ -315,14 +318,15 @@ /* NOTE: dst may alias src */ static inline void ureg_normalize3(struct ureg_program *ureg, - struct ureg_dst dst, struct ureg_src src, - struct ureg_dst tmp) + struct ureg_dst dst, struct ureg_src src) { + struct ureg_dst tmp = ureg_DECL_temporary(ureg); struct ureg_dst tmp_x = ureg_writemask(tmp, TGSI_WRITEMASK_X); ureg_DP3(ureg, tmp_x, src, src); ureg_RSQ(ureg, tmp_x, _X(tmp)); ureg_MUL(ureg, dst, src, _X(tmp)); + ureg_release_temporary(ureg, tmp); } static void * @@ -331,30 +335,30 @@ const struct nine_ff_vs_key *key = vs->key; struct ureg_program *ureg = ureg_create(PIPE_SHADER_VERTEX); struct ureg_dst oPos, oCol[2], oPsz, oFog; - struct ureg_dst rVtx, rNrm; - struct ureg_dst r[8]; struct ureg_dst AR; - struct ureg_dst tmp, tmp_x, tmp_y, tmp_z; unsigned i, c; unsigned label[32], l = 0; - unsigned num_r = 8; - boolean need_rNrm = key->lighting || key->passthrough & (1 << NINE_DECLUSAGE_NORMAL); - boolean need_rVtx = key->lighting || key->fog_mode || key->pointscale; + boolean need_aNrm = key->lighting || key->passthrough & (1 << NINE_DECLUSAGE_NORMAL); + boolean has_aNrm = need_aNrm && key->has_normal; + boolean need_aVtx = key->lighting || key->fog_mode || key->pointscale || key->ucp; const unsigned texcoord_sn = get_texcoord_sn(device->screen); vs->ureg = ureg; /* Check which inputs we should transform. */ for (i = 0; i < 8 * 3; i += 3) { - switch ((key->tc_gen >> i) & 0x3) { + switch ((key->tc_gen >> i) & 0x7) { case NINED3DTSS_TCI_CAMERASPACENORMAL: - need_rNrm = TRUE; + need_aNrm = TRUE; break; case NINED3DTSS_TCI_CAMERASPACEPOSITION: - need_rVtx = TRUE; + need_aVtx = TRUE; break; case NINED3DTSS_TCI_CAMERASPACEREFLECTIONVECTOR: - need_rVtx = need_rNrm = TRUE; + need_aVtx = need_aNrm = TRUE; + break; + case NINED3DTSS_TCI_SPHEREMAP: + need_aVtx = need_aNrm = TRUE; break; default: break; @@ -367,18 +371,19 @@ vs->aVtx = build_vs_add_input(vs, key->position_t ? NINE_DECLUSAGE_POSITIONT : NINE_DECLUSAGE_POSITION); - if (need_rNrm) + vs->aNrm = ureg_imm1f(ureg, 0.0f); + if (has_aNrm) vs->aNrm = build_vs_add_input(vs, NINE_DECLUSAGE_NORMAL); vs->aCol[0] = ureg_imm1f(ureg, 1.0f); - vs->aCol[1] = ureg_imm1f(ureg, 1.0f); + vs->aCol[1] = ureg_imm1f(ureg, 0.0f); if (key->lighting || key->darkness) { const unsigned mask = key->mtl_diffuse | key->mtl_specular | key->mtl_ambient | key->mtl_emissive; if ((mask & 0x1) && !key->color0in_one) vs->aCol[0] = build_vs_add_input(vs, NINE_DECLUSAGE_i(COLOR, 0)); - if ((mask & 0x2) && !key->color1in_one) + if ((mask & 0x2) && !key->color1in_zero) vs->aCol[1] = build_vs_add_input(vs, NINE_DECLUSAGE_i(COLOR, 1)); vs->mtlD = MATERIAL_CONST(1); @@ -395,7 +400,7 @@ if (key->mtl_emissive == 2) vs->mtlE = vs->aCol[1]; } else { if (!key->color0in_one) vs->aCol[0] = build_vs_add_input(vs, NINE_DECLUSAGE_i(COLOR, 0)); - if (!key->color1in_one) vs->aCol[1] = build_vs_add_input(vs, NINE_DECLUSAGE_i(COLOR, 1)); + if (!key->color1in_zero) vs->aCol[1] = build_vs_add_input(vs, NINE_DECLUSAGE_i(COLOR, 1)); } if (key->vertexpointsize) @@ -426,152 +431,196 @@ oPsz = ureg_writemask(oPsz, TGSI_WRITEMASK_X); } - /* Declare TEMPs: - */ - for (i = 0; i < num_r; ++i) - r[i] = ureg_DECL_local_temporary(ureg); - tmp = r[0]; - tmp_x = ureg_writemask(tmp, TGSI_WRITEMASK_X); - tmp_y = ureg_writemask(tmp, TGSI_WRITEMASK_Y); - tmp_z = ureg_writemask(tmp, TGSI_WRITEMASK_Z); if (key->lighting || key->vertexblend) AR = ureg_DECL_address(ureg); - rVtx = ureg_writemask(r[1], TGSI_WRITEMASK_XYZ); - rNrm = ureg_writemask(r[2], TGSI_WRITEMASK_XYZ); - /* === Vertex transformation / vertex blending: */ - if (key->vertextween) { - assert(!key->vertexblend); - ureg_LRP(ureg, r[2], _XXXX(_CONST(30)), vs->aVtx, vs->aVtx1); - if (need_rNrm) - ureg_LRP(ureg, r[3], _XXXX(_CONST(30)), vs->aNrm, vs->aNrm1); - vs->aVtx = ureg_src(r[2]); - vs->aNrm = ureg_src(r[3]); - } - if (key->vertexblend) { + if (key->position_t) { + if (device->driver_caps.window_space_position_support) { + ureg_MOV(ureg, oPos, vs->aVtx); + } else { + struct ureg_dst tmp = ureg_DECL_temporary(ureg); + /* vs->aVtx contains the coordinates buffer wise. + * later in the pipeline, clipping, viewport and division + * by w (rhw = 1/w) are going to be applied, so do the reverse + * of these transformations (except clipping) to have the good + * position at the end.*/ + ureg_MOV(ureg, tmp, vs->aVtx); + /* X from [X_min, X_min + width] to [-1, 1], same for Y. Z to [0, 1] */ + ureg_ADD(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XYZ), ureg_src(tmp), ureg_negate(_CONST(101))); + ureg_MUL(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XYZ), ureg_src(tmp), _CONST(100)); + ureg_ADD(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XY), ureg_src(tmp), ureg_imm1f(ureg, -1.0f)); + /* Y needs to be reversed */ + ureg_MOV(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_Y), ureg_negate(ureg_src(tmp))); + /* inverse rhw */ + ureg_RCP(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_W), _W(tmp)); + /* multiply X, Y, Z by w */ + ureg_MUL(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XYZ), ureg_src(tmp), _W(tmp)); + ureg_MOV(ureg, oPos, ureg_src(tmp)); + ureg_release_temporary(ureg, tmp); + } + } else if (key->vertexblend) { + struct ureg_dst tmp = ureg_DECL_temporary(ureg); + struct ureg_dst tmp2 = ureg_DECL_temporary(ureg); + struct ureg_dst aVtx_dst = ureg_DECL_temporary(ureg); + struct ureg_dst aNrm_dst = ureg_DECL_temporary(ureg); + struct ureg_dst sum_blendweights = ureg_DECL_temporary(ureg); struct ureg_src cWM[4]; - for (i = 224; i <= 255; ++i) + for (i = 160; i <= 195; ++i) ureg_DECL_constant(ureg, i); /* translate world matrix index to constant file index */ if (key->vertexblend_indexed) { - ureg_MAD(ureg, tmp, vs->aInd, ureg_imm1f(ureg, 4.0f), ureg_imm1f(ureg, 224.0f)); + ureg_MAD(ureg, tmp, vs->aInd, ureg_imm1f(ureg, 4.0f), ureg_imm1f(ureg, 160.0f)); ureg_ARL(ureg, AR, ureg_src(tmp)); } - ureg_MOV(ureg, r[2], ureg_imm4f(ureg, 0.0f, 0.0f, 0.0f, 0.0f)); - ureg_MOV(ureg, r[3], ureg_imm4f(ureg, 1.0f, 1.0f, 1.0f, 1.0f)); + ureg_MOV(ureg, aVtx_dst, ureg_imm4f(ureg, 0.0f, 0.0f, 0.0f, 0.0f)); + ureg_MOV(ureg, aNrm_dst, ureg_imm4f(ureg, 0.0f, 0.0f, 0.0f, 0.0f)); + ureg_MOV(ureg, sum_blendweights, ureg_imm4f(ureg, 1.0f, 1.0f, 1.0f, 1.0f)); for (i = 0; i < key->vertexblend; ++i) { for (c = 0; c < 4; ++c) { - cWM[c] = ureg_src_register(TGSI_FILE_CONSTANT, (224 + i * 4) * !key->vertexblend_indexed + c); + cWM[c] = ureg_src_register(TGSI_FILE_CONSTANT, (160 + i * 4) * !key->vertexblend_indexed + c); if (key->vertexblend_indexed) cWM[c] = ureg_src_indirect(cWM[c], ureg_scalar(ureg_src(AR), i)); } + /* multiply by WORLD(index) */ ureg_MUL(ureg, tmp, _XXXX(vs->aVtx), cWM[0]); ureg_MAD(ureg, tmp, _YYYY(vs->aVtx), cWM[1], ureg_src(tmp)); ureg_MAD(ureg, tmp, _ZZZZ(vs->aVtx), cWM[2], ureg_src(tmp)); ureg_MAD(ureg, tmp, _WWWW(vs->aVtx), cWM[3], ureg_src(tmp)); + if (has_aNrm) { + /* Note: the spec says the transpose of the inverse of the + * WorldView matrices should be used, but all tests show + * otherwise. + * Only case unknown: D3DVBF_0WEIGHTS */ + ureg_MUL(ureg, tmp2, _XXXX(vs->aNrm), cWM[0]); + ureg_MAD(ureg, tmp2, _YYYY(vs->aNrm), cWM[1], ureg_src(tmp2)); + ureg_MAD(ureg, tmp2, _ZZZZ(vs->aNrm), cWM[2], ureg_src(tmp2)); + } + if (i < (key->vertexblend - 1)) { /* accumulate weighted position value */ - ureg_MAD(ureg, r[2], ureg_src(tmp), ureg_scalar(vs->aWgt, i), ureg_src(r[2])); + ureg_MAD(ureg, aVtx_dst, ureg_src(tmp), ureg_scalar(vs->aWgt, i), ureg_src(aVtx_dst)); + if (has_aNrm) + ureg_MAD(ureg, aNrm_dst, ureg_src(tmp2), ureg_scalar(vs->aWgt, i), ureg_src(aNrm_dst)); /* subtract weighted position value for last value */ - ureg_SUB(ureg, r[3], ureg_src(r[3]), ureg_scalar(vs->aWgt, i)); + ureg_ADD(ureg, sum_blendweights, ureg_src(sum_blendweights), ureg_negate(ureg_scalar(vs->aWgt, i))); } } /* the last weighted position is always 1 - sum_of_previous_weights */ - ureg_MAD(ureg, r[2], ureg_src(tmp), ureg_scalar(ureg_src(r[3]), key->vertexblend - 1), ureg_src(r[2])); + ureg_MAD(ureg, aVtx_dst, ureg_src(tmp), ureg_scalar(ureg_src(sum_blendweights), key->vertexblend - 1), ureg_src(aVtx_dst)); + if (has_aNrm) + ureg_MAD(ureg, aNrm_dst, ureg_src(tmp2), ureg_scalar(ureg_src(sum_blendweights), key->vertexblend - 1), ureg_src(aNrm_dst)); /* multiply by VIEW_PROJ */ - ureg_MUL(ureg, tmp, _X(r[2]), _CONST(8)); - ureg_MAD(ureg, tmp, _Y(r[2]), _CONST(9), ureg_src(tmp)); - ureg_MAD(ureg, tmp, _Z(r[2]), _CONST(10), ureg_src(tmp)); - ureg_MAD(ureg, oPos, _W(r[2]), _CONST(11), ureg_src(tmp)); - - if (need_rVtx) - vs->aVtx = ureg_src(r[2]); - } else - if (key->position_t && device->driver_caps.window_space_position_support) { - ureg_MOV(ureg, oPos, vs->aVtx); - } else if (key->position_t) { - /* vs->aVtx contains the coordinates buffer wise. - * later in the pipeline, clipping, viewport and division - * by w (rhw = 1/w) are going to be applied, so do the reverse - * of these transformations (except clipping) to have the good - * position at the end.*/ - ureg_MOV(ureg, tmp, vs->aVtx); - /* X from [X_min, X_min + width] to [-1, 1], same for Y. Z to [0, 1] */ - ureg_SUB(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XYZ), ureg_src(tmp), _CONST(101)); - ureg_MUL(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XYZ), ureg_src(tmp), _CONST(100)); - ureg_SUB(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XY), ureg_src(tmp), ureg_imm1f(ureg, 1.0f)); - /* Y needs to be reversed */ - ureg_MOV(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_Y), ureg_negate(ureg_src(tmp))); - /* inverse rhw */ - ureg_RCP(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_W), _W(tmp)); - /* multiply X, Y, Z by w */ - ureg_MUL(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XYZ), ureg_src(tmp), _W(tmp)); - ureg_MOV(ureg, oPos, ureg_src(tmp)); + ureg_MUL(ureg, tmp, _X(aVtx_dst), _CONST(8)); + ureg_MAD(ureg, tmp, _Y(aVtx_dst), _CONST(9), ureg_src(tmp)); + ureg_MAD(ureg, tmp, _Z(aVtx_dst), _CONST(10), ureg_src(tmp)); + ureg_MAD(ureg, oPos, _W(aVtx_dst), _CONST(11), ureg_src(tmp)); + + if (need_aVtx) + vs->aVtx = ureg_src(aVtx_dst); + + ureg_release_temporary(ureg, tmp); + ureg_release_temporary(ureg, tmp2); + ureg_release_temporary(ureg, sum_blendweights); + if (!need_aVtx) + ureg_release_temporary(ureg, aVtx_dst); + + if (has_aNrm) { + if (key->normalizenormals) + ureg_normalize3(ureg, aNrm_dst, ureg_src(aNrm_dst)); + vs->aNrm = ureg_src(aNrm_dst); + } else + ureg_release_temporary(ureg, aNrm_dst); } else { + struct ureg_dst tmp = ureg_DECL_temporary(ureg); + + if (key->vertextween) { + struct ureg_dst aVtx_dst = ureg_DECL_temporary(ureg); + ureg_LRP(ureg, aVtx_dst, _XXXX(_CONST(30)), vs->aVtx1, vs->aVtx); + vs->aVtx = ureg_src(aVtx_dst); + if (has_aNrm) { + struct ureg_dst aNrm_dst = ureg_DECL_temporary(ureg); + ureg_LRP(ureg, aNrm_dst, _XXXX(_CONST(30)), vs->aNrm1, vs->aNrm); + vs->aNrm = ureg_src(aNrm_dst); + } + } + /* position = vertex * WORLD_VIEW_PROJ */ ureg_MUL(ureg, tmp, _XXXX(vs->aVtx), _CONST(0)); ureg_MAD(ureg, tmp, _YYYY(vs->aVtx), _CONST(1), ureg_src(tmp)); ureg_MAD(ureg, tmp, _ZZZZ(vs->aVtx), _CONST(2), ureg_src(tmp)); ureg_MAD(ureg, oPos, _WWWW(vs->aVtx), _CONST(3), ureg_src(tmp)); - } + ureg_release_temporary(ureg, tmp); - if (need_rVtx) { - ureg_MUL(ureg, rVtx, _XXXX(vs->aVtx), _CONST(4)); - ureg_MAD(ureg, rVtx, _YYYY(vs->aVtx), _CONST(5), ureg_src(rVtx)); - ureg_MAD(ureg, rVtx, _ZZZZ(vs->aVtx), _CONST(6), ureg_src(rVtx)); - ureg_MAD(ureg, rVtx, _WWWW(vs->aVtx), _CONST(7), ureg_src(rVtx)); - } - if (need_rNrm) { - ureg_MUL(ureg, rNrm, _XXXX(vs->aNrm), _CONST(16)); - ureg_MAD(ureg, rNrm, _YYYY(vs->aNrm), _CONST(17), ureg_src(rNrm)); - ureg_MAD(ureg, rNrm, _ZZZZ(vs->aNrm), _CONST(18), ureg_src(rNrm)); - ureg_normalize3(ureg, rNrm, ureg_src(rNrm), tmp); + if (need_aVtx) { + struct ureg_dst aVtx_dst = ureg_writemask(ureg_DECL_temporary(ureg), TGSI_WRITEMASK_XYZ); + ureg_MUL(ureg, aVtx_dst, _XXXX(vs->aVtx), _CONST(4)); + ureg_MAD(ureg, aVtx_dst, _YYYY(vs->aVtx), _CONST(5), ureg_src(aVtx_dst)); + ureg_MAD(ureg, aVtx_dst, _ZZZZ(vs->aVtx), _CONST(6), ureg_src(aVtx_dst)); + ureg_MAD(ureg, aVtx_dst, _WWWW(vs->aVtx), _CONST(7), ureg_src(aVtx_dst)); + vs->aVtx = ureg_src(aVtx_dst); + } + if (has_aNrm) { + struct ureg_dst aNrm_dst = ureg_writemask(ureg_DECL_temporary(ureg), TGSI_WRITEMASK_XYZ); + ureg_MUL(ureg, aNrm_dst, _XXXX(vs->aNrm), _CONST(16)); + ureg_MAD(ureg, aNrm_dst, _YYYY(vs->aNrm), _CONST(17), ureg_src(aNrm_dst)); + ureg_MAD(ureg, aNrm_dst, _ZZZZ(vs->aNrm), _CONST(18), ureg_src(aNrm_dst)); + if (key->normalizenormals) + ureg_normalize3(ureg, aNrm_dst, ureg_src(aNrm_dst)); + vs->aNrm = ureg_src(aNrm_dst); + } } - /* NOTE: don't use vs->aVtx, vs->aNrm after this line */ /* === Process point size: */ - if (key->vertexpointsize) { - struct ureg_src cPsz1 = ureg_DECL_constant(ureg, 26); - ureg_MAX(ureg, tmp_z, _XXXX(vs->aPsz), _XXXX(cPsz1)); - ureg_MIN(ureg, tmp_z, _Z(tmp), _YYYY(cPsz1)); - } else if (key->pointscale) { - struct ureg_src cPsz1 = ureg_DECL_constant(ureg, 26); - ureg_MOV(ureg, tmp_z, _ZZZZ(cPsz1)); - } - - if (key->pointscale) { - struct ureg_src cPsz1 = ureg_DECL_constant(ureg, 26); - struct ureg_src cPsz2 = ureg_DECL_constant(ureg, 27); - - ureg_DP3(ureg, tmp_x, ureg_src(r[1]), ureg_src(r[1])); - ureg_RSQ(ureg, tmp_y, _X(tmp)); - ureg_MUL(ureg, tmp_y, _Y(tmp), _X(tmp)); - ureg_CMP(ureg, tmp_y, ureg_negate(_Y(tmp)), _Y(tmp), ureg_imm1f(ureg, 0.0f)); - ureg_MAD(ureg, tmp_x, _Y(tmp), _YYYY(cPsz2), _XXXX(cPsz2)); - ureg_MAD(ureg, tmp_x, _Y(tmp), _X(tmp), _WWWW(cPsz1)); - ureg_RSQ(ureg, tmp_x, _X(tmp)); - ureg_MUL(ureg, tmp_x, _X(tmp), _Z(tmp)); - ureg_MUL(ureg, tmp_x, _X(tmp), _WWWW(_CONST(100))); - ureg_MAX(ureg, tmp_x, _X(tmp), _XXXX(cPsz1)); - ureg_MIN(ureg, tmp_z, _X(tmp), _YYYY(cPsz1)); - } - if (key->vertexpointsize || key->pointscale) + if (key->vertexpointsize || key->pointscale) { + struct ureg_dst tmp = ureg_DECL_temporary(ureg); + struct ureg_dst tmp_x = ureg_writemask(tmp, TGSI_WRITEMASK_X); + struct ureg_dst tmp_y = ureg_writemask(tmp, TGSI_WRITEMASK_Y); + struct ureg_dst tmp_z = ureg_writemask(tmp, TGSI_WRITEMASK_Z); + if (key->vertexpointsize) { + struct ureg_src cPsz1 = ureg_DECL_constant(ureg, 26); + ureg_MAX(ureg, tmp_z, _XXXX(vs->aPsz), _XXXX(cPsz1)); + ureg_MIN(ureg, tmp_z, _Z(tmp), _YYYY(cPsz1)); + } else { + struct ureg_src cPsz1 = ureg_DECL_constant(ureg, 26); + ureg_MOV(ureg, tmp_z, _ZZZZ(cPsz1)); + } + + if (key->pointscale) { + struct ureg_src cPsz1 = ureg_DECL_constant(ureg, 26); + struct ureg_src cPsz2 = ureg_DECL_constant(ureg, 27); + + ureg_DP3(ureg, tmp_x, vs->aVtx, vs->aVtx); + ureg_RSQ(ureg, tmp_y, _X(tmp)); + ureg_MUL(ureg, tmp_y, _Y(tmp), _X(tmp)); + ureg_CMP(ureg, tmp_y, ureg_negate(_Y(tmp)), _Y(tmp), ureg_imm1f(ureg, 0.0f)); + ureg_MAD(ureg, tmp_x, _Y(tmp), _YYYY(cPsz2), _XXXX(cPsz2)); + ureg_MAD(ureg, tmp_x, _Y(tmp), _X(tmp), _WWWW(cPsz1)); + ureg_RSQ(ureg, tmp_x, _X(tmp)); + ureg_MUL(ureg, tmp_x, _X(tmp), _Z(tmp)); + ureg_MUL(ureg, tmp_x, _X(tmp), _WWWW(_CONST(100))); + ureg_MAX(ureg, tmp_x, _X(tmp), _XXXX(cPsz1)); + ureg_MIN(ureg, tmp_z, _X(tmp), _YYYY(cPsz1)); + } + ureg_MOV(ureg, oPsz, _Z(tmp)); + ureg_release_temporary(ureg, tmp); + } for (i = 0; i < 8; ++i) { - struct ureg_dst oTex, input_coord, transformed, t; + struct ureg_dst tmp, tmp_x, tmp2; + struct ureg_dst oTex, input_coord, transformed, t, aVtx_normed; unsigned c, writemask; const unsigned tci = (key->tc_gen >> (i * 3)) & 0x7; const unsigned idx = (key->tc_idx >> (i * 3)) & 0x7; @@ -582,8 +631,10 @@ if (tci == NINED3DTSS_TCI_DISABLE) continue; oTex = ureg_DECL_output(ureg, texcoord_sn, i); - input_coord = r[5]; - transformed = r[6]; + tmp = ureg_DECL_temporary(ureg); + tmp_x = ureg_writemask(tmp, TGSI_WRITEMASK_X); + input_coord = ureg_DECL_temporary(ureg); + transformed = ureg_DECL_temporary(ureg); /* Get the coordinate */ switch (tci) { @@ -594,27 +645,53 @@ ureg_MOV(ureg, input_coord, vs->aTex[idx]); break; case NINED3DTSS_TCI_CAMERASPACENORMAL: - ureg_MOV(ureg, ureg_writemask(input_coord, TGSI_WRITEMASK_XYZ), ureg_src(rNrm)); + ureg_MOV(ureg, ureg_writemask(input_coord, TGSI_WRITEMASK_XYZ), vs->aNrm); ureg_MOV(ureg, ureg_writemask(input_coord, TGSI_WRITEMASK_W), ureg_imm1f(ureg, 1.0f)); dim_input = 4; break; case NINED3DTSS_TCI_CAMERASPACEPOSITION: - ureg_MOV(ureg, ureg_writemask(input_coord, TGSI_WRITEMASK_XYZ), ureg_src(rVtx)); + ureg_MOV(ureg, ureg_writemask(input_coord, TGSI_WRITEMASK_XYZ), vs->aVtx); ureg_MOV(ureg, ureg_writemask(input_coord, TGSI_WRITEMASK_W), ureg_imm1f(ureg, 1.0f)); dim_input = 4; break; case NINED3DTSS_TCI_CAMERASPACEREFLECTIONVECTOR: tmp.WriteMask = TGSI_WRITEMASK_XYZ; - ureg_DP3(ureg, tmp_x, ureg_src(rVtx), ureg_src(rNrm)); - ureg_MUL(ureg, tmp, ureg_src(rNrm), _X(tmp)); + aVtx_normed = ureg_DECL_temporary(ureg); + ureg_normalize3(ureg, aVtx_normed, vs->aVtx); + ureg_DP3(ureg, tmp_x, ureg_src(aVtx_normed), vs->aNrm); + ureg_MUL(ureg, tmp, vs->aNrm, _X(tmp)); ureg_ADD(ureg, tmp, ureg_src(tmp), ureg_src(tmp)); - ureg_SUB(ureg, ureg_writemask(input_coord, TGSI_WRITEMASK_XYZ), ureg_src(rVtx), ureg_src(tmp)); + ureg_ADD(ureg, ureg_writemask(input_coord, TGSI_WRITEMASK_XYZ), ureg_src(aVtx_normed), ureg_negate(ureg_src(tmp))); ureg_MOV(ureg, ureg_writemask(input_coord, TGSI_WRITEMASK_W), ureg_imm1f(ureg, 1.0f)); + ureg_release_temporary(ureg, aVtx_normed); dim_input = 4; tmp.WriteMask = TGSI_WRITEMASK_XYZW; break; case NINED3DTSS_TCI_SPHEREMAP: - assert(!"TODO"); + /* Implement the formula of GL_SPHERE_MAP */ + tmp.WriteMask = TGSI_WRITEMASK_XYZ; + aVtx_normed = ureg_DECL_temporary(ureg); + tmp2 = ureg_DECL_temporary(ureg); + ureg_normalize3(ureg, aVtx_normed, vs->aVtx); + ureg_DP3(ureg, tmp_x, ureg_src(aVtx_normed), vs->aNrm); + ureg_MUL(ureg, tmp, vs->aNrm, _X(tmp)); + ureg_ADD(ureg, tmp, ureg_src(tmp), ureg_src(tmp)); + ureg_ADD(ureg, tmp, ureg_src(aVtx_normed), ureg_negate(ureg_src(tmp))); + /* now tmp = normed(Vtx) - 2 dot3(normed(Vtx), Nrm) Nrm */ + ureg_MOV(ureg, ureg_writemask(tmp2, TGSI_WRITEMASK_XYZ), ureg_src(tmp)); + ureg_MUL(ureg, tmp2, ureg_src(tmp2), ureg_src(tmp2)); + ureg_DP3(ureg, ureg_writemask(tmp2, TGSI_WRITEMASK_X), ureg_src(tmp2), ureg_src(tmp2)); + ureg_RSQ(ureg, ureg_writemask(tmp2, TGSI_WRITEMASK_X), ureg_src(tmp2)); + ureg_MUL(ureg, ureg_writemask(tmp2, TGSI_WRITEMASK_X), ureg_src(tmp2), ureg_imm1f(ureg, 0.5f)); + /* tmp2 = 0.5 / sqrt(tmp.x^2 + tmp.y^2 + (tmp.z+1)^2) + * TODO: z coordinates are a bit different gl vs d3d, should the formula be adapted ? */ + ureg_MUL(ureg, tmp, ureg_src(tmp), _X(tmp2)); + ureg_ADD(ureg, ureg_writemask(input_coord, TGSI_WRITEMASK_XY), ureg_src(tmp), ureg_imm1f(ureg, 0.5f)); + ureg_MOV(ureg, ureg_writemask(input_coord, TGSI_WRITEMASK_ZW), ureg_imm4f(ureg, 0.0f, 0.0f, 0.0f, 1.0f)); + ureg_release_temporary(ureg, aVtx_normed); + ureg_release_temporary(ureg, tmp2); + dim_input = 4; + tmp.WriteMask = TGSI_WRITEMASK_XYZW; break; default: assert(0); @@ -625,6 +702,7 @@ /* dim_output == 0 => do not transform the components. * XYZRHW also disables transformation */ if (!dim_output || key->position_t) { + ureg_release_temporary(ureg, transformed); transformed = input_coord; writemask = TGSI_WRITEMASK_XYZW; } else { @@ -646,9 +724,12 @@ } } writemask = (1 << dim_output) - 1; + ureg_release_temporary(ureg, input_coord); } ureg_MOV(ureg, ureg_writemask(oTex, writemask), ureg_src(transformed)); + ureg_release_temporary(ureg, transformed); + ureg_release_temporary(ureg, tmp); } /* === Lighting: @@ -693,18 +774,22 @@ * specular += light.specular * atten * powFact; */ if (key->lighting) { - struct ureg_dst rAtt = ureg_writemask(r[1], TGSI_WRITEMASK_W); - struct ureg_dst rHit = ureg_writemask(r[3], TGSI_WRITEMASK_XYZ); - struct ureg_dst rMid = ureg_writemask(r[4], TGSI_WRITEMASK_XYZ); + struct ureg_dst tmp = ureg_DECL_temporary(ureg); + struct ureg_dst tmp_x = ureg_writemask(tmp, TGSI_WRITEMASK_X); + struct ureg_dst tmp_y = ureg_writemask(tmp, TGSI_WRITEMASK_Y); + struct ureg_dst tmp_z = ureg_writemask(tmp, TGSI_WRITEMASK_Z); + struct ureg_dst rAtt = ureg_writemask(ureg_DECL_temporary(ureg), TGSI_WRITEMASK_W); + struct ureg_dst rHit = ureg_writemask(ureg_DECL_temporary(ureg), TGSI_WRITEMASK_XYZ); + struct ureg_dst rMid = ureg_writemask(ureg_DECL_temporary(ureg), TGSI_WRITEMASK_XYZ); - struct ureg_dst rCtr = ureg_writemask(r[2], TGSI_WRITEMASK_W); + struct ureg_dst rCtr = ureg_writemask(ureg_DECL_temporary(ureg), TGSI_WRITEMASK_W); struct ureg_dst AL = ureg_writemask(AR, TGSI_WRITEMASK_X); /* Light.*.Alpha is not used. */ - struct ureg_dst rD = ureg_writemask(r[5], TGSI_WRITEMASK_XYZ); - struct ureg_dst rA = ureg_writemask(r[6], TGSI_WRITEMASK_XYZ); - struct ureg_dst rS = ureg_writemask(r[7], TGSI_WRITEMASK_XYZ); + struct ureg_dst rD = ureg_writemask(ureg_DECL_temporary(ureg), TGSI_WRITEMASK_XYZ); + struct ureg_dst rA = ureg_writemask(ureg_DECL_temporary(ureg), TGSI_WRITEMASK_XYZ); + struct ureg_dst rS = ureg_DECL_temporary(ureg); struct ureg_src mtlP = _XXXX(MATERIAL_CONST(4)); @@ -730,10 +815,6 @@ ureg_MOV(ureg, rD, ureg_imm1f(ureg, 0.0f)); ureg_MOV(ureg, rA, ureg_imm1f(ureg, 0.0f)); ureg_MOV(ureg, rS, ureg_imm1f(ureg, 0.0f)); - rD = ureg_saturate(rD); - rA = ureg_saturate(rA); - rS = ureg_saturate(rS); - /* loop management */ ureg_BGNLOOP(ureg, &label[loop_label]); @@ -748,7 +829,7 @@ /* hitDir = light.position - eyeVtx * d = length(hitDir) */ - ureg_SUB(ureg, rHit, cLPos, ureg_src(rVtx)); + ureg_ADD(ureg, rHit, cLPos, ureg_negate(vs->aVtx)); ureg_DP3(ureg, tmp_x, ureg_src(rHit), ureg_src(rHit)); ureg_RSQ(ureg, tmp_y, _X(tmp)); ureg_MUL(ureg, tmp_x, _X(tmp), _Y(tmp)); /* length */ @@ -765,7 +846,7 @@ ureg_ENDIF(ureg); /* normalize hitDir */ - ureg_normalize3(ureg, rHit, ureg_src(rHit), tmp); + ureg_normalize3(ureg, rHit, ureg_src(rHit)); /* if (SPOT light) */ ureg_SEQ(ureg, tmp_x, cLKind, ureg_imm1f(ureg, D3DLIGHT_SPOT)); @@ -782,7 +863,7 @@ * spotAtt = (rho - light.cphi2) / (light.ctht2 - light.cphi2) ^ light.falloff */ ureg_DP3(ureg, tmp_y, ureg_negate(ureg_src(rHit)), cLDir); /* rho */ - ureg_SUB(ureg, tmp_x, _Y(tmp), cLPhi); + ureg_ADD(ureg, tmp_x, _Y(tmp), ureg_negate(cLPhi)); ureg_MUL(ureg, tmp_x, _X(tmp), cLSDiv); ureg_POW(ureg, tmp_x, _X(tmp), cLFOff); /* spotAtten */ ureg_SGE(ureg, tmp_z, _Y(tmp), cLTht); /* if inside theta && phi */ @@ -794,28 +875,34 @@ ureg_ENDIF(ureg); /* directional factors, let's not use LIT because of clarity */ - ureg_DP3(ureg, ureg_saturate(tmp_x), ureg_src(rNrm), ureg_src(rHit)); - ureg_MOV(ureg, tmp_y, ureg_imm1f(ureg, 0.0f)); - ureg_IF(ureg, _X(tmp), &label[l++]); - { - /* midVec = normalize(hitDir + eyeDir) */ + + if (has_aNrm) { if (key->localviewer) { - ureg_normalize3(ureg, rMid, ureg_src(rVtx), tmp); - ureg_SUB(ureg, rMid, ureg_src(rHit), ureg_src(rMid)); + ureg_normalize3(ureg, rMid, vs->aVtx); + ureg_ADD(ureg, rMid, ureg_src(rHit), ureg_negate(ureg_src(rMid))); } else { - ureg_SUB(ureg, rMid, ureg_src(rHit), ureg_imm3f(ureg, 0.0f, 0.0f, 1.0f)); + ureg_ADD(ureg, rMid, ureg_src(rHit), ureg_imm3f(ureg, 0.0f, 0.0f, -1.0f)); + } + ureg_normalize3(ureg, rMid, ureg_src(rMid)); + ureg_DP3(ureg, ureg_saturate(tmp_x), vs->aNrm, ureg_src(rHit)); + ureg_DP3(ureg, ureg_saturate(tmp_y), vs->aNrm, ureg_src(rMid)); + ureg_MUL(ureg, tmp_z, _X(tmp), _Y(tmp)); + /* Tests show that specular is computed only if (dp3(normal,hitDir) > 0). + * For front facing, it is more restrictive than test (dp3(normal,mid) > 0). + * No tests were made for backfacing, so add the two conditions */ + ureg_IF(ureg, _Z(tmp), &label[l++]); + { + ureg_DP3(ureg, ureg_saturate(tmp_y), vs->aNrm, ureg_src(rMid)); + ureg_POW(ureg, tmp_y, _Y(tmp), mtlP); + ureg_MUL(ureg, tmp_y, _W(rAtt), _Y(tmp)); /* power factor * att */ + ureg_MAD(ureg, rS, cLColS, _Y(tmp), ureg_src(rS)); /* accumulate specular */ } - ureg_normalize3(ureg, rMid, ureg_src(rMid), tmp); - ureg_DP3(ureg, ureg_saturate(tmp_y), ureg_src(rNrm), ureg_src(rMid)); - ureg_POW(ureg, tmp_y, _Y(tmp), mtlP); + ureg_fixup_label(ureg, label[l-1], ureg_get_instruction_number(ureg)); + ureg_ENDIF(ureg); ureg_MUL(ureg, tmp_x, _W(rAtt), _X(tmp)); /* dp3(normal,hitDir) * att */ - ureg_MUL(ureg, tmp_y, _W(rAtt), _Y(tmp)); /* power factor * att */ ureg_MAD(ureg, rD, cLColD, _X(tmp), ureg_src(rD)); /* accumulate diffuse */ - ureg_MAD(ureg, rS, cLColS, _Y(tmp), ureg_src(rS)); /* accumulate specular */ } - ureg_fixup_label(ureg, label[l-1], ureg_get_instruction_number(ureg)); - ureg_ENDIF(ureg); ureg_MAD(ureg, rA, cLColA, _W(rAtt), ureg_src(rA)); /* accumulate ambient */ @@ -829,13 +916,6 @@ ureg_fixup_label(ureg, label[loop_label], ureg_get_instruction_number(ureg)); ureg_ENDLOOP(ureg, &label[loop_label]); - /* Set alpha factors of illumination to 1.0 for the multiplications. */ - rD.WriteMask = TGSI_WRITEMASK_W; rD.Saturate = 0; - rS.WriteMask = TGSI_WRITEMASK_W; rS.Saturate = 0; - rA.WriteMask = TGSI_WRITEMASK_W; rA.Saturate = 0; - ureg_MOV(ureg, rD, ureg_imm1f(ureg, 1.0f)); - ureg_MOV(ureg, rS, ureg_imm1f(ureg, 1.0f)); - /* Apply to material: * * oCol[0] = (material.emissive + material.ambient * rs.ambient) + @@ -843,34 +923,34 @@ * material.diffuse * diffuse + * oCol[1] = material.specular * specular; */ - if (key->mtl_emissive == 0 && key->mtl_ambient == 0) { - ureg_MOV(ureg, rA, ureg_imm1f(ureg, 1.0f)); - ureg_MAD(ureg, tmp, ureg_src(rA), vs->mtlA, _CONST(19)); - } else { + if (key->mtl_emissive == 0 && key->mtl_ambient == 0) + ureg_MAD(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XYZ), ureg_src(rA), vs->mtlA, _CONST(19)); + else { ureg_ADD(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XYZ), ureg_src(rA), _CONST(25)); ureg_MAD(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XYZ), vs->mtlA, ureg_src(tmp), vs->mtlE); - ureg_ADD(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_W ), vs->mtlA, vs->mtlE); } - if (key->specular_enable) { - /* add oCol[1] to oCol[0] */ - ureg_MAD(ureg, tmp, ureg_src(rD), vs->mtlD, ureg_src(tmp)); - ureg_MAD(ureg, oCol[0], ureg_src(rS), vs->mtlS, ureg_src(tmp)); - } else { - ureg_MAD(ureg, oCol[0], ureg_src(rD), vs->mtlD, ureg_src(tmp)); - } + ureg_MAD(ureg, ureg_writemask(oCol[0], TGSI_WRITEMASK_XYZ), ureg_src(rD), vs->mtlD, ureg_src(tmp)); + ureg_MOV(ureg, ureg_writemask(oCol[0], TGSI_WRITEMASK_W), vs->mtlD); ureg_MUL(ureg, oCol[1], ureg_src(rS), vs->mtlS); + ureg_release_temporary(ureg, rAtt); + ureg_release_temporary(ureg, rHit); + ureg_release_temporary(ureg, rMid); + ureg_release_temporary(ureg, rCtr); + ureg_release_temporary(ureg, rD); + ureg_release_temporary(ureg, rA); + ureg_release_temporary(ureg, rS); + ureg_release_temporary(ureg, rAtt); + ureg_release_temporary(ureg, tmp); } else /* COLOR */ if (key->darkness) { - if (key->mtl_emissive == 0 && key->mtl_ambient == 0) { - ureg_MAD(ureg, oCol[0], vs->mtlD, ureg_imm4f(ureg, 0.0f, 0.0f, 0.0f, 1.0f), _CONST(19)); - } else { + if (key->mtl_emissive == 0 && key->mtl_ambient == 0) + ureg_MOV(ureg, ureg_writemask(oCol[0], TGSI_WRITEMASK_XYZ), _CONST(19)); + else ureg_MAD(ureg, ureg_writemask(oCol[0], TGSI_WRITEMASK_XYZ), vs->mtlA, _CONST(25), vs->mtlE); - ureg_ADD(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_W), vs->mtlA, vs->mtlE); - ureg_ADD(ureg, ureg_writemask(oCol[0], TGSI_WRITEMASK_W), vs->mtlD, _W(tmp)); - } - ureg_MUL(ureg, oCol[1], ureg_imm4f(ureg, 0.0f, 0.0f, 0.0f, 1.0f), vs->mtlS); + ureg_MOV(ureg, ureg_writemask(oCol[0], TGSI_WRITEMASK_W), vs->mtlD); + ureg_MOV(ureg, oCol[1], ureg_imm1f(ureg, 0.0f)); } else { ureg_MOV(ureg, oCol[0], vs->aCol[0]); ureg_MOV(ureg, oCol[1], vs->aCol[1]); @@ -881,15 +961,15 @@ * exp(x) = ex2(log2(e) * x) */ if (key->fog_mode) { - if (key->position_t) { - ureg_MOV(ureg, ureg_saturate(tmp_x), ureg_scalar(vs->aCol[1], TGSI_SWIZZLE_W)); - } else + struct ureg_dst tmp = ureg_DECL_temporary(ureg); + struct ureg_dst tmp_x = ureg_writemask(tmp, TGSI_WRITEMASK_X); + struct ureg_dst tmp_z = ureg_writemask(tmp, TGSI_WRITEMASK_Z); if (key->fog_range) { - ureg_DP3(ureg, tmp_x, ureg_src(rVtx), ureg_src(rVtx)); + ureg_DP3(ureg, tmp_x, vs->aVtx, vs->aVtx); ureg_RSQ(ureg, tmp_z, _X(tmp)); ureg_MUL(ureg, tmp_z, _Z(tmp), _X(tmp)); } else { - ureg_MOV(ureg, tmp_z, ureg_abs(_Z(rVtx))); + ureg_MOV(ureg, tmp_z, ureg_abs(_ZZZZ(vs->aVtx))); } if (key->fog_mode == D3DFOG_EXP) { @@ -903,11 +983,12 @@ ureg_MUL(ureg, tmp_x, _X(tmp), ureg_imm1f(ureg, -1.442695f)); ureg_EX2(ureg, tmp_x, _X(tmp)); } else - if (key->fog_mode == D3DFOG_LINEAR && !key->position_t) { - ureg_SUB(ureg, tmp_x, _XXXX(_CONST(28)), _Z(tmp)); + if (key->fog_mode == D3DFOG_LINEAR) { + ureg_ADD(ureg, tmp_x, _XXXX(_CONST(28)), ureg_negate(_Z(tmp))); ureg_MUL(ureg, ureg_saturate(tmp_x), _X(tmp), _YYYY(_CONST(28))); } ureg_MOV(ureg, oFog, _X(tmp)); + ureg_release_temporary(ureg, tmp); } else if (key->fog && !(key->passthrough & (1 << NINE_DECLUSAGE_FOG))) { ureg_MOV(ureg, oFog, ureg_scalar(vs->aCol[1], TGSI_SWIZZLE_W)); } @@ -959,13 +1040,24 @@ (void) 0; /* TODO: replace z of position output ? */ } + /* ucp for ff applies on world coordinates. + * aVtx is in worldview coordinates. */ + if (key->ucp) { + struct ureg_dst clipVect = ureg_DECL_output(ureg, TGSI_SEMANTIC_CLIPVERTEX, 0); + struct ureg_dst tmp = ureg_DECL_temporary(ureg); + ureg_MUL(ureg, tmp, _XXXX(vs->aVtx), _CONST(12)); + ureg_MAD(ureg, tmp, _YYYY(vs->aVtx), _CONST(13), ureg_src(tmp)); + ureg_MAD(ureg, tmp, _ZZZZ(vs->aVtx), _CONST(14), ureg_src(tmp)); + ureg_ADD(ureg, clipVect, _CONST(15), ureg_src(tmp)); + ureg_release_temporary(ureg, tmp); + } if (key->position_t && device->driver_caps.window_space_position_support) ureg_property(ureg, TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION, TRUE); ureg_END(ureg); nine_ureg_tgsi_dump(ureg, FALSE); - return ureg_create_shader_and_destroy(ureg, device->pipe); + return ureg_create_shader_and_destroy(ureg, device->context.pipe); } /* PS FF constants layout: @@ -990,7 +1082,6 @@ struct ureg_src vC[2]; /* DIFFUSE, SPECULAR */ struct ureg_src vT[8]; /* TEXCOORD[i] */ - struct ureg_dst r[6]; /* TEMPs */ struct ureg_dst rCur; /* D3DTA_CURRENT */ struct ureg_dst rMod; struct ureg_src rCurSrc; @@ -1004,7 +1095,6 @@ struct { unsigned index; unsigned index_pre_mod; - unsigned num_regs; } stage; }; @@ -1041,8 +1131,8 @@ break; } if (ta & D3DTA_COMPLEMENT) { - struct ureg_dst dst = ps->r[ps->stage.num_regs++]; - ureg_SUB(ps->ureg, dst, ureg_imm1f(ps->ureg, 1.0f), reg); + struct ureg_dst dst = ureg_DECL_temporary(ps->ureg); + ureg_ADD(ps->ureg, dst, ureg_imm1f(ps->ureg, 1.0f), ureg_negate(reg)); reg = ureg_src(dst); } if (ta & D3DTA_ALPHAREPLICATE) @@ -1106,8 +1196,8 @@ ps_do_ts_op(struct ps_build_ctx *ps, unsigned top, struct ureg_dst dst, struct ureg_src *arg) { struct ureg_program *ureg = ps->ureg; - struct ureg_dst tmp = ps->r[ps->stage.num_regs]; - struct ureg_dst tmp2 = ps->r[ps->stage.num_regs+1]; + struct ureg_dst tmp = ureg_DECL_temporary(ureg); + struct ureg_dst tmp2 = ureg_DECL_temporary(ureg); struct ureg_dst tmp_x = ureg_writemask(tmp, TGSI_WRITEMASK_X); tmp.WriteMask = dst.WriteMask; @@ -1145,17 +1235,17 @@ break; case D3DTOP_ADDSIGNED: ureg_ADD(ureg, tmp, arg[1], arg[2]); - ureg_SUB(ureg, dst, ureg_src(tmp), ureg_imm1f(ureg, 0.5f)); + ureg_ADD(ureg, dst, ureg_src(tmp), ureg_imm1f(ureg, -0.5f)); break; case D3DTOP_ADDSIGNED2X: ureg_ADD(ureg, tmp, arg[1], arg[2]); ureg_MAD(ureg, dst, ureg_src(tmp), ureg_imm1f(ureg, 2.0f), ureg_imm1f(ureg, -1.0f)); break; case D3DTOP_SUBTRACT: - ureg_SUB(ureg, dst, arg[1], arg[2]); + ureg_ADD(ureg, dst, arg[1], ureg_negate(arg[2])); break; case D3DTOP_ADDSMOOTH: - ureg_SUB(ureg, tmp, ureg_imm1f(ureg, 1.0f), arg[1]); + ureg_ADD(ureg, tmp, ureg_imm1f(ureg, 1.0f), ureg_negate(arg[1])); ureg_MAD(ureg, dst, ureg_src(tmp), arg[2], arg[1]); break; case D3DTOP_BLENDDIFFUSEALPHA: @@ -1169,7 +1259,7 @@ ureg_LRP(ureg, dst, _WWWW(_CONST(20)), arg[1], arg[2]); break; case D3DTOP_BLENDTEXTUREALPHAPM: - ureg_SUB(ureg, tmp_x, ureg_imm1f(ureg, 1.0f), _W(ps->rTex)); + ureg_ADD(ureg, tmp_x, ureg_imm1f(ureg, 1.0f), ureg_negate(_W(ps->rTex))); ureg_MAD(ureg, dst, arg[2], _X(tmp), arg[1]); break; case D3DTOP_BLENDCURRENTALPHA: @@ -1186,11 +1276,11 @@ ureg_MAD(ureg, dst, arg[1], arg[2], _WWWW(arg[1])); break; case D3DTOP_MODULATEINVALPHA_ADDCOLOR: - ureg_SUB(ureg, tmp_x, ureg_imm1f(ureg, 1.0f), _WWWW(arg[1])); + ureg_ADD(ureg, tmp_x, ureg_imm1f(ureg, 1.0f), ureg_negate(_WWWW(arg[1]))); ureg_MAD(ureg, dst, _X(tmp), arg[2], arg[1]); break; case D3DTOP_MODULATEINVCOLOR_ADDALPHA: - ureg_SUB(ureg, tmp, ureg_imm1f(ureg, 1.0f), arg[1]); + ureg_ADD(ureg, tmp, ureg_imm1f(ureg, 1.0f), ureg_negate(arg[1])); ureg_MAD(ureg, dst, ureg_src(tmp), arg[2], _WWWW(arg[1])); break; case D3DTOP_BUMPENVMAP: @@ -1198,8 +1288,8 @@ case D3DTOP_BUMPENVMAPLUMINANCE: break; case D3DTOP_DOTPRODUCT3: - ureg_SUB(ureg, tmp, arg[1], ureg_imm4f(ureg,0.5,0.5,0.5,0.5)); - ureg_SUB(ureg, tmp2, arg[2] , ureg_imm4f(ureg,0.5,0.5,0.5,0.5)); + ureg_ADD(ureg, tmp, arg[1], ureg_imm4f(ureg,-0.5,-0.5,-0.5,-0.5)); + ureg_ADD(ureg, tmp2, arg[2] , ureg_imm4f(ureg,-0.5,-0.5,-0.5,-0.5)); ureg_DP3(ureg, tmp, ureg_src(tmp), ureg_src(tmp2)); ureg_MUL(ureg, ureg_saturate(dst), ureg_src(tmp), ureg_imm4f(ureg,4.0,4.0,4.0,4.0)); break; @@ -1216,6 +1306,8 @@ assert(!"invalid D3DTOP"); break; } + ureg_release_temporary(ureg, tmp); + ureg_release_temporary(ureg, tmp2); } static void * @@ -1224,7 +1316,7 @@ struct ps_build_ctx ps; struct ureg_program *ureg = ureg_create(PIPE_SHADER_FRAGMENT); struct ureg_dst oCol; - unsigned i, s; + unsigned s; const unsigned texcoord_sn = get_texcoord_sn(device->screen); memset(&ps, 0, sizeof(ps)); @@ -1233,16 +1325,18 @@ ps.vC[0] = ureg_DECL_fs_input(ureg, TGSI_SEMANTIC_COLOR, 0, TGSI_INTERPOLATE_COLOR); - /* Declare all TEMPs we might need, serious drivers have a register allocator. */ - for (i = 0; i < ARRAY_SIZE(ps.r); ++i) - ps.r[i] = ureg_DECL_local_temporary(ureg); - ps.rCur = ps.r[0]; - ps.rTmp = ps.r[1]; - ps.rTex = ps.r[2]; + ps.rCur = ureg_DECL_temporary(ureg); + ps.rTmp = ureg_DECL_temporary(ureg); + ps.rTex = ureg_DECL_temporary(ureg); ps.rCurSrc = ureg_src(ps.rCur); ps.rTmpSrc = ureg_src(ps.rTmp); ps.rTexSrc = ureg_src(ps.rTex); + /* Initial values */ + ureg_MOV(ureg, ps.rCur, ps.vC[0]); + ureg_MOV(ureg, ps.rTmp, ureg_imm1f(ureg, 0.0f)); + ureg_MOV(ureg, ps.rTex, ureg_imm1f(ureg, 0.0f)); + for (s = 0; s < 8; ++s) { ps.s[s] = ureg_src_undef(); @@ -1282,11 +1376,6 @@ oCol = ureg_DECL_output(ureg, TGSI_SEMANTIC_COLOR, 0); - if (key->ts[0].colorop == D3DTOP_DISABLE && - key->ts[0].alphaop == D3DTOP_DISABLE) - ureg_MOV(ureg, ps.rCur, ps.vC[0]); - /* Or is it undefined then ? */ - /* Run stages. */ for (s = 0; s < 8; ++s) { @@ -1297,11 +1386,11 @@ struct ureg_dst dst; struct ureg_src arg[3]; - if (key->ts[s].colorop == D3DTOP_DISABLE && - key->ts[s].alphaop == D3DTOP_DISABLE) + if (key->ts[s].colorop == D3DTOP_DISABLE) { + assert (key->ts[s].alphaop == D3DTOP_DISABLE); continue; + } ps.stage.index = s; - ps.stage.num_regs = 3; DBG("STAGE[%u]: colorop=%s alphaop=%s\n", s, nine_D3DTOP_to_str(key->ts[s].colorop), @@ -1347,9 +1436,11 @@ if (dim == 4) ureg_TXP(ureg, ps.rTex, target, texture_coord, ps.s[s]); else { - ureg_RCP(ureg, ureg_writemask(ps.rTmp, TGSI_WRITEMASK_X), ureg_scalar(texture_coord, dim-1)); - ureg_MUL(ureg, ps.rTmp, _XXXX(ps.rTmpSrc), texture_coord); + struct ureg_dst tmp = ureg_DECL_temporary(ureg); + ureg_RCP(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_X), ureg_scalar(texture_coord, dim-1)); + ureg_MUL(ureg, ps.rTmp, _X(tmp), texture_coord); ureg_TEX(ureg, ps.rTex, target, ps.rTmpSrc, ps.s[s]); + ureg_release_temporary(ureg, tmp); } } else { ureg_TEX(ureg, ps.rTex, target, texture_coord, ps.s[s]); @@ -1358,29 +1449,6 @@ ureg_MUL(ureg, ps.rTex, ureg_src(ps.rTex), _X(delta)); } - if (((s == 0 && key->ts[0].colorop != D3DTOP_BUMPENVMAP && - key->ts[0].colorop != D3DTOP_BUMPENVMAPLUMINANCE) || - (s == 1 && - (key->ts[0].colorop == D3DTOP_BUMPENVMAP || - key->ts[0].colorop == D3DTOP_BUMPENVMAPLUMINANCE)))&& - (key->ts[s].resultarg != 0 /* not current */ || - key->ts[s].colorop == D3DTOP_DISABLE || - key->ts[s].alphaop == D3DTOP_DISABLE || - key->ts[s].colorop == D3DTOP_BLENDCURRENTALPHA || - key->ts[s].alphaop == D3DTOP_BLENDCURRENTALPHA || - key->ts[s].colorarg0 == D3DTA_CURRENT || - key->ts[s].colorarg1 == D3DTA_CURRENT || - key->ts[s].colorarg2 == D3DTA_CURRENT || - key->ts[s].alphaarg0 == D3DTA_CURRENT || - key->ts[s].alphaarg1 == D3DTA_CURRENT || - key->ts[s].alphaarg2 == D3DTA_CURRENT)) { - /* Initialize D3DTA_CURRENT. - * (Yes we can do this before the loop but not until - * NVE4 has an instruction scheduling pass.) - */ - ureg_MOV(ureg, ps.rCur, ps.vC[0]); - } - if (key->ts[s].colorop == D3DTOP_BUMPENVMAP || key->ts[s].colorop == D3DTOP_BUMPENVMAPLUMINANCE) continue; @@ -1388,7 +1456,7 @@ dst = ps_get_ts_dst(&ps, key->ts[s].resultarg ? D3DTA_TEMP : D3DTA_CURRENT); if (ps.stage.index_pre_mod == ps.stage.index) { - ps.rMod = ps.r[ps.stage.num_regs++]; + ps.rMod = ureg_DECL_temporary(ureg); ureg_MUL(ureg, ps.rMod, ps.rCurSrc, ps.rTexSrc); } @@ -1425,11 +1493,12 @@ } if (key->specular) - ureg_ADD(ureg, ps.rCur, ps.rCurSrc, ps.vC[1]); + ureg_ADD(ureg, ureg_writemask(ps.rCur, TGSI_WRITEMASK_XYZ), ps.rCurSrc, ps.vC[1]); /* Fog. */ if (key->fog_mode) { + struct ureg_dst rFog = ureg_writemask(ps.rTmp, TGSI_WRITEMASK_X); struct ureg_src vPos; if (device->screen->get_param(device->screen, PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL)) { @@ -1439,20 +1508,35 @@ TGSI_INTERPOLATE_LINEAR); } - struct ureg_dst rFog = ureg_writemask(ps.rTmp, TGSI_WRITEMASK_X); + /* Source is either W or Z. + * When we use vs ff, + * Z is when an orthogonal projection matrix is detected, + * W (WFOG) else. + * Z is used for programmable vs. + * Note: Tests indicate that the projection matrix coefficients do + * actually affect pixel fog (and not vertex fog) when vs ff is used, + * which justifies taking the position's w instead of taking the z coordinate + * before the projection in the vs shader. + */ + if (!key->fog_source) + ureg_MOV(ureg, rFog, _ZZZZ(vPos)); + else + /* Position's w is 1/w */ + ureg_RCP(ureg, rFog, _WWWW(vPos)); + if (key->fog_mode == D3DFOG_EXP) { - ureg_MUL(ureg, rFog, _ZZZZ(vPos), _ZZZZ(_CONST(22))); + ureg_MUL(ureg, rFog, _X(rFog), _ZZZZ(_CONST(22))); ureg_MUL(ureg, rFog, _X(rFog), ureg_imm1f(ureg, -1.442695f)); ureg_EX2(ureg, rFog, _X(rFog)); } else if (key->fog_mode == D3DFOG_EXP2) { - ureg_MUL(ureg, rFog, _ZZZZ(vPos), _ZZZZ(_CONST(22))); + ureg_MUL(ureg, rFog, _X(rFog), _ZZZZ(_CONST(22))); ureg_MUL(ureg, rFog, _X(rFog), _X(rFog)); ureg_MUL(ureg, rFog, _X(rFog), ureg_imm1f(ureg, -1.442695f)); ureg_EX2(ureg, rFog, _X(rFog)); } else if (key->fog_mode == D3DFOG_LINEAR) { - ureg_SUB(ureg, rFog, _XXXX(_CONST(22)), _ZZZZ(vPos)); + ureg_ADD(ureg, rFog, _XXXX(_CONST(22)), ureg_negate(_X(rFog))); ureg_MUL(ureg, ureg_saturate(rFog), _X(rFog), _YYYY(_CONST(22))); } ureg_LRP(ureg, ureg_writemask(oCol, TGSI_WRITEMASK_XYZ), _X(rFog), ps.rCurSrc, _CONST(21)); @@ -1468,18 +1552,20 @@ ureg_END(ureg); nine_ureg_tgsi_dump(ureg, FALSE); - return ureg_create_shader_and_destroy(ureg, device->pipe); + return ureg_create_shader_and_destroy(ureg, device->context.pipe); } static struct NineVertexShader9 * nine_ff_get_vs(struct NineDevice9 *device) { - const struct nine_state *state = &device->state; + const struct nine_context *context = &device->context; struct NineVertexShader9 *vs; enum pipe_error err; struct vs_build_ctx bld; struct nine_ff_vs_key key; unsigned s, i; + boolean has_indexes = false; + boolean has_weights = false; char input_texture_coord[8]; assert(sizeof(key) <= sizeof(key.value32)); @@ -1491,23 +1577,32 @@ bld.key = &key; /* FIXME: this shouldn't be NULL, but it is on init */ - if (state->vdecl) { + if (context->vdecl) { key.color0in_one = 1; - key.color1in_one = 1; - for (i = 0; i < state->vdecl->nelems; i++) { - uint16_t usage = state->vdecl->usage_map[i]; + key.color1in_zero = 1; + for (i = 0; i < context->vdecl->nelems; i++) { + uint16_t usage = context->vdecl->usage_map[i]; if (usage == NINE_DECLUSAGE_POSITIONT) key.position_t = 1; else if (usage == NINE_DECLUSAGE_i(COLOR, 0)) key.color0in_one = 0; else if (usage == NINE_DECLUSAGE_i(COLOR, 1)) - key.color1in_one = 0; - else if (usage == NINE_DECLUSAGE_PSIZE) + key.color1in_zero = 0; + else if (usage == NINE_DECLUSAGE_i(BLENDINDICES, 0)) { + has_indexes = true; + key.passthrough |= 1 << usage; + } else if (usage == NINE_DECLUSAGE_i(BLENDWEIGHT, 0)) { + has_weights = true; + key.passthrough |= 1 << usage; + } else if (usage == NINE_DECLUSAGE_i(NORMAL, 0)) { + key.has_normal = 1; + key.passthrough |= 1 << usage; + } else if (usage == NINE_DECLUSAGE_PSIZE) key.vertexpointsize = 1; else if (usage % NINE_DECLUSAGE_COUNT == NINE_DECLUSAGE_TEXCOORD) { s = usage / NINE_DECLUSAGE_COUNT; if (s < 8) - input_texture_coord[s] = nine_decltype_get_dim(state->vdecl->decls[i].Type); + input_texture_coord[s] = nine_decltype_get_dim(context->vdecl->decls[i].Type); else DBG("FF given texture coordinate >= 8. Ignoring\n"); } else if (usage < NINE_DECLUSAGE_NONE) @@ -1519,32 +1614,36 @@ key.passthrough &= ~((1 << NINE_DECLUSAGE_POSITION) | (1 << NINE_DECLUSAGE_PSIZE) | (1 << NINE_DECLUSAGE_TEXCOORD) | (1 << NINE_DECLUSAGE_POSITIONT) | (1 << NINE_DECLUSAGE_TESSFACTOR) | (1 << NINE_DECLUSAGE_SAMPLE)); - key.pointscale = !!state->rs[D3DRS_POINTSCALEENABLE]; + if (!key.position_t) + key.passthrough = 0; + key.pointscale = !!context->rs[D3DRS_POINTSCALEENABLE]; - key.lighting = !!state->rs[D3DRS_LIGHTING] && state->ff.num_lights_active; - key.darkness = !!state->rs[D3DRS_LIGHTING] && !state->ff.num_lights_active; + key.lighting = !!context->rs[D3DRS_LIGHTING] && context->ff.num_lights_active; + key.darkness = !!context->rs[D3DRS_LIGHTING] && !context->ff.num_lights_active; if (key.position_t) { key.darkness = 0; /* |= key.lighting; */ /* XXX ? */ key.lighting = 0; } - if ((key.lighting | key.darkness) && state->rs[D3DRS_COLORVERTEX]) { - key.mtl_diffuse = state->rs[D3DRS_DIFFUSEMATERIALSOURCE]; - key.mtl_ambient = state->rs[D3DRS_AMBIENTMATERIALSOURCE]; - key.mtl_specular = state->rs[D3DRS_SPECULARMATERIALSOURCE]; - key.mtl_emissive = state->rs[D3DRS_EMISSIVEMATERIALSOURCE]; + if ((key.lighting | key.darkness) && context->rs[D3DRS_COLORVERTEX]) { + uint32_t mask = (key.color0in_one ? 0 : 1) | (key.color1in_zero ? 0 : 2); + key.mtl_diffuse = context->rs[D3DRS_DIFFUSEMATERIALSOURCE] & mask; + key.mtl_ambient = context->rs[D3DRS_AMBIENTMATERIALSOURCE] & mask; + key.mtl_specular = context->rs[D3DRS_SPECULARMATERIALSOURCE] & mask; + key.mtl_emissive = context->rs[D3DRS_EMISSIVEMATERIALSOURCE] & mask; } - key.fog = !!state->rs[D3DRS_FOGENABLE]; - key.fog_mode = state->rs[D3DRS_FOGENABLE] ? state->rs[D3DRS_FOGVERTEXMODE] : 0; + key.fog = !!context->rs[D3DRS_FOGENABLE]; + key.fog_mode = (!key.position_t && context->rs[D3DRS_FOGENABLE]) ? context->rs[D3DRS_FOGVERTEXMODE] : 0; if (key.fog_mode) - key.fog_range = !key.position_t && state->rs[D3DRS_RANGEFOGENABLE]; + key.fog_range = context->rs[D3DRS_RANGEFOGENABLE]; - key.localviewer = !!state->rs[D3DRS_LOCALVIEWER]; - key.specular_enable = !!state->rs[D3DRS_SPECULARENABLE]; + key.localviewer = !!context->rs[D3DRS_LOCALVIEWER]; + key.normalizenormals = !!context->rs[D3DRS_NORMALIZENORMALS]; + key.ucp = !!context->rs[D3DRS_CLIPPLANEENABLE]; - if (state->rs[D3DRS_VERTEXBLEND] != D3DVBF_DISABLE) { - key.vertexblend_indexed = !!state->rs[D3DRS_INDEXEDVERTEXBLENDENABLE]; + if (context->rs[D3DRS_VERTEXBLEND] != D3DVBF_DISABLE) { + key.vertexblend_indexed = !!context->rs[D3DRS_INDEXEDVERTEXBLENDENABLE] && has_indexes; - switch (state->rs[D3DRS_VERTEXBLEND]) { + switch (context->rs[D3DRS_VERTEXBLEND]) { case D3DVBF_0WEIGHTS: key.vertexblend = key.vertexblend_indexed; break; case D3DVBF_1WEIGHTS: key.vertexblend = 2; break; case D3DVBF_2WEIGHTS: key.vertexblend = 3; break; @@ -1554,25 +1653,28 @@ assert(!"invalid D3DVBF"); break; } + if (!has_weights && context->rs[D3DRS_VERTEXBLEND] != D3DVBF_0WEIGHTS) + key.vertexblend = 0; /* TODO: if key.vertexblend_indexed, perhaps it should use 1.0 as weight, or revert to D3DVBF_0WEIGHTS */ } for (s = 0; s < 8; ++s) { - unsigned gen = (state->ff.tex_stage[s][D3DTSS_TEXCOORDINDEX] >> 16) + 1; + unsigned gen = (context->ff.tex_stage[s][D3DTSS_TEXCOORDINDEX] >> 16) + 1; + unsigned idx = context->ff.tex_stage[s][D3DTSS_TEXCOORDINDEX] & 7; unsigned dim; if (key.position_t && gen > NINED3DTSS_TCI_PASSTHRU) gen = NINED3DTSS_TCI_PASSTHRU; - if (!input_texture_coord[s] && gen == NINED3DTSS_TCI_PASSTHRU) + if (!input_texture_coord[idx] && gen == NINED3DTSS_TCI_PASSTHRU) gen = NINED3DTSS_TCI_DISABLE; key.tc_gen |= gen << (s * 3); - key.tc_idx |= (state->ff.tex_stage[s][D3DTSS_TEXCOORDINDEX] & 7) << (s * 3); - key.tc_dim_input |= ((input_texture_coord[s]-1) & 0x3) << (s * 2); + key.tc_idx |= idx << (s * 3); + key.tc_dim_input |= ((input_texture_coord[idx]-1) & 0x3) << (s * 2); - dim = state->ff.tex_stage[s][D3DTSS_TEXTURETRANSFORMFLAGS] & 0x7; + dim = context->ff.tex_stage[s][D3DTSS_TEXTURETRANSFORMFLAGS] & 0x7; if (dim > 4) - dim = input_texture_coord[s]; + dim = input_texture_coord[idx]; if (dim == 1) /* NV behaviour */ dim = 0; key.tc_dim_output |= dim << (s * 3); @@ -1605,10 +1707,14 @@ return vs; } +#define GET_D3DTS(n) nine_state_access_transform(&context->ff, D3DTS_##n, FALSE) +#define IS_D3DTS_DIRTY(s,n) ((s)->ff.changed.transform[(D3DTS_##n) / 32] & (1 << ((D3DTS_##n) % 32))) + static struct NinePixelShader9 * nine_ff_get_ps(struct NineDevice9 *device) { - struct nine_state *state = &device->state; + struct nine_context *context = &device->context; + D3DMATRIX *projection_matrix = GET_D3DTS(PROJECTION); struct NinePixelShader9 *ps; enum pipe_error err; struct nine_ff_ps_key key; @@ -1619,50 +1725,65 @@ memset(&key, 0, sizeof(key)); for (s = 0; s < 8; ++s) { - key.ts[s].colorop = state->ff.tex_stage[s][D3DTSS_COLOROP]; - key.ts[s].alphaop = state->ff.tex_stage[s][D3DTSS_ALPHAOP]; - /* MSDN says D3DTOP_DISABLE disables this and all subsequent stages. */ - /* ALPHAOP cannot be disabled if COLOROP is enabled. */ + key.ts[s].colorop = context->ff.tex_stage[s][D3DTSS_COLOROP]; + key.ts[s].alphaop = context->ff.tex_stage[s][D3DTSS_ALPHAOP]; + const uint8_t used_c = ps_d3dtop_args_mask(key.ts[s].colorop); + const uint8_t used_a = ps_d3dtop_args_mask(key.ts[s].alphaop); + /* MSDN says D3DTOP_DISABLE disables this and all subsequent stages. + * ALPHAOP cannot be enabled if COLOROP is disabled. + * Verified on Windows. */ if (key.ts[s].colorop == D3DTOP_DISABLE) { key.ts[s].alphaop = D3DTOP_DISABLE; /* DISABLE == 1, avoid degenerate keys */ break; } - if (!state->texture[s] && - state->ff.tex_stage[s][D3DTSS_COLORARG1] == D3DTA_TEXTURE) { - /* This should also disable the stage. */ + if (!context->texture[s].enabled && + ((context->ff.tex_stage[s][D3DTSS_COLORARG0] == D3DTA_TEXTURE && + used_c & 0x1) || + (context->ff.tex_stage[s][D3DTSS_COLORARG1] == D3DTA_TEXTURE && + used_c & 0x2) || + (context->ff.tex_stage[s][D3DTSS_COLORARG2] == D3DTA_TEXTURE && + used_c & 0x4))) { + /* Tested on Windows: Invalid texture read disables the stage + * and the subsequent ones, but only for colorop. For alpha, + * it's as if the texture had alpha of 1.0, which is what + * has our dummy texture in that case. Invalid color also + * disabled the following alpha stages. */ key.ts[s].colorop = key.ts[s].alphaop = D3DTOP_DISABLE; break; } - if (state->ff.tex_stage[s][D3DTSS_COLORARG1] == D3DTA_TEXTURE) + if (context->ff.tex_stage[s][D3DTSS_COLORARG0] == D3DTA_TEXTURE || + context->ff.tex_stage[s][D3DTSS_COLORARG1] == D3DTA_TEXTURE || + context->ff.tex_stage[s][D3DTSS_COLORARG2] == D3DTA_TEXTURE || + context->ff.tex_stage[s][D3DTSS_ALPHAARG0] == D3DTA_TEXTURE || + context->ff.tex_stage[s][D3DTSS_ALPHAARG1] == D3DTA_TEXTURE || + context->ff.tex_stage[s][D3DTSS_ALPHAARG2] == D3DTA_TEXTURE) sampler_mask |= (1 << s); if (key.ts[s].colorop != D3DTOP_DISABLE) { - uint8_t used_c = ps_d3dtop_args_mask(key.ts[s].colorop); - if (used_c & 0x1) key.ts[s].colorarg0 = state->ff.tex_stage[s][D3DTSS_COLORARG0]; - if (used_c & 0x2) key.ts[s].colorarg1 = state->ff.tex_stage[s][D3DTSS_COLORARG1]; - if (used_c & 0x4) key.ts[s].colorarg2 = state->ff.tex_stage[s][D3DTSS_COLORARG2]; - if (used_c & 0x1) key.colorarg_b4[0] |= (state->ff.tex_stage[s][D3DTSS_COLORARG0] >> 4) << s; - if (used_c & 0x1) key.colorarg_b5[0] |= (state->ff.tex_stage[s][D3DTSS_COLORARG0] >> 5) << s; - if (used_c & 0x2) key.colorarg_b4[1] |= (state->ff.tex_stage[s][D3DTSS_COLORARG1] >> 4) << s; - if (used_c & 0x2) key.colorarg_b5[1] |= (state->ff.tex_stage[s][D3DTSS_COLORARG1] >> 5) << s; - if (used_c & 0x4) key.colorarg_b4[2] |= (state->ff.tex_stage[s][D3DTSS_COLORARG2] >> 4) << s; - if (used_c & 0x4) key.colorarg_b5[2] |= (state->ff.tex_stage[s][D3DTSS_COLORARG2] >> 5) << s; + if (used_c & 0x1) key.ts[s].colorarg0 = context->ff.tex_stage[s][D3DTSS_COLORARG0]; + if (used_c & 0x2) key.ts[s].colorarg1 = context->ff.tex_stage[s][D3DTSS_COLORARG1]; + if (used_c & 0x4) key.ts[s].colorarg2 = context->ff.tex_stage[s][D3DTSS_COLORARG2]; + if (used_c & 0x1) key.colorarg_b4[0] |= (context->ff.tex_stage[s][D3DTSS_COLORARG0] >> 4) << s; + if (used_c & 0x1) key.colorarg_b5[0] |= (context->ff.tex_stage[s][D3DTSS_COLORARG0] >> 5) << s; + if (used_c & 0x2) key.colorarg_b4[1] |= (context->ff.tex_stage[s][D3DTSS_COLORARG1] >> 4) << s; + if (used_c & 0x2) key.colorarg_b5[1] |= (context->ff.tex_stage[s][D3DTSS_COLORARG1] >> 5) << s; + if (used_c & 0x4) key.colorarg_b4[2] |= (context->ff.tex_stage[s][D3DTSS_COLORARG2] >> 4) << s; + if (used_c & 0x4) key.colorarg_b5[2] |= (context->ff.tex_stage[s][D3DTSS_COLORARG2] >> 5) << s; } if (key.ts[s].alphaop != D3DTOP_DISABLE) { - uint8_t used_a = ps_d3dtop_args_mask(key.ts[s].alphaop); - if (used_a & 0x1) key.ts[s].alphaarg0 = state->ff.tex_stage[s][D3DTSS_ALPHAARG0]; - if (used_a & 0x2) key.ts[s].alphaarg1 = state->ff.tex_stage[s][D3DTSS_ALPHAARG1]; - if (used_a & 0x4) key.ts[s].alphaarg2 = state->ff.tex_stage[s][D3DTSS_ALPHAARG2]; - if (used_a & 0x1) key.alphaarg_b4[0] |= (state->ff.tex_stage[s][D3DTSS_ALPHAARG0] >> 4) << s; - if (used_a & 0x2) key.alphaarg_b4[1] |= (state->ff.tex_stage[s][D3DTSS_ALPHAARG1] >> 4) << s; - if (used_a & 0x4) key.alphaarg_b4[2] |= (state->ff.tex_stage[s][D3DTSS_ALPHAARG2] >> 4) << s; + if (used_a & 0x1) key.ts[s].alphaarg0 = context->ff.tex_stage[s][D3DTSS_ALPHAARG0]; + if (used_a & 0x2) key.ts[s].alphaarg1 = context->ff.tex_stage[s][D3DTSS_ALPHAARG1]; + if (used_a & 0x4) key.ts[s].alphaarg2 = context->ff.tex_stage[s][D3DTSS_ALPHAARG2]; + if (used_a & 0x1) key.alphaarg_b4[0] |= (context->ff.tex_stage[s][D3DTSS_ALPHAARG0] >> 4) << s; + if (used_a & 0x2) key.alphaarg_b4[1] |= (context->ff.tex_stage[s][D3DTSS_ALPHAARG1] >> 4) << s; + if (used_a & 0x4) key.alphaarg_b4[2] |= (context->ff.tex_stage[s][D3DTSS_ALPHAARG2] >> 4) << s; } - key.ts[s].resultarg = state->ff.tex_stage[s][D3DTSS_RESULTARG] == D3DTA_TEMP; + key.ts[s].resultarg = context->ff.tex_stage[s][D3DTSS_RESULTARG] == D3DTA_TEMP; - if (state->texture[s]) { - switch (state->texture[s]->base.type) { + if (context->texture[s].enabled) { + switch (context->texture[s].type) { case D3DRTYPE_TEXTURE: key.ts[s].textarget = 1; break; case D3DRTYPE_VOLUMETEXTURE: key.ts[s].textarget = 2; break; case D3DRTYPE_CUBETEXTURE: key.ts[s].textarget = 3; break; @@ -1675,13 +1796,43 @@ } } - key.projected = nine_ff_get_projected_key(state); + /* Note: If colorop is D3DTOP_DISABLE for the first stage + * (which implies alphaop is too), nothing particular happens, + * that is, current is equal to diffuse (which is the case anyway, + * because it is how it is initialized). + * Special case seems if alphaop is D3DTOP_DISABLE and not colorop, + * because then if the resultarg is TEMP, then diffuse alpha is written + * to it. */ + if (key.ts[0].colorop != D3DTOP_DISABLE && + key.ts[0].alphaop == D3DTOP_DISABLE && + key.ts[0].resultarg != 0) { + key.ts[0].alphaop = D3DTOP_SELECTARG1; + key.ts[0].alphaarg1 = D3DTA_DIFFUSE; + } + /* When no alpha stage writes to current, diffuse alpha is taken. + * Since we initialize current to diffuse, we have the behaviour. */ + + /* Last stage always writes to Current */ + if (s >= 1) + key.ts[s-1].resultarg = 0; + + key.projected = nine_ff_get_projected_key(context); + key.specular = !!context->rs[D3DRS_SPECULARENABLE]; for (; s < 8; ++s) key.ts[s].colorop = key.ts[s].alphaop = D3DTOP_DISABLE; - if (state->rs[D3DRS_FOGENABLE]) - key.fog_mode = state->rs[D3DRS_FOGTABLEMODE]; - key.fog = !!state->rs[D3DRS_FOGENABLE]; + if (context->rs[D3DRS_FOGENABLE]) + key.fog_mode = context->rs[D3DRS_FOGTABLEMODE]; + key.fog = !!context->rs[D3DRS_FOGENABLE]; + /* Pixel fog (with WFOG advertised): source is either Z or W. + * W is the source if vs ff is used, and the + * projection matrix is not orthogonal. + * Tests on Win 10 seem to indicate _34 + * and _33 are checked against 0, 1. */ + if (key.fog_mode && key.fog) + key.fog_source = !context->programmable_vs && + !(projection_matrix->_34 == 0.0f && + projection_matrix->_44 == 1.0f); ps = util_hash_table_get(device->ff.ht_ps, &key); if (ps) @@ -1704,12 +1855,10 @@ return ps; } -#define GET_D3DTS(n) nine_state_access_transform(state, D3DTS_##n, FALSE) -#define IS_D3DTS_DIRTY(s,n) ((s)->ff.changed.transform[(D3DTS_##n) / 32] & (1 << ((D3DTS_##n) % 32))) static void nine_ff_load_vs_transforms(struct NineDevice9 *device) { - struct nine_state *state = &device->state; + struct nine_context *context = &device->context; D3DMATRIX T; D3DMATRIX *M = (D3DMATRIX *)device->ff.vs_const; unsigned i; @@ -1717,61 +1866,61 @@ /* TODO: make this nicer, and only upload the ones we need */ /* TODO: use ff.vs_const as storage of W, V, P matrices */ - if (IS_D3DTS_DIRTY(state, WORLD) || - IS_D3DTS_DIRTY(state, VIEW) || - IS_D3DTS_DIRTY(state, PROJECTION)) { + if (IS_D3DTS_DIRTY(context, WORLD) || + IS_D3DTS_DIRTY(context, VIEW) || + IS_D3DTS_DIRTY(context, PROJECTION)) { /* WVP, WV matrices */ nine_d3d_matrix_matrix_mul(&M[1], GET_D3DTS(WORLD), GET_D3DTS(VIEW)); nine_d3d_matrix_matrix_mul(&M[0], &M[1], GET_D3DTS(PROJECTION)); /* normal matrix == transpose(inverse(WV)) */ - nine_d3d_matrix_inverse_3x3(&T, &M[1]); + nine_d3d_matrix_inverse(&T, &M[1]); nine_d3d_matrix_transpose(&M[4], &T); - /* VP matrix */ - nine_d3d_matrix_matrix_mul(&M[2], GET_D3DTS(VIEW), GET_D3DTS(PROJECTION)); + /* P matrix */ + M[2] = *GET_D3DTS(PROJECTION); /* V and W matrix */ - M[3] = *GET_D3DTS(VIEW); - M[56] = *GET_D3DTS(WORLD); + nine_d3d_matrix_inverse(&M[3], GET_D3DTS(VIEW)); + M[40] = M[1]; } - if (state->rs[D3DRS_VERTEXBLEND] != D3DVBF_DISABLE) { + if (context->rs[D3DRS_VERTEXBLEND] != D3DVBF_DISABLE) { /* load other world matrices */ - for (i = 1; i <= 7; ++i) - M[56 + i] = *GET_D3DTS(WORLDMATRIX(i)); + for (i = 1; i <= 8; ++i) { + nine_d3d_matrix_matrix_mul(&M[40 + i], GET_D3DTS(WORLDMATRIX(i)), GET_D3DTS(VIEW)); + } } - device->ff.vs_const[30 * 4] = asfloat(state->rs[D3DRS_TWEENFACTOR]); + device->ff.vs_const[30 * 4] = asfloat(context->rs[D3DRS_TWEENFACTOR]); } static void nine_ff_load_lights(struct NineDevice9 *device) { - struct nine_state *state = &device->state; + struct nine_context *context = &device->context; struct fvec4 *dst = (struct fvec4 *)device->ff.vs_const; unsigned l; - if (state->changed.group & NINE_STATE_FF_MATERIAL) { - const D3DMATERIAL9 *mtl = &state->ff.material; + if (context->changed.group & NINE_STATE_FF_MATERIAL) { + const D3DMATERIAL9 *mtl = &context->ff.material; memcpy(&dst[20], &mtl->Diffuse, 4 * sizeof(float)); memcpy(&dst[21], &mtl->Ambient, 4 * sizeof(float)); memcpy(&dst[22], &mtl->Specular, 4 * sizeof(float)); dst[23].x = mtl->Power; memcpy(&dst[24], &mtl->Emissive, 4 * sizeof(float)); - d3dcolor_to_rgba(&dst[25].x, state->rs[D3DRS_AMBIENT]); + d3dcolor_to_rgba(&dst[25].x, context->rs[D3DRS_AMBIENT]); dst[19].x = dst[25].x * mtl->Ambient.r + mtl->Emissive.r; dst[19].y = dst[25].y * mtl->Ambient.g + mtl->Emissive.g; dst[19].z = dst[25].z * mtl->Ambient.b + mtl->Emissive.b; - dst[19].w = mtl->Ambient.a + mtl->Emissive.a; } - if (!(state->changed.group & NINE_STATE_FF_LIGHTING)) + if (!(context->changed.group & NINE_STATE_FF_LIGHTING)) return; - for (l = 0; l < state->ff.num_lights_active; ++l) { - const D3DLIGHT9 *light = &state->ff.light[state->ff.active_light[l]]; + for (l = 0; l < context->ff.num_lights_active; ++l) { + const D3DLIGHT9 *light = &context->ff.light[context->ff.active_light[l]]; dst[32 + l * 8].x = light->Type; dst[32 + l * 8].y = light->Attenuation0; @@ -1787,84 +1936,84 @@ dst[38 + l * 8].x = cosf(light->Theta * 0.5f); dst[38 + l * 8].y = cosf(light->Phi * 0.5f); dst[38 + l * 8].z = 1.0f / (dst[38 + l * 8].x - dst[38 + l * 8].y); - dst[39 + l * 8].w = (l + 1) == state->ff.num_lights_active; + dst[39 + l * 8].w = (l + 1) == context->ff.num_lights_active; } } static void nine_ff_load_point_and_fog_params(struct NineDevice9 *device) { - const struct nine_state *state = &device->state; + struct nine_context *context = &device->context; struct fvec4 *dst = (struct fvec4 *)device->ff.vs_const; - if (!(state->changed.group & NINE_STATE_FF_OTHER)) + if (!(context->changed.group & NINE_STATE_FF_OTHER)) return; - dst[26].x = asfloat(state->rs[D3DRS_POINTSIZE_MIN]); - dst[26].y = asfloat(state->rs[D3DRS_POINTSIZE_MAX]); - dst[26].z = asfloat(state->rs[D3DRS_POINTSIZE]); - dst[26].w = asfloat(state->rs[D3DRS_POINTSCALE_A]); - dst[27].x = asfloat(state->rs[D3DRS_POINTSCALE_B]); - dst[27].y = asfloat(state->rs[D3DRS_POINTSCALE_C]); - dst[28].x = asfloat(state->rs[D3DRS_FOGEND]); - dst[28].y = 1.0f / (asfloat(state->rs[D3DRS_FOGEND]) - asfloat(state->rs[D3DRS_FOGSTART])); + dst[26].x = asfloat(context->rs[D3DRS_POINTSIZE_MIN]); + dst[26].y = asfloat(context->rs[D3DRS_POINTSIZE_MAX]); + dst[26].z = asfloat(context->rs[D3DRS_POINTSIZE]); + dst[26].w = asfloat(context->rs[D3DRS_POINTSCALE_A]); + dst[27].x = asfloat(context->rs[D3DRS_POINTSCALE_B]); + dst[27].y = asfloat(context->rs[D3DRS_POINTSCALE_C]); + dst[28].x = asfloat(context->rs[D3DRS_FOGEND]); + dst[28].y = 1.0f / (asfloat(context->rs[D3DRS_FOGEND]) - asfloat(context->rs[D3DRS_FOGSTART])); if (isinf(dst[28].y)) dst[28].y = 0.0f; - dst[28].z = asfloat(state->rs[D3DRS_FOGDENSITY]); + dst[28].z = asfloat(context->rs[D3DRS_FOGDENSITY]); } static void nine_ff_load_tex_matrices(struct NineDevice9 *device) { - struct nine_state *state = &device->state; + struct nine_context *context = &device->context; D3DMATRIX *M = (D3DMATRIX *)device->ff.vs_const; unsigned s; - if (!(state->ff.changed.transform[0] & 0xff0000)) + if (!(context->ff.changed.transform[0] & 0xff0000)) return; for (s = 0; s < 8; ++s) { - if (IS_D3DTS_DIRTY(state, TEXTURE0 + s)) - nine_d3d_matrix_transpose(&M[32 + s], nine_state_access_transform(state, D3DTS_TEXTURE0 + s, FALSE)); + if (IS_D3DTS_DIRTY(context, TEXTURE0 + s)) + nine_d3d_matrix_transpose(&M[32 + s], nine_state_access_transform(&context->ff, D3DTS_TEXTURE0 + s, FALSE)); } } static void nine_ff_load_ps_params(struct NineDevice9 *device) { - const struct nine_state *state = &device->state; + struct nine_context *context = &device->context; struct fvec4 *dst = (struct fvec4 *)device->ff.ps_const; unsigned s; - if (!(state->changed.group & (NINE_STATE_FF_PSSTAGES | NINE_STATE_FF_OTHER))) + if (!(context->changed.group & (NINE_STATE_FF_PSSTAGES | NINE_STATE_FF_OTHER))) return; for (s = 0; s < 8; ++s) - d3dcolor_to_rgba(&dst[s].x, state->ff.tex_stage[s][D3DTSS_CONSTANT]); + d3dcolor_to_rgba(&dst[s].x, context->ff.tex_stage[s][D3DTSS_CONSTANT]); for (s = 0; s < 8; ++s) { - dst[8 + s].x = asfloat(state->ff.tex_stage[s][D3DTSS_BUMPENVMAT00]); - dst[8 + s].y = asfloat(state->ff.tex_stage[s][D3DTSS_BUMPENVMAT01]); - dst[8 + s].z = asfloat(state->ff.tex_stage[s][D3DTSS_BUMPENVMAT10]); - dst[8 + s].w = asfloat(state->ff.tex_stage[s][D3DTSS_BUMPENVMAT11]); + dst[8 + s].x = asfloat(context->ff.tex_stage[s][D3DTSS_BUMPENVMAT00]); + dst[8 + s].y = asfloat(context->ff.tex_stage[s][D3DTSS_BUMPENVMAT01]); + dst[8 + s].z = asfloat(context->ff.tex_stage[s][D3DTSS_BUMPENVMAT10]); + dst[8 + s].w = asfloat(context->ff.tex_stage[s][D3DTSS_BUMPENVMAT11]); if (s & 1) { - dst[16 + s / 2].z = asfloat(state->ff.tex_stage[s][D3DTSS_BUMPENVLSCALE]); - dst[16 + s / 2].w = asfloat(state->ff.tex_stage[s][D3DTSS_BUMPENVLOFFSET]); + dst[16 + s / 2].z = asfloat(context->ff.tex_stage[s][D3DTSS_BUMPENVLSCALE]); + dst[16 + s / 2].w = asfloat(context->ff.tex_stage[s][D3DTSS_BUMPENVLOFFSET]); } else { - dst[16 + s / 2].x = asfloat(state->ff.tex_stage[s][D3DTSS_BUMPENVLSCALE]); - dst[16 + s / 2].y = asfloat(state->ff.tex_stage[s][D3DTSS_BUMPENVLOFFSET]); + dst[16 + s / 2].x = asfloat(context->ff.tex_stage[s][D3DTSS_BUMPENVLSCALE]); + dst[16 + s / 2].y = asfloat(context->ff.tex_stage[s][D3DTSS_BUMPENVLOFFSET]); } } - d3dcolor_to_rgba(&dst[20].x, state->rs[D3DRS_TEXTUREFACTOR]); - d3dcolor_to_rgba(&dst[21].x, state->rs[D3DRS_FOGCOLOR]); - dst[22].x = asfloat(state->rs[D3DRS_FOGEND]); - dst[22].y = 1.0f / (asfloat(state->rs[D3DRS_FOGEND]) - asfloat(state->rs[D3DRS_FOGSTART])); - dst[22].z = asfloat(state->rs[D3DRS_FOGDENSITY]); + d3dcolor_to_rgba(&dst[20].x, context->rs[D3DRS_TEXTUREFACTOR]); + d3dcolor_to_rgba(&dst[21].x, context->rs[D3DRS_FOGCOLOR]); + dst[22].x = asfloat(context->rs[D3DRS_FOGEND]); + dst[22].y = 1.0f / (asfloat(context->rs[D3DRS_FOGEND]) - asfloat(context->rs[D3DRS_FOGSTART])); + dst[22].z = asfloat(context->rs[D3DRS_FOGDENSITY]); } static void nine_ff_load_viewport_info(struct NineDevice9 *device) { - D3DVIEWPORT9 *viewport = &device->state.viewport; + D3DVIEWPORT9 *viewport = &device->context.viewport; struct fvec4 *dst = (struct fvec4 *)device->ff.vs_const; float diffZ = viewport->MaxZ - viewport->MinZ; @@ -1883,29 +2032,29 @@ void nine_ff_update(struct NineDevice9 *device) { - struct nine_state *state = &device->state; + struct nine_context *context = &device->context; struct pipe_constant_buffer cb; - DBG("vs=%p ps=%p\n", device->state.vs, device->state.ps); + DBG("vs=%p ps=%p\n", context->vs, context->ps); /* NOTE: the only reference belongs to the hash table */ - if (!state->programmable_vs) { + if (!context->programmable_vs) { device->ff.vs = nine_ff_get_vs(device); - device->state.changed.group |= NINE_STATE_VS; + context->changed.group |= NINE_STATE_VS; } - if (!device->state.ps) { + if (!context->ps) { device->ff.ps = nine_ff_get_ps(device); - device->state.changed.group |= NINE_STATE_PS; + context->changed.group |= NINE_STATE_PS; } - if (!state->programmable_vs) { + if (!context->programmable_vs) { nine_ff_load_vs_transforms(device); nine_ff_load_tex_matrices(device); nine_ff_load_lights(device); nine_ff_load_point_and_fog_params(device); nine_ff_load_viewport_info(device); - memset(state->ff.changed.transform, 0, sizeof(state->ff.changed.transform)); + memset(context->ff.changed.transform, 0, sizeof(context->ff.changed.transform)); cb.buffer_offset = 0; cb.buffer = NULL; @@ -1913,21 +2062,22 @@ cb.buffer_size = NINE_FF_NUM_VS_CONST * 4 * sizeof(float); if (!device->driver_caps.user_cbufs) { + context->pipe_data.cb_vs_ff.buffer_size = cb.buffer_size; u_upload_data(device->constbuf_uploader, 0, cb.buffer_size, device->constbuf_alignment, cb.user_buffer, - &cb.buffer_offset, - &cb.buffer); + &context->pipe_data.cb_vs_ff.buffer_offset, + &context->pipe_data.cb_vs_ff.buffer); u_upload_unmap(device->constbuf_uploader); - cb.user_buffer = NULL; - } - state->pipe.cb_vs_ff = cb; - state->commit |= NINE_STATE_COMMIT_CONST_VS; + context->pipe_data.cb_vs_ff.user_buffer = NULL; + } else + context->pipe_data.cb_vs_ff = cb; + context->commit |= NINE_STATE_COMMIT_CONST_VS; } - if (!device->state.ps) { + if (!context->ps) { nine_ff_load_ps_params(device); cb.buffer_offset = 0; @@ -1936,21 +2086,22 @@ cb.buffer_size = NINE_FF_NUM_PS_CONST * 4 * sizeof(float); if (!device->driver_caps.user_cbufs) { + context->pipe_data.cb_ps_ff.buffer_size = cb.buffer_size; u_upload_data(device->constbuf_uploader, 0, cb.buffer_size, device->constbuf_alignment, cb.user_buffer, - &cb.buffer_offset, - &cb.buffer); + &context->pipe_data.cb_ps_ff.buffer_offset, + &context->pipe_data.cb_ps_ff.buffer); u_upload_unmap(device->constbuf_uploader); - cb.user_buffer = NULL; - } - state->pipe.cb_ps_ff = cb; - state->commit |= NINE_STATE_COMMIT_CONST_PS; + context->pipe_data.cb_ps_ff.user_buffer = NULL; + } else + context->pipe_data.cb_ps_ff = cb; + context->commit |= NINE_STATE_COMMIT_CONST_PS; } - device->state.changed.group &= ~NINE_STATE_FF; + context->changed.group &= ~NINE_STATE_FF; } @@ -2004,25 +2155,29 @@ static void nine_ff_prune_vs(struct NineDevice9 *device) { + struct nine_context *context = &device->context; + if (device->ff.num_vs > 100) { /* could destroy the bound one here, so unbind */ - device->pipe->bind_vs_state(device->pipe, NULL); + context->pipe->bind_vs_state(context->pipe, NULL); util_hash_table_foreach(device->ff.ht_vs, nine_ff_ht_delete_cb, NULL); util_hash_table_clear(device->ff.ht_vs); device->ff.num_vs = 0; - device->state.changed.group |= NINE_STATE_VS; + context->changed.group |= NINE_STATE_VS; } } static void nine_ff_prune_ps(struct NineDevice9 *device) { + struct nine_context *context = &device->context; + if (device->ff.num_ps > 100) { /* could destroy the bound one here, so unbind */ - device->pipe->bind_fs_state(device->pipe, NULL); + context->pipe->bind_fs_state(context->pipe, NULL); util_hash_table_foreach(device->ff.ht_ps, nine_ff_ht_delete_cb, NULL); util_hash_table_clear(device->ff.ht_ps); device->ff.num_ps = 0; - device->state.changed.group |= NINE_STATE_PS; + context->changed.group |= NINE_STATE_PS; } } @@ -2344,6 +2499,11 @@ M->m[2][0] * D->m[0][2] + M->m[3][0] * D->m[0][3]; + if (det < 1e-30) {/* non inversible */ + *D = *M; /* wine tests */ + return; + } + det = 1.0 / det; for (i = 0; i < 4; i++) @@ -2363,22 +2523,3 @@ } #endif } - -/* TODO: don't use 4x4 inverse, unless this gets all nicely inlined ? */ -void -nine_d3d_matrix_inverse_3x3(D3DMATRIX *D, const D3DMATRIX *M) -{ - D3DMATRIX T; - unsigned i, j; - - for (i = 0; i < 3; ++i) - for (j = 0; j < 3; ++j) - T.m[i][j] = M->m[i][j]; - for (i = 0; i < 3; ++i) { - T.m[i][3] = 0.0f; - T.m[3][i] = 0.0f; - } - T.m[3][3] = 1.0f; - - nine_d3d_matrix_inverse(D, &T); -} diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/nine_ff.h mesa-17.0.7/src/gallium/state_trackers/nine/nine_ff.h --- mesa-12.0.6/src/gallium/state_trackers/nine/nine_ff.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/nine_ff.h 2017-06-01 10:37:10.000000000 +0000 @@ -25,9 +25,6 @@ nine_d3d_matrix_inverse(D3DMATRIX *, const D3DMATRIX *); void -nine_d3d_matrix_inverse_3x3(D3DMATRIX *, const D3DMATRIX *); - -void nine_d3d_matrix_transpose(D3DMATRIX *, const D3DMATRIX *); #define NINED3DTSS_TCI_DISABLE 0 @@ -65,30 +62,30 @@ } static inline uint16_t -nine_ff_get_projected_key(struct nine_state *state) +nine_ff_get_projected_key(struct nine_context *context) { unsigned s, i; uint16_t projected = 0; char input_texture_coord[8]; memset(&input_texture_coord, 0, sizeof(input_texture_coord)); - if (state->vdecl) { - for (i = 0; i < state->vdecl->nelems; i++) { - uint16_t usage = state->vdecl->usage_map[i]; + if (context->vdecl) { + for (i = 0; i < context->vdecl->nelems; i++) { + uint16_t usage = context->vdecl->usage_map[i]; if (usage % NINE_DECLUSAGE_COUNT == NINE_DECLUSAGE_TEXCOORD) { s = usage / NINE_DECLUSAGE_COUNT; if (s < 8) - input_texture_coord[s] = nine_decltype_get_dim(state->vdecl->decls[i].Type); + input_texture_coord[s] = nine_decltype_get_dim(context->vdecl->decls[i].Type); } } } for (s = 0; s < 8; ++s) { - unsigned gen = (state->ff.tex_stage[s][D3DTSS_TEXCOORDINDEX] >> 16) + 1; - unsigned dim = state->ff.tex_stage[s][D3DTSS_TEXTURETRANSFORMFLAGS] & 0x7; - unsigned proj = !!(state->ff.tex_stage[s][D3DTSS_TEXTURETRANSFORMFLAGS] & D3DTTFF_PROJECTED); + unsigned gen = (context->ff.tex_stage[s][D3DTSS_TEXCOORDINDEX] >> 16) + 1; + unsigned dim = context->ff.tex_stage[s][D3DTSS_TEXTURETRANSFORMFLAGS] & 0x7; + unsigned proj = !!(context->ff.tex_stage[s][D3DTSS_TEXTURETRANSFORMFLAGS] & D3DTTFF_PROJECTED); - if (!state->vs) { + if (!context->vs) { if (dim > 4) dim = input_texture_coord[s]; diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/nine_limits.h mesa-17.0.7/src/gallium/state_trackers/nine/nine_limits.h --- mesa-12.0.6/src/gallium/state_trackers/nine/nine_limits.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/nine_limits.h 2017-06-01 10:37:10.000000000 +0000 @@ -208,4 +208,40 @@ return Value; } +struct nine_limits +{ + unsigned min; + unsigned max; +}; + +#define __VALUE_SAMP(o, m, M) \ + [D3DSAMP_##o] = {m, M} + +static const struct nine_limits +sampler_state_limits_table[D3DRS_BLENDOPALPHA + 1] = { + __VALUE_SAMP(ADDRESSU, 1, 5), + __VALUE_SAMP(ADDRESSV, 1, 5), + __VALUE_SAMP(ADDRESSW, 1, 5), + __VALUE_SAMP(BORDERCOLOR, 0, 0xFFFFFFFF), + __VALUE_SAMP(MAGFILTER, 0, 8), /* 4-5 should be forbidden */ + __VALUE_SAMP(MINFILTER, 0, 8), /* same */ + __VALUE_SAMP(MIPFILTER, 0, 8), /* same */ + __VALUE_SAMP(MIPMAPLODBIAS, 0, 0xFFFFFFFF), + __VALUE_SAMP(MAXMIPLEVEL, 0, 0xFFFFFFFF), + __VALUE_SAMP(MAXANISOTROPY, 1, 0xFFFFFFFF), /* Max value should be pCaps->MaxAnisotropy */ + __VALUE_SAMP(SRGBTEXTURE, 0, 1), + __VALUE_SAMP(ELEMENTINDEX, 0, 0xFFFFFFFF), + __VALUE_SAMP(DMAPOFFSET, 0, 0xFFFFFFFF) +}; + +static BOOL inline +nine_check_sampler_state_value(D3DSAMPLERSTATETYPE State, + DWORD Value) +{ + struct nine_limits limit; + + limit = sampler_state_limits_table[State]; + return (limit.min <= Value && Value <= limit.max); +} + #endif /* _NINE_HELPERS_H_ */ diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/nine_lock.c mesa-17.0.7/src/gallium/state_trackers/nine/nine_lock.c --- mesa-12.0.6/src/gallium/state_trackers/nine/nine_lock.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/nine_lock.c 2017-06-01 10:37:10.000000000 +0000 @@ -43,12 +43,25 @@ #include "volumetexture9.h" #include "d3d9.h" +#include "nine_lock.h" #include "os/os_thread.h" /* Global mutex as described by MSDN */ pipe_static_mutex(d3dlock_global); +void +NineLockGlobalMutex() +{ + pipe_mutex_lock(d3dlock_global); +} + +void +NineUnlockGlobalMutex() +{ + pipe_mutex_unlock(d3dlock_global); +} + static HRESULT NINE_WINAPI LockAuthenticatedChannel9_GetCertificateSize( struct NineAuthenticatedChannel9 *This, UINT *pCertificateSize ) @@ -114,7 +127,7 @@ IDirect3DAuthenticatedChannel9Vtbl LockAuthenticatedChannel9_vtable = { (void *)NineUnknown_QueryInterface, (void *)NineUnknown_AddRef, - (void *)NineUnknown_Release, + (void *)NineUnknown_ReleaseWithDtorLock, (void *)LockAuthenticatedChannel9_GetCertificateSize, (void *)LockAuthenticatedChannel9_GetCertificate, (void *)LockAuthenticatedChannel9_NegotiateKeyExchange, @@ -122,56 +135,56 @@ (void *)LockAuthenticatedChannel9_Configure }; -#if 0 static HRESULT NINE_WINAPI -LockResource9_GetDevice( struct NineResource9 *This, - IDirect3DDevice9 **ppDevice ) +LockUnknown_SetPrivateData( struct NineUnknown *This, + REFGUID refguid, + const void *pData, + DWORD SizeOfData, + DWORD Flags ) { HRESULT r; pipe_mutex_lock(d3dlock_global); - r = NineUnknown_GetDevice(NineUnknown(This), ppDevice); + r = NineUnknown_SetPrivateData(This, refguid, pData, SizeOfData, Flags); pipe_mutex_unlock(d3dlock_global); return r; } -#endif static HRESULT NINE_WINAPI -LockResource9_SetPrivateData( struct NineResource9 *This, - REFGUID refguid, - const void *pData, - DWORD SizeOfData, - DWORD Flags ) +LockUnknown_GetPrivateData( struct NineUnknown *This, + REFGUID refguid, + void *pData, + DWORD *pSizeOfData ) { HRESULT r; pipe_mutex_lock(d3dlock_global); - r = NineResource9_SetPrivateData(This, refguid, pData, SizeOfData, Flags); + r = NineUnknown_GetPrivateData(This, refguid, pData, pSizeOfData); pipe_mutex_unlock(d3dlock_global); return r; } static HRESULT NINE_WINAPI -LockResource9_GetPrivateData( struct NineResource9 *This, - REFGUID refguid, - void *pData, - DWORD *pSizeOfData ) +LockUnknown_FreePrivateData( struct NineUnknown *This, + REFGUID refguid ) { HRESULT r; pipe_mutex_lock(d3dlock_global); - r = NineResource9_GetPrivateData(This, refguid, pData, pSizeOfData); + r = NineUnknown_FreePrivateData(This, refguid); pipe_mutex_unlock(d3dlock_global); return r; } +#if 0 static HRESULT NINE_WINAPI -LockResource9_FreePrivateData( struct NineResource9 *This, - REFGUID refguid ) +LockResource9_GetDevice( struct NineResource9 *This, + IDirect3DDevice9 **ppDevice ) { HRESULT r; pipe_mutex_lock(d3dlock_global); - r = NineResource9_FreePrivateData(This, refguid); + r = NineUnknown_GetDevice(NineUnknown(This), ppDevice); pipe_mutex_unlock(d3dlock_global); return r; } +#endif static DWORD NINE_WINAPI LockResource9_SetPriority( struct NineResource9 *This, @@ -398,7 +411,7 @@ IDirect3DCryptoSession9Vtbl LockCryptoSession9_vtable = { (void *)NineUnknown_QueryInterface, (void *)NineUnknown_AddRef, - (void *)NineUnknown_Release, + (void *)NineUnknown_ReleaseWithDtorLock, (void *)LockCryptoSession9_GetCertificateSize, (void *)LockCryptoSession9_GetCertificate, (void *)LockCryptoSession9_NegotiateKeyExchange, @@ -481,11 +494,11 @@ IDirect3DCubeTexture9Vtbl LockCubeTexture9_vtable = { (void *)NineUnknown_QueryInterface, (void *)NineUnknown_AddRef, - (void *)NineUnknown_Release, + (void *)NineUnknown_ReleaseWithDtorLock, (void *)NineUnknown_GetDevice, /* actually part of Resource9 iface */ - (void *)LockResource9_SetPrivateData, - (void *)LockResource9_GetPrivateData, - (void *)LockResource9_FreePrivateData, + (void *)LockUnknown_SetPrivateData, + (void *)LockUnknown_GetPrivateData, + (void *)LockUnknown_FreePrivateData, (void *)LockResource9_SetPriority, (void *)LockResource9_GetPriority, (void *)LockBaseTexture9_PreLoad, @@ -1943,7 +1956,7 @@ IDirect3DDevice9Vtbl LockDevice9_vtable = { (void *)NineUnknown_QueryInterface, (void *)NineUnknown_AddRef, - (void *)NineUnknown_Release, + (void *)NineUnknown_ReleaseWithDtorLock, (void *)LockDevice9_TestCooperativeLevel, (void *)LockDevice9_GetAvailableTextureMem, (void *)LockDevice9_EvictManagedResources, @@ -2270,7 +2283,7 @@ IDirect3DDevice9ExVtbl LockDevice9Ex_vtable = { (void *)NineUnknown_QueryInterface, (void *)NineUnknown_AddRef, - (void *)NineUnknown_Release, + (void *)NineUnknown_ReleaseWithDtorLock, (void *)LockDevice9_TestCooperativeLevel, (void *)LockDevice9_GetAvailableTextureMem, (void *)LockDevice9_EvictManagedResources, @@ -2447,7 +2460,7 @@ IDirect3DDevice9VideoVtbl LockDevice9Video_vtable = { (void *)NineUnknown_QueryInterface, (void *)NineUnknown_AddRef, - (void *)NineUnknown_Release, + (void *)NineUnknown_ReleaseWithDtorLock, (void *)LockDevice9Video_GetContentProtectionCaps, (void *)LockDevice9Video_CreateAuthenticatedChannel, (void *)LockDevice9Video_CreateCryptoSession @@ -2493,11 +2506,11 @@ IDirect3DIndexBuffer9Vtbl LockIndexBuffer9_vtable = { (void *)NineUnknown_QueryInterface, (void *)NineUnknown_AddRef, - (void *)NineUnknown_Release, + (void *)NineUnknown_ReleaseWithDtorLock, (void *)NineUnknown_GetDevice, /* actually part of Resource9 iface */ - (void *)LockResource9_SetPrivateData, - (void *)LockResource9_GetPrivateData, - (void *)LockResource9_FreePrivateData, + (void *)LockUnknown_SetPrivateData, + (void *)LockUnknown_GetPrivateData, + (void *)LockUnknown_FreePrivateData, (void *)LockResource9_SetPriority, (void *)LockResource9_GetPriority, (void *)NineResource9_PreLoad, /* nop */ @@ -2535,7 +2548,7 @@ IDirect3DPixelShader9Vtbl LockPixelShader9_vtable = { (void *)NineUnknown_QueryInterface, (void *)NineUnknown_AddRef, - (void *)NineUnknown_Release, + (void *)NineUnknown_ReleaseWithDtorLock, (void *)NineUnknown_GetDevice, (void *)LockPixelShader9_GetFunction }; @@ -2604,7 +2617,7 @@ IDirect3DQuery9Vtbl LockQuery9_vtable = { (void *)NineUnknown_QueryInterface, (void *)NineUnknown_AddRef, - (void *)NineUnknown_Release, + (void *)NineUnknown_ReleaseWithDtorLock, (void *)NineUnknown_GetDevice, /* actually part of Query9 iface */ (void *)NineQuery9_GetType, /* immutable */ (void *)NineQuery9_GetDataSize, /* immutable */ @@ -2648,7 +2661,7 @@ IDirect3DStateBlock9Vtbl LockStateBlock9_vtable = { (void *)NineUnknown_QueryInterface, (void *)NineUnknown_AddRef, - (void *)NineUnknown_Release, + (void *)NineUnknown_ReleaseWithDtorLock, (void *)NineUnknown_GetDevice, /* actually part of StateBlock9 iface */ (void *)LockStateBlock9_Capture, (void *)LockStateBlock9_Apply @@ -2727,11 +2740,11 @@ IDirect3DSurface9Vtbl LockSurface9_vtable = { (void *)NineUnknown_QueryInterface, (void *)NineUnknown_AddRef, - (void *)NineUnknown_Release, + (void *)NineUnknown_ReleaseWithDtorLock, (void *)NineUnknown_GetDevice, /* actually part of Resource9 iface */ - (void *)LockResource9_SetPrivateData, - (void *)LockResource9_GetPrivateData, - (void *)LockResource9_FreePrivateData, + (void *)LockUnknown_SetPrivateData, + (void *)LockUnknown_GetPrivateData, + (void *)LockUnknown_FreePrivateData, (void *)LockResource9_SetPriority, (void *)LockResource9_GetPriority, (void *)NineResource9_PreLoad, /* nop */ @@ -2832,7 +2845,7 @@ IDirect3DSwapChain9Vtbl LockSwapChain9_vtable = { (void *)NineUnknown_QueryInterface, (void *)NineUnknown_AddRef, - (void *)NineUnknown_Release, + (void *)NineUnknown_ReleaseWithDtorLock, (void *)LockSwapChain9_Present, (void *)LockSwapChain9_GetFrontBufferData, (void *)LockSwapChain9_GetBackBuffer, @@ -2879,7 +2892,7 @@ IDirect3DSwapChain9ExVtbl LockSwapChain9Ex_vtable = { (void *)NineUnknown_QueryInterface, (void *)NineUnknown_AddRef, - (void *)NineUnknown_Release, + (void *)NineUnknown_ReleaseWithDtorLock, (void *)LockSwapChain9_Present, (void *)LockSwapChain9_GetFrontBufferData, (void *)LockSwapChain9_GetBackBuffer, @@ -2959,11 +2972,11 @@ IDirect3DTexture9Vtbl LockTexture9_vtable = { (void *)NineUnknown_QueryInterface, (void *)NineUnknown_AddRef, - (void *)NineUnknown_Release, + (void *)NineUnknown_ReleaseWithDtorLock, (void *)NineUnknown_GetDevice, /* actually part of Resource9 iface */ - (void *)LockResource9_SetPrivateData, - (void *)LockResource9_GetPrivateData, - (void *)LockResource9_FreePrivateData, + (void *)LockUnknown_SetPrivateData, + (void *)LockUnknown_GetPrivateData, + (void *)LockUnknown_FreePrivateData, (void *)LockResource9_SetPriority, (void *)LockResource9_GetPriority, (void *)LockBaseTexture9_PreLoad, @@ -3021,11 +3034,11 @@ IDirect3DVertexBuffer9Vtbl LockVertexBuffer9_vtable = { (void *)NineUnknown_QueryInterface, (void *)NineUnknown_AddRef, - (void *)NineUnknown_Release, + (void *)NineUnknown_ReleaseWithDtorLock, (void *)NineUnknown_GetDevice, /* actually part of Resource9 iface */ - (void *)LockResource9_SetPrivateData, - (void *)LockResource9_GetPrivateData, - (void *)LockResource9_FreePrivateData, + (void *)LockUnknown_SetPrivateData, + (void *)LockUnknown_GetPrivateData, + (void *)LockUnknown_FreePrivateData, (void *)LockResource9_SetPriority, (void *)LockResource9_GetPriority, (void *)NineResource9_PreLoad, /* nop */ @@ -3063,7 +3076,7 @@ IDirect3DVertexDeclaration9Vtbl LockVertexDeclaration9_vtable = { (void *)NineUnknown_QueryInterface, (void *)NineUnknown_AddRef, - (void *)NineUnknown_Release, + (void *)NineUnknown_ReleaseWithDtorLock, (void *)NineUnknown_GetDevice, /* actually part of VertexDecl9 iface */ (void *)LockVertexDeclaration9_GetDeclaration }; @@ -3096,7 +3109,7 @@ IDirect3DVertexShader9Vtbl LockVertexShader9_vtable = { (void *)NineUnknown_QueryInterface, (void *)NineUnknown_AddRef, - (void *)NineUnknown_Release, + (void *)NineUnknown_ReleaseWithDtorLock, (void *)NineUnknown_GetDevice, (void *)LockVertexShader9_GetFunction }; @@ -3115,44 +3128,6 @@ #endif static HRESULT NINE_WINAPI -LockVolume9_SetPrivateData( struct NineVolume9 *This, - REFGUID refguid, - const void *pData, - DWORD SizeOfData, - DWORD Flags ) -{ - HRESULT r; - pipe_mutex_lock(d3dlock_global); - r = NineVolume9_SetPrivateData(This, refguid, pData, SizeOfData, Flags); - pipe_mutex_unlock(d3dlock_global); - return r; -} - -static HRESULT NINE_WINAPI -LockVolume9_GetPrivateData( struct NineVolume9 *This, - REFGUID refguid, - void *pData, - DWORD *pSizeOfData ) -{ - HRESULT r; - pipe_mutex_lock(d3dlock_global); - r = NineVolume9_GetPrivateData(This, refguid, pData, pSizeOfData); - pipe_mutex_unlock(d3dlock_global); - return r; -} - -static HRESULT NINE_WINAPI -LockVolume9_FreePrivateData( struct NineVolume9 *This, - REFGUID refguid ) -{ - HRESULT r; - pipe_mutex_lock(d3dlock_global); - r = NineVolume9_FreePrivateData(This, refguid); - pipe_mutex_unlock(d3dlock_global); - return r; -} - -static HRESULT NINE_WINAPI LockVolume9_GetContainer( struct NineVolume9 *This, REFIID riid, void **ppContainer ) @@ -3203,11 +3178,11 @@ IDirect3DVolume9Vtbl LockVolume9_vtable = { (void *)NineUnknown_QueryInterface, (void *)NineUnknown_AddRef, - (void *)NineUnknown_Release, + (void *)NineUnknown_ReleaseWithDtorLock, (void *)NineUnknown_GetDevice, /* actually part of Volume9 iface */ - (void *)LockVolume9_SetPrivateData, - (void *)LockVolume9_GetPrivateData, - (void *)LockVolume9_FreePrivateData, + (void *)NineUnknown_SetPrivateData, + (void *)NineUnknown_GetPrivateData, + (void *)NineUnknown_FreePrivateData, (void *)LockVolume9_GetContainer, (void *)NineVolume9_GetDesc, /* immutable */ (void *)LockVolume9_LockBox, @@ -3281,11 +3256,11 @@ IDirect3DVolumeTexture9Vtbl LockVolumeTexture9_vtable = { (void *)NineUnknown_QueryInterface, (void *)NineUnknown_AddRef, - (void *)NineUnknown_Release, + (void *)NineUnknown_ReleaseWithDtorLock, (void *)NineUnknown_GetDevice, /* actually part of Resource9 iface */ - (void *)LockResource9_SetPrivateData, - (void *)LockResource9_GetPrivateData, - (void *)LockResource9_FreePrivateData, + (void *)LockUnknown_SetPrivateData, + (void *)LockUnknown_GetPrivateData, + (void *)LockUnknown_FreePrivateData, (void *)LockResource9_SetPriority, (void *)LockResource9_GetPriority, (void *)LockBaseTexture9_PreLoad, diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/nine_lock.h mesa-17.0.7/src/gallium/state_trackers/nine/nine_lock.h --- mesa-12.0.6/src/gallium/state_trackers/nine/nine_lock.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/nine_lock.h 2017-06-01 10:37:10.000000000 +0000 @@ -48,4 +48,7 @@ extern IDirect3DVolumeTexture9Vtbl LockVolumeTexture9_vtable; extern ID3DAdapter9Vtbl LockAdapter9_vtable; +void NineLockGlobalMutex(void); +void NineUnlockGlobalMutex(void); + #endif /* _NINE_LOCK_H_ */ diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/nine_pdata.h mesa-17.0.7/src/gallium/state_trackers/nine/nine_pdata.h --- mesa-12.0.6/src/gallium/state_trackers/nine/nine_pdata.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/nine_pdata.h 2017-06-01 10:37:10.000000000 +0000 @@ -7,7 +7,6 @@ boolean unknown; GUID guid; DWORD size; - char data[1]; }; static int @@ -36,8 +35,9 @@ void *data ) { struct pheader *header = value; + void *header_data = (void *)header + sizeof(*header); - if (header->unknown) { IUnknown_Release(*(IUnknown **)header->data); } + if (header->unknown) { IUnknown_Release(*(IUnknown **)header_data); } FREE(header); return PIPE_OK; diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/nine_pipe.c mesa-17.0.7/src/gallium/state_trackers/nine/nine_pipe.c --- mesa-12.0.6/src/gallium/state_trackers/nine/nine_pipe.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/nine_pipe.c 2017-06-01 10:37:10.000000000 +0000 @@ -70,7 +70,9 @@ } void -nine_convert_rasterizer_state(struct pipe_rasterizer_state *rast_state, const DWORD *rs) +nine_convert_rasterizer_state(struct NineDevice9 *device, + struct pipe_rasterizer_state *rast_state, + const DWORD *rs) { struct pipe_rasterizer_state rast; @@ -120,14 +122,12 @@ /* offset_units has the ogl/d3d11 meaning. * d3d9: offset = scale * dz + bias * ogl/d3d11: offset = scale * dz + r * bias - * with r implementation dependant and is supposed to be - * the smallest value the depth buffer format can hold. - * In practice on current and past hw it seems to be 2^-23 - * for all formats except float formats where it varies depending - * on the content. - * For now use 1 << 23, but in the future perhaps add a way in gallium - * to get r for the format or get the gallium behaviour */ - rast.offset_units = asfloat(rs[D3DRS_DEPTHBIAS]) * (float)(1 << 23); + * with r implementation dependent (+ different formula for float depth + * buffers). r=2^-23 is often the right value for gallium drivers. + * If possible, use offset_units_unscaled, which gives the d3d9 + * behaviour, else scale by 1 << 23 */ + rast.offset_units = asfloat(rs[D3DRS_DEPTHBIAS]) * (device->driver_caps.offset_units_unscaled ? 1.0f : (float)(1 << 23)); + rast.offset_units_unscaled = device->driver_caps.offset_units_unscaled; rast.offset_scale = asfloat(rs[D3DRS_SLOPESCALEDEPTHBIAS]); /* rast.offset_clamp = 0.0f; */ @@ -220,9 +220,17 @@ samp.min_mip_filter = PIPE_TEX_MIPFILTER_NONE; } samp.max_lod = 15.0f; - samp.wrap_s = d3dtextureaddress_to_pipe_tex_wrap(ss[D3DSAMP_ADDRESSU]); - samp.wrap_t = d3dtextureaddress_to_pipe_tex_wrap(ss[D3DSAMP_ADDRESSV]); - samp.wrap_r = d3dtextureaddress_to_pipe_tex_wrap(ss[D3DSAMP_ADDRESSW]); + + if (ss[NINED3DSAMP_CUBETEX]) { + /* Cube textures are always clamped to edge on D3D */ + samp.wrap_s = PIPE_TEX_WRAP_CLAMP_TO_EDGE; + samp.wrap_t = PIPE_TEX_WRAP_CLAMP_TO_EDGE; + samp.wrap_r = PIPE_TEX_WRAP_CLAMP_TO_EDGE; + } else { + samp.wrap_s = d3dtextureaddress_to_pipe_tex_wrap(ss[D3DSAMP_ADDRESSU]); + samp.wrap_t = d3dtextureaddress_to_pipe_tex_wrap(ss[D3DSAMP_ADDRESSV]); + samp.wrap_r = d3dtextureaddress_to_pipe_tex_wrap(ss[D3DSAMP_ADDRESSW]); + } samp.min_img_filter = (ss[D3DSAMP_MINFILTER] == D3DTEXF_POINT && !ss[NINED3DSAMP_SHADOW]) ? PIPE_TEX_FILTER_NEAREST : PIPE_TEX_FILTER_LINEAR; samp.mag_img_filter = (ss[D3DSAMP_MAGFILTER] == D3DTEXF_POINT && !ss[NINED3DSAMP_SHADOW]) ? PIPE_TEX_FILTER_NEAREST : PIPE_TEX_FILTER_LINEAR; if (ss[D3DSAMP_MINFILTER] == D3DTEXF_ANISOTROPIC || @@ -231,7 +239,7 @@ samp.compare_mode = ss[NINED3DSAMP_SHADOW] ? PIPE_TEX_COMPARE_R_TO_TEXTURE : PIPE_TEX_COMPARE_NONE; samp.compare_func = PIPE_FUNC_LEQUAL; samp.normalized_coords = 1; - samp.seamless_cube_map = 1; + samp.seamless_cube_map = 0; d3dcolor_to_pipe_color_union(&samp.border_color, ss[D3DSAMP_BORDERCOLOR]); /* see nine_state.h */ @@ -241,28 +249,6 @@ cso_single_sampler(ctx, PIPE_SHADER_VERTEX, idx - NINE_SAMPLER_VS(0), &samp); } -void -nine_pipe_context_clear(struct NineDevice9 *This) -{ - struct pipe_context *pipe = This->pipe; - struct cso_context *cso = This->cso; - pipe->bind_vs_state(pipe, NULL); - pipe->bind_fs_state(pipe, NULL); - - /* Don't unbind constant buffers, they're device-private and - * do not change on Reset. - */ - - cso_set_samplers(cso, PIPE_SHADER_VERTEX, 0, NULL); - cso_set_samplers(cso, PIPE_SHADER_FRAGMENT, 0, NULL); - - cso_set_sampler_views(cso, PIPE_SHADER_VERTEX, 0, NULL); - cso_set_sampler_views(cso, PIPE_SHADER_FRAGMENT, 0, NULL); - - pipe->set_vertex_buffers(pipe, 0, This->caps.MaxStreams, NULL); - pipe->set_index_buffer(pipe, NULL); -} - const enum pipe_format nine_d3d9_to_pipe_format_map[120] = { [D3DFMT_UNKNOWN] = PIPE_FORMAT_NONE, diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/nine_pipe.h mesa-17.0.7/src/gallium/state_trackers/nine/nine_pipe.h --- mesa-12.0.6/src/gallium/state_trackers/nine/nine_pipe.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/nine_pipe.h 2017-06-01 10:37:10.000000000 +0000 @@ -38,11 +38,11 @@ extern const D3DFORMAT nine_pipe_to_d3d9_format_map[PIPE_FORMAT_COUNT]; void nine_convert_dsa_state(struct pipe_depth_stencil_alpha_state *, const DWORD *); -void nine_convert_rasterizer_state(struct pipe_rasterizer_state *, const DWORD *); +void nine_convert_rasterizer_state(struct NineDevice9 *, struct pipe_rasterizer_state *, const DWORD *); void nine_convert_blend_state(struct pipe_blend_state *, const DWORD *); void nine_convert_sampler_state(struct cso_context *, int idx, const DWORD *); -void nine_pipe_context_clear(struct NineDevice9 *); +#define is_ATI1_ATI2(format) (format == PIPE_FORMAT_RGTC1_UNORM || format == PIPE_FORMAT_RGTC2_UNORM) static inline void rect_to_pipe_box(struct pipe_box *dst, const RECT *src) @@ -239,8 +239,7 @@ case D3DFMT_D32F_LOCKABLE: case D3DFMT_D16_LOCKABLE: case D3DFMT_D32_LOCKABLE: - return PIPE_BIND_DEPTH_STENCIL | PIPE_BIND_TRANSFER_READ | - PIPE_BIND_TRANSFER_WRITE; + return PIPE_BIND_DEPTH_STENCIL; case D3DFMT_DF16: case D3DFMT_DF24: case D3DFMT_INTZ: @@ -331,6 +330,7 @@ case D3DFMT_D24X8: if (format_check_internal(PIPE_FORMAT_Z24X8_UNORM)) return PIPE_FORMAT_Z24X8_UNORM; + break; /* Support for X8L8V8U8 bumpenvmap format with lighting bits. * X8L8V8U8 is commonly supported among dx9 cards. * To avoid precision loss, we use PIPE_FORMAT_R32G32B32X32_FLOAT, @@ -346,6 +346,61 @@ return PIPE_FORMAT_NONE; } +/* The quality levels are vendor dependent, so we set our own. + * Every quality level has its own sample count and sample + * position matrix. + * The exact mapping might differ from system to system but thats OK, + * as there's no way to gather more information about quality levels + * in D3D9. + * In case of NONMASKABLE multisample map every quality-level + * to a MASKABLE MultiSampleType: + * 0: no MSAA + * 1: 2x MSAA + * 2: 4x MSAA + * ... + * If the requested quality level is not available to nearest + * matching quality level is used. + * If no multisample is available the function sets + * multisample to D3DMULTISAMPLE_NONE and returns zero. + */ +static inline HRESULT +d3dmultisample_type_check(struct pipe_screen *screen, + D3DFORMAT format, + D3DMULTISAMPLE_TYPE *multisample, + DWORD multisamplequality, + DWORD *levels) +{ + unsigned bind, i; + + assert(multisample); + + if (levels) + *levels = 1; + + if (*multisample == D3DMULTISAMPLE_NONMASKABLE) { + if (depth_stencil_format(format)) + bind = d3d9_get_pipe_depth_format_bindings(format); + else /* render-target */ + bind = PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_RENDER_TARGET; + + *multisample = 0; + for (i = D3DMULTISAMPLE_2_SAMPLES; i < D3DMULTISAMPLE_16_SAMPLES && + multisamplequality; ++i) { + if (d3d9_to_pipe_format_checked(screen, format, PIPE_TEXTURE_2D, + i, bind, FALSE, FALSE) != PIPE_FORMAT_NONE) { + multisamplequality--; + if (levels) + (*levels)++; + *multisample = i; + } + } + } + /* Make sure to get an exact match */ + if (multisamplequality) + return D3DERR_INVALIDCALL; + return D3D_OK; +} + static inline const char * d3dformat_to_string(D3DFORMAT fmt) { @@ -728,8 +783,16 @@ w = u_minify(width, level); h = u_minify(height, level); - size = nine_format_get_stride(format, w) * - util_format_get_nblocksy(format, h); + if (is_ATI1_ATI2(format)) { + /* For "unknown" formats like ATIx use width * height bytes */ + size = w * h; + } else if (format == PIPE_FORMAT_NONE) { /* D3DFMT_NULL */ + size = w * h * 4; + } else { + size = nine_format_get_stride(format, w) * + util_format_get_nblocksy(format, h); + } + return size; } @@ -745,8 +808,13 @@ w = u_minify(width, l); h = u_minify(height, l); offsets[l] = size; - size += nine_format_get_stride(format, w) * - util_format_get_nblocksy(format, h); + if (is_ATI1_ATI2(format)) { + /* For "unknown" formats like ATIx use width * height bytes */ + size += w * h; + } else { + size += nine_format_get_stride(format, w) * + util_format_get_nblocksy(format, h); + } } return size; diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/nine_queue.c mesa-17.0.7/src/gallium/state_trackers/nine/nine_queue.c --- mesa-12.0.6/src/gallium/state_trackers/nine/nine_queue.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/nine_queue.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,275 @@ +/* + * Copyright 2016 Patrick Rudolph + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "nine_queue.h" +#include "os/os_thread.h" +#include "util/macros.h" +#include "nine_helpers.h" + +#define NINE_CMD_BUF_INSTR (256) + +#define NINE_CMD_BUFS (32) +#define NINE_CMD_BUFS_MASK (NINE_CMD_BUFS - 1) + +#define NINE_QUEUE_SIZE (8192 * 16 + 128) + +#define DBG_CHANNEL DBG_DEVICE + +/* + * Single producer - single consumer pool queue + * + * Producer: + * Calls nine_queue_alloc to get a slice of memory in current cmdbuf. + * Calls nine_queue_flush to flush the queue by request. + * The queue is flushed automatically on insufficient space or once the + * cmdbuf contains NINE_CMD_BUF_INSTR instructions. + * + * nine_queue_flush does block, while nine_queue_alloc doesn't block. + * + * nine_queue_alloc returns NULL on insufficent space. + * + * Consumer: + * Calls nine_queue_wait_flush to wait for a cmdbuf. + * After waiting for a cmdbuf it calls nine_queue_get until NULL is returned. + * + * nine_queue_wait_flush does block, while nine_queue_get doesn't block. + * + * Constrains: + * Only a single consumer and a single producer are supported. + * + */ + +struct nine_cmdbuf { + unsigned instr_size[NINE_CMD_BUF_INSTR]; + unsigned num_instr; + unsigned offset; + void *mem_pool; + BOOL full; +}; + +struct nine_queue_pool { + struct nine_cmdbuf pool[NINE_CMD_BUFS]; + unsigned head; + unsigned tail; + unsigned cur_instr; + BOOL worker_wait; + pipe_condvar event_pop; + pipe_condvar event_push; + pipe_mutex mutex_pop; + pipe_mutex mutex_push; +}; + +/* Consumer functions: */ +void +nine_queue_wait_flush(struct nine_queue_pool* ctx) +{ + struct nine_cmdbuf *cmdbuf = &ctx->pool[ctx->tail]; + + /* wait for cmdbuf full */ + pipe_mutex_lock(ctx->mutex_push); + while (!cmdbuf->full) + { + DBG("waiting for full cmdbuf\n"); + pipe_condvar_wait(ctx->event_push, ctx->mutex_push); + } + DBG("got cmdbuf=%p\n", cmdbuf); + pipe_mutex_unlock(ctx->mutex_push); + + cmdbuf->offset = 0; + ctx->cur_instr = 0; +} + +/* Gets a pointer to the next memory slice. + * Does not block. + * Returns NULL on empty cmdbuf. */ +void * +nine_queue_get(struct nine_queue_pool* ctx) +{ + struct nine_cmdbuf *cmdbuf = &ctx->pool[ctx->tail]; + unsigned offset; + + /* At this pointer there's always a cmdbuf. */ + + if (ctx->cur_instr == cmdbuf->num_instr) { + /* signal waiting producer */ + pipe_mutex_lock(ctx->mutex_pop); + DBG("freeing cmdbuf=%p\n", cmdbuf); + cmdbuf->full = 0; + pipe_condvar_signal(ctx->event_pop); + pipe_mutex_unlock(ctx->mutex_pop); + + ctx->tail = (ctx->tail + 1) & NINE_CMD_BUFS_MASK; + + return NULL; + } + + /* At this pointer there's always a cmdbuf with instruction to process. */ + offset = cmdbuf->offset; + cmdbuf->offset += cmdbuf->instr_size[ctx->cur_instr]; + ctx->cur_instr ++; + + return cmdbuf->mem_pool + offset; +} + +/* Producer functions: */ + +/* Flushes the queue. + * Moves the current cmdbuf to worker thread. + * Blocks until next cmdbuf is free. */ +void +nine_queue_flush(struct nine_queue_pool* ctx) +{ + struct nine_cmdbuf *cmdbuf = &ctx->pool[ctx->head]; + + DBG("flushing cmdbuf=%p instr=%d size=%d\n", + cmdbuf, cmdbuf->num_instr, cmdbuf->offset); + + /* Nothing to flush */ + if (!cmdbuf->num_instr) + return; + + /* signal waiting worker */ + pipe_mutex_lock(ctx->mutex_push); + cmdbuf->full = 1; + pipe_condvar_signal(ctx->event_push); + pipe_mutex_unlock(ctx->mutex_push); + + ctx->head = (ctx->head + 1) & NINE_CMD_BUFS_MASK; + + cmdbuf = &ctx->pool[ctx->head]; + + /* wait for queue empty */ + pipe_mutex_lock(ctx->mutex_pop); + while (cmdbuf->full) + { + DBG("waiting for empty cmdbuf\n"); + pipe_condvar_wait(ctx->event_pop, ctx->mutex_pop); + } + DBG("got empty cmdbuf=%p\n", cmdbuf); + pipe_mutex_unlock(ctx->mutex_pop); + cmdbuf->offset = 0; + cmdbuf->num_instr = 0; +} + +/* Gets a a pointer to slice of memory with size @space. + * Does block if queue is full. + * Returns NULL on @space > NINE_QUEUE_SIZE. */ +void * +nine_queue_alloc(struct nine_queue_pool* ctx, unsigned space) +{ + unsigned offset; + struct nine_cmdbuf *cmdbuf = &ctx->pool[ctx->head]; + + if (space > NINE_QUEUE_SIZE) + return NULL; + + /* at this pointer there's always a free queue available */ + + if ((cmdbuf->offset + space > NINE_QUEUE_SIZE) || + (cmdbuf->num_instr == NINE_CMD_BUF_INSTR)) { + + nine_queue_flush(ctx); + + cmdbuf = &ctx->pool[ctx->head]; + } + + DBG("cmdbuf=%p space=%d\n", cmdbuf, space); + + /* at this pointer there's always a free queue with sufficient space available */ + + offset = cmdbuf->offset; + cmdbuf->offset += space; + cmdbuf->instr_size[cmdbuf->num_instr] = space; + cmdbuf->num_instr ++; + + return cmdbuf->mem_pool + offset; +} + +/* Returns the current queue flush state. + * TRUE nothing flushed + * FALSE one ore more instructions queued flushed. */ +bool +nine_queue_no_flushed_work(struct nine_queue_pool* ctx) +{ + return (ctx->tail == ctx->head); +} + +/* Returns the current queue empty state. + * TRUE no instructions queued. + * FALSE one ore more instructions queued. */ +bool +nine_queue_isempty(struct nine_queue_pool* ctx) +{ + struct nine_cmdbuf *cmdbuf = &ctx->pool[ctx->head]; + + return (ctx->tail == ctx->head) && !cmdbuf->num_instr; +} + +struct nine_queue_pool* +nine_queue_create(void) +{ + unsigned i; + struct nine_queue_pool *ctx; + + ctx = CALLOC_STRUCT(nine_queue_pool); + if (!ctx) + goto failed; + + for (i = 0; i < NINE_CMD_BUFS; i++) { + ctx->pool[i].mem_pool = MALLOC(NINE_QUEUE_SIZE); + if (!ctx->pool[i].mem_pool) + goto failed; + } + + pipe_condvar_init(ctx->event_pop); + pipe_mutex_init(ctx->mutex_pop); + + pipe_condvar_init(ctx->event_push); + pipe_mutex_init(ctx->mutex_push); + + /* Block until first cmdbuf has been flushed. */ + ctx->worker_wait = TRUE; + + return ctx; +failed: + if (ctx) { + for (i = 0; i < NINE_CMD_BUFS; i++) { + if (ctx->pool[i].mem_pool) + FREE(ctx->pool[i].mem_pool); + } + FREE(ctx); + } + return NULL; +} + +void +nine_queue_delete(struct nine_queue_pool *ctx) +{ + unsigned i; + pipe_mutex_destroy(ctx->mutex_pop); + pipe_mutex_destroy(ctx->mutex_push); + + for (i = 0; i < NINE_CMD_BUFS; i++) + FREE(ctx->pool[i].mem_pool); + + FREE(ctx); +} diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/nine_queue.h mesa-17.0.7/src/gallium/state_trackers/nine/nine_queue.h --- mesa-12.0.6/src/gallium/state_trackers/nine/nine_queue.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/nine_queue.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,54 @@ +/* + * Copyright 2016 Patrick Rudolph + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef _NINE_QUEUE_H_ +#define _NINE_QUEUE_H_ + +#include "pipe/p_compiler.h" + +struct nine_queue_pool; + +void +nine_queue_wait_flush(struct nine_queue_pool* ctx); + +void * +nine_queue_get(struct nine_queue_pool* ctx); + +void +nine_queue_flush(struct nine_queue_pool* ctx); + +void * +nine_queue_alloc(struct nine_queue_pool* ctx, unsigned space); + +bool +nine_queue_no_flushed_work(struct nine_queue_pool* ctx); + +bool +nine_queue_isempty(struct nine_queue_pool* ctx); + +struct nine_queue_pool* +nine_queue_create(void); + +void +nine_queue_delete(struct nine_queue_pool *ctx); + +#endif /* _NINE_QUEUE_H_ */ diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/nine_shader.c mesa-17.0.7/src/gallium/state_trackers/nine/nine_shader.c --- mesa-12.0.6/src/gallium/state_trackers/nine/nine_shader.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/nine_shader.c 2017-06-01 10:37:10.000000000 +0000 @@ -26,6 +26,7 @@ #include "device9.h" #include "nine_debug.h" #include "nine_state.h" +#include "vertexdeclaration9.h" #include "util/macros.h" #include "util/u_memory.h" @@ -432,11 +433,7 @@ { INT idx; struct ureg_src reg; - union { - boolean b; - float f[4]; - int32_t i[4]; - } imm; + float f[4]; /* for indirect addressing of float constants */ }; struct shader_translator @@ -471,12 +468,14 @@ struct { struct ureg_dst *r; struct ureg_dst oPos; + struct ureg_dst oPos_out; /* the real output when doing streamout */ struct ureg_dst oFog; struct ureg_dst oPts; struct ureg_dst oCol[4]; struct ureg_dst o[PIPE_MAX_SHADER_OUTPUTS]; struct ureg_dst oDepth; struct ureg_src v[PIPE_MAX_SHADER_INPUTS]; + struct ureg_src v_consecutive; /* copy in temp array of ps inputs for rel addressing */ struct ureg_src vPos; struct ureg_src vFace; struct ureg_src s; @@ -506,12 +505,17 @@ struct sm1_local_const *lconstf; unsigned num_lconstf; - struct sm1_local_const lconsti[NINE_MAX_CONST_I]; - struct sm1_local_const lconstb[NINE_MAX_CONST_B]; + struct sm1_local_const *lconsti; + unsigned num_lconsti; + struct sm1_local_const *lconstb; + unsigned num_lconstb; boolean indirect_const_access; boolean failure; + struct nine_vs_output_info output_info[16]; + int num_outputs; + struct nine_shader_info *info; int16_t op_info_map[D3DSIO_BREAKP + 1]; @@ -537,10 +541,22 @@ } } +static void +nine_record_outputs(struct shader_translator *tx, BYTE Usage, BYTE UsageIndex, + int mask, int output_index) +{ + tx->output_info[tx->num_outputs].output_semantic = Usage; + tx->output_info[tx->num_outputs].output_semantic_index = UsageIndex; + tx->output_info[tx->num_outputs].mask = mask; + tx->output_info[tx->num_outputs].output_index = output_index; + tx->num_outputs++; +} + static boolean tx_lconstf(struct shader_translator *tx, struct ureg_src *src, INT index) { INT i; + if (index < 0 || index >= tx->num_constf_allowed) { tx->failure = TRUE; return FALSE; @@ -556,24 +572,36 @@ static boolean tx_lconsti(struct shader_translator *tx, struct ureg_src *src, INT index) { + int i; + if (index < 0 || index >= tx->num_consti_allowed) { tx->failure = TRUE; return FALSE; } - if (tx->lconsti[index].idx == index) - *src = tx->lconsti[index].reg; - return tx->lconsti[index].idx == index; + for (i = 0; i < tx->num_lconsti; ++i) { + if (tx->lconsti[i].idx == index) { + *src = tx->lconsti[i].reg; + return TRUE; + } + } + return FALSE; } static boolean tx_lconstb(struct shader_translator *tx, struct ureg_src *src, INT index) { + int i; + if (index < 0 || index >= tx->num_constb_allowed) { tx->failure = TRUE; return FALSE; } - if (tx->lconstb[index].idx == index) - *src = tx->lconstb[index].reg; - return tx->lconstb[index].idx == index; + for (i = 0; i < tx->num_lconstb; ++i) { + if (tx->lconstb[i].idx == index) { + *src = tx->lconstb[i].reg; + return TRUE; + } + } + return FALSE; } static void @@ -598,23 +626,55 @@ tx->lconstf[n].idx = index; tx->lconstf[n].reg = ureg_imm4f(tx->ureg, f[0], f[1], f[2], f[3]); - memcpy(tx->lconstf[n].imm.f, f, sizeof(tx->lconstf[n].imm.f)); + memcpy(tx->lconstf[n].f, f, sizeof(tx->lconstf[n].f)); } static void tx_set_lconsti(struct shader_translator *tx, INT index, int i[4]) { + unsigned n; + FAILURE_VOID(index < 0 || index >= tx->num_consti_allowed) - tx->lconsti[index].idx = index; - tx->lconsti[index].reg = tx->native_integers ? + + for (n = 0; n < tx->num_lconsti; ++n) + if (tx->lconsti[n].idx == index) + break; + if (n == tx->num_lconsti) { + if ((n % 8) == 0) { + tx->lconsti = REALLOC(tx->lconsti, + (n + 0) * sizeof(tx->lconsti[0]), + (n + 8) * sizeof(tx->lconsti[0])); + assert(tx->lconsti); + } + tx->num_lconsti++; + } + + tx->lconsti[n].idx = index; + tx->lconsti[n].reg = tx->native_integers ? ureg_imm4i(tx->ureg, i[0], i[1], i[2], i[3]) : ureg_imm4f(tx->ureg, i[0], i[1], i[2], i[3]); } static void tx_set_lconstb(struct shader_translator *tx, INT index, BOOL b) { + unsigned n; + FAILURE_VOID(index < 0 || index >= tx->num_constb_allowed) - tx->lconstb[index].idx = index; - tx->lconstb[index].reg = tx->native_integers ? + + for (n = 0; n < tx->num_lconstb; ++n) + if (tx->lconstb[n].idx == index) + break; + if (n == tx->num_lconstb) { + if ((n % 8) == 0) { + tx->lconstb = REALLOC(tx->lconstb, + (n + 0) * sizeof(tx->lconstb[0]), + (n + 8) * sizeof(tx->lconstb[0])); + assert(tx->lconstb); + } + tx->num_lconstb++; + } + + tx->lconstb[n].idx = index; + tx->lconstb[n].reg = tx->native_integers ? ureg_imm1u(tx->ureg, b ? 0xffffffff : 0) : ureg_imm1f(tx->ureg, b ? 1.0f : 0.0f); } @@ -894,9 +954,32 @@ TGSI_INTERPOLATE_LOC_CENTROID : 0, 0, 1); } else { - assert(!param->rel); /* TODO */ - assert(param->idx < ARRAY_SIZE(tx->regs.v)); - src = tx->regs.v[param->idx]; + if(param->rel) { + /* Copy all inputs (non consecutive) + * to temp array (consecutive). + * This is not good for performance. + * A better way would be to have inputs + * consecutive (would need implement alternative + * way to match vs outputs and ps inputs). + * However even with the better way, the temp array + * copy would need to be used if some inputs + * are not GENERIC or if they have different + * interpolation flag. */ + if (ureg_src_is_undef(tx->regs.v_consecutive)) { + int i; + tx->regs.v_consecutive = ureg_src(ureg_DECL_array_temporary(ureg, 10, 0)); + for (i = 0; i < 10; i++) { + if (!ureg_src_is_undef(tx->regs.v[i])) + ureg_MOV(ureg, ureg_dst_array_offset(ureg_dst(tx->regs.v_consecutive), i), tx->regs.v[i]); + else + ureg_MOV(ureg, ureg_dst_array_offset(ureg_dst(tx->regs.v_consecutive), i), ureg_imm4f(ureg, 0.0f, 0.0f, 0.0f, 1.0f)); + } + } + src = ureg_src_array_offset(tx->regs.v_consecutive, param->idx); + } else { + assert(param->idx < ARRAY_SIZE(tx->regs.v)); + src = tx->regs.v[param->idx]; + } } } break; @@ -918,7 +1001,26 @@ if (param->rel || !tx_lconstf(tx, &src, param->idx)) { if (!param->rel) nine_info_mark_const_f_used(tx->info, param->idx); - src = ureg_src_register(TGSI_FILE_CONSTANT, param->idx); + /* vswp constant handling: we use two buffers + * to fit all the float constants. The special handling + * doesn't need to be elsewhere, because all the instructions + * accessing the constants directly are VS1, and swvp + * is VS >= 2 */ + if (IS_VS && tx->info->swvp_on) { + if (!param->rel) { + if (param->idx < 4096) { + src = ureg_src_register(TGSI_FILE_CONSTANT, param->idx); + src = ureg_src_dimension(src, 0); + } else { + src = ureg_src_register(TGSI_FILE_CONSTANT, param->idx - 4096); + src = ureg_src_dimension(src, 1); + } + } else { + src = ureg_src_register(TGSI_FILE_CONSTANT, param->idx); /* TODO: swvp rel > 4096 */ + src = ureg_src_dimension(src, 0); + } + } else + src = ureg_src_register(TGSI_FILE_CONSTANT, param->idx); } if (!IS_VS && tx->version.major < 2) { /* ps 1.X clamps constants */ @@ -940,8 +1042,12 @@ assert(!param->rel); if (!tx_lconsti(tx, &src, param->idx)) { nine_info_mark_const_i_used(tx->info, param->idx); - src = ureg_src_register(TGSI_FILE_CONSTANT, - tx->info->const_i_base + param->idx); + if (IS_VS && tx->info->swvp_on) { + src = ureg_src_register(TGSI_FILE_CONSTANT, param->idx); + src = ureg_src_dimension(src, 2); + } else + src = ureg_src_register(TGSI_FILE_CONSTANT, + tx->info->const_i_base + param->idx); } break; case D3DSPR_CONSTBOOL: @@ -950,8 +1056,12 @@ char r = param->idx / 4; char s = param->idx & 3; nine_info_mark_const_b_used(tx->info, param->idx); - src = ureg_src_register(TGSI_FILE_CONSTANT, - tx->info->const_b_base + r); + if (IS_VS && tx->info->swvp_on) { + src = ureg_src_register(TGSI_FILE_CONSTANT, r); + src = ureg_src_dimension(src, 3); + } else + src = ureg_src_register(TGSI_FILE_CONSTANT, + tx->info->const_b_base + r); src = ureg_swizzle(src, s, s, s, s); } break; @@ -972,8 +1082,8 @@ if (tx->shift_wpos) { /* TODO: do this only once */ struct ureg_dst wpos = tx_scratch(tx); - ureg_SUB(ureg, wpos, tx->regs.vPos, - ureg_imm4f(ureg, 0.5f, 0.5f, 0.0f, 0.0f)); + ureg_ADD(ureg, wpos, tx->regs.vPos, + ureg_imm4f(ureg, -0.5f, -0.5f, 0.0f, 0.0f)); src = ureg_src(wpos); } else { src = tx->regs.vPos; @@ -1051,12 +1161,12 @@ break; case NINED3DSPSM_BIAS: tmp = tx_scratch(tx); - ureg_SUB(ureg, tmp, src, ureg_imm1f(ureg, 0.5f)); + ureg_ADD(ureg, tmp, src, ureg_imm1f(ureg, -0.5f)); src = ureg_src(tmp); break; case NINED3DSPSM_BIASNEG: tmp = tx_scratch(tx); - ureg_SUB(ureg, tmp, ureg_imm1f(ureg, 0.5f), src); + ureg_ADD(ureg, tmp, ureg_imm1f(ureg, 0.5f), ureg_negate(src)); src = ureg_src(tmp); break; case NINED3DSPSM_NOT: @@ -1069,7 +1179,7 @@ /* fall through */ case NINED3DSPSM_COMP: tmp = tx_scratch(tx); - ureg_SUB(ureg, tmp, ureg_imm1f(ureg, 1.0f), src); + ureg_ADD(ureg, tmp, ureg_imm1f(ureg, 1.0f), ureg_negate(src)); src = ureg_src(tmp); break; case NINED3DSPSM_DZ: @@ -1463,6 +1573,34 @@ static HRESULT NineTranslateInstruction_Generic(struct shader_translator *); +DECL_SPECIAL(NOP) +{ + /* Nothing to do. NOP was used to avoid hangs + * with very old d3d drivers. */ + return D3D_OK; +} + +DECL_SPECIAL(SUB) +{ + struct ureg_program *ureg = tx->ureg; + struct ureg_dst dst = tx_dst_param(tx, &tx->insn.dst[0]); + struct ureg_src src0 = tx_src_param(tx, &tx->insn.src[0]); + struct ureg_src src1 = tx_src_param(tx, &tx->insn.src[1]); + + ureg_ADD(ureg, dst, src0, ureg_negate(src1)); + return D3D_OK; +} + +DECL_SPECIAL(ABS) +{ + struct ureg_program *ureg = tx->ureg; + struct ureg_dst dst = tx_dst_param(tx, &tx->insn.dst[0]); + struct ureg_src src = tx_src_param(tx, &tx->insn.src[0]); + + ureg_MOV(ureg, dst, ureg_abs(src)); + return D3D_OK; +} + DECL_SPECIAL(M4x4) { return NineTranslateInstruction_Mkxn(tx, 4, 4); @@ -1898,7 +2036,7 @@ sem->Index = 0; break; default: - unreachable(!"Invalid DECLUSAGE."); + unreachable("Invalid DECLUSAGE."); break; } } @@ -2043,6 +2181,12 @@ assert(ureg_dst_is_undef(tx->regs.o[sem.reg.idx]) && "Nine doesn't support yet packing"); tx->regs.o[sem.reg.idx] = ureg_DECL_output_masked( ureg, tgsi.Name, tgsi.Index, sem.reg.mask, 0, 1); + nine_record_outputs(tx, sem.usage, sem.usage_idx, sem.reg.mask, sem.reg.idx); + if (tx->info->process_vertices && sem.usage == D3DDECLUSAGE_POSITION && sem.usage_idx == 0) { + tx->regs.oPos_out = tx->regs.o[sem.reg.idx]; + tx->regs.o[sem.reg.idx] = ureg_DECL_temporary(ureg); + tx->regs.oPos = tx->regs.o[sem.reg.idx]; + } if (tgsi.Name == TGSI_SEMANTIC_PSIZE) { tx->regs.o[sem.reg.idx] = ureg_DECL_temporary(ureg); @@ -2408,7 +2552,7 @@ ureg_MUL(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_X), ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_X), ureg_imm1f(ureg, 2.0f)); ureg_MUL(ureg, tmp, ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_X), ureg_src(dst)); /* at this step tmp.xyz = 2 * (N.E / N.N) * N */ - ureg_SUB(ureg, tmp, ureg_src(tmp), E); + ureg_ADD(ureg, tmp, ureg_src(tmp), ureg_negate(E)); ureg_TEX(ureg, dst, ps1x_sampler_type(tx->info, m + 2), ureg_src(tmp), sample); return D3D_OK; @@ -2547,7 +2691,7 @@ ureg_MUL(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_X), ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_X), ureg_imm1f(ureg, 2.0f)); ureg_MUL(ureg, tmp, ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_X), ureg_src(dst)); /* at this step tmp.xyz = 2 * (N.E / N.N) * N */ - ureg_SUB(ureg, tmp, ureg_src(tmp), ureg_src(E)); + ureg_ADD(ureg, tmp, ureg_src(tmp), ureg_negate(ureg_src(E))); ureg_TEX(ureg, dst, ps1x_sampler_type(tx->info, m + 2), ureg_src(tmp), sample); break; default: @@ -2747,10 +2891,10 @@ struct sm1_op_info inst_table[] = { - _OPI(NOP, NOP, V(0,0), V(3,0), V(0,0), V(3,0), 0, 0, NULL), /* 0 */ + _OPI(NOP, NOP, V(0,0), V(3,0), V(0,0), V(3,0), 0, 0, SPECIAL(NOP)), /* 0 */ _OPI(MOV, MOV, V(0,0), V(3,0), V(0,0), V(3,0), 1, 1, NULL), _OPI(ADD, ADD, V(0,0), V(3,0), V(0,0), V(3,0), 1, 2, NULL), /* 2 */ - _OPI(SUB, SUB, V(0,0), V(3,0), V(0,0), V(3,0), 1, 2, NULL), /* 3 */ + _OPI(SUB, NOP, V(0,0), V(3,0), V(0,0), V(3,0), 1, 2, SPECIAL(SUB)), /* 3 */ _OPI(MAD, MAD, V(0,0), V(3,0), V(0,0), V(3,0), 1, 3, NULL), /* 4 */ _OPI(MUL, MUL, V(0,0), V(3,0), V(0,0), V(3,0), 1, 2, NULL), /* 5 */ _OPI(RCP, RCP, V(0,0), V(3,0), V(0,0), V(3,0), 1, 1, NULL), /* 6 */ @@ -2786,7 +2930,7 @@ _OPI(POW, POW, V(0,0), V(3,0), V(0,0), V(3,0), 1, 2, SPECIAL(POW)), _OPI(CRS, XPD, V(0,0), V(3,0), V(0,0), V(3,0), 1, 2, NULL), /* XXX: .w */ _OPI(SGN, SSG, V(2,0), V(3,0), V(0,0), V(0,0), 1, 3, SPECIAL(SGN)), /* ignore src1,2 */ - _OPI(ABS, ABS, V(0,0), V(3,0), V(0,0), V(3,0), 1, 1, NULL), + _OPI(ABS, NOP, V(0,0), V(3,0), V(0,0), V(3,0), 1, 1, SPECIAL(ABS)), _OPI(NRM, NOP, V(0,0), V(3,0), V(0,0), V(3,0), 1, 1, SPECIAL(NRM)), /* NRM doesn't fit */ _OPI(SINCOS, SCS, V(2,0), V(2,1), V(2,0), V(2,1), 1, 3, SPECIAL(SINCOS)), @@ -3245,15 +3389,12 @@ for (i = 0; i < ARRAY_SIZE(tx->regs.vT); ++i) tx->regs.vT[i] = ureg_src_undef(); - for (i = 0; i < ARRAY_SIZE(tx->lconsti); ++i) - tx->lconsti[i].idx = -1; - for (i = 0; i < ARRAY_SIZE(tx->lconstb); ++i) - tx->lconstb[i].idx = -1; - sm1_read_version(tx); info->version = (tx->version.major << 4) | tx->version.minor; + tx->num_outputs = 0; + create_op_info_map(tx); } @@ -3267,6 +3408,26 @@ FREE(tx); } +/* CONST[0].xyz = width/2, -height/2, zmax-zmin + * CONST[1].xyz = x+width/2, y+height/2, zmin */ +static void +shader_add_vs_viewport_transform(struct shader_translator *tx) +{ + struct ureg_program *ureg = tx->ureg; + struct ureg_src c0 = NINE_CONSTANT_SRC(0); + struct ureg_src c1 = NINE_CONSTANT_SRC(1); + /* struct ureg_dst pos_tmp = ureg_DECL_temporary(ureg);*/ + + c0 = ureg_src_dimension(c0, 4); + c1 = ureg_src_dimension(c1, 4); + /* TODO: find out when we need to apply the viewport transformation or not. + * Likely will be XYZ vs XYZRHW in vdecl_out + * ureg_MUL(ureg, ureg_writemask(pos_tmp, TGSI_WRITEMASK_XYZ), ureg_src(tx->regs.oPos), c0); + * ureg_ADD(ureg, ureg_writemask(tx->regs.oPos_out, TGSI_WRITEMASK_XYZ), ureg_src(pos_tmp), c1); + */ + ureg_MOV(ureg, ureg_writemask(tx->regs.oPos_out, TGSI_WRITEMASK_XYZ), ureg_src(tx->regs.oPos)); +} + static void shader_add_ps_fog_stage(struct shader_translator *tx, struct ureg_src src_col) { @@ -3293,7 +3454,7 @@ if (tx->info->fog_mode == D3DFOG_LINEAR) { fog_end = NINE_CONSTANT_SRC_SWIZZLE(33, X); fog_coeff = NINE_CONSTANT_SRC_SWIZZLE(33, Y); - ureg_SUB(ureg, fog_factor, fog_end, depth); + ureg_ADD(ureg, fog_factor, fog_end, ureg_negate(depth)); ureg_MUL(ureg, ureg_saturate(fog_factor), tx_src_scalar(fog_factor), fog_coeff); } else if (tx->info->fog_mode == D3DFOG_EXP) { fog_density = NINE_CONSTANT_SRC_SWIZZLE(33, X); @@ -3318,19 +3479,18 @@ ureg_MOV(ureg, ureg_writemask(oCol0, TGSI_WRITEMASK_W), src_col); } -#define GET_CAP(n) device->screen->get_param( \ - device->screen, PIPE_CAP_##n) -#define GET_SHADER_CAP(n) device->screen->get_shader_param( \ - device->screen, info->type, PIPE_SHADER_CAP_##n) +#define GET_CAP(n) screen->get_param( \ + screen, PIPE_CAP_##n) +#define GET_SHADER_CAP(n) screen->get_shader_param( \ + screen, info->type, PIPE_SHADER_CAP_##n) HRESULT -nine_translate_shader(struct NineDevice9 *device, struct nine_shader_info *info) +nine_translate_shader(struct NineDevice9 *device, struct nine_shader_info *info, struct pipe_context *pipe) { struct shader_translator *tx; HRESULT hr = D3D_OK; const unsigned processor = info->type; - unsigned s, slot_max; - unsigned max_const_f; + struct pipe_screen *screen = info->process_vertices ? device->screen_sw : device->screen; user_assert(processor != ~0, D3DERR_INVALIDCALL); @@ -3387,6 +3547,12 @@ tx->num_constb_allowed = NINE_MAX_CONST_B; } + if (IS_VS && tx->version.major >= 2 && info->swvp_on) { + tx->num_constf_allowed = 8192; + tx->num_consti_allowed = 2048; + tx->num_constb_allowed = 2048; + } + /* VS must always write position. Declare it here to make it the 1st output. * (Some drivers like nv50 are buggy and rely on that.) */ @@ -3403,7 +3569,10 @@ tx->parse++; /* for byte_size */ if (tx->failure) { - ERR("Encountered buggy shader\n"); + /* For VS shaders, we print the warning later, + * we first try with swvp. */ + if (IS_PS) + ERR("Encountered buggy shader\n"); ureg_destroy(tx->ureg); hr = D3DERR_INVALIDCALL; goto out; @@ -3434,6 +3603,9 @@ info->point_size = TRUE; } + if (info->process_vertices) + shader_add_vs_viewport_transform(tx); + ureg_END(tx->ureg); /* record local constants */ @@ -3461,7 +3633,7 @@ k = i; } indices[n] = tx->lconstf[k].idx; - memcpy(&data[n * 4], &tx->lconstf[k].imm.f[0], 4 * sizeof(float)); + memcpy(&data[n * 4], &tx->lconstf[k].f[0], 4 * sizeof(float)); tx->lconstf[k].idx = INT_MAX; } @@ -3496,25 +3668,38 @@ /* r500 */ if (info->const_float_slots > device->max_vs_const_f && - (info->const_int_slots || info->const_bool_slots)) + (info->const_int_slots || info->const_bool_slots) && + (!IS_VS || !info->swvp_on)) ERR("Overlapping constant slots. The shader is likely to be buggy\n"); if (tx->indirect_const_access) /* vs only */ info->const_float_slots = device->max_vs_const_f; - max_const_f = IS_VS ? device->max_vs_const_f : device->max_ps_const_f; - slot_max = info->const_bool_slots > 0 ? - max_const_f + NINE_MAX_CONST_I - + DIV_ROUND_UP(info->const_bool_slots, 4) : - info->const_int_slots > 0 ? - max_const_f + info->const_int_slots : - info->const_float_slots; + if (!IS_VS || !info->swvp_on) { + unsigned s, slot_max; + unsigned max_const_f = IS_VS ? device->max_vs_const_f : device->max_ps_const_f; + + slot_max = info->const_bool_slots > 0 ? + max_const_f + NINE_MAX_CONST_I + + DIV_ROUND_UP(info->const_bool_slots, 4) : + info->const_int_slots > 0 ? + max_const_f + info->const_int_slots : + info->const_float_slots; + + info->const_used_size = sizeof(float[4]) * slot_max; /* slots start from 1 */ - info->const_used_size = sizeof(float[4]) * slot_max; /* slots start from 1 */ + for (s = 0; s < slot_max; s++) + ureg_DECL_constant(tx->ureg, s); + } else { + ureg_DECL_constant2D(tx->ureg, 0, 4095, 0); + ureg_DECL_constant2D(tx->ureg, 0, 4095, 1); + ureg_DECL_constant2D(tx->ureg, 0, 2047, 2); + ureg_DECL_constant2D(tx->ureg, 0, 511, 3); + } - for (s = 0; s < slot_max; s++) - ureg_DECL_constant(tx->ureg, s); + if (info->process_vertices) + ureg_DECL_constant2D(tx->ureg, 0, 2, 4); /* Viewport data */ if (debug_get_bool_option("NINE_TGSI_DUMP", FALSE)) { unsigned count; @@ -3523,7 +3708,14 @@ ureg_free_tokens(toks); } - info->cso = ureg_create_shader_and_destroy(tx->ureg, device->pipe); + if (info->process_vertices) { + NineVertexDeclaration9_FillStreamOutputInfo(info->vdecl_out, + tx->output_info, + tx->num_outputs, + &(info->so)); + info->cso = ureg_create_shader_with_so_and_destroy(tx->ureg, pipe, &(info->so)); + } else + info->cso = ureg_create_shader_and_destroy(tx->ureg, pipe); if (!info->cso) { hr = D3DERR_DRIVERINTERNALERROR; FREE(info->lconstf.data); diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/nine_shader.h mesa-17.0.7/src/gallium/state_trackers/nine/nine_shader.h --- mesa-12.0.6/src/gallium/state_trackers/nine/nine_shader.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/nine_shader.h 2017-06-01 10:37:10.000000000 +0000 @@ -26,10 +26,12 @@ #include "d3d9types.h" #include "d3d9caps.h" #include "nine_defines.h" +#include "nine_helpers.h" #include "pipe/p_state.h" /* PIPE_MAX_ATTRIBS */ #include "util/u_memory.h" struct NineDevice9; +struct NineVertexDeclaration9; struct nine_lconstf /* NOTE: both pointers should be FREE'd by the user */ { @@ -76,6 +78,20 @@ struct nine_lconstf lconstf; /* out, NOTE: members to be free'd by user */ uint8_t bumpenvmat_needed; + + boolean swvp_on; + + boolean process_vertices; + struct NineVertexDeclaration9 *vdecl_out; + struct pipe_stream_output_info so; +}; + +struct nine_vs_output_info +{ + BYTE output_semantic; + int output_semantic_index; + int mask; + int output_index; }; static inline void @@ -98,7 +114,9 @@ } HRESULT -nine_translate_shader(struct NineDevice9 *device, struct nine_shader_info *); +nine_translate_shader(struct NineDevice9 *device, + struct nine_shader_info *, + struct pipe_context *); struct nine_shader_variant @@ -145,4 +163,65 @@ } } +struct nine_shader_variant_so +{ + struct nine_shader_variant_so *next; + struct NineVertexDeclaration9 *vdecl; + struct pipe_stream_output_info so; + void *cso; +}; + +static inline void * +nine_shader_variant_so_get(struct nine_shader_variant_so *list, + struct NineVertexDeclaration9 *vdecl, + struct pipe_stream_output_info *so) +{ + while (list->vdecl != vdecl && list->next) + list = list->next; + if (list->vdecl == vdecl) { + *so = list->so; + return list->cso; + } + return NULL; +} + +static inline boolean +nine_shader_variant_so_add(struct nine_shader_variant_so *list, + struct NineVertexDeclaration9 *vdecl, + struct pipe_stream_output_info *so, void *cso) +{ + if (list->vdecl == NULL) { /* first shader */ + list->next = NULL; + nine_bind(&list->vdecl, vdecl); + list->so = *so; + list->cso = cso; + return TRUE; + } + while (list->next) { + assert(list->vdecl != vdecl); + list = list->next; + } + list->next = MALLOC_STRUCT(nine_shader_variant_so); + if (!list->next) + return FALSE; + list->next->next = NULL; + nine_bind(&list->vdecl, vdecl); + list->next->so = *so; + list->next->cso = cso; + return TRUE; +} + +static inline void +nine_shader_variants_so_free(struct nine_shader_variant_so *list) +{ + while (list->next) { + struct nine_shader_variant_so *ptr = list->next; + list->next = ptr->next; + nine_bind(&ptr->vdecl, NULL); + FREE(ptr); + } + if (list->vdecl) + nine_bind(&list->vdecl, NULL); +} + #endif /* _NINE_SHADER_H_ */ diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/nine_state.c mesa-17.0.7/src/gallium/state_trackers/nine/nine_state.c --- mesa-12.0.6/src/gallium/state_trackers/nine/nine_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/nine_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -21,32 +21,306 @@ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. */ +#define NINE_STATE + #include "device9.h" +#include "swapchain9.h" #include "basetexture9.h" #include "buffer9.h" #include "indexbuffer9.h" #include "surface9.h" +#include "vertexbuffer9.h" #include "vertexdeclaration9.h" #include "vertexshader9.h" #include "pixelshader9.h" #include "nine_pipe.h" #include "nine_ff.h" +#include "nine_limits.h" #include "pipe/p_context.h" #include "pipe/p_state.h" #include "cso_cache/cso_context.h" +#include "util/u_atomic.h" #include "util/u_upload_mgr.h" #include "util/u_math.h" +#include "util/u_box.h" +#include "util/u_simple_shaders.h" +#include "util/u_gen_mipmap.h" + +/* CSMT headers */ +#include "nine_queue.h" +#include "nine_csmt_helper.h" +#include "os/os_thread.h" #define DBG_CHANNEL DBG_DEVICE +/* Nine CSMT */ + +struct csmt_instruction { + int (* func)(struct NineDevice9 *This, struct csmt_instruction *instr); +}; + +struct csmt_context { + pipe_thread worker; + struct nine_queue_pool* pool; + BOOL terminate; + pipe_condvar event_processed; + pipe_mutex mutex_processed; + struct NineDevice9 *device; + BOOL processed; + BOOL toPause; + BOOL hasPaused; + pipe_mutex thread_running; + pipe_mutex thread_resume; +}; + +/* Wait for instruction to be processed. + * Caller has to ensure that only one thread waits at time. + */ +static void +nine_csmt_wait_processed(struct csmt_context *ctx) +{ + pipe_mutex_lock(ctx->mutex_processed); + while (!p_atomic_read(&ctx->processed)) { + pipe_condvar_wait(ctx->event_processed, ctx->mutex_processed); + } + pipe_mutex_unlock(ctx->mutex_processed); +} + +/* CSMT worker thread */ +static +PIPE_THREAD_ROUTINE(nine_csmt_worker, arg) +{ + struct csmt_context *ctx = arg; + struct csmt_instruction *instr; + DBG("CSMT worker spawned\n"); + + pipe_thread_setname("CSMT-Worker"); + + while (1) { + nine_queue_wait_flush(ctx->pool); + pipe_mutex_lock(ctx->thread_running); + + /* Get instruction. NULL on empty cmdbuf. */ + while (!p_atomic_read(&ctx->terminate) && + (instr = (struct csmt_instruction *)nine_queue_get(ctx->pool))) { + + /* decode */ + if (instr->func(ctx->device, instr)) { + pipe_mutex_lock(ctx->mutex_processed); + p_atomic_set(&ctx->processed, TRUE); + pipe_condvar_signal(ctx->event_processed); + pipe_mutex_unlock(ctx->mutex_processed); + } + if (p_atomic_read(&ctx->toPause)) { + pipe_mutex_unlock(ctx->thread_running); + /* will wait here the thread can be resumed */ + pipe_mutex_lock(ctx->thread_resume); + pipe_mutex_lock(ctx->thread_running); + pipe_mutex_unlock(ctx->thread_resume); + } + } + + pipe_mutex_unlock(ctx->thread_running); + if (p_atomic_read(&ctx->terminate)) { + pipe_mutex_lock(ctx->mutex_processed); + p_atomic_set(&ctx->processed, TRUE); + pipe_condvar_signal(ctx->event_processed); + pipe_mutex_unlock(ctx->mutex_processed); + break; + } + } + + DBG("CSMT worker destroyed\n"); + return 0; +} + +/* Create a CSMT context. + * Spawns a worker thread. + */ +struct csmt_context * +nine_csmt_create( struct NineDevice9 *This ) +{ + struct csmt_context *ctx; + + ctx = CALLOC_STRUCT(csmt_context); + if (!ctx) + return NULL; + + ctx->pool = nine_queue_create(); + if (!ctx->pool) { + FREE(ctx); + return NULL; + } + pipe_condvar_init(ctx->event_processed); + pipe_mutex_init(ctx->mutex_processed); + pipe_mutex_init(ctx->thread_running); + pipe_mutex_init(ctx->thread_resume); + +#if DEBUG + pipe_thread_setname("Main thread"); +#endif + + ctx->device = This; + + ctx->worker = pipe_thread_create(nine_csmt_worker, ctx); + if (!ctx->worker) { + nine_queue_delete(ctx->pool); + FREE(ctx); + return NULL; + } + + DBG("Returning context %p\n", ctx); + + return ctx; +} + +static int +nop_func( struct NineDevice9 *This, struct csmt_instruction *instr ) +{ + (void) This; + (void) instr; + + return 1; +} + +/* Push nop instruction and flush the queue. + * Waits for the worker to complete. */ +void +nine_csmt_process( struct NineDevice9 *device ) +{ + struct csmt_instruction* instr; + struct csmt_context *ctx = device->csmt_ctx; + + if (!device->csmt_active) + return; + + if (nine_queue_isempty(ctx->pool)) + return; + + DBG("device=%p\n", device); + + /* NOP */ + instr = nine_queue_alloc(ctx->pool, sizeof(struct csmt_instruction)); + assert(instr); + instr->func = nop_func; + + p_atomic_set(&ctx->processed, FALSE); + nine_queue_flush(ctx->pool); + + nine_csmt_wait_processed(ctx); +} + +/* Destroys a CSMT context. + * Waits for the worker thread to terminate. + */ +void +nine_csmt_destroy( struct NineDevice9 *device, struct csmt_context *ctx ) +{ + struct csmt_instruction* instr; + pipe_thread render_thread = ctx->worker; + + DBG("device=%p ctx=%p\n", device, ctx); + + /* Push nop and flush the queue. */ + instr = nine_queue_alloc(ctx->pool, sizeof(struct csmt_instruction)); + assert(instr); + instr->func = nop_func; + + p_atomic_set(&ctx->processed, FALSE); + /* Signal worker to terminate. */ + p_atomic_set(&ctx->terminate, TRUE); + nine_queue_flush(ctx->pool); + + nine_csmt_wait_processed(ctx); + nine_queue_delete(ctx->pool); + pipe_mutex_destroy(ctx->mutex_processed); + + FREE(ctx); + + pipe_thread_wait(render_thread); +} + +static void +nine_csmt_pause( struct NineDevice9 *device ) +{ + struct csmt_context *ctx = device->csmt_ctx; + + if (!device->csmt_active) + return; + + /* No need to pause the thread */ + if (nine_queue_no_flushed_work(ctx->pool)) + return; + + pipe_mutex_lock(ctx->thread_resume); + p_atomic_set(&ctx->toPause, TRUE); + + /* Wait the thread is paused */ + pipe_mutex_lock(ctx->thread_running); + ctx->hasPaused = TRUE; + p_atomic_set(&ctx->toPause, FALSE); +} + +static void +nine_csmt_resume( struct NineDevice9 *device ) +{ + struct csmt_context *ctx = device->csmt_ctx; + + if (!device->csmt_active) + return; + + if (!ctx->hasPaused) + return; + + ctx->hasPaused = FALSE; + pipe_mutex_unlock(ctx->thread_running); + pipe_mutex_unlock(ctx->thread_resume); +} + +struct pipe_context * +nine_context_get_pipe( struct NineDevice9 *device ) +{ + nine_csmt_process(device); + return device->context.pipe; +} + +struct pipe_context * +nine_context_get_pipe_multithread( struct NineDevice9 *device ) +{ + struct csmt_context *ctx = device->csmt_ctx; + + if (!device->csmt_active) + return device->context.pipe; + + if (!pipe_thread_is_self(ctx->worker)) + nine_csmt_process(device); + + return device->context.pipe; +} + +struct pipe_context * +nine_context_get_pipe_acquire( struct NineDevice9 *device ) +{ + nine_csmt_pause(device); + return device->context.pipe; +} + +void +nine_context_get_pipe_release( struct NineDevice9 *device ) +{ + nine_csmt_resume(device); +} + +/* Nine state functions */ + /* Check if some states need to be set dirty */ static inline DWORD check_multisample(struct NineDevice9 *device) { - DWORD *rs = device->state.rs; + DWORD *rs = device->context.rs; DWORD new_value = (rs[D3DRS_ZENABLE] || rs[D3DRS_STENCILENABLE]) && - device->state.rt[0]->desc.MultiSampleType >= 1 && + device->context.rt[0]->desc.MultiSampleType >= 1 && rs[D3DRS_MULTISAMPLEANTIALIAS]; if (rs[NINED3DRS_MULTISAMPLE] != new_value) { rs[NINED3DRS_MULTISAMPLE] = new_value; @@ -60,207 +334,181 @@ static inline void prepare_blend(struct NineDevice9 *device) { - nine_convert_blend_state(&device->state.pipe.blend, device->state.rs); - device->state.commit |= NINE_STATE_COMMIT_BLEND; + nine_convert_blend_state(&device->context.pipe_data.blend, device->context.rs); + device->context.commit |= NINE_STATE_COMMIT_BLEND; } static inline void prepare_dsa(struct NineDevice9 *device) { - nine_convert_dsa_state(&device->state.pipe.dsa, device->state.rs); - device->state.commit |= NINE_STATE_COMMIT_DSA; + nine_convert_dsa_state(&device->context.pipe_data.dsa, device->context.rs); + device->context.commit |= NINE_STATE_COMMIT_DSA; } static inline void prepare_rasterizer(struct NineDevice9 *device) { - nine_convert_rasterizer_state(&device->state.pipe.rast, device->state.rs); - device->state.commit |= NINE_STATE_COMMIT_RASTERIZER; + nine_convert_rasterizer_state(device, &device->context.pipe_data.rast, device->context.rs); + device->context.commit |= NINE_STATE_COMMIT_RASTERIZER; } static void -prepare_ps_constants_userbuf(struct NineDevice9 *device); +prepare_vs_constants_userbuf_swvp(struct NineDevice9 *device) +{ + struct nine_context *context = &device->context; -#define DO_UPLOAD_CONST_F(buf,p,c,d) \ - do { \ - DBG("upload ConstantF [%u .. %u]\n", x, (x) + (c) - 1); \ - box.x = (p) * 4 * sizeof(float); \ - box.width = (c) * 4 * sizeof(float); \ - pipe->transfer_inline_write(pipe, buf, 0, usage, &box, &((d)[p * 4]), \ - 0, 0); \ - } while(0) - -/* OK, this is a bit ugly ... */ -static void -upload_constants(struct NineDevice9 *device, unsigned shader_type) -{ - struct pipe_context *pipe = device->pipe; - struct pipe_resource *buf; - struct pipe_box box; - const void *data; - const float *const_f; - const int *const_i; - const BOOL *const_b; - uint32_t data_b[NINE_MAX_CONST_B]; - uint16_t dirty_i; - uint16_t dirty_b; - const unsigned usage = PIPE_TRANSFER_WRITE | PIPE_TRANSFER_DISCARD_RANGE; - unsigned x = 0; /* silence warning */ - unsigned i, c; - struct nine_range *r, *p, *lconstf_ranges; - float *lconstf_data; - - box.y = 0; - box.z = 0; - box.height = 1; - box.depth = 1; - - if (shader_type == PIPE_SHADER_VERTEX) { - DBG("VS\n"); - buf = device->constbuf_vs; - - const_f = device->state.vs_const_f; - for (p = r = device->state.changed.vs_const_f; r; p = r, r = r->next) - DO_UPLOAD_CONST_F(buf, r->bgn, r->end - r->bgn, const_f); - if (p) { - nine_range_pool_put_chain(&device->range_pool, - device->state.changed.vs_const_f, p); - device->state.changed.vs_const_f = NULL; - } - - dirty_i = device->state.changed.vs_const_i; - device->state.changed.vs_const_i = 0; - const_i = &device->state.vs_const_i[0][0]; - - dirty_b = device->state.changed.vs_const_b; - device->state.changed.vs_const_b = 0; - const_b = device->state.vs_const_b; + if (context->changed.vs_const_f || context->changed.group & NINE_STATE_SWVP) { + struct pipe_constant_buffer cb; - lconstf_ranges = device->state.vs->lconstf.ranges; - lconstf_data = device->state.vs->lconstf.data; + cb.buffer_offset = 0; + cb.buffer_size = 4096 * sizeof(float[4]); + cb.user_buffer = context->vs_const_f_swvp; - device->state.changed.group &= ~NINE_STATE_VS_CONST; - } else { - DBG("PS\n"); - /* features only implemented on the userbuf path */ - if (device->state.ps->bumpenvmat_needed || ( - device->state.ps->byte_code.version < 0x30 && - device->state.rs[D3DRS_FOGENABLE])) { - device->prefer_user_constbuf = TRUE; - prepare_ps_constants_userbuf(device); - return; + if (context->vs->lconstf.ranges) { + const struct nine_lconstf *lconstf = &(context->vs->lconstf); + const struct nine_range *r = lconstf->ranges; + unsigned n = 0; + float *dst = context->vs_lconstf_temp; + float *src = (float *)cb.user_buffer; + memcpy(dst, src, cb.buffer_size); + while (r) { + unsigned p = r->bgn; + unsigned c = r->end - r->bgn; + memcpy(&dst[p * 4], &lconstf->data[n * 4], c * 4 * sizeof(float)); + n += c; + r = r->next; + } + cb.user_buffer = dst; } - buf = device->constbuf_ps; - const_f = device->state.ps_const_f; - for (p = r = device->state.changed.ps_const_f; r; p = r, r = r->next) - DO_UPLOAD_CONST_F(buf, r->bgn, r->end - r->bgn, const_f); - if (p) { - nine_range_pool_put_chain(&device->range_pool, - device->state.changed.ps_const_f, p); - device->state.changed.ps_const_f = NULL; - } - - dirty_i = device->state.changed.ps_const_i; - device->state.changed.ps_const_i = 0; - const_i = &device->state.ps_const_i[0][0]; - - dirty_b = device->state.changed.ps_const_b; - device->state.changed.ps_const_b = 0; - const_b = device->state.ps_const_b; - - lconstf_ranges = NULL; - lconstf_data = NULL; - - device->state.changed.group &= ~NINE_STATE_PS_CONST; - } - - /* write range from min to max changed, it's not much data */ - /* bool1 */ - if (dirty_b) { - c = util_last_bit(dirty_b); - i = ffs(dirty_b) - 1; - x = buf->width0 - (NINE_MAX_CONST_B - i) * 4; - c -= i; - memcpy(data_b, &(const_b[i]), c * sizeof(uint32_t)); - box.x = x; - box.width = c * 4; - DBG("upload ConstantB [%u .. %u]\n", x, x + c - 1); - pipe->transfer_inline_write(pipe, buf, 0, usage, &box, data_b, 0, 0); - } - - /* int4 */ - for (c = 0, i = 0; dirty_i; i++, dirty_i >>= 1) { - if (dirty_i & 1) { - if (!c) - x = i; - ++c; - } else - if (c) { - DBG("upload ConstantI [%u .. %u]\n", x, x + c - 1); - data = &const_i[x * 4]; - box.x = buf->width0 - (NINE_MAX_CONST_I * 4 + NINE_MAX_CONST_B) * 4; - box.x += x * 4 * sizeof(int); - box.width = c * 4 * sizeof(int); - c = 0; - pipe->transfer_inline_write(pipe, buf, 0, usage, &box, data, 0, 0); - } - } - if (c) { - DBG("upload ConstantI [%u .. %u]\n", x, x + c - 1); - data = &const_i[x * 4]; - box.x = buf->width0 - (NINE_MAX_CONST_I * 4 + NINE_MAX_CONST_B) * 4; - box.x += x * 4 * sizeof(int); - box.width = c * 4 * sizeof(int); - pipe->transfer_inline_write(pipe, buf, 0, usage, &box, data, 0, 0); + /* Do not erase the buffer field. + * It is either NULL (user_cbufs), or a resource. + * u_upload_data will do the proper refcount */ + context->pipe_data.cb0_swvp.buffer_offset = cb.buffer_offset; + context->pipe_data.cb0_swvp.buffer_size = cb.buffer_size; + context->pipe_data.cb0_swvp.user_buffer = cb.user_buffer; + + cb.user_buffer = (char *)cb.user_buffer + 4096 * sizeof(float[4]); + context->pipe_data.cb1_swvp.buffer_offset = cb.buffer_offset; + context->pipe_data.cb1_swvp.buffer_size = cb.buffer_size; + context->pipe_data.cb1_swvp.user_buffer = cb.user_buffer; + + context->changed.vs_const_f = 0; } - /* TODO: only upload these when shader itself changes */ - if (lconstf_ranges) { - unsigned n = 0; - struct nine_range *r = lconstf_ranges; - while (r) { - box.x = r->bgn * 4 * sizeof(float); - n += r->end - r->bgn; - box.width = (r->end - r->bgn) * 4 * sizeof(float); - data = &lconstf_data[4 * n]; - pipe->transfer_inline_write(pipe, buf, 0, usage, &box, data, 0, 0); - r = r->next; - } + if (context->changed.vs_const_i || context->changed.group & NINE_STATE_SWVP) { + struct pipe_constant_buffer cb; + + cb.buffer_offset = 0; + cb.buffer_size = 2048 * sizeof(float[4]); + cb.user_buffer = context->vs_const_i; + + context->pipe_data.cb2_swvp.buffer_offset = cb.buffer_offset; + context->pipe_data.cb2_swvp.buffer_size = cb.buffer_size; + context->pipe_data.cb2_swvp.user_buffer = cb.user_buffer; + context->changed.vs_const_i = 0; + } + + if (context->changed.vs_const_b || context->changed.group & NINE_STATE_SWVP) { + struct pipe_constant_buffer cb; + + cb.buffer_offset = 0; + cb.buffer_size = 512 * sizeof(float[4]); + cb.user_buffer = context->vs_const_b; + + context->pipe_data.cb3_swvp.buffer_offset = cb.buffer_offset; + context->pipe_data.cb3_swvp.buffer_size = cb.buffer_size; + context->pipe_data.cb3_swvp.user_buffer = cb.user_buffer; + context->changed.vs_const_b = 0; + } + + if (!device->driver_caps.user_cbufs) { + struct pipe_constant_buffer *cb = &(context->pipe_data.cb0_swvp); + u_upload_data(device->constbuf_uploader, + 0, + cb->buffer_size, + device->constbuf_alignment, + cb->user_buffer, + &(cb->buffer_offset), + &(cb->buffer)); + u_upload_unmap(device->constbuf_uploader); + cb->user_buffer = NULL; + + cb = &(context->pipe_data.cb1_swvp); + u_upload_data(device->constbuf_uploader, + 0, + cb->buffer_size, + device->constbuf_alignment, + cb->user_buffer, + &(cb->buffer_offset), + &(cb->buffer)); + u_upload_unmap(device->constbuf_uploader); + cb->user_buffer = NULL; + + cb = &(context->pipe_data.cb2_swvp); + u_upload_data(device->constbuf_uploader, + 0, + cb->buffer_size, + device->constbuf_alignment, + cb->user_buffer, + &(cb->buffer_offset), + &(cb->buffer)); + u_upload_unmap(device->constbuf_uploader); + cb->user_buffer = NULL; + + cb = &(context->pipe_data.cb3_swvp); + u_upload_data(device->constbuf_uploader, + 0, + cb->buffer_size, + device->constbuf_alignment, + cb->user_buffer, + &(cb->buffer_offset), + &(cb->buffer)); + u_upload_unmap(device->constbuf_uploader); + cb->user_buffer = NULL; } + + context->changed.group &= ~NINE_STATE_VS_CONST; + context->commit |= NINE_STATE_COMMIT_CONST_VS; } static void prepare_vs_constants_userbuf(struct NineDevice9 *device) { - struct nine_state *state = &device->state; + struct nine_context *context = &device->context; struct pipe_constant_buffer cb; cb.buffer = NULL; cb.buffer_offset = 0; - cb.buffer_size = device->state.vs->const_used_size; - cb.user_buffer = device->state.vs_const_f; + cb.buffer_size = context->vs->const_used_size; + cb.user_buffer = context->vs_const_f; - if (!cb.buffer_size) + if (context->swvp) { + prepare_vs_constants_userbuf_swvp(device); return; + } - if (state->changed.vs_const_i) { - int *idst = (int *)&state->vs_const_f[4 * device->max_vs_const_f]; - memcpy(idst, state->vs_const_i, sizeof(state->vs_const_i)); - state->changed.vs_const_i = 0; + if (context->changed.vs_const_i || context->changed.group & NINE_STATE_SWVP) { + int *idst = (int *)&context->vs_const_f[4 * device->max_vs_const_f]; + memcpy(idst, context->vs_const_i, NINE_MAX_CONST_I * sizeof(int[4])); + context->changed.vs_const_i = 0; } - if (state->changed.vs_const_b) { - int *idst = (int *)&state->vs_const_f[4 * device->max_vs_const_f]; + + if (context->changed.vs_const_b || context->changed.group & NINE_STATE_SWVP) { + int *idst = (int *)&context->vs_const_f[4 * device->max_vs_const_f]; uint32_t *bdst = (uint32_t *)&idst[4 * NINE_MAX_CONST_I]; - memcpy(bdst, state->vs_const_b, sizeof(state->vs_const_b)); - state->changed.vs_const_b = 0; + memcpy(bdst, context->vs_const_b, NINE_MAX_CONST_B * sizeof(BOOL)); + context->changed.vs_const_b = 0; } - if (device->state.vs->lconstf.ranges) { + if (!cb.buffer_size) + return; + + if (context->vs->lconstf.ranges) { /* TODO: Can we make it so that we don't have to copy everything ? */ - const struct nine_lconstf *lconstf = &device->state.vs->lconstf; + const struct nine_lconstf *lconstf = &(context->vs->lconstf); const struct nine_range *r = lconstf->ranges; unsigned n = 0; - float *dst = device->state.vs_lconstf_temp; + float *dst = context->vs_lconstf_temp; float *src = (float *)cb.user_buffer; memcpy(dst, src, cb.buffer_size); while (r) { @@ -274,75 +522,69 @@ } if (!device->driver_caps.user_cbufs) { + context->pipe_data.cb_vs.buffer_size = cb.buffer_size; u_upload_data(device->constbuf_uploader, 0, cb.buffer_size, device->constbuf_alignment, cb.user_buffer, - &cb.buffer_offset, - &cb.buffer); + &context->pipe_data.cb_vs.buffer_offset, + &context->pipe_data.cb_vs.buffer); u_upload_unmap(device->constbuf_uploader); - cb.user_buffer = NULL; - } + context->pipe_data.cb_vs.user_buffer = NULL; + } else + context->pipe_data.cb_vs = cb; - state->pipe.cb_vs = cb; + context->changed.vs_const_f = 0; - if (device->state.changed.vs_const_f) { - struct nine_range *r = device->state.changed.vs_const_f; - struct nine_range *p = r; - while (p->next) - p = p->next; - nine_range_pool_put_chain(&device->range_pool, r, p); - device->state.changed.vs_const_f = NULL; - } - state->changed.group &= ~NINE_STATE_VS_CONST; - state->commit |= NINE_STATE_COMMIT_CONST_VS; + context->changed.group &= ~NINE_STATE_VS_CONST; + context->commit |= NINE_STATE_COMMIT_CONST_VS; } static void prepare_ps_constants_userbuf(struct NineDevice9 *device) { - struct nine_state *state = &device->state; + struct nine_context *context = &device->context; struct pipe_constant_buffer cb; cb.buffer = NULL; cb.buffer_offset = 0; - cb.buffer_size = device->state.ps->const_used_size; - cb.user_buffer = device->state.ps_const_f; + cb.buffer_size = context->ps->const_used_size; + cb.user_buffer = context->ps_const_f; - if (state->changed.ps_const_i) { - int *idst = (int *)&state->ps_const_f[4 * device->max_ps_const_f]; - memcpy(idst, state->ps_const_i, sizeof(state->ps_const_i)); - state->changed.ps_const_i = 0; + if (context->changed.ps_const_i) { + int *idst = (int *)&context->ps_const_f[4 * device->max_ps_const_f]; + memcpy(idst, context->ps_const_i, sizeof(context->ps_const_i)); + context->changed.ps_const_i = 0; } - if (state->changed.ps_const_b) { - int *idst = (int *)&state->ps_const_f[4 * device->max_ps_const_f]; + if (context->changed.ps_const_b) { + int *idst = (int *)&context->ps_const_f[4 * device->max_ps_const_f]; uint32_t *bdst = (uint32_t *)&idst[4 * NINE_MAX_CONST_I]; - memcpy(bdst, state->ps_const_b, sizeof(state->ps_const_b)); - state->changed.ps_const_b = 0; + memcpy(bdst, context->ps_const_b, sizeof(context->ps_const_b)); + context->changed.ps_const_b = 0; } /* Upload special constants needed to implement PS1.x instructions like TEXBEM,TEXBEML and BEM */ - if (device->state.ps->bumpenvmat_needed) { - memcpy(device->state.ps_lconstf_temp, cb.user_buffer, cb.buffer_size); - memcpy(&device->state.ps_lconstf_temp[4 * 8], &device->state.bumpmap_vars, sizeof(device->state.bumpmap_vars)); - - cb.user_buffer = device->state.ps_lconstf_temp; - } - - if (state->ps->byte_code.version < 0x30 && - state->rs[D3DRS_FOGENABLE]) { - float *dst = &state->ps_lconstf_temp[4 * 32]; - if (cb.user_buffer != state->ps_lconstf_temp) { - memcpy(state->ps_lconstf_temp, cb.user_buffer, cb.buffer_size); - cb.user_buffer = state->ps_lconstf_temp; - } - - d3dcolor_to_rgba(dst, state->rs[D3DRS_FOGCOLOR]); - if (state->rs[D3DRS_FOGTABLEMODE] == D3DFOG_LINEAR) { - dst[4] = asfloat(state->rs[D3DRS_FOGEND]); - dst[5] = 1.0f / (asfloat(state->rs[D3DRS_FOGEND]) - asfloat(state->rs[D3DRS_FOGSTART])); - } else if (state->rs[D3DRS_FOGTABLEMODE] != D3DFOG_NONE) { - dst[4] = asfloat(state->rs[D3DRS_FOGDENSITY]); + if (context->ps->bumpenvmat_needed) { + memcpy(context->ps_lconstf_temp, cb.user_buffer, cb.buffer_size); + memcpy(&context->ps_lconstf_temp[4 * 8], &device->context.bumpmap_vars, sizeof(device->context.bumpmap_vars)); + + cb.user_buffer = context->ps_lconstf_temp; + } + + if (context->ps->byte_code.version < 0x30 && + context->rs[D3DRS_FOGENABLE]) { + float *dst = &context->ps_lconstf_temp[4 * 32]; + if (cb.user_buffer != context->ps_lconstf_temp) { + memcpy(context->ps_lconstf_temp, cb.user_buffer, cb.buffer_size); + cb.user_buffer = context->ps_lconstf_temp; + } + + d3dcolor_to_rgba(dst, context->rs[D3DRS_FOGCOLOR]); + if (context->rs[D3DRS_FOGTABLEMODE] == D3DFOG_LINEAR) { + dst[4] = asfloat(context->rs[D3DRS_FOGEND]); + dst[5] = 1.0f / (asfloat(context->rs[D3DRS_FOGEND]) - asfloat(context->rs[D3DRS_FOGSTART])); + } else if (context->rs[D3DRS_FOGTABLEMODE] != D3DFOG_NONE) { + dst[4] = asfloat(context->rs[D3DRS_FOGDENSITY]); } cb.buffer_size = 4 * 4 * 34; } @@ -351,92 +593,86 @@ return; if (!device->driver_caps.user_cbufs) { + context->pipe_data.cb_ps.buffer_size = cb.buffer_size; u_upload_data(device->constbuf_uploader, 0, cb.buffer_size, device->constbuf_alignment, cb.user_buffer, - &cb.buffer_offset, - &cb.buffer); + &context->pipe_data.cb_ps.buffer_offset, + &context->pipe_data.cb_ps.buffer); u_upload_unmap(device->constbuf_uploader); - cb.user_buffer = NULL; - } + context->pipe_data.cb_ps.user_buffer = NULL; + } else + context->pipe_data.cb_ps = cb; - state->pipe.cb_ps = cb; + context->changed.ps_const_f = 0; - if (device->state.changed.ps_const_f) { - struct nine_range *r = device->state.changed.ps_const_f; - struct nine_range *p = r; - while (p->next) - p = p->next; - nine_range_pool_put_chain(&device->range_pool, r, p); - device->state.changed.ps_const_f = NULL; - } - state->changed.group &= ~NINE_STATE_PS_CONST; - state->commit |= NINE_STATE_COMMIT_CONST_PS; + context->changed.group &= ~NINE_STATE_PS_CONST; + context->commit |= NINE_STATE_COMMIT_CONST_PS; } static inline uint32_t prepare_vs(struct NineDevice9 *device, uint8_t shader_changed) { - struct nine_state *state = &device->state; - struct NineVertexShader9 *vs = state->vs; + struct nine_context *context = &device->context; + struct NineVertexShader9 *vs = context->vs; uint32_t changed_group = 0; int has_key_changed = 0; - if (likely(state->programmable_vs)) - has_key_changed = NineVertexShader9_UpdateKey(vs, state); + if (likely(context->programmable_vs)) + has_key_changed = NineVertexShader9_UpdateKey(vs, device); if (!shader_changed && !has_key_changed) return 0; /* likely because we dislike FF */ - if (likely(state->programmable_vs)) { - state->cso.vs = NineVertexShader9_GetVariant(vs); + if (likely(context->programmable_vs)) { + context->cso_shader.vs = NineVertexShader9_GetVariant(vs); } else { vs = device->ff.vs; - state->cso.vs = vs->ff_cso; + context->cso_shader.vs = vs->ff_cso; } - if (state->rs[NINED3DRS_VSPOINTSIZE] != vs->point_size) { - state->rs[NINED3DRS_VSPOINTSIZE] = vs->point_size; + if (context->rs[NINED3DRS_VSPOINTSIZE] != vs->point_size) { + context->rs[NINED3DRS_VSPOINTSIZE] = vs->point_size; changed_group |= NINE_STATE_RASTERIZER; } - if ((state->bound_samplers_mask_vs & vs->sampler_mask) != vs->sampler_mask) + if ((context->bound_samplers_mask_vs & vs->sampler_mask) != vs->sampler_mask) /* Bound dummy sampler. */ changed_group |= NINE_STATE_SAMPLER; - state->commit |= NINE_STATE_COMMIT_VS; + context->commit |= NINE_STATE_COMMIT_VS; return changed_group; } static inline uint32_t prepare_ps(struct NineDevice9 *device, uint8_t shader_changed) { - struct nine_state *state = &device->state; - struct NinePixelShader9 *ps = state->ps; + struct nine_context *context = &device->context; + struct NinePixelShader9 *ps = context->ps; uint32_t changed_group = 0; int has_key_changed = 0; if (likely(ps)) - has_key_changed = NinePixelShader9_UpdateKey(ps, state); + has_key_changed = NinePixelShader9_UpdateKey(ps, context); if (!shader_changed && !has_key_changed) return 0; if (likely(ps)) { - state->cso.ps = NinePixelShader9_GetVariant(ps); + context->cso_shader.ps = NinePixelShader9_GetVariant(ps); } else { ps = device->ff.ps; - state->cso.ps = ps->ff_cso; + context->cso_shader.ps = ps->ff_cso; } - if ((state->bound_samplers_mask_ps & ps->sampler_mask) != ps->sampler_mask) + if ((context->bound_samplers_mask_ps & ps->sampler_mask) != ps->sampler_mask) /* Bound dummy sampler. */ changed_group |= NINE_STATE_SAMPLER; - state->commit |= NINE_STATE_COMMIT_PS; + context->commit |= NINE_STATE_COMMIT_PS; return changed_group; } @@ -447,21 +683,21 @@ static void update_framebuffer(struct NineDevice9 *device, bool is_clear) { - struct pipe_context *pipe = device->pipe; - struct nine_state *state = &device->state; - struct pipe_framebuffer_state *fb = &device->state.fb; + struct nine_context *context = &device->context; + struct pipe_context *pipe = context->pipe; + struct pipe_framebuffer_state *fb = &context->pipe_data.fb; unsigned i; - struct NineSurface9 *rt0 = state->rt[0]; + struct NineSurface9 *rt0 = context->rt[0]; unsigned w = rt0->desc.Width; unsigned h = rt0->desc.Height; - D3DMULTISAMPLE_TYPE nr_samples = rt0->desc.MultiSampleType; - unsigned ps_mask = state->ps ? state->ps->rt_mask : 1; + unsigned nr_samples = rt0->base.info.nr_samples; + unsigned ps_mask = context->ps ? context->ps->rt_mask : 1; unsigned mask = is_clear ? 0xf : ps_mask; - const int sRGB = state->rs[D3DRS_SRGBWRITEENABLE] ? 1 : 0; + const int sRGB = context->rs[D3DRS_SRGBWRITEENABLE] ? 1 : 0; DBG("\n"); - state->rt_mask = 0x0; + context->rt_mask = 0x0; fb->nr_cbufs = 0; /* all render targets must have the same size and the depth buffer must be @@ -474,27 +710,21 @@ * but render to depth buffer. We have to not take into account the render * target info. TODO: know what should happen when there are several render targers * and the first one is D3DFMT_NULL */ - if (rt0->desc.Format == D3DFMT_NULL && state->ds) { - w = state->ds->desc.Width; - h = state->ds->desc.Height; - nr_samples = state->ds->desc.MultiSampleType; + if (rt0->desc.Format == D3DFMT_NULL && context->ds) { + w = context->ds->desc.Width; + h = context->ds->desc.Height; + nr_samples = context->ds->base.info.nr_samples; } for (i = 0; i < device->caps.NumSimultaneousRTs; ++i) { - struct NineSurface9 *rt = state->rt[i]; + struct NineSurface9 *rt = context->rt[i]; if (rt && rt->desc.Format != D3DFMT_NULL && (mask & (1 << i)) && rt->desc.Width == w && rt->desc.Height == h && - rt->desc.MultiSampleType == nr_samples) { + rt->base.info.nr_samples == nr_samples) { fb->cbufs[i] = NineSurface9_GetSurface(rt, sRGB); - state->rt_mask |= 1 << i; + context->rt_mask |= 1 << i; fb->nr_cbufs = i + 1; - - if (unlikely(rt->desc.Usage & D3DUSAGE_AUTOGENMIPMAP)) { - assert(rt->texture == D3DRTYPE_TEXTURE || - rt->texture == D3DRTYPE_CUBETEXTURE); - NineBaseTexture9(rt->base.base.container)->dirty_mip = TRUE; - } } else { /* Color outputs must match RT slot, * drivers will have to handle NULL entries for GL, too. @@ -503,10 +733,10 @@ } } - if (state->ds && state->ds->desc.Width >= w && - state->ds->desc.Height >= h && - state->ds->desc.MultiSampleType == nr_samples) { - fb->zsbuf = NineSurface9_GetSurface(state->ds, 0); + if (context->ds && context->ds->desc.Width >= w && + context->ds->desc.Height >= h && + context->ds->base.info.nr_samples == nr_samples) { + fb->zsbuf = NineSurface9_GetSurface(context->ds, 0); } else { fb->zsbuf = NULL; } @@ -516,14 +746,15 @@ pipe->set_framebuffer_state(pipe, fb); /* XXX: cso ? */ - if (is_clear && state->rt_mask == ps_mask) - state->changed.group &= ~NINE_STATE_FB; + if (is_clear && context->rt_mask == ps_mask) + context->changed.group &= ~NINE_STATE_FB; } static void update_viewport(struct NineDevice9 *device) { - const D3DVIEWPORT9 *vport = &device->state.viewport; + struct nine_context *context = &device->context; + const D3DVIEWPORT9 *vport = &context->viewport; struct pipe_viewport_state pvport; /* D3D coordinates are: @@ -561,7 +792,7 @@ pvport.translate[1] -= 1.0f / 128.0f; } - cso_set_viewport(device->cso, &pvport); + cso_set_viewport(context->cso, &pvport); } /* Loop through VS inputs and pick the vertex elements with the declared @@ -571,8 +802,8 @@ static void update_vertex_elements(struct NineDevice9 *device) { - struct nine_state *state = &device->state; - const struct NineVertexDeclaration9 *vdecl = device->state.vdecl; + struct nine_context *context = &device->context; + const struct NineVertexDeclaration9 *vdecl = device->context.vdecl; const struct NineVertexShader9 *vs; unsigned n, b, i; int index; @@ -582,10 +813,10 @@ BOOL need_dummy_vbo = FALSE; struct pipe_vertex_element ve[PIPE_MAX_ATTRIBS]; - state->stream_usage_mask = 0; + context->stream_usage_mask = 0; memset(vdecl_index_map, -1, 16); memset(used_streams, 0, device->caps.MaxStreams); - vs = state->programmable_vs ? device->state.vs : device->ff.vs; + vs = context->programmable_vs ? context->vs : device->ff.vs; if (vdecl) { for (n = 0; n < vs->num_inputs; ++n) { @@ -625,10 +856,10 @@ if (index >= 0) { ve[n] = vdecl->elems[index]; b = ve[n].vertex_buffer_index; - state->stream_usage_mask |= 1 << b; + context->stream_usage_mask |= 1 << b; /* XXX wine just uses 1 here: */ - if (state->stream_freq[b] & D3DSTREAMSOURCE_INSTANCEDATA) - ve[n].instance_divisor = state->stream_freq[b] & 0x7FFFFF; + if (context->stream_freq[b] & D3DSTREAMSOURCE_INSTANCEDATA) + ve[n].instance_divisor = context->stream_freq[b] & 0x7FFFFF; } else { /* if the vertex declaration is incomplete compared to what the * vertex shader needs, we bind a dummy vbo with 0 0 0 0. @@ -641,77 +872,82 @@ } } - if (state->dummy_vbo_bound_at != dummy_vbo_stream) { - if (state->dummy_vbo_bound_at >= 0) - state->changed.vtxbuf |= 1 << state->dummy_vbo_bound_at; + if (context->dummy_vbo_bound_at != dummy_vbo_stream) { + if (context->dummy_vbo_bound_at >= 0) + context->changed.vtxbuf |= 1 << context->dummy_vbo_bound_at; if (dummy_vbo_stream >= 0) { - state->changed.vtxbuf |= 1 << dummy_vbo_stream; - state->vbo_bound_done = FALSE; + context->changed.vtxbuf |= 1 << dummy_vbo_stream; + context->vbo_bound_done = FALSE; } - state->dummy_vbo_bound_at = dummy_vbo_stream; + context->dummy_vbo_bound_at = dummy_vbo_stream; } - cso_set_vertex_elements(device->cso, vs->num_inputs, ve); - - state->changed.stream_freq = 0; + cso_set_vertex_elements(context->cso, vs->num_inputs, ve); } static void update_vertex_buffers(struct NineDevice9 *device) { - struct pipe_context *pipe = device->pipe; - struct nine_state *state = &device->state; + struct nine_context *context = &device->context; + struct pipe_context *pipe = context->pipe; struct pipe_vertex_buffer dummy_vtxbuf; - uint32_t mask = state->changed.vtxbuf; + uint32_t mask = context->changed.vtxbuf; unsigned i; DBG("mask=%x\n", mask); - if (state->dummy_vbo_bound_at >= 0) { - if (!state->vbo_bound_done) { + if (context->dummy_vbo_bound_at >= 0) { + if (!context->vbo_bound_done) { dummy_vtxbuf.buffer = device->dummy_vbo; dummy_vtxbuf.stride = 0; dummy_vtxbuf.user_buffer = NULL; dummy_vtxbuf.buffer_offset = 0; - pipe->set_vertex_buffers(pipe, state->dummy_vbo_bound_at, + pipe->set_vertex_buffers(pipe, context->dummy_vbo_bound_at, 1, &dummy_vtxbuf); - state->vbo_bound_done = TRUE; + context->vbo_bound_done = TRUE; } - mask &= ~(1 << state->dummy_vbo_bound_at); + mask &= ~(1 << context->dummy_vbo_bound_at); } for (i = 0; mask; mask >>= 1, ++i) { if (mask & 1) { - if (state->vtxbuf[i].buffer) - pipe->set_vertex_buffers(pipe, i, 1, &state->vtxbuf[i]); + if (context->vtxbuf[i].buffer) + pipe->set_vertex_buffers(pipe, i, 1, &context->vtxbuf[i]); else pipe->set_vertex_buffers(pipe, i, 1, NULL); } } - state->changed.vtxbuf = 0; + context->changed.vtxbuf = 0; } static inline boolean -update_sampler_derived(struct nine_state *state, unsigned s) +update_sampler_derived(struct nine_context *context, unsigned s) { boolean changed = FALSE; - if (state->samp[s][NINED3DSAMP_SHADOW] != state->texture[s]->shadow) { + if (context->samp[s][NINED3DSAMP_SHADOW] != context->texture[s].shadow) { changed = TRUE; - state->samp[s][NINED3DSAMP_SHADOW] = state->texture[s]->shadow; + context->samp[s][NINED3DSAMP_SHADOW] = context->texture[s].shadow; } - if (state->samp[s][D3DSAMP_MIPFILTER] != D3DTEXF_NONE) { - int lod = state->samp[s][D3DSAMP_MAXMIPLEVEL] - state->texture[s]->managed.lod; + if (context->samp[s][NINED3DSAMP_CUBETEX] != + (context->texture[s].type == D3DRTYPE_CUBETEXTURE)) { + changed = TRUE; + context->samp[s][NINED3DSAMP_CUBETEX] = + context->texture[s].type == D3DRTYPE_CUBETEXTURE; + } + + if (context->samp[s][D3DSAMP_MIPFILTER] != D3DTEXF_NONE) { + int lod = context->samp[s][D3DSAMP_MAXMIPLEVEL] - context->texture[s].lod; if (lod < 0) lod = 0; - if (state->samp[s][NINED3DSAMP_MINLOD] != lod) { + if (context->samp[s][NINED3DSAMP_MINLOD] != lod) { changed = TRUE; - state->samp[s][NINED3DSAMP_MINLOD] = lod; + context->samp[s][NINED3DSAMP_MINLOD] = lod; } } else { - state->changed.sampler[s] &= ~0x300; /* lod changes irrelevant */ + context->changed.sampler[s] &= ~0x300; /* lod changes irrelevant */ } return changed; @@ -721,37 +957,37 @@ static void update_textures_and_samplers(struct NineDevice9 *device) { - struct nine_state *state = &device->state; + struct nine_context *context = &device->context; struct pipe_sampler_view *view[NINE_MAX_SAMPLERS]; unsigned num_textures; unsigned i; boolean commit_samplers; - uint16_t sampler_mask = state->ps ? state->ps->sampler_mask : + uint16_t sampler_mask = context->ps ? context->ps->sampler_mask : device->ff.ps->sampler_mask; /* TODO: Can we reduce iterations here ? */ commit_samplers = FALSE; - state->bound_samplers_mask_ps = 0; + context->bound_samplers_mask_ps = 0; for (num_textures = 0, i = 0; i < NINE_MAX_SAMPLERS_PS; ++i) { const unsigned s = NINE_SAMPLER_PS(i); int sRGB; - if (!state->texture[s] && !(sampler_mask & (1 << i))) { + if (!context->texture[s].enabled && !(sampler_mask & (1 << i))) { view[i] = NULL; continue; } - if (state->texture[s]) { - sRGB = state->samp[s][D3DSAMP_SRGBTEXTURE] ? 1 : 0; + if (context->texture[s].enabled) { + sRGB = context->samp[s][D3DSAMP_SRGBTEXTURE] ? 1 : 0; - view[i] = NineBaseTexture9_GetSamplerView(state->texture[s], sRGB); + view[i] = context->texture[s].view[sRGB]; num_textures = i + 1; - if (update_sampler_derived(state, s) || (state->changed.sampler[s] & 0x05fe)) { - state->changed.sampler[s] = 0; + if (update_sampler_derived(context, s) || (context->changed.sampler[s] & 0x05fe)) { + context->changed.sampler[s] = 0; commit_samplers = TRUE; - nine_convert_sampler_state(device->cso, s, state->samp[s]); + nine_convert_sampler_state(context->cso, s, context->samp[s]); } } else { /* Bind dummy sampler. We do not bind dummy sampler when @@ -763,43 +999,43 @@ view[i] = device->dummy_sampler_view; num_textures = i + 1; - cso_single_sampler(device->cso, PIPE_SHADER_FRAGMENT, + cso_single_sampler(context->cso, PIPE_SHADER_FRAGMENT, s - NINE_SAMPLER_PS(0), &device->dummy_sampler_state); commit_samplers = TRUE; - state->changed.sampler[s] = ~0; + context->changed.sampler[s] = ~0; } - state->bound_samplers_mask_ps |= (1 << s); + context->bound_samplers_mask_ps |= (1 << s); } - cso_set_sampler_views(device->cso, PIPE_SHADER_FRAGMENT, num_textures, view); + cso_set_sampler_views(context->cso, PIPE_SHADER_FRAGMENT, num_textures, view); if (commit_samplers) - cso_single_sampler_done(device->cso, PIPE_SHADER_FRAGMENT); + cso_single_sampler_done(context->cso, PIPE_SHADER_FRAGMENT); commit_samplers = FALSE; - sampler_mask = state->programmable_vs ? state->vs->sampler_mask : 0; - state->bound_samplers_mask_vs = 0; + sampler_mask = context->programmable_vs ? context->vs->sampler_mask : 0; + context->bound_samplers_mask_vs = 0; for (num_textures = 0, i = 0; i < NINE_MAX_SAMPLERS_VS; ++i) { const unsigned s = NINE_SAMPLER_VS(i); int sRGB; - if (!state->texture[s] && !(sampler_mask & (1 << i))) { + if (!context->texture[s].enabled && !(sampler_mask & (1 << i))) { view[i] = NULL; continue; } - if (state->texture[s]) { - sRGB = state->samp[s][D3DSAMP_SRGBTEXTURE] ? 1 : 0; + if (context->texture[s].enabled) { + sRGB = context->samp[s][D3DSAMP_SRGBTEXTURE] ? 1 : 0; - view[i] = NineBaseTexture9_GetSamplerView(state->texture[s], sRGB); + view[i] = context->texture[s].view[sRGB]; num_textures = i + 1; - if (update_sampler_derived(state, s) || (state->changed.sampler[s] & 0x05fe)) { - state->changed.sampler[s] = 0; + if (update_sampler_derived(context, s) || (context->changed.sampler[s] & 0x05fe)) { + context->changed.sampler[s] = 0; commit_samplers = TRUE; - nine_convert_sampler_state(device->cso, s, state->samp[s]); + nine_convert_sampler_state(context->cso, s, context->samp[s]); } } else { /* Bind dummy sampler. We do not bind dummy sampler when @@ -811,22 +1047,20 @@ view[i] = device->dummy_sampler_view; num_textures = i + 1; - cso_single_sampler(device->cso, PIPE_SHADER_VERTEX, + cso_single_sampler(context->cso, PIPE_SHADER_VERTEX, s - NINE_SAMPLER_VS(0), &device->dummy_sampler_state); commit_samplers = TRUE; - state->changed.sampler[s] = ~0; + context->changed.sampler[s] = ~0; } - state->bound_samplers_mask_vs |= (1 << s); + context->bound_samplers_mask_vs |= (1 << s); } - cso_set_sampler_views(device->cso, PIPE_SHADER_VERTEX, num_textures, view); + cso_set_sampler_views(context->cso, PIPE_SHADER_VERTEX, num_textures, view); if (commit_samplers) - cso_single_sampler_done(device->cso, PIPE_SHADER_VERTEX); - - state->changed.texture = 0; + cso_single_sampler_done(context->cso, PIPE_SHADER_VERTEX); } /* State commit only */ @@ -834,35 +1068,43 @@ static inline void commit_blend(struct NineDevice9 *device) { - cso_set_blend(device->cso, &device->state.pipe.blend); + struct nine_context *context = &device->context; + + cso_set_blend(context->cso, &context->pipe_data.blend); } static inline void commit_dsa(struct NineDevice9 *device) { - cso_set_depth_stencil_alpha(device->cso, &device->state.pipe.dsa); + struct nine_context *context = &device->context; + + cso_set_depth_stencil_alpha(context->cso, &context->pipe_data.dsa); } static inline void commit_scissor(struct NineDevice9 *device) { - struct pipe_context *pipe = device->pipe; + struct nine_context *context = &device->context; + struct pipe_context *pipe = context->pipe; - pipe->set_scissor_states(pipe, 0, 1, &device->state.scissor); + pipe->set_scissor_states(pipe, 0, 1, &context->scissor); } static inline void commit_rasterizer(struct NineDevice9 *device) { - cso_set_rasterizer(device->cso, &device->state.pipe.rast); + struct nine_context *context = &device->context; + + cso_set_rasterizer(context->cso, &context->pipe_data.rast); } static inline void commit_index_buffer(struct NineDevice9 *device) { - struct pipe_context *pipe = device->pipe; - if (device->state.idxbuf) - pipe->set_index_buffer(pipe, &device->state.idxbuf->buffer); + struct nine_context *context = &device->context; + struct pipe_context *pipe = context->pipe; + if (context->idxbuf.buffer) + pipe->set_index_buffer(pipe, &context->idxbuf); else pipe->set_index_buffer(pipe, NULL); } @@ -870,40 +1112,50 @@ static inline void commit_vs_constants(struct NineDevice9 *device) { - struct pipe_context *pipe = device->pipe; + struct nine_context *context = &device->context; + struct pipe_context *pipe = context->pipe; - if (unlikely(!device->state.programmable_vs)) - pipe->set_constant_buffer(pipe, PIPE_SHADER_VERTEX, 0, &device->state.pipe.cb_vs_ff); - else - pipe->set_constant_buffer(pipe, PIPE_SHADER_VERTEX, 0, &device->state.pipe.cb_vs); + if (unlikely(!context->programmable_vs)) + pipe->set_constant_buffer(pipe, PIPE_SHADER_VERTEX, 0, &context->pipe_data.cb_vs_ff); + else { + if (context->swvp) { + pipe->set_constant_buffer(pipe, PIPE_SHADER_VERTEX, 0, &context->pipe_data.cb0_swvp); + pipe->set_constant_buffer(pipe, PIPE_SHADER_VERTEX, 1, &context->pipe_data.cb1_swvp); + pipe->set_constant_buffer(pipe, PIPE_SHADER_VERTEX, 2, &context->pipe_data.cb2_swvp); + pipe->set_constant_buffer(pipe, PIPE_SHADER_VERTEX, 3, &context->pipe_data.cb3_swvp); + } else { + pipe->set_constant_buffer(pipe, PIPE_SHADER_VERTEX, 0, &context->pipe_data.cb_vs); + } + } } static inline void commit_ps_constants(struct NineDevice9 *device) { - struct pipe_context *pipe = device->pipe; + struct nine_context *context = &device->context; + struct pipe_context *pipe = context->pipe; - if (unlikely(!device->state.ps)) - pipe->set_constant_buffer(pipe, PIPE_SHADER_FRAGMENT, 0, &device->state.pipe.cb_ps_ff); + if (unlikely(!context->ps)) + pipe->set_constant_buffer(pipe, PIPE_SHADER_FRAGMENT, 0, &context->pipe_data.cb_ps_ff); else - pipe->set_constant_buffer(pipe, PIPE_SHADER_FRAGMENT, 0, &device->state.pipe.cb_ps); + pipe->set_constant_buffer(pipe, PIPE_SHADER_FRAGMENT, 0, &context->pipe_data.cb_ps); } static inline void commit_vs(struct NineDevice9 *device) { - struct nine_state *state = &device->state; + struct nine_context *context = &device->context; - device->pipe->bind_vs_state(device->pipe, state->cso.vs); + context->pipe->bind_vs_state(context->pipe, context->cso_shader.vs); } static inline void commit_ps(struct NineDevice9 *device) { - struct nine_state *state = &device->state; + struct nine_context *context = &device->context; - device->pipe->bind_fs_state(device->pipe, state->cso.ps); + context->pipe->bind_fs_state(context->pipe, context->cso_shader.ps); } /* State Update */ @@ -911,7 +1163,8 @@ (NINE_STATE_VS | \ NINE_STATE_TEXTURE | \ NINE_STATE_FOG_SHADER | \ - NINE_STATE_POINTSIZE_SHADER) + NINE_STATE_POINTSIZE_SHADER | \ + NINE_STATE_SWVP) #define NINE_STATE_SHADER_CHANGE_PS \ (NINE_STATE_PS | \ @@ -942,47 +1195,14 @@ NINE_STATE_STENCIL_REF | \ NINE_STATE_SAMPLE_MASK) - -/* TODO: only go through dirty textures */ -static void -validate_textures(struct NineDevice9 *device) -{ - struct NineBaseTexture9 *tex, *ptr; - LIST_FOR_EACH_ENTRY_SAFE(tex, ptr, &device->update_textures, list) { - list_delinit(&tex->list); - NineBaseTexture9_Validate(tex); - } -} - static void -update_managed_buffers(struct NineDevice9 *device) -{ - struct NineBuffer9 *buf, *ptr; - LIST_FOR_EACH_ENTRY_SAFE(buf, ptr, &device->update_buffers, managed.list) { - list_delinit(&buf->managed.list); - NineBuffer9_Upload(buf); - } -} - -void -nine_update_state_framebuffer_clear(struct NineDevice9 *device) -{ - struct nine_state *state = &device->state; - - validate_textures(device); - - if (state->changed.group & NINE_STATE_FB) - update_framebuffer(device, TRUE); -} - -boolean nine_update_state(struct NineDevice9 *device) { - struct pipe_context *pipe = device->pipe; - struct nine_state *state = &device->state; + struct nine_context *context = &device->context; + struct pipe_context *pipe = context->pipe; uint32_t group; - DBG("changed state groups: %x\n", state->changed.group); + DBG("changed state groups: %x\n", context->changed.group); /* NOTE: We may want to use the cso cache for everything, or let * NineDevice9.RestoreNonCSOState actually set the states, then we wouldn't @@ -990,13 +1210,11 @@ * into update_textures. Except, we also need to re-validate textures that * may be dirty anyway, even if no texture bindings changed. */ - validate_textures(device); /* may clobber state */ - update_managed_buffers(device); /* ff_update may change VS/PS dirty bits */ - if (unlikely(!state->programmable_vs || !state->ps)) + if (unlikely(!context->programmable_vs || !context->ps)) nine_ff_update(device); - group = state->changed.group; + group = context->changed.group; if (group & (NINE_STATE_SHADER_CHANGE_VS | NINE_STATE_SHADER_CHANGE_PS)) { if (group & NINE_STATE_SHADER_CHANGE_VS) @@ -1020,49 +1238,42 @@ commit_index_buffer(device); } - if (likely(group & (NINE_STATE_FREQUENT | NINE_STATE_VS | NINE_STATE_PS))) { + if (likely(group & (NINE_STATE_FREQUENT | NINE_STATE_VS | NINE_STATE_PS | NINE_STATE_SWVP))) { if (group & NINE_STATE_MULTISAMPLE) group |= check_multisample(device); if (group & NINE_STATE_RASTERIZER) prepare_rasterizer(device); if (group & (NINE_STATE_TEXTURE | NINE_STATE_SAMPLER)) update_textures_and_samplers(device); - if (device->prefer_user_constbuf) { - if ((group & (NINE_STATE_VS_CONST | NINE_STATE_VS)) && state->programmable_vs) - prepare_vs_constants_userbuf(device); - if ((group & (NINE_STATE_PS_CONST | NINE_STATE_PS)) && state->ps) - prepare_ps_constants_userbuf(device); - } else { - if ((group & NINE_STATE_VS_CONST) && state->programmable_vs) - upload_constants(device, PIPE_SHADER_VERTEX); - if ((group & NINE_STATE_PS_CONST) && state->ps) - upload_constants(device, PIPE_SHADER_FRAGMENT); - } + if ((group & (NINE_STATE_VS_CONST | NINE_STATE_VS | NINE_STATE_SWVP)) && context->programmable_vs) + prepare_vs_constants_userbuf(device); + if ((group & (NINE_STATE_PS_CONST | NINE_STATE_PS)) && context->ps) + prepare_ps_constants_userbuf(device); } - if (state->changed.vtxbuf) + if (context->changed.vtxbuf) update_vertex_buffers(device); - if (state->commit & NINE_STATE_COMMIT_BLEND) + if (context->commit & NINE_STATE_COMMIT_BLEND) commit_blend(device); - if (state->commit & NINE_STATE_COMMIT_DSA) + if (context->commit & NINE_STATE_COMMIT_DSA) commit_dsa(device); - if (state->commit & NINE_STATE_COMMIT_RASTERIZER) + if (context->commit & NINE_STATE_COMMIT_RASTERIZER) commit_rasterizer(device); - if (state->commit & NINE_STATE_COMMIT_CONST_VS) + if (context->commit & NINE_STATE_COMMIT_CONST_VS) commit_vs_constants(device); - if (state->commit & NINE_STATE_COMMIT_CONST_PS) + if (context->commit & NINE_STATE_COMMIT_CONST_PS) commit_ps_constants(device); - if (state->commit & NINE_STATE_COMMIT_VS) + if (context->commit & NINE_STATE_COMMIT_VS) commit_vs(device); - if (state->commit & NINE_STATE_COMMIT_PS) + if (context->commit & NINE_STATE_COMMIT_PS) commit_ps(device); - state->commit = 0; + context->commit = 0; - if (unlikely(state->changed.ucp)) { - pipe->set_clip_state(pipe, &state->clip); - state->changed.ucp = 0; + if (unlikely(context->changed.ucp)) { + pipe->set_clip_state(pipe, &context->clip); + context->changed.ucp = FALSE; } if (unlikely(group & NINE_STATE_RARE)) { @@ -1070,39 +1281,1573 @@ commit_scissor(device); if (group & NINE_STATE_BLEND_COLOR) { struct pipe_blend_color color; - d3dcolor_to_rgba(&color.color[0], state->rs[D3DRS_BLENDFACTOR]); + d3dcolor_to_rgba(&color.color[0], context->rs[D3DRS_BLENDFACTOR]); pipe->set_blend_color(pipe, &color); } if (group & NINE_STATE_SAMPLE_MASK) { - pipe->set_sample_mask(pipe, state->rs[D3DRS_MULTISAMPLEMASK]); + if (context->rt[0]->desc.MultiSampleType <= D3DMULTISAMPLE_NONMASKABLE) { + pipe->set_sample_mask(pipe, ~0); + } else { + pipe->set_sample_mask(pipe, context->rs[D3DRS_MULTISAMPLEMASK]); + } } if (group & NINE_STATE_STENCIL_REF) { struct pipe_stencil_ref ref; - ref.ref_value[0] = state->rs[D3DRS_STENCILREF]; + ref.ref_value[0] = context->rs[D3DRS_STENCILREF]; ref.ref_value[1] = ref.ref_value[0]; pipe->set_stencil_ref(pipe, &ref); } } - device->state.changed.group &= + context->changed.group &= (NINE_STATE_FF | NINE_STATE_VS_CONST | NINE_STATE_PS_CONST); DBG("finished\n"); +} + +#define RESZ_CODE 0x7fa05000 + +static void +NineDevice9_ResolveZ( struct NineDevice9 *device ) +{ + struct nine_context *context = &device->context; + const struct util_format_description *desc; + struct NineSurface9 *source = context->ds; + struct pipe_resource *src, *dst; + struct pipe_blit_info blit; + + DBG("RESZ resolve\n"); + + if (!source || !context->texture[0].enabled || + context->texture[0].type != D3DRTYPE_TEXTURE) + return; + + src = source->base.resource; + dst = context->texture[0].resource; + + if (!src || !dst) + return; + + /* check dst is depth format. we know already for src */ + desc = util_format_description(dst->format); + if (desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS) + return; - return TRUE; + memset(&blit, 0, sizeof(blit)); + blit.src.resource = src; + blit.src.level = 0; + blit.src.format = src->format; + blit.src.box.z = 0; + blit.src.box.depth = 1; + blit.src.box.x = 0; + blit.src.box.y = 0; + blit.src.box.width = src->width0; + blit.src.box.height = src->height0; + + blit.dst.resource = dst; + blit.dst.level = 0; + blit.dst.format = dst->format; + blit.dst.box.z = 0; + blit.dst.box.depth = 1; + blit.dst.box.x = 0; + blit.dst.box.y = 0; + blit.dst.box.width = dst->width0; + blit.dst.box.height = dst->height0; + + blit.mask = PIPE_MASK_ZS; + blit.filter = PIPE_TEX_FILTER_NEAREST; + blit.scissor_enable = FALSE; + + context->pipe->blit(context->pipe, &blit); } -/* State defaults */ +#define ALPHA_TO_COVERAGE_ENABLE MAKEFOURCC('A', '2', 'M', '1') +#define ALPHA_TO_COVERAGE_DISABLE MAKEFOURCC('A', '2', 'M', '0') -static const DWORD nine_render_state_defaults[NINED3DRS_LAST + 1] = +/* Nine_context functions. + * Serialized through CSMT macros. + */ + +static void +nine_context_set_texture_apply(struct NineDevice9 *device, + DWORD stage, + BOOL enabled, + BOOL shadow, + DWORD lod, + D3DRESOURCETYPE type, + uint8_t pstype, + struct pipe_resource *res, + struct pipe_sampler_view *view0, + struct pipe_sampler_view *view1); +static void +nine_context_set_stream_source_apply(struct NineDevice9 *device, + UINT StreamNumber, + struct pipe_resource *res, + UINT OffsetInBytes, + UINT Stride); + +static void +nine_context_set_indices_apply(struct NineDevice9 *device, + struct pipe_resource *res, + UINT IndexSize, + UINT OffsetInBytes); + +static void +nine_context_set_pixel_shader_constant_i_transformed(struct NineDevice9 *device, + UINT StartRegister, + const int *pConstantData, + unsigned pConstantData_size, + UINT Vector4iCount); + +CSMT_ITEM_NO_WAIT(nine_context_set_render_state, + ARG_VAL(D3DRENDERSTATETYPE, State), + ARG_VAL(DWORD, Value)) +{ + struct nine_context *context = &device->context; + + /* Amd hacks (equivalent to GL extensions) */ + if (unlikely(State == D3DRS_POINTSIZE)) { + if (Value == RESZ_CODE) { + NineDevice9_ResolveZ(device); + return; + } + + if (Value == ALPHA_TO_COVERAGE_ENABLE || + Value == ALPHA_TO_COVERAGE_DISABLE) { + context->rs[NINED3DRS_ALPHACOVERAGE] = (Value == ALPHA_TO_COVERAGE_ENABLE); + context->changed.group |= NINE_STATE_BLEND; + return; + } + } + + /* NV hack */ + if (unlikely(State == D3DRS_ADAPTIVETESS_Y)) { + if (Value == D3DFMT_ATOC || (Value == D3DFMT_UNKNOWN && context->rs[NINED3DRS_ALPHACOVERAGE])) { + context->rs[NINED3DRS_ALPHACOVERAGE] = (Value == D3DFMT_ATOC) ? 3 : 0; + context->rs[NINED3DRS_ALPHACOVERAGE] &= context->rs[D3DRS_ALPHATESTENABLE] ? 3 : 2; + context->changed.group |= NINE_STATE_BLEND; + return; + } + } + if (unlikely(State == D3DRS_ALPHATESTENABLE && (context->rs[NINED3DRS_ALPHACOVERAGE] & 2))) { + DWORD alphacoverage_prev = context->rs[NINED3DRS_ALPHACOVERAGE]; + context->rs[NINED3DRS_ALPHACOVERAGE] = (Value ? 3 : 2); + if (context->rs[NINED3DRS_ALPHACOVERAGE] != alphacoverage_prev) + context->changed.group |= NINE_STATE_BLEND; + } + + context->rs[State] = nine_fix_render_state_value(State, Value); + context->changed.group |= nine_render_state_group[State]; +} + +CSMT_ITEM_NO_WAIT(nine_context_set_texture_apply, + ARG_VAL(DWORD, stage), + ARG_VAL(BOOL, enabled), + ARG_VAL(BOOL, shadow), + ARG_VAL(DWORD, lod), + ARG_VAL(D3DRESOURCETYPE, type), + ARG_VAL(uint8_t, pstype), + ARG_BIND_RES(struct pipe_resource, res), + ARG_BIND_VIEW(struct pipe_sampler_view, view0), + ARG_BIND_VIEW(struct pipe_sampler_view, view1)) +{ + struct nine_context *context = &device->context; + + context->texture[stage].enabled = enabled; + context->samplers_shadow &= ~(1 << stage); + context->samplers_shadow |= shadow << stage; + context->texture[stage].shadow = shadow; + context->texture[stage].lod = lod; + context->texture[stage].type = type; + context->texture[stage].pstype = pstype; + pipe_resource_reference(&context->texture[stage].resource, res); + pipe_sampler_view_reference(&context->texture[stage].view[0], view0); + pipe_sampler_view_reference(&context->texture[stage].view[1], view1); + + context->changed.group |= NINE_STATE_TEXTURE; +} + +void +nine_context_set_texture(struct NineDevice9 *device, + DWORD Stage, + struct NineBaseTexture9 *tex) +{ + BOOL enabled = FALSE; + BOOL shadow = FALSE; + DWORD lod = 0; + D3DRESOURCETYPE type = D3DRTYPE_TEXTURE; + uint8_t pstype = 0; + struct pipe_resource *res = NULL; + struct pipe_sampler_view *view0 = NULL, *view1 = NULL; + + /* For managed pool, the data can be initially incomplete. + * In that case, the texture is rebound later + * (in NineBaseTexture9_Validate/NineBaseTexture9_UploadSelf). */ + if (tex && tex->base.resource) { + enabled = TRUE; + shadow = tex->shadow; + lod = tex->managed.lod; + type = tex->base.type; + pstype = tex->pstype; + res = tex->base.resource; + view0 = NineBaseTexture9_GetSamplerView(tex, 0); + view1 = NineBaseTexture9_GetSamplerView(tex, 1); + } + + nine_context_set_texture_apply(device, Stage, enabled, + shadow, lod, type, pstype, + res, view0, view1); +} + +CSMT_ITEM_NO_WAIT(nine_context_set_sampler_state, + ARG_VAL(DWORD, Sampler), + ARG_VAL(D3DSAMPLERSTATETYPE, Type), + ARG_VAL(DWORD, Value)) { - /* [D3DRS_ZENABLE] = D3DZB_TRUE; wine: auto_depth_stencil */ - [D3DRS_ZENABLE] = D3DZB_FALSE, - [D3DRS_FILLMODE] = D3DFILL_SOLID, - [D3DRS_SHADEMODE] = D3DSHADE_GOURAUD, -/* [D3DRS_LINEPATTERN] = 0x00000000, */ - [D3DRS_ZWRITEENABLE] = TRUE, - [D3DRS_ALPHATESTENABLE] = FALSE, + struct nine_context *context = &device->context; + + if (unlikely(!nine_check_sampler_state_value(Type, Value))) + return; + + context->samp[Sampler][Type] = Value; + context->changed.group |= NINE_STATE_SAMPLER; + context->changed.sampler[Sampler] |= 1 << Type; +} + +CSMT_ITEM_NO_WAIT(nine_context_set_stream_source_apply, + ARG_VAL(UINT, StreamNumber), + ARG_BIND_RES(struct pipe_resource, res), + ARG_VAL(UINT, OffsetInBytes), + ARG_VAL(UINT, Stride)) +{ + struct nine_context *context = &device->context; + const unsigned i = StreamNumber; + + context->vtxbuf[i].stride = Stride; + context->vtxbuf[i].buffer_offset = OffsetInBytes; + pipe_resource_reference(&context->vtxbuf[i].buffer, res); + + context->changed.vtxbuf |= 1 << StreamNumber; +} + +void +nine_context_set_stream_source(struct NineDevice9 *device, + UINT StreamNumber, + struct NineVertexBuffer9 *pVBuf9, + UINT OffsetInBytes, + UINT Stride) +{ + struct pipe_resource *res = NULL; + unsigned offset = 0; + + if (pVBuf9) + res = NineVertexBuffer9_GetResource(pVBuf9, &offset); + /* in the future when there is internal offset, add it + * to OffsetInBytes */ + + nine_context_set_stream_source_apply(device, StreamNumber, + res, offset + OffsetInBytes, + Stride); +} + +CSMT_ITEM_NO_WAIT(nine_context_set_stream_source_freq, + ARG_VAL(UINT, StreamNumber), + ARG_VAL(UINT, Setting)) +{ + struct nine_context *context = &device->context; + + context->stream_freq[StreamNumber] = Setting; + + if (Setting & D3DSTREAMSOURCE_INSTANCEDATA) + context->stream_instancedata_mask |= 1 << StreamNumber; + else + context->stream_instancedata_mask &= ~(1 << StreamNumber); + + if (StreamNumber != 0) + context->changed.group |= NINE_STATE_STREAMFREQ; +} + +CSMT_ITEM_NO_WAIT(nine_context_set_indices_apply, + ARG_BIND_RES(struct pipe_resource, res), + ARG_VAL(UINT, IndexSize), + ARG_VAL(UINT, OffsetInBytes)) +{ + struct nine_context *context = &device->context; + + context->idxbuf.index_size = IndexSize; + context->idxbuf.offset = OffsetInBytes; + pipe_resource_reference(&context->idxbuf.buffer, res); + context->idxbuf.user_buffer = NULL; + + context->changed.group |= NINE_STATE_IDXBUF; +} + +void +nine_context_set_indices(struct NineDevice9 *device, + struct NineIndexBuffer9 *idxbuf) +{ + const struct pipe_index_buffer *pipe_idxbuf; + struct pipe_resource *res = NULL; + UINT IndexSize = 0; + UINT OffsetInBytes = 0; + + if (idxbuf) { + pipe_idxbuf = NineIndexBuffer9_GetBuffer(idxbuf); + IndexSize = pipe_idxbuf->index_size; + res = pipe_idxbuf->buffer; + OffsetInBytes = pipe_idxbuf->offset; + } + + nine_context_set_indices_apply(device, res, IndexSize, OffsetInBytes); +} + +CSMT_ITEM_NO_WAIT(nine_context_set_vertex_declaration, + ARG_BIND_REF(struct NineVertexDeclaration9, vdecl)) +{ + struct nine_context *context = &device->context; + BOOL was_programmable_vs = context->programmable_vs; + + nine_bind(&context->vdecl, vdecl); + + context->programmable_vs = context->vs && !(context->vdecl && context->vdecl->position_t); + if (was_programmable_vs != context->programmable_vs) { + context->commit |= NINE_STATE_COMMIT_CONST_VS; + context->changed.group |= NINE_STATE_VS; + } + + context->changed.group |= NINE_STATE_VDECL; +} + +CSMT_ITEM_NO_WAIT(nine_context_set_vertex_shader, + ARG_BIND_REF(struct NineVertexShader9, pShader)) +{ + struct nine_context *context = &device->context; + BOOL was_programmable_vs = context->programmable_vs; + + nine_bind(&context->vs, pShader); + + context->programmable_vs = context->vs && !(context->vdecl && context->vdecl->position_t); + + /* ff -> non-ff: commit back non-ff constants */ + if (!was_programmable_vs && context->programmable_vs) + context->commit |= NINE_STATE_COMMIT_CONST_VS; + + context->changed.group |= NINE_STATE_VS; +} + +CSMT_ITEM_NO_WAIT(nine_context_set_vertex_shader_constant_f, + ARG_VAL(UINT, StartRegister), + ARG_MEM(float, pConstantData), + ARG_MEM_SIZE(unsigned, pConstantData_size), + ARG_VAL(UINT, Vector4fCount)) +{ + struct nine_context *context = &device->context; + float *vs_const_f = device->may_swvp ? context->vs_const_f_swvp : context->vs_const_f; + + memcpy(&vs_const_f[StartRegister * 4], + pConstantData, + pConstantData_size); + + if (device->may_swvp) { + Vector4fCount = MIN2(StartRegister + Vector4fCount, NINE_MAX_CONST_F) - StartRegister; + if (StartRegister < NINE_MAX_CONST_F) + memcpy(&context->vs_const_f[StartRegister * 4], + pConstantData, + Vector4fCount * 4 * sizeof(context->vs_const_f[0])); + } + + context->changed.vs_const_f = TRUE; + context->changed.group |= NINE_STATE_VS_CONST; +} + +CSMT_ITEM_NO_WAIT(nine_context_set_vertex_shader_constant_i, + ARG_VAL(UINT, StartRegister), + ARG_MEM(int, pConstantData), + ARG_MEM_SIZE(unsigned, pConstantData_size), + ARG_VAL(UINT, Vector4iCount)) +{ + struct nine_context *context = &device->context; + int i; + + if (device->driver_caps.vs_integer) { + memcpy(&context->vs_const_i[4 * StartRegister], + pConstantData, + pConstantData_size); + } else { + for (i = 0; i < Vector4iCount; i++) { + context->vs_const_i[4 * (StartRegister + i)] = fui((float)(pConstantData[4 * i])); + context->vs_const_i[4 * (StartRegister + i) + 1] = fui((float)(pConstantData[4 * i + 1])); + context->vs_const_i[4 * (StartRegister + i) + 2] = fui((float)(pConstantData[4 * i + 2])); + context->vs_const_i[4 * (StartRegister + i) + 3] = fui((float)(pConstantData[4 * i + 3])); + } + } + + context->changed.vs_const_i = TRUE; + context->changed.group |= NINE_STATE_VS_CONST; +} + +CSMT_ITEM_NO_WAIT(nine_context_set_vertex_shader_constant_b, + ARG_VAL(UINT, StartRegister), + ARG_MEM(BOOL, pConstantData), + ARG_MEM_SIZE(unsigned, pConstantData_size), + ARG_VAL(UINT, BoolCount)) +{ + struct nine_context *context = &device->context; + int i; + uint32_t bool_true = device->driver_caps.vs_integer ? 0xFFFFFFFF : fui(1.0f); + + (void) pConstantData_size; + + for (i = 0; i < BoolCount; i++) + context->vs_const_b[StartRegister + i] = pConstantData[i] ? bool_true : 0; + + context->changed.vs_const_b = TRUE; + context->changed.group |= NINE_STATE_VS_CONST; +} + +CSMT_ITEM_NO_WAIT(nine_context_set_pixel_shader, + ARG_BIND_REF(struct NinePixelShader9, ps)) +{ + struct nine_context *context = &device->context; + unsigned old_mask = context->ps ? context->ps->rt_mask : 1; + unsigned mask; + + /* ff -> non-ff: commit back non-ff constants */ + if (!context->ps && ps) + context->commit |= NINE_STATE_COMMIT_CONST_PS; + + nine_bind(&context->ps, ps); + + context->changed.group |= NINE_STATE_PS; + + mask = context->ps ? context->ps->rt_mask : 1; + /* We need to update cbufs if the pixel shader would + * write to different render targets */ + if (mask != old_mask) + context->changed.group |= NINE_STATE_FB; +} + +CSMT_ITEM_NO_WAIT(nine_context_set_pixel_shader_constant_f, + ARG_VAL(UINT, StartRegister), + ARG_MEM(float, pConstantData), + ARG_MEM_SIZE(unsigned, pConstantData_size), + ARG_VAL(UINT, Vector4fCount)) +{ + struct nine_context *context = &device->context; + + memcpy(&context->ps_const_f[StartRegister * 4], + pConstantData, + pConstantData_size); + + context->changed.ps_const_f = TRUE; + context->changed.group |= NINE_STATE_PS_CONST; +} + +/* For stateblocks */ +CSMT_ITEM_NO_WAIT(nine_context_set_pixel_shader_constant_i_transformed, + ARG_VAL(UINT, StartRegister), + ARG_MEM(int, pConstantData), + ARG_MEM_SIZE(unsigned, pConstantData_size), + ARG_VAL(UINT, Vector4iCount)) +{ + struct nine_context *context = &device->context; + + memcpy(&context->ps_const_i[StartRegister][0], + pConstantData, + Vector4iCount * sizeof(context->ps_const_i[0])); + + context->changed.ps_const_i = TRUE; + context->changed.group |= NINE_STATE_PS_CONST; +} + +CSMT_ITEM_NO_WAIT(nine_context_set_pixel_shader_constant_i, + ARG_VAL(UINT, StartRegister), + ARG_MEM(int, pConstantData), + ARG_MEM_SIZE(unsigned, pConstantData_size), + ARG_VAL(UINT, Vector4iCount)) +{ + struct nine_context *context = &device->context; + int i; + + if (device->driver_caps.ps_integer) { + memcpy(&context->ps_const_i[StartRegister][0], + pConstantData, + pConstantData_size); + } else { + for (i = 0; i < Vector4iCount; i++) { + context->ps_const_i[StartRegister+i][0] = fui((float)(pConstantData[4*i])); + context->ps_const_i[StartRegister+i][1] = fui((float)(pConstantData[4*i+1])); + context->ps_const_i[StartRegister+i][2] = fui((float)(pConstantData[4*i+2])); + context->ps_const_i[StartRegister+i][3] = fui((float)(pConstantData[4*i+3])); + } + } + context->changed.ps_const_i = TRUE; + context->changed.group |= NINE_STATE_PS_CONST; +} + +CSMT_ITEM_NO_WAIT(nine_context_set_pixel_shader_constant_b, + ARG_VAL(UINT, StartRegister), + ARG_MEM(BOOL, pConstantData), + ARG_MEM_SIZE(unsigned, pConstantData_size), + ARG_VAL(UINT, BoolCount)) +{ + struct nine_context *context = &device->context; + int i; + uint32_t bool_true = device->driver_caps.ps_integer ? 0xFFFFFFFF : fui(1.0f); + + (void) pConstantData_size; + + for (i = 0; i < BoolCount; i++) + context->ps_const_b[StartRegister + i] = pConstantData[i] ? bool_true : 0; + + context->changed.ps_const_b = TRUE; + context->changed.group |= NINE_STATE_PS_CONST; +} + +/* XXX: use resource, as resource might change */ +CSMT_ITEM_NO_WAIT(nine_context_set_render_target, + ARG_VAL(DWORD, RenderTargetIndex), + ARG_BIND_REF(struct NineSurface9, rt)) +{ + struct nine_context *context = &device->context; + const unsigned i = RenderTargetIndex; + + if (i == 0) { + context->viewport.X = 0; + context->viewport.Y = 0; + context->viewport.Width = rt->desc.Width; + context->viewport.Height = rt->desc.Height; + context->viewport.MinZ = 0.0f; + context->viewport.MaxZ = 1.0f; + + context->scissor.minx = 0; + context->scissor.miny = 0; + context->scissor.maxx = rt->desc.Width; + context->scissor.maxy = rt->desc.Height; + + context->changed.group |= NINE_STATE_VIEWPORT | NINE_STATE_SCISSOR | NINE_STATE_MULTISAMPLE; + + if (context->rt[0] && + (context->rt[0]->desc.MultiSampleType <= D3DMULTISAMPLE_NONMASKABLE) != + (rt->desc.MultiSampleType <= D3DMULTISAMPLE_NONMASKABLE)) + context->changed.group |= NINE_STATE_SAMPLE_MASK; + } + + if (context->rt[i] != rt) { + nine_bind(&context->rt[i], rt); + context->changed.group |= NINE_STATE_FB; + } +} + +/* XXX: use resource instead of ds, as resource might change */ +CSMT_ITEM_NO_WAIT(nine_context_set_depth_stencil, + ARG_BIND_REF(struct NineSurface9, ds)) +{ + struct nine_context *context = &device->context; + + nine_bind(&context->ds, ds); + context->changed.group |= NINE_STATE_FB; +} + +CSMT_ITEM_NO_WAIT(nine_context_set_viewport, + ARG_COPY_REF(D3DVIEWPORT9, viewport)) +{ + struct nine_context *context = &device->context; + + context->viewport = *viewport; + context->changed.group |= NINE_STATE_VIEWPORT; +} + +CSMT_ITEM_NO_WAIT(nine_context_set_scissor, + ARG_COPY_REF(struct pipe_scissor_state, scissor)) +{ + struct nine_context *context = &device->context; + + context->scissor = *scissor; + context->changed.group |= NINE_STATE_SCISSOR; +} + +CSMT_ITEM_NO_WAIT(nine_context_set_transform, + ARG_VAL(D3DTRANSFORMSTATETYPE, State), + ARG_COPY_REF(D3DMATRIX, pMatrix)) +{ + struct nine_context *context = &device->context; + D3DMATRIX *M = nine_state_access_transform(&context->ff, State, TRUE); + + *M = *pMatrix; + context->ff.changed.transform[State / 32] |= 1 << (State % 32); + context->changed.group |= NINE_STATE_FF; +} + +CSMT_ITEM_NO_WAIT(nine_context_set_material, + ARG_COPY_REF(D3DMATERIAL9, pMaterial)) +{ + struct nine_context *context = &device->context; + + context->ff.material = *pMaterial; + context->changed.group |= NINE_STATE_FF_MATERIAL; +} + +CSMT_ITEM_NO_WAIT(nine_context_set_light, + ARG_VAL(DWORD, Index), + ARG_COPY_REF(D3DLIGHT9, pLight)) +{ + struct nine_context *context = &device->context; + + (void)nine_state_set_light(&context->ff, Index, pLight); + context->changed.group |= NINE_STATE_FF_LIGHTING; +} + + +/* For stateblocks */ +static void +nine_context_light_enable_stateblock(struct NineDevice9 *device, + const uint16_t active_light[NINE_MAX_LIGHTS_ACTIVE], /* TODO: use pointer that convey size for csmt */ + unsigned int num_lights_active) +{ + struct nine_context *context = &device->context; + + /* TODO: Use CSMT_* to avoid calling nine_csmt_process */ + nine_csmt_process(device); + memcpy(context->ff.active_light, active_light, NINE_MAX_LIGHTS_ACTIVE * sizeof(context->ff.active_light[0])); + context->ff.num_lights_active = num_lights_active; + context->changed.group |= NINE_STATE_FF_LIGHTING; +} + +CSMT_ITEM_NO_WAIT(nine_context_light_enable, + ARG_VAL(DWORD, Index), + ARG_VAL(BOOL, Enable)) +{ + struct nine_context *context = &device->context; + + nine_state_light_enable(&context->ff, &context->changed.group, Index, Enable); +} + +CSMT_ITEM_NO_WAIT(nine_context_set_texture_stage_state, + ARG_VAL(DWORD, Stage), + ARG_VAL(D3DTEXTURESTAGESTATETYPE, Type), + ARG_VAL(DWORD, Value)) +{ + struct nine_context *context = &device->context; + int bumpmap_index = -1; + + context->ff.tex_stage[Stage][Type] = Value; + switch (Type) { + case D3DTSS_BUMPENVMAT00: + bumpmap_index = 4 * Stage; + break; + case D3DTSS_BUMPENVMAT01: + bumpmap_index = 4 * Stage + 1; + break; + case D3DTSS_BUMPENVMAT10: + bumpmap_index = 4 * Stage + 2; + break; + case D3DTSS_BUMPENVMAT11: + bumpmap_index = 4 * Stage + 3; + break; + case D3DTSS_BUMPENVLSCALE: + bumpmap_index = 4 * 8 + 2 * Stage; + break; + case D3DTSS_BUMPENVLOFFSET: + bumpmap_index = 4 * 8 + 2 * Stage + 1; + break; + case D3DTSS_TEXTURETRANSFORMFLAGS: + context->changed.group |= NINE_STATE_PS1X_SHADER; + break; + default: + break; + } + + if (bumpmap_index >= 0) { + context->bumpmap_vars[bumpmap_index] = Value; + context->changed.group |= NINE_STATE_PS_CONST; + } + + context->changed.group |= NINE_STATE_FF_PSSTAGES; + context->ff.changed.tex_stage[Stage][Type / 32] |= 1 << (Type % 32); +} + +CSMT_ITEM_NO_WAIT(nine_context_set_clip_plane, + ARG_VAL(DWORD, Index), + ARG_COPY_REF(struct nine_clipplane, pPlane)) +{ + struct nine_context *context = &device->context; + + memcpy(&context->clip.ucp[Index][0], pPlane, sizeof(context->clip.ucp[0])); + context->changed.ucp = TRUE; +} + +CSMT_ITEM_NO_WAIT(nine_context_set_swvp, + ARG_VAL(boolean, swvp)) +{ + struct nine_context *context = &device->context; + + context->swvp = swvp; + context->changed.group |= NINE_STATE_SWVP; +} + +#if 0 + +void +nine_context_apply_stateblock(struct NineDevice9 *device, + const struct nine_state *src) +{ + struct nine_context *context = &device->context; + int i; + + context->changed.group |= src->changed.group; + + for (i = 0; i < ARRAY_SIZE(src->changed.rs); ++i) { + uint32_t m = src->changed.rs[i]; + while (m) { + const int r = ffs(m) - 1; + m &= ~(1 << r); + context->rs[i * 32 + r] = nine_fix_render_state_value(i * 32 + r, src->rs_advertised[i * 32 + r]); + } + } + + /* Textures */ + if (src->changed.texture) { + uint32_t m = src->changed.texture; + unsigned s; + + for (s = 0; m; ++s, m >>= 1) { + struct NineBaseTexture9 *tex = src->texture[s]; + if (!(m & 1)) + continue; + nine_context_set_texture(device, s, tex); + } + } + + /* Sampler state */ + if (src->changed.group & NINE_STATE_SAMPLER) { + unsigned s; + + for (s = 0; s < NINE_MAX_SAMPLERS; ++s) { + uint32_t m = src->changed.sampler[s]; + while (m) { + const int i = ffs(m) - 1; + m &= ~(1 << i); + if (nine_check_sampler_state_value(i, src->samp_advertised[s][i])) + context->samp[s][i] = src->samp_advertised[s][i]; + } + context->changed.sampler[s] |= src->changed.sampler[s]; + } + } + + /* Vertex buffers */ + if (src->changed.vtxbuf | src->changed.stream_freq) { + uint32_t m = src->changed.vtxbuf | src->changed.stream_freq; + for (i = 0; m; ++i, m >>= 1) { + if (src->changed.vtxbuf & (1 << i)) { + if (src->stream[i]) { + unsigned offset = 0; + pipe_resource_reference(&context->vtxbuf[i].buffer, + src->stream[i] ? NineVertexBuffer9_GetResource(src->stream[i], &offset) : NULL); + context->vtxbuf[i].buffer_offset = src->vtxbuf[i].buffer_offset + offset; + context->vtxbuf[i].stride = src->vtxbuf[i].stride; + } + } + if (src->changed.stream_freq & (1 << i)) { + context->stream_freq[i] = src->stream_freq[i]; + if (src->stream_freq[i] & D3DSTREAMSOURCE_INSTANCEDATA) + context->stream_instancedata_mask |= 1 << i; + else + context->stream_instancedata_mask &= ~(1 << i); + } + } + context->changed.vtxbuf |= src->changed.vtxbuf; + } + + /* Index buffer */ + if (src->changed.group & NINE_STATE_IDXBUF) + nine_context_set_indices(device, src->idxbuf); + + /* Vertex declaration */ + if ((src->changed.group & NINE_STATE_VDECL) && src->vdecl) + nine_context_set_vertex_declaration(device, src->vdecl); + + /* Vertex shader */ + if (src->changed.group & NINE_STATE_VS) + nine_bind(&context->vs, src->vs); + + context->programmable_vs = context->vs && !(context->vdecl && context->vdecl->position_t); + + /* Pixel shader */ + if (src->changed.group & NINE_STATE_PS) + nine_bind(&context->ps, src->ps); + + /* Vertex constants */ + if (src->changed.group & NINE_STATE_VS_CONST) { + struct nine_range *r; + if (device->may_swvp) { + for (r = src->changed.vs_const_f; r; r = r->next) { + int bgn = r->bgn; + int end = r->end; + memcpy(&context->vs_const_f_swvp[bgn * 4], + &src->vs_const_f[bgn * 4], + (end - bgn) * 4 * sizeof(float)); + if (bgn < device->max_vs_const_f) { + end = MIN2(end, device->max_vs_const_f); + memcpy(&context->vs_const_f[bgn * 4], + &src->vs_const_f[bgn * 4], + (end - bgn) * 4 * sizeof(float)); + } + } + } else { + for (r = src->changed.vs_const_f; r; r = r->next) { + memcpy(&context->vs_const_f[r->bgn * 4], + &src->vs_const_f[r->bgn * 4], + (r->end - r->bgn) * 4 * sizeof(float)); + } + } + for (r = src->changed.vs_const_i; r; r = r->next) { + memcpy(&context->vs_const_i[r->bgn * 4], + &src->vs_const_i[r->bgn * 4], + (r->end - r->bgn) * 4 * sizeof(int)); + } + for (r = src->changed.vs_const_b; r; r = r->next) { + memcpy(&context->vs_const_b[r->bgn], + &src->vs_const_b[r->bgn], + (r->end - r->bgn) * sizeof(int)); + } + context->changed.vs_const_f = !!src->changed.vs_const_f; + context->changed.vs_const_i = !!src->changed.vs_const_i; + context->changed.vs_const_b = !!src->changed.vs_const_b; + } + + /* Pixel constants */ + if (src->changed.group & NINE_STATE_PS_CONST) { + struct nine_range *r; + for (r = src->changed.ps_const_f; r; r = r->next) { + memcpy(&context->ps_const_f[r->bgn * 4], + &src->ps_const_f[r->bgn * 4], + (r->end - r->bgn) * 4 * sizeof(float)); + } + if (src->changed.ps_const_i) { + uint16_t m = src->changed.ps_const_i; + for (i = ffs(m) - 1, m >>= i; m; ++i, m >>= 1) + if (m & 1) + memcpy(context->ps_const_i[i], src->ps_const_i[i], 4 * sizeof(int)); + } + if (src->changed.ps_const_b) { + uint16_t m = src->changed.ps_const_b; + for (i = ffs(m) - 1, m >>= i; m; ++i, m >>= 1) + if (m & 1) + context->ps_const_b[i] = src->ps_const_b[i]; + } + context->changed.ps_const_f = !!src->changed.ps_const_f; + context->changed.ps_const_i = !!src->changed.ps_const_i; + context->changed.ps_const_b = !!src->changed.ps_const_b; + } + + /* Viewport */ + if (src->changed.group & NINE_STATE_VIEWPORT) + context->viewport = src->viewport; + + /* Scissor */ + if (src->changed.group & NINE_STATE_SCISSOR) + context->scissor = src->scissor; + + /* User Clip Planes */ + if (src->changed.ucp) { + for (i = 0; i < PIPE_MAX_CLIP_PLANES; ++i) + if (src->changed.ucp & (1 << i)) + memcpy(context->clip.ucp[i], + src->clip.ucp[i], sizeof(src->clip.ucp[0])); + context->changed.ucp = TRUE; + } + + if (!(src->changed.group & NINE_STATE_FF)) + return; + + /* Fixed function state. */ + + if (src->changed.group & NINE_STATE_FF_MATERIAL) + context->ff.material = src->ff.material; + + if (src->changed.group & NINE_STATE_FF_PSSTAGES) { + unsigned s; + for (s = 0; s < NINE_MAX_TEXTURE_STAGES; ++s) { + for (i = 0; i < NINED3DTSS_COUNT; ++i) + if (src->ff.changed.tex_stage[s][i / 32] & (1 << (i % 32))) + context->ff.tex_stage[s][i] = src->ff.tex_stage[s][i]; + } + } + if (src->changed.group & NINE_STATE_FF_LIGHTING) { + unsigned num_lights = MAX2(context->ff.num_lights, src->ff.num_lights); + /* Can happen if the stateblock had recorded the creation of + * new lights. */ + if (context->ff.num_lights < num_lights) { + context->ff.light = REALLOC(context->ff.light, + context->ff.num_lights * sizeof(D3DLIGHT9), + num_lights * sizeof(D3DLIGHT9)); + memset(&context->ff.light[context->ff.num_lights], 0, (num_lights - context->ff.num_lights) * sizeof(D3DLIGHT9)); + for (i = context->ff.num_lights; i < num_lights; ++i) + context->ff.light[i].Type = (D3DLIGHTTYPE)NINED3DLIGHT_INVALID; + context->ff.num_lights = num_lights; + } + /* src->ff.num_lights < num_lights has been handled before */ + assert (src->ff.num_lights == num_lights); + + for (i = 0; i < num_lights; ++i) + if (src->ff.light[i].Type != NINED3DLIGHT_INVALID) + context->ff.light[i] = src->ff.light[i]; + + memcpy(context->ff.active_light, src->ff.active_light, sizeof(src->ff.active_light) ); + context->ff.num_lights_active = src->ff.num_lights_active; + } + if (src->changed.group & NINE_STATE_FF_VSTRANSF) { + for (i = 0; i < ARRAY_SIZE(src->ff.changed.transform); ++i) { + unsigned s; + if (!src->ff.changed.transform[i]) + continue; + for (s = i * 32; s < (i * 32 + 32); ++s) { + if (!(src->ff.changed.transform[i] & (1 << (s % 32)))) + continue; + *nine_state_access_transform(&context->ff, s, TRUE) = + *nine_state_access_transform( /* const because !alloc */ + (struct nine_ff_state *)&src->ff, s, FALSE); + } + context->ff.changed.transform[i] |= src->ff.changed.transform[i]; + } + } +} + +#endif + +/* Do not write to nine_context directly. Slower, + * but works with csmt. TODO: write a special csmt version that + * would record the list of commands as much as possible, + * and use the version above else. + */ +void +nine_context_apply_stateblock(struct NineDevice9 *device, + const struct nine_state *src) +{ + int i; + + /* No need to apply src->changed.group, since all calls do + * set context->changed.group */ + + for (i = 0; i < ARRAY_SIZE(src->changed.rs); ++i) { + uint32_t m = src->changed.rs[i]; + while (m) { + const int r = ffs(m) - 1; + m &= ~(1 << r); + nine_context_set_render_state(device, i * 32 + r, src->rs_advertised[i * 32 + r]); + } + } + + /* Textures */ + if (src->changed.texture) { + uint32_t m = src->changed.texture; + unsigned s; + + for (s = 0; m; ++s, m >>= 1) { + struct NineBaseTexture9 *tex = src->texture[s]; + if (!(m & 1)) + continue; + nine_context_set_texture(device, s, tex); + } + } + + /* Sampler state */ + if (src->changed.group & NINE_STATE_SAMPLER) { + unsigned s; + + for (s = 0; s < NINE_MAX_SAMPLERS; ++s) { + uint32_t m = src->changed.sampler[s]; + while (m) { + const int i = ffs(m) - 1; + m &= ~(1 << i); + nine_context_set_sampler_state(device, s, i, src->samp_advertised[s][i]); + } + } + } + + /* Vertex buffers */ + if (src->changed.vtxbuf | src->changed.stream_freq) { + uint32_t m = src->changed.vtxbuf | src->changed.stream_freq; + for (i = 0; m; ++i, m >>= 1) { + if (src->changed.vtxbuf & (1 << i)) + nine_context_set_stream_source(device, i, src->stream[i], src->vtxbuf[i].buffer_offset, src->vtxbuf[i].stride); + if (src->changed.stream_freq & (1 << i)) + nine_context_set_stream_source_freq(device, i, src->stream_freq[i]); + } + } + + /* Index buffer */ + if (src->changed.group & NINE_STATE_IDXBUF) + nine_context_set_indices(device, src->idxbuf); + + /* Vertex declaration */ + if ((src->changed.group & NINE_STATE_VDECL) && src->vdecl) + nine_context_set_vertex_declaration(device, src->vdecl); + + /* Vertex shader */ + if (src->changed.group & NINE_STATE_VS) + nine_context_set_vertex_shader(device, src->vs); + + /* Pixel shader */ + if (src->changed.group & NINE_STATE_PS) + nine_context_set_pixel_shader(device, src->ps); + + /* Vertex constants */ + if (src->changed.group & NINE_STATE_VS_CONST) { + struct nine_range *r; + for (r = src->changed.vs_const_f; r; r = r->next) + nine_context_set_vertex_shader_constant_f(device, r->bgn, + &src->vs_const_f[r->bgn * 4], + sizeof(float[4]) * (r->end - r->bgn), + r->end - r->bgn); + for (r = src->changed.vs_const_i; r; r = r->next) + nine_context_set_vertex_shader_constant_i(device, r->bgn, + &src->vs_const_i[r->bgn * 4], + sizeof(int[4]) * (r->end - r->bgn), + r->end - r->bgn); + for (r = src->changed.vs_const_b; r; r = r->next) + nine_context_set_vertex_shader_constant_b(device, r->bgn, + &src->vs_const_b[r->bgn * 4], + sizeof(BOOL) * (r->end - r->bgn), + r->end - r->bgn); + } + + /* Pixel constants */ + if (src->changed.group & NINE_STATE_PS_CONST) { + struct nine_range *r; + for (r = src->changed.ps_const_f; r; r = r->next) + nine_context_set_pixel_shader_constant_f(device, r->bgn, + &src->ps_const_f[r->bgn * 4], + sizeof(float[4]) * (r->end - r->bgn), + r->end - r->bgn); + if (src->changed.ps_const_i) { + uint16_t m = src->changed.ps_const_i; + for (i = ffs(m) - 1, m >>= i; m; ++i, m >>= 1) + if (m & 1) + nine_context_set_pixel_shader_constant_i_transformed(device, i, + src->ps_const_i[i], sizeof(int[4]), 1); + } + if (src->changed.ps_const_b) { + uint16_t m = src->changed.ps_const_b; + for (i = ffs(m) - 1, m >>= i; m; ++i, m >>= 1) + if (m & 1) + nine_context_set_pixel_shader_constant_b(device, i, + &src->ps_const_b[i], sizeof(BOOL), 1); + } + } + + /* Viewport */ + if (src->changed.group & NINE_STATE_VIEWPORT) + nine_context_set_viewport(device, &src->viewport); + + /* Scissor */ + if (src->changed.group & NINE_STATE_SCISSOR) + nine_context_set_scissor(device, &src->scissor); + + /* User Clip Planes */ + if (src->changed.ucp) + for (i = 0; i < PIPE_MAX_CLIP_PLANES; ++i) + if (src->changed.ucp & (1 << i)) + nine_context_set_clip_plane(device, i, (struct nine_clipplane*)&src->clip.ucp[i][0]); + + if (!(src->changed.group & NINE_STATE_FF)) + return; + + /* Fixed function state. */ + + if (src->changed.group & NINE_STATE_FF_MATERIAL) + nine_context_set_material(device, &src->ff.material); + + if (src->changed.group & NINE_STATE_FF_PSSTAGES) { + unsigned s; + for (s = 0; s < NINE_MAX_TEXTURE_STAGES; ++s) { + for (i = 0; i < NINED3DTSS_COUNT; ++i) + if (src->ff.changed.tex_stage[s][i / 32] & (1 << (i % 32))) + nine_context_set_texture_stage_state(device, s, i, src->ff.tex_stage[s][i]); + } + } + if (src->changed.group & NINE_STATE_FF_LIGHTING) { + for (i = 0; i < src->ff.num_lights; ++i) + if (src->ff.light[i].Type != NINED3DLIGHT_INVALID) + nine_context_set_light(device, i, &src->ff.light[i]); + + nine_context_light_enable_stateblock(device, src->ff.active_light, src->ff.num_lights_active); + } + if (src->changed.group & NINE_STATE_FF_VSTRANSF) { + for (i = 0; i < ARRAY_SIZE(src->ff.changed.transform); ++i) { + unsigned s; + if (!src->ff.changed.transform[i]) + continue; + for (s = i * 32; s < (i * 32 + 32); ++s) { + if (!(src->ff.changed.transform[i] & (1 << (s % 32)))) + continue; + nine_context_set_transform(device, s, + nine_state_access_transform( + (struct nine_ff_state *)&src->ff, + s, FALSE)); + } + } + } +} + +static void +nine_update_state_framebuffer_clear(struct NineDevice9 *device) +{ + struct nine_context *context = &device->context; + + if (context->changed.group & NINE_STATE_FB) + update_framebuffer(device, TRUE); +} + +CSMT_ITEM_NO_WAIT(nine_context_clear_fb, + ARG_VAL(DWORD, Count), + ARG_COPY_REF(D3DRECT, pRects), + ARG_VAL(DWORD, Flags), + ARG_VAL(D3DCOLOR, Color), + ARG_VAL(float, Z), + ARG_VAL(DWORD, Stencil)) +{ + struct nine_context *context = &device->context; + const int sRGB = context->rs[D3DRS_SRGBWRITEENABLE] ? 1 : 0; + struct pipe_surface *cbuf, *zsbuf; + struct pipe_context *pipe = context->pipe; + struct NineSurface9 *zsbuf_surf = context->ds; + struct NineSurface9 *rt; + unsigned bufs = 0; + unsigned r, i; + union pipe_color_union rgba; + unsigned rt_mask = 0; + D3DRECT rect; + + nine_update_state_framebuffer_clear(device); + + if (Flags & D3DCLEAR_TARGET) bufs |= PIPE_CLEAR_COLOR; + /* Ignore Z buffer if not bound */ + if (context->pipe_data.fb.zsbuf != NULL) { + if (Flags & D3DCLEAR_ZBUFFER) bufs |= PIPE_CLEAR_DEPTH; + if (Flags & D3DCLEAR_STENCIL) bufs |= PIPE_CLEAR_STENCIL; + } + if (!bufs) + return; + d3dcolor_to_pipe_color_union(&rgba, Color); + + rect.x1 = context->viewport.X; + rect.y1 = context->viewport.Y; + rect.x2 = context->viewport.Width + rect.x1; + rect.y2 = context->viewport.Height + rect.y1; + + /* Both rectangles apply, which is weird, but that's D3D9. */ + if (context->rs[D3DRS_SCISSORTESTENABLE]) { + rect.x1 = MAX2(rect.x1, context->scissor.minx); + rect.y1 = MAX2(rect.y1, context->scissor.miny); + rect.x2 = MIN2(rect.x2, context->scissor.maxx); + rect.y2 = MIN2(rect.y2, context->scissor.maxy); + } + + if (Count) { + /* Maybe apps like to specify a large rect ? */ + if (pRects[0].x1 <= rect.x1 && pRects[0].x2 >= rect.x2 && + pRects[0].y1 <= rect.y1 && pRects[0].y2 >= rect.y2) { + DBG("First rect covers viewport.\n"); + Count = 0; + pRects = NULL; + } + } + + if (rect.x1 >= context->pipe_data.fb.width || rect.y1 >= context->pipe_data.fb.height) + return; + + for (i = 0; i < device->caps.NumSimultaneousRTs; ++i) { + if (context->rt[i] && context->rt[i]->desc.Format != D3DFMT_NULL) + rt_mask |= 1 << i; + } + + /* fast path, clears everything at once */ + if (!Count && + (!(bufs & PIPE_CLEAR_COLOR) || (rt_mask == context->rt_mask)) && + rect.x1 == 0 && rect.y1 == 0 && + /* Case we clear only render target. Check clear region vs rt. */ + ((!(bufs & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) && + rect.x2 >= context->pipe_data.fb.width && + rect.y2 >= context->pipe_data.fb.height) || + /* Case we clear depth buffer (and eventually rt too). + * depth buffer size is always >= rt size. Compare to clear region */ + ((bufs & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) && + rect.x2 >= zsbuf_surf->desc.Width && + rect.y2 >= zsbuf_surf->desc.Height))) { + DBG("Clear fast path\n"); + pipe->clear(pipe, bufs, &rgba, Z, Stencil); + return; + } + + if (!Count) { + Count = 1; + pRects = ▭ + } + + for (i = 0; i < device->caps.NumSimultaneousRTs; ++i) { + rt = context->rt[i]; + if (!rt || rt->desc.Format == D3DFMT_NULL || + !(bufs & PIPE_CLEAR_COLOR)) + continue; /* save space, compiler should hoist this */ + cbuf = NineSurface9_GetSurface(rt, sRGB); + for (r = 0; r < Count; ++r) { + /* Don't trust users to pass these in the right order. */ + unsigned x1 = MIN2(pRects[r].x1, pRects[r].x2); + unsigned y1 = MIN2(pRects[r].y1, pRects[r].y2); + unsigned x2 = MAX2(pRects[r].x1, pRects[r].x2); + unsigned y2 = MAX2(pRects[r].y1, pRects[r].y2); +#ifndef NINE_LAX + /* Drop negative rectangles (like wine expects). */ + if (pRects[r].x1 > pRects[r].x2) continue; + if (pRects[r].y1 > pRects[r].y2) continue; +#endif + + x1 = MAX2(x1, rect.x1); + y1 = MAX2(y1, rect.y1); + x2 = MIN3(x2, rect.x2, rt->desc.Width); + y2 = MIN3(y2, rect.y2, rt->desc.Height); + + DBG("Clearing (%u..%u)x(%u..%u)\n", x1, x2, y1, y2); + pipe->clear_render_target(pipe, cbuf, &rgba, + x1, y1, x2 - x1, y2 - y1, false); + } + } + if (!(bufs & PIPE_CLEAR_DEPTHSTENCIL)) + return; + + bufs &= PIPE_CLEAR_DEPTHSTENCIL; + + for (r = 0; r < Count; ++r) { + unsigned x1 = MIN2(pRects[r].x1, pRects[r].x2); + unsigned y1 = MIN2(pRects[r].y1, pRects[r].y2); + unsigned x2 = MAX2(pRects[r].x1, pRects[r].x2); + unsigned y2 = MAX2(pRects[r].y1, pRects[r].y2); +#ifndef NINE_LAX + /* Drop negative rectangles. */ + if (pRects[r].x1 > pRects[r].x2) continue; + if (pRects[r].y1 > pRects[r].y2) continue; +#endif + + x1 = MIN2(x1, rect.x1); + y1 = MIN2(y1, rect.y1); + x2 = MIN3(x2, rect.x2, zsbuf_surf->desc.Width); + y2 = MIN3(y2, rect.y2, zsbuf_surf->desc.Height); + + zsbuf = NineSurface9_GetSurface(zsbuf_surf, 0); + assert(zsbuf); + pipe->clear_depth_stencil(pipe, zsbuf, bufs, Z, Stencil, + x1, y1, x2 - x1, y2 - y1, false); + } + return; +} + + +static inline void +init_draw_info(struct pipe_draw_info *info, + struct NineDevice9 *dev, D3DPRIMITIVETYPE type, UINT count) +{ + info->mode = d3dprimitivetype_to_pipe_prim(type); + info->count = prim_count_to_vertex_count(type, count); + info->start_instance = 0; + info->instance_count = 1; + if (dev->context.stream_instancedata_mask & dev->context.stream_usage_mask) + info->instance_count = MAX2(dev->context.stream_freq[0] & 0x7FFFFF, 1); + info->primitive_restart = FALSE; + info->restart_index = 0; + info->count_from_stream_output = NULL; + info->indirect = NULL; + info->indirect_params = NULL; +} + +CSMT_ITEM_NO_WAIT(nine_context_draw_primitive, + ARG_VAL(D3DPRIMITIVETYPE, PrimitiveType), + ARG_VAL(UINT, StartVertex), + ARG_VAL(UINT, PrimitiveCount)) +{ + struct nine_context *context = &device->context; + struct pipe_draw_info info; + + nine_update_state(device); + + init_draw_info(&info, device, PrimitiveType, PrimitiveCount); + info.indexed = FALSE; + info.start = StartVertex; + info.index_bias = 0; + info.min_index = info.start; + info.max_index = info.count - 1; + + context->pipe->draw_vbo(context->pipe, &info); +} + +CSMT_ITEM_NO_WAIT(nine_context_draw_indexed_primitive, + ARG_VAL(D3DPRIMITIVETYPE, PrimitiveType), + ARG_VAL(INT, BaseVertexIndex), + ARG_VAL(UINT, MinVertexIndex), + ARG_VAL(UINT, NumVertices), + ARG_VAL(UINT, StartIndex), + ARG_VAL(UINT, PrimitiveCount)) +{ + struct nine_context *context = &device->context; + struct pipe_draw_info info; + + nine_update_state(device); + + init_draw_info(&info, device, PrimitiveType, PrimitiveCount); + info.indexed = TRUE; + info.start = StartIndex; + info.index_bias = BaseVertexIndex; + /* These don't include index bias: */ + info.min_index = MinVertexIndex; + info.max_index = MinVertexIndex + NumVertices - 1; + + context->pipe->draw_vbo(context->pipe, &info); +} + +CSMT_ITEM_NO_WAIT(nine_context_draw_primitive_from_vtxbuf, + ARG_VAL(D3DPRIMITIVETYPE, PrimitiveType), + ARG_VAL(UINT, PrimitiveCount), + ARG_BIND_BUF(struct pipe_vertex_buffer, vtxbuf)) +{ + struct nine_context *context = &device->context; + struct pipe_draw_info info; + + nine_update_state(device); + + init_draw_info(&info, device, PrimitiveType, PrimitiveCount); + info.indexed = FALSE; + info.start = 0; + info.index_bias = 0; + info.min_index = 0; + info.max_index = info.count - 1; + + context->pipe->set_vertex_buffers(context->pipe, 0, 1, vtxbuf); + + context->pipe->draw_vbo(context->pipe, &info); +} + +CSMT_ITEM_NO_WAIT(nine_context_draw_indexed_primitive_from_vtxbuf_idxbuf, + ARG_VAL(D3DPRIMITIVETYPE, PrimitiveType), + ARG_VAL(UINT, MinVertexIndex), + ARG_VAL(UINT, NumVertices), + ARG_VAL(UINT, PrimitiveCount), + ARG_BIND_BUF(struct pipe_vertex_buffer, vbuf), + ARG_BIND_BUF(struct pipe_index_buffer, ibuf)) +{ + struct nine_context *context = &device->context; + struct pipe_draw_info info; + + nine_update_state(device); + + init_draw_info(&info, device, PrimitiveType, PrimitiveCount); + info.indexed = TRUE; + info.start = 0; + info.index_bias = 0; + info.min_index = MinVertexIndex; + info.max_index = MinVertexIndex + NumVertices - 1; + context->pipe->set_vertex_buffers(context->pipe, 0, 1, vbuf); + context->pipe->set_index_buffer(context->pipe, ibuf); + + context->pipe->draw_vbo(context->pipe, &info); +} + +CSMT_ITEM_NO_WAIT(nine_context_resource_copy_region, + ARG_BIND_REF(struct NineUnknown, dst), + ARG_BIND_REF(struct NineUnknown, src), + ARG_BIND_RES(struct pipe_resource, dst_res), + ARG_VAL(unsigned, dst_level), + ARG_COPY_REF(struct pipe_box, dst_box), + ARG_BIND_RES(struct pipe_resource, src_res), + ARG_VAL(unsigned, src_level), + ARG_COPY_REF(struct pipe_box, src_box)) +{ + struct nine_context *context = &device->context; + + (void) dst; + (void) src; + + context->pipe->resource_copy_region(context->pipe, + dst_res, dst_level, + dst_box->x, dst_box->y, dst_box->z, + src_res, src_level, + src_box); +} + +CSMT_ITEM_NO_WAIT(nine_context_blit, + ARG_BIND_REF(struct NineUnknown, dst), + ARG_BIND_REF(struct NineUnknown, src), + ARG_BIND_BLIT(struct pipe_blit_info, blit)) +{ + struct nine_context *context = &device->context; + + (void) dst; + (void) src; + + context->pipe->blit(context->pipe, blit); +} + +CSMT_ITEM_NO_WAIT(nine_context_clear_render_target, + ARG_BIND_REF(struct NineSurface9, surface), + ARG_VAL(D3DCOLOR, color), + ARG_VAL(UINT, x), + ARG_VAL(UINT, y), + ARG_VAL(UINT, width), + ARG_VAL(UINT, height)) +{ + struct nine_context *context = &device->context; + struct pipe_surface *surf; + union pipe_color_union rgba; + + d3dcolor_to_pipe_color_union(&rgba, color); + surf = NineSurface9_GetSurface(surface, 0); + context->pipe->clear_render_target(context->pipe, surf, &rgba, x, y, width, height, false); +} + +CSMT_ITEM_NO_WAIT(nine_context_gen_mipmap, + ARG_BIND_REF(struct NineUnknown, dst), + ARG_BIND_RES(struct pipe_resource, res), + ARG_VAL(UINT, base_level), + ARG_VAL(UINT, last_level), + ARG_VAL(UINT, first_layer), + ARG_VAL(UINT, last_layer), + ARG_VAL(UINT, filter)) +{ + struct nine_context *context = &device->context; + + /* We just bind dst for the bind count */ + (void)dst; + + util_gen_mipmap(context->pipe, res, res->format, base_level, + last_level, first_layer, last_layer, filter); +} + +CSMT_ITEM_NO_WAIT_WITH_COUNTER(nine_context_range_upload, + ARG_BIND_RES(struct pipe_resource, res), + ARG_VAL(unsigned, offset), + ARG_VAL(unsigned, size), + ARG_VAL(const void *, data)) +{ + struct nine_context *context = &device->context; + + context->pipe->buffer_subdata(context->pipe, res, 0, offset, size, data); +} + +CSMT_ITEM_NO_WAIT_WITH_COUNTER(nine_context_box_upload, + ARG_BIND_REF(struct NineUnknown, dst), + ARG_BIND_RES(struct pipe_resource, res), + ARG_VAL(unsigned, level), + ARG_COPY_REF(struct pipe_box, dst_box), + ARG_VAL(enum pipe_format, src_format), + ARG_VAL(const void *, src), + ARG_VAL(unsigned, src_stride), + ARG_VAL(unsigned, src_layer_stride), + ARG_COPY_REF(struct pipe_box, src_box)) +{ + struct nine_context *context = &device->context; + struct pipe_context *pipe = context->pipe; + struct pipe_transfer *transfer = NULL; + uint8_t *map; + + /* We just bind dst for the bind count */ + (void)dst; + + map = pipe->transfer_map(pipe, + res, + level, + PIPE_TRANSFER_WRITE | PIPE_TRANSFER_DISCARD_RANGE, + dst_box, &transfer); + if (!map) + return; + + /* Note: if formats are the sames, it will revert + * to normal memcpy */ + (void) util_format_translate_3d(res->format, + map, transfer->stride, + transfer->layer_stride, + 0, 0, 0, + src_format, + src, src_stride, + src_layer_stride, + src_box->x, src_box->y, src_box->z, + dst_box->width, dst_box->height, + dst_box->depth); + + pipe_transfer_unmap(pipe, transfer); +} + +struct pipe_query * +nine_context_create_query(struct NineDevice9 *device, unsigned query_type) +{ + struct pipe_context *pipe; + struct pipe_query *res; + + pipe = nine_context_get_pipe_acquire(device); + res = pipe->create_query(pipe, query_type, 0); + nine_context_get_pipe_release(device); + return res; +} + +CSMT_ITEM_DO_WAIT(nine_context_destroy_query, + ARG_REF(struct pipe_query, query)) +{ + struct nine_context *context = &device->context; + + context->pipe->destroy_query(context->pipe, query); +} + +CSMT_ITEM_NO_WAIT_WITH_COUNTER(nine_context_begin_query, + ARG_REF(struct pipe_query, query)) +{ + struct nine_context *context = &device->context; + + (void) context->pipe->begin_query(context->pipe, query); +} + +CSMT_ITEM_NO_WAIT_WITH_COUNTER(nine_context_end_query, + ARG_REF(struct pipe_query, query)) +{ + struct nine_context *context = &device->context; + + (void) context->pipe->end_query(context->pipe, query); +} + +boolean +nine_context_get_query_result(struct NineDevice9 *device, struct pipe_query *query, + unsigned *counter, boolean flush, boolean wait, + union pipe_query_result *result) +{ + struct pipe_context *pipe; + boolean ret; + + if (wait) + nine_csmt_process(device); + else if (p_atomic_read(counter) > 0) { + if (flush && device->csmt_active) + nine_queue_flush(device->csmt_ctx->pool); + DBG("Pending begin/end. Returning\n"); + return false; + } + + pipe = nine_context_get_pipe_acquire(device); + ret = pipe->get_query_result(pipe, query, wait, result); + nine_context_get_pipe_release(device); + + DBG("Query result %s\n", ret ? "found" : "not yet available"); + return ret; +} + +/* State defaults */ + +static const DWORD nine_render_state_defaults[NINED3DRS_LAST + 1] = +{ + /* [D3DRS_ZENABLE] = D3DZB_TRUE; wine: auto_depth_stencil */ + [D3DRS_ZENABLE] = D3DZB_FALSE, + [D3DRS_FILLMODE] = D3DFILL_SOLID, + [D3DRS_SHADEMODE] = D3DSHADE_GOURAUD, +/* [D3DRS_LINEPATTERN] = 0x00000000, */ + [D3DRS_ZWRITEENABLE] = TRUE, + [D3DRS_ALPHATESTENABLE] = FALSE, [D3DRS_LASTPIXEL] = TRUE, [D3DRS_SRCBLEND] = D3DBLEND_ONE, [D3DRS_DESTBLEND] = D3DBLEND_ZERO, @@ -1246,18 +2991,21 @@ [D3DSAMP_ELEMENTINDEX] = 0, [D3DSAMP_DMAPOFFSET] = 0, [NINED3DSAMP_MINLOD] = 0, - [NINED3DSAMP_SHADOW] = 0 + [NINED3DSAMP_SHADOW] = 0, + [NINED3DSAMP_CUBETEX] = 0 }; +/* Note: The following 4 functions assume there is no + * pending commands */ + void nine_state_restore_non_cso(struct NineDevice9 *device) { - struct nine_state *state = &device->state; + struct nine_context *context = &device->context; - state->changed.group = NINE_STATE_ALL; - state->changed.vtxbuf = (1ULL << device->caps.MaxStreams) - 1; - state->changed.ucp = (1 << PIPE_MAX_CLIP_PLANES) - 1; - state->changed.texture = NINE_PS_SAMPLERS_MASK | NINE_VS_SAMPLERS_MASK; - state->commit |= NINE_STATE_COMMIT_CONST_VS | NINE_STATE_COMMIT_CONST_PS; + context->changed.group = NINE_STATE_ALL; + context->changed.vtxbuf = (1ULL << device->caps.MaxStreams) - 1; + context->changed.ucp = TRUE; + context->commit |= NINE_STATE_COMMIT_CONST_VS | NINE_STATE_COMMIT_CONST_PS; } void @@ -1265,11 +3013,12 @@ boolean is_reset) { struct nine_state *state = &device->state; + struct nine_context *context = &device->context; unsigned s; /* Initialize defaults. */ - memcpy(state->rs, nine_render_state_defaults, sizeof(state->rs)); + memcpy(context->rs, nine_render_state_defaults, sizeof(context->rs)); for (s = 0; s < ARRAY_SIZE(state->ff.tex_stage); ++s) { memcpy(&state->ff.tex_stage[s], nine_tex_stage_state_defaults, @@ -1278,62 +3027,61 @@ } state->ff.tex_stage[0][D3DTSS_COLOROP] = D3DTOP_MODULATE; state->ff.tex_stage[0][D3DTSS_ALPHAOP] = D3DTOP_SELECTARG1; - memset(&state->bumpmap_vars, 0, sizeof(state->bumpmap_vars)); - for (s = 0; s < ARRAY_SIZE(state->samp); ++s) { - memcpy(&state->samp[s], nine_samp_state_defaults, - sizeof(state->samp[s])); - } + for (s = 0; s < ARRAY_SIZE(state->ff.tex_stage); ++s) + memcpy(&context->ff.tex_stage[s], state->ff.tex_stage[s], + sizeof(state->ff.tex_stage[s])); - if (state->vs_const_f) - memset(state->vs_const_f, 0, device->vs_const_size); - if (state->ps_const_f) - memset(state->ps_const_f, 0, device->ps_const_size); + memset(&context->bumpmap_vars, 0, sizeof(context->bumpmap_vars)); + + for (s = 0; s < NINE_MAX_SAMPLERS; ++s) { + memcpy(&context->samp[s], nine_samp_state_defaults, + sizeof(context->samp[s])); + memcpy(&state->samp_advertised[s], nine_samp_state_defaults, + sizeof(state->samp_advertised[s])); + } + + memset(state->vs_const_f, 0, VS_CONST_F_SIZE(device)); + memset(context->vs_const_f, 0, device->vs_const_size); + if (context->vs_const_f_swvp) + memset(context->vs_const_f_swvp, 0, NINE_MAX_CONST_F_SWVP * sizeof(float[4])); + memset(state->vs_const_i, 0, VS_CONST_I_SIZE(device)); + memset(context->vs_const_i, 0, VS_CONST_I_SIZE(device)); + memset(state->vs_const_b, 0, VS_CONST_B_SIZE(device)); + memset(context->vs_const_b, 0, VS_CONST_B_SIZE(device)); + memset(state->ps_const_f, 0, device->ps_const_size); + memset(context->ps_const_f, 0, device->ps_const_size); + memset(state->ps_const_i, 0, sizeof(state->ps_const_i)); + memset(context->ps_const_i, 0, sizeof(context->ps_const_i)); + memset(state->ps_const_b, 0, sizeof(state->ps_const_b)); + memset(context->ps_const_b, 0, sizeof(context->ps_const_b)); /* Cap dependent initial state: */ - state->rs[D3DRS_POINTSIZE_MAX] = fui(caps->MaxPointSize); + context->rs[D3DRS_POINTSIZE_MAX] = fui(caps->MaxPointSize); - memcpy(state->rs_advertised, state->rs, sizeof(state->rs)); + memcpy(state->rs_advertised, context->rs, sizeof(context->rs)); /* Set changed flags to initialize driver. */ - state->changed.group = NINE_STATE_ALL; - state->changed.vtxbuf = (1ULL << device->caps.MaxStreams) - 1; - state->changed.ucp = (1 << PIPE_MAX_CLIP_PLANES) - 1; - state->changed.texture = NINE_PS_SAMPLERS_MASK | NINE_VS_SAMPLERS_MASK; + context->changed.group = NINE_STATE_ALL; + context->changed.vtxbuf = (1ULL << device->caps.MaxStreams) - 1; + context->changed.ucp = TRUE; - state->ff.changed.transform[0] = ~0; - state->ff.changed.transform[D3DTS_WORLD / 32] |= 1 << (D3DTS_WORLD % 32); + context->ff.changed.transform[0] = ~0; + context->ff.changed.transform[D3DTS_WORLD / 32] |= 1 << (D3DTS_WORLD % 32); if (!is_reset) { - state->viewport.MinZ = 0.0f; - state->viewport.MaxZ = 1.0f; + state->viewport.MinZ = context->viewport.MinZ = 0.0f; + state->viewport.MaxZ = context->viewport.MaxZ = 1.0f; } - for (s = 0; s < ARRAY_SIZE(state->changed.sampler); ++s) - state->changed.sampler[s] = ~0; + for (s = 0; s < NINE_MAX_SAMPLERS; ++s) + context->changed.sampler[s] = ~0; if (!is_reset) { - state->dummy_vbo_bound_at = -1; - state->vbo_bound_done = FALSE; - } - - if (!device->prefer_user_constbuf) { - /* fill cb_vs and cb_ps for the non user constbuf path */ - struct pipe_constant_buffer cb; - - cb.buffer_offset = 0; - cb.buffer_size = device->vs_const_size; - cb.buffer = device->constbuf_vs; - cb.user_buffer = NULL; - state->pipe.cb_vs = cb; - - cb.buffer_size = device->ps_const_size; - cb.buffer = device->constbuf_ps; - state->pipe.cb_ps = cb; - - state->commit |= NINE_STATE_COMMIT_CONST_VS | NINE_STATE_COMMIT_CONST_PS; + context->dummy_vbo_bound_at = -1; + context->vbo_bound_done = FALSE; } } @@ -1348,10 +3096,9 @@ nine_bind(&state->vs, NULL); nine_bind(&state->ps, NULL); nine_bind(&state->vdecl, NULL); - for (i = 0; i < PIPE_MAX_ATTRIBS; ++i) { + for (i = 0; i < PIPE_MAX_ATTRIBS; ++i) nine_bind(&state->stream[i], NULL); - pipe_resource_reference(&state->vtxbuf[i].buffer, NULL); - } + nine_bind(&state->idxbuf, NULL); for (i = 0; i < NINE_MAX_SAMPLERS; ++i) { if (device && @@ -1362,6 +3109,408 @@ } } +void +nine_context_clear(struct NineDevice9 *device) +{ + struct nine_context *context = &device->context; + struct pipe_context *pipe = context->pipe; + struct cso_context *cso = context->cso; + unsigned i; + + /* Early device ctor failure. Nothing to do */ + if (!pipe || !cso) + return; + + pipe->bind_vs_state(pipe, NULL); + pipe->bind_fs_state(pipe, NULL); + + /* Don't unbind constant buffers, they're device-private and + * do not change on Reset. + */ + + cso_set_samplers(cso, PIPE_SHADER_VERTEX, 0, NULL); + cso_set_samplers(cso, PIPE_SHADER_FRAGMENT, 0, NULL); + + cso_set_sampler_views(cso, PIPE_SHADER_VERTEX, 0, NULL); + cso_set_sampler_views(cso, PIPE_SHADER_FRAGMENT, 0, NULL); + + pipe->set_vertex_buffers(pipe, 0, device->caps.MaxStreams, NULL); + pipe->set_index_buffer(pipe, NULL); + + for (i = 0; i < ARRAY_SIZE(context->rt); ++i) + nine_bind(&context->rt[i], NULL); + nine_bind(&context->ds, NULL); + nine_bind(&context->vs, NULL); + nine_bind(&context->ps, NULL); + nine_bind(&context->vdecl, NULL); + for (i = 0; i < PIPE_MAX_ATTRIBS; ++i) + pipe_resource_reference(&context->vtxbuf[i].buffer, NULL); + pipe_resource_reference(&context->idxbuf.buffer, NULL); + + for (i = 0; i < NINE_MAX_SAMPLERS; ++i) { + context->texture[i].enabled = FALSE; + pipe_resource_reference(&context->texture[i].resource, + NULL); + pipe_sampler_view_reference(&context->texture[i].view[0], + NULL); + pipe_sampler_view_reference(&context->texture[i].view[1], + NULL); + } +} + +void +nine_state_init_sw(struct NineDevice9 *device) +{ + struct pipe_context *pipe_sw = device->pipe_sw; + struct pipe_rasterizer_state rast; + struct pipe_blend_state blend; + struct pipe_depth_stencil_alpha_state dsa; + struct pipe_framebuffer_state fb; + + /* Only used with Streamout */ + memset(&rast, 0, sizeof(rast)); + rast.rasterizer_discard = true; + rast.point_quad_rasterization = 1; /* to make llvmpipe happy */ + cso_set_rasterizer(device->cso_sw, &rast); + + /* dummy settings */ + memset(&blend, 0, sizeof(blend)); + memset(&dsa, 0, sizeof(dsa)); + memset(&fb, 0, sizeof(fb)); + cso_set_blend(device->cso_sw, &blend); + cso_set_depth_stencil_alpha(device->cso_sw, &dsa); + cso_set_framebuffer(device->cso_sw, &fb); + cso_set_viewport_dims(device->cso_sw, 1.0, 1.0, false); + cso_set_fragment_shader_handle(device->cso_sw, util_make_empty_fragment_shader(pipe_sw)); +} + +/* There is duplication with update_vertex_elements. + * TODO: Share the code */ + +static void +update_vertex_elements_sw(struct NineDevice9 *device) +{ + struct nine_state *state = &device->state; + const struct NineVertexDeclaration9 *vdecl = device->state.vdecl; + const struct NineVertexShader9 *vs; + unsigned n, b, i; + int index; + char vdecl_index_map[16]; /* vs->num_inputs <= 16 */ + char used_streams[device->caps.MaxStreams]; + int dummy_vbo_stream = -1; + BOOL need_dummy_vbo = FALSE; + struct pipe_vertex_element ve[PIPE_MAX_ATTRIBS]; + bool programmable_vs = state->vs && !(state->vdecl && state->vdecl->position_t); + + memset(vdecl_index_map, -1, 16); + memset(used_streams, 0, device->caps.MaxStreams); + vs = programmable_vs ? device->state.vs : device->ff.vs; + + if (vdecl) { + for (n = 0; n < vs->num_inputs; ++n) { + DBG("looking up input %u (usage %u) from vdecl(%p)\n", + n, vs->input_map[n].ndecl, vdecl); + + for (i = 0; i < vdecl->nelems; i++) { + if (vdecl->usage_map[i] == vs->input_map[n].ndecl) { + vdecl_index_map[n] = i; + used_streams[vdecl->elems[i].vertex_buffer_index] = 1; + break; + } + } + if (vdecl_index_map[n] < 0) + need_dummy_vbo = TRUE; + } + } else { + /* No vertex declaration. Likely will never happen in practice, + * but we need not crash on this */ + need_dummy_vbo = TRUE; + } + + if (need_dummy_vbo) { + for (i = 0; i < device->caps.MaxStreams; i++ ) { + if (!used_streams[i]) { + dummy_vbo_stream = i; + break; + } + } + } + /* TODO handle dummy_vbo */ + assert (!need_dummy_vbo); + + for (n = 0; n < vs->num_inputs; ++n) { + index = vdecl_index_map[n]; + if (index >= 0) { + ve[n] = vdecl->elems[index]; + b = ve[n].vertex_buffer_index; + /* XXX wine just uses 1 here: */ + if (state->stream_freq[b] & D3DSTREAMSOURCE_INSTANCEDATA) + ve[n].instance_divisor = state->stream_freq[b] & 0x7FFFFF; + } else { + /* if the vertex declaration is incomplete compared to what the + * vertex shader needs, we bind a dummy vbo with 0 0 0 0. + * This is not precised by the spec, but is the behaviour + * tested on win */ + ve[n].vertex_buffer_index = dummy_vbo_stream; + ve[n].src_format = PIPE_FORMAT_R32G32B32A32_FLOAT; + ve[n].src_offset = 0; + ve[n].instance_divisor = 0; + } + } + + cso_set_vertex_elements(device->cso_sw, vs->num_inputs, ve); +} + +static void +update_vertex_buffers_sw(struct NineDevice9 *device, int start_vertice, int num_vertices) +{ + struct pipe_context *pipe = nine_context_get_pipe_acquire(device); + struct pipe_context *pipe_sw = device->pipe_sw; + struct nine_state *state = &device->state; + struct nine_state_sw_internal *sw_internal = &device->state_sw_internal; + struct pipe_vertex_buffer vtxbuf; + uint32_t mask = 0xf; + unsigned i; + + DBG("mask=%x\n", mask); + + /* TODO: handle dummy_vbo_bound_at */ + + for (i = 0; mask; mask >>= 1, ++i) { + if (mask & 1) { + if (state->stream[i]) { + unsigned offset; + struct pipe_resource *buf; + struct pipe_box box; + + vtxbuf = state->vtxbuf[i]; + vtxbuf.buffer = NineVertexBuffer9_GetResource(state->stream[i], &offset); + + DBG("Locking %p (offset %d, length %d)\n", vtxbuf.buffer, + vtxbuf.buffer_offset, num_vertices * vtxbuf.stride); + + u_box_1d(vtxbuf.buffer_offset + offset + start_vertice * vtxbuf.stride, + num_vertices * vtxbuf.stride, &box); + buf = vtxbuf.buffer; + vtxbuf.user_buffer = pipe->transfer_map(pipe, buf, 0, PIPE_TRANSFER_READ, &box, + &(sw_internal->transfers_so[i])); + vtxbuf.buffer = NULL; + if (!device->driver_caps.user_sw_vbufs) { + u_upload_data(device->vertex_sw_uploader, + 0, + box.width, + 16, + vtxbuf.user_buffer, + &(vtxbuf.buffer_offset), + &(vtxbuf.buffer)); + u_upload_unmap(device->vertex_sw_uploader); + vtxbuf.user_buffer = NULL; + } + pipe_sw->set_vertex_buffers(pipe_sw, i, 1, &vtxbuf); + if (vtxbuf.buffer) + pipe_resource_reference(&vtxbuf.buffer, NULL); + } else + pipe_sw->set_vertex_buffers(pipe_sw, i, 1, NULL); + } + } + nine_context_get_pipe_release(device); +} + +static void +update_vs_constants_sw(struct NineDevice9 *device) +{ + struct nine_state *state = &device->state; + struct pipe_context *pipe_sw = device->pipe_sw; + + DBG("updating\n"); + + { + struct pipe_constant_buffer cb; + const void *buf; + + cb.buffer = NULL; + cb.buffer_offset = 0; + cb.buffer_size = 4096 * sizeof(float[4]); + cb.user_buffer = state->vs_const_f; + + if (state->vs->lconstf.ranges) { + const struct nine_lconstf *lconstf = &device->state.vs->lconstf; + const struct nine_range *r = lconstf->ranges; + unsigned n = 0; + float *dst = device->state.vs_lconstf_temp; + float *src = (float *)cb.user_buffer; + memcpy(dst, src, 8192 * sizeof(float[4])); + while (r) { + unsigned p = r->bgn; + unsigned c = r->end - r->bgn; + memcpy(&dst[p * 4], &lconstf->data[n * 4], c * 4 * sizeof(float)); + n += c; + r = r->next; + } + cb.user_buffer = dst; + } + + buf = cb.user_buffer; + if (!device->driver_caps.user_sw_cbufs) { + u_upload_data(device->constbuf_sw_uploader, + 0, + cb.buffer_size, + 16, + cb.user_buffer, + &(cb.buffer_offset), + &(cb.buffer)); + u_upload_unmap(device->constbuf_sw_uploader); + cb.user_buffer = NULL; + } + + pipe_sw->set_constant_buffer(pipe_sw, PIPE_SHADER_VERTEX, 0, &cb); + if (cb.buffer) + pipe_resource_reference(&cb.buffer, NULL); + + cb.user_buffer = (char *)buf + 4096 * sizeof(float[4]); + if (!device->driver_caps.user_sw_cbufs) { + u_upload_data(device->constbuf_sw_uploader, + 0, + cb.buffer_size, + 16, + cb.user_buffer, + &(cb.buffer_offset), + &(cb.buffer)); + u_upload_unmap(device->constbuf_sw_uploader); + cb.user_buffer = NULL; + } + + pipe_sw->set_constant_buffer(pipe_sw, PIPE_SHADER_VERTEX, 1, &cb); + if (cb.buffer) + pipe_resource_reference(&cb.buffer, NULL); + } + + { + struct pipe_constant_buffer cb; + + cb.buffer = NULL; + cb.buffer_offset = 0; + cb.buffer_size = 2048 * sizeof(float[4]); + cb.user_buffer = state->vs_const_i; + + if (!device->driver_caps.user_sw_cbufs) { + u_upload_data(device->constbuf_sw_uploader, + 0, + cb.buffer_size, + 16, + cb.user_buffer, + &(cb.buffer_offset), + &(cb.buffer)); + u_upload_unmap(device->constbuf_sw_uploader); + cb.user_buffer = NULL; + } + + pipe_sw->set_constant_buffer(pipe_sw, PIPE_SHADER_VERTEX, 2, &cb); + if (cb.buffer) + pipe_resource_reference(&cb.buffer, NULL); + } + + { + struct pipe_constant_buffer cb; + + cb.buffer = NULL; + cb.buffer_offset = 0; + cb.buffer_size = 512 * sizeof(float[4]); + cb.user_buffer = state->vs_const_b; + + if (!device->driver_caps.user_sw_cbufs) { + u_upload_data(device->constbuf_sw_uploader, + 0, + cb.buffer_size, + 16, + cb.user_buffer, + &(cb.buffer_offset), + &(cb.buffer)); + u_upload_unmap(device->constbuf_sw_uploader); + cb.user_buffer = NULL; + } + + pipe_sw->set_constant_buffer(pipe_sw, PIPE_SHADER_VERTEX, 3, &cb); + if (cb.buffer) + pipe_resource_reference(&cb.buffer, NULL); + } + + { + struct pipe_constant_buffer cb; + const D3DVIEWPORT9 *vport = &device->state.viewport; + float viewport_data[8] = {(float)vport->Width * 0.5f, + (float)vport->Height * -0.5f, vport->MaxZ - vport->MinZ, 0.f, + (float)vport->Width * 0.5f + (float)vport->X, + (float)vport->Height * 0.5f + (float)vport->Y, + vport->MinZ, 0.f}; + + cb.buffer = NULL; + cb.buffer_offset = 0; + cb.buffer_size = 2 * sizeof(float[4]); + cb.user_buffer = viewport_data; + + { + u_upload_data(device->constbuf_sw_uploader, + 0, + cb.buffer_size, + 16, + cb.user_buffer, + &(cb.buffer_offset), + &(cb.buffer)); + u_upload_unmap(device->constbuf_sw_uploader); + cb.user_buffer = NULL; + } + + pipe_sw->set_constant_buffer(pipe_sw, PIPE_SHADER_VERTEX, 4, &cb); + if (cb.buffer) + pipe_resource_reference(&cb.buffer, NULL); + } + +} + +void +nine_state_prepare_draw_sw(struct NineDevice9 *device, struct NineVertexDeclaration9 *vdecl_out, + int start_vertice, int num_vertices, struct pipe_stream_output_info *so) +{ + struct nine_state *state = &device->state; + bool programmable_vs = state->vs && !(state->vdecl && state->vdecl->position_t); + struct NineVertexShader9 *vs = programmable_vs ? device->state.vs : device->ff.vs; + + assert(programmable_vs); + + DBG("Preparing draw\n"); + cso_set_vertex_shader_handle(device->cso_sw, + NineVertexShader9_GetVariantProcessVertices(vs, vdecl_out, so)); + update_vertex_elements_sw(device); + update_vertex_buffers_sw(device, start_vertice, num_vertices); + update_vs_constants_sw(device); + DBG("Preparation succeeded\n"); +} + +void +nine_state_after_draw_sw(struct NineDevice9 *device) +{ + struct nine_state_sw_internal *sw_internal = &device->state_sw_internal; + struct pipe_context *pipe = nine_context_get_pipe_acquire(device); + struct pipe_context *pipe_sw = device->pipe_sw; + int i; + + for (i = 0; i < 4; i++) { + pipe_sw->set_vertex_buffers(pipe_sw, i, 1, NULL); + if (sw_internal->transfers_so[i]) + pipe->transfer_unmap(pipe, sw_internal->transfers_so[i]); + sw_internal->transfers_so[i] = NULL; + } + nine_context_get_pipe_release(device); +} + +void +nine_state_destroy_sw(struct NineDevice9 *device) +{ + (void) device; + /* Everything destroyed with cso */ +} + /* static const DWORD nine_render_states_pixel[] = { @@ -1600,7 +3749,7 @@ /* Misc */ D3DMATRIX * -nine_state_access_transform(struct nine_state *state, D3DTRANSFORMSTATETYPE t, +nine_state_access_transform(struct nine_ff_state *ff_state, D3DTRANSFORMSTATETYPE t, boolean alloc) { static D3DMATRIX Identity = { .m[0] = { 1, 0, 0, 0 }, @@ -1627,20 +3776,83 @@ break; } - if (index >= state->ff.num_transforms) { + if (index >= ff_state->num_transforms) { unsigned N = index + 1; - unsigned n = state->ff.num_transforms; + unsigned n = ff_state->num_transforms; if (!alloc) return &Identity; - state->ff.transform = REALLOC(state->ff.transform, + ff_state->transform = REALLOC(ff_state->transform, n * sizeof(D3DMATRIX), N * sizeof(D3DMATRIX)); for (; n < N; ++n) - state->ff.transform[n] = Identity; - state->ff.num_transforms = N; + ff_state->transform[n] = Identity; + ff_state->num_transforms = N; + } + return &ff_state->transform[index]; +} + +HRESULT +nine_state_set_light(struct nine_ff_state *ff_state, DWORD Index, + const D3DLIGHT9 *pLight) +{ + if (Index >= ff_state->num_lights) { + unsigned n = ff_state->num_lights; + unsigned N = Index + 1; + + ff_state->light = REALLOC(ff_state->light, n * sizeof(D3DLIGHT9), + N * sizeof(D3DLIGHT9)); + if (!ff_state->light) + return E_OUTOFMEMORY; + ff_state->num_lights = N; + + for (; n < Index; ++n) { + memset(&ff_state->light[n], 0, sizeof(D3DLIGHT9)); + ff_state->light[n].Type = (D3DLIGHTTYPE)NINED3DLIGHT_INVALID; + } + } + ff_state->light[Index] = *pLight; + + if (pLight->Type == D3DLIGHT_SPOT && pLight->Theta >= pLight->Phi) { + DBG("Warning: clamping D3DLIGHT9.Theta\n"); + ff_state->light[Index].Theta = ff_state->light[Index].Phi; + } + return D3D_OK; +} + +HRESULT +nine_state_light_enable(struct nine_ff_state *ff_state, uint32_t *change_group, + DWORD Index, BOOL Enable) +{ + unsigned i; + + user_assert(Index < ff_state->num_lights, D3DERR_INVALIDCALL); + + for (i = 0; i < ff_state->num_lights_active; ++i) { + if (ff_state->active_light[i] == Index) + break; + } + + if (Enable) { + if (i < ff_state->num_lights_active) + return D3D_OK; + /* XXX wine thinks this should still succeed: + */ + user_assert(i < NINE_MAX_LIGHTS_ACTIVE, D3DERR_INVALIDCALL); + + ff_state->active_light[i] = Index; + ff_state->num_lights_active++; + } else { + if (i == ff_state->num_lights_active) + return D3D_OK; + --ff_state->num_lights_active; + for (; i < ff_state->num_lights_active; ++i) + ff_state->active_light[i] = ff_state->active_light[i + 1]; } - return &state->ff.transform[index]; + + *change_group |= NINE_STATE_FF_LIGHTING; + + return D3D_OK; } #define D3DRS_TO_STRING_CASE(n) case D3DRS_##n: return "D3DRS_"#n diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/nine_state.h mesa-17.0.7/src/gallium/state_trackers/nine/nine_state.h --- mesa-12.0.6/src/gallium/state_trackers/nine/nine_state.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/nine_state.h 2017-06-01 10:37:10.000000000 +0000 @@ -30,6 +30,7 @@ #define NINED3DSAMP_MINLOD (D3DSAMP_DMAPOFFSET + 1) #define NINED3DSAMP_SHADOW (D3DSAMP_DMAPOFFSET + 2) +#define NINED3DSAMP_CUBETEX (D3DSAMP_DMAPOFFSET + 3) #define NINED3DRS_VSPOINTSIZE (D3DRS_BLENDOPALPHA + 1) #define NINED3DRS_RTMASK (D3DRS_BLENDOPALPHA + 2) @@ -41,12 +42,14 @@ #define NINED3DRS_MULTISAMPLE (D3DRS_BLENDOPALPHA + 4) #define D3DRS_LAST D3DRS_BLENDOPALPHA +#define D3DSAMP_LAST D3DSAMP_DMAPOFFSET #define NINED3DRS_LAST NINED3DRS_MULTISAMPLE /* 214 */ -#define NINED3DSAMP_LAST NINED3DSAMP_SHADOW /* 15 */ +#define NINED3DSAMP_LAST NINED3DSAMP_CUBETEX /* 16 */ #define NINED3DTSS_LAST D3DTSS_CONSTANT #define NINED3DTS_LAST D3DTS_WORLDMATRIX(255) #define D3DRS_COUNT (D3DRS_LAST + 1) +#define D3DSAMP_COUNT (D3DSAMP_LAST + 1) #define NINED3DRS_COUNT (NINED3DRS_LAST + 1) #define NINED3DSAMP_COUNT (NINED3DSAMP_LAST + 1) #define NINED3DTSS_COUNT (NINED3DTSS_LAST + 1) @@ -84,8 +87,9 @@ #define NINE_STATE_PS1X_SHADER (1 << 26) #define NINE_STATE_POINTSIZE_SHADER (1 << 27) #define NINE_STATE_MULTISAMPLE (1 << 28) -#define NINE_STATE_ALL 0x1fffffff -#define NINE_STATE_UNHANDLED (1 << 29) +#define NINE_STATE_SWVP (1 << 29) +#define NINE_STATE_ALL 0x3fffffff +#define NINE_STATE_UNHANDLED (1 << 30) #define NINE_STATE_COMMIT_DSA (1 << 0) #define NINE_STATE_COMMIT_RASTERIZER (1 << 1) @@ -101,6 +105,9 @@ #define NINE_MAX_CONST_F 256 #define NINE_MAX_CONST_I 16 #define NINE_MAX_CONST_B 16 +#define NINE_MAX_CONST_F_SWVP 8192 +#define NINE_MAX_CONST_I_SWVP 2048 +#define NINE_MAX_CONST_B_SWVP 2048 #define NINE_MAX_CONST_ALL 276 /* B consts count only 1/4 th */ #define NINE_CONST_I_BASE(nconstf) \ @@ -109,6 +116,10 @@ ((nconstf) * 4 * sizeof(float) + \ NINE_MAX_CONST_I * 4 * sizeof(int)) +#define VS_CONST_F_SIZE(device) (device->may_swvp ? (NINE_MAX_CONST_F_SWVP * sizeof(float[4])) : (NINE_MAX_CONST_F * sizeof(float[4]))) +#define VS_CONST_I_SIZE(device) (device->may_swvp ? (NINE_MAX_CONST_I_SWVP * sizeof(int[4])) : (NINE_MAX_CONST_I * sizeof(int[4]))) +#define VS_CONST_B_SIZE(device) (device->may_swvp ? (NINE_MAX_CONST_B_SWVP * sizeof(BOOL)) : (NINE_MAX_CONST_B * sizeof(BOOL))) + #define NINE_MAX_TEXTURE_STAGES 8 @@ -126,6 +137,28 @@ #define NINE_PS_SAMPLERS_MASK 0x00ffff #define NINE_VS_SAMPLERS_MASK 0x1e0000 +struct nine_ff_state { + struct { + uint32_t tex_stage[NINE_MAX_TEXTURE_STAGES][(NINED3DTSS_COUNT + 31) / 32]; /* stateblocks only */ + uint32_t transform[(NINED3DTS_COUNT + 31) / 32]; + } changed; + + D3DMATRIX *transform; /* access only via nine_state_access_transform */ + unsigned num_transforms; + + /* XXX: Do state blocks just change the set of active lights or do we + * have to store which lights have been disabled, too ? + */ + D3DLIGHT9 *light; + uint16_t active_light[NINE_MAX_LIGHTS_ACTIVE]; /* 8 */ + unsigned num_lights; + unsigned num_lights_active; + + D3DMATERIAL9 material; + + DWORD tex_stage[NINE_MAX_TEXTURE_STAGES][NINED3DTSS_COUNT]; +}; + struct nine_state { struct { @@ -137,12 +170,12 @@ uint16_t sampler[NINE_MAX_SAMPLERS]; struct nine_range *vs_const_f; struct nine_range *ps_const_f; - uint16_t vs_const_i; /* NINE_MAX_CONST_I == 16 */ - uint16_t ps_const_i; - uint16_t vs_const_b; /* NINE_MAX_CONST_B == 16 */ - uint16_t ps_const_b; + struct nine_range *vs_const_i; + uint16_t ps_const_i; /* NINE_MAX_CONST_I == 16 */ + struct nine_range *vs_const_b; + uint16_t ps_const_b; /* NINE_MAX_CONST_B == 16 */ uint8_t ucp; - } changed; + } changed; /* stateblocks only */ struct NineSurface9 *rt[NINE_MAX_SIMULTANEOUS_RENDERTARGETS]; struct NineSurface9 *ds; @@ -157,84 +190,142 @@ */ struct NineVertexShader9 *vs; float *vs_const_f; - int vs_const_i[NINE_MAX_CONST_I][4]; - BOOL vs_const_b[NINE_MAX_CONST_B]; - float *vs_lconstf_temp; - BOOL programmable_vs; + int *vs_const_i; + BOOL *vs_const_b; + float *vs_lconstf_temp; /* ProcessVertices */ struct NinePixelShader9 *ps; float *ps_const_f; int ps_const_i[NINE_MAX_CONST_I][4]; BOOL ps_const_b[NINE_MAX_CONST_B]; - float *ps_lconstf_temp; + + struct NineVertexDeclaration9 *vdecl; + + struct NineIndexBuffer9 *idxbuf; + struct NineVertexBuffer9 *stream[PIPE_MAX_ATTRIBS]; + struct pipe_vertex_buffer vtxbuf[PIPE_MAX_ATTRIBS]; /* vtxbuf.buffer unused */ + UINT stream_freq[PIPE_MAX_ATTRIBS]; + + struct pipe_clip_state clip; + + DWORD rs_advertised[NINED3DRS_COUNT]; /* the ones apps get with GetRenderState */ + + struct NineBaseTexture9 *texture[NINE_MAX_SAMPLERS]; /* PS, DMAP, VS */ + + DWORD samp_advertised[NINE_MAX_SAMPLERS][D3DSAMP_COUNT]; + + struct nine_ff_state ff; +}; + +struct nine_context { + struct { + uint32_t group; + uint16_t sampler[NINE_MAX_SAMPLERS]; + uint32_t vtxbuf; + BOOL vs_const_f; + BOOL vs_const_i; + BOOL vs_const_b; + BOOL ps_const_f; + BOOL ps_const_i; + BOOL ps_const_b; + BOOL ucp; + } changed; + uint32_t bumpmap_vars[6 * NINE_MAX_TEXTURE_STAGES]; + struct NineSurface9 *rt[NINE_MAX_SIMULTANEOUS_RENDERTARGETS]; + struct NineSurface9 *ds; + struct { void *vs; void *ps; - } cso; + } cso_shader; + + struct pipe_context *pipe; + struct cso_context *cso; + + uint8_t rt_mask; + + D3DVIEWPORT9 viewport; + + struct pipe_scissor_state scissor; + + struct NineVertexShader9 *vs; + BOOL programmable_vs; + float *vs_const_f; + float *vs_const_f_swvp; + int *vs_const_i; + BOOL *vs_const_b; + float *vs_lconstf_temp; + + struct NinePixelShader9 *ps; + float *ps_const_f; + int ps_const_i[NINE_MAX_CONST_I][4]; + BOOL ps_const_b[NINE_MAX_CONST_B]; + float *ps_lconstf_temp; struct NineVertexDeclaration9 *vdecl; - struct NineIndexBuffer9 *idxbuf; - struct NineVertexBuffer9 *stream[PIPE_MAX_ATTRIBS]; - struct pipe_vertex_buffer vtxbuf[PIPE_MAX_ATTRIBS]; + struct pipe_vertex_buffer vtxbuf[PIPE_MAX_ATTRIBS]; UINT stream_freq[PIPE_MAX_ATTRIBS]; uint32_t stream_instancedata_mask; /* derived from stream_freq */ uint32_t stream_usage_mask; /* derived from VS and vdecl */ + struct pipe_index_buffer idxbuf; + struct pipe_clip_state clip; - struct pipe_framebuffer_state fb; - uint8_t rt_mask; DWORD rs[NINED3DRS_COUNT]; - DWORD rs_advertised[NINED3DRS_COUNT]; /* the ones apps get with GetRenderState */ - struct NineBaseTexture9 *texture[NINE_MAX_SAMPLERS]; /* PS, DMAP, VS */ + struct { + BOOL enabled; + BOOL shadow; + DWORD lod; + D3DRESOURCETYPE type; + struct pipe_resource *resource; + struct pipe_sampler_view *view[2]; + uint8_t pstype; + } texture[NINE_MAX_SAMPLERS]; DWORD samp[NINE_MAX_SAMPLERS][NINED3DSAMP_COUNT]; + uint32_t samplers_shadow; + uint8_t bound_samplers_mask_vs; uint16_t bound_samplers_mask_ps; int dummy_vbo_bound_at; /* -1 = not bound , >= 0 = bound index */ boolean vbo_bound_done; - struct { - struct { - uint32_t group; - uint32_t tex_stage[NINE_MAX_TEXTURE_STAGES][(NINED3DTSS_COUNT + 31) / 32]; - uint32_t transform[(NINED3DTS_COUNT + 31) / 32]; - } changed; - - D3DMATRIX *transform; /* access only via nine_state_access_transform */ - unsigned num_transforms; - - /* XXX: Do state blocks just change the set of active lights or do we - * have to store which lights have been disabled, too ? - */ - D3DLIGHT9 *light; - uint16_t active_light[NINE_MAX_LIGHTS_ACTIVE]; /* 8 */ - unsigned num_lights; - unsigned num_lights_active; - - D3DMATERIAL9 material; + struct nine_ff_state ff; - DWORD tex_stage[NINE_MAX_TEXTURE_STAGES][NINED3DTSS_COUNT]; - } ff; + /* software vertex processing */ + boolean swvp; uint32_t commit; struct { + struct pipe_framebuffer_state fb; struct pipe_depth_stencil_alpha_state dsa; struct pipe_rasterizer_state rast; struct pipe_blend_state blend; struct pipe_constant_buffer cb_vs; + struct pipe_constant_buffer cb0_swvp; + struct pipe_constant_buffer cb1_swvp; + struct pipe_constant_buffer cb2_swvp; + struct pipe_constant_buffer cb3_swvp; struct pipe_constant_buffer cb_ps; struct pipe_constant_buffer cb_vs_ff; struct pipe_constant_buffer cb_ps_ff; - } pipe; + } pipe_data; }; +struct nine_state_sw_internal { + struct pipe_transfer *transfers_so[4]; +}; + +struct nine_clipplane { + float plane[4]; +}; /* map D3DRS -> NINE_STATE_x */ extern const uint32_t nine_render_state_group[NINED3DRS_COUNT]; @@ -246,21 +337,320 @@ struct NineDevice9; -void nine_update_state_framebuffer_clear(struct NineDevice9 *); -boolean nine_update_state(struct NineDevice9 *); +/* Internal multithreading: When enabled, the nine_context functions + * will append work to a worker thread when possible. Only the worker + * thread can access struct nine_context. */ + +void +nine_context_set_render_state(struct NineDevice9 *device, + D3DRENDERSTATETYPE State, + DWORD Value); + +void +nine_context_set_texture(struct NineDevice9 *device, + DWORD Stage, + struct NineBaseTexture9 *tex); + +void +nine_context_set_sampler_state(struct NineDevice9 *device, + DWORD Sampler, + D3DSAMPLERSTATETYPE Type, + DWORD Value); + +void +nine_context_set_stream_source(struct NineDevice9 *device, + UINT StreamNumber, + struct NineVertexBuffer9 *pVBuf9, + UINT OffsetInBytes, + UINT Stride); + +void +nine_context_set_stream_source_freq(struct NineDevice9 *device, + UINT StreamNumber, + UINT Setting); + +void +nine_context_set_indices(struct NineDevice9 *device, + struct NineIndexBuffer9 *idxbuf); + +void +nine_context_set_vertex_declaration(struct NineDevice9 *device, + struct NineVertexDeclaration9 *vdecl); + +void +nine_context_set_vertex_shader(struct NineDevice9 *device, + struct NineVertexShader9 *pShader); + +void +nine_context_set_vertex_shader_constant_f(struct NineDevice9 *device, + UINT StartRegister, + const float *pConstantData, + const unsigned pConstantData_size, + UINT Vector4fCount); + +void +nine_context_set_vertex_shader_constant_i(struct NineDevice9 *device, + UINT StartRegister, + const int *pConstantData, + const unsigned pConstantData_size, + UINT Vector4iCount); + +void +nine_context_set_vertex_shader_constant_b(struct NineDevice9 *device, + UINT StartRegister, + const BOOL *pConstantData, + const unsigned pConstantData_size, + UINT BoolCount); + +void +nine_context_set_pixel_shader(struct NineDevice9 *device, + struct NinePixelShader9* ps); + +void +nine_context_set_pixel_shader_constant_f(struct NineDevice9 *device, + UINT StartRegister, + const float *pConstantData, + const unsigned pConstantData_size, + UINT Vector4fCount); + +void +nine_context_set_pixel_shader_constant_i(struct NineDevice9 *device, + UINT StartRegister, + const int *pConstantData, + const unsigned pConstantData_size, + UINT Vector4iCount); + +void +nine_context_set_pixel_shader_constant_b(struct NineDevice9 *device, + UINT StartRegister, + const BOOL *pConstantData, + const unsigned pConstantData_size, + UINT BoolCount); + +void +nine_context_set_viewport(struct NineDevice9 *device, + const D3DVIEWPORT9 *viewport); + +void +nine_context_set_scissor(struct NineDevice9 *device, + const struct pipe_scissor_state *scissor); + +void +nine_context_set_transform(struct NineDevice9 *device, + D3DTRANSFORMSTATETYPE State, + const D3DMATRIX *pMatrix); + +void +nine_context_set_material(struct NineDevice9 *device, + const D3DMATERIAL9 *pMaterial); + +void +nine_context_set_light(struct NineDevice9 *device, + DWORD Index, + const D3DLIGHT9 *pLight); + +void +nine_context_light_enable(struct NineDevice9 *device, + DWORD Index, + BOOL Enable); + +void +nine_context_set_texture_stage_state(struct NineDevice9 *device, + DWORD Stage, + D3DTEXTURESTAGESTATETYPE Type, + DWORD Value); + +void +nine_context_set_render_target(struct NineDevice9 *device, + DWORD RenderTargetIndex, + struct NineSurface9 *rt); + +void +nine_context_set_depth_stencil(struct NineDevice9 *device, + struct NineSurface9 *ds); + +void +nine_context_set_clip_plane(struct NineDevice9 *device, + DWORD Index, + const struct nine_clipplane *pPlane); + +void +nine_context_set_swvp(struct NineDevice9 *device, + boolean swvp); + +void +nine_context_apply_stateblock(struct NineDevice9 *device, + const struct nine_state *src); + +void +nine_context_clear_fb(struct NineDevice9 *device, DWORD Count, + const D3DRECT *pRects, DWORD Flags, + D3DCOLOR Color, float Z, DWORD Stencil); + +void +nine_context_draw_primitive(struct NineDevice9 *device, + D3DPRIMITIVETYPE PrimitiveType, + UINT StartVertex, + UINT PrimitiveCount); + +void +nine_context_draw_indexed_primitive(struct NineDevice9 *device, + D3DPRIMITIVETYPE PrimitiveType, + INT BaseVertexIndex, + UINT MinVertexIndex, + UINT NumVertices, + UINT StartIndex, + UINT PrimitiveCount); + +void +nine_context_draw_primitive_from_vtxbuf(struct NineDevice9 *device, + D3DPRIMITIVETYPE PrimitiveType, + UINT PrimitiveCount, + struct pipe_vertex_buffer *vtxbuf); + +void +nine_context_draw_indexed_primitive_from_vtxbuf_idxbuf(struct NineDevice9 *device, + D3DPRIMITIVETYPE PrimitiveType, + UINT MinVertexIndex, + UINT NumVertices, + UINT PrimitiveCount, + struct pipe_vertex_buffer *vbuf, + struct pipe_index_buffer *ibuf); + +void +nine_context_resource_copy_region(struct NineDevice9 *device, + struct NineUnknown *dst, + struct NineUnknown *src, + struct pipe_resource* dst_res, + unsigned dst_level, + const struct pipe_box *dst_box, + struct pipe_resource* src_res, + unsigned src_level, + const struct pipe_box *src_box); + +void +nine_context_blit(struct NineDevice9 *device, + struct NineUnknown *dst, + struct NineUnknown *src, + struct pipe_blit_info *blit); + +void +nine_context_clear_render_target(struct NineDevice9 *device, + struct NineSurface9 *surface, + D3DCOLOR color, + UINT x, + UINT y, + UINT width, + UINT height); + +void +nine_context_gen_mipmap(struct NineDevice9 *device, + struct NineUnknown *dst, + struct pipe_resource *res, + UINT base_level, UINT last_level, + UINT first_layer, UINT last_layer, + UINT filter); + +void +nine_context_range_upload(struct NineDevice9 *device, + unsigned *counter, + struct pipe_resource *res, + unsigned offset, + unsigned size, + const void *data); + +void +nine_context_box_upload(struct NineDevice9 *device, + unsigned *counter, + struct NineUnknown *dst, + struct pipe_resource *res, + unsigned level, + const struct pipe_box *dst_box, + enum pipe_format src_format, + const void *src, unsigned src_stride, + unsigned src_layer_stride, + const struct pipe_box *src_box); + +struct pipe_query * +nine_context_create_query(struct NineDevice9 *device, unsigned query_type); + +void +nine_context_destroy_query(struct NineDevice9 *device, struct pipe_query *query); + +void +nine_context_begin_query(struct NineDevice9 *device, unsigned *counter, struct pipe_query *query); + +void +nine_context_end_query(struct NineDevice9 *device, unsigned *counter, struct pipe_query *query); + +boolean +nine_context_get_query_result(struct NineDevice9 *device, struct pipe_query *query, + unsigned *counter, boolean flush, boolean wait, + union pipe_query_result *result); void nine_state_restore_non_cso(struct NineDevice9 *device); void nine_state_set_defaults(struct NineDevice9 *, const D3DCAPS9 *, boolean is_reset); void nine_state_clear(struct nine_state *, const boolean device); +void nine_context_clear(struct NineDevice9 *); + +void nine_state_init_sw(struct NineDevice9 *device); +void nine_state_prepare_draw_sw(struct NineDevice9 *device, + struct NineVertexDeclaration9 *vdecl_out, + int start_vertice, + int num_vertices, + struct pipe_stream_output_info *so); +void nine_state_after_draw_sw(struct NineDevice9 *device); +void nine_state_destroy_sw(struct NineDevice9 *device); /* If @alloc is FALSE, the return value may be a const identity matrix. * Therefore, do not modify if you set alloc to FALSE ! */ D3DMATRIX * -nine_state_access_transform(struct nine_state *, D3DTRANSFORMSTATETYPE, +nine_state_access_transform(struct nine_ff_state *, D3DTRANSFORMSTATETYPE, boolean alloc); +HRESULT +nine_state_set_light(struct nine_ff_state *, DWORD, const D3DLIGHT9 *); + +HRESULT +nine_state_light_enable(struct nine_ff_state *, uint32_t *, + DWORD, BOOL); + const char *nine_d3drs_to_string(DWORD State); +/* CSMT functions */ +struct csmt_context; + +struct csmt_context * +nine_csmt_create( struct NineDevice9 *This ); + +void +nine_csmt_destroy( struct NineDevice9 *This, struct csmt_context *ctx ); + +void +nine_csmt_process( struct NineDevice9 *This ); + + +/* Get the pipe_context (should not be called from the worker thread). + * All the work in the worker thread is finished before returning. */ +struct pipe_context * +nine_context_get_pipe( struct NineDevice9 *device ); + +/* Can be called from all threads */ +struct pipe_context * +nine_context_get_pipe_multithread( struct NineDevice9 *device ); + + +/* Get the pipe_context (should not be called from the worker thread). + * All the work in the worker thread is paused before returning. + * It is neccessary to release in order to restart the thread. + * This is intended for use of the nine_context pipe_context that don't + * need the worker thread to finish all queued job. */ +struct pipe_context * +nine_context_get_pipe_acquire( struct NineDevice9 *device ); + +void +nine_context_get_pipe_release( struct NineDevice9 *device ); + #endif /* _NINE_STATE_H_ */ diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/pixelshader9.c mesa-17.0.7/src/gallium/state_trackers/nine/pixelshader9.c --- mesa-12.0.6/src/gallium/state_trackers/nine/pixelshader9.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/pixelshader9.c 2017-06-01 10:37:10.000000000 +0000 @@ -37,6 +37,7 @@ { struct NineDevice9 *device; struct nine_shader_info info; + struct pipe_context *pipe; HRESULT hr; DBG("This=%p pParams=%p pFunction=%p cso=%p\n", This, pParams, pFunction, cso); @@ -59,8 +60,11 @@ info.sampler_ps1xtypes = 0x0; info.fog_enable = 0; info.projected = 0; + info.process_vertices = false; - hr = nine_translate_shader(device, &info); + pipe = nine_context_get_pipe_acquire(device); + hr = nine_translate_shader(device, &info, pipe); + nine_context_get_pipe_release(device); if (FAILED(hr)) return hr; This->byte_code.version = info.version; @@ -91,12 +95,12 @@ DBG("This=%p\n", This); if (This->base.device) { - struct pipe_context *pipe = This->base.device->pipe; + struct pipe_context *pipe = nine_context_get_pipe_multithread(This->base.device); struct nine_shader_variant *var = &This->variant; do { if (var->cso) { - if (This->base.device->state.cso.ps == var->cso) + if (This->base.device->context.cso_shader.ps == var->cso) pipe->bind_fs_state(pipe, NULL); pipe->delete_fs_state(pipe, var->cso); } @@ -104,7 +108,7 @@ } while (var); if (This->ff_cso) { - if (This->ff_cso == This->base.device->state.cso.ps) + if (This->ff_cso == This->base.device->context.cso_shader.ps) pipe->bind_fs_state(pipe, NULL); pipe->delete_fs_state(pipe, This->ff_cso); } @@ -139,6 +143,9 @@ void * NinePixelShader9_GetVariant( struct NinePixelShader9 *This ) { + /* GetVariant is called from nine_context, thus we can + * get pipe directly */ + struct pipe_context *pipe = This->base.device->context.pipe; void *cso; uint64_t key; @@ -158,12 +165,13 @@ info.byte_code = This->byte_code.tokens; info.sampler_mask_shadow = key & 0xffff; info.sampler_ps1xtypes = key; - info.fog_enable = device->state.rs[D3DRS_FOGENABLE]; - info.fog_mode = device->state.rs[D3DRS_FOGTABLEMODE]; + info.fog_enable = device->context.rs[D3DRS_FOGENABLE]; + info.fog_mode = device->context.rs[D3DRS_FOGTABLEMODE]; info.force_color_in_centroid = key >> 34 & 1; info.projected = (key >> 48) & 0xffff; + info.process_vertices = false; - hr = nine_translate_shader(This->base.device, &info); + hr = nine_translate_shader(This->base.device, &info, pipe); if (FAILED(hr)) return NULL; nine_shader_variant_add(&This->variant, key, info.cso); diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/pixelshader9.h mesa-17.0.7/src/gallium/state_trackers/nine/pixelshader9.h --- mesa-12.0.6/src/gallium/state_trackers/nine/pixelshader9.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/pixelshader9.h 2017-06-01 10:37:10.000000000 +0000 @@ -65,7 +65,7 @@ static inline BOOL NinePixelShader9_UpdateKey( struct NinePixelShader9 *ps, - struct nine_state *state ) + struct nine_context *context ) { uint16_t samplers_shadow; uint32_t samplers_ps1_types; @@ -80,25 +80,25 @@ while (m) { int s = ffs(m) - 1; m &= ~(1 << s); - samplers_ps1_types |= (state->texture[s] ? state->texture[s]->pstype : 1) << (s * 2); + samplers_ps1_types |= (context->texture[s].enabled ? context->texture[s].pstype : 1) << (s * 2); } key = samplers_ps1_types; } else { - samplers_shadow = (uint16_t)((state->samplers_shadow & NINE_PS_SAMPLERS_MASK) >> NINE_SAMPLER_PS(0)); + samplers_shadow = (uint16_t)((context->samplers_shadow & NINE_PS_SAMPLERS_MASK) >> NINE_SAMPLER_PS(0)); key = samplers_shadow & ps->sampler_mask; } if (ps->byte_code.version < 0x30) { - key |= ((uint64_t)state->rs[D3DRS_FOGENABLE]) << 32; - key |= ((uint64_t)state->rs[D3DRS_FOGTABLEMODE]) << 33; + key |= ((uint64_t)context->rs[D3DRS_FOGENABLE]) << 32; + key |= ((uint64_t)context->rs[D3DRS_FOGTABLEMODE]) << 33; } /* centroid interpolation automatically used for color ps inputs */ - if (state->rt[0]->desc.MultiSampleType > 1) + if (context->rt[0]->base.info.nr_samples) key |= ((uint64_t)1) << 34; if (unlikely(ps->byte_code.version < 0x14)) { - projected = nine_ff_get_projected_key(state); + projected = nine_ff_get_projected_key(context); key |= ((uint64_t) projected) << 48; } diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/query9.c mesa-17.0.7/src/gallium/state_trackers/nine/query9.c --- mesa-12.0.6/src/gallium/state_trackers/nine/query9.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/query9.c 2017-06-01 10:37:10.000000000 +0000 @@ -21,6 +21,7 @@ * USE OR OTHER DEALINGS IN THE SOFTWARE. */ #include "device9.h" +#include "nine_state.h" #include "query9.h" #include "nine_helpers.h" #include "pipe/p_screen.h" @@ -93,8 +94,8 @@ struct NineUnknownParams *pParams, D3DQUERYTYPE Type ) { - struct pipe_context *pipe = pParams->device->pipe; - const unsigned ptype = d3dquerytype_to_pipe_query(pParams->device->screen, Type); + struct NineDevice9 *device = pParams->device; + const unsigned ptype = d3dquerytype_to_pipe_query(device->screen, Type); HRESULT hr; DBG("This=%p pParams=%p Type=%d\n", This, pParams, Type); @@ -109,7 +110,7 @@ user_assert(ptype != ~0, D3DERR_INVALIDCALL); if (ptype < PIPE_QUERY_TYPES) { - This->pq = pipe->create_query(pipe, ptype, 0); + This->pq = nine_context_create_query(device, ptype); if (!This->pq) return E_OUTOFMEMORY; } else { @@ -132,14 +133,14 @@ void NineQuery9_dtor( struct NineQuery9 *This ) { - struct pipe_context *pipe = This->base.device->pipe; + struct NineDevice9 *device = This->base.device; DBG("This=%p\n", This); if (This->pq) { if (This->state == NINE_QUERY_STATE_RUNNING) - pipe->end_query(pipe, This->pq); - pipe->destroy_query(pipe, This->pq); + nine_context_end_query(device, &This->counter, This->pq); + nine_context_destroy_query(device, This->pq); } NineUnknown_dtor(&This->base); @@ -161,7 +162,7 @@ NineQuery9_Issue( struct NineQuery9 *This, DWORD dwIssueFlags ) { - struct pipe_context *pipe = This->base.device->pipe; + struct NineDevice9 *device = This->base.device; DBG("This=%p dwIssueFlags=%d\n", This, dwIssueFlags); @@ -175,17 +176,16 @@ return D3D_OK; if (dwIssueFlags == D3DISSUE_BEGIN) { - if (This->state == NINE_QUERY_STATE_RUNNING) { - pipe->end_query(pipe, This->pq); - } - pipe->begin_query(pipe, This->pq); + if (This->state == NINE_QUERY_STATE_RUNNING) + nine_context_end_query(device, &This->counter, This->pq); + nine_context_begin_query(device, &This->counter, This->pq); This->state = NINE_QUERY_STATE_RUNNING; } else { if (This->state != NINE_QUERY_STATE_RUNNING && This->type != D3DQUERYTYPE_EVENT && This->type != D3DQUERYTYPE_TIMESTAMP) - pipe->begin_query(pipe, This->pq); - pipe->end_query(pipe, This->pq); + nine_context_begin_query(device, &This->counter, This->pq); + nine_context_end_query(device, &This->counter, This->pq); This->state = NINE_QUERY_STATE_ENDED; } return D3D_OK; @@ -205,7 +205,7 @@ DWORD dwSize, DWORD dwGetDataFlags ) { - struct pipe_context *pipe = This->base.device->pipe; + struct NineDevice9 *device = This->base.device; boolean ok, wait_query_result = FALSE; union pipe_query_result presult; union nine_query_result nresult; @@ -240,7 +240,9 @@ /* Note: We ignore dwGetDataFlags, because get_query_result will * flush automatically if needed */ - ok = pipe->get_query_result(pipe, This->pq, wait_query_result, &presult); + ok = nine_context_get_query_result(device, This->pq, &This->counter, + !!(dwGetDataFlags & D3DGETDATA_FLUSH), + wait_query_result, &presult); if (!ok) return S_FALSE; diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/query9.h mesa-17.0.7/src/gallium/state_trackers/nine/query9.h --- mesa-12.0.6/src/gallium/state_trackers/nine/query9.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/query9.h 2017-06-01 10:37:10.000000000 +0000 @@ -40,6 +40,7 @@ D3DQUERYTYPE type; enum nine_query_state state; boolean instant; /* true if D3DISSUE_BEGIN is not needed / invalid */ + unsigned counter; /* Number of pending Begin/End (0 if internal multithreading off) */ }; static inline struct NineQuery9 * NineQuery9( void *data ) diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/resource9.c mesa-17.0.7/src/gallium/state_trackers/nine/resource9.c --- mesa-12.0.6/src/gallium/state_trackers/nine/resource9.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/resource9.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,13 +25,10 @@ #include "nine_helpers.h" #include "nine_defines.h" -#include "pipe/p_screen.h" - -#include "util/u_hash_table.h" #include "util/u_inlines.h" #include "util/u_resource.h" -#include "nine_pdata.h" +#include "pipe/p_screen.h" #define DBG_CHANNEL DBG_RESOURCE @@ -82,7 +79,7 @@ if (This->info.target != PIPE_BUFFER) { This->size = util_resource_size(&This->info); - This->base.device->available_texture_mem -= This->size; + p_atomic_add(&This->base.device->available_texture_mem, -This->size); if (This->base.device->available_texture_mem <= This->base.device->available_texture_limit) { return D3DERR_OUTOFVIDEOMEMORY; @@ -100,10 +97,6 @@ This->usage = Usage; This->priority = 0; - This->pdata = util_hash_table_create(ht_guid_hash, ht_guid_compare); - if (!This->pdata) - return E_OUTOFMEMORY; - return D3D_OK; } @@ -112,18 +105,13 @@ { DBG("This=%p\n", This); - if (This->pdata) { - util_hash_table_foreach(This->pdata, ht_guid_delete, NULL); - util_hash_table_destroy(This->pdata); - } - /* NOTE: We do have to use refcounting, the driver might * still hold a reference. */ pipe_resource_reference(&This->resource, NULL); /* NOTE: size is 0, unless something has actually been allocated */ if (This->base.device) - This->base.device->available_texture_mem += This->size; + p_atomic_add(&This->base.device->available_texture_mem, This->size); NineUnknown_dtor(&This->base); } @@ -140,107 +128,6 @@ return This->pool; } -HRESULT NINE_WINAPI -NineResource9_SetPrivateData( struct NineResource9 *This, - REFGUID refguid, - const void *pData, - DWORD SizeOfData, - DWORD Flags ) -{ - enum pipe_error err; - struct pheader *header; - const void *user_data = pData; - char guid_str[64]; - - DBG("This=%p GUID=%s pData=%p SizeOfData=%u Flags=%x\n", - This, GUID_sprintf(guid_str, refguid), pData, SizeOfData, Flags); - - if (Flags & D3DSPD_IUNKNOWN) - user_assert(SizeOfData == sizeof(IUnknown *), D3DERR_INVALIDCALL); - - /* data consists of a header and the actual data. avoiding 2 mallocs */ - header = CALLOC_VARIANT_LENGTH_STRUCT(pheader, SizeOfData-1); - if (!header) { return E_OUTOFMEMORY; } - header->unknown = (Flags & D3DSPD_IUNKNOWN) ? TRUE : FALSE; - - /* if the refguid already exists, delete it */ - NineResource9_FreePrivateData(This, refguid); - - /* IUnknown special case */ - if (header->unknown) { - /* here the pointer doesn't point to the data we want, so point at the - * pointer making what we eventually copy is the pointer itself */ - user_data = &pData; - } - - header->size = SizeOfData; - memcpy(header->data, user_data, header->size); - memcpy(&header->guid, refguid, sizeof(header->guid)); - - err = util_hash_table_set(This->pdata, &header->guid, header); - if (err == PIPE_OK) { - if (header->unknown) { IUnknown_AddRef(*(IUnknown **)header->data); } - return D3D_OK; - } - - FREE(header); - if (err == PIPE_ERROR_OUT_OF_MEMORY) { return E_OUTOFMEMORY; } - - return D3DERR_DRIVERINTERNALERROR; -} - -HRESULT NINE_WINAPI -NineResource9_GetPrivateData( struct NineResource9 *This, - REFGUID refguid, - void *pData, - DWORD *pSizeOfData ) -{ - struct pheader *header; - DWORD sizeofdata; - char guid_str[64]; - - DBG("This=%p GUID=%s pData=%p pSizeOfData=%p\n", - This, GUID_sprintf(guid_str, refguid), pData, pSizeOfData); - - header = util_hash_table_get(This->pdata, refguid); - if (!header) { return D3DERR_NOTFOUND; } - - user_assert(pSizeOfData, E_POINTER); - sizeofdata = *pSizeOfData; - *pSizeOfData = header->size; - - if (!pData) { - return D3D_OK; - } - if (sizeofdata < header->size) { - return D3DERR_MOREDATA; - } - - if (header->unknown) { IUnknown_AddRef(*(IUnknown **)header->data); } - memcpy(pData, header->data, header->size); - - return D3D_OK; -} - -HRESULT NINE_WINAPI -NineResource9_FreePrivateData( struct NineResource9 *This, - REFGUID refguid ) -{ - struct pheader *header; - char guid_str[64]; - - DBG("This=%p GUID=%s\n", This, GUID_sprintf(guid_str, refguid)); - - header = util_hash_table_get(This->pdata, refguid); - if (!header) - return D3DERR_NOTFOUND; - - ht_guid_delete(NULL, header, NULL); - util_hash_table_remove(This->pdata, refguid); - - return D3D_OK; -} - DWORD NINE_WINAPI NineResource9_SetPriority( struct NineResource9 *This, DWORD PriorityNew ) diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/resource9.h mesa-17.0.7/src/gallium/state_trackers/nine/resource9.h --- mesa-12.0.6/src/gallium/state_trackers/nine/resource9.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/resource9.h 2017-06-01 10:37:10.000000000 +0000 @@ -43,9 +43,6 @@ struct pipe_resource info; /* resource configuration */ - /* for [GS]etPrivateData/FreePrivateData */ - struct util_hash_table *pdata; - long long size; }; static inline struct NineResource9 * @@ -76,23 +73,6 @@ /*** Direct3D public methods ***/ -HRESULT NINE_WINAPI -NineResource9_SetPrivateData( struct NineResource9 *This, - REFGUID refguid, - const void *pData, - DWORD SizeOfData, - DWORD Flags ); - -HRESULT NINE_WINAPI -NineResource9_GetPrivateData( struct NineResource9 *This, - REFGUID refguid, - void *pData, - DWORD *pSizeOfData ); - -HRESULT NINE_WINAPI -NineResource9_FreePrivateData( struct NineResource9 *This, - REFGUID refguid ); - DWORD NINE_WINAPI NineResource9_SetPriority( struct NineResource9 *This, DWORD PriorityNew ); diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/stateblock9.c mesa-17.0.7/src/gallium/state_trackers/nine/stateblock9.c --- mesa-12.0.6/src/gallium/state_trackers/nine/stateblock9.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/stateblock9.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,6 +25,8 @@ #include "basetexture9.h" #include "nine_helpers.h" #include "vertexdeclaration9.h" +#include "vertexbuffer9.h" +#include "indexbuffer9.h" #define DBG_CHANNEL DBG_STATEBLOCK @@ -44,9 +46,12 @@ This->type = type; - This->state.vs_const_f = MALLOC(This->base.device->vs_const_size); + This->state.vs_const_f = MALLOC(VS_CONST_F_SIZE(This->base.device)); This->state.ps_const_f = MALLOC(This->base.device->ps_const_size); - if (!This->state.vs_const_f || !This->state.ps_const_f) + This->state.vs_const_i = MALLOC(VS_CONST_I_SIZE(This->base.device)); + This->state.vs_const_b = MALLOC(VS_CONST_B_SIZE(This->base.device)); + if (!This->state.vs_const_f || !This->state.ps_const_f || + !This->state.vs_const_i || !This->state.vs_const_b) return E_OUTOFMEMORY; return D3D_OK; @@ -59,10 +64,12 @@ struct nine_range *r; struct nine_range_pool *pool = &This->base.device->range_pool; - nine_state_clear(state, FALSE); + nine_state_clear(state, false); FREE(state->vs_const_f); FREE(state->ps_const_f); + FREE(state->vs_const_i); + FREE(state->vs_const_b); FREE(state->ff.light); @@ -76,16 +83,49 @@ for (r = This->state.changed.vs_const_f; r->next; r = r->next); nine_range_pool_put_chain(pool, This->state.changed.vs_const_f, r); } + if (This->state.changed.vs_const_i) { + for (r = This->state.changed.vs_const_i; r->next; r = r->next); + nine_range_pool_put_chain(pool, This->state.changed.vs_const_i, r); + } + if (This->state.changed.vs_const_b) { + for (r = This->state.changed.vs_const_b; r->next; r = r->next); + nine_range_pool_put_chain(pool, This->state.changed.vs_const_b, r); + } NineUnknown_dtor(&This->base); } +static void +NineStateBlock9_BindBuffer( struct NineDevice9 *device, + boolean applyToDevice, + struct NineBuffer9 **slot, + struct NineBuffer9 *buf ) +{ + if (applyToDevice) + NineBindBufferToDevice(device, slot, buf); + else + nine_bind(slot, buf); +} + +static void +NineStateBlock9_BindTexture( struct NineDevice9 *device, + boolean applyToDevice, + struct NineBaseTexture9 **slot, + struct NineBaseTexture9 *tex ) +{ + if (applyToDevice) + NineBindTextureToDevice(device, slot, tex); + else + nine_bind(slot, tex); +} + /* Copy state marked changed in @mask from @src to @dst. * If @apply is false, updating dst->changed can be omitted. * TODO: compare ? */ static void -nine_state_copy_common(struct nine_state *dst, +nine_state_copy_common(struct NineDevice9 *device, + struct nine_state *dst, struct nine_state *src, struct nine_state *mask, /* aliases either src or dst */ const boolean apply, @@ -93,6 +133,7 @@ { unsigned i, s; + DBG("apply:%d changed.group: %x\n", (int)apply, (int)mask->changed.group ); if (apply) dst->changed.group |= mask->changed.group; @@ -111,6 +152,11 @@ * Various possibilities for optimization here, like creating a per-SB * constant buffer, or memcmp'ing for changes. * Will do that later depending on what works best for specific apps. + * + * Note: Currently when we apply stateblocks, it's always on the device state. + * Should it affect recording stateblocks ? Since it's on device state, there + * is no need to copy which ranges are dirty. If it turns out we should affect + * recording stateblocks, the info should be copied. */ if (mask->changed.group & NINE_STATE_VS_CONST) { struct nine_range *r; @@ -118,25 +164,16 @@ memcpy(&dst->vs_const_f[r->bgn * 4], &src->vs_const_f[r->bgn * 4], (r->end - r->bgn) * 4 * sizeof(float)); - if (apply) - nine_ranges_insert(&dst->changed.vs_const_f, r->bgn, r->end, - pool); - } - if (mask->changed.vs_const_i) { - uint16_t m = mask->changed.vs_const_i; - for (i = ffs(m) - 1, m >>= i; m; ++i, m >>= 1) - if (m & 1) - memcpy(dst->vs_const_i[i], src->vs_const_i[i], 4 * sizeof(int)); - if (apply) - dst->changed.vs_const_i |= mask->changed.vs_const_i; } - if (mask->changed.vs_const_b) { - uint16_t m = mask->changed.vs_const_b; - for (i = ffs(m) - 1, m >>= i; m; ++i, m >>= 1) - if (m & 1) - dst->vs_const_b[i] = src->vs_const_b[i]; - if (apply) - dst->changed.vs_const_b |= mask->changed.vs_const_b; + for (r = mask->changed.vs_const_i; r; r = r->next) { + memcpy(&dst->vs_const_i[r->bgn * 4], + &src->vs_const_i[r->bgn * 4], + (r->end - r->bgn) * 4 * sizeof(int)); + } + for (r = mask->changed.vs_const_b; r; r = r->next) { + memcpy(&dst->vs_const_b[r->bgn], + &src->vs_const_b[r->bgn], + (r->end - r->bgn) * sizeof(int)); } } @@ -147,25 +184,18 @@ memcpy(&dst->ps_const_f[r->bgn * 4], &src->ps_const_f[r->bgn * 4], (r->end - r->bgn) * 4 * sizeof(float)); - if (apply) - nine_ranges_insert(&dst->changed.ps_const_f, r->bgn, r->end, - pool); } if (mask->changed.ps_const_i) { uint16_t m = mask->changed.ps_const_i; for (i = ffs(m) - 1, m >>= i; m; ++i, m >>= 1) if (m & 1) memcpy(dst->ps_const_i[i], src->ps_const_i[i], 4 * sizeof(int)); - if (apply) - dst->changed.ps_const_i |= mask->changed.ps_const_i; } if (mask->changed.ps_const_b) { uint16_t m = mask->changed.ps_const_b; for (i = ffs(m) - 1, m >>= i; m; ++i, m >>= 1) if (m & 1) dst->ps_const_b[i] = src->ps_const_b[i]; - if (apply) - dst->changed.ps_const_b |= mask->changed.ps_const_b; } } @@ -179,7 +209,7 @@ while (m) { const int r = ffs(m) - 1; m &= ~(1 << r); - dst->rs[i * 32 + r] = src->rs[i * 32 + r]; + DBG("State %d %s = %d\n", i * 32 + r, nine_d3drs_to_string(i * 32 + r), (int)src->rs_advertised[i * 32 + r]); dst->rs_advertised[i * 32 + r] = src->rs_advertised[i * 32 + r]; } } @@ -187,6 +217,7 @@ /* Clip planes. */ if (mask->changed.ucp) { + DBG("ucp: %x\n", mask->changed.ucp); for (i = 0; i < PIPE_MAX_CLIP_PLANES; ++i) if (mask->changed.ucp & (1 << i)) memcpy(dst->clip.ucp[i], @@ -199,13 +230,14 @@ if (mask->changed.group & NINE_STATE_SAMPLER) { for (s = 0; s < NINE_MAX_SAMPLERS; ++s) { if (mask->changed.sampler[s] == 0x3ffe) { - memcpy(&dst->samp[s], &src->samp[s], sizeof(dst->samp[s])); + memcpy(&dst->samp_advertised[s], &src->samp_advertised[s], sizeof(dst->samp_advertised[s])); } else { uint32_t m = mask->changed.sampler[s]; + DBG("samp %d: changed = %x\n", i, (int)m); while (m) { const int i = ffs(m) - 1; m &= ~(1 << i); - dst->samp[s][i] = src->samp[s][i]; + dst->samp_advertised[s][i] = src->samp_advertised[s][i]; } } if (apply) @@ -215,39 +247,48 @@ /* Index buffer. */ if (mask->changed.group & NINE_STATE_IDXBUF) - nine_bind(&dst->idxbuf, src->idxbuf); + NineStateBlock9_BindBuffer(device, + apply, + (struct NineBuffer9 **)&dst->idxbuf, + (struct NineBuffer9 *)src->idxbuf); /* Vertex streams. */ if (mask->changed.vtxbuf | mask->changed.stream_freq) { + DBG("vtxbuf/stream_freq: %x/%x\n", mask->changed.vtxbuf, mask->changed.stream_freq); uint32_t m = mask->changed.vtxbuf | mask->changed.stream_freq; for (i = 0; m; ++i, m >>= 1) { if (mask->changed.vtxbuf & (1 << i)) { - nine_bind(&dst->stream[i], src->stream[i]); + NineStateBlock9_BindBuffer(device, + apply, + (struct NineBuffer9 **)&dst->stream[i], + (struct NineBuffer9 *)src->stream[i]); if (src->stream[i]) { dst->vtxbuf[i].buffer_offset = src->vtxbuf[i].buffer_offset; - pipe_resource_reference(&dst->vtxbuf[i].buffer, src->vtxbuf[i].buffer); dst->vtxbuf[i].stride = src->vtxbuf[i].stride; } } if (mask->changed.stream_freq & (1 << i)) dst->stream_freq[i] = src->stream_freq[i]; } - dst->stream_instancedata_mask &= ~mask->changed.stream_freq; - dst->stream_instancedata_mask |= - src->stream_instancedata_mask & mask->changed.stream_freq; if (apply) { dst->changed.vtxbuf |= mask->changed.vtxbuf; dst->changed.stream_freq |= mask->changed.stream_freq; } } + /* Textures */ + if (mask->changed.texture) { + uint32_t m = mask->changed.texture; + for (s = 0; m; ++s, m >>= 1) + if (m & 1) + NineStateBlock9_BindTexture(device, apply, &dst->texture[s], src->texture[s]); + } + if (!(mask->changed.group & NINE_STATE_FF)) return; WARN_ONCE("Fixed function state not handled properly by StateBlocks.\n"); /* Fixed function state. */ - if (apply) - dst->ff.changed.group |= src->ff.changed.group; if (mask->changed.group & NINE_STATE_FF_MATERIAL) dst->ff.material = src->ff.material; @@ -281,8 +322,8 @@ * "dst->ff.light[i] = src->ff.light[i];" later, * which is what we want in that case. */ if (mask != dst) { - for (i = src->ff.num_lights; i < num_lights; ++i) - src->ff.light[i].Type = (D3DLIGHTTYPE)NINED3DLIGHT_INVALID; + for (i = dst->ff.num_lights; i < num_lights; ++i) + dst->ff.light[i].Type = (D3DLIGHTTYPE)NINED3DLIGHT_INVALID; } dst->ff.num_lights = num_lights; } @@ -315,9 +356,9 @@ for (s = i * 32; s < (i * 32 + 32); ++s) { if (!(mask->ff.changed.transform[i] & (1 << (s % 32)))) continue; - *nine_state_access_transform(dst, s, TRUE) = + *nine_state_access_transform(&dst->ff, s, TRUE) = *nine_state_access_transform( /* const because !alloc */ - (struct nine_state *)src, s, FALSE); + (struct nine_ff_state *)&src->ff, s, FALSE); } if (apply) dst->ff.changed.transform[i] |= mask->ff.changed.transform[i]; @@ -326,7 +367,8 @@ } static void -nine_state_copy_common_all(struct nine_state *dst, +nine_state_copy_common_all(struct NineDevice9 *device, + struct nine_state *dst, const struct nine_state *src, struct nine_state *help, const boolean apply, @@ -351,18 +393,11 @@ * Will do that later depending on what works best for specific apps. */ if (1) { - struct nine_range *r = help->changed.vs_const_f; memcpy(&dst->vs_const_f[0], - &src->vs_const_f[0], (r->end - r->bgn) * 4 * sizeof(float)); - if (apply) - nine_ranges_insert(&dst->changed.vs_const_f, r->bgn, r->end, pool); + &src->vs_const_f[0], VS_CONST_F_SIZE(device)); - memcpy(dst->vs_const_i, src->vs_const_i, sizeof(dst->vs_const_i)); - memcpy(dst->vs_const_b, src->vs_const_b, sizeof(dst->vs_const_b)); - if (apply) { - dst->changed.vs_const_i |= src->changed.vs_const_i; - dst->changed.vs_const_b |= src->changed.vs_const_b; - } + memcpy(dst->vs_const_i, src->vs_const_i, VS_CONST_I_SIZE(device)); + memcpy(dst->vs_const_b, src->vs_const_b, VS_CONST_B_SIZE(device)); } /* Pixel constants. */ @@ -370,19 +405,12 @@ struct nine_range *r = help->changed.ps_const_f; memcpy(&dst->ps_const_f[0], &src->ps_const_f[0], (r->end - r->bgn) * 4 * sizeof(float)); - if (apply) - nine_ranges_insert(&dst->changed.ps_const_f, r->bgn, r->end, pool); memcpy(dst->ps_const_i, src->ps_const_i, sizeof(dst->ps_const_i)); memcpy(dst->ps_const_b, src->ps_const_b, sizeof(dst->ps_const_b)); - if (apply) { - dst->changed.ps_const_i |= src->changed.ps_const_i; - dst->changed.ps_const_b |= src->changed.ps_const_b; - } } /* Render states. */ - memcpy(dst->rs, src->rs, sizeof(dst->rs)); memcpy(dst->rs_advertised, src->rs_advertised, sizeof(dst->rs_advertised)); if (apply) memcpy(dst->changed.rs, src->changed.rs, sizeof(dst->changed.rs)); @@ -394,41 +422,48 @@ dst->changed.ucp = src->changed.ucp; /* Sampler state. */ - memcpy(dst->samp, src->samp, sizeof(dst->samp)); + memcpy(dst->samp_advertised, src->samp_advertised, sizeof(dst->samp_advertised)); if (apply) memcpy(dst->changed.sampler, src->changed.sampler, sizeof(dst->changed.sampler)); /* Index buffer. */ - nine_bind(&dst->idxbuf, src->idxbuf); + NineStateBlock9_BindBuffer(device, + apply, + (struct NineBuffer9 **)&dst->idxbuf, + (struct NineBuffer9 *)src->idxbuf); /* Vertex streams. */ if (1) { for (i = 0; i < ARRAY_SIZE(dst->stream); ++i) { - nine_bind(&dst->stream[i], src->stream[i]); + NineStateBlock9_BindBuffer(device, + apply, + (struct NineBuffer9 **)&dst->stream[i], + (struct NineBuffer9 *)src->stream[i]); if (src->stream[i]) { dst->vtxbuf[i].buffer_offset = src->vtxbuf[i].buffer_offset; - pipe_resource_reference(&dst->vtxbuf[i].buffer, src->vtxbuf[i].buffer); dst->vtxbuf[i].stride = src->vtxbuf[i].stride; } dst->stream_freq[i] = src->stream_freq[i]; } - dst->stream_instancedata_mask = src->stream_instancedata_mask; if (apply) { dst->changed.vtxbuf = (1ULL << MaxStreams) - 1; dst->changed.stream_freq = (1ULL << MaxStreams) - 1; } } + /* Textures */ + if (1) { + for (i = 0; i < device->caps.MaxSimultaneousTextures; i++) + NineStateBlock9_BindTexture(device, apply, &dst->texture[i], src->texture[i]); + } + /* keep this check in case we want to disable FF */ if (!(help->changed.group & NINE_STATE_FF)) return; WARN_ONCE("Fixed function state not handled properly by StateBlocks.\n"); /* Fixed function state. */ - if (apply) - dst->ff.changed.group = src->ff.changed.group; - dst->ff.material = src->ff.material; memcpy(dst->ff.tex_stage, src->ff.tex_stage, sizeof(dst->ff.tex_stage)); @@ -473,29 +508,21 @@ HRESULT NINE_WINAPI NineStateBlock9_Capture( struct NineStateBlock9 *This ) { + struct NineDevice9 *device = This->base.device; struct nine_state *dst = &This->state; - struct nine_state *src = &This->base.device->state; - const int MaxStreams = This->base.device->caps.MaxStreams; - unsigned s; + struct nine_state *src = &device->state; + const int MaxStreams = device->caps.MaxStreams; DBG("This=%p\n", This); if (This->type == NINESBT_ALL) - nine_state_copy_common_all(dst, src, dst, FALSE, NULL, MaxStreams); + nine_state_copy_common_all(device, dst, src, dst, FALSE, NULL, MaxStreams); else - nine_state_copy_common(dst, src, dst, FALSE, NULL); + nine_state_copy_common(device, dst, src, dst, FALSE, NULL); if (dst->changed.group & NINE_STATE_VDECL) nine_bind(&dst->vdecl, src->vdecl); - /* Textures */ - if (dst->changed.texture) { - uint32_t m = dst->changed.texture; - for (s = 0; m; ++s, m >>= 1) - if (m & 1) - nine_bind(&dst->texture[s], src->texture[s]); - } - return D3D_OK; } @@ -503,47 +530,23 @@ HRESULT NINE_WINAPI NineStateBlock9_Apply( struct NineStateBlock9 *This ) { - struct nine_state *dst = &This->base.device->state; + struct NineDevice9 *device = This->base.device; + struct nine_state *dst = &device->state; struct nine_state *src = &This->state; - struct nine_range_pool *pool = &This->base.device->range_pool; - const int MaxStreams = This->base.device->caps.MaxStreams; - unsigned s; + struct nine_range_pool *pool = &device->range_pool; + const int MaxStreams = device->caps.MaxStreams; DBG("This=%p\n", This); if (This->type == NINESBT_ALL) - nine_state_copy_common_all(dst, src, src, TRUE, pool, MaxStreams); + nine_state_copy_common_all(device, dst, src, src, TRUE, pool, MaxStreams); else - nine_state_copy_common(dst, src, src, TRUE, pool); - - if ((src->changed.group & NINE_STATE_VDECL) && src->vdecl) - NineDevice9_SetVertexDeclaration(This->base.device, (IDirect3DVertexDeclaration9 *)src->vdecl); + nine_state_copy_common(device, dst, src, src, TRUE, pool); - /* Recomputing it is needed if we changed vs but not vdecl */ - dst->programmable_vs = dst->vs && !(dst->vdecl && dst->vdecl->position_t); + nine_context_apply_stateblock(device, src); - /* Textures */ - if (src->changed.texture) { - uint32_t m = src->changed.texture; - dst->changed.texture |= m; - - dst->samplers_shadow &= ~m; - - for (s = 0; m; ++s, m >>= 1) { - struct NineBaseTexture9 *tex = src->texture[s]; - if (!(m & 1)) - continue; - if (tex) { - tex->bind_count++; - if ((tex->managed.dirty | tex->dirty_mip) && LIST_IS_EMPTY(&tex->list)) - list_add(&tex->list, &This->base.device->update_textures); - dst->samplers_shadow |= tex->shadow << s; - } - if (src->texture[s]) - src->texture[s]->bind_count--; - nine_bind(&dst->texture[s], src->texture[s]); - } - } + if ((src->changed.group & NINE_STATE_VDECL) && src->vdecl) + nine_bind(&dst->vdecl, src->vdecl); return D3D_OK; } diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/surface9.c mesa-17.0.7/src/gallium/state_trackers/nine/surface9.c --- mesa-12.0.6/src/gallium/state_trackers/nine/surface9.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/surface9.c 2017-06-01 10:37:10.000000000 +0000 @@ -20,6 +20,7 @@ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. */ +#include "iunknown.h" #include "surface9.h" #include "device9.h" @@ -31,6 +32,7 @@ #include "nine_helpers.h" #include "nine_pipe.h" #include "nine_dump.h" +#include "nine_state.h" #include "pipe/p_context.h" #include "pipe/p_screen.h" @@ -42,7 +44,8 @@ #define DBG_CHANNEL DBG_SURFACE -#define is_ATI1_ATI2(format) (format == PIPE_FORMAT_RGTC1_UNORM || format == PIPE_FORMAT_RGTC2_UNORM) +static void +NineSurface9_CreatePipeSurfaces( struct NineSurface9 *This ); HRESULT NineSurface9_ctor( struct NineSurface9 *This, @@ -56,31 +59,43 @@ D3DSURFACE_DESC *pDesc ) { HRESULT hr; - union pipe_color_union rgba = {0}; - struct pipe_surface *surf; - struct pipe_context *pipe = pParams->device->pipe; + bool allocate = !pContainer && pDesc->Format != D3DFMT_NULL; + D3DMULTISAMPLE_TYPE multisample_type; DBG("This=%p pDevice=%p pResource=%p Level=%u Layer=%u pDesc=%p\n", This, pParams->device, pResource, Level, Layer, pDesc); /* Mark this as a special surface held by another internal resource. */ pParams->container = pContainer; + /* Make sure there's a Desc */ + assert(pDesc); - user_assert(!(pDesc->Usage & D3DUSAGE_DYNAMIC) || - (pDesc->Pool != D3DPOOL_MANAGED), D3DERR_INVALIDCALL); - - assert(pResource || (user_buffer && pDesc->Pool != D3DPOOL_DEFAULT) || - (!pContainer && pDesc->Pool != D3DPOOL_DEFAULT) || + assert(allocate || pResource || user_buffer || pDesc->Format == D3DFMT_NULL); - + assert(!allocate || (!pResource && !user_buffer)); assert(!pResource || !user_buffer); assert(!user_buffer || pDesc->Pool != D3DPOOL_DEFAULT); - /* The only way we can have !pContainer is being created - * from create_zs_or_rt_surface with params 0 0 0 */ - assert(pContainer || (Level == 0 && Layer == 0 && TextureType == 0)); + assert(!pResource || pDesc->Pool == D3DPOOL_DEFAULT); + /* Allocation only from create_zs_or_rt_surface with params 0 0 0 */ + assert(!allocate || (Level == 0 && Layer == 0 && TextureType == 0)); This->data = (uint8_t *)user_buffer; + multisample_type = pDesc->MultiSampleType; + + /* Map MultiSampleQuality to MultiSampleType */ + hr = d3dmultisample_type_check(pParams->device->screen, + pDesc->Format, + &multisample_type, + pDesc->MultiSampleQuality, + NULL); + if (FAILED(hr)) { + return hr; + } + + /* TODO: this is (except width and height) duplicate from + * container info (in the pContainer case). Some refactoring is + * needed to avoid duplication */ This->base.info.screen = pParams->device->screen; This->base.info.target = PIPE_TEXTURE_2D; This->base.info.width0 = pDesc->Width; @@ -88,9 +103,18 @@ This->base.info.depth0 = 1; This->base.info.last_level = 0; This->base.info.array_size = 1; - This->base.info.nr_samples = pDesc->MultiSampleType; + This->base.info.nr_samples = multisample_type; This->base.info.usage = PIPE_USAGE_DEFAULT; - This->base.info.bind = PIPE_BIND_SAMPLER_VIEW; + This->base.info.bind = PIPE_BIND_SAMPLER_VIEW; /* StretchRect */ + + if (pDesc->Usage & D3DUSAGE_RENDERTARGET) { + This->base.info.bind |= PIPE_BIND_RENDER_TARGET; + } else if (pDesc->Usage & D3DUSAGE_DEPTHSTENCIL) { + This->base.info.bind = d3d9_get_pipe_depth_format_bindings(pDesc->Format); + if (TextureType) + This->base.info.bind |= PIPE_BIND_SAMPLER_VIEW; + } + This->base.info.flags = 0; This->base.info.format = d3d9_to_pipe_format_checked(This->base.info.screen, pDesc->Format, @@ -100,10 +124,16 @@ FALSE, pDesc->Pool == D3DPOOL_SCRATCH); - if (pDesc->Usage & D3DUSAGE_RENDERTARGET) - This->base.info.bind |= PIPE_BIND_RENDER_TARGET; - if (pDesc->Usage & D3DUSAGE_DEPTHSTENCIL) - This->base.info.bind |= PIPE_BIND_DEPTH_STENCIL; + if (This->base.info.format == PIPE_FORMAT_NONE && pDesc->Format != D3DFMT_NULL) + return D3DERR_INVALIDCALL; + + if (allocate && compressed_format(pDesc->Format)) { + const unsigned w = util_format_get_blockwidth(This->base.info.format); + const unsigned h = util_format_get_blockheight(This->base.info.format); + + /* Note: In the !allocate case, the test could fail (lower levels of a texture) */ + user_assert(!(pDesc->Width % w) && !(pDesc->Height % h), D3DERR_INVALIDCALL); + } /* Get true format */ This->format_conversion = d3d9_to_pipe_format_checked(This->base.info.screen, @@ -114,7 +144,7 @@ FALSE, TRUE); if (This->base.info.format != This->format_conversion) { - This->data_conversion = align_malloc( + This->data_conversion = align_calloc( nine_format_get_level_alloc_size(This->format_conversion, pDesc->Width, pDesc->Height, @@ -125,10 +155,10 @@ pDesc->Width); } - /* Ram buffer with no parent. Has to allocate the resource itself */ - if (!pResource && !pContainer) { + if ((allocate && pDesc->Pool != D3DPOOL_DEFAULT) || pDesc->Format == D3DFMT_NULL) { + /* Ram buffer with no parent. Has to allocate the resource itself */ assert(!user_buffer); - This->data = align_malloc( + This->data = align_calloc( nine_format_get_level_alloc_size(This->base.info.format, pDesc->Width, pDesc->Height, @@ -137,17 +167,13 @@ return E_OUTOFMEMORY; } - assert(pDesc->Pool != D3DPOOL_SYSTEMMEM || !pResource); - - if (pResource && (pDesc->Usage & D3DUSAGE_DYNAMIC)) - pResource->flags |= NINE_RESOURCE_FLAG_LOCKABLE; + hr = NineResource9_ctor(&This->base, pParams, pResource, + allocate && (pDesc->Pool == D3DPOOL_DEFAULT), + D3DRTYPE_SURFACE, pDesc->Pool, pDesc->Usage); - hr = NineResource9_ctor(&This->base, pParams, pResource, FALSE, D3DRTYPE_SURFACE, - pDesc->Pool, pDesc->Usage); if (FAILED(hr)) return hr; - This->pipe = This->base.base.device->pipe; This->transfer = NULL; This->texture = TextureType; @@ -158,14 +184,15 @@ This->stride = nine_format_get_stride(This->base.info.format, pDesc->Width); - if (pResource && NineSurface9_IsOffscreenPlain(This)) - pResource->flags |= NINE_RESOURCE_FLAG_LOCKABLE; + if (This->base.resource && (pDesc->Usage & D3DUSAGE_DYNAMIC)) + This->base.resource->flags |= NINE_RESOURCE_FLAG_LOCKABLE; + + if (This->base.resource && (pDesc->Usage & (D3DUSAGE_RENDERTARGET | D3DUSAGE_DEPTHSTENCIL))) + NineSurface9_CreatePipeSurfaces(This); /* TODO: investigate what else exactly needs to be cleared */ - if (This->base.resource && (pDesc->Usage & D3DUSAGE_RENDERTARGET)) { - surf = NineSurface9_GetSurface(This, 0); - pipe->clear_render_target(pipe, surf, &rgba, 0, 0, pDesc->Width, pDesc->Height); - } + if (This->base.resource && (pDesc->Usage & D3DUSAGE_RENDERTARGET)) + nine_context_clear_render_target(pParams->device, This, 0, 0, 0, pDesc->Width, pDesc->Height); NineSurface9_Dump(This); @@ -177,8 +204,17 @@ { DBG("This=%p\n", This); - if (This->transfer) - NineSurface9_UnlockRect(This); + if (This->transfer) { + struct pipe_context *pipe = nine_context_get_pipe_multithread(This->base.base.device); + pipe->transfer_unmap(pipe, This->transfer); + This->transfer = NULL; + } + + /* Note: Following condition cannot happen currently, since we + * refcount the surface in the functions increasing + * pending_uploads_counter. */ + if (p_atomic_read(&This->pending_uploads_counter)) + nine_csmt_process(This->base.base.device); pipe_surface_reference(&This->surface[0], NULL); pipe_surface_reference(&This->surface[1], NULL); @@ -191,11 +227,11 @@ NineResource9_dtor(&This->base); } -struct pipe_surface * -NineSurface9_CreatePipeSurface( struct NineSurface9 *This, const int sRGB ) +static void +NineSurface9_CreatePipeSurfaces( struct NineSurface9 *This ) { - struct pipe_context *pipe = This->pipe; - struct pipe_screen *screen = pipe->screen; + struct pipe_context *pipe; + struct pipe_screen *screen = NineDevice9_GetScreen(This->base.base.device); struct pipe_resource *resource = This->base.resource; struct pipe_surface templ; enum pipe_format srgb_format; @@ -204,19 +240,33 @@ assert(resource); srgb_format = util_format_srgb(resource->format); - if (sRGB && srgb_format != PIPE_FORMAT_NONE && - screen->is_format_supported(screen, srgb_format, - resource->target, 0, resource->bind)) - templ.format = srgb_format; - else - templ.format = resource->format; + if (srgb_format == PIPE_FORMAT_NONE || + !screen->is_format_supported(screen, srgb_format, + resource->target, 0, resource->bind)) + srgb_format = resource->format; + + memset(&templ, 0, sizeof(templ)); + templ.format = resource->format; templ.u.tex.level = This->level; templ.u.tex.first_layer = This->layer; templ.u.tex.last_layer = This->layer; - This->surface[sRGB] = pipe->create_surface(pipe, resource, &templ); - assert(This->surface[sRGB]); - return This->surface[sRGB]; + pipe = nine_context_get_pipe_acquire(This->base.base.device); + + This->surface[0] = pipe->create_surface(pipe, resource, &templ); + + memset(&templ, 0, sizeof(templ)); + templ.format = srgb_format; + templ.u.tex.level = This->level; + templ.u.tex.first_layer = This->layer; + templ.u.tex.last_layer = This->layer; + + This->surface[1] = pipe->create_surface(pipe, resource, &templ); + + nine_context_get_pipe_release(This->base.base.device); + + assert(This->surface[0]); /* TODO: Handle failure */ + assert(This->surface[1]); } #ifdef DEBUG @@ -255,8 +305,23 @@ void **ppContainer ) { HRESULT hr; - if (!NineUnknown(This)->container) - return E_NOINTERFACE; + char guid_str[64]; + + DBG("This=%p riid=%p id=%s ppContainer=%p\n", + This, riid, riid ? GUID_sprintf(guid_str, riid) : "", ppContainer); + + (void)guid_str; + + if (!ppContainer) return E_POINTER; + + /* Return device for OffscreenPlainSurface, DepthStencilSurface and RenderTarget */ + if (!NineUnknown(This)->container) { + *ppContainer = NineUnknown(This)->device; + NineUnknown_AddRef(NineUnknown(*ppContainer)); + + return D3D_OK; + } + hr = NineUnknown_QueryInterface(NineUnknown(This)->container, riid, ppContainer); if (FAILED(hr)) DBG("QueryInterface FAILED!\n"); @@ -344,6 +409,7 @@ DWORD Flags ) { struct pipe_resource *resource = This->base.resource; + struct pipe_context *pipe; struct pipe_box box; unsigned usage; @@ -409,6 +475,9 @@ user_warn(This->desc.Format == D3DFMT_NULL); + if (p_atomic_read(&This->pending_uploads_counter)) + nine_csmt_process(This->base.base.device); + if (This->data_conversion) { /* For now we only have uncompressed formats here */ pLockedRect->Pitch = This->stride_conversion; @@ -430,12 +499,22 @@ box.y); } } else { + bool no_refs = !p_atomic_read(&This->base.base.bind) && + !(This->base.base.container && p_atomic_read(&This->base.base.container->bind)); DBG("mapping pipe_resource %p (level=%u usage=%x)\n", resource, This->level, usage); - pLockedRect->pBits = This->pipe->transfer_map(This->pipe, resource, - This->level, usage, &box, - &This->transfer); + /* if the object is not bound internally, there can't be any pending + * operation with the surface in the queue */ + if (no_refs) + pipe = nine_context_get_pipe_acquire(This->base.base.device); + else + pipe = NineDevice9_GetPipe(This->base.base.device); + pLockedRect->pBits = pipe->transfer_map(pipe, resource, + This->level, usage, &box, + &This->transfer); + if (no_refs) + nine_context_get_pipe_release(This->base.base.device); if (!This->transfer) { DBG("transfer_map failed\n"); if (Flags & D3DLOCK_DONOTWAIT) @@ -457,10 +536,13 @@ HRESULT NINE_WINAPI NineSurface9_UnlockRect( struct NineSurface9 *This ) { + struct pipe_context *pipe; DBG("This=%p lock_count=%u\n", This, This->lock_count); user_assert(This->lock_count, D3DERR_INVALIDCALL); if (This->transfer) { - This->pipe->transfer_unmap(This->pipe, This->transfer); + pipe = nine_context_get_pipe_acquire(This->base.base.device); + pipe->transfer_unmap(pipe, This->transfer); + nine_context_get_pipe_release(This->base.base.device); This->transfer = NULL; } --This->lock_count; @@ -472,13 +554,14 @@ u_box_origin_2d(This->desc.Width, This->desc.Height, &box); + pipe = NineDevice9_GetPipe(This->base.base.device); if (!dst) { - dst = This->pipe->transfer_map(This->pipe, - This->base.resource, - This->level, - PIPE_TRANSFER_WRITE | - PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE, - &box, &transfer); + dst = pipe->transfer_map(pipe, + This->base.resource, + This->level, + PIPE_TRANSFER_WRITE | + PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE, + &box, &transfer); if (!dst) return D3D_OK; } @@ -493,7 +576,7 @@ This->desc.Width, This->desc.Height); if (!This->data) - pipe_transfer_unmap(This->pipe, transfer); + pipe_transfer_unmap(pipe, transfer); } return D3D_OK; } @@ -517,9 +600,9 @@ (void *)NineUnknown_AddRef, (void *)NineUnknown_Release, (void *)NineUnknown_GetDevice, /* actually part of Resource9 iface */ - (void *)NineResource9_SetPrivateData, - (void *)NineResource9_GetPrivateData, - (void *)NineResource9_FreePrivateData, + (void *)NineUnknown_SetPrivateData, + (void *)NineUnknown_GetPrivateData, + (void *)NineUnknown_FreePrivateData, (void *)NineResource9_SetPriority, (void *)NineResource9_GetPriority, (void *)NineResource9_PreLoad, @@ -540,11 +623,8 @@ const POINT *pDestPoint, const RECT *pSourceRect ) { - struct pipe_context *pipe = This->pipe; - struct pipe_transfer *transfer = NULL; struct pipe_resource *r_dst = This->base.resource; - struct pipe_box dst_box; - uint8_t *map = NULL; + struct pipe_box dst_box, src_box; int src_x, src_y, dst_x, dst_y, copy_width, copy_height; assert(This->base.pool == D3DPOOL_DEFAULT && @@ -572,26 +652,19 @@ u_box_2d_zslice(dst_x, dst_y, This->layer, copy_width, copy_height, &dst_box); + u_box_2d_zslice(src_x, src_y, 0, + copy_width, copy_height, &src_box); - map = pipe->transfer_map(pipe, - r_dst, - This->level, - PIPE_TRANSFER_WRITE | PIPE_TRANSFER_DISCARD_RANGE, - &dst_box, &transfer); - if (!map) - return; - - /* Note: if formats are the sames, it will revert - * to normal memcpy */ - (void) util_format_translate(r_dst->format, - map, transfer->stride, - 0, 0, - From->base.info.format, - From->data, From->stride, - src_x, src_y, - copy_width, copy_height); - - pipe_transfer_unmap(pipe, transfer); + nine_context_box_upload(This->base.base.device, + &From->pending_uploads_counter, + (struct NineUnknown *)This, + r_dst, + This->level, + &dst_box, + From->base.info.format, + From->data, From->stride, + 0, /* depth = 1 */ + &src_box); if (This->data_conversion) (void) util_format_translate(This->format_conversion, @@ -610,7 +683,7 @@ NineSurface9_CopyDefaultToMem( struct NineSurface9 *This, struct NineSurface9 *From ) { - struct pipe_context *pipe = This->pipe; + struct pipe_context *pipe; struct pipe_resource *r_src = From->base.resource; struct pipe_transfer *transfer; struct pipe_box src_box; @@ -626,6 +699,10 @@ u_box_origin_2d(This->desc.Width, This->desc.Height, &src_box); src_box.z = From->layer; + if (p_atomic_read(&This->pending_uploads_counter)) + nine_csmt_process(This->base.base.device); + + pipe = NineDevice9_GetPipe(This->base.base.device); p_src = pipe->transfer_map(pipe, r_src, From->level, PIPE_TRANSFER_READ, &src_box, &transfer); @@ -650,9 +727,7 @@ NineSurface9_UploadSelf( struct NineSurface9 *This, const struct pipe_box *damaged ) { - struct pipe_context *pipe = This->pipe; struct pipe_resource *res = This->base.resource; - uint8_t *ptr; struct pipe_box box; DBG("This=%p damaged=%p\n", This, damaged); @@ -672,14 +747,47 @@ box.depth = 1; } - ptr = NineSurface9_GetSystemMemPointer(This, box.x, box.y); - - pipe->transfer_inline_write(pipe, res, This->level, 0, - &box, ptr, This->stride, 0); + nine_context_box_upload(This->base.base.device, + &This->pending_uploads_counter, + (struct NineUnknown *)This, + res, + This->level, + &box, + res->format, + This->data, This->stride, + 0, /* depth = 1 */ + &box); return D3D_OK; } +/* Currently nine_context uses the NineSurface9 + * fields when it is render target. Any modification requires + * pending commands with the surface to be executed. If the bind + * count is 0, there is no pending commands. */ +#define PROCESS_IF_BOUND(surf) \ + if (surf->base.base.bind) \ + nine_csmt_process(surf->base.base.device); + +void +NineSurface9_SetResource( struct NineSurface9 *This, + struct pipe_resource *resource, unsigned level ) +{ + /* No need to call PROCESS_IF_BOUND, because SetResource is used only + * for MANAGED textures, and they are not render targets. */ + assert(This->base.pool == D3DPOOL_MANAGED); + This->level = level; + pipe_resource_reference(&This->base.resource, resource); +} + +void +NineSurface9_SetMultiSampleType( struct NineSurface9 *This, + D3DMULTISAMPLE_TYPE mst ) +{ + PROCESS_IF_BOUND(This); + This->desc.MultiSampleType = mst; +} + void NineSurface9_SetResourceResize( struct NineSurface9 *This, struct pipe_resource *resource ) @@ -689,17 +797,20 @@ assert(This->desc.Pool == D3DPOOL_DEFAULT); assert(!This->texture); + PROCESS_IF_BOUND(This); pipe_resource_reference(&This->base.resource, resource); This->desc.Width = This->base.info.width0 = resource->width0; This->desc.Height = This->base.info.height0 = resource->height0; - This->desc.MultiSampleType = This->base.info.nr_samples = resource->nr_samples; + This->base.info.nr_samples = resource->nr_samples; This->stride = nine_format_get_stride(This->base.info.format, This->desc.Width); pipe_surface_reference(&This->surface[0], NULL); pipe_surface_reference(&This->surface[1], NULL); + if (resource) + NineSurface9_CreatePipeSurfaces(This); } diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/surface9.h mesa-17.0.7/src/gallium/state_trackers/nine/surface9.h --- mesa-12.0.6/src/gallium/state_trackers/nine/surface9.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/surface9.h 2017-06-01 10:37:10.000000000 +0000 @@ -35,7 +35,6 @@ struct NineResource9 base; /* G3D state */ - struct pipe_context *pipe; struct pipe_transfer *transfer; struct pipe_surface *surface[2]; /* created on-demand (linear, sRGB) */ int lock_count; @@ -52,6 +51,8 @@ enum pipe_format format_conversion; unsigned stride; /* for system memory backing */ unsigned stride_conversion; + + unsigned pending_uploads_counter; /* pending uploads */ }; static inline struct NineSurface9 * NineSurface9( void *data ) @@ -89,15 +90,11 @@ void NineSurface9_MarkContainerDirty( struct NineSurface9 *This ); -struct pipe_surface * -NineSurface9_CreatePipeSurface( struct NineSurface9 *This, const int sRGB ); - static inline struct pipe_surface * NineSurface9_GetSurface( struct NineSurface9 *This, int sRGB ) { - if (This->surface[sRGB]) - return This->surface[sRGB]; - return NineSurface9_CreatePipeSurface(This, sRGB); + assert(This->surface[sRGB]); + return This->surface[sRGB]; } static inline struct pipe_resource * @@ -106,15 +103,13 @@ return This->base.resource; } -static inline void +void NineSurface9_SetResource( struct NineSurface9 *This, - struct pipe_resource *resource, unsigned level ) -{ - This->level = level; - pipe_resource_reference(&This->base.resource, resource); - pipe_surface_reference(&This->surface[0], NULL); - pipe_surface_reference(&This->surface[1], NULL); -} + struct pipe_resource *resource, unsigned level ); + +void +NineSurface9_SetMultiSampleType( struct NineSurface9 *This, + D3DMULTISAMPLE_TYPE mst ); void NineSurface9_SetResourceResize( struct NineSurface9 *This, diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/swapchain9.c mesa-17.0.7/src/gallium/state_trackers/nine/swapchain9.c --- mesa-12.0.6/src/gallium/state_trackers/nine/swapchain9.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/swapchain9.c 2017-06-01 10:37:10.000000000 +0000 @@ -59,14 +59,21 @@ return hr; This->screen = NineDevice9_GetScreen(This->base.device); - This->pipe = NineDevice9_GetPipe(This->base.device); - This->cso = NineDevice9_GetCSO(This->base.device); This->implicit = implicit; This->actx = pCTX; This->present = pPresent; This->mode = NULL; ID3DPresent_AddRef(pPresent); + if (!This->actx->thread_submit && + This->base.device->minor_version_num > 2) { + D3DPRESENT_PARAMETERS2 params2; + + memset(¶ms2, 0, sizeof(D3DPRESENT_PARAMETERS2)); + params2.AllowDISCARDDelayedRelease = This->actx->discard_delayed_release; + params2.TearFreeDISCARD = This->actx->tearfree_discard; + ID3DPresent_SetPresentParameters2(pPresent, ¶ms2); + } if (!pPresentationParameters->hDeviceWindow) pPresentationParameters->hDeviceWindow = hFocusWindow; @@ -83,36 +90,49 @@ int for_frontbuffer_reading) { D3DWindowBuffer *ret; + struct pipe_context *pipe = nine_context_get_pipe_acquire(This->base.device); struct winsys_handle whandle; int stride, dmaBufFd; + HRESULT hr; memset(&whandle, 0, sizeof(whandle)); whandle.type = DRM_API_HANDLE_TYPE_FD; - This->screen->resource_get_handle(This->screen, resource, &whandle, + This->screen->resource_get_handle(This->screen, pipe, resource, + &whandle, for_frontbuffer_reading ? PIPE_HANDLE_USAGE_WRITE : PIPE_HANDLE_USAGE_EXPLICIT_FLUSH | PIPE_HANDLE_USAGE_READ); + nine_context_get_pipe_release(This->base.device); stride = whandle.stride; dmaBufFd = whandle.handle; - ID3DPresent_NewD3DWindowBufferFromDmaBuf(This->present, - dmaBufFd, - resource->width0, - resource->height0, - stride, - depth, - 32, - &ret); + hr = ID3DPresent_NewD3DWindowBufferFromDmaBuf(This->present, + dmaBufFd, + resource->width0, + resource->height0, + stride, + depth, + 32, + &ret); + assert (SUCCEEDED(hr)); + + if (FAILED(hr)) { + ERR("Failed to create new D3DWindowBufferFromDmaBuf\n"); + return NULL; + } return ret; } +static int +NineSwapChain9_GetBackBufferCountForParams( struct NineSwapChain9 *This, + D3DPRESENT_PARAMETERS *pParams ); + HRESULT NineSwapChain9_Resize( struct NineSwapChain9 *This, D3DPRESENT_PARAMETERS *pParams, D3DDISPLAYMODEEX *mode ) { struct NineDevice9 *pDevice = This->base.device; - struct NineSurface9 **bufs; D3DSURFACE_DESC desc; HRESULT hr; struct pipe_resource *resource, tmplt; @@ -120,13 +140,17 @@ BOOL has_present_buffers = FALSE; int depth; unsigned i, oldBufferCount, newBufferCount; + D3DMULTISAMPLE_TYPE multisample_type; DBG("This=%p pParams=%p\n", This, pParams); user_assert(pParams != NULL, E_POINTER); user_assert(pParams->SwapEffect, D3DERR_INVALIDCALL); user_assert((pParams->SwapEffect != D3DSWAPEFFECT_COPY) || (pParams->BackBufferCount <= 1), D3DERR_INVALIDCALL); - user_assert(pDevice->ex || pParams->BackBufferCount <= 3, D3DERR_INVALIDCALL); + user_assert(pDevice->ex || pParams->BackBufferCount <= + D3DPRESENT_BACK_BUFFERS_MAX, D3DERR_INVALIDCALL); + user_assert(!pDevice->ex || pParams->BackBufferCount <= + D3DPRESENT_BACK_BUFFERS_MAX_EX, D3DERR_INVALIDCALL); user_assert(pDevice->ex || (pParams->SwapEffect == D3DSWAPEFFECT_FLIP) || (pParams->SwapEffect == D3DSWAPEFFECT_COPY) || @@ -158,10 +182,6 @@ pParams->FullScreen_RefreshRateInHz, pParams->PresentationInterval); - if (pParams->BackBufferCount > 3) { - pParams->BackBufferCount = 3; - } - if (pParams->BackBufferCount == 0) { pParams->BackBufferCount = 1; } @@ -196,24 +216,29 @@ if (hr != D3D_OK) return hr; - /* When we have flip behaviour, d3d9 expects we get back the screen buffer when we flip. - * Here we don't get back the initial content of the screen. To emulate the behaviour - * we allocate an additional buffer */ - oldBufferCount = This->params.BackBufferCount ? - (This->params.BackBufferCount + - (This->params.SwapEffect != D3DSWAPEFFECT_COPY)) : 0; - newBufferCount = pParams->BackBufferCount + - (pParams->SwapEffect != D3DSWAPEFFECT_COPY); + oldBufferCount = This->num_back_buffers; + newBufferCount = NineSwapChain9_GetBackBufferCountForParams(This, pParams); + + multisample_type = pParams->MultiSampleType; + + /* Map MultiSampleQuality to MultiSampleType */ + hr = d3dmultisample_type_check(This->screen, pParams->BackBufferFormat, + &multisample_type, + pParams->MultiSampleQuality, + NULL); + if (FAILED(hr)) { + return hr; + } pf = d3d9_to_pipe_format_checked(This->screen, pParams->BackBufferFormat, - PIPE_TEXTURE_2D, pParams->MultiSampleType, + PIPE_TEXTURE_2D, multisample_type, PIPE_BIND_RENDER_TARGET, FALSE, FALSE); if (This->actx->linear_framebuffer || (pf != PIPE_FORMAT_B8G8R8X8_UNORM && pf != PIPE_FORMAT_B8G8R8A8_UNORM) || pParams->SwapEffect != D3DSWAPEFFECT_DISCARD || - pParams->MultiSampleType >= 2 || + multisample_type >= 2 || (This->actx->ref && This->actx->ref == This->screen)) has_present_buffers = TRUE; @@ -227,6 +252,7 @@ * For example 16 bits.*/ depth = 24; + memset(&tmplt, 0, sizeof(tmplt)); tmplt.target = PIPE_TEXTURE_2D; tmplt.width0 = pParams->BackBufferWidth; tmplt.height0 = pParams->BackBufferHeight; @@ -239,10 +265,16 @@ desc.Type = D3DRTYPE_SURFACE; desc.Pool = D3DPOOL_DEFAULT; desc.MultiSampleType = pParams->MultiSampleType; - desc.MultiSampleQuality = 0; + desc.MultiSampleQuality = pParams->MultiSampleQuality; desc.Width = pParams->BackBufferWidth; desc.Height = pParams->BackBufferHeight; + for (i = 0; i < oldBufferCount; i++) { + if (This->tasks[i]) + _mesa_threadpool_wait_for_task(This->pool, &(This->tasks[i])); + } + memset(This->tasks, 0, sizeof(This->tasks)); + if (This->pool) { _mesa_threadpool_destroy(This, This->pool); This->pool = NULL; @@ -253,58 +285,30 @@ if (!This->pool) This->enable_threadpool = FALSE; - This->tasks = REALLOC(This->tasks, - oldBufferCount * sizeof(struct threadpool_task *), - newBufferCount * sizeof(struct threadpool_task *)); - memset(This->tasks, 0, newBufferCount * sizeof(struct threadpool_task *)); - for (i = 0; i < oldBufferCount; i++) { ID3DPresent_DestroyD3DWindowBuffer(This->present, This->present_handles[i]); This->present_handles[i] = NULL; - if (This->present_buffers) + if (This->present_buffers[i]) pipe_resource_reference(&(This->present_buffers[i]), NULL); } - if (!has_present_buffers && This->present_buffers) { - FREE(This->present_buffers); - This->present_buffers = NULL; - } - if (newBufferCount != oldBufferCount) { for (i = newBufferCount; i < oldBufferCount; ++i) NineUnknown_Detach(NineUnknown(This->buffers[i])); - bufs = REALLOC(This->buffers, - oldBufferCount * sizeof(This->buffers[0]), - newBufferCount * sizeof(This->buffers[0])); - if (!bufs) - return E_OUTOFMEMORY; - This->buffers = bufs; - This->present_handles = REALLOC(This->present_handles, - oldBufferCount * sizeof(D3DWindowBuffer *), - newBufferCount * sizeof(D3DWindowBuffer *)); for (i = oldBufferCount; i < newBufferCount; ++i) { This->buffers[i] = NULL; This->present_handles[i] = NULL; } } - - if (has_present_buffers && - (newBufferCount != oldBufferCount || !This->present_buffers)) { - This->present_buffers = REALLOC(This->present_buffers, - This->present_buffers == NULL ? 0 : - oldBufferCount * sizeof(struct pipe_resource *), - newBufferCount * sizeof(struct pipe_resource *)); - memset(This->present_buffers, 0, newBufferCount * sizeof(struct pipe_resource *)); - } + This->num_back_buffers = newBufferCount; for (i = 0; i < newBufferCount; ++i) { - tmplt.bind = PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_TRANSFER_READ | - PIPE_BIND_TRANSFER_WRITE | PIPE_BIND_RENDER_TARGET; - tmplt.nr_samples = pParams->MultiSampleType; + tmplt.bind = PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_RENDER_TARGET; + tmplt.nr_samples = multisample_type; if (!has_present_buffers) - tmplt.bind |= PIPE_BIND_SHARED | PIPE_BIND_SCANOUT | PIPE_BIND_DISPLAY_TARGET; + tmplt.bind |= NINE_BIND_PRESENTBUFFER_FLAGS; tmplt.format = d3d9_to_pipe_format_checked(This->screen, pParams->BackBufferFormat, PIPE_TEXTURE_2D, @@ -320,6 +324,7 @@ if (pParams->Flags & D3DPRESENTFLAG_LOCKABLE_BACKBUFFER) resource->flags |= NINE_RESOURCE_FLAG_LOCKABLE; if (This->buffers[i]) { + NineSurface9_SetMultiSampleType(This->buffers[i], desc.MultiSampleType); NineSurface9_SetResourceResize(This->buffers[i], resource); if (has_present_buffers) pipe_resource_reference(&resource, NULL); @@ -338,7 +343,7 @@ } if (has_present_buffers) { tmplt.format = PIPE_FORMAT_B8G8R8X8_UNORM; - tmplt.bind = PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_SHARED | PIPE_BIND_SCANOUT | PIPE_BIND_DISPLAY_TARGET; + tmplt.bind = NINE_BIND_PRESENTBUFFER_FLAGS; tmplt.nr_samples = 0; if (This->actx->linear_framebuffer) tmplt.bind |= PIPE_BIND_LINEAR; @@ -349,56 +354,48 @@ } This->present_handles[i] = D3DWindowBuffer_create(This, resource, depth, false); pipe_resource_reference(&resource, NULL); + if (!This->present_handles[i]) { + return D3DERR_DRIVERINTERNALERROR; + } } if (pParams->EnableAutoDepthStencil) { tmplt.bind = d3d9_get_pipe_depth_format_bindings(pParams->AutoDepthStencilFormat); - /* Checking the d3d9 depth format for texture support indicates the app if it can use - * the format for shadow mapping or texturing. If the check returns true, then the app - * is allowed to use this functionnality, so try first to create the buffer - * with PIPE_BIND_SAMPLER_VIEW. If the format can't be created with it, try without. - * If it fails with PIPE_BIND_SAMPLER_VIEW, then the app check for texture support - * would fail too, so we are fine. */ - tmplt.bind |= PIPE_BIND_SAMPLER_VIEW; - tmplt.nr_samples = pParams->MultiSampleType; + tmplt.nr_samples = multisample_type; tmplt.format = d3d9_to_pipe_format_checked(This->screen, pParams->AutoDepthStencilFormat, PIPE_TEXTURE_2D, tmplt.nr_samples, tmplt.bind, FALSE, FALSE); - if (tmplt.format == PIPE_FORMAT_NONE) { - tmplt.bind &= ~PIPE_BIND_SAMPLER_VIEW; - tmplt.format = d3d9_to_pipe_format_checked(This->screen, - pParams->AutoDepthStencilFormat, - PIPE_TEXTURE_2D, - tmplt.nr_samples, - tmplt.bind, - FALSE, FALSE); - } if (tmplt.format == PIPE_FORMAT_NONE) return D3DERR_INVALIDCALL; - resource = This->screen->resource_create(This->screen, &tmplt); - if (!resource) { - DBG("Failed to create pipe_resource for depth buffer.\n"); - return D3DERR_OUTOFVIDEOMEMORY; - } if (This->zsbuf) { + resource = This->screen->resource_create(This->screen, &tmplt); + if (!resource) { + DBG("Failed to create pipe_resource for depth buffer.\n"); + return D3DERR_OUTOFVIDEOMEMORY; + } + + NineSurface9_SetMultiSampleType(This->zsbuf, desc.MultiSampleType); NineSurface9_SetResourceResize(This->zsbuf, resource); pipe_resource_reference(&resource, NULL); } else { - /* XXX wine thinks the container of this should be the device */ - desc.Format = pParams->AutoDepthStencilFormat; - desc.Usage = D3DUSAGE_DEPTHSTENCIL; - hr = NineSurface9_new(pDevice, NineUnknown(pDevice), resource, NULL, 0, - 0, 0, &desc, &This->zsbuf); - pipe_resource_reference(&resource, NULL); + hr = NineDevice9_CreateDepthStencilSurface(pDevice, + pParams->BackBufferWidth, + pParams->BackBufferHeight, + pParams->AutoDepthStencilFormat, + pParams->MultiSampleType, + pParams->MultiSampleQuality, + 0, + (IDirect3DSurface9 **)&This->zsbuf, + NULL); if (FAILED(hr)) { DBG("Failed to create ZS surface.\n"); return hr; } - This->zsbuf->base.base.forward = FALSE; + NineUnknown_ConvertRefToBind(NineUnknown(This->zsbuf)); } } @@ -509,18 +506,16 @@ if (This->pool) _mesa_threadpool_destroy(This, This->pool); - if (This->buffers) { - for (i = 0; i < This->params.BackBufferCount; i++) { - NineUnknown_Release(NineUnknown(This->buffers[i])); + for (i = 0; i < This->num_back_buffers; i++) { + if (This->buffers[i]) + NineUnknown_Detach(NineUnknown(This->buffers[i])); + if (This->present_handles[i]) ID3DPresent_DestroyD3DWindowBuffer(This->present, This->present_handles[i]); - if (This->present_buffers) - pipe_resource_reference(&(This->present_buffers[i]), NULL); - } - FREE(This->buffers); - FREE(This->present_buffers); + if (This->present_buffers[i]) + pipe_resource_reference(&(This->present_buffers[i]), NULL); } if (This->zsbuf) - NineUnknown_Destroy(NineUnknown(This->zsbuf)); + NineUnknown_Unbind(NineUnknown(This->zsbuf)); if (This->present) ID3DPresent_Release(This->present); @@ -537,6 +532,7 @@ { struct pipe_resource tmplt; + memset(&tmplt, 0, sizeof(tmplt)); tmplt.target = PIPE_TEXTURE_2D; tmplt.width0 = width; tmplt.height0 = height; @@ -546,15 +542,18 @@ tmplt.usage = PIPE_USAGE_DEFAULT; tmplt.flags = 0; tmplt.format = PIPE_FORMAT_B8G8R8X8_UNORM; - tmplt.bind = PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_TRANSFER_READ | - PIPE_BIND_TRANSFER_WRITE | PIPE_BIND_RENDER_TARGET | - PIPE_BIND_SHARED | PIPE_BIND_SCANOUT | PIPE_BIND_DISPLAY_TARGET; + tmplt.bind = NINE_BIND_BACKBUFFER_FLAGS | + NINE_BIND_PRESENTBUFFER_FLAGS; tmplt.nr_samples = 0; if (This->actx->linear_framebuffer) tmplt.bind |= PIPE_BIND_LINEAR; *resource = This->screen->resource_create(This->screen, &tmplt); *present_handle = D3DWindowBuffer_create(This, *resource, 24, true); + + if (!*present_handle) { + pipe_resource_reference(resource, NULL); + } } static void @@ -562,6 +561,7 @@ { struct NineDevice9 *device = This->base.device; struct pipe_blit_info blit; + struct pipe_context *pipe; if (device->cursor.software && device->cursor.visible && device->cursor.w) { memset(&blit, 0, sizeof(blit)); @@ -599,10 +599,13 @@ blit.dst.box.x, blit.dst.box.y); blit.alpha_blend = TRUE; - This->pipe->blit(This->pipe, &blit); + pipe = NineDevice9_GetPipe(This->base.device); + pipe->blit(pipe, &blit); } if (device->hud && resource) { + /* Implicit use of context pipe */ + (void)NineDevice9_GetPipe(This->base.device); hud_draw(device->hud, resource); /* XXX: no offset */ /* HUD doesn't clobber stipple */ nine_state_restore_non_cso(device); @@ -621,7 +624,7 @@ { struct end_present_struct *work = data; if (work->fence_to_wait) { - (void) work->screen->fence_finish(work->screen, work->fence_to_wait, PIPE_TIMEOUT_INFINITE); + (void) work->screen->fence_finish(work->screen, NULL, work->fence_to_wait, PIPE_TIMEOUT_INFINITE); work->screen->fence_reference(work->screen, &(work->fence_to_wait), NULL); } ID3DPresent_PresentBuffer(work->present, work->present_handle, work->hDestWindowOverride, NULL, NULL, NULL, 0); @@ -651,6 +654,7 @@ const RGNDATA *pDirtyRegion, DWORD dwFlags ) { + struct pipe_context *pipe; struct pipe_resource *resource; struct pipe_fence_handle *fence; HRESULT hr; @@ -689,7 +693,9 @@ if (This->params.SwapEffect == D3DSWAPEFFECT_DISCARD) handle_draw_cursor_and_hud(This, resource); - if (This->present_buffers) { + pipe = NineDevice9_GetPipe(This->base.device); + + if (This->present_buffers[0]) { memset(&blit, 0, sizeof(blit)); blit.src.resource = resource; blit.src.level = 0; @@ -718,18 +724,18 @@ blit.scissor_enable = FALSE; blit.alpha_blend = FALSE; - This->pipe->blit(This->pipe, &blit); + pipe->blit(pipe, &blit); } /* The resource we present has to resolve fast clears * if needed (and other things) */ - This->pipe->flush_resource(This->pipe, resource); + pipe->flush_resource(pipe, resource); if (This->params.SwapEffect != D3DSWAPEFFECT_DISCARD) handle_draw_cursor_and_hud(This, resource); fence = NULL; - This->pipe->flush(This->pipe, &fence, PIPE_FLUSH_END_OF_FRAME); + pipe->flush(pipe, &fence, PIPE_FLUSH_END_OF_FRAME); if (fence) { swap_fences_push_back(This, fence); This->screen->fence_reference(This->screen, &fence, NULL); @@ -743,7 +749,7 @@ BOOL still_draw = FALSE; fence = swap_fences_see_front(This); if (fence) { - still_draw = !This->screen->fence_finish(This->screen, fence, 0); + still_draw = !This->screen->fence_finish(This->screen, NULL, fence, 0); This->screen->fence_reference(This->screen, &fence, NULL); } if (still_draw) @@ -754,7 +760,7 @@ This->tasks[0]=NULL; fence = swap_fences_pop_front(This); if (fence) { - (void) This->screen->fence_finish(This->screen, fence, PIPE_TIMEOUT_INFINITE); + (void) This->screen->fence_finish(This->screen, NULL, fence, PIPE_TIMEOUT_INFINITE); This->screen->fence_reference(This->screen, &fence, NULL); } @@ -790,6 +796,7 @@ if (This->base.device->ex) { if (NineSwapChain9_GetOccluded(This)) { + DBG("Present is occluded. Returning S_PRESENT_OCCLUDED.\n"); return S_PRESENT_OCCLUDED; } } else { @@ -798,69 +805,107 @@ This->base.device->device_needs_reset = TRUE; } if (This->base.device->device_needs_reset) { + DBG("Device is lost. Returning D3DERR_DEVICELOST.\n"); return D3DERR_DEVICELOST; } } + nine_csmt_process(This->base.device); + hr = present(This, pSourceRect, pDestRect, hDestWindowOverride, pDirtyRegion, dwFlags); if (hr == D3DERR_WASSTILLDRAWING) return hr; - switch (This->params.SwapEffect) { - case D3DSWAPEFFECT_FLIP: - UNTESTED(4); - case D3DSWAPEFFECT_DISCARD: - /* rotate the queue */ - pipe_resource_reference(&res, This->buffers[0]->base.resource); - for (i = 1; i <= This->params.BackBufferCount; i++) { - NineSurface9_SetResourceResize(This->buffers[i - 1], - This->buffers[i]->base.resource); + if (This->base.device->minor_version_num > 2 && + This->params.SwapEffect == D3DSWAPEFFECT_DISCARD && + This->params.PresentationInterval == D3DPRESENT_INTERVAL_IMMEDIATE && + !This->actx->thread_submit) { + int next_buffer = -1; + + while (next_buffer == -1) { + /* Find a free backbuffer */ + for (i = 1; i < This->num_back_buffers; i++) { + if (ID3DPresent_IsBufferReleased(This->present, This->present_handles[i])) { + DBG("Found buffer released: %d\n", i); + next_buffer = i; + break; + } } - NineSurface9_SetResourceResize( - This->buffers[This->params.BackBufferCount], res); + if (next_buffer == -1) { + DBG("Found no buffer released. Waiting for event\n"); + ID3DPresent_WaitBufferReleaseEvent(This->present); + } + } + /* Switch with the released buffer */ + pipe_resource_reference(&res, This->buffers[0]->base.resource); + NineSurface9_SetResourceResize( + This->buffers[0], This->buffers[next_buffer]->base.resource); + NineSurface9_SetResourceResize( + This->buffers[next_buffer], res); + pipe_resource_reference(&res, NULL); + + if (This->present_buffers[0]) { + pipe_resource_reference(&res, This->present_buffers[0]); + pipe_resource_reference(&This->present_buffers[0], This->present_buffers[next_buffer]); + pipe_resource_reference(&This->present_buffers[next_buffer], res); pipe_resource_reference(&res, NULL); + } - if (This->present_buffers) { - pipe_resource_reference(&res, This->present_buffers[0]); - for (i = 1; i <= This->params.BackBufferCount; i++) - pipe_resource_reference(&(This->present_buffers[i-1]), This->present_buffers[i]); - pipe_resource_reference(&(This->present_buffers[This->params.BackBufferCount]), res); - pipe_resource_reference(&res, NULL); - } + handle_temp = This->present_handles[0]; + This->present_handles[0] = This->present_handles[next_buffer]; + This->present_handles[next_buffer] = handle_temp; - handle_temp = This->present_handles[0]; - for (i = 1; i <= This->params.BackBufferCount; i++) { - This->present_handles[i-1] = This->present_handles[i]; - } - This->present_handles[This->params.BackBufferCount] = handle_temp; - task_temp = This->tasks[0]; - for (i = 1; i <= This->params.BackBufferCount; i++) { - This->tasks[i-1] = This->tasks[i]; - } - This->tasks[This->params.BackBufferCount] = task_temp; - break; + /* Path not yet compatible with thread_submit */ + assert(!This->tasks[0] && !This->tasks[next_buffer]); + } else { + switch (This->params.SwapEffect) { + case D3DSWAPEFFECT_OVERLAY: /* Not implemented, fallback to FLIP */ + case D3DSWAPEFFECT_FLIPEX: /* Allows optimizations over FLIP for windowed mode. */ + case D3DSWAPEFFECT_DISCARD: /* Allows optimizations over FLIP */ + case D3DSWAPEFFECT_FLIP: + /* rotate the queue */ + pipe_resource_reference(&res, This->buffers[0]->base.resource); + for (i = 1; i < This->num_back_buffers; i++) { + NineSurface9_SetResourceResize(This->buffers[i - 1], + This->buffers[i]->base.resource); + } + NineSurface9_SetResourceResize( + This->buffers[This->num_back_buffers - 1], res); + pipe_resource_reference(&res, NULL); - case D3DSWAPEFFECT_COPY: - UNTESTED(5); - /* do nothing */ - break; + if (This->present_buffers[0]) { + pipe_resource_reference(&res, This->present_buffers[0]); + for (i = 1; i < This->num_back_buffers; i++) + pipe_resource_reference(&(This->present_buffers[i-1]), This->present_buffers[i]); + pipe_resource_reference(&(This->present_buffers[This->num_back_buffers - 1]), res); + pipe_resource_reference(&res, NULL); + } + + handle_temp = This->present_handles[0]; + for (i = 1; i < This->num_back_buffers; i++) { + This->present_handles[i-1] = This->present_handles[i]; + } + This->present_handles[This->num_back_buffers - 1] = handle_temp; + task_temp = This->tasks[0]; + for (i = 1; i < This->num_back_buffers; i++) { + This->tasks[i-1] = This->tasks[i]; + } + This->tasks[This->num_back_buffers - 1] = task_temp; + break; + + case D3DSWAPEFFECT_COPY: + /* do nothing */ + break; + } - case D3DSWAPEFFECT_OVERLAY: - /* XXX not implemented */ - break; + if (This->tasks[0]) + _mesa_threadpool_wait_for_task(This->pool, &(This->tasks[0])); - case D3DSWAPEFFECT_FLIPEX: - /* XXX not implemented */ - break; + ID3DPresent_WaitBufferReleased(This->present, This->present_handles[0]); } - if (This->tasks[0]) - _mesa_threadpool_wait_for_task(This->pool, &(This->tasks[0])); - - ID3DPresent_WaitBufferReleased(This->present, This->present_handles[0]); - - This->base.device->state.changed.group |= NINE_STATE_FB; + This->base.device->context.changed.group |= NINE_STATE_FB; return hr; } @@ -891,6 +936,10 @@ * mode. It may need a fix */ create_present_buffer(This, width, height, &temp_resource, &temp_handle); + if (!temp_resource || !temp_handle) { + return D3DERR_INVALIDCALL; + } + desc.Type = D3DRTYPE_SURFACE; desc.Pool = D3DPOOL_DEFAULT; desc.MultiSampleType = D3DMULTISAMPLE_NONE; @@ -1052,3 +1101,43 @@ (void) ID3DPresent_WaitForThread(This->present, thread); } } + +static int +NineSwapChain9_GetBackBufferCountForParams( struct NineSwapChain9 *This, + D3DPRESENT_PARAMETERS *pParams ) +{ + int count = pParams->BackBufferCount; + + /* When we have flip behaviour, d3d9 expects we get back the screen buffer when we flip. + * Here we don't get back the initial content of the screen. To emulate the behaviour + * we allocate an additional buffer */ + if (pParams->SwapEffect != D3DSWAPEFFECT_COPY) + count++; + /* With DISCARD, as there is no guarantee about the buffer contents, we can use + * an arbitrary number of buffers */ + if (pParams->SwapEffect == D3DSWAPEFFECT_DISCARD) { + /* thread_submit has a throttling equivalent to the throttling + * with throttling_value set to count-1. Most drivers use + * 2 for throttling_value. For performance use count of at least 3 + * for thread_submit. */ + if (This->actx->thread_submit && count < 3) + count = 3; + /* When we enable AllowDISCARDDelayedRelease, we must ensure + * to have at least 4 buffers to meet INTERVAL_IMMEDIATE, + * since the display server/compositor can hold 3 buffers + * without releasing them: + * . Buffer on screen. + * . Buffer scheduled kernel side to be next on screen. + * . Last buffer sent. + * For some reasons, 5 buffers are actually needed, because in + * case a pageflip is missed because rendering wasn't finished, + * the Xserver will hold 4 buffers. */ + if (!This->actx->thread_submit && + This->base.device->minor_version_num > 2 && + pParams->PresentationInterval == D3DPRESENT_INTERVAL_IMMEDIATE && + count < 5) + count = 5; + } + + return count; +} diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/swapchain9.h mesa-17.0.7/src/gallium/state_trackers/nine/swapchain9.h --- mesa-12.0.6/src/gallium/state_trackers/nine/swapchain9.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/swapchain9.h 2017-06-01 10:37:10.000000000 +0000 @@ -44,8 +44,6 @@ /* G3D stuff */ struct pipe_screen *screen; - struct pipe_context *pipe; - struct cso_context *cso; /* presentation backend */ ID3DPresent *present; @@ -53,11 +51,12 @@ D3DDISPLAYMODEEX *mode; struct d3dadapter9_context *actx; BOOL implicit; + unsigned num_back_buffers; /* buffer handles */ - struct NineSurface9 **buffers; /* 0 to BackBufferCount-1 : the back buffers. BackBufferCount : additional buffer */ - struct pipe_resource **present_buffers; - D3DWindowBuffer **present_handles; + struct NineSurface9 *buffers[D3DPRESENT_BACK_BUFFERS_MAX_EX + 1]; /* 0 to BackBufferCount-1 : the back buffers. BackBufferCount : additional buffer */ + struct pipe_resource *present_buffers[D3DPRESENT_BACK_BUFFERS_MAX_EX + 1]; + D3DWindowBuffer *present_handles[D3DPRESENT_BACK_BUFFERS_MAX_EX + 1]; struct pipe_fence_handle *swap_fences[DRI_SWAP_FENCES_MAX]; unsigned int cur_fences; @@ -72,7 +71,7 @@ D3DGAMMARAMP gamma; struct threadpool *pool; - struct threadpool_task **tasks; + struct threadpool_task *tasks[D3DPRESENT_BACK_BUFFERS_MAX_EX + 1]; BOOL enable_threadpool; }; diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/texture9.c mesa-17.0.7/src/gallium/state_trackers/nine/texture9.c --- mesa-12.0.6/src/gallium/state_trackers/nine/texture9.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/texture9.c 2017-06-01 10:37:10.000000000 +0000 @@ -142,9 +142,6 @@ if (Usage & D3DUSAGE_DYNAMIC) { info->usage = PIPE_USAGE_DYNAMIC; - info->bind |= - PIPE_BIND_TRANSFER_READ | - PIPE_BIND_TRANSFER_WRITE; } if (Usage & D3DUSAGE_SOFTWAREPROCESSING) @@ -164,7 +161,7 @@ * apps access sublevels of texture even if they locked only first * level) */ level_offsets = alloca(sizeof(unsigned) * (info->last_level + 1)); - user_buffer = align_malloc( + user_buffer = align_calloc( nine_format_get_size_and_offsets(pf, level_offsets, Width, Height, info->last_level), 32); @@ -247,6 +244,8 @@ UINT Level, D3DSURFACE_DESC *pDesc ) { + DBG("This=%p Level=%d pDesc=%p\n", This, Level, pDesc); + user_assert(Level <= This->base.base.info.last_level, D3DERR_INVALIDCALL); user_assert(Level == 0 || !(This->base.base.usage & D3DUSAGE_AUTOGENMIPMAP), D3DERR_INVALIDCALL); @@ -261,6 +260,8 @@ UINT Level, IDirect3DSurface9 **ppSurfaceLevel ) { + DBG("This=%p Level=%d ppSurfaceLevel=%p\n", This, Level, ppSurfaceLevel); + user_assert(Level <= This->base.base.info.last_level, D3DERR_INVALIDCALL); user_assert(Level == 0 || !(This->base.base.usage & D3DUSAGE_AUTOGENMIPMAP), D3DERR_INVALIDCALL); @@ -329,9 +330,13 @@ u_box_origin_2d(This->base.base.info.width0, This->base.base.info.height0, &This->dirty_rect); } else { - struct pipe_box box; - rect_to_pipe_box_clamp(&box, pDirtyRect); - u_box_union_2d(&This->dirty_rect, &This->dirty_rect, &box); + if (This->dirty_rect.width == 0) { + rect_to_pipe_box_clamp(&This->dirty_rect, pDirtyRect); + } else { + struct pipe_box box; + rect_to_pipe_box_clamp(&box, pDirtyRect); + u_box_union_2d(&This->dirty_rect, &This->dirty_rect, &box); + } (void) u_box_clip_2d(&This->dirty_rect, &This->dirty_rect, This->base.base.info.width0, This->base.base.info.height0); @@ -344,9 +349,9 @@ (void *)NineUnknown_AddRef, (void *)NineUnknown_Release, (void *)NineUnknown_GetDevice, /* actually part of Resource9 iface */ - (void *)NineResource9_SetPrivateData, - (void *)NineResource9_GetPrivateData, - (void *)NineResource9_FreePrivateData, + (void *)NineUnknown_SetPrivateData, + (void *)NineUnknown_GetPrivateData, + (void *)NineUnknown_FreePrivateData, (void *)NineResource9_SetPriority, (void *)NineResource9_GetPriority, (void *)NineBaseTexture9_PreLoad, diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/vertexbuffer9.c mesa-17.0.7/src/gallium/state_trackers/nine/vertexbuffer9.c --- mesa-12.0.6/src/gallium/state_trackers/nine/vertexbuffer9.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/vertexbuffer9.c 2017-06-01 10:37:10.000000000 +0000 @@ -63,9 +63,9 @@ } struct pipe_resource * -NineVertexBuffer9_GetResource( struct NineVertexBuffer9 *This ) +NineVertexBuffer9_GetResource( struct NineVertexBuffer9 *This, unsigned *offset ) { - return NineBuffer9_GetResource(&This->base); + return NineBuffer9_GetResource(&This->base, offset); } HRESULT NINE_WINAPI @@ -98,9 +98,9 @@ (void *)NineUnknown_AddRef, (void *)NineUnknown_Release, (void *)NineUnknown_GetDevice, /* actually part of Resource9 iface */ - (void *)NineResource9_SetPrivateData, - (void *)NineResource9_GetPrivateData, - (void *)NineResource9_FreePrivateData, + (void *)NineUnknown_SetPrivateData, + (void *)NineUnknown_GetPrivateData, + (void *)NineUnknown_FreePrivateData, (void *)NineResource9_SetPriority, (void *)NineResource9_GetPriority, (void *)NineResource9_PreLoad, diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/vertexbuffer9.h mesa-17.0.7/src/gallium/state_trackers/nine/vertexbuffer9.h --- mesa-12.0.6/src/gallium/state_trackers/nine/vertexbuffer9.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/vertexbuffer9.h 2017-06-01 10:37:10.000000000 +0000 @@ -58,7 +58,7 @@ /*** Nine private ***/ struct pipe_resource * -NineVertexBuffer9_GetResource( struct NineVertexBuffer9 *This ); +NineVertexBuffer9_GetResource( struct NineVertexBuffer9 *This, unsigned *offset ); /*** Direct3D public ***/ diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/vertexdeclaration9.c mesa-17.0.7/src/gallium/state_trackers/nine/vertexdeclaration9.c --- mesa-12.0.6/src/gallium/state_trackers/nine/vertexdeclaration9.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/vertexdeclaration9.c 2017-06-01 10:37:10.000000000 +0000 @@ -24,12 +24,12 @@ #include "vertexbuffer9.h" #include "device9.h" #include "nine_helpers.h" +#include "nine_shader.h" #include "pipe/p_format.h" #include "pipe/p_context.h" #include "util/u_math.h" #include "util/u_format.h" -#include "util/u_box.h" #include "translate/translate.h" #define DBG_CHANNEL DBG_VERTEXDECLARATION @@ -409,6 +409,53 @@ NINE_DEVICE_CHILD_NEW(VertexDeclaration9, ppOut, /* args */ pDevice, elems); } +void +NineVertexDeclaration9_FillStreamOutputInfo( + struct NineVertexDeclaration9 *This, + struct nine_vs_output_info *ShaderOutputsInfo, + unsigned numOutputs, + struct pipe_stream_output_info *so ) +{ + unsigned so_outputs = 0; + int i, j; + + memset(so, 0, sizeof(struct pipe_stream_output_info)); + + for (i = 0; i < numOutputs; i++) { + BYTE output_semantic = ShaderOutputsInfo[i].output_semantic; + unsigned output_semantic_index = ShaderOutputsInfo[i].output_semantic_index; + + for (j = 0; j < This->nelems; j++) { + if ((This->decls[j].Usage == output_semantic || + (output_semantic == D3DDECLUSAGE_POSITION && + This->decls[j].Usage == D3DDECLUSAGE_POSITIONT)) && + This->decls[j].UsageIndex == output_semantic_index) { + DBG("Matching %s %d: o%d -> %d\n", + nine_declusage_name(nine_d3d9_to_nine_declusage(This->decls[j].Usage, 0)), + This->decls[j].UsageIndex, i, j); + so->output[so_outputs].register_index = ShaderOutputsInfo[i].output_index; + so->output[so_outputs].start_component = 0; + if (ShaderOutputsInfo[i].mask & 8) + so->output[so_outputs].num_components = 4; + else if (ShaderOutputsInfo[i].mask & 4) + so->output[so_outputs].num_components = 3; + else if (ShaderOutputsInfo[i].mask & 2) + so->output[so_outputs].num_components = 2; + else + so->output[so_outputs].num_components = 1; + so->output[so_outputs].output_buffer = 0; + so->output[so_outputs].dst_offset = so_outputs * sizeof(float[4])/4; + so->output[so_outputs].stream = 0; + so_outputs++; + break; + } + } + } + + so->num_outputs = so_outputs; + so->stride[0] = so_outputs * sizeof(float[4])/4; +} + /* ProcessVertices runs stream output into a temporary buffer to capture * all outputs. * Now we have to convert them to the format and order set by the vertex @@ -422,17 +469,13 @@ struct NineVertexBuffer9 *pDstBuf, UINT DestIndex, UINT VertexCount, - struct pipe_resource *pSrcBuf, + void *pSrcBuf, const struct pipe_stream_output_info *so ) { - struct pipe_context *pipe = This->base.device->pipe; - struct pipe_transfer *transfer = NULL; struct translate *translate; struct translate_key transkey; - struct pipe_box box; HRESULT hr; unsigned i; - void *src_map; void *dst_map; DBG("This=%p pDstBuf=%p DestIndex=%u VertexCount=%u pSrcBuf=%p so=%p\n", @@ -477,20 +520,12 @@ if (FAILED(hr)) goto out; - src_map = pipe->transfer_map(pipe, pSrcBuf, 0, PIPE_TRANSFER_READ, &box, - &transfer); - if (!src_map) { - hr = D3DERR_DRIVERINTERNALERROR; - goto out; - } - translate->set_buffer(translate, 0, src_map, so->stride[0], ~0); + translate->set_buffer(translate, 0, pSrcBuf, so->stride[0] * 4, ~0); translate->run(translate, 0, VertexCount, 0, 0, dst_map); NineVertexBuffer9_Unlock(pDstBuf); out: - if (transfer) - pipe->transfer_unmap(pipe, transfer); translate->release(translate); /* TODO: cache these */ return hr; } diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/vertexdeclaration9.h mesa-17.0.7/src/gallium/state_trackers/nine/vertexdeclaration9.h --- mesa-12.0.6/src/gallium/state_trackers/nine/vertexdeclaration9.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/vertexdeclaration9.h 2017-06-01 10:37:10.000000000 +0000 @@ -31,6 +31,7 @@ struct pipe_stream_output_info; struct NineDevice9; struct NineVertexBuffer9; +struct nine_vs_output_info; struct NineVertexDeclaration9 { @@ -78,6 +79,13 @@ D3DVERTEXELEMENT9 *pElement, UINT *pNumElements ); +void +NineVertexDeclaration9_FillStreamOutputInfo( + struct NineVertexDeclaration9 *This, + struct nine_vs_output_info *ShaderOutputsInfo, + unsigned numOutputs, + struct pipe_stream_output_info *so ); + /* Convert stream output data to the vertex declaration's format. */ HRESULT NineVertexDeclaration9_ConvertStreamOutput( @@ -85,7 +93,7 @@ struct NineVertexBuffer9 *pDstBuf, UINT DestIndex, UINT VertexCount, - struct pipe_resource *pSrcBuf, + void *pSrcBuf, const struct pipe_stream_output_info *so ); #endif /* _NINE_VERTEXDECLARATION9_H_ */ diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/vertexshader9.c mesa-17.0.7/src/gallium/state_trackers/nine/vertexshader9.c --- mesa-12.0.6/src/gallium/state_trackers/nine/vertexshader9.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/vertexshader9.c 2017-06-01 10:37:10.000000000 +0000 @@ -23,10 +23,12 @@ #include "nine_helpers.h" #include "nine_shader.h" +#include "vertexdeclaration9.h" #include "vertexshader9.h" #include "device9.h" #include "pipe/p_context.h" +#include "cso_cache/cso_context.h" #define DBG_CHANNEL DBG_VERTEXSHADER @@ -37,6 +39,7 @@ { struct NineDevice9 *device; struct nine_shader_info info; + struct pipe_context *pipe; HRESULT hr; unsigned i; @@ -63,11 +66,24 @@ info.fog_enable = 0; info.point_size_min = 0; info.point_size_max = 0; + info.swvp_on = !!(device->params.BehaviorFlags & D3DCREATE_SOFTWARE_VERTEXPROCESSING); + info.process_vertices = false; - hr = nine_translate_shader(device, &info); + pipe = nine_context_get_pipe_acquire(device); + hr = nine_translate_shader(device, &info, pipe); + if (hr == D3DERR_INVALIDCALL && + (device->params.BehaviorFlags & D3DCREATE_MIXED_VERTEXPROCESSING)) { + /* Retry with a swvp shader. It will require swvp to be on. */ + info.swvp_on = true; + hr = nine_translate_shader(device, &info, pipe); + } + nine_context_get_pipe_release(device); + if (hr == D3DERR_INVALIDCALL) + ERR("Encountered buggy shader\n"); if (FAILED(hr)) return hr; This->byte_code.version = info.version; + This->swvp_only = info.swvp_on; This->byte_code.tokens = mem_dup(pFunction, info.byte_size); if (!This->byte_code.tokens) @@ -76,7 +92,7 @@ This->variant.cso = info.cso; This->last_cso = info.cso; - This->last_key = 0; + This->last_key = (uint32_t) (info.swvp_on << 9); This->const_used_size = info.const_used_size; This->lconstf = info.lconstf; @@ -97,25 +113,34 @@ DBG("This=%p\n", This); if (This->base.device) { - struct pipe_context *pipe = This->base.device->pipe; + struct pipe_context *pipe = nine_context_get_pipe_multithread(This->base.device); struct nine_shader_variant *var = &This->variant; + struct nine_shader_variant_so *var_so = &This->variant_so; do { if (var->cso) { - if (This->base.device->state.cso.vs == var->cso) + if (This->base.device->context.cso_shader.vs == var->cso) pipe->bind_vs_state(pipe, NULL); pipe->delete_vs_state(pipe, var->cso); } var = var->next; } while (var); + while (var_so && var_so->vdecl) { + if (var_so->cso) { + cso_delete_vertex_shader(This->base.device->cso_sw, var_so->cso ); + } + var_so = var_so->next; + } + if (This->ff_cso) { - if (This->ff_cso == This->base.device->state.cso.vs) + if (This->ff_cso == This->base.device->context.cso_shader.vs) pipe->bind_vs_state(pipe, NULL); pipe->delete_vs_state(pipe, This->ff_cso); } } nine_shader_variants_free(&This->variant); + nine_shader_variants_so_free(&This->variant_so); FREE((void *)This->byte_code.tokens); /* const_cast */ @@ -146,6 +171,9 @@ void * NineVertexShader9_GetVariant( struct NineVertexShader9 *This ) { + /* GetVariant is called from nine_context, thus we can + * get pipe directly */ + struct pipe_context *pipe = This->base.device->context.pipe; void *cso; uint64_t key; @@ -164,11 +192,13 @@ info.const_b_base = NINE_CONST_B_BASE(device->max_vs_const_f) / 16; info.byte_code = This->byte_code.tokens; info.sampler_mask_shadow = key & 0xf; - info.fog_enable = device->state.rs[D3DRS_FOGENABLE]; - info.point_size_min = asfloat(device->state.rs[D3DRS_POINTSIZE_MIN]); - info.point_size_max = asfloat(device->state.rs[D3DRS_POINTSIZE_MAX]); + info.fog_enable = device->context.rs[D3DRS_FOGENABLE]; + info.point_size_min = asfloat(device->context.rs[D3DRS_POINTSIZE_MIN]); + info.point_size_max = asfloat(device->context.rs[D3DRS_POINTSIZE_MAX]); + info.swvp_on = device->context.swvp; + info.process_vertices = false; - hr = nine_translate_shader(This->base.device, &info); + hr = nine_translate_shader(This->base.device, &info, pipe); if (FAILED(hr)) return NULL; nine_shader_variant_add(&This->variant, key, info.cso); @@ -181,6 +211,38 @@ return cso; } +void * +NineVertexShader9_GetVariantProcessVertices( struct NineVertexShader9 *This, + struct NineVertexDeclaration9 *vdecl_out, + struct pipe_stream_output_info *so ) +{ + struct nine_shader_info info; + HRESULT hr; + void *cso; + + cso = nine_shader_variant_so_get(&This->variant_so, vdecl_out, so); + if (cso) + return cso; + + info.type = PIPE_SHADER_VERTEX; + info.const_i_base = 0; + info.const_b_base = 0; + info.byte_code = This->byte_code.tokens; + info.sampler_mask_shadow = 0; + info.fog_enable = false; + info.point_size_min = 0; + info.point_size_max = 0; + info.swvp_on = true; + info.vdecl_out = vdecl_out; + info.process_vertices = true; + hr = nine_translate_shader(This->base.device, &info, This->base.device->pipe_sw); + if (FAILED(hr)) + return NULL; + *so = info.so; + nine_shader_variant_so_add(&This->variant_so, vdecl_out, so, info.cso); + return info.cso; +} + IDirect3DVertexShader9Vtbl NineVertexShader9_vtable = { (void *)NineUnknown_QueryInterface, (void *)NineUnknown_AddRef, diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/vertexshader9.h mesa-17.0.7/src/gallium/state_trackers/nine/vertexshader9.h --- mesa-12.0.6/src/gallium/state_trackers/nine/vertexshader9.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/vertexshader9.h 2017-06-01 10:37:10.000000000 +0000 @@ -26,10 +26,13 @@ #include "util/u_half.h" #include "iunknown.h" +#include "device9.h" #include "nine_helpers.h" #include "nine_shader.h" #include "nine_state.h" +struct NineVertexDeclaration9; + struct NineVertexShader9 { struct NineUnknown base; @@ -50,13 +53,12 @@ boolean position_t; /* if true, disable vport transform */ boolean point_size; /* if true, set rasterizer.point_size_per_vertex to 1 */ + boolean swvp_only; unsigned const_used_size; /* in bytes */ struct nine_lconstf lconstf; - const struct pipe_stream_output_info *so; - uint64_t ff_key[3]; void *ff_cso; @@ -64,6 +66,9 @@ void *last_cso; uint64_t next_key; + + /* so */ + struct nine_shader_variant_so variant_so; }; static inline struct NineVertexShader9 * NineVertexShader9( void *data ) @@ -73,25 +78,27 @@ static inline BOOL NineVertexShader9_UpdateKey( struct NineVertexShader9 *vs, - struct nine_state *state ) + struct NineDevice9 *device ) { + struct nine_context *context = &(device->context); uint8_t samplers_shadow; uint64_t key; BOOL res; - samplers_shadow = (uint8_t)((state->samplers_shadow & NINE_VS_SAMPLERS_MASK) >> NINE_SAMPLER_VS(0)); + samplers_shadow = (uint8_t)((context->samplers_shadow & NINE_VS_SAMPLERS_MASK) >> NINE_SAMPLER_VS(0)); samplers_shadow &= vs->sampler_mask; key = samplers_shadow; if (vs->byte_code.version < 0x30) - key |= (uint32_t) (state->rs[D3DRS_FOGENABLE] << 8); + key |= (uint32_t) ((!!context->rs[D3DRS_FOGENABLE]) << 8); + key |= (uint32_t) (context->swvp << 9); /* We want to use a 64 bits key for performance. * Use compressed float16 values for the pointsize min/max in the key. * Shaders do not usually output psize.*/ if (vs->point_size) { - key |= ((uint64_t)util_float_to_half(asfloat(state->rs[D3DRS_POINTSIZE_MIN]))) << 32; - key |= ((uint64_t)util_float_to_half(asfloat(state->rs[D3DRS_POINTSIZE_MAX]))) << 48; + key |= ((uint64_t)util_float_to_half(asfloat(context->rs[D3DRS_POINTSIZE_MIN]))) << 32; + key |= ((uint64_t)util_float_to_half(asfloat(context->rs[D3DRS_POINTSIZE_MAX]))) << 48; } res = vs->last_key != key; @@ -103,6 +110,11 @@ void * NineVertexShader9_GetVariant( struct NineVertexShader9 *vs ); +void * +NineVertexShader9_GetVariantProcessVertices( struct NineVertexShader9 *vs, + struct NineVertexDeclaration9 *vdecl_out, + struct pipe_stream_output_info *so ); + /*** public ***/ HRESULT diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/volume9.c mesa-17.0.7/src/gallium/state_trackers/nine/volume9.c --- mesa-12.0.6/src/gallium/state_trackers/nine/volume9.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/volume9.c 2017-06-01 10:37:10.000000000 +0000 @@ -28,10 +28,8 @@ #include "nine_pipe.h" #include "nine_dump.h" -#include "util/u_hash_table.h" #include "util/u_format.h" #include "util/u_surface.h" -#include "nine_pdata.h" #define DBG_CHANNEL DBG_VOLUME @@ -44,7 +42,7 @@ DBG("(%p(This=%p),level=%u) Allocating 0x%x bytes of system memory.\n", This->base.container, This, This->level, size); - This->data = (uint8_t *)align_malloc(size, 32); + This->data = (uint8_t *)align_calloc(size, 32); if (!This->data) return E_OUTOFMEMORY; return D3D_OK; @@ -77,13 +75,8 @@ if (FAILED(hr)) return hr; - This->pdata = util_hash_table_create(ht_guid_hash, ht_guid_compare); - if (!This->pdata) - return E_OUTOFMEMORY; - pipe_resource_reference(&This->resource, pResource); - This->pipe = pParams->device->pipe; This->transfer = NULL; This->lock_count = 0; @@ -130,7 +123,7 @@ This->layer_stride_conversion = util_format_get_2d_size(This->format_conversion, This->stride_conversion, pDesc->Height); - This->data_conversion = align_malloc(This->layer_stride_conversion * + This->data_conversion = align_calloc(This->layer_stride_conversion * This->desc.Depth, 32); if (!This->data_conversion) return E_OUTOFMEMORY; @@ -149,8 +142,17 @@ { DBG("This=%p\n", This); - if (This->transfer) - NineVolume9_UnlockBox(This); + if (This->transfer) { + struct pipe_context *pipe = nine_context_get_pipe_multithread(This->base.device); + pipe->transfer_unmap(pipe, This->transfer); + This->transfer = NULL; + } + + /* Note: Following condition cannot happen currently, since we + * refcount the volume in the functions increasing + * pending_uploads_counter. */ + if (p_atomic_read(&This->pending_uploads_counter)) + nine_csmt_process(This->base.device); if (This->data) align_free(This->data); @@ -167,6 +169,13 @@ REFIID riid, void **ppContainer ) { + char guid_str[64]; + + DBG("This=%p riid=%p id=%s ppContainer=%p\n", + This, riid, riid ? GUID_sprintf(guid_str, riid) : "", ppContainer); + + (void)guid_str; + if (!NineUnknown(This)->container) return E_NOINTERFACE; return NineUnknown_QueryInterface(NineUnknown(This)->container, riid, ppContainer); @@ -239,6 +248,7 @@ const D3DBOX *pBox, DWORD Flags ) { + struct pipe_context *pipe; struct pipe_resource *resource = This->resource; struct pipe_box box; unsigned usage; @@ -300,6 +310,9 @@ &box); } + if (p_atomic_read(&This->pending_uploads_counter)) + nine_csmt_process(This->base.device); + if (This->data_conversion) { /* For now we only have uncompressed formats here */ pLockedVolume->RowPitch = This->stride_conversion; @@ -313,9 +326,17 @@ pLockedVolume->pBits = NineVolume9_GetSystemMemPointer(This, box.x, box.y, box.z); } else { + bool no_refs = !p_atomic_read(&This->base.bind) && + !p_atomic_read(&This->base.container->bind); + if (no_refs) + pipe = nine_context_get_pipe_acquire(This->base.device); + else + pipe = NineDevice9_GetPipe(This->base.device); pLockedVolume->pBits = - This->pipe->transfer_map(This->pipe, resource, This->level, usage, - &box, &This->transfer); + pipe->transfer_map(pipe, resource, This->level, usage, + &box, &This->transfer); + if (no_refs) + nine_context_get_pipe_release(This->base.device); if (!This->transfer) { if (Flags & D3DLOCK_DONOTWAIT) return D3DERR_WASSTILLDRAWING; @@ -337,11 +358,15 @@ HRESULT NINE_WINAPI NineVolume9_UnlockBox( struct NineVolume9 *This ) { + struct pipe_context *pipe; + DBG("This=%p lock_count=%u\n", This, This->lock_count); user_assert(This->lock_count, D3DERR_INVALIDCALL); if (This->transfer) { - This->pipe->transfer_unmap(This->pipe, This->transfer); + pipe = nine_context_get_pipe_acquire(This->base.device); + pipe->transfer_unmap(pipe, This->transfer); This->transfer = NULL; + nine_context_get_pipe_release(This->base.device); } --This->lock_count; @@ -353,13 +378,14 @@ u_box_3d(0, 0, 0, This->desc.Width, This->desc.Height, This->desc.Depth, &box); + pipe = NineDevice9_GetPipe(This->base.device); if (!dst) { - dst = This->pipe->transfer_map(This->pipe, - This->resource, - This->level, - PIPE_TRANSFER_WRITE | - PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE, - &box, &transfer); + dst = pipe->transfer_map(pipe, + This->resource, + This->level, + PIPE_TRANSFER_WRITE | + PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE, + &box, &transfer); if (!dst) return D3D_OK; } @@ -377,7 +403,7 @@ This->desc.Depth); if (!This->data) - pipe_transfer_unmap(This->pipe, transfer); + pipe_transfer_unmap(pipe, transfer); } return D3D_OK; @@ -391,12 +417,9 @@ unsigned dstx, unsigned dsty, unsigned dstz, struct pipe_box *pSrcBox ) { - struct pipe_context *pipe = This->pipe; - struct pipe_transfer *transfer = NULL; struct pipe_resource *r_dst = This->resource; struct pipe_box src_box; struct pipe_box dst_box; - uint8_t *map = NULL; DBG("This=%p From=%p dstx=%u dsty=%u dstz=%u pSrcBox=%p\n", This, From, dstx, dsty, dstz, pSrcBox); @@ -423,30 +446,16 @@ dst_box.height = src_box.height; dst_box.depth = src_box.depth; - map = pipe->transfer_map(pipe, - r_dst, - This->level, - PIPE_TRANSFER_WRITE | PIPE_TRANSFER_DISCARD_RANGE, - &dst_box, &transfer); - if (!map) - return; - - /* Note: if formats are the sames, it will revert - * to normal memcpy */ - (void) util_format_translate_3d(r_dst->format, - map, transfer->stride, - transfer->layer_stride, - 0, 0, 0, - From->info.format, - From->data, From->stride, - From->layer_stride, - src_box.x, src_box.y, - src_box.z, - src_box.width, - src_box.height, - src_box.depth); - - pipe_transfer_unmap(pipe, transfer); + nine_context_box_upload(This->base.device, + &From->pending_uploads_counter, + (struct NineUnknown *)This, + r_dst, + This->level, + &dst_box, + From->info.format, + From->data, From->stride, + From->layer_stride, + &src_box); if (This->data_conversion) (void) util_format_translate_3d(This->format_conversion, @@ -472,10 +481,8 @@ NineVolume9_UploadSelf( struct NineVolume9 *This, const struct pipe_box *damaged ) { - struct pipe_context *pipe = This->pipe; struct pipe_resource *res = This->resource; struct pipe_box box; - uint8_t *ptr; DBG("This=%p damaged=%p data=%p res=%p\n", This, damaged, This->data, res); @@ -494,10 +501,16 @@ box.depth = This->desc.Depth; } - ptr = NineVolume9_GetSystemMemPointer(This, box.x, box.y, box.z); - - pipe->transfer_inline_write(pipe, res, This->level, 0, &box, - ptr, This->stride, This->layer_stride); + nine_context_box_upload(This->base.device, + &This->pending_uploads_counter, + (struct NineUnknown *)This, + res, + This->level, + &box, + res->format, + This->data, This->stride, + This->layer_stride, + &box); return D3D_OK; } @@ -508,9 +521,9 @@ (void *)NineUnknown_AddRef, (void *)NineUnknown_Release, (void *)NineUnknown_GetDevice, /* actually part of Volume9 iface */ - (void *)NineVolume9_SetPrivateData, - (void *)NineVolume9_GetPrivateData, - (void *)NineVolume9_FreePrivateData, + (void *)NineUnknown_SetPrivateData, + (void *)NineUnknown_GetPrivateData, + (void *)NineUnknown_FreePrivateData, (void *)NineVolume9_GetContainer, (void *)NineVolume9_GetDesc, (void *)NineVolume9_LockBox, @@ -534,98 +547,3 @@ NINE_DEVICE_CHILD_NEW(Volume9, ppOut, pDevice, /* args */ pContainer, pResource, Level, pDesc); } - - -/*** The boring stuff. TODO: Unify with Resource. ***/ - -HRESULT NINE_WINAPI -NineVolume9_SetPrivateData( struct NineVolume9 *This, - REFGUID refguid, - const void *pData, - DWORD SizeOfData, - DWORD Flags ) -{ - enum pipe_error err; - struct pheader *header; - const void *user_data = pData; - - DBG("This=%p refguid=%p pData=%p SizeOfData=%d Flags=%d\n", - This, refguid, pData, SizeOfData, Flags); - - if (Flags & D3DSPD_IUNKNOWN) - user_assert(SizeOfData == sizeof(IUnknown *), D3DERR_INVALIDCALL); - - /* data consists of a header and the actual data. avoiding 2 mallocs */ - header = CALLOC_VARIANT_LENGTH_STRUCT(pheader, SizeOfData-1); - if (!header) { return E_OUTOFMEMORY; } - header->unknown = (Flags & D3DSPD_IUNKNOWN) ? TRUE : FALSE; - - /* if the refguid already exists, delete it */ - NineVolume9_FreePrivateData(This, refguid); - - /* IUnknown special case */ - if (header->unknown) { - /* here the pointer doesn't point to the data we want, so point at the - * pointer making what we eventually copy is the pointer itself */ - user_data = &pData; - } - - header->size = SizeOfData; - memcpy(header->data, user_data, header->size); - - err = util_hash_table_set(This->pdata, refguid, header); - if (err == PIPE_OK) { - if (header->unknown) { IUnknown_AddRef(*(IUnknown **)header->data); } - return D3D_OK; - } - - FREE(header); - if (err == PIPE_ERROR_OUT_OF_MEMORY) { return E_OUTOFMEMORY; } - - return D3DERR_DRIVERINTERNALERROR; -} - -HRESULT NINE_WINAPI -NineVolume9_GetPrivateData( struct NineVolume9 *This, - REFGUID refguid, - void *pData, - DWORD *pSizeOfData ) -{ - struct pheader *header; - - user_assert(pSizeOfData, E_POINTER); - - header = util_hash_table_get(This->pdata, refguid); - if (!header) { return D3DERR_NOTFOUND; } - - if (!pData) { - *pSizeOfData = header->size; - return D3D_OK; - } - if (*pSizeOfData < header->size) { - return D3DERR_MOREDATA; - } - - if (header->unknown) { IUnknown_AddRef(*(IUnknown **)header->data); } - memcpy(pData, header->data, header->size); - - return D3D_OK; -} - -HRESULT NINE_WINAPI -NineVolume9_FreePrivateData( struct NineVolume9 *This, - REFGUID refguid ) -{ - struct pheader *header; - - DBG("This=%p refguid=%p\n", This, refguid); - - header = util_hash_table_get(This->pdata, refguid); - if (!header) { return D3DERR_NOTFOUND; } - - ht_guid_delete(NULL, header, NULL); - util_hash_table_remove(This->pdata, refguid); - - return D3D_OK; -} - diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/volume9.h mesa-17.0.7/src/gallium/state_trackers/nine/volume9.h --- mesa-12.0.6/src/gallium/state_trackers/nine/volume9.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/volume9.h 2017-06-01 10:37:10.000000000 +0000 @@ -54,10 +54,7 @@ struct pipe_transfer *transfer; unsigned lock_count; - struct pipe_context *pipe; - - /* for [GS]etPrivateData/FreePrivateData */ - struct util_hash_table *pdata; + unsigned pending_uploads_counter; /* pending uploads */ }; static inline struct NineVolume9 * NineVolume9( void *data ) @@ -101,23 +98,6 @@ /*** Direct3D public ***/ HRESULT NINE_WINAPI -NineVolume9_SetPrivateData( struct NineVolume9 *This, - REFGUID refguid, - const void *pData, - DWORD SizeOfData, - DWORD Flags ); - -HRESULT NINE_WINAPI -NineVolume9_GetPrivateData( struct NineVolume9 *This, - REFGUID refguid, - void *pData, - DWORD *pSizeOfData ); - -HRESULT NINE_WINAPI -NineVolume9_FreePrivateData( struct NineVolume9 *This, - REFGUID refguid ); - -HRESULT NINE_WINAPI NineVolume9_GetContainer( struct NineVolume9 *This, REFIID riid, void **ppContainer ); diff -Nru mesa-12.0.6/src/gallium/state_trackers/nine/volumetexture9.c mesa-17.0.7/src/gallium/state_trackers/nine/volumetexture9.c --- mesa-12.0.6/src/gallium/state_trackers/nine/volumetexture9.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/nine/volumetexture9.c 2017-06-01 10:37:10.000000000 +0000 @@ -94,9 +94,6 @@ if (Usage & D3DUSAGE_DYNAMIC) { info->usage = PIPE_USAGE_DYNAMIC; - info->bind |= - PIPE_BIND_TRANSFER_READ | - PIPE_BIND_TRANSFER_WRITE; } if (Usage & D3DUSAGE_SOFTWAREPROCESSING) DBG("Application asked for Software Vertex Processing, " @@ -142,7 +139,7 @@ DBG("This=%p\n", This); if (This->volumes) { - for (l = 0; l < This->base.base.info.last_level; ++l) + for (l = 0; l <= This->base.base.info.last_level; ++l) NineUnknown_Destroy(&This->volumes[l]->base); FREE(This->volumes); } @@ -225,9 +222,13 @@ This->dirty_box.height = This->base.base.info.height0; This->dirty_box.depth = This->base.base.info.depth0; } else { - struct pipe_box box; - d3dbox_to_pipe_box(&box, pDirtyBox); - u_box_union_3d(&This->dirty_box, &This->dirty_box, &box); + if (This->dirty_box.width == 0) { + d3dbox_to_pipe_box(&This->dirty_box, pDirtyBox); + } else { + struct pipe_box box; + d3dbox_to_pipe_box(&box, pDirtyBox); + u_box_union_3d(&This->dirty_box, &This->dirty_box, &box); + } This->dirty_box.x = MAX2(This->dirty_box.x, 0); This->dirty_box.y = MAX2(This->dirty_box.y, 0); This->dirty_box.z = MAX2(This->dirty_box.z, 0); @@ -246,9 +247,9 @@ (void *)NineUnknown_AddRef, (void *)NineUnknown_Release, (void *)NineUnknown_GetDevice, /* actually part of Resource9 iface */ - (void *)NineResource9_SetPrivateData, - (void *)NineResource9_GetPrivateData, - (void *)NineResource9_FreePrivateData, + (void *)NineUnknown_SetPrivateData, + (void *)NineUnknown_GetPrivateData, + (void *)NineUnknown_FreePrivateData, (void *)NineResource9_SetPriority, (void *)NineResource9_GetPriority, (void *)NineBaseTexture9_PreLoad, diff -Nru mesa-12.0.6/src/gallium/state_trackers/omx/Makefile.in mesa-17.0.7/src/gallium/state_trackers/omx/Makefile.in --- mesa-12.0.6/src/gallium/state_trackers/omx/Makefile.in 2017-01-24 01:41:49.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/omx/Makefile.in 2017-06-01 10:37:21.000000000 +0000 @@ -111,10 +111,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -139,7 +142,7 @@ LTLIBRARIES = $(noinst_LTLIBRARIES) libomxtracker_la_LIBADD = am__objects_1 = entrypoint.lo vid_dec.lo vid_dec_mpeg12.lo \ - vid_dec_h264.lo vid_enc.lo + vid_dec_h264.lo vid_dec_h265.lo vid_enc.lo am_libomxtracker_la_OBJECTS = $(am__objects_1) libomxtracker_la_OBJECTS = $(am_libomxtracker_la_OBJECTS) AM_V_lt = $(am__v_lt_@AM_V@) @@ -215,6 +218,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -229,6 +234,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -258,10 +264,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -311,11 +318,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -355,8 +359,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -393,8 +395,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -403,7 +403,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -411,13 +410,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -446,6 +446,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -515,6 +516,7 @@ vid_dec.h \ vid_dec_mpeg12.c \ vid_dec_h264.c \ + vid_dec_h265.c \ vid_enc.c \ vid_enc.h @@ -565,12 +567,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -582,7 +580,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ $(GALLIUM_CFLAGS) \ $(VISIBILITY_CFLAGS) \ @@ -649,6 +647,7 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/entrypoint.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vid_dec.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vid_dec_h264.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vid_dec_h265.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vid_dec_mpeg12.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/vid_enc.Plo@am__quote@ diff -Nru mesa-12.0.6/src/gallium/state_trackers/omx/Makefile.sources mesa-17.0.7/src/gallium/state_trackers/omx/Makefile.sources --- mesa-12.0.6/src/gallium/state_trackers/omx/Makefile.sources 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/omx/Makefile.sources 2017-06-01 10:37:10.000000000 +0000 @@ -5,5 +5,6 @@ vid_dec.h \ vid_dec_mpeg12.c \ vid_dec_h264.c \ + vid_dec_h265.c \ vid_enc.c \ vid_enc.h diff -Nru mesa-12.0.6/src/gallium/state_trackers/omx/vid_dec.c mesa-17.0.7/src/gallium/state_trackers/omx/vid_dec.c --- mesa-12.0.6/src/gallium/state_trackers/omx/vid_dec.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/omx/vid_dec.c 2017-06-01 10:37:10.000000000 +0000 @@ -48,6 +48,7 @@ #include "pipe/p_video_codec.h" #include "util/u_memory.h" #include "util/u_surface.h" +#include "vl/vl_video_buffer.h" #include "vl/vl_vlc.h" #include "entrypoint.h" @@ -68,7 +69,7 @@ comp->componentVersion.s.nVersionMinor = 0; comp->componentVersion.s.nRevision = 0; comp->componentVersion.s.nStep = 1; - comp->name_specific_length = 2; + comp->name_specific_length = 3; comp->name = CALLOC(1, OMX_MAX_STRINGNAME_SIZE); if (comp->name == NULL) @@ -90,6 +91,10 @@ if (comp->name_specific[1] == NULL) goto error_specific; + comp->name_specific[2] = CALLOC(1, OMX_MAX_STRINGNAME_SIZE); + if (comp->name_specific[2] == NULL) + goto error_specific; + comp->role_specific[0] = CALLOC(1, OMX_MAX_STRINGNAME_SIZE); if (comp->role_specific[0] == NULL) goto error_specific; @@ -98,20 +103,28 @@ if (comp->role_specific[1] == NULL) goto error_specific; + comp->role_specific[2] = CALLOC(1, OMX_MAX_STRINGNAME_SIZE); + if (comp->role_specific[2] == NULL) + goto error_specific; + strcpy(comp->name, OMX_VID_DEC_BASE_NAME); strcpy(comp->name_specific[0], OMX_VID_DEC_MPEG2_NAME); strcpy(comp->name_specific[1], OMX_VID_DEC_AVC_NAME); + strcpy(comp->name_specific[2], OMX_VID_DEC_HEVC_NAME); strcpy(comp->role_specific[0], OMX_VID_DEC_MPEG2_ROLE); strcpy(comp->role_specific[1], OMX_VID_DEC_AVC_ROLE); + strcpy(comp->role_specific[2], OMX_VID_DEC_HEVC_ROLE); comp->constructor = vid_dec_Constructor; return OMX_ErrorNone; error_specific: + FREE(comp->role_specific[2]); FREE(comp->role_specific[1]); FREE(comp->role_specific[0]); + FREE(comp->name_specific[2]); FREE(comp->name_specific[1]); FREE(comp->name_specific[0]); @@ -150,6 +163,9 @@ if (!strcmp(name, OMX_VID_DEC_AVC_NAME)) priv->profile = PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH; + if (!strcmp(name, OMX_VID_DEC_HEVC_NAME)) + priv->profile = PIPE_VIDEO_PROFILE_HEVC_MAIN; + priv->BufferMgmtCallback = vid_dec_FrameDecoded; priv->messageHandler = vid_dec_MessageHandler; priv->destructor = vid_dec_Destructor; @@ -166,6 +182,19 @@ if (!priv->pipe) return OMX_ErrorInsufficientResources; + if (!vl_compositor_init(&priv->compositor, priv->pipe)) { + priv->pipe->destroy(priv->pipe); + priv->pipe = NULL; + return OMX_ErrorInsufficientResources; + } + + if (!vl_compositor_init_state(&priv->cstate, priv->pipe)) { + vl_compositor_cleanup(&priv->compositor); + priv->pipe->destroy(priv->pipe); + priv->pipe = NULL; + return OMX_ErrorInsufficientResources; + } + priv->sPortTypesParam[OMX_PortDomainVideo].nStartPortNumber = 0; priv->sPortTypesParam[OMX_PortDomainVideo].nPorts = 2; priv->ports = CALLOC(2, sizeof(omx_base_PortType *)); @@ -217,8 +246,11 @@ priv->ports=NULL; } - if (priv->pipe) + if (priv->pipe) { + vl_compositor_cleanup_state(&priv->cstate); + vl_compositor_cleanup(&priv->compositor); priv->pipe->destroy(priv->pipe); + } if (priv->screen) omx_put_screen(); @@ -273,6 +305,8 @@ priv->profile = PIPE_VIDEO_PROFILE_MPEG2_MAIN; } else if (!strcmp((char *)role->cRole, OMX_VID_DEC_AVC_ROLE)) { priv->profile = PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH; + } else if (!strcmp((char *)role->cRole, OMX_VID_DEC_HEVC_ROLE)) { + priv->profile = PIPE_VIDEO_PROFILE_HEVC_MAIN; } else { return OMX_ErrorBadParameter; } @@ -321,6 +355,8 @@ strcpy((char *)role->cRole, OMX_VID_DEC_MPEG2_ROLE); else if (priv->profile == PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH) strcpy((char *)role->cRole, OMX_VID_DEC_AVC_ROLE); + else if (priv->profile == PIPE_VIDEO_PROFILE_HEVC_MAIN) + strcpy((char *)role->cRole, OMX_VID_DEC_HEVC_ROLE); break; } @@ -366,6 +402,8 @@ vid_dec_mpeg12_Init(priv); else if (priv->profile == PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH) vid_dec_h264_Init(priv); + else if (priv->profile == PIPE_VIDEO_PROFILE_HEVC_MAIN) + vid_dec_h265_Init(priv); } else if ((msg->messageParam == OMX_StateLoaded) && (priv->state == OMX_StateIdle)) { if (priv->shadow) { @@ -385,16 +423,33 @@ void vid_dec_NeedTarget(vid_dec_PrivateType *priv) { struct pipe_video_buffer templat = {}; - omx_base_video_PortType *port; + struct vl_screen *omx_screen; + struct pipe_screen *pscreen; - port = (omx_base_video_PortType *)priv->ports[OMX_BASE_FILTER_INPUTPORT_INDEX]; + omx_screen = priv->screen; + assert(omx_screen); + + pscreen = omx_screen->pscreen; + assert(pscreen); if (!priv->target) { - templat.buffer_format = PIPE_FORMAT_NV12; + memset(&templat, 0, sizeof(templat)); + templat.chroma_format = PIPE_VIDEO_CHROMA_FORMAT_420; - templat.width = port->sPortParam.format.video.nFrameWidth; - templat.height = port->sPortParam.format.video.nFrameHeight; - templat.interlaced = false; + templat.width = priv->codec->width; + templat.height = priv->codec->height; + templat.buffer_format = pscreen->get_video_param( + pscreen, + PIPE_VIDEO_PROFILE_UNKNOWN, + PIPE_VIDEO_ENTRYPOINT_BITSTREAM, + PIPE_VIDEO_CAP_PREFERED_FORMAT + ); + templat.interlaced = pscreen->get_video_param( + pscreen, + PIPE_VIDEO_PROFILE_UNKNOWN, + PIPE_VIDEO_ENTRYPOINT_BITSTREAM, + PIPE_VIDEO_CAP_PREFERS_INTERLACED + ); priv->target = priv->pipe->create_video_buffer(priv->pipe, &templat); } } @@ -493,34 +548,63 @@ OMX_VIDEO_PORTDEFINITIONTYPE *def = &port->sPortParam.format.video; struct pipe_sampler_view **views; - struct pipe_transfer *transfer; - struct pipe_box box = { }; - uint8_t *src, *dst; + unsigned i, j; + unsigned width, height; views = buf->get_sampler_view_planes(buf); - dst = output->pBuffer; + for (i = 0; i < 2 /* NV12 */; i++) { + if (!views[i]) continue; + width = def->nFrameWidth; + height = def->nFrameHeight; + vl_video_buffer_adjust_size(&width, &height, i, buf->chroma_format, buf->interlaced); + for (j = 0; j < views[i]->texture->array_size; ++j) { + struct pipe_box box = {0, 0, j, width, height, 1}; + struct pipe_transfer *transfer; + uint8_t *map, *dst; + map = priv->pipe->transfer_map(priv->pipe, views[i]->texture, 0, + PIPE_TRANSFER_READ, &box, &transfer); + if (!map) + return; + + dst = ((uint8_t*)output->pBuffer + output->nOffset) + j * def->nStride + + i * def->nFrameWidth * def->nFrameHeight; + util_copy_rect(dst, + views[i]->texture->format, + def->nStride * views[i]->texture->array_size, 0, 0, + box.width, box.height, map, transfer->stride, 0, 0); + + pipe_transfer_unmap(priv->pipe, transfer); + } + } +} - box.width = def->nFrameWidth; - box.height = def->nFrameHeight; - box.depth = 1; - - src = priv->pipe->transfer_map(priv->pipe, views[0]->texture, 0, - PIPE_TRANSFER_READ, &box, &transfer); - util_copy_rect(dst, views[0]->texture->format, def->nStride, 0, 0, - box.width, box.height, src, transfer->stride, 0, 0); - pipe_transfer_unmap(priv->pipe, transfer); - - dst = ((uint8_t*)output->pBuffer) + (def->nStride * box.height); - - box.width = def->nFrameWidth / 2; - box.height = def->nFrameHeight / 2; - - src = priv->pipe->transfer_map(priv->pipe, views[1]->texture, 0, - PIPE_TRANSFER_READ, &box, &transfer); - util_copy_rect(dst, views[1]->texture->format, def->nStride, 0, 0, - box.width, box.height, src, transfer->stride, 0, 0); - pipe_transfer_unmap(priv->pipe, transfer); +static void vid_dec_deint(vid_dec_PrivateType *priv, struct pipe_video_buffer *src_buf, + struct pipe_video_buffer *dst_buf) +{ + struct vl_compositor *compositor = &priv->compositor; + struct vl_compositor_state *s = &priv->cstate; + struct pipe_surface **dst_surface; + struct u_rect dst_rect; + + dst_surface = dst_buf->get_surfaces(dst_buf); + vl_compositor_clear_layers(s); + + dst_rect.x0 = 0; + dst_rect.x1 = src_buf->width; + dst_rect.y0 = 0; + dst_rect.y1 = src_buf->height; + + vl_compositor_set_yuv_layer(s, compositor, 0, src_buf, NULL, NULL, true); + vl_compositor_set_layer_dst_area(s, 0, &dst_rect); + vl_compositor_render(s, compositor, dst_surface[0], NULL, false); + + dst_rect.x1 /= 2; + dst_rect.y1 /= 2; + + vl_compositor_set_yuv_layer(s, compositor, 0, src_buf, NULL, NULL, false); + vl_compositor_set_layer_dst_area(s, 0, &dst_rect); + vl_compositor_render(s, compositor, dst_surface[1], NULL, false); } static void vid_dec_FrameDecoded(OMX_COMPONENTTYPE *comp, OMX_BUFFERHEADERTYPE* input, @@ -537,8 +621,34 @@ } if (input->pInputPortPrivate) { - if (output->pInputPortPrivate) { - struct pipe_video_buffer *tmp = output->pOutputPortPrivate; + if (output->pInputPortPrivate && !priv->disable_tunnel) { + struct pipe_video_buffer *tmp, *vbuf, *new_vbuf; + + tmp = output->pOutputPortPrivate; + vbuf = input->pInputPortPrivate; + if (vbuf->interlaced) { + /* re-allocate the progressive buffer */ + omx_base_video_PortType *port; + struct pipe_video_buffer templat = {}; + + port = (omx_base_video_PortType *) + priv->ports[OMX_BASE_FILTER_INPUTPORT_INDEX]; + memset(&templat, 0, sizeof(templat)); + templat.chroma_format = PIPE_VIDEO_CHROMA_FORMAT_420; + templat.width = port->sPortParam.format.video.nFrameWidth; + templat.height = port->sPortParam.format.video.nFrameHeight; + templat.buffer_format = PIPE_FORMAT_NV12; + templat.interlaced = false; + new_vbuf = priv->pipe->create_video_buffer(priv->pipe, &templat); + + /* convert the interlaced to the progressive */ + vid_dec_deint(priv, input->pInputPortPrivate, new_vbuf); + priv->pipe->flush(priv->pipe, NULL, 0); + + /* set the progrssive buffer for next round */ + vbuf->destroy(vbuf); + input->pInputPortPrivate = new_vbuf; + } output->pOutputPortPrivate = input->pInputPortPrivate; input->pInputPortPrivate = tmp; } else { diff -Nru mesa-12.0.6/src/gallium/state_trackers/omx/vid_dec.h mesa-17.0.7/src/gallium/state_trackers/omx/vid_dec.h --- mesa-12.0.6/src/gallium/state_trackers/omx/vid_dec.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/omx/vid_dec.h 2017-06-01 10:37:10.000000000 +0000 @@ -51,6 +51,8 @@ #include "os/os_thread.h" #include "util/list.h" +#include "vl/vl_compositor.h" + #define OMX_VID_DEC_BASE_NAME "OMX.mesa.video_decoder" #define OMX_VID_DEC_MPEG2_NAME "OMX.mesa.video_decoder.mpeg2" @@ -59,6 +61,9 @@ #define OMX_VID_DEC_AVC_NAME "OMX.mesa.video_decoder.avc" #define OMX_VID_DEC_AVC_ROLE "video_decoder.avc" +#define OMX_VID_DEC_HEVC_NAME "OMX.mesa.video_decoder.hevc" +#define OMX_VID_DEC_HEVC_ROLE "video_decoder.hevc" + #define OMX_VID_DEC_TIMESTAMP_INVALID ((OMX_TICKS) -1) struct vl_vlc; @@ -92,11 +97,26 @@ struct list_head dpb_list; \ unsigned dpb_num; \ } h264; \ + struct { \ + unsigned temporal_id; \ + unsigned level_idc; \ + unsigned pic_width_in_luma_samples; \ + unsigned pic_height_in_luma_samples; \ + bool IdrPicFlag; \ + int slice_prev_poc; \ + void *ref_pic_set_list; \ + void *rps; \ + struct pipe_h265_sps sps[16]; \ + struct pipe_h265_pps pps[64]; \ + struct list_head dpb_list; \ + unsigned dpb_num; \ + } h265; \ } codec_data; \ union { \ struct pipe_picture_desc base; \ struct pipe_mpeg12_picture_desc mpeg12; \ struct pipe_h264_picture_desc h264; \ + struct pipe_h265_picture_desc h265; \ } picture; \ unsigned num_in_buffers; \ OMX_BUFFERHEADERTYPE *in_buffers[2]; \ @@ -108,7 +128,10 @@ bool frame_finished; \ bool frame_started; \ unsigned bytes_left; \ - const void *slice; + const void *slice; \ + bool disable_tunnel; \ + struct vl_compositor compositor; \ + struct vl_compositor_state cstate; ENDCLASS(vid_dec_PrivateType) OMX_ERRORTYPE vid_dec_LoaderComponent(stLoaderComponentType *comp); @@ -122,4 +145,7 @@ /* vid_dec_h264.c */ void vid_dec_h264_Init(vid_dec_PrivateType *priv); +/* vid_dec_h265.c */ +void vid_dec_h265_Init(vid_dec_PrivateType *priv); + #endif diff -Nru mesa-12.0.6/src/gallium/state_trackers/omx/vid_dec_h264.c mesa-17.0.7/src/gallium/state_trackers/omx/vid_dec_h264.c --- mesa-12.0.6/src/gallium/state_trackers/omx/vid_dec_h264.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/omx/vid_dec_h264.c 2017-06-01 10:37:10.000000000 +0000 @@ -46,39 +46,39 @@ struct list_head list; struct pipe_video_buffer *buffer; OMX_TICKS timestamp; - unsigned poc; + int poc; }; static const uint8_t Default_4x4_Intra[16] = { - 6, 13, 13, 20, 20, 20, 28, 28, - 28, 28, 32, 32, 32, 37, 37, 42 + 6, 13, 20, 28, 13, 20, 28, 32, + 20, 28, 32, 37, 28, 32, 37, 42 }; static const uint8_t Default_4x4_Inter[16] = { - 10, 14, 14, 20, 20, 20, 24, 24, - 24, 24, 27, 27, 27, 30, 30, 34 + 10, 14, 20, 24, 14, 20, 24, 27, + 20, 24, 27, 30, 24, 27, 30, 34 }; static const uint8_t Default_8x8_Intra[64] = { - 6, 10, 10, 13, 11, 13, 16, 16, - 16, 16, 18, 18, 18, 18, 18, 23, - 23, 23, 23, 23, 23, 25, 25, 25, - 25, 25, 25, 25, 27, 27, 27, 27, - 27, 27, 27, 27, 29, 29, 29, 29, - 29, 29, 29, 31, 31, 31, 31, 31, - 31, 33, 33, 33, 33, 33, 36, 36, - 36, 36, 38, 38, 38, 40, 40, 42 + 6, 10, 13, 16, 18, 23, 25, 27, + 10, 11, 16, 18, 23, 25, 27, 29, + 13, 16, 18, 23, 25, 27, 29, 31, + 16, 18, 23, 25, 27, 29, 31, 33, + 18, 23, 25, 27, 29, 31, 33, 36, + 23, 25, 27, 29, 31, 33, 36, 38, + 25, 27, 29, 31, 33, 36, 38, 40, + 27, 29, 31, 33, 36, 38, 40, 42 }; static const uint8_t Default_8x8_Inter[64] = { - 9, 13, 13, 15, 13, 15, 17, 17, - 17, 17, 19, 19, 19, 19, 19, 21, - 21, 21, 21, 21, 21, 22, 22, 22, - 22, 22, 22, 22, 24, 24, 24, 24, - 24, 24, 24, 24, 25, 25, 25, 25, - 25, 25, 25, 27, 27, 27, 27, 27, - 27, 28, 28, 28, 28, 28, 30, 30, - 30, 30, 32, 32, 32, 33, 33, 35 + 9, 13, 15, 17, 19, 21, 22, 24, + 13, 13, 17, 19, 21, 22, 24, 25, + 15, 17, 19, 21, 22, 24, 25, 27, + 17, 19, 21, 22, 24, 25, 27, 28, + 19, 21, 22, 24, 25, 27, 28, 30, + 21, 22, 24, 25, 27, 28, 30, 32, + 22, 24, 25, 27, 28, 30, 32, 33, + 24, 25, 27, 28, 30, 32, 33, 35 }; static void vid_dec_h264_Decode(vid_dec_PrivateType *priv, struct vl_vlc *vlc, unsigned min_bits_left); @@ -105,13 +105,6 @@ if (priv->frame_started) return; - vid_dec_NeedTarget(priv); - if (priv->first_buf_in_frame) - priv->timestamp = priv->timestamps[0]; - priv->first_buf_in_frame = false; - - priv->picture.h264.num_ref_frames = priv->picture.h264.pps->sps->max_num_ref_frames; - if (!priv->codec) { struct pipe_video_codec templat = {}; omx_base_video_PortType *port; @@ -128,6 +121,16 @@ priv->codec = priv->pipe->create_video_codec(priv->pipe, &templat); } + + vid_dec_NeedTarget(priv); + + if (priv->first_buf_in_frame) + priv->timestamp = priv->timestamps[0]; + priv->first_buf_in_frame = false; + + priv->picture.h264.num_ref_frames = priv->picture.h264.pps->sps->max_num_ref_frames; + + priv->picture.h264.slice_count = 0; priv->codec->begin_frame(priv->codec, priv->target, &priv->picture.base); priv->frame_started = true; } @@ -734,8 +737,8 @@ if (sps->pic_order_cnt_type == 0) { unsigned log2_max_pic_order_cnt_lsb = sps->log2_max_pic_order_cnt_lsb_minus4 + 4; unsigned max_pic_order_cnt_lsb = 1 << log2_max_pic_order_cnt_lsb; - unsigned pic_order_cnt_lsb = vl_rbsp_u(rbsp, log2_max_pic_order_cnt_lsb); - unsigned pic_order_cnt_msb; + int pic_order_cnt_lsb = vl_rbsp_u(rbsp, log2_max_pic_order_cnt_lsb); + int pic_order_cnt_msb; if (pic_order_cnt_lsb != priv->codec_data.h264.pic_order_cnt_lsb) vid_dec_h264_EndFrame(priv); @@ -961,6 +964,7 @@ if (priv->slice) { unsigned bytes = priv->bytes_left - (vl_vlc_bits_left(vlc) / 8); + ++priv->picture.h264.slice_count; priv->codec->decode_bitstream(priv->codec, priv->target, &priv->picture.base, 1, &priv->slice, &bytes); priv->slice = NULL; @@ -1018,6 +1022,7 @@ vid_dec_h264_BeginFrame(priv); + ++priv->picture.h264.slice_count; priv->codec->decode_bitstream(priv->codec, priv->target, &priv->picture.base, 1, &ptr, &bytes); } diff -Nru mesa-12.0.6/src/gallium/state_trackers/omx/vid_dec_h265.c mesa-17.0.7/src/gallium/state_trackers/omx/vid_dec_h265.c --- mesa-12.0.6/src/gallium/state_trackers/omx/vid_dec_h265.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/omx/vid_dec_h265.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,1013 @@ +/************************************************************************** + * + * Copyright 2016 Advanced Micro Devices, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#include "pipe/p_video_codec.h" +#include "util/u_memory.h" +#include "util/u_video.h" +#include "vl/vl_rbsp.h" + +#include "entrypoint.h" +#include "vid_dec.h" + +#define DPB_MAX_SIZE 32 +#define MAX_NUM_REF_PICS 16 + +enum { + NAL_UNIT_TYPE_TRAIL_N = 0, + NAL_UNIT_TYPE_TRAIL_R = 1, + NAL_UNIT_TYPE_TSA_N = 2, + NAL_UNIT_TYPE_TSA_R = 3, + NAL_UNIT_TYPE_STSA_N = 4, + NAL_UNIT_TYPE_STSA_R = 5, + NAL_UNIT_TYPE_RADL_N = 6, + NAL_UNIT_TYPE_RADL_R = 7, + NAL_UNIT_TYPE_RASL_N = 8, + NAL_UNIT_TYPE_RASL_R = 9, + NAL_UNIT_TYPE_BLA_W_LP = 16, + NAL_UNIT_TYPE_BLA_W_RADL = 17, + NAL_UNIT_TYPE_BLA_N_LP = 18, + NAL_UNIT_TYPE_IDR_W_RADL = 19, + NAL_UNIT_TYPE_IDR_N_LP = 20, + NAL_UNIT_TYPE_CRA = 21, + NAL_UNIT_TYPE_SPS = 33, + NAL_UNIT_TYPE_PPS = 34, +}; + +static const uint8_t Default_8x8_Intra[64] = { + 16, 16, 16, 16, 17, 18, 21, 24, + 16, 16, 16, 16, 17, 19, 22, 25, + 16, 16, 17, 18, 20, 22, 25, 29, + 16, 16, 18, 21, 24, 27, 31, 36, + 17, 17, 20, 24, 30, 35, 41, 47, + 18, 19, 22, 27, 35, 44, 54, 65, + 21, 22, 25, 31, 41, 54, 70, 88, + 24, 25, 29, 36, 47, 65, 88, 115 +}; + +static const uint8_t Default_8x8_Inter[64] = { + 16, 16, 16, 16, 17, 18, 20, 24, + 16, 16, 16, 17, 18, 20, 24, 25, + 16, 16, 17, 18, 20, 24, 25, 28, + 16, 17, 18, 20, 24, 25, 28, 33, + 17, 18, 20, 24, 25, 28, 33, 41, + 18, 20, 24, 25, 28, 33, 41, 54, + 20, 24, 25, 28, 33, 41, 54, 71, + 24, 25, 28, 33, 41, 54, 71, 91 +}; + +struct dpb_list { + struct list_head list; + struct pipe_video_buffer *buffer; + OMX_TICKS timestamp; + unsigned poc; +}; + +struct ref_pic_set { + unsigned num_pics; + unsigned num_neg_pics; + unsigned num_pos_pics; + unsigned num_delta_poc; + int delta_poc[MAX_NUM_REF_PICS]; + bool used[MAX_NUM_REF_PICS]; +}; + +static bool is_idr_picture(unsigned nal_unit_type) +{ + return (nal_unit_type == NAL_UNIT_TYPE_IDR_W_RADL || + nal_unit_type == NAL_UNIT_TYPE_IDR_N_LP); +} + +/* broken link access picture */ +static bool is_bla_picture(unsigned nal_unit_type) +{ + return (nal_unit_type == NAL_UNIT_TYPE_BLA_W_LP || + nal_unit_type == NAL_UNIT_TYPE_BLA_W_RADL || + nal_unit_type == NAL_UNIT_TYPE_BLA_N_LP); +} + +/* random access point picture */ +static bool is_rap_picture(unsigned nal_unit_type) +{ + return (nal_unit_type >= NAL_UNIT_TYPE_BLA_W_LP && + nal_unit_type <= NAL_UNIT_TYPE_CRA); +} + +static bool is_slice_picture(unsigned nal_unit_type) +{ + return (nal_unit_type <= NAL_UNIT_TYPE_RASL_R || + is_rap_picture(nal_unit_type)); +} + +static void set_poc(vid_dec_PrivateType *priv, + unsigned nal_unit_type, int i) +{ + priv->picture.h265.CurrPicOrderCntVal = i; + + if (priv->codec_data.h265.temporal_id == 0 && + (nal_unit_type == NAL_UNIT_TYPE_TRAIL_R || + nal_unit_type == NAL_UNIT_TYPE_TSA_R || + nal_unit_type == NAL_UNIT_TYPE_STSA_R || + is_rap_picture(nal_unit_type))) + priv->codec_data.h265.slice_prev_poc = i; +} + +static unsigned get_poc(vid_dec_PrivateType *priv) +{ + return priv->picture.h265.CurrPicOrderCntVal; +} + +static void profile_tier(struct vl_rbsp *rbsp) +{ + int i; + + /* general_profile_space */ + vl_rbsp_u(rbsp, 2); + + /* general_tier_flag */ + vl_rbsp_u(rbsp, 1); + + /* general_profile_idc */ + vl_rbsp_u(rbsp, 5); + + /* general_profile_compatibility_flag */ + for(i = 0; i < 32; ++i) + vl_rbsp_u(rbsp, 1); + + /* general_progressive_source_flag */ + vl_rbsp_u(rbsp, 1); + + /* general_interlaced_source_flag */ + vl_rbsp_u(rbsp, 1); + + /* general_non_packed_constraint_flag */ + vl_rbsp_u(rbsp, 1); + + /* general_frame_only_constraint_flag */ + vl_rbsp_u(rbsp, 1); + + /* general_reserved_zero_44bits */ + vl_rbsp_u(rbsp, 16); + vl_rbsp_u(rbsp, 16); + vl_rbsp_u(rbsp, 12); +} + +static unsigned profile_tier_level(struct vl_rbsp *rbsp, + int max_sublayers_minus1) +{ + bool sub_layer_profile_present_flag[6]; + bool sub_layer_level_present_flag[6]; + unsigned level_idc; + int i; + + profile_tier(rbsp); + + /* general_level_idc */ + level_idc = vl_rbsp_u(rbsp, 8); + + for (i = 0; i < max_sublayers_minus1; ++i) { + sub_layer_profile_present_flag[i] = vl_rbsp_u(rbsp, 1); + sub_layer_level_present_flag[i] = vl_rbsp_u(rbsp, 1); + } + + if (max_sublayers_minus1 > 0) + for (i = max_sublayers_minus1; i < 8; ++i) + /* reserved_zero_2bits */ + vl_rbsp_u(rbsp, 2); + + for (i = 0; i < max_sublayers_minus1; ++i) { + if (sub_layer_profile_present_flag[i]) + profile_tier(rbsp); + + if (sub_layer_level_present_flag[i]) + /* sub_layer_level_idc */ + vl_rbsp_u(rbsp, 8); + } + + return level_idc; +} + +static void scaling_list_data(vid_dec_PrivateType *priv, + struct vl_rbsp *rbsp, struct pipe_h265_sps *sps) +{ + unsigned size_id, matrix_id; + unsigned scaling_list_len[4] = { 16, 64, 64, 64 }; + uint8_t scaling_list4x4[6][64] = { }; + int i; + + uint8_t (*scaling_list_data[4])[6][64] = { + (uint8_t (*)[6][64])scaling_list4x4, + (uint8_t (*)[6][64])sps->ScalingList8x8, + (uint8_t (*)[6][64])sps->ScalingList16x16, + (uint8_t (*)[6][64])sps->ScalingList32x32 + }; + uint8_t (*scaling_list_dc_coeff[2])[6] = { + (uint8_t (*)[6])sps->ScalingListDCCoeff16x16, + (uint8_t (*)[6])sps->ScalingListDCCoeff32x32 + }; + + for (size_id = 0; size_id < 4; ++size_id) { + + for (matrix_id = 0; matrix_id < ((size_id == 3) ? 2 : 6); ++matrix_id) { + bool scaling_list_pred_mode_flag = vl_rbsp_u(rbsp, 1); + + if (!scaling_list_pred_mode_flag) { + /* scaling_list_pred_matrix_id_delta */; + unsigned matrix_id_with_delta = matrix_id - vl_rbsp_ue(rbsp); + + if (matrix_id != matrix_id_with_delta) { + memcpy((*scaling_list_data[size_id])[matrix_id], + (*scaling_list_data[size_id])[matrix_id_with_delta], + scaling_list_len[size_id]); + if (size_id > 1) + (*scaling_list_dc_coeff[size_id - 2])[matrix_id] = + (*scaling_list_dc_coeff[size_id - 2])[matrix_id_with_delta]; + } else { + const uint8_t *d; + + if (size_id == 0) + memset((*scaling_list_data[0])[matrix_id], 16, 16); + else { + if (size_id < 3) + d = (matrix_id < 3) ? Default_8x8_Intra : Default_8x8_Inter; + else + d = (matrix_id < 1) ? Default_8x8_Intra : Default_8x8_Inter; + memcpy((*scaling_list_data[size_id])[matrix_id], d, + scaling_list_len[size_id]); + } + if (size_id > 1) + (*scaling_list_dc_coeff[size_id - 2])[matrix_id] = 16; + } + } else { + int next_coef = 8; + int coef_num = MIN2(64, (1 << (4 + (size_id << 1)))); + + if (size_id > 1) { + /* scaling_list_dc_coef_minus8 */ + next_coef = vl_rbsp_se(rbsp) + 8; + (*scaling_list_dc_coeff[size_id - 2])[matrix_id] = next_coef; + } + + for (i = 0; i < coef_num; ++i) { + /* scaling_list_delta_coef */ + next_coef = (next_coef + vl_rbsp_se(rbsp) + 256) % 256; + (*scaling_list_data[size_id])[matrix_id][i] = next_coef; + } + } + } + } + + for (i = 0; i < 6; ++i) + memcpy(sps->ScalingList4x4[i], scaling_list4x4[i], 16); + + return; +} + +static void st_ref_pic_set(vid_dec_PrivateType *priv, struct vl_rbsp *rbsp, + struct ref_pic_set *rps, struct pipe_h265_sps *sps, + unsigned idx) +{ + bool inter_rps_pred_flag; + unsigned delta_idx_minus1; + int delta_poc; + int i; + + inter_rps_pred_flag = (idx != 0) ? (vl_rbsp_u(rbsp, 1)) : false; + + if (inter_rps_pred_flag) { + struct ref_pic_set *ref_rps; + unsigned sign, abs; + int delta_rps; + bool used; + int j; + + if (idx == sps->num_short_term_ref_pic_sets) + delta_idx_minus1 = vl_rbsp_ue(rbsp); + else + delta_idx_minus1 = 0; + + ref_rps = (struct ref_pic_set *) + priv->codec_data.h265.ref_pic_set_list + idx - (delta_idx_minus1 + 1); + + /* delta_rps_sign */ + sign = vl_rbsp_u(rbsp, 1); + /* abs_delta_rps_minus1 */ + abs = vl_rbsp_ue(rbsp); + delta_rps = (1 - 2 * sign) * (abs + 1); + + rps->num_neg_pics = 0; + rps->num_pos_pics = 0; + rps->num_pics = 0; + + for(i = 0 ; i <= ref_rps->num_pics; ++i) { + /* used_by_curr_pic_flag */ + if (!vl_rbsp_u(rbsp, 1)) + /* use_delta_flag */ + vl_rbsp_u(rbsp, 1); + else { + delta_poc = delta_rps + + ((i < ref_rps->num_pics)? ref_rps->delta_poc[i] : 0); + rps->delta_poc[rps->num_pics] = delta_poc; + rps->used[rps->num_pics] = true; + if (delta_poc < 0) + rps->num_neg_pics++; + else + rps->num_pos_pics++; + rps->num_pics++; + } + } + + rps->num_delta_poc = ref_rps->num_pics; + + /* sort delta poc */ + for (i = 1; i < rps->num_pics; ++i) { + delta_poc = rps->delta_poc[i]; + used = rps->used[i]; + for (j = i - 1; j >= 0; j--) { + if (delta_poc < rps->delta_poc[j]) { + rps->delta_poc[j + 1] = rps->delta_poc[j]; + rps->used[j + 1] = rps->used[j]; + rps->delta_poc[j] = delta_poc; + rps->used[j] = used; + } + } + } + + for (i = 0 , j = rps->num_neg_pics - 1; + i < rps->num_neg_pics >> 1; i++, j--) { + delta_poc = rps->delta_poc[i]; + used = rps->used[i]; + rps->delta_poc[i] = rps->delta_poc[j]; + rps->used[i] = rps->used[j]; + rps->delta_poc[j] = delta_poc; + rps->used[j] = used; + } + } else { + /* num_negative_pics */ + rps->num_neg_pics = vl_rbsp_ue(rbsp); + /* num_positive_pics */ + rps->num_pos_pics = vl_rbsp_ue(rbsp); + rps->num_pics = rps->num_neg_pics + rps->num_pos_pics; + + delta_poc = 0; + for(i = 0 ; i < rps->num_neg_pics; ++i) { + /* delta_poc_s0_minus1 */ + delta_poc -= (vl_rbsp_ue(rbsp) + 1); + rps->delta_poc[i] = delta_poc; + /* used_by_curr_pic_s0_flag */ + rps->used[i] = vl_rbsp_u(rbsp, 1); + } + + delta_poc = 0; + for(i = rps->num_neg_pics; i < rps->num_pics; ++i) { + /* delta_poc_s1_minus1 */ + delta_poc += (vl_rbsp_ue(rbsp) + 1); + rps->delta_poc[i] = delta_poc; + /* used_by_curr_pic_s1_flag */ + rps->used[i] = vl_rbsp_u(rbsp, 1); + } + } +} + +static struct pipe_h265_sps *seq_parameter_set_id(vid_dec_PrivateType *priv, + struct vl_rbsp *rbsp) +{ + unsigned id = vl_rbsp_ue(rbsp); + + if (id >= ARRAY_SIZE(priv->codec_data.h265.sps)) + return NULL; + + return &priv->codec_data.h265.sps[id]; +} + +static void seq_parameter_set(vid_dec_PrivateType *priv, struct vl_rbsp *rbsp) +{ + struct pipe_h265_sps *sps; + int sps_max_sub_layers_minus1; + unsigned i; + + /* sps_video_parameter_set_id */ + vl_rbsp_u(rbsp, 4); + + /* sps_max_sub_layers_minus1 */ + sps_max_sub_layers_minus1 = vl_rbsp_u(rbsp, 3); + + assert(sps_max_sub_layers_minus1 <= 6); + + /* sps_temporal_id_nesting_flag */ + vl_rbsp_u(rbsp, 1); + + priv->codec_data.h265.level_idc = + profile_tier_level(rbsp, sps_max_sub_layers_minus1); + + sps = seq_parameter_set_id(priv, rbsp); + if (!sps) + return; + + memset(sps, 0, sizeof(*sps)); + + sps->chroma_format_idc = vl_rbsp_ue(rbsp); + + if (sps->chroma_format_idc == 3) + sps->separate_colour_plane_flag = vl_rbsp_u(rbsp, 1); + + priv->codec_data.h265.pic_width_in_luma_samples = + sps->pic_width_in_luma_samples = vl_rbsp_ue(rbsp); + + priv->codec_data.h265.pic_height_in_luma_samples = + sps->pic_height_in_luma_samples = vl_rbsp_ue(rbsp); + + /* conformance_window_flag */ + if (vl_rbsp_u(rbsp, 1)) { + /* conf_win_left_offset */ + vl_rbsp_ue(rbsp); + /* conf_win_right_offset */ + vl_rbsp_ue(rbsp); + /* conf_win_top_offset */ + vl_rbsp_ue(rbsp); + /* conf_win_bottom_offset */ + vl_rbsp_ue(rbsp); + } + + sps->bit_depth_luma_minus8 = vl_rbsp_ue(rbsp); + sps->bit_depth_chroma_minus8 = vl_rbsp_ue(rbsp); + sps->log2_max_pic_order_cnt_lsb_minus4 = vl_rbsp_ue(rbsp); + + /* sps_sub_layer_ordering_info_present_flag */ + i = vl_rbsp_u(rbsp, 1) ? 0 : sps_max_sub_layers_minus1; + for (; i <= sps_max_sub_layers_minus1; ++i) { + sps->sps_max_dec_pic_buffering_minus1 = vl_rbsp_ue(rbsp); + /* sps_max_num_reorder_pics */ + vl_rbsp_ue(rbsp); + /* sps_max_latency_increase_plus */ + vl_rbsp_ue(rbsp); + } + + sps->log2_min_luma_coding_block_size_minus3 = vl_rbsp_ue(rbsp); + sps->log2_diff_max_min_luma_coding_block_size = vl_rbsp_ue(rbsp); + sps->log2_min_transform_block_size_minus2 = vl_rbsp_ue(rbsp); + sps->log2_diff_max_min_transform_block_size = vl_rbsp_ue(rbsp); + sps->max_transform_hierarchy_depth_inter = vl_rbsp_ue(rbsp); + sps->max_transform_hierarchy_depth_intra = vl_rbsp_ue(rbsp); + + sps->scaling_list_enabled_flag = vl_rbsp_u(rbsp, 1); + if (sps->scaling_list_enabled_flag) + /* sps_scaling_list_data_present_flag */ + if (vl_rbsp_u(rbsp, 1)) + scaling_list_data(priv, rbsp, sps); + + sps->amp_enabled_flag = vl_rbsp_u(rbsp, 1); + sps->sample_adaptive_offset_enabled_flag = vl_rbsp_u(rbsp, 1); + sps->pcm_enabled_flag = vl_rbsp_u(rbsp, 1); + if (sps->pcm_enabled_flag) { + sps->pcm_sample_bit_depth_luma_minus1 = vl_rbsp_u(rbsp, 4); + sps->pcm_sample_bit_depth_chroma_minus1 = vl_rbsp_u(rbsp, 4); + sps->log2_min_pcm_luma_coding_block_size_minus3 = vl_rbsp_ue(rbsp); + sps->log2_diff_max_min_pcm_luma_coding_block_size = vl_rbsp_ue(rbsp); + sps->pcm_loop_filter_disabled_flag = vl_rbsp_u(rbsp, 1); + } + + sps->num_short_term_ref_pic_sets = vl_rbsp_ue(rbsp); + + for (i = 0; i < sps->num_short_term_ref_pic_sets; ++i) { + struct ref_pic_set *rps; + + rps = (struct ref_pic_set *) + priv->codec_data.h265.ref_pic_set_list + i; + st_ref_pic_set(priv, rbsp, rps, sps, i); + } + + sps->long_term_ref_pics_present_flag = vl_rbsp_u(rbsp, 1); + if (sps->long_term_ref_pics_present_flag) { + sps->num_long_term_ref_pics_sps = vl_rbsp_ue(rbsp); + for (i = 0; i < sps->num_long_term_ref_pics_sps; ++i) { + /* lt_ref_pic_poc_lsb_sps */ + vl_rbsp_u(rbsp, sps->log2_max_pic_order_cnt_lsb_minus4 + 4); + /* used_by_curr_pic_lt_sps_flag */ + vl_rbsp_u(rbsp, 1); + } + } + + sps->sps_temporal_mvp_enabled_flag = vl_rbsp_u(rbsp, 1); + sps->strong_intra_smoothing_enabled_flag = vl_rbsp_u(rbsp, 1); +} + +static struct pipe_h265_pps *pic_parameter_set_id(vid_dec_PrivateType *priv, + struct vl_rbsp *rbsp) +{ + unsigned id = vl_rbsp_ue(rbsp); + + if (id >= ARRAY_SIZE(priv->codec_data.h265.pps)) + return NULL; + + return &priv->codec_data.h265.pps[id]; +} + +static void picture_parameter_set(vid_dec_PrivateType *priv, + struct vl_rbsp *rbsp) +{ + struct pipe_h265_sps *sps; + struct pipe_h265_pps *pps; + int i; + + pps = pic_parameter_set_id(priv, rbsp); + if (!pps) + return; + + memset(pps, 0, sizeof(*pps)); + sps = pps->sps = seq_parameter_set_id(priv, rbsp); + if (!sps) + return; + + pps->dependent_slice_segments_enabled_flag = vl_rbsp_u(rbsp, 1); + pps->output_flag_present_flag = vl_rbsp_u(rbsp, 1); + pps->num_extra_slice_header_bits = vl_rbsp_u(rbsp, 3); + pps->sign_data_hiding_enabled_flag = vl_rbsp_u(rbsp, 1); + pps->cabac_init_present_flag = vl_rbsp_u(rbsp, 1); + + pps->num_ref_idx_l0_default_active_minus1 = vl_rbsp_ue(rbsp); + pps->num_ref_idx_l1_default_active_minus1 = vl_rbsp_ue(rbsp); + pps->init_qp_minus26 = vl_rbsp_se(rbsp); + pps->constrained_intra_pred_flag = vl_rbsp_u(rbsp, 1); + pps->transform_skip_enabled_flag = vl_rbsp_u(rbsp, 1); + + pps->cu_qp_delta_enabled_flag = vl_rbsp_u(rbsp, 1); + if (pps->cu_qp_delta_enabled_flag) + pps->diff_cu_qp_delta_depth = vl_rbsp_ue(rbsp); + + pps->pps_cb_qp_offset = vl_rbsp_se(rbsp); + pps->pps_cr_qp_offset = vl_rbsp_se(rbsp); + pps->pps_slice_chroma_qp_offsets_present_flag = vl_rbsp_u(rbsp, 1); + + pps->weighted_pred_flag = vl_rbsp_u(rbsp, 1); + pps->weighted_bipred_flag = vl_rbsp_u(rbsp, 1); + + pps->transquant_bypass_enabled_flag = vl_rbsp_u(rbsp, 1); + pps->tiles_enabled_flag = vl_rbsp_u(rbsp, 1); + pps->entropy_coding_sync_enabled_flag = vl_rbsp_u(rbsp, 1); + + if (pps->tiles_enabled_flag) { + pps->num_tile_columns_minus1 = vl_rbsp_ue(rbsp); + pps->num_tile_rows_minus1 = vl_rbsp_ue(rbsp); + + pps->uniform_spacing_flag = vl_rbsp_u(rbsp, 1); + if (!pps->uniform_spacing_flag) { + for (i = 0; i < pps->num_tile_columns_minus1; ++i) + pps->column_width_minus1[i] = vl_rbsp_ue(rbsp); + + for (i = 0; i < pps->num_tile_rows_minus1; ++i) + pps->row_height_minus1[i] = vl_rbsp_ue(rbsp); + } + + if (!pps->num_tile_columns_minus1 || !pps->num_tile_rows_minus1) + pps->loop_filter_across_tiles_enabled_flag = vl_rbsp_u(rbsp, 1); + } + + pps->pps_loop_filter_across_slices_enabled_flag = vl_rbsp_u(rbsp, 1); + + pps->deblocking_filter_control_present_flag = vl_rbsp_u(rbsp, 1); + if (pps->deblocking_filter_control_present_flag) { + pps->deblocking_filter_override_enabled_flag = vl_rbsp_u(rbsp, 1); + pps->pps_deblocking_filter_disabled_flag = vl_rbsp_u(rbsp, 1); + if (!pps->pps_deblocking_filter_disabled_flag) { + pps->pps_beta_offset_div2 = vl_rbsp_se(rbsp); + pps->pps_tc_offset_div2 = vl_rbsp_se(rbsp); + } + } + + /* pps_scaling_list_data_present_flag */ + if (vl_rbsp_u(rbsp, 1)) + scaling_list_data(priv, rbsp, sps); + + pps->lists_modification_present_flag = vl_rbsp_u(rbsp, 1); + pps->log2_parallel_merge_level_minus2 = vl_rbsp_ue(rbsp); + pps->slice_segment_header_extension_present_flag = vl_rbsp_u(rbsp, 1); +} + +static void vid_dec_h265_BeginFrame(vid_dec_PrivateType *priv) +{ + if (priv->frame_started) + return; + + if (!priv->codec) { + struct pipe_video_codec templat = {}; + omx_base_video_PortType *port = (omx_base_video_PortType *) + priv->ports[OMX_BASE_FILTER_INPUTPORT_INDEX]; + + templat.profile = priv->profile; + templat.entrypoint = PIPE_VIDEO_ENTRYPOINT_BITSTREAM; + templat.chroma_format = PIPE_VIDEO_CHROMA_FORMAT_420; + templat.expect_chunked_decode = true; + templat.width = priv->codec_data.h265.pic_width_in_luma_samples; + templat.height = priv->codec_data.h265.pic_height_in_luma_samples; + templat.level = priv->codec_data.h265.level_idc; + priv->codec = priv->pipe->create_video_codec(priv->pipe, &templat); + + /* disable transcode tunnel if video size is different from coded size */ + if (priv->codec_data.h265.pic_width_in_luma_samples != + port->sPortParam.format.video.nFrameWidth || + priv->codec_data.h265.pic_height_in_luma_samples != + port->sPortParam.format.video.nFrameHeight) + priv->disable_tunnel = true; + } + + vid_dec_NeedTarget(priv); + + if (priv->first_buf_in_frame) + priv->timestamp = priv->timestamps[0]; + priv->first_buf_in_frame = false; + + priv->codec->begin_frame(priv->codec, priv->target, &priv->picture.base); + priv->frame_started = true; +} + +static struct pipe_video_buffer *vid_dec_h265_Flush(vid_dec_PrivateType *priv, + OMX_TICKS *timestamp) +{ + struct dpb_list *entry, *result = NULL; + struct pipe_video_buffer *buf; + + /* search for the lowest poc and break on zeros */ + LIST_FOR_EACH_ENTRY(entry, &priv->codec_data.h265.dpb_list, list) { + + if (result && entry->poc == 0) + break; + + if (!result || entry->poc < result->poc) + result = entry; + } + + if (!result) + return NULL; + + buf = result->buffer; + if (timestamp) + *timestamp = result->timestamp; + + --priv->codec_data.h265.dpb_num; + LIST_DEL(&result->list); + FREE(result); + + return buf; +} + +static void vid_dec_h265_EndFrame(vid_dec_PrivateType *priv) +{ + struct dpb_list *entry = NULL; + struct pipe_video_buffer *tmp; + struct ref_pic_set *rps; + int i; + OMX_TICKS timestamp; + + if (!priv->frame_started) + return; + + priv->picture.h265.NumPocStCurrBefore = 0; + priv->picture.h265.NumPocStCurrAfter = 0; + memset(priv->picture.h265.RefPicSetStCurrBefore, 0, 8); + memset(priv->picture.h265.RefPicSetStCurrAfter, 0, 8); + for (i = 0; i < MAX_NUM_REF_PICS; ++i) { + priv->picture.h265.ref[i] = NULL; + priv->picture.h265.PicOrderCntVal[i] = 0; + } + + rps = priv->codec_data.h265.rps; + + if (rps) { + unsigned bf = 0, af = 0; + + priv->picture.h265.NumDeltaPocsOfRefRpsIdx = rps->num_delta_poc; + for (i = 0; i < rps->num_pics; ++i) { + priv->picture.h265.PicOrderCntVal[i] = + rps->delta_poc[i] + get_poc(priv); + + LIST_FOR_EACH_ENTRY(entry, &priv->codec_data.h265.dpb_list, list) { + if (entry->poc == priv->picture.h265.PicOrderCntVal[i]) { + priv->picture.h265.ref[i] = entry->buffer; + break; + } + } + + if (rps->used[i]) { + if (i < rps->num_neg_pics) { + priv->picture.h265.NumPocStCurrBefore++; + priv->picture.h265.RefPicSetStCurrBefore[bf++] = i; + } else { + priv->picture.h265.NumPocStCurrAfter++; + priv->picture.h265.RefPicSetStCurrAfter[af++] = i; + } + } + } + } + + priv->codec->end_frame(priv->codec, priv->target, &priv->picture.base); + priv->frame_started = false; + + /* add the decoded picture to the dpb list */ + entry = CALLOC_STRUCT(dpb_list); + if (!entry) + return; + + priv->first_buf_in_frame = true; + entry->buffer = priv->target; + entry->timestamp = priv->timestamp; + entry->poc = get_poc(priv); + + LIST_ADDTAIL(&entry->list, &priv->codec_data.h265.dpb_list); + ++priv->codec_data.h265.dpb_num; + priv->target = NULL; + + if (priv->codec_data.h265.dpb_num <= DPB_MAX_SIZE) + return; + + tmp = priv->in_buffers[0]->pInputPortPrivate; + priv->in_buffers[0]->pInputPortPrivate = vid_dec_h265_Flush(priv, ×tamp); + priv->in_buffers[0]->nTimeStamp = timestamp; + priv->target = tmp; + priv->frame_finished = priv->in_buffers[0]->pInputPortPrivate != NULL; + if (priv->frame_finished && + (priv->in_buffers[0]->nFlags & OMX_BUFFERFLAG_EOS)) + FREE(priv->codec_data.h265.ref_pic_set_list); +} + +static void slice_header(vid_dec_PrivateType *priv, struct vl_rbsp *rbsp, + unsigned nal_unit_type) +{ + struct pipe_h265_pps *pps; + struct pipe_h265_sps *sps; + bool first_slice_segment_in_pic_flag; + bool dependent_slice_segment_flag = false; + struct ref_pic_set *rps; + unsigned poc_lsb, poc_msb, slice_prev_poc; + unsigned max_poc_lsb, prev_poc_lsb, prev_poc_msb; + unsigned num_st_rps; + int i; + + if (priv->picture.h265.IDRPicFlag != is_idr_picture(nal_unit_type)) + vid_dec_h265_EndFrame(priv); + + priv->picture.h265.IDRPicFlag = is_idr_picture(nal_unit_type); + + first_slice_segment_in_pic_flag = vl_rbsp_u(rbsp, 1); + + if (is_rap_picture(nal_unit_type)) + /* no_output_of_prior_pics_flag */ + vl_rbsp_u(rbsp, 1); + + pps = pic_parameter_set_id(priv, rbsp); + if (!pps) + return; + + sps = pps->sps; + if (!sps) + return; + + if (pps != priv->picture.h265.pps) + vid_dec_h265_EndFrame(priv); + + priv->picture.h265.pps = pps; + + if (priv->picture.h265.RAPPicFlag != is_rap_picture(nal_unit_type)) + vid_dec_h265_EndFrame(priv); + priv->picture.h265.RAPPicFlag = is_rap_picture(nal_unit_type); + + num_st_rps = sps->num_short_term_ref_pic_sets; + + if (priv->picture.h265.CurrRpsIdx != num_st_rps) + vid_dec_h265_EndFrame(priv); + priv->picture.h265.CurrRpsIdx = num_st_rps; + + if (!first_slice_segment_in_pic_flag) { + int size, num; + int bits_slice_segment_address = 0; + + if (pps->dependent_slice_segments_enabled_flag) + dependent_slice_segment_flag = vl_rbsp_u(rbsp, 1); + + size = 1 << (sps->log2_min_luma_coding_block_size_minus3 + 3 + + sps->log2_diff_max_min_luma_coding_block_size); + + num = ((sps->pic_width_in_luma_samples + size - 1) / size) * + ((sps->pic_height_in_luma_samples + size - 1) / size); + + while (num > (1 << bits_slice_segment_address)) + bits_slice_segment_address++; + + /* slice_segment_address */ + vl_rbsp_u(rbsp, bits_slice_segment_address); + } + + if (dependent_slice_segment_flag) + return; + + for (i = 0; i < pps->num_extra_slice_header_bits; ++i) + /* slice_reserved_flag */ + vl_rbsp_u(rbsp, 1); + + /* slice_type */ + vl_rbsp_ue(rbsp); + + if (pps->output_flag_present_flag) + /* pic output flag */ + vl_rbsp_u(rbsp, 1); + + if (sps->separate_colour_plane_flag) + /* colour_plane_id */ + vl_rbsp_u(rbsp, 2); + + if (is_idr_picture(nal_unit_type)) { + set_poc(priv, nal_unit_type, 0); + return; + } + + /* slice_pic_order_cnt_lsb */ + poc_lsb = + vl_rbsp_u(rbsp, sps->log2_max_pic_order_cnt_lsb_minus4 + 4); + + slice_prev_poc = (int)priv->codec_data.h265.slice_prev_poc; + max_poc_lsb = 1 << (sps->log2_max_pic_order_cnt_lsb_minus4 + 4); + + prev_poc_lsb = slice_prev_poc & (max_poc_lsb - 1); + prev_poc_msb = slice_prev_poc - prev_poc_lsb; + + if ((poc_lsb < prev_poc_lsb) && + ((prev_poc_lsb - poc_lsb ) >= (max_poc_lsb / 2))) + poc_msb = prev_poc_msb + max_poc_lsb; + + else if ((poc_lsb > prev_poc_lsb ) && + ((poc_lsb - prev_poc_lsb) > (max_poc_lsb / 2))) + poc_msb = prev_poc_msb - max_poc_lsb; + + else + poc_msb = prev_poc_msb; + + if (is_bla_picture(nal_unit_type)) + poc_msb = 0; + + if (get_poc(priv) != poc_msb + poc_lsb) + vid_dec_h265_EndFrame(priv); + + set_poc(priv, nal_unit_type, (poc_msb + poc_lsb)); + + /* short_term_ref_pic_set_sps_flag */ + if (!vl_rbsp_u(rbsp, 1)) { + rps = (struct ref_pic_set *) + priv->codec_data.h265.ref_pic_set_list + num_st_rps; + st_ref_pic_set(priv, rbsp, rps, sps, num_st_rps); + + } else if (num_st_rps > 1) { + int num_bits = 0; + unsigned idx; + + while ((1 << num_bits) < num_st_rps) + num_bits++; + + if (num_bits > 0) + /* short_term_ref_pic_set_idx */ + idx = vl_rbsp_u(rbsp, num_bits); + else + idx = 0; + + rps = (struct ref_pic_set *) + priv->codec_data.h265.ref_pic_set_list + idx; + } else + rps = (struct ref_pic_set *) + priv->codec_data.h265.ref_pic_set_list; + + if (is_bla_picture(nal_unit_type)) { + rps->num_neg_pics = 0; + rps->num_pos_pics = 0; + rps->num_pics = 0; + } + + priv->codec_data.h265.rps = rps; + + return; +} + +static void vid_dec_h265_Decode(vid_dec_PrivateType *priv, + struct vl_vlc *vlc, + unsigned min_bits_left) +{ + unsigned nal_unit_type; + unsigned nuh_layer_id; + unsigned nuh_temporal_id_plus1; + + if (!vl_vlc_search_byte(vlc, vl_vlc_bits_left(vlc) - min_bits_left, 0x00)) + return; + + if (vl_vlc_peekbits(vlc, 24) != 0x000001) { + vl_vlc_eatbits(vlc, 8); + return; + } + + if (priv->slice) { + unsigned bytes = priv->bytes_left - (vl_vlc_bits_left(vlc) / 8); + + priv->codec->decode_bitstream(priv->codec, priv->target, + &priv->picture.base, 1, + &priv->slice, &bytes); + priv->slice = NULL; + } + + vl_vlc_eatbits(vlc, 24); + + /* forbidden_zero_bit */ + vl_vlc_eatbits(vlc, 1); + + if (vl_vlc_valid_bits(vlc) < 15) + vl_vlc_fillbits(vlc); + + nal_unit_type = vl_vlc_get_uimsbf(vlc, 6); + + /* nuh_layer_id */ + nuh_layer_id = vl_vlc_get_uimsbf(vlc, 6); + + /* nuh_temporal_id_plus1 */ + nuh_temporal_id_plus1 = vl_vlc_get_uimsbf(vlc, 3); + priv->codec_data.h265.temporal_id = nuh_temporal_id_plus1 - 1; + + if (!is_slice_picture(nal_unit_type)) + vid_dec_h265_EndFrame(priv); + + if (nal_unit_type == NAL_UNIT_TYPE_SPS) { + struct vl_rbsp rbsp; + + vl_rbsp_init(&rbsp, vlc, ~0); + seq_parameter_set(priv, &rbsp); + + } else if (nal_unit_type == NAL_UNIT_TYPE_PPS) { + struct vl_rbsp rbsp; + + vl_rbsp_init(&rbsp, vlc, ~0); + picture_parameter_set(priv, &rbsp); + + } else if (is_slice_picture(nal_unit_type)) { + unsigned bits = vl_vlc_valid_bits(vlc); + unsigned bytes = bits / 8 + 5; + struct vl_rbsp rbsp; + uint8_t buf[9]; + const void *ptr = buf; + unsigned i; + + buf[0] = 0x0; + buf[1] = 0x0; + buf[2] = 0x1; + buf[3] = nal_unit_type << 1 | nuh_layer_id >> 5; + buf[4] = nuh_layer_id << 3 | nuh_temporal_id_plus1; + for (i = 5; i < bytes; ++i) + buf[i] = vl_vlc_peekbits(vlc, bits) >> ((bytes - i - 1) * 8); + + priv->bytes_left = (vl_vlc_bits_left(vlc) - bits) / 8; + priv->slice = vlc->data; + + vl_rbsp_init(&rbsp, vlc, 128); + slice_header(priv, &rbsp, nal_unit_type); + + vid_dec_h265_BeginFrame(priv); + + priv->codec->decode_bitstream(priv->codec, priv->target, + &priv->picture.base, 1, + &ptr, &bytes); + } + + /* resync to byte boundary */ + vl_vlc_eatbits(vlc, vl_vlc_valid_bits(vlc) % 8); +} + +void vid_dec_h265_Init(vid_dec_PrivateType *priv) +{ + priv->picture.base.profile = PIPE_VIDEO_PROFILE_HEVC_MAIN; + + LIST_INITHEAD(&priv->codec_data.h265.dpb_list); + priv->codec_data.h265.ref_pic_set_list = (struct ref_pic_set *) + CALLOC(MAX_NUM_REF_PICS, sizeof(struct ref_pic_set)); + + priv->Decode = vid_dec_h265_Decode; + priv->EndFrame = vid_dec_h265_EndFrame; + priv->Flush = vid_dec_h265_Flush; + priv->first_buf_in_frame = true; +} diff -Nru mesa-12.0.6/src/gallium/state_trackers/omx/vid_enc.c mesa-17.0.7/src/gallium/state_trackers/omx/vid_enc.c --- mesa-12.0.6/src/gallium/state_trackers/omx/vid_enc.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/omx/vid_enc.c 2017-06-01 10:37:10.000000000 +0000 @@ -246,7 +246,7 @@ priv->quant.nQpB = OMX_VID_ENC_QUANT_B_FRAMES_DEFAULT; priv->profile_level.eProfile = OMX_VIDEO_AVCProfileBaseline; - priv->profile_level.eLevel = OMX_VIDEO_AVCLevel42; + priv->profile_level.eLevel = OMX_VIDEO_AVCLevel51; priv->force_pic_type.IntraRefreshVOP = OMX_FALSE; priv->frame_num = 0; @@ -905,16 +905,16 @@ box.width = def->nFrameWidth; box.height = def->nFrameHeight; box.depth = 1; - priv->s_pipe->transfer_inline_write(priv->s_pipe, views[0]->texture, 0, - PIPE_TRANSFER_WRITE, &box, - ptr, def->nStride, 0); + priv->s_pipe->texture_subdata(priv->s_pipe, views[0]->texture, 0, + PIPE_TRANSFER_WRITE, &box, + ptr, def->nStride, 0); ptr = ((uint8_t*)buf->pBuffer) + (def->nStride * box.height); box.width = def->nFrameWidth / 2; box.height = def->nFrameHeight / 2; box.depth = 1; - priv->s_pipe->transfer_inline_write(priv->s_pipe, views[1]->texture, 0, - PIPE_TRANSFER_WRITE, &box, - ptr, def->nStride, 0); + priv->s_pipe->texture_subdata(priv->s_pipe, views[1]->texture, 0, + PIPE_TRANSFER_WRITE, &box, + ptr, def->nStride, 0); } else { struct pipe_blit_info blit; struct vl_video_buffer *dst_buf = (struct vl_video_buffer *)vbuf; @@ -1006,6 +1006,14 @@ priv->current_scale_buffer %= OMX_VID_ENC_NUM_SCALING_BUFFERS; } +static void enc_GetPictureParamPreset(struct pipe_h264_enc_picture_desc *picture) +{ + picture->motion_est.enc_disable_sub_mode = 0x000000fe; + picture->motion_est.enc_ime2_search_range_x = 0x00000001; + picture->motion_est.enc_ime2_search_range_y = 0x00000001; + picture->pic_ctrl.enc_constraint_set_flags = 0x00000040; +} + static void enc_ControlPicture(omx_base_PortType *port, struct pipe_h264_enc_picture_desc *picture) { OMX_COMPONENTTYPE* comp = port->standCompContainer; @@ -1064,6 +1072,8 @@ picture->frame_num = priv->frame_num; picture->ref_idx_l0 = priv->ref_idx_l0; picture->ref_idx_l1 = priv->ref_idx_l1; + picture->enable_vui = (picture->rate_ctrl.frame_rate_num != 0); + enc_GetPictureParamPreset(picture); } static void enc_HandleTask(omx_base_PortType *port, struct encode_task *task, diff -Nru mesa-12.0.6/src/gallium/state_trackers/osmesa/Makefile.in mesa-17.0.7/src/gallium/state_trackers/osmesa/Makefile.in --- mesa-12.0.6/src/gallium/state_trackers/osmesa/Makefile.in 2017-01-24 01:41:49.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/osmesa/Makefile.in 2017-06-01 10:37:21.000000000 +0000 @@ -110,10 +110,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -213,6 +216,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -227,6 +232,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -256,10 +262,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -309,11 +316,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -353,8 +357,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -391,8 +393,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -401,7 +401,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -409,13 +408,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -444,6 +444,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -556,12 +557,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -573,7 +570,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = $(GALLIUM_CFLAGS) AM_CPPFLAGS = \ -I$(top_srcdir)/include \ diff -Nru mesa-12.0.6/src/gallium/state_trackers/va/buffer.c mesa-17.0.7/src/gallium/state_trackers/va/buffer.c --- mesa-12.0.6/src/gallium/state_trackers/va/buffer.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/va/buffer.c 2017-06-01 10:37:10.000000000 +0000 @@ -133,6 +133,12 @@ if (!buf->derived_surface.transfer || !*pbuff) return VA_STATUS_ERROR_INVALID_BUFFER; + if (buf->type == VAEncCodedBufferType) { + ((VACodedBufferSegment*)buf->data)->buf = *pbuff; + ((VACodedBufferSegment*)buf->data)->size = buf->coded_size; + ((VACodedBufferSegment*)buf->data)->next = NULL; + *pbuff = buf->data; + } } else { pipe_mutex_unlock(drv->mutex); *pbuff = buf->data; @@ -192,14 +198,8 @@ return VA_STATUS_ERROR_INVALID_BUFFER; } - if (buf->derived_surface.resource) { - if (buf->export_refcount > 0) { - pipe_mutex_unlock(drv->mutex); - return VA_STATUS_ERROR_INVALID_BUFFER; - } - + if (buf->derived_surface.resource) pipe_resource_reference(&buf->derived_surface.resource, NULL); - } FREE(buf->data); FREE(buf); @@ -297,14 +297,18 @@ pipe_mutex_lock(drv->mutex); drv->pipe->flush(drv->pipe, NULL, 0); - pipe_mutex_unlock(drv->mutex); memset(&whandle, 0, sizeof(whandle)); whandle.type = DRM_API_HANDLE_TYPE_FD; - if (!screen->resource_get_handle(screen, buf->derived_surface.resource, - &whandle, PIPE_HANDLE_USAGE_READ_WRITE)) + if (!screen->resource_get_handle(screen, drv->pipe, + buf->derived_surface.resource, + &whandle, PIPE_HANDLE_USAGE_READ_WRITE)) { + pipe_mutex_unlock(drv->mutex); return VA_STATUS_ERROR_INVALID_BUFFER; + } + + pipe_mutex_unlock(drv->mutex); buf_info->handle = (intptr_t)whandle.handle; break; diff -Nru mesa-12.0.6/src/gallium/state_trackers/va/config.c mesa-17.0.7/src/gallium/state_trackers/va/config.c --- mesa-12.0.6/src/gallium/state_trackers/va/config.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/va/config.c 2017-06-01 10:37:10.000000000 +0000 @@ -34,6 +34,8 @@ #include "va_private.h" +#include "util/u_handle_table.h" + DEBUG_GET_ONCE_BOOL_OPTION(mpeg4, "VAAPI_MPEG4_ENABLED", false) VAStatus @@ -88,10 +90,16 @@ return VA_STATUS_ERROR_UNSUPPORTED_PROFILE; pscreen = VL_VA_PSCREEN(ctx); - if (!pscreen->get_video_param(pscreen, p, PIPE_VIDEO_ENTRYPOINT_BITSTREAM, PIPE_VIDEO_CAP_SUPPORTED)) - return VA_STATUS_ERROR_UNSUPPORTED_PROFILE; + if (pscreen->get_video_param(pscreen, p, PIPE_VIDEO_ENTRYPOINT_BITSTREAM, + PIPE_VIDEO_CAP_SUPPORTED)) + entrypoint_list[(*num_entrypoints)++] = VAEntrypointVLD; + + if (pscreen->get_video_param(pscreen, p, PIPE_VIDEO_ENTRYPOINT_ENCODE, + PIPE_VIDEO_CAP_SUPPORTED)) + entrypoint_list[(*num_entrypoints)++] = VAEntrypointEncSlice; - entrypoint_list[(*num_entrypoints)++] = VAEntrypointVLD; + if (num_entrypoints == 0) + return VA_STATUS_ERROR_UNSUPPORTED_PROFILE; return VA_STATUS_SUCCESS; } @@ -107,16 +115,45 @@ for (i = 0; i < num_attribs; ++i) { unsigned int value; - switch (attrib_list[i].type) { - case VAConfigAttribRTFormat: - value = VA_RT_FORMAT_YUV420; - break; - case VAConfigAttribRateControl: - value = VA_RC_NONE; - break; - default: + if (entrypoint == VAEntrypointVLD) { + switch (attrib_list[i].type) { + case VAConfigAttribRTFormat: + value = VA_RT_FORMAT_YUV420; + break; + default: + value = VA_ATTRIB_NOT_SUPPORTED; + break; + } + } else if (entrypoint == VAEntrypointEncSlice) { + switch (attrib_list[i].type) { + case VAConfigAttribRTFormat: + value = VA_RT_FORMAT_YUV420; + break; + case VAConfigAttribRateControl: + value = VA_RC_CQP | VA_RC_CBR | VA_RC_VBR; + break; + case VAConfigAttribEncPackedHeaders: + value = 0; + break; + case VAConfigAttribEncMaxRefFrames: + value = 1; + break; + default: + value = VA_ATTRIB_NOT_SUPPORTED; + break; + } + } else if (entrypoint == VAEntrypointVideoProc) { + switch (attrib_list[i].type) { + case VAConfigAttribRTFormat: + value = (VA_RT_FORMAT_YUV420 | + VA_RT_FORMAT_RGB32); + break; + default: + value = VA_ATTRIB_NOT_SUPPORTED; + break; + } + } else { value = VA_ATTRIB_NOT_SUPPORTED; - break; } attrib_list[i].value = value; } @@ -128,29 +165,109 @@ vlVaCreateConfig(VADriverContextP ctx, VAProfile profile, VAEntrypoint entrypoint, VAConfigAttrib *attrib_list, int num_attribs, VAConfigID *config_id) { + vlVaDriver *drv; + vlVaConfig *config; struct pipe_screen *pscreen; enum pipe_video_profile p; if (!ctx) return VA_STATUS_ERROR_INVALID_CONTEXT; + drv = VL_VA_DRIVER(ctx); + + if (!drv) + return VA_STATUS_ERROR_INVALID_CONTEXT; + + config = CALLOC(1, sizeof(vlVaConfig)); + if (!config) + return VA_STATUS_ERROR_ALLOCATION_FAILED; + if (profile == VAProfileNone && entrypoint == VAEntrypointVideoProc) { - *config_id = PIPE_VIDEO_PROFILE_UNKNOWN; + config->entrypoint = VAEntrypointVideoProc; + config->profile = PIPE_VIDEO_PROFILE_UNKNOWN; + for (int i = 0; i < num_attribs; i++) { + if (attrib_list[i].type == VAConfigAttribRTFormat) { + if (attrib_list[i].value & (VA_RT_FORMAT_YUV420 | VA_RT_FORMAT_RGB32)) { + config->rt_format = attrib_list[i].value; + } else { + FREE(config); + return VA_STATUS_ERROR_UNSUPPORTED_RT_FORMAT; + } + } + } + + /* Default value if not specified in the input attributes. */ + if (!config->rt_format) + config->rt_format = VA_RT_FORMAT_YUV420 | VA_RT_FORMAT_RGB32; + + pipe_mutex_lock(drv->mutex); + *config_id = handle_table_add(drv->htab, config); + pipe_mutex_unlock(drv->mutex); return VA_STATUS_SUCCESS; } p = ProfileToPipe(profile); - if (p == PIPE_VIDEO_PROFILE_UNKNOWN) + if (p == PIPE_VIDEO_PROFILE_UNKNOWN) { + FREE(config); return VA_STATUS_ERROR_UNSUPPORTED_PROFILE; + } pscreen = VL_VA_PSCREEN(ctx); - if (!pscreen->get_video_param(pscreen, p, PIPE_VIDEO_ENTRYPOINT_BITSTREAM, PIPE_VIDEO_CAP_SUPPORTED)) - return VA_STATUS_ERROR_UNSUPPORTED_PROFILE; - if (entrypoint != VAEntrypointVLD) + switch (entrypoint) { + case VAEntrypointVLD: + if (!pscreen->get_video_param(pscreen, p, PIPE_VIDEO_ENTRYPOINT_BITSTREAM, + PIPE_VIDEO_CAP_SUPPORTED)) { + FREE(config); + return VA_STATUS_ERROR_UNSUPPORTED_PROFILE; + } + + config->entrypoint = PIPE_VIDEO_ENTRYPOINT_BITSTREAM; + break; + + case VAEntrypointEncSlice: + if (!pscreen->get_video_param(pscreen, p, PIPE_VIDEO_ENTRYPOINT_ENCODE, + PIPE_VIDEO_CAP_SUPPORTED)) { + FREE(config); + return VA_STATUS_ERROR_UNSUPPORTED_PROFILE; + } + + config->entrypoint = PIPE_VIDEO_ENTRYPOINT_ENCODE; + break; + + default: + FREE(config); return VA_STATUS_ERROR_UNSUPPORTED_ENTRYPOINT; + } - *config_id = p; + config->profile = p; + + for (int i = 0; i rc = PIPE_H264_ENC_RATE_CONTROL_METHOD_CONSTANT; + else if (attrib_list[i].value == VA_RC_VBR) + config->rc = PIPE_H264_ENC_RATE_CONTROL_METHOD_VARIABLE; + else + config->rc = PIPE_H264_ENC_RATE_CONTROL_METHOD_DISABLE; + } + if (attrib_list[i].type == VAConfigAttribRTFormat) { + if (attrib_list[i].value == VA_RT_FORMAT_YUV420) { + config->rt_format = attrib_list[i].value; + } else { + FREE(config); + return VA_STATUS_ERROR_UNSUPPORTED_RT_FORMAT; + } + } + } + + /* Default value if not specified in the input attributes. */ + if (!config->rt_format) + config->rt_format = VA_RT_FORMAT_YUV420; + + pipe_mutex_lock(drv->mutex); + *config_id = handle_table_add(drv->htab, config); + pipe_mutex_unlock(drv->mutex); return VA_STATUS_SUCCESS; } @@ -158,9 +275,27 @@ VAStatus vlVaDestroyConfig(VADriverContextP ctx, VAConfigID config_id) { + vlVaDriver *drv; + vlVaConfig *config; + if (!ctx) return VA_STATUS_ERROR_INVALID_CONTEXT; + drv = VL_VA_DRIVER(ctx); + + if (!drv) + return VA_STATUS_ERROR_INVALID_CONTEXT; + + pipe_mutex_lock(drv->mutex); + config = handle_table_get(drv->htab, config_id); + + if (!config) + return VA_STATUS_ERROR_INVALID_CONFIG; + + FREE(config); + handle_table_remove(drv->htab, config_id); + pipe_mutex_unlock(drv->mutex); + return VA_STATUS_SUCCESS; } @@ -168,22 +303,37 @@ vlVaQueryConfigAttributes(VADriverContextP ctx, VAConfigID config_id, VAProfile *profile, VAEntrypoint *entrypoint, VAConfigAttrib *attrib_list, int *num_attribs) { + vlVaDriver *drv; + vlVaConfig *config; + if (!ctx) return VA_STATUS_ERROR_INVALID_CONTEXT; - *profile = PipeToProfile(config_id); + drv = VL_VA_DRIVER(ctx); + + if (!drv) + return VA_STATUS_ERROR_INVALID_CONTEXT; + + pipe_mutex_lock(drv->mutex); + config = handle_table_get(drv->htab, config_id); + pipe_mutex_unlock(drv->mutex); + + if (!config) + return VA_STATUS_ERROR_INVALID_CONFIG; + + *profile = PipeToProfile(config->profile); - if (config_id == PIPE_VIDEO_PROFILE_UNKNOWN) { + if (config->profile == PIPE_VIDEO_PROFILE_UNKNOWN) { *entrypoint = VAEntrypointVideoProc; *num_attribs = 0; return VA_STATUS_SUCCESS; } - *entrypoint = VAEntrypointVLD; + *entrypoint = config->entrypoint; *num_attribs = 1; attrib_list[0].type = VAConfigAttribRTFormat; - attrib_list[0].value = VA_RT_FORMAT_YUV420; + attrib_list[0].value = config->rt_format; return VA_STATUS_SUCCESS; } diff -Nru mesa-12.0.6/src/gallium/state_trackers/va/context.c mesa-17.0.7/src/gallium/state_trackers/va/context.c --- mesa-12.0.6/src/gallium/state_trackers/va/context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/va/context.c 2017-06-01 10:37:10.000000000 +0000 @@ -139,8 +139,8 @@ drv->vscreen = vl_drm_screen_create(drm_info->fd); if (!drv->vscreen) goto error_screen; - } break; + } default: FREE(drv); return VA_STATUS_ERROR_INVALID_DISPLAY; @@ -155,11 +155,14 @@ if (!drv->htab) goto error_htab; - vl_compositor_init(&drv->compositor, drv->pipe); - vl_compositor_init_state(&drv->cstate, drv->pipe); + if (!vl_compositor_init(&drv->compositor, drv->pipe)) + goto error_compositor; + if (!vl_compositor_init_state(&drv->cstate, drv->pipe)) + goto error_compositor_state; vl_csc_get_matrix(VL_CSC_COLOR_STANDARD_BT_601, NULL, true, &drv->csc); - vl_compositor_set_csc_matrix(&drv->cstate, (const vl_csc_matrix *)&drv->csc); + if (!vl_compositor_set_csc_matrix(&drv->cstate, (const vl_csc_matrix *)&drv->csc, 1.0f, 0.0f)) + goto error_csc_matrix; pipe_mutex_init(drv->mutex); ctx->pDriverData = (void *)drv; @@ -177,6 +180,15 @@ return VA_STATUS_SUCCESS; +error_csc_matrix: + vl_compositor_cleanup_state(&drv->cstate); + +error_compositor_state: + vl_compositor_cleanup(&drv->compositor); + +error_compositor: + handle_table_destroy(drv->htab); + error_htab: drv->pipe->destroy(drv->pipe); @@ -195,18 +207,23 @@ { vlVaDriver *drv; vlVaContext *context; + vlVaConfig *config; int is_vpp; if (!ctx) return VA_STATUS_ERROR_INVALID_CONTEXT; - is_vpp = config_id == PIPE_VIDEO_PROFILE_UNKNOWN && !picture_width && + drv = VL_VA_DRIVER(ctx); + pipe_mutex_lock(drv->mutex); + config = handle_table_get(drv->htab, config_id); + pipe_mutex_unlock(drv->mutex); + + is_vpp = config->profile == PIPE_VIDEO_PROFILE_UNKNOWN && !picture_width && !picture_height && !flag && !render_targets && !num_render_targets; if (!(picture_width && picture_height) && !is_vpp) return VA_STATUS_ERROR_INVALID_IMAGE_FORMAT; - drv = VL_VA_DRIVER(ctx); context = CALLOC(1, sizeof(vlVaContext)); if (!context) return VA_STATUS_ERROR_ALLOCATION_FAILED; @@ -218,8 +235,8 @@ return VA_STATUS_ERROR_INVALID_CONTEXT; } } else { - context->templat.profile = config_id; - context->templat.entrypoint = PIPE_VIDEO_ENTRYPOINT_BITSTREAM; + context->templat.profile = config->profile; + context->templat.entrypoint = config->entrypoint; context->templat.chroma_format = PIPE_VIDEO_CHROMA_FORMAT_420; context->templat.width = picture_width; context->templat.height = picture_height; @@ -234,16 +251,18 @@ case PIPE_VIDEO_FORMAT_MPEG4_AVC: context->templat.max_references = 0; - context->desc.h264.pps = CALLOC_STRUCT(pipe_h264_pps); - if (!context->desc.h264.pps) { - FREE(context); - return VA_STATUS_ERROR_ALLOCATION_FAILED; - } - context->desc.h264.pps->sps = CALLOC_STRUCT(pipe_h264_sps); - if (!context->desc.h264.pps->sps) { - FREE(context->desc.h264.pps); - FREE(context); - return VA_STATUS_ERROR_ALLOCATION_FAILED; + if (config->entrypoint != PIPE_VIDEO_ENTRYPOINT_ENCODE) { + context->desc.h264.pps = CALLOC_STRUCT(pipe_h264_pps); + if (!context->desc.h264.pps) { + FREE(context); + return VA_STATUS_ERROR_ALLOCATION_FAILED; + } + context->desc.h264.pps->sps = CALLOC_STRUCT(pipe_h264_sps); + if (!context->desc.h264.pps->sps) { + FREE(context->desc.h264.pps); + FREE(context); + return VA_STATUS_ERROR_ALLOCATION_FAILED; + } } break; @@ -267,7 +286,11 @@ } } - context->desc.base.profile = config_id; + context->desc.base.profile = config->profile; + context->desc.base.entry_point = config->entrypoint; + if (config->entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE) + context->desc.h264enc.rate_ctrl.rate_ctrl_method = config->rc; + pipe_mutex_lock(drv->mutex); *context_id = handle_table_add(drv->htab, context); pipe_mutex_unlock(drv->mutex); @@ -293,15 +316,17 @@ } if (context->decoder) { - if (u_reduce_video_profile(context->decoder->profile) == - PIPE_VIDEO_FORMAT_MPEG4_AVC) { - FREE(context->desc.h264.pps->sps); - FREE(context->desc.h264.pps); - } - if (u_reduce_video_profile(context->decoder->profile) == - PIPE_VIDEO_FORMAT_HEVC) { - FREE(context->desc.h265.pps->sps); - FREE(context->desc.h265.pps); + if (context->desc.base.entry_point != PIPE_VIDEO_ENTRYPOINT_ENCODE) { + if (u_reduce_video_profile(context->decoder->profile) == + PIPE_VIDEO_FORMAT_MPEG4_AVC) { + FREE(context->desc.h264.pps->sps); + FREE(context->desc.h264.pps); + } + if (u_reduce_video_profile(context->decoder->profile) == + PIPE_VIDEO_FORMAT_HEVC) { + FREE(context->desc.h265.pps->sps); + FREE(context->desc.h265.pps); + } } context->decoder->destroy(context->decoder); } diff -Nru mesa-12.0.6/src/gallium/state_trackers/va/image.c mesa-17.0.7/src/gallium/state_trackers/va/image.c --- mesa-12.0.6/src/gallium/state_trackers/va/image.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/va/image.c 2017-06-01 10:37:10.000000000 +0000 @@ -471,21 +471,23 @@ return VA_STATUS_ERROR_OPERATION_FAILED; } - if (format != surf->buffer->buffer_format) { + if ((format != surf->buffer->buffer_format) && + ((format != PIPE_FORMAT_YV12) || (surf->buffer->buffer_format != PIPE_FORMAT_NV12)) && + ((format != PIPE_FORMAT_IYUV) || (surf->buffer->buffer_format != PIPE_FORMAT_NV12))) { struct pipe_video_buffer *tmp_buf; - enum pipe_format old_surf_format = surf->templat.buffer_format; + struct pipe_video_buffer templat = surf->templat; - surf->templat.buffer_format = format; - tmp_buf = drv->pipe->create_video_buffer(drv->pipe, &surf->templat); + templat.buffer_format = format; + tmp_buf = drv->pipe->create_video_buffer(drv->pipe, &templat); if (!tmp_buf) { - surf->templat.buffer_format = old_surf_format; pipe_mutex_unlock(drv->mutex); return VA_STATUS_ERROR_ALLOCATION_FAILED; } surf->buffer->destroy(surf->buffer); surf->buffer = tmp_buf; + surf->templat.buffer_format = format; } views = surf->buffer->get_sampler_view_planes(surf->buffer); @@ -513,12 +515,30 @@ unsigned width, height; if (!views[i]) continue; vlVaVideoSurfaceSize(surf, i, &width, &height); - for (j = 0; j < views[i]->texture->array_size; ++j) { - struct pipe_box dst_box = {0, 0, j, width, height, 1}; - drv->pipe->transfer_inline_write(drv->pipe, views[i]->texture, 0, - PIPE_TRANSFER_WRITE, &dst_box, - data[i] + pitches[i] * j, - pitches[i] * views[i]->texture->array_size, 0); + if (((format == PIPE_FORMAT_YV12) || (format == PIPE_FORMAT_IYUV)) && + (surf->buffer->buffer_format == PIPE_FORMAT_NV12)) { + struct pipe_transfer *transfer = NULL; + uint8_t *map = NULL; + struct pipe_box dst_box_1 = {0, 0, 0, width, height, 1}; + map = drv->pipe->transfer_map(drv->pipe, + views[i]->texture, + 0, + PIPE_TRANSFER_DISCARD_RANGE, + &dst_box_1, &transfer); + if (map == NULL) + return VA_STATUS_ERROR_OPERATION_FAILED; + + u_copy_yv12_img_to_nv12_surf ((ubyte * const*)data, map, width, height, + pitches[i], transfer->stride, i); + pipe_transfer_unmap(drv->pipe, transfer); + } else { + for (j = 0; j < views[i]->texture->array_size; ++j) { + struct pipe_box dst_box = {0, 0, j, width, height, 1}; + drv->pipe->texture_subdata(drv->pipe, views[i]->texture, 0, + PIPE_TRANSFER_WRITE, &dst_box, + data[i] + pitches[i] * j, + pitches[i] * views[i]->texture->array_size, 0); + } } } pipe_mutex_unlock(drv->mutex); diff -Nru mesa-12.0.6/src/gallium/state_trackers/va/Makefile.am mesa-17.0.7/src/gallium/state_trackers/va/Makefile.am --- mesa-12.0.6/src/gallium/state_trackers/va/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/va/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -30,18 +30,6 @@ $(VA_CFLAGS) \ -DVA_DRIVER_INIT_FUNC="__vaDriverInit_$(VA_MAJOR)_$(VA_MINOR)" -AM_CFLAGS += \ - $(GALLIUM_PIPE_LOADER_DEFINES) \ - -DPIPE_SEARCH_DIR=\"$(libdir)/gallium-pipe\" - -if HAVE_GALLIUM_STATIC_TARGETS -AM_CFLAGS += \ - -DGALLIUM_STATIC_TARGETS=1 -endif - -AM_CPPFLAGS = \ - -I$(top_srcdir)/include - noinst_LTLIBRARIES = libvatracker.la libvatracker_la_SOURCES = $(C_SOURCES) diff -Nru mesa-12.0.6/src/gallium/state_trackers/va/Makefile.in mesa-17.0.7/src/gallium/state_trackers/va/Makefile.in --- mesa-12.0.6/src/gallium/state_trackers/va/Makefile.in 2017-01-24 01:41:49.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/va/Makefile.in 2017-06-01 10:37:21.000000000 +0000 @@ -111,16 +111,16 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_3 = \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ -DGALLIUM_STATIC_TARGETS=1 - subdir = src/gallium/state_trackers/va ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps = $(top_srcdir)/m4/ax_check_gnu_make.m4 \ @@ -220,6 +220,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -234,6 +236,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -263,10 +266,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -316,11 +320,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -360,8 +361,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -398,8 +397,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -408,7 +405,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -416,13 +412,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -451,6 +448,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -577,12 +575,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -594,14 +588,13 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) -AM_CFLAGS = $(GALLIUM_CFLAGS) $(VISIBILITY_CFLAGS) $(VL_CFLAGS) \ + $(am__append_2) $(am__append_3) +AM_CFLAGS = \ + $(GALLIUM_CFLAGS) \ + $(VISIBILITY_CFLAGS) \ + $(VL_CFLAGS) \ $(VA_CFLAGS) \ - -DVA_DRIVER_INIT_FUNC="__vaDriverInit_$(VA_MAJOR)_$(VA_MINOR)" \ - $(GALLIUM_PIPE_LOADER_DEFINES) \ - -DPIPE_SEARCH_DIR=\"$(libdir)/gallium-pipe\" $(am__append_3) -AM_CPPFLAGS = \ - -I$(top_srcdir)/include + -DVA_DRIVER_INIT_FUNC="__vaDriverInit_$(VA_MAJOR)_$(VA_MINOR)" noinst_LTLIBRARIES = libvatracker.la libvatracker_la_SOURCES = $(C_SOURCES) diff -Nru mesa-12.0.6/src/gallium/state_trackers/va/picture.c mesa-17.0.7/src/gallium/state_trackers/va/picture.c --- mesa-12.0.6/src/gallium/state_trackers/va/picture.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/va/picture.c 2017-06-01 10:37:10.000000000 +0000 @@ -62,6 +62,8 @@ if (!surf || !surf->buffer) return VA_STATUS_ERROR_INVALID_SURFACE; + context->target_id = render_target; + surf->ctx = context_id; context->target = surf->buffer; if (!context->decoder) { @@ -78,7 +80,8 @@ return VA_STATUS_SUCCESS; } - context->decoder->begin_frame(context->decoder, context->target, &context->desc.base); + if (context->decoder->entrypoint != PIPE_VIDEO_ENTRYPOINT_ENCODE) + context->needs_begin_frame = true; return VA_STATUS_SUCCESS; } @@ -94,6 +97,39 @@ *ref_frame = NULL; } +static void +getEncParamPreset(vlVaContext *context) +{ + //motion estimation preset + context->desc.h264enc.motion_est.motion_est_quarter_pixel = 0x00000001; + context->desc.h264enc.motion_est.lsmvert = 0x00000002; + context->desc.h264enc.motion_est.enc_disable_sub_mode = 0x00000078; + context->desc.h264enc.motion_est.enc_en_ime_overw_dis_subm = 0x00000001; + context->desc.h264enc.motion_est.enc_ime_overw_dis_subm_no = 0x00000001; + context->desc.h264enc.motion_est.enc_ime2_search_range_x = 0x00000004; + context->desc.h264enc.motion_est.enc_ime2_search_range_y = 0x00000004; + + //pic control preset + context->desc.h264enc.pic_ctrl.enc_cabac_enable = 0x00000001; + context->desc.h264enc.pic_ctrl.enc_constraint_set_flags = 0x00000040; + + //rate control + context->desc.h264enc.rate_ctrl.vbv_buffer_size = 20000000; + context->desc.h264enc.rate_ctrl.vbv_buf_lv = 48; + context->desc.h264enc.rate_ctrl.fill_data_enable = 1; + context->desc.h264enc.rate_ctrl.enforce_hrd = 1; + context->desc.h264enc.enable_vui = false; + if (context->desc.h264enc.rate_ctrl.frame_rate_num == 0) + context->desc.h264enc.rate_ctrl.frame_rate_num = 30; + context->desc.h264enc.rate_ctrl.target_bits_picture = + context->desc.h264enc.rate_ctrl.target_bitrate / context->desc.h264enc.rate_ctrl.frame_rate_num; + context->desc.h264enc.rate_ctrl.peak_bits_picture_integer = + context->desc.h264enc.rate_ctrl.peak_bitrate / context->desc.h264enc.rate_ctrl.frame_rate_num; + context->desc.h264enc.rate_ctrl.peak_bits_picture_fraction = 0; + + context->desc.h264enc.ref_pic_mode = 0x00000201; +} + static VAStatus handlePictureParameterBuffer(vlVaDriver *drv, vlVaContext *context, vlVaBuffer *buf) { @@ -143,8 +179,7 @@ if (!context->decoder) return VA_STATUS_ERROR_ALLOCATION_FAILED; - context->decoder->begin_frame(context->decoder, context->target, - &context->desc.base); + context->needs_begin_frame = true; } return vaStatus; @@ -274,10 +309,162 @@ buffers[num_buffers] = buf->data; sizes[num_buffers] = buf->size; ++num_buffers; + + if (context->needs_begin_frame) { + context->decoder->begin_frame(context->decoder, context->target, + &context->desc.base); + context->needs_begin_frame = false; + } context->decoder->decode_bitstream(context->decoder, context->target, &context->desc.base, num_buffers, (const void * const*)buffers, sizes); } +static VAStatus +handleVAEncMiscParameterTypeRateControl(vlVaContext *context, VAEncMiscParameterBuffer *misc) +{ + VAEncMiscParameterRateControl *rc = (VAEncMiscParameterRateControl *)misc->data; + if (context->desc.h264enc.rate_ctrl.rate_ctrl_method == + PIPE_H264_ENC_RATE_CONTROL_METHOD_CONSTANT) + context->desc.h264enc.rate_ctrl.target_bitrate = rc->bits_per_second; + else + context->desc.h264enc.rate_ctrl.target_bitrate = rc->bits_per_second * (rc->target_percentage / 100.0); + context->desc.h264enc.rate_ctrl.peak_bitrate = rc->bits_per_second; + if (context->desc.h264enc.rate_ctrl.target_bitrate < 2000000) + context->desc.h264enc.rate_ctrl.vbv_buffer_size = MIN2((context->desc.h264enc.rate_ctrl.target_bitrate * 2.75), 2000000); + else + context->desc.h264enc.rate_ctrl.vbv_buffer_size = context->desc.h264enc.rate_ctrl.target_bitrate; + + return VA_STATUS_SUCCESS; +} + +static VAStatus +handleVAEncMiscParameterTypeFrameRate(vlVaContext *context, VAEncMiscParameterBuffer *misc) +{ + VAEncMiscParameterFrameRate *fr = (VAEncMiscParameterFrameRate *)misc->data; + context->desc.h264enc.rate_ctrl.frame_rate_num = fr->framerate; + return VA_STATUS_SUCCESS; +} + +static VAStatus +handleVAEncSequenceParameterBufferType(vlVaDriver *drv, vlVaContext *context, vlVaBuffer *buf) +{ + VAEncSequenceParameterBufferH264 *h264 = (VAEncSequenceParameterBufferH264 *)buf->data; + if (!context->decoder) { + context->templat.max_references = h264->max_num_ref_frames; + context->templat.level = h264->level_idc; + context->decoder = drv->pipe->create_video_codec(drv->pipe, &context->templat); + if (!context->decoder) + return VA_STATUS_ERROR_ALLOCATION_FAILED; + } + + context->gop_coeff = ((1024 + h264->intra_idr_period - 1) / h264->intra_idr_period + 1) / 2 * 2; + if (context->gop_coeff > VL_VA_ENC_GOP_COEFF) + context->gop_coeff = VL_VA_ENC_GOP_COEFF; + context->desc.h264enc.gop_size = h264->intra_idr_period * context->gop_coeff; + context->desc.h264enc.rate_ctrl.frame_rate_num = h264->time_scale / 2; + context->desc.h264enc.rate_ctrl.frame_rate_den = 1; + return VA_STATUS_SUCCESS; +} + +static VAStatus +handleVAEncMiscParameterBufferType(vlVaContext *context, vlVaBuffer *buf) +{ + VAStatus vaStatus = VA_STATUS_SUCCESS; + VAEncMiscParameterBuffer *misc; + misc = buf->data; + + switch (misc->type) { + case VAEncMiscParameterTypeRateControl: + vaStatus = handleVAEncMiscParameterTypeRateControl(context, misc); + break; + + case VAEncMiscParameterTypeFrameRate: + vaStatus = handleVAEncMiscParameterTypeFrameRate(context, misc); + break; + + default: + break; + } + + return vaStatus; +} + +static VAStatus +handleVAEncPictureParameterBufferType(vlVaDriver *drv, vlVaContext *context, vlVaBuffer *buf) +{ + VAEncPictureParameterBufferH264 *h264; + vlVaBuffer *coded_buf; + + h264 = buf->data; + context->desc.h264enc.frame_num = h264->frame_num; + context->desc.h264enc.not_referenced = false; + context->desc.h264enc.is_idr = (h264->pic_fields.bits.idr_pic_flag == 1); + context->desc.h264enc.pic_order_cnt = h264->CurrPic.TopFieldOrderCnt; + if (context->desc.h264enc.gop_cnt == 0) + context->desc.h264enc.i_remain = context->gop_coeff; + else if (context->desc.h264enc.frame_num == 1) + context->desc.h264enc.i_remain--; + + context->desc.h264enc.p_remain = context->desc.h264enc.gop_size - context->desc.h264enc.gop_cnt - context->desc.h264enc.i_remain; + + coded_buf = handle_table_get(drv->htab, h264->coded_buf); + if (!coded_buf->derived_surface.resource) + coded_buf->derived_surface.resource = pipe_buffer_create(drv->pipe->screen, PIPE_BIND_VERTEX_BUFFER, + PIPE_USAGE_STREAM, coded_buf->size); + context->coded_buf = coded_buf; + + context->desc.h264enc.frame_idx[h264->CurrPic.picture_id] = h264->frame_num; + if (context->desc.h264enc.is_idr) + context->desc.h264enc.picture_type = PIPE_H264_ENC_PICTURE_TYPE_IDR; + else + context->desc.h264enc.picture_type = PIPE_H264_ENC_PICTURE_TYPE_P; + + context->desc.h264enc.quant_i_frames = h264->pic_init_qp; + context->desc.h264enc.quant_b_frames = h264->pic_init_qp; + context->desc.h264enc.quant_p_frames = h264->pic_init_qp; + context->desc.h264enc.gop_cnt++; + if (context->desc.h264enc.gop_cnt == context->desc.h264enc.gop_size) + context->desc.h264enc.gop_cnt = 0; + + return VA_STATUS_SUCCESS; +} + +static VAStatus +handleVAEncSliceParameterBufferType(vlVaDriver *drv, vlVaContext *context, vlVaBuffer *buf) +{ + VAEncSliceParameterBufferH264 *h264; + + h264 = buf->data; + context->desc.h264enc.ref_idx_l0 = VA_INVALID_ID; + context->desc.h264enc.ref_idx_l1 = VA_INVALID_ID; + + for (int i = 0; i < 32; i++) { + if (h264->RefPicList0[i].picture_id != VA_INVALID_ID) { + if (context->desc.h264enc.ref_idx_l0 == VA_INVALID_ID) + context->desc.h264enc.ref_idx_l0 = context->desc.h264enc.frame_idx[h264->RefPicList0[i].picture_id]; + } + if (h264->RefPicList1[i].picture_id != VA_INVALID_ID && h264->slice_type == 1) { + if (context->desc.h264enc.ref_idx_l1 == VA_INVALID_ID) + context->desc.h264enc.ref_idx_l1 = context->desc.h264enc.frame_idx[h264->RefPicList1[i].picture_id]; + } + } + + if (h264->slice_type == 1) + context->desc.h264enc.picture_type = PIPE_H264_ENC_PICTURE_TYPE_B; + else if (h264->slice_type == 0) + context->desc.h264enc.picture_type = PIPE_H264_ENC_PICTURE_TYPE_P; + else if (h264->slice_type == 2) { + if (context->desc.h264enc.is_idr){ + context->desc.h264enc.picture_type = PIPE_H264_ENC_PICTURE_TYPE_IDR; + context->desc.h264enc.idr_pic_id++; + } else + context->desc.h264enc.picture_type = PIPE_H264_ENC_PICTURE_TYPE_I; + } else + context->desc.h264enc.picture_type = PIPE_H264_ENC_PICTURE_TYPE_SKIP; + + return VA_STATUS_SUCCESS; +} + VAStatus vlVaRenderPicture(VADriverContextP ctx, VAContextID context_id, VABufferID *buffers, int num_buffers) { @@ -328,6 +515,22 @@ vaStatus = vlVaHandleVAProcPipelineParameterBufferType(drv, context, buf); break; + case VAEncSequenceParameterBufferType: + vaStatus = handleVAEncSequenceParameterBufferType(drv, context, buf); + break; + + case VAEncMiscParameterBufferType: + vaStatus = handleVAEncMiscParameterBufferType(context, buf); + break; + + case VAEncPictureParameterBufferType: + vaStatus = handleVAEncPictureParameterBufferType(drv, context, buf); + break; + + case VAEncSliceParameterBufferType: + vaStatus = handleVAEncSliceParameterBufferType(drv, context, buf); + break; + default: break; } @@ -342,6 +545,9 @@ { vlVaDriver *drv; vlVaContext *context; + vlVaBuffer *coded_buf; + vlVaSurface *surf; + void *feedback; if (!ctx) return VA_STATUS_ERROR_INVALID_CONTEXT; @@ -364,8 +570,42 @@ return VA_STATUS_SUCCESS; } + pipe_mutex_lock(drv->mutex); + surf = handle_table_get(drv->htab, context->target_id); context->mpeg4.frame_num++; - context->decoder->end_frame(context->decoder, context->target, &context->desc.base); + if (context->decoder->entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE) { + coded_buf = context->coded_buf; + getEncParamPreset(context); + context->desc.h264enc.frame_num_cnt++; + context->decoder->begin_frame(context->decoder, context->target, &context->desc.base); + context->decoder->encode_bitstream(context->decoder, context->target, + coded_buf->derived_surface.resource, &feedback); + surf->feedback = feedback; + surf->coded_buf = coded_buf; + } + + context->decoder->end_frame(context->decoder, context->target, &context->desc.base); + if (context->decoder->entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE) { + int idr_period = context->desc.h264enc.gop_size / context->gop_coeff; + int p_remain_in_idr = idr_period - context->desc.h264enc.frame_num; + surf->frame_num_cnt = context->desc.h264enc.frame_num_cnt; + surf->force_flushed = false; + if (context->first_single_submitted) { + context->decoder->flush(context->decoder); + context->first_single_submitted = false; + surf->force_flushed = true; + } + if (p_remain_in_idr == 1) { + if ((context->desc.h264enc.frame_num_cnt % 2) != 0) { + context->decoder->flush(context->decoder); + context->first_single_submitted = true; + } + else + context->first_single_submitted = false; + surf->force_flushed = true; + } + } + pipe_mutex_unlock(drv->mutex); return VA_STATUS_SUCCESS; } diff -Nru mesa-12.0.6/src/gallium/state_trackers/va/postproc.c mesa-17.0.7/src/gallium/state_trackers/va/postproc.c --- mesa-12.0.6/src/gallium/state_trackers/va/postproc.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/va/postproc.c 2017-06-01 10:37:10.000000000 +0000 @@ -80,6 +80,7 @@ vl_compositor_set_layer_dst_area(&drv->cstate, 0, &dst_rect); vl_compositor_render(&drv->cstate, &drv->compositor, surfaces[0], NULL, false); + drv->pipe->flush(drv->pipe, NULL, 0); return VA_STATUS_SUCCESS; } diff -Nru mesa-12.0.6/src/gallium/state_trackers/va/surface.c mesa-17.0.7/src/gallium/state_trackers/va/surface.c --- mesa-12.0.6/src/gallium/state_trackers/va/surface.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/va/surface.c 2017-06-01 10:37:10.000000000 +0000 @@ -43,6 +43,8 @@ #include "va_private.h" +DEBUG_GET_ONCE_BOOL_OPTION(nointerlace, "VAAPI_DISABLE_INTERLACE", FALSE); + #include static const enum pipe_format vpp_surface_formats[] = { @@ -71,6 +73,10 @@ pipe_mutex_lock(drv->mutex); for (i = 0; i < num_surfaces; ++i) { vlVaSurface *surf = handle_table_get(drv->htab, surface_list[i]); + if (!surf) { + pipe_mutex_unlock(drv->mutex); + return VA_STATUS_ERROR_INVALID_SURFACE; + } if (surf->buffer) surf->buffer->destroy(surf->buffer); util_dynarray_fini(&surf->subpics); @@ -85,9 +91,53 @@ VAStatus vlVaSyncSurface(VADriverContextP ctx, VASurfaceID render_target) { + vlVaDriver *drv; + vlVaContext *context; + vlVaSurface *surf; + if (!ctx) return VA_STATUS_ERROR_INVALID_CONTEXT; + drv = VL_VA_DRIVER(ctx); + if (!drv) + return VA_STATUS_ERROR_INVALID_CONTEXT; + + pipe_mutex_lock(drv->mutex); + surf = handle_table_get(drv->htab, render_target); + + if (!surf || !surf->buffer) { + pipe_mutex_unlock(drv->mutex); + return VA_STATUS_ERROR_INVALID_SURFACE; + } + + if (!surf->feedback) { + // No outstanding operation: nothing to do. + pipe_mutex_unlock(drv->mutex); + return VA_STATUS_SUCCESS; + } + + context = handle_table_get(drv->htab, surf->ctx); + if (!context) { + pipe_mutex_unlock(drv->mutex); + return VA_STATUS_ERROR_INVALID_CONTEXT; + } + + if (context->decoder->entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE) { + int frame_diff; + if (context->desc.h264enc.frame_num_cnt >= surf->frame_num_cnt) + frame_diff = context->desc.h264enc.frame_num_cnt - surf->frame_num_cnt; + else + frame_diff = 0xFFFFFFFF - surf->frame_num_cnt + 1 + context->desc.h264enc.frame_num_cnt; + if ((frame_diff == 0) && + (surf->force_flushed == false) && + (context->desc.h264enc.frame_num_cnt % 2 != 0)) { + context->decoder->flush(context->decoder); + context->first_single_submitted = true; + } + context->decoder->get_feedback(context->decoder, surf->feedback, &(surf->coded_buf->coded_size)); + surf->feedback = NULL; + } + pipe_mutex_unlock(drv->mutex); return VA_STATUS_SUCCESS; } @@ -281,10 +331,14 @@ return status; } + /* flush before calling flush_frontbuffer so that rendering is flushed + * to back buffer so the texture can be copied in flush_frontbuffer + */ + drv->pipe->flush(drv->pipe, NULL, 0); + screen->flush_frontbuffer(screen, tex, 0, 0, vscreen->get_private(vscreen), NULL); - drv->pipe->flush(drv->pipe, NULL, 0); pipe_resource_reference(&tex, NULL); pipe_surface_reference(&surf_draw, NULL); @@ -315,17 +369,18 @@ } VAStatus -vlVaQuerySurfaceAttributes(VADriverContextP ctx, VAConfigID config, +vlVaQuerySurfaceAttributes(VADriverContextP ctx, VAConfigID config_id, VASurfaceAttrib *attrib_list, unsigned int *num_attribs) { vlVaDriver *drv; + vlVaConfig *config; VASurfaceAttrib *attribs; struct pipe_screen *pscreen; int i, j; STATIC_ASSERT(ARRAY_SIZE(vpp_surface_formats) <= VL_VA_MAX_IMAGE_FORMATS); - if (config == VA_INVALID_ID) + if (config_id == VA_INVALID_ID) return VA_STATUS_ERROR_INVALID_CONFIG; if (!attrib_list && !num_attribs) @@ -344,6 +399,13 @@ if (!drv) return VA_STATUS_ERROR_INVALID_CONTEXT; + pipe_mutex_lock(drv->mutex); + config = handle_table_get(drv->htab, config_id); + pipe_mutex_unlock(drv->mutex); + + if (!config) + return VA_STATUS_ERROR_INVALID_CONFIG; + pscreen = VL_VA_PSCREEN(ctx); if (!pscreen) @@ -359,12 +421,21 @@ /* vlVaCreateConfig returns PIPE_VIDEO_PROFILE_UNKNOWN * only for VAEntrypointVideoProc. */ - if (config == PIPE_VIDEO_PROFILE_UNKNOWN) { - for (j = 0; j < ARRAY_SIZE(vpp_surface_formats); ++j) { + if (config->profile == PIPE_VIDEO_PROFILE_UNKNOWN) { + if (config->rt_format & VA_RT_FORMAT_RGB32) { + for (j = 0; j < ARRAY_SIZE(vpp_surface_formats); ++j) { + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = PipeFormatToVaFourcc(vpp_surface_formats[j]); + i++; + } + } + if (config->rt_format & VA_RT_FORMAT_YUV420) { attribs[i].type = VASurfaceAttribPixelFormat; attribs[i].value.type = VAGenericValueTypeInteger; attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; - attribs[i].value.value.i = PipeFormatToVaFourcc(vpp_surface_formats[j]); + attribs[i].value.value.i = VA_FOURCC_NV12; i++; } } else { @@ -610,6 +681,8 @@ templat.width = width; templat.height = height; + if (debug_get_option_nointerlace()) + templat.interlaced = false; memset(surfaces, VA_INVALID_ID, num_surfaces * sizeof(VASurfaceID)); @@ -623,6 +696,14 @@ switch (memory_type) { case VA_SURFACE_ATTRIB_MEM_TYPE_VA: + /* The application will clear the TILING flag when the surface is + * intended to be exported as dmabuf. Adding shared flag because not + * null memory_attibute means VASurfaceAttribExternalBuffers is used. + */ + if (memory_attibute && + !(memory_attibute->flags & VA_SURFACE_EXTBUF_DESC_ENABLE_TILING)) + templat.bind = PIPE_BIND_LINEAR | PIPE_BIND_SHARED; + surf->buffer = drv->pipe->create_video_buffer(drv->pipe, &templat); if (!surf->buffer) { FREE(surf); diff -Nru mesa-12.0.6/src/gallium/state_trackers/va/va_private.h mesa-17.0.7/src/gallium/state_trackers/va/va_private.h --- mesa-12.0.6/src/gallium/state_trackers/va/va_private.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/va/va_private.h 2017-06-01 10:37:10.000000000 +0000 @@ -50,6 +50,7 @@ #define VL_VA_PSCREEN(ctx) (VL_VA_DRIVER(ctx)->vscreen->pscreen) #define VL_VA_MAX_IMAGE_FORMATS 9 +#define VL_VA_ENC_GOP_COEFF 16 static inline enum pipe_video_chroma_format ChromaToPipe(int format) @@ -141,7 +142,7 @@ case PIPE_VIDEO_PROFILE_VC1_ADVANCED: return VAProfileVC1Advanced; case PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE: - return VAProfileH264Baseline; + return VAProfileH264ConstrainedBaseline; case PIPE_VIDEO_PROFILE_MPEG4_AVC_MAIN: return VAProfileH264Main; case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH: @@ -183,7 +184,7 @@ return PIPE_VIDEO_PROFILE_VC1_MAIN; case VAProfileVC1Advanced: return PIPE_VIDEO_PROFILE_VC1_ADVANCED; - case VAProfileH264Baseline: + case VAProfileH264ConstrainedBaseline: return PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE; case VAProfileH264Main: return PIPE_VIDEO_PROFILE_MPEG4_AVC_MAIN; @@ -220,6 +221,20 @@ } vlVaSubpicture; typedef struct { + VABufferType type; + unsigned int size; + unsigned int num_elements; + void *data; + struct { + struct pipe_resource *resource; + struct pipe_transfer *transfer; + } derived_surface; + unsigned int export_refcount; + VABufferInfo export_state; + unsigned int coded_size; +} vlVaBuffer; + +typedef struct { struct pipe_video_codec templat, *decoder; struct pipe_video_buffer *target; union { @@ -229,6 +244,7 @@ struct pipe_vc1_picture_desc vc1; struct pipe_h264_picture_desc h264; struct pipe_h265_picture_desc h265; + struct pipe_h264_enc_picture_desc h264enc; } desc; struct { @@ -241,24 +257,28 @@ } mpeg4; struct vl_deint_filter *deint; + vlVaBuffer *coded_buf; + int target_id; + bool first_single_submitted; + int gop_coeff; + bool needs_begin_frame; } vlVaContext; typedef struct { - VABufferType type; - unsigned int size; - unsigned int num_elements; - void *data; - struct { - struct pipe_resource *resource; - struct pipe_transfer *transfer; - } derived_surface; - unsigned int export_refcount; - VABufferInfo export_state; -} vlVaBuffer; + enum pipe_video_profile profile; + enum pipe_video_entrypoint entrypoint; + enum pipe_h264_enc_rate_control_method rc; + unsigned int rt_format; +} vlVaConfig; typedef struct { struct pipe_video_buffer templat, *buffer; struct util_dynarray subpics; /* vlVaSubpicture */ + VAContextID ctx; + vlVaBuffer *coded_buf; + void *feedback; + unsigned int frame_num_cnt; + bool force_flushed; } vlVaSurface; // Public functions: diff -Nru mesa-12.0.6/src/gallium/state_trackers/vdpau/bitmap.c mesa-17.0.7/src/gallium/state_trackers/vdpau/bitmap.c --- mesa-12.0.6/src/gallium/state_trackers/vdpau/bitmap.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/vdpau/bitmap.c 2017-06-01 10:37:10.000000000 +0000 @@ -198,12 +198,10 @@ pipe_mutex_lock(vlsurface->device->mutex); - vlVdpResolveDelayedRendering(vlsurface->device, NULL, NULL); - dst_box = RectToPipeBox(destination_rect, vlsurface->sampler_view->texture); - pipe->transfer_inline_write(pipe, vlsurface->sampler_view->texture, 0, - PIPE_TRANSFER_WRITE, &dst_box, *source_data, - *source_pitches, 0); + pipe->texture_subdata(pipe, vlsurface->sampler_view->texture, 0, + PIPE_TRANSFER_WRITE, &dst_box, *source_data, + *source_pitches, 0); pipe_mutex_unlock(vlsurface->device->mutex); diff -Nru mesa-12.0.6/src/gallium/state_trackers/vdpau/device.c mesa-17.0.7/src/gallium/state_trackers/vdpau/device.c --- mesa-12.0.6/src/gallium/state_trackers/vdpau/device.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/vdpau/device.c 2017-06-01 10:37:10.000000000 +0000 @@ -128,13 +128,19 @@ goto no_handle; } - vl_compositor_init(&dev->compositor, dev->context); + if (!vl_compositor_init(&dev->compositor, dev->context)) { + ret = VDP_STATUS_ERROR; + goto no_compositor; + } + pipe_mutex_init(dev->mutex); *get_proc_address = &vlVdpGetProcAddress; return VDP_STATUS_OK; +no_compositor: + vlRemoveDataHTAB(*device); no_handle: pipe_sampler_view_reference(&dev->dummy_sv, NULL); no_resource: @@ -321,53 +327,3 @@ if (desc->swizzle[3] == PIPE_SWIZZLE_0) templ->swizzle_a = PIPE_SWIZZLE_1; } - -void -vlVdpResolveDelayedRendering(vlVdpDevice *dev, struct pipe_surface *surface, struct u_rect *dirty_area) -{ - struct vl_compositor_state *cstate; - vlVdpOutputSurface *vlsurface; - - assert(dev); - - cstate = dev->delayed_rendering.cstate; - if (!cstate) - return; - - vlsurface = vlGetDataHTAB(dev->delayed_rendering.surface); - if (!vlsurface) - return; - - if (!surface) { - surface = vlsurface->surface; - dirty_area = &vlsurface->dirty_area; - } - - vl_compositor_render(cstate, &dev->compositor, surface, dirty_area, true); - - dev->delayed_rendering.surface = VDP_INVALID_HANDLE; - dev->delayed_rendering.cstate = NULL; - - /* test if we need to create a new sampler for the just filled texture */ - if (surface->texture != vlsurface->sampler_view->texture) { - struct pipe_resource *res = surface->texture; - struct pipe_sampler_view sv_templ; - - vlVdpDefaultSamplerViewTemplate(&sv_templ, res); - pipe_sampler_view_reference(&vlsurface->sampler_view, NULL); - vlsurface->sampler_view = dev->context->create_sampler_view(dev->context, res, &sv_templ); - } - - return; -} - -void -vlVdpSave4DelayedRendering(vlVdpDevice *dev, VdpOutputSurface surface, struct vl_compositor_state *cstate) -{ - assert(dev); - - vlVdpResolveDelayedRendering(dev, NULL, NULL); - - dev->delayed_rendering.surface = surface; - dev->delayed_rendering.cstate = cstate; -} diff -Nru mesa-12.0.6/src/gallium/state_trackers/vdpau/Makefile.in mesa-17.0.7/src/gallium/state_trackers/vdpau/Makefile.in --- mesa-12.0.6/src/gallium/state_trackers/vdpau/Makefile.in 2017-01-24 01:41:49.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/vdpau/Makefile.in 2017-06-01 10:37:21.000000000 +0000 @@ -111,10 +111,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -215,6 +218,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -229,6 +234,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -258,10 +264,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -311,11 +318,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -355,8 +359,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -393,8 +395,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -403,7 +403,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -411,13 +410,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = 1 VDPAU_MINOR = 0 VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -446,6 +446,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -569,12 +570,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -586,7 +583,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ $(GALLIUM_CFLAGS) \ $(VISIBILITY_CFLAGS) \ diff -Nru mesa-12.0.6/src/gallium/state_trackers/vdpau/mixer.c mesa-17.0.7/src/gallium/state_trackers/vdpau/mixer.c --- mesa-12.0.6/src/gallium/state_trackers/vdpau/mixer.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/vdpau/mixer.c 2017-06-01 10:37:10.000000000 +0000 @@ -65,11 +65,18 @@ pipe_mutex_lock(dev->mutex); - vl_compositor_init_state(&vmixer->cstate, dev->context); + if (!vl_compositor_init_state(&vmixer->cstate, dev->context)) { + ret = VDP_STATUS_ERROR; + goto no_compositor_state; + } vl_csc_get_matrix(VL_CSC_COLOR_STANDARD_BT_601, NULL, true, &vmixer->csc); - if (!debug_get_bool_option("G3DVL_NO_CSC", FALSE)) - vl_compositor_set_csc_matrix(&vmixer->cstate, (const vl_csc_matrix *)&vmixer->csc); + if (!debug_get_bool_option("G3DVL_NO_CSC", FALSE)) { + if (!vl_compositor_set_csc_matrix(&vmixer->cstate, (const vl_csc_matrix *)&vmixer->csc, 1.0f, 0.0f)) { + ret = VDP_STATUS_ERROR; + goto err_csc_matrix; + } + } *mixer = vlAddDataHTAB(vmixer); if (*mixer == 0) { @@ -82,7 +89,6 @@ switch (features[i]) { /* they are valid, but we doesn't support them */ case VDP_VIDEO_MIXER_FEATURE_DEINTERLACE_TEMPORAL_SPATIAL: - case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L1: case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L2: case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L3: case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L4: @@ -92,7 +98,6 @@ case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L8: case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L9: case VDP_VIDEO_MIXER_FEATURE_INVERSE_TELECINE: - case VDP_VIDEO_MIXER_FEATURE_LUMA_KEY: break; case VDP_VIDEO_MIXER_FEATURE_DEINTERLACE_TEMPORAL: @@ -107,6 +112,13 @@ vmixer->noise_reduction.supported = true; break; + case VDP_VIDEO_MIXER_FEATURE_LUMA_KEY: + vmixer->luma_key.supported = true; + break; + + case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L1: + vmixer->bicubic.supported = true; + break; default: goto no_params; } } @@ -148,8 +160,8 @@ vmixer->video_height, max_size); goto no_params; } - vmixer->luma_key_min = 0.f; - vmixer->luma_key_max = 1.f; + vmixer->luma_key.luma_min = 1.0f; + vmixer->luma_key.luma_max = 0.0f; pipe_mutex_unlock(dev->mutex); return VDP_STATUS_OK; @@ -158,7 +170,9 @@ vlRemoveDataHTAB(*mixer); no_handle: +err_csc_matrix: vl_compositor_cleanup_state(&vmixer->cstate); +no_compositor_state: pipe_mutex_unlock(dev->mutex); DeviceReference(&vmixer->device, NULL); FREE(vmixer); @@ -179,8 +193,6 @@ pipe_mutex_lock(vmixer->device->mutex); - vlVdpResolveDelayedRendering(vmixer->device, NULL, NULL); - vlRemoveDataHTAB(mixer); vl_compositor_cleanup_state(&vmixer->cstate); @@ -199,6 +211,11 @@ vl_matrix_filter_cleanup(vmixer->sharpness.filter); FREE(vmixer->sharpness.filter); } + + if (vmixer->bicubic.filter) { + vl_bicubic_filter_cleanup(vmixer->bicubic.filter); + FREE(vmixer->bicubic.filter); + } pipe_mutex_unlock(vmixer->device->mutex); DeviceReference(&vmixer->device, NULL); @@ -227,9 +244,13 @@ VdpLayer const *layers) { enum vl_compositor_deinterlace deinterlace; - struct u_rect rect, clip, *prect; + struct u_rect rect, clip, *prect, dirty_area; unsigned i, layer = 0; struct pipe_video_buffer *video_buffer; + struct pipe_sampler_view *sampler_view, sv_templ; + struct pipe_surface *surface, surf_templ; + struct pipe_context *pipe = NULL; + struct pipe_resource res_tmpl, *res; vlVdpVideoMixer *vmixer; vlVdpSurface *surf; @@ -270,7 +291,6 @@ } pipe_mutex_lock(vmixer->device->mutex); - vlVdpResolveDelayedRendering(vmixer->device, NULL, NULL); vl_compositor_clear_layers(&vmixer->cstate); @@ -322,7 +342,47 @@ prect = ▭ } vl_compositor_set_buffer_layer(&vmixer->cstate, compositor, layer, video_buffer, prect, NULL, deinterlace); - vl_compositor_set_layer_dst_area(&vmixer->cstate, layer++, RectToPipe(destination_video_rect, &rect)); + + if (vmixer->bicubic.filter || vmixer->sharpness.filter || vmixer->noise_reduction.filter) { + pipe = vmixer->device->context; + memset(&res_tmpl, 0, sizeof(res_tmpl)); + + res_tmpl.target = PIPE_TEXTURE_2D; + res_tmpl.format = dst->sampler_view->format; + res_tmpl.depth0 = 1; + res_tmpl.array_size = 1; + res_tmpl.bind = PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_RENDER_TARGET; + res_tmpl.usage = PIPE_USAGE_DEFAULT; + + if (!vmixer->bicubic.filter) { + res_tmpl.width0 = dst->surface->width; + res_tmpl.height0 = dst->surface->height; + } else { + res_tmpl.width0 = surf->templat.width; + res_tmpl.height0 = surf->templat.height; + } + + res = pipe->screen->resource_create(pipe->screen, &res_tmpl); + + vlVdpDefaultSamplerViewTemplate(&sv_templ, res); + sampler_view = pipe->create_sampler_view(pipe, res, &sv_templ); + + memset(&surf_templ, 0, sizeof(surf_templ)); + surf_templ.format = res->format; + surface = pipe->create_surface(pipe, res, &surf_templ); + + vl_compositor_reset_dirty_area(&dirty_area); + pipe_resource_reference(&res, NULL); + } else { + surface = dst->surface; + sampler_view = dst->sampler_view; + dirty_area = dst->dirty_area; + } + + if (!vmixer->bicubic.filter) { + vl_compositor_set_layer_dst_area(&vmixer->cstate, layer++, RectToPipe(destination_video_rect, &rect)); + vl_compositor_set_dst_clip(&vmixer->cstate, RectToPipe(destination_rect, &clip)); + } for (i = 0; i < layer_count; ++i) { vlVdpOutputSurface *src = vlGetDataHTAB(layers->source_surface); @@ -340,22 +400,59 @@ ++layers; } - vl_compositor_set_dst_clip(&vmixer->cstate, RectToPipe(destination_rect, &clip)); - if (!vmixer->noise_reduction.filter && !vmixer->sharpness.filter) - vlVdpSave4DelayedRendering(vmixer->device, destination_surface, &vmixer->cstate); - else { - vl_compositor_render(&vmixer->cstate, compositor, dst->surface, &dst->dirty_area, true); - - /* applying the noise reduction after scaling is actually not very - clever, but currently we should avoid to copy around the image - data once more. */ - if (vmixer->noise_reduction.filter) + vl_compositor_render(&vmixer->cstate, compositor, surface, &dirty_area, true); + + if (vmixer->noise_reduction.filter) { + if (!vmixer->sharpness.filter && !vmixer->bicubic.filter) { vl_median_filter_render(vmixer->noise_reduction.filter, - dst->sampler_view, dst->surface); + sampler_view, dst->surface); + } else { + res = pipe->screen->resource_create(pipe->screen, &res_tmpl); + struct pipe_sampler_view *sampler_view_temp = pipe->create_sampler_view(pipe, res, &sv_templ); + struct pipe_surface *surface_temp = pipe->create_surface(pipe, res, &surf_templ); + pipe_resource_reference(&res, NULL); + + vl_median_filter_render(vmixer->noise_reduction.filter, + sampler_view, surface_temp); + + pipe_sampler_view_reference(&sampler_view, NULL); + pipe_surface_reference(&surface, NULL); + + sampler_view = sampler_view_temp; + surface = surface_temp; + } + } + + if (vmixer->sharpness.filter) { + if (!vmixer->bicubic.filter) { + vl_matrix_filter_render(vmixer->sharpness.filter, + sampler_view, dst->surface); + } else { + res = pipe->screen->resource_create(pipe->screen, &res_tmpl); + struct pipe_sampler_view *sampler_view_temp = pipe->create_sampler_view(pipe, res, &sv_templ); + struct pipe_surface *surface_temp = pipe->create_surface(pipe, res, &surf_templ); + pipe_resource_reference(&res, NULL); - if (vmixer->sharpness.filter) vl_matrix_filter_render(vmixer->sharpness.filter, - dst->sampler_view, dst->surface); + sampler_view, surface_temp); + + pipe_sampler_view_reference(&sampler_view, NULL); + pipe_surface_reference(&surface, NULL); + + sampler_view = sampler_view_temp; + surface = surface_temp; + } + } + + if (vmixer->bicubic.filter) + vl_bicubic_filter_render(vmixer->bicubic.filter, + sampler_view, dst->surface, + RectToPipe(destination_video_rect, &rect), + RectToPipe(destination_rect, &clip)); + + if(surface != dst->surface) { + pipe_sampler_view_reference(&sampler_view, NULL); + pipe_surface_reference(&surface, NULL); } pipe_mutex_unlock(vmixer->device->mutex); @@ -458,6 +555,28 @@ } /** + * Update the bicubic filter + */ +static void +vlVdpVideoMixerUpdateBicubicFilter(vlVdpVideoMixer *vmixer) +{ + assert(vmixer); + + /* if present remove the old filter first */ + if (vmixer->bicubic.filter) { + vl_bicubic_filter_cleanup(vmixer->bicubic.filter); + FREE(vmixer->bicubic.filter); + vmixer->bicubic.filter = NULL; + } + /* and create a new filter as needed */ + if (vmixer->bicubic.enabled) { + vmixer->bicubic.filter = MALLOC(sizeof(struct vl_bicubic_filter)); + vl_bicubic_filter_init(vmixer->bicubic.filter, vmixer->device->context, + vmixer->video_width, vmixer->video_height); + } +} + +/** * Retrieve whether features were requested at creation time. */ VdpStatus @@ -480,7 +599,6 @@ switch (features[i]) { /* they are valid, but we doesn't support them */ case VDP_VIDEO_MIXER_FEATURE_DEINTERLACE_TEMPORAL_SPATIAL: - case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L1: case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L2: case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L3: case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L4: @@ -490,7 +608,6 @@ case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L8: case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L9: case VDP_VIDEO_MIXER_FEATURE_INVERSE_TELECINE: - case VDP_VIDEO_MIXER_FEATURE_LUMA_KEY: feature_supports[i] = false; break; @@ -506,6 +623,14 @@ feature_supports[i] = vmixer->noise_reduction.supported; break; + case VDP_VIDEO_MIXER_FEATURE_LUMA_KEY: + feature_supports[i] = vmixer->luma_key.supported; + break; + + case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L1: + feature_supports[i] = vmixer->bicubic.supported; + break; + default: return VDP_STATUS_INVALID_VIDEO_MIXER_FEATURE; } @@ -538,7 +663,6 @@ switch (features[i]) { /* they are valid, but we doesn't support them */ case VDP_VIDEO_MIXER_FEATURE_DEINTERLACE_TEMPORAL_SPATIAL: - case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L1: case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L2: case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L3: case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L4: @@ -548,7 +672,6 @@ case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L8: case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L9: case VDP_VIDEO_MIXER_FEATURE_INVERSE_TELECINE: - case VDP_VIDEO_MIXER_FEATURE_LUMA_KEY: break; case VDP_VIDEO_MIXER_FEATURE_DEINTERLACE_TEMPORAL: @@ -566,6 +689,21 @@ vlVdpVideoMixerUpdateNoiseReductionFilter(vmixer); break; + case VDP_VIDEO_MIXER_FEATURE_LUMA_KEY: + vmixer->luma_key.enabled = feature_enables[i]; + if (!debug_get_bool_option("G3DVL_NO_CSC", FALSE)) + if (!vl_compositor_set_csc_matrix(&vmixer->cstate, (const vl_csc_matrix *)&vmixer->csc, + vmixer->luma_key.luma_min, vmixer->luma_key.luma_max)) { + pipe_mutex_unlock(vmixer->device->mutex); + return VDP_STATUS_ERROR; + } + break; + + case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L1: + vmixer->bicubic.enabled = feature_enables[i]; + vlVdpVideoMixerUpdateBicubicFilter(vmixer); + break; + default: pipe_mutex_unlock(vmixer->device->mutex); return VDP_STATUS_INVALID_VIDEO_MIXER_FEATURE; @@ -600,7 +738,6 @@ /* they are valid, but we doesn't support them */ case VDP_VIDEO_MIXER_FEATURE_DEINTERLACE_TEMPORAL: case VDP_VIDEO_MIXER_FEATURE_DEINTERLACE_TEMPORAL_SPATIAL: - case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L1: case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L2: case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L3: case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L4: @@ -610,7 +747,6 @@ case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L8: case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L9: case VDP_VIDEO_MIXER_FEATURE_INVERSE_TELECINE: - case VDP_VIDEO_MIXER_FEATURE_LUMA_KEY: break; case VDP_VIDEO_MIXER_FEATURE_SHARPNESS: @@ -621,6 +757,14 @@ feature_enables[i] = vmixer->noise_reduction.enabled; break; + case VDP_VIDEO_MIXER_FEATURE_LUMA_KEY: + feature_enables[i] = vmixer->luma_key.enabled; + break; + + case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L1: + feature_enables[i] = vmixer->bicubic.enabled; + break; + default: return VDP_STATUS_INVALID_VIDEO_MIXER_FEATURE; } @@ -671,13 +815,17 @@ else memcpy(vmixer->csc, vdp_csc, sizeof(vl_csc_matrix)); if (!debug_get_bool_option("G3DVL_NO_CSC", FALSE)) - vl_compositor_set_csc_matrix(&vmixer->cstate, (const vl_csc_matrix *)&vmixer->csc); + if (!vl_compositor_set_csc_matrix(&vmixer->cstate, (const vl_csc_matrix *)&vmixer->csc, + vmixer->luma_key.luma_min, vmixer->luma_key.luma_max)) { + ret = VDP_STATUS_ERROR; + goto fail; + } break; case VDP_VIDEO_MIXER_ATTRIBUTE_NOISE_REDUCTION_LEVEL: val = *(float*)attribute_values[i]; - if (val < 0.f || val > 1.f) { + if (val < 0.0f || val > 1.0f) { ret = VDP_STATUS_INVALID_VALUE; goto fail; } @@ -688,25 +836,38 @@ case VDP_VIDEO_MIXER_ATTRIBUTE_LUMA_KEY_MIN_LUMA: val = *(float*)attribute_values[i]; - if (val < 0.f || val > 1.f) { + if (val < 0.0f || val > 1.0f) { ret = VDP_STATUS_INVALID_VALUE; goto fail; } - vmixer->luma_key_min = val; + vmixer->luma_key.luma_min = val; + if (!debug_get_bool_option("G3DVL_NO_CSC", FALSE)) + if (!vl_compositor_set_csc_matrix(&vmixer->cstate, (const vl_csc_matrix *)&vmixer->csc, + vmixer->luma_key.luma_min, vmixer->luma_key.luma_max)) { + ret = VDP_STATUS_ERROR; + goto fail; + } break; + case VDP_VIDEO_MIXER_ATTRIBUTE_LUMA_KEY_MAX_LUMA: val = *(float*)attribute_values[i]; - if (val < 0.f || val > 1.f) { + if (val < 0.0f || val > 1.0f) { ret = VDP_STATUS_INVALID_VALUE; goto fail; } - vmixer->luma_key_max = val; + vmixer->luma_key.luma_max = val; + if (!debug_get_bool_option("G3DVL_NO_CSC", FALSE)) + if (!vl_compositor_set_csc_matrix(&vmixer->cstate, (const vl_csc_matrix *)&vmixer->csc, + vmixer->luma_key.luma_min, vmixer->luma_key.luma_max)) { + ret = VDP_STATUS_ERROR; + goto fail; + } break; case VDP_VIDEO_MIXER_ATTRIBUTE_SHARPNESS_LEVEL: val = *(float*)attribute_values[i]; - if (val < -1.f || val > 1.f) { + if (val < -1.0f || val > 1.0f) { ret = VDP_STATUS_INVALID_VALUE; goto fail; } @@ -814,10 +975,10 @@ break; case VDP_VIDEO_MIXER_ATTRIBUTE_LUMA_KEY_MIN_LUMA: - *(float*)attribute_values[i] = vmixer->luma_key_min; + *(float*)attribute_values[i] = vmixer->luma_key.luma_min; break; case VDP_VIDEO_MIXER_ATTRIBUTE_LUMA_KEY_MAX_LUMA: - *(float*)attribute_values[i] = vmixer->luma_key_max; + *(float*)attribute_values[i] = vmixer->luma_key.luma_max; break; case VDP_VIDEO_MIXER_ATTRIBUTE_SHARPNESS_LEVEL: *(float*)attribute_values[i] = vmixer->sharpness.value; diff -Nru mesa-12.0.6/src/gallium/state_trackers/vdpau/output.c mesa-17.0.7/src/gallium/state_trackers/vdpau/output.c --- mesa-12.0.6/src/gallium/state_trackers/vdpau/output.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/vdpau/output.c 2017-06-01 10:37:10.000000000 +0000 @@ -75,6 +75,13 @@ memset(&res_tmpl, 0, sizeof(res_tmpl)); + /* + * The output won't look correctly when this buffer is send to X, + * if the VDPAU RGB component order doesn't match the X11 one so + * we only allow the X11 format + */ + vlsurface->send_to_X = rgba_format == VDP_RGBA_FORMAT_B8G8R8A8; + res_tmpl.target = PIPE_TEXTURE_2D; res_tmpl.format = VdpFormatRGBAToPipe(rgba_format); res_tmpl.width0 = width; @@ -82,7 +89,7 @@ res_tmpl.depth0 = 1; res_tmpl.array_size = 1; res_tmpl.bind = PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_RENDER_TARGET | - PIPE_BIND_SHARED; + PIPE_BIND_SHARED | PIPE_BIND_SCANOUT; res_tmpl.usage = PIPE_USAGE_DEFAULT; pipe_mutex_lock(dev->mutex); @@ -111,7 +118,9 @@ pipe_resource_reference(&res, NULL); - vl_compositor_init_state(&vlsurface->cstate, pipe); + if (!vl_compositor_init_state(&vlsurface->cstate, pipe)) + goto err_resource; + vl_compositor_reset_dirty_area(&vlsurface->dirty_area); pipe_mutex_unlock(dev->mutex); @@ -144,7 +153,6 @@ pipe = vlsurface->device->context; pipe_mutex_lock(vlsurface->device->mutex); - vlVdpResolveDelayedRendering(vlsurface->device, NULL, NULL); pipe_surface_reference(&vlsurface->surface, NULL); pipe_sampler_view_reference(&vlsurface->sampler_view, NULL); @@ -205,8 +213,10 @@ if (!pipe) return VDP_STATUS_INVALID_HANDLE; + if (!destination_data || !destination_pitches) + return VDP_STATUS_INVALID_POINTER; + pipe_mutex_lock(vlsurface->device->mutex); - vlVdpResolveDelayedRendering(vlsurface->device, NULL, NULL); res = vlsurface->sampler_view->texture; box = RectToPipeBox(source_rect, res); @@ -247,13 +257,15 @@ if (!pipe) return VDP_STATUS_INVALID_HANDLE; + if (!source_data || !source_pitches) + return VDP_STATUS_INVALID_POINTER; + pipe_mutex_lock(vlsurface->device->mutex); - vlVdpResolveDelayedRendering(vlsurface->device, NULL, NULL); dst_box = RectToPipeBox(destination_rect, vlsurface->sampler_view->texture); - pipe->transfer_inline_write(pipe, vlsurface->sampler_view->texture, 0, - PIPE_TRANSFER_WRITE, &dst_box, *source_data, - *source_pitches, 0); + pipe->texture_subdata(pipe, vlsurface->sampler_view->texture, 0, + PIPE_TRANSFER_WRITE, &dst_box, *source_data, + *source_pitches, 0); pipe_mutex_unlock(vlsurface->device->mutex); return VDP_STATUS_OK; @@ -326,7 +338,6 @@ res_tmpl.bind = PIPE_BIND_SAMPLER_VIEW; pipe_mutex_lock(vlsurface->device->mutex); - vlVdpResolveDelayedRendering(vlsurface->device, NULL, NULL); if (!CheckSurfaceParams(context->screen, &res_tmpl)) goto error_resource; @@ -340,9 +351,9 @@ box.height = res->height0; box.depth = res->depth0; - context->transfer_inline_write(context, res, 0, PIPE_TRANSFER_WRITE, &box, - source_data[0], source_pitch[0], - source_pitch[0] * res->height0); + context->texture_subdata(context, res, 0, PIPE_TRANSFER_WRITE, &box, + source_data[0], source_pitch[0], + source_pitch[0] * res->height0); memset(&sv_tmpl, 0, sizeof(sv_tmpl)); u_sampler_view_default_template(&sv_tmpl, res, res->format); @@ -373,8 +384,8 @@ box.height = res->height0; box.depth = res->depth0; - context->transfer_inline_write(context, res, 0, PIPE_TRANSFER_WRITE, &box, color_table, - util_format_get_stride(colortbl_format, res->width0), 0); + context->texture_subdata(context, res, 0, PIPE_TRANSFER_WRITE, &box, color_table, + util_format_get_stride(colortbl_format, res->width0), 0); memset(&sv_tmpl, 0, sizeof(sv_tmpl)); u_sampler_view_default_template(&sv_tmpl, res, res->format); @@ -444,7 +455,6 @@ return VDP_STATUS_INVALID_POINTER; pipe_mutex_lock(vlsurface->device->mutex); - vlVdpResolveDelayedRendering(vlsurface->device, NULL, NULL); memset(&vtmpl, 0, sizeof(vtmpl)); vtmpl.buffer_format = format; vtmpl.chroma_format = FormatYCBCRToPipeChroma(source_ycbcr_format); @@ -479,16 +489,18 @@ sv->texture->width0, sv->texture->height0, 1 }; - pipe->transfer_inline_write(pipe, sv->texture, 0, PIPE_TRANSFER_WRITE, &dst_box, - source_data[i], source_pitches[i], 0); + pipe->texture_subdata(pipe, sv->texture, 0, PIPE_TRANSFER_WRITE, &dst_box, + source_data[i], source_pitches[i], 0); } if (!csc_matrix) { vl_csc_matrix csc; vl_csc_get_matrix(VL_CSC_COLOR_STANDARD_BT_601, NULL, 1, &csc); - vl_compositor_set_csc_matrix(cstate, (const vl_csc_matrix*)&csc); + if (!vl_compositor_set_csc_matrix(cstate, (const vl_csc_matrix*)&csc, 1.0f, 0.0f)) + goto err_csc_matrix; } else { - vl_compositor_set_csc_matrix(cstate, csc_matrix); + if (!vl_compositor_set_csc_matrix(cstate, csc_matrix, 1.0f, 0.0f)) + goto err_csc_matrix; } vl_compositor_clear_layers(cstate); @@ -500,6 +512,10 @@ pipe_mutex_unlock(vlsurface->device->mutex); return VDP_STATUS_OK; +err_csc_matrix: + vbuffer->destroy(vbuffer); + pipe_mutex_unlock(vlsurface->device->mutex); + return VDP_STATUS_ERROR; } static unsigned @@ -657,7 +673,6 @@ } pipe_mutex_lock(dst_vlsurface->device->mutex); - vlVdpResolveDelayedRendering(dst_vlsurface->device, NULL, NULL); context = dst_vlsurface->device->context; compositor = &dst_vlsurface->device->compositor; @@ -732,7 +747,6 @@ cstate = &dst_vlsurface->cstate; pipe_mutex_lock(dst_vlsurface->device->mutex); - vlVdpResolveDelayedRendering(dst_vlsurface->device, NULL, NULL); blend = BlenderToPipe(context, blend_state); @@ -760,14 +774,13 @@ return NULL; pipe_mutex_lock(vlsurface->device->mutex); - vlVdpResolveDelayedRendering(vlsurface->device, NULL, NULL); vlsurface->device->context->flush(vlsurface->device->context, NULL, 0); pipe_mutex_unlock(vlsurface->device->mutex); return vlsurface->surface->texture; } -VdpStatus vlVdpOutputSurfaceDMABuf(VdpVideoSurface surface, +VdpStatus vlVdpOutputSurfaceDMABuf(VdpOutputSurface surface, struct VdpSurfaceDMABufDesc *result) { vlVdpOutputSurface *vlsurface; @@ -782,17 +795,20 @@ return VDP_STATUS_INVALID_HANDLE; pipe_mutex_lock(vlsurface->device->mutex); - vlVdpResolveDelayedRendering(vlsurface->device, NULL, NULL); vlsurface->device->context->flush(vlsurface->device->context, NULL, 0); - pipe_mutex_unlock(vlsurface->device->mutex); memset(&whandle, 0, sizeof(struct winsys_handle)); whandle.type = DRM_API_HANDLE_TYPE_FD; pscreen = vlsurface->surface->texture->screen; - if (!pscreen->resource_get_handle(pscreen, vlsurface->surface->texture, &whandle, - PIPE_HANDLE_USAGE_READ_WRITE)) + if (!pscreen->resource_get_handle(pscreen, vlsurface->device->context, + vlsurface->surface->texture, &whandle, + PIPE_HANDLE_USAGE_READ_WRITE)) { + pipe_mutex_unlock(vlsurface->device->mutex); return VDP_STATUS_NO_IMPLEMENTATION; + } + + pipe_mutex_unlock(vlsurface->device->mutex); result->handle = whandle.handle; result->width = vlsurface->surface->width; diff -Nru mesa-12.0.6/src/gallium/state_trackers/vdpau/presentation.c mesa-17.0.7/src/gallium/state_trackers/vdpau/presentation.c --- mesa-12.0.6/src/gallium/state_trackers/vdpau/presentation.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/vdpau/presentation.c 2017-06-01 10:37:10.000000000 +0000 @@ -231,33 +231,25 @@ vscreen = pq->device->vscreen; pipe_mutex_lock(pq->device->mutex); + if (vscreen->set_back_texture_from_output && surf->send_to_X) + vscreen->set_back_texture_from_output(vscreen, surf->surface->texture, clip_width, clip_height); tex = vscreen->texture_from_drawable(vscreen, (void *)pq->drawable); if (!tex) { pipe_mutex_unlock(pq->device->mutex); return VDP_STATUS_INVALID_HANDLE; } - dirty_area = vscreen->get_dirty_area(vscreen); + if (!vscreen->set_back_texture_from_output || !surf->send_to_X) { + dirty_area = vscreen->get_dirty_area(vscreen); - memset(&surf_templ, 0, sizeof(surf_templ)); - surf_templ.format = tex->format; - surf_draw = pipe->create_surface(pipe, tex, &surf_templ); - - dst_clip.x0 = 0; - dst_clip.y0 = 0; - dst_clip.x1 = clip_width ? clip_width : surf_draw->width; - dst_clip.y1 = clip_height ? clip_height : surf_draw->height; - - if (pq->device->delayed_rendering.surface == surface && - dst_clip.x1 == surf_draw->width && dst_clip.y1 == surf_draw->height) { - - // TODO: we correctly support the clipping here, but not the pq background color in the clipped area.... - cstate = pq->device->delayed_rendering.cstate; - vl_compositor_set_dst_clip(cstate, &dst_clip); - vlVdpResolveDelayedRendering(pq->device, surf_draw, dirty_area); - - } else { - vlVdpResolveDelayedRendering(pq->device, NULL, NULL); + memset(&surf_templ, 0, sizeof(surf_templ)); + surf_templ.format = tex->format; + surf_draw = pipe->create_surface(pipe, tex, &surf_templ); + + dst_clip.x0 = 0; + dst_clip.y0 = 0; + dst_clip.x1 = clip_width ? clip_width : surf_draw->width; + dst_clip.y1 = clip_height ? clip_height : surf_draw->height; src_rect.x0 = 0; src_rect.y0 = 0; @@ -271,11 +263,14 @@ } vscreen->set_next_timestamp(vscreen, earliest_presentation_time); - pipe->screen->flush_frontbuffer(pipe->screen, tex, 0, 0, - vscreen->get_private(vscreen), NULL); + // flush before calling flush_frontbuffer so that rendering is flushed + // to back buffer so the texture can be copied in flush_frontbuffer pipe->screen->fence_reference(pipe->screen, &surf->fence, NULL); pipe->flush(pipe, &surf->fence, 0); + pipe->screen->flush_frontbuffer(pipe->screen, tex, 0, 0, + vscreen->get_private(vscreen), NULL); + pq->last_surf = surf; if (dump_window == -1) { @@ -294,8 +289,10 @@ framenum++; } - pipe_resource_reference(&tex, NULL); - pipe_surface_reference(&surf_draw, NULL); + if (!vscreen->set_back_texture_from_output || !surf->send_to_X) { + pipe_resource_reference(&tex, NULL); + pipe_surface_reference(&surf_draw, NULL); + } pipe_mutex_unlock(pq->device->mutex); return VDP_STATUS_OK; @@ -327,7 +324,7 @@ pipe_mutex_lock(pq->device->mutex); if (surf->fence) { screen = pq->device->vscreen->pscreen; - screen->fence_finish(screen, surf->fence, PIPE_TIMEOUT_INFINITE); + screen->fence_finish(screen, NULL, surf->fence, PIPE_TIMEOUT_INFINITE); screen->fence_reference(screen, &surf->fence, NULL); } pipe_mutex_unlock(pq->device->mutex); @@ -369,7 +366,7 @@ } else { pipe_mutex_lock(pq->device->mutex); screen = pq->device->vscreen->pscreen; - if (screen->fence_finish(screen, surf->fence, 0)) { + if (screen->fence_finish(screen, NULL, surf->fence, 0)) { screen->fence_reference(screen, &surf->fence, NULL); *status = VDP_PRESENTATION_QUEUE_STATUS_VISIBLE; pipe_mutex_unlock(pq->device->mutex); diff -Nru mesa-12.0.6/src/gallium/state_trackers/vdpau/query.c mesa-17.0.7/src/gallium/state_trackers/vdpau/query.c --- mesa-12.0.6/src/gallium/state_trackers/vdpau/query.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/vdpau/query.c 2017-06-01 10:37:10.000000000 +0000 @@ -470,6 +470,8 @@ case VDP_VIDEO_MIXER_FEATURE_SHARPNESS: case VDP_VIDEO_MIXER_FEATURE_NOISE_REDUCTION: case VDP_VIDEO_MIXER_FEATURE_DEINTERLACE_TEMPORAL: + case VDP_VIDEO_MIXER_FEATURE_LUMA_KEY: + case VDP_VIDEO_MIXER_FEATURE_HIGH_QUALITY_SCALING_L1: *is_supported = VDP_TRUE; break; default: @@ -588,12 +590,12 @@ case VDP_VIDEO_MIXER_ATTRIBUTE_NOISE_REDUCTION_LEVEL: case VDP_VIDEO_MIXER_ATTRIBUTE_LUMA_KEY_MIN_LUMA: case VDP_VIDEO_MIXER_ATTRIBUTE_LUMA_KEY_MAX_LUMA: - *(float*)min_value = 0.f; - *(float*)max_value = 1.f; + *(float*)min_value = 0.0f; + *(float*)max_value = 1.0f; break; case VDP_VIDEO_MIXER_ATTRIBUTE_SHARPNESS_LEVEL: - *(float*)min_value = -1.f; - *(float*)max_value = 1.f; + *(float*)min_value = -1.0f; + *(float*)max_value = 1.0f; break; case VDP_VIDEO_MIXER_ATTRIBUTE_SKIP_CHROMA_DEINTERLACE: *(uint8_t*)min_value = 0; diff -Nru mesa-12.0.6/src/gallium/state_trackers/vdpau/surface.c mesa-17.0.7/src/gallium/state_trackers/vdpau/surface.c --- mesa-12.0.6/src/gallium/state_trackers/vdpau/surface.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/vdpau/surface.c 2017-06-01 10:37:10.000000000 +0000 @@ -215,6 +215,9 @@ if (!pipe) return VDP_STATUS_INVALID_HANDLE; + if (!destination_data || !destination_pitches) + return VDP_STATUS_INVALID_POINTER; + format = FormatYCBCRToPipe(destination_ycbcr_format); if (format == PIPE_FORMAT_NONE) return VDP_STATUS_INVALID_Y_CB_CR_FORMAT; @@ -313,6 +316,9 @@ if (!pipe) return VDP_STATUS_INVALID_HANDLE; + if (!source_data || !source_pitches) + return VDP_STATUS_INVALID_POINTER; + pipe_mutex_lock(p_surf->device->mutex); if (p_surf->video_buffer == NULL || pformat != p_surf->video_buffer->buffer_format) { @@ -353,11 +359,11 @@ width, height, 1 }; - pipe->transfer_inline_write(pipe, sv->texture, 0, - PIPE_TRANSFER_WRITE, &dst_box, - source_data[i] + source_pitches[i] * j, - source_pitches[i] * sv->texture->array_size, - 0); + pipe->texture_subdata(pipe, sv->texture, 0, + PIPE_TRANSFER_WRITE, &dst_box, + source_data[i] + source_pitches[i] * j, + source_pitches[i] * sv->texture->array_size, + 0); } } pipe_mutex_unlock(p_surf->device->mutex); @@ -389,7 +395,7 @@ c.f[0] = c.f[1] = c.f[2] = c.f[3] = 0.5f; pipe->clear_render_target(pipe, surfaces[i], &c, 0, 0, - surfaces[i]->width, surfaces[i]->height); + surfaces[i]->width, surfaces[i]->height, false); } pipe->flush(pipe, NULL, 0); } @@ -454,19 +460,24 @@ } surf = p_surf->video_buffer->get_surfaces(p_surf->video_buffer)[plane]; - pipe_mutex_unlock(p_surf->device->mutex); - - if (!surf) + if (!surf) { + pipe_mutex_unlock(p_surf->device->mutex); return VDP_STATUS_RESOURCES; + } memset(&whandle, 0, sizeof(struct winsys_handle)); whandle.type = DRM_API_HANDLE_TYPE_FD; whandle.layer = surf->u.tex.first_layer; pscreen = surf->texture->screen; - if (!pscreen->resource_get_handle(pscreen, surf->texture, &whandle, - PIPE_HANDLE_USAGE_READ_WRITE)) + if (!pscreen->resource_get_handle(pscreen, p_surf->device->context, + surf->texture, &whandle, + PIPE_HANDLE_USAGE_READ_WRITE)) { + pipe_mutex_unlock(p_surf->device->mutex); return VDP_STATUS_NO_IMPLEMENTATION; + } + + pipe_mutex_unlock(p_surf->device->mutex); result->handle = whandle.handle; result->width = surf->width; diff -Nru mesa-12.0.6/src/gallium/state_trackers/vdpau/vdpau_private.h mesa-17.0.7/src/gallium/state_trackers/vdpau/vdpau_private.h --- mesa-12.0.6/src/gallium/state_trackers/vdpau/vdpau_private.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/vdpau/vdpau_private.h 2017-06-01 10:37:10.000000000 +0000 @@ -45,6 +45,7 @@ #include "os/os_thread.h" #include "vl/vl_video_buffer.h" +#include "vl/vl_bicubic_filter.h" #include "vl/vl_compositor.h" #include "vl/vl_csc.h" #include "vl/vl_deint_filter.h" @@ -350,11 +351,6 @@ struct vl_compositor compositor; struct pipe_sampler_view *dummy_sv; pipe_mutex mutex; - - struct { - struct vl_compositor_state *cstate; - VdpOutputSurface surface; - } delayed_rendering; } vlVdpDevice; typedef struct @@ -363,11 +359,21 @@ struct vl_compositor_state cstate; struct { + bool supported, enabled; + float luma_min, luma_max; + } luma_key; + + struct { bool supported, enabled, spatial; struct vl_deint_filter *filter; } deint; struct { + bool supported, enabled; + struct vl_bicubic_filter *filter; + } bicubic; + + struct { bool supported, enabled; unsigned level; struct vl_median_filter *filter; @@ -382,7 +388,6 @@ unsigned video_width, video_height; enum pipe_video_chroma_format chroma_format; unsigned max_layers, skip_chroma_deint; - float luma_key_min, luma_key_max; bool custom_csc; vl_csc_matrix csc; @@ -410,6 +415,7 @@ struct pipe_fence_handle *fence; struct vl_compositor_state cstate; struct u_rect dirty_area; + bool send_to_X; } vlVdpOutputSurface; typedef struct @@ -448,10 +454,6 @@ void vlVdpDefaultSamplerViewTemplate(struct pipe_sampler_view *templ, struct pipe_resource *res); -/* Delayed rendering funtionality */ -void vlVdpResolveDelayedRendering(vlVdpDevice *dev, struct pipe_surface *surface, struct u_rect *dirty_area); -void vlVdpSave4DelayedRendering(vlVdpDevice *dev, VdpOutputSurface surface, struct vl_compositor_state *cstate); - /* Internal function pointers */ VdpGetErrorString vlVdpGetErrorString; VdpDeviceDestroy vlVdpDeviceDestroy; diff -Nru mesa-12.0.6/src/gallium/state_trackers/wgl/stw_context.c mesa-17.0.7/src/gallium/state_trackers/wgl/stw_context.c --- mesa-12.0.6/src/gallium/state_trackers/wgl/stw_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/wgl/stw_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -388,27 +388,27 @@ BOOL stw_make_current(HDC hdc, DHGLRC dhglrc) { - struct stw_context *curctx = NULL; + struct stw_context *old_ctx = NULL; struct stw_context *ctx = NULL; - struct stw_framebuffer *fb = NULL; BOOL ret = FALSE; if (!stw_dev) return FALSE; - curctx = stw_current_context(); - if (curctx != NULL) { - if (curctx->dhglrc == dhglrc) { - if (curctx->hdc == hdc) { + old_ctx = stw_current_context(); + if (old_ctx != NULL) { + if (old_ctx->dhglrc == dhglrc) { + if (old_ctx->hdc == hdc) { /* Return if already current. */ return TRUE; } } else { - curctx->st->flush(curctx->st, ST_FLUSH_FRONT, NULL); + old_ctx->st->flush(old_ctx->st, ST_FLUSH_FRONT, NULL); } } if (dhglrc) { + struct stw_framebuffer *fb = NULL; stw_lock_contexts(stw_dev); ctx = stw_lookup_context_locked( dhglrc ); stw_unlock_contexts(stw_dev); @@ -416,6 +416,7 @@ goto fail; } + /* This call locks fb's mutex */ fb = stw_framebuffer_from_hdc( hdc ); if (fb) { stw_framebuffer_update(fb); @@ -434,6 +435,7 @@ } if (fb->iPixelFormat != ctx->iPixelFormat) { + stw_framebuffer_unlock(fb); SetLastError(ERROR_INVALID_PIXEL_FORMAT); goto fail; } @@ -441,36 +443,53 @@ /* Bind the new framebuffer */ ctx->hdc = hdc; + struct stw_framebuffer *old_fb = ctx->current_framebuffer; + if (old_fb != fb) { + stw_framebuffer_reference_locked(fb); + ctx->current_framebuffer = fb; + } + stw_framebuffer_unlock(fb); + /* Note: when we call this function we will wind up in the * stw_st_framebuffer_validate_locked() function which will incur * a recursive fb->mutex lock. */ ret = stw_dev->stapi->make_current(stw_dev->stapi, ctx->st, fb->stfb, fb->stfb); - stw_framebuffer_reference(&ctx->current_framebuffer, fb); - } else { - ret = stw_dev->stapi->make_current(stw_dev->stapi, NULL, NULL, NULL); - } -fail: + if (old_fb && old_fb != fb) { + stw_lock_framebuffers(stw_dev); + stw_framebuffer_lock(old_fb); + stw_framebuffer_release_locked(old_fb); + stw_unlock_framebuffers(stw_dev); + } - if (fb) { - stw_framebuffer_unlock(fb); - } +fail: + /* fb must be unlocked at this point. */ + assert(!stw_own_mutex(&fb->mutex)); - /* On failure, make the thread's current rendering context not current - * before returning. - */ - if (!ret) { - stw_dev->stapi->make_current(stw_dev->stapi, NULL, NULL, NULL); - ctx = NULL; + /* On failure, make the thread's current rendering context not current + * before returning. + */ + if (!ret) { + stw_make_current(NULL, 0); + } + } else { + ret = stw_dev->stapi->make_current(stw_dev->stapi, NULL, NULL, NULL); } /* Unreference the previous framebuffer if any. It must be done after * make_current, as it can be referenced inside. */ - if (curctx && curctx != ctx) { - stw_framebuffer_reference(&curctx->current_framebuffer, NULL); + if (old_ctx && old_ctx != ctx) { + struct stw_framebuffer *old_fb = old_ctx->current_framebuffer; + if (old_fb) { + old_ctx->current_framebuffer = NULL; + stw_lock_framebuffers(stw_dev); + stw_framebuffer_lock(old_fb); + stw_framebuffer_release_locked(old_fb); + stw_unlock_framebuffers(stw_dev); + } } return ret; diff -Nru mesa-12.0.6/src/gallium/state_trackers/wgl/stw_device.c mesa-17.0.7/src/gallium/state_trackers/wgl/stw_device.c --- mesa-12.0.6/src/gallium/state_trackers/wgl/stw_device.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/wgl/stw_device.c 2017-06-01 10:37:10.000000000 +0000 @@ -116,6 +116,8 @@ stw_pixelformat_init(); + stw_dev->initialized = true; + return TRUE; error1: diff -Nru mesa-12.0.6/src/gallium/state_trackers/wgl/stw_device.h mesa-17.0.7/src/gallium/state_trackers/wgl/stw_device.h --- mesa-12.0.6/src/gallium/state_trackers/wgl/stw_device.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/wgl/stw_device.h 2017-06-01 10:37:10.000000000 +0000 @@ -67,12 +67,18 @@ CRITICAL_SECTION ctx_mutex; struct handle_table *ctx_table; + /* TODO: use an atomic counter to track the number of locked + * stw_framebuffer objects. Assert that the counter is zero when + * trying to lock this mutex. + */ CRITICAL_SECTION fb_mutex; struct stw_framebuffer *fb_head; #ifdef DEBUG unsigned long memdbg_no; #endif + + bool initialized; }; diff -Nru mesa-12.0.6/src/gallium/state_trackers/wgl/stw_ext_rendertexture.c mesa-17.0.7/src/gallium/state_trackers/wgl/stw_ext_rendertexture.c --- mesa-12.0.6/src/gallium/state_trackers/wgl/stw_ext_rendertexture.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/wgl/stw_ext_rendertexture.c 2017-06-01 10:37:10.000000000 +0000 @@ -104,6 +104,7 @@ wglBindTexImageARB(HPBUFFERARB hPbuffer, int iBuffer) { HDC prevDrawable = stw_get_current_dc(); + HDC dc; struct stw_context *curctx = stw_current_context(); struct stw_framebuffer *fb; GLenum texFormat, srcBuffer, target; @@ -164,10 +165,12 @@ */ pixelFormatSave = fb->iPixelFormat; fb->iPixelFormat = curctx->iPixelFormat; - retVal = stw_make_current(wglGetPbufferDCARB(hPbuffer), curctx->dhglrc); + dc = wglGetPbufferDCARB(hPbuffer); + retVal = stw_make_current(dc, curctx->dhglrc); fb->iPixelFormat = pixelFormatSave; if (!retVal) { debug_printf("stw_make_current(#1) failed in wglBindTexImageARB()\n"); + wglReleasePbufferDCARB(hPbuffer, dc); return FALSE; } @@ -181,6 +184,8 @@ debug_printf("stw_make_current(#2) failed in wglBindTexImageARB()\n"); } + wglReleasePbufferDCARB(hPbuffer, dc); + return retVal; } diff -Nru mesa-12.0.6/src/gallium/state_trackers/wgl/stw_framebuffer.c mesa-17.0.7/src/gallium/state_trackers/wgl/stw_framebuffer.c --- mesa-12.0.6/src/gallium/state_trackers/wgl/stw_framebuffer.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/wgl/stw_framebuffer.c 2017-06-01 10:37:10.000000000 +0000 @@ -47,7 +47,7 @@ * If a stw_framebuffer is found, lock it and return the pointer. * Else, return NULL. */ -static inline struct stw_framebuffer * +static struct stw_framebuffer * stw_framebuffer_from_hwnd_locked(HWND hwnd) { struct stw_framebuffer *fb; @@ -67,14 +67,18 @@ * Decrement the reference count on the given stw_framebuffer object. * If the reference count hits zero, destroy the object. * - * Note: Both stw_dev::fb_mutex and stw_framebuffer::mutex must already - * be locked. + * Note: Both stw_dev::fb_mutex and stw_framebuffer::mutex must already be + * locked. After this function completes, the fb's mutex will be unlocked. */ -static void -stw_framebuffer_destroy_locked(struct stw_framebuffer *fb) +void +stw_framebuffer_release_locked(struct stw_framebuffer *fb) { struct stw_framebuffer **link; + assert(fb); + assert(stw_own_mutex(&fb->mutex)); + assert(stw_own_mutex(&stw_dev->fb_mutex)); + /* check the reference count */ fb->refcnt--; if (fb->refcnt) { @@ -199,32 +203,39 @@ if (nCode < 0 || !stw_dev) return CallNextHookEx(tls_data->hCallWndProcHook, nCode, wParam, lParam); - if (pParams->message == WM_WINDOWPOSCHANGED) { - /* We handle WM_WINDOWPOSCHANGED instead of WM_SIZE because according to - * http://blogs.msdn.com/oldnewthing/archive/2008/01/15/7113860.aspx - * WM_SIZE is generated from WM_WINDOWPOSCHANGED by DefWindowProc so it - * can be masked out by the application. - */ - LPWINDOWPOS lpWindowPos = (LPWINDOWPOS)pParams->lParam; - if ((lpWindowPos->flags & SWP_SHOWWINDOW) || - !(lpWindowPos->flags & SWP_NOMOVE) || - !(lpWindowPos->flags & SWP_NOSIZE)) { - fb = stw_framebuffer_from_hwnd( pParams->hwnd ); - if (fb) { - /* Size in WINDOWPOS includes the window frame, so get the size - * of the client area via GetClientRect. - */ - stw_framebuffer_get_size(fb); - stw_framebuffer_unlock(fb); + /* We check that the stw_dev object is initialized before we try to do + * anything with it. Otherwise, in multi-threaded programs there's a + * chance of executing this code before the stw_dev object is fully + * initialized. + */ + if (stw_dev && stw_dev->initialized) { + if (pParams->message == WM_WINDOWPOSCHANGED) { + /* We handle WM_WINDOWPOSCHANGED instead of WM_SIZE because according + * to http://blogs.msdn.com/oldnewthing/archive/2008/01/15/7113860.aspx + * WM_SIZE is generated from WM_WINDOWPOSCHANGED by DefWindowProc so it + * can be masked out by the application. + */ + LPWINDOWPOS lpWindowPos = (LPWINDOWPOS)pParams->lParam; + if ((lpWindowPos->flags & SWP_SHOWWINDOW) || + !(lpWindowPos->flags & SWP_NOMOVE) || + !(lpWindowPos->flags & SWP_NOSIZE)) { + fb = stw_framebuffer_from_hwnd( pParams->hwnd ); + if (fb) { + /* Size in WINDOWPOS includes the window frame, so get the size + * of the client area via GetClientRect. + */ + stw_framebuffer_get_size(fb); + stw_framebuffer_unlock(fb); + } } } - } - else if (pParams->message == WM_DESTROY) { - stw_lock_framebuffers(stw_dev); - fb = stw_framebuffer_from_hwnd_locked( pParams->hwnd ); - if (fb) - stw_framebuffer_destroy_locked(fb); - stw_unlock_framebuffers(stw_dev); + else if (pParams->message == WM_DESTROY) { + stw_lock_framebuffers(stw_dev); + fb = stw_framebuffer_from_hwnd_locked( pParams->hwnd ); + if (fb) + stw_framebuffer_release_locked(fb); + stw_unlock_framebuffers(stw_dev); + } } return CallNextHookEx(tls_data->hCallWndProcHook, nCode, wParam, lParam); @@ -304,33 +315,6 @@ /** - * Have ptr reference fb. The referenced framebuffer should be locked. - */ -void -stw_framebuffer_reference(struct stw_framebuffer **ptr, - struct stw_framebuffer *fb) -{ - struct stw_framebuffer *old_fb = *ptr; - - if (old_fb == fb) - return; - - if (fb) - fb->refcnt++; - if (old_fb) { - stw_lock_framebuffers(stw_dev); - - stw_framebuffer_lock(old_fb); - stw_framebuffer_destroy_locked(old_fb); - - stw_unlock_framebuffers(stw_dev); - } - - *ptr = fb; -} - - -/** * Update the framebuffer's size if necessary. */ void @@ -369,7 +353,7 @@ next = fb->next; stw_framebuffer_lock(fb); - stw_framebuffer_destroy_locked(fb); + stw_framebuffer_release_locked(fb); fb = next; } @@ -383,7 +367,7 @@ * Given an hdc, return the corresponding stw_framebuffer. * The returned stw_framebuffer will have its mutex locked. */ -static inline struct stw_framebuffer * +static struct stw_framebuffer * stw_framebuffer_from_hdc_locked(HDC hdc) { HWND hwnd; diff -Nru mesa-12.0.6/src/gallium/state_trackers/wgl/stw_framebuffer.h mesa-17.0.7/src/gallium/state_trackers/wgl/stw_framebuffer.h --- mesa-12.0.6/src/gallium/state_trackers/wgl/stw_framebuffer.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/wgl/stw_framebuffer.h 2017-06-01 10:37:10.000000000 +0000 @@ -34,6 +34,7 @@ #include #include "util/u_debug.h" +#include "stw_st.h" struct pipe_resource; @@ -131,9 +132,24 @@ struct stw_framebuffer * stw_framebuffer_create(HDC hdc, int iPixelFormat); + +/** + * Increase fb reference count. The referenced framebuffer should be locked. + * + * It's not necessary to hold stw_dev::fb_mutex global lock. + */ +static inline void +stw_framebuffer_reference_locked(struct stw_framebuffer *fb) +{ + if (fb) { + assert(stw_own_mutex(&fb->mutex)); + fb->refcnt++; + } +} + + void -stw_framebuffer_reference(struct stw_framebuffer **ptr, - struct stw_framebuffer *fb); +stw_framebuffer_release_locked(struct stw_framebuffer *fb); /** * Search a framebuffer with a matching HWND. @@ -179,6 +195,7 @@ stw_framebuffer_unlock(struct stw_framebuffer *fb) { assert(fb); + assert(stw_own_mutex(&fb->mutex)); LeaveCriticalSection(&fb->mutex); } diff -Nru mesa-12.0.6/src/gallium/state_trackers/wgl/stw_st.c mesa-17.0.7/src/gallium/state_trackers/wgl/stw_st.c --- mesa-12.0.6/src/gallium/state_trackers/wgl/stw_st.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/wgl/stw_st.c 2017-06-01 10:37:10.000000000 +0000 @@ -51,8 +51,8 @@ /** * Is the given mutex held by the calling thread? */ -static bool -own_mutex(const CRITICAL_SECTION *cs) +bool +stw_own_mutex(const CRITICAL_SECTION *cs) { // We can't compare OwningThread with our thread handle/id (see // http://stackoverflow.com/a/12675635 ) but we can compare with the @@ -182,7 +182,7 @@ struct stw_st_framebuffer *stwfb = stw_st_framebuffer(stfb); struct pipe_resource *resource; - assert(own_mutex(&stwfb->fb->mutex)); + assert(stw_own_mutex(&stwfb->fb->mutex)); resource = stwfb->textures[statt]; if (resource) { @@ -192,7 +192,7 @@ stw_framebuffer_unlock(stwfb->fb); } - assert(!own_mutex(&stwfb->fb->mutex)); + assert(!stw_own_mutex(&stwfb->fb->mutex)); return TRUE; } diff -Nru mesa-12.0.6/src/gallium/state_trackers/wgl/stw_st.h mesa-17.0.7/src/gallium/state_trackers/wgl/stw_st.h --- mesa-12.0.6/src/gallium/state_trackers/wgl/stw_st.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/wgl/stw_st.h 2017-06-01 10:37:10.000000000 +0000 @@ -34,6 +34,9 @@ struct stw_framebuffer; +bool +stw_own_mutex(const CRITICAL_SECTION *cs); + struct st_api * stw_st_create_api(void); diff -Nru mesa-12.0.6/src/gallium/state_trackers/wgl/stw_tls.c mesa-17.0.7/src/gallium/state_trackers/wgl/stw_tls.c --- mesa-12.0.6/src/gallium/state_trackers/wgl/stw_tls.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/wgl/stw_tls.c 2017-06-01 10:37:10.000000000 +0000 @@ -50,7 +50,7 @@ static struct stw_tls_data *g_pendingTlsData = NULL; -static inline struct stw_tls_data * +static struct stw_tls_data * stw_tls_data_create(DWORD dwThreadId); static struct stw_tls_data * @@ -111,7 +111,7 @@ /** * Install windows hook for a given thread (not necessarily the current one). */ -static inline struct stw_tls_data * +static struct stw_tls_data * stw_tls_data_create(DWORD dwThreadId) { struct stw_tls_data *data; diff -Nru mesa-12.0.6/src/gallium/state_trackers/xa/Makefile.in mesa-17.0.7/src/gallium/state_trackers/xa/Makefile.in --- mesa-12.0.6/src/gallium/state_trackers/xa/Makefile.in 2017-01-24 01:41:49.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/xa/Makefile.in 2017-06-01 10:37:21.000000000 +0000 @@ -112,10 +112,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -246,6 +249,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -260,6 +265,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -289,10 +295,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -342,11 +349,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -386,8 +390,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -424,8 +426,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -434,7 +434,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -442,13 +441,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -477,6 +477,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -595,12 +596,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -612,7 +609,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ -Wall -pedantic \ $(GALLIUM_CFLAGS) \ diff -Nru mesa-12.0.6/src/gallium/state_trackers/xa/xa_context.c mesa-17.0.7/src/gallium/state_trackers/xa/xa_context.c --- mesa-12.0.6/src/gallium/state_trackers/xa/xa_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/xa/xa_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -383,7 +383,7 @@ struct pipe_screen *screen = fence->xa->screen; boolean timed_out; - timed_out = !screen->fence_finish(screen, fence->pipe_fence, timeout); + timed_out = !screen->fence_finish(screen, NULL, fence->pipe_fence, timeout); if (timed_out) return -XA_ERR_BUSY; diff -Nru mesa-12.0.6/src/gallium/state_trackers/xa/xa_tgsi.c mesa-17.0.7/src/gallium/state_trackers/xa/xa_tgsi.c --- mesa-12.0.6/src/gallium/state_trackers/xa/xa_tgsi.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/xa/xa_tgsi.c 2017-06-01 10:37:10.000000000 +0000 @@ -239,10 +239,10 @@ ureg_MUL(ureg, temp0, ureg_scalar(const0124, TGSI_SWIZZLE_W), ureg_src(temp2)); ureg_MUL(ureg, temp3, ureg_src(temp1), ureg_src(temp1)); - ureg_SUB(ureg, temp2, ureg_src(temp3), ureg_src(temp0)); + ureg_ADD(ureg, temp2, ureg_src(temp3), ureg_negate(ureg_src(temp0))); ureg_RSQ(ureg, temp2, ureg_abs(ureg_src(temp2))); ureg_RCP(ureg, temp2, ureg_src(temp2)); - ureg_SUB(ureg, temp1, ureg_src(temp2), ureg_src(temp1)); + ureg_ADD(ureg, temp1, ureg_src(temp2), ureg_negate(ureg_src(temp1))); ureg_ADD(ureg, temp0, ureg_scalar(coords, TGSI_SWIZZLE_Z), ureg_scalar(coords, TGSI_SWIZZLE_Z)); diff -Nru mesa-12.0.6/src/gallium/state_trackers/xa/xa_tracker.c mesa-17.0.7/src/gallium/state_trackers/xa/xa_tracker.c --- mesa-12.0.6/src/gallium/state_trackers/xa/xa_tracker.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/xa/xa_tracker.c 2017-06-01 10:37:10.000000000 +0000 @@ -550,7 +550,8 @@ memset(&whandle, 0, sizeof(whandle)); whandle.type = handle_type(type); - res = screen->resource_get_handle(screen, srf->tex, &whandle, + res = screen->resource_get_handle(screen, srf->xa->default_ctx->pipe, + srf->tex, &whandle, PIPE_HANDLE_USAGE_READ_WRITE); if (!res) return -XA_ERR_INVAL; diff -Nru mesa-12.0.6/src/gallium/state_trackers/xvmc/attributes.c mesa-17.0.7/src/gallium/state_trackers/xvmc/attributes.c --- mesa-12.0.6/src/gallium/state_trackers/xvmc/attributes.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/xvmc/attributes.c 2017-06-01 10:37:10.000000000 +0000 @@ -110,7 +110,7 @@ context_priv->color_standard, &context_priv->procamp, true, &csc ); - vl_compositor_set_csc_matrix(&context_priv->cstate, (const vl_csc_matrix *)&csc); + vl_compositor_set_csc_matrix(&context_priv->cstate, (const vl_csc_matrix *)&csc, 1.0f, 0.0f); XVMC_MSG(XVMC_TRACE, "[XvMC] Set attribute %s to value %d.\n", attr, value); diff -Nru mesa-12.0.6/src/gallium/state_trackers/xvmc/context.c mesa-17.0.7/src/gallium/state_trackers/xvmc/context.c --- mesa-12.0.6/src/gallium/state_trackers/xvmc/context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/xvmc/context.c 2017-06-01 10:37:10.000000000 +0000 @@ -293,7 +293,7 @@ context_priv->color_standard, &context_priv->procamp, true, &csc ); - vl_compositor_set_csc_matrix(&context_priv->cstate, (const vl_csc_matrix *)&csc); + vl_compositor_set_csc_matrix(&context_priv->cstate, (const vl_csc_matrix *)&csc, 1.0f, 0.0f); context_priv->vscreen = vscreen; context_priv->pipe = pipe; diff -Nru mesa-12.0.6/src/gallium/state_trackers/xvmc/Makefile.in mesa-17.0.7/src/gallium/state_trackers/xvmc/Makefile.in --- mesa-12.0.6/src/gallium/state_trackers/xvmc/Makefile.in 2017-01-24 01:41:49.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/xvmc/Makefile.in 2017-06-01 10:37:21.000000000 +0000 @@ -113,10 +113,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -258,6 +261,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -272,6 +277,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -301,10 +307,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -354,11 +361,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -398,8 +402,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -436,8 +438,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -446,7 +446,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -454,13 +453,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -489,6 +489,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -606,12 +607,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -623,7 +620,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ $(GALLIUM_CFLAGS) \ $(VISIBILITY_CFLAGS) \ diff -Nru mesa-12.0.6/src/gallium/state_trackers/xvmc/surface.c mesa-17.0.7/src/gallium/state_trackers/xvmc/surface.c --- mesa-12.0.6/src/gallium/state_trackers/xvmc/surface.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/xvmc/surface.c 2017-06-01 10:37:10.000000000 +0000 @@ -34,6 +34,7 @@ #include "pipe/p_video_state.h" #include "pipe/p_state.h" +#include "util/macros.h" #include "util/u_inlines.h" #include "util/u_memory.h" #include "util/u_math.h" @@ -226,8 +227,8 @@ XvMCContextPrivate *context_priv; XvMCSurfacePrivate *target_surface_priv; - XvMCSurfacePrivate *past_surface_priv; - XvMCSurfacePrivate *future_surface_priv; + MAYBE_UNUSED XvMCSurfacePrivate *past_surface_priv; + MAYBE_UNUSED XvMCSurfacePrivate *future_surface_priv; XvMCMacroBlock *xvmc_mb; XVMC_MSG(XVMC_TRACE, "[XvMC] Rendering to surface %p, with past %p and future %p\n", @@ -488,7 +489,7 @@ *status = 0; if (surface_priv->fence) - if (!pipe->screen->fence_finish(pipe->screen, surface_priv->fence, 0)) + if (!pipe->screen->fence_finish(pipe->screen, NULL, surface_priv->fence, 0)) *status |= XVMC_RENDERING; return Success; diff -Nru mesa-12.0.6/src/gallium/state_trackers/xvmc/tests/xvmc_bench.c mesa-17.0.7/src/gallium/state_trackers/xvmc/tests/xvmc_bench.c --- mesa-12.0.6/src/gallium/state_trackers/xvmc/tests/xvmc_bench.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/state_trackers/xvmc/tests/xvmc_bench.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,6 +25,8 @@ * **************************************************************************/ +/* Force assertions, even on release builds. */ +#undef NDEBUG #include #include #include diff -Nru mesa-12.0.6/src/gallium/targets/d3dadapter9/drm.c mesa-17.0.7/src/gallium/targets/d3dadapter9/drm.c --- mesa-12.0.6/src/gallium/targets/d3dadapter9/drm.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/d3dadapter9/drm.c 2017-06-01 10:37:10.000000000 +0000 @@ -56,6 +56,9 @@ DRI_CONF_NINE_OVERRIDEVENDOR(-1) DRI_CONF_NINE_THROTTLE(-2) DRI_CONF_NINE_THREADSUBMIT("false") + DRI_CONF_NINE_ALLOWDISCARDDELAYEDRELEASE("true") + DRI_CONF_NINE_TEARFREEDISCARD("false") + DRI_CONF_NINE_CSMT(-1) DRI_CONF_SECTION_END DRI_CONF_END; @@ -284,6 +287,26 @@ override_vendorid = driQueryOptioni(&userInitOptions, "override_vendorid"); } + if (driCheckOption(&userInitOptions, "discard_delayed_release", DRI_BOOL)) + ctx->base.discard_delayed_release = driQueryOptionb(&userInitOptions, "discard_delayed_release"); + else + ctx->base.discard_delayed_release = TRUE; + + if (driCheckOption(&userInitOptions, "tearfree_discard", DRI_BOOL)) + ctx->base.tearfree_discard = driQueryOptionb(&userInitOptions, "tearfree_discard"); + else + ctx->base.tearfree_discard = FALSE; + + if (ctx->base.tearfree_discard && !ctx->base.discard_delayed_release) { + ERR("tearfree_discard requires discard_delayed_release\n"); + ctx->base.tearfree_discard = FALSE; + } + + if (driCheckOption(&userInitOptions, "csmt_force", DRI_INT)) + ctx->base.csmt_force = driQueryOptioni(&userInitOptions, "csmt_force"); + else + ctx->base.csmt_force = -1; + driDestroyOptionCache(&userInitOptions); driDestroyOptionInfo(&defaultInitOptions); diff -Nru mesa-12.0.6/src/gallium/targets/d3dadapter9/Makefile.am mesa-17.0.7/src/gallium/targets/d3dadapter9/Makefile.am --- mesa-12.0.6/src/gallium/targets/d3dadapter9/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/d3dadapter9/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -27,8 +27,8 @@ -I$(top_srcdir)/src/loader \ -I$(top_srcdir)/src/mapi/ \ -I$(top_srcdir)/src/mesa/ \ - -I$(top_srcdir)/src/mesa/drivers/dri/common/ \ -I$(top_builddir)/src/mesa/drivers/dri/common/ \ + -I$(top_srcdir)/src/mesa/drivers/dri/common/ \ -I$(top_srcdir)/src/gallium/winsys \ -I$(top_srcdir)/src/gallium/state_trackers/nine \ $(GALLIUM_TARGET_CFLAGS) \ @@ -114,7 +114,7 @@ endif # HAVE_GALLIUM_STATIC_TARGETS -if HAVE_MESA_LLVM +if HAVE_GALLIUM_LLVM nodist_EXTRA_d3dadapter9_la_SOURCES = dummy.cpp d3dadapter9_la_LDFLAGS += $(LLVM_LDFLAGS) d3dadapter9_la_LIBADD += $(LLVM_LIBS) diff -Nru mesa-12.0.6/src/gallium/targets/d3dadapter9/Makefile.in mesa-17.0.7/src/gallium/targets/d3dadapter9/Makefile.in --- mesa-12.0.6/src/gallium/targets/d3dadapter9/Makefile.in 2017-01-24 01:41:49.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/d3dadapter9/Makefile.in 2017-06-01 10:37:21.000000000 +0000 @@ -113,90 +113,94 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) -@HAVE_LD_VERSION_SCRIPT_TRUE@am__append_3 = \ +@HAVE_LD_VERSION_SCRIPT_TRUE@am__append_4 = \ @HAVE_LD_VERSION_SCRIPT_TRUE@ -Wl,--version-script=$(top_srcdir)/src/gallium/targets/d3dadapter9/d3dadapter9.sym -@HAVE_GALLIUM_I915_TRUE@am__append_4 = i915 -@HAVE_GALLIUM_I915_TRUE@am__append_5 = -DGALLIUM_I915 -@HAVE_GALLIUM_I915_TRUE@am__append_6 = \ +@HAVE_GALLIUM_I915_TRUE@am__append_5 = i915 +@HAVE_GALLIUM_I915_TRUE@am__append_6 = -DGALLIUM_I915 +@HAVE_GALLIUM_I915_TRUE@am__append_7 = \ @HAVE_GALLIUM_I915_TRUE@ $(top_builddir)/src/gallium/winsys/i915/drm/libi915drm.la \ @HAVE_GALLIUM_I915_TRUE@ $(top_builddir)/src/gallium/drivers/i915/libi915.la \ @HAVE_GALLIUM_I915_TRUE@ $(INTEL_LIBS) \ @HAVE_GALLIUM_I915_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_ILO_TRUE@am__append_7 = ilo -@HAVE_GALLIUM_ILO_TRUE@am__append_8 = -DGALLIUM_ILO -@HAVE_GALLIUM_ILO_TRUE@am__append_9 = \ +@HAVE_GALLIUM_ILO_TRUE@am__append_8 = ilo +@HAVE_GALLIUM_ILO_TRUE@am__append_9 = -DGALLIUM_ILO +@HAVE_GALLIUM_ILO_TRUE@am__append_10 = \ @HAVE_GALLIUM_ILO_TRUE@ $(top_builddir)/src/gallium/winsys/intel/drm/libintelwinsys.la \ @HAVE_GALLIUM_ILO_TRUE@ $(top_builddir)/src/gallium/drivers/ilo/libilo.la \ @HAVE_GALLIUM_ILO_TRUE@ $(INTEL_LIBS) \ @HAVE_GALLIUM_ILO_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_NOUVEAU_TRUE@am__append_10 = nouveau -@HAVE_GALLIUM_NOUVEAU_TRUE@am__append_11 = -DGALLIUM_NOUVEAU -@HAVE_GALLIUM_NOUVEAU_TRUE@am__append_12 = \ +@HAVE_GALLIUM_NOUVEAU_TRUE@am__append_11 = nouveau +@HAVE_GALLIUM_NOUVEAU_TRUE@am__append_12 = -DGALLIUM_NOUVEAU +@HAVE_GALLIUM_NOUVEAU_TRUE@am__append_13 = \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(top_builddir)/src/gallium/winsys/nouveau/drm/libnouveaudrm.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(top_builddir)/src/gallium/drivers/nouveau/libnouveau.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(NOUVEAU_LIBS) \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_R300_TRUE@am__append_13 = r300 -@HAVE_GALLIUM_R300_TRUE@am__append_14 = -DGALLIUM_R300 -@HAVE_GALLIUM_R300_TRUE@am__append_15 = \ +@HAVE_GALLIUM_R300_TRUE@am__append_14 = r300 +@HAVE_GALLIUM_R300_TRUE@am__append_15 = -DGALLIUM_R300 +@HAVE_GALLIUM_R300_TRUE@am__append_16 = \ @HAVE_GALLIUM_R300_TRUE@ $(top_builddir)/src/gallium/drivers/r300/libr300.la \ @HAVE_GALLIUM_R300_TRUE@ $(RADEON_LIBS) \ @HAVE_GALLIUM_R300_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_R600_TRUE@am__append_16 = r600 -@HAVE_GALLIUM_R600_TRUE@am__append_17 = -DGALLIUM_R600 -@HAVE_GALLIUM_R600_TRUE@am__append_18 = \ +@HAVE_GALLIUM_R600_TRUE@am__append_17 = r600 +@HAVE_GALLIUM_R600_TRUE@am__append_18 = -DGALLIUM_R600 +@HAVE_GALLIUM_R600_TRUE@am__append_19 = \ @HAVE_GALLIUM_R600_TRUE@ $(top_builddir)/src/gallium/drivers/r600/libr600.la \ @HAVE_GALLIUM_R600_TRUE@ $(RADEON_LIBS) \ @HAVE_GALLIUM_R600_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_RADEONSI_TRUE@am__append_19 = radeonsi -@HAVE_GALLIUM_RADEONSI_TRUE@am__append_20 = -DGALLIUM_RADEONSI -@HAVE_GALLIUM_RADEONSI_TRUE@am__append_21 = \ +@HAVE_GALLIUM_RADEONSI_TRUE@am__append_20 = radeonsi +@HAVE_GALLIUM_RADEONSI_TRUE@am__append_21 = -DGALLIUM_RADEONSI +@HAVE_GALLIUM_RADEONSI_TRUE@am__append_22 = \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(top_builddir)/src/gallium/drivers/radeonsi/libradeonsi.la \ +@HAVE_GALLIUM_RADEONSI_TRUE@ $(top_builddir)/src/amd/common/libamd_common.la \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(RADEON_LIBS) \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(LIBDRM_LIBS) \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(AMDGPU_LIBS) -@HAVE_GALLIUM_SVGA_TRUE@am__append_22 = vmwgfx -@HAVE_GALLIUM_SVGA_TRUE@am__append_23 = -DGALLIUM_VMWGFX -@HAVE_GALLIUM_SVGA_TRUE@am__append_24 = \ +@HAVE_GALLIUM_SVGA_TRUE@am__append_23 = vmwgfx +@HAVE_GALLIUM_SVGA_TRUE@am__append_24 = -DGALLIUM_VMWGFX +@HAVE_GALLIUM_SVGA_TRUE@am__append_25 = \ @HAVE_GALLIUM_SVGA_TRUE@ $(top_builddir)/src/gallium/winsys/svga/drm/libsvgadrm.la \ @HAVE_GALLIUM_SVGA_TRUE@ $(top_builddir)/src/gallium/drivers/svga/libsvga.la \ @HAVE_GALLIUM_SVGA_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_SOFTPIPE_TRUE@am__append_25 = swrast -@HAVE_GALLIUM_SOFTPIPE_TRUE@am__append_26 = -DGALLIUM_SOFTPIPE -@HAVE_GALLIUM_SOFTPIPE_TRUE@am__append_27 = \ +@HAVE_GALLIUM_SOFTPIPE_TRUE@am__append_26 = swrast +@HAVE_GALLIUM_SOFTPIPE_TRUE@am__append_27 = -DGALLIUM_SOFTPIPE +@HAVE_GALLIUM_SOFTPIPE_TRUE@am__append_28 = \ @HAVE_GALLIUM_SOFTPIPE_TRUE@ $(top_builddir)/src/gallium/drivers/softpipe/libsoftpipe.la -@HAVE_DRISW_KMS_TRUE@@HAVE_GALLIUM_SOFTPIPE_TRUE@am__append_28 = kms_swrast -@HAVE_GALLIUM_LLVMPIPE_TRUE@am__append_29 = -DGALLIUM_LLVMPIPE -@HAVE_GALLIUM_LLVMPIPE_TRUE@am__append_30 = \ +@HAVE_DRISW_KMS_TRUE@@HAVE_GALLIUM_SOFTPIPE_TRUE@am__append_29 = kms_swrast +@HAVE_GALLIUM_LLVMPIPE_TRUE@am__append_30 = -DGALLIUM_LLVMPIPE +@HAVE_GALLIUM_LLVMPIPE_TRUE@am__append_31 = \ @HAVE_GALLIUM_LLVMPIPE_TRUE@ $(top_builddir)/src/gallium/drivers/llvmpipe/libllvmpipe.la -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_31 = \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_32 = \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_static.la \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(GALLIUM_PIPE_LOADER_WINSYS_LIBS) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(TARGET_LIB_DEPS) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(TARGET_RADEON_WINSYS) $(TARGET_RADEON_COMMON) -@HAVE_GALLIUM_STATIC_TARGETS_FALSE@am__append_32 = \ +@HAVE_GALLIUM_STATIC_TARGETS_FALSE@am__append_33 = \ @HAVE_GALLIUM_STATIC_TARGETS_FALSE@ $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_dynamic.la -@HAVE_MESA_LLVM_TRUE@am__append_33 = $(LLVM_LDFLAGS) -@HAVE_MESA_LLVM_TRUE@am__append_34 = $(LLVM_LIBS) +@HAVE_GALLIUM_LLVM_TRUE@am__append_34 = $(LLVM_LDFLAGS) +@HAVE_GALLIUM_LLVM_TRUE@am__append_35 = $(LLVM_LIBS) subdir = src/gallium/targets/d3dadapter9 ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps = $(top_srcdir)/m4/ax_check_gnu_make.m4 \ @@ -247,49 +251,52 @@ "$(DESTDIR)$(d3dadapterdir)" LTLIBRARIES = $(nine_LTLIBRARIES) am__DEPENDENCIES_1 = -am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ - $(am__DEPENDENCIES_1) -@HAVE_DRISW_KMS_TRUE@am__DEPENDENCIES_3 = $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ +@HAVE_LIBDRM_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) +am__DEPENDENCIES_3 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_2) +@HAVE_DRISW_KMS_TRUE@am__DEPENDENCIES_4 = $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(am__DEPENDENCIES_1) -am__DEPENDENCIES_4 = \ +am__DEPENDENCIES_5 = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__DEPENDENCIES_3) -@HAVE_GALLIUM_I915_TRUE@am__DEPENDENCIES_5 = $(top_builddir)/src/gallium/winsys/i915/drm/libi915drm.la \ + $(am__append_2) $(am__DEPENDENCIES_4) +@HAVE_GALLIUM_I915_TRUE@am__DEPENDENCIES_6 = $(top_builddir)/src/gallium/winsys/i915/drm/libi915drm.la \ @HAVE_GALLIUM_I915_TRUE@ $(top_builddir)/src/gallium/drivers/i915/libi915.la \ @HAVE_GALLIUM_I915_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_I915_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_ILO_TRUE@am__DEPENDENCIES_6 = $(top_builddir)/src/gallium/winsys/intel/drm/libintelwinsys.la \ +@HAVE_GALLIUM_ILO_TRUE@am__DEPENDENCIES_7 = $(top_builddir)/src/gallium/winsys/intel/drm/libintelwinsys.la \ @HAVE_GALLIUM_ILO_TRUE@ $(top_builddir)/src/gallium/drivers/ilo/libilo.la \ @HAVE_GALLIUM_ILO_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_ILO_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_NOUVEAU_TRUE@am__DEPENDENCIES_7 = $(top_builddir)/src/gallium/winsys/nouveau/drm/libnouveaudrm.la \ +@HAVE_GALLIUM_NOUVEAU_TRUE@am__DEPENDENCIES_8 = $(top_builddir)/src/gallium/winsys/nouveau/drm/libnouveaudrm.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(top_builddir)/src/gallium/drivers/nouveau/libnouveau.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_R300_TRUE@am__DEPENDENCIES_8 = $(top_builddir)/src/gallium/drivers/r300/libr300.la \ +@HAVE_GALLIUM_R300_TRUE@am__DEPENDENCIES_9 = $(top_builddir)/src/gallium/drivers/r300/libr300.la \ @HAVE_GALLIUM_R300_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_R300_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_R600_TRUE@am__DEPENDENCIES_9 = $(top_builddir)/src/gallium/drivers/r600/libr600.la \ +@HAVE_GALLIUM_R600_TRUE@am__DEPENDENCIES_10 = $(top_builddir)/src/gallium/drivers/r600/libr600.la \ @HAVE_GALLIUM_R600_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_R600_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_RADEONSI_TRUE@am__DEPENDENCIES_10 = $(top_builddir)/src/gallium/drivers/radeonsi/libradeonsi.la \ +@HAVE_GALLIUM_RADEONSI_TRUE@am__DEPENDENCIES_11 = $(top_builddir)/src/gallium/drivers/radeonsi/libradeonsi.la \ +@HAVE_GALLIUM_RADEONSI_TRUE@ $(top_builddir)/src/amd/common/libamd_common.la \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_SVGA_TRUE@am__DEPENDENCIES_11 = $(top_builddir)/src/gallium/winsys/svga/drm/libsvgadrm.la \ +@HAVE_GALLIUM_SVGA_TRUE@am__DEPENDENCIES_12 = $(top_builddir)/src/gallium/winsys/svga/drm/libsvgadrm.la \ @HAVE_GALLIUM_SVGA_TRUE@ $(top_builddir)/src/gallium/drivers/svga/libsvga.la \ @HAVE_GALLIUM_SVGA_TRUE@ $(am__DEPENDENCIES_1) -am__DEPENDENCIES_12 = $(am__DEPENDENCIES_5) $(am__DEPENDENCIES_6) \ - $(am__DEPENDENCIES_7) $(am__DEPENDENCIES_8) \ - $(am__DEPENDENCIES_9) $(am__DEPENDENCIES_10) \ - $(am__DEPENDENCIES_11) $(am__append_27) $(am__append_30) -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_13 = $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_static.la \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_4) \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_12) \ +am__DEPENDENCIES_13 = $(am__DEPENDENCIES_6) $(am__DEPENDENCIES_7) \ + $(am__DEPENDENCIES_8) $(am__DEPENDENCIES_9) \ + $(am__DEPENDENCIES_10) $(am__DEPENDENCIES_11) \ + $(am__DEPENDENCIES_12) $(am__append_28) $(am__append_31) +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_14 = $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_static.la \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_5) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_13) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(TARGET_RADEON_WINSYS) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(TARGET_RADEON_COMMON) -@HAVE_MESA_LLVM_TRUE@am__DEPENDENCIES_14 = $(am__DEPENDENCIES_1) +@HAVE_GALLIUM_LLVM_TRUE@am__DEPENDENCIES_15 = $(am__DEPENDENCIES_1) d3dadapter9_la_DEPENDENCIES = \ $(top_builddir)/src/gallium/auxiliary/libgalliumvl_stub.la \ $(top_builddir)/src/gallium/auxiliary/libgallium.la \ @@ -298,8 +305,8 @@ $(top_builddir)/src/gallium/drivers/ddebug/libddebug.la \ $(top_builddir)/src/gallium/drivers/rbug/librbug.la \ $(top_builddir)/src/gallium/drivers/trace/libtrace.la \ - $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_2) \ - $(am__DEPENDENCIES_13) $(am__append_32) $(am__DEPENDENCIES_14) + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_3) \ + $(am__DEPENDENCIES_14) $(am__append_33) $(am__DEPENDENCIES_15) am_d3dadapter9_la_OBJECTS = d3dadapter9_la-description.lo \ d3dadapter9_la-getproc.lo d3dadapter9_la-drm.lo d3dadapter9_la_OBJECTS = $(am_d3dadapter9_la_OBJECTS) @@ -410,6 +417,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -424,6 +433,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -453,10 +463,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -506,11 +517,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -550,8 +558,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -588,8 +594,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -598,7 +602,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -606,13 +609,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -641,6 +645,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -750,12 +755,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -767,14 +768,14 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ -I$(top_srcdir)/include/D3D9 \ -I$(top_srcdir)/src/loader \ -I$(top_srcdir)/src/mapi/ \ -I$(top_srcdir)/src/mesa/ \ - -I$(top_srcdir)/src/mesa/drivers/dri/common/ \ -I$(top_builddir)/src/mesa/drivers/dri/common/ \ + -I$(top_srcdir)/src/mesa/drivers/dri/common/ \ -I$(top_srcdir)/src/gallium/winsys \ -I$(top_srcdir)/src/gallium/state_trackers/nine \ $(GALLIUM_TARGET_CFLAGS) \ @@ -797,8 +798,8 @@ d3dadapter9_la_LDFLAGS = -shared -shrext .so -module -no-undefined \ -version-number $(NINE_MAJOR):$(NINE_MINOR):$(NINE_TINY) \ - $(GC_SECTIONS) $(LD_NO_UNDEFINED) $(am__append_3) \ - $(am__append_33) + $(GC_SECTIONS) $(LD_NO_UNDEFINED) $(am__append_4) \ + $(am__append_34) d3dadapter9_la_LIBADD = \ $(top_builddir)/src/gallium/auxiliary/libgalliumvl_stub.la \ $(top_builddir)/src/gallium/auxiliary/libgallium.la \ @@ -807,19 +808,19 @@ $(top_builddir)/src/gallium/drivers/ddebug/libddebug.la \ $(top_builddir)/src/gallium/drivers/rbug/librbug.la \ $(top_builddir)/src/gallium/drivers/trace/libtrace.la \ - $(EXPAT_LIBS) $(GALLIUM_COMMON_LIB_DEPS) $(am__append_31) \ - $(am__append_32) $(am__append_34) + $(EXPAT_LIBS) $(GALLIUM_COMMON_LIB_DEPS) $(am__append_32) \ + $(am__append_33) $(am__append_35) EXTRA_d3dadapter9_la_DEPENDENCIES = d3dadapter9.sym EXTRA_DIST = d3dadapter9.sym -TARGET_DRIVERS = $(am__append_4) $(am__append_7) $(am__append_10) \ - $(am__append_13) $(am__append_16) $(am__append_19) \ - $(am__append_22) $(am__append_25) $(am__append_28) -TARGET_CPPFLAGS = $(am__append_5) $(am__append_8) $(am__append_11) \ +TARGET_DRIVERS = $(am__append_5) $(am__append_8) $(am__append_11) \ $(am__append_14) $(am__append_17) $(am__append_20) \ $(am__append_23) $(am__append_26) $(am__append_29) -TARGET_LIB_DEPS = $(am__append_6) $(am__append_9) $(am__append_12) \ +TARGET_CPPFLAGS = $(am__append_6) $(am__append_9) $(am__append_12) \ $(am__append_15) $(am__append_18) $(am__append_21) \ $(am__append_24) $(am__append_27) $(am__append_30) +TARGET_LIB_DEPS = $(am__append_7) $(am__append_10) $(am__append_13) \ + $(am__append_16) $(am__append_19) $(am__append_22) \ + $(am__append_25) $(am__append_28) $(am__append_31) @HAVE_GALLIUM_R300_TRUE@TARGET_RADEON_WINSYS = \ @HAVE_GALLIUM_R300_TRUE@ $(top_builddir)/src/gallium/winsys/radeon/drm/libradeonwinsys.la @@ -837,7 +838,7 @@ @HAVE_GALLIUM_RADEONSI_TRUE@ $(top_builddir)/src/gallium/drivers/radeon/libradeon.la @HAVE_GALLIUM_STATIC_TARGETS_TRUE@d3dadapter9_la_CPPFLAGS = $(AM_CPPFLAGS) $(TARGET_CPPFLAGS) -@HAVE_MESA_LLVM_TRUE@nodist_EXTRA_d3dadapter9_la_SOURCES = dummy.cpp +@HAVE_GALLIUM_LLVM_TRUE@nodist_EXTRA_d3dadapter9_la_SOURCES = dummy.cpp d3dadapterdir = $(includedir)/d3dadapter d3dadapter_HEADERS = \ $(top_srcdir)/include/d3dadapter/d3dadapter9.h \ diff -Nru mesa-12.0.6/src/gallium/targets/dri/Makefile.am mesa-17.0.7/src/gallium/targets/dri/Makefile.am --- mesa-12.0.6/src/gallium/targets/dri/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/dri/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -1,10 +1,8 @@ include $(top_srcdir)/src/gallium/Automake.inc -if HAVE_ANDROID if HAVE_SHARED_GLAPI SHARED_GLAPI_LIB = $(top_builddir)/src/mapi/shared-glapi/libglapi.la endif -endif AM_CFLAGS = \ -I$(top_srcdir)/src/mapi \ @@ -31,8 +29,10 @@ -shared \ -shrext .so \ -module \ + -no-undefined \ -avoid-version \ - $(GC_SECTIONS) + $(GC_SECTIONS) \ + $(LD_NO_UNDEFINED) if HAVE_LD_VERSION_SCRIPT gallium_dri_la_LDFLAGS += \ @@ -91,6 +91,9 @@ include $(top_srcdir)/src/gallium/drivers/virgl/Automake.inc +include $(top_srcdir)/src/gallium/drivers/etnaviv/Automake.inc +include $(top_srcdir)/src/gallium/drivers/imx/Automake.inc + include $(top_srcdir)/src/gallium/drivers/softpipe/Automake.inc include $(top_srcdir)/src/gallium/drivers/llvmpipe/Automake.inc include $(top_srcdir)/src/gallium/drivers/swr/Automake.inc @@ -112,7 +115,7 @@ endif # HAVE_GALLIUM_STATIC_TARGETS -if HAVE_MESA_LLVM +if HAVE_GALLIUM_LLVM gallium_dri_la_LIBADD += $(LLVM_LIBS) gallium_dri_la_LDFLAGS += $(LLVM_LDFLAGS) endif diff -Nru mesa-12.0.6/src/gallium/targets/dri/Makefile.in mesa-17.0.7/src/gallium/targets/dri/Makefile.in --- mesa-12.0.6/src/gallium/targets/dri/Makefile.in 2017-01-24 01:41:50.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/dri/Makefile.in 2017-06-01 10:37:21.000000000 +0000 @@ -89,121 +89,139 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) -@HAVE_LD_VERSION_SCRIPT_TRUE@am__append_3 = \ +@HAVE_LD_VERSION_SCRIPT_TRUE@am__append_4 = \ @HAVE_LD_VERSION_SCRIPT_TRUE@ -Wl,--version-script=$(top_srcdir)/src/gallium/targets/dri/dri.sym -@HAVE_LD_DYNAMIC_LIST_TRUE@am__append_4 = \ +@HAVE_LD_DYNAMIC_LIST_TRUE@am__append_5 = \ @HAVE_LD_DYNAMIC_LIST_TRUE@ -Wl,--dynamic-list=$(top_srcdir)/src/gallium/targets/dri-vdpau.dyn -@HAVE_GALLIUM_I915_TRUE@am__append_5 = i915 -@HAVE_GALLIUM_I915_TRUE@am__append_6 = -DGALLIUM_I915 -@HAVE_GALLIUM_I915_TRUE@am__append_7 = \ +@HAVE_GALLIUM_I915_TRUE@am__append_6 = i915 +@HAVE_GALLIUM_I915_TRUE@am__append_7 = -DGALLIUM_I915 +@HAVE_GALLIUM_I915_TRUE@am__append_8 = \ @HAVE_GALLIUM_I915_TRUE@ $(top_builddir)/src/gallium/winsys/i915/drm/libi915drm.la \ @HAVE_GALLIUM_I915_TRUE@ $(top_builddir)/src/gallium/drivers/i915/libi915.la \ @HAVE_GALLIUM_I915_TRUE@ $(INTEL_LIBS) \ @HAVE_GALLIUM_I915_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_ILO_TRUE@am__append_8 = ilo -@HAVE_GALLIUM_ILO_TRUE@am__append_9 = -DGALLIUM_ILO -@HAVE_GALLIUM_ILO_TRUE@am__append_10 = \ +@HAVE_GALLIUM_ILO_TRUE@am__append_9 = ilo +@HAVE_GALLIUM_ILO_TRUE@am__append_10 = -DGALLIUM_ILO +@HAVE_GALLIUM_ILO_TRUE@am__append_11 = \ @HAVE_GALLIUM_ILO_TRUE@ $(top_builddir)/src/gallium/winsys/intel/drm/libintelwinsys.la \ @HAVE_GALLIUM_ILO_TRUE@ $(top_builddir)/src/gallium/drivers/ilo/libilo.la \ @HAVE_GALLIUM_ILO_TRUE@ $(INTEL_LIBS) \ @HAVE_GALLIUM_ILO_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_NOUVEAU_TRUE@am__append_11 = nouveau -@HAVE_GALLIUM_NOUVEAU_TRUE@am__append_12 = -DGALLIUM_NOUVEAU -@HAVE_GALLIUM_NOUVEAU_TRUE@am__append_13 = \ +@HAVE_GALLIUM_NOUVEAU_TRUE@am__append_12 = nouveau +@HAVE_GALLIUM_NOUVEAU_TRUE@am__append_13 = -DGALLIUM_NOUVEAU +@HAVE_GALLIUM_NOUVEAU_TRUE@am__append_14 = \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(top_builddir)/src/gallium/winsys/nouveau/drm/libnouveaudrm.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(top_builddir)/src/gallium/drivers/nouveau/libnouveau.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(NOUVEAU_LIBS) \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_R300_TRUE@am__append_14 = r300 -@HAVE_GALLIUM_R300_TRUE@am__append_15 = -DGALLIUM_R300 -@HAVE_GALLIUM_R300_TRUE@am__append_16 = \ +@HAVE_GALLIUM_R300_TRUE@am__append_15 = r300 +@HAVE_GALLIUM_R300_TRUE@am__append_16 = -DGALLIUM_R300 +@HAVE_GALLIUM_R300_TRUE@am__append_17 = \ @HAVE_GALLIUM_R300_TRUE@ $(top_builddir)/src/gallium/drivers/r300/libr300.la \ @HAVE_GALLIUM_R300_TRUE@ $(RADEON_LIBS) \ @HAVE_GALLIUM_R300_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_R600_TRUE@am__append_17 = r600 -@HAVE_GALLIUM_R600_TRUE@am__append_18 = -DGALLIUM_R600 -@HAVE_GALLIUM_R600_TRUE@am__append_19 = \ +@HAVE_GALLIUM_R600_TRUE@am__append_18 = r600 +@HAVE_GALLIUM_R600_TRUE@am__append_19 = -DGALLIUM_R600 +@HAVE_GALLIUM_R600_TRUE@am__append_20 = \ @HAVE_GALLIUM_R600_TRUE@ $(top_builddir)/src/gallium/drivers/r600/libr600.la \ @HAVE_GALLIUM_R600_TRUE@ $(RADEON_LIBS) \ @HAVE_GALLIUM_R600_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_RADEONSI_TRUE@am__append_20 = radeonsi -@HAVE_GALLIUM_RADEONSI_TRUE@am__append_21 = -DGALLIUM_RADEONSI -@HAVE_GALLIUM_RADEONSI_TRUE@am__append_22 = \ +@HAVE_GALLIUM_RADEONSI_TRUE@am__append_21 = radeonsi +@HAVE_GALLIUM_RADEONSI_TRUE@am__append_22 = -DGALLIUM_RADEONSI +@HAVE_GALLIUM_RADEONSI_TRUE@am__append_23 = \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(top_builddir)/src/gallium/drivers/radeonsi/libradeonsi.la \ +@HAVE_GALLIUM_RADEONSI_TRUE@ $(top_builddir)/src/amd/common/libamd_common.la \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(RADEON_LIBS) \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(LIBDRM_LIBS) \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(AMDGPU_LIBS) -@HAVE_GALLIUM_SVGA_TRUE@am__append_23 = vmwgfx -@HAVE_GALLIUM_SVGA_TRUE@am__append_24 = -DGALLIUM_VMWGFX -@HAVE_GALLIUM_SVGA_TRUE@am__append_25 = \ +@HAVE_GALLIUM_SVGA_TRUE@am__append_24 = vmwgfx +@HAVE_GALLIUM_SVGA_TRUE@am__append_25 = -DGALLIUM_VMWGFX +@HAVE_GALLIUM_SVGA_TRUE@am__append_26 = \ @HAVE_GALLIUM_SVGA_TRUE@ $(top_builddir)/src/gallium/winsys/svga/drm/libsvgadrm.la \ @HAVE_GALLIUM_SVGA_TRUE@ $(top_builddir)/src/gallium/drivers/svga/libsvga.la \ @HAVE_GALLIUM_SVGA_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_FREEDRENO_TRUE@am__append_26 = msm kgsl -@HAVE_GALLIUM_FREEDRENO_TRUE@am__append_27 = -DGALLIUM_FREEDRENO -@HAVE_GALLIUM_FREEDRENO_TRUE@am__append_28 = \ +@HAVE_GALLIUM_FREEDRENO_TRUE@am__append_27 = msm kgsl +@HAVE_GALLIUM_FREEDRENO_TRUE@am__append_28 = -DGALLIUM_FREEDRENO +@HAVE_GALLIUM_FREEDRENO_TRUE@am__append_29 = \ @HAVE_GALLIUM_FREEDRENO_TRUE@ $(top_builddir)/src/gallium/winsys/freedreno/drm/libfreedrenodrm.la \ @HAVE_GALLIUM_FREEDRENO_TRUE@ $(top_builddir)/src/gallium/drivers/freedreno/libfreedreno.la \ @HAVE_GALLIUM_FREEDRENO_TRUE@ $(FREEDRENO_LIBS) \ @HAVE_GALLIUM_FREEDRENO_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_VC4_TRUE@am__append_29 = vc4 -@HAVE_GALLIUM_VC4_TRUE@am__append_30 = -DGALLIUM_VC4 -@HAVE_GALLIUM_VC4_TRUE@am__append_31 = \ +@HAVE_GALLIUM_VC4_TRUE@am__append_30 = vc4 +@HAVE_GALLIUM_VC4_TRUE@am__append_31 = -DGALLIUM_VC4 +@HAVE_GALLIUM_VC4_TRUE@am__append_32 = \ @HAVE_GALLIUM_VC4_TRUE@ $(top_builddir)/src/gallium/winsys/vc4/drm/libvc4drm.la \ @HAVE_GALLIUM_VC4_TRUE@ $(top_builddir)/src/gallium/drivers/vc4/libvc4.la -@HAVE_GALLIUM_VIRGL_TRUE@am__append_32 = virtio_gpu -@HAVE_GALLIUM_VIRGL_TRUE@am__append_33 = -DGALLIUM_VIRGL -@HAVE_GALLIUM_VIRGL_TRUE@am__append_34 = \ +@HAVE_GALLIUM_VIRGL_TRUE@am__append_33 = virtio_gpu +@HAVE_GALLIUM_VIRGL_TRUE@am__append_34 = -DGALLIUM_VIRGL +@HAVE_GALLIUM_VIRGL_TRUE@am__append_35 = \ @HAVE_GALLIUM_VIRGL_TRUE@ $(top_builddir)/src/gallium/drivers/virgl/libvirgl.la \ @HAVE_GALLIUM_VIRGL_TRUE@ $(top_builddir)/src/gallium/winsys/virgl/drm/libvirgldrm.la \ @HAVE_GALLIUM_VIRGL_TRUE@ $(top_builddir)/src/gallium/winsys/virgl/vtest/libvirglvtest.la \ @HAVE_GALLIUM_VIRGL_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_SOFTPIPE_TRUE@am__append_35 = swrast -@HAVE_GALLIUM_SOFTPIPE_TRUE@am__append_36 = -DGALLIUM_SOFTPIPE -@HAVE_GALLIUM_SOFTPIPE_TRUE@am__append_37 = \ +@HAVE_GALLIUM_ETNAVIV_TRUE@am__append_36 = etnaviv +@HAVE_GALLIUM_ETNAVIV_TRUE@am__append_37 = -DGALLIUM_ETNAVIV +@HAVE_GALLIUM_ETNAVIV_TRUE@am__append_38 = \ +@HAVE_GALLIUM_ETNAVIV_TRUE@ $(top_builddir)/src/gallium/winsys/etnaviv/drm/libetnavivdrm.la \ +@HAVE_GALLIUM_ETNAVIV_TRUE@ $(top_builddir)/src/gallium/drivers/etnaviv/libetnaviv.la \ +@HAVE_GALLIUM_ETNAVIV_TRUE@ $(ETNAVIV_LIBS) \ +@HAVE_GALLIUM_ETNAVIV_TRUE@ $(LIBDRM_LIBS) + +@HAVE_GALLIUM_IMX_TRUE@am__append_39 = imx-drm +@HAVE_GALLIUM_IMX_TRUE@am__append_40 = -DGALLIUM_IMX +@HAVE_GALLIUM_IMX_TRUE@am__append_41 = \ +@HAVE_GALLIUM_IMX_TRUE@ $(top_builddir)/src/gallium/winsys/imx/drm/libimxdrm.la \ +@HAVE_GALLIUM_IMX_TRUE@ $(LIBDRM_LIBS) + +@HAVE_GALLIUM_SOFTPIPE_TRUE@am__append_42 = swrast +@HAVE_GALLIUM_SOFTPIPE_TRUE@am__append_43 = -DGALLIUM_SOFTPIPE +@HAVE_GALLIUM_SOFTPIPE_TRUE@am__append_44 = \ @HAVE_GALLIUM_SOFTPIPE_TRUE@ $(top_builddir)/src/gallium/drivers/softpipe/libsoftpipe.la -@HAVE_DRISW_KMS_TRUE@@HAVE_GALLIUM_SOFTPIPE_TRUE@am__append_38 = kms_swrast -@HAVE_GALLIUM_LLVMPIPE_TRUE@am__append_39 = -DGALLIUM_LLVMPIPE -@HAVE_GALLIUM_LLVMPIPE_TRUE@am__append_40 = \ +@HAVE_DRISW_KMS_TRUE@@HAVE_GALLIUM_SOFTPIPE_TRUE@am__append_45 = kms_swrast +@HAVE_GALLIUM_LLVMPIPE_TRUE@am__append_46 = -DGALLIUM_LLVMPIPE +@HAVE_GALLIUM_LLVMPIPE_TRUE@am__append_47 = \ @HAVE_GALLIUM_LLVMPIPE_TRUE@ $(top_builddir)/src/gallium/drivers/llvmpipe/libllvmpipe.la -@HAVE_GALLIUM_SWR_TRUE@am__append_41 = swrast -@HAVE_GALLIUM_SWR_TRUE@am__append_42 = -DGALLIUM_SWR -@HAVE_GALLIUM_SWR_TRUE@am__append_43 = \ +@HAVE_GALLIUM_SWR_TRUE@am__append_48 = swrast +@HAVE_GALLIUM_SWR_TRUE@am__append_49 = -DGALLIUM_SWR +@HAVE_GALLIUM_SWR_TRUE@am__append_50 = \ @HAVE_GALLIUM_SWR_TRUE@ $(top_builddir)/src/gallium/drivers/swr/libmesaswr.la -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_44 = target.c -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_45 = \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_51 = target.c +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_52 = \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_static.la \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(GALLIUM_PIPE_LOADER_WINSYS_LIBS) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(TARGET_LIB_DEPS) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(TARGET_RADEON_WINSYS) $(TARGET_RADEON_COMMON) -@HAVE_GALLIUM_STATIC_TARGETS_FALSE@am__append_46 = \ +@HAVE_GALLIUM_STATIC_TARGETS_FALSE@am__append_53 = \ @HAVE_GALLIUM_STATIC_TARGETS_FALSE@ $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_dynamic.la -@HAVE_MESA_LLVM_TRUE@am__append_47 = $(LLVM_LIBS) -@HAVE_MESA_LLVM_TRUE@am__append_48 = $(LLVM_LDFLAGS) +@HAVE_GALLIUM_LLVM_TRUE@am__append_54 = $(LLVM_LIBS) +@HAVE_GALLIUM_LLVM_TRUE@am__append_55 = $(LLVM_LDFLAGS) subdir = src/gallium/targets/dri ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps = $(top_srcdir)/m4/ax_check_gnu_make.m4 \ @@ -252,59 +270,69 @@ am__installdirs = "$(DESTDIR)$(dridir)" LTLIBRARIES = $(dri_LTLIBRARIES) am__DEPENDENCIES_1 = -am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ - $(am__DEPENDENCIES_1) -@HAVE_DRISW_KMS_TRUE@am__DEPENDENCIES_3 = $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ +@HAVE_LIBDRM_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) +am__DEPENDENCIES_3 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_2) +@HAVE_DRISW_KMS_TRUE@am__DEPENDENCIES_4 = $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(am__DEPENDENCIES_1) -am__DEPENDENCIES_4 = \ +am__DEPENDENCIES_5 = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__DEPENDENCIES_3) -@HAVE_GALLIUM_I915_TRUE@am__DEPENDENCIES_5 = $(top_builddir)/src/gallium/winsys/i915/drm/libi915drm.la \ + $(am__append_2) $(am__DEPENDENCIES_4) +@HAVE_GALLIUM_I915_TRUE@am__DEPENDENCIES_6 = $(top_builddir)/src/gallium/winsys/i915/drm/libi915drm.la \ @HAVE_GALLIUM_I915_TRUE@ $(top_builddir)/src/gallium/drivers/i915/libi915.la \ @HAVE_GALLIUM_I915_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_I915_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_ILO_TRUE@am__DEPENDENCIES_6 = $(top_builddir)/src/gallium/winsys/intel/drm/libintelwinsys.la \ +@HAVE_GALLIUM_ILO_TRUE@am__DEPENDENCIES_7 = $(top_builddir)/src/gallium/winsys/intel/drm/libintelwinsys.la \ @HAVE_GALLIUM_ILO_TRUE@ $(top_builddir)/src/gallium/drivers/ilo/libilo.la \ @HAVE_GALLIUM_ILO_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_ILO_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_NOUVEAU_TRUE@am__DEPENDENCIES_7 = $(top_builddir)/src/gallium/winsys/nouveau/drm/libnouveaudrm.la \ +@HAVE_GALLIUM_NOUVEAU_TRUE@am__DEPENDENCIES_8 = $(top_builddir)/src/gallium/winsys/nouveau/drm/libnouveaudrm.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(top_builddir)/src/gallium/drivers/nouveau/libnouveau.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_R300_TRUE@am__DEPENDENCIES_8 = $(top_builddir)/src/gallium/drivers/r300/libr300.la \ +@HAVE_GALLIUM_R300_TRUE@am__DEPENDENCIES_9 = $(top_builddir)/src/gallium/drivers/r300/libr300.la \ @HAVE_GALLIUM_R300_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_R300_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_R600_TRUE@am__DEPENDENCIES_9 = $(top_builddir)/src/gallium/drivers/r600/libr600.la \ +@HAVE_GALLIUM_R600_TRUE@am__DEPENDENCIES_10 = $(top_builddir)/src/gallium/drivers/r600/libr600.la \ @HAVE_GALLIUM_R600_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_R600_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_RADEONSI_TRUE@am__DEPENDENCIES_10 = $(top_builddir)/src/gallium/drivers/radeonsi/libradeonsi.la \ +@HAVE_GALLIUM_RADEONSI_TRUE@am__DEPENDENCIES_11 = $(top_builddir)/src/gallium/drivers/radeonsi/libradeonsi.la \ +@HAVE_GALLIUM_RADEONSI_TRUE@ $(top_builddir)/src/amd/common/libamd_common.la \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_SVGA_TRUE@am__DEPENDENCIES_11 = $(top_builddir)/src/gallium/winsys/svga/drm/libsvgadrm.la \ +@HAVE_GALLIUM_SVGA_TRUE@am__DEPENDENCIES_12 = $(top_builddir)/src/gallium/winsys/svga/drm/libsvgadrm.la \ @HAVE_GALLIUM_SVGA_TRUE@ $(top_builddir)/src/gallium/drivers/svga/libsvga.la \ @HAVE_GALLIUM_SVGA_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_FREEDRENO_TRUE@am__DEPENDENCIES_12 = $(top_builddir)/src/gallium/winsys/freedreno/drm/libfreedrenodrm.la \ +@HAVE_GALLIUM_FREEDRENO_TRUE@am__DEPENDENCIES_13 = $(top_builddir)/src/gallium/winsys/freedreno/drm/libfreedrenodrm.la \ @HAVE_GALLIUM_FREEDRENO_TRUE@ $(top_builddir)/src/gallium/drivers/freedreno/libfreedreno.la \ @HAVE_GALLIUM_FREEDRENO_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_FREEDRENO_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_VIRGL_TRUE@am__DEPENDENCIES_13 = $(top_builddir)/src/gallium/drivers/virgl/libvirgl.la \ +@HAVE_GALLIUM_VIRGL_TRUE@am__DEPENDENCIES_14 = $(top_builddir)/src/gallium/drivers/virgl/libvirgl.la \ @HAVE_GALLIUM_VIRGL_TRUE@ $(top_builddir)/src/gallium/winsys/virgl/drm/libvirgldrm.la \ @HAVE_GALLIUM_VIRGL_TRUE@ $(top_builddir)/src/gallium/winsys/virgl/vtest/libvirglvtest.la \ @HAVE_GALLIUM_VIRGL_TRUE@ $(am__DEPENDENCIES_1) -am__DEPENDENCIES_14 = $(am__DEPENDENCIES_5) $(am__DEPENDENCIES_6) \ - $(am__DEPENDENCIES_7) $(am__DEPENDENCIES_8) \ - $(am__DEPENDENCIES_9) $(am__DEPENDENCIES_10) \ - $(am__DEPENDENCIES_11) $(am__DEPENDENCIES_12) $(am__append_31) \ - $(am__DEPENDENCIES_13) $(am__append_37) $(am__append_40) \ - $(am__append_43) -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_15 = $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_static.la \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_4) \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_14) \ +@HAVE_GALLIUM_ETNAVIV_TRUE@am__DEPENDENCIES_15 = $(top_builddir)/src/gallium/winsys/etnaviv/drm/libetnavivdrm.la \ +@HAVE_GALLIUM_ETNAVIV_TRUE@ $(top_builddir)/src/gallium/drivers/etnaviv/libetnaviv.la \ +@HAVE_GALLIUM_ETNAVIV_TRUE@ $(am__DEPENDENCIES_1) \ +@HAVE_GALLIUM_ETNAVIV_TRUE@ $(am__DEPENDENCIES_1) +@HAVE_GALLIUM_IMX_TRUE@am__DEPENDENCIES_16 = $(top_builddir)/src/gallium/winsys/imx/drm/libimxdrm.la \ +@HAVE_GALLIUM_IMX_TRUE@ $(am__DEPENDENCIES_1) +am__DEPENDENCIES_17 = $(am__DEPENDENCIES_6) $(am__DEPENDENCIES_7) \ + $(am__DEPENDENCIES_8) $(am__DEPENDENCIES_9) \ + $(am__DEPENDENCIES_10) $(am__DEPENDENCIES_11) \ + $(am__DEPENDENCIES_12) $(am__DEPENDENCIES_13) $(am__append_32) \ + $(am__DEPENDENCIES_14) $(am__DEPENDENCIES_15) \ + $(am__DEPENDENCIES_16) $(am__append_44) $(am__append_47) \ + $(am__append_50) +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_18 = $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_static.la \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_5) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_17) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(TARGET_RADEON_WINSYS) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(TARGET_RADEON_COMMON) -@HAVE_MESA_LLVM_TRUE@am__DEPENDENCIES_16 = $(am__DEPENDENCIES_1) +@HAVE_GALLIUM_LLVM_TRUE@am__DEPENDENCIES_19 = $(am__DEPENDENCIES_1) gallium_dri_la_DEPENDENCIES = \ $(top_builddir)/src/mesa/libmesagallium.la \ $(top_builddir)/src/mesa/drivers/dri/common/libdricommon.la \ @@ -318,8 +346,8 @@ $(top_builddir)/src/gallium/drivers/trace/libtrace.la \ $(SHARED_GLAPI_LIB) $(am__DEPENDENCIES_1) \ $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ - $(am__DEPENDENCIES_2) $(am__DEPENDENCIES_15) $(am__append_46) \ - $(am__DEPENDENCIES_16) + $(am__DEPENDENCIES_3) $(am__DEPENDENCIES_18) $(am__append_53) \ + $(am__DEPENDENCIES_19) am__gallium_dri_la_SOURCES_DIST = target.c @HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__objects_1 = \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ gallium_dri_la-target.lo @@ -414,9 +442,11 @@ CTAGS = ctags am__DIST_COMMON = $(srcdir)/Makefile.in $(top_srcdir)/bin/depcomp \ $(top_srcdir)/src/gallium/Automake.inc \ + $(top_srcdir)/src/gallium/drivers/etnaviv/Automake.inc \ $(top_srcdir)/src/gallium/drivers/freedreno/Automake.inc \ $(top_srcdir)/src/gallium/drivers/i915/Automake.inc \ $(top_srcdir)/src/gallium/drivers/ilo/Automake.inc \ + $(top_srcdir)/src/gallium/drivers/imx/Automake.inc \ $(top_srcdir)/src/gallium/drivers/llvmpipe/Automake.inc \ $(top_srcdir)/src/gallium/drivers/nouveau/Automake.inc \ $(top_srcdir)/src/gallium/drivers/r300/Automake.inc \ @@ -433,6 +463,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -447,6 +479,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -476,10 +509,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -529,11 +563,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -573,8 +604,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -611,8 +640,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -621,7 +648,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -629,13 +655,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -664,6 +691,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -773,12 +801,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -790,8 +814,8 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) -@HAVE_ANDROID_TRUE@@HAVE_SHARED_GLAPI_TRUE@SHARED_GLAPI_LIB = $(top_builddir)/src/mapi/shared-glapi/libglapi.la + $(am__append_2) $(am__append_3) +@HAVE_SHARED_GLAPI_TRUE@SHARED_GLAPI_LIB = $(top_builddir)/src/mapi/shared-glapi/libglapi.la AM_CFLAGS = \ -I$(top_srcdir)/src/mapi \ -I$(top_srcdir)/src/mesa \ @@ -810,10 +834,10 @@ dridir = $(DRI_DRIVER_INSTALL_DIR) dri_LTLIBRARIES = gallium_dri.la nodist_EXTRA_gallium_dri_la_SOURCES = dummy.cpp -gallium_dri_la_SOURCES = $(am__append_44) -gallium_dri_la_LDFLAGS = -shared -shrext .so -module -avoid-version \ - $(GC_SECTIONS) $(am__append_3) $(am__append_4) \ - $(am__append_48) +gallium_dri_la_SOURCES = $(am__append_51) +gallium_dri_la_LDFLAGS = -shared -shrext .so -module -no-undefined \ + -avoid-version $(GC_SECTIONS) $(LD_NO_UNDEFINED) \ + $(am__append_4) $(am__append_5) $(am__append_55) gallium_dri_la_LIBADD = $(top_builddir)/src/mesa/libmesagallium.la \ $(top_builddir)/src/mesa/drivers/dri/common/libdricommon.la \ $(top_builddir)/src/mesa/drivers/dri/common/libmegadriver_stub.la \ @@ -825,8 +849,8 @@ $(top_builddir)/src/gallium/drivers/rbug/librbug.la \ $(top_builddir)/src/gallium/drivers/trace/libtrace.la \ $(SHARED_GLAPI_LIB) $(SELINUX_LIBS) $(EXPAT_LIBS) \ - $(LIBDRM_LIBS) $(GALLIUM_COMMON_LIB_DEPS) $(am__append_45) \ - $(am__append_46) $(am__append_47) + $(LIBDRM_LIBS) $(GALLIUM_COMMON_LIB_DEPS) $(am__append_52) \ + $(am__append_53) $(am__append_54) EXTRA_gallium_dri_la_DEPENDENCIES = \ dri.sym \ $(top_srcdir)/src/gallium/targets/dri-vdpau.dyn @@ -836,21 +860,21 @@ dri.sym \ $(top_srcdir)/src/gallium/targets/dri-vdpau.dyn -TARGET_DRIVERS = $(am__append_5) $(am__append_8) $(am__append_11) \ - $(am__append_14) $(am__append_17) $(am__append_20) \ - $(am__append_23) $(am__append_26) $(am__append_29) \ - $(am__append_32) $(am__append_35) $(am__append_38) \ - $(am__append_41) -TARGET_CPPFLAGS = $(am__append_6) $(am__append_9) $(am__append_12) \ +TARGET_DRIVERS = $(am__append_6) $(am__append_9) $(am__append_12) \ $(am__append_15) $(am__append_18) $(am__append_21) \ $(am__append_24) $(am__append_27) $(am__append_30) \ $(am__append_33) $(am__append_36) $(am__append_39) \ - $(am__append_42) -TARGET_LIB_DEPS = $(am__append_7) $(am__append_10) $(am__append_13) \ + $(am__append_42) $(am__append_45) $(am__append_48) +TARGET_CPPFLAGS = $(am__append_7) $(am__append_10) $(am__append_13) \ $(am__append_16) $(am__append_19) $(am__append_22) \ $(am__append_25) $(am__append_28) $(am__append_31) \ $(am__append_34) $(am__append_37) $(am__append_40) \ - $(am__append_43) + $(am__append_43) $(am__append_46) $(am__append_49) +TARGET_LIB_DEPS = $(am__append_8) $(am__append_11) $(am__append_14) \ + $(am__append_17) $(am__append_20) $(am__append_23) \ + $(am__append_26) $(am__append_29) $(am__append_32) \ + $(am__append_35) $(am__append_38) $(am__append_41) \ + $(am__append_44) $(am__append_47) $(am__append_50) @HAVE_GALLIUM_R300_TRUE@TARGET_RADEON_WINSYS = \ @HAVE_GALLIUM_R300_TRUE@ $(top_builddir)/src/gallium/winsys/radeon/drm/libradeonwinsys.la @@ -872,7 +896,7 @@ .SUFFIXES: .SUFFIXES: .c .cpp .lo .o .obj -$(srcdir)/Makefile.in: $(srcdir)/Makefile.am $(top_srcdir)/src/gallium/Automake.inc $(top_srcdir)/src/gallium/drivers/i915/Automake.inc $(top_srcdir)/src/gallium/drivers/ilo/Automake.inc $(top_srcdir)/src/gallium/drivers/nouveau/Automake.inc $(top_srcdir)/src/gallium/drivers/r300/Automake.inc $(top_srcdir)/src/gallium/drivers/r600/Automake.inc $(top_srcdir)/src/gallium/drivers/radeonsi/Automake.inc $(top_srcdir)/src/gallium/drivers/svga/Automake.inc $(top_srcdir)/src/gallium/drivers/freedreno/Automake.inc $(top_srcdir)/src/gallium/drivers/vc4/Automake.inc $(top_srcdir)/src/gallium/drivers/virgl/Automake.inc $(top_srcdir)/src/gallium/drivers/softpipe/Automake.inc $(top_srcdir)/src/gallium/drivers/llvmpipe/Automake.inc $(top_srcdir)/src/gallium/drivers/swr/Automake.inc $(am__configure_deps) +$(srcdir)/Makefile.in: $(srcdir)/Makefile.am $(top_srcdir)/src/gallium/Automake.inc $(top_srcdir)/src/gallium/drivers/i915/Automake.inc $(top_srcdir)/src/gallium/drivers/ilo/Automake.inc $(top_srcdir)/src/gallium/drivers/nouveau/Automake.inc $(top_srcdir)/src/gallium/drivers/r300/Automake.inc $(top_srcdir)/src/gallium/drivers/r600/Automake.inc $(top_srcdir)/src/gallium/drivers/radeonsi/Automake.inc $(top_srcdir)/src/gallium/drivers/svga/Automake.inc $(top_srcdir)/src/gallium/drivers/freedreno/Automake.inc $(top_srcdir)/src/gallium/drivers/vc4/Automake.inc $(top_srcdir)/src/gallium/drivers/virgl/Automake.inc $(top_srcdir)/src/gallium/drivers/etnaviv/Automake.inc $(top_srcdir)/src/gallium/drivers/imx/Automake.inc $(top_srcdir)/src/gallium/drivers/softpipe/Automake.inc $(top_srcdir)/src/gallium/drivers/llvmpipe/Automake.inc $(top_srcdir)/src/gallium/drivers/swr/Automake.inc $(am__configure_deps) @for dep in $?; do \ case '$(am__configure_deps)' in \ *$$dep*) \ @@ -892,7 +916,7 @@ echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \ cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \ esac; -$(top_srcdir)/src/gallium/Automake.inc $(top_srcdir)/src/gallium/drivers/i915/Automake.inc $(top_srcdir)/src/gallium/drivers/ilo/Automake.inc $(top_srcdir)/src/gallium/drivers/nouveau/Automake.inc $(top_srcdir)/src/gallium/drivers/r300/Automake.inc $(top_srcdir)/src/gallium/drivers/r600/Automake.inc $(top_srcdir)/src/gallium/drivers/radeonsi/Automake.inc $(top_srcdir)/src/gallium/drivers/svga/Automake.inc $(top_srcdir)/src/gallium/drivers/freedreno/Automake.inc $(top_srcdir)/src/gallium/drivers/vc4/Automake.inc $(top_srcdir)/src/gallium/drivers/virgl/Automake.inc $(top_srcdir)/src/gallium/drivers/softpipe/Automake.inc $(top_srcdir)/src/gallium/drivers/llvmpipe/Automake.inc $(top_srcdir)/src/gallium/drivers/swr/Automake.inc $(am__empty): +$(top_srcdir)/src/gallium/Automake.inc $(top_srcdir)/src/gallium/drivers/i915/Automake.inc $(top_srcdir)/src/gallium/drivers/ilo/Automake.inc $(top_srcdir)/src/gallium/drivers/nouveau/Automake.inc $(top_srcdir)/src/gallium/drivers/r300/Automake.inc $(top_srcdir)/src/gallium/drivers/r600/Automake.inc $(top_srcdir)/src/gallium/drivers/radeonsi/Automake.inc $(top_srcdir)/src/gallium/drivers/svga/Automake.inc $(top_srcdir)/src/gallium/drivers/freedreno/Automake.inc $(top_srcdir)/src/gallium/drivers/vc4/Automake.inc $(top_srcdir)/src/gallium/drivers/virgl/Automake.inc $(top_srcdir)/src/gallium/drivers/etnaviv/Automake.inc $(top_srcdir)/src/gallium/drivers/imx/Automake.inc $(top_srcdir)/src/gallium/drivers/softpipe/Automake.inc $(top_srcdir)/src/gallium/drivers/llvmpipe/Automake.inc $(top_srcdir)/src/gallium/drivers/swr/Automake.inc $(am__empty): $(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES) cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh diff -Nru mesa-12.0.6/src/gallium/targets/dri/target.c mesa-17.0.7/src/gallium/targets/dri/target.c --- mesa-12.0.6/src/gallium/targets/dri/target.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/dri/target.c 2017-06-01 10:37:10.000000000 +0000 @@ -162,3 +162,22 @@ } #endif #endif + +#if defined(GALLIUM_ETNAVIV) + +const __DRIextension **__driDriverGetExtensions_imx_drm(void); + +PUBLIC const __DRIextension **__driDriverGetExtensions_imx_drm(void) +{ + globalDriverAPI = &galliumdrm_driver_api; + return galliumdrm_driver_extensions; +} + +const __DRIextension **__driDriverGetExtensions_etnaviv(void); + +PUBLIC const __DRIextension **__driDriverGetExtensions_etnaviv(void) +{ + globalDriverAPI = &galliumdrm_driver_api; + return galliumdrm_driver_extensions; +} +#endif diff -Nru mesa-12.0.6/src/gallium/targets/haiku-softpipe/.editorconfig mesa-17.0.7/src/gallium/targets/haiku-softpipe/.editorconfig --- mesa-12.0.6/src/gallium/targets/haiku-softpipe/.editorconfig 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/haiku-softpipe/.editorconfig 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,2 @@ +[*.{c,h,cpp,hpp}] +indent_style = tab diff -Nru mesa-12.0.6/src/gallium/targets/libgl-gdi/libgl_gdi.c mesa-17.0.7/src/gallium/targets/libgl-gdi/libgl_gdi.c --- mesa-12.0.6/src/gallium/targets/libgl-gdi/libgl_gdi.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/libgl-gdi/libgl_gdi.c 2017-06-01 10:37:10.000000000 +0000 @@ -51,9 +51,12 @@ #include "llvmpipe/lp_public.h" #endif +#ifdef HAVE_SWR +#include "swr/swr_public.h" +#endif static boolean use_llvmpipe = FALSE; - +static boolean use_swr = FALSE; static struct pipe_screen * gdi_screen_create(void) @@ -69,6 +72,8 @@ #ifdef HAVE_LLVMPIPE default_driver = "llvmpipe"; +#elif HAVE_SWR + default_driver = "swr"; #else default_driver = "softpipe"; #endif @@ -78,15 +83,21 @@ #ifdef HAVE_LLVMPIPE if (strcmp(driver, "llvmpipe") == 0) { screen = llvmpipe_create_screen( winsys ); + if (screen) + use_llvmpipe = TRUE; + } +#endif +#ifdef HAVE_SWR + if (strcmp(driver, "swr") == 0) { + screen = swr_create_screen( winsys ); + if (screen) + use_swr = TRUE; } -#else - (void) driver; #endif + (void) driver; if (screen == NULL) { screen = softpipe_create_screen( winsys ); - } else { - use_llvmpipe = TRUE; } if(!screen) @@ -127,6 +138,13 @@ return; } #endif + +#ifdef HAVE_SWR + if (use_swr) { + swr_gdi_swap(screen, res, hDC); + return; + } +#endif winsys = softpipe_screen(screen)->winsys, dt = softpipe_resource(res)->dt, diff -Nru mesa-12.0.6/src/gallium/targets/libgl-gdi/SConscript mesa-17.0.7/src/gallium/targets/libgl-gdi/SConscript --- mesa-12.0.6/src/gallium/targets/libgl-gdi/SConscript 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/libgl-gdi/SConscript 2017-06-01 10:37:10.000000000 +0000 @@ -30,6 +30,10 @@ env.Append(CPPDEFINES = 'HAVE_LLVMPIPE') drivers += [llvmpipe] + if env['swr']: + env.Append(CPPDEFINES = 'HAVE_SWR') + drivers += [swr] + if env['gcc'] and env['machine'] != 'x86_64': # DEF parser in certain versions of MinGW is busted, as does not behave as # MSVC. mingw-w64 works fine. diff -Nru mesa-12.0.6/src/gallium/targets/libgl-xlib/Makefile.am mesa-17.0.7/src/gallium/targets/libgl-xlib/Makefile.am --- mesa-12.0.6/src/gallium/targets/libgl-xlib/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/libgl-xlib/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -75,7 +75,7 @@ $(GL_LIB_DEPS) \ $(CLOCK_LIB) -if HAVE_MESA_LLVM +if HAVE_GALLIUM_LLVM lib@GL_LIB@_la_LIBADD += $(top_builddir)/src/gallium/drivers/llvmpipe/libllvmpipe.la $(LLVM_LIBS) AM_CPPFLAGS += -DGALLIUM_LLVMPIPE lib@GL_LIB@_la_LDFLAGS += $(LLVM_LDFLAGS) diff -Nru mesa-12.0.6/src/gallium/targets/libgl-xlib/Makefile.in mesa-17.0.7/src/gallium/targets/libgl-xlib/Makefile.in --- mesa-12.0.6/src/gallium/targets/libgl-xlib/Makefile.in 2017-01-24 01:41:50.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/libgl-xlib/Makefile.in 2017-06-01 10:37:21.000000000 +0000 @@ -117,9 +117,9 @@ @HAVE_LD_VERSION_SCRIPT_TRUE@am__append_1 = \ @HAVE_LD_VERSION_SCRIPT_TRUE@ -Wl,--version-script=$(top_srcdir)/src/gallium/targets/libgl-xlib/libgl-xlib.sym -@HAVE_MESA_LLVM_TRUE@am__append_2 = $(top_builddir)/src/gallium/drivers/llvmpipe/libllvmpipe.la $(LLVM_LIBS) -@HAVE_MESA_LLVM_TRUE@am__append_3 = -DGALLIUM_LLVMPIPE -@HAVE_MESA_LLVM_TRUE@am__append_4 = $(LLVM_LDFLAGS) +@HAVE_GALLIUM_LLVM_TRUE@am__append_2 = $(top_builddir)/src/gallium/drivers/llvmpipe/libllvmpipe.la $(LLVM_LIBS) +@HAVE_GALLIUM_LLVM_TRUE@am__append_3 = -DGALLIUM_LLVMPIPE +@HAVE_GALLIUM_LLVM_TRUE@am__append_4 = $(LLVM_LDFLAGS) @HAVE_GALLIUM_SWR_TRUE@am__append_5 = $(top_builddir)/src/gallium/drivers/swr/libmesaswr.la $(LLVM_LIBS) @HAVE_GALLIUM_SWR_TRUE@am__append_6 = -DGALLIUM_SWR subdir = src/gallium/targets/libgl-xlib @@ -170,8 +170,8 @@ am__installdirs = "$(DESTDIR)$(libdir)" LTLIBRARIES = $(lib_LTLIBRARIES) am__DEPENDENCIES_1 = -@HAVE_MESA_LLVM_TRUE@am__DEPENDENCIES_2 = $(top_builddir)/src/gallium/drivers/llvmpipe/libllvmpipe.la \ -@HAVE_MESA_LLVM_TRUE@ $(am__DEPENDENCIES_1) +@HAVE_GALLIUM_LLVM_TRUE@am__DEPENDENCIES_2 = $(top_builddir)/src/gallium/drivers/llvmpipe/libllvmpipe.la \ +@HAVE_GALLIUM_LLVM_TRUE@ $(am__DEPENDENCIES_1) @HAVE_GALLIUM_SWR_TRUE@am__DEPENDENCIES_3 = $(top_builddir)/src/gallium/drivers/swr/libmesaswr.la \ @HAVE_GALLIUM_SWR_TRUE@ $(am__DEPENDENCIES_1) lib@GL_LIB@_la_DEPENDENCIES = $(top_builddir)/src/gallium/state_trackers/glx/xlib/libxlib.la \ @@ -264,6 +264,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -278,6 +280,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -307,10 +310,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -360,11 +364,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -404,8 +405,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -442,8 +441,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -452,7 +449,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -460,13 +456,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -495,6 +492,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ diff -Nru mesa-12.0.6/src/gallium/targets/libgl-xlib/SConscript mesa-17.0.7/src/gallium/targets/libgl-xlib/SConscript --- mesa-12.0.6/src/gallium/targets/libgl-xlib/SConscript 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/libgl-xlib/SConscript 2017-06-01 10:37:10.000000000 +0000 @@ -48,6 +48,10 @@ env.Append(CPPDEFINES = ['GALLIUM_LLVMPIPE']) env.Prepend(LIBS = [llvmpipe]) + if env['swr']: + env.Append(CPPDEFINES = 'HAVE_SWR') + env.Prepend(LIBS = [swr]) + if env['platform'] != 'darwin': # Disallow undefined symbols, except with Address Sanitizer, since libasan # is not linked on shared libs, as it should be LD_PRELOAD'ed instead diff -Nru mesa-12.0.6/src/gallium/targets/omx/Makefile.am mesa-17.0.7/src/gallium/targets/omx/Makefile.am --- mesa-12.0.6/src/gallium/targets/omx/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/omx/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -63,7 +63,7 @@ endif # HAVE_GALLIUM_STATIC_TARGETS -if HAVE_MESA_LLVM +if HAVE_GALLIUM_LLVM libomx_mesa_la_LIBADD += $(LLVM_LIBS) libomx_mesa_la_LDFLAGS += $(LLVM_LDFLAGS) endif diff -Nru mesa-12.0.6/src/gallium/targets/omx/Makefile.in mesa-17.0.7/src/gallium/targets/omx/Makefile.in --- mesa-12.0.6/src/gallium/targets/omx/Makefile.in 2017-01-24 01:41:50.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/omx/Makefile.in 2017-06-01 10:37:22.000000000 +0000 @@ -89,51 +89,55 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) -@HAVE_LD_VERSION_SCRIPT_TRUE@am__append_3 = \ +@HAVE_LD_VERSION_SCRIPT_TRUE@am__append_4 = \ @HAVE_LD_VERSION_SCRIPT_TRUE@ -Wl,--version-script=$(top_srcdir)/src/gallium/targets/omx/omx.sym -@HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_4 = nouveau -@HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_5 = -DGALLIUM_NOUVEAU -@HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_6 = \ +@HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_5 = nouveau +@HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_6 = -DGALLIUM_NOUVEAU +@HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_7 = \ @HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/winsys/nouveau/drm/libnouveaudrm.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/drivers/nouveau/libnouveau.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(NOUVEAU_LIBS) \ @HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_7 = r600 -@HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_8 = -DGALLIUM_R600 -@HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_9 = \ +@HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_8 = r600 +@HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_9 = -DGALLIUM_R600 +@HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_10 = \ @HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/drivers/r600/libr600.la \ @HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(RADEON_LIBS) \ @HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_10 = radeonsi -@HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_11 = -DGALLIUM_RADEONSI -@HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_12 = \ +@HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_11 = radeonsi +@HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_12 = -DGALLIUM_RADEONSI +@HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_13 = \ @HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/drivers/radeonsi/libradeonsi.la \ +@HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/amd/common/libamd_common.la \ @HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(RADEON_LIBS) \ @HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(LIBDRM_LIBS) \ @HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(AMDGPU_LIBS) -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_13 = target.c -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_14 = \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_14 = target.c +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_15 = \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_static.la \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(GALLIUM_PIPE_LOADER_WINSYS_LIBS) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(TARGET_LIB_DEPS) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(TARGET_RADEON_WINSYS) $(TARGET_RADEON_COMMON) -@HAVE_GALLIUM_STATIC_TARGETS_FALSE@am__append_15 = \ +@HAVE_GALLIUM_STATIC_TARGETS_FALSE@am__append_16 = \ @HAVE_GALLIUM_STATIC_TARGETS_FALSE@ $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_dynamic.la -@HAVE_MESA_LLVM_TRUE@am__append_16 = $(LLVM_LIBS) -@HAVE_MESA_LLVM_TRUE@am__append_17 = $(LLVM_LDFLAGS) +@HAVE_GALLIUM_LLVM_TRUE@am__append_17 = $(LLVM_LIBS) +@HAVE_GALLIUM_LLVM_TRUE@am__append_18 = $(LLVM_LDFLAGS) subdir = src/gallium/targets/omx ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps = $(top_srcdir)/m4/ax_check_gnu_make.m4 \ @@ -182,43 +186,46 @@ am__installdirs = "$(DESTDIR)$(omxdir)" LTLIBRARIES = $(omx_LTLIBRARIES) am__DEPENDENCIES_1 = -am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ - $(am__DEPENDENCIES_1) -@HAVE_DRISW_KMS_TRUE@am__DEPENDENCIES_3 = $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ +@HAVE_LIBDRM_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) +am__DEPENDENCIES_3 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_2) +@HAVE_DRISW_KMS_TRUE@am__DEPENDENCIES_4 = $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(am__DEPENDENCIES_1) -am__DEPENDENCIES_4 = \ +am__DEPENDENCIES_5 = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__DEPENDENCIES_3) -@HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_5 = $(top_builddir)/src/gallium/winsys/nouveau/drm/libnouveaudrm.la \ + $(am__append_2) $(am__DEPENDENCIES_4) +@HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_6 = $(top_builddir)/src/gallium/winsys/nouveau/drm/libnouveaudrm.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/drivers/nouveau/libnouveau.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_6 = $(top_builddir)/src/gallium/drivers/r600/libr600.la \ +@HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_7 = $(top_builddir)/src/gallium/drivers/r600/libr600.la \ @HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_7 = $(top_builddir)/src/gallium/drivers/radeonsi/libradeonsi.la \ +@HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_8 = $(top_builddir)/src/gallium/drivers/radeonsi/libradeonsi.la \ +@HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/amd/common/libamd_common.la \ @HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_8 = \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_5) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_9 = \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_6) \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_7) -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_9 = $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_static.la \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_4) \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_8) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_7) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_8) +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_10 = $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_static.la \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_5) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_9) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(TARGET_RADEON_WINSYS) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(TARGET_RADEON_COMMON) -@HAVE_MESA_LLVM_TRUE@am__DEPENDENCIES_10 = $(am__DEPENDENCIES_1) +@HAVE_GALLIUM_LLVM_TRUE@am__DEPENDENCIES_11 = $(am__DEPENDENCIES_1) libomx_mesa_la_DEPENDENCIES = $(top_builddir)/src/gallium/state_trackers/omx/libomxtracker.la \ $(top_builddir)/src/gallium/auxiliary/libgalliumvlwinsys.la \ $(top_builddir)/src/gallium/auxiliary/libgalliumvl.la \ $(top_builddir)/src/gallium/auxiliary/libgallium.la \ $(top_builddir)/src/util/libmesautil.la $(am__DEPENDENCIES_1) \ $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ - $(am__DEPENDENCIES_2) $(am__DEPENDENCIES_9) $(am__append_15) \ - $(am__DEPENDENCIES_10) + $(am__DEPENDENCIES_3) $(am__DEPENDENCIES_10) $(am__append_16) \ + $(am__DEPENDENCIES_11) am__libomx_mesa_la_SOURCES_DIST = target.c @HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__objects_1 = \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ libomx_mesa_la-target.lo @@ -322,6 +329,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -336,6 +345,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -365,10 +375,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -418,11 +429,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -462,8 +470,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -500,8 +506,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -510,7 +514,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -518,13 +521,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -553,6 +557,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -662,12 +667,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -679,35 +680,35 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ $(GALLIUM_TARGET_CFLAGS) omxdir = $(OMX_LIB_INSTALL_DIR) omx_LTLIBRARIES = libomx_mesa.la nodist_EXTRA_libomx_mesa_la_SOURCES = dummy.cpp -libomx_mesa_la_SOURCES = $(am__append_13) +libomx_mesa_la_SOURCES = $(am__append_14) libomx_mesa_la_LDFLAGS = -shared -module -no-undefined -avoid-version \ - $(GC_SECTIONS) $(LD_NO_UNDEFINED) $(am__append_3) \ - $(am__append_17) + $(GC_SECTIONS) $(LD_NO_UNDEFINED) $(am__append_4) \ + $(am__append_18) libomx_mesa_la_LIBADD = $(top_builddir)/src/gallium/state_trackers/omx/libomxtracker.la \ $(top_builddir)/src/gallium/auxiliary/libgalliumvlwinsys.la \ $(top_builddir)/src/gallium/auxiliary/libgalliumvl.la \ $(top_builddir)/src/gallium/auxiliary/libgallium.la \ $(top_builddir)/src/util/libmesautil.la $(OMX_LIBS) $(VL_LIBS) \ - $(LIBDRM_LIBS) $(GALLIUM_COMMON_LIB_DEPS) $(am__append_14) \ - $(am__append_15) $(am__append_16) + $(LIBDRM_LIBS) $(GALLIUM_COMMON_LIB_DEPS) $(am__append_15) \ + $(am__append_16) $(am__append_17) EXTRA_libomx_mesa_la_DEPENDENCIES = omx.sym EXTRA_DIST = omx.sym -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@TARGET_DRIVERS = $(am__append_4) \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_7) \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_10) -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@TARGET_CPPFLAGS = $(am__append_5) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@TARGET_DRIVERS = $(am__append_5) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_8) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_11) -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@TARGET_LIB_DEPS = $(am__append_6) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@TARGET_CPPFLAGS = $(am__append_6) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_9) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_12) +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@TARGET_LIB_DEPS = $(am__append_7) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_10) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_13) @HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@TARGET_RADEON_WINSYS = \ @HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/winsys/radeon/drm/libradeonwinsys.la diff -Nru mesa-12.0.6/src/gallium/targets/omx/omx.sym mesa-17.0.7/src/gallium/targets/omx/omx.sym --- mesa-12.0.6/src/gallium/targets/omx/omx.sym 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/omx/omx.sym 2017-06-01 10:37:10.000000000 +0000 @@ -1,6 +1,11 @@ { global: omx_component_library_Setup; + + # Workaround for an LLVM warning with -simplifycfg-sink-common + # due to LLVM being initialized multiple times. + radeon_drm_winsys_create; + amdgpu_winsys_create; local: *; }; diff -Nru mesa-12.0.6/src/gallium/targets/opencl/Makefile.in mesa-17.0.7/src/gallium/targets/opencl/Makefile.in --- mesa-12.0.6/src/gallium/targets/opencl/Makefile.in 2017-01-24 01:41:50.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/opencl/Makefile.in 2017-06-01 10:37:22.000000000 +0000 @@ -93,14 +93,17 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) -@HAVE_LD_VERSION_SCRIPT_TRUE@am__append_3 = \ +@HAVE_LD_VERSION_SCRIPT_TRUE@am__append_4 = \ @HAVE_LD_VERSION_SCRIPT_TRUE@ -Wl,--version-script=$(top_srcdir)/src/gallium/targets/opencl/opencl.sym subdir = src/gallium/targets/opencl @@ -221,6 +224,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -235,6 +240,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -264,10 +270,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -317,11 +324,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -361,8 +365,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -399,8 +401,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -409,7 +409,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -417,13 +416,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -452,6 +452,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -561,12 +562,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -578,11 +575,11 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) lib_LTLIBRARIES = lib@OPENCL_LIBNAME@.la lib@OPENCL_LIBNAME@_la_LDFLAGS = $(LLVM_LDFLAGS) -no-undefined \ -version-number @OPENCL_VERSION@:0 $(GC_SECTIONS) \ - $(LD_NO_UNDEFINED) $(am__append_3) + $(LD_NO_UNDEFINED) $(am__append_4) lib@OPENCL_LIBNAME@_la_LIBADD = \ $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_dynamic.la \ $(top_builddir)/src/gallium/state_trackers/clover/libclover.la \ diff -Nru mesa-12.0.6/src/gallium/targets/osmesa/Makefile.am mesa-17.0.7/src/gallium/targets/osmesa/Makefile.am --- mesa-12.0.6/src/gallium/targets/osmesa/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/osmesa/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -68,7 +68,7 @@ $(OSMESA_LIB_DEPS) \ $(CLOCK_LIB) -if HAVE_MESA_LLVM +if HAVE_GALLIUM_LLVM AM_CPPFLAGS += -DGALLIUM_LLVMPIPE lib@OSMESA_LIB@_la_LDFLAGS += $(LLVM_LDFLAGS) lib@OSMESA_LIB@_la_LIBADD += $(top_builddir)/src/gallium/drivers/llvmpipe/libllvmpipe.la $(LLVM_LIBS) diff -Nru mesa-12.0.6/src/gallium/targets/osmesa/Makefile.in mesa-17.0.7/src/gallium/targets/osmesa/Makefile.in --- mesa-12.0.6/src/gallium/targets/osmesa/Makefile.in 2017-01-24 01:41:50.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/osmesa/Makefile.in 2017-06-01 10:37:22.000000000 +0000 @@ -114,22 +114,25 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) -@HAVE_LD_VERSION_SCRIPT_TRUE@am__append_3 = \ +@HAVE_LD_VERSION_SCRIPT_TRUE@am__append_4 = \ @HAVE_LD_VERSION_SCRIPT_TRUE@ -Wl,--version-script=$(top_srcdir)/src/gallium/targets/osmesa/osmesa.sym -@HAVE_MESA_LLVM_TRUE@am__append_4 = -DGALLIUM_LLVMPIPE -@HAVE_MESA_LLVM_TRUE@am__append_5 = $(LLVM_LDFLAGS) -@HAVE_MESA_LLVM_TRUE@am__append_6 = $(top_builddir)/src/gallium/drivers/llvmpipe/libllvmpipe.la $(LLVM_LIBS) -@HAVE_GALLIUM_SWR_TRUE@am__append_7 = -DGALLIUM_SWR -@HAVE_GALLIUM_SWR_TRUE@am__append_8 = $(LLVM_LDFLAGS) -@HAVE_GALLIUM_SWR_TRUE@am__append_9 = $(top_builddir)/src/gallium/drivers/swr/libmesaswr.la $(LLVM_LIBS) +@HAVE_GALLIUM_LLVM_TRUE@am__append_5 = -DGALLIUM_LLVMPIPE +@HAVE_GALLIUM_LLVM_TRUE@am__append_6 = $(LLVM_LDFLAGS) +@HAVE_GALLIUM_LLVM_TRUE@am__append_7 = $(top_builddir)/src/gallium/drivers/llvmpipe/libllvmpipe.la $(LLVM_LIBS) +@HAVE_GALLIUM_SWR_TRUE@am__append_8 = -DGALLIUM_SWR +@HAVE_GALLIUM_SWR_TRUE@am__append_9 = $(LLVM_LDFLAGS) +@HAVE_GALLIUM_SWR_TRUE@am__append_10 = $(top_builddir)/src/gallium/drivers/swr/libmesaswr.la $(LLVM_LIBS) subdir = src/gallium/targets/osmesa ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps = $(top_srcdir)/m4/ax_check_gnu_make.m4 \ @@ -178,8 +181,8 @@ am__installdirs = "$(DESTDIR)$(libdir)" "$(DESTDIR)$(pkgconfigdir)" LTLIBRARIES = $(lib_LTLIBRARIES) am__DEPENDENCIES_1 = -@HAVE_MESA_LLVM_TRUE@am__DEPENDENCIES_2 = $(top_builddir)/src/gallium/drivers/llvmpipe/libllvmpipe.la \ -@HAVE_MESA_LLVM_TRUE@ $(am__DEPENDENCIES_1) +@HAVE_GALLIUM_LLVM_TRUE@am__DEPENDENCIES_2 = $(top_builddir)/src/gallium/drivers/llvmpipe/libllvmpipe.la \ +@HAVE_GALLIUM_LLVM_TRUE@ $(am__DEPENDENCIES_1) @HAVE_GALLIUM_SWR_TRUE@am__DEPENDENCIES_3 = $(top_builddir)/src/gallium/drivers/swr/libmesaswr.la \ @HAVE_GALLIUM_SWR_TRUE@ $(am__DEPENDENCIES_1) lib@OSMESA_LIB@_la_DEPENDENCIES = \ @@ -274,6 +277,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -288,6 +293,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -317,10 +323,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -370,11 +377,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -414,8 +418,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -452,8 +454,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -462,7 +462,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -470,13 +469,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -505,6 +505,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -614,12 +615,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -631,7 +628,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ $(GALLIUM_CFLAGS) \ $(VISIBILITY_CFLAGS) @@ -641,13 +638,13 @@ -I$(top_srcdir)/src/gallium/drivers \ -I$(top_srcdir)/src/gallium/winsys \ -I$(top_srcdir)/src/gallium/auxiliary -DGALLIUM_SOFTPIPE \ - -DGALLIUM_TRACE $(am__append_4) $(am__append_7) + -DGALLIUM_TRACE $(am__append_5) $(am__append_8) lib_LTLIBRARIES = lib@OSMESA_LIB@.la nodist_EXTRA_lib@OSMESA_LIB@_la_SOURCES = dummy.cpp lib@OSMESA_LIB@_la_SOURCES = target.c lib@OSMESA_LIB@_la_LDFLAGS = -no-undefined -version-number \ @OSMESA_VERSION@ $(GC_SECTIONS) $(LD_NO_UNDEFINED) \ - $(am__append_3) $(am__append_5) $(am__append_8) + $(am__append_4) $(am__append_6) $(am__append_9) @HAVE_SHARED_GLAPI_TRUE@SHARED_GLAPI_LIB = $(top_builddir)/src/mapi/shared-glapi/libglapi.la lib@OSMESA_LIB@_la_LIBADD = \ $(top_builddir)/src/mesa/libmesagallium.la \ @@ -657,8 +654,8 @@ $(top_builddir)/src/gallium/drivers/softpipe/libsoftpipe.la \ $(top_builddir)/src/gallium/state_trackers/osmesa/libosmesa.la \ $(top_builddir)/src/mapi/glapi/libglapi.la $(SHARED_GLAPI_LIB) \ - $(OSMESA_LIB_DEPS) $(CLOCK_LIB) $(am__append_6) \ - $(am__append_9) + $(OSMESA_LIB_DEPS) $(CLOCK_LIB) $(am__append_7) \ + $(am__append_10) EXTRA_lib@OSMESA_LIB@_la_DEPENDENCIES = osmesa.sym EXTRA_DIST = \ osmesa.sym \ diff -Nru mesa-12.0.6/src/gallium/targets/osmesa/SConscript mesa-17.0.7/src/gallium/targets/osmesa/SConscript --- mesa-12.0.6/src/gallium/targets/osmesa/SConscript 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/osmesa/SConscript 2017-06-01 10:37:10.000000000 +0000 @@ -30,6 +30,10 @@ env.Append(CPPDEFINES = 'GALLIUM_LLVMPIPE') env.Prepend(LIBS = [llvmpipe]) + if env['swr']: + env.Append(CPPDEFINES = 'HAVE_SWR') + env.Prepend(LIBS = [swr]) + if env['platform'] == 'windows': if env['gcc'] and env['machine'] != 'x86_64': sources += ['osmesa.mingw.def'] diff -Nru mesa-12.0.6/src/gallium/targets/pipe-loader/Makefile.am mesa-17.0.7/src/gallium/targets/pipe-loader/Makefile.am --- mesa-12.0.6/src/gallium/targets/pipe-loader/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/pipe-loader/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -71,7 +71,7 @@ -Wl,--version-script=$(top_srcdir)/src/gallium/targets/pipe-loader/pipe.sym endif -if HAVE_MESA_LLVM +if HAVE_GALLIUM_LLVM PIPE_LIBS += $(LLVM_LIBS) AM_LDFLAGS += $(LLVM_LDFLAGS) endif @@ -158,6 +158,7 @@ $(top_builddir)/src/gallium/winsys/amdgpu/drm/libamdgpuwinsys.la \ $(top_builddir)/src/gallium/drivers/radeon/libradeon.la \ $(top_builddir)/src/gallium/drivers/radeonsi/libradeonsi.la \ + $(top_builddir)/src/amd/common/libamd_common.la \ $(LIBDRM_LIBS) \ $(RADEON_LIBS) \ $(AMDGPU_LIBS) diff -Nru mesa-12.0.6/src/gallium/targets/pipe-loader/Makefile.in mesa-17.0.7/src/gallium/targets/pipe-loader/Makefile.in --- mesa-12.0.6/src/gallium/targets/pipe-loader/Makefile.in 2017-01-24 01:41:50.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/pipe-loader/Makefile.in 2017-06-01 10:37:22.000000000 +0000 @@ -111,46 +111,49 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) -@NEED_GALLIUM_VL_TRUE@am__append_3 = \ +@NEED_GALLIUM_VL_TRUE@am__append_4 = \ @NEED_GALLIUM_VL_TRUE@ $(top_builddir)/src/gallium/auxiliary/libgalliumvl.la -@NEED_GALLIUM_VL_FALSE@am__append_4 = \ +@NEED_GALLIUM_VL_FALSE@am__append_5 = \ @NEED_GALLIUM_VL_FALSE@ $(top_builddir)/src/gallium/auxiliary/libgalliumvl_stub.la -@NEED_GALLIUM_VL_WINSYS_TRUE@am__append_5 = \ +@NEED_GALLIUM_VL_WINSYS_TRUE@am__append_6 = \ @NEED_GALLIUM_VL_WINSYS_TRUE@ $(top_builddir)/src/gallium/auxiliary/libgalliumvlwinsys.la -@HAVE_LD_VERSION_SCRIPT_TRUE@am__append_6 = \ +@HAVE_LD_VERSION_SCRIPT_TRUE@am__append_7 = \ @HAVE_LD_VERSION_SCRIPT_TRUE@ -Wl,--version-script=$(top_srcdir)/src/gallium/targets/pipe-loader/pipe.sym -@HAVE_MESA_LLVM_TRUE@am__append_7 = $(LLVM_LIBS) -@HAVE_MESA_LLVM_TRUE@am__append_8 = $(LLVM_LDFLAGS) -@HAVE_GALLIUM_I915_TRUE@am__append_9 = pipe_i915.la -@HAVE_GALLIUM_ILO_TRUE@am__append_10 = pipe_i965.la -@HAVE_GALLIUM_NOUVEAU_TRUE@am__append_11 = pipe_nouveau.la -@HAVE_GALLIUM_R300_TRUE@am__append_12 = pipe_r300.la -@HAVE_GALLIUM_R600_TRUE@am__append_13 = pipe_r600.la -@HAVE_GALLIUM_RADEONSI_TRUE@am__append_14 = pipe_radeonsi.la -@HAVE_GALLIUM_FREEDRENO_TRUE@am__append_15 = pipe_msm.la -@HAVE_GALLIUM_SVGA_TRUE@am__append_16 = pipe_vmwgfx.la -@HAVE_GALLIUM_SWRAST_TRUE@am__append_17 = pipe_swrast.la -@HAVE_GALLIUM_SOFTPIPE_TRUE@@HAVE_GALLIUM_SWRAST_TRUE@am__append_18 = -DGALLIUM_SOFTPIPE -@HAVE_GALLIUM_SOFTPIPE_TRUE@@HAVE_GALLIUM_SWRAST_TRUE@am__append_19 = \ +@HAVE_GALLIUM_LLVM_TRUE@am__append_8 = $(LLVM_LIBS) +@HAVE_GALLIUM_LLVM_TRUE@am__append_9 = $(LLVM_LDFLAGS) +@HAVE_GALLIUM_I915_TRUE@am__append_10 = pipe_i915.la +@HAVE_GALLIUM_ILO_TRUE@am__append_11 = pipe_i965.la +@HAVE_GALLIUM_NOUVEAU_TRUE@am__append_12 = pipe_nouveau.la +@HAVE_GALLIUM_R300_TRUE@am__append_13 = pipe_r300.la +@HAVE_GALLIUM_R600_TRUE@am__append_14 = pipe_r600.la +@HAVE_GALLIUM_RADEONSI_TRUE@am__append_15 = pipe_radeonsi.la +@HAVE_GALLIUM_FREEDRENO_TRUE@am__append_16 = pipe_msm.la +@HAVE_GALLIUM_SVGA_TRUE@am__append_17 = pipe_vmwgfx.la +@HAVE_GALLIUM_SWRAST_TRUE@am__append_18 = pipe_swrast.la +@HAVE_GALLIUM_SOFTPIPE_TRUE@@HAVE_GALLIUM_SWRAST_TRUE@am__append_19 = -DGALLIUM_SOFTPIPE +@HAVE_GALLIUM_SOFTPIPE_TRUE@@HAVE_GALLIUM_SWRAST_TRUE@am__append_20 = \ @HAVE_GALLIUM_SOFTPIPE_TRUE@@HAVE_GALLIUM_SWRAST_TRUE@ $(top_builddir)/src/gallium/drivers/softpipe/libsoftpipe.la -@HAVE_GALLIUM_LLVMPIPE_TRUE@@HAVE_GALLIUM_SWRAST_TRUE@am__append_20 = -DGALLIUM_LLVMPIPE -@HAVE_GALLIUM_LLVMPIPE_TRUE@@HAVE_GALLIUM_SWRAST_TRUE@am__append_21 = \ +@HAVE_GALLIUM_LLVMPIPE_TRUE@@HAVE_GALLIUM_SWRAST_TRUE@am__append_21 = -DGALLIUM_LLVMPIPE +@HAVE_GALLIUM_LLVMPIPE_TRUE@@HAVE_GALLIUM_SWRAST_TRUE@am__append_22 = \ @HAVE_GALLIUM_LLVMPIPE_TRUE@@HAVE_GALLIUM_SWRAST_TRUE@ $(top_builddir)/src/gallium/drivers/llvmpipe/libllvmpipe.la -@HAVE_GALLIUM_SWRAST_TRUE@@HAVE_GALLIUM_SWR_TRUE@am__append_22 = -DGALLIUM_SWR -@HAVE_GALLIUM_SWRAST_TRUE@@HAVE_GALLIUM_SWR_TRUE@am__append_23 = \ +@HAVE_GALLIUM_SWRAST_TRUE@@HAVE_GALLIUM_SWR_TRUE@am__append_23 = -DGALLIUM_SWR +@HAVE_GALLIUM_SWRAST_TRUE@@HAVE_GALLIUM_SWR_TRUE@am__append_24 = \ @HAVE_GALLIUM_SWRAST_TRUE@@HAVE_GALLIUM_SWR_TRUE@ $(top_builddir)/src/gallium/drivers/swr/libmesaswr.la subdir = src/gallium/targets/pipe-loader @@ -201,18 +204,20 @@ am__installdirs = "$(DESTDIR)$(pipedir)" LTLIBRARIES = $(pipe_LTLIBRARIES) am__DEPENDENCIES_1 = -am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ - $(am__DEPENDENCIES_1) -@HAVE_MESA_LLVM_TRUE@am__DEPENDENCIES_3 = $(am__DEPENDENCIES_1) -am__DEPENDENCIES_4 = $(am__append_3) $(am__append_4) $(am__append_5) \ +@HAVE_LIBDRM_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) +am__DEPENDENCIES_3 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_2) +@HAVE_GALLIUM_LLVM_TRUE@am__DEPENDENCIES_4 = $(am__DEPENDENCIES_1) +am__DEPENDENCIES_5 = $(am__append_4) $(am__append_5) $(am__append_6) \ $(top_builddir)/src/gallium/auxiliary/libgallium.la \ $(top_builddir)/src/compiler/nir/libnir.la \ $(top_builddir)/src/util/libmesautil.la \ $(top_builddir)/src/gallium/drivers/rbug/librbug.la \ $(top_builddir)/src/gallium/drivers/trace/libtrace.la \ - $(am__DEPENDENCIES_2) $(am__DEPENDENCIES_3) + $(am__DEPENDENCIES_3) $(am__DEPENDENCIES_4) @HAVE_GALLIUM_I915_TRUE@pipe_i915_la_DEPENDENCIES = \ -@HAVE_GALLIUM_I915_TRUE@ $(am__DEPENDENCIES_4) \ +@HAVE_GALLIUM_I915_TRUE@ $(am__DEPENDENCIES_5) \ @HAVE_GALLIUM_I915_TRUE@ $(top_builddir)/src/gallium/winsys/i915/drm/libi915drm.la \ @HAVE_GALLIUM_I915_TRUE@ $(top_builddir)/src/gallium/drivers/i915/libi915.la \ @HAVE_GALLIUM_I915_TRUE@ $(am__DEPENDENCIES_1) \ @@ -226,7 +231,7 @@ am__v_lt_1 = @HAVE_GALLIUM_I915_TRUE@am_pipe_i915_la_rpath = -rpath $(pipedir) @HAVE_GALLIUM_ILO_TRUE@pipe_i965_la_DEPENDENCIES = \ -@HAVE_GALLIUM_ILO_TRUE@ $(am__DEPENDENCIES_4) \ +@HAVE_GALLIUM_ILO_TRUE@ $(am__DEPENDENCIES_5) \ @HAVE_GALLIUM_ILO_TRUE@ $(top_builddir)/src/gallium/winsys/intel/drm/libintelwinsys.la \ @HAVE_GALLIUM_ILO_TRUE@ $(top_builddir)/src/gallium/drivers/ilo/libilo.la \ @HAVE_GALLIUM_ILO_TRUE@ $(am__DEPENDENCIES_1) \ @@ -236,7 +241,7 @@ pipe_i965_la_OBJECTS = $(am_pipe_i965_la_OBJECTS) @HAVE_GALLIUM_ILO_TRUE@am_pipe_i965_la_rpath = -rpath $(pipedir) @HAVE_GALLIUM_FREEDRENO_TRUE@pipe_msm_la_DEPENDENCIES = \ -@HAVE_GALLIUM_FREEDRENO_TRUE@ $(am__DEPENDENCIES_4) \ +@HAVE_GALLIUM_FREEDRENO_TRUE@ $(am__DEPENDENCIES_5) \ @HAVE_GALLIUM_FREEDRENO_TRUE@ $(top_builddir)/src/gallium/winsys/freedreno/drm/libfreedrenodrm.la \ @HAVE_GALLIUM_FREEDRENO_TRUE@ $(top_builddir)/src/gallium/drivers/freedreno/libfreedreno.la \ @HAVE_GALLIUM_FREEDRENO_TRUE@ $(am__DEPENDENCIES_1) \ @@ -246,7 +251,7 @@ pipe_msm_la_OBJECTS = $(am_pipe_msm_la_OBJECTS) @HAVE_GALLIUM_FREEDRENO_TRUE@am_pipe_msm_la_rpath = -rpath $(pipedir) @HAVE_GALLIUM_NOUVEAU_TRUE@pipe_nouveau_la_DEPENDENCIES = \ -@HAVE_GALLIUM_NOUVEAU_TRUE@ $(am__DEPENDENCIES_4) \ +@HAVE_GALLIUM_NOUVEAU_TRUE@ $(am__DEPENDENCIES_5) \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(top_builddir)/src/gallium/winsys/nouveau/drm/libnouveaudrm.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(top_builddir)/src/gallium/drivers/nouveau/libnouveau.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(am__DEPENDENCIES_1) \ @@ -258,7 +263,7 @@ @HAVE_GALLIUM_NOUVEAU_TRUE@am_pipe_nouveau_la_rpath = -rpath \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(pipedir) @HAVE_GALLIUM_R300_TRUE@pipe_r300_la_DEPENDENCIES = \ -@HAVE_GALLIUM_R300_TRUE@ $(am__DEPENDENCIES_4) \ +@HAVE_GALLIUM_R300_TRUE@ $(am__DEPENDENCIES_5) \ @HAVE_GALLIUM_R300_TRUE@ $(top_builddir)/src/gallium/winsys/radeon/drm/libradeonwinsys.la \ @HAVE_GALLIUM_R300_TRUE@ $(top_builddir)/src/gallium/drivers/r300/libr300.la \ @HAVE_GALLIUM_R300_TRUE@ $(am__DEPENDENCIES_1) \ @@ -268,7 +273,7 @@ pipe_r300_la_OBJECTS = $(am_pipe_r300_la_OBJECTS) @HAVE_GALLIUM_R300_TRUE@am_pipe_r300_la_rpath = -rpath $(pipedir) @HAVE_GALLIUM_R600_TRUE@pipe_r600_la_DEPENDENCIES = \ -@HAVE_GALLIUM_R600_TRUE@ $(am__DEPENDENCIES_4) \ +@HAVE_GALLIUM_R600_TRUE@ $(am__DEPENDENCIES_5) \ @HAVE_GALLIUM_R600_TRUE@ $(top_builddir)/src/gallium/winsys/radeon/drm/libradeonwinsys.la \ @HAVE_GALLIUM_R600_TRUE@ $(top_builddir)/src/gallium/drivers/radeon/libradeon.la \ @HAVE_GALLIUM_R600_TRUE@ $(top_builddir)/src/gallium/drivers/r600/libr600.la \ @@ -279,11 +284,12 @@ pipe_r600_la_OBJECTS = $(am_pipe_r600_la_OBJECTS) @HAVE_GALLIUM_R600_TRUE@am_pipe_r600_la_rpath = -rpath $(pipedir) @HAVE_GALLIUM_RADEONSI_TRUE@pipe_radeonsi_la_DEPENDENCIES = \ -@HAVE_GALLIUM_RADEONSI_TRUE@ $(am__DEPENDENCIES_4) \ +@HAVE_GALLIUM_RADEONSI_TRUE@ $(am__DEPENDENCIES_5) \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(top_builddir)/src/gallium/winsys/radeon/drm/libradeonwinsys.la \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(top_builddir)/src/gallium/winsys/amdgpu/drm/libamdgpuwinsys.la \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(top_builddir)/src/gallium/drivers/radeon/libradeon.la \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(top_builddir)/src/gallium/drivers/radeonsi/libradeonsi.la \ +@HAVE_GALLIUM_RADEONSI_TRUE@ $(top_builddir)/src/amd/common/libamd_common.la \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(am__DEPENDENCIES_1) @@ -293,23 +299,23 @@ pipe_radeonsi_la_OBJECTS = $(am_pipe_radeonsi_la_OBJECTS) @HAVE_GALLIUM_RADEONSI_TRUE@am_pipe_radeonsi_la_rpath = -rpath \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(pipedir) -@HAVE_DRISW_KMS_TRUE@am__DEPENDENCIES_5 = $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ +@HAVE_DRISW_KMS_TRUE@am__DEPENDENCIES_6 = $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(am__DEPENDENCIES_1) -am__DEPENDENCIES_6 = \ +am__DEPENDENCIES_7 = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__DEPENDENCIES_5) + $(am__append_2) $(am__DEPENDENCIES_6) @HAVE_GALLIUM_SWRAST_TRUE@pipe_swrast_la_DEPENDENCIES = \ -@HAVE_GALLIUM_SWRAST_TRUE@ $(am__DEPENDENCIES_4) \ -@HAVE_GALLIUM_SWRAST_TRUE@ $(am__append_19) $(am__append_21) \ -@HAVE_GALLIUM_SWRAST_TRUE@ $(am__append_23) \ -@HAVE_GALLIUM_SWRAST_TRUE@ $(am__DEPENDENCIES_6) +@HAVE_GALLIUM_SWRAST_TRUE@ $(am__DEPENDENCIES_5) \ +@HAVE_GALLIUM_SWRAST_TRUE@ $(am__append_20) $(am__append_22) \ +@HAVE_GALLIUM_SWRAST_TRUE@ $(am__append_24) \ +@HAVE_GALLIUM_SWRAST_TRUE@ $(am__DEPENDENCIES_7) am__pipe_swrast_la_SOURCES_DIST = pipe_swrast.c @HAVE_GALLIUM_SWRAST_TRUE@am_pipe_swrast_la_OBJECTS = pipe_swrast.lo pipe_swrast_la_OBJECTS = $(am_pipe_swrast_la_OBJECTS) @HAVE_GALLIUM_SWRAST_TRUE@am_pipe_swrast_la_rpath = -rpath $(pipedir) @HAVE_GALLIUM_SVGA_TRUE@pipe_vmwgfx_la_DEPENDENCIES = \ -@HAVE_GALLIUM_SVGA_TRUE@ $(am__DEPENDENCIES_4) \ +@HAVE_GALLIUM_SVGA_TRUE@ $(am__DEPENDENCIES_5) \ @HAVE_GALLIUM_SVGA_TRUE@ $(top_builddir)/src/gallium/winsys/svga/drm/libsvgadrm.la \ @HAVE_GALLIUM_SVGA_TRUE@ $(top_builddir)/src/gallium/drivers/svga/libsvga.la \ @HAVE_GALLIUM_SVGA_TRUE@ $(am__DEPENDENCIES_1) @@ -423,6 +429,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -437,6 +445,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -466,10 +475,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -519,11 +529,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -563,8 +570,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -601,8 +606,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -611,7 +614,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -619,13 +621,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -654,6 +657,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -763,12 +767,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -780,26 +780,26 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CPPFLAGS = $(GALLIUM_CFLAGS) -I$(top_srcdir)/include \ -I$(top_srcdir)/src/gallium/drivers \ -I$(top_srcdir)/src/gallium/winsys \ $(GALLIUM_PIPE_LOADER_DEFINES) $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -DGALLIUM_RBUG -DGALLIUM_TRACE \ - $(am__append_18) $(am__append_20) $(am__append_22) + $(am__append_19) $(am__append_21) $(am__append_23) pipedir = $(libdir)/gallium-pipe -pipe_LTLIBRARIES = $(am__append_9) $(am__append_10) $(am__append_11) \ - $(am__append_12) $(am__append_13) $(am__append_14) \ - $(am__append_15) $(am__append_16) $(am__append_17) -PIPE_LIBS = $(am__append_3) $(am__append_4) $(am__append_5) \ +pipe_LTLIBRARIES = $(am__append_10) $(am__append_11) $(am__append_12) \ + $(am__append_13) $(am__append_14) $(am__append_15) \ + $(am__append_16) $(am__append_17) $(am__append_18) +PIPE_LIBS = $(am__append_4) $(am__append_5) $(am__append_6) \ $(top_builddir)/src/gallium/auxiliary/libgallium.la \ $(top_builddir)/src/compiler/nir/libnir.la \ $(top_builddir)/src/util/libmesautil.la \ $(top_builddir)/src/gallium/drivers/rbug/librbug.la \ $(top_builddir)/src/gallium/drivers/trace/libtrace.la \ - $(GALLIUM_COMMON_LIB_DEPS) $(am__append_7) + $(GALLIUM_COMMON_LIB_DEPS) $(am__append_8) AM_LDFLAGS = -module -no-undefined -avoid-version $(GC_SECTIONS) \ - $(LD_NO_UNDEFINED) $(am__append_6) $(am__append_8) + $(LD_NO_UNDEFINED) $(am__append_7) $(am__append_9) @HAVE_GALLIUM_I915_TRUE@pipe_i915_la_SOURCES = pipe_i915.c @HAVE_GALLIUM_I915_TRUE@nodist_EXTRA_pipe_i915_la_SOURCES = dummy.cpp @HAVE_GALLIUM_I915_TRUE@pipe_i915_la_LIBADD = \ @@ -854,6 +854,7 @@ @HAVE_GALLIUM_RADEONSI_TRUE@ $(top_builddir)/src/gallium/winsys/amdgpu/drm/libamdgpuwinsys.la \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(top_builddir)/src/gallium/drivers/radeon/libradeon.la \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(top_builddir)/src/gallium/drivers/radeonsi/libradeonsi.la \ +@HAVE_GALLIUM_RADEONSI_TRUE@ $(top_builddir)/src/amd/common/libamd_common.la \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(LIBDRM_LIBS) \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(RADEON_LIBS) \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(AMDGPU_LIBS) @@ -878,8 +879,8 @@ @HAVE_GALLIUM_SWRAST_TRUE@pipe_swrast_la_SOURCES = pipe_swrast.c @HAVE_GALLIUM_SWRAST_TRUE@nodist_EXTRA_pipe_swrast_la_SOURCES = dummy.cpp @HAVE_GALLIUM_SWRAST_TRUE@pipe_swrast_la_LIBADD = $(PIPE_LIBS) \ -@HAVE_GALLIUM_SWRAST_TRUE@ $(am__append_19) $(am__append_21) \ -@HAVE_GALLIUM_SWRAST_TRUE@ $(am__append_23) \ +@HAVE_GALLIUM_SWRAST_TRUE@ $(am__append_20) $(am__append_22) \ +@HAVE_GALLIUM_SWRAST_TRUE@ $(am__append_24) \ @HAVE_GALLIUM_SWRAST_TRUE@ $(GALLIUM_PIPE_LOADER_WINSYS_LIBS) EXTRA_DIST = pipe.sym all: all-am diff -Nru mesa-12.0.6/src/gallium/targets/pipe-loader/pipe_i915.c mesa-17.0.7/src/gallium/targets/pipe-loader/pipe_i915.c --- mesa-12.0.6/src/gallium/targets/pipe-loader/pipe_i915.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/pipe-loader/pipe_i915.c 2017-06-01 10:37:10.000000000 +0000 @@ -30,7 +30,7 @@ static const struct drm_conf_ret share_fd_ret = { .type = DRM_CONF_BOOL, - .val.val_int = true, + .val.val_bool = true, }; static const struct drm_conf_ret *drm_configuration(enum drm_conf conf) @@ -47,4 +47,4 @@ } PUBLIC -DRM_DRIVER_DESCRIPTOR("i915", "i915", create_screen, drm_configuration) +DRM_DRIVER_DESCRIPTOR("i915", create_screen, drm_configuration) diff -Nru mesa-12.0.6/src/gallium/targets/pipe-loader/pipe_i965.c mesa-17.0.7/src/gallium/targets/pipe-loader/pipe_i965.c --- mesa-12.0.6/src/gallium/targets/pipe-loader/pipe_i965.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/pipe-loader/pipe_i965.c 2017-06-01 10:37:10.000000000 +0000 @@ -44,4 +44,4 @@ return NULL; } PUBLIC -DRM_DRIVER_DESCRIPTOR("i965", "i915", create_screen, drm_configuration) +DRM_DRIVER_DESCRIPTOR("i965", create_screen, drm_configuration) diff -Nru mesa-12.0.6/src/gallium/targets/pipe-loader/pipe_msm.c mesa-17.0.7/src/gallium/targets/pipe-loader/pipe_msm.c --- mesa-12.0.6/src/gallium/targets/pipe-loader/pipe_msm.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/pipe-loader/pipe_msm.c 2017-06-01 10:37:10.000000000 +0000 @@ -24,7 +24,7 @@ static const struct drm_conf_ret share_fd_ret = { .type = DRM_CONF_BOOL, - .val.val_int = true, + .val.val_bool = true, }; static const struct drm_conf_ret *drm_configuration(enum drm_conf conf) @@ -41,4 +41,4 @@ } PUBLIC -DRM_DRIVER_DESCRIPTOR("msm", "freedreno", create_screen, drm_configuration) +DRM_DRIVER_DESCRIPTOR("msm", create_screen, drm_configuration) diff -Nru mesa-12.0.6/src/gallium/targets/pipe-loader/pipe_nouveau.c mesa-17.0.7/src/gallium/targets/pipe-loader/pipe_nouveau.c --- mesa-12.0.6/src/gallium/targets/pipe-loader/pipe_nouveau.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/pipe-loader/pipe_nouveau.c 2017-06-01 10:37:10.000000000 +0000 @@ -24,7 +24,7 @@ static const struct drm_conf_ret share_fd_ret = { .type = DRM_CONF_BOOL, - .val.val_int = true, + .val.val_bool = true, }; static const struct drm_conf_ret *drm_configuration(enum drm_conf conf) @@ -41,4 +41,4 @@ } PUBLIC -DRM_DRIVER_DESCRIPTOR("nouveau", "nouveau", create_screen, drm_configuration) +DRM_DRIVER_DESCRIPTOR("nouveau", create_screen, drm_configuration) diff -Nru mesa-12.0.6/src/gallium/targets/pipe-loader/pipe_r300.c mesa-17.0.7/src/gallium/targets/pipe-loader/pipe_r300.c --- mesa-12.0.6/src/gallium/targets/pipe-loader/pipe_r300.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/pipe-loader/pipe_r300.c 2017-06-01 10:37:10.000000000 +0000 @@ -20,7 +20,7 @@ static const struct drm_conf_ret share_fd_ret = { .type = DRM_CONF_BOOL, - .val.val_int = true, + .val.val_bool = true, }; static const struct drm_conf_ret *drm_configuration(enum drm_conf conf) @@ -37,4 +37,4 @@ } PUBLIC -DRM_DRIVER_DESCRIPTOR("r300", "radeon", create_screen, drm_configuration) +DRM_DRIVER_DESCRIPTOR("r300", create_screen, drm_configuration) diff -Nru mesa-12.0.6/src/gallium/targets/pipe-loader/pipe_r600.c mesa-17.0.7/src/gallium/targets/pipe-loader/pipe_r600.c --- mesa-12.0.6/src/gallium/targets/pipe-loader/pipe_r600.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/pipe-loader/pipe_r600.c 2017-06-01 10:37:10.000000000 +0000 @@ -20,7 +20,7 @@ static const struct drm_conf_ret share_fd_ret = { .type = DRM_CONF_BOOL, - .val.val_int = true, + .val.val_bool = true, }; static const struct drm_conf_ret *drm_configuration(enum drm_conf conf) @@ -37,4 +37,4 @@ } PUBLIC -DRM_DRIVER_DESCRIPTOR("r600", "radeon", create_screen, drm_configuration) +DRM_DRIVER_DESCRIPTOR("r600", create_screen, drm_configuration) diff -Nru mesa-12.0.6/src/gallium/targets/pipe-loader/pipe_radeonsi.c mesa-17.0.7/src/gallium/targets/pipe-loader/pipe_radeonsi.c --- mesa-12.0.6/src/gallium/targets/pipe-loader/pipe_radeonsi.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/pipe-loader/pipe_radeonsi.c 2017-06-01 10:37:10.000000000 +0000 @@ -26,7 +26,7 @@ static const struct drm_conf_ret share_fd_ret = { .type = DRM_CONF_BOOL, - .val.val_int = true, + .val.val_bool = true, }; static const struct drm_conf_ret *drm_configuration(enum drm_conf conf) @@ -43,4 +43,4 @@ } PUBLIC -DRM_DRIVER_DESCRIPTOR("radeonsi", "radeon", create_screen, drm_configuration) +DRM_DRIVER_DESCRIPTOR("radeonsi", create_screen, drm_configuration) diff -Nru mesa-12.0.6/src/gallium/targets/pipe-loader/pipe_swrast.c mesa-17.0.7/src/gallium/targets/pipe-loader/pipe_swrast.c --- mesa-12.0.6/src/gallium/targets/pipe-loader/pipe_swrast.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/pipe-loader/pipe_swrast.c 2017-06-01 10:37:10.000000000 +0000 @@ -23,7 +23,7 @@ } PUBLIC -struct sw_driver_descriptor swrast_driver_descriptor = { +const struct sw_driver_descriptor swrast_driver_descriptor = { .create_screen = swrast_create_screen, .winsys = { #ifdef HAVE_PIPE_LOADER_DRI diff -Nru mesa-12.0.6/src/gallium/targets/pipe-loader/pipe.sym mesa-17.0.7/src/gallium/targets/pipe-loader/pipe.sym --- mesa-12.0.6/src/gallium/targets/pipe-loader/pipe.sym 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/pipe-loader/pipe.sym 2017-06-01 10:37:10.000000000 +0000 @@ -2,6 +2,11 @@ global: driver_descriptor; swrast_driver_descriptor; + + # Workaround for an LLVM warning with -simplifycfg-sink-common + # due to LLVM being initialized multiple times. + radeon_drm_winsys_create; + amdgpu_winsys_create; local: *; }; diff -Nru mesa-12.0.6/src/gallium/targets/pipe-loader/pipe_vmwgfx.c mesa-17.0.7/src/gallium/targets/pipe-loader/pipe_vmwgfx.c --- mesa-12.0.6/src/gallium/targets/pipe-loader/pipe_vmwgfx.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/pipe-loader/pipe_vmwgfx.c 2017-06-01 10:37:10.000000000 +0000 @@ -30,7 +30,7 @@ static const struct drm_conf_ret share_fd_ret = { .type = DRM_CONF_BOOL, - .val.val_int = true, + .val.val_bool = true, }; static const struct drm_conf_ret *drm_configuration(enum drm_conf conf) @@ -47,4 +47,4 @@ } PUBLIC -DRM_DRIVER_DESCRIPTOR("vmwgfx", "vmwgfx", create_screen, drm_configuration) +DRM_DRIVER_DESCRIPTOR("vmwgfx", create_screen, drm_configuration) diff -Nru mesa-12.0.6/src/gallium/targets/va/Makefile.am mesa-17.0.7/src/gallium/targets/va/Makefile.am --- mesa-12.0.6/src/gallium/targets/va/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/va/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -62,7 +62,7 @@ endif # HAVE_GALLIUM_STATIC_TARGETS -if HAVE_MESA_LLVM +if HAVE_GALLIUM_LLVM gallium_drv_video_la_LIBADD += $(LLVM_LIBS) gallium_drv_video_la_LDFLAGS += $(LLVM_LDFLAGS) endif diff -Nru mesa-12.0.6/src/gallium/targets/va/Makefile.in mesa-17.0.7/src/gallium/targets/va/Makefile.in --- mesa-12.0.6/src/gallium/targets/va/Makefile.in 2017-01-24 01:41:50.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/va/Makefile.in 2017-06-01 10:37:22.000000000 +0000 @@ -89,51 +89,55 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) -@HAVE_LD_VERSION_SCRIPT_TRUE@am__append_3 = \ +@HAVE_LD_VERSION_SCRIPT_TRUE@am__append_4 = \ @HAVE_LD_VERSION_SCRIPT_TRUE@ -Wl,--version-script=$(top_srcdir)/src/gallium/targets/va/va.sym -@HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_4 = nouveau -@HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_5 = -DGALLIUM_NOUVEAU -@HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_6 = \ +@HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_5 = nouveau +@HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_6 = -DGALLIUM_NOUVEAU +@HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_7 = \ @HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/winsys/nouveau/drm/libnouveaudrm.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/drivers/nouveau/libnouveau.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(NOUVEAU_LIBS) \ @HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_7 = r600 -@HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_8 = -DGALLIUM_R600 -@HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_9 = \ +@HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_8 = r600 +@HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_9 = -DGALLIUM_R600 +@HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_10 = \ @HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/drivers/r600/libr600.la \ @HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(RADEON_LIBS) \ @HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_10 = radeonsi -@HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_11 = -DGALLIUM_RADEONSI -@HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_12 = \ +@HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_11 = radeonsi +@HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_12 = -DGALLIUM_RADEONSI +@HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_13 = \ @HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/drivers/radeonsi/libradeonsi.la \ +@HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/amd/common/libamd_common.la \ @HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(RADEON_LIBS) \ @HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(LIBDRM_LIBS) \ @HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(AMDGPU_LIBS) -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_13 = target.c -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_14 = \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_14 = target.c +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_15 = \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_static.la \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(GALLIUM_PIPE_LOADER_WINSYS_LIBS) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(TARGET_LIB_DEPS) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(TARGET_RADEON_WINSYS) $(TARGET_RADEON_COMMON) -@HAVE_GALLIUM_STATIC_TARGETS_FALSE@am__append_15 = \ +@HAVE_GALLIUM_STATIC_TARGETS_FALSE@am__append_16 = \ @HAVE_GALLIUM_STATIC_TARGETS_FALSE@ $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_dynamic.la -@HAVE_MESA_LLVM_TRUE@am__append_16 = $(LLVM_LIBS) -@HAVE_MESA_LLVM_TRUE@am__append_17 = $(LLVM_LDFLAGS) +@HAVE_GALLIUM_LLVM_TRUE@am__append_17 = $(LLVM_LIBS) +@HAVE_GALLIUM_LLVM_TRUE@am__append_18 = $(LLVM_LDFLAGS) subdir = src/gallium/targets/va ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps = $(top_srcdir)/m4/ax_check_gnu_make.m4 \ @@ -182,43 +186,46 @@ am__installdirs = "$(DESTDIR)$(vadir)" LTLIBRARIES = $(va_LTLIBRARIES) am__DEPENDENCIES_1 = -am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ - $(am__DEPENDENCIES_1) -@HAVE_DRISW_KMS_TRUE@am__DEPENDENCIES_3 = $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ +@HAVE_LIBDRM_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) +am__DEPENDENCIES_3 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_2) +@HAVE_DRISW_KMS_TRUE@am__DEPENDENCIES_4 = $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(am__DEPENDENCIES_1) -am__DEPENDENCIES_4 = \ +am__DEPENDENCIES_5 = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__DEPENDENCIES_3) -@HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_5 = $(top_builddir)/src/gallium/winsys/nouveau/drm/libnouveaudrm.la \ + $(am__append_2) $(am__DEPENDENCIES_4) +@HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_6 = $(top_builddir)/src/gallium/winsys/nouveau/drm/libnouveaudrm.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/drivers/nouveau/libnouveau.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_6 = $(top_builddir)/src/gallium/drivers/r600/libr600.la \ +@HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_7 = $(top_builddir)/src/gallium/drivers/r600/libr600.la \ @HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_7 = $(top_builddir)/src/gallium/drivers/radeonsi/libradeonsi.la \ +@HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_8 = $(top_builddir)/src/gallium/drivers/radeonsi/libradeonsi.la \ +@HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/amd/common/libamd_common.la \ @HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_RADEONSI_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_8 = \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_5) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_9 = \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_6) \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_7) -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_9 = $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_static.la \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_4) \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_8) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_7) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_8) +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_10 = $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_static.la \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_5) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_9) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(TARGET_RADEON_WINSYS) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(TARGET_RADEON_COMMON) -@HAVE_MESA_LLVM_TRUE@am__DEPENDENCIES_10 = $(am__DEPENDENCIES_1) +@HAVE_GALLIUM_LLVM_TRUE@am__DEPENDENCIES_11 = $(am__DEPENDENCIES_1) gallium_drv_video_la_DEPENDENCIES = \ $(top_builddir)/src/gallium/state_trackers/va/libvatracker.la \ $(top_builddir)/src/gallium/auxiliary/libgalliumvlwinsys.la \ $(top_builddir)/src/gallium/auxiliary/libgalliumvl.la \ $(top_builddir)/src/gallium/auxiliary/libgallium.la \ $(top_builddir)/src/util/libmesautil.la $(am__DEPENDENCIES_1) \ - $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_2) \ - $(am__DEPENDENCIES_9) $(am__append_15) $(am__DEPENDENCIES_10) + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_3) \ + $(am__DEPENDENCIES_10) $(am__append_16) $(am__DEPENDENCIES_11) am__gallium_drv_video_la_SOURCES_DIST = target.c @HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__objects_1 = gallium_drv_video_la-target.lo am_gallium_drv_video_la_OBJECTS = $(am__objects_1) @@ -321,6 +328,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -335,6 +344,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -364,10 +374,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -417,11 +428,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -461,8 +469,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -499,8 +505,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -509,7 +513,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -517,13 +520,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -552,6 +556,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -661,12 +666,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -678,17 +679,17 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ $(GALLIUM_TARGET_CFLAGS) vadir = $(VA_LIB_INSTALL_DIR) va_LTLIBRARIES = gallium_drv_video.la nodist_EXTRA_gallium_drv_video_la_SOURCES = dummy.cpp -gallium_drv_video_la_SOURCES = $(am__append_13) +gallium_drv_video_la_SOURCES = $(am__append_14) gallium_drv_video_la_LDFLAGS = -shared -module -no-undefined \ -avoid-version $(GC_SECTIONS) $(LD_NO_UNDEFINED) \ - $(am__append_3) $(am__append_17) + $(am__append_4) $(am__append_18) # NOTE: gallium_drv_video does not use(link against) libva gallium_drv_video_la_LIBADD = \ @@ -697,19 +698,19 @@ $(top_builddir)/src/gallium/auxiliary/libgalliumvl.la \ $(top_builddir)/src/gallium/auxiliary/libgallium.la \ $(top_builddir)/src/util/libmesautil.la $(VL_LIBS) \ - $(LIBDRM_LIBS) $(GALLIUM_COMMON_LIB_DEPS) $(am__append_14) \ - $(am__append_15) $(am__append_16) + $(LIBDRM_LIBS) $(GALLIUM_COMMON_LIB_DEPS) $(am__append_15) \ + $(am__append_16) $(am__append_17) EXTRA_gallium_drv_video_la_DEPENDENCIES = va.sym EXTRA_DIST = va.sym -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@TARGET_DRIVERS = $(am__append_4) \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_7) \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_10) -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@TARGET_CPPFLAGS = $(am__append_5) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@TARGET_DRIVERS = $(am__append_5) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_8) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_11) -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@TARGET_LIB_DEPS = $(am__append_6) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@TARGET_CPPFLAGS = $(am__append_6) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_9) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_12) +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@TARGET_LIB_DEPS = $(am__append_7) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_10) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_13) @HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@TARGET_RADEON_WINSYS = \ @HAVE_GALLIUM_R600_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/winsys/radeon/drm/libradeonwinsys.la diff -Nru mesa-12.0.6/src/gallium/targets/va/va.sym mesa-17.0.7/src/gallium/targets/va/va.sym --- mesa-12.0.6/src/gallium/targets/va/va.sym 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/va/va.sym 2017-06-01 10:37:10.000000000 +0000 @@ -1,6 +1,11 @@ { global: __vaDriverInit_*_*; + + # Workaround for an LLVM warning with -simplifycfg-sink-common + # due to LLVM being initialized multiple times. + radeon_drm_winsys_create; + amdgpu_winsys_create; local: *; }; diff -Nru mesa-12.0.6/src/gallium/targets/vdpau/Makefile.am mesa-17.0.7/src/gallium/targets/vdpau/Makefile.am --- mesa-12.0.6/src/gallium/targets/vdpau/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/vdpau/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -72,7 +72,7 @@ endif # HAVE_GALLIUM_STATIC_TARGETS -if HAVE_MESA_LLVM +if HAVE_GALLIUM_LLVM libvdpau_gallium_la_LIBADD += $(LLVM_LIBS) libvdpau_gallium_la_LDFLAGS += $(LLVM_LDFLAGS) endif diff -Nru mesa-12.0.6/src/gallium/targets/vdpau/Makefile.in mesa-17.0.7/src/gallium/targets/vdpau/Makefile.in --- mesa-12.0.6/src/gallium/targets/vdpau/Makefile.in 2017-01-24 01:41:51.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/vdpau/Makefile.in 2017-06-01 10:37:22.000000000 +0000 @@ -89,61 +89,65 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) -@HAVE_LD_VERSION_SCRIPT_TRUE@am__append_3 = \ +@HAVE_LD_VERSION_SCRIPT_TRUE@am__append_4 = \ @HAVE_LD_VERSION_SCRIPT_TRUE@ -Wl,--version-script=$(top_srcdir)/src/gallium/targets/vdpau/vdpau.sym -@HAVE_LD_DYNAMIC_LIST_TRUE@am__append_4 = \ +@HAVE_LD_DYNAMIC_LIST_TRUE@am__append_5 = \ @HAVE_LD_DYNAMIC_LIST_TRUE@ -Wl,--dynamic-list=$(top_srcdir)/src/gallium/targets/dri-vdpau.dyn -@HAVE_GALLIUM_NOUVEAU_TRUE@am__append_5 = nouveau -@HAVE_GALLIUM_NOUVEAU_TRUE@am__append_6 = -DGALLIUM_NOUVEAU -@HAVE_GALLIUM_NOUVEAU_TRUE@am__append_7 = \ +@HAVE_GALLIUM_NOUVEAU_TRUE@am__append_6 = nouveau +@HAVE_GALLIUM_NOUVEAU_TRUE@am__append_7 = -DGALLIUM_NOUVEAU +@HAVE_GALLIUM_NOUVEAU_TRUE@am__append_8 = \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(top_builddir)/src/gallium/winsys/nouveau/drm/libnouveaudrm.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(top_builddir)/src/gallium/drivers/nouveau/libnouveau.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(NOUVEAU_LIBS) \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_R300_TRUE@am__append_8 = r300 -@HAVE_GALLIUM_R300_TRUE@am__append_9 = -DGALLIUM_R300 -@HAVE_GALLIUM_R300_TRUE@am__append_10 = \ +@HAVE_GALLIUM_R300_TRUE@am__append_9 = r300 +@HAVE_GALLIUM_R300_TRUE@am__append_10 = -DGALLIUM_R300 +@HAVE_GALLIUM_R300_TRUE@am__append_11 = \ @HAVE_GALLIUM_R300_TRUE@ $(top_builddir)/src/gallium/drivers/r300/libr300.la \ @HAVE_GALLIUM_R300_TRUE@ $(RADEON_LIBS) \ @HAVE_GALLIUM_R300_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_R600_TRUE@am__append_11 = r600 -@HAVE_GALLIUM_R600_TRUE@am__append_12 = -DGALLIUM_R600 -@HAVE_GALLIUM_R600_TRUE@am__append_13 = \ +@HAVE_GALLIUM_R600_TRUE@am__append_12 = r600 +@HAVE_GALLIUM_R600_TRUE@am__append_13 = -DGALLIUM_R600 +@HAVE_GALLIUM_R600_TRUE@am__append_14 = \ @HAVE_GALLIUM_R600_TRUE@ $(top_builddir)/src/gallium/drivers/r600/libr600.la \ @HAVE_GALLIUM_R600_TRUE@ $(RADEON_LIBS) \ @HAVE_GALLIUM_R600_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_RADEONSI_TRUE@am__append_14 = radeonsi -@HAVE_GALLIUM_RADEONSI_TRUE@am__append_15 = -DGALLIUM_RADEONSI -@HAVE_GALLIUM_RADEONSI_TRUE@am__append_16 = \ +@HAVE_GALLIUM_RADEONSI_TRUE@am__append_15 = radeonsi +@HAVE_GALLIUM_RADEONSI_TRUE@am__append_16 = -DGALLIUM_RADEONSI +@HAVE_GALLIUM_RADEONSI_TRUE@am__append_17 = \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(top_builddir)/src/gallium/drivers/radeonsi/libradeonsi.la \ +@HAVE_GALLIUM_RADEONSI_TRUE@ $(top_builddir)/src/amd/common/libamd_common.la \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(RADEON_LIBS) \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(LIBDRM_LIBS) \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(AMDGPU_LIBS) -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_17 = target.c -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_18 = \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_18 = target.c +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_19 = \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_static.la \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(GALLIUM_PIPE_LOADER_WINSYS_LIBS) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(TARGET_LIB_DEPS) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(TARGET_RADEON_WINSYS) $(TARGET_RADEON_COMMON) -@HAVE_GALLIUM_STATIC_TARGETS_FALSE@am__append_19 = \ +@HAVE_GALLIUM_STATIC_TARGETS_FALSE@am__append_20 = \ @HAVE_GALLIUM_STATIC_TARGETS_FALSE@ $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_dynamic.la -@HAVE_MESA_LLVM_TRUE@am__append_20 = $(LLVM_LIBS) -@HAVE_MESA_LLVM_TRUE@am__append_21 = $(LLVM_LDFLAGS) +@HAVE_GALLIUM_LLVM_TRUE@am__append_21 = $(LLVM_LIBS) +@HAVE_GALLIUM_LLVM_TRUE@am__append_22 = $(LLVM_LDFLAGS) subdir = src/gallium/targets/vdpau ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps = $(top_srcdir)/m4/ax_check_gnu_make.m4 \ @@ -192,43 +196,46 @@ am__installdirs = "$(DESTDIR)$(vdpaudir)" LTLIBRARIES = $(vdpau_LTLIBRARIES) am__DEPENDENCIES_1 = -am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ - $(am__DEPENDENCIES_1) -@HAVE_DRISW_KMS_TRUE@am__DEPENDENCIES_3 = $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ +@HAVE_LIBDRM_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) +am__DEPENDENCIES_3 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_2) +@HAVE_DRISW_KMS_TRUE@am__DEPENDENCIES_4 = $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(am__DEPENDENCIES_1) -am__DEPENDENCIES_4 = \ +am__DEPENDENCIES_5 = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__DEPENDENCIES_3) -@HAVE_GALLIUM_NOUVEAU_TRUE@am__DEPENDENCIES_5 = $(top_builddir)/src/gallium/winsys/nouveau/drm/libnouveaudrm.la \ + $(am__append_2) $(am__DEPENDENCIES_4) +@HAVE_GALLIUM_NOUVEAU_TRUE@am__DEPENDENCIES_6 = $(top_builddir)/src/gallium/winsys/nouveau/drm/libnouveaudrm.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(top_builddir)/src/gallium/drivers/nouveau/libnouveau.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_R300_TRUE@am__DEPENDENCIES_6 = $(top_builddir)/src/gallium/drivers/r300/libr300.la \ +@HAVE_GALLIUM_R300_TRUE@am__DEPENDENCIES_7 = $(top_builddir)/src/gallium/drivers/r300/libr300.la \ @HAVE_GALLIUM_R300_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_R300_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_R600_TRUE@am__DEPENDENCIES_7 = $(top_builddir)/src/gallium/drivers/r600/libr600.la \ +@HAVE_GALLIUM_R600_TRUE@am__DEPENDENCIES_8 = $(top_builddir)/src/gallium/drivers/r600/libr600.la \ @HAVE_GALLIUM_R600_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_R600_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_RADEONSI_TRUE@am__DEPENDENCIES_8 = $(top_builddir)/src/gallium/drivers/radeonsi/libradeonsi.la \ +@HAVE_GALLIUM_RADEONSI_TRUE@am__DEPENDENCIES_9 = $(top_builddir)/src/gallium/drivers/radeonsi/libradeonsi.la \ +@HAVE_GALLIUM_RADEONSI_TRUE@ $(top_builddir)/src/amd/common/libamd_common.la \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_RADEONSI_TRUE@ $(am__DEPENDENCIES_1) -am__DEPENDENCIES_9 = $(am__DEPENDENCIES_5) $(am__DEPENDENCIES_6) \ - $(am__DEPENDENCIES_7) $(am__DEPENDENCIES_8) -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_10 = $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_static.la \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_4) \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_9) \ +am__DEPENDENCIES_10 = $(am__DEPENDENCIES_6) $(am__DEPENDENCIES_7) \ + $(am__DEPENDENCIES_8) $(am__DEPENDENCIES_9) +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_11 = $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_static.la \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_5) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_10) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(TARGET_RADEON_WINSYS) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(TARGET_RADEON_COMMON) -@HAVE_MESA_LLVM_TRUE@am__DEPENDENCIES_11 = $(am__DEPENDENCIES_1) +@HAVE_GALLIUM_LLVM_TRUE@am__DEPENDENCIES_12 = $(am__DEPENDENCIES_1) libvdpau_gallium_la_DEPENDENCIES = $(top_builddir)/src/gallium/state_trackers/vdpau/libvdpautracker.la \ $(top_builddir)/src/gallium/auxiliary/libgalliumvlwinsys.la \ $(top_builddir)/src/gallium/auxiliary/libgalliumvl.la \ $(top_builddir)/src/gallium/auxiliary/libgallium.la \ $(top_builddir)/src/util/libmesautil.la $(am__DEPENDENCIES_1) \ - $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_2) \ - $(am__DEPENDENCIES_10) $(am__append_19) $(am__DEPENDENCIES_11) + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_3) \ + $(am__DEPENDENCIES_11) $(am__append_20) $(am__DEPENDENCIES_12) am__libvdpau_gallium_la_SOURCES_DIST = target.c @HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__objects_1 = libvdpau_gallium_la-target.lo am_libvdpau_gallium_la_OBJECTS = $(am__objects_1) @@ -332,6 +339,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -346,6 +355,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -375,10 +385,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -428,11 +439,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -472,8 +480,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -510,8 +516,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -520,7 +524,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -528,13 +531,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -563,6 +567,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -672,12 +677,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -689,18 +690,18 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ $(GALLIUM_TARGET_CFLAGS) vdpaudir = $(VDPAU_LIB_INSTALL_DIR) vdpau_LTLIBRARIES = libvdpau_gallium.la nodist_EXTRA_libvdpau_gallium_la_SOURCES = dummy.cpp -libvdpau_gallium_la_SOURCES = $(am__append_17) +libvdpau_gallium_la_SOURCES = $(am__append_18) libvdpau_gallium_la_LDFLAGS = -shared -module -no-undefined \ -version-number $(VDPAU_MAJOR):$(VDPAU_MINOR) $(GC_SECTIONS) \ - $(LD_NO_UNDEFINED) $(am__append_3) $(am__append_4) \ - $(am__append_21) + $(LD_NO_UNDEFINED) $(am__append_4) $(am__append_5) \ + $(am__append_22) # NOTE: libvdpau_gallium does not use(link against) libvdpau libvdpau_gallium_la_LIBADD = $(top_builddir)/src/gallium/state_trackers/vdpau/libvdpautracker.la \ @@ -708,8 +709,8 @@ $(top_builddir)/src/gallium/auxiliary/libgalliumvl.la \ $(top_builddir)/src/gallium/auxiliary/libgallium.la \ $(top_builddir)/src/util/libmesautil.la $(VL_LIBS) \ - $(LIBDRM_LIBS) $(GALLIUM_COMMON_LIB_DEPS) $(am__append_18) \ - $(am__append_19) $(am__append_20) + $(LIBDRM_LIBS) $(GALLIUM_COMMON_LIB_DEPS) $(am__append_19) \ + $(am__append_20) $(am__append_21) EXTRA_libvdpau_gallium_la_DEPENDENCIES = \ vdpau.sym \ $(top_srcdir)/src/gallium/targets/dri-vdpau.dyn @@ -718,12 +719,12 @@ vdpau.sym \ $(top_srcdir)/src/gallium/targets/dri-vdpau.dyn -TARGET_DRIVERS = $(am__append_5) $(am__append_8) $(am__append_11) \ - $(am__append_14) -TARGET_CPPFLAGS = $(am__append_6) $(am__append_9) $(am__append_12) \ +TARGET_DRIVERS = $(am__append_6) $(am__append_9) $(am__append_12) \ $(am__append_15) -TARGET_LIB_DEPS = $(am__append_7) $(am__append_10) $(am__append_13) \ +TARGET_CPPFLAGS = $(am__append_7) $(am__append_10) $(am__append_13) \ $(am__append_16) +TARGET_LIB_DEPS = $(am__append_8) $(am__append_11) $(am__append_14) \ + $(am__append_17) @HAVE_GALLIUM_R300_TRUE@TARGET_RADEON_WINSYS = \ @HAVE_GALLIUM_R300_TRUE@ $(top_builddir)/src/gallium/winsys/radeon/drm/libradeonwinsys.la diff -Nru mesa-12.0.6/src/gallium/targets/xa/Makefile.am mesa-17.0.7/src/gallium/targets/xa/Makefile.am --- mesa-12.0.6/src/gallium/targets/xa/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/xa/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -86,7 +86,7 @@ endif # HAVE_GALLIUM_STATIC_TARGETS -if HAVE_MESA_LLVM +if HAVE_GALLIUM_LLVM libxatracker_la_LIBADD += $(LLVM_LIBS) libxatracker_la_LDFLAGS += $(LLVM_LDFLAGS) endif diff -Nru mesa-12.0.6/src/gallium/targets/xa/Makefile.in mesa-17.0.7/src/gallium/targets/xa/Makefile.in --- mesa-12.0.6/src/gallium/targets/xa/Makefile.in 2017-01-24 01:41:51.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/xa/Makefile.in 2017-06-01 10:37:22.000000000 +0000 @@ -115,66 +115,69 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) -@HAVE_LD_VERSION_SCRIPT_TRUE@am__append_3 = \ +@HAVE_LD_VERSION_SCRIPT_TRUE@am__append_4 = \ @HAVE_LD_VERSION_SCRIPT_TRUE@ -Wl,--version-script=$(top_srcdir)/src/gallium/targets/xa/xa.sym -@HAVE_GALLIUM_I915_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_4 = i915 -@HAVE_GALLIUM_I915_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_5 = -DGALLIUM_I915 -@HAVE_GALLIUM_I915_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_6 = \ +@HAVE_GALLIUM_I915_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_5 = i915 +@HAVE_GALLIUM_I915_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_6 = -DGALLIUM_I915 +@HAVE_GALLIUM_I915_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_7 = \ @HAVE_GALLIUM_I915_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/winsys/i915/drm/libi915drm.la \ @HAVE_GALLIUM_I915_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/drivers/i915/libi915.la \ @HAVE_GALLIUM_I915_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(INTEL_LIBS) \ @HAVE_GALLIUM_I915_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_ILO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_7 = ilo -@HAVE_GALLIUM_ILO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_8 = -DGALLIUM_ILO -@HAVE_GALLIUM_ILO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_9 = \ +@HAVE_GALLIUM_ILO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_8 = ilo +@HAVE_GALLIUM_ILO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_9 = -DGALLIUM_ILO +@HAVE_GALLIUM_ILO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_10 = \ @HAVE_GALLIUM_ILO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/winsys/intel/drm/libintelwinsys.la \ @HAVE_GALLIUM_ILO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/drivers/ilo/libilo.la \ @HAVE_GALLIUM_ILO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(INTEL_LIBS) \ @HAVE_GALLIUM_ILO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_10 = nouveau -@HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_11 = -DGALLIUM_NOUVEAU -@HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_12 = \ +@HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_11 = nouveau +@HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_12 = -DGALLIUM_NOUVEAU +@HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_13 = \ @HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/winsys/nouveau/drm/libnouveaudrm.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/drivers/nouveau/libnouveau.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(NOUVEAU_LIBS) \ @HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@@HAVE_GALLIUM_SVGA_TRUE@am__append_13 = vmwgfx -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@@HAVE_GALLIUM_SVGA_TRUE@am__append_14 = -DGALLIUM_VMWGFX -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@@HAVE_GALLIUM_SVGA_TRUE@am__append_15 = \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@@HAVE_GALLIUM_SVGA_TRUE@am__append_14 = vmwgfx +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@@HAVE_GALLIUM_SVGA_TRUE@am__append_15 = -DGALLIUM_VMWGFX +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@@HAVE_GALLIUM_SVGA_TRUE@am__append_16 = \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@@HAVE_GALLIUM_SVGA_TRUE@ $(top_builddir)/src/gallium/winsys/svga/drm/libsvgadrm.la \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@@HAVE_GALLIUM_SVGA_TRUE@ $(top_builddir)/src/gallium/drivers/svga/libsvga.la \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@@HAVE_GALLIUM_SVGA_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_FREEDRENO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_16 = msm kgsl -@HAVE_GALLIUM_FREEDRENO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_17 = -DGALLIUM_FREEDRENO -@HAVE_GALLIUM_FREEDRENO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_18 = \ +@HAVE_GALLIUM_FREEDRENO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_17 = msm kgsl +@HAVE_GALLIUM_FREEDRENO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_18 = -DGALLIUM_FREEDRENO +@HAVE_GALLIUM_FREEDRENO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_19 = \ @HAVE_GALLIUM_FREEDRENO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/winsys/freedreno/drm/libfreedrenodrm.la \ @HAVE_GALLIUM_FREEDRENO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/drivers/freedreno/libfreedreno.la \ @HAVE_GALLIUM_FREEDRENO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(FREEDRENO_LIBS) \ @HAVE_GALLIUM_FREEDRENO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_19 = target.c -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_20 = \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_20 = target.c +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_21 = \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_static.la \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(GALLIUM_PIPE_LOADER_WINSYS_LIBS) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(TARGET_LIB_DEPS) -@HAVE_GALLIUM_STATIC_TARGETS_FALSE@am__append_21 = \ +@HAVE_GALLIUM_STATIC_TARGETS_FALSE@am__append_22 = \ @HAVE_GALLIUM_STATIC_TARGETS_FALSE@ $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_dynamic.la -@HAVE_MESA_LLVM_TRUE@am__append_22 = $(LLVM_LIBS) -@HAVE_MESA_LLVM_TRUE@am__append_23 = $(LLVM_LDFLAGS) +@HAVE_GALLIUM_LLVM_TRUE@am__append_23 = $(LLVM_LIBS) +@HAVE_GALLIUM_LLVM_TRUE@am__append_24 = $(LLVM_LDFLAGS) subdir = src/gallium/targets/xa ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps = $(top_srcdir)/m4/ax_check_gnu_make.m4 \ @@ -223,51 +226,53 @@ am__installdirs = "$(DESTDIR)$(libdir)" "$(DESTDIR)$(pkgconfigdir)" LTLIBRARIES = $(lib_LTLIBRARIES) am__DEPENDENCIES_1 = -am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ - $(am__DEPENDENCIES_1) -@HAVE_DRISW_KMS_TRUE@am__DEPENDENCIES_3 = $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ +@HAVE_LIBDRM_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) +am__DEPENDENCIES_3 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_2) +@HAVE_DRISW_KMS_TRUE@am__DEPENDENCIES_4 = $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(am__DEPENDENCIES_1) -am__DEPENDENCIES_4 = \ +am__DEPENDENCIES_5 = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__DEPENDENCIES_3) -@HAVE_GALLIUM_I915_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_5 = $(top_builddir)/src/gallium/winsys/i915/drm/libi915drm.la \ + $(am__append_2) $(am__DEPENDENCIES_4) +@HAVE_GALLIUM_I915_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_6 = $(top_builddir)/src/gallium/winsys/i915/drm/libi915drm.la \ @HAVE_GALLIUM_I915_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/drivers/i915/libi915.la \ @HAVE_GALLIUM_I915_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_I915_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_ILO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_6 = $(top_builddir)/src/gallium/winsys/intel/drm/libintelwinsys.la \ +@HAVE_GALLIUM_ILO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_7 = $(top_builddir)/src/gallium/winsys/intel/drm/libintelwinsys.la \ @HAVE_GALLIUM_ILO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/drivers/ilo/libilo.la \ @HAVE_GALLIUM_ILO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_ILO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_7 = $(top_builddir)/src/gallium/winsys/nouveau/drm/libnouveaudrm.la \ +@HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_8 = $(top_builddir)/src/gallium/winsys/nouveau/drm/libnouveaudrm.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/drivers/nouveau/libnouveau.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_NOUVEAU_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@@HAVE_GALLIUM_SVGA_TRUE@am__DEPENDENCIES_8 = $(top_builddir)/src/gallium/winsys/svga/drm/libsvgadrm.la \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@@HAVE_GALLIUM_SVGA_TRUE@am__DEPENDENCIES_9 = $(top_builddir)/src/gallium/winsys/svga/drm/libsvgadrm.la \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@@HAVE_GALLIUM_SVGA_TRUE@ $(top_builddir)/src/gallium/drivers/svga/libsvga.la \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@@HAVE_GALLIUM_SVGA_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_FREEDRENO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_9 = $(top_builddir)/src/gallium/winsys/freedreno/drm/libfreedrenodrm.la \ +@HAVE_GALLIUM_FREEDRENO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_10 = $(top_builddir)/src/gallium/winsys/freedreno/drm/libfreedrenodrm.la \ @HAVE_GALLIUM_FREEDRENO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/drivers/freedreno/libfreedreno.la \ @HAVE_GALLIUM_FREEDRENO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_FREEDRENO_TRUE@@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_10 = \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_5) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_11 = \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_6) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_7) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_8) \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_9) -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_11 = $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_static.la \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_4) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_9) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_10) -@HAVE_MESA_LLVM_TRUE@am__DEPENDENCIES_12 = $(am__DEPENDENCIES_1) +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_12 = $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_static.la \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_5) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_11) +@HAVE_GALLIUM_LLVM_TRUE@am__DEPENDENCIES_13 = $(am__DEPENDENCIES_1) libxatracker_la_DEPENDENCIES = \ $(top_builddir)/src/gallium/state_trackers/xa/libxatracker.la \ $(top_builddir)/src/gallium/auxiliary/libgalliumvl_stub.la \ $(top_builddir)/src/gallium/auxiliary/libgallium.la \ $(top_builddir)/src/compiler/nir/libnir.la \ $(top_builddir)/src/util/libmesautil.la $(am__DEPENDENCIES_1) \ - $(am__DEPENDENCIES_2) $(am__DEPENDENCIES_11) $(am__append_21) \ - $(am__DEPENDENCIES_12) + $(am__DEPENDENCIES_3) $(am__DEPENDENCIES_12) $(am__append_22) \ + $(am__DEPENDENCIES_13) am__libxatracker_la_SOURCES_DIST = target.c @HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__objects_1 = \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ libxatracker_la-target.lo @@ -375,6 +380,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -389,6 +396,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -418,10 +426,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -471,11 +480,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -515,8 +521,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -553,8 +557,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -563,7 +565,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -571,13 +572,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -606,6 +608,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -715,12 +718,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -732,7 +731,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ $(GALLIUM_TARGET_CFLAGS) @@ -740,35 +739,35 @@ pkgconfig_DATA = xatracker.pc lib_LTLIBRARIES = libxatracker.la nodist_EXTRA_libxatracker_la_SOURCES = dummy.cpp -libxatracker_la_SOURCES = $(am__append_19) +libxatracker_la_SOURCES = $(am__append_20) libxatracker_la_LIBADD = \ $(top_builddir)/src/gallium/state_trackers/xa/libxatracker.la \ $(top_builddir)/src/gallium/auxiliary/libgalliumvl_stub.la \ $(top_builddir)/src/gallium/auxiliary/libgallium.la \ $(top_builddir)/src/compiler/nir/libnir.la \ $(top_builddir)/src/util/libmesautil.la $(LIBDRM_LIBS) \ - $(GALLIUM_COMMON_LIB_DEPS) $(am__append_20) $(am__append_21) \ - $(am__append_22) + $(GALLIUM_COMMON_LIB_DEPS) $(am__append_21) $(am__append_22) \ + $(am__append_23) libxatracker_la_LDFLAGS = -no-undefined -version-number \ $(XA_MAJOR):$(XA_MINOR):$(XA_TINY) $(GC_SECTIONS) \ - $(LD_NO_UNDEFINED) $(am__append_3) $(am__append_23) + $(LD_NO_UNDEFINED) $(am__append_4) $(am__append_24) EXTRA_libxatracker_la_DEPENDENCIES = xa.sym EXTRA_DIST = xa.sym -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@TARGET_DRIVERS = $(am__append_4) \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_7) \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_10) \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_13) \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_16) -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@TARGET_CPPFLAGS = $(am__append_5) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@TARGET_DRIVERS = $(am__append_5) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_8) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_11) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_14) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_17) -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@TARGET_LIB_DEPS = $(am__append_6) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@TARGET_CPPFLAGS = $(am__append_6) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_9) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_12) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_15) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_18) +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@TARGET_LIB_DEPS = $(am__append_7) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_10) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_13) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_16) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__append_19) @HAVE_GALLIUM_STATIC_TARGETS_TRUE@libxatracker_la_CPPFLAGS = $(TARGET_CPPFLAGS) all: all-am diff -Nru mesa-12.0.6/src/gallium/targets/xvmc/Makefile.am mesa-17.0.7/src/gallium/targets/xvmc/Makefile.am --- mesa-12.0.6/src/gallium/targets/xvmc/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/xvmc/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -60,7 +60,7 @@ endif # HAVE_GALLIUM_STATIC_TARGETS -if HAVE_MESA_LLVM +if HAVE_GALLIUM_LLVM libXvMCgallium_la_LIBADD += $(LLVM_LIBS) libXvMCgallium_la_LDFLAGS += $(LLVM_LDFLAGS) endif diff -Nru mesa-12.0.6/src/gallium/targets/xvmc/Makefile.in mesa-17.0.7/src/gallium/targets/xvmc/Makefile.in --- mesa-12.0.6/src/gallium/targets/xvmc/Makefile.in 2017-01-24 01:41:51.000000000 +0000 +++ mesa-17.0.7/src/gallium/targets/xvmc/Makefile.in 2017-06-01 10:37:22.000000000 +0000 @@ -89,43 +89,46 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) -@HAVE_LD_VERSION_SCRIPT_TRUE@am__append_3 = \ +@HAVE_LD_VERSION_SCRIPT_TRUE@am__append_4 = \ @HAVE_LD_VERSION_SCRIPT_TRUE@ -Wl,--version-script=$(top_srcdir)/src/gallium/targets/xvmc/xvmc.sym -@HAVE_GALLIUM_NOUVEAU_TRUE@am__append_4 = nouveau -@HAVE_GALLIUM_NOUVEAU_TRUE@am__append_5 = -DGALLIUM_NOUVEAU -@HAVE_GALLIUM_NOUVEAU_TRUE@am__append_6 = \ +@HAVE_GALLIUM_NOUVEAU_TRUE@am__append_5 = nouveau +@HAVE_GALLIUM_NOUVEAU_TRUE@am__append_6 = -DGALLIUM_NOUVEAU +@HAVE_GALLIUM_NOUVEAU_TRUE@am__append_7 = \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(top_builddir)/src/gallium/winsys/nouveau/drm/libnouveaudrm.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(top_builddir)/src/gallium/drivers/nouveau/libnouveau.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(NOUVEAU_LIBS) \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_R600_TRUE@am__append_7 = r600 -@HAVE_GALLIUM_R600_TRUE@am__append_8 = -DGALLIUM_R600 -@HAVE_GALLIUM_R600_TRUE@am__append_9 = \ +@HAVE_GALLIUM_R600_TRUE@am__append_8 = r600 +@HAVE_GALLIUM_R600_TRUE@am__append_9 = -DGALLIUM_R600 +@HAVE_GALLIUM_R600_TRUE@am__append_10 = \ @HAVE_GALLIUM_R600_TRUE@ $(top_builddir)/src/gallium/drivers/r600/libr600.la \ @HAVE_GALLIUM_R600_TRUE@ $(RADEON_LIBS) \ @HAVE_GALLIUM_R600_TRUE@ $(LIBDRM_LIBS) -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_10 = target.c -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_11 = \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_11 = target.c +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__append_12 = \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_static.la \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(GALLIUM_PIPE_LOADER_WINSYS_LIBS) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(TARGET_LIB_DEPS) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(TARGET_RADEON_WINSYS) $(TARGET_RADEON_COMMON) -@HAVE_GALLIUM_STATIC_TARGETS_FALSE@am__append_12 = \ +@HAVE_GALLIUM_STATIC_TARGETS_FALSE@am__append_13 = \ @HAVE_GALLIUM_STATIC_TARGETS_FALSE@ $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_dynamic.la -@HAVE_MESA_LLVM_TRUE@am__append_13 = $(LLVM_LIBS) -@HAVE_MESA_LLVM_TRUE@am__append_14 = $(LLVM_LDFLAGS) +@HAVE_GALLIUM_LLVM_TRUE@am__append_14 = $(LLVM_LIBS) +@HAVE_GALLIUM_LLVM_TRUE@am__append_15 = $(LLVM_LDFLAGS) subdir = src/gallium/targets/xvmc ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps = $(top_srcdir)/m4/ax_check_gnu_make.m4 \ @@ -174,36 +177,38 @@ am__installdirs = "$(DESTDIR)$(xvmcdir)" LTLIBRARIES = $(xvmc_LTLIBRARIES) am__DEPENDENCIES_1 = -am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ - $(am__DEPENDENCIES_1) -@HAVE_DRISW_KMS_TRUE@am__DEPENDENCIES_3 = $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ +@HAVE_LIBDRM_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) +am__DEPENDENCIES_3 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_2) +@HAVE_DRISW_KMS_TRUE@am__DEPENDENCIES_4 = $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(am__DEPENDENCIES_1) -am__DEPENDENCIES_4 = \ +am__DEPENDENCIES_5 = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__DEPENDENCIES_3) -@HAVE_GALLIUM_NOUVEAU_TRUE@am__DEPENDENCIES_5 = $(top_builddir)/src/gallium/winsys/nouveau/drm/libnouveaudrm.la \ + $(am__append_2) $(am__DEPENDENCIES_4) +@HAVE_GALLIUM_NOUVEAU_TRUE@am__DEPENDENCIES_6 = $(top_builddir)/src/gallium/winsys/nouveau/drm/libnouveaudrm.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(top_builddir)/src/gallium/drivers/nouveau/libnouveau.la \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_NOUVEAU_TRUE@ $(am__DEPENDENCIES_1) -@HAVE_GALLIUM_R600_TRUE@am__DEPENDENCIES_6 = $(top_builddir)/src/gallium/drivers/r600/libr600.la \ +@HAVE_GALLIUM_R600_TRUE@am__DEPENDENCIES_7 = $(top_builddir)/src/gallium/drivers/r600/libr600.la \ @HAVE_GALLIUM_R600_TRUE@ $(am__DEPENDENCIES_1) \ @HAVE_GALLIUM_R600_TRUE@ $(am__DEPENDENCIES_1) -am__DEPENDENCIES_7 = $(am__DEPENDENCIES_5) $(am__DEPENDENCIES_6) -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_8 = $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_static.la \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_4) \ -@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_7) \ +am__DEPENDENCIES_8 = $(am__DEPENDENCIES_6) $(am__DEPENDENCIES_7) +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__DEPENDENCIES_9 = $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_static.la \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_5) \ +@HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(am__DEPENDENCIES_8) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(TARGET_RADEON_WINSYS) \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ $(TARGET_RADEON_COMMON) -@HAVE_MESA_LLVM_TRUE@am__DEPENDENCIES_9 = $(am__DEPENDENCIES_1) +@HAVE_GALLIUM_LLVM_TRUE@am__DEPENDENCIES_10 = $(am__DEPENDENCIES_1) libXvMCgallium_la_DEPENDENCIES = $(top_builddir)/src/gallium/state_trackers/xvmc/libxvmctracker.la \ $(top_builddir)/src/gallium/auxiliary/libgalliumvlwinsys.la \ $(top_builddir)/src/gallium/auxiliary/libgalliumvl.la \ $(top_builddir)/src/gallium/auxiliary/libgallium.la \ $(top_builddir)/src/util/libmesautil.la $(am__DEPENDENCIES_1) \ $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ - $(am__DEPENDENCIES_2) $(am__DEPENDENCIES_8) $(am__append_12) \ - $(am__DEPENDENCIES_9) + $(am__DEPENDENCIES_3) $(am__DEPENDENCIES_9) $(am__append_13) \ + $(am__DEPENDENCIES_10) am__libXvMCgallium_la_SOURCES_DIST = target.c @HAVE_GALLIUM_STATIC_TARGETS_TRUE@am__objects_1 = \ @HAVE_GALLIUM_STATIC_TARGETS_TRUE@ libXvMCgallium_la-target.lo @@ -306,6 +311,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -320,6 +327,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -349,10 +357,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -402,11 +411,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -446,8 +452,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -484,8 +488,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -494,7 +496,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -502,13 +503,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -537,6 +539,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -646,12 +649,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -663,29 +662,29 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ $(GALLIUM_TARGET_CFLAGS) xvmcdir = $(XVMC_LIB_INSTALL_DIR) xvmc_LTLIBRARIES = libXvMCgallium.la nodist_EXTRA_libXvMCgallium_la_SOURCES = dummy.cpp -libXvMCgallium_la_SOURCES = $(am__append_10) +libXvMCgallium_la_SOURCES = $(am__append_11) libXvMCgallium_la_LDFLAGS = -shared -module -no-undefined \ -version-number $(XVMC_MAJOR):$(XVMC_MINOR) $(GC_SECTIONS) \ - $(LD_NO_UNDEFINED) $(am__append_3) $(am__append_14) + $(LD_NO_UNDEFINED) $(am__append_4) $(am__append_15) libXvMCgallium_la_LIBADD = $(top_builddir)/src/gallium/state_trackers/xvmc/libxvmctracker.la \ $(top_builddir)/src/gallium/auxiliary/libgalliumvlwinsys.la \ $(top_builddir)/src/gallium/auxiliary/libgalliumvl.la \ $(top_builddir)/src/gallium/auxiliary/libgallium.la \ $(top_builddir)/src/util/libmesautil.la $(XVMC_LIBS) \ $(VL_LIBS) $(LIBDRM_LIBS) $(GALLIUM_COMMON_LIB_DEPS) \ - $(am__append_11) $(am__append_12) $(am__append_13) + $(am__append_12) $(am__append_13) $(am__append_14) EXTRA_libXvMCgallium_la_DEPENDENCIES = xvmc.sym EXTRA_DIST = xvmc.sym -TARGET_DRIVERS = $(am__append_4) $(am__append_7) -TARGET_CPPFLAGS = $(am__append_5) $(am__append_8) -TARGET_LIB_DEPS = $(am__append_6) $(am__append_9) +TARGET_DRIVERS = $(am__append_5) $(am__append_8) +TARGET_CPPFLAGS = $(am__append_6) $(am__append_9) +TARGET_LIB_DEPS = $(am__append_7) $(am__append_10) @HAVE_GALLIUM_R600_TRUE@TARGET_RADEON_WINSYS = \ @HAVE_GALLIUM_R600_TRUE@ $(top_builddir)/src/gallium/winsys/radeon/drm/libradeonwinsys.la diff -Nru mesa-12.0.6/src/gallium/tests/graw/clear.c mesa-17.0.7/src/gallium/tests/graw/clear.c --- mesa-12.0.6/src/gallium/tests/graw/clear.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/tests/graw/clear.c 2017-06-01 10:37:10.000000000 +0000 @@ -65,6 +65,7 @@ if (ctx == NULL) exit(3); + memset(&templat, 0, sizeof(templat)); templat.target = PIPE_TEXTURE_2D; templat.format = formats[i]; templat.width0 = WIDTH; diff -Nru mesa-12.0.6/src/gallium/tests/graw/fs-test.c mesa-17.0.7/src/gallium/tests/graw/fs-test.c --- mesa-12.0.6/src/gallium/tests/graw/fs-test.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/tests/graw/fs-test.c 2017-06-01 10:37:10.000000000 +0000 @@ -293,6 +293,7 @@ tex2d[1][1][3] = 255; #endif + memset(&templat, 0, sizeof(templat)); templat.target = PIPE_TEXTURE_2D; templat.format = PIPE_FORMAT_B8G8R8A8_UNORM; templat.width0 = SIZE; @@ -311,14 +312,14 @@ u_box_2d(0,0,SIZE,SIZE, &box); - ctx->transfer_inline_write(ctx, - samptex, - 0, - PIPE_TRANSFER_WRITE, - &box, - tex2d, - sizeof tex2d[0], - sizeof tex2d); + ctx->texture_subdata(ctx, + samptex, + 0, + PIPE_TRANSFER_WRITE, + &box, + tex2d, + sizeof tex2d[0], + sizeof tex2d); /* Possibly read back & compare against original data: */ @@ -402,6 +403,7 @@ if (ctx == NULL) exit(3); + memset(&templat, 0, sizeof(templat)); templat.target = PIPE_TEXTURE_2D; templat.format = formats[i]; templat.width0 = WIDTH; diff -Nru mesa-12.0.6/src/gallium/tests/graw/graw_util.h mesa-17.0.7/src/gallium/tests/graw/graw_util.h --- mesa-12.0.6/src/gallium/tests/graw/graw_util.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/tests/graw/graw_util.h 2017-06-01 10:37:10.000000000 +0000 @@ -43,6 +43,7 @@ int i; memset(info, 0, sizeof(*info)); + memset(&resource_temp, 0, sizeof(resource_temp)); /* It's hard to say whether window or screen should be created * first. Different environments would prefer one or the other. @@ -224,6 +225,7 @@ struct pipe_resource temp, *tex; struct pipe_box box; + memset(&temp, 0, sizeof(temp)); temp.target = PIPE_TEXTURE_2D; temp.format = format; temp.width0 = width; @@ -242,14 +244,14 @@ u_box_2d(0, 0, width, height, &box); - info->ctx->transfer_inline_write(info->ctx, - tex, - 0, - PIPE_TRANSFER_WRITE, - &box, - data, - row_stride, - image_bytes); + info->ctx->texture_subdata(info->ctx, + tex, + 0, + PIPE_TRANSFER_WRITE, + &box, + data, + row_stride, + image_bytes); /* Possibly read back & compare against original data: */ diff -Nru mesa-12.0.6/src/gallium/tests/graw/gs-test.c mesa-17.0.7/src/gallium/tests/graw/gs-test.c --- mesa-12.0.6/src/gallium/tests/graw/gs-test.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/tests/graw/gs-test.c 2017-06-01 10:37:10.000000000 +0000 @@ -149,8 +149,8 @@ static void init_fs_constbuf( void ) { struct pipe_resource templat; - struct pipe_box box; + memset(&templat, 0, sizeof(templat)); templat.target = PIPE_BUFFER; templat.format = PIPE_FORMAT_R8_UNORM; templat.width0 = sizeof(constants1); @@ -169,34 +169,18 @@ exit(4); { - u_box_2d(0,0,sizeof(constants1),1, &box); - - ctx->transfer_inline_write(ctx, - constbuf1, - 0, - PIPE_TRANSFER_WRITE, - &box, - constants1, - sizeof constants1, - sizeof constants1); - + ctx->buffer_subdata(ctx, constbuf1, + PIPE_TRANSFER_WRITE, + 0, sizeof(constants1), constants1); pipe_set_constant_buffer(ctx, PIPE_SHADER_GEOMETRY, 0, constbuf1); } { - u_box_2d(0,0,sizeof(constants2),1, &box); - - ctx->transfer_inline_write(ctx, - constbuf2, - 0, - PIPE_TRANSFER_WRITE, - &box, - constants2, - sizeof constants2, - sizeof constants2); - + ctx->buffer_subdata(ctx, constbuf2, + PIPE_TRANSFER_WRITE, + 0, sizeof(constants2), constants2); pipe_set_constant_buffer(ctx, PIPE_SHADER_GEOMETRY, 1, @@ -400,6 +384,7 @@ tex2d[1][1][3] = 255; #endif + memset(&templat, 0, sizeof(templat)); templat.target = PIPE_TEXTURE_2D; templat.format = PIPE_FORMAT_B8G8R8A8_UNORM; templat.width0 = SIZE; @@ -418,14 +403,14 @@ u_box_2d(0,0,SIZE,SIZE, &box); - ctx->transfer_inline_write(ctx, - samptex, - 0, - PIPE_TRANSFER_WRITE, - &box, - tex2d, - sizeof tex2d[0], - sizeof tex2d); + ctx->texture_subdata(ctx, + samptex, + 0, + PIPE_TRANSFER_WRITE, + &box, + tex2d, + sizeof tex2d[0], + sizeof tex2d); /* Possibly read back & compare against original data: */ @@ -509,6 +494,7 @@ if (ctx == NULL) exit(3); + memset(&templat, 0, sizeof(templat)); templat.target = PIPE_TEXTURE_2D; templat.format = formats[i]; templat.width0 = WIDTH; diff -Nru mesa-12.0.6/src/gallium/tests/graw/quad-sample.c mesa-17.0.7/src/gallium/tests/graw/quad-sample.c --- mesa-12.0.6/src/gallium/tests/graw/quad-sample.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/tests/graw/quad-sample.c 2017-06-01 10:37:10.000000000 +0000 @@ -209,6 +209,7 @@ tex2d[1][1][3] = 255; #endif + memset(&templat, 0, sizeof(templat)); templat.target = PIPE_TEXTURE_2D; templat.format = PIPE_FORMAT_B8G8R8A8_UNORM; templat.width0 = SIZE; @@ -226,14 +227,14 @@ u_box_2d(0,0,SIZE,SIZE, &box); - ctx->transfer_inline_write(ctx, - samptex, - 0, - PIPE_TRANSFER_WRITE, - &box, - tex2d, - sizeof tex2d[0], - sizeof tex2d); + ctx->texture_subdata(ctx, + samptex, + 0, + PIPE_TRANSFER_WRITE, + &box, + tex2d, + sizeof tex2d[0], + sizeof tex2d); /* Possibly read back & compare against original data: */ @@ -317,6 +318,7 @@ if (ctx == NULL) exit(3); + memset(&templat, 0, sizeof(templat)); templat.target = PIPE_TEXTURE_2D; templat.format = formats[i]; templat.width0 = WIDTH; diff -Nru mesa-12.0.6/src/gallium/tests/graw/shader-leak.c mesa-17.0.7/src/gallium/tests/graw/shader-leak.c --- mesa-12.0.6/src/gallium/tests/graw/shader-leak.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/tests/graw/shader-leak.c 2017-06-01 10:37:10.000000000 +0000 @@ -192,6 +192,7 @@ if (ctx == NULL) exit(3); + memset(&templat, 0, sizeof(templat)); templat.target = PIPE_TEXTURE_2D; templat.format = formats[i]; templat.width0 = WIDTH; diff -Nru mesa-12.0.6/src/gallium/tests/graw/tri-gs.c mesa-17.0.7/src/gallium/tests/graw/tri-gs.c --- mesa-12.0.6/src/gallium/tests/graw/tri-gs.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/tests/graw/tri-gs.c 2017-06-01 10:37:10.000000000 +0000 @@ -199,6 +199,7 @@ if (ctx == NULL) exit(3); + memset(&templat, 0, sizeof(templat)); templat.target = PIPE_TEXTURE_2D; templat.format = formats[i]; templat.width0 = WIDTH; diff -Nru mesa-12.0.6/src/gallium/tests/graw/tri-instanced.c mesa-17.0.7/src/gallium/tests/graw/tri-instanced.c --- mesa-12.0.6/src/gallium/tests/graw/tri-instanced.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/tests/graw/tri-instanced.c 2017-06-01 10:37:10.000000000 +0000 @@ -250,6 +250,7 @@ if (ctx == NULL) exit(3); + memset(&templat, 0, sizeof(templat)); templat.target = PIPE_TEXTURE_2D; templat.format = formats[i]; templat.width0 = WIDTH; diff -Nru mesa-12.0.6/src/gallium/tests/graw/vs-test.c mesa-17.0.7/src/gallium/tests/graw/vs-test.c --- mesa-12.0.6/src/gallium/tests/graw/vs-test.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/tests/graw/vs-test.c 2017-06-01 10:37:10.000000000 +0000 @@ -82,6 +82,7 @@ struct pipe_resource templat; struct pipe_box box; + memset(&templat, 0, sizeof(templat)); templat.target = PIPE_BUFFER; templat.format = PIPE_FORMAT_R8_UNORM; templat.width0 = sizeof(constants); @@ -100,15 +101,9 @@ u_box_2d(0,0,sizeof(constants),1, &box); - ctx->transfer_inline_write(ctx, - constbuf, - 0, - PIPE_TRANSFER_WRITE, - &box, - constants, - sizeof constants, - sizeof constants); - + ctx->buffer_subdata(ctx, constbuf, + PIPE_TRANSFER_WRITE, + 0, sizeof(constants), constants); pipe_set_constant_buffer(ctx, PIPE_SHADER_VERTEX, 0, @@ -287,6 +282,7 @@ tex2d[1][1][3] = 255; #endif + memset(&templat, 0, sizeof(templat)); templat.target = PIPE_TEXTURE_2D; templat.format = PIPE_FORMAT_B8G8R8A8_UNORM; templat.width0 = SIZE; @@ -305,14 +301,14 @@ u_box_2d(0,0,SIZE,SIZE, &box); - ctx->transfer_inline_write(ctx, - samptex, - 0, - PIPE_TRANSFER_WRITE, - &box, - tex2d, - sizeof tex2d[0], - sizeof tex2d); + ctx->texture_subdata(ctx, + samptex, + 0, + PIPE_TRANSFER_WRITE, + &box, + tex2d, + sizeof tex2d[0], + sizeof tex2d); /* Possibly read back & compare against original data: */ @@ -396,6 +392,7 @@ if (ctx == NULL) exit(3); + memset(&templat, 0, sizeof(templat)); templat.target = PIPE_TEXTURE_2D; templat.format = formats[i]; templat.width0 = WIDTH; diff -Nru mesa-12.0.6/src/gallium/tests/trivial/Makefile.in mesa-17.0.7/src/gallium/tests/trivial/Makefile.in --- mesa-12.0.6/src/gallium/tests/trivial/Makefile.in 2017-01-24 01:41:51.000000000 +0000 +++ mesa-17.0.7/src/gallium/tests/trivial/Makefile.in 2017-06-01 10:37:22.000000000 +0000 @@ -89,10 +89,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -120,11 +123,13 @@ compute_OBJECTS = $(am_compute_OBJECTS) compute_LDADD = $(LDADD) am__DEPENDENCIES_1 = -am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ - $(am__DEPENDENCIES_1) +@HAVE_LIBDRM_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) +am__DEPENDENCIES_3 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_2) compute_DEPENDENCIES = $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_dynamic.la \ $(top_builddir)/src/gallium/auxiliary/libgallium.la \ - $(top_builddir)/src/util/libmesautil.la $(am__DEPENDENCIES_2) + $(top_builddir)/src/util/libmesautil.la $(am__DEPENDENCIES_3) AM_V_lt = $(am__v_lt_@AM_V@) am__v_lt_ = $(am__v_lt_@AM_DEFAULT_V@) am__v_lt_0 = --silent @@ -134,13 +139,13 @@ quad_tex_LDADD = $(LDADD) quad_tex_DEPENDENCIES = $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_dynamic.la \ $(top_builddir)/src/gallium/auxiliary/libgallium.la \ - $(top_builddir)/src/util/libmesautil.la $(am__DEPENDENCIES_2) + $(top_builddir)/src/util/libmesautil.la $(am__DEPENDENCIES_3) am_tri_OBJECTS = tri.$(OBJEXT) tri_OBJECTS = $(am_tri_OBJECTS) tri_LDADD = $(LDADD) tri_DEPENDENCIES = $(top_builddir)/src/gallium/auxiliary/pipe-loader/libpipe_loader_dynamic.la \ $(top_builddir)/src/gallium/auxiliary/libgallium.la \ - $(top_builddir)/src/util/libmesautil.la $(am__DEPENDENCIES_2) + $(top_builddir)/src/util/libmesautil.la $(am__DEPENDENCIES_3) AM_V_P = $(am__v_P_@AM_V@) am__v_P_ = $(am__v_P_@AM_DEFAULT_V@) am__v_P_0 = false @@ -209,6 +214,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -223,6 +230,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -252,10 +260,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -305,11 +314,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -349,8 +355,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -387,8 +391,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -397,7 +399,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -405,13 +406,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -440,6 +442,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -549,12 +552,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -566,7 +565,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) PIPE_SRC_DIR = $(top_builddir)/src/gallium/targets/pipe-loader AM_CFLAGS = \ $(GALLIUM_CFLAGS) diff -Nru mesa-12.0.6/src/gallium/tests/trivial/quad-tex.c mesa-17.0.7/src/gallium/tests/trivial/quad-tex.c --- mesa-12.0.6/src/gallium/tests/trivial/quad-tex.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/tests/trivial/quad-tex.c 2017-06-01 10:37:10.000000000 +0000 @@ -272,6 +272,7 @@ /* fragment shader */ p->fs = util_make_fragment_tex_shader(p->pipe, TGSI_TEXTURE_2D, TGSI_INTERPOLATE_LINEAR, + TGSI_RETURN_TYPE_FLOAT, TGSI_RETURN_TYPE_FLOAT); } diff -Nru mesa-12.0.6/src/gallium/tests/unit/Makefile.in mesa-17.0.7/src/gallium/tests/unit/Makefile.in --- mesa-12.0.6/src/gallium/tests/unit/Makefile.in 2017-01-24 01:41:51.000000000 +0000 +++ mesa-17.0.7/src/gallium/tests/unit/Makefile.in 2017-06-01 10:37:22.000000000 +0000 @@ -91,10 +91,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -124,15 +127,17 @@ pipe_barrier_test_OBJECTS = $(am_pipe_barrier_test_OBJECTS) pipe_barrier_test_LDADD = $(LDADD) am__DEPENDENCIES_1 = -am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ - $(am__DEPENDENCIES_1) +@HAVE_LIBDRM_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) +am__DEPENDENCIES_3 = $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_2) pipe_barrier_test_DEPENDENCIES = \ $(top_builddir)/src/gallium/auxiliary/libgallium.la \ $(top_builddir)/src/util/libmesautil.la \ $(top_builddir)/src/gallium/drivers/trace/libtrace.la \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/drivers/softpipe/libsoftpipe.la \ - $(am__DEPENDENCIES_2) + $(am__DEPENDENCIES_3) AM_V_lt = $(am__v_lt_@AM_V@) am__v_lt_ = $(am__v_lt_@AM_DEFAULT_V@) am__v_lt_0 = --silent @@ -146,7 +151,7 @@ $(top_builddir)/src/gallium/drivers/trace/libtrace.la \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/drivers/softpipe/libsoftpipe.la \ - $(am__DEPENDENCIES_2) + $(am__DEPENDENCIES_3) am_u_cache_test_OBJECTS = u_cache_test.$(OBJEXT) u_cache_test_OBJECTS = $(am_u_cache_test_OBJECTS) u_cache_test_LDADD = $(LDADD) @@ -156,7 +161,7 @@ $(top_builddir)/src/gallium/drivers/trace/libtrace.la \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/drivers/softpipe/libsoftpipe.la \ - $(am__DEPENDENCIES_2) + $(am__DEPENDENCIES_3) am_u_format_compatible_test_OBJECTS = \ u_format_compatible_test.$(OBJEXT) u_format_compatible_test_OBJECTS = \ @@ -168,7 +173,7 @@ $(top_builddir)/src/gallium/drivers/trace/libtrace.la \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/drivers/softpipe/libsoftpipe.la \ - $(am__DEPENDENCIES_2) + $(am__DEPENDENCIES_3) am_u_format_test_OBJECTS = u_format_test.$(OBJEXT) u_format_test_OBJECTS = $(am_u_format_test_OBJECTS) u_format_test_LDADD = $(LDADD) @@ -178,7 +183,7 @@ $(top_builddir)/src/gallium/drivers/trace/libtrace.la \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/drivers/softpipe/libsoftpipe.la \ - $(am__DEPENDENCIES_2) + $(am__DEPENDENCIES_3) am_u_half_test_OBJECTS = u_half_test.$(OBJEXT) u_half_test_OBJECTS = $(am_u_half_test_OBJECTS) u_half_test_LDADD = $(LDADD) @@ -188,7 +193,7 @@ $(top_builddir)/src/gallium/drivers/trace/libtrace.la \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/drivers/softpipe/libsoftpipe.la \ - $(am__DEPENDENCIES_2) + $(am__DEPENDENCIES_3) AM_V_P = $(am__v_P_@AM_V@) am__v_P_ = $(am__v_P_@AM_DEFAULT_V@) am__v_P_0 = false @@ -261,6 +266,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -275,6 +282,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -304,10 +312,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -357,11 +366,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -401,8 +407,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -439,8 +443,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -449,7 +451,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -457,13 +458,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -492,6 +494,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -601,12 +604,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -618,7 +617,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) EXTRA_DIST = SConscript AM_CFLAGS = \ $(GALLIUM_CFLAGS) diff -Nru mesa-12.0.6/src/gallium/tests/unit/u_cache_test.c mesa-17.0.7/src/gallium/tests/unit/u_cache_test.c --- mesa-12.0.6/src/gallium/tests/unit/u_cache_test.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/tests/unit/u_cache_test.c 2017-06-01 10:37:10.000000000 +0000 @@ -35,7 +35,7 @@ #include #include "util/u_cache.h" -#include "util/u_hash.h" +#include "util/crc32.h" typedef uint32_t cache_test_key; diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/addrinterface.cpp mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/addrinterface.cpp --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/addrinterface.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/addrinterface.cpp 1970-01-01 00:00:00.000000000 +0000 @@ -1,1008 +0,0 @@ -/* - * Copyright © 2014 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ - -/** -*************************************************************************************************** -* @file addrinterface.cpp -* @brief Contains the addrlib interface functions -*************************************************************************************************** -*/ -#include "addrinterface.h" -#include "addrlib.h" - -#include "addrcommon.h" - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// Create/Destroy/Config functions -/////////////////////////////////////////////////////////////////////////////////////////////////// - -/** -*************************************************************************************************** -* AddrCreate -* -* @brief -* Create address lib object -* -* @return -* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrCreate( - const ADDR_CREATE_INPUT* pAddrCreateIn, ///< [in] infomation for creating address lib object - ADDR_CREATE_OUTPUT* pAddrCreateOut) ///< [out] address lib handle -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - returnCode = AddrLib::Create(pAddrCreateIn, pAddrCreateOut); - - return returnCode; -} - - - -/** -*************************************************************************************************** -* AddrDestroy -* -* @brief -* Destroy address lib object -* -* @return -* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrDestroy( - ADDR_HANDLE hLib) ///< [in] address lib handle -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (hLib) - { - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - pLib->Destroy(); - } - else - { - returnCode = ADDR_ERROR; - } - - return returnCode; -} - - - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// Surface functions -/////////////////////////////////////////////////////////////////////////////////////////////////// - -/** -*************************************************************************************************** -* AddrComputeSurfaceInfo -* -* @brief -* Calculate surface width/height/depth/alignments and suitable tiling mode -* -* @return -* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceInfo( - ADDR_HANDLE hLib, ///< [in] address lib handle - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] surface information - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) ///< [out] surface parameters and alignments -{ - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (pLib != NULL) - { - returnCode = pLib->ComputeSurfaceInfo(pIn, pOut); - } - else - { - returnCode = ADDR_ERROR; - } - - return returnCode; -} - - - -/** -*************************************************************************************************** -* AddrComputeSurfaceAddrFromCoord -* -* @brief -* Compute surface address according to coordinates -* -* @return -* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceAddrFromCoord( - ADDR_HANDLE hLib, ///< [in] address lib handle - const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ///< [in] surface info and coordinates - ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] surface address -{ - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (pLib != NULL) - { - returnCode = pLib->ComputeSurfaceAddrFromCoord(pIn, pOut); - } - else - { - returnCode = ADDR_ERROR; - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrComputeSurfaceCoordFromAddr -* -* @brief -* Compute coordinates according to surface address -* -* @return -* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceCoordFromAddr( - ADDR_HANDLE hLib, ///< [in] address lib handle - const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, ///< [in] surface info and address - ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) ///< [out] coordinates -{ - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (pLib != NULL) - { - returnCode = pLib->ComputeSurfaceCoordFromAddr(pIn, pOut); - } - else - { - returnCode = ADDR_ERROR; - } - - return returnCode; -} - - - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// HTile functions -/////////////////////////////////////////////////////////////////////////////////////////////////// - -/** -*************************************************************************************************** -* AddrComputeHtileInfo -* -* @brief -* Compute Htile pitch, height, base alignment and size in bytes -* -* @return -* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeHtileInfo( - ADDR_HANDLE hLib, ///< [in] address lib handle - const ADDR_COMPUTE_HTILE_INFO_INPUT* pIn, ///< [in] Htile information - ADDR_COMPUTE_HTILE_INFO_OUTPUT* pOut) ///< [out] Htile pitch, height and size in bytes -{ - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (pLib != NULL) - { - returnCode = pLib->ComputeHtileInfo(pIn, pOut); - } - else - { - returnCode = ADDR_ERROR; - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrComputeHtileAddrFromCoord -* -* @brief -* Compute Htile address according to coordinates (of depth buffer) -* -* @return -* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeHtileAddrFromCoord( - ADDR_HANDLE hLib, ///< [in] address lib handle - const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, ///< [in] Htile info and coordinates - ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] Htile address -{ - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (pLib != NULL) - { - returnCode = pLib->ComputeHtileAddrFromCoord(pIn, pOut); - } - else - { - returnCode = ADDR_ERROR; - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrComputeHtileCoordFromAddr -* -* @brief -* Compute coordinates within depth buffer (1st pixel of a micro tile) according to -* Htile address -* -* @return -* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeHtileCoordFromAddr( - ADDR_HANDLE hLib, ///< [in] address lib handle - const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, ///< [in] Htile info and address - ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut) ///< [out] Htile coordinates -{ - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (pLib != NULL) - { - returnCode = pLib->ComputeHtileCoordFromAddr(pIn, pOut); - } - else - { - returnCode = ADDR_ERROR; - } - - return returnCode; -} - - - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// C-mask functions -/////////////////////////////////////////////////////////////////////////////////////////////////// - -/** -*************************************************************************************************** -* AddrComputeCmaskInfo -* -* @brief -* Compute Cmask pitch, height, base alignment and size in bytes from color buffer -* info -* -* @return -* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskInfo( - ADDR_HANDLE hLib, ///< [in] address lib handle - const ADDR_COMPUTE_CMASK_INFO_INPUT* pIn, ///< [in] Cmask pitch and height - ADDR_COMPUTE_CMASK_INFO_OUTPUT* pOut) ///< [out] Cmask pitch, height and size in bytes -{ - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (pLib != NULL) - { - returnCode = pLib->ComputeCmaskInfo(pIn, pOut); - } - else - { - returnCode = ADDR_ERROR; - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrComputeCmaskAddrFromCoord -* -* @brief -* Compute Cmask address according to coordinates (of MSAA color buffer) -* -* @return -* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskAddrFromCoord( - ADDR_HANDLE hLib, ///< [in] address lib handle - const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] Cmask info and coordinates - ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] Cmask address -{ - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (pLib != NULL) - { - returnCode = pLib->ComputeCmaskAddrFromCoord(pIn, pOut); - } - else - { - returnCode = ADDR_ERROR; - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrComputeCmaskCoordFromAddr -* -* @brief -* Compute coordinates within color buffer (1st pixel of a micro tile) according to -* Cmask address -* -* @return -* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskCoordFromAddr( - ADDR_HANDLE hLib, ///< [in] address lib handle - const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn, ///< [in] Cmask info and address - ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut) ///< [out] Cmask coordinates -{ - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (pLib != NULL) - { - returnCode = pLib->ComputeCmaskCoordFromAddr(pIn, pOut); - } - else - { - returnCode = ADDR_ERROR; - } - - return returnCode; -} - - - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// F-mask functions -/////////////////////////////////////////////////////////////////////////////////////////////////// - -/** -*************************************************************************************************** -* AddrComputeFmaskInfo -* -* @brief -* Compute Fmask pitch/height/depth/alignments and size in bytes -* -* @return -* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskInfo( - ADDR_HANDLE hLib, ///< [in] address lib handle - const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, ///< [in] Fmask information - ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut) ///< [out] Fmask pitch and height -{ - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (pLib != NULL) - { - returnCode = pLib->ComputeFmaskInfo(pIn, pOut); - } - else - { - returnCode = ADDR_ERROR; - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrComputeFmaskAddrFromCoord -* -* @brief -* Compute Fmask address according to coordinates (x,y,slice,sample,plane) -* -* @return -* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskAddrFromCoord( - ADDR_HANDLE hLib, ///< [in] address lib handle - const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] Fmask info and coordinates - ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) ///< [out] Fmask address -{ - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (pLib != NULL) - { - returnCode = pLib->ComputeFmaskAddrFromCoord(pIn, pOut); - } - else - { - returnCode = ADDR_ERROR; - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrComputeFmaskCoordFromAddr -* -* @brief -* Compute coordinates (x,y,slice,sample,plane) according to Fmask address -* -* @return -* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskCoordFromAddr( - ADDR_HANDLE hLib, ///< [in] address lib handle - const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, ///< [in] Fmask info and address - ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) ///< [out] Fmask coordinates -{ - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (pLib != NULL) - { - returnCode = pLib->ComputeFmaskCoordFromAddr(pIn, pOut); - } - else - { - returnCode = ADDR_ERROR; - } - - return returnCode; -} - - - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// DCC key functions -/////////////////////////////////////////////////////////////////////////////////////////////////// - -/** -*************************************************************************************************** -* AddrComputeDccInfo -* -* @brief -* Compute DCC key size, base alignment based on color surface size, tile info or tile index -* -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeDccInfo( - ADDR_HANDLE hLib, ///< [in] handle of addrlib - const ADDR_COMPUTE_DCCINFO_INPUT* pIn, ///< [in] input - ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) ///< [out] output -{ - ADDR_E_RETURNCODE returnCode; - - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - - if (pLib != NULL) - { - returnCode = pLib->ComputeDccInfo(pIn, pOut); - } - else - { - returnCode = ADDR_ERROR; - } - - return returnCode; -} - - - -/////////////////////////////////////////////////////////////////////////////// -// Below functions are element related or helper functions -/////////////////////////////////////////////////////////////////////////////// - -/** -*************************************************************************************************** -* AddrGetVersion -* -* @brief -* Get AddrLib version number. Client may check this return value against ADDRLIB_VERSION -* defined in addrinterface.h to see if there is a mismatch. -*************************************************************************************************** -*/ -UINT_32 ADDR_API AddrGetVersion(ADDR_HANDLE hLib) -{ - UINT_32 version = 0; - - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - - ADDR_ASSERT(pLib != NULL); - - if (pLib) - { - version = pLib->GetVersion(); - } - - return version; -} - -/** -*************************************************************************************************** -* AddrUseTileIndex -* -* @brief -* Return TRUE if tileIndex is enabled in this address library -*************************************************************************************************** -*/ -BOOL_32 ADDR_API AddrUseTileIndex(ADDR_HANDLE hLib) -{ - BOOL_32 useTileIndex = FALSE; - - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - - ADDR_ASSERT(pLib != NULL); - - if (pLib) - { - useTileIndex = pLib->UseTileIndex(0); - } - - return useTileIndex; -} - -/** -*************************************************************************************************** -* AddrUseCombinedSwizzle -* -* @brief -* Return TRUE if combined swizzle is enabled in this address library -*************************************************************************************************** -*/ -BOOL_32 ADDR_API AddrUseCombinedSwizzle(ADDR_HANDLE hLib) -{ - BOOL_32 useCombinedSwizzle = FALSE; - - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - - ADDR_ASSERT(pLib != NULL); - - if (pLib) - { - useCombinedSwizzle = pLib->UseCombinedSwizzle(); - } - - return useCombinedSwizzle; -} - -/** -*************************************************************************************************** -* AddrExtractBankPipeSwizzle -* -* @brief -* Extract Bank and Pipe swizzle from base256b -* @return -* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrExtractBankPipeSwizzle( - ADDR_HANDLE hLib, ///< [in] addrlib handle - const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, ///< [in] input structure - ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) ///< [out] output structure -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - - if (pLib != NULL) - { - returnCode = pLib->ExtractBankPipeSwizzle(pIn, pOut); - } - else - { - returnCode = ADDR_ERROR; - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrCombineBankPipeSwizzle -* -* @brief -* Combine Bank and Pipe swizzle -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrCombineBankPipeSwizzle( - ADDR_HANDLE hLib, - const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT* pIn, - ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT* pOut) -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - - if (pLib != NULL) - { - returnCode = pLib->CombineBankPipeSwizzle(pIn, pOut); - } - else - { - returnCode = ADDR_ERROR; - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrComputeSliceSwizzle -* -* @brief -* Compute a swizzle for slice from a base swizzle -* @return -* ADDR_OK if no error -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeSliceSwizzle( - ADDR_HANDLE hLib, - const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, - ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - - if (pLib != NULL) - { - returnCode = pLib->ComputeSliceTileSwizzle(pIn, pOut); - } - else - { - returnCode = ADDR_ERROR; - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrComputeBaseSwizzle -* -* @brief -* Return a Combined Bank and Pipe swizzle base on surface based on surface type/index -* @return -* ADDR_OK if no error -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeBaseSwizzle( - ADDR_HANDLE hLib, - const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, - ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - - if (pLib != NULL) - { - returnCode = pLib->ComputeBaseSwizzle(pIn, pOut); - } - else - { - returnCode = ADDR_ERROR; - } - - return returnCode; -} - -/** -*************************************************************************************************** -* ElemFlt32ToDepthPixel -* -* @brief -* Convert a FLT_32 value to a depth/stencil pixel value -* -* @return -* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE -* -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API ElemFlt32ToDepthPixel( - ADDR_HANDLE hLib, ///< [in] addrlib handle - const ELEM_FLT32TODEPTHPIXEL_INPUT* pIn, ///< [in] per-component value - ELEM_FLT32TODEPTHPIXEL_OUTPUT* pOut) ///< [out] final pixel value -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - - if (pLib != NULL) - { - pLib->Flt32ToDepthPixel(pIn, pOut); - } - else - { - returnCode = ADDR_ERROR; - } - - return returnCode; -} - -/** -*************************************************************************************************** -* ElemFlt32ToColorPixel -* -* @brief -* Convert a FLT_32 value to a red/green/blue/alpha pixel value -* -* @return -* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE -* -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API ElemFlt32ToColorPixel( - ADDR_HANDLE hLib, ///< [in] addrlib handle - const ELEM_FLT32TOCOLORPIXEL_INPUT* pIn, ///< [in] format, surface number and swap value - ELEM_FLT32TOCOLORPIXEL_OUTPUT* pOut) ///< [out] final pixel value -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - - if (pLib != NULL) - { - pLib->Flt32ToColorPixel(pIn, pOut); - } - else - { - returnCode = ADDR_ERROR; - } - - return returnCode; -} - -/** -*************************************************************************************************** -* ElemGetExportNorm -* -* @brief -* Helper function to check one format can be EXPORT_NUM, -* which is a register CB_COLOR_INFO.SURFACE_FORMAT. -* FP16 can be reported as EXPORT_NORM for rv770 in r600 -* family -* -*************************************************************************************************** -*/ -BOOL_32 ADDR_API ElemGetExportNorm( - ADDR_HANDLE hLib, ///< [in] addrlib handle - const ELEM_GETEXPORTNORM_INPUT* pIn) ///< [in] input structure -{ - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - BOOL_32 enabled = FALSE; - - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (pLib != NULL) - { - enabled = pLib->GetExportNorm(pIn); - } - else - { - returnCode = ADDR_ERROR; - } - - ADDR_ASSERT(returnCode == ADDR_OK); - - return enabled; -} - -/** -*************************************************************************************************** -* AddrConvertTileInfoToHW -* -* @brief -* Convert tile info from real value to hardware register value -* -* @return -* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrConvertTileInfoToHW( - ADDR_HANDLE hLib, ///< [in] address lib handle - const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, ///< [in] tile info with real value - ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) ///< [out] tile info with HW register value -{ - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (pLib != NULL) - { - returnCode = pLib->ConvertTileInfoToHW(pIn, pOut); - } - else - { - returnCode = ADDR_ERROR; - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrConvertTileIndex -* -* @brief -* Convert tile index to tile mode/type/info -* -* @return -* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex( - ADDR_HANDLE hLib, ///< [in] address lib handle - const ADDR_CONVERT_TILEINDEX_INPUT* pIn, ///< [in] input - tile index - ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) ///< [out] tile mode/type/info -{ - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (pLib != NULL) - { - returnCode = pLib->ConvertTileIndex(pIn, pOut); - } - else - { - returnCode = ADDR_ERROR; - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrConvertTileIndex1 -* -* @brief -* Convert tile index to tile mode/type/info -* -* @return -* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex1( - ADDR_HANDLE hLib, ///< [in] address lib handle - const ADDR_CONVERT_TILEINDEX1_INPUT* pIn, ///< [in] input - tile index - ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) ///< [out] tile mode/type/info -{ - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (pLib != NULL) - { - returnCode = pLib->ConvertTileIndex1(pIn, pOut); - } - else - { - returnCode = ADDR_ERROR; - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrGetTileIndex -* -* @brief -* Get tile index from tile mode/type/info -* -* @return -* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE -* -* @note -* Only meaningful for SI (and above) -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrGetTileIndex( - ADDR_HANDLE hLib, - const ADDR_GET_TILEINDEX_INPUT* pIn, - ADDR_GET_TILEINDEX_OUTPUT* pOut) -{ - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (pLib != NULL) - { - returnCode = pLib->GetTileIndex(pIn, pOut); - } - else - { - returnCode = ADDR_ERROR; - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrComputePrtInfo -* -* @brief -* Interface function for ComputePrtInfo -* -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputePrtInfo( - ADDR_HANDLE hLib, - const ADDR_PRT_INFO_INPUT* pIn, - ADDR_PRT_INFO_OUTPUT* pOut) -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - AddrLib* pLib = AddrLib::GetAddrLib(hLib); - - if (pLib != NULL) - { - returnCode = pLib->ComputePrtInfo(pIn, pOut); - } - else - { - returnCode = ADDR_ERROR; - } - - return returnCode; -} - diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/addrinterface.h mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/addrinterface.h --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/addrinterface.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/addrinterface.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,2166 +0,0 @@ -/* - * Copyright © 2014 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ - -/** -*************************************************************************************************** -* @file addrinterface.h -* @brief Contains the addrlib interfaces declaration and parameter defines -*************************************************************************************************** -*/ -#ifndef __ADDR_INTERFACE_H__ -#define __ADDR_INTERFACE_H__ - -#include "addrtypes.h" - -#if defined(__cplusplus) -extern "C" -{ -#endif - -#define ADDRLIB_VERSION_MAJOR 5 -#define ADDRLIB_VERSION_MINOR 25 -#define ADDRLIB_VERSION ((ADDRLIB_VERSION_MAJOR << 16) | ADDRLIB_VERSION_MINOR) - -/// Virtually all interface functions need ADDR_HANDLE as first parameter -typedef VOID* ADDR_HANDLE; - -/// Client handle used in callbacks -typedef VOID* ADDR_CLIENT_HANDLE; - -/** -* ///////////////////////////////////////////////////////////////////////////////////////////////// -* // Callback functions -* ///////////////////////////////////////////////////////////////////////////////////////////////// -* typedef VOID* (ADDR_API* ADDR_ALLOCSYSMEM)( -* const ADDR_ALLOCSYSMEM_INPUT* pInput); -* typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_FREESYSMEM)( -* VOID* pVirtAddr); -* typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_DEBUGPRINT)( -* const ADDR_DEBUGPRINT_INPUT* pInput); -* -* ///////////////////////////////////////////////////////////////////////////////////////////////// -* // Create/Destroy/Config functions -* ///////////////////////////////////////////////////////////////////////////////////////////////// -* AddrCreate() -* AddrDestroy() -* -* ///////////////////////////////////////////////////////////////////////////////////////////////// -* // Surface functions -* ///////////////////////////////////////////////////////////////////////////////////////////////// -* AddrComputeSurfaceInfo() -* AddrComputeSurfaceAddrFromCoord() -* AddrComputeSurfaceCoordFromAddr() -* -* ///////////////////////////////////////////////////////////////////////////////////////////////// -* // HTile functions -* ///////////////////////////////////////////////////////////////////////////////////////////////// -* AddrComputeHtileInfo() -* AddrComputeHtileAddrFromCoord() -* AddrComputeHtileCoordFromAddr() -* -* ///////////////////////////////////////////////////////////////////////////////////////////////// -* // C-mask functions -* ///////////////////////////////////////////////////////////////////////////////////////////////// -* AddrComputeCmaskInfo() -* AddrComputeCmaskAddrFromCoord() -* AddrComputeCmaskCoordFromAddr() -* -* ///////////////////////////////////////////////////////////////////////////////////////////////// -* // F-mask functions -* ///////////////////////////////////////////////////////////////////////////////////////////////// -* AddrComputeFmaskInfo() -* AddrComputeFmaskAddrFromCoord() -* AddrComputeFmaskCoordFromAddr() -* -* ///////////////////////////////////////////////////////////////////////////////////////////////// -* // Element/Utility functions -* ///////////////////////////////////////////////////////////////////////////////////////////////// -* ElemFlt32ToDepthPixel() -* ElemFlt32ToColorPixel() -* AddrExtractBankPipeSwizzle() -* AddrCombineBankPipeSwizzle() -* AddrComputeSliceSwizzle() -* AddrConvertTileInfoToHW() -* AddrConvertTileIndex() -* AddrConvertTileIndex1() -* AddrGetTileIndex() -* AddrComputeBaseSwizzle() -* AddrUseTileIndex() -* AddrUseCombinedSwizzle() -* -* ///////////////////////////////////////////////////////////////////////////////////////////////// -* // Dump functions -* ///////////////////////////////////////////////////////////////////////////////////////////////// -* AddrDumpSurfaceInfo() -* AddrDumpFmaskInfo() -* AddrDumpCmaskInfo() -* AddrDumpHtileInfo() -* -**/ - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// Callback functions -/////////////////////////////////////////////////////////////////////////////////////////////////// - -/** -*************************************************************************************************** -* @brief Alloc system memory flags. -* @note These flags are reserved for future use and if flags are added will minimize the impact -* of the client. -*************************************************************************************************** -*/ -typedef union _ADDR_ALLOCSYSMEM_FLAGS -{ - struct - { - UINT_32 reserved : 32; ///< Reserved for future use. - } fields; - UINT_32 value; - -} ADDR_ALLOCSYSMEM_FLAGS; - -/** -*************************************************************************************************** -* @brief Alloc system memory input structure -*************************************************************************************************** -*/ -typedef struct _ADDR_ALLOCSYSMEM_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - ADDR_ALLOCSYSMEM_FLAGS flags; ///< System memory flags. - UINT_32 sizeInBytes; ///< System memory allocation size in bytes. - ADDR_CLIENT_HANDLE hClient; ///< Client handle -} ADDR_ALLOCSYSMEM_INPUT; - -/** -*************************************************************************************************** -* ADDR_ALLOCSYSMEM -* @brief -* Allocate system memory callback function. Returns valid pointer on success. -*************************************************************************************************** -*/ -typedef VOID* (ADDR_API* ADDR_ALLOCSYSMEM)( - const ADDR_ALLOCSYSMEM_INPUT* pInput); - -/** -*************************************************************************************************** -* @brief Free system memory input structure -*************************************************************************************************** -*/ -typedef struct _ADDR_FREESYSMEM_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - VOID* pVirtAddr; ///< Virtual address - ADDR_CLIENT_HANDLE hClient; ///< Client handle -} ADDR_FREESYSMEM_INPUT; - -/** -*************************************************************************************************** -* ADDR_FREESYSMEM -* @brief -* Free system memory callback function. -* Returns ADDR_OK on success. -*************************************************************************************************** -*/ -typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_FREESYSMEM)( - const ADDR_FREESYSMEM_INPUT* pInput); - -/** -*************************************************************************************************** -* @brief Print debug message input structure -*************************************************************************************************** -*/ -typedef struct _ADDR_DEBUGPRINT_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - CHAR* pDebugString; ///< Debug print string - va_list ap; ///< Variable argument list - ADDR_CLIENT_HANDLE hClient; ///< Client handle -} ADDR_DEBUGPRINT_INPUT; - -/** -*************************************************************************************************** -* ADDR_DEBUGPRINT -* @brief -* Print debug message callback function. -* Returns ADDR_OK on success. -*************************************************************************************************** -*/ -typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_DEBUGPRINT)( - const ADDR_DEBUGPRINT_INPUT* pInput); - -/** -*************************************************************************************************** -* ADDR_CALLBACKS -* -* @brief -* Address Library needs client to provide system memory alloc/free routines. -*************************************************************************************************** -*/ -typedef struct _ADDR_CALLBACKS -{ - ADDR_ALLOCSYSMEM allocSysMem; ///< Routine to allocate system memory - ADDR_FREESYSMEM freeSysMem; ///< Routine to free system memory - ADDR_DEBUGPRINT debugPrint; ///< Routine to print debug message -} ADDR_CALLBACKS; - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// Create/Destroy functions -/////////////////////////////////////////////////////////////////////////////////////////////////// - -/** -*************************************************************************************************** -* ADDR_CREATE_FLAGS -* -* @brief -* This structure is used to pass some setup in creation of AddrLib -* @note -*************************************************************************************************** -*/ -typedef union _ADDR_CREATE_FLAGS -{ - struct - { - UINT_32 noCubeMipSlicesPad : 1; ///< Turn cubemap faces padding off - UINT_32 fillSizeFields : 1; ///< If clients fill size fields in all input and - /// output structure - UINT_32 useTileIndex : 1; ///< Make tileIndex field in input valid - UINT_32 useCombinedSwizzle : 1; ///< Use combined tile swizzle - UINT_32 checkLast2DLevel : 1; ///< Check the last 2D mip sub level - UINT_32 useHtileSliceAlign : 1; ///< Do htile single slice alignment - UINT_32 degradeBaseLevel : 1; ///< Degrade to 1D modes automatically for base level - UINT_32 allowLargeThickTile : 1; ///< Allow 64*thickness*bytesPerPixel > rowSize - UINT_32 reserved : 24; ///< Reserved bits for future use - }; - - UINT_32 value; -} ADDR_CREATE_FLAGS; - -/** -*************************************************************************************************** -* ADDR_REGISTER_VALUE -* -* @brief -* Data from registers to setup AddrLib global data, used in AddrCreate -*************************************************************************************************** -*/ -typedef struct _ADDR_REGISTER_VALUE -{ - UINT_32 gbAddrConfig; ///< For R8xx, use GB_ADDR_CONFIG register value. - /// For R6xx/R7xx, use GB_TILING_CONFIG. - /// But they can be treated as the same. - /// if this value is 0, use chip to set default value - UINT_32 backendDisables; ///< 1 bit per backend, starting with LSB. 1=disabled,0=enabled. - /// Register value of CC_RB_BACKEND_DISABLE.BACKEND_DISABLE - - /// R800 registers----------------------------------------------- - UINT_32 noOfBanks; ///< Number of h/w ram banks - For r800: MC_ARB_RAMCFG.NOOFBANK - /// No enums for this value in h/w header files - /// 0: 4 - /// 1: 8 - /// 2: 16 - UINT_32 noOfRanks; /// MC_ARB_RAMCFG.NOOFRANK - /// 0: 1 - /// 1: 2 - /// SI (R1000) registers----------------------------------------- - const UINT_32* pTileConfig; ///< Global tile setting tables - UINT_32 noOfEntries; ///< Number of entries in pTileConfig - - ///< CI registers------------------------------------------------- - const UINT_32* pMacroTileConfig; ///< Global macro tile mode table - UINT_32 noOfMacroEntries; ///< Number of entries in pMacroTileConfig - -} ADDR_REGISTER_VALUE; - -/** -*************************************************************************************************** -* ADDR_CREATE_INPUT -* -* @brief -* Parameters use to create an AddrLib Object. Caller must provide all fields. -* -*************************************************************************************************** -*/ -typedef struct _ADDR_CREATE_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_32 chipEngine; ///< Chip Engine - UINT_32 chipFamily; ///< Chip Family - UINT_32 chipRevision; ///< Chip Revision - ADDR_CALLBACKS callbacks; ///< Callbacks for sysmem alloc/free/print - ADDR_CREATE_FLAGS createFlags; ///< Flags to setup AddrLib - ADDR_REGISTER_VALUE regValue; ///< Data from registers to setup AddrLib global data - ADDR_CLIENT_HANDLE hClient; ///< Client handle - UINT_32 minPitchAlignPixels; ///< Minimum pitch alignment in pixels -} ADDR_CREATE_INPUT; - -/** -*************************************************************************************************** -* ADDR_CREATEINFO_OUTPUT -* -* @brief -* Return AddrLib handle to client driver -* -*************************************************************************************************** -*/ -typedef struct _ADDR_CREATE_OUTPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - ADDR_HANDLE hLib; ///< Address lib handle -} ADDR_CREATE_OUTPUT; - -/** -*************************************************************************************************** -* AddrCreate -* -* @brief -* Create AddrLib object, must be called before any interface calls -* -* @return -* ADDR_OK if successful -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrCreate( - const ADDR_CREATE_INPUT* pAddrCreateIn, - ADDR_CREATE_OUTPUT* pAddrCreateOut); - - - -/** -*************************************************************************************************** -* AddrDestroy -* -* @brief -* Destroy AddrLib object, must be called to free internally allocated resources. -* -* @return -* ADDR_OK if successful -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrDestroy( - ADDR_HANDLE hLib); - - - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// Surface functions -/////////////////////////////////////////////////////////////////////////////////////////////////// - -/** -*************************************************************************************************** -* @brief -* Bank/tiling parameters. On function input, these can be set as desired or -* left 0 for AddrLib to calculate/default. On function output, these are the actual -* parameters used. -* @note -* Valid bankWidth/bankHeight value: -* 1,2,4,8. They are factors instead of pixels or bytes. -* -* The bank number remains constant across each row of the -* macro tile as each pipe is selected, so the number of -* tiles in the x direction with the same bank number will -* be bank_width * num_pipes. -*************************************************************************************************** -*/ -typedef struct _ADDR_TILEINFO -{ - /// Any of these parameters can be set to 0 to use the HW default. - UINT_32 banks; ///< Number of banks, numerical value - UINT_32 bankWidth; ///< Number of tiles in the X direction in the same bank - UINT_32 bankHeight; ///< Number of tiles in the Y direction in the same bank - UINT_32 macroAspectRatio; ///< Macro tile aspect ratio. 1-1:1, 2-4:1, 4-16:1, 8-64:1 - UINT_32 tileSplitBytes; ///< Tile split size, in bytes - AddrPipeCfg pipeConfig; ///< Pipe Config = HW enum + 1 -} ADDR_TILEINFO; - -// Create a define to avoid client change. The removal of R800 is because we plan to implement SI -// within 800 HWL - An AddrPipeCfg is added in above data structure -typedef ADDR_TILEINFO ADDR_R800_TILEINFO; - -/** -*************************************************************************************************** -* @brief -* Information needed by quad buffer stereo support -*************************************************************************************************** -*/ -typedef struct _ADDR_QBSTEREOINFO -{ - UINT_32 eyeHeight; ///< Height (in pixel rows) to right eye - UINT_32 rightOffset; ///< Offset (in bytes) to right eye - UINT_32 rightSwizzle; ///< TileSwizzle for right eyes -} ADDR_QBSTEREOINFO; - -/** -*************************************************************************************************** -* ADDR_SURFACE_FLAGS -* -* @brief -* Surface flags -*************************************************************************************************** -*/ -typedef union _ADDR_SURFACE_FLAGS -{ - struct - { - UINT_32 color : 1; ///< Flag indicates this is a color buffer - UINT_32 depth : 1; ///< Flag indicates this is a depth/stencil buffer - UINT_32 stencil : 1; ///< Flag indicates this is a stencil buffer - UINT_32 texture : 1; ///< Flag indicates this is a texture - UINT_32 cube : 1; ///< Flag indicates this is a cubemap - - UINT_32 volume : 1; ///< Flag indicates this is a volume texture - UINT_32 fmask : 1; ///< Flag indicates this is an fmask - UINT_32 cubeAsArray : 1; ///< Flag indicates if treat cubemap as arrays - UINT_32 compressZ : 1; ///< Flag indicates z buffer is compressed - UINT_32 overlay : 1; ///< Flag indicates this is an overlay surface - UINT_32 noStencil : 1; ///< Flag indicates this depth has no separate stencil - UINT_32 display : 1; ///< Flag indicates this should match display controller req. - UINT_32 opt4Space : 1; ///< Flag indicates this surface should be optimized for space - /// i.e. save some memory but may lose performance - UINT_32 prt : 1; ///< Flag for partially resident texture - UINT_32 qbStereo : 1; ///< Quad buffer stereo surface - UINT_32 pow2Pad : 1; ///< SI: Pad to pow2, must set for mipmap (include level0) - UINT_32 interleaved : 1; ///< Special flag for interleaved YUV surface padding - UINT_32 degrade4Space : 1; ///< Degrade base level's tile mode to save memory - UINT_32 tcCompatible : 1; ///< Flag indicates surface needs to be shader readable - UINT_32 dispTileType : 1; ///< NI: force display Tiling for 128 bit shared resoruce - UINT_32 dccCompatible : 1; ///< VI: whether to support dcc fast clear - UINT_32 czDispCompatible: 1; ///< SI+: CZ family (Carrizo) has a HW bug needs special alignment. - ///< This flag indicates we need to follow the alignment with - ///< CZ families or other ASICs under PX configuration + CZ. - UINT_32 reserved :10; ///< Reserved bits - }; - - UINT_32 value; -} ADDR_SURFACE_FLAGS; - -/** -*************************************************************************************************** -* ADDR_COMPUTE_SURFACE_INFO_INPUT -* -* @brief -* Input structure for AddrComputeSurfaceInfo -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_SURFACE_INFO_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - AddrTileMode tileMode; ///< Tile mode - AddrFormat format; ///< If format is set to valid one, bpp/width/height - /// might be overwritten - UINT_32 bpp; ///< Bits per pixel - UINT_32 numSamples; ///< Number of samples - UINT_32 width; ///< Width, in pixels - UINT_32 height; ///< Height, in pixels - UINT_32 numSlices; ///< Number surface slice/depth, - /// Note: - /// For cubemap, driver clients usually set numSlices - /// to 1 in per-face calc. - /// For 7xx and above, we need pad faces as slices. - /// In this case, clients should set numSlices to 6 and - /// this is also can be turned off by createFlags when - /// calling AddrCreate - UINT_32 slice; ///< Slice index - UINT_32 mipLevel; ///< Current mipmap level. - /// Padding/tiling have different rules for level0 and - /// sublevels - ADDR_SURFACE_FLAGS flags; ///< Surface type flags - UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as - /// number of samples for normal AA; Set it to the - /// number of fragments for EQAA - /// r800 and later HWL parameters - // Needed by 2D tiling, for linear and 1D tiling, just keep them 0's - ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Set to 0 to default/calculate - AddrTileType tileType; ///< Micro tiling type, not needed when tileIndex != -1 - INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it - /// while the global useTileIndex is set to 1 - UINT_32 basePitch; ///< Base level pitch in pixels, 0 means ignored, is a - /// must for mip levels from SI+. - /// Don't use pitch in blocks for compressed formats! -} ADDR_COMPUTE_SURFACE_INFO_INPUT; - -/** -*************************************************************************************************** -* ADDR_COMPUTE_SURFACE_INFO_OUTPUT -* -* @brief -* Output structure for AddrComputeSurfInfo -* @note - Element: AddrLib unit for computing. e.g. BCn: 4x4 blocks; R32B32B32: 32bit with 3x pitch - Pixel: Original pixel -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_SURFACE_INFO_OUTPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_32 pitch; ///< Pitch in elements (in blocks for compressed formats) - UINT_32 height; ///< Height in elements (in blocks for compressed formats) - UINT_32 depth; ///< Number of slice/depth - UINT_64 surfSize; ///< Surface size in bytes - AddrTileMode tileMode; ///< Actual tile mode. May differ from that in input - UINT_32 baseAlign; ///< Base address alignment - UINT_32 pitchAlign; ///< Pitch alignment, in elements - UINT_32 heightAlign; ///< Height alignment, in elements - UINT_32 depthAlign; ///< Depth alignment, aligned to thickness, for 3d texture - UINT_32 bpp; ///< Bits per elements (e.g. blocks for BCn, 1/3 for 96bit) - UINT_32 pixelPitch; ///< Pitch in original pixels - UINT_32 pixelHeight; ///< Height in original pixels - UINT_32 pixelBits; ///< Original bits per pixel, passed from input - UINT_64 sliceSize; ///< Size of slice specified by input's slice - /// The result is controlled by surface flags & createFlags - /// By default this value equals to surfSize for volume - UINT_32 pitchTileMax; ///< PITCH_TILE_MAX value for h/w register - UINT_32 heightTileMax; ///< HEIGHT_TILE_MAX value for h/w register - UINT_32 sliceTileMax; ///< SLICE_TILE_MAX value for h/w register - - UINT_32 numSamples; ///< Pass the effective numSamples processed in this call - - /// r800 and later HWL parameters - ADDR_TILEINFO* pTileInfo; ///< Tile parameters used. Filled in if 0 on input - AddrTileType tileType; ///< Micro tiling type, only valid when tileIndex != -1 - INT_32 tileIndex; ///< Tile index, MAY be "downgraded" - - INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) - /// Special information to work around SI mipmap swizzle bug UBTS #317508 - BOOL_32 last2DLevel; ///< TRUE if this is the last 2D(3D) tiled - ///< Only meaningful when create flag checkLast2DLevel is set - /// Stereo info - ADDR_QBSTEREOINFO* pStereoInfo;///< Stereo information, needed when .qbStereo flag is TRUE -} ADDR_COMPUTE_SURFACE_INFO_OUTPUT; - -/** -*************************************************************************************************** -* AddrComputeSurfaceInfo -* -* @brief -* Compute surface width/height/depth/alignments and suitable tiling mode -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceInfo( - ADDR_HANDLE hLib, - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut); - - - -/** -*************************************************************************************************** -* ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT -* -* @brief -* Input structure for AddrComputeSurfaceAddrFromCoord -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_32 x; ///< X coordinate - UINT_32 y; ///< Y coordinate - UINT_32 slice; ///< Slice index - UINT_32 sample; ///< Sample index, use fragment index for EQAA - - UINT_32 bpp; ///< Bits per pixel - UINT_32 pitch; ///< Surface pitch, in pixels - UINT_32 height; ///< Surface height, in pixels - UINT_32 numSlices; ///< Surface depth - UINT_32 numSamples; ///< Number of samples - - AddrTileMode tileMode; ///< Tile mode - BOOL_32 isDepth; ///< TRUE if the surface uses depth sample ordering within - /// micro tile. Textures can also choose depth sample order - UINT_32 tileBase; ///< Base offset (in bits) inside micro tile which handles - /// the case that components are stored separately - UINT_32 compBits; ///< The component bits actually needed(for planar surface) - - UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as - /// number of samples for normal AA; Set it to the - /// number of fragments for EQAA - /// r800 and later HWL parameters - // Used for 1D tiling above - AddrTileType tileType; ///< See defintion of AddrTileType - struct - { - UINT_32 ignoreSE : 1; ///< TRUE if shader engines are ignored. This is texture - /// only flag. Only non-RT texture can set this to TRUE - UINT_32 reserved :31; ///< Reserved for future use. - }; - // 2D tiling needs following structure - ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data - INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it - /// while the global useTileIndex is set to 1 - union - { - struct - { - UINT_32 bankSwizzle; ///< Bank swizzle - UINT_32 pipeSwizzle; ///< Pipe swizzle - }; - UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE - }; - -#if ADDR_AM_BUILD // These two fields are not valid in SW blt since no HTILE access - UINT_32 addr5Swizzle; ///< ADDR5_SWIZZLE_MASK of DB_DEPTH_INFO - BOOL_32 is32ByteTile; ///< Caller must have access to HTILE buffer and know if - /// this tile is compressed to 32B -#endif -} ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT; - -/** -*************************************************************************************************** -* ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT -* -* @brief -* Output structure for AddrComputeSurfaceAddrFromCoord -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_64 addr; ///< Byte address - UINT_32 bitPosition; ///< Bit position within surfaceAddr, 0-7. - /// For surface bpp < 8, e.g. FMT_1. - UINT_32 prtBlockIndex; ///< Index of a PRT tile (64K block) -} ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT; - -/** -*************************************************************************************************** -* AddrComputeSurfaceAddrFromCoord -* -* @brief -* Compute surface address from a given coordinate. -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceAddrFromCoord( - ADDR_HANDLE hLib, - const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, - ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut); - - - -/** -*************************************************************************************************** -* ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT -* -* @brief -* Input structure for AddrComputeSurfaceCoordFromAddr -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_64 addr; ///< Address in bytes - UINT_32 bitPosition; ///< Bit position in addr. 0-7. for surface bpp < 8, - /// e.g. FMT_1; - UINT_32 bpp; ///< Bits per pixel - UINT_32 pitch; ///< Pitch, in pixels - UINT_32 height; ///< Height in pixels - UINT_32 numSlices; ///< Surface depth - UINT_32 numSamples; ///< Number of samples - - AddrTileMode tileMode; ///< Tile mode - BOOL_32 isDepth; ///< Surface uses depth sample ordering within micro tile. - /// Note: Textures can choose depth sample order as well. - UINT_32 tileBase; ///< Base offset (in bits) inside micro tile which handles - /// the case that components are stored separately - UINT_32 compBits; ///< The component bits actually needed(for planar surface) - - UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as - /// number of samples for normal AA; Set it to the - /// number of fragments for EQAA - /// r800 and later HWL parameters - // Used for 1D tiling above - AddrTileType tileType; ///< See defintion of AddrTileType - struct - { - UINT_32 ignoreSE : 1; ///< TRUE if shader engines are ignored. This is texture - /// only flag. Only non-RT texture can set this to TRUE - UINT_32 reserved :31; ///< Reserved for future use. - }; - // 2D tiling needs following structure - ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data - INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it - /// while the global useTileIndex is set to 1 - union - { - struct - { - UINT_32 bankSwizzle; ///< Bank swizzle - UINT_32 pipeSwizzle; ///< Pipe swizzle - }; - UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE - }; -} ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT; - -/** -*************************************************************************************************** -* ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT -* -* @brief -* Output structure for AddrComputeSurfaceCoordFromAddr -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_32 x; ///< X coordinate - UINT_32 y; ///< Y coordinate - UINT_32 slice; ///< Index of slices - UINT_32 sample; ///< Index of samples, means fragment index for EQAA -} ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT; - -/** -*************************************************************************************************** -* AddrComputeSurfaceCoordFromAddr -* -* @brief -* Compute coordinate from a given surface address -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceCoordFromAddr( - ADDR_HANDLE hLib, - const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, - ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut); - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// HTile functions -/////////////////////////////////////////////////////////////////////////////////////////////////// - -/** -*************************************************************************************************** -* ADDR_HTILE_FLAGS -* -* @brief -* HTILE flags -*************************************************************************************************** -*/ -typedef union _ADDR_HTILE_FLAGS -{ - struct - { - UINT_32 tcCompatible : 1; ///< Flag indicates surface needs to be shader readable - UINT_32 reserved :31; ///< Reserved bits - }; - - UINT_32 value; -} ADDR_HTILE_FLAGS; - -/** -*************************************************************************************************** -* ADDR_COMPUTE_HTILE_INFO_INPUT -* -* @brief -* Input structure of AddrComputeHtileInfo -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_HTILE_INFO_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - ADDR_HTILE_FLAGS flags; ///< HTILE flags - UINT_32 pitch; ///< Surface pitch, in pixels - UINT_32 height; ///< Surface height, in pixels - UINT_32 numSlices; ///< Number of slices - BOOL_32 isLinear; ///< Linear or tiled HTILE layout - AddrHtileBlockSize blockWidth; ///< 4 or 8. EG above only support 8 - AddrHtileBlockSize blockHeight; ///< 4 or 8. EG above only support 8 - ADDR_TILEINFO* pTileInfo; ///< Tile info - - INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it - /// while the global useTileIndex is set to 1 - INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) - ///< README: When tileIndex is not -1, this must be valid -} ADDR_COMPUTE_HTILE_INFO_INPUT; - -/** -*************************************************************************************************** -* ADDR_COMPUTE_HTILE_INFO_OUTPUT -* -* @brief -* Output structure of AddrComputeHtileInfo -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_HTILE_INFO_OUTPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_32 pitch; ///< Pitch in pixels of depth buffer represented in this - /// HTile buffer. This might be larger than original depth - /// buffer pitch when called with an unaligned pitch. - UINT_32 height; ///< Height in pixels, as above - UINT_64 htileBytes; ///< Size of HTILE buffer, in bytes - UINT_32 baseAlign; ///< Base alignment - UINT_32 bpp; ///< Bits per pixel for HTILE is how many bits for an 8x8 block! - UINT_32 macroWidth; ///< Macro width in pixels, actually squared cache shape - UINT_32 macroHeight; ///< Macro height in pixels - UINT_64 sliceSize; ///< Slice size, in bytes. -} ADDR_COMPUTE_HTILE_INFO_OUTPUT; - -/** -*************************************************************************************************** -* AddrComputeHtileInfo -* -* @brief -* Compute Htile pitch, height, base alignment and size in bytes -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeHtileInfo( - ADDR_HANDLE hLib, - const ADDR_COMPUTE_HTILE_INFO_INPUT* pIn, - ADDR_COMPUTE_HTILE_INFO_OUTPUT* pOut); - - - -/** -*************************************************************************************************** -* ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT -* -* @brief -* Input structure for AddrComputeHtileAddrFromCoord -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_32 pitch; ///< Pitch, in pixels - UINT_32 height; ///< Height in pixels - UINT_32 x; ///< X coordinate - UINT_32 y; ///< Y coordinate - UINT_32 slice; ///< Index of slice - UINT_32 numSlices; ///< Number of slices - BOOL_32 isLinear; ///< Linear or tiled HTILE layout - AddrHtileBlockSize blockWidth; ///< 4 or 8. 1 means 8, 0 means 4. EG above only support 8 - AddrHtileBlockSize blockHeight; ///< 4 or 8. 1 means 8, 0 means 4. EG above only support 8 - ADDR_TILEINFO* pTileInfo; ///< Tile info - - INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it - /// while the global useTileIndex is set to 1 - INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) - ///< README: When tileIndex is not -1, this must be valid -} ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT; - -/** -*************************************************************************************************** -* ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT -* -* @brief -* Output structure for AddrComputeHtileAddrFromCoord -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_64 addr; ///< Address in bytes - UINT_32 bitPosition; ///< Bit position, 0 or 4. CMASK and HTILE shares some lib method. - /// So we keep bitPosition for HTILE as well -} ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT; - -/** -*************************************************************************************************** -* AddrComputeHtileAddrFromCoord -* -* @brief -* Compute Htile address according to coordinates (of depth buffer) -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeHtileAddrFromCoord( - ADDR_HANDLE hLib, - const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, - ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut); - - - -/** -*************************************************************************************************** -* ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT -* -* @brief -* Input structure for AddrComputeHtileCoordFromAddr -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_64 addr; ///< Address - UINT_32 bitPosition; ///< Bit position 0 or 4. CMASK and HTILE share some methods - /// so we keep bitPosition for HTILE as well - UINT_32 pitch; ///< Pitch, in pixels - UINT_32 height; ///< Height, in pixels - UINT_32 numSlices; ///< Number of slices - BOOL_32 isLinear; ///< Linear or tiled HTILE layout - AddrHtileBlockSize blockWidth; ///< 4 or 8. 1 means 8, 0 means 4. R8xx/R9xx only support 8 - AddrHtileBlockSize blockHeight; ///< 4 or 8. 1 means 8, 0 means 4. R8xx/R9xx only support 8 - ADDR_TILEINFO* pTileInfo; ///< Tile info - - INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it - /// while the global useTileIndex is set to 1 - INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) - ///< README: When tileIndex is not -1, this must be valid -} ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT; - -/** -*************************************************************************************************** -* ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT -* -* @brief -* Output structure for AddrComputeHtileCoordFromAddr -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_32 x; ///< X coordinate - UINT_32 y; ///< Y coordinate - UINT_32 slice; ///< Slice index -} ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT; - -/** -*************************************************************************************************** -* AddrComputeHtileCoordFromAddr -* -* @brief -* Compute coordinates within depth buffer (1st pixel of a micro tile) according to -* Htile address -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeHtileCoordFromAddr( - ADDR_HANDLE hLib, - const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, - ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut); - - - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// C-mask functions -/////////////////////////////////////////////////////////////////////////////////////////////////// - -/** -*************************************************************************************************** -* ADDR_CMASK_FLAGS -* -* @brief -* CMASK flags -*************************************************************************************************** -*/ -typedef union _ADDR_CMASK_FLAGS -{ - struct - { - UINT_32 tcCompatible : 1; ///< Flag indicates surface needs to be shader readable - UINT_32 reserved :31; ///< Reserved bits - }; - - UINT_32 value; -} ADDR_CMASK_FLAGS; - -/** -*************************************************************************************************** -* ADDR_COMPUTE_CMASK_INFO_INPUT -* -* @brief -* Input structure of AddrComputeCmaskInfo -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_CMASKINFO_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - ADDR_CMASK_FLAGS flags; ///< CMASK flags - UINT_32 pitch; ///< Pitch, in pixels, of color buffer - UINT_32 height; ///< Height, in pixels, of color buffer - UINT_32 numSlices; ///< Number of slices, of color buffer - BOOL_32 isLinear; ///< Linear or tiled layout, Only SI can be linear - ADDR_TILEINFO* pTileInfo; ///< Tile info - - INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it - /// while the global useTileIndex is set to 1 - INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) - ///< README: When tileIndex is not -1, this must be valid -} ADDR_COMPUTE_CMASK_INFO_INPUT; - -/** -*************************************************************************************************** -* ADDR_COMPUTE_CMASK_INFO_OUTPUT -* -* @brief -* Output structure of AddrComputeCmaskInfo -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_CMASK_INFO_OUTPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_32 pitch; ///< Pitch in pixels of color buffer which - /// this Cmask matches. The size might be larger than - /// original color buffer pitch when called with - /// an unaligned pitch. - UINT_32 height; ///< Height in pixels, as above - UINT_64 cmaskBytes; ///< Size in bytes of CMask buffer - UINT_32 baseAlign; ///< Base alignment - UINT_32 blockMax; ///< Cmask block size. Need this to set CB_COLORn_MASK register - UINT_32 macroWidth; ///< Macro width in pixels, actually squared cache shape - UINT_32 macroHeight; ///< Macro height in pixels - UINT_64 sliceSize; ///< Slice size, in bytes. -} ADDR_COMPUTE_CMASK_INFO_OUTPUT; - -/** -*************************************************************************************************** -* AddrComputeCmaskInfo -* -* @brief -* Compute Cmask pitch, height, base alignment and size in bytes from color buffer -* info -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskInfo( - ADDR_HANDLE hLib, - const ADDR_COMPUTE_CMASK_INFO_INPUT* pIn, - ADDR_COMPUTE_CMASK_INFO_OUTPUT* pOut); - - - -/** -*************************************************************************************************** -* ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT -* -* @brief -* Input structure for AddrComputeCmaskAddrFromCoord -* -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - UINT_32 x; ///< X coordinate - UINT_32 y; ///< Y coordinate - UINT_64 fmaskAddr; ///< Fmask addr for tc compatible Cmask - UINT_32 slice; ///< Slice index - UINT_32 pitch; ///< Pitch in pixels, of color buffer - UINT_32 height; ///< Height in pixels, of color buffer - UINT_32 numSlices; ///< Number of slices - UINT_32 bpp; - BOOL_32 isLinear; ///< Linear or tiled layout, Only SI can be linear - ADDR_CMASK_FLAGS flags; ///< CMASK flags - ADDR_TILEINFO* pTileInfo; ///< Tile info - - INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it - ///< while the global useTileIndex is set to 1 - INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) - ///< README: When tileIndex is not -1, this must be valid -} ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT; - -/** -*************************************************************************************************** -* ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT -* -* @brief -* Output structure for AddrComputeCmaskAddrFromCoord -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_64 addr; ///< CMASK address in bytes - UINT_32 bitPosition; ///< Bit position within addr, 0-7. CMASK is 4 bpp, - /// so the address may be located in bit 0 (0) or 4 (4) -} ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT; - -/** -*************************************************************************************************** -* AddrComputeCmaskAddrFromCoord -* -* @brief -* Compute Cmask address according to coordinates (of MSAA color buffer) -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskAddrFromCoord( - ADDR_HANDLE hLib, - const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, - ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut); - - - -/** -*************************************************************************************************** -* ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT -* -* @brief -* Input structure for AddrComputeCmaskCoordFromAddr -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_64 addr; ///< CMASK address in bytes - UINT_32 bitPosition; ///< Bit position within addr, 0-7. CMASK is 4 bpp, - /// so the address may be located in bit 0 (0) or 4 (4) - UINT_32 pitch; ///< Pitch, in pixels - UINT_32 height; ///< Height in pixels - UINT_32 numSlices; ///< Number of slices - BOOL_32 isLinear; ///< Linear or tiled layout, Only SI can be linear - ADDR_TILEINFO* pTileInfo; ///< Tile info - - INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it - /// while the global useTileIndex is set to 1 - INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) - ///< README: When tileIndex is not -1, this must be valid -} ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT; - -/** -*************************************************************************************************** -* ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT -* -* @brief -* Output structure for AddrComputeCmaskCoordFromAddr -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_32 x; ///< X coordinate - UINT_32 y; ///< Y coordinate - UINT_32 slice; ///< Slice index -} ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT; - -/** -*************************************************************************************************** -* AddrComputeCmaskCoordFromAddr -* -* @brief -* Compute coordinates within color buffer (1st pixel of a micro tile) according to -* Cmask address -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskCoordFromAddr( - ADDR_HANDLE hLib, - const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn, - ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut); - - - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// F-mask functions -/////////////////////////////////////////////////////////////////////////////////////////////////// - -/** -*************************************************************************************************** -* ADDR_COMPUTE_FMASK_INFO_INPUT -* -* @brief -* Input structure for AddrComputeFmaskInfo -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_FMASK_INFO_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - AddrTileMode tileMode; ///< Tile mode - UINT_32 pitch; ///< Surface pitch, in pixels - UINT_32 height; ///< Surface height, in pixels - UINT_32 numSlices; ///< Number of slice/depth - UINT_32 numSamples; ///< Number of samples - UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as - /// number of samples for normal AA; Set it to the - /// number of fragments for EQAA - /// r800 and later HWL parameters - struct - { - UINT_32 resolved: 1; ///< TRUE if the surface is for resolved fmask, only used - /// by H/W clients. S/W should always set it to FALSE. - UINT_32 reserved: 31; ///< Reserved for future use. - }; - ADDR_TILEINFO* pTileInfo; ///< 2D tiling parameters. Clients must give valid data - INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it - /// while the global useTileIndex is set to 1 -} ADDR_COMPUTE_FMASK_INFO_INPUT; - -/** -*************************************************************************************************** -* ADDR_COMPUTE_FMASK_INFO_OUTPUT -* -* @brief -* Output structure for AddrComputeFmaskInfo -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_FMASK_INFO_OUTPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_32 pitch; ///< Pitch of fmask in pixels - UINT_32 height; ///< Height of fmask in pixels - UINT_32 numSlices; ///< Slices of fmask - UINT_64 fmaskBytes; ///< Size of fmask in bytes - UINT_32 baseAlign; ///< Base address alignment - UINT_32 pitchAlign; ///< Pitch alignment - UINT_32 heightAlign; ///< Height alignment - UINT_32 bpp; ///< Bits per pixel of FMASK is: number of bit planes - UINT_32 numSamples; ///< Number of samples, used for dump, export this since input - /// may be changed in 9xx and above - /// r800 and later HWL parameters - ADDR_TILEINFO* pTileInfo; ///< Tile parameters used. Fmask can have different - /// bank_height from color buffer - INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it - /// while the global useTileIndex is set to 1 - INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) - UINT_64 sliceSize; ///< Size of slice in bytes -} ADDR_COMPUTE_FMASK_INFO_OUTPUT; - -/** -*************************************************************************************************** -* AddrComputeFmaskInfo -* -* @brief -* Compute Fmask pitch/height/depth/alignments and size in bytes -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskInfo( - ADDR_HANDLE hLib, - const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, - ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut); - - - -/** -*************************************************************************************************** -* ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT -* -* @brief -* Input structure for AddrComputeFmaskAddrFromCoord -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_32 x; ///< X coordinate - UINT_32 y; ///< Y coordinate - UINT_32 slice; ///< Slice index - UINT_32 plane; ///< Plane number - UINT_32 sample; ///< Sample index (fragment index for EQAA) - - UINT_32 pitch; ///< Surface pitch, in pixels - UINT_32 height; ///< Surface height, in pixels - UINT_32 numSamples; ///< Number of samples - UINT_32 numFrags; ///< Number of fragments, leave it zero or the same as - /// number of samples for normal AA; Set it to the - /// number of fragments for EQAA - - AddrTileMode tileMode; ///< Tile mode - union - { - struct - { - UINT_32 bankSwizzle; ///< Bank swizzle - UINT_32 pipeSwizzle; ///< Pipe swizzle - }; - UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE - }; - - /// r800 and later HWL parameters - struct - { - UINT_32 resolved: 1; ///< TRUE if this is a resolved fmask, used by H/W clients - UINT_32 ignoreSE: 1; ///< TRUE if shader engines are ignored. - UINT_32 reserved: 30; ///< Reserved for future use. - }; - ADDR_TILEINFO* pTileInfo; ///< 2D tiling parameters. Client must provide all data - -} ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT; - -/** -*************************************************************************************************** -* ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT -* -* @brief -* Output structure for AddrComputeFmaskAddrFromCoord -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_64 addr; ///< Fmask address - UINT_32 bitPosition; ///< Bit position within fmaskAddr, 0-7. -} ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT; - -/** -*************************************************************************************************** -* AddrComputeFmaskAddrFromCoord -* -* @brief -* Compute Fmask address according to coordinates (x,y,slice,sample,plane) -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskAddrFromCoord( - ADDR_HANDLE hLib, - const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, - ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut); - - - -/** -*************************************************************************************************** -* ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT -* -* @brief -* Input structure for AddrComputeFmaskCoordFromAddr -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_64 addr; ///< Address - UINT_32 bitPosition; ///< Bit position within addr, 0-7. - - UINT_32 pitch; ///< Pitch, in pixels - UINT_32 height; ///< Height in pixels - UINT_32 numSamples; ///< Number of samples - UINT_32 numFrags; ///< Number of fragments - AddrTileMode tileMode; ///< Tile mode - union - { - struct - { - UINT_32 bankSwizzle; ///< Bank swizzle - UINT_32 pipeSwizzle; ///< Pipe swizzle - }; - UINT_32 tileSwizzle; ///< Combined swizzle, if useCombinedSwizzle is TRUE - }; - - /// r800 and later HWL parameters - struct - { - UINT_32 resolved: 1; ///< TRUE if this is a resolved fmask, used by HW components - UINT_32 ignoreSE: 1; ///< TRUE if shader engines are ignored. - UINT_32 reserved: 30; ///< Reserved for future use. - }; - ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data - -} ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT; - -/** -*************************************************************************************************** -* ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT -* -* @brief -* Output structure for AddrComputeFmaskCoordFromAddr -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_32 x; ///< X coordinate - UINT_32 y; ///< Y coordinate - UINT_32 slice; ///< Slice index - UINT_32 plane; ///< Plane number - UINT_32 sample; ///< Sample index (fragment index for EQAA) -} ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT; - -/** -*************************************************************************************************** -* AddrComputeFmaskCoordFromAddr -* -* @brief -* Compute FMASK coordinate from an given address -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskCoordFromAddr( - ADDR_HANDLE hLib, - const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, - ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut); - - - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// Element/utility functions -/////////////////////////////////////////////////////////////////////////////////////////////////// - -/** -*************************************************************************************************** -* AddrGetVersion -* -* @brief -* Get AddrLib version number -*************************************************************************************************** -*/ -UINT_32 ADDR_API AddrGetVersion(ADDR_HANDLE hLib); - -/** -*************************************************************************************************** -* AddrUseTileIndex -* -* @brief -* Return TRUE if tileIndex is enabled in this address library -*************************************************************************************************** -*/ -BOOL_32 ADDR_API AddrUseTileIndex(ADDR_HANDLE hLib); - -/** -*************************************************************************************************** -* AddrUseCombinedSwizzle -* -* @brief -* Return TRUE if combined swizzle is enabled in this address library -*************************************************************************************************** -*/ -BOOL_32 ADDR_API AddrUseCombinedSwizzle(ADDR_HANDLE hLib); - -/** -*************************************************************************************************** -* ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT -* -* @brief -* Input structure of AddrExtractBankPipeSwizzle -*************************************************************************************************** -*/ -typedef struct _ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_32 base256b; ///< Base256b value - - /// r800 and later HWL parameters - ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data - - INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it - /// while the global useTileIndex is set to 1 - INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) - ///< README: When tileIndex is not -1, this must be valid -} ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT; - -/** -*************************************************************************************************** -* ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT -* -* @brief -* Output structure of AddrExtractBankPipeSwizzle -*************************************************************************************************** -*/ -typedef struct _ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_32 bankSwizzle; ///< Bank swizzle - UINT_32 pipeSwizzle; ///< Pipe swizzle -} ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT; - -/** -*************************************************************************************************** -* AddrExtractBankPipeSwizzle -* -* @brief -* Extract Bank and Pipe swizzle from base256b -* @return -* ADDR_OK if no error -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrExtractBankPipeSwizzle( - ADDR_HANDLE hLib, - const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, - ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut); - - -/** -*************************************************************************************************** -* ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT -* -* @brief -* Input structure of AddrCombineBankPipeSwizzle -*************************************************************************************************** -*/ -typedef struct _ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_32 bankSwizzle; ///< Bank swizzle - UINT_32 pipeSwizzle; ///< Pipe swizzle - UINT_64 baseAddr; ///< Base address (leave it zero for driver clients) - - /// r800 and later HWL parameters - ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data - - INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it - /// while the global useTileIndex is set to 1 - INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) - ///< README: When tileIndex is not -1, this must be valid -} ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT; - -/** -*************************************************************************************************** -* ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT -* -* @brief -* Output structure of AddrCombineBankPipeSwizzle -*************************************************************************************************** -*/ -typedef struct _ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_32 tileSwizzle; ///< Combined swizzle -} ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT; - -/** -*************************************************************************************************** -* AddrCombineBankPipeSwizzle -* -* @brief -* Combine Bank and Pipe swizzle -* @return -* ADDR_OK if no error -* @note -* baseAddr here is full MCAddress instead of base256b -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrCombineBankPipeSwizzle( - ADDR_HANDLE hLib, - const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT* pIn, - ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT* pOut); - - - -/** -*************************************************************************************************** -* ADDR_COMPUTE_SLICESWIZZLE_INPUT -* -* @brief -* Input structure of AddrComputeSliceSwizzle -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_SLICESWIZZLE_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - AddrTileMode tileMode; ///< Tile Mode - UINT_32 baseSwizzle; ///< Base tile swizzle - UINT_32 slice; ///< Slice index - UINT_64 baseAddr; ///< Base address, driver should leave it 0 in most cases - - /// r800 and later HWL parameters - ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Actually banks needed here! - - INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it - /// while the global useTileIndex is set to 1 - INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) - ///< README: When tileIndex is not -1, this must be valid -} ADDR_COMPUTE_SLICESWIZZLE_INPUT; - - - -/** -*************************************************************************************************** -* ADDR_COMPUTE_SLICESWIZZLE_OUTPUT -* -* @brief -* Output structure of AddrComputeSliceSwizzle -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_SLICESWIZZLE_OUTPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_32 tileSwizzle; ///< Recalculated tileSwizzle value -} ADDR_COMPUTE_SLICESWIZZLE_OUTPUT; - -/** -*************************************************************************************************** -* AddrComputeSliceSwizzle -* -* @brief -* Extract Bank and Pipe swizzle from base256b -* @return -* ADDR_OK if no error -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeSliceSwizzle( - ADDR_HANDLE hLib, - const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, - ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut); - - -/** -*************************************************************************************************** -* AddrSwizzleGenOption -* -* @brief -* Which swizzle generating options: legacy or linear -*************************************************************************************************** -*/ -typedef enum _AddrSwizzleGenOption -{ - ADDR_SWIZZLE_GEN_DEFAULT = 0, ///< As is in client driver implemention for swizzle - ADDR_SWIZZLE_GEN_LINEAR = 1, ///< Using a linear increment of swizzle -} AddrSwizzleGenOption; - -/** -*************************************************************************************************** -* AddrSwizzleOption -* -* @brief -* Controls how swizzle is generated -*************************************************************************************************** -*/ -typedef union _ADDR_SWIZZLE_OPTION -{ - struct - { - UINT_32 genOption : 1; ///< The way swizzle is generated, see AddrSwizzleGenOption - UINT_32 reduceBankBit : 1; ///< TRUE if we need reduce swizzle bits - UINT_32 reserved :30; ///< Reserved bits - }; - - UINT_32 value; - -} ADDR_SWIZZLE_OPTION; - -/** -*************************************************************************************************** -* ADDR_COMPUTE_BASE_SWIZZLE_INPUT -* -* @brief -* Input structure of AddrComputeBaseSwizzle -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_BASE_SWIZZLE_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - ADDR_SWIZZLE_OPTION option; ///< Swizzle option - UINT_32 surfIndex; ///< Index of this surface type - AddrTileMode tileMode; ///< Tile Mode - - /// r800 and later HWL parameters - ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Actually banks needed here! - - INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it - /// while the global useTileIndex is set to 1 - INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) - ///< README: When tileIndex is not -1, this must be valid -} ADDR_COMPUTE_BASE_SWIZZLE_INPUT; - -/** -*************************************************************************************************** -* ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT -* -* @brief -* Output structure of AddrComputeBaseSwizzle -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_32 tileSwizzle; ///< Combined swizzle -} ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT; - -/** -*************************************************************************************************** -* AddrComputeBaseSwizzle -* -* @brief -* Return a Combined Bank and Pipe swizzle base on surface based on surface type/index -* @return -* ADDR_OK if no error -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeBaseSwizzle( - ADDR_HANDLE hLib, - const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, - ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut); - - - -/** -*************************************************************************************************** -* ELEM_GETEXPORTNORM_INPUT -* -* @brief -* Input structure for ElemGetExportNorm -* -*************************************************************************************************** -*/ -typedef struct _ELEM_GETEXPORTNORM_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - AddrColorFormat format; ///< Color buffer format; Client should use ColorFormat - AddrSurfaceNumber num; ///< Surface number type; Client should use NumberType - AddrSurfaceSwap swap; ///< Surface swap byte swap; Client should use SurfaceSwap - UINT_32 numSamples; ///< Number of samples -} ELEM_GETEXPORTNORM_INPUT; - -/** -*************************************************************************************************** -* ElemGetExportNorm -* -* @brief -* Helper function to check one format can be EXPORT_NUM, which is a register -* CB_COLOR_INFO.SURFACE_FORMAT. FP16 can be reported as EXPORT_NORM for rv770 in r600 -* family -* @note -* The implementation is only for r600. -* 00 - EXPORT_FULL: PS exports are 4 pixels with 4 components with 32-bits-per-component. (two -* clocks per export) -* 01 - EXPORT_NORM: PS exports are 4 pixels with 4 components with 16-bits-per-component. (one -* clock per export) -* -*************************************************************************************************** -*/ -BOOL_32 ADDR_API ElemGetExportNorm( - ADDR_HANDLE hLib, - const ELEM_GETEXPORTNORM_INPUT* pIn); - - - -/** -*************************************************************************************************** -* ELEM_FLT32TODEPTHPIXEL_INPUT -* -* @brief -* Input structure for addrFlt32ToDepthPixel -* -*************************************************************************************************** -*/ -typedef struct _ELEM_FLT32TODEPTHPIXEL_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - AddrDepthFormat format; ///< Depth buffer format - ADDR_FLT_32 comps[2]; ///< Component values (Z/stencil) -} ELEM_FLT32TODEPTHPIXEL_INPUT; - -/** -*************************************************************************************************** -* ELEM_FLT32TODEPTHPIXEL_INPUT -* -* @brief -* Output structure for ElemFlt32ToDepthPixel -* -*************************************************************************************************** -*/ -typedef struct _ELEM_FLT32TODEPTHPIXEL_OUTPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_8* pPixel; ///< Real depth value. Same data type as depth buffer. - /// Client must provide enough storage for this type. - UINT_32 depthBase; ///< Tile base in bits for depth bits - UINT_32 stencilBase; ///< Tile base in bits for stencil bits - UINT_32 depthBits; ///< Bits for depth - UINT_32 stencilBits; ///< Bits for stencil -} ELEM_FLT32TODEPTHPIXEL_OUTPUT; - -/** -*************************************************************************************************** -* ElemFlt32ToDepthPixel -* -* @brief -* Convert a FLT_32 value to a depth/stencil pixel value -* -* @return -* Return code -* -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API ElemFlt32ToDepthPixel( - ADDR_HANDLE hLib, - const ELEM_FLT32TODEPTHPIXEL_INPUT* pIn, - ELEM_FLT32TODEPTHPIXEL_OUTPUT* pOut); - - - -/** -*************************************************************************************************** -* ELEM_FLT32TOCOLORPIXEL_INPUT -* -* @brief -* Input structure for addrFlt32ToColorPixel -* -*************************************************************************************************** -*/ -typedef struct _ELEM_FLT32TOCOLORPIXEL_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - AddrColorFormat format; ///< Color buffer format - AddrSurfaceNumber surfNum; ///< Surface number - AddrSurfaceSwap surfSwap; ///< Surface swap - ADDR_FLT_32 comps[4]; ///< Component values (r/g/b/a) -} ELEM_FLT32TOCOLORPIXEL_INPUT; - -/** -*************************************************************************************************** -* ELEM_FLT32TOCOLORPIXEL_INPUT -* -* @brief -* Output structure for ElemFlt32ToColorPixel -* -*************************************************************************************************** -*/ -typedef struct _ELEM_FLT32TOCOLORPIXEL_OUTPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - UINT_8* pPixel; ///< Real color value. Same data type as color buffer. - /// Client must provide enough storage for this type. -} ELEM_FLT32TOCOLORPIXEL_OUTPUT; - -/** -*************************************************************************************************** -* ElemFlt32ToColorPixel -* -* @brief -* Convert a FLT_32 value to a red/green/blue/alpha pixel value -* -* @return -* Return code -* -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API ElemFlt32ToColorPixel( - ADDR_HANDLE hLib, - const ELEM_FLT32TOCOLORPIXEL_INPUT* pIn, - ELEM_FLT32TOCOLORPIXEL_OUTPUT* pOut); - - -/** -*************************************************************************************************** -* ADDR_CONVERT_TILEINFOTOHW_INPUT -* -* @brief -* Input structure for AddrConvertTileInfoToHW -* @note -* When reverse is TRUE, indices are igonred -*************************************************************************************************** -*/ -typedef struct _ADDR_CONVERT_TILEINFOTOHW_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - BOOL_32 reverse; ///< Convert control flag. - /// FALSE: convert from real value to HW value; - /// TRUE: convert from HW value to real value. - - /// r800 and later HWL parameters - ADDR_TILEINFO* pTileInfo; ///< Tile parameters with real value - - INT_32 tileIndex; ///< Tile index, MUST be -1 if you don't want to use it - /// while the global useTileIndex is set to 1 - INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) - ///< README: When tileIndex is not -1, this must be valid -} ADDR_CONVERT_TILEINFOTOHW_INPUT; - -/** -*************************************************************************************************** -* ADDR_CONVERT_TILEINFOTOHW_OUTPUT -* -* @brief -* Output structure for AddrConvertTileInfoToHW -*************************************************************************************************** -*/ -typedef struct _ADDR_CONVERT_TILEINFOTOHW_OUTPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - /// r800 and later HWL parameters - ADDR_TILEINFO* pTileInfo; ///< Tile parameters with hardware register value - -} ADDR_CONVERT_TILEINFOTOHW_OUTPUT; - -/** -*************************************************************************************************** -* AddrConvertTileInfoToHW -* -* @brief -* Convert tile info from real value to hardware register value -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrConvertTileInfoToHW( - ADDR_HANDLE hLib, - const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, - ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut); - - - -/** -*************************************************************************************************** -* ADDR_CONVERT_TILEINDEX_INPUT -* -* @brief -* Input structure for AddrConvertTileIndex -*************************************************************************************************** -*/ -typedef struct _ADDR_CONVERT_TILEINDEX_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - INT_32 tileIndex; ///< Tile index - INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) - BOOL_32 tileInfoHw; ///< Set to TRUE if client wants HW enum, otherwise actual -} ADDR_CONVERT_TILEINDEX_INPUT; - -/** -*************************************************************************************************** -* ADDR_CONVERT_TILEINDEX_OUTPUT -* -* @brief -* Output structure for AddrConvertTileIndex -*************************************************************************************************** -*/ -typedef struct _ADDR_CONVERT_TILEINDEX_OUTPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - AddrTileMode tileMode; ///< Tile mode - AddrTileType tileType; ///< Tile type - ADDR_TILEINFO* pTileInfo; ///< Tile info - -} ADDR_CONVERT_TILEINDEX_OUTPUT; - -/** -*************************************************************************************************** -* AddrConvertTileIndex -* -* @brief -* Convert tile index to tile mode/type/info -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex( - ADDR_HANDLE hLib, - const ADDR_CONVERT_TILEINDEX_INPUT* pIn, - ADDR_CONVERT_TILEINDEX_OUTPUT* pOut); - - - -/** -*************************************************************************************************** -* ADDR_CONVERT_TILEINDEX1_INPUT -* -* @brief -* Input structure for AddrConvertTileIndex1 (without macro mode index) -*************************************************************************************************** -*/ -typedef struct _ADDR_CONVERT_TILEINDEX1_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - INT_32 tileIndex; ///< Tile index - UINT_32 bpp; ///< Bits per pixel - UINT_32 numSamples; ///< Number of samples - BOOL_32 tileInfoHw; ///< Set to TRUE if client wants HW enum, otherwise actual -} ADDR_CONVERT_TILEINDEX1_INPUT; - -/** -*************************************************************************************************** -* AddrConvertTileIndex1 -* -* @brief -* Convert tile index to tile mode/type/info -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex1( - ADDR_HANDLE hLib, - const ADDR_CONVERT_TILEINDEX1_INPUT* pIn, - ADDR_CONVERT_TILEINDEX_OUTPUT* pOut); - - - -/** -*************************************************************************************************** -* ADDR_GET_TILEINDEX_INPUT -* -* @brief -* Input structure for AddrGetTileIndex -*************************************************************************************************** -*/ -typedef struct _ADDR_GET_TILEINDEX_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - AddrTileMode tileMode; ///< Tile mode - AddrTileType tileType; ///< Tile-type: disp/non-disp/... - ADDR_TILEINFO* pTileInfo; ///< Pointer to tile-info structure, can be NULL for linear/1D -} ADDR_GET_TILEINDEX_INPUT; - -/** -*************************************************************************************************** -* ADDR_GET_TILEINDEX_OUTPUT -* -* @brief -* Output structure for AddrGetTileIndex -*************************************************************************************************** -*/ -typedef struct _ADDR_GET_TILEINDEX_OUTPUT -{ - UINT_32 size; ///< Size of this structure in bytes - - INT_32 index; ///< index in table -} ADDR_GET_TILEINDEX_OUTPUT; - -/** -*************************************************************************************************** -* AddrGetTileIndex -* -* @brief -* Get the tiling mode index in table -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrGetTileIndex( - ADDR_HANDLE hLib, - const ADDR_GET_TILEINDEX_INPUT* pIn, - ADDR_GET_TILEINDEX_OUTPUT* pOut); - - - - -/** -*************************************************************************************************** -* ADDR_PRT_INFO_INPUT -* -* @brief -* Input structure for AddrComputePrtInfo -*************************************************************************************************** -*/ -typedef struct _ADDR_PRT_INFO_INPUT -{ - AddrFormat format; ///< Surface format - UINT_32 baseMipWidth; ///< Base mipmap width - UINT_32 baseMipHeight; ///< Base mipmap height - UINT_32 baseMipDepth; ///< Base mipmap depth - UINT_32 numFrags; ///< Number of fragments, -} ADDR_PRT_INFO_INPUT; - -/** -*************************************************************************************************** -* ADDR_PRT_INFO_OUTPUT -* -* @brief -* Input structure for AddrComputePrtInfo -*************************************************************************************************** -*/ -typedef struct _ADDR_PRT_INFO_OUTPUT -{ - UINT_32 prtTileWidth; - UINT_32 prtTileHeight; -} ADDR_PRT_INFO_OUTPUT; - -/** -*************************************************************************************************** -* AddrComputePrtInfo -* -* @brief -* Compute prt surface related information -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputePrtInfo( - ADDR_HANDLE hLib, - const ADDR_PRT_INFO_INPUT* pIn, - ADDR_PRT_INFO_OUTPUT* pOut); - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// DCC key functions -/////////////////////////////////////////////////////////////////////////////////////////////////// - -/** -*************************************************************************************************** -* _ADDR_COMPUTE_DCCINFO_INPUT -* -* @brief -* Input structure of AddrComputeDccInfo -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_DCCINFO_INPUT -{ - UINT_32 size; ///< Size of this structure in bytes - UINT_32 bpp; ///< BitPP of color surface - UINT_32 numSamples; ///< Sample number of color surface - UINT_64 colorSurfSize; ///< Size of color surface to which dcc key is bound - AddrTileMode tileMode; ///< Tile mode of color surface - ADDR_TILEINFO tileInfo; ///< Tile info of color surface - UINT_32 tileSwizzle; ///< Tile swizzle - INT_32 tileIndex; ///< Tile index of color surface, - ///< MUST be -1 if you don't want to use it - ///< while the global useTileIndex is set to 1 - INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) - ///< README: When tileIndex is not -1, this must be valid -} ADDR_COMPUTE_DCCINFO_INPUT; - -/** -*************************************************************************************************** -* ADDR_COMPUTE_DCCINFO_OUTPUT -* -* @brief -* Output structure of AddrComputeDccInfo -*************************************************************************************************** -*/ -typedef struct _ADDR_COMPUTE_DCCINFO_OUTPUT -{ - UINT_32 size; ///< Size of this structure in bytes - UINT_64 dccRamBaseAlign; ///< Base alignment of dcc key - UINT_64 dccRamSize; ///< Size of dcc key - UINT_64 dccFastClearSize; ///< Size of dcc key portion that can be fast cleared - BOOL_32 subLvlCompressible; ///< whether sub resource is compressiable -} ADDR_COMPUTE_DCCINFO_OUTPUT; - -/** -*************************************************************************************************** -* AddrComputeDccInfo -* -* @brief -* Compute DCC key size, base alignment -* info -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE ADDR_API AddrComputeDccInfo( - ADDR_HANDLE hLib, - const ADDR_COMPUTE_DCCINFO_INPUT* pIn, - ADDR_COMPUTE_DCCINFO_OUTPUT* pOut); - -#if defined(__cplusplus) -} -#endif - -#endif // __ADDR_INTERFACE_H__ - - diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/addrtypes.h mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/addrtypes.h --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/addrtypes.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/addrtypes.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,590 +0,0 @@ -/* - * Copyright © 2014 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ - -/** -*************************************************************************************************** -* @file addrtypes.h -* @brief Contains the helper function and constants -*************************************************************************************************** -*/ -#ifndef __ADDR_TYPES_H__ -#define __ADDR_TYPES_H__ - -#if defined(__APPLE__) || defined(TCORE_BUILD) -// External definitions header maintained by Mac driver team (and TCORE team) -// Helps address compilation issues & reduces code covered by NDA -#include "addrExtDef.h" - -#else - -// Windows and/or Linux -#if !defined(VOID) -typedef void VOID; -#endif - -#if !defined(FLOAT) -typedef float FLOAT; -#endif - -#if !defined(CHAR) -typedef char CHAR; -#endif - -#if !defined(INT) -typedef int INT; -#endif - -#include // va_list...etc need this header - -#endif // defined (__APPLE__) - -/** -*************************************************************************************************** -* Calling conventions -*************************************************************************************************** -*/ -#ifndef ADDR_CDECL - #if defined(__GNUC__) - #define ADDR_CDECL __attribute__((cdecl)) - #else - #define ADDR_CDECL __cdecl - #endif -#endif - -#ifndef ADDR_STDCALL - #if defined(__GNUC__) - #if defined(__AMD64__) - #define ADDR_STDCALL - #else - #define ADDR_STDCALL __attribute__((stdcall)) - #endif - #else - #define ADDR_STDCALL __stdcall - #endif -#endif - -#ifndef ADDR_FASTCALL - #if defined(__GNUC__) - #define ADDR_FASTCALL __attribute__((regparm(0))) - #else - #define ADDR_FASTCALL __fastcall - #endif -#endif - -#ifndef GC_CDECL - #define GC_CDECL ADDR_CDECL -#endif - -#ifndef GC_STDCALL - #define GC_STDCALL ADDR_STDCALL -#endif - -#ifndef GC_FASTCALL - #define GC_FASTCALL ADDR_FASTCALL -#endif - - -#if defined(__GNUC__) - #define ADDR_INLINE static inline // inline needs to be static to link -#else - // win32, win64, other platforms - #define ADDR_INLINE __inline -#endif // #if defined(__GNUC__) - -#define ADDR_API ADDR_FASTCALL //default call convention is fast call - -/** -*************************************************************************************************** -* Global defines used by other modules -*************************************************************************************************** -*/ -#if !defined(TILEINDEX_INVALID) -#define TILEINDEX_INVALID -1 -#endif - -#if !defined(TILEINDEX_LINEAR_GENERAL) -#define TILEINDEX_LINEAR_GENERAL -2 -#endif - -#if !defined(TILEINDEX_LINEAR_ALIGNED) -#define TILEINDEX_LINEAR_ALIGNED 8 -#endif - -/** -*************************************************************************************************** -* Return codes -*************************************************************************************************** -*/ -typedef enum _ADDR_E_RETURNCODE -{ - // General Return - ADDR_OK = 0, - ADDR_ERROR = 1, - - // Specific Errors - ADDR_OUTOFMEMORY, - ADDR_INVALIDPARAMS, - ADDR_NOTSUPPORTED, - ADDR_NOTIMPLEMENTED, - ADDR_PARAMSIZEMISMATCH, - ADDR_INVALIDGBREGVALUES, - -} ADDR_E_RETURNCODE; - -/** -*************************************************************************************************** -* @brief -* Neutral enums that define tile modes for all H/W -* @note -* R600/R800 tiling mode can be cast to hw enums directly but never cast into HW enum from -* ADDR_TM_2D_TILED_XTHICK -* -*************************************************************************************************** -*/ -typedef enum _AddrTileMode -{ - ADDR_TM_LINEAR_GENERAL = 0, ///< Least restrictions, pitch: multiple of 8 if not buffer - ADDR_TM_LINEAR_ALIGNED = 1, ///< Requests pitch or slice to be multiple of 64 pixels - ADDR_TM_1D_TILED_THIN1 = 2, ///< Linear array of 8x8 tiles - ADDR_TM_1D_TILED_THICK = 3, ///< Linear array of 8x8x4 tiles - ADDR_TM_2D_TILED_THIN1 = 4, ///< A set of macro tiles consist of 8x8 tiles - ADDR_TM_2D_TILED_THIN2 = 5, ///< 600 HWL only, macro tile ratio is 1:4 - ADDR_TM_2D_TILED_THIN4 = 6, ///< 600 HWL only, macro tile ratio is 1:16 - ADDR_TM_2D_TILED_THICK = 7, ///< A set of macro tiles consist of 8x8x4 tiles - ADDR_TM_2B_TILED_THIN1 = 8, ///< 600 HWL only, with bank swap - ADDR_TM_2B_TILED_THIN2 = 9, ///< 600 HWL only, with bank swap and ratio is 1:4 - ADDR_TM_2B_TILED_THIN4 = 10, ///< 600 HWL only, with bank swap and ratio is 1:16 - ADDR_TM_2B_TILED_THICK = 11, ///< 600 HWL only, with bank swap, consists of 8x8x4 tiles - ADDR_TM_3D_TILED_THIN1 = 12, ///< Macro tiling w/ pipe rotation between slices - ADDR_TM_3D_TILED_THICK = 13, ///< Macro tiling w/ pipe rotation bwtween slices, thick - ADDR_TM_3B_TILED_THIN1 = 14, ///< 600 HWL only, with bank swap - ADDR_TM_3B_TILED_THICK = 15, ///< 600 HWL only, with bank swap, thick - ADDR_TM_2D_TILED_XTHICK = 16, ///< Tile is 8x8x8, valid from NI - ADDR_TM_3D_TILED_XTHICK = 17, ///< Tile is 8x8x8, valid from NI - ADDR_TM_POWER_SAVE = 18, ///< Power save mode, only used by KMD on NI - ADDR_TM_PRT_TILED_THIN1 = 19, ///< No bank/pipe rotation or hashing beyond macrotile size - ADDR_TM_PRT_2D_TILED_THIN1 = 20, ///< Same as 2D_TILED_THIN1, PRT only - ADDR_TM_PRT_3D_TILED_THIN1 = 21, ///< Same as 3D_TILED_THIN1, PRT only - ADDR_TM_PRT_TILED_THICK = 22, ///< No bank/pipe rotation or hashing beyond macrotile size - ADDR_TM_PRT_2D_TILED_THICK = 23, ///< Same as 2D_TILED_THICK, PRT only - ADDR_TM_PRT_3D_TILED_THICK = 24, ///< Same as 3D_TILED_THICK, PRT only - ADDR_TM_COUNT = 25, ///< Must be the value of the last tile mode -} AddrTileMode; - -/** -*************************************************************************************************** -* AddrFormat -* -* @brief -* Neutral enum for SurfaceFormat -* -*************************************************************************************************** -*/ -typedef enum _AddrFormat { - ADDR_FMT_INVALID = 0x00000000, - ADDR_FMT_8 = 0x00000001, - ADDR_FMT_4_4 = 0x00000002, - ADDR_FMT_3_3_2 = 0x00000003, - ADDR_FMT_RESERVED_4 = 0x00000004, - ADDR_FMT_16 = 0x00000005, - ADDR_FMT_16_FLOAT = 0x00000006, - ADDR_FMT_8_8 = 0x00000007, - ADDR_FMT_5_6_5 = 0x00000008, - ADDR_FMT_6_5_5 = 0x00000009, - ADDR_FMT_1_5_5_5 = 0x0000000a, - ADDR_FMT_4_4_4_4 = 0x0000000b, - ADDR_FMT_5_5_5_1 = 0x0000000c, - ADDR_FMT_32 = 0x0000000d, - ADDR_FMT_32_FLOAT = 0x0000000e, - ADDR_FMT_16_16 = 0x0000000f, - ADDR_FMT_16_16_FLOAT = 0x00000010, - ADDR_FMT_8_24 = 0x00000011, - ADDR_FMT_8_24_FLOAT = 0x00000012, - ADDR_FMT_24_8 = 0x00000013, - ADDR_FMT_24_8_FLOAT = 0x00000014, - ADDR_FMT_10_11_11 = 0x00000015, - ADDR_FMT_10_11_11_FLOAT = 0x00000016, - ADDR_FMT_11_11_10 = 0x00000017, - ADDR_FMT_11_11_10_FLOAT = 0x00000018, - ADDR_FMT_2_10_10_10 = 0x00000019, - ADDR_FMT_8_8_8_8 = 0x0000001a, - ADDR_FMT_10_10_10_2 = 0x0000001b, - ADDR_FMT_X24_8_32_FLOAT = 0x0000001c, - ADDR_FMT_32_32 = 0x0000001d, - ADDR_FMT_32_32_FLOAT = 0x0000001e, - ADDR_FMT_16_16_16_16 = 0x0000001f, - ADDR_FMT_16_16_16_16_FLOAT = 0x00000020, - ADDR_FMT_RESERVED_33 = 0x00000021, - ADDR_FMT_32_32_32_32 = 0x00000022, - ADDR_FMT_32_32_32_32_FLOAT = 0x00000023, - ADDR_FMT_RESERVED_36 = 0x00000024, - ADDR_FMT_1 = 0x00000025, - ADDR_FMT_1_REVERSED = 0x00000026, - ADDR_FMT_GB_GR = 0x00000027, - ADDR_FMT_BG_RG = 0x00000028, - ADDR_FMT_32_AS_8 = 0x00000029, - ADDR_FMT_32_AS_8_8 = 0x0000002a, - ADDR_FMT_5_9_9_9_SHAREDEXP = 0x0000002b, - ADDR_FMT_8_8_8 = 0x0000002c, - ADDR_FMT_16_16_16 = 0x0000002d, - ADDR_FMT_16_16_16_FLOAT = 0x0000002e, - ADDR_FMT_32_32_32 = 0x0000002f, - ADDR_FMT_32_32_32_FLOAT = 0x00000030, - ADDR_FMT_BC1 = 0x00000031, - ADDR_FMT_BC2 = 0x00000032, - ADDR_FMT_BC3 = 0x00000033, - ADDR_FMT_BC4 = 0x00000034, - ADDR_FMT_BC5 = 0x00000035, - ADDR_FMT_BC6 = 0x00000036, - ADDR_FMT_BC7 = 0x00000037, - ADDR_FMT_32_AS_32_32_32_32 = 0x00000038, - ADDR_FMT_APC3 = 0x00000039, - ADDR_FMT_APC4 = 0x0000003a, - ADDR_FMT_APC5 = 0x0000003b, - ADDR_FMT_APC6 = 0x0000003c, - ADDR_FMT_APC7 = 0x0000003d, - ADDR_FMT_CTX1 = 0x0000003e, - ADDR_FMT_RESERVED_63 = 0x0000003f, -} AddrFormat; - -/** -*************************************************************************************************** -* AddrDepthFormat -* -* @brief -* Neutral enum for addrFlt32ToDepthPixel -* -*************************************************************************************************** -*/ -typedef enum _AddrDepthFormat -{ - ADDR_DEPTH_INVALID = 0x00000000, - ADDR_DEPTH_16 = 0x00000001, - ADDR_DEPTH_X8_24 = 0x00000002, - ADDR_DEPTH_8_24 = 0x00000003, - ADDR_DEPTH_X8_24_FLOAT = 0x00000004, - ADDR_DEPTH_8_24_FLOAT = 0x00000005, - ADDR_DEPTH_32_FLOAT = 0x00000006, - ADDR_DEPTH_X24_8_32_FLOAT = 0x00000007, - -} AddrDepthFormat; - -/** -*************************************************************************************************** -* AddrColorFormat -* -* @brief -* Neutral enum for ColorFormat -* -*************************************************************************************************** -*/ -typedef enum _AddrColorFormat -{ - ADDR_COLOR_INVALID = 0x00000000, - ADDR_COLOR_8 = 0x00000001, - ADDR_COLOR_4_4 = 0x00000002, - ADDR_COLOR_3_3_2 = 0x00000003, - ADDR_COLOR_RESERVED_4 = 0x00000004, - ADDR_COLOR_16 = 0x00000005, - ADDR_COLOR_16_FLOAT = 0x00000006, - ADDR_COLOR_8_8 = 0x00000007, - ADDR_COLOR_5_6_5 = 0x00000008, - ADDR_COLOR_6_5_5 = 0x00000009, - ADDR_COLOR_1_5_5_5 = 0x0000000a, - ADDR_COLOR_4_4_4_4 = 0x0000000b, - ADDR_COLOR_5_5_5_1 = 0x0000000c, - ADDR_COLOR_32 = 0x0000000d, - ADDR_COLOR_32_FLOAT = 0x0000000e, - ADDR_COLOR_16_16 = 0x0000000f, - ADDR_COLOR_16_16_FLOAT = 0x00000010, - ADDR_COLOR_8_24 = 0x00000011, - ADDR_COLOR_8_24_FLOAT = 0x00000012, - ADDR_COLOR_24_8 = 0x00000013, - ADDR_COLOR_24_8_FLOAT = 0x00000014, - ADDR_COLOR_10_11_11 = 0x00000015, - ADDR_COLOR_10_11_11_FLOAT = 0x00000016, - ADDR_COLOR_11_11_10 = 0x00000017, - ADDR_COLOR_11_11_10_FLOAT = 0x00000018, - ADDR_COLOR_2_10_10_10 = 0x00000019, - ADDR_COLOR_8_8_8_8 = 0x0000001a, - ADDR_COLOR_10_10_10_2 = 0x0000001b, - ADDR_COLOR_X24_8_32_FLOAT = 0x0000001c, - ADDR_COLOR_32_32 = 0x0000001d, - ADDR_COLOR_32_32_FLOAT = 0x0000001e, - ADDR_COLOR_16_16_16_16 = 0x0000001f, - ADDR_COLOR_16_16_16_16_FLOAT = 0x00000020, - ADDR_COLOR_RESERVED_33 = 0x00000021, - ADDR_COLOR_32_32_32_32 = 0x00000022, - ADDR_COLOR_32_32_32_32_FLOAT = 0x00000023, -} AddrColorFormat; - -/** -*************************************************************************************************** -* AddrSurfaceNumber -* -* @brief -* Neutral enum for SurfaceNumber -* -*************************************************************************************************** -*/ -typedef enum _AddrSurfaceNumber { - ADDR_NUMBER_UNORM = 0x00000000, - ADDR_NUMBER_SNORM = 0x00000001, - ADDR_NUMBER_USCALED = 0x00000002, - ADDR_NUMBER_SSCALED = 0x00000003, - ADDR_NUMBER_UINT = 0x00000004, - ADDR_NUMBER_SINT = 0x00000005, - ADDR_NUMBER_SRGB = 0x00000006, - ADDR_NUMBER_FLOAT = 0x00000007, -} AddrSurfaceNumber; - -/** -*************************************************************************************************** -* AddrSurfaceSwap -* -* @brief -* Neutral enum for SurfaceSwap -* -*************************************************************************************************** -*/ -typedef enum _AddrSurfaceSwap { - ADDR_SWAP_STD = 0x00000000, - ADDR_SWAP_ALT = 0x00000001, - ADDR_SWAP_STD_REV = 0x00000002, - ADDR_SWAP_ALT_REV = 0x00000003, -} AddrSurfaceSwap; - -/** -*************************************************************************************************** -* AddrHtileBlockSize -* -* @brief -* Size of HTILE blocks, valid values are 4 or 8 for now -*************************************************************************************************** -*/ -typedef enum _AddrHtileBlockSize -{ - ADDR_HTILE_BLOCKSIZE_4 = 4, - ADDR_HTILE_BLOCKSIZE_8 = 8, -} AddrHtileBlockSize; - - -/** -*************************************************************************************************** -* AddrPipeCfg -* -* @brief -* The pipe configuration field specifies both the number of pipes and -* how pipes are interleaved on the surface. -* The expression of number of pipes, the shader engine tile size, and packer tile size -* is encoded in a PIPE_CONFIG register field. -* In general the number of pipes usually matches the number of memory channels of the -* hardware configuration. -* For hw configurations w/ non-pow2 memory number of memory channels, it usually matches -* the number of ROP units(? TODO: which registers??) -* The enum value = hw enum + 1 which is to reserve 0 for requesting default. -*************************************************************************************************** -*/ -typedef enum _AddrPipeCfg -{ - ADDR_PIPECFG_INVALID = 0, - ADDR_PIPECFG_P2 = 1, /// 2 pipes, - ADDR_PIPECFG_P4_8x16 = 5, /// 4 pipes, - ADDR_PIPECFG_P4_16x16 = 6, - ADDR_PIPECFG_P4_16x32 = 7, - ADDR_PIPECFG_P4_32x32 = 8, - ADDR_PIPECFG_P8_16x16_8x16 = 9, /// 8 pipes - ADDR_PIPECFG_P8_16x32_8x16 = 10, - ADDR_PIPECFG_P8_32x32_8x16 = 11, - ADDR_PIPECFG_P8_16x32_16x16 = 12, - ADDR_PIPECFG_P8_32x32_16x16 = 13, - ADDR_PIPECFG_P8_32x32_16x32 = 14, - ADDR_PIPECFG_P8_32x64_32x32 = 15, - ADDR_PIPECFG_P16_32x32_8x16 = 17, /// 16 pipes - ADDR_PIPECFG_P16_32x32_16x16 = 18, - ADDR_PIPECFG_MAX = 19, -} AddrPipeCfg; - -/** -*************************************************************************************************** -* AddrTileType -* -* @brief -* Neutral enums that specifies micro tile type (MICRO_TILE_MODE) -*************************************************************************************************** -*/ -typedef enum _AddrTileType -{ - ADDR_DISPLAYABLE = 0, ///< Displayable tiling - ADDR_NON_DISPLAYABLE = 1, ///< Non-displayable tiling, a.k.a thin micro tiling - ADDR_DEPTH_SAMPLE_ORDER = 2, ///< Same as non-displayable plus depth-sample-order - ADDR_ROTATED = 3, ///< Rotated displayable tiling - ADDR_THICK = 4, ///< Thick micro-tiling, only valid for THICK and XTHICK -} AddrTileType; - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// -// Type definitions: short system-independent names for address library types -// -/////////////////////////////////////////////////////////////////////////////////////////////////// - -#if !defined(__APPLE__) - -#ifndef BOOL_32 // no bool type in C -/// @brief Boolean type, since none is defined in C -/// @ingroup type -#define BOOL_32 int -#endif - -#ifndef INT_32 -#define INT_32 int -#endif - -#ifndef UINT_32 -#define UINT_32 unsigned int -#endif - -#ifndef INT_16 -#define INT_16 short -#endif - -#ifndef UINT_16 -#define UINT_16 unsigned short -#endif - -#ifndef INT_8 -#define INT_8 char -#endif - -#ifndef UINT_8 -#define UINT_8 unsigned char -#endif - -#ifndef NULL -#define NULL 0 -#endif - -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef FALSE -#define FALSE 0 -#endif - -// -// 64-bit integer types depend on the compiler -// -#if defined( __GNUC__ ) || defined( __WATCOMC__ ) -#define INT_64 long long -#define UINT_64 unsigned long long - -#elif defined( _WIN32 ) -#define INT_64 __int64 -#define UINT_64 unsigned __int64 - -#else -#error Unsupported compiler and/or operating system for 64-bit integers - -/// @brief 64-bit signed integer type (compiler dependent) -/// @ingroup type -/// -/// The addrlib defines a 64-bit signed integer type for either -/// Gnu/Watcom compilers (which use the first syntax) or for -/// the Windows VCC compiler (which uses the second syntax). -#define INT_64 long long OR __int64 - -/// @brief 64-bit unsigned integer type (compiler dependent) -/// @ingroup type -/// -/// The addrlib defines a 64-bit unsigned integer type for either -/// Gnu/Watcom compilers (which use the first syntax) or for -/// the Windows VCC compiler (which uses the second syntax). -/// -#define UINT_64 unsigned long long OR unsigned __int64 -#endif - -#endif // #if !defined(__APPLE__) - -// ADDR64X is used to print addresses in hex form on both Windows and Linux -// -#if defined( __GNUC__ ) || defined( __WATCOMC__ ) -#define ADDR64X "llx" -#define ADDR64D "lld" - -#elif defined( _WIN32 ) -#define ADDR64X "I64x" -#define ADDR64D "I64d" - -#else -#error Unsupported compiler and/or operating system for 64-bit integers - -/// @brief Addrlib device address 64-bit printf tag (compiler dependent) -/// @ingroup type -/// -/// This allows printf to display an ADDR_64 for either the Windows VCC compiler -/// (which used this value) or the Gnu/Watcom compilers (which use "llx". -/// An example of use is printf("addr 0x%"ADDR64X"\n", address); -/// -#define ADDR64X "llx" OR "I64x" -#define ADDR64D "lld" OR "I64d" -#endif - - -/// @brief Union for storing a 32-bit float or 32-bit integer -/// @ingroup type -/// -/// This union provides a simple way to convert between a 32-bit float -/// and a 32-bit integer. It also prevents the compiler from producing -/// code that alters NaN values when assiging or coying floats. -/// Therefore, all address library routines that pass or return 32-bit -/// floating point data do so by passing or returning a FLT_32. -/// -typedef union { - INT_32 i; - UINT_32 u; - float f; -} ADDR_FLT_32; - - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// -// Macros for controlling linking and building on multiple systems -// -/////////////////////////////////////////////////////////////////////////////////////////////////// -#if defined(_MSC_VER) -#if defined(va_copy) -#undef va_copy //redefine va_copy to support VC2013 -#endif -#endif - -#if !defined(va_copy) -#define va_copy(dst, src) \ - ((void) memcpy(&(dst), &(src), sizeof(va_list))) -#endif - -#endif // __ADDR_TYPES_H__ - diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/core/addrcommon.h mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/core/addrcommon.h --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/core/addrcommon.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/core/addrcommon.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,558 +0,0 @@ -/* - * Copyright © 2014 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ - -/** -*************************************************************************************************** -* @file addrcommon.h -* @brief Contains the helper function and constants -*************************************************************************************************** -*/ - -#ifndef __ADDR_COMMON_H__ -#define __ADDR_COMMON_H__ - -#include "addrinterface.h" - - -// ADDR_LNX_KERNEL_BUILD is for internal build -// Moved from addrinterface.h so __KERNEL__ is not needed any more -#if ADDR_LNX_KERNEL_BUILD // || (defined(__GNUC__) && defined(__KERNEL__)) - #include "lnx_common_defs.h" // ported from cmmqs -#elif !defined(__APPLE__) - #include - #include -#endif - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// Common constants -/////////////////////////////////////////////////////////////////////////////////////////////////// -static const UINT_32 MicroTileWidth = 8; ///< Micro tile width, for 1D and 2D tiling -static const UINT_32 MicroTileHeight = 8; ///< Micro tile height, for 1D and 2D tiling -static const UINT_32 ThickTileThickness = 4; ///< Micro tile thickness, for THICK modes -static const UINT_32 XThickTileThickness = 8; ///< Extra thick tiling thickness -static const UINT_32 PowerSaveTileBytes = 64; ///< Nuber of bytes per tile for power save 64 -static const UINT_32 CmaskCacheBits = 1024; ///< Number of bits for CMASK cache -static const UINT_32 CmaskElemBits = 4; ///< Number of bits for CMASK element -static const UINT_32 HtileCacheBits = 16384; ///< Number of bits for HTILE cache 512*32 - -static const UINT_32 MicroTilePixels = MicroTileWidth * MicroTileHeight; - -static const INT_32 TileIndexInvalid = TILEINDEX_INVALID; -static const INT_32 TileIndexLinearGeneral = TILEINDEX_LINEAR_GENERAL; -static const INT_32 TileIndexNoMacroIndex = -3; - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// Common macros -/////////////////////////////////////////////////////////////////////////////////////////////////// -#define BITS_PER_BYTE 8 -#define BITS_TO_BYTES(x) ( ((x) + (BITS_PER_BYTE-1)) / BITS_PER_BYTE ) -#define BYTES_TO_BITS(x) ( (x) * BITS_PER_BYTE ) - -/// Helper macros to select a single bit from an int (undefined later in section) -#define _BIT(v,b) (((v) >> (b) ) & 1) - -/** -*************************************************************************************************** -* @brief Enums to identify AddrLib type -*************************************************************************************************** -*/ -enum AddrLibClass -{ - BASE_ADDRLIB = 0x0, - R600_ADDRLIB = 0x6, - R800_ADDRLIB = 0x8, - SI_ADDRLIB = 0xa, - CI_ADDRLIB = 0xb, -}; - -/** -*************************************************************************************************** -* AddrChipFamily -* -* @brief -* Neutral enums that specifies chip family. -* -*************************************************************************************************** -*/ -enum AddrChipFamily -{ - ADDR_CHIP_FAMILY_IVLD, ///< Invalid family - ADDR_CHIP_FAMILY_R6XX, - ADDR_CHIP_FAMILY_R7XX, - ADDR_CHIP_FAMILY_R8XX, - ADDR_CHIP_FAMILY_NI, - ADDR_CHIP_FAMILY_SI, - ADDR_CHIP_FAMILY_CI, - ADDR_CHIP_FAMILY_VI, -}; - -/** -*************************************************************************************************** -* ADDR_CONFIG_FLAGS -* -* @brief -* This structure is used to set addr configuration flags. -*************************************************************************************************** -*/ -union ADDR_CONFIG_FLAGS -{ - struct - { - /// Clients do not need to set these flags except forceLinearAligned. - /// There flags are set up by AddrLib inside thru AddrInitGlobalParamsFromRegister - UINT_32 optimalBankSwap : 1; ///< New bank tiling for RV770 only - UINT_32 noCubeMipSlicesPad : 1; ///< Disables faces padding for cubemap mipmaps - UINT_32 fillSizeFields : 1; ///< If clients fill size fields in all input and - /// output structure - UINT_32 ignoreTileInfo : 1; ///< Don't use tile info structure - UINT_32 useTileIndex : 1; ///< Make tileIndex field in input valid - UINT_32 useCombinedSwizzle : 1; ///< Use combined swizzle - UINT_32 checkLast2DLevel : 1; ///< Check the last 2D mip sub level - UINT_32 useHtileSliceAlign : 1; ///< Do htile single slice alignment - UINT_32 degradeBaseLevel : 1; ///< Degrade to 1D modes automatically for base level - UINT_32 allowLargeThickTile : 1; ///< Allow 64*thickness*bytesPerPixel > rowSize - UINT_32 reserved : 22; ///< Reserved bits for future use - }; - - UINT_32 value; -}; - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// Platform specific debug break defines -/////////////////////////////////////////////////////////////////////////////////////////////////// -#if DEBUG - #if defined(__GNUC__) - #define ADDR_DBG_BREAK() - #elif defined(__APPLE__) - #define ADDR_DBG_BREAK() { IOPanic("");} - #else - #define ADDR_DBG_BREAK() { __debugbreak(); } - #endif -#else - #define ADDR_DBG_BREAK() -#endif -/////////////////////////////////////////////////////////////////////////////////////////////////// - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// Debug assertions used in AddrLib -/////////////////////////////////////////////////////////////////////////////////////////////////// -#if DEBUG -#define ADDR_ASSERT(__e) if ( !((__e) ? TRUE : FALSE)) { ADDR_DBG_BREAK(); } -#define ADDR_ASSERT_ALWAYS() ADDR_DBG_BREAK() -#define ADDR_UNHANDLED_CASE() ADDR_ASSERT(!"Unhandled case") -#define ADDR_NOT_IMPLEMENTED() ADDR_ASSERT(!"Not implemented"); -#else //DEBUG -#define ADDR_ASSERT(__e) -#define ADDR_ASSERT_ALWAYS() -#define ADDR_UNHANDLED_CASE() -#define ADDR_NOT_IMPLEMENTED() -#endif //DEBUG -/////////////////////////////////////////////////////////////////////////////////////////////////// - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// Debug print macro from legacy address library -/////////////////////////////////////////////////////////////////////////////////////////////////// -#if DEBUG - -#define ADDR_PRNT(a) AddrObject::DebugPrint a - -/// @brief Macro for reporting informational messages -/// @ingroup util -/// -/// This macro optionally prints an informational message to stdout. -/// The first parameter is a condition -- if it is true, nothing is done. -/// The second pararmeter MUST be a parenthesis-enclosed list of arguments, -/// starting with a string. This is passed to printf() or an equivalent -/// in order to format the informational message. For example, -/// ADDR_INFO(0, ("test %d",3) ); prints out "test 3". -/// -#define ADDR_INFO(cond, a) \ -{ if (!(cond)) { ADDR_PRNT(a); } } - - -/// @brief Macro for reporting error warning messages -/// @ingroup util -/// -/// This macro optionally prints an error warning message to stdout, -/// followed by the file name and line number where the macro was called. -/// The first parameter is a condition -- if it is true, nothing is done. -/// The second pararmeter MUST be a parenthesis-enclosed list of arguments, -/// starting with a string. This is passed to printf() or an equivalent -/// in order to format the informational message. For example, -/// ADDR_WARN(0, ("test %d",3) ); prints out "test 3" followed by -/// a second line with the file name and line number. -/// -#define ADDR_WARN(cond, a) \ -{ if (!(cond)) \ - { ADDR_PRNT(a); \ - ADDR_PRNT((" WARNING in file %s, line %d\n", __FILE__, __LINE__)); \ -} } - - -/// @brief Macro for reporting fatal error conditions -/// @ingroup util -/// -/// This macro optionally stops execution of the current routine -/// after printing an error warning message to stdout, -/// followed by the file name and line number where the macro was called. -/// The first parameter is a condition -- if it is true, nothing is done. -/// The second pararmeter MUST be a parenthesis-enclosed list of arguments, -/// starting with a string. This is passed to printf() or an equivalent -/// in order to format the informational message. For example, -/// ADDR_EXIT(0, ("test %d",3) ); prints out "test 3" followed by -/// a second line with the file name and line number, then stops execution. -/// -#define ADDR_EXIT(cond, a) \ -{ if (!(cond)) \ - { ADDR_PRNT(a); ADDR_DBG_BREAK();\ -} } - -#else // DEBUG - -#define ADDRDPF 1 ? (void)0 : (void) - -#define ADDR_PRNT(a) - -#define ADDR_DBG_BREAK() - -#define ADDR_INFO(cond, a) - -#define ADDR_WARN(cond, a) - -#define ADDR_EXIT(cond, a) - -#endif // DEBUG -/////////////////////////////////////////////////////////////////////////////////////////////////// - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// Misc helper functions -//////////////////////////////////////////////////////////////////////////////////////////////////// - -/** -*************************************************************************************************** -* AddrXorReduce -* -* @brief -* Xor the right-side numberOfBits bits of x. -*************************************************************************************************** -*/ -static inline UINT_32 XorReduce( - UINT_32 x, - UINT_32 numberOfBits) -{ - UINT_32 i; - UINT_32 result = x & 1; - - for (i=1; i>i) & 1); - } - - return result; -} - -/** -*************************************************************************************************** -* IsPow2 -* -* @brief -* Check if the size (UINT_32) is pow 2 -*************************************************************************************************** -*/ -static inline UINT_32 IsPow2( - UINT_32 dim) ///< [in] dimension of miplevel -{ - ADDR_ASSERT(dim > 0); - return !(dim & (dim - 1)); -} - -/** -*************************************************************************************************** -* IsPow2 -* -* @brief -* Check if the size (UINT_64) is pow 2 -*************************************************************************************************** -*/ -static inline UINT_64 IsPow2( - UINT_64 dim) ///< [in] dimension of miplevel -{ - ADDR_ASSERT(dim > 0); - return !(dim & (dim - 1)); -} - -/** -*************************************************************************************************** -* ByteAlign -* -* @brief -* Align UINT_32 "x" to "align" alignment, "align" should be power of 2 -*************************************************************************************************** -*/ -static inline UINT_32 PowTwoAlign( - UINT_32 x, - UINT_32 align) -{ - // - // Assert that x is a power of two. - // - ADDR_ASSERT(IsPow2(align)); - return (x + (align - 1)) & (~(align - 1)); -} - -/** -*************************************************************************************************** -* ByteAlign -* -* @brief -* Align UINT_64 "x" to "align" alignment, "align" should be power of 2 -*************************************************************************************************** -*/ -static inline UINT_64 PowTwoAlign( - UINT_64 x, - UINT_64 align) -{ - // - // Assert that x is a power of two. - // - ADDR_ASSERT(IsPow2(align)); - return (x + (align - 1)) & (~(align - 1)); -} - -/** -*************************************************************************************************** -* Min -* -* @brief -* Get the min value between two unsigned values -*************************************************************************************************** -*/ -static inline UINT_32 Min( - UINT_32 value1, - UINT_32 value2) -{ - return ((value1 < (value2)) ? (value1) : value2); -} - -/** -*************************************************************************************************** -* Min -* -* @brief -* Get the min value between two signed values -*************************************************************************************************** -*/ -static inline INT_32 Min( - INT_32 value1, - INT_32 value2) -{ - return ((value1 < (value2)) ? (value1) : value2); -} - -/** -*************************************************************************************************** -* Max -* -* @brief -* Get the max value between two unsigned values -*************************************************************************************************** -*/ -static inline UINT_32 Max( - UINT_32 value1, - UINT_32 value2) -{ - return ((value1 > (value2)) ? (value1) : value2); -} - -/** -*************************************************************************************************** -* Max -* -* @brief -* Get the max value between two signed values -*************************************************************************************************** -*/ -static inline INT_32 Max( - INT_32 value1, - INT_32 value2) -{ - return ((value1 > (value2)) ? (value1) : value2); -} - -/** -*************************************************************************************************** -* NextPow2 -* -* @brief -* Compute the mipmap's next level dim size -*************************************************************************************************** -*/ -static inline UINT_32 NextPow2( - UINT_32 dim) ///< [in] dimension of miplevel -{ - UINT_32 newDim; - - newDim = 1; - - if (dim > 0x7fffffff) - { - ADDR_ASSERT_ALWAYS(); - newDim = 0x80000000; - } - else - { - while (newDim < dim) - { - newDim <<= 1; - } - } - - return newDim; -} - -/** -*************************************************************************************************** -* Log2 -* -* @brief -* Compute log of base 2 -*************************************************************************************************** -*/ -static inline UINT_32 Log2( - UINT_32 x) ///< [in] the value should calculate log based 2 -{ - UINT_32 y; - - // - // Assert that x is a power of two. - // - ADDR_ASSERT(IsPow2(x)); - - y = 0; - while (x > 1) - { - x >>= 1; - y++; - } - - return y; -} - -/** -*************************************************************************************************** -* QLog2 -* -* @brief -* Compute log of base 2 quickly (<= 16) -*************************************************************************************************** -*/ -static inline UINT_32 QLog2( - UINT_32 x) ///< [in] the value should calculate log based 2 -{ - ADDR_ASSERT(x <= 16); - - UINT_32 y = 0; - - switch (x) - { - case 1: - y = 0; - break; - case 2: - y = 1; - break; - case 4: - y = 2; - break; - case 8: - y = 3; - break; - case 16: - y = 4; - break; - default: - ADDR_ASSERT_ALWAYS(); - } - - return y; -} - -/** -*************************************************************************************************** -* SafeAssign -* -* @brief -* NULL pointer safe assignment -*************************************************************************************************** -*/ -static inline VOID SafeAssign( - UINT_32* pLVal, ///< [in] Pointer to left val - UINT_32 rVal) ///< [in] Right value -{ - if (pLVal) - { - *pLVal = rVal; - } -} - -/** -*************************************************************************************************** -* SafeAssign -* -* @brief -* NULL pointer safe assignment for 64bit values -*************************************************************************************************** -*/ -static inline VOID SafeAssign( - UINT_64* pLVal, ///< [in] Pointer to left val - UINT_64 rVal) ///< [in] Right value -{ - if (pLVal) - { - *pLVal = rVal; - } -} - -/** -*************************************************************************************************** -* SafeAssign -* -* @brief -* NULL pointer safe assignment for AddrTileMode -*************************************************************************************************** -*/ -static inline VOID SafeAssign( - AddrTileMode* pLVal, ///< [in] Pointer to left val - AddrTileMode rVal) ///< [in] Right value -{ - if (pLVal) - { - *pLVal = rVal; - } -} - -#endif // __ADDR_COMMON_H__ - diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/core/addrelemlib.cpp mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/core/addrelemlib.cpp --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/core/addrelemlib.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/core/addrelemlib.cpp 1970-01-01 00:00:00.000000000 +0000 @@ -1,1674 +0,0 @@ -/* - * Copyright © 2014 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ - -/** -*************************************************************************************************** -* @file addrelemlib.cpp -* @brief Contains the class implementation for element/pixel related functions -*************************************************************************************************** -*/ - -#include "addrelemlib.h" -#include "addrlib.h" - - -/** -*************************************************************************************************** -* AddrElemLib::AddrElemLib -* -* @brief -* constructor -* -* @return -* N/A -*************************************************************************************************** -*/ -AddrElemLib::AddrElemLib( - AddrLib* const pAddrLib) : ///< [in] Parent addrlib instance pointer - AddrObject(pAddrLib->GetClient()), - m_pAddrLib(pAddrLib) -{ - switch (m_pAddrLib->GetAddrChipFamily()) - { - case ADDR_CHIP_FAMILY_R6XX: - m_depthPlanarType = ADDR_DEPTH_PLANAR_R600; - m_fp16ExportNorm = 0; - break; - case ADDR_CHIP_FAMILY_R7XX: - m_depthPlanarType = ADDR_DEPTH_PLANAR_R600; - m_fp16ExportNorm = 1; - break; - case ADDR_CHIP_FAMILY_R8XX: - case ADDR_CHIP_FAMILY_NI: // Same as 8xx - m_depthPlanarType = ADDR_DEPTH_PLANAR_R800; - m_fp16ExportNorm = 1; - break; - default: - m_fp16ExportNorm = 1; - m_depthPlanarType = ADDR_DEPTH_PLANAR_R800; - } - - m_configFlags.value = 0; -} - -/** -*************************************************************************************************** -* AddrElemLib::~AddrElemLib -* -* @brief -* destructor -* -* @return -* N/A -*************************************************************************************************** -*/ -AddrElemLib::~AddrElemLib() -{ -} - -/** -*************************************************************************************************** -* AddrElemLib::Create -* -* @brief -* Creates and initializes AddrLib object. -* -* @return -* Returns point to ADDR_CREATEINFO if successful. -*************************************************************************************************** -*/ -AddrElemLib* AddrElemLib::Create( - const AddrLib* const pAddrLib) ///< [in] Pointer of parent AddrLib instance -{ - AddrElemLib* pElemLib = NULL; - - if (pAddrLib) - { - pElemLib = new(pAddrLib->GetClient()) AddrElemLib(const_cast(pAddrLib)); - } - - return pElemLib; -} - -/************************************************************************************************** -* AddrElemLib::Flt32sToInt32s -* -* @brief -* Convert a ADDR_FLT_32 value to Int32 value -* -* @return -* N/A -*************************************************************************************************** -*/ -VOID AddrElemLib::Flt32sToInt32s( - ADDR_FLT_32 value, ///< [in] ADDR_FLT_32 value - UINT_32 bits, ///< [in] nubmer of bits in value - AddrNumberType numberType, ///< [in] the type of number - UINT_32* pResult) ///< [out] Int32 value -{ - UINT_8 round = 128; //ADDR_ROUND_BY_HALF - UINT_32 uscale; - UINT_32 sign; - - //convert each component to an INT_32 - switch ( numberType ) - { - case ADDR_NO_NUMBER: //fall through - case ADDR_ZERO: //fall through - case ADDR_ONE: //fall through - case ADDR_EPSILON: //fall through - return; // these are zero-bit components, so don't set result - - case ADDR_UINT_BITS: // unsigned integer bit field, clamped to range - uscale = (1< uscale)) - { - *pResult = uscale; - } - else - { - *pResult = value.i; - } - return; - } - - // The algorithm used in the DB and TX differs at one value for 24-bit unorms - case ADDR_UNORM_R6XXDB: // unsigned repeating fraction - if ((bits==24) && (value.i == 0x33000000)) - { - *pResult = 1; - return; - } // Else treat like ADDR_UNORM_R6XX - - case ADDR_UNORM_R6XX: // unsigned repeating fraction - if (value.f <= 0) - { - *pResult = 0; // first clamp to [0..1] - } - else - { - if (value.f >= 1) - { - *pResult = (1<(f + (round/256.0f)); - } - #endif - else - { - ADDR_FLT_32 scaled; - ADDR_FLT_32 shifted; - UINT_64 truncated, rounded; - UINT_32 altShift; - UINT_32 mask = (1 << bits) - 1; - UINT_32 half = 1 << (bits - 1); - UINT_32 mant24 = (value.i & 0x7FFFFF) + 0x800000; - UINT_64 temp = mant24 - (mant24>>bits) - - static_cast((mant24 & mask) > half); - UINT_32 exp8 = value.i >> 23; - UINT_32 shift = 126 - exp8 + 24 - bits; - UINT_64 final; - - if (shift >= 32) // This is zero, even with maximum dither add - { - final = 0; - } - else - { - final = ((temp<<8) + (static_cast(round)<> (shift+8); - } - //ADDR_EXIT( *pResult == final, - // ("Float %x converted to %d-bit Unorm %x != bitwise %x", - // value.u, bits, (UINT_32)*pResult, (UINT_32)final) ); - if (final > mask) - { - final = mask; - } - - scaled.f = value.f * ((1<>23)&0xFF); - truncated = (altShift > 60) ? 0 : truncated >> altShift; - rounded = static_cast((round + truncated) >> 8); - //if (rounded > ((1<(rounded); //(INT_32)final; - } - } - } - - return; - - case ADDR_S8FLOAT32: // 32-bit IEEE float, passes through NaN values - *pResult = value.i; - return; - - // @@ FIX ROUNDING in this code, fix the denorm case - case ADDR_U4FLOATC: // Unsigned float, 4-bit exponent. bias 15, clamped [0..1] - sign = (value.i >> 31) & 1; - if ((value.i&0x7F800000) == 0x7F800000) // If NaN or INF: - { - if ((value.i&0x007FFFFF) != 0) // then if NaN - { - *pResult = 0; // return 0 - } - else - { - *pResult = (sign)?0:0xF00000; // else +INF->+1, -INF->0 - } - return; - } - if (value.f <= 0) - { - *pResult = 0; - } - else - { - if (value.f>=1) - { - *pResult = 0xF << (bits-4); - } - else - { - if ((value.i>>23) > 112 ) - { - // 24-bit float: normalized - // value.i += 1 << (22-bits+4); - // round the IEEE mantissa to mantissa size - // @@ NOTE: add code to support rounding - value.u &= 0x7FFFFFF; // mask off high 4 exponent bits - *pResult = value.i >> (23-bits+4);// shift off unused mantissa bits - } - else - { - // 24-bit float: denormalized - value.f = value.f / (1<<28) / (1<<28); - value.f = value.f / (1<<28) / (1<<28); // convert to IEEE denorm - // value.i += 1 << (22-bits+4); - // round the IEEE mantissa to mantissa size - // @@ NOTE: add code to support rounding - *pResult = value.i >> (23-bits+4); // shift off unused mantissa bits - } - } - } - - return; - - default: // invalid number mode - //ADDR_EXIT(0, ("Invalid AddrNumber %d", numberType) ); - break; - - } -} - -/** -*************************************************************************************************** -* AddrElemLib::Int32sToPixel -* -* @brief -* Pack 32-bit integer values into an uncompressed pixel, -* in the proper order -* -* @return -* N/A -* -* @note -* This entry point packes four 32-bit integer values into -* an uncompressed pixel. The pixel values are specifies in -* standard order, e.g. depth/stencil. This routine asserts -* if called on compressed pixel. -*************************************************************************************************** -*/ -VOID AddrElemLib::Int32sToPixel( - UINT_32 numComps, ///< [in] number of components - UINT_32* pComps, ///< [in] compnents - UINT_32* pCompBits, ///< [in] total bits in each component - UINT_32* pCompStart, ///< [in] the first bit position of each component - ADDR_COMPONENT_FLAGS properties, ///< [in] properties about byteAligned, exportNorm - UINT_32 resultBits, ///< [in] result bits: total bpp after decompression - UINT_8* pPixel) ///< [out] a depth/stencil pixel value -{ - UINT_32 i; - UINT_32 j; - UINT_32 start; - UINT_32 size; - UINT_32 byte; - UINT_32 value = 0; - UINT_32 compMask; - UINT_32 elemMask=0; - UINT_32 elementXor = 0; // address xor when reading bytes from elements - - - // @@ NOTE: assert if called on a compressed format! - - if (properties.byteAligned) // Components are all byte-sized - { - for (i = 0; i < numComps; i++) // Then for each component - { - // Copy the bytes of the component into the element - start = pCompStart[i] / 8; - size = pCompBits[i] / 8; - for (j = 0; j < size; j++) - { - pPixel[(j+start)^elementXor] = static_cast(pComps[i] >> (8*j)); - } - } - } - else // Element is 32-bits or less, components are bit fields - { - // First, extract each component in turn and combine it into a 32-bit value - for (i = 0; i < numComps; i++) - { - compMask = (1 << pCompBits[i]) - 1; - elemMask |= compMask << pCompStart[i]; - value |= (pComps[i] & compMask) << pCompStart[i]; - } - - // Mext, copy the masked value into the element - size = (resultBits + 7) / 8; - for (i = 0; i < size; i++) - { - byte = pPixel[i^elementXor] & ~(elemMask >> (8*i)); - pPixel[i^elementXor] = static_cast(byte | ((elemMask & value) >> (8*i))); - } - } -} - -/** -*************************************************************************************************** -* Flt32ToDepthPixel -* -* @brief -* Convert a FLT_32 value to a depth/stencil pixel value -* -* @return -* N/A -*************************************************************************************************** -*/ -VOID AddrElemLib::Flt32ToDepthPixel( - AddrDepthFormat format, ///< [in] Depth format - const ADDR_FLT_32 comps[2], ///< [in] two components of depth - UINT_8* pPixel ///< [out] depth pixel value - ) const -{ - UINT_32 i; - UINT_32 values[2]; - ADDR_COMPONENT_FLAGS properties; // byteAligned, exportNorm - UINT_32 resultBits = 0; // result bits: total bits per pixel after decompression - - ADDR_PIXEL_FORMATINFO fmt; - - // get type for each component - PixGetDepthCompInfo(format, &fmt); - - //initialize properties - properties.byteAligned = TRUE; - properties.exportNorm = TRUE; - properties.floatComp = FALSE; - - //set properties and result bits - for (i = 0; i < 2; i++) - { - if ((fmt.compBit[i] & 7) || (fmt.compStart[i] & 7)) - { - properties.byteAligned = FALSE; - } - - if (resultBits < fmt.compStart[i] + fmt.compBit[i]) - { - resultBits = fmt.compStart[i] + fmt.compBit[i]; - } - - // Clear ADDR_EXPORT_NORM if can't be represented as 11-bit or smaller [-1..+1] format - if (fmt.compBit[i] > 11 || fmt.numType[i] >= ADDR_USCALED) - { - properties.exportNorm = FALSE; - } - - // Mark if there are any floating point components - if ((fmt.numType[i] == ADDR_U4FLOATC) || (fmt.numType[i] >= ADDR_S8FLOAT) ) - { - properties.floatComp = TRUE; - } - } - - // Convert the two input floats to integer values - for (i = 0; i < 2; i++) - { - Flt32sToInt32s(comps[i], fmt.compBit[i], fmt.numType[i], &values[i]); - } - - // Then pack the two integer components, in the proper order - Int32sToPixel(2, values, fmt.compBit, fmt.compStart, properties, resultBits, pPixel ); - -} - -/** -*************************************************************************************************** -* Flt32ToColorPixel -* -* @brief -* Convert a FLT_32 value to a red/green/blue/alpha pixel value -* -* @return -* N/A -*************************************************************************************************** -*/ -VOID AddrElemLib::Flt32ToColorPixel( - AddrColorFormat format, ///< [in] Color format - AddrSurfaceNumber surfNum, ///< [in] Surface number - AddrSurfaceSwap surfSwap, ///< [in] Surface swap - const ADDR_FLT_32 comps[4], ///< [in] four components of color - UINT_8* pPixel ///< [out] a red/green/blue/alpha pixel value - ) const -{ - ADDR_PIXEL_FORMATINFO pixelInfo; - - UINT_32 i; - UINT_32 values[4]; - ADDR_COMPONENT_FLAGS properties; // byteAligned, exportNorm - UINT_32 resultBits = 0; // result bits: total bits per pixel after decompression - - memset(&pixelInfo, 0, sizeof(ADDR_PIXEL_FORMATINFO)); - - PixGetColorCompInfo(format, surfNum, surfSwap, &pixelInfo); - - //initialize properties - properties.byteAligned = TRUE; - properties.exportNorm = TRUE; - properties.floatComp = FALSE; - - //set properties and result bits - for (i = 0; i < 4; i++) - { - if ( (pixelInfo.compBit[i] & 7) || (pixelInfo.compStart[i] & 7) ) - { - properties.byteAligned = FALSE; - } - - if (resultBits < pixelInfo.compStart[i] + pixelInfo.compBit[i]) - { - resultBits = pixelInfo.compStart[i] + pixelInfo.compBit[i]; - } - - if (m_fp16ExportNorm) - { - // Clear ADDR_EXPORT_NORM if can't be represented as 11-bit or smaller [-1..+1] format - // or if it's not FP and <=16 bits - if (((pixelInfo.compBit[i] > 11) || (pixelInfo.numType[i] >= ADDR_USCALED)) - && (pixelInfo.numType[i] !=ADDR_U4FLOATC)) - { - properties.exportNorm = FALSE; - } - } - else - { - // Clear ADDR_EXPORT_NORM if can't be represented as 11-bit or smaller [-1..+1] format - if (pixelInfo.compBit[i] > 11 || pixelInfo.numType[i] >= ADDR_USCALED) - { - properties.exportNorm = FALSE; - } - } - - // Mark if there are any floating point components - if ( (pixelInfo.numType[i] == ADDR_U4FLOATC) || - (pixelInfo.numType[i] >= ADDR_S8FLOAT) ) - { - properties.floatComp = TRUE; - } - } - - // Convert the four input floats to integer values - for (i = 0; i < 4; i++) - { - Flt32sToInt32s(comps[i], pixelInfo.compBit[i], pixelInfo.numType[i], &values[i]); - } - - // Then pack the four integer components, in the proper order - Int32sToPixel(4, values, &pixelInfo.compBit[0], &pixelInfo.compStart[0], - properties, resultBits, pPixel); -} - -/** -*************************************************************************************************** -* AddrElemLib::GetCompType -* -* @brief -* Fill per component info -* -* @return -* N/A -* -*************************************************************************************************** -*/ -VOID AddrElemLib::GetCompType( - AddrColorFormat format, ///< [in] surface format - AddrSurfaceNumber numType, ///< [in] number type - ADDR_PIXEL_FORMATINFO* pInfo) ///< [in][out] per component info out -{ - BOOL_32 handled = FALSE; - - // Floating point formats override the number format - switch (format) - { - case ADDR_COLOR_16_FLOAT: // fall through for all pure floating point format - case ADDR_COLOR_16_16_FLOAT: - case ADDR_COLOR_16_16_16_16_FLOAT: - case ADDR_COLOR_32_FLOAT: - case ADDR_COLOR_32_32_FLOAT: - case ADDR_COLOR_32_32_32_32_FLOAT: - case ADDR_COLOR_10_11_11_FLOAT: - case ADDR_COLOR_11_11_10_FLOAT: - numType = ADDR_NUMBER_FLOAT; - break; - // Special handling for the depth formats - case ADDR_COLOR_8_24: // fall through for these 2 similar format - case ADDR_COLOR_24_8: - for (UINT_32 c = 0; c < 4; c++) - { - if (pInfo->compBit[c] == 8) - { - pInfo->numType[c] = ADDR_UINT_BITS; - } - else if (pInfo->compBit[c] == 24) - { - pInfo->numType[c] = ADDR_UNORM_R6XX; - } - else - { - pInfo->numType[c] = ADDR_NO_NUMBER; - } - } - handled = TRUE; - break; - case ADDR_COLOR_8_24_FLOAT: // fall through for these 3 similar format - case ADDR_COLOR_24_8_FLOAT: - case ADDR_COLOR_X24_8_32_FLOAT: - for (UINT_32 c = 0; c < 4; c++) - { - if (pInfo->compBit[c] == 8) - { - pInfo->numType[c] = ADDR_UINT_BITS; - } - else if (pInfo->compBit[c] == 24) - { - pInfo->numType[c] = ADDR_U4FLOATC; - } - else if (pInfo->compBit[c] == 32) - { - pInfo->numType[c] = ADDR_S8FLOAT32; - } - else - { - pInfo->numType[c] = ADDR_NO_NUMBER; - } - } - handled = TRUE; - break; - default: - break; - } - - if (!handled) - { - for (UINT_32 c = 0; c < 4; c++) - { - // Assign a number type for each component - AddrSurfaceNumber cnum; - - // First handle default component values - if (pInfo->compBit[c] == 0) - { - if (c < 3) - { - pInfo->numType[c] = ADDR_ZERO; // Default is zero for RGB - } - else if (numType == ADDR_NUMBER_UINT || numType == ADDR_NUMBER_SINT) - { - pInfo->numType[c] = ADDR_EPSILON; // Alpha INT_32 bits default is 0x01 - } - else - { - pInfo->numType[c] = ADDR_ONE; // Alpha normal default is float 1.0 - } - continue; - } - // Now handle small components - else if (pInfo->compBit[c] == 1) - { - if (numType == ADDR_NUMBER_UINT || numType == ADDR_NUMBER_SINT) - { - cnum = ADDR_NUMBER_UINT; - } - else - { - cnum = ADDR_NUMBER_UNORM; - } - } - else - { - cnum = numType; - } - - // If no default, set the number type fom num, compbits, and architecture - switch (cnum) - { - case ADDR_NUMBER_SRGB: - pInfo->numType[c] = (c < 3) ? ADDR_GAMMA8_R6XX : ADDR_UNORM_R6XX; - break; - case ADDR_NUMBER_UNORM: - pInfo->numType[c] = ADDR_UNORM_R6XX; - break; - case ADDR_NUMBER_SNORM: - pInfo->numType[c] = ADDR_SNORM_R6XX; - break; - case ADDR_NUMBER_USCALED: - pInfo->numType[c] = ADDR_USCALED; // @@ Do we need separate Pele routine? - break; - case ADDR_NUMBER_SSCALED: - pInfo->numType[c] = ADDR_SSCALED; // @@ Do we need separate Pele routine? - break; - case ADDR_NUMBER_FLOAT: - if (pInfo->compBit[c] == 32) - { - pInfo->numType[c] = ADDR_S8FLOAT32; - } - else if (pInfo->compBit[c] == 16) - { - pInfo->numType[c] = ADDR_S5FLOAT; - } - else if (pInfo->compBit[c] >= 10) - { - pInfo->numType[c] = ADDR_U5FLOAT; - } - else - { - ADDR_ASSERT_ALWAYS(); - } - break; - case ADDR_NUMBER_SINT: - pInfo->numType[c] = ADDR_SINT_BITS; - break; - case ADDR_NUMBER_UINT: - pInfo->numType[c] = ADDR_UINT_BITS; - break; - - default: - ADDR_ASSERT(!"Invalid number type"); - pInfo->numType[c] = ADDR_NO_NUMBER; - break; - } - } - } -} - -/** -*************************************************************************************************** -* AddrElemLib::GetCompSwap -* -* @brief -* Get components swapped for color surface -* -* @return -* N/A -* -*************************************************************************************************** -*/ -VOID AddrElemLib::GetCompSwap( - AddrSurfaceSwap swap, ///< [in] swap mode - ADDR_PIXEL_FORMATINFO* pInfo) ///< [in/out] output per component info -{ - switch (pInfo->comps) - { - case 4: - switch (swap) - { - case ADDR_SWAP_ALT: - SwapComps( 0, 2, pInfo ); - break; // BGRA - case ADDR_SWAP_STD_REV: - SwapComps( 0, 3, pInfo ); - SwapComps( 1, 2, pInfo ); - break; // ABGR - case ADDR_SWAP_ALT_REV: - SwapComps( 0, 3, pInfo ); - SwapComps( 0, 2, pInfo ); - SwapComps( 0, 1, pInfo ); - break; // ARGB - default: - break; - } - break; - case 3: - switch (swap) - { - case ADDR_SWAP_ALT_REV: - SwapComps( 0, 3, pInfo ); - SwapComps( 0, 2, pInfo ); - break; // AGR - case ADDR_SWAP_STD_REV: - SwapComps( 0, 2, pInfo ); - break; // BGR - case ADDR_SWAP_ALT: - SwapComps( 2, 3, pInfo ); - break; // RGA - default: - break; // RGB - } - break; - case 2: - switch (swap) - { - case ADDR_SWAP_ALT_REV: - SwapComps( 0, 1, pInfo ); - SwapComps( 1, 3, pInfo ); - break; // AR - case ADDR_SWAP_STD_REV: - SwapComps( 0, 1, pInfo ); - break; // GR - case ADDR_SWAP_ALT: - SwapComps( 1, 3, pInfo ); - break; // RA - default: - break; // RG - } - break; - case 1: - switch (swap) - { - case ADDR_SWAP_ALT_REV: - SwapComps( 0, 3, pInfo ); - break; // A - case ADDR_SWAP_STD_REV: - SwapComps( 0, 2, pInfo ); - break; // B - case ADDR_SWAP_ALT: - SwapComps( 0, 1, pInfo ); - break; // G - default: - break; // R - } - break; - } -} - -/** -*************************************************************************************************** -* AddrElemLib::GetCompSwap -* -* @brief -* Get components swapped for color surface -* -* @return -* N/A -* -*************************************************************************************************** -*/ -VOID AddrElemLib::SwapComps( - UINT_32 c0, ///< [in] component index 0 - UINT_32 c1, ///< [in] component index 1 - ADDR_PIXEL_FORMATINFO* pInfo) ///< [in/out] output per component info -{ - UINT_32 start; - UINT_32 bits; - - start = pInfo->compStart[c0]; - pInfo->compStart[c0] = pInfo->compStart[c1]; - pInfo->compStart[c1] = start; - - bits = pInfo->compBit[c0]; - pInfo->compBit[c0] = pInfo->compBit[c1]; - pInfo->compBit[c1] = bits; -} - -/** -*************************************************************************************************** -* AddrElemLib::PixGetColorCompInfo -* -* @brief -* Get per component info for color surface -* -* @return -* N/A -* -*************************************************************************************************** -*/ -VOID AddrElemLib::PixGetColorCompInfo( - AddrColorFormat format, ///< [in] surface format, read from register - AddrSurfaceNumber number, ///< [in] pixel number type - AddrSurfaceSwap swap, ///< [in] component swap mode - ADDR_PIXEL_FORMATINFO* pInfo ///< [out] output per component info - ) const -{ - // 1. Get componet bits - switch (format) - { - case ADDR_COLOR_8: - GetCompBits(8, 0, 0, 0, pInfo); - break; - case ADDR_COLOR_1_5_5_5: - GetCompBits(5, 5, 5, 1, pInfo); - break; - case ADDR_COLOR_5_6_5: - GetCompBits(8, 6, 5, 0, pInfo); - break; - case ADDR_COLOR_6_5_5: - GetCompBits(5, 5, 6, 0, pInfo); - break; - case ADDR_COLOR_8_8: - GetCompBits(8, 8, 0, 0, pInfo); - break; - case ADDR_COLOR_4_4_4_4: - GetCompBits(4, 4, 4, 4, pInfo); - break; - case ADDR_COLOR_16: - GetCompBits(16, 0, 0, 0, pInfo); - break; - case ADDR_COLOR_8_8_8_8: - GetCompBits(8, 8, 8, 8, pInfo); - break; - case ADDR_COLOR_2_10_10_10: - GetCompBits(10, 10, 10, 2, pInfo); - break; - case ADDR_COLOR_10_11_11: - GetCompBits(11, 11, 10, 0, pInfo); - break; - case ADDR_COLOR_11_11_10: - GetCompBits(10, 11, 11, 0, pInfo); - break; - case ADDR_COLOR_16_16: - GetCompBits(16, 16, 0, 0, pInfo); - break; - case ADDR_COLOR_16_16_16_16: - GetCompBits(16, 16, 16, 16, pInfo); - break; - case ADDR_COLOR_16_FLOAT: - GetCompBits(16, 0, 0, 0, pInfo); - break; - case ADDR_COLOR_16_16_FLOAT: - GetCompBits(16, 16, 0, 0, pInfo); - break; - case ADDR_COLOR_32_FLOAT: - GetCompBits(32, 0, 0, 0, pInfo); - break; - case ADDR_COLOR_32_32_FLOAT: - GetCompBits(32, 32, 0, 0, pInfo); - break; - case ADDR_COLOR_16_16_16_16_FLOAT: - GetCompBits(16, 16, 16, 16, pInfo); - break; - case ADDR_COLOR_32_32_32_32_FLOAT: - GetCompBits(32, 32, 32, 32, pInfo); - break; - - case ADDR_COLOR_32: - GetCompBits(32, 0, 0, 0, pInfo); - break; - case ADDR_COLOR_32_32: - GetCompBits(32, 32, 0, 0, pInfo); - break; - case ADDR_COLOR_32_32_32_32: - GetCompBits(32, 32, 32, 32, pInfo); - break; - case ADDR_COLOR_10_10_10_2: - GetCompBits(2, 10, 10, 10, pInfo); - break; - case ADDR_COLOR_10_11_11_FLOAT: - GetCompBits(11, 11, 10, 0, pInfo); - break; - case ADDR_COLOR_11_11_10_FLOAT: - GetCompBits(10, 11, 11, 0, pInfo); - break; - case ADDR_COLOR_5_5_5_1: - GetCompBits(1, 5, 5, 5, pInfo); - break; - case ADDR_COLOR_3_3_2: - GetCompBits(2, 3, 3, 0, pInfo); - break; - case ADDR_COLOR_4_4: - GetCompBits(4, 4, 0, 0, pInfo); - break; - case ADDR_COLOR_8_24: - case ADDR_COLOR_8_24_FLOAT: // same bit count, fall through - GetCompBits(24, 8, 0, 0, pInfo); - break; - case ADDR_COLOR_24_8: - case ADDR_COLOR_24_8_FLOAT: // same bit count, fall through - GetCompBits(8, 24, 0, 0, pInfo); - break; - case ADDR_COLOR_X24_8_32_FLOAT: - GetCompBits(32, 8, 0, 0, pInfo); - break; - - case ADDR_COLOR_INVALID: - GetCompBits(0, 0, 0, 0, pInfo); - break; - default: - ADDR_ASSERT(0); - GetCompBits(0, 0, 0, 0, pInfo); - break; - } - - // 2. Get component number type - - GetCompType(format, number, pInfo); - - // 3. Swap components if needed - - GetCompSwap(swap, pInfo); -} - -/** -*************************************************************************************************** -* AddrElemLib::PixGetDepthCompInfo -* -* @brief -* Get per component info for depth surface -* -* @return -* N/A -* -*************************************************************************************************** -*/ -VOID AddrElemLib::PixGetDepthCompInfo( - AddrDepthFormat format, ///< [in] surface format, read from register - ADDR_PIXEL_FORMATINFO* pInfo ///< [out] output per component bits and type - ) const -{ - if (m_depthPlanarType == ADDR_DEPTH_PLANAR_R800) - { - if (format == ADDR_DEPTH_8_24_FLOAT) - { - format = ADDR_DEPTH_X24_8_32_FLOAT; // Use this format to represent R800's D24FS8 - } - - if (format == ADDR_DEPTH_X8_24_FLOAT) - { - format = ADDR_DEPTH_32_FLOAT; - } - } - - switch (format) - { - case ADDR_DEPTH_16: - GetCompBits(16, 0, 0, 0, pInfo); - break; - case ADDR_DEPTH_8_24: - case ADDR_DEPTH_8_24_FLOAT: // similar format, fall through - GetCompBits(24, 8, 0, 0, pInfo); - break; - case ADDR_DEPTH_X8_24: - case ADDR_DEPTH_X8_24_FLOAT: // similar format, fall through - GetCompBits(24, 0, 0, 0, pInfo); - break; - case ADDR_DEPTH_32_FLOAT: - GetCompBits(32, 0, 0, 0, pInfo); - break; - case ADDR_DEPTH_X24_8_32_FLOAT: - GetCompBits(32, 8, 0, 0, pInfo); - break; - case ADDR_DEPTH_INVALID: - GetCompBits(0, 0, 0, 0, pInfo); - break; - default: - ADDR_ASSERT(0); - GetCompBits(0, 0, 0, 0, pInfo); - break; - } - - switch (format) - { - case ADDR_DEPTH_16: - pInfo->numType [0] = ADDR_UNORM_R6XX; - pInfo->numType [1] = ADDR_ZERO; - break; - case ADDR_DEPTH_8_24: - pInfo->numType [0] = ADDR_UNORM_R6XXDB; - pInfo->numType [1] = ADDR_UINT_BITS; - break; - case ADDR_DEPTH_8_24_FLOAT: - pInfo->numType [0] = ADDR_U4FLOATC; - pInfo->numType [1] = ADDR_UINT_BITS; - break; - case ADDR_DEPTH_X8_24: - pInfo->numType [0] = ADDR_UNORM_R6XXDB; - pInfo->numType [1] = ADDR_ZERO; - break; - case ADDR_DEPTH_X8_24_FLOAT: - pInfo->numType [0] = ADDR_U4FLOATC; - pInfo->numType [1] = ADDR_ZERO; - break; - case ADDR_DEPTH_32_FLOAT: - pInfo->numType [0] = ADDR_S8FLOAT32; - pInfo->numType [1] = ADDR_ZERO; - break; - case ADDR_DEPTH_X24_8_32_FLOAT: - pInfo->numType [0] = ADDR_S8FLOAT32; - pInfo->numType [1] = ADDR_UINT_BITS; - break; - default: - pInfo->numType [0] = ADDR_NO_NUMBER; - pInfo->numType [1] = ADDR_NO_NUMBER; - break; - } - - pInfo->numType [2] = ADDR_NO_NUMBER; - pInfo->numType [3] = ADDR_NO_NUMBER; -} - -/** -*************************************************************************************************** -* AddrElemLib::PixGetExportNorm -* -* @brief -* Check if fp16 export norm can be enabled. -* -* @return -* TRUE if this can be enabled. -* -*************************************************************************************************** -*/ -BOOL_32 AddrElemLib::PixGetExportNorm( - AddrColorFormat colorFmt, ///< [in] surface format, read from register - AddrSurfaceNumber numberFmt, ///< [in] pixel number type - AddrSurfaceSwap swap ///< [in] components swap type - ) const -{ - BOOL_32 enabled = TRUE; - - ADDR_PIXEL_FORMATINFO formatInfo; - - PixGetColorCompInfo(colorFmt, numberFmt, swap, &formatInfo); - - for (UINT_32 c = 0; c < 4; c++) - { - if (m_fp16ExportNorm) - { - if (((formatInfo.compBit[c] > 11) || (formatInfo.numType[c] > ADDR_USCALED)) && - (formatInfo.numType[c] != ADDR_U4FLOATC) && - (formatInfo.numType[c] != ADDR_S5FLOAT) && - (formatInfo.numType[c] != ADDR_S5FLOATM) && - (formatInfo.numType[c] != ADDR_U5FLOAT) && - (formatInfo.numType[c] != ADDR_U3FLOATM)) - { - enabled = FALSE; - break; - } - } - else - { - if ((formatInfo.compBit[c] > 11) || (formatInfo.numType[c] > ADDR_USCALED)) - { - enabled = FALSE; - break; - } - } - } - - return enabled; -} - -/** -*************************************************************************************************** -* AddrElemLib::AdjustSurfaceInfo -* -* @brief -* Adjust bpp/base pitch/width/height according to elemMode and expandX/Y -* -* @return -* N/A -*************************************************************************************************** -*/ -VOID AddrElemLib::AdjustSurfaceInfo( - AddrElemMode elemMode, ///< [in] element mode - UINT_32 expandX, ///< [in] decompression expansion factor in X - UINT_32 expandY, ///< [in] decompression expansion factor in Y - UINT_32* pBpp, ///< [in/out] bpp - UINT_32* pBasePitch, ///< [in/out] base pitch - UINT_32* pWidth, ///< [in/out] width - UINT_32* pHeight) ///< [in/out] height -{ - UINT_32 packedBits; - UINT_32 basePitch; - UINT_32 width; - UINT_32 height; - UINT_32 bpp; - BOOL_32 bBCnFormat = FALSE; - - ADDR_ASSERT(pBpp != NULL); - ADDR_ASSERT(pWidth != NULL && pHeight != NULL && pBasePitch != NULL); - - if (pBpp) - { - bpp = *pBpp; - - switch (elemMode) - { - case ADDR_EXPANDED: - packedBits = bpp / expandX / expandY; - break; - case ADDR_PACKED_STD: // Different bit order - case ADDR_PACKED_REV: - packedBits = bpp * expandX * expandY; - break; - case ADDR_PACKED_GBGR: - case ADDR_PACKED_BGRG: - packedBits = bpp; // 32-bit packed ==> 2 32-bit result - break; - case ADDR_PACKED_BC1: // Fall through - case ADDR_PACKED_BC4: - packedBits = 64; - bBCnFormat = TRUE; - break; - case ADDR_PACKED_BC2: // Fall through - case ADDR_PACKED_BC3: // Fall through - case ADDR_PACKED_BC5: // Fall through - bBCnFormat = TRUE; - packedBits = 128; - break; - case ADDR_ROUND_BY_HALF: // Fall through - case ADDR_ROUND_TRUNCATE: // Fall through - case ADDR_ROUND_DITHER: // Fall through - case ADDR_UNCOMPRESSED: - packedBits = bpp; - break; - default: - packedBits = bpp; - ADDR_ASSERT_ALWAYS(); - break; - } - - *pBpp = packedBits; - } - - if (pWidth && pHeight && pBasePitch) - { - basePitch = *pBasePitch; - width = *pWidth; - height = *pHeight; - - if ((expandX > 1) || (expandY > 1)) - { - if (elemMode == ADDR_EXPANDED) - { - basePitch *= expandX; - width *= expandX; - height *= expandY; - } - else - { - // Evergreen family workaround - if (bBCnFormat && (m_pAddrLib->GetAddrChipFamily() == ADDR_CHIP_FAMILY_R8XX)) - { - // For BCn we now pad it to POW2 at the beginning so it is safe to - // divide by 4 directly - basePitch = basePitch / expandX; - width = width / expandX; - height = height / expandY; -#if DEBUG - width = (width == 0) ? 1 : width; - height = (height == 0) ? 1 : height; - - if ((*pWidth > PowTwoAlign(width, 8) * expandX) || - (*pHeight > PowTwoAlign(height, 8) * expandY)) // 8 is 1D tiling alignment - { - // if this assertion is hit we may have issues if app samples - // rightmost/bottommost pixels - ADDR_ASSERT_ALWAYS(); - } -#endif - } - else // Not BCn format we still keep old way (FMT_1? No real test yet) - { - basePitch = (basePitch + expandX - 1) / expandX; - width = (width + expandX - 1) / expandX; - height = (height + expandY - 1) / expandY; - } - } - - *pBasePitch = basePitch; // 0 is legal value for base pitch. - *pWidth = (width == 0) ? 1 : width; - *pHeight = (height == 0) ? 1 : height; - } //if (pWidth && pHeight && pBasePitch) - } -} - -/** -*************************************************************************************************** -* AddrElemLib::RestoreSurfaceInfo -* -* @brief -* Reverse operation of AdjustSurfaceInfo -* -* @return -* N/A -*************************************************************************************************** -*/ -VOID AddrElemLib::RestoreSurfaceInfo( - AddrElemMode elemMode, ///< [in] element mode - UINT_32 expandX, ///< [in] decompression expansion factor in X - UINT_32 expandY, ///< [out] decompression expansion factor in Y - UINT_32* pBpp, ///< [in/out] bpp - UINT_32* pWidth, ///< [in/out] width - UINT_32* pHeight) ///< [in/out] height -{ - UINT_32 originalBits; - UINT_32 width; - UINT_32 height; - UINT_32 bpp; - - ADDR_ASSERT(pBpp != NULL); - ADDR_ASSERT(pWidth != NULL && pHeight != NULL); - - if (pBpp) - { - bpp = *pBpp; - - switch (elemMode) - { - case ADDR_EXPANDED: - originalBits = bpp * expandX * expandY; - break; - case ADDR_PACKED_STD: // Different bit order - case ADDR_PACKED_REV: - originalBits = bpp / expandX / expandY; - break; - case ADDR_PACKED_GBGR: - case ADDR_PACKED_BGRG: - originalBits = bpp; // 32-bit packed ==> 2 32-bit result - break; - case ADDR_PACKED_BC1: // Fall through - case ADDR_PACKED_BC4: - originalBits = 64; - break; - case ADDR_PACKED_BC2: // Fall through - case ADDR_PACKED_BC3: // Fall through - case ADDR_PACKED_BC5: - originalBits = 128; - break; - case ADDR_ROUND_BY_HALF: // Fall through - case ADDR_ROUND_TRUNCATE: // Fall through - case ADDR_ROUND_DITHER: // Fall through - case ADDR_UNCOMPRESSED: - originalBits = bpp; - break; - default: - originalBits = bpp; - ADDR_ASSERT_ALWAYS(); - break; - } - - *pBpp = originalBits; - } - - if (pWidth && pHeight) - { - width = *pWidth; - height = *pHeight; - - if ((expandX > 1) || (expandY > 1)) - { - if (elemMode == ADDR_EXPANDED) - { - width /= expandX; - height /= expandY; - } - else - { - width *= expandX; - height *= expandY; - } - } - - *pWidth = (width == 0) ? 1 : width; - *pHeight = (height == 0) ? 1 : height; - } -} - -/** -*************************************************************************************************** -* AddrElemLib::GetBitsPerPixel -* -* @brief -* Compute the total bits per element according to a format -* code. For compressed formats, this is not the same as -* the number of bits per decompressed element. -* -* @return -* Bits per pixel -*************************************************************************************************** -*/ -UINT_32 AddrElemLib::GetBitsPerPixel( - AddrFormat format, ///< [in] surface format code - AddrElemMode* pElemMode, ///< [out] element mode - UINT_32* pExpandX, ///< [out] decompression expansion factor in X - UINT_32* pExpandY, ///< [out] decompression expansion factor in Y - UINT_32* pUnusedBits) ///< [out] bits unused -{ - UINT_32 bpp; - UINT_32 expandX = 1; - UINT_32 expandY = 1; - UINT_32 bitUnused = 0; - AddrElemMode elemMode = ADDR_UNCOMPRESSED; // default value - - switch (format) - { - case ADDR_FMT_8: - bpp = 8; - break; - case ADDR_FMT_1_5_5_5: - case ADDR_FMT_5_6_5: - case ADDR_FMT_6_5_5: - case ADDR_FMT_8_8: - case ADDR_FMT_4_4_4_4: - case ADDR_FMT_16: - case ADDR_FMT_16_FLOAT: - bpp = 16; - break; - case ADDR_FMT_GB_GR: // treat as FMT_8_8 - elemMode = ADDR_PACKED_GBGR; - bpp = 16; - break; - case ADDR_FMT_BG_RG: // treat as FMT_8_8 - elemMode = ADDR_PACKED_BGRG; - bpp = 16; - break; - case ADDR_FMT_8_8_8_8: - case ADDR_FMT_2_10_10_10: - case ADDR_FMT_10_11_11: - case ADDR_FMT_11_11_10: - case ADDR_FMT_16_16: - case ADDR_FMT_16_16_FLOAT: - case ADDR_FMT_32: - case ADDR_FMT_32_FLOAT: - case ADDR_FMT_24_8: - case ADDR_FMT_24_8_FLOAT: - bpp = 32; - break; - case ADDR_FMT_16_16_16_16: - case ADDR_FMT_16_16_16_16_FLOAT: - case ADDR_FMT_32_32: - case ADDR_FMT_32_32_FLOAT: - case ADDR_FMT_CTX1: - bpp = 64; - break; - case ADDR_FMT_32_32_32_32: - case ADDR_FMT_32_32_32_32_FLOAT: - bpp = 128; - break; - case ADDR_FMT_INVALID: - bpp = 0; - break; - case ADDR_FMT_1_REVERSED: - elemMode = ADDR_PACKED_REV; - expandX = 8; - bpp = 1; - break; - case ADDR_FMT_1: - elemMode = ADDR_PACKED_STD; - expandX = 8; - bpp = 1; - break; - case ADDR_FMT_4_4: - case ADDR_FMT_3_3_2: - bpp = 8; - break; - case ADDR_FMT_5_5_5_1: - bpp = 16; - break; - case ADDR_FMT_32_AS_8: - case ADDR_FMT_32_AS_8_8: - case ADDR_FMT_8_24: - case ADDR_FMT_8_24_FLOAT: - case ADDR_FMT_10_10_10_2: - case ADDR_FMT_10_11_11_FLOAT: - case ADDR_FMT_11_11_10_FLOAT: - case ADDR_FMT_5_9_9_9_SHAREDEXP: - bpp = 32; - break; - case ADDR_FMT_X24_8_32_FLOAT: - bpp = 64; - bitUnused = 24; - break; - case ADDR_FMT_8_8_8: - elemMode = ADDR_EXPANDED; - bpp = 24;//@@ 8; // read 3 elements per pixel - expandX = 3; - break; - case ADDR_FMT_16_16_16: - case ADDR_FMT_16_16_16_FLOAT: - elemMode = ADDR_EXPANDED; - bpp = 48;//@@ 16; // read 3 elements per pixel - expandX = 3; - break; - case ADDR_FMT_32_32_32_FLOAT: - case ADDR_FMT_32_32_32: - elemMode = ADDR_EXPANDED; - expandX = 3; - bpp = 96;//@@ 32; // read 3 elements per pixel - break; - case ADDR_FMT_BC1: - elemMode = ADDR_PACKED_BC1; - expandX = 4; - expandY = 4; - bpp = 64; - break; - case ADDR_FMT_BC4: - elemMode = ADDR_PACKED_BC4; - expandX = 4; - expandY = 4; - bpp = 64; - break; - case ADDR_FMT_BC2: - elemMode = ADDR_PACKED_BC2; - expandX = 4; - expandY = 4; - bpp = 128; - break; - case ADDR_FMT_BC3: - elemMode = ADDR_PACKED_BC3; - expandX = 4; - expandY = 4; - bpp = 128; - break; - case ADDR_FMT_BC5: - case ADDR_FMT_BC6: // reuse ADDR_PACKED_BC5 - case ADDR_FMT_BC7: // reuse ADDR_PACKED_BC5 - elemMode = ADDR_PACKED_BC5; - expandX = 4; - expandY = 4; - bpp = 128; - break; - default: - bpp = 0; - ADDR_ASSERT_ALWAYS(); - break; - // @@ or should this be an error? - } - - SafeAssign(pExpandX, expandX); - SafeAssign(pExpandY, expandY); - SafeAssign(pUnusedBits, bitUnused); - SafeAssign(reinterpret_cast(pElemMode), elemMode); - - return bpp; -} - -/** -*************************************************************************************************** -* AddrElemLib::GetCompBits -* -* @brief -* Set each component's bit size and bit start. And set element mode and number type -* -* @return -* N/A -*************************************************************************************************** -*/ -VOID AddrElemLib::GetCompBits( - UINT_32 c0, ///< [in] bits of component 0 - UINT_32 c1, ///< [in] bits of component 1 - UINT_32 c2, ///< [in] bits of component 2 - UINT_32 c3, ///< [in] bits of component 3 - ADDR_PIXEL_FORMATINFO* pInfo, ///< [out] per component info out - AddrElemMode elemMode) ///< [in] element mode -{ - pInfo->comps = 0; - - pInfo->compBit[0] = c0; - pInfo->compBit[1] = c1; - pInfo->compBit[2] = c2; - pInfo->compBit[3] = c3; - - pInfo->compStart[0] = 0; - pInfo->compStart[1] = c0; - pInfo->compStart[2] = c0+c1; - pInfo->compStart[3] = c0+c1+c2; - - pInfo->elemMode = elemMode; - // still needed since component swap may depend on number of components - for (INT i=0; i<4; i++) - { - if (pInfo->compBit[i] == 0) - { - pInfo->compStart[i] = 0; // all null components start at bit 0 - pInfo->numType[i] = ADDR_NO_NUMBER; // and have no number type - } - else - { - pInfo->comps++; - } - } -} - -/** -*************************************************************************************************** -* AddrElemLib::GetCompBits -* -* @brief -* Set the clear color (or clear depth/stencil) for a surface -* -* @note -* If clearColor is zero, a default clear value is used in place of comps[4]. -* If float32 is set, full precision is used, else the mantissa is reduced to 12-bits -* -* @return -* N/A -*************************************************************************************************** -*/ -VOID AddrElemLib::SetClearComps( - ADDR_FLT_32 comps[4], ///< [in/out] components - BOOL_32 clearColor, ///< [in] TRUE if clear color is set (CLEAR_COLOR) - BOOL_32 float32) ///< [in] TRUE if float32 component (BLEND_FLOAT32) -{ - INT_32 i; - - // Use default clearvalues if clearColor is disabled - if (clearColor == FALSE) - { - for (i=0; i<3; i++) - { - comps[i].f = 0.0; - } - comps[3].f = 1.0; - } - - // Otherwise use the (modified) clear value - else - { - for (i=0; i<4; i++) - { // If full precision, use clear value unchanged - if (float32) - { - // Do nothing - //comps[i] = comps[i]; - } - // Else if it is a NaN, use the standard NaN value - else if ((comps[i].u & 0x7FFFFFFF) > 0x7F800000) - { - comps[i].u = 0xFFC00000; - } - // Else reduce the mantissa precision - else - { - comps[i].u = comps[i].u & 0xFFFFF000; - } - } - } -} - -/** -*************************************************************************************************** -* AddrElemLib::IsBlockCompressed -* -* @brief -* TRUE if this is block compressed format -* -* @note -* -* @return -* BOOL_32 -*************************************************************************************************** -*/ -BOOL_32 AddrElemLib::IsBlockCompressed( - AddrFormat format) ///< [in] Format -{ - return format >= ADDR_FMT_BC1 && format <= ADDR_FMT_BC7; -} - - -/** -*************************************************************************************************** -* AddrElemLib::IsCompressed -* -* @brief -* TRUE if this is block compressed format or 1 bit format -* -* @note -* -* @return -* BOOL_32 -*************************************************************************************************** -*/ -BOOL_32 AddrElemLib::IsCompressed( - AddrFormat format) ///< [in] Format -{ - return IsBlockCompressed(format) || format == ADDR_FMT_BC1 || format == ADDR_FMT_BC7; -} - -/** -*************************************************************************************************** -* AddrElemLib::IsExpand3x -* -* @brief -* TRUE if this is 3x expand format -* -* @note -* -* @return -* BOOL_32 -*************************************************************************************************** -*/ -BOOL_32 AddrElemLib::IsExpand3x( - AddrFormat format) ///< [in] Format -{ - BOOL_32 is3x = FALSE; - - switch (format) - { - case ADDR_FMT_8_8_8: - case ADDR_FMT_16_16_16: - case ADDR_FMT_16_16_16_FLOAT: - case ADDR_FMT_32_32_32: - case ADDR_FMT_32_32_32_FLOAT: - is3x = TRUE; - break; - default: - break; - } - - return is3x; -} - - diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/core/addrelemlib.h mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/core/addrelemlib.h --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/core/addrelemlib.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/core/addrelemlib.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,270 +0,0 @@ -/* - * Copyright © 2014 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ - -/** -*************************************************************************************************** -* @file addrelemlib.h -* @brief Contains the class for element/pixel related functions -*************************************************************************************************** -*/ - -#ifndef __ELEM_LIB_H__ -#define __ELEM_LIB_H__ - -#include "addrinterface.h" -#include "addrobject.h" -#include "addrcommon.h" - -class AddrLib; - -// The masks for property bits within the Properties INT_32 -union ADDR_COMPONENT_FLAGS -{ - struct - { - UINT_32 byteAligned : 1; ///< all components are byte aligned - UINT_32 exportNorm : 1; ///< components support R6xx NORM compression - UINT_32 floatComp : 1; ///< there is at least one floating point component - }; - - UINT_32 value; -}; - -// Copy from legacy lib's AddrNumberType -enum AddrNumberType -{ - // The following number types have the range [-1..1] - ADDR_NO_NUMBER, // This component doesn't exist and has no default value - ADDR_EPSILON, // Force component value to integer 0x00000001 - ADDR_ZERO, // Force component value to integer 0x00000000 - ADDR_ONE, // Force component value to floating point 1.0 - // Above values don't have any bits per component (keep ADDR_ONE the last of these) - - ADDR_UNORM, // Unsigned normalized (repeating fraction) full precision - ADDR_SNORM, // Signed normalized (repeating fraction) full precision - ADDR_GAMMA, // Gamma-corrected, full precision - - ADDR_UNORM_R5XXRB, // Unsigned normalized (repeating fraction) for r5xx RB - ADDR_SNORM_R5XXRB, // Signed normalized (repeating fraction) for r5xx RB - ADDR_GAMMA_R5XXRB, // Gamma-corrected for r5xx RB (note: unnormalized value) - ADDR_UNORM_R5XXBC, // Unsigned normalized (repeating fraction) for r5xx BC - ADDR_SNORM_R5XXBC, // Signed normalized (repeating fraction) for r5xx BC - ADDR_GAMMA_R5XXBC, // Gamma-corrected for r5xx BC (note: unnormalized value) - - ADDR_UNORM_R6XX, // Unsigned normalized (repeating fraction) for R6xx - ADDR_UNORM_R6XXDB, // Unorms for 24-bit depth: one value differs from ADDR_UNORM_R6XX - ADDR_SNORM_R6XX, // Signed normalized (repeating fraction) for R6xx - ADDR_GAMMA8_R6XX, // Gamma-corrected for r6xx - ADDR_GAMMA8_R7XX_TP, // Gamma-corrected for r7xx TP 12bit unorm 8.4. - - ADDR_U4FLOATC, // Unsigned float: 4-bit exponent, bias=15, no NaN, clamp [0..1] - ADDR_GAMMA_4SEG, // Gamma-corrected, four segment approximation - ADDR_U0FIXED, // Unsigned 0.N-bit fixed point - - // The following number types have large ranges (LEAVE ADDR_USCALED first or fix Finish routine) - ADDR_USCALED, // Unsigned integer converted to/from floating point - ADDR_SSCALED, // Signed integer converted to/from floating point - ADDR_USCALED_R5XXRB, // Unsigned integer to/from floating point for r5xx RB - ADDR_SSCALED_R5XXRB, // Signed integer to/from floating point for r5xx RB - ADDR_UINT_BITS, // Keep in unsigned integer form, clamped to specified range - ADDR_SINT_BITS, // Keep in signed integer form, clamped to specified range - ADDR_UINTBITS, // @@ remove Keep in unsigned integer form, use modulus to reduce bits - ADDR_SINTBITS, // @@ remove Keep in signed integer form, use modulus to reduce bits - - // The following number types and ADDR_U4FLOATC have exponents - // (LEAVE ADDR_S8FLOAT first or fix Finish routine) - ADDR_S8FLOAT, // Signed floating point with 8-bit exponent, bias=127 - ADDR_S8FLOAT32, // 32-bit IEEE float, passes through NaN values - ADDR_S5FLOAT, // Signed floating point with 5-bit exponent, bias=15 - ADDR_S5FLOATM, // Signed floating point with 5-bit exponent, bias=15, no NaN/Inf - ADDR_U5FLOAT, // Signed floating point with 5-bit exponent, bias=15 - ADDR_U3FLOATM, // Unsigned floating point with 3-bit exponent, bias=3 - - ADDR_S5FIXED, // Signed 5.N-bit fixed point, with rounding - - ADDR_END_NUMBER // Used for range comparisons -}; - -// Copy from legacy lib's AddrElement -enum AddrElemMode -{ - // These formats allow both packing an unpacking - ADDR_ROUND_BY_HALF, // add 1/2 and truncate when packing this element - ADDR_ROUND_TRUNCATE, // truncate toward 0 for sign/mag, else toward neg - ADDR_ROUND_DITHER, // Pack by dithering -- requires (x,y) position - - // These formats only allow unpacking, no packing - ADDR_UNCOMPRESSED, // Elements are not compressed: one data element per pixel/texel - ADDR_EXPANDED, // Elements are split up and stored in multiple data elements - ADDR_PACKED_STD, // Elements are compressed into ExpandX by ExpandY data elements - ADDR_PACKED_REV, // Like ADDR_PACKED, but X order of pixels is reverved - ADDR_PACKED_GBGR, // Elements are compressed 4:2:2 in G1B_G0R order (high to low) - ADDR_PACKED_BGRG, // Elements are compressed 4:2:2 in BG1_RG0 order (high to low) - ADDR_PACKED_BC1, // Each data element is uncompressed to a 4x4 pixel/texel array - ADDR_PACKED_BC2, // Each data element is uncompressed to a 4x4 pixel/texel array - ADDR_PACKED_BC3, // Each data element is uncompressed to a 4x4 pixel/texel array - ADDR_PACKED_BC4, // Each data element is uncompressed to a 4x4 pixel/texel array - ADDR_PACKED_BC5, // Each data element is uncompressed to a 4x4 pixel/texel array - - // These formats provide various kinds of compression - ADDR_ZPLANE_R5XX, // Compressed Zplane using r5xx architecture format - ADDR_ZPLANE_R6XX, // Compressed Zplane using r6xx architecture format - //@@ Fill in the compression modes - - ADDR_END_ELEMENT // Used for range comparisons -}; - -enum AddrDepthPlanarType -{ - ADDR_DEPTH_PLANAR_NONE = 0, // No plane z/stencl - ADDR_DEPTH_PLANAR_R600 = 1, // R600 z and stencil planes are store within a tile - ADDR_DEPTH_PLANAR_R800 = 2, // R800 has separate z and stencil planes -}; - -/** -*************************************************************************************************** -* ADDR_PIXEL_FORMATINFO -* -* @brief -* Per component info -* -*************************************************************************************************** -*/ -struct ADDR_PIXEL_FORMATINFO -{ - UINT_32 compBit[4]; - AddrNumberType numType[4]; - UINT_32 compStart[4]; - AddrElemMode elemMode; - UINT_32 comps; ///< Number of components -}; - -/** -*************************************************************************************************** -* @brief This class contains asic indepentent element related attributes and operations -*************************************************************************************************** -*/ -class AddrElemLib : public AddrObject -{ -protected: - AddrElemLib(AddrLib* const pAddrLib); - -public: - - /// Makes this class virtual - virtual ~AddrElemLib(); - - static AddrElemLib *Create( - const AddrLib* const pAddrLib); - - /// The implementation is only for R6xx/R7xx, so make it virtual in case we need for R8xx - BOOL_32 PixGetExportNorm( - AddrColorFormat colorFmt, - AddrSurfaceNumber numberFmt, AddrSurfaceSwap swap) const; - - /// Below method are asic independent, so make them just static. - /// Remove static if we need different operation in hwl. - - VOID Flt32ToDepthPixel( - AddrDepthFormat format, const ADDR_FLT_32 comps[2], UINT_8 *pPixel) const; - - VOID Flt32ToColorPixel( - AddrColorFormat format, AddrSurfaceNumber surfNum, AddrSurfaceSwap surfSwap, - const ADDR_FLT_32 comps[4], UINT_8 *pPixel) const; - - static VOID Flt32sToInt32s( - ADDR_FLT_32 value, UINT_32 bits, AddrNumberType numberType, UINT_32* pResult); - - static VOID Int32sToPixel( - UINT_32 numComps, UINT_32* pComps, UINT_32* pCompBits, UINT_32* pCompStart, - ADDR_COMPONENT_FLAGS properties, UINT_32 resultBits, UINT_8* pPixel); - - VOID PixGetColorCompInfo( - AddrColorFormat format, AddrSurfaceNumber number, AddrSurfaceSwap swap, - ADDR_PIXEL_FORMATINFO* pInfo) const; - - VOID PixGetDepthCompInfo( - AddrDepthFormat format, ADDR_PIXEL_FORMATINFO* pInfo) const; - - UINT_32 GetBitsPerPixel( - AddrFormat format, AddrElemMode* pElemMode, - UINT_32* pExpandX = NULL, UINT_32* pExpandY = NULL, UINT_32* pBitsUnused = NULL); - - static VOID SetClearComps( - ADDR_FLT_32 comps[4], BOOL_32 clearColor, BOOL_32 float32); - - VOID AdjustSurfaceInfo( - AddrElemMode elemMode, UINT_32 expandX, UINT_32 expandY, - UINT_32* pBpp, UINT_32* pBasePitch, UINT_32* pWidth, UINT_32* pHeight); - - VOID RestoreSurfaceInfo( - AddrElemMode elemMode, UINT_32 expandX, UINT_32 expandY, - UINT_32* pBpp, UINT_32* pWidth, UINT_32* pHeight); - - /// Checks if depth and stencil are planar inside a tile - BOOL_32 IsDepthStencilTilePlanar() - { - return (m_depthPlanarType == ADDR_DEPTH_PLANAR_R600) ? TRUE : FALSE; - } - - /// Sets m_configFlags, copied from AddrLib - VOID SetConfigFlags(ADDR_CONFIG_FLAGS flags) - { - m_configFlags = flags; - } - - static BOOL_32 IsCompressed(AddrFormat format); - static BOOL_32 IsBlockCompressed(AddrFormat format); - static BOOL_32 IsExpand3x(AddrFormat format); - -protected: - - static VOID GetCompBits( - UINT_32 c0, UINT_32 c1, UINT_32 c2, UINT_32 c3, - ADDR_PIXEL_FORMATINFO* pInfo, - AddrElemMode elemMode = ADDR_ROUND_BY_HALF); - - static VOID GetCompType( - AddrColorFormat format, AddrSurfaceNumber numType, - ADDR_PIXEL_FORMATINFO* pInfo); - - static VOID GetCompSwap( - AddrSurfaceSwap swap, ADDR_PIXEL_FORMATINFO* pInfo); - - static VOID SwapComps( - UINT_32 c0, UINT_32 c1, ADDR_PIXEL_FORMATINFO* pInfo); - -private: - - UINT_32 m_fp16ExportNorm; ///< If allow FP16 to be reported as EXPORT_NORM - AddrDepthPlanarType m_depthPlanarType; - - ADDR_CONFIG_FLAGS m_configFlags; ///< Copy of AddrLib's configFlags - AddrLib* const m_pAddrLib; ///< Pointer to parent addrlib instance -}; - -#endif - diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/core/addrlib.cpp mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/core/addrlib.cpp --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/core/addrlib.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/core/addrlib.cpp 1970-01-01 00:00:00.000000000 +0000 @@ -1,4023 +0,0 @@ -/* - * Copyright © 2014 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ - -/** -*************************************************************************************************** -* @file addrlib.cpp -* @brief Contains the implementation for the AddrLib base class.. -*************************************************************************************************** -*/ - -#include "addrinterface.h" -#include "addrlib.h" -#include "addrcommon.h" - -#if defined(__APPLE__) - -UINT_32 div64_32(UINT_64 n, UINT_32 base) -{ - UINT_64 rem = n; - UINT_64 b = base; - UINT_64 res, d = 1; - UINT_32 high = rem >> 32; - - res = 0; - if (high >= base) - { - high /= base; - res = (UINT_64) high << 32; - rem -= (UINT_64) (high*base) << 32; - } - - while ((INT_64)b > 0 && b < rem) - { - b = b+b; - d = d+d; - } - - do - { - if (rem >= b) - { - rem -= b; - res += d; - } - b >>= 1; - d >>= 1; - } while (d); - - n = res; - return rem; -} - -extern "C" -UINT_32 __umoddi3(UINT_64 n, UINT_32 base) -{ - return div64_32(n, base); -} - -#endif // __APPLE__ - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// Static Const Member -/////////////////////////////////////////////////////////////////////////////////////////////////// - -const AddrTileModeFlags AddrLib::m_modeFlags[ADDR_TM_COUNT] = -{// T L 1 2 3 P Pr B - {1, 1, 0, 0, 0, 0, 0, 0}, // ADDR_TM_LINEAR_GENERAL - {1, 1, 0, 0, 0, 0, 0, 0}, // ADDR_TM_LINEAR_ALIGNED - {1, 0, 1, 0, 0, 0, 0, 0}, // ADDR_TM_1D_TILED_THIN1 - {4, 0, 1, 0, 0, 0, 0, 0}, // ADDR_TM_1D_TILED_THICK - {1, 0, 0, 1, 0, 0, 0, 0}, // ADDR_TM_2D_TILED_THIN1 - {1, 0, 0, 1, 0, 0, 0, 0}, // ADDR_TM_2D_TILED_THIN2 - {1, 0, 0, 1, 0, 0, 0, 0}, // ADDR_TM_2D_TILED_THIN4 - {4, 0, 0, 1, 0, 0, 0, 0}, // ADDR_TM_2D_TILED_THICK - {1, 0, 0, 1, 0, 0, 0, 1}, // ADDR_TM_2B_TILED_THIN1 - {1, 0, 0, 1, 0, 0, 0, 1}, // ADDR_TM_2B_TILED_THIN2 - {1, 0, 0, 1, 0, 0, 0, 1}, // ADDR_TM_2B_TILED_THIN4 - {4, 0, 0, 1, 0, 0, 0, 1}, // ADDR_TM_2B_TILED_THICK - {1, 0, 0, 1, 1, 0, 0, 0}, // ADDR_TM_3D_TILED_THIN1 - {4, 0, 0, 1, 1, 0, 0, 0}, // ADDR_TM_3D_TILED_THICK - {1, 0, 0, 1, 1, 0, 0, 1}, // ADDR_TM_3B_TILED_THIN1 - {4, 0, 0, 1, 1, 0, 0, 1}, // ADDR_TM_3B_TILED_THICK - {8, 0, 0, 1, 0, 0, 0, 0}, // ADDR_TM_2D_TILED_XTHICK - {8, 0, 0, 1, 1, 0, 0, 0}, // ADDR_TM_3D_TILED_XTHICK - {1, 0, 0, 0, 0, 0, 0, 0}, // ADDR_TM_POWER_SAVE - {1, 0, 0, 1, 0, 1, 1, 0}, // ADDR_TM_PRT_TILED_THIN1 - {1, 0, 0, 1, 0, 1, 0, 0}, // ADDR_TM_PRT_2D_TILED_THIN1 - {1, 0, 0, 1, 1, 1, 0, 0}, // ADDR_TM_PRT_3D_TILED_THIN1 - {4, 0, 0, 1, 0, 1, 1, 0}, // ADDR_TM_PRT_TILED_THICK - {4, 0, 0, 1, 0, 1, 0, 0}, // ADDR_TM_PRT_2D_TILED_THICK - {4, 0, 0, 1, 1, 1, 0, 0}, // ADDR_TM_PRT_3D_TILED_THICK -}; - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// Constructor/Destructor -/////////////////////////////////////////////////////////////////////////////////////////////////// - -/** -*************************************************************************************************** -* AddrLib::AddrLib -* -* @brief -* Constructor for the AddrLib class -* -*************************************************************************************************** -*/ -AddrLib::AddrLib() : - m_class(BASE_ADDRLIB), - m_chipFamily(ADDR_CHIP_FAMILY_IVLD), - m_chipRevision(0), - m_version(ADDRLIB_VERSION), - m_pipes(0), - m_banks(0), - m_pipeInterleaveBytes(0), - m_rowSize(0), - m_minPitchAlignPixels(1), - m_maxSamples(8), - m_pElemLib(NULL) -{ - m_configFlags.value = 0; -} - -/** -*************************************************************************************************** -* AddrLib::AddrLib -* -* @brief -* Constructor for the AddrLib class with hClient as parameter -* -*************************************************************************************************** -*/ -AddrLib::AddrLib(const AddrClient* pClient) : - AddrObject(pClient), - m_class(BASE_ADDRLIB), - m_chipFamily(ADDR_CHIP_FAMILY_IVLD), - m_chipRevision(0), - m_version(ADDRLIB_VERSION), - m_pipes(0), - m_banks(0), - m_pipeInterleaveBytes(0), - m_rowSize(0), - m_minPitchAlignPixels(1), - m_maxSamples(8), - m_pElemLib(NULL) -{ - m_configFlags.value = 0; -} - -/** -*************************************************************************************************** -* AddrLib::~AddrLib -* -* @brief -* Destructor for the AddrLib class -* -*************************************************************************************************** -*/ -AddrLib::~AddrLib() -{ - if (m_pElemLib) - { - delete m_pElemLib; - } -} - - - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// Initialization/Helper -/////////////////////////////////////////////////////////////////////////////////////////////////// - -/** -*************************************************************************************************** -* AddrLib::Create -* -* @brief -* Creates and initializes AddrLib object. -* -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::Create( - const ADDR_CREATE_INPUT* pCreateIn, ///< [in] pointer to ADDR_CREATE_INPUT - ADDR_CREATE_OUTPUT* pCreateOut) ///< [out] pointer to ADDR_CREATE_OUTPUT -{ - AddrLib* pLib = NULL; - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (pCreateIn->createFlags.fillSizeFields == TRUE) - { - if ((pCreateIn->size != sizeof(ADDR_CREATE_INPUT)) || - (pCreateOut->size != sizeof(ADDR_CREATE_OUTPUT))) - { - returnCode = ADDR_PARAMSIZEMISMATCH; - } - } - - if ((returnCode == ADDR_OK) && - (pCreateIn->callbacks.allocSysMem != NULL) && - (pCreateIn->callbacks.freeSysMem != NULL)) - { - AddrClient client = { - pCreateIn->hClient, - pCreateIn->callbacks - }; - - switch (pCreateIn->chipEngine) - { - case CIASICIDGFXENGINE_SOUTHERNISLAND: - switch (pCreateIn->chipFamily) - { - case FAMILY_SI: - pLib = AddrSIHwlInit(&client); - break; - case FAMILY_VI: - case FAMILY_CZ: // VI based fusion(carrizo) - case FAMILY_CI: - case FAMILY_KV: // CI based fusion - pLib = AddrCIHwlInit(&client); - break; - default: - ADDR_ASSERT_ALWAYS(); - break; - } - break; - default: - ADDR_ASSERT_ALWAYS(); - break; - } - } - - if ((pLib != NULL)) - { - BOOL_32 initValid; - - // Pass createFlags to configFlags first since these flags may be overwritten - pLib->m_configFlags.noCubeMipSlicesPad = pCreateIn->createFlags.noCubeMipSlicesPad; - pLib->m_configFlags.fillSizeFields = pCreateIn->createFlags.fillSizeFields; - pLib->m_configFlags.useTileIndex = pCreateIn->createFlags.useTileIndex; - pLib->m_configFlags.useCombinedSwizzle = pCreateIn->createFlags.useCombinedSwizzle; - pLib->m_configFlags.checkLast2DLevel = pCreateIn->createFlags.checkLast2DLevel; - pLib->m_configFlags.useHtileSliceAlign = pCreateIn->createFlags.useHtileSliceAlign; - pLib->m_configFlags.degradeBaseLevel = pCreateIn->createFlags.degradeBaseLevel; - pLib->m_configFlags.allowLargeThickTile = pCreateIn->createFlags.allowLargeThickTile; - - pLib->SetAddrChipFamily(pCreateIn->chipFamily, pCreateIn->chipRevision); - - pLib->SetMinPitchAlignPixels(pCreateIn->minPitchAlignPixels); - - // Global parameters initialized and remaining configFlags bits are set as well - initValid = pLib->HwlInitGlobalParams(pCreateIn); - - if (initValid) - { - pLib->m_pElemLib = AddrElemLib::Create(pLib); - } - else - { - pLib->m_pElemLib = NULL; // Don't go on allocating element lib - returnCode = ADDR_INVALIDGBREGVALUES; - } - - if (pLib->m_pElemLib == NULL) - { - delete pLib; - pLib = NULL; - ADDR_ASSERT_ALWAYS(); - } - else - { - pLib->m_pElemLib->SetConfigFlags(pLib->m_configFlags); - } - } - - pCreateOut->hLib = pLib; - - if ((pLib == NULL) && - (returnCode == ADDR_OK)) - { - // Unknown failures, we return the general error code - returnCode = ADDR_ERROR; - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrLib::SetAddrChipFamily -* -* @brief -* Convert familyID defined in atiid.h to AddrChipFamily and set m_chipFamily/m_chipRevision -* @return -* N/A -*************************************************************************************************** -*/ -VOID AddrLib::SetAddrChipFamily( - UINT_32 uChipFamily, ///< [in] chip family defined in atiih.h - UINT_32 uChipRevision) ///< [in] chip revision defined in "asic_family"_id.h -{ - AddrChipFamily family = ADDR_CHIP_FAMILY_IVLD; - - family = HwlConvertChipFamily(uChipFamily, uChipRevision); - - ADDR_ASSERT(family != ADDR_CHIP_FAMILY_IVLD); - - m_chipFamily = family; - m_chipRevision = uChipRevision; -} - -/** -*************************************************************************************************** -* AddrLib::SetMinPitchAlignPixels -* -* @brief -* Set m_minPitchAlignPixels with input param -* -* @return -* N/A -*************************************************************************************************** -*/ -VOID AddrLib::SetMinPitchAlignPixels( - UINT_32 minPitchAlignPixels) ///< [in] minmum pitch alignment in pixels -{ - m_minPitchAlignPixels = (minPitchAlignPixels == 0)? 1 : minPitchAlignPixels; -} - -/** -*************************************************************************************************** -* AddrLib::GetAddrLib -* -* @brief -* Get AddrLib pointer -* -* @return -* An AddrLib class pointer -*************************************************************************************************** -*/ -AddrLib * AddrLib::GetAddrLib( - ADDR_HANDLE hLib) ///< [in] handle of ADDR_HANDLE -{ - return static_cast(hLib); -} - - - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// Surface Methods -/////////////////////////////////////////////////////////////////////////////////////////////////// - - -/** -*************************************************************************************************** -* AddrLib::ComputeSurfaceInfo -* -* @brief -* Interface function stub of AddrComputeSurfaceInfo. -* -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::ComputeSurfaceInfo( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure - ) const -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (GetFillSizeFieldsFlags() == TRUE) - { - if ((pIn->size != sizeof(ADDR_COMPUTE_SURFACE_INFO_INPUT)) || - (pOut->size != sizeof(ADDR_COMPUTE_SURFACE_INFO_OUTPUT))) - { - returnCode = ADDR_PARAMSIZEMISMATCH; - } - } - - // We suggest client do sanity check but a check here is also good - if (pIn->bpp > 128) - { - returnCode = ADDR_INVALIDPARAMS; - } - - // Thick modes don't support multisample - if (ComputeSurfaceThickness(pIn->tileMode) > 1 && pIn->numSamples > 1) - { - returnCode = ADDR_INVALIDPARAMS; - } - - if (returnCode == ADDR_OK) - { - // Get a local copy of input structure and only reference pIn for unadjusted values - ADDR_COMPUTE_SURFACE_INFO_INPUT localIn = *pIn; - ADDR_TILEINFO tileInfoNull = {0}; - - if (UseTileInfo()) - { - // If the original input has a valid ADDR_TILEINFO pointer then copy its contents. - // Otherwise the default 0's in tileInfoNull are used. - if (pIn->pTileInfo) - { - tileInfoNull = *pIn->pTileInfo; - } - localIn.pTileInfo = &tileInfoNull; - } - - localIn.numSamples = pIn->numSamples == 0 ? 1 : pIn->numSamples; - - // Do mipmap check first - // If format is BCn, pre-pad dimension to power-of-two according to HWL - ComputeMipLevel(&localIn); - - if (m_configFlags.checkLast2DLevel) - { - // Save this level's original height in pixels - pOut->height = pIn->height; - } - - UINT_32 expandX = 1; - UINT_32 expandY = 1; - AddrElemMode elemMode; - - // Save outputs that may not go through HWL - pOut->pixelBits = localIn.bpp; - pOut->numSamples = localIn.numSamples; - pOut->last2DLevel = FALSE; - -#if !ALT_TEST - if (localIn.numSamples > 1) - { - ADDR_ASSERT(localIn.mipLevel == 0); - } -#endif - - if (localIn.format != ADDR_FMT_INVALID) // Set format to INVALID will skip this conversion - { - // Get compression/expansion factors and element mode - // (which indicates compression/expansion - localIn.bpp = GetElemLib()->GetBitsPerPixel(localIn.format, - &elemMode, - &expandX, - &expandY); - - // Special flag for 96 bit surface. 96 (or 48 if we support) bit surface's width is - // pre-multiplied by 3 and bpp is divided by 3. So pitch alignment for linear- - // aligned does not meet 64-pixel in real. We keep special handling in hwl since hw - // restrictions are different. - // Also Mip 1+ needs an element pitch of 32 bits so we do not need this workaround - // but we use this flag to skip RestoreSurfaceInfo below - - if ((elemMode == ADDR_EXPANDED) && - (expandX > 1)) - { - ADDR_ASSERT(localIn.tileMode == ADDR_TM_LINEAR_ALIGNED || localIn.height == 1); - } - - GetElemLib()->AdjustSurfaceInfo(elemMode, - expandX, - expandY, - &localIn.bpp, - &localIn.basePitch, - &localIn.width, - &localIn.height); - - // Overwrite these parameters if we have a valid format - } - else if (localIn.bpp != 0) - { - localIn.width = (localIn.width != 0) ? localIn.width : 1; - localIn.height = (localIn.height != 0) ? localIn.height : 1; - } - else // Rule out some invalid parameters - { - ADDR_ASSERT_ALWAYS(); - - returnCode = ADDR_INVALIDPARAMS; - } - - // Check mipmap after surface expansion - if (returnCode == ADDR_OK) - { - returnCode = PostComputeMipLevel(&localIn, pOut); - } - - if (returnCode == ADDR_OK) - { - if (UseTileIndex(localIn.tileIndex)) - { - // Make sure pTileInfo is not NULL - ADDR_ASSERT(localIn.pTileInfo); - - UINT_32 numSamples = GetNumFragments(localIn.numSamples, localIn.numFrags); - - INT_32 macroModeIndex = TileIndexNoMacroIndex; - - if (localIn.tileIndex != TileIndexLinearGeneral) - { - // Try finding a macroModeIndex - macroModeIndex = HwlComputeMacroModeIndex(localIn.tileIndex, - localIn.flags, - localIn.bpp, - numSamples, - localIn.pTileInfo, - &localIn.tileMode, - &localIn.tileType); - } - - // If macroModeIndex is not needed, then call HwlSetupTileCfg to get tile info - if (macroModeIndex == TileIndexNoMacroIndex) - { - returnCode = HwlSetupTileCfg(localIn.tileIndex, macroModeIndex, - localIn.pTileInfo, - &localIn.tileMode, &localIn.tileType); - } - // If macroModeIndex is invalid, then assert this is not macro tiled - else if (macroModeIndex == TileIndexInvalid) - { - ADDR_ASSERT(!IsMacroTiled(localIn.tileMode)); - } - } - } - - if (returnCode == ADDR_OK) - { - AddrTileMode tileMode = localIn.tileMode; - AddrTileType tileType = localIn.tileType; - - // HWL layer may override tile mode if necessary - if (HwlOverrideTileMode(&localIn, &tileMode, &tileType)) - { - localIn.tileMode = tileMode; - localIn.tileType = tileType; - } - // Degrade base level if applicable - if (DegradeBaseLevel(&localIn, &tileMode)) - { - localIn.tileMode = tileMode; - } - } - - // Call main function to compute surface info - if (returnCode == ADDR_OK) - { - returnCode = HwlComputeSurfaceInfo(&localIn, pOut); - } - - if (returnCode == ADDR_OK) - { - // Since bpp might be changed we just pass it through - pOut->bpp = localIn.bpp; - - // Also original width/height/bpp - pOut->pixelPitch = pOut->pitch; - pOut->pixelHeight = pOut->height; - -#if DEBUG - if (localIn.flags.display) - { - ADDR_ASSERT((pOut->pitchAlign % 32) == 0); - } -#endif //DEBUG - - if (localIn.format != ADDR_FMT_INVALID) - { - // - // 96 bits surface of level 1+ requires element pitch of 32 bits instead - // In hwl function we skip multiplication of 3 then we should skip division of 3 - // We keep pitch that represents 32 bit element instead of 96 bits since we - // will get an odd number if divided by 3. - // - if (!((expandX == 3) && (localIn.mipLevel > 0))) - { - - GetElemLib()->RestoreSurfaceInfo(elemMode, - expandX, - expandY, - &localIn.bpp, - &pOut->pixelPitch, - &pOut->pixelHeight); - } - } - - if (localIn.flags.qbStereo) - { - if (pOut->pStereoInfo) - { - ComputeQbStereoInfo(pOut); - } - } - - if (localIn.flags.volume) // For volume sliceSize equals to all z-slices - { - pOut->sliceSize = pOut->surfSize; - } - else // For array: sliceSize is likely to have slice-padding (the last one) - { - pOut->sliceSize = pOut->surfSize / pOut->depth; - - // array or cubemap - if (pIn->numSlices > 1) - { - // If this is the last slice then add the padding size to this slice - if (pIn->slice == (pIn->numSlices - 1)) - { - pOut->sliceSize += pOut->sliceSize * (pOut->depth - pIn->numSlices); - } - else if (m_configFlags.checkLast2DLevel) - { - // Reset last2DLevel flag if this is not the last array slice - pOut->last2DLevel = FALSE; - } - } - } - - pOut->pitchTileMax = pOut->pitch / 8 - 1; - pOut->heightTileMax = pOut->height / 8 - 1; - pOut->sliceTileMax = pOut->pitch * pOut->height / 64 - 1; - } - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrLib::ComputeSurfaceInfo -* -* @brief -* Interface function stub of AddrComputeSurfaceInfo. -* -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::ComputeSurfaceAddrFromCoord( - const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure - ) const -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (GetFillSizeFieldsFlags() == TRUE) - { - if ((pIn->size != sizeof(ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT)) || - (pOut->size != sizeof(ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT))) - { - returnCode = ADDR_PARAMSIZEMISMATCH; - } - } - - if (returnCode == ADDR_OK) - { - ADDR_TILEINFO tileInfoNull; - ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT input; - - if (UseTileIndex(pIn->tileIndex)) - { - input = *pIn; - // Use temp tile info for calcalation - input.pTileInfo = &tileInfoNull; - - const ADDR_SURFACE_FLAGS flags = {{0}}; - UINT_32 numSamples = GetNumFragments(pIn->numSamples, pIn->numFrags); - - // Try finding a macroModeIndex - INT_32 macroModeIndex = HwlComputeMacroModeIndex(input.tileIndex, - flags, - input.bpp, - numSamples, - input.pTileInfo, - &input.tileMode, - &input.tileType); - - // If macroModeIndex is not needed, then call HwlSetupTileCfg to get tile info - if (macroModeIndex == TileIndexNoMacroIndex) - { - returnCode = HwlSetupTileCfg(input.tileIndex, macroModeIndex, - input.pTileInfo, &input.tileMode, &input.tileType); - } - // If macroModeIndex is invalid, then assert this is not macro tiled - else if (macroModeIndex == TileIndexInvalid) - { - ADDR_ASSERT(!IsMacroTiled(input.tileMode)); - } - - // Change the input structure - pIn = &input; - } - - if (returnCode == ADDR_OK) - { - returnCode = HwlComputeSurfaceAddrFromCoord(pIn, pOut); - - if (returnCode == ADDR_OK) - { - pOut->prtBlockIndex = static_cast(pOut->addr / (64 * 1024)); - } - } - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrLib::ComputeSurfaceCoordFromAddr -* -* @brief -* Interface function stub of ComputeSurfaceCoordFromAddr. -* -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::ComputeSurfaceCoordFromAddr( - const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure - ) const -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (GetFillSizeFieldsFlags() == TRUE) - { - if ((pIn->size != sizeof(ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT)) || - (pOut->size != sizeof(ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT))) - { - returnCode = ADDR_PARAMSIZEMISMATCH; - } - } - - if (returnCode == ADDR_OK) - { - ADDR_TILEINFO tileInfoNull; - ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT input; - - if (UseTileIndex(pIn->tileIndex)) - { - input = *pIn; - // Use temp tile info for calcalation - input.pTileInfo = &tileInfoNull; - - const ADDR_SURFACE_FLAGS flags = {{0}}; - UINT_32 numSamples = GetNumFragments(pIn->numSamples, pIn->numFrags); - - // Try finding a macroModeIndex - INT_32 macroModeIndex = HwlComputeMacroModeIndex(input.tileIndex, - flags, - input.bpp, - numSamples, - input.pTileInfo, - &input.tileMode, - &input.tileType); - - // If macroModeIndex is not needed, then call HwlSetupTileCfg to get tile info - if (macroModeIndex == TileIndexNoMacroIndex) - { - returnCode = HwlSetupTileCfg(input.tileIndex, macroModeIndex, - input.pTileInfo, &input.tileMode, &input.tileType); - } - // If macroModeIndex is invalid, then assert this is not macro tiled - else if (macroModeIndex == TileIndexInvalid) - { - ADDR_ASSERT(!IsMacroTiled(input.tileMode)); - } - - // Change the input structure - pIn = &input; - } - - if (returnCode == ADDR_OK) - { - returnCode = HwlComputeSurfaceCoordFromAddr(pIn, pOut); - } - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrLib::ComputeSliceTileSwizzle -* -* @brief -* Interface function stub of ComputeSliceTileSwizzle. -* -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::ComputeSliceTileSwizzle( - const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut ///< [out] output structure - ) const -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (GetFillSizeFieldsFlags() == TRUE) - { - if ((pIn->size != sizeof(ADDR_COMPUTE_SLICESWIZZLE_INPUT)) || - (pOut->size != sizeof(ADDR_COMPUTE_SLICESWIZZLE_OUTPUT))) - { - returnCode = ADDR_PARAMSIZEMISMATCH; - } - } - - if (returnCode == ADDR_OK) - { - ADDR_TILEINFO tileInfoNull; - ADDR_COMPUTE_SLICESWIZZLE_INPUT input; - - if (UseTileIndex(pIn->tileIndex)) - { - input = *pIn; - // Use temp tile info for calcalation - input.pTileInfo = &tileInfoNull; - - returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, - input.pTileInfo, &input.tileMode); - // Change the input structure - pIn = &input; - } - - if (returnCode == ADDR_OK) - { - returnCode = HwlComputeSliceTileSwizzle(pIn, pOut); - } - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrLib::ExtractBankPipeSwizzle -* -* @brief -* Interface function stub of AddrExtractBankPipeSwizzle. -* -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::ExtractBankPipeSwizzle( - const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, ///< [in] input structure - ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut ///< [out] output structure - ) const -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (GetFillSizeFieldsFlags() == TRUE) - { - if ((pIn->size != sizeof(ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT)) || - (pOut->size != sizeof(ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT))) - { - returnCode = ADDR_PARAMSIZEMISMATCH; - } - } - - if (returnCode == ADDR_OK) - { - ADDR_TILEINFO tileInfoNull; - ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT input; - - if (UseTileIndex(pIn->tileIndex)) - { - input = *pIn; - // Use temp tile info for calcalation - input.pTileInfo = &tileInfoNull; - - returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo); - // Change the input structure - pIn = &input; - } - - if (returnCode == ADDR_OK) - { - returnCode = HwlExtractBankPipeSwizzle(pIn, pOut); - } - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrLib::CombineBankPipeSwizzle -* -* @brief -* Interface function stub of AddrCombineBankPipeSwizzle. -* -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::CombineBankPipeSwizzle( - const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT* pIn, ///< [in] input structure - ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT* pOut ///< [out] output structure - ) const -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (GetFillSizeFieldsFlags() == TRUE) - { - if ((pIn->size != sizeof(ADDR_COMPUTE_FMASK_INFO_INPUT)) || - (pOut->size != sizeof(ADDR_COMPUTE_FMASK_INFO_OUTPUT))) - { - returnCode = ADDR_PARAMSIZEMISMATCH; - } - } - - if (returnCode == ADDR_OK) - { - ADDR_TILEINFO tileInfoNull; - ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT input; - - if (UseTileIndex(pIn->tileIndex)) - { - input = *pIn; - // Use temp tile info for calcalation - input.pTileInfo = &tileInfoNull; - - returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo); - // Change the input structure - pIn = &input; - } - - if (returnCode == ADDR_OK) - { - returnCode = HwlCombineBankPipeSwizzle(pIn->bankSwizzle, - pIn->pipeSwizzle, - pIn->pTileInfo, - pIn->baseAddr, - &pOut->tileSwizzle); - } - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrLib::ComputeBaseSwizzle -* -* @brief -* Interface function stub of AddrCompueBaseSwizzle. -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::ComputeBaseSwizzle( - const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, - ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (GetFillSizeFieldsFlags() == TRUE) - { - if ((pIn->size != sizeof(ADDR_COMPUTE_BASE_SWIZZLE_INPUT)) || - (pOut->size != sizeof(ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT))) - { - returnCode = ADDR_PARAMSIZEMISMATCH; - } - } - - if (returnCode == ADDR_OK) - { - ADDR_TILEINFO tileInfoNull; - ADDR_COMPUTE_BASE_SWIZZLE_INPUT input; - - if (UseTileIndex(pIn->tileIndex)) - { - input = *pIn; - // Use temp tile info for calcalation - input.pTileInfo = &tileInfoNull; - - returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo); - // Change the input structure - pIn = &input; - } - - if (returnCode == ADDR_OK) - { - if (IsMacroTiled(pIn->tileMode)) - { - returnCode = HwlComputeBaseSwizzle(pIn, pOut); - } - else - { - pOut->tileSwizzle = 0; - } - } - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrLib::ComputeFmaskInfo -* -* @brief -* Interface function stub of ComputeFmaskInfo. -* -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::ComputeFmaskInfo( - const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut ///< [out] output structure - ) -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (GetFillSizeFieldsFlags() == TRUE) - { - if ((pIn->size != sizeof(ADDR_COMPUTE_FMASK_INFO_INPUT)) || - (pOut->size != sizeof(ADDR_COMPUTE_FMASK_INFO_OUTPUT))) - { - returnCode = ADDR_PARAMSIZEMISMATCH; - } - } - - // No thick MSAA - if (ComputeSurfaceThickness(pIn->tileMode) > 1) - { - returnCode = ADDR_INVALIDPARAMS; - } - - if (returnCode == ADDR_OK) - { - ADDR_TILEINFO tileInfoNull; - ADDR_COMPUTE_FMASK_INFO_INPUT input; - - if (UseTileIndex(pIn->tileIndex)) - { - input = *pIn; - - if (pOut->pTileInfo) - { - // Use temp tile info for calcalation - input.pTileInfo = pOut->pTileInfo; - } - else - { - input.pTileInfo = &tileInfoNull; - } - - ADDR_SURFACE_FLAGS flags = {{0}}; - flags.fmask = 1; - - // Try finding a macroModeIndex - INT_32 macroModeIndex = HwlComputeMacroModeIndex(pIn->tileIndex, - flags, - HwlComputeFmaskBits(pIn, NULL), - pIn->numSamples, - input.pTileInfo, - &input.tileMode); - - // If macroModeIndex is not needed, then call HwlSetupTileCfg to get tile info - if (macroModeIndex == TileIndexNoMacroIndex) - { - returnCode = HwlSetupTileCfg(input.tileIndex, macroModeIndex, - input.pTileInfo, &input.tileMode); - } - - ADDR_ASSERT(macroModeIndex != TileIndexInvalid); - - // Change the input structure - pIn = &input; - } - - if (returnCode == ADDR_OK) - { - if (pIn->numSamples > 1) - { - returnCode = HwlComputeFmaskInfo(pIn, pOut); - } - else - { - memset(pOut, 0, sizeof(ADDR_COMPUTE_FMASK_INFO_OUTPUT)); - - returnCode = ADDR_INVALIDPARAMS; - } - } - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrLib::ComputeFmaskAddrFromCoord -* -* @brief -* Interface function stub of ComputeFmaskAddrFromCoord. -* -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::ComputeFmaskAddrFromCoord( - const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure - ) const -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (GetFillSizeFieldsFlags() == TRUE) - { - if ((pIn->size != sizeof(ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT)) || - (pOut->size != sizeof(ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT))) - { - returnCode = ADDR_PARAMSIZEMISMATCH; - } - } - - if (returnCode == ADDR_OK) - { - ADDR_ASSERT(pIn->numSamples > 1); - - if (pIn->numSamples > 1) - { - returnCode = HwlComputeFmaskAddrFromCoord(pIn, pOut); - } - else - { - returnCode = ADDR_INVALIDPARAMS; - } - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrLib::ComputeFmaskCoordFromAddr -* -* @brief -* Interface function stub of ComputeFmaskAddrFromCoord. -* -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::ComputeFmaskCoordFromAddr( - const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure - ) const -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (GetFillSizeFieldsFlags() == TRUE) - { - if ((pIn->size != sizeof(ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT)) || - (pOut->size != sizeof(ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT))) - { - returnCode = ADDR_PARAMSIZEMISMATCH; - } - } - - if (returnCode == ADDR_OK) - { - ADDR_ASSERT(pIn->numSamples > 1); - - if (pIn->numSamples > 1) - { - returnCode = HwlComputeFmaskCoordFromAddr(pIn, pOut); - } - else - { - returnCode = ADDR_INVALIDPARAMS; - } - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrLib::ConvertTileInfoToHW -* -* @brief -* Convert tile info from real value to HW register value in HW layer -* -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::ConvertTileInfoToHW( - const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, ///< [in] input structure - ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut ///< [out] output structure - ) const -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (GetFillSizeFieldsFlags() == TRUE) - { - if ((pIn->size != sizeof(ADDR_CONVERT_TILEINFOTOHW_INPUT)) || - (pOut->size != sizeof(ADDR_CONVERT_TILEINFOTOHW_OUTPUT))) - { - returnCode = ADDR_PARAMSIZEMISMATCH; - } - } - - if (returnCode == ADDR_OK) - { - ADDR_TILEINFO tileInfoNull; - ADDR_CONVERT_TILEINFOTOHW_INPUT input; - // if pIn->reverse is TRUE, indices are ignored - if (pIn->reverse == FALSE && UseTileIndex(pIn->tileIndex)) - { - input = *pIn; - input.pTileInfo = &tileInfoNull; - - returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo); - - pIn = &input; - } - - if (returnCode == ADDR_OK) - { - returnCode = HwlConvertTileInfoToHW(pIn, pOut); - } - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrLib::ConvertTileIndex -* -* @brief -* Convert tile index to tile mode/type/info -* -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::ConvertTileIndex( - const ADDR_CONVERT_TILEINDEX_INPUT* pIn, ///< [in] input structure - ADDR_CONVERT_TILEINDEX_OUTPUT* pOut ///< [out] output structure - ) const -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (GetFillSizeFieldsFlags() == TRUE) - { - if ((pIn->size != sizeof(ADDR_CONVERT_TILEINDEX_INPUT)) || - (pOut->size != sizeof(ADDR_CONVERT_TILEINDEX_OUTPUT))) - { - returnCode = ADDR_PARAMSIZEMISMATCH; - } - } - - if (returnCode == ADDR_OK) - { - - returnCode = HwlSetupTileCfg(pIn->tileIndex, pIn->macroModeIndex, - pOut->pTileInfo, &pOut->tileMode, &pOut->tileType); - - if (returnCode == ADDR_OK && pIn->tileInfoHw) - { - ADDR_CONVERT_TILEINFOTOHW_INPUT hwInput = {0}; - ADDR_CONVERT_TILEINFOTOHW_OUTPUT hwOutput = {0}; - - hwInput.pTileInfo = pOut->pTileInfo; - hwInput.tileIndex = -1; - hwOutput.pTileInfo = pOut->pTileInfo; - - returnCode = HwlConvertTileInfoToHW(&hwInput, &hwOutput); - } - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrLib::ConvertTileIndex1 -* -* @brief -* Convert tile index to tile mode/type/info -* -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::ConvertTileIndex1( - const ADDR_CONVERT_TILEINDEX1_INPUT* pIn, ///< [in] input structure - ADDR_CONVERT_TILEINDEX_OUTPUT* pOut ///< [out] output structure - ) const -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (GetFillSizeFieldsFlags() == TRUE) - { - if ((pIn->size != sizeof(ADDR_CONVERT_TILEINDEX1_INPUT)) || - (pOut->size != sizeof(ADDR_CONVERT_TILEINDEX_OUTPUT))) - { - returnCode = ADDR_PARAMSIZEMISMATCH; - } - } - - if (returnCode == ADDR_OK) - { - ADDR_SURFACE_FLAGS flags = {{0}}; - - HwlComputeMacroModeIndex(pIn->tileIndex, flags, pIn->bpp, pIn->numSamples, - pOut->pTileInfo, &pOut->tileMode, &pOut->tileType); - - if (pIn->tileInfoHw) - { - ADDR_CONVERT_TILEINFOTOHW_INPUT hwInput = {0}; - ADDR_CONVERT_TILEINFOTOHW_OUTPUT hwOutput = {0}; - - hwInput.pTileInfo = pOut->pTileInfo; - hwInput.tileIndex = -1; - hwOutput.pTileInfo = pOut->pTileInfo; - - returnCode = HwlConvertTileInfoToHW(&hwInput, &hwOutput); - } - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrLib::GetTileIndex -* -* @brief -* Get tile index from tile mode/type/info -* -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::GetTileIndex( - const ADDR_GET_TILEINDEX_INPUT* pIn, ///< [in] input structure - ADDR_GET_TILEINDEX_OUTPUT* pOut ///< [out] output structure - ) const -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (GetFillSizeFieldsFlags() == TRUE) - { - if ((pIn->size != sizeof(ADDR_GET_TILEINDEX_INPUT)) || - (pOut->size != sizeof(ADDR_GET_TILEINDEX_OUTPUT))) - { - returnCode = ADDR_PARAMSIZEMISMATCH; - } - } - - if (returnCode == ADDR_OK) - { - returnCode = HwlGetTileIndex(pIn, pOut); - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrLib::ComputeSurfaceThickness -* -* @brief -* Compute surface thickness -* -* @return -* Surface thickness -*************************************************************************************************** -*/ -UINT_32 AddrLib::ComputeSurfaceThickness( - AddrTileMode tileMode) ///< [in] tile mode -{ - return m_modeFlags[tileMode].thickness; -} - - - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// CMASK/HTILE -/////////////////////////////////////////////////////////////////////////////////////////////////// - -/** -*************************************************************************************************** -* AddrLib::ComputeHtileInfo -* -* @brief -* Interface function stub of AddrComputeHtilenfo -* -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::ComputeHtileInfo( - const ADDR_COMPUTE_HTILE_INFO_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_HTILE_INFO_OUTPUT* pOut ///< [out] output structure - ) const -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - BOOL_32 isWidth8 = (pIn->blockWidth == 8) ? TRUE : FALSE; - BOOL_32 isHeight8 = (pIn->blockHeight == 8) ? TRUE : FALSE; - - if (GetFillSizeFieldsFlags() == TRUE) - { - if ((pIn->size != sizeof(ADDR_COMPUTE_HTILE_INFO_INPUT)) || - (pOut->size != sizeof(ADDR_COMPUTE_HTILE_INFO_OUTPUT))) - { - returnCode = ADDR_PARAMSIZEMISMATCH; - } - } - - if (returnCode == ADDR_OK) - { - ADDR_TILEINFO tileInfoNull; - ADDR_COMPUTE_HTILE_INFO_INPUT input; - - if (UseTileIndex(pIn->tileIndex)) - { - input = *pIn; - // Use temp tile info for calcalation - input.pTileInfo = &tileInfoNull; - - returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo); - - // Change the input structure - pIn = &input; - } - - if (returnCode == ADDR_OK) - { - pOut->bpp = ComputeHtileInfo(pIn->flags, - pIn->pitch, - pIn->height, - pIn->numSlices, - pIn->isLinear, - isWidth8, - isHeight8, - pIn->pTileInfo, - &pOut->pitch, - &pOut->height, - &pOut->htileBytes, - &pOut->macroWidth, - &pOut->macroHeight, - &pOut->sliceSize, - &pOut->baseAlign); - } - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrLib::ComputeCmaskInfo -* -* @brief -* Interface function stub of AddrComputeCmaskInfo -* -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::ComputeCmaskInfo( - const ADDR_COMPUTE_CMASK_INFO_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_CMASK_INFO_OUTPUT* pOut ///< [out] output structure - ) const -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (GetFillSizeFieldsFlags() == TRUE) - { - if ((pIn->size != sizeof(ADDR_COMPUTE_CMASK_INFO_INPUT)) || - (pOut->size != sizeof(ADDR_COMPUTE_CMASK_INFO_OUTPUT))) - { - returnCode = ADDR_PARAMSIZEMISMATCH; - } - } - - if (returnCode == ADDR_OK) - { - ADDR_TILEINFO tileInfoNull; - ADDR_COMPUTE_CMASK_INFO_INPUT input; - - if (UseTileIndex(pIn->tileIndex)) - { - input = *pIn; - // Use temp tile info for calcalation - input.pTileInfo = &tileInfoNull; - - returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo); - - // Change the input structure - pIn = &input; - } - - if (returnCode == ADDR_OK) - { - returnCode = ComputeCmaskInfo(pIn->flags, - pIn->pitch, - pIn->height, - pIn->numSlices, - pIn->isLinear, - pIn->pTileInfo, - &pOut->pitch, - &pOut->height, - &pOut->cmaskBytes, - &pOut->macroWidth, - &pOut->macroHeight, - &pOut->sliceSize, - &pOut->baseAlign, - &pOut->blockMax); - } - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrLib::ComputeDccInfo -* -* @brief -* Interface function to compute DCC key info -* -* @return -* return code of HwlComputeDccInfo -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::ComputeDccInfo( - const ADDR_COMPUTE_DCCINFO_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_DCCINFO_OUTPUT* pOut ///< [out] output structure - ) const -{ - ADDR_E_RETURNCODE ret = ADDR_OK; - - if (GetFillSizeFieldsFlags() == TRUE) - { - if ((pIn->size != sizeof(ADDR_COMPUTE_DCCINFO_INPUT)) || - (pOut->size != sizeof(ADDR_COMPUTE_DCCINFO_OUTPUT))) - { - ret = ADDR_PARAMSIZEMISMATCH; - } - } - - if (ret == ADDR_OK) - { - ADDR_COMPUTE_DCCINFO_INPUT input; - - if (UseTileIndex(pIn->tileIndex)) - { - input = *pIn; - - ret = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, - &input.tileInfo, &input.tileMode); - - pIn = &input; - } - - if (ADDR_OK == ret) - { - ret = HwlComputeDccInfo(pIn, pOut); - } - } - - return ret; -} - -/** -*************************************************************************************************** -* AddrLib::ComputeHtileAddrFromCoord -* -* @brief -* Interface function stub of AddrComputeHtileAddrFromCoord -* -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::ComputeHtileAddrFromCoord( - const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure - ) const -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - BOOL_32 isWidth8 = (pIn->blockWidth == 8) ? TRUE : FALSE; - BOOL_32 isHeight8 = (pIn->blockHeight == 8) ? TRUE : FALSE; - - if (GetFillSizeFieldsFlags() == TRUE) - { - if ((pIn->size != sizeof(ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT)) || - (pOut->size != sizeof(ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT))) - { - returnCode = ADDR_PARAMSIZEMISMATCH; - } - } - - if (returnCode == ADDR_OK) - { - ADDR_TILEINFO tileInfoNull; - ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT input; - - if (UseTileIndex(pIn->tileIndex)) - { - input = *pIn; - // Use temp tile info for calcalation - input.pTileInfo = &tileInfoNull; - - returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo); - - // Change the input structure - pIn = &input; - } - - if (returnCode == ADDR_OK) - { - pOut->addr = HwlComputeXmaskAddrFromCoord(pIn->pitch, - pIn->height, - pIn->x, - pIn->y, - pIn->slice, - pIn->numSlices, - 1, - pIn->isLinear, - isWidth8, - isHeight8, - pIn->pTileInfo, - &pOut->bitPosition); - } - } - - return returnCode; - -} - -/** -*************************************************************************************************** -* AddrLib::ComputeHtileCoordFromAddr -* -* @brief -* Interface function stub of AddrComputeHtileCoordFromAddr -* -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::ComputeHtileCoordFromAddr( - const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure - ) const -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - BOOL_32 isWidth8 = (pIn->blockWidth == 8) ? TRUE : FALSE; - BOOL_32 isHeight8 = (pIn->blockHeight == 8) ? TRUE : FALSE; - - if (GetFillSizeFieldsFlags() == TRUE) - { - if ((pIn->size != sizeof(ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT)) || - (pOut->size != sizeof(ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT))) - { - returnCode = ADDR_PARAMSIZEMISMATCH; - } - } - - if (returnCode == ADDR_OK) - { - ADDR_TILEINFO tileInfoNull; - ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT input; - - if (UseTileIndex(pIn->tileIndex)) - { - input = *pIn; - // Use temp tile info for calcalation - input.pTileInfo = &tileInfoNull; - - returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo); - - // Change the input structure - pIn = &input; - } - - if (returnCode == ADDR_OK) - { - HwlComputeXmaskCoordFromAddr(pIn->addr, - pIn->bitPosition, - pIn->pitch, - pIn->height, - pIn->numSlices, - 1, - pIn->isLinear, - isWidth8, - isHeight8, - pIn->pTileInfo, - &pOut->x, - &pOut->y, - &pOut->slice); - } - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrLib::ComputeCmaskAddrFromCoord -* -* @brief -* Interface function stub of AddrComputeCmaskAddrFromCoord -* -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::ComputeCmaskAddrFromCoord( - const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure - ) const -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (GetFillSizeFieldsFlags() == TRUE) - { - if ((pIn->size != sizeof(ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT)) || - (pOut->size != sizeof(ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT))) - { - returnCode = ADDR_PARAMSIZEMISMATCH; - } - } - - if (returnCode == ADDR_OK) - { - ADDR_TILEINFO tileInfoNull; - ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT input; - - if (UseTileIndex(pIn->tileIndex)) - { - input = *pIn; - // Use temp tile info for calcalation - input.pTileInfo = &tileInfoNull; - - returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo); - - // Change the input structure - pIn = &input; - } - - if (returnCode == ADDR_OK) - { - if (pIn->flags.tcCompatible == TRUE) - { - returnCode = HwlComputeCmaskAddrFromCoord(pIn, pOut); - } - else - { - pOut->addr = HwlComputeXmaskAddrFromCoord(pIn->pitch, - pIn->height, - pIn->x, - pIn->y, - pIn->slice, - pIn->numSlices, - 2, - pIn->isLinear, - FALSE, //this is cmask, isWidth8 is not needed - FALSE, //this is cmask, isHeight8 is not needed - pIn->pTileInfo, - &pOut->bitPosition); - } - - } - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrLib::ComputeCmaskCoordFromAddr -* -* @brief -* Interface function stub of AddrComputeCmaskCoordFromAddr -* -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::ComputeCmaskCoordFromAddr( - const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure - ) const -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (GetFillSizeFieldsFlags() == TRUE) - { - if ((pIn->size != sizeof(ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT)) || - (pOut->size != sizeof(ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT))) - { - returnCode = ADDR_PARAMSIZEMISMATCH; - } - } - - if (returnCode == ADDR_OK) - { - ADDR_TILEINFO tileInfoNull; - ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT input; - - if (UseTileIndex(pIn->tileIndex)) - { - input = *pIn; - // Use temp tile info for calcalation - input.pTileInfo = &tileInfoNull; - - returnCode = HwlSetupTileCfg(input.tileIndex, input.macroModeIndex, input.pTileInfo); - - // Change the input structure - pIn = &input; - } - - if (returnCode == ADDR_OK) - { - HwlComputeXmaskCoordFromAddr(pIn->addr, - pIn->bitPosition, - pIn->pitch, - pIn->height, - pIn->numSlices, - 2, - pIn->isLinear, - FALSE, - FALSE, - pIn->pTileInfo, - &pOut->x, - &pOut->y, - &pOut->slice); - } - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrLib::ComputeTileDataWidthAndHeight -* -* @brief -* Compute the squared cache shape for per-tile data (CMASK and HTILE) -* -* @return -* N/A -* -* @note -* MacroWidth and macroHeight are measured in pixels -*************************************************************************************************** -*/ -VOID AddrLib::ComputeTileDataWidthAndHeight( - UINT_32 bpp, ///< [in] bits per pixel - UINT_32 cacheBits, ///< [in] bits of cache - ADDR_TILEINFO* pTileInfo, ///< [in] Tile info - UINT_32* pMacroWidth, ///< [out] macro tile width - UINT_32* pMacroHeight ///< [out] macro tile height - ) const -{ - UINT_32 height = 1; - UINT_32 width = cacheBits / bpp; - UINT_32 pipes = HwlGetPipes(pTileInfo); - - // Double height until the macro-tile is close to square - // Height can only be doubled if width is even - - while ((width > height * 2 * pipes) && !(width & 1)) - { - width /= 2; - height *= 2; - } - - *pMacroWidth = 8 * width; - *pMacroHeight = 8 * height * pipes; - - // Note: The above iterative comptuation is equivalent to the following - // - //int log2_height = ((log2(cacheBits)-log2(bpp)-log2(pipes))/2); - //int macroHeight = pow2( 3+log2(pipes)+log2_height ); -} - -/** -*************************************************************************************************** -* AddrLib::HwlComputeTileDataWidthAndHeightLinear -* -* @brief -* Compute the squared cache shape for per-tile data (CMASK and HTILE) for linear layout -* -* @return -* N/A -* -* @note -* MacroWidth and macroHeight are measured in pixels -*************************************************************************************************** -*/ -VOID AddrLib::HwlComputeTileDataWidthAndHeightLinear( - UINT_32* pMacroWidth, ///< [out] macro tile width - UINT_32* pMacroHeight, ///< [out] macro tile height - UINT_32 bpp, ///< [in] bits per pixel - ADDR_TILEINFO* pTileInfo ///< [in] tile info - ) const -{ - ADDR_ASSERT(bpp != 4); // Cmask does not support linear layout prior to SI - *pMacroWidth = 8 * 512 / bpp; // Align width to 512-bit memory accesses - *pMacroHeight = 8 * m_pipes; // Align height to number of pipes -} - -/** -*************************************************************************************************** -* AddrLib::ComputeHtileInfo -* -* @brief -* Compute htile pitch,width, bytes per 2D slice -* -* @return -* Htile bpp i.e. How many bits for an 8x8 tile -* Also returns by output parameters: -* *Htile pitch, height, total size in bytes, macro-tile dimensions and slice size* -*************************************************************************************************** -*/ -UINT_32 AddrLib::ComputeHtileInfo( - ADDR_HTILE_FLAGS flags, ///< [in] htile flags - UINT_32 pitchIn, ///< [in] pitch input - UINT_32 heightIn, ///< [in] height input - UINT_32 numSlices, ///< [in] number of slices - BOOL_32 isLinear, ///< [in] if it is linear mode - BOOL_32 isWidth8, ///< [in] if htile block width is 8 - BOOL_32 isHeight8, ///< [in] if htile block height is 8 - ADDR_TILEINFO* pTileInfo, ///< [in] Tile info - UINT_32* pPitchOut, ///< [out] pitch output - UINT_32* pHeightOut, ///< [out] height output - UINT_64* pHtileBytes, ///< [out] bytes per 2D slice - UINT_32* pMacroWidth, ///< [out] macro-tile width in pixels - UINT_32* pMacroHeight, ///< [out] macro-tile width in pixels - UINT_64* pSliceSize, ///< [out] slice size in bytes - UINT_32* pBaseAlign ///< [out] base alignment - ) const -{ - - UINT_32 macroWidth; - UINT_32 macroHeight; - UINT_32 baseAlign; - UINT_64 surfBytes; - UINT_64 sliceBytes; - - numSlices = Max(1u, numSlices); - - const UINT_32 bpp = HwlComputeHtileBpp(isWidth8, isHeight8); - const UINT_32 cacheBits = HtileCacheBits; - - if (isLinear) - { - HwlComputeTileDataWidthAndHeightLinear(¯oWidth, - ¯oHeight, - bpp, - pTileInfo); - } - else - { - ComputeTileDataWidthAndHeight(bpp, - cacheBits, - pTileInfo, - ¯oWidth, - ¯oHeight); - } - - *pPitchOut = PowTwoAlign(pitchIn, macroWidth); - *pHeightOut = PowTwoAlign(heightIn, macroHeight); - - baseAlign = HwlComputeHtileBaseAlign(flags.tcCompatible, isLinear, pTileInfo); - - surfBytes = HwlComputeHtileBytes(*pPitchOut, - *pHeightOut, - bpp, - isLinear, - numSlices, - &sliceBytes, - baseAlign); - - *pHtileBytes = surfBytes; - - // - // Use SafeAssign since they are optional - // - SafeAssign(pMacroWidth, macroWidth); - - SafeAssign(pMacroHeight, macroHeight); - - SafeAssign(pSliceSize, sliceBytes); - - SafeAssign(pBaseAlign, baseAlign); - - return bpp; -} - -/** -*************************************************************************************************** -* AddrLib::ComputeCmaskBaseAlign -* -* @brief -* Compute cmask base alignment -* -* @return -* Cmask base alignment -*************************************************************************************************** -*/ -UINT_32 AddrLib::ComputeCmaskBaseAlign( - ADDR_CMASK_FLAGS flags, ///< [in] Cmask flags - ADDR_TILEINFO* pTileInfo ///< [in] Tile info - ) const -{ - UINT_32 baseAlign = m_pipeInterleaveBytes * HwlGetPipes(pTileInfo); - - if (flags.tcCompatible) - { - ADDR_ASSERT(pTileInfo != NULL); - if (pTileInfo) - { - baseAlign *= pTileInfo->banks; - } - } - - return baseAlign; -} - -/** -*************************************************************************************************** -* AddrLib::ComputeCmaskBytes -* -* @brief -* Compute cmask size in bytes -* -* @return -* Cmask size in bytes -*************************************************************************************************** -*/ -UINT_64 AddrLib::ComputeCmaskBytes( - UINT_32 pitch, ///< [in] pitch - UINT_32 height, ///< [in] height - UINT_32 numSlices ///< [in] number of slices - ) const -{ - return BITS_TO_BYTES(static_cast(pitch) * height * numSlices * CmaskElemBits) / - MicroTilePixels; -} - -/** -*************************************************************************************************** -* AddrLib::ComputeCmaskInfo -* -* @brief -* Compute cmask pitch,width, bytes per 2D slice -* -* @return -* BlockMax. Also by output parameters: Cmask pitch,height, total size in bytes, -* macro-tile dimensions -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::ComputeCmaskInfo( - ADDR_CMASK_FLAGS flags, ///< [in] cmask flags - UINT_32 pitchIn, ///< [in] pitch input - UINT_32 heightIn, ///< [in] height input - UINT_32 numSlices, ///< [in] number of slices - BOOL_32 isLinear, ///< [in] is linear mode - ADDR_TILEINFO* pTileInfo, ///< [in] Tile info - UINT_32* pPitchOut, ///< [out] pitch output - UINT_32* pHeightOut, ///< [out] height output - UINT_64* pCmaskBytes, ///< [out] bytes per 2D slice - UINT_32* pMacroWidth, ///< [out] macro-tile width in pixels - UINT_32* pMacroHeight, ///< [out] macro-tile width in pixels - UINT_64* pSliceSize, ///< [out] slice size in bytes - UINT_32* pBaseAlign, ///< [out] base alignment - UINT_32* pBlockMax ///< [out] block max == slice / 128 / 128 - 1 - ) const -{ - UINT_32 macroWidth; - UINT_32 macroHeight; - UINT_32 baseAlign; - UINT_64 surfBytes; - UINT_64 sliceBytes; - - numSlices = Max(1u, numSlices); - - const UINT_32 bpp = CmaskElemBits; - const UINT_32 cacheBits = CmaskCacheBits; - - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (isLinear) - { - HwlComputeTileDataWidthAndHeightLinear(¯oWidth, - ¯oHeight, - bpp, - pTileInfo); - } - else - { - ComputeTileDataWidthAndHeight(bpp, - cacheBits, - pTileInfo, - ¯oWidth, - ¯oHeight); - } - - *pPitchOut = (pitchIn + macroWidth - 1) & ~(macroWidth - 1); - *pHeightOut = (heightIn + macroHeight - 1) & ~(macroHeight - 1); - - - sliceBytes = ComputeCmaskBytes(*pPitchOut, - *pHeightOut, - 1); - - baseAlign = ComputeCmaskBaseAlign(flags, pTileInfo); - - while (sliceBytes % baseAlign) - { - *pHeightOut += macroHeight; - - sliceBytes = ComputeCmaskBytes(*pPitchOut, - *pHeightOut, - 1); - } - - surfBytes = sliceBytes * numSlices; - - *pCmaskBytes = surfBytes; - - // - // Use SafeAssign since they are optional - // - SafeAssign(pMacroWidth, macroWidth); - - SafeAssign(pMacroHeight, macroHeight); - - SafeAssign(pBaseAlign, baseAlign); - - SafeAssign(pSliceSize, sliceBytes); - - UINT_32 slice = (*pPitchOut) * (*pHeightOut); - UINT_32 blockMax = slice / 128 / 128 - 1; - -#if DEBUG - if (slice % (64*256) != 0) - { - ADDR_ASSERT_ALWAYS(); - } -#endif //DEBUG - - UINT_32 maxBlockMax = HwlGetMaxCmaskBlockMax(); - - if (blockMax > maxBlockMax) - { - blockMax = maxBlockMax; - returnCode = ADDR_INVALIDPARAMS; - } - - SafeAssign(pBlockMax, blockMax); - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrLib::ComputeXmaskCoordYFromPipe -* -* @brief -* Compute the Y coord from pipe number for cmask/htile -* -* @return -* Y coordinate -* -*************************************************************************************************** -*/ -UINT_32 AddrLib::ComputeXmaskCoordYFromPipe( - UINT_32 pipe, ///< [in] pipe number - UINT_32 x ///< [in] x coordinate - ) const -{ - UINT_32 pipeBit0; - UINT_32 pipeBit1; - UINT_32 xBit0; - UINT_32 xBit1; - UINT_32 yBit0; - UINT_32 yBit1; - - UINT_32 y = 0; - - UINT_32 numPipes = m_pipes; // SI has its implementation - // - // Convert pipe + x to y coordinate. - // - switch (numPipes) - { - case 1: - // - // 1 pipe - // - // p0 = 0 - // - y = 0; - break; - case 2: - // - // 2 pipes - // - // p0 = x0 ^ y0 - // - // y0 = p0 ^ x0 - // - pipeBit0 = pipe & 0x1; - - xBit0 = x & 0x1; - - yBit0 = pipeBit0 ^ xBit0; - - y = yBit0; - break; - case 4: - // - // 4 pipes - // - // p0 = x1 ^ y0 - // p1 = x0 ^ y1 - // - // y0 = p0 ^ x1 - // y1 = p1 ^ x0 - // - pipeBit0 = pipe & 0x1; - pipeBit1 = (pipe & 0x2) >> 1; - - xBit0 = x & 0x1; - xBit1 = (x & 0x2) >> 1; - - yBit0 = pipeBit0 ^ xBit1; - yBit1 = pipeBit1 ^ xBit0; - - y = (yBit0 | - (yBit1 << 1)); - break; - case 8: - // - // 8 pipes - // - // r600 and r800 have different method - // - y = HwlComputeXmaskCoordYFrom8Pipe(pipe, x); - break; - default: - break; - } - return y; -} - -/** -*************************************************************************************************** -* AddrLib::HwlComputeXmaskCoordFromAddr -* -* @brief -* Compute the coord from an address of a cmask/htile -* -* @return -* N/A -* -* @note -* This method is reused by htile, so rename to Xmask -*************************************************************************************************** -*/ -VOID AddrLib::HwlComputeXmaskCoordFromAddr( - UINT_64 addr, ///< [in] address - UINT_32 bitPosition, ///< [in] bitPosition in a byte - UINT_32 pitch, ///< [in] pitch - UINT_32 height, ///< [in] height - UINT_32 numSlices, ///< [in] number of slices - UINT_32 factor, ///< [in] factor that indicates cmask or htile - BOOL_32 isLinear, ///< [in] linear or tiled HTILE layout - BOOL_32 isWidth8, ///< [in] TRUE if width is 8, FALSE means 4. It's register value - BOOL_32 isHeight8, ///< [in] TRUE if width is 8, FALSE means 4. It's register value - ADDR_TILEINFO* pTileInfo, ///< [in] Tile info - UINT_32* pX, ///< [out] x coord - UINT_32* pY, ///< [out] y coord - UINT_32* pSlice ///< [out] slice index - ) const -{ - UINT_32 pipe; - UINT_32 numPipes; - UINT_32 numPipeBits; - UINT_32 macroTilePitch; - UINT_32 macroTileHeight; - - UINT_64 bitAddr; - - UINT_32 microTileCoordY; - - UINT_32 elemBits; - - UINT_32 pitchAligned = pitch; - UINT_32 heightAligned = height; - UINT_64 totalBytes; - - UINT_64 elemOffset; - - UINT_64 macroIndex; - UINT_32 microIndex; - - UINT_64 macroNumber; - UINT_32 microNumber; - - UINT_32 macroX; - UINT_32 macroY; - UINT_32 macroZ; - - UINT_32 microX; - UINT_32 microY; - - UINT_32 tilesPerMacro; - UINT_32 macrosPerPitch; - UINT_32 macrosPerSlice; - - // - // Extract pipe. - // - numPipes = HwlGetPipes(pTileInfo); - pipe = ComputePipeFromAddr(addr, numPipes); - - // - // Compute the number of group and pipe bits. - // - numPipeBits = Log2(numPipes); - - UINT_32 groupBits = 8 * m_pipeInterleaveBytes; - UINT_32 pipes = numPipes; - - - // - // Compute the micro tile size, in bits. And macro tile pitch and height. - // - if (factor == 2) //CMASK - { - ADDR_CMASK_FLAGS flags = {{0}}; - - elemBits = CmaskElemBits; - - ComputeCmaskInfo(flags, - pitch, - height, - numSlices, - isLinear, - pTileInfo, - &pitchAligned, - &heightAligned, - &totalBytes, - ¯oTilePitch, - ¯oTileHeight); - } - else //HTILE - { - ADDR_HTILE_FLAGS flags = {{0}}; - - if (factor != 1) - { - factor = 1; - } - - elemBits = HwlComputeHtileBpp(isWidth8, isHeight8); - - ComputeHtileInfo(flags, - pitch, - height, - numSlices, - isLinear, - isWidth8, - isHeight8, - pTileInfo, - &pitchAligned, - &heightAligned, - &totalBytes, - ¯oTilePitch, - ¯oTileHeight); - } - - // Should use aligned dims - // - pitch = pitchAligned; - height = heightAligned; - - - // - // Convert byte address to bit address. - // - bitAddr = BYTES_TO_BITS(addr) + bitPosition; - - - // - // Remove pipe bits from address. - // - - bitAddr = (bitAddr % groupBits) + ((bitAddr/groupBits/pipes)*groupBits); - - - elemOffset = bitAddr / elemBits; - - tilesPerMacro = (macroTilePitch/factor) * macroTileHeight / MicroTilePixels >> numPipeBits; - - macrosPerPitch = pitch / (macroTilePitch/factor); - macrosPerSlice = macrosPerPitch * height / macroTileHeight; - - macroIndex = elemOffset / factor / tilesPerMacro; - microIndex = static_cast(elemOffset % (tilesPerMacro * factor)); - - macroNumber = macroIndex * factor + microIndex % factor; - microNumber = microIndex / factor; - - macroX = static_cast((macroNumber % macrosPerPitch)); - macroY = static_cast((macroNumber % macrosPerSlice) / macrosPerPitch); - macroZ = static_cast((macroNumber / macrosPerSlice)); - - - microX = microNumber % (macroTilePitch / factor / MicroTileWidth); - microY = (microNumber / (macroTilePitch / factor / MicroTileHeight)); - - *pX = macroX * (macroTilePitch/factor) + microX * MicroTileWidth; - *pY = macroY * macroTileHeight + (microY * MicroTileHeight << numPipeBits); - *pSlice = macroZ; - - microTileCoordY = ComputeXmaskCoordYFromPipe(pipe, - *pX/MicroTileWidth); - - - // - // Assemble final coordinates. - // - *pY += microTileCoordY * MicroTileHeight; - -} - -/** -*************************************************************************************************** -* AddrLib::HwlComputeXmaskAddrFromCoord -* -* @brief -* Compute the address from an address of cmask (prior to si) -* -* @return -* Address in bytes -* -*************************************************************************************************** -*/ -UINT_64 AddrLib::HwlComputeXmaskAddrFromCoord( - UINT_32 pitch, ///< [in] pitch - UINT_32 height, ///< [in] height - UINT_32 x, ///< [in] x coord - UINT_32 y, ///< [in] y coord - UINT_32 slice, ///< [in] slice/depth index - UINT_32 numSlices, ///< [in] number of slices - UINT_32 factor, ///< [in] factor that indicates cmask(2) or htile(1) - BOOL_32 isLinear, ///< [in] linear or tiled HTILE layout - BOOL_32 isWidth8, ///< [in] TRUE if width is 8, FALSE means 4. It's register value - BOOL_32 isHeight8, ///< [in] TRUE if width is 8, FALSE means 4. It's register value - ADDR_TILEINFO* pTileInfo, ///< [in] Tile info - UINT_32* pBitPosition ///< [out] bit position inside a byte - ) const -{ - UINT_64 addr; - UINT_32 numGroupBits; - UINT_32 numPipeBits; - UINT_32 newPitch = 0; - UINT_32 newHeight = 0; - UINT_64 sliceBytes = 0; - UINT_64 totalBytes = 0; - UINT_64 sliceOffset; - UINT_32 pipe; - UINT_32 macroTileWidth; - UINT_32 macroTileHeight; - UINT_32 macroTilesPerRow; - UINT_32 macroTileBytes; - UINT_32 macroTileIndexX; - UINT_32 macroTileIndexY; - UINT_64 macroTileOffset; - UINT_32 pixelBytesPerRow; - UINT_32 pixelOffsetX; - UINT_32 pixelOffsetY; - UINT_32 pixelOffset; - UINT_64 totalOffset; - UINT_64 offsetLo; - UINT_64 offsetHi; - UINT_64 groupMask; - - - UINT_32 elemBits = 0; - - UINT_32 numPipes = m_pipes; // This function is accessed prior to si only - - if (factor == 2) //CMASK - { - elemBits = CmaskElemBits; - - // For asics before SI, cmask is always tiled - isLinear = FALSE; - } - else //HTILE - { - if (factor != 1) // Fix compile warning - { - factor = 1; - } - - elemBits = HwlComputeHtileBpp(isWidth8, isHeight8); - } - - // - // Compute the number of group bits and pipe bits. - // - numGroupBits = Log2(m_pipeInterleaveBytes); - numPipeBits = Log2(numPipes); - - // - // Compute macro tile dimensions. - // - if (factor == 2) // CMASK - { - ADDR_CMASK_FLAGS flags = {{0}}; - - ComputeCmaskInfo(flags, - pitch, - height, - numSlices, - isLinear, - pTileInfo, - &newPitch, - &newHeight, - &totalBytes, - ¯oTileWidth, - ¯oTileHeight); - - sliceBytes = totalBytes / numSlices; - } - else // HTILE - { - ADDR_HTILE_FLAGS flags = {{0}}; - - ComputeHtileInfo(flags, - pitch, - height, - numSlices, - isLinear, - isWidth8, - isHeight8, - pTileInfo, - &newPitch, - &newHeight, - &totalBytes, - ¯oTileWidth, - ¯oTileHeight, - &sliceBytes); - } - - sliceOffset = slice * sliceBytes; - - // - // Get the pipe. Note that neither slice rotation nor pipe swizzling apply for CMASK. - // - pipe = ComputePipeFromCoord(x, - y, - 0, - ADDR_TM_2D_TILED_THIN1, - 0, - FALSE, - pTileInfo); - - // - // Compute the number of macro tiles per row. - // - macroTilesPerRow = newPitch / macroTileWidth; - - // - // Compute the number of bytes per macro tile. - // - macroTileBytes = BITS_TO_BYTES((macroTileWidth * macroTileHeight * elemBits) / MicroTilePixels); - - // - // Compute the offset to the macro tile containing the specified coordinate. - // - macroTileIndexX = x / macroTileWidth; - macroTileIndexY = y / macroTileHeight; - macroTileOffset = ((macroTileIndexY * macroTilesPerRow) + macroTileIndexX) * macroTileBytes; - - // - // Compute the pixel offset within the macro tile. - // - pixelBytesPerRow = BITS_TO_BYTES(macroTileWidth * elemBits) / MicroTileWidth; - - // - // The nibbles are interleaved (see below), so the part of the offset relative to the x - // coordinate repeats halfway across the row. (Not for HTILE) - // - if (factor == 2) - { - pixelOffsetX = (x % (macroTileWidth / 2)) / MicroTileWidth; - } - else - { - pixelOffsetX = (x % (macroTileWidth)) / MicroTileWidth * BITS_TO_BYTES(elemBits); - } - - // - // Compute the y offset within the macro tile. - // - pixelOffsetY = (((y % macroTileHeight) / MicroTileHeight) / numPipes) * pixelBytesPerRow; - - pixelOffset = pixelOffsetX + pixelOffsetY; - - // - // Combine the slice offset and macro tile offset with the pixel offset, accounting for the - // pipe bits in the middle of the address. - // - totalOffset = ((sliceOffset + macroTileOffset) >> numPipeBits) + pixelOffset; - - // - // Split the offset to put some bits below the pipe bits and some above. - // - groupMask = (1 << numGroupBits) - 1; - offsetLo = totalOffset & groupMask; - offsetHi = (totalOffset & ~groupMask) << numPipeBits; - - // - // Assemble the address from its components. - // - addr = offsetLo; - addr |= offsetHi; - // This is to remove warning with /analyze option - UINT_32 pipeBits = pipe << numGroupBits; - addr |= pipeBits; - - // - // Compute the bit position. The lower nibble is used when the x coordinate within the macro - // tile is less than half of the macro tile width, and the upper nibble is used when the x - // coordinate within the macro tile is greater than or equal to half the macro tile width. - // - *pBitPosition = ((x % macroTileWidth) < (macroTileWidth / factor)) ? 0 : 4; - - return addr; -} - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// Surface Addressing Shared -/////////////////////////////////////////////////////////////////////////////////////////////////// - -/** -*************************************************************************************************** -* AddrLib::ComputeSurfaceAddrFromCoordLinear -* -* @brief -* Compute address from coord for linear surface -* -* @return -* Address in bytes -* -*************************************************************************************************** -*/ -UINT_64 AddrLib::ComputeSurfaceAddrFromCoordLinear( - UINT_32 x, ///< [in] x coord - UINT_32 y, ///< [in] y coord - UINT_32 slice, ///< [in] slice/depth index - UINT_32 sample, ///< [in] sample index - UINT_32 bpp, ///< [in] bits per pixel - UINT_32 pitch, ///< [in] pitch - UINT_32 height, ///< [in] height - UINT_32 numSlices, ///< [in] number of slices - UINT_32* pBitPosition ///< [out] bit position inside a byte - ) const -{ - const UINT_64 sliceSize = static_cast(pitch) * height; - - UINT_64 sliceOffset = (slice + sample * numSlices)* sliceSize; - UINT_64 rowOffset = static_cast(y) * pitch; - UINT_64 pixOffset = x; - - UINT_64 addr = (sliceOffset + rowOffset + pixOffset) * bpp; - - *pBitPosition = static_cast(addr % 8); - addr /= 8; - - return addr; -} - -/** -*************************************************************************************************** -* AddrLib::ComputeSurfaceCoordFromAddrLinear -* -* @brief -* Compute the coord from an address of a linear surface -* -* @return -* N/A -*************************************************************************************************** -*/ -VOID AddrLib::ComputeSurfaceCoordFromAddrLinear( - UINT_64 addr, ///< [in] address - UINT_32 bitPosition, ///< [in] bitPosition in a byte - UINT_32 bpp, ///< [in] bits per pixel - UINT_32 pitch, ///< [in] pitch - UINT_32 height, ///< [in] height - UINT_32 numSlices, ///< [in] number of slices - UINT_32* pX, ///< [out] x coord - UINT_32* pY, ///< [out] y coord - UINT_32* pSlice, ///< [out] slice/depth index - UINT_32* pSample ///< [out] sample index - ) const -{ - const UINT_64 sliceSize = static_cast(pitch) * height; - const UINT_64 linearOffset = (BYTES_TO_BITS(addr) + bitPosition) / bpp; - - *pX = static_cast((linearOffset % sliceSize) % pitch); - *pY = static_cast((linearOffset % sliceSize) / pitch % height); - *pSlice = static_cast((linearOffset / sliceSize) % numSlices); - *pSample = static_cast((linearOffset / sliceSize) / numSlices); -} - -/** -*************************************************************************************************** -* AddrLib::ComputeSurfaceCoordFromAddrMicroTiled -* -* @brief -* Compute the coord from an address of a micro tiled surface -* -* @return -* N/A -*************************************************************************************************** -*/ -VOID AddrLib::ComputeSurfaceCoordFromAddrMicroTiled( - UINT_64 addr, ///< [in] address - UINT_32 bitPosition, ///< [in] bitPosition in a byte - UINT_32 bpp, ///< [in] bits per pixel - UINT_32 pitch, ///< [in] pitch - UINT_32 height, ///< [in] height - UINT_32 numSamples, ///< [in] number of samples - AddrTileMode tileMode, ///< [in] tile mode - UINT_32 tileBase, ///< [in] base offset within a tile - UINT_32 compBits, ///< [in] component bits actually needed(for planar surface) - UINT_32* pX, ///< [out] x coord - UINT_32* pY, ///< [out] y coord - UINT_32* pSlice, ///< [out] slice/depth index - UINT_32* pSample, ///< [out] sample index, - AddrTileType microTileType, ///< [in] micro tiling order - BOOL_32 isDepthSampleOrder ///< [in] TRUE if in depth sample order - ) const -{ - UINT_64 bitAddr; - UINT_32 microTileThickness; - UINT_32 microTileBits; - UINT_64 sliceBits; - UINT_64 rowBits; - UINT_32 sliceIndex; - UINT_32 microTileCoordX; - UINT_32 microTileCoordY; - UINT_32 pixelOffset; - UINT_32 pixelCoordX = 0; - UINT_32 pixelCoordY = 0; - UINT_32 pixelCoordZ = 0; - UINT_32 pixelCoordS = 0; - - // - // Convert byte address to bit address. - // - bitAddr = BYTES_TO_BITS(addr) + bitPosition; - - // - // Compute the micro tile size, in bits. - // - switch (tileMode) - { - case ADDR_TM_1D_TILED_THICK: - microTileThickness = ThickTileThickness; - break; - default: - microTileThickness = 1; - break; - } - - microTileBits = MicroTilePixels * microTileThickness * bpp * numSamples; - - // - // Compute number of bits per slice and number of bits per row of micro tiles. - // - sliceBits = static_cast(pitch) * height * microTileThickness * bpp * numSamples; - - rowBits = (pitch / MicroTileWidth) * microTileBits; - - // - // Extract the slice index. - // - sliceIndex = static_cast(bitAddr / sliceBits); - bitAddr -= sliceIndex * sliceBits; - - // - // Extract the y coordinate of the micro tile. - // - microTileCoordY = static_cast(bitAddr / rowBits) * MicroTileHeight; - bitAddr -= (microTileCoordY / MicroTileHeight) * rowBits; - - // - // Extract the x coordinate of the micro tile. - // - microTileCoordX = static_cast(bitAddr / microTileBits) * MicroTileWidth; - - // - // Compute the pixel offset within the micro tile. - // - pixelOffset = static_cast(bitAddr % microTileBits); - - // - // Extract pixel coordinates from the offset. - // - HwlComputePixelCoordFromOffset(pixelOffset, - bpp, - numSamples, - tileMode, - tileBase, - compBits, - &pixelCoordX, - &pixelCoordY, - &pixelCoordZ, - &pixelCoordS, - microTileType, - isDepthSampleOrder); - - // - // Assemble final coordinates. - // - *pX = microTileCoordX + pixelCoordX; - *pY = microTileCoordY + pixelCoordY; - *pSlice = (sliceIndex * microTileThickness) + pixelCoordZ; - *pSample = pixelCoordS; - - if (microTileThickness > 1) - { - *pSample = 0; - } -} - -/** -*************************************************************************************************** -* AddrLib::ComputePipeFromAddr -* -* @brief -* Compute the pipe number from an address -* -* @return -* Pipe number -* -*************************************************************************************************** -*/ -UINT_32 AddrLib::ComputePipeFromAddr( - UINT_64 addr, ///< [in] address - UINT_32 numPipes ///< [in] number of banks - ) const -{ - UINT_32 pipe; - - UINT_32 groupBytes = m_pipeInterleaveBytes; //just different terms - - // R600 - // The LSBs of the address are arranged as follows: - // bank | pipe | group - // - // To get the pipe number, shift off the group bits and mask the pipe bits. - // - - // R800 - // The LSBs of the address are arranged as follows: - // bank | bankInterleave | pipe | pipeInterleave - // - // To get the pipe number, shift off the pipe interleave bits and mask the pipe bits. - // - - pipe = static_cast(addr >> Log2(groupBytes)) & (numPipes - 1); - - return pipe; -} - -/** -*************************************************************************************************** -* AddrLib::ComputePixelIndexWithinMicroTile -* -* @brief -* Compute the pixel index inside a micro tile of surface -* -* @return -* Pixel index -* -*************************************************************************************************** -*/ -UINT_32 AddrLib::ComputePixelIndexWithinMicroTile( - UINT_32 x, ///< [in] x coord - UINT_32 y, ///< [in] y coord - UINT_32 z, ///< [in] slice/depth index - UINT_32 bpp, ///< [in] bits per pixel - AddrTileMode tileMode, ///< [in] tile mode - AddrTileType microTileType ///< [in] pixel order in display/non-display mode - ) const -{ - UINT_32 pixelBit0 = 0; - UINT_32 pixelBit1 = 0; - UINT_32 pixelBit2 = 0; - UINT_32 pixelBit3 = 0; - UINT_32 pixelBit4 = 0; - UINT_32 pixelBit5 = 0; - UINT_32 pixelBit6 = 0; - UINT_32 pixelBit7 = 0; - UINT_32 pixelBit8 = 0; - UINT_32 pixelNumber; - - UINT_32 x0 = _BIT(x, 0); - UINT_32 x1 = _BIT(x, 1); - UINT_32 x2 = _BIT(x, 2); - UINT_32 y0 = _BIT(y, 0); - UINT_32 y1 = _BIT(y, 1); - UINT_32 y2 = _BIT(y, 2); - UINT_32 z0 = _BIT(z, 0); - UINT_32 z1 = _BIT(z, 1); - UINT_32 z2 = _BIT(z, 2); - - UINT_32 thickness = ComputeSurfaceThickness(tileMode); - - // Compute the pixel number within the micro tile. - - if (microTileType != ADDR_THICK) - { - if (microTileType == ADDR_DISPLAYABLE) - { - switch (bpp) - { - case 8: - pixelBit0 = x0; - pixelBit1 = x1; - pixelBit2 = x2; - pixelBit3 = y1; - pixelBit4 = y0; - pixelBit5 = y2; - break; - case 16: - pixelBit0 = x0; - pixelBit1 = x1; - pixelBit2 = x2; - pixelBit3 = y0; - pixelBit4 = y1; - pixelBit5 = y2; - break; - case 32: - pixelBit0 = x0; - pixelBit1 = x1; - pixelBit2 = y0; - pixelBit3 = x2; - pixelBit4 = y1; - pixelBit5 = y2; - break; - case 64: - pixelBit0 = x0; - pixelBit1 = y0; - pixelBit2 = x1; - pixelBit3 = x2; - pixelBit4 = y1; - pixelBit5 = y2; - break; - case 128: - pixelBit0 = y0; - pixelBit1 = x0; - pixelBit2 = x1; - pixelBit3 = x2; - pixelBit4 = y1; - pixelBit5 = y2; - break; - default: - ADDR_ASSERT_ALWAYS(); - break; - } - } - else if (microTileType == ADDR_NON_DISPLAYABLE || microTileType == ADDR_DEPTH_SAMPLE_ORDER) - { - pixelBit0 = x0; - pixelBit1 = y0; - pixelBit2 = x1; - pixelBit3 = y1; - pixelBit4 = x2; - pixelBit5 = y2; - } - else if (microTileType == ADDR_ROTATED) - { - ADDR_ASSERT(thickness == 1); - - switch (bpp) - { - case 8: - pixelBit0 = y0; - pixelBit1 = y1; - pixelBit2 = y2; - pixelBit3 = x1; - pixelBit4 = x0; - pixelBit5 = x2; - break; - case 16: - pixelBit0 = y0; - pixelBit1 = y1; - pixelBit2 = y2; - pixelBit3 = x0; - pixelBit4 = x1; - pixelBit5 = x2; - break; - case 32: - pixelBit0 = y0; - pixelBit1 = y1; - pixelBit2 = x0; - pixelBit3 = y2; - pixelBit4 = x1; - pixelBit5 = x2; - break; - case 64: - pixelBit0 = y0; - pixelBit1 = x0; - pixelBit2 = y1; - pixelBit3 = x1; - pixelBit4 = x2; - pixelBit5 = y2; - break; - default: - ADDR_ASSERT_ALWAYS(); - break; - } - } - - if (thickness > 1) - { - pixelBit6 = z0; - pixelBit7 = z1; - } - } - else // ADDR_THICK - { - ADDR_ASSERT(thickness > 1); - - switch (bpp) - { - case 8: - case 16: - pixelBit0 = x0; - pixelBit1 = y0; - pixelBit2 = x1; - pixelBit3 = y1; - pixelBit4 = z0; - pixelBit5 = z1; - break; - case 32: - pixelBit0 = x0; - pixelBit1 = y0; - pixelBit2 = x1; - pixelBit3 = z0; - pixelBit4 = y1; - pixelBit5 = z1; - break; - case 64: - case 128: - pixelBit0 = y0; - pixelBit1 = x0; - pixelBit2 = z0; - pixelBit3 = x1; - pixelBit4 = y1; - pixelBit5 = z1; - break; - default: - ADDR_ASSERT_ALWAYS(); - break; - } - - pixelBit6 = x2; - pixelBit7 = y2; - } - - if (thickness == 8) - { - pixelBit8 = z2; - } - - pixelNumber = ((pixelBit0 ) | - (pixelBit1 << 1) | - (pixelBit2 << 2) | - (pixelBit3 << 3) | - (pixelBit4 << 4) | - (pixelBit5 << 5) | - (pixelBit6 << 6) | - (pixelBit7 << 7) | - (pixelBit8 << 8)); - - return pixelNumber; -} - -/** -*************************************************************************************************** -* AddrLib::AdjustPitchAlignment -* -* @brief -* Adjusts pitch alignment for flipping surface -* -* @return -* N/A -* -*************************************************************************************************** -*/ -VOID AddrLib::AdjustPitchAlignment( - ADDR_SURFACE_FLAGS flags, ///< [in] Surface flags - UINT_32* pPitchAlign ///< [out] Pointer to pitch alignment - ) const -{ - // Display engine hardwires lower 5 bit of GRPH_PITCH to ZERO which means 32 pixel alignment - // Maybe it will be fixed in future but let's make it general for now. - if (flags.display || flags.overlay) - { - *pPitchAlign = PowTwoAlign(*pPitchAlign, 32); - - if(flags.display) - { - *pPitchAlign = Max(m_minPitchAlignPixels, *pPitchAlign); - } - } -} - -/** -*************************************************************************************************** -* AddrLib::PadDimensions -* -* @brief -* Helper function to pad dimensions -* -* @return -* N/A -* -*************************************************************************************************** -*/ -VOID AddrLib::PadDimensions( - AddrTileMode tileMode, ///< [in] tile mode - UINT_32 bpp, ///< [in] bits per pixel - ADDR_SURFACE_FLAGS flags, ///< [in] surface flags - UINT_32 numSamples, ///< [in] number of samples - ADDR_TILEINFO* pTileInfo, ///< [in/out] bank structure. - UINT_32 padDims, ///< [in] Dimensions to pad valid value 1,2,3 - UINT_32 mipLevel, ///< [in] MipLevel - UINT_32* pPitch, ///< [in/out] pitch in pixels - UINT_32 pitchAlign, ///< [in] pitch alignment - UINT_32* pHeight, ///< [in/out] height in pixels - UINT_32 heightAlign, ///< [in] height alignment - UINT_32* pSlices, ///< [in/out] number of slices - UINT_32 sliceAlign ///< [in] number of slice alignment - ) const -{ - UINT_32 thickness = ComputeSurfaceThickness(tileMode); - - ADDR_ASSERT(padDims <= 3); - - // - // Override padding for mip levels - // - if (mipLevel > 0) - { - if (flags.cube) - { - // for cubemap, we only pad when client call with 6 faces as an identity - if (*pSlices > 1) - { - padDims = 3; // we should pad cubemap sub levels when we treat it as 3d texture - } - else - { - padDims = 2; - } - } - } - - // Any possibilities that padDims is 0? - if (padDims == 0) - { - padDims = 3; - } - - if (IsPow2(pitchAlign)) - { - *pPitch = PowTwoAlign((*pPitch), pitchAlign); - } - else // add this code to pass unit test, r600 linear mode is not align bpp to pow2 for linear - { - *pPitch += pitchAlign - 1; - *pPitch /= pitchAlign; - *pPitch *= pitchAlign; - } - - if (padDims > 1) - { - *pHeight = PowTwoAlign((*pHeight), heightAlign); - } - - if (padDims > 2 || thickness > 1) - { - // for cubemap single face, we do not pad slices. - // if we pad it, the slice number should be set to 6 and current mip level > 1 - if (flags.cube && (!m_configFlags.noCubeMipSlicesPad || flags.cubeAsArray)) - { - *pSlices = NextPow2(*pSlices); - } - - // normal 3D texture or arrays or cubemap has a thick mode? (Just pass unit test) - if (thickness > 1) - { - *pSlices = PowTwoAlign((*pSlices), sliceAlign); - } - - } - - HwlPadDimensions(tileMode, - bpp, - flags, - numSamples, - pTileInfo, - padDims, - mipLevel, - pPitch, - pitchAlign, - pHeight, - heightAlign, - pSlices, - sliceAlign); -} - - -/** -*************************************************************************************************** -* AddrLib::HwlPreHandleBaseLvl3xPitch -* -* @brief -* Pre-handler of 3x pitch (96 bit) adjustment -* -* @return -* Expected pitch -*************************************************************************************************** -*/ -UINT_32 AddrLib::HwlPreHandleBaseLvl3xPitch( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input - UINT_32 expPitch ///< [in] pitch - ) const -{ - ADDR_ASSERT(pIn->width == expPitch); - // - // If pitch is pre-multiplied by 3, we retrieve original one here to get correct miplevel size - // - if (AddrElemLib::IsExpand3x(pIn->format) && - pIn->mipLevel == 0 && - pIn->tileMode == ADDR_TM_LINEAR_ALIGNED) - { - expPitch /= 3; - expPitch = NextPow2(expPitch); - } - - return expPitch; -} - -/** -*************************************************************************************************** -* AddrLib::HwlPostHandleBaseLvl3xPitch -* -* @brief -* Post-handler of 3x pitch adjustment -* -* @return -* Expected pitch -*************************************************************************************************** -*/ -UINT_32 AddrLib::HwlPostHandleBaseLvl3xPitch( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input - UINT_32 expPitch ///< [in] pitch - ) const -{ - // - // 96 bits surface of sub levels require element pitch of 32 bits instead - // So we just return pitch in 32 bit pixels without timing 3 - // - if (AddrElemLib::IsExpand3x(pIn->format) && - pIn->mipLevel == 0 && - pIn->tileMode == ADDR_TM_LINEAR_ALIGNED) - { - expPitch *= 3; - } - - return expPitch; -} - - -/** -*************************************************************************************************** -* AddrLib::IsMacroTiled -* -* @brief -* Check if the tile mode is macro tiled -* -* @return -* TRUE if it is macro tiled (2D/2B/3D/3B) -*************************************************************************************************** -*/ -BOOL_32 AddrLib::IsMacroTiled( - AddrTileMode tileMode) ///< [in] tile mode -{ - return m_modeFlags[tileMode].isMacro; -} - -/** -*************************************************************************************************** -* AddrLib::IsMacro3dTiled -* -* @brief -* Check if the tile mode is 3D macro tiled -* -* @return -* TRUE if it is 3D macro tiled -*************************************************************************************************** -*/ -BOOL_32 AddrLib::IsMacro3dTiled( - AddrTileMode tileMode) ///< [in] tile mode -{ - return m_modeFlags[tileMode].isMacro3d; -} - -/** -*************************************************************************************************** -* AddrLib::IsMicroTiled -* -* @brief -* Check if the tile mode is micro tiled -* -* @return -* TRUE if micro tiled -*************************************************************************************************** -*/ -BOOL_32 AddrLib::IsMicroTiled( - AddrTileMode tileMode) ///< [in] tile mode -{ - return m_modeFlags[tileMode].isMicro; -} - -/** -*************************************************************************************************** -* AddrLib::IsLinear -* -* @brief -* Check if the tile mode is linear -* -* @return -* TRUE if linear -*************************************************************************************************** -*/ -BOOL_32 AddrLib::IsLinear( - AddrTileMode tileMode) ///< [in] tile mode -{ - return m_modeFlags[tileMode].isLinear; -} - -/** -*************************************************************************************************** -* AddrLib::IsPrtNoRotationTileMode -* -* @brief -* Return TRUE if it is prt tile without rotation -* @note -* This function just used by CI -*************************************************************************************************** -*/ -BOOL_32 AddrLib::IsPrtNoRotationTileMode( - AddrTileMode tileMode) -{ - return m_modeFlags[tileMode].isPrtNoRotation; -} - -/** -*************************************************************************************************** -* AddrLib::IsPrtTileMode -* -* @brief -* Return TRUE if it is prt tile -* @note -* This function just used by CI -*************************************************************************************************** -*/ -BOOL_32 AddrLib::IsPrtTileMode( - AddrTileMode tileMode) -{ - return m_modeFlags[tileMode].isPrt; -} - -/** -*************************************************************************************************** -* AddrLib::Bits2Number -* -* @brief -* Cat a array of binary bit to a number -* -* @return -* The number combined with the array of bits -*************************************************************************************************** -*/ -UINT_32 AddrLib::Bits2Number( - UINT_32 bitNum, ///< [in] how many bits - ...) ///< [in] varaible bits value starting from MSB -{ - UINT_32 number = 0; - UINT_32 i; - va_list bits_ptr; - - va_start(bits_ptr, bitNum); - - for(i = 0; i < bitNum; i++) - { - number |= va_arg(bits_ptr, UINT_32); - number <<= 1; - } - - number>>=1; - - va_end(bits_ptr); - - return number; -} - -/** -*************************************************************************************************** -* AddrLib::ComputeMipLevel -* -* @brief -* Compute mipmap level width/height/slices -* @return -* N/A -*************************************************************************************************** -*/ -VOID AddrLib::ComputeMipLevel( - ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn ///< [in/out] Input structure - ) const -{ - if (AddrElemLib::IsBlockCompressed(pIn->format)) - { - if (pIn->mipLevel == 0) - { - // DXTn's level 0 must be multiple of 4 - // But there are exceptions: - // 1. Internal surface creation in hostblt/vsblt/etc... - // 2. Runtime doesn't reject ATI1/ATI2 whose width/height are not multiple of 4 - pIn->width = PowTwoAlign(pIn->width, 4); - pIn->height = PowTwoAlign(pIn->height, 4); - } - } - - HwlComputeMipLevel(pIn); -} - -/** -*************************************************************************************************** -* AddrLib::DegradeBaseLevel -* -* @brief -* Check if base level's tile mode can be degraded -* @return -* TRUE if degraded, also returns degraded tile mode (unchanged if not degraded) -*************************************************************************************************** -*/ -BOOL_32 AddrLib::DegradeBaseLevel( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] Input structure for surface info - AddrTileMode* pTileMode ///< [out] Degraded tile mode - ) const -{ - BOOL_32 degraded = FALSE; - AddrTileMode tileMode = pIn->tileMode; - UINT_32 thickness = ComputeSurfaceThickness(tileMode); - - if (m_configFlags.degradeBaseLevel) // This is a global setting - { - if (pIn->flags.degrade4Space && // Degradation per surface - pIn->mipLevel == 0 && - pIn->numSamples == 1 && - IsMacroTiled(tileMode)) - { - if (HwlDegradeBaseLevel(pIn)) - { - *pTileMode = thickness == 1 ? ADDR_TM_1D_TILED_THIN1 : ADDR_TM_1D_TILED_THICK; - degraded = TRUE; - } - else if (thickness > 1) - { - // As in the following HwlComputeSurfaceInfo, thick modes may be degraded to - // thinner modes, we should re-evaluate whether the corresponding thinner modes - // need to be degraded. If so, we choose 1D thick mode instead. - tileMode = DegradeLargeThickTile(pIn->tileMode, pIn->bpp); - if (tileMode != pIn->tileMode) - { - ADDR_COMPUTE_SURFACE_INFO_INPUT input = *pIn; - input.tileMode = tileMode; - if (HwlDegradeBaseLevel(&input)) - { - *pTileMode = ADDR_TM_1D_TILED_THICK; - degraded = TRUE; - } - } - } - } - } - - return degraded; -} - -/** -*************************************************************************************************** -* AddrLib::DegradeLargeThickTile -* -* @brief -* Check if the thickness needs to be reduced if a tile is too large -* @return -* The degraded tile mode (unchanged if not degraded) -*************************************************************************************************** -*/ -AddrTileMode AddrLib::DegradeLargeThickTile( - AddrTileMode tileMode, - UINT_32 bpp) const -{ - // Override tilemode - // When tile_width (8) * tile_height (8) * thickness * element_bytes is > row_size, - // it is better to just use THIN mode in this case - UINT_32 thickness = ComputeSurfaceThickness(tileMode); - - if (thickness > 1 && m_configFlags.allowLargeThickTile == 0) - { - UINT_32 tileSize = MicroTilePixels * thickness * (bpp >> 3); - - if (tileSize > m_rowSize) - { - switch (tileMode) - { - case ADDR_TM_2D_TILED_XTHICK: - if ((tileSize >> 1) <= m_rowSize) - { - tileMode = ADDR_TM_2D_TILED_THICK; - break; - } - // else fall through - case ADDR_TM_2D_TILED_THICK: - tileMode = ADDR_TM_2D_TILED_THIN1; - break; - - case ADDR_TM_3D_TILED_XTHICK: - if ((tileSize >> 1) <= m_rowSize) - { - tileMode = ADDR_TM_3D_TILED_THICK; - break; - } - // else fall through - case ADDR_TM_3D_TILED_THICK: - tileMode = ADDR_TM_3D_TILED_THIN1; - break; - - case ADDR_TM_PRT_TILED_THICK: - tileMode = ADDR_TM_PRT_TILED_THIN1; - break; - - case ADDR_TM_PRT_2D_TILED_THICK: - tileMode = ADDR_TM_PRT_2D_TILED_THIN1; - break; - - case ADDR_TM_PRT_3D_TILED_THICK: - tileMode = ADDR_TM_PRT_3D_TILED_THIN1; - break; - - default: - break; - } - } - } - - return tileMode; -} - -/** -*************************************************************************************************** -* AddrLib::PostComputeMipLevel -* @brief -* Compute MipLevel info (including level 0) after surface adjustment -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::PostComputeMipLevel( - ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in/out] Input structure - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] Output structure - ) const -{ - // Mipmap including level 0 must be pow2 padded since either SI hw expects so or it is - // required by CFX for Hw Compatibility between NI and SI. Otherwise it is only needed for - // mipLevel > 0. Any h/w has different requirement should implement its own virtual function - - if (pIn->flags.pow2Pad) - { - pIn->width = NextPow2(pIn->width); - pIn->height = NextPow2(pIn->height); - pIn->numSlices = NextPow2(pIn->numSlices); - } - else if (pIn->mipLevel > 0) - { - pIn->width = NextPow2(pIn->width); - pIn->height = NextPow2(pIn->height); - - if (!pIn->flags.cube) - { - pIn->numSlices = NextPow2(pIn->numSlices); - } - - // for cubemap, we keep its value at first - } - - return ADDR_OK; -} - -/** -*************************************************************************************************** -* AddrLib::HwlSetupTileCfg -* -* @brief -* Map tile index to tile setting. -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::HwlSetupTileCfg( - INT_32 index, ///< [in] Tile index - INT_32 macroModeIndex, ///< [in] Index in macro tile mode table(CI) - ADDR_TILEINFO* pInfo, ///< [out] Tile Info - AddrTileMode* pMode, ///< [out] Tile mode - AddrTileType* pType ///< [out] Tile type - ) const -{ - return ADDR_NOTSUPPORTED; -} - -/** -*************************************************************************************************** -* AddrLib::HwlGetPipes -* -* @brief -* Get number pipes -* @return -* num pipes -*************************************************************************************************** -*/ -UINT_32 AddrLib::HwlGetPipes( - const ADDR_TILEINFO* pTileInfo ///< [in] Tile info - ) const -{ - //pTileInfo can be NULL when asic is 6xx and 8xx. - return m_pipes; -} - -/** -*************************************************************************************************** -* AddrLib::ComputeQbStereoInfo -* -* @brief -* Get quad buffer stereo information -* @return -* TRUE if no error -*************************************************************************************************** -*/ -BOOL_32 AddrLib::ComputeQbStereoInfo( - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [in/out] updated pOut+pStereoInfo - ) const -{ - BOOL_32 success = FALSE; - - if (pOut->pStereoInfo) - { - ADDR_ASSERT(pOut->bpp >= 8); - ADDR_ASSERT((pOut->surfSize % pOut->baseAlign) == 0); - - // Save original height - pOut->pStereoInfo->eyeHeight = pOut->height; - - // Right offset - pOut->pStereoInfo->rightOffset = static_cast(pOut->surfSize); - - pOut->pStereoInfo->rightSwizzle = HwlComputeQbStereoRightSwizzle(pOut); - // Double height - pOut->height <<= 1; - pOut->pixelHeight <<= 1; - - // Double size - pOut->surfSize <<= 1; - - // Right start address meets the base align since it is guaranteed by AddrLib - - // 1D surface on SI may break this rule, but we can force it to meet by checking .qbStereo. - success = TRUE; - } - - return success; -} - -/////////////////////////////////////////////////////////////////////////////////////////////////// -// Element lib -/////////////////////////////////////////////////////////////////////////////////////////////////// - - -/** -*************************************************************************************************** -* AddrLib::Flt32ToColorPixel -* -* @brief -* Convert a FLT_32 value to a depth/stencil pixel value -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::Flt32ToDepthPixel( - const ELEM_FLT32TODEPTHPIXEL_INPUT* pIn, - ELEM_FLT32TODEPTHPIXEL_OUTPUT* pOut) const -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (GetFillSizeFieldsFlags() == TRUE) - { - if ((pIn->size != sizeof(ELEM_FLT32TODEPTHPIXEL_INPUT)) || - (pOut->size != sizeof(ELEM_FLT32TODEPTHPIXEL_OUTPUT))) - { - returnCode = ADDR_PARAMSIZEMISMATCH; - } - } - - if (returnCode == ADDR_OK) - { - GetElemLib()->Flt32ToDepthPixel(pIn->format, - pIn->comps, - pOut->pPixel); - UINT_32 depthBase = 0; - UINT_32 stencilBase = 0; - UINT_32 depthBits = 0; - UINT_32 stencilBits = 0; - - switch (pIn->format) - { - case ADDR_DEPTH_16: - depthBits = 16; - break; - case ADDR_DEPTH_X8_24: - case ADDR_DEPTH_8_24: - case ADDR_DEPTH_X8_24_FLOAT: - case ADDR_DEPTH_8_24_FLOAT: - depthBase = 8; - depthBits = 24; - stencilBits = 8; - break; - case ADDR_DEPTH_32_FLOAT: - depthBits = 32; - break; - case ADDR_DEPTH_X24_8_32_FLOAT: - depthBase = 8; - depthBits = 32; - stencilBits = 8; - break; - default: - break; - } - - // Overwrite base since R800 has no "tileBase" - if (GetElemLib()->IsDepthStencilTilePlanar() == FALSE) - { - depthBase = 0; - stencilBase = 0; - } - - depthBase *= 64; - stencilBase *= 64; - - pOut->stencilBase = stencilBase; - pOut->depthBase = depthBase; - pOut->depthBits = depthBits; - pOut->stencilBits = stencilBits; - } - - return returnCode; -} - -/** -*************************************************************************************************** -* AddrLib::Flt32ToColorPixel -* -* @brief -* Convert a FLT_32 value to a red/green/blue/alpha pixel value -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::Flt32ToColorPixel( - const ELEM_FLT32TOCOLORPIXEL_INPUT* pIn, - ELEM_FLT32TOCOLORPIXEL_OUTPUT* pOut) const -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (GetFillSizeFieldsFlags() == TRUE) - { - if ((pIn->size != sizeof(ELEM_FLT32TOCOLORPIXEL_INPUT)) || - (pOut->size != sizeof(ELEM_FLT32TOCOLORPIXEL_OUTPUT))) - { - returnCode = ADDR_PARAMSIZEMISMATCH; - } - } - - if (returnCode == ADDR_OK) - { - GetElemLib()->Flt32ToColorPixel(pIn->format, - pIn->surfNum, - pIn->surfSwap, - pIn->comps, - pOut->pPixel); - } - - return returnCode; -} - - -/** -*************************************************************************************************** -* AddrLib::GetExportNorm -* -* @brief -* Check one format can be EXPORT_NUM -* @return -* TRUE if EXPORT_NORM can be used -*************************************************************************************************** -*/ -BOOL_32 AddrLib::GetExportNorm( - const ELEM_GETEXPORTNORM_INPUT* pIn) const -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - BOOL_32 enabled = FALSE; - - if (GetFillSizeFieldsFlags() == TRUE) - { - if (pIn->size != sizeof(ELEM_GETEXPORTNORM_INPUT)) - { - returnCode = ADDR_PARAMSIZEMISMATCH; - } - } - - if (returnCode == ADDR_OK) - { - enabled = GetElemLib()->PixGetExportNorm(pIn->format, - pIn->num, - pIn->swap); - } - - return enabled; -} - -/** -*************************************************************************************************** -* AddrLib::ComputePrtInfo -* -* @brief -* Compute prt surface related info -* -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE AddrLib::ComputePrtInfo( - const ADDR_PRT_INFO_INPUT* pIn, - ADDR_PRT_INFO_OUTPUT* pOut) const -{ - ADDR_ASSERT(pOut != NULL); - - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - UINT_32 expandX = 1; - UINT_32 expandY = 1; - AddrElemMode elemMode; - - UINT_32 bpp = GetElemLib()->GetBitsPerPixel(pIn->format, - &elemMode, - &expandX, - &expandY); - - if (bpp <8 || bpp == 24 || bpp == 48 || bpp == 96 ) - { - returnCode = ADDR_INVALIDPARAMS; - } - - UINT_32 numFrags = pIn->numFrags; - ADDR_ASSERT(numFrags <= 8); - - UINT_32 tileWidth = 0; - UINT_32 tileHeight = 0; - if (returnCode == ADDR_OK) - { - // 3D texture without depth or 2d texture - if (pIn->baseMipDepth > 1 || pIn->baseMipHeight > 1) - { - if (bpp == 8) - { - tileWidth = 256; - tileHeight = 256; - } - else if (bpp == 16) - { - tileWidth = 256; - tileHeight = 128; - } - else if (bpp == 32) - { - tileWidth = 128; - tileHeight = 128; - } - else if (bpp == 64) - { - // assume it is BC1/4 - tileWidth = 512; - tileHeight = 256; - - if (elemMode == ADDR_UNCOMPRESSED) - { - tileWidth = 128; - tileHeight = 64; - } - } - else if (bpp == 128) - { - // assume it is BC2/3/5/6H/7 - tileWidth = 256; - tileHeight = 256; - - if (elemMode == ADDR_UNCOMPRESSED) - { - tileWidth = 64; - tileHeight = 64; - } - } - - if (numFrags == 2) - { - tileWidth = tileWidth / 2; - } - else if (numFrags == 4) - { - tileWidth = tileWidth / 2; - tileHeight = tileHeight / 2; - } - else if (numFrags == 8) - { - tileWidth = tileWidth / 4; - tileHeight = tileHeight / 2; - } - } - else // 1d - { - tileHeight = 1; - if (bpp == 8) - { - tileWidth = 65536; - } - else if (bpp == 16) - { - tileWidth = 32768; - } - else if (bpp == 32) - { - tileWidth = 16384; - } - else if (bpp == 64) - { - tileWidth = 8192; - } - else if (bpp == 128) - { - tileWidth = 4096; - } - } - } - - pOut->prtTileWidth = tileWidth; - pOut->prtTileHeight = tileHeight; - - return returnCode; -} diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/core/addrlib.h mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/core/addrlib.h --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/core/addrlib.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/core/addrlib.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,695 +0,0 @@ -/* - * Copyright © 2014 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ - -/** -*************************************************************************************************** -* @file addrlib.h -* @brief Contains the AddrLib base class definition. -*************************************************************************************************** -*/ - -#ifndef __ADDR_LIB_H__ -#define __ADDR_LIB_H__ - - -#include "addrinterface.h" -#include "addrobject.h" -#include "addrelemlib.h" - -#if BRAHMA_BUILD -#include "amdgpu_id.h" -#else -#include "atiid.h" -#endif - -#ifndef CIASICIDGFXENGINE_R600 -#define CIASICIDGFXENGINE_R600 0x00000006 -#endif - -#ifndef CIASICIDGFXENGINE_R800 -#define CIASICIDGFXENGINE_R800 0x00000008 -#endif - -#ifndef CIASICIDGFXENGINE_SOUTHERNISLAND -#define CIASICIDGFXENGINE_SOUTHERNISLAND 0x0000000A -#endif - -#ifndef CIASICIDGFXENGINE_SEAISLAND -#define CIASICIDGFXENGINE_SEAISLAND 0x0000000B -#endif -/** -*************************************************************************************************** -* @brief Neutral enums that define pipeinterleave -*************************************************************************************************** -*/ -enum AddrPipeInterleave -{ - ADDR_PIPEINTERLEAVE_256B = 256, - ADDR_PIPEINTERLEAVE_512B = 512, -}; - -/** -*************************************************************************************************** -* @brief Neutral enums that define DRAM row size -*************************************************************************************************** -*/ -enum AddrRowSize -{ - ADDR_ROWSIZE_1KB = 1024, - ADDR_ROWSIZE_2KB = 2048, - ADDR_ROWSIZE_4KB = 4096, - ADDR_ROWSIZE_8KB = 8192, -}; - -/** -*************************************************************************************************** -* @brief Neutral enums that define bank interleave -*************************************************************************************************** -*/ -enum AddrBankInterleave -{ - ADDR_BANKINTERLEAVE_1 = 1, - ADDR_BANKINTERLEAVE_2 = 2, - ADDR_BANKINTERLEAVE_4 = 4, - ADDR_BANKINTERLEAVE_8 = 8, -}; - -/** -*************************************************************************************************** -* @brief Neutral enums that define MGPU chip tile size -*************************************************************************************************** -*/ -enum AddrChipTileSize -{ - ADDR_CHIPTILESIZE_16 = 16, - ADDR_CHIPTILESIZE_32 = 32, - ADDR_CHIPTILESIZE_64 = 64, - ADDR_CHIPTILESIZE_128 = 128, -}; - -/** -*************************************************************************************************** -* @brief Neutral enums that define shader engine tile size -*************************************************************************************************** -*/ -enum AddrEngTileSize -{ - ADDR_SE_TILESIZE_16 = 16, - ADDR_SE_TILESIZE_32 = 32, -}; - -/** -*************************************************************************************************** -* @brief Neutral enums that define bank swap size -*************************************************************************************************** -*/ -enum AddrBankSwapSize -{ - ADDR_BANKSWAP_128B = 128, - ADDR_BANKSWAP_256B = 256, - ADDR_BANKSWAP_512B = 512, - ADDR_BANKSWAP_1KB = 1024, -}; - -/** -*************************************************************************************************** -* @brief Neutral enums that define bank swap size -*************************************************************************************************** -*/ -enum AddrSampleSplitSize -{ - ADDR_SAMPLESPLIT_1KB = 1024, - ADDR_SAMPLESPLIT_2KB = 2048, - ADDR_SAMPLESPLIT_4KB = 4096, - ADDR_SAMPLESPLIT_8KB = 8192, -}; - -/** -*************************************************************************************************** -* @brief Flags for AddrTileMode -*************************************************************************************************** -*/ -struct AddrTileModeFlags -{ - UINT_32 thickness : 4; - UINT_32 isLinear : 1; - UINT_32 isMicro : 1; - UINT_32 isMacro : 1; - UINT_32 isMacro3d : 1; - UINT_32 isPrt : 1; - UINT_32 isPrtNoRotation : 1; - UINT_32 isBankSwapped : 1; -}; - -/** -*************************************************************************************************** -* @brief This class contains asic independent address lib functionalities -*************************************************************************************************** -*/ -class AddrLib : public AddrObject -{ -public: - virtual ~AddrLib(); - - static ADDR_E_RETURNCODE Create( - const ADDR_CREATE_INPUT* pCreateInfo, ADDR_CREATE_OUTPUT* pCreateOut); - - /// Pair of Create - VOID Destroy() - { - delete this; - } - - static AddrLib* GetAddrLib( - ADDR_HANDLE hLib); - - /// Returns AddrLib version (from compiled binary instead include file) - UINT_32 GetVersion() - { - return m_version; - } - - /// Returns asic chip family name defined by AddrLib - AddrChipFamily GetAddrChipFamily() - { - return m_chipFamily; - } - - /// Returns tileIndex support - BOOL_32 UseTileIndex(INT_32 index) const - { - return m_configFlags.useTileIndex && (index != TileIndexInvalid); - } - - /// Returns combined swizzle support - BOOL_32 UseCombinedSwizzle() const - { - return m_configFlags.useCombinedSwizzle; - } - - // - // Interface stubs - // - ADDR_E_RETURNCODE ComputeSurfaceInfo( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; - - ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoord( - const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, - ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; - - ADDR_E_RETURNCODE ComputeSurfaceCoordFromAddr( - const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, - ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const; - - ADDR_E_RETURNCODE ComputeSliceTileSwizzle( - const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, - ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) const; - - ADDR_E_RETURNCODE ExtractBankPipeSwizzle( - const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, - ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) const; - - ADDR_E_RETURNCODE CombineBankPipeSwizzle( - const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT* pIn, - ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT* pOut) const; - - ADDR_E_RETURNCODE ComputeBaseSwizzle( - const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, - ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const; - - ADDR_E_RETURNCODE ComputeFmaskInfo( - const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, - ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut); - - ADDR_E_RETURNCODE ComputeFmaskAddrFromCoord( - const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, - ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const; - - ADDR_E_RETURNCODE ComputeFmaskCoordFromAddr( - const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, - ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const; - - ADDR_E_RETURNCODE ConvertTileInfoToHW( - const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, - ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const; - - ADDR_E_RETURNCODE ConvertTileIndex( - const ADDR_CONVERT_TILEINDEX_INPUT* pIn, - ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) const; - - ADDR_E_RETURNCODE ConvertTileIndex1( - const ADDR_CONVERT_TILEINDEX1_INPUT* pIn, - ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) const; - - ADDR_E_RETURNCODE GetTileIndex( - const ADDR_GET_TILEINDEX_INPUT* pIn, - ADDR_GET_TILEINDEX_OUTPUT* pOut) const; - - ADDR_E_RETURNCODE ComputeHtileInfo( - const ADDR_COMPUTE_HTILE_INFO_INPUT* pIn, - ADDR_COMPUTE_HTILE_INFO_OUTPUT* pOut) const; - - ADDR_E_RETURNCODE ComputeCmaskInfo( - const ADDR_COMPUTE_CMASK_INFO_INPUT* pIn, - ADDR_COMPUTE_CMASK_INFO_OUTPUT* pOut) const; - - ADDR_E_RETURNCODE ComputeDccInfo( - const ADDR_COMPUTE_DCCINFO_INPUT* pIn, - ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const; - - ADDR_E_RETURNCODE ComputeHtileAddrFromCoord( - const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, - ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) const; - - ADDR_E_RETURNCODE ComputeCmaskAddrFromCoord( - const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, - ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const; - - ADDR_E_RETURNCODE ComputeHtileCoordFromAddr( - const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, - ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut) const; - - ADDR_E_RETURNCODE ComputeCmaskCoordFromAddr( - const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn, - ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut) const; - - ADDR_E_RETURNCODE ComputePrtInfo( - const ADDR_PRT_INFO_INPUT* pIn, - ADDR_PRT_INFO_OUTPUT* pOut) const; - - ADDR_E_RETURNCODE Flt32ToDepthPixel( - const ELEM_FLT32TODEPTHPIXEL_INPUT* pIn, - ELEM_FLT32TODEPTHPIXEL_OUTPUT* pOut) const; - - ADDR_E_RETURNCODE Flt32ToColorPixel( - const ELEM_FLT32TOCOLORPIXEL_INPUT* pIn, - ELEM_FLT32TOCOLORPIXEL_OUTPUT* pOut) const; - - BOOL_32 GetExportNorm( - const ELEM_GETEXPORTNORM_INPUT* pIn) const; - -protected: - AddrLib(); // Constructor is protected - AddrLib(const AddrClient* pClient); - - /// Pure Virtual function for Hwl computing surface info - virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0; - - /// Pure Virtual function for Hwl computing surface address from coord - virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoord( - const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, - ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const = 0; - - /// Pure Virtual function for Hwl computing surface coord from address - virtual ADDR_E_RETURNCODE HwlComputeSurfaceCoordFromAddr( - const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, - ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const = 0; - - /// Pure Virtual function for Hwl computing surface tile swizzle - virtual ADDR_E_RETURNCODE HwlComputeSliceTileSwizzle( - const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, - ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) const = 0; - - /// Pure Virtual function for Hwl extracting bank/pipe swizzle from base256b - virtual ADDR_E_RETURNCODE HwlExtractBankPipeSwizzle( - const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, - ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) const = 0; - - /// Pure Virtual function for Hwl combining bank/pipe swizzle - virtual ADDR_E_RETURNCODE HwlCombineBankPipeSwizzle( - UINT_32 bankSwizzle, UINT_32 pipeSwizzle, ADDR_TILEINFO* pTileInfo, - UINT_64 baseAddr, UINT_32* pTileSwizzle) const = 0; - - /// Pure Virtual function for Hwl computing base swizzle - virtual ADDR_E_RETURNCODE HwlComputeBaseSwizzle( - const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, - ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const = 0; - - /// Pure Virtual function for Hwl computing HTILE base align - virtual UINT_32 HwlComputeHtileBaseAlign( - BOOL_32 isTcCompatible, BOOL_32 isLinear, ADDR_TILEINFO* pTileInfo) const = 0; - - /// Pure Virtual function for Hwl computing HTILE bpp - virtual UINT_32 HwlComputeHtileBpp( - BOOL_32 isWidth8, BOOL_32 isHeight8) const = 0; - - /// Pure Virtual function for Hwl computing HTILE bytes - virtual UINT_64 HwlComputeHtileBytes( - UINT_32 pitch, UINT_32 height, UINT_32 bpp, - BOOL_32 isLinear, UINT_32 numSlices, UINT_64* pSliceBytes, UINT_32 baseAlign) const = 0; - - /// Pure Virtual function for Hwl computing FMASK info - virtual ADDR_E_RETURNCODE HwlComputeFmaskInfo( - const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, - ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut) = 0; - - /// Pure Virtual function for Hwl FMASK address from coord - virtual ADDR_E_RETURNCODE HwlComputeFmaskAddrFromCoord( - const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, - ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const = 0; - - /// Pure Virtual function for Hwl FMASK coord from address - virtual ADDR_E_RETURNCODE HwlComputeFmaskCoordFromAddr( - const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, - ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const = 0; - - /// Pure Virtual function for Hwl convert tile info from real value to HW value - virtual ADDR_E_RETURNCODE HwlConvertTileInfoToHW( - const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, - ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const = 0; - - /// Pure Virtual function for Hwl compute mipmap info - virtual BOOL_32 HwlComputeMipLevel( - ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const = 0; - - /// Pure Virtual function for Hwl compute max cmask blockMax value - virtual BOOL_32 HwlGetMaxCmaskBlockMax() const = 0; - - /// Pure Virtual function for Hwl compute fmask bits - virtual UINT_32 HwlComputeFmaskBits( - const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, - UINT_32* pNumSamples) const = 0; - - /// Virtual function to get index (not pure then no need to implement this in all hwls - virtual ADDR_E_RETURNCODE HwlGetTileIndex( - const ADDR_GET_TILEINDEX_INPUT* pIn, - ADDR_GET_TILEINDEX_OUTPUT* pOut) const - { - return ADDR_NOTSUPPORTED; - } - - /// Virtual function for Hwl to compute Dcc info - virtual ADDR_E_RETURNCODE HwlComputeDccInfo( - const ADDR_COMPUTE_DCCINFO_INPUT* pIn, - ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const - { - return ADDR_NOTSUPPORTED; - } - - /// Virtual function to get cmask address for tc compatible cmask - virtual ADDR_E_RETURNCODE HwlComputeCmaskAddrFromCoord( - const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, - ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const - { - return ADDR_NOTSUPPORTED; - } - // Compute attributes - - // HTILE - UINT_32 ComputeHtileInfo( - ADDR_HTILE_FLAGS flags, - UINT_32 pitchIn, UINT_32 heightIn, UINT_32 numSlices, - BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8, - ADDR_TILEINFO* pTileInfo, - UINT_32* pPitchOut, UINT_32* pHeightOut, UINT_64* pHtileBytes, - UINT_32* pMacroWidth = NULL, UINT_32* pMacroHeight = NULL, - UINT_64* pSliceSize = NULL, UINT_32* pBaseAlign = NULL) const; - - // CMASK - ADDR_E_RETURNCODE ComputeCmaskInfo( - ADDR_CMASK_FLAGS flags, - UINT_32 pitchIn, UINT_32 heightIn, UINT_32 numSlices, BOOL_32 isLinear, - ADDR_TILEINFO* pTileInfo, UINT_32* pPitchOut, UINT_32* pHeightOut, UINT_64* pCmaskBytes, - UINT_32* pMacroWidth, UINT_32* pMacroHeight, UINT_64* pSliceSize = NULL, - UINT_32* pBaseAlign = NULL, UINT_32* pBlockMax = NULL) const; - - virtual VOID HwlComputeTileDataWidthAndHeightLinear( - UINT_32* pMacroWidth, UINT_32* pMacroHeight, - UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const; - - // CMASK & HTILE addressing - virtual UINT_64 HwlComputeXmaskAddrFromCoord( - UINT_32 pitch, UINT_32 height, UINT_32 x, UINT_32 y, UINT_32 slice, - UINT_32 numSlices, UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, - BOOL_32 isHeight8, ADDR_TILEINFO* pTileInfo, - UINT_32* bitPosition) const; - - virtual VOID HwlComputeXmaskCoordFromAddr( - UINT_64 addr, UINT_32 bitPosition, UINT_32 pitch, UINT_32 height, UINT_32 numSlices, - UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8, - ADDR_TILEINFO* pTileInfo, UINT_32* pX, UINT_32* pY, UINT_32* pSlice) const; - - // Surface mipmap - VOID ComputeMipLevel( - ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const; - - /// Pure Virtual function for Hwl checking degrade for base level - virtual BOOL_32 HwlDegradeBaseLevel( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const = 0; - - virtual BOOL_32 HwlOverrideTileMode( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, - AddrTileMode* pTileMode, - AddrTileType* pTileType) const - { - // not supported in hwl layer, FALSE for not-overrided - return FALSE; - } - - AddrTileMode DegradeLargeThickTile(AddrTileMode tileMode, UINT_32 bpp) const; - - VOID PadDimensions( - AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, - UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 padDims, UINT_32 mipLevel, - UINT_32* pPitch, UINT_32 pitchAlign, UINT_32* pHeight, UINT_32 heightAlign, - UINT_32* pSlices, UINT_32 sliceAlign) const; - - virtual VOID HwlPadDimensions( - AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, - UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 padDims, UINT_32 mipLevel, - UINT_32* pPitch, UINT_32 pitchAlign, UINT_32* pHeight, UINT_32 heightAlign, - UINT_32* pSlices, UINT_32 sliceAlign) const - { - } - - // - // Addressing shared for linear/1D tiling - // - UINT_64 ComputeSurfaceAddrFromCoordLinear( - UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample, - UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSlices, - UINT_32* pBitPosition) const; - - VOID ComputeSurfaceCoordFromAddrLinear( - UINT_64 addr, UINT_32 bitPosition, UINT_32 bpp, - UINT_32 pitch, UINT_32 height, UINT_32 numSlices, - UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample) const; - - VOID ComputeSurfaceCoordFromAddrMicroTiled( - UINT_64 addr, UINT_32 bitPosition, - UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, - AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits, - UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample, - AddrTileType microTileType, BOOL_32 isDepthSampleOrder) const; - - UINT_32 ComputePixelIndexWithinMicroTile( - UINT_32 x, UINT_32 y, UINT_32 z, - UINT_32 bpp, AddrTileMode tileMode, AddrTileType microTileType) const; - - /// Pure Virtual function for Hwl computing coord from offset inside micro tile - virtual VOID HwlComputePixelCoordFromOffset( - UINT_32 offset, UINT_32 bpp, UINT_32 numSamples, - AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits, - UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample, - AddrTileType microTileType, BOOL_32 isDepthSampleOrder) const = 0; - - // - // Addressing shared by all - // - virtual UINT_32 HwlGetPipes( - const ADDR_TILEINFO* pTileInfo) const; - - UINT_32 ComputePipeFromAddr( - UINT_64 addr, UINT_32 numPipes) const; - - /// Pure Virtual function for Hwl computing pipe from coord - virtual UINT_32 ComputePipeFromCoord( - UINT_32 x, UINT_32 y, UINT_32 slice, AddrTileMode tileMode, - UINT_32 pipeSwizzle, BOOL_32 flags, ADDR_TILEINFO* pTileInfo) const = 0; - - /// Pure Virtual function for Hwl computing coord Y for 8 pipe cmask/htile - virtual UINT_32 HwlComputeXmaskCoordYFrom8Pipe( - UINT_32 pipe, UINT_32 x) const = 0; - - // - // Initialization - // - /// Pure Virtual function for Hwl computing internal global parameters from h/w registers - virtual BOOL_32 HwlInitGlobalParams( - const ADDR_CREATE_INPUT* pCreateIn) = 0; - - /// Pure Virtual function for Hwl converting chip family - virtual AddrChipFamily HwlConvertChipFamily(UINT_32 uChipFamily, UINT_32 uChipRevision) = 0; - - // - // Misc helper - // - static const AddrTileModeFlags m_modeFlags[ADDR_TM_COUNT]; - - static UINT_32 ComputeSurfaceThickness( - AddrTileMode tileMode); - - // Checking tile mode - static BOOL_32 IsMacroTiled(AddrTileMode tileMode); - static BOOL_32 IsMacro3dTiled(AddrTileMode tileMode); - static BOOL_32 IsLinear(AddrTileMode tileMode); - static BOOL_32 IsMicroTiled(AddrTileMode tileMode); - static BOOL_32 IsPrtTileMode(AddrTileMode tileMode); - static BOOL_32 IsPrtNoRotationTileMode(AddrTileMode tileMode); - - static UINT_32 Bits2Number(UINT_32 bitNum,...); - - static UINT_32 GetNumFragments(UINT_32 numSamples, UINT_32 numFrags) - { - return numFrags != 0 ? numFrags : Max(1u, numSamples); - } - - /// Returns pointer of AddrElemLib - AddrElemLib* GetElemLib() const - { - return m_pElemLib; - } - - /// Return TRUE if tile info is needed - BOOL_32 UseTileInfo() const - { - return !m_configFlags.ignoreTileInfo; - } - - /// Returns fillSizeFields flag - UINT_32 GetFillSizeFieldsFlags() const - { - return m_configFlags.fillSizeFields; - } - - /// Adjusts pitch alignment for flipping surface - VOID AdjustPitchAlignment( - ADDR_SURFACE_FLAGS flags, UINT_32* pPitchAlign) const; - - /// Overwrite tile config according to tile index - virtual ADDR_E_RETURNCODE HwlSetupTileCfg( - INT_32 index, INT_32 macroModeIndex, - ADDR_TILEINFO* pInfo, AddrTileMode* mode = NULL, AddrTileType* type = NULL) const; - - /// Overwrite macro tile config according to tile index - virtual INT_32 HwlComputeMacroModeIndex( - INT_32 index, ADDR_SURFACE_FLAGS flags, UINT_32 bpp, UINT_32 numSamples, - ADDR_TILEINFO* pTileInfo, AddrTileMode *pTileMode = NULL, AddrTileType *pTileType = NULL - ) const - { - return TileIndexNoMacroIndex; - } - - /// Pre-handler of 3x pitch (96 bit) adjustment - virtual UINT_32 HwlPreHandleBaseLvl3xPitch( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const; - /// Post-handler of 3x pitch adjustment - virtual UINT_32 HwlPostHandleBaseLvl3xPitch( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const; - /// Check miplevel after surface adjustment - ADDR_E_RETURNCODE PostComputeMipLevel( - ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; - - /// Quad buffer stereo support, has its implementation in ind. layer - virtual BOOL_32 ComputeQbStereoInfo( - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; - - /// Pure virutual function to compute stereo bank swizzle for right eye - virtual UINT_32 HwlComputeQbStereoRightSwizzle( - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0; - -private: - // Disallow the copy constructor - AddrLib(const AddrLib& a); - - // Disallow the assignment operator - AddrLib& operator=(const AddrLib& a); - - VOID SetAddrChipFamily(UINT_32 uChipFamily, UINT_32 uChipRevision); - - UINT_32 ComputeCmaskBaseAlign( - ADDR_CMASK_FLAGS flags, ADDR_TILEINFO* pTileInfo) const; - - UINT_64 ComputeCmaskBytes( - UINT_32 pitch, UINT_32 height, UINT_32 numSlices) const; - - // - // CMASK/HTILE shared methods - // - VOID ComputeTileDataWidthAndHeight( - UINT_32 bpp, UINT_32 cacheBits, ADDR_TILEINFO* pTileInfo, - UINT_32* pMacroWidth, UINT_32* pMacroHeight) const; - - UINT_32 ComputeXmaskCoordYFromPipe( - UINT_32 pipe, UINT_32 x) const; - - VOID SetMinPitchAlignPixels(UINT_32 minPitchAlignPixels); - - BOOL_32 DegradeBaseLevel( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, AddrTileMode* pTileMode) const; - -protected: - AddrLibClass m_class; ///< Store class type (HWL type) - - AddrChipFamily m_chipFamily; ///< Chip family translated from the one in atiid.h - - UINT_32 m_chipRevision; ///< Revision id from xxx_id.h - - UINT_32 m_version; ///< Current version - - // - // Global parameters - // - ADDR_CONFIG_FLAGS m_configFlags; ///< Global configuration flags. Note this is setup by - /// AddrLib instead of Client except forceLinearAligned - - UINT_32 m_pipes; ///< Number of pipes - UINT_32 m_banks; ///< Number of banks - /// For r800 this is MC_ARB_RAMCFG.NOOFBANK - /// Keep it here to do default parameter calculation - - UINT_32 m_pipeInterleaveBytes; - ///< Specifies the size of contiguous address space - /// within each tiling pipe when making linear - /// accesses. (Formerly Group Size) - - UINT_32 m_rowSize; ///< DRAM row size, in bytes - - UINT_32 m_minPitchAlignPixels; ///< Minimum pitch alignment in pixels - UINT_32 m_maxSamples; ///< Max numSamples -private: - AddrElemLib* m_pElemLib; ///< Element Lib pointer -}; - -AddrLib* AddrSIHwlInit (const AddrClient* pClient); -AddrLib* AddrCIHwlInit (const AddrClient* pClient); - -#endif - diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/core/addrobject.cpp mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/core/addrobject.cpp --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/core/addrobject.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/core/addrobject.cpp 1970-01-01 00:00:00.000000000 +0000 @@ -1,246 +0,0 @@ -/* - * Copyright © 2014 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ - -/** -*************************************************************************************************** -* @file addrobject.cpp -* @brief Contains the AddrObject base class implementation. -*************************************************************************************************** -*/ - -#include "addrinterface.h" -#include "addrobject.h" - -/** -*************************************************************************************************** -* AddrObject::AddrObject -* -* @brief -* Constructor for the AddrObject class. -*************************************************************************************************** -*/ -AddrObject::AddrObject() -{ - m_client.handle = NULL; - m_client.callbacks.allocSysMem = NULL; - m_client.callbacks.freeSysMem = NULL; - m_client.callbacks.debugPrint = NULL; -} - -/** -*************************************************************************************************** -* AddrObject::AddrObject -* -* @brief -* Constructor for the AddrObject class. -*************************************************************************************************** -*/ -AddrObject::AddrObject(const AddrClient* pClient) -{ - m_client = *pClient; -} - -/** -*************************************************************************************************** -* AddrObject::~AddrObject -* -* @brief -* Destructor for the AddrObject class. -*************************************************************************************************** -*/ -AddrObject::~AddrObject() -{ -} - -/** -*************************************************************************************************** -* AddrObject::ClientAlloc -* -* @brief -* Calls instanced allocSysMem inside AddrClient -*************************************************************************************************** -*/ -VOID* AddrObject::ClientAlloc( - size_t objSize, ///< [in] Size to allocate - const AddrClient* pClient) ///< [in] Client pointer -{ - VOID* pObjMem = NULL; - - if (pClient->callbacks.allocSysMem != NULL) - { - ADDR_ALLOCSYSMEM_INPUT allocInput = {0}; - - allocInput.size = sizeof(ADDR_ALLOCSYSMEM_INPUT); - allocInput.flags.value = 0; - allocInput.sizeInBytes = static_cast(objSize); - allocInput.hClient = pClient->handle; - - pObjMem = pClient->callbacks.allocSysMem(&allocInput); - } - - return pObjMem; -} - -/** -*************************************************************************************************** -* AddrObject::AddrMalloc -* -* @brief -* A wrapper of ClientAlloc -*************************************************************************************************** -*/ -VOID* AddrObject::AddrMalloc( - size_t objSize) const ///< [in] Size to allocate -{ - return ClientAlloc(objSize, &m_client); -} - -/** -*************************************************************************************************** -* AddrObject::ClientFree -* -* @brief -* Calls freeSysMem inside AddrClient -*************************************************************************************************** -*/ -VOID AddrObject::ClientFree( - VOID* pObjMem, ///< [in] User virtual address to free. - const AddrClient* pClient) ///< [in] Client pointer -{ - if (pClient->callbacks.freeSysMem != NULL) - { - if (pObjMem != NULL) - { - ADDR_FREESYSMEM_INPUT freeInput = {0}; - - freeInput.size = sizeof(ADDR_FREESYSMEM_INPUT); - freeInput.hClient = pClient->handle; - freeInput.pVirtAddr = pObjMem; - - pClient->callbacks.freeSysMem(&freeInput); - } - } -} - -/** -*************************************************************************************************** -* AddrObject::AddrFree -* -* @brief -* A wrapper of ClientFree -*************************************************************************************************** -*/ -VOID AddrObject::AddrFree( - VOID* pObjMem) const ///< [in] User virtual address to free. -{ - ClientFree(pObjMem, &m_client); -} - -/** -*************************************************************************************************** -* AddrObject::operator new -* -* @brief -* Allocates memory needed for AddrObject object. (with ADDR_CLIENT_HANDLE) -* -* @return -* Returns NULL if unsuccessful. -*************************************************************************************************** -*/ -VOID* AddrObject::operator new( - size_t objSize, ///< [in] Size to allocate - const AddrClient* pClient) ///< [in] Client pointer -{ - return ClientAlloc(objSize, pClient); -} - - -/** -*************************************************************************************************** -* AddrObject::operator delete -* -* @brief -* Frees AddrObject object memory. -*************************************************************************************************** -*/ -VOID AddrObject::operator delete( - VOID* pObjMem, ///< [in] User virtual address to free. - const AddrClient* pClient) ///< [in] Client handle -{ - ClientFree(pObjMem, pClient); -} - -/** -*************************************************************************************************** -* AddrObject::operator delete -* -* @brief -* Frees AddrObject object memory. -*************************************************************************************************** -*/ -VOID AddrObject::operator delete( - VOID* pObjMem) ///< [in] User virtual address to free. -{ - AddrObject* pObj = static_cast(pObjMem); - ClientFree(pObjMem, &pObj->m_client); -} - -/** -*************************************************************************************************** -* AddrObject::DebugPrint -* -* @brief -* Print debug message -* -* @return -* N/A -*************************************************************************************************** -*/ -VOID AddrObject::DebugPrint( - const CHAR* pDebugString, ///< [in] Debug string - ...) const -{ -#if DEBUG - if (m_client.callbacks.debugPrint != NULL) - { - va_list ap; - - va_start(ap, pDebugString); - - ADDR_DEBUGPRINT_INPUT debugPrintInput = {0}; - - debugPrintInput.size = sizeof(ADDR_DEBUGPRINT_INPUT); - debugPrintInput.pDebugString = const_cast(pDebugString); - debugPrintInput.hClient = m_client.handle; - va_copy(debugPrintInput.ap, ap); - - m_client.callbacks.debugPrint(&debugPrintInput); - - va_end(ap); - } -#endif -} - diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/core/addrobject.h mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/core/addrobject.h --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/core/addrobject.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/core/addrobject.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,89 +0,0 @@ -/* - * Copyright © 2014 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ - -/** -*************************************************************************************************** -* @file addrobject.h -* @brief Contains the AddrObject base class definition. -*************************************************************************************************** -*/ - -#ifndef __ADDR_OBJECT_H__ -#define __ADDR_OBJECT_H__ - -#include "addrtypes.h" -#include "addrcommon.h" - -/** -*************************************************************************************************** -* @brief This structure contains client specific data -*************************************************************************************************** -*/ -struct AddrClient -{ - ADDR_CLIENT_HANDLE handle; - ADDR_CALLBACKS callbacks; -}; -/** -*************************************************************************************************** -* @brief This class is the base class for all ADDR class objects. -*************************************************************************************************** -*/ -class AddrObject -{ -public: - AddrObject(); - AddrObject(const AddrClient* pClient); - virtual ~AddrObject(); - - VOID* operator new(size_t size, const AddrClient* pClient); - VOID operator delete(VOID* pObj, const AddrClient* pClient); - VOID operator delete(VOID* pObj); - VOID* AddrMalloc(size_t size) const; - VOID AddrFree(VOID* pObj) const; - - VOID DebugPrint( - const CHAR* pDebugString, - ...) const; - - const AddrClient* GetClient() const {return &m_client;} - -protected: - AddrClient m_client; - -private: - static VOID* ClientAlloc(size_t size, const AddrClient* pClient); - static VOID ClientFree(VOID* pObj, const AddrClient* pClient); - - // disallow the copy constructor - AddrObject(const AddrObject& a); - - // disallow the assignment operator - AddrObject& operator=(const AddrObject& a); -}; - -#endif - diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/inc/chip/r800/si_gb_reg.h mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/inc/chip/r800/si_gb_reg.h --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/inc/chip/r800/si_gb_reg.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/inc/chip/r800/si_gb_reg.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,155 +0,0 @@ -#if !defined (__SI_GB_REG_H__) -#define __SI_GB_REG_H__ - -/* - * Copyright © 2014 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ - -// -// Make sure the necessary endian defines are there. -// -#if defined(LITTLEENDIAN_CPU) -#elif defined(BIGENDIAN_CPU) -#else -#error "BIGENDIAN_CPU or LITTLEENDIAN_CPU must be defined" -#endif - -/* - * GB_ADDR_CONFIG struct - */ - -#if defined(LITTLEENDIAN_CPU) - - typedef struct _GB_ADDR_CONFIG_T { - unsigned int num_pipes : 3; - unsigned int : 1; - unsigned int pipe_interleave_size : 3; - unsigned int : 1; - unsigned int bank_interleave_size : 3; - unsigned int : 1; - unsigned int num_shader_engines : 2; - unsigned int : 2; - unsigned int shader_engine_tile_size : 3; - unsigned int : 1; - unsigned int num_gpus : 3; - unsigned int : 1; - unsigned int multi_gpu_tile_size : 2; - unsigned int : 2; - unsigned int row_size : 2; - unsigned int num_lower_pipes : 1; - unsigned int : 1; - } GB_ADDR_CONFIG_T; - -#elif defined(BIGENDIAN_CPU) - - typedef struct _GB_ADDR_CONFIG_T { - unsigned int : 1; - unsigned int num_lower_pipes : 1; - unsigned int row_size : 2; - unsigned int : 2; - unsigned int multi_gpu_tile_size : 2; - unsigned int : 1; - unsigned int num_gpus : 3; - unsigned int : 1; - unsigned int shader_engine_tile_size : 3; - unsigned int : 2; - unsigned int num_shader_engines : 2; - unsigned int : 1; - unsigned int bank_interleave_size : 3; - unsigned int : 1; - unsigned int pipe_interleave_size : 3; - unsigned int : 1; - unsigned int num_pipes : 3; - } GB_ADDR_CONFIG_T; - -#endif - -typedef union { - unsigned int val : 32; - GB_ADDR_CONFIG_T f; -} GB_ADDR_CONFIG; - -#if defined(LITTLEENDIAN_CPU) - - typedef struct _GB_TILE_MODE_T { - unsigned int micro_tile_mode : 2; - unsigned int array_mode : 4; - unsigned int pipe_config : 5; - unsigned int tile_split : 3; - unsigned int bank_width : 2; - unsigned int bank_height : 2; - unsigned int macro_tile_aspect : 2; - unsigned int num_banks : 2; - unsigned int micro_tile_mode_new : 3; - unsigned int sample_split : 2; - unsigned int : 5; - } GB_TILE_MODE_T; - - typedef struct _GB_MACROTILE_MODE_T { - unsigned int bank_width : 2; - unsigned int bank_height : 2; - unsigned int macro_tile_aspect : 2; - unsigned int num_banks : 2; - unsigned int : 24; - } GB_MACROTILE_MODE_T; - -#elif defined(BIGENDIAN_CPU) - - typedef struct _GB_TILE_MODE_T { - unsigned int : 5; - unsigned int sample_split : 2; - unsigned int micro_tile_mode_new : 3; - unsigned int num_banks : 2; - unsigned int macro_tile_aspect : 2; - unsigned int bank_height : 2; - unsigned int bank_width : 2; - unsigned int tile_split : 3; - unsigned int pipe_config : 5; - unsigned int array_mode : 4; - unsigned int micro_tile_mode : 2; - } GB_TILE_MODE_T; - - typedef struct _GB_MACROTILE_MODE_T { - unsigned int : 24; - unsigned int num_banks : 2; - unsigned int macro_tile_aspect : 2; - unsigned int bank_height : 2; - unsigned int bank_width : 2; - } GB_MACROTILE_MODE_T; - -#endif - -typedef union { - unsigned int val : 32; - GB_TILE_MODE_T f; -} GB_TILE_MODE; - -typedef union { - unsigned int val : 32; - GB_MACROTILE_MODE_T f; -} GB_MACROTILE_MODE; - -#endif - diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/inc/lnx_common_defs.h mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/inc/lnx_common_defs.h --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/inc/lnx_common_defs.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/inc/lnx_common_defs.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,129 +0,0 @@ -/* - * Copyright © 2014 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ -#ifndef _lnx_common_defs_h_ -#define _lnx_common_defs_h_ - -#if DBG -#include // We do not have any choice: need variable - // number of parameters support for debug - // build. -#endif // #if DBG - -// -// -------------- External functions from Linux kernel driver ---------------- -// -// Note: The definitions/declararions below must match the original ones. - -#ifdef __cplusplus -extern "C" { -#endif - -typedef unsigned long __ke_size_t; // as it is defined in firegl_public.h -typedef int __kernel_ptrdiff_t; // as it is defined in posix_types.h - - -#if !defined(ATI_API_CALL) -#define ATI_API_CALL __attribute__((regparm(0))) -#endif - -extern void * ATI_API_CALL __ke_memset(void* s, int c, __ke_size_t count); -extern void * ATI_API_CALL __ke_memcpy(void* d, const void* s, __ke_size_t count); -extern ATI_API_CALL __ke_size_t __ke_strlen(const char *s); -extern char* ATI_API_CALL __ke_strcpy(char* d, const char* s); -extern char* ATI_API_CALL __ke_strncpy(char* d, const char* s, __ke_size_t count); -extern void __ke_printk(const char* fmt, ...); - -extern int ATI_API_CALL __ke_snprintf(char* buf, __ke_size_t size, const char* fmt, ...); -extern int ATI_API_CALL KCL_CopyFromUserSpace(void* to, const void* from, __ke_size_t size); -extern int ATI_API_CALL KCL_CopyToUserSpace(void* to, const void* from, __ke_size_t size); -#define __ke_copy_from_user KCL_CopyFromUserSpace -#define __ke_copy_to_user KCL_CopyToUserSpace -extern int ATI_API_CALL __ke_verify_area(int type, const void * addr, unsigned long size); - -extern unsigned long ATI_API_CALL KAS_GetTickCounter(void); -extern unsigned long ATI_API_CALL KAS_GetTicksPerSecond(void); - - -#if DBG -extern int ATI_API_CALL __ke_vsnprintf(char *buf, __ke_size_t size, const char *fmt, va_list ap); -#define vsnprintf(_dst, _size, _fmt, varg) __ke_snprintf(_dst, _size, _fmt, varg) -#endif // #if DBG - - -// Note: This function is not defined in firegl_public.h. -void firegl_hardwareHangRecovery(void); - -#ifdef __cplusplus -} -#endif - -// -// -------------------------- C/C++ standard typedefs ---------------------------- -// -#ifdef __SIZE_TYPE__ -typedef __SIZE_TYPE__ size_t; -#else // #ifdef __SIZE_TYPE__ -typedef unsigned int size_t; -#endif // #ifdef __SIZE_TYPE__ - -#ifdef __PTRDIFF_TYPE__ -typedef __PTRDIFF_TYPE__ ptrdiff_t; -#else // #ifdef __PTRDIFF_TYPE__ -typedef int ptrdiff_t; -#endif // #ifdef __PTRDIFF_TYPE__ - -#ifndef NULL -#ifdef __cplusplus -#define NULL __null -#else -#define NULL ((void *)0) -#endif -#endif - - -// -// ------------------------- C/C++ standard macros --------------------------- -// - -#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER) // as it is defined in stddef.h -#define CHAR_BIT 8 // as it is defined in limits.h - -// -// --------------------------------- C RTL ----------------------------------- -// - -#define memset(_p, _v, _n) __ke_memset(_p, _v, _n) -#define memcpy(_d, _s, _n) __ke_memcpy(_d, _s, _n) -#define strlen(_s) __ke_strlen(_s) -#define strcpy(_d, _s) __ke_strcpy(_d, _s) -#define strncpy(_d, _s, _n) __ke_strncpy(_d, _s, _n) -// Note: C99 supports macros with variable number of arguments. GCC also supports this C99 feature as -// C++ extension. -#define snprintf(_dst, _size, _fmt, arg...) __ke_snprintf(_dst, _size, _fmt, ##arg) - - -#endif // #ifdef _lnx_common_defs_h_ - diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/r800/chip/si_ci_vi_merged_enum.h mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/r800/chip/si_ci_vi_merged_enum.h --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/r800/chip/si_ci_vi_merged_enum.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/r800/chip/si_ci_vi_merged_enum.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,40 +0,0 @@ -/* - * Copyright © 2014 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ -#if !defined (SI_CI_VI_MERGED_ENUM_HEADER) -#define SI_CI_VI_MERGED_ENUM_HEADER - -typedef enum PipeInterleaveSize { -ADDR_CONFIG_PIPE_INTERLEAVE_256B = 0x00000000, -ADDR_CONFIG_PIPE_INTERLEAVE_512B = 0x00000001, -} PipeInterleaveSize; - -typedef enum RowSize { -ADDR_CONFIG_1KB_ROW = 0x00000000, -ADDR_CONFIG_2KB_ROW = 0x00000001, -ADDR_CONFIG_4KB_ROW = 0x00000002, -} RowSize; - -#endif diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.cpp mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.cpp --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.cpp 1970-01-01 00:00:00.000000000 +0000 @@ -1,1831 +0,0 @@ -/* - * Copyright © 2014 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ - -/** -*************************************************************************************************** -* @file ciaddrlib.cpp -* @brief Contains the implementation for the CIAddrLib class. -*************************************************************************************************** -*/ - -#include "ciaddrlib.h" - -#include "si_gb_reg.h" - -#include "si_ci_vi_merged_enum.h" - -#if BRAHMA_BUILD -#include "amdgpu_id.h" -#else -#include "ci_id.h" -#include "kv_id.h" -#include "vi_id.h" -#endif - -/////////////////////////////////////////////////////////////////////////////////////////////////// -/////////////////////////////////////////////////////////////////////////////////////////////////// - -/** -*************************************************************************************************** -* AddrMask -* -* @brief -* Gets a mask of "width" -* @return -* Bit mask -*************************************************************************************************** -*/ -static UINT_64 AddrMask( - UINT_32 width) ///< Width of bits -{ - UINT_64 ret; - - if (width >= sizeof(UINT_64)*8) - { - ret = ~((UINT_64) 0); - } - else - { - return (((UINT_64) 1) << width) - 1; - } - return ret; -} - -/** -*************************************************************************************************** -* AddrGetBits -* -* @brief -* Gets bits within a range of [msb, lsb] -* @return -* Bits of this range -*************************************************************************************************** -*/ -static UINT_64 AddrGetBits( - UINT_64 bits, ///< Source bits - UINT_32 msb, ///< Most signicant bit - UINT_32 lsb) ///< Least signicant bit -{ - UINT_64 ret = 0; - - if (msb >= lsb) - { - ret = (bits >> lsb) & (AddrMask(1 + msb - lsb)); - } - return ret; -} - -/** -*************************************************************************************************** -* AddrRemoveBits -* -* @brief -* Removes bits within the range of [msb, lsb] -* @return -* Modified bits -*************************************************************************************************** -*/ -static UINT_64 AddrRemoveBits( - UINT_64 bits, ///< Source bits - UINT_32 msb, ///< Most signicant bit - UINT_32 lsb) ///< Least signicant bit -{ - UINT_64 ret = bits; - - if (msb >= lsb) - { - ret = AddrGetBits(bits, lsb - 1, 0) // low bits - | (AddrGetBits(bits, 8 * sizeof(bits) - 1, msb + 1) << lsb); //high bits - } - return ret; -} - -/** -*************************************************************************************************** -* AddrInsertBits -* -* @brief -* Inserts new bits into the range of [msb, lsb] -* @return -* Modified bits -*************************************************************************************************** -*/ -static UINT_64 AddrInsertBits( - UINT_64 bits, ///< Source bits - UINT_64 newBits, ///< New bits to be inserted - UINT_32 msb, ///< Most signicant bit - UINT_32 lsb) ///< Least signicant bit -{ - UINT_64 ret = bits; - - if (msb >= lsb) - { - ret = AddrGetBits(bits, lsb - 1, 0) // old low bitss - | (AddrGetBits(newBits, msb - lsb, 0) << lsb) //new bits - | (AddrGetBits(bits, 8 * sizeof(bits) - 1, lsb) << (msb + 1)); //old high bits - } - return ret; -} - - -/** -*************************************************************************************************** -* AddrCIHwlInit -* -* @brief -* Creates an CIAddrLib object. -* -* @return -* Returns an CIAddrLib object pointer. -*************************************************************************************************** -*/ -AddrLib* AddrCIHwlInit(const AddrClient* pClient) -{ - return CIAddrLib::CreateObj(pClient); -} - -/** -*************************************************************************************************** -* CIAddrLib::CIAddrLib -* -* @brief -* Constructor -* -*************************************************************************************************** -*/ -CIAddrLib::CIAddrLib(const AddrClient* pClient) : - SIAddrLib(pClient), - m_noOfMacroEntries(0), - m_allowNonDispThickModes(FALSE) -{ - m_class = CI_ADDRLIB; - memset(&m_settings, 0, sizeof(m_settings)); -} - -/** -*************************************************************************************************** -* CIAddrLib::~CIAddrLib -* -* @brief -* Destructor -*************************************************************************************************** -*/ -CIAddrLib::~CIAddrLib() -{ -} - -/** -*************************************************************************************************** -* CIAddrLib::HwlComputeDccInfo -* -* @brief -* Compute DCC key size, base alignment -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE CIAddrLib::HwlComputeDccInfo( - const ADDR_COMPUTE_DCCINFO_INPUT* pIn, - ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - if (m_settings.isVolcanicIslands && IsMacroTiled(pIn->tileMode)) - { - UINT_64 dccFastClearSize = pIn->colorSurfSize >> 8; - - ADDR_ASSERT(0 == (pIn->colorSurfSize & 0xff)); - - if (pIn->numSamples > 1) - { - UINT_32 tileSizePerSample = BITS_TO_BYTES(pIn->bpp * MicroTileWidth * MicroTileHeight); - UINT_32 samplesPerSplit = pIn->tileInfo.tileSplitBytes / tileSizePerSample; - - if (samplesPerSplit < pIn->numSamples) - { - UINT_32 numSplits = pIn->numSamples / samplesPerSplit; - UINT_32 fastClearBaseAlign = HwlGetPipes(&pIn->tileInfo) * m_pipeInterleaveBytes; - - ADDR_ASSERT(IsPow2(fastClearBaseAlign)); - - dccFastClearSize /= numSplits; - - if (0 != (dccFastClearSize & (fastClearBaseAlign - 1))) - { - // Disable dcc fast clear - // if key size of fisrt sample split is not pipe*interleave aligned - dccFastClearSize = 0; - } - } - } - - pOut->dccRamSize = pIn->colorSurfSize >> 8; - pOut->dccRamBaseAlign = pIn->tileInfo.banks * - HwlGetPipes(&pIn->tileInfo) * - m_pipeInterleaveBytes; - pOut->dccFastClearSize = dccFastClearSize; - - ADDR_ASSERT(IsPow2(pOut->dccRamBaseAlign)); - - if (0 == (pOut->dccRamSize & (pOut->dccRamBaseAlign - 1))) - { - pOut->subLvlCompressible = TRUE; - } - else - { - UINT_64 dccRamSizeAlign = HwlGetPipes(&pIn->tileInfo) * m_pipeInterleaveBytes; - - if (pOut->dccRamSize == pOut->dccFastClearSize) - { - pOut->dccFastClearSize = PowTwoAlign(pOut->dccRamSize, dccRamSizeAlign); - } - pOut->dccRamSize = PowTwoAlign(pOut->dccRamSize, dccRamSizeAlign); - pOut->subLvlCompressible = FALSE; - } - } - else - { - returnCode = ADDR_NOTSUPPORTED; - } - - return returnCode; -} - -/** -*************************************************************************************************** -* CIAddrLib::HwlComputeCmaskAddrFromCoord -* -* @brief -* Compute tc compatible Cmask address from fmask ram address -* -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE CIAddrLib::HwlComputeCmaskAddrFromCoord( - const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] fmask addr/bpp/tile input - ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut ///< [out] cmask address - ) const -{ - ADDR_E_RETURNCODE returnCode = ADDR_NOTSUPPORTED; - - if ((m_settings.isVolcanicIslands == TRUE) && - (pIn->flags.tcCompatible == TRUE)) - { - UINT_32 numOfPipes = HwlGetPipes(pIn->pTileInfo); - UINT_32 numOfBanks = pIn->pTileInfo->banks; - UINT_64 fmaskAddress = pIn->fmaskAddr; - UINT_32 elemBits = pIn->bpp; - UINT_32 blockByte = 64 * elemBits / 8; - UINT_64 metaNibbleAddress = HwlComputeMetadataNibbleAddress(fmaskAddress, - 0, - 0, - 4, - elemBits, - blockByte, - m_pipeInterleaveBytes, - numOfPipes, - numOfBanks, - 1); - pOut->addr = (metaNibbleAddress >> 1); - pOut->bitPosition = (metaNibbleAddress % 2) ? 4 : 0; - returnCode = ADDR_OK; - } - - return returnCode; -} -/** -*************************************************************************************************** -* CIAddrLib::HwlConvertChipFamily -* -* @brief -* Convert familyID defined in atiid.h to AddrChipFamily and set m_chipFamily/m_chipRevision -* @return -* AddrChipFamily -*************************************************************************************************** -*/ -AddrChipFamily CIAddrLib::HwlConvertChipFamily( - UINT_32 uChipFamily, ///< [in] chip family defined in atiih.h - UINT_32 uChipRevision) ///< [in] chip revision defined in "asic_family"_id.h -{ - AddrChipFamily family = ADDR_CHIP_FAMILY_CI; - - switch (uChipFamily) - { - case FAMILY_CI: - m_settings.isSeaIsland = 1; - m_settings.isBonaire = ASICREV_IS_BONAIRE_M(uChipRevision); - m_settings.isHawaii = ASICREV_IS_HAWAII_P(uChipRevision); - break; - case FAMILY_KV: - m_settings.isKaveri = 1; - m_settings.isSpectre = ASICREV_IS_SPECTRE(uChipRevision); - m_settings.isSpooky = ASICREV_IS_SPOOKY(uChipRevision); - m_settings.isKalindi = ASICREV_IS_KALINDI(uChipRevision); - break; - case FAMILY_VI: - m_settings.isVolcanicIslands = 1; - m_settings.isIceland = ASICREV_IS_ICELAND_M(uChipRevision); - m_settings.isTonga = ASICREV_IS_TONGA_P(uChipRevision); - m_settings.isFiji = ASICREV_IS_FIJI_P(uChipRevision); - m_settings.isPolaris10 = ASICREV_IS_POLARIS10_P(uChipRevision); - m_settings.isPolaris11 = ASICREV_IS_POLARIS11_M(uChipRevision); - break; - case FAMILY_CZ: - m_settings.isCarrizo = 1; - m_settings.isVolcanicIslands = 1; - break; - default: - ADDR_ASSERT(!"This should be a unexpected Fusion"); - break; - } - - return family; -} - -/** -*************************************************************************************************** -* CIAddrLib::HwlInitGlobalParams -* -* @brief -* Initializes global parameters -* -* @return -* TRUE if all settings are valid -* -*************************************************************************************************** -*/ -BOOL_32 CIAddrLib::HwlInitGlobalParams( - const ADDR_CREATE_INPUT* pCreateIn) ///< [in] create input -{ - BOOL_32 valid = TRUE; - - const ADDR_REGISTER_VALUE* pRegValue = &pCreateIn->regValue; - - valid = DecodeGbRegs(pRegValue); - - // The following assignments for m_pipes is only for fail-safe, InitTileSettingTable should - // read the correct pipes from tile mode table - if (m_settings.isHawaii) - { - // Hawaii has 16-pipe, see GFXIP_Config_Summary.xls - m_pipes = 16; - } - else if (m_settings.isBonaire || m_settings.isSpectre) - { - m_pipes = 4; - } - else // Treat other KV asics to be 2-pipe - { - m_pipes = 2; - } - - // @todo: VI - // Move this to VI code path once created - if (m_settings.isTonga || m_settings.isPolaris10) - { - m_pipes = 8; - } - else if (m_settings.isIceland) - { - m_pipes = 2; - } - else if (m_settings.isFiji) - { - m_pipes = 16; - } - else if (m_settings.isPolaris11) - { - m_pipes = 4; - } - - if (valid) - { - valid = InitTileSettingTable(pRegValue->pTileConfig, pRegValue->noOfEntries); - } - if (valid) - { - valid = InitMacroTileCfgTable(pRegValue->pMacroTileConfig, pRegValue->noOfMacroEntries); - } - - return valid; -} - -/** -*************************************************************************************************** -* CIAddrLib::HwlPostCheckTileIndex -* -* @brief -* Map a tile setting to index if curIndex is invalid, otherwise check if curIndex matches -* tile mode/type/info and change the index if needed -* @return -* Tile index. -*************************************************************************************************** -*/ -INT_32 CIAddrLib::HwlPostCheckTileIndex( - const ADDR_TILEINFO* pInfo, ///< [in] Tile Info - AddrTileMode mode, ///< [in] Tile mode - AddrTileType type, ///< [in] Tile type - INT curIndex ///< [in] Current index assigned in HwlSetupTileInfo - ) const -{ - INT_32 index = curIndex; - - if (mode == ADDR_TM_LINEAR_GENERAL) - { - index = TileIndexLinearGeneral; - } - else - { - BOOL_32 macroTiled = IsMacroTiled(mode); - - // We need to find a new index if either of them is true - // 1. curIndex is invalid - // 2. tile mode is changed - // 3. tile info does not match for macro tiled - if ((index == TileIndexInvalid) || - (mode != m_tileTable[index].mode) || - (macroTiled && pInfo->pipeConfig != m_tileTable[index].info.pipeConfig)) - { - for (index = 0; index < static_cast(m_noOfEntries); index++) - { - if (macroTiled) - { - // macro tile modes need all to match - if ((pInfo->pipeConfig == m_tileTable[index].info.pipeConfig) && - (mode == m_tileTable[index].mode) && - (type == m_tileTable[index].type)) - { - // tileSplitBytes stored in m_tileTable is only valid for depth entries - if (type == ADDR_DEPTH_SAMPLE_ORDER) - { - if (pInfo->tileSplitBytes == m_tileTable[index].info.tileSplitBytes) - { - break; - } - } - else // other entries are determined by other 3 fields - { - break; - } - } - } - else if (mode == ADDR_TM_LINEAR_ALIGNED) - { - // linear mode only needs tile mode to match - if (mode == m_tileTable[index].mode) - { - break; - } - } - else - { - // micro tile modes only need tile mode and tile type to match - if (mode == m_tileTable[index].mode && - type == m_tileTable[index].type) - { - break; - } - } - } - } - } - - ADDR_ASSERT(index < static_cast(m_noOfEntries)); - - if (index >= static_cast(m_noOfEntries)) - { - index = TileIndexInvalid; - } - - return index; -} - -/** -*************************************************************************************************** -* CIAddrLib::HwlSetupTileCfg -* -* @brief -* Map tile index to tile setting. -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE CIAddrLib::HwlSetupTileCfg( - INT_32 index, ///< [in] Tile index - INT_32 macroModeIndex, ///< [in] Index in macro tile mode table(CI) - ADDR_TILEINFO* pInfo, ///< [out] Tile Info - AddrTileMode* pMode, ///< [out] Tile mode - AddrTileType* pType ///< [out] Tile type - ) const -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - // Global flag to control usage of tileIndex - if (UseTileIndex(index)) - { - if (static_cast(index) >= m_noOfEntries) - { - returnCode = ADDR_INVALIDPARAMS; - } - else - { - const ADDR_TILECONFIG* pCfgTable = GetTileSetting(index); - - if (pInfo != NULL) - { - if (IsMacroTiled(pCfgTable->mode)) - { - ADDR_ASSERT(((macroModeIndex != TileIndexInvalid) - && (macroModeIndex != TileIndexNoMacroIndex))); - // Here we used tile_bytes to replace of tile_split - // According info as below: - // "tile_split_c = MIN(ROW_SIZE, tile_split) - // "tile_bytes = MIN(tile_split_c, num_samples * tile_bytes_1x) - // when using tile_bytes replacing of tile_split, the result of - // alignment and others(such as slicesPerTile) are unaffected - - // since if tile_split_c is larger, split won't happen, otherwise - // (num_samples * tile_bytes_1x is larger), a correct tile_split is - // returned. - *pInfo = m_macroTileTable[macroModeIndex]; - - if (pCfgTable->type == ADDR_DEPTH_SAMPLE_ORDER) - { - pInfo->tileSplitBytes = pCfgTable->info.tileSplitBytes; - } - pInfo->pipeConfig = pCfgTable->info.pipeConfig; - } - else // 1D and linear modes, we return default value stored in table - { - *pInfo = pCfgTable->info; - } - } - - if (pMode != NULL) - { - *pMode = pCfgTable->mode; - } - - if (pType != NULL) - { - *pType = pCfgTable->type; - } - } - } - - return returnCode; -} - -/** -*************************************************************************************************** -* CIAddrLib::HwlComputeSurfaceInfo -* -* @brief -* Entry of ci's ComputeSurfaceInfo -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE CIAddrLib::HwlComputeSurfaceInfo( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure - ) const -{ - // If tileIndex is invalid, force macroModeIndex to be invalid, too - if (pIn->tileIndex == TileIndexInvalid) - { - pOut->macroModeIndex = TileIndexInvalid; - } - - ADDR_E_RETURNCODE retCode = SIAddrLib::HwlComputeSurfaceInfo(pIn,pOut); - - if (pOut->macroModeIndex == TileIndexNoMacroIndex) - { - pOut->macroModeIndex = TileIndexInvalid; - } - - return retCode; -} - -/** -*************************************************************************************************** -* CIAddrLib::HwlFmaskSurfaceInfo -* @brief -* Entry of r800's ComputeFmaskInfo -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE CIAddrLib::HwlComputeFmaskInfo( - const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut ///< [out] output structure - ) -{ - ADDR_E_RETURNCODE retCode = ADDR_OK; - - ADDR_TILEINFO tileInfo = {0}; - ADDR_COMPUTE_FMASK_INFO_INPUT fmaskIn; - fmaskIn = *pIn; - - AddrTileMode tileMode = pIn->tileMode; - - // Use internal tile info if pOut does not have a valid pTileInfo - if (pOut->pTileInfo == NULL) - { - pOut->pTileInfo = &tileInfo; - } - - ADDR_ASSERT(tileMode == ADDR_TM_2D_TILED_THIN1 || - tileMode == ADDR_TM_3D_TILED_THIN1 || - tileMode == ADDR_TM_PRT_TILED_THIN1 || - tileMode == ADDR_TM_PRT_2D_TILED_THIN1 || - tileMode == ADDR_TM_PRT_3D_TILED_THIN1); - - ADDR_ASSERT(m_tileTable[14].mode == ADDR_TM_2D_TILED_THIN1); - ADDR_ASSERT(m_tileTable[15].mode == ADDR_TM_3D_TILED_THIN1); - - // The only valid tile modes for fmask are 2D_THIN1 and 3D_THIN1 plus non-displayable - INT_32 tileIndex = tileMode == ADDR_TM_2D_TILED_THIN1 ? 14 : 15; - ADDR_SURFACE_FLAGS flags = {{0}}; - flags.fmask = 1; - - INT_32 macroModeIndex = TileIndexInvalid; - - UINT_32 numSamples = pIn->numSamples; - UINT_32 numFrags = pIn->numFrags == 0 ? numSamples : pIn->numFrags; - - UINT_32 bpp = QLog2(numFrags); - - // EQAA needs one more bit - if (numSamples > numFrags) - { - bpp++; - } - - if (bpp == 3) - { - bpp = 4; - } - - bpp = Max(8u, bpp * numSamples); - - macroModeIndex = HwlComputeMacroModeIndex(tileIndex, flags, bpp, numSamples, pOut->pTileInfo); - - fmaskIn.tileIndex = tileIndex; - fmaskIn.pTileInfo = pOut->pTileInfo; - pOut->macroModeIndex = macroModeIndex; - pOut->tileIndex = tileIndex; - - retCode = DispatchComputeFmaskInfo(&fmaskIn, pOut); - - if (retCode == ADDR_OK) - { - pOut->tileIndex = - HwlPostCheckTileIndex(pOut->pTileInfo, pIn->tileMode, ADDR_NON_DISPLAYABLE, - pOut->tileIndex); - } - - // Resets pTileInfo to NULL if the internal tile info is used - if (pOut->pTileInfo == &tileInfo) - { - pOut->pTileInfo = NULL; - } - - return retCode; -} - -/** -*************************************************************************************************** -* CIAddrLib::HwlFmaskPreThunkSurfInfo -* -* @brief -* Some preparation before thunking a ComputeSurfaceInfo call for Fmask -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -VOID CIAddrLib::HwlFmaskPreThunkSurfInfo( - const ADDR_COMPUTE_FMASK_INFO_INPUT* pFmaskIn, ///< [in] Input of fmask info - const ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut, ///< [in] Output of fmask info - ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfIn, ///< [out] Input of thunked surface info - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut ///< [out] Output of thunked surface info - ) const -{ - pSurfIn->tileIndex = pFmaskIn->tileIndex; - pSurfOut->macroModeIndex = pFmaskOut->macroModeIndex; -} - -/** -*************************************************************************************************** -* CIAddrLib::HwlFmaskPostThunkSurfInfo -* -* @brief -* Copy hwl extra field after calling thunked ComputeSurfaceInfo -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -VOID CIAddrLib::HwlFmaskPostThunkSurfInfo( - const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut, ///< [in] Output of surface info - ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut ///< [out] Output of fmask info - ) const -{ - pFmaskOut->tileIndex = pSurfOut->tileIndex; - pFmaskOut->macroModeIndex = pSurfOut->macroModeIndex; -} - -/** -*************************************************************************************************** -* CIAddrLib::HwlDegradeThickTileMode -* -* @brief -* Degrades valid tile mode for thick modes if needed -* -* @return -* Suitable tile mode -*************************************************************************************************** -*/ -AddrTileMode CIAddrLib::HwlDegradeThickTileMode( - AddrTileMode baseTileMode, ///< [in] base tile mode - UINT_32 numSlices, ///< [in] current number of slices - UINT_32* pBytesPerTile ///< [in/out] pointer to bytes per slice - ) const -{ - return baseTileMode; -} - -/** -*************************************************************************************************** -* CIAddrLib::HwlOverrideTileMode -* -* @brief -* Override THICK to THIN, for specific formats on CI -* -* @return -* Suitable tile mode -* -*************************************************************************************************** -*/ -BOOL_32 CIAddrLib::HwlOverrideTileMode( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure - AddrTileMode* pTileMode, ///< [in/out] pointer to the tile mode - AddrTileType* pTileType ///< [in/out] pointer to the tile type - ) const -{ - BOOL_32 bOverrided = FALSE; - AddrTileMode tileMode = *pTileMode; - - // currently, all CI/VI family do not - // support ADDR_TM_PRT_2D_TILED_THICK,ADDR_TM_PRT_3D_TILED_THICK and - // ADDR_TM_PRT_2D_TILED_THIN1, ADDR_TM_PRT_3D_TILED_THIN1 - switch (tileMode) - { - case ADDR_TM_PRT_2D_TILED_THICK: - case ADDR_TM_PRT_3D_TILED_THICK: - tileMode = ADDR_TM_PRT_TILED_THICK; - break; - case ADDR_TM_PRT_2D_TILED_THIN1: - case ADDR_TM_PRT_3D_TILED_THIN1: - tileMode = ADDR_TM_PRT_TILED_THIN1; - break; - default: - break; - } - - // UBTS#404321, we do not need such overriding, as THICK+THICK entries removed from the tile-mode table - if (!m_settings.isBonaire) - { - UINT_32 thickness = ComputeSurfaceThickness(tileMode); - - // tile_thickness = (array_mode == XTHICK) ? 8 : ((array_mode == THICK) ? 4 : 1) - if (thickness > 1) - { - switch (pIn->format) - { - // see //gfxip/gcB/devel/cds/src/verif/tc/models/csim/tcp.cpp - // tcpError("Thick micro tiling is not supported for format... - case ADDR_FMT_X24_8_32_FLOAT: - case ADDR_FMT_32_AS_8: - case ADDR_FMT_32_AS_8_8: - case ADDR_FMT_32_AS_32_32_32_32: - - // packed formats - case ADDR_FMT_GB_GR: - case ADDR_FMT_BG_RG: - case ADDR_FMT_1_REVERSED: - case ADDR_FMT_1: - case ADDR_FMT_BC1: - case ADDR_FMT_BC2: - case ADDR_FMT_BC3: - case ADDR_FMT_BC4: - case ADDR_FMT_BC5: - case ADDR_FMT_BC6: - case ADDR_FMT_BC7: - switch (tileMode) - { - case ADDR_TM_1D_TILED_THICK: - tileMode = ADDR_TM_1D_TILED_THIN1; - break; - - case ADDR_TM_2D_TILED_XTHICK: - case ADDR_TM_2D_TILED_THICK: - tileMode = ADDR_TM_2D_TILED_THIN1; - break; - - case ADDR_TM_3D_TILED_XTHICK: - case ADDR_TM_3D_TILED_THICK: - tileMode = ADDR_TM_3D_TILED_THIN1; - break; - - case ADDR_TM_PRT_TILED_THICK: - tileMode = ADDR_TM_PRT_TILED_THIN1; - break; - - case ADDR_TM_PRT_2D_TILED_THICK: - tileMode = ADDR_TM_PRT_2D_TILED_THIN1; - break; - - case ADDR_TM_PRT_3D_TILED_THICK: - tileMode = ADDR_TM_PRT_3D_TILED_THIN1; - break; - - default: - break; - - } - - // Switch tile type from thick to thin - if (tileMode != *pTileMode) - { - // see tileIndex: 13-18 - *pTileType = ADDR_NON_DISPLAYABLE; - } - - break; - default: - break; - } - } - } - - if (tileMode != *pTileMode) - { - *pTileMode = tileMode; - bOverrided = TRUE; - } - - return bOverrided; -} - -/** -*************************************************************************************************** -* CiAddrLib::GetPrtSwitchP4Threshold -* -* @brief -* Return the threshold of switching to P4_* instead of P16_* for PRT resources -*************************************************************************************************** -*/ -UINT_32 CIAddrLib::GetPrtSwitchP4Threshold() const -{ - UINT_32 threshold; - - switch (m_pipes) - { - case 8: - threshold = 32; - break; - case 16: - if (m_settings.isFiji) - { - threshold = 16; - } - else if (m_settings.isHawaii) - { - threshold = 8; - } - else - { - ///@todo add for possible new ASICs. - ADDR_ASSERT_ALWAYS(); - threshold = 16; - } - break; - default: - ///@todo add for possible new ASICs. - ADDR_ASSERT_ALWAYS(); - threshold = 32; - break; - } - - return threshold; -} - -/** -*************************************************************************************************** -* CIAddrLib::HwlSetupTileInfo -* -* @brief -* Setup default value of tile info for SI -*************************************************************************************************** -*/ -VOID CIAddrLib::HwlSetupTileInfo( - AddrTileMode tileMode, ///< [in] Tile mode - ADDR_SURFACE_FLAGS flags, ///< [in] Surface type flags - UINT_32 bpp, ///< [in] Bits per pixel - UINT_32 pitch, ///< [in] Pitch in pixels - UINT_32 height, ///< [in] Height in pixels - UINT_32 numSamples, ///< [in] Number of samples - ADDR_TILEINFO* pTileInfoIn, ///< [in] Tile info input: NULL for default - ADDR_TILEINFO* pTileInfoOut, ///< [out] Tile info output - AddrTileType inTileType, ///< [in] Tile type - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] Output - ) const -{ - UINT_32 thickness = ComputeSurfaceThickness(tileMode); - ADDR_TILEINFO* pTileInfo = pTileInfoOut; - INT index = TileIndexInvalid; - INT macroModeIndex = TileIndexInvalid; - - // Fail-safe code - if (!IsLinear(tileMode)) - { - // Thick tile modes must use thick micro tile mode but Bonaire does not support due to - // old derived netlists (UBTS 404321) - if (thickness > 1) - { - if (m_settings.isBonaire) - { - inTileType = ADDR_NON_DISPLAYABLE; - } - else if ((m_allowNonDispThickModes == FALSE) || (inTileType != ADDR_NON_DISPLAYABLE)) - { - inTileType = ADDR_THICK; - } - } - // 128 bpp tiling must be non-displayable. - // Fmask reuse color buffer's entry but bank-height field can be from another entry - // To simplify the logic, fmask entry should be picked from non-displayable ones - else if (bpp == 128 || flags.fmask) - { - inTileType = ADDR_NON_DISPLAYABLE; - } - // These two modes only have non-disp entries though they can be other micro tile modes - else if (tileMode == ADDR_TM_3D_TILED_THIN1 || tileMode == ADDR_TM_PRT_3D_TILED_THIN1) - { - inTileType = ADDR_NON_DISPLAYABLE; - } - - if (flags.depth || flags.stencil) - { - inTileType = ADDR_DEPTH_SAMPLE_ORDER; - } - } - - if (IsTileInfoAllZero(pTileInfo)) - { - // See table entries 0-4 - if (flags.depth || flags.stencil) - { - if (flags.depth && flags.tcCompatible) - { - // tileSize = bpp * numSamples * 8 * 8 / 8 - UINT_32 tileSize = bpp * numSamples * 8; - - // Texure readable depth surface should not be split - switch (tileSize) - { - case 128: - index = 1; - break; - case 256: - index = 2; - break; - case 512: - index = 3; - break; - default: - index = 4; - break; - } - } - else - { - // Depth and stencil need to use the same index, thus the pre-defined tile_split - // can meet the requirement to choose the same macro mode index - // uncompressed depth/stencil are not supported for now - switch (numSamples) - { - case 1: - index = 0; - break; - case 2: - case 4: - index = 1; - break; - case 8: - index = 2; - break; - default: - break; - } - } - } - - // See table entries 5-6 - if (inTileType == ADDR_DEPTH_SAMPLE_ORDER) - { - switch (tileMode) - { - case ADDR_TM_1D_TILED_THIN1: - index = 5; - break; - case ADDR_TM_PRT_TILED_THIN1: - index = 6; - break; - default: - break; - } - } - - // See table entries 8-12 - if (inTileType == ADDR_DISPLAYABLE) - { - switch (tileMode) - { - case ADDR_TM_1D_TILED_THIN1: - index = 9; - break; - case ADDR_TM_2D_TILED_THIN1: - index = 10; - break; - case ADDR_TM_PRT_TILED_THIN1: - index = 11; - break; - default: - break; - } - } - - // See table entries 13-18 - if (inTileType == ADDR_NON_DISPLAYABLE) - { - switch (tileMode) - { - case ADDR_TM_1D_TILED_THIN1: - index = 13; - break; - case ADDR_TM_2D_TILED_THIN1: - index = 14; - break; - case ADDR_TM_3D_TILED_THIN1: - index = 15; - break; - case ADDR_TM_PRT_TILED_THIN1: - index = 16; - break; - default: - break; - } - } - - // See table entries 19-26 - if (thickness > 1) - { - switch (tileMode) - { - case ADDR_TM_1D_TILED_THICK: - //special check for bonaire, for the compatablity between old KMD and new UMD for bonaire - index = ((inTileType == ADDR_THICK) || m_settings.isBonaire) ? 19 : 18; - break; - case ADDR_TM_2D_TILED_THICK: - // special check for bonaire, for the compatablity between old KMD and new UMD for bonaire - index = ((inTileType == ADDR_THICK) || m_settings.isBonaire) ? 20 : 24; - break; - case ADDR_TM_3D_TILED_THICK: - index = 21; - break; - case ADDR_TM_PRT_TILED_THICK: - index = 22; - break; - case ADDR_TM_2D_TILED_XTHICK: - index = 25; - break; - case ADDR_TM_3D_TILED_XTHICK: - index = 26; - break; - default: - break; - } - } - - // See table entries 27-30 - if (inTileType == ADDR_ROTATED) - { - switch (tileMode) - { - case ADDR_TM_1D_TILED_THIN1: - index = 27; - break; - case ADDR_TM_2D_TILED_THIN1: - index = 28; - break; - case ADDR_TM_PRT_TILED_THIN1: - index = 29; - break; - case ADDR_TM_PRT_2D_TILED_THIN1: - index = 30; - break; - default: - break; - } - } - - if (m_pipes >= 8) - { - ADDR_ASSERT((index + 1) < static_cast(m_noOfEntries)); - // Only do this when tile mode table is updated. - if (((tileMode == ADDR_TM_PRT_TILED_THIN1) || (tileMode == ADDR_TM_PRT_TILED_THICK)) && - (m_tileTable[index+1].mode == tileMode)) - { - UINT_32 bytesXSamples = bpp * numSamples / 8; - UINT_32 bytesXThickness = bpp * thickness / 8; - UINT_32 switchP4Threshold = GetPrtSwitchP4Threshold(); - - if ((bytesXSamples > switchP4Threshold) || (bytesXThickness > switchP4Threshold)) - { - // Pick next 4 pipe entry - index += 1; - } - } - } - } - else - { - // A pre-filled tile info is ready - index = pOut->tileIndex; - macroModeIndex = pOut->macroModeIndex; - - // pass tile type back for post tile index compute - pOut->tileType = inTileType; - } - - // We only need to set up tile info if there is a valid index but macroModeIndex is invalid - if (index != TileIndexInvalid && macroModeIndex == TileIndexInvalid) - { - macroModeIndex = HwlComputeMacroModeIndex(index, flags, bpp, numSamples, pTileInfo); - - /// Copy to pOut->tileType/tileIndex/macroModeIndex - pOut->tileIndex = index; - pOut->tileType = m_tileTable[index].type; // Or inTileType, the samea - pOut->macroModeIndex = macroModeIndex; - } - else if (tileMode == ADDR_TM_LINEAR_GENERAL) - { - pOut->tileIndex = TileIndexLinearGeneral; - - // Copy linear-aligned entry?? - *pTileInfo = m_tileTable[8].info; - } - else if (tileMode == ADDR_TM_LINEAR_ALIGNED) - { - pOut->tileIndex = 8; - *pTileInfo = m_tileTable[8].info; - } -} - -/** -*************************************************************************************************** -* CIAddrLib::ReadGbTileMode -* -* @brief -* Convert GB_TILE_MODE HW value to ADDR_TILE_CONFIG. -* @return -* NA. -*************************************************************************************************** -*/ -VOID CIAddrLib::ReadGbTileMode( - UINT_32 regValue, ///< [in] GB_TILE_MODE register - ADDR_TILECONFIG* pCfg ///< [out] output structure - ) const -{ - GB_TILE_MODE gbTileMode; - gbTileMode.val = regValue; - - pCfg->type = static_cast(gbTileMode.f.micro_tile_mode_new); - pCfg->info.pipeConfig = static_cast(gbTileMode.f.pipe_config + 1); - - if (pCfg->type == ADDR_DEPTH_SAMPLE_ORDER) - { - pCfg->info.tileSplitBytes = 64 << gbTileMode.f.tile_split; - } - else - { - pCfg->info.tileSplitBytes = 1 << gbTileMode.f.sample_split; - } - - UINT_32 regArrayMode = gbTileMode.f.array_mode; - - pCfg->mode = static_cast(regArrayMode); - - switch (regArrayMode) - { - case 5: - pCfg->mode = ADDR_TM_PRT_TILED_THIN1; - break; - case 6: - pCfg->mode = ADDR_TM_PRT_2D_TILED_THIN1; - break; - case 8: - pCfg->mode = ADDR_TM_2D_TILED_XTHICK; - break; - case 9: - pCfg->mode = ADDR_TM_PRT_TILED_THICK; - break; - case 0xa: - pCfg->mode = ADDR_TM_PRT_2D_TILED_THICK; - break; - case 0xb: - pCfg->mode = ADDR_TM_PRT_3D_TILED_THIN1; - break; - case 0xe: - pCfg->mode = ADDR_TM_3D_TILED_XTHICK; - break; - case 0xf: - pCfg->mode = ADDR_TM_PRT_3D_TILED_THICK; - break; - default: - break; - } - - // Fail-safe code for these always convert tile info, as the non-macro modes - // return the entry of tile mode table directly without looking up macro mode table - if (!IsMacroTiled(pCfg->mode)) - { - pCfg->info.banks = 2; - pCfg->info.bankWidth = 1; - pCfg->info.bankHeight = 1; - pCfg->info.macroAspectRatio = 1; - pCfg->info.tileSplitBytes = 64; - } -} - -/** -*************************************************************************************************** -* CIAddrLib::InitTileSettingTable -* -* @brief -* Initialize the ADDR_TILE_CONFIG table. -* @return -* TRUE if tile table is correctly initialized -*************************************************************************************************** -*/ -BOOL_32 CIAddrLib::InitTileSettingTable( - const UINT_32* pCfg, ///< [in] Pointer to table of tile configs - UINT_32 noOfEntries ///< [in] Numbe of entries in the table above - ) -{ - BOOL_32 initOk = TRUE; - - ADDR_ASSERT(noOfEntries <= TileTableSize); - - memset(m_tileTable, 0, sizeof(m_tileTable)); - - if (noOfEntries != 0) - { - m_noOfEntries = noOfEntries; - } - else - { - m_noOfEntries = TileTableSize; - } - - if (pCfg) // From Client - { - for (UINT_32 i = 0; i < m_noOfEntries; i++) - { - ReadGbTileMode(*(pCfg + i), &m_tileTable[i]); - } - } - else - { - ADDR_ASSERT_ALWAYS(); - initOk = FALSE; - } - - if (initOk) - { - ADDR_ASSERT(m_tileTable[TILEINDEX_LINEAR_ALIGNED].mode == ADDR_TM_LINEAR_ALIGNED); - - if (m_settings.isBonaire == FALSE) - { - // Check if entry 18 is "thick+thin" combination - if ((m_tileTable[18].mode == ADDR_TM_1D_TILED_THICK) && - (m_tileTable[18].type == ADDR_NON_DISPLAYABLE)) - { - m_allowNonDispThickModes = TRUE; - ADDR_ASSERT(m_tileTable[24].mode == ADDR_TM_2D_TILED_THICK); - } - } - else - { - m_allowNonDispThickModes = TRUE; - } - - // Assume the first entry is always programmed with full pipes - m_pipes = HwlGetPipes(&m_tileTable[0].info); - } - - return initOk; -} - -/** -*************************************************************************************************** -* CIAddrLib::ReadGbMacroTileCfg -* -* @brief -* Convert GB_MACRO_TILE_CFG HW value to ADDR_TILE_CONFIG. -* @return -* NA. -*************************************************************************************************** -*/ -VOID CIAddrLib::ReadGbMacroTileCfg( - UINT_32 regValue, ///< [in] GB_MACRO_TILE_MODE register - ADDR_TILEINFO* pCfg ///< [out] output structure - ) const -{ - GB_MACROTILE_MODE gbTileMode; - gbTileMode.val = regValue; - - pCfg->bankHeight = 1 << gbTileMode.f.bank_height; - pCfg->bankWidth = 1 << gbTileMode.f.bank_width; - pCfg->banks = 1 << (gbTileMode.f.num_banks + 1); - pCfg->macroAspectRatio = 1 << gbTileMode.f.macro_tile_aspect; -} - -/** -*************************************************************************************************** -* CIAddrLib::InitMacroTileCfgTable -* -* @brief -* Initialize the ADDR_MACRO_TILE_CONFIG table. -* @return -* TRUE if macro tile table is correctly initialized -*************************************************************************************************** -*/ -BOOL_32 CIAddrLib::InitMacroTileCfgTable( - const UINT_32* pCfg, ///< [in] Pointer to table of tile configs - UINT_32 noOfMacroEntries ///< [in] Numbe of entries in the table above - ) -{ - BOOL_32 initOk = TRUE; - - ADDR_ASSERT(noOfMacroEntries <= MacroTileTableSize); - - memset(m_macroTileTable, 0, sizeof(m_macroTileTable)); - - if (noOfMacroEntries != 0) - { - m_noOfMacroEntries = noOfMacroEntries; - } - else - { - m_noOfMacroEntries = MacroTileTableSize; - } - - if (pCfg) // From Client - { - for (UINT_32 i = 0; i < m_noOfMacroEntries; i++) - { - ReadGbMacroTileCfg(*(pCfg + i), &m_macroTileTable[i]); - - m_macroTileTable[i].tileSplitBytes = 64 << (i % 8); - } - } - else - { - ADDR_ASSERT_ALWAYS(); - initOk = FALSE; - } - return initOk; -} - -/** -*************************************************************************************************** -* CIAddrLib::HwlComputeMacroModeIndex -* -* @brief -* Computes macro tile mode index -* @return -* TRUE if macro tile table is correctly initialized -*************************************************************************************************** -*/ -INT_32 CIAddrLib::HwlComputeMacroModeIndex( - INT_32 tileIndex, ///< [in] Tile mode index - ADDR_SURFACE_FLAGS flags, ///< [in] Surface flags - UINT_32 bpp, ///< [in] Bit per pixel - UINT_32 numSamples, ///< [in] Number of samples - ADDR_TILEINFO* pTileInfo, ///< [out] Pointer to ADDR_TILEINFO - AddrTileMode* pTileMode, ///< [out] Pointer to AddrTileMode - AddrTileType* pTileType ///< [out] Pointer to AddrTileType - ) const -{ - INT_32 macroModeIndex = TileIndexInvalid; - - if (flags.tcCompatible && flags.stencil) - { - // Don't compute macroModeIndex for tc compatible stencil surface - macroModeIndex = TileIndexNoMacroIndex; - } - else - { - AddrTileMode tileMode = m_tileTable[tileIndex].mode; - AddrTileType tileType = m_tileTable[tileIndex].type; - UINT_32 thickness = ComputeSurfaceThickness(tileMode); - - if (!IsMacroTiled(tileMode)) - { - *pTileInfo = m_tileTable[tileIndex].info; - macroModeIndex = TileIndexNoMacroIndex; - } - else - { - UINT_32 tileBytes1x = BITS_TO_BYTES(bpp * MicroTilePixels * thickness); - UINT_32 tileSplit; - - if (m_tileTable[tileIndex].type == ADDR_DEPTH_SAMPLE_ORDER) - { - // Depth entries store real tileSplitBytes - tileSplit = m_tileTable[tileIndex].info.tileSplitBytes; - } - else - { - // Non-depth entries store a split factor - UINT_32 sampleSplit = m_tileTable[tileIndex].info.tileSplitBytes; - UINT_32 colorTileSplit = Max(256u, sampleSplit * tileBytes1x); - - tileSplit = colorTileSplit; - } - - UINT_32 tileSplitC = Min(m_rowSize, tileSplit); - UINT_32 tileBytes; - - if (flags.fmask) - { - tileBytes = Min(tileSplitC, tileBytes1x); - } - else - { - tileBytes = Min(tileSplitC, numSamples * tileBytes1x); - } - - if (tileBytes < 64) - { - tileBytes = 64; - } - - macroModeIndex = Log2(tileBytes / 64); - - if (flags.prt || IsPrtTileMode(tileMode)) - { - // Unknown - assume it is 1/2 of table size - const UINT_32 PrtMacroModeOffset = MacroTileTableSize / 2; - - macroModeIndex += PrtMacroModeOffset; - *pTileInfo = m_macroTileTable[macroModeIndex]; - } - else - { - *pTileInfo = m_macroTileTable[macroModeIndex]; - } - - pTileInfo->pipeConfig = m_tileTable[tileIndex].info.pipeConfig; - - if (m_tileTable[tileIndex].type != ADDR_DEPTH_SAMPLE_ORDER) - { - pTileInfo->tileSplitBytes = tileSplitC; - } - else - { - pTileInfo->tileSplitBytes = m_tileTable[tileIndex].info.tileSplitBytes; - } - } - - if (NULL != pTileMode) - { - *pTileMode = tileMode; - } - - if (NULL != pTileType) - { - *pTileType = tileType; - } - } - - return macroModeIndex; -} - -/** -*************************************************************************************************** -* CIAddrLib::HwlComputeTileDataWidthAndHeightLinear -* -* @brief -* Compute the squared cache shape for per-tile data (CMASK and HTILE) for linear layout -* -* @return -* N/A -* -* @note -* MacroWidth and macroHeight are measured in pixels -*************************************************************************************************** -*/ -VOID CIAddrLib::HwlComputeTileDataWidthAndHeightLinear( - UINT_32* pMacroWidth, ///< [out] macro tile width - UINT_32* pMacroHeight, ///< [out] macro tile height - UINT_32 bpp, ///< [in] bits per pixel - ADDR_TILEINFO* pTileInfo ///< [in] tile info - ) const -{ - ADDR_ASSERT(pTileInfo != NULL); - - UINT_32 numTiles; - - switch (pTileInfo->pipeConfig) - { - case ADDR_PIPECFG_P16_32x32_8x16: - case ADDR_PIPECFG_P16_32x32_16x16: - case ADDR_PIPECFG_P8_32x64_32x32: - case ADDR_PIPECFG_P8_32x32_16x32: - case ADDR_PIPECFG_P8_32x32_16x16: - case ADDR_PIPECFG_P8_32x32_8x16: - case ADDR_PIPECFG_P4_32x32: - numTiles = 8; - break; - default: - numTiles = 4; - break; - } - - *pMacroWidth = numTiles * MicroTileWidth; - *pMacroHeight = numTiles * MicroTileHeight; -} - -/** -*************************************************************************************************** -* CIAddrLib::HwlStereoCheckRightOffsetPadding -* -* @brief -* check if the height needs extra padding for stereo right eye offset, to avoid swizzling -* -* @return -* TRUE is the extra padding is needed -* -* @note -* Kalindi (Kabini) is the only one that needs this padding as there is a uncertain -* possible HW issue where the right eye displays incorrectly with some type of swizzles, if -* the right eye offset is not 64KB aligned - EPR#366461 -* Other Kaveri APUs also need the padding according to DXX team's report otherwise -* corruption observed. - EPR#374788 -*************************************************************************************************** -*/ -BOOL_32 CIAddrLib::HwlStereoCheckRightOffsetPadding() const -{ - BOOL_32 bNeedPadding = FALSE; - - if (m_settings.isKaveri) - { - bNeedPadding = TRUE; - } - - return bNeedPadding; -} - -/** -*************************************************************************************************** -* CIAddrLib::HwlComputeMetadataNibbleAddress -* -* @brief -* calculate meta data address based on input information -* -* ¶meter -* uncompressedDataByteAddress - address of a pixel in color surface -* dataBaseByteAddress - base address of color surface -* metadataBaseByteAddress - base address of meta ram -* metadataBitSize - meta key size, 8 for DCC, 4 for cmask -* elementBitSize - element size of color surface -* blockByteSize - compression block size, 256 for DCC -* pipeInterleaveBytes - pipe interleave size -* numOfPipes - number of pipes -* numOfBanks - number of banks -* numOfSamplesPerSplit - number of samples per tile split -* @return -* meta data nibble address (nibble address is used to support DCC compatible cmask) -* -*************************************************************************************************** -*/ -UINT_64 CIAddrLib::HwlComputeMetadataNibbleAddress( - UINT_64 uncompressedDataByteAddress, - UINT_64 dataBaseByteAddress, - UINT_64 metadataBaseByteAddress, - UINT_32 metadataBitSize, - UINT_32 elementBitSize, - UINT_32 blockByteSize, - UINT_32 pipeInterleaveBytes, - UINT_32 numOfPipes, - UINT_32 numOfBanks, - UINT_32 numOfSamplesPerSplit) const -{ - ///-------------------------------------------------------------------------------------------- - /// Get pipe interleave, bank and pipe bits - ///-------------------------------------------------------------------------------------------- - UINT_32 pipeInterleaveBits = Log2(pipeInterleaveBytes); - UINT_32 pipeBits = Log2(numOfPipes); - UINT_32 bankBits = Log2(numOfBanks); - - ///-------------------------------------------------------------------------------------------- - /// Clear pipe and bank swizzles - ///-------------------------------------------------------------------------------------------- - UINT_32 dataMacrotileBits = pipeInterleaveBits + pipeBits + bankBits; - UINT_32 metadataMacrotileBits = pipeInterleaveBits + pipeBits + bankBits; - - UINT_64 dataMacrotileClearMask = ~((1L << dataMacrotileBits) - 1); - UINT_64 metadataMacrotileClearMask = ~((1L << metadataMacrotileBits) - 1); - - UINT_64 dataBaseByteAddressNoSwizzle = dataBaseByteAddress & dataMacrotileClearMask; - UINT_64 metadataBaseByteAddressNoSwizzle = metadataBaseByteAddress & metadataMacrotileClearMask; - - ///-------------------------------------------------------------------------------------------- - /// Modify metadata base before adding in so that when final address is divided by data ratio, - /// the base address returns to where it should be - ///-------------------------------------------------------------------------------------------- - ADDR_ASSERT((0 != metadataBitSize)); - UINT_64 metadataBaseShifted = metadataBaseByteAddressNoSwizzle * blockByteSize * 8 / - metadataBitSize; - UINT_64 offset = uncompressedDataByteAddress - - dataBaseByteAddressNoSwizzle + - metadataBaseShifted; - - ///-------------------------------------------------------------------------------------------- - /// Save bank data bits - ///-------------------------------------------------------------------------------------------- - UINT_32 lsb = pipeBits + pipeInterleaveBits; - UINT_32 msb = bankBits - 1 + lsb; - - UINT_64 bankDataBits = AddrGetBits(offset, msb, lsb); - - ///-------------------------------------------------------------------------------------------- - /// Save pipe data bits - ///-------------------------------------------------------------------------------------------- - lsb = pipeInterleaveBits; - msb = pipeBits - 1 + lsb; - - UINT_64 pipeDataBits = AddrGetBits(offset, msb, lsb); - - ///-------------------------------------------------------------------------------------------- - /// Remove pipe and bank bits - ///-------------------------------------------------------------------------------------------- - lsb = pipeInterleaveBits; - msb = dataMacrotileBits - 1; - - UINT_64 offsetWithoutPipeBankBits = AddrRemoveBits(offset, msb, lsb); - - ADDR_ASSERT((0 != blockByteSize)); - UINT_64 blockInBankpipe = offsetWithoutPipeBankBits / blockByteSize; - - UINT_32 tileSize = 8 * 8 * elementBitSize/8 * numOfSamplesPerSplit; - UINT_32 blocksInTile = tileSize / blockByteSize; - - if (0 == blocksInTile) - { - lsb = 0; - } - else - { - lsb = Log2(blocksInTile); - } - msb = bankBits - 1 + lsb; - - UINT_64 blockInBankpipeWithBankBits = AddrInsertBits(blockInBankpipe, bankDataBits, msb, lsb); - - /// NOTE *2 because we are converting to Nibble address in this step - UINT_64 metaAddressInPipe = blockInBankpipeWithBankBits * 2 * metadataBitSize / 8; - - - ///-------------------------------------------------------------------------------------------- - /// Reinsert pipe bits back into the final address - ///-------------------------------------------------------------------------------------------- - lsb = pipeInterleaveBits + 1; ///<+1 due to Nibble address now gives interleave bits extra lsb. - msb = pipeBits - 1 + lsb; - UINT_64 metadataAddress = AddrInsertBits(metaAddressInPipe, pipeDataBits, msb, lsb); - - return metadataAddress; -} - -/** -*************************************************************************************************** -* CIAddrLib::HwlPadDimensions -* -* @brief -* Helper function to pad dimensions -* -* @return -* N/A -* -*************************************************************************************************** -*/ -VOID CIAddrLib::HwlPadDimensions( - AddrTileMode tileMode, ///< [in] tile mode - UINT_32 bpp, ///< [in] bits per pixel - ADDR_SURFACE_FLAGS flags, ///< [in] surface flags - UINT_32 numSamples, ///< [in] number of samples - ADDR_TILEINFO* pTileInfo, ///< [in/out] bank structure. - UINT_32 padDims, ///< [in] Dimensions to pad valid value 1,2,3 - UINT_32 mipLevel, ///< [in] MipLevel - UINT_32* pPitch, ///< [in/out] pitch in pixels - UINT_32 pitchAlign, ///< [in] pitch alignment - UINT_32* pHeight, ///< [in/out] height in pixels - UINT_32 heightAlign, ///< [in] height alignment - UINT_32* pSlices, ///< [in/out] number of slices - UINT_32 sliceAlign ///< [in] number of slice alignment - ) const -{ - if (m_settings.isVolcanicIslands && - flags.dccCompatible && - (numSamples > 1) && - (mipLevel == 0) && - IsMacroTiled(tileMode)) - { - UINT_32 tileSizePerSample = BITS_TO_BYTES(bpp * MicroTileWidth * MicroTileHeight); - UINT_32 samplesPerSplit = pTileInfo->tileSplitBytes / tileSizePerSample; - - if (samplesPerSplit < numSamples) - { - UINT_32 dccFastClearByteAlign = HwlGetPipes(pTileInfo) * m_pipeInterleaveBytes * 256; - UINT_32 bytesPerSplit = BITS_TO_BYTES((*pPitch) * (*pHeight) * bpp * samplesPerSplit); - - ADDR_ASSERT(IsPow2(dccFastClearByteAlign)); - - if (0 != (bytesPerSplit & (dccFastClearByteAlign - 1))) - { - UINT_32 dccFastClearPixelAlign = dccFastClearByteAlign / - BITS_TO_BYTES(bpp) / - samplesPerSplit; - UINT_32 macroTilePixelAlign = pitchAlign * heightAlign; - - if ((dccFastClearPixelAlign >= macroTilePixelAlign) && - ((dccFastClearPixelAlign % macroTilePixelAlign) == 0)) - { - UINT_32 dccFastClearPitchAlignInMacroTile = - dccFastClearPixelAlign / macroTilePixelAlign; - UINT_32 heightInMacroTile = *pHeight / heightAlign; - UINT_32 dccFastClearPitchAlignInPixels; - - while ((heightInMacroTile > 1) && - ((heightInMacroTile % 2) == 0) && - (dccFastClearPitchAlignInMacroTile > 1) && - ((dccFastClearPitchAlignInMacroTile % 2) == 0)) - { - heightInMacroTile >>= 1; - dccFastClearPitchAlignInMacroTile >>= 1; - } - - dccFastClearPitchAlignInPixels = pitchAlign * dccFastClearPitchAlignInMacroTile; - - if (IsPow2(dccFastClearPitchAlignInPixels)) - { - *pPitch = PowTwoAlign((*pPitch), dccFastClearPitchAlignInPixels); - } - else - { - *pPitch += (dccFastClearPitchAlignInPixels - 1); - *pPitch /= dccFastClearPitchAlignInPixels; - *pPitch *= dccFastClearPitchAlignInPixels; - } - } - } - } - } -} - diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.h mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.h --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,202 +0,0 @@ -/* - * Copyright © 2014 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ - -/** -*************************************************************************************************** -* @file ciaddrlib.h -* @brief Contains the CIAddrLib class definition. -*************************************************************************************************** -*/ - -#ifndef __CI_ADDR_LIB_H__ -#define __CI_ADDR_LIB_H__ - -#include "addrlib.h" -#include "siaddrlib.h" - -/** -*************************************************************************************************** -* @brief CI specific settings structure. -*************************************************************************************************** -*/ -struct CIChipSettings -{ - struct - { - UINT_32 isSeaIsland : 1; - UINT_32 isBonaire : 1; - UINT_32 isKaveri : 1; - UINT_32 isSpectre : 1; - UINT_32 isSpooky : 1; - UINT_32 isKalindi : 1; - // Hawaii is GFXIP 7.2, similar with CI (Bonaire) - UINT_32 isHawaii : 1; - - // VI - UINT_32 isVolcanicIslands : 1; - UINT_32 isIceland : 1; - UINT_32 isTonga : 1; - UINT_32 isFiji : 1; - UINT_32 isPolaris10 : 1; - UINT_32 isPolaris11 : 1; - // VI fusion (Carrizo) - UINT_32 isCarrizo : 1; - }; -}; - -/** -*************************************************************************************************** -* @brief This class is the CI specific address library -* function set. -*************************************************************************************************** -*/ -class CIAddrLib : public SIAddrLib -{ -public: - /// Creates CIAddrLib object - static AddrLib* CreateObj(const AddrClient* pClient) - { - return new(pClient) CIAddrLib(pClient); - } - -private: - CIAddrLib(const AddrClient* pClient); - virtual ~CIAddrLib(); - -protected: - - // Hwl interface - defined in AddrLib - virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; - - virtual ADDR_E_RETURNCODE HwlComputeFmaskInfo( - const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, - ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut); - - virtual AddrChipFamily HwlConvertChipFamily( - UINT_32 uChipFamily, UINT_32 uChipRevision); - - virtual BOOL_32 HwlInitGlobalParams( - const ADDR_CREATE_INPUT* pCreateIn); - - virtual ADDR_E_RETURNCODE HwlSetupTileCfg( - INT_32 index, INT_32 macroModeIndex, ADDR_TILEINFO* pInfo, - AddrTileMode* pMode = 0, AddrTileType* pType = 0) const; - - virtual VOID HwlComputeTileDataWidthAndHeightLinear( - UINT_32* pMacroWidth, UINT_32* pMacroHeight, - UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const; - - virtual INT_32 HwlComputeMacroModeIndex( - INT_32 tileIndex, ADDR_SURFACE_FLAGS flags, UINT_32 bpp, UINT_32 numSamples, - ADDR_TILEINFO* pTileInfo, AddrTileMode* pTileMode = NULL, AddrTileType* pTileType = NULL - ) const; - - // Sub-hwl interface - defined in EgBasedAddrLib - virtual VOID HwlSetupTileInfo( - AddrTileMode tileMode, ADDR_SURFACE_FLAGS flags, - UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, - ADDR_TILEINFO* inputTileInfo, ADDR_TILEINFO* outputTileInfo, - AddrTileType inTileType, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; - - virtual INT_32 HwlPostCheckTileIndex( - const ADDR_TILEINFO* pInfo, AddrTileMode mode, AddrTileType type, - INT curIndex = TileIndexInvalid) const; - - virtual VOID HwlFmaskPreThunkSurfInfo( - const ADDR_COMPUTE_FMASK_INFO_INPUT* pFmaskIn, - const ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut, - ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfIn, - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut) const; - - virtual VOID HwlFmaskPostThunkSurfInfo( - const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut, - ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut) const; - - virtual AddrTileMode HwlDegradeThickTileMode( - AddrTileMode baseTileMode, UINT_32 numSlices, UINT_32* pBytesPerTile) const; - - virtual BOOL_32 HwlOverrideTileMode( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, - AddrTileMode* pTileMode, - AddrTileType* pTileType) const; - - virtual BOOL_32 HwlStereoCheckRightOffsetPadding() const; - - virtual ADDR_E_RETURNCODE HwlComputeDccInfo( - const ADDR_COMPUTE_DCCINFO_INPUT* pIn, - ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const; - - virtual ADDR_E_RETURNCODE HwlComputeCmaskAddrFromCoord( - const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, - ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const; - -protected: - virtual VOID HwlPadDimensions( - AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, - UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 padDims, UINT_32 mipLevel, - UINT_32* pPitch, UINT_32 pitchAlign, UINT_32* pHeight, UINT_32 heightAlign, - UINT_32* pSlices, UINT_32 sliceAlign) const; - -private: - VOID ReadGbTileMode( - UINT_32 regValue, ADDR_TILECONFIG* pCfg) const; - - VOID ReadGbMacroTileCfg( - UINT_32 regValue, ADDR_TILEINFO* pCfg) const; - - UINT_32 GetPrtSwitchP4Threshold() const; - - BOOL_32 InitTileSettingTable( - const UINT_32 *pSetting, UINT_32 noOfEntries); - - BOOL_32 InitMacroTileCfgTable( - const UINT_32 *pSetting, UINT_32 noOfEntries); - - UINT_64 HwlComputeMetadataNibbleAddress( - UINT_64 uncompressedDataByteAddress, - UINT_64 dataBaseByteAddress, - UINT_64 metadataBaseByteAddress, - UINT_32 metadataBitSize, - UINT_32 elementBitSize, - UINT_32 blockByteSize, - UINT_32 pipeInterleaveBytes, - UINT_32 numOfPipes, - UINT_32 numOfBanks, - UINT_32 numOfSamplesPerSplit) const; - - static const UINT_32 MacroTileTableSize = 16; - ADDR_TILEINFO m_macroTileTable[MacroTileTableSize]; - UINT_32 m_noOfMacroEntries; - BOOL_32 m_allowNonDispThickModes; - - CIChipSettings m_settings; -}; - -#endif - - diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.cpp mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.cpp --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.cpp 1970-01-01 00:00:00.000000000 +0000 @@ -1,4577 +0,0 @@ -/* - * Copyright © 2014 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ - -/** -*************************************************************************************************** -* @file egbaddrlib.cpp -* @brief Contains the EgBasedAddrLib class implementation -*************************************************************************************************** -*/ - -#include "egbaddrlib.h" - -/** -*************************************************************************************************** -* EgBasedAddrLib::EgBasedAddrLib -* -* @brief -* Constructor -* -* @note -* -*************************************************************************************************** -*/ -EgBasedAddrLib::EgBasedAddrLib(const AddrClient* pClient) : - AddrLib(pClient), - m_ranks(0), - m_logicalBanks(0), - m_bankInterleave(1) -{ -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::~EgBasedAddrLib -* -* @brief -* Destructor -*************************************************************************************************** -*/ -EgBasedAddrLib::~EgBasedAddrLib() -{ -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::DispatchComputeSurfaceInfo -* -* @brief -* Compute surface sizes include padded pitch,height,slices,total size in bytes, -* meanwhile output suitable tile mode and base alignment might be changed in this -* call as well. Results are returned through output parameters. -* -* @return -* TRUE if no error occurs -*************************************************************************************************** -*/ -BOOL_32 EgBasedAddrLib::DispatchComputeSurfaceInfo( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure - ) const -{ - AddrTileMode tileMode = pIn->tileMode; - UINT_32 bpp = pIn->bpp; - UINT_32 numSamples = pIn->numSamples; - UINT_32 numFrags = ((pIn->numFrags == 0) ? numSamples : pIn->numFrags); - UINT_32 pitch = pIn->width; - UINT_32 height = pIn->height; - UINT_32 numSlices = pIn->numSlices; - UINT_32 mipLevel = pIn->mipLevel; - ADDR_SURFACE_FLAGS flags = pIn->flags; - - ADDR_TILEINFO tileInfoDef = {0}; - ADDR_TILEINFO* pTileInfo = &tileInfoDef; - - UINT_32 padDims = 0; - BOOL_32 valid; - - tileMode = DegradeLargeThickTile(tileMode, bpp); - - // Only override numSamples for NI above - if (m_chipFamily >= ADDR_CHIP_FAMILY_NI) - { - if (numFrags != numSamples) // This means EQAA - { - // The real surface size needed is determined by number of fragments - numSamples = numFrags; - } - - // Save altered numSamples in pOut - pOut->numSamples = numSamples; - } - - // Caller makes sure pOut->pTileInfo is not NULL, see HwlComputeSurfaceInfo - ADDR_ASSERT(pOut->pTileInfo); - - if (pOut->pTileInfo != NULL) - { - pTileInfo = pOut->pTileInfo; - } - - // Set default values - if (pIn->pTileInfo != NULL) - { - if (pTileInfo != pIn->pTileInfo) - { - *pTileInfo = *pIn->pTileInfo; - } - } - else - { - memset(pTileInfo, 0, sizeof(ADDR_TILEINFO)); - } - - // For macro tile mode, we should calculate default tiling parameters - HwlSetupTileInfo(tileMode, - flags, - bpp, - pitch, - height, - numSamples, - pIn->pTileInfo, - pTileInfo, - pIn->tileType, - pOut); - - if (flags.cube) - { - if (mipLevel == 0) - { - padDims = 2; - } - - if (numSlices == 1) - { - // This is calculating one face, remove cube flag - flags.cube = 0; - } - } - - switch (tileMode) - { - case ADDR_TM_LINEAR_GENERAL://fall through - case ADDR_TM_LINEAR_ALIGNED: - valid = ComputeSurfaceInfoLinear(pIn, pOut, padDims); - break; - - case ADDR_TM_1D_TILED_THIN1://fall through - case ADDR_TM_1D_TILED_THICK: - valid = ComputeSurfaceInfoMicroTiled(pIn, pOut, padDims, tileMode); - break; - - case ADDR_TM_2D_TILED_THIN1: //fall through - case ADDR_TM_2D_TILED_THICK: //fall through - case ADDR_TM_3D_TILED_THIN1: //fall through - case ADDR_TM_3D_TILED_THICK: //fall through - case ADDR_TM_2D_TILED_XTHICK: //fall through - case ADDR_TM_3D_TILED_XTHICK: //fall through - case ADDR_TM_PRT_TILED_THIN1: //fall through - case ADDR_TM_PRT_2D_TILED_THIN1://fall through - case ADDR_TM_PRT_3D_TILED_THIN1://fall through - case ADDR_TM_PRT_TILED_THICK: //fall through - case ADDR_TM_PRT_2D_TILED_THICK://fall through - case ADDR_TM_PRT_3D_TILED_THICK: - valid = ComputeSurfaceInfoMacroTiled(pIn, pOut, padDims, tileMode); - break; - - default: - valid = FALSE; - ADDR_ASSERT_ALWAYS(); - break; - } - - return valid; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::ComputeSurfaceInfoLinear -* -* @brief -* Compute linear surface sizes include padded pitch, height, slices, total size in -* bytes, meanwhile alignments as well. Since it is linear mode, so output tile mode -* will not be changed here. Results are returned through output parameters. -* -* @return -* TRUE if no error occurs -*************************************************************************************************** -*/ -BOOL_32 EgBasedAddrLib::ComputeSurfaceInfoLinear( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] Input structure - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut, ///< [out] Output structure - UINT_32 padDims ///< [in] Dimensions to padd - ) const -{ - UINT_32 expPitch = pIn->width; - UINT_32 expHeight = pIn->height; - UINT_32 expNumSlices = pIn->numSlices; - - // No linear MSAA on real H/W, keep this for TGL - UINT_32 numSamples = pOut->numSamples; - - const UINT_32 microTileThickness = 1; - - // - // Compute the surface alignments. - // - ComputeSurfaceAlignmentsLinear(pIn->tileMode, - pIn->bpp, - pIn->flags, - &pOut->baseAlign, - &pOut->pitchAlign, - &pOut->heightAlign); - - if ((pIn->tileMode == ADDR_TM_LINEAR_GENERAL) && pIn->flags.color && (pIn->height > 1)) - { -#if !ALT_TEST - // When linear_general surface is accessed in multiple lines, it requires 8 pixels in pitch - // alignment since PITCH_TILE_MAX is in unit of 8 pixels. - // It is OK if it is accessed per line. - ADDR_ASSERT((pIn->width % 8) == 0); -#endif - } - - pOut->depthAlign = microTileThickness; - - expPitch = HwlPreHandleBaseLvl3xPitch(pIn, expPitch); - - // - // Pad pitch and height to the required granularities. - // - PadDimensions(pIn->tileMode, - pIn->bpp, - pIn->flags, - numSamples, - pOut->pTileInfo, - padDims, - pIn->mipLevel, - &expPitch, pOut->pitchAlign, - &expHeight, pOut->heightAlign, - &expNumSlices, microTileThickness); - - expPitch = HwlPostHandleBaseLvl3xPitch(pIn, expPitch); - - // - // Adjust per HWL - // - - UINT_64 logicalSliceSize; - - logicalSliceSize = HwlGetSizeAdjustmentLinear(pIn->tileMode, - pIn->bpp, - numSamples, - pOut->baseAlign, - pOut->pitchAlign, - &expPitch, - &expHeight, - &pOut->heightAlign); - - - pOut->pitch = expPitch; - pOut->height = expHeight; - pOut->depth = expNumSlices; - - pOut->surfSize = logicalSliceSize * expNumSlices; - - pOut->tileMode = pIn->tileMode; - - return TRUE; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::ComputeSurfaceInfoMicroTiled -* -* @brief -* Compute 1D/Micro Tiled surface sizes include padded pitch, height, slices, total -* size in bytes, meanwhile alignments as well. Results are returned through output -* parameters. -* -* @return -* TRUE if no error occurs -*************************************************************************************************** -*/ -BOOL_32 EgBasedAddrLib::ComputeSurfaceInfoMicroTiled( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] Input structure - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut, ///< [out] Output structure - UINT_32 padDims, ///< [in] Dimensions to padd - AddrTileMode expTileMode ///< [in] Expected tile mode - ) const -{ - BOOL_32 valid = TRUE; - - UINT_32 microTileThickness; - UINT_32 expPitch = pIn->width; - UINT_32 expHeight = pIn->height; - UINT_32 expNumSlices = pIn->numSlices; - - // No 1D MSAA on real H/W, keep this for TGL - UINT_32 numSamples = pOut->numSamples; - - // - // Compute the micro tile thickness. - // - microTileThickness = ComputeSurfaceThickness(expTileMode); - - // - // Extra override for mip levels - // - if (pIn->mipLevel > 0) - { - // - // Reduce tiling mode from thick to thin if the number of slices is less than the - // micro tile thickness. - // - if ((expTileMode == ADDR_TM_1D_TILED_THICK) && - (expNumSlices < ThickTileThickness)) - { - expTileMode = HwlDegradeThickTileMode(ADDR_TM_1D_TILED_THICK, expNumSlices, NULL); - if (expTileMode != ADDR_TM_1D_TILED_THICK) - { - microTileThickness = 1; - } - } - } - - // - // Compute the surface restrictions. - // - ComputeSurfaceAlignmentsMicroTiled(expTileMode, - pIn->bpp, - pIn->flags, - pIn->mipLevel, - numSamples, - &pOut->baseAlign, - &pOut->pitchAlign, - &pOut->heightAlign); - - pOut->depthAlign = microTileThickness; - - // - // Pad pitch and height to the required granularities. - // Compute surface size. - // Return parameters. - // - PadDimensions(expTileMode, - pIn->bpp, - pIn->flags, - numSamples, - pOut->pTileInfo, - padDims, - pIn->mipLevel, - &expPitch, pOut->pitchAlign, - &expHeight, pOut->heightAlign, - &expNumSlices, microTileThickness); - - // - // Get HWL specific pitch adjustment - // - UINT_64 logicalSliceSize = HwlGetSizeAdjustmentMicroTiled(microTileThickness, - pIn->bpp, - pIn->flags, - numSamples, - pOut->baseAlign, - pOut->pitchAlign, - &expPitch, - &expHeight); - - - pOut->pitch = expPitch; - pOut->height = expHeight; - pOut->depth = expNumSlices; - - pOut->surfSize = logicalSliceSize * expNumSlices; - - pOut->tileMode = expTileMode; - - return valid; -} - - -/** -*************************************************************************************************** -* EgBasedAddrLib::ComputeSurfaceInfoMacroTiled -* -* @brief -* Compute 2D/macro tiled surface sizes include padded pitch, height, slices, total -* size in bytes, meanwhile output suitable tile mode and alignments might be changed -* in this call as well. Results are returned through output parameters. -* -* @return -* TRUE if no error occurs -*************************************************************************************************** -*/ -BOOL_32 EgBasedAddrLib::ComputeSurfaceInfoMacroTiled( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] Input structure - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut, ///< [out] Output structure - UINT_32 padDims, ///< [in] Dimensions to padd - AddrTileMode expTileMode ///< [in] Expected tile mode - ) const -{ - BOOL_32 valid = TRUE; - - AddrTileMode origTileMode = expTileMode; - UINT_32 microTileThickness; - - UINT_32 paddedPitch; - UINT_32 paddedHeight; - UINT_64 bytesPerSlice; - - UINT_32 expPitch = pIn->width; - UINT_32 expHeight = pIn->height; - UINT_32 expNumSlices = pIn->numSlices; - - UINT_32 numSamples = pOut->numSamples; - - // - // Compute the surface restrictions as base - // SanityCheckMacroTiled is called in ComputeSurfaceAlignmentsMacroTiled - // - valid = ComputeSurfaceAlignmentsMacroTiled(expTileMode, - pIn->bpp, - pIn->flags, - pIn->mipLevel, - numSamples, - pOut->pTileInfo, - &pOut->baseAlign, - &pOut->pitchAlign, - &pOut->heightAlign); - - if (valid) - { - // - // Compute the micro tile thickness. - // - microTileThickness = ComputeSurfaceThickness(expTileMode); - - // - // Find the correct tiling mode for mip levels - // - if (pIn->mipLevel > 0) - { - // - // Try valid tile mode - // - expTileMode = ComputeSurfaceMipLevelTileMode(expTileMode, - pIn->bpp, - expPitch, - expHeight, - expNumSlices, - numSamples, - pOut->pitchAlign, - pOut->heightAlign, - pOut->pTileInfo); - - if (!IsMacroTiled(expTileMode)) // Downgraded to micro-tiled - { - return ComputeSurfaceInfoMicroTiled(pIn, pOut, padDims, expTileMode); - } - else - { - if (microTileThickness != ComputeSurfaceThickness(expTileMode)) - { - // - // Re-compute if thickness changed since bank-height may be changed! - // - return ComputeSurfaceInfoMacroTiled(pIn, pOut, padDims, expTileMode); - } - } - } - - paddedPitch = expPitch; - paddedHeight = expHeight; - - // - // Re-cal alignment - // - if (expTileMode != origTileMode) // Tile mode is changed but still macro-tiled - { - valid = ComputeSurfaceAlignmentsMacroTiled(expTileMode, - pIn->bpp, - pIn->flags, - pIn->mipLevel, - numSamples, - pOut->pTileInfo, - &pOut->baseAlign, - &pOut->pitchAlign, - &pOut->heightAlign); - } - - // - // Do padding - // - PadDimensions(expTileMode, - pIn->bpp, - pIn->flags, - numSamples, - pOut->pTileInfo, - padDims, - pIn->mipLevel, - &paddedPitch, pOut->pitchAlign, - &paddedHeight, pOut->heightAlign, - &expNumSlices, microTileThickness); - - if (pIn->flags.qbStereo && - (pOut->pStereoInfo != NULL) && - HwlStereoCheckRightOffsetPadding()) - { - // Eye height's bank bits are different from y == 0? - // Since 3D rendering treats right eye buffer starting from y == "eye height" while - // display engine treats it to be 0, so the bank bits may be different, we pad - // more in height to make sure y == "eye height" has the same bank bits as y == 0. - UINT_32 checkMask = pOut->pTileInfo->banks - 1; - UINT_32 bankBits = 0; - do - { - bankBits = (paddedHeight / 8 / pOut->pTileInfo->bankHeight) & checkMask; - - if (bankBits) - { - paddedHeight += pOut->heightAlign; - } - } while (bankBits); - } - - // - // Compute the size of a slice. - // - bytesPerSlice = BITS_TO_BYTES(static_cast(paddedPitch) * - paddedHeight * NextPow2(pIn->bpp) * numSamples); - - pOut->pitch = paddedPitch; - // Put this check right here to workaround special mipmap cases which the original height - // is needed. - // The original height is pre-stored in pOut->height in PostComputeMipLevel and - // pOut->pitch is needed in HwlCheckLastMacroTiledLvl, too. - if (m_configFlags.checkLast2DLevel && numSamples == 1) // Don't check MSAA - { - // Set a TRUE in pOut if next Level is the first 1D sub level - HwlCheckLastMacroTiledLvl(pIn, pOut); - } - pOut->height = paddedHeight; - - pOut->depth = expNumSlices; - - pOut->surfSize = bytesPerSlice * expNumSlices; - - pOut->tileMode = expTileMode; - - pOut->depthAlign = microTileThickness; - - } // if (valid) - - return valid; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::ComputeSurfaceAlignmentsLinear -* -* @brief -* Compute linear surface alignment, calculation results are returned through -* output parameters. -* -* @return -* TRUE if no error occurs -*************************************************************************************************** -*/ -BOOL_32 EgBasedAddrLib::ComputeSurfaceAlignmentsLinear( - AddrTileMode tileMode, ///< [in] tile mode - UINT_32 bpp, ///< [in] bits per pixel - ADDR_SURFACE_FLAGS flags, ///< [in] surface flags - UINT_32* pBaseAlign, ///< [out] base address alignment in bytes - UINT_32* pPitchAlign, ///< [out] pitch alignment in pixels - UINT_32* pHeightAlign ///< [out] height alignment in pixels - ) const -{ - BOOL_32 valid = TRUE; - - switch (tileMode) - { - case ADDR_TM_LINEAR_GENERAL: - // - // The required base alignment and pitch and height granularities is to 1 element. - // - *pBaseAlign = (bpp > 8) ? bpp / 8 : 1; - *pPitchAlign = 1; - *pHeightAlign = 1; - break; - case ADDR_TM_LINEAR_ALIGNED: - // - // The required alignment for base is the pipe interleave size. - // The required granularity for pitch is hwl dependent. - // The required granularity for height is one row. - // - *pBaseAlign = m_pipeInterleaveBytes; - *pPitchAlign = HwlGetPitchAlignmentLinear(bpp, flags); - *pHeightAlign = 1; - break; - default: - *pBaseAlign = 1; - *pPitchAlign = 1; - *pHeightAlign = 1; - ADDR_UNHANDLED_CASE(); - break; - } - - AdjustPitchAlignment(flags, pPitchAlign); - - return valid; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::ComputeSurfaceAlignmentsMicroTiled -* -* @brief -* Compute 1D tiled surface alignment, calculation results are returned through -* output parameters. -* -* @return -* TRUE if no error occurs -*************************************************************************************************** -*/ -BOOL_32 EgBasedAddrLib::ComputeSurfaceAlignmentsMicroTiled( - AddrTileMode tileMode, ///< [in] tile mode - UINT_32 bpp, ///< [in] bits per pixel - ADDR_SURFACE_FLAGS flags, ///< [in] surface flags - UINT_32 mipLevel, ///< [in] mip level - UINT_32 numSamples, ///< [in] number of samples - UINT_32* pBaseAlign, ///< [out] base address alignment in bytes - UINT_32* pPitchAlign, ///< [out] pitch alignment in pixels - UINT_32* pHeightAlign ///< [out] height alignment in pixels - ) const -{ - BOOL_32 valid = TRUE; - - // - // The required alignment for base is the pipe interleave size. - // - *pBaseAlign = m_pipeInterleaveBytes; - - *pPitchAlign = HwlGetPitchAlignmentMicroTiled(tileMode, bpp, flags, numSamples); - - *pHeightAlign = MicroTileHeight; - - AdjustPitchAlignment(flags, pPitchAlign); - - // ECR#393489 - // Workaround 2 for 1D tiling - There is HW bug for Carrizo - // where it requires the following alignments for 1D tiling. - if (flags.czDispCompatible && (mipLevel == 0)) - { - *pBaseAlign = PowTwoAlign(*pBaseAlign, 4096); //Base address MOD 4096 = 0 - *pPitchAlign = PowTwoAlign(*pPitchAlign, 512 / (BITS_TO_BYTES(bpp))); //(8 lines * pitch * bytes per pixel) MOD 4096 = 0 - } - // end Carrizo workaround for 1D tilling - - return valid; -} - - -/** -*************************************************************************************************** -* EgBasedAddrLib::HwlReduceBankWidthHeight -* -* @brief -* Additional checks, reduce bankHeight/bankWidth if needed and possible -* tileSize*BANK_WIDTH*BANK_HEIGHT <= ROW_SIZE -* -* @return -* TRUE if no error occurs -*************************************************************************************************** -*/ -BOOL_32 EgBasedAddrLib::HwlReduceBankWidthHeight( - UINT_32 tileSize, ///< [in] tile size - UINT_32 bpp, ///< [in] bits per pixel - ADDR_SURFACE_FLAGS flags, ///< [in] surface flags - UINT_32 numSamples, ///< [in] number of samples - UINT_32 bankHeightAlign, ///< [in] bank height alignment - UINT_32 pipes, ///< [in] pipes - ADDR_TILEINFO* pTileInfo ///< [in/out] bank structure. - ) const -{ - UINT_32 macroAspectAlign; - BOOL_32 valid = TRUE; - - if (tileSize * pTileInfo->bankWidth * pTileInfo->bankHeight > m_rowSize) - { - BOOL_32 stillGreater = TRUE; - - // Try reducing bankWidth first - if (stillGreater && pTileInfo->bankWidth > 1) - { - while (stillGreater && pTileInfo->bankWidth > 0) - { - pTileInfo->bankWidth >>= 1; - - if (pTileInfo->bankWidth == 0) - { - pTileInfo->bankWidth = 1; - break; - } - - stillGreater = - tileSize * pTileInfo->bankWidth * pTileInfo->bankHeight > m_rowSize; - } - - // bankWidth is reduced above, so we need to recalculate bankHeight and ratio - bankHeightAlign = Max(1u, - m_pipeInterleaveBytes * m_bankInterleave / - (tileSize * pTileInfo->bankWidth) - ); - - // We cannot increase bankHeight so just assert this case. - ADDR_ASSERT((pTileInfo->bankHeight % bankHeightAlign) == 0); - - if (numSamples == 1) - { - macroAspectAlign = Max(1u, - m_pipeInterleaveBytes * m_bankInterleave / - (tileSize * pipes * pTileInfo->bankWidth) - ); - pTileInfo->macroAspectRatio = PowTwoAlign(pTileInfo->macroAspectRatio, - macroAspectAlign); - } - } - - // Early quit bank_height degradation for "64" bit z buffer - if (flags.depth && bpp >= 64) - { - stillGreater = FALSE; - } - - // Then try reducing bankHeight - if (stillGreater && pTileInfo->bankHeight > bankHeightAlign) - { - while (stillGreater && pTileInfo->bankHeight > bankHeightAlign) - { - pTileInfo->bankHeight >>= 1; - - if (pTileInfo->bankHeight < bankHeightAlign) - { - pTileInfo->bankHeight = bankHeightAlign; - break; - } - - stillGreater = - tileSize * pTileInfo->bankWidth * pTileInfo->bankHeight > m_rowSize; - } - } - - valid = !stillGreater; - - // Generate a warning if we still fail to meet this constraint - if (!valid) - { - ADDR_WARN( - 0, ("TILE_SIZE(%d)*BANK_WIDTH(%d)*BANK_HEIGHT(%d) <= ROW_SIZE(%d)", - tileSize, pTileInfo->bankWidth, pTileInfo->bankHeight, m_rowSize)); - } - } - - return valid; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::ComputeSurfaceAlignmentsMacroTiled -* -* @brief -* Compute 2D tiled surface alignment, calculation results are returned through -* output parameters. -* -* @return -* TRUE if no error occurs -*************************************************************************************************** -*/ -BOOL_32 EgBasedAddrLib::ComputeSurfaceAlignmentsMacroTiled( - AddrTileMode tileMode, ///< [in] tile mode - UINT_32 bpp, ///< [in] bits per pixel - ADDR_SURFACE_FLAGS flags, ///< [in] surface flags - UINT_32 mipLevel, ///< [in] mip level - UINT_32 numSamples, ///< [in] number of samples - ADDR_TILEINFO* pTileInfo, ///< [in/out] bank structure. - UINT_32* pBaseAlign, ///< [out] base address alignment in bytes - UINT_32* pPitchAlign, ///< [out] pitch alignment in pixels - UINT_32* pHeightAlign ///< [out] height alignment in pixels - ) const -{ - BOOL_32 valid = SanityCheckMacroTiled(pTileInfo); - - if (valid) - { - UINT_32 macroTileWidth; - UINT_32 macroTileHeight; - - UINT_32 tileSize; - UINT_32 bankHeightAlign; - UINT_32 macroAspectAlign; - - UINT_32 thickness = ComputeSurfaceThickness(tileMode); - UINT_32 pipes = HwlGetPipes(pTileInfo); - - // - // Align bank height first according to latest h/w spec - // - - // tile_size = MIN(tile_split, 64 * tile_thickness * element_bytes * num_samples) - tileSize = Min(pTileInfo->tileSplitBytes, - BITS_TO_BYTES(64 * thickness * bpp * numSamples)); - - // bank_height_align = - // MAX(1, (pipe_interleave_bytes * bank_interleave)/(tile_size*bank_width)) - bankHeightAlign = Max(1u, - m_pipeInterleaveBytes * m_bankInterleave / - (tileSize * pTileInfo->bankWidth) - ); - - pTileInfo->bankHeight = PowTwoAlign(pTileInfo->bankHeight, bankHeightAlign); - - // num_pipes * bank_width * macro_tile_aspect >= - // (pipe_interleave_size * bank_interleave) / tile_size - if (numSamples == 1) - { - // this restriction is only for mipmap (mipmap's numSamples must be 1) - macroAspectAlign = Max(1u, - m_pipeInterleaveBytes * m_bankInterleave / - (tileSize * pipes * pTileInfo->bankWidth) - ); - pTileInfo->macroAspectRatio = PowTwoAlign(pTileInfo->macroAspectRatio, macroAspectAlign); - } - - valid = HwlReduceBankWidthHeight(tileSize, - bpp, - flags, - numSamples, - bankHeightAlign, - pipes, - pTileInfo); - - // - // The required granularity for pitch is the macro tile width. - // - macroTileWidth = MicroTileWidth * pTileInfo->bankWidth * pipes * - pTileInfo->macroAspectRatio; - - *pPitchAlign = macroTileWidth; - - AdjustPitchAlignment(flags, pPitchAlign); - - // - // The required granularity for height is the macro tile height. - // - macroTileHeight = MicroTileHeight * pTileInfo->bankHeight * pTileInfo->banks / - pTileInfo->macroAspectRatio; - - *pHeightAlign = macroTileHeight; - - // - // Compute base alignment - // - *pBaseAlign = pipes * - pTileInfo->bankWidth * pTileInfo->banks * pTileInfo->bankHeight * tileSize; - - if ((mipLevel == 0) && (flags.prt) && (m_chipFamily == ADDR_CHIP_FAMILY_SI)) - { - static const UINT_32 PrtTileSize = 0x10000; - - UINT_32 macroTileSize = macroTileWidth * macroTileHeight * numSamples * bpp / 8; - - if (macroTileSize < PrtTileSize) - { - UINT_32 numMacroTiles = PrtTileSize / macroTileSize; - - ADDR_ASSERT((PrtTileSize % macroTileSize) == 0); - - *pPitchAlign *= numMacroTiles; - *pBaseAlign *= numMacroTiles; - } - } - } - - return valid; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::SanityCheckMacroTiled -* -* @brief -* Check if macro-tiled parameters are valid -* @return -* TRUE if valid -*************************************************************************************************** -*/ -BOOL_32 EgBasedAddrLib::SanityCheckMacroTiled( - ADDR_TILEINFO* pTileInfo ///< [in] macro-tiled parameters - ) const -{ - BOOL_32 valid = TRUE; - UINT_32 numPipes = HwlGetPipes(pTileInfo); - - switch (pTileInfo->banks) - { - case 2: //fall through - case 4: //fall through - case 8: //fall through - case 16: - break; - default: - valid = FALSE; - break; - - } - - if (valid) - { - switch (pTileInfo->bankWidth) - { - case 1: //fall through - case 2: //fall through - case 4: //fall through - case 8: - break; - default: - valid = FALSE; - break; - } - } - - if (valid) - { - switch (pTileInfo->bankHeight) - { - case 1: //fall through - case 2: //fall through - case 4: //fall through - case 8: - break; - default: - valid = FALSE; - break; - } - } - - if (valid) - { - switch (pTileInfo->macroAspectRatio) - { - case 1: //fall through - case 2: //fall through - case 4: //fall through - case 8: - break; - default: - valid = FALSE; - break; - } - } - - if (valid) - { - if (pTileInfo->banks < pTileInfo->macroAspectRatio) - { - // This will generate macro tile height <= 1 - valid = FALSE; - } - } - - if (valid) - { - if (pTileInfo->tileSplitBytes > m_rowSize) - { - valid = FALSE; - } - } - - if (valid) - { - valid = HwlSanityCheckMacroTiled(pTileInfo); - } - - ADDR_ASSERT(valid == TRUE); - - // Add this assert for guidance - ADDR_ASSERT(numPipes * pTileInfo->banks >= 4); - - return valid; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::ComputeSurfaceMipLevelTileMode -* -* @brief -* Compute valid tile mode for surface mipmap sub-levels -* -* @return -* Suitable tile mode -*************************************************************************************************** -*/ -AddrTileMode EgBasedAddrLib::ComputeSurfaceMipLevelTileMode( - AddrTileMode baseTileMode, ///< [in] base tile mode - UINT_32 bpp, ///< [in] bits per pixels - UINT_32 pitch, ///< [in] current level pitch - UINT_32 height, ///< [in] current level height - UINT_32 numSlices, ///< [in] current number of slices - UINT_32 numSamples, ///< [in] number of samples - UINT_32 pitchAlign, ///< [in] pitch alignment - UINT_32 heightAlign, ///< [in] height alignment - ADDR_TILEINFO* pTileInfo ///< [in] ptr to bank structure - ) const -{ - UINT_32 bytesPerTile; - - AddrTileMode expTileMode = baseTileMode; - UINT_32 microTileThickness = ComputeSurfaceThickness(expTileMode); - UINT_32 interleaveSize = m_pipeInterleaveBytes * m_bankInterleave; - - // - // Compute the size of a slice. - // - bytesPerTile = BITS_TO_BYTES(MicroTilePixels * microTileThickness * NextPow2(bpp) * numSamples); - - // - // Reduce tiling mode from thick to thin if the number of slices is less than the - // micro tile thickness. - // - if (numSlices < microTileThickness) - { - expTileMode = HwlDegradeThickTileMode(expTileMode, numSlices, &bytesPerTile); - } - - if (bytesPerTile > pTileInfo->tileSplitBytes) - { - bytesPerTile = pTileInfo->tileSplitBytes; - } - - UINT_32 threshold1 = - bytesPerTile * HwlGetPipes(pTileInfo) * pTileInfo->bankWidth * pTileInfo->macroAspectRatio; - - UINT_32 threshold2 = - bytesPerTile * pTileInfo->bankWidth * pTileInfo->bankHeight; - - // - // Reduce the tile mode from 2D/3D to 1D in following conditions - // - switch (expTileMode) - { - case ADDR_TM_2D_TILED_THIN1: //fall through - case ADDR_TM_3D_TILED_THIN1: - case ADDR_TM_PRT_TILED_THIN1: - case ADDR_TM_PRT_2D_TILED_THIN1: - case ADDR_TM_PRT_3D_TILED_THIN1: - if ((pitch < pitchAlign) || - (height < heightAlign) || - (interleaveSize > threshold1) || - (interleaveSize > threshold2)) - { - expTileMode = ADDR_TM_1D_TILED_THIN1; - } - break; - case ADDR_TM_2D_TILED_THICK: //fall through - case ADDR_TM_3D_TILED_THICK: - case ADDR_TM_2D_TILED_XTHICK: - case ADDR_TM_3D_TILED_XTHICK: - case ADDR_TM_PRT_TILED_THICK: - case ADDR_TM_PRT_2D_TILED_THICK: - case ADDR_TM_PRT_3D_TILED_THICK: - if ((pitch < pitchAlign) || - (height < heightAlign)) - { - expTileMode = ADDR_TM_1D_TILED_THICK; - } - break; - default: - break; - } - - return expTileMode; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::HwlDegradeBaseLevel -* @brief -* Check if degrade is needed for base level -* @return -* TRUE if degrade is suggested -*************************************************************************************************** -*/ -BOOL_32 EgBasedAddrLib::HwlDegradeBaseLevel( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const -{ - BOOL_32 degrade = FALSE; - BOOL_32 valid = TRUE; - - ADDR_ASSERT(IsMacroTiled(pIn->tileMode)); - - UINT_32 baseAlign; - UINT_32 pitchAlign; - UINT_32 heightAlign; - - ADDR_ASSERT(pIn->pTileInfo); - ADDR_TILEINFO tileInfo = *pIn->pTileInfo; - ADDR_COMPUTE_SURFACE_INFO_OUTPUT out = {0}; - - if (UseTileIndex(pIn->tileIndex)) - { - out.tileIndex = pIn->tileIndex; - out.macroModeIndex = TileIndexInvalid; - } - - HwlSetupTileInfo(pIn->tileMode, - pIn->flags, - pIn->bpp, - pIn->width, - pIn->height, - pIn->numSamples, - &tileInfo, - &tileInfo, - pIn->tileType, - &out); - - valid = ComputeSurfaceAlignmentsMacroTiled(pIn->tileMode, - pIn->bpp, - pIn->flags, - pIn->mipLevel, - pIn->numSamples, - &tileInfo, - &baseAlign, - &pitchAlign, - &heightAlign); - - if (valid) - { - degrade = (pIn->width < pitchAlign || pIn->height < heightAlign); - } - else - { - degrade = TRUE; - } - - return degrade; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::HwlDegradeThickTileMode -* -* @brief -* Degrades valid tile mode for thick modes if needed -* -* @return -* Suitable tile mode -*************************************************************************************************** -*/ -AddrTileMode EgBasedAddrLib::HwlDegradeThickTileMode( - AddrTileMode baseTileMode, ///< [in] base tile mode - UINT_32 numSlices, ///< [in] current number of slices - UINT_32* pBytesPerTile ///< [in/out] pointer to bytes per slice - ) const -{ - ADDR_ASSERT(numSlices < ComputeSurfaceThickness(baseTileMode)); - // if pBytesPerTile is NULL, this is a don't-care.... - UINT_32 bytesPerTile = pBytesPerTile != NULL ? *pBytesPerTile : 64; - - AddrTileMode expTileMode = baseTileMode; - switch (baseTileMode) - { - case ADDR_TM_1D_TILED_THICK: - expTileMode = ADDR_TM_1D_TILED_THIN1; - bytesPerTile >>= 2; - break; - case ADDR_TM_2D_TILED_THICK: - expTileMode = ADDR_TM_2D_TILED_THIN1; - bytesPerTile >>= 2; - break; - case ADDR_TM_3D_TILED_THICK: - expTileMode = ADDR_TM_3D_TILED_THIN1; - bytesPerTile >>= 2; - break; - case ADDR_TM_2D_TILED_XTHICK: - if (numSlices < ThickTileThickness) - { - expTileMode = ADDR_TM_2D_TILED_THIN1; - bytesPerTile >>= 3; - } - else - { - expTileMode = ADDR_TM_2D_TILED_THICK; - bytesPerTile >>= 1; - } - break; - case ADDR_TM_3D_TILED_XTHICK: - if (numSlices < ThickTileThickness) - { - expTileMode = ADDR_TM_3D_TILED_THIN1; - bytesPerTile >>= 3; - } - else - { - expTileMode = ADDR_TM_3D_TILED_THICK; - bytesPerTile >>= 1; - } - break; - default: - ADDR_ASSERT_ALWAYS(); - break; - } - - if (pBytesPerTile != NULL) - { - *pBytesPerTile = bytesPerTile; - } - - return expTileMode; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::DispatchComputeSurfaceAddrFromCoord -* -* @brief -* Compute surface address from given coord (x, y, slice,sample) -* -* @return -* Address in bytes -*************************************************************************************************** -*/ -UINT_64 EgBasedAddrLib::DispatchComputeSurfaceAddrFromCoord( - const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure - ) const -{ - UINT_32 x = pIn->x; - UINT_32 y = pIn->y; - UINT_32 slice = pIn->slice; - UINT_32 sample = pIn->sample; - UINT_32 bpp = pIn->bpp; - UINT_32 pitch = pIn->pitch; - UINT_32 height = pIn->height; - UINT_32 numSlices = pIn->numSlices; - UINT_32 numSamples = ((pIn->numSamples == 0) ? 1 : pIn->numSamples); - UINT_32 numFrags = ((pIn->numFrags == 0) ? numSamples : pIn->numFrags); - AddrTileMode tileMode = pIn->tileMode; - AddrTileType microTileType = pIn->tileType; - BOOL_32 ignoreSE = pIn->ignoreSE; - BOOL_32 isDepthSampleOrder = pIn->isDepth; - ADDR_TILEINFO* pTileInfo = pIn->pTileInfo; - - UINT_32* pBitPosition = &pOut->bitPosition; - UINT_64 addr; - -#if ADDR_AM_BUILD - UINT_32 addr5Bit = 0; - UINT_32 addr5Swizzle = pIn->addr5Swizzle; - BOOL_32 is32ByteTile = pIn->is32ByteTile; -#endif - - // ADDR_DEPTH_SAMPLE_ORDER = non-disp + depth-sample-order - if (microTileType == ADDR_DEPTH_SAMPLE_ORDER) - { - isDepthSampleOrder = TRUE; - } - - if (m_chipFamily >= ADDR_CHIP_FAMILY_NI) - { - if (numFrags != numSamples) - { - numSamples = numFrags; - ADDR_ASSERT(sample < numSamples); - } - - /// @note - /// 128 bit/thick tiled surface doesn't support display tiling and - /// mipmap chain must have the same tileType, so please fill tileType correctly - if (!IsLinear(pIn->tileMode)) - { - if (bpp >= 128 || ComputeSurfaceThickness(tileMode) > 1) - { - ADDR_ASSERT(microTileType != ADDR_DISPLAYABLE); - } - } - } - - switch (tileMode) - { - case ADDR_TM_LINEAR_GENERAL://fall through - case ADDR_TM_LINEAR_ALIGNED: - addr = ComputeSurfaceAddrFromCoordLinear(x, - y, - slice, - sample, - bpp, - pitch, - height, - numSlices, - pBitPosition); - break; - case ADDR_TM_1D_TILED_THIN1://fall through - case ADDR_TM_1D_TILED_THICK: - addr = ComputeSurfaceAddrFromCoordMicroTiled(x, - y, - slice, - sample, - bpp, - pitch, - height, - numSamples, - tileMode, - microTileType, - isDepthSampleOrder, - pBitPosition); - break; - case ADDR_TM_2D_TILED_THIN1: //fall through - case ADDR_TM_2D_TILED_THICK: //fall through - case ADDR_TM_3D_TILED_THIN1: //fall through - case ADDR_TM_3D_TILED_THICK: //fall through - case ADDR_TM_2D_TILED_XTHICK: //fall through - case ADDR_TM_3D_TILED_XTHICK: //fall through - case ADDR_TM_PRT_TILED_THIN1: //fall through - case ADDR_TM_PRT_2D_TILED_THIN1://fall through - case ADDR_TM_PRT_3D_TILED_THIN1://fall through - case ADDR_TM_PRT_TILED_THICK: //fall through - case ADDR_TM_PRT_2D_TILED_THICK://fall through - case ADDR_TM_PRT_3D_TILED_THICK: - UINT_32 pipeSwizzle; - UINT_32 bankSwizzle; - - if (m_configFlags.useCombinedSwizzle) - { - ExtractBankPipeSwizzle(pIn->tileSwizzle, pIn->pTileInfo, - &bankSwizzle, &pipeSwizzle); - } - else - { - pipeSwizzle = pIn->pipeSwizzle; - bankSwizzle = pIn->bankSwizzle; - } - - addr = ComputeSurfaceAddrFromCoordMacroTiled(x, - y, - slice, - sample, - bpp, - pitch, - height, - numSamples, - tileMode, - microTileType, - ignoreSE, - isDepthSampleOrder, - pipeSwizzle, - bankSwizzle, - pTileInfo, - pBitPosition); - break; - default: - addr = 0; - ADDR_ASSERT_ALWAYS(); - break; - } - -#if ADDR_AM_BUILD - if (m_chipFamily >= ADDR_CHIP_FAMILY_NI) - { - if (addr5Swizzle && isDepthSampleOrder && is32ByteTile) - { - UINT_32 tx = x >> 3; - UINT_32 ty = y >> 3; - UINT_32 tileBits = ((ty&0x3) << 2) | (tx&0x3); - - tileBits = tileBits & addr5Swizzle; - addr5Bit = XorReduce(tileBits, 4); - - addr = addr | static_cast(addr5Bit << 5); - } - } -#endif - - return addr; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::ComputeSurfaceAddrFromCoordMicroTiled -* -* @brief -* Computes the surface address and bit position from a -* coordinate for 2D tilied (macro tiled) -* @return -* The byte address -*************************************************************************************************** -*/ -UINT_64 EgBasedAddrLib::ComputeSurfaceAddrFromCoordMacroTiled( - UINT_32 x, ///< [in] x coordinate - UINT_32 y, ///< [in] y coordinate - UINT_32 slice, ///< [in] slice index - UINT_32 sample, ///< [in] sample index - UINT_32 bpp, ///< [in] bits per pixel - UINT_32 pitch, ///< [in] surface pitch, in pixels - UINT_32 height, ///< [in] surface height, in pixels - UINT_32 numSamples, ///< [in] number of samples - AddrTileMode tileMode, ///< [in] tile mode - AddrTileType microTileType, ///< [in] micro tiling type - BOOL_32 ignoreSE, ///< [in] TRUE if shader enginers can be ignored - BOOL_32 isDepthSampleOrder, ///< [in] TRUE if it depth sample ordering is used - UINT_32 pipeSwizzle, ///< [in] pipe swizzle - UINT_32 bankSwizzle, ///< [in] bank swizzle - ADDR_TILEINFO* pTileInfo, ///< [in] bank structure - /// **All fields to be valid on entry** - UINT_32* pBitPosition ///< [out] bit position, e.g. FMT_1 will use this - ) const -{ - UINT_64 addr; - - UINT_32 microTileBytes; - UINT_32 microTileBits; - UINT_32 sampleOffset; - UINT_32 pixelIndex; - UINT_32 pixelOffset; - UINT_32 elementOffset; - UINT_32 tileSplitSlice; - UINT_32 pipe; - UINT_32 bank; - UINT_64 sliceBytes; - UINT_64 sliceOffset; - UINT_32 macroTilePitch; - UINT_32 macroTileHeight; - UINT_32 macroTilesPerRow; - UINT_32 macroTilesPerSlice; - UINT_64 macroTileBytes; - UINT_32 macroTileIndexX; - UINT_32 macroTileIndexY; - UINT_64 macroTileOffset; - UINT_64 totalOffset; - UINT_64 pipeInterleaveMask; - UINT_64 bankInterleaveMask; - UINT_64 pipeInterleaveOffset; - UINT_32 bankInterleaveOffset; - UINT_64 offset; - UINT_32 tileRowIndex; - UINT_32 tileColumnIndex; - UINT_32 tileIndex; - UINT_32 tileOffset; - - UINT_32 microTileThickness = ComputeSurfaceThickness(tileMode); - - // - // Compute the number of group, pipe, and bank bits. - // - UINT_32 numPipes = HwlGetPipes(pTileInfo); - UINT_32 numPipeInterleaveBits = Log2(m_pipeInterleaveBytes); - UINT_32 numPipeBits = Log2(numPipes); - UINT_32 numBankInterleaveBits = Log2(m_bankInterleave); - UINT_32 numBankBits = Log2(pTileInfo->banks); - - // - // Compute the micro tile size. - // - microTileBits = MicroTilePixels * microTileThickness * bpp * numSamples; - - microTileBytes = microTileBits / 8; - // - // Compute the pixel index within the micro tile. - // - pixelIndex = ComputePixelIndexWithinMicroTile(x, - y, - slice, - bpp, - tileMode, - microTileType); - - // - // Compute the sample offset and pixel offset. - // - if (isDepthSampleOrder) - { - // - // For depth surfaces, samples are stored contiguously for each element, so the sample - // offset is the sample number times the element size. - // - sampleOffset = sample * bpp; - pixelOffset = pixelIndex * bpp * numSamples; - } - else - { - // - // For color surfaces, all elements for a particular sample are stored contiguously, so - // the sample offset is the sample number times the micro tile size divided yBit the number - // of samples. - // - sampleOffset = sample * (microTileBits / numSamples); - pixelOffset = pixelIndex * bpp; - } - - // - // Compute the element offset. - // - elementOffset = pixelOffset + sampleOffset; - - *pBitPosition = static_cast(elementOffset % 8); - - elementOffset /= 8; //bit-to-byte - - // - // Determine if tiles need to be split across slices. - // - // If the size of the micro tile is larger than the tile split size, then the tile will be - // split across multiple slices. - // - UINT_32 slicesPerTile = 1; - - if ((microTileBytes > pTileInfo->tileSplitBytes) && (microTileThickness == 1)) - { //don't support for thick mode - - // - // Compute the number of slices per tile. - // - slicesPerTile = microTileBytes / pTileInfo->tileSplitBytes; - - // - // Compute the tile split slice number for use in rotating the bank. - // - tileSplitSlice = elementOffset / pTileInfo->tileSplitBytes; - - // - // Adjust the element offset to account for the portion of the tile that is being moved to - // a new slice.. - // - elementOffset %= pTileInfo->tileSplitBytes; - - // - // Adjust the microTileBytes size to tileSplitBytes size since - // a new slice.. - // - microTileBytes = pTileInfo->tileSplitBytes; - } - else - { - tileSplitSlice = 0; - } - - // - // Compute macro tile pitch and height. - // - macroTilePitch = - (MicroTileWidth * pTileInfo->bankWidth * numPipes) * pTileInfo->macroAspectRatio; - macroTileHeight = - (MicroTileHeight * pTileInfo->bankHeight * pTileInfo->banks) / pTileInfo->macroAspectRatio; - - // - // Compute the number of bytes per macro tile. Note: bytes of the same bank/pipe actually - // - macroTileBytes = - static_cast(microTileBytes) * - (macroTilePitch / MicroTileWidth) * (macroTileHeight / MicroTileHeight) / - (numPipes * pTileInfo->banks); - - // - // Compute the number of macro tiles per row. - // - macroTilesPerRow = pitch / macroTilePitch; - - // - // Compute the offset to the macro tile containing the specified coordinate. - // - macroTileIndexX = x / macroTilePitch; - macroTileIndexY = y / macroTileHeight; - macroTileOffset = ((macroTileIndexY * macroTilesPerRow) + macroTileIndexX) * macroTileBytes; - - // - // Compute the number of macro tiles per slice. - // - macroTilesPerSlice = macroTilesPerRow * (height / macroTileHeight); - - // - // Compute the slice size. - // - sliceBytes = macroTilesPerSlice * macroTileBytes; - - // - // Compute the slice offset. - // - sliceOffset = sliceBytes * (tileSplitSlice + slicesPerTile * (slice / microTileThickness)); - - // - // Compute tile offest - // - tileRowIndex = (y / MicroTileHeight) % pTileInfo->bankHeight; - tileColumnIndex = ((x / MicroTileWidth) / numPipes) % pTileInfo->bankWidth; - tileIndex = (tileRowIndex * pTileInfo->bankWidth) + tileColumnIndex; - tileOffset = tileIndex * microTileBytes; - - // - // Combine the slice offset and macro tile offset with the pixel and sample offsets, accounting - // for the pipe and bank bits in the middle of the address. - // - totalOffset = sliceOffset + macroTileOffset + elementOffset + tileOffset; - - // - // Get the pipe and bank. - // - - // when the tileMode is PRT type, then adjust x and y coordinates - if (IsPrtNoRotationTileMode(tileMode)) - { - x = x % macroTilePitch; - y = y % macroTileHeight; - } - - pipe = ComputePipeFromCoord(x, - y, - slice, - tileMode, - pipeSwizzle, - ignoreSE, - pTileInfo); - - bank = ComputeBankFromCoord(x, - y, - slice, - tileMode, - bankSwizzle, - tileSplitSlice, - pTileInfo); - - - // - // Split the offset to put some bits below the pipe+bank bits and some above. - // - pipeInterleaveMask = (1 << numPipeInterleaveBits) - 1; - bankInterleaveMask = (1 << numBankInterleaveBits) - 1; - pipeInterleaveOffset = totalOffset & pipeInterleaveMask; - bankInterleaveOffset = static_cast((totalOffset >> numPipeInterleaveBits) & - bankInterleaveMask); - offset = totalOffset >> (numPipeInterleaveBits + numBankInterleaveBits); - - // - // Assemble the address from its components. - // - addr = pipeInterleaveOffset; - // This is to remove /analyze warnings - UINT_32 pipeBits = pipe << numPipeInterleaveBits; - UINT_32 bankInterleaveBits = bankInterleaveOffset << (numPipeInterleaveBits + numPipeBits); - UINT_32 bankBits = bank << (numPipeInterleaveBits + numPipeBits + - numBankInterleaveBits); - UINT_64 offsetBits = offset << (numPipeInterleaveBits + numPipeBits + - numBankInterleaveBits + numBankBits); - - addr |= pipeBits; - addr |= bankInterleaveBits; - addr |= bankBits; - addr |= offsetBits; - - return addr; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::ComputeSurfaceAddrFromCoordMicroTiled -* -* @brief -* Computes the surface address and bit position from a coordinate for 1D tilied -* (micro tiled) -* @return -* The byte address -*************************************************************************************************** -*/ -UINT_64 EgBasedAddrLib::ComputeSurfaceAddrFromCoordMicroTiled( - UINT_32 x, ///< [in] x coordinate - UINT_32 y, ///< [in] y coordinate - UINT_32 slice, ///< [in] slice index - UINT_32 sample, ///< [in] sample index - UINT_32 bpp, ///< [in] bits per pixel - UINT_32 pitch, ///< [in] pitch, in pixels - UINT_32 height, ///< [in] height, in pixels - UINT_32 numSamples, ///< [in] number of samples - AddrTileMode tileMode, ///< [in] tile mode - AddrTileType microTileType, ///< [in] micro tiling type - BOOL_32 isDepthSampleOrder, ///< [in] TRUE if depth sample ordering is used - UINT_32* pBitPosition ///< [out] bit position, e.g. FMT_1 will use this - ) const -{ - UINT_64 addr = 0; - - UINT_32 microTileBytes; - UINT_64 sliceBytes; - UINT_32 microTilesPerRow; - UINT_32 microTileIndexX; - UINT_32 microTileIndexY; - UINT_32 microTileIndexZ; - UINT_64 sliceOffset; - UINT_64 microTileOffset; - UINT_32 sampleOffset; - UINT_32 pixelIndex; - UINT_32 pixelOffset; - - UINT_32 microTileThickness = ComputeSurfaceThickness(tileMode); - - // - // Compute the micro tile size. - // - microTileBytes = BITS_TO_BYTES(MicroTilePixels * microTileThickness * bpp * numSamples); - - // - // Compute the slice size. - // - sliceBytes = - BITS_TO_BYTES(static_cast(pitch) * height * microTileThickness * bpp * numSamples); - - // - // Compute the number of micro tiles per row. - // - microTilesPerRow = pitch / MicroTileWidth; - - // - // Compute the micro tile index. - // - microTileIndexX = x / MicroTileWidth; - microTileIndexY = y / MicroTileHeight; - microTileIndexZ = slice / microTileThickness; - - // - // Compute the slice offset. - // - sliceOffset = static_cast(microTileIndexZ) * sliceBytes; - - // - // Compute the offset to the micro tile containing the specified coordinate. - // - microTileOffset = (static_cast(microTileIndexY) * microTilesPerRow + microTileIndexX) * - microTileBytes; - - // - // Compute the pixel index within the micro tile. - // - pixelIndex = ComputePixelIndexWithinMicroTile(x, - y, - slice, - bpp, - tileMode, - microTileType); - - // Compute the sample offset. - // - if (isDepthSampleOrder) - { - // - // For depth surfaces, samples are stored contiguously for each element, so the sample - // offset is the sample number times the element size. - // - sampleOffset = sample * bpp; - pixelOffset = pixelIndex * bpp * numSamples; - } - else - { - // - // For color surfaces, all elements for a particular sample are stored contiguously, so - // the sample offset is the sample number times the micro tile size divided yBit the number - // of samples. - // - sampleOffset = sample * (microTileBytes*8 / numSamples); - pixelOffset = pixelIndex * bpp; - } - - // - // Compute the bit position of the pixel. Each element is stored with one bit per sample. - // - - UINT_32 elemOffset = sampleOffset + pixelOffset; - - *pBitPosition = elemOffset % 8; - elemOffset /= 8; - - // - // Combine the slice offset, micro tile offset, sample offset, and pixel offsets. - // - addr = sliceOffset + microTileOffset + elemOffset; - - return addr; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::HwlComputePixelCoordFromOffset -* -* @brief -* Compute pixel coordinate from offset inside a micro tile -* @return -* N/A -*************************************************************************************************** -*/ -VOID EgBasedAddrLib::HwlComputePixelCoordFromOffset( - UINT_32 offset, ///< [in] offset inside micro tile in bits - UINT_32 bpp, ///< [in] bits per pixel - UINT_32 numSamples, ///< [in] number of samples - AddrTileMode tileMode, ///< [in] tile mode - UINT_32 tileBase, ///< [in] base offset within a tile - UINT_32 compBits, ///< [in] component bits actually needed(for planar surface) - UINT_32* pX, ///< [out] x coordinate - UINT_32* pY, ///< [out] y coordinate - UINT_32* pSlice, ///< [out] slice index - UINT_32* pSample, ///< [out] sample index - AddrTileType microTileType, ///< [in] micro tiling type - BOOL_32 isDepthSampleOrder ///< [in] TRUE if depth sample order in microtile is used - ) const -{ - UINT_32 x = 0; - UINT_32 y = 0; - UINT_32 z = 0; - UINT_32 thickness = ComputeSurfaceThickness(tileMode); - - // For planar surface, we adjust offset acoording to tile base - if ((bpp != compBits) && (compBits != 0) && isDepthSampleOrder) - { - offset -= tileBase; - - ADDR_ASSERT(microTileType == ADDR_NON_DISPLAYABLE || - microTileType == ADDR_DEPTH_SAMPLE_ORDER); - - bpp = compBits; - } - - UINT_32 sampleTileBits; - UINT_32 samplePixelBits; - UINT_32 pixelIndex; - - if (isDepthSampleOrder) - { - samplePixelBits = bpp * numSamples; - pixelIndex = offset / samplePixelBits; - *pSample = (offset % samplePixelBits) / bpp; - } - else - { - sampleTileBits = MicroTilePixels * bpp * thickness; - *pSample = offset / sampleTileBits; - pixelIndex = (offset % sampleTileBits) / bpp; - } - - if (microTileType != ADDR_THICK) - { - if (microTileType == ADDR_DISPLAYABLE) // displayable - { - switch (bpp) - { - case 8: - x = pixelIndex & 0x7; - y = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,3),_BIT(pixelIndex,4)); - break; - case 16: - x = pixelIndex & 0x7; - y = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,4),_BIT(pixelIndex,3)); - break; - case 32: - x = Bits2Number(3, _BIT(pixelIndex,3),_BIT(pixelIndex,1),_BIT(pixelIndex,0)); - y = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,4),_BIT(pixelIndex,2)); - break; - case 64: - x = Bits2Number(3, _BIT(pixelIndex,3),_BIT(pixelIndex,2),_BIT(pixelIndex,0)); - y = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,4),_BIT(pixelIndex,1)); - break; - case 128: - x = Bits2Number(3, _BIT(pixelIndex,3),_BIT(pixelIndex,2),_BIT(pixelIndex,1)); - y = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,4),_BIT(pixelIndex,0)); - break; - default: - break; - } - } - else if (microTileType == ADDR_NON_DISPLAYABLE || microTileType == ADDR_DEPTH_SAMPLE_ORDER) - { - x = Bits2Number(3, _BIT(pixelIndex,4),_BIT(pixelIndex,2),_BIT(pixelIndex,0)); - y = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,3),_BIT(pixelIndex,1)); - } - else if (microTileType == ADDR_ROTATED) - { - /* - 8-Bit Elements - element_index[5:0] = { x[2], x[0], x[1], y[2], y[1], y[0] } - - 16-Bit Elements - element_index[5:0] = { x[2], x[1], x[0], y[2], y[1], y[0] } - - 32-Bit Elements - element_index[5:0] = { x[2], x[1], y[2], x[0], y[1], y[0] } - - 64-Bit Elements - element_index[5:0] = { y[2], x[2], x[1], y[1], x[0], y[0] } - */ - switch(bpp) - { - case 8: - x = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,3),_BIT(pixelIndex,4)); - y = pixelIndex & 0x7; - break; - case 16: - x = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,4),_BIT(pixelIndex,3)); - y = pixelIndex & 0x7; - break; - case 32: - x = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,4),_BIT(pixelIndex,2)); - y = Bits2Number(3, _BIT(pixelIndex,3),_BIT(pixelIndex,1),_BIT(pixelIndex,0)); - break; - case 64: - x = Bits2Number(3, _BIT(pixelIndex,4),_BIT(pixelIndex,3),_BIT(pixelIndex,1)); - y = Bits2Number(3, _BIT(pixelIndex,5),_BIT(pixelIndex,2),_BIT(pixelIndex,0)); - break; - default: - ADDR_ASSERT_ALWAYS(); - break; - } - } - - if (thickness > 1) // thick - { - z = Bits2Number(3, _BIT(pixelIndex,8),_BIT(pixelIndex,7),_BIT(pixelIndex,6)); - } - } - else - { - ADDR_ASSERT((m_chipFamily >= ADDR_CHIP_FAMILY_CI) && (thickness > 1)); - /* - 8-Bit Elements and 16-Bit Elements - element_index[7:0] = { y[2], x[2], z[1], z[0], y[1], x[1], y[0], x[0] } - - 32-Bit Elements - element_index[7:0] = { y[2], x[2], z[1], y[1], z[0], x[1], y[0], x[0] } - - 64-Bit Elements and 128-Bit Elements - element_index[7:0] = { y[2], x[2], z[1], y[1], x[1], z[0], y[0], x[0] } - - The equation to compute the element index for the extra thick tile: - element_index[8] = z[2] - */ - switch (bpp) - { - case 8: - case 16: // fall-through - x = Bits2Number(3, _BIT(pixelIndex,6),_BIT(pixelIndex,2),_BIT(pixelIndex,0)); - y = Bits2Number(3, _BIT(pixelIndex,7),_BIT(pixelIndex,3),_BIT(pixelIndex,1)); - z = Bits2Number(2, _BIT(pixelIndex,5),_BIT(pixelIndex,4)); - break; - case 32: - x = Bits2Number(3, _BIT(pixelIndex,6),_BIT(pixelIndex,2),_BIT(pixelIndex,0)); - y = Bits2Number(3, _BIT(pixelIndex,7),_BIT(pixelIndex,4),_BIT(pixelIndex,1)); - z = Bits2Number(2, _BIT(pixelIndex,5),_BIT(pixelIndex,3)); - break; - case 64: - case 128: // fall-through - x = Bits2Number(3, _BIT(pixelIndex,6),_BIT(pixelIndex,3),_BIT(pixelIndex,0)); - y = Bits2Number(3, _BIT(pixelIndex,7),_BIT(pixelIndex,4),_BIT(pixelIndex,1)); - z = Bits2Number(2, _BIT(pixelIndex,5),_BIT(pixelIndex,2)); - break; - default: - ADDR_ASSERT_ALWAYS(); - break; - } - - if (thickness == 8) - { - z += Bits2Number(3,_BIT(pixelIndex,8),0,0); - } - } - - *pX = x; - *pY = y; - *pSlice += z; -} - - -/** -*************************************************************************************************** -* EgBasedAddrLib::DispatchComputeSurfaceCoordFromAddrDispatch -* -* @brief -* Compute (x,y,slice,sample) coordinates from surface address -* @return -* N/A -*************************************************************************************************** -*/ -VOID EgBasedAddrLib::DispatchComputeSurfaceCoordFromAddr( - const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure - ) const -{ - UINT_64 addr = pIn->addr; - UINT_32 bitPosition = pIn->bitPosition; - UINT_32 bpp = pIn->bpp; - UINT_32 pitch = pIn->pitch; - UINT_32 height = pIn->height; - UINT_32 numSlices = pIn->numSlices; - UINT_32 numSamples = ((pIn->numSamples == 0) ? 1 : pIn->numSamples); - UINT_32 numFrags = ((pIn->numFrags == 0) ? numSamples : pIn->numFrags); - AddrTileMode tileMode = pIn->tileMode; - UINT_32 tileBase = pIn->tileBase; - UINT_32 compBits = pIn->compBits; - AddrTileType microTileType = pIn->tileType; - BOOL_32 ignoreSE = pIn->ignoreSE; - BOOL_32 isDepthSampleOrder = pIn->isDepth; - ADDR_TILEINFO* pTileInfo = pIn->pTileInfo; - - UINT_32* pX = &pOut->x; - UINT_32* pY = &pOut->y; - UINT_32* pSlice = &pOut->slice; - UINT_32* pSample = &pOut->sample; - - if (microTileType == ADDR_DEPTH_SAMPLE_ORDER) - { - isDepthSampleOrder = TRUE; - } - - if (m_chipFamily >= ADDR_CHIP_FAMILY_NI) - { - if (numFrags != numSamples) - { - numSamples = numFrags; - } - - /// @note - /// 128 bit/thick tiled surface doesn't support display tiling and - /// mipmap chain must have the same tileType, so please fill tileType correctly - if (!IsLinear(pIn->tileMode)) - { - if (bpp >= 128 || ComputeSurfaceThickness(tileMode) > 1) - { - ADDR_ASSERT(microTileType != ADDR_DISPLAYABLE); - } - } - } - - switch (tileMode) - { - case ADDR_TM_LINEAR_GENERAL://fall through - case ADDR_TM_LINEAR_ALIGNED: - ComputeSurfaceCoordFromAddrLinear(addr, - bitPosition, - bpp, - pitch, - height, - numSlices, - pX, - pY, - pSlice, - pSample); - break; - case ADDR_TM_1D_TILED_THIN1://fall through - case ADDR_TM_1D_TILED_THICK: - ComputeSurfaceCoordFromAddrMicroTiled(addr, - bitPosition, - bpp, - pitch, - height, - numSamples, - tileMode, - tileBase, - compBits, - pX, - pY, - pSlice, - pSample, - microTileType, - isDepthSampleOrder); - break; - case ADDR_TM_2D_TILED_THIN1: //fall through - case ADDR_TM_2D_TILED_THICK: //fall through - case ADDR_TM_3D_TILED_THIN1: //fall through - case ADDR_TM_3D_TILED_THICK: //fall through - case ADDR_TM_2D_TILED_XTHICK: //fall through - case ADDR_TM_3D_TILED_XTHICK: //fall through - case ADDR_TM_PRT_TILED_THIN1: //fall through - case ADDR_TM_PRT_2D_TILED_THIN1://fall through - case ADDR_TM_PRT_3D_TILED_THIN1://fall through - case ADDR_TM_PRT_TILED_THICK: //fall through - case ADDR_TM_PRT_2D_TILED_THICK://fall through - case ADDR_TM_PRT_3D_TILED_THICK: - UINT_32 pipeSwizzle; - UINT_32 bankSwizzle; - - if (m_configFlags.useCombinedSwizzle) - { - ExtractBankPipeSwizzle(pIn->tileSwizzle, pIn->pTileInfo, - &bankSwizzle, &pipeSwizzle); - } - else - { - pipeSwizzle = pIn->pipeSwizzle; - bankSwizzle = pIn->bankSwizzle; - } - - ComputeSurfaceCoordFromAddrMacroTiled(addr, - bitPosition, - bpp, - pitch, - height, - numSamples, - tileMode, - tileBase, - compBits, - microTileType, - ignoreSE, - isDepthSampleOrder, - pipeSwizzle, - bankSwizzle, - pTileInfo, - pX, - pY, - pSlice, - pSample); - break; - default: - ADDR_ASSERT_ALWAYS(); - } -} - - -/** -*************************************************************************************************** -* EgBasedAddrLib::ComputeSurfaceCoordFromAddrMacroTiled -* -* @brief -* Compute surface coordinates from address for macro tiled surface -* @return -* N/A -*************************************************************************************************** -*/ -VOID EgBasedAddrLib::ComputeSurfaceCoordFromAddrMacroTiled( - UINT_64 addr, ///< [in] byte address - UINT_32 bitPosition, ///< [in] bit position - UINT_32 bpp, ///< [in] bits per pixel - UINT_32 pitch, ///< [in] pitch in pixels - UINT_32 height, ///< [in] height in pixels - UINT_32 numSamples, ///< [in] number of samples - AddrTileMode tileMode, ///< [in] tile mode - UINT_32 tileBase, ///< [in] tile base offset - UINT_32 compBits, ///< [in] component bits (for planar surface) - AddrTileType microTileType, ///< [in] micro tiling type - BOOL_32 ignoreSE, ///< [in] TRUE if shader engines can be ignored - BOOL_32 isDepthSampleOrder, ///< [in] TRUE if depth sample order is used - UINT_32 pipeSwizzle, ///< [in] pipe swizzle - UINT_32 bankSwizzle, ///< [in] bank swizzle - ADDR_TILEINFO* pTileInfo, ///< [in] bank structure. - /// **All fields to be valid on entry** - UINT_32* pX, ///< [out] X coord - UINT_32* pY, ///< [out] Y coord - UINT_32* pSlice, ///< [out] slice index - UINT_32* pSample ///< [out] sample index - ) const -{ - UINT_32 mx; - UINT_32 my; - UINT_64 tileBits; - UINT_64 macroTileBits; - UINT_32 slices; - UINT_32 tileSlices; - UINT_64 elementOffset; - UINT_64 macroTileIndex; - UINT_32 tileIndex; - UINT_64 totalOffset; - - - UINT_32 bank; - UINT_32 pipe; - UINT_32 groupBits = m_pipeInterleaveBytes << 3; - UINT_32 pipes = HwlGetPipes(pTileInfo); - UINT_32 banks = pTileInfo->banks; - - UINT_32 bankInterleave = m_bankInterleave; - - UINT_64 addrBits = BYTES_TO_BITS(addr) + bitPosition; - - // - // remove bits for bank and pipe - // - totalOffset = (addrBits % groupBits) + - (((addrBits / groupBits / pipes) % bankInterleave) * groupBits) + - (((addrBits / groupBits / pipes) / bankInterleave) / banks) * groupBits * bankInterleave; - - UINT_32 microTileThickness = ComputeSurfaceThickness(tileMode); - - UINT_32 microTileBits = bpp * microTileThickness * MicroTilePixels * numSamples; - - UINT_32 microTileBytes = BITS_TO_BYTES(microTileBits); - // - // Determine if tiles need to be split across slices. - // - // If the size of the micro tile is larger than the tile split size, then the tile will be - // split across multiple slices. - // - UINT_32 slicesPerTile = 1; //_State->TileSlices - - if ((microTileBytes > pTileInfo->tileSplitBytes) && (microTileThickness == 1)) - { //don't support for thick mode - - // - // Compute the number of slices per tile. - // - slicesPerTile = microTileBytes / pTileInfo->tileSplitBytes; - } - - tileBits = microTileBits / slicesPerTile; // micro tile bits - - // in micro tiles because not MicroTileWidth timed. - UINT_32 macroWidth = pTileInfo->bankWidth * pipes * pTileInfo->macroAspectRatio; - // in micro tiles as well - UINT_32 macroHeight = pTileInfo->bankHeight * banks / pTileInfo->macroAspectRatio; - - UINT_32 pitchInMacroTiles = pitch / MicroTileWidth / macroWidth; - - macroTileBits = (macroWidth * macroHeight) * tileBits / (banks * pipes); - - macroTileIndex = totalOffset / macroTileBits; - - // pitchMacros * height / heightMacros; macroTilesPerSlice == _State->SliceMacros - UINT_32 macroTilesPerSlice = (pitch / (macroWidth * MicroTileWidth)) * height / - (macroHeight * MicroTileWidth); - - slices = static_cast(macroTileIndex / macroTilesPerSlice); - - *pSlice = static_cast(slices / slicesPerTile * microTileThickness); - - // - // calculate element offset and x[2:0], y[2:0], z[1:0] for thick - // - tileSlices = slices % slicesPerTile; - - elementOffset = tileSlices * tileBits; - elementOffset += totalOffset % tileBits; - - UINT_32 coordZ = 0; - - HwlComputePixelCoordFromOffset(static_cast(elementOffset), - bpp, - numSamples, - tileMode, - tileBase, - compBits, - pX, - pY, - &coordZ, - pSample, - microTileType, - isDepthSampleOrder); - - macroTileIndex = macroTileIndex % macroTilesPerSlice; - *pY += static_cast(macroTileIndex / pitchInMacroTiles * macroHeight * MicroTileHeight); - *pX += static_cast(macroTileIndex % pitchInMacroTiles * macroWidth * MicroTileWidth); - - *pSlice += coordZ; - - tileIndex = static_cast((totalOffset % macroTileBits) / tileBits); - - my = (tileIndex / pTileInfo->bankWidth) % pTileInfo->bankHeight * MicroTileHeight; - mx = (tileIndex % pTileInfo->bankWidth) * pipes * MicroTileWidth; - - *pY += my; - *pX += mx; - - bank = ComputeBankFromAddr(addr, banks, pipes); - pipe = ComputePipeFromAddr(addr, pipes); - - HwlComputeSurfaceCoord2DFromBankPipe(tileMode, - pX, - pY, - *pSlice, - bank, - pipe, - bankSwizzle, - pipeSwizzle, - tileSlices, - ignoreSE, - pTileInfo); -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::ComputeSurfaceCoord2DFromBankPipe -* -* @brief -* Compute surface x,y coordinates from bank/pipe info -* @return -* N/A -*************************************************************************************************** -*/ -VOID EgBasedAddrLib::ComputeSurfaceCoord2DFromBankPipe( - AddrTileMode tileMode, ///< [in] tile mode - UINT_32 x, ///< [in] x coordinate - UINT_32 y, ///< [in] y coordinate - UINT_32 slice, ///< [in] slice index - UINT_32 bank, ///< [in] bank number - UINT_32 pipe, ///< [in] pipe number - UINT_32 bankSwizzle,///< [in] bank swizzle - UINT_32 pipeSwizzle,///< [in] pipe swizzle - UINT_32 tileSlices, ///< [in] slices in a micro tile - ADDR_TILEINFO* pTileInfo, ///< [in] bank structure. **All fields to be valid on entry** - CoordFromBankPipe* pOutput ///< [out] pointer to extracted x/y bits - ) const -{ - UINT_32 yBit3 = 0; - UINT_32 yBit4 = 0; - UINT_32 yBit5 = 0; - UINT_32 yBit6 = 0; - - UINT_32 xBit3 = 0; - UINT_32 xBit4 = 0; - UINT_32 xBit5 = 0; - - UINT_32 tileSplitRotation; - - UINT_32 numPipes = HwlGetPipes(pTileInfo); - - UINT_32 bankRotation = ComputeBankRotation(tileMode, - pTileInfo->banks, numPipes); - - UINT_32 pipeRotation = ComputePipeRotation(tileMode, numPipes); - - UINT_32 xBit = x / (MicroTileWidth * pTileInfo->bankWidth * numPipes); - UINT_32 yBit = y / (MicroTileHeight * pTileInfo->bankHeight); - - //calculate the bank and pipe before rotation and swizzle - - switch (tileMode) - { - case ADDR_TM_2D_TILED_THIN1: //fall through - case ADDR_TM_2D_TILED_THICK: //fall through - case ADDR_TM_2D_TILED_XTHICK: //fall through - case ADDR_TM_3D_TILED_THIN1: //fall through - case ADDR_TM_3D_TILED_THICK: //fall through - case ADDR_TM_3D_TILED_XTHICK: - tileSplitRotation = ((pTileInfo->banks / 2) + 1); - break; - default: - tileSplitRotation = 0; - break; - } - - UINT_32 microTileThickness = ComputeSurfaceThickness(tileMode); - - bank ^= tileSplitRotation * tileSlices; - if (pipeRotation == 0) - { - bank ^= bankRotation * (slice / microTileThickness) + bankSwizzle; - bank %= pTileInfo->banks; - pipe ^= pipeSwizzle; - } - else - { - bank ^= bankRotation * (slice / microTileThickness) / numPipes + bankSwizzle; - bank %= pTileInfo->banks; - pipe ^= pipeRotation * (slice / microTileThickness) + pipeSwizzle; - } - - if (pTileInfo->macroAspectRatio == 1) - { - switch (pTileInfo->banks) - { - case 2: - yBit3 = _BIT(bank, 0) ^ _BIT(xBit,0); - break; - case 4: - yBit4 = _BIT(bank, 0) ^ _BIT(xBit,0); - yBit3 = _BIT(bank, 1) ^ _BIT(xBit,1); - break; - case 8: - yBit3 = _BIT(bank, 2) ^ _BIT(xBit,2); - yBit5 = _BIT(bank, 0) ^ _BIT(xBit,0); - yBit4 = _BIT(bank, 1) ^ _BIT(xBit,1) ^ yBit5; - break; - case 16: - yBit3 = _BIT(bank, 3) ^ _BIT(xBit, 3); - yBit4 = _BIT(bank, 2) ^ _BIT(xBit, 2); - yBit6 = _BIT(bank, 0) ^ _BIT(xBit, 0); - yBit5 = _BIT(bank, 1) ^ _BIT(xBit, 1) ^ yBit6; - break; - default: - break; - } - - } - else if (pTileInfo->macroAspectRatio == 2) - { - switch (pTileInfo->banks) - { - case 2: //xBit3 = yBit3^b0 - xBit3 = _BIT(bank, 0) ^ _BIT(yBit,0); - break; - case 4: //xBit3=yBit4^b0; yBit3=xBit4^b1 - xBit3 = _BIT(bank, 0) ^ _BIT(yBit,1); - yBit3 = _BIT(bank, 1) ^ _BIT(xBit,1); - break; - case 8: //xBit4, xBit5, yBit5 are known - xBit3 = _BIT(bank, 0) ^ _BIT(yBit,2); - yBit3 = _BIT(bank, 2) ^ _BIT(xBit,2); - yBit4 = _BIT(bank, 1) ^ _BIT(xBit,1) ^ _BIT(yBit, 2); - break; - case 16://x4,x5,x6,y6 are known - xBit3 = _BIT(bank, 0) ^ _BIT(yBit, 3); //x3 = y6 ^ b0 - yBit3 = _BIT(bank, 3) ^ _BIT(xBit, 3); //y3 = x6 ^ b3 - yBit4 = _BIT(bank, 2) ^ _BIT(xBit, 2); //y4 = x5 ^ b2 - yBit5 = _BIT(bank, 1) ^ _BIT(xBit, 1) ^ _BIT(yBit, 3); //y5=x4^y6^b1 - break; - default: - break; - } - } - else if (pTileInfo->macroAspectRatio == 4) - { - switch (pTileInfo->banks) - { - case 4: //yBit3, yBit4 - xBit3 = _BIT(bank, 0) ^ _BIT(yBit,1); - xBit4 = _BIT(bank, 1) ^ _BIT(yBit,0); - break; - case 8: //xBit5, yBit4, yBit5 - xBit3 = _BIT(bank, 0) ^ _BIT(yBit,2); - yBit3 = _BIT(bank, 2) ^ _BIT(xBit,2); - xBit4 = _BIT(bank, 1) ^ _BIT(yBit,1) ^ _BIT(yBit,2); - break; - case 16: //xBit5, xBit6, yBit5, yBit6 - xBit3 = _BIT(bank, 0) ^ _BIT(yBit, 3);//x3 = b0 ^ y6 - xBit4 = _BIT(bank, 1) ^ _BIT(yBit, 2) ^ _BIT(yBit, 3);//x4 = b1 ^ y5 ^ y6; - yBit3 = _BIT(bank, 3) ^ _BIT(xBit, 3); //y3 = b3 ^ x6; - yBit4 = _BIT(bank, 2) ^ _BIT(xBit, 2); //y4 = b2 ^ x5; - break; - default: - break; - } - } - else if (pTileInfo->macroAspectRatio == 8) - { - switch (pTileInfo->banks) - { - case 8: //yBit3, yBit4, yBit5 - xBit3 = _BIT(bank, 0) ^ _BIT(yBit,2); //x3 = b0 ^ y5; - xBit4 = _BIT(bank, 1) ^ _BIT(yBit,1) ^ _BIT(yBit, 2);//x4 = b1 ^ y4 ^ y5; - xBit5 = _BIT(bank, 2) ^ _BIT(yBit,0); - break; - case 16: //xBit6, yBit4, yBit5, yBit6 - xBit3 = _BIT(bank, 0) ^ _BIT(yBit, 3);//x3 = y6 ^ b0 - xBit4 = _BIT(bank, 1) ^ _BIT(yBit, 2) ^ _BIT(yBit, 3);//x4 = y5 ^ y6 ^ b1 - xBit5 = _BIT(bank, 2) ^ _BIT(yBit, 1);//x5 = y4 ^ b2 - yBit3 = _BIT(bank, 3) ^ _BIT(xBit, 3); //y3 = x6 ^ b3 - break; - default: - break; - } - } - - pOutput->xBits = xBit; - pOutput->yBits = yBit; - - pOutput->xBit3 = xBit3; - pOutput->xBit4 = xBit4; - pOutput->xBit5 = xBit5; - pOutput->yBit3 = yBit3; - pOutput->yBit4 = yBit4; - pOutput->yBit5 = yBit5; - pOutput->yBit6 = yBit6; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::HwlExtractBankPipeSwizzle -* @brief -* Entry of EgBasedAddrLib ExtractBankPipeSwizzle -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE EgBasedAddrLib::HwlExtractBankPipeSwizzle( - const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, ///< [in] input structure - ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut ///< [out] output structure - ) const -{ - ExtractBankPipeSwizzle(pIn->base256b, - pIn->pTileInfo, - &pOut->bankSwizzle, - &pOut->pipeSwizzle); - - return ADDR_OK; -} - - -/** -*************************************************************************************************** -* EgBasedAddrLib::HwlCombineBankPipeSwizzle -* @brief -* Combine bank/pipe swizzle -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE EgBasedAddrLib::HwlCombineBankPipeSwizzle( - UINT_32 bankSwizzle, ///< [in] bank swizzle - UINT_32 pipeSwizzle, ///< [in] pipe swizzle - ADDR_TILEINFO* pTileInfo, ///< [in] tile info - UINT_64 baseAddr, ///< [in] base address - UINT_32* pTileSwizzle ///< [out] combined swizzle - ) const -{ - ADDR_E_RETURNCODE retCode = ADDR_OK; - - if (pTileSwizzle) - { - *pTileSwizzle = GetBankPipeSwizzle(bankSwizzle, pipeSwizzle, baseAddr, pTileInfo); - } - else - { - retCode = ADDR_INVALIDPARAMS; - } - - return retCode; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::HwlComputeBaseSwizzle -* @brief -* Compute base swizzle -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE EgBasedAddrLib::HwlComputeBaseSwizzle( - const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, - ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut - ) const -{ - UINT_32 bankSwizzle = 0; - UINT_32 pipeSwizzle = 0; - ADDR_TILEINFO* pTileInfo = pIn->pTileInfo; - - ADDR_ASSERT(IsMacroTiled(pIn->tileMode)); - ADDR_ASSERT(pIn->pTileInfo); - - /// This is a legacy misreading of h/w doc, use it as it doesn't hurt. - static const UINT_8 bankRotationArray[4][16] = { - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, // ADDR_SURF_2_BANK - { 0, 1, 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, // ADDR_SURF_4_BANK - { 0, 3, 6, 1, 4, 7, 2, 5, 0, 0, 0, 0, 0, 0, 0, 0 }, // ADDR_SURF_8_BANK - { 0, 7, 14, 5, 12, 3, 10, 1, 8, 15, 6, 13, 4, 11, 2, 9 }, // ADDR_SURF_16_BANK - }; - - UINT_32 banks = pTileInfo ? pTileInfo->banks : 2; - UINT_32 hwNumBanks; - - // Uses less bank swizzle bits - if (pIn->option.reduceBankBit && banks > 2) - { - banks >>= 1; - } - - switch (banks) - { - case 2: - hwNumBanks = 0; - break; - case 4: - hwNumBanks = 1; - break; - case 8: - hwNumBanks = 2; - break; - case 16: - hwNumBanks = 3; - break; - default: - ADDR_ASSERT_ALWAYS(); - hwNumBanks = 0; - break; - } - - if (pIn->option.genOption == ADDR_SWIZZLE_GEN_LINEAR) - { - bankSwizzle = pIn->surfIndex & (banks - 1); - } - else // (pIn->option.genOption == ADDR_SWIZZLE_GEN_DEFAULT) - { - bankSwizzle = bankRotationArray[hwNumBanks][pIn->surfIndex & (banks - 1)]; - } - - if (IsMacro3dTiled(pIn->tileMode)) - { - pipeSwizzle = pIn->surfIndex & (HwlGetPipes(pTileInfo) - 1); - } - - return HwlCombineBankPipeSwizzle(bankSwizzle, pipeSwizzle, pTileInfo, 0, &pOut->tileSwizzle); -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::ExtractBankPipeSwizzle -* @brief -* Extract bank/pipe swizzle from base256b -* @return -* N/A -*************************************************************************************************** -*/ -VOID EgBasedAddrLib::ExtractBankPipeSwizzle( - UINT_32 base256b, ///< [in] input base256b register value - ADDR_TILEINFO* pTileInfo, ///< [in] 2D tile parameters. Client must provide all data - UINT_32* pBankSwizzle, ///< [out] bank swizzle - UINT_32* pPipeSwizzle ///< [out] pipe swizzle - ) const -{ - UINT_32 bankSwizzle = 0; - UINT_32 pipeSwizzle = 0; - - if (base256b != 0) - { - UINT_32 numPipes = HwlGetPipes(pTileInfo); - UINT_32 bankBits = QLog2(pTileInfo->banks); - UINT_32 pipeBits = QLog2(numPipes); - UINT_32 groupBytes = m_pipeInterleaveBytes; - UINT_32 bankInterleave = m_bankInterleave; - - pipeSwizzle = - (base256b / (groupBytes >> 8)) & ((1<> 8) / numPipes / bankInterleave) & ((1 << bankBits) - 1); - } - - *pPipeSwizzle = pipeSwizzle; - *pBankSwizzle = bankSwizzle; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::GetBankPipeSwizzle -* @brief -* Combine bank/pipe swizzle -* @return -* Base256b bits (only filled bank/pipe bits) -*************************************************************************************************** -*/ -UINT_32 EgBasedAddrLib::GetBankPipeSwizzle( - UINT_32 bankSwizzle, ///< [in] bank swizzle - UINT_32 pipeSwizzle, ///< [in] pipe swizzle - UINT_64 baseAddr, ///< [in] base address - ADDR_TILEINFO* pTileInfo ///< [in] tile info - ) const -{ - UINT_32 pipeBits = QLog2(HwlGetPipes(pTileInfo)); - UINT_32 bankInterleaveBits = QLog2(m_bankInterleave); - UINT_32 tileSwizzle = pipeSwizzle + ((bankSwizzle << bankInterleaveBits) << pipeBits); - - baseAddr ^= tileSwizzle * m_pipeInterleaveBytes; - baseAddr >>= 8; - - return static_cast(baseAddr); -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::ComputeSliceTileSwizzle -* @brief -* Compute cubemap/3d texture faces/slices tile swizzle -* @return -* Tile swizzle -*************************************************************************************************** -*/ -UINT_32 EgBasedAddrLib::ComputeSliceTileSwizzle( - AddrTileMode tileMode, ///< [in] Tile mode - UINT_32 baseSwizzle, ///< [in] Base swizzle - UINT_32 slice, ///< [in] Slice index, Cubemap face index, 0 means +X - UINT_64 baseAddr, ///< [in] Base address - ADDR_TILEINFO* pTileInfo ///< [in] Bank structure - ) const -{ - UINT_32 tileSwizzle = 0; - - if (IsMacroTiled(tileMode)) // Swizzle only for macro tile mode - { - UINT_32 firstSlice = slice / ComputeSurfaceThickness(tileMode); - - UINT_32 numPipes = HwlGetPipes(pTileInfo); - UINT_32 numBanks = pTileInfo->banks; - - UINT_32 pipeRotation; - UINT_32 bankRotation; - - UINT_32 bankSwizzle = 0; - UINT_32 pipeSwizzle = 0; - - pipeRotation = ComputePipeRotation(tileMode, numPipes); - bankRotation = ComputeBankRotation(tileMode, numBanks, numPipes); - - if (baseSwizzle != 0) - { - ExtractBankPipeSwizzle(baseSwizzle, - pTileInfo, - &bankSwizzle, - &pipeSwizzle); - } - - if (pipeRotation == 0) //2D mode - { - bankSwizzle += firstSlice * bankRotation; - bankSwizzle %= numBanks; - } - else //3D mode - { - pipeSwizzle += firstSlice * pipeRotation; - pipeSwizzle %= numPipes; - bankSwizzle += firstSlice * bankRotation / numPipes; - bankSwizzle %= numBanks; - } - - tileSwizzle = GetBankPipeSwizzle(bankSwizzle, - pipeSwizzle, - baseAddr, - pTileInfo); - } - - return tileSwizzle; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::HwlComputeQbStereoRightSwizzle -* -* @brief -* Compute right eye swizzle -* @return -* swizzle -*************************************************************************************************** -*/ -UINT_32 EgBasedAddrLib::HwlComputeQbStereoRightSwizzle( - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pInfo ///< [in] Surface info, must be valid - ) const -{ - UINT_32 bankBits = 0; - UINT_32 swizzle = 0; - - // The assumption is default swizzle for left eye is 0 - if (IsMacroTiled(pInfo->tileMode) && pInfo->pStereoInfo && pInfo->pTileInfo) - { - bankBits = ComputeBankFromCoord(0, pInfo->height, 0, - pInfo->tileMode, 0, 0, pInfo->pTileInfo); - - if (bankBits) - { - HwlCombineBankPipeSwizzle(bankBits, 0, pInfo->pTileInfo, 0, &swizzle); - } - } - - return swizzle; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::ComputeBankFromCoord -* -* @brief -* Compute bank number from coordinates -* @return -* Bank number -*************************************************************************************************** -*/ -UINT_32 EgBasedAddrLib::ComputeBankFromCoord( - UINT_32 x, ///< [in] x coordinate - UINT_32 y, ///< [in] y coordinate - UINT_32 slice, ///< [in] slice index - AddrTileMode tileMode, ///< [in] tile mode - UINT_32 bankSwizzle, ///< [in] bank swizzle - UINT_32 tileSplitSlice, ///< [in] If the size of the pixel offset is larger than the - /// tile split size, then the pixel will be moved to a separate - /// slice. This value equals pixelOffset / tileSplitBytes - /// in this case. Otherwise this is 0. - ADDR_TILEINFO* pTileInfo ///< [in] tile info - ) const -{ - UINT_32 pipes = HwlGetPipes(pTileInfo); - UINT_32 bankBit0 = 0; - UINT_32 bankBit1 = 0; - UINT_32 bankBit2 = 0; - UINT_32 bankBit3 = 0; - UINT_32 sliceRotation; - UINT_32 tileSplitRotation; - UINT_32 bank; - UINT_32 numBanks = pTileInfo->banks; - UINT_32 bankWidth = pTileInfo->bankWidth; - UINT_32 bankHeight = pTileInfo->bankHeight; - - UINT_32 tx = x / MicroTileWidth / (bankWidth * pipes); - UINT_32 ty = y / MicroTileHeight / bankHeight; - - UINT_32 x3 = _BIT(tx,0); - UINT_32 x4 = _BIT(tx,1); - UINT_32 x5 = _BIT(tx,2); - UINT_32 x6 = _BIT(tx,3); - UINT_32 y3 = _BIT(ty,0); - UINT_32 y4 = _BIT(ty,1); - UINT_32 y5 = _BIT(ty,2); - UINT_32 y6 = _BIT(ty,3); - - switch (numBanks) - { - case 16: - bankBit0 = x3 ^ y6; - bankBit1 = x4 ^ y5 ^ y6; - bankBit2 = x5 ^ y4; - bankBit3 = x6 ^ y3; - break; - case 8: - bankBit0 = x3 ^ y5; - bankBit1 = x4 ^ y4 ^ y5; - bankBit2 = x5 ^ y3; - break; - case 4: - bankBit0 = x3 ^ y4; - bankBit1 = x4 ^ y3; - break; - case 2: - bankBit0 = x3 ^ y3; - break; - default: - ADDR_ASSERT_ALWAYS(); - break; - } - - bank = bankBit0 | (bankBit1 << 1) | (bankBit2 << 2) | (bankBit3 << 3); - - //Bits2Number(4, bankBit3, bankBit2, bankBit1, bankBit0); - - bank = HwlPreAdjustBank((x / MicroTileWidth), bank, pTileInfo); - // - // Compute bank rotation for the slice. - // - UINT_32 microTileThickness = ComputeSurfaceThickness(tileMode); - - switch (tileMode) - { - case ADDR_TM_2D_TILED_THIN1: // fall through - case ADDR_TM_2D_TILED_THICK: // fall through - case ADDR_TM_2D_TILED_XTHICK: - sliceRotation = ((numBanks / 2) - 1) * (slice / microTileThickness); - break; - case ADDR_TM_3D_TILED_THIN1: // fall through - case ADDR_TM_3D_TILED_THICK: // fall through - case ADDR_TM_3D_TILED_XTHICK: - sliceRotation = - Max(1u, (pipes / 2) - 1) * (slice / microTileThickness) / pipes; - break; - default: - sliceRotation = 0; - break; - } - - - // - // Compute bank rotation for the tile split slice. - // - // The sample slice will be non-zero if samples must be split across multiple slices. - // This situation arises when the micro tile size multiplied yBit the number of samples exceeds - // the split size (set in GB_ADDR_CONFIG). - // - switch (tileMode) - { - case ADDR_TM_2D_TILED_THIN1: //fall through - case ADDR_TM_3D_TILED_THIN1: //fall through - case ADDR_TM_PRT_2D_TILED_THIN1: //fall through - case ADDR_TM_PRT_3D_TILED_THIN1: //fall through - tileSplitRotation = ((numBanks / 2) + 1) * tileSplitSlice; - break; - default: - tileSplitRotation = 0; - break; - } - - // - // Apply bank rotation for the slice and tile split slice. - // - bank ^= bankSwizzle + sliceRotation; - bank ^= tileSplitRotation; - - bank &= (numBanks - 1); - - return bank; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::ComputeBankFromAddr -* -* @brief -* Compute the bank number from an address -* @return -* Bank number -*************************************************************************************************** -*/ -UINT_32 EgBasedAddrLib::ComputeBankFromAddr( - UINT_64 addr, ///< [in] address - UINT_32 numBanks, ///< [in] number of banks - UINT_32 numPipes ///< [in] number of pipes - ) const -{ - UINT_32 bank; - - // - // The LSBs of the address are arranged as follows: - // bank | bankInterleave | pipe | pipeInterleave - // - // To get the bank number, shift off the pipe interleave, pipe, and bank interlave bits and - // mask the bank bits. - // - bank = static_cast( - (addr >> Log2(m_pipeInterleaveBytes * numPipes * m_bankInterleave)) & - (numBanks - 1) - ); - - return bank; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::ComputePipeRotation -* -* @brief -* Compute pipe rotation value -* @return -* Pipe rotation -*************************************************************************************************** -*/ -UINT_32 EgBasedAddrLib::ComputePipeRotation( - AddrTileMode tileMode, ///< [in] tile mode - UINT_32 numPipes ///< [in] number of pipes - ) const -{ - UINT_32 rotation; - - switch (tileMode) - { - case ADDR_TM_3D_TILED_THIN1: //fall through - case ADDR_TM_3D_TILED_THICK: //fall through - case ADDR_TM_3D_TILED_XTHICK: //fall through - case ADDR_TM_PRT_3D_TILED_THIN1: //fall through - case ADDR_TM_PRT_3D_TILED_THICK: - rotation = (numPipes < 4) ? 1 : (numPipes / 2 - 1); - break; - default: - rotation = 0; - } - - return rotation; -} - - - -/** -*************************************************************************************************** -* EgBasedAddrLib::ComputeBankRotation -* -* @brief -* Compute bank rotation value -* @return -* Bank rotation -*************************************************************************************************** -*/ -UINT_32 EgBasedAddrLib::ComputeBankRotation( - AddrTileMode tileMode, ///< [in] tile mode - UINT_32 numBanks, ///< [in] number of banks - UINT_32 numPipes ///< [in] number of pipes - ) const -{ - UINT_32 rotation; - - switch (tileMode) - { - case ADDR_TM_2D_TILED_THIN1: // fall through - case ADDR_TM_2D_TILED_THICK: // fall through - case ADDR_TM_2D_TILED_XTHICK: - case ADDR_TM_PRT_2D_TILED_THIN1: - case ADDR_TM_PRT_2D_TILED_THICK: - // Rotate banks per Z-slice yBit 1 for 4-bank or 3 for 8-bank - rotation = numBanks / 2 - 1; - break; - case ADDR_TM_3D_TILED_THIN1: // fall through - case ADDR_TM_3D_TILED_THICK: // fall through - case ADDR_TM_3D_TILED_XTHICK: - case ADDR_TM_PRT_3D_TILED_THIN1: - case ADDR_TM_PRT_3D_TILED_THICK: - rotation = (numPipes < 4) ? 1 : (numPipes / 2 - 1); // rotate pipes & banks - break; - default: - rotation = 0; - } - - return rotation; -} - - -/** -*************************************************************************************************** -* EgBasedAddrLib::ComputeHtileBytes -* -* @brief -* Compute htile size in bytes -* -* @return -* Htile size in bytes -*************************************************************************************************** -*/ -UINT_64 EgBasedAddrLib::ComputeHtileBytes( - UINT_32 pitch, ///< [in] pitch - UINT_32 height, ///< [in] height - UINT_32 bpp, ///< [in] bits per pixel - BOOL_32 isLinear, ///< [in] if it is linear mode - UINT_32 numSlices, ///< [in] number of slices - UINT_64* sliceBytes, ///< [out] bytes per slice - UINT_32 baseAlign ///< [in] base alignments - ) const -{ - UINT_64 surfBytes; - - const UINT_64 HtileCacheLineSize = BITS_TO_BYTES(HtileCacheBits); - - *sliceBytes = BITS_TO_BYTES(static_cast(pitch) * height * bpp / 64); - - if (m_configFlags.useHtileSliceAlign) - { - // Align the sliceSize to htilecachelinesize * pipes at first - *sliceBytes = PowTwoAlign(*sliceBytes, HtileCacheLineSize * m_pipes); - surfBytes = *sliceBytes * numSlices; - } - else - { - // Align the surfSize to htilecachelinesize * pipes at last - surfBytes = *sliceBytes * numSlices; - surfBytes = PowTwoAlign(surfBytes, HtileCacheLineSize * m_pipes); - } - - return surfBytes; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::DispatchComputeFmaskInfo -* -* @brief -* Compute fmask sizes include padded pitch, height, slices, total size in bytes, -* meanwhile output suitable tile mode and alignments as well. Results are returned -* through output parameters. -* -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE EgBasedAddrLib::DispatchComputeFmaskInfo( - const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut) ///< [out] output structure -{ - ADDR_E_RETURNCODE retCode = ADDR_OK; - - ADDR_COMPUTE_SURFACE_INFO_INPUT surfIn = {0}; - ADDR_COMPUTE_SURFACE_INFO_OUTPUT surfOut = {0}; - - // Setup input structure - surfIn.tileMode = pIn->tileMode; - surfIn.width = pIn->pitch; - surfIn.height = pIn->height; - surfIn.numSlices = pIn->numSlices; - surfIn.pTileInfo = pIn->pTileInfo; - surfIn.tileType = ADDR_NON_DISPLAYABLE; - surfIn.flags.fmask = 1; - - // Setup output structure - surfOut.pTileInfo = pOut->pTileInfo; - - // Setup hwl specific fields - HwlFmaskPreThunkSurfInfo(pIn, pOut, &surfIn, &surfOut); - - surfIn.bpp = HwlComputeFmaskBits(pIn, &surfIn.numSamples); - - // ComputeSurfaceInfo needs numSamples in surfOut as surface routines need adjusted numSamples - surfOut.numSamples = surfIn.numSamples; - - retCode = HwlComputeSurfaceInfo(&surfIn, &surfOut); - - // Save bpp field for surface dump support - surfOut.bpp = surfIn.bpp; - - if (retCode == ADDR_OK) - { - pOut->bpp = surfOut.bpp; - pOut->pitch = surfOut.pitch; - pOut->height = surfOut.height; - pOut->numSlices = surfOut.depth; - pOut->fmaskBytes = surfOut.surfSize; - pOut->baseAlign = surfOut.baseAlign; - pOut->pitchAlign = surfOut.pitchAlign; - pOut->heightAlign = surfOut.heightAlign; - - if (surfOut.depth > 1) - { - // For fmask, expNumSlices is stored in depth. - pOut->sliceSize = surfOut.surfSize / surfOut.depth; - } - else - { - pOut->sliceSize = surfOut.surfSize; - } - - // Save numSamples field for surface dump support - pOut->numSamples = surfOut.numSamples; - - HwlFmaskPostThunkSurfInfo(&surfOut, pOut); - } - - return retCode; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::HwlFmaskSurfaceInfo -* @brief -* Entry of EgBasedAddrLib ComputeFmaskInfo -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE EgBasedAddrLib::HwlComputeFmaskInfo( - const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut ///< [out] output structure - ) -{ - ADDR_E_RETURNCODE retCode = ADDR_OK; - - ADDR_TILEINFO tileInfo = {0}; - - // Use internal tile info if pOut does not have a valid pTileInfo - if (pOut->pTileInfo == NULL) - { - pOut->pTileInfo = &tileInfo; - } - - retCode = DispatchComputeFmaskInfo(pIn, pOut); - - if (retCode == ADDR_OK) - { - pOut->tileIndex = - HwlPostCheckTileIndex(pOut->pTileInfo, pIn->tileMode, ADDR_NON_DISPLAYABLE, - pOut->tileIndex); - } - - // Resets pTileInfo to NULL if the internal tile info is used - if (pOut->pTileInfo == &tileInfo) - { - pOut->pTileInfo = NULL; - } - - return retCode; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::HwlComputeFmaskAddrFromCoord -* @brief -* Entry of EgBasedAddrLib ComputeFmaskAddrFromCoord -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE EgBasedAddrLib::HwlComputeFmaskAddrFromCoord( - const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure - ) const -{ - ADDR_E_RETURNCODE retCode = ADDR_OK; - -#if ADDR_AM_BUILD - if ((pIn->x > pIn->pitch) || - (pIn->y > pIn->height) || - (pIn->numSamples > m_maxSamples) || - (pIn->sample >= m_maxSamples)) - { - retCode = ADDR_INVALIDPARAMS; - } - else - { - pOut->addr = DispatchComputeFmaskAddrFromCoord(pIn, pOut); - } -#endif - - return retCode; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::HwlComputeFmaskCoordFromAddr -* @brief -* Entry of EgBasedAddrLib ComputeFmaskCoordFromAddr -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE EgBasedAddrLib::HwlComputeFmaskCoordFromAddr( - const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure - ) const -{ - ADDR_E_RETURNCODE retCode = ADDR_OK; - -#if ADDR_AM_BUILD - if ((pIn->bitPosition >= 8) || - (pIn->numSamples > m_maxSamples)) - { - retCode = ADDR_INVALIDPARAMS; - } - else - { - DispatchComputeFmaskCoordFromAddr(pIn, pOut); - } -#endif - - return retCode; -} - -#if ADDR_AM_BUILD -/** -*************************************************************************************************** -* EgBasedAddrLib::DispatchComputeFmaskAddrFromCoord -* -* @brief -* Computes the FMASK address and bit position from a coordinate. -* @return -* The byte address -*************************************************************************************************** -*/ -UINT_64 EgBasedAddrLib::DispatchComputeFmaskAddrFromCoord( - const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure - ) const -{ - UINT_32 x = pIn->x; - UINT_32 y = pIn->y; - UINT_32 slice = pIn->slice; - UINT_32 sample = pIn->sample; - UINT_32 plane = pIn->plane; - UINT_32 pitch = pIn->pitch; - UINT_32 height = pIn->height; - UINT_32 numSamples = pIn->numSamples; - AddrTileMode tileMode = pIn->tileMode; - BOOL_32 ignoreSE = pIn->ignoreSE; - ADDR_TILEINFO* pTileInfo = pIn->pTileInfo; - BOOL_32 resolved = pIn->resolved; - - UINT_32* pBitPosition = &pOut->bitPosition; - UINT_64 addr = 0; - - ADDR_ASSERT(numSamples > 1); - ADDR_ASSERT(ComputeSurfaceThickness(tileMode) == 1); - - switch (tileMode) - { - case ADDR_TM_1D_TILED_THIN1: - addr = ComputeFmaskAddrFromCoordMicroTiled(x, - y, - slice, - sample, - plane, - pitch, - height, - numSamples, - tileMode, - resolved, - pBitPosition); - break; - case ADDR_TM_2D_TILED_THIN1: //fall through - case ADDR_TM_3D_TILED_THIN1: - UINT_32 pipeSwizzle; - UINT_32 bankSwizzle; - - if (m_configFlags.useCombinedSwizzle) - { - ExtractBankPipeSwizzle(pIn->tileSwizzle, pIn->pTileInfo, - &bankSwizzle, &pipeSwizzle); - } - else - { - pipeSwizzle = pIn->pipeSwizzle; - bankSwizzle = pIn->bankSwizzle; - } - - addr = ComputeFmaskAddrFromCoordMacroTiled(x, - y, - slice, - sample, - plane, - pitch, - height, - numSamples, - tileMode, - pipeSwizzle, - bankSwizzle, - ignoreSE, - pTileInfo, - resolved, - pBitPosition); - break; - default: - *pBitPosition = 0; - break; - } - - return addr; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::ComputeFmaskAddrFromCoordMicroTiled -* -* @brief -* Computes the FMASK address and bit position from a coordinate for 1D tilied (micro -* tiled) -* @return -* The byte address -*************************************************************************************************** -*/ -UINT_64 EgBasedAddrLib::ComputeFmaskAddrFromCoordMicroTiled( - UINT_32 x, ///< [in] x coordinate - UINT_32 y, ///< [in] y coordinate - UINT_32 slice, ///< [in] slice index - UINT_32 sample, ///< [in] sample number - UINT_32 plane, ///< [in] plane number - UINT_32 pitch, ///< [in] surface pitch in pixels - UINT_32 height, ///< [in] surface height in pixels - UINT_32 numSamples, ///< [in] number of samples - AddrTileMode tileMode, ///< [in] tile mode - BOOL_32 resolved, ///< [in] TRUE if this is for resolved fmask - UINT_32* pBitPosition ///< [out] pointer to returned bit position - ) const -{ - UINT_64 addr = 0; - UINT_32 effectiveBpp; - UINT_32 effectiveSamples; - - // - // 2xAA use the same layout as 4xAA - // - if (numSamples == 2) - { - numSamples = 4; - } - - // - // Compute the number of planes. - // - if (!resolved) - { - effectiveSamples = ComputeFmaskNumPlanesFromNumSamples(numSamples); - effectiveBpp = numSamples; - - // - // Compute the address just like a color surface with numSamples bits per element and - // numPlanes samples. - // - addr = ComputeSurfaceAddrFromCoordMicroTiled(x, - y, - slice, - plane, // sample - effectiveBpp, - pitch, - height, - effectiveSamples, - tileMode, - ADDR_NON_DISPLAYABLE, - FALSE, - pBitPosition); - - // - // Compute the real bit position. Each (sample, plane) is stored with one bit per sample. - // - - // - // Compute the pixel index with in the micro tile - // - UINT_32 pixelIndex = ComputePixelIndexWithinMicroTile(x % 8, - y % 8, - slice, - 1, - tileMode, - ADDR_NON_DISPLAYABLE); - - *pBitPosition = ((pixelIndex * numSamples) + sample) & (BITS_PER_BYTE-1); - - UINT_64 bitAddr = BYTES_TO_BITS(addr) + *pBitPosition; - - addr = bitAddr / 8; - } - else - { - effectiveBpp = ComputeFmaskResolvedBppFromNumSamples(numSamples); - effectiveSamples = 1; - - // - // Compute the address just like a color surface with numSamples bits per element and - // numPlanes samples. - // - addr = ComputeSurfaceAddrFromCoordMicroTiled(x, - y, - slice, - sample, - effectiveBpp, - pitch, - height, - effectiveSamples, - tileMode, - ADDR_NON_DISPLAYABLE, - TRUE, - pBitPosition); - } - - return addr; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::ComputeFmaskAddrFromCoordMacroTiled -* -* @brief -* Computes the FMASK address and bit position from a coordinate for 2D tilied (macro -* tiled) -* @return -* The byte address -*************************************************************************************************** -*/ -UINT_64 EgBasedAddrLib::ComputeFmaskAddrFromCoordMacroTiled( - UINT_32 x, ///< [in] x coordinate - UINT_32 y, ///< [in] y coordinate - UINT_32 slice, ///< [in] slice index - UINT_32 sample, ///< [in] sample number - UINT_32 plane, ///< [in] plane number - UINT_32 pitch, ///< [in] surface pitch in pixels - UINT_32 height, ///< [in] surface height in pixels - UINT_32 numSamples, ///< [in] number of samples - AddrTileMode tileMode, ///< [in] tile mode - UINT_32 pipeSwizzle, ///< [in] pipe swizzle - UINT_32 bankSwizzle, ///< [in] bank swizzle - BOOL_32 ignoreSE, ///< [in] TRUE if ignore shader engine - ADDR_TILEINFO* pTileInfo, ///< [in] bank structure.**All fields to be valid on entry** - BOOL_32 resolved, ///< [in] TRUE if this is for resolved fmask - UINT_32* pBitPosition ///< [out] pointer to returned bit position - ) const -{ - UINT_64 addr = 0; - UINT_32 effectiveBpp; - UINT_32 effectiveSamples; - - // - // 2xAA use the same layout as 4xAA - // - if (numSamples == 2) - { - numSamples = 4; - } - - // - // Compute the number of planes. - // - if (!resolved) - { - effectiveSamples = ComputeFmaskNumPlanesFromNumSamples(numSamples); - effectiveBpp = numSamples; - - // - // Compute the address just like a color surface with numSamples bits per element and - // numPlanes samples. - // - addr = ComputeSurfaceAddrFromCoordMacroTiled(x, - y, - slice, - plane, // sample - effectiveBpp, - pitch, - height, - effectiveSamples, - tileMode, - ADDR_NON_DISPLAYABLE,// isdisp - ignoreSE,// ignore_shader - FALSE,// depth_sample_order - pipeSwizzle, - bankSwizzle, - pTileInfo, - pBitPosition); - - // - // Compute the real bit position. Each (sample, plane) is stored with one bit per sample. - // - - - // - // Compute the pixel index with in the micro tile - // - UINT_32 pixelIndex = ComputePixelIndexWithinMicroTile(x , - y , - slice, - effectiveBpp, - tileMode, - ADDR_NON_DISPLAYABLE); - - *pBitPosition = ((pixelIndex * numSamples) + sample) & (BITS_PER_BYTE-1); - - UINT_64 bitAddr = BYTES_TO_BITS(addr) + *pBitPosition; - - addr = bitAddr / 8; - - } - else - { - effectiveBpp = ComputeFmaskResolvedBppFromNumSamples(numSamples); - effectiveSamples = 1; - - // - // Compute the address just like a color surface with numSamples bits per element and - // numPlanes samples. - // - addr = ComputeSurfaceAddrFromCoordMacroTiled(x, - y, - slice, - sample, - effectiveBpp, - pitch, - height, - effectiveSamples, - tileMode, - ADDR_NON_DISPLAYABLE, - ignoreSE, - TRUE, - pipeSwizzle, - bankSwizzle, - pTileInfo, - pBitPosition); - } - - return addr; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::ComputeFmaskCoordFromAddrMicroTiled -* -* @brief -* Compute (x,y,slice,sample,plane) coordinates from fmask address -* @return -* N/A -* -*************************************************************************************************** -*/ -VOID EgBasedAddrLib::ComputeFmaskCoordFromAddrMicroTiled( - UINT_64 addr, ///< [in] byte address - UINT_32 bitPosition,///< [in] bit position - UINT_32 pitch, ///< [in] pitch in pixels - UINT_32 height, ///< [in] height in pixels - UINT_32 numSamples, ///< [in] number of samples (of color buffer) - AddrTileMode tileMode, ///< [in] tile mode - BOOL_32 resolved, ///< [in] TRUE if it is resolved fmask - UINT_32* pX, ///< [out] X coord - UINT_32* pY, ///< [out] Y coord - UINT_32* pSlice, ///< [out] slice index - UINT_32* pSample, ///< [out] sample index - UINT_32* pPlane ///< [out] plane index - ) const -{ - UINT_32 effectiveBpp; - UINT_32 effectiveSamples; - - // 2xAA use the same layout as 4xAA - if (numSamples == 2) - { - numSamples = 4; - } - - if (!resolved) - { - effectiveSamples = ComputeFmaskNumPlanesFromNumSamples(numSamples); - effectiveBpp = numSamples; - - ComputeSurfaceCoordFromAddrMicroTiled(addr, - bitPosition, - effectiveBpp, - pitch, - height, - effectiveSamples, - tileMode, - 0, // tileBase - 0, // compBits - pX, - pY, - pSlice, - pPlane, - ADDR_NON_DISPLAYABLE, // microTileType - FALSE // isDepthSampleOrder - ); - - - if ( pSample ) - { - *pSample = bitPosition % numSamples; - } - } - else - { - effectiveBpp = ComputeFmaskResolvedBppFromNumSamples(numSamples); - effectiveSamples = 1; - - ComputeSurfaceCoordFromAddrMicroTiled(addr, - bitPosition, - effectiveBpp, - pitch, - height, - effectiveSamples, - tileMode, - 0, // tileBase - 0, // compBits - pX, - pY, - pSlice, - pSample, - ADDR_NON_DISPLAYABLE, // microTileType - TRUE // isDepthSampleOrder - ); - } -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::ComputeFmaskCoordFromAddrMacroTiled -* -* @brief -* Compute (x,y,slice,sample,plane) coordinates from -* fmask address -* @return -* N/A -* -*************************************************************************************************** -*/ -VOID EgBasedAddrLib::ComputeFmaskCoordFromAddrMacroTiled( - UINT_64 addr, ///< [in] byte address - UINT_32 bitPosition,///< [in] bit position - UINT_32 pitch, ///< [in] pitch in pixels - UINT_32 height, ///< [in] height in pixels - UINT_32 numSamples, ///< [in] number of samples (of color buffer) - AddrTileMode tileMode, ///< [in] tile mode - UINT_32 pipeSwizzle,///< [in] pipe swizzle - UINT_32 bankSwizzle,///< [in] bank swizzle - BOOL_32 ignoreSE, ///< [in] TRUE if ignore shader engine - ADDR_TILEINFO* pTileInfo, ///< [in] bank structure. **All fields to be valid on entry** - BOOL_32 resolved, ///< [in] TRUE if it is resolved fmask - UINT_32* pX, ///< [out] X coord - UINT_32* pY, ///< [out] Y coord - UINT_32* pSlice, ///< [out] slice index - UINT_32* pSample, ///< [out] sample index - UINT_32* pPlane ///< [out] plane index - ) const -{ - UINT_32 effectiveBpp; - UINT_32 effectiveSamples; - - // 2xAA use the same layout as 4xAA - if (numSamples == 2) - { - numSamples = 4; - } - - // - // Compute the number of planes. - // - if (!resolved) - { - effectiveSamples = ComputeFmaskNumPlanesFromNumSamples(numSamples); - effectiveBpp = numSamples; - - ComputeSurfaceCoordFromAddrMacroTiled(addr, - bitPosition, - effectiveBpp, - pitch, - height, - effectiveSamples, - tileMode, - 0, // No tileBase - 0, // No compBits - ADDR_NON_DISPLAYABLE, - ignoreSE, - FALSE, - pipeSwizzle, - bankSwizzle, - pTileInfo, - pX, - pY, - pSlice, - pPlane); - - if (pSample) - { - *pSample = bitPosition % numSamples; - } - } - else - { - effectiveBpp = ComputeFmaskResolvedBppFromNumSamples(numSamples); - effectiveSamples = 1; - - ComputeSurfaceCoordFromAddrMacroTiled(addr, - bitPosition, - effectiveBpp, - pitch, - height, - effectiveSamples, - tileMode, - 0, // No tileBase - 0, // No compBits - ADDR_NON_DISPLAYABLE, - ignoreSE, - TRUE, - pipeSwizzle, - bankSwizzle, - pTileInfo, - pX, - pY, - pSlice, - pSample); - } -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::DispatchComputeFmaskCoordFromAddr -* -* @brief -* Compute (x,y,slice,sample,plane) coordinates from -* fmask address -* @return -* N/A -* -*************************************************************************************************** -*/ -VOID EgBasedAddrLib::DispatchComputeFmaskCoordFromAddr( - const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure - ) const -{ - UINT_64 addr = pIn->addr; - UINT_32 bitPosition = pIn->bitPosition; - UINT_32 pitch = pIn->pitch; - UINT_32 height = pIn->height; - UINT_32 numSamples = pIn->numSamples; - AddrTileMode tileMode = pIn->tileMode; - BOOL_32 ignoreSE = pIn->ignoreSE; - ADDR_TILEINFO* pTileInfo = pIn->pTileInfo; - BOOL_32 resolved = pIn->resolved; - - UINT_32* pX = &pOut->x; - UINT_32* pY = &pOut->y; - UINT_32* pSlice = &pOut->slice; - UINT_32* pSample = &pOut->sample; - UINT_32* pPlane = &pOut->plane; - - switch (tileMode) - { - case ADDR_TM_1D_TILED_THIN1: - ComputeFmaskCoordFromAddrMicroTiled(addr, - bitPosition, - pitch, - height, - numSamples, - tileMode, - resolved, - pX, - pY, - pSlice, - pSample, - pPlane); - break; - case ADDR_TM_2D_TILED_THIN1://fall through - case ADDR_TM_3D_TILED_THIN1: - UINT_32 pipeSwizzle; - UINT_32 bankSwizzle; - - if (m_configFlags.useCombinedSwizzle) - { - ExtractBankPipeSwizzle(pIn->tileSwizzle, pIn->pTileInfo, - &bankSwizzle, &pipeSwizzle); - } - else - { - pipeSwizzle = pIn->pipeSwizzle; - bankSwizzle = pIn->bankSwizzle; - } - - ComputeFmaskCoordFromAddrMacroTiled(addr, - bitPosition, - pitch, - height, - numSamples, - tileMode, - pipeSwizzle, - bankSwizzle, - ignoreSE, - pTileInfo, - resolved, - pX, - pY, - pSlice, - pSample, - pPlane); - break; - default: - ADDR_ASSERT_ALWAYS(); - break; - - } -} -#endif - -/** -*************************************************************************************************** -* EgBasedAddrLib::ComputeFmaskNumPlanesFromNumSamples -* -* @brief -* Compute fmask number of planes from number of samples -* -* @return -* Number of planes -*************************************************************************************************** -*/ -UINT_32 EgBasedAddrLib::ComputeFmaskNumPlanesFromNumSamples( - UINT_32 numSamples) ///< [in] number of samples -{ - UINT_32 numPlanes; - - // - // FMASK is stored such that each micro tile is composed of elements containing N bits, where - // N is the number of samples. There is a micro tile for each bit in the FMASK address, and - // micro tiles for each address bit, sometimes referred to as a plane, are stored sequentially. - // The FMASK for a 2-sample surface looks like a general surface with 2 bits per element. - // The FMASK for a 4-sample surface looks like a general surface with 4 bits per element and - // 2 samples. The FMASK for an 8-sample surface looks like a general surface with 8 bits per - // element and 4 samples. R6xx and R7xx only stored 3 planes for 8-sample FMASK surfaces. - // This was changed for R8xx to simplify the logic in the CB. - // - switch (numSamples) - { - case 2: - numPlanes = 1; - break; - case 4: - numPlanes = 2; - break; - case 8: - numPlanes = 4; - break; - default: - ADDR_UNHANDLED_CASE(); - numPlanes = 0; - break; - } - return numPlanes; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::ComputeFmaskResolvedBppFromNumSamples -* -* @brief -* Compute resolved fmask effective bpp based on number of samples -* -* @return -* bpp -*************************************************************************************************** -*/ -UINT_32 EgBasedAddrLib::ComputeFmaskResolvedBppFromNumSamples( - UINT_32 numSamples) ///< number of samples -{ - UINT_32 bpp; - - // - // Resolved FMASK surfaces are generated yBit the CB and read yBit the texture unit - // so that the texture unit can read compressed multi-sample color data. - // These surfaces store each index value packed per element. - // Each element contains at least num_samples * log2(num_samples) bits. - // Resolved FMASK surfaces are addressed as follows: - // 2-sample Addressed similarly to a color surface with 8 bits per element and 1 sample. - // 4-sample Addressed similarly to a color surface with 8 bits per element and 1 sample. - // 8-sample Addressed similarly to a color surface with 32 bits per element and 1 sample. - - switch (numSamples) - { - case 2: - bpp = 8; - break; - case 4: - bpp = 8; - break; - case 8: - bpp = 32; - break; - default: - ADDR_UNHANDLED_CASE(); - bpp = 0; - break; - } - return bpp; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::IsTileInfoAllZero -* -* @brief -* Return TRUE if all field are zero -* @note -* Since NULL input is consider to be all zero -*************************************************************************************************** -*/ -BOOL_32 EgBasedAddrLib::IsTileInfoAllZero( - ADDR_TILEINFO* pTileInfo) -{ - BOOL_32 allZero = TRUE; - - if (pTileInfo) - { - if ((pTileInfo->banks != 0) || - (pTileInfo->bankWidth != 0) || - (pTileInfo->bankHeight != 0) || - (pTileInfo->macroAspectRatio != 0) || - (pTileInfo->tileSplitBytes != 0) || - (pTileInfo->pipeConfig != 0) - ) - { - allZero = FALSE; - } - } - - return allZero; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::HwlTileInfoEqual -* -* @brief -* Return TRUE if all field are equal -* @note -* Only takes care of current HWL's data -*************************************************************************************************** -*/ -BOOL_32 EgBasedAddrLib::HwlTileInfoEqual( - const ADDR_TILEINFO* pLeft, ///<[in] Left compare operand - const ADDR_TILEINFO* pRight ///<[in] Right compare operand - ) const -{ - BOOL_32 equal = FALSE; - - if (pLeft->banks == pRight->banks && - pLeft->bankWidth == pRight->bankWidth && - pLeft->bankHeight == pRight->bankHeight && - pLeft->macroAspectRatio == pRight->macroAspectRatio && - pLeft->tileSplitBytes == pRight->tileSplitBytes) - { - equal = TRUE; - } - - return equal; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::HwlConvertTileInfoToHW -* @brief -* Entry of EgBasedAddrLib ConvertTileInfoToHW -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE EgBasedAddrLib::HwlConvertTileInfoToHW( - const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, ///< [in] input structure - ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut ///< [out] output structure - ) const -{ - ADDR_E_RETURNCODE retCode = ADDR_OK; - - ADDR_TILEINFO *pTileInfoIn = pIn->pTileInfo; - ADDR_TILEINFO *pTileInfoOut = pOut->pTileInfo; - - if ((pTileInfoIn != NULL) && (pTileInfoOut != NULL)) - { - if (pIn->reverse == FALSE) - { - switch (pTileInfoIn->banks) - { - case 2: - pTileInfoOut->banks = 0; - break; - case 4: - pTileInfoOut->banks = 1; - break; - case 8: - pTileInfoOut->banks = 2; - break; - case 16: - pTileInfoOut->banks = 3; - break; - default: - ADDR_ASSERT_ALWAYS(); - retCode = ADDR_INVALIDPARAMS; - pTileInfoOut->banks = 0; - break; - } - - switch (pTileInfoIn->bankWidth) - { - case 1: - pTileInfoOut->bankWidth = 0; - break; - case 2: - pTileInfoOut->bankWidth = 1; - break; - case 4: - pTileInfoOut->bankWidth = 2; - break; - case 8: - pTileInfoOut->bankWidth = 3; - break; - default: - ADDR_ASSERT_ALWAYS(); - retCode = ADDR_INVALIDPARAMS; - pTileInfoOut->bankWidth = 0; - break; - } - - switch (pTileInfoIn->bankHeight) - { - case 1: - pTileInfoOut->bankHeight = 0; - break; - case 2: - pTileInfoOut->bankHeight = 1; - break; - case 4: - pTileInfoOut->bankHeight = 2; - break; - case 8: - pTileInfoOut->bankHeight = 3; - break; - default: - ADDR_ASSERT_ALWAYS(); - retCode = ADDR_INVALIDPARAMS; - pTileInfoOut->bankHeight = 0; - break; - } - - switch (pTileInfoIn->macroAspectRatio) - { - case 1: - pTileInfoOut->macroAspectRatio = 0; - break; - case 2: - pTileInfoOut->macroAspectRatio = 1; - break; - case 4: - pTileInfoOut->macroAspectRatio = 2; - break; - case 8: - pTileInfoOut->macroAspectRatio = 3; - break; - default: - ADDR_ASSERT_ALWAYS(); - retCode = ADDR_INVALIDPARAMS; - pTileInfoOut->macroAspectRatio = 0; - break; - } - - switch (pTileInfoIn->tileSplitBytes) - { - case 64: - pTileInfoOut->tileSplitBytes = 0; - break; - case 128: - pTileInfoOut->tileSplitBytes = 1; - break; - case 256: - pTileInfoOut->tileSplitBytes = 2; - break; - case 512: - pTileInfoOut->tileSplitBytes = 3; - break; - case 1024: - pTileInfoOut->tileSplitBytes = 4; - break; - case 2048: - pTileInfoOut->tileSplitBytes = 5; - break; - case 4096: - pTileInfoOut->tileSplitBytes = 6; - break; - default: - ADDR_ASSERT_ALWAYS(); - retCode = ADDR_INVALIDPARAMS; - pTileInfoOut->tileSplitBytes = 0; - break; - } - } - else - { - switch (pTileInfoIn->banks) - { - case 0: - pTileInfoOut->banks = 2; - break; - case 1: - pTileInfoOut->banks = 4; - break; - case 2: - pTileInfoOut->banks = 8; - break; - case 3: - pTileInfoOut->banks = 16; - break; - default: - ADDR_ASSERT_ALWAYS(); - retCode = ADDR_INVALIDPARAMS; - pTileInfoOut->banks = 2; - break; - } - - switch (pTileInfoIn->bankWidth) - { - case 0: - pTileInfoOut->bankWidth = 1; - break; - case 1: - pTileInfoOut->bankWidth = 2; - break; - case 2: - pTileInfoOut->bankWidth = 4; - break; - case 3: - pTileInfoOut->bankWidth = 8; - break; - default: - ADDR_ASSERT_ALWAYS(); - retCode = ADDR_INVALIDPARAMS; - pTileInfoOut->bankWidth = 1; - break; - } - - switch (pTileInfoIn->bankHeight) - { - case 0: - pTileInfoOut->bankHeight = 1; - break; - case 1: - pTileInfoOut->bankHeight = 2; - break; - case 2: - pTileInfoOut->bankHeight = 4; - break; - case 3: - pTileInfoOut->bankHeight = 8; - break; - default: - ADDR_ASSERT_ALWAYS(); - retCode = ADDR_INVALIDPARAMS; - pTileInfoOut->bankHeight = 1; - break; - } - - switch (pTileInfoIn->macroAspectRatio) - { - case 0: - pTileInfoOut->macroAspectRatio = 1; - break; - case 1: - pTileInfoOut->macroAspectRatio = 2; - break; - case 2: - pTileInfoOut->macroAspectRatio = 4; - break; - case 3: - pTileInfoOut->macroAspectRatio = 8; - break; - default: - ADDR_ASSERT_ALWAYS(); - retCode = ADDR_INVALIDPARAMS; - pTileInfoOut->macroAspectRatio = 1; - break; - } - - switch (pTileInfoIn->tileSplitBytes) - { - case 0: - pTileInfoOut->tileSplitBytes = 64; - break; - case 1: - pTileInfoOut->tileSplitBytes = 128; - break; - case 2: - pTileInfoOut->tileSplitBytes = 256; - break; - case 3: - pTileInfoOut->tileSplitBytes = 512; - break; - case 4: - pTileInfoOut->tileSplitBytes = 1024; - break; - case 5: - pTileInfoOut->tileSplitBytes = 2048; - break; - case 6: - pTileInfoOut->tileSplitBytes = 4096; - break; - default: - ADDR_ASSERT_ALWAYS(); - retCode = ADDR_INVALIDPARAMS; - pTileInfoOut->tileSplitBytes = 64; - break; - } - } - - if (pTileInfoIn != pTileInfoOut) - { - pTileInfoOut->pipeConfig = pTileInfoIn->pipeConfig; - } - } - else - { - ADDR_ASSERT_ALWAYS(); - retCode = ADDR_INVALIDPARAMS; - } - - return retCode; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::HwlComputeSurfaceInfo -* @brief -* Entry of EgBasedAddrLib ComputeSurfaceInfo -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE EgBasedAddrLib::HwlComputeSurfaceInfo( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure - ) const -{ - ADDR_E_RETURNCODE retCode = ADDR_OK; - - if (pIn->numSamples < pIn->numFrags) - { - retCode = ADDR_INVALIDPARAMS; - } - - ADDR_TILEINFO tileInfo = {0}; - - if (retCode == ADDR_OK) - { - // Uses internal tile info if pOut does not have a valid pTileInfo - if (pOut->pTileInfo == NULL) - { - pOut->pTileInfo = &tileInfo; - } - - if (!DispatchComputeSurfaceInfo(pIn, pOut)) - { - retCode = ADDR_INVALIDPARAMS; - } - - // Returns an index - pOut->tileIndex = HwlPostCheckTileIndex(pOut->pTileInfo, - pOut->tileMode, - pOut->tileType, - pOut->tileIndex); - - if (IsMacroTiled(pOut->tileMode) && (pOut->macroModeIndex == TileIndexInvalid)) - { - pOut->macroModeIndex = HwlComputeMacroModeIndex(pOut->tileIndex, - pIn->flags, - pIn->bpp, - pIn->numSamples, - pOut->pTileInfo); - } - - // Resets pTileInfo to NULL if the internal tile info is used - if (pOut->pTileInfo == &tileInfo) - { -#if DEBUG - // Client does not pass in a valid pTileInfo - if (IsMacroTiled(pOut->tileMode)) - { - // If a valid index is returned, then no pTileInfo is okay - ADDR_ASSERT(!m_configFlags.useTileIndex || pOut->tileIndex != TileIndexInvalid); - - if (!IsTileInfoAllZero(pIn->pTileInfo)) - { - // The initial value of pIn->pTileInfo is copied to tileInfo - // We do not expect any of these value to be changed nor any 0 of inputs - ADDR_ASSERT(tileInfo.banks == pIn->pTileInfo->banks); - ADDR_ASSERT(tileInfo.bankWidth == pIn->pTileInfo->bankWidth); - ADDR_ASSERT(tileInfo.bankHeight == pIn->pTileInfo->bankHeight); - ADDR_ASSERT(tileInfo.macroAspectRatio == pIn->pTileInfo->macroAspectRatio); - ADDR_ASSERT(tileInfo.tileSplitBytes == pIn->pTileInfo->tileSplitBytes); - } - } -#endif - pOut->pTileInfo = NULL; - } - } - - return retCode; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::HwlComputeSurfaceAddrFromCoord -* @brief -* Entry of EgBasedAddrLib ComputeSurfaceAddrFromCoord -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE EgBasedAddrLib::HwlComputeSurfaceAddrFromCoord( - const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure - ) const -{ - ADDR_E_RETURNCODE retCode = ADDR_OK; - - if ( -#if !ALT_TEST // Overflow test needs this out-of-boundary coord - (pIn->x > pIn->pitch) || - (pIn->y > pIn->height) || -#endif - (pIn->numSamples > m_maxSamples)) - { - retCode = ADDR_INVALIDPARAMS; - } - else - { - pOut->addr = DispatchComputeSurfaceAddrFromCoord(pIn, pOut); - } - - return retCode; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::HwlComputeSurfaceCoordFromAddr -* @brief -* Entry of EgBasedAddrLib ComputeSurfaceCoordFromAddr -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE EgBasedAddrLib::HwlComputeSurfaceCoordFromAddr( - const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure - ) const -{ - ADDR_E_RETURNCODE retCode = ADDR_OK; - - if ((pIn->bitPosition >= 8) || - (pIn->numSamples > m_maxSamples)) - { - retCode = ADDR_INVALIDPARAMS; - } - else - { - DispatchComputeSurfaceCoordFromAddr(pIn, pOut); - } - return retCode; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::HwlComputeSliceTileSwizzle -* @brief -* Entry of EgBasedAddrLib ComputeSurfaceCoordFromAddr -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE EgBasedAddrLib::HwlComputeSliceTileSwizzle( - const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut ///< [out] output structure - ) const -{ - ADDR_E_RETURNCODE retCode = ADDR_OK; - - if (pIn->pTileInfo && (pIn->pTileInfo->banks > 0)) - { - - pOut->tileSwizzle = ComputeSliceTileSwizzle(pIn->tileMode, - pIn->baseSwizzle, - pIn->slice, - pIn->baseAddr, - pIn->pTileInfo); - } - else - { - retCode = ADDR_INVALIDPARAMS; - } - - return retCode; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::HwlComputeHtileBpp -* -* @brief -* Compute htile bpp -* -* @return -* Htile bpp -*************************************************************************************************** -*/ -UINT_32 EgBasedAddrLib::HwlComputeHtileBpp( - BOOL_32 isWidth8, ///< [in] TRUE if block width is 8 - BOOL_32 isHeight8 ///< [in] TRUE if block height is 8 - ) const -{ - // only support 8x8 mode - ADDR_ASSERT(isWidth8 && isHeight8); - return 32; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::HwlComputeHtileBaseAlign -* -* @brief -* Compute htile base alignment -* -* @return -* Htile base alignment -*************************************************************************************************** -*/ -UINT_32 EgBasedAddrLib::HwlComputeHtileBaseAlign( - BOOL_32 isTcCompatible, ///< [in] if TC compatible - BOOL_32 isLinear, ///< [in] if it is linear mode - ADDR_TILEINFO* pTileInfo ///< [in] Tile info - ) const -{ - UINT_32 baseAlign = m_pipeInterleaveBytes * HwlGetPipes(pTileInfo); - - if (isTcCompatible) - { - ADDR_ASSERT(pTileInfo != NULL); - if (pTileInfo) - { - baseAlign *= pTileInfo->banks; - } - } - - return baseAlign; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::HwlGetPitchAlignmentMicroTiled -* -* @brief -* Compute 1D tiled surface pitch alignment, calculation results are returned through -* output parameters. -* -* @return -* pitch alignment -*************************************************************************************************** -*/ -UINT_32 EgBasedAddrLib::HwlGetPitchAlignmentMicroTiled( - AddrTileMode tileMode, ///< [in] tile mode - UINT_32 bpp, ///< [in] bits per pixel - ADDR_SURFACE_FLAGS flags, ///< [in] surface flags - UINT_32 numSamples ///< [in] number of samples - ) const -{ - UINT_32 pitchAlign; - - UINT_32 microTileThickness = ComputeSurfaceThickness(tileMode); - - UINT_32 pixelsPerMicroTile; - UINT_32 pixelsPerPipeInterleave; - UINT_32 microTilesPerPipeInterleave; - - // - // Special workaround for depth/stencil buffer, use 8 bpp to meet larger requirement for - // stencil buffer since pitch alignment is related to bpp. - // For a depth only buffer do not set this. - // - // Note: this actually does not work for mipmap but mipmap depth texture is not really - // sampled with mipmap. - // - if (flags.depth && !flags.noStencil) - { - bpp = 8; - } - - pixelsPerMicroTile = MicroTilePixels * microTileThickness; - pixelsPerPipeInterleave = BYTES_TO_BITS(m_pipeInterleaveBytes) / (bpp * numSamples); - microTilesPerPipeInterleave = pixelsPerPipeInterleave / pixelsPerMicroTile; - - pitchAlign = Max(MicroTileWidth, microTilesPerPipeInterleave * MicroTileWidth); - - return pitchAlign; -} - -/** -*************************************************************************************************** -* EgBasedAddrLib::HwlGetSizeAdjustmentMicroTiled -* -* @brief -* Adjust 1D tiled surface pitch and slice size -* -* @return -* Logical slice size in bytes -*************************************************************************************************** -*/ -UINT_64 EgBasedAddrLib::HwlGetSizeAdjustmentMicroTiled( - UINT_32 thickness, ///< [in] thickness - UINT_32 bpp, ///< [in] bits per pixel - ADDR_SURFACE_FLAGS flags, ///< [in] surface flags - UINT_32 numSamples, ///< [in] number of samples - UINT_32 baseAlign, ///< [in] base alignment - UINT_32 pitchAlign, ///< [in] pitch alignment - UINT_32* pPitch, ///< [in/out] pointer to pitch - UINT_32* pHeight ///< [in/out] pointer to height - ) const -{ - UINT_64 logicalSliceSize; - UINT_64 physicalSliceSize; - - UINT_32 pitch = *pPitch; - UINT_32 height = *pHeight; - - // Logical slice: pitch * height * bpp * numSamples (no 1D MSAA so actually numSamples == 1) - logicalSliceSize = BITS_TO_BYTES(static_cast(pitch) * height * bpp * numSamples); - - // Physical slice: multiplied by thickness - physicalSliceSize = logicalSliceSize * thickness; - - // - // R800 will always pad physical slice size to baseAlign which is pipe_interleave_bytes - // - ADDR_ASSERT((physicalSliceSize % baseAlign) == 0) - - return logicalSliceSize; -} - diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.h mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.h --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,412 +0,0 @@ -/* - * Copyright © 2014 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ - -/** -*************************************************************************************************** -* @file egbaddrlib.h -* @brief Contains the EgBasedAddrLib class definition. -*************************************************************************************************** -*/ - -#ifndef __EG_BASED_ADDR_LIB_H__ -#define __EG_BASED_ADDR_LIB_H__ - -#include "addrlib.h" - - -/// Structures for functions -struct CoordFromBankPipe -{ - UINT_32 xBits : 3; - UINT_32 yBits : 4; - - UINT_32 xBit3 : 1; - UINT_32 xBit4 : 1; - UINT_32 xBit5 : 1; - UINT_32 yBit3 : 1; - UINT_32 yBit4 : 1; - UINT_32 yBit5 : 1; - UINT_32 yBit6 : 1; -}; - -/** -*************************************************************************************************** -* @brief This class is the Evergreen based address library -* @note Abstract class -*************************************************************************************************** -*/ -class EgBasedAddrLib : public AddrLib -{ -protected: - EgBasedAddrLib(const AddrClient* pClient); - virtual ~EgBasedAddrLib(); - -public: - - /// Surface info functions - - // NOTE: DispatchComputeSurfaceInfo using TileInfo takes both an input and an output. - // On input: - // One or more fields may be 0 to be calculated/defaulted - pre-SI h/w. - // H/W using tile mode index only accepts none or all 0's - SI and newer h/w. - // It then returns the actual tiling configuration used. - // Other methods' TileInfo must be valid on entry - BOOL_32 DispatchComputeSurfaceInfo( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; - - ADDR_E_RETURNCODE DispatchComputeFmaskInfo( - const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, - ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut); - -protected: - // Hwl interface - virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; - - virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoord( - const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, - ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; - - virtual ADDR_E_RETURNCODE HwlComputeSurfaceCoordFromAddr( - const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, - ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const; - - virtual ADDR_E_RETURNCODE HwlComputeSliceTileSwizzle( - const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, - ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) const; - - virtual ADDR_E_RETURNCODE HwlExtractBankPipeSwizzle( - const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, - ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) const; - - virtual ADDR_E_RETURNCODE HwlCombineBankPipeSwizzle( - UINT_32 bankSwizzle, UINT_32 pipeSwizzle, ADDR_TILEINFO* pTileInfo, - UINT_64 baseAddr, UINT_32* pTileSwizzle) const; - - virtual ADDR_E_RETURNCODE HwlComputeBaseSwizzle( - const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, - ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const; - - virtual ADDR_E_RETURNCODE HwlConvertTileInfoToHW( - const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, - ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const; - - virtual UINT_32 HwlComputeHtileBpp( - BOOL_32 isWidth8, BOOL_32 isHeight8) const; - - virtual UINT_32 HwlComputeHtileBaseAlign( - BOOL_32 isTcCompatible, BOOL_32 isLinear, ADDR_TILEINFO* pTileInfo) const; - - virtual ADDR_E_RETURNCODE HwlComputeFmaskInfo( - const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, - ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut); - - virtual ADDR_E_RETURNCODE HwlComputeFmaskAddrFromCoord( - const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, - ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const; - - virtual ADDR_E_RETURNCODE HwlComputeFmaskCoordFromAddr( - const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, - ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const; - - virtual BOOL_32 HwlDegradeBaseLevel( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const; - - virtual UINT_32 HwlComputeQbStereoRightSwizzle( - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pInfo) const; - - virtual VOID HwlComputePixelCoordFromOffset( - UINT_32 offset, UINT_32 bpp, UINT_32 numSamples, - AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits, - UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample, - AddrTileType microTileType, BOOL_32 isDepthSampleOrder) const; - - /// Return Cmask block max - virtual BOOL_32 HwlGetMaxCmaskBlockMax() const - { - return 16383; // 14 bits - } - - // Sub-hwl interface - /// Pure virtual function to setup tile info (indices) if client requests to do so - virtual VOID HwlSetupTileInfo( - AddrTileMode tileMode, ADDR_SURFACE_FLAGS flags, - UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, - ADDR_TILEINFO* inputTileInfo, ADDR_TILEINFO* outputTileInfo, - AddrTileType inTileType, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0; - - /// Pure virtual function to get pitch alignment for linear modes - virtual UINT_32 HwlGetPitchAlignmentLinear(UINT_32 bpp, ADDR_SURFACE_FLAGS flags) const = 0; - - /// Pure virtual function to get size adjustment for linear modes - virtual UINT_64 HwlGetSizeAdjustmentLinear( - AddrTileMode tileMode, - UINT_32 bpp, UINT_32 numSamples, UINT_32 baseAlign, UINT_32 pitchAlign, - UINT_32 *pPitch, UINT_32 *pHeight, UINT_32 *pHeightAlign) const = 0; - - virtual UINT_32 HwlGetPitchAlignmentMicroTiled( - AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples) const; - - virtual UINT_64 HwlGetSizeAdjustmentMicroTiled( - UINT_32 thickness, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples, - UINT_32 baseAlign, UINT_32 pitchAlign, - UINT_32 *pPitch, UINT_32 *pHeight) const; - - /// Pure virtual function to do extra sanity check - virtual BOOL_32 HwlSanityCheckMacroTiled( - ADDR_TILEINFO* pTileInfo) const = 0; - - /// Pure virtual function to check current level to be the last macro tiled one - virtual VOID HwlCheckLastMacroTiledLvl( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0; - - /// Adjusts bank before bank is modified by rotation - virtual UINT_32 HwlPreAdjustBank( - UINT_32 tileX, UINT_32 bank, ADDR_TILEINFO* pTileInfo) const = 0; - - virtual VOID HwlComputeSurfaceCoord2DFromBankPipe( - AddrTileMode tileMode, UINT_32* pX, UINT_32* pY, UINT_32 slice, - UINT_32 bank, UINT_32 pipe, - UINT_32 bankSwizzle, UINT_32 pipeSwizzle, UINT_32 tileSlices, - BOOL_32 ignoreSE, - ADDR_TILEINFO* pTileInfo) const = 0; - - virtual BOOL_32 HwlTileInfoEqual( - const ADDR_TILEINFO* pLeft, const ADDR_TILEINFO* pRight) const; - - virtual AddrTileMode HwlDegradeThickTileMode( - AddrTileMode baseTileMode, UINT_32 numSlices, UINT_32* pBytesPerTile) const; - - virtual INT_32 HwlPostCheckTileIndex( - const ADDR_TILEINFO* pInfo, AddrTileMode mode, AddrTileType type, - INT curIndex = TileIndexInvalid) const - { - return TileIndexInvalid; - } - - virtual VOID HwlFmaskPreThunkSurfInfo( - const ADDR_COMPUTE_FMASK_INFO_INPUT* pFmaskIn, - const ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut, - ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfIn, - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut) const - { - } - - virtual VOID HwlFmaskPostThunkSurfInfo( - const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut, - ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut) const - { - } - - /// Virtual function to check if the height needs extra padding - /// for stereo right eye offset, to avoid bank pipe swizzle - virtual BOOL_32 HwlStereoCheckRightOffsetPadding() const - { - return FALSE; - } - - virtual BOOL_32 HwlReduceBankWidthHeight( - UINT_32 tileSize, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples, - UINT_32 bankHeightAlign, UINT_32 pipes, - ADDR_TILEINFO* pTileInfo) const; - - // Protected non-virtual functions - - /// Mip level functions - AddrTileMode ComputeSurfaceMipLevelTileMode( - AddrTileMode baseTileMode, UINT_32 bpp, - UINT_32 pitch, UINT_32 height, UINT_32 numSlices, UINT_32 numSamples, - UINT_32 pitchAlign, UINT_32 heightAlign, - ADDR_TILEINFO* pTileInfo) const; - - /// Swizzle functions - VOID ExtractBankPipeSwizzle( - UINT_32 base256b, ADDR_TILEINFO* pTileInfo, - UINT_32* pBankSwizzle, UINT_32* pPipeSwizzle) const; - - UINT_32 GetBankPipeSwizzle( - UINT_32 bankSwizzle, UINT_32 pipeSwizzle, - UINT_64 baseAddr, ADDR_TILEINFO* pTileInfo) const; - - UINT_32 ComputeSliceTileSwizzle( - AddrTileMode tileMode, UINT_32 baseSwizzle, UINT_32 slice, UINT_64 baseAddr, - ADDR_TILEINFO* pTileInfo) const; - - /// Addressing functions - UINT_32 ComputeBankFromCoord( - UINT_32 x, UINT_32 y, UINT_32 slice, - AddrTileMode tileMode, UINT_32 bankSwizzle, UINT_32 tileSpitSlice, - ADDR_TILEINFO* pTileInfo) const; - - UINT_32 ComputeBankFromAddr( - UINT_64 addr, UINT_32 numBanks, UINT_32 numPipes) const; - - UINT_32 ComputePipeRotation( - AddrTileMode tileMode, UINT_32 numPipes) const; - - UINT_32 ComputeBankRotation( - AddrTileMode tileMode, UINT_32 numBanks, - UINT_32 numPipes) const; - - VOID ComputeSurfaceCoord2DFromBankPipe( - AddrTileMode tileMode, UINT_32 x, UINT_32 y, UINT_32 slice, - UINT_32 bank, UINT_32 pipe, - UINT_32 bankSwizzle, UINT_32 pipeSwizzle, UINT_32 tileSlices, - ADDR_TILEINFO* pTileInfo, - CoordFromBankPipe *pOutput) const; - - /// Htile/Cmask functions - UINT_64 ComputeHtileBytes( - UINT_32 pitch, UINT_32 height, UINT_32 bpp, - BOOL_32 isLinear, UINT_32 numSlices, UINT_64* sliceBytes, UINT_32 baseAlign) const; - - // Static functions - static BOOL_32 IsTileInfoAllZero(ADDR_TILEINFO* pTileInfo); - static UINT_32 ComputeFmaskNumPlanesFromNumSamples(UINT_32 numSamples); - static UINT_32 ComputeFmaskResolvedBppFromNumSamples(UINT_32 numSamples); - -private: - - BOOL_32 ComputeSurfaceInfoLinear( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut, - UINT_32 padDims) const; - - BOOL_32 ComputeSurfaceInfoMicroTiled( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut, - UINT_32 padDims, - AddrTileMode expTileMode) const; - - BOOL_32 ComputeSurfaceInfoMacroTiled( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut, - UINT_32 padDims, - AddrTileMode expTileMode) const; - - BOOL_32 ComputeSurfaceAlignmentsLinear( - AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, - UINT_32* pBaseAlign, UINT_32* pPitchAlign, UINT_32* pHeightAlign) const; - - BOOL_32 ComputeSurfaceAlignmentsMicroTiled( - AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, - UINT_32 mipLevel, UINT_32 numSamples, - UINT_32* pBaseAlign, UINT_32* pPitchAlign, UINT_32* pHeightAlign) const; - - BOOL_32 ComputeSurfaceAlignmentsMacroTiled( - AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, - UINT_32 mipLevel, UINT_32 numSamples, - ADDR_TILEINFO* pTileInfo, - UINT_32* pBaseAlign, UINT_32* pPitchAlign, UINT_32* pHeightAlign) const; - - /// Surface addressing functions - UINT_64 DispatchComputeSurfaceAddrFromCoord( - const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, - ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; - - VOID DispatchComputeSurfaceCoordFromAddr( - const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, - ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const; - - UINT_64 ComputeSurfaceAddrFromCoordMicroTiled( - UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample, - UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, - AddrTileMode tileMode, - AddrTileType microTileType, BOOL_32 isDepthSampleOrder, - UINT_32* pBitPosition) const; - - UINT_64 ComputeSurfaceAddrFromCoordMacroTiled( - UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample, - UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, - AddrTileMode tileMode, - AddrTileType microTileType, BOOL_32 ignoreSE, BOOL_32 isDepthSampleOrder, - UINT_32 pipeSwizzle, UINT_32 bankSwizzle, - ADDR_TILEINFO* pTileInfo, - UINT_32* pBitPosition) const; - - VOID ComputeSurfaceCoordFromAddrMacroTiled( - UINT_64 addr, UINT_32 bitPosition, - UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, - AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits, - AddrTileType microTileType, BOOL_32 ignoreSE, BOOL_32 isDepthSampleOrder, - UINT_32 pipeSwizzle, UINT_32 bankSwizzle, - ADDR_TILEINFO* pTileInfo, - UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample) const; - - /// Fmask functions - UINT_64 DispatchComputeFmaskAddrFromCoord( - const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, - ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const; - - VOID DispatchComputeFmaskCoordFromAddr( - const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, - ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const; - - // FMASK related methods - private - UINT_64 ComputeFmaskAddrFromCoordMicroTiled( - UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample, UINT_32 plane, - UINT_32 pitch, UINT_32 height, UINT_32 numSamples, AddrTileMode tileMode, - BOOL_32 resolved, UINT_32* pBitPosition) const; - - VOID ComputeFmaskCoordFromAddrMicroTiled( - UINT_64 addr, UINT_32 bitPosition, - UINT_32 pitch, UINT_32 height, UINT_32 numSamples, - AddrTileMode tileMode, BOOL_32 resolved, - UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample, UINT_32* pPlane) const; - - VOID ComputeFmaskCoordFromAddrMacroTiled( - UINT_64 addr, UINT_32 bitPosition, - UINT_32 pitch, UINT_32 height, UINT_32 numSamples, AddrTileMode tileMode, - UINT_32 pipeSwizzle, UINT_32 bankSwizzle, - BOOL_32 ignoreSE, - ADDR_TILEINFO* pTileInfo, - BOOL_32 resolved, - UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample, UINT_32* pPlane) const; - - UINT_64 ComputeFmaskAddrFromCoordMacroTiled( - UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample, UINT_32 plane, - UINT_32 pitch, UINT_32 height, UINT_32 numSamples, - AddrTileMode tileMode, UINT_32 pipeSwizzle, UINT_32 bankSwizzle, - BOOL_32 ignoreSE, - ADDR_TILEINFO* pTileInfo, - BOOL_32 resolved, - UINT_32* pBitPosition) const; - - /// Sanity check functions - BOOL_32 SanityCheckMacroTiled( - ADDR_TILEINFO* pTileInfo) const; - -protected: - UINT_32 m_ranks; ///< Number of ranks - MC_ARB_RAMCFG.NOOFRANK - UINT_32 m_logicalBanks; ///< Logical banks = m_banks * m_ranks if m_banks != 16 - UINT_32 m_bankInterleave; ///< Bank interleave, as a multiple of pipe interleave size -}; - -#endif - diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/r800/siaddrlib.cpp mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/r800/siaddrlib.cpp --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/r800/siaddrlib.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/r800/siaddrlib.cpp 1970-01-01 00:00:00.000000000 +0000 @@ -1,2818 +0,0 @@ -/* - * Copyright © 2014 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ - -/** -*************************************************************************************************** -* @file siaddrlib.cpp -* @brief Contains the implementation for the SIAddrLib class. -*************************************************************************************************** -*/ - -#include "siaddrlib.h" - -#include "si_gb_reg.h" - -#include "si_ci_vi_merged_enum.h" - -#if BRAHMA_BUILD -#include "amdgpu_id.h" -#else -#include "si_id.h" -#endif - -/////////////////////////////////////////////////////////////////////////////////////////////////// -/////////////////////////////////////////////////////////////////////////////////////////////////// - -/** -*************************************************************************************************** -* AddrSIHwlInit -* -* @brief -* Creates an SIAddrLib object. -* -* @return -* Returns an SIAddrLib object pointer. -*************************************************************************************************** -*/ -AddrLib* AddrSIHwlInit(const AddrClient* pClient) -{ - return SIAddrLib::CreateObj(pClient); -} - -/** -*************************************************************************************************** -* SIAddrLib::SIAddrLib -* -* @brief -* Constructor -* -*************************************************************************************************** -*/ -SIAddrLib::SIAddrLib(const AddrClient* pClient) : - EgBasedAddrLib(pClient), - m_noOfEntries(0) -{ - m_class = SI_ADDRLIB; - memset(&m_settings, 0, sizeof(m_settings)); -} - -/** -*************************************************************************************************** -* SIAddrLib::~SIAddrLib -* -* @brief -* Destructor -*************************************************************************************************** -*/ -SIAddrLib::~SIAddrLib() -{ -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlGetPipes -* -* @brief -* Get number pipes -* @return -* num pipes -*************************************************************************************************** -*/ -UINT_32 SIAddrLib::HwlGetPipes( - const ADDR_TILEINFO* pTileInfo ///< [in] Tile info - ) const -{ - UINT_32 numPipes; - - if (pTileInfo) - { - numPipes = GetPipePerSurf(pTileInfo->pipeConfig); - } - else - { - ADDR_ASSERT_ALWAYS(); - numPipes = m_pipes; // Suppose we should still have a global pipes - } - - return numPipes; -} - -/** -*************************************************************************************************** -* SIAddrLib::GetPipePerSurf -* @brief -* get pipe num base on inputing tileinfo->pipeconfig -* @return -* pipe number -*************************************************************************************************** -*/ -UINT_32 SIAddrLib::GetPipePerSurf( - AddrPipeCfg pipeConfig ///< [in] pipe config - ) const -{ - UINT_32 numPipes = 0; - - switch (pipeConfig) - { - case ADDR_PIPECFG_P2: - numPipes = 2; - break; - case ADDR_PIPECFG_P4_8x16: - case ADDR_PIPECFG_P4_16x16: - case ADDR_PIPECFG_P4_16x32: - case ADDR_PIPECFG_P4_32x32: - numPipes = 4; - break; - case ADDR_PIPECFG_P8_16x16_8x16: - case ADDR_PIPECFG_P8_16x32_8x16: - case ADDR_PIPECFG_P8_32x32_8x16: - case ADDR_PIPECFG_P8_16x32_16x16: - case ADDR_PIPECFG_P8_32x32_16x16: - case ADDR_PIPECFG_P8_32x32_16x32: - case ADDR_PIPECFG_P8_32x64_32x32: - numPipes = 8; - break; - case ADDR_PIPECFG_P16_32x32_8x16: - case ADDR_PIPECFG_P16_32x32_16x16: - numPipes = 16; - break; - default: - ADDR_ASSERT(!"Invalid pipe config"); - numPipes = m_pipes; - } - return numPipes; -} - -/** -*************************************************************************************************** -* SIAddrLib::ComputePipeFromCoord -* -* @brief -* Compute pipe number from coordinates -* @return -* Pipe number -*************************************************************************************************** -*/ -UINT_32 SIAddrLib::ComputePipeFromCoord( - UINT_32 x, ///< [in] x coordinate - UINT_32 y, ///< [in] y coordinate - UINT_32 slice, ///< [in] slice index - AddrTileMode tileMode, ///< [in] tile mode - UINT_32 pipeSwizzle, ///< [in] pipe swizzle - BOOL_32 ignoreSE, ///< [in] TRUE if shader engines are ignored - ADDR_TILEINFO* pTileInfo ///< [in] Tile info - ) const -{ - UINT_32 pipe; - UINT_32 pipeBit0 = 0; - UINT_32 pipeBit1 = 0; - UINT_32 pipeBit2 = 0; - UINT_32 pipeBit3 = 0; - UINT_32 sliceRotation; - UINT_32 numPipes = 0; - - UINT_32 tx = x / MicroTileWidth; - UINT_32 ty = y / MicroTileHeight; - UINT_32 x3 = _BIT(tx,0); - UINT_32 x4 = _BIT(tx,1); - UINT_32 x5 = _BIT(tx,2); - UINT_32 x6 = _BIT(tx,3); - UINT_32 y3 = _BIT(ty,0); - UINT_32 y4 = _BIT(ty,1); - UINT_32 y5 = _BIT(ty,2); - UINT_32 y6 = _BIT(ty,3); - - switch (pTileInfo->pipeConfig) - { - case ADDR_PIPECFG_P2: - pipeBit0 = x3 ^ y3; - numPipes = 2; - break; - case ADDR_PIPECFG_P4_8x16: - pipeBit0 = x4 ^ y3; - pipeBit1 = x3 ^ y4; - numPipes = 4; - break; - case ADDR_PIPECFG_P4_16x16: - pipeBit0 = x3 ^ y3 ^ x4; - pipeBit1 = x4 ^ y4; - numPipes = 4; - break; - case ADDR_PIPECFG_P4_16x32: - pipeBit0 = x3 ^ y3 ^ x4; - pipeBit1 = x4 ^ y5; - numPipes = 4; - break; - case ADDR_PIPECFG_P4_32x32: - pipeBit0 = x3 ^ y3 ^ x5; - pipeBit1 = x5 ^ y5; - numPipes = 4; - break; - case ADDR_PIPECFG_P8_16x16_8x16: - pipeBit0 = x4 ^ y3 ^ x5; - pipeBit1 = x3 ^ y5; - numPipes = 8; - break; - case ADDR_PIPECFG_P8_16x32_8x16: - pipeBit0 = x4 ^ y3 ^ x5; - pipeBit1 = x3 ^ y4; - pipeBit2 = x4 ^ y5; - numPipes = 8; - break; - case ADDR_PIPECFG_P8_16x32_16x16: - pipeBit0 = x3 ^ y3 ^ x4; - pipeBit1 = x5 ^ y4; - pipeBit2 = x4 ^ y5; - numPipes = 8; - break; - case ADDR_PIPECFG_P8_32x32_8x16: - pipeBit0 = x4 ^ y3 ^ x5; - pipeBit1 = x3 ^ y4; - pipeBit2 = x5 ^ y5; - numPipes = 8; - break; - case ADDR_PIPECFG_P8_32x32_16x16: - pipeBit0 = x3 ^ y3 ^ x4; - pipeBit1 = x4 ^ y4; - pipeBit2 = x5 ^ y5; - numPipes = 8; - break; - case ADDR_PIPECFG_P8_32x32_16x32: - pipeBit0 = x3 ^ y3 ^ x4; - pipeBit1 = x4 ^ y6; - pipeBit2 = x5 ^ y5; - numPipes = 8; - break; - case ADDR_PIPECFG_P8_32x64_32x32: - pipeBit0 = x3 ^ y3 ^ x5; - pipeBit1 = x6 ^ y5; - pipeBit2 = x5 ^ y6; - numPipes = 8; - break; - case ADDR_PIPECFG_P16_32x32_8x16: - pipeBit0 = x4 ^ y3; - pipeBit1 = x3 ^ y4; - pipeBit2 = x5 ^ y6; - pipeBit3 = x6 ^ y5; - numPipes = 16; - break; - case ADDR_PIPECFG_P16_32x32_16x16: - pipeBit0 = x3 ^ y3 ^ x4; - pipeBit1 = x4 ^ y4; - pipeBit2 = x5 ^ y6; - pipeBit3 = x6 ^ y5; - numPipes = 16; - break; - default: - ADDR_UNHANDLED_CASE(); - break; - } - pipe = pipeBit0 | (pipeBit1 << 1) | (pipeBit2 << 2) | (pipeBit3 << 3); - - UINT_32 microTileThickness = ComputeSurfaceThickness(tileMode); - - // - // Apply pipe rotation for the slice. - // - switch (tileMode) - { - case ADDR_TM_3D_TILED_THIN1: //fall through thin - case ADDR_TM_3D_TILED_THICK: //fall through thick - case ADDR_TM_3D_TILED_XTHICK: - sliceRotation = - Max(1, static_cast(numPipes / 2) - 1) * (slice / microTileThickness); - break; - default: - sliceRotation = 0; - break; - } - pipeSwizzle += sliceRotation; - pipeSwizzle &= (numPipes - 1); - - pipe = pipe ^ pipeSwizzle; - - return pipe; -} - -/** -*************************************************************************************************** -* SIAddrLib::ComputeTileCoordFromPipeAndElemIdx -* -* @brief -* Compute (x,y) of a tile within a macro tile from address -* @return -* Pipe number -*************************************************************************************************** -*/ -VOID SIAddrLib::ComputeTileCoordFromPipeAndElemIdx( - UINT_32 elemIdx, ///< [in] per pipe element index within a macro tile - UINT_32 pipe, ///< [in] pipe index - AddrPipeCfg pipeCfg, ///< [in] pipe config - UINT_32 pitchInMacroTile, ///< [in] surface pitch in macro tile - UINT_32 x, ///< [in] x coordinate of the (0,0) tile in a macro tile - UINT_32 y, ///< [in] y coordinate of the (0,0) tile in a macro tile - UINT_32* pX, ///< [out] x coordinate - UINT_32* pY ///< [out] y coordinate - ) const -{ - UINT_32 pipebit0 = _BIT(pipe,0); - UINT_32 pipebit1 = _BIT(pipe,1); - UINT_32 pipebit2 = _BIT(pipe,2); - UINT_32 pipebit3 = _BIT(pipe,3); - UINT_32 elemIdx0 = _BIT(elemIdx,0); - UINT_32 elemIdx1 = _BIT(elemIdx,1); - UINT_32 elemIdx2 = _BIT(elemIdx,2); - UINT_32 x3 = 0; - UINT_32 x4 = 0; - UINT_32 x5 = 0; - UINT_32 x6 = 0; - UINT_32 y3 = 0; - UINT_32 y4 = 0; - UINT_32 y5 = 0; - UINT_32 y6 = 0; - - switch(pipeCfg) - { - case ADDR_PIPECFG_P2: - x4 = elemIdx2; - y4 = elemIdx1 ^ x4; - y3 = elemIdx0 ^ x4; - x3 = pipebit0 ^ y3; - *pY = Bits2Number(2, y4, y3); - *pX = Bits2Number(2, x4, x3); - break; - case ADDR_PIPECFG_P4_8x16: - x4 = elemIdx1; - y4 = elemIdx0 ^ x4; - x3 = pipebit1 ^ y4; - y3 = pipebit0 ^ x4; - *pY = Bits2Number(2, y4, y3); - *pX = Bits2Number(2, x4, x3); - break; - case ADDR_PIPECFG_P4_16x16: - x4 = elemIdx1; - y3 = elemIdx0 ^ x4; - y4 = pipebit1 ^ x4; - x3 = pipebit0 ^ y3 ^ x4; - *pY = Bits2Number(2, y4, y3); - *pX = Bits2Number(2, x4, x3); - break; - case ADDR_PIPECFG_P4_16x32: - x3 = elemIdx0 ^ pipebit0; - y5 = _BIT(y,5); - x4 = pipebit1 ^ y5; - y3 = pipebit0 ^ x3 ^ x4; - y4 = elemIdx1 ^ x4; - *pY = Bits2Number(2, y4, y3); - *pX = Bits2Number(2, x4, x3); - break; - case ADDR_PIPECFG_P4_32x32: - x4 = elemIdx2; - y3 = elemIdx0 ^ x4; - y4 = elemIdx1 ^ x4; - if((pitchInMacroTile % 2) == 0) - { //even - y5 = _BIT(y,5); - x5 = pipebit1 ^ y5; - x3 = pipebit0 ^ y3 ^ x5; - *pY = Bits2Number(2, y4, y3); - *pX = Bits2Number(3, x5, x4, x3); - } - else - { //odd - x5 = _BIT(x,5); - x3 = pipebit0 ^ y3 ^ x5; - *pY = Bits2Number(2, y4, y3); - *pX = Bits2Number(2, x4, x3); - } - break; - case ADDR_PIPECFG_P8_16x16_8x16: - x4 = elemIdx0; - y5 = _BIT(y,5); - x5 = _BIT(x,5); - x3 = pipebit1 ^ y5; - y4 = pipebit2 ^ x4; - y3 = pipebit0 ^ x5 ^ x4; - *pY = Bits2Number(2, y4, y3); - *pX = Bits2Number(2, x4, x3); - break; - case ADDR_PIPECFG_P8_16x32_8x16: - x3 = elemIdx0; - y4 = pipebit1 ^ x3; - y5 = _BIT(y,5); - x5 = _BIT(x,5); - x4 = pipebit2 ^ y5; - y3 = pipebit0 ^ x4 ^ x5; - *pY = Bits2Number(2, y4, y3); - *pX = Bits2Number(2, x4, x3); - break; - case ADDR_PIPECFG_P8_32x32_8x16: - x4 = elemIdx1; - y4 = elemIdx0 ^ x4; - x3 = pipebit1 ^ y4; - if((pitchInMacroTile % 2) == 0) - { //even - y5 = _BIT(y,5); - x5 = _BIT(x,5); - x5 = pipebit2 ^ y5; - y3 = pipebit0 ^ x4 ^ x5; - *pY = Bits2Number(2, y4, y3); - *pX = Bits2Number(3, x5, x4, x3); - } - else - { //odd - x5 = _BIT(x,5); - y3 = pipebit0 ^ x4 ^ x5; - *pY = Bits2Number(2, y4, y3); - *pX = Bits2Number(2, x4, x3); - } - break; - case ADDR_PIPECFG_P8_16x32_16x16: - x3 = elemIdx0; - x5 = _BIT(x,5); - y5 = _BIT(y,5); - x4 = pipebit2 ^ y5; - y4 = pipebit1 ^ x5; - y3 = pipebit0 ^ x3 ^ x4; - *pY = Bits2Number(2, y4, y3); - *pX = Bits2Number(2, x4, x3); - break; - case ADDR_PIPECFG_P8_32x32_16x16: - x4 = elemIdx1; - y3 = elemIdx0 ^ x4; - x3 = y3^x4^pipebit0; - y4 = pipebit1 ^ x4; - if((pitchInMacroTile % 2) == 0) - { //even - y5 = _BIT(y,5); - x5 = pipebit2 ^ y5; - *pY = Bits2Number(2, y4, y3); - *pX = Bits2Number(3, x5, x4, x3); - } - else - { //odd - *pY = Bits2Number(2, y4, y3); - *pX = Bits2Number(2, x4, x3); - } - break; - case ADDR_PIPECFG_P8_32x32_16x32: - if((pitchInMacroTile % 2) == 0) - { //even - y5 = _BIT(y,5); - y6 = _BIT(y,6); - x4 = pipebit1 ^ y6; - y3 = elemIdx0 ^ x4; - y4 = elemIdx1 ^ x4; - x3 = pipebit0 ^ y3 ^ x4; - x5 = pipebit2 ^ y5; - *pY = Bits2Number(2, y4, y3); - *pX = Bits2Number(3, x5, x4, x3); - } - else - { //odd - y6 = _BIT(y,6); - x4 = pipebit1 ^ y6; - y3 = elemIdx0 ^ x4; - y4 = elemIdx1 ^ x4; - x3 = pipebit0 ^ y3 ^ x4; - *pY = Bits2Number(2, y4, y3); - *pX = Bits2Number(2, x4, x3); - } - break; - case ADDR_PIPECFG_P8_32x64_32x32: - x4 = elemIdx2; - y3 = elemIdx0 ^ x4; - y4 = elemIdx1 ^ x4; - if((pitchInMacroTile % 4) == 0) - { //multiple of 4 - y5 = _BIT(y,5); - y6 = _BIT(y,6); - x5 = pipebit2 ^ y6; - x6 = pipebit1 ^ y5; - x3 = pipebit0 ^ y3 ^ x5; - *pY = Bits2Number(2, y4, y3); - *pX = Bits2Number(4, x6, x5, x4, x3); - } - else - { - y6 = _BIT(y,6); - x5 = pipebit2 ^ y6; - x3 = pipebit0 ^ y3 ^ x5; - *pY = Bits2Number(2, y4, y3); - *pX = Bits2Number(3, x5, x4, x3); - } - break; - case ADDR_PIPECFG_P16_32x32_8x16: - x4 = elemIdx1; - y4 = elemIdx0 ^ x4; - y3 = pipebit0 ^ x4; - x3 = pipebit1 ^ y4; - if((pitchInMacroTile % 4) == 0) - { //multiple of 4 - y5 = _BIT(y,5); - y6 = _BIT(y,6); - x5 = pipebit2 ^ y6; - x6 = pipebit3 ^ y5; - *pY = Bits2Number(2, y4, y3); - *pX = Bits2Number(4, x6, x5,x4, x3); - } - else - { - y6 = _BIT(y,6); - x5 = pipebit2 ^ y6; - *pY = Bits2Number(2, y4, y3); - *pX = Bits2Number(3, x5, x4, x3); - } - break; - case ADDR_PIPECFG_P16_32x32_16x16: - x4 = elemIdx1; - y3 = elemIdx0 ^ x4; - y4 = pipebit1 ^ x4; - x3 = pipebit0 ^ y3 ^ x4; - if((pitchInMacroTile % 4) == 0) - { //multiple of 4 - y5 = _BIT(y,5); - y6 = _BIT(y,6); - x5 = pipebit2 ^ y6; - x6 = pipebit3 ^ y5; - *pY = Bits2Number(2, y4, y3); - *pX = Bits2Number(4, x6, x5, x4, x3); - } - else - { - y6 = _BIT(y,6); - x5 = pipebit2 ^ y6; - *pY = Bits2Number(2, y4, y3); - *pX = Bits2Number(3, x5, x4, x3); - } - break; - default: - ADDR_UNHANDLED_CASE(); - } -} - -/** -*************************************************************************************************** -* SIAddrLib::TileCoordToMaskElementIndex -* -* @brief -* Compute element index from coordinates in tiles -* @return -* Element index -*************************************************************************************************** -*/ -UINT_32 SIAddrLib::TileCoordToMaskElementIndex( - UINT_32 tx, ///< [in] x coord, in Tiles - UINT_32 ty, ///< [in] y coord, in Tiles - AddrPipeCfg pipeConfig, ///< [in] pipe config - UINT_32* macroShift, ///< [out] macro shift - UINT_32* elemIdxBits ///< [out] tile offset bits - ) const -{ - UINT_32 elemIdx = 0; - UINT_32 elemIdx0, elemIdx1, elemIdx2; - UINT_32 tx0, tx1; - UINT_32 ty0, ty1; - - tx0 = _BIT(tx,0); - tx1 = _BIT(tx,1); - ty0 = _BIT(ty,0); - ty1 = _BIT(ty,1); - - switch(pipeConfig) - { - case ADDR_PIPECFG_P2: - *macroShift = 3; - *elemIdxBits =3; - elemIdx2 = tx1; - elemIdx1 = tx1 ^ ty1; - elemIdx0 = tx1 ^ ty0; - elemIdx = Bits2Number(3,elemIdx2,elemIdx1,elemIdx0); - break; - case ADDR_PIPECFG_P4_8x16: - *macroShift = 2; - *elemIdxBits =2; - elemIdx1 = tx1; - elemIdx0 = tx1 ^ ty1; - elemIdx = Bits2Number(2,elemIdx1,elemIdx0); - break; - case ADDR_PIPECFG_P4_16x16: - *macroShift = 2; - *elemIdxBits =2; - elemIdx0 = tx1^ty0; - elemIdx1 = tx1; - elemIdx = Bits2Number(2, elemIdx1, elemIdx0); - break; - case ADDR_PIPECFG_P4_16x32: - *macroShift = 2; - *elemIdxBits =2; - elemIdx0 = tx1^ty0; - elemIdx1 = tx1^ty1; - elemIdx = Bits2Number(2, elemIdx1, elemIdx0); - break; - case ADDR_PIPECFG_P4_32x32: - *macroShift = 2; - *elemIdxBits =3; - elemIdx0 = tx1^ty0; - elemIdx1 = tx1^ty1; - elemIdx2 = tx1; - elemIdx = Bits2Number(3, elemIdx2, elemIdx1, elemIdx0); - break; - case ADDR_PIPECFG_P8_16x16_8x16: - *macroShift = 1; - *elemIdxBits =1; - elemIdx0 = tx1; - elemIdx = elemIdx0; - break; - case ADDR_PIPECFG_P8_16x32_8x16: - *macroShift = 1; - *elemIdxBits =1; - elemIdx0 = tx0; - elemIdx = elemIdx0; - break; - case ADDR_PIPECFG_P8_32x32_8x16: - *macroShift = 1; - *elemIdxBits =2; - elemIdx1 = tx1; - elemIdx0 = tx1^ty1; - elemIdx = Bits2Number(2, elemIdx1, elemIdx0); - break; - case ADDR_PIPECFG_P8_16x32_16x16: - *macroShift = 1; - *elemIdxBits =1; - elemIdx0 = tx0; - elemIdx = elemIdx0; - break; - case ADDR_PIPECFG_P8_32x32_16x16: - *macroShift = 1; - *elemIdxBits =2; - elemIdx0 = tx1^ty0; - elemIdx1 = tx1; - elemIdx = Bits2Number(2, elemIdx1, elemIdx0); - break; - case ADDR_PIPECFG_P8_32x32_16x32: - *macroShift = 1; - *elemIdxBits =2; - elemIdx0 = tx1^ty0; - elemIdx1 = tx1^ty1; - elemIdx = Bits2Number(2, elemIdx1, elemIdx0); - break; - case ADDR_PIPECFG_P8_32x64_32x32: - *macroShift = 1; - *elemIdxBits =3; - elemIdx0 = tx1^ty0; - elemIdx1 = tx1^ty1; - elemIdx2 = tx1; - elemIdx = Bits2Number(3, elemIdx2, elemIdx1, elemIdx0); - break; - case ADDR_PIPECFG_P16_32x32_8x16: - *macroShift = 0; - *elemIdxBits =2; - elemIdx0 = tx1^ty1; - elemIdx1 = tx1; - elemIdx = Bits2Number(2, elemIdx1, elemIdx0); - break; - case ADDR_PIPECFG_P16_32x32_16x16: - *macroShift = 0; - *elemIdxBits =2; - elemIdx0 = tx1^ty0; - elemIdx1 = tx1; - elemIdx = Bits2Number(2, elemIdx1, elemIdx0); - break; - default: - ADDR_UNHANDLED_CASE(); - break; - } - - return elemIdx; -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlComputeTileDataWidthAndHeightLinear -* -* @brief -* Compute the squared cache shape for per-tile data (CMASK and HTILE) for linear layout -* -* @return -* N/A -* -* @note -* MacroWidth and macroHeight are measured in pixels -*************************************************************************************************** -*/ -VOID SIAddrLib::HwlComputeTileDataWidthAndHeightLinear( - UINT_32* pMacroWidth, ///< [out] macro tile width - UINT_32* pMacroHeight, ///< [out] macro tile height - UINT_32 bpp, ///< [in] bits per pixel - ADDR_TILEINFO* pTileInfo ///< [in] tile info - ) const -{ - ADDR_ASSERT(pTileInfo != NULL); - UINT_32 macroWidth; - UINT_32 macroHeight; - - /// In linear mode, the htile or cmask buffer must be padded out to 4 tiles - /// but for P8_32x64_32x32, it must be padded out to 8 tiles - /// Actually there are more pipe configs which need 8-tile padding but SI family - /// has a bug which is fixed in CI family - if ((pTileInfo->pipeConfig == ADDR_PIPECFG_P8_32x64_32x32) || - (pTileInfo->pipeConfig == ADDR_PIPECFG_P16_32x32_8x16) || - (pTileInfo->pipeConfig == ADDR_PIPECFG_P8_32x32_16x16)) - { - macroWidth = 8*MicroTileWidth; - macroHeight = 8*MicroTileHeight; - } - else - { - macroWidth = 4*MicroTileWidth; - macroHeight = 4*MicroTileHeight; - } - - *pMacroWidth = macroWidth; - *pMacroHeight = macroHeight; -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlComputeHtileBytes -* -* @brief -* Compute htile size in bytes -* -* @return -* Htile size in bytes -*************************************************************************************************** -*/ -UINT_64 SIAddrLib::HwlComputeHtileBytes( - UINT_32 pitch, ///< [in] pitch - UINT_32 height, ///< [in] height - UINT_32 bpp, ///< [in] bits per pixel - BOOL_32 isLinear, ///< [in] if it is linear mode - UINT_32 numSlices, ///< [in] number of slices - UINT_64* pSliceBytes, ///< [out] bytes per slice - UINT_32 baseAlign ///< [in] base alignments - ) const -{ - return ComputeHtileBytes(pitch, height, bpp, isLinear, numSlices, pSliceBytes, baseAlign); -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlComputeXmaskAddrFromCoord -* -* @brief -* Compute address from coordinates for htile/cmask -* @return -* Byte address -*************************************************************************************************** -*/ -UINT_64 SIAddrLib::HwlComputeXmaskAddrFromCoord( - UINT_32 pitch, ///< [in] pitch - UINT_32 height, ///< [in] height - UINT_32 x, ///< [in] x coord - UINT_32 y, ///< [in] y coord - UINT_32 slice, ///< [in] slice/depth index - UINT_32 numSlices, ///< [in] number of slices - UINT_32 factor, ///< [in] factor that indicates cmask(2) or htile(1) - BOOL_32 isLinear, ///< [in] linear or tiled HTILE layout - BOOL_32 isWidth8, ///< [in] TRUE if width is 8, FALSE means 4. It's register value - BOOL_32 isHeight8, ///< [in] TRUE if width is 8, FALSE means 4. It's register value - ADDR_TILEINFO* pTileInfo, ///< [in] Tile info - UINT_32* pBitPosition ///< [out] bit position inside a byte - ) const -{ - UINT_32 tx = x / MicroTileWidth; - UINT_32 ty = y / MicroTileHeight; - UINT_32 newPitch; - UINT_32 newHeight; - UINT_64 totalBytes; - UINT_32 macroWidth; - UINT_32 macroHeight; - UINT_64 pSliceBytes; - UINT_32 pBaseAlign; - UINT_32 tileNumPerPipe; - UINT_32 elemBits; - - if (factor == 2) //CMASK - { - ADDR_CMASK_FLAGS flags = {{0}}; - - tileNumPerPipe = 256; - - ComputeCmaskInfo(flags, - pitch, - height, - numSlices, - isLinear, - pTileInfo, - &newPitch, - &newHeight, - &totalBytes, - ¯oWidth, - ¯oHeight); - elemBits = CmaskElemBits; - } - else //HTile - { - ADDR_HTILE_FLAGS flags = {{0}}; - - tileNumPerPipe = 512; - - ComputeHtileInfo(flags, - pitch, - height, - numSlices, - isLinear, - TRUE, - TRUE, - pTileInfo, - &newPitch, - &newHeight, - &totalBytes, - ¯oWidth, - ¯oHeight, - &pSliceBytes, - &pBaseAlign); - elemBits = 32; - } - - const UINT_32 pitchInTile = newPitch / MicroTileWidth; - const UINT_32 heightInTile = newHeight / MicroTileWidth; - UINT_64 macroOffset; // Per pipe starting offset of the macro tile in which this tile lies. - UINT_64 microNumber; // Per pipe starting offset of the macro tile in which this tile lies. - UINT_32 microX; - UINT_32 microY; - UINT_64 microOffset; - UINT_32 microShift; - UINT_64 totalOffset; - UINT_32 elemIdxBits; - UINT_32 elemIdx = - TileCoordToMaskElementIndex(tx, ty, pTileInfo->pipeConfig, µShift, &elemIdxBits); - - UINT_32 numPipes = HwlGetPipes(pTileInfo); - - if (isLinear) - { //linear addressing - // Linear addressing is extremelly wasting memory if slice > 1, since each pipe has the full - // slice memory foot print instead of divided by numPipes. - microX = tx / 4; // Macro Tile is 4x4 - microY = ty / 4 ; - microNumber = static_cast(microX + microY * (pitchInTile / 4)) << microShift; - - UINT_32 sliceBits = pitchInTile * heightInTile; - - // do htile single slice alignment if the flag is true - if (m_configFlags.useHtileSliceAlign && (factor == 1)) //Htile - { - sliceBits = PowTwoAlign(sliceBits, BITS_TO_BYTES(HtileCacheBits) * numPipes / elemBits); - } - macroOffset = slice * (sliceBits / numPipes) * elemBits ; - } - else - { //tiled addressing - const UINT_32 macroWidthInTile = macroWidth / MicroTileWidth; // Now in unit of Tiles - const UINT_32 macroHeightInTile = macroHeight / MicroTileHeight; - const UINT_32 pitchInCL = pitchInTile / macroWidthInTile; - const UINT_32 heightInCL = heightInTile / macroHeightInTile; - - const UINT_32 macroX = x / macroWidth; - const UINT_32 macroY = y / macroHeight; - const UINT_32 macroNumber = macroX + macroY * pitchInCL + slice * pitchInCL * heightInCL; - - // Per pipe starting offset of the cache line in which this tile lies. - microX = (x % macroWidth) / MicroTileWidth / 4; // Macro Tile is 4x4 - microY = (y % macroHeight) / MicroTileHeight / 4 ; - microNumber = static_cast(microX + microY * (macroWidth / MicroTileWidth / 4)) << microShift; - - macroOffset = macroNumber * tileNumPerPipe * elemBits; - } - - if(elemIdxBits == microShift) - { - microNumber += elemIdx; - } - else - { - microNumber >>= elemIdxBits; - microNumber <<= elemIdxBits; - microNumber += elemIdx; - } - - microOffset = elemBits * microNumber; - totalOffset = microOffset + macroOffset; - - UINT_32 pipe = ComputePipeFromCoord(x, y, 0, ADDR_TM_2D_TILED_THIN1, 0, FALSE, pTileInfo); - UINT_64 addrInBits = totalOffset % (m_pipeInterleaveBytes * 8) + - pipe * (m_pipeInterleaveBytes * 8) + - totalOffset / (m_pipeInterleaveBytes * 8) * (m_pipeInterleaveBytes * 8) * numPipes; - *pBitPosition = static_cast(addrInBits) % 8; - UINT_64 addr = addrInBits / 8; - - return addr; -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlComputeXmaskCoordFromAddr -* -* @brief -* Compute the coord from an address of a cmask/htile -* -* @return -* N/A -* -* @note -* This method is reused by htile, so rename to Xmask -*************************************************************************************************** -*/ -VOID SIAddrLib::HwlComputeXmaskCoordFromAddr( - UINT_64 addr, ///< [in] address - UINT_32 bitPosition, ///< [in] bitPosition in a byte - UINT_32 pitch, ///< [in] pitch - UINT_32 height, ///< [in] height - UINT_32 numSlices, ///< [in] number of slices - UINT_32 factor, ///< [in] factor that indicates cmask or htile - BOOL_32 isLinear, ///< [in] linear or tiled HTILE layout - BOOL_32 isWidth8, ///< [in] Not used by SI - BOOL_32 isHeight8, ///< [in] Not used by SI - ADDR_TILEINFO* pTileInfo, ///< [in] Tile info - UINT_32* pX, ///< [out] x coord - UINT_32* pY, ///< [out] y coord - UINT_32* pSlice ///< [out] slice index - ) const -{ - UINT_32 newPitch; - UINT_32 newHeight; - UINT_64 totalBytes; - UINT_32 clWidth; - UINT_32 clHeight; - UINT_32 tileNumPerPipe; - UINT_64 sliceBytes; - - *pX = 0; - *pY = 0; - *pSlice = 0; - - if (factor == 2) //CMASK - { - ADDR_CMASK_FLAGS flags = {{0}}; - - tileNumPerPipe = 256; - - ComputeCmaskInfo(flags, - pitch, - height, - numSlices, - isLinear, - pTileInfo, - &newPitch, - &newHeight, - &totalBytes, - &clWidth, - &clHeight); - } - else //HTile - { - ADDR_HTILE_FLAGS flags = {{0}}; - - tileNumPerPipe = 512; - - ComputeHtileInfo(flags, - pitch, - height, - numSlices, - isLinear, - TRUE, - TRUE, - pTileInfo, - &newPitch, - &newHeight, - &totalBytes, - &clWidth, - &clHeight, - &sliceBytes); - } - - const UINT_32 pitchInTile = newPitch / MicroTileWidth; - const UINT_32 heightInTile = newHeight / MicroTileWidth; - const UINT_32 pitchInMacroTile = pitchInTile / 4; - UINT_32 macroShift; - UINT_32 elemIdxBits; - // get macroShift and elemIdxBits - TileCoordToMaskElementIndex(0, 0, pTileInfo->pipeConfig, ¯oShift, &elemIdxBits); - - const UINT_32 numPipes = HwlGetPipes(pTileInfo); - const UINT_32 pipe = (UINT_32)((addr / m_pipeInterleaveBytes) % numPipes); - // per pipe - UINT_64 localOffset = (addr % m_pipeInterleaveBytes) + - (addr / m_pipeInterleaveBytes / numPipes)* m_pipeInterleaveBytes; - - UINT_32 tileIndex; - if (factor == 2) //CMASK - { - tileIndex = (UINT_32)(localOffset * 2 + (bitPosition != 0)); - } - else - { - tileIndex = (UINT_32)(localOffset / 4); - } - - UINT_32 macroOffset; - if (isLinear) - { - UINT_32 sliceSizeInTile = pitchInTile * heightInTile; - - // do htile single slice alignment if the flag is true - if (m_configFlags.useHtileSliceAlign && (factor == 1)) //Htile - { - sliceSizeInTile = PowTwoAlign(sliceSizeInTile, static_cast(sliceBytes) / 64); - } - *pSlice = tileIndex / (sliceSizeInTile / numPipes); - macroOffset = tileIndex % (sliceSizeInTile / numPipes); - } - else - { - const UINT_32 clWidthInTile = clWidth / MicroTileWidth; // Now in unit of Tiles - const UINT_32 clHeightInTile = clHeight / MicroTileHeight; - const UINT_32 pitchInCL = pitchInTile / clWidthInTile; - const UINT_32 heightInCL = heightInTile / clHeightInTile; - const UINT_32 clIndex = tileIndex / tileNumPerPipe; - - UINT_32 clX = clIndex % pitchInCL; - UINT_32 clY = (clIndex % (heightInCL * pitchInCL)) / pitchInCL; - - *pX = clX * clWidthInTile * MicroTileWidth; - *pY = clY * clHeightInTile * MicroTileHeight; - *pSlice = clIndex / (heightInCL * pitchInCL); - - macroOffset = tileIndex % tileNumPerPipe; - } - - UINT_32 elemIdx = macroOffset & 7; - macroOffset >>= elemIdxBits; - - if (elemIdxBits != macroShift) - { - macroOffset <<= (elemIdxBits - macroShift); - - UINT_32 pipebit1 = _BIT(pipe,1); - UINT_32 pipebit2 = _BIT(pipe,2); - UINT_32 pipebit3 = _BIT(pipe,3); - if (pitchInMacroTile % 2) - { //odd - switch (pTileInfo->pipeConfig) - { - case ADDR_PIPECFG_P4_32x32: - macroOffset |= pipebit1; - break; - case ADDR_PIPECFG_P8_32x32_8x16: - case ADDR_PIPECFG_P8_32x32_16x16: - case ADDR_PIPECFG_P8_32x32_16x32: - macroOffset |= pipebit2; - break; - default: - break; - } - - } - - if (pitchInMacroTile % 4) - { - if (pTileInfo->pipeConfig == ADDR_PIPECFG_P8_32x64_32x32) - { - macroOffset |= (pipebit1<<1); - } - if((pTileInfo->pipeConfig == ADDR_PIPECFG_P16_32x32_8x16) || - (pTileInfo->pipeConfig == ADDR_PIPECFG_P16_32x32_16x16)) - { - macroOffset |= (pipebit3<<1); - } - } - } - - UINT_32 macroX; - UINT_32 macroY; - - if (isLinear) - { - macroX = macroOffset % pitchInMacroTile; - macroY = macroOffset / pitchInMacroTile; - } - else - { - const UINT_32 clWidthInMacroTile = clWidth / (MicroTileWidth * 4); - macroX = macroOffset % clWidthInMacroTile; - macroY = macroOffset / clWidthInMacroTile; - } - - *pX += macroX * 4 * MicroTileWidth; - *pY += macroY * 4 * MicroTileHeight; - - UINT_32 microX; - UINT_32 microY; - ComputeTileCoordFromPipeAndElemIdx(elemIdx, pipe, pTileInfo->pipeConfig, pitchInMacroTile, - *pX, *pY, µX, µY); - - *pX += microX * MicroTileWidth; - *pY += microY * MicroTileWidth; -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlGetPitchAlignmentLinear -* @brief -* Get pitch alignment -* @return -* pitch alignment -*************************************************************************************************** -*/ -UINT_32 SIAddrLib::HwlGetPitchAlignmentLinear( - UINT_32 bpp, ///< [in] bits per pixel - ADDR_SURFACE_FLAGS flags ///< [in] surface flags - ) const -{ - UINT_32 pitchAlign; - - // Interleaved access requires a 256B aligned pitch, so fall back to pre-SI alignment - if (flags.interleaved) - { - pitchAlign = Max(64u, m_pipeInterleaveBytes / BITS_TO_BYTES(bpp)); - - } - else - { - pitchAlign = Max(8u, 64 / BITS_TO_BYTES(bpp)); - } - - return pitchAlign; -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlGetSizeAdjustmentLinear -* -* @brief -* Adjust linear surface pitch and slice size -* -* @return -* Logical slice size in bytes -*************************************************************************************************** -*/ -UINT_64 SIAddrLib::HwlGetSizeAdjustmentLinear( - AddrTileMode tileMode, ///< [in] tile mode - UINT_32 bpp, ///< [in] bits per pixel - UINT_32 numSamples, ///< [in] number of samples - UINT_32 baseAlign, ///< [in] base alignment - UINT_32 pitchAlign, ///< [in] pitch alignment - UINT_32* pPitch, ///< [in/out] pointer to pitch - UINT_32* pHeight, ///< [in/out] pointer to height - UINT_32* pHeightAlign ///< [in/out] pointer to height align - ) const -{ - UINT_64 sliceSize; - if (tileMode == ADDR_TM_LINEAR_GENERAL) - { - sliceSize = BITS_TO_BYTES(static_cast(*pPitch) * (*pHeight) * bpp * numSamples); - } - else - { - UINT_32 pitch = *pPitch; - UINT_32 height = *pHeight; - - UINT_32 pixelsPerPipeInterleave = m_pipeInterleaveBytes / BITS_TO_BYTES(bpp); - UINT_32 sliceAlignInPixel = pixelsPerPipeInterleave < 64 ? 64 : pixelsPerPipeInterleave; - - // numSamples should be 1 in real cases (no MSAA for linear but TGL may pass non 1 value) - UINT_64 pixelPerSlice = static_cast(pitch) * height * numSamples; - - while (pixelPerSlice % sliceAlignInPixel) - { - pitch += pitchAlign; - pixelPerSlice = static_cast(pitch) * height * numSamples; - } - - *pPitch = pitch; - - UINT_32 heightAlign = 1; - - while ((pitch * heightAlign) % sliceAlignInPixel) - { - heightAlign++; - } - - *pHeightAlign = heightAlign; - - sliceSize = BITS_TO_BYTES(pixelPerSlice * bpp); - } - - return sliceSize; -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlPreHandleBaseLvl3xPitch -* -* @brief -* Pre-handler of 3x pitch (96 bit) adjustment -* -* @return -* Expected pitch -*************************************************************************************************** -*/ -UINT_32 SIAddrLib::HwlPreHandleBaseLvl3xPitch( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input - UINT_32 expPitch ///< [in] pitch - ) const -{ - ADDR_ASSERT(pIn->width == expPitch); - - // From SI, if pow2Pad is 1 the pitch is expanded 3x first, then padded to pow2, so nothing to - // do here - if (!pIn->flags.pow2Pad) - { - AddrLib::HwlPreHandleBaseLvl3xPitch(pIn, expPitch); - } - else - { - ADDR_ASSERT(IsPow2(expPitch)); - } - - return expPitch; -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlPostHandleBaseLvl3xPitch -* -* @brief -* Post-handler of 3x pitch adjustment -* -* @return -* Expected pitch -*************************************************************************************************** -*/ -UINT_32 SIAddrLib::HwlPostHandleBaseLvl3xPitch( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input - UINT_32 expPitch ///< [in] pitch - ) const -{ - /** - * @note The pitch will be divided by 3 in the end so the value will look odd but h/w should - * be able to compute a correct pitch from it as h/w address library is doing the job. - */ - // From SI, the pitch is expanded 3x first, then padded to pow2, so no special handler here - if (!pIn->flags.pow2Pad) - { - AddrLib::HwlPostHandleBaseLvl3xPitch(pIn, expPitch); - } - - return expPitch; -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlGetPitchAlignmentMicroTiled -* -* @brief -* Compute 1D tiled surface pitch alignment -* -* @return -* pitch alignment -*************************************************************************************************** -*/ -UINT_32 SIAddrLib::HwlGetPitchAlignmentMicroTiled( - AddrTileMode tileMode, ///< [in] tile mode - UINT_32 bpp, ///< [in] bits per pixel - ADDR_SURFACE_FLAGS flags, ///< [in] surface flags - UINT_32 numSamples ///< [in] number of samples - ) const -{ - UINT_32 pitchAlign; - - if (flags.qbStereo) - { - pitchAlign = EgBasedAddrLib::HwlGetPitchAlignmentMicroTiled(tileMode,bpp,flags,numSamples); - } - else - { - pitchAlign = 8; - } - - return pitchAlign; -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlGetSizeAdjustmentMicroTiled -* -* @brief -* Adjust 1D tiled surface pitch and slice size -* -* @return -* Logical slice size in bytes -*************************************************************************************************** -*/ -UINT_64 SIAddrLib::HwlGetSizeAdjustmentMicroTiled( - UINT_32 thickness, ///< [in] thickness - UINT_32 bpp, ///< [in] bits per pixel - ADDR_SURFACE_FLAGS flags, ///< [in] surface flags - UINT_32 numSamples, ///< [in] number of samples - UINT_32 baseAlign, ///< [in] base alignment - UINT_32 pitchAlign, ///< [in] pitch alignment - UINT_32* pPitch, ///< [in/out] pointer to pitch - UINT_32* pHeight ///< [in/out] pointer to height - ) const -{ - UINT_64 logicalSliceSize; - UINT_64 physicalSliceSize; - - UINT_32 pitch = *pPitch; - UINT_32 height = *pHeight; - - // Logical slice: pitch * height * bpp * numSamples (no 1D MSAA so actually numSamples == 1) - logicalSliceSize = BITS_TO_BYTES(static_cast(pitch) * height * bpp * numSamples); - - // Physical slice: multiplied by thickness - physicalSliceSize = logicalSliceSize * thickness; - - // Pitch alignment is always 8, so if slice size is not padded to base alignment - // (pipe_interleave_size), we need to increase pitch - while ((physicalSliceSize % baseAlign) != 0) - { - pitch += pitchAlign; - - logicalSliceSize = BITS_TO_BYTES(static_cast(pitch) * height * bpp * numSamples); - - physicalSliceSize = logicalSliceSize * thickness; - } - -#if !ALT_TEST - // - // Special workaround for depth/stencil buffer, use 8 bpp to align depth buffer again since - // the stencil plane may have larger pitch if the slice size is smaller than base alignment. - // - // Note: this actually does not work for mipmap but mipmap depth texture is not really - // sampled with mipmap. - // - if (flags.depth && !flags.noStencil) - { - ADDR_ASSERT(numSamples == 1); - - UINT_64 logicalSiceSizeStencil = static_cast(pitch) * height; // 1 byte stencil - - while ((logicalSiceSizeStencil % baseAlign) != 0) - { - pitch += pitchAlign; // Stencil plane's pitch alignment is the same as depth plane's - - logicalSiceSizeStencil = static_cast(pitch) * height; - } - - if (pitch != *pPitch) - { - // If this is a mipmap, this padded one cannot be sampled as a whole mipmap! - logicalSliceSize = logicalSiceSizeStencil * BITS_TO_BYTES(bpp); - } - } -#endif - *pPitch = pitch; - - // No adjust for pHeight - - return logicalSliceSize; -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlConvertChipFamily -* -* @brief -* Convert familyID defined in atiid.h to AddrChipFamily and set m_chipFamily/m_chipRevision -* @return -* AddrChipFamily -*************************************************************************************************** -*/ -AddrChipFamily SIAddrLib::HwlConvertChipFamily( - UINT_32 uChipFamily, ///< [in] chip family defined in atiih.h - UINT_32 uChipRevision) ///< [in] chip revision defined in "asic_family"_id.h -{ - AddrChipFamily family = ADDR_CHIP_FAMILY_SI; - - switch (uChipFamily) - { - case FAMILY_SI: - m_settings.isSouthernIsland = 1; - m_settings.isTahiti = ASICREV_IS_TAHITI_P(uChipRevision); - m_settings.isPitCairn = ASICREV_IS_PITCAIRN_PM(uChipRevision); - m_settings.isCapeVerde = ASICREV_IS_CAPEVERDE_M(uChipRevision); - m_settings.isOland = ASICREV_IS_OLAND_M(uChipRevision); - m_settings.isHainan = ASICREV_IS_HAINAN_V(uChipRevision); - break; - default: - ADDR_ASSERT(!"This should be a Fusion"); - break; - } - - return family; -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlSetupTileInfo -* -* @brief -* Setup default value of tile info for SI -*************************************************************************************************** -*/ -VOID SIAddrLib::HwlSetupTileInfo( - AddrTileMode tileMode, ///< [in] Tile mode - ADDR_SURFACE_FLAGS flags, ///< [in] Surface type flags - UINT_32 bpp, ///< [in] Bits per pixel - UINT_32 pitch, ///< [in] Pitch in pixels - UINT_32 height, ///< [in] Height in pixels - UINT_32 numSamples, ///< [in] Number of samples - ADDR_TILEINFO* pTileInfoIn, ///< [in] Tile info input: NULL for default - ADDR_TILEINFO* pTileInfoOut, ///< [out] Tile info output - AddrTileType inTileType, ///< [in] Tile type - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] Output - ) const -{ - UINT_32 thickness = ComputeSurfaceThickness(tileMode); - ADDR_TILEINFO* pTileInfo = pTileInfoOut; - INT index = TileIndexInvalid; - - // Fail-safe code - if (!IsLinear(tileMode)) - { - // 128 bpp/thick tiling must be non-displayable. - // Fmask reuse color buffer's entry but bank-height field can be from another entry - // To simplify the logic, fmask entry should be picked from non-displayable ones - if (bpp == 128 || thickness > 1 || flags.fmask || flags.prt) - { - inTileType = ADDR_NON_DISPLAYABLE; - } - - if (flags.depth || flags.stencil) - { - inTileType = ADDR_DEPTH_SAMPLE_ORDER; - } - } - - // Partial valid fields are not allowed for SI. - if (IsTileInfoAllZero(pTileInfo)) - { - if (IsMacroTiled(tileMode)) - { - if (flags.prt) - { - if (numSamples == 1) - { - if (flags.depth) - { - switch (bpp) - { - case 16: - index = 3; - break; - case 32: - index = 6; - break; - default: - ADDR_ASSERT_ALWAYS(); - break; - } - } - else - { - switch (bpp) - { - case 8: - index = 21; - break; - case 16: - index = 22; - break; - case 32: - index = 23; - break; - case 64: - index = 24; - break; - case 128: - index = 25; - break; - default: - break; - } - - if (thickness > 1) - { - ADDR_ASSERT(bpp != 128); - index += 5; - } - } - } - else - { - ADDR_ASSERT(numSamples == 4); - - if (flags.depth) - { - switch (bpp) - { - case 16: - index = 5; - break; - case 32: - index = 7; - break; - default: - ADDR_ASSERT_ALWAYS(); - break; - } - } - else - { - switch (bpp) - { - case 8: - index = 23; - break; - case 16: - index = 24; - break; - case 32: - index = 25; - break; - case 64: - index = 30; - break; - default: - ADDR_ASSERT_ALWAYS(); - break; - } - } - } - }//end of PRT part - // See table entries 0-7 - else if (flags.depth || flags.stencil) - { - if (flags.compressZ) - { - if (flags.stencil) - { - index = 0; - } - else - { - // optimal tile index for compressed depth/stencil. - switch (numSamples) - { - case 1: - index = 0; - break; - case 2: - case 4: - index = 1; - break; - case 8: - index = 2; - break; - default: - break; - } - } - } - else // unCompressZ - { - index = 3; - } - } - else //non PRT & non Depth & non Stencil - { - // See table entries 9-12 - if (inTileType == ADDR_DISPLAYABLE) - { - switch (bpp) - { - case 8: - index = 10; - break; - case 16: - index = 11; - break; - case 32: - index = 12; - break; - case 64: - index = 12; - break; - default: - break; - } - } - else - { - // See table entries 13-17 - if (thickness == 1) - { - if (flags.fmask) - { - UINT_32 fmaskPixelSize = bpp * numSamples; - - switch (fmaskPixelSize) - { - case 8: - index = 14; - break; - case 16: - index = 15; - break; - case 32: - index = 16; - break; - case 64: - index = 17; - break; - default: - ADDR_ASSERT_ALWAYS(); - } - } - else - { - switch (bpp) - { - case 8: - index = 14; - break; - case 16: - index = 15; - break; - case 32: - index = 16; - break; - case 64: - index = 17; - break; - case 128: - index = 17; - break; - default: - break; - } - } - } - else // thick tiling - entries 18-20 - { - switch (thickness) - { - case 4: - index = 20; - break; - case 8: - index = 19; - break; - default: - break; - } - } - } - } - } - else - { - if (tileMode == ADDR_TM_LINEAR_ALIGNED) - { - index = 8; - } - else if (tileMode == ADDR_TM_LINEAR_GENERAL) - { - index = TileIndexLinearGeneral; - } - else - { - if (flags.depth || flags.stencil) - { - index = 4; - } - else if (inTileType == ADDR_DISPLAYABLE) - { - index = 9; - } - else if (thickness == 1) - { - index = 13; - } - else - { - index = 18; - } - } - } - - if (index >= 0 && index <= 31) - { - *pTileInfo = m_tileTable[index].info; - pOut->tileType = m_tileTable[index].type; - } - - if (index == TileIndexLinearGeneral) - { - *pTileInfo = m_tileTable[8].info; - pOut->tileType = m_tileTable[8].type; - } - } - else - { - if (pTileInfoIn) - { - if (flags.stencil && pTileInfoIn->tileSplitBytes == 0) - { - // Stencil always uses index 0 - *pTileInfo = m_tileTable[0].info; - } - } - // Pass through tile type - pOut->tileType = inTileType; - } - - pOut->tileIndex = index; -} - -/** -*************************************************************************************************** -* SIAddrLib::DecodeGbRegs -* -* @brief -* Decodes GB_ADDR_CONFIG and noOfBanks/noOfRanks -* -* @return -* TRUE if all settings are valid -* -*************************************************************************************************** -*/ -BOOL_32 SIAddrLib::DecodeGbRegs( - const ADDR_REGISTER_VALUE* pRegValue) ///< [in] create input -{ - GB_ADDR_CONFIG reg; - BOOL_32 valid = TRUE; - - reg.val = pRegValue->gbAddrConfig; - - switch (reg.f.pipe_interleave_size) - { - case ADDR_CONFIG_PIPE_INTERLEAVE_256B: - m_pipeInterleaveBytes = ADDR_PIPEINTERLEAVE_256B; - break; - case ADDR_CONFIG_PIPE_INTERLEAVE_512B: - m_pipeInterleaveBytes = ADDR_PIPEINTERLEAVE_512B; - break; - default: - valid = FALSE; - ADDR_UNHANDLED_CASE(); - break; - } - - switch (reg.f.row_size) - { - case ADDR_CONFIG_1KB_ROW: - m_rowSize = ADDR_ROWSIZE_1KB; - break; - case ADDR_CONFIG_2KB_ROW: - m_rowSize = ADDR_ROWSIZE_2KB; - break; - case ADDR_CONFIG_4KB_ROW: - m_rowSize = ADDR_ROWSIZE_4KB; - break; - default: - valid = FALSE; - ADDR_UNHANDLED_CASE(); - break; - } - - switch (pRegValue->noOfBanks) - { - case 0: - m_banks = 4; - break; - case 1: - m_banks = 8; - break; - case 2: - m_banks = 16; - break; - default: - valid = FALSE; - ADDR_UNHANDLED_CASE(); - break; - } - - switch (pRegValue->noOfRanks) - { - case 0: - m_ranks = 1; - break; - case 1: - m_ranks = 2; - break; - default: - valid = FALSE; - ADDR_UNHANDLED_CASE(); - break; - } - - m_logicalBanks = m_banks * m_ranks; - - ADDR_ASSERT(m_logicalBanks <= 16); - - return valid; -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlInitGlobalParams -* -* @brief -* Initializes global parameters -* -* @return -* TRUE if all settings are valid -* -*************************************************************************************************** -*/ -BOOL_32 SIAddrLib::HwlInitGlobalParams( - const ADDR_CREATE_INPUT* pCreateIn) ///< [in] create input -{ - BOOL_32 valid = TRUE; - const ADDR_REGISTER_VALUE* pRegValue = &pCreateIn->regValue; - - valid = DecodeGbRegs(pRegValue); - - if (valid) - { - if (m_settings.isTahiti || m_settings.isPitCairn) - { - m_pipes = 8; - } - else if (m_settings.isCapeVerde || m_settings.isOland) - { - m_pipes = 4; - } - else - { - // Hainan is 2-pipe (m_settings.isHainan == 1) - m_pipes = 2; - } - - valid = InitTileSettingTable(pRegValue->pTileConfig, pRegValue->noOfEntries); - - m_maxSamples = 16; - } - - return valid; -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlConvertTileInfoToHW -* @brief -* Entry of si's ConvertTileInfoToHW -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE SIAddrLib::HwlConvertTileInfoToHW( - const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, ///< [in] input structure - ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut ///< [out] output structure - ) const -{ - ADDR_E_RETURNCODE retCode = ADDR_OK; - - retCode = EgBasedAddrLib::HwlConvertTileInfoToHW(pIn, pOut); - - if (retCode == ADDR_OK) - { - if (pIn->reverse == FALSE) - { - if (pIn->pTileInfo->pipeConfig == ADDR_PIPECFG_INVALID) - { - retCode = ADDR_INVALIDPARAMS; - } - else - { - pOut->pTileInfo->pipeConfig = - static_cast(pIn->pTileInfo->pipeConfig - 1); - } - } - else - { - pOut->pTileInfo->pipeConfig = - static_cast(pIn->pTileInfo->pipeConfig + 1); - } - } - - return retCode; -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlComputeXmaskCoordYFrom8Pipe -* -* @brief -* Compute the Y coord which will be added to Xmask Y -* coord. -* @return -* Y coord -*************************************************************************************************** -*/ -UINT_32 SIAddrLib::HwlComputeXmaskCoordYFrom8Pipe( - UINT_32 pipe, ///< [in] pipe id - UINT_32 x ///< [in] tile coord x, which is original x coord / 8 - ) const -{ - // This function should never be called since it is 6xx/8xx specfic. - // Keep this empty implementation to avoid any mis-use. - ADDR_ASSERT_ALWAYS(); - - return 0; -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlComputeSurfaceCoord2DFromBankPipe -* -* @brief -* Compute surface x,y coordinates from bank/pipe info -* @return -* N/A -*************************************************************************************************** -*/ -VOID SIAddrLib::HwlComputeSurfaceCoord2DFromBankPipe( - AddrTileMode tileMode, ///< [in] tile mode - UINT_32* pX, ///< [in/out] x coordinate - UINT_32* pY, ///< [in/out] y coordinate - UINT_32 slice, ///< [in] slice index - UINT_32 bank, ///< [in] bank number - UINT_32 pipe, ///< [in] pipe number - UINT_32 bankSwizzle,///< [in] bank swizzle - UINT_32 pipeSwizzle,///< [in] pipe swizzle - UINT_32 tileSlices, ///< [in] slices in a micro tile - BOOL_32 ignoreSE, ///< [in] TRUE if shader engines are ignored - ADDR_TILEINFO* pTileInfo ///< [in] bank structure. **All fields to be valid on entry** - ) const -{ - UINT_32 xBit; - UINT_32 yBit; - UINT_32 yBit3 = 0; - UINT_32 yBit4 = 0; - UINT_32 yBit5 = 0; - UINT_32 yBit6 = 0; - - UINT_32 xBit3 = 0; - UINT_32 xBit4 = 0; - UINT_32 xBit5 = 0; - - UINT_32 numPipes = GetPipePerSurf(pTileInfo->pipeConfig); - - CoordFromBankPipe xyBits = {0}; - ComputeSurfaceCoord2DFromBankPipe(tileMode, *pX, *pY, slice, bank, pipe, - bankSwizzle, pipeSwizzle, tileSlices, pTileInfo, - &xyBits); - yBit3 = xyBits.yBit3; - yBit4 = xyBits.yBit4; - yBit5 = xyBits.yBit5; - yBit6 = xyBits.yBit6; - - xBit3 = xyBits.xBit3; - xBit4 = xyBits.xBit4; - xBit5 = xyBits.xBit5; - - yBit = xyBits.yBits; - - UINT_32 yBitTemp = 0; - - if ((pTileInfo->pipeConfig == ADDR_PIPECFG_P4_32x32) || - (pTileInfo->pipeConfig == ADDR_PIPECFG_P8_32x64_32x32)) - { - ADDR_ASSERT(pTileInfo->bankWidth == 1 && pTileInfo->macroAspectRatio > 1); - UINT_32 yBitToCheck = QLog2(pTileInfo->banks) - 1; - - ADDR_ASSERT(yBitToCheck <= 3); - - yBitTemp = _BIT(yBit, yBitToCheck); - - xBit3 = 0; - } - - yBit = Bits2Number(4, yBit6, yBit5, yBit4, yBit3); - xBit = Bits2Number(3, xBit5, xBit4, xBit3); - - *pY += yBit * pTileInfo->bankHeight * MicroTileHeight; - *pX += xBit * numPipes * pTileInfo->bankWidth * MicroTileWidth; - - //calculate the bank and pipe bits in x, y - UINT_32 xTile; //x in micro tile - UINT_32 x3 = 0; - UINT_32 x4 = 0; - UINT_32 x5 = 0; - UINT_32 x6 = 0; - UINT_32 y = *pY; - - UINT_32 pipeBit0 = _BIT(pipe,0); - UINT_32 pipeBit1 = _BIT(pipe,1); - UINT_32 pipeBit2 = _BIT(pipe,2); - - UINT_32 y3 = _BIT(y, 3); - UINT_32 y4 = _BIT(y, 4); - UINT_32 y5 = _BIT(y, 5); - UINT_32 y6 = _BIT(y, 6); - - // bankbit0 after ^x4^x5 - UINT_32 bankBit00 = _BIT(bank,0); - UINT_32 bankBit0 = 0; - - switch (pTileInfo->pipeConfig) - { - case ADDR_PIPECFG_P2: - x3 = pipeBit0 ^ y3; - break; - case ADDR_PIPECFG_P4_8x16: - x4 = pipeBit0 ^ y3; - x3 = pipeBit0 ^ y4; - break; - case ADDR_PIPECFG_P4_16x16: - x4 = pipeBit1 ^ y4; - x3 = pipeBit0 ^ y3 ^ x4; - break; - case ADDR_PIPECFG_P4_16x32: - x4 = pipeBit1 ^ y4; - x3 = pipeBit0 ^ y3 ^ x4; - break; - case ADDR_PIPECFG_P4_32x32: - x5 = pipeBit1 ^ y5; - x3 = pipeBit0 ^ y3 ^ x5; - bankBit0 = yBitTemp ^ x5; - x4 = bankBit00 ^ x5 ^ bankBit0; - *pX += x5 * 4 * 1 * 8; // x5 * num_pipes * bank_width * 8; - break; - case ADDR_PIPECFG_P8_16x16_8x16: - x3 = pipeBit1 ^ y5; - x4 = pipeBit2 ^ y4; - x5 = pipeBit0 ^ y3 ^ x4; - break; - case ADDR_PIPECFG_P8_16x32_8x16: - x3 = pipeBit1 ^ y4; - x4 = pipeBit2 ^ y5; - x5 = pipeBit0 ^ y3 ^ x4; - break; - case ADDR_PIPECFG_P8_32x32_8x16: - x3 = pipeBit1 ^ y4; - x5 = pipeBit2 ^ y5; - x4 = pipeBit0 ^ y3 ^ x5; - break; - case ADDR_PIPECFG_P8_16x32_16x16: - x4 = pipeBit2 ^ y5; - x5 = pipeBit1 ^ y4; - x3 = pipeBit0 ^ y3 ^ x4; - break; - case ADDR_PIPECFG_P8_32x32_16x16: - x5 = pipeBit2 ^ y5; - x4 = pipeBit1 ^ y4; - x3 = pipeBit0 ^ y3 ^ x4; - break; - case ADDR_PIPECFG_P8_32x32_16x32: - x5 = pipeBit2 ^ y5; - x4 = pipeBit1 ^ y6; - x3 = pipeBit0 ^ y3 ^ x4; - break; - case ADDR_PIPECFG_P8_32x64_32x32: - x6 = pipeBit1 ^ y5; - x5 = pipeBit2 ^ y6; - x3 = pipeBit0 ^ y3 ^ x5; - bankBit0 = yBitTemp ^ x6; - x4 = bankBit00 ^ x5 ^ bankBit0; - *pX += x6 * 8 * 1 * 8; // x6 * num_pipes * bank_width * 8; - break; - default: - ADDR_ASSERT_ALWAYS(); - } - - xTile = Bits2Number(3, x5, x4, x3); - - *pX += xTile << 3; -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlPreAdjustBank -* -* @brief -* Adjust bank before calculating address acoording to bank/pipe -* @return -* Adjusted bank -*************************************************************************************************** -*/ -UINT_32 SIAddrLib::HwlPreAdjustBank( - UINT_32 tileX, ///< [in] x coordinate in unit of tile - UINT_32 bank, ///< [in] bank - ADDR_TILEINFO* pTileInfo ///< [in] tile info - ) const -{ - if (((pTileInfo->pipeConfig == ADDR_PIPECFG_P4_32x32) || - (pTileInfo->pipeConfig == ADDR_PIPECFG_P8_32x64_32x32)) && (pTileInfo->bankWidth == 1)) - { - UINT_32 bankBit0 = _BIT(bank, 0); - UINT_32 x4 = _BIT(tileX, 1); - UINT_32 x5 = _BIT(tileX, 2); - - bankBit0 = bankBit0 ^ x4 ^ x5; - bank |= bankBit0; - - ADDR_ASSERT(pTileInfo->macroAspectRatio > 1) - } - - return bank; -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlComputeSurfaceInfo -* -* @brief -* Entry of si's ComputeSurfaceInfo -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE SIAddrLib::HwlComputeSurfaceInfo( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure - ) const -{ - pOut->tileIndex = pIn->tileIndex; - - return EgBasedAddrLib::HwlComputeSurfaceInfo(pIn,pOut); -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlComputeMipLevel -* @brief -* Compute MipLevel info (including level 0) -* @return -* TRUE if HWL's handled -*************************************************************************************************** -*/ -BOOL_32 SIAddrLib::HwlComputeMipLevel( - ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn ///< [in/out] Input structure - ) const -{ - // basePitch is calculated from level 0 so we only check this for mipLevel > 0 - if (pIn->mipLevel > 0) - { - // Note: Don't check expand 3x formats(96 bit) as the basePitch is not pow2 even if - // we explicity set pow2Pad flag. The 3x base pitch is padded to pow2 but after being - // divided by expandX factor (3) - to program texture pitch, the basePitch is never pow2. - if (!AddrElemLib::IsExpand3x(pIn->format)) - { - // Sublevel pitches are generated from base level pitch instead of width on SI - // If pow2Pad is 0, we don't assert - as this is not really used for a mip chain - ADDR_ASSERT(!pIn->flags.pow2Pad || ((pIn->basePitch != 0) && IsPow2(pIn->basePitch))); - } - - if (pIn->basePitch != 0) - { - pIn->width = Max(1u, pIn->basePitch >> pIn->mipLevel); - } - } - - // pow2Pad is done in PostComputeMipLevel - - return TRUE; -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlCheckLastMacroTiledLvl -* -* @brief -* Sets pOut->last2DLevel to TRUE if it is -* @note -* -*************************************************************************************************** -*/ -VOID SIAddrLib::HwlCheckLastMacroTiledLvl( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] Input structure - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [in/out] Output structure (used as input, too) - ) const -{ - // pow2Pad covers all mipmap cases - if (pIn->flags.pow2Pad) - { - ADDR_ASSERT(IsMacroTiled(pIn->tileMode)); - - UINT_32 nextPitch; - UINT_32 nextHeight; - UINT_32 nextSlices; - - AddrTileMode nextTileMode; - - if (pIn->mipLevel == 0 || pIn->basePitch == 0) - { - // Base level or fail-safe case (basePitch == 0) - nextPitch = pOut->pitch >> 1; - } - else - { - // Sub levels - nextPitch = pIn->basePitch >> (pIn->mipLevel + 1); - } - - // nextHeight must be shifted from this level's original height rather than a pow2 padded - // one but this requires original height stored somewhere (pOut->height) - ADDR_ASSERT(pOut->height != 0); - - // next level's height is just current level's >> 1 in pixels - nextHeight = pOut->height >> 1; - // Special format such as FMT_1 and FMT_32_32_32 can be linear only so we consider block - // compressed foramts - if (AddrElemLib::IsBlockCompressed(pIn->format)) - { - nextHeight = (nextHeight + 3) / 4; - } - nextHeight = NextPow2(nextHeight); - - // nextSlices may be 0 if this level's is 1 - if (pIn->flags.volume) - { - nextSlices = Max(1u, pIn->numSlices >> 1); - } - else - { - nextSlices = pIn->numSlices; - } - - nextTileMode = ComputeSurfaceMipLevelTileMode(pIn->tileMode, - pIn->bpp, - nextPitch, - nextHeight, - nextSlices, - pIn->numSamples, - pOut->pitchAlign, - pOut->heightAlign, - pOut->pTileInfo); - - pOut->last2DLevel = IsMicroTiled(nextTileMode); - } -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlDegradeThickTileMode -* -* @brief -* Degrades valid tile mode for thick modes if needed -* -* @return -* Suitable tile mode -*************************************************************************************************** -*/ -AddrTileMode SIAddrLib::HwlDegradeThickTileMode( - AddrTileMode baseTileMode, ///< [in] base tile mode - UINT_32 numSlices, ///< [in] current number of slices - UINT_32* pBytesPerTile ///< [in/out] pointer to bytes per slice - ) const -{ - return EgBasedAddrLib::HwlDegradeThickTileMode(baseTileMode, numSlices, pBytesPerTile); -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlTileInfoEqual -* -* @brief -* Return TRUE if all field are equal -* @note -* Only takes care of current HWL's data -*************************************************************************************************** -*/ -BOOL_32 SIAddrLib::HwlTileInfoEqual( - const ADDR_TILEINFO* pLeft, ///<[in] Left compare operand - const ADDR_TILEINFO* pRight ///<[in] Right compare operand - ) const -{ - BOOL_32 equal = FALSE; - - if (pLeft->pipeConfig == pRight->pipeConfig) - { - equal = EgBasedAddrLib::HwlTileInfoEqual(pLeft, pRight); - } - - return equal; -} - -/** -*************************************************************************************************** -* SIAddrLib::GetTileSettings -* -* @brief -* Get tile setting infos by index. -* @return -* Tile setting info. -*************************************************************************************************** -*/ -const ADDR_TILECONFIG* SIAddrLib::GetTileSetting( - UINT_32 index ///< [in] Tile index - ) const -{ - ADDR_ASSERT(index < m_noOfEntries); - return &m_tileTable[index]; -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlPostCheckTileIndex -* -* @brief -* Map a tile setting to index if curIndex is invalid, otherwise check if curIndex matches -* tile mode/type/info and change the index if needed -* @return -* Tile index. -*************************************************************************************************** -*/ -INT_32 SIAddrLib::HwlPostCheckTileIndex( - const ADDR_TILEINFO* pInfo, ///< [in] Tile Info - AddrTileMode mode, ///< [in] Tile mode - AddrTileType type, ///< [in] Tile type - INT curIndex ///< [in] Current index assigned in HwlSetupTileInfo - ) const -{ - INT_32 index = curIndex; - - if (mode == ADDR_TM_LINEAR_GENERAL) - { - index = TileIndexLinearGeneral; - } - else - { - BOOL_32 macroTiled = IsMacroTiled(mode); - - // We need to find a new index if either of them is true - // 1. curIndex is invalid - // 2. tile mode is changed - // 3. tile info does not match for macro tiled - if ((index == TileIndexInvalid || - (mode != m_tileTable[index].mode) || - (macroTiled && !HwlTileInfoEqual(pInfo, &m_tileTable[index].info)))) - { - for (index = 0; index < static_cast(m_noOfEntries); index++) - { - if (macroTiled) - { - // macro tile modes need all to match - if (HwlTileInfoEqual(pInfo, &m_tileTable[index].info) && - (mode == m_tileTable[index].mode) && - (type == m_tileTable[index].type)) - { - break; - } - } - else if (mode == ADDR_TM_LINEAR_ALIGNED) - { - // linear mode only needs tile mode to match - if (mode == m_tileTable[index].mode) - { - break; - } - } - else - { - // micro tile modes only need tile mode and tile type to match - if (mode == m_tileTable[index].mode && - type == m_tileTable[index].type) - { - break; - } - } - } - } - } - - ADDR_ASSERT(index < static_cast(m_noOfEntries)); - - if (index >= static_cast(m_noOfEntries)) - { - index = TileIndexInvalid; - } - - return index; -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlSetupTileCfg -* -* @brief -* Map tile index to tile setting. -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE SIAddrLib::HwlSetupTileCfg( - INT_32 index, ///< [in] Tile index - INT_32 macroModeIndex, ///< [in] Index in macro tile mode table(CI) - ADDR_TILEINFO* pInfo, ///< [out] Tile Info - AddrTileMode* pMode, ///< [out] Tile mode - AddrTileType* pType ///< [out] Tile type - ) const -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - // Global flag to control usage of tileIndex - if (UseTileIndex(index)) - { - if (index == TileIndexLinearGeneral) - { - if (pMode) - { - *pMode = ADDR_TM_LINEAR_GENERAL; - } - - if (pType) - { - *pType = ADDR_DISPLAYABLE; - } - - if (pInfo) - { - pInfo->banks = 2; - pInfo->bankWidth = 1; - pInfo->bankHeight = 1; - pInfo->macroAspectRatio = 1; - pInfo->tileSplitBytes = 64; - pInfo->pipeConfig = ADDR_PIPECFG_P2; - } - } - else if (static_cast(index) >= m_noOfEntries) - { - returnCode = ADDR_INVALIDPARAMS; - } - else - { - const ADDR_TILECONFIG* pCfgTable = GetTileSetting(index); - - if (pInfo) - { - *pInfo = pCfgTable->info; - } - else - { - if (IsMacroTiled(pCfgTable->mode)) - { - returnCode = ADDR_INVALIDPARAMS; - } - } - - if (pMode) - { - *pMode = pCfgTable->mode; - } - - if (pType) - { - *pType = pCfgTable->type; - } - } - } - - return returnCode; -} - -/** -*************************************************************************************************** -* SIAddrLib::ReadGbTileMode -* -* @brief -* Convert GB_TILE_MODE HW value to ADDR_TILE_CONFIG. -* @return -* NA. -*************************************************************************************************** -*/ -VOID SIAddrLib::ReadGbTileMode( - UINT_32 regValue, ///< [in] GB_TILE_MODE register - ADDR_TILECONFIG* pCfg ///< [out] output structure - ) const -{ - GB_TILE_MODE gbTileMode; - gbTileMode.val = regValue; - - pCfg->type = static_cast(gbTileMode.f.micro_tile_mode); - pCfg->info.bankHeight = 1 << gbTileMode.f.bank_height; - pCfg->info.bankWidth = 1 << gbTileMode.f.bank_width; - pCfg->info.banks = 1 << (gbTileMode.f.num_banks + 1); - pCfg->info.macroAspectRatio = 1 << gbTileMode.f.macro_tile_aspect; - pCfg->info.tileSplitBytes = 64 << gbTileMode.f.tile_split; - pCfg->info.pipeConfig = static_cast(gbTileMode.f.pipe_config + 1); - - UINT_32 regArrayMode = gbTileMode.f.array_mode; - - pCfg->mode = static_cast(regArrayMode); - - if (regArrayMode == 8) //ARRAY_2D_TILED_XTHICK - { - pCfg->mode = ADDR_TM_2D_TILED_XTHICK; - } - else if (regArrayMode >= 14) //ARRAY_3D_TILED_XTHICK - { - pCfg->mode = static_cast(pCfg->mode + 3); - } -} - -/** -*************************************************************************************************** -* SIAddrLib::InitTileSettingTable -* -* @brief -* Initialize the ADDR_TILE_CONFIG table. -* @return -* TRUE if tile table is correctly initialized -*************************************************************************************************** -*/ -BOOL_32 SIAddrLib::InitTileSettingTable( - const UINT_32* pCfg, ///< [in] Pointer to table of tile configs - UINT_32 noOfEntries ///< [in] Numbe of entries in the table above - ) -{ - BOOL_32 initOk = TRUE; - - ADDR_ASSERT(noOfEntries <= TileTableSize); - - memset(m_tileTable, 0, sizeof(m_tileTable)); - - if (noOfEntries != 0) - { - m_noOfEntries = noOfEntries; - } - else - { - m_noOfEntries = TileTableSize; - } - - if (pCfg) // From Client - { - for (UINT_32 i = 0; i < m_noOfEntries; i++) - { - ReadGbTileMode(*(pCfg + i), &m_tileTable[i]); - } - } - else - { - ADDR_ASSERT_ALWAYS(); - initOk = FALSE; - } - - if (initOk) - { - ADDR_ASSERT(m_tileTable[TILEINDEX_LINEAR_ALIGNED].mode == ADDR_TM_LINEAR_ALIGNED); - } - - return initOk; -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlGetTileIndex -* -* @brief -* Return the virtual/real index for given mode/type/info -* @return -* ADDR_OK if successful. -*************************************************************************************************** -*/ -ADDR_E_RETURNCODE SIAddrLib::HwlGetTileIndex( - const ADDR_GET_TILEINDEX_INPUT* pIn, - ADDR_GET_TILEINDEX_OUTPUT* pOut) const -{ - ADDR_E_RETURNCODE returnCode = ADDR_OK; - - pOut->index = HwlPostCheckTileIndex(pIn->pTileInfo, pIn->tileMode, pIn->tileType); - - return returnCode; -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlFmaskPreThunkSurfInfo -* -* @brief -* Some preparation before thunking a ComputeSurfaceInfo call for Fmask -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -VOID SIAddrLib::HwlFmaskPreThunkSurfInfo( - const ADDR_COMPUTE_FMASK_INFO_INPUT* pFmaskIn, ///< [in] Input of fmask info - const ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut, ///< [in] Output of fmask info - ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfIn, ///< [out] Input of thunked surface info - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut ///< [out] Output of thunked surface info - ) const -{ - pSurfIn->tileIndex = pFmaskIn->tileIndex; -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlFmaskPostThunkSurfInfo -* -* @brief -* Copy hwl extra field after calling thunked ComputeSurfaceInfo -* @return -* ADDR_E_RETURNCODE -*************************************************************************************************** -*/ -VOID SIAddrLib::HwlFmaskPostThunkSurfInfo( - const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut, ///< [in] Output of surface info - ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut ///< [out] Output of fmask info - ) const -{ - pFmaskOut->macroModeIndex = TileIndexInvalid; - pFmaskOut->tileIndex = pSurfOut->tileIndex; -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlComputeFmaskBits -* @brief -* Computes fmask bits -* @return -* Fmask bits -*************************************************************************************************** -*/ -UINT_32 SIAddrLib::HwlComputeFmaskBits( - const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, - UINT_32* pNumSamples - ) const -{ - UINT_32 numSamples = pIn->numSamples; - UINT_32 numFrags = GetNumFragments(numSamples, pIn->numFrags); - UINT_32 bpp; - - if (numFrags != numSamples) // EQAA - { - ADDR_ASSERT(numFrags <= 8); - - if (!pIn->resolved) - { - if (numFrags == 1) - { - bpp = 1; - numSamples = numSamples == 16 ? 16 : 8; - } - else if (numFrags == 2) - { - ADDR_ASSERT(numSamples >= 4); - - bpp = 2; - numSamples = numSamples; - } - else if (numFrags == 4) - { - ADDR_ASSERT(numSamples >= 4); - - bpp = 4; - numSamples = numSamples; - } - else // numFrags == 8 - { - ADDR_ASSERT(numSamples == 16); - - bpp = 4; - numSamples = numSamples; - } - } - else - { - if (numFrags == 1) - { - bpp = (numSamples == 16) ? 16 : 8; - numSamples = 1; - } - else if (numFrags == 2) - { - ADDR_ASSERT(numSamples >= 4); - - bpp = numSamples*2; - numSamples = 1; - } - else if (numFrags == 4) - { - ADDR_ASSERT(numSamples >= 4); - - bpp = numSamples*4; - numSamples = 1; - } - else // numFrags == 8 - { - ADDR_ASSERT(numSamples >= 16); - - bpp = 16*4; - numSamples = 1; - } - } - } - else // Normal AA - { - if (!pIn->resolved) - { - bpp = ComputeFmaskNumPlanesFromNumSamples(numSamples); - numSamples = numSamples == 2 ? 8 : numSamples; - } - else - { - // The same as 8XX - bpp = ComputeFmaskResolvedBppFromNumSamples(numSamples); - numSamples = 1; // 1x sample - } - } - - SafeAssign(pNumSamples, numSamples); - - return bpp; -} - -/** -*************************************************************************************************** -* SIAddrLib::HwlOverrideTileMode -* -* @brief -* Override tile modes (for PRT only, avoid client passes in an invalid PRT mode for SI. -* -* @return -* Suitable tile mode -* -*************************************************************************************************** -*/ -BOOL_32 SIAddrLib::HwlOverrideTileMode( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure - AddrTileMode* pTileMode, ///< [in/out] pointer to the tile mode - AddrTileType* pTileType ///< [in/out] pointer to the tile type - ) const -{ - BOOL_32 bOverrided = FALSE; - AddrTileMode tileMode = *pTileMode; - - switch (tileMode) - { - case ADDR_TM_PRT_TILED_THIN1: - tileMode = ADDR_TM_2D_TILED_THIN1; - break; - - case ADDR_TM_PRT_TILED_THICK: - tileMode = ADDR_TM_2D_TILED_THICK; - break; - - case ADDR_TM_PRT_2D_TILED_THICK: - tileMode = ADDR_TM_2D_TILED_THICK; - break; - - case ADDR_TM_PRT_3D_TILED_THICK: - tileMode = ADDR_TM_3D_TILED_THICK; - break; - - default: - break; - } - - if (tileMode != *pTileMode) - { - *pTileMode = tileMode; - bOverrided = TRUE; - ADDR_ASSERT(pIn->flags.prt == TRUE); - } - - return bOverrided; -} - diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/r800/siaddrlib.h mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/r800/siaddrlib.h --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/addrlib/r800/siaddrlib.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/addrlib/r800/siaddrlib.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,262 +0,0 @@ -/* - * Copyright © 2014 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ - -/** -*************************************************************************************************** -* @file siaddrlib.h -* @brief Contains the R800AddrLib class definition. -*************************************************************************************************** -*/ - -#ifndef __SI_ADDR_LIB_H__ -#define __SI_ADDR_LIB_H__ - -#include "addrlib.h" -#include "egbaddrlib.h" - -/** -*************************************************************************************************** -* @brief Describes the information in tile mode table -*************************************************************************************************** -*/ -struct ADDR_TILECONFIG -{ - AddrTileMode mode; - AddrTileType type; - ADDR_TILEINFO info; -}; - -/** -*************************************************************************************************** -* @brief SI specific settings structure. -*************************************************************************************************** -*/ -struct SIChipSettings -{ - struct - { - UINT_32 isSouthernIsland : 1; - UINT_32 isTahiti : 1; - UINT_32 isPitCairn : 1; - UINT_32 isCapeVerde : 1; - /// Oland/Hainan are of GFXIP 6.0, similar with SI - UINT_32 isOland : 1; - UINT_32 isHainan : 1; - }; -}; - -/** -*************************************************************************************************** -* @brief This class is the SI specific address library -* function set. -*************************************************************************************************** -*/ -class SIAddrLib : public EgBasedAddrLib -{ -public: - /// Creates SIAddrLib object - static AddrLib* CreateObj(const AddrClient* pClient) - { - return new(pClient) SIAddrLib(pClient); - } - -protected: - SIAddrLib(const AddrClient* pClient); - virtual ~SIAddrLib(); - - // Hwl interface - defined in AddrLib - virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; - - virtual ADDR_E_RETURNCODE HwlConvertTileInfoToHW( - const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, - ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const; - - virtual UINT_64 HwlComputeXmaskAddrFromCoord( - UINT_32 pitch, UINT_32 height, UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 numSlices, - UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8, - ADDR_TILEINFO* pTileInfo, UINT_32* pBitPosition) const; - - virtual VOID HwlComputeXmaskCoordFromAddr( - UINT_64 addr, UINT_32 bitPosition, UINT_32 pitch, UINT_32 height, UINT_32 numSlices, - UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8, - ADDR_TILEINFO* pTileInfo, UINT_32* pX, UINT_32* pY, UINT_32* pSlice) const; - - virtual ADDR_E_RETURNCODE HwlGetTileIndex( - const ADDR_GET_TILEINDEX_INPUT* pIn, - ADDR_GET_TILEINDEX_OUTPUT* pOut) const; - - virtual BOOL_32 HwlComputeMipLevel( - ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const; - - virtual AddrChipFamily HwlConvertChipFamily( - UINT_32 uChipFamily, UINT_32 uChipRevision); - - virtual BOOL_32 HwlInitGlobalParams( - const ADDR_CREATE_INPUT* pCreateIn); - - virtual ADDR_E_RETURNCODE HwlSetupTileCfg( - INT_32 index, INT_32 macroModeIndex, - ADDR_TILEINFO* pInfo, AddrTileMode* pMode = 0, AddrTileType* pType = 0) const; - - virtual VOID HwlComputeTileDataWidthAndHeightLinear( - UINT_32* pMacroWidth, UINT_32* pMacroHeight, - UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const; - - virtual UINT_64 HwlComputeHtileBytes( - UINT_32 pitch, UINT_32 height, UINT_32 bpp, - BOOL_32 isLinear, UINT_32 numSlices, UINT_64* pSliceBytes, UINT_32 baseAlign) const; - - virtual UINT_32 ComputePipeFromCoord( - UINT_32 x, UINT_32 y, UINT_32 slice, - AddrTileMode tileMode, UINT_32 pipeSwizzle, BOOL_32 ignoreSE, - ADDR_TILEINFO* pTileInfo) const; - - virtual UINT_32 HwlGetPipes(const ADDR_TILEINFO* pTileInfo) const; - - /// Pre-handler of 3x pitch (96 bit) adjustment - virtual UINT_32 HwlPreHandleBaseLvl3xPitch( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const; - /// Post-handler of 3x pitch adjustment - virtual UINT_32 HwlPostHandleBaseLvl3xPitch( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const; - - /// Dummy function to finalize the inheritance - virtual UINT_32 HwlComputeXmaskCoordYFrom8Pipe( - UINT_32 pipe, UINT_32 x) const; - - // Sub-hwl interface - defined in EgBasedAddrLib - virtual VOID HwlSetupTileInfo( - AddrTileMode tileMode, ADDR_SURFACE_FLAGS flags, - UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, - ADDR_TILEINFO* inputTileInfo, ADDR_TILEINFO* outputTileInfo, - AddrTileType inTileType, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; - - virtual UINT_32 HwlGetPitchAlignmentMicroTiled( - AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples) const; - - virtual UINT_64 HwlGetSizeAdjustmentMicroTiled( - UINT_32 thickness, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples, - UINT_32 baseAlign, UINT_32 pitchAlign, - UINT_32 *pPitch, UINT_32 *pHeight) const; - - virtual VOID HwlCheckLastMacroTiledLvl( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; - - virtual BOOL_32 HwlTileInfoEqual( - const ADDR_TILEINFO* pLeft, const ADDR_TILEINFO* pRight) const; - - virtual AddrTileMode HwlDegradeThickTileMode( - AddrTileMode baseTileMode, UINT_32 numSlices, UINT_32* pBytesPerTile) const; - - virtual BOOL_32 HwlOverrideTileMode( - const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, - AddrTileMode* pTileMode, - AddrTileType* pTileType) const; - - virtual BOOL_32 HwlSanityCheckMacroTiled( - ADDR_TILEINFO* pTileInfo) const - { - return TRUE; - } - - virtual UINT_32 HwlGetPitchAlignmentLinear(UINT_32 bpp, ADDR_SURFACE_FLAGS flags) const; - - virtual UINT_64 HwlGetSizeAdjustmentLinear( - AddrTileMode tileMode, - UINT_32 bpp, UINT_32 numSamples, UINT_32 baseAlign, UINT_32 pitchAlign, - UINT_32 *pPitch, UINT_32 *pHeight, UINT_32 *pHeightAlign) const; - - virtual VOID HwlComputeSurfaceCoord2DFromBankPipe( - AddrTileMode tileMode, UINT_32* pX, UINT_32* pY, UINT_32 slice, - UINT_32 bank, UINT_32 pipe, - UINT_32 bankSwizzle, UINT_32 pipeSwizzle, UINT_32 tileSlices, - BOOL_32 ignoreSE, - ADDR_TILEINFO* pTileInfo) const; - - virtual UINT_32 HwlPreAdjustBank( - UINT_32 tileX, UINT_32 bank, ADDR_TILEINFO* pTileInfo) const; - - virtual INT_32 HwlPostCheckTileIndex( - const ADDR_TILEINFO* pInfo, AddrTileMode mode, AddrTileType type, - INT curIndex = TileIndexInvalid) const; - - virtual VOID HwlFmaskPreThunkSurfInfo( - const ADDR_COMPUTE_FMASK_INFO_INPUT* pFmaskIn, - const ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut, - ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfIn, - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut) const; - - virtual VOID HwlFmaskPostThunkSurfInfo( - const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut, - ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut) const; - - virtual UINT_32 HwlComputeFmaskBits( - const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, - UINT_32* pNumSamples) const; - - virtual BOOL_32 HwlReduceBankWidthHeight( - UINT_32 tileSize, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples, - UINT_32 bankHeightAlign, UINT_32 pipes, - ADDR_TILEINFO* pTileInfo) const - { - return TRUE; - } - - // Protected non-virtual functions - VOID ComputeTileCoordFromPipeAndElemIdx( - UINT_32 elemIdx, UINT_32 pipe, AddrPipeCfg pipeCfg, UINT_32 pitchInMacroTile, - UINT_32 x, UINT_32 y, UINT_32* pX, UINT_32* pY) const; - - UINT_32 TileCoordToMaskElementIndex( - UINT_32 tx, UINT_32 ty, AddrPipeCfg pipeConfig, - UINT_32 *macroShift, UINT_32 *elemIdxBits) const; - - BOOL_32 DecodeGbRegs( - const ADDR_REGISTER_VALUE* pRegValue); - - const ADDR_TILECONFIG* GetTileSetting( - UINT_32 index) const; - - static const UINT_32 TileTableSize = 32; - ADDR_TILECONFIG m_tileTable[TileTableSize]; - UINT_32 m_noOfEntries; - -private: - - UINT_32 GetPipePerSurf(AddrPipeCfg pipeConfig) const; - - VOID ReadGbTileMode( - UINT_32 regValue, ADDR_TILECONFIG* pCfg) const; - BOOL_32 InitTileSettingTable( - const UINT_32 *pSetting, UINT_32 noOfEntries); - - SIChipSettings m_settings; -}; - -#endif - diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c mesa-17.0.7/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c 2017-06-01 10:37:10.000000000 +0000 @@ -38,13 +38,19 @@ #include #include +static struct pb_buffer * +amdgpu_bo_create(struct radeon_winsys *rws, + uint64_t size, + unsigned alignment, + enum radeon_bo_domain domain, + enum radeon_bo_flag flags); + static bool amdgpu_bo_wait(struct pb_buffer *_buf, uint64_t timeout, enum radeon_bo_usage usage) { struct amdgpu_winsys_bo *bo = amdgpu_winsys_bo(_buf); struct amdgpu_winsys *ws = bo->ws; int64_t abs_timeout; - int i; if (timeout == 0) { if (p_atomic_read(&bo->num_active_ioctls)) @@ -74,49 +80,57 @@ } if (timeout == 0) { + unsigned idle_fences; + bool buffer_idle; + pipe_mutex_lock(ws->bo_fence_lock); - for (i = 0; i < RING_LAST; i++) - if (bo->fence[i]) { - if (amdgpu_fence_wait(bo->fence[i], 0, false)) { - /* Release the idle fence to avoid checking it again later. */ - amdgpu_fence_reference(&bo->fence[i], NULL); - } else { - pipe_mutex_unlock(ws->bo_fence_lock); - return false; - } - } + + for (idle_fences = 0; idle_fences < bo->num_fences; ++idle_fences) { + if (!amdgpu_fence_wait(bo->fences[idle_fences], 0, false)) + break; + } + + /* Release the idle fences to avoid checking them again later. */ + for (unsigned i = 0; i < idle_fences; ++i) + amdgpu_fence_reference(&bo->fences[i], NULL); + + memmove(&bo->fences[0], &bo->fences[idle_fences], + (bo->num_fences - idle_fences) * sizeof(*bo->fences)); + bo->num_fences -= idle_fences; + + buffer_idle = !bo->num_fences; pipe_mutex_unlock(ws->bo_fence_lock); - return true; + return buffer_idle; } else { - struct pipe_fence_handle *fence[RING_LAST] = {}; - bool fence_idle[RING_LAST] = {}; bool buffer_idle = true; - /* Take references to all fences, so that we can wait for them - * without the lock. */ pipe_mutex_lock(ws->bo_fence_lock); - for (i = 0; i < RING_LAST; i++) - amdgpu_fence_reference(&fence[i], bo->fence[i]); - pipe_mutex_unlock(ws->bo_fence_lock); - - /* Now wait for the fences. */ - for (i = 0; i < RING_LAST; i++) { - if (fence[i]) { - if (amdgpu_fence_wait(fence[i], abs_timeout, true)) - fence_idle[i] = true; - else - buffer_idle = false; + while (bo->num_fences && buffer_idle) { + struct pipe_fence_handle *fence = NULL; + bool fence_idle = false; + + amdgpu_fence_reference(&fence, bo->fences[0]); + + /* Wait for the fence. */ + pipe_mutex_unlock(ws->bo_fence_lock); + if (amdgpu_fence_wait(fence, abs_timeout, true)) + fence_idle = true; + else + buffer_idle = false; + pipe_mutex_lock(ws->bo_fence_lock); + + /* Release an idle fence to avoid checking it again later, keeping in + * mind that the fence array may have been modified by other threads. + */ + if (fence_idle && bo->num_fences && bo->fences[0] == fence) { + amdgpu_fence_reference(&bo->fences[0], NULL); + memmove(&bo->fences[0], &bo->fences[1], + (bo->num_fences - 1) * sizeof(*bo->fences)); + bo->num_fences--; } - } - /* Release idle fences to avoid checking them again later. */ - pipe_mutex_lock(ws->bo_fence_lock); - for (i = 0; i < RING_LAST; i++) { - if (fence[i] == bo->fence[i] && fence_idle[i]) - amdgpu_fence_reference(&bo->fence[i], NULL); - - amdgpu_fence_reference(&fence[i], NULL); + amdgpu_fence_reference(&fence, NULL); } pipe_mutex_unlock(ws->bo_fence_lock); @@ -130,27 +144,45 @@ return ((struct amdgpu_winsys_bo*)buf)->initial_domain; } +static void amdgpu_bo_remove_fences(struct amdgpu_winsys_bo *bo) +{ + for (unsigned i = 0; i < bo->num_fences; ++i) + amdgpu_fence_reference(&bo->fences[i], NULL); + + FREE(bo->fences); + bo->num_fences = 0; + bo->max_fences = 0; +} + void amdgpu_bo_destroy(struct pb_buffer *_buf) { struct amdgpu_winsys_bo *bo = amdgpu_winsys_bo(_buf); - int i; + + assert(bo->bo && "must not be called for slab entries"); pipe_mutex_lock(bo->ws->global_bo_list_lock); - LIST_DEL(&bo->global_list_item); + LIST_DEL(&bo->u.real.global_list_item); bo->ws->num_buffers--; pipe_mutex_unlock(bo->ws->global_bo_list_lock); amdgpu_bo_va_op(bo->bo, 0, bo->base.size, bo->va, 0, AMDGPU_VA_OP_UNMAP); - amdgpu_va_range_free(bo->va_handle); + amdgpu_va_range_free(bo->u.real.va_handle); amdgpu_bo_free(bo->bo); - for (i = 0; i < RING_LAST; i++) - amdgpu_fence_reference(&bo->fence[i], NULL); + amdgpu_bo_remove_fences(bo); if (bo->initial_domain & RADEON_DOMAIN_VRAM) bo->ws->allocated_vram -= align64(bo->base.size, bo->ws->info.gart_page_size); else if (bo->initial_domain & RADEON_DOMAIN_GTT) bo->ws->allocated_gtt -= align64(bo->base.size, bo->ws->info.gart_page_size); + + if (bo->u.real.map_count >= 1) { + if (bo->initial_domain & RADEON_DOMAIN_VRAM) + bo->ws->mapped_vram -= bo->base.size; + else if (bo->initial_domain & RADEON_DOMAIN_GTT) + bo->ws->mapped_gtt -= bo->base.size; + } + FREE(bo); } @@ -158,8 +190,10 @@ { struct amdgpu_winsys_bo *bo = amdgpu_winsys_bo(_buf); - if (bo->use_reusable_pool) - pb_cache_add_buffer(&bo->cache_entry); + assert(bo->bo); /* slab buffers have a separate vtbl */ + + if (bo->u.real.use_reusable_pool) + pb_cache_add_buffer(&bo->u.real.cache_entry); else amdgpu_bo_destroy(_buf); } @@ -169,9 +203,11 @@ enum pipe_transfer_usage usage) { struct amdgpu_winsys_bo *bo = (struct amdgpu_winsys_bo*)buf; + struct amdgpu_winsys_bo *real; struct amdgpu_cs *cs = (struct amdgpu_cs*)rcs; int r; void *cpu = NULL; + uint64_t offset = 0; /* If it's not unsynchronized bo_map, flush CS if needed and then wait. */ if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) { @@ -217,14 +253,17 @@ * (neither one is changing it). * * Only check whether the buffer is being used for write. */ - if (cs && amdgpu_bo_is_referenced_by_cs_with_usage(cs, bo, - RADEON_USAGE_WRITE)) { - cs->flush_cs(cs->flush_data, 0, NULL); - } else { - /* Try to avoid busy-waiting in amdgpu_bo_wait. */ - if (p_atomic_read(&bo->num_active_ioctls)) - amdgpu_cs_sync_flush(rcs); + if (cs) { + if (amdgpu_bo_is_referenced_by_cs_with_usage(cs, bo, + RADEON_USAGE_WRITE)) { + cs->flush_cs(cs->flush_data, 0, NULL); + } else { + /* Try to avoid busy-waiting in amdgpu_bo_wait. */ + if (p_atomic_read(&bo->num_active_ioctls)) + amdgpu_cs_sync_flush(rcs); + } } + amdgpu_bo_wait((struct pb_buffer*)bo, PIPE_TIMEOUT_INFINITE, RADEON_USAGE_WRITE); } else { @@ -249,22 +288,51 @@ /* If the buffer is created from user memory, return the user pointer. */ if (bo->user_ptr) - return bo->user_ptr; + return bo->user_ptr; - r = amdgpu_bo_cpu_map(bo->bo, &cpu); + if (bo->bo) { + real = bo; + } else { + real = bo->u.slab.real; + offset = bo->va - real->va; + } + + r = amdgpu_bo_cpu_map(real->bo, &cpu); if (r) { /* Clear the cache and try again. */ - pb_cache_release_all_buffers(&bo->ws->bo_cache); - r = amdgpu_bo_cpu_map(bo->bo, &cpu); + pb_cache_release_all_buffers(&real->ws->bo_cache); + r = amdgpu_bo_cpu_map(real->bo, &cpu); + if (r) + return NULL; + } + + if (p_atomic_inc_return(&real->u.real.map_count) == 1) { + if (real->initial_domain & RADEON_DOMAIN_VRAM) + real->ws->mapped_vram += real->base.size; + else if (real->initial_domain & RADEON_DOMAIN_GTT) + real->ws->mapped_gtt += real->base.size; } - return r ? NULL : cpu; + return (uint8_t*)cpu + offset; } static void amdgpu_bo_unmap(struct pb_buffer *buf) { struct amdgpu_winsys_bo *bo = (struct amdgpu_winsys_bo*)buf; + struct amdgpu_winsys_bo *real; + + if (bo->user_ptr) + return; + + real = bo->bo ? bo : bo->u.slab.real; + + if (p_atomic_dec_zero(&real->u.real.map_count)) { + if (real->initial_domain & RADEON_DOMAIN_VRAM) + real->ws->mapped_vram -= real->base.size; + else if (real->initial_domain & RADEON_DOMAIN_GTT) + real->ws->mapped_gtt -= real->base.size; + } - amdgpu_bo_cpu_unmap(bo->bo); + amdgpu_bo_cpu_unmap(real->bo); } static const struct pb_vtbl amdgpu_winsys_bo_vtbl = { @@ -276,8 +344,10 @@ { struct amdgpu_winsys *ws = bo->ws; + assert(bo->bo); + pipe_mutex_lock(ws->global_bo_list_lock); - LIST_ADDTAIL(&bo->global_list_item, &ws->global_bo_list); + LIST_ADDTAIL(&bo->u.real.global_list_item, &ws->global_bo_list); ws->num_buffers++; pipe_mutex_unlock(ws->global_bo_list_lock); } @@ -287,13 +357,15 @@ unsigned alignment, unsigned usage, enum radeon_bo_domain initial_domain, - unsigned flags) + unsigned flags, + unsigned pb_cache_bucket) { struct amdgpu_bo_alloc_request request = {0}; amdgpu_bo_handle buf_handle; uint64_t va = 0; struct amdgpu_winsys_bo *bo; amdgpu_va_handle va_handle; + unsigned va_gap_size; int r; assert(initial_domain & RADEON_DOMAIN_VRAM_GTT); @@ -302,7 +374,8 @@ return NULL; } - pb_cache_init_entry(&ws->bo_cache, &bo->cache_entry, &bo->base); + pb_cache_init_entry(&ws->bo_cache, &bo->u.real.cache_entry, &bo->base, + pb_cache_bucket); request.alloc_size = size; request.phys_alignment = alignment; @@ -327,8 +400,9 @@ goto error_bo_alloc; } + va_gap_size = ws->check_vm ? MAX2(4 * alignment, 64 * 1024) : 0; r = amdgpu_va_range_alloc(ws->dev, amdgpu_gpu_va_range_general, - size, alignment, 0, &va, &va_handle, 0); + size + va_gap_size, alignment, 0, &va, &va_handle, 0); if (r) goto error_va_alloc; @@ -344,7 +418,7 @@ bo->ws = ws; bo->bo = buf_handle; bo->va = va; - bo->va_handle = va_handle; + bo->u.real.va_handle = va_handle; bo->initial_domain = initial_domain; bo->unique_id = __sync_fetch_and_add(&ws->next_bo_unique_id, 1); @@ -379,6 +453,116 @@ return amdgpu_bo_wait(_buf, 0, RADEON_USAGE_READWRITE); } +bool amdgpu_bo_can_reclaim_slab(void *priv, struct pb_slab_entry *entry) +{ + struct amdgpu_winsys_bo *bo = NULL; /* fix container_of */ + bo = container_of(entry, bo, u.slab.entry); + + return amdgpu_bo_can_reclaim(&bo->base); +} + +static void amdgpu_bo_slab_destroy(struct pb_buffer *_buf) +{ + struct amdgpu_winsys_bo *bo = amdgpu_winsys_bo(_buf); + + assert(!bo->bo); + + pb_slab_free(&bo->ws->bo_slabs, &bo->u.slab.entry); +} + +static const struct pb_vtbl amdgpu_winsys_bo_slab_vtbl = { + amdgpu_bo_slab_destroy + /* other functions are never called */ +}; + +struct pb_slab *amdgpu_bo_slab_alloc(void *priv, unsigned heap, + unsigned entry_size, + unsigned group_index) +{ + struct amdgpu_winsys *ws = priv; + struct amdgpu_slab *slab = CALLOC_STRUCT(amdgpu_slab); + enum radeon_bo_domain domains; + enum radeon_bo_flag flags = 0; + uint32_t base_id; + + if (!slab) + return NULL; + + if (heap & 1) + flags |= RADEON_FLAG_GTT_WC; + if (heap & 2) + flags |= RADEON_FLAG_CPU_ACCESS; + + switch (heap >> 2) { + case 0: + domains = RADEON_DOMAIN_VRAM; + break; + default: + case 1: + domains = RADEON_DOMAIN_VRAM_GTT; + break; + case 2: + domains = RADEON_DOMAIN_GTT; + break; + } + + slab->buffer = amdgpu_winsys_bo(amdgpu_bo_create(&ws->base, + 64 * 1024, 64 * 1024, + domains, flags)); + if (!slab->buffer) + goto fail; + + assert(slab->buffer->bo); + + slab->base.num_entries = slab->buffer->base.size / entry_size; + slab->base.num_free = slab->base.num_entries; + slab->entries = CALLOC(slab->base.num_entries, sizeof(*slab->entries)); + if (!slab->entries) + goto fail_buffer; + + LIST_INITHEAD(&slab->base.free); + + base_id = __sync_fetch_and_add(&ws->next_bo_unique_id, slab->base.num_entries); + + for (unsigned i = 0; i < slab->base.num_entries; ++i) { + struct amdgpu_winsys_bo *bo = &slab->entries[i]; + + bo->base.alignment = entry_size; + bo->base.usage = slab->buffer->base.usage; + bo->base.size = entry_size; + bo->base.vtbl = &amdgpu_winsys_bo_slab_vtbl; + bo->ws = ws; + bo->va = slab->buffer->va + i * entry_size; + bo->initial_domain = domains; + bo->unique_id = base_id + i; + bo->u.slab.entry.slab = &slab->base; + bo->u.slab.entry.group_index = group_index; + bo->u.slab.real = slab->buffer; + + LIST_ADDTAIL(&bo->u.slab.entry.head, &slab->base.free); + } + + return &slab->base; + +fail_buffer: + amdgpu_winsys_bo_reference(&slab->buffer, NULL); +fail: + FREE(slab); + return NULL; +} + +void amdgpu_bo_slab_free(void *priv, struct pb_slab *pslab) +{ + struct amdgpu_slab *slab = amdgpu_slab(pslab); + + for (unsigned i = 0; i < slab->base.num_entries; ++i) + amdgpu_bo_remove_fences(&slab->entries[i]); + + FREE(slab->entries); + amdgpu_winsys_bo_reference(&slab->buffer, NULL); + FREE(slab); +} + static unsigned eg_tile_split(unsigned tile_split) { switch (tile_split) { @@ -416,6 +600,8 @@ uint32_t tiling_flags; int r; + assert(bo->bo && "must not be called for slab entries"); + r = amdgpu_bo_query_info(bo->bo, &info); if (r) return; @@ -449,6 +635,8 @@ struct amdgpu_bo_metadata metadata = {0}; uint32_t tiling_flags = 0; + assert(bo->bo && "must not be called for slab entries"); + if (md->macrotile == RADEON_LAYOUT_TILED) tiling_flags |= AMDGPU_TILING_SET(ARRAY_MODE, 4); /* 2D_TILED_THIN1 */ else if (md->microtile == RADEON_LAYOUT_TILED) @@ -485,7 +673,57 @@ { struct amdgpu_winsys *ws = amdgpu_winsys(rws); struct amdgpu_winsys_bo *bo; - unsigned usage = 0; + unsigned usage = 0, pb_cache_bucket; + + /* Sub-allocate small buffers from slabs. */ + if (!(flags & RADEON_FLAG_HANDLE) && + size <= (1 << AMDGPU_SLAB_MAX_SIZE_LOG2) && + alignment <= MAX2(1 << AMDGPU_SLAB_MIN_SIZE_LOG2, util_next_power_of_two(size))) { + struct pb_slab_entry *entry; + unsigned heap = 0; + + if (flags & RADEON_FLAG_GTT_WC) + heap |= 1; + if (flags & RADEON_FLAG_CPU_ACCESS) + heap |= 2; + if (flags & ~(RADEON_FLAG_GTT_WC | RADEON_FLAG_CPU_ACCESS)) + goto no_slab; + + switch (domain) { + case RADEON_DOMAIN_VRAM: + heap |= 0 * 4; + break; + case RADEON_DOMAIN_VRAM_GTT: + heap |= 1 * 4; + break; + case RADEON_DOMAIN_GTT: + heap |= 2 * 4; + break; + default: + goto no_slab; + } + + entry = pb_slab_alloc(&ws->bo_slabs, size, heap); + if (!entry) { + /* Clear the cache and try again. */ + pb_cache_release_all_buffers(&ws->bo_cache); + + entry = pb_slab_alloc(&ws->bo_slabs, size, heap); + } + if (!entry) + return NULL; + + bo = NULL; + bo = container_of(entry, bo, u.slab.entry); + + pipe_reference_init(&bo->base.reference, 1); + + return &bo->base; + } +no_slab: + + /* This flag is irrelevant for the cache. */ + flags &= ~RADEON_FLAG_HANDLE; /* Align size to page size. This is the minimum alignment for normal * BOs. Aligning this here helps the cached bufmgr. Especially small BOs, @@ -504,23 +742,35 @@ assert(flags < sizeof(usage) * 8 - 3); usage |= 1 << (flags + 3); + /* Determine the pb_cache bucket for minimizing pb_cache misses. */ + pb_cache_bucket = 0; + if (domain & RADEON_DOMAIN_VRAM) /* VRAM or VRAM+GTT */ + pb_cache_bucket += 1; + if (flags == RADEON_FLAG_GTT_WC) /* WC */ + pb_cache_bucket += 2; + assert(pb_cache_bucket < ARRAY_SIZE(ws->bo_cache.buckets)); + /* Get a buffer from the cache. */ bo = (struct amdgpu_winsys_bo*) - pb_cache_reclaim_buffer(&ws->bo_cache, size, alignment, usage); + pb_cache_reclaim_buffer(&ws->bo_cache, size, alignment, usage, + pb_cache_bucket); if (bo) return &bo->base; /* Create a new one. */ - bo = amdgpu_create_bo(ws, size, alignment, usage, domain, flags); + bo = amdgpu_create_bo(ws, size, alignment, usage, domain, flags, + pb_cache_bucket); if (!bo) { /* Clear the cache and try again. */ + pb_slabs_reclaim(&ws->bo_slabs); pb_cache_release_all_buffers(&ws->bo_cache); - bo = amdgpu_create_bo(ws, size, alignment, usage, domain, flags); + bo = amdgpu_create_bo(ws, size, alignment, usage, domain, flags, + pb_cache_bucket); if (!bo) return NULL; } - bo->use_reusable_pool = true; + bo->u.real.use_reusable_pool = true; return &bo->base; } @@ -587,7 +837,7 @@ bo->base.vtbl = &amdgpu_winsys_bo_vtbl; bo->ws = ws; bo->va = va; - bo->va_handle = va_handle; + bo->u.real.va_handle = va_handle; bo->initial_domain = initial; bo->unique_id = __sync_fetch_and_add(&ws->next_bo_unique_id, 1); bo->is_shared = true; @@ -617,16 +867,21 @@ return NULL; } -static boolean amdgpu_bo_get_handle(struct pb_buffer *buffer, - unsigned stride, unsigned offset, - unsigned slice_size, - struct winsys_handle *whandle) +static bool amdgpu_bo_get_handle(struct pb_buffer *buffer, + unsigned stride, unsigned offset, + unsigned slice_size, + struct winsys_handle *whandle) { struct amdgpu_winsys_bo *bo = amdgpu_winsys_bo(buffer); enum amdgpu_bo_handle_type type; int r; - bo->use_reusable_pool = false; + if (!bo->bo) { + offset += bo->va - bo->u.slab.real->va; + bo = bo->u.slab.real; + } + + bo->u.real.use_reusable_pool = false; switch (whandle->type) { case DRM_API_HANDLE_TYPE_SHARED: @@ -639,18 +894,18 @@ type = amdgpu_bo_handle_type_kms; break; default: - return FALSE; + return false; } r = amdgpu_bo_export(bo->bo, type, &whandle->handle); if (r) - return FALSE; + return false; whandle->stride = stride; whandle->offset = offset; whandle->offset += slice_size * whandle->layer; bo->is_shared = true; - return TRUE; + return true; } static struct pb_buffer *amdgpu_bo_from_ptr(struct radeon_winsys *rws, @@ -685,7 +940,7 @@ bo->ws = ws; bo->user_ptr = pointer; bo->va = va; - bo->va_handle = va_handle; + bo->u.real.va_handle = va_handle; bo->initial_domain = RADEON_DOMAIN_GTT; bo->unique_id = __sync_fetch_and_add(&ws->next_bo_unique_id, 1); diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/amdgpu_bo.h mesa-17.0.7/src/gallium/winsys/amdgpu/drm/amdgpu_bo.h --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/amdgpu_bo.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/amdgpu_bo.h 2017-06-01 10:37:10.000000000 +0000 @@ -34,21 +34,34 @@ #define AMDGPU_BO_H #include "amdgpu_winsys.h" -#include "pipebuffer/pb_bufmgr.h" + +#include "pipebuffer/pb_slab.h" struct amdgpu_winsys_bo { struct pb_buffer base; - struct pb_cache_entry cache_entry; + union { + struct { + struct pb_cache_entry cache_entry; + + amdgpu_va_handle va_handle; + int map_count; + bool use_reusable_pool; + + struct list_head global_list_item; + } real; + struct { + struct pb_slab_entry entry; + struct amdgpu_winsys_bo *real; + } slab; + } u; struct amdgpu_winsys *ws; void *user_ptr; /* from buffer_from_ptr */ - amdgpu_bo_handle bo; + amdgpu_bo_handle bo; /* NULL for slab entries */ uint32_t unique_id; - amdgpu_va_handle va_handle; uint64_t va; enum radeon_bo_domain initial_domain; - bool use_reusable_pool; /* how many command streams is this bo referenced in? */ int num_cs_references; @@ -63,15 +76,27 @@ volatile int is_shared; /* bool (int for atomicity) */ /* Fences for buffer synchronization. */ - struct pipe_fence_handle *fence[RING_LAST]; + unsigned num_fences; + unsigned max_fences; + struct pipe_fence_handle **fences; +}; - struct list_head global_list_item; +struct amdgpu_slab { + struct pb_slab base; + struct amdgpu_winsys_bo *buffer; + struct amdgpu_winsys_bo *entries; }; bool amdgpu_bo_can_reclaim(struct pb_buffer *_buf); void amdgpu_bo_destroy(struct pb_buffer *_buf); void amdgpu_bo_init_functions(struct amdgpu_winsys *ws); +bool amdgpu_bo_can_reclaim_slab(void *priv, struct pb_slab_entry *entry); +struct pb_slab *amdgpu_bo_slab_alloc(void *priv, unsigned heap, + unsigned entry_size, + unsigned group_index); +void amdgpu_bo_slab_free(void *priv, struct pb_slab *slab); + static inline struct amdgpu_winsys_bo *amdgpu_winsys_bo(struct pb_buffer *bo) { @@ -79,6 +104,12 @@ } static inline +struct amdgpu_slab *amdgpu_slab(struct pb_slab *slab) +{ + return (struct amdgpu_slab *)slab; +} + +static inline void amdgpu_winsys_bo_reference(struct amdgpu_winsys_bo **dst, struct amdgpu_winsys_bo *src) { diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c mesa-17.0.7/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c 2017-06-01 10:37:10.000000000 +0000 @@ -35,6 +35,9 @@ #include #include +#include "amd/common/sid.h" + +DEBUG_GET_ONCE_BOOL_OPTION(noop, "RADEON_NOOP", false) /* FENCES */ @@ -117,7 +120,7 @@ &expired); if (r) { fprintf(stderr, "amdgpu: amdgpu_cs_query_fence_status failed.\n"); - return FALSE; + return false; } if (expired) { @@ -136,6 +139,31 @@ return amdgpu_fence_wait(fence, timeout, false); } +static struct pipe_fence_handle * +amdgpu_cs_get_next_fence(struct radeon_winsys_cs *rcs) +{ + struct amdgpu_cs *cs = amdgpu_cs(rcs); + struct pipe_fence_handle *fence = NULL; + + if (debug_get_option_noop()) + return NULL; + + if (cs->next_fence) { + amdgpu_fence_reference(&fence, cs->next_fence); + return fence; + } + + fence = amdgpu_fence_create(cs->ctx, + cs->csc->request.ip_type, + cs->csc->request.ip_instance, + cs->csc->request.ring); + if (!fence) + return NULL; + + amdgpu_fence_reference(&cs->next_fence, fence); + return fence; +} + /* CONTEXTS */ static struct radeon_winsys_ctx *amdgpu_ctx_create(struct radeon_winsys *ws) @@ -220,68 +248,366 @@ /* COMMAND SUBMISSION */ -static bool amdgpu_get_new_ib(struct radeon_winsys *ws, struct amdgpu_ib *ib, - struct amdgpu_cs_ib_info *info, unsigned ib_type) +static bool amdgpu_cs_has_user_fence(struct amdgpu_cs_context *cs) +{ + return cs->request.ip_type != AMDGPU_HW_IP_UVD && + cs->request.ip_type != AMDGPU_HW_IP_VCE; +} + +static bool amdgpu_cs_has_chaining(struct amdgpu_cs *cs) +{ + return cs->ctx->ws->info.chip_class >= CIK && + cs->ring_type == RING_GFX; +} + +static unsigned amdgpu_cs_epilog_dws(enum ring_type ring_type) +{ + if (ring_type == RING_GFX) + return 4; /* for chaining */ + + return 0; +} + +int amdgpu_lookup_buffer(struct amdgpu_cs_context *cs, struct amdgpu_winsys_bo *bo) +{ + unsigned hash = bo->unique_id & (ARRAY_SIZE(cs->buffer_indices_hashlist)-1); + int i = cs->buffer_indices_hashlist[hash]; + struct amdgpu_cs_buffer *buffers; + int num_buffers; + + if (bo->bo) { + buffers = cs->real_buffers; + num_buffers = cs->num_real_buffers; + } else { + buffers = cs->slab_buffers; + num_buffers = cs->num_slab_buffers; + } + + /* not found or found */ + if (i < 0 || (i < num_buffers && buffers[i].bo == bo)) + return i; + + /* Hash collision, look for the BO in the list of buffers linearly. */ + for (i = num_buffers - 1; i >= 0; i--) { + if (buffers[i].bo == bo) { + /* Put this buffer in the hash list. + * This will prevent additional hash collisions if there are + * several consecutive lookup_buffer calls for the same buffer. + * + * Example: Assuming buffers A,B,C collide in the hash list, + * the following sequence of buffers: + * AAAAAAAAAAABBBBBBBBBBBBBBCCCCCCCC + * will collide here: ^ and here: ^, + * meaning that we should get very few collisions in the end. */ + cs->buffer_indices_hashlist[hash] = i; + return i; + } + } + return -1; +} + +static int +amdgpu_lookup_or_add_real_buffer(struct amdgpu_cs *acs, struct amdgpu_winsys_bo *bo) +{ + struct amdgpu_cs_context *cs = acs->csc; + struct amdgpu_cs_buffer *buffer; + unsigned hash; + int idx = amdgpu_lookup_buffer(cs, bo); + + if (idx >= 0) + return idx; + + /* New buffer, check if the backing array is large enough. */ + if (cs->num_real_buffers >= cs->max_real_buffers) { + unsigned new_max = + MAX2(cs->max_real_buffers + 16, (unsigned)(cs->max_real_buffers * 1.3)); + struct amdgpu_cs_buffer *new_buffers; + amdgpu_bo_handle *new_handles; + uint8_t *new_flags; + + new_buffers = MALLOC(new_max * sizeof(*new_buffers)); + new_handles = MALLOC(new_max * sizeof(*new_handles)); + new_flags = MALLOC(new_max * sizeof(*new_flags)); + + if (!new_buffers || !new_handles || !new_flags) { + fprintf(stderr, "amdgpu_lookup_or_add_buffer: allocation failed\n"); + FREE(new_buffers); + FREE(new_handles); + FREE(new_flags); + return -1; + } + + memcpy(new_buffers, cs->real_buffers, cs->num_real_buffers * sizeof(*new_buffers)); + memcpy(new_handles, cs->handles, cs->num_real_buffers * sizeof(*new_handles)); + memcpy(new_flags, cs->flags, cs->num_real_buffers * sizeof(*new_flags)); + + FREE(cs->real_buffers); + FREE(cs->handles); + FREE(cs->flags); + + cs->max_real_buffers = new_max; + cs->real_buffers = new_buffers; + cs->handles = new_handles; + cs->flags = new_flags; + } + + idx = cs->num_real_buffers; + buffer = &cs->real_buffers[idx]; + + memset(buffer, 0, sizeof(*buffer)); + amdgpu_winsys_bo_reference(&buffer->bo, bo); + cs->handles[idx] = bo->bo; + cs->flags[idx] = 0; + p_atomic_inc(&bo->num_cs_references); + cs->num_real_buffers++; + + hash = bo->unique_id & (ARRAY_SIZE(cs->buffer_indices_hashlist)-1); + cs->buffer_indices_hashlist[hash] = idx; + + if (bo->initial_domain & RADEON_DOMAIN_VRAM) + acs->main.base.used_vram += bo->base.size; + else if (bo->initial_domain & RADEON_DOMAIN_GTT) + acs->main.base.used_gart += bo->base.size; + + return idx; +} + +static int amdgpu_lookup_or_add_slab_buffer(struct amdgpu_cs *acs, + struct amdgpu_winsys_bo *bo) +{ + struct amdgpu_cs_context *cs = acs->csc; + struct amdgpu_cs_buffer *buffer; + unsigned hash; + int idx = amdgpu_lookup_buffer(cs, bo); + int real_idx; + + if (idx >= 0) + return idx; + + real_idx = amdgpu_lookup_or_add_real_buffer(acs, bo->u.slab.real); + if (real_idx < 0) + return -1; + + /* New buffer, check if the backing array is large enough. */ + if (cs->num_slab_buffers >= cs->max_slab_buffers) { + unsigned new_max = + MAX2(cs->max_slab_buffers + 16, (unsigned)(cs->max_slab_buffers * 1.3)); + struct amdgpu_cs_buffer *new_buffers; + + new_buffers = REALLOC(cs->slab_buffers, + cs->max_slab_buffers * sizeof(*new_buffers), + new_max * sizeof(*new_buffers)); + if (!new_buffers) { + fprintf(stderr, "amdgpu_lookup_or_add_slab_buffer: allocation failed\n"); + return -1; + } + + cs->max_slab_buffers = new_max; + cs->slab_buffers = new_buffers; + } + + idx = cs->num_slab_buffers; + buffer = &cs->slab_buffers[idx]; + + memset(buffer, 0, sizeof(*buffer)); + amdgpu_winsys_bo_reference(&buffer->bo, bo); + buffer->u.slab.real_idx = real_idx; + p_atomic_inc(&bo->num_cs_references); + cs->num_slab_buffers++; + + hash = bo->unique_id & (ARRAY_SIZE(cs->buffer_indices_hashlist)-1); + cs->buffer_indices_hashlist[hash] = idx; + + return idx; +} + +static unsigned amdgpu_cs_add_buffer(struct radeon_winsys_cs *rcs, + struct pb_buffer *buf, + enum radeon_bo_usage usage, + enum radeon_bo_domain domains, + enum radeon_bo_priority priority) +{ + /* Don't use the "domains" parameter. Amdgpu doesn't support changing + * the buffer placement during command submission. + */ + struct amdgpu_cs *acs = amdgpu_cs(rcs); + struct amdgpu_cs_context *cs = acs->csc; + struct amdgpu_winsys_bo *bo = (struct amdgpu_winsys_bo*)buf; + struct amdgpu_cs_buffer *buffer; + int index; + + if (!bo->bo) { + index = amdgpu_lookup_or_add_slab_buffer(acs, bo); + if (index < 0) + return 0; + + buffer = &cs->slab_buffers[index]; + buffer->usage |= usage; + + usage &= ~RADEON_USAGE_SYNCHRONIZED; + index = buffer->u.slab.real_idx; + } else { + index = amdgpu_lookup_or_add_real_buffer(acs, bo); + if (index < 0) + return 0; + } + + buffer = &cs->real_buffers[index]; + buffer->u.real.priority_usage |= 1llu << priority; + buffer->usage |= usage; + cs->flags[index] = MAX2(cs->flags[index], priority / 4); + return index; +} + +static bool amdgpu_ib_new_buffer(struct amdgpu_winsys *ws, struct amdgpu_ib *ib) +{ + struct pb_buffer *pb; + uint8_t *mapped; + unsigned buffer_size; + + /* Always create a buffer that is at least as large as the maximum seen IB + * size, aligned to a power of two (and multiplied by 4 to reduce internal + * fragmentation if chaining is not available). Limit to 512k dwords, which + * is the largest power of two that fits into the size field of the + * INDIRECT_BUFFER packet. + */ + if (amdgpu_cs_has_chaining(amdgpu_cs_from_ib(ib))) + buffer_size = 4 *util_next_power_of_two(ib->max_ib_size); + else + buffer_size = 4 *util_next_power_of_two(4 * ib->max_ib_size); + + buffer_size = MIN2(buffer_size, 4 * 512 * 1024); + + switch (ib->ib_type) { + case IB_CONST_PREAMBLE: + buffer_size = MAX2(buffer_size, 4 * 1024); + break; + case IB_CONST: + buffer_size = MAX2(buffer_size, 16 * 1024 * 4); + break; + case IB_MAIN: + buffer_size = MAX2(buffer_size, 8 * 1024 * 4); + break; + default: + unreachable("unhandled IB type"); + } + + pb = ws->base.buffer_create(&ws->base, buffer_size, + ws->info.gart_page_size, + RADEON_DOMAIN_GTT, + RADEON_FLAG_CPU_ACCESS); + if (!pb) + return false; + + mapped = ws->base.buffer_map(pb, NULL, PIPE_TRANSFER_WRITE); + if (!mapped) { + pb_reference(&pb, NULL); + return false; + } + + pb_reference(&ib->big_ib_buffer, pb); + pb_reference(&pb, NULL); + + ib->ib_mapped = mapped; + ib->used_ib_space = 0; + + return true; +} + +static unsigned amdgpu_ib_max_submit_dwords(enum ib_type ib_type) +{ + switch (ib_type) { + case IB_MAIN: + /* Smaller submits means the GPU gets busy sooner and there is less + * waiting for buffers and fences. Proof: + * http://www.phoronix.com/scan.php?page=article&item=mesa-111-si&num=1 + */ + return 20 * 1024; + case IB_CONST_PREAMBLE: + case IB_CONST: + /* There isn't really any reason to limit CE IB size beyond the natural + * limit implied by the main IB, except perhaps GTT size. Just return + * an extremely large value that we never get anywhere close to. + */ + return 16 * 1024 * 1024; + default: + unreachable("bad ib_type"); + } +} + +static bool amdgpu_get_new_ib(struct radeon_winsys *ws, struct amdgpu_cs *cs, + enum ib_type ib_type) { struct amdgpu_winsys *aws = (struct amdgpu_winsys*)ws; /* Small IBs are better than big IBs, because the GPU goes idle quicker * and there is less waiting for buffers and fences. Proof: * http://www.phoronix.com/scan.php?page=article&item=mesa-111-si&num=1 */ - unsigned buffer_size, ib_size; + struct amdgpu_ib *ib = NULL; + struct amdgpu_cs_ib_info *info = &cs->csc->ib[ib_type]; + unsigned ib_size = 0; switch (ib_type) { case IB_CONST_PREAMBLE: - buffer_size = 4 * 1024 * 4; - ib_size = 1024 * 4; + ib = &cs->const_preamble_ib; + ib_size = 256 * 4; break; case IB_CONST: - buffer_size = 512 * 1024 * 4; - ib_size = 128 * 1024 * 4; + ib = &cs->const_ib; + ib_size = 8 * 1024 * 4; break; case IB_MAIN: - buffer_size = 128 * 1024 * 4; - ib_size = 20 * 1024 * 4; + ib = &cs->main; + ib_size = 4 * 1024 * 4; break; default: unreachable("unhandled IB type"); } - ib->base.cdw = 0; - ib->base.buf = NULL; + if (!amdgpu_cs_has_chaining(cs)) { + ib_size = MAX2(ib_size, + 4 * MIN2(util_next_power_of_two(ib->max_ib_size), + amdgpu_ib_max_submit_dwords(ib_type))); + } + + ib->max_ib_size = ib->max_ib_size - ib->max_ib_size / 32; + + ib->base.prev_dw = 0; + ib->base.num_prev = 0; + ib->base.current.cdw = 0; + ib->base.current.buf = NULL; /* Allocate a new buffer for IBs if the current buffer is all used. */ if (!ib->big_ib_buffer || ib->used_ib_space + ib_size > ib->big_ib_buffer->size) { - - pb_reference(&ib->big_ib_buffer, NULL); - ib->ib_mapped = NULL; - ib->used_ib_space = 0; - - ib->big_ib_buffer = ws->buffer_create(ws, buffer_size, - aws->info.gart_page_size, - RADEON_DOMAIN_GTT, - RADEON_FLAG_CPU_ACCESS); - if (!ib->big_ib_buffer) - return false; - - ib->ib_mapped = ws->buffer_map(ib->big_ib_buffer, NULL, - PIPE_TRANSFER_WRITE); - if (!ib->ib_mapped) { - pb_reference(&ib->big_ib_buffer, NULL); + if (!amdgpu_ib_new_buffer(aws, ib)) return false; - } } info->ib_mc_address = amdgpu_winsys_bo(ib->big_ib_buffer)->va + ib->used_ib_space; - ib->base.buf = (uint32_t*)(ib->ib_mapped + ib->used_ib_space); - ib->base.max_dw = ib_size / 4; + info->size = 0; + ib->ptr_ib_size = &info->size; + + amdgpu_cs_add_buffer(&cs->main.base, ib->big_ib_buffer, + RADEON_USAGE_READ, 0, RADEON_PRIO_IB1); + + ib->base.current.buf = (uint32_t*)(ib->ib_mapped + ib->used_ib_space); + + ib_size = ib->big_ib_buffer->size - ib->used_ib_space; + ib->base.current.max_dw = ib_size / 4 - amdgpu_cs_epilog_dws(cs->ring_type); return true; } -static boolean amdgpu_init_cs_context(struct amdgpu_cs_context *cs, - enum ring_type ring_type) +static void amdgpu_ib_finalize(struct amdgpu_ib *ib) +{ + *ib->ptr_ib_size |= ib->base.current.cdw; + ib->used_ib_space += ib->base.current.cdw * 4; + ib->max_ib_size = MAX2(ib->max_ib_size, ib->base.prev_dw + ib->base.current.cdw); +} + +static bool amdgpu_init_cs_context(struct amdgpu_cs_context *cs, + enum ring_type ring_type) { int i; @@ -308,26 +634,6 @@ break; } - cs->max_num_buffers = 512; - cs->buffers = (struct amdgpu_cs_buffer*) - CALLOC(1, cs->max_num_buffers * sizeof(struct amdgpu_cs_buffer)); - if (!cs->buffers) { - return FALSE; - } - - cs->handles = CALLOC(1, cs->max_num_buffers * sizeof(amdgpu_bo_handle)); - if (!cs->handles) { - FREE(cs->buffers); - return FALSE; - } - - cs->flags = CALLOC(1, cs->max_num_buffers); - if (!cs->flags) { - FREE(cs->handles); - FREE(cs->buffers); - return FALSE; - } - for (i = 0; i < ARRAY_SIZE(cs->buffer_indices_hashlist); i++) { cs->buffer_indices_hashlist[i] = -1; } @@ -339,23 +645,24 @@ cs->ib[IB_CONST_PREAMBLE].flags = AMDGPU_IB_FLAG_CE | AMDGPU_IB_FLAG_PREAMBLE; - return TRUE; + return true; } static void amdgpu_cs_context_cleanup(struct amdgpu_cs_context *cs) { unsigned i; - for (i = 0; i < cs->num_buffers; i++) { - p_atomic_dec(&cs->buffers[i].bo->num_cs_references); - amdgpu_winsys_bo_reference(&cs->buffers[i].bo, NULL); - cs->handles[i] = NULL; - cs->flags[i] = 0; + for (i = 0; i < cs->num_real_buffers; i++) { + p_atomic_dec(&cs->real_buffers[i].bo->num_cs_references); + amdgpu_winsys_bo_reference(&cs->real_buffers[i].bo, NULL); + } + for (i = 0; i < cs->num_slab_buffers; i++) { + p_atomic_dec(&cs->slab_buffers[i].bo->num_cs_references); + amdgpu_winsys_bo_reference(&cs->slab_buffers[i].bo, NULL); } - cs->num_buffers = 0; - cs->used_gart = 0; - cs->used_vram = 0; + cs->num_real_buffers = 0; + cs->num_slab_buffers = 0; amdgpu_fence_reference(&cs->fence, NULL); for (i = 0; i < ARRAY_SIZE(cs->buffer_indices_hashlist); i++) { @@ -367,8 +674,9 @@ { amdgpu_cs_context_cleanup(cs); FREE(cs->flags); - FREE(cs->buffers); + FREE(cs->real_buffers); FREE(cs->handles); + FREE(cs->slab_buffers); FREE(cs->request.dependencies); } @@ -388,13 +696,17 @@ return NULL; } - pipe_semaphore_init(&cs->flush_completed, 1); + util_queue_fence_init(&cs->flush_completed); cs->ctx = ctx; cs->flush_cs = flush; cs->flush_data = flush_ctx; cs->ring_type = ring_type; + cs->main.ib_type = IB_MAIN; + cs->const_ib.ib_type = IB_CONST; + cs->const_preamble_ib.ib_type = IB_CONST_PREAMBLE; + if (!amdgpu_init_cs_context(&cs->csc1, ring_type)) { FREE(cs); return NULL; @@ -410,8 +722,7 @@ cs->csc = &cs->csc1; cs->cst = &cs->csc2; - if (!amdgpu_get_new_ib(&ctx->ws->base, &cs->main, &cs->csc->ib[IB_MAIN], - IB_MAIN)) { + if (!amdgpu_get_new_ib(&ctx->ws->base, cs, IB_MAIN)) { amdgpu_destroy_cs_context(&cs->csc2); amdgpu_destroy_cs_context(&cs->csc1); FREE(cs); @@ -432,8 +743,7 @@ if (cs->ring_type != RING_GFX || cs->const_ib.ib_mapped) return NULL; - if (!amdgpu_get_new_ib(&ws->base, &cs->const_ib, &cs->csc->ib[IB_CONST], - IB_CONST)) + if (!amdgpu_get_new_ib(&ws->base, cs, IB_CONST)) return NULL; cs->csc->request.number_of_ibs = 2; @@ -457,8 +767,7 @@ cs->const_preamble_ib.ib_mapped) return NULL; - if (!amdgpu_get_new_ib(&ws->base, &cs->const_preamble_ib, - &cs->csc->ib[IB_CONST_PREAMBLE], IB_CONST_PREAMBLE)) + if (!amdgpu_get_new_ib(&ws->base, cs, IB_CONST_PREAMBLE)) return NULL; cs->csc->request.number_of_ibs = 3; @@ -470,152 +779,90 @@ return &cs->const_preamble_ib.base; } -#define OUT_CS(cs, value) (cs)->buf[(cs)->cdw++] = (value) - -int amdgpu_lookup_buffer(struct amdgpu_cs_context *cs, struct amdgpu_winsys_bo *bo) +static bool amdgpu_cs_validate(struct radeon_winsys_cs *rcs) { - unsigned hash = bo->unique_id & (ARRAY_SIZE(cs->buffer_indices_hashlist)-1); - int i = cs->buffer_indices_hashlist[hash]; - - /* not found or found */ - if (i == -1 || cs->buffers[i].bo == bo) - return i; - - /* Hash collision, look for the BO in the list of buffers linearly. */ - for (i = cs->num_buffers - 1; i >= 0; i--) { - if (cs->buffers[i].bo == bo) { - /* Put this buffer in the hash list. - * This will prevent additional hash collisions if there are - * several consecutive lookup_buffer calls for the same buffer. - * - * Example: Assuming buffers A,B,C collide in the hash list, - * the following sequence of buffers: - * AAAAAAAAAAABBBBBBBBBBBBBBCCCCCCCC - * will collide here: ^ and here: ^, - * meaning that we should get very few collisions in the end. */ - cs->buffer_indices_hashlist[hash] = i; - return i; - } - } - return -1; + return true; } -static unsigned amdgpu_add_buffer(struct amdgpu_cs *acs, - struct amdgpu_winsys_bo *bo, - enum radeon_bo_usage usage, - enum radeon_bo_domain domains, - unsigned priority, - enum radeon_bo_domain *added_domains) +static bool amdgpu_cs_check_space(struct radeon_winsys_cs *rcs, unsigned dw) { - struct amdgpu_cs_context *cs = acs->csc; - struct amdgpu_cs_buffer *buffer; - unsigned hash = bo->unique_id & (ARRAY_SIZE(cs->buffer_indices_hashlist)-1); - int i = -1; + struct amdgpu_ib *ib = amdgpu_ib(rcs); + struct amdgpu_cs *cs = amdgpu_cs_from_ib(ib); + unsigned requested_size = rcs->prev_dw + rcs->current.cdw + dw; + uint64_t va; + uint32_t *new_ptr_ib_size; - assert(priority < 64); - *added_domains = 0; + assert(rcs->current.cdw <= rcs->current.max_dw); - i = amdgpu_lookup_buffer(cs, bo); + if (requested_size > amdgpu_ib_max_submit_dwords(ib->ib_type)) + return false; - if (i >= 0) { - buffer = &cs->buffers[i]; - buffer->priority_usage |= 1llu << priority; - buffer->usage |= usage; - *added_domains = domains & ~buffer->domains; - buffer->domains |= domains; - cs->flags[i] = MAX2(cs->flags[i], priority / 4); - return i; - } + ib->max_ib_size = MAX2(ib->max_ib_size, requested_size); - /* New buffer, check if the backing array is large enough. */ - if (cs->num_buffers >= cs->max_num_buffers) { - uint32_t size; - cs->max_num_buffers += 10; + if (rcs->current.max_dw - rcs->current.cdw >= dw) + return true; - size = cs->max_num_buffers * sizeof(struct amdgpu_cs_buffer); - cs->buffers = realloc(cs->buffers, size); + if (!amdgpu_cs_has_chaining(cs)) + return false; - size = cs->max_num_buffers * sizeof(amdgpu_bo_handle); - cs->handles = realloc(cs->handles, size); + /* Allocate a new chunk */ + if (rcs->num_prev >= rcs->max_prev) { + unsigned new_max_prev = MAX2(1, 2 * rcs->max_prev); + struct radeon_winsys_cs_chunk *new_prev; + + new_prev = REALLOC(rcs->prev, + sizeof(*new_prev) * rcs->max_prev, + sizeof(*new_prev) * new_max_prev); + if (!new_prev) + return false; - cs->flags = realloc(cs->flags, cs->max_num_buffers); + rcs->prev = new_prev; + rcs->max_prev = new_max_prev; } - /* Initialize the new buffer. */ - cs->buffers[cs->num_buffers].bo = NULL; - amdgpu_winsys_bo_reference(&cs->buffers[cs->num_buffers].bo, bo); - cs->handles[cs->num_buffers] = bo->bo; - cs->flags[cs->num_buffers] = priority / 4; - p_atomic_inc(&bo->num_cs_references); - buffer = &cs->buffers[cs->num_buffers]; - buffer->bo = bo; - buffer->priority_usage = 1llu << priority; - buffer->usage = usage; - buffer->domains = domains; - - cs->buffer_indices_hashlist[hash] = cs->num_buffers; - - *added_domains = domains; - return cs->num_buffers++; -} - -static unsigned amdgpu_cs_add_buffer(struct radeon_winsys_cs *rcs, - struct pb_buffer *buf, - enum radeon_bo_usage usage, - enum radeon_bo_domain domains, - enum radeon_bo_priority priority) -{ - /* Don't use the "domains" parameter. Amdgpu doesn't support changing - * the buffer placement during command submission. - */ - struct amdgpu_cs *cs = amdgpu_cs(rcs); - struct amdgpu_winsys_bo *bo = (struct amdgpu_winsys_bo*)buf; - enum radeon_bo_domain added_domains; - unsigned index = amdgpu_add_buffer(cs, bo, usage, bo->initial_domain, - priority, &added_domains); - - if (added_domains & RADEON_DOMAIN_VRAM) - cs->csc->used_vram += bo->base.size; - else if (added_domains & RADEON_DOMAIN_GTT) - cs->csc->used_gart += bo->base.size; - - return index; -} - -static int amdgpu_cs_lookup_buffer(struct radeon_winsys_cs *rcs, - struct pb_buffer *buf) -{ - struct amdgpu_cs *cs = amdgpu_cs(rcs); - - return amdgpu_lookup_buffer(cs->csc, (struct amdgpu_winsys_bo*)buf); -} - -static boolean amdgpu_cs_validate(struct radeon_winsys_cs *rcs) -{ - return TRUE; -} + if (!amdgpu_ib_new_buffer(cs->ctx->ws, ib)) + return false; -static boolean amdgpu_cs_memory_below_limit(struct radeon_winsys_cs *rcs, uint64_t vram, uint64_t gtt) -{ - struct amdgpu_cs *cs = amdgpu_cs(rcs); - struct amdgpu_winsys *ws = cs->ctx->ws; + assert(ib->used_ib_space == 0); + va = amdgpu_winsys_bo(ib->big_ib_buffer)->va; - vram += cs->csc->used_vram; - gtt += cs->csc->used_gart; + /* This space was originally reserved. */ + rcs->current.max_dw += 4; + assert(ib->used_ib_space + 4 * rcs->current.max_dw <= ib->big_ib_buffer->size); + + /* Pad with NOPs and add INDIRECT_BUFFER packet */ + while ((rcs->current.cdw & 7) != 4) + radeon_emit(rcs, 0xffff1000); /* type3 nop packet */ + + radeon_emit(rcs, PKT3(ib->ib_type == IB_MAIN ? PKT3_INDIRECT_BUFFER_CIK + : PKT3_INDIRECT_BUFFER_CONST, 2, 0)); + radeon_emit(rcs, va); + radeon_emit(rcs, va >> 32); + new_ptr_ib_size = &rcs->current.buf[rcs->current.cdw]; + radeon_emit(rcs, S_3F2_CHAIN(1) | S_3F2_VALID(1)); + + assert((rcs->current.cdw & 7) == 0); + assert(rcs->current.cdw <= rcs->current.max_dw); + + *ib->ptr_ib_size |= rcs->current.cdw; + ib->ptr_ib_size = new_ptr_ib_size; + + /* Hook up the new chunk */ + rcs->prev[rcs->num_prev].buf = rcs->current.buf; + rcs->prev[rcs->num_prev].cdw = rcs->current.cdw; + rcs->prev[rcs->num_prev].max_dw = rcs->current.cdw; /* no modifications */ + rcs->num_prev++; - /* Anything that goes above the VRAM size should go to GTT. */ - if (vram > ws->info.vram_size) - gtt += vram - ws->info.vram_size; + ib->base.prev_dw += ib->base.current.cdw; + ib->base.current.cdw = 0; - /* Now we just need to check if we have enough GTT. */ - return gtt < ws->info.gart_size * 0.7; -} + ib->base.current.buf = (uint32_t*)(ib->ib_mapped + ib->used_ib_space); + ib->base.current.max_dw = ib->big_ib_buffer->size / 4 - amdgpu_cs_epilog_dws(cs->ring_type); -static uint64_t amdgpu_cs_query_memory_usage(struct radeon_winsys_cs *rcs) -{ - struct amdgpu_cs_context *cs = amdgpu_cs(rcs)->csc; + amdgpu_cs_add_buffer(&cs->main.base, ib->big_ib_buffer, + RADEON_USAGE_READ, 0, RADEON_PRIO_IB1); - return cs->used_vram + cs->used_gart; + return true; } static unsigned amdgpu_cs_get_buffer_list(struct radeon_winsys_cs *rcs, @@ -625,16 +872,66 @@ int i; if (list) { - for (i = 0; i < cs->num_buffers; i++) { - pb_reference(&list[i].buf, &cs->buffers[i].bo->base); - list[i].vm_address = cs->buffers[i].bo->va; - list[i].priority_usage = cs->buffers[i].priority_usage; + for (i = 0; i < cs->num_real_buffers; i++) { + list[i].bo_size = cs->real_buffers[i].bo->base.size; + list[i].vm_address = cs->real_buffers[i].bo->va; + list[i].priority_usage = cs->real_buffers[i].u.real.priority_usage; } } - return cs->num_buffers; + return cs->num_real_buffers; } -DEBUG_GET_ONCE_BOOL_OPTION(all_bos, "RADEON_ALL_BOS", FALSE) +DEBUG_GET_ONCE_BOOL_OPTION(all_bos, "RADEON_ALL_BOS", false) + +static void amdgpu_add_fence_dependency(struct amdgpu_cs *acs, + struct amdgpu_cs_buffer *buffer) +{ + struct amdgpu_cs_context *cs = acs->csc; + struct amdgpu_winsys_bo *bo = buffer->bo; + struct amdgpu_cs_fence *dep; + unsigned new_num_fences = 0; + + for (unsigned j = 0; j < bo->num_fences; ++j) { + struct amdgpu_fence *bo_fence = (void *)bo->fences[j]; + unsigned idx; + + if (bo_fence->ctx == acs->ctx && + bo_fence->fence.ip_type == cs->request.ip_type && + bo_fence->fence.ip_instance == cs->request.ip_instance && + bo_fence->fence.ring == cs->request.ring) + continue; + + if (amdgpu_fence_wait((void *)bo_fence, 0, false)) + continue; + + amdgpu_fence_reference(&bo->fences[new_num_fences], bo->fences[j]); + new_num_fences++; + + if (!(buffer->usage & RADEON_USAGE_SYNCHRONIZED)) + continue; + + if (bo_fence->submission_in_progress) + os_wait_until_zero(&bo_fence->submission_in_progress, + PIPE_TIMEOUT_INFINITE); + + idx = cs->request.number_of_dependencies++; + if (idx >= cs->max_dependencies) { + unsigned size; + + cs->max_dependencies = idx + 8; + size = cs->max_dependencies * sizeof(struct amdgpu_cs_fence); + cs->request.dependencies = realloc(cs->request.dependencies, size); + } + + dep = &cs->request.dependencies[idx]; + memcpy(dep, &bo_fence->fence, sizeof(*dep)); + } + + for (unsigned j = new_num_fences; j < bo->num_fences; ++j) + amdgpu_fence_reference(&bo->fences[j], NULL); + + bo->num_fences = new_num_fences; +} /* Since the kernel driver doesn't synchronize execution between different * rings automatically, we have to add fence dependencies manually. @@ -642,56 +939,52 @@ static void amdgpu_add_fence_dependencies(struct amdgpu_cs *acs) { struct amdgpu_cs_context *cs = acs->csc; - int i, j; + int i; cs->request.number_of_dependencies = 0; - for (i = 0; i < cs->num_buffers; i++) { - for (j = 0; j < RING_LAST; j++) { - struct amdgpu_cs_fence *dep; - unsigned idx; - - struct amdgpu_fence *bo_fence = (void *)cs->buffers[i].bo->fence[j]; - if (!bo_fence) - continue; - - if (bo_fence->ctx == acs->ctx && - bo_fence->fence.ip_type == cs->request.ip_type && - bo_fence->fence.ip_instance == cs->request.ip_instance && - bo_fence->fence.ring == cs->request.ring) - continue; - - if (amdgpu_fence_wait((void *)bo_fence, 0, false)) - continue; - - if (bo_fence->submission_in_progress) - os_wait_until_zero(&bo_fence->submission_in_progress, - PIPE_TIMEOUT_INFINITE); - - idx = cs->request.number_of_dependencies++; - if (idx >= cs->max_dependencies) { - unsigned size; - - cs->max_dependencies = idx + 8; - size = cs->max_dependencies * sizeof(struct amdgpu_cs_fence); - cs->request.dependencies = realloc(cs->request.dependencies, size); - } + for (i = 0; i < cs->num_real_buffers; i++) + amdgpu_add_fence_dependency(acs, &cs->real_buffers[i]); + for (i = 0; i < cs->num_slab_buffers; i++) + amdgpu_add_fence_dependency(acs, &cs->slab_buffers[i]); +} + +static void amdgpu_add_fence(struct amdgpu_winsys_bo *bo, + struct pipe_fence_handle *fence) +{ + if (bo->num_fences >= bo->max_fences) { + unsigned new_max_fences = MAX2(1, bo->max_fences * 2); + struct pipe_fence_handle **new_fences = + REALLOC(bo->fences, + bo->num_fences * sizeof(*new_fences), + new_max_fences * sizeof(*new_fences)); + if (new_fences) { + bo->fences = new_fences; + bo->max_fences = new_max_fences; + } else { + fprintf(stderr, "amdgpu_add_fence: allocation failure, dropping fence\n"); + if (!bo->num_fences) + return; - dep = &cs->request.dependencies[idx]; - memcpy(dep, &bo_fence->fence, sizeof(*dep)); + bo->num_fences--; /* prefer to keep a more recent fence if possible */ + amdgpu_fence_reference(&bo->fences[bo->num_fences], NULL); } } + + bo->fences[bo->num_fences] = NULL; + amdgpu_fence_reference(&bo->fences[bo->num_fences], fence); + bo->num_fences++; } -void amdgpu_cs_submit_ib(struct amdgpu_cs *acs) +void amdgpu_cs_submit_ib(void *job, int thread_index) { + struct amdgpu_cs *acs = (struct amdgpu_cs*)job; struct amdgpu_winsys *ws = acs->ctx->ws; struct amdgpu_cs_context *cs = acs->cst; int i, r; cs->request.fence_info.handle = NULL; - if (cs->request.ip_type != AMDGPU_HW_IP_UVD && - cs->request.ip_type != AMDGPU_HW_IP_VCE) { + if (amdgpu_cs_has_user_fence(cs)) { cs->request.fence_info.handle = acs->ctx->user_fence_bo; cs->request.fence_info.offset = acs->ring_type; } @@ -710,10 +1003,11 @@ if (!handles) { pipe_mutex_unlock(ws->global_bo_list_lock); amdgpu_cs_context_cleanup(cs); + cs->error_code = -ENOMEM; return; } - LIST_FOR_EACH_ENTRY(bo, &ws->global_bo_list, global_list_item) { + LIST_FOR_EACH_ENTRY(bo, &ws->global_bo_list, u.real.global_list_item) { assert(num < ws->num_buffers); handles[num++] = bo->bo; } @@ -724,7 +1018,7 @@ free(handles); pipe_mutex_unlock(ws->global_bo_list_lock); } else { - r = amdgpu_bo_list_create(ws->dev, cs->num_buffers, + r = amdgpu_bo_list_create(ws->dev, cs->num_real_buffers, cs->handles, cs->flags, &cs->request.resources); } @@ -733,23 +1027,24 @@ fprintf(stderr, "amdgpu: buffer list creation failed (%d)\n", r); cs->request.resources = NULL; amdgpu_fence_signalled(cs->fence); + cs->error_code = r; goto cleanup; } r = amdgpu_cs_submit(acs->ctx->ctx, 0, &cs->request, 1); + cs->error_code = r; if (r) { if (r == -ENOMEM) fprintf(stderr, "amdgpu: Not enough memory for command submission.\n"); else fprintf(stderr, "amdgpu: The CS has been rejected, " - "see dmesg for more information.\n"); + "see dmesg for more information (%i).\n", r); amdgpu_fence_signalled(cs->fence); } else { /* Success. */ uint64_t *user_fence = NULL; - if (cs->request.ip_type != AMDGPU_HW_IP_UVD && - cs->request.ip_type != AMDGPU_HW_IP_VCE) + if (amdgpu_cs_has_user_fence(cs)) user_fence = acs->ctx->user_fence_cpu_address_base + cs->request.fence_info.offset; amdgpu_fence_submitted(cs->fence, &cs->request, user_fence); @@ -760,8 +1055,10 @@ amdgpu_bo_list_destroy(cs->request.resources); cleanup: - for (i = 0; i < cs->num_buffers; i++) - p_atomic_dec(&cs->buffers[i].bo->num_active_ioctls); + for (i = 0; i < cs->num_real_buffers; i++) + p_atomic_dec(&cs->real_buffers[i].bo->num_active_ioctls); + for (i = 0; i < cs->num_slab_buffers; i++) + p_atomic_dec(&cs->slab_buffers[i].bo->num_active_ioctls); amdgpu_cs_context_cleanup(cs); } @@ -772,132 +1069,150 @@ struct amdgpu_cs *cs = amdgpu_cs(rcs); /* Wait for any pending ioctl of this CS to complete. */ - if (cs->ctx->ws->thread) { - /* wait and set the semaphore to "busy" */ - pipe_semaphore_wait(&cs->flush_completed); - /* set the semaphore to "idle" */ - pipe_semaphore_signal(&cs->flush_completed); - } + util_queue_job_wait(&cs->flush_completed); } -DEBUG_GET_ONCE_BOOL_OPTION(noop, "RADEON_NOOP", FALSE) - -static void amdgpu_cs_flush(struct radeon_winsys_cs *rcs, - unsigned flags, - struct pipe_fence_handle **fence) +static int amdgpu_cs_flush(struct radeon_winsys_cs *rcs, + unsigned flags, + struct pipe_fence_handle **fence) { struct amdgpu_cs *cs = amdgpu_cs(rcs); struct amdgpu_winsys *ws = cs->ctx->ws; + int error_code = 0; + + rcs->current.max_dw += amdgpu_cs_epilog_dws(cs->ring_type); switch (cs->ring_type) { case RING_DMA: /* pad DMA ring to 8 DWs */ - while (rcs->cdw & 7) - OUT_CS(rcs, 0x00000000); /* NOP packet */ + if (ws->info.chip_class <= SI) { + while (rcs->current.cdw & 7) + radeon_emit(rcs, 0xf0000000); /* NOP packet */ + } else { + while (rcs->current.cdw & 7) + radeon_emit(rcs, 0x00000000); /* NOP packet */ + } break; case RING_GFX: /* pad GFX ring to 8 DWs to meet CP fetch alignment requirements */ - while (rcs->cdw & 7) - OUT_CS(rcs, 0xffff1000); /* type3 nop packet */ + if (ws->info.gfx_ib_pad_with_type2) { + while (rcs->current.cdw & 7) + radeon_emit(rcs, 0x80000000); /* type2 nop packet */ + } else { + while (rcs->current.cdw & 7) + radeon_emit(rcs, 0xffff1000); /* type3 nop packet */ + } /* Also pad the const IB. */ if (cs->const_ib.ib_mapped) - while (!cs->const_ib.base.cdw || (cs->const_ib.base.cdw & 7)) - OUT_CS(&cs->const_ib.base, 0xffff1000); /* type3 nop packet */ + while (!cs->const_ib.base.current.cdw || (cs->const_ib.base.current.cdw & 7)) + radeon_emit(&cs->const_ib.base, 0xffff1000); /* type3 nop packet */ if (cs->const_preamble_ib.ib_mapped) - while (!cs->const_preamble_ib.base.cdw || (cs->const_preamble_ib.base.cdw & 7)) - OUT_CS(&cs->const_preamble_ib.base, 0xffff1000); + while (!cs->const_preamble_ib.base.current.cdw || (cs->const_preamble_ib.base.current.cdw & 7)) + radeon_emit(&cs->const_preamble_ib.base, 0xffff1000); break; case RING_UVD: - while (rcs->cdw & 15) - OUT_CS(rcs, 0x80000000); /* type2 nop packet */ + while (rcs->current.cdw & 15) + radeon_emit(rcs, 0x80000000); /* type2 nop packet */ break; default: break; } - if (rcs->cdw > rcs->max_dw) { + if (rcs->current.cdw > rcs->current.max_dw) { fprintf(stderr, "amdgpu: command stream overflowed\n"); } - amdgpu_cs_add_buffer(rcs, cs->main.big_ib_buffer, - RADEON_USAGE_READ, 0, RADEON_PRIO_IB1); - - if (cs->const_ib.ib_mapped) - amdgpu_cs_add_buffer(rcs, cs->const_ib.big_ib_buffer, - RADEON_USAGE_READ, 0, RADEON_PRIO_IB1); - - if (cs->const_preamble_ib.ib_mapped) - amdgpu_cs_add_buffer(rcs, cs->const_preamble_ib.big_ib_buffer, - RADEON_USAGE_READ, 0, RADEON_PRIO_IB1); - /* If the CS is not empty or overflowed.... */ - if (cs->main.base.cdw && cs->main.base.cdw <= cs->main.base.max_dw && + if (radeon_emitted(&cs->main.base, 0) && + cs->main.base.current.cdw <= cs->main.base.current.max_dw && !debug_get_option_noop()) { struct amdgpu_cs_context *cur = cs->csc; - unsigned i, num_buffers = cur->num_buffers; + unsigned i, num_buffers; /* Set IB sizes. */ - cur->ib[IB_MAIN].size = cs->main.base.cdw; - cs->main.used_ib_space += cs->main.base.cdw * 4; + amdgpu_ib_finalize(&cs->main); - if (cs->const_ib.ib_mapped) { - cur->ib[IB_CONST].size = cs->const_ib.base.cdw; - cs->const_ib.used_ib_space += cs->const_ib.base.cdw * 4; - } + if (cs->const_ib.ib_mapped) + amdgpu_ib_finalize(&cs->const_ib); - if (cs->const_preamble_ib.ib_mapped) { - cur->ib[IB_CONST_PREAMBLE].size = cs->const_preamble_ib.base.cdw; - cs->const_preamble_ib.used_ib_space += cs->const_preamble_ib.base.cdw * 4; - } + if (cs->const_preamble_ib.ib_mapped) + amdgpu_ib_finalize(&cs->const_preamble_ib); /* Create a fence. */ amdgpu_fence_reference(&cur->fence, NULL); - cur->fence = amdgpu_fence_create(cs->ctx, - cur->request.ip_type, - cur->request.ip_instance, - cur->request.ring); + if (cs->next_fence) { + /* just move the reference */ + cur->fence = cs->next_fence; + cs->next_fence = NULL; + } else { + cur->fence = amdgpu_fence_create(cs->ctx, + cur->request.ip_type, + cur->request.ip_instance, + cur->request.ring); + } if (fence) amdgpu_fence_reference(fence, cur->fence); - /* Prepare buffers. */ + amdgpu_cs_sync_flush(rcs); + + /* Prepare buffers. + * + * This fence must be held until the submission is queued to ensure + * that the order of fence dependency updates matches the order of + * submissions. + */ pipe_mutex_lock(ws->bo_fence_lock); amdgpu_add_fence_dependencies(cs); + + num_buffers = cur->num_real_buffers; for (i = 0; i < num_buffers; i++) { - p_atomic_inc(&cur->buffers[i].bo->num_active_ioctls); - amdgpu_fence_reference(&cur->buffers[i].bo->fence[cs->ring_type], - cur->fence); + struct amdgpu_winsys_bo *bo = cur->real_buffers[i].bo; + p_atomic_inc(&bo->num_active_ioctls); + amdgpu_add_fence(bo, cur->fence); } - pipe_mutex_unlock(ws->bo_fence_lock); - amdgpu_cs_sync_flush(rcs); + num_buffers = cur->num_slab_buffers; + for (i = 0; i < num_buffers; i++) { + struct amdgpu_winsys_bo *bo = cur->slab_buffers[i].bo; + p_atomic_inc(&bo->num_active_ioctls); + amdgpu_add_fence(bo, cur->fence); + } /* Swap command streams. "cst" is going to be submitted. */ cs->csc = cs->cst; cs->cst = cur; /* Submit. */ - if (ws->thread && (flags & RADEON_FLUSH_ASYNC)) { - /* Set the semaphore to "busy". */ - pipe_semaphore_wait(&cs->flush_completed); - amdgpu_ws_queue_cs(ws, cs); - } else { - amdgpu_cs_submit_ib(cs); + util_queue_add_job(&ws->cs_queue, cs, &cs->flush_completed, + amdgpu_cs_submit_ib, NULL); + /* The submission has been queued, unlock the fence now. */ + pipe_mutex_unlock(ws->bo_fence_lock); + + if (!(flags & RADEON_FLUSH_ASYNC)) { + amdgpu_cs_sync_flush(rcs); + error_code = cur->error_code; } } else { amdgpu_cs_context_cleanup(cs->csc); } - amdgpu_get_new_ib(&ws->base, &cs->main, &cs->csc->ib[IB_MAIN], IB_MAIN); + amdgpu_get_new_ib(&ws->base, cs, IB_MAIN); if (cs->const_ib.ib_mapped) - amdgpu_get_new_ib(&ws->base, &cs->const_ib, &cs->csc->ib[IB_CONST], - IB_CONST); + amdgpu_get_new_ib(&ws->base, cs, IB_CONST); if (cs->const_preamble_ib.ib_mapped) - amdgpu_get_new_ib(&ws->base, &cs->const_preamble_ib, - &cs->csc->ib[IB_CONST_PREAMBLE], IB_CONST_PREAMBLE); + amdgpu_get_new_ib(&ws->base, cs, IB_CONST_PREAMBLE); + + cs->main.base.used_gart = 0; + cs->main.base.used_vram = 0; + + if (cs->ring_type == RING_GFX) + ws->num_gfx_IBs++; + else if (cs->ring_type == RING_DMA) + ws->num_sdma_IBs++; - ws->num_cs_flushes++; + return error_code; } static void amdgpu_cs_destroy(struct radeon_winsys_cs *rcs) @@ -905,19 +1220,23 @@ struct amdgpu_cs *cs = amdgpu_cs(rcs); amdgpu_cs_sync_flush(rcs); - pipe_semaphore_destroy(&cs->flush_completed); + util_queue_fence_destroy(&cs->flush_completed); p_atomic_dec(&cs->ctx->ws->num_cs); pb_reference(&cs->main.big_ib_buffer, NULL); + FREE(cs->main.base.prev); pb_reference(&cs->const_ib.big_ib_buffer, NULL); + FREE(cs->const_ib.base.prev); pb_reference(&cs->const_preamble_ib.big_ib_buffer, NULL); + FREE(cs->const_preamble_ib.base.prev); amdgpu_destroy_cs_context(&cs->csc1); amdgpu_destroy_cs_context(&cs->csc2); + amdgpu_fence_reference(&cs->next_fence, NULL); FREE(cs); } -static boolean amdgpu_bo_is_referenced(struct radeon_winsys_cs *rcs, - struct pb_buffer *_buf, - enum radeon_bo_usage usage) +static bool amdgpu_bo_is_referenced(struct radeon_winsys_cs *rcs, + struct pb_buffer *_buf, + enum radeon_bo_usage usage) { struct amdgpu_cs *cs = amdgpu_cs(rcs); struct amdgpu_winsys_bo *bo = (struct amdgpu_winsys_bo*)_buf; @@ -935,12 +1254,11 @@ ws->base.cs_add_const_preamble_ib = amdgpu_cs_add_const_preamble_ib; ws->base.cs_destroy = amdgpu_cs_destroy; ws->base.cs_add_buffer = amdgpu_cs_add_buffer; - ws->base.cs_lookup_buffer = amdgpu_cs_lookup_buffer; ws->base.cs_validate = amdgpu_cs_validate; - ws->base.cs_memory_below_limit = amdgpu_cs_memory_below_limit; - ws->base.cs_query_memory_usage = amdgpu_cs_query_memory_usage; + ws->base.cs_check_space = amdgpu_cs_check_space; ws->base.cs_get_buffer_list = amdgpu_cs_get_buffer_list; ws->base.cs_flush = amdgpu_cs_flush; + ws->base.cs_get_next_fence = amdgpu_cs_get_next_fence; ws->base.cs_is_buffer_referenced = amdgpu_bo_is_referenced; ws->base.cs_sync_flush = amdgpu_cs_sync_flush; ws->base.fence_wait = amdgpu_fence_wait_rel_timeout; diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h mesa-17.0.7/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h 2017-06-01 10:37:10.000000000 +0000 @@ -45,9 +45,22 @@ struct amdgpu_cs_buffer { struct amdgpu_winsys_bo *bo; - uint64_t priority_usage; + union { + struct { + uint64_t priority_usage; + } real; + struct { + uint32_t real_idx; /* index of underlying real BO */ + } slab; + } u; enum radeon_bo_usage usage; - enum radeon_bo_domain domains; +}; + +enum ib_type { + IB_CONST_PREAMBLE = 0, + IB_CONST = 1, /* the const IB must be first */ + IB_MAIN = 2, + IB_NUM }; struct amdgpu_ib { @@ -57,13 +70,9 @@ struct pb_buffer *big_ib_buffer; uint8_t *ib_mapped; unsigned used_ib_space; -}; - -enum { - IB_CONST_PREAMBLE = 0, - IB_CONST = 1, /* the const IB must be first */ - IB_MAIN = 2, - IB_NUM + unsigned max_ib_size; + uint32_t *ptr_ib_size; + enum ib_type ib_type; }; struct amdgpu_cs_context { @@ -71,20 +80,24 @@ struct amdgpu_cs_ib_info ib[IB_NUM]; /* Buffers. */ - unsigned max_num_buffers; - unsigned num_buffers; + unsigned max_real_buffers; + unsigned num_real_buffers; amdgpu_bo_handle *handles; uint8_t *flags; - struct amdgpu_cs_buffer *buffers; + struct amdgpu_cs_buffer *real_buffers; - int buffer_indices_hashlist[4096]; + unsigned num_slab_buffers; + unsigned max_slab_buffers; + struct amdgpu_cs_buffer *slab_buffers; - uint64_t used_vram; - uint64_t used_gart; + int buffer_indices_hashlist[4096]; unsigned max_dependencies; struct pipe_fence_handle *fence; + + /* the error returned from cs_flush for non-async submissions */ + int error_code; }; struct amdgpu_cs { @@ -108,7 +121,8 @@ void (*flush_cs)(void *ctx, unsigned flags, struct pipe_fence_handle **fence); void *flush_data; - pipe_semaphore flush_completed; + struct util_queue_fence flush_completed; + struct pipe_fence_handle *next_fence; }; struct amdgpu_fence { @@ -148,13 +162,38 @@ int amdgpu_lookup_buffer(struct amdgpu_cs_context *cs, struct amdgpu_winsys_bo *bo); +static inline struct amdgpu_ib * +amdgpu_ib(struct radeon_winsys_cs *base) +{ + return (struct amdgpu_ib *)base; +} + static inline struct amdgpu_cs * amdgpu_cs(struct radeon_winsys_cs *base) { + assert(amdgpu_ib(base)->ib_type == IB_MAIN); return (struct amdgpu_cs*)base; } -static inline boolean +#define get_container(member_ptr, container_type, container_member) \ + (container_type *)((char *)(member_ptr) - offsetof(container_type, container_member)) + +static inline struct amdgpu_cs * +amdgpu_cs_from_ib(struct amdgpu_ib *ib) +{ + switch (ib->ib_type) { + case IB_MAIN: + return get_container(ib, struct amdgpu_cs, main); + case IB_CONST: + return get_container(ib, struct amdgpu_cs, const_ib); + case IB_CONST_PREAMBLE: + return get_container(ib, struct amdgpu_cs, const_preamble_ib); + default: + unreachable("bad ib_type"); + } +} + +static inline bool amdgpu_bo_is_referenced_by_cs(struct amdgpu_cs *cs, struct amdgpu_winsys_bo *bo) { @@ -163,24 +202,28 @@ (num_refs && amdgpu_lookup_buffer(cs->csc, bo) != -1); } -static inline boolean +static inline bool amdgpu_bo_is_referenced_by_cs_with_usage(struct amdgpu_cs *cs, struct amdgpu_winsys_bo *bo, enum radeon_bo_usage usage) { int index; + struct amdgpu_cs_buffer *buffer; if (!bo->num_cs_references) - return FALSE; + return false; index = amdgpu_lookup_buffer(cs->csc, bo); if (index == -1) - return FALSE; + return false; + + buffer = bo->bo ? &cs->csc->real_buffers[index] + : &cs->csc->slab_buffers[index]; - return (cs->csc->buffers[index].usage & usage) != 0; + return (buffer->usage & usage) != 0; } -static inline boolean +static inline bool amdgpu_bo_is_referenced_by_any_cs(struct amdgpu_winsys_bo *bo) { return bo->num_cs_references != 0; @@ -190,6 +233,6 @@ bool absolute); void amdgpu_cs_sync_flush(struct radeon_winsys_cs *rcs); void amdgpu_cs_init_functions(struct amdgpu_winsys *ws); -void amdgpu_cs_submit_ib(struct amdgpu_cs *cs); +void amdgpu_cs_submit_ib(void *job, int thread_index); #endif diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/amdgpu_id.h mesa-17.0.7/src/gallium/winsys/amdgpu/drm/amdgpu_id.h --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/amdgpu_id.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/amdgpu_id.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,173 +0,0 @@ -/* - * Copyright © 2014 Advanced Micro Devices, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ - -/** - * This file is included by addrlib. It adds GPU family definitions and - * macros compatible with addrlib. - */ - -#ifndef AMDGPU_ID_H -#define AMDGPU_ID_H - -#include "pipe/p_config.h" - -#if defined(PIPE_ARCH_LITTLE_ENDIAN) -#define LITTLEENDIAN_CPU -#elif defined(PIPE_ARCH_BIG_ENDIAN) -#define BIGENDIAN_CPU -#endif - -enum { - FAMILY_UNKNOWN, - FAMILY_SI, - FAMILY_CI, - FAMILY_KV, - FAMILY_VI, - FAMILY_CZ, - FAMILY_PI, - FAMILY_LAST, -}; - -/* SI specific rev IDs */ -enum { - SI_TAHITI_P_A11 = 1, - SI_TAHITI_P_A0 = SI_TAHITI_P_A11, /*A0 is alias of A11*/ - SI_TAHITI_P_A21 = 5, - SI_TAHITI_P_B0 = SI_TAHITI_P_A21, /*B0 is alias of A21*/ - SI_TAHITI_P_A22 = 6, - SI_TAHITI_P_B1 = SI_TAHITI_P_A22, /*B1 is alias of A22*/ - - SI_PITCAIRN_PM_A11 = 20, - SI_PITCAIRN_PM_A0 = SI_PITCAIRN_PM_A11, /*A0 is alias of A11*/ - SI_PITCAIRN_PM_A12 = 21, - SI_PITCAIRN_PM_A1 = SI_PITCAIRN_PM_A12, /*A1 is alias of A12*/ - - SI_CAPEVERDE_M_A11 = 40, - SI_CAPEVERDE_M_A0 = SI_CAPEVERDE_M_A11, /*A0 is alias of A11*/ - SI_CAPEVERDE_M_A12 = 41, - SI_CAPEVERDE_M_A1 = SI_CAPEVERDE_M_A12, /*A1 is alias of A12*/ - - SI_OLAND_M_A0 = 60, - - SI_HAINAN_V_A0 = 70, - - SI_UNKNOWN = 0xFF -}; - - -#define ASICREV_IS_TAHITI_P(eChipRev) \ - (eChipRev < SI_PITCAIRN_PM_A11) -#define ASICREV_IS_PITCAIRN_PM(eChipRev) \ - ((eChipRev >= SI_PITCAIRN_PM_A11) && (eChipRev < SI_CAPEVERDE_M_A11)) -#define ASICREV_IS_CAPEVERDE_M(eChipRev) \ - ((eChipRev >= SI_CAPEVERDE_M_A11) && (eChipRev < SI_OLAND_M_A0)) -#define ASICREV_IS_OLAND_M(eChipRev) \ - ((eChipRev >= SI_OLAND_M_A0) && (eChipRev < SI_HAINAN_V_A0)) -#define ASICREV_IS_HAINAN_V(eChipRev) \ -(eChipRev >= SI_HAINAN_V_A0) - -/* CI specific revIDs */ -enum { - CI_BONAIRE_M_A0 = 20, - CI_BONAIRE_M_A1 = 21, - - CI_HAWAII_P_A0 = 40, - - CI_UNKNOWN = 0xFF -}; - -#define ASICREV_IS_BONAIRE_M(eChipRev) \ - ((eChipRev >= CI_BONAIRE_M_A0) && (eChipRev < CI_HAWAII_P_A0)) -#define ASICREV_IS_HAWAII_P(eChipRev) \ - (eChipRev >= CI_HAWAII_P_A0) - -/* KV specific rev IDs */ -enum { - KV_SPECTRE_A0 = 0x01, /* KV1 with Spectre GFX core, 8-8-1-2 (CU-Pix-Primitive-RB) */ - KV_SPOOKY_A0 = 0x41, /* KV2 with Spooky GFX core, including downgraded from Spectre core, 3-4-1-1 (CU-Pix-Primitive-RB) */ - KB_KALINDI_A0 = 0x81, /* KB with Kalindi GFX core, 2-4-1-1 (CU-Pix-Primitive-RB) */ - KB_KALINDI_A1 = 0x82, /* KB with Kalindi GFX core, 2-4-1-1 (CU-Pix-Primitive-RB) */ - BV_KALINDI_A2 = 0x85, /* BV with Kalindi GFX core, 2-4-1-1 (CU-Pix-Primitive-RB) */ - ML_GODAVARI_A0 = 0xa1, /* ML with Godavari GFX core, 2-4-1-1 (CU-Pix-Primitive-RB) */ - ML_GODAVARI_A1 = 0xa2, /* ML with Godavari GFX core, 2-4-1-1 (CU-Pix-Primitive-RB) */ - KV_UNKNOWN = 0xFF -}; - -#define ASICREV_IS_SPECTRE(eChipRev) \ - ((eChipRev >= KV_SPECTRE_A0) && (eChipRev < KV_SPOOKY_A0)) /* identify all versions of SPRECTRE and supported features set */ -#define ASICREV_IS_SPOOKY(eChipRev) \ - ((eChipRev >= KV_SPOOKY_A0) && (eChipRev < KB_KALINDI_A0)) /* identify all versions of SPOOKY and supported features set */ -#define ASICREV_IS_KALINDI(eChipRev) \ - ((eChipRev >= KB_KALINDI_A0) && (eChipRev < KV_UNKNOWN)) /* identify all versions of KALINDI and supported features set */ - -/* Following macros are subset of ASICREV_IS_KALINDI macro */ -#define ASICREV_IS_KALINDI_BHAVANI(eChipRev) \ - ((eChipRev >= BV_KALINDI_A2) && (eChipRev < ML_GODAVARI_A0)) /* identify all versions of BHAVANI and supported features set */ -#define ASICREV_IS_KALINDI_GODAVARI(eChipRev) \ - ((eChipRev >= ML_GODAVARI_A0) && (eChipRev < KV_UNKNOWN)) /* identify all versions of GODAVARI and supported features set */ - -/* VI specific rev IDs */ -enum { - VI_ICELAND_M_A0 = 1, - - VI_TONGA_P_A0 = 20, - VI_TONGA_P_A1 = 21, - - VI_FIJI_P_A0 = 60, - - VI_POLARIS10_P_A0 = 80, - - VI_POLARIS11_M_A0 = 90, - - VI_UNKNOWN = 0xFF -}; - - -#define ASICREV_IS_ICELAND_M(eChipRev) \ - (eChipRev < VI_TONGA_P_A0) -#define ASICREV_IS_TONGA_P(eChipRev) \ - ((eChipRev >= VI_TONGA_P_A0) && (eChipRev < VI_FIJI_P_A0)) -#define ASICREV_IS_FIJI_P(eChipRev) \ - ((eChipRev >= VI_FIJI_P_A0) && (eChipRev < VI_POLARIS10_P_A0)) -#define ASICREV_IS_POLARIS10_P(eChipRev)\ - ((eChipRev >= VI_POLARIS10_P_A0) && (eChipRev < VI_POLARIS11_M_A0)) -#define ASICREV_IS_POLARIS11_M(eChipRev) \ - (eChipRev >= VI_POLARIS11_M_A0) - -/* CZ specific rev IDs */ -enum { - CARRIZO_A0 = 0x01, - STONEY_A0 = 0x61, - CZ_UNKNOWN = 0xFF -}; - -#define ASICREV_IS_CARRIZO(eChipRev) \ - ((eChipRev >= CARRIZO_A0) && (eChipRev < STONEY_A0)) - -#define ASICREV_IS_STONEY(eChipRev) \ - ((eChipRev >= STONEY_A0) && (eChipRev < CZ_UNKNOWN)) - -#endif /* AMDGPU_ID_H */ diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c mesa-17.0.7/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c 2017-06-01 10:37:10.000000000 +0000 @@ -30,36 +30,22 @@ */ #include "amdgpu_winsys.h" - -#ifndef NO_ENTRIES -#define NO_ENTRIES 32 -#endif - -#ifndef NO_MACRO_ENTRIES -#define NO_MACRO_ENTRIES 16 -#endif +#include "util/u_format.h" #ifndef CIASICIDGFXENGINE_SOUTHERNISLAND #define CIASICIDGFXENGINE_SOUTHERNISLAND 0x0000000A #endif -static int amdgpu_surface_sanity(const struct radeon_surf *surf) +static int amdgpu_surface_sanity(const struct pipe_resource *tex) { - unsigned type = RADEON_SURF_GET(surf->flags, TYPE); - - if (!(surf->flags & RADEON_SURF_HAS_TILE_MODE_INDEX)) - return -EINVAL; - /* all dimension must be at least 1 ! */ - if (!surf->npix_x || !surf->npix_y || !surf->npix_z || - !surf->array_size) + if (!tex->width0 || !tex->height0 || !tex->depth0 || + !tex->array_size) return -EINVAL; - if (!surf->blk_w || !surf->blk_h || !surf->blk_d) - return -EINVAL; - - switch (surf->nsamples) { + switch (tex->nr_samples) { + case 0: case 1: case 2: case 4: @@ -69,26 +55,28 @@ return -EINVAL; } - switch (type) { - case RADEON_SURF_TYPE_1D: - if (surf->npix_y > 1) + switch (tex->target) { + case PIPE_TEXTURE_1D: + if (tex->height0 > 1) return -EINVAL; /* fall through */ - case RADEON_SURF_TYPE_2D: - case RADEON_SURF_TYPE_CUBEMAP: - if (surf->npix_z > 1 || surf->array_size > 1) + case PIPE_TEXTURE_2D: + case PIPE_TEXTURE_RECT: + if (tex->depth0 > 1 || tex->array_size > 1) return -EINVAL; break; - case RADEON_SURF_TYPE_3D: - if (surf->array_size > 1) + case PIPE_TEXTURE_3D: + if (tex->array_size > 1) return -EINVAL; break; - case RADEON_SURF_TYPE_1D_ARRAY: - if (surf->npix_y > 1) + case PIPE_TEXTURE_1D_ARRAY: + if (tex->height0 > 1) return -EINVAL; /* fall through */ - case RADEON_SURF_TYPE_2D_ARRAY: - if (surf->npix_z > 1) + case PIPE_TEXTURE_CUBE: + case PIPE_TEXTURE_2D_ARRAY: + case PIPE_TEXTURE_CUBE_ARRAY: + if (tex->depth0 > 1) return -EINVAL; break; default: @@ -126,12 +114,18 @@ regValue.backendDisables = ws->amdinfo.backend_disable[0]; regValue.pTileConfig = ws->amdinfo.gb_tile_mode; regValue.noOfEntries = ARRAY_SIZE(ws->amdinfo.gb_tile_mode); - regValue.pMacroTileConfig = ws->amdinfo.gb_macro_tile_mode; - regValue.noOfMacroEntries = ARRAY_SIZE(ws->amdinfo.gb_macro_tile_mode); + if (ws->info.chip_class == SI) { + regValue.pMacroTileConfig = NULL; + regValue.noOfMacroEntries = 0; + } else { + regValue.pMacroTileConfig = ws->amdinfo.gb_macro_tile_mode; + regValue.noOfMacroEntries = ARRAY_SIZE(ws->amdinfo.gb_macro_tile_mode); + } createFlags.value = 0; createFlags.useTileIndex = 1; createFlags.degradeBaseLevel = 1; + createFlags.useHtileSliceAlign = 1; addrCreateInput.chipEngine = CIASICIDGFXENGINE_SOUTHERNISLAND; addrCreateInput.chipFamily = ws->family; @@ -150,26 +144,29 @@ } static int compute_level(struct amdgpu_winsys *ws, + const struct pipe_resource *tex, struct radeon_surf *surf, bool is_stencil, - unsigned level, unsigned type, bool compressed, + unsigned level, bool compressed, ADDR_COMPUTE_SURFACE_INFO_INPUT *AddrSurfInfoIn, ADDR_COMPUTE_SURFACE_INFO_OUTPUT *AddrSurfInfoOut, ADDR_COMPUTE_DCCINFO_INPUT *AddrDccIn, - ADDR_COMPUTE_DCCINFO_OUTPUT *AddrDccOut) + ADDR_COMPUTE_DCCINFO_OUTPUT *AddrDccOut, + ADDR_COMPUTE_HTILE_INFO_INPUT *AddrHtileIn, + ADDR_COMPUTE_HTILE_INFO_OUTPUT *AddrHtileOut) { struct radeon_surf_level *surf_level; ADDR_E_RETURNCODE ret; AddrSurfInfoIn->mipLevel = level; - AddrSurfInfoIn->width = u_minify(surf->npix_x, level); - AddrSurfInfoIn->height = u_minify(surf->npix_y, level); + AddrSurfInfoIn->width = u_minify(tex->width0, level); + AddrSurfInfoIn->height = u_minify(tex->height0, level); - if (type == RADEON_SURF_TYPE_3D) - AddrSurfInfoIn->numSlices = u_minify(surf->npix_z, level); - else if (type == RADEON_SURF_TYPE_CUBEMAP) + if (tex->target == PIPE_TEXTURE_3D) + AddrSurfInfoIn->numSlices = u_minify(tex->depth0, level); + else if (tex->target == PIPE_TEXTURE_CUBE) AddrSurfInfoIn->numSlices = 6; else - AddrSurfInfoIn->numSlices = surf->array_size; + AddrSurfInfoIn->numSlices = tex->array_size; if (level > 0) { /* Set the base level pitch. This is needed for calculation @@ -192,18 +189,10 @@ } surf_level = is_stencil ? &surf->stencil_level[level] : &surf->level[level]; - surf_level->offset = align64(surf->bo_size, AddrSurfInfoOut->baseAlign); + surf_level->offset = align64(surf->surf_size, AddrSurfInfoOut->baseAlign); surf_level->slice_size = AddrSurfInfoOut->sliceSize; - surf_level->pitch_bytes = AddrSurfInfoOut->pitch * (is_stencil ? 1 : surf->bpe); - surf_level->npix_x = u_minify(surf->npix_x, level); - surf_level->npix_y = u_minify(surf->npix_y, level); - surf_level->npix_z = u_minify(surf->npix_z, level); surf_level->nblk_x = AddrSurfInfoOut->pitch; surf_level->nblk_y = AddrSurfInfoOut->height; - if (type == RADEON_SURF_TYPE_3D) - surf_level->nblk_z = AddrSurfInfoOut->depth; - else - surf_level->nblk_z = 1; switch (AddrSurfInfoOut->tileMode) { case ADDR_TM_LINEAR_ALIGNED: @@ -224,9 +213,14 @@ else surf->tiling_index[level] = AddrSurfInfoOut->tileIndex; - surf->bo_size = surf_level->offset + AddrSurfInfoOut->surfSize; + surf->surf_size = surf_level->offset + AddrSurfInfoOut->surfSize; + + /* Clear DCC fields at the beginning. */ + surf_level->dcc_offset = 0; - if (AddrSurfInfoIn->flags.dccCompatible) { + /* The previous level's flag tells us if we can use DCC for this level. */ + if (AddrSurfInfoIn->flags.dccCompatible && + (level == 0 || AddrDccOut->subLvlCompressible)) { AddrDccIn->colorSurfSize = AddrSurfInfoOut->surfSize; AddrDccIn->tileMode = AddrSurfInfoOut->tileMode; AddrDccIn->tileInfo = *AddrSurfInfoOut->pTileInfo; @@ -239,20 +233,56 @@ if (ret == ADDR_OK) { surf_level->dcc_offset = surf->dcc_size; + surf_level->dcc_fast_clear_size = AddrDccOut->dccFastClearSize; + surf->num_dcc_levels = level + 1; surf->dcc_size = surf_level->dcc_offset + AddrDccOut->dccRamSize; surf->dcc_alignment = MAX2(surf->dcc_alignment, AddrDccOut->dccRamBaseAlign); - } else { - surf->dcc_size = 0; - surf_level->dcc_offset = 0; } - } else { - surf->dcc_size = 0; - surf_level->dcc_offset = 0; + } + + /* TC-compatible HTILE. */ + if (!is_stencil && + AddrSurfInfoIn->flags.depth && + AddrSurfInfoIn->flags.tcCompatible && + surf_level->mode == RADEON_SURF_MODE_2D && + level == 0) { + AddrHtileIn->flags.tcCompatible = 1; + AddrHtileIn->pitch = AddrSurfInfoOut->pitch; + AddrHtileIn->height = AddrSurfInfoOut->height; + AddrHtileIn->numSlices = AddrSurfInfoOut->depth; + AddrHtileIn->blockWidth = ADDR_HTILE_BLOCKSIZE_8; + AddrHtileIn->blockHeight = ADDR_HTILE_BLOCKSIZE_8; + AddrHtileIn->pTileInfo = AddrSurfInfoOut->pTileInfo; + AddrHtileIn->tileIndex = AddrSurfInfoOut->tileIndex; + AddrHtileIn->macroModeIndex = AddrSurfInfoOut->macroModeIndex; + + ret = AddrComputeHtileInfo(ws->addrlib, + AddrHtileIn, + AddrHtileOut); + + if (ret == ADDR_OK) { + surf->htile_size = AddrHtileOut->htileBytes; + surf->htile_alignment = AddrHtileOut->baseAlign; + } } return 0; } +#define G_009910_MICRO_TILE_MODE(x) (((x) >> 0) & 0x03) +#define G_009910_MICRO_TILE_MODE_NEW(x) (((x) >> 22) & 0x07) + +static void set_micro_tile_mode(struct radeon_surf *surf, + struct radeon_info *info) +{ + uint32_t tile_mode = info->si_tile_mode_array[surf->tiling_index[0]]; + + if (info->chip_class >= CIK) + surf->micro_tile_mode = G_009910_MICRO_TILE_MODE_NEW(tile_mode); + else + surf->micro_tile_mode = G_009910_MICRO_TILE_MODE(tile_mode); +} + static unsigned cik_get_macro_tile_index(struct radeon_surf *surf) { unsigned index, tileb; @@ -268,20 +298,25 @@ } static int amdgpu_surface_init(struct radeon_winsys *rws, + const struct pipe_resource *tex, + unsigned flags, unsigned bpe, + enum radeon_surf_mode mode, struct radeon_surf *surf) { struct amdgpu_winsys *ws = (struct amdgpu_winsys*)rws; - unsigned level, mode, type; + unsigned level; bool compressed; ADDR_COMPUTE_SURFACE_INFO_INPUT AddrSurfInfoIn = {0}; ADDR_COMPUTE_SURFACE_INFO_OUTPUT AddrSurfInfoOut = {0}; ADDR_COMPUTE_DCCINFO_INPUT AddrDccIn = {0}; ADDR_COMPUTE_DCCINFO_OUTPUT AddrDccOut = {0}; + ADDR_COMPUTE_HTILE_INFO_INPUT AddrHtileIn = {0}; + ADDR_COMPUTE_HTILE_INFO_OUTPUT AddrHtileOut = {0}; ADDR_TILEINFO AddrTileInfoIn = {0}; ADDR_TILEINFO AddrTileInfoOut = {0}; int r; - r = amdgpu_surface_sanity(surf); + r = amdgpu_surface_sanity(tex); if (r) return r; @@ -289,19 +324,24 @@ AddrSurfInfoOut.size = sizeof(ADDR_COMPUTE_SURFACE_INFO_OUTPUT); AddrDccIn.size = sizeof(ADDR_COMPUTE_DCCINFO_INPUT); AddrDccOut.size = sizeof(ADDR_COMPUTE_DCCINFO_OUTPUT); + AddrHtileIn.size = sizeof(ADDR_COMPUTE_HTILE_INFO_INPUT); + AddrHtileOut.size = sizeof(ADDR_COMPUTE_HTILE_INFO_OUTPUT); AddrSurfInfoOut.pTileInfo = &AddrTileInfoOut; - type = RADEON_SURF_GET(surf->flags, TYPE); - mode = RADEON_SURF_GET(surf->flags, MODE); + surf->blk_w = util_format_get_blockwidth(tex->format); + surf->blk_h = util_format_get_blockheight(tex->format); + surf->bpe = bpe; + surf->flags = flags; + compressed = surf->blk_w == 4 && surf->blk_h == 4; /* MSAA and FMASK require 2D tiling. */ - if (surf->nsamples > 1 || - (surf->flags & RADEON_SURF_FMASK)) + if (tex->nr_samples > 1 || + (flags & RADEON_SURF_FMASK)) mode = RADEON_SURF_MODE_2D; /* DB doesn't support linear layouts. */ - if (surf->flags & (RADEON_SURF_Z_OR_SBUFFER) && + if (flags & (RADEON_SURF_Z_OR_SBUFFER) && mode < RADEON_SURF_MODE_1D) mode = RADEON_SURF_MODE_1D; @@ -323,7 +363,7 @@ /* The format must be set correctly for the allocation of compressed * textures to work. In other cases, setting the bpp is sufficient. */ if (compressed) { - switch (surf->bpe) { + switch (bpe) { case 8: AddrSurfInfoIn.format = ADDR_FMT_BC1; break; @@ -335,40 +375,70 @@ } } else { - AddrDccIn.bpp = AddrSurfInfoIn.bpp = surf->bpe * 8; + AddrDccIn.bpp = AddrSurfInfoIn.bpp = bpe * 8; } - AddrDccIn.numSamples = AddrSurfInfoIn.numSamples = surf->nsamples; + AddrDccIn.numSamples = AddrSurfInfoIn.numSamples = + tex->nr_samples ? tex->nr_samples : 1; AddrSurfInfoIn.tileIndex = -1; /* Set the micro tile type. */ - if (surf->flags & RADEON_SURF_SCANOUT) + if (flags & RADEON_SURF_SCANOUT) AddrSurfInfoIn.tileType = ADDR_DISPLAYABLE; - else if (surf->flags & RADEON_SURF_Z_OR_SBUFFER) + else if (flags & (RADEON_SURF_Z_OR_SBUFFER | RADEON_SURF_FMASK)) AddrSurfInfoIn.tileType = ADDR_DEPTH_SAMPLE_ORDER; else AddrSurfInfoIn.tileType = ADDR_NON_DISPLAYABLE; - AddrSurfInfoIn.flags.color = !(surf->flags & RADEON_SURF_Z_OR_SBUFFER); - AddrSurfInfoIn.flags.depth = (surf->flags & RADEON_SURF_ZBUFFER) != 0; - AddrSurfInfoIn.flags.stencil = (surf->flags & RADEON_SURF_SBUFFER) != 0; - AddrSurfInfoIn.flags.cube = type == RADEON_SURF_TYPE_CUBEMAP; - AddrSurfInfoIn.flags.display = (surf->flags & RADEON_SURF_SCANOUT) != 0; - AddrSurfInfoIn.flags.pow2Pad = surf->last_level > 0; - AddrSurfInfoIn.flags.degrade4Space = 1; - AddrSurfInfoIn.flags.dccCompatible = !(surf->flags & RADEON_SURF_Z_OR_SBUFFER) && - !(surf->flags & RADEON_SURF_SCANOUT) && - !(surf->flags & RADEON_SURF_DISABLE_DCC) && + AddrSurfInfoIn.flags.color = !(flags & RADEON_SURF_Z_OR_SBUFFER); + AddrSurfInfoIn.flags.depth = (flags & RADEON_SURF_ZBUFFER) != 0; + AddrSurfInfoIn.flags.cube = tex->target == PIPE_TEXTURE_CUBE; + AddrSurfInfoIn.flags.fmask = (flags & RADEON_SURF_FMASK) != 0; + AddrSurfInfoIn.flags.display = (flags & RADEON_SURF_SCANOUT) != 0; + AddrSurfInfoIn.flags.pow2Pad = tex->last_level > 0; + AddrSurfInfoIn.flags.tcCompatible = (flags & RADEON_SURF_TC_COMPATIBLE_HTILE) != 0; + + /* Only degrade the tile mode for space if TC-compatible HTILE hasn't been + * requested, because TC-compatible HTILE requires 2D tiling. + */ + AddrSurfInfoIn.flags.degrade4Space = !AddrSurfInfoIn.flags.tcCompatible && + !AddrSurfInfoIn.flags.fmask && + tex->nr_samples <= 1 && + (flags & RADEON_SURF_OPTIMIZE_FOR_SPACE); + AddrSurfInfoIn.flags.opt4Space = AddrSurfInfoIn.flags.degrade4Space; + + /* DCC notes: + * - If we add MSAA support, keep in mind that CB can't decompress 8bpp + * with samples >= 4. + * - Mipmapped array textures have low performance (discovered by a closed + * driver team). + */ + AddrSurfInfoIn.flags.dccCompatible = ws->info.chip_class >= VI && + !(flags & RADEON_SURF_Z_OR_SBUFFER) && + !(flags & RADEON_SURF_DISABLE_DCC) && !compressed && AddrDccIn.numSamples <= 1 && - surf->last_level == 0; + ((tex->array_size == 1 && tex->depth0 == 1) || + tex->last_level == 0); + + AddrSurfInfoIn.flags.noStencil = (flags & RADEON_SURF_SBUFFER) == 0; + AddrSurfInfoIn.flags.compressZ = AddrSurfInfoIn.flags.depth; - /* This disables incorrect calculations (hacks) in addrlib. */ - AddrSurfInfoIn.flags.noStencil = 1; + /* noStencil = 0 can result in a depth part that is incompatible with + * mipmapped texturing. So set noStencil = 1 when mipmaps are requested (in + * this case, we may end up setting stencil_adjusted). + * + * TODO: update addrlib to a newer version, remove this, and + * use flags.matchStencilTileCfg = 1 as an alternative fix. + */ + if (tex->last_level > 0) + AddrSurfInfoIn.flags.noStencil = 1; /* Set preferred macrotile parameters. This is usually required * for shared resources. This is for 2D tiling only. */ if (AddrSurfInfoIn.tileMode >= ADDR_TM_2D_TILED_THIN1 && surf->bankw && surf->bankh && surf->mtilea && surf->tile_split) { + assert(!(flags & RADEON_SURF_FMASK)); + /* If any of these parameters are incorrect, the calculation * will fail. */ AddrTileInfoIn.banks = surf->num_banks; @@ -388,32 +458,56 @@ * For now, just figure it out here. * Note that only 2D_TILE_THIN1 is handled here. */ - assert(!(surf->flags & RADEON_SURF_Z_OR_SBUFFER)); + assert(!(flags & RADEON_SURF_Z_OR_SBUFFER)); assert(AddrSurfInfoIn.tileMode == ADDR_TM_2D_TILED_THIN1); - if (AddrSurfInfoIn.tileType == ADDR_DISPLAYABLE) - AddrSurfInfoIn.tileIndex = 10; /* 2D displayable */ - else - AddrSurfInfoIn.tileIndex = 14; /* 2D non-displayable */ + if (ws->info.chip_class == SI) { + if (AddrSurfInfoIn.tileType == ADDR_DISPLAYABLE) { + if (bpe == 2) + AddrSurfInfoIn.tileIndex = 11; /* 16bpp */ + else + AddrSurfInfoIn.tileIndex = 12; /* 32bpp */ + } else { + if (bpe == 1) + AddrSurfInfoIn.tileIndex = 14; /* 8bpp */ + else if (bpe == 2) + AddrSurfInfoIn.tileIndex = 15; /* 16bpp */ + else if (bpe == 4) + AddrSurfInfoIn.tileIndex = 16; /* 32bpp */ + else + AddrSurfInfoIn.tileIndex = 17; /* 64bpp (and 128bpp) */ + } + } else { + /* CIK - VI */ + if (AddrSurfInfoIn.tileType == ADDR_DISPLAYABLE) + AddrSurfInfoIn.tileIndex = 10; /* 2D displayable */ + else + AddrSurfInfoIn.tileIndex = 14; /* 2D non-displayable */ - /* Addrlib doesn't set this if tileIndex is forced like above. */ - AddrSurfInfoOut.macroModeIndex = cik_get_macro_tile_index(surf); + /* Addrlib doesn't set this if tileIndex is forced like above. */ + AddrSurfInfoOut.macroModeIndex = cik_get_macro_tile_index(surf); + } } - surf->bo_size = 0; + surf->num_dcc_levels = 0; + surf->surf_size = 0; surf->dcc_size = 0; surf->dcc_alignment = 1; + surf->htile_size = 0; + surf->htile_alignment = 1; /* Calculate texture layout information. */ - for (level = 0; level <= surf->last_level; level++) { - r = compute_level(ws, surf, false, level, type, compressed, - &AddrSurfInfoIn, &AddrSurfInfoOut, &AddrDccIn, &AddrDccOut); + for (level = 0; level <= tex->last_level; level++) { + r = compute_level(ws, tex, surf, false, level, compressed, + &AddrSurfInfoIn, &AddrSurfInfoOut, + &AddrDccIn, &AddrDccOut, &AddrHtileIn, &AddrHtileOut); if (r) return r; if (level == 0) { - surf->bo_alignment = AddrSurfInfoOut.baseAlign; + surf->surf_alignment = AddrSurfInfoOut.baseAlign; surf->pipe_config = AddrSurfInfoOut.pTileInfo->pipeConfig - 1; + set_micro_tile_mode(surf, &ws->info); /* For 2D modes only. */ if (AddrSurfInfoOut.tileMode >= ADDR_TM_2D_TILED_THIN1) { @@ -430,20 +524,26 @@ } /* Calculate texture layout information for stencil. */ - if (surf->flags & RADEON_SURF_SBUFFER) { + if (flags & RADEON_SURF_SBUFFER) { AddrSurfInfoIn.bpp = 8; + AddrSurfInfoIn.flags.depth = 0; + AddrSurfInfoIn.flags.stencil = 1; + AddrSurfInfoIn.flags.tcCompatible = 0; /* This will be ignored if AddrSurfInfoIn.pTileInfo is NULL. */ AddrTileInfoIn.tileSplitBytes = surf->stencil_tile_split; - for (level = 0; level <= surf->last_level; level++) { - r = compute_level(ws, surf, true, level, type, compressed, - &AddrSurfInfoIn, &AddrSurfInfoOut, &AddrDccIn, &AddrDccOut); + for (level = 0; level <= tex->last_level; level++) { + r = compute_level(ws, tex, surf, true, level, compressed, + &AddrSurfInfoIn, &AddrSurfInfoOut, &AddrDccIn, &AddrDccOut, + NULL, NULL); if (r) return r; - if (level == 0) { - surf->stencil_offset = surf->stencil_level[0].offset; + /* DB uses the depth pitch for both stencil and depth. */ + if (surf->stencil_level[level].nblk_x != surf->level[level].nblk_x) + surf->stencil_adjusted = true; + if (level == 0) { /* For 2D modes only. */ if (AddrSurfInfoOut.tileMode >= ADDR_TM_2D_TILED_THIN1) { surf->stencil_tile_split = @@ -453,17 +553,27 @@ } } - return 0; -} + /* Recalculate the whole DCC miptree size including disabled levels. + * This is what addrlib does, but calling addrlib would be a lot more + * complicated. + */ + if (surf->dcc_size && tex->last_level > 0) { + surf->dcc_size = align64(surf->surf_size >> 8, + ws->info.pipe_interleave_bytes * + ws->info.num_tile_pipes); + } + + /* Make sure HTILE covers the whole miptree, because the shader reads + * TC-compatible HTILE even for levels where it's disabled by DB. + */ + if (surf->htile_size && tex->last_level) + surf->htile_size *= 2; -static int amdgpu_surface_best(struct radeon_winsys *rws, - struct radeon_surf *surf) -{ + surf->is_linear = surf->level[0].mode == RADEON_SURF_MODE_LINEAR_ALIGNED; return 0; } void amdgpu_surface_init_functions(struct amdgpu_winsys *ws) { ws->base.surface_init = amdgpu_surface_init; - ws->base.surface_best = amdgpu_surface_best; } diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c mesa-17.0.7/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c 2017-06-01 10:37:10.000000000 +0000 @@ -39,7 +39,7 @@ #include #include #include -#include "amdgpu_id.h" +#include "amd/common/amdgpu_id.h" #define CIK_TILE_MODE_COLOR_2D 14 @@ -59,6 +59,10 @@ #define CIK__PIPE_CONFIG__ADDR_SURF_P16_32X32_8X16 16 #define CIK__PIPE_CONFIG__ADDR_SURF_P16_32X32_16X16 17 +#ifndef AMDGPU_INFO_NUM_EVICTIONS +#define AMDGPU_INFO_NUM_EVICTIONS 0x18 +#endif + static struct util_hash_table *dev_tab = NULL; pipe_static_mutex(dev_tab_mutex); @@ -93,12 +97,13 @@ } /* Helper function to do the ioctls needed for setup and init. */ -static boolean do_winsys_init(struct amdgpu_winsys *ws, int fd) +static bool do_winsys_init(struct amdgpu_winsys *ws, int fd) { struct amdgpu_buffer_size_alignments alignment_info = {}; struct amdgpu_heap_info vram, gtt; struct drm_amdgpu_info_hw_ip dma = {}, uvd = {}, vce = {}; uint32_t vce_version = 0, vce_feature = 0, uvd_version = 0, uvd_feature = 0; + uint32_t unused_feature; int r, i, j; drmDevicePtr devinfo; @@ -151,6 +156,27 @@ goto fail; } + r = amdgpu_query_firmware_version(ws->dev, AMDGPU_INFO_FW_GFX_ME, 0, 0, + &ws->info.me_fw_version, &unused_feature); + if (r) { + fprintf(stderr, "amdgpu: amdgpu_query_firmware_version(me) failed.\n"); + goto fail; + } + + r = amdgpu_query_firmware_version(ws->dev, AMDGPU_INFO_FW_GFX_PFP, 0, 0, + &ws->info.pfp_fw_version, &unused_feature); + if (r) { + fprintf(stderr, "amdgpu: amdgpu_query_firmware_version(pfp) failed.\n"); + goto fail; + } + + r = amdgpu_query_firmware_version(ws->dev, AMDGPU_INFO_FW_GFX_CE, 0, 0, + &ws->info.ce_fw_version, &unused_feature); + if (r) { + fprintf(stderr, "amdgpu: amdgpu_query_firmware_version(ce) failed.\n"); + goto fail; + } + r = amdgpu_query_firmware_version(ws->dev, AMDGPU_INFO_FW_UVD, 0, 0, &uvd_version, &uvd_feature); if (r) { @@ -189,6 +215,8 @@ ws->info.chip_class = VI; else if (ws->info.family >= CHIP_BONAIRE) ws->info.chip_class = CIK; + else if (ws->info.family >= CHIP_TAHITI) + ws->info.chip_class = SI; else { fprintf(stderr, "amdgpu: Unknown family.\n"); goto fail; @@ -204,6 +232,26 @@ /* family and rev_id are for addrlib */ switch (ws->info.family) { + case CHIP_TAHITI: + ws->family = FAMILY_SI; + ws->rev_id = SI_TAHITI_P_A0; + break; + case CHIP_PITCAIRN: + ws->family = FAMILY_SI; + ws->rev_id = SI_PITCAIRN_PM_A0; + break; + case CHIP_VERDE: + ws->family = FAMILY_SI; + ws->rev_id = SI_CAPEVERDE_M_A0; + break; + case CHIP_OLAND: + ws->family = FAMILY_SI; + ws->rev_id = SI_OLAND_M_A0; + break; + case CHIP_HAINAN: + ws->family = FAMILY_SI; + ws->rev_id = SI_HAINAN_V_A0; + break; case CHIP_BONAIRE: ws->family = FAMILY_CI; ws->rev_id = CI_BONAIRE_M_A0; @@ -252,6 +300,10 @@ ws->family = FAMILY_VI; ws->rev_id = VI_POLARIS11_M_A0; break; + case CHIP_POLARIS12: + ws->family = FAMILY_VI; + ws->rev_id = VI_POLARIS12_V_A0; + break; default: fprintf(stderr, "amdgpu: Unknown family.\n"); goto fail; @@ -270,6 +322,10 @@ /* Set hardware information. */ ws->info.gart_size = gtt.heap_size; ws->info.vram_size = vram.heap_size; + /* The kernel can split large buffers in VRAM but not in GTT, so large + * allocations can fail or cause buffer movement failures in the kernel. + */ + ws->info.max_alloc_size = MIN2(ws->info.vram_size * 0.9, ws->info.gart_size * 0.7); /* convert the shader clock from KHz to MHz */ ws->info.max_shader_clock = ws->amdinfo.max_engine_clk / 1000; ws->info.max_se = ws->amdinfo.num_shader_engines; @@ -279,12 +335,12 @@ uvd.available_rings ? uvd_version : 0; ws->info.vce_fw_version = vce.available_rings ? vce_version : 0; - ws->info.has_userptr = TRUE; + ws->info.has_userptr = true; ws->info.num_render_backends = ws->amdinfo.rb_pipes; ws->info.clock_crystal_freq = ws->amdinfo.gpu_counter_freq; ws->info.num_tile_pipes = cik_get_num_tile_pipes(&ws->amdinfo); ws->info.pipe_interleave_bytes = 256 << ((ws->amdinfo.gb_addr_cfg >> 4) & 0x7); - ws->info.has_virtual_memory = TRUE; + ws->info.has_virtual_memory = true; ws->info.has_sdma = dma.available_rings != 0; /* Get the number of good compute units. */ @@ -303,33 +359,39 @@ ws->info.gart_page_size = alignment_info.size_remote; - return TRUE; + if (ws->info.chip_class == SI) + ws->info.gfx_ib_pad_with_type2 = TRUE; + + ws->check_vm = strstr(debug_get_option("R600_DEBUG", ""), "check_vm") != NULL; + + return true; fail: if (ws->addrlib) AddrDestroy(ws->addrlib); amdgpu_device_deinitialize(ws->dev); ws->dev = NULL; - return FALSE; + return false; +} + +static void do_winsys_deinit(struct amdgpu_winsys *ws) +{ + AddrDestroy(ws->addrlib); + amdgpu_device_deinitialize(ws->dev); } static void amdgpu_winsys_destroy(struct radeon_winsys *rws) { struct amdgpu_winsys *ws = (struct amdgpu_winsys*)rws; - if (ws->thread) { - ws->kill_thread = 1; - pipe_semaphore_signal(&ws->cs_queued); - pipe_thread_wait(ws->thread); - } - pipe_semaphore_destroy(&ws->cs_queue_has_space); - pipe_semaphore_destroy(&ws->cs_queued); - pipe_mutex_destroy(ws->cs_queue_lock); + if (util_queue_is_initialized(&ws->cs_queue)) + util_queue_destroy(&ws->cs_queue); + pipe_mutex_destroy(ws->bo_fence_lock); + pb_slabs_deinit(&ws->bo_slabs); pb_cache_deinit(&ws->bo_cache); pipe_mutex_destroy(ws->global_bo_list_lock); - AddrDestroy(ws->addrlib); - amdgpu_device_deinitialize(ws->dev); + do_winsys_deinit(ws); FREE(rws); } @@ -339,11 +401,11 @@ *info = ((struct amdgpu_winsys *)rws)->info; } -static boolean amdgpu_cs_request_feature(struct radeon_winsys_cs *rcs, - enum radeon_feature_id fid, - boolean enable) +static bool amdgpu_cs_request_feature(struct radeon_winsys_cs *rcs, + enum radeon_feature_id fid, + bool enable) { - return FALSE; + return false; } static uint64_t amdgpu_query_value(struct radeon_winsys *rws, @@ -358,16 +420,25 @@ return ws->allocated_vram; case RADEON_REQUESTED_GTT_MEMORY: return ws->allocated_gtt; + case RADEON_MAPPED_VRAM: + return ws->mapped_vram; + case RADEON_MAPPED_GTT: + return ws->mapped_gtt; case RADEON_BUFFER_WAIT_TIME_NS: return ws->buffer_wait_time; case RADEON_TIMESTAMP: amdgpu_query_info(ws->dev, AMDGPU_INFO_TIMESTAMP, 8, &retval); return retval; - case RADEON_NUM_CS_FLUSHES: - return ws->num_cs_flushes; + case RADEON_NUM_GFX_IBS: + return ws->num_gfx_IBs; + case RADEON_NUM_SDMA_IBS: + return ws->num_sdma_IBs; case RADEON_NUM_BYTES_MOVED: amdgpu_query_info(ws->dev, AMDGPU_INFO_NUM_BYTES_MOVED, 8, &retval); return retval; + case RADEON_NUM_EVICTIONS: + amdgpu_query_info(ws->dev, AMDGPU_INFO_NUM_EVICTIONS, 8, &retval); + return retval; case RADEON_VRAM_USAGE: amdgpu_query_heap_info(ws->dev, AMDGPU_GEM_DOMAIN_VRAM, 0, &heap); return heap.heap_usage; @@ -409,54 +480,6 @@ return key1 != key2; } -void amdgpu_ws_queue_cs(struct amdgpu_winsys *ws, struct amdgpu_cs *cs) -{ - pipe_semaphore_wait(&ws->cs_queue_has_space); - - pipe_mutex_lock(ws->cs_queue_lock); - assert(ws->num_enqueued_cs < ARRAY_SIZE(ws->cs_queue)); - ws->cs_queue[ws->num_enqueued_cs++] = cs; - pipe_mutex_unlock(ws->cs_queue_lock); - pipe_semaphore_signal(&ws->cs_queued); -} - -static PIPE_THREAD_ROUTINE(amdgpu_cs_thread_func, param) -{ - struct amdgpu_winsys *ws = (struct amdgpu_winsys *)param; - struct amdgpu_cs *cs; - unsigned i; - - while (1) { - pipe_semaphore_wait(&ws->cs_queued); - if (ws->kill_thread) - break; - - pipe_mutex_lock(ws->cs_queue_lock); - cs = ws->cs_queue[0]; - for (i = 1; i < ws->num_enqueued_cs; i++) - ws->cs_queue[i - 1] = ws->cs_queue[i]; - ws->cs_queue[--ws->num_enqueued_cs] = NULL; - pipe_mutex_unlock(ws->cs_queue_lock); - - pipe_semaphore_signal(&ws->cs_queue_has_space); - - if (cs) { - amdgpu_cs_submit_ib(cs); - pipe_semaphore_signal(&cs->flush_completed); - } - } - pipe_mutex_lock(ws->cs_queue_lock); - for (i = 0; i < ws->num_enqueued_cs; i++) { - pipe_semaphore_signal(&ws->cs_queue[i]->flush_completed); - ws->cs_queue[i] = NULL; - } - pipe_mutex_unlock(ws->cs_queue_lock); - return 0; -} - -DEBUG_GET_ONCE_BOOL_OPTION(thread, "RADEON_THREAD", TRUE) -static PIPE_THREAD_ROUTINE(amdgpu_cs_thread_func, param); - static bool amdgpu_winsys_unref(struct radeon_winsys *rws) { struct amdgpu_winsys *ws = (struct amdgpu_winsys*)rws; @@ -516,23 +539,32 @@ /* Create a new winsys. */ ws = CALLOC_STRUCT(amdgpu_winsys); - if (!ws) { - pipe_mutex_unlock(dev_tab_mutex); - return NULL; - } + if (!ws) + goto fail; ws->dev = dev; ws->info.drm_major = drm_major; ws->info.drm_minor = drm_minor; if (!do_winsys_init(ws, fd)) - goto fail; + goto fail_alloc; /* Create managers. */ - pb_cache_init(&ws->bo_cache, 500000, 2.0f, 0, + pb_cache_init(&ws->bo_cache, 500000, ws->check_vm ? 1.0f : 2.0f, 0, (ws->info.vram_size + ws->info.gart_size) / 8, amdgpu_bo_destroy, amdgpu_bo_can_reclaim); + if (!pb_slabs_init(&ws->bo_slabs, + AMDGPU_SLAB_MIN_SIZE_LOG2, AMDGPU_SLAB_MAX_SIZE_LOG2, + 12, /* number of heaps (domain/flags combinations) */ + ws, + amdgpu_bo_can_reclaim_slab, + amdgpu_bo_slab_alloc, + amdgpu_bo_slab_free)) + goto fail_cache; + + ws->info.min_alloc_size = 1 << AMDGPU_SLAB_MIN_SIZE_LOG2; + /* init reference */ pipe_reference_init(&ws->reference, 1); @@ -550,14 +582,13 @@ LIST_INITHEAD(&ws->global_bo_list); pipe_mutex_init(ws->global_bo_list_lock); - pipe_mutex_init(ws->cs_queue_lock); pipe_mutex_init(ws->bo_fence_lock); - pipe_semaphore_init(&ws->cs_queue_has_space, ARRAY_SIZE(ws->cs_queue)); - pipe_semaphore_init(&ws->cs_queued, 0); - - if (sysconf(_SC_NPROCESSORS_ONLN) > 1 && debug_get_option_thread()) - ws->thread = pipe_thread_create(amdgpu_cs_thread_func, ws); + if (!util_queue_init(&ws->cs_queue, "amdgpu_cs", 8, 1)) { + amdgpu_winsys_destroy(&ws->base); + pipe_mutex_unlock(dev_tab_mutex); + return NULL; + } /* Create the screen at the end. The winsys must be initialized * completely. @@ -580,9 +611,12 @@ return &ws->base; -fail: - pipe_mutex_unlock(dev_tab_mutex); +fail_cache: pb_cache_deinit(&ws->bo_cache); + do_winsys_deinit(ws); +fail_alloc: FREE(ws); +fail: + pipe_mutex_unlock(dev_tab_mutex); return NULL; } diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h mesa-17.0.7/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h 2017-06-01 10:37:10.000000000 +0000 @@ -33,17 +33,22 @@ #define AMDGPU_WINSYS_H #include "pipebuffer/pb_cache.h" +#include "pipebuffer/pb_slab.h" #include "gallium/drivers/radeon/radeon_winsys.h" #include "addrlib/addrinterface.h" -#include "os/os_thread.h" +#include "util/u_queue.h" #include struct amdgpu_cs; +#define AMDGPU_SLAB_MIN_SIZE_LOG2 9 +#define AMDGPU_SLAB_MAX_SIZE_LOG2 14 + struct amdgpu_winsys { struct radeon_winsys base; struct pipe_reference reference; struct pb_cache bo_cache; + struct pb_slabs bo_slabs; amdgpu_device_handle dev; @@ -53,25 +58,24 @@ uint32_t next_bo_unique_id; uint64_t allocated_vram; uint64_t allocated_gtt; + uint64_t mapped_vram; + uint64_t mapped_gtt; uint64_t buffer_wait_time; /* time spent in buffer_wait in ns */ - uint64_t num_cs_flushes; + uint64_t num_gfx_IBs; + uint64_t num_sdma_IBs; struct radeon_info info; /* multithreaded IB submission */ - pipe_mutex cs_queue_lock; - pipe_semaphore cs_queue_has_space; - pipe_semaphore cs_queued; - pipe_thread thread; - int kill_thread; - int num_enqueued_cs; - struct amdgpu_cs *cs_queue[8]; + struct util_queue cs_queue; struct amdgpu_gpu_info amdinfo; ADDR_HANDLE addrlib; uint32_t rev_id; unsigned family; + bool check_vm; + /* List of all allocated buffers */ pipe_mutex global_bo_list_lock; struct list_head global_bo_list; @@ -84,7 +88,6 @@ return (struct amdgpu_winsys*)base; } -void amdgpu_ws_queue_cs(struct amdgpu_winsys *ws, struct amdgpu_cs *cs); void amdgpu_surface_init_functions(struct amdgpu_winsys *ws); ADDR_HANDLE amdgpu_addr_create(struct amdgpu_winsys *ws); diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/Makefile.am mesa-17.0.7/src/gallium/winsys/amdgpu/drm/Makefile.am --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -4,14 +4,11 @@ AM_CFLAGS = \ $(GALLIUM_WINSYS_CFLAGS) \ $(AMDGPU_CFLAGS) \ - -I$(srcdir)/addrlib \ - -I$(srcdir)/addrlib/core \ - -I$(srcdir)/addrlib/inc/chip/r800 \ - -I$(srcdir)/addrlib/r800/chip \ - -DBRAHMA_BUILD=1 + -I$(top_srcdir)/src/amd/ AM_CXXFLAGS = $(AM_CFLAGS) noinst_LTLIBRARIES = libamdgpuwinsys.la +libamdgpuwinsys_la_LIBADD = $(top_builddir)/src/amd/addrlib/libamdgpu_addrlib.la libamdgpuwinsys_la_SOURCES = $(C_SOURCES) diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/Makefile.in mesa-17.0.7/src/gallium/winsys/amdgpu/drm/Makefile.in --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/Makefile.in 2017-01-24 01:41:51.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/Makefile.in 2017-06-01 10:37:22.000000000 +0000 @@ -89,10 +89,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -115,13 +118,10 @@ CONFIG_CLEAN_FILES = CONFIG_CLEAN_VPATH_FILES = LTLIBRARIES = $(noinst_LTLIBRARIES) -libamdgpuwinsys_la_LIBADD = -am__dirstamp = $(am__leading_dot)dirstamp -am__objects_1 = addrlib/addrinterface.lo addrlib/core/addrelemlib.lo \ - addrlib/core/addrlib.lo addrlib/core/addrobject.lo \ - addrlib/r800/ciaddrlib.lo addrlib/r800/egbaddrlib.lo \ - addrlib/r800/siaddrlib.lo amdgpu_bo.lo amdgpu_cs.lo \ - amdgpu_surface.lo amdgpu_winsys.lo +libamdgpuwinsys_la_DEPENDENCIES = \ + $(top_builddir)/src/amd/addrlib/libamdgpu_addrlib.la +am__objects_1 = amdgpu_bo.lo amdgpu_cs.lo amdgpu_surface.lo \ + amdgpu_winsys.lo am_libamdgpuwinsys_la_OBJECTS = $(am__objects_1) libamdgpuwinsys_la_OBJECTS = $(am_libamdgpuwinsys_la_OBJECTS) AM_V_lt = $(am__v_lt_@AM_V@) @@ -162,24 +162,6 @@ am__v_CCLD_ = $(am__v_CCLD_@AM_DEFAULT_V@) am__v_CCLD_0 = @echo " CCLD " $@; am__v_CCLD_1 = -CXXCOMPILE = $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) \ - $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CXXFLAGS) $(CXXFLAGS) -LTCXXCOMPILE = $(LIBTOOL) $(AM_V_lt) --tag=CXX $(AM_LIBTOOLFLAGS) \ - $(LIBTOOLFLAGS) --mode=compile $(CXX) $(DEFS) \ - $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) \ - $(AM_CXXFLAGS) $(CXXFLAGS) -AM_V_CXX = $(am__v_CXX_@AM_V@) -am__v_CXX_ = $(am__v_CXX_@AM_DEFAULT_V@) -am__v_CXX_0 = @echo " CXX " $@; -am__v_CXX_1 = -CXXLD = $(CXX) -CXXLINK = $(LIBTOOL) $(AM_V_lt) --tag=CXX $(AM_LIBTOOLFLAGS) \ - $(LIBTOOLFLAGS) --mode=link $(CXXLD) $(AM_CXXFLAGS) \ - $(CXXFLAGS) $(AM_LDFLAGS) $(LDFLAGS) -o $@ -AM_V_CXXLD = $(am__v_CXXLD_@AM_V@) -am__v_CXXLD_ = $(am__v_CXXLD_@AM_DEFAULT_V@) -am__v_CXXLD_0 = @echo " CXXLD " $@; -am__v_CXXLD_1 = SOURCES = $(libamdgpuwinsys_la_SOURCES) DIST_SOURCES = $(libamdgpuwinsys_la_SOURCES) am__can_run_installinfo = \ @@ -215,6 +197,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -229,6 +213,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -258,10 +243,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -311,11 +297,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -355,8 +338,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -393,8 +374,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -403,7 +382,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -411,13 +389,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -446,6 +425,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -509,30 +489,10 @@ top_builddir = @top_builddir@ top_srcdir = @top_srcdir@ C_SOURCES := \ - addrlib/addrinterface.cpp \ - addrlib/addrinterface.h \ - addrlib/addrtypes.h \ - addrlib/core/addrcommon.h \ - addrlib/core/addrelemlib.cpp \ - addrlib/core/addrelemlib.h \ - addrlib/core/addrlib.cpp \ - addrlib/core/addrlib.h \ - addrlib/core/addrobject.cpp \ - addrlib/core/addrobject.h \ - addrlib/inc/chip/r800/si_gb_reg.h \ - addrlib/inc/lnx_common_defs.h \ - addrlib/r800/chip/si_ci_vi_merged_enum.h \ - addrlib/r800/ciaddrlib.cpp \ - addrlib/r800/ciaddrlib.h \ - addrlib/r800/egbaddrlib.cpp \ - addrlib/r800/egbaddrlib.h \ - addrlib/r800/siaddrlib.cpp \ - addrlib/r800/siaddrlib.h \ amdgpu_bo.c \ amdgpu_bo.h \ amdgpu_cs.c \ amdgpu_cs.h \ - amdgpu_id.h \ amdgpu_public.h \ amdgpu_surface.c \ amdgpu_winsys.c \ @@ -585,12 +545,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -602,23 +558,20 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ $(GALLIUM_WINSYS_CFLAGS) \ $(AMDGPU_CFLAGS) \ - -I$(srcdir)/addrlib \ - -I$(srcdir)/addrlib/core \ - -I$(srcdir)/addrlib/inc/chip/r800 \ - -I$(srcdir)/addrlib/r800/chip \ - -DBRAHMA_BUILD=1 + -I$(top_srcdir)/src/amd/ AM_CXXFLAGS = $(AM_CFLAGS) noinst_LTLIBRARIES = libamdgpuwinsys.la +libamdgpuwinsys_la_LIBADD = $(top_builddir)/src/amd/addrlib/libamdgpu_addrlib.la libamdgpuwinsys_la_SOURCES = $(C_SOURCES) all: all-am .SUFFIXES: -.SUFFIXES: .c .cpp .lo .o .obj +.SUFFIXES: .c .lo .o .obj $(srcdir)/Makefile.in: $(srcdir)/Makefile.am $(srcdir)/Makefile.sources $(top_srcdir)/src/gallium/Automake.inc $(am__configure_deps) @for dep in $?; do \ case '$(am__configure_deps)' in \ @@ -660,50 +613,12 @@ echo rm -f $${locs}; \ rm -f $${locs}; \ } -addrlib/$(am__dirstamp): - @$(MKDIR_P) addrlib - @: > addrlib/$(am__dirstamp) -addrlib/$(DEPDIR)/$(am__dirstamp): - @$(MKDIR_P) addrlib/$(DEPDIR) - @: > addrlib/$(DEPDIR)/$(am__dirstamp) -addrlib/addrinterface.lo: addrlib/$(am__dirstamp) \ - addrlib/$(DEPDIR)/$(am__dirstamp) -addrlib/core/$(am__dirstamp): - @$(MKDIR_P) addrlib/core - @: > addrlib/core/$(am__dirstamp) -addrlib/core/$(DEPDIR)/$(am__dirstamp): - @$(MKDIR_P) addrlib/core/$(DEPDIR) - @: > addrlib/core/$(DEPDIR)/$(am__dirstamp) -addrlib/core/addrelemlib.lo: addrlib/core/$(am__dirstamp) \ - addrlib/core/$(DEPDIR)/$(am__dirstamp) -addrlib/core/addrlib.lo: addrlib/core/$(am__dirstamp) \ - addrlib/core/$(DEPDIR)/$(am__dirstamp) -addrlib/core/addrobject.lo: addrlib/core/$(am__dirstamp) \ - addrlib/core/$(DEPDIR)/$(am__dirstamp) -addrlib/r800/$(am__dirstamp): - @$(MKDIR_P) addrlib/r800 - @: > addrlib/r800/$(am__dirstamp) -addrlib/r800/$(DEPDIR)/$(am__dirstamp): - @$(MKDIR_P) addrlib/r800/$(DEPDIR) - @: > addrlib/r800/$(DEPDIR)/$(am__dirstamp) -addrlib/r800/ciaddrlib.lo: addrlib/r800/$(am__dirstamp) \ - addrlib/r800/$(DEPDIR)/$(am__dirstamp) -addrlib/r800/egbaddrlib.lo: addrlib/r800/$(am__dirstamp) \ - addrlib/r800/$(DEPDIR)/$(am__dirstamp) -addrlib/r800/siaddrlib.lo: addrlib/r800/$(am__dirstamp) \ - addrlib/r800/$(DEPDIR)/$(am__dirstamp) libamdgpuwinsys.la: $(libamdgpuwinsys_la_OBJECTS) $(libamdgpuwinsys_la_DEPENDENCIES) $(EXTRA_libamdgpuwinsys_la_DEPENDENCIES) - $(AM_V_CXXLD)$(CXXLINK) $(libamdgpuwinsys_la_OBJECTS) $(libamdgpuwinsys_la_LIBADD) $(LIBS) + $(AM_V_CCLD)$(LINK) $(libamdgpuwinsys_la_OBJECTS) $(libamdgpuwinsys_la_LIBADD) $(LIBS) mostlyclean-compile: -rm -f *.$(OBJEXT) - -rm -f addrlib/*.$(OBJEXT) - -rm -f addrlib/*.lo - -rm -f addrlib/core/*.$(OBJEXT) - -rm -f addrlib/core/*.lo - -rm -f addrlib/r800/*.$(OBJEXT) - -rm -f addrlib/r800/*.lo distclean-compile: -rm -f *.tab.c @@ -712,13 +627,6 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/amdgpu_cs.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/amdgpu_surface.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/amdgpu_winsys.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@addrlib/$(DEPDIR)/addrinterface.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@addrlib/core/$(DEPDIR)/addrelemlib.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@addrlib/core/$(DEPDIR)/addrlib.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@addrlib/core/$(DEPDIR)/addrobject.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@addrlib/r800/$(DEPDIR)/ciaddrlib.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@addrlib/r800/$(DEPDIR)/egbaddrlib.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@addrlib/r800/$(DEPDIR)/siaddrlib.Plo@am__quote@ .c.o: @am__fastdepCC_TRUE@ $(AM_V_CC)depbase=`echo $@ | sed 's|[^/]*$$|$(DEPDIR)/&|;s|\.o$$||'`;\ @@ -744,38 +652,11 @@ @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(LTCOMPILE) -c -o $@ $< -.cpp.o: -@am__fastdepCXX_TRUE@ $(AM_V_CXX)depbase=`echo $@ | sed 's|[^/]*$$|$(DEPDIR)/&|;s|\.o$$||'`;\ -@am__fastdepCXX_TRUE@ $(CXXCOMPILE) -MT $@ -MD -MP -MF $$depbase.Tpo -c -o $@ $< &&\ -@am__fastdepCXX_TRUE@ $(am__mv) $$depbase.Tpo $$depbase.Po -@AMDEP_TRUE@@am__fastdepCXX_FALSE@ $(AM_V_CXX)source='$<' object='$@' libtool=no @AMDEPBACKSLASH@ -@AMDEP_TRUE@@am__fastdepCXX_FALSE@ DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) @AMDEPBACKSLASH@ -@am__fastdepCXX_FALSE@ $(AM_V_CXX@am__nodep@)$(CXXCOMPILE) -c -o $@ $< - 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mostlyclean-libtool: -rm -f *.lo clean-libtool: -rm -rf .libs _libs - -rm -rf addrlib/.libs addrlib/_libs - -rm -rf addrlib/core/.libs addrlib/core/_libs - -rm -rf addrlib/r800/.libs addrlib/r800/_libs ID: $(am__tagged_files) $(am__define_uniq_tagged_files); mkid -fID $$unique @@ -889,12 +770,6 @@ distclean-generic: -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES) -test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES) - -rm -f addrlib/$(DEPDIR)/$(am__dirstamp) - -rm -f addrlib/$(am__dirstamp) - -rm -f addrlib/core/$(DEPDIR)/$(am__dirstamp) - -rm -f addrlib/core/$(am__dirstamp) - -rm -f addrlib/r800/$(DEPDIR)/$(am__dirstamp) - -rm -f addrlib/r800/$(am__dirstamp) maintainer-clean-generic: @echo "This command is intended for maintainers to use" @@ -905,7 +780,7 @@ mostlyclean-am distclean: distclean-am - -rm -rf ./$(DEPDIR) addrlib/$(DEPDIR) addrlib/core/$(DEPDIR) addrlib/r800/$(DEPDIR) + -rm -rf ./$(DEPDIR) -rm -f Makefile distclean-am: clean-am distclean-compile distclean-generic \ distclean-tags @@ -951,7 +826,7 @@ installcheck-am: maintainer-clean: maintainer-clean-am - -rm -rf ./$(DEPDIR) addrlib/$(DEPDIR) addrlib/core/$(DEPDIR) addrlib/r800/$(DEPDIR) + -rm -rf ./$(DEPDIR) -rm -f Makefile maintainer-clean-am: distclean-am maintainer-clean-generic diff -Nru mesa-12.0.6/src/gallium/winsys/amdgpu/drm/Makefile.sources mesa-17.0.7/src/gallium/winsys/amdgpu/drm/Makefile.sources --- mesa-12.0.6/src/gallium/winsys/amdgpu/drm/Makefile.sources 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/amdgpu/drm/Makefile.sources 2017-06-01 10:37:10.000000000 +0000 @@ -1,28 +1,8 @@ C_SOURCES := \ - addrlib/addrinterface.cpp \ - addrlib/addrinterface.h \ - addrlib/addrtypes.h \ - addrlib/core/addrcommon.h \ - addrlib/core/addrelemlib.cpp \ - addrlib/core/addrelemlib.h \ - addrlib/core/addrlib.cpp \ - addrlib/core/addrlib.h \ - addrlib/core/addrobject.cpp \ - addrlib/core/addrobject.h \ - addrlib/inc/chip/r800/si_gb_reg.h \ - addrlib/inc/lnx_common_defs.h \ - addrlib/r800/chip/si_ci_vi_merged_enum.h \ - addrlib/r800/ciaddrlib.cpp \ - addrlib/r800/ciaddrlib.h \ - addrlib/r800/egbaddrlib.cpp \ - addrlib/r800/egbaddrlib.h \ - addrlib/r800/siaddrlib.cpp \ - addrlib/r800/siaddrlib.h \ amdgpu_bo.c \ amdgpu_bo.h \ amdgpu_cs.c \ amdgpu_cs.h \ - amdgpu_id.h \ amdgpu_public.h \ amdgpu_surface.c \ amdgpu_winsys.c \ diff -Nru mesa-12.0.6/src/gallium/winsys/etnaviv/drm/etnaviv_drm_public.h mesa-17.0.7/src/gallium/winsys/etnaviv/drm/etnaviv_drm_public.h --- mesa-12.0.6/src/gallium/winsys/etnaviv/drm/etnaviv_drm_public.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/etnaviv/drm/etnaviv_drm_public.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Christian Gmeiner + */ + +#ifndef __ETNA_DRM_PUBLIC_H__ +#define __ETNA_DRM_PUBLIC_H__ + +struct pipe_screen; +struct renderonly; + +struct pipe_screen * +etna_drm_screen_create_renderonly(struct renderonly *ro); + +struct pipe_screen * +etna_drm_screen_create(int fd); + +#endif diff -Nru mesa-12.0.6/src/gallium/winsys/etnaviv/drm/etnaviv_drm_winsys.c mesa-17.0.7/src/gallium/winsys/etnaviv/drm/etnaviv_drm_winsys.c --- mesa-12.0.6/src/gallium/winsys/etnaviv/drm/etnaviv_drm_winsys.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/etnaviv/drm/etnaviv_drm_winsys.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,162 @@ +/* + * Copyright (c) 2015 Etnaviv Project + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Christian Gmeiner + */ + +#include + +#include "util/u_hash_table.h" +#include "util/u_memory.h" + +#include "etnaviv/etnaviv_screen.h" +#include "etnaviv/hw/common.xml.h" +#include "etnaviv_drm_public.h" + +#include + +static struct pipe_screen * +screen_create(struct renderonly *ro) +{ + struct etna_device *dev; + struct etna_gpu *gpu; + uint64_t val; + int i; + + dev = etna_device_new_dup(ro->gpu_fd); + if (!dev) { + fprintf(stderr, "Error creating device\n"); + return NULL; + } + + for (i = 0;; i++) { + gpu = etna_gpu_new(dev, i); + if (!gpu) { + fprintf(stderr, "Error creating gpu\n"); + return NULL; + } + + /* Look for a 3D capable GPU */ + int ret = etna_gpu_get_param(gpu, ETNA_GPU_FEATURES_0, &val); + if (ret == 0 && (val & chipFeatures_PIPE_3D)) + break; + + etna_gpu_del(gpu); + } + + return etna_screen_create(dev, gpu, ro); +} + +static struct util_hash_table *etna_tab = NULL; + +pipe_static_mutex(etna_screen_mutex); + +static void +etna_drm_screen_destroy(struct pipe_screen *pscreen) +{ + struct etna_screen *screen = etna_screen(pscreen); + boolean destroy; + + pipe_mutex_lock(etna_screen_mutex); + destroy = --screen->refcnt == 0; + if (destroy) { + int fd = etna_device_fd(screen->dev); + util_hash_table_remove(etna_tab, intptr_to_pointer(fd)); + } + pipe_mutex_unlock(etna_screen_mutex); + + if (destroy) { + pscreen->destroy = screen->winsys_priv; + pscreen->destroy(pscreen); + } +} + +static unsigned hash_fd(void *key) +{ + int fd = pointer_to_intptr(key); + struct stat stat; + + fstat(fd, &stat); + + return stat.st_dev ^ stat.st_ino ^ stat.st_rdev; +} + +static int compare_fd(void *key1, void *key2) +{ + int fd1 = pointer_to_intptr(key1); + int fd2 = pointer_to_intptr(key2); + struct stat stat1, stat2; + + fstat(fd1, &stat1); + fstat(fd2, &stat2); + + return stat1.st_dev != stat2.st_dev || + stat1.st_ino != stat2.st_ino || + stat1.st_rdev != stat2.st_rdev; +} + +struct pipe_screen * +etna_drm_screen_create_renderonly(struct renderonly *ro) +{ + struct pipe_screen *pscreen = NULL; + + pipe_mutex_lock(etna_screen_mutex); + if (!etna_tab) { + etna_tab = util_hash_table_create(hash_fd, compare_fd); + if (!etna_tab) + goto unlock; + } + + pscreen = util_hash_table_get(etna_tab, intptr_to_pointer(ro->gpu_fd)); + if (pscreen) { + etna_screen(pscreen)->refcnt++; + } else { + pscreen = screen_create(ro); + if (pscreen) { + int fd = etna_device_fd(etna_screen(pscreen)->dev); + util_hash_table_set(etna_tab, intptr_to_pointer(fd), pscreen); + + /* Bit of a hack, to avoid circular linkage dependency, + * ie. pipe driver having to call in to winsys, we + * override the pipe drivers screen->destroy() */ + etna_screen(pscreen)->winsys_priv = pscreen->destroy; + pscreen->destroy = etna_drm_screen_destroy; + } + } + +unlock: + pipe_mutex_unlock(etna_screen_mutex); + return pscreen; +} + +struct pipe_screen * +etna_drm_screen_create(int fd) +{ + struct renderonly ro = { + .create_for_resource = renderonly_create_gpu_import_for_resource, + .kms_fd = -1, + .gpu_fd = fd + }; + + return etna_drm_screen_create_renderonly(&ro); +} diff -Nru mesa-12.0.6/src/gallium/winsys/etnaviv/drm/Makefile.am mesa-17.0.7/src/gallium/winsys/etnaviv/drm/Makefile.am --- mesa-12.0.6/src/gallium/winsys/etnaviv/drm/Makefile.am 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/etnaviv/drm/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,33 @@ +# Copyright © 2012 Intel Corporation +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT +# HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +# DEALINGS IN THE SOFTWARE. + +include Makefile.sources +include $(top_srcdir)/src/gallium/Automake.inc + +AM_CFLAGS = \ + -I$(top_srcdir)/src/gallium/drivers \ + $(GALLIUM_CFLAGS) \ + $(ETNAVIV_CFLAGS) + +noinst_LTLIBRARIES = libetnavivdrm.la + +libetnavivdrm_la_SOURCES = $(C_SOURCES) diff -Nru mesa-12.0.6/src/gallium/winsys/etnaviv/drm/Makefile.in mesa-17.0.7/src/gallium/winsys/etnaviv/drm/Makefile.in --- mesa-12.0.6/src/gallium/winsys/etnaviv/drm/Makefile.in 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/etnaviv/drm/Makefile.in 2017-06-01 10:37:22.000000000 +0000 @@ -0,0 +1,878 @@ +# Makefile.in generated by automake 1.15 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994-2014 Free Software Foundation, Inc. + +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +# PARTICULAR PURPOSE. + +@SET_MAKE@ + +# Copyright © 2012 Intel Corporation +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +# NONINFRINGEMENT. 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-rm -rf ./$(DEPDIR) + -rm -f Makefile +distclean-am: clean-am distclean-compile distclean-generic \ + distclean-tags + +dvi: dvi-am + +dvi-am: + +html: html-am + +html-am: + +info: info-am + +info-am: + +install-data-am: + +install-dvi: install-dvi-am + +install-dvi-am: + +install-exec-am: + +install-html: install-html-am + +install-html-am: + +install-info: install-info-am + +install-info-am: + +install-man: + +install-pdf: install-pdf-am + +install-pdf-am: + +install-ps: install-ps-am + +install-ps-am: + +installcheck-am: + +maintainer-clean: maintainer-clean-am + -rm -rf ./$(DEPDIR) + -rm -f Makefile +maintainer-clean-am: distclean-am maintainer-clean-generic + +mostlyclean: mostlyclean-am + +mostlyclean-am: mostlyclean-compile mostlyclean-generic \ + mostlyclean-libtool + +pdf: pdf-am + +pdf-am: + +ps: ps-am + +ps-am: + +uninstall-am: + +.MAKE: install-am install-strip + +.PHONY: CTAGS GTAGS TAGS all all-am check check-am clean clean-generic \ + clean-libtool clean-noinstLTLIBRARIES cscopelist-am ctags \ + ctags-am distclean distclean-compile distclean-generic \ + distclean-libtool distclean-tags distdir dvi dvi-am html \ + html-am info info-am install install-am install-data \ + install-data-am install-dvi install-dvi-am install-exec \ + install-exec-am install-html install-html-am install-info \ + install-info-am install-man install-pdf install-pdf-am \ + install-ps install-ps-am install-strip installcheck \ + installcheck-am installdirs maintainer-clean \ + maintainer-clean-generic mostlyclean mostlyclean-compile \ + mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \ + tags tags-am uninstall uninstall-am + +.PRECIOUS: Makefile + + +# Tell versions [3.59,3.63) of GNU make to not export all variables. +# Otherwise a system limit (for SysV at least) may be exceeded. +.NOEXPORT: diff -Nru mesa-12.0.6/src/gallium/winsys/etnaviv/drm/Makefile.sources mesa-17.0.7/src/gallium/winsys/etnaviv/drm/Makefile.sources --- mesa-12.0.6/src/gallium/winsys/etnaviv/drm/Makefile.sources 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/etnaviv/drm/Makefile.sources 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,3 @@ +C_SOURCES := \ + etnaviv_drm_public.h \ + etnaviv_drm_winsys.c diff -Nru mesa-12.0.6/src/gallium/winsys/freedreno/drm/Makefile.in mesa-17.0.7/src/gallium/winsys/freedreno/drm/Makefile.in --- mesa-12.0.6/src/gallium/winsys/freedreno/drm/Makefile.in 2017-01-24 01:41:51.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/freedreno/drm/Makefile.in 2017-06-01 10:37:22.000000000 +0000 @@ -111,10 +111,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -214,6 +217,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -228,6 +233,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -257,10 +263,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -310,11 +317,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -354,8 +358,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -392,8 +394,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -402,7 +402,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -410,13 +409,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -445,6 +445,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -558,12 +559,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -575,7 +572,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ -I$(top_srcdir)/src/gallium/drivers \ $(GALLIUM_WINSYS_CFLAGS) \ diff -Nru mesa-12.0.6/src/gallium/winsys/i915/drm/i915_drm_buffer.c mesa-17.0.7/src/gallium/winsys/i915/drm/i915_drm_buffer.c --- mesa-12.0.6/src/gallium/winsys/i915/drm/i915_drm_buffer.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/i915/drm/i915_drm_buffer.c 2017-06-01 10:37:10.000000000 +0000 @@ -153,6 +153,12 @@ whandle->handle = buf->flink; } else if (whandle->type == DRM_API_HANDLE_TYPE_KMS) { whandle->handle = buf->bo->handle; + } else if (whandle->type == DRM_API_HANDLE_TYPE_FD) { + int fd; + + if (drm_intel_bo_gem_export_to_prime(buf->bo, &fd)) + return FALSE; + whandle->handle = fd; } else { assert(!"unknown usage"); return FALSE; diff -Nru mesa-12.0.6/src/gallium/winsys/i915/drm/Makefile.in mesa-17.0.7/src/gallium/winsys/i915/drm/Makefile.in --- mesa-12.0.6/src/gallium/winsys/i915/drm/Makefile.in 2017-01-24 01:41:51.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/i915/drm/Makefile.in 2017-06-01 10:37:22.000000000 +0000 @@ -111,10 +111,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -215,6 +218,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -229,6 +234,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -258,10 +264,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -311,11 +318,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -355,8 +359,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -393,8 +395,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -403,7 +403,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -411,13 +410,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -446,6 +446,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -563,12 +564,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -580,7 +577,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ -I$(top_srcdir)/src/gallium/drivers \ $(GALLIUM_WINSYS_CFLAGS) \ diff -Nru mesa-12.0.6/src/gallium/winsys/imx/drm/imx_drm_public.h mesa-17.0.7/src/gallium/winsys/imx/drm/imx_drm_public.h --- mesa-12.0.6/src/gallium/winsys/imx/drm/imx_drm_public.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/imx/drm/imx_drm_public.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2016 Christian Gmeiner + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Christian Gmeiner + */ + +#ifndef __IMX_DRM_PUBLIC_H__ +#define __IMX_DRM_PUBLIC_H__ + +struct pipe_screen; + +struct pipe_screen *imx_drm_screen_create(int fd); + +#endif /* __IMX_DRM_PUBLIC_H__ */ diff -Nru mesa-12.0.6/src/gallium/winsys/imx/drm/imx_drm_winsys.c mesa-17.0.7/src/gallium/winsys/imx/drm/imx_drm_winsys.c --- mesa-12.0.6/src/gallium/winsys/imx/drm/imx_drm_winsys.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/imx/drm/imx_drm_winsys.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2016 Christian Gmeiner + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: + * Christian Gmeiner + */ + +#include "imx_drm_public.h" +#include "etnaviv/drm/etnaviv_drm_public.h" +#include "renderonly/renderonly.h" + +#include +#include + +struct pipe_screen *imx_drm_screen_create(int fd) +{ + struct renderonly ro = { + .create_for_resource = renderonly_create_kms_dumb_buffer_for_resource, + .kms_fd = fd, + .gpu_fd = open("/dev/dri/renderD128", O_RDWR | O_CLOEXEC) + }; + + if (ro.gpu_fd < 0) + return NULL; + + struct pipe_screen *screen = etna_drm_screen_create_renderonly(&ro); + if (!screen) + close(ro.gpu_fd); + + return screen; +} diff -Nru mesa-12.0.6/src/gallium/winsys/imx/drm/Makefile.am mesa-17.0.7/src/gallium/winsys/imx/drm/Makefile.am --- mesa-12.0.6/src/gallium/winsys/imx/drm/Makefile.am 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/imx/drm/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,33 @@ +# Copyright © 2012 Intel Corporation +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT +# HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +# DEALINGS IN THE SOFTWARE. + +include Makefile.sources +include $(top_srcdir)/src/gallium/Automake.inc + +AM_CFLAGS = \ + -I$(top_srcdir)/src/gallium/drivers \ + -I$(top_srcdir)/src/gallium/winsys \ + $(GALLIUM_WINSYS_CFLAGS) + +noinst_LTLIBRARIES = libimxdrm.la + +libimxdrm_la_SOURCES = $(C_SOURCES) diff -Nru mesa-12.0.6/src/gallium/winsys/imx/drm/Makefile.in mesa-17.0.7/src/gallium/winsys/imx/drm/Makefile.in --- mesa-12.0.6/src/gallium/winsys/imx/drm/Makefile.in 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/imx/drm/Makefile.in 2017-06-01 10:37:22.000000000 +0000 @@ -0,0 +1,878 @@ +# Makefile.in generated by automake 1.15 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994-2014 Free Software Foundation, Inc. + +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +# PARTICULAR PURPOSE. + +@SET_MAKE@ + +# Copyright © 2012 Intel Corporation +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +# NONINFRINGEMENT. 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= @am__leading_dot@ +am__quote = @am__quote@ +am__tar = @am__tar@ +am__untar = @am__untar@ +ax_pthread_config = @ax_pthread_config@ +bindir = @bindir@ +build = @build@ +build_alias = @build_alias@ +build_cpu = @build_cpu@ +build_os = @build_os@ +build_vendor = @build_vendor@ +builddir = @builddir@ +datadir = @datadir@ +datarootdir = @datarootdir@ +docdir = @docdir@ +dvidir = @dvidir@ +exec_prefix = @exec_prefix@ +host = @host@ +host_alias = @host_alias@ +host_cpu = @host_cpu@ +host_os = @host_os@ +host_vendor = @host_vendor@ +htmldir = @htmldir@ +ifGNUmake = @ifGNUmake@ +includedir = @includedir@ +infodir = @infodir@ +install_sh = @install_sh@ +libdir = @libdir@ +libexecdir = @libexecdir@ +localedir = @localedir@ +localstatedir = @localstatedir@ +mandir = @mandir@ +mkdir_p = @mkdir_p@ +oldincludedir = @oldincludedir@ +pdfdir = @pdfdir@ +prefix = @prefix@ +program_transform_name = @program_transform_name@ +psdir = @psdir@ +sbindir = @sbindir@ +sharedstatedir = @sharedstatedir@ +srcdir = @srcdir@ +sysconfdir = @sysconfdir@ +target = @target@ +target_alias = @target_alias@ +target_cpu = @target_cpu@ +target_os = @target_os@ +target_vendor = @target_vendor@ +top_build_prefix = @top_build_prefix@ +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ +C_SOURCES := \ + imx_drm_public.h \ + imx_drm_winsys.c + +GALLIUM_CFLAGS = \ + -I$(top_srcdir)/include \ + -I$(top_srcdir)/src \ + -I$(top_srcdir)/src/gallium/include \ + -I$(top_srcdir)/src/gallium/auxiliary \ + $(DEFINES) + + +# src/gallium/auxiliary must appear before src/gallium/drivers +# because there are stupidly two rbug_context.h files in +# different directories, and which one is included by the +# preprocessor is determined by the ordering of the -I flags. +GALLIUM_DRIVER_CFLAGS = \ + -I$(srcdir)/include \ + -I$(top_srcdir)/src \ + -I$(top_srcdir)/include \ + -I$(top_srcdir)/src/gallium/include \ + -I$(top_srcdir)/src/gallium/auxiliary \ + -I$(top_srcdir)/src/gallium/drivers \ + -I$(top_srcdir)/src/gallium/winsys \ + $(DEFINES) \ + $(VISIBILITY_CFLAGS) + +GALLIUM_DRIVER_CXXFLAGS = \ + -I$(srcdir)/include \ + -I$(top_srcdir)/src \ + -I$(top_srcdir)/include \ + -I$(top_srcdir)/src/gallium/include \ + -I$(top_srcdir)/src/gallium/auxiliary \ + -I$(top_srcdir)/src/gallium/drivers \ + -I$(top_srcdir)/src/gallium/winsys \ + $(DEFINES) \ + $(VISIBILITY_CXXFLAGS) + +GALLIUM_TARGET_CFLAGS = \ + -I$(top_srcdir)/src \ + -I$(top_srcdir)/include \ + -I$(top_srcdir)/src/loader \ + -I$(top_srcdir)/src/gallium/include \ + -I$(top_srcdir)/src/gallium/auxiliary \ + -I$(top_srcdir)/src/gallium/drivers \ + -I$(top_srcdir)/src/gallium/winsys \ + $(DEFINES) \ + $(PTHREAD_CFLAGS) \ + $(LIBDRM_CFLAGS) \ + $(VISIBILITY_CFLAGS) + +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) +GALLIUM_WINSYS_CFLAGS = \ + -I$(top_srcdir)/src \ + -I$(top_srcdir)/include \ + -I$(top_srcdir)/src/gallium/include \ + -I$(top_srcdir)/src/gallium/auxiliary \ + $(DEFINES) \ + $(VISIBILITY_CFLAGS) + +GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ + $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ + $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ + $(am__append_2) $(am__append_3) +AM_CFLAGS = \ + -I$(top_srcdir)/src/gallium/drivers \ + -I$(top_srcdir)/src/gallium/winsys \ + $(GALLIUM_WINSYS_CFLAGS) + +noinst_LTLIBRARIES = libimxdrm.la +libimxdrm_la_SOURCES = $(C_SOURCES) +all: all-am + +.SUFFIXES: +.SUFFIXES: .c .lo .o .obj +$(srcdir)/Makefile.in: $(srcdir)/Makefile.am $(srcdir)/Makefile.sources $(top_srcdir)/src/gallium/Automake.inc $(am__configure_deps) + @for dep in $?; do \ + case '$(am__configure_deps)' in \ + *$$dep*) \ + ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \ + && { if test -f $@; then exit 0; else break; fi; }; \ + exit 1;; \ + esac; \ + done; \ + echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign src/gallium/winsys/imx/drm/Makefile'; \ + $(am__cd) $(top_srcdir) && \ + $(AUTOMAKE) --foreign src/gallium/winsys/imx/drm/Makefile +Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status + @case '$?' in \ + *config.status*) \ + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \ + *) \ + echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \ + cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \ + esac; +$(srcdir)/Makefile.sources $(top_srcdir)/src/gallium/Automake.inc $(am__empty): + +$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh + +$(top_srcdir)/configure: $(am__configure_deps) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh +$(ACLOCAL_M4): $(am__aclocal_m4_deps) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh +$(am__aclocal_m4_deps): + +clean-noinstLTLIBRARIES: + -test -z "$(noinst_LTLIBRARIES)" || rm -f $(noinst_LTLIBRARIES) + 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clean-noinstLTLIBRARIES cscopelist-am ctags \ + ctags-am distclean distclean-compile distclean-generic \ + distclean-libtool distclean-tags distdir dvi dvi-am html \ + html-am info info-am install install-am install-data \ + install-data-am install-dvi install-dvi-am install-exec \ + install-exec-am install-html install-html-am install-info \ + install-info-am install-man install-pdf install-pdf-am \ + install-ps install-ps-am install-strip installcheck \ + installcheck-am installdirs maintainer-clean \ + maintainer-clean-generic mostlyclean mostlyclean-compile \ + mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \ + tags tags-am uninstall uninstall-am + +.PRECIOUS: Makefile + + +# Tell versions [3.59,3.63) of GNU make to not export all variables. +# Otherwise a system limit (for SysV at least) may be exceeded. +.NOEXPORT: diff -Nru mesa-12.0.6/src/gallium/winsys/imx/drm/Makefile.sources mesa-17.0.7/src/gallium/winsys/imx/drm/Makefile.sources --- mesa-12.0.6/src/gallium/winsys/imx/drm/Makefile.sources 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/imx/drm/Makefile.sources 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,3 @@ +C_SOURCES := \ + imx_drm_public.h \ + imx_drm_winsys.c diff -Nru mesa-12.0.6/src/gallium/winsys/intel/drm/Makefile.in mesa-17.0.7/src/gallium/winsys/intel/drm/Makefile.in --- mesa-12.0.6/src/gallium/winsys/intel/drm/Makefile.in 2017-01-24 01:41:52.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/intel/drm/Makefile.in 2017-06-01 10:37:22.000000000 +0000 @@ -112,10 +112,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -215,6 +218,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -229,6 +234,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -258,10 +264,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -311,11 +318,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -355,8 +359,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -393,8 +395,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -403,7 +403,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -411,13 +410,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -446,6 +446,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -559,12 +560,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -576,7 +573,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ -I$(top_srcdir)/src/gallium/drivers \ $(GALLIUM_WINSYS_CFLAGS) \ diff -Nru mesa-12.0.6/src/gallium/winsys/nouveau/drm/Makefile.in mesa-17.0.7/src/gallium/winsys/nouveau/drm/Makefile.in --- mesa-12.0.6/src/gallium/winsys/nouveau/drm/Makefile.in 2017-01-24 01:41:52.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/nouveau/drm/Makefile.in 2017-06-01 10:37:22.000000000 +0000 @@ -111,10 +111,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -214,6 +217,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -228,6 +233,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -257,10 +263,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -310,11 +317,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -354,8 +358,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -392,8 +394,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -402,7 +402,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -410,13 +409,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -445,6 +445,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -558,12 +559,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -575,7 +572,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ -I$(top_srcdir)/src/gallium/drivers \ $(GALLIUM_WINSYS_CFLAGS) \ diff -Nru mesa-12.0.6/src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c mesa-17.0.7/src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c --- mesa-12.0.6/src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c 2017-06-01 10:37:10.000000000 +0000 @@ -124,6 +124,7 @@ case 0x100: case 0x110: case 0x120: + case 0x130: init = nvc0_screen_create; break; default: diff -Nru mesa-12.0.6/src/gallium/winsys/radeon/drm/Makefile.in mesa-17.0.7/src/gallium/winsys/radeon/drm/Makefile.in --- mesa-12.0.6/src/gallium/winsys/radeon/drm/Makefile.in 2017-01-24 01:41:52.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/radeon/drm/Makefile.in 2017-06-01 10:37:22.000000000 +0000 @@ -89,10 +89,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -193,6 +196,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -207,6 +212,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -236,10 +242,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -289,11 +296,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -333,8 +337,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -371,8 +373,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -381,7 +381,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -389,13 +388,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -424,6 +424,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -543,12 +544,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -560,7 +557,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ $(GALLIUM_WINSYS_CFLAGS) \ $(RADEON_CFLAGS) diff -Nru mesa-12.0.6/src/gallium/winsys/radeon/drm/radeon_drm_bo.c mesa-17.0.7/src/gallium/winsys/radeon/drm/radeon_drm_bo.c --- mesa-12.0.6/src/gallium/winsys/radeon/drm/radeon_drm_bo.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/radeon/drm/radeon_drm_bo.c 2017-06-01 10:37:10.000000000 +0000 @@ -42,6 +42,13 @@ #include #include +static struct pb_buffer * +radeon_winsys_bo_create(struct radeon_winsys *rws, + uint64_t size, + unsigned alignment, + enum radeon_bo_domain domain, + enum radeon_bo_flag flags); + static inline struct radeon_bo *radeon_bo(struct pb_buffer *bo) { return (struct radeon_bo *)bo; @@ -53,7 +60,7 @@ uint64_t size; }; -static bool radeon_bo_is_busy(struct radeon_bo *bo) +static bool radeon_real_bo_is_busy(struct radeon_bo *bo) { struct drm_radeon_gem_busy args = {0}; @@ -62,7 +69,31 @@ &args, sizeof(args)) != 0; } -static void radeon_bo_wait_idle(struct radeon_bo *bo) +static bool radeon_bo_is_busy(struct radeon_bo *bo) +{ + unsigned num_idle; + bool busy = false; + + if (bo->handle) + return radeon_real_bo_is_busy(bo); + + pipe_mutex_lock(bo->rws->bo_fence_lock); + for (num_idle = 0; num_idle < bo->u.slab.num_fences; ++num_idle) { + if (radeon_real_bo_is_busy(bo->u.slab.fences[num_idle])) { + busy = true; + break; + } + radeon_bo_reference(&bo->u.slab.fences[num_idle], NULL); + } + memmove(&bo->u.slab.fences[0], &bo->u.slab.fences[num_idle], + (bo->u.slab.num_fences - num_idle) * sizeof(bo->u.slab.fences[0])); + bo->u.slab.num_fences -= num_idle; + pipe_mutex_unlock(bo->rws->bo_fence_lock); + + return busy; +} + +static void radeon_real_bo_wait_idle(struct radeon_bo *bo) { struct drm_radeon_gem_wait_idle args = {0}; @@ -71,6 +102,33 @@ &args, sizeof(args)) == -EBUSY); } +static void radeon_bo_wait_idle(struct radeon_bo *bo) +{ + if (bo->handle) { + radeon_real_bo_wait_idle(bo); + } else { + pipe_mutex_lock(bo->rws->bo_fence_lock); + while (bo->u.slab.num_fences) { + struct radeon_bo *fence = NULL; + radeon_bo_reference(&fence, bo->u.slab.fences[0]); + pipe_mutex_unlock(bo->rws->bo_fence_lock); + + /* Wait without holding the fence lock. */ + radeon_real_bo_wait_idle(fence); + + pipe_mutex_lock(bo->rws->bo_fence_lock); + if (bo->u.slab.num_fences && fence == bo->u.slab.fences[0]) { + radeon_bo_reference(&bo->u.slab.fences[0], NULL); + memmove(&bo->u.slab.fences[0], &bo->u.slab.fences[1], + (bo->u.slab.num_fences - 1) * sizeof(bo->u.slab.fences[0])); + bo->u.slab.num_fences--; + } + radeon_bo_reference(&fence, NULL); + } + pipe_mutex_unlock(bo->rws->bo_fence_lock); + } +} + static bool radeon_bo_wait(struct pb_buffer *_buf, uint64_t timeout, enum radeon_bo_usage usage) { @@ -128,8 +186,13 @@ args.handle = bo->handle; args.op = RADEON_GEM_OP_GET_INITIAL_DOMAIN; - drmCommandWriteRead(bo->rws->fd, DRM_RADEON_GEM_OP, - &args, sizeof(args)); + if (drmCommandWriteRead(bo->rws->fd, DRM_RADEON_GEM_OP, + &args, sizeof(args))) { + fprintf(stderr, "radeon: failed to get initial domain: %p 0x%08X\n", + bo, bo->handle); + /* Default domain as returned by get_valid_domain. */ + return RADEON_DOMAIN_VRAM_GTT; + } /* GEM domains and winsys domains are defined the same. */ return get_valid_domain(args.value); @@ -200,7 +263,7 @@ static void radeon_bomgr_free_va(struct radeon_drm_winsys *rws, uint64_t va, uint64_t size) { - struct radeon_bo_va_hole *hole; + struct radeon_bo_va_hole *hole = NULL; size = align(size, rws->info.gart_page_size); @@ -269,6 +332,8 @@ struct radeon_drm_winsys *rws = bo->rws; struct drm_gem_close args; + assert(bo->handle && "must not be called for slab entries"); + memset(&args, 0, sizeof(args)); pipe_mutex_lock(rws->bo_handles_mutex); @@ -279,8 +344,8 @@ } pipe_mutex_unlock(rws->bo_handles_mutex); - if (bo->ptr) - os_munmap(bo->ptr, bo->base.size); + if (bo->u.real.ptr) + os_munmap(bo->u.real.ptr, bo->base.size); if (rws->info.has_virtual_memory) { if (rws->va_unmap_working) { @@ -310,12 +375,20 @@ args.handle = bo->handle; drmIoctl(rws->fd, DRM_IOCTL_GEM_CLOSE, &args); - pipe_mutex_destroy(bo->map_mutex); + pipe_mutex_destroy(bo->u.real.map_mutex); if (bo->initial_domain & RADEON_DOMAIN_VRAM) rws->allocated_vram -= align(bo->base.size, rws->info.gart_page_size); else if (bo->initial_domain & RADEON_DOMAIN_GTT) rws->allocated_gtt -= align(bo->base.size, rws->info.gart_page_size); + + if (bo->u.real.map_count >= 1) { + if (bo->initial_domain & RADEON_DOMAIN_VRAM) + bo->rws->mapped_vram -= bo->base.size; + else + bo->rws->mapped_gtt -= bo->base.size; + } + FREE(bo); } @@ -323,8 +396,10 @@ { struct radeon_bo *bo = radeon_bo(_buf); - if (bo->use_reusable_pool) - pb_cache_add_buffer(&bo->cache_entry); + assert(bo->handle && "must not be called for slab entries"); + + if (bo->u.real.use_reusable_pool) + pb_cache_add_buffer(&bo->u.real.cache_entry); else radeon_bo_destroy(_buf); } @@ -333,18 +408,26 @@ { struct drm_radeon_gem_mmap args = {0}; void *ptr; + unsigned offset; /* If the buffer is created from user memory, return the user pointer. */ if (bo->user_ptr) return bo->user_ptr; + if (bo->handle) { + offset = 0; + } else { + offset = bo->va - bo->u.slab.real->va; + bo = bo->u.slab.real; + } + /* Map the buffer. */ - pipe_mutex_lock(bo->map_mutex); + pipe_mutex_lock(bo->u.real.map_mutex); /* Return the pointer if it's already mapped. */ - if (bo->ptr) { - bo->map_count++; - pipe_mutex_unlock(bo->map_mutex); - return bo->ptr; + if (bo->u.real.ptr) { + bo->u.real.map_count++; + pipe_mutex_unlock(bo->u.real.map_mutex); + return (uint8_t*)bo->u.real.ptr + offset; } args.handle = bo->handle; args.offset = 0; @@ -353,7 +436,7 @@ DRM_RADEON_GEM_MMAP, &args, sizeof(args))) { - pipe_mutex_unlock(bo->map_mutex); + pipe_mutex_unlock(bo->u.real.map_mutex); fprintf(stderr, "radeon: gem_mmap failed: %p 0x%08X\n", bo, bo->handle); return NULL; @@ -368,16 +451,21 @@ ptr = os_mmap(0, args.size, PROT_READ|PROT_WRITE, MAP_SHARED, bo->rws->fd, args.addr_ptr); if (ptr == MAP_FAILED) { - pipe_mutex_unlock(bo->map_mutex); + pipe_mutex_unlock(bo->u.real.map_mutex); fprintf(stderr, "radeon: mmap failed, errno: %i\n", errno); return NULL; } } - bo->ptr = ptr; - bo->map_count = 1; - pipe_mutex_unlock(bo->map_mutex); + bo->u.real.ptr = ptr; + bo->u.real.map_count = 1; - return bo->ptr; + if (bo->initial_domain & RADEON_DOMAIN_VRAM) + bo->rws->mapped_vram += bo->base.size; + else + bo->rws->mapped_gtt += bo->base.size; + + pipe_mutex_unlock(bo->u.real.map_mutex); + return (uint8_t*)bo->u.real.ptr + offset; } static void *radeon_bo_map(struct pb_buffer *buf, @@ -465,21 +553,30 @@ if (bo->user_ptr) return; - pipe_mutex_lock(bo->map_mutex); - if (!bo->ptr) { - pipe_mutex_unlock(bo->map_mutex); + if (!bo->handle) + bo = bo->u.slab.real; + + pipe_mutex_lock(bo->u.real.map_mutex); + if (!bo->u.real.ptr) { + pipe_mutex_unlock(bo->u.real.map_mutex); return; /* it's not been mapped */ } - assert(bo->map_count); - if (--bo->map_count) { - pipe_mutex_unlock(bo->map_mutex); + assert(bo->u.real.map_count); + if (--bo->u.real.map_count) { + pipe_mutex_unlock(bo->u.real.map_mutex); return; /* it's been mapped multiple times */ } - os_munmap(bo->ptr, bo->base.size); - bo->ptr = NULL; - pipe_mutex_unlock(bo->map_mutex); + os_munmap(bo->u.real.ptr, bo->base.size); + bo->u.real.ptr = NULL; + + if (bo->initial_domain & RADEON_DOMAIN_VRAM) + bo->rws->mapped_vram -= bo->base.size; + else + bo->rws->mapped_gtt -= bo->base.size; + + pipe_mutex_unlock(bo->u.real.map_mutex); } static const struct pb_vtbl radeon_bo_vtbl = { @@ -503,7 +600,8 @@ unsigned size, unsigned alignment, unsigned usage, unsigned initial_domains, - unsigned flags) + unsigned flags, + unsigned pb_cache_bucket) { struct radeon_bo *bo; struct drm_radeon_gem_create args; @@ -537,6 +635,8 @@ return NULL; } + assert(args.handle != 0); + bo = CALLOC_STRUCT(radeon_bo); if (!bo) return NULL; @@ -550,13 +650,17 @@ bo->handle = args.handle; bo->va = 0; bo->initial_domain = initial_domains; - pipe_mutex_init(bo->map_mutex); - pb_cache_init_entry(&rws->bo_cache, &bo->cache_entry, &bo->base); + bo->hash = __sync_fetch_and_add(&rws->next_bo_hash, 1); + pipe_mutex_init(bo->u.real.map_mutex); + pb_cache_init_entry(&rws->bo_cache, &bo->u.real.cache_entry, &bo->base, + pb_cache_bucket); if (rws->info.has_virtual_memory) { struct drm_radeon_gem_va va; + unsigned va_gap_size; - bo->va = radeon_bomgr_find_va(rws, size, alignment); + va_gap_size = rws->check_vm ? MAX2(4 * alignment, 64 * 1024) : 0; + bo->va = radeon_bomgr_find_va(rws, size + va_gap_size, alignment); va.handle = bo->handle; va.vm_id = 0; @@ -608,6 +712,120 @@ return radeon_bo_wait(_buf, 0, RADEON_USAGE_READWRITE); } +bool radeon_bo_can_reclaim_slab(void *priv, struct pb_slab_entry *entry) +{ + struct radeon_bo *bo = NULL; /* fix container_of */ + bo = container_of(entry, bo, u.slab.entry); + + return radeon_bo_can_reclaim(&bo->base); +} + +static void radeon_bo_slab_destroy(struct pb_buffer *_buf) +{ + struct radeon_bo *bo = radeon_bo(_buf); + + assert(!bo->handle); + + pb_slab_free(&bo->rws->bo_slabs, &bo->u.slab.entry); +} + +static const struct pb_vtbl radeon_winsys_bo_slab_vtbl = { + radeon_bo_slab_destroy + /* other functions are never called */ +}; + +struct pb_slab *radeon_bo_slab_alloc(void *priv, unsigned heap, + unsigned entry_size, + unsigned group_index) +{ + struct radeon_drm_winsys *ws = priv; + struct radeon_slab *slab = CALLOC_STRUCT(radeon_slab); + enum radeon_bo_domain domains; + enum radeon_bo_flag flags = 0; + unsigned base_hash; + + if (!slab) + return NULL; + + if (heap & 1) + flags |= RADEON_FLAG_GTT_WC; + if (heap & 2) + flags |= RADEON_FLAG_CPU_ACCESS; + + switch (heap >> 2) { + case 0: + domains = RADEON_DOMAIN_VRAM; + break; + default: + case 1: + domains = RADEON_DOMAIN_VRAM_GTT; + break; + case 2: + domains = RADEON_DOMAIN_GTT; + break; + } + + slab->buffer = radeon_bo(radeon_winsys_bo_create(&ws->base, + 64 * 1024, 64 * 1024, + domains, flags)); + if (!slab->buffer) + goto fail; + + assert(slab->buffer->handle); + + slab->base.num_entries = slab->buffer->base.size / entry_size; + slab->base.num_free = slab->base.num_entries; + slab->entries = CALLOC(slab->base.num_entries, sizeof(*slab->entries)); + if (!slab->entries) + goto fail_buffer; + + LIST_INITHEAD(&slab->base.free); + + base_hash = __sync_fetch_and_add(&ws->next_bo_hash, slab->base.num_entries); + + for (unsigned i = 0; i < slab->base.num_entries; ++i) { + struct radeon_bo *bo = &slab->entries[i]; + + bo->base.alignment = entry_size; + bo->base.usage = slab->buffer->base.usage; + bo->base.size = entry_size; + bo->base.vtbl = &radeon_winsys_bo_slab_vtbl; + bo->rws = ws; + bo->va = slab->buffer->va + i * entry_size; + bo->initial_domain = domains; + bo->hash = base_hash + i; + bo->u.slab.entry.slab = &slab->base; + bo->u.slab.entry.group_index = group_index; + bo->u.slab.real = slab->buffer; + + LIST_ADDTAIL(&bo->u.slab.entry.head, &slab->base.free); + } + + return &slab->base; + +fail_buffer: + radeon_bo_reference(&slab->buffer, NULL); +fail: + FREE(slab); + return NULL; +} + +void radeon_bo_slab_free(void *priv, struct pb_slab *pslab) +{ + struct radeon_slab *slab = (struct radeon_slab *)pslab; + + for (unsigned i = 0; i < slab->base.num_entries; ++i) { + struct radeon_bo *bo = &slab->entries[i]; + for (unsigned j = 0; j < bo->u.slab.num_fences; ++j) + radeon_bo_reference(&bo->u.slab.fences[j], NULL); + FREE(bo->u.slab.fences); + } + + FREE(slab->entries); + radeon_bo_reference(&slab->buffer, NULL); + FREE(slab); +} + static unsigned eg_tile_split(unsigned tile_split) { switch (tile_split) { @@ -643,6 +861,8 @@ struct radeon_bo *bo = radeon_bo(_buf); struct drm_radeon_gem_set_tiling args; + assert(bo->handle && "must not be called for slab entries"); + memset(&args, 0, sizeof(args)); args.handle = bo->handle; @@ -676,6 +896,8 @@ struct radeon_bo *bo = radeon_bo(_buf); struct drm_radeon_gem_set_tiling args; + assert(bo->handle && "must not be called for slab entries"); + memset(&args, 0, sizeof(args)); os_wait_until_zero(&bo->num_active_ioctls, PIPE_TIMEOUT_INFINITE); @@ -721,12 +943,63 @@ { struct radeon_drm_winsys *ws = radeon_drm_winsys(rws); struct radeon_bo *bo; - unsigned usage = 0; + unsigned usage = 0, pb_cache_bucket; /* Only 32-bit sizes are supported. */ if (size > UINT_MAX) return NULL; + /* Sub-allocate small buffers from slabs. */ + if (!(flags & RADEON_FLAG_HANDLE) && + size <= (1 << RADEON_SLAB_MAX_SIZE_LOG2) && + ws->info.has_virtual_memory && + alignment <= MAX2(1 << RADEON_SLAB_MIN_SIZE_LOG2, util_next_power_of_two(size))) { + struct pb_slab_entry *entry; + unsigned heap = 0; + + if (flags & RADEON_FLAG_GTT_WC) + heap |= 1; + if (flags & RADEON_FLAG_CPU_ACCESS) + heap |= 2; + if (flags & ~(RADEON_FLAG_GTT_WC | RADEON_FLAG_CPU_ACCESS)) + goto no_slab; + + switch (domain) { + case RADEON_DOMAIN_VRAM: + heap |= 0 * 4; + break; + case RADEON_DOMAIN_VRAM_GTT: + heap |= 1 * 4; + break; + case RADEON_DOMAIN_GTT: + heap |= 2 * 4; + break; + default: + goto no_slab; + } + + entry = pb_slab_alloc(&ws->bo_slabs, size, heap); + if (!entry) { + /* Clear the cache and try again. */ + pb_cache_release_all_buffers(&ws->bo_cache); + + entry = pb_slab_alloc(&ws->bo_slabs, size, heap); + } + if (!entry) + return NULL; + + bo = NULL; + bo = container_of(entry, bo, u.slab.entry); + + pipe_reference_init(&bo->base.reference, 1); + + return &bo->base; + } +no_slab: + + /* This flag is irrelevant for the cache. */ + flags &= ~RADEON_FLAG_HANDLE; + /* Align size to page size. This is the minimum alignment for normal * BOs. Aligning this here helps the cached bufmgr. Especially small BOs, * like constant/uniform buffers, can benefit from better and more reuse. @@ -740,24 +1013,36 @@ if (domain == RADEON_DOMAIN_VRAM_GTT) usage = 1 << 2; else - usage = domain >> 1; + usage = (unsigned)domain >> 1; assert(flags < sizeof(usage) * 8 - 3); usage |= 1 << (flags + 3); - bo = radeon_bo(pb_cache_reclaim_buffer(&ws->bo_cache, size, alignment, usage)); + /* Determine the pb_cache bucket for minimizing pb_cache misses. */ + pb_cache_bucket = 0; + if (domain & RADEON_DOMAIN_VRAM) /* VRAM or VRAM+GTT */ + pb_cache_bucket += 1; + if (flags == RADEON_FLAG_GTT_WC) /* WC */ + pb_cache_bucket += 2; + assert(pb_cache_bucket < ARRAY_SIZE(ws->bo_cache.buckets)); + + bo = radeon_bo(pb_cache_reclaim_buffer(&ws->bo_cache, size, alignment, + usage, pb_cache_bucket)); if (bo) return &bo->base; - bo = radeon_create_bo(ws, size, alignment, usage, domain, flags); + bo = radeon_create_bo(ws, size, alignment, usage, domain, flags, + pb_cache_bucket); if (!bo) { /* Clear the cache and try again. */ + pb_slabs_reclaim(&ws->bo_slabs); pb_cache_release_all_buffers(&ws->bo_cache); - bo = radeon_create_bo(ws, size, alignment, usage, domain, flags); + bo = radeon_create_bo(ws, size, alignment, usage, domain, flags, + pb_cache_bucket); if (!bo) return NULL; } - bo->use_reusable_pool = true; + bo->u.real.use_reusable_pool = true; pipe_mutex_lock(ws->bo_handles_mutex); util_hash_table_set(ws->bo_handles, (void*)(uintptr_t)bo->handle, bo); @@ -790,6 +1075,8 @@ return NULL; } + assert(args.handle != 0); + pipe_mutex_lock(ws->bo_handles_mutex); /* Initialize it. */ @@ -802,7 +1089,8 @@ bo->user_ptr = pointer; bo->va = 0; bo->initial_domain = RADEON_DOMAIN_GTT; - pipe_mutex_init(bo->map_mutex); + bo->hash = __sync_fetch_and_add(&ws->next_bo_hash, 1); + pipe_mutex_init(bo->u.real.map_mutex); util_hash_table_set(ws->bo_handles, (void*)(uintptr_t)bo->handle, bo); @@ -924,6 +1212,8 @@ lseek(whandle->handle, 0, SEEK_SET); } + assert(handle != 0); + bo->handle = handle; /* Initialize it. */ @@ -933,7 +1223,8 @@ bo->base.vtbl = &radeon_bo_vtbl; bo->rws = ws; bo->va = 0; - pipe_mutex_init(bo->map_mutex); + bo->hash = __sync_fetch_and_add(&ws->next_bo_hash, 1); + pipe_mutex_init(bo->u.real.map_mutex); if (bo->flink_name) util_hash_table_set(ws->bo_names, (void*)(uintptr_t)bo->flink_name, bo); @@ -996,25 +1287,30 @@ return NULL; } -static boolean radeon_winsys_bo_get_handle(struct pb_buffer *buffer, - unsigned stride, unsigned offset, - unsigned slice_size, - struct winsys_handle *whandle) +static bool radeon_winsys_bo_get_handle(struct pb_buffer *buffer, + unsigned stride, unsigned offset, + unsigned slice_size, + struct winsys_handle *whandle) { struct drm_gem_flink flink; struct radeon_bo *bo = radeon_bo(buffer); struct radeon_drm_winsys *ws = bo->rws; + if (!bo->handle) { + offset += bo->va - bo->u.slab.real->va; + bo = bo->u.slab.real; + } + memset(&flink, 0, sizeof(flink)); - bo->use_reusable_pool = false; + bo->u.real.use_reusable_pool = false; if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) { if (!bo->flink_name) { flink.handle = bo->handle; if (ioctl(ws->fd, DRM_IOCTL_GEM_FLINK, &flink)) { - return FALSE; + return false; } bo->flink_name = flink.name; @@ -1028,14 +1324,14 @@ whandle->handle = bo->handle; } else if (whandle->type == DRM_API_HANDLE_TYPE_FD) { if (drmPrimeHandleToFD(ws->fd, bo->handle, DRM_CLOEXEC, (int*)&whandle->handle)) - return FALSE; + return false; } whandle->stride = stride; whandle->offset = offset; whandle->offset += slice_size * whandle->layer; - return TRUE; + return true; } static bool radeon_winsys_bo_is_user_ptr(struct pb_buffer *buf) @@ -1048,6 +1344,16 @@ return ((struct radeon_bo*)buf)->va; } +static unsigned radeon_winsys_bo_get_reloc_offset(struct pb_buffer *buf) +{ + struct radeon_bo *bo = radeon_bo(buf); + + if (bo->handle) + return 0; + + return bo->va - bo->u.slab.real->va; +} + void radeon_drm_bo_init_functions(struct radeon_drm_winsys *ws) { ws->base.buffer_set_metadata = radeon_bo_set_metadata; @@ -1061,5 +1367,6 @@ ws->base.buffer_is_user_ptr = radeon_winsys_bo_is_user_ptr; ws->base.buffer_get_handle = radeon_winsys_bo_get_handle; ws->base.buffer_get_virtual_address = radeon_winsys_bo_va; + ws->base.buffer_get_reloc_offset = radeon_winsys_bo_get_reloc_offset; ws->base.buffer_get_initial_domain = radeon_bo_get_initial_domain; } diff -Nru mesa-12.0.6/src/gallium/winsys/radeon/drm/radeon_drm_bo.h mesa-17.0.7/src/gallium/winsys/radeon/drm/radeon_drm_bo.h --- mesa-12.0.6/src/gallium/winsys/radeon/drm/radeon_drm_bo.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/radeon/drm/radeon_drm_bo.h 2017-06-01 10:37:10.000000000 +0000 @@ -33,25 +33,38 @@ #define RADEON_DRM_BO_H #include "radeon_drm_winsys.h" -#include "pipebuffer/pb_bufmgr.h" #include "os/os_thread.h" +#include "pipebuffer/pb_slab.h" struct radeon_bo { struct pb_buffer base; - struct pb_cache_entry cache_entry; + union { + struct { + struct pb_cache_entry cache_entry; + + void *ptr; + pipe_mutex map_mutex; + unsigned map_count; + bool use_reusable_pool; + } real; + struct { + struct pb_slab_entry entry; + struct radeon_bo *real; + + unsigned num_fences; + unsigned max_fences; + struct radeon_bo **fences; + } slab; + } u; struct radeon_drm_winsys *rws; void *user_ptr; /* from buffer_from_ptr */ - void *ptr; - pipe_mutex map_mutex; - unsigned map_count; - - uint32_t handle; + uint32_t handle; /* 0 for slab entries */ uint32_t flink_name; uint64_t va; + uint32_t hash; enum radeon_bo_domain initial_domain; - bool use_reusable_pool; /* how many command streams is this bo referenced in? */ int num_cs_references; @@ -61,10 +74,22 @@ int num_active_ioctls; }; +struct radeon_slab { + struct pb_slab base; + struct radeon_bo *buffer; + struct radeon_bo *entries; +}; + void radeon_bo_destroy(struct pb_buffer *_buf); bool radeon_bo_can_reclaim(struct pb_buffer *_buf); void radeon_drm_bo_init_functions(struct radeon_drm_winsys *ws); +bool radeon_bo_can_reclaim_slab(void *priv, struct pb_slab_entry *entry); +struct pb_slab *radeon_bo_slab_alloc(void *priv, unsigned heap, + unsigned entry_size, + unsigned group_index); +void radeon_bo_slab_free(void *priv, struct pb_slab *slab); + static inline void radeon_bo_reference(struct radeon_bo **dst, struct radeon_bo *src) { diff -Nru mesa-12.0.6/src/gallium/winsys/radeon/drm/radeon_drm_cs.c mesa-17.0.7/src/gallium/winsys/radeon/drm/radeon_drm_cs.c --- mesa-12.0.6/src/gallium/winsys/radeon/drm/radeon_drm_cs.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/radeon/drm/radeon_drm_cs.c 2017-06-01 10:37:10.000000000 +0000 @@ -92,25 +92,12 @@ /* No context support here. */ } -static boolean radeon_init_cs_context(struct radeon_cs_context *csc, - struct radeon_drm_winsys *ws) +static bool radeon_init_cs_context(struct radeon_cs_context *csc, + struct radeon_drm_winsys *ws) { int i; csc->fd = ws->fd; - csc->nrelocs = 512; - csc->relocs_bo = (struct radeon_bo_item*) - CALLOC(1, csc->nrelocs * sizeof(csc->relocs_bo[0])); - if (!csc->relocs_bo) { - return FALSE; - } - - csc->relocs = (struct drm_radeon_cs_reloc*) - CALLOC(1, csc->nrelocs * sizeof(struct drm_radeon_cs_reloc)); - if (!csc->relocs) { - FREE(csc->relocs_bo); - return FALSE; - } csc->chunks[0].chunk_id = RADEON_CHUNK_ID_IB; csc->chunks[0].length_dw = 0; @@ -131,24 +118,27 @@ for (i = 0; i < ARRAY_SIZE(csc->reloc_indices_hashlist); i++) { csc->reloc_indices_hashlist[i] = -1; } - return TRUE; + return true; } static void radeon_cs_context_cleanup(struct radeon_cs_context *csc) { unsigned i; - for (i = 0; i < csc->crelocs; i++) { + for (i = 0; i < csc->num_relocs; i++) { p_atomic_dec(&csc->relocs_bo[i].bo->num_cs_references); radeon_bo_reference(&csc->relocs_bo[i].bo, NULL); } + for (i = 0; i < csc->num_slab_buffers; ++i) { + p_atomic_dec(&csc->slab_buffers[i].bo->num_cs_references); + radeon_bo_reference(&csc->slab_buffers[i].bo, NULL); + } - csc->crelocs = 0; - csc->validated_crelocs = 0; + csc->num_relocs = 0; + csc->num_validated_relocs = 0; + csc->num_slab_buffers = 0; csc->chunks[0].length_dw = 0; csc->chunks[1].length_dw = 0; - csc->used_gart = 0; - csc->used_vram = 0; for (i = 0; i < ARRAY_SIZE(csc->reloc_indices_hashlist); i++) { csc->reloc_indices_hashlist[i] = -1; @@ -158,6 +148,7 @@ static void radeon_destroy_cs_context(struct radeon_cs_context *csc) { radeon_cs_context_cleanup(csc); + FREE(csc->slab_buffers); FREE(csc->relocs_bo); FREE(csc->relocs); } @@ -177,7 +168,7 @@ if (!cs) { return NULL; } - pipe_semaphore_init(&cs->flush_completed, 1); + util_queue_fence_init(&cs->flush_completed); cs->ws = ws; cs->flush_cs = flush; @@ -196,41 +187,36 @@ /* Set the first command buffer as current. */ cs->csc = &cs->csc1; cs->cst = &cs->csc2; - cs->base.buf = cs->csc->buf; - cs->base.max_dw = ARRAY_SIZE(cs->csc->buf); + cs->base.current.buf = cs->csc->buf; + cs->base.current.max_dw = ARRAY_SIZE(cs->csc->buf); cs->ring_type = ring_type; p_atomic_inc(&ws->num_cs); return &cs->base; } -#define OUT_CS(cs, value) (cs)->buf[(cs)->cdw++] = (value) - -static inline void update_reloc(struct drm_radeon_cs_reloc *reloc, - enum radeon_bo_domain rd, - enum radeon_bo_domain wd, - unsigned priority, - enum radeon_bo_domain *added_domains) -{ - *added_domains = (rd | wd) & ~(reloc->read_domains | reloc->write_domain); - - reloc->read_domains |= rd; - reloc->write_domain |= wd; - reloc->flags = MAX2(reloc->flags, priority); -} - int radeon_lookup_buffer(struct radeon_cs_context *csc, struct radeon_bo *bo) { - unsigned hash = bo->handle & (ARRAY_SIZE(csc->reloc_indices_hashlist)-1); + unsigned hash = bo->hash & (ARRAY_SIZE(csc->reloc_indices_hashlist)-1); + struct radeon_bo_item *buffers; + unsigned num_buffers; int i = csc->reloc_indices_hashlist[hash]; + if (bo->handle) { + buffers = csc->relocs_bo; + num_buffers = csc->num_relocs; + } else { + buffers = csc->slab_buffers; + num_buffers = csc->num_slab_buffers; + } + /* not found or found */ - if (i == -1 || csc->relocs_bo[i].bo == bo) + if (i == -1 || (i < num_buffers && buffers[i].bo == bo)) return i; /* Hash collision, look for the BO in the list of relocs linearly. */ - for (i = csc->crelocs - 1; i >= 0; i--) { - if (csc->relocs_bo[i].bo == bo) { + for (i = num_buffers - 1; i >= 0; i--) { + if (buffers[i].bo == bo) { /* Put this reloc in the hash list. * This will prevent additional hash collisions if there are * several consecutive lookup_buffer calls for the same buffer. @@ -247,30 +233,17 @@ return -1; } -static unsigned radeon_add_buffer(struct radeon_drm_cs *cs, - struct radeon_bo *bo, - enum radeon_bo_usage usage, - enum radeon_bo_domain domains, - unsigned priority, - enum radeon_bo_domain *added_domains) +static unsigned radeon_lookup_or_add_real_buffer(struct radeon_drm_cs *cs, + struct radeon_bo *bo) { struct radeon_cs_context *csc = cs->csc; struct drm_radeon_cs_reloc *reloc; - unsigned hash = bo->handle & (ARRAY_SIZE(csc->reloc_indices_hashlist)-1); - enum radeon_bo_domain rd = usage & RADEON_USAGE_READ ? domains : 0; - enum radeon_bo_domain wd = usage & RADEON_USAGE_WRITE ? domains : 0; + unsigned hash = bo->hash & (ARRAY_SIZE(csc->reloc_indices_hashlist)-1); int i = -1; - assert(priority < 64); - *added_domains = 0; - i = radeon_lookup_buffer(csc, bo); if (i >= 0) { - reloc = &csc->relocs[i]; - update_reloc(reloc, rd, wd, priority / 4, added_domains); - csc->relocs_bo[i].priority_usage |= 1llu << priority; - /* For async DMA, every add_buffer call must add a buffer to the list * no matter how many duplicates there are. This is due to the fact * the DMA CS checker doesn't use NOP packets for offset patching, @@ -287,36 +260,82 @@ } /* New relocation, check if the backing array is large enough. */ - if (csc->crelocs >= csc->nrelocs) { + if (csc->num_relocs >= csc->max_relocs) { uint32_t size; - csc->nrelocs += 10; + csc->max_relocs = MAX2(csc->max_relocs + 16, (unsigned)(csc->max_relocs * 1.3)); - size = csc->nrelocs * sizeof(csc->relocs_bo[0]); + size = csc->max_relocs * sizeof(csc->relocs_bo[0]); csc->relocs_bo = realloc(csc->relocs_bo, size); - size = csc->nrelocs * sizeof(struct drm_radeon_cs_reloc); + size = csc->max_relocs * sizeof(struct drm_radeon_cs_reloc); csc->relocs = realloc(csc->relocs, size); csc->chunks[1].chunk_data = (uint64_t)(uintptr_t)csc->relocs; } /* Initialize the new relocation. */ - csc->relocs_bo[csc->crelocs].bo = NULL; - csc->relocs_bo[csc->crelocs].priority_usage = 1llu << priority; - radeon_bo_reference(&csc->relocs_bo[csc->crelocs].bo, bo); + csc->relocs_bo[csc->num_relocs].bo = NULL; + csc->relocs_bo[csc->num_relocs].u.real.priority_usage = 0; + radeon_bo_reference(&csc->relocs_bo[csc->num_relocs].bo, bo); p_atomic_inc(&bo->num_cs_references); - reloc = &csc->relocs[csc->crelocs]; + reloc = &csc->relocs[csc->num_relocs]; reloc->handle = bo->handle; - reloc->read_domains = rd; - reloc->write_domain = wd; - reloc->flags = priority / 4; + reloc->read_domains = 0; + reloc->write_domain = 0; + reloc->flags = 0; - csc->reloc_indices_hashlist[hash] = csc->crelocs; + csc->reloc_indices_hashlist[hash] = csc->num_relocs; csc->chunks[1].length_dw += RELOC_DWORDS; - *added_domains = rd | wd; - return csc->crelocs++; + return csc->num_relocs++; +} + +static int radeon_lookup_or_add_slab_buffer(struct radeon_drm_cs *cs, + struct radeon_bo *bo) +{ + struct radeon_cs_context *csc = cs->csc; + unsigned hash; + struct radeon_bo_item *item; + int idx; + int real_idx; + + idx = radeon_lookup_buffer(csc, bo); + if (idx >= 0) + return idx; + + real_idx = radeon_lookup_or_add_real_buffer(cs, bo->u.slab.real); + + /* Check if the backing array is large enough. */ + if (csc->num_slab_buffers >= csc->max_slab_buffers) { + unsigned new_max = MAX2(csc->max_slab_buffers + 16, + (unsigned)(csc->max_slab_buffers * 1.3)); + struct radeon_bo_item *new_buffers = + REALLOC(csc->slab_buffers, + csc->max_slab_buffers * sizeof(*new_buffers), + new_max * sizeof(*new_buffers)); + if (!new_buffers) { + fprintf(stderr, "radeon_lookup_or_add_slab_buffer: allocation failure\n"); + return -1; + } + + csc->max_slab_buffers = new_max; + csc->slab_buffers = new_buffers; + } + + /* Initialize the new relocation. */ + idx = csc->num_slab_buffers++; + item = &csc->slab_buffers[idx]; + + item->bo = NULL; + item->u.slab.real_idx = real_idx; + radeon_bo_reference(&item->bo, bo); + p_atomic_inc(&bo->num_cs_references); + + hash = bo->hash & (ARRAY_SIZE(csc->reloc_indices_hashlist)-1); + csc->reloc_indices_hashlist[hash] = idx; + + return idx; } static unsigned radeon_drm_cs_add_buffer(struct radeon_winsys_cs *rcs, @@ -328,13 +347,32 @@ struct radeon_drm_cs *cs = radeon_drm_cs(rcs); struct radeon_bo *bo = (struct radeon_bo*)buf; enum radeon_bo_domain added_domains; - unsigned index = radeon_add_buffer(cs, bo, usage, domains, priority, - &added_domains); + enum radeon_bo_domain rd = usage & RADEON_USAGE_READ ? domains : 0; + enum radeon_bo_domain wd = usage & RADEON_USAGE_WRITE ? domains : 0; + struct drm_radeon_cs_reloc *reloc; + int index; + + if (!bo->handle) { + index = radeon_lookup_or_add_slab_buffer(cs, bo); + if (index < 0) + return 0; + + index = cs->csc->slab_buffers[index].u.slab.real_idx; + } else { + index = radeon_lookup_or_add_real_buffer(cs, bo); + } + + reloc = &cs->csc->relocs[index]; + added_domains = (rd | wd) & ~(reloc->read_domains | reloc->write_domain); + reloc->read_domains |= rd; + reloc->write_domain |= wd; + reloc->flags = MAX2(reloc->flags, priority); + cs->csc->relocs_bo[index].u.real.priority_usage |= 1llu << priority; if (added_domains & RADEON_DOMAIN_VRAM) - cs->csc->used_vram += bo->base.size; + cs->base.used_vram += bo->base.size; else if (added_domains & RADEON_DOMAIN_GTT) - cs->csc->used_gart += bo->base.size; + cs->base.used_gart += bo->base.size; return index; } @@ -347,35 +385,37 @@ return radeon_lookup_buffer(cs->csc, (struct radeon_bo*)buf); } -static boolean radeon_drm_cs_validate(struct radeon_winsys_cs *rcs) +static bool radeon_drm_cs_validate(struct radeon_winsys_cs *rcs) { struct radeon_drm_cs *cs = radeon_drm_cs(rcs); - boolean status = - cs->csc->used_gart < cs->ws->info.gart_size * 0.8 && - cs->csc->used_vram < cs->ws->info.vram_size * 0.8; + bool status = + cs->base.used_gart < cs->ws->info.gart_size * 0.8 && + cs->base.used_vram < cs->ws->info.vram_size * 0.8; if (status) { - cs->csc->validated_crelocs = cs->csc->crelocs; + cs->csc->num_validated_relocs = cs->csc->num_relocs; } else { /* Remove lately-added buffers. The validation failed with them * and the CS is about to be flushed because of that. Keep only * the already-validated buffers. */ unsigned i; - for (i = cs->csc->validated_crelocs; i < cs->csc->crelocs; i++) { + for (i = cs->csc->num_validated_relocs; i < cs->csc->num_relocs; i++) { p_atomic_dec(&cs->csc->relocs_bo[i].bo->num_cs_references); radeon_bo_reference(&cs->csc->relocs_bo[i].bo, NULL); } - cs->csc->crelocs = cs->csc->validated_crelocs; + cs->csc->num_relocs = cs->csc->num_validated_relocs; /* Flush if there are any relocs. Clean up otherwise. */ - if (cs->csc->crelocs) { + if (cs->csc->num_relocs) { cs->flush_cs(cs->flush_data, RADEON_FLUSH_ASYNC, NULL); } else { radeon_cs_context_cleanup(cs->csc); + cs->base.used_vram = 0; + cs->base.used_gart = 0; - assert(cs->base.cdw == 0); - if (cs->base.cdw != 0) { + assert(cs->base.current.cdw == 0); + if (cs->base.current.cdw != 0) { fprintf(stderr, "radeon: Unexpected error in %s.\n", __func__); } } @@ -383,26 +423,10 @@ return status; } -static boolean radeon_drm_cs_memory_below_limit(struct radeon_winsys_cs *rcs, uint64_t vram, uint64_t gtt) +static bool radeon_drm_cs_check_space(struct radeon_winsys_cs *rcs, unsigned dw) { - struct radeon_drm_cs *cs = radeon_drm_cs(rcs); - - vram += cs->csc->used_vram; - gtt += cs->csc->used_gart; - - /* Anything that goes above the VRAM size should go to GTT. */ - if (vram > cs->ws->info.vram_size) - gtt += vram - cs->ws->info.vram_size; - - /* Now we just need to check if we have enough GTT. */ - return gtt < cs->ws->info.gart_size * 0.7; -} - -static uint64_t radeon_drm_cs_query_memory_usage(struct radeon_winsys_cs *rcs) -{ - struct radeon_drm_cs *cs = radeon_drm_cs(rcs); - - return cs->csc->used_vram + cs->csc->used_gart; + assert(rcs->current.cdw <= rcs->current.max_dw); + return rcs->current.max_dw - rcs->current.cdw >= dw; } static unsigned radeon_drm_cs_get_buffer_list(struct radeon_winsys_cs *rcs, @@ -412,17 +436,18 @@ int i; if (list) { - for (i = 0; i < cs->csc->crelocs; i++) { - pb_reference(&list[i].buf, &cs->csc->relocs_bo[i].bo->base); + for (i = 0; i < cs->csc->num_relocs; i++) { + list[i].bo_size = cs->csc->relocs_bo[i].bo->base.size; list[i].vm_address = cs->csc->relocs_bo[i].bo->va; - list[i].priority_usage = cs->csc->relocs_bo[i].priority_usage; + list[i].priority_usage = cs->csc->relocs_bo[i].u.real.priority_usage; } } - return cs->csc->crelocs; + return cs->csc->num_relocs; } -void radeon_drm_cs_emit_ioctl_oneshot(struct radeon_drm_cs *cs, struct radeon_cs_context *csc) +void radeon_drm_cs_emit_ioctl_oneshot(void *job, int thread_index) { + struct radeon_cs_context *csc = ((struct radeon_drm_cs*)job)->cst; unsigned i; int r; @@ -431,7 +456,7 @@ if (r) { if (r == -ENOMEM) fprintf(stderr, "radeon: Not enough memory for command submission.\n"); - else if (debug_get_bool_option("RADEON_DUMP_CS", FALSE)) { + else if (debug_get_bool_option("RADEON_DUMP_CS", false)) { unsigned i; fprintf(stderr, "radeon: The kernel rejected CS, dumping...\n"); @@ -440,12 +465,14 @@ } } else { fprintf(stderr, "radeon: The kernel rejected CS, " - "see dmesg for more information.\n"); + "see dmesg for more information (%i).\n", r); } } - for (i = 0; i < csc->crelocs; i++) + for (i = 0; i < csc->num_relocs; i++) p_atomic_dec(&csc->relocs_bo[i].bo->num_active_ioctls); + for (i = 0; i < csc->num_slab_buffers; i++) + p_atomic_dec(&csc->slab_buffers[i].bo->num_active_ioctls); radeon_cs_context_cleanup(csc); } @@ -457,18 +484,66 @@ { struct radeon_drm_cs *cs = radeon_drm_cs(rcs); - /* Wait for any pending ioctl to complete. */ - if (cs->ws->thread) { - pipe_semaphore_wait(&cs->flush_completed); - pipe_semaphore_signal(&cs->flush_completed); + /* Wait for any pending ioctl of this CS to complete. */ + if (util_queue_is_initialized(&cs->ws->cs_queue)) + util_queue_job_wait(&cs->flush_completed); +} + +/* Add the given fence to a slab buffer fence list. + * + * There is a potential race condition when bo participates in submissions on + * two or more threads simultaneously. Since we do not know which of the + * submissions will be sent to the GPU first, we have to keep the fences + * of all submissions. + * + * However, fences that belong to submissions that have already returned from + * their respective ioctl do not have to be kept, because we know that they + * will signal earlier. + */ +static void radeon_bo_slab_fence(struct radeon_bo *bo, struct radeon_bo *fence) +{ + unsigned dst; + + assert(fence->num_cs_references); + + /* Cleanup older fences */ + dst = 0; + for (unsigned src = 0; src < bo->u.slab.num_fences; ++src) { + if (bo->u.slab.fences[src]->num_cs_references) { + bo->u.slab.fences[dst] = bo->u.slab.fences[src]; + dst++; + } else { + radeon_bo_reference(&bo->u.slab.fences[src], NULL); + } } + bo->u.slab.num_fences = dst; + + /* Check available space for the new fence */ + if (bo->u.slab.num_fences >= bo->u.slab.max_fences) { + unsigned new_max_fences = bo->u.slab.max_fences + 1; + struct radeon_bo **new_fences = REALLOC(bo->u.slab.fences, + bo->u.slab.max_fences * sizeof(*new_fences), + new_max_fences * sizeof(*new_fences)); + if (!new_fences) { + fprintf(stderr, "radeon_bo_slab_fence: allocation failure, dropping fence\n"); + return; + } + + bo->u.slab.fences = new_fences; + bo->u.slab.max_fences = new_max_fences; + } + + /* Add the new fence */ + bo->u.slab.fences[bo->u.slab.num_fences] = NULL; + radeon_bo_reference(&bo->u.slab.fences[bo->u.slab.num_fences], fence); + bo->u.slab.num_fences++; } -DEBUG_GET_ONCE_BOOL_OPTION(noop, "RADEON_NOOP", FALSE) +DEBUG_GET_ONCE_BOOL_OPTION(noop, "RADEON_NOOP", false) -static void radeon_drm_cs_flush(struct radeon_winsys_cs *rcs, - unsigned flags, - struct pipe_fence_handle **fence) +static int radeon_drm_cs_flush(struct radeon_winsys_cs *rcs, + unsigned flags, + struct pipe_fence_handle **pfence) { struct radeon_drm_cs *cs = radeon_drm_cs(rcs); struct radeon_cs_context *tmp; @@ -477,11 +552,11 @@ case RING_DMA: /* pad DMA ring to 8 DWs */ if (cs->ws->info.chip_class <= SI) { - while (rcs->cdw & 7) - OUT_CS(&cs->base, 0xf0000000); /* NOP packet */ + while (rcs->current.cdw & 7) + radeon_emit(&cs->base, 0xf0000000); /* NOP packet */ } else { - while (rcs->cdw & 7) - OUT_CS(&cs->base, 0x00000000); /* NOP packet */ + while (rcs->current.cdw & 7) + radeon_emit(&cs->base, 0x00000000); /* NOP packet */ } break; case RING_GFX: @@ -489,28 +564,51 @@ * r6xx, requires at least 4 dw alignment to avoid a hw bug. */ if (cs->ws->info.gfx_ib_pad_with_type2) { - while (rcs->cdw & 7) - OUT_CS(&cs->base, 0x80000000); /* type2 nop packet */ + while (rcs->current.cdw & 7) + radeon_emit(&cs->base, 0x80000000); /* type2 nop packet */ } else { - while (rcs->cdw & 7) - OUT_CS(&cs->base, 0xffff1000); /* type3 nop packet */ + while (rcs->current.cdw & 7) + radeon_emit(&cs->base, 0xffff1000); /* type3 nop packet */ } break; case RING_UVD: - while (rcs->cdw & 15) - OUT_CS(&cs->base, 0x80000000); /* type2 nop packet */ + while (rcs->current.cdw & 15) + radeon_emit(&cs->base, 0x80000000); /* type2 nop packet */ break; default: break; } - if (rcs->cdw > rcs->max_dw) { + if (rcs->current.cdw > rcs->current.max_dw) { fprintf(stderr, "radeon: command stream overflowed\n"); } - if (fence) { - radeon_fence_reference(fence, NULL); - *fence = radeon_cs_create_fence(rcs); + if (pfence || cs->csc->num_slab_buffers) { + struct pipe_fence_handle *fence; + + if (cs->next_fence) { + fence = cs->next_fence; + cs->next_fence = NULL; + } else { + fence = radeon_cs_create_fence(rcs); + } + + if (fence) { + if (pfence) + radeon_fence_reference(pfence, fence); + + pipe_mutex_lock(cs->ws->bo_fence_lock); + for (unsigned i = 0; i < cs->csc->num_slab_buffers; ++i) { + struct radeon_bo *bo = cs->csc->slab_buffers[i].bo; + p_atomic_inc(&bo->num_active_ioctls); + radeon_bo_slab_fence(bo, (struct radeon_bo *)fence); + } + pipe_mutex_unlock(cs->ws->bo_fence_lock); + + radeon_fence_reference(&fence, NULL); + } + } else { + radeon_fence_reference(&cs->next_fence, NULL); } radeon_drm_cs_sync_flush(rcs); @@ -521,14 +619,14 @@ cs->cst = tmp; /* If the CS is not empty or overflowed, emit it in a separate thread. */ - if (cs->base.cdw && cs->base.cdw <= cs->base.max_dw && !debug_get_option_noop()) { - unsigned i, crelocs; + if (cs->base.current.cdw && cs->base.current.cdw <= cs->base.current.max_dw && !debug_get_option_noop()) { + unsigned i, num_relocs; - crelocs = cs->cst->crelocs; + num_relocs = cs->cst->num_relocs; - cs->cst->chunks[0].length_dw = cs->base.cdw; + cs->cst->chunks[0].length_dw = cs->base.current.cdw; - for (i = 0; i < crelocs; i++) { + for (i = 0; i < num_relocs; i++) { /* Update the number of active asynchronous CS ioctls for the buffer. */ p_atomic_inc(&cs->cst->relocs_bo[i].bo->num_active_ioctls); } @@ -558,13 +656,10 @@ default: case RING_GFX: case RING_COMPUTE: - cs->cst->flags[0] = 0; + cs->cst->flags[0] = RADEON_CS_KEEP_TILING_FLAGS; cs->cst->flags[1] = RADEON_CS_RING_GFX; - cs->cst->cs.num_chunks = 2; - if (flags & RADEON_FLUSH_KEEP_TILING_FLAGS) { - cs->cst->flags[0] |= RADEON_CS_KEEP_TILING_FLAGS; - cs->cst->cs.num_chunks = 3; - } + cs->cst->cs.num_chunks = 3; + if (cs->ws->info.has_virtual_memory) { cs->cst->flags[0] |= RADEON_CS_USE_VM; cs->cst->cs.num_chunks = 3; @@ -580,23 +675,29 @@ break; } - if (cs->ws->thread) { - pipe_semaphore_wait(&cs->flush_completed); - radeon_drm_ws_queue_cs(cs->ws, cs); + if (util_queue_is_initialized(&cs->ws->cs_queue)) { + util_queue_add_job(&cs->ws->cs_queue, cs, &cs->flush_completed, + radeon_drm_cs_emit_ioctl_oneshot, NULL); if (!(flags & RADEON_FLUSH_ASYNC)) radeon_drm_cs_sync_flush(rcs); } else { - radeon_drm_cs_emit_ioctl_oneshot(cs, cs->cst); + radeon_drm_cs_emit_ioctl_oneshot(cs, 0); } } else { radeon_cs_context_cleanup(cs->cst); } /* Prepare a new CS. */ - cs->base.buf = cs->csc->buf; - cs->base.cdw = 0; - - cs->ws->num_cs_flushes++; + cs->base.current.buf = cs->csc->buf; + cs->base.current.cdw = 0; + cs->base.used_vram = 0; + cs->base.used_gart = 0; + + if (cs->ring_type == RING_GFX) + cs->ws->num_gfx_IBs++; + else if (cs->ring_type == RING_DMA) + cs->ws->num_sdma_IBs++; + return 0; } static void radeon_drm_cs_destroy(struct radeon_winsys_cs *rcs) @@ -604,36 +705,40 @@ struct radeon_drm_cs *cs = radeon_drm_cs(rcs); radeon_drm_cs_sync_flush(rcs); - pipe_semaphore_destroy(&cs->flush_completed); + util_queue_fence_destroy(&cs->flush_completed); radeon_cs_context_cleanup(&cs->csc1); radeon_cs_context_cleanup(&cs->csc2); p_atomic_dec(&cs->ws->num_cs); radeon_destroy_cs_context(&cs->csc1); radeon_destroy_cs_context(&cs->csc2); + radeon_fence_reference(&cs->next_fence, NULL); FREE(cs); } -static boolean radeon_bo_is_referenced(struct radeon_winsys_cs *rcs, - struct pb_buffer *_buf, - enum radeon_bo_usage usage) +static bool radeon_bo_is_referenced(struct radeon_winsys_cs *rcs, + struct pb_buffer *_buf, + enum radeon_bo_usage usage) { struct radeon_drm_cs *cs = radeon_drm_cs(rcs); struct radeon_bo *bo = (struct radeon_bo*)_buf; int index; if (!bo->num_cs_references) - return FALSE; + return false; index = radeon_lookup_buffer(cs->csc, bo); if (index == -1) - return FALSE; + return false; + + if (!bo->handle) + index = cs->csc->slab_buffers[index].u.slab.real_idx; if ((usage & RADEON_USAGE_WRITE) && cs->csc->relocs[index].write_domain) - return TRUE; + return true; if ((usage & RADEON_USAGE_READ) && cs->csc->relocs[index].read_domains) - return TRUE; + return true; - return FALSE; + return false; } /* FENCES */ @@ -646,7 +751,10 @@ /* Create a fence, which is a dummy BO. */ fence = cs->ws->base.buffer_create(&cs->ws->base, 1, 1, - RADEON_DOMAIN_GTT, 0); + RADEON_DOMAIN_GTT, RADEON_FLAG_HANDLE); + if (!fence) + return NULL; + /* Add the fence as a dummy relocation. */ cs->ws->base.cs_add_buffer(rcs, fence, RADEON_USAGE_READWRITE, RADEON_DOMAIN_GTT, @@ -668,6 +776,25 @@ pb_reference((struct pb_buffer**)dst, (struct pb_buffer*)src); } +static struct pipe_fence_handle * +radeon_drm_cs_get_next_fence(struct radeon_winsys_cs *rcs) +{ + struct radeon_drm_cs *cs = radeon_drm_cs(rcs); + struct pipe_fence_handle *fence = NULL; + + if (cs->next_fence) { + radeon_fence_reference(&fence, cs->next_fence); + return fence; + } + + fence = radeon_cs_create_fence(rcs); + if (!fence) + return NULL; + + radeon_fence_reference(&cs->next_fence, fence); + return fence; +} + void radeon_drm_cs_init_functions(struct radeon_drm_winsys *ws) { ws->base.ctx_create = radeon_drm_ctx_create; @@ -677,10 +804,10 @@ ws->base.cs_add_buffer = radeon_drm_cs_add_buffer; ws->base.cs_lookup_buffer = radeon_drm_cs_lookup_buffer; ws->base.cs_validate = radeon_drm_cs_validate; - ws->base.cs_memory_below_limit = radeon_drm_cs_memory_below_limit; - ws->base.cs_query_memory_usage = radeon_drm_cs_query_memory_usage; + ws->base.cs_check_space = radeon_drm_cs_check_space; ws->base.cs_get_buffer_list = radeon_drm_cs_get_buffer_list; ws->base.cs_flush = radeon_drm_cs_flush; + ws->base.cs_get_next_fence = radeon_drm_cs_get_next_fence; ws->base.cs_is_buffer_referenced = radeon_bo_is_referenced; ws->base.cs_sync_flush = radeon_drm_cs_sync_flush; ws->base.fence_wait = radeon_fence_wait; diff -Nru mesa-12.0.6/src/gallium/winsys/radeon/drm/radeon_drm_cs.h mesa-17.0.7/src/gallium/winsys/radeon/drm/radeon_drm_cs.h --- mesa-12.0.6/src/gallium/winsys/radeon/drm/radeon_drm_cs.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/radeon/drm/radeon_drm_cs.h 2017-06-01 10:37:10.000000000 +0000 @@ -31,7 +31,14 @@ struct radeon_bo_item { struct radeon_bo *bo; - uint64_t priority_usage; + union { + struct { + uint64_t priority_usage; + } real; + struct { + unsigned real_idx; + } slab; + } u; }; struct radeon_cs_context { @@ -44,17 +51,17 @@ uint32_t flags[2]; /* Buffers. */ - unsigned nrelocs; - unsigned crelocs; - unsigned validated_crelocs; + unsigned max_relocs; + unsigned num_relocs; + unsigned num_validated_relocs; struct radeon_bo_item *relocs_bo; struct drm_radeon_cs_reloc *relocs; - uint64_t *priority_usage; - int reloc_indices_hashlist[4096]; + unsigned num_slab_buffers; + unsigned max_slab_buffers; + struct radeon_bo_item *slab_buffers; - uint64_t used_vram; - uint64_t used_gart; + int reloc_indices_hashlist[4096]; }; struct radeon_drm_cs { @@ -78,7 +85,8 @@ void (*flush_cs)(void *ctx, unsigned flags, struct pipe_fence_handle **fence); void *flush_data; - pipe_semaphore flush_completed; + struct util_queue_fence flush_completed; + struct pipe_fence_handle *next_fence; }; int radeon_lookup_buffer(struct radeon_cs_context *csc, struct radeon_bo *bo); @@ -89,7 +97,7 @@ return (struct radeon_drm_cs*)base; } -static inline boolean +static inline bool radeon_bo_is_referenced_by_cs(struct radeon_drm_cs *cs, struct radeon_bo *bo) { @@ -98,23 +106,26 @@ (num_refs && radeon_lookup_buffer(cs->csc, bo) != -1); } -static inline boolean +static inline bool radeon_bo_is_referenced_by_cs_for_write(struct radeon_drm_cs *cs, struct radeon_bo *bo) { int index; if (!bo->num_cs_references) - return FALSE; + return false; index = radeon_lookup_buffer(cs->csc, bo); if (index == -1) - return FALSE; + return false; + + if (!bo->handle) + index = cs->csc->slab_buffers[index].u.slab.real_idx; return cs->csc->relocs[index].write_domain != 0; } -static inline boolean +static inline bool radeon_bo_is_referenced_by_any_cs(struct radeon_bo *bo) { return bo->num_cs_references != 0; @@ -122,6 +133,6 @@ void radeon_drm_cs_sync_flush(struct radeon_winsys_cs *rcs); void radeon_drm_cs_init_functions(struct radeon_drm_winsys *ws); -void radeon_drm_cs_emit_ioctl_oneshot(struct radeon_drm_cs *cs, struct radeon_cs_context *csc); +void radeon_drm_cs_emit_ioctl_oneshot(void *job, int thread_index); #endif diff -Nru mesa-12.0.6/src/gallium/winsys/radeon/drm/radeon_drm_surface.c mesa-17.0.7/src/gallium/winsys/radeon/drm/radeon_drm_surface.c --- mesa-12.0.6/src/gallium/winsys/radeon/drm/radeon_drm_surface.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/radeon/drm/radeon_drm_surface.c 2017-06-01 10:37:10.000000000 +0000 @@ -28,7 +28,7 @@ */ #include "radeon_drm_winsys.h" - +#include "util/u_format.h" #include static unsigned cik_get_macro_tile_index(struct radeon_surf *surf) @@ -45,152 +45,207 @@ return index; } +#define G_009910_MICRO_TILE_MODE(x) (((x) >> 0) & 0x03) +#define G_009910_MICRO_TILE_MODE_NEW(x) (((x) >> 22) & 0x07) + +static void set_micro_tile_mode(struct radeon_surf *surf, + struct radeon_info *info) +{ + uint32_t tile_mode; + + if (info->chip_class < SI) { + surf->micro_tile_mode = 0; + return; + } + + tile_mode = info->si_tile_mode_array[surf->tiling_index[0]]; + + if (info->chip_class >= CIK) + surf->micro_tile_mode = G_009910_MICRO_TILE_MODE_NEW(tile_mode); + else + surf->micro_tile_mode = G_009910_MICRO_TILE_MODE(tile_mode); +} + static void surf_level_winsys_to_drm(struct radeon_surface_level *level_drm, - const struct radeon_surf_level *level_ws) + const struct radeon_surf_level *level_ws, + unsigned bpe) { level_drm->offset = level_ws->offset; level_drm->slice_size = level_ws->slice_size; - level_drm->npix_x = level_ws->npix_x; - level_drm->npix_y = level_ws->npix_y; - level_drm->npix_z = level_ws->npix_z; level_drm->nblk_x = level_ws->nblk_x; level_drm->nblk_y = level_ws->nblk_y; - level_drm->nblk_z = level_ws->nblk_z; - level_drm->pitch_bytes = level_ws->pitch_bytes; + level_drm->pitch_bytes = level_ws->nblk_x * bpe; level_drm->mode = level_ws->mode; } static void surf_level_drm_to_winsys(struct radeon_surf_level *level_ws, - const struct radeon_surface_level *level_drm) + const struct radeon_surface_level *level_drm, + unsigned bpe) { level_ws->offset = level_drm->offset; level_ws->slice_size = level_drm->slice_size; - level_ws->npix_x = level_drm->npix_x; - level_ws->npix_y = level_drm->npix_y; - level_ws->npix_z = level_drm->npix_z; level_ws->nblk_x = level_drm->nblk_x; level_ws->nblk_y = level_drm->nblk_y; - level_ws->nblk_z = level_drm->nblk_z; - level_ws->pitch_bytes = level_drm->pitch_bytes; level_ws->mode = level_drm->mode; + assert(level_drm->nblk_x * bpe == level_drm->pitch_bytes); } static void surf_winsys_to_drm(struct radeon_surface *surf_drm, + const struct pipe_resource *tex, + unsigned flags, unsigned bpe, + enum radeon_surf_mode mode, const struct radeon_surf *surf_ws) { int i; memset(surf_drm, 0, sizeof(*surf_drm)); - surf_drm->npix_x = surf_ws->npix_x; - surf_drm->npix_y = surf_ws->npix_y; - surf_drm->npix_z = surf_ws->npix_z; - surf_drm->blk_w = surf_ws->blk_w; - surf_drm->blk_h = surf_ws->blk_h; - surf_drm->blk_d = surf_ws->blk_d; - surf_drm->array_size = surf_ws->array_size; - surf_drm->last_level = surf_ws->last_level; - surf_drm->bpe = surf_ws->bpe; - surf_drm->nsamples = surf_ws->nsamples; - surf_drm->flags = surf_ws->flags; + surf_drm->npix_x = tex->width0; + surf_drm->npix_y = tex->height0; + surf_drm->npix_z = tex->depth0; + surf_drm->blk_w = util_format_get_blockwidth(tex->format); + surf_drm->blk_h = util_format_get_blockheight(tex->format); + surf_drm->blk_d = 1; + surf_drm->array_size = 1; + surf_drm->last_level = tex->last_level; + surf_drm->bpe = bpe; + surf_drm->nsamples = tex->nr_samples ? tex->nr_samples : 1; + + surf_drm->flags = flags; + surf_drm->flags = RADEON_SURF_CLR(surf_drm->flags, TYPE); + surf_drm->flags = RADEON_SURF_CLR(surf_drm->flags, MODE); + surf_drm->flags |= RADEON_SURF_SET(mode, MODE) | + RADEON_SURF_HAS_SBUFFER_MIPTREE | + RADEON_SURF_HAS_TILE_MODE_INDEX; + + switch (tex->target) { + case PIPE_TEXTURE_1D: + surf_drm->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_1D, TYPE); + break; + case PIPE_TEXTURE_RECT: + case PIPE_TEXTURE_2D: + surf_drm->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_2D, TYPE); + break; + case PIPE_TEXTURE_3D: + surf_drm->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_3D, TYPE); + break; + case PIPE_TEXTURE_1D_ARRAY: + surf_drm->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_1D_ARRAY, TYPE); + surf_drm->array_size = tex->array_size; + break; + case PIPE_TEXTURE_CUBE_ARRAY: /* cube array layout like 2d array */ + assert(tex->array_size % 6 == 0); + /* fall through */ + case PIPE_TEXTURE_2D_ARRAY: + surf_drm->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_2D_ARRAY, TYPE); + surf_drm->array_size = tex->array_size; + break; + case PIPE_TEXTURE_CUBE: + surf_drm->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_CUBEMAP, TYPE); + break; + case PIPE_BUFFER: + default: + assert(0); + } - surf_drm->bo_size = surf_ws->bo_size; - surf_drm->bo_alignment = surf_ws->bo_alignment; + surf_drm->bo_size = surf_ws->surf_size; + surf_drm->bo_alignment = surf_ws->surf_alignment; surf_drm->bankw = surf_ws->bankw; surf_drm->bankh = surf_ws->bankh; surf_drm->mtilea = surf_ws->mtilea; surf_drm->tile_split = surf_ws->tile_split; - surf_drm->stencil_tile_split = surf_ws->stencil_tile_split; - surf_drm->stencil_offset = surf_ws->stencil_offset; - for (i = 0; i < RADEON_SURF_MAX_LEVEL; i++) { - surf_level_winsys_to_drm(&surf_drm->level[i], &surf_ws->level[i]); - surf_level_winsys_to_drm(&surf_drm->stencil_level[i], - &surf_ws->stencil_level[i]); + for (i = 0; i <= surf_drm->last_level; i++) { + surf_level_winsys_to_drm(&surf_drm->level[i], &surf_ws->level[i], + bpe * surf_drm->nsamples); surf_drm->tiling_index[i] = surf_ws->tiling_index[i]; - surf_drm->stencil_tiling_index[i] = surf_ws->stencil_tiling_index[i]; + } + + if (flags & RADEON_SURF_SBUFFER) { + surf_drm->stencil_tile_split = surf_ws->stencil_tile_split; + + for (i = 0; i <= surf_drm->last_level; i++) { + surf_level_winsys_to_drm(&surf_drm->stencil_level[i], + &surf_ws->stencil_level[i], + surf_drm->nsamples); + surf_drm->stencil_tiling_index[i] = surf_ws->stencil_tiling_index[i]; + } } } -static void surf_drm_to_winsys(struct radeon_surf *surf_ws, +static void surf_drm_to_winsys(struct radeon_drm_winsys *ws, + struct radeon_surf *surf_ws, const struct radeon_surface *surf_drm) { int i; memset(surf_ws, 0, sizeof(*surf_ws)); - surf_ws->npix_x = surf_drm->npix_x; - surf_ws->npix_y = surf_drm->npix_y; - surf_ws->npix_z = surf_drm->npix_z; surf_ws->blk_w = surf_drm->blk_w; surf_ws->blk_h = surf_drm->blk_h; - surf_ws->blk_d = surf_drm->blk_d; - surf_ws->array_size = surf_drm->array_size; - surf_ws->last_level = surf_drm->last_level; surf_ws->bpe = surf_drm->bpe; - surf_ws->nsamples = surf_drm->nsamples; + surf_ws->is_linear = surf_drm->level[0].mode <= RADEON_SURF_MODE_LINEAR_ALIGNED; surf_ws->flags = surf_drm->flags; - surf_ws->bo_size = surf_drm->bo_size; - surf_ws->bo_alignment = surf_drm->bo_alignment; + surf_ws->surf_size = surf_drm->bo_size; + surf_ws->surf_alignment = surf_drm->bo_alignment; surf_ws->bankw = surf_drm->bankw; surf_ws->bankh = surf_drm->bankh; surf_ws->mtilea = surf_drm->mtilea; surf_ws->tile_split = surf_drm->tile_split; - surf_ws->stencil_tile_split = surf_drm->stencil_tile_split; - surf_ws->stencil_offset = surf_drm->stencil_offset; surf_ws->macro_tile_index = cik_get_macro_tile_index(surf_ws); - for (i = 0; i < RADEON_SURF_MAX_LEVEL; i++) { - surf_level_drm_to_winsys(&surf_ws->level[i], &surf_drm->level[i]); - surf_level_drm_to_winsys(&surf_ws->stencil_level[i], - &surf_drm->stencil_level[i]); - + for (i = 0; i <= surf_drm->last_level; i++) { + surf_level_drm_to_winsys(&surf_ws->level[i], &surf_drm->level[i], + surf_drm->bpe * surf_drm->nsamples); surf_ws->tiling_index[i] = surf_drm->tiling_index[i]; - surf_ws->stencil_tiling_index[i] = surf_drm->stencil_tiling_index[i]; } -} -static int radeon_winsys_surface_init(struct radeon_winsys *rws, - struct radeon_surf *surf_ws) -{ - struct radeon_drm_winsys *ws = (struct radeon_drm_winsys*)rws; - struct radeon_surface surf_drm; - int r; - - surf_winsys_to_drm(&surf_drm, surf_ws); + if (surf_ws->flags & RADEON_SURF_SBUFFER) { + surf_ws->stencil_tile_split = surf_drm->stencil_tile_split; - r = radeon_surface_init(ws->surf_man, &surf_drm); - if (r) - return r; + for (i = 0; i <= surf_drm->last_level; i++) { + surf_level_drm_to_winsys(&surf_ws->stencil_level[i], + &surf_drm->stencil_level[i], + surf_drm->nsamples); + surf_ws->stencil_tiling_index[i] = surf_drm->stencil_tiling_index[i]; + } + } - surf_drm_to_winsys(surf_ws, &surf_drm); - return 0; + set_micro_tile_mode(surf_ws, &ws->info); } -static int radeon_winsys_surface_best(struct radeon_winsys *rws, +static int radeon_winsys_surface_init(struct radeon_winsys *rws, + const struct pipe_resource *tex, + unsigned flags, unsigned bpe, + enum radeon_surf_mode mode, struct radeon_surf *surf_ws) { struct radeon_drm_winsys *ws = (struct radeon_drm_winsys*)rws; struct radeon_surface surf_drm; int r; - surf_winsys_to_drm(&surf_drm, surf_ws); + surf_winsys_to_drm(&surf_drm, tex, flags, bpe, mode, surf_ws); - r = radeon_surface_best(ws->surf_man, &surf_drm); + if (!(flags & (RADEON_SURF_IMPORTED | RADEON_SURF_FMASK))) { + r = radeon_surface_best(ws->surf_man, &surf_drm); + if (r) + return r; + } + + r = radeon_surface_init(ws->surf_man, &surf_drm); if (r) return r; - surf_drm_to_winsys(surf_ws, &surf_drm); + surf_drm_to_winsys(ws, surf_ws, &surf_drm); return 0; } void radeon_surface_init_functions(struct radeon_drm_winsys *ws) { ws->base.surface_init = radeon_winsys_surface_init; - ws->base.surface_best = radeon_winsys_surface_best; } diff -Nru mesa-12.0.6/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c mesa-17.0.7/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c --- mesa-12.0.6/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c 2017-06-01 10:37:10.000000000 +0000 @@ -35,7 +35,6 @@ #include "radeon_drm_cs.h" #include "radeon_drm_public.h" -#include "pipebuffer/pb_bufmgr.h" #include "util/u_memory.h" #include "util/u_hash_table.h" @@ -68,16 +67,16 @@ pipe_static_mutex(fd_tab_mutex); /* Enable/disable feature access for one command stream. - * If enable == TRUE, return TRUE on success. - * Otherwise, return FALSE. + * If enable == true, return true on success. + * Otherwise, return false. * * We basically do the same thing kernel does, because we have to deal * with multiple contexts (here command streams) backed by one winsys. */ -static boolean radeon_set_fd_access(struct radeon_drm_cs *applier, - struct radeon_drm_cs **owner, - pipe_mutex *mutex, - unsigned request, const char *request_name, - boolean enable) +static bool radeon_set_fd_access(struct radeon_drm_cs *applier, + struct radeon_drm_cs **owner, + pipe_mutex *mutex, + unsigned request, const char *request_name, + bool enable) { struct drm_radeon_info info; unsigned value = enable ? 1 : 0; @@ -90,12 +89,12 @@ if (enable) { if (*owner) { pipe_mutex_unlock(*mutex); - return FALSE; + return false; } } else { if (*owner != applier) { pipe_mutex_unlock(*mutex); - return FALSE; + return false; } } @@ -105,7 +104,7 @@ if (drmCommandWriteRead(applier->ws->fd, DRM_RADEON_INFO, &info, sizeof(info)) != 0) { pipe_mutex_unlock(*mutex); - return FALSE; + return false; } /* Update the rights in the winsys. */ @@ -113,18 +112,18 @@ if (value) { *owner = applier; pipe_mutex_unlock(*mutex); - return TRUE; + return true; } } else { *owner = NULL; } pipe_mutex_unlock(*mutex); - return FALSE; + return false; } -static boolean radeon_get_drm_value(int fd, unsigned request, - const char *errname, uint32_t *out) +static bool radeon_get_drm_value(int fd, unsigned request, + const char *errname, uint32_t *out) { struct drm_radeon_info info; int retval; @@ -140,13 +139,13 @@ fprintf(stderr, "radeon: Failed to get %s, error number %d\n", errname, retval); } - return FALSE; + return false; } - return TRUE; + return true; } /* Helper function to do the ioctls needed for setup and init. */ -static boolean do_winsys_init(struct radeon_drm_winsys *ws) +static bool do_winsys_init(struct radeon_drm_winsys *ws) { struct drm_radeon_gem_info gem_info; int retval; @@ -183,7 +182,7 @@ version->version_minor, version->version_patchlevel); drmFreeVersion(version); - return FALSE; + return false; } ws->info.drm_major = version->version_major; @@ -194,7 +193,7 @@ /* Get PCI ID. */ if (!radeon_get_drm_value(ws->fd, RADEON_INFO_DEVICE_ID, "PCI ID", &ws->info.pci_id)) - return FALSE; + return false; /* Check PCI ID. */ switch (ws->info.pci_id) { @@ -212,14 +211,14 @@ default: fprintf(stderr, "radeon: Invalid PCI ID.\n"); - return FALSE; + return false; } switch (ws->info.family) { default: case CHIP_UNKNOWN: fprintf(stderr, "radeon: Unknown family.\n"); - return FALSE; + return false; case CHIP_R300: case CHIP_R350: case CHIP_RV350: @@ -323,14 +322,14 @@ } /* Check for dma */ - ws->info.has_sdma = FALSE; + ws->info.has_sdma = false; /* DMA is disabled on R700. There is IB corruption and hangs. */ if (ws->info.chip_class >= EVERGREEN && ws->info.drm_minor >= 27) { - ws->info.has_sdma = TRUE; + ws->info.has_sdma = true; } /* Check for UVD and VCE */ - ws->info.has_uvd = FALSE; + ws->info.has_uvd = false; ws->info.vce_fw_version = 0x00000000; if (ws->info.drm_minor >= 32) { uint32_t value = RADEON_CS_RING_UVD; @@ -369,11 +368,17 @@ if (retval) { fprintf(stderr, "radeon: Failed to get MM info, error number %d\n", retval); - return FALSE; + return false; } ws->info.gart_size = gem_info.gart_size; ws->info.vram_size = gem_info.vram_size; + /* Radeon allocates all buffers as contigous, which makes large allocations + * unlikely to succeed. */ + ws->info.max_alloc_size = MAX2(ws->info.vram_size, ws->info.gart_size) * 0.7; + if (ws->info.drm_minor < 40) + ws->info.max_alloc_size = MIN2(ws->info.max_alloc_size, 256*1024*1024); + /* Get max clock frequency info and convert it to MHz */ radeon_get_drm_value(ws->fd, RADEON_INFO_MAX_SCLK, NULL, &ws->info.max_shader_clock); @@ -389,12 +394,12 @@ if (!radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_GB_PIPES, "GB pipe count", &ws->info.r300_num_gb_pipes)) - return FALSE; + return false; if (!radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_Z_PIPES, "Z pipe count", &ws->info.r300_num_z_pipes)) - return FALSE; + return false; } else if (ws->gen >= DRV_R600) { uint32_t tiling_config = 0; @@ -402,7 +407,7 @@ if (!radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_BACKENDS, "num backends", &ws->info.num_render_backends)) - return FALSE; + return false; /* get the GPU counter frequency, failure is not fatal */ radeon_get_drm_value(ws->fd, RADEON_INFO_CLOCK_CRYSTAL_FREQ, NULL, @@ -438,24 +443,24 @@ if (radeon_get_drm_value(ws->fd, RADEON_INFO_BACKEND_MAP, NULL, &ws->info.r600_gb_backend_map)) - ws->info.r600_gb_backend_map_valid = TRUE; + ws->info.r600_gb_backend_map_valid = true; - ws->info.has_virtual_memory = FALSE; + ws->info.has_virtual_memory = false; if (ws->info.drm_minor >= 13) { uint32_t ib_vm_max_size; - ws->info.has_virtual_memory = TRUE; + ws->info.has_virtual_memory = true; if (!radeon_get_drm_value(ws->fd, RADEON_INFO_VA_START, NULL, &ws->va_start)) - ws->info.has_virtual_memory = FALSE; + ws->info.has_virtual_memory = false; if (!radeon_get_drm_value(ws->fd, RADEON_INFO_IB_VM_MAX_SIZE, NULL, &ib_vm_max_size)) - ws->info.has_virtual_memory = FALSE; + ws->info.has_virtual_memory = false; radeon_get_drm_value(ws->fd, RADEON_INFO_VA_UNMAP_WORKING, NULL, &ws->va_unmap_working); } - if (ws->gen == DRV_R600 && !debug_get_bool_option("RADEON_VA", FALSE)) - ws->info.has_virtual_memory = FALSE; + if (ws->gen == DRV_R600 && !debug_get_bool_option("RADEON_VA", false)) + ws->info.has_virtual_memory = false; } /* Get max pipes, this is only needed for compute shaders. All evergreen+ @@ -502,14 +507,14 @@ "returned accel_working2 value %u is smaller than 2. " "Please install a newer kernel.\n", ws->accel_working2); - return FALSE; + return false; } if (ws->info.chip_class == CIK) { if (!radeon_get_drm_value(ws->fd, RADEON_INFO_CIK_MACROTILE_MODE_ARRAY, NULL, ws->info.cik_macrotile_mode_array)) { fprintf(stderr, "radeon: Kernel 3.13 is required for CIK support.\n"); - return FALSE; + return false; } } @@ -517,7 +522,7 @@ if (!radeon_get_drm_value(ws->fd, RADEON_INFO_SI_TILE_MODE_ARRAY, NULL, ws->info.si_tile_mode_array)) { fprintf(stderr, "radeon: Kernel 3.10 is required for SI support.\n"); - return FALSE; + return false; } } @@ -528,24 +533,23 @@ (ws->info.family == CHIP_HAWAII && ws->accel_working2 < 3); - return TRUE; + ws->check_vm = strstr(debug_get_option("R600_DEBUG", ""), "check_vm") != NULL; + + return true; } static void radeon_winsys_destroy(struct radeon_winsys *rws) { struct radeon_drm_winsys *ws = (struct radeon_drm_winsys*)rws; - if (ws->thread) { - ws->kill_thread = 1; - pipe_semaphore_signal(&ws->cs_queued); - pipe_thread_wait(ws->thread); - } - pipe_semaphore_destroy(&ws->cs_queued); + if (util_queue_is_initialized(&ws->cs_queue)) + util_queue_destroy(&ws->cs_queue); pipe_mutex_destroy(ws->hyperz_owner_mutex); pipe_mutex_destroy(ws->cmask_owner_mutex); - pipe_mutex_destroy(ws->cs_stack_lock); + if (ws->info.has_virtual_memory) + pb_slabs_deinit(&ws->bo_slabs); pb_cache_deinit(&ws->bo_cache); if (ws->gen >= DRV_R600) { @@ -557,6 +561,7 @@ util_hash_table_destroy(ws->bo_vas); pipe_mutex_destroy(ws->bo_handles_mutex); pipe_mutex_destroy(ws->bo_va_mutex); + pipe_mutex_destroy(ws->bo_fence_lock); if (ws->fd >= 0) close(ws->fd); @@ -570,9 +575,9 @@ *info = ((struct radeon_drm_winsys *)rws)->info; } -static boolean radeon_cs_request_feature(struct radeon_winsys_cs *rcs, - enum radeon_feature_id fid, - boolean enable) +static bool radeon_cs_request_feature(struct radeon_winsys_cs *rcs, + enum radeon_feature_id fid, + bool enable) { struct radeon_drm_cs *cs = radeon_drm_cs(rcs); @@ -589,7 +594,7 @@ RADEON_INFO_WANT_CMASK, "AA optimizations", enable); } - return FALSE; + return false; } static uint64_t radeon_query_value(struct radeon_winsys *rws, @@ -603,6 +608,10 @@ return ws->allocated_vram; case RADEON_REQUESTED_GTT_MEMORY: return ws->allocated_gtt; + case RADEON_MAPPED_VRAM: + return ws->mapped_vram; + case RADEON_MAPPED_GTT: + return ws->mapped_gtt; case RADEON_BUFFER_WAIT_TIME_NS: return ws->buffer_wait_time; case RADEON_TIMESTAMP: @@ -614,12 +623,16 @@ radeon_get_drm_value(ws->fd, RADEON_INFO_TIMESTAMP, "timestamp", (uint32_t*)&retval); return retval; - case RADEON_NUM_CS_FLUSHES: - return ws->num_cs_flushes; + case RADEON_NUM_GFX_IBS: + return ws->num_gfx_IBs; + case RADEON_NUM_SDMA_IBS: + return ws->num_sdma_IBs; case RADEON_NUM_BYTES_MOVED: radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_BYTES_MOVED, "num-bytes-moved", (uint32_t*)&retval); return retval; + case RADEON_NUM_EVICTIONS: + return 0; /* unimplemented */ case RADEON_VRAM_USAGE: radeon_get_drm_value(ws->fd, RADEON_INFO_VRAM_USAGE, "vram-usage", (uint32_t*)&retval); @@ -687,55 +700,7 @@ stat1.st_rdev != stat2.st_rdev; } -void radeon_drm_ws_queue_cs(struct radeon_drm_winsys *ws, struct radeon_drm_cs *cs) -{ -retry: - pipe_mutex_lock(ws->cs_stack_lock); - if (ws->ncs >= RING_LAST) { - /* no room left for a flush */ - pipe_mutex_unlock(ws->cs_stack_lock); - goto retry; - } - ws->cs_stack[ws->ncs++] = cs; - pipe_mutex_unlock(ws->cs_stack_lock); - pipe_semaphore_signal(&ws->cs_queued); -} - -static PIPE_THREAD_ROUTINE(radeon_drm_cs_emit_ioctl, param) -{ - struct radeon_drm_winsys *ws = (struct radeon_drm_winsys *)param; - struct radeon_drm_cs *cs; - unsigned i; - - while (1) { - pipe_semaphore_wait(&ws->cs_queued); - if (ws->kill_thread) - break; - - pipe_mutex_lock(ws->cs_stack_lock); - cs = ws->cs_stack[0]; - for (i = 1; i < ws->ncs; i++) - ws->cs_stack[i - 1] = ws->cs_stack[i]; - ws->cs_stack[--ws->ncs] = NULL; - pipe_mutex_unlock(ws->cs_stack_lock); - - if (cs) { - radeon_drm_cs_emit_ioctl_oneshot(cs, cs->cst); - pipe_semaphore_signal(&cs->flush_completed); - } - } - pipe_mutex_lock(ws->cs_stack_lock); - for (i = 0; i < ws->ncs; i++) { - pipe_semaphore_signal(&ws->cs_stack[i]->flush_completed); - ws->cs_stack[i] = NULL; - } - ws->ncs = 0; - pipe_mutex_unlock(ws->cs_stack_lock); - return 0; -} - -DEBUG_GET_ONCE_BOOL_OPTION(thread, "RADEON_THREAD", TRUE) -static PIPE_THREAD_ROUTINE(radeon_drm_cs_emit_ioctl, param); +DEBUG_GET_ONCE_BOOL_OPTION(thread, "RADEON_THREAD", true) static bool radeon_winsys_unref(struct radeon_winsys *ws) { @@ -796,15 +761,34 @@ if (!do_winsys_init(ws)) goto fail1; - pb_cache_init(&ws->bo_cache, 500000, 2.0f, 0, + pb_cache_init(&ws->bo_cache, 500000, ws->check_vm ? 1.0f : 2.0f, 0, MIN2(ws->info.vram_size, ws->info.gart_size), radeon_bo_destroy, radeon_bo_can_reclaim); + if (ws->info.has_virtual_memory) { + /* There is no fundamental obstacle to using slab buffer allocation + * without GPUVM, but enabling it requires making sure that the drivers + * honor the address offset. + */ + if (!pb_slabs_init(&ws->bo_slabs, + RADEON_SLAB_MIN_SIZE_LOG2, RADEON_SLAB_MAX_SIZE_LOG2, + 12, + ws, + radeon_bo_can_reclaim_slab, + radeon_bo_slab_alloc, + radeon_bo_slab_free)) + goto fail_cache; + + ws->info.min_alloc_size = 1 << RADEON_SLAB_MIN_SIZE_LOG2; + } else { + ws->info.min_alloc_size = ws->info.gart_page_size; + } + if (ws->gen >= DRV_R600) { ws->surf_man = radeon_surface_manager_new(ws->fd); if (!ws->surf_man) - goto fail; + goto fail_slab; } /* init reference */ @@ -824,23 +808,21 @@ pipe_mutex_init(ws->hyperz_owner_mutex); pipe_mutex_init(ws->cmask_owner_mutex); - pipe_mutex_init(ws->cs_stack_lock); ws->bo_names = util_hash_table_create(handle_hash, handle_compare); ws->bo_handles = util_hash_table_create(handle_hash, handle_compare); ws->bo_vas = util_hash_table_create(handle_hash, handle_compare); pipe_mutex_init(ws->bo_handles_mutex); pipe_mutex_init(ws->bo_va_mutex); + pipe_mutex_init(ws->bo_fence_lock); ws->va_offset = ws->va_start; list_inithead(&ws->va_holes); /* TTM aligns the BO size to the CPU page size */ ws->info.gart_page_size = sysconf(_SC_PAGESIZE); - ws->ncs = 0; - pipe_semaphore_init(&ws->cs_queued, 0); if (ws->num_cpus > 1 && debug_get_option_thread()) - ws->thread = pipe_thread_create(radeon_drm_cs_emit_ioctl, ws); + util_queue_init(&ws->cs_queue, "radeon_cs", 8, 1); /* Create the screen at the end. The winsys must be initialized * completely. @@ -863,7 +845,10 @@ return &ws->base; -fail: +fail_slab: + if (ws->info.has_virtual_memory) + pb_slabs_deinit(&ws->bo_slabs); +fail_cache: pb_cache_deinit(&ws->bo_cache); fail1: pipe_mutex_unlock(fd_tab_mutex); diff -Nru mesa-12.0.6/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h mesa-17.0.7/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h --- mesa-12.0.6/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h 2017-06-01 10:37:10.000000000 +0000 @@ -32,7 +32,8 @@ #include "gallium/drivers/radeon/radeon_winsys.h" #include "pipebuffer/pb_cache.h" -#include "os/os_thread.h" +#include "pipebuffer/pb_slab.h" +#include "util/u_queue.h" #include "util/list.h" #include @@ -62,17 +63,25 @@ DRV_SI }; +#define RADEON_SLAB_MIN_SIZE_LOG2 9 +#define RADEON_SLAB_MAX_SIZE_LOG2 14 + struct radeon_drm_winsys { struct radeon_winsys base; struct pipe_reference reference; struct pb_cache bo_cache; + struct pb_slabs bo_slabs; int fd; /* DRM file descriptor */ int num_cs; /* The number of command streams created. */ uint64_t allocated_vram; uint64_t allocated_gtt; + uint64_t mapped_vram; + uint64_t mapped_gtt; uint64_t buffer_wait_time; /* time spent in buffer_wait in ns */ - uint64_t num_cs_flushes; + uint64_t num_gfx_IBs; + uint64_t num_sdma_IBs; + uint32_t next_bo_hash; enum radeon_generation gen; struct radeon_info info; @@ -88,9 +97,11 @@ struct util_hash_table *bo_vas; pipe_mutex bo_handles_mutex; pipe_mutex bo_va_mutex; + pipe_mutex bo_fence_lock; uint64_t va_offset; struct list_head va_holes; + bool check_vm; struct radeon_surface_manager *surf_man; @@ -101,13 +112,8 @@ struct radeon_drm_cs *cmask_owner; pipe_mutex cmask_owner_mutex; - /* rings submission thread */ - pipe_mutex cs_stack_lock; - pipe_semaphore cs_queued; - pipe_thread thread; - int kill_thread; - int ncs; - struct radeon_drm_cs *cs_stack[RING_LAST]; + /* multithreaded command submission */ + struct util_queue cs_queue; }; static inline struct radeon_drm_winsys * @@ -116,7 +122,6 @@ return (struct radeon_drm_winsys*)base; } -void radeon_drm_ws_queue_cs(struct radeon_drm_winsys *ws, struct radeon_drm_cs *cs); void radeon_surface_init_functions(struct radeon_drm_winsys *ws); #endif diff -Nru mesa-12.0.6/src/gallium/winsys/svga/drm/Makefile.in mesa-17.0.7/src/gallium/winsys/svga/drm/Makefile.in --- mesa-12.0.6/src/gallium/winsys/svga/drm/Makefile.in 2017-01-24 01:41:52.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/svga/drm/Makefile.in 2017-06-01 10:37:22.000000000 +0000 @@ -111,10 +111,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -217,6 +220,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -233,6 +238,7 @@ CFLAGS = @CFLAGS@ -std=gnu99 CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -262,10 +268,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -315,11 +322,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -359,8 +363,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -397,8 +399,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -407,7 +407,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -415,13 +414,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -450,6 +450,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -582,12 +583,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -599,7 +596,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ -I$(top_srcdir)/src/gallium/drivers/svga \ -I$(top_srcdir)/src/gallium/drivers/svga/include \ diff -Nru mesa-12.0.6/src/gallium/winsys/svga/drm/vmw_screen_svga.c mesa-17.0.7/src/gallium/winsys/svga/drm/vmw_screen_svga.c --- mesa-12.0.6/src/gallium/winsys/svga/drm/vmw_screen_svga.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/svga/drm/vmw_screen_svga.c 2017-06-01 10:37:10.000000000 +0000 @@ -280,6 +280,18 @@ } +static void +vmw_svga_winsys_surface_invalidate(struct svga_winsys_screen *sws, + struct svga_winsys_surface *surf) +{ + /* this is a noop since surface invalidation is not needed for DMA path. + * DMA is enabled when guest-backed surface is not enabled or + * guest-backed dma is enabled. Since guest-backed dma is enabled + * when guest-backed surface is enabled, that implies DMA is always enabled; + * hence, surface invalidation is not needed. + */ +} + static boolean vmw_svga_winsys_surface_is_flushed(struct svga_winsys_screen *sws, struct svga_winsys_surface *surface) @@ -395,6 +407,22 @@ vmw_svga_winsys_shader_reference(&d_shader, NULL); } +static void +vmw_svga_winsys_stats_inc(enum svga_stats_count index) +{ +} + +static void +vmw_svga_winsys_stats_time_push(enum svga_stats_time index, + struct svga_winsys_stats_timeframe *tf) +{ +} + +static void +vmw_svga_winsys_stats_time_pop() +{ +} + boolean vmw_winsys_screen_init_svga(struct vmw_winsys_screen *vws) { @@ -406,6 +434,7 @@ vws->base.surface_is_flushed = vmw_svga_winsys_surface_is_flushed; vws->base.surface_reference = vmw_svga_winsys_surface_ref; vws->base.surface_can_create = vmw_svga_winsys_surface_can_create; + vws->base.surface_invalidate = vmw_svga_winsys_surface_invalidate; vws->base.buffer_create = vmw_svga_winsys_buffer_create; vws->base.buffer_map = vmw_svga_winsys_buffer_map; vws->base.buffer_unmap = vmw_svga_winsys_buffer_unmap; @@ -421,6 +450,10 @@ vws->base.query_destroy = vmw_svga_winsys_query_destroy; vws->base.query_get_result = vmw_svga_winsys_query_get_result; + vws->base.stats_inc = vmw_svga_winsys_stats_inc; + vws->base.stats_time_push = vmw_svga_winsys_stats_time_push; + vws->base.stats_time_pop = vmw_svga_winsys_stats_time_pop; + return TRUE; } diff -Nru mesa-12.0.6/src/gallium/winsys/sw/dri/dri_sw_winsys.c mesa-17.0.7/src/gallium/winsys/sw/dri/dri_sw_winsys.c --- mesa-12.0.6/src/gallium/winsys/sw/dri/dri_sw_winsys.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/sw/dri/dri_sw_winsys.c 2017-06-01 10:37:10.000000000 +0000 @@ -200,7 +200,7 @@ if (box) { void *data; - data = dri_sw_dt->data + (dri_sw_dt->stride * box->y) + box->x * blsize; + data = (char *)dri_sw_dt->data + (dri_sw_dt->stride * box->y) + box->x * blsize; dri_sw_ws->lf->put_image2(dri_drawable, data, box->x, box->y, box->width, box->height, dri_sw_dt->stride); } else { diff -Nru mesa-12.0.6/src/gallium/winsys/sw/dri/Makefile.in mesa-17.0.7/src/gallium/winsys/sw/dri/Makefile.in --- mesa-12.0.6/src/gallium/winsys/sw/dri/Makefile.in 2017-01-24 01:41:52.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/sw/dri/Makefile.in 2017-06-01 10:37:22.000000000 +0000 @@ -111,10 +111,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -214,6 +217,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -228,6 +233,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -257,10 +263,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -310,11 +317,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -354,8 +358,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -392,8 +394,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -402,7 +402,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -410,13 +409,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -445,6 +445,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -558,12 +559,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -575,7 +572,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ $(GALLIUM_WINSYS_CFLAGS) diff -Nru mesa-12.0.6/src/gallium/winsys/sw/hgl/.editorconfig mesa-17.0.7/src/gallium/winsys/sw/hgl/.editorconfig --- mesa-12.0.6/src/gallium/winsys/sw/hgl/.editorconfig 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/sw/hgl/.editorconfig 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,2 @@ +[*.{c,h}] +indent_style = tab diff -Nru mesa-12.0.6/src/gallium/winsys/sw/hgl/hgl_sw_winsys.c mesa-17.0.7/src/gallium/winsys/sw/hgl/hgl_sw_winsys.c --- mesa-12.0.6/src/gallium/winsys/sw/hgl/hgl_sw_winsys.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/sw/hgl/hgl_sw_winsys.c 2017-06-01 10:37:10.000000000 +0000 @@ -106,7 +106,8 @@ static struct sw_displaytarget* hgl_winsys_displaytarget_create(struct sw_winsys* winsys, unsigned textureUsage, enum pipe_format format, unsigned width, - unsigned height, unsigned alignment, unsigned* stride) + unsigned height, unsigned alignment, const void *front_private, + unsigned* stride) { struct haiku_displaytarget* haikuDisplayTarget = CALLOC_STRUCT(haiku_displaytarget); diff -Nru mesa-12.0.6/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c mesa-17.0.7/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c --- mesa-12.0.6/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c 2017-06-01 10:37:10.000000000 +0000 @@ -252,18 +252,18 @@ if (!kms_sw_dt) return NULL; + off_t lseek_ret = lseek(fd, 0, SEEK_END); + if (lseek_ret == -1) { + FREE(kms_sw_dt); + return NULL; + } + kms_sw_dt->size = lseek_ret; kms_sw_dt->ref_count = 1; kms_sw_dt->handle = handle; - kms_sw_dt->size = lseek(fd, 0, SEEK_END); kms_sw_dt->width = width; kms_sw_dt->height = height; kms_sw_dt->stride = stride; - if (kms_sw_dt->size == (off_t)-1) { - FREE(kms_sw_dt); - return NULL; - } - lseek(fd, 0, SEEK_SET); list_add(&kms_sw_dt->link, &kms_sw->bo_list); diff -Nru mesa-12.0.6/src/gallium/winsys/sw/kms-dri/Makefile.in mesa-17.0.7/src/gallium/winsys/sw/kms-dri/Makefile.in --- mesa-12.0.6/src/gallium/winsys/sw/kms-dri/Makefile.in 2017-01-24 01:41:52.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/sw/kms-dri/Makefile.in 2017-06-01 10:37:22.000000000 +0000 @@ -112,10 +112,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -215,6 +218,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -229,6 +234,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -258,10 +264,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -311,11 +318,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -355,8 +359,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -393,8 +395,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -403,7 +403,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -411,13 +410,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -446,6 +446,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -559,12 +560,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -576,7 +573,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ $(GALLIUM_WINSYS_CFLAGS) \ $(LIBDRM_CFLAGS) diff -Nru mesa-12.0.6/src/gallium/winsys/sw/null/Makefile.in mesa-17.0.7/src/gallium/winsys/sw/null/Makefile.in --- mesa-12.0.6/src/gallium/winsys/sw/null/Makefile.in 2017-01-24 01:41:52.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/sw/null/Makefile.in 2017-06-01 10:37:23.000000000 +0000 @@ -111,10 +111,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -214,6 +217,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -228,6 +233,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -257,10 +263,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -310,11 +317,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -354,8 +358,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -392,8 +394,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -402,7 +402,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -410,13 +409,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -445,6 +445,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -558,12 +559,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -575,7 +572,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ $(GALLIUM_WINSYS_CFLAGS) diff -Nru mesa-12.0.6/src/gallium/winsys/sw/wrapper/Makefile.in mesa-17.0.7/src/gallium/winsys/sw/wrapper/Makefile.in --- mesa-12.0.6/src/gallium/winsys/sw/wrapper/Makefile.in 2017-01-24 01:41:52.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/sw/wrapper/Makefile.in 2017-06-01 10:37:23.000000000 +0000 @@ -111,10 +111,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -214,6 +217,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -228,6 +233,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -257,10 +263,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -310,11 +317,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -354,8 +358,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -392,8 +394,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -402,7 +402,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -410,13 +409,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -445,6 +445,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -558,12 +559,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -575,7 +572,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ $(GALLIUM_WINSYS_CFLAGS) diff -Nru mesa-12.0.6/src/gallium/winsys/sw/wrapper/wrapper_sw_winsys.c mesa-17.0.7/src/gallium/winsys/sw/wrapper/wrapper_sw_winsys.c --- mesa-12.0.6/src/gallium/winsys/sw/wrapper/wrapper_sw_winsys.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/sw/wrapper/wrapper_sw_winsys.c 2017-06-01 10:37:10.000000000 +0000 @@ -202,7 +202,7 @@ struct wrapper_sw_displaytarget *wdt = wrapper_sw_displaytarget(dt); struct pipe_resource *tex = wdt->tex; - return wsw->screen->resource_get_handle(wsw->screen, tex, whandle, + return wsw->screen->resource_get_handle(wsw->screen, NULL, tex, whandle, PIPE_HANDLE_USAGE_READ_WRITE); } diff -Nru mesa-12.0.6/src/gallium/winsys/sw/xlib/Makefile.in mesa-17.0.7/src/gallium/winsys/sw/xlib/Makefile.in --- mesa-12.0.6/src/gallium/winsys/sw/xlib/Makefile.in 2017-01-24 01:41:52.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/sw/xlib/Makefile.in 2017-06-01 10:37:23.000000000 +0000 @@ -111,10 +111,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -214,6 +217,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -228,6 +233,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -257,10 +263,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -310,11 +317,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -354,8 +358,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -392,8 +394,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -402,7 +402,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -410,13 +409,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -445,6 +445,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -558,12 +559,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -575,7 +572,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ $(GALLIUM_WINSYS_CFLAGS) \ $(X11_INCLUDES) diff -Nru mesa-12.0.6/src/gallium/winsys/vc4/drm/Makefile.in mesa-17.0.7/src/gallium/winsys/vc4/drm/Makefile.in --- mesa-12.0.6/src/gallium/winsys/vc4/drm/Makefile.in 2017-01-24 01:41:53.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/vc4/drm/Makefile.in 2017-06-01 10:37:23.000000000 +0000 @@ -110,10 +110,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -213,6 +216,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -227,6 +232,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -256,10 +262,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -309,11 +316,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -353,8 +357,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -391,8 +393,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -401,7 +401,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -409,13 +408,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -444,6 +444,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -557,12 +558,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -574,7 +571,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ -I$(top_srcdir)/src/gallium/drivers \ $(GALLIUM_WINSYS_CFLAGS) diff -Nru mesa-12.0.6/src/gallium/winsys/virgl/drm/Makefile.in mesa-17.0.7/src/gallium/winsys/virgl/drm/Makefile.in --- mesa-12.0.6/src/gallium/winsys/virgl/drm/Makefile.in 2017-01-24 01:41:53.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/virgl/drm/Makefile.in 2017-06-01 10:37:23.000000000 +0000 @@ -111,10 +111,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -214,6 +217,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -228,6 +233,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -257,10 +263,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -310,11 +317,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -354,8 +358,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -392,8 +394,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -402,7 +402,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -410,13 +409,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -445,6 +445,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -560,12 +561,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -577,7 +574,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ -I$(top_srcdir)/src/gallium/drivers \ $(GALLIUM_WINSYS_CFLAGS) \ diff -Nru mesa-12.0.6/src/gallium/winsys/virgl/drm/virgl_drm_winsys.c mesa-17.0.7/src/gallium/winsys/virgl/drm/virgl_drm_winsys.c --- mesa-12.0.6/src/gallium/winsys/virgl/drm/virgl_drm_winsys.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/virgl/drm/virgl_drm_winsys.c 2017-06-01 10:37:10.000000000 +0000 @@ -489,6 +489,9 @@ } else if (whandle->type == DRM_API_HANDLE_TYPE_FD) { if (drmPrimeHandleToFD(qdws->fd, res->bo_handle, DRM_CLOEXEC, (int*)&whandle->handle)) return FALSE; + pipe_mutex_lock(qdws->bo_handles_mutex); + util_hash_table_set(qdws->bo_handles, (void *)(uintptr_t)res->bo_handle, res); + pipe_mutex_unlock(qdws->bo_handles_mutex); } whandle->stride = stride; return TRUE; diff -Nru mesa-12.0.6/src/gallium/winsys/virgl/vtest/Makefile.in mesa-17.0.7/src/gallium/winsys/virgl/vtest/Makefile.in --- mesa-12.0.6/src/gallium/winsys/virgl/vtest/Makefile.in 2017-01-24 01:41:53.000000000 +0000 +++ mesa-17.0.7/src/gallium/winsys/virgl/vtest/Makefile.in 2017-06-01 10:37:23.000000000 +0000 @@ -111,10 +111,13 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_DRISW_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@am__append_1 = \ +@HAVE_LIBDRM_TRUE@ $(LIBDRM_LIBS) + +@HAVE_DRISW_TRUE@am__append_2 = \ @HAVE_DRISW_TRUE@ $(top_builddir)/src/gallium/winsys/sw/dri/libswdri.la -@HAVE_DRISW_KMS_TRUE@am__append_2 = \ +@HAVE_DRISW_KMS_TRUE@am__append_3 = \ @HAVE_DRISW_KMS_TRUE@ $(top_builddir)/src/gallium/winsys/sw/kms-dri/libswkmsdri.la \ @HAVE_DRISW_KMS_TRUE@ $(LIBDRM_LIBS) @@ -214,6 +217,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -228,6 +233,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -257,10 +263,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -310,11 +317,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -354,8 +358,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -392,8 +394,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -402,7 +402,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -410,13 +409,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -445,6 +445,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -561,12 +562,8 @@ $(LIBDRM_CFLAGS) \ $(VISIBILITY_CFLAGS) -GALLIUM_COMMON_LIB_DEPS = \ - -lm \ - $(CLOCK_LIB) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) - +GALLIUM_COMMON_LIB_DEPS = -lm $(LIBSENSORS_LIBS) $(CLOCK_LIB) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) $(am__append_1) GALLIUM_WINSYS_CFLAGS = \ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ @@ -578,7 +575,7 @@ GALLIUM_PIPE_LOADER_WINSYS_LIBS = \ $(top_builddir)/src/gallium/winsys/sw/null/libws_null.la \ $(top_builddir)/src/gallium/winsys/sw/wrapper/libwsw.la \ - $(am__append_1) $(am__append_2) + $(am__append_2) $(am__append_3) AM_CFLAGS = \ -I$(top_srcdir)/src/gallium/drivers \ $(GALLIUM_WINSYS_CFLAGS) diff -Nru mesa-12.0.6/src/gbm/backends/dri/gbm_dri.c mesa-17.0.7/src/gbm/backends/dri/gbm_dri.c --- mesa-12.0.6/src/gbm/backends/dri/gbm_dri.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gbm/backends/dri/gbm_dri.c 2017-06-01 10:37:10.000000000 +0000 @@ -239,11 +239,14 @@ const char *name; int version; int offset; + int optional; }; static struct dri_extension_match dri_core_extensions[] = { { __DRI2_FLUSH, 1, offsetof(struct gbm_dri_device, flush) }, { __DRI_IMAGE, 1, offsetof(struct gbm_dri_device, image) }, + { __DRI2_FENCE, 1, offsetof(struct gbm_dri_device, fence), 1 }, + { __DRI2_INTEROP, 1, offsetof(struct gbm_dri_device, interop), 1 }, { NULL, 0, 0 } }; @@ -279,7 +282,7 @@ for (j = 0; matches[j].name; j++) { field = ((char *) dri + matches[j].offset); - if (*(const __DRIextension **) field == NULL) { + if ((*(const __DRIextension **) field == NULL) && !matches[j].optional) { ret = -1; } } @@ -360,8 +363,8 @@ return NULL; } - if (asprintf(&get_extensions_name, "%s_%s", - __DRI_DRIVER_GET_EXTENSIONS, dri->base.driver_name) != -1) { + get_extensions_name = loader_get_extensions_name(dri->base.driver_name); + if (get_extensions_name) { const __DRIextension **(*get_extensions)(void); get_extensions = dlsym(dri->driver, get_extensions_name); @@ -437,19 +440,19 @@ return ret; }; - dri->extensions = gbm_dri_screen_extensions; + dri->loader_extensions = gbm_dri_screen_extensions; if (dri->dri2 == NULL) return -1; if (dri->dri2->base.version >= 4) { dri->screen = dri->dri2->createNewScreen2(0, dri->base.base.fd, - dri->extensions, + dri->loader_extensions, dri->driver_extensions, &dri->driver_configs, dri); } else { dri->screen = dri->dri2->createNewScreen(0, dri->base.base.fd, - dri->extensions, + dri->loader_extensions, &dri->driver_configs, dri); } if (dri->screen == NULL) @@ -487,17 +490,17 @@ return ret; } - dri->extensions = gbm_dri_screen_extensions; + dri->loader_extensions = gbm_dri_screen_extensions; if (dri->swrast == NULL) return -1; if (dri->swrast->base.version >= 4) { - dri->screen = dri->swrast->createNewScreen2(0, dri->extensions, + dri->screen = dri->swrast->createNewScreen2(0, dri->loader_extensions, dri->driver_extensions, &dri->driver_configs, dri); } else { - dri->screen = dri->swrast->createNewScreen(0, dri->extensions, + dri->screen = dri->swrast->createNewScreen(0, dri->loader_extensions, &dri->driver_configs, dri); } if (dri->screen == NULL) @@ -514,7 +517,7 @@ { char *driver_name; - driver_name = loader_get_driver_for_fd(dri->base.base.fd, 0); + driver_name = loader_get_driver_for_fd(dri->base.base.fd); if (!driver_name) return -1; @@ -868,8 +871,14 @@ bo->base.base.format = format; switch (format) { + case GBM_FORMAT_R8: + dri_format = __DRI_IMAGE_FORMAT_R8; + break; + case GBM_FORMAT_GR88: + dri_format = __DRI_IMAGE_FORMAT_GR88; + break; case GBM_FORMAT_RGB565: - dri_format =__DRI_IMAGE_FORMAT_RGB565; + dri_format = __DRI_IMAGE_FORMAT_RGB565; break; case GBM_FORMAT_XRGB8888: case GBM_BO_FORMAT_XRGB8888: @@ -978,6 +987,14 @@ return; dri->image->unmapImage(dri->context, bo->image, map_data); + + /* + * Not all DRI drivers use direct maps. They may queue up DMA operations + * on the mapping context. Since there is no explicit gbm flush + * mechanism, we need to flush here. + */ + if (dri->flush->base.version >= 4) + dri->flush->flush_with_flags(dri->context, NULL, __DRI2_FLUSH_CONTEXT, 0); } diff -Nru mesa-12.0.6/src/gbm/backends/dri/gbm_driint.h mesa-17.0.7/src/gbm/backends/dri/gbm_driint.h --- mesa-12.0.6/src/gbm/backends/dri/gbm_driint.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gbm/backends/dri/gbm_driint.h 2017-06-01 10:37:10.000000000 +0000 @@ -28,6 +28,8 @@ #ifndef _GBM_DRI_INTERNAL_H_ #define _GBM_DRI_INTERNAL_H_ +#include +#include #include #include "gbmint.h" #include "c11/threads.h" @@ -51,13 +53,15 @@ const __DRIcoreExtension *core; const __DRIdri2Extension *dri2; + const __DRI2fenceExtension *fence; const __DRIimageExtension *image; const __DRIswrastExtension *swrast; const __DRI2flushExtension *flush; const __DRIdri2LoaderExtension *loader; + const __DRI2interopExtension *interop; const __DRIconfig **driver_configs; - const __DRIextension **extensions; + const __DRIextension **loader_extensions; const __DRIextension **driver_extensions; __DRIimage *(*lookup_image)(__DRIscreen *screen, void *image, void *data); diff -Nru mesa-12.0.6/src/gbm/main/gbm.c mesa-17.0.7/src/gbm/main/gbm.c --- mesa-12.0.6/src/gbm/main/gbm.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gbm/main/gbm.c 2017-06-01 10:37:10.000000000 +0000 @@ -45,12 +45,6 @@ #include "gbmint.h" #include "backend.h" -#define ARRAY_SIZE(a) (sizeof(a)/sizeof((a)[0])) - -static struct gbm_device *devices[16]; - -static int device_num = 0; - /** Returns the file description for the gbm device * * \return The fd that the struct gbm_device was created with @@ -61,7 +55,6 @@ return gbm->fd; } -/* FIXME: maybe superfluous, use udev subclass from the fd? */ /** Get the backend name for the given gbm device * * \return The backend name string - this belongs to the device and must not @@ -104,32 +97,6 @@ gbm->destroy(gbm); } -struct gbm_device * -_gbm_mesa_get_device(int fd) -{ - struct gbm_device *gbm = NULL; - struct stat buf; - dev_t dev; - int i; - - if (fd < 0 || fstat(fd, &buf) < 0 || !S_ISCHR(buf.st_mode)) { - errno = EINVAL; - return NULL; - } - - for (i = 0; i < device_num; ++i) { - dev = devices[i]->stat.st_rdev; - if (major(dev) == major(buf.st_rdev) && - minor(dev) == minor(buf.st_rdev)) { - gbm = devices[i]; - gbm->refcount++; - break; - } - } - - return gbm; -} - /** Create a gbm device for allocating buffers * * The file descriptor passed in is used by the backend to communicate with @@ -137,7 +104,7 @@ * the file descriptor returned when opening a device such as \c * /dev/dri/card0 * - * \param fd The file descriptor for an backend specific device + * \param fd The file descriptor for a backend specific device * \return The newly created struct gbm_device. The resources associated with * the device should be freed with gbm_device_destroy() when it is no longer * needed. If the creation of the device failed NULL will be returned. @@ -153,9 +120,6 @@ return NULL; } - if (device_num == 0) - memset(devices, 0, sizeof devices); - gbm = _gbm_create_device(fd); if (gbm == NULL) return NULL; @@ -164,9 +128,6 @@ gbm->stat = buf; gbm->refcount = 1; - if (device_num < ARRAY_SIZE(devices)-1) - devices[device_num++] = gbm; - return gbm; } @@ -237,7 +198,7 @@ /** Get a DMA-BUF file descriptor for the buffer object * * This function creates a DMA-BUF (also known as PRIME) file descriptor - * handle for the buffer object. Eeach call to gbm_bo_get_fd() returns a new + * handle for the buffer object. Each call to gbm_bo_get_fd() returns a new * file descriptor and the caller is responsible for closing the file * descriptor. @@ -255,8 +216,8 @@ /** Write data into the buffer object * * If the buffer object was created with the GBM_BO_USE_WRITE flag, - * this function can used to write data into the buffer object. The - * data is copied directly into the object and it's the responsiblity + * this function can be used to write data into the buffer object. The + * data is copied directly into the object and it's the responsibility * of the caller to make sure the data represents valid pixel data, * according to the width, height, stride and format of the buffer object. * @@ -360,14 +321,14 @@ * * This function imports a foreign object and creates a new gbm bo for it. * This enabled using the foreign object with a display API such as KMS. - * Currently two types of foreign objects are supported, indicated by the type + * Currently three types of foreign objects are supported, indicated by the type * argument: * * GBM_BO_IMPORT_WL_BUFFER * GBM_BO_IMPORT_EGL_IMAGE * GBM_BO_IMPORT_FD * - * The the gbm bo shares the underlying pixels but its life-time is + * The gbm bo shares the underlying pixels but its life-time is * independent of the foreign object. * * \param gbm The gbm device returned from gbm_create_device() @@ -528,7 +489,7 @@ * * Before starting a new frame, the surface must have a buffer * available for rendering. Initially, a gbm surface will have a free - * buffer, but after one of more buffers have been locked (\sa + * buffer, but after one or more buffers have been locked (\sa * gbm_surface_lock_front_buffer()), the application must check for a * free buffer before rendering. * diff -Nru mesa-12.0.6/src/gbm/main/gbm.h mesa-17.0.7/src/gbm/main/gbm.h --- mesa-12.0.6/src/gbm/main/gbm.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gbm/main/gbm.h 2017-06-01 10:37:10.000000000 +0000 @@ -85,6 +85,12 @@ /* color index */ #define GBM_FORMAT_C8 __gbm_fourcc_code('C', '8', ' ', ' ') /* [7:0] C */ +/* 8 bpp Red */ +#define GBM_FORMAT_R8 __gbm_fourcc_code('R', '8', ' ', ' ') /* [7:0] R */ + +/* 16 bpp RG */ +#define GBM_FORMAT_GR88 __gbm_fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */ + /* 8 bpp RGB */ #define GBM_FORMAT_RGB332 __gbm_fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */ #define GBM_FORMAT_BGR233 __gbm_fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */ @@ -207,7 +213,7 @@ GBM_BO_USE_RENDERING = (1 << 2), /** * Buffer can be used for gbm_bo_write. This is guaranteed to work - * with GBM_BO_USE_CURSOR. but may not work for other combinations. + * with GBM_BO_USE_CURSOR, but may not work for other combinations. */ GBM_BO_USE_WRITE = (1 << 3), /** diff -Nru mesa-12.0.6/src/gbm/main/gbmint.h mesa-17.0.7/src/gbm/main/gbmint.h --- mesa-12.0.6/src/gbm/main/gbmint.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gbm/main/gbmint.h 2017-06-01 10:37:10.000000000 +0000 @@ -117,7 +117,4 @@ struct gbm_device *(*create_device)(int fd); }; -struct gbm_device * -_gbm_mesa_get_device(int fd); - #endif diff -Nru mesa-12.0.6/src/gbm/Makefile.am mesa-17.0.7/src/gbm/Makefile.am --- mesa-12.0.6/src/gbm/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gbm/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -4,8 +4,6 @@ pkgconfig_DATA = main/gbm.pc AM_CFLAGS = \ - -D_OS_UNIX=1 \ - -DMODULEDIR='"$(libdir)/gbm"' \ -I$(top_srcdir)/include \ -I$(top_srcdir)/src/loader \ -I$(top_srcdir)/src/gbm/main \ diff -Nru mesa-12.0.6/src/gbm/Makefile.in mesa-17.0.7/src/gbm/Makefile.in --- mesa-12.0.6/src/gbm/Makefile.in 2017-01-24 01:41:53.000000000 +0000 +++ mesa-17.0.7/src/gbm/Makefile.in 2017-06-01 10:37:23.000000000 +0000 @@ -429,6 +429,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -443,6 +445,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -472,10 +475,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -525,11 +529,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -569,8 +570,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -607,8 +606,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -617,7 +614,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -625,13 +621,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -660,6 +657,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -736,8 +734,7 @@ pkgconfigdir = $(libdir)/pkgconfig pkgconfig_DATA = main/gbm.pc -AM_CFLAGS = -D_OS_UNIX=1 -DMODULEDIR='"$(libdir)/gbm"' \ - -I$(top_srcdir)/include -I$(top_srcdir)/src/loader \ +AM_CFLAGS = -I$(top_srcdir)/include -I$(top_srcdir)/src/loader \ -I$(top_srcdir)/src/gbm/main $(DLOPEN_CFLAGS) $(DEFINES) \ $(VISIBILITY_CFLAGS) $(am__append_1) $(am__append_4) lib_LTLIBRARIES = libgbm.la diff -Nru mesa-12.0.6/src/getopt/.editorconfig mesa-17.0.7/src/getopt/.editorconfig --- mesa-12.0.6/src/getopt/.editorconfig 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/getopt/.editorconfig 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,2 @@ +[*.{c,h}] +indent_style = tab diff -Nru mesa-12.0.6/src/glx/apple/apple_xgl_api_stereo.c mesa-17.0.7/src/glx/apple/apple_xgl_api_stereo.c --- mesa-12.0.6/src/glx/apple/apple_xgl_api_stereo.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/glx/apple/apple_xgl_api_stereo.c 2017-06-01 10:37:10.000000000 +0000 @@ -54,7 +54,7 @@ { struct glx_context * gc = __glXGetCurrentContext(); - if (gc && apple_glx_context_uses_stereo(gc->driContext)) { + if (gc != &dummyContext && apple_glx_context_uses_stereo(gc->driContext)) { GLenum buf[2]; GLsizei n = 0; @@ -89,7 +89,7 @@ { struct glx_context * gc = __glXGetCurrentContext(); - if (gc && apple_glx_context_uses_stereo(gc->driContext)) { + if (gc != &dummyContext && apple_glx_context_uses_stereo(gc->driContext)) { GLenum newbuf[n + 2]; GLsizei i, outi = 0; bool have_back = false; diff -Nru mesa-12.0.6/src/glx/apple/apple_xgl_api_viewport.c mesa-17.0.7/src/glx/apple/apple_xgl_api_viewport.c --- mesa-12.0.6/src/glx/apple/apple_xgl_api_viewport.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/glx/apple/apple_xgl_api_viewport.c 2017-06-01 10:37:10.000000000 +0000 @@ -41,7 +41,7 @@ struct glx_context *gc = __glXGetCurrentContext(); Display *dpy = glXGetCurrentDisplay(); - if (gc && gc->driContext) + if (gc != &dummyContext && gc->driContext) apple_glx_context_update(dpy, gc->driContext); __ogl_framework_api->Viewport(x, y, width, height); diff -Nru mesa-12.0.6/src/glx/apple/glx_empty.c mesa-17.0.7/src/glx/apple/glx_empty.c --- mesa-12.0.6/src/glx/apple/glx_empty.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/glx/apple/glx_empty.c 2017-06-01 10:37:10.000000000 +0000 @@ -263,19 +263,3 @@ return NULL; } #endif - - -_X_EXPORT -GLX_ALIAS_VOID(glXDestroyGLXPbufferSGIX, - (Display * dpy, GLXDrawable pbuf), - (dpy, pbuf), glXDestroyPbuffer) - - _X_EXPORT GLX_ALIAS_VOID(glXSelectEventSGIX, - (Display * dpy, GLXDrawable drawable, - unsigned long mask), (dpy, drawable, mask), - glXSelectEvent) - - _X_EXPORT GLX_ALIAS_VOID(glXGetSelectedEventSGIX, - (Display * dpy, GLXDrawable drawable, - unsigned long *mask), (dpy, drawable, mask), - glXGetSelectedEvent) diff -Nru mesa-12.0.6/src/glx/apple/Makefile.am mesa-17.0.7/src/glx/apple/Makefile.am --- mesa-12.0.6/src/glx/apple/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/glx/apple/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -6,11 +6,11 @@ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ -I$(top_srcdir)/src/glx \ - -I$(top_srcdir)/src/mesa \ -I$(top_builddir)/src/mesa \ + -I$(top_srcdir)/src/mesa \ -I$(top_srcdir)/src/mapi \ - -I$(top_srcdir)/src/mapi/glapi \ -I$(top_builddir)/src/mapi/glapi \ + -I$(top_srcdir)/src/mapi/glapi \ $(VISIBILITY_CFLAGS) \ $(SHARED_GLAPI_CFLAGS) \ $(DEFINES) \ diff -Nru mesa-12.0.6/src/glx/apple/Makefile.in mesa-17.0.7/src/glx/apple/Makefile.in --- mesa-12.0.6/src/glx/apple/Makefile.in 2017-01-24 01:41:53.000000000 +0000 +++ mesa-17.0.7/src/glx/apple/Makefile.in 2017-06-01 10:37:23.000000000 +0000 @@ -190,6 +190,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -204,6 +206,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -233,10 +236,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -286,11 +290,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -330,8 +331,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -368,8 +367,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -378,7 +375,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -386,13 +382,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -421,6 +418,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -489,11 +487,11 @@ -I$(top_srcdir)/src \ -I$(top_srcdir)/include \ -I$(top_srcdir)/src/glx \ - -I$(top_srcdir)/src/mesa \ -I$(top_builddir)/src/mesa \ + -I$(top_srcdir)/src/mesa \ -I$(top_srcdir)/src/mapi \ - -I$(top_srcdir)/src/mapi/glapi \ -I$(top_builddir)/src/mapi/glapi \ + -I$(top_srcdir)/src/mapi/glapi \ $(VISIBILITY_CFLAGS) \ $(SHARED_GLAPI_CFLAGS) \ $(DEFINES) \ diff -Nru mesa-12.0.6/src/glx/dri2_glx.c mesa-17.0.7/src/glx/dri2_glx.c --- mesa-12.0.6/src/glx/dri2_glx.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/glx/dri2_glx.c 2017-06-01 10:37:10.000000000 +0000 @@ -1206,7 +1206,7 @@ /* If Mesa knows about the appropriate driver for this fd, then trust it. * Otherwise, default to the server's value. */ - loader_driverName = loader_get_driver_for_fd(psc->fd, 0); + loader_driverName = loader_get_driver_for_fd(psc->fd); if (loader_driverName) { free(driverName); driverName = loader_driverName; diff -Nru mesa-12.0.6/src/glx/dri3_glx.c mesa-17.0.7/src/glx/dri3_glx.c --- mesa-12.0.6/src/glx/dri3_glx.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/glx/dri3_glx.c 2017-06-01 10:37:10.000000000 +0000 @@ -81,6 +81,8 @@ static struct dri3_drawable * loader_drawable_to_dri3_drawable(struct loader_dri3_drawable *draw) { size_t offset = offsetof(struct dri3_drawable, loader_drawable); + if (!draw) + return NULL; return (struct dri3_drawable *)(((void*) draw) - offset); } @@ -117,6 +119,10 @@ glx_dri3_in_current_context(struct loader_dri3_drawable *draw) { struct dri3_drawable *priv = loader_drawable_to_dri3_drawable(draw); + + if (!priv) + return false; + struct dri3_context *pcp = (struct dri3_context *) __glXGetCurrentContext(); struct dri3_screen *psc = (struct dri3_screen *) priv->base.psc; @@ -172,7 +178,7 @@ } } -static struct loader_dri3_vtable glx_dri3_vtable = { +static const struct loader_dri3_vtable glx_dri3_vtable = { .get_swap_interval = glx_dri3_get_swap_interval, .clamp_swap_interval = glx_dri3_clamp_swap_interval, .set_swap_interval = glx_dri3_set_swap_interval, @@ -558,6 +564,8 @@ static int dri3_set_swap_interval(__GLXDRIdrawable *pdraw, int interval) { + assert(pdraw != NULL); + struct dri3_drawable *priv = (struct dri3_drawable *) pdraw; GLint vblank_mode = DRI_CONF_VBLANK_DEF_INTERVAL_1; struct dri3_screen *psc = (struct dri3_screen *) priv->base.psc; @@ -591,6 +599,8 @@ static int dri3_get_swap_interval(__GLXDRIdrawable *pdraw) { + assert(pdraw != NULL); + struct dri3_drawable *priv = (struct dri3_drawable *) pdraw; return priv->swap_interval; @@ -786,7 +796,7 @@ psc->fd = loader_get_user_preferred_fd(psc->fd, &psc->is_different_gpu); deviceName = NULL; - driverName = loader_get_driver_for_fd(psc->fd, 0); + driverName = loader_get_driver_for_fd(psc->fd); if (!driverName) { ErrorMessageF("No driver found\n"); goto handle_error; diff -Nru mesa-12.0.6/src/glx/dri_common.c mesa-17.0.7/src/glx/dri_common.c --- mesa-12.0.6/src/glx/dri_common.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/glx/dri_common.c 2017-06-01 10:37:10.000000000 +0000 @@ -161,10 +161,9 @@ { const __DRIextension **extensions = NULL; const __DRIextension **(*get_extensions)(void); - char *get_extensions_name; + char *get_extensions_name = loader_get_extensions_name(driver_name); - if (asprintf(&get_extensions_name, "%s_%s", - __DRI_DRIVER_GET_EXTENSIONS, driver_name) != -1) { + if (get_extensions_name) { get_extensions = dlsym(handle, get_extensions_name); if (get_extensions) { free(get_extensions_name); diff -Nru mesa-12.0.6/src/glx/driwindows_glx.c mesa-17.0.7/src/glx/driwindows_glx.c --- mesa-12.0.6/src/glx/driwindows_glx.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/glx/driwindows_glx.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,609 @@ +/* + * Copyright © 2014 Jon Turney + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "glxclient.h" +#include "glx_error.h" +#include "dri_common.h" +#include "windows/xwindowsdri.h" +#include "windows/windowsgl.h" + +struct driwindows_display +{ + __GLXDRIdisplay base; + int event_base; +}; + +struct driwindows_context +{ + struct glx_context base; + windowsContext *windowsContext; +}; + +struct driwindows_config +{ + struct glx_config base; + int pxfi; +}; + +struct driwindows_screen +{ + struct glx_screen base; + __DRIscreen *driScreen; + __GLXDRIscreen vtable; + Bool copySubBuffer; +}; + +struct driwindows_drawable +{ + __GLXDRIdrawable base; + windowsDrawable *windowsDrawable; +}; + +/** + * GLXDRI functions + */ + +static void +driwindows_destroy_context(struct glx_context *context) +{ + struct driwindows_context *pcp = (struct driwindows_context *) context; + + driReleaseDrawables(&pcp->base); + + free((char *) context->extensions); + + windows_destroy_context(pcp->windowsContext); + + free(pcp); +} + +static int +driwindows_bind_context(struct glx_context *context, struct glx_context *old, + GLXDrawable draw, GLXDrawable read) +{ + struct driwindows_context *pcp = (struct driwindows_context *) context; + struct driwindows_drawable *pdraw, *pread; + + pdraw = (struct driwindows_drawable *) driFetchDrawable(context, draw); + pread = (struct driwindows_drawable *) driFetchDrawable(context, read); + + driReleaseDrawables(&pcp->base); + + if (pdraw == NULL || pread == NULL) + return GLXBadDrawable; + + if (windows_bind_context(pcp->windowsContext, + pdraw->windowsDrawable, pread->windowsDrawable)) + return Success; + + return GLXBadContext; +} + +static void +driwindows_unbind_context(struct glx_context *context, struct glx_context *new) +{ + struct driwindows_context *pcp = (struct driwindows_context *) context; + + windows_unbind_context(pcp->windowsContext); +} + +static void +driwindows_bind_tex_image(Display * dpy, + GLXDrawable drawable, + int buffer, const int *attrib_list) +{ + struct glx_context *gc = __glXGetCurrentContext(); + struct driwindows_context *pcp = (struct driwindows_context *) gc; + __GLXDRIdrawable *base = GetGLXDRIDrawable(dpy, drawable); + struct driwindows_drawable *pdraw = (struct driwindows_drawable *) base; + + __glXInitialize(dpy); + + if (pdraw != NULL) { + windows_setTexBuffer(pcp->windowsContext, + pdraw->base.textureTarget, + pdraw->base.textureFormat, + pdraw->windowsDrawable); + } +} + +static void +driwindows_release_tex_image(Display * dpy, GLXDrawable drawable, int buffer) +{ + struct glx_context *gc = __glXGetCurrentContext(); + struct driwindows_context *pcp = (struct driwindows_context *) gc; + __GLXDRIdrawable *base = GetGLXDRIDrawable(dpy, drawable); + struct glx_display *dpyPriv = __glXInitialize(dpy); + struct driwindows_drawable *pdraw = (struct driwindows_drawable *) base; + + if (dpyPriv != NULL && pdraw != NULL) { + windows_releaseTexBuffer(pcp->windowsContext, + pdraw->base.textureTarget, + pdraw->windowsDrawable); + } +} + +static const struct glx_context_vtable driwindows_context_vtable = { + .destroy = driwindows_destroy_context, + .bind = driwindows_bind_context, + .unbind = driwindows_unbind_context, + .wait_gl = NULL, + .wait_x = NULL, + .use_x_font = DRI_glXUseXFont, + .bind_tex_image = driwindows_bind_tex_image, + .release_tex_image = driwindows_release_tex_image, + .get_proc_address = NULL, +}; + +static struct glx_context * +driwindows_create_context(struct glx_screen *base, + struct glx_config *config_base, + struct glx_context *shareList, int renderType) +{ + struct driwindows_context *pcp, *pcp_shared; + struct driwindows_config *config = (struct driwindows_config *) config_base; + struct driwindows_screen *psc = (struct driwindows_screen *) base; + windowsContext *shared = NULL; + + if (!psc->base.driScreen) + return NULL; + + /* Check the renderType value */ + if (!validate_renderType_against_config(config_base, renderType)) + return NULL; + + if (shareList) { + /* If the shareList context is not on this renderer, we cannot possibly + * create a context that shares with it. + */ + if (shareList->vtable->destroy != driwindows_destroy_context) { + return NULL; + } + + pcp_shared = (struct driwindows_context *) shareList; + shared = pcp_shared->windowsContext; + } + + pcp = calloc(1, sizeof *pcp); + if (pcp == NULL) + return NULL; + + if (!glx_context_init(&pcp->base, &psc->base, &config->base)) { + free(pcp); + return NULL; + } + + pcp->base.renderType = renderType; + + InfoMessageF("visualID %x, fbConfigID %x -> pxfi %d\n", config_base->visualID, config_base->fbconfigID, config->pxfi); + + pcp->windowsContext = windows_create_context(config->pxfi, shared); + + if (!pcp->windowsContext) { + free(pcp); + return NULL; + } + + pcp->base.vtable = &driwindows_context_vtable; + + return &pcp->base; +} + +static struct glx_context * +driwindows_create_context_attribs(struct glx_screen *base, + struct glx_config *config_base, + struct glx_context *shareList, + unsigned num_attribs, + const uint32_t *attribs, + unsigned *error) +{ + struct driwindows_context *pcp, *pcp_shared; + struct driwindows_config *config = (struct driwindows_config *) config_base; + struct driwindows_screen *psc = (struct driwindows_screen *) base; + windowsContext *shared = NULL; + + int i; + uint32_t renderType = GLX_RGBA_TYPE; + + /* Extract renderType from attribs */ + for (i = 0; i < num_attribs; i++) { + switch (attribs[i * 2]) { + case GLX_RENDER_TYPE: + renderType = attribs[i * 2 + 1]; + break; + } + } + + /* + Perhaps we should map GLX tokens to WGL tokens, but they appear to have + identical values, so far + */ + + if (!psc->base.driScreen) + return NULL; + + /* Check the renderType value */ + if (!validate_renderType_against_config(config_base, renderType)) { + return NULL; + } + + if (shareList) { + /* If the shareList context is not on this renderer, we cannot possibly + * create a context that shares with it. + */ + if (shareList->vtable->destroy != driwindows_destroy_context) { + return NULL; + } + + pcp_shared = (struct driwindows_context *) shareList; + shared = pcp_shared->windowsContext; + } + + pcp = calloc(1, sizeof *pcp); + if (pcp == NULL) + return NULL; + + if (!glx_context_init(&pcp->base, &psc->base, &config->base)) { + free(pcp); + return NULL; + } + + pcp->base.renderType = renderType; + + InfoMessageF("visualID %x, fbConfigID %x -> pxfi %d\n", config_base->visualID, config_base->fbconfigID, config->pxfi); + + pcp->windowsContext = windows_create_context_attribs(config->pxfi, + shared, + (const int *)attribs); + if (pcp->windowsContext == NULL) { + free(pcp); + return NULL; + } + + pcp->base.vtable = &driwindows_context_vtable; + + return &pcp->base; +} + +static void +driwindowsDestroyDrawable(__GLXDRIdrawable * pdraw) +{ + struct driwindows_drawable *pdp = (struct driwindows_drawable *) pdraw; + + windows_destroy_drawable(pdp->windowsDrawable); + + free(pdp); +} + +static __GLXDRIdrawable * +driwindowsCreateDrawable(struct glx_screen *base, XID xDrawable, + GLXDrawable drawable, struct glx_config *modes) +{ + struct driwindows_drawable *pdp; + struct driwindows_screen *psc = (struct driwindows_screen *) base; + + pdp = calloc(1, sizeof(*pdp)); + if (!pdp) + return NULL; + + pdp->base.xDrawable = xDrawable; + pdp->base.drawable = drawable; + pdp->base.psc = &psc->base; + + /* + By this stage, the X drawable already exists, but the GLX drawable may + not. + + Query the server with the XID to find the correct HWND, HPBUFFERARB or + HBITMAP + */ + + unsigned int type; + void *handle; + + if (!XWindowsDRIQueryDrawable(psc->base.dpy, base->scr, drawable, &type, &handle)) + { + free(pdp); + return NULL; + } + + /* No handle found is a failure */ + if (!handle) { + free(pdp); + return NULL; + } + + /* Create a new drawable */ + pdp->windowsDrawable = windows_create_drawable(type, handle); + + if (!pdp->windowsDrawable) { + free(pdp); + return NULL; + } + + pdp->base.destroyDrawable = driwindowsDestroyDrawable; + + return &pdp->base; +} + +static int64_t +driwindowsSwapBuffers(__GLXDRIdrawable * pdraw, + int64_t target_msc, int64_t divisor, int64_t remainder, + Bool flush) +{ + struct driwindows_drawable *pdp = (struct driwindows_drawable *) pdraw; + + (void) target_msc; + (void) divisor; + (void) remainder; + + if (flush) { + glFlush(); + } + + windows_swap_buffers(pdp->windowsDrawable); + + return 0; +} + +static void +driwindowsCopySubBuffer(__GLXDRIdrawable * pdraw, + int x, int y, int width, int height, Bool flush) +{ + struct driwindows_drawable *pdp = (struct driwindows_drawable *) pdraw; + + if (flush) { + glFlush(); + } + + windows_copy_subbuffer(pdp->windowsDrawable, x, y, width, height); +} + +static void +driwindowsDestroyScreen(struct glx_screen *base) +{ + struct driwindows_screen *psc = (struct driwindows_screen *) base; + + /* Free the direct rendering per screen data */ + psc->driScreen = NULL; + free(psc); +} + +static const struct glx_screen_vtable driwindows_screen_vtable = { + .create_context = driwindows_create_context, + .create_context_attribs = driwindows_create_context_attribs, + .query_renderer_integer = NULL, + .query_renderer_string = NULL, +}; + +static Bool +driwindowsBindExtensions(struct driwindows_screen *psc) +{ + Bool result = 1; + + const struct + { + char *wglext; + char *glxext; + Bool mandatory; + } extensionMap[] = { + { "WGL_ARB_make_current_read", "GLX_SGI_make_current_read", 0 }, + { "WGL_EXT_swap_control", "GLX_SGI_swap_control", 0 }, + { "WGL_EXT_swap_control", "GLX_MESA_swap_control", 0 }, +// { "WGL_ARB_render_texture", "GLX_EXT_texture_from_pixmap", 0 }, +// Not exactly equivalent, needs some more glue to be written + { "WGL_ARB_pbuffer", "GLX_SGIX_pbuffer", 1 }, + { "WGL_ARB_multisample", "GLX_ARB_multisample", 1 }, + { "WGL_ARB_multisample", "GLX_SGIS_multisample", 1 }, + { "WGL_ARB_create_context", "GLX_ARB_create_context", 0 }, + { "WGL_ARB_create_context_profile", "GLX_ARB_create_context_profile", 0 }, + { "WGL_ARB_create_context_robustness", "GLX_ARB_create_context_robustness", 0 }, + { "WGL_EXT_create_context_es2_profile", "GLX_EXT_create_context_es2_profile", 0 }, + }; + + char *wgl_extensions; + char *gl_extensions; + int i; + + windows_extensions(&gl_extensions, &wgl_extensions); + + for (i = 0; i < sizeof(extensionMap)/sizeof(extensionMap[0]); i++) { + if (strstr(wgl_extensions, extensionMap[i].wglext)) { + __glXEnableDirectExtension(&psc->base, extensionMap[i].glxext); + InfoMessageF("enabled %s\n", extensionMap[i].glxext); + } + else if (extensionMap[i].mandatory) { + ErrorMessageF("required WGL extension %s is missing\n", extensionMap[i].wglext); + result = 0; + } + } + + /* + Because it pre-dates WGL_EXT_extensions_string, GL_WIN_swap_hint might + only be in GL_EXTENSIONS + */ + if (strstr(gl_extensions, "GL_WIN_swap_hint")) { + psc->copySubBuffer = 1; + __glXEnableDirectExtension(&psc->base, "GLX_MESA_copy_sub_buffer"); + InfoMessageF("enabled GLX_MESA_copy_sub_buffer\n"); + } + + free(gl_extensions); + free(wgl_extensions); + + return result; +} + +static struct glx_config * +driwindowsMapConfigs(struct glx_display *priv, int screen, struct glx_config *configs, struct glx_config *fbconfigs) +{ + struct glx_config head, *tail, *m; + + tail = &head; + head.next = NULL; + + for (m = configs; m; m = m->next) { + int fbconfigID = GLX_DONT_CARE; + if (fbconfigs) { + /* + visuals have fbconfigID of GLX_DONT_CARE, so search for a fbconfig + with matching visualID and get the fbconfigID from there + */ + struct glx_config *f; + for (f = fbconfigs; f; f = f->next) { + if (f->visualID == m->visualID) + fbconfigID = f->fbconfigID; + } + } + else { + fbconfigID = m->fbconfigID; + } + + int pxfi; + XWindowsDRIFBConfigToPixelFormat(priv->dpy, screen, fbconfigID, &pxfi); + if (pxfi == 0) + continue; + + struct driwindows_config *config = malloc(sizeof(*config)); + + tail->next = &config->base; + if (tail->next == NULL) + continue; + + config->base = *m; + config->pxfi = pxfi; + + tail = tail->next; + } + + return head.next; +} + +static struct glx_screen * +driwindowsCreateScreen(int screen, struct glx_display *priv) +{ + __GLXDRIscreen *psp; + struct driwindows_screen *psc; + struct glx_config *configs = NULL, *visuals = NULL; + int directCapable; + + psc = calloc(1, sizeof *psc); + if (psc == NULL) + return NULL; + + if (!glx_screen_init(&psc->base, screen, priv)) { + free(psc); + return NULL; + } + + if (!XWindowsDRIQueryDirectRenderingCapable(psc->base.dpy, screen, &directCapable) || + !directCapable) { + ErrorMessageF("Screen is not Windows-DRI capable\n"); + goto handle_error; + } + + /* discover native supported extensions */ + if (!driwindowsBindExtensions(psc)) { + goto handle_error; + } + + /* Augment configs with pxfi information */ + configs = driwindowsMapConfigs(priv, screen, psc->base.configs, NULL); + visuals = driwindowsMapConfigs(priv, screen, psc->base.visuals, configs); + + if (!configs || !visuals) { + ErrorMessageF("No fbConfigs or visuals found\n"); + goto handle_error; + } + + glx_config_destroy_list(psc->base.configs); + psc->base.configs = configs; + glx_config_destroy_list(psc->base.visuals); + psc->base.visuals = visuals; + + psc->base.vtable = &driwindows_screen_vtable; + psp = &psc->vtable; + psc->base.driScreen = psp; + psp->destroyScreen = driwindowsDestroyScreen; + psp->createDrawable = driwindowsCreateDrawable; + psp->swapBuffers = driwindowsSwapBuffers; + + if (psc->copySubBuffer) + psp->copySubBuffer = driwindowsCopySubBuffer; + + return &psc->base; + +handle_error: + glx_screen_cleanup(&psc->base); + + return NULL; +} + +/* Called from __glXFreeDisplayPrivate. + */ +static void +driwindowsDestroyDisplay(__GLXDRIdisplay * dpy) +{ + free(dpy); +} + +/* + * Allocate, initialize and return a __GLXDRIdisplay object. + * This is called from __glXInitialize() when we are given a new + * display pointer. + */ +_X_HIDDEN __GLXDRIdisplay * +driwindowsCreateDisplay(Display * dpy) +{ + struct driwindows_display *pdpyp; + + int eventBase, errorBase; + int major, minor, patch; + + /* Verify server has Windows-DRI extension */ + if (!XWindowsDRIQueryExtension(dpy, &eventBase, &errorBase)) { + ErrorMessageF("Windows-DRI extension not available\n"); + return NULL; + } + + if (!XWindowsDRIQueryVersion(dpy, &major, &minor, &patch)) { + ErrorMessageF("Fetching Windows-DRI extension version failed\n"); + return NULL; + } + + if (!windows_check_renderer()) { + ErrorMessageF("Windows-DRI extension disabled for GDI Generic renderer\n"); + return NULL; + } + + pdpyp = malloc(sizeof *pdpyp); + if (pdpyp == NULL) + return NULL; + + pdpyp->base.destroyDisplay = driwindowsDestroyDisplay; + pdpyp->base.createScreen = driwindowsCreateScreen; + + pdpyp->event_base = eventBase; + + return &pdpyp->base; +} diff -Nru mesa-12.0.6/src/glx/g_glxglvnddispatchfuncs.c mesa-17.0.7/src/glx/g_glxglvnddispatchfuncs.c --- mesa-12.0.6/src/glx/g_glxglvnddispatchfuncs.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/glx/g_glxglvnddispatchfuncs.c 2017-06-01 10:37:10.000000000 +0000 @@ -4,6 +4,7 @@ */ #include +#include "glxclient.h" #include "glxglvnd.h" #include "glxglvnddispatchfuncs.h" #include "g_glxglvnddispatchindices.h" @@ -50,6 +51,7 @@ __ATTRIB(GetCurrentDisplayEXT), // glXGetCurrentDrawable implemented by libglvnd // glXGetCurrentReadDrawable implemented by libglvnd + __ATTRIB(GetDriverConfig), // glXGetFBConfigAttrib implemented by libglvnd __ATTRIB(GetFBConfigAttribSGIX), __ATTRIB(GetFBConfigFromVisualSGIX), @@ -334,6 +336,17 @@ +static const char *dispatch_GetDriverConfig(const char *driverName) +{ + /* + * The options are constant for a given driverName, so we do not need + * a context (and apps expect to be able to call this without one). + */ + return glXGetDriverConfig(driverName); +} + + + static int dispatch_GetFBConfigAttribSGIX(Display *dpy, GLXFBConfigSGIX config, int attribute, int *value_return) { @@ -939,6 +952,7 @@ __ATTRIB(DestroyGLXPbufferSGIX), __ATTRIB(GetContextIDEXT), __ATTRIB(GetCurrentDisplayEXT), + __ATTRIB(GetDriverConfig), __ATTRIB(GetFBConfigAttribSGIX), __ATTRIB(GetFBConfigFromVisualSGIX), __ATTRIB(GetMscRateOML), diff -Nru mesa-12.0.6/src/glx/g_glxglvnddispatchindices.h mesa-17.0.7/src/glx/g_glxglvnddispatchindices.h --- mesa-12.0.6/src/glx/g_glxglvnddispatchindices.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/glx/g_glxglvnddispatchindices.h 2017-06-01 10:37:10.000000000 +0000 @@ -39,6 +39,7 @@ DI_GetCurrentDisplayEXT, // GetCurrentDrawable implemented by libglvnd // GetCurrentReadDrawable implemented by libglvnd + DI_GetDriverConfig, // GetFBConfigAttrib implemented by libglvnd DI_GetFBConfigAttribSGIX, DI_GetFBConfigFromVisualSGIX, @@ -46,14 +47,14 @@ DI_GetMscRateOML, // GetProcAddress implemented by libglvnd // GetProcAddressARB implemented by libglvnd + DI_GetScreenDriver, // GetSelectedEvent implemented by libglvnd DI_GetSelectedEventSGIX, + DI_GetSwapIntervalMESA, + DI_GetSyncValuesOML, DI_GetVideoSyncSGI, // GetVisualFromFBConfig implemented by libglvnd DI_GetVisualFromFBConfigSGIX, - DI_GetScreenDriver, - DI_GetSwapIntervalMESA, - DI_GetSyncValuesOML, // ImportContextEXT implemented by libglvnd // IsDirect implemented by libglvnd DI_JoinSwapGroupSGIX, @@ -81,9 +82,9 @@ DI_SwapIntervalMESA, DI_SwapIntervalSGI, // UseXFont implemented by libglvnd - // WaitGL implemented by libglvnd DI_WaitForMscOML, DI_WaitForSbcOML, + // WaitGL implemented by libglvnd DI_WaitVideoSyncSGI, // WaitX implemented by libglvnd DI_LAST_INDEX diff -Nru mesa-12.0.6/src/glx/glxclient.h mesa-17.0.7/src/glx/glxclient.h --- mesa-12.0.6/src/glx/glxclient.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/glx/glxclient.h 2017-06-01 10:37:10.000000000 +0000 @@ -154,11 +154,15 @@ extern __GLXDRIdisplay *driswCreateDisplay(Display * dpy); extern __GLXDRIdisplay *driCreateDisplay(Display * dpy); extern __GLXDRIdisplay *dri2CreateDisplay(Display * dpy); +extern __GLXDRIdisplay *dri3_create_display(Display * dpy); +extern __GLXDRIdisplay *driwindowsCreateDisplay(Display * dpy); + +/* +** +*/ extern void dri2InvalidateBuffers(Display *dpy, XID drawable); extern unsigned dri2GetSwapEventType(Display *dpy, XID drawable); -extern __GLXDRIdisplay *dri3_create_display(Display * dpy); - /* ** Functions to obtain driver configuration information from a direct ** rendering client application @@ -606,6 +610,9 @@ __GLXDRIdisplay *dri2Display; __GLXDRIdisplay *dri3Display; #endif +#ifdef GLX_USE_WINDOWSGL + __GLXDRIdisplay *windowsdriDisplay; +#endif }; struct glx_drawable { diff -Nru mesa-12.0.6/src/glx/glxcmds.c mesa-17.0.7/src/glx/glxcmds.c --- mesa-12.0.6/src/glx/glxcmds.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/glx/glxcmds.c 2017-06-01 10:37:10.000000000 +0000 @@ -820,7 +820,7 @@ { #ifdef GLX_USE_APPLEGL struct glx_context * gc = __glXGetCurrentContext(); - if(gc && apple_glx_is_current_drawable(dpy, gc->driContext, drawable)) { + if(gc != &DummyContext && apple_glx_is_current_drawable(dpy, gc->driContext, drawable)) { apple_glx_swap_buffers(gc->driContext); } else { __glXSendError(dpy, GLXBadCurrentWindow, 0, X_GLXSwapBuffers, false); @@ -1162,8 +1162,8 @@ /** * Selects and sorts a subset of the supplied configs based on the attributes. - * This function forms to basis of \c glXChooseVisual, \c glXChooseFBConfig, - * and \c glXChooseFBConfigSGIX. + * This function forms to basis of \c glXChooseFBConfig and + * \c glXChooseFBConfigSGIX. * * \param configs Array of pointers to possible configs. The elements of * this array that do not meet the criteria will be set to @@ -1171,20 +1171,16 @@ * the various visual / FBConfig selection rules. * \param num_configs Number of elements in the \c configs array. * \param attribList Attributes used select from \c configs. This array is - * terminated by a \c None tag. The array can either take - * the form expected by \c glXChooseVisual (where boolean - * tags do not have a value) or by \c glXChooseFBConfig - * (where every tag has a value). - * \param fbconfig_style_tags Selects whether \c attribList is in - * \c glXChooseVisual style or - * \c glXChooseFBConfig style. + * terminated by a \c None tag. The array is of the form + * expected by \c glXChooseFBConfig (where every tag has a + * value). * \returns The number of valid elements left in \c configs. * - * \sa glXChooseVisual, glXChooseFBConfig, glXChooseFBConfigSGIX + * \sa glXChooseFBConfig, glXChooseFBConfigSGIX */ static int -choose_visual(struct glx_config ** configs, int num_configs, - const int *attribList, GLboolean fbconfig_style_tags) +choose_fbconfig(struct glx_config ** configs, int num_configs, + const int *attribList) { struct glx_config test_config; int base; @@ -1196,10 +1192,10 @@ * list. */ - init_fbconfig_for_chooser(&test_config, fbconfig_style_tags); + init_fbconfig_for_chooser(&test_config, GL_TRUE); __glXInitializeVisualConfigFromTags(&test_config, 512, (const INT32 *) attribList, - GL_TRUE, fbconfig_style_tags); + GL_TRUE, GL_TRUE); base = 0; for (i = 0; i < num_configs; i++) { @@ -1613,7 +1609,7 @@ glXGetFBConfigs(dpy, screen, &list_size); if ((config_list != NULL) && (list_size > 0) && (attribList != NULL)) { - list_size = choose_visual(config_list, list_size, attribList, GL_TRUE); + list_size = choose_fbconfig(config_list, list_size, attribList); if (list_size == 0) { free(config_list); config_list = NULL; @@ -1765,7 +1761,11 @@ psc->driScreen->setSwapInterval) { __GLXDRIdrawable *pdraw = GetGLXDRIDrawable(gc->currentDpy, gc->currentDrawable); - psc->driScreen->setSwapInterval(pdraw, interval); + /* Simply ignore the command if the GLX drawable has been destroyed but + * the context is still bound. + */ + if (pdraw) + psc->driScreen->setSwapInterval(pdraw, interval); return 0; } #endif @@ -1811,7 +1811,14 @@ if (psc && psc->driScreen && psc->driScreen->setSwapInterval) { __GLXDRIdrawable *pdraw = GetGLXDRIDrawable(gc->currentDpy, gc->currentDrawable); - return psc->driScreen->setSwapInterval(pdraw, interval); + + /* Simply ignore the command if the GLX drawable has been destroyed but + * the context is still bound. + */ + if (!pdraw) + return 0; + + return psc->driScreen->setSwapInterval(pdraw, interval); } } #endif @@ -1833,7 +1840,8 @@ if (psc && psc->driScreen && psc->driScreen->getSwapInterval) { __GLXDRIdrawable *pdraw = GetGLXDRIDrawable(gc->currentDpy, gc->currentDrawable); - return psc->driScreen->getSwapInterval(pdraw); + if (pdraw) + return psc->driScreen->getSwapInterval(pdraw); } } #endif @@ -2643,7 +2651,7 @@ f = (gl_function) get_glx_proc_address((const char *) procName); if ((f == NULL) && (procName[0] == 'g') && (procName[1] == 'l') && (procName[2] != 'X')) { -#ifdef GLX_SHARED_GLAPI +#ifdef GLX_INDIRECT_RENDERING f = (gl_function) __indirect_get_proc_address((const char *) procName); #endif if (!f) @@ -2667,19 +2675,10 @@ * * \sa glXGetProcAddressARB */ -_GLX_PUBLIC void (*glXGetProcAddress(const GLubyte * procName)) (void) -#if defined(__GNUC__) && !defined(GLX_ALIAS_UNSUPPORTED) -# if defined(USE_MGL_NAMESPACE) - __attribute__ ((alias("mglXGetProcAddressARB"))); -# else - __attribute__ ((alias("glXGetProcAddressARB"))); -# endif -#else -{ - return glXGetProcAddressARB(procName); -} -#endif /* __GNUC__ */ - +_GLX_PUBLIC +GLX_ALIAS(__GLXextFuncPtr, glXGetProcAddress, + (const GLubyte * procName), + (procName), glXGetProcAddressARB) #if defined(GLX_DIRECT_RENDERING) && !defined(GLX_USE_APPLEGL) /** diff -Nru mesa-12.0.6/src/glx/glxcurrent.c mesa-17.0.7/src/glx/glxcurrent.c --- mesa-12.0.6/src/glx/glxcurrent.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/glx/glxcurrent.c 2017-06-01 10:37:10.000000000 +0000 @@ -252,6 +252,18 @@ __glXUnlock(); + /* The indirect vertex array state must to be initialised after we + * have setup the context, as it needs to query server attributes. + */ + if (gc && !gc->isDirect) { + __GLXattribute *state = gc->client_state_private; + if (state && state->array_state == NULL) { + glGetString(GL_EXTENSIONS); + glGetString(GL_VERSION); + __glXInitVertexArrayState(gc); + } + } + return GL_TRUE; } diff -Nru mesa-12.0.6/src/glx/glxext.c mesa-17.0.7/src/glx/glxext.c --- mesa-12.0.6/src/glx/glxext.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/glx/glxext.c 2017-06-01 10:37:10.000000000 +0000 @@ -264,6 +264,13 @@ (*priv->dri3Display->destroyDisplay) (priv->dri3Display); priv->dri3Display = NULL; #endif /* GLX_USE_DRM */ + +#if defined(GLX_USE_WINDOWSGL) + if (priv->windowsdriDisplay) + (*priv->windowsdriDisplay->destroyDisplay) (priv->windowsdriDisplay); + priv->windowsdriDisplay = NULL; +#endif /* GLX_USE_WINDOWSGL */ + #endif /* GLX_DIRECT_RENDERING && !GLX_USE_APPLEGL */ free((char *) priv); @@ -592,7 +599,7 @@ * GLXPbuffer drawables." */ if (config->floatMode) - config->drawableType &= ~(GLX_WINDOW_BIT|GLX_PIXMAP_BIT); + config->drawableType &= GLX_PBUFFER_BIT; } static struct glx_config * @@ -741,8 +748,11 @@ psc->dpy = priv->dpy; psc->display = priv; - getVisualConfigs(psc, priv, screen); - getFBConfigs(psc, priv, screen); + if (!getVisualConfigs(psc, priv, screen)) + return GL_FALSE; + + if (!getFBConfigs(psc, priv, screen)) + return GL_FALSE; return GL_TRUE; } @@ -800,6 +810,12 @@ if (psc == NULL && priv->driDisplay) psc = (*priv->driDisplay->createScreen) (i, priv); #endif /* GLX_USE_DRM */ + +#ifdef GLX_USE_WINDOWSGL + if (psc == NULL && priv->windowsdriDisplay) + psc = (*priv->windowsdriDisplay->createScreen) (i, priv); +#endif + if (psc == NULL && priv->driswDisplay) psc = (*priv->driswDisplay->createScreen) (i, priv); #endif /* GLX_DIRECT_RENDERING && !GLX_USE_APPLEGL */ @@ -907,6 +923,12 @@ return NULL; } #endif + +#ifdef GLX_USE_WINDOWSGL + if (glx_direct && glx_accel) + dpyPriv->windowsdriDisplay = driwindowsCreateDisplay(dpy); +#endif + if (!AllocAndFetchScreenConfigs(dpy, dpyPriv)) { free(dpyPriv); return NULL; diff -Nru mesa-12.0.6/src/glx/glxextensions.h mesa-17.0.7/src/glx/glxextensions.h --- mesa-12.0.6/src/glx/glxextensions.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/glx/glxextensions.h 2017-06-01 10:37:10.000000000 +0000 @@ -281,11 +281,7 @@ /* GLX_ALIAS should be used for functions with a non-void return type. GLX_ALIAS_VOID is for functions with a void return type. */ -#ifdef GLX_NO_STATIC_EXTENSION_FUNCTIONS -# define GLX_ALIAS(return_type, real_func, proto_args, args, aliased_func) -# define GLX_ALIAS_VOID(real_func, proto_args, args, aliased_func) -#else -# if defined(__GNUC__) && !defined(GLX_ALIAS_UNSUPPORTED) +# ifdef HAVE_FUNC_ATTRIBUTE_ALIAS /* GLX_ALIAS and GLX_ALIAS_VOID both expand to the macro GLX_ALIAS2. Using the * extra expansion means that the name mangling macros in glx_mangle.h will * apply before stringification, so the alias attribute will have a string like @@ -304,8 +300,7 @@ # define GLX_ALIAS_VOID(real_func, proto_args, args, aliased_func) \ void real_func proto_args \ { aliased_func args ; } -# endif /* __GNUC__ */ -#endif /* GLX_NO_STATIC_EXTENSION_FUNCTIONS */ +# endif /* HAVE_FUNC_ATTRIBUTE_ALIAS */ #ifdef __cplusplus } diff -Nru mesa-12.0.6/src/glx/glxglvnd.c mesa-17.0.7/src/glx/glxglvnd.c --- mesa-12.0.6/src/glx/glxglvnd.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/glx/glxglvnd.c 2017-06-01 10:37:10.000000000 +0000 @@ -1,11 +1,11 @@ #include +#include #include #include "glvnd/libglxabi.h" #include "glxglvnd.h" - static Bool __glXGLVNDIsScreenSupported(Display *dpy, int screen) { /* TODO: Think of a better heuristic... */ @@ -17,26 +17,24 @@ return glXGetProcAddressARB(procName); } +static int +compare(const void *l, const void *r) +{ + const char *s = *(const char **)r; + return strcmp(l, s); +} + static unsigned FindGLXFunction(const GLubyte *name) { - int first = 0; - int last = DI_FUNCTION_COUNT - 1; + const char **match; + + match = bsearch(name, __glXDispatchTableStrings, DI_FUNCTION_COUNT, + sizeof(const char *), compare); - while (first <= last) { - int middle = (first + last) / 2; - int comp = strcmp(__glXDispatchTableStrings[middle], - (const char *) name); - - if (comp < 0) - first = middle + 1; - else if (comp > 0) - last = middle - 1; - else - return middle; - } + if (match == NULL) + return DI_FUNCTION_COUNT; - /* Just point to the dummy entry at the end of the respective table */ - return DI_FUNCTION_COUNT; + return match - __glXDispatchTableStrings; } static void *__glXGLVNDGetDispatchAddress(const GLubyte *procName) diff -Nru mesa-12.0.6/src/glx/glx_pbuffer.c mesa-17.0.7/src/glx/glx_pbuffer.c --- mesa-12.0.6/src/glx/glx_pbuffer.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/glx/glx_pbuffer.c 2017-06-01 10:37:10.000000000 +0000 @@ -992,7 +992,6 @@ #endif } -#ifndef GLX_USE_APPLEGL _GLX_PUBLIC GLX_ALIAS_VOID(glXDestroyGLXPbufferSGIX, (Display * dpy, GLXPbufferSGIX pbuf), @@ -1008,4 +1007,3 @@ (Display * dpy, GLXDrawable drawable, unsigned long *mask), (dpy, drawable, mask), glXGetSelectedEvent) -#endif diff -Nru mesa-12.0.6/src/glx/indirect.c mesa-17.0.7/src/glx/indirect.c --- mesa-12.0.6/src/glx/indirect.c 2017-01-24 01:42:51.000000000 +0000 +++ mesa-17.0.7/src/glx/indirect.c 2017-06-01 10:37:48.000000000 +0000 @@ -392,6 +392,10 @@ struct glx_context *const gc = __glXGetCurrentContext(); const GLuint compsize = __glCallLists_size(type); const GLuint cmdlen = 12 + safe_pad(safe_mul(compsize, n)); + if (0 + safe_pad(safe_mul(compsize, n)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (n < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -521,6 +525,10 @@ (bitmap != NULL) ? __glImageSize(width, height, 1, GL_COLOR_INDEX, GL_BITMAP, 0) : 0; const GLuint cmdlen = 48 + safe_pad(compsize); + if (0 + safe_pad(compsize) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (__builtin_expect(gc->currentDpy != NULL, 1)) { if (cmdlen <= gc->maxSmallRenderCommandSize) { if ((gc->pc + cmdlen) > gc->bufEnd) { @@ -534,8 +542,8 @@ (void) memcpy((void *) (gc->pc + 40), (void *) (&xmove), 4); (void) memcpy((void *) (gc->pc + 44), (void *) (&ymove), 4); if (compsize > 0) { - (*gc->fillImage) (gc, 2, width, height, 1, GL_COLOR_INDEX, - GL_BITMAP, bitmap, gc->pc + 48, gc->pc + 4); + gc->fillImage(gc, 2, width, height, 1, GL_COLOR_INDEX, + GL_BITMAP, bitmap, gc->pc + 48, gc->pc + 4); } else { (void) memcpy(gc->pc + 4, default_pixel_store_2D, default_pixel_store_2D_size); @@ -2301,6 +2309,10 @@ struct glx_context *const gc = __glXGetCurrentContext(); const GLuint compsize = __glFogfv_size(pname); const GLuint cmdlen = 8 + safe_pad(safe_mul(compsize, 4)); + if (0 + safe_pad(safe_mul(compsize, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } emit_header(gc->pc, X_GLrop_Fogfv, cmdlen); (void) memcpy((void *) (gc->pc + 4), (void *) (&pname), 4); (void) memcpy((void *) (gc->pc + 8), (void *) (params), @@ -2333,6 +2345,10 @@ struct glx_context *const gc = __glXGetCurrentContext(); const GLuint compsize = __glFogiv_size(pname); const GLuint cmdlen = 8 + safe_pad(safe_mul(compsize, 4)); + if (0 + safe_pad(safe_mul(compsize, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } emit_header(gc->pc, X_GLrop_Fogiv, cmdlen); (void) memcpy((void *) (gc->pc + 4), (void *) (&pname), 4); (void) memcpy((void *) (gc->pc + 8), (void *) (params), @@ -2395,6 +2411,10 @@ struct glx_context *const gc = __glXGetCurrentContext(); const GLuint compsize = __glLightfv_size(pname); const GLuint cmdlen = 12 + safe_pad(safe_mul(compsize, 4)); + if (0 + safe_pad(safe_mul(compsize, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } emit_header(gc->pc, X_GLrop_Lightfv, cmdlen); (void) memcpy((void *) (gc->pc + 4), (void *) (&light), 4); (void) memcpy((void *) (gc->pc + 8), (void *) (&pname), 4); @@ -2429,6 +2449,10 @@ struct glx_context *const gc = __glXGetCurrentContext(); const GLuint compsize = __glLightiv_size(pname); const GLuint cmdlen = 12 + safe_pad(safe_mul(compsize, 4)); + if (0 + safe_pad(safe_mul(compsize, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } emit_header(gc->pc, X_GLrop_Lightiv, cmdlen); (void) memcpy((void *) (gc->pc + 4), (void *) (&light), 4); (void) memcpy((void *) (gc->pc + 8), (void *) (&pname), 4); @@ -2462,6 +2486,10 @@ struct glx_context *const gc = __glXGetCurrentContext(); const GLuint compsize = __glLightModelfv_size(pname); const GLuint cmdlen = 8 + safe_pad(safe_mul(compsize, 4)); + if (0 + safe_pad(safe_mul(compsize, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } emit_header(gc->pc, X_GLrop_LightModelfv, cmdlen); (void) memcpy((void *) (gc->pc + 4), (void *) (&pname), 4); (void) memcpy((void *) (gc->pc + 8), (void *) (params), @@ -2494,6 +2522,10 @@ struct glx_context *const gc = __glXGetCurrentContext(); const GLuint compsize = __glLightModeliv_size(pname); const GLuint cmdlen = 8 + safe_pad(safe_mul(compsize, 4)); + if (0 + safe_pad(safe_mul(compsize, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } emit_header(gc->pc, X_GLrop_LightModeliv, cmdlen); (void) memcpy((void *) (gc->pc + 4), (void *) (&pname), 4); (void) memcpy((void *) (gc->pc + 8), (void *) (params), @@ -2556,6 +2588,10 @@ struct glx_context *const gc = __glXGetCurrentContext(); const GLuint compsize = __glMaterialfv_size(pname); const GLuint cmdlen = 12 + safe_pad(safe_mul(compsize, 4)); + if (0 + safe_pad(safe_mul(compsize, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } emit_header(gc->pc, X_GLrop_Materialfv, cmdlen); (void) memcpy((void *) (gc->pc + 4), (void *) (&face), 4); (void) memcpy((void *) (gc->pc + 8), (void *) (&pname), 4); @@ -2590,6 +2626,10 @@ struct glx_context *const gc = __glXGetCurrentContext(); const GLuint compsize = __glMaterialiv_size(pname); const GLuint cmdlen = 12 + safe_pad(safe_mul(compsize, 4)); + if (0 + safe_pad(safe_mul(compsize, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } emit_header(gc->pc, X_GLrop_Materialiv, cmdlen); (void) memcpy((void *) (gc->pc + 4), (void *) (&face), 4); (void) memcpy((void *) (gc->pc + 8), (void *) (&pname), 4); @@ -2639,10 +2679,14 @@ (mask != NULL) ? __glImageSize(32, 32, 1, GL_COLOR_INDEX, GL_BITMAP, 0) : 0; const GLuint cmdlen = 24 + safe_pad(compsize); + if (0 + safe_pad(compsize) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } emit_header(gc->pc, X_GLrop_PolygonStipple, cmdlen); if (compsize > 0) { - (*gc->fillImage) (gc, 2, 32, 32, 1, GL_COLOR_INDEX, GL_BITMAP, mask, - gc->pc + 24, gc->pc + 4); + gc->fillImage(gc, 2, 32, 32, 1, GL_COLOR_INDEX, GL_BITMAP, mask, + gc->pc + 24, gc->pc + 4); } else { (void) memcpy(gc->pc + 4, default_pixel_store_2D, default_pixel_store_2D_size); @@ -2708,6 +2752,10 @@ struct glx_context *const gc = __glXGetCurrentContext(); const GLuint compsize = __glTexParameterfv_size(pname); const GLuint cmdlen = 12 + safe_pad(safe_mul(compsize, 4)); + if (0 + safe_pad(safe_mul(compsize, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } emit_header(gc->pc, X_GLrop_TexParameterfv, cmdlen); (void) memcpy((void *) (gc->pc + 4), (void *) (&target), 4); (void) memcpy((void *) (gc->pc + 8), (void *) (&pname), 4); @@ -2742,6 +2790,10 @@ struct glx_context *const gc = __glXGetCurrentContext(); const GLuint compsize = __glTexParameteriv_size(pname); const GLuint cmdlen = 12 + safe_pad(safe_mul(compsize, 4)); + if (0 + safe_pad(safe_mul(compsize, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } emit_header(gc->pc, X_GLrop_TexParameteriv, cmdlen); (void) memcpy((void *) (gc->pc + 4), (void *) (&target), 4); (void) memcpy((void *) (gc->pc + 8), (void *) (&pname), 4); @@ -2763,6 +2815,10 @@ const GLuint compsize = __glImageSize(width, height, 1, format, type, target); const GLuint cmdlen = 56 + safe_pad(compsize); + if (0 + safe_pad(compsize) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (__builtin_expect(gc->currentDpy != NULL, 1)) { if (cmdlen <= gc->maxSmallRenderCommandSize) { if ((gc->pc + cmdlen) > gc->bufEnd) { @@ -2779,8 +2835,8 @@ (void) memcpy((void *) (gc->pc + 48), (void *) (&format), 4); (void) memcpy((void *) (gc->pc + 52), (void *) (&type), 4); if ((compsize > 0) && (pixels != NULL)) { - (*gc->fillImage) (gc, dim, width, height, 1, format, type, - pixels, gc->pc + 56, gc->pc + 4); + gc->fillImage(gc, dim, width, height, 1, format, type, pixels, + gc->pc + 56, gc->pc + 4); } else { (void) memcpy(gc->pc + 4, default_pixel_store_2D, default_pixel_store_2D_size); @@ -2852,6 +2908,10 @@ struct glx_context *const gc = __glXGetCurrentContext(); const GLuint compsize = __glTexEnvfv_size(pname); const GLuint cmdlen = 12 + safe_pad(safe_mul(compsize, 4)); + if (0 + safe_pad(safe_mul(compsize, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } emit_header(gc->pc, X_GLrop_TexEnvfv, cmdlen); (void) memcpy((void *) (gc->pc + 4), (void *) (&target), 4); (void) memcpy((void *) (gc->pc + 8), (void *) (&pname), 4); @@ -2886,6 +2946,10 @@ struct glx_context *const gc = __glXGetCurrentContext(); const GLuint compsize = __glTexEnviv_size(pname); const GLuint cmdlen = 12 + safe_pad(safe_mul(compsize, 4)); + if (0 + safe_pad(safe_mul(compsize, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } emit_header(gc->pc, X_GLrop_TexEnviv, cmdlen); (void) memcpy((void *) (gc->pc + 4), (void *) (&target), 4); (void) memcpy((void *) (gc->pc + 8), (void *) (&pname), 4); @@ -2920,6 +2984,10 @@ struct glx_context *const gc = __glXGetCurrentContext(); const GLuint compsize = __glTexGendv_size(pname); const GLuint cmdlen = 12 + safe_pad(safe_mul(compsize, 8)); + if (0 + safe_pad(safe_mul(compsize, 8)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } emit_header(gc->pc, X_GLrop_TexGendv, cmdlen); (void) memcpy((void *) (gc->pc + 4), (void *) (&coord), 4); (void) memcpy((void *) (gc->pc + 8), (void *) (&pname), 4); @@ -2954,6 +3022,10 @@ struct glx_context *const gc = __glXGetCurrentContext(); const GLuint compsize = __glTexGenfv_size(pname); const GLuint cmdlen = 12 + safe_pad(safe_mul(compsize, 4)); + if (0 + safe_pad(safe_mul(compsize, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } emit_header(gc->pc, X_GLrop_TexGenfv, cmdlen); (void) memcpy((void *) (gc->pc + 4), (void *) (&coord), 4); (void) memcpy((void *) (gc->pc + 8), (void *) (&pname), 4); @@ -2988,6 +3060,10 @@ struct glx_context *const gc = __glXGetCurrentContext(); const GLuint compsize = __glTexGeniv_size(pname); const GLuint cmdlen = 12 + safe_pad(safe_mul(compsize, 4)); + if (0 + safe_pad(safe_mul(compsize, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } emit_header(gc->pc, X_GLrop_TexGeniv, cmdlen); (void) memcpy((void *) (gc->pc + 4), (void *) (&coord), 4); (void) memcpy((void *) (gc->pc + 8), (void *) (&pname), 4); @@ -3637,6 +3713,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 12 + safe_pad(safe_mul(mapsize, 4)); + if (0 + safe_pad(safe_mul(mapsize, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (mapsize < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -3674,6 +3754,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 12 + safe_pad(safe_mul(mapsize, 4)); + if (0 + safe_pad(safe_mul(mapsize, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (mapsize < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -3711,6 +3795,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 12 + safe_pad(safe_mul(mapsize, 2)); + if (0 + safe_pad(safe_mul(mapsize, 2)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (mapsize < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -3833,6 +3921,10 @@ (pixels != NULL) ? __glImageSize(width, height, 1, format, type, 0) : 0; const GLuint cmdlen = 40 + safe_pad(compsize); + if (0 + safe_pad(compsize) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (__builtin_expect(gc->currentDpy != NULL, 1)) { if (cmdlen <= gc->maxSmallRenderCommandSize) { if ((gc->pc + cmdlen) > gc->bufEnd) { @@ -3844,8 +3936,8 @@ (void) memcpy((void *) (gc->pc + 32), (void *) (&format), 4); (void) memcpy((void *) (gc->pc + 36), (void *) (&type), 4); if (compsize > 0) { - (*gc->fillImage) (gc, 2, width, height, 1, format, type, - pixels, gc->pc + 40, gc->pc + 4); + gc->fillImage(gc, 2, width, height, 1, format, type, pixels, + gc->pc + 40, gc->pc + 4); } else { (void) memcpy(gc->pc + 4, default_pixel_store_2D, default_pixel_store_2D_size); @@ -5256,6 +5348,10 @@ #ifndef USE_XCB const GLuint cmdlen = 4 + safe_pad(safe_mul(n, 4)); #endif + if (0 + safe_pad(safe_mul(n, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (n < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -5295,6 +5391,10 @@ struct glx_context *const gc = __glXGetCurrentContext(); Display *const dpy = gc->currentDpy; const GLuint cmdlen = 4 + safe_pad(safe_mul(n, 4)); + if (0 + safe_pad(safe_mul(n, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (n < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -5458,6 +5558,10 @@ struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 8 + safe_pad(safe_mul(n, 4)) + safe_pad(safe_mul(n, 4)); + if (0 + safe_pad(safe_mul(n, 4)) + safe_pad(safe_mul(n, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (n < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -5487,6 +5591,10 @@ (pixels != NULL) ? __glImageSize(width, height, 1, format, type, target) : 0; const GLuint cmdlen = 60 + safe_pad(compsize); + if (0 + safe_pad(compsize) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (__builtin_expect(gc->currentDpy != NULL, 1)) { if (cmdlen <= gc->maxSmallRenderCommandSize) { if ((gc->pc + cmdlen) > gc->bufEnd) { @@ -5503,8 +5611,8 @@ (void) memcpy((void *) (gc->pc + 52), (void *) (&type), 4); (void) memset((void *) (gc->pc + 56), 0, 4); if (compsize > 0) { - (*gc->fillImage) (gc, dim, width, height, 1, format, type, - pixels, gc->pc + 60, gc->pc + 4); + gc->fillImage(gc, dim, width, height, 1, format, type, pixels, + gc->pc + 60, gc->pc + 4); } else { (void) memcpy(gc->pc + 4, default_pixel_store_2D, default_pixel_store_2D_size); @@ -5596,6 +5704,10 @@ (table != NULL) ? __glImageSize(width, 1, 1, format, type, target) : 0; const GLuint cmdlen = 44 + safe_pad(compsize); + if (0 + safe_pad(compsize) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (__builtin_expect(gc->currentDpy != NULL, 1)) { if (cmdlen <= gc->maxSmallRenderCommandSize) { if ((gc->pc + cmdlen) > gc->bufEnd) { @@ -5609,8 +5721,8 @@ (void) memcpy((void *) (gc->pc + 36), (void *) (&format), 4); (void) memcpy((void *) (gc->pc + 40), (void *) (&type), 4); if (compsize > 0) { - (*gc->fillImage) (gc, 1, width, 1, 1, format, type, table, - gc->pc + 44, gc->pc + 4); + gc->fillImage(gc, 1, width, 1, 1, format, type, table, + gc->pc + 44, gc->pc + 4); } else { (void) memcpy(gc->pc + 4, default_pixel_store_1D, default_pixel_store_1D_size); @@ -5644,6 +5756,10 @@ struct glx_context *const gc = __glXGetCurrentContext(); const GLuint compsize = __glColorTableParameterfv_size(pname); const GLuint cmdlen = 12 + safe_pad(safe_mul(compsize, 4)); + if (0 + safe_pad(safe_mul(compsize, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } emit_header(gc->pc, X_GLrop_ColorTableParameterfv, cmdlen); (void) memcpy((void *) (gc->pc + 4), (void *) (&target), 4); (void) memcpy((void *) (gc->pc + 8), (void *) (&pname), 4); @@ -5663,6 +5779,10 @@ struct glx_context *const gc = __glXGetCurrentContext(); const GLuint compsize = __glColorTableParameteriv_size(pname); const GLuint cmdlen = 12 + safe_pad(safe_mul(compsize, 4)); + if (0 + safe_pad(safe_mul(compsize, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } emit_header(gc->pc, X_GLrop_ColorTableParameteriv, cmdlen); (void) memcpy((void *) (gc->pc + 4), (void *) (&target), 4); (void) memcpy((void *) (gc->pc + 8), (void *) (&pname), 4); @@ -5941,6 +6061,10 @@ const GLuint compsize = (data != NULL) ? __glImageSize(count, 1, 1, format, type, target) : 0; const GLuint cmdlen = 44 + safe_pad(compsize); + if (0 + safe_pad(compsize) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (__builtin_expect(gc->currentDpy != NULL, 1)) { if (cmdlen <= gc->maxSmallRenderCommandSize) { if ((gc->pc + cmdlen) > gc->bufEnd) { @@ -5953,8 +6077,8 @@ (void) memcpy((void *) (gc->pc + 36), (void *) (&format), 4); (void) memcpy((void *) (gc->pc + 40), (void *) (&type), 4); if (compsize > 0) { - (*gc->fillImage) (gc, 1, count, 1, 1, format, type, data, - gc->pc + 44, gc->pc + 4); + gc->fillImage(gc, 1, count, 1, 1, format, type, data, + gc->pc + 44, gc->pc + 4); } else { (void) memcpy(gc->pc + 4, default_pixel_store_1D, default_pixel_store_1D_size); @@ -6010,6 +6134,10 @@ (image != NULL) ? __glImageSize(width, height, 1, format, type, target) : 0; const GLuint cmdlen = 48 + safe_pad(compsize); + if (0 + safe_pad(compsize) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (__builtin_expect(gc->currentDpy != NULL, 1)) { if (cmdlen <= gc->maxSmallRenderCommandSize) { if ((gc->pc + cmdlen) > gc->bufEnd) { @@ -6024,8 +6152,8 @@ (void) memcpy((void *) (gc->pc + 40), (void *) (&format), 4); (void) memcpy((void *) (gc->pc + 44), (void *) (&type), 4); if (compsize > 0) { - (*gc->fillImage) (gc, dim, width, height, 1, format, type, - image, gc->pc + 48, gc->pc + 4); + gc->fillImage(gc, dim, width, height, 1, format, type, image, + gc->pc + 48, gc->pc + 4); } else { (void) memcpy(gc->pc + 4, default_pixel_store_2D, default_pixel_store_2D_size); @@ -6099,6 +6227,10 @@ struct glx_context *const gc = __glXGetCurrentContext(); const GLuint compsize = __glConvolutionParameterfv_size(pname); const GLuint cmdlen = 12 + safe_pad(safe_mul(compsize, 4)); + if (0 + safe_pad(safe_mul(compsize, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } emit_header(gc->pc, X_GLrop_ConvolutionParameterfv, cmdlen); (void) memcpy((void *) (gc->pc + 4), (void *) (&target), 4); (void) memcpy((void *) (gc->pc + 8), (void *) (&pname), 4); @@ -6134,6 +6266,10 @@ struct glx_context *const gc = __glXGetCurrentContext(); const GLuint compsize = __glConvolutionParameteriv_size(pname); const GLuint cmdlen = 12 + safe_pad(safe_mul(compsize, 4)); + if (0 + safe_pad(safe_mul(compsize, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } emit_header(gc->pc, X_GLrop_ConvolutionParameteriv, cmdlen); (void) memcpy((void *) (gc->pc + 4), (void *) (&target), 4); (void) memcpy((void *) (gc->pc + 8), (void *) (&pname), 4); @@ -6963,6 +7099,10 @@ (pixels != NULL) ? __glImageSize(width, height, depth, format, type, target) : 0; const GLuint cmdlen = 84 + safe_pad(compsize); + if (0 + safe_pad(compsize) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (__builtin_expect(gc->currentDpy != NULL, 1)) { if (cmdlen <= gc->maxSmallRenderCommandSize) { if ((gc->pc + cmdlen) > gc->bufEnd) { @@ -6983,8 +7123,8 @@ (void) memcpy((void *) (gc->pc + 80), (void *) ((pixels == NULL) ? one : zero), 4); if (compsize > 0) { - (*gc->fillImage) (gc, dim, width, height, depth, format, type, - pixels, gc->pc + 84, gc->pc + 4); + gc->fillImage(gc, dim, width, height, depth, format, type, + pixels, gc->pc + 84, gc->pc + 4); } else { (void) memcpy(gc->pc + 4, default_pixel_store_4D, default_pixel_store_4D_size); @@ -7040,6 +7180,10 @@ (pixels != NULL) ? __glImageSize(width, height, depth, format, type, target) : 0; const GLuint cmdlen = 92 + safe_pad(compsize); + if (0 + safe_pad(compsize) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (__builtin_expect(gc->currentDpy != NULL, 1)) { if (cmdlen <= gc->maxSmallRenderCommandSize) { if ((gc->pc + cmdlen) > gc->bufEnd) { @@ -7060,8 +7204,8 @@ (void) memcpy((void *) (gc->pc + 84), (void *) (&type), 4); (void) memset((void *) (gc->pc + 88), 0, 4); if (compsize > 0) { - (*gc->fillImage) (gc, dim, width, height, depth, format, type, - pixels, gc->pc + 92, gc->pc + 4); + gc->fillImage(gc, dim, width, height, depth, format, type, + pixels, gc->pc + 92, gc->pc + 4); } else { (void) memcpy(gc->pc + 4, default_pixel_store_4D, default_pixel_store_4D_size); @@ -7731,6 +7875,10 @@ struct glx_context *const gc = __glXGetCurrentContext(); const GLuint compsize = __glPointParameterfv_size(pname); const GLuint cmdlen = 8 + safe_pad(safe_mul(compsize, 4)); + if (0 + safe_pad(safe_mul(compsize, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } emit_header(gc->pc, X_GLrop_PointParameterfv, cmdlen); (void) memcpy((void *) (gc->pc + 4), (void *) (&pname), 4); (void) memcpy((void *) (gc->pc + 8), (void *) (params), @@ -7763,6 +7911,10 @@ struct glx_context *const gc = __glXGetCurrentContext(); const GLuint compsize = __glPointParameteriv_size(pname); const GLuint cmdlen = 8 + safe_pad(safe_mul(compsize, 4)); + if (0 + safe_pad(safe_mul(compsize, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } emit_header(gc->pc, X_GLrop_PointParameteriv, cmdlen); (void) memcpy((void *) (gc->pc + 4), (void *) (&pname), 4); (void) memcpy((void *) (gc->pc + 8), (void *) (params), @@ -7981,6 +8133,10 @@ #ifndef USE_XCB const GLuint cmdlen = 4 + safe_pad(safe_mul(n, 4)); #endif + if (0 + safe_pad(safe_mul(n, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (n < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -8236,6 +8392,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 8 + safe_pad(safe_mul(n, 4)); + if (0 + safe_pad(safe_mul(n, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (n < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -8740,6 +8900,10 @@ struct glx_context *const gc = __glXGetCurrentContext(); Display *const dpy = gc->currentDpy; const GLuint cmdlen = 4 + safe_pad(safe_mul(n, 4)); + if (0 + safe_pad(safe_mul(n, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (n < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -8996,6 +9160,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 16 + safe_pad(len); + if (0 + safe_pad(len) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (len < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -9237,6 +9405,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 8 + safe_pad(safe_mul(n, 4)); + if (0 + safe_pad(safe_mul(n, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (n < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -9259,6 +9431,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 8 + safe_pad(safe_mul(n, 4)); + if (0 + safe_pad(safe_mul(n, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (n < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -9640,6 +9816,10 @@ Display *const dpy = gc->currentDpy; GLboolean retval = (GLboolean) 0; const GLuint cmdlen = 4 + safe_pad(safe_mul(n, 4)); + if (0 + safe_pad(safe_mul(n, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return 0; + } if (n < 0) { __glXSetError(gc, GL_INVALID_VALUE); return 0; @@ -9848,6 +10028,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 16 + safe_pad(len); + if (0 + safe_pad(len) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (len < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -9872,6 +10056,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 16 + safe_pad(safe_mul(num, 32)); + if (0 + safe_pad(safe_mul(num, 32)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (num < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -9897,6 +10085,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 16 + safe_pad(safe_mul(num, 16)); + if (0 + safe_pad(safe_mul(num, 16)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (num < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -9921,6 +10113,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 8 + safe_pad(safe_mul(n, 4)); + if (0 + safe_pad(safe_mul(n, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (n < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -10376,6 +10572,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 12 + safe_pad(safe_mul(n, 8)); + if (0 + safe_pad(safe_mul(n, 8)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (n < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -10398,6 +10598,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 12 + safe_pad(safe_mul(n, 4)); + if (0 + safe_pad(safe_mul(n, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (n < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -10420,6 +10624,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 12 + safe_pad(safe_mul(n, 2)); + if (0 + safe_pad(safe_mul(n, 2)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (n < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -10442,6 +10650,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 12 + safe_pad(safe_mul(n, 16)); + if (0 + safe_pad(safe_mul(n, 16)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (n < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -10464,6 +10676,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 12 + safe_pad(safe_mul(n, 8)); + if (0 + safe_pad(safe_mul(n, 8)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (n < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -10486,6 +10702,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 12 + safe_pad(safe_mul(n, 4)); + if (0 + safe_pad(safe_mul(n, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (n < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -10508,6 +10728,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 12 + safe_pad(safe_mul(n, 24)); + if (0 + safe_pad(safe_mul(n, 24)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (n < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -10530,6 +10754,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 12 + safe_pad(safe_mul(n, 12)); + if (0 + safe_pad(safe_mul(n, 12)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (n < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -10552,6 +10780,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 12 + safe_pad(safe_mul(n, 6)); + if (0 + safe_pad(safe_mul(n, 6)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (n < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -10574,6 +10806,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 12 + safe_pad(safe_mul(n, 32)); + if (0 + safe_pad(safe_mul(n, 32)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (n < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -10596,6 +10832,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 12 + safe_pad(safe_mul(n, 16)); + if (0 + safe_pad(safe_mul(n, 16)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (n < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -10618,6 +10858,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 12 + safe_pad(safe_mul(n, 8)); + if (0 + safe_pad(safe_mul(n, 8)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (n < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -10640,6 +10884,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 12 + safe_pad(safe_mul(n, 4)); + if (0 + safe_pad(safe_mul(n, 4)) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (n < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -10679,6 +10927,10 @@ struct glx_context *const gc = __glXGetCurrentContext(); Display *const dpy = gc->currentDpy; const GLuint cmdlen = 8 + safe_pad(len); + if (0 + safe_pad(len) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (len < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -10707,6 +10959,10 @@ struct glx_context *const gc = __glXGetCurrentContext(); Display *const dpy = gc->currentDpy; const GLuint cmdlen = 8 + safe_pad(len); + if (0 + safe_pad(len) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (len < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -10734,6 +10990,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 44 + safe_pad(len); + if (0 + safe_pad(len) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (len < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -10762,6 +11022,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 44 + safe_pad(len); + if (0 + safe_pad(len) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (len < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -10787,6 +11051,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 28 + safe_pad(len); + if (0 + safe_pad(len) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (len < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -10815,6 +11083,10 @@ { struct glx_context *const gc = __glXGetCurrentContext(); const GLuint cmdlen = 28 + safe_pad(len); + if (0 + safe_pad(len) < 0) { + __glXSetError(gc, GL_INVALID_VALUE); + return; + } if (len < 0) { __glXSetError(gc, GL_INVALID_VALUE); return; @@ -10863,7 +11135,7 @@ } -#ifdef GLX_SHARED_GLAPI +#ifdef GLX_INDIRECT_RENDERING static const struct proc_pair { const char *name; @@ -10916,7 +11188,7 @@ return (pair) ? pair->proc : NULL; } -#endif /* GLX_SHARED_GLAPI */ +#endif /* GLX_INDIRECT_RENDERING */ #undef FASTCALL diff -Nru mesa-12.0.6/src/glx/indirect_glx.c mesa-17.0.7/src/glx/indirect_glx.c --- mesa-12.0.6/src/glx/indirect_glx.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/glx/indirect_glx.c 2017-06-01 10:37:10.000000000 +0000 @@ -131,7 +131,6 @@ GLXDrawable draw, GLXDrawable read) { GLXContextTag tag; - __GLXattribute *state; Display *dpy = gc->psc->dpy; int opcode = __glXSetupForCommand(dpy); Bool sent; @@ -150,13 +149,6 @@ IndirectAPI = __glXNewIndirectAPI(); _glapi_set_dispatch(IndirectAPI); - state = gc->client_state_private; - if (state->array_state == NULL) { - glGetString(GL_EXTENSIONS); - glGetString(GL_VERSION); - __glXInitVertexArrayState(gc); - } - return !sent; } @@ -169,7 +161,7 @@ if (gc == new) return; - /* We are either switching to no context, away from a indirect + /* We are either switching to no context, away from an indirect * context to a direct context or from one dpy to another and have * to send a request to the dpy to unbind the previous context. */ diff -Nru mesa-12.0.6/src/glx/indirect.h mesa-17.0.7/src/glx/indirect.h --- mesa-12.0.6/src/glx/indirect.h 2017-01-24 01:42:53.000000000 +0000 +++ mesa-17.0.7/src/glx/indirect.h 2017-06-01 10:37:49.000000000 +0000 @@ -714,7 +714,7 @@ extern _X_HIDDEN void __indirect_glBindFramebufferEXT(GLenum target, GLuint framebuffer); extern _X_HIDDEN void __indirect_glBindRenderbufferEXT(GLenum target, GLuint renderbuffer); -#ifdef GLX_SHARED_GLAPI +#ifdef GLX_INDIRECT_RENDERING extern _X_HIDDEN void (*__indirect_get_proc_address(const char *name))(void); #endif diff -Nru mesa-12.0.6/src/glx/indirect_size.c mesa-17.0.7/src/glx/indirect_size.c --- mesa-12.0.6/src/glx/indirect_size.c 2017-01-24 01:43:02.000000000 +0000 +++ mesa-17.0.7/src/glx/indirect_size.c 2017-06-01 10:37:52.000000000 +0000 @@ -43,10 +43,7 @@ #endif -#if defined(__CYGWIN__) || defined(__MINGW32__) || defined(GLX_USE_APPLEGL) -#undef HAVE_ALIAS -#endif -#ifdef HAVE_ALIAS +#ifdef HAVE_FUNC_ATTRIBUTE_ALIAS #define ALIAS2(from,to) \ _X_INTERNAL PURE FASTCALL GLint __gl ## from ## _size( GLenum e ) \ __attribute__ ((alias( # to ))); diff -Nru mesa-12.0.6/src/glx/indirect_vertex_array.c mesa-17.0.7/src/glx/indirect_vertex_array.c --- mesa-12.0.6/src/glx/indirect_vertex_array.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/glx/indirect_vertex_array.c 2017-06-01 10:37:10.000000000 +0000 @@ -151,6 +151,7 @@ arrays = calloc(1, sizeof(struct array_state_vector)); + state->array_state = arrays; if (arrays == NULL) { __glXSetError(gc, GL_OUT_OF_MEMORY); @@ -206,6 +207,7 @@ arrays->arrays = calloc(array_count, sizeof(struct array_state)); if (arrays->arrays == NULL) { + state->array_state = NULL; free(arrays); __glXSetError(gc, GL_OUT_OF_MEMORY); return; @@ -240,8 +242,6 @@ arrays->arrays[4 + i].old_DrawArrays_possible = (i == 0); arrays->arrays[4 + i].index = i; - - arrays->arrays[4 + i].header[1] = i + GL_TEXTURE0; } i = 4 + texture_units; @@ -274,8 +274,6 @@ arrays->arrays[idx + i].old_DrawArrays_possible = 0; arrays->arrays[idx + i].index = idx; - - arrays->arrays[idx + i].header[1] = idx; } i += vertex_program_attribs; @@ -298,16 +296,12 @@ * __GL_CLIENT_ATTRIB_STACK_DEPTH); if (arrays->stack == NULL) { + state->array_state = NULL; free(arrays->arrays); free(arrays); __glXSetError(gc, GL_OUT_OF_MEMORY); return; } - - /* Everything went ok so we put vertex array state in place - * in context. - */ - state->array_state = arrays; } @@ -325,7 +319,7 @@ for (i = 0; i < arrays->num_arrays; i++) { if (arrays->arrays[i].enabled) { - single_vertex_size += ((uint16_t *) arrays->arrays[i].header)[0]; + single_vertex_size += arrays->arrays[i].header[0]; } } @@ -353,17 +347,45 @@ * protocol is for a 4Nus. Since the sizes are small, the * performance impact on modern processors should be negligible. */ - (void) memset(dst, 0, ((uint16_t *) arrays->arrays[i].header)[0]); + (void) memset(dst, 0, arrays->arrays[i].header[0]); - (void) memcpy(dst, arrays->arrays[i].header, - arrays->arrays[i].header_size); + (void) memcpy(dst, arrays->arrays[i].header, 4); - dst += arrays->arrays[i].header_size; + dst += 4; - (void) memcpy(dst, ((GLubyte *) arrays->arrays[i].data) + offset, - arrays->arrays[i].element_size); - - dst += __GLX_PAD(arrays->arrays[i].element_size); + if (arrays->arrays[i].key == GL_TEXTURE_COORD_ARRAY && + arrays->arrays[i].index > 0) { + /* Multi-texture coordinate arrays require the texture target + * to be sent. For doubles it is after the data, for everything + * else it is before. + */ + GLenum texture = arrays->arrays[i].index + GL_TEXTURE0; + if (arrays->arrays[i].data_type == GL_DOUBLE) { + (void) memcpy(dst, ((GLubyte *) arrays->arrays[i].data) + offset, + arrays->arrays[i].element_size); + dst += arrays->arrays[i].element_size; + (void) memcpy(dst, &texture, 4); + dst += 4; + } else { + (void) memcpy(dst, &texture, 4); + dst += 4; + (void) memcpy(dst, ((GLubyte *) arrays->arrays[i].data) + offset, + arrays->arrays[i].element_size); + dst += __GLX_PAD(arrays->arrays[i].element_size); + } + } else if (arrays->arrays[i].key == GL_VERTEX_ATTRIB_ARRAY_POINTER) { + /* Vertex attribute data requires the index sent first. + */ + (void) memcpy(dst, &arrays->arrays[i].index, 4); + dst += 4; + (void) memcpy(dst, ((GLubyte *) arrays->arrays[i].data) + offset, + arrays->arrays[i].element_size); + dst += __GLX_PAD(arrays->arrays[i].element_size); + } else { + (void) memcpy(dst, ((GLubyte *) arrays->arrays[i].data) + offset, + arrays->arrays[i].element_size); + dst += __GLX_PAD(arrays->arrays[i].element_size); + } } } @@ -1099,6 +1121,10 @@ } +/* The HDR_SIZE macro argument is the command header size (4 bytes) + * plus any additional index word e.g. for texture units or vertex + * attributes. + */ #define COMMON_ARRAY_DATA_INIT(a, PTR, TYPE, STRIDE, COUNT, NORMALIZED, HDR_SIZE, OPCODE) \ do { \ (a)->data = PTR; \ @@ -1111,9 +1137,8 @@ (a)->true_stride = (STRIDE == 0) \ ? (a)->element_size : STRIDE; \ \ - (a)->header_size = HDR_SIZE; \ - ((uint16_t *) (a)->header)[0] = __GLX_PAD((a)->header_size + (a)->element_size); \ - ((uint16_t *) (a)->header)[1] = OPCODE; \ + (a)->header[0] = __GLX_PAD(HDR_SIZE + (a)->element_size); \ + (a)->header[1] = OPCODE; \ } while(0) @@ -1386,7 +1411,7 @@ X_GLrop_TexCoord4iv }; static const uint16_t float_ops[5] = { - 0, X_GLrop_TexCoord1dv, X_GLrop_TexCoord2fv, X_GLrop_TexCoord3fv, + 0, X_GLrop_TexCoord1fv, X_GLrop_TexCoord2fv, X_GLrop_TexCoord3fv, X_GLrop_TexCoord4fv }; static const uint16_t double_ops[5] = { @@ -1403,7 +1428,7 @@ X_GLrop_MultiTexCoord3ivARB, X_GLrop_MultiTexCoord4ivARB }; static const uint16_t mfloat_ops[5] = { - 0, X_GLrop_MultiTexCoord1dvARB, X_GLrop_MultiTexCoord2fvARB, + 0, X_GLrop_MultiTexCoord1fvARB, X_GLrop_MultiTexCoord2fvARB, X_GLrop_MultiTexCoord3fvARB, X_GLrop_MultiTexCoord4fvARB }; static const uint16_t mdouble_ops[5] = { @@ -1587,9 +1612,18 @@ GLenum type, GLboolean normalized, GLsizei stride, const GLvoid * pointer) { - static const uint16_t short_ops[5] = { 0, 4189, 4190, 4191, 4192 }; - static const uint16_t float_ops[5] = { 0, 4193, 4194, 4195, 4196 }; - static const uint16_t double_ops[5] = { 0, 4197, 4198, 4199, 4200 }; + static const uint16_t short_ops[5] = { + 0, X_GLrop_VertexAttrib1svARB, X_GLrop_VertexAttrib2svARB, + X_GLrop_VertexAttrib3svARB, X_GLrop_VertexAttrib4svARB + }; + static const uint16_t float_ops[5] = { + 0, X_GLrop_VertexAttrib1fvARB, X_GLrop_VertexAttrib2fvARB, + X_GLrop_VertexAttrib3fvARB, X_GLrop_VertexAttrib4fvARB + }; + static const uint16_t double_ops[5] = { + 0, X_GLrop_VertexAttrib1dvARB, X_GLrop_VertexAttrib2dvARB, + X_GLrop_VertexAttrib3dvARB, X_GLrop_VertexAttrib4dvARB + }; uint16_t opcode; struct glx_context *gc = __glXGetCurrentContext(); @@ -1682,8 +1716,7 @@ opcode); true_immediate_size = __glXTypeSize(type) * true_immediate_count; - ((uint16_t *) (a)->header)[0] = __GLX_PAD(a->header_size - + true_immediate_size); + a->header[0] = __GLX_PAD(8 + true_immediate_size); if (a->enabled) { arrays->array_info_cache_valid = GL_FALSE; diff -Nru mesa-12.0.6/src/glx/indirect_vertex_array_priv.h mesa-17.0.7/src/glx/indirect_vertex_array_priv.h --- mesa-12.0.6/src/glx/indirect_vertex_array_priv.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/glx/indirect_vertex_array_priv.h 2017-06-01 10:37:10.000000000 +0000 @@ -87,16 +87,10 @@ /** * Pre-calculated GLX protocol command header. + * This contains two 16-bit words: the command length and the command + * opcode. */ - uint32_t header[2]; - - /** - * Size of the header data. For simple data, like glColorPointerfv, - * this is 4. For complex data that requires either a count (e.g., - * glWeightfvARB), an index (e.g., glVertexAttrib1fvARB), or a - * selector enum (e.g., glMultiTexCoord2fv) this is 8. - */ - unsigned header_size; + uint16_t header[2]; /** * Set to \c GL_TRUE if this array is enabled. Otherwise, it is set diff -Nru mesa-12.0.6/src/glx/Makefile.am mesa-17.0.7/src/glx/Makefile.am --- mesa-12.0.6/src/glx/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/glx/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -37,10 +37,10 @@ -I$(top_srcdir)/include/GL/internal \ -I$(top_srcdir)/src \ -I$(top_srcdir)/src/loader \ - -I$(top_srcdir)/src/mapi \ - -I$(top_srcdir)/src/mapi/glapi \ -I$(top_builddir)/src/mapi \ + -I$(top_srcdir)/src/mapi \ -I$(top_builddir)/src/mapi/glapi \ + -I$(top_srcdir)/src/mapi/glapi \ $(VISIBILITY_CFLAGS) \ $(SHARED_GLAPI_CFLAGS) \ $(EXTRA_DEFINES_XF86VIDMODE) \ @@ -145,6 +145,16 @@ libglx_la_LIBADD += $(builddir)/apple/libappleglx.la endif +if HAVE_WINDOWSDRI +libglx_la_SOURCES += \ + driwindows_glx.c + +SUBDIRS += windows +libglx_la_LIBADD += \ + $(builddir)/windows/libwindowsdri.la \ + $(builddir)/windows/libwindowsglx.la +endif + if USE_LIBGLVND_GLX AM_CFLAGS += \ -DGL_LIB_NAME=\"lib@GL_LIB@.so.0\" \ @@ -181,6 +191,10 @@ lib@GL_LIB@_la_LIBADD = $(GL_LIBS) lib@GL_LIB@_la_LDFLAGS = $(GL_LDFLAGS) +if HAVE_WINDOWSDRI +lib@GL_LIB@_la_LDFLAGS += -lgdi32 -lopengl32 -Wl,--disable-stdcall-fixup +endif + SUBDIRS += . tests include $(top_srcdir)/install-lib-links.mk diff -Nru mesa-12.0.6/src/glx/Makefile.in mesa-17.0.7/src/glx/Makefile.in --- mesa-12.0.6/src/glx/Makefile.in 2017-01-24 01:41:53.000000000 +0000 +++ mesa-17.0.7/src/glx/Makefile.in 2017-06-01 10:37:23.000000000 +0000 @@ -145,20 +145,29 @@ @HAVE_APPLEDRI_TRUE@am__append_7 = apple @HAVE_APPLEDRI_TRUE@am__append_8 = $(builddir)/apple/libappleglx.la -@USE_LIBGLVND_GLX_TRUE@am__append_9 = \ +@HAVE_WINDOWSDRI_TRUE@am__append_9 = \ +@HAVE_WINDOWSDRI_TRUE@ driwindows_glx.c + +@HAVE_WINDOWSDRI_TRUE@am__append_10 = windows +@HAVE_WINDOWSDRI_TRUE@am__append_11 = \ +@HAVE_WINDOWSDRI_TRUE@ $(builddir)/windows/libwindowsdri.la \ +@HAVE_WINDOWSDRI_TRUE@ $(builddir)/windows/libwindowsglx.la + +@USE_LIBGLVND_GLX_TRUE@am__append_12 = \ @USE_LIBGLVND_GLX_TRUE@ -DGL_LIB_NAME=\"lib@GL_LIB@.so.0\" \ @USE_LIBGLVND_GLX_TRUE@ $(GLVND_CFLAGS) -@USE_LIBGLVND_GLX_TRUE@am__append_10 = \ +@USE_LIBGLVND_GLX_TRUE@am__append_13 = \ @USE_LIBGLVND_GLX_TRUE@ g_glxglvnddispatchfuncs.c \ @USE_LIBGLVND_GLX_TRUE@ g_glxglvnddispatchindices.h \ @USE_LIBGLVND_GLX_TRUE@ glxglvnd.c \ @USE_LIBGLVND_GLX_TRUE@ glxglvnd.h \ @USE_LIBGLVND_GLX_TRUE@ glxglvnddispatchfuncs.h -@USE_LIBGLVND_GLX_FALSE@am__append_11 = \ +@USE_LIBGLVND_GLX_FALSE@am__append_14 = \ @USE_LIBGLVND_GLX_FALSE@ -DGL_LIB_NAME=\"lib@GL_LIB@.so.1\" +@HAVE_WINDOWSDRI_TRUE@am__append_15 = -lgdi32 -lopengl32 -Wl,--disable-stdcall-fixup subdir = src/glx ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps = $(top_srcdir)/m4/ax_check_gnu_make.m4 \ @@ -222,7 +231,7 @@ $(AM_CFLAGS) $(CFLAGS) $(lib@GL_LIB@_la_LDFLAGS) $(LDFLAGS) -o \ $@ libglx_la_DEPENDENCIES = $(top_builddir)/src/loader/libloader.la \ - $(am__append_5) $(am__append_8) + $(am__append_5) $(am__append_8) $(am__append_11) am__libglx_la_SOURCES_DIST = clientattrib.c clientinfo.c compsize.c \ create_context.c eval.c glxclient.h glxcmds.c glxconfig.c \ glxconfig.h glxcurrent.c glx_error.c glx_error.h glxext.c \ @@ -238,9 +247,9 @@ dri_common.h dri_common_query_renderer.c dri_common_interop.c \ xfont.c dri2.c dri2_glx.c dri2.h dri2_priv.h dri_glx.c \ dri_sarea.h XF86dri.c xf86dri.h xf86dristr.h dri3_glx.c \ - dri3_priv.h applegl_glx.c g_glxglvnddispatchfuncs.c \ - g_glxglvnddispatchindices.h glxglvnd.c glxglvnd.h \ - glxglvnddispatchfuncs.h + dri3_priv.h applegl_glx.c driwindows_glx.c \ + g_glxglvnddispatchfuncs.c g_glxglvnddispatchindices.h \ + glxglvnd.c glxglvnd.h glxglvnddispatchfuncs.h @HAVE_DRISW_TRUE@am__objects_1 = drisw_glx.lo @HAVE_DRICOMMON_TRUE@am__objects_2 = dri_common.lo \ @HAVE_DRICOMMON_TRUE@ dri_common_query_renderer.lo \ @@ -249,7 +258,8 @@ @HAVE_DRI2_TRUE@ XF86dri.lo @HAVE_DRI3_TRUE@am__objects_4 = dri3_glx.lo @HAVE_APPLEDRI_TRUE@am__objects_5 = applegl_glx.lo -@USE_LIBGLVND_GLX_TRUE@am__objects_6 = g_glxglvnddispatchfuncs.lo \ +@HAVE_WINDOWSDRI_TRUE@am__objects_6 = driwindows_glx.lo +@USE_LIBGLVND_GLX_TRUE@am__objects_7 = g_glxglvnddispatchfuncs.lo \ @USE_LIBGLVND_GLX_TRUE@ glxglvnd.lo am_libglx_la_OBJECTS = clientattrib.lo clientinfo.lo compsize.lo \ create_context.lo eval.lo glxcmds.lo glxconfig.lo \ @@ -262,7 +272,7 @@ query_renderer.lo render2.lo renderpix.lo single2.lo \ singlepix.lo vertarr.lo $(am__objects_1) $(am__objects_2) \ $(am__objects_3) $(am__objects_4) $(am__objects_5) \ - $(am__objects_6) + $(am__objects_6) $(am__objects_7) libglx_la_OBJECTS = $(am_libglx_la_OBJECTS) AM_V_P = $(am__v_P_@AM_V@) am__v_P_ = $(am__v_P_@AM_DEFAULT_V@) @@ -340,7 +350,7 @@ done | $(am__uniquify_input)` ETAGS = etags CTAGS = ctags -DIST_SUBDIRS = apple . tests +DIST_SUBDIRS = apple windows . tests am__DIST_COMMON = $(srcdir)/Makefile.in $(top_srcdir)/bin/depcomp \ $(top_srcdir)/install-lib-links.mk DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST) @@ -374,6 +384,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -388,6 +400,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -417,10 +430,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -470,11 +484,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -514,8 +525,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -552,8 +561,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -562,7 +569,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -570,13 +576,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -605,6 +612,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -669,19 +677,19 @@ top_srcdir = @top_srcdir@ @HAVE_SHARED_GLAPI_TRUE@SHARED_GLAPI_CFLAGS = -DGLX_SHARED_GLAPI @HAVE_SHARED_GLAPI_TRUE@SHARED_GLAPI_LIB = $(top_builddir)/src/mapi/shared-glapi/libglapi.la -SUBDIRS = $(am__append_7) . tests +SUBDIRS = $(am__append_7) $(am__append_10) . tests EXTRA_DIST = SConscript @HAVE_XF86VIDMODE_TRUE@EXTRA_DEFINES_XF86VIDMODE = -DXF86VIDMODE AM_CFLAGS = -I$(top_srcdir)/include \ -I$(top_srcdir)/include/GL/internal -I$(top_srcdir)/src \ - -I$(top_srcdir)/src/loader -I$(top_srcdir)/src/mapi \ - -I$(top_srcdir)/src/mapi/glapi -I$(top_builddir)/src/mapi \ - -I$(top_builddir)/src/mapi/glapi $(VISIBILITY_CFLAGS) \ + -I$(top_srcdir)/src/loader -I$(top_builddir)/src/mapi \ + -I$(top_srcdir)/src/mapi -I$(top_builddir)/src/mapi/glapi \ + -I$(top_srcdir)/src/mapi/glapi $(VISIBILITY_CFLAGS) \ $(SHARED_GLAPI_CFLAGS) $(EXTRA_DEFINES_XF86VIDMODE) \ -D_REENTRANT -DDEFAULT_DRIVER_DIR=\"$(DRI_DRIVER_SEARCH_DIR)\" \ $(DEFINES) $(LIBDRM_CFLAGS) $(DRI2PROTO_CFLAGS) \ - $(GLPROTO_CFLAGS) $(X11_INCLUDES) $(am__append_9) \ - $(am__append_11) + $(GLPROTO_CFLAGS) $(X11_INCLUDES) $(am__append_12) \ + $(am__append_14) lib_LTLIBRARIES = lib@GL_LIB@.la noinst_LTLIBRARIES = libglx.la libglx_la_SOURCES = clientattrib.c clientinfo.c compsize.c \ @@ -697,9 +705,9 @@ pixelstore.c query_renderer.c render2.c renderpix.c single2.c \ singlepix.c vertarr.c $(am__append_1) $(am__append_2) \ $(am__append_3) $(am__append_4) $(am__append_6) \ - $(am__append_10) + $(am__append_9) $(am__append_13) libglx_la_LIBADD = $(top_builddir)/src/loader/libloader.la \ - $(am__append_5) $(am__append_8) + $(am__append_5) $(am__append_8) $(am__append_11) @USE_LIBGLVND_GLX_FALSE@GL_LIB_VERSION = 1:2 @USE_LIBGLVND_GLX_TRUE@GL_LIB_VERSION = 0 GL_LIBS = \ @@ -717,7 +725,7 @@ lib@GL_LIB@_la_SOURCES = lib@GL_LIB@_la_LIBADD = $(GL_LIBS) -lib@GL_LIB@_la_LDFLAGS = $(GL_LDFLAGS) +lib@GL_LIB@_la_LDFLAGS = $(GL_LDFLAGS) $(am__append_15) all: all-recursive .SUFFIXES: @@ -825,6 +833,7 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/dri_common_query_renderer.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/dri_glx.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/drisw_glx.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/driwindows_glx.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eval.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/g_glxglvnddispatchfuncs.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/glx_error.Plo@am__quote@ diff -Nru mesa-12.0.6/src/glx/packrender.h mesa-17.0.7/src/glx/packrender.h --- mesa-12.0.6/src/glx/packrender.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/glx/packrender.h 2017-06-01 10:37:10.000000000 +0000 @@ -155,28 +155,34 @@ /* Single item copy macros */ #define __GLX_PUT_CHAR(offset,a) \ - *((INT8 *) (pc + offset)) = a + do { \ + int8_t __tmp = (a); \ + memcpy((pc + (offset)), &__tmp, 1); \ + } while (0) #define __GLX_PUT_SHORT(offset,a) \ - *((INT16 *) (pc + offset)) = a + do { \ + int16_t __tmp = (a); \ + memcpy((pc + (offset)), &__tmp, 2); \ + } while (0) #define __GLX_PUT_LONG(offset,a) \ - *((INT32 *) (pc + offset)) = a + do { \ + int32_t __tmp = (a); \ + memcpy((pc + (offset)), &__tmp, 4); \ + } while (0) #define __GLX_PUT_FLOAT(offset,a) \ - *((FLOAT32 *) (pc + offset)) = a + do { \ + float __tmp = (a); \ + memcpy((pc + (offset)), &__tmp, 4); \ + } while (0) -#ifdef __GLX_ALIGN64 -/* -** This can certainly be done better for a particular machine -** architecture! -*/ #define __GLX_PUT_DOUBLE(offset,a) \ - __GLX_MEM_COPY(pc + offset, &a, 8) -#else -#define __GLX_PUT_DOUBLE(offset,a) \ - *((FLOAT64 *) (pc + offset)) = a -#endif + do { \ + double __tmp = (a); \ + memcpy((pc + (offset)), &__tmp, 8); \ + } while (0) #define __GLX_PUT_CHAR_ARRAY(offset,a,alen) \ __GLX_MEM_COPY(pc + offset, a, alen * __GLX_SIZE_INT8) diff -Nru mesa-12.0.6/src/glx/packsingle.h mesa-17.0.7/src/glx/packsingle.h --- mesa-12.0.6/src/glx/packsingle.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/glx/packsingle.h 2017-06-01 10:37:10.000000000 +0000 @@ -103,24 +103,19 @@ a = (GLint) reply.size #define __GLX_SINGLE_GET_CHAR(p) \ - *p = *(GLbyte *)&reply.pad3; + memcpy((p), &reply.pad3, 1); #define __GLX_SINGLE_GET_SHORT(p) \ - *p = *(GLshort *)&reply.pad3; + memcpy((p), &reply.pad3, 2); #define __GLX_SINGLE_GET_LONG(p) \ - *p = *(GLint *)&reply.pad3; + memcpy((p), &reply.pad3, 4); #define __GLX_SINGLE_GET_FLOAT(p) \ - *p = *(GLfloat *)&reply.pad3; + memcpy((p), &reply.pad3, 4); -#ifdef __GLX_ALIGN64 #define __GLX_SINGLE_GET_DOUBLE(p) \ - __GLX_MEM_COPY(p, &reply.pad3, 8) -#else -#define __GLX_SINGLE_GET_DOUBLE(p) \ - *p = *(GLdouble *)&reply.pad3 -#endif + memcpy((p), &reply.pad3, 8); /* Get an array of typed data */ #define __GLX_SINGLE_GET_VOID_ARRAY(a,alen) \ diff -Nru mesa-12.0.6/src/glx/tests/Makefile.in mesa-17.0.7/src/glx/tests/Makefile.in --- mesa-12.0.6/src/glx/tests/Makefile.in 2017-01-24 01:41:53.000000000 +0000 +++ mesa-17.0.7/src/glx/tests/Makefile.in 2017-06-01 10:37:23.000000000 +0000 @@ -426,6 +426,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -440,6 +442,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -469,10 +472,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -522,11 +526,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -566,8 +567,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -604,8 +603,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -614,7 +611,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -622,13 +618,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -657,6 +654,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ diff -Nru mesa-12.0.6/src/glx/windows/Makefile.am mesa-17.0.7/src/glx/windows/Makefile.am --- mesa-12.0.6/src/glx/windows/Makefile.am 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/glx/windows/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,32 @@ +noinst_LTLIBRARIES = libwindowsdri.la libwindowsglx.la + +# protocol defines for the Windows-DRI server extension +windowsdriincludedir = $(includedir)/X11/extensions +windowsdriinclude_HEADERS = windowsdriconst.h windowsdristr.h + +pkgconfigdir = $(libdir)/pkgconfig +pkgconfig_DATA = windowsdriproto.pc + +# library for using the Windows-DRI server extension +libwindowsdri_la_SOURCES = xwindowsdri.c xwindowsdri.h + +# native rendering GL for windows +libwindowsglx_la_SOURCES = \ + windowsgl.c \ + windowsgl.h \ + windowsgl_internal.h \ + windows_drawable.c \ + wgl.c \ + wgl.h + +libwindowsglx_la_CFLAGS = \ + -I$(top_srcdir)/include \ + -I$(top_srcdir)/src \ + -I$(top_srcdir)/src/glx \ + -I$(top_srcdir)/src/mapi \ + -I$(top_builddir)/src/mapi/glapi \ + -I$(top_srcdir)/src/mapi/glapi \ + $(VISIBILITY_CFLAGS) \ + $(SHARED_GLAPI_CFLAGS) \ + $(DEFINES) \ + $(X11_INCLUDES) diff -Nru mesa-12.0.6/src/glx/windows/Makefile.in mesa-17.0.7/src/glx/windows/Makefile.in --- mesa-12.0.6/src/glx/windows/Makefile.in 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/glx/windows/Makefile.in 2017-06-01 10:37:23.000000000 +0000 @@ -0,0 +1,923 @@ +# Makefile.in generated by automake 1.15 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994-2014 Free Software Foundation, Inc. + +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +# PARTICULAR PURPOSE. + +@SET_MAKE@ + + + +VPATH = @srcdir@ +am__is_gnu_make = { \ + if test -z '$(MAKELEVEL)'; then \ + false; \ + elif test -n '$(MAKE_HOST)'; then \ + true; \ + elif test -n '$(MAKE_VERSION)' && test -n '$(CURDIR)'; then \ + true; \ + else \ + false; \ + fi; \ +} +am__make_running_with_option = \ + case $${target_option-} in \ + ?) ;; \ + *) echo "am__make_running_with_option: internal error: invalid" \ + "target option '$${target_option-}' specified" >&2; \ + exit 1;; \ + esac; \ + has_opt=no; \ + sane_makeflags=$$MAKEFLAGS; \ + if $(am__is_gnu_make); then \ + sane_makeflags=$$MFLAGS; \ + else \ + case $$MAKEFLAGS in \ + *\\[\ \ ]*) \ + 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install-pkgconfigDATA install-ps install-ps-am install-strip \ + install-windowsdriincludeHEADERS installcheck installcheck-am \ + installdirs maintainer-clean maintainer-clean-generic \ + mostlyclean mostlyclean-compile mostlyclean-generic \ + mostlyclean-libtool pdf pdf-am ps ps-am tags tags-am uninstall \ + uninstall-am uninstall-pkgconfigDATA \ + uninstall-windowsdriincludeHEADERS + +.PRECIOUS: Makefile + + +# Tell versions [3.59,3.63) of GNU make to not export all variables. +# Otherwise a system limit (for SysV at least) may be exceeded. +.NOEXPORT: diff -Nru mesa-12.0.6/src/glx/windows/wgl.c mesa-17.0.7/src/glx/windows/wgl.c --- mesa-12.0.6/src/glx/windows/wgl.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/glx/windows/wgl.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,108 @@ +/* + * Copyright © 2014 Jon Turney + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +/* + Wrapper functions for calling WGL extension functions + */ + +#include "wgl.h" + +#include + +#define RESOLVE_DECL(type) \ + static type type##proc = NULL; + +#define PRERESOLVE(type, symbol) \ + type##proc = (type)wglGetProcAddress(symbol); \ + if (type##proc == NULL) \ + printf("Can't resolve \"%s\"\n", symbol); + +#define CHECK_RESOLVED(type, retval) \ + if (type##proc == NULL) { \ + return retval; \ + } + +#define RESOLVED_PROC(type) type##proc + +RESOLVE_DECL(PFNWGLGETEXTENSIONSSTRINGARBPROC); +RESOLVE_DECL(PFNWGLCREATECONTEXTATTRIBSARBPROC); +RESOLVE_DECL(PFNWGLMAKECONTEXTCURRENTARBPROC); +RESOLVE_DECL(PFNWGLCREATEPBUFFERARBPROC); +RESOLVE_DECL(PFNWGLGETPBUFFERDCARBPROC); +RESOLVE_DECL(PFNWGLRELEASEPBUFFERDCARBPROC); +RESOLVE_DECL(PFNWGLDESTROYPBUFFERARBPROC); + +void wglResolveExtensionProcs(void) +{ + PRERESOLVE(PFNWGLGETEXTENSIONSSTRINGARBPROC, "wglGetExtensionsStringARB"); + PRERESOLVE(PFNWGLCREATECONTEXTATTRIBSARBPROC, "wglCreateContextAttribsARB"); + PRERESOLVE(PFNWGLMAKECONTEXTCURRENTARBPROC, "wglMakeContextCurrentARB"); + PRERESOLVE(PFNWGLCREATEPBUFFERARBPROC, "wglCreatePbufferARB"); + PRERESOLVE(PFNWGLGETPBUFFERDCARBPROC, "wglGetPbufferDCARB"); + PRERESOLVE(PFNWGLRELEASEPBUFFERDCARBPROC, "wglReleasePbufferDCARB"); + PRERESOLVE(PFNWGLDESTROYPBUFFERARBPROC, "wglDestroyPbufferARB"); +} + +const char *wglGetExtensionsStringARB(HDC hdc_) +{ + CHECK_RESOLVED(PFNWGLGETEXTENSIONSSTRINGARBPROC, ""); + return RESOLVED_PROC(PFNWGLGETEXTENSIONSSTRINGARBPROC)(hdc_); +} + +HGLRC wglCreateContextAttribsARB(HDC hdc_, HGLRC hShareContext_, + const int *attribList_) +{ + CHECK_RESOLVED(PFNWGLCREATECONTEXTATTRIBSARBPROC, NULL); + return RESOLVED_PROC(PFNWGLCREATECONTEXTATTRIBSARBPROC)(hdc_, hShareContext_, attribList_); +} + +BOOL wglMakeContextCurrentARB(HDC hDrawDC_, HDC hReadDC_, HGLRC hglrc_) +{ + CHECK_RESOLVED(PFNWGLMAKECONTEXTCURRENTARBPROC, FALSE); + return RESOLVED_PROC(PFNWGLMAKECONTEXTCURRENTARBPROC)(hDrawDC_, hReadDC_, hglrc_); +} + +HPBUFFERARB wglCreatePbufferARB(HDC hDC_, int iPixelFormat_, int iWidth_, + int iHeight_, const int *piAttribList_) +{ + CHECK_RESOLVED(PFNWGLCREATEPBUFFERARBPROC, NULL); + return RESOLVED_PROC(PFNWGLCREATEPBUFFERARBPROC)(hDC_, iPixelFormat_, iWidth_, iHeight_, piAttribList_); +} + +HDC wglGetPbufferDCARB(HPBUFFERARB hPbuffer_) +{ + CHECK_RESOLVED(PFNWGLGETPBUFFERDCARBPROC, NULL); + return RESOLVED_PROC(PFNWGLGETPBUFFERDCARBPROC)(hPbuffer_); +} + +int wglReleasePbufferDCARB(HPBUFFERARB hPbuffer_, HDC hDC_) +{ + CHECK_RESOLVED(PFNWGLRELEASEPBUFFERDCARBPROC, 0) + return RESOLVED_PROC(PFNWGLRELEASEPBUFFERDCARBPROC)(hPbuffer_, hDC_); +} + +BOOL wglDestroyPbufferARB(HPBUFFERARB hPbuffer_) +{ + CHECK_RESOLVED(PFNWGLDESTROYPBUFFERARBPROC, FALSE); + return RESOLVED_PROC(PFNWGLDESTROYPBUFFERARBPROC)(hPbuffer_); +} diff -Nru mesa-12.0.6/src/glx/windows/wgl.h mesa-17.0.7/src/glx/windows/wgl.h --- mesa-12.0.6/src/glx/windows/wgl.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/glx/windows/wgl.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,44 @@ +/* + * Copyright © 2014 Jon Turney + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef wgl_h +#define wgl_h + +#include // for BOOL +#include // as this doesn't provide one +#include +#include + +void wglResolveExtensionProcs(void); + +const char *wglGetExtensionsStringARB(HDC hdc_); +HGLRC wglCreateContextAttribsARB(HDC hdc_, HGLRC hShareContext_, + const int *attribList_); +BOOL wglMakeContextCurrentARB(HDC hDrawDC_, HDC hReadDC_, HGLRC hglrc_); +HPBUFFERARB wglCreatePbufferARB(HDC hDC_, int iPixelFormat_, int iWidth_, + int iHeight_, const int *piAttribList_); +HDC wglGetPbufferDCARB(HPBUFFERARB hPbuffer_); +int wglReleasePbufferDCARB(HPBUFFERARB hPbuffer_, HDC hDC_); +BOOL wglDestroyPbufferARB(HPBUFFERARB hPbuffer_); + +#endif /* wgl_h */ diff -Nru mesa-12.0.6/src/glx/windows/windows_drawable.c mesa-17.0.7/src/glx/windows/windows_drawable.c --- mesa-12.0.6/src/glx/windows/windows_drawable.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/glx/windows/windows_drawable.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,192 @@ +/* + * Copyright © 2014 Jon Turney + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "windowsgl.h" +#include "windowsgl_internal.h" +#include "windowsdriconst.h" +#include "wgl.h" + +#include + +/* + * Window drawable + */ + +static +HDC window_getdc(windowsDrawable *d) +{ + return GetDC(d->hWnd); +} + +static +void window_releasedc(windowsDrawable *d, HDC dc) +{ + ReleaseDC(d->hWnd, dc); +} + +static struct windowsdrawable_callbacks window_callbacks = { + .type = WindowsDRIDrawableWindow, + .getdc = window_getdc, + .releasedc = window_releasedc +}; + +/* + * Pixmap drawable + */ + +static +HDC pixmap_getdc(windowsDrawable *d) +{ + return d->dibDC; +} + +static +void pixmap_releasedc(windowsDrawable *d, HDC dc) +{ + GdiFlush(); +} + +static struct windowsdrawable_callbacks pixmap_callbacks = { + .type = WindowsDRIDrawablePixmap, + .getdc = pixmap_getdc, + .releasedc = pixmap_releasedc +}; + +/* + * Pbuffer drawable + */ + +static +HDC pbuffer_getdc(windowsDrawable *d) +{ + return wglGetPbufferDCARB(d->hPbuffer); +} + +static +void pbuffer_releasedc(windowsDrawable *d, HDC dc) +{ + wglReleasePbufferDCARB(d->hPbuffer, dc); +} + +static struct windowsdrawable_callbacks pbuffer_callbacks = { + .type = WindowsDRIDrawablePbuffer, + .getdc = pbuffer_getdc, + .releasedc = pbuffer_releasedc +}; + +/* + * + */ + +windowsDrawable * +windows_create_drawable(int type, void *handle) +{ + windowsDrawable *d; + + d = calloc(1, sizeof *d); + if (d == NULL) + return NULL; + + switch (type) + { + case WindowsDRIDrawableWindow: + d->hWnd = handle; + d->callbacks = &window_callbacks; + break; + + case WindowsDRIDrawablePixmap: + { + BITMAPINFOHEADER *pBmpHeader; + void *pBits; + + char name[MAX_PATH]; + + d->callbacks = &pixmap_callbacks; + + // Access file mapping object by a name + snprintf(name, sizeof(name), "Local\\CYGWINX_WINDOWSDRI_%08lx", (uintptr_t)handle); + d->hSection = OpenFileMapping(FILE_MAP_ALL_ACCESS, FALSE, name); + if (!d->hSection) + printf("OpenFileMapping failed %x\n", GetLastError()); + + // Create a screen-compatible DC + d->dibDC = CreateCompatibleDC(NULL); + + // Map the shared memory section to access the BITMAPINFOHEADER + pBmpHeader = (BITMAPINFOHEADER *)MapViewOfFile(d->hSection, FILE_MAP_ALL_ACCESS, 0, 0, sizeof(BITMAPINFOHEADER)); + if (!pBmpHeader) + printf("MapViewOfFile failed %x\n", GetLastError()); + + // Create a DIB using the file mapping + d->hDIB = CreateDIBSection(d->dibDC, (BITMAPINFO *) pBmpHeader, + DIB_RGB_COLORS, &pBits, d->hSection, + sizeof(BITMAPINFOHEADER)); + + // Done with the BITMAPINFOHEADER + UnmapViewOfFile(pBmpHeader); + + // Select the DIB into the DC + d->hOldDIB = SelectObject(d->dibDC, d->hDIB); + } + break; + + case WindowsDRIDrawablePbuffer: + d->hPbuffer = handle; + d->callbacks = &pbuffer_callbacks; + break; + } + + return d; +} + +void +windows_destroy_drawable(windowsDrawable *drawable) +{ + switch (drawable->callbacks->type) + { + case WindowsDRIDrawableWindow: + break; + + case WindowsDRIDrawablePixmap: + { + // Select the default DIB into the DC + SelectObject(drawable->dibDC, drawable->hOldDIB); + + // delete the screen-compatible DC + DeleteDC(drawable->dibDC); + + // Delete the DIB + DeleteObject(drawable->hDIB); + + // Close the file mapping object + CloseHandle(drawable->hSection); + } + break; + + case WindowsDRIDrawablePbuffer: + + break; + } + + free(drawable); +} diff -Nru mesa-12.0.6/src/glx/windows/windowsdriconst.h mesa-17.0.7/src/glx/windows/windowsdriconst.h --- mesa-12.0.6/src/glx/windows/windowsdriconst.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/glx/windows/windowsdriconst.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,45 @@ +/* + * Copyright © 2014 Jon Turney + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef WINDOWSDRICONST_H +#define WINDOWSDRICONST_H + +/* Requests */ +#define X_WindowsDRIQueryVersion 0 +#define X_WindowsDRIQueryDirectRenderingCapable 1 +#define X_WindowsDRIQueryDrawable 9 +#define X_WindowsDRIFBConfigToPixelFormat 10 + +/* Events */ +#define WindowsDRINumberEvents 0 + +/* Errors */ +#define WindowsDRIClientNotLocal 0 +#define WindowsDRINumberErrors (WindowsDRIClientNotLocal + 1) + +/* Kinds of Drawables */ +#define WindowsDRIDrawableWindow 0 +#define WindowsDRIDrawablePixmap 1 +#define WindowsDRIDrawablePbuffer 2 + +#endif /* WINDOWSDRICONST_H */ diff -Nru mesa-12.0.6/src/glx/windows/windowsdriproto.pc.in mesa-17.0.7/src/glx/windows/windowsdriproto.pc.in --- mesa-12.0.6/src/glx/windows/windowsdriproto.pc.in 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/glx/windows/windowsdriproto.pc.in 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,9 @@ +prefix=@prefix@ +exec_prefix=@exec_prefix@ +libdir=@libdir@ +includedir=@includedir@ + +Name: windowsdriproto +Description: Windows-DRI extension headers +Version: 1.0.0 +Cflags: -I${includedir} diff -Nru mesa-12.0.6/src/glx/windows/windowsdristr.h mesa-17.0.7/src/glx/windows/windowsdristr.h --- mesa-12.0.6/src/glx/windows/windowsdristr.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/glx/windows/windowsdristr.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,152 @@ +/* + * Copyright © 2014 Jon Turney + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef WINDOWSDRISTR_H +#define WINDOWSDRISTR_H + +#include "windowsdriconst.h" + +#define WINDOWSDRINAME "Windows-DRI" + +#define WINDOWS_DRI_MAJOR_VERSION 1 /* current version numbers */ +#define WINDOWS_DRI_MINOR_VERSION 0 +#define WINDOWS_DRI_PATCH_VERSION 0 + +typedef struct _WindowsDRIQueryVersion +{ + CARD8 reqType; /* always DRIReqCode */ + CARD8 driReqType; /* always X_DRIQueryVersion */ + CARD16 length B16; +} xWindowsDRIQueryVersionReq; +#define sz_xWindowsDRIQueryVersionReq 4 + +typedef struct +{ + BYTE type; /* X_Reply */ + BOOL pad1; + CARD16 sequenceNumber B16; + CARD32 length B32; + CARD16 majorVersion B16; /* major version of DRI protocol */ + CARD16 minorVersion B16; /* minor version of DRI protocol */ + CARD32 patchVersion B32; /* patch version of DRI protocol */ + CARD32 pad3 B32; + CARD32 pad4 B32; + CARD32 pad5 B32; + CARD32 pad6 B32; +} xWindowsDRIQueryVersionReply; +#define sz_xWindowsDRIQueryVersionReply 32 + +typedef struct _WindowsDRIQueryDirectRenderingCapable +{ + CARD8 reqType; /* always DRIReqCode */ + CARD8 driReqType; /* X_DRIQueryDirectRenderingCapable */ + CARD16 length B16; + CARD32 screen B32; +} xWindowsDRIQueryDirectRenderingCapableReq; +#define sz_xWindowsDRIQueryDirectRenderingCapableReq 8 + +typedef struct +{ + BYTE type; /* X_Reply */ + BOOL pad1; + CARD16 sequenceNumber B16; + CARD32 length B32; + BOOL isCapable; + BOOL pad2; + BOOL pad3; + BOOL pad4; + CARD32 pad5 B32; + CARD32 pad6 B32; + CARD32 pad7 B32; + CARD32 pad8 B32; + CARD32 pad9 B32; +} xWindowsDRIQueryDirectRenderingCapableReply; +#define sz_xWindowsDRIQueryDirectRenderingCapableReply 32 + +typedef struct _WindowsDRINotify +{ + BYTE type; /* always eventBase + event type */ + BYTE kind; + CARD16 sequenceNumber B16; + CARD32 time B32; /* time of change */ + CARD32 pad1 B32; + CARD32 pad2 B32; + CARD32 pad3 B32; + CARD32 pad4 B32; + CARD32 pad5 B32; + CARD32 pad6 B32; +} xWindowsDRINotifyEvent; +#define sz_xWindowsDRINotifyEvent 32 + +typedef struct _WindowsDRIQueryDrawable +{ + CARD8 reqType; /* always DRIReqCode */ + CARD8 driReqType; /* always X_DRIQueryDrawable */ + CARD16 length B16; + CARD32 screen B32; + CARD32 drawable B32; +} xWindowsDRIQueryDrawableReq; +#define sz_xWindowsDRIQueryDrawableReq 12 + +typedef struct +{ + BYTE type; /* X_Reply */ + BOOL pad1; + CARD16 sequenceNumber B16; + CARD32 length B32; + CARD32 drawable_type B32; + CARD32 handle B32; + CARD32 pad3 B32; + CARD32 pad4 B32; + CARD32 pad5 B32; + CARD32 pad6 B32; +} xWindowsDRIQueryDrawableReply; +#define sz_xWindowsDRIQueryDrawableReply 32 + +typedef struct _WindowsDRIFBConfigToPixelFormat +{ + CARD8 reqType; /* always DRIReqCode */ + CARD8 driReqType; /* always X_DRIFBConfigToPixelFormat */ + CARD16 length B16; + CARD32 screen B32; + CARD32 fbConfigID B32; +} xWindowsDRIFBConfigToPixelFormatReq; + +#define sz_xWindowsDRIFBConfigToPixelFormatReq 12 + +typedef struct +{ + BYTE type; /* X_Reply */ + BOOL pad1; + CARD16 sequenceNumber B16; + CARD32 length B32; + CARD32 pixelFormatIndex B32; + CARD32 pad2 B32; + CARD32 pad3 B32; + CARD32 pad4 B32; + CARD32 pad5 B32; + CARD32 pad6 B32; +} xWindowsDRIFBConfigToPixelFormatReply; +#define sz_xWindowsDRIFBConfigToPixelFormatReply 32 + +#endif /* WINDOWSDRISTR_H */ diff -Nru mesa-12.0.6/src/glx/windows/windowsgl.c mesa-17.0.7/src/glx/windows/windowsgl.c --- mesa-12.0.6/src/glx/windows/windowsgl.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/glx/windows/windowsgl.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,403 @@ +/* + * Copyright © 2014 Jon Turney + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "windowsgl.h" +#include "windowsgl_internal.h" + +#include "glapi.h" +#include "wgl.h" + +#include +#include +#include +#include + +static struct _glapi_table *windows_api = NULL; + +static void * +windows_get_dl_handle(void) +{ + static void *dl_handle = NULL; + + if (!dl_handle) + dl_handle = dlopen("cygnativeGLthunk.dll", RTLD_NOW); + + return dl_handle; +} + +static void +windows_glapi_create_table(void) +{ + if (windows_api) + return; + + windows_api = _glapi_create_table_from_handle(windows_get_dl_handle(), "gl"); + assert(windows_api); +} + +static void windows_glapi_set_dispatch(void) +{ + windows_glapi_create_table(); + _glapi_set_dispatch(windows_api); +} + +windowsContext * +windows_create_context(int pxfi, windowsContext *shared) +{ + windowsContext *gc; + + gc = calloc(1, sizeof *gc); + if (gc == NULL) + return NULL; + + // create a temporary, invisible window +#define GL_TEMP_WINDOW_CLASS "glTempWndClass" + { + static wATOM glTempWndClass = 0; + + if (glTempWndClass == 0) { + WNDCLASSEX wc; + wc.cbSize = sizeof(WNDCLASSEX); + wc.style = CS_HREDRAW | CS_VREDRAW; + wc.lpfnWndProc = DefWindowProc; + wc.cbClsExtra = 0; + wc.cbWndExtra = 0; + wc.hInstance = GetModuleHandle(NULL); + wc.hIcon = 0; + wc.hCursor = 0; + wc.hbrBackground = (HBRUSH) GetStockObject(WHITE_BRUSH); + wc.lpszMenuName = NULL; + wc.lpszClassName = GL_TEMP_WINDOW_CLASS; + wc.hIconSm = 0; + RegisterClassEx(&wc); + } + } + + HWND hwnd = CreateWindowExA(0, + GL_TEMP_WINDOW_CLASS, + "glWindow", + 0, + 0, 0, 0, 0, + NULL, NULL, GetModuleHandle(NULL), NULL); + HDC hdc = GetDC(hwnd); + + // We must set the windows pixel format before we can create a WGL context + gc->pxfi = pxfi; + SetPixelFormat(hdc, gc->pxfi, NULL); + + gc->ctx = wglCreateContext(hdc); + + if (shared && gc->ctx) + wglShareLists(shared->ctx, gc->ctx); + + ReleaseDC(hwnd, hdc); + DestroyWindow(hwnd); + + if (!gc->ctx) + { + free(gc); + return NULL; + } + + return gc; +} + +windowsContext * +windows_create_context_attribs(int pxfi, windowsContext *shared, const int *attribList) +{ + windowsContext *gc; + + gc = calloc(1, sizeof *gc); + if (gc == NULL) + return NULL; + + // create a temporary, invisible window +#define GL_TEMP_WINDOW_CLASS "glTempWndClass" + { + static wATOM glTempWndClass = 0; + + if (glTempWndClass == 0) { + WNDCLASSEX wc; + wc.cbSize = sizeof(WNDCLASSEX); + wc.style = CS_HREDRAW | CS_VREDRAW; + wc.lpfnWndProc = DefWindowProc; + wc.cbClsExtra = 0; + wc.cbWndExtra = 0; + wc.hInstance = GetModuleHandle(NULL); + wc.hIcon = 0; + wc.hCursor = 0; + wc.hbrBackground = (HBRUSH) GetStockObject(WHITE_BRUSH); + wc.lpszMenuName = NULL; + wc.lpszClassName = GL_TEMP_WINDOW_CLASS; + wc.hIconSm = 0; + RegisterClassEx(&wc); + } + } + + HWND hwnd = CreateWindowExA(0, + GL_TEMP_WINDOW_CLASS, + "glWindow", + 0, + 0, 0, 0, 0, + NULL, NULL, GetModuleHandle(NULL), NULL); + HDC hdc = GetDC(hwnd); + HGLRC shareContext = NULL; + if (shared) + shareContext = shared->ctx; + + // We must set the windows pixel format before we can create a WGL context + gc->pxfi = pxfi; + SetPixelFormat(hdc, gc->pxfi, NULL); + + gc->ctx = wglCreateContextAttribsARB(hdc, shareContext, attribList); + + ReleaseDC(hwnd, hdc); + DestroyWindow(hwnd); + + if (!gc->ctx) + { + free(gc); + return NULL; + } + + return gc; +} + +void +windows_destroy_context(windowsContext *context) +{ + wglDeleteContext(context->ctx); + context->ctx = NULL; + free(context); +} + +int windows_bind_context(windowsContext *context, windowsDrawable *draw, windowsDrawable *read) +{ + HDC drawDc = draw->callbacks->getdc(draw); + + if (!draw->pxfi) + { + SetPixelFormat(drawDc, context->pxfi, NULL); + draw->pxfi = context->pxfi; + } + + if ((read != NULL) && (read != draw)) + { + /* + If there is a separate read drawable, create a separate read DC, and + use the wglMakeContextCurrent extension to make the context current + drawing to one DC and reading from the other + + Should only occur when WGL_ARB_make_current_read extension is present + */ + HDC readDc = read->callbacks->getdc(read); + + BOOL ret = wglMakeContextCurrentARB(drawDc, readDc, context->ctx); + + read->callbacks->releasedc(read, readDc); + + if (!ret) { + printf("wglMakeContextCurrentARB error: %08x\n", GetLastError()); + return FALSE; + } + } + else + { + /* Otherwise, just use wglMakeCurrent */ + BOOL ret = wglMakeCurrent(drawDc, context->ctx); + if (!ret) { + printf("wglMakeCurrent error: %08x\n", GetLastError()); + return FALSE; + } + } + + draw->callbacks->releasedc(draw, drawDc); + + windows_glapi_set_dispatch(); + + return TRUE; +} + +void windows_unbind_context(windowsContext * context) +{ + wglMakeCurrent(NULL, NULL); +} + +/* + * + */ + +void +windows_swap_buffers(windowsDrawable *draw) +{ + HDC drawDc = GetDC(draw->hWnd); + SwapBuffers(drawDc); + ReleaseDC(draw->hWnd, drawDc); +} + + +typedef void (__stdcall * PFNGLADDSWAPHINTRECTWIN) (GLint x, GLint y, + GLsizei width, + GLsizei height); + +static void +glAddSwapHintRectWIN(GLint x, GLint y, GLsizei width, + GLsizei height) +{ + PFNGLADDSWAPHINTRECTWIN proc = (PFNGLADDSWAPHINTRECTWIN)wglGetProcAddress("glAddSwapHintRectWIN"); + if (proc) + proc(x, y, width, height); +} + +void +windows_copy_subbuffer(windowsDrawable *draw, + int x, int y, int width, int height) +{ + glAddSwapHintRectWIN(x, y, width, height); + windows_swap_buffers(draw); +} + +/* + * Helper function for calling a test function on an initial context + */ +static void +windows_call_with_context(void (*proc)(HDC, void *), void *args) +{ + // create window class +#define WIN_GL_TEST_WINDOW_CLASS "GLTest" + { + static wATOM glTestWndClass = 0; + + if (glTestWndClass == 0) { + WNDCLASSEX wc; + + wc.cbSize = sizeof(WNDCLASSEX); + wc.style = CS_HREDRAW | CS_VREDRAW; + wc.lpfnWndProc = DefWindowProc; + wc.cbClsExtra = 0; + wc.cbWndExtra = 0; + wc.hInstance = GetModuleHandle(NULL); + wc.hIcon = 0; + wc.hCursor = 0; + wc.hbrBackground = (HBRUSH) GetStockObject(WHITE_BRUSH); + wc.lpszMenuName = NULL; + wc.lpszClassName = WIN_GL_TEST_WINDOW_CLASS; + wc.hIconSm = 0; + glTestWndClass = RegisterClassEx(&wc); + } + } + + // create an invisible window for a scratch DC + HWND hwnd = CreateWindowExA(0, + WIN_GL_TEST_WINDOW_CLASS, + "GL Renderer Capabilities Test Window", + 0, 0, 0, 0, 0, NULL, NULL, GetModuleHandle(NULL), + NULL); + if (hwnd) { + HDC hdc = GetDC(hwnd); + + // we must set a pixel format before we can create a context, just use the first one... + SetPixelFormat(hdc, 1, NULL); + HGLRC hglrc = wglCreateContext(hdc); + wglMakeCurrent(hdc, hglrc); + + // call the test function + proc(hdc, args); + + // clean up + wglMakeCurrent(NULL, NULL); + wglDeleteContext(hglrc); + ReleaseDC(hwnd, hdc); + DestroyWindow(hwnd); + } +} + +static void +windows_check_render_test(HDC hdc, void *args) +{ + int *result = (int *)args; + + /* Rather than play linkage games using stdcall to ensure we get + glGetString from opengl32.dll here, use dlsym */ + void *dlhandle = windows_get_dl_handle(); + const char *(*proc)(int) = dlsym(dlhandle, "glGetString"); + const char *gl_renderer = (const char *)proc(GL_RENDERER); + + if ((!gl_renderer) || (strcasecmp(gl_renderer, "GDI Generic") == 0)) + *result = FALSE; + else + *result = TRUE; +} + +int +windows_check_renderer(void) +{ + int result; + windows_call_with_context(windows_check_render_test, &result); + return result; +} + +typedef struct { + char *gl_extensions; + char *wgl_extensions; +} windows_extensions_result; + +static void +windows_extensions_test(HDC hdc, void *args) +{ + windows_extensions_result *r = (windows_extensions_result *)args; + + void *dlhandle = windows_get_dl_handle(); + const char *(*proc)(int) = dlsym(dlhandle, "glGetString"); + + r->gl_extensions = strdup(proc(GL_EXTENSIONS)); + + wglResolveExtensionProcs(); + r->wgl_extensions = strdup(wglGetExtensionsStringARB(hdc)); +} + +void +windows_extensions(char **gl_extensions, char **wgl_extensions) +{ + windows_extensions_result result; + + *gl_extensions = ""; + *wgl_extensions = ""; + + windows_call_with_context(windows_extensions_test, &result); + + *gl_extensions = result.gl_extensions; + *wgl_extensions = result.wgl_extensions; +} + +void windows_setTexBuffer(windowsContext *context, int textureTarget, + int textureFormat, windowsDrawable *drawable) +{ + // not yet implemented +} + +void windows_releaseTexBuffer(windowsContext *context, int textureTarget, + windowsDrawable *drawable) +{ + // not yet implemented +} diff -Nru mesa-12.0.6/src/glx/windows/windowsgl.h mesa-17.0.7/src/glx/windows/windowsgl.h --- mesa-12.0.6/src/glx/windows/windowsgl.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/glx/windows/windowsgl.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,52 @@ +/* + * Copyright © 2014 Jon Turney + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef windowsgl_h +#define windowsgh_h + +struct _windowsContext; +struct _windowsDrawable; + +typedef struct _windowsContext windowsContext; +typedef struct _windowsDrawable windowsDrawable; + +windowsContext *windows_create_context(int pxfi, windowsContext *shared); +windowsContext *windows_create_context_attribs(int pxfi, windowsContext *shared, const int *attribList); +void windows_destroy_context(windowsContext *contex); +int windows_bind_context(windowsContext *context, windowsDrawable *, windowsDrawable *); +void windows_unbind_context(windowsContext *context); + +windowsDrawable *windows_create_drawable(int type, void *handle); +void windows_destroy_drawable(windowsDrawable *); +void windows_swap_buffers(windowsDrawable *); +void windows_copy_subbuffer(windowsDrawable *windowsDrawable, int x, int y, int width, int height); + +int windows_check_renderer(void); +void windows_extensions(char **gl_extensions, char **wgl_extensions); + +void windows_setTexBuffer(windowsContext *context, int textureTarget, + int textureFormat, windowsDrawable *drawable); +void windows_releaseTexBuffer(windowsContext *context, int textureTarget, + windowsDrawable *drawable); + +#endif /* windowsgl_h */ diff -Nru mesa-12.0.6/src/glx/windows/windowsgl_internal.h mesa-17.0.7/src/glx/windows/windowsgl_internal.h --- mesa-12.0.6/src/glx/windows/windowsgl_internal.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/glx/windows/windowsgl_internal.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,67 @@ +/* + * Copyright © 2014 Jon Turney + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef windowsgl_internal_h +#define windowsgl_internal_h + +#include "windowsgl.h" + +#include // for BOOL +#include // as this doesn't provide one +#include +#include + +struct _windowsContext +{ + struct glx_config *config; + windowsContext *shareContext; + HGLRC ctx; + int pxfi; +}; + +struct windowsdrawable_callbacks +{ + int type; // WINDOW, PIXMAP, PBUFFER + HDC (*getdc) (windowsDrawable *d); + void (*releasedc) (windowsDrawable *d, HDC dc); +}; + +struct _windowsDrawable +{ + int pxfi; // 0 if not yet set + struct windowsdrawable_callbacks *callbacks; + + // for type WINDOW + HWND hWnd; + + // for type PIXMAP + HANDLE hSection; + HDC dibDC; + HBITMAP hDIB; + HBITMAP hOldDIB; + + // for type PBUFFER + HPBUFFERARB hPbuffer; +}; + +#endif /* windowsgl_internal_h */ diff -Nru mesa-12.0.6/src/glx/windows/xwindowsdri.c mesa-17.0.7/src/glx/windows/xwindowsdri.c --- mesa-12.0.6/src/glx/windows/xwindowsdri.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/glx/windows/xwindowsdri.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,237 @@ +/* + * Copyright © 2014 Jon Turney + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +/* THIS IS NOT AN X CONSORTIUM STANDARD */ + +#include +#include +#include +#include "windowsdristr.h" +#include "xwindowsdri.h" +#include + +static XExtensionInfo _windowsdri_info_data; +static XExtensionInfo *windowsdri_info = &_windowsdri_info_data; +static char *windowsdri_extension_name = WINDOWSDRINAME; + +#define WindowsDRICheckExtension(dpy,i,val) \ + XextCheckExtension (dpy, i, windowsdri_extension_name, val) + +/***************************************************************************** + * * + * private utility routines * + * * + *****************************************************************************/ + +static int close_display(Display * dpy, XExtCodes * extCodes); + +static /* const */ XExtensionHooks windowsdri_extension_hooks = { + NULL, /* create_gc */ + NULL, /* copy_gc */ + NULL, /* flush_gc */ + NULL, /* free_gc */ + NULL, /* create_font */ + NULL, /* free_font */ + close_display, /* close_display */ + NULL, /* wire_to_event */ + NULL, /* event_to_wire */ + NULL, /* error */ + NULL, /* error_string */ +}; + +static +XEXT_GENERATE_FIND_DISPLAY(find_display, windowsdri_info, + windowsdri_extension_name, + &windowsdri_extension_hooks, + WindowsDRINumberEvents, NULL) + +static +XEXT_GENERATE_CLOSE_DISPLAY(close_display, windowsdri_info) + +/***************************************************************************** + * * + * public Windows-DRI Extension routines * + * * + *****************************************************************************/ + +#if 0 +#include +#define TRACE(msg, ...) fprintf(stderr, "WindowsDRI" msg "\n", ##__VA_ARGS__); +#else +#define TRACE(msg, ...) +#endif + +Bool +XWindowsDRIQueryExtension(dpy, event_basep, error_basep) + Display *dpy; + int *event_basep, *error_basep; +{ + XExtDisplayInfo *info = find_display(dpy); + + TRACE("QueryExtension:"); + if (XextHasExtension(info)) { + *event_basep = info->codes->first_event; + *error_basep = info->codes->first_error; + TRACE("QueryExtension: return True"); + return True; + } + else { + TRACE("QueryExtension: return False"); + return False; + } +} + +Bool +XWindowsDRIQueryVersion(dpy, majorVersion, minorVersion, patchVersion) + Display *dpy; + int *majorVersion; + int *minorVersion; + int *patchVersion; +{ + XExtDisplayInfo *info = find_display(dpy); + xWindowsDRIQueryVersionReply rep; + xWindowsDRIQueryVersionReq *req; + + TRACE("QueryVersion:"); + WindowsDRICheckExtension(dpy, info, False); + + LockDisplay(dpy); + GetReq(WindowsDRIQueryVersion, req); + req->reqType = info->codes->major_opcode; + req->driReqType = X_WindowsDRIQueryVersion; + if (!_XReply(dpy, (xReply *) & rep, 0, xFalse)) { + UnlockDisplay(dpy); + SyncHandle(); + TRACE("QueryVersion: return False"); + return False; + } + *majorVersion = rep.majorVersion; + *minorVersion = rep.minorVersion; + *patchVersion = rep.patchVersion; + UnlockDisplay(dpy); + SyncHandle(); + TRACE("QueryVersion: %d.%d.%d", *majorVersion, *minorVersion, *patchVersion); + return True; +} + +Bool +XWindowsDRIQueryDirectRenderingCapable(dpy, screen, isCapable) + Display *dpy; + int screen; + Bool *isCapable; +{ + XExtDisplayInfo *info = find_display(dpy); + xWindowsDRIQueryDirectRenderingCapableReply rep; + xWindowsDRIQueryDirectRenderingCapableReq *req; + + TRACE("QueryDirectRenderingCapable:"); + WindowsDRICheckExtension(dpy, info, False); + + LockDisplay(dpy); + GetReq(WindowsDRIQueryDirectRenderingCapable, req); + req->reqType = info->codes->major_opcode; + req->driReqType = X_WindowsDRIQueryDirectRenderingCapable; + req->screen = screen; + if (!_XReply(dpy, (xReply *) & rep, 0, xFalse)) { + UnlockDisplay(dpy); + SyncHandle(); + TRACE("QueryDirectRenderingCapable: return False"); + return False; + } + *isCapable = rep.isCapable; + UnlockDisplay(dpy); + SyncHandle(); + TRACE("QueryDirectRenderingCapable:return True"); + return True; +} + +Bool +XWindowsDRIQueryDrawable(Display *dpy, int screen, Drawable drawable, + unsigned int * type, void ** handle) +{ + XExtDisplayInfo *info = find_display(dpy); + xWindowsDRIQueryDrawableReply rep; + xWindowsDRIQueryDrawableReq *req; + + TRACE("QueryDrawable: XID %lx", drawable); + WindowsDRICheckExtension(dpy, info, False); + + LockDisplay(dpy); + GetReq(WindowsDRIQueryDrawable, req); + req->reqType = info->codes->major_opcode; + req->driReqType = X_WindowsDRIQueryDrawable; + req->screen = screen; + req->drawable = drawable; + + if (!_XReply(dpy, (xReply *) & rep, 0, xFalse)) { + UnlockDisplay(dpy); + SyncHandle(); + TRACE("QueryDrawable: return False"); + return False; + } + + *type = rep.drawable_type; + + // Note that despite being a derived type of void *, HANDLEs are defined to + // be a sign-extended 32 bit value (so they can be passed to 32-bit + // processes safely) + *handle = (void *)(intptr_t)rep.handle; + + UnlockDisplay(dpy); + SyncHandle(); + TRACE("QueryDrawable: type %d, handle %p", *type, *handle); + return True; +} + +Bool +XWindowsDRIFBConfigToPixelFormat(Display *dpy, int screen, int fbConfigID, + int *pxfi) +{ + XExtDisplayInfo *info = find_display(dpy); + xWindowsDRIFBConfigToPixelFormatReply rep; + xWindowsDRIFBConfigToPixelFormatReq *req; + + TRACE("FBConfigToPixelFormat: fbConfigID 0x%x", fbConfigID); + WindowsDRICheckExtension(dpy, info, False); + + LockDisplay(dpy); + GetReq(WindowsDRIFBConfigToPixelFormat, req); + req->reqType = info->codes->major_opcode; + req->driReqType = X_WindowsDRIFBConfigToPixelFormat; + req->screen = screen; + req->fbConfigID = fbConfigID; + + if (!_XReply(dpy, (xReply *) & rep, 0, xFalse)) { + UnlockDisplay(dpy); + SyncHandle(); + TRACE("FBConfigToPixelFormat: return False"); + return False; + } + + *pxfi = rep.pixelFormatIndex; + + UnlockDisplay(dpy); + SyncHandle(); + TRACE("FBConfigToPixelFormat: pixelformatindex %d", *pxfi); + return True; +} diff -Nru mesa-12.0.6/src/glx/windows/xwindowsdri.h mesa-17.0.7/src/glx/windows/xwindowsdri.h --- mesa-12.0.6/src/glx/windows/xwindowsdri.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/glx/windows/xwindowsdri.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,59 @@ +/* + * Copyright © 2014 Jon Turney + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef XWINDOWSDRI_H +#define XWINDOWSDRI_H + +#include +#include + +typedef struct +{ + int type; /* of event */ + unsigned long serial; /* # of last request processed by server */ + Bool send_event; /* true if this came frome a SendEvent request */ + Display *display; /* Display the event was read from */ + Window window; /* window of event */ + Time time; /* server timestamp when event happened */ + int kind; /* subtype of event */ + int arg; +} XWindowsDRINotifyEvent; + +_XFUNCPROTOBEGIN +Bool XWindowsDRIQueryExtension(Display * dpy, int *event_base, + int *error_base); + +Bool XWindowsDRIQueryVersion(Display * dpy, int *majorVersion, + int *minorVersion, int *patchVersion); + +Bool XWindowsDRIQueryDirectRenderingCapable(Display * dpy, int screen, + Bool *isCapable); + +Bool XWindowsDRIQueryDrawable(Display * dpy, int screen, Drawable drawable, + unsigned int *type, void ** handle); + +Bool XWindowsDRIFBConfigToPixelFormat(Display *dpy, int screen, int fbConfigID, + int *pxfi); +_XFUNCPROTOEND + +#endif /* XWINDOWSDRI_H */ diff -Nru mesa-12.0.6/src/gtest/include/gtest/internal/gtest-port.h mesa-17.0.7/src/gtest/include/gtest/internal/gtest-port.h --- mesa-12.0.6/src/gtest/include/gtest/internal/gtest-port.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gtest/include/gtest/internal/gtest-port.h 2017-06-01 10:37:10.000000000 +0000 @@ -176,7 +176,7 @@ // string. // // Integer types: -// TypeWithSize - maps an integer to a int type. +// TypeWithSize - maps an integer to an int type. // Int32, UInt32, Int64, UInt64, TimeInMillis // - integers of known sizes. // BiggestInt - the biggest signed integer type. diff -Nru mesa-12.0.6/src/gtest/Makefile.in mesa-17.0.7/src/gtest/Makefile.in --- mesa-12.0.6/src/gtest/Makefile.in 2017-01-24 01:41:53.000000000 +0000 +++ mesa-17.0.7/src/gtest/Makefile.in 2017-06-01 10:37:23.000000000 +0000 @@ -181,6 +181,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -195,6 +197,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -224,10 +227,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -277,11 +281,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -321,8 +322,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -359,8 +358,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -369,7 +366,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -377,13 +373,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -412,6 +409,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ diff -Nru mesa-12.0.6/src/gtest/src/gtest.cc mesa-17.0.7/src/gtest/src/gtest.cc --- mesa-12.0.6/src/gtest/src/gtest.cc 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/gtest/src/gtest.cc 2017-06-01 10:37:10.000000000 +0000 @@ -1461,7 +1461,7 @@ return str; } -// The following two functions only make sense if the the system +// The following two functions only make sense if the system // uses UTF-16 for wide string encoding. All supported systems // with 16 bit wchar_t (Windows, Cygwin, Symbian OS) do use UTF-16. diff -Nru mesa-12.0.6/src/hgl/.editorconfig mesa-17.0.7/src/hgl/.editorconfig --- mesa-12.0.6/src/hgl/.editorconfig 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/hgl/.editorconfig 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,2 @@ +[*.{cpp,h}] +indent_style = tab diff -Nru mesa-12.0.6/src/hgl/GLDispatcher.cpp mesa-17.0.7/src/hgl/GLDispatcher.cpp --- mesa-12.0.6/src/hgl/GLDispatcher.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/hgl/GLDispatcher.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -58,14 +58,6 @@ status_t -BGLDispatcher::CheckTable(const struct _glapi_table* table) -{ - _glapi_check_table(table ? table : _glapi_get_dispatch()); - return B_OK; -} - - -status_t BGLDispatcher::SetTable(struct _glapi_table* table) { _glapi_set_dispatch(table); diff -Nru mesa-12.0.6/src/hgl/GLDispatcher.h mesa-17.0.7/src/hgl/GLDispatcher.h --- mesa-12.0.6/src/hgl/GLDispatcher.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/hgl/GLDispatcher.h 2017-06-01 10:37:10.000000000 +0000 @@ -34,8 +34,6 @@ void* CurrentContext(); struct _glapi_table* Table(); - status_t CheckTable( - const struct _glapi_table* dispatch = NULL); status_t SetTable(struct _glapi_table* dispatch); uint32 TableSize(); diff -Nru mesa-12.0.6/src/intel/blorp/blorp_blit.c mesa-17.0.7/src/intel/blorp/blorp_blit.c --- mesa-12.0.6/src/intel/blorp/blorp_blit.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/blorp/blorp_blit.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,2446 @@ +/* + * Copyright © 2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "compiler/nir/nir_builder.h" + +#include "blorp_priv.h" +#include "brw_meta_util.h" + +/* header-only include needed for _mesa_unorm_to_float and friends. */ +#include "mesa/main/format_utils.h" + +#define FILE_DEBUG_FLAG DEBUG_BLORP + +static const bool split_blorp_blit_debug = false; + +/** + * Enum to specify the order of arguments in a sampler message + */ +enum sampler_message_arg +{ + SAMPLER_MESSAGE_ARG_U_FLOAT, + SAMPLER_MESSAGE_ARG_V_FLOAT, + SAMPLER_MESSAGE_ARG_U_INT, + SAMPLER_MESSAGE_ARG_V_INT, + SAMPLER_MESSAGE_ARG_R_INT, + SAMPLER_MESSAGE_ARG_SI_INT, + SAMPLER_MESSAGE_ARG_MCS_INT, + SAMPLER_MESSAGE_ARG_ZERO_INT, +}; + +struct brw_blorp_blit_vars { + /* Input values from brw_blorp_wm_inputs */ + nir_variable *v_discard_rect; + nir_variable *v_rect_grid; + nir_variable *v_coord_transform; + nir_variable *v_src_z; + nir_variable *v_src_offset; + nir_variable *v_dst_offset; + + /* gl_FragCoord */ + nir_variable *frag_coord; + + /* gl_FragColor */ + nir_variable *color_out; +}; + +static void +brw_blorp_blit_vars_init(nir_builder *b, struct brw_blorp_blit_vars *v, + const struct brw_blorp_blit_prog_key *key) +{ + /* Blended and scaled blits never use pixel discard. */ + assert(!key->use_kill || !(key->blend && key->blit_scaled)); + +#define LOAD_INPUT(name, type)\ + v->v_##name = BLORP_CREATE_NIR_INPUT(b->shader, name, type); + + LOAD_INPUT(discard_rect, glsl_vec4_type()) + LOAD_INPUT(rect_grid, glsl_vec4_type()) + LOAD_INPUT(coord_transform, glsl_vec4_type()) + LOAD_INPUT(src_z, glsl_uint_type()) + LOAD_INPUT(src_offset, glsl_vector_type(GLSL_TYPE_UINT, 2)) + LOAD_INPUT(dst_offset, glsl_vector_type(GLSL_TYPE_UINT, 2)) + +#undef LOAD_INPUT + + v->frag_coord = nir_variable_create(b->shader, nir_var_shader_in, + glsl_vec4_type(), "gl_FragCoord"); + v->frag_coord->data.location = VARYING_SLOT_POS; + v->frag_coord->data.origin_upper_left = true; + + v->color_out = nir_variable_create(b->shader, nir_var_shader_out, + glsl_vec4_type(), "gl_FragColor"); + v->color_out->data.location = FRAG_RESULT_COLOR; +} + +static nir_ssa_def * +blorp_blit_get_frag_coords(nir_builder *b, + const struct brw_blorp_blit_prog_key *key, + struct brw_blorp_blit_vars *v) +{ + nir_ssa_def *coord = nir_f2i(b, nir_load_var(b, v->frag_coord)); + + /* Account for destination surface intratile offset + * + * Transformation parameters giving translation from destination to source + * coordinates don't take into account possible intra-tile destination + * offset. Therefore it has to be first subtracted from the incoming + * coordinates. Vertices are set up based on coordinates containing the + * intra-tile offset. + */ + if (key->need_dst_offset) + coord = nir_isub(b, coord, nir_load_var(b, v->v_dst_offset)); + + if (key->persample_msaa_dispatch) { + return nir_vec3(b, nir_channel(b, coord, 0), nir_channel(b, coord, 1), + nir_load_sample_id(b)); + } else { + return nir_vec2(b, nir_channel(b, coord, 0), nir_channel(b, coord, 1)); + } +} + +/** + * Emit code to translate from destination (X, Y) coordinates to source (X, Y) + * coordinates. + */ +static nir_ssa_def * +blorp_blit_apply_transform(nir_builder *b, nir_ssa_def *src_pos, + struct brw_blorp_blit_vars *v) +{ + nir_ssa_def *coord_transform = nir_load_var(b, v->v_coord_transform); + + nir_ssa_def *offset = nir_vec2(b, nir_channel(b, coord_transform, 1), + nir_channel(b, coord_transform, 3)); + nir_ssa_def *mul = nir_vec2(b, nir_channel(b, coord_transform, 0), + nir_channel(b, coord_transform, 2)); + + return nir_ffma(b, src_pos, mul, offset); +} + +static inline void +blorp_nir_discard_if_outside_rect(nir_builder *b, nir_ssa_def *pos, + struct brw_blorp_blit_vars *v) +{ + nir_ssa_def *c0, *c1, *c2, *c3; + nir_ssa_def *discard_rect = nir_load_var(b, v->v_discard_rect); + nir_ssa_def *dst_x0 = nir_channel(b, discard_rect, 0); + nir_ssa_def *dst_x1 = nir_channel(b, discard_rect, 1); + nir_ssa_def *dst_y0 = nir_channel(b, discard_rect, 2); + nir_ssa_def *dst_y1 = nir_channel(b, discard_rect, 3); + + c0 = nir_ult(b, nir_channel(b, pos, 0), dst_x0); + c1 = nir_uge(b, nir_channel(b, pos, 0), dst_x1); + c2 = nir_ult(b, nir_channel(b, pos, 1), dst_y0); + c3 = nir_uge(b, nir_channel(b, pos, 1), dst_y1); + + nir_ssa_def *oob = nir_ior(b, nir_ior(b, c0, c1), nir_ior(b, c2, c3)); + + nir_intrinsic_instr *discard = + nir_intrinsic_instr_create(b->shader, nir_intrinsic_discard_if); + discard->src[0] = nir_src_for_ssa(oob); + nir_builder_instr_insert(b, &discard->instr); +} + +static nir_tex_instr * +blorp_create_nir_tex_instr(nir_builder *b, struct brw_blorp_blit_vars *v, + nir_texop op, nir_ssa_def *pos, unsigned num_srcs, + nir_alu_type dst_type) +{ + nir_tex_instr *tex = nir_tex_instr_create(b->shader, num_srcs); + + tex->op = op; + + tex->dest_type = dst_type; + tex->is_array = false; + tex->is_shadow = false; + + /* Blorp only has one texture and it's bound at unit 0 */ + tex->texture = NULL; + tex->sampler = NULL; + tex->texture_index = 0; + tex->sampler_index = 0; + + /* To properly handle 3-D and 2-D array textures, we pull the Z component + * from an input. TODO: This is a bit magic; we should probably make this + * more explicit in the future. + */ + assert(pos->num_components >= 2); + pos = nir_vec3(b, nir_channel(b, pos, 0), nir_channel(b, pos, 1), + nir_load_var(b, v->v_src_z)); + + tex->src[0].src_type = nir_tex_src_coord; + tex->src[0].src = nir_src_for_ssa(pos); + tex->coord_components = 3; + + nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, NULL); + + return tex; +} + +static nir_ssa_def * +blorp_nir_tex(nir_builder *b, struct brw_blorp_blit_vars *v, + nir_ssa_def *pos, nir_alu_type dst_type) +{ + nir_tex_instr *tex = + blorp_create_nir_tex_instr(b, v, nir_texop_tex, pos, 2, dst_type); + + assert(pos->num_components == 2); + tex->sampler_dim = GLSL_SAMPLER_DIM_2D; + tex->src[1].src_type = nir_tex_src_lod; + tex->src[1].src = nir_src_for_ssa(nir_imm_int(b, 0)); + + nir_builder_instr_insert(b, &tex->instr); + + return &tex->dest.ssa; +} + +static nir_ssa_def * +blorp_nir_txf(nir_builder *b, struct brw_blorp_blit_vars *v, + nir_ssa_def *pos, nir_alu_type dst_type) +{ + nir_tex_instr *tex = + blorp_create_nir_tex_instr(b, v, nir_texop_txf, pos, 2, dst_type); + + tex->sampler_dim = GLSL_SAMPLER_DIM_3D; + tex->src[1].src_type = nir_tex_src_lod; + tex->src[1].src = nir_src_for_ssa(nir_imm_int(b, 0)); + + nir_builder_instr_insert(b, &tex->instr); + + return &tex->dest.ssa; +} + +static nir_ssa_def * +blorp_nir_txf_ms(nir_builder *b, struct brw_blorp_blit_vars *v, + nir_ssa_def *pos, nir_ssa_def *mcs, nir_alu_type dst_type) +{ + nir_tex_instr *tex = + blorp_create_nir_tex_instr(b, v, nir_texop_txf_ms, pos, + mcs != NULL ? 3 : 2, dst_type); + + tex->sampler_dim = GLSL_SAMPLER_DIM_MS; + + tex->src[1].src_type = nir_tex_src_ms_index; + if (pos->num_components == 2) { + tex->src[1].src = nir_src_for_ssa(nir_imm_int(b, 0)); + } else { + assert(pos->num_components == 3); + tex->src[1].src = nir_src_for_ssa(nir_channel(b, pos, 2)); + } + + if (mcs) { + tex->src[2].src_type = nir_tex_src_ms_mcs; + tex->src[2].src = nir_src_for_ssa(mcs); + } + + nir_builder_instr_insert(b, &tex->instr); + + return &tex->dest.ssa; +} + +static nir_ssa_def * +blorp_nir_txf_ms_mcs(nir_builder *b, struct brw_blorp_blit_vars *v, nir_ssa_def *pos) +{ + nir_tex_instr *tex = + blorp_create_nir_tex_instr(b, v, nir_texop_txf_ms_mcs, + pos, 1, nir_type_int); + + tex->sampler_dim = GLSL_SAMPLER_DIM_MS; + + nir_builder_instr_insert(b, &tex->instr); + + return &tex->dest.ssa; +} + +static nir_ssa_def * +nir_mask_shift_or(struct nir_builder *b, nir_ssa_def *dst, nir_ssa_def *src, + uint32_t src_mask, int src_left_shift) +{ + nir_ssa_def *masked = nir_iand(b, src, nir_imm_int(b, src_mask)); + + nir_ssa_def *shifted; + if (src_left_shift > 0) { + shifted = nir_ishl(b, masked, nir_imm_int(b, src_left_shift)); + } else if (src_left_shift < 0) { + shifted = nir_ushr(b, masked, nir_imm_int(b, -src_left_shift)); + } else { + assert(src_left_shift == 0); + shifted = masked; + } + + return nir_ior(b, dst, shifted); +} + +/** + * Emit code to compensate for the difference between Y and W tiling. + * + * This code modifies the X and Y coordinates according to the formula: + * + * (X', Y', S') = detile(W-MAJOR, tile(Y-MAJOR, X, Y, S)) + * + * (See brw_blorp_build_nir_shader). + */ +static inline nir_ssa_def * +blorp_nir_retile_y_to_w(nir_builder *b, nir_ssa_def *pos) +{ + assert(pos->num_components == 2); + nir_ssa_def *x_Y = nir_channel(b, pos, 0); + nir_ssa_def *y_Y = nir_channel(b, pos, 1); + + /* Given X and Y coordinates that describe an address using Y tiling, + * translate to the X and Y coordinates that describe the same address + * using W tiling. + * + * If we break down the low order bits of X and Y, using a + * single letter to represent each low-order bit: + * + * X = A << 7 | 0bBCDEFGH + * Y = J << 5 | 0bKLMNP (1) + * + * Then we can apply the Y tiling formula to see the memory offset being + * addressed: + * + * offset = (J * tile_pitch + A) << 12 | 0bBCDKLMNPEFGH (2) + * + * If we apply the W detiling formula to this memory location, that the + * corresponding X' and Y' coordinates are: + * + * X' = A << 6 | 0bBCDPFH (3) + * Y' = J << 6 | 0bKLMNEG + * + * Combining (1) and (3), we see that to transform (X, Y) to (X', Y'), + * we need to make the following computation: + * + * X' = (X & ~0b1011) >> 1 | (Y & 0b1) << 2 | X & 0b1 (4) + * Y' = (Y & ~0b1) << 1 | (X & 0b1000) >> 2 | (X & 0b10) >> 1 + */ + nir_ssa_def *x_W = nir_imm_int(b, 0); + x_W = nir_mask_shift_or(b, x_W, x_Y, 0xfffffff4, -1); + x_W = nir_mask_shift_or(b, x_W, y_Y, 0x1, 2); + x_W = nir_mask_shift_or(b, x_W, x_Y, 0x1, 0); + + nir_ssa_def *y_W = nir_imm_int(b, 0); + y_W = nir_mask_shift_or(b, y_W, y_Y, 0xfffffffe, 1); + y_W = nir_mask_shift_or(b, y_W, x_Y, 0x8, -2); + y_W = nir_mask_shift_or(b, y_W, x_Y, 0x2, -1); + + return nir_vec2(b, x_W, y_W); +} + +/** + * Emit code to compensate for the difference between Y and W tiling. + * + * This code modifies the X and Y coordinates according to the formula: + * + * (X', Y', S') = detile(Y-MAJOR, tile(W-MAJOR, X, Y, S)) + * + * (See brw_blorp_build_nir_shader). + */ +static inline nir_ssa_def * +blorp_nir_retile_w_to_y(nir_builder *b, nir_ssa_def *pos) +{ + assert(pos->num_components == 2); + nir_ssa_def *x_W = nir_channel(b, pos, 0); + nir_ssa_def *y_W = nir_channel(b, pos, 1); + + /* Applying the same logic as above, but in reverse, we obtain the + * formulas: + * + * X' = (X & ~0b101) << 1 | (Y & 0b10) << 2 | (Y & 0b1) << 1 | X & 0b1 + * Y' = (Y & ~0b11) >> 1 | (X & 0b100) >> 2 + */ + nir_ssa_def *x_Y = nir_imm_int(b, 0); + x_Y = nir_mask_shift_or(b, x_Y, x_W, 0xfffffffa, 1); + x_Y = nir_mask_shift_or(b, x_Y, y_W, 0x2, 2); + x_Y = nir_mask_shift_or(b, x_Y, y_W, 0x1, 1); + x_Y = nir_mask_shift_or(b, x_Y, x_W, 0x1, 0); + + nir_ssa_def *y_Y = nir_imm_int(b, 0); + y_Y = nir_mask_shift_or(b, y_Y, y_W, 0xfffffffc, -1); + y_Y = nir_mask_shift_or(b, y_Y, x_W, 0x4, -2); + + return nir_vec2(b, x_Y, y_Y); +} + +/** + * Emit code to compensate for the difference between MSAA and non-MSAA + * surfaces. + * + * This code modifies the X and Y coordinates according to the formula: + * + * (X', Y', S') = encode_msaa(num_samples, IMS, X, Y, S) + * + * (See brw_blorp_blit_program). + */ +static inline nir_ssa_def * +blorp_nir_encode_msaa(nir_builder *b, nir_ssa_def *pos, + unsigned num_samples, enum isl_msaa_layout layout) +{ + assert(pos->num_components == 2 || pos->num_components == 3); + + switch (layout) { + case ISL_MSAA_LAYOUT_NONE: + assert(pos->num_components == 2); + return pos; + case ISL_MSAA_LAYOUT_ARRAY: + /* No translation needed */ + return pos; + case ISL_MSAA_LAYOUT_INTERLEAVED: { + nir_ssa_def *x_in = nir_channel(b, pos, 0); + nir_ssa_def *y_in = nir_channel(b, pos, 1); + nir_ssa_def *s_in = pos->num_components == 2 ? nir_imm_int(b, 0) : + nir_channel(b, pos, 2); + + nir_ssa_def *x_out = nir_imm_int(b, 0); + nir_ssa_def *y_out = nir_imm_int(b, 0); + switch (num_samples) { + case 2: + case 4: + /* encode_msaa(2, IMS, X, Y, S) = (X', Y', 0) + * where X' = (X & ~0b1) << 1 | (S & 0b1) << 1 | (X & 0b1) + * Y' = Y + * + * encode_msaa(4, IMS, X, Y, S) = (X', Y', 0) + * where X' = (X & ~0b1) << 1 | (S & 0b1) << 1 | (X & 0b1) + * Y' = (Y & ~0b1) << 1 | (S & 0b10) | (Y & 0b1) + */ + x_out = nir_mask_shift_or(b, x_out, x_in, 0xfffffffe, 1); + x_out = nir_mask_shift_or(b, x_out, s_in, 0x1, 1); + x_out = nir_mask_shift_or(b, x_out, x_in, 0x1, 0); + if (num_samples == 2) { + y_out = y_in; + } else { + y_out = nir_mask_shift_or(b, y_out, y_in, 0xfffffffe, 1); + y_out = nir_mask_shift_or(b, y_out, s_in, 0x2, 0); + y_out = nir_mask_shift_or(b, y_out, y_in, 0x1, 0); + } + break; + + case 8: + /* encode_msaa(8, IMS, X, Y, S) = (X', Y', 0) + * where X' = (X & ~0b1) << 2 | (S & 0b100) | (S & 0b1) << 1 + * | (X & 0b1) + * Y' = (Y & ~0b1) << 1 | (S & 0b10) | (Y & 0b1) + */ + x_out = nir_mask_shift_or(b, x_out, x_in, 0xfffffffe, 2); + x_out = nir_mask_shift_or(b, x_out, s_in, 0x4, 0); + x_out = nir_mask_shift_or(b, x_out, s_in, 0x1, 1); + x_out = nir_mask_shift_or(b, x_out, x_in, 0x1, 0); + y_out = nir_mask_shift_or(b, y_out, y_in, 0xfffffffe, 1); + y_out = nir_mask_shift_or(b, y_out, s_in, 0x2, 0); + y_out = nir_mask_shift_or(b, y_out, y_in, 0x1, 0); + break; + + case 16: + /* encode_msaa(16, IMS, X, Y, S) = (X', Y', 0) + * where X' = (X & ~0b1) << 2 | (S & 0b100) | (S & 0b1) << 1 + * | (X & 0b1) + * Y' = (Y & ~0b1) << 2 | (S & 0b1000) >> 1 (S & 0b10) + * | (Y & 0b1) + */ + x_out = nir_mask_shift_or(b, x_out, x_in, 0xfffffffe, 2); + x_out = nir_mask_shift_or(b, x_out, s_in, 0x4, 0); + x_out = nir_mask_shift_or(b, x_out, s_in, 0x1, 1); + x_out = nir_mask_shift_or(b, x_out, x_in, 0x1, 0); + y_out = nir_mask_shift_or(b, y_out, y_in, 0xfffffffe, 2); + y_out = nir_mask_shift_or(b, y_out, s_in, 0x8, -1); + y_out = nir_mask_shift_or(b, y_out, s_in, 0x2, 0); + y_out = nir_mask_shift_or(b, y_out, y_in, 0x1, 0); + break; + + default: + unreachable("Invalid number of samples for IMS layout"); + } + + return nir_vec2(b, x_out, y_out); + } + + default: + unreachable("Invalid MSAA layout"); + } +} + +/** + * Emit code to compensate for the difference between MSAA and non-MSAA + * surfaces. + * + * This code modifies the X and Y coordinates according to the formula: + * + * (X', Y', S) = decode_msaa(num_samples, IMS, X, Y, S) + * + * (See brw_blorp_blit_program). + */ +static inline nir_ssa_def * +blorp_nir_decode_msaa(nir_builder *b, nir_ssa_def *pos, + unsigned num_samples, enum isl_msaa_layout layout) +{ + assert(pos->num_components == 2 || pos->num_components == 3); + + switch (layout) { + case ISL_MSAA_LAYOUT_NONE: + /* No translation necessary, and S should already be zero. */ + assert(pos->num_components == 2); + return pos; + case ISL_MSAA_LAYOUT_ARRAY: + /* No translation necessary. */ + return pos; + case ISL_MSAA_LAYOUT_INTERLEAVED: { + assert(pos->num_components == 2); + + nir_ssa_def *x_in = nir_channel(b, pos, 0); + nir_ssa_def *y_in = nir_channel(b, pos, 1); + + nir_ssa_def *x_out = nir_imm_int(b, 0); + nir_ssa_def *y_out = nir_imm_int(b, 0); + nir_ssa_def *s_out = nir_imm_int(b, 0); + switch (num_samples) { + case 2: + case 4: + /* decode_msaa(2, IMS, X, Y, 0) = (X', Y', S) + * where X' = (X & ~0b11) >> 1 | (X & 0b1) + * S = (X & 0b10) >> 1 + * + * decode_msaa(4, IMS, X, Y, 0) = (X', Y', S) + * where X' = (X & ~0b11) >> 1 | (X & 0b1) + * Y' = (Y & ~0b11) >> 1 | (Y & 0b1) + * S = (Y & 0b10) | (X & 0b10) >> 1 + */ + x_out = nir_mask_shift_or(b, x_out, x_in, 0xfffffffc, -1); + x_out = nir_mask_shift_or(b, x_out, x_in, 0x1, 0); + if (num_samples == 2) { + y_out = y_in; + s_out = nir_mask_shift_or(b, s_out, x_in, 0x2, -1); + } else { + y_out = nir_mask_shift_or(b, y_out, y_in, 0xfffffffc, -1); + y_out = nir_mask_shift_or(b, y_out, y_in, 0x1, 0); + s_out = nir_mask_shift_or(b, s_out, x_in, 0x2, -1); + s_out = nir_mask_shift_or(b, s_out, y_in, 0x2, 0); + } + break; + + case 8: + /* decode_msaa(8, IMS, X, Y, 0) = (X', Y', S) + * where X' = (X & ~0b111) >> 2 | (X & 0b1) + * Y' = (Y & ~0b11) >> 1 | (Y & 0b1) + * S = (X & 0b100) | (Y & 0b10) | (X & 0b10) >> 1 + */ + x_out = nir_mask_shift_or(b, x_out, x_in, 0xfffffff8, -2); + x_out = nir_mask_shift_or(b, x_out, x_in, 0x1, 0); + y_out = nir_mask_shift_or(b, y_out, y_in, 0xfffffffc, -1); + y_out = nir_mask_shift_or(b, y_out, y_in, 0x1, 0); + s_out = nir_mask_shift_or(b, s_out, x_in, 0x4, 0); + s_out = nir_mask_shift_or(b, s_out, y_in, 0x2, 0); + s_out = nir_mask_shift_or(b, s_out, x_in, 0x2, -1); + break; + + case 16: + /* decode_msaa(16, IMS, X, Y, 0) = (X', Y', S) + * where X' = (X & ~0b111) >> 2 | (X & 0b1) + * Y' = (Y & ~0b111) >> 2 | (Y & 0b1) + * S = (Y & 0b100) << 1 | (X & 0b100) | + * (Y & 0b10) | (X & 0b10) >> 1 + */ + x_out = nir_mask_shift_or(b, x_out, x_in, 0xfffffff8, -2); + x_out = nir_mask_shift_or(b, x_out, x_in, 0x1, 0); + y_out = nir_mask_shift_or(b, y_out, y_in, 0xfffffff8, -2); + y_out = nir_mask_shift_or(b, y_out, y_in, 0x1, 0); + s_out = nir_mask_shift_or(b, s_out, y_in, 0x4, 1); + s_out = nir_mask_shift_or(b, s_out, x_in, 0x4, 0); + s_out = nir_mask_shift_or(b, s_out, y_in, 0x2, 0); + s_out = nir_mask_shift_or(b, s_out, x_in, 0x2, -1); + break; + + default: + unreachable("Invalid number of samples for IMS layout"); + } + + return nir_vec3(b, x_out, y_out, s_out); + } + + default: + unreachable("Invalid MSAA layout"); + } +} + +/** + * Count the number of trailing 1 bits in the given value. For example: + * + * count_trailing_one_bits(0) == 0 + * count_trailing_one_bits(7) == 3 + * count_trailing_one_bits(11) == 2 + */ +static inline int count_trailing_one_bits(unsigned value) +{ +#ifdef HAVE___BUILTIN_CTZ + return __builtin_ctz(~value); +#else + return _mesa_bitcount(value & ~(value + 1)); +#endif +} + +static nir_ssa_def * +blorp_nir_manual_blend_average(nir_builder *b, struct brw_blorp_blit_vars *v, + nir_ssa_def *pos, unsigned tex_samples, + enum isl_aux_usage tex_aux_usage, + nir_alu_type dst_type) +{ + /* If non-null, this is the outer-most if statement */ + nir_if *outer_if = NULL; + + nir_variable *color = + nir_local_variable_create(b->impl, glsl_vec4_type(), "color"); + + nir_ssa_def *mcs = NULL; + if (tex_aux_usage == ISL_AUX_USAGE_MCS) + mcs = blorp_nir_txf_ms_mcs(b, v, pos); + + /* We add together samples using a binary tree structure, e.g. for 4x MSAA: + * + * result = ((sample[0] + sample[1]) + (sample[2] + sample[3])) / 4 + * + * This ensures that when all samples have the same value, no numerical + * precision is lost, since each addition operation always adds two equal + * values, and summing two equal floating point values does not lose + * precision. + * + * We perform this computation by treating the texture_data array as a + * stack and performing the following operations: + * + * - push sample 0 onto stack + * - push sample 1 onto stack + * - add top two stack entries + * - push sample 2 onto stack + * - push sample 3 onto stack + * - add top two stack entries + * - add top two stack entries + * - divide top stack entry by 4 + * + * Note that after pushing sample i onto the stack, the number of add + * operations we do is equal to the number of trailing 1 bits in i. This + * works provided the total number of samples is a power of two, which it + * always is for i965. + * + * For integer formats, we replace the add operations with average + * operations and skip the final division. + */ + nir_ssa_def *texture_data[5]; + unsigned stack_depth = 0; + for (unsigned i = 0; i < tex_samples; ++i) { + assert(stack_depth == _mesa_bitcount(i)); /* Loop invariant */ + + /* Push sample i onto the stack */ + assert(stack_depth < ARRAY_SIZE(texture_data)); + + nir_ssa_def *ms_pos = nir_vec3(b, nir_channel(b, pos, 0), + nir_channel(b, pos, 1), + nir_imm_int(b, i)); + texture_data[stack_depth++] = blorp_nir_txf_ms(b, v, ms_pos, mcs, dst_type); + + if (i == 0 && tex_aux_usage == ISL_AUX_USAGE_MCS) { + /* The Ivy Bridge PRM, Vol4 Part1 p27 (Multisample Control Surface) + * suggests an optimization: + * + * "A simple optimization with probable large return in + * performance is to compare the MCS value to zero (indicating + * all samples are on sample slice 0), and sample only from + * sample slice 0 using ld2dss if MCS is zero." + * + * Note that in the case where the MCS value is zero, sampling from + * sample slice 0 using ld2dss and sampling from sample 0 using + * ld2dms are equivalent (since all samples are on sample slice 0). + * Since we have already sampled from sample 0, all we need to do is + * skip the remaining fetches and averaging if MCS is zero. + */ + nir_ssa_def *mcs_zero = + nir_ieq(b, nir_channel(b, mcs, 0), nir_imm_int(b, 0)); + if (tex_samples == 16) { + mcs_zero = nir_iand(b, mcs_zero, + nir_ieq(b, nir_channel(b, mcs, 1), nir_imm_int(b, 0))); + } + + nir_if *if_stmt = nir_if_create(b->shader); + if_stmt->condition = nir_src_for_ssa(mcs_zero); + nir_cf_node_insert(b->cursor, &if_stmt->cf_node); + + b->cursor = nir_after_cf_list(&if_stmt->then_list); + nir_store_var(b, color, texture_data[0], 0xf); + + b->cursor = nir_after_cf_list(&if_stmt->else_list); + outer_if = if_stmt; + } + + for (int j = 0; j < count_trailing_one_bits(i); j++) { + assert(stack_depth >= 2); + --stack_depth; + + assert(dst_type == nir_type_float); + texture_data[stack_depth - 1] = + nir_fadd(b, texture_data[stack_depth - 1], + texture_data[stack_depth]); + } + } + + /* We should have just 1 sample on the stack now. */ + assert(stack_depth == 1); + + texture_data[0] = nir_fmul(b, texture_data[0], + nir_imm_float(b, 1.0 / tex_samples)); + + nir_store_var(b, color, texture_data[0], 0xf); + + if (outer_if) + b->cursor = nir_after_cf_node(&outer_if->cf_node); + + return nir_load_var(b, color); +} + +static inline nir_ssa_def * +nir_imm_vec2(nir_builder *build, float x, float y) +{ + nir_const_value v; + + memset(&v, 0, sizeof(v)); + v.f32[0] = x; + v.f32[1] = y; + + return nir_build_imm(build, 4, 32, v); +} + +static nir_ssa_def * +blorp_nir_manual_blend_bilinear(nir_builder *b, nir_ssa_def *pos, + unsigned tex_samples, + const struct brw_blorp_blit_prog_key *key, + struct brw_blorp_blit_vars *v) +{ + nir_ssa_def *pos_xy = nir_channels(b, pos, 0x3); + nir_ssa_def *rect_grid = nir_load_var(b, v->v_rect_grid); + nir_ssa_def *scale = nir_imm_vec2(b, key->x_scale, key->y_scale); + + /* Translate coordinates to lay out the samples in a rectangular grid + * roughly corresponding to sample locations. + */ + pos_xy = nir_fmul(b, pos_xy, scale); + /* Adjust coordinates so that integers represent pixel centers rather + * than pixel edges. + */ + pos_xy = nir_fadd(b, pos_xy, nir_imm_float(b, -0.5)); + /* Clamp the X, Y texture coordinates to properly handle the sampling of + * texels on texture edges. + */ + pos_xy = nir_fmin(b, nir_fmax(b, pos_xy, nir_imm_float(b, 0.0)), + nir_vec2(b, nir_channel(b, rect_grid, 0), + nir_channel(b, rect_grid, 1))); + + /* Store the fractional parts to be used as bilinear interpolation + * coefficients. + */ + nir_ssa_def *frac_xy = nir_ffract(b, pos_xy); + /* Round the float coordinates down to nearest integer */ + pos_xy = nir_fdiv(b, nir_ftrunc(b, pos_xy), scale); + + nir_ssa_def *tex_data[4]; + for (unsigned i = 0; i < 4; ++i) { + float sample_off_x = (float)(i & 0x1) / key->x_scale; + float sample_off_y = (float)((i >> 1) & 0x1) / key->y_scale; + nir_ssa_def *sample_off = nir_imm_vec2(b, sample_off_x, sample_off_y); + + nir_ssa_def *sample_coords = nir_fadd(b, pos_xy, sample_off); + nir_ssa_def *sample_coords_int = nir_f2i(b, sample_coords); + + /* The MCS value we fetch has to match up with the pixel that we're + * sampling from. Since we sample from different pixels in each + * iteration of this "for" loop, the call to mcs_fetch() should be + * here inside the loop after computing the pixel coordinates. + */ + nir_ssa_def *mcs = NULL; + if (key->tex_aux_usage == ISL_AUX_USAGE_MCS) + mcs = blorp_nir_txf_ms_mcs(b, v, sample_coords_int); + + /* Compute sample index and map the sample index to a sample number. + * Sample index layout shows the numbering of slots in a rectangular + * grid of samples with in a pixel. Sample number layout shows the + * rectangular grid of samples roughly corresponding to the real sample + * locations with in a pixel. + * In case of 4x MSAA, layout of sample indices matches the layout of + * sample numbers: + * --------- + * | 0 | 1 | + * --------- + * | 2 | 3 | + * --------- + * + * In case of 8x MSAA the two layouts don't match. + * sample index layout : --------- sample number layout : --------- + * | 0 | 1 | | 3 | 7 | + * --------- --------- + * | 2 | 3 | | 5 | 0 | + * --------- --------- + * | 4 | 5 | | 1 | 2 | + * --------- --------- + * | 6 | 7 | | 4 | 6 | + * --------- --------- + * + * Fortunately, this can be done fairly easily as: + * S' = (0x17306425 >> (S * 4)) & 0xf + * + * In the case of 16x MSAA the two layouts don't match. + * Sample index layout: Sample number layout: + * --------------------- --------------------- + * | 0 | 1 | 2 | 3 | | 15 | 10 | 9 | 7 | + * --------------------- --------------------- + * | 4 | 5 | 6 | 7 | | 4 | 1 | 3 | 13 | + * --------------------- --------------------- + * | 8 | 9 | 10 | 11 | | 12 | 2 | 0 | 6 | + * --------------------- --------------------- + * | 12 | 13 | 14 | 15 | | 11 | 8 | 5 | 14 | + * --------------------- --------------------- + * + * This is equivalent to + * S' = (0xe58b602cd31479af >> (S * 4)) & 0xf + */ + nir_ssa_def *frac = nir_ffract(b, sample_coords); + nir_ssa_def *sample = + nir_fdot2(b, frac, nir_imm_vec2(b, key->x_scale, + key->x_scale * key->y_scale)); + sample = nir_f2i(b, sample); + + if (tex_samples == 8) { + sample = nir_iand(b, nir_ishr(b, nir_imm_int(b, 0x64210573), + nir_ishl(b, sample, nir_imm_int(b, 2))), + nir_imm_int(b, 0xf)); + } else if (tex_samples == 16) { + nir_ssa_def *sample_low = + nir_iand(b, nir_ishr(b, nir_imm_int(b, 0xd31479af), + nir_ishl(b, sample, nir_imm_int(b, 2))), + nir_imm_int(b, 0xf)); + nir_ssa_def *sample_high = + nir_iand(b, nir_ishr(b, nir_imm_int(b, 0xe58b602c), + nir_ishl(b, nir_iadd(b, sample, + nir_imm_int(b, -8)), + nir_imm_int(b, 2))), + nir_imm_int(b, 0xf)); + + sample = nir_bcsel(b, nir_ilt(b, sample, nir_imm_int(b, 8)), + sample_low, sample_high); + } + nir_ssa_def *pos_ms = nir_vec3(b, nir_channel(b, sample_coords_int, 0), + nir_channel(b, sample_coords_int, 1), + sample); + tex_data[i] = blorp_nir_txf_ms(b, v, pos_ms, mcs, key->texture_data_type); + } + + nir_ssa_def *frac_x = nir_channel(b, frac_xy, 0); + nir_ssa_def *frac_y = nir_channel(b, frac_xy, 1); + return nir_flrp(b, nir_flrp(b, tex_data[0], tex_data[1], frac_x), + nir_flrp(b, tex_data[2], tex_data[3], frac_x), + frac_y); +} + +/** Perform a color bit-cast operation + * + * For copy operations involving CCS, we may need to use different formats for + * the source and destination surfaces. The two formats must both be UINT + * formats and must have the same size but may have different bit layouts. + * For instance, we may be copying from R8G8B8A8_UINT to R32_UINT or R32_UINT + * to R16G16_UINT. This function generates code to shuffle bits around to get + * us from one to the other. + */ +static nir_ssa_def * +bit_cast_color(struct nir_builder *b, nir_ssa_def *color, + const struct brw_blorp_blit_prog_key *key) +{ + assert(key->texture_data_type == nir_type_uint); + + if (key->dst_bpc > key->src_bpc) { + nir_ssa_def *u = nir_ssa_undef(b, 1, 32); + nir_ssa_def *dst_chan[2] = { u, u }; + unsigned shift = 0; + unsigned dst_idx = 0; + for (unsigned i = 0; i < 4; i++) { + nir_ssa_def *shifted = nir_ishl(b, nir_channel(b, color, i), + nir_imm_int(b, shift)); + if (shift == 0) { + dst_chan[dst_idx] = shifted; + } else { + dst_chan[dst_idx] = nir_ior(b, dst_chan[dst_idx], shifted); + } + + shift += key->src_bpc; + if (shift >= key->dst_bpc) { + dst_idx++; + shift = 0; + } + } + + return nir_vec4(b, dst_chan[0], dst_chan[1], u, u); + } else { + assert(key->dst_bpc < key->src_bpc); + + nir_ssa_def *mask = nir_imm_int(b, ~0u >> (32 - key->dst_bpc)); + + nir_ssa_def *dst_chan[4]; + unsigned src_idx = 0; + unsigned shift = 0; + for (unsigned i = 0; i < 4; i++) { + dst_chan[i] = nir_iand(b, nir_ushr(b, nir_channel(b, color, src_idx), + nir_imm_int(b, shift)), + mask); + shift += key->dst_bpc; + if (shift >= key->src_bpc) { + src_idx++; + shift = 0; + } + } + + return nir_vec4(b, dst_chan[0], dst_chan[1], dst_chan[2], dst_chan[3]); + } +} + +/** + * Generator for WM programs used in BLORP blits. + * + * The bulk of the work done by the WM program is to wrap and unwrap the + * coordinate transformations used by the hardware to store surfaces in + * memory. The hardware transforms a pixel location (X, Y, S) (where S is the + * sample index for a multisampled surface) to a memory offset by the + * following formulas: + * + * offset = tile(tiling_format, encode_msaa(num_samples, layout, X, Y, S)) + * (X, Y, S) = decode_msaa(num_samples, layout, detile(tiling_format, offset)) + * + * For a single-sampled surface, or for a multisampled surface using + * INTEL_MSAA_LAYOUT_UMS, encode_msaa() and decode_msaa are the identity + * function: + * + * encode_msaa(1, NONE, X, Y, 0) = (X, Y, 0) + * decode_msaa(1, NONE, X, Y, 0) = (X, Y, 0) + * encode_msaa(n, UMS, X, Y, S) = (X, Y, S) + * decode_msaa(n, UMS, X, Y, S) = (X, Y, S) + * + * For a 4x multisampled surface using INTEL_MSAA_LAYOUT_IMS, encode_msaa() + * embeds the sample number into bit 1 of the X and Y coordinates: + * + * encode_msaa(4, IMS, X, Y, S) = (X', Y', 0) + * where X' = (X & ~0b1) << 1 | (S & 0b1) << 1 | (X & 0b1) + * Y' = (Y & ~0b1 ) << 1 | (S & 0b10) | (Y & 0b1) + * decode_msaa(4, IMS, X, Y, 0) = (X', Y', S) + * where X' = (X & ~0b11) >> 1 | (X & 0b1) + * Y' = (Y & ~0b11) >> 1 | (Y & 0b1) + * S = (Y & 0b10) | (X & 0b10) >> 1 + * + * For an 8x multisampled surface using INTEL_MSAA_LAYOUT_IMS, encode_msaa() + * embeds the sample number into bits 1 and 2 of the X coordinate and bit 1 of + * the Y coordinate: + * + * encode_msaa(8, IMS, X, Y, S) = (X', Y', 0) + * where X' = (X & ~0b1) << 2 | (S & 0b100) | (S & 0b1) << 1 | (X & 0b1) + * Y' = (Y & ~0b1) << 1 | (S & 0b10) | (Y & 0b1) + * decode_msaa(8, IMS, X, Y, 0) = (X', Y', S) + * where X' = (X & ~0b111) >> 2 | (X & 0b1) + * Y' = (Y & ~0b11) >> 1 | (Y & 0b1) + * S = (X & 0b100) | (Y & 0b10) | (X & 0b10) >> 1 + * + * For X tiling, tile() combines together the low-order bits of the X and Y + * coordinates in the pattern 0byyyxxxxxxxxx, creating 4k tiles that are 512 + * bytes wide and 8 rows high: + * + * tile(x_tiled, X, Y, S) = A + * where A = tile_num << 12 | offset + * tile_num = (Y' >> 3) * tile_pitch + (X' >> 9) + * offset = (Y' & 0b111) << 9 + * | (X & 0b111111111) + * X' = X * cpp + * Y' = Y + S * qpitch + * detile(x_tiled, A) = (X, Y, S) + * where X = X' / cpp + * Y = Y' % qpitch + * S = Y' / qpitch + * Y' = (tile_num / tile_pitch) << 3 + * | (A & 0b111000000000) >> 9 + * X' = (tile_num % tile_pitch) << 9 + * | (A & 0b111111111) + * + * (In all tiling formulas, cpp is the number of bytes occupied by a single + * sample ("chars per pixel"), tile_pitch is the number of 4k tiles required + * to fill the width of the surface, and qpitch is the spacing (in rows) + * between array slices). + * + * For Y tiling, tile() combines together the low-order bits of the X and Y + * coordinates in the pattern 0bxxxyyyyyxxxx, creating 4k tiles that are 128 + * bytes wide and 32 rows high: + * + * tile(y_tiled, X, Y, S) = A + * where A = tile_num << 12 | offset + * tile_num = (Y' >> 5) * tile_pitch + (X' >> 7) + * offset = (X' & 0b1110000) << 5 + * | (Y' & 0b11111) << 4 + * | (X' & 0b1111) + * X' = X * cpp + * Y' = Y + S * qpitch + * detile(y_tiled, A) = (X, Y, S) + * where X = X' / cpp + * Y = Y' % qpitch + * S = Y' / qpitch + * Y' = (tile_num / tile_pitch) << 5 + * | (A & 0b111110000) >> 4 + * X' = (tile_num % tile_pitch) << 7 + * | (A & 0b111000000000) >> 5 + * | (A & 0b1111) + * + * For W tiling, tile() combines together the low-order bits of the X and Y + * coordinates in the pattern 0bxxxyyyyxyxyx, creating 4k tiles that are 64 + * bytes wide and 64 rows high (note that W tiling is only used for stencil + * buffers, which always have cpp = 1 and S=0): + * + * tile(w_tiled, X, Y, S) = A + * where A = tile_num << 12 | offset + * tile_num = (Y' >> 6) * tile_pitch + (X' >> 6) + * offset = (X' & 0b111000) << 6 + * | (Y' & 0b111100) << 3 + * | (X' & 0b100) << 2 + * | (Y' & 0b10) << 2 + * | (X' & 0b10) << 1 + * | (Y' & 0b1) << 1 + * | (X' & 0b1) + * X' = X * cpp = X + * Y' = Y + S * qpitch + * detile(w_tiled, A) = (X, Y, S) + * where X = X' / cpp = X' + * Y = Y' % qpitch = Y' + * S = Y / qpitch = 0 + * Y' = (tile_num / tile_pitch) << 6 + * | (A & 0b111100000) >> 3 + * | (A & 0b1000) >> 2 + * | (A & 0b10) >> 1 + * X' = (tile_num % tile_pitch) << 6 + * | (A & 0b111000000000) >> 6 + * | (A & 0b10000) >> 2 + * | (A & 0b100) >> 1 + * | (A & 0b1) + * + * Finally, for a non-tiled surface, tile() simply combines together the X and + * Y coordinates in the natural way: + * + * tile(untiled, X, Y, S) = A + * where A = Y * pitch + X' + * X' = X * cpp + * Y' = Y + S * qpitch + * detile(untiled, A) = (X, Y, S) + * where X = X' / cpp + * Y = Y' % qpitch + * S = Y' / qpitch + * X' = A % pitch + * Y' = A / pitch + * + * (In these formulas, pitch is the number of bytes occupied by a single row + * of samples). + */ +static nir_shader * +brw_blorp_build_nir_shader(struct blorp_context *blorp, void *mem_ctx, + const struct brw_blorp_blit_prog_key *key) +{ + const struct gen_device_info *devinfo = blorp->isl_dev->info; + nir_ssa_def *src_pos, *dst_pos, *color; + + /* Sanity checks */ + if (key->dst_tiled_w && key->rt_samples > 1) { + /* If the destination image is W tiled and multisampled, then the thread + * must be dispatched once per sample, not once per pixel. This is + * necessary because after conversion between W and Y tiling, there's no + * guarantee that all samples corresponding to a single pixel will still + * be together. + */ + assert(key->persample_msaa_dispatch); + } + + if (key->blend) { + /* We are blending, which means we won't have an opportunity to + * translate the tiling and sample count for the texture surface. So + * the surface state for the texture must be configured with the correct + * tiling and sample count. + */ + assert(!key->src_tiled_w); + assert(key->tex_samples == key->src_samples); + assert(key->tex_layout == key->src_layout); + assert(key->tex_samples > 0); + } + + if (key->persample_msaa_dispatch) { + /* It only makes sense to do persample dispatch if the render target is + * configured as multisampled. + */ + assert(key->rt_samples > 0); + } + + /* Make sure layout is consistent with sample count */ + assert((key->tex_layout == ISL_MSAA_LAYOUT_NONE) == + (key->tex_samples <= 1)); + assert((key->rt_layout == ISL_MSAA_LAYOUT_NONE) == + (key->rt_samples <= 1)); + assert((key->src_layout == ISL_MSAA_LAYOUT_NONE) == + (key->src_samples <= 1)); + assert((key->dst_layout == ISL_MSAA_LAYOUT_NONE) == + (key->dst_samples <= 1)); + + nir_builder b; + nir_builder_init_simple_shader(&b, mem_ctx, MESA_SHADER_FRAGMENT, NULL); + + struct brw_blorp_blit_vars v; + brw_blorp_blit_vars_init(&b, &v, key); + + dst_pos = blorp_blit_get_frag_coords(&b, key, &v); + + /* Render target and texture hardware don't support W tiling until Gen8. */ + const bool rt_tiled_w = false; + const bool tex_tiled_w = devinfo->gen >= 8 && key->src_tiled_w; + + /* The address that data will be written to is determined by the + * coordinates supplied to the WM thread and the tiling and sample count of + * the render target, according to the formula: + * + * (X, Y, S) = decode_msaa(rt_samples, detile(rt_tiling, offset)) + * + * If the actual tiling and sample count of the destination surface are not + * the same as the configuration of the render target, then these + * coordinates are wrong and we have to adjust them to compensate for the + * difference. + */ + if (rt_tiled_w != key->dst_tiled_w || + key->rt_samples != key->dst_samples || + key->rt_layout != key->dst_layout) { + dst_pos = blorp_nir_encode_msaa(&b, dst_pos, key->rt_samples, + key->rt_layout); + /* Now (X, Y, S) = detile(rt_tiling, offset) */ + if (rt_tiled_w != key->dst_tiled_w) + dst_pos = blorp_nir_retile_y_to_w(&b, dst_pos); + /* Now (X, Y, S) = detile(rt_tiling, offset) */ + dst_pos = blorp_nir_decode_msaa(&b, dst_pos, key->dst_samples, + key->dst_layout); + } + + /* Now (X, Y, S) = decode_msaa(dst_samples, detile(dst_tiling, offset)). + * + * That is: X, Y and S now contain the true coordinates and sample index of + * the data that the WM thread should output. + * + * If we need to kill pixels that are outside the destination rectangle, + * now is the time to do it. + */ + if (key->use_kill) { + assert(!(key->blend && key->blit_scaled)); + blorp_nir_discard_if_outside_rect(&b, dst_pos, &v); + } + + src_pos = blorp_blit_apply_transform(&b, nir_i2f(&b, dst_pos), &v); + if (dst_pos->num_components == 3) { + /* The sample coordinate is an integer that we want left alone but + * blorp_blit_apply_transform() blindly applies the transform to all + * three coordinates. Grab the original sample index. + */ + src_pos = nir_vec3(&b, nir_channel(&b, src_pos, 0), + nir_channel(&b, src_pos, 1), + nir_channel(&b, dst_pos, 2)); + } + + /* If the source image is not multisampled, then we want to fetch sample + * number 0, because that's the only sample there is. + */ + if (key->src_samples == 1) + src_pos = nir_channels(&b, src_pos, 0x3); + + /* X, Y, and S are now the coordinates of the pixel in the source image + * that we want to texture from. Exception: if we are blending, then S is + * irrelevant, because we are going to fetch all samples. + */ + if (key->blend && !key->blit_scaled) { + /* Resolves (effecively) use texelFetch, so we need integers and we + * don't care about the sample index if we got one. + */ + src_pos = nir_f2i(&b, nir_channels(&b, src_pos, 0x3)); + + if (devinfo->gen == 6) { + /* Because gen6 only supports 4x interleved MSAA, we can do all the + * blending we need with a single linear-interpolated texture lookup + * at the center of the sample. The texture coordinates to be odd + * integers so that they correspond to the center of a 2x2 block + * representing the four samples that maxe up a pixel. So we need + * to multiply our X and Y coordinates each by 2 and then add 1. + */ + src_pos = nir_ishl(&b, src_pos, nir_imm_int(&b, 1)); + src_pos = nir_iadd(&b, src_pos, nir_imm_int(&b, 1)); + src_pos = nir_i2f(&b, src_pos); + color = blorp_nir_tex(&b, &v, src_pos, key->texture_data_type); + } else { + /* Gen7+ hardware doesn't automaticaly blend. */ + color = blorp_nir_manual_blend_average(&b, &v, src_pos, key->src_samples, + key->tex_aux_usage, + key->texture_data_type); + } + } else if (key->blend && key->blit_scaled) { + assert(!key->use_kill); + color = blorp_nir_manual_blend_bilinear(&b, src_pos, key->src_samples, key, &v); + } else { + if (key->bilinear_filter) { + color = blorp_nir_tex(&b, &v, src_pos, key->texture_data_type); + } else { + /* We're going to use texelFetch, so we need integers */ + if (src_pos->num_components == 2) { + src_pos = nir_f2i(&b, src_pos); + } else { + assert(src_pos->num_components == 3); + src_pos = nir_vec3(&b, nir_channel(&b, nir_f2i(&b, src_pos), 0), + nir_channel(&b, nir_f2i(&b, src_pos), 1), + nir_channel(&b, src_pos, 2)); + } + + /* We aren't blending, which means we just want to fetch a single + * sample from the source surface. The address that we want to fetch + * from is related to the X, Y and S values according to the formula: + * + * (X, Y, S) = decode_msaa(src_samples, detile(src_tiling, offset)). + * + * If the actual tiling and sample count of the source surface are + * not the same as the configuration of the texture, then we need to + * adjust the coordinates to compensate for the difference. + */ + if (tex_tiled_w != key->src_tiled_w || + key->tex_samples != key->src_samples || + key->tex_layout != key->src_layout) { + src_pos = blorp_nir_encode_msaa(&b, src_pos, key->src_samples, + key->src_layout); + /* Now (X, Y, S) = detile(src_tiling, offset) */ + if (tex_tiled_w != key->src_tiled_w) + src_pos = blorp_nir_retile_w_to_y(&b, src_pos); + /* Now (X, Y, S) = detile(tex_tiling, offset) */ + src_pos = blorp_nir_decode_msaa(&b, src_pos, key->tex_samples, + key->tex_layout); + } + + if (key->need_src_offset) + src_pos = nir_iadd(&b, src_pos, nir_load_var(&b, v.v_src_offset)); + + /* Now (X, Y, S) = decode_msaa(tex_samples, detile(tex_tiling, offset)). + * + * In other words: X, Y, and S now contain values which, when passed to + * the texturing unit, will cause data to be read from the correct + * memory location. So we can fetch the texel now. + */ + if (key->src_samples == 1) { + color = blorp_nir_txf(&b, &v, src_pos, key->texture_data_type); + } else { + nir_ssa_def *mcs = NULL; + if (key->tex_aux_usage == ISL_AUX_USAGE_MCS) + mcs = blorp_nir_txf_ms_mcs(&b, &v, src_pos); + + color = blorp_nir_txf_ms(&b, &v, src_pos, mcs, key->texture_data_type); + } + } + } + + if (key->dst_bpc != key->src_bpc) + color = bit_cast_color(&b, color, key); + + if (key->dst_rgb) { + /* The destination image is bound as a red texture three times as wide + * as the actual image. Our shader is effectively running one color + * component at a time. We need to pick off the appropriate component + * from the source color and write that to destination red. + */ + assert(dst_pos->num_components == 2); + nir_ssa_def *comp = + nir_umod(&b, nir_channel(&b, dst_pos, 0), nir_imm_int(&b, 3)); + + nir_ssa_def *color_component = + nir_bcsel(&b, nir_ieq(&b, comp, nir_imm_int(&b, 0)), + nir_channel(&b, color, 0), + nir_bcsel(&b, nir_ieq(&b, comp, nir_imm_int(&b, 1)), + nir_channel(&b, color, 1), + nir_channel(&b, color, 2))); + + nir_ssa_def *u = nir_ssa_undef(&b, 1, 32); + color = nir_vec4(&b, color_component, u, u, u); + } + + nir_store_var(&b, v.color_out, color, 0xf); + + return b.shader; +} + +static void +brw_blorp_get_blit_kernel(struct blorp_context *blorp, + struct blorp_params *params, + const struct brw_blorp_blit_prog_key *prog_key) +{ + if (blorp->lookup_shader(blorp, prog_key, sizeof(*prog_key), + ¶ms->wm_prog_kernel, ¶ms->wm_prog_data)) + return; + + void *mem_ctx = ralloc_context(NULL); + + const unsigned *program; + unsigned program_size; + struct brw_wm_prog_data prog_data; + + nir_shader *nir = brw_blorp_build_nir_shader(blorp, mem_ctx, prog_key); + struct brw_wm_prog_key wm_key; + brw_blorp_init_wm_prog_key(&wm_key); + wm_key.tex.compressed_multisample_layout_mask = + prog_key->tex_aux_usage == ISL_AUX_USAGE_MCS; + wm_key.tex.msaa_16 = prog_key->tex_samples == 16; + wm_key.multisample_fbo = prog_key->rt_samples > 1; + + program = blorp_compile_fs(blorp, mem_ctx, nir, &wm_key, false, + &prog_data, &program_size); + + blorp->upload_shader(blorp, prog_key, sizeof(*prog_key), + program, program_size, + &prog_data.base, sizeof(prog_data), + ¶ms->wm_prog_kernel, ¶ms->wm_prog_data); + + ralloc_free(mem_ctx); +} + +static void +brw_blorp_setup_coord_transform(struct brw_blorp_coord_transform *xform, + GLfloat src0, GLfloat src1, + GLfloat dst0, GLfloat dst1, + bool mirror) +{ + double scale = (double)(src1 - src0) / (double)(dst1 - dst0); + if (!mirror) { + /* When not mirroring a coordinate (say, X), we need: + * src_x - src_x0 = (dst_x - dst_x0 + 0.5) * scale + * Therefore: + * src_x = src_x0 + (dst_x - dst_x0 + 0.5) * scale + * + * blorp program uses "round toward zero" to convert the + * transformed floating point coordinates to integer coordinates, + * whereas the behaviour we actually want is "round to nearest", + * so 0.5 provides the necessary correction. + */ + xform->multiplier = scale; + xform->offset = src0 + (-(double)dst0 + 0.5) * scale; + } else { + /* When mirroring X we need: + * src_x - src_x0 = dst_x1 - dst_x - 0.5 + * Therefore: + * src_x = src_x0 + (dst_x1 -dst_x - 0.5) * scale + */ + xform->multiplier = -scale; + xform->offset = src0 + ((double)dst1 - 0.5) * scale; + } +} + +static inline void +surf_get_intratile_offset_px(struct brw_blorp_surface_info *info, + uint32_t *tile_x_px, uint32_t *tile_y_px) +{ + if (info->surf.msaa_layout == ISL_MSAA_LAYOUT_INTERLEAVED) { + struct isl_extent2d px_size_sa = + isl_get_interleaved_msaa_px_size_sa(info->surf.samples); + assert(info->tile_x_sa % px_size_sa.width == 0); + assert(info->tile_y_sa % px_size_sa.height == 0); + *tile_x_px = info->tile_x_sa / px_size_sa.width; + *tile_y_px = info->tile_y_sa / px_size_sa.height; + } else { + *tile_x_px = info->tile_x_sa; + *tile_y_px = info->tile_y_sa; + } +} + +static void +surf_convert_to_single_slice(const struct isl_device *isl_dev, + struct brw_blorp_surface_info *info) +{ + /* Just bail if we have nothing to do. */ + if (info->surf.dim == ISL_SURF_DIM_2D && + info->view.base_level == 0 && info->view.base_array_layer == 0 && + info->surf.levels == 1 && info->surf.logical_level0_px.array_len == 1) + return; + + /* If this gets triggered then we've gotten here twice which. This + * shouldn't happen thanks to the above early return. + */ + assert(info->tile_x_sa == 0 && info->tile_y_sa == 0); + + uint32_t layer = 0, z = 0; + if (info->surf.dim == ISL_SURF_DIM_3D) + z = info->view.base_array_layer + info->z_offset; + else + layer = info->view.base_array_layer; + + uint32_t x_offset_sa, y_offset_sa; + isl_surf_get_image_offset_sa(&info->surf, info->view.base_level, + layer, z, &x_offset_sa, &y_offset_sa); + + uint32_t byte_offset; + isl_tiling_get_intratile_offset_sa(isl_dev, info->surf.tiling, + info->surf.format, info->surf.row_pitch, + x_offset_sa, y_offset_sa, + &byte_offset, + &info->tile_x_sa, &info->tile_y_sa); + info->addr.offset += byte_offset; + + const uint32_t slice_width_px = + minify(info->surf.logical_level0_px.width, info->view.base_level); + const uint32_t slice_height_px = + minify(info->surf.logical_level0_px.height, info->view.base_level); + + uint32_t tile_x_px, tile_y_px; + surf_get_intratile_offset_px(info, &tile_x_px, &tile_y_px); + + struct isl_surf_init_info init_info = { + .dim = ISL_SURF_DIM_2D, + .format = info->surf.format, + .width = slice_width_px + tile_x_px, + .height = slice_height_px + tile_y_px, + .depth = 1, + .levels = 1, + .array_len = 1, + .samples = info->surf.samples, + .min_pitch = info->surf.row_pitch, + .usage = info->surf.usage, + .tiling_flags = 1 << info->surf.tiling, + }; + + isl_surf_init_s(isl_dev, &info->surf, &init_info); + assert(info->surf.row_pitch == init_info.min_pitch); + + /* The view is also different now. */ + info->view.base_level = 0; + info->view.levels = 1; + info->view.base_array_layer = 0; + info->view.array_len = 1; + info->z_offset = 0; +} + +static void +surf_fake_interleaved_msaa(const struct isl_device *isl_dev, + struct brw_blorp_surface_info *info) +{ + assert(info->surf.msaa_layout == ISL_MSAA_LAYOUT_INTERLEAVED); + + /* First, we need to convert it to a simple 1-level 1-layer 2-D surface */ + surf_convert_to_single_slice(isl_dev, info); + + info->surf.logical_level0_px = info->surf.phys_level0_sa; + info->surf.samples = 1; + info->surf.msaa_layout = ISL_MSAA_LAYOUT_NONE; +} + +static void +surf_retile_w_to_y(const struct isl_device *isl_dev, + struct brw_blorp_surface_info *info) +{ + assert(info->surf.tiling == ISL_TILING_W); + + /* First, we need to convert it to a simple 1-level 1-layer 2-D surface */ + surf_convert_to_single_slice(isl_dev, info); + + /* On gen7+, we don't have interleaved multisampling for color render + * targets so we have to fake it. + * + * TODO: Are we sure we don't also need to fake it on gen6? + */ + if (isl_dev->info->gen > 6 && + info->surf.msaa_layout == ISL_MSAA_LAYOUT_INTERLEAVED) { + surf_fake_interleaved_msaa(isl_dev, info); + } + + if (isl_dev->info->gen == 6) { + /* Gen6 stencil buffers have a very large alignment coming in from the + * miptree. It's out-of-bounds for what the surface state can handle. + * Since we have a single layer and level, it doesn't really matter as + * long as we don't pass a bogus value into isl_surf_fill_state(). + */ + info->surf.image_alignment_el = isl_extent3d(4, 2, 1); + } + + /* Now that we've converted everything to a simple 2-D surface with only + * one miplevel, we can go about retiling it. + */ + const unsigned x_align = 8, y_align = info->surf.samples != 0 ? 8 : 4; + info->surf.tiling = ISL_TILING_Y0; + info->surf.logical_level0_px.width = + ALIGN(info->surf.logical_level0_px.width, x_align) * 2; + info->surf.logical_level0_px.height = + ALIGN(info->surf.logical_level0_px.height, y_align) / 2; + info->tile_x_sa *= 2; + info->tile_y_sa /= 2; +} + +static bool +can_shrink_surface(const struct brw_blorp_surface_info *surf) +{ + /* The current code doesn't support offsets into the aux buffers. This + * should be possible, but we need to make sure the offset is page + * aligned for both the surface and the aux buffer surface. Generally + * this mean using the page aligned offset for the aux buffer. + * + * Currently the cases where we must split the blit are limited to cases + * where we don't have a aux buffer. + */ + if (surf->aux_addr.buffer != NULL) + return false; + + /* We can't support splitting the blit for gen <= 7, because the qpitch + * size is calculated by the hardware based on the surface height for + * gen <= 7. In gen >= 8, the qpitch is controlled by the driver. + */ + if (surf->surf.msaa_layout == ISL_MSAA_LAYOUT_ARRAY) + return false; + + return true; +} + +static bool +can_shrink_surfaces(const struct blorp_params *params) +{ + return + can_shrink_surface(¶ms->src) && + can_shrink_surface(¶ms->dst); +} + +static unsigned +get_max_surface_size(const struct gen_device_info *devinfo, + const struct blorp_params *params) +{ + const unsigned max = devinfo->gen >= 7 ? 16384 : 8192; + if (split_blorp_blit_debug && can_shrink_surfaces(params)) + return max >> 4; /* A smaller restriction when debug is enabled */ + else + return max; +} + +struct blt_axis { + double src0, src1, dst0, dst1; + bool mirror; +}; + +struct blt_coords { + struct blt_axis x, y; +}; + +static void +surf_fake_rgb_with_red(const struct isl_device *isl_dev, + struct brw_blorp_surface_info *info, + uint32_t *x, uint32_t *width) +{ + surf_convert_to_single_slice(isl_dev, info); + + info->surf.logical_level0_px.width *= 3; + info->surf.phys_level0_sa.width *= 3; + *x *= 3; + *width *= 3; + + enum isl_format red_format; + switch (info->view.format) { + case ISL_FORMAT_R8G8B8_UNORM: + red_format = ISL_FORMAT_R8_UNORM; + break; + case ISL_FORMAT_R8G8B8_UINT: + red_format = ISL_FORMAT_R8_UINT; + break; + case ISL_FORMAT_R16G16B16_UNORM: + red_format = ISL_FORMAT_R16_UNORM; + break; + case ISL_FORMAT_R16G16B16_UINT: + red_format = ISL_FORMAT_R16_UINT; + break; + case ISL_FORMAT_R32G32B32_UINT: + red_format = ISL_FORMAT_R32_UINT; + break; + default: + unreachable("Invalid RGB copy destination format"); + } + assert(isl_format_get_layout(red_format)->channels.r.type == + isl_format_get_layout(info->view.format)->channels.r.type); + assert(isl_format_get_layout(red_format)->channels.r.bits == + isl_format_get_layout(info->view.format)->channels.r.bits); + + info->surf.format = info->view.format = red_format; +} + +static void +fake_dest_rgb_with_red(const struct isl_device *dev, + struct blorp_params *params, + struct brw_blorp_blit_prog_key *wm_prog_key, + struct blt_coords *coords) +{ + /* Handle RGB destinations for blorp_copy */ + const struct isl_format_layout *dst_fmtl = + isl_format_get_layout(params->dst.surf.format); + + if (dst_fmtl->bpb % 3 == 0) { + uint32_t dst_x = coords->x.dst0; + uint32_t dst_width = coords->x.dst1 - dst_x; + surf_fake_rgb_with_red(dev, ¶ms->dst, + &dst_x, &dst_width); + coords->x.dst0 = dst_x; + coords->x.dst1 = dst_x + dst_width; + wm_prog_key->dst_rgb = true; + wm_prog_key->need_dst_offset = true; + } +} + +enum blit_shrink_status { + BLIT_NO_SHRINK = 0, + BLIT_WIDTH_SHRINK = 1, + BLIT_HEIGHT_SHRINK = 2, +}; + +/* Try to blit. If the surface parameters exceed the size allowed by hardware, + * then enum blit_shrink_status will be returned. If BLIT_NO_SHRINK is + * returned, then the blit was successful. + */ +static enum blit_shrink_status +try_blorp_blit(struct blorp_batch *batch, + struct blorp_params *params, + struct brw_blorp_blit_prog_key *wm_prog_key, + struct blt_coords *coords) +{ + const struct gen_device_info *devinfo = batch->blorp->isl_dev->info; + + fake_dest_rgb_with_red(batch->blorp->isl_dev, params, wm_prog_key, coords); + + if (isl_format_has_sint_channel(params->src.view.format)) { + wm_prog_key->texture_data_type = nir_type_int; + } else if (isl_format_has_uint_channel(params->src.view.format)) { + wm_prog_key->texture_data_type = nir_type_uint; + } else { + wm_prog_key->texture_data_type = nir_type_float; + } + + /* src_samples and dst_samples are the true sample counts */ + wm_prog_key->src_samples = params->src.surf.samples; + wm_prog_key->dst_samples = params->dst.surf.samples; + + wm_prog_key->tex_aux_usage = params->src.aux_usage; + + /* src_layout and dst_layout indicate the true MSAA layout used by src and + * dst. + */ + wm_prog_key->src_layout = params->src.surf.msaa_layout; + wm_prog_key->dst_layout = params->dst.surf.msaa_layout; + + /* Round floating point values to nearest integer to avoid "off by one texel" + * kind of errors when blitting. + */ + params->x0 = params->wm_inputs.discard_rect.x0 = round(coords->x.dst0); + params->y0 = params->wm_inputs.discard_rect.y0 = round(coords->y.dst0); + params->x1 = params->wm_inputs.discard_rect.x1 = round(coords->x.dst1); + params->y1 = params->wm_inputs.discard_rect.y1 = round(coords->y.dst1); + + brw_blorp_setup_coord_transform(¶ms->wm_inputs.coord_transform[0], + coords->x.src0, coords->x.src1, + coords->x.dst0, coords->x.dst1, + coords->x.mirror); + brw_blorp_setup_coord_transform(¶ms->wm_inputs.coord_transform[1], + coords->y.src0, coords->y.src1, + coords->y.dst0, coords->y.dst1, + coords->y.mirror); + + if (devinfo->gen > 6 && + params->dst.surf.msaa_layout == ISL_MSAA_LAYOUT_INTERLEAVED) { + assert(params->dst.surf.samples > 1); + + /* We must expand the rectangle we send through the rendering pipeline, + * to account for the fact that we are mapping the destination region as + * single-sampled when it is in fact multisampled. We must also align + * it to a multiple of the multisampling pattern, because the + * differences between multisampled and single-sampled surface formats + * will mean that pixels are scrambled within the multisampling pattern. + * TODO: what if this makes the coordinates too large? + * + * Note: this only works if the destination surface uses the IMS layout. + * If it's UMS, then we have no choice but to set up the rendering + * pipeline as multisampled. + */ + struct isl_extent2d px_size_sa = + isl_get_interleaved_msaa_px_size_sa(params->dst.surf.samples); + params->x0 = ROUND_DOWN_TO(params->x0, 2) * px_size_sa.width; + params->y0 = ROUND_DOWN_TO(params->y0, 2) * px_size_sa.height; + params->x1 = ALIGN(params->x1, 2) * px_size_sa.width; + params->y1 = ALIGN(params->y1, 2) * px_size_sa.height; + + surf_fake_interleaved_msaa(batch->blorp->isl_dev, ¶ms->dst); + + wm_prog_key->use_kill = true; + wm_prog_key->need_dst_offset = true; + } + + if (params->dst.surf.tiling == ISL_TILING_W) { + /* We must modify the rectangle we send through the rendering pipeline + * (and the size and x/y offset of the destination surface), to account + * for the fact that we are mapping it as Y-tiled when it is in fact + * W-tiled. + * + * Both Y tiling and W tiling can be understood as organizations of + * 32-byte sub-tiles; within each 32-byte sub-tile, the layout of pixels + * is different, but the layout of the 32-byte sub-tiles within the 4k + * tile is the same (8 sub-tiles across by 16 sub-tiles down, in + * column-major order). In Y tiling, the sub-tiles are 16 bytes wide + * and 2 rows high; in W tiling, they are 8 bytes wide and 4 rows high. + * + * Therefore, to account for the layout differences within the 32-byte + * sub-tiles, we must expand the rectangle so the X coordinates of its + * edges are multiples of 8 (the W sub-tile width), and its Y + * coordinates of its edges are multiples of 4 (the W sub-tile height). + * Then we need to scale the X and Y coordinates of the rectangle to + * account for the differences in aspect ratio between the Y and W + * sub-tiles. We need to modify the layer width and height similarly. + * + * A correction needs to be applied when MSAA is in use: since + * INTEL_MSAA_LAYOUT_IMS uses an interleaving pattern whose height is 4, + * we need to align the Y coordinates to multiples of 8, so that when + * they are divided by two they are still multiples of 4. + * + * Note: Since the x/y offset of the surface will be applied using the + * SURFACE_STATE command packet, it will be invisible to the swizzling + * code in the shader; therefore it needs to be in a multiple of the + * 32-byte sub-tile size. Fortunately it is, since the sub-tile is 8 + * pixels wide and 4 pixels high (when viewed as a W-tiled stencil + * buffer), and the miplevel alignment used for stencil buffers is 8 + * pixels horizontally and either 4 or 8 pixels vertically (see + * intel_horizontal_texture_alignment_unit() and + * intel_vertical_texture_alignment_unit()). + * + * Note: Also, since the SURFACE_STATE command packet can only apply + * offsets that are multiples of 4 pixels horizontally and 2 pixels + * vertically, it is important that the offsets will be multiples of + * these sizes after they are converted into Y-tiled coordinates. + * Fortunately they will be, since we know from above that the offsets + * are a multiple of the 32-byte sub-tile size, and in Y-tiled + * coordinates the sub-tile is 16 pixels wide and 2 pixels high. + * + * TODO: what if this makes the coordinates (or the texture size) too + * large? + */ + const unsigned x_align = 8; + const unsigned y_align = params->dst.surf.samples != 0 ? 8 : 4; + params->x0 = ROUND_DOWN_TO(params->x0, x_align) * 2; + params->y0 = ROUND_DOWN_TO(params->y0, y_align) / 2; + params->x1 = ALIGN(params->x1, x_align) * 2; + params->y1 = ALIGN(params->y1, y_align) / 2; + + /* Retile the surface to Y-tiled */ + surf_retile_w_to_y(batch->blorp->isl_dev, ¶ms->dst); + + wm_prog_key->dst_tiled_w = true; + wm_prog_key->use_kill = true; + wm_prog_key->need_dst_offset = true; + + if (params->dst.surf.samples > 1) { + /* If the destination surface is a W-tiled multisampled stencil + * buffer that we're mapping as Y tiled, then we need to arrange for + * the WM program to run once per sample rather than once per pixel, + * because the memory layout of related samples doesn't match between + * W and Y tiling. + */ + wm_prog_key->persample_msaa_dispatch = true; + } + } + + if (devinfo->gen < 8 && params->src.surf.tiling == ISL_TILING_W) { + /* On Haswell and earlier, we have to fake W-tiled sources as Y-tiled. + * Broadwell adds support for sampling from stencil. + * + * See the comments above concerning x/y offset alignment for the + * destination surface. + * + * TODO: what if this makes the texture size too large? + */ + surf_retile_w_to_y(batch->blorp->isl_dev, ¶ms->src); + + wm_prog_key->src_tiled_w = true; + wm_prog_key->need_src_offset = true; + } + + /* tex_samples and rt_samples are the sample counts that are set up in + * SURFACE_STATE. + */ + wm_prog_key->tex_samples = params->src.surf.samples; + wm_prog_key->rt_samples = params->dst.surf.samples; + + /* tex_layout and rt_layout indicate the MSAA layout the GPU pipeline will + * use to access the source and destination surfaces. + */ + wm_prog_key->tex_layout = params->src.surf.msaa_layout; + wm_prog_key->rt_layout = params->dst.surf.msaa_layout; + + if (params->src.surf.samples > 0 && params->dst.surf.samples > 1) { + /* We are blitting from a multisample buffer to a multisample buffer, so + * we must preserve samples within a pixel. This means we have to + * arrange for the WM program to run once per sample rather than once + * per pixel. + */ + wm_prog_key->persample_msaa_dispatch = true; + } + + params->num_samples = params->dst.surf.samples; + + if (params->src.tile_x_sa || params->src.tile_y_sa) { + assert(wm_prog_key->need_src_offset); + surf_get_intratile_offset_px(¶ms->src, + ¶ms->wm_inputs.src_offset.x, + ¶ms->wm_inputs.src_offset.y); + } + + if (params->dst.tile_x_sa || params->dst.tile_y_sa) { + assert(wm_prog_key->need_dst_offset); + surf_get_intratile_offset_px(¶ms->dst, + ¶ms->wm_inputs.dst_offset.x, + ¶ms->wm_inputs.dst_offset.y); + params->x0 += params->wm_inputs.dst_offset.x; + params->y0 += params->wm_inputs.dst_offset.y; + params->x1 += params->wm_inputs.dst_offset.x; + params->y1 += params->wm_inputs.dst_offset.y; + } + + /* For some texture types, we need to pass the layer through the sampler. */ + params->wm_inputs.src_z = params->src.z_offset; + + brw_blorp_get_blit_kernel(batch->blorp, params, wm_prog_key); + + unsigned result = 0; + unsigned max_surface_size = get_max_surface_size(devinfo, params); + if (params->src.surf.logical_level0_px.width > max_surface_size || + params->dst.surf.logical_level0_px.width > max_surface_size) + result |= BLIT_WIDTH_SHRINK; + if (params->src.surf.logical_level0_px.height > max_surface_size || + params->dst.surf.logical_level0_px.height > max_surface_size) + result |= BLIT_HEIGHT_SHRINK; + + if (result == 0) { + batch->blorp->exec(batch, params); + } + + return result; +} + +/* Adjust split blit source coordinates for the current destination + * coordinates. + */ +static void +adjust_split_source_coords(const struct blt_axis *orig, + struct blt_axis *split_coords, + double scale) +{ + /* When scale is greater than 0, then we are growing from the start, so + * src0 uses delta0, and src1 uses delta1. When scale is less than 0, the + * source range shrinks from the end. In that case src0 is adjusted by + * delta1, and src1 is adjusted by delta0. + */ + double delta0 = scale * (split_coords->dst0 - orig->dst0); + double delta1 = scale * (split_coords->dst1 - orig->dst1); + split_coords->src0 = orig->src0 + (scale >= 0.0 ? delta0 : delta1); + split_coords->src1 = orig->src1 + (scale >= 0.0 ? delta1 : delta0); +} + +static const struct isl_extent2d +get_px_size_sa(const struct isl_surf *surf) +{ + static const struct isl_extent2d one_to_one = { .w = 1, .h = 1 }; + + if (surf->msaa_layout != ISL_MSAA_LAYOUT_INTERLEAVED) + return one_to_one; + else + return isl_get_interleaved_msaa_px_size_sa(surf->samples); +} + +static void +shrink_surface_params(const struct isl_device *dev, + struct brw_blorp_surface_info *info, + double *x0, double *x1, double *y0, double *y1) +{ + uint32_t byte_offset, x_offset_sa, y_offset_sa, size; + struct isl_extent2d px_size_sa; + int adjust; + + surf_convert_to_single_slice(dev, info); + + px_size_sa = get_px_size_sa(&info->surf); + + /* Because this gets called after we lower compressed images, the tile + * offsets may be non-zero and we need to incorporate them in our + * calculations. + */ + x_offset_sa = (uint32_t)*x0 * px_size_sa.w + info->tile_x_sa; + y_offset_sa = (uint32_t)*y0 * px_size_sa.h + info->tile_y_sa; + isl_tiling_get_intratile_offset_sa(dev, info->surf.tiling, + info->surf.format, info->surf.row_pitch, + x_offset_sa, y_offset_sa, + &byte_offset, + &info->tile_x_sa, &info->tile_y_sa); + + info->addr.offset += byte_offset; + + adjust = (int)info->tile_x_sa / px_size_sa.w - (int)*x0; + *x0 += adjust; + *x1 += adjust; + info->tile_x_sa = 0; + + adjust = (int)info->tile_y_sa / px_size_sa.h - (int)*y0; + *y0 += adjust; + *y1 += adjust; + info->tile_y_sa = 0; + + size = MIN2((uint32_t)ceil(*x1), info->surf.logical_level0_px.width); + info->surf.logical_level0_px.width = size; + info->surf.phys_level0_sa.width = size * px_size_sa.w; + + size = MIN2((uint32_t)ceil(*y1), info->surf.logical_level0_px.height); + info->surf.logical_level0_px.height = size; + info->surf.phys_level0_sa.height = size * px_size_sa.h; +} + +static void +shrink_surfaces(const struct isl_device *dev, + struct blorp_params *params, + struct brw_blorp_blit_prog_key *wm_prog_key, + struct blt_coords *coords) +{ + /* Shrink source surface */ + shrink_surface_params(dev, ¶ms->src, &coords->x.src0, &coords->x.src1, + &coords->y.src0, &coords->y.src1); + wm_prog_key->need_src_offset = false; + + /* Shrink destination surface */ + shrink_surface_params(dev, ¶ms->dst, &coords->x.dst0, &coords->x.dst1, + &coords->y.dst0, &coords->y.dst1); + wm_prog_key->need_dst_offset = false; +} + +static void +do_blorp_blit(struct blorp_batch *batch, + const struct blorp_params *orig_params, + struct brw_blorp_blit_prog_key *wm_prog_key, + const struct blt_coords *orig) +{ + struct blorp_params params; + struct blt_coords blit_coords; + struct blt_coords split_coords = *orig; + double w = orig->x.dst1 - orig->x.dst0; + double h = orig->y.dst1 - orig->y.dst0; + double x_scale = (orig->x.src1 - orig->x.src0) / w; + double y_scale = (orig->y.src1 - orig->y.src0) / h; + if (orig->x.mirror) + x_scale = -x_scale; + if (orig->y.mirror) + y_scale = -y_scale; + + bool x_done, y_done; + bool shrink = split_blorp_blit_debug && can_shrink_surfaces(orig_params); + do { + params = *orig_params; + blit_coords = split_coords; + if (shrink) + shrink_surfaces(batch->blorp->isl_dev, ¶ms, wm_prog_key, + &blit_coords); + enum blit_shrink_status result = + try_blorp_blit(batch, ¶ms, wm_prog_key, &blit_coords); + + if (result & BLIT_WIDTH_SHRINK) { + w /= 2.0; + assert(w >= 1.0); + split_coords.x.dst1 = MIN2(split_coords.x.dst0 + w, orig->x.dst1); + adjust_split_source_coords(&orig->x, &split_coords.x, x_scale); + } + if (result & BLIT_HEIGHT_SHRINK) { + h /= 2.0; + assert(h >= 1.0); + split_coords.y.dst1 = MIN2(split_coords.y.dst0 + h, orig->y.dst1); + adjust_split_source_coords(&orig->y, &split_coords.y, y_scale); + } + + if (result != 0) { + assert(can_shrink_surfaces(orig_params)); + shrink = true; + continue; + } + + y_done = (orig->y.dst1 - split_coords.y.dst1 < 0.5); + x_done = y_done && (orig->x.dst1 - split_coords.x.dst1 < 0.5); + if (x_done) { + break; + } else if (y_done) { + split_coords.x.dst0 += w; + split_coords.x.dst1 = MIN2(split_coords.x.dst0 + w, orig->x.dst1); + split_coords.y.dst0 = orig->y.dst0; + split_coords.y.dst1 = MIN2(split_coords.y.dst0 + h, orig->y.dst1); + adjust_split_source_coords(&orig->x, &split_coords.x, x_scale); + } else { + split_coords.y.dst0 += h; + split_coords.y.dst1 = MIN2(split_coords.y.dst0 + h, orig->y.dst1); + adjust_split_source_coords(&orig->y, &split_coords.y, y_scale); + } + } while (true); +} + +void +blorp_blit(struct blorp_batch *batch, + const struct blorp_surf *src_surf, + unsigned src_level, unsigned src_layer, + enum isl_format src_format, struct isl_swizzle src_swizzle, + const struct blorp_surf *dst_surf, + unsigned dst_level, unsigned dst_layer, + enum isl_format dst_format, struct isl_swizzle dst_swizzle, + float src_x0, float src_y0, + float src_x1, float src_y1, + float dst_x0, float dst_y0, + float dst_x1, float dst_y1, + GLenum filter, bool mirror_x, bool mirror_y) +{ + struct blorp_params params; + blorp_params_init(¶ms); + + brw_blorp_surface_info_init(batch->blorp, ¶ms.src, src_surf, src_level, + src_layer, src_format, false); + brw_blorp_surface_info_init(batch->blorp, ¶ms.dst, dst_surf, dst_level, + dst_layer, dst_format, true); + + params.src.view.swizzle = src_swizzle; + params.dst.view.swizzle = dst_swizzle; + + struct brw_blorp_blit_prog_key wm_prog_key = { + .shader_type = BLORP_SHADER_TYPE_BLIT + }; + + /* Scaled blitting or not. */ + wm_prog_key.blit_scaled = + ((dst_x1 - dst_x0) == (src_x1 - src_x0) && + (dst_y1 - dst_y0) == (src_y1 - src_y0)) ? false : true; + + /* Scaling factors used for bilinear filtering in multisample scaled + * blits. + */ + if (params.src.surf.samples == 16) + wm_prog_key.x_scale = 4.0f; + else + wm_prog_key.x_scale = 2.0f; + wm_prog_key.y_scale = params.src.surf.samples / wm_prog_key.x_scale; + + if (filter == GL_LINEAR && + params.src.surf.samples <= 1 && params.dst.surf.samples <= 1) + wm_prog_key.bilinear_filter = true; + + if ((params.src.surf.usage & ISL_SURF_USAGE_DEPTH_BIT) == 0 && + (params.src.surf.usage & ISL_SURF_USAGE_STENCIL_BIT) == 0 && + !isl_format_has_int_channel(params.src.surf.format) && + params.src.surf.samples > 1 && params.dst.surf.samples <= 1) { + /* We are downsampling a non-integer color buffer, so blend. + * + * Regarding integer color buffers, the OpenGL ES 3.2 spec says: + * + * "If the source formats are integer types or stencil values, a + * single sample's value is selected for each pixel." + * + * This implies we should not blend in that case. + */ + wm_prog_key.blend = true; + } + + params.wm_inputs.rect_grid.x1 = + minify(params.src.surf.logical_level0_px.width, src_level) * + wm_prog_key.x_scale - 1.0f; + params.wm_inputs.rect_grid.y1 = + minify(params.src.surf.logical_level0_px.height, src_level) * + wm_prog_key.y_scale - 1.0f; + + struct blt_coords coords = { + .x = { + .src0 = src_x0, + .src1 = src_x1, + .dst0 = dst_x0, + .dst1 = dst_x1, + .mirror = mirror_x + }, + .y = { + .src0 = src_y0, + .src1 = src_y1, + .dst0 = dst_y0, + .dst1 = dst_y1, + .mirror = mirror_y + } + }; + + do_blorp_blit(batch, ¶ms, &wm_prog_key, &coords); +} + +static enum isl_format +get_copy_format_for_bpb(const struct isl_device *isl_dev, unsigned bpb) +{ + /* The choice of UNORM and UINT formats is very intentional here. Most + * of the time, we want to use a UINT format to avoid any rounding error + * in the blit. For stencil blits, R8_UINT is required by the hardware. + * (It's the only format allowed in conjunction with W-tiling.) Also we + * intentionally use the 4-channel formats whenever we can. This is so + * that, when we do a RGB <-> RGBX copy, the two formats will line up + * even though one of them is 3/4 the size of the other. The choice of + * UNORM vs. UINT is also very intentional because we don't have 8 or + * 16-bit RGB UINT formats until Sky Lake so we have to use UNORM there. + * Fortunately, the only time we should ever use two different formats in + * the table below is for RGB -> RGBA blits and so we will never have any + * UNORM/UINT mismatch. + */ + if (ISL_DEV_GEN(isl_dev) >= 9) { + switch (bpb) { + case 8: return ISL_FORMAT_R8_UINT; + case 16: return ISL_FORMAT_R8G8_UINT; + case 24: return ISL_FORMAT_R8G8B8_UINT; + case 32: return ISL_FORMAT_R8G8B8A8_UINT; + case 48: return ISL_FORMAT_R16G16B16_UINT; + case 64: return ISL_FORMAT_R16G16B16A16_UINT; + case 96: return ISL_FORMAT_R32G32B32_UINT; + case 128:return ISL_FORMAT_R32G32B32A32_UINT; + default: + unreachable("Unknown format bpb"); + } + } else { + switch (bpb) { + case 8: return ISL_FORMAT_R8_UINT; + case 16: return ISL_FORMAT_R8G8_UINT; + case 24: return ISL_FORMAT_R8G8B8_UNORM; + case 32: return ISL_FORMAT_R8G8B8A8_UNORM; + case 48: return ISL_FORMAT_R16G16B16_UNORM; + case 64: return ISL_FORMAT_R16G16B16A16_UNORM; + case 96: return ISL_FORMAT_R32G32B32_UINT; + case 128:return ISL_FORMAT_R32G32B32A32_UINT; + default: + unreachable("Unknown format bpb"); + } + } +} + +/** Returns a UINT format that is CCS-compatible with the given format + * + * The PRM's say absolutely nothing about how render compression works. The + * only thing they provide is a list of formats on which it is and is not + * supported. Empirical testing indicates that the compression is only based + * on the bit-layout of the format and the channel encoding doesn't matter. + * So, while texture views don't work in general, you can create a view as + * long as the bit-layout of the formats are the same. + * + * Fortunately, for every render compression capable format, the UINT format + * with the same bit layout also supports render compression. This means that + * we only need to handle UINT formats for copy operations. In order to do + * copies between formats with different bit layouts, we attach both with a + * UINT format and use bit_cast_color() to generate code to do the bit-cast + * operation between the two bit layouts. + */ +static enum isl_format +get_ccs_compatible_uint_format(const struct isl_format_layout *fmtl) +{ + switch (fmtl->format) { + case ISL_FORMAT_R32G32B32A32_FLOAT: + case ISL_FORMAT_R32G32B32A32_SINT: + case ISL_FORMAT_R32G32B32A32_UINT: + case ISL_FORMAT_R32G32B32A32_UNORM: + case ISL_FORMAT_R32G32B32A32_SNORM: + return ISL_FORMAT_R32G32B32A32_UINT; + + case ISL_FORMAT_R16G16B16A16_UNORM: + case ISL_FORMAT_R16G16B16A16_SNORM: + case ISL_FORMAT_R16G16B16A16_SINT: + case ISL_FORMAT_R16G16B16A16_UINT: + case ISL_FORMAT_R16G16B16A16_FLOAT: + case ISL_FORMAT_R16G16B16X16_UNORM: + case ISL_FORMAT_R16G16B16X16_FLOAT: + return ISL_FORMAT_R16G16B16A16_UINT; + + case ISL_FORMAT_R32G32_FLOAT: + case ISL_FORMAT_R32G32_SINT: + case ISL_FORMAT_R32G32_UINT: + case ISL_FORMAT_R32G32_UNORM: + case ISL_FORMAT_R32G32_SNORM: + return ISL_FORMAT_R32G32_UINT; + + case ISL_FORMAT_B8G8R8A8_UNORM: + case ISL_FORMAT_B8G8R8A8_UNORM_SRGB: + case ISL_FORMAT_R8G8B8A8_UNORM: + case ISL_FORMAT_R8G8B8A8_UNORM_SRGB: + case ISL_FORMAT_R8G8B8A8_SNORM: + case ISL_FORMAT_R8G8B8A8_SINT: + case ISL_FORMAT_R8G8B8A8_UINT: + case ISL_FORMAT_B8G8R8X8_UNORM: + case ISL_FORMAT_B8G8R8X8_UNORM_SRGB: + case ISL_FORMAT_R8G8B8X8_UNORM: + case ISL_FORMAT_R8G8B8X8_UNORM_SRGB: + return ISL_FORMAT_R8G8B8A8_UINT; + + case ISL_FORMAT_R16G16_UNORM: + case ISL_FORMAT_R16G16_SNORM: + case ISL_FORMAT_R16G16_SINT: + case ISL_FORMAT_R16G16_UINT: + case ISL_FORMAT_R16G16_FLOAT: + return ISL_FORMAT_R16G16_UINT; + + case ISL_FORMAT_R32_SINT: + case ISL_FORMAT_R32_UINT: + case ISL_FORMAT_R32_FLOAT: + case ISL_FORMAT_R32_UNORM: + case ISL_FORMAT_R32_SNORM: + return ISL_FORMAT_R32_UINT; + + default: + unreachable("Not a compressible format"); + } +} + +/* Takes an isl_color_value and returns a color value that is the original + * color value only bit-casted to a UINT format. This value, together with + * the format from get_ccs_compatible_uint_format, will yield the same bit + * value as the original color and format. + */ +static union isl_color_value +bitcast_color_value_to_uint(union isl_color_value color, + const struct isl_format_layout *fmtl) +{ + /* All CCS formats have the same number of bits in each channel */ + const struct isl_channel_layout *chan = &fmtl->channels.r; + + union isl_color_value bits; + switch (chan->type) { + case ISL_UINT: + case ISL_SINT: + /* Hardware will ignore the high bits so there's no need to cast */ + bits = color; + break; + + case ISL_UNORM: + for (unsigned i = 0; i < 4; i++) + bits.u32[i] = _mesa_float_to_unorm(color.f32[i], chan->bits); + break; + + case ISL_SNORM: + for (unsigned i = 0; i < 4; i++) + bits.i32[i] = _mesa_float_to_snorm(color.f32[i], chan->bits); + break; + + case ISL_SFLOAT: + switch (chan->bits) { + case 16: + for (unsigned i = 0; i < 4; i++) + bits.u32[i] = _mesa_float_to_half(color.f32[i]); + break; + + case 32: + bits = color; + break; + + default: + unreachable("Invalid float format size"); + } + break; + + default: + unreachable("Invalid channel type"); + } + + switch (fmtl->format) { + case ISL_FORMAT_B8G8R8A8_UNORM: + case ISL_FORMAT_B8G8R8A8_UNORM_SRGB: + case ISL_FORMAT_B8G8R8X8_UNORM: + case ISL_FORMAT_B8G8R8X8_UNORM_SRGB: { + /* If it's a BGRA format, we need to swap blue and red */ + uint32_t tmp = bits.u32[0]; + bits.u32[0] = bits.u32[2]; + bits.u32[2] = tmp; + break; + } + + default: + break; /* Nothing to do */ + } + + return bits; +} + +static void +surf_convert_to_uncompressed(const struct isl_device *isl_dev, + struct brw_blorp_surface_info *info, + uint32_t *x, uint32_t *y, + uint32_t *width, uint32_t *height) +{ + const struct isl_format_layout *fmtl = + isl_format_get_layout(info->surf.format); + + assert(fmtl->bw > 1 || fmtl->bh > 1); + + /* This is a compressed surface. We need to convert it to a single + * slice (because compressed layouts don't perfectly match uncompressed + * ones with the same bpb) and divide x, y, width, and height by the + * block size. + */ + surf_convert_to_single_slice(isl_dev, info); + + if (width || height) { +#ifndef NDEBUG + uint32_t right_edge_px = info->tile_x_sa + *x + *width; + uint32_t bottom_edge_px = info->tile_y_sa + *y + *height; + assert(*width % fmtl->bw == 0 || + right_edge_px == info->surf.logical_level0_px.width); + assert(*height % fmtl->bh == 0 || + bottom_edge_px == info->surf.logical_level0_px.height); +#endif + *width = DIV_ROUND_UP(*width, fmtl->bw); + *height = DIV_ROUND_UP(*height, fmtl->bh); + } + + assert(*x % fmtl->bw == 0); + assert(*y % fmtl->bh == 0); + *x /= fmtl->bw; + *y /= fmtl->bh; + + info->surf.logical_level0_px.width = + DIV_ROUND_UP(info->surf.logical_level0_px.width, fmtl->bw); + info->surf.logical_level0_px.height = + DIV_ROUND_UP(info->surf.logical_level0_px.height, fmtl->bh); + + assert(info->surf.phys_level0_sa.width % fmtl->bw == 0); + assert(info->surf.phys_level0_sa.height % fmtl->bh == 0); + info->surf.phys_level0_sa.width /= fmtl->bw; + info->surf.phys_level0_sa.height /= fmtl->bh; + + assert(info->tile_x_sa % fmtl->bw == 0); + assert(info->tile_y_sa % fmtl->bh == 0); + info->tile_x_sa /= fmtl->bw; + info->tile_y_sa /= fmtl->bh; + + /* It's now an uncompressed surface so we need an uncompressed format */ + info->surf.format = get_copy_format_for_bpb(isl_dev, fmtl->bpb); +} + +void +blorp_copy(struct blorp_batch *batch, + const struct blorp_surf *src_surf, + unsigned src_level, unsigned src_layer, + const struct blorp_surf *dst_surf, + unsigned dst_level, unsigned dst_layer, + uint32_t src_x, uint32_t src_y, + uint32_t dst_x, uint32_t dst_y, + uint32_t src_width, uint32_t src_height) +{ + const struct isl_device *isl_dev = batch->blorp->isl_dev; + struct blorp_params params; + + if (src_width == 0 || src_height == 0) + return; + + blorp_params_init(¶ms); + brw_blorp_surface_info_init(batch->blorp, ¶ms.src, src_surf, src_level, + src_layer, ISL_FORMAT_UNSUPPORTED, false); + brw_blorp_surface_info_init(batch->blorp, ¶ms.dst, dst_surf, dst_level, + dst_layer, ISL_FORMAT_UNSUPPORTED, true); + + struct brw_blorp_blit_prog_key wm_prog_key = { + .shader_type = BLORP_SHADER_TYPE_BLIT + }; + + const struct isl_format_layout *src_fmtl = + isl_format_get_layout(params.src.surf.format); + const struct isl_format_layout *dst_fmtl = + isl_format_get_layout(params.dst.surf.format); + + assert(params.src.aux_usage == ISL_AUX_USAGE_NONE || + params.src.aux_usage == ISL_AUX_USAGE_MCS || + params.src.aux_usage == ISL_AUX_USAGE_CCS_E); + assert(params.dst.aux_usage == ISL_AUX_USAGE_NONE || + params.dst.aux_usage == ISL_AUX_USAGE_MCS || + params.dst.aux_usage == ISL_AUX_USAGE_CCS_E); + + if (params.dst.aux_usage == ISL_AUX_USAGE_CCS_E) { + params.dst.view.format = get_ccs_compatible_uint_format(dst_fmtl); + if (params.src.aux_usage == ISL_AUX_USAGE_CCS_E) { + params.src.view.format = get_ccs_compatible_uint_format(src_fmtl); + } else if (src_fmtl->bpb == dst_fmtl->bpb) { + params.src.view.format = params.dst.view.format; + } else { + params.src.view.format = + get_copy_format_for_bpb(isl_dev, src_fmtl->bpb); + } + } else if (params.src.aux_usage == ISL_AUX_USAGE_CCS_E) { + params.src.view.format = get_ccs_compatible_uint_format(src_fmtl); + if (src_fmtl->bpb == dst_fmtl->bpb) { + params.dst.view.format = params.src.view.format; + } else { + params.dst.view.format = + get_copy_format_for_bpb(isl_dev, dst_fmtl->bpb); + } + } else { + params.dst.view.format = get_copy_format_for_bpb(isl_dev, dst_fmtl->bpb); + params.src.view.format = get_copy_format_for_bpb(isl_dev, src_fmtl->bpb); + } + + if (params.src.aux_usage == ISL_AUX_USAGE_CCS_E) { + params.src.clear_color = + bitcast_color_value_to_uint(params.src.clear_color, src_fmtl); + } + + if (params.dst.aux_usage == ISL_AUX_USAGE_CCS_E) { + params.dst.clear_color = + bitcast_color_value_to_uint(params.dst.clear_color, dst_fmtl); + } + + wm_prog_key.src_bpc = + isl_format_get_layout(params.src.view.format)->channels.r.bits; + wm_prog_key.dst_bpc = + isl_format_get_layout(params.dst.view.format)->channels.r.bits; + + if (src_fmtl->bw > 1 || src_fmtl->bh > 1) { + surf_convert_to_uncompressed(batch->blorp->isl_dev, ¶ms.src, + &src_x, &src_y, &src_width, &src_height); + wm_prog_key.need_src_offset = true; + } + + if (dst_fmtl->bw > 1 || dst_fmtl->bh > 1) { + surf_convert_to_uncompressed(batch->blorp->isl_dev, ¶ms.dst, + &dst_x, &dst_y, NULL, NULL); + wm_prog_key.need_dst_offset = true; + } + + /* Once both surfaces are stompped to uncompressed as needed, the + * destination size is the same as the source size. + */ + uint32_t dst_width = src_width; + uint32_t dst_height = src_height; + + struct blt_coords coords = { + .x = { + .src0 = src_x, + .src1 = src_x + src_width, + .dst0 = dst_x, + .dst1 = dst_x + dst_width, + .mirror = false + }, + .y = { + .src0 = src_y, + .src1 = src_y + src_height, + .dst0 = dst_y, + .dst1 = dst_y + dst_height, + .mirror = false + } + }; + + do_blorp_blit(batch, ¶ms, &wm_prog_key, &coords); +} diff -Nru mesa-12.0.6/src/intel/blorp/blorp.c mesa-17.0.7/src/intel/blorp/blorp.c --- mesa-12.0.6/src/intel/blorp/blorp.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/blorp/blorp.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,281 @@ +/* + * Copyright © 2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include + +#include "program/prog_instruction.h" + +#include "blorp_priv.h" +#include "brw_compiler.h" +#include "brw_nir.h" + +void +blorp_init(struct blorp_context *blorp, void *driver_ctx, + struct isl_device *isl_dev) +{ + blorp->driver_ctx = driver_ctx; + blorp->isl_dev = isl_dev; +} + +void +blorp_finish(struct blorp_context *blorp) +{ + blorp->driver_ctx = NULL; +} + +void +blorp_batch_init(struct blorp_context *blorp, + struct blorp_batch *batch, void *driver_batch, + enum blorp_batch_flags flags) +{ + batch->blorp = blorp; + batch->driver_batch = driver_batch; + batch->flags = flags; +} + +void +blorp_batch_finish(struct blorp_batch *batch) +{ + batch->blorp = NULL; +} + +void +brw_blorp_surface_info_init(struct blorp_context *blorp, + struct brw_blorp_surface_info *info, + const struct blorp_surf *surf, + unsigned int level, unsigned int layer, + enum isl_format format, bool is_render_target) +{ + info->enabled = true; + + if (format == ISL_FORMAT_UNSUPPORTED) + format = surf->surf->format; + + if (format == ISL_FORMAT_R24_UNORM_X8_TYPELESS) { + /* Unfortunately, ISL_FORMAT_R24_UNORM_X8_TYPELESS it isn't supported as + * a render target, which would prevent us from blitting to 24-bit + * depth. The miptree consists of 32 bits per pixel, arranged as 24-bit + * depth values interleaved with 8 "don't care" bits. Since depth + * values don't require any blending, it doesn't matter how we interpret + * the bit pattern as long as we copy the right amount of data, so just + * map it as 8-bit BGRA. + */ + format = ISL_FORMAT_B8G8R8A8_UNORM; + } else if (surf->surf->usage & ISL_SURF_USAGE_STENCIL_BIT) { + assert(surf->surf->format == ISL_FORMAT_R8_UINT); + /* Prior to Broadwell, we can't render to R8_UINT */ + if (blorp->isl_dev->info->gen < 8) + format = ISL_FORMAT_R8_UNORM; + } + + info->surf = *surf->surf; + info->addr = surf->addr; + + info->aux_usage = surf->aux_usage; + if (info->aux_usage != ISL_AUX_USAGE_NONE) { + info->aux_surf = *surf->aux_surf; + info->aux_addr = surf->aux_addr; + } + + info->clear_color = surf->clear_color; + + info->view = (struct isl_view) { + .usage = is_render_target ? ISL_SURF_USAGE_RENDER_TARGET_BIT : + ISL_SURF_USAGE_TEXTURE_BIT, + .format = format, + .base_level = level, + .levels = 1, + .swizzle = ISL_SWIZZLE_IDENTITY, + }; + + info->view.array_len = MAX2(info->surf.logical_level0_px.depth, + info->surf.logical_level0_px.array_len); + + if (!is_render_target && + (info->surf.dim == ISL_SURF_DIM_3D || + info->surf.msaa_layout == ISL_MSAA_LAYOUT_ARRAY)) { + /* 3-D textures don't support base_array layer and neither do 2-D + * multisampled textures on IVB so we need to pass it through the + * sampler in those cases. These are also two cases where we are + * guaranteed that we won't be doing any funny surface hacks. + */ + info->view.base_array_layer = 0; + info->z_offset = layer; + } else { + info->view.base_array_layer = layer; + + assert(info->view.array_len >= info->view.base_array_layer); + info->view.array_len -= info->view.base_array_layer; + info->z_offset = 0; + } + + /* Sandy Bridge has a limit of a maximum of 512 layers for layered + * rendering. + */ + if (is_render_target && blorp->isl_dev->info->gen == 6) + info->view.array_len = MIN2(info->view.array_len, 512); +} + + +void +blorp_params_init(struct blorp_params *params) +{ + memset(params, 0, sizeof(*params)); + params->num_samples = 1; + params->num_draw_buffers = 1; + params->num_layers = 1; +} + +void +brw_blorp_init_wm_prog_key(struct brw_wm_prog_key *wm_key) +{ + memset(wm_key, 0, sizeof(*wm_key)); + wm_key->nr_color_regions = 1; + for (int i = 0; i < MAX_SAMPLERS; i++) + wm_key->tex.swizzles[i] = SWIZZLE_XYZW; +} + +const unsigned * +blorp_compile_fs(struct blorp_context *blorp, void *mem_ctx, + struct nir_shader *nir, + const struct brw_wm_prog_key *wm_key, + bool use_repclear, + struct brw_wm_prog_data *wm_prog_data, + unsigned *program_size) +{ + const struct brw_compiler *compiler = blorp->compiler; + + nir->options = + compiler->glsl_compiler_options[MESA_SHADER_FRAGMENT].NirOptions; + + memset(wm_prog_data, 0, sizeof(*wm_prog_data)); + + assert(exec_list_is_empty(&nir->uniforms)); + wm_prog_data->base.nr_params = 0; + wm_prog_data->base.param = NULL; + + /* BLORP always just uses the first two binding table entries */ + wm_prog_data->binding_table.render_target_start = BLORP_RENDERBUFFER_BT_INDEX; + wm_prog_data->base.binding_table.texture_start = BLORP_TEXTURE_BT_INDEX; + + nir = brw_preprocess_nir(compiler, nir); + nir_remove_dead_variables(nir, nir_var_shader_in); + nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir)); + + const unsigned *program = + brw_compile_fs(compiler, blorp->driver_ctx, mem_ctx, wm_key, + wm_prog_data, nir, NULL, -1, -1, false, use_repclear, + NULL, program_size, NULL); + + return program; +} + +const unsigned * +blorp_compile_vs(struct blorp_context *blorp, void *mem_ctx, + struct nir_shader *nir, + struct brw_vs_prog_data *vs_prog_data, + unsigned *program_size) +{ + const struct brw_compiler *compiler = blorp->compiler; + + nir->options = + compiler->glsl_compiler_options[MESA_SHADER_VERTEX].NirOptions; + + nir = brw_preprocess_nir(compiler, nir); + nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir)); + + vs_prog_data->inputs_read = nir->info->inputs_read; + + brw_compute_vue_map(compiler->devinfo, + &vs_prog_data->base.vue_map, + nir->info->outputs_written, + nir->info->separate_shader); + + struct brw_vs_prog_key vs_key = { 0, }; + + const unsigned *program = + brw_compile_vs(compiler, blorp->driver_ctx, mem_ctx, + &vs_key, vs_prog_data, nir, + NULL, false, -1, program_size, NULL); + + return program; +} + +void +blorp_gen6_hiz_op(struct blorp_batch *batch, + struct blorp_surf *surf, unsigned level, unsigned layer, + enum blorp_hiz_op op) +{ + struct blorp_params params; + blorp_params_init(¶ms); + + params.hiz_op = op; + + brw_blorp_surface_info_init(batch->blorp, ¶ms.depth, surf, level, layer, + surf->surf->format, true); + + /* Align the rectangle primitive to 8x4 pixels. + * + * During fast depth clears, the emitted rectangle primitive must be + * aligned to 8x4 pixels. From the Ivybridge PRM, Vol 2 Part 1 Section + * 11.5.3.1 Depth Buffer Clear (and the matching section in the Sandybridge + * PRM): + * If Number of Multisamples is NUMSAMPLES_1, the rectangle must be + * aligned to an 8x4 pixel block relative to the upper left corner + * of the depth buffer [...] + * + * For hiz resolves, the rectangle must also be 8x4 aligned. Item + * WaHizAmbiguate8x4Aligned from the Haswell workarounds page and the + * Ivybridge simulator require the alignment. + * + * To be safe, let's just align the rect for all hiz operations and all + * hardware generations. + * + * However, for some miptree slices of a Z24 texture, emitting an 8x4 + * aligned rectangle that covers the slice may clobber adjacent slices if + * we strictly adhered to the texture alignments specified in the PRM. The + * Ivybridge PRM, Section "Alignment Unit Size", states that + * SURFACE_STATE.Surface_Horizontal_Alignment should be 4 for Z24 surfaces, + * not 8. But commit 1f112cc increased the alignment from 4 to 8, which + * prevents the clobbering. + */ + params.x1 = minify(params.depth.surf.logical_level0_px.width, + params.depth.view.base_level); + params.y1 = minify(params.depth.surf.logical_level0_px.height, + params.depth.view.base_level); + params.x1 = ALIGN(params.x1, 8); + params.y1 = ALIGN(params.y1, 4); + + if (params.depth.view.base_level == 0) { + /* TODO: What about MSAA? */ + params.depth.surf.logical_level0_px.width = params.x1; + params.depth.surf.logical_level0_px.height = params.y1; + } + + params.dst.surf.samples = params.depth.surf.samples; + params.dst.surf.logical_level0_px = params.depth.surf.logical_level0_px; + params.depth_format = isl_format_get_depth_format(surf->surf->format, false); + params.num_samples = params.depth.surf.samples; + + batch->blorp->exec(batch, ¶ms); +} diff -Nru mesa-12.0.6/src/intel/blorp/blorp_clear.c mesa-17.0.7/src/intel/blorp/blorp_clear.c --- mesa-12.0.6/src/intel/blorp/blorp_clear.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/blorp/blorp_clear.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,723 @@ +/* + * Copyright © 2013 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "util/ralloc.h" + +#include "main/macros.h" /* Needed for MAX3 and MAX2 for format_rgb9e5 */ +#include "util/format_rgb9e5.h" + +#include "blorp_priv.h" +#include "brw_defines.h" + +#include "compiler/nir/nir_builder.h" + +#define FILE_DEBUG_FLAG DEBUG_BLORP + +struct brw_blorp_const_color_prog_key +{ + enum blorp_shader_type shader_type; /* Must be BLORP_SHADER_TYPE_CLEAR */ + bool use_simd16_replicated_data; + bool pad[3]; +}; + +static void +blorp_params_get_clear_kernel(struct blorp_context *blorp, + struct blorp_params *params, + bool use_replicated_data) +{ + const struct brw_blorp_const_color_prog_key blorp_key = { + .shader_type = BLORP_SHADER_TYPE_CLEAR, + .use_simd16_replicated_data = use_replicated_data, + }; + + if (blorp->lookup_shader(blorp, &blorp_key, sizeof(blorp_key), + ¶ms->wm_prog_kernel, ¶ms->wm_prog_data)) + return; + + void *mem_ctx = ralloc_context(NULL); + + nir_builder b; + nir_builder_init_simple_shader(&b, mem_ctx, MESA_SHADER_FRAGMENT, NULL); + b.shader->info->name = ralloc_strdup(b.shader, "BLORP-clear"); + + nir_variable *v_color = + BLORP_CREATE_NIR_INPUT(b.shader, clear_color, glsl_vec4_type()); + + nir_variable *frag_color = nir_variable_create(b.shader, nir_var_shader_out, + glsl_vec4_type(), + "gl_FragColor"); + frag_color->data.location = FRAG_RESULT_COLOR; + + nir_copy_var(&b, frag_color, v_color); + + struct brw_wm_prog_key wm_key; + brw_blorp_init_wm_prog_key(&wm_key); + + struct brw_wm_prog_data prog_data; + unsigned program_size; + const unsigned *program = + blorp_compile_fs(blorp, mem_ctx, b.shader, &wm_key, use_replicated_data, + &prog_data, &program_size); + + blorp->upload_shader(blorp, &blorp_key, sizeof(blorp_key), + program, program_size, + &prog_data.base, sizeof(prog_data), + ¶ms->wm_prog_kernel, ¶ms->wm_prog_data); + + ralloc_free(mem_ctx); +} + +struct layer_offset_vs_key { + enum blorp_shader_type shader_type; + unsigned num_inputs; +}; + +/* In the case of doing attachment clears, we are using a surface state that + * is handed to us so we can't set (and don't even know) the base array layer. + * In order to do a layered clear in this scenario, we need some way of adding + * the base array layer to the instance id. Unfortunately, our hardware has + * no real concept of "base instance", so we have to do it manually in a + * vertex shader. + */ +static void +blorp_params_get_layer_offset_vs(struct blorp_context *blorp, + struct blorp_params *params) +{ + struct layer_offset_vs_key blorp_key = { + .shader_type = BLORP_SHADER_TYPE_LAYER_OFFSET_VS, + }; + + if (params->wm_prog_data) + blorp_key.num_inputs = params->wm_prog_data->num_varying_inputs; + + if (blorp->lookup_shader(blorp, &blorp_key, sizeof(blorp_key), + ¶ms->vs_prog_kernel, ¶ms->vs_prog_data)) + return; + + void *mem_ctx = ralloc_context(NULL); + + nir_builder b; + nir_builder_init_simple_shader(&b, mem_ctx, MESA_SHADER_VERTEX, NULL); + b.shader->info->name = ralloc_strdup(b.shader, "BLORP-layer-offset-vs"); + + const struct glsl_type *uvec4_type = glsl_vector_type(GLSL_TYPE_UINT, 4); + + /* First we deal with the header which has instance and base instance */ + nir_variable *a_header = nir_variable_create(b.shader, nir_var_shader_in, + uvec4_type, "header"); + a_header->data.location = VERT_ATTRIB_GENERIC0; + + nir_variable *v_layer = nir_variable_create(b.shader, nir_var_shader_out, + glsl_int_type(), "layer_id"); + v_layer->data.location = VARYING_SLOT_LAYER; + + /* Compute the layer id */ + nir_ssa_def *header = nir_load_var(&b, a_header); + nir_ssa_def *base_layer = nir_channel(&b, header, 0); + nir_ssa_def *instance = nir_channel(&b, header, 1); + nir_store_var(&b, v_layer, nir_iadd(&b, instance, base_layer), 0x1); + + /* Then we copy the vertex from the next slot to VARYING_SLOT_POS */ + nir_variable *a_vertex = nir_variable_create(b.shader, nir_var_shader_in, + glsl_vec4_type(), "a_vertex"); + a_vertex->data.location = VERT_ATTRIB_GENERIC1; + + nir_variable *v_pos = nir_variable_create(b.shader, nir_var_shader_out, + glsl_vec4_type(), "v_pos"); + v_pos->data.location = VARYING_SLOT_POS; + + nir_copy_var(&b, v_pos, a_vertex); + + /* Then we copy everything else */ + for (unsigned i = 0; i < blorp_key.num_inputs; i++) { + nir_variable *a_in = nir_variable_create(b.shader, nir_var_shader_in, + uvec4_type, "input"); + a_in->data.location = VERT_ATTRIB_GENERIC2 + i; + + nir_variable *v_out = nir_variable_create(b.shader, nir_var_shader_out, + uvec4_type, "output"); + v_out->data.location = VARYING_SLOT_VAR0 + i; + + nir_copy_var(&b, v_out, a_in); + } + + struct brw_vs_prog_data vs_prog_data; + memset(&vs_prog_data, 0, sizeof(vs_prog_data)); + + unsigned program_size; + const unsigned *program = + blorp_compile_vs(blorp, mem_ctx, b.shader, &vs_prog_data, &program_size); + + blorp->upload_shader(blorp, &blorp_key, sizeof(blorp_key), + program, program_size, + &vs_prog_data.base.base, sizeof(vs_prog_data), + ¶ms->vs_prog_kernel, ¶ms->vs_prog_data); + + ralloc_free(mem_ctx); +} + +/* The x0, y0, x1, and y1 parameters must already be populated with the render + * area of the framebuffer to be cleared. + */ +static void +get_fast_clear_rect(const struct isl_device *dev, + const struct isl_surf *aux_surf, + unsigned *x0, unsigned *y0, + unsigned *x1, unsigned *y1) +{ + unsigned int x_align, y_align; + unsigned int x_scaledown, y_scaledown; + + /* Only single sampled surfaces need to (and actually can) be resolved. */ + if (aux_surf->usage == ISL_SURF_USAGE_CCS_BIT) { + /* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render + * Target(s)", beneath the "Fast Color Clear" bullet (p327): + * + * Clear pass must have a clear rectangle that must follow + * alignment rules in terms of pixels and lines as shown in the + * table below. Further, the clear-rectangle height and width + * must be multiple of the following dimensions. If the height + * and width of the render target being cleared do not meet these + * requirements, an MCS buffer can be created such that it + * follows the requirement and covers the RT. + * + * The alignment size in the table that follows is related to the + * alignment size that is baked into the CCS surface format but with X + * alignment multiplied by 16 and Y alignment multiplied by 32. + */ + x_align = isl_format_get_layout(aux_surf->format)->bw; + y_align = isl_format_get_layout(aux_surf->format)->bh; + + x_align *= 16; + + /* SKL+ line alignment requirement for Y-tiled are half those of the prior + * generations. + */ + if (dev->info->gen >= 9) + y_align *= 16; + else + y_align *= 32; + + /* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render + * Target(s)", beneath the "Fast Color Clear" bullet (p327): + * + * In order to optimize the performance MCS buffer (when bound to + * 1X RT) clear similarly to MCS buffer clear for MSRT case, + * clear rect is required to be scaled by the following factors + * in the horizontal and vertical directions: + * + * The X and Y scale down factors in the table that follows are each + * equal to half the alignment value computed above. + */ + x_scaledown = x_align / 2; + y_scaledown = y_align / 2; + + /* From BSpec: 3D-Media-GPGPU Engine > 3D Pipeline > Pixel > Pixel + * Backend > MCS Buffer for Render Target(s) [DevIVB+] > Table "Color + * Clear of Non-MultiSampled Render Target Restrictions": + * + * Clear rectangle must be aligned to two times the number of + * pixels in the table shown below due to 16x16 hashing across the + * slice. + */ + x_align *= 2; + y_align *= 2; + } else { + assert(aux_surf->usage == ISL_SURF_USAGE_MCS_BIT); + + /* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render + * Target(s)", beneath the "MSAA Compression" bullet (p326): + * + * Clear pass for this case requires that scaled down primitive + * is sent down with upper left co-ordinate to coincide with + * actual rectangle being cleared. For MSAA, clear rectangle’s + * height and width need to as show in the following table in + * terms of (width,height) of the RT. + * + * MSAA Width of Clear Rect Height of Clear Rect + * 2X Ceil(1/8*width) Ceil(1/2*height) + * 4X Ceil(1/8*width) Ceil(1/2*height) + * 8X Ceil(1/2*width) Ceil(1/2*height) + * 16X width Ceil(1/2*height) + * + * The text "with upper left co-ordinate to coincide with actual + * rectangle being cleared" is a little confusing--it seems to imply + * that to clear a rectangle from (x,y) to (x+w,y+h), one needs to + * feed the pipeline using the rectangle (x,y) to + * (x+Ceil(w/N),y+Ceil(h/2)), where N is either 2 or 8 depending on + * the number of samples. Experiments indicate that this is not + * quite correct; actually, what the hardware appears to do is to + * align whatever rectangle is sent down the pipeline to the nearest + * multiple of 2x2 blocks, and then scale it up by a factor of N + * horizontally and 2 vertically. So the resulting alignment is 4 + * vertically and either 4 or 16 horizontally, and the scaledown + * factor is 2 vertically and either 2 or 8 horizontally. + */ + switch (aux_surf->format) { + case ISL_FORMAT_MCS_2X: + case ISL_FORMAT_MCS_4X: + x_scaledown = 8; + break; + case ISL_FORMAT_MCS_8X: + x_scaledown = 2; + break; + case ISL_FORMAT_MCS_16X: + x_scaledown = 1; + break; + default: + unreachable("Unexpected MCS format for fast clear"); + } + y_scaledown = 2; + x_align = x_scaledown * 2; + y_align = y_scaledown * 2; + } + + *x0 = ROUND_DOWN_TO(*x0, x_align) / x_scaledown; + *y0 = ROUND_DOWN_TO(*y0, y_align) / y_scaledown; + *x1 = ALIGN(*x1, x_align) / x_scaledown; + *y1 = ALIGN(*y1, y_align) / y_scaledown; +} + +void +blorp_fast_clear(struct blorp_batch *batch, + const struct blorp_surf *surf, enum isl_format format, + uint32_t level, uint32_t start_layer, uint32_t num_layers, + uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1) +{ + struct blorp_params params; + blorp_params_init(¶ms); + params.num_layers = num_layers; + + params.x0 = x0; + params.y0 = y0; + params.x1 = x1; + params.y1 = y1; + + memset(¶ms.wm_inputs.clear_color, 0xff, 4*sizeof(float)); + params.fast_clear_op = BLORP_FAST_CLEAR_OP_CLEAR; + + get_fast_clear_rect(batch->blorp->isl_dev, surf->aux_surf, + ¶ms.x0, ¶ms.y0, ¶ms.x1, ¶ms.y1); + + blorp_params_get_clear_kernel(batch->blorp, ¶ms, true); + + brw_blorp_surface_info_init(batch->blorp, ¶ms.dst, surf, level, + start_layer, format, true); + params.num_samples = params.dst.surf.samples; + + batch->blorp->exec(batch, ¶ms); +} + +static union isl_color_value +swizzle_color_value(union isl_color_value src, struct isl_swizzle swizzle) +{ + union isl_color_value dst = { .u32 = { 0, } }; + + /* We assign colors in ABGR order so that the first one will be taken in + * RGBA precedence order. According to the PRM docs for shader channel + * select, this matches Haswell hardware behavior. + */ + if ((unsigned)(swizzle.a - ISL_CHANNEL_SELECT_RED) < 4) + dst.u32[swizzle.a - ISL_CHANNEL_SELECT_RED] = src.u32[3]; + if ((unsigned)(swizzle.b - ISL_CHANNEL_SELECT_RED) < 4) + dst.u32[swizzle.b - ISL_CHANNEL_SELECT_RED] = src.u32[2]; + if ((unsigned)(swizzle.g - ISL_CHANNEL_SELECT_RED) < 4) + dst.u32[swizzle.g - ISL_CHANNEL_SELECT_RED] = src.u32[1]; + if ((unsigned)(swizzle.r - ISL_CHANNEL_SELECT_RED) < 4) + dst.u32[swizzle.r - ISL_CHANNEL_SELECT_RED] = src.u32[0]; + + return dst; +} + +void +blorp_clear(struct blorp_batch *batch, + const struct blorp_surf *surf, + enum isl_format format, struct isl_swizzle swizzle, + uint32_t level, uint32_t start_layer, uint32_t num_layers, + uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1, + union isl_color_value clear_color, + const bool color_write_disable[4]) +{ + struct blorp_params params; + blorp_params_init(¶ms); + + params.x0 = x0; + params.y0 = y0; + params.x1 = x1; + params.y1 = y1; + + /* Manually apply the clear destination swizzle. This way swizzled clears + * will work for swizzles which we can't normally use for rendering and it + * also ensures that they work on pre-Haswell hardware which can't swizlle + * at all. + */ + clear_color = swizzle_color_value(clear_color, swizzle); + swizzle = ISL_SWIZZLE_IDENTITY; + + if (format == ISL_FORMAT_R9G9B9E5_SHAREDEXP) { + clear_color.u32[0] = float3_to_rgb9e5(clear_color.f32); + format = ISL_FORMAT_R32_UINT; + } else if (format == ISL_FORMAT_A4B4G4R4_UNORM) { + /* Broadwell and earlier cannot render to this format so we need to work + * around it by swapping the colors around and using B4G4R4A4 instead. + */ + const struct isl_swizzle ARGB = ISL_SWIZZLE(ALPHA, RED, GREEN, BLUE); + clear_color = swizzle_color_value(clear_color, ARGB); + format = ISL_FORMAT_B4G4R4A4_UNORM; + } + + memcpy(¶ms.wm_inputs.clear_color, clear_color.f32, sizeof(float) * 4); + + bool use_simd16_replicated_data = true; + + /* From the SNB PRM (Vol4_Part1): + * + * "Replicated data (Message Type = 111) is only supported when + * accessing tiled memory. Using this Message Type to access linear + * (untiled) memory is UNDEFINED." + */ + if (surf->surf->tiling == ISL_TILING_LINEAR) + use_simd16_replicated_data = false; + + /* Constant color writes ignore everyting in blend and color calculator + * state. This is not documented. + */ + if (color_write_disable) { + for (unsigned i = 0; i < 4; i++) { + params.color_write_disable[i] = color_write_disable[i]; + if (color_write_disable[i]) + use_simd16_replicated_data = false; + } + } + + blorp_params_get_clear_kernel(batch->blorp, ¶ms, + use_simd16_replicated_data); + + while (num_layers > 0) { + brw_blorp_surface_info_init(batch->blorp, ¶ms.dst, surf, level, + start_layer, format, true); + params.dst.view.swizzle = swizzle; + + params.num_samples = params.dst.surf.samples; + + /* We may be restricted on the number of layers we can bind at any one + * time. In particular, Sandy Bridge has a maximum number of layers of + * 512 but a maximum 3D texture size is much larger. + */ + params.num_layers = MIN2(params.dst.view.array_len, num_layers); + batch->blorp->exec(batch, ¶ms); + + start_layer += params.num_layers; + num_layers -= params.num_layers; + } +} + +void +blorp_clear_depth_stencil(struct blorp_batch *batch, + const struct blorp_surf *depth, + const struct blorp_surf *stencil, + uint32_t level, uint32_t start_layer, + uint32_t num_layers, + uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1, + bool clear_depth, float depth_value, + uint8_t stencil_mask, uint8_t stencil_value) +{ + struct blorp_params params; + blorp_params_init(¶ms); + + params.x0 = x0; + params.y0 = y0; + params.x1 = x1; + params.y1 = y1; + + while (num_layers > 0) { + params.num_layers = num_layers; + + if (stencil_mask) { + brw_blorp_surface_info_init(batch->blorp, ¶ms.stencil, stencil, + level, start_layer, + ISL_FORMAT_UNSUPPORTED, true); + params.stencil_mask = stencil_mask; + params.stencil_ref = stencil_value; + + params.dst.surf.samples = params.stencil.surf.samples; + params.dst.surf.logical_level0_px = + params.stencil.surf.logical_level0_px; + params.dst.view = params.depth.view; + + params.num_samples = params.stencil.surf.samples; + + /* We may be restricted on the number of layers we can bind at any + * one time. In particular, Sandy Bridge has a maximum number of + * layers of 512 but a maximum 3D texture size is much larger. + */ + if (params.stencil.view.array_len < params.num_layers) + params.num_layers = params.stencil.view.array_len; + } + + if (clear_depth) { + brw_blorp_surface_info_init(batch->blorp, ¶ms.depth, depth, + level, start_layer, + ISL_FORMAT_UNSUPPORTED, true); + params.z = depth_value; + params.depth_format = + isl_format_get_depth_format(depth->surf->format, false); + + params.dst.surf.samples = params.depth.surf.samples; + params.dst.surf.logical_level0_px = + params.depth.surf.logical_level0_px; + params.dst.view = params.depth.view; + + params.num_samples = params.depth.surf.samples; + + /* We may be restricted on the number of layers we can bind at any + * one time. In particular, Sandy Bridge has a maximum number of + * layers of 512 but a maximum 3D texture size is much larger. + */ + if (params.depth.view.array_len < params.num_layers) + params.num_layers = params.depth.view.array_len; + } + + batch->blorp->exec(batch, ¶ms); + + start_layer += params.num_layers; + num_layers -= params.num_layers; + } +} + +bool +blorp_can_hiz_clear_depth(uint8_t gen, enum isl_format format, + uint32_t num_samples, + uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1) +{ + /* This function currently doesn't support any gen prior to gen8 */ + assert(gen >= 8); + + if (gen == 8 && format == ISL_FORMAT_R16_UNORM) { + /* Apply the D16 alignment restrictions. On BDW, HiZ has an 8x4 sample + * block with the following property: as the number of samples increases, + * the number of pixels representable by this block decreases by a factor + * of the sample dimensions. Sample dimensions scale following the MSAA + * interleaved pattern. + * + * Sample|Sample|Pixel + * Count |Dim |Dim + * =================== + * 1 | 1x1 | 8x4 + * 2 | 2x1 | 4x4 + * 4 | 2x2 | 4x2 + * 8 | 4x2 | 2x2 + * 16 | 4x4 | 2x1 + * + * Table: Pixel Dimensions in a HiZ Sample Block Pre-SKL + */ + const struct isl_extent2d sa_block_dim = + isl_get_interleaved_msaa_px_size_sa(num_samples); + const uint8_t align_px_w = 8 / sa_block_dim.w; + const uint8_t align_px_h = 4 / sa_block_dim.h; + + /* Fast depth clears clear an entire sample block at a time. As a result, + * the rectangle must be aligned to the dimensions of the encompassing + * pixel block for a successful operation. + * + * Fast clears can still work if the upper-left corner is aligned and the + * bottom-rigtht corner touches the edge of a depth buffer whose extent + * is unaligned. This is because each miplevel in the depth buffer is + * padded by the Pixel Dim (similar to a standard compressed texture). + * In this case, the clear rectangle could be padded by to match the full + * depth buffer extent but to support multiple clearing techniques, we + * chose to be unaware of the depth buffer's extent and thus don't handle + * this case. + */ + if (x0 % align_px_w || y0 % align_px_h || + x1 % align_px_w || y1 % align_px_h) + return false; + } + return true; +} + +/* Given a depth stencil attachment, this function performs a fast depth clear + * on a depth portion and a regular clear on the stencil portion. When + * performing a fast depth clear on the depth portion, the HiZ buffer is simply + * tagged as cleared so the depth clear value is not actually needed. + */ +void +blorp_gen8_hiz_clear_attachments(struct blorp_batch *batch, + uint32_t num_samples, + uint32_t x0, uint32_t y0, + uint32_t x1, uint32_t y1, + bool clear_depth, bool clear_stencil, + uint8_t stencil_value) +{ + assert(batch->flags & BLORP_BATCH_NO_EMIT_DEPTH_STENCIL); + + struct blorp_params params; + blorp_params_init(¶ms); + params.num_layers = 1; + params.hiz_op = BLORP_HIZ_OP_DEPTH_CLEAR; + params.x0 = x0; + params.y0 = y0; + params.x1 = x1; + params.y1 = y1; + params.num_samples = num_samples; + params.depth.enabled = clear_depth; + params.stencil.enabled = clear_stencil; + params.stencil_ref = stencil_value; + batch->blorp->exec(batch, ¶ms); +} + +/** Clear active color/depth/stencili attachments + * + * This function performs a clear operation on the currently bound + * color/depth/stencil attachments. It is assumed that any information passed + * in here is valid, consistent, and in-bounds relative to the currently + * attached depth/stencil. The binding_table_offset parameter is the 32-bit + * offset relative to surface state base address where pre-baked binding table + * that we are to use lives. If clear_color is false, binding_table_offset + * must point to a binding table with one entry which is a valid null surface + * that matches the currently bound depth and stencil. + */ +void +blorp_clear_attachments(struct blorp_batch *batch, + uint32_t binding_table_offset, + enum isl_format depth_format, + uint32_t num_samples, + uint32_t start_layer, uint32_t num_layers, + uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1, + bool clear_color, union isl_color_value color_value, + bool clear_depth, float depth_value, + uint8_t stencil_mask, uint8_t stencil_value) +{ + struct blorp_params params; + blorp_params_init(¶ms); + + assert(batch->flags & BLORP_BATCH_NO_EMIT_DEPTH_STENCIL); + + params.x0 = x0; + params.y0 = y0; + params.x1 = x1; + params.y1 = y1; + + params.use_pre_baked_binding_table = true; + params.pre_baked_binding_table_offset = binding_table_offset; + + params.num_layers = num_layers; + params.num_samples = num_samples; + + if (clear_color) { + params.dst.enabled = true; + + memcpy(¶ms.wm_inputs.clear_color, color_value.f32, sizeof(float) * 4); + + /* Unfortunately, without knowing whether or not our destination surface + * is tiled or not, we have to assume it may be linear. This means no + * SIMD16_REPDATA for us. :-( + */ + blorp_params_get_clear_kernel(batch->blorp, ¶ms, false); + } + + if (clear_depth) { + params.depth.enabled = true; + + params.z = depth_value; + params.depth_format = isl_format_get_depth_format(depth_format, false); + } + + if (stencil_mask) { + params.stencil.enabled = true; + + params.stencil_mask = stencil_mask; + params.stencil_ref = stencil_value; + } + + blorp_params_get_layer_offset_vs(batch->blorp, ¶ms); + params.vs_inputs.base_layer = start_layer; + + batch->blorp->exec(batch, ¶ms); +} + +void +blorp_ccs_resolve(struct blorp_batch *batch, + struct blorp_surf *surf, uint32_t level, uint32_t layer, + enum isl_format format, + enum blorp_fast_clear_op resolve_op) +{ + struct blorp_params params; + blorp_params_init(¶ms); + + /* Layered and mipmapped fast clear is only available from Gen8 onwards. */ + assert(ISL_DEV_GEN(batch->blorp->isl_dev) >= 8 || + (level == 0 && layer == 0)); + + brw_blorp_surface_info_init(batch->blorp, ¶ms.dst, surf, + level, layer, format, true); + + /* From the Ivy Bridge PRM, Vol2 Part1 11.9 "Render Target Resolve": + * + * A rectangle primitive must be scaled down by the following factors + * with respect to render target being resolved. + * + * The scaledown factors in the table that follows are related to the block + * size of the CCS format. For IVB and HSW, we divide by two, for BDW we + * multiply by 8 and 16. On Sky Lake, we multiply by 8. + */ + const struct isl_format_layout *aux_fmtl = + isl_format_get_layout(params.dst.aux_surf.format); + assert(aux_fmtl->txc == ISL_TXC_CCS); + + unsigned x_scaledown, y_scaledown; + if (ISL_DEV_GEN(batch->blorp->isl_dev) >= 9) { + x_scaledown = aux_fmtl->bw * 8; + y_scaledown = aux_fmtl->bh * 8; + } else if (ISL_DEV_GEN(batch->blorp->isl_dev) >= 8) { + x_scaledown = aux_fmtl->bw * 8; + y_scaledown = aux_fmtl->bh * 16; + } else { + x_scaledown = aux_fmtl->bw / 2; + y_scaledown = aux_fmtl->bh / 2; + } + params.x0 = params.y0 = 0; + params.x1 = minify(params.dst.aux_surf.logical_level0_px.width, level); + params.y1 = minify(params.dst.aux_surf.logical_level0_px.height, level); + params.x1 = ALIGN(params.x1, x_scaledown) / x_scaledown; + params.y1 = ALIGN(params.y1, y_scaledown) / y_scaledown; + + if (batch->blorp->isl_dev->info->gen >= 9) { + assert(resolve_op == BLORP_FAST_CLEAR_OP_RESOLVE_FULL || + resolve_op == BLORP_FAST_CLEAR_OP_RESOLVE_PARTIAL); + } else { + /* Broadwell and earlier do not have a partial resolve */ + assert(resolve_op == BLORP_FAST_CLEAR_OP_RESOLVE_FULL); + } + params.fast_clear_op = resolve_op; + + /* Note: there is no need to initialize push constants because it doesn't + * matter what data gets dispatched to the render target. However, we must + * ensure that the fragment shader delivers the data using the "replicated + * color" message. + */ + + blorp_params_get_clear_kernel(batch->blorp, ¶ms, true); + + batch->blorp->exec(batch, ¶ms); +} diff -Nru mesa-12.0.6/src/intel/blorp/blorp_genX_exec.h mesa-17.0.7/src/intel/blorp/blorp_genX_exec.h --- mesa-12.0.6/src/intel/blorp/blorp_genX_exec.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/blorp/blorp_genX_exec.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,1485 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef BLORP_GENX_EXEC_H +#define BLORP_GENX_EXEC_H + +#include "blorp_priv.h" +#include "common/gen_device_info.h" +#include "common/gen_sample_positions.h" +#include "intel_aub.h" + +/** + * This file provides the blorp pipeline setup and execution functionality. + * It defines the following function: + * + * static void + * blorp_exec(struct blorp_context *blorp, void *batch_data, + * const struct blorp_params *params); + * + * It is the job of whoever includes this header to wrap this in something + * to get an externally visible symbol. + * + * In order for the blorp_exec function to work, the driver must provide + * implementations of the following static helper functions. + */ + +static void * +blorp_emit_dwords(struct blorp_batch *batch, unsigned n); + +static uint64_t +blorp_emit_reloc(struct blorp_batch *batch, + void *location, struct blorp_address address, uint32_t delta); + +static void * +blorp_alloc_dynamic_state(struct blorp_batch *batch, + enum aub_state_struct_type type, + uint32_t size, + uint32_t alignment, + uint32_t *offset); +static void * +blorp_alloc_vertex_buffer(struct blorp_batch *batch, uint32_t size, + struct blorp_address *addr); + +static void +blorp_alloc_binding_table(struct blorp_batch *batch, unsigned num_entries, + unsigned state_size, unsigned state_alignment, + uint32_t *bt_offset, uint32_t *surface_offsets, + void **surface_maps); + +static void +blorp_flush_range(struct blorp_batch *batch, void *start, size_t size); + +static void +blorp_surface_reloc(struct blorp_batch *batch, uint32_t ss_offset, + struct blorp_address address, uint32_t delta); + +static void +blorp_emit_urb_config(struct blorp_batch *batch, unsigned vs_entry_size); + +/***** BEGIN blorp_exec implementation ******/ + +#include "genxml/gen_macros.h" + +static uint64_t +_blorp_combine_address(struct blorp_batch *batch, void *location, + struct blorp_address address, uint32_t delta) +{ + if (address.buffer == NULL) { + return address.offset + delta; + } else { + return blorp_emit_reloc(batch, location, address, delta); + } +} + +#define __gen_address_type struct blorp_address +#define __gen_user_data struct blorp_batch +#define __gen_combine_address _blorp_combine_address + +#include "genxml/genX_pack.h" + +#define _blorp_cmd_length(cmd) cmd ## _length +#define _blorp_cmd_length_bias(cmd) cmd ## _length_bias +#define _blorp_cmd_header(cmd) cmd ## _header +#define _blorp_cmd_pack(cmd) cmd ## _pack + +#define blorp_emit(batch, cmd, name) \ + for (struct cmd name = { _blorp_cmd_header(cmd) }, \ + *_dst = blorp_emit_dwords(batch, _blorp_cmd_length(cmd)); \ + __builtin_expect(_dst != NULL, 1); \ + _blorp_cmd_pack(cmd)(batch, (void *)_dst, &name), \ + _dst = NULL) + +#define blorp_emitn(batch, cmd, n) ({ \ + uint32_t *_dw = blorp_emit_dwords(batch, n); \ + struct cmd template = { \ + _blorp_cmd_header(cmd), \ + .DWordLength = n - _blorp_cmd_length_bias(cmd), \ + }; \ + _blorp_cmd_pack(cmd)(batch, _dw, &template); \ + _dw + 1; /* Array starts at dw[1] */ \ + }) + +/* 3DSTATE_URB + * 3DSTATE_URB_VS + * 3DSTATE_URB_HS + * 3DSTATE_URB_DS + * 3DSTATE_URB_GS + * + * Assign the entire URB to the VS. Even though the VS disabled, URB space + * is still needed because the clipper loads the VUE's from the URB. From + * the Sandybridge PRM, Volume 2, Part 1, Section 3DSTATE, + * Dword 1.15:0 "VS Number of URB Entries": + * This field is always used (even if VS Function Enable is DISABLED). + * + * The warning below appears in the PRM (Section 3DSTATE_URB), but we can + * safely ignore it because this batch contains only one draw call. + * Because of URB corruption caused by allocating a previous GS unit + * URB entry to the VS unit, software is required to send a “GS NULL + * Fence” (Send URB fence with VS URB size == 1 and GS URB size == 0) + * plus a dummy DRAW call before any case where VS will be taking over + * GS URB space. + * + * If the 3DSTATE_URB_VS is emitted, than the others must be also. + * From the Ivybridge PRM, Volume 2 Part 1, section 1.7.1 3DSTATE_URB_VS: + * + * 3DSTATE_URB_HS, 3DSTATE_URB_DS, and 3DSTATE_URB_GS must also be + * programmed in order for the programming of this state to be + * valid. + */ +static void +emit_urb_config(struct blorp_batch *batch, + const struct blorp_params *params) +{ + /* Once vertex fetcher has written full VUE entries with complete + * header the space requirement is as follows per vertex (in bytes): + * + * Header Position Program constants + * +--------+------------+-------------------+ + * | 16 | 16 | n x 16 | + * +--------+------------+-------------------+ + * + * where 'n' stands for number of varying inputs expressed as vec4s. + */ + const unsigned num_varyings = + params->wm_prog_data ? params->wm_prog_data->num_varying_inputs : 0; + const unsigned total_needed = 16 + 16 + num_varyings * 16; + + /* The URB size is expressed in units of 64 bytes (512 bits) */ + const unsigned vs_entry_size = DIV_ROUND_UP(total_needed, 64); + + blorp_emit_urb_config(batch, vs_entry_size); +} + +static void +blorp_emit_vertex_data(struct blorp_batch *batch, + const struct blorp_params *params, + struct blorp_address *addr, + uint32_t *size) +{ + const float vertices[] = { + /* v0 */ (float)params->x1, (float)params->y1, params->z, + /* v1 */ (float)params->x0, (float)params->y1, params->z, + /* v2 */ (float)params->x0, (float)params->y0, params->z, + }; + + void *data = blorp_alloc_vertex_buffer(batch, sizeof(vertices), addr); + memcpy(data, vertices, sizeof(vertices)); + *size = sizeof(vertices); + blorp_flush_range(batch, data, *size); +} + +static void +blorp_emit_input_varying_data(struct blorp_batch *batch, + const struct blorp_params *params, + struct blorp_address *addr, + uint32_t *size) +{ + const unsigned vec4_size_in_bytes = 4 * sizeof(float); + const unsigned max_num_varyings = + DIV_ROUND_UP(sizeof(params->wm_inputs), vec4_size_in_bytes); + const unsigned num_varyings = + params->wm_prog_data ? params->wm_prog_data->num_varying_inputs : 0; + + *size = 16 + num_varyings * vec4_size_in_bytes; + + const uint32_t *const inputs_src = (const uint32_t *)¶ms->wm_inputs; + void *data = blorp_alloc_vertex_buffer(batch, *size, addr); + uint32_t *inputs = data; + + /* Copy in the VS inputs */ + assert(sizeof(params->vs_inputs) == 16); + memcpy(inputs, ¶ms->vs_inputs, sizeof(params->vs_inputs)); + inputs += 4; + + if (params->wm_prog_data) { + /* Walk over the attribute slots, determine if the attribute is used by + * the program and when necessary copy the values from the input storage + * to the vertex data buffer. + */ + for (unsigned i = 0; i < max_num_varyings; i++) { + const gl_varying_slot attr = VARYING_SLOT_VAR0 + i; + + const int input_index = params->wm_prog_data->urb_setup[attr]; + if (input_index < 0) + continue; + + memcpy(inputs, inputs_src + i * 4, vec4_size_in_bytes); + + inputs += 4; + } + } + + blorp_flush_range(batch, data, *size); +} + +static void +blorp_emit_vertex_buffers(struct blorp_batch *batch, + const struct blorp_params *params) +{ + struct GENX(VERTEX_BUFFER_STATE) vb[2]; + memset(vb, 0, sizeof(vb)); + + uint32_t size; + blorp_emit_vertex_data(batch, params, &vb[0].BufferStartingAddress, &size); + vb[0].VertexBufferIndex = 0; + vb[0].BufferPitch = 3 * sizeof(float); + vb[0].VertexBufferMOCS = batch->blorp->mocs.vb; +#if GEN_GEN >= 7 + vb[0].AddressModifyEnable = true; +#endif +#if GEN_GEN >= 8 + vb[0].BufferSize = size; +#else + vb[0].BufferAccessType = VERTEXDATA; + vb[0].EndAddress = vb[0].BufferStartingAddress; + vb[0].EndAddress.offset += size - 1; +#endif + + blorp_emit_input_varying_data(batch, params, + &vb[1].BufferStartingAddress, &size); + vb[1].VertexBufferIndex = 1; + vb[1].BufferPitch = 0; + vb[1].VertexBufferMOCS = batch->blorp->mocs.vb; +#if GEN_GEN >= 7 + vb[1].AddressModifyEnable = true; +#endif +#if GEN_GEN >= 8 + vb[1].BufferSize = size; +#else + vb[1].BufferAccessType = INSTANCEDATA; + vb[1].EndAddress = vb[1].BufferStartingAddress; + vb[1].EndAddress.offset += size - 1; +#endif + + const unsigned num_dwords = 1 + GENX(VERTEX_BUFFER_STATE_length) * 2; + uint32_t *dw = blorp_emitn(batch, GENX(3DSTATE_VERTEX_BUFFERS), num_dwords); + + for (unsigned i = 0; i < 2; i++) { + GENX(VERTEX_BUFFER_STATE_pack)(batch, dw, &vb[i]); + dw += GENX(VERTEX_BUFFER_STATE_length); + } +} + +static void +blorp_emit_vertex_elements(struct blorp_batch *batch, + const struct blorp_params *params) +{ + const unsigned num_varyings = + params->wm_prog_data ? params->wm_prog_data->num_varying_inputs : 0; + const unsigned num_elements = 2 + num_varyings; + + struct GENX(VERTEX_ELEMENT_STATE) ve[num_elements]; + memset(ve, 0, num_elements * sizeof(*ve)); + + /* Setup VBO for the rectangle primitive.. + * + * A rectangle primitive (3DPRIM_RECTLIST) consists of only three + * vertices. The vertices reside in screen space with DirectX + * coordinates (that is, (0, 0) is the upper left corner). + * + * v2 ------ implied + * | | + * | | + * v1 ----- v0 + * + * Since the VS is disabled, the clipper loads each VUE directly from + * the URB. This is controlled by the 3DSTATE_VERTEX_BUFFERS and + * 3DSTATE_VERTEX_ELEMENTS packets below. The VUE contents are as follows: + * dw0: Reserved, MBZ. + * dw1: Render Target Array Index. Below vertex fetcher gets programmed + * to assign this with primitive instance identifier which will be + * used for layered clears. All other renders have only one instance + * and therefore the value will be effectively zero. + * dw2: Viewport Index. The HiZ op disables viewport mapping and + * scissoring, so set the dword to 0. + * dw3: Point Width: The HiZ op does not emit the POINTLIST primitive, + * so set the dword to 0. + * dw4: Vertex Position X. + * dw5: Vertex Position Y. + * dw6: Vertex Position Z. + * dw7: Vertex Position W. + * + * dw8: Flat vertex input 0 + * dw9: Flat vertex input 1 + * ... + * dwn: Flat vertex input n - 8 + * + * For details, see the Sandybridge PRM, Volume 2, Part 1, Section 1.5.1 + * "Vertex URB Entry (VUE) Formats". + * + * Only vertex position X and Y are going to be variable, Z is fixed to + * zero and W to one. Header words dw0,2,3 are zero. There is no need to + * include the fixed values in the vertex buffer. Vertex fetcher can be + * instructed to fill vertex elements with constant values of one and zero + * instead of reading them from the buffer. + * Flat inputs are program constants that are not interpolated. Moreover + * their values will be the same between vertices. + * + * See the vertex element setup below. + */ + ve[0].VertexBufferIndex = 1; + ve[0].Valid = true; + ve[0].SourceElementFormat = ISL_FORMAT_R32G32B32A32_FLOAT; + ve[0].SourceElementOffset = 0; + ve[0].Component0Control = VFCOMP_STORE_SRC; + + /* From Gen8 onwards hardware is no more instructed to overwrite components + * using an element specifier. Instead one has separate 3DSTATE_VF_SGVS + * (System Generated Value Setup) state packet for it. + */ +#if GEN_GEN >= 8 + ve[0].Component1Control = VFCOMP_STORE_0; +#else + ve[0].Component1Control = VFCOMP_STORE_IID; +#endif + ve[0].Component2Control = VFCOMP_STORE_SRC; + ve[0].Component3Control = VFCOMP_STORE_SRC; + + ve[1].VertexBufferIndex = 0; + ve[1].Valid = true; + ve[1].SourceElementFormat = ISL_FORMAT_R32G32B32_FLOAT; + ve[1].SourceElementOffset = 0; + ve[1].Component0Control = VFCOMP_STORE_SRC; + ve[1].Component1Control = VFCOMP_STORE_SRC; + ve[1].Component2Control = VFCOMP_STORE_SRC; + ve[1].Component3Control = VFCOMP_STORE_1_FP; + + for (unsigned i = 0; i < num_varyings; ++i) { + ve[i + 2].VertexBufferIndex = 1; + ve[i + 2].Valid = true; + ve[i + 2].SourceElementFormat = ISL_FORMAT_R32G32B32A32_FLOAT; + ve[i + 2].SourceElementOffset = 16 + i * 4 * sizeof(float); + ve[i + 2].Component0Control = VFCOMP_STORE_SRC; + ve[i + 2].Component1Control = VFCOMP_STORE_SRC; + ve[i + 2].Component2Control = VFCOMP_STORE_SRC; + ve[i + 2].Component3Control = VFCOMP_STORE_SRC; + } + + const unsigned num_dwords = + 1 + GENX(VERTEX_ELEMENT_STATE_length) * num_elements; + uint32_t *dw = blorp_emitn(batch, GENX(3DSTATE_VERTEX_ELEMENTS), num_dwords); + + for (unsigned i = 0; i < num_elements; i++) { + GENX(VERTEX_ELEMENT_STATE_pack)(batch, dw, &ve[i]); + dw += GENX(VERTEX_ELEMENT_STATE_length); + } + +#if GEN_GEN >= 8 + /* Overwrite Render Target Array Index (2nd dword) in the VUE header with + * primitive instance identifier. This is used for layered clears. + */ + blorp_emit(batch, GENX(3DSTATE_VF_SGVS), sgvs) { + sgvs.InstanceIDEnable = true; + sgvs.InstanceIDComponentNumber = COMP_1; + sgvs.InstanceIDElementOffset = 0; + } + + for (unsigned i = 0; i < num_elements; i++) { + blorp_emit(batch, GENX(3DSTATE_VF_INSTANCING), vf) { + vf.VertexElementIndex = i; + vf.InstancingEnable = false; + } + } + + blorp_emit(batch, GENX(3DSTATE_VF_TOPOLOGY), topo) { + topo.PrimitiveTopologyType = _3DPRIM_RECTLIST; + } +#endif +} + +static void +blorp_emit_vs_config(struct blorp_batch *batch, + const struct blorp_params *params) +{ + struct brw_vs_prog_data *vs_prog_data = params->vs_prog_data; + + blorp_emit(batch, GENX(3DSTATE_VS), vs) { + if (vs_prog_data) { + vs.FunctionEnable = true; + + vs.KernelStartPointer = params->vs_prog_kernel; + + vs.DispatchGRFStartRegisterForURBData = + vs_prog_data->base.base.dispatch_grf_start_reg; + vs.VertexURBEntryReadLength = + vs_prog_data->base.urb_read_length; + vs.VertexURBEntryReadOffset = 0; + + vs.MaximumNumberofThreads = + batch->blorp->isl_dev->info->max_vs_threads - 1; + +#if GEN_GEN >= 8 + vs.SIMD8DispatchEnable = + vs_prog_data->base.dispatch_mode == DISPATCH_MODE_SIMD8; +#endif + } + } +} + +static void +blorp_emit_sf_config(struct blorp_batch *batch, + const struct blorp_params *params) +{ + const struct brw_wm_prog_data *prog_data = params->wm_prog_data; + + /* 3DSTATE_SF + * + * Disable ViewportTransformEnable (dw2.1) + * + * From the SandyBridge PRM, Volume 2, Part 1, Section 1.3, "3D + * Primitives Overview": + * RECTLIST: Viewport Mapping must be DISABLED (as is typical with the + * use of screen- space coordinates). + * + * A solid rectangle must be rendered, so set FrontFaceFillMode (dw2.4:3) + * and BackFaceFillMode (dw2.5:6) to SOLID(0). + * + * From the Sandy Bridge PRM, Volume 2, Part 1, Section + * 6.4.1.1 3DSTATE_SF, Field FrontFaceFillMode: + * SOLID: Any triangle or rectangle object found to be front-facing + * is rendered as a solid object. This setting is required when + * (rendering rectangle (RECTLIST) objects. + */ + +#if GEN_GEN >= 8 + + blorp_emit(batch, GENX(3DSTATE_SF), sf); + + blorp_emit(batch, GENX(3DSTATE_RASTER), raster) { + raster.CullMode = CULLMODE_NONE; + } + + blorp_emit(batch, GENX(3DSTATE_SBE), sbe) { + sbe.VertexURBEntryReadOffset = 1; + if (prog_data) { + sbe.NumberofSFOutputAttributes = prog_data->num_varying_inputs; + sbe.VertexURBEntryReadLength = brw_blorp_get_urb_length(prog_data); + sbe.ConstantInterpolationEnable = prog_data->flat_inputs; + } else { + sbe.NumberofSFOutputAttributes = 0; + sbe.VertexURBEntryReadLength = 1; + } + sbe.ForceVertexURBEntryReadLength = true; + sbe.ForceVertexURBEntryReadOffset = true; + +#if GEN_GEN >= 9 + for (unsigned i = 0; i < 32; i++) + sbe.AttributeActiveComponentFormat[i] = ACF_XYZW; +#endif + } + +#elif GEN_GEN >= 7 + + blorp_emit(batch, GENX(3DSTATE_SF), sf) { + sf.FrontFaceFillMode = FILL_MODE_SOLID; + sf.BackFaceFillMode = FILL_MODE_SOLID; + + sf.MultisampleRasterizationMode = params->num_samples > 1 ? + MSRASTMODE_ON_PATTERN : MSRASTMODE_OFF_PIXEL; + +#if GEN_GEN == 7 + sf.DepthBufferSurfaceFormat = params->depth_format; +#endif + } + + blorp_emit(batch, GENX(3DSTATE_SBE), sbe) { + sbe.VertexURBEntryReadOffset = 1; + if (prog_data) { + sbe.NumberofSFOutputAttributes = prog_data->num_varying_inputs; + sbe.VertexURBEntryReadLength = brw_blorp_get_urb_length(prog_data); + sbe.ConstantInterpolationEnable = prog_data->flat_inputs; + } else { + sbe.NumberofSFOutputAttributes = 0; + sbe.VertexURBEntryReadLength = 1; + } + } + +#else /* GEN_GEN <= 6 */ + + blorp_emit(batch, GENX(3DSTATE_SF), sf) { + sf.FrontFaceFillMode = FILL_MODE_SOLID; + sf.BackFaceFillMode = FILL_MODE_SOLID; + + sf.MultisampleRasterizationMode = params->num_samples > 1 ? + MSRASTMODE_ON_PATTERN : MSRASTMODE_OFF_PIXEL; + + sf.VertexURBEntryReadOffset = 1; + if (prog_data) { + sf.NumberofSFOutputAttributes = prog_data->num_varying_inputs; + sf.VertexURBEntryReadLength = brw_blorp_get_urb_length(prog_data); + sf.ConstantInterpolationEnable = prog_data->flat_inputs; + } else { + sf.NumberofSFOutputAttributes = 0; + sf.VertexURBEntryReadLength = 1; + } + } + +#endif /* GEN_GEN */ +} + +static void +blorp_emit_ps_config(struct blorp_batch *batch, + const struct blorp_params *params) +{ + const struct brw_wm_prog_data *prog_data = params->wm_prog_data; + + /* Even when thread dispatch is disabled, max threads (dw5.25:31) must be + * nonzero to prevent the GPU from hanging. While the documentation doesn't + * mention this explicitly, it notes that the valid range for the field is + * [1,39] = [2,40] threads, which excludes zero. + * + * To be safe (and to minimize extraneous code) we go ahead and fully + * configure the WM state whether or not there is a WM program. + */ + +#if GEN_GEN >= 8 + + blorp_emit(batch, GENX(3DSTATE_WM), wm); + + blorp_emit(batch, GENX(3DSTATE_PS), ps) { + if (params->src.enabled) { + ps.SamplerCount = 1; /* Up to 4 samplers */ + ps.BindingTableEntryCount = 2; + } else { + ps.BindingTableEntryCount = 1; + } + + if (prog_data) { + ps.DispatchGRFStartRegisterForConstantSetupData0 = + prog_data->base.dispatch_grf_start_reg; + ps.DispatchGRFStartRegisterForConstantSetupData2 = + prog_data->dispatch_grf_start_reg_2; + + ps._8PixelDispatchEnable = prog_data->dispatch_8; + ps._16PixelDispatchEnable = prog_data->dispatch_16; + + ps.KernelStartPointer0 = params->wm_prog_kernel; + ps.KernelStartPointer2 = + params->wm_prog_kernel + prog_data->prog_offset_2; + } + + /* 3DSTATE_PS expects the number of threads per PSD, which is always 64; + * it implicitly scales for different GT levels (which have some # of + * PSDs). + * + * In Gen8 the format is U8-2 whereas in Gen9 it is U8-1. + */ + if (GEN_GEN >= 9) + ps.MaximumNumberofThreadsPerPSD = 64 - 1; + else + ps.MaximumNumberofThreadsPerPSD = 64 - 2; + + switch (params->fast_clear_op) { + case BLORP_FAST_CLEAR_OP_NONE: + break; +#if GEN_GEN >= 9 + case BLORP_FAST_CLEAR_OP_RESOLVE_PARTIAL: + ps.RenderTargetResolveType = RESOLVE_PARTIAL; + break; + case BLORP_FAST_CLEAR_OP_RESOLVE_FULL: + ps.RenderTargetResolveType = RESOLVE_FULL; + break; +#else + case BLORP_FAST_CLEAR_OP_RESOLVE_FULL: + ps.RenderTargetResolveEnable = true; + break; +#endif + case BLORP_FAST_CLEAR_OP_CLEAR: + ps.RenderTargetFastClearEnable = true; + break; + default: + unreachable("Invalid fast clear op"); + } + } + + blorp_emit(batch, GENX(3DSTATE_PS_EXTRA), psx) { + if (prog_data) { + psx.PixelShaderValid = true; + psx.AttributeEnable = prog_data->num_varying_inputs > 0; + psx.PixelShaderIsPerSample = prog_data->persample_dispatch; + } + + if (params->src.enabled) + psx.PixelShaderKillsPixel = true; + } + +#elif GEN_GEN >= 7 + + blorp_emit(batch, GENX(3DSTATE_WM), wm) { + switch (params->hiz_op) { + case BLORP_HIZ_OP_DEPTH_CLEAR: + wm.DepthBufferClear = true; + break; + case BLORP_HIZ_OP_DEPTH_RESOLVE: + wm.DepthBufferResolveEnable = true; + break; + case BLORP_HIZ_OP_HIZ_RESOLVE: + wm.HierarchicalDepthBufferResolveEnable = true; + break; + case BLORP_HIZ_OP_NONE: + break; + default: + unreachable("not reached"); + } + + if (prog_data) + wm.ThreadDispatchEnable = true; + + if (params->src.enabled) + wm.PixelShaderKillsPixel = true; + + if (params->num_samples > 1) { + wm.MultisampleRasterizationMode = MSRASTMODE_ON_PATTERN; + wm.MultisampleDispatchMode = + (prog_data && prog_data->persample_dispatch) ? + MSDISPMODE_PERSAMPLE : MSDISPMODE_PERPIXEL; + } else { + wm.MultisampleRasterizationMode = MSRASTMODE_OFF_PIXEL; + wm.MultisampleDispatchMode = MSDISPMODE_PERSAMPLE; + } + } + + blorp_emit(batch, GENX(3DSTATE_PS), ps) { + ps.MaximumNumberofThreads = + batch->blorp->isl_dev->info->max_wm_threads - 1; + +#if GEN_IS_HASWELL + ps.SampleMask = 1; +#endif + + if (prog_data) { + ps.DispatchGRFStartRegisterForConstantSetupData0 = + prog_data->base.dispatch_grf_start_reg; + ps.DispatchGRFStartRegisterForConstantSetupData2 = + prog_data->dispatch_grf_start_reg_2; + + ps.KernelStartPointer0 = params->wm_prog_kernel; + ps.KernelStartPointer2 = + params->wm_prog_kernel + prog_data->prog_offset_2; + + ps._8PixelDispatchEnable = prog_data->dispatch_8; + ps._16PixelDispatchEnable = prog_data->dispatch_16; + + ps.AttributeEnable = prog_data->num_varying_inputs > 0; + } else { + /* Gen7 hardware gets angry if we don't enable at least one dispatch + * mode, so just enable 16-pixel dispatch if we don't have a program. + */ + ps._16PixelDispatchEnable = true; + } + + if (params->src.enabled) + ps.SamplerCount = 1; /* Up to 4 samplers */ + + switch (params->fast_clear_op) { + case BLORP_FAST_CLEAR_OP_NONE: + break; + case BLORP_FAST_CLEAR_OP_RESOLVE_FULL: + ps.RenderTargetResolveEnable = true; + break; + case BLORP_FAST_CLEAR_OP_CLEAR: + ps.RenderTargetFastClearEnable = true; + break; + default: + unreachable("Invalid fast clear op"); + } + } + +#else /* GEN_GEN <= 6 */ + + blorp_emit(batch, GENX(3DSTATE_WM), wm) { + wm.MaximumNumberofThreads = + batch->blorp->isl_dev->info->max_wm_threads - 1; + + switch (params->hiz_op) { + case BLORP_HIZ_OP_DEPTH_CLEAR: + wm.DepthBufferClear = true; + break; + case BLORP_HIZ_OP_DEPTH_RESOLVE: + wm.DepthBufferResolveEnable = true; + break; + case BLORP_HIZ_OP_HIZ_RESOLVE: + wm.HierarchicalDepthBufferResolveEnable = true; + break; + case BLORP_HIZ_OP_NONE: + break; + default: + unreachable("not reached"); + } + + if (prog_data) { + wm.ThreadDispatchEnable = true; + + wm.DispatchGRFStartRegisterForConstantSetupData0 = + prog_data->base.dispatch_grf_start_reg; + wm.DispatchGRFStartRegisterForConstantSetupData2 = + prog_data->dispatch_grf_start_reg_2; + + wm.KernelStartPointer0 = params->wm_prog_kernel; + wm.KernelStartPointer2 = + params->wm_prog_kernel + prog_data->prog_offset_2; + + wm._8PixelDispatchEnable = prog_data->dispatch_8; + wm._16PixelDispatchEnable = prog_data->dispatch_16; + + wm.NumberofSFOutputAttributes = prog_data->num_varying_inputs; + } + + if (params->src.enabled) { + wm.SamplerCount = 1; /* Up to 4 samplers */ + wm.PixelShaderKillsPixel = true; /* TODO: temporarily smash on */ + } + + if (params->num_samples > 1) { + wm.MultisampleRasterizationMode = MSRASTMODE_ON_PATTERN; + wm.MultisampleDispatchMode = + (prog_data && prog_data->persample_dispatch) ? + MSDISPMODE_PERSAMPLE : MSDISPMODE_PERPIXEL; + } else { + wm.MultisampleRasterizationMode = MSRASTMODE_OFF_PIXEL; + wm.MultisampleDispatchMode = MSDISPMODE_PERSAMPLE; + } + } + +#endif /* GEN_GEN */ +} + +static const uint32_t isl_to_gen_ds_surftype [] = { +#if GEN_GEN >= 9 + /* From the SKL PRM, "3DSTATE_DEPTH_STENCIL::SurfaceType": + * + * "If depth/stencil is enabled with 1D render target, depth/stencil + * surface type needs to be set to 2D surface type and height set to 1. + * Depth will use (legacy) TileY and stencil will use TileW. For this + * case only, the Surface Type of the depth buffer can be 2D while the + * Surface Type of the render target(s) are 1D, representing an + * exception to a programming note above. + */ + [ISL_SURF_DIM_1D] = SURFTYPE_2D, +#else + [ISL_SURF_DIM_1D] = SURFTYPE_1D, +#endif + [ISL_SURF_DIM_2D] = SURFTYPE_2D, + [ISL_SURF_DIM_3D] = SURFTYPE_3D, +}; + +static void +blorp_emit_depth_stencil_config(struct blorp_batch *batch, + const struct blorp_params *params) +{ +#if GEN_GEN >= 7 + const uint32_t mocs = 1; /* GEN7_MOCS_L3 */ +#else + const uint32_t mocs = 0; +#endif + + blorp_emit(batch, GENX(3DSTATE_DEPTH_BUFFER), db) { +#if GEN_GEN >= 7 + db.DepthWriteEnable = params->depth.enabled; + db.StencilWriteEnable = params->stencil.enabled; +#endif + +#if GEN_GEN <= 6 + db.SeparateStencilBufferEnable = true; +#endif + + if (params->depth.enabled) { + db.SurfaceFormat = params->depth_format; + db.SurfaceType = isl_to_gen_ds_surftype[params->depth.surf.dim]; + +#if GEN_GEN <= 6 + db.TiledSurface = true; + db.TileWalk = TILEWALK_YMAJOR; + db.MIPMapLayoutMode = MIPLAYOUT_BELOW; +#endif + + db.HierarchicalDepthBufferEnable = + params->depth.aux_usage == ISL_AUX_USAGE_HIZ; + + db.Width = params->depth.surf.logical_level0_px.width - 1; + db.Height = params->depth.surf.logical_level0_px.height - 1; + db.RenderTargetViewExtent = db.Depth = + params->depth.view.array_len - 1; + + db.LOD = params->depth.view.base_level; + db.MinimumArrayElement = params->depth.view.base_array_layer; + + db.SurfacePitch = params->depth.surf.row_pitch - 1; +#if GEN_GEN >= 8 + db.SurfaceQPitch = + isl_surf_get_array_pitch_el_rows(¶ms->depth.surf) >> 2, +#endif + + db.SurfaceBaseAddress = params->depth.addr; + db.DepthBufferMOCS = mocs; + } else if (params->stencil.enabled) { + db.SurfaceFormat = D32_FLOAT; + db.SurfaceType = isl_to_gen_ds_surftype[params->stencil.surf.dim]; + + db.Width = params->stencil.surf.logical_level0_px.width - 1; + db.Height = params->stencil.surf.logical_level0_px.height - 1; + db.RenderTargetViewExtent = db.Depth = + params->stencil.view.array_len - 1; + + db.LOD = params->stencil.view.base_level; + db.MinimumArrayElement = params->stencil.view.base_array_layer; + } else { + db.SurfaceType = SURFTYPE_NULL; + db.SurfaceFormat = D32_FLOAT; + } + } + + blorp_emit(batch, GENX(3DSTATE_HIER_DEPTH_BUFFER), hiz) { + if (params->depth.aux_usage == ISL_AUX_USAGE_HIZ) { + hiz.SurfacePitch = params->depth.aux_surf.row_pitch - 1; + hiz.SurfaceBaseAddress = params->depth.aux_addr; + hiz.HierarchicalDepthBufferMOCS = mocs; +#if GEN_GEN >= 8 + hiz.SurfaceQPitch = + isl_surf_get_array_pitch_sa_rows(¶ms->depth.aux_surf) >> 2; +#endif + } + } + + blorp_emit(batch, GENX(3DSTATE_STENCIL_BUFFER), sb) { + if (params->stencil.enabled) { +#if GEN_GEN >= 8 || GEN_IS_HASWELL + sb.StencilBufferEnable = true; +#endif + + sb.SurfacePitch = params->stencil.surf.row_pitch - 1, +#if GEN_GEN >= 8 + sb.SurfaceQPitch = + isl_surf_get_array_pitch_el_rows(¶ms->stencil.surf) >> 2, +#endif + + sb.SurfaceBaseAddress = params->stencil.addr; + sb.StencilBufferMOCS = batch->blorp->mocs.tex; + } + } + + /* 3DSTATE_CLEAR_PARAMS + * + * From the Sandybridge PRM, Volume 2, Part 1, Section 3DSTATE_CLEAR_PARAMS: + * [DevSNB] 3DSTATE_CLEAR_PARAMS packet must follow the DEPTH_BUFFER_STATE + * packet when HiZ is enabled and the DEPTH_BUFFER_STATE changes. + */ + blorp_emit(batch, GENX(3DSTATE_CLEAR_PARAMS), clear) { + clear.DepthClearValueValid = true; + clear.DepthClearValue = params->depth.clear_color.u32[0]; + } +} + +static uint32_t +blorp_emit_blend_state(struct blorp_batch *batch, + const struct blorp_params *params) +{ + struct GENX(BLEND_STATE) blend; + memset(&blend, 0, sizeof(blend)); + + for (unsigned i = 0; i < params->num_draw_buffers; ++i) { + blend.Entry[i].PreBlendColorClampEnable = true; + blend.Entry[i].PostBlendColorClampEnable = true; + blend.Entry[i].ColorClampRange = COLORCLAMP_RTFORMAT; + + blend.Entry[i].WriteDisableRed = params->color_write_disable[0]; + blend.Entry[i].WriteDisableGreen = params->color_write_disable[1]; + blend.Entry[i].WriteDisableBlue = params->color_write_disable[2]; + blend.Entry[i].WriteDisableAlpha = params->color_write_disable[3]; + } + + uint32_t offset; + void *state = blorp_alloc_dynamic_state(batch, AUB_TRACE_BLEND_STATE, + GENX(BLEND_STATE_length) * 4, + 64, &offset); + GENX(BLEND_STATE_pack)(NULL, state, &blend); + blorp_flush_range(batch, state, GENX(BLEND_STATE_length) * 4); + +#if GEN_GEN >= 7 + blorp_emit(batch, GENX(3DSTATE_BLEND_STATE_POINTERS), sp) { + sp.BlendStatePointer = offset; +#if GEN_GEN >= 8 + sp.BlendStatePointerValid = true; +#endif + } +#endif + +#if GEN_GEN >= 8 + blorp_emit(batch, GENX(3DSTATE_PS_BLEND), ps_blend) { + ps_blend.HasWriteableRT = true; + } +#endif + + return offset; +} + +static uint32_t +blorp_emit_color_calc_state(struct blorp_batch *batch, + const struct blorp_params *params) +{ + struct GENX(COLOR_CALC_STATE) cc = { 0 }; + +#if GEN_GEN <= 8 + cc.StencilReferenceValue = params->stencil_ref; +#endif + + uint32_t offset; + void *state = blorp_alloc_dynamic_state(batch, AUB_TRACE_CC_STATE, + GENX(COLOR_CALC_STATE_length) * 4, + 64, &offset); + GENX(COLOR_CALC_STATE_pack)(NULL, state, &cc); + blorp_flush_range(batch, state, GENX(COLOR_CALC_STATE_length) * 4); + +#if GEN_GEN >= 7 + blorp_emit(batch, GENX(3DSTATE_CC_STATE_POINTERS), sp) { + sp.ColorCalcStatePointer = offset; +#if GEN_GEN >= 8 + sp.ColorCalcStatePointerValid = true; +#endif + } +#endif + + return offset; +} + +static uint32_t +blorp_emit_depth_stencil_state(struct blorp_batch *batch, + const struct blorp_params *params) +{ +#if GEN_GEN >= 8 + struct GENX(3DSTATE_WM_DEPTH_STENCIL) ds = { + GENX(3DSTATE_WM_DEPTH_STENCIL_header), + }; +#else + struct GENX(DEPTH_STENCIL_STATE) ds = { 0 }; +#endif + + if (params->depth.enabled) { + ds.DepthBufferWriteEnable = true; + + switch (params->hiz_op) { + case BLORP_HIZ_OP_NONE: + ds.DepthTestEnable = true; + ds.DepthTestFunction = COMPAREFUNCTION_ALWAYS; + break; + + /* See the following sections of the Sandy Bridge PRM, Volume 2, Part1: + * - 7.5.3.1 Depth Buffer Clear + * - 7.5.3.2 Depth Buffer Resolve + * - 7.5.3.3 Hierarchical Depth Buffer Resolve + */ + case BLORP_HIZ_OP_DEPTH_RESOLVE: + ds.DepthTestEnable = true; + ds.DepthTestFunction = COMPAREFUNCTION_NEVER; + break; + + case BLORP_HIZ_OP_DEPTH_CLEAR: + case BLORP_HIZ_OP_HIZ_RESOLVE: + ds.DepthTestEnable = false; + break; + } + } + + if (params->stencil.enabled) { + ds.StencilBufferWriteEnable = true; + ds.StencilTestEnable = true; + ds.DoubleSidedStencilEnable = false; + + ds.StencilTestFunction = COMPAREFUNCTION_ALWAYS; + ds.StencilPassDepthPassOp = STENCILOP_REPLACE; + + ds.StencilWriteMask = params->stencil_mask; +#if GEN_GEN >= 9 + ds.StencilReferenceValue = params->stencil_ref; +#endif + } + +#if GEN_GEN >= 8 + uint32_t offset = 0; + uint32_t *dw = blorp_emit_dwords(batch, + GENX(3DSTATE_WM_DEPTH_STENCIL_length)); + GENX(3DSTATE_WM_DEPTH_STENCIL_pack)(NULL, dw, &ds); +#else + uint32_t offset; + void *state = blorp_alloc_dynamic_state(batch, AUB_TRACE_DEPTH_STENCIL_STATE, + GENX(DEPTH_STENCIL_STATE_length) * 4, + 64, &offset); + GENX(DEPTH_STENCIL_STATE_pack)(NULL, state, &ds); + blorp_flush_range(batch, state, GENX(DEPTH_STENCIL_STATE_length) * 4); +#endif + +#if GEN_GEN == 7 + blorp_emit(batch, GENX(3DSTATE_DEPTH_STENCIL_STATE_POINTERS), sp) { + sp.PointertoDEPTH_STENCIL_STATE = offset; + } +#endif + + return offset; +} + +static void +blorp_emit_surface_state(struct blorp_batch *batch, + const struct brw_blorp_surface_info *surface, + void *state, uint32_t state_offset, + bool is_render_target) +{ + const struct isl_device *isl_dev = batch->blorp->isl_dev; + struct isl_surf surf = surface->surf; + + if (surf.dim == ISL_SURF_DIM_1D && + surf.dim_layout == ISL_DIM_LAYOUT_GEN4_2D) { + assert(surf.logical_level0_px.height == 1); + surf.dim = ISL_SURF_DIM_2D; + } + + /* Blorp doesn't support HiZ in any of the blit or slow-clear paths */ + enum isl_aux_usage aux_usage = surface->aux_usage; + if (aux_usage == ISL_AUX_USAGE_HIZ) + aux_usage = ISL_AUX_USAGE_NONE; + + const uint32_t mocs = + is_render_target ? batch->blorp->mocs.rb : batch->blorp->mocs.tex; + + isl_surf_fill_state(batch->blorp->isl_dev, state, + .surf = &surf, .view = &surface->view, + .aux_surf = &surface->aux_surf, .aux_usage = aux_usage, + .mocs = mocs, .clear_color = surface->clear_color); + + blorp_surface_reloc(batch, state_offset + isl_dev->ss.addr_offset, + surface->addr, 0); + + if (aux_usage != ISL_AUX_USAGE_NONE) { + /* On gen7 and prior, the bottom 12 bits of the MCS base address are + * used to store other information. This should be ok, however, because + * surface buffer addresses are always 4K page alinged. + */ + assert((surface->aux_addr.offset & 0xfff) == 0); + uint32_t *aux_addr = state + isl_dev->ss.aux_addr_offset; + blorp_surface_reloc(batch, state_offset + isl_dev->ss.aux_addr_offset, + surface->aux_addr, *aux_addr); + } + + blorp_flush_range(batch, state, GENX(RENDER_SURFACE_STATE_length) * 4); +} + +static void +blorp_emit_null_surface_state(struct blorp_batch *batch, + const struct brw_blorp_surface_info *surface, + uint32_t *state) +{ + struct GENX(RENDER_SURFACE_STATE) ss = { + .SurfaceType = SURFTYPE_NULL, + .SurfaceFormat = ISL_FORMAT_R8G8B8A8_UNORM, + .Width = surface->surf.logical_level0_px.width - 1, + .Height = surface->surf.logical_level0_px.height - 1, + .MIPCountLOD = surface->view.base_level, + .MinimumArrayElement = surface->view.base_array_layer, + .Depth = surface->view.array_len - 1, + .RenderTargetViewExtent = surface->view.array_len - 1, + .NumberofMultisamples = ffs(surface->surf.samples) - 1, + +#if GEN_GEN >= 7 + .SurfaceArray = surface->surf.dim != ISL_SURF_DIM_3D, +#endif + +#if GEN_GEN >= 8 + .TileMode = YMAJOR, +#else + .TiledSurface = true, +#endif + }; + + GENX(RENDER_SURFACE_STATE_pack)(NULL, state, &ss); + + blorp_flush_range(batch, state, GENX(RENDER_SURFACE_STATE_length) * 4); +} + +static void +blorp_emit_surface_states(struct blorp_batch *batch, + const struct blorp_params *params) +{ + const struct isl_device *isl_dev = batch->blorp->isl_dev; + uint32_t bind_offset, surface_offsets[2]; + void *surface_maps[2]; + + if (params->use_pre_baked_binding_table) { + bind_offset = params->pre_baked_binding_table_offset; + } else { + unsigned num_surfaces = 1 + params->src.enabled; + blorp_alloc_binding_table(batch, num_surfaces, + isl_dev->ss.size, isl_dev->ss.align, + &bind_offset, surface_offsets, surface_maps); + + if (params->dst.enabled) { + blorp_emit_surface_state(batch, ¶ms->dst, + surface_maps[BLORP_RENDERBUFFER_BT_INDEX], + surface_offsets[BLORP_RENDERBUFFER_BT_INDEX], + true); + } else { + assert(params->depth.enabled || params->stencil.enabled); + const struct brw_blorp_surface_info *surface = + params->depth.enabled ? ¶ms->depth : ¶ms->stencil; + blorp_emit_null_surface_state(batch, surface, + surface_maps[BLORP_RENDERBUFFER_BT_INDEX]); + } + + if (params->src.enabled) { + blorp_emit_surface_state(batch, ¶ms->src, + surface_maps[BLORP_TEXTURE_BT_INDEX], + surface_offsets[BLORP_TEXTURE_BT_INDEX], false); + } + } + +#if GEN_GEN >= 7 + blorp_emit(batch, GENX(3DSTATE_BINDING_TABLE_POINTERS_VS), bt); + blorp_emit(batch, GENX(3DSTATE_BINDING_TABLE_POINTERS_HS), bt); + blorp_emit(batch, GENX(3DSTATE_BINDING_TABLE_POINTERS_DS), bt); + blorp_emit(batch, GENX(3DSTATE_BINDING_TABLE_POINTERS_GS), bt); + + blorp_emit(batch, GENX(3DSTATE_BINDING_TABLE_POINTERS_PS), bt) { + bt.PointertoPSBindingTable = bind_offset; + } +#else + blorp_emit(batch, GENX(3DSTATE_BINDING_TABLE_POINTERS), bt) { + bt.PSBindingTableChange = true; + bt.PointertoPSBindingTable = bind_offset; + } +#endif +} + +static void +blorp_emit_sampler_state(struct blorp_batch *batch, + const struct blorp_params *params) +{ + struct GENX(SAMPLER_STATE) sampler = { + .MipModeFilter = MIPFILTER_NONE, + .MagModeFilter = MAPFILTER_LINEAR, + .MinModeFilter = MAPFILTER_LINEAR, + .MinLOD = 0, + .MaxLOD = 0, + .TCXAddressControlMode = TCM_CLAMP, + .TCYAddressControlMode = TCM_CLAMP, + .TCZAddressControlMode = TCM_CLAMP, + .MaximumAnisotropy = RATIO21, + .RAddressMinFilterRoundingEnable = true, + .RAddressMagFilterRoundingEnable = true, + .VAddressMinFilterRoundingEnable = true, + .VAddressMagFilterRoundingEnable = true, + .UAddressMinFilterRoundingEnable = true, + .UAddressMagFilterRoundingEnable = true, + .NonnormalizedCoordinateEnable = true, + }; + + uint32_t offset; + void *state = blorp_alloc_dynamic_state(batch, AUB_TRACE_SAMPLER_STATE, + GENX(SAMPLER_STATE_length) * 4, + 32, &offset); + GENX(SAMPLER_STATE_pack)(NULL, state, &sampler); + blorp_flush_range(batch, state, GENX(SAMPLER_STATE_length) * 4); + +#if GEN_GEN >= 7 + blorp_emit(batch, GENX(3DSTATE_SAMPLER_STATE_POINTERS_PS), ssp) { + ssp.PointertoPSSamplerState = offset; + } +#else + blorp_emit(batch, GENX(3DSTATE_SAMPLER_STATE_POINTERS), ssp) { + ssp.VSSamplerStateChange = true; + ssp.GSSamplerStateChange = true; + ssp.PSSamplerStateChange = true; + ssp.PointertoPSSamplerState = offset; + } +#endif +} + +static void +blorp_emit_3dstate_multisample(struct blorp_batch *batch, + const struct blorp_params *params) +{ + blorp_emit(batch, GENX(3DSTATE_MULTISAMPLE), ms) { + ms.NumberofMultisamples = __builtin_ffs(params->num_samples) - 1; + +#if GEN_GEN >= 8 + /* The PRM says that this bit is valid only for DX9: + * + * SW can choose to set this bit only for DX9 API. DX10/OGL API's + * should not have any effect by setting or not setting this bit. + */ + ms.PixelPositionOffsetEnable = false; + ms.PixelLocation = CENTER; +#elif GEN_GEN >= 7 + ms.PixelLocation = PIXLOC_CENTER; + + switch (params->num_samples) { + case 1: + GEN_SAMPLE_POS_1X(ms.Sample); + break; + case 2: + GEN_SAMPLE_POS_2X(ms.Sample); + break; + case 4: + GEN_SAMPLE_POS_4X(ms.Sample); + break; + case 8: + GEN_SAMPLE_POS_8X(ms.Sample); + break; + default: + break; + } +#else + ms.PixelLocation = PIXLOC_CENTER; + GEN_SAMPLE_POS_4X(ms.Sample); +#endif + } +} + +#if GEN_GEN >= 8 +/* Emits the Optimized HiZ sequence specified in the BDW+ PRMs. The + * depth/stencil buffer extents are ignored to handle APIs which perform + * clearing operations without such information. + * */ +static void +blorp_emit_gen8_hiz_op(struct blorp_batch *batch, + const struct blorp_params *params) +{ + /* We should be performing an operation on a depth or stencil buffer. + */ + assert(params->depth.enabled || params->stencil.enabled); + + /* The stencil buffer should only be enabled if a fast clear operation is + * requested. + */ + if (params->stencil.enabled) + assert(params->hiz_op == BLORP_HIZ_OP_DEPTH_CLEAR); + + /* If we can't alter the depth stencil config and multiple layers are + * involved, the HiZ op will fail. This is because the op requires that a + * new config is emitted for each additional layer. + */ + if (batch->flags & BLORP_BATCH_NO_EMIT_DEPTH_STENCIL) { + assert(params->num_layers <= 1); + } else { + blorp_emit_depth_stencil_config(batch, params); + } + + blorp_emit(batch, GENX(3DSTATE_WM_HZ_OP), hzp) { + switch (params->hiz_op) { + case BLORP_HIZ_OP_DEPTH_CLEAR: + hzp.StencilBufferClearEnable = params->stencil.enabled; + hzp.DepthBufferClearEnable = params->depth.enabled; + hzp.StencilClearValue = params->stencil_ref; + break; + case BLORP_HIZ_OP_DEPTH_RESOLVE: + hzp.DepthBufferResolveEnable = true; + break; + case BLORP_HIZ_OP_HIZ_RESOLVE: + hzp.HierarchicalDepthBufferResolveEnable = true; + break; + case BLORP_HIZ_OP_NONE: + unreachable("Invalid HIZ op"); + } + + hzp.NumberofMultisamples = ffs(params->num_samples) - 1; + hzp.SampleMask = 0xFFFF; + + /* Due to a hardware issue, this bit MBZ */ + assert(hzp.ScissorRectangleEnable == false); + + /* Contrary to the HW docs both fields are inclusive */ + hzp.ClearRectangleXMin = params->x0; + hzp.ClearRectangleYMin = params->y0; + + /* Contrary to the HW docs both fields are exclusive */ + hzp.ClearRectangleXMax = params->x1; + hzp.ClearRectangleYMax = params->y1; + } + + /* PIPE_CONTROL w/ all bits clear except for “Post-Sync Operation” must set + * to “Write Immediate Data” enabled. + */ + blorp_emit(batch, GENX(PIPE_CONTROL), pc) { + pc.PostSyncOperation = WriteImmediateData; + } + + blorp_emit(batch, GENX(3DSTATE_WM_HZ_OP), hzp); + + /* Perform depth clear specific flushing */ + if (params->hiz_op == BLORP_HIZ_OP_DEPTH_CLEAR && params->depth.enabled) { + blorp_emit(batch, GENX(PIPE_CONTROL), pc) { + pc.DepthStallEnable = true; + pc.DepthCacheFlushEnable = true; + } + } +} +#endif + +/* 3DSTATE_VIEWPORT_STATE_POINTERS */ +static void +blorp_emit_viewport_state(struct blorp_batch *batch, + const struct blorp_params *params) +{ + uint32_t cc_vp_offset; + + void *state = blorp_alloc_dynamic_state(batch, AUB_TRACE_CC_VP_STATE, + GENX(CC_VIEWPORT_length) * 4, 32, + &cc_vp_offset); + + GENX(CC_VIEWPORT_pack)(batch, state, + &(struct GENX(CC_VIEWPORT)) { + .MinimumDepth = 0.0, + .MaximumDepth = 1.0, + }); + blorp_flush_range(batch, state, GENX(CC_VIEWPORT_length) * 4); + +#if GEN_GEN >= 7 + blorp_emit(batch, GENX(3DSTATE_VIEWPORT_STATE_POINTERS_CC), vsp) { + vsp.CCViewportPointer = cc_vp_offset; + } +#else + blorp_emit(batch, GENX(3DSTATE_VIEWPORT_STATE_POINTERS), vsp) { + vsp.CCViewportStateChange = true; + vsp.PointertoCC_VIEWPORT = cc_vp_offset; + } +#endif +} + + +/** + * \brief Execute a blit or render pass operation. + * + * To execute the operation, this function manually constructs and emits a + * batch to draw a rectangle primitive. The batchbuffer is flushed before + * constructing and after emitting the batch. + * + * This function alters no GL state. + */ +static void +blorp_exec(struct blorp_batch *batch, const struct blorp_params *params) +{ + uint32_t blend_state_offset = 0; + uint32_t color_calc_state_offset = 0; + uint32_t depth_stencil_state_offset; + +#if GEN_GEN >= 8 + if (params->hiz_op != BLORP_HIZ_OP_NONE) { + blorp_emit_gen8_hiz_op(batch, params); + return; + } +#endif + + blorp_emit_vertex_buffers(batch, params); + blorp_emit_vertex_elements(batch, params); + + emit_urb_config(batch, params); + + if (params->wm_prog_data) { + blend_state_offset = blorp_emit_blend_state(batch, params); + } + color_calc_state_offset = blorp_emit_color_calc_state(batch, params); + depth_stencil_state_offset = blorp_emit_depth_stencil_state(batch, params); + +#if GEN_GEN <= 6 + /* 3DSTATE_CC_STATE_POINTERS + * + * The pointer offsets are relative to + * CMD_STATE_BASE_ADDRESS.DynamicStateBaseAddress. + * + * The HiZ op doesn't use BLEND_STATE or COLOR_CALC_STATE. + * + * The dynamic state emit helpers emit their own STATE_POINTERS packets on + * gen7+. However, on gen6 and earlier, they're all lumpped together in + * one CC_STATE_POINTERS packet so we have to emit that here. + */ + blorp_emit(batch, GENX(3DSTATE_CC_STATE_POINTERS), cc) { + cc.BLEND_STATEChange = true; + cc.COLOR_CALC_STATEChange = true; + cc.DEPTH_STENCIL_STATEChange = true; + cc.PointertoBLEND_STATE = blend_state_offset; + cc.PointertoCOLOR_CALC_STATE = color_calc_state_offset; + cc.PointertoDEPTH_STENCIL_STATE = depth_stencil_state_offset; + } +#else + (void)blend_state_offset; + (void)color_calc_state_offset; + (void)depth_stencil_state_offset; +#endif + + blorp_emit(batch, GENX(3DSTATE_CONSTANT_VS), vs); +#if GEN_GEN >= 7 + blorp_emit(batch, GENX(3DSTATE_CONSTANT_HS), hs); + blorp_emit(batch, GENX(3DSTATE_CONSTANT_DS), DS); +#endif + blorp_emit(batch, GENX(3DSTATE_CONSTANT_GS), gs); + blorp_emit(batch, GENX(3DSTATE_CONSTANT_PS), ps); + + blorp_emit_surface_states(batch, params); + + if (params->src.enabled) + blorp_emit_sampler_state(batch, params); + + blorp_emit_3dstate_multisample(batch, params); + + blorp_emit(batch, GENX(3DSTATE_SAMPLE_MASK), mask) { + mask.SampleMask = (1 << params->num_samples) - 1; + } + + /* From the BSpec, 3D Pipeline > Geometry > Vertex Shader > State, + * 3DSTATE_VS, Dword 5.0 "VS Function Enable": + * + * [DevSNB] A pipeline flush must be programmed prior to a + * 3DSTATE_VS command that causes the VS Function Enable to + * toggle. Pipeline flush can be executed by sending a PIPE_CONTROL + * command with CS stall bit set and a post sync operation. + * + * We've already done one at the start of the BLORP operation. + */ + blorp_emit_vs_config(batch, params); +#if GEN_GEN >= 7 + blorp_emit(batch, GENX(3DSTATE_HS), hs); + blorp_emit(batch, GENX(3DSTATE_TE), te); + blorp_emit(batch, GENX(3DSTATE_DS), DS); + blorp_emit(batch, GENX(3DSTATE_STREAMOUT), so); +#endif + blorp_emit(batch, GENX(3DSTATE_GS), gs); + + blorp_emit(batch, GENX(3DSTATE_CLIP), clip) { + clip.PerspectiveDivideDisable = true; + } + + blorp_emit_sf_config(batch, params); + blorp_emit_ps_config(batch, params); + + blorp_emit_viewport_state(batch, params); + + if (!(batch->flags & BLORP_BATCH_NO_EMIT_DEPTH_STENCIL)) + blorp_emit_depth_stencil_config(batch, params); + + blorp_emit(batch, GENX(3DPRIMITIVE), prim) { + prim.VertexAccessType = SEQUENTIAL; + prim.PrimitiveTopologyType = _3DPRIM_RECTLIST; + prim.VertexCountPerInstance = 3; + prim.InstanceCount = params->num_layers; + } +} + +#endif /* BLORP_GENX_EXEC_H */ diff -Nru mesa-12.0.6/src/intel/blorp/blorp.h mesa-17.0.7/src/intel/blorp/blorp.h --- mesa-12.0.6/src/intel/blorp/blorp.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/blorp/blorp.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,221 @@ +/* + * Copyright © 2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef BLORP_H +#define BLORP_H + +#include +#include + +#include "isl/isl.h" + +struct brw_context; +struct brw_stage_prog_data; + +#ifdef __cplusplus +extern "C" { +#endif + +struct blorp_batch; +struct blorp_params; + +struct blorp_context { + void *driver_ctx; + + const struct isl_device *isl_dev; + + const struct brw_compiler *compiler; + + struct { + uint32_t tex; + uint32_t rb; + uint32_t vb; + } mocs; + + bool (*lookup_shader)(struct blorp_context *blorp, + const void *key, uint32_t key_size, + uint32_t *kernel_out, void *prog_data_out); + void (*upload_shader)(struct blorp_context *blorp, + const void *key, uint32_t key_size, + const void *kernel, uint32_t kernel_size, + const struct brw_stage_prog_data *prog_data, + uint32_t prog_data_size, + uint32_t *kernel_out, void *prog_data_out); + void (*exec)(struct blorp_batch *batch, const struct blorp_params *params); +}; + +void blorp_init(struct blorp_context *blorp, void *driver_ctx, + struct isl_device *isl_dev); +void blorp_finish(struct blorp_context *blorp); + +enum blorp_batch_flags { + /** + * This flag indicates that blorp should *not* re-emit the depth and + * stencil buffer packets. Instead, the driver guarantees that all depth + * and stencil images passed in will match what is currently set in the + * hardware. + */ + BLORP_BATCH_NO_EMIT_DEPTH_STENCIL = (1 << 0), +}; + +struct blorp_batch { + struct blorp_context *blorp; + void *driver_batch; + enum blorp_batch_flags flags; +}; + +void blorp_batch_init(struct blorp_context *blorp, struct blorp_batch *batch, + void *driver_batch, enum blorp_batch_flags flags); +void blorp_batch_finish(struct blorp_batch *batch); + +struct blorp_address { + void *buffer; + uint32_t read_domains; + uint32_t write_domain; + uint32_t offset; +}; + +struct blorp_surf +{ + const struct isl_surf *surf; + struct blorp_address addr; + + const struct isl_surf *aux_surf; + struct blorp_address aux_addr; + enum isl_aux_usage aux_usage; + + union isl_color_value clear_color; +}; + +void +blorp_blit(struct blorp_batch *batch, + const struct blorp_surf *src_surf, + unsigned src_level, unsigned src_layer, + enum isl_format src_format, struct isl_swizzle src_swizzle, + const struct blorp_surf *dst_surf, + unsigned dst_level, unsigned dst_layer, + enum isl_format dst_format, struct isl_swizzle dst_swizzle, + float src_x0, float src_y0, + float src_x1, float src_y1, + float dst_x0, float dst_y0, + float dst_x1, float dst_y1, + uint32_t filter, bool mirror_x, bool mirror_y); + +void +blorp_copy(struct blorp_batch *batch, + const struct blorp_surf *src_surf, + unsigned src_level, unsigned src_layer, + const struct blorp_surf *dst_surf, + unsigned dst_level, unsigned dst_layer, + uint32_t src_x, uint32_t src_y, + uint32_t dst_x, uint32_t dst_y, + uint32_t src_width, uint32_t src_height); + +void +blorp_fast_clear(struct blorp_batch *batch, + const struct blorp_surf *surf, enum isl_format format, + uint32_t level, uint32_t start_layer, uint32_t num_layers, + uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1); + +void +blorp_clear(struct blorp_batch *batch, + const struct blorp_surf *surf, + enum isl_format format, struct isl_swizzle swizzle, + uint32_t level, uint32_t start_layer, uint32_t num_layers, + uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1, + union isl_color_value clear_color, + const bool color_write_disable[4]); + +void +blorp_clear_depth_stencil(struct blorp_batch *batch, + const struct blorp_surf *depth, + const struct blorp_surf *stencil, + uint32_t level, uint32_t start_layer, + uint32_t num_layers, + uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1, + bool clear_depth, float depth_value, + uint8_t stencil_mask, uint8_t stencil_value); +bool +blorp_can_hiz_clear_depth(uint8_t gen, enum isl_format format, + uint32_t num_samples, + uint32_t x0, uint32_t y0, + uint32_t x1, uint32_t y1); + +void +blorp_gen8_hiz_clear_attachments(struct blorp_batch *batch, + uint32_t num_samples, + uint32_t x0, uint32_t y0, + uint32_t x1, uint32_t y1, + bool clear_depth, bool clear_stencil, + uint8_t stencil_value); +void +blorp_clear_attachments(struct blorp_batch *batch, + uint32_t binding_table_offset, + enum isl_format depth_format, + uint32_t num_samples, + uint32_t start_layer, uint32_t num_layers, + uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1, + bool clear_color, union isl_color_value color_value, + bool clear_depth, float depth_value, + uint8_t stencil_mask, uint8_t stencil_value); + +enum blorp_fast_clear_op { + BLORP_FAST_CLEAR_OP_NONE = 0, + BLORP_FAST_CLEAR_OP_CLEAR, + BLORP_FAST_CLEAR_OP_RESOLVE_PARTIAL, + BLORP_FAST_CLEAR_OP_RESOLVE_FULL, +}; + +void +blorp_ccs_resolve(struct blorp_batch *batch, + struct blorp_surf *surf, uint32_t level, uint32_t layer, + enum isl_format format, + enum blorp_fast_clear_op resolve_op); + +/** + * For an overview of the HiZ operations, see the following sections of the + * Sandy Bridge PRM, Volume 1, Part2: + * - 7.5.3.1 Depth Buffer Clear + * - 7.5.3.2 Depth Buffer Resolve + * - 7.5.3.3 Hierarchical Depth Buffer Resolve + * + * Of these, two get entered in the resolve map as needing to be done to the + * buffer: depth resolve and hiz resolve. + */ +enum blorp_hiz_op { + BLORP_HIZ_OP_NONE, + BLORP_HIZ_OP_DEPTH_CLEAR, + BLORP_HIZ_OP_DEPTH_RESOLVE, + BLORP_HIZ_OP_HIZ_RESOLVE, +}; + +void +blorp_gen6_hiz_op(struct blorp_batch *batch, + struct blorp_surf *surf, unsigned level, unsigned layer, + enum blorp_hiz_op op); + +#ifdef __cplusplus +} /* end extern "C" */ +#endif /* __cplusplus */ + +#endif /* BLORP_H */ diff -Nru mesa-12.0.6/src/intel/blorp/blorp_priv.h mesa-17.0.7/src/intel/blorp/blorp_priv.h --- mesa-12.0.6/src/intel/blorp/blorp_priv.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/blorp/blorp_priv.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,341 @@ +/* + * Copyright © 2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef BLORP_PRIV_H +#define BLORP_PRIV_H + +#include + +#include "compiler/nir/nir.h" +#include "brw_compiler.h" + +#include "blorp.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * Binding table indices used by BLORP. + */ +enum { + BLORP_RENDERBUFFER_BT_INDEX, + BLORP_TEXTURE_BT_INDEX, + BLORP_NUM_BT_ENTRIES +}; + +struct brw_blorp_surface_info +{ + bool enabled; + + struct isl_surf surf; + struct blorp_address addr; + + struct isl_surf aux_surf; + struct blorp_address aux_addr; + enum isl_aux_usage aux_usage; + + union isl_color_value clear_color; + + struct isl_view view; + + /* Z offset into a 3-D texture or slice of a 2-D array texture. */ + uint32_t z_offset; + + uint32_t tile_x_sa, tile_y_sa; +}; + +void +brw_blorp_surface_info_init(struct blorp_context *blorp, + struct brw_blorp_surface_info *info, + const struct blorp_surf *surf, + unsigned int level, unsigned int layer, + enum isl_format format, bool is_render_target); + + +struct brw_blorp_coord_transform +{ + float multiplier; + float offset; +}; + +/** + * Bounding rectangle telling pixel discard which pixels are not to be + * touched. This is needed in when surfaces are configured as something else + * what they really are: + * + * - writing W-tiled stencil as Y-tiled + * - writing interleaved multisampled as single sampled. + * + * See blorp_nir_discard_if_outside_rect(). + */ +struct brw_blorp_discard_rect +{ + uint32_t x0; + uint32_t x1; + uint32_t y0; + uint32_t y1; +}; + +/** + * Grid needed for blended and scaled blits of integer formats, see + * blorp_nir_manual_blend_bilinear(). + */ +struct brw_blorp_rect_grid +{ + float x1; + float y1; + float pad[2]; +}; + +struct blorp_surf_offset { + uint32_t x; + uint32_t y; +}; + +struct brw_blorp_wm_inputs +{ + uint32_t clear_color[4]; + + struct brw_blorp_discard_rect discard_rect; + struct brw_blorp_rect_grid rect_grid; + struct brw_blorp_coord_transform coord_transform[2]; + + struct blorp_surf_offset src_offset; + struct blorp_surf_offset dst_offset; + + /* Minimum layer setting works for all the textures types but texture_3d + * for which the setting has no effect. Use the z-coordinate instead. + */ + uint32_t src_z; + + /* Pad out to an integral number of registers */ + uint32_t pad[1]; +}; + +#define BLORP_CREATE_NIR_INPUT(shader, name, type) ({ \ + nir_variable *input = nir_variable_create((shader), nir_var_shader_in, \ + type, #name); \ + if ((shader)->stage == MESA_SHADER_FRAGMENT) \ + input->data.interpolation = INTERP_MODE_FLAT; \ + input->data.location = VARYING_SLOT_VAR0 + \ + offsetof(struct brw_blorp_wm_inputs, name) / (4 * sizeof(float)); \ + input->data.location_frac = \ + (offsetof(struct brw_blorp_wm_inputs, name) / sizeof(float)) % 4; \ + input; \ +}) + +struct blorp_vs_inputs { + uint32_t base_layer; + uint32_t _instance_id; /* Set in hardware by SGVS */ + uint32_t pad[2]; +}; + +static inline unsigned +brw_blorp_get_urb_length(const struct brw_wm_prog_data *prog_data) +{ + if (prog_data == NULL) + return 1; + + /* From the BSpec: 3D Pipeline - Strips and Fans - 3DSTATE_SBE + * + * read_length = ceiling((max_source_attr+1)/2) + */ + return MAX2((prog_data->num_varying_inputs + 1) / 2, 1); +} + +struct blorp_params +{ + uint32_t x0; + uint32_t y0; + uint32_t x1; + uint32_t y1; + float z; + uint8_t stencil_mask; + uint8_t stencil_ref; + struct brw_blorp_surface_info depth; + struct brw_blorp_surface_info stencil; + uint32_t depth_format; + struct brw_blorp_surface_info src; + struct brw_blorp_surface_info dst; + enum blorp_hiz_op hiz_op; + enum blorp_fast_clear_op fast_clear_op; + bool color_write_disable[4]; + struct brw_blorp_wm_inputs wm_inputs; + struct blorp_vs_inputs vs_inputs; + unsigned num_samples; + unsigned num_draw_buffers; + unsigned num_layers; + uint32_t vs_prog_kernel; + struct brw_vs_prog_data *vs_prog_data; + uint32_t wm_prog_kernel; + struct brw_wm_prog_data *wm_prog_data; + + bool use_pre_baked_binding_table; + uint32_t pre_baked_binding_table_offset; +}; + +void blorp_params_init(struct blorp_params *params); + +enum blorp_shader_type { + BLORP_SHADER_TYPE_BLIT, + BLORP_SHADER_TYPE_CLEAR, + BLORP_SHADER_TYPE_LAYER_OFFSET_VS, +}; + +struct brw_blorp_blit_prog_key +{ + enum blorp_shader_type shader_type; /* Must be BLORP_SHADER_TYPE_BLIT */ + + /* Number of samples per pixel that have been configured in the surface + * state for texturing from. + */ + unsigned tex_samples; + + /* MSAA layout that has been configured in the surface state for texturing + * from. + */ + enum isl_msaa_layout tex_layout; + + enum isl_aux_usage tex_aux_usage; + + /* Actual number of samples per pixel in the source image. */ + unsigned src_samples; + + /* Actual MSAA layout used by the source image. */ + enum isl_msaa_layout src_layout; + + /* Number of bits per channel in the source image. */ + uint8_t src_bpc; + + /* Number of samples per pixel that have been configured in the render + * target. + */ + unsigned rt_samples; + + /* MSAA layout that has been configured in the render target. */ + enum isl_msaa_layout rt_layout; + + /* Actual number of samples per pixel in the destination image. */ + unsigned dst_samples; + + /* Actual MSAA layout used by the destination image. */ + enum isl_msaa_layout dst_layout; + + /* Number of bits per channel in the destination image. */ + uint8_t dst_bpc; + + /* Type of the data to be read from the texture (one of + * nir_type_(int|uint|float)). + */ + nir_alu_type texture_data_type; + + /* True if the source image is W tiled. If true, the surface state for the + * source image must be configured as Y tiled, and tex_samples must be 0. + */ + bool src_tiled_w; + + /* True if the destination image is W tiled. If true, the surface state + * for the render target must be configured as Y tiled, and rt_samples must + * be 0. + */ + bool dst_tiled_w; + + /* True if the destination is an RGB format. If true, the surface state + * for the render target must be configured as red with three times the + * normal width. We need to do this because you cannot render to + * non-power-of-two formats. + */ + bool dst_rgb; + + /* True if all source samples should be blended together to produce each + * destination pixel. If true, src_tiled_w must be false, tex_samples must + * equal src_samples, and tex_samples must be nonzero. + */ + bool blend; + + /* True if the rectangle being sent through the rendering pipeline might be + * larger than the destination rectangle, so the WM program should kill any + * pixels that are outside the destination rectangle. + */ + bool use_kill; + + /** + * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more + * than one sample per pixel. + */ + bool persample_msaa_dispatch; + + /* True for scaled blitting. */ + bool blit_scaled; + + /* True if this blit operation may involve intratile offsets on the source. + * In this case, we need to add the offset before texturing. + */ + bool need_src_offset; + + /* True if this blit operation may involve intratile offsets on the + * destination. In this case, we need to add the offset to gl_FragCoord. + */ + bool need_dst_offset; + + /* Scale factors between the pixel grid and the grid of samples. We're + * using grid of samples for bilinear filetring in multisample scaled blits. + */ + float x_scale; + float y_scale; + + /* True for blits with filter = GL_LINEAR. */ + bool bilinear_filter; +}; + +/** + * \name BLORP internals + * \{ + * + * Used internally by gen6_blorp_exec() and gen7_blorp_exec(). + */ + +void brw_blorp_init_wm_prog_key(struct brw_wm_prog_key *wm_key); + +const unsigned * +blorp_compile_fs(struct blorp_context *blorp, void *mem_ctx, + struct nir_shader *nir, + const struct brw_wm_prog_key *wm_key, + bool use_repclear, + struct brw_wm_prog_data *wm_prog_data, + unsigned *program_size); + +const unsigned * +blorp_compile_vs(struct blorp_context *blorp, void *mem_ctx, + struct nir_shader *nir, + struct brw_vs_prog_data *vs_prog_data, + unsigned *program_size); + +/** \} */ + +#ifdef __cplusplus +} /* end extern "C" */ +#endif /* __cplusplus */ + +#endif /* BLORP_PRIV_H */ diff -Nru mesa-12.0.6/src/intel/common/gen_device_info.c mesa-17.0.7/src/intel/common/gen_device_info.c --- mesa-12.0.6/src/intel/common/gen_device_info.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/common/gen_device_info.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,597 @@ +/* + * Copyright © 2013 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include +#include +#include "gen_device_info.h" +#include "compiler/shader_enums.h" + +static const struct gen_device_info gen_device_info_i965 = { + .gen = 4, + .has_negative_rhw_bug = true, + .num_slices = 1, + .max_vs_threads = 16, + .max_gs_threads = 2, + .max_wm_threads = 8 * 4, + .urb = { + .size = 256, + }, +}; + +static const struct gen_device_info gen_device_info_g4x = { + .gen = 4, + .has_pln = true, + .has_compr4 = true, + .has_surface_tile_offset = true, + .is_g4x = true, + .num_slices = 1, + .max_vs_threads = 32, + .max_gs_threads = 2, + .max_wm_threads = 10 * 5, + .urb = { + .size = 384, + }, +}; + +static const struct gen_device_info gen_device_info_ilk = { + .gen = 5, + .has_pln = true, + .has_compr4 = true, + .has_surface_tile_offset = true, + .num_slices = 1, + .max_vs_threads = 72, + .max_gs_threads = 32, + .max_wm_threads = 12 * 6, + .urb = { + .size = 1024, + }, +}; + +static const struct gen_device_info gen_device_info_snb_gt1 = { + .gen = 6, + .gt = 1, + .has_hiz_and_separate_stencil = true, + .has_llc = true, + .has_pln = true, + .has_surface_tile_offset = true, + .needs_unlit_centroid_workaround = true, + .num_slices = 1, + .max_vs_threads = 24, + .max_gs_threads = 21, /* conservative; 24 if rendering disabled. */ + .max_wm_threads = 40, + .urb = { + .size = 32, + .min_entries = { + [MESA_SHADER_VERTEX] = 24, + }, + .max_entries = { + [MESA_SHADER_VERTEX] = 256, + [MESA_SHADER_GEOMETRY] = 256, + }, + }, +}; + +static const struct gen_device_info gen_device_info_snb_gt2 = { + .gen = 6, + .gt = 2, + .has_hiz_and_separate_stencil = true, + .has_llc = true, + .has_pln = true, + .has_surface_tile_offset = true, + .needs_unlit_centroid_workaround = true, + .num_slices = 1, + .max_vs_threads = 60, + .max_gs_threads = 60, + .max_wm_threads = 80, + .urb = { + .size = 64, + .min_entries = { + [MESA_SHADER_VERTEX] = 24, + }, + .max_entries = { + [MESA_SHADER_VERTEX] = 256, + [MESA_SHADER_GEOMETRY] = 256, + }, + }, +}; + +#define GEN7_FEATURES \ + .gen = 7, \ + .has_hiz_and_separate_stencil = true, \ + .must_use_separate_stencil = true, \ + .has_llc = true, \ + .has_pln = true, \ + .has_surface_tile_offset = true + +static const struct gen_device_info gen_device_info_ivb_gt1 = { + GEN7_FEATURES, .is_ivybridge = true, .gt = 1, + .num_slices = 1, + .max_vs_threads = 36, + .max_tcs_threads = 36, + .max_tes_threads = 36, + .max_gs_threads = 36, + .max_wm_threads = 48, + .max_cs_threads = 36, + .urb = { + .size = 128, + .min_entries = { + [MESA_SHADER_VERTEX] = 32, + [MESA_SHADER_TESS_EVAL] = 10, + }, + .max_entries = { + [MESA_SHADER_VERTEX] = 512, + [MESA_SHADER_TESS_CTRL] = 32, + [MESA_SHADER_TESS_EVAL] = 288, + [MESA_SHADER_GEOMETRY] = 192, + }, + }, +}; + +static const struct gen_device_info gen_device_info_ivb_gt2 = { + GEN7_FEATURES, .is_ivybridge = true, .gt = 2, + .num_slices = 1, + .max_vs_threads = 128, + .max_tcs_threads = 128, + .max_tes_threads = 128, + .max_gs_threads = 128, + .max_wm_threads = 172, + .max_cs_threads = 64, + .urb = { + .size = 256, + .min_entries = { + [MESA_SHADER_VERTEX] = 32, + [MESA_SHADER_TESS_EVAL] = 10, + }, + .max_entries = { + [MESA_SHADER_VERTEX] = 704, + [MESA_SHADER_TESS_CTRL] = 64, + [MESA_SHADER_TESS_EVAL] = 448, + [MESA_SHADER_GEOMETRY] = 320, + }, + }, +}; + +static const struct gen_device_info gen_device_info_byt = { + GEN7_FEATURES, .is_baytrail = true, .gt = 1, + .num_slices = 1, + .has_llc = false, + .max_vs_threads = 36, + .max_tcs_threads = 36, + .max_tes_threads = 36, + .max_gs_threads = 36, + .max_wm_threads = 48, + .max_cs_threads = 32, + .urb = { + .size = 128, + .min_entries = { + [MESA_SHADER_VERTEX] = 32, + [MESA_SHADER_TESS_EVAL] = 10, + }, + .max_entries = { + [MESA_SHADER_VERTEX] = 512, + [MESA_SHADER_TESS_CTRL] = 32, + [MESA_SHADER_TESS_EVAL] = 288, + [MESA_SHADER_GEOMETRY] = 192, + }, + }, +}; + +#define HSW_FEATURES \ + GEN7_FEATURES, \ + .is_haswell = true, \ + .supports_simd16_3src = true, \ + .has_resource_streamer = true + +static const struct gen_device_info gen_device_info_hsw_gt1 = { + HSW_FEATURES, .gt = 1, + .num_slices = 1, + .max_vs_threads = 70, + .max_tcs_threads = 70, + .max_tes_threads = 70, + .max_gs_threads = 70, + .max_wm_threads = 102, + .max_cs_threads = 70, + .urb = { + .size = 128, + .min_entries = { + [MESA_SHADER_VERTEX] = 32, + [MESA_SHADER_TESS_EVAL] = 10, + }, + .max_entries = { + [MESA_SHADER_VERTEX] = 640, + [MESA_SHADER_TESS_CTRL] = 64, + [MESA_SHADER_TESS_EVAL] = 384, + [MESA_SHADER_GEOMETRY] = 256, + }, + }, +}; + +static const struct gen_device_info gen_device_info_hsw_gt2 = { + HSW_FEATURES, .gt = 2, + .num_slices = 1, + .max_vs_threads = 280, + .max_tcs_threads = 256, + .max_tes_threads = 280, + .max_gs_threads = 256, + .max_wm_threads = 204, + .max_cs_threads = 70, + .urb = { + .size = 256, + .min_entries = { + [MESA_SHADER_VERTEX] = 64, + [MESA_SHADER_TESS_EVAL] = 10, + }, + .max_entries = { + [MESA_SHADER_VERTEX] = 1664, + [MESA_SHADER_TESS_CTRL] = 128, + [MESA_SHADER_TESS_EVAL] = 960, + [MESA_SHADER_GEOMETRY] = 640, + }, + }, +}; + +static const struct gen_device_info gen_device_info_hsw_gt3 = { + HSW_FEATURES, .gt = 3, + .num_slices = 2, + .max_vs_threads = 280, + .max_tcs_threads = 256, + .max_tes_threads = 280, + .max_gs_threads = 256, + .max_wm_threads = 408, + .max_cs_threads = 70, + .urb = { + .size = 512, + .min_entries = { + [MESA_SHADER_VERTEX] = 64, + [MESA_SHADER_TESS_EVAL] = 10, + }, + .max_entries = { + [MESA_SHADER_VERTEX] = 1664, + [MESA_SHADER_TESS_CTRL] = 128, + [MESA_SHADER_TESS_EVAL] = 960, + [MESA_SHADER_GEOMETRY] = 640, + }, + }, +}; + +#define GEN8_FEATURES \ + .gen = 8, \ + .has_hiz_and_separate_stencil = true, \ + .has_resource_streamer = true, \ + .must_use_separate_stencil = true, \ + .has_llc = true, \ + .has_pln = true, \ + .supports_simd16_3src = true, \ + .has_surface_tile_offset = true, \ + .max_vs_threads = 504, \ + .max_tcs_threads = 504, \ + .max_tes_threads = 504, \ + .max_gs_threads = 504, \ + .max_wm_threads = 384 + +static const struct gen_device_info gen_device_info_bdw_gt1 = { + GEN8_FEATURES, .gt = 1, + .num_slices = 1, + .max_cs_threads = 42, + .urb = { + .size = 192, + .min_entries = { + [MESA_SHADER_VERTEX] = 64, + [MESA_SHADER_TESS_EVAL] = 34, + }, + .max_entries = { + [MESA_SHADER_VERTEX] = 2560, + [MESA_SHADER_TESS_CTRL] = 504, + [MESA_SHADER_TESS_EVAL] = 1536, + [MESA_SHADER_GEOMETRY] = 960, + }, + } +}; + +static const struct gen_device_info gen_device_info_bdw_gt2 = { + GEN8_FEATURES, .gt = 2, + .num_slices = 1, + .max_cs_threads = 56, + .urb = { + .size = 384, + .min_entries = { + [MESA_SHADER_VERTEX] = 64, + [MESA_SHADER_TESS_EVAL] = 34, + }, + .max_entries = { + [MESA_SHADER_VERTEX] = 2560, + [MESA_SHADER_TESS_CTRL] = 504, + [MESA_SHADER_TESS_EVAL] = 1536, + [MESA_SHADER_GEOMETRY] = 960, + }, + } +}; + +static const struct gen_device_info gen_device_info_bdw_gt3 = { + GEN8_FEATURES, .gt = 3, + .num_slices = 2, + .max_cs_threads = 56, + .urb = { + .size = 384, + .min_entries = { + [MESA_SHADER_VERTEX] = 64, + [MESA_SHADER_TESS_EVAL] = 34, + }, + .max_entries = { + [MESA_SHADER_VERTEX] = 2560, + [MESA_SHADER_TESS_CTRL] = 504, + [MESA_SHADER_TESS_EVAL] = 1536, + [MESA_SHADER_GEOMETRY] = 960, + }, + } +}; + +static const struct gen_device_info gen_device_info_chv = { + GEN8_FEATURES, .is_cherryview = 1, .gt = 1, + .has_llc = false, + .num_slices = 1, + .max_vs_threads = 80, + .max_tcs_threads = 80, + .max_tes_threads = 80, + .max_gs_threads = 80, + .max_wm_threads = 128, + .max_cs_threads = 6 * 7, + .urb = { + .size = 192, + .min_entries = { + [MESA_SHADER_VERTEX] = 34, + [MESA_SHADER_TESS_EVAL] = 34, + }, + .max_entries = { + [MESA_SHADER_VERTEX] = 640, + [MESA_SHADER_TESS_CTRL] = 80, + [MESA_SHADER_TESS_EVAL] = 384, + [MESA_SHADER_GEOMETRY] = 256, + }, + } +}; + +#define GEN9_FEATURES \ + .gen = 9, \ + .has_hiz_and_separate_stencil = true, \ + .has_resource_streamer = true, \ + .must_use_separate_stencil = true, \ + .has_llc = true, \ + .has_pln = true, \ + .supports_simd16_3src = true, \ + .has_surface_tile_offset = true, \ + .max_vs_threads = 336, \ + .max_gs_threads = 336, \ + .max_tcs_threads = 336, \ + .max_tes_threads = 336, \ + .max_cs_threads = 56, \ + .urb = { \ + .size = 384, \ + .min_entries = { \ + [MESA_SHADER_VERTEX] = 64, \ + [MESA_SHADER_TESS_EVAL] = 34, \ + }, \ + .max_entries = { \ + [MESA_SHADER_VERTEX] = 1856, \ + [MESA_SHADER_TESS_CTRL] = 672, \ + [MESA_SHADER_TESS_EVAL] = 1120, \ + [MESA_SHADER_GEOMETRY] = 640, \ + }, \ + } + +#define GEN9_LP_FEATURES \ + GEN9_FEATURES, \ + .is_broxton = 1, \ + .gt = 1, \ + .has_llc = false, \ + .num_slices = 1, \ + .max_vs_threads = 112, \ + .max_tcs_threads = 112, \ + .max_tes_threads = 112, \ + .max_gs_threads = 112, \ + .max_cs_threads = 6 * 6, \ + .urb = { \ + .size = 192, \ + .min_entries = { \ + [MESA_SHADER_VERTEX] = 34, \ + [MESA_SHADER_TESS_EVAL] = 34, \ + }, \ + .max_entries = { \ + [MESA_SHADER_VERTEX] = 704, \ + [MESA_SHADER_TESS_CTRL] = 256, \ + [MESA_SHADER_TESS_EVAL] = 416, \ + [MESA_SHADER_GEOMETRY] = 256, \ + }, \ + } + +#define GEN9_LP_FEATURES_2X6 \ + GEN9_LP_FEATURES, \ + .max_vs_threads = 56, \ + .max_tcs_threads = 56, \ + .max_tes_threads = 56, \ + .max_gs_threads = 56, \ + .max_cs_threads = 6 * 6, \ + .urb = { \ + .size = 128, \ + .min_entries = { \ + [MESA_SHADER_VERTEX] = 34, \ + [MESA_SHADER_TESS_EVAL] = 34, \ + }, \ + .max_entries = { \ + [MESA_SHADER_VERTEX] = 352, \ + [MESA_SHADER_TESS_CTRL] = 128, \ + [MESA_SHADER_TESS_EVAL] = 208, \ + [MESA_SHADER_GEOMETRY] = 128, \ + }, \ + } + +static const struct gen_device_info gen_device_info_skl_gt1 = { + GEN9_FEATURES, .gt = 1, + .num_slices = 1, + .urb.size = 192, +}; + +static const struct gen_device_info gen_device_info_skl_gt2 = { + GEN9_FEATURES, .gt = 2, + .num_slices = 1, +}; + +static const struct gen_device_info gen_device_info_skl_gt3 = { + GEN9_FEATURES, .gt = 3, + .num_slices = 2, +}; + +static const struct gen_device_info gen_device_info_skl_gt4 = { + GEN9_FEATURES, .gt = 4, + .num_slices = 3, + /* From the "L3 Allocation and Programming" documentation: + * + * "URB is limited to 1008KB due to programming restrictions. This is not a + * restriction of the L3 implementation, but of the FF and other clients. + * Therefore, in a GT4 implementation it is possible for the programmed + * allocation of the L3 data array to provide 3*384KB=1152KB for URB, but + * only 1008KB of this will be used." + */ + .urb.size = 1008 / 3, +}; + +static const struct gen_device_info gen_device_info_bxt = { + GEN9_LP_FEATURES +}; + +static const struct gen_device_info gen_device_info_bxt_2x6 = { + GEN9_LP_FEATURES_2X6 +}; +/* + * Note: for all KBL SKUs, the PRM says SKL for GS entries, not SKL+. + * There's no KBL entry. Using the default SKL (GEN9) GS entries value. + */ + +static const struct gen_device_info gen_device_info_kbl_gt1 = { + GEN9_FEATURES, + .is_kabylake = true, + .gt = 1, + + .max_cs_threads = 7 * 6, + .urb.size = 192, + .num_slices = 1, +}; + +static const struct gen_device_info gen_device_info_kbl_gt1_5 = { + GEN9_FEATURES, + .is_kabylake = true, + .gt = 1, + + .max_cs_threads = 7 * 6, + .num_slices = 1, +}; + +static const struct gen_device_info gen_device_info_kbl_gt2 = { + GEN9_FEATURES, + .is_kabylake = true, + .gt = 2, + + .num_slices = 1, +}; + +static const struct gen_device_info gen_device_info_kbl_gt3 = { + GEN9_FEATURES, + .is_kabylake = true, + .gt = 3, + + .num_slices = 2, +}; + +static const struct gen_device_info gen_device_info_kbl_gt4 = { + GEN9_FEATURES, + .is_kabylake = true, + .gt = 4, + + /* + * From the "L3 Allocation and Programming" documentation: + * + * "URB is limited to 1008KB due to programming restrictions. This + * is not a restriction of the L3 implementation, but of the FF and + * other clients. Therefore, in a GT4 implementation it is + * possible for the programmed allocation of the L3 data array to + * provide 3*384KB=1152KB for URB, but only 1008KB of this + * will be used." + */ + .urb.size = 1008 / 3, + .num_slices = 3, +}; + +static const struct gen_device_info gen_device_info_glk = { + GEN9_LP_FEATURES +}; + +static const struct gen_device_info gen_device_info_glk_2x6 = { + GEN9_LP_FEATURES_2X6 +}; + +bool +gen_get_device_info(int devid, struct gen_device_info *devinfo) +{ + switch (devid) { +#undef CHIPSET +#define CHIPSET(id, family, name) \ + case id: *devinfo = gen_device_info_##family; break; +#include "pci_ids/i965_pci_ids.h" + default: + fprintf(stderr, "i965_dri.so does not support the 0x%x PCI ID.\n", devid); + return false; + } + + /* From the Skylake PRM, 3DSTATE_PS::Scratch Space Base Pointer: + * + * "Scratch Space per slice is computed based on 4 sub-slices. SW must + * allocate scratch space enough so that each slice has 4 slices allowed." + * + * The equivalent internal documentation says that this programming note + * applies to all Gen9+ platforms. + * + * The hardware typically calculates the scratch space pointer by taking + * the base address, and adding per-thread-scratch-space * thread ID. + * Extra padding can be necessary depending how the thread IDs are + * calculated for a particular shader stage. + */ + if (devinfo->gen >= 9) { + devinfo->max_wm_threads = 64 /* threads-per-PSD */ + * devinfo->num_slices + * 4; /* effective subslices per slice */ + } + + return true; +} + +const char * +gen_get_device_name(int devid) +{ + switch (devid) { +#undef CHIPSET +#define CHIPSET(id, family, name) case id: return name; +#include "pci_ids/i965_pci_ids.h" + default: + return NULL; + } +} diff -Nru mesa-12.0.6/src/intel/common/gen_device_info.h mesa-17.0.7/src/intel/common/gen_device_info.h --- mesa-12.0.6/src/intel/common/gen_device_info.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/common/gen_device_info.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,156 @@ + /* + * Copyright © 2013 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +#ifndef GEN_DEVICE_INFO_H +#define GEN_DEVICE_INFO_H + +#include + +/** + * Intel hardware information and quirks + */ +struct gen_device_info +{ + int gen; /**< Generation number: 4, 5, 6, 7, ... */ + int gt; + + bool is_g4x; + bool is_ivybridge; + bool is_baytrail; + bool is_haswell; + bool is_cherryview; + bool is_broxton; + bool is_kabylake; + + bool has_hiz_and_separate_stencil; + bool must_use_separate_stencil; + + bool has_llc; + + bool has_pln; + bool has_compr4; + bool has_surface_tile_offset; + bool supports_simd16_3src; + bool has_resource_streamer; + + /** + * \name Intel hardware quirks + * @{ + */ + bool has_negative_rhw_bug; + + /** + * Some versions of Gen hardware don't do centroid interpolation correctly + * on unlit pixels, causing incorrect values for derivatives near triangle + * edges. Enabling this flag causes the fragment shader to use + * non-centroid interpolation for unlit pixels, at the expense of two extra + * fragment shader instructions. + */ + bool needs_unlit_centroid_workaround; + /** @} */ + + /** + * \name GPU hardware limits + * + * In general, you can find shader thread maximums by looking at the "Maximum + * Number of Threads" field in the Intel PRM description of the 3DSTATE_VS, + * 3DSTATE_GS, 3DSTATE_HS, 3DSTATE_DS, and 3DSTATE_PS commands. URB entry + * limits come from the "Number of URB Entries" field in the + * 3DSTATE_URB_VS command and friends. + * + * These fields are used to calculate the scratch space to allocate. The + * amount of scratch space can be larger without being harmful on modern + * GPUs, however, prior to Haswell, programming the maximum number of threads + * to greater than the hardware maximum would cause GPU performance to tank. + * + * @{ + */ + /** + * Total number of slices present on the device whether or not they've been + * fused off. + * + * XXX: CS thread counts are limited by the inability to do cross subslice + * communication. It is the effectively the number of logical threads which + * can be executed in a subslice. Fuse configurations may cause this number + * to change, so we program @max_cs_threads as the lower maximum. + */ + unsigned num_slices; + unsigned max_vs_threads; /**< Maximum Vertex Shader threads */ + unsigned max_tcs_threads; /**< Maximum Hull Shader threads */ + unsigned max_tes_threads; /**< Maximum Domain Shader threads */ + unsigned max_gs_threads; /**< Maximum Geometry Shader threads. */ + /** + * Theoretical maximum number of Pixel Shader threads. + * + * PSD means Pixel Shader Dispatcher. On modern Intel GPUs, hardware will + * automatically scale pixel shader thread count, based on a single value + * programmed into 3DSTATE_PS. + * + * To calculate the maximum number of threads for Gen8 beyond (which have + * multiple Pixel Shader Dispatchers): + * + * - Look up 3DSTATE_PS and find "Maximum Number of Threads Per PSD" + * - Usually there's only one PSD per subslice, so use the number of + * subslices for number of PSDs. + * - For max_wm_threads, the total should be PSD threads * #PSDs. + */ + unsigned max_wm_threads; + + /** + * Maximum Compute Shader threads. + * + * Thread count * number of EUs per subslice + */ + unsigned max_cs_threads; + + struct { + /** + * Hardware default URB size. + * + * The units this is expressed in are somewhat inconsistent: 512b units + * on Gen4-5, KB on Gen6-7, and KB times the slice count on Gen8+. + * + * Look up "URB Size" in the "Device Attributes" page, and take the + * maximum. Look up the slice count for each GT SKU on the same page. + * urb.size = URB Size (kbytes) / slice count + */ + unsigned size; + + /** + * The minimum number of URB entries. See the 3DSTATE_URB_ docs. + */ + unsigned min_entries[4]; + + /** + * The maximum number of URB entries. See the 3DSTATE_URB_ docs. + */ + unsigned max_entries[4]; + } urb; + /** @} */ +}; + +bool gen_get_device_info(int devid, struct gen_device_info *devinfo); +const char *gen_get_device_name(int devid); + +#endif /* GEN_DEVICE_INFO_H */ diff -Nru mesa-12.0.6/src/intel/common/gen_l3_config.c mesa-17.0.7/src/intel/common/gen_l3_config.c --- mesa-12.0.6/src/intel/common/gen_l3_config.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/common/gen_l3_config.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,306 @@ +/* + * Copyright (c) 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include +#include + +#include "util/macros.h" +#include "main/macros.h" + +#include "gen_l3_config.h" + +/** + * IVB/HSW validated L3 configurations. The first entry will be used as + * default by gen7_restore_default_l3_config(), otherwise the ordering is + * unimportant. + */ +static const struct gen_l3_config ivb_l3_configs[] = { + /* SLM URB ALL DC RO IS C T */ + {{ 0, 32, 0, 0, 32, 0, 0, 0 }}, + {{ 0, 32, 0, 16, 16, 0, 0, 0 }}, + {{ 0, 32, 0, 4, 0, 8, 4, 16 }}, + {{ 0, 28, 0, 8, 0, 8, 4, 16 }}, + {{ 0, 28, 0, 16, 0, 8, 4, 8 }}, + {{ 0, 28, 0, 8, 0, 16, 4, 8 }}, + {{ 0, 28, 0, 0, 0, 16, 4, 16 }}, + {{ 0, 32, 0, 0, 0, 16, 0, 16 }}, + {{ 0, 28, 0, 4, 32, 0, 0, 0 }}, + {{ 16, 16, 0, 16, 16, 0, 0, 0 }}, + {{ 16, 16, 0, 8, 0, 8, 8, 8 }}, + {{ 16, 16, 0, 4, 0, 8, 4, 16 }}, + {{ 16, 16, 0, 4, 0, 16, 4, 8 }}, + {{ 16, 16, 0, 0, 32, 0, 0, 0 }}, + {{ 0 }} +}; + +/** + * VLV validated L3 configurations. \sa ivb_l3_configs. + */ +static const struct gen_l3_config vlv_l3_configs[] = { + /* SLM URB ALL DC RO IS C T */ + {{ 0, 64, 0, 0, 32, 0, 0, 0 }}, + {{ 0, 80, 0, 0, 16, 0, 0, 0 }}, + {{ 0, 80, 0, 8, 8, 0, 0, 0 }}, + {{ 0, 64, 0, 16, 16, 0, 0, 0 }}, + {{ 0, 60, 0, 4, 32, 0, 0, 0 }}, + {{ 32, 32, 0, 16, 16, 0, 0, 0 }}, + {{ 32, 40, 0, 8, 16, 0, 0, 0 }}, + {{ 32, 40, 0, 16, 8, 0, 0, 0 }}, + {{ 0 }} +}; + +/** + * BDW validated L3 configurations. \sa ivb_l3_configs. + */ +static const struct gen_l3_config bdw_l3_configs[] = { + /* SLM URB ALL DC RO IS C T */ + {{ 0, 48, 48, 0, 0, 0, 0, 0 }}, + {{ 0, 48, 0, 16, 32, 0, 0, 0 }}, + {{ 0, 32, 0, 16, 48, 0, 0, 0 }}, + {{ 0, 32, 0, 0, 64, 0, 0, 0 }}, + {{ 0, 32, 64, 0, 0, 0, 0, 0 }}, + {{ 24, 16, 48, 0, 0, 0, 0, 0 }}, + {{ 24, 16, 0, 16, 32, 0, 0, 0 }}, + {{ 24, 16, 0, 32, 16, 0, 0, 0 }}, + {{ 0 }} +}; + +/** + * CHV/SKL validated L3 configurations. \sa ivb_l3_configs. + */ +static const struct gen_l3_config chv_l3_configs[] = { + /* SLM URB ALL DC RO IS C T */ + {{ 0, 48, 48, 0, 0, 0, 0, 0 }}, + {{ 0, 48, 0, 16, 32, 0, 0, 0 }}, + {{ 0, 32, 0, 16, 48, 0, 0, 0 }}, + {{ 0, 32, 0, 0, 64, 0, 0, 0 }}, + {{ 0, 32, 64, 0, 0, 0, 0, 0 }}, + {{ 32, 16, 48, 0, 0, 0, 0, 0 }}, + {{ 32, 16, 0, 16, 32, 0, 0, 0 }}, + {{ 32, 16, 0, 32, 16, 0, 0, 0 }}, + {{ 0 }} +}; + +/** + * Return a zero-terminated array of validated L3 configurations for the + * specified device. + */ +static const struct gen_l3_config * +get_l3_configs(const struct gen_device_info *devinfo) +{ + switch (devinfo->gen) { + case 7: + return (devinfo->is_baytrail ? vlv_l3_configs : ivb_l3_configs); + + case 8: + return (devinfo->is_cherryview ? chv_l3_configs : bdw_l3_configs); + + case 9: + return chv_l3_configs; + + default: + unreachable("Not implemented"); + } +} + +/** + * L1-normalize a vector of L3 partition weights. + */ +static struct gen_l3_weights +norm_l3_weights(struct gen_l3_weights w) +{ + float sz = 0; + + for (unsigned i = 0; i < GEN_NUM_L3P; i++) + sz += w.w[i]; + + for (unsigned i = 0; i < GEN_NUM_L3P; i++) + w.w[i] /= sz; + + return w; +} + +/** + * Get the relative partition weights of the specified L3 configuration. + */ +struct gen_l3_weights +gen_get_l3_config_weights(const struct gen_l3_config *cfg) +{ + if (cfg) { + struct gen_l3_weights w; + + for (unsigned i = 0; i < GEN_NUM_L3P; i++) + w.w[i] = cfg->n[i]; + + return norm_l3_weights(w); + } else { + const struct gen_l3_weights w = { { 0 } }; + return w; + } +} + +/** + * Distance between two L3 configurations represented as vectors of weights. + * Usually just the L1 metric except when the two configurations are + * considered incompatible in which case the distance will be infinite. Note + * that the compatibility condition is asymmetric -- They will be considered + * incompatible whenever the reference configuration \p w0 requires SLM, DC, + * or URB but \p w1 doesn't provide it. + */ +float +gen_diff_l3_weights(struct gen_l3_weights w0, struct gen_l3_weights w1) +{ + if ((w0.w[GEN_L3P_SLM] && !w1.w[GEN_L3P_SLM]) || + (w0.w[GEN_L3P_DC] && !w1.w[GEN_L3P_DC] && !w1.w[GEN_L3P_ALL]) || + (w0.w[GEN_L3P_URB] && !w1.w[GEN_L3P_URB])) { + return HUGE_VALF; + + } else { + float dw = 0; + + for (unsigned i = 0; i < GEN_NUM_L3P; i++) + dw += fabs(w0.w[i] - w1.w[i]); + + return dw; + } +} + +/** + * Return a reasonable default L3 configuration for the specified device based + * on whether SLM and DC are required. In the non-SLM non-DC case the result + * is intended to approximately resemble the hardware defaults. + */ +struct gen_l3_weights +gen_get_default_l3_weights(const struct gen_device_info *devinfo, + bool needs_dc, bool needs_slm) +{ + struct gen_l3_weights w = {{ 0 }}; + + w.w[GEN_L3P_SLM] = needs_slm; + w.w[GEN_L3P_URB] = 1.0; + + if (devinfo->gen >= 8) { + w.w[GEN_L3P_ALL] = 1.0; + } else { + w.w[GEN_L3P_DC] = needs_dc ? 0.1 : 0; + w.w[GEN_L3P_RO] = devinfo->is_baytrail ? 0.5 : 1.0; + } + + return norm_l3_weights(w); +} + +/** + * Get the default L3 configuration + */ +const struct gen_l3_config * +gen_get_default_l3_config(const struct gen_device_info *devinfo) +{ + /* For efficiency assume that the first entry of the array matches the + * default configuration. + */ + const struct gen_l3_config *const cfg = get_l3_configs(devinfo); + assert(cfg == gen_get_l3_config(devinfo, + gen_get_default_l3_weights(devinfo, false, false))); + return cfg; +} + +/** + * Return the closest validated L3 configuration for the specified device and + * weight vector. + */ +const struct gen_l3_config * +gen_get_l3_config(const struct gen_device_info *devinfo, + struct gen_l3_weights w0) +{ + const struct gen_l3_config *const cfgs = get_l3_configs(devinfo); + const struct gen_l3_config *cfg_best = NULL; + float dw_best = HUGE_VALF; + + for (const struct gen_l3_config *cfg = cfgs; cfg->n[GEN_L3P_URB]; cfg++) { + const float dw = gen_diff_l3_weights(w0, gen_get_l3_config_weights(cfg)); + + if (dw < dw_best) { + cfg_best = cfg; + dw_best = dw; + } + } + + return cfg_best; +} + +/** + * Return the size of an L3 way in KB. + */ +static unsigned +get_l3_way_size(const struct gen_device_info *devinfo) +{ + if (devinfo->is_baytrail) + return 2; + + else if (devinfo->gt == 1 || + devinfo->is_cherryview || + devinfo->is_broxton) + return 4; + + else + return 8 * devinfo->num_slices; +} + +/** + * Return the unit brw_context::urb::size is expressed in, in KB. \sa + * gen_device_info::urb::size. + */ +static unsigned +get_urb_size_scale(const struct gen_device_info *devinfo) +{ + return (devinfo->gen >= 8 ? devinfo->num_slices : 1); +} + +unsigned +gen_get_l3_config_urb_size(const struct gen_device_info *devinfo, + const struct gen_l3_config *cfg) +{ + /* From the SKL "L3 Allocation and Programming" documentation: + * + * "URB is limited to 1008KB due to programming restrictions. This is not + * a restriction of the L3 implementation, but of the FF and other clients. + * Therefore, in a GT4 implementation it is possible for the programmed + * allocation of the L3 data array to provide 3*384KB=1152KB for URB, but + * only 1008KB of this will be used." + */ + const unsigned max = (devinfo->gen == 9 ? 1008 : ~0); + return MIN2(max, cfg->n[GEN_L3P_URB] * get_l3_way_size(devinfo)) / + get_urb_size_scale(devinfo); +} + +/** + * Print out the specified L3 configuration. + */ +void +gen_dump_l3_config(const struct gen_l3_config *cfg, FILE *fp) +{ + fprintf(stderr, "SLM=%d URB=%d ALL=%d DC=%d RO=%d IS=%d C=%d T=%d\n", + cfg->n[GEN_L3P_SLM], cfg->n[GEN_L3P_URB], cfg->n[GEN_L3P_ALL], + cfg->n[GEN_L3P_DC], cfg->n[GEN_L3P_RO], + cfg->n[GEN_L3P_IS], cfg->n[GEN_L3P_C], cfg->n[GEN_L3P_T]); +} diff -Nru mesa-12.0.6/src/intel/common/gen_l3_config.h mesa-17.0.7/src/intel/common/gen_l3_config.h --- mesa-12.0.6/src/intel/common/gen_l3_config.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/common/gen_l3_config.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,101 @@ +/* + * Copyright (c) 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef GEN_L3_CONFIG_H +#define GEN_L3_CONFIG_H + +#include + +#include "gen_device_info.h" + +/** + * Chunk of L3 cache reserved for some specific purpose. + */ +enum gen_l3_partition { + /** Shared local memory. */ + GEN_L3P_SLM = 0, + /** Unified return buffer. */ + GEN_L3P_URB, + /** Union of DC and RO. */ + GEN_L3P_ALL, + /** Data cluster RW partition. */ + GEN_L3P_DC, + /** Union of IS, C and T. */ + GEN_L3P_RO, + /** Instruction and state cache. */ + GEN_L3P_IS, + /** Constant cache. */ + GEN_L3P_C, + /** Texture cache. */ + GEN_L3P_T, + /** Number of supported L3 partitions. */ + GEN_NUM_L3P +}; + +/** + * L3 configuration represented as the number of ways allocated for each + * partition. \sa get_l3_way_size(). + */ +struct gen_l3_config { + unsigned n[GEN_NUM_L3P]; +}; + +/** + * L3 configuration represented as a vector of weights giving the desired + * relative size of each partition. The scale is arbitrary, only the ratios + * between weights will have an influence on the selection of the closest L3 + * configuration. + */ +struct gen_l3_weights { + float w[GEN_NUM_L3P]; +}; + +float gen_diff_l3_weights(struct gen_l3_weights w0, struct gen_l3_weights w1); + +struct gen_l3_weights +gen_get_default_l3_weights(const struct gen_device_info *devinfo, + bool needs_dc, bool needs_slm); + +struct gen_l3_weights +gen_get_l3_config_weights(const struct gen_l3_config *cfg); + +const struct gen_l3_config * +gen_get_default_l3_config(const struct gen_device_info *devinfo); + +const struct gen_l3_config * +gen_get_l3_config(const struct gen_device_info *devinfo, + struct gen_l3_weights w0); + +unsigned +gen_get_l3_config_urb_size(const struct gen_device_info *devinfo, + const struct gen_l3_config *cfg); + +void gen_dump_l3_config(const struct gen_l3_config *cfg, FILE *fp); + +void gen_get_urb_config(const struct gen_device_info *devinfo, + unsigned push_constant_bytes, unsigned urb_size_bytes, + bool tess_present, bool gs_present, + const unsigned entry_size[4], + unsigned entries[4], unsigned start[4]); + +#endif /* GEN_L3_CONFIG_H */ diff -Nru mesa-12.0.6/src/intel/common/gen_sample_positions.h mesa-17.0.7/src/intel/common/gen_sample_positions.h --- mesa-12.0.6/src/intel/common/gen_sample_positions.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/common/gen_sample_positions.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,98 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ +#ifndef GEN_SAMPLE_POSITIONS_H +#define GEN_SAMPLE_POSITIONS_H + +#define GEN_SAMPLE_POS_1X(prefix) \ +prefix##0XOffset = 0.5; \ +prefix##0YOffset = 0.5; + +#define GEN_SAMPLE_POS_2X(prefix) \ +prefix##0XOffset = 0.25; \ +prefix##0YOffset = 0.25; \ +prefix##1XOffset = 0.75; \ +prefix##1YOffset = 0.75; + +#define GEN_SAMPLE_POS_4X(prefix) \ +prefix##0XOffset = 0.375; \ +prefix##0YOffset = 0.125; \ +prefix##1XOffset = 0.875; \ +prefix##1YOffset = 0.375; \ +prefix##2XOffset = 0.125; \ +prefix##2YOffset = 0.625; \ +prefix##3XOffset = 0.625; \ +prefix##3YOffset = 0.875; + +#define GEN_SAMPLE_POS_8X(prefix) \ +prefix##0XOffset = 0.5625; \ +prefix##0YOffset = 0.3125; \ +prefix##1XOffset = 0.4375; \ +prefix##1YOffset = 0.6875; \ +prefix##2XOffset = 0.8125; \ +prefix##2YOffset = 0.5625; \ +prefix##3XOffset = 0.3125; \ +prefix##3YOffset = 0.1875; \ +prefix##4XOffset = 0.1875; \ +prefix##4YOffset = 0.8125; \ +prefix##5XOffset = 0.0625; \ +prefix##5YOffset = 0.4375; \ +prefix##6XOffset = 0.6875; \ +prefix##6YOffset = 0.9375; \ +prefix##7XOffset = 0.9375; \ +prefix##7YOffset = 0.0625; + +#define GEN_SAMPLE_POS_16X(prefix) \ +prefix##0XOffset = 0.5625; \ +prefix##0YOffset = 0.5625; \ +prefix##1XOffset = 0.4375; \ +prefix##1YOffset = 0.3125; \ +prefix##2XOffset = 0.3125; \ +prefix##2YOffset = 0.6250; \ +prefix##3XOffset = 0.7500; \ +prefix##3YOffset = 0.4375; \ +prefix##4XOffset = 0.1875; \ +prefix##4YOffset = 0.3750; \ +prefix##5XOffset = 0.6250; \ +prefix##5YOffset = 0.8125; \ +prefix##6XOffset = 0.8125; \ +prefix##6YOffset = 0.6875; \ +prefix##7XOffset = 0.6875; \ +prefix##7YOffset = 0.1875; \ +prefix##8XOffset = 0.3750; \ +prefix##8YOffset = 0.8750; \ +prefix##9XOffset = 0.5000; \ +prefix##9YOffset = 0.0625; \ +prefix##10XOffset = 0.2500; \ +prefix##10YOffset = 0.1250; \ +prefix##11XOffset = 0.1250; \ +prefix##11YOffset = 0.7500; \ +prefix##12XOffset = 0.0000; \ +prefix##12YOffset = 0.5000; \ +prefix##13XOffset = 0.9375; \ +prefix##13YOffset = 0.2500; \ +prefix##14XOffset = 0.8750; \ +prefix##14YOffset = 0.9375; \ +prefix##15XOffset = 0.0625; \ +prefix##15YOffset = 0.0000; + +#endif /* GEN_SAMPLE_POSITIONS_H */ diff -Nru mesa-12.0.6/src/intel/common/gen_urb_config.c mesa-17.0.7/src/intel/common/gen_urb_config.c --- mesa-12.0.6/src/intel/common/gen_urb_config.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/common/gen_urb_config.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,201 @@ +/* + * Copyright (c) 2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include +#include + +#include "util/macros.h" +#include "main/macros.h" + +#include "gen_l3_config.h" + +/** + * The following diagram shows how we partition the URB: + * + * 16kb or 32kb Rest of the URB space + * __________-__________ _________________-_________________ + * / \ / \ + * +-------------------------------------------------------------+ + * | VS/HS/DS/GS/FS Push | VS/HS/DS/GS URB | + * | Constants | Entries | + * +-------------------------------------------------------------+ + * + * Push constants must be stored at the beginning of the URB space, + * while URB entries can be stored anywhere. We choose to lay them + * out in pipeline order (VS -> HS -> DS -> GS). + */ + +/** + * Decide how to partition the URB among the various stages. + * + * \param[in] push_constant_bytes - space allocate for push constants. + * \param[in] urb_size_bytes - total size of the URB (from L3 config). + * \param[in] tess_present - are tessellation shaders active? + * \param[in] gs_present - are geometry shaders active? + * \param[in] entry_size - the URB entry size (from the shader compiler) + * \param[out] entries - the number of URB entries for each stage + * \param[out] start - the starting offset for each stage + */ +void +gen_get_urb_config(const struct gen_device_info *devinfo, + unsigned push_constant_bytes, unsigned urb_size_bytes, + bool tess_present, bool gs_present, + const unsigned entry_size[4], + unsigned entries[4], unsigned start[4]) +{ + const bool active[4] = { true, tess_present, tess_present, gs_present }; + + /* URB allocations must be done in 8k chunks. */ + const unsigned chunk_size_bytes = 8192; + + const unsigned push_constant_chunks = + push_constant_bytes / chunk_size_bytes; + const unsigned urb_chunks = urb_size_bytes / chunk_size_bytes; + + /* From p35 of the Ivy Bridge PRM (section 1.7.1: 3DSTATE_URB_GS): + * + * VS Number of URB Entries must be divisible by 8 if the VS URB Entry + * Allocation Size is less than 9 512-bit URB entries. + * + * Similar text exists for HS, DS and GS. + */ + unsigned granularity[4]; + for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) { + granularity[i] = (entry_size[i] < 9) ? 8 : 1; + } + + unsigned min_entries[4] = { + /* VS has a lower limit on the number of URB entries. + * + * From the Broadwell PRM, 3DSTATE_URB_VS instruction: + * "When tessellation is enabled, the VS Number of URB Entries must be + * greater than or equal to 192." + */ + [MESA_SHADER_VERTEX] = tess_present && devinfo->gen == 8 ? + 192 : devinfo->urb.min_entries[MESA_SHADER_VERTEX], + + /* There are two constraints on the minimum amount of URB space we can + * allocate: + * + * (1) We need room for at least 2 URB entries, since we always operate + * the GS in DUAL_OBJECT mode. + * + * (2) We can't allocate less than nr_gs_entries_granularity. + */ + [MESA_SHADER_GEOMETRY] = gs_present ? 2 : 0, + + [MESA_SHADER_TESS_CTRL] = tess_present ? 1 : 0, + + [MESA_SHADER_TESS_EVAL] = tess_present ? + devinfo->urb.min_entries[MESA_SHADER_TESS_EVAL] : 0, + }; + + /* Min VS Entries isn't a multiple of 8 on Cherryview/Broxton; round up. + * Round them all up. + */ + for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) { + min_entries[i] = ALIGN(min_entries[i], granularity[i]); + } + + unsigned entry_size_bytes[4]; + for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) { + entry_size_bytes[i] = 64 * entry_size[i]; + } + + /* Initially, assign each stage the minimum amount of URB space it needs, + * and make a note of how much additional space it "wants" (the amount of + * additional space it could actually make use of). + */ + unsigned chunks[4]; + unsigned wants[4]; + unsigned total_needs = push_constant_chunks; + unsigned total_wants = 0; + + for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) { + if (active[i]) { + chunks[i] = DIV_ROUND_UP(min_entries[i] * entry_size_bytes[i], + chunk_size_bytes); + + wants[i] = + DIV_ROUND_UP(devinfo->urb.max_entries[i] * entry_size_bytes[i], + chunk_size_bytes) - chunks[i]; + } else { + chunks[i] = 0; + wants[i] = 0; + } + + total_needs += chunks[i]; + total_wants += wants[i]; + } + + assert(total_needs <= urb_chunks); + + /* Mete out remaining space (if any) in proportion to "wants". */ + unsigned remaining_space = MIN2(urb_chunks - total_needs, total_wants); + + if (remaining_space > 0) { + for (int i = MESA_SHADER_VERTEX; + total_wants > 0 && i <= MESA_SHADER_TESS_EVAL; i++) { + unsigned additional = (unsigned) + roundf(wants[i] * (((float) remaining_space) / total_wants)); + chunks[i] += additional; + remaining_space -= additional; + total_wants -= wants[i]; + } + + chunks[MESA_SHADER_GEOMETRY] += remaining_space; + } + + /* Sanity check that we haven't over-allocated. */ + unsigned total_chunks = push_constant_chunks; + for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) { + total_chunks += chunks[i]; + } + assert(total_chunks <= urb_chunks); + + /* Finally, compute the number of entries that can fit in the space + * allocated to each stage. + */ + for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) { + entries[i] = chunks[i] * chunk_size_bytes / entry_size_bytes[i]; + + /* Since we rounded up when computing wants[], this may be slightly + * more than the maximum allowed amount, so correct for that. + */ + entries[i] = MIN2(entries[i], devinfo->urb.max_entries[i]); + + /* Ensure that we program a multiple of the granularity. */ + entries[i] = ROUND_DOWN_TO(entries[i], granularity[i]); + + /* Finally, sanity check to make sure we have at least the minimum + * number of entries needed for each stage. + */ + assert(entries[i] >= min_entries[i]); + } + + /* Lay out the URB in pipeline order: push constants, VS, HS, DS, GS. */ + start[0] = push_constant_chunks; + for (int i = MESA_SHADER_TESS_CTRL; i <= MESA_SHADER_GEOMETRY; i++) { + start[i] = start[i - 1] + chunks[i - 1]; + } +} diff -Nru mesa-12.0.6/src/intel/genxml/gen45_pack.h mesa-17.0.7/src/intel/genxml/gen45_pack.h --- mesa-12.0.6/src/intel/genxml/gen45_pack.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/genxml/gen45_pack.h 2017-06-01 10:38:02.000000000 +0000 @@ -0,0 +1,252 @@ +/* + * Copyright (C) 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + + +/* Instructions, enums and structures for G45. + * + * This file has been generated, do not hand edit. + */ + +#ifndef GEN45_PACK_H +#define GEN45_PACK_H + +#include +#include +#include +#include +#include + +#ifndef __gen_validate_value +#define __gen_validate_value(x) +#endif + +#ifndef __gen_field_functions +#define __gen_field_functions + +union __gen_value { + float f; + uint32_t dw; +}; + +static inline uint64_t +__gen_mbo(uint32_t start, uint32_t end) +{ + return (~0ull >> (64 - (end - start + 1))) << start; +} + +static inline uint64_t +__gen_uint(uint64_t v, uint32_t start, uint32_t end) +{ + __gen_validate_value(v); + +#if DEBUG + const int width = end - start + 1; + if (width < 64) { + const uint64_t max = (1ull << width) - 1; + assert(v <= max); + } +#endif + + return v << start; +} + +static inline uint64_t +__gen_sint(int64_t v, uint32_t start, uint32_t end) +{ + const int width = end - start + 1; + + __gen_validate_value(v); + +#if DEBUG + if (width < 64) { + const int64_t max = (1ll << (width - 1)) - 1; + const int64_t min = -(1ll << (width - 1)); + assert(min <= v && v <= max); + } +#endif + + const uint64_t mask = ~0ull >> (64 - width); + + return (v & mask) << start; +} + +static inline uint64_t +__gen_offset(uint64_t v, uint32_t start, uint32_t end) +{ + __gen_validate_value(v); +#if DEBUG + uint64_t mask = (~0ull >> (64 - (end - start + 1))) << start; + + assert((v & ~mask) == 0); +#endif + + return v; +} + +static inline uint32_t +__gen_float(float v) +{ + __gen_validate_value(v); + return ((union __gen_value) { .f = (v) }).dw; +} + +static inline uint64_t +__gen_sfixed(float v, uint32_t start, uint32_t end, uint32_t fract_bits) +{ + __gen_validate_value(v); + + const float factor = (1 << fract_bits); + +#if DEBUG + const float max = ((1 << (end - start)) - 1) / factor; + const float min = -(1 << (end - start)) / factor; + assert(min <= v && v <= max); +#endif + + const int64_t int_val = llroundf(v * factor); + const uint64_t mask = ~0ull >> (64 - (end - start + 1)); + + return (int_val & mask) << start; +} + +static inline uint64_t +__gen_ufixed(float v, uint32_t start, uint32_t end, uint32_t fract_bits) +{ + __gen_validate_value(v); + + const float factor = (1 << fract_bits); + +#if DEBUG + const float max = ((1 << (end - start + 1)) - 1) / factor; + const float min = 0.0f; + assert(min <= v && v <= max); +#endif + + const uint64_t uint_val = llroundf(v * factor); + + return uint_val << start; +} + +#ifndef __gen_address_type +#error #define __gen_address_type before including this file +#endif + +#ifndef __gen_user_data +#error #define __gen_combine_address before including this file +#endif + +#endif + + +#define GEN45_RENDER_SURFACE_STATE_length 6 +struct GEN45_RENDER_SURFACE_STATE { + uint32_t SurfaceType; +#define SURFTYPE_1D 0 +#define SURFTYPE_2D 1 +#define SURFTYPE_3D 2 +#define SURFTYPE_CUBE 3 +#define SURFTYPE_BUFFER 4 +#define SURFTYPE_NULL 7 + uint32_t DataReturnFormat; +#define DATA_RETURN_FLOAT32 0 +#define DATA_RETURN_S114 1 + uint32_t SurfaceFormat; + uint32_t ColorBufferComponentWriteDisables; +#define WRITEDISABLE_ALPHA 8 +#define WRITEDISABLE_RED 4 +#define WRITEDISABLE_GREEN 2 +#define WRITEDISABLE_BLUE 1 + bool ColorBlendEnable; + uint32_t VerticalLineStride; + uint32_t VerticalLineStrideOffset; + uint32_t MIPMapLayoutMode; +#define MIPLAYOUT_BELOW 0 +#define MIPLAYOUT_RIGHT 1 + uint32_t RenderCacheReadWriteMode; +#define WRITE_ONLY 0 +#define READ_WRITE 1 + uint32_t MediaBoundaryPixelMode; +#define NORMAL_MODE 0 +#define PROGRESSIVE_FRAME 2 +#define INTERLACED_FRAME 3 + uint32_t CubeFaceEnables; + __gen_address_type SurfaceBaseAddress; + uint32_t Height; + uint32_t Width; + uint32_t MIPCountLOD; + uint32_t Depth; + uint32_t SurfacePitch; + uint32_t TiledSurface; + uint32_t TileWalk; +#define TILEWALK_XMAJOR 0 +#define TILEWALK_YMAJOR 1 + uint32_t SurfaceMinLOD; + uint32_t MinimumArrayElement; + uint32_t RenderTargetViewExtent; + uint32_t XOffset; + uint32_t YOffset; +}; + +static inline void +GEN45_RENDER_SURFACE_STATE_pack(__gen_user_data *data, void * restrict dst, + const struct GEN45_RENDER_SURFACE_STATE * restrict values) +{ + uint32_t * restrict dw = (uint32_t * restrict) dst; + + dw[0] = + __gen_uint(values->SurfaceType, 29, 31) | + __gen_uint(values->DataReturnFormat, 27, 27) | + __gen_uint(values->SurfaceFormat, 18, 26) | + __gen_uint(values->ColorBufferComponentWriteDisables, 14, 17) | + __gen_uint(values->ColorBlendEnable, 13, 13) | + __gen_uint(values->VerticalLineStride, 12, 12) | + __gen_uint(values->VerticalLineStrideOffset, 11, 11) | + __gen_uint(values->MIPMapLayoutMode, 10, 10) | + __gen_uint(values->RenderCacheReadWriteMode, 8, 8) | + __gen_uint(values->MediaBoundaryPixelMode, 6, 7) | + __gen_uint(values->CubeFaceEnables, 0, 5); + + dw[1] = __gen_combine_address(data, &dw[1], values->SurfaceBaseAddress, 0); + + dw[2] = + __gen_uint(values->Height, 19, 31) | + __gen_uint(values->Width, 6, 18) | + __gen_uint(values->MIPCountLOD, 2, 5); + + dw[3] = + __gen_uint(values->Depth, 21, 31) | + __gen_uint(values->SurfacePitch, 3, 19) | + __gen_uint(values->TiledSurface, 1, 1) | + __gen_uint(values->TileWalk, 0, 0); + + dw[4] = + __gen_uint(values->SurfaceMinLOD, 28, 31) | + __gen_uint(values->MinimumArrayElement, 17, 27) | + __gen_uint(values->RenderTargetViewExtent, 8, 16); + + dw[5] = + __gen_uint(values->XOffset, 25, 31) | + __gen_uint(values->YOffset, 20, 23); +} + +#endif /* GEN45_PACK_H */ diff -Nru mesa-12.0.6/src/intel/genxml/gen45.xml mesa-17.0.7/src/intel/genxml/gen45.xml --- mesa-12.0.6/src/intel/genxml/gen45.xml 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/genxml/gen45.xml 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,56 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff -Nru mesa-12.0.6/src/intel/genxml/gen4_pack.h mesa-17.0.7/src/intel/genxml/gen4_pack.h --- mesa-12.0.6/src/intel/genxml/gen4_pack.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/genxml/gen4_pack.h 2017-06-01 10:38:02.000000000 +0000 @@ -0,0 +1,246 @@ +/* + * Copyright (C) 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + + +/* Instructions, enums and structures for BRW. + * + * This file has been generated, do not hand edit. + */ + +#ifndef GEN4_PACK_H +#define GEN4_PACK_H + +#include +#include +#include +#include +#include + +#ifndef __gen_validate_value +#define __gen_validate_value(x) +#endif + +#ifndef __gen_field_functions +#define __gen_field_functions + +union __gen_value { + float f; + uint32_t dw; +}; + +static inline uint64_t +__gen_mbo(uint32_t start, uint32_t end) +{ + return (~0ull >> (64 - (end - start + 1))) << start; +} + +static inline uint64_t +__gen_uint(uint64_t v, uint32_t start, uint32_t end) +{ + __gen_validate_value(v); + +#if DEBUG + const int width = end - start + 1; + if (width < 64) { + const uint64_t max = (1ull << width) - 1; + assert(v <= max); + } +#endif + + return v << start; +} + +static inline uint64_t +__gen_sint(int64_t v, uint32_t start, uint32_t end) +{ + const int width = end - start + 1; + + __gen_validate_value(v); + +#if DEBUG + if (width < 64) { + const int64_t max = (1ll << (width - 1)) - 1; + const int64_t min = -(1ll << (width - 1)); + assert(min <= v && v <= max); + } +#endif + + const uint64_t mask = ~0ull >> (64 - width); + + return (v & mask) << start; +} + +static inline uint64_t +__gen_offset(uint64_t v, uint32_t start, uint32_t end) +{ + __gen_validate_value(v); +#if DEBUG + uint64_t mask = (~0ull >> (64 - (end - start + 1))) << start; + + assert((v & ~mask) == 0); +#endif + + return v; +} + +static inline uint32_t +__gen_float(float v) +{ + __gen_validate_value(v); + return ((union __gen_value) { .f = (v) }).dw; +} + +static inline uint64_t +__gen_sfixed(float v, uint32_t start, uint32_t end, uint32_t fract_bits) +{ + __gen_validate_value(v); + + const float factor = (1 << fract_bits); + +#if DEBUG + const float max = ((1 << (end - start)) - 1) / factor; + const float min = -(1 << (end - start)) / factor; + assert(min <= v && v <= max); +#endif + + const int64_t int_val = llroundf(v * factor); + const uint64_t mask = ~0ull >> (64 - (end - start + 1)); + + return (int_val & mask) << start; +} + +static inline uint64_t +__gen_ufixed(float v, uint32_t start, uint32_t end, uint32_t fract_bits) +{ + __gen_validate_value(v); + + const float factor = (1 << fract_bits); + +#if DEBUG + const float max = ((1 << (end - start + 1)) - 1) / factor; + const float min = 0.0f; + assert(min <= v && v <= max); +#endif + + const uint64_t uint_val = llroundf(v * factor); + + return uint_val << start; +} + +#ifndef __gen_address_type +#error #define __gen_address_type before including this file +#endif + +#ifndef __gen_user_data +#error #define __gen_combine_address before including this file +#endif + +#endif + + +#define GEN4_RENDER_SURFACE_STATE_length 6 +struct GEN4_RENDER_SURFACE_STATE { + uint32_t SurfaceType; +#define SURFTYPE_1D 0 +#define SURFTYPE_2D 1 +#define SURFTYPE_3D 2 +#define SURFTYPE_CUBE 3 +#define SURFTYPE_BUFFER 4 +#define SURFTYPE_NULL 7 + uint32_t DataReturnFormat; +#define DATA_RETURN_FLOAT32 0 +#define DATA_RETURN_S114 1 + uint32_t SurfaceFormat; + uint32_t ColorBufferComponentWriteDisables; +#define WRITEDISABLE_ALPHA 8 +#define WRITEDISABLE_RED 4 +#define WRITEDISABLE_GREEN 2 +#define WRITEDISABLE_BLUE 1 + bool ColorBlendEnable; + uint32_t VerticalLineStride; + uint32_t VerticalLineStrideOffset; + uint32_t MIPMapLayoutMode; +#define MIPLAYOUT_BELOW 0 +#define MIPLAYOUT_RIGHT 1 + uint32_t RenderCacheReadWriteMode; +#define WRITE_ONLY 0 +#define READ_WRITE 1 + uint32_t MediaBoundaryPixelMode; +#define NORMAL_MODE 0 + uint32_t CubeFaceEnables; + __gen_address_type SurfaceBaseAddress; + uint32_t Height; + uint32_t Width; + uint32_t MIPCountLOD; + uint32_t Depth; + uint32_t SurfacePitch; + uint32_t TiledSurface; + uint32_t TileWalk; +#define TILEWALK_XMAJOR 0 +#define TILEWALK_YMAJOR 1 + uint32_t SurfaceMinLOD; + uint32_t MinimumArrayElement; + uint32_t RenderTargetViewExtent; +}; + +static inline void +GEN4_RENDER_SURFACE_STATE_pack(__gen_user_data *data, void * restrict dst, + const struct GEN4_RENDER_SURFACE_STATE * restrict values) +{ + uint32_t * restrict dw = (uint32_t * restrict) dst; + + dw[0] = + __gen_uint(values->SurfaceType, 29, 31) | + __gen_uint(values->DataReturnFormat, 27, 27) | + __gen_uint(values->SurfaceFormat, 18, 26) | + __gen_uint(values->ColorBufferComponentWriteDisables, 14, 17) | + __gen_uint(values->ColorBlendEnable, 13, 13) | + __gen_uint(values->VerticalLineStride, 12, 12) | + __gen_uint(values->VerticalLineStrideOffset, 11, 11) | + __gen_uint(values->MIPMapLayoutMode, 10, 10) | + __gen_uint(values->RenderCacheReadWriteMode, 8, 8) | + __gen_uint(values->MediaBoundaryPixelMode, 6, 7) | + __gen_uint(values->CubeFaceEnables, 0, 5); + + dw[1] = __gen_combine_address(data, &dw[1], values->SurfaceBaseAddress, 0); + + dw[2] = + __gen_uint(values->Height, 19, 31) | + __gen_uint(values->Width, 6, 18) | + __gen_uint(values->MIPCountLOD, 2, 5); + + dw[3] = + __gen_uint(values->Depth, 21, 31) | + __gen_uint(values->SurfacePitch, 3, 19) | + __gen_uint(values->TiledSurface, 1, 1) | + __gen_uint(values->TileWalk, 0, 0); + + dw[4] = + __gen_uint(values->SurfaceMinLOD, 28, 31) | + __gen_uint(values->MinimumArrayElement, 17, 27) | + __gen_uint(values->RenderTargetViewExtent, 8, 16); + + dw[5] = 0; +} + +#endif /* GEN4_PACK_H */ diff -Nru mesa-12.0.6/src/intel/genxml/gen4.xml mesa-17.0.7/src/intel/genxml/gen4.xml --- mesa-12.0.6/src/intel/genxml/gen4.xml 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/genxml/gen4.xml 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,52 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff -Nru mesa-12.0.6/src/intel/genxml/gen5_pack.h mesa-17.0.7/src/intel/genxml/gen5_pack.h --- mesa-12.0.6/src/intel/genxml/gen5_pack.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/genxml/gen5_pack.h 2017-06-01 10:38:02.000000000 +0000 @@ -0,0 +1,252 @@ +/* + * Copyright (C) 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + + +/* Instructions, enums and structures for ILK. + * + * This file has been generated, do not hand edit. + */ + +#ifndef GEN5_PACK_H +#define GEN5_PACK_H + +#include +#include +#include +#include +#include + +#ifndef __gen_validate_value +#define __gen_validate_value(x) +#endif + +#ifndef __gen_field_functions +#define __gen_field_functions + +union __gen_value { + float f; + uint32_t dw; +}; + +static inline uint64_t +__gen_mbo(uint32_t start, uint32_t end) +{ + return (~0ull >> (64 - (end - start + 1))) << start; +} + +static inline uint64_t +__gen_uint(uint64_t v, uint32_t start, uint32_t end) +{ + __gen_validate_value(v); + +#if DEBUG + const int width = end - start + 1; + if (width < 64) { + const uint64_t max = (1ull << width) - 1; + assert(v <= max); + } +#endif + + return v << start; +} + +static inline uint64_t +__gen_sint(int64_t v, uint32_t start, uint32_t end) +{ + const int width = end - start + 1; + + __gen_validate_value(v); + +#if DEBUG + if (width < 64) { + const int64_t max = (1ll << (width - 1)) - 1; + const int64_t min = -(1ll << (width - 1)); + assert(min <= v && v <= max); + } +#endif + + const uint64_t mask = ~0ull >> (64 - width); + + return (v & mask) << start; +} + +static inline uint64_t +__gen_offset(uint64_t v, uint32_t start, uint32_t end) +{ + __gen_validate_value(v); +#if DEBUG + uint64_t mask = (~0ull >> (64 - (end - start + 1))) << start; + + assert((v & ~mask) == 0); +#endif + + return v; +} + +static inline uint32_t +__gen_float(float v) +{ + __gen_validate_value(v); + return ((union __gen_value) { .f = (v) }).dw; +} + +static inline uint64_t +__gen_sfixed(float v, uint32_t start, uint32_t end, uint32_t fract_bits) +{ + __gen_validate_value(v); + + const float factor = (1 << fract_bits); + +#if DEBUG + const float max = ((1 << (end - start)) - 1) / factor; + const float min = -(1 << (end - start)) / factor; + assert(min <= v && v <= max); +#endif + + const int64_t int_val = llroundf(v * factor); + const uint64_t mask = ~0ull >> (64 - (end - start + 1)); + + return (int_val & mask) << start; +} + +static inline uint64_t +__gen_ufixed(float v, uint32_t start, uint32_t end, uint32_t fract_bits) +{ + __gen_validate_value(v); + + const float factor = (1 << fract_bits); + +#if DEBUG + const float max = ((1 << (end - start + 1)) - 1) / factor; + const float min = 0.0f; + assert(min <= v && v <= max); +#endif + + const uint64_t uint_val = llroundf(v * factor); + + return uint_val << start; +} + +#ifndef __gen_address_type +#error #define __gen_address_type before including this file +#endif + +#ifndef __gen_user_data +#error #define __gen_combine_address before including this file +#endif + +#endif + + +#define GEN5_RENDER_SURFACE_STATE_length 6 +struct GEN5_RENDER_SURFACE_STATE { + uint32_t SurfaceType; +#define SURFTYPE_1D 0 +#define SURFTYPE_2D 1 +#define SURFTYPE_3D 2 +#define SURFTYPE_CUBE 3 +#define SURFTYPE_BUFFER 4 +#define SURFTYPE_NULL 7 + uint32_t DataReturnFormat; +#define DATA_RETURN_FLOAT32 0 +#define DATA_RETURN_S114 1 + uint32_t SurfaceFormat; + uint32_t ColorBufferComponentWriteDisables; +#define WRITEDISABLE_ALPHA 8 +#define WRITEDISABLE_RED 4 +#define WRITEDISABLE_GREEN 2 +#define WRITEDISABLE_BLUE 1 + bool ColorBlendEnable; + uint32_t VerticalLineStride; + uint32_t VerticalLineStrideOffset; + uint32_t MIPMapLayoutMode; +#define MIPLAYOUT_BELOW 0 +#define MIPLAYOUT_RIGHT 1 + uint32_t RenderCacheReadWriteMode; +#define WRITE_ONLY 0 +#define READ_WRITE 1 + uint32_t MediaBoundaryPixelMode; +#define NORMAL_MODE 0 +#define PROGRESSIVE_FRAME 2 +#define INTERLACED_FRAME 3 + uint32_t CubeFaceEnables; + __gen_address_type SurfaceBaseAddress; + uint32_t Height; + uint32_t Width; + uint32_t MIPCountLOD; + uint32_t Depth; + uint32_t SurfacePitch; + uint32_t TiledSurface; + uint32_t TileWalk; +#define TILEWALK_XMAJOR 0 +#define TILEWALK_YMAJOR 1 + uint32_t SurfaceMinLOD; + uint32_t MinimumArrayElement; + uint32_t RenderTargetViewExtent; + uint32_t XOffset; + uint32_t YOffset; +}; + +static inline void +GEN5_RENDER_SURFACE_STATE_pack(__gen_user_data *data, void * restrict dst, + const struct GEN5_RENDER_SURFACE_STATE * restrict values) +{ + uint32_t * restrict dw = (uint32_t * restrict) dst; + + dw[0] = + __gen_uint(values->SurfaceType, 29, 31) | + __gen_uint(values->DataReturnFormat, 27, 27) | + __gen_uint(values->SurfaceFormat, 18, 26) | + __gen_uint(values->ColorBufferComponentWriteDisables, 14, 17) | + __gen_uint(values->ColorBlendEnable, 13, 13) | + __gen_uint(values->VerticalLineStride, 12, 12) | + __gen_uint(values->VerticalLineStrideOffset, 11, 11) | + __gen_uint(values->MIPMapLayoutMode, 10, 10) | + __gen_uint(values->RenderCacheReadWriteMode, 8, 8) | + __gen_uint(values->MediaBoundaryPixelMode, 6, 7) | + __gen_uint(values->CubeFaceEnables, 0, 5); + + dw[1] = __gen_combine_address(data, &dw[1], values->SurfaceBaseAddress, 0); + + dw[2] = + __gen_uint(values->Height, 19, 31) | + __gen_uint(values->Width, 6, 18) | + __gen_uint(values->MIPCountLOD, 2, 5); + + dw[3] = + __gen_uint(values->Depth, 21, 31) | + __gen_uint(values->SurfacePitch, 3, 19) | + __gen_uint(values->TiledSurface, 1, 1) | + __gen_uint(values->TileWalk, 0, 0); + + dw[4] = + __gen_uint(values->SurfaceMinLOD, 28, 31) | + __gen_uint(values->MinimumArrayElement, 17, 27) | + __gen_uint(values->RenderTargetViewExtent, 8, 16); + + dw[5] = + __gen_uint(values->XOffset, 25, 31) | + __gen_uint(values->YOffset, 20, 23); +} + +#endif /* GEN5_PACK_H */ diff -Nru mesa-12.0.6/src/intel/genxml/gen5.xml mesa-17.0.7/src/intel/genxml/gen5.xml --- mesa-12.0.6/src/intel/genxml/gen5.xml 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/genxml/gen5.xml 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,56 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff -Nru mesa-12.0.6/src/intel/genxml/gen6_pack.h mesa-17.0.7/src/intel/genxml/gen6_pack.h --- mesa-12.0.6/src/intel/genxml/gen6_pack.h 2017-01-24 01:43:18.000000000 +0000 +++ mesa-17.0.7/src/intel/genxml/gen6_pack.h 2017-06-01 10:38:02.000000000 +0000 @@ -27,7 +27,8 @@ * This file has been generated, do not hand edit. */ -#pragma once +#ifndef GEN6_PACK_H +#define GEN6_PACK_H #include #include @@ -157,6 +158,345 @@ #endif +enum GEN6_3D_Prim_Topo_Type { + _3DPRIM_POINTLIST = 1, + _3DPRIM_LINELIST = 2, + _3DPRIM_LINESTRIP = 3, + _3DPRIM_TRILIST = 4, + _3DPRIM_TRISTRIP = 5, + _3DPRIM_TRIFAN = 6, + _3DPRIM_QUADLIST = 7, + _3DPRIM_QUADSTRIP = 8, + _3DPRIM_LINELIST_ADJ = 9, + _3DPRIM_LINESTRIP_ADJ = 10, + _3DPRIM_TRILIST_ADJ = 11, + _3DPRIM_TRISTRIP_ADJ = 12, + _3DPRIM_TRISTRIP_REVERSE = 13, + _3DPRIM_POLYGON = 14, + _3DPRIM_RECTLIST = 15, + _3DPRIM_LINELOOP = 16, + _3DPRIM_POINTLIST_BF = 17, + _3DPRIM_LINESTRIP_CONT = 18, + _3DPRIM_LINESTRIP_BF = 19, + _3DPRIM_LINESTRIP_CONT_BF = 20, + _3DPRIM_TRIFAN_NOSTIPPLE = 22, +}; + +enum GEN6_3D_Vertex_Component_Control { + VFCOMP_NOSTORE = 0, + VFCOMP_STORE_SRC = 1, + VFCOMP_STORE_0 = 2, + VFCOMP_STORE_1_FP = 3, + VFCOMP_STORE_1_INT = 4, + VFCOMP_STORE_VID = 5, + VFCOMP_STORE_IID = 6, + VFCOMP_STORE_PID = 7, +}; + +enum GEN6_3D_Color_Buffer_Blend_Function { + BLENDFUNCTION_ADD = 0, + BLENDFUNCTION_SUBTRACT = 1, + BLENDFUNCTION_REVERSE_SUBTRACT = 2, + BLENDFUNCTION_MIN = 3, + BLENDFUNCTION_MAX = 4, +}; + +enum GEN6_3D_Color_Buffer_Blend_Factor { + BLENDFACTOR_ONE = 1, + BLENDFACTOR_SRC_COLOR = 2, + BLENDFACTOR_SRC_ALPHA = 3, + BLENDFACTOR_DST_ALPHA = 4, + BLENDFACTOR_DST_COLOR = 5, + BLENDFACTOR_SRC_ALPHA_SATURATE = 6, + BLENDFACTOR_CONST_COLOR = 7, + BLENDFACTOR_CONST_ALPHA = 8, + BLENDFACTOR_SRC1_COLOR = 9, + BLENDFACTOR_SRC1_ALPHA = 10, + BLENDFACTOR_ZERO = 17, + BLENDFACTOR_INV_SRC_COLOR = 18, + BLENDFACTOR_INV_SRC_ALPHA = 19, + BLENDFACTOR_INV_DST_ALPHA = 20, + BLENDFACTOR_INV_DST_COLOR = 21, + BLENDFACTOR_INV_CONST_COLOR = 23, + BLENDFACTOR_INV_CONST_ALPHA = 24, + BLENDFACTOR_INV_SRC1_COLOR = 25, + BLENDFACTOR_INV_SRC1_ALPHA = 26, +}; + +enum GEN6_3D_Compare_Function { + COMPAREFUNCTION_ALWAYS = 0, + COMPAREFUNCTION_NEVER = 1, + COMPAREFUNCTION_LESS = 2, + COMPAREFUNCTION_EQUAL = 3, + COMPAREFUNCTION_LEQUAL = 4, + COMPAREFUNCTION_GREATER = 5, + COMPAREFUNCTION_NOTEQUAL = 6, + COMPAREFUNCTION_GEQUAL = 7, +}; + +enum GEN6_3D_Stencil_Operation { + STENCILOP_KEEP = 0, + STENCILOP_ZERO = 1, + STENCILOP_REPLACE = 2, + STENCILOP_INCRSAT = 3, + STENCILOP_DECRSAT = 4, + STENCILOP_INCR = 5, + STENCILOP_DECR = 6, + STENCILOP_INVERT = 7, +}; + +enum GEN6_3D_Logic_Op_Function { + LOGICOP_CLEAR = 0, + LOGICOP_NOR = 1, + LOGICOP_AND_INVERTED = 2, + LOGICOP_COPY_INVERTED = 3, + LOGICOP_AND_REVERSE = 4, + LOGICOP_INVERT = 5, + LOGICOP_XOR = 6, + LOGICOP_NAND = 7, + LOGICOP_AND = 8, + LOGICOP_EQUIV = 9, + LOGICOP_NOOP = 10, + LOGICOP_OR_INVERTED = 11, + LOGICOP_COPY = 12, + LOGICOP_OR_REVERSE = 13, + LOGICOP_OR = 14, + LOGICOP_SET = 15, +}; + +enum GEN6_SURFACE_FORMAT { + SF_R32G32B32A32_FLOAT = 0, + SF_R32G32B32A32_SINT = 1, + SF_R32G32B32A32_UINT = 2, + SF_R32G32B32A32_UNORM = 3, + SF_R32G32B32A32_SNORM = 4, + SF_R64G64_FLOAT = 5, + SF_R32G32B32X32_FLOAT = 6, + SF_R32G32B32A32_SSCALED = 7, + SF_R32G32B32A32_USCALED = 8, + SF_R32G32B32A32_SFIXED = 32, + SF_R64G64_PASSTHRU = 33, + SF_R32G32B32_FLOAT = 64, + SF_R32G32B32_SINT = 65, + SF_R32G32B32_UINT = 66, + SF_R32G32B32_UNORM = 67, + SF_R32G32B32_SNORM = 68, + SF_R32G32B32_SSCALED = 69, + SF_R32G32B32_USCALED = 70, + SF_R32G32B32_SFIXED = 80, + SF_R16G16B16A16_UNORM = 128, + SF_R16G16B16A16_SNORM = 129, + SF_R16G16B16A16_SINT = 130, + SF_R16G16B16A16_UINT = 131, + SF_R16G16B16A16_FLOAT = 132, + SF_R32G32_FLOAT = 133, + SF_R32G32_SINT = 134, + SF_R32G32_UINT = 135, + SF_R32_FLOAT_X8X24_TYPELESS = 136, + SF_X32_TYPELESS_G8X24_UINT = 137, + SF_L32A32_FLOAT = 138, + SF_R32G32_UNORM = 139, + SF_R32G32_SNORM = 140, + SF_R64_FLOAT = 141, + SF_R16G16B16X16_UNORM = 142, + SF_R16G16B16X16_FLOAT = 143, + SF_A32X32_FLOAT = 144, + SF_L32X32_FLOAT = 145, + SF_I32X32_FLOAT = 146, + SF_R16G16B16A16_SSCALED = 147, + SF_R16G16B16A16_USCALED = 148, + SF_R32G32_SSCALED = 149, + SF_R32G32_USCALED = 150, + SF_R32G32_SFIXED = 160, + SF_R64_PASSTHRU = 161, + SF_B8G8R8A8_UNORM = 192, + SF_B8G8R8A8_UNORM_SRGB = 193, + SF_R10G10B10A2_UNORM = 194, + SF_R10G10B10A2_UNORM_SRGB = 195, + SF_R10G10B10A2_UINT = 196, + SF_R10G10B10_SNORM_A2_UNORM = 197, + SF_R8G8B8A8_UNORM = 199, + SF_R8G8B8A8_UNORM_SRGB = 200, + SF_R8G8B8A8_SNORM = 201, + SF_R8G8B8A8_SINT = 202, + SF_R8G8B8A8_UINT = 203, + SF_R16G16_UNORM = 204, + SF_R16G16_SNORM = 205, + SF_R16G16_SINT = 206, + SF_R16G16_UINT = 207, + SF_R16G16_FLOAT = 208, + SF_B10G10R10A2_UNORM = 209, + SF_B10G10R10A2_UNORM_SRGB = 210, + SF_R11G11B10_FLOAT = 211, + SF_R32_SINT = 214, + SF_R32_UINT = 215, + SF_R32_FLOAT = 216, + SF_R24_UNORM_X8_TYPELESS = 217, + SF_X24_TYPELESS_G8_UINT = 218, + SF_L32_UNORM = 221, + SF_A32_UNORM = 222, + SF_L16A16_UNORM = 223, + SF_I24X8_UNORM = 224, + SF_L24X8_UNORM = 225, + SF_A24X8_UNORM = 226, + SF_I32_FLOAT = 227, + SF_L32_FLOAT = 228, + SF_A32_FLOAT = 229, + SF_X8B8_UNORM_G8R8_SNORM = 230, + SF_A8X8_UNORM_G8R8_SNORM = 231, + SF_B8X8_UNORM_G8R8_SNORM = 232, + SF_B8G8R8X8_UNORM = 233, + SF_B8G8R8X8_UNORM_SRGB = 234, + SF_R8G8B8X8_UNORM = 235, + SF_R8G8B8X8_UNORM_SRGB = 236, + SF_R9G9B9E5_SHAREDEXP = 237, + SF_B10G10R10X2_UNORM = 238, + SF_L16A16_FLOAT = 240, + SF_R32_UNORM = 241, + SF_R32_SNORM = 242, + SF_R10G10B10X2_USCALED = 243, + SF_R8G8B8A8_SSCALED = 244, + SF_R8G8B8A8_USCALED = 245, + SF_R16G16_SSCALED = 246, + SF_R16G16_USCALED = 247, + SF_R32_SSCALED = 248, + SF_R32_USCALED = 249, + SF_B5G6R5_UNORM = 256, + SF_B5G6R5_UNORM_SRGB = 257, + SF_B5G5R5A1_UNORM = 258, + SF_B5G5R5A1_UNORM_SRGB = 259, + SF_B4G4R4A4_UNORM = 260, + SF_B4G4R4A4_UNORM_SRGB = 261, + SF_R8G8_UNORM = 262, + SF_R8G8_SNORM = 263, + SF_R8G8_SINT = 264, + SF_R8G8_UINT = 265, + SF_R16_UNORM = 266, + SF_R16_SNORM = 267, + SF_R16_SINT = 268, + SF_R16_UINT = 269, + SF_R16_FLOAT = 270, + SF_A8P8_UNORM_PALETTE0 = 271, + SF_A8P8_UNORM_PALETTE1 = 272, + SF_I16_UNORM = 273, + SF_L16_UNORM = 274, + SF_A16_UNORM = 275, + SF_L8A8_UNORM = 276, + SF_I16_FLOAT = 277, + SF_L16_FLOAT = 278, + SF_A16_FLOAT = 279, + SF_L8A8_UNORM_SRGB = 280, + SF_R5G5_SNORM_B6_UNORM = 281, + SF_B5G5R5X1_UNORM = 282, + SF_B5G5R5X1_UNORM_SRGB = 283, + SF_R8G8_SSCALED = 284, + SF_R8G8_USCALED = 285, + SF_R16_SSCALED = 286, + SF_R16_USCALED = 287, + SF_P8A8_UNORM_PALETTE0 = 290, + SF_P8A8_UNORM_PALETTE1 = 291, + SF_A1B5G5R5_UNORM = 292, + SF_A4B4G4R4_UNORM = 293, + SF_L8A8_UINT = 294, + SF_L8A8_SINT = 295, + SF_R8_UNORM = 320, + SF_R8_SNORM = 321, + SF_R8_SINT = 322, + SF_R8_UINT = 323, + SF_A8_UNORM = 324, + SF_I8_UNORM = 325, + SF_L8_UNORM = 326, + SF_P4A4_UNORM_PALETTE0 = 327, + SF_A4P4_UNORM_PALETTE0 = 328, + SF_R8_SSCALED = 329, + SF_R8_USCALED = 330, + SF_P8_UNORM_PALETTE0 = 331, + SF_L8_UNORM_SRGB = 332, + SF_P8_UNORM_PALETTE1 = 333, + SF_P4A4_UNORM_PALETTE1 = 334, + SF_A4P4_UNORM_PALETTE1 = 335, + SF_Y8_UNORM = 336, + SF_L8_UINT = 338, + SF_L8_SINT = 339, + SF_I8_UINT = 340, + SF_I8_SINT = 341, + SF_DXT1_RGB_SRGB = 384, + SF_R1_UNORM = 385, + SF_YCRCB_NORMAL = 386, + SF_YCRCB_SWAPUVY = 387, + SF_P2_UNORM_PALETTE0 = 388, + SF_P2_UNORM_PALETTE1 = 389, + SF_BC1_UNORM = 390, + SF_BC2_UNORM = 391, + SF_BC3_UNORM = 392, + SF_BC4_UNORM = 393, + SF_BC5_UNORM = 394, + SF_BC1_UNORM_SRGB = 395, + SF_BC2_UNORM_SRGB = 396, + SF_BC3_UNORM_SRGB = 397, + SF_MONO8 = 398, + SF_YCRCB_SWAPUV = 399, + SF_YCRCB_SWAPY = 400, + SF_DXT1_RGB = 401, + SF_FXT1 = 402, + SF_R8G8B8_UNORM = 403, + SF_R8G8B8_SNORM = 404, + SF_R8G8B8_SSCALED = 405, + SF_R8G8B8_USCALED = 406, + SF_R64G64B64A64_FLOAT = 407, + SF_R64G64B64_FLOAT = 408, + SF_BC4_SNORM = 409, + SF_BC5_SNORM = 410, + SF_R16G16B16_FLOAT = 411, + SF_R16G16B16_UNORM = 412, + SF_R16G16B16_SNORM = 413, + SF_R16G16B16_SSCALED = 414, + SF_R16G16B16_USCALED = 415, + SF_BC6H_SF16 = 417, + SF_BC7_UNORM = 418, + SF_BC7_UNORM_SRGB = 419, + SF_BC6H_UF16 = 420, + SF_PLANAR_420_8 = 421, + SF_R8G8B8_UNORM_SRGB = 424, + SF_ETC1_RGB8 = 425, + SF_ETC2_RGB8 = 426, + SF_EAC_R11 = 427, + SF_EAC_RG11 = 428, + SF_EAC_SIGNED_R11 = 429, + SF_EAC_SIGNED_RG11 = 430, + SF_ETC2_SRGB8 = 431, + SF_R16G16B16_UINT = 432, + SF_R16G16B16_SINT = 433, + SF_R32_SFIXED = 434, + SF_R10G10B10A2_SNORM = 435, + SF_R10G10B10A2_USCALED = 436, + SF_R10G10B10A2_SSCALED = 437, + SF_R10G10B10A2_SINT = 438, + SF_B10G10R10A2_SNORM = 439, + SF_B10G10R10A2_USCALED = 440, + SF_B10G10R10A2_SSCALED = 441, + SF_B10G10R10A2_UINT = 442, + SF_B10G10R10A2_SINT = 443, + SF_R64G64B64A64_PASSTHRU = 444, + SF_R64G64B64_PASSTHRU = 445, + SF_ETC2_RGB8_PTA = 448, + SF_ETC2_SRGB8_PTA = 449, + SF_ETC2_EAC_RGBA8 = 450, + SF_ETC2_EAC_SRGB8_A8 = 451, + SF_R8G8B8_UINT = 456, + SF_R8G8B8_SINT = 457, + SF_RAW = 511, +}; + +enum GEN6_TextureCoordinateMode { + TCM_WRAP = 0, + TCM_MIRROR = 1, + TCM_CLAMP = 2, + TCM_CUBE = 3, + TCM_CLAMP_BORDER = 4, + TCM_MIRROR_ONCE = 5, +}; + #define GEN6_MEMORY_OBJECT_CONTROL_STATE_length 1 struct GEN6_MEMORY_OBJECT_CONTROL_STATE { uint32_t GraphicsDataTypeGFDT; @@ -181,8 +521,9 @@ #define VERTEXDATA 0 #define INSTANCEDATA 1 struct GEN6_MEMORY_OBJECT_CONTROL_STATE VertexBufferMemoryObjectControlState; + uint32_t VertexBufferMOCS; bool NullVertexBuffer; - uint32_t VertexFetchInvalidate; + bool VertexFetchInvalidate; uint32_t BufferPitch; __gen_address_type BufferStartingAddress; __gen_address_type EndAddress; @@ -202,6 +543,7 @@ __gen_uint(values->VertexBufferIndex, 26, 31) | __gen_uint(values->BufferAccessType, 20, 20) | __gen_uint(v0_0, 16, 19) | + __gen_uint(values->VertexBufferMOCS, 16, 19) | __gen_uint(values->NullVertexBuffer, 13, 13) | __gen_uint(values->VertexFetchInvalidate, 12, 12) | __gen_uint(values->BufferPitch, 0, 11); @@ -217,14 +559,14 @@ #define GEN6_VERTEX_ELEMENT_STATE_length 2 struct GEN6_VERTEX_ELEMENT_STATE { uint32_t VertexBufferIndex; - uint32_t Valid; - uint32_t SourceElementFormat; + bool Valid; + enum GEN6_SURFACE_FORMAT SourceElementFormat; bool EdgeFlagEnable; uint32_t SourceElementOffset; - uint32_t Component0Control; - uint32_t Component1Control; - uint32_t Component2Control; - uint32_t Component3Control; + enum GEN6_3D_Vertex_Component_Control Component0Control; + enum GEN6_3D_Vertex_Component_Control Component1Control; + enum GEN6_3D_Vertex_Component_Control Component2Control; + enum GEN6_3D_Vertex_Component_Control Component3Control; }; static inline void @@ -378,41 +720,12 @@ struct GEN6_BLEND_STATE_ENTRY { bool ColorBufferBlendEnable; bool IndependentAlphaBlendEnable; - uint32_t AlphaBlendFunction; -#define BLENDFUNCTION_ADD 0 -#define BLENDFUNCTION_SUBTRACT 1 -#define BLENDFUNCTION_REVERSE_SUBTRACT 2 -#define BLENDFUNCTION_MIN 3 -#define BLENDFUNCTION_MAX 4 - uint32_t SourceAlphaBlendFactor; -#define BLENDFACTOR_ONE 1 -#define BLENDFACTOR_SRC_COLOR 2 -#define BLENDFACTOR_SRC_ALPHA 3 -#define BLENDFACTOR_DST_ALPHA 4 -#define BLENDFACTOR_DST_COLOR 5 -#define BLENDFACTOR_SRC_ALPHA_SATURATE 6 -#define BLENDFACTOR_CONST_COLOR 7 -#define BLENDFACTOR_CONST_ALPHA 8 -#define BLENDFACTOR_SRC1_COLOR 9 -#define BLENDFACTOR_SRC1_ALPHA 10 -#define BLENDFACTOR_ZERO 17 -#define BLENDFACTOR_INV_SRC_COLOR 18 -#define BLENDFACTOR_INV_SRC_ALPHA 19 -#define BLENDFACTOR_INV_DST_ALPHA 20 -#define BLENDFACTOR_INV_DST_COLOR 21 -#define BLENDFACTOR_INV_CONST_COLOR 23 -#define BLENDFACTOR_INV_CONST_ALPHA 24 -#define BLENDFACTOR_INV_SRC1_COLOR 25 -#define BLENDFACTOR_INV_SRC1_ALPHA 26 - uint32_t DestinationAlphaBlendFactor; - uint32_t ColorBlendFunction; -#define BLENDFUNCTION_ADD 0 -#define BLENDFUNCTION_SUBTRACT 1 -#define BLENDFUNCTION_REVERSE_SUBTRACT 2 -#define BLENDFUNCTION_MIN 3 -#define BLENDFUNCTION_MAX 4 - uint32_t SourceBlendFactor; - uint32_t DestinationBlendFactor; + enum GEN6_3D_Color_Buffer_Blend_Function AlphaBlendFunction; + enum GEN6_3D_Color_Buffer_Blend_Factor SourceAlphaBlendFactor; + enum GEN6_3D_Color_Buffer_Blend_Factor DestinationAlphaBlendFactor; + enum GEN6_3D_Color_Buffer_Blend_Function ColorBlendFunction; + enum GEN6_3D_Color_Buffer_Blend_Factor SourceBlendFactor; + enum GEN6_3D_Color_Buffer_Blend_Factor DestinationBlendFactor; bool AlphaToCoverageEnable; bool AlphaToOneEnable; bool AlphaToCoverageDitherEnable; @@ -421,33 +734,9 @@ bool WriteDisableGreen; bool WriteDisableBlue; bool LogicOpEnable; - uint32_t LogicOpFunction; -#define LOGICOP_CLEAR 0 -#define LOGICOP_NOR 1 -#define LOGICOP_AND_INVERTED 2 -#define LOGICOP_COPY_INVERTED 3 -#define LOGICOP_AND_REVERSE 4 -#define LOGICOP_INVERT 5 -#define LOGICOP_XOR 6 -#define LOGICOP_NAND 7 -#define LOGICOP_AND 8 -#define LOGICOP_EQUIV 9 -#define LOGICOP_NOOP 10 -#define LOGICOP_OR_INVERTED 11 -#define LOGICOP_COPY 12 -#define LOGICOP_OR_REVERSE 13 -#define LOGICOP_OR 14 -#define LOGICOP_SET 15 + enum GEN6_3D_Logic_Op_Function LogicOpFunction; bool AlphaTestEnable; - uint32_t AlphaTestFunction; -#define COMPAREFUNCTION_ALWAYS 0 -#define COMPAREFUNCTION_NEVER 1 -#define COMPAREFUNCTION_LESS 2 -#define COMPAREFUNCTION_EQUAL 3 -#define COMPAREFUNCTION_LEQUAL 4 -#define COMPAREFUNCTION_GREATER 5 -#define COMPAREFUNCTION_NOTEQUAL 6 -#define COMPAREFUNCTION_GEQUAL 7 + enum GEN6_3D_Compare_Function AlphaTestFunction; bool ColorDitherEnable; uint32_t XDitherOffset; uint32_t YDitherOffset; @@ -590,62 +879,22 @@ #define GEN6_DEPTH_STENCIL_STATE_length 3 struct GEN6_DEPTH_STENCIL_STATE { bool StencilTestEnable; - uint32_t StencilTestFunction; -#define COMPAREFUNCTION_ALWAYS 0 -#define COMPAREFUNCTION_NEVER 1 -#define COMPAREFUNCTION_LESS 2 -#define COMPAREFUNCTION_EQUAL 3 -#define COMPAREFUNCTION_LEQUAL 4 -#define COMPAREFUNCTION_GREATER 5 -#define COMPAREFUNCTION_NOTEQUAL 6 -#define COMPAREFUNCTION_GEQUAL 7 - uint32_t StencilFailOp; -#define STENCILOP_KEEP 0 -#define STENCILOP_ZERO 1 -#define STENCILOP_REPLACE 2 -#define STENCILOP_INCRSAT 3 -#define STENCILOP_DECRSAT 4 -#define STENCILOP_INCR 5 -#define STENCILOP_DECR 6 -#define STENCILOP_INVERT 7 - uint32_t StencilPassDepthFailOp; - uint32_t StencilPassDepthPassOp; + enum GEN6_3D_Compare_Function StencilTestFunction; + enum GEN6_3D_Stencil_Operation StencilFailOp; + enum GEN6_3D_Stencil_Operation StencilPassDepthFailOp; + enum GEN6_3D_Stencil_Operation StencilPassDepthPassOp; bool StencilBufferWriteEnable; bool DoubleSidedStencilEnable; - uint32_t BackfaceStencilTestFunction; -#define COMPAREFUNCTION_ALWAYS 0 -#define COMPAREFUNCTION_NEVER 1 -#define COMPAREFUNCTION_LESS 2 -#define COMPAREFUNCTION_EQUAL 3 -#define COMPAREFUNCTION_LEQUAL 4 -#define COMPAREFUNCTION_GREATER 5 -#define COMPAREFUNCTION_NOTEQUAL 6 -#define COMPAREFUNCTION_GEQUAL 7 - uint32_t BackfaceStencilFailOp; -#define STENCILOP_KEEP 0 -#define STENCILOP_ZERO 1 -#define STENCILOP_REPLACE 2 -#define STENCILOP_INCRSAT 3 -#define STENCILOP_DECRSAT 4 -#define STENCILOP_INCR 5 -#define STENCILOP_DECR 6 -#define STENCILOP_INVERT 7 - uint32_t BackfaceStencilPassDepthFailOp; - uint32_t BackfaceStencilPassDepthPassOp; + enum GEN6_3D_Compare_Function BackfaceStencilTestFunction; + enum GEN6_3D_Stencil_Operation BackfaceStencilFailOp; + enum GEN6_3D_Stencil_Operation BackfaceStencilPassDepthFailOp; + enum GEN6_3D_Stencil_Operation BackfaceStencilPassDepthPassOp; uint32_t StencilTestMask; uint32_t StencilWriteMask; uint32_t BackfaceStencilTestMask; uint32_t BackfaceStencilWriteMask; bool DepthTestEnable; - uint32_t DepthTestFunction; -#define COMPAREFUNCTION_ALWAYS 0 -#define COMPAREFUNCTION_NEVER 1 -#define COMPAREFUNCTION_LESS 2 -#define COMPAREFUNCTION_EQUAL 3 -#define COMPAREFUNCTION_LEQUAL 4 -#define COMPAREFUNCTION_GREATER 5 -#define COMPAREFUNCTION_NOTEQUAL 6 -#define COMPAREFUNCTION_GEQUAL 7 + enum GEN6_3D_Compare_Function DepthTestFunction; bool DepthBufferWriteEnable; }; @@ -683,7 +932,7 @@ #define GEN6_INTERFACE_DESCRIPTOR_DATA_length 8 struct GEN6_INTERFACE_DESCRIPTOR_DATA { uint64_t KernelStartPointer; - uint32_t SingleProgramFlow; + bool SingleProgramFlow; uint32_t ThreadPriority; #define NormalPriority 0 #define HighPriority 1 @@ -795,7 +1044,7 @@ #define SURFTYPE_NULL 7 uint32_t DataReturnFormat; #define DATA_RETURN_FLOAT32 0 - uint32_t SurfaceFormat; + enum GEN6_SURFACE_FORMAT SurfaceFormat; uint32_t VerticalLineStride; uint32_t VerticalLineStrideOffset; uint32_t MIPMapLayoutMode; @@ -822,7 +1071,7 @@ #define RTROTATE_270DEG 3 uint32_t Depth; uint32_t SurfacePitch; - uint32_t TiledSurface; + bool TiledSurface; uint32_t TileWalk; #define TILEWALK_XMAJOR 0 #define TILEWALK_YMAJOR 1 @@ -833,11 +1082,11 @@ #define MULTISAMPLECOUNT_1 0 #define MULTISAMPLECOUNT_4 2 uint32_t MultisamplePositionPaletteIndex; - uint64_t XOffset; + uint32_t XOffset; uint32_t SurfaceVerticalAlignment; #define VALIGN_2 0 #define VALIGN_4 1 - uint64_t YOffset; + uint32_t YOffset; struct GEN6_MEMORY_OBJECT_CONTROL_STATE SurfaceObjectControlState; uint32_t MOCS; }; @@ -885,13 +1134,96 @@ GEN6_MEMORY_OBJECT_CONTROL_STATE_pack(data, &v5_0, &values->SurfaceObjectControlState); dw[5] = - __gen_offset(values->XOffset, 25, 31) | + __gen_uint(values->XOffset, 25, 31) | __gen_uint(values->SurfaceVerticalAlignment, 24, 24) | - __gen_offset(values->YOffset, 20, 23) | + __gen_uint(values->YOffset, 20, 23) | __gen_uint(v5_0, 16, 19) | __gen_uint(values->MOCS, 16, 19); } +#define GEN6_SAMPLER_BORDER_COLOR_STATE_length 12 +struct GEN6_SAMPLER_BORDER_COLOR_STATE { + uint32_t BorderColorUnormRed; + uint32_t BorderColorUnormGreen; + uint32_t BorderColorUnormBlue; + uint32_t BorderColorUnormAlpha; + float BorderColorFloatRed; + float BorderColorFloatGreen; + float BorderColorFloatBlue; + float BorderColorFloatAlpha; + uint32_t BorderColorFloat16Red; + uint32_t BorderColorFloat16Green; + uint32_t BorderColorFloat16Blue; + uint32_t BorderColorFloat16Alpha; + uint32_t BorderColorUnorm16Red; + uint32_t BorderColorUnorm16Green; + uint32_t BorderColorUnorm16Blue; + uint32_t BorderColorUnorm16Alpha; + int32_t BorderColorSnorm16Red; + int32_t BorderColorSnorm16Green; + int32_t BorderColorSnorm16Blue; + int32_t BorderColorSnorm16Alpha; + int32_t BorderColorSnorm8Red; + int32_t BorderColorSnorm8Green; + int32_t BorderColorSnorm8Blue; + int32_t BorderColorSnorm8Alpha; +}; + +static inline void +GEN6_SAMPLER_BORDER_COLOR_STATE_pack(__gen_user_data *data, void * restrict dst, + const struct GEN6_SAMPLER_BORDER_COLOR_STATE * restrict values) +{ + uint32_t * restrict dw = (uint32_t * restrict) dst; + + dw[0] = + __gen_uint(values->BorderColorUnormRed, 0, 7) | + __gen_uint(values->BorderColorUnormGreen, 8, 15) | + __gen_uint(values->BorderColorUnormBlue, 16, 23) | + __gen_uint(values->BorderColorUnormAlpha, 24, 31); + + dw[1] = + __gen_float(values->BorderColorFloatRed); + + dw[2] = + __gen_float(values->BorderColorFloatGreen); + + dw[3] = + __gen_float(values->BorderColorFloatBlue); + + dw[4] = + __gen_float(values->BorderColorFloatAlpha); + + dw[5] = + __gen_uint(values->BorderColorFloat16Red, 0, 15) | + __gen_uint(values->BorderColorFloat16Green, 16, 31); + + dw[6] = + __gen_uint(values->BorderColorFloat16Blue, 0, 15) | + __gen_uint(values->BorderColorFloat16Alpha, 16, 31); + + dw[7] = + __gen_uint(values->BorderColorUnorm16Red, 0, 15) | + __gen_uint(values->BorderColorUnorm16Green, 16, 31); + + dw[8] = + __gen_uint(values->BorderColorUnorm16Blue, 0, 15) | + __gen_uint(values->BorderColorUnorm16Alpha, 16, 31); + + dw[9] = + __gen_sint(values->BorderColorSnorm16Red, 0, 15) | + __gen_sint(values->BorderColorSnorm16Green, 16, 31); + + dw[10] = + __gen_sint(values->BorderColorSnorm16Blue, 0, 15) | + __gen_sint(values->BorderColorSnorm16Alpha, 16, 31); + + dw[11] = + __gen_sint(values->BorderColorSnorm8Red, 0, 7) | + __gen_sint(values->BorderColorSnorm8Green, 8, 15) | + __gen_sint(values->BorderColorSnorm8Blue, 16, 23) | + __gen_sint(values->BorderColorSnorm8Alpha, 24, 31); +} + #define GEN6_SAMPLER_STATE_length 4 struct GEN6_SAMPLER_STATE { bool SamplerDisable; @@ -930,12 +1262,6 @@ #define CUBECTRLMODE_PROGRAMMED 0 #define CUBECTRLMODE_OVERRIDE 1 uint32_t TCXAddressControlMode; -#define TEXCOORDMODE_WRAP 0 -#define TEXCOORDMODE_MIRROR 1 -#define TEXCOORDMODE_CLAMP 2 -#define TEXCOORDMODE_CUBE 3 -#define TEXCOORDMODE_CLAMP_BORDER 4 -#define TEXCOORDMODE_MIRROR_ONCE 5 uint32_t TCYAddressControlMode; uint32_t TCZAddressControlMode; uint64_t BorderColorPointer; @@ -947,16 +1273,21 @@ #define KEYFILTER_KILL_ON_ANY_MATCH 0 #define KEYFILTER_REPLACE_BLACK 1 uint32_t MaximumAnisotropy; -#define ANISORATIO_2 0 -#define ANISORATIO_4 1 -#define ANISORATIO_6 2 -#define ANISORATIO_8 3 -#define ANISORATIO_10 4 -#define ANISORATIO_12 5 -#define ANISORATIO_14 6 -#define ANISORATIO_16 7 - uint32_t AddressRoundingEnable; - bool NonnormalizedCoordinates; +#define RATIO21 0 +#define RATIO41 1 +#define RATIO61 2 +#define RATIO81 3 +#define RATIO101 4 +#define RATIO121 5 +#define RATIO141 6 +#define RATIO161 7 + bool RAddressMinFilterRoundingEnable; + bool RAddressMagFilterRoundingEnable; + bool VAddressMinFilterRoundingEnable; + bool VAddressMagFilterRoundingEnable; + bool UAddressMinFilterRoundingEnable; + bool UAddressMagFilterRoundingEnable; + bool NonnormalizedCoordinateEnable; }; static inline void @@ -995,253 +1326,15 @@ __gen_uint(values->ChromaKeyIndex, 23, 24) | __gen_uint(values->ChromaKeyMode, 22, 22) | __gen_uint(values->MaximumAnisotropy, 19, 21) | - __gen_uint(values->AddressRoundingEnable, 13, 18) | - __gen_uint(values->NonnormalizedCoordinates, 0, 0); + __gen_uint(values->RAddressMinFilterRoundingEnable, 13, 13) | + __gen_uint(values->RAddressMagFilterRoundingEnable, 14, 14) | + __gen_uint(values->VAddressMinFilterRoundingEnable, 15, 15) | + __gen_uint(values->VAddressMagFilterRoundingEnable, 16, 16) | + __gen_uint(values->UAddressMinFilterRoundingEnable, 17, 17) | + __gen_uint(values->UAddressMagFilterRoundingEnable, 18, 18) | + __gen_uint(values->NonnormalizedCoordinateEnable, 0, 0); } -/* enum GEN6_3D_Vertex_Component_Control */ -#define VFCOMP_NOSTORE 0 -#define VFCOMP_STORE_SRC 1 -#define VFCOMP_STORE_0 2 -#define VFCOMP_STORE_1_FP 3 -#define VFCOMP_STORE_1_INT 4 -#define VFCOMP_STORE_VID 5 -#define VFCOMP_STORE_IID 6 -#define VFCOMP_STORE_PID 7 - -/* enum GEN6_3D_Compare_Function */ -#define COMPAREFUNCTION_ALWAYS 0 -#define COMPAREFUNCTION_NEVER 1 -#define COMPAREFUNCTION_LESS 2 -#define COMPAREFUNCTION_EQUAL 3 -#define COMPAREFUNCTION_LEQUAL 4 -#define COMPAREFUNCTION_GREATER 5 -#define COMPAREFUNCTION_NOTEQUAL 6 -#define COMPAREFUNCTION_GEQUAL 7 - -/* enum GEN6_SURFACE_FORMAT */ -#define SF_R32G32B32A32_FLOAT 0 -#define SF_R32G32B32A32_SINT 1 -#define SF_R32G32B32A32_UINT 2 -#define SF_R32G32B32A32_UNORM 3 -#define SF_R32G32B32A32_SNORM 4 -#define SF_R64G64_FLOAT 5 -#define SF_R32G32B32X32_FLOAT 6 -#define SF_R32G32B32A32_SSCALED 7 -#define SF_R32G32B32A32_USCALED 8 -#define SF_R32G32B32A32_SFIXED 32 -#define SF_R64G64_PASSTHRU 33 -#define SF_R32G32B32_FLOAT 64 -#define SF_R32G32B32_SINT 65 -#define SF_R32G32B32_UINT 66 -#define SF_R32G32B32_UNORM 67 -#define SF_R32G32B32_SNORM 68 -#define SF_R32G32B32_SSCALED 69 -#define SF_R32G32B32_USCALED 70 -#define SF_R32G32B32_SFIXED 80 -#define SF_R16G16B16A16_UNORM 128 -#define SF_R16G16B16A16_SNORM 129 -#define SF_R16G16B16A16_SINT 130 -#define SF_R16G16B16A16_UINT 131 -#define SF_R16G16B16A16_FLOAT 132 -#define SF_R32G32_FLOAT 133 -#define SF_R32G32_SINT 134 -#define SF_R32G32_UINT 135 -#define SF_R32_FLOAT_X8X24_TYPELESS 136 -#define SF_X32_TYPELESS_G8X24_UINT 137 -#define SF_L32A32_FLOAT 138 -#define SF_R32G32_UNORM 139 -#define SF_R32G32_SNORM 140 -#define SF_R64_FLOAT 141 -#define SF_R16G16B16X16_UNORM 142 -#define SF_R16G16B16X16_FLOAT 143 -#define SF_A32X32_FLOAT 144 -#define SF_L32X32_FLOAT 145 -#define SF_I32X32_FLOAT 146 -#define SF_R16G16B16A16_SSCALED 147 -#define SF_R16G16B16A16_USCALED 148 -#define SF_R32G32_SSCALED 149 -#define SF_R32G32_USCALED 150 -#define SF_R32G32_SFIXED 160 -#define SF_R64_PASSTHRU 161 -#define SF_B8G8R8A8_UNORM 192 -#define SF_B8G8R8A8_UNORM_SRGB 193 -#define SF_R10G10B10A2_UNORM 194 -#define SF_R10G10B10A2_UNORM_SRGB 195 -#define SF_R10G10B10A2_UINT 196 -#define SF_R10G10B10_SNORM_A2_UNORM 197 -#define SF_R8G8B8A8_UNORM 199 -#define SF_R8G8B8A8_UNORM_SRGB 200 -#define SF_R8G8B8A8_SNORM 201 -#define SF_R8G8B8A8_SINT 202 -#define SF_R8G8B8A8_UINT 203 -#define SF_R16G16_UNORM 204 -#define SF_R16G16_SNORM 205 -#define SF_R16G16_SINT 206 -#define SF_R16G16_UINT 207 -#define SF_R16G16_FLOAT 208 -#define SF_B10G10R10A2_UNORM 209 -#define SF_B10G10R10A2_UNORM_SRGB 210 -#define SF_R11G11B10_FLOAT 211 -#define SF_R32_SINT 214 -#define SF_R32_UINT 215 -#define SF_R32_FLOAT 216 -#define SF_R24_UNORM_X8_TYPELESS 217 -#define SF_X24_TYPELESS_G8_UINT 218 -#define SF_L32_UNORM 221 -#define SF_A32_UNORM 222 -#define SF_L16A16_UNORM 223 -#define SF_I24X8_UNORM 224 -#define SF_L24X8_UNORM 225 -#define SF_A24X8_UNORM 226 -#define SF_I32_FLOAT 227 -#define SF_L32_FLOAT 228 -#define SF_A32_FLOAT 229 -#define SF_X8B8_UNORM_G8R8_SNORM 230 -#define SF_A8X8_UNORM_G8R8_SNORM 231 -#define SF_B8X8_UNORM_G8R8_SNORM 232 -#define SF_B8G8R8X8_UNORM 233 -#define SF_B8G8R8X8_UNORM_SRGB 234 -#define SF_R8G8B8X8_UNORM 235 -#define SF_R8G8B8X8_UNORM_SRGB 236 -#define SF_R9G9B9E5_SHAREDEXP 237 -#define SF_B10G10R10X2_UNORM 238 -#define SF_L16A16_FLOAT 240 -#define SF_R32_UNORM 241 -#define SF_R32_SNORM 242 -#define SF_R10G10B10X2_USCALED 243 -#define SF_R8G8B8A8_SSCALED 244 -#define SF_R8G8B8A8_USCALED 245 -#define SF_R16G16_SSCALED 246 -#define SF_R16G16_USCALED 247 -#define SF_R32_SSCALED 248 -#define SF_R32_USCALED 249 -#define SF_B5G6R5_UNORM 256 -#define SF_B5G6R5_UNORM_SRGB 257 -#define SF_B5G5R5A1_UNORM 258 -#define SF_B5G5R5A1_UNORM_SRGB 259 -#define SF_B4G4R4A4_UNORM 260 -#define SF_B4G4R4A4_UNORM_SRGB 261 -#define SF_R8G8_UNORM 262 -#define SF_R8G8_SNORM 263 -#define SF_R8G8_SINT 264 -#define SF_R8G8_UINT 265 -#define SF_R16_UNORM 266 -#define SF_R16_SNORM 267 -#define SF_R16_SINT 268 -#define SF_R16_UINT 269 -#define SF_R16_FLOAT 270 -#define SF_A8P8_UNORM_PALETTE0 271 -#define SF_A8P8_UNORM_PALETTE1 272 -#define SF_I16_UNORM 273 -#define SF_L16_UNORM 274 -#define SF_A16_UNORM 275 -#define SF_L8A8_UNORM 276 -#define SF_I16_FLOAT 277 -#define SF_L16_FLOAT 278 -#define SF_A16_FLOAT 279 -#define SF_L8A8_UNORM_SRGB 280 -#define SF_R5G5_SNORM_B6_UNORM 281 -#define SF_B5G5R5X1_UNORM 282 -#define SF_B5G5R5X1_UNORM_SRGB 283 -#define SF_R8G8_SSCALED 284 -#define SF_R8G8_USCALED 285 -#define SF_R16_SSCALED 286 -#define SF_R16_USCALED 287 -#define SF_P8A8_UNORM_PALETTE0 290 -#define SF_P8A8_UNORM_PALETTE1 291 -#define SF_A1B5G5R5_UNORM 292 -#define SF_A4B4G4R4_UNORM 293 -#define SF_L8A8_UINT 294 -#define SF_L8A8_SINT 295 -#define SF_R8_UNORM 320 -#define SF_R8_SNORM 321 -#define SF_R8_SINT 322 -#define SF_R8_UINT 323 -#define SF_A8_UNORM 324 -#define SF_I8_UNORM 325 -#define SF_L8_UNORM 326 -#define SF_P4A4_UNORM_PALETTE0 327 -#define SF_A4P4_UNORM_PALETTE0 328 -#define SF_R8_SSCALED 329 -#define SF_R8_USCALED 330 -#define SF_P8_UNORM_PALETTE0 331 -#define SF_L8_UNORM_SRGB 332 -#define SF_P8_UNORM_PALETTE1 333 -#define SF_P4A4_UNORM_PALETTE1 334 -#define SF_A4P4_UNORM_PALETTE1 335 -#define SF_Y8_UNORM 336 -#define SF_L8_UINT 338 -#define SF_L8_SINT 339 -#define SF_I8_UINT 340 -#define SF_I8_SINT 341 -#define SF_DXT1_RGB_SRGB 384 -#define SF_R1_UNORM 385 -#define SF_YCRCB_NORMAL 386 -#define SF_YCRCB_SWAPUVY 387 -#define SF_P2_UNORM_PALETTE0 388 -#define SF_P2_UNORM_PALETTE1 389 -#define SF_BC1_UNORM 390 -#define SF_BC2_UNORM 391 -#define SF_BC3_UNORM 392 -#define SF_BC4_UNORM 393 -#define SF_BC5_UNORM 394 -#define SF_BC1_UNORM_SRGB 395 -#define SF_BC2_UNORM_SRGB 396 -#define SF_BC3_UNORM_SRGB 397 -#define SF_MONO8 398 -#define SF_YCRCB_SWAPUV 399 -#define SF_YCRCB_SWAPY 400 -#define SF_DXT1_RGB 401 -#define SF_FXT1 402 -#define SF_R8G8B8_UNORM 403 -#define SF_R8G8B8_SNORM 404 -#define SF_R8G8B8_SSCALED 405 -#define SF_R8G8B8_USCALED 406 -#define SF_R64G64B64A64_FLOAT 407 -#define SF_R64G64B64_FLOAT 408 -#define SF_BC4_SNORM 409 -#define SF_BC5_SNORM 410 -#define SF_R16G16B16_FLOAT 411 -#define SF_R16G16B16_UNORM 412 -#define SF_R16G16B16_SNORM 413 -#define SF_R16G16B16_SSCALED 414 -#define SF_R16G16B16_USCALED 415 -#define SF_BC6H_SF16 417 -#define SF_BC7_UNORM 418 -#define SF_BC7_UNORM_SRGB 419 -#define SF_BC6H_UF16 420 -#define SF_PLANAR_420_8 421 -#define SF_R8G8B8_UNORM_SRGB 424 -#define SF_ETC1_RGB8 425 -#define SF_ETC2_RGB8 426 -#define SF_EAC_R11 427 -#define SF_EAC_RG11 428 -#define SF_EAC_SIGNED_R11 429 -#define SF_EAC_SIGNED_RG11 430 -#define SF_ETC2_SRGB8 431 -#define SF_R16G16B16_UINT 432 -#define SF_R16G16B16_SINT 433 -#define SF_R32_SFIXED 434 -#define SF_R10G10B10A2_SNORM 435 -#define SF_R10G10B10A2_USCALED 436 -#define SF_R10G10B10A2_SSCALED 437 -#define SF_R10G10B10A2_SINT 438 -#define SF_B10G10R10A2_SNORM 439 -#define SF_B10G10R10A2_USCALED 440 -#define SF_B10G10R10A2_SSCALED 441 -#define SF_B10G10R10A2_UINT 442 -#define SF_B10G10R10A2_SINT 443 -#define SF_R64G64B64A64_PASSTHRU 444 -#define SF_R64G64B64_PASSTHRU 445 -#define SF_ETC2_RGB8_PTA 448 -#define SF_ETC2_SRGB8_PTA 449 -#define SF_ETC2_EAC_RGBA8 450 -#define SF_ETC2_EAC_SRGB8_A8 451 -#define SF_R8G8B8_UINT 456 -#define SF_R8G8B8_SINT 457 -#define SF_RAW 511 - #define GEN6_3DPRIMITIVE_length 6 #define GEN6_3DPRIMITIVE_length_bias 2 #define GEN6_3DPRIMITIVE_header \ @@ -1259,7 +1352,7 @@ uint32_t VertexAccessType; #define SEQUENTIAL 0 #define RANDOM 1 - uint32_t PrimitiveTopologyType; + enum GEN6_3D_Prim_Topo_Type PrimitiveTopologyType; uint32_t InternalVertexCount; uint32_t DWordLength; uint32_t VertexCountPerInstance; @@ -1503,7 +1596,7 @@ uint32_t _3DCommandSubOpcode; bool DepthClearValueValid; uint32_t DWordLength; - float DepthClearValue; + uint32_t DepthClearValue; }; static inline void @@ -1521,7 +1614,7 @@ __gen_uint(values->DWordLength, 0, 7); dw[1] = - __gen_float(values->DepthClearValue); + __gen_uint(values->DepthClearValue, 0, 31); } #define GEN6_3DSTATE_CLIP_length 4 @@ -1836,7 +1929,7 @@ #define SURFTYPE_3D 2 #define SURFTYPE_CUBE 3 #define SURFTYPE_NULL 7 - uint32_t TiledSurface; + bool TiledSurface; uint32_t TileWalk; #define TILEWALK_YMAJOR 1 uint32_t SoftwareTiledRenderingMode; @@ -1867,6 +1960,7 @@ int32_t DepthCoordinateOffsetY; int32_t DepthCoordinateOffsetX; struct GEN6_MEMORY_OBJECT_CONTROL_STATE DepthBufferObjectControlState; + uint32_t DepthBufferMOCS; }; static inline void @@ -1913,7 +2007,8 @@ GEN6_MEMORY_OBJECT_CONTROL_STATE_pack(data, &v6_0, &values->DepthBufferObjectControlState); dw[6] = - __gen_uint(v6_0, 27, 31); + __gen_uint(v6_0, 27, 31) | + __gen_uint(values->DepthBufferMOCS, 27, 31); } #define GEN6_3DSTATE_DRAWING_RECTANGLE_length 4 @@ -1981,8 +2076,8 @@ uint32_t _3DCommandSubOpcode; uint32_t DWordLength; uint64_t KernelStartPointer; - uint32_t SingleProgramFlowSPF; - uint32_t VectorMaskEnableVME; + bool SingleProgramFlow; + bool VectorMaskEnable; uint32_t SamplerCount; #define NoSamplers 0 #define _14Samplers 1 @@ -2003,9 +2098,9 @@ uint32_t PerThreadScratchSpace; uint32_t VertexURBEntryReadLength; uint32_t VertexURBEntryReadOffset; - uint32_t DispatchGRFStartRegisterforURBData; + uint32_t DispatchGRFStartRegisterForURBData; uint32_t MaximumNumberofThreads; - bool GSStatisticsEnable; + bool StatisticsEnable; bool SOStatisticsEnable; uint32_t RenderingEnabled; bool ReorderEnable; @@ -2013,7 +2108,7 @@ bool SVBIPayloadEnable; bool SVBIPostIncrementEnable; uint32_t SVBIPostIncrementValue; - bool GSEnable; + bool FunctionEnable; }; static inline void @@ -2033,8 +2128,8 @@ __gen_offset(values->KernelStartPointer, 6, 31); dw[2] = - __gen_uint(values->SingleProgramFlowSPF, 31, 31) | - __gen_uint(values->VectorMaskEnableVME, 30, 30) | + __gen_uint(values->SingleProgramFlow, 31, 31) | + __gen_uint(values->VectorMaskEnable, 30, 30) | __gen_uint(values->SamplerCount, 27, 29) | __gen_uint(values->BindingTableEntryCount, 18, 25) | __gen_uint(values->ThreadPriority, 17, 17) | @@ -2050,11 +2145,11 @@ dw[4] = __gen_uint(values->VertexURBEntryReadLength, 11, 16) | __gen_uint(values->VertexURBEntryReadOffset, 4, 9) | - __gen_uint(values->DispatchGRFStartRegisterforURBData, 0, 3); + __gen_uint(values->DispatchGRFStartRegisterForURBData, 0, 3); dw[5] = __gen_uint(values->MaximumNumberofThreads, 25, 31) | - __gen_uint(values->GSStatisticsEnable, 10, 10) | + __gen_uint(values->StatisticsEnable, 10, 10) | __gen_uint(values->SOStatisticsEnable, 9, 9) | __gen_uint(values->RenderingEnabled, 8, 8); @@ -2064,7 +2159,7 @@ __gen_uint(values->SVBIPayloadEnable, 28, 28) | __gen_uint(values->SVBIPostIncrementEnable, 27, 27) | __gen_uint(values->SVBIPostIncrementValue, 16, 25) | - __gen_uint(values->GSEnable, 15, 15); + __gen_uint(values->FunctionEnable, 15, 15); } #define GEN6_3DSTATE_GS_SVB_INDEX_length 7 @@ -2118,14 +2213,14 @@ dw[6] = 0; } -#define GEN6_3DSTATE_HIER_DEPTH_BUFFER_length 2 +#define GEN6_3DSTATE_HIER_DEPTH_BUFFER_length 3 #define GEN6_3DSTATE_HIER_DEPTH_BUFFER_length_bias 2 #define GEN6_3DSTATE_HIER_DEPTH_BUFFER_header \ .CommandType = 3, \ .CommandSubType = 3, \ ._3DCommandOpcode = 1, \ ._3DCommandSubOpcode = 15, \ - .DWordLength = 0 + .DWordLength = 1 struct GEN6_3DSTATE_HIER_DEPTH_BUFFER { uint32_t CommandType; @@ -2134,7 +2229,9 @@ uint32_t _3DCommandSubOpcode; uint32_t DWordLength; struct GEN6_MEMORY_OBJECT_CONTROL_STATE HierarchicalDepthBufferObjectControlState; + uint32_t HierarchicalDepthBufferMOCS; uint32_t SurfacePitch; + __gen_address_type SurfaceBaseAddress; }; static inline void @@ -2155,7 +2252,10 @@ dw[1] = __gen_uint(v1_0, 25, 28) | + __gen_uint(values->HierarchicalDepthBufferMOCS, 25, 28) | __gen_uint(values->SurfacePitch, 0, 16); + + dw[2] = __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, 0); } #define GEN6_3DSTATE_INDEX_BUFFER_length 3 @@ -2974,6 +3074,7 @@ uint32_t _3DCommandSubOpcode; uint32_t DWordLength; struct GEN6_MEMORY_OBJECT_CONTROL_STATE StencilBufferObjectControlState; + uint32_t StencilBufferMOCS; uint32_t SurfacePitch; __gen_address_type SurfaceBaseAddress; }; @@ -2996,6 +3097,7 @@ dw[1] = __gen_uint(v1_0, 25, 28) | + __gen_uint(values->StencilBufferMOCS, 25, 28) | __gen_uint(values->SurfacePitch, 0, 16); dw[2] = __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, 0); @@ -3202,7 +3304,7 @@ uint32_t DWordLength; uint64_t KernelStartPointer; bool SingleVertexDispatch; - uint32_t VectorMaskEnableVME; + bool VectorMaskEnable; uint32_t SamplerCount; #define NoSamplers 0 #define _14Samplers 1 @@ -3217,13 +3319,13 @@ bool SoftwareExceptionEnable; __gen_address_type ScratchSpaceBasePointer; uint32_t PerThreadScratchSpace; - uint32_t DispatchGRFStartRegisterforURBData; + uint32_t DispatchGRFStartRegisterForURBData; uint32_t VertexURBEntryReadLength; uint32_t VertexURBEntryReadOffset; uint32_t MaximumNumberofThreads; bool StatisticsEnable; bool VertexCacheDisable; - bool VSFunctionEnable; + bool FunctionEnable; }; static inline void @@ -3244,7 +3346,7 @@ dw[2] = __gen_uint(values->SingleVertexDispatch, 31, 31) | - __gen_uint(values->VectorMaskEnableVME, 30, 30) | + __gen_uint(values->VectorMaskEnable, 30, 30) | __gen_uint(values->SamplerCount, 27, 29) | __gen_uint(values->BindingTableEntryCount, 18, 25) | __gen_uint(values->FloatingPointMode, 16, 16) | @@ -3256,7 +3358,7 @@ dw[3] = __gen_combine_address(data, &dw[3], values->ScratchSpaceBasePointer, v3); dw[4] = - __gen_uint(values->DispatchGRFStartRegisterforURBData, 20, 24) | + __gen_uint(values->DispatchGRFStartRegisterForURBData, 20, 24) | __gen_uint(values->VertexURBEntryReadLength, 11, 16) | __gen_uint(values->VertexURBEntryReadOffset, 4, 9); @@ -3264,17 +3366,17 @@ __gen_uint(values->MaximumNumberofThreads, 25, 31) | __gen_uint(values->StatisticsEnable, 10, 10) | __gen_uint(values->VertexCacheDisable, 1, 1) | - __gen_uint(values->VSFunctionEnable, 0, 0); + __gen_uint(values->FunctionEnable, 0, 0); } -#define GEN6_3DSTATE_WM_length 3 +#define GEN6_3DSTATE_WM_length 9 #define GEN6_3DSTATE_WM_length_bias 2 #define GEN6_3DSTATE_WM_header \ .CommandType = 3, \ .CommandSubType = 3, \ ._3DCommandOpcode = 0, \ ._3DCommandSubOpcode = 20, \ - .DWordLength = 1 + .DWordLength = 7 struct GEN6_3DSTATE_WM { uint32_t CommandType; @@ -3283,8 +3385,8 @@ uint32_t _3DCommandSubOpcode; uint32_t DWordLength; uint64_t KernelStartPointer0; - uint32_t SingleProgramFlowSPF; - uint32_t VectorMaskEnableVME; + bool SingleProgramFlow; + bool VectorMaskEnable; uint32_t SamplerCount; uint32_t BindingTableEntryCount; uint32_t ThreadPriority; @@ -3301,17 +3403,25 @@ bool DepthBufferClear; bool DepthBufferResolveEnable; bool HierarchicalDepthBufferResolveEnable; - uint32_t DispatchGRFStartRegisterforConstantSetupData0; - uint32_t DispatchGRFStartRegisterforConstantSetupData1; - uint32_t DispatchGRFStartRegisterforConstantSetupData2; + uint32_t DispatchGRFStartRegisterForConstantSetupData0; + uint32_t DispatchGRFStartRegisterForConstantSetupData1; + uint32_t DispatchGRFStartRegisterForConstantSetupData2; uint32_t MaximumNumberofThreads; bool LegacyDiamondLineRasterization; - bool PixelShaderKillPixel; + bool PixelShaderKillsPixel; bool PixelShaderComputedDepth; bool PixelShaderUsesSourceDepth; bool ThreadDispatchEnable; uint32_t LineEndCapAntialiasingRegionWidth; +#define _05pixels 0 +#define _10pixels 1 +#define _20pixels 2 +#define _40pixels 3 uint32_t LineAntialiasingRegionWidth; +#define _05pixels 0 +#define _10pixels 1 +#define _20pixels 2 +#define _40pixels 3 bool PolygonStippleEnable; bool LineStippleEnable; bool oMaskPresenttoRenderTarget; @@ -3330,6 +3440,12 @@ #define INTERP_CENTROID 2 #define INTERP_SAMPLE 3 uint32_t BarycentricInterpolationMode; +#define BIM_PERSPECTIVE_PIXEL 1 +#define BIM_PERSPECTIVE_CENTROID 2 +#define BIM_PERSPECTIVE_SAMPLE 4 +#define BIM_LINEAR_PIXEL 8 +#define BIM_LINEAR_CENTROID 16 +#define BIM_LINEAR_SAMPLE 32 uint32_t PointRasterizationRule; #define RASTRULE_UPPER_LEFT 0 #define RASTRULE_UPPER_RIGHT 1 @@ -3362,8 +3478,8 @@ __gen_offset(values->KernelStartPointer0, 6, 31); dw[2] = - __gen_uint(values->SingleProgramFlowSPF, 31, 31) | - __gen_uint(values->VectorMaskEnableVME, 30, 30) | + __gen_uint(values->SingleProgramFlow, 31, 31) | + __gen_uint(values->VectorMaskEnable, 30, 30) | __gen_uint(values->SamplerCount, 27, 29) | __gen_uint(values->BindingTableEntryCount, 18, 25) | __gen_uint(values->ThreadPriority, 17, 17) | @@ -3371,6 +3487,52 @@ __gen_uint(values->IllegalOpcodeExceptionEnable, 13, 13) | __gen_uint(values->MaskStackExceptionEnable, 11, 11) | __gen_uint(values->SoftwareExceptionEnable, 7, 7); + + const uint32_t v3 = + __gen_uint(values->PerThreadScratchSpace, 0, 3); + dw[3] = __gen_combine_address(data, &dw[3], values->ScratchSpaceBasePointer, v3); + + dw[4] = + __gen_uint(values->StatisticsEnable, 31, 31) | + __gen_uint(values->DepthBufferClear, 30, 30) | + __gen_uint(values->DepthBufferResolveEnable, 28, 28) | + __gen_uint(values->HierarchicalDepthBufferResolveEnable, 27, 27) | + __gen_uint(values->DispatchGRFStartRegisterForConstantSetupData0, 16, 22) | + __gen_uint(values->DispatchGRFStartRegisterForConstantSetupData1, 8, 14) | + __gen_uint(values->DispatchGRFStartRegisterForConstantSetupData2, 0, 6); + + dw[5] = + __gen_uint(values->MaximumNumberofThreads, 25, 31) | + __gen_uint(values->LegacyDiamondLineRasterization, 23, 23) | + __gen_uint(values->PixelShaderKillsPixel, 22, 22) | + __gen_uint(values->PixelShaderComputedDepth, 21, 21) | + __gen_uint(values->PixelShaderUsesSourceDepth, 20, 20) | + __gen_uint(values->ThreadDispatchEnable, 19, 19) | + __gen_uint(values->LineEndCapAntialiasingRegionWidth, 16, 17) | + __gen_uint(values->LineAntialiasingRegionWidth, 14, 15) | + __gen_uint(values->PolygonStippleEnable, 13, 13) | + __gen_uint(values->LineStippleEnable, 11, 11) | + __gen_uint(values->oMaskPresenttoRenderTarget, 9, 9) | + __gen_uint(values->PixelShaderUsesSourceW, 8, 8) | + __gen_uint(values->DualSourceBlendEnable, 7, 7) | + __gen_uint(values->_32PixelDispatchEnable, 2, 2) | + __gen_uint(values->_16PixelDispatchEnable, 1, 1) | + __gen_uint(values->_8PixelDispatchEnable, 0, 0); + + dw[6] = + __gen_uint(values->NumberofSFOutputAttributes, 20, 25) | + __gen_uint(values->PositionXYOffsetSelect, 18, 19) | + __gen_uint(values->PositionZWInterpolationMode, 16, 17) | + __gen_uint(values->BarycentricInterpolationMode, 10, 15) | + __gen_uint(values->PointRasterizationRule, 9, 9) | + __gen_uint(values->MultisampleRasterizationMode, 1, 2) | + __gen_uint(values->MultisampleDispatchMode, 0, 0); + + dw[7] = + __gen_offset(values->KernelStartPointer1, 6, 31); + + dw[8] = + __gen_offset(values->KernelStartPointer2, 6, 31); } #define GEN6_MEDIA_CURBE_LOAD_length 4 @@ -4034,9 +4196,7 @@ struct GEN6_MI_CLFLUSH { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t UseGlobalGTT; -#define PerProcessGraphicsAddress 0 -#define GlobalGraphicsAddress 1 + bool UseGlobalGTT; uint32_t DWordLength; __gen_address_type PageBaseAddress; uint32_t StartingCachelineOffset; @@ -4065,14 +4225,13 @@ #define GEN6_MI_CONDITIONAL_BATCH_BUFFER_END_header\ .CommandType = 0, \ .MICommandOpcode = 54, \ - .UseGlobalGTT = 0, \ .CompareSemaphore = 0, \ .DWordLength = 0 struct GEN6_MI_CONDITIONAL_BATCH_BUFFER_END { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t UseGlobalGTT; + bool UseGlobalGTT; uint32_t CompareSemaphore; uint32_t DWordLength; uint32_t CompareDataDword; @@ -4340,9 +4499,9 @@ struct GEN6_MI_STORE_DATA_IMM { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t UseGlobalGTT; + bool UseGlobalGTT; uint32_t DWordLength; - uint32_t Address; + __gen_address_type Address; uint32_t CoreModeEnable; uint32_t DataDWord0; uint32_t DataDWord1; @@ -4362,9 +4521,9 @@ dw[1] = 0; - dw[2] = - __gen_uint(values->Address, 2, 31) | + const uint32_t v2 = __gen_uint(values->CoreModeEnable, 0, 0); + dw[2] = __gen_combine_address(data, &dw[2], values->Address, v2); dw[3] = __gen_uint(values->DataDWord0, 0, 31); @@ -4414,7 +4573,7 @@ struct GEN6_MI_STORE_REGISTER_MEM { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t UseGlobalGTT; + bool UseGlobalGTT; uint32_t DWordLength; uint64_t RegisterAddress; __gen_address_type MemoryAddress; @@ -4609,11 +4768,9 @@ uint32_t DWordLength; uint32_t StoreDataIndex; bool CommandStreamerStallEnable; - uint32_t GlobalSnapshotCountReset; -#define DontReset 0 -#define Reset 1 - uint32_t TLBInvalidate; - uint32_t SynchronizeGFDTSurface; + bool GlobalSnapshotCountReset; + bool TLBInvalidate; + bool SynchronizeGFDTSurface; bool GenericMediaStateClear; uint32_t PostSyncOperation; #define NoWrite 0 @@ -4697,20 +4854,26 @@ uint32_t DWordLength; __gen_address_type GeneralStateBaseAddress; struct GEN6_MEMORY_OBJECT_CONTROL_STATE GeneralStateMemoryObjectControlState; + uint32_t GeneralStateMOCS; struct GEN6_MEMORY_OBJECT_CONTROL_STATE StatelessDataPortAccessMemoryObjectControlState; + uint32_t StatelessDataPortAccessMOCS; uint32_t StatelessDataPortAccessForceWriteThru; bool GeneralStateBaseAddressModifyEnable; __gen_address_type SurfaceStateBaseAddress; struct GEN6_MEMORY_OBJECT_CONTROL_STATE SurfaceStateMemoryObjectControlState; + uint32_t SurfaceStateMOCS; bool SurfaceStateBaseAddressModifyEnable; __gen_address_type DynamicStateBaseAddress; struct GEN6_MEMORY_OBJECT_CONTROL_STATE DynamicStateMemoryObjectControlState; + uint32_t DynamicStateMOCS; bool DynamicStateBaseAddressModifyEnable; __gen_address_type IndirectObjectBaseAddress; struct GEN6_MEMORY_OBJECT_CONTROL_STATE IndirectObjectMemoryObjectControlState; + uint32_t IndirectObjectMOCS; bool IndirectObjectBaseAddressModifyEnable; __gen_address_type InstructionBaseAddress; struct GEN6_MEMORY_OBJECT_CONTROL_STATE InstructionMemoryObjectControlState; + uint32_t InstructionMOCS; bool InstructionBaseAddressModifyEnable; __gen_address_type GeneralStateAccessUpperBound; bool GeneralStateAccessUpperBoundModifyEnable; @@ -4743,7 +4906,9 @@ const uint32_t v1 = __gen_uint(v1_0, 8, 11) | + __gen_uint(values->GeneralStateMOCS, 8, 11) | __gen_uint(v1_1, 4, 7) | + __gen_uint(values->StatelessDataPortAccessMOCS, 4, 7) | __gen_uint(values->StatelessDataPortAccessForceWriteThru, 3, 3) | __gen_uint(values->GeneralStateBaseAddressModifyEnable, 0, 0); dw[1] = __gen_combine_address(data, &dw[1], values->GeneralStateBaseAddress, v1); @@ -4753,6 +4918,7 @@ const uint32_t v2 = __gen_uint(v2_0, 8, 11) | + __gen_uint(values->SurfaceStateMOCS, 8, 11) | __gen_uint(values->SurfaceStateBaseAddressModifyEnable, 0, 0); dw[2] = __gen_combine_address(data, &dw[2], values->SurfaceStateBaseAddress, v2); @@ -4761,6 +4927,7 @@ const uint32_t v3 = __gen_uint(v3_0, 8, 11) | + __gen_uint(values->DynamicStateMOCS, 8, 11) | __gen_uint(values->DynamicStateBaseAddressModifyEnable, 0, 0); dw[3] = __gen_combine_address(data, &dw[3], values->DynamicStateBaseAddress, v3); @@ -4769,6 +4936,7 @@ const uint32_t v4 = __gen_uint(v4_0, 8, 11) | + __gen_uint(values->IndirectObjectMOCS, 8, 11) | __gen_uint(values->IndirectObjectBaseAddressModifyEnable, 0, 0); dw[4] = __gen_combine_address(data, &dw[4], values->IndirectObjectBaseAddress, v4); @@ -4777,6 +4945,7 @@ const uint32_t v5 = __gen_uint(v5_0, 8, 11) | + __gen_uint(values->InstructionMOCS, 8, 11) | __gen_uint(values->InstructionBaseAddressModifyEnable, 0, 0); dw[5] = __gen_combine_address(data, &dw[5], values->InstructionBaseAddress, v5); @@ -4869,3 +5038,4 @@ __gen_offset(values->SystemInstructionPointer, 4, 31); } +#endif /* GEN6_PACK_H */ diff -Nru mesa-12.0.6/src/intel/genxml/gen6.xml mesa-17.0.7/src/intel/genxml/gen6.xml --- mesa-12.0.6/src/intel/genxml/gen6.xml 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/genxml/gen6.xml 2017-06-01 10:37:10.000000000 +0000 @@ -1,451 +1,27 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + @@ -458,6 +34,36 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -469,6 +75,36 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -693,6 +329,391 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -702,7 +723,7 @@ - + @@ -773,7 +794,7 @@ - + @@ -897,7 +918,7 @@ - + @@ -934,6 +955,7 @@ + @@ -957,8 +979,8 @@ - - + + @@ -982,9 +1004,9 @@ - + - + @@ -992,7 +1014,7 @@ - + @@ -1007,14 +1029,16 @@ - + - + + + @@ -1270,6 +1294,7 @@ + @@ -1338,7 +1363,7 @@ - + @@ -1355,24 +1380,24 @@ - + - + - + - + - - + + @@ -1391,17 +1416,27 @@ - - - + + + - + - - + + + + + + + + + + + + @@ -1421,7 +1456,14 @@ - + + + + + + + + @@ -1659,10 +1701,7 @@ - - - - + @@ -1674,7 +1713,7 @@ - + @@ -1762,9 +1801,9 @@ - + - + @@ -1782,7 +1821,7 @@ - + @@ -1844,12 +1883,9 @@ - - - - - - + + + @@ -1883,20 +1919,26 @@ + + + + + + diff -Nru mesa-12.0.6/src/intel/genxml/gen6_xml.h mesa-17.0.7/src/intel/genxml/gen6_xml.h --- mesa-12.0.6/src/intel/genxml/gen6_xml.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/genxml/gen6_xml.h 2017-06-01 10:38:02.000000000 +0000 @@ -0,0 +1,9465 @@ +static const uint8_t gen6_xml[] = { + 0x3c, 0x67, 0x65, 0x6e, 0x78, 0x6d, 0x6c, 0x20, 0x6e, 0x61, 0x6d, 0x65, + 0x3d, 0x22, 0x53, 0x4e, 0x42, 0x22, 0x20, 0x67, 0x65, 0x6e, 0x3d, 0x22, + 0x36, 0x22, 0x3e, 0x0a, 0x20, 0x20, 0x3c, 0x65, 0x6e, 0x75, 0x6d, 0x20, + 0x6e, 0x61, 0x6d, 0x65, 0x3d, 0x22, 0x33, 0x44, 0x5f, 0x50, 0x72, 0x69, + 0x6d, 0x5f, 0x54, 0x6f, 0x70, 0x6f, 0x5f, 0x54, 0x79, 0x70, 0x65, 0x22, + 0x20, 0x70, 0x72, 0x65, 0x66, 0x69, 0x78, 0x3d, 0x22, 0x33, 0x44, 0x50, + 0x52, 0x49, 0x4d, 0x22, 0x3e, 0x0a, 0x20, 0x20, 0x20, 0x20, 0x3c, 0x76, + 0x61, 0x6c, 0x75, 0x65, 0x20, 0x6e, 0x61, 0x6d, 0x65, 0x3d, 0x22, 0x50, + 0x4f, 0x49, 0x4e, 0x54, 0x4c, 0x49, 0x53, 0x54, 0x22, 0x20, 0x76, 0x61, + 0x6c, 0x75, 0x65, 0x3d, 0x22, 0x31, 0x22, 0x2f, 0x3e, 0x0a, 0x20, 0x20, + 0x20, 0x20, 0x3c, 0x76, 0x61, 0x6c, 0x75, 0x65, 0x20, 0x6e, 0x61, 0x6d, + 0x65, 0x3d, 0x22, 0x4c, 0x49, 0x4e, 0x45, 0x4c, 0x49, 0x53, 0x54, 0x22, + 0x20, 0x76, 0x61, 0x6c, 0x75, 0x65, 0x3d, 0x22, 0x32, 0x22, 0x2f, 0x3e, + 0x0a, 0x20, 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mesa-12.0.6/src/intel/genxml/gen75_pack.h mesa-17.0.7/src/intel/genxml/gen75_pack.h --- mesa-12.0.6/src/intel/genxml/gen75_pack.h 2017-01-24 01:43:18.000000000 +0000 +++ mesa-17.0.7/src/intel/genxml/gen75_pack.h 2017-06-01 10:38:02.000000000 +0000 @@ -27,7 +27,8 @@ * This file has been generated, do not hand edit. */ -#pragma once +#ifndef GEN75_PACK_H +#define GEN75_PACK_H #include #include @@ -157,6 +158,377 @@ #endif +enum GEN75_3D_Prim_Topo_Type { + _3DPRIM_POINTLIST = 1, + _3DPRIM_LINELIST = 2, + _3DPRIM_LINESTRIP = 3, + _3DPRIM_TRILIST = 4, + _3DPRIM_TRISTRIP = 5, + _3DPRIM_TRIFAN = 6, + _3DPRIM_QUADLIST = 7, + _3DPRIM_QUADSTRIP = 8, + _3DPRIM_LINELIST_ADJ = 9, + _3DPRIM_LINESTRIP_ADJ = 10, + _3DPRIM_TRILIST_ADJ = 11, + _3DPRIM_TRISTRIP_ADJ = 12, + _3DPRIM_TRISTRIP_REVERSE = 13, + _3DPRIM_POLYGON = 14, + _3DPRIM_RECTLIST = 15, + _3DPRIM_LINELOOP = 16, + _3DPRIM_POINTLIST_BF = 17, + _3DPRIM_LINESTRIP_CONT = 18, + _3DPRIM_LINESTRIP_BF = 19, + _3DPRIM_LINESTRIP_CONT_BF = 20, + _3DPRIM_TRIFAN_NOSTIPPLE = 22, + _3DPRIM_PATCHLIST_1 = 32, + _3DPRIM_PATCHLIST_2 = 33, + _3DPRIM_PATCHLIST_3 = 34, + _3DPRIM_PATCHLIST_4 = 35, + _3DPRIM_PATCHLIST_5 = 36, + _3DPRIM_PATCHLIST_6 = 37, + _3DPRIM_PATCHLIST_7 = 38, + _3DPRIM_PATCHLIST_8 = 39, + _3DPRIM_PATCHLIST_9 = 40, + _3DPRIM_PATCHLIST_10 = 41, + _3DPRIM_PATCHLIST_11 = 42, + _3DPRIM_PATCHLIST_12 = 43, + _3DPRIM_PATCHLIST_13 = 44, + _3DPRIM_PATCHLIST_14 = 45, + _3DPRIM_PATCHLIST_15 = 46, + _3DPRIM_PATCHLIST_16 = 47, + _3DPRIM_PATCHLIST_17 = 48, + _3DPRIM_PATCHLIST_18 = 49, + _3DPRIM_PATCHLIST_19 = 50, + _3DPRIM_PATCHLIST_20 = 51, + _3DPRIM_PATCHLIST_21 = 52, + _3DPRIM_PATCHLIST_22 = 53, + _3DPRIM_PATCHLIST_23 = 54, + _3DPRIM_PATCHLIST_24 = 55, + _3DPRIM_PATCHLIST_25 = 56, + _3DPRIM_PATCHLIST_26 = 57, + _3DPRIM_PATCHLIST_27 = 58, + _3DPRIM_PATCHLIST_28 = 59, + _3DPRIM_PATCHLIST_29 = 60, + _3DPRIM_PATCHLIST_30 = 61, + _3DPRIM_PATCHLIST_31 = 62, + _3DPRIM_PATCHLIST_32 = 63, +}; + +enum GEN75_3D_Vertex_Component_Control { + VFCOMP_NOSTORE = 0, + VFCOMP_STORE_SRC = 1, + VFCOMP_STORE_0 = 2, + VFCOMP_STORE_1_FP = 3, + VFCOMP_STORE_1_INT = 4, + VFCOMP_STORE_VID = 5, + VFCOMP_STORE_IID = 6, + VFCOMP_STORE_PID = 7, +}; + +enum GEN75_3D_Stencil_Operation { + STENCILOP_KEEP = 0, + STENCILOP_ZERO = 1, + STENCILOP_REPLACE = 2, + STENCILOP_INCRSAT = 3, + STENCILOP_DECRSAT = 4, + STENCILOP_INCR = 5, + STENCILOP_DECR = 6, + STENCILOP_INVERT = 7, +}; + +enum GEN75_3D_Color_Buffer_Blend_Factor { + BLENDFACTOR_ONE = 1, + BLENDFACTOR_SRC_COLOR = 2, + BLENDFACTOR_SRC_ALPHA = 3, + BLENDFACTOR_DST_ALPHA = 4, + BLENDFACTOR_DST_COLOR = 5, + BLENDFACTOR_SRC_ALPHA_SATURATE = 6, + BLENDFACTOR_CONST_COLOR = 7, + BLENDFACTOR_CONST_ALPHA = 8, + BLENDFACTOR_SRC1_COLOR = 9, + BLENDFACTOR_SRC1_ALPHA = 10, + BLENDFACTOR_ZERO = 17, + BLENDFACTOR_INV_SRC_COLOR = 18, + BLENDFACTOR_INV_SRC_ALPHA = 19, + BLENDFACTOR_INV_DST_ALPHA = 20, + BLENDFACTOR_INV_DST_COLOR = 21, + BLENDFACTOR_INV_CONST_COLOR = 23, + BLENDFACTOR_INV_CONST_ALPHA = 24, + BLENDFACTOR_INV_SRC1_COLOR = 25, + BLENDFACTOR_INV_SRC1_ALPHA = 26, +}; + +enum GEN75_3D_Color_Buffer_Blend_Function { + BLENDFUNCTION_ADD = 0, + BLENDFUNCTION_SUBTRACT = 1, + BLENDFUNCTION_REVERSE_SUBTRACT = 2, + BLENDFUNCTION_MIN = 3, + BLENDFUNCTION_MAX = 4, +}; + +enum GEN75_3D_Compare_Function { + COMPAREFUNCTION_ALWAYS = 0, + COMPAREFUNCTION_NEVER = 1, + COMPAREFUNCTION_LESS = 2, + COMPAREFUNCTION_EQUAL = 3, + COMPAREFUNCTION_LEQUAL = 4, + COMPAREFUNCTION_GREATER = 5, + COMPAREFUNCTION_NOTEQUAL = 6, + COMPAREFUNCTION_GEQUAL = 7, +}; + +enum GEN75_3D_Logic_Op_Function { + LOGICOP_CLEAR = 0, + LOGICOP_NOR = 1, + LOGICOP_AND_INVERTED = 2, + LOGICOP_COPY_INVERTED = 3, + LOGICOP_AND_REVERSE = 4, + LOGICOP_INVERT = 5, + LOGICOP_XOR = 6, + LOGICOP_NAND = 7, + LOGICOP_AND = 8, + LOGICOP_EQUIV = 9, + LOGICOP_NOOP = 10, + LOGICOP_OR_INVERTED = 11, + LOGICOP_COPY = 12, + LOGICOP_OR_REVERSE = 13, + LOGICOP_OR = 14, + LOGICOP_SET = 15, +}; + +enum GEN75_SURFACE_FORMAT { + SF_R32G32B32A32_FLOAT = 0, + SF_R32G32B32A32_SINT = 1, + SF_R32G32B32A32_UINT = 2, + SF_R32G32B32A32_UNORM = 3, + SF_R32G32B32A32_SNORM = 4, + SF_R64G64_FLOAT = 5, + SF_R32G32B32X32_FLOAT = 6, + SF_R32G32B32A32_SSCALED = 7, + SF_R32G32B32A32_USCALED = 8, + SF_R32G32B32A32_SFIXED = 32, + SF_R64G64_PASSTHRU = 33, + SF_R32G32B32_FLOAT = 64, + SF_R32G32B32_SINT = 65, + SF_R32G32B32_UINT = 66, + SF_R32G32B32_UNORM = 67, + SF_R32G32B32_SNORM = 68, + SF_R32G32B32_SSCALED = 69, + SF_R32G32B32_USCALED = 70, + SF_R32G32B32_SFIXED = 80, + SF_R16G16B16A16_UNORM = 128, + SF_R16G16B16A16_SNORM = 129, + SF_R16G16B16A16_SINT = 130, + SF_R16G16B16A16_UINT = 131, + SF_R16G16B16A16_FLOAT = 132, + SF_R32G32_FLOAT = 133, + SF_R32G32_SINT = 134, + SF_R32G32_UINT = 135, + SF_R32_FLOAT_X8X24_TYPELESS = 136, + SF_X32_TYPELESS_G8X24_UINT = 137, + SF_L32A32_FLOAT = 138, + SF_R32G32_UNORM = 139, + SF_R32G32_SNORM = 140, + SF_R64_FLOAT = 141, + SF_R16G16B16X16_UNORM = 142, + SF_R16G16B16X16_FLOAT = 143, + SF_A32X32_FLOAT = 144, + SF_L32X32_FLOAT = 145, + SF_I32X32_FLOAT = 146, + SF_R16G16B16A16_SSCALED = 147, + SF_R16G16B16A16_USCALED = 148, + SF_R32G32_SSCALED = 149, + SF_R32G32_USCALED = 150, + SF_R32G32_SFIXED = 160, + SF_R64_PASSTHRU = 161, + SF_B8G8R8A8_UNORM = 192, + SF_B8G8R8A8_UNORM_SRGB = 193, + SF_R10G10B10A2_UNORM = 194, + SF_R10G10B10A2_UNORM_SRGB = 195, + SF_R10G10B10A2_UINT = 196, + SF_R10G10B10_SNORM_A2_UNORM = 197, + SF_R8G8B8A8_UNORM = 199, + SF_R8G8B8A8_UNORM_SRGB = 200, + SF_R8G8B8A8_SNORM = 201, + SF_R8G8B8A8_SINT = 202, + SF_R8G8B8A8_UINT = 203, + SF_R16G16_UNORM = 204, + SF_R16G16_SNORM = 205, + SF_R16G16_SINT = 206, + SF_R16G16_UINT = 207, + SF_R16G16_FLOAT = 208, + SF_B10G10R10A2_UNORM = 209, + SF_B10G10R10A2_UNORM_SRGB = 210, + SF_R11G11B10_FLOAT = 211, + SF_R32_SINT = 214, + SF_R32_UINT = 215, + SF_R32_FLOAT = 216, + SF_R24_UNORM_X8_TYPELESS = 217, + SF_X24_TYPELESS_G8_UINT = 218, + SF_L32_UNORM = 221, + SF_A32_UNORM = 222, + SF_L16A16_UNORM = 223, + SF_I24X8_UNORM = 224, + SF_L24X8_UNORM = 225, + SF_A24X8_UNORM = 226, + SF_I32_FLOAT = 227, + SF_L32_FLOAT = 228, + SF_A32_FLOAT = 229, + SF_X8B8_UNORM_G8R8_SNORM = 230, + SF_A8X8_UNORM_G8R8_SNORM = 231, + SF_B8X8_UNORM_G8R8_SNORM = 232, + SF_B8G8R8X8_UNORM = 233, + SF_B8G8R8X8_UNORM_SRGB = 234, + SF_R8G8B8X8_UNORM = 235, + SF_R8G8B8X8_UNORM_SRGB = 236, + SF_R9G9B9E5_SHAREDEXP = 237, + SF_B10G10R10X2_UNORM = 238, + SF_L16A16_FLOAT = 240, + SF_R32_UNORM = 241, + SF_R32_SNORM = 242, + SF_R10G10B10X2_USCALED = 243, + SF_R8G8B8A8_SSCALED = 244, + SF_R8G8B8A8_USCALED = 245, + SF_R16G16_SSCALED = 246, + SF_R16G16_USCALED = 247, + SF_R32_SSCALED = 248, + SF_R32_USCALED = 249, + SF_B5G6R5_UNORM = 256, + SF_B5G6R5_UNORM_SRGB = 257, + SF_B5G5R5A1_UNORM = 258, + SF_B5G5R5A1_UNORM_SRGB = 259, + SF_B4G4R4A4_UNORM = 260, + SF_B4G4R4A4_UNORM_SRGB = 261, + SF_R8G8_UNORM = 262, + SF_R8G8_SNORM = 263, + SF_R8G8_SINT = 264, + SF_R8G8_UINT = 265, + SF_R16_UNORM = 266, + SF_R16_SNORM = 267, + SF_R16_SINT = 268, + SF_R16_UINT = 269, + SF_R16_FLOAT = 270, + SF_A8P8_UNORM_PALETTE0 = 271, + SF_A8P8_UNORM_PALETTE1 = 272, + SF_I16_UNORM = 273, + SF_L16_UNORM = 274, + SF_A16_UNORM = 275, + SF_L8A8_UNORM = 276, + SF_I16_FLOAT = 277, + SF_L16_FLOAT = 278, + SF_A16_FLOAT = 279, + SF_L8A8_UNORM_SRGB = 280, + SF_R5G5_SNORM_B6_UNORM = 281, + SF_B5G5R5X1_UNORM = 282, + SF_B5G5R5X1_UNORM_SRGB = 283, + SF_R8G8_SSCALED = 284, + SF_R8G8_USCALED = 285, + SF_R16_SSCALED = 286, + SF_R16_USCALED = 287, + SF_P8A8_UNORM_PALETTE0 = 290, + SF_P8A8_UNORM_PALETTE1 = 291, + SF_A1B5G5R5_UNORM = 292, + SF_A4B4G4R4_UNORM = 293, + SF_L8A8_UINT = 294, + SF_L8A8_SINT = 295, + SF_R8_UNORM = 320, + SF_R8_SNORM = 321, + SF_R8_SINT = 322, + SF_R8_UINT = 323, + SF_A8_UNORM = 324, + SF_I8_UNORM = 325, + SF_L8_UNORM = 326, + SF_P4A4_UNORM_PALETTE0 = 327, + SF_A4P4_UNORM_PALETTE0 = 328, + SF_R8_SSCALED = 329, + SF_R8_USCALED = 330, + SF_P8_UNORM_PALETTE0 = 331, + SF_L8_UNORM_SRGB = 332, + SF_P8_UNORM_PALETTE1 = 333, + SF_P4A4_UNORM_PALETTE1 = 334, + SF_A4P4_UNORM_PALETTE1 = 335, + SF_Y8_UNORM = 336, + SF_L8_UINT = 338, + SF_L8_SINT = 339, + SF_I8_UINT = 340, + SF_I8_SINT = 341, + SF_DXT1_RGB_SRGB = 384, + SF_R1_UNORM = 385, + SF_YCRCB_NORMAL = 386, + SF_YCRCB_SWAPUVY = 387, + SF_P2_UNORM_PALETTE0 = 388, + SF_P2_UNORM_PALETTE1 = 389, + SF_BC1_UNORM = 390, + SF_BC2_UNORM = 391, + SF_BC3_UNORM = 392, + SF_BC4_UNORM = 393, + SF_BC5_UNORM = 394, + SF_BC1_UNORM_SRGB = 395, + SF_BC2_UNORM_SRGB = 396, + SF_BC3_UNORM_SRGB = 397, + SF_MONO8 = 398, + SF_YCRCB_SWAPUV = 399, + SF_YCRCB_SWAPY = 400, + SF_DXT1_RGB = 401, + SF_FXT1 = 402, + SF_R8G8B8_UNORM = 403, + SF_R8G8B8_SNORM = 404, + SF_R8G8B8_SSCALED = 405, + SF_R8G8B8_USCALED = 406, + SF_R64G64B64A64_FLOAT = 407, + SF_R64G64B64_FLOAT = 408, + SF_BC4_SNORM = 409, + SF_BC5_SNORM = 410, + SF_R16G16B16_FLOAT = 411, + SF_R16G16B16_UNORM = 412, + SF_R16G16B16_SNORM = 413, + SF_R16G16B16_SSCALED = 414, + SF_R16G16B16_USCALED = 415, + SF_BC6H_SF16 = 417, + SF_BC7_UNORM = 418, + SF_BC7_UNORM_SRGB = 419, + SF_BC6H_UF16 = 420, + SF_PLANAR_420_8 = 421, + SF_R8G8B8_UNORM_SRGB = 424, + SF_ETC1_RGB8 = 425, + SF_ETC2_RGB8 = 426, + SF_EAC_R11 = 427, + SF_EAC_RG11 = 428, + SF_EAC_SIGNED_R11 = 429, + SF_EAC_SIGNED_RG11 = 430, + SF_ETC2_SRGB8 = 431, + SF_R16G16B16_UINT = 432, + SF_R16G16B16_SINT = 433, + SF_R32_SFIXED = 434, + SF_R10G10B10A2_SNORM = 435, + SF_R10G10B10A2_USCALED = 436, + SF_R10G10B10A2_SSCALED = 437, + SF_R10G10B10A2_SINT = 438, + SF_B10G10R10A2_SNORM = 439, + SF_B10G10R10A2_USCALED = 440, + SF_B10G10R10A2_SSCALED = 441, + SF_B10G10R10A2_UINT = 442, + SF_B10G10R10A2_SINT = 443, + SF_R64G64B64A64_PASSTHRU = 444, + SF_R64G64B64_PASSTHRU = 445, + SF_ETC2_RGB8_PTA = 448, + SF_ETC2_SRGB8_PTA = 449, + SF_ETC2_EAC_RGBA8 = 450, + SF_ETC2_EAC_SRGB8_A8 = 451, + SF_R8G8B8_UINT = 456, + SF_R8G8B8_SINT = 457, + SF_RAW = 511, +}; + +enum GEN75_TextureCoordinateMode { + TCM_WRAP = 0, + TCM_MIRROR = 1, + TCM_CLAMP = 2, + TCM_CUBE = 3, + TCM_CLAMP_BORDER = 4, + TCM_MIRROR_ONCE = 5, +}; + #define GEN75_MEMORY_OBJECT_CONTROL_STATE_length 1 struct GEN75_MEMORY_OBJECT_CONTROL_STATE { uint32_t LLCeLLCCacheabilityControlLLCCC; @@ -258,9 +630,10 @@ #define VERTEXDATA 0 #define INSTANCEDATA 1 struct GEN75_MEMORY_OBJECT_CONTROL_STATE VertexBufferMemoryObjectControlState; - uint32_t AddressModifyEnable; + uint32_t VertexBufferMOCS; + bool AddressModifyEnable; bool NullVertexBuffer; - uint32_t VertexFetchInvalidate; + bool VertexFetchInvalidate; uint32_t BufferPitch; __gen_address_type BufferStartingAddress; __gen_address_type EndAddress; @@ -280,6 +653,7 @@ __gen_uint(values->VertexBufferIndex, 26, 31) | __gen_uint(values->BufferAccessType, 20, 20) | __gen_uint(v0_0, 16, 19) | + __gen_uint(values->VertexBufferMOCS, 16, 19) | __gen_uint(values->AddressModifyEnable, 14, 14) | __gen_uint(values->NullVertexBuffer, 13, 13) | __gen_uint(values->VertexFetchInvalidate, 12, 12) | @@ -296,14 +670,14 @@ #define GEN75_VERTEX_ELEMENT_STATE_length 2 struct GEN75_VERTEX_ELEMENT_STATE { uint32_t VertexBufferIndex; - uint32_t Valid; - uint32_t SourceElementFormat; + bool Valid; + enum GEN75_SURFACE_FORMAT SourceElementFormat; bool EdgeFlagEnable; uint32_t SourceElementOffset; - uint32_t Component0Control; - uint32_t Component1Control; - uint32_t Component2Control; - uint32_t Component3Control; + enum GEN75_3D_Vertex_Component_Control Component0Control; + enum GEN75_3D_Vertex_Component_Control Component1Control; + enum GEN75_3D_Vertex_Component_Control Component2Control; + enum GEN75_3D_Vertex_Component_Control Component3Control; }; static inline void @@ -509,41 +883,12 @@ struct GEN75_BLEND_STATE_ENTRY { bool ColorBufferBlendEnable; bool IndependentAlphaBlendEnable; - uint32_t AlphaBlendFunction; -#define BLENDFUNCTION_ADD 0 -#define BLENDFUNCTION_SUBTRACT 1 -#define BLENDFUNCTION_REVERSE_SUBTRACT 2 -#define BLENDFUNCTION_MIN 3 -#define BLENDFUNCTION_MAX 4 - uint32_t SourceAlphaBlendFactor; -#define BLENDFACTOR_ONE 1 -#define BLENDFACTOR_SRC_COLOR 2 -#define BLENDFACTOR_SRC_ALPHA 3 -#define BLENDFACTOR_DST_ALPHA 4 -#define BLENDFACTOR_DST_COLOR 5 -#define BLENDFACTOR_SRC_ALPHA_SATURATE 6 -#define BLENDFACTOR_CONST_COLOR 7 -#define BLENDFACTOR_CONST_ALPHA 8 -#define BLENDFACTOR_SRC1_COLOR 9 -#define BLENDFACTOR_SRC1_ALPHA 10 -#define BLENDFACTOR_ZERO 17 -#define BLENDFACTOR_INV_SRC_COLOR 18 -#define BLENDFACTOR_INV_SRC_ALPHA 19 -#define BLENDFACTOR_INV_DST_ALPHA 20 -#define BLENDFACTOR_INV_DST_COLOR 21 -#define BLENDFACTOR_INV_CONST_COLOR 23 -#define BLENDFACTOR_INV_CONST_ALPHA 24 -#define BLENDFACTOR_INV_SRC1_COLOR 25 -#define BLENDFACTOR_INV_SRC1_ALPHA 26 - uint32_t DestinationAlphaBlendFactor; - uint32_t ColorBlendFunction; -#define BLENDFUNCTION_ADD 0 -#define BLENDFUNCTION_SUBTRACT 1 -#define BLENDFUNCTION_REVERSE_SUBTRACT 2 -#define BLENDFUNCTION_MIN 3 -#define BLENDFUNCTION_MAX 4 - uint32_t SourceBlendFactor; - uint32_t DestinationBlendFactor; + enum GEN75_3D_Color_Buffer_Blend_Function AlphaBlendFunction; + enum GEN75_3D_Color_Buffer_Blend_Factor SourceAlphaBlendFactor; + enum GEN75_3D_Color_Buffer_Blend_Factor DestinationAlphaBlendFactor; + enum GEN75_3D_Color_Buffer_Blend_Function ColorBlendFunction; + enum GEN75_3D_Color_Buffer_Blend_Factor SourceBlendFactor; + enum GEN75_3D_Color_Buffer_Blend_Factor DestinationBlendFactor; bool AlphaToCoverageEnable; bool AlphaToOneEnable; bool AlphaToCoverageDitherEnable; @@ -552,33 +897,9 @@ bool WriteDisableGreen; bool WriteDisableBlue; bool LogicOpEnable; - uint32_t LogicOpFunction; -#define LOGICOP_CLEAR 0 -#define LOGICOP_NOR 1 -#define LOGICOP_AND_INVERTED 2 -#define LOGICOP_COPY_INVERTED 3 -#define LOGICOP_AND_REVERSE 4 -#define LOGICOP_INVERT 5 -#define LOGICOP_XOR 6 -#define LOGICOP_NAND 7 -#define LOGICOP_AND 8 -#define LOGICOP_EQUIV 9 -#define LOGICOP_NOOP 10 -#define LOGICOP_OR_INVERTED 11 -#define LOGICOP_COPY 12 -#define LOGICOP_OR_REVERSE 13 -#define LOGICOP_OR 14 -#define LOGICOP_SET 15 + enum GEN75_3D_Logic_Op_Function LogicOpFunction; bool AlphaTestEnable; - uint32_t AlphaTestFunction; -#define COMPAREFUNCTION_ALWAYS 0 -#define COMPAREFUNCTION_NEVER 1 -#define COMPAREFUNCTION_LESS 2 -#define COMPAREFUNCTION_EQUAL 3 -#define COMPAREFUNCTION_LEQUAL 4 -#define COMPAREFUNCTION_GREATER 5 -#define COMPAREFUNCTION_NOTEQUAL 6 -#define COMPAREFUNCTION_GEQUAL 7 + enum GEN75_3D_Compare_Function AlphaTestFunction; bool ColorDitherEnable; uint32_t XDitherOffset; uint32_t YDitherOffset; @@ -721,62 +1042,22 @@ #define GEN75_DEPTH_STENCIL_STATE_length 3 struct GEN75_DEPTH_STENCIL_STATE { bool StencilTestEnable; - uint32_t StencilTestFunction; -#define COMPAREFUNCTION_ALWAYS 0 -#define COMPAREFUNCTION_NEVER 1 -#define COMPAREFUNCTION_LESS 2 -#define COMPAREFUNCTION_EQUAL 3 -#define COMPAREFUNCTION_LEQUAL 4 -#define COMPAREFUNCTION_GREATER 5 -#define COMPAREFUNCTION_NOTEQUAL 6 -#define COMPAREFUNCTION_GEQUAL 7 - uint32_t StencilFailOp; -#define STENCILOP_KEEP 0 -#define STENCILOP_ZERO 1 -#define STENCILOP_REPLACE 2 -#define STENCILOP_INCRSAT 3 -#define STENCILOP_DECRSAT 4 -#define STENCILOP_INCR 5 -#define STENCILOP_DECR 6 -#define STENCILOP_INVERT 7 - uint32_t StencilPassDepthFailOp; - uint32_t StencilPassDepthPassOp; + enum GEN75_3D_Compare_Function StencilTestFunction; + enum GEN75_3D_Stencil_Operation StencilFailOp; + enum GEN75_3D_Stencil_Operation StencilPassDepthFailOp; + enum GEN75_3D_Stencil_Operation StencilPassDepthPassOp; bool StencilBufferWriteEnable; bool DoubleSidedStencilEnable; - uint32_t BackfaceStencilTestFunction; -#define COMPAREFUNCTION_ALWAYS 0 -#define COMPAREFUNCTION_NEVER 1 -#define COMPAREFUNCTION_LESS 2 -#define COMPAREFUNCTION_EQUAL 3 -#define COMPAREFUNCTION_LEQUAL 4 -#define COMPAREFUNCTION_GREATER 5 -#define COMPAREFUNCTION_NOTEQUAL 6 -#define COMPAREFUNCTION_GEQUAL 7 - uint32_t BackfaceStencilFailOp; -#define STENCILOP_KEEP 0 -#define STENCILOP_ZERO 1 -#define STENCILOP_REPLACE 2 -#define STENCILOP_INCRSAT 3 -#define STENCILOP_DECRSAT 4 -#define STENCILOP_INCR 5 -#define STENCILOP_DECR 6 -#define STENCILOP_INVERT 7 - uint32_t BackfaceStencilPassDepthFailOp; - uint32_t BackfaceStencilPassDepthPassOp; + enum GEN75_3D_Compare_Function BackfaceStencilTestFunction; + enum GEN75_3D_Stencil_Operation BackfaceStencilFailOp; + enum GEN75_3D_Stencil_Operation BackfaceStencilPassDepthFailOp; + enum GEN75_3D_Stencil_Operation BackfaceStencilPassDepthPassOp; uint32_t StencilTestMask; uint32_t StencilWriteMask; uint32_t BackfaceStencilTestMask; uint32_t BackfaceStencilWriteMask; bool DepthTestEnable; - uint32_t DepthTestFunction; -#define COMPAREFUNCTION_ALWAYS 0 -#define COMPAREFUNCTION_NEVER 1 -#define COMPAREFUNCTION_LESS 2 -#define COMPAREFUNCTION_EQUAL 3 -#define COMPAREFUNCTION_LEQUAL 4 -#define COMPAREFUNCTION_GREATER 5 -#define COMPAREFUNCTION_NOTEQUAL 6 -#define COMPAREFUNCTION_GEQUAL 7 + enum GEN75_3D_Compare_Function DepthTestFunction; bool DepthBufferWriteEnable; }; @@ -814,7 +1095,7 @@ #define GEN75_INTERFACE_DESCRIPTOR_DATA_length 8 struct GEN75_INTERFACE_DESCRIPTOR_DATA { uint64_t KernelStartPointer; - uint32_t SingleProgramFlow; + bool SingleProgramFlow; uint32_t ThreadPriority; #define NormalPriority 0 #define HighPriority 1 @@ -932,14 +1213,14 @@ #define SURFTYPE_STRBUF 5 #define SURFTYPE_NULL 7 bool SurfaceArray; - uint32_t SurfaceFormat; + enum GEN75_SURFACE_FORMAT SurfaceFormat; uint32_t SurfaceVerticalAlignment; #define VALIGN_2 0 #define VALIGN_4 1 uint32_t SurfaceHorizontalAlignment; #define HALIGN_4 0 #define HALIGN_8 1 - uint32_t TiledSurface; + bool TiledSurface; uint32_t TileWalk; #define TILEWALK_XMAJOR 0 #define TILEWALK_YMAJOR 1 @@ -975,8 +1256,8 @@ #define MULTISAMPLECOUNT_8 3 uint32_t MultisamplePositionPaletteIndex; uint32_t StrbufMinimumArrayElement; - uint64_t XOffset; - uint64_t YOffset; + uint32_t XOffset; + uint32_t YOffset; struct GEN75_MEMORY_OBJECT_CONTROL_STATE SurfaceObjectControlState; uint32_t MOCS; uint32_t SurfaceMinLOD; @@ -1051,8 +1332,8 @@ GEN75_MEMORY_OBJECT_CONTROL_STATE_pack(data, &v5_0, &values->SurfaceObjectControlState); dw[5] = - __gen_offset(values->XOffset, 25, 31) | - __gen_offset(values->YOffset, 20, 23) | + __gen_uint(values->XOffset, 25, 31) | + __gen_uint(values->YOffset, 20, 23) | __gen_uint(v5_0, 16, 19) | __gen_uint(values->MOCS, 16, 19) | __gen_uint(values->SurfaceMinLOD, 4, 7) | @@ -1079,6 +1360,89 @@ __gen_ufixed(values->ResourceMinLOD, 0, 11, 8); } +#define GEN75_SAMPLER_BORDER_COLOR_STATE_length 20 +struct GEN75_SAMPLER_BORDER_COLOR_STATE { + float BorderColorFloatRed; + float BorderColorFloatGreen; + float BorderColorFloatBlue; + float BorderColorFloatAlpha; + uint32_t BorderColor8bitRed; + uint32_t BorderColor8bitGreen; + uint32_t BorderColor8bitBlue; + uint32_t BorderColor8bitAlpha; + uint32_t BorderColor16bitRed; + uint32_t BorderColor16bitGreen; + uint32_t BorderColor16bitBlue; + uint32_t BorderColor16bitAlpha; + uint32_t BorderColor32bitRed; + uint32_t BorderColor32bitGreen; + uint32_t BorderColor32bitBlue; + uint32_t BorderColor32bitAlpha; +}; + +static inline void +GEN75_SAMPLER_BORDER_COLOR_STATE_pack(__gen_user_data *data, void * restrict dst, + const struct GEN75_SAMPLER_BORDER_COLOR_STATE * restrict values) +{ + uint32_t * restrict dw = (uint32_t * restrict) dst; + + dw[0] = + __gen_float(values->BorderColorFloatRed); + + dw[1] = + __gen_float(values->BorderColorFloatGreen); + + dw[2] = + __gen_float(values->BorderColorFloatBlue); + + dw[3] = + __gen_float(values->BorderColorFloatAlpha); + + dw[4] = 0; + + dw[5] = 0; + + dw[6] = 0; + + dw[7] = 0; + + dw[8] = 0; + + dw[9] = 0; + + dw[10] = 0; + + dw[11] = 0; + + dw[12] = 0; + + dw[13] = 0; + + dw[14] = 0; + + dw[15] = 0; + + dw[16] = + __gen_uint(values->BorderColor8bitRed, 0, 7) | + __gen_uint(values->BorderColor8bitGreen, 8, 15) | + __gen_uint(values->BorderColor8bitBlue, 16, 23) | + __gen_uint(values->BorderColor8bitAlpha, 24, 31) | + __gen_uint(values->BorderColor16bitRed, 0, 15) | + __gen_uint(values->BorderColor16bitGreen, 16, 31) | + __gen_uint(values->BorderColor32bitRed, 0, 31); + + dw[17] = + __gen_uint(values->BorderColor32bitGreen, 0, 31); + + dw[18] = + __gen_uint(values->BorderColor16bitBlue, 0, 15) | + __gen_uint(values->BorderColor16bitAlpha, 16, 31) | + __gen_uint(values->BorderColor32bitBlue, 0, 31); + + dw[19] = + __gen_uint(values->BorderColor32bitAlpha, 0, 31); +} + #define GEN75_SAMPLER_STATE_length 4 struct GEN75_SAMPLER_STATE { bool SamplerDisable; @@ -1196,312 +1560,6 @@ __gen_uint(values->TCZAddressControlMode, 0, 2); } -/* enum GEN75_3D_Prim_Topo_Type */ -#define _3DPRIM_POINTLIST 1 -#define _3DPRIM_LINELIST 2 -#define _3DPRIM_LINESTRIP 3 -#define _3DPRIM_TRILIST 4 -#define _3DPRIM_TRISTRIP 5 -#define _3DPRIM_TRIFAN 6 -#define _3DPRIM_QUADLIST 7 -#define _3DPRIM_QUADSTRIP 8 -#define _3DPRIM_LINELIST_ADJ 9 -#define _3DPRIM_LINESTRIP_ADJ 10 -#define _3DPRIM_TRILIST_ADJ 11 -#define _3DPRIM_TRISTRIP_ADJ 12 -#define _3DPRIM_TRISTRIP_REVERSE 13 -#define _3DPRIM_POLYGON 14 -#define _3DPRIM_RECTLIST 15 -#define _3DPRIM_LINELOOP 16 -#define _3DPRIM_POINTLIST_BF 17 -#define _3DPRIM_LINESTRIP_CONT 18 -#define _3DPRIM_LINESTRIP_BF 19 -#define _3DPRIM_LINESTRIP_CONT_BF 20 -#define _3DPRIM_TRIFAN_NOSTIPPLE 22 -#define _3DPRIM_PATCHLIST_1 32 -#define _3DPRIM_PATCHLIST_2 33 -#define _3DPRIM_PATCHLIST_3 34 -#define _3DPRIM_PATCHLIST_4 35 -#define _3DPRIM_PATCHLIST_5 36 -#define _3DPRIM_PATCHLIST_6 37 -#define _3DPRIM_PATCHLIST_7 38 -#define _3DPRIM_PATCHLIST_8 39 -#define _3DPRIM_PATCHLIST_9 40 -#define _3DPRIM_PATCHLIST_10 41 -#define _3DPRIM_PATCHLIST_11 42 -#define _3DPRIM_PATCHLIST_12 43 -#define _3DPRIM_PATCHLIST_13 44 -#define _3DPRIM_PATCHLIST_14 45 -#define _3DPRIM_PATCHLIST_15 46 -#define _3DPRIM_PATCHLIST_16 47 -#define _3DPRIM_PATCHLIST_17 48 -#define _3DPRIM_PATCHLIST_18 49 -#define _3DPRIM_PATCHLIST_19 50 -#define _3DPRIM_PATCHLIST_20 51 -#define _3DPRIM_PATCHLIST_21 52 -#define _3DPRIM_PATCHLIST_22 53 -#define _3DPRIM_PATCHLIST_23 54 -#define _3DPRIM_PATCHLIST_24 55 -#define _3DPRIM_PATCHLIST_25 56 -#define _3DPRIM_PATCHLIST_26 57 -#define _3DPRIM_PATCHLIST_27 58 -#define _3DPRIM_PATCHLIST_28 59 -#define _3DPRIM_PATCHLIST_29 60 -#define _3DPRIM_PATCHLIST_30 61 -#define _3DPRIM_PATCHLIST_31 62 -#define _3DPRIM_PATCHLIST_32 63 - -/* enum GEN75_3D_Vertex_Component_Control */ -#define VFCOMP_NOSTORE 0 -#define VFCOMP_STORE_SRC 1 -#define VFCOMP_STORE_0 2 -#define VFCOMP_STORE_1_FP 3 -#define VFCOMP_STORE_1_INT 4 -#define VFCOMP_STORE_VID 5 -#define VFCOMP_STORE_IID 6 -#define VFCOMP_STORE_PID 7 - -/* enum GEN75_3D_Compare_Function */ -#define COMPAREFUNCTION_ALWAYS 0 -#define COMPAREFUNCTION_NEVER 1 -#define COMPAREFUNCTION_LESS 2 -#define COMPAREFUNCTION_EQUAL 3 -#define COMPAREFUNCTION_LEQUAL 4 -#define COMPAREFUNCTION_GREATER 5 -#define COMPAREFUNCTION_NOTEQUAL 6 -#define COMPAREFUNCTION_GEQUAL 7 - -/* enum GEN75_SURFACE_FORMAT */ -#define SF_R32G32B32A32_FLOAT 0 -#define SF_R32G32B32A32_SINT 1 -#define SF_R32G32B32A32_UINT 2 -#define SF_R32G32B32A32_UNORM 3 -#define SF_R32G32B32A32_SNORM 4 -#define SF_R64G64_FLOAT 5 -#define SF_R32G32B32X32_FLOAT 6 -#define SF_R32G32B32A32_SSCALED 7 -#define SF_R32G32B32A32_USCALED 8 -#define SF_R32G32B32A32_SFIXED 32 -#define SF_R64G64_PASSTHRU 33 -#define SF_R32G32B32_FLOAT 64 -#define SF_R32G32B32_SINT 65 -#define SF_R32G32B32_UINT 66 -#define SF_R32G32B32_UNORM 67 -#define SF_R32G32B32_SNORM 68 -#define SF_R32G32B32_SSCALED 69 -#define SF_R32G32B32_USCALED 70 -#define SF_R32G32B32_SFIXED 80 -#define SF_R16G16B16A16_UNORM 128 -#define SF_R16G16B16A16_SNORM 129 -#define SF_R16G16B16A16_SINT 130 -#define SF_R16G16B16A16_UINT 131 -#define SF_R16G16B16A16_FLOAT 132 -#define SF_R32G32_FLOAT 133 -#define SF_R32G32_SINT 134 -#define SF_R32G32_UINT 135 -#define SF_R32_FLOAT_X8X24_TYPELESS 136 -#define SF_X32_TYPELESS_G8X24_UINT 137 -#define SF_L32A32_FLOAT 138 -#define SF_R32G32_UNORM 139 -#define SF_R32G32_SNORM 140 -#define SF_R64_FLOAT 141 -#define SF_R16G16B16X16_UNORM 142 -#define SF_R16G16B16X16_FLOAT 143 -#define SF_A32X32_FLOAT 144 -#define SF_L32X32_FLOAT 145 -#define SF_I32X32_FLOAT 146 -#define SF_R16G16B16A16_SSCALED 147 -#define SF_R16G16B16A16_USCALED 148 -#define SF_R32G32_SSCALED 149 -#define SF_R32G32_USCALED 150 -#define SF_R32G32_SFIXED 160 -#define SF_R64_PASSTHRU 161 -#define SF_B8G8R8A8_UNORM 192 -#define SF_B8G8R8A8_UNORM_SRGB 193 -#define SF_R10G10B10A2_UNORM 194 -#define SF_R10G10B10A2_UNORM_SRGB 195 -#define SF_R10G10B10A2_UINT 196 -#define SF_R10G10B10_SNORM_A2_UNORM 197 -#define SF_R8G8B8A8_UNORM 199 -#define SF_R8G8B8A8_UNORM_SRGB 200 -#define SF_R8G8B8A8_SNORM 201 -#define SF_R8G8B8A8_SINT 202 -#define SF_R8G8B8A8_UINT 203 -#define SF_R16G16_UNORM 204 -#define SF_R16G16_SNORM 205 -#define SF_R16G16_SINT 206 -#define SF_R16G16_UINT 207 -#define SF_R16G16_FLOAT 208 -#define SF_B10G10R10A2_UNORM 209 -#define SF_B10G10R10A2_UNORM_SRGB 210 -#define SF_R11G11B10_FLOAT 211 -#define SF_R32_SINT 214 -#define SF_R32_UINT 215 -#define SF_R32_FLOAT 216 -#define SF_R24_UNORM_X8_TYPELESS 217 -#define SF_X24_TYPELESS_G8_UINT 218 -#define SF_L32_UNORM 221 -#define SF_A32_UNORM 222 -#define SF_L16A16_UNORM 223 -#define SF_I24X8_UNORM 224 -#define SF_L24X8_UNORM 225 -#define SF_A24X8_UNORM 226 -#define SF_I32_FLOAT 227 -#define SF_L32_FLOAT 228 -#define SF_A32_FLOAT 229 -#define SF_X8B8_UNORM_G8R8_SNORM 230 -#define SF_A8X8_UNORM_G8R8_SNORM 231 -#define SF_B8X8_UNORM_G8R8_SNORM 232 -#define SF_B8G8R8X8_UNORM 233 -#define SF_B8G8R8X8_UNORM_SRGB 234 -#define SF_R8G8B8X8_UNORM 235 -#define SF_R8G8B8X8_UNORM_SRGB 236 -#define SF_R9G9B9E5_SHAREDEXP 237 -#define SF_B10G10R10X2_UNORM 238 -#define SF_L16A16_FLOAT 240 -#define SF_R32_UNORM 241 -#define SF_R32_SNORM 242 -#define SF_R10G10B10X2_USCALED 243 -#define SF_R8G8B8A8_SSCALED 244 -#define SF_R8G8B8A8_USCALED 245 -#define SF_R16G16_SSCALED 246 -#define SF_R16G16_USCALED 247 -#define SF_R32_SSCALED 248 -#define SF_R32_USCALED 249 -#define SF_B5G6R5_UNORM 256 -#define SF_B5G6R5_UNORM_SRGB 257 -#define SF_B5G5R5A1_UNORM 258 -#define SF_B5G5R5A1_UNORM_SRGB 259 -#define SF_B4G4R4A4_UNORM 260 -#define SF_B4G4R4A4_UNORM_SRGB 261 -#define SF_R8G8_UNORM 262 -#define SF_R8G8_SNORM 263 -#define SF_R8G8_SINT 264 -#define SF_R8G8_UINT 265 -#define SF_R16_UNORM 266 -#define SF_R16_SNORM 267 -#define SF_R16_SINT 268 -#define SF_R16_UINT 269 -#define SF_R16_FLOAT 270 -#define SF_A8P8_UNORM_PALETTE0 271 -#define SF_A8P8_UNORM_PALETTE1 272 -#define SF_I16_UNORM 273 -#define SF_L16_UNORM 274 -#define SF_A16_UNORM 275 -#define SF_L8A8_UNORM 276 -#define SF_I16_FLOAT 277 -#define SF_L16_FLOAT 278 -#define SF_A16_FLOAT 279 -#define SF_L8A8_UNORM_SRGB 280 -#define SF_R5G5_SNORM_B6_UNORM 281 -#define SF_B5G5R5X1_UNORM 282 -#define SF_B5G5R5X1_UNORM_SRGB 283 -#define SF_R8G8_SSCALED 284 -#define SF_R8G8_USCALED 285 -#define SF_R16_SSCALED 286 -#define SF_R16_USCALED 287 -#define SF_P8A8_UNORM_PALETTE0 290 -#define SF_P8A8_UNORM_PALETTE1 291 -#define SF_A1B5G5R5_UNORM 292 -#define SF_A4B4G4R4_UNORM 293 -#define SF_L8A8_UINT 294 -#define SF_L8A8_SINT 295 -#define SF_R8_UNORM 320 -#define SF_R8_SNORM 321 -#define SF_R8_SINT 322 -#define SF_R8_UINT 323 -#define SF_A8_UNORM 324 -#define SF_I8_UNORM 325 -#define SF_L8_UNORM 326 -#define SF_P4A4_UNORM_PALETTE0 327 -#define SF_A4P4_UNORM_PALETTE0 328 -#define SF_R8_SSCALED 329 -#define SF_R8_USCALED 330 -#define SF_P8_UNORM_PALETTE0 331 -#define SF_L8_UNORM_SRGB 332 -#define SF_P8_UNORM_PALETTE1 333 -#define SF_P4A4_UNORM_PALETTE1 334 -#define SF_A4P4_UNORM_PALETTE1 335 -#define SF_Y8_UNORM 336 -#define SF_L8_UINT 338 -#define SF_L8_SINT 339 -#define SF_I8_UINT 340 -#define SF_I8_SINT 341 -#define SF_DXT1_RGB_SRGB 384 -#define SF_R1_UNORM 385 -#define SF_YCRCB_NORMAL 386 -#define SF_YCRCB_SWAPUVY 387 -#define SF_P2_UNORM_PALETTE0 388 -#define SF_P2_UNORM_PALETTE1 389 -#define SF_BC1_UNORM 390 -#define SF_BC2_UNORM 391 -#define SF_BC3_UNORM 392 -#define SF_BC4_UNORM 393 -#define SF_BC5_UNORM 394 -#define SF_BC1_UNORM_SRGB 395 -#define SF_BC2_UNORM_SRGB 396 -#define SF_BC3_UNORM_SRGB 397 -#define SF_MONO8 398 -#define SF_YCRCB_SWAPUV 399 -#define SF_YCRCB_SWAPY 400 -#define SF_DXT1_RGB 401 -#define SF_FXT1 402 -#define SF_R8G8B8_UNORM 403 -#define SF_R8G8B8_SNORM 404 -#define SF_R8G8B8_SSCALED 405 -#define SF_R8G8B8_USCALED 406 -#define SF_R64G64B64A64_FLOAT 407 -#define SF_R64G64B64_FLOAT 408 -#define SF_BC4_SNORM 409 -#define SF_BC5_SNORM 410 -#define SF_R16G16B16_FLOAT 411 -#define SF_R16G16B16_UNORM 412 -#define SF_R16G16B16_SNORM 413 -#define SF_R16G16B16_SSCALED 414 -#define SF_R16G16B16_USCALED 415 -#define SF_BC6H_SF16 417 -#define SF_BC7_UNORM 418 -#define SF_BC7_UNORM_SRGB 419 -#define SF_BC6H_UF16 420 -#define SF_PLANAR_420_8 421 -#define SF_R8G8B8_UNORM_SRGB 424 -#define SF_ETC1_RGB8 425 -#define SF_ETC2_RGB8 426 -#define SF_EAC_R11 427 -#define SF_EAC_RG11 428 -#define SF_EAC_SIGNED_R11 429 -#define SF_EAC_SIGNED_RG11 430 -#define SF_ETC2_SRGB8 431 -#define SF_R16G16B16_UINT 432 -#define SF_R16G16B16_SINT 433 -#define SF_R32_SFIXED 434 -#define SF_R10G10B10A2_SNORM 435 -#define SF_R10G10B10A2_USCALED 436 -#define SF_R10G10B10A2_SSCALED 437 -#define SF_R10G10B10A2_SINT 438 -#define SF_B10G10R10A2_SNORM 439 -#define SF_B10G10R10A2_USCALED 440 -#define SF_B10G10R10A2_SSCALED 441 -#define SF_B10G10R10A2_UINT 442 -#define SF_B10G10R10A2_SINT 443 -#define SF_R64G64B64A64_PASSTHRU 444 -#define SF_R64G64B64_PASSTHRU 445 -#define SF_ETC2_RGB8_PTA 448 -#define SF_ETC2_SRGB8_PTA 449 -#define SF_ETC2_EAC_RGBA8 450 -#define SF_ETC2_EAC_SRGB8_A8 451 -#define SF_R8G8B8_UINT 456 -#define SF_R8G8B8_SINT 457 -#define SF_RAW 511 - -/* enum GEN75_TextureCoordinateMode */ -#define TCM_WRAP 0 -#define TCM_MIRROR 1 -#define TCM_CLAMP 2 -#define TCM_CUBE 3 -#define TCM_CLAMP_BORDER 4 -#define TCM_MIRROR_ONCE 5 - #define GEN75_3DPRIMITIVE_length 7 #define GEN75_3DPRIMITIVE_length_bias 2 #define GEN75_3DPRIMITIVE_header \ @@ -1524,7 +1582,7 @@ uint32_t VertexAccessType; #define SEQUENTIAL 0 #define RANDOM 1 - uint32_t PrimitiveTopologyType; + enum GEN75_3D_Prim_Topo_Type PrimitiveTopologyType; uint32_t VertexCountPerInstance; uint32_t StartVertexLocation; uint32_t InstanceCount; @@ -2491,6 +2549,7 @@ #define SURFTYPE_CUBEmustbezero 0 uint32_t MinimumArrayElement; struct GEN75_MEMORY_OBJECT_CONTROL_STATE DepthBufferObjectControlState; + uint32_t DepthBufferMOCS; int32_t DepthCoordinateOffsetY; int32_t DepthCoordinateOffsetX; uint32_t RenderTargetViewExtent; @@ -2530,7 +2589,8 @@ dw[4] = __gen_uint(values->Depth, 21, 31) | __gen_uint(values->MinimumArrayElement, 10, 20) | - __gen_uint(v4_0, 0, 3); + __gen_uint(v4_0, 0, 3) | + __gen_uint(values->DepthBufferMOCS, 0, 3); dw[5] = __gen_sint(values->DepthCoordinateOffsetY, 16, 31) | @@ -2672,7 +2732,7 @@ bool StatisticsEnable; bool ComputeWCoordinateEnable; bool DSCacheDisable; - bool DSFunctionEnable; + bool FunctionEnable; }; static inline void @@ -2716,7 +2776,7 @@ __gen_uint(values->StatisticsEnable, 10, 10) | __gen_uint(values->ComputeWCoordinateEnable, 2, 2) | __gen_uint(values->DSCacheDisable, 1, 1) | - __gen_uint(values->DSFunctionEnable, 0, 0); + __gen_uint(values->FunctionEnable, 0, 0); } #define GEN75_3DSTATE_GATHER_CONSTANT_DS_length_bias 2 @@ -2990,8 +3050,8 @@ uint32_t _3DCommandSubOpcode; uint32_t DWordLength; uint64_t KernelStartPointer; - uint32_t SingleProgramFlowSPF; - uint32_t VectorMaskEnableVME; + bool SingleProgramFlow; + bool VectorMaskEnable; uint32_t SamplerCount; #define NoSamplers 0 #define _14Samplers 1 @@ -3004,7 +3064,7 @@ #define HighPriority 1 uint32_t FloatingPointMode; #define IEEE754 0 -#define alternate 1 +#define Alternate 1 bool IllegalOpcodeExceptionEnable; uint32_t GSaccessesUAV; bool MaskStackExceptionEnable; @@ -3012,11 +3072,11 @@ __gen_address_type ScratchSpaceBasePointer; uint32_t PerThreadScratchSpace; uint32_t OutputVertexSize; - uint32_t OutputTopology; + enum GEN75_3D_Prim_Topo_Type OutputTopology; uint32_t VertexURBEntryReadLength; - uint32_t IncludeVertexHandles; + bool IncludeVertexHandles; uint32_t VertexURBEntryReadOffset; - uint32_t DispatchGRFStartRegisterforURBData; + uint32_t DispatchGRFStartRegisterForURBData; uint32_t MaximumNumberofThreads; uint32_t ControlDataHeaderSize; uint32_t InstanceControl; @@ -3025,15 +3085,15 @@ #define DISPATCH_MODE_SINGLE 0 #define DISPATCH_MODE_DUAL_INSTANCE 1 #define DISPATCH_MODE_DUAL_OBJECT 2 - uint32_t GSStatisticsEnable; + uint32_t StatisticsEnable; uint32_t GSInvocationsIncrementValue; - uint32_t IncludePrimitiveID; + bool IncludePrimitiveID; uint32_t Hint; uint32_t ReorderMode; -#define REORDER_LEADING 0 -#define REORDER_TRAILING 1 +#define LEADING 0 +#define TRAILING 1 bool DiscardAdjacency; - bool GSEnable; + bool FunctionEnable; uint32_t ControlDataFormat; #define GSCTL_CUT 0 #define GSCTL_SID 1 @@ -3057,8 +3117,8 @@ __gen_offset(values->KernelStartPointer, 6, 31); dw[2] = - __gen_uint(values->SingleProgramFlowSPF, 31, 31) | - __gen_uint(values->VectorMaskEnableVME, 30, 30) | + __gen_uint(values->SingleProgramFlow, 31, 31) | + __gen_uint(values->VectorMaskEnable, 30, 30) | __gen_uint(values->SamplerCount, 27, 29) | __gen_uint(values->BindingTableEntryCount, 18, 25) | __gen_uint(values->ThreadPriority, 17, 17) | @@ -3078,7 +3138,7 @@ __gen_uint(values->VertexURBEntryReadLength, 11, 16) | __gen_uint(values->IncludeVertexHandles, 10, 10) | __gen_uint(values->VertexURBEntryReadOffset, 4, 9) | - __gen_uint(values->DispatchGRFStartRegisterforURBData, 0, 3); + __gen_uint(values->DispatchGRFStartRegisterForURBData, 0, 3); dw[5] = __gen_uint(values->MaximumNumberofThreads, 24, 31) | @@ -3086,13 +3146,13 @@ __gen_uint(values->InstanceControl, 15, 19) | __gen_uint(values->DefaultStreamID, 13, 14) | __gen_uint(values->DispatchMode, 11, 12) | - __gen_uint(values->GSStatisticsEnable, 10, 10) | + __gen_uint(values->StatisticsEnable, 10, 10) | __gen_uint(values->GSInvocationsIncrementValue, 5, 9) | __gen_uint(values->IncludePrimitiveID, 4, 4) | __gen_uint(values->Hint, 3, 3) | __gen_uint(values->ReorderMode, 2, 2) | __gen_uint(values->DiscardAdjacency, 1, 1) | - __gen_uint(values->GSEnable, 0, 0); + __gen_uint(values->FunctionEnable, 0, 0); dw[6] = __gen_uint(values->ControlDataFormat, 31, 31) | @@ -3115,6 +3175,7 @@ uint32_t _3DCommandSubOpcode; uint32_t DWordLength; struct GEN75_MEMORY_OBJECT_CONTROL_STATE HierarchicalDepthBufferObjectControlState; + uint32_t HierarchicalDepthBufferMOCS; uint32_t SurfacePitch; __gen_address_type SurfaceBaseAddress; }; @@ -3137,6 +3198,7 @@ dw[1] = __gen_uint(v1_0, 25, 28) | + __gen_uint(values->HierarchicalDepthBufferMOCS, 25, 28) | __gen_uint(values->SurfacePitch, 0, 16); dw[2] = __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, 0); @@ -3168,20 +3230,20 @@ #define High 1 uint32_t FloatingPointMode; #define IEEE754 0 -#define alternate 1 +#define Alternate 1 bool IllegalOpcodeExceptionEnable; bool SoftwareExceptionEnable; uint32_t MaximumNumberofThreads; - bool Enable; + bool FunctionEnable; bool StatisticsEnable; uint32_t InstanceCount; uint64_t KernelStartPointer; __gen_address_type ScratchSpaceBasePointer; uint32_t PerThreadScratchSpace; - uint32_t SingleProgramFlow; + bool SingleProgramFlow; bool VectorMaskEnable; bool HSaccessesUAV; - uint32_t IncludeVertexHandles; + bool IncludeVertexHandles; uint32_t DispatchGRFStartRegisterForURBData; uint32_t VertexURBEntryReadLength; uint32_t VertexURBEntryReadOffset; @@ -3211,7 +3273,7 @@ __gen_uint(values->MaximumNumberofThreads, 0, 7); dw[2] = - __gen_uint(values->Enable, 31, 31) | + __gen_uint(values->FunctionEnable, 31, 31) | __gen_uint(values->StatisticsEnable, 29, 29) | __gen_uint(values->InstanceCount, 0, 3); @@ -3627,8 +3689,8 @@ uint32_t _3DCommandSubOpcode; uint32_t DWordLength; uint64_t KernelStartPointer0; - uint32_t SingleProgramFlowSPF; - uint32_t VectorMaskEnableVME; + bool SingleProgramFlow; + bool VectorMaskEnable; uint32_t SamplerCount; uint32_t DenormalMode; #define FTZ 0 @@ -3637,8 +3699,8 @@ uint32_t ThreadPriority; #define High 1 uint32_t FloatingPointMode; -#define IEEE745 0 -#define Alt 1 +#define IEEE754 0 +#define Alternate 1 uint32_t RoundingMode; #define RTNE 0 #define RU 1 @@ -3665,9 +3727,9 @@ bool _32PixelDispatchEnable; bool _16PixelDispatchEnable; bool _8PixelDispatchEnable; - uint32_t DispatchGRFStartRegisterforConstantSetupData0; - uint32_t DispatchGRFStartRegisterforConstantSetupData1; - uint32_t DispatchGRFStartRegisterforConstantSetupData2; + uint32_t DispatchGRFStartRegisterForConstantSetupData0; + uint32_t DispatchGRFStartRegisterForConstantSetupData1; + uint32_t DispatchGRFStartRegisterForConstantSetupData2; uint64_t KernelStartPointer1; uint64_t KernelStartPointer2; }; @@ -3689,8 +3751,8 @@ __gen_offset(values->KernelStartPointer0, 6, 31); dw[2] = - __gen_uint(values->SingleProgramFlowSPF, 31, 31) | - __gen_uint(values->VectorMaskEnableVME, 30, 30) | + __gen_uint(values->SingleProgramFlow, 31, 31) | + __gen_uint(values->VectorMaskEnable, 30, 30) | __gen_uint(values->SamplerCount, 27, 29) | __gen_uint(values->DenormalMode, 26, 26) | __gen_uint(values->BindingTableEntryCount, 18, 25) | @@ -3721,9 +3783,9 @@ __gen_uint(values->_8PixelDispatchEnable, 0, 0); dw[5] = - __gen_uint(values->DispatchGRFStartRegisterforConstantSetupData0, 16, 22) | - __gen_uint(values->DispatchGRFStartRegisterforConstantSetupData1, 8, 14) | - __gen_uint(values->DispatchGRFStartRegisterforConstantSetupData2, 0, 6); + __gen_uint(values->DispatchGRFStartRegisterForConstantSetupData0, 16, 22) | + __gen_uint(values->DispatchGRFStartRegisterForConstantSetupData1, 8, 14) | + __gen_uint(values->DispatchGRFStartRegisterForConstantSetupData2, 0, 6); dw[6] = __gen_offset(values->KernelStartPointer1, 6, 31); @@ -4541,7 +4603,7 @@ #define FILL_MODE_SOLID 0 #define FILL_MODE_WIREFRAME 1 #define FILL_MODE_POINT 2 - bool ViewTransformEnable; + bool ViewportTransformEnable; uint32_t FrontWinding; bool AntiAliasingEnable; uint32_t CullMode; @@ -4551,6 +4613,10 @@ #define CULLMODE_BACK 3 float LineWidth; uint32_t LineEndCapAntialiasingRegionWidth; +#define _05pixels 0 +#define _10pixels 1 +#define _20pixels 2 +#define _40pixels 3 bool LineStippleEnable; bool ScissorRectangleEnable; bool RTIndependentRasterizationEnable; @@ -4568,7 +4634,9 @@ uint32_t AALineDistanceMode; #define AALINEDISTANCE_TRUE 1 uint32_t VertexSubPixelPrecisionSelect; - uint32_t UsePointWidthState; + uint32_t PointWidthSource; +#define Vertex 0 +#define State 1 float PointWidth; float GlobalDepthOffsetConstant; float GlobalDepthOffsetScale; @@ -4597,7 +4665,7 @@ __gen_uint(values->GlobalDepthOffsetEnablePoint, 7, 7) | __gen_uint(values->FrontFaceFillMode, 5, 6) | __gen_uint(values->BackFaceFillMode, 3, 4) | - __gen_uint(values->ViewTransformEnable, 1, 1) | + __gen_uint(values->ViewportTransformEnable, 1, 1) | __gen_uint(values->FrontWinding, 0, 0); dw[2] = @@ -4617,7 +4685,7 @@ __gen_uint(values->TriangleFanProvokingVertexSelect, 25, 26) | __gen_uint(values->AALineDistanceMode, 14, 14) | __gen_uint(values->VertexSubPixelPrecisionSelect, 12, 12) | - __gen_uint(values->UsePointWidthState, 11, 11) | + __gen_uint(values->PointWidthSource, 11, 11) | __gen_ufixed(values->PointWidth, 0, 10, 3); dw[4] = @@ -4743,8 +4811,9 @@ uint32_t _3DCommandOpcode; uint32_t _3DCommandSubOpcode; uint32_t DWordLength; - uint32_t StencilBufferEnable; + bool StencilBufferEnable; struct GEN75_MEMORY_OBJECT_CONTROL_STATE StencilBufferObjectControlState; + uint32_t StencilBufferMOCS; uint32_t SurfacePitch; __gen_address_type SurfaceBaseAddress; }; @@ -4768,6 +4837,7 @@ dw[1] = __gen_uint(values->StencilBufferEnable, 31, 31) | __gen_uint(v1_0, 25, 28) | + __gen_uint(values->StencilBufferMOCS, 25, 28) | __gen_uint(values->SurfacePitch, 0, 16); dw[2] = __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, 0); @@ -4788,17 +4858,17 @@ uint32_t _3DCommandOpcode; uint32_t _3DCommandSubOpcode; uint32_t DWordLength; - uint32_t SOFunctionEnable; - uint32_t RenderingDisable; + bool SOFunctionEnable; + bool RenderingDisable; uint32_t RenderStreamSelect; uint32_t ReorderMode; #define LEADING 0 #define TRAILING 1 bool SOStatisticsEnable; - uint32_t SOBufferEnable3; - uint32_t SOBufferEnable2; - uint32_t SOBufferEnable1; - uint32_t SOBufferEnable0; + bool SOBufferEnable3; + bool SOBufferEnable2; + bool SOBufferEnable1; + bool SOBufferEnable0; uint32_t Stream3VertexReadOffset; uint32_t Stream3VertexReadLength; uint32_t Stream2VertexReadOffset; @@ -5279,7 +5349,7 @@ uint32_t DWordLength; uint64_t KernelStartPointer; bool SingleVertexDispatch; - uint32_t VectorMaskEnableVME; + bool VectorMaskEnable; uint32_t SamplerCount; #define NoSamplers 0 #define _14Samplers 1 @@ -5298,13 +5368,13 @@ bool SoftwareExceptionEnable; __gen_address_type ScratchSpaceBasePointer; uint32_t PerThreadScratchSpace; - uint32_t DispatchGRFStartRegisterforURBData; + uint32_t DispatchGRFStartRegisterForURBData; uint32_t VertexURBEntryReadLength; uint32_t VertexURBEntryReadOffset; uint32_t MaximumNumberofThreads; bool StatisticsEnable; bool VertexCacheDisable; - bool VSFunctionEnable; + bool FunctionEnable; }; static inline void @@ -5325,7 +5395,7 @@ dw[2] = __gen_uint(values->SingleVertexDispatch, 31, 31) | - __gen_uint(values->VectorMaskEnableVME, 30, 30) | + __gen_uint(values->VectorMaskEnable, 30, 30) | __gen_uint(values->SamplerCount, 27, 29) | __gen_uint(values->BindingTableEntryCount, 18, 25) | __gen_uint(values->ThreadPriority, 17, 17) | @@ -5339,7 +5409,7 @@ dw[3] = __gen_combine_address(data, &dw[3], values->ScratchSpaceBasePointer, v3); dw[4] = - __gen_uint(values->DispatchGRFStartRegisterforURBData, 20, 24) | + __gen_uint(values->DispatchGRFStartRegisterForURBData, 20, 24) | __gen_uint(values->VertexURBEntryReadLength, 11, 16) | __gen_uint(values->VertexURBEntryReadOffset, 4, 9); @@ -5347,7 +5417,7 @@ __gen_uint(values->MaximumNumberofThreads, 23, 31) | __gen_uint(values->StatisticsEnable, 10, 10) | __gen_uint(values->VertexCacheDisable, 1, 1) | - __gen_uint(values->VSFunctionEnable, 0, 0); + __gen_uint(values->FunctionEnable, 0, 0); } #define GEN75_3DSTATE_WM_length 3 @@ -5371,7 +5441,7 @@ bool DepthBufferResolveEnable; bool HierarchicalDepthBufferResolveEnable; bool LegacyDiamondLineRasterization; - bool PixelShaderKillPixel; + bool PixelShaderKillsPixel; uint32_t PixelShaderComputedDepthMode; #define PSCDEPTH_OFF 0 #define PSCDEPTH_ON 1 @@ -5388,9 +5458,19 @@ #define INTERP_CENTROID 2 #define INTERP_SAMPLE 3 uint32_t BarycentricInterpolationMode; +#define BIM_PERSPECTIVE_PIXEL 1 +#define BIM_PERSPECTIVE_CENTROID 2 +#define BIM_PERSPECTIVE_SAMPLE 4 +#define BIM_LINEAR_PIXEL 8 +#define BIM_LINEAR_CENTROID 16 +#define BIM_LINEAR_SAMPLE 32 bool PixelShaderUsesInputCoverageMask; uint32_t LineEndCapAntialiasingRegionWidth; uint32_t LineAntialiasingRegionWidth; +#define _05pixels 0 +#define _10pixels 1 +#define _20pixels 2 +#define _40pixels 3 bool RTIndependentRasterizationEnable; bool PolygonStippleEnable; bool LineStippleEnable; @@ -5430,7 +5510,7 @@ __gen_uint(values->DepthBufferResolveEnable, 28, 28) | __gen_uint(values->HierarchicalDepthBufferResolveEnable, 27, 27) | __gen_uint(values->LegacyDiamondLineRasterization, 26, 26) | - __gen_uint(values->PixelShaderKillPixel, 25, 25) | + __gen_uint(values->PixelShaderKillsPixel, 25, 25) | __gen_uint(values->PixelShaderComputedDepthMode, 23, 24) | __gen_uint(values->EarlyDepthStencilControl, 21, 22) | __gen_uint(values->PixelShaderUsesSourceDepth, 20, 20) | @@ -6293,9 +6373,7 @@ struct GEN75_MI_CLFLUSH { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t UseGlobalGTT; -#define PerProcessGraphicsAddress 0 -#define GlobalGraphicsAddress 1 + bool UseGlobalGTT; uint32_t DWordLength; __gen_address_type PageBaseAddress; uint32_t StartingCachelineOffset; @@ -6327,14 +6405,13 @@ #define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_header\ .CommandType = 0, \ .MICommandOpcode = 54, \ - .UseGlobalGTT = 0, \ .CompareSemaphore = 0, \ .DWordLength = 0 struct GEN75_MI_CONDITIONAL_BATCH_BUFFER_END { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t UseGlobalGTT; + bool UseGlobalGTT; uint32_t CompareSemaphore; uint32_t DWordLength; uint32_t CompareDataDword; @@ -6441,7 +6518,7 @@ struct GEN75_MI_LOAD_REGISTER_MEM { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t UseGlobalGTT; + bool UseGlobalGTT; bool AsyncModeEnable; uint32_t DWordLength; uint64_t RegisterAddress; @@ -6735,7 +6812,7 @@ uint32_t DWordLength; __gen_address_type MemoryAddress; uint32_t CoreModeEnable; - uint32_t UseGlobalGTT; + bool UseGlobalGTT; uint32_t ReportID; }; @@ -6963,9 +7040,9 @@ struct GEN75_MI_STORE_DATA_IMM { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t UseGlobalGTT; + bool UseGlobalGTT; uint32_t DWordLength; - uint32_t Address; + __gen_address_type Address; uint32_t CoreModeEnable; uint32_t DataDWord0; uint32_t DataDWord1; @@ -6985,9 +7062,9 @@ dw[1] = 0; - dw[2] = - __gen_uint(values->Address, 2, 31) | + const uint32_t v2 = __gen_uint(values->CoreModeEnable, 0, 0); + dw[2] = __gen_combine_address(data, &dw[2], values->Address, v2); dw[3] = __gen_uint(values->DataDWord0, 0, 31); @@ -7037,7 +7114,7 @@ struct GEN75_MI_STORE_REGISTER_MEM { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t UseGlobalGTT; + bool UseGlobalGTT; bool PredicateEnable; uint32_t DWordLength; uint64_t RegisterAddress; @@ -7128,7 +7205,7 @@ struct GEN75_MI_TOPOLOGY_FILTER { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t TopologyFilterValue; + enum GEN75_3D_Prim_Topo_Type TopologyFilterValue; }; static inline void @@ -7333,10 +7410,8 @@ #define MMIOWriteImmediateData 1 uint32_t StoreDataIndex; bool CommandStreamerStallEnable; - uint32_t GlobalSnapshotCountReset; -#define DontReset 0 -#define Reset 1 - uint32_t TLBInvalidate; + bool GlobalSnapshotCountReset; + bool TLBInvalidate; bool GenericMediaStateClear; uint32_t PostSyncOperation; #define NoWrite 0 @@ -7727,6 +7802,7 @@ #define GEN75_CHICKEN3_length 1 struct GEN75_CHICKEN3 { uint32_t L3AtomicDisable; + uint32_t L3AtomicDisableMask; }; static inline void @@ -7736,6 +7812,72 @@ uint32_t * restrict dw = (uint32_t * restrict) dst; dw[0] = - __gen_uint(values->L3AtomicDisable, 6, 6); + __gen_uint(values->L3AtomicDisable, 6, 6) | + __gen_uint(values->L3AtomicDisableMask, 22, 22); +} + +#define GEN75_SO_WRITE_OFFSET0_num 0x5280 +#define GEN75_SO_WRITE_OFFSET0_length 1 +struct GEN75_SO_WRITE_OFFSET0 { + uint64_t WriteOffset; +}; + +static inline void +GEN75_SO_WRITE_OFFSET0_pack(__gen_user_data *data, void * restrict dst, + const struct GEN75_SO_WRITE_OFFSET0 * restrict values) +{ + uint32_t * restrict dw = (uint32_t * restrict) dst; + + dw[0] = + __gen_offset(values->WriteOffset, 2, 31); +} + +#define GEN75_SO_WRITE_OFFSET1_num 0x5284 +#define GEN75_SO_WRITE_OFFSET1_length 1 +struct GEN75_SO_WRITE_OFFSET1 { + uint64_t WriteOffset; +}; + +static inline void +GEN75_SO_WRITE_OFFSET1_pack(__gen_user_data *data, void * restrict dst, + const struct GEN75_SO_WRITE_OFFSET1 * restrict values) +{ + uint32_t * restrict dw = (uint32_t * restrict) dst; + + dw[0] = + __gen_offset(values->WriteOffset, 2, 31); +} + +#define GEN75_SO_WRITE_OFFSET2_num 0x5288 +#define GEN75_SO_WRITE_OFFSET2_length 1 +struct GEN75_SO_WRITE_OFFSET2 { + uint64_t WriteOffset; +}; + +static inline void +GEN75_SO_WRITE_OFFSET2_pack(__gen_user_data *data, void * restrict dst, + const struct GEN75_SO_WRITE_OFFSET2 * restrict values) +{ + uint32_t * restrict dw = (uint32_t * restrict) dst; + + dw[0] = + __gen_offset(values->WriteOffset, 2, 31); +} + +#define GEN75_SO_WRITE_OFFSET3_num 0x528c +#define GEN75_SO_WRITE_OFFSET3_length 1 +struct GEN75_SO_WRITE_OFFSET3 { + uint64_t WriteOffset; +}; + +static inline void +GEN75_SO_WRITE_OFFSET3_pack(__gen_user_data *data, void * restrict dst, + const struct GEN75_SO_WRITE_OFFSET3 * restrict values) +{ + uint32_t * restrict dw = (uint32_t * restrict) dst; + + dw[0] = + __gen_offset(values->WriteOffset, 2, 31); } +#endif /* GEN75_PACK_H */ diff -Nru mesa-12.0.6/src/intel/genxml/gen75.xml mesa-17.0.7/src/intel/genxml/gen75.xml --- mesa-12.0.6/src/intel/genxml/gen75.xml 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/genxml/gen75.xml 2017-06-01 10:37:10.000000000 +0000 @@ -1,525 +1,4 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - @@ -587,6 +66,47 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -598,6 +118,25 @@ + + + + + + + + + + + + + + + + + + + @@ -822,14 +361,455 @@ - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -845,7 +825,7 @@ - + @@ -1177,6 +1157,7 @@ + @@ -1247,7 +1228,7 @@ - + @@ -1347,8 +1328,8 @@ - - + + @@ -1363,7 +1344,7 @@ - + @@ -1372,11 +1353,11 @@ - + - + - + @@ -1386,16 +1367,16 @@ - + - + - - + + - + @@ -1410,6 +1391,7 @@ + @@ -1433,21 +1415,21 @@ - + - + - + - + @@ -1556,8 +1538,8 @@ - - + + @@ -1568,8 +1550,8 @@ - - + + @@ -1599,9 +1581,9 @@ - - - + + + @@ -1857,7 +1839,7 @@ - + @@ -1867,7 +1849,12 @@ - + + + + + + @@ -1888,7 +1875,10 @@ - + + + + @@ -1933,8 +1923,9 @@ - + + @@ -1945,18 +1936,18 @@ - - + + - - - - + + + + @@ -2108,7 +2099,7 @@ - + @@ -2130,13 +2121,13 @@ - + - + @@ -2151,7 +2142,7 @@ - + @@ -2170,10 +2161,22 @@ - + + + + + + + + - + + + + + + @@ -2486,10 +2489,7 @@ - - - - + @@ -2502,7 +2502,7 @@ - + @@ -2540,7 +2540,7 @@ - + @@ -2638,7 +2638,7 @@ - + @@ -2705,9 +2705,9 @@ - + - + @@ -2725,7 +2725,7 @@ - + @@ -2749,7 +2749,7 @@ - + @@ -2823,11 +2823,8 @@ - - - - - + + @@ -2945,6 +2942,23 @@ + + + + + + + + + + + + + + + + + diff -Nru mesa-12.0.6/src/intel/genxml/gen75_xml.h mesa-17.0.7/src/intel/genxml/gen75_xml.h --- mesa-12.0.6/src/intel/genxml/gen75_xml.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/genxml/gen75_xml.h 2017-06-01 10:38:02.000000000 +0000 @@ -0,0 +1,14207 @@ +static const uint8_t gen75_xml[] = { + 0x3c, 0x67, 0x65, 0x6e, 0x78, 0x6d, 0x6c, 0x20, 0x6e, 0x61, 0x6d, 0x65, + 0x3d, 0x22, 0x48, 0x53, 0x57, 0x22, 0x20, 0x67, 0x65, 0x6e, 0x3d, 0x22, + 0x37, 0x2e, 0x35, 0x22, 0x3e, 0x0a, 0x20, 0x20, 0x3c, 0x65, 0x6e, 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mesa-12.0.6/src/intel/genxml/gen7_pack.h mesa-17.0.7/src/intel/genxml/gen7_pack.h --- mesa-12.0.6/src/intel/genxml/gen7_pack.h 2017-01-24 01:43:18.000000000 +0000 +++ mesa-17.0.7/src/intel/genxml/gen7_pack.h 2017-06-01 10:38:02.000000000 +0000 @@ -27,7 +27,8 @@ * This file has been generated, do not hand edit. */ -#pragma once +#ifndef GEN7_PACK_H +#define GEN7_PACK_H #include #include @@ -157,6 +158,377 @@ #endif +enum GEN7_3D_Prim_Topo_Type { + _3DPRIM_POINTLIST = 1, + _3DPRIM_LINELIST = 2, + _3DPRIM_LINESTRIP = 3, + _3DPRIM_TRILIST = 4, + _3DPRIM_TRISTRIP = 5, + _3DPRIM_TRIFAN = 6, + _3DPRIM_QUADLIST = 7, + _3DPRIM_QUADSTRIP = 8, + _3DPRIM_LINELIST_ADJ = 9, + _3DPRIM_LINESTRIP_ADJ = 10, + _3DPRIM_TRILIST_ADJ = 11, + _3DPRIM_TRISTRIP_ADJ = 12, + _3DPRIM_TRISTRIP_REVERSE = 13, + _3DPRIM_POLYGON = 14, + _3DPRIM_RECTLIST = 15, + _3DPRIM_LINELOOP = 16, + _3DPRIM_POINTLIST_BF = 17, + _3DPRIM_LINESTRIP_CONT = 18, + _3DPRIM_LINESTRIP_BF = 19, + _3DPRIM_LINESTRIP_CONT_BF = 20, + _3DPRIM_TRIFAN_NOSTIPPLE = 22, + _3DPRIM_PATCHLIST_1 = 32, + _3DPRIM_PATCHLIST_2 = 33, + _3DPRIM_PATCHLIST_3 = 34, + _3DPRIM_PATCHLIST_4 = 35, + _3DPRIM_PATCHLIST_5 = 36, + _3DPRIM_PATCHLIST_6 = 37, + _3DPRIM_PATCHLIST_7 = 38, + _3DPRIM_PATCHLIST_8 = 39, + _3DPRIM_PATCHLIST_9 = 40, + _3DPRIM_PATCHLIST_10 = 41, + _3DPRIM_PATCHLIST_11 = 42, + _3DPRIM_PATCHLIST_12 = 43, + _3DPRIM_PATCHLIST_13 = 44, + _3DPRIM_PATCHLIST_14 = 45, + _3DPRIM_PATCHLIST_15 = 46, + _3DPRIM_PATCHLIST_16 = 47, + _3DPRIM_PATCHLIST_17 = 48, + _3DPRIM_PATCHLIST_18 = 49, + _3DPRIM_PATCHLIST_19 = 50, + _3DPRIM_PATCHLIST_20 = 51, + _3DPRIM_PATCHLIST_21 = 52, + _3DPRIM_PATCHLIST_22 = 53, + _3DPRIM_PATCHLIST_23 = 54, + _3DPRIM_PATCHLIST_24 = 55, + _3DPRIM_PATCHLIST_25 = 56, + _3DPRIM_PATCHLIST_26 = 57, + _3DPRIM_PATCHLIST_27 = 58, + _3DPRIM_PATCHLIST_28 = 59, + _3DPRIM_PATCHLIST_29 = 60, + _3DPRIM_PATCHLIST_30 = 61, + _3DPRIM_PATCHLIST_31 = 62, + _3DPRIM_PATCHLIST_32 = 63, +}; + +enum GEN7_3D_Vertex_Component_Control { + VFCOMP_NOSTORE = 0, + VFCOMP_STORE_SRC = 1, + VFCOMP_STORE_0 = 2, + VFCOMP_STORE_1_FP = 3, + VFCOMP_STORE_1_INT = 4, + VFCOMP_STORE_VID = 5, + VFCOMP_STORE_IID = 6, + VFCOMP_STORE_PID = 7, +}; + +enum GEN7_3D_Stencil_Operation { + STENCILOP_KEEP = 0, + STENCILOP_ZERO = 1, + STENCILOP_REPLACE = 2, + STENCILOP_INCRSAT = 3, + STENCILOP_DECRSAT = 4, + STENCILOP_INCR = 5, + STENCILOP_DECR = 6, + STENCILOP_INVERT = 7, +}; + +enum GEN7_3D_Color_Buffer_Blend_Factor { + BLENDFACTOR_ONE = 1, + BLENDFACTOR_SRC_COLOR = 2, + BLENDFACTOR_SRC_ALPHA = 3, + BLENDFACTOR_DST_ALPHA = 4, + BLENDFACTOR_DST_COLOR = 5, + BLENDFACTOR_SRC_ALPHA_SATURATE = 6, + BLENDFACTOR_CONST_COLOR = 7, + BLENDFACTOR_CONST_ALPHA = 8, + BLENDFACTOR_SRC1_COLOR = 9, + BLENDFACTOR_SRC1_ALPHA = 10, + BLENDFACTOR_ZERO = 17, + BLENDFACTOR_INV_SRC_COLOR = 18, + BLENDFACTOR_INV_SRC_ALPHA = 19, + BLENDFACTOR_INV_DST_ALPHA = 20, + BLENDFACTOR_INV_DST_COLOR = 21, + BLENDFACTOR_INV_CONST_COLOR = 23, + BLENDFACTOR_INV_CONST_ALPHA = 24, + BLENDFACTOR_INV_SRC1_COLOR = 25, + BLENDFACTOR_INV_SRC1_ALPHA = 26, +}; + +enum GEN7_3D_Color_Buffer_Blend_Function { + BLENDFUNCTION_ADD = 0, + BLENDFUNCTION_SUBTRACT = 1, + BLENDFUNCTION_REVERSE_SUBTRACT = 2, + BLENDFUNCTION_MIN = 3, + BLENDFUNCTION_MAX = 4, +}; + +enum GEN7_3D_Compare_Function { + COMPAREFUNCTION_ALWAYS = 0, + COMPAREFUNCTION_NEVER = 1, + COMPAREFUNCTION_LESS = 2, + COMPAREFUNCTION_EQUAL = 3, + COMPAREFUNCTION_LEQUAL = 4, + COMPAREFUNCTION_GREATER = 5, + COMPAREFUNCTION_NOTEQUAL = 6, + COMPAREFUNCTION_GEQUAL = 7, +}; + +enum GEN7_3D_Logic_Op_Function { + LOGICOP_CLEAR = 0, + LOGICOP_NOR = 1, + LOGICOP_AND_INVERTED = 2, + LOGICOP_COPY_INVERTED = 3, + LOGICOP_AND_REVERSE = 4, + LOGICOP_INVERT = 5, + LOGICOP_XOR = 6, + LOGICOP_NAND = 7, + LOGICOP_AND = 8, + LOGICOP_EQUIV = 9, + LOGICOP_NOOP = 10, + LOGICOP_OR_INVERTED = 11, + LOGICOP_COPY = 12, + LOGICOP_OR_REVERSE = 13, + LOGICOP_OR = 14, + LOGICOP_SET = 15, +}; + +enum GEN7_SURFACE_FORMAT { + SF_R32G32B32A32_FLOAT = 0, + SF_R32G32B32A32_SINT = 1, + SF_R32G32B32A32_UINT = 2, + SF_R32G32B32A32_UNORM = 3, + SF_R32G32B32A32_SNORM = 4, + SF_R64G64_FLOAT = 5, + SF_R32G32B32X32_FLOAT = 6, + SF_R32G32B32A32_SSCALED = 7, + SF_R32G32B32A32_USCALED = 8, + SF_R32G32B32A32_SFIXED = 32, + SF_R64G64_PASSTHRU = 33, + SF_R32G32B32_FLOAT = 64, + SF_R32G32B32_SINT = 65, + SF_R32G32B32_UINT = 66, + SF_R32G32B32_UNORM = 67, + SF_R32G32B32_SNORM = 68, + SF_R32G32B32_SSCALED = 69, + SF_R32G32B32_USCALED = 70, + SF_R32G32B32_SFIXED = 80, + SF_R16G16B16A16_UNORM = 128, + SF_R16G16B16A16_SNORM = 129, + SF_R16G16B16A16_SINT = 130, + SF_R16G16B16A16_UINT = 131, + SF_R16G16B16A16_FLOAT = 132, + SF_R32G32_FLOAT = 133, + SF_R32G32_SINT = 134, + SF_R32G32_UINT = 135, + SF_R32_FLOAT_X8X24_TYPELESS = 136, + SF_X32_TYPELESS_G8X24_UINT = 137, + SF_L32A32_FLOAT = 138, + SF_R32G32_UNORM = 139, + SF_R32G32_SNORM = 140, + SF_R64_FLOAT = 141, + SF_R16G16B16X16_UNORM = 142, + SF_R16G16B16X16_FLOAT = 143, + SF_A32X32_FLOAT = 144, + SF_L32X32_FLOAT = 145, + SF_I32X32_FLOAT = 146, + SF_R16G16B16A16_SSCALED = 147, + SF_R16G16B16A16_USCALED = 148, + SF_R32G32_SSCALED = 149, + SF_R32G32_USCALED = 150, + SF_R32G32_SFIXED = 160, + SF_R64_PASSTHRU = 161, + SF_B8G8R8A8_UNORM = 192, + SF_B8G8R8A8_UNORM_SRGB = 193, + SF_R10G10B10A2_UNORM = 194, + SF_R10G10B10A2_UNORM_SRGB = 195, + SF_R10G10B10A2_UINT = 196, + SF_R10G10B10_SNORM_A2_UNORM = 197, + SF_R8G8B8A8_UNORM = 199, + SF_R8G8B8A8_UNORM_SRGB = 200, + SF_R8G8B8A8_SNORM = 201, + SF_R8G8B8A8_SINT = 202, + SF_R8G8B8A8_UINT = 203, + SF_R16G16_UNORM = 204, + SF_R16G16_SNORM = 205, + SF_R16G16_SINT = 206, + SF_R16G16_UINT = 207, + SF_R16G16_FLOAT = 208, + SF_B10G10R10A2_UNORM = 209, + SF_B10G10R10A2_UNORM_SRGB = 210, + SF_R11G11B10_FLOAT = 211, + SF_R32_SINT = 214, + SF_R32_UINT = 215, + SF_R32_FLOAT = 216, + SF_R24_UNORM_X8_TYPELESS = 217, + SF_X24_TYPELESS_G8_UINT = 218, + SF_L32_UNORM = 221, + SF_A32_UNORM = 222, + SF_L16A16_UNORM = 223, + SF_I24X8_UNORM = 224, + SF_L24X8_UNORM = 225, + SF_A24X8_UNORM = 226, + SF_I32_FLOAT = 227, + SF_L32_FLOAT = 228, + SF_A32_FLOAT = 229, + SF_X8B8_UNORM_G8R8_SNORM = 230, + SF_A8X8_UNORM_G8R8_SNORM = 231, + SF_B8X8_UNORM_G8R8_SNORM = 232, + SF_B8G8R8X8_UNORM = 233, + SF_B8G8R8X8_UNORM_SRGB = 234, + SF_R8G8B8X8_UNORM = 235, + SF_R8G8B8X8_UNORM_SRGB = 236, + SF_R9G9B9E5_SHAREDEXP = 237, + SF_B10G10R10X2_UNORM = 238, + SF_L16A16_FLOAT = 240, + SF_R32_UNORM = 241, + SF_R32_SNORM = 242, + SF_R10G10B10X2_USCALED = 243, + SF_R8G8B8A8_SSCALED = 244, + SF_R8G8B8A8_USCALED = 245, + SF_R16G16_SSCALED = 246, + SF_R16G16_USCALED = 247, + SF_R32_SSCALED = 248, + SF_R32_USCALED = 249, + SF_B5G6R5_UNORM = 256, + SF_B5G6R5_UNORM_SRGB = 257, + SF_B5G5R5A1_UNORM = 258, + SF_B5G5R5A1_UNORM_SRGB = 259, + SF_B4G4R4A4_UNORM = 260, + SF_B4G4R4A4_UNORM_SRGB = 261, + SF_R8G8_UNORM = 262, + SF_R8G8_SNORM = 263, + SF_R8G8_SINT = 264, + SF_R8G8_UINT = 265, + SF_R16_UNORM = 266, + SF_R16_SNORM = 267, + SF_R16_SINT = 268, + SF_R16_UINT = 269, + SF_R16_FLOAT = 270, + SF_A8P8_UNORM_PALETTE0 = 271, + SF_A8P8_UNORM_PALETTE1 = 272, + SF_I16_UNORM = 273, + SF_L16_UNORM = 274, + SF_A16_UNORM = 275, + SF_L8A8_UNORM = 276, + SF_I16_FLOAT = 277, + SF_L16_FLOAT = 278, + SF_A16_FLOAT = 279, + SF_L8A8_UNORM_SRGB = 280, + SF_R5G5_SNORM_B6_UNORM = 281, + SF_B5G5R5X1_UNORM = 282, + SF_B5G5R5X1_UNORM_SRGB = 283, + SF_R8G8_SSCALED = 284, + SF_R8G8_USCALED = 285, + SF_R16_SSCALED = 286, + SF_R16_USCALED = 287, + SF_P8A8_UNORM_PALETTE0 = 290, + SF_P8A8_UNORM_PALETTE1 = 291, + SF_A1B5G5R5_UNORM = 292, + SF_A4B4G4R4_UNORM = 293, + SF_L8A8_UINT = 294, + SF_L8A8_SINT = 295, + SF_R8_UNORM = 320, + SF_R8_SNORM = 321, + SF_R8_SINT = 322, + SF_R8_UINT = 323, + SF_A8_UNORM = 324, + SF_I8_UNORM = 325, + SF_L8_UNORM = 326, + SF_P4A4_UNORM_PALETTE0 = 327, + SF_A4P4_UNORM_PALETTE0 = 328, + SF_R8_SSCALED = 329, + SF_R8_USCALED = 330, + SF_P8_UNORM_PALETTE0 = 331, + SF_L8_UNORM_SRGB = 332, + SF_P8_UNORM_PALETTE1 = 333, + SF_P4A4_UNORM_PALETTE1 = 334, + SF_A4P4_UNORM_PALETTE1 = 335, + SF_Y8_UNORM = 336, + SF_L8_UINT = 338, + SF_L8_SINT = 339, + SF_I8_UINT = 340, + SF_I8_SINT = 341, + SF_DXT1_RGB_SRGB = 384, + SF_R1_UNORM = 385, + SF_YCRCB_NORMAL = 386, + SF_YCRCB_SWAPUVY = 387, + SF_P2_UNORM_PALETTE0 = 388, + SF_P2_UNORM_PALETTE1 = 389, + SF_BC1_UNORM = 390, + SF_BC2_UNORM = 391, + SF_BC3_UNORM = 392, + SF_BC4_UNORM = 393, + SF_BC5_UNORM = 394, + SF_BC1_UNORM_SRGB = 395, + SF_BC2_UNORM_SRGB = 396, + SF_BC3_UNORM_SRGB = 397, + SF_MONO8 = 398, + SF_YCRCB_SWAPUV = 399, + SF_YCRCB_SWAPY = 400, + SF_DXT1_RGB = 401, + SF_FXT1 = 402, + SF_R8G8B8_UNORM = 403, + SF_R8G8B8_SNORM = 404, + SF_R8G8B8_SSCALED = 405, + SF_R8G8B8_USCALED = 406, + SF_R64G64B64A64_FLOAT = 407, + SF_R64G64B64_FLOAT = 408, + SF_BC4_SNORM = 409, + SF_BC5_SNORM = 410, + SF_R16G16B16_FLOAT = 411, + SF_R16G16B16_UNORM = 412, + SF_R16G16B16_SNORM = 413, + SF_R16G16B16_SSCALED = 414, + SF_R16G16B16_USCALED = 415, + SF_BC6H_SF16 = 417, + SF_BC7_UNORM = 418, + SF_BC7_UNORM_SRGB = 419, + SF_BC6H_UF16 = 420, + SF_PLANAR_420_8 = 421, + SF_R8G8B8_UNORM_SRGB = 424, + SF_ETC1_RGB8 = 425, + SF_ETC2_RGB8 = 426, + SF_EAC_R11 = 427, + SF_EAC_RG11 = 428, + SF_EAC_SIGNED_R11 = 429, + SF_EAC_SIGNED_RG11 = 430, + SF_ETC2_SRGB8 = 431, + SF_R16G16B16_UINT = 432, + SF_R16G16B16_SINT = 433, + SF_R32_SFIXED = 434, + SF_R10G10B10A2_SNORM = 435, + SF_R10G10B10A2_USCALED = 436, + SF_R10G10B10A2_SSCALED = 437, + SF_R10G10B10A2_SINT = 438, + SF_B10G10R10A2_SNORM = 439, + SF_B10G10R10A2_USCALED = 440, + SF_B10G10R10A2_SSCALED = 441, + SF_B10G10R10A2_UINT = 442, + SF_B10G10R10A2_SINT = 443, + SF_R64G64B64A64_PASSTHRU = 444, + SF_R64G64B64_PASSTHRU = 445, + SF_ETC2_RGB8_PTA = 448, + SF_ETC2_SRGB8_PTA = 449, + SF_ETC2_EAC_RGBA8 = 450, + SF_ETC2_EAC_SRGB8_A8 = 451, + SF_R8G8B8_UINT = 456, + SF_R8G8B8_SINT = 457, + SF_RAW = 511, +}; + +enum GEN7_TextureCoordinateMode { + TCM_WRAP = 0, + TCM_MIRROR = 1, + TCM_CLAMP = 2, + TCM_CUBE = 3, + TCM_CLAMP_BORDER = 4, + TCM_MIRROR_ONCE = 5, +}; + #define GEN7_MEMORY_OBJECT_CONTROL_STATE_length 1 struct GEN7_MEMORY_OBJECT_CONTROL_STATE { uint32_t GraphicsDataTypeGFDT; @@ -224,9 +596,10 @@ #define VERTEXDATA 0 #define INSTANCEDATA 1 struct GEN7_MEMORY_OBJECT_CONTROL_STATE VertexBufferMemoryObjectControlState; - uint32_t AddressModifyEnable; + uint32_t VertexBufferMOCS; + bool AddressModifyEnable; bool NullVertexBuffer; - uint32_t VertexFetchInvalidate; + bool VertexFetchInvalidate; uint32_t BufferPitch; __gen_address_type BufferStartingAddress; __gen_address_type EndAddress; @@ -246,6 +619,7 @@ __gen_uint(values->VertexBufferIndex, 26, 31) | __gen_uint(values->BufferAccessType, 20, 20) | __gen_uint(v0_0, 16, 19) | + __gen_uint(values->VertexBufferMOCS, 16, 19) | __gen_uint(values->AddressModifyEnable, 14, 14) | __gen_uint(values->NullVertexBuffer, 13, 13) | __gen_uint(values->VertexFetchInvalidate, 12, 12) | @@ -262,14 +636,14 @@ #define GEN7_VERTEX_ELEMENT_STATE_length 2 struct GEN7_VERTEX_ELEMENT_STATE { uint32_t VertexBufferIndex; - uint32_t Valid; - uint32_t SourceElementFormat; + bool Valid; + enum GEN7_SURFACE_FORMAT SourceElementFormat; bool EdgeFlagEnable; uint32_t SourceElementOffset; - uint32_t Component0Control; - uint32_t Component1Control; - uint32_t Component2Control; - uint32_t Component3Control; + enum GEN7_3D_Vertex_Component_Control Component0Control; + enum GEN7_3D_Vertex_Component_Control Component1Control; + enum GEN7_3D_Vertex_Component_Control Component2Control; + enum GEN7_3D_Vertex_Component_Control Component3Control; }; static inline void @@ -475,41 +849,12 @@ struct GEN7_BLEND_STATE_ENTRY { bool ColorBufferBlendEnable; bool IndependentAlphaBlendEnable; - uint32_t AlphaBlendFunction; -#define BLENDFUNCTION_ADD 0 -#define BLENDFUNCTION_SUBTRACT 1 -#define BLENDFUNCTION_REVERSE_SUBTRACT 2 -#define BLENDFUNCTION_MIN 3 -#define BLENDFUNCTION_MAX 4 - uint32_t SourceAlphaBlendFactor; -#define BLENDFACTOR_ONE 1 -#define BLENDFACTOR_SRC_COLOR 2 -#define BLENDFACTOR_SRC_ALPHA 3 -#define BLENDFACTOR_DST_ALPHA 4 -#define BLENDFACTOR_DST_COLOR 5 -#define BLENDFACTOR_SRC_ALPHA_SATURATE 6 -#define BLENDFACTOR_CONST_COLOR 7 -#define BLENDFACTOR_CONST_ALPHA 8 -#define BLENDFACTOR_SRC1_COLOR 9 -#define BLENDFACTOR_SRC1_ALPHA 10 -#define BLENDFACTOR_ZERO 17 -#define BLENDFACTOR_INV_SRC_COLOR 18 -#define BLENDFACTOR_INV_SRC_ALPHA 19 -#define BLENDFACTOR_INV_DST_ALPHA 20 -#define BLENDFACTOR_INV_DST_COLOR 21 -#define BLENDFACTOR_INV_CONST_COLOR 23 -#define BLENDFACTOR_INV_CONST_ALPHA 24 -#define BLENDFACTOR_INV_SRC1_COLOR 25 -#define BLENDFACTOR_INV_SRC1_ALPHA 26 - uint32_t DestinationAlphaBlendFactor; - uint32_t ColorBlendFunction; -#define BLENDFUNCTION_ADD 0 -#define BLENDFUNCTION_SUBTRACT 1 -#define BLENDFUNCTION_REVERSE_SUBTRACT 2 -#define BLENDFUNCTION_MIN 3 -#define BLENDFUNCTION_MAX 4 - uint32_t SourceBlendFactor; - uint32_t DestinationBlendFactor; + enum GEN7_3D_Color_Buffer_Blend_Function AlphaBlendFunction; + enum GEN7_3D_Color_Buffer_Blend_Factor SourceAlphaBlendFactor; + enum GEN7_3D_Color_Buffer_Blend_Factor DestinationAlphaBlendFactor; + enum GEN7_3D_Color_Buffer_Blend_Function ColorBlendFunction; + enum GEN7_3D_Color_Buffer_Blend_Factor SourceBlendFactor; + enum GEN7_3D_Color_Buffer_Blend_Factor DestinationBlendFactor; bool AlphaToCoverageEnable; bool AlphaToOneEnable; bool AlphaToCoverageDitherEnable; @@ -518,33 +863,9 @@ bool WriteDisableGreen; bool WriteDisableBlue; bool LogicOpEnable; - uint32_t LogicOpFunction; -#define LOGICOP_CLEAR 0 -#define LOGICOP_NOR 1 -#define LOGICOP_AND_INVERTED 2 -#define LOGICOP_COPY_INVERTED 3 -#define LOGICOP_AND_REVERSE 4 -#define LOGICOP_INVERT 5 -#define LOGICOP_XOR 6 -#define LOGICOP_NAND 7 -#define LOGICOP_AND 8 -#define LOGICOP_EQUIV 9 -#define LOGICOP_NOOP 10 -#define LOGICOP_OR_INVERTED 11 -#define LOGICOP_COPY 12 -#define LOGICOP_OR_REVERSE 13 -#define LOGICOP_OR 14 -#define LOGICOP_SET 15 + enum GEN7_3D_Logic_Op_Function LogicOpFunction; bool AlphaTestEnable; - uint32_t AlphaTestFunction; -#define COMPAREFUNCTION_ALWAYS 0 -#define COMPAREFUNCTION_NEVER 1 -#define COMPAREFUNCTION_LESS 2 -#define COMPAREFUNCTION_EQUAL 3 -#define COMPAREFUNCTION_LEQUAL 4 -#define COMPAREFUNCTION_GREATER 5 -#define COMPAREFUNCTION_NOTEQUAL 6 -#define COMPAREFUNCTION_GEQUAL 7 + enum GEN7_3D_Compare_Function AlphaTestFunction; bool ColorDitherEnable; uint32_t XDitherOffset; uint32_t YDitherOffset; @@ -687,62 +1008,22 @@ #define GEN7_DEPTH_STENCIL_STATE_length 3 struct GEN7_DEPTH_STENCIL_STATE { bool StencilTestEnable; - uint32_t StencilTestFunction; -#define COMPAREFUNCTION_ALWAYS 0 -#define COMPAREFUNCTION_NEVER 1 -#define COMPAREFUNCTION_LESS 2 -#define COMPAREFUNCTION_EQUAL 3 -#define COMPAREFUNCTION_LEQUAL 4 -#define COMPAREFUNCTION_GREATER 5 -#define COMPAREFUNCTION_NOTEQUAL 6 -#define COMPAREFUNCTION_GEQUAL 7 - uint32_t StencilFailOp; -#define STENCILOP_KEEP 0 -#define STENCILOP_ZERO 1 -#define STENCILOP_REPLACE 2 -#define STENCILOP_INCRSAT 3 -#define STENCILOP_DECRSAT 4 -#define STENCILOP_INCR 5 -#define STENCILOP_DECR 6 -#define STENCILOP_INVERT 7 - uint32_t StencilPassDepthFailOp; - uint32_t StencilPassDepthPassOp; + enum GEN7_3D_Compare_Function StencilTestFunction; + enum GEN7_3D_Stencil_Operation StencilFailOp; + enum GEN7_3D_Stencil_Operation StencilPassDepthFailOp; + enum GEN7_3D_Stencil_Operation StencilPassDepthPassOp; bool StencilBufferWriteEnable; bool DoubleSidedStencilEnable; - uint32_t BackfaceStencilTestFunction; -#define COMPAREFUNCTION_ALWAYS 0 -#define COMPAREFUNCTION_NEVER 1 -#define COMPAREFUNCTION_LESS 2 -#define COMPAREFUNCTION_EQUAL 3 -#define COMPAREFUNCTION_LEQUAL 4 -#define COMPAREFUNCTION_GREATER 5 -#define COMPAREFUNCTION_NOTEQUAL 6 -#define COMPAREFUNCTION_GEQUAL 7 - uint32_t BackfaceStencilFailOp; -#define STENCILOP_KEEP 0 -#define STENCILOP_ZERO 1 -#define STENCILOP_REPLACE 2 -#define STENCILOP_INCRSAT 3 -#define STENCILOP_DECRSAT 4 -#define STENCILOP_INCR 5 -#define STENCILOP_DECR 6 -#define STENCILOP_INVERT 7 - uint32_t BackfaceStencilPassDepthFailOp; - uint32_t BackfaceStencilPassDepthPassOp; + enum GEN7_3D_Compare_Function BackfaceStencilTestFunction; + enum GEN7_3D_Stencil_Operation BackfaceStencilFailOp; + enum GEN7_3D_Stencil_Operation BackfaceStencilPassDepthFailOp; + enum GEN7_3D_Stencil_Operation BackfaceStencilPassDepthPassOp; uint32_t StencilTestMask; uint32_t StencilWriteMask; uint32_t BackfaceStencilTestMask; uint32_t BackfaceStencilWriteMask; bool DepthTestEnable; - uint32_t DepthTestFunction; -#define COMPAREFUNCTION_ALWAYS 0 -#define COMPAREFUNCTION_NEVER 1 -#define COMPAREFUNCTION_LESS 2 -#define COMPAREFUNCTION_EQUAL 3 -#define COMPAREFUNCTION_LEQUAL 4 -#define COMPAREFUNCTION_GREATER 5 -#define COMPAREFUNCTION_NOTEQUAL 6 -#define COMPAREFUNCTION_GEQUAL 7 + enum GEN7_3D_Compare_Function DepthTestFunction; bool DepthBufferWriteEnable; }; @@ -780,7 +1061,7 @@ #define GEN7_INTERFACE_DESCRIPTOR_DATA_length 8 struct GEN7_INTERFACE_DESCRIPTOR_DATA { uint64_t KernelStartPointer; - uint32_t SingleProgramFlow; + bool SingleProgramFlow; uint32_t ThreadPriority; #define NormalPriority 0 #define HighPriority 1 @@ -898,14 +1179,14 @@ #define SURFTYPE_STRBUF 5 #define SURFTYPE_NULL 7 bool SurfaceArray; - uint32_t SurfaceFormat; + enum GEN7_SURFACE_FORMAT SurfaceFormat; uint32_t SurfaceVerticalAlignment; #define VALIGN_2 0 #define VALIGN_4 1 uint32_t SurfaceHorizontalAlignment; #define HALIGN_4 0 #define HALIGN_8 1 - uint32_t TiledSurface; + bool TiledSurface; uint32_t TileWalk; #define TILEWALK_XMAJOR 0 #define TILEWALK_YMAJOR 1 @@ -940,8 +1221,8 @@ #define MULTISAMPLECOUNT_8 3 uint32_t MultisamplePositionPaletteIndex; uint32_t StrbufMinimumArrayElement; - uint64_t XOffset; - uint64_t YOffset; + uint32_t XOffset; + uint32_t YOffset; struct GEN7_MEMORY_OBJECT_CONTROL_STATE SurfaceObjectControlState; uint32_t MOCS; uint32_t SurfaceMinLOD; @@ -1013,8 +1294,8 @@ GEN7_MEMORY_OBJECT_CONTROL_STATE_pack(data, &v5_0, &values->SurfaceObjectControlState); dw[5] = - __gen_offset(values->XOffset, 25, 31) | - __gen_offset(values->YOffset, 20, 23) | + __gen_uint(values->XOffset, 25, 31) | + __gen_uint(values->YOffset, 20, 23) | __gen_uint(v5_0, 16, 19) | __gen_uint(values->MOCS, 16, 19) | __gen_uint(values->SurfaceMinLOD, 4, 7) | @@ -1037,6 +1318,41 @@ __gen_ufixed(values->ResourceMinLOD, 0, 11, 8); } +#define GEN7_SAMPLER_BORDER_COLOR_STATE_length 4 +struct GEN7_SAMPLER_BORDER_COLOR_STATE { + uint32_t BorderColorUnormRed; + uint32_t BorderColorUnormGreen; + uint32_t BorderColorUnormBlue; + uint32_t BorderColorUnormAlpha; + float BorderColorFloatRed; + float BorderColorFloatGreen; + float BorderColorFloatBlue; + float BorderColorFloatAlpha; +}; + +static inline void +GEN7_SAMPLER_BORDER_COLOR_STATE_pack(__gen_user_data *data, void * restrict dst, + const struct GEN7_SAMPLER_BORDER_COLOR_STATE * restrict values) +{ + uint32_t * restrict dw = (uint32_t * restrict) dst; + + dw[0] = + __gen_uint(values->BorderColorUnormRed, 0, 7) | + __gen_uint(values->BorderColorUnormGreen, 8, 15) | + __gen_uint(values->BorderColorUnormBlue, 16, 23) | + __gen_uint(values->BorderColorUnormAlpha, 24, 31) | + __gen_float(values->BorderColorFloatRed); + + dw[1] = + __gen_float(values->BorderColorFloatGreen); + + dw[2] = + __gen_float(values->BorderColorFloatBlue); + + dw[3] = + __gen_float(values->BorderColorFloatAlpha); +} + #define GEN7_SAMPLER_STATE_length 4 struct GEN7_SAMPLER_STATE { bool SamplerDisable; @@ -1153,312 +1469,6 @@ __gen_uint(values->TCZAddressControlMode, 0, 2); } -/* enum GEN7_3D_Prim_Topo_Type */ -#define _3DPRIM_POINTLIST 1 -#define _3DPRIM_LINELIST 2 -#define _3DPRIM_LINESTRIP 3 -#define _3DPRIM_TRILIST 4 -#define _3DPRIM_TRISTRIP 5 -#define _3DPRIM_TRIFAN 6 -#define _3DPRIM_QUADLIST 7 -#define _3DPRIM_QUADSTRIP 8 -#define _3DPRIM_LINELIST_ADJ 9 -#define _3DPRIM_LINESTRIP_ADJ 10 -#define _3DPRIM_TRILIST_ADJ 11 -#define _3DPRIM_TRISTRIP_ADJ 12 -#define _3DPRIM_TRISTRIP_REVERSE 13 -#define _3DPRIM_POLYGON 14 -#define _3DPRIM_RECTLIST 15 -#define _3DPRIM_LINELOOP 16 -#define _3DPRIM_POINTLIST_BF 17 -#define _3DPRIM_LINESTRIP_CONT 18 -#define _3DPRIM_LINESTRIP_BF 19 -#define _3DPRIM_LINESTRIP_CONT_BF 20 -#define _3DPRIM_TRIFAN_NOSTIPPLE 22 -#define _3DPRIM_PATCHLIST_1 32 -#define _3DPRIM_PATCHLIST_2 33 -#define _3DPRIM_PATCHLIST_3 34 -#define _3DPRIM_PATCHLIST_4 35 -#define _3DPRIM_PATCHLIST_5 36 -#define _3DPRIM_PATCHLIST_6 37 -#define _3DPRIM_PATCHLIST_7 38 -#define _3DPRIM_PATCHLIST_8 39 -#define _3DPRIM_PATCHLIST_9 40 -#define _3DPRIM_PATCHLIST_10 41 -#define _3DPRIM_PATCHLIST_11 42 -#define _3DPRIM_PATCHLIST_12 43 -#define _3DPRIM_PATCHLIST_13 44 -#define _3DPRIM_PATCHLIST_14 45 -#define _3DPRIM_PATCHLIST_15 46 -#define _3DPRIM_PATCHLIST_16 47 -#define _3DPRIM_PATCHLIST_17 48 -#define _3DPRIM_PATCHLIST_18 49 -#define _3DPRIM_PATCHLIST_19 50 -#define _3DPRIM_PATCHLIST_20 51 -#define _3DPRIM_PATCHLIST_21 52 -#define _3DPRIM_PATCHLIST_22 53 -#define _3DPRIM_PATCHLIST_23 54 -#define _3DPRIM_PATCHLIST_24 55 -#define _3DPRIM_PATCHLIST_25 56 -#define _3DPRIM_PATCHLIST_26 57 -#define _3DPRIM_PATCHLIST_27 58 -#define _3DPRIM_PATCHLIST_28 59 -#define _3DPRIM_PATCHLIST_29 60 -#define _3DPRIM_PATCHLIST_30 61 -#define _3DPRIM_PATCHLIST_31 62 -#define _3DPRIM_PATCHLIST_32 63 - -/* enum GEN7_3D_Vertex_Component_Control */ -#define VFCOMP_NOSTORE 0 -#define VFCOMP_STORE_SRC 1 -#define VFCOMP_STORE_0 2 -#define VFCOMP_STORE_1_FP 3 -#define VFCOMP_STORE_1_INT 4 -#define VFCOMP_STORE_VID 5 -#define VFCOMP_STORE_IID 6 -#define VFCOMP_STORE_PID 7 - -/* enum GEN7_3D_Compare_Function */ -#define COMPAREFUNCTION_ALWAYS 0 -#define COMPAREFUNCTION_NEVER 1 -#define COMPAREFUNCTION_LESS 2 -#define COMPAREFUNCTION_EQUAL 3 -#define COMPAREFUNCTION_LEQUAL 4 -#define COMPAREFUNCTION_GREATER 5 -#define COMPAREFUNCTION_NOTEQUAL 6 -#define COMPAREFUNCTION_GEQUAL 7 - -/* enum GEN7_SURFACE_FORMAT */ -#define SF_R32G32B32A32_FLOAT 0 -#define SF_R32G32B32A32_SINT 1 -#define SF_R32G32B32A32_UINT 2 -#define SF_R32G32B32A32_UNORM 3 -#define SF_R32G32B32A32_SNORM 4 -#define SF_R64G64_FLOAT 5 -#define SF_R32G32B32X32_FLOAT 6 -#define SF_R32G32B32A32_SSCALED 7 -#define SF_R32G32B32A32_USCALED 8 -#define SF_R32G32B32A32_SFIXED 32 -#define SF_R64G64_PASSTHRU 33 -#define SF_R32G32B32_FLOAT 64 -#define SF_R32G32B32_SINT 65 -#define SF_R32G32B32_UINT 66 -#define SF_R32G32B32_UNORM 67 -#define SF_R32G32B32_SNORM 68 -#define SF_R32G32B32_SSCALED 69 -#define SF_R32G32B32_USCALED 70 -#define SF_R32G32B32_SFIXED 80 -#define SF_R16G16B16A16_UNORM 128 -#define SF_R16G16B16A16_SNORM 129 -#define SF_R16G16B16A16_SINT 130 -#define SF_R16G16B16A16_UINT 131 -#define SF_R16G16B16A16_FLOAT 132 -#define SF_R32G32_FLOAT 133 -#define SF_R32G32_SINT 134 -#define SF_R32G32_UINT 135 -#define SF_R32_FLOAT_X8X24_TYPELESS 136 -#define SF_X32_TYPELESS_G8X24_UINT 137 -#define SF_L32A32_FLOAT 138 -#define SF_R32G32_UNORM 139 -#define SF_R32G32_SNORM 140 -#define SF_R64_FLOAT 141 -#define SF_R16G16B16X16_UNORM 142 -#define SF_R16G16B16X16_FLOAT 143 -#define SF_A32X32_FLOAT 144 -#define SF_L32X32_FLOAT 145 -#define SF_I32X32_FLOAT 146 -#define SF_R16G16B16A16_SSCALED 147 -#define SF_R16G16B16A16_USCALED 148 -#define SF_R32G32_SSCALED 149 -#define SF_R32G32_USCALED 150 -#define SF_R32G32_SFIXED 160 -#define SF_R64_PASSTHRU 161 -#define SF_B8G8R8A8_UNORM 192 -#define SF_B8G8R8A8_UNORM_SRGB 193 -#define SF_R10G10B10A2_UNORM 194 -#define SF_R10G10B10A2_UNORM_SRGB 195 -#define SF_R10G10B10A2_UINT 196 -#define SF_R10G10B10_SNORM_A2_UNORM 197 -#define SF_R8G8B8A8_UNORM 199 -#define SF_R8G8B8A8_UNORM_SRGB 200 -#define SF_R8G8B8A8_SNORM 201 -#define SF_R8G8B8A8_SINT 202 -#define SF_R8G8B8A8_UINT 203 -#define SF_R16G16_UNORM 204 -#define SF_R16G16_SNORM 205 -#define SF_R16G16_SINT 206 -#define SF_R16G16_UINT 207 -#define SF_R16G16_FLOAT 208 -#define SF_B10G10R10A2_UNORM 209 -#define SF_B10G10R10A2_UNORM_SRGB 210 -#define SF_R11G11B10_FLOAT 211 -#define SF_R32_SINT 214 -#define SF_R32_UINT 215 -#define SF_R32_FLOAT 216 -#define SF_R24_UNORM_X8_TYPELESS 217 -#define SF_X24_TYPELESS_G8_UINT 218 -#define SF_L32_UNORM 221 -#define SF_A32_UNORM 222 -#define SF_L16A16_UNORM 223 -#define SF_I24X8_UNORM 224 -#define SF_L24X8_UNORM 225 -#define SF_A24X8_UNORM 226 -#define SF_I32_FLOAT 227 -#define SF_L32_FLOAT 228 -#define SF_A32_FLOAT 229 -#define SF_X8B8_UNORM_G8R8_SNORM 230 -#define SF_A8X8_UNORM_G8R8_SNORM 231 -#define SF_B8X8_UNORM_G8R8_SNORM 232 -#define SF_B8G8R8X8_UNORM 233 -#define SF_B8G8R8X8_UNORM_SRGB 234 -#define SF_R8G8B8X8_UNORM 235 -#define SF_R8G8B8X8_UNORM_SRGB 236 -#define SF_R9G9B9E5_SHAREDEXP 237 -#define SF_B10G10R10X2_UNORM 238 -#define SF_L16A16_FLOAT 240 -#define SF_R32_UNORM 241 -#define SF_R32_SNORM 242 -#define SF_R10G10B10X2_USCALED 243 -#define SF_R8G8B8A8_SSCALED 244 -#define SF_R8G8B8A8_USCALED 245 -#define SF_R16G16_SSCALED 246 -#define SF_R16G16_USCALED 247 -#define SF_R32_SSCALED 248 -#define SF_R32_USCALED 249 -#define SF_B5G6R5_UNORM 256 -#define SF_B5G6R5_UNORM_SRGB 257 -#define SF_B5G5R5A1_UNORM 258 -#define SF_B5G5R5A1_UNORM_SRGB 259 -#define SF_B4G4R4A4_UNORM 260 -#define SF_B4G4R4A4_UNORM_SRGB 261 -#define SF_R8G8_UNORM 262 -#define SF_R8G8_SNORM 263 -#define SF_R8G8_SINT 264 -#define SF_R8G8_UINT 265 -#define SF_R16_UNORM 266 -#define SF_R16_SNORM 267 -#define SF_R16_SINT 268 -#define SF_R16_UINT 269 -#define SF_R16_FLOAT 270 -#define SF_A8P8_UNORM_PALETTE0 271 -#define SF_A8P8_UNORM_PALETTE1 272 -#define SF_I16_UNORM 273 -#define SF_L16_UNORM 274 -#define SF_A16_UNORM 275 -#define SF_L8A8_UNORM 276 -#define SF_I16_FLOAT 277 -#define SF_L16_FLOAT 278 -#define SF_A16_FLOAT 279 -#define SF_L8A8_UNORM_SRGB 280 -#define SF_R5G5_SNORM_B6_UNORM 281 -#define SF_B5G5R5X1_UNORM 282 -#define SF_B5G5R5X1_UNORM_SRGB 283 -#define SF_R8G8_SSCALED 284 -#define SF_R8G8_USCALED 285 -#define SF_R16_SSCALED 286 -#define SF_R16_USCALED 287 -#define SF_P8A8_UNORM_PALETTE0 290 -#define SF_P8A8_UNORM_PALETTE1 291 -#define SF_A1B5G5R5_UNORM 292 -#define SF_A4B4G4R4_UNORM 293 -#define SF_L8A8_UINT 294 -#define SF_L8A8_SINT 295 -#define SF_R8_UNORM 320 -#define SF_R8_SNORM 321 -#define SF_R8_SINT 322 -#define SF_R8_UINT 323 -#define SF_A8_UNORM 324 -#define SF_I8_UNORM 325 -#define SF_L8_UNORM 326 -#define SF_P4A4_UNORM_PALETTE0 327 -#define SF_A4P4_UNORM_PALETTE0 328 -#define SF_R8_SSCALED 329 -#define SF_R8_USCALED 330 -#define SF_P8_UNORM_PALETTE0 331 -#define SF_L8_UNORM_SRGB 332 -#define SF_P8_UNORM_PALETTE1 333 -#define SF_P4A4_UNORM_PALETTE1 334 -#define SF_A4P4_UNORM_PALETTE1 335 -#define SF_Y8_UNORM 336 -#define SF_L8_UINT 338 -#define SF_L8_SINT 339 -#define SF_I8_UINT 340 -#define SF_I8_SINT 341 -#define SF_DXT1_RGB_SRGB 384 -#define SF_R1_UNORM 385 -#define SF_YCRCB_NORMAL 386 -#define SF_YCRCB_SWAPUVY 387 -#define SF_P2_UNORM_PALETTE0 388 -#define SF_P2_UNORM_PALETTE1 389 -#define SF_BC1_UNORM 390 -#define SF_BC2_UNORM 391 -#define SF_BC3_UNORM 392 -#define SF_BC4_UNORM 393 -#define SF_BC5_UNORM 394 -#define SF_BC1_UNORM_SRGB 395 -#define SF_BC2_UNORM_SRGB 396 -#define SF_BC3_UNORM_SRGB 397 -#define SF_MONO8 398 -#define SF_YCRCB_SWAPUV 399 -#define SF_YCRCB_SWAPY 400 -#define SF_DXT1_RGB 401 -#define SF_FXT1 402 -#define SF_R8G8B8_UNORM 403 -#define SF_R8G8B8_SNORM 404 -#define SF_R8G8B8_SSCALED 405 -#define SF_R8G8B8_USCALED 406 -#define SF_R64G64B64A64_FLOAT 407 -#define SF_R64G64B64_FLOAT 408 -#define SF_BC4_SNORM 409 -#define SF_BC5_SNORM 410 -#define SF_R16G16B16_FLOAT 411 -#define SF_R16G16B16_UNORM 412 -#define SF_R16G16B16_SNORM 413 -#define SF_R16G16B16_SSCALED 414 -#define SF_R16G16B16_USCALED 415 -#define SF_BC6H_SF16 417 -#define SF_BC7_UNORM 418 -#define SF_BC7_UNORM_SRGB 419 -#define SF_BC6H_UF16 420 -#define SF_PLANAR_420_8 421 -#define SF_R8G8B8_UNORM_SRGB 424 -#define SF_ETC1_RGB8 425 -#define SF_ETC2_RGB8 426 -#define SF_EAC_R11 427 -#define SF_EAC_RG11 428 -#define SF_EAC_SIGNED_R11 429 -#define SF_EAC_SIGNED_RG11 430 -#define SF_ETC2_SRGB8 431 -#define SF_R16G16B16_UINT 432 -#define SF_R16G16B16_SINT 433 -#define SF_R32_SFIXED 434 -#define SF_R10G10B10A2_SNORM 435 -#define SF_R10G10B10A2_USCALED 436 -#define SF_R10G10B10A2_SSCALED 437 -#define SF_R10G10B10A2_SINT 438 -#define SF_B10G10R10A2_SNORM 439 -#define SF_B10G10R10A2_USCALED 440 -#define SF_B10G10R10A2_SSCALED 441 -#define SF_B10G10R10A2_UINT 442 -#define SF_B10G10R10A2_SINT 443 -#define SF_R64G64B64A64_PASSTHRU 444 -#define SF_R64G64B64_PASSTHRU 445 -#define SF_ETC2_RGB8_PTA 448 -#define SF_ETC2_SRGB8_PTA 449 -#define SF_ETC2_EAC_RGBA8 450 -#define SF_ETC2_EAC_SRGB8_A8 451 -#define SF_R8G8B8_UINT 456 -#define SF_R8G8B8_SINT 457 -#define SF_RAW 511 - -/* enum GEN7_TextureCoordinateMode */ -#define TCM_WRAP 0 -#define TCM_MIRROR 1 -#define TCM_CLAMP 2 -#define TCM_CUBE 3 -#define TCM_CLAMP_BORDER 4 -#define TCM_MIRROR_ONCE 5 - #define GEN7_3DPRIMITIVE_length 7 #define GEN7_3DPRIMITIVE_length_bias 2 #define GEN7_3DPRIMITIVE_header \ @@ -1480,7 +1490,7 @@ uint32_t VertexAccessType; #define SEQUENTIAL 0 #define RANDOM 1 - uint32_t PrimitiveTopologyType; + enum GEN7_3D_Prim_Topo_Type PrimitiveTopologyType; uint32_t VertexCountPerInstance; uint32_t StartVertexLocation; uint32_t InstanceCount; @@ -2201,6 +2211,7 @@ #define SURFTYPE_CUBEmustbezero 0 uint32_t MinimumArrayElement; struct GEN7_MEMORY_OBJECT_CONTROL_STATE DepthBufferObjectControlState; + uint32_t DepthBufferMOCS; int32_t DepthCoordinateOffsetY; int32_t DepthCoordinateOffsetX; uint32_t RenderTargetViewExtent; @@ -2240,7 +2251,8 @@ dw[4] = __gen_uint(values->Depth, 21, 31) | __gen_uint(values->MinimumArrayElement, 10, 20) | - __gen_uint(v4_0, 0, 3); + __gen_uint(v4_0, 0, 3) | + __gen_uint(values->DepthBufferMOCS, 0, 3); dw[5] = __gen_sint(values->DepthCoordinateOffsetY, 16, 31) | @@ -2374,7 +2386,7 @@ bool StatisticsEnable; bool ComputeWCoordinateEnable; bool DSCacheDisable; - bool DSFunctionEnable; + bool FunctionEnable; }; static inline void @@ -2416,7 +2428,7 @@ __gen_uint(values->StatisticsEnable, 10, 10) | __gen_uint(values->ComputeWCoordinateEnable, 2, 2) | __gen_uint(values->DSCacheDisable, 1, 1) | - __gen_uint(values->DSFunctionEnable, 0, 0); + __gen_uint(values->FunctionEnable, 0, 0); } #define GEN7_3DSTATE_GS_length 7 @@ -2435,8 +2447,8 @@ uint32_t _3DCommandSubOpcode; uint32_t DWordLength; uint64_t KernelStartPointer; - uint32_t SingleProgramFlowSPF; - uint32_t VectorMaskEnableVME; + bool SingleProgramFlow; + bool VectorMaskEnable; uint32_t SamplerCount; #define NoSamplers 0 #define _14Samplers 1 @@ -2456,11 +2468,11 @@ __gen_address_type ScratchSpaceBasePointer; uint32_t PerThreadScratchSpace; uint32_t OutputVertexSize; - uint32_t OutputTopology; + enum GEN7_3D_Prim_Topo_Type OutputTopology; uint32_t VertexURBEntryReadLength; - uint32_t IncludeVertexHandles; + bool IncludeVertexHandles; uint32_t VertexURBEntryReadOffset; - uint32_t DispatchGRFStartRegisterforURBData; + uint32_t DispatchGRFStartRegisterForURBData; uint32_t MaximumNumberofThreads; uint32_t ControlDataFormat; #define GSCTL_CUT 0 @@ -2472,13 +2484,13 @@ #define DISPATCH_MODE_SINGLE 0 #define DISPATCH_MODE_DUAL_INSTANCE 1 #define DISPATCH_MODE_DUAL_OBJECT 2 - uint32_t GSStatisticsEnable; + uint32_t StatisticsEnable; uint32_t GSInvocationsIncrementValue; - uint32_t IncludePrimitiveID; + bool IncludePrimitiveID; uint32_t Hint; bool ReorderEnable; bool DiscardAdjacency; - bool GSEnable; + bool FunctionEnable; uint64_t SemaphoreHandle; }; @@ -2499,8 +2511,8 @@ __gen_offset(values->KernelStartPointer, 6, 31); dw[2] = - __gen_uint(values->SingleProgramFlowSPF, 31, 31) | - __gen_uint(values->VectorMaskEnableVME, 30, 30) | + __gen_uint(values->SingleProgramFlow, 31, 31) | + __gen_uint(values->VectorMaskEnable, 30, 30) | __gen_uint(values->SamplerCount, 27, 29) | __gen_uint(values->BindingTableEntryCount, 18, 25) | __gen_uint(values->ThreadPriority, 17, 17) | @@ -2519,7 +2531,7 @@ __gen_uint(values->VertexURBEntryReadLength, 11, 16) | __gen_uint(values->IncludeVertexHandles, 10, 10) | __gen_uint(values->VertexURBEntryReadOffset, 4, 9) | - __gen_uint(values->DispatchGRFStartRegisterforURBData, 0, 3); + __gen_uint(values->DispatchGRFStartRegisterForURBData, 0, 3); dw[5] = __gen_uint(values->MaximumNumberofThreads, 25, 31) | @@ -2528,13 +2540,13 @@ __gen_uint(values->InstanceControl, 15, 19) | __gen_uint(values->DefaultStreamID, 13, 14) | __gen_uint(values->DispatchMode, 11, 12) | - __gen_uint(values->GSStatisticsEnable, 10, 10) | + __gen_uint(values->StatisticsEnable, 10, 10) | __gen_uint(values->GSInvocationsIncrementValue, 5, 9) | __gen_uint(values->IncludePrimitiveID, 4, 4) | __gen_uint(values->Hint, 3, 3) | __gen_uint(values->ReorderEnable, 2, 2) | __gen_uint(values->DiscardAdjacency, 1, 1) | - __gen_uint(values->GSEnable, 0, 0); + __gen_uint(values->FunctionEnable, 0, 0); dw[6] = __gen_offset(values->SemaphoreHandle, 0, 11); @@ -2556,6 +2568,7 @@ uint32_t _3DCommandSubOpcode; uint32_t DWordLength; struct GEN7_MEMORY_OBJECT_CONTROL_STATE HierarchicalDepthBufferObjectControlState; + uint32_t HierarchicalDepthBufferMOCS; uint32_t SurfacePitch; __gen_address_type SurfaceBaseAddress; }; @@ -2578,6 +2591,7 @@ dw[1] = __gen_uint(v1_0, 25, 28) | + __gen_uint(values->HierarchicalDepthBufferMOCS, 25, 28) | __gen_uint(values->SurfacePitch, 0, 16); dw[2] = __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, 0); @@ -2611,15 +2625,15 @@ bool IllegalOpcodeExceptionEnable; bool SoftwareExceptionEnable; uint32_t MaximumNumberofThreads; - bool Enable; + bool FunctionEnable; bool StatisticsEnable; uint32_t InstanceCount; uint64_t KernelStartPointer; __gen_address_type ScratchSpaceBasePointer; uint32_t PerThreadScratchSpace; - uint32_t SingleProgramFlow; + bool SingleProgramFlow; bool VectorMaskEnable; - uint32_t IncludeVertexHandles; + bool IncludeVertexHandles; uint32_t DispatchGRFStartRegisterForURBData; uint32_t VertexURBEntryReadLength; uint32_t VertexURBEntryReadOffset; @@ -2648,7 +2662,7 @@ __gen_uint(values->MaximumNumberofThreads, 0, 6); dw[2] = - __gen_uint(values->Enable, 31, 31) | + __gen_uint(values->FunctionEnable, 31, 31) | __gen_uint(values->StatisticsEnable, 29, 29) | __gen_uint(values->InstanceCount, 0, 3); @@ -3063,8 +3077,8 @@ uint32_t _3DCommandSubOpcode; uint32_t DWordLength; uint64_t KernelStartPointer0; - uint32_t SingleProgramFlowSPF; - uint32_t VectorMaskEnableVME; + bool SingleProgramFlow; + bool VectorMaskEnable; uint32_t SamplerCount; uint32_t DenormalMode; #define FTZ 0 @@ -3097,9 +3111,9 @@ bool _32PixelDispatchEnable; bool _16PixelDispatchEnable; bool _8PixelDispatchEnable; - uint32_t DispatchGRFStartRegisterforConstantSetupData0; - uint32_t DispatchGRFStartRegisterforConstantSetupData1; - uint32_t DispatchGRFStartRegisterforConstantSetupData2; + uint32_t DispatchGRFStartRegisterForConstantSetupData0; + uint32_t DispatchGRFStartRegisterForConstantSetupData1; + uint32_t DispatchGRFStartRegisterForConstantSetupData2; uint64_t KernelStartPointer1; uint64_t KernelStartPointer2; }; @@ -3121,8 +3135,8 @@ __gen_offset(values->KernelStartPointer0, 6, 31); dw[2] = - __gen_uint(values->SingleProgramFlowSPF, 31, 31) | - __gen_uint(values->VectorMaskEnableVME, 30, 30) | + __gen_uint(values->SingleProgramFlow, 31, 31) | + __gen_uint(values->VectorMaskEnable, 30, 30) | __gen_uint(values->SamplerCount, 27, 29) | __gen_uint(values->DenormalMode, 26, 26) | __gen_uint(values->BindingTableEntryCount, 18, 25) | @@ -3150,9 +3164,9 @@ __gen_uint(values->_8PixelDispatchEnable, 0, 0); dw[5] = - __gen_uint(values->DispatchGRFStartRegisterforConstantSetupData0, 16, 22) | - __gen_uint(values->DispatchGRFStartRegisterforConstantSetupData1, 8, 14) | - __gen_uint(values->DispatchGRFStartRegisterforConstantSetupData2, 0, 6); + __gen_uint(values->DispatchGRFStartRegisterForConstantSetupData0, 16, 22) | + __gen_uint(values->DispatchGRFStartRegisterForConstantSetupData1, 8, 14) | + __gen_uint(values->DispatchGRFStartRegisterForConstantSetupData2, 0, 6); dw[6] = __gen_offset(values->KernelStartPointer1, 6, 31); @@ -3870,7 +3884,7 @@ #define FILL_MODE_SOLID 0 #define FILL_MODE_WIREFRAME 1 #define FILL_MODE_POINT 2 - bool ViewTransformEnable; + bool ViewportTransformEnable; uint32_t FrontWinding; bool AntiAliasingEnable; uint32_t CullMode; @@ -3880,6 +3894,10 @@ #define CULLMODE_BACK 3 float LineWidth; uint32_t LineEndCapAntialiasingRegionWidth; +#define _05pixels 0 +#define _10pixels 1 +#define _20pixels 2 +#define _40pixels 3 bool ScissorRectangleEnable; uint32_t MultisampleRasterizationMode; bool LastPixelEnable; @@ -3895,7 +3913,9 @@ uint32_t AALineDistanceMode; #define AALINEDISTANCE_TRUE 1 uint32_t VertexSubPixelPrecisionSelect; - uint32_t UsePointWidthState; + uint32_t PointWidthSource; +#define Vertex 0 +#define State 1 float PointWidth; float GlobalDepthOffsetConstant; float GlobalDepthOffsetScale; @@ -3924,7 +3944,7 @@ __gen_uint(values->GlobalDepthOffsetEnablePoint, 7, 7) | __gen_uint(values->FrontFaceFillMode, 5, 6) | __gen_uint(values->BackFaceFillMode, 3, 4) | - __gen_uint(values->ViewTransformEnable, 1, 1) | + __gen_uint(values->ViewportTransformEnable, 1, 1) | __gen_uint(values->FrontWinding, 0, 0); dw[2] = @@ -3942,7 +3962,7 @@ __gen_uint(values->TriangleFanProvokingVertexSelect, 25, 26) | __gen_uint(values->AALineDistanceMode, 14, 14) | __gen_uint(values->VertexSubPixelPrecisionSelect, 12, 12) | - __gen_uint(values->UsePointWidthState, 11, 11) | + __gen_uint(values->PointWidthSource, 11, 11) | __gen_ufixed(values->PointWidth, 0, 10, 3); dw[4] = @@ -4069,6 +4089,7 @@ uint32_t _3DCommandSubOpcode; uint32_t DWordLength; struct GEN7_MEMORY_OBJECT_CONTROL_STATE StencilBufferObjectControlState; + uint32_t StencilBufferMOCS; uint32_t SurfacePitch; __gen_address_type SurfaceBaseAddress; }; @@ -4091,6 +4112,7 @@ dw[1] = __gen_uint(v1_0, 25, 28) | + __gen_uint(values->StencilBufferMOCS, 25, 28) | __gen_uint(values->SurfacePitch, 0, 16); dw[2] = __gen_combine_address(data, &dw[2], values->SurfaceBaseAddress, 0); @@ -4111,17 +4133,17 @@ uint32_t _3DCommandOpcode; uint32_t _3DCommandSubOpcode; uint32_t DWordLength; - uint32_t SOFunctionEnable; - uint32_t RenderingDisable; + bool SOFunctionEnable; + bool RenderingDisable; uint32_t RenderStreamSelect; uint32_t ReorderMode; #define LEADING 0 #define TRAILING 1 bool SOStatisticsEnable; - uint32_t SOBufferEnable3; - uint32_t SOBufferEnable2; - uint32_t SOBufferEnable1; - uint32_t SOBufferEnable0; + bool SOBufferEnable3; + bool SOBufferEnable2; + bool SOBufferEnable1; + bool SOBufferEnable0; uint32_t Stream3VertexReadOffset; uint32_t Stream3VertexReadLength; uint32_t Stream2VertexReadOffset; @@ -4565,7 +4587,7 @@ uint32_t DWordLength; uint64_t KernelStartPointer; bool SingleVertexDispatch; - uint32_t VectorMaskEnableVME; + bool VectorMaskEnable; uint32_t SamplerCount; #define NoSamplers 0 #define _14Samplers 1 @@ -4580,13 +4602,13 @@ bool SoftwareExceptionEnable; __gen_address_type ScratchSpaceBasePointer; uint32_t PerThreadScratchSpace; - uint32_t DispatchGRFStartRegisterforURBData; + uint32_t DispatchGRFStartRegisterForURBData; uint32_t VertexURBEntryReadLength; uint32_t VertexURBEntryReadOffset; uint32_t MaximumNumberofThreads; bool StatisticsEnable; bool VertexCacheDisable; - bool VSFunctionEnable; + bool FunctionEnable; }; static inline void @@ -4607,7 +4629,7 @@ dw[2] = __gen_uint(values->SingleVertexDispatch, 31, 31) | - __gen_uint(values->VectorMaskEnableVME, 30, 30) | + __gen_uint(values->VectorMaskEnable, 30, 30) | __gen_uint(values->SamplerCount, 27, 29) | __gen_uint(values->BindingTableEntryCount, 18, 25) | __gen_uint(values->FloatingPointMode, 16, 16) | @@ -4619,7 +4641,7 @@ dw[3] = __gen_combine_address(data, &dw[3], values->ScratchSpaceBasePointer, v3); dw[4] = - __gen_uint(values->DispatchGRFStartRegisterforURBData, 20, 24) | + __gen_uint(values->DispatchGRFStartRegisterForURBData, 20, 24) | __gen_uint(values->VertexURBEntryReadLength, 11, 16) | __gen_uint(values->VertexURBEntryReadOffset, 4, 9); @@ -4627,7 +4649,7 @@ __gen_uint(values->MaximumNumberofThreads, 25, 31) | __gen_uint(values->StatisticsEnable, 10, 10) | __gen_uint(values->VertexCacheDisable, 1, 1) | - __gen_uint(values->VSFunctionEnable, 0, 0); + __gen_uint(values->FunctionEnable, 0, 0); } #define GEN7_3DSTATE_WM_length 3 @@ -4651,7 +4673,7 @@ bool DepthBufferResolveEnable; bool HierarchicalDepthBufferResolveEnable; bool LegacyDiamondLineRasterization; - bool PixelShaderKillPixel; + bool PixelShaderKillsPixel; uint32_t PixelShaderComputedDepthMode; #define PSCDEPTH_OFF 0 #define PSCDEPTH_ON 1 @@ -4668,9 +4690,19 @@ #define INTERP_CENTROID 2 #define INTERP_SAMPLE 3 uint32_t BarycentricInterpolationMode; +#define BIM_PERSPECTIVE_PIXEL 1 +#define BIM_PERSPECTIVE_CENTROID 2 +#define BIM_PERSPECTIVE_SAMPLE 4 +#define BIM_LINEAR_PIXEL 8 +#define BIM_LINEAR_CENTROID 16 +#define BIM_LINEAR_SAMPLE 32 bool PixelShaderUsesInputCoverageMask; uint32_t LineEndCapAntialiasingRegionWidth; uint32_t LineAntialiasingRegionWidth; +#define _05pixels 0 +#define _10pixels 1 +#define _20pixels 2 +#define _40pixels 3 bool PolygonStippleEnable; bool LineStippleEnable; uint32_t PointRasterizationRule; @@ -4706,7 +4738,7 @@ __gen_uint(values->DepthBufferResolveEnable, 28, 28) | __gen_uint(values->HierarchicalDepthBufferResolveEnable, 27, 27) | __gen_uint(values->LegacyDiamondLineRasterization, 26, 26) | - __gen_uint(values->PixelShaderKillPixel, 25, 25) | + __gen_uint(values->PixelShaderKillsPixel, 25, 25) | __gen_uint(values->PixelShaderComputedDepthMode, 23, 24) | __gen_uint(values->EarlyDepthStencilControl, 21, 22) | __gen_uint(values->PixelShaderUsesSourceDepth, 20, 20) | @@ -5510,9 +5542,7 @@ struct GEN7_MI_CLFLUSH { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t UseGlobalGTT; -#define PerProcessGraphicsAddress 0 -#define GlobalGraphicsAddress 1 + bool UseGlobalGTT; uint32_t DWordLength; __gen_address_type PageBaseAddress; uint32_t StartingCachelineOffset; @@ -5544,14 +5574,13 @@ #define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_header\ .CommandType = 0, \ .MICommandOpcode = 54, \ - .UseGlobalGTT = 0, \ .CompareSemaphore = 0, \ .DWordLength = 0 struct GEN7_MI_CONDITIONAL_BATCH_BUFFER_END { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t UseGlobalGTT; + bool UseGlobalGTT; uint32_t CompareSemaphore; uint32_t DWordLength; uint32_t CompareDataDword; @@ -5658,7 +5687,7 @@ struct GEN7_MI_LOAD_REGISTER_MEM { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t UseGlobalGTT; + bool UseGlobalGTT; bool AsyncModeEnable; uint32_t DWordLength; uint64_t RegisterAddress; @@ -5781,7 +5810,7 @@ uint32_t MICommandOpcode; uint32_t DWordLength; __gen_address_type MemoryAddress; - uint32_t UseGlobalGTT; + bool UseGlobalGTT; uint32_t ReportID; }; @@ -5889,9 +5918,9 @@ struct GEN7_MI_STORE_DATA_IMM { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t UseGlobalGTT; + bool UseGlobalGTT; uint32_t DWordLength; - uint32_t Address; + __gen_address_type Address; uint32_t CoreModeEnable; uint32_t DataDWord0; uint32_t DataDWord1; @@ -5911,9 +5940,9 @@ dw[1] = 0; - dw[2] = - __gen_uint(values->Address, 2, 31) | + const uint32_t v2 = __gen_uint(values->CoreModeEnable, 0, 0); + dw[2] = __gen_combine_address(data, &dw[2], values->Address, v2); dw[3] = __gen_uint(values->DataDWord0, 0, 31); @@ -5963,7 +5992,7 @@ struct GEN7_MI_STORE_REGISTER_MEM { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t UseGlobalGTT; + bool UseGlobalGTT; uint32_t DWordLength; uint64_t RegisterAddress; __gen_address_type MemoryAddress; @@ -6020,7 +6049,7 @@ struct GEN7_MI_TOPOLOGY_FILTER { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t TopologyFilterValue; + enum GEN7_3D_Prim_Topo_Type TopologyFilterValue; }; static inline void @@ -6199,10 +6228,8 @@ #define MMIOWriteImmediateData 1 uint32_t StoreDataIndex; bool CommandStreamerStallEnable; - uint32_t GlobalSnapshotCountReset; -#define DontReset 0 -#define Reset 1 - uint32_t TLBInvalidate; + bool GlobalSnapshotCountReset; + bool TLBInvalidate; bool GenericMediaStateClear; uint32_t PostSyncOperation; #define NoWrite 0 @@ -6577,3 +6604,68 @@ __gen_uint(values->TLowBandwidth, 21, 21); } +#define GEN7_SO_WRITE_OFFSET0_num 0x5280 +#define GEN7_SO_WRITE_OFFSET0_length 1 +struct GEN7_SO_WRITE_OFFSET0 { + uint64_t WriteOffset; +}; + +static inline void +GEN7_SO_WRITE_OFFSET0_pack(__gen_user_data *data, void * restrict dst, + const struct GEN7_SO_WRITE_OFFSET0 * restrict values) +{ + uint32_t * restrict dw = (uint32_t * restrict) dst; + + dw[0] = + __gen_offset(values->WriteOffset, 2, 31); +} + +#define GEN7_SO_WRITE_OFFSET1_num 0x5284 +#define GEN7_SO_WRITE_OFFSET1_length 1 +struct GEN7_SO_WRITE_OFFSET1 { + uint64_t WriteOffset; +}; + +static inline void +GEN7_SO_WRITE_OFFSET1_pack(__gen_user_data *data, void * restrict dst, + const struct GEN7_SO_WRITE_OFFSET1 * restrict values) +{ + uint32_t * restrict dw = (uint32_t * restrict) dst; + + dw[0] = + __gen_offset(values->WriteOffset, 2, 31); +} + +#define GEN7_SO_WRITE_OFFSET2_num 0x5288 +#define GEN7_SO_WRITE_OFFSET2_length 1 +struct GEN7_SO_WRITE_OFFSET2 { + uint64_t WriteOffset; +}; + +static inline void +GEN7_SO_WRITE_OFFSET2_pack(__gen_user_data *data, void * restrict dst, + const struct GEN7_SO_WRITE_OFFSET2 * restrict values) +{ + uint32_t * restrict dw = (uint32_t * restrict) dst; + + dw[0] = + __gen_offset(values->WriteOffset, 2, 31); +} + +#define GEN7_SO_WRITE_OFFSET3_num 0x528c +#define GEN7_SO_WRITE_OFFSET3_length 1 +struct GEN7_SO_WRITE_OFFSET3 { + uint64_t WriteOffset; +}; + +static inline void +GEN7_SO_WRITE_OFFSET3_pack(__gen_user_data *data, void * restrict dst, + const struct GEN7_SO_WRITE_OFFSET3 * restrict values) +{ + uint32_t * restrict dw = (uint32_t * restrict) dst; + + dw[0] = + __gen_offset(values->WriteOffset, 2, 31); +} + +#endif /* GEN7_PACK_H */ diff -Nru mesa-12.0.6/src/intel/genxml/gen7.xml mesa-17.0.7/src/intel/genxml/gen7.xml --- mesa-12.0.6/src/intel/genxml/gen7.xml 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/genxml/gen7.xml 2017-06-01 10:37:10.000000000 +0000 @@ -1,514 +1,4 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - @@ -576,6 +66,47 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -587,6 +118,25 @@ + + + + + + + + + + + + + + + + + + + @@ -811,14 +361,434 @@ - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -833,7 +803,7 @@ - + @@ -1068,6 +1038,7 @@ + @@ -1129,7 +1100,7 @@ - + @@ -1139,8 +1110,8 @@ - - + + @@ -1163,11 +1134,11 @@ - + - + - + @@ -1181,13 +1152,13 @@ - + - + - + @@ -1198,6 +1169,7 @@ + @@ -1223,15 +1195,15 @@ - + - + - + @@ -1340,8 +1312,8 @@ - - + + @@ -1378,9 +1350,9 @@ - - - + + + @@ -1612,7 +1584,7 @@ - + @@ -1622,7 +1594,12 @@ - + + + + + + @@ -1641,7 +1618,10 @@ - + + + + @@ -1687,6 +1667,7 @@ + @@ -1697,18 +1678,18 @@ - - + + - - - - + + + + @@ -1850,7 +1831,7 @@ - + @@ -1867,13 +1848,13 @@ - + - + @@ -1888,7 +1869,7 @@ - + @@ -1907,10 +1888,22 @@ - + + + + + + + + - + + + + + + @@ -2193,10 +2186,7 @@ - - - - + @@ -2209,7 +2199,7 @@ - + @@ -2247,7 +2237,7 @@ - + @@ -2291,7 +2281,7 @@ - + @@ -2322,9 +2312,9 @@ - + - + @@ -2342,7 +2332,7 @@ - + @@ -2357,7 +2347,7 @@ - + @@ -2424,11 +2414,8 @@ - - - - - + + @@ -2542,4 +2529,20 @@ + + + + + + + + + + + + + + + + diff -Nru mesa-12.0.6/src/intel/genxml/gen7_xml.h mesa-17.0.7/src/intel/genxml/gen7_xml.h --- mesa-12.0.6/src/intel/genxml/gen7_xml.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/genxml/gen7_xml.h 2017-06-01 10:38:02.000000000 +0000 @@ -0,0 +1,12144 @@ +static const uint8_t gen7_xml[] = { + 0x3c, 0x67, 0x65, 0x6e, 0x78, 0x6d, 0x6c, 0x20, 0x6e, 0x61, 0x6d, 0x65, + 0x3d, 0x22, 0x49, 0x56, 0x42, 0x22, 0x20, 0x67, 0x65, 0x6e, 0x3d, 0x22, + 0x37, 0x22, 0x3e, 0x0a, 0x20, 0x20, 0x3c, 0x65, 0x6e, 0x75, 0x6d, 0x20, + 0x6e, 0x61, 0x6d, 0x65, 0x3d, 0x22, 0x33, 0x44, 0x5f, 0x50, 0x72, 0x69, + 0x6d, 0x5f, 0x54, 0x6f, 0x70, 0x6f, 0x5f, 0x54, 0x79, 0x70, 0x65, 0x22, + 0x20, 0x70, 0x72, 0x65, 0x66, 0x69, 0x78, 0x3d, 0x22, 0x33, 0x44, 0x50, + 0x52, 0x49, 0x4d, 0x22, 0x3e, 0x0a, 0x20, 0x20, 0x20, 0x20, 0x3c, 0x76, + 0x61, 0x6c, 0x75, 0x65, 0x20, 0x6e, 0x61, 0x6d, 0x65, 0x3d, 0x22, 0x50, + 0x4f, 0x49, 0x4e, 0x54, 0x4c, 0x49, 0x53, 0x54, 0x22, 0x20, 0x76, 0x61, + 0x6c, 0x75, 0x65, 0x3d, 0x22, 0x31, 0x22, 0x2f, 0x3e, 0x0a, 0x20, 0x20, + 0x20, 0x20, 0x3c, 0x76, 0x61, 0x6c, 0x75, 0x65, 0x20, 0x6e, 0x61, 0x6d, + 0x65, 0x3d, 0x22, 0x4c, 0x49, 0x4e, 0x45, 0x4c, 0x49, 0x53, 0x54, 0x22, + 0x20, 0x76, 0x61, 0x6c, 0x75, 0x65, 0x3d, 0x22, 0x32, 0x22, 0x2f, 0x3e, + 0x0a, 0x20, 0x20, 0x20, 0x20, 0x3c, 0x76, 0x61, 0x6c, 0x75, 0x65, 0x20, + 0x6e, 0x61, 0x6d, 0x65, 0x3d, 0x22, 0x4c, 0x49, 0x4e, 0x45, 0x53, 0x54, + 0x52, 0x49, 0x50, 0x22, 0x20, 0x76, 0x61, 0x6c, 0x75, 0x65, 0x3d, 0x22, + 0x33, 0x22, 0x2f, 0x3e, 0x0a, 0x20, 0x20, 0x20, 0x20, 0x3c, 0x76, 0x61, + 0x6c, 0x75, 0x65, 0x20, 0x6e, 0x61, 0x6d, 0x65, 0x3d, 0x22, 0x54, 0x52, + 0x49, 0x4c, 0x49, 0x53, 0x54, 0x22, 0x20, 0x76, 0x61, 0x6c, 0x75, 0x65, + 0x3d, 0x22, 0x34, 0x22, 0x2f, 0x3e, 0x0a, 0x20, 0x20, 0x20, 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mesa-17.0.7/src/intel/genxml/gen8_pack.h --- mesa-12.0.6/src/intel/genxml/gen8_pack.h 2017-01-24 01:43:19.000000000 +0000 +++ mesa-17.0.7/src/intel/genxml/gen8_pack.h 2017-06-01 10:38:02.000000000 +0000 @@ -27,7 +27,8 @@ * This file has been generated, do not hand edit. */ -#pragma once +#ifndef GEN8_PACK_H +#define GEN8_PACK_H #include #include @@ -157,6 +158,408 @@ #endif +enum GEN8_3D_Prim_Topo_Type { + _3DPRIM_POINTLIST = 1, + _3DPRIM_LINELIST = 2, + _3DPRIM_LINESTRIP = 3, + _3DPRIM_TRILIST = 4, + _3DPRIM_TRISTRIP = 5, + _3DPRIM_TRIFAN = 6, + _3DPRIM_QUADLIST = 7, + _3DPRIM_QUADSTRIP = 8, + _3DPRIM_LINELIST_ADJ = 9, + _3DPRIM_LINESTRIP_ADJ = 10, + _3DPRIM_TRILIST_ADJ = 11, + _3DPRIM_TRISTRIP_ADJ = 12, + _3DPRIM_TRISTRIP_REVERSE = 13, + _3DPRIM_POLYGON = 14, + _3DPRIM_RECTLIST = 15, + _3DPRIM_LINELOOP = 16, + _3DPRIM_POINTLIST_BF = 17, + _3DPRIM_LINESTRIP_CONT = 18, + _3DPRIM_LINESTRIP_BF = 19, + _3DPRIM_LINESTRIP_CONT_BF = 20, + _3DPRIM_TRIFAN_NOSTIPPLE = 22, + _3DPRIM_PATCHLIST_1 = 32, + _3DPRIM_PATCHLIST_2 = 33, + _3DPRIM_PATCHLIST_3 = 34, + _3DPRIM_PATCHLIST_4 = 35, + _3DPRIM_PATCHLIST_5 = 36, + _3DPRIM_PATCHLIST_6 = 37, + _3DPRIM_PATCHLIST_7 = 38, + _3DPRIM_PATCHLIST_8 = 39, + _3DPRIM_PATCHLIST_9 = 40, + _3DPRIM_PATCHLIST_10 = 41, + _3DPRIM_PATCHLIST_11 = 42, + _3DPRIM_PATCHLIST_12 = 43, + _3DPRIM_PATCHLIST_13 = 44, + _3DPRIM_PATCHLIST_14 = 45, + _3DPRIM_PATCHLIST_15 = 46, + _3DPRIM_PATCHLIST_16 = 47, + _3DPRIM_PATCHLIST_17 = 48, + _3DPRIM_PATCHLIST_18 = 49, + _3DPRIM_PATCHLIST_19 = 50, + _3DPRIM_PATCHLIST_20 = 51, + _3DPRIM_PATCHLIST_21 = 52, + _3DPRIM_PATCHLIST_22 = 53, + _3DPRIM_PATCHLIST_23 = 54, + _3DPRIM_PATCHLIST_24 = 55, + _3DPRIM_PATCHLIST_25 = 56, + _3DPRIM_PATCHLIST_26 = 57, + _3DPRIM_PATCHLIST_27 = 58, + _3DPRIM_PATCHLIST_28 = 59, + _3DPRIM_PATCHLIST_29 = 60, + _3DPRIM_PATCHLIST_30 = 61, + _3DPRIM_PATCHLIST_31 = 62, + _3DPRIM_PATCHLIST_32 = 63, +}; + +enum GEN8_3D_Vertex_Component_Control { + VFCOMP_NOSTORE = 0, + VFCOMP_STORE_SRC = 1, + VFCOMP_STORE_0 = 2, + VFCOMP_STORE_1_FP = 3, + VFCOMP_STORE_1_INT = 4, + VFCOMP_STORE_PID = 7, +}; + +enum GEN8_WRAP_SHORTEST_ENABLE { + WSE_X = 1, + WSE_Y = 2, + WSE_XY = 3, + WSE_Z = 4, + WSE_XZ = 5, + WSE_YZ = 6, + WSE_XYZ = 7, + WSE_W = 8, + WSE_XW = 9, + WSE_YW = 10, + WSE_XYW = 11, + WSE_ZW = 12, + WSE_XZW = 13, + WSE_YZW = 14, + WSE_XYZW = 15, +}; + +enum GEN8_3D_Stencil_Operation { + STENCILOP_KEEP = 0, + STENCILOP_ZERO = 1, + STENCILOP_REPLACE = 2, + STENCILOP_INCRSAT = 3, + STENCILOP_DECRSAT = 4, + STENCILOP_INCR = 5, + STENCILOP_DECR = 6, + STENCILOP_INVERT = 7, +}; + +enum GEN8_3D_Color_Buffer_Blend_Factor { + BLENDFACTOR_ONE = 1, + BLENDFACTOR_SRC_COLOR = 2, + BLENDFACTOR_SRC_ALPHA = 3, + BLENDFACTOR_DST_ALPHA = 4, + BLENDFACTOR_DST_COLOR = 5, + BLENDFACTOR_SRC_ALPHA_SATURATE = 6, + BLENDFACTOR_CONST_COLOR = 7, + BLENDFACTOR_CONST_ALPHA = 8, + BLENDFACTOR_SRC1_COLOR = 9, + BLENDFACTOR_SRC1_ALPHA = 10, + BLENDFACTOR_ZERO = 17, + BLENDFACTOR_INV_SRC_COLOR = 18, + BLENDFACTOR_INV_SRC_ALPHA = 19, + BLENDFACTOR_INV_DST_ALPHA = 20, + BLENDFACTOR_INV_DST_COLOR = 21, + BLENDFACTOR_INV_CONST_COLOR = 23, + BLENDFACTOR_INV_CONST_ALPHA = 24, + BLENDFACTOR_INV_SRC1_COLOR = 25, + BLENDFACTOR_INV_SRC1_ALPHA = 26, +}; + +enum GEN8_3D_Color_Buffer_Blend_Function { + BLENDFUNCTION_ADD = 0, + BLENDFUNCTION_SUBTRACT = 1, + BLENDFUNCTION_REVERSE_SUBTRACT = 2, + BLENDFUNCTION_MIN = 3, + BLENDFUNCTION_MAX = 4, +}; + +enum GEN8_3D_Compare_Function { + COMPAREFUNCTION_ALWAYS = 0, + COMPAREFUNCTION_NEVER = 1, + COMPAREFUNCTION_LESS = 2, + COMPAREFUNCTION_EQUAL = 3, + COMPAREFUNCTION_LEQUAL = 4, + COMPAREFUNCTION_GREATER = 5, + COMPAREFUNCTION_NOTEQUAL = 6, + COMPAREFUNCTION_GEQUAL = 7, +}; + +enum GEN8_3D_Logic_Op_Function { + LOGICOP_CLEAR = 0, + LOGICOP_NOR = 1, + LOGICOP_AND_INVERTED = 2, + LOGICOP_COPY_INVERTED = 3, + LOGICOP_AND_REVERSE = 4, + LOGICOP_INVERT = 5, + LOGICOP_XOR = 6, + LOGICOP_NAND = 7, + LOGICOP_AND = 8, + LOGICOP_EQUIV = 9, + LOGICOP_NOOP = 10, + LOGICOP_OR_INVERTED = 11, + LOGICOP_COPY = 12, + LOGICOP_OR_REVERSE = 13, + LOGICOP_OR = 14, + LOGICOP_SET = 15, +}; + +enum GEN8_SURFACE_FORMAT { + SF_R32G32B32A32_FLOAT = 0, + SF_R32G32B32A32_SINT = 1, + SF_R32G32B32A32_UINT = 2, + SF_R32G32B32A32_UNORM = 3, + SF_R32G32B32A32_SNORM = 4, + SF_R64G64_FLOAT = 5, + SF_R32G32B32X32_FLOAT = 6, + SF_R32G32B32A32_SSCALED = 7, + SF_R32G32B32A32_USCALED = 8, + SF_R32G32B32A32_SFIXED = 32, + SF_R64G64_PASSTHRU = 33, + SF_R32G32B32_FLOAT = 64, + SF_R32G32B32_SINT = 65, + SF_R32G32B32_UINT = 66, + SF_R32G32B32_UNORM = 67, + SF_R32G32B32_SNORM = 68, + SF_R32G32B32_SSCALED = 69, + SF_R32G32B32_USCALED = 70, + SF_R32G32B32_SFIXED = 80, + SF_R16G16B16A16_UNORM = 128, + SF_R16G16B16A16_SNORM = 129, + SF_R16G16B16A16_SINT = 130, + SF_R16G16B16A16_UINT = 131, + SF_R16G16B16A16_FLOAT = 132, + SF_R32G32_FLOAT = 133, + SF_R32G32_SINT = 134, + SF_R32G32_UINT = 135, + SF_R32_FLOAT_X8X24_TYPELESS = 136, + SF_X32_TYPELESS_G8X24_UINT = 137, + SF_L32A32_FLOAT = 138, + SF_R32G32_UNORM = 139, + SF_R32G32_SNORM = 140, + SF_R64_FLOAT = 141, + SF_R16G16B16X16_UNORM = 142, + SF_R16G16B16X16_FLOAT = 143, + SF_A32X32_FLOAT = 144, + SF_L32X32_FLOAT = 145, + SF_I32X32_FLOAT = 146, + SF_R16G16B16A16_SSCALED = 147, + SF_R16G16B16A16_USCALED = 148, + SF_R32G32_SSCALED = 149, + SF_R32G32_USCALED = 150, + SF_R32G32_SFIXED = 160, + SF_R64_PASSTHRU = 161, + SF_B8G8R8A8_UNORM = 192, + SF_B8G8R8A8_UNORM_SRGB = 193, + SF_R10G10B10A2_UNORM = 194, + SF_R10G10B10A2_UNORM_SRGB = 195, + SF_R10G10B10A2_UINT = 196, + SF_R10G10B10_SNORM_A2_UNORM = 197, + SF_R8G8B8A8_UNORM = 199, + SF_R8G8B8A8_UNORM_SRGB = 200, + SF_R8G8B8A8_SNORM = 201, + SF_R8G8B8A8_SINT = 202, + SF_R8G8B8A8_UINT = 203, + SF_R16G16_UNORM = 204, + SF_R16G16_SNORM = 205, + SF_R16G16_SINT = 206, + SF_R16G16_UINT = 207, + SF_R16G16_FLOAT = 208, + SF_B10G10R10A2_UNORM = 209, + SF_B10G10R10A2_UNORM_SRGB = 210, + SF_R11G11B10_FLOAT = 211, + SF_R32_SINT = 214, + SF_R32_UINT = 215, + SF_R32_FLOAT = 216, + SF_R24_UNORM_X8_TYPELESS = 217, + SF_X24_TYPELESS_G8_UINT = 218, + SF_L32_UNORM = 221, + SF_A32_UNORM = 222, + SF_L16A16_UNORM = 223, + SF_I24X8_UNORM = 224, + SF_L24X8_UNORM = 225, + SF_A24X8_UNORM = 226, + SF_I32_FLOAT = 227, + SF_L32_FLOAT = 228, + SF_A32_FLOAT = 229, + SF_X8B8_UNORM_G8R8_SNORM = 230, + SF_A8X8_UNORM_G8R8_SNORM = 231, + SF_B8X8_UNORM_G8R8_SNORM = 232, + SF_B8G8R8X8_UNORM = 233, + SF_B8G8R8X8_UNORM_SRGB = 234, + SF_R8G8B8X8_UNORM = 235, + SF_R8G8B8X8_UNORM_SRGB = 236, + SF_R9G9B9E5_SHAREDEXP = 237, + SF_B10G10R10X2_UNORM = 238, + SF_L16A16_FLOAT = 240, + SF_R32_UNORM = 241, + SF_R32_SNORM = 242, + SF_R10G10B10X2_USCALED = 243, + SF_R8G8B8A8_SSCALED = 244, + SF_R8G8B8A8_USCALED = 245, + SF_R16G16_SSCALED = 246, + SF_R16G16_USCALED = 247, + SF_R32_SSCALED = 248, + SF_R32_USCALED = 249, + SF_B5G6R5_UNORM = 256, + SF_B5G6R5_UNORM_SRGB = 257, + SF_B5G5R5A1_UNORM = 258, + SF_B5G5R5A1_UNORM_SRGB = 259, + SF_B4G4R4A4_UNORM = 260, + SF_B4G4R4A4_UNORM_SRGB = 261, + SF_R8G8_UNORM = 262, + SF_R8G8_SNORM = 263, + SF_R8G8_SINT = 264, + SF_R8G8_UINT = 265, + SF_R16_UNORM = 266, + SF_R16_SNORM = 267, + SF_R16_SINT = 268, + SF_R16_UINT = 269, + SF_R16_FLOAT = 270, + SF_A8P8_UNORM_PALETTE0 = 271, + SF_A8P8_UNORM_PALETTE1 = 272, + SF_I16_UNORM = 273, + SF_L16_UNORM = 274, + SF_A16_UNORM = 275, + SF_L8A8_UNORM = 276, + SF_I16_FLOAT = 277, + SF_L16_FLOAT = 278, + SF_A16_FLOAT = 279, + SF_L8A8_UNORM_SRGB = 280, + SF_R5G5_SNORM_B6_UNORM = 281, + SF_B5G5R5X1_UNORM = 282, + SF_B5G5R5X1_UNORM_SRGB = 283, + SF_R8G8_SSCALED = 284, + SF_R8G8_USCALED = 285, + SF_R16_SSCALED = 286, + SF_R16_USCALED = 287, + SF_P8A8_UNORM_PALETTE0 = 290, + SF_P8A8_UNORM_PALETTE1 = 291, + SF_A1B5G5R5_UNORM = 292, + SF_A4B4G4R4_UNORM = 293, + SF_L8A8_UINT = 294, + SF_L8A8_SINT = 295, + SF_R8_UNORM = 320, + SF_R8_SNORM = 321, + SF_R8_SINT = 322, + SF_R8_UINT = 323, + SF_A8_UNORM = 324, + SF_I8_UNORM = 325, + SF_L8_UNORM = 326, + SF_P4A4_UNORM_PALETTE0 = 327, + SF_A4P4_UNORM_PALETTE0 = 328, + SF_R8_SSCALED = 329, + SF_R8_USCALED = 330, + SF_P8_UNORM_PALETTE0 = 331, + SF_L8_UNORM_SRGB = 332, + SF_P8_UNORM_PALETTE1 = 333, + SF_P4A4_UNORM_PALETTE1 = 334, + SF_A4P4_UNORM_PALETTE1 = 335, + SF_Y8_UNORM = 336, + SF_L8_UINT = 338, + SF_L8_SINT = 339, + SF_I8_UINT = 340, + SF_I8_SINT = 341, + SF_DXT1_RGB_SRGB = 384, + SF_R1_UNORM = 385, + SF_YCRCB_NORMAL = 386, + SF_YCRCB_SWAPUVY = 387, + SF_P2_UNORM_PALETTE0 = 388, + SF_P2_UNORM_PALETTE1 = 389, + SF_BC1_UNORM = 390, + SF_BC2_UNORM = 391, + SF_BC3_UNORM = 392, + SF_BC4_UNORM = 393, + SF_BC5_UNORM = 394, + SF_BC1_UNORM_SRGB = 395, + SF_BC2_UNORM_SRGB = 396, + SF_BC3_UNORM_SRGB = 397, + SF_MONO8 = 398, + SF_YCRCB_SWAPUV = 399, + SF_YCRCB_SWAPY = 400, + SF_DXT1_RGB = 401, + SF_FXT1 = 402, + SF_R8G8B8_UNORM = 403, + SF_R8G8B8_SNORM = 404, + SF_R8G8B8_SSCALED = 405, + SF_R8G8B8_USCALED = 406, + SF_R64G64B64A64_FLOAT = 407, + SF_R64G64B64_FLOAT = 408, + SF_BC4_SNORM = 409, + SF_BC5_SNORM = 410, + SF_R16G16B16_FLOAT = 411, + SF_R16G16B16_UNORM = 412, + SF_R16G16B16_SNORM = 413, + SF_R16G16B16_SSCALED = 414, + SF_R16G16B16_USCALED = 415, + SF_BC6H_SF16 = 417, + SF_BC7_UNORM = 418, + SF_BC7_UNORM_SRGB = 419, + SF_BC6H_UF16 = 420, + SF_PLANAR_420_8 = 421, + SF_R8G8B8_UNORM_SRGB = 424, + SF_ETC1_RGB8 = 425, + SF_ETC2_RGB8 = 426, + SF_EAC_R11 = 427, + SF_EAC_RG11 = 428, + SF_EAC_SIGNED_R11 = 429, + SF_EAC_SIGNED_RG11 = 430, + SF_ETC2_SRGB8 = 431, + SF_R16G16B16_UINT = 432, + SF_R16G16B16_SINT = 433, + SF_R32_SFIXED = 434, + SF_R10G10B10A2_SNORM = 435, + SF_R10G10B10A2_USCALED = 436, + SF_R10G10B10A2_SSCALED = 437, + SF_R10G10B10A2_SINT = 438, + SF_B10G10R10A2_SNORM = 439, + SF_B10G10R10A2_USCALED = 440, + SF_B10G10R10A2_SSCALED = 441, + SF_B10G10R10A2_UINT = 442, + SF_B10G10R10A2_SINT = 443, + SF_R64G64B64A64_PASSTHRU = 444, + SF_R64G64B64_PASSTHRU = 445, + SF_ETC2_RGB8_PTA = 448, + SF_ETC2_SRGB8_PTA = 449, + SF_ETC2_EAC_RGBA8 = 450, + SF_ETC2_EAC_SRGB8_A8 = 451, + SF_R8G8B8_UINT = 456, + SF_R8G8B8_SINT = 457, + SF_RAW = 511, +}; + +enum GEN8_ShaderChannelSelect { + SCS_ZERO = 0, + SCS_ONE = 1, + SCS_RED = 4, + SCS_GREEN = 5, + SCS_BLUE = 6, + SCS_ALPHA = 7, +}; + +enum GEN8_ClearColor { + CC_ZERO = 0, + CC_ONE = 1, +}; + +enum GEN8_TextureCoordinateMode { + TCM_WRAP = 0, + TCM_MIRROR = 1, + TCM_CLAMP = 2, + TCM_CUBE = 3, + TCM_CLAMP_BORDER = 4, + TCM_MIRROR_ONCE = 5, + TCM_HALF_BORDER = 6, +}; + #define GEN8_3DSTATE_CONSTANT_BODY_length 10 struct GEN8_3DSTATE_CONSTANT_BODY { uint32_t ConstantBuffer1ReadLength; @@ -271,7 +674,8 @@ struct GEN8_VERTEX_BUFFER_STATE { uint32_t VertexBufferIndex; struct GEN8_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState; - uint32_t AddressModifyEnable; + uint32_t VertexBufferMOCS; + bool AddressModifyEnable; bool NullVertexBuffer; uint32_t BufferPitch; __gen_address_type BufferStartingAddress; @@ -290,6 +694,7 @@ dw[0] = __gen_uint(values->VertexBufferIndex, 26, 31) | __gen_uint(v0_0, 16, 22) | + __gen_uint(values->VertexBufferMOCS, 16, 22) | __gen_uint(values->AddressModifyEnable, 14, 14) | __gen_uint(values->NullVertexBuffer, 13, 13) | __gen_uint(values->BufferPitch, 0, 11); @@ -306,14 +711,14 @@ #define GEN8_VERTEX_ELEMENT_STATE_length 2 struct GEN8_VERTEX_ELEMENT_STATE { uint32_t VertexBufferIndex; - uint32_t Valid; - uint32_t SourceElementFormat; + bool Valid; + enum GEN8_SURFACE_FORMAT SourceElementFormat; bool EdgeFlagEnable; uint32_t SourceElementOffset; - uint32_t Component0Control; - uint32_t Component1Control; - uint32_t Component2Control; - uint32_t Component3Control; + enum GEN8_3D_Vertex_Component_Control Component0Control; + enum GEN8_3D_Vertex_Component_Control Component1Control; + enum GEN8_3D_Vertex_Component_Control Component2Control; + enum GEN8_3D_Vertex_Component_Control Component3Control; }; static inline void @@ -526,7 +931,7 @@ #define GEN8_BLEND_STATE_ENTRY_length 2 struct GEN8_BLEND_STATE_ENTRY { bool LogicOpEnable; - uint32_t LogicOpFunction; + enum GEN8_3D_Logic_Op_Function LogicOpFunction; bool PreBlendSourceOnlyClampEnable; uint32_t ColorClampRange; #define COLORCLAMP_UNORM 0 @@ -535,12 +940,12 @@ bool PreBlendColorClampEnable; bool PostBlendColorClampEnable; bool ColorBufferBlendEnable; - uint32_t SourceBlendFactor; - uint32_t DestinationBlendFactor; - uint32_t ColorBlendFunction; - uint32_t SourceAlphaBlendFactor; - uint32_t DestinationAlphaBlendFactor; - uint32_t AlphaBlendFunction; + enum GEN8_3D_Color_Buffer_Blend_Factor SourceBlendFactor; + enum GEN8_3D_Color_Buffer_Blend_Factor DestinationBlendFactor; + enum GEN8_3D_Color_Buffer_Blend_Function ColorBlendFunction; + enum GEN8_3D_Color_Buffer_Blend_Factor SourceAlphaBlendFactor; + enum GEN8_3D_Color_Buffer_Blend_Factor DestinationAlphaBlendFactor; + enum GEN8_3D_Color_Buffer_Blend_Function AlphaBlendFunction; bool WriteDisableAlpha; bool WriteDisableRed; bool WriteDisableGreen; @@ -582,7 +987,7 @@ bool AlphaToOneEnable; bool AlphaToCoverageDitherEnable; bool AlphaTestEnable; - uint32_t AlphaTestFunction; + enum GEN8_3D_Compare_Function AlphaTestFunction; bool ColorDitherEnable; uint32_t XDitherOffset; uint32_t YDitherOffset; @@ -711,11 +1116,10 @@ #define GEN8_INTERFACE_DESCRIPTOR_DATA_length 8 struct GEN8_INTERFACE_DESCRIPTOR_DATA { uint64_t KernelStartPointer; - uint64_t KernelStartPointerHigh; uint32_t DenormMode; #define Ftz 0 #define SetByKernel 1 - uint32_t SingleProgramFlow; + bool SingleProgramFlow; uint32_t ThreadPriority; #define NormalPriority 0 #define HighPriority 1 @@ -734,7 +1138,7 @@ #define Between13and16samplersused 4 uint64_t BindingTablePointer; uint32_t BindingTableEntryCount; - uint32_t ConstantIndirectURBEntryReadLength; + uint32_t ConstantURBEntryReadLength; uint32_t ConstantURBEntryReadOffset; uint32_t RoundingMode; #define RTNE 0 @@ -759,11 +1163,10 @@ { uint32_t * restrict dw = (uint32_t * restrict) dst; - dw[0] = - __gen_offset(values->KernelStartPointer, 6, 31); - - dw[1] = - __gen_offset(values->KernelStartPointerHigh, 0, 15); + const uint64_t v0 = + __gen_offset(values->KernelStartPointer, 6, 47); + dw[0] = v0; + dw[1] = v0 >> 32; dw[2] = __gen_uint(values->DenormMode, 19, 19) | @@ -783,7 +1186,7 @@ __gen_uint(values->BindingTableEntryCount, 0, 4); dw[5] = - __gen_uint(values->ConstantIndirectURBEntryReadLength, 16, 31) | + __gen_uint(values->ConstantURBEntryReadLength, 16, 31) | __gen_uint(values->ConstantURBEntryReadOffset, 0, 15); dw[6] = @@ -843,7 +1246,7 @@ #define SURFTYPE_STRBUF 5 #define SURFTYPE_NULL 7 bool SurfaceArray; - uint32_t SurfaceFormat; + enum GEN8_SURFACE_FORMAT SurfaceFormat; uint32_t SurfaceVerticalAlignment; #define VALIGN4 1 #define VALIGN8 2 @@ -896,8 +1299,8 @@ #define MULTISAMPLECOUNT_4 2 #define MULTISAMPLECOUNT_8 3 uint32_t MultisamplePositionPaletteIndex; - uint64_t XOffset; - uint64_t YOffset; + uint32_t XOffset; + uint32_t YOffset; bool EWADisableForCube; uint32_t CoherencyType; #define GPUcoherent 0 @@ -981,8 +1384,8 @@ __gen_uint(values->MultisamplePositionPaletteIndex, 0, 2); dw[5] = - __gen_offset(values->XOffset, 25, 31) | - __gen_offset(values->YOffset, 21, 23) | + __gen_uint(values->XOffset, 25, 31) | + __gen_uint(values->YOffset, 21, 23) | __gen_uint(values->EWADisableForCube, 20, 20) | __gen_uint(values->CoherencyType, 14, 14) | __gen_uint(values->SurfaceMinLOD, 4, 7) | @@ -1045,6 +1448,41 @@ __gen_sfixed(values->FilterCoefficient, 0, 7, 6); } +#define GEN8_SAMPLER_BORDER_COLOR_STATE_length 4 +struct GEN8_SAMPLER_BORDER_COLOR_STATE { + float BorderColorFloatRed; + float BorderColorFloatGreen; + float BorderColorFloatBlue; + float BorderColorFloatAlpha; + uint32_t BorderColor32bitRed; + uint32_t BorderColor32bitGreen; + uint32_t BorderColor32bitBlue; + uint32_t BorderColor32bitAlpha; +}; + +static inline void +GEN8_SAMPLER_BORDER_COLOR_STATE_pack(__gen_user_data *data, void * restrict dst, + const struct GEN8_SAMPLER_BORDER_COLOR_STATE * restrict values) +{ + uint32_t * restrict dw = (uint32_t * restrict) dst; + + dw[0] = + __gen_float(values->BorderColorFloatRed) | + __gen_uint(values->BorderColor32bitRed, 0, 31); + + dw[1] = + __gen_float(values->BorderColorFloatGreen) | + __gen_uint(values->BorderColor32bitGreen, 0, 31); + + dw[2] = + __gen_float(values->BorderColorFloatBlue) | + __gen_uint(values->BorderColor32bitBlue, 0, 31); + + dw[3] = + __gen_float(values->BorderColorFloatAlpha) | + __gen_uint(values->BorderColor32bitAlpha, 0, 31); +} + #define GEN8_SAMPLER_STATE_length 4 struct GEN8_SAMPLER_STATE { bool SamplerDisable; @@ -1242,396 +1680,6 @@ __gen_sfixed(values->Table1YFilterCoefficientn4, 0, 7, 6); } -/* enum GEN8_3D_Prim_Topo_Type */ -#define _3DPRIM_POINTLIST 1 -#define _3DPRIM_LINELIST 2 -#define _3DPRIM_LINESTRIP 3 -#define _3DPRIM_TRILIST 4 -#define _3DPRIM_TRISTRIP 5 -#define _3DPRIM_TRIFAN 6 -#define _3DPRIM_QUADLIST 7 -#define _3DPRIM_QUADSTRIP 8 -#define _3DPRIM_LINELIST_ADJ 9 -#define _3DPRIM_LINESTRIP_ADJ 10 -#define _3DPRIM_TRILIST_ADJ 11 -#define _3DPRIM_TRISTRIP_ADJ 12 -#define _3DPRIM_TRISTRIP_REVERSE 13 -#define _3DPRIM_POLYGON 14 -#define _3DPRIM_RECTLIST 15 -#define _3DPRIM_LINELOOP 16 -#define _3DPRIM_POINTLIST_BF 17 -#define _3DPRIM_LINESTRIP_CONT 18 -#define _3DPRIM_LINESTRIP_BF 19 -#define _3DPRIM_LINESTRIP_CONT_BF 20 -#define _3DPRIM_TRIFAN_NOSTIPPLE 22 -#define _3DPRIM_PATCHLIST_1 32 -#define _3DPRIM_PATCHLIST_2 33 -#define _3DPRIM_PATCHLIST_3 34 -#define _3DPRIM_PATCHLIST_4 35 -#define _3DPRIM_PATCHLIST_5 36 -#define _3DPRIM_PATCHLIST_6 37 -#define _3DPRIM_PATCHLIST_7 38 -#define _3DPRIM_PATCHLIST_8 39 -#define _3DPRIM_PATCHLIST_9 40 -#define _3DPRIM_PATCHLIST_10 41 -#define _3DPRIM_PATCHLIST_11 42 -#define _3DPRIM_PATCHLIST_12 43 -#define _3DPRIM_PATCHLIST_13 44 -#define _3DPRIM_PATCHLIST_14 45 -#define _3DPRIM_PATCHLIST_15 46 -#define _3DPRIM_PATCHLIST_16 47 -#define _3DPRIM_PATCHLIST_17 48 -#define _3DPRIM_PATCHLIST_18 49 -#define _3DPRIM_PATCHLIST_19 50 -#define _3DPRIM_PATCHLIST_20 51 -#define _3DPRIM_PATCHLIST_21 52 -#define _3DPRIM_PATCHLIST_22 53 -#define _3DPRIM_PATCHLIST_23 54 -#define _3DPRIM_PATCHLIST_24 55 -#define _3DPRIM_PATCHLIST_25 56 -#define _3DPRIM_PATCHLIST_26 57 -#define _3DPRIM_PATCHLIST_27 58 -#define _3DPRIM_PATCHLIST_28 59 -#define _3DPRIM_PATCHLIST_29 60 -#define _3DPRIM_PATCHLIST_30 61 -#define _3DPRIM_PATCHLIST_31 62 -#define _3DPRIM_PATCHLIST_32 63 - -/* enum GEN8_3D_Vertex_Component_Control */ -#define VFCOMP_NOSTORE 0 -#define VFCOMP_STORE_SRC 1 -#define VFCOMP_STORE_0 2 -#define VFCOMP_STORE_1_FP 3 -#define VFCOMP_STORE_1_INT 4 -#define VFCOMP_STORE_PID 7 - -/* enum GEN8_WRAP_SHORTEST_ENABLE */ -#define WSE_X 1 -#define WSE_Y 2 -#define WSE_XY 3 -#define WSE_Z 4 -#define WSE_XZ 5 -#define WSE_YZ 6 -#define WSE_XYZ 7 -#define WSE_W 8 -#define WSE_XW 9 -#define WSE_YW 10 -#define WSE_XYW 11 -#define WSE_ZW 12 -#define WSE_XZW 13 -#define WSE_YZW 14 -#define WSE_XYZW 15 - -/* enum GEN8_3D_Stencil_Operation */ -#define STENCILOP_KEEP 0 -#define STENCILOP_ZERO 1 -#define STENCILOP_REPLACE 2 -#define STENCILOP_INCRSAT 3 -#define STENCILOP_DECRSAT 4 -#define STENCILOP_INCR 5 -#define STENCILOP_DECR 6 -#define STENCILOP_INVERT 7 - -/* enum GEN8_3D_Color_Buffer_Blend_Factor */ -#define BLENDFACTOR_ONE 1 -#define BLENDFACTOR_SRC_COLOR 2 -#define BLENDFACTOR_SRC_ALPHA 3 -#define BLENDFACTOR_DST_ALPHA 4 -#define BLENDFACTOR_DST_COLOR 5 -#define BLENDFACTOR_SRC_ALPHA_SATURATE 6 -#define BLENDFACTOR_CONST_COLOR 7 -#define BLENDFACTOR_CONST_ALPHA 8 -#define BLENDFACTOR_SRC1_COLOR 9 -#define BLENDFACTOR_SRC1_ALPHA 10 -#define BLENDFACTOR_ZERO 17 -#define BLENDFACTOR_INV_SRC_COLOR 18 -#define BLENDFACTOR_INV_SRC_ALPHA 19 -#define BLENDFACTOR_INV_DST_ALPHA 20 -#define BLENDFACTOR_INV_DST_COLOR 21 -#define BLENDFACTOR_INV_CONST_COLOR 23 -#define BLENDFACTOR_INV_CONST_ALPHA 24 -#define BLENDFACTOR_INV_SRC1_COLOR 25 -#define BLENDFACTOR_INV_SRC1_ALPHA 26 - -/* enum GEN8_3D_Color_Buffer_Blend_Function */ -#define BLENDFUNCTION_ADD 0 -#define BLENDFUNCTION_SUBTRACT 1 -#define BLENDFUNCTION_REVERSE_SUBTRACT 2 -#define BLENDFUNCTION_MIN 3 -#define BLENDFUNCTION_MAX 4 - -/* enum GEN8_3D_Compare_Function */ -#define COMPAREFUNCTION_ALWAYS 0 -#define COMPAREFUNCTION_NEVER 1 -#define COMPAREFUNCTION_LESS 2 -#define COMPAREFUNCTION_EQUAL 3 -#define COMPAREFUNCTION_LEQUAL 4 -#define COMPAREFUNCTION_GREATER 5 -#define COMPAREFUNCTION_NOTEQUAL 6 -#define COMPAREFUNCTION_GEQUAL 7 - -/* enum GEN8_3D_Logic_Op_Function */ -#define LOGICOP_CLEAR 0 -#define LOGICOP_NOR 1 -#define LOGICOP_AND_INVERTED 2 -#define LOGICOP_COPY_INVERTED 3 -#define LOGICOP_AND_REVERSE 4 -#define LOGICOP_INVERT 5 -#define LOGICOP_XOR 6 -#define LOGICOP_NAND 7 -#define LOGICOP_AND 8 -#define LOGICOP_EQUIV 9 -#define LOGICOP_NOOP 10 -#define LOGICOP_OR_INVERTED 11 -#define LOGICOP_COPY 12 -#define LOGICOP_OR_REVERSE 13 -#define LOGICOP_OR 14 -#define LOGICOP_SET 15 - -/* enum GEN8_SURFACE_FORMAT */ -#define SF_R32G32B32A32_FLOAT 0 -#define SF_R32G32B32A32_SINT 1 -#define SF_R32G32B32A32_UINT 2 -#define SF_R32G32B32A32_UNORM 3 -#define SF_R32G32B32A32_SNORM 4 -#define SF_R64G64_FLOAT 5 -#define SF_R32G32B32X32_FLOAT 6 -#define SF_R32G32B32A32_SSCALED 7 -#define SF_R32G32B32A32_USCALED 8 -#define SF_R32G32B32A32_SFIXED 32 -#define SF_R64G64_PASSTHRU 33 -#define SF_R32G32B32_FLOAT 64 -#define SF_R32G32B32_SINT 65 -#define SF_R32G32B32_UINT 66 -#define SF_R32G32B32_UNORM 67 -#define SF_R32G32B32_SNORM 68 -#define SF_R32G32B32_SSCALED 69 -#define SF_R32G32B32_USCALED 70 -#define SF_R32G32B32_SFIXED 80 -#define SF_R16G16B16A16_UNORM 128 -#define SF_R16G16B16A16_SNORM 129 -#define SF_R16G16B16A16_SINT 130 -#define SF_R16G16B16A16_UINT 131 -#define SF_R16G16B16A16_FLOAT 132 -#define SF_R32G32_FLOAT 133 -#define SF_R32G32_SINT 134 -#define SF_R32G32_UINT 135 -#define SF_R32_FLOAT_X8X24_TYPELESS 136 -#define SF_X32_TYPELESS_G8X24_UINT 137 -#define SF_L32A32_FLOAT 138 -#define SF_R32G32_UNORM 139 -#define SF_R32G32_SNORM 140 -#define SF_R64_FLOAT 141 -#define SF_R16G16B16X16_UNORM 142 -#define SF_R16G16B16X16_FLOAT 143 -#define SF_A32X32_FLOAT 144 -#define SF_L32X32_FLOAT 145 -#define SF_I32X32_FLOAT 146 -#define SF_R16G16B16A16_SSCALED 147 -#define SF_R16G16B16A16_USCALED 148 -#define SF_R32G32_SSCALED 149 -#define SF_R32G32_USCALED 150 -#define SF_R32G32_SFIXED 160 -#define SF_R64_PASSTHRU 161 -#define SF_B8G8R8A8_UNORM 192 -#define SF_B8G8R8A8_UNORM_SRGB 193 -#define SF_R10G10B10A2_UNORM 194 -#define SF_R10G10B10A2_UNORM_SRGB 195 -#define SF_R10G10B10A2_UINT 196 -#define SF_R10G10B10_SNORM_A2_UNORM 197 -#define SF_R8G8B8A8_UNORM 199 -#define SF_R8G8B8A8_UNORM_SRGB 200 -#define SF_R8G8B8A8_SNORM 201 -#define SF_R8G8B8A8_SINT 202 -#define SF_R8G8B8A8_UINT 203 -#define SF_R16G16_UNORM 204 -#define SF_R16G16_SNORM 205 -#define SF_R16G16_SINT 206 -#define SF_R16G16_UINT 207 -#define SF_R16G16_FLOAT 208 -#define SF_B10G10R10A2_UNORM 209 -#define SF_B10G10R10A2_UNORM_SRGB 210 -#define SF_R11G11B10_FLOAT 211 -#define SF_R32_SINT 214 -#define SF_R32_UINT 215 -#define SF_R32_FLOAT 216 -#define SF_R24_UNORM_X8_TYPELESS 217 -#define SF_X24_TYPELESS_G8_UINT 218 -#define SF_L32_UNORM 221 -#define SF_A32_UNORM 222 -#define SF_L16A16_UNORM 223 -#define SF_I24X8_UNORM 224 -#define SF_L24X8_UNORM 225 -#define SF_A24X8_UNORM 226 -#define SF_I32_FLOAT 227 -#define SF_L32_FLOAT 228 -#define SF_A32_FLOAT 229 -#define SF_X8B8_UNORM_G8R8_SNORM 230 -#define SF_A8X8_UNORM_G8R8_SNORM 231 -#define SF_B8X8_UNORM_G8R8_SNORM 232 -#define SF_B8G8R8X8_UNORM 233 -#define SF_B8G8R8X8_UNORM_SRGB 234 -#define SF_R8G8B8X8_UNORM 235 -#define SF_R8G8B8X8_UNORM_SRGB 236 -#define SF_R9G9B9E5_SHAREDEXP 237 -#define SF_B10G10R10X2_UNORM 238 -#define SF_L16A16_FLOAT 240 -#define SF_R32_UNORM 241 -#define SF_R32_SNORM 242 -#define SF_R10G10B10X2_USCALED 243 -#define SF_R8G8B8A8_SSCALED 244 -#define SF_R8G8B8A8_USCALED 245 -#define SF_R16G16_SSCALED 246 -#define SF_R16G16_USCALED 247 -#define SF_R32_SSCALED 248 -#define SF_R32_USCALED 249 -#define SF_B5G6R5_UNORM 256 -#define SF_B5G6R5_UNORM_SRGB 257 -#define SF_B5G5R5A1_UNORM 258 -#define SF_B5G5R5A1_UNORM_SRGB 259 -#define SF_B4G4R4A4_UNORM 260 -#define SF_B4G4R4A4_UNORM_SRGB 261 -#define SF_R8G8_UNORM 262 -#define SF_R8G8_SNORM 263 -#define SF_R8G8_SINT 264 -#define SF_R8G8_UINT 265 -#define SF_R16_UNORM 266 -#define SF_R16_SNORM 267 -#define SF_R16_SINT 268 -#define SF_R16_UINT 269 -#define SF_R16_FLOAT 270 -#define SF_A8P8_UNORM_PALETTE0 271 -#define SF_A8P8_UNORM_PALETTE1 272 -#define SF_I16_UNORM 273 -#define SF_L16_UNORM 274 -#define SF_A16_UNORM 275 -#define SF_L8A8_UNORM 276 -#define SF_I16_FLOAT 277 -#define SF_L16_FLOAT 278 -#define SF_A16_FLOAT 279 -#define SF_L8A8_UNORM_SRGB 280 -#define SF_R5G5_SNORM_B6_UNORM 281 -#define SF_B5G5R5X1_UNORM 282 -#define SF_B5G5R5X1_UNORM_SRGB 283 -#define SF_R8G8_SSCALED 284 -#define SF_R8G8_USCALED 285 -#define SF_R16_SSCALED 286 -#define SF_R16_USCALED 287 -#define SF_P8A8_UNORM_PALETTE0 290 -#define SF_P8A8_UNORM_PALETTE1 291 -#define SF_A1B5G5R5_UNORM 292 -#define SF_A4B4G4R4_UNORM 293 -#define SF_L8A8_UINT 294 -#define SF_L8A8_SINT 295 -#define SF_R8_UNORM 320 -#define SF_R8_SNORM 321 -#define SF_R8_SINT 322 -#define SF_R8_UINT 323 -#define SF_A8_UNORM 324 -#define SF_I8_UNORM 325 -#define SF_L8_UNORM 326 -#define SF_P4A4_UNORM_PALETTE0 327 -#define SF_A4P4_UNORM_PALETTE0 328 -#define SF_R8_SSCALED 329 -#define SF_R8_USCALED 330 -#define SF_P8_UNORM_PALETTE0 331 -#define SF_L8_UNORM_SRGB 332 -#define SF_P8_UNORM_PALETTE1 333 -#define SF_P4A4_UNORM_PALETTE1 334 -#define SF_A4P4_UNORM_PALETTE1 335 -#define SF_Y8_UNORM 336 -#define SF_L8_UINT 338 -#define SF_L8_SINT 339 -#define SF_I8_UINT 340 -#define SF_I8_SINT 341 -#define SF_DXT1_RGB_SRGB 384 -#define SF_R1_UNORM 385 -#define SF_YCRCB_NORMAL 386 -#define SF_YCRCB_SWAPUVY 387 -#define SF_P2_UNORM_PALETTE0 388 -#define SF_P2_UNORM_PALETTE1 389 -#define SF_BC1_UNORM 390 -#define SF_BC2_UNORM 391 -#define SF_BC3_UNORM 392 -#define SF_BC4_UNORM 393 -#define SF_BC5_UNORM 394 -#define SF_BC1_UNORM_SRGB 395 -#define SF_BC2_UNORM_SRGB 396 -#define SF_BC3_UNORM_SRGB 397 -#define SF_MONO8 398 -#define SF_YCRCB_SWAPUV 399 -#define SF_YCRCB_SWAPY 400 -#define SF_DXT1_RGB 401 -#define SF_FXT1 402 -#define SF_R8G8B8_UNORM 403 -#define SF_R8G8B8_SNORM 404 -#define SF_R8G8B8_SSCALED 405 -#define SF_R8G8B8_USCALED 406 -#define SF_R64G64B64A64_FLOAT 407 -#define SF_R64G64B64_FLOAT 408 -#define SF_BC4_SNORM 409 -#define SF_BC5_SNORM 410 -#define SF_R16G16B16_FLOAT 411 -#define SF_R16G16B16_UNORM 412 -#define SF_R16G16B16_SNORM 413 -#define SF_R16G16B16_SSCALED 414 -#define SF_R16G16B16_USCALED 415 -#define SF_BC6H_SF16 417 -#define SF_BC7_UNORM 418 -#define SF_BC7_UNORM_SRGB 419 -#define SF_BC6H_UF16 420 -#define SF_PLANAR_420_8 421 -#define SF_R8G8B8_UNORM_SRGB 424 -#define SF_ETC1_RGB8 425 -#define SF_ETC2_RGB8 426 -#define SF_EAC_R11 427 -#define SF_EAC_RG11 428 -#define SF_EAC_SIGNED_R11 429 -#define SF_EAC_SIGNED_RG11 430 -#define SF_ETC2_SRGB8 431 -#define SF_R16G16B16_UINT 432 -#define SF_R16G16B16_SINT 433 -#define SF_R32_SFIXED 434 -#define SF_R10G10B10A2_SNORM 435 -#define SF_R10G10B10A2_USCALED 436 -#define SF_R10G10B10A2_SSCALED 437 -#define SF_R10G10B10A2_SINT 438 -#define SF_B10G10R10A2_SNORM 439 -#define SF_B10G10R10A2_USCALED 440 -#define SF_B10G10R10A2_SSCALED 441 -#define SF_B10G10R10A2_UINT 442 -#define SF_B10G10R10A2_SINT 443 -#define SF_R64G64B64A64_PASSTHRU 444 -#define SF_R64G64B64_PASSTHRU 445 -#define SF_ETC2_RGB8_PTA 448 -#define SF_ETC2_SRGB8_PTA 449 -#define SF_ETC2_EAC_RGBA8 450 -#define SF_ETC2_EAC_SRGB8_A8 451 -#define SF_R8G8B8_UINT 456 -#define SF_R8G8B8_SINT 457 -#define SF_RAW 511 - -/* enum GEN8_ShaderChannelSelect */ -#define SCS_ZERO 0 -#define SCS_ONE 1 -#define SCS_RED 4 -#define SCS_GREEN 5 -#define SCS_BLUE 6 -#define SCS_ALPHA 7 - -/* enum GEN8_ClearColor */ -#define CC_ZERO 0 -#define CC_ONE 1 - -/* enum GEN8_TextureCoordinateMode */ -#define TCM_WRAP 0 -#define TCM_MIRROR 1 -#define TCM_CLAMP 2 -#define TCM_CUBE 3 -#define TCM_CLAMP_BORDER 4 -#define TCM_MIRROR_ONCE 5 -#define TCM_HALF_BORDER 6 - #define GEN8_3DPRIMITIVE_length 7 #define GEN8_3DPRIMITIVE_length_bias 2 #define GEN8_3DPRIMITIVE_header \ @@ -1654,7 +1702,7 @@ uint32_t VertexAccessType; #define SEQUENTIAL 0 #define RANDOM 1 - uint32_t PrimitiveTopologyType; + enum GEN8_3D_Prim_Topo_Type PrimitiveTopologyType; uint32_t VertexCountPerInstance; uint32_t StartVertexLocation; uint32_t InstanceCount; @@ -2650,6 +2698,7 @@ uint32_t Depth; uint32_t MinimumArrayElement; struct GEN8_MEMORY_OBJECT_CONTROL_STATE DepthBufferObjectControlState; + uint32_t DepthBufferMOCS; uint32_t RenderTargetViewExtent; uint32_t SurfaceQPitch; }; @@ -2691,7 +2740,8 @@ dw[5] = __gen_uint(values->Depth, 21, 31) | __gen_uint(values->MinimumArrayElement, 10, 20) | - __gen_uint(v5_0, 0, 6); + __gen_uint(v5_0, 0, 6) | + __gen_uint(values->DepthBufferMOCS, 0, 6); dw[6] = 0; @@ -2794,7 +2844,9 @@ uint32_t PatchURBEntryReadOffset; uint32_t MaximumNumberofThreads; bool StatisticsEnable; - bool SIMD8DispatchEnable; + uint32_t DispatchMode; +#define DISPATCH_MODE_SIMD4X2 0 +#define DISPATCH_MODE_SIMD8_SINGLE_PATCH 1 bool ComputeWCoordinateEnable; bool CacheDisable; bool FunctionEnable; @@ -2848,7 +2900,7 @@ dw[7] = __gen_uint(values->MaximumNumberofThreads, 21, 29) | __gen_uint(values->StatisticsEnable, 10, 10) | - __gen_uint(values->SIMD8DispatchEnable, 3, 3) | + __gen_uint(values->DispatchMode, 3, 3) | __gen_uint(values->ComputeWCoordinateEnable, 2, 2) | __gen_uint(values->CacheDisable, 1, 1) | __gen_uint(values->FunctionEnable, 0, 0); @@ -3144,7 +3196,7 @@ uint32_t _3DCommandSubOpcode; uint32_t DWordLength; uint64_t KernelStartPointer; - uint32_t SingleProgramFlow; + bool SingleProgramFlow; bool VectorMaskEnable; uint32_t SamplerCount; #define NoSamplers 0 @@ -3166,9 +3218,9 @@ __gen_address_type ScratchSpaceBasePointer; uint32_t PerThreadScratchSpace; uint32_t OutputVertexSize; - uint32_t OutputTopology; + enum GEN8_3D_Prim_Topo_Type OutputTopology; uint32_t VertexURBEntryReadLength; - uint32_t IncludeVertexHandles; + bool IncludeVertexHandles; uint32_t VertexURBEntryReadOffset; uint32_t DispatchGRFStartRegisterForURBData; uint32_t MaximumNumberofThreads; @@ -3181,13 +3233,13 @@ #define DISPATCH_MODE_SIMD8 3 bool StatisticsEnable; uint32_t InvocationsIncrementValue; - uint32_t IncludePrimitiveID; + bool IncludePrimitiveID; uint32_t Hint; uint32_t ReorderMode; #define LEADING 0 #define TRAILING 1 bool DiscardAdjacency; - bool Enable; + bool FunctionEnable; uint32_t ControlDataFormat; #define CUT 0 #define SID 1 @@ -3257,7 +3309,7 @@ __gen_uint(values->Hint, 3, 3) | __gen_uint(values->ReorderMode, 2, 2) | __gen_uint(values->DiscardAdjacency, 1, 1) | - __gen_uint(values->Enable, 0, 0); + __gen_uint(values->FunctionEnable, 0, 0); dw[8] = __gen_uint(values->ControlDataFormat, 31, 31) | @@ -3287,6 +3339,7 @@ uint32_t _3DCommandSubOpcode; uint32_t DWordLength; struct GEN8_MEMORY_OBJECT_CONTROL_STATE HierarchicalDepthBufferObjectControlState; + uint32_t HierarchicalDepthBufferMOCS; uint32_t SurfacePitch; __gen_address_type SurfaceBaseAddress; uint32_t SurfaceQPitch; @@ -3310,6 +3363,7 @@ dw[1] = __gen_uint(v1_0, 25, 31) | + __gen_uint(values->HierarchicalDepthBufferMOCS, 25, 31) | __gen_uint(values->SurfacePitch, 0, 16); const uint64_t v2_address = @@ -3350,7 +3404,7 @@ #define alternate 1 bool IllegalOpcodeExceptionEnable; bool SoftwareExceptionEnable; - bool Enable; + bool FunctionEnable; bool StatisticsEnable; uint32_t MaximumNumberofThreads; uint32_t InstanceCount; @@ -3360,7 +3414,7 @@ bool SingleProgramFlow; bool VectorMaskEnable; bool AccessesUAV; - uint32_t IncludeVertexHandles; + bool IncludeVertexHandles; uint32_t DispatchGRFStartRegisterForURBData; uint32_t VertexURBEntryReadLength; uint32_t VertexURBEntryReadOffset; @@ -3388,7 +3442,7 @@ __gen_uint(values->SoftwareExceptionEnable, 12, 12); dw[2] = - __gen_uint(values->Enable, 31, 31) | + __gen_uint(values->FunctionEnable, 31, 31) | __gen_uint(values->StatisticsEnable, 29, 29) | __gen_uint(values->MaximumNumberofThreads, 8, 16) | __gen_uint(values->InstanceCount, 0, 3); @@ -3776,7 +3830,7 @@ uint32_t _3DCommandSubOpcode; uint32_t DWordLength; uint64_t KernelStartPointer0; - uint32_t SingleProgramFlow; + bool SingleProgramFlow; bool VectorMaskEnable; uint32_t SamplerCount; #define NoSamplers 0 @@ -5102,8 +5156,9 @@ uint32_t _3DCommandOpcode; uint32_t _3DCommandSubOpcode; uint32_t DWordLength; - uint32_t StencilBufferEnable; + bool StencilBufferEnable; struct GEN8_MEMORY_OBJECT_CONTROL_STATE StencilBufferObjectControlState; + uint32_t StencilBufferMOCS; uint32_t SurfacePitch; __gen_address_type SurfaceBaseAddress; uint32_t SurfaceQPitch; @@ -5128,6 +5183,7 @@ dw[1] = __gen_uint(values->StencilBufferEnable, 31, 31) | __gen_uint(v1_0, 22, 28) | + __gen_uint(values->StencilBufferMOCS, 22, 28) | __gen_uint(values->SurfacePitch, 0, 16); const uint64_t v2_address = @@ -5154,8 +5210,8 @@ uint32_t _3DCommandOpcode; uint32_t _3DCommandSubOpcode; uint32_t DWordLength; - uint32_t SOFunctionEnable; - uint32_t RenderingDisable; + bool SOFunctionEnable; + bool RenderingDisable; uint32_t RenderStreamSelect; uint32_t ReorderMode; #define LEADING 0 @@ -5676,7 +5732,7 @@ uint32_t _3DCommandOpcode; uint32_t _3DCommandSubOpcode; uint32_t DWordLength; - uint32_t PrimitiveTopologyType; + enum GEN8_3D_Prim_Topo_Type PrimitiveTopologyType; }; static inline void @@ -5891,9 +5947,9 @@ bool LegacyHierarchicalDepthBufferResolveEnable; bool LegacyDiamondLineRasterization; uint32_t EarlyDepthStencilControl; -#define NORMAL 0 -#define PSEXEC 1 -#define PREPS 2 +#define EDSC_NORMAL 0 +#define EDSC_PSEXEC 1 +#define EDSC_PREPS 2 uint32_t ForceThreadDispatchEnable; #define ForceOff 1 #define ForceON 2 @@ -5902,6 +5958,12 @@ #define INTERP_CENTROID 2 #define INTERP_SAMPLE 3 uint32_t BarycentricInterpolationMode; +#define BIM_PERSPECTIVE_PIXEL 1 +#define BIM_PERSPECTIVE_CENTROID 2 +#define BIM_PERSPECTIVE_SAMPLE 4 +#define BIM_LINEAR_PIXEL 8 +#define BIM_LINEAR_CENTROID 16 +#define BIM_LINEAR_SAMPLE 32 uint32_t LineEndCapAntialiasingRegionWidth; #define _05pixels 0 #define _10pixels 1 @@ -6003,15 +6065,15 @@ uint32_t _3DCommandOpcode; uint32_t _3DCommandSubOpcode; uint32_t DWordLength; - uint32_t StencilFailOp; - uint32_t StencilPassDepthFailOp; - uint32_t StencilPassDepthPassOp; - uint32_t BackfaceStencilTestFunction; - uint32_t BackfaceStencilFailOp; - uint32_t BackfaceStencilPassDepthFailOp; - uint32_t BackfaceStencilPassDepthPassOp; - uint32_t StencilTestFunction; - uint32_t DepthTestFunction; + enum GEN8_3D_Stencil_Operation StencilFailOp; + enum GEN8_3D_Stencil_Operation StencilPassDepthFailOp; + enum GEN8_3D_Stencil_Operation StencilPassDepthPassOp; + enum GEN8_3D_Compare_Function BackfaceStencilTestFunction; + enum GEN8_3D_Stencil_Operation BackfaceStencilFailOp; + enum GEN8_3D_Stencil_Operation BackfaceStencilPassDepthFailOp; + enum GEN8_3D_Stencil_Operation BackfaceStencilPassDepthPassOp; + enum GEN8_3D_Compare_Function StencilTestFunction; + enum GEN8_3D_Compare_Function DepthTestFunction; bool DoubleSidedStencilEnable; bool StencilTestEnable; bool StencilBufferWriteEnable; @@ -6975,7 +7037,7 @@ #define _1stlevelbatch 0 #define _2ndlevelbatch 1 bool AddOffsetEnable; - uint32_t PredicationEnable; + bool PredicationEnable; bool ResourceStreamerEnable; uint32_t AddressSpaceIndicator; #define ASI_GGTT 0 @@ -7015,9 +7077,7 @@ struct GEN8_MI_CLFLUSH { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t UseGlobalGTT; -#define PerProcessGraphicsAddress 0 -#define GlobalGraphicsAddress 1 + bool UseGlobalGTT; uint32_t DWordLength; __gen_address_type PageBaseAddress; uint32_t StartingCachelineOffset; @@ -7049,14 +7109,13 @@ #define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_header\ .CommandType = 0, \ .MICommandOpcode = 54, \ - .UseGlobalGTT = 0, \ .CompareSemaphore = 0, \ .DWordLength = 1 struct GEN8_MI_CONDITIONAL_BATCH_BUFFER_END { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t UseGlobalGTT; + bool UseGlobalGTT; uint32_t CompareSemaphore; uint32_t DWordLength; uint32_t CompareDataDword; @@ -7095,12 +7154,8 @@ struct GEN8_MI_COPY_MEM_MEM { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t UseGlobalGTTSource; -#define PerProcessGraphicsAddress 0 -#define GlobalGraphicsAddress 1 - uint32_t UseGlobalGTTDestination; -#define PerProcessGraphicsAddress 0 -#define GlobalGraphicsAddress 1 + bool UseGlobalGTTSource; + bool UseGlobalGTTDestination; uint32_t DWordLength; __gen_address_type DestinationMemoryAddress; __gen_address_type SourceMemoryAddress; @@ -7175,7 +7230,7 @@ struct GEN8_MI_LOAD_REGISTER_MEM { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t UseGlobalGTT; + bool UseGlobalGTT; bool AsyncModeEnable; uint32_t DWordLength; uint64_t RegisterAddress; @@ -7477,7 +7532,7 @@ uint32_t DWordLength; __gen_address_type MemoryAddress; uint32_t CoreModeEnable; - uint32_t UseGlobalGTT; + bool UseGlobalGTT; uint32_t ReportID; }; @@ -7767,7 +7822,7 @@ struct GEN8_MI_STORE_DATA_IMM { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t UseGlobalGTT; + bool UseGlobalGTT; uint32_t StoreQword; uint32_t DWordLength; __gen_address_type Address; @@ -7846,7 +7901,7 @@ struct GEN8_MI_STORE_REGISTER_MEM { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t UseGlobalGTT; + bool UseGlobalGTT; bool PredicateEnable; uint32_t DWordLength; uint64_t RegisterAddress; @@ -7943,7 +7998,7 @@ struct GEN8_MI_TOPOLOGY_FILTER { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t TopologyFilterValue; + enum GEN8_3D_Prim_Topo_Type TopologyFilterValue; }; static inline void @@ -8139,10 +8194,8 @@ #define MMIOWriteImmediateData 1 uint32_t StoreDataIndex; bool CommandStreamerStallEnable; - uint32_t GlobalSnapshotCountReset; -#define DontReset 0 -#define Reset 1 - uint32_t TLBInvalidate; + bool GlobalSnapshotCountReset; + bool TLBInvalidate; bool GenericMediaStateClear; uint32_t PostSyncOperation; #define NoWrite 0 @@ -8486,3 +8539,68 @@ __gen_uint(values->AllAllocation, 25, 31); } +#define GEN8_SO_WRITE_OFFSET0_num 0x5280 +#define GEN8_SO_WRITE_OFFSET0_length 1 +struct GEN8_SO_WRITE_OFFSET0 { + uint64_t WriteOffset; +}; + +static inline void +GEN8_SO_WRITE_OFFSET0_pack(__gen_user_data *data, void * restrict dst, + const struct GEN8_SO_WRITE_OFFSET0 * restrict values) +{ + uint32_t * restrict dw = (uint32_t * restrict) dst; + + dw[0] = + __gen_offset(values->WriteOffset, 2, 31); +} + +#define GEN8_SO_WRITE_OFFSET1_num 0x5284 +#define GEN8_SO_WRITE_OFFSET1_length 1 +struct GEN8_SO_WRITE_OFFSET1 { + uint64_t WriteOffset; +}; + +static inline void +GEN8_SO_WRITE_OFFSET1_pack(__gen_user_data *data, void * restrict dst, + const struct GEN8_SO_WRITE_OFFSET1 * restrict values) +{ + uint32_t * restrict dw = (uint32_t * restrict) dst; + + dw[0] = + __gen_offset(values->WriteOffset, 2, 31); +} + +#define GEN8_SO_WRITE_OFFSET2_num 0x5288 +#define GEN8_SO_WRITE_OFFSET2_length 1 +struct GEN8_SO_WRITE_OFFSET2 { + uint64_t WriteOffset; +}; + +static inline void +GEN8_SO_WRITE_OFFSET2_pack(__gen_user_data *data, void * restrict dst, + const struct GEN8_SO_WRITE_OFFSET2 * restrict values) +{ + uint32_t * restrict dw = (uint32_t * restrict) dst; + + dw[0] = + __gen_offset(values->WriteOffset, 2, 31); +} + +#define GEN8_SO_WRITE_OFFSET3_num 0x528c +#define GEN8_SO_WRITE_OFFSET3_length 1 +struct GEN8_SO_WRITE_OFFSET3 { + uint64_t WriteOffset; +}; + +static inline void +GEN8_SO_WRITE_OFFSET3_pack(__gen_user_data *data, void * restrict dst, + const struct GEN8_SO_WRITE_OFFSET3 * restrict values) +{ + uint32_t * restrict dw = (uint32_t * restrict) dst; + + dw[0] = + __gen_offset(values->WriteOffset, 2, 31); +} + +#endif /* GEN8_PACK_H */ diff -Nru mesa-12.0.6/src/intel/genxml/gen8.xml mesa-17.0.7/src/intel/genxml/gen8.xml --- mesa-12.0.6/src/intel/genxml/gen8.xml 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/genxml/gen8.xml 2017-06-01 10:37:10.000000000 +0000 @@ -1,878 +1,890 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - + + + + + + + + - - - - - - - - - - - + + + + + + + + + + + + + + + + + - - - - - - + + + + + + + + + + - - - - - - + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - - - - - - - - + + + + + + + - - - - - - + + + + + + + + + + - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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_3DPRIM_QUADSTRIP = 8, + _3DPRIM_LINELIST_ADJ = 9, + _3DPRIM_LINESTRIP_ADJ = 10, + _3DPRIM_TRILIST_ADJ = 11, + _3DPRIM_TRISTRIP_ADJ = 12, + _3DPRIM_TRISTRIP_REVERSE = 13, + _3DPRIM_POLYGON = 14, + _3DPRIM_RECTLIST = 15, + _3DPRIM_LINELOOP = 16, + _3DPRIM_POINTLIST_BF = 17, + _3DPRIM_LINESTRIP_CONT = 18, + _3DPRIM_LINESTRIP_BF = 19, + _3DPRIM_LINESTRIP_CONT_BF = 20, + _3DPRIM_TRIFAN_NOSTIPPLE = 22, + _3DPRIM_PATCHLIST_1 = 32, + _3DPRIM_PATCHLIST_2 = 33, + _3DPRIM_PATCHLIST_3 = 34, + _3DPRIM_PATCHLIST_4 = 35, + _3DPRIM_PATCHLIST_5 = 36, + _3DPRIM_PATCHLIST_6 = 37, + _3DPRIM_PATCHLIST_7 = 38, + _3DPRIM_PATCHLIST_8 = 39, + _3DPRIM_PATCHLIST_9 = 40, + _3DPRIM_PATCHLIST_10 = 41, + _3DPRIM_PATCHLIST_11 = 42, + _3DPRIM_PATCHLIST_12 = 43, + _3DPRIM_PATCHLIST_13 = 44, + _3DPRIM_PATCHLIST_14 = 45, + _3DPRIM_PATCHLIST_15 = 46, + _3DPRIM_PATCHLIST_16 = 47, + _3DPRIM_PATCHLIST_17 = 48, + _3DPRIM_PATCHLIST_18 = 49, + _3DPRIM_PATCHLIST_19 = 50, + _3DPRIM_PATCHLIST_20 = 51, + _3DPRIM_PATCHLIST_21 = 52, + _3DPRIM_PATCHLIST_22 = 53, + _3DPRIM_PATCHLIST_23 = 54, + _3DPRIM_PATCHLIST_24 = 55, + _3DPRIM_PATCHLIST_25 = 56, + _3DPRIM_PATCHLIST_26 = 57, + _3DPRIM_PATCHLIST_27 = 58, + _3DPRIM_PATCHLIST_28 = 59, + _3DPRIM_PATCHLIST_29 = 60, + _3DPRIM_PATCHLIST_30 = 61, + _3DPRIM_PATCHLIST_31 = 62, + _3DPRIM_PATCHLIST_32 = 63, +}; + +enum GEN9_3D_Vertex_Component_Control { + VFCOMP_NOSTORE = 0, + VFCOMP_STORE_SRC = 1, + VFCOMP_STORE_0 = 2, + VFCOMP_STORE_1_FP = 3, + VFCOMP_STORE_1_INT = 4, + VFCOMP_STORE_PID = 7, +}; + +enum GEN9_COMPONENT_ENABLES { + CE_NONE = 0, + CE_X = 1, + CE_Y = 2, + CE_XY = 3, + CE_Z = 4, + CE_XZ = 5, + CE_YZ = 6, + CE_XYZ = 7, + CE_W = 8, + CE_XW = 9, + CE_YW = 10, + CE_XYW = 11, + CE_ZW = 12, + CE_XZW = 13, + CE_YZW = 14, + CE_XYZW = 15, +}; + +enum GEN9_Attribute_Component_Format { + ACF_DISABLED = 0, + ACF_XY = 1, + ACF_XYZ = 2, + ACF_XYZW = 3, +}; + +enum GEN9_WRAP_SHORTEST_ENABLE { + WSE_X = 1, + WSE_Y = 2, + WSE_XY = 3, + WSE_Z = 4, + WSE_XZ = 5, + WSE_YZ = 6, + WSE_XYZ = 7, + WSE_W = 8, + WSE_XW = 9, + WSE_YW = 10, + WSE_XYW = 11, + WSE_ZW = 12, + WSE_XZW = 13, + WSE_YZW = 14, + WSE_XYZW = 15, +}; + +enum GEN9_3D_Stencil_Operation { + STENCILOP_KEEP = 0, + STENCILOP_ZERO = 1, + STENCILOP_REPLACE = 2, + STENCILOP_INCRSAT = 3, + STENCILOP_DECRSAT = 4, + STENCILOP_INCR = 5, + STENCILOP_DECR = 6, + STENCILOP_INVERT = 7, +}; + +enum GEN9_3D_Color_Buffer_Blend_Factor { + BLENDFACTOR_ONE = 1, + BLENDFACTOR_SRC_COLOR = 2, + BLENDFACTOR_SRC_ALPHA = 3, + BLENDFACTOR_DST_ALPHA = 4, + BLENDFACTOR_DST_COLOR = 5, + BLENDFACTOR_SRC_ALPHA_SATURATE = 6, + BLENDFACTOR_CONST_COLOR = 7, + BLENDFACTOR_CONST_ALPHA = 8, + BLENDFACTOR_SRC1_COLOR = 9, + BLENDFACTOR_SRC1_ALPHA = 10, + BLENDFACTOR_ZERO = 17, + BLENDFACTOR_INV_SRC_COLOR = 18, + BLENDFACTOR_INV_SRC_ALPHA = 19, + BLENDFACTOR_INV_DST_ALPHA = 20, + BLENDFACTOR_INV_DST_COLOR = 21, + BLENDFACTOR_INV_CONST_COLOR = 23, + BLENDFACTOR_INV_CONST_ALPHA = 24, + BLENDFACTOR_INV_SRC1_COLOR = 25, + BLENDFACTOR_INV_SRC1_ALPHA = 26, +}; + +enum GEN9_3D_Color_Buffer_Blend_Function { + BLENDFUNCTION_ADD = 0, + BLENDFUNCTION_SUBTRACT = 1, + BLENDFUNCTION_REVERSE_SUBTRACT = 2, + BLENDFUNCTION_MIN = 3, + BLENDFUNCTION_MAX = 4, +}; + +enum GEN9_3D_Compare_Function { + COMPAREFUNCTION_ALWAYS = 0, + COMPAREFUNCTION_NEVER = 1, + COMPAREFUNCTION_LESS = 2, + COMPAREFUNCTION_EQUAL = 3, + COMPAREFUNCTION_LEQUAL = 4, + COMPAREFUNCTION_GREATER = 5, + COMPAREFUNCTION_NOTEQUAL = 6, + COMPAREFUNCTION_GEQUAL = 7, +}; + +enum GEN9_3D_Logic_Op_Function { + LOGICOP_CLEAR = 0, + LOGICOP_NOR = 1, + LOGICOP_AND_INVERTED = 2, + LOGICOP_COPY_INVERTED = 3, + LOGICOP_AND_REVERSE = 4, + LOGICOP_INVERT = 5, + LOGICOP_XOR = 6, + LOGICOP_NAND = 7, + LOGICOP_AND = 8, + LOGICOP_EQUIV = 9, + LOGICOP_NOOP = 10, + LOGICOP_OR_INVERTED = 11, + LOGICOP_COPY = 12, + LOGICOP_OR_REVERSE = 13, + LOGICOP_OR = 14, + LOGICOP_SET = 15, +}; + +enum GEN9_SURFACE_FORMAT { + SF_R32G32B32A32_FLOAT = 0, + SF_R32G32B32A32_SINT = 1, + SF_R32G32B32A32_UINT = 2, + SF_R32G32B32A32_UNORM = 3, + SF_R32G32B32A32_SNORM = 4, + SF_R64G64_FLOAT = 5, + SF_R32G32B32X32_FLOAT = 6, + SF_R32G32B32A32_SSCALED = 7, + SF_R32G32B32A32_USCALED = 8, + SF_R32G32B32A32_SFIXED = 32, + SF_R64G64_PASSTHRU = 33, + SF_R32G32B32_FLOAT = 64, + SF_R32G32B32_SINT = 65, + SF_R32G32B32_UINT = 66, + SF_R32G32B32_UNORM = 67, + SF_R32G32B32_SNORM = 68, + SF_R32G32B32_SSCALED = 69, + SF_R32G32B32_USCALED = 70, + SF_R32G32B32_SFIXED = 80, + SF_R16G16B16A16_UNORM = 128, + SF_R16G16B16A16_SNORM = 129, + SF_R16G16B16A16_SINT = 130, + SF_R16G16B16A16_UINT = 131, + SF_R16G16B16A16_FLOAT = 132, + SF_R32G32_FLOAT = 133, + SF_R32G32_SINT = 134, + SF_R32G32_UINT = 135, + SF_R32_FLOAT_X8X24_TYPELESS = 136, + SF_X32_TYPELESS_G8X24_UINT = 137, + SF_L32A32_FLOAT = 138, + SF_R32G32_UNORM = 139, + SF_R32G32_SNORM = 140, + SF_R64_FLOAT = 141, + SF_R16G16B16X16_UNORM = 142, + SF_R16G16B16X16_FLOAT = 143, + SF_A32X32_FLOAT = 144, + SF_L32X32_FLOAT = 145, + SF_I32X32_FLOAT = 146, + SF_R16G16B16A16_SSCALED = 147, + SF_R16G16B16A16_USCALED = 148, + SF_R32G32_SSCALED = 149, + SF_R32G32_USCALED = 150, + SF_R32G32_SFIXED = 160, + SF_R64_PASSTHRU = 161, + SF_B8G8R8A8_UNORM = 192, + SF_B8G8R8A8_UNORM_SRGB = 193, + SF_R10G10B10A2_UNORM = 194, + SF_R10G10B10A2_UNORM_SRGB = 195, + SF_R10G10B10A2_UINT = 196, + SF_R10G10B10_SNORM_A2_UNORM = 197, + SF_R8G8B8A8_UNORM = 199, + SF_R8G8B8A8_UNORM_SRGB = 200, + SF_R8G8B8A8_SNORM = 201, + SF_R8G8B8A8_SINT = 202, + SF_R8G8B8A8_UINT = 203, + SF_R16G16_UNORM = 204, + SF_R16G16_SNORM = 205, + SF_R16G16_SINT = 206, + SF_R16G16_UINT = 207, + SF_R16G16_FLOAT = 208, + SF_B10G10R10A2_UNORM = 209, + SF_B10G10R10A2_UNORM_SRGB = 210, + SF_R11G11B10_FLOAT = 211, + SF_R32_SINT = 214, + SF_R32_UINT = 215, + SF_R32_FLOAT = 216, + SF_R24_UNORM_X8_TYPELESS = 217, + SF_X24_TYPELESS_G8_UINT = 218, + SF_L32_UNORM = 221, + SF_A32_UNORM = 222, + SF_L16A16_UNORM = 223, + SF_I24X8_UNORM = 224, + SF_L24X8_UNORM = 225, + SF_A24X8_UNORM = 226, + SF_I32_FLOAT = 227, + SF_L32_FLOAT = 228, + SF_A32_FLOAT = 229, + SF_X8B8_UNORM_G8R8_SNORM = 230, + SF_A8X8_UNORM_G8R8_SNORM = 231, + SF_B8X8_UNORM_G8R8_SNORM = 232, + SF_B8G8R8X8_UNORM = 233, + SF_B8G8R8X8_UNORM_SRGB = 234, + SF_R8G8B8X8_UNORM = 235, + SF_R8G8B8X8_UNORM_SRGB = 236, + SF_R9G9B9E5_SHAREDEXP = 237, + SF_B10G10R10X2_UNORM = 238, + SF_L16A16_FLOAT = 240, + SF_R32_UNORM = 241, + SF_R32_SNORM = 242, + SF_R10G10B10X2_USCALED = 243, + SF_R8G8B8A8_SSCALED = 244, + SF_R8G8B8A8_USCALED = 245, + SF_R16G16_SSCALED = 246, + SF_R16G16_USCALED = 247, + SF_R32_SSCALED = 248, + SF_R32_USCALED = 249, + SF_B5G6R5_UNORM = 256, + SF_B5G6R5_UNORM_SRGB = 257, + SF_B5G5R5A1_UNORM = 258, + SF_B5G5R5A1_UNORM_SRGB = 259, + SF_B4G4R4A4_UNORM = 260, + SF_B4G4R4A4_UNORM_SRGB = 261, + SF_R8G8_UNORM = 262, + SF_R8G8_SNORM = 263, + SF_R8G8_SINT = 264, + SF_R8G8_UINT = 265, + SF_R16_UNORM = 266, + SF_R16_SNORM = 267, + SF_R16_SINT = 268, + SF_R16_UINT = 269, + SF_R16_FLOAT = 270, + SF_A8P8_UNORM_PALETTE0 = 271, + SF_A8P8_UNORM_PALETTE1 = 272, + SF_I16_UNORM = 273, + SF_L16_UNORM = 274, + SF_A16_UNORM = 275, + SF_L8A8_UNORM = 276, + SF_I16_FLOAT = 277, + SF_L16_FLOAT = 278, + SF_A16_FLOAT = 279, + SF_L8A8_UNORM_SRGB = 280, + SF_R5G5_SNORM_B6_UNORM = 281, + SF_B5G5R5X1_UNORM = 282, + SF_B5G5R5X1_UNORM_SRGB = 283, + SF_R8G8_SSCALED = 284, + SF_R8G8_USCALED = 285, + SF_R16_SSCALED = 286, + SF_R16_USCALED = 287, + SF_P8A8_UNORM_PALETTE0 = 290, + SF_P8A8_UNORM_PALETTE1 = 291, + SF_A1B5G5R5_UNORM = 292, + SF_A4B4G4R4_UNORM = 293, + SF_L8A8_UINT = 294, + SF_L8A8_SINT = 295, + SF_R8_UNORM = 320, + SF_R8_SNORM = 321, + SF_R8_SINT = 322, + SF_R8_UINT = 323, + SF_A8_UNORM = 324, + SF_I8_UNORM = 325, + SF_L8_UNORM = 326, + SF_P4A4_UNORM_PALETTE0 = 327, + SF_A4P4_UNORM_PALETTE0 = 328, + SF_R8_SSCALED = 329, + SF_R8_USCALED = 330, + SF_P8_UNORM_PALETTE0 = 331, + SF_L8_UNORM_SRGB = 332, + SF_P8_UNORM_PALETTE1 = 333, + SF_P4A4_UNORM_PALETTE1 = 334, + SF_A4P4_UNORM_PALETTE1 = 335, + SF_Y8_UNORM = 336, + SF_L8_UINT = 338, + SF_L8_SINT = 339, + SF_I8_UINT = 340, + SF_I8_SINT = 341, + SF_DXT1_RGB_SRGB = 384, + SF_R1_UNORM = 385, + SF_YCRCB_NORMAL = 386, + SF_YCRCB_SWAPUVY = 387, + SF_P2_UNORM_PALETTE0 = 388, + SF_P2_UNORM_PALETTE1 = 389, + SF_BC1_UNORM = 390, + SF_BC2_UNORM = 391, + SF_BC3_UNORM = 392, + SF_BC4_UNORM = 393, + SF_BC5_UNORM = 394, + SF_BC1_UNORM_SRGB = 395, + SF_BC2_UNORM_SRGB = 396, + SF_BC3_UNORM_SRGB = 397, + SF_MONO8 = 398, + SF_YCRCB_SWAPUV = 399, + SF_YCRCB_SWAPY = 400, + SF_DXT1_RGB = 401, + SF_FXT1 = 402, + SF_R8G8B8_UNORM = 403, + SF_R8G8B8_SNORM = 404, + SF_R8G8B8_SSCALED = 405, + SF_R8G8B8_USCALED = 406, + SF_R64G64B64A64_FLOAT = 407, + SF_R64G64B64_FLOAT = 408, + SF_BC4_SNORM = 409, + SF_BC5_SNORM = 410, + SF_R16G16B16_FLOAT = 411, + SF_R16G16B16_UNORM = 412, + SF_R16G16B16_SNORM = 413, + SF_R16G16B16_SSCALED = 414, + SF_R16G16B16_USCALED = 415, + SF_BC6H_SF16 = 417, + SF_BC7_UNORM = 418, + SF_BC7_UNORM_SRGB = 419, + SF_BC6H_UF16 = 420, + SF_PLANAR_420_8 = 421, + SF_R8G8B8_UNORM_SRGB = 424, + SF_ETC1_RGB8 = 425, + SF_ETC2_RGB8 = 426, + SF_EAC_R11 = 427, + SF_EAC_RG11 = 428, + SF_EAC_SIGNED_R11 = 429, + SF_EAC_SIGNED_RG11 = 430, + SF_ETC2_SRGB8 = 431, + SF_R16G16B16_UINT = 432, + SF_R16G16B16_SINT = 433, + SF_R32_SFIXED = 434, + SF_R10G10B10A2_SNORM = 435, + SF_R10G10B10A2_USCALED = 436, + SF_R10G10B10A2_SSCALED = 437, + SF_R10G10B10A2_SINT = 438, + SF_B10G10R10A2_SNORM = 439, + SF_B10G10R10A2_USCALED = 440, + SF_B10G10R10A2_SSCALED = 441, + SF_B10G10R10A2_UINT = 442, + SF_B10G10R10A2_SINT = 443, + SF_R64G64B64A64_PASSTHRU = 444, + SF_R64G64B64_PASSTHRU = 445, + SF_ETC2_RGB8_PTA = 448, + SF_ETC2_SRGB8_PTA = 449, + SF_ETC2_EAC_RGBA8 = 450, + SF_ETC2_EAC_SRGB8_A8 = 451, + SF_R8G8B8_UINT = 456, + SF_R8G8B8_SINT = 457, + SF_RAW = 511, +}; + +enum GEN9_ShaderChannelSelect { + SCS_ZERO = 0, + SCS_ONE = 1, + SCS_RED = 4, + SCS_GREEN = 5, + SCS_BLUE = 6, + SCS_ALPHA = 7, +}; + +enum GEN9_TextureCoordinateMode { + TCM_WRAP = 0, + TCM_MIRROR = 1, + TCM_CLAMP = 2, + TCM_CUBE = 3, + TCM_CLAMP_BORDER = 4, + TCM_MIRROR_ONCE = 5, + TCM_HALF_BORDER = 6, +}; + #define GEN9_3DSTATE_CONSTANT_BODY_length 10 struct GEN9_3DSTATE_CONSTANT_BODY { uint32_t ConstantBuffer1ReadLength; @@ -259,7 +683,8 @@ struct GEN9_VERTEX_BUFFER_STATE { uint32_t VertexBufferIndex; struct GEN9_MEMORY_OBJECT_CONTROL_STATE MemoryObjectControlState; - uint32_t AddressModifyEnable; + uint32_t VertexBufferMOCS; + bool AddressModifyEnable; bool NullVertexBuffer; uint32_t BufferPitch; __gen_address_type BufferStartingAddress; @@ -278,6 +703,7 @@ dw[0] = __gen_uint(values->VertexBufferIndex, 26, 31) | __gen_uint(v0_0, 16, 22) | + __gen_uint(values->VertexBufferMOCS, 16, 22) | __gen_uint(values->AddressModifyEnable, 14, 14) | __gen_uint(values->NullVertexBuffer, 13, 13) | __gen_uint(values->BufferPitch, 0, 11); @@ -294,14 +720,14 @@ #define GEN9_VERTEX_ELEMENT_STATE_length 2 struct GEN9_VERTEX_ELEMENT_STATE { uint32_t VertexBufferIndex; - uint32_t Valid; - uint32_t SourceElementFormat; + bool Valid; + enum GEN9_SURFACE_FORMAT SourceElementFormat; bool EdgeFlagEnable; uint32_t SourceElementOffset; - uint32_t Component0Control; - uint32_t Component1Control; - uint32_t Component2Control; - uint32_t Component3Control; + enum GEN9_3D_Vertex_Component_Control Component0Control; + enum GEN9_3D_Vertex_Component_Control Component1Control; + enum GEN9_3D_Vertex_Component_Control Component2Control; + enum GEN9_3D_Vertex_Component_Control Component3Control; }; static inline void @@ -514,7 +940,7 @@ #define GEN9_BLEND_STATE_ENTRY_length 2 struct GEN9_BLEND_STATE_ENTRY { bool LogicOpEnable; - uint32_t LogicOpFunction; + enum GEN9_3D_Logic_Op_Function LogicOpFunction; bool PreBlendSourceOnlyClampEnable; uint32_t ColorClampRange; #define COLORCLAMP_UNORM 0 @@ -523,12 +949,12 @@ bool PreBlendColorClampEnable; bool PostBlendColorClampEnable; bool ColorBufferBlendEnable; - uint32_t SourceBlendFactor; - uint32_t DestinationBlendFactor; - uint32_t ColorBlendFunction; - uint32_t SourceAlphaBlendFactor; - uint32_t DestinationAlphaBlendFactor; - uint32_t AlphaBlendFunction; + enum GEN9_3D_Color_Buffer_Blend_Factor SourceBlendFactor; + enum GEN9_3D_Color_Buffer_Blend_Factor DestinationBlendFactor; + enum GEN9_3D_Color_Buffer_Blend_Function ColorBlendFunction; + enum GEN9_3D_Color_Buffer_Blend_Factor SourceAlphaBlendFactor; + enum GEN9_3D_Color_Buffer_Blend_Factor DestinationAlphaBlendFactor; + enum GEN9_3D_Color_Buffer_Blend_Function AlphaBlendFunction; bool WriteDisableAlpha; bool WriteDisableRed; bool WriteDisableGreen; @@ -570,7 +996,7 @@ bool AlphaToOneEnable; bool AlphaToCoverageDitherEnable; bool AlphaTestEnable; - uint32_t AlphaTestFunction; + enum GEN9_3D_Compare_Function AlphaTestFunction; bool ColorDitherEnable; uint32_t XDitherOffset; uint32_t YDitherOffset; @@ -695,11 +1121,10 @@ #define GEN9_INTERFACE_DESCRIPTOR_DATA_length 8 struct GEN9_INTERFACE_DESCRIPTOR_DATA { uint64_t KernelStartPointer; - uint64_t KernelStartPointerHigh; uint32_t DenormMode; #define Ftz 0 #define SetByKernel 1 - uint32_t SingleProgramFlow; + bool SingleProgramFlow; uint32_t ThreadPriority; #define NormalPriority 0 #define HighPriority 1 @@ -718,7 +1143,7 @@ #define Between13and16samplersused 4 uint64_t BindingTablePointer; uint32_t BindingTableEntryCount; - uint32_t ConstantIndirectURBEntryReadLength; + uint32_t ConstantURBEntryReadLength; uint32_t ConstantURBEntryReadOffset; uint32_t RoundingMode; #define RTNE 0 @@ -746,11 +1171,10 @@ { uint32_t * restrict dw = (uint32_t * restrict) dst; - dw[0] = - __gen_offset(values->KernelStartPointer, 6, 31); - - dw[1] = - __gen_offset(values->KernelStartPointerHigh, 0, 15); + const uint64_t v0 = + __gen_offset(values->KernelStartPointer, 6, 47); + dw[0] = v0; + dw[1] = v0 >> 32; dw[2] = __gen_uint(values->DenormMode, 19, 19) | @@ -770,7 +1194,7 @@ __gen_uint(values->BindingTableEntryCount, 0, 4); dw[5] = - __gen_uint(values->ConstantIndirectURBEntryReadLength, 16, 31) | + __gen_uint(values->ConstantURBEntryReadLength, 16, 31) | __gen_uint(values->ConstantURBEntryReadOffset, 0, 15); dw[6] = @@ -854,7 +1278,7 @@ #define SURFTYPE_STRBUF 5 #define SURFTYPE_NULL 7 bool SurfaceArray; - uint32_t SurfaceFormat; + enum GEN9_SURFACE_FORMAT SurfaceFormat; uint32_t SurfaceVerticalAlignment; #define VALIGN4 1 #define VALIGN8 2 @@ -909,8 +1333,8 @@ #define MULTISAMPLECOUNT_8 3 #define MULTISAMPLECOUNT_16 4 uint32_t MultisamplePositionPaletteIndex; - uint64_t XOffset; - uint64_t YOffset; + uint32_t XOffset; + uint32_t YOffset; bool EWADisableForCube; uint32_t TiledResourceMode; #define NONE 0 @@ -1009,8 +1433,8 @@ __gen_uint(values->MultisamplePositionPaletteIndex, 0, 2); dw[5] = - __gen_offset(values->XOffset, 25, 31) | - __gen_offset(values->YOffset, 21, 23) | + __gen_uint(values->XOffset, 25, 31) | + __gen_uint(values->YOffset, 21, 23) | __gen_uint(values->EWADisableForCube, 20, 20) | __gen_uint(values->TiledResourceMode, 18, 19) | __gen_uint(values->CoherencyType, 14, 14) | @@ -1080,6 +1504,41 @@ __gen_sfixed(values->FilterCoefficient, 0, 7, 6); } +#define GEN9_SAMPLER_BORDER_COLOR_STATE_length 4 +struct GEN9_SAMPLER_BORDER_COLOR_STATE { + float BorderColorFloatRed; + float BorderColorFloatGreen; + float BorderColorFloatBlue; + float BorderColorFloatAlpha; + uint32_t BorderColor32bitRed; + uint32_t BorderColor32bitGreen; + uint32_t BorderColor32bitBlue; + uint32_t BorderColor32bitAlpha; +}; + +static inline void +GEN9_SAMPLER_BORDER_COLOR_STATE_pack(__gen_user_data *data, void * restrict dst, + const struct GEN9_SAMPLER_BORDER_COLOR_STATE * restrict values) +{ + uint32_t * restrict dw = (uint32_t * restrict) dst; + + dw[0] = + __gen_float(values->BorderColorFloatRed) | + __gen_uint(values->BorderColor32bitRed, 0, 31); + + dw[1] = + __gen_float(values->BorderColorFloatGreen) | + __gen_uint(values->BorderColor32bitGreen, 0, 31); + + dw[2] = + __gen_float(values->BorderColorFloatBlue) | + __gen_uint(values->BorderColor32bitBlue, 0, 31); + + dw[3] = + __gen_float(values->BorderColorFloatAlpha) | + __gen_uint(values->BorderColor32bitAlpha, 0, 31); +} + #define GEN9_SAMPLER_STATE_length 4 struct GEN9_SAMPLER_STATE { bool SamplerDisable; @@ -1285,416 +1744,6 @@ __gen_sfixed(values->Table1YFilterCoefficientn4, 0, 7, 6); } -/* enum GEN9_3D_Prim_Topo_Type */ -#define _3DPRIM_POINTLIST 1 -#define _3DPRIM_LINELIST 2 -#define _3DPRIM_LINESTRIP 3 -#define _3DPRIM_TRILIST 4 -#define _3DPRIM_TRISTRIP 5 -#define _3DPRIM_TRIFAN 6 -#define _3DPRIM_QUADLIST 7 -#define _3DPRIM_QUADSTRIP 8 -#define _3DPRIM_LINELIST_ADJ 9 -#define _3DPRIM_LINESTRIP_ADJ 10 -#define _3DPRIM_TRILIST_ADJ 11 -#define _3DPRIM_TRISTRIP_ADJ 12 -#define _3DPRIM_TRISTRIP_REVERSE 13 -#define _3DPRIM_POLYGON 14 -#define _3DPRIM_RECTLIST 15 -#define _3DPRIM_LINELOOP 16 -#define _3DPRIM_POINTLIST_BF 17 -#define _3DPRIM_LINESTRIP_CONT 18 -#define _3DPRIM_LINESTRIP_BF 19 -#define _3DPRIM_LINESTRIP_CONT_BF 20 -#define _3DPRIM_TRIFAN_NOSTIPPLE 22 -#define _3DPRIM_PATCHLIST_1 32 -#define _3DPRIM_PATCHLIST_2 33 -#define _3DPRIM_PATCHLIST_3 34 -#define _3DPRIM_PATCHLIST_4 35 -#define _3DPRIM_PATCHLIST_5 36 -#define _3DPRIM_PATCHLIST_6 37 -#define _3DPRIM_PATCHLIST_7 38 -#define _3DPRIM_PATCHLIST_8 39 -#define _3DPRIM_PATCHLIST_9 40 -#define _3DPRIM_PATCHLIST_10 41 -#define _3DPRIM_PATCHLIST_11 42 -#define _3DPRIM_PATCHLIST_12 43 -#define _3DPRIM_PATCHLIST_13 44 -#define _3DPRIM_PATCHLIST_14 45 -#define _3DPRIM_PATCHLIST_15 46 -#define _3DPRIM_PATCHLIST_16 47 -#define _3DPRIM_PATCHLIST_17 48 -#define _3DPRIM_PATCHLIST_18 49 -#define _3DPRIM_PATCHLIST_19 50 -#define _3DPRIM_PATCHLIST_20 51 -#define _3DPRIM_PATCHLIST_21 52 -#define _3DPRIM_PATCHLIST_22 53 -#define _3DPRIM_PATCHLIST_23 54 -#define _3DPRIM_PATCHLIST_24 55 -#define _3DPRIM_PATCHLIST_25 56 -#define _3DPRIM_PATCHLIST_26 57 -#define _3DPRIM_PATCHLIST_27 58 -#define _3DPRIM_PATCHLIST_28 59 -#define _3DPRIM_PATCHLIST_29 60 -#define _3DPRIM_PATCHLIST_30 61 -#define _3DPRIM_PATCHLIST_31 62 -#define _3DPRIM_PATCHLIST_32 63 - -/* enum GEN9_3D_Vertex_Component_Control */ -#define VFCOMP_NOSTORE 0 -#define VFCOMP_STORE_SRC 1 -#define VFCOMP_STORE_0 2 -#define VFCOMP_STORE_1_FP 3 -#define VFCOMP_STORE_1_INT 4 -#define VFCOMP_STORE_PID 7 - -/* enum GEN9_COMPONENT_ENABLES */ -#define CE_NONE 0 -#define CE_X 1 -#define CE_Y 2 -#define CE_XY 3 -#define CE_Z 4 -#define CE_XZ 5 -#define CE_YZ 6 -#define CE_XYZ 7 -#define CE_W 8 -#define CE_XW 9 -#define CE_YW 10 -#define CE_XYW 11 -#define CE_ZW 12 -#define CE_XZW 13 -#define CE_YZW 14 -#define CE_XYZW 15 - -/* enum GEN9_Attribute_Component_Format */ -#define ACF_DISABLED 0 -#define ACF_XY 1 -#define ACF_XYZ 2 -#define ACF_XYZW 3 - -/* enum GEN9_WRAP_SHORTEST_ENABLE */ -#define WSE_X 1 -#define WSE_Y 2 -#define WSE_XY 3 -#define WSE_Z 4 -#define WSE_XZ 5 -#define WSE_YZ 6 -#define WSE_XYZ 7 -#define WSE_W 8 -#define WSE_XW 9 -#define WSE_YW 10 -#define WSE_XYW 11 -#define WSE_ZW 12 -#define WSE_XZW 13 -#define WSE_YZW 14 -#define WSE_XYZW 15 - -/* enum GEN9_3D_Stencil_Operation */ -#define STENCILOP_KEEP 0 -#define STENCILOP_ZERO 1 -#define STENCILOP_REPLACE 2 -#define STENCILOP_INCRSAT 3 -#define STENCILOP_DECRSAT 4 -#define STENCILOP_INCR 5 -#define STENCILOP_DECR 6 -#define STENCILOP_INVERT 7 - -/* enum GEN9_3D_Color_Buffer_Blend_Factor */ -#define BLENDFACTOR_ONE 1 -#define BLENDFACTOR_SRC_COLOR 2 -#define BLENDFACTOR_SRC_ALPHA 3 -#define BLENDFACTOR_DST_ALPHA 4 -#define BLENDFACTOR_DST_COLOR 5 -#define BLENDFACTOR_SRC_ALPHA_SATURATE 6 -#define BLENDFACTOR_CONST_COLOR 7 -#define BLENDFACTOR_CONST_ALPHA 8 -#define BLENDFACTOR_SRC1_COLOR 9 -#define BLENDFACTOR_SRC1_ALPHA 10 -#define BLENDFACTOR_ZERO 17 -#define BLENDFACTOR_INV_SRC_COLOR 18 -#define BLENDFACTOR_INV_SRC_ALPHA 19 -#define BLENDFACTOR_INV_DST_ALPHA 20 -#define BLENDFACTOR_INV_DST_COLOR 21 -#define BLENDFACTOR_INV_CONST_COLOR 23 -#define BLENDFACTOR_INV_CONST_ALPHA 24 -#define BLENDFACTOR_INV_SRC1_COLOR 25 -#define BLENDFACTOR_INV_SRC1_ALPHA 26 - -/* enum GEN9_3D_Color_Buffer_Blend_Function */ -#define BLENDFUNCTION_ADD 0 -#define BLENDFUNCTION_SUBTRACT 1 -#define BLENDFUNCTION_REVERSE_SUBTRACT 2 -#define BLENDFUNCTION_MIN 3 -#define BLENDFUNCTION_MAX 4 - -/* enum GEN9_3D_Compare_Function */ -#define COMPAREFUNCTION_ALWAYS 0 -#define COMPAREFUNCTION_NEVER 1 -#define COMPAREFUNCTION_LESS 2 -#define COMPAREFUNCTION_EQUAL 3 -#define COMPAREFUNCTION_LEQUAL 4 -#define COMPAREFUNCTION_GREATER 5 -#define COMPAREFUNCTION_NOTEQUAL 6 -#define COMPAREFUNCTION_GEQUAL 7 - -/* enum GEN9_3D_Logic_Op_Function */ -#define LOGICOP_CLEAR 0 -#define LOGICOP_NOR 1 -#define LOGICOP_AND_INVERTED 2 -#define LOGICOP_COPY_INVERTED 3 -#define LOGICOP_AND_REVERSE 4 -#define LOGICOP_INVERT 5 -#define LOGICOP_XOR 6 -#define LOGICOP_NAND 7 -#define LOGICOP_AND 8 -#define LOGICOP_EQUIV 9 -#define LOGICOP_NOOP 10 -#define LOGICOP_OR_INVERTED 11 -#define LOGICOP_COPY 12 -#define LOGICOP_OR_REVERSE 13 -#define LOGICOP_OR 14 -#define LOGICOP_SET 15 - -/* enum GEN9_SURFACE_FORMAT */ -#define SF_R32G32B32A32_FLOAT 0 -#define SF_R32G32B32A32_SINT 1 -#define SF_R32G32B32A32_UINT 2 -#define SF_R32G32B32A32_UNORM 3 -#define SF_R32G32B32A32_SNORM 4 -#define SF_R64G64_FLOAT 5 -#define SF_R32G32B32X32_FLOAT 6 -#define SF_R32G32B32A32_SSCALED 7 -#define SF_R32G32B32A32_USCALED 8 -#define SF_R32G32B32A32_SFIXED 32 -#define SF_R64G64_PASSTHRU 33 -#define SF_R32G32B32_FLOAT 64 -#define SF_R32G32B32_SINT 65 -#define SF_R32G32B32_UINT 66 -#define SF_R32G32B32_UNORM 67 -#define SF_R32G32B32_SNORM 68 -#define SF_R32G32B32_SSCALED 69 -#define SF_R32G32B32_USCALED 70 -#define SF_R32G32B32_SFIXED 80 -#define SF_R16G16B16A16_UNORM 128 -#define SF_R16G16B16A16_SNORM 129 -#define SF_R16G16B16A16_SINT 130 -#define SF_R16G16B16A16_UINT 131 -#define SF_R16G16B16A16_FLOAT 132 -#define SF_R32G32_FLOAT 133 -#define SF_R32G32_SINT 134 -#define SF_R32G32_UINT 135 -#define SF_R32_FLOAT_X8X24_TYPELESS 136 -#define SF_X32_TYPELESS_G8X24_UINT 137 -#define SF_L32A32_FLOAT 138 -#define SF_R32G32_UNORM 139 -#define SF_R32G32_SNORM 140 -#define SF_R64_FLOAT 141 -#define SF_R16G16B16X16_UNORM 142 -#define SF_R16G16B16X16_FLOAT 143 -#define SF_A32X32_FLOAT 144 -#define SF_L32X32_FLOAT 145 -#define SF_I32X32_FLOAT 146 -#define SF_R16G16B16A16_SSCALED 147 -#define SF_R16G16B16A16_USCALED 148 -#define SF_R32G32_SSCALED 149 -#define SF_R32G32_USCALED 150 -#define SF_R32G32_SFIXED 160 -#define SF_R64_PASSTHRU 161 -#define SF_B8G8R8A8_UNORM 192 -#define SF_B8G8R8A8_UNORM_SRGB 193 -#define SF_R10G10B10A2_UNORM 194 -#define SF_R10G10B10A2_UNORM_SRGB 195 -#define SF_R10G10B10A2_UINT 196 -#define SF_R10G10B10_SNORM_A2_UNORM 197 -#define SF_R8G8B8A8_UNORM 199 -#define SF_R8G8B8A8_UNORM_SRGB 200 -#define SF_R8G8B8A8_SNORM 201 -#define SF_R8G8B8A8_SINT 202 -#define SF_R8G8B8A8_UINT 203 -#define SF_R16G16_UNORM 204 -#define SF_R16G16_SNORM 205 -#define SF_R16G16_SINT 206 -#define SF_R16G16_UINT 207 -#define SF_R16G16_FLOAT 208 -#define SF_B10G10R10A2_UNORM 209 -#define SF_B10G10R10A2_UNORM_SRGB 210 -#define SF_R11G11B10_FLOAT 211 -#define SF_R32_SINT 214 -#define SF_R32_UINT 215 -#define SF_R32_FLOAT 216 -#define SF_R24_UNORM_X8_TYPELESS 217 -#define SF_X24_TYPELESS_G8_UINT 218 -#define SF_L32_UNORM 221 -#define SF_A32_UNORM 222 -#define SF_L16A16_UNORM 223 -#define SF_I24X8_UNORM 224 -#define SF_L24X8_UNORM 225 -#define SF_A24X8_UNORM 226 -#define SF_I32_FLOAT 227 -#define SF_L32_FLOAT 228 -#define SF_A32_FLOAT 229 -#define SF_X8B8_UNORM_G8R8_SNORM 230 -#define SF_A8X8_UNORM_G8R8_SNORM 231 -#define SF_B8X8_UNORM_G8R8_SNORM 232 -#define SF_B8G8R8X8_UNORM 233 -#define SF_B8G8R8X8_UNORM_SRGB 234 -#define SF_R8G8B8X8_UNORM 235 -#define SF_R8G8B8X8_UNORM_SRGB 236 -#define SF_R9G9B9E5_SHAREDEXP 237 -#define SF_B10G10R10X2_UNORM 238 -#define SF_L16A16_FLOAT 240 -#define SF_R32_UNORM 241 -#define SF_R32_SNORM 242 -#define SF_R10G10B10X2_USCALED 243 -#define SF_R8G8B8A8_SSCALED 244 -#define SF_R8G8B8A8_USCALED 245 -#define SF_R16G16_SSCALED 246 -#define SF_R16G16_USCALED 247 -#define SF_R32_SSCALED 248 -#define SF_R32_USCALED 249 -#define SF_B5G6R5_UNORM 256 -#define SF_B5G6R5_UNORM_SRGB 257 -#define SF_B5G5R5A1_UNORM 258 -#define SF_B5G5R5A1_UNORM_SRGB 259 -#define SF_B4G4R4A4_UNORM 260 -#define SF_B4G4R4A4_UNORM_SRGB 261 -#define SF_R8G8_UNORM 262 -#define SF_R8G8_SNORM 263 -#define SF_R8G8_SINT 264 -#define SF_R8G8_UINT 265 -#define SF_R16_UNORM 266 -#define SF_R16_SNORM 267 -#define SF_R16_SINT 268 -#define SF_R16_UINT 269 -#define SF_R16_FLOAT 270 -#define SF_A8P8_UNORM_PALETTE0 271 -#define SF_A8P8_UNORM_PALETTE1 272 -#define SF_I16_UNORM 273 -#define SF_L16_UNORM 274 -#define SF_A16_UNORM 275 -#define SF_L8A8_UNORM 276 -#define SF_I16_FLOAT 277 -#define SF_L16_FLOAT 278 -#define SF_A16_FLOAT 279 -#define SF_L8A8_UNORM_SRGB 280 -#define SF_R5G5_SNORM_B6_UNORM 281 -#define SF_B5G5R5X1_UNORM 282 -#define SF_B5G5R5X1_UNORM_SRGB 283 -#define SF_R8G8_SSCALED 284 -#define SF_R8G8_USCALED 285 -#define SF_R16_SSCALED 286 -#define SF_R16_USCALED 287 -#define SF_P8A8_UNORM_PALETTE0 290 -#define SF_P8A8_UNORM_PALETTE1 291 -#define SF_A1B5G5R5_UNORM 292 -#define SF_A4B4G4R4_UNORM 293 -#define SF_L8A8_UINT 294 -#define SF_L8A8_SINT 295 -#define SF_R8_UNORM 320 -#define SF_R8_SNORM 321 -#define SF_R8_SINT 322 -#define SF_R8_UINT 323 -#define SF_A8_UNORM 324 -#define SF_I8_UNORM 325 -#define SF_L8_UNORM 326 -#define SF_P4A4_UNORM_PALETTE0 327 -#define SF_A4P4_UNORM_PALETTE0 328 -#define SF_R8_SSCALED 329 -#define SF_R8_USCALED 330 -#define SF_P8_UNORM_PALETTE0 331 -#define SF_L8_UNORM_SRGB 332 -#define SF_P8_UNORM_PALETTE1 333 -#define SF_P4A4_UNORM_PALETTE1 334 -#define SF_A4P4_UNORM_PALETTE1 335 -#define SF_Y8_UNORM 336 -#define SF_L8_UINT 338 -#define SF_L8_SINT 339 -#define SF_I8_UINT 340 -#define SF_I8_SINT 341 -#define SF_DXT1_RGB_SRGB 384 -#define SF_R1_UNORM 385 -#define SF_YCRCB_NORMAL 386 -#define SF_YCRCB_SWAPUVY 387 -#define SF_P2_UNORM_PALETTE0 388 -#define SF_P2_UNORM_PALETTE1 389 -#define SF_BC1_UNORM 390 -#define SF_BC2_UNORM 391 -#define SF_BC3_UNORM 392 -#define SF_BC4_UNORM 393 -#define SF_BC5_UNORM 394 -#define SF_BC1_UNORM_SRGB 395 -#define SF_BC2_UNORM_SRGB 396 -#define SF_BC3_UNORM_SRGB 397 -#define SF_MONO8 398 -#define SF_YCRCB_SWAPUV 399 -#define SF_YCRCB_SWAPY 400 -#define SF_DXT1_RGB 401 -#define SF_FXT1 402 -#define SF_R8G8B8_UNORM 403 -#define SF_R8G8B8_SNORM 404 -#define SF_R8G8B8_SSCALED 405 -#define SF_R8G8B8_USCALED 406 -#define SF_R64G64B64A64_FLOAT 407 -#define SF_R64G64B64_FLOAT 408 -#define SF_BC4_SNORM 409 -#define SF_BC5_SNORM 410 -#define SF_R16G16B16_FLOAT 411 -#define SF_R16G16B16_UNORM 412 -#define SF_R16G16B16_SNORM 413 -#define SF_R16G16B16_SSCALED 414 -#define SF_R16G16B16_USCALED 415 -#define SF_BC6H_SF16 417 -#define SF_BC7_UNORM 418 -#define SF_BC7_UNORM_SRGB 419 -#define SF_BC6H_UF16 420 -#define SF_PLANAR_420_8 421 -#define SF_R8G8B8_UNORM_SRGB 424 -#define SF_ETC1_RGB8 425 -#define SF_ETC2_RGB8 426 -#define SF_EAC_R11 427 -#define SF_EAC_RG11 428 -#define SF_EAC_SIGNED_R11 429 -#define SF_EAC_SIGNED_RG11 430 -#define SF_ETC2_SRGB8 431 -#define SF_R16G16B16_UINT 432 -#define SF_R16G16B16_SINT 433 -#define SF_R32_SFIXED 434 -#define SF_R10G10B10A2_SNORM 435 -#define SF_R10G10B10A2_USCALED 436 -#define SF_R10G10B10A2_SSCALED 437 -#define SF_R10G10B10A2_SINT 438 -#define SF_B10G10R10A2_SNORM 439 -#define SF_B10G10R10A2_USCALED 440 -#define SF_B10G10R10A2_SSCALED 441 -#define SF_B10G10R10A2_UINT 442 -#define SF_B10G10R10A2_SINT 443 -#define SF_R64G64B64A64_PASSTHRU 444 -#define SF_R64G64B64_PASSTHRU 445 -#define SF_ETC2_RGB8_PTA 448 -#define SF_ETC2_SRGB8_PTA 449 -#define SF_ETC2_EAC_RGBA8 450 -#define SF_ETC2_EAC_SRGB8_A8 451 -#define SF_R8G8B8_UINT 456 -#define SF_R8G8B8_SINT 457 -#define SF_RAW 511 - -/* enum GEN9_ShaderChannelSelect */ -#define SCS_ZERO 0 -#define SCS_ONE 1 -#define SCS_RED 4 -#define SCS_GREEN 5 -#define SCS_BLUE 6 -#define SCS_ALPHA 7 - -/* enum GEN9_TextureCoordinateMode */ -#define TCM_WRAP 0 -#define TCM_MIRROR 1 -#define TCM_CLAMP 2 -#define TCM_CUBE 3 -#define TCM_CLAMP_BORDER 4 -#define TCM_MIRROR_ONCE 5 -#define TCM_HALF_BORDER 6 - #define GEN9_3DPRIMITIVE_length 7 #define GEN9_3DPRIMITIVE_length_bias 2 #define GEN9_3DPRIMITIVE_header \ @@ -1717,7 +1766,7 @@ uint32_t VertexAccessType; #define SEQUENTIAL 0 #define RANDOM 1 - uint32_t PrimitiveTopologyType; + enum GEN9_3D_Prim_Topo_Type PrimitiveTopologyType; uint32_t VertexCountPerInstance; uint32_t StartVertexLocation; uint32_t InstanceCount; @@ -2711,6 +2760,7 @@ uint32_t Depth; uint32_t MinimumArrayElement; struct GEN9_MEMORY_OBJECT_CONTROL_STATE DepthBufferObjectControlState; + uint32_t DepthBufferMOCS; uint32_t TiledResourceMode; #define NONE 0 #define TILEYF 1 @@ -2757,7 +2807,8 @@ dw[5] = __gen_uint(values->Depth, 21, 31) | __gen_uint(values->MinimumArrayElement, 10, 20) | - __gen_uint(v5_0, 0, 6); + __gen_uint(v5_0, 0, 6) | + __gen_uint(values->DepthBufferMOCS, 0, 6); dw[6] = __gen_uint(values->TiledResourceMode, 30, 31) | @@ -3263,7 +3314,7 @@ uint32_t _3DCommandSubOpcode; uint32_t DWordLength; uint64_t KernelStartPointer; - uint32_t SingleProgramFlow; + bool SingleProgramFlow; bool VectorMaskEnable; uint32_t SamplerCount; #define NoSamplers 0 @@ -3286,9 +3337,9 @@ uint32_t PerThreadScratchSpace; uint32_t DispatchGRFStartRegisterForURBData54; uint32_t OutputVertexSize; - uint32_t OutputTopology; + enum GEN9_3D_Prim_Topo_Type OutputTopology; uint32_t VertexURBEntryReadLength; - uint32_t IncludeVertexHandles; + bool IncludeVertexHandles; uint32_t VertexURBEntryReadOffset; uint32_t DispatchGRFStartRegisterForURBData; uint32_t ControlDataHeaderSize; @@ -3300,13 +3351,13 @@ #define DISPATCH_MODE_SIMD8 3 bool StatisticsEnable; uint32_t InvocationsIncrementValue; - uint32_t IncludePrimitiveID; + bool IncludePrimitiveID; uint32_t Hint; uint32_t ReorderMode; #define LEADING 0 #define TRAILING 1 bool DiscardAdjacency; - bool Enable; + bool FunctionEnable; uint32_t ControlDataFormat; #define CUT 0 #define SID 1 @@ -3377,7 +3428,7 @@ __gen_uint(values->Hint, 3, 3) | __gen_uint(values->ReorderMode, 2, 2) | __gen_uint(values->DiscardAdjacency, 1, 1) | - __gen_uint(values->Enable, 0, 0); + __gen_uint(values->FunctionEnable, 0, 0); dw[8] = __gen_uint(values->ControlDataFormat, 31, 31) | @@ -3408,6 +3459,7 @@ uint32_t _3DCommandSubOpcode; uint32_t DWordLength; struct GEN9_MEMORY_OBJECT_CONTROL_STATE HierarchicalDepthBufferObjectControlState; + uint32_t HierarchicalDepthBufferMOCS; uint32_t SurfacePitch; __gen_address_type SurfaceBaseAddress; uint32_t SurfaceQPitch; @@ -3431,6 +3483,7 @@ dw[1] = __gen_uint(v1_0, 25, 31) | + __gen_uint(values->HierarchicalDepthBufferMOCS, 25, 31) | __gen_uint(values->SurfacePitch, 0, 16); const uint64_t v2_address = @@ -3471,7 +3524,7 @@ #define alternate 1 bool IllegalOpcodeExceptionEnable; bool SoftwareExceptionEnable; - bool Enable; + bool FunctionEnable; bool StatisticsEnable; uint32_t MaximumNumberofThreads; uint32_t InstanceCount; @@ -3482,7 +3535,7 @@ bool SingleProgramFlow; bool VectorMaskEnable; bool AccessesUAV; - uint32_t IncludeVertexHandles; + bool IncludeVertexHandles; uint32_t DispatchGRFStartRegisterForURBData; uint32_t DispatchMode; #define DISPATCH_MODE_SINGLE_PATCH 0 @@ -3515,7 +3568,7 @@ __gen_uint(values->SoftwareExceptionEnable, 12, 12); dw[2] = - __gen_uint(values->Enable, 31, 31) | + __gen_uint(values->FunctionEnable, 31, 31) | __gen_uint(values->StatisticsEnable, 29, 29) | __gen_uint(values->MaximumNumberofThreads, 8, 16) | __gen_uint(values->InstanceCount, 0, 3); @@ -3906,7 +3959,7 @@ uint32_t _3DCommandSubOpcode; uint32_t DWordLength; uint64_t KernelStartPointer0; - uint32_t SingleProgramFlow; + bool SingleProgramFlow; bool VectorMaskEnable; uint32_t SamplerCount; #define NoSamplers 0 @@ -4036,10 +4089,10 @@ bool AlphaToCoverageEnable; bool HasWriteableRT; bool ColorBufferBlendEnable; - uint32_t SourceAlphaBlendFactor; - uint32_t DestinationAlphaBlendFactor; - uint32_t SourceBlendFactor; - uint32_t DestinationBlendFactor; + enum GEN9_3D_Color_Buffer_Blend_Factor SourceAlphaBlendFactor; + enum GEN9_3D_Color_Buffer_Blend_Factor DestinationAlphaBlendFactor; + enum GEN9_3D_Color_Buffer_Blend_Factor SourceBlendFactor; + enum GEN9_3D_Color_Buffer_Blend_Factor DestinationBlendFactor; bool AlphaTestEnable; bool IndependentAlphaBlendEnable; }; @@ -4951,38 +5004,7 @@ uint32_t PrimitiveIDOverrideAttributeSelect; uint32_t PointSpriteTextureCoordinateEnable; uint32_t ConstantInterpolationEnable; - uint32_t Attribute15ActiveComponentFormat; - uint32_t Attribute14ActiveComponentFormat; - uint32_t Attribute13ActiveComponentFormat; - uint32_t Attribute12ActiveComponentFormat; - uint32_t Attribute11ActiveComponentFormat; - uint32_t Attribute10ActiveComponentFormat; - uint32_t Attribute9ActiveComponentFormat; - uint32_t Attribute8ActiveComponentFormat; - uint32_t Attribute7ActiveComponentFormat; - uint32_t Attribute6ActiveComponentFormat; - uint32_t Attribute5ActiveComponentFormat; - uint32_t Attribute4ActiveComponentFormat; - uint32_t Attribute3ActiveComponentFormat; - uint32_t Attribute2ActiveComponentFormat; - uint32_t Attribute1ActiveComponentFormat; - uint32_t Attribute0ActiveComponentFormat; - uint32_t Attribute31ActiveComponentFormat; - uint32_t Attribute30ActiveComponentFormat; - uint32_t Attribute29ActiveComponentFormat; - uint32_t Attribute28ActiveComponentFormat; - uint32_t Attribute27ActiveComponentFormat; - uint32_t Attribute26ActiveComponentFormat; - uint32_t Attribute25ActiveComponentFormat; - uint32_t Attribute24ActiveComponentFormat; - uint32_t Attribute23ActiveComponentFormat; - uint32_t Attribute22ActiveComponentFormat; - uint32_t Attribute21ActiveComponentFormat; - uint32_t Attribute20ActiveComponentFormat; - uint32_t Attribute19ActiveComponentFormat; - uint32_t Attribute18ActiveComponentFormat; - uint32_t Attribute17ActiveComponentFormat; - uint32_t Attribute16ActiveComponentFormat; + uint32_t AttributeActiveComponentFormat[32]; }; static inline void @@ -5019,40 +5041,40 @@ __gen_uint(values->ConstantInterpolationEnable, 0, 31); dw[4] = - __gen_uint(values->Attribute15ActiveComponentFormat, 30, 31) | - __gen_uint(values->Attribute14ActiveComponentFormat, 28, 29) | - __gen_uint(values->Attribute13ActiveComponentFormat, 26, 27) | - __gen_uint(values->Attribute12ActiveComponentFormat, 24, 25) | - __gen_uint(values->Attribute11ActiveComponentFormat, 22, 23) | - __gen_uint(values->Attribute10ActiveComponentFormat, 20, 21) | - __gen_uint(values->Attribute9ActiveComponentFormat, 18, 19) | - __gen_uint(values->Attribute8ActiveComponentFormat, 16, 17) | - __gen_uint(values->Attribute7ActiveComponentFormat, 14, 15) | - __gen_uint(values->Attribute6ActiveComponentFormat, 12, 13) | - __gen_uint(values->Attribute5ActiveComponentFormat, 10, 11) | - __gen_uint(values->Attribute4ActiveComponentFormat, 8, 9) | - __gen_uint(values->Attribute3ActiveComponentFormat, 6, 7) | - __gen_uint(values->Attribute2ActiveComponentFormat, 4, 5) | - __gen_uint(values->Attribute1ActiveComponentFormat, 2, 3) | - __gen_uint(values->Attribute0ActiveComponentFormat, 0, 1); + __gen_uint(values->AttributeActiveComponentFormat[0], 0, 1) | + __gen_uint(values->AttributeActiveComponentFormat[1], 2, 3) | + __gen_uint(values->AttributeActiveComponentFormat[2], 4, 5) | + __gen_uint(values->AttributeActiveComponentFormat[3], 6, 7) | + __gen_uint(values->AttributeActiveComponentFormat[4], 8, 9) | + __gen_uint(values->AttributeActiveComponentFormat[5], 10, 11) | + __gen_uint(values->AttributeActiveComponentFormat[6], 12, 13) | + __gen_uint(values->AttributeActiveComponentFormat[7], 14, 15) | + __gen_uint(values->AttributeActiveComponentFormat[8], 16, 17) | + __gen_uint(values->AttributeActiveComponentFormat[9], 18, 19) | + __gen_uint(values->AttributeActiveComponentFormat[10], 20, 21) | + __gen_uint(values->AttributeActiveComponentFormat[11], 22, 23) | + __gen_uint(values->AttributeActiveComponentFormat[12], 24, 25) | + __gen_uint(values->AttributeActiveComponentFormat[13], 26, 27) | + __gen_uint(values->AttributeActiveComponentFormat[14], 28, 29) | + __gen_uint(values->AttributeActiveComponentFormat[15], 30, 31); dw[5] = - __gen_uint(values->Attribute31ActiveComponentFormat, 30, 31) | - __gen_uint(values->Attribute30ActiveComponentFormat, 28, 29) | - __gen_uint(values->Attribute29ActiveComponentFormat, 26, 27) | - __gen_uint(values->Attribute28ActiveComponentFormat, 24, 25) | - __gen_uint(values->Attribute27ActiveComponentFormat, 22, 23) | - __gen_uint(values->Attribute26ActiveComponentFormat, 20, 21) | - __gen_uint(values->Attribute25ActiveComponentFormat, 18, 19) | - __gen_uint(values->Attribute24ActiveComponentFormat, 16, 17) | - __gen_uint(values->Attribute23ActiveComponentFormat, 14, 15) | - __gen_uint(values->Attribute22ActiveComponentFormat, 12, 13) | - __gen_uint(values->Attribute21ActiveComponentFormat, 10, 11) | - __gen_uint(values->Attribute20ActiveComponentFormat, 8, 9) | - __gen_uint(values->Attribute19ActiveComponentFormat, 6, 7) | - __gen_uint(values->Attribute18ActiveComponentFormat, 4, 5) | - __gen_uint(values->Attribute17ActiveComponentFormat, 2, 3) | - __gen_uint(values->Attribute16ActiveComponentFormat, 0, 1); + __gen_uint(values->AttributeActiveComponentFormat[16], 0, 1) | + __gen_uint(values->AttributeActiveComponentFormat[17], 2, 3) | + __gen_uint(values->AttributeActiveComponentFormat[18], 4, 5) | + __gen_uint(values->AttributeActiveComponentFormat[19], 6, 7) | + __gen_uint(values->AttributeActiveComponentFormat[20], 8, 9) | + __gen_uint(values->AttributeActiveComponentFormat[21], 10, 11) | + __gen_uint(values->AttributeActiveComponentFormat[22], 12, 13) | + __gen_uint(values->AttributeActiveComponentFormat[23], 14, 15) | + __gen_uint(values->AttributeActiveComponentFormat[24], 16, 17) | + __gen_uint(values->AttributeActiveComponentFormat[25], 18, 19) | + __gen_uint(values->AttributeActiveComponentFormat[26], 20, 21) | + __gen_uint(values->AttributeActiveComponentFormat[27], 22, 23) | + __gen_uint(values->AttributeActiveComponentFormat[28], 24, 25) | + __gen_uint(values->AttributeActiveComponentFormat[29], 26, 27) | + __gen_uint(values->AttributeActiveComponentFormat[30], 28, 29) | + __gen_uint(values->AttributeActiveComponentFormat[31], 30, 31); } #define GEN9_3DSTATE_SBE_SWIZ_length 11 @@ -5426,8 +5448,9 @@ uint32_t _3DCommandOpcode; uint32_t _3DCommandSubOpcode; uint32_t DWordLength; - uint32_t StencilBufferEnable; + bool StencilBufferEnable; struct GEN9_MEMORY_OBJECT_CONTROL_STATE StencilBufferObjectControlState; + uint32_t StencilBufferMOCS; uint32_t SurfacePitch; __gen_address_type SurfaceBaseAddress; uint32_t SurfaceQPitch; @@ -5452,6 +5475,7 @@ dw[1] = __gen_uint(values->StencilBufferEnable, 31, 31) | __gen_uint(v1_0, 22, 28) | + __gen_uint(values->StencilBufferMOCS, 22, 28) | __gen_uint(values->SurfacePitch, 0, 16); const uint64_t v2_address = @@ -5478,8 +5502,8 @@ uint32_t _3DCommandOpcode; uint32_t _3DCommandSubOpcode; uint32_t DWordLength; - uint32_t SOFunctionEnable; - uint32_t RenderingDisable; + bool SOFunctionEnable; + bool RenderingDisable; uint32_t RenderStreamSelect; uint32_t ReorderMode; #define LEADING 0 @@ -6143,7 +6167,7 @@ uint32_t _3DCommandOpcode; uint32_t _3DCommandSubOpcode; uint32_t DWordLength; - uint32_t PrimitiveTopologyType; + enum GEN9_3D_Prim_Topo_Type PrimitiveTopologyType; }; static inline void @@ -6358,9 +6382,9 @@ bool LegacyHierarchicalDepthBufferResolveEnable; bool LegacyDiamondLineRasterization; uint32_t EarlyDepthStencilControl; -#define NORMAL 0 -#define PSEXEC 1 -#define PREPS 2 +#define EDSC_NORMAL 0 +#define EDSC_PSEXEC 1 +#define EDSC_PREPS 2 uint32_t ForceThreadDispatchEnable; #define ForceOff 1 #define ForceON 2 @@ -6369,6 +6393,12 @@ #define INTERP_CENTROID 2 #define INTERP_SAMPLE 3 uint32_t BarycentricInterpolationMode; +#define BIM_PERSPECTIVE_PIXEL 1 +#define BIM_PERSPECTIVE_CENTROID 2 +#define BIM_PERSPECTIVE_SAMPLE 4 +#define BIM_LINEAR_PIXEL 8 +#define BIM_LINEAR_CENTROID 16 +#define BIM_LINEAR_SAMPLE 32 uint32_t LineEndCapAntialiasingRegionWidth; #define _05pixels 0 #define _10pixels 1 @@ -6470,15 +6500,15 @@ uint32_t _3DCommandOpcode; uint32_t _3DCommandSubOpcode; uint32_t DWordLength; - uint32_t StencilFailOp; - uint32_t StencilPassDepthFailOp; - uint32_t StencilPassDepthPassOp; - uint32_t BackfaceStencilTestFunction; - uint32_t BackfaceStencilFailOp; - uint32_t BackfaceStencilPassDepthFailOp; - uint32_t BackfaceStencilPassDepthPassOp; - uint32_t StencilTestFunction; - uint32_t DepthTestFunction; + enum GEN9_3D_Stencil_Operation StencilFailOp; + enum GEN9_3D_Stencil_Operation StencilPassDepthFailOp; + enum GEN9_3D_Stencil_Operation StencilPassDepthPassOp; + enum GEN9_3D_Compare_Function BackfaceStencilTestFunction; + enum GEN9_3D_Stencil_Operation BackfaceStencilFailOp; + enum GEN9_3D_Stencil_Operation BackfaceStencilPassDepthFailOp; + enum GEN9_3D_Stencil_Operation BackfaceStencilPassDepthPassOp; + enum GEN9_3D_Compare_Function StencilTestFunction; + enum GEN9_3D_Compare_Function DepthTestFunction; bool DoubleSidedStencilEnable; bool StencilTestEnable; bool StencilBufferWriteEnable; @@ -7456,7 +7486,7 @@ #define Firstlevelbatch 0 #define Secondlevelbatch 1 bool AddOffsetEnable; - uint32_t PredicationEnable; + bool PredicationEnable; bool ResourceStreamerEnable; uint32_t AddressSpaceIndicator; #define ASI_GGTT 0 @@ -7496,9 +7526,7 @@ struct GEN9_MI_CLFLUSH { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t UseGlobalGTT; -#define PerProcessGraphicsAddress 0 -#define GlobalGraphicsAddress 1 + bool UseGlobalGTT; uint32_t DWordLength; __gen_address_type PageBaseAddress; uint32_t StartingCachelineOffset; @@ -7530,14 +7558,13 @@ #define GEN9_MI_CONDITIONAL_BATCH_BUFFER_END_header\ .CommandType = 0, \ .MICommandOpcode = 54, \ - .UseGlobalGTT = 0, \ .CompareSemaphore = 0, \ .DWordLength = 2 struct GEN9_MI_CONDITIONAL_BATCH_BUFFER_END { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t UseGlobalGTT; + bool UseGlobalGTT; uint32_t CompareSemaphore; uint32_t CompareMaskMode; #define CompareMaskModeDisabled 0 @@ -7580,12 +7607,8 @@ struct GEN9_MI_COPY_MEM_MEM { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t UseGlobalGTTSource; -#define PerProcessGraphicsAddress 0 -#define GlobalGraphicsAddress 1 - uint32_t UseGlobalGTTDestination; -#define PerProcessGraphicsAddress 0 -#define GlobalGraphicsAddress 1 + bool UseGlobalGTTSource; + bool UseGlobalGTTDestination; uint32_t DWordLength; __gen_address_type DestinationMemoryAddress; __gen_address_type SourceMemoryAddress; @@ -7752,7 +7775,7 @@ struct GEN9_MI_LOAD_REGISTER_MEM { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t UseGlobalGTT; + bool UseGlobalGTT; bool AsyncModeEnable; uint32_t DWordLength; uint64_t RegisterAddress; @@ -8054,7 +8077,7 @@ uint32_t DWordLength; __gen_address_type MemoryAddress; uint32_t CoreModeEnable; - uint32_t UseGlobalGTT; + bool UseGlobalGTT; uint32_t ReportID; }; @@ -8214,7 +8237,6 @@ #define GEN9_MI_SEMAPHORE_WAIT_header \ .CommandType = 0, \ .MICommandOpcode = 28, \ - .RegisterPollMode = 1, \ .DWordLength = 2 struct GEN9_MI_SEMAPHORE_WAIT { @@ -8223,7 +8245,7 @@ uint32_t MemoryType; #define PerProcessGraphicsAddress 0 #define GlobalGraphicsAddress 1 - uint32_t RegisterPollMode; + bool RegisterPollMode; uint32_t WaitMode; #define PollingMode 1 #define SignalMode 0 @@ -8347,7 +8369,7 @@ struct GEN9_MI_STORE_DATA_IMM { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t UseGlobalGTT; + bool UseGlobalGTT; uint32_t StoreQword; uint32_t DWordLength; __gen_address_type Address; @@ -8426,7 +8448,7 @@ struct GEN9_MI_STORE_REGISTER_MEM { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t UseGlobalGTT; + bool UseGlobalGTT; bool PredicateEnable; uint32_t DWordLength; uint64_t RegisterAddress; @@ -8523,7 +8545,7 @@ struct GEN9_MI_TOPOLOGY_FILTER { uint32_t CommandType; uint32_t MICommandOpcode; - uint32_t TopologyFilterValue; + enum GEN9_3D_Prim_Topo_Type TopologyFilterValue; }; static inline void @@ -8707,10 +8729,8 @@ #define MMIOWriteImmediateData 1 uint32_t StoreDataIndex; bool CommandStreamerStallEnable; - uint32_t GlobalSnapshotCountReset; -#define DontReset 0 -#define Reset 1 - uint32_t TLBInvalidate; + bool GlobalSnapshotCountReset; + bool TLBInvalidate; bool GenericMediaStateClear; uint32_t PostSyncOperation; #define NoWrite 0 @@ -9030,3 +9050,68 @@ __gen_uint(values->AllAllocation, 25, 31); } +#define GEN9_SO_WRITE_OFFSET0_num 0x5280 +#define GEN9_SO_WRITE_OFFSET0_length 1 +struct GEN9_SO_WRITE_OFFSET0 { + uint64_t WriteOffset; +}; + +static inline void +GEN9_SO_WRITE_OFFSET0_pack(__gen_user_data *data, void * restrict dst, + const struct GEN9_SO_WRITE_OFFSET0 * restrict values) +{ + uint32_t * restrict dw = (uint32_t * restrict) dst; + + dw[0] = + __gen_offset(values->WriteOffset, 2, 31); +} + +#define GEN9_SO_WRITE_OFFSET1_num 0x5284 +#define GEN9_SO_WRITE_OFFSET1_length 1 +struct GEN9_SO_WRITE_OFFSET1 { + uint64_t WriteOffset; +}; + +static inline void +GEN9_SO_WRITE_OFFSET1_pack(__gen_user_data *data, void * restrict dst, + const struct GEN9_SO_WRITE_OFFSET1 * restrict values) +{ + uint32_t * restrict dw = (uint32_t * restrict) dst; + + dw[0] = + __gen_offset(values->WriteOffset, 2, 31); +} + +#define GEN9_SO_WRITE_OFFSET2_num 0x5288 +#define GEN9_SO_WRITE_OFFSET2_length 1 +struct GEN9_SO_WRITE_OFFSET2 { + uint64_t WriteOffset; +}; + +static inline void +GEN9_SO_WRITE_OFFSET2_pack(__gen_user_data *data, void * restrict dst, + const struct GEN9_SO_WRITE_OFFSET2 * restrict values) +{ + uint32_t * restrict dw = (uint32_t * restrict) dst; + + dw[0] = + __gen_offset(values->WriteOffset, 2, 31); +} + +#define GEN9_SO_WRITE_OFFSET3_num 0x528c +#define GEN9_SO_WRITE_OFFSET3_length 1 +struct GEN9_SO_WRITE_OFFSET3 { + uint64_t WriteOffset; +}; + +static inline void +GEN9_SO_WRITE_OFFSET3_pack(__gen_user_data *data, void * restrict dst, + const struct GEN9_SO_WRITE_OFFSET3 * restrict values) +{ + uint32_t * restrict dw = (uint32_t * restrict) dst; + + dw[0] = + __gen_offset(values->WriteOffset, 2, 31); +} + +#endif /* GEN9_PACK_H */ diff -Nru mesa-12.0.6/src/intel/genxml/gen9.xml mesa-17.0.7/src/intel/genxml/gen9.xml --- mesa-12.0.6/src/intel/genxml/gen9.xml 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/genxml/gen9.xml 2017-06-01 10:37:10.000000000 +0000 @@ -1,142 +1,566 @@ - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - + + + + + + + + - - - - - + + + + + + + + + + + + + + + + + + - - - + + + + + + - - - - - - - - - + + + + + + + + + + + + + + + + + - - - - - - - - - - - + + + + + + + + + + - - - - - - + + + + + + + + + + + + + + + + + + + + + - - - - - - + + + + + + + - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + - - - - - - + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -174,13 +598,12 @@ - - + - + @@ -202,7 +625,7 @@ - + @@ -261,7 +684,7 @@ - + @@ -282,649 +705,238 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - - - - - + + + - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -940,7 +952,7 @@ - + @@ -1266,6 +1278,7 @@ + @@ -1486,7 +1499,7 @@ - + @@ -1512,9 +1525,9 @@ - + - + @@ -1527,14 +1540,14 @@ - + - + @@ -1555,6 +1568,7 @@ + @@ -1583,7 +1597,7 @@ - + @@ -1594,7 +1608,7 @@ - + @@ -1688,7 +1702,7 @@ - + @@ -1752,10 +1766,10 @@ - - - - + + + + @@ -2094,38 +2108,9 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + @@ -2225,8 +2210,9 @@ - + + @@ -2238,8 +2224,8 @@ - - + + @@ -2472,7 +2458,7 @@ - + @@ -2548,9 +2534,9 @@ - - - + + + @@ -2561,7 +2547,14 @@ - + + + + + + + + @@ -2601,15 +2594,15 @@ - - - - - - - - - + + + + + + + + + @@ -2957,7 +2950,7 @@ - + @@ -2970,10 +2963,7 @@ - - - - + @@ -2985,7 +2975,7 @@ - + @@ -2999,14 +2989,8 @@ - - - - - - - - + + @@ -3064,7 +3048,7 @@ - + @@ -3163,7 +3147,7 @@ - + @@ -3216,7 +3200,7 @@ - + @@ -3266,7 +3250,7 @@ - + @@ -3288,7 +3272,7 @@ - + @@ -3312,7 +3296,7 @@ - + @@ -3382,11 +3366,8 @@ - - - - - + + @@ -3474,4 +3455,20 @@ + + + + + + + + + + + + + + + + diff -Nru mesa-12.0.6/src/intel/genxml/gen9_xml.h mesa-17.0.7/src/intel/genxml/gen9_xml.h --- mesa-12.0.6/src/intel/genxml/gen9_xml.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/genxml/gen9_xml.h 2017-06-01 10:38:03.000000000 +0000 @@ -0,0 +1,16727 @@ +static const uint8_t gen9_xml[] = { + 0x3c, 0x67, 0x65, 0x6e, 0x78, 0x6d, 0x6c, 0x20, 0x6e, 0x61, 0x6d, 0x65, + 0x3d, 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mesa-17.0.7/src/intel/genxml/gen_macros.h 2017-06-01 10:37:10.000000000 +0000 @@ -21,7 +21,8 @@ * IN THE SOFTWARE. */ -#pragma once +#ifndef GEN_MACROS_H +#define GEN_MACROS_H /* Macros for handling per-gen compilation. * @@ -57,9 +58,22 @@ #define GEN_GEN ((GEN_VERSIONx10) / 10) #define GEN_IS_HASWELL ((GEN_VERSIONx10) == 75) +#define GEN_IS_G4X ((GEN_VERSIONx10) == 45) /* Prefixing macros */ -#if (GEN_VERSIONx10 == 70) +#if (GEN_VERSIONx10 == 40) +# define GENX(X) GEN4_##X +# define genX(x) gen4_##x +#elif (GEN_VERSIONx10 == 45) +# define GENX(X) GEN45_##X +# define genX(x) gen45_##x +#elif (GEN_VERSIONx10 == 50) +# define GENX(X) GEN5_##X +# define genX(x) gen5_##x +#elif (GEN_VERSIONx10 == 60) +# define GENX(X) GEN6_##X +# define genX(x) gen6_##x +#elif (GEN_VERSIONx10 == 70) # define GENX(X) GEN7_##X # define genX(x) gen7_##x #elif (GEN_VERSIONx10 == 75) @@ -74,3 +88,5 @@ #else # error "Need to add prefixing macros for this gen" #endif + +#endif /* GEN_MACROS_H */ diff -Nru mesa-12.0.6/src/intel/genxml/gen_pack_header.py mesa-17.0.7/src/intel/genxml/gen_pack_header.py --- mesa-12.0.6/src/intel/genxml/gen_pack_header.py 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/genxml/gen_pack_header.py 2017-06-01 10:37:10.000000000 +0000 @@ -40,7 +40,8 @@ * This file has been generated, do not hand edit. */ -#pragma once +#ifndef %(guard)s +#define %(guard)s #include #include @@ -266,6 +267,8 @@ type = 'uint32_t' elif self.type in self.parser.structs: type = 'struct ' + self.parser.gen_prefix(safe_name(self.type)) + elif self.type in self.parser.enums: + type = 'enum ' + self.parser.gen_prefix(safe_name(self.type)) elif self.type == 'mbo': return else: @@ -425,6 +428,9 @@ elif field.type == "uint": s = "__gen_uint(values->%s, %d, %d)" % \ (name, field.start - dword_start, field.end - dword_start) + elif field.type in self.parser.enums: + s = "__gen_uint(values->%s, %d, %d)" % \ + (name, field.start - dword_start, field.end - dword_start) elif field.type == "int": s = "__gen_sint(values->%s, %d, %d)" % \ (name, field.start - dword_start, field.end - dword_start) @@ -483,13 +489,23 @@ self.instruction = None self.structs = {} + self.enums = {} self.registers = {} + def gen_prefix(self, name): + if name[0] == "_": + return 'GEN%s%s' % (self.gen, name) + else: + return 'GEN%s_%s' % (self.gen, name) + + def gen_guard(self): + return self.gen_prefix("PACK_H") + def start_element(self, name, attrs): if name == "genxml": self.platform = attrs["name"] self.gen = attrs["gen"].replace('.', '') - print(pack_header % {'license': license, 'platform': self.platform}) + print(pack_header % {'license': license, 'platform': self.platform, 'guard': self.gen_guard()}) elif name in ("instruction", "struct", "register"): if name == "instruction": self.instruction = safe_name(attrs["name"]) @@ -520,6 +536,7 @@ elif name == "enum": self.values = [] self.enum = safe_name(attrs["name"]) + self.enums[attrs["name"]] = 1 if "prefix" in attrs: self.prefix = safe_name(attrs["prefix"]) else: @@ -548,12 +565,8 @@ elif name == "enum": self.emit_enum() self.enum = None - - def gen_prefix(self, name): - if name[0] == "_": - return 'GEN%s%s' % (self.gen, name) - else: - return 'GEN%s_%s' % (self.gen, name) + elif name == "genxml": + print('#endif /* %s */' % self.gen_guard()) def emit_template_struct(self, name, group): print("struct %s {" % self.gen_prefix(name)) @@ -620,14 +633,14 @@ self.emit_pack_function(self.struct, self.group) def emit_enum(self): - print('/* enum %s */' % self.gen_prefix(self.enum)) + print('enum %s {' % self.gen_prefix(self.enum)) for value in self.values: if self.prefix: name = self.prefix + "_" + value.name else: name = value.name - print('#define %-36s %6d' % (name.upper(), value.value)) - print('') + print(' %-36s = %6d,' % (name.upper(), value.value)) + print('};\n') def parse(self, filename): file = open(filename, "rb") diff -Nru mesa-12.0.6/src/intel/genxml/genX_pack.h mesa-17.0.7/src/intel/genxml/genX_pack.h --- mesa-12.0.6/src/intel/genxml/genX_pack.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/genxml/genX_pack.h 2017-06-01 10:37:10.000000000 +0000 @@ -21,13 +21,22 @@ * IN THE SOFTWARE. */ -#pragma once +#ifndef GENX_PACK_H +#define GENX_PACK_H #ifndef GEN_VERSIONx10 # error "The GEN_VERSIONx10 macro must be defined" #endif -#if (GEN_VERSIONx10 == 70) +#if (GEN_VERSIONx10 == 40) +# include "genxml/gen4_pack.h" +#elif (GEN_VERSIONx10 == 45) +# include "genxml/gen45_pack.h" +#elif (GEN_VERSIONx10 == 50) +# include "genxml/gen5_pack.h" +#elif (GEN_VERSIONx10 == 60) +# include "genxml/gen6_pack.h" +#elif (GEN_VERSIONx10 == 70) # include "genxml/gen7_pack.h" #elif (GEN_VERSIONx10 == 75) # include "genxml/gen75_pack.h" @@ -38,3 +47,5 @@ #else # error "Need to add a pack header include for this gen" #endif + +#endif /* GENX_PACK_H */ diff -Nru mesa-12.0.6/src/intel/genxml/Makefile.am mesa-17.0.7/src/intel/genxml/Makefile.am --- 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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 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-.NOEXPORT: diff -Nru mesa-12.0.6/src/intel/genxml/Makefile.sources mesa-17.0.7/src/intel/genxml/Makefile.sources --- mesa-12.0.6/src/intel/genxml/Makefile.sources 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/genxml/Makefile.sources 1970-01-01 00:00:00.000000000 +0000 @@ -1,6 +0,0 @@ -GENXML_GENERATED_FILES = \ - gen6_pack.h \ - gen7_pack.h \ - gen75_pack.h \ - gen8_pack.h \ - gen9_pack.h diff -Nru mesa-12.0.6/src/intel/isl/gen_format_layout.py mesa-17.0.7/src/intel/isl/gen_format_layout.py --- mesa-12.0.6/src/intel/isl/gen_format_layout.py 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/isl/gen_format_layout.py 2017-06-01 10:37:10.000000000 +0000 @@ -59,7 +59,7 @@ * IN THE SOFTWARE. */ - #include "isl.h" + #include "isl/isl.h" const struct isl_format_layout isl_format_layouts[] = { @@ -67,7 +67,7 @@ [ISL_FORMAT_${format.name}] = { .format = ISL_FORMAT_${format.name}, .name = "ISL_FORMAT_${format.name}", - .bs = ${format.bs}, + .bpb = ${format.bpb}, .bw = ${format.bw}, .bh = ${format.bh}, .bd = ${format.bd}, @@ -137,7 +137,7 @@ self.name = line[0].strip() # Future division makes this work in python 2. - self.bs = int(line[1]) // 8 + self.bpb = int(line[1]) self.bw = line[2].strip() self.bh = line[3].strip() self.bd = line[4].strip() diff -Nru mesa-12.0.6/src/intel/isl/isl.c mesa-17.0.7/src/intel/isl/isl.c --- mesa-12.0.6/src/intel/isl/isl.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/isl/isl.c 2017-06-01 10:37:10.000000000 +0000 @@ -46,9 +46,23 @@ fprintf(stderr, "%s:%d: FINISHME: %s\n", file, line, buf); } +static const struct { + uint8_t size; + uint8_t align; + uint8_t addr_offset; + uint8_t aux_addr_offset; +} ss_infos[] = { + [4] = {24, 32, 4}, + [5] = {24, 32, 4}, + [6] = {24, 32, 4}, + [7] = {32, 32, 4, 24}, + [8] = {64, 64, 32, 40}, + [9] = {64, 64, 32, 40}, +}; + void isl_device_init(struct isl_device *dev, - const struct brw_device_info *info, + const struct gen_device_info *info, bool has_bit6_swizzling) { dev->info = info; @@ -67,6 +81,11 @@ assert(info->has_hiz_and_separate_stencil); if (info->must_use_separate_stencil) assert(ISL_DEV_USE_SEPARATE_STENCIL(dev)); + + dev->ss.size = ss_infos[ISL_DEV_GEN(dev)].size; + dev->ss.align = ss_infos[ISL_DEV_GEN(dev)].align; + dev->ss.addr_offset = ss_infos[ISL_DEV_GEN(dev)].addr_offset; + dev->ss.aux_addr_offset = ss_infos[ISL_DEV_GEN(dev)].aux_addr_offset; } /** @@ -104,37 +123,60 @@ /** * @param[out] info is written only on success */ -bool +static bool isl_tiling_get_info(const struct isl_device *dev, enum isl_tiling tiling, - uint32_t format_block_size, + uint32_t format_bpb, struct isl_tile_info *tile_info) { - const uint32_t bs = format_block_size; - uint32_t width, height; + const uint32_t bs = format_bpb / 8; + struct isl_extent2d logical_el, phys_B; - assert(bs > 0); + if (tiling != ISL_TILING_LINEAR && !isl_is_pow2(format_bpb)) { + /* It is possible to have non-power-of-two formats in a tiled buffer. + * The easiest way to handle this is to treat the tile as if it is three + * times as wide. This way no pixel will ever cross a tile boundary. + * This really only works on legacy X and Y tiling formats. + */ + assert(tiling == ISL_TILING_X || tiling == ISL_TILING_Y0); + assert(bs % 3 == 0 && isl_is_pow2(format_bpb / 3)); + return isl_tiling_get_info(dev, tiling, format_bpb / 3, tile_info); + } switch (tiling) { case ISL_TILING_LINEAR: - width = 1; - height = 1; + assert(bs > 0); + logical_el = isl_extent2d(1, 1); + phys_B = isl_extent2d(bs, 1); break; case ISL_TILING_X: - width = 1 << 9; - height = 1 << 3; + assert(bs > 0); + logical_el = isl_extent2d(512 / bs, 8); + phys_B = isl_extent2d(512, 8); break; case ISL_TILING_Y0: - width = 1 << 7; - height = 1 << 5; + assert(bs > 0); + logical_el = isl_extent2d(128 / bs, 32); + phys_B = isl_extent2d(128, 32); break; case ISL_TILING_W: - /* XXX: Should W tile be same as Y? */ - width = 1 << 6; - height = 1 << 6; + assert(bs == 1); + logical_el = isl_extent2d(64, 64); + /* From the Broadwell PRM Vol 2d, RENDER_SURFACE_STATE::SurfacePitch: + * + * "If the surface is a stencil buffer (and thus has Tile Mode set + * to TILEMODE_WMAJOR), the pitch must be set to 2x the value + * computed based on width, as the stencil buffer is stored with two + * rows interleaved." + * + * This, together with the fact that stencil buffers are referred to as + * being Y-tiled in the PRMs for older hardware implies that the + * physical size of a W-tile is actually the same as for a Y-tile. + */ + phys_B = isl_extent2d(128, 32); break; case ISL_TILING_Yf: @@ -147,54 +189,93 @@ bool is_Ys = tiling == ISL_TILING_Ys; - width = 1 << (6 + (ffs(bs) / 2) + (2 * is_Ys)); - height = 1 << (6 - (ffs(bs) / 2) + (2 * is_Ys)); + assert(bs > 0); + unsigned width = 1 << (6 + (ffs(bs) / 2) + (2 * is_Ys)); + unsigned height = 1 << (6 - (ffs(bs) / 2) + (2 * is_Ys)); + + logical_el = isl_extent2d(width / bs, height); + phys_B = isl_extent2d(width, height); break; } + case ISL_TILING_HIZ: + /* HiZ buffers are required to have ISL_FORMAT_HIZ which is an 8x4 + * 128bpb format. The tiling has the same physical dimensions as + * Y-tiling but actually has two HiZ columns per Y-tiled column. + */ + assert(bs == 16); + logical_el = isl_extent2d(16, 16); + phys_B = isl_extent2d(128, 32); + break; + + case ISL_TILING_CCS: + /* CCS surfaces are required to have one of the GENX_CCS_* formats which + * have a block size of 1 or 2 bits per block and each CCS element + * corresponds to one cache-line pair in the main surface. From the Sky + * Lake PRM Vol. 12 in the section on planes: + * + * "The Color Control Surface (CCS) contains the compression status + * of the cache-line pairs. The compression state of the cache-line + * pair is specified by 2 bits in the CCS. Each CCS cache-line + * represents an area on the main surface of 16x16 sets of 128 byte + * Y-tiled cache-line-pairs. CCS is always Y tiled." + * + * The CCS being Y-tiled implies that it's an 8x8 grid of cache-lines. + * Since each cache line corresponds to a 16x16 set of cache-line pairs, + * that yields total tile area of 128x128 cache-line pairs or CCS + * elements. On older hardware, each CCS element is 1 bit and the tile + * is 128x256 elements. + */ + assert(format_bpb == 1 || format_bpb == 2); + logical_el = isl_extent2d(128, 256 / format_bpb); + phys_B = isl_extent2d(128, 32); + break; + default: unreachable("not reached"); } /* end switch */ *tile_info = (struct isl_tile_info) { .tiling = tiling, - .width = width, - .height = height, - .size = width * height, + .format_bpb = format_bpb, + .logical_extent_el = logical_el, + .phys_extent_B = phys_B, }; return true; } -void -isl_tiling_get_extent(const struct isl_device *dev, - enum isl_tiling tiling, - uint32_t format_block_size, - struct isl_extent2d *e) -{ - struct isl_tile_info tile_info; - isl_tiling_get_info(dev, tiling, format_block_size, &tile_info); - *e = isl_extent2d(tile_info.width, tile_info.height); -} - /** * @param[out] tiling is set only on success */ -bool +static bool isl_surf_choose_tiling(const struct isl_device *dev, const struct isl_surf_init_info *restrict info, enum isl_tiling *tiling) { isl_tiling_flags_t tiling_flags = info->tiling_flags; - /* Filter if multiple tiling options are given */ - if (!isl_is_pow2(tiling_flags)) { - if (ISL_DEV_GEN(dev) >= 7) { - gen7_filter_tiling(dev, info, &tiling_flags); - } else { - isl_finishme("%s: gen%u", __func__, ISL_DEV_GEN(dev)); - gen7_filter_tiling(dev, info, &tiling_flags); - } + /* HiZ surfaces always use the HiZ tiling */ + if (info->usage & ISL_SURF_USAGE_HIZ_BIT) { + assert(info->format == ISL_FORMAT_HIZ); + assert(tiling_flags == ISL_TILING_HIZ_BIT); + *tiling = ISL_TILING_HIZ; + return true; + } + + /* CCS surfaces always use the CCS tiling */ + if (info->usage & ISL_SURF_USAGE_CCS_BIT) { + assert(isl_format_get_layout(info->format)->txc == ISL_TXC_CCS); + assert(tiling_flags == ISL_TILING_CCS_BIT); + *tiling = ISL_TILING_CCS; + return true; + } + + if (ISL_DEV_GEN(dev) >= 6) { + isl_gen6_filter_tiling(dev, info, &tiling_flags); + } else { + isl_finishme("%s: gen%u", __func__, ISL_DEV_GEN(dev)); + isl_gen6_filter_tiling(dev, info, &tiling_flags); } #define CHOOSE(__tiling) \ @@ -238,19 +319,18 @@ enum isl_msaa_layout *msaa_layout) { if (ISL_DEV_GEN(dev) >= 8) { - return gen8_choose_msaa_layout(dev, info, tiling, msaa_layout); + return isl_gen8_choose_msaa_layout(dev, info, tiling, msaa_layout); } else if (ISL_DEV_GEN(dev) >= 7) { - return gen7_choose_msaa_layout(dev, info, tiling, msaa_layout); + return isl_gen7_choose_msaa_layout(dev, info, tiling, msaa_layout); } else if (ISL_DEV_GEN(dev) >= 6) { - return gen6_choose_msaa_layout(dev, info, tiling, msaa_layout); + return isl_gen6_choose_msaa_layout(dev, info, tiling, msaa_layout); } else { - return gen4_choose_msaa_layout(dev, info, tiling, msaa_layout); + return isl_gen4_choose_msaa_layout(dev, info, tiling, msaa_layout); } } -static void -isl_msaa_interleaved_scale_px_to_sa(uint32_t samples, - uint32_t *width, uint32_t *height) +struct isl_extent2d +isl_get_interleaved_msaa_px_size_sa(uint32_t samples) { assert(isl_is_pow2(samples)); @@ -262,10 +342,23 @@ * MSFMT_DEPTH_STENCIL, W_L and H_L must be adjusted as follows before * proceeding: [...] */ + return (struct isl_extent2d) { + .width = 1 << ((ffs(samples) - 0) / 2), + .height = 1 << ((ffs(samples) - 1) / 2), + }; +} + +static void +isl_msaa_interleaved_scale_px_to_sa(uint32_t samples, + uint32_t *width, uint32_t *height) +{ + const struct isl_extent2d px_size_sa = + isl_get_interleaved_msaa_px_size_sa(samples); + if (width) - *width = isl_align(*width, 2) << ((ffs(samples) - 0) / 2); + *width = isl_align(*width, 2) * px_size_sa.width; if (height) - *height = isl_align(*height, 2) << ((ffs(samples) - 1) / 2); + *height = isl_align(*height, 2) * px_size_sa.height; } static enum isl_array_pitch_span @@ -311,7 +404,8 @@ return ISL_ARRAY_PITCH_SPAN_COMPACT; } - if (isl_surf_usage_is_depth_or_stencil(info->usage)) { + if (isl_surf_usage_is_depth_or_stencil(info->usage) || + (info->usage & ISL_SURF_USAGE_HIZ_BIT)) { /* From the Ivybridge PRM >> Volume 1 Part 1: Graphics Core >> * Section 6.18.4.7: Surface Arrays (p112): * @@ -319,7 +413,7 @@ * the depth buffer and stencil buffer have an implied value of * ARYSPC_FULL): */ - return ISL_ARRAY_PITCH_SPAN_COMPACT; + return ISL_ARRAY_PITCH_SPAN_FULL; } if (info->levels == 1) { @@ -382,35 +476,63 @@ isl_choose_image_alignment_el(const struct isl_device *dev, const struct isl_surf_init_info *restrict info, enum isl_tiling tiling, + enum isl_dim_layout dim_layout, enum isl_msaa_layout msaa_layout, struct isl_extent3d *image_align_el) { + if (info->format == ISL_FORMAT_HIZ) { + assert(ISL_DEV_GEN(dev) >= 6); + /* HiZ surfaces are always aligned to 16x8 pixels in the primary surface + * which works out to 2x2 HiZ elments. + */ + *image_align_el = isl_extent3d(2, 2, 1); + return; + } + if (ISL_DEV_GEN(dev) >= 9) { - gen9_choose_image_alignment_el(dev, info, tiling, msaa_layout, - image_align_el); + isl_gen9_choose_image_alignment_el(dev, info, tiling, dim_layout, + msaa_layout, image_align_el); } else if (ISL_DEV_GEN(dev) >= 8) { - gen8_choose_image_alignment_el(dev, info, tiling, msaa_layout, - image_align_el); + isl_gen8_choose_image_alignment_el(dev, info, tiling, dim_layout, + msaa_layout, image_align_el); } else if (ISL_DEV_GEN(dev) >= 7) { - gen7_choose_image_alignment_el(dev, info, tiling, msaa_layout, - image_align_el); + isl_gen7_choose_image_alignment_el(dev, info, tiling, dim_layout, + msaa_layout, image_align_el); } else if (ISL_DEV_GEN(dev) >= 6) { - gen6_choose_image_alignment_el(dev, info, tiling, msaa_layout, - image_align_el); + isl_gen6_choose_image_alignment_el(dev, info, tiling, dim_layout, + msaa_layout, image_align_el); } else { - gen4_choose_image_alignment_el(dev, info, tiling, msaa_layout, - image_align_el); + isl_gen4_choose_image_alignment_el(dev, info, tiling, dim_layout, + msaa_layout, image_align_el); } } static enum isl_dim_layout isl_surf_choose_dim_layout(const struct isl_device *dev, - enum isl_surf_dim logical_dim) + enum isl_surf_dim logical_dim, + enum isl_tiling tiling) { if (ISL_DEV_GEN(dev) >= 9) { switch (logical_dim) { case ISL_SURF_DIM_1D: - return ISL_DIM_LAYOUT_GEN9_1D; + /* From the Sky Lake PRM Vol. 5, "1D Surfaces": + * + * One-dimensional surfaces use a tiling mode of linear. + * Technically, they are not tiled resources, but the Tiled + * Resource Mode field in RENDER_SURFACE_STATE is still used to + * indicate the alignment requirements for this linear surface + * (See 1D Alignment requirements for how 4K and 64KB Tiled + * Resource Modes impact alignment). Alternatively, a 1D surface + * can be defined as a 2D tiled surface (e.g. TileY or TileX) with + * a height of 0. + * + * In other words, ISL_DIM_LAYOUT_GEN9_1D is only used for linear + * surfaces and, for tiled surfaces, ISL_DIM_LAYOUT_GEN4_2D is used. + */ + if (tiling == ISL_TILING_LINEAR) + return ISL_DIM_LAYOUT_GEN9_1D; + else + return ISL_DIM_LAYOUT_GEN4_2D; case ISL_SURF_DIM_2D: case ISL_SURF_DIM_3D: return ISL_DIM_LAYOUT_GEN4_2D; @@ -451,7 +573,6 @@ assert(info->height == 1); assert(info->depth == 1); assert(info->samples == 1); - assert(!isl_format_is_compressed(info->format)); switch (dim_layout) { case ISL_DIM_LAYOUT_GEN4_3D: @@ -460,8 +581,8 @@ case ISL_DIM_LAYOUT_GEN9_1D: case ISL_DIM_LAYOUT_GEN4_2D: *phys_level0_sa = (struct isl_extent4d) { - .w = info->width, - .h = 1, + .w = isl_align_npot(info->width, fmtl->bw), + .h = fmtl->bh, .d = 1, .a = info->array_len, }; @@ -491,7 +612,8 @@ case ISL_MSAA_LAYOUT_ARRAY: assert(info->depth == 1); assert(info->levels == 1); - assert(!isl_format_is_compressed(info->format)); + assert(isl_format_supports_multisampling(dev->info, info->format)); + assert(fmtl->bw == 1 && fmtl->bh == 1); *phys_level0_sa = (struct isl_extent4d) { .w = info->width, @@ -504,7 +626,7 @@ case ISL_MSAA_LAYOUT_INTERLEAVED: assert(info->depth == 1); assert(info->levels == 1); - assert(!isl_format_is_compressed(info->format)); + assert(isl_format_supports_multisampling(dev->info, info->format)); *phys_level0_sa = (struct isl_extent4d) { .w = info->width, @@ -516,6 +638,9 @@ isl_msaa_interleaved_scale_px_to_sa(info->samples, &phys_level0_sa->w, &phys_level0_sa->h); + + phys_level0_sa->w = isl_align(phys_level0_sa->w, fmtl->bw); + phys_level0_sa->h = isl_align(phys_level0_sa->h, fmtl->bh); break; } break; @@ -575,7 +700,7 @@ assert(phys_level0_sa->depth == 1); - if (info->levels == 1 && msaa_layout != ISL_MSAA_LAYOUT_INTERLEAVED) { + if (info->levels == 1) { /* Do not pad the surface to the image alignment. Instead, pad it only * to the pixel format's block alignment. * @@ -610,18 +735,6 @@ uint32_t W = isl_minify(W0, l); uint32_t H = isl_minify(H0, l); - if (msaa_layout == ISL_MSAA_LAYOUT_INTERLEAVED) { - /* From the Broadwell PRM >> Volume 5: Memory Views >> Computing Mip Level - * Sizes (p133): - * - * If the surface is multisampled and it is a depth or stencil - * surface or Multisampled Surface StorageFormat in - * SURFACE_STATE is MSFMT_DEPTH_STENCIL, W_L and H_L must be - * adjusted as follows before proceeding: [...] - */ - isl_msaa_interleaved_scale_px_to_sa(info->samples, &W, &H); - } - uint32_t w = isl_align_npot(W, image_align_sa->w); uint32_t h = isl_align_npot(H, image_align_sa->h); @@ -830,6 +943,29 @@ assert(pitch_sa_rows % fmtl->bh == 0); uint32_t pitch_el_rows = pitch_sa_rows / fmtl->bh; + if (ISL_DEV_GEN(dev) >= 9 && fmtl->txc == ISL_TXC_CCS) { + /* + * From the Sky Lake PRM Vol 7, "MCS Buffer for Render Target(s)" (p. 632): + * + * "Mip-mapped and arrayed surfaces are supported with MCS buffer + * layout with these alignments in the RT space: Horizontal + * Alignment = 128 and Vertical Alignment = 64." + * + * From the Sky Lake PRM Vol. 2d, "RENDER_SURFACE_STATE" (p. 435): + * + * "For non-multisampled render target's CCS auxiliary surface, + * QPitch must be computed with Horizontal Alignment = 128 and + * Surface Vertical Alignment = 256. These alignments are only for + * CCS buffer and not for associated render target." + * + * The first restriction is already handled by isl_choose_image_alignment_el + * but the second restriction, which is an extension of the first, only + * applies to qpitch and must be applied here. + */ + assert(fmtl->bh == 4); + pitch_el_rows = isl_align(pitch_el_rows, 256 / 4); + } + if (ISL_DEV_GEN(dev) >= 9 && info->dim == ISL_SURF_DIM_3D && tile_info->tiling != ISL_TILING_LINEAR) { @@ -838,7 +974,7 @@ * Tile Mode != Linear: This field must be set to an integer multiple * of the tile height */ - pitch_el_rows = isl_align(pitch_el_rows, tile_info->height); + pitch_el_rows = isl_align(pitch_el_rows, tile_info->logical_extent_el.height); } return pitch_el_rows; @@ -848,11 +984,9 @@ * Calculate the pitch of each surface row, in bytes. */ static uint32_t -isl_calc_row_pitch(const struct isl_device *dev, - const struct isl_surf_init_info *restrict info, - const struct isl_tile_info *tile_info, - const struct isl_extent3d *image_align_sa, - const struct isl_extent2d *phys_slice0_sa) +isl_calc_linear_row_pitch(const struct isl_device *dev, + const struct isl_surf_init_info *restrict info, + const struct isl_extent2d *phys_slice0_sa) { const struct isl_format_layout *fmtl = isl_format_get_layout(info->format); @@ -903,62 +1037,50 @@ * being used to determine whether additional pages need to be defined. */ assert(phys_slice0_sa->w % fmtl->bw == 0); - row_pitch = MAX(row_pitch, fmtl->bs * (phys_slice0_sa->w / fmtl->bw)); + const uint32_t bs = fmtl->bpb / 8; + row_pitch = MAX(row_pitch, bs * (phys_slice0_sa->w / fmtl->bw)); - switch (tile_info->tiling) { - case ISL_TILING_LINEAR: - /* From the Broadwel PRM >> Volume 2d: Command Reference: Structures >> - * RENDER_SURFACE_STATE Surface Pitch (p349): - * - * - For linear render target surfaces and surfaces accessed with the - * typed data port messages, the pitch must be a multiple of the - * element size for non-YUV surface formats. Pitch must be - * a multiple of 2 * element size for YUV surface formats. - * - * - [Requirements for SURFTYPE_BUFFER and SURFTYPE_STRBUF, which we - * ignore because isl doesn't do buffers.] - * - * - For other linear surfaces, the pitch can be any multiple of - * bytes. - */ - if (info->usage & ISL_SURF_USAGE_RENDER_TARGET_BIT) { - if (isl_format_is_yuv(info->format)) { - row_pitch = isl_align_npot(row_pitch, 2 * fmtl->bs); - } else { - row_pitch = isl_align_npot(row_pitch, fmtl->bs); - } + /* From the Broadwel PRM >> Volume 2d: Command Reference: Structures >> + * RENDER_SURFACE_STATE Surface Pitch (p349): + * + * - For linear render target surfaces and surfaces accessed with the + * typed data port messages, the pitch must be a multiple of the + * element size for non-YUV surface formats. Pitch must be + * a multiple of 2 * element size for YUV surface formats. + * + * - [Requirements for SURFTYPE_BUFFER and SURFTYPE_STRBUF, which we + * ignore because isl doesn't do buffers.] + * + * - For other linear surfaces, the pitch can be any multiple of + * bytes. + */ + if (info->usage & ISL_SURF_USAGE_RENDER_TARGET_BIT) { + if (isl_format_is_yuv(info->format)) { + row_pitch = isl_align_npot(row_pitch, 2 * bs); + } else { + row_pitch = isl_align_npot(row_pitch, bs); } - break; - default: - /* From the Broadwel PRM >> Volume 2d: Command Reference: Structures >> - * RENDER_SURFACE_STATE Surface Pitch (p349): - * - * - For tiled surfaces, the pitch must be a multiple of the tile - * width. - */ - row_pitch = isl_align(row_pitch, tile_info->width); - break; } return row_pitch; } /** - * Calculate the surface's total height, including padding, in units of - * surface elements. + * Calculate and apply any padding required for the surface. + * + * @param[inout] total_h_el is updated with the new height + * @param[out] pad_bytes is overwritten with additional padding requirements. */ -static uint32_t -isl_calc_total_height_el(const struct isl_device *dev, - const struct isl_surf_init_info *restrict info, - const struct isl_tile_info *tile_info, - uint32_t phys_array_len, - uint32_t row_pitch, - uint32_t array_pitch_el_rows) +static void +isl_apply_surface_padding(const struct isl_device *dev, + const struct isl_surf_init_info *restrict info, + const struct isl_tile_info *tile_info, + uint32_t *total_h_el, + uint32_t *pad_bytes) { const struct isl_format_layout *fmtl = isl_format_get_layout(info->format); - uint32_t total_h_el = phys_array_len * array_pitch_el_rows; - uint32_t pad_bytes = 0; + *pad_bytes = 0; /* From the Broadwell PRM >> Volume 5: Memory Views >> Common Surface * Formats >> Surface Padding Requirements >> Render Target and Media @@ -992,14 +1114,14 @@ * is to an even compressed row. */ if (isl_format_is_compressed(info->format)) - total_h_el = isl_align(total_h_el, 2); + *total_h_el = isl_align(*total_h_el, 2); /* * - For cube surfaces, an additional two rows of padding are required * at the bottom of the surface. */ if (info->usage & ISL_SURF_USAGE_CUBE_BIT) - total_h_el += 2; + *total_h_el += 2; /* * - For packed YUV, 96 bpt, 48 bpt, and 24 bpt surface formats, @@ -1008,9 +1130,9 @@ * padding requirements. */ if (isl_format_is_yuv(info->format) && - (fmtl->bs == 96 || fmtl->bs == 48|| fmtl->bs == 24)) { - total_h_el += 1; - pad_bytes += 16; + (fmtl->bpb == 96 || fmtl->bpb == 48|| fmtl->bpb == 24)) { + *total_h_el += 1; + *pad_bytes += 16; } /* @@ -1019,7 +1141,7 @@ * required above. */ if (tile_info->tiling == ISL_TILING_LINEAR) - pad_bytes += 64; + *pad_bytes += 64; /* The below text weakens, not strengthens, the padding requirements for * linear surfaces. Therefore we can safely ignore it. @@ -1039,7 +1161,7 @@ if (ISL_DEV_GEN(dev) >= 9 && tile_info->tiling == ISL_TILING_LINEAR && (info->dim == ISL_SURF_DIM_2D || info->dim == ISL_SURF_DIM_3D)) { - total_h_el = isl_align(total_h_el, 4); + *total_h_el = isl_align(*total_h_el, 4); } /* @@ -1049,13 +1171,8 @@ if (ISL_DEV_GEN(dev) >= 9 && tile_info->tiling == ISL_TILING_LINEAR && info->dim == ISL_SURF_DIM_1D) { - total_h_el += 4; + *total_h_el += 4; } - - /* Be sloppy. Align any leftover padding to a row boundary. */ - total_h_el += isl_align_div_npot(pad_bytes, row_pitch); - - return total_h_el; } bool @@ -1072,23 +1189,23 @@ .a = info->array_len, }; - enum isl_dim_layout dim_layout = - isl_surf_choose_dim_layout(dev, info->dim); - enum isl_tiling tiling; if (!isl_surf_choose_tiling(dev, info, &tiling)) return false; struct isl_tile_info tile_info; - if (!isl_tiling_get_info(dev, tiling, fmtl->bs, &tile_info)) + if (!isl_tiling_get_info(dev, tiling, fmtl->bpb, &tile_info)) return false; + const enum isl_dim_layout dim_layout = + isl_surf_choose_dim_layout(dev, info->dim, tiling); + enum isl_msaa_layout msaa_layout; if (!isl_choose_msaa_layout(dev, info, tiling, &msaa_layout)) return false; struct isl_extent3d image_align_el; - isl_choose_image_alignment_el(dev, info, tiling, msaa_layout, + isl_choose_image_alignment_el(dev, info, tiling, dim_layout, msaa_layout, &image_align_el); struct isl_extent3d image_align_sa = @@ -1110,27 +1227,66 @@ assert(phys_slice0_sa.w % fmtl->bw == 0); assert(phys_slice0_sa.h % fmtl->bh == 0); - const uint32_t row_pitch = isl_calc_row_pitch(dev, info, &tile_info, - &image_align_sa, - &phys_slice0_sa); - const uint32_t array_pitch_el_rows = isl_calc_array_pitch_el_rows(dev, info, &tile_info, dim_layout, array_pitch_span, &image_align_sa, &phys_level0_sa, &phys_slice0_sa); - const uint32_t total_h_el = - isl_calc_total_height_el(dev, info, &tile_info, - phys_level0_sa.array_len, row_pitch, - array_pitch_el_rows); - - const uint32_t total_h_sa = total_h_el * fmtl->bh; - const uint32_t size = row_pitch * isl_align(total_h_sa, tile_info.height); - - /* Alignment of surface base address, in bytes */ - uint32_t base_alignment = MAX(1, info->min_alignment); - assert(isl_is_pow2(base_alignment) && isl_is_pow2(tile_info.size)); - base_alignment = MAX(base_alignment, tile_info.size); + uint32_t total_h_el = phys_level0_sa.array_len * array_pitch_el_rows; + + uint32_t pad_bytes; + isl_apply_surface_padding(dev, info, &tile_info, &total_h_el, &pad_bytes); + + uint32_t row_pitch, size, base_alignment; + if (tiling == ISL_TILING_LINEAR) { + row_pitch = isl_calc_linear_row_pitch(dev, info, &phys_slice0_sa); + size = row_pitch * total_h_el + pad_bytes; + + /* From the Broadwell PRM Vol 2d, RENDER_SURFACE_STATE::SurfaceBaseAddress: + * + * "The Base Address for linear render target surfaces and surfaces + * accessed with the typed surface read/write data port messages must + * be element-size aligned, for non-YUV surface formats, or a + * multiple of 2 element-sizes for YUV surface formats. Other linear + * surfaces have no alignment requirements (byte alignment is + * sufficient.)" + */ + base_alignment = MAX(1, info->min_alignment); + if (info->usage & ISL_SURF_USAGE_RENDER_TARGET_BIT) { + if (isl_format_is_yuv(info->format)) { + base_alignment = MAX(base_alignment, fmtl->bpb / 4); + } else { + base_alignment = MAX(base_alignment, fmtl->bpb / 8); + } + } + base_alignment = isl_round_up_to_power_of_two(base_alignment); + } else { + assert(fmtl->bpb % tile_info.format_bpb == 0); + const uint32_t tile_el_scale = fmtl->bpb / tile_info.format_bpb; + + assert(phys_slice0_sa.w % fmtl->bw == 0); + const uint32_t total_w_el = phys_slice0_sa.width / fmtl->bw; + const uint32_t total_w_tl = + isl_align_div(total_w_el * tile_el_scale, + tile_info.logical_extent_el.width); + + row_pitch = total_w_tl * tile_info.phys_extent_B.width; + if (row_pitch < info->min_pitch) { + row_pitch = isl_align_npot(info->min_pitch, + tile_info.phys_extent_B.width); + } + + total_h_el += isl_align_div_npot(pad_bytes, row_pitch); + const uint32_t total_h_tl = + isl_align_div(total_h_el, tile_info.logical_extent_el.height); + + size = total_h_tl * tile_info.phys_extent_B.height * row_pitch; + + const uint32_t tile_size = tile_info.phys_extent_B.width * + tile_info.phys_extent_B.height; + assert(isl_is_pow2(info->min_alignment) && isl_is_pow2(tile_size)); + base_alignment = MAX(info->min_alignment, tile_size); + } *surf = (struct isl_surf) { .dim = info->dim, @@ -1164,7 +1320,190 @@ struct isl_tile_info *tile_info) { const struct isl_format_layout *fmtl = isl_format_get_layout(surf->format); - isl_tiling_get_info(dev, surf->tiling, fmtl->bs, tile_info); + isl_tiling_get_info(dev, surf->tiling, fmtl->bpb, tile_info); +} + +void +isl_surf_get_hiz_surf(const struct isl_device *dev, + const struct isl_surf *surf, + struct isl_surf *hiz_surf) +{ + assert(ISL_DEV_GEN(dev) >= 5 && ISL_DEV_USE_SEPARATE_STENCIL(dev)); + + /* Multisampled depth is always interleaved */ + assert(surf->msaa_layout == ISL_MSAA_LAYOUT_NONE || + surf->msaa_layout == ISL_MSAA_LAYOUT_INTERLEAVED); + + /* From the Broadwell PRM Vol. 7, "Hierarchical Depth Buffer": + * + * "The Surface Type, Height, Width, Depth, Minimum Array Element, Render + * Target View Extent, and Depth Coordinate Offset X/Y of the + * hierarchical depth buffer are inherited from the depth buffer. The + * height and width of the hierarchical depth buffer that must be + * allocated are computed by the following formulas, where HZ is the + * hierarchical depth buffer and Z is the depth buffer. The Z_Height, + * Z_Width, and Z_Depth values given in these formulas are those present + * in 3DSTATE_DEPTH_BUFFER incremented by one. + * + * "The value of Z_Height and Z_Width must each be multiplied by 2 before + * being applied to the table below if Number of Multisamples is set to + * NUMSAMPLES_4. The value of Z_Height must be multiplied by 2 and + * Z_Width must be multiplied by 4 before being applied to the table + * below if Number of Multisamples is set to NUMSAMPLES_8." + * + * In the Sky Lake PRM, the second paragraph is replaced with this: + * + * "The Z_Height and Z_Width values must equal those present in + * 3DSTATE_DEPTH_BUFFER incremented by one." + * + * In other words, on Sandy Bridge through Broadwell, each 128-bit HiZ + * block corresponds to a region of 8x4 samples in the primary depth + * surface. On Sky Lake, on the other hand, each HiZ block corresponds to + * a region of 8x4 pixels in the primary depth surface regardless of the + * number of samples. The dimensions of a HiZ block in both pixels and + * samples are given in the table below: + * + * | SNB - BDW | SKL+ + * ------+-----------+------------- + * 1x | 8 x 4 sa | 8 x 4 sa + * MSAA | 8 x 4 px | 8 x 4 px + * ------+-----------+------------- + * 2x | 8 x 4 sa | 16 x 4 sa + * MSAA | 4 x 4 px | 8 x 4 px + * ------+-----------+------------- + * 4x | 8 x 4 sa | 16 x 8 sa + * MSAA | 4 x 2 px | 8 x 4 px + * ------+-----------+------------- + * 8x | 8 x 4 sa | 32 x 8 sa + * MSAA | 2 x 2 px | 8 x 4 px + * ------+-----------+------------- + * 16x | N/A | 32 x 16 sa + * MSAA | N/A | 8 x 4 px + * ------+-----------+------------- + * + * There are a number of different ways that this discrepency could be + * handled. The way we have chosen is to simply make MSAA HiZ have the + * same number of samples as the parent surface pre-Sky Lake and always be + * single-sampled on Sky Lake and above. Since the block sizes of + * compressed formats are given in samples, this neatly handles everything + * without the need for additional HiZ formats with different block sizes + * on SKL+. + */ + const unsigned samples = ISL_DEV_GEN(dev) >= 9 ? 1 : surf->samples; + + isl_surf_init(dev, hiz_surf, + .dim = surf->dim, + .format = ISL_FORMAT_HIZ, + .width = surf->logical_level0_px.width, + .height = surf->logical_level0_px.height, + .depth = surf->logical_level0_px.depth, + .levels = surf->levels, + .array_len = surf->logical_level0_px.array_len, + .samples = samples, + .usage = ISL_SURF_USAGE_HIZ_BIT, + .tiling_flags = ISL_TILING_HIZ_BIT); +} + +void +isl_surf_get_mcs_surf(const struct isl_device *dev, + const struct isl_surf *surf, + struct isl_surf *mcs_surf) +{ + /* It must be multisampled with an array layout */ + assert(surf->samples > 1 && surf->msaa_layout == ISL_MSAA_LAYOUT_ARRAY); + + /* The following are true of all multisampled surfaces */ + assert(surf->dim == ISL_SURF_DIM_2D); + assert(surf->levels == 1); + assert(surf->logical_level0_px.depth == 1); + + enum isl_format mcs_format; + switch (surf->samples) { + case 2: mcs_format = ISL_FORMAT_MCS_2X; break; + case 4: mcs_format = ISL_FORMAT_MCS_4X; break; + case 8: mcs_format = ISL_FORMAT_MCS_8X; break; + case 16: mcs_format = ISL_FORMAT_MCS_16X; break; + default: + unreachable("Invalid sample count"); + } + + isl_surf_init(dev, mcs_surf, + .dim = ISL_SURF_DIM_2D, + .format = mcs_format, + .width = surf->logical_level0_px.width, + .height = surf->logical_level0_px.height, + .depth = 1, + .levels = 1, + .array_len = surf->logical_level0_px.array_len, + .samples = 1, /* MCS surfaces are really single-sampled */ + .usage = ISL_SURF_USAGE_MCS_BIT, + .tiling_flags = ISL_TILING_Y0_BIT); +} + +bool +isl_surf_get_ccs_surf(const struct isl_device *dev, + const struct isl_surf *surf, + struct isl_surf *ccs_surf) +{ + assert(surf->samples == 1 && surf->msaa_layout == ISL_MSAA_LAYOUT_NONE); + assert(ISL_DEV_GEN(dev) >= 7); + + if (surf->usage & ISL_SURF_USAGE_DISABLE_AUX_BIT) + return false; + + if (ISL_DEV_GEN(dev) <= 8 && surf->dim != ISL_SURF_DIM_2D) + return false; + + if (isl_format_is_compressed(surf->format)) + return false; + + /* TODO: More conditions where it can fail. */ + + enum isl_format ccs_format; + if (ISL_DEV_GEN(dev) >= 9) { + if (!isl_tiling_is_any_y(surf->tiling)) + return false; + + switch (isl_format_get_layout(surf->format)->bpb) { + case 32: ccs_format = ISL_FORMAT_GEN9_CCS_32BPP; break; + case 64: ccs_format = ISL_FORMAT_GEN9_CCS_64BPP; break; + case 128: ccs_format = ISL_FORMAT_GEN9_CCS_128BPP; break; + default: + return false; + } + } else if (surf->tiling == ISL_TILING_Y0) { + switch (isl_format_get_layout(surf->format)->bpb) { + case 32: ccs_format = ISL_FORMAT_GEN7_CCS_32BPP_Y; break; + case 64: ccs_format = ISL_FORMAT_GEN7_CCS_64BPP_Y; break; + case 128: ccs_format = ISL_FORMAT_GEN7_CCS_128BPP_Y; break; + default: + return false; + } + } else if (surf->tiling == ISL_TILING_X) { + switch (isl_format_get_layout(surf->format)->bpb) { + case 32: ccs_format = ISL_FORMAT_GEN7_CCS_32BPP_X; break; + case 64: ccs_format = ISL_FORMAT_GEN7_CCS_64BPP_X; break; + case 128: ccs_format = ISL_FORMAT_GEN7_CCS_128BPP_X; break; + default: + return false; + } + } else { + return false; + } + + isl_surf_init(dev, ccs_surf, + .dim = surf->dim, + .format = ccs_format, + .width = surf->logical_level0_px.width, + .height = surf->logical_level0_px.height, + .depth = surf->logical_level0_px.depth, + .levels = surf->levels, + .array_len = surf->logical_level0_px.array_len, + .samples = 1, + .usage = ISL_SURF_USAGE_CCS_BIT, + .tiling_flags = ISL_TILING_CCS_BIT); + + return true; } void @@ -1191,6 +1530,20 @@ } switch (ISL_DEV_GEN(dev)) { + case 4: + if (ISL_DEV_IS_G4X(dev)) { + /* G45 surface state is the same as gen5 */ + isl_gen5_surf_fill_state_s(dev, state, info); + } else { + isl_gen4_surf_fill_state_s(dev, state, info); + } + break; + case 5: + isl_gen5_surf_fill_state_s(dev, state, info); + break; + case 6: + isl_gen6_surf_fill_state_s(dev, state, info); + break; case 7: if (ISL_DEV_IS_HASWELL(dev)) { isl_gen75_surf_fill_state_s(dev, state, info); @@ -1214,6 +1567,14 @@ const struct isl_buffer_fill_state_info *restrict info) { switch (ISL_DEV_GEN(dev)) { + case 4: + case 5: + /* Gen 4-5 are all the same when it comes to buffer surfaces */ + isl_gen5_buffer_fill_state_s(state, info); + break; + case 6: + isl_gen6_buffer_fill_state_s(state, info); + break; case 7: if (ISL_DEV_IS_HASWELL(dev)) { isl_gen75_buffer_fill_state_s(state, info); @@ -1238,13 +1599,15 @@ */ static void get_image_offset_sa_gen4_2d(const struct isl_surf *surf, - uint32_t level, uint32_t layer, + uint32_t level, uint32_t logical_array_layer, uint32_t *x_offset_sa, uint32_t *y_offset_sa) { assert(level < surf->levels); - assert(layer < surf->phys_level0_sa.array_len); - assert(surf->phys_level0_sa.depth == 1); + if (surf->dim == ISL_SURF_DIM_3D) + assert(logical_array_layer < surf->logical_level0_px.depth); + else + assert(logical_array_layer < surf->logical_level0_px.array_len); const struct isl_extent3d image_align_sa = isl_surf_get_image_alignment_sa(surf); @@ -1252,23 +1615,18 @@ const uint32_t W0 = surf->phys_level0_sa.width; const uint32_t H0 = surf->phys_level0_sa.height; + const uint32_t phys_layer = logical_array_layer * + (surf->msaa_layout == ISL_MSAA_LAYOUT_ARRAY ? surf->samples : 1); + uint32_t x = 0; - uint32_t y = layer * isl_surf_get_array_pitch_sa_rows(surf); + uint32_t y = phys_layer * isl_surf_get_array_pitch_sa_rows(surf); for (uint32_t l = 0; l < level; ++l) { if (l == 1) { uint32_t W = isl_minify(W0, l); - - if (surf->msaa_layout == ISL_MSAA_LAYOUT_INTERLEAVED) - isl_msaa_interleaved_scale_px_to_sa(surf->samples, &W, NULL); - x += isl_align_npot(W, image_align_sa.w); } else { uint32_t H = isl_minify(H0, l); - - if (surf->msaa_layout == ISL_MSAA_LAYOUT_INTERLEAVED) - isl_msaa_interleaved_scale_px_to_sa(surf->samples, NULL, &H); - y += isl_align_npot(H, image_align_sa.h); } } @@ -1363,13 +1721,13 @@ * @invariant logical_array_layer < logical array length of surface * @invariant logical_z_offset_px < logical depth of surface at level */ -static void -get_image_offset_sa(const struct isl_surf *surf, - uint32_t level, - uint32_t logical_array_layer, - uint32_t logical_z_offset_px, - uint32_t *x_offset_sa, - uint32_t *y_offset_sa) +void +isl_surf_get_image_offset_sa(const struct isl_surf *surf, + uint32_t level, + uint32_t logical_array_layer, + uint32_t logical_z_offset_px, + uint32_t *x_offset_sa, + uint32_t *y_offset_sa) { assert(level < surf->levels); assert(logical_array_layer < surf->logical_level0_px.array_len); @@ -1412,11 +1770,11 @@ < isl_minify(surf->logical_level0_px.depth, level)); uint32_t x_offset_sa, y_offset_sa; - get_image_offset_sa(surf, level, - logical_array_layer, - logical_z_offset_px, - &x_offset_sa, - &y_offset_sa); + isl_surf_get_image_offset_sa(surf, level, + logical_array_layer, + logical_z_offset_px, + &x_offset_sa, + &y_offset_sa); *x_offset_el = x_offset_sa / fmtl->bw; *y_offset_el = y_offset_sa / fmtl->bh; @@ -1433,29 +1791,44 @@ uint32_t *x_offset_el, uint32_t *y_offset_el) { + if (tiling == ISL_TILING_LINEAR) { + *base_address_offset = total_y_offset_el * row_pitch + + total_x_offset_el * bs; + *x_offset_el = 0; + *y_offset_el = 0; + return; + } + + const uint32_t bpb = bs * 8; + struct isl_tile_info tile_info; - isl_tiling_get_info(dev, tiling, bs, &tile_info); + isl_tiling_get_info(dev, tiling, bpb, &tile_info); - /* This function only really works for power-of-two surfaces. In - * theory, we could make it work for non-power-of-two surfaces by going - * to the left until we find a block that is bs-aligned. The Vulkan - * driver doesn't use non-power-of-two tiled surfaces so we'll leave - * this unimplemented for now. + assert(row_pitch % tile_info.phys_extent_B.width == 0); + + /* For non-power-of-two formats, we need the address to be both tile and + * element-aligned. The easiest way to achieve this is to work with a tile + * that is three times as wide as the regular tile. + * + * The tile info returned by get_tile_info has a logical size that is an + * integer number of tile_info.format_bpb size elements. To scale the + * tile, we scale up the physical width and then treat the logical tile + * size as if it has bpb size elements. */ - assert(tiling == ISL_TILING_LINEAR || isl_is_pow2(bs)); + const uint32_t tile_el_scale = bpb / tile_info.format_bpb; + tile_info.phys_extent_B.width *= tile_el_scale; - uint32_t small_y_offset_el = total_y_offset_el % tile_info.height; - uint32_t big_y_offset_el = total_y_offset_el - small_y_offset_el; - uint32_t big_y_offset_B = big_y_offset_el * row_pitch; - - uint32_t total_x_offset_B = total_x_offset_el * bs; - uint32_t small_x_offset_B = total_x_offset_B % tile_info.width; - uint32_t small_x_offset_el = small_x_offset_B / bs; - uint32_t big_x_offset_B = (total_x_offset_B / tile_info.width) * tile_info.size; - - *base_address_offset = big_y_offset_B + big_x_offset_B; - *x_offset_el = small_x_offset_el; - *y_offset_el = small_y_offset_el; + /* Compute the offset into the tile */ + *x_offset_el = total_x_offset_el % tile_info.logical_extent_el.w; + *y_offset_el = total_y_offset_el % tile_info.logical_extent_el.h; + + /* Compute the offset of the tile in units of whole tiles */ + uint32_t x_offset_tl = total_x_offset_el / tile_info.logical_extent_el.w; + uint32_t y_offset_tl = total_y_offset_el / tile_info.logical_extent_el.h; + + *base_address_offset = + y_offset_tl * tile_info.phys_extent_B.h * row_pitch + + x_offset_tl * tile_info.phys_extent_B.h * tile_info.phys_extent_B.w; } uint32_t diff -Nru mesa-12.0.6/src/intel/isl/isl_format.c mesa-17.0.7/src/intel/isl/isl_format.c --- mesa-12.0.6/src/intel/isl/isl_format.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/isl/isl_format.c 2017-06-01 10:37:10.000000000 +0000 @@ -24,7 +24,7 @@ #include #include "isl.h" -#include "brw_device_info.h" +#include "common/gen_device_info.h" struct surface_format_info { bool exists; @@ -97,7 +97,7 @@ SF( x, x, x, x, x, x, Y, x, x, x, R32G32B32A32_SSCALED) SF( x, x, x, x, x, x, Y, x, x, x, R32G32B32A32_USCALED) SF( x, x, x, x, x, x, 75, x, x, x, R32G32B32A32_SFIXED) - SF( x, x, x, x, x, x, x, x, x, x, R64G64_PASSTHRU) + SF( x, x, x, x, x, x, 80, x, x, x, R64G64_PASSTHRU) SF( Y, 50, x, x, x, x, Y, Y, x, x, R32G32B32_FLOAT) SF( Y, x, x, x, x, x, Y, Y, x, x, R32G32B32_SINT) SF( Y, x, x, x, x, x, Y, Y, x, x, R32G32B32_UINT) @@ -131,7 +131,7 @@ SF( x, x, x, x, x, x, Y, x, x, x, R32G32_SSCALED) SF( x, x, x, x, x, x, Y, x, x, x, R32G32_USCALED) SF( x, x, x, x, x, x, 75, x, x, x, R32G32_SFIXED) - SF( x, x, x, x, x, x, x, x, x, x, R64_PASSTHRU) + SF( x, x, x, x, x, x, 80, x, x, x, R64_PASSTHRU) SF( Y, Y, x, Y, Y, Y, Y, x, 60, 90, B8G8R8A8_UNORM) SF( Y, Y, x, x, Y, Y, x, x, x, x, B8G8R8A8_UNORM_SRGB) /* smpl filt shad CK RT AB VB SO color ccs_e */ @@ -217,9 +217,13 @@ SF(50, 50, x, x, x, x, x, x, x, x, P8A8_UNORM_PALETTE0) SF(50, 50, x, x, x, x, x, x, x, x, P8A8_UNORM_PALETTE1) SF( x, x, x, x, x, x, x, x, x, x, A1B5G5R5_UNORM) - SF(90, 90, x, x, 90, x, x, x, x, x, A4B4G4R4_UNORM) - SF( x, x, x, x, x, x, x, x, x, x, L8A8_UINT) - SF( x, x, x, x, x, x, x, x, x, x, L8A8_SINT) + /* According to the PRM, A4B4G4R4_UNORM isn't supported until Sky Lake + * but empirical testing indicates that at least sampling works just fine + * on Broadwell. + */ + SF(80, 80, x, x, 90, x, x, x, x, x, A4B4G4R4_UNORM) + SF(90, x, x, x, x, x, x, x, x, x, L8A8_UINT) + SF(90, x, x, x, x, x, x, x, x, x, L8A8_SINT) SF( Y, Y, x, 45, Y, Y, Y, x, x, x, R8_UNORM) SF( Y, Y, x, x, Y, 60, Y, x, x, x, R8_SNORM) SF( Y, x, x, x, Y, x, Y, x, x, x, R8_SINT) @@ -237,10 +241,10 @@ SF(45, 45, x, x, x, x, x, x, x, x, P4A4_UNORM_PALETTE1) SF(45, 45, x, x, x, x, x, x, x, x, A4P4_UNORM_PALETTE1) SF( x, x, x, x, x, x, x, x, x, x, Y8_UNORM) - SF( x, x, x, x, x, x, x, x, x, x, L8_UINT) - SF( x, x, x, x, x, x, x, x, x, x, L8_SINT) - SF( x, x, x, x, x, x, x, x, x, x, I8_UINT) - SF( x, x, x, x, x, x, x, x, x, x, I8_SINT) + SF(90, x, x, x, x, x, x, x, x, x, L8_UINT) + SF(90, x, x, x, x, x, x, x, x, x, L8_SINT) + SF(90, x, x, x, x, x, x, x, x, x, I8_UINT) + SF(90, x, x, x, x, x, x, x, x, x, I8_SINT) SF(45, 45, x, x, x, x, x, x, x, x, DXT1_RGB_SRGB) SF( Y, Y, x, x, x, x, x, x, x, x, R1_UNORM) SF( Y, Y, x, Y, Y, x, x, x, 60, x, YCRCB_NORMAL) @@ -261,8 +265,8 @@ SF( Y, Y, x, x, x, x, x, x, x, x, DXT1_RGB) /* smpl filt shad CK RT AB VB SO color ccs_e */ SF( Y, Y, x, x, x, x, x, x, x, x, FXT1) - SF( x, x, x, x, x, x, Y, x, x, x, R8G8B8_UNORM) - SF( x, x, x, x, x, x, Y, x, x, x, R8G8B8_SNORM) + SF(75, 75, x, x, x, x, Y, x, x, x, R8G8B8_UNORM) + SF(75, 75, x, x, x, x, Y, x, x, x, R8G8B8_SNORM) SF( x, x, x, x, x, x, Y, x, x, x, R8G8B8_SSCALED) SF( x, x, x, x, x, x, Y, x, x, x, R8G8B8_USCALED) SF( x, x, x, x, x, x, Y, x, x, x, R64G64B64A64_FLOAT) @@ -270,8 +274,8 @@ SF( Y, Y, x, x, x, x, x, x, x, x, BC4_SNORM) SF( Y, Y, x, x, x, x, x, x, x, x, BC5_SNORM) SF(50, 50, x, x, x, x, 60, x, x, x, R16G16B16_FLOAT) - SF( x, x, x, x, x, x, Y, x, x, x, R16G16B16_UNORM) - SF( x, x, x, x, x, x, Y, x, x, x, R16G16B16_SNORM) + SF(75, 75, x, x, x, x, Y, x, x, x, R16G16B16_UNORM) + SF(75, 75, x, x, x, x, Y, x, x, x, R16G16B16_SNORM) SF( x, x, x, x, x, x, Y, x, x, x, R16G16B16_SSCALED) SF( x, x, x, x, x, x, Y, x, x, x, R16G16B16_USCALED) SF(70, 70, x, x, x, x, x, x, x, x, BC6H_SF16) @@ -279,7 +283,7 @@ SF(70, 70, x, x, x, x, x, x, x, x, BC7_UNORM_SRGB) SF(70, 70, x, x, x, x, x, x, x, x, BC6H_UF16) SF( x, x, x, x, x, x, x, x, x, x, PLANAR_420_8) - SF( x, x, x, x, x, x, x, x, x, x, R8G8B8_UNORM_SRGB) + SF(75, 75, x, x, x, x, x, x, x, x, R8G8B8_UNORM_SRGB) SF(80, 80, x, x, x, x, x, x, x, x, ETC1_RGB8) SF(80, 80, x, x, x, x, x, x, x, x, ETC2_RGB8) SF(80, 80, x, x, x, x, x, x, x, x, EAC_R11) @@ -287,8 +291,8 @@ SF(80, 80, x, x, x, x, x, x, x, x, EAC_SIGNED_R11) SF(80, 80, x, x, x, x, x, x, x, x, EAC_SIGNED_RG11) SF(80, 80, x, x, x, x, x, x, x, x, ETC2_SRGB8) - SF( x, x, x, x, x, x, 75, x, x, x, R16G16B16_UINT) - SF( x, x, x, x, x, x, 75, x, x, x, R16G16B16_SINT) + SF(90, x, x, x, x, x, 75, x, x, x, R16G16B16_UINT) + SF(90, x, x, x, x, x, 75, x, x, x, R16G16B16_SINT) SF( x, x, x, x, x, x, 75, x, x, x, R32_SFIXED) SF( x, x, x, x, x, x, 75, x, x, x, R10G10B10A2_SNORM) SF( x, x, x, x, x, x, 75, x, x, x, R10G10B10A2_USCALED) @@ -305,48 +309,48 @@ SF(80, 80, x, x, x, x, x, x, x, x, ETC2_SRGB8_PTA) SF(80, 80, x, x, x, x, x, x, x, x, ETC2_EAC_RGBA8) SF(80, 80, x, x, x, x, x, x, x, x, ETC2_EAC_SRGB8_A8) - SF( x, x, x, x, x, x, 75, x, x, x, R8G8B8_UINT) - SF( x, x, x, x, x, x, 75, x, x, x, R8G8B8_SINT) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_4X4_FLT16) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_5X4_FLT16) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_5X5_FLT16) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_6X5_FLT16) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_6X6_FLT16) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_8X5_FLT16) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_8X6_FLT16) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_8X8_FLT16) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_10X5_FLT16) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_10X6_FLT16) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_10X8_FLT16) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_10X10_FLT16) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_12X10_FLT16) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_12X12_FLT16) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_4X4_U8SRGB) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_5X4_U8SRGB) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_5X5_U8SRGB) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_6X5_U8SRGB) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_6X6_U8SRGB) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_8X5_U8SRGB) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_8X6_U8SRGB) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_8X8_U8SRGB) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_10X5_U8SRGB) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_10X6_U8SRGB) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_10X8_U8SRGB) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_10X10_U8SRGB) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_12X10_U8SRGB) - SF(80, 80, x, x, x, x, x, x, x, x, ASTC_LDR_2D_12X12_U8SRGB) + SF(90, x, x, x, x, x, 75, x, x, x, R8G8B8_UINT) + SF(90, x, x, x, x, x, 75, x, x, x, R8G8B8_SINT) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_4X4_FLT16) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_5X4_FLT16) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_5X5_FLT16) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_6X5_FLT16) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_6X6_FLT16) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_8X5_FLT16) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_8X6_FLT16) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_8X8_FLT16) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_10X5_FLT16) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_10X6_FLT16) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_10X8_FLT16) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_10X10_FLT16) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_12X10_FLT16) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_12X12_FLT16) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_4X4_U8SRGB) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_5X4_U8SRGB) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_5X5_U8SRGB) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_6X5_U8SRGB) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_6X6_U8SRGB) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_8X5_U8SRGB) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_8X6_U8SRGB) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_8X8_U8SRGB) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_10X5_U8SRGB) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_10X6_U8SRGB) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_10X8_U8SRGB) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_10X10_U8SRGB) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_12X10_U8SRGB) + SF(90, 90, x, x, x, x, x, x, x, x, ASTC_LDR_2D_12X12_U8SRGB) }; #undef x #undef Y static unsigned -format_gen(const struct brw_device_info *devinfo) +format_gen(const struct gen_device_info *devinfo) { return devinfo->gen * 10 + (devinfo->is_g4x || devinfo->is_haswell) * 5; } bool -isl_format_supports_rendering(const struct brw_device_info *devinfo, +isl_format_supports_rendering(const struct gen_device_info *devinfo, enum isl_format format) { if (!format_info[format].exists) @@ -356,7 +360,7 @@ } bool -isl_format_supports_alpha_blending(const struct brw_device_info *devinfo, +isl_format_supports_alpha_blending(const struct gen_device_info *devinfo, enum isl_format format) { if (!format_info[format].exists) @@ -366,27 +370,59 @@ } bool -isl_format_supports_sampling(const struct brw_device_info *devinfo, +isl_format_supports_sampling(const struct gen_device_info *devinfo, enum isl_format format) { if (!format_info[format].exists) return false; + if (devinfo->is_baytrail) { + const struct isl_format_layout *fmtl = isl_format_get_layout(format); + /* Support for ETC1 and ETC2 exists on Bay Trail even though big-core + * GPUs didn't get it until Broadwell. + */ + if (fmtl->txc == ISL_TXC_ETC1 || fmtl->txc == ISL_TXC_ETC2) + return true; + } else if (devinfo->is_cherryview) { + const struct isl_format_layout *fmtl = isl_format_get_layout(format); + /* Support for ASTC exists on Cherry View even though big-core + * GPUs didn't get it until Skylake. + */ + if (fmtl->txc == ISL_TXC_ASTC) + return true; + } + return format_gen(devinfo) >= format_info[format].sampling; } bool -isl_format_supports_filtering(const struct brw_device_info *devinfo, +isl_format_supports_filtering(const struct gen_device_info *devinfo, enum isl_format format) { if (!format_info[format].exists) return false; + if (devinfo->is_baytrail) { + const struct isl_format_layout *fmtl = isl_format_get_layout(format); + /* Support for ETC1 and ETC2 exists on Bay Trail even though big-core + * GPUs didn't get it until Broadwell. + */ + if (fmtl->txc == ISL_TXC_ETC1 || fmtl->txc == ISL_TXC_ETC2) + return true; + } else if (devinfo->is_cherryview) { + const struct isl_format_layout *fmtl = isl_format_get_layout(format); + /* Support for ASTC exists on Cherry View even though big-core + * GPUs didn't get it until Skylake. + */ + if (fmtl->txc == ISL_TXC_ASTC) + return true; + } + return format_gen(devinfo) >= format_info[format].filtering; } bool -isl_format_supports_vertex_fetch(const struct brw_device_info *devinfo, +isl_format_supports_vertex_fetch(const struct gen_device_info *devinfo, enum isl_format format) { if (!format_info[format].exists) @@ -402,7 +438,7 @@ } bool -isl_format_supports_lossless_compression(const struct brw_device_info *devinfo, +isl_format_supports_lossless_compression(const struct gen_device_info *devinfo, enum isl_format format) { if (!format_info[format].exists) @@ -411,6 +447,41 @@ return format_gen(devinfo) >= format_info[format].lossless_compression; } +bool +isl_format_supports_multisampling(const struct gen_device_info *devinfo, + enum isl_format format) +{ + /* From the Sandybridge PRM, Volume 4 Part 1 p72, SURFACE_STATE, Surface + * Format: + * + * If Number of Multisamples is set to a value other than + * MULTISAMPLECOUNT_1, this field cannot be set to the following + * formats: + * + * - any format with greater than 64 bits per element + * - any compressed texture format (BC*) + * - any YCRCB* format + * + * The restriction on the format's size is removed on Broadwell. Also, + * there is an exception for HiZ which we treat as a compressed format and + * is allowed to be multisampled on Broadwell and earlier. + */ + if (format == ISL_FORMAT_HIZ) { + /* On SKL+, HiZ is always single-sampled even when the primary surface + * is multisampled. See also isl_surf_get_hiz_surf(). + */ + return devinfo->gen <= 8; + } else if (devinfo->gen < 8 && isl_format_get_layout(format)->bpb > 64) { + return false; + } else if (isl_format_is_compressed(format)) { + return false; + } else if (isl_format_is_yuv(format)) { + return false; + } else { + return true; + } +} + static inline bool isl_format_has_channel_type(enum isl_format fmt, enum isl_base_type type) { @@ -476,6 +547,30 @@ (fmtl->channels.i.bits > 0); } +uint32_t +isl_format_get_depth_format(enum isl_format fmt, bool has_stencil) +{ + switch (fmt) { + default: + unreachable("bad isl depth format"); + case ISL_FORMAT_R32_FLOAT_X8X24_TYPELESS: + assert(has_stencil); + return 0; /* D32_FLOAT_S8X24_UINT */ + case ISL_FORMAT_R32_FLOAT: + assert(!has_stencil); + return 1; /* D32_FLOAT */ + case ISL_FORMAT_R24_UNORM_X8_TYPELESS: + if (has_stencil) { + return 2; /* D24_UNORM_S8_UINT */ + } else { + return 3; /* D24_UNORM_X8_UINT */ + } + case ISL_FORMAT_R16_UNORM: + assert(!has_stencil); + return 5; /* D16_UNORM */ + } +} + enum isl_format isl_format_rgb_to_rgba(enum isl_format rgb) { diff -Nru mesa-12.0.6/src/intel/isl/isl_format_layout.c mesa-17.0.7/src/intel/isl/isl_format_layout.c --- mesa-12.0.6/src/intel/isl/isl_format_layout.c 2017-01-24 01:43:19.000000000 +0000 +++ mesa-17.0.7/src/intel/isl/isl_format_layout.c 2017-06-01 10:38:02.000000000 +0000 @@ -23,14 +23,14 @@ * IN THE SOFTWARE. */ -#include "isl.h" +#include "isl/isl.h" const struct isl_format_layout isl_format_layouts[] = { [ISL_FORMAT_R32G32B32A32_FLOAT] = { .format = ISL_FORMAT_R32G32B32A32_FLOAT, .name = "ISL_FORMAT_R32G32B32A32_FLOAT", - .bs = 16, + .bpb = 128, .bw = 1, .bh = 1, .bd = 1, @@ -50,7 +50,7 @@ [ISL_FORMAT_R32G32B32A32_SINT] = { .format = ISL_FORMAT_R32G32B32A32_SINT, .name = "ISL_FORMAT_R32G32B32A32_SINT", - .bs = 16, + .bpb = 128, .bw = 1, .bh = 1, .bd = 1, @@ -70,7 +70,7 @@ [ISL_FORMAT_R32G32B32A32_UINT] = { .format = ISL_FORMAT_R32G32B32A32_UINT, .name = "ISL_FORMAT_R32G32B32A32_UINT", - .bs = 16, + .bpb = 128, .bw = 1, .bh = 1, .bd = 1, @@ -90,7 +90,7 @@ [ISL_FORMAT_R32G32B32A32_UNORM] = { .format = ISL_FORMAT_R32G32B32A32_UNORM, .name = "ISL_FORMAT_R32G32B32A32_UNORM", - .bs = 16, + .bpb = 128, .bw = 1, .bh = 1, .bd = 1, @@ -110,7 +110,7 @@ [ISL_FORMAT_R32G32B32A32_SNORM] = { .format = ISL_FORMAT_R32G32B32A32_SNORM, .name = "ISL_FORMAT_R32G32B32A32_SNORM", - .bs = 16, + .bpb = 128, .bw = 1, .bh = 1, .bd = 1, @@ -130,7 +130,7 @@ [ISL_FORMAT_R64G64_FLOAT] = { .format = ISL_FORMAT_R64G64_FLOAT, .name = "ISL_FORMAT_R64G64_FLOAT", - .bs = 16, + .bpb = 128, .bw = 1, .bh = 1, .bd = 1, @@ -150,7 +150,7 @@ [ISL_FORMAT_R32G32B32X32_FLOAT] = { .format = ISL_FORMAT_R32G32B32X32_FLOAT, .name = "ISL_FORMAT_R32G32B32X32_FLOAT", - .bs = 16, + .bpb = 128, .bw = 1, .bh = 1, .bd = 1, @@ -170,7 +170,7 @@ [ISL_FORMAT_R32G32B32A32_SSCALED] = { .format = ISL_FORMAT_R32G32B32A32_SSCALED, .name = "ISL_FORMAT_R32G32B32A32_SSCALED", - .bs = 16, + .bpb = 128, .bw = 1, .bh = 1, .bd = 1, @@ -190,7 +190,7 @@ [ISL_FORMAT_R32G32B32A32_USCALED] = { .format = ISL_FORMAT_R32G32B32A32_USCALED, .name = "ISL_FORMAT_R32G32B32A32_USCALED", - .bs = 16, + .bpb = 128, .bw = 1, .bh = 1, .bd = 1, @@ -210,7 +210,7 @@ [ISL_FORMAT_R32G32B32A32_SFIXED] = { .format = ISL_FORMAT_R32G32B32A32_SFIXED, .name = "ISL_FORMAT_R32G32B32A32_SFIXED", - .bs = 16, + .bpb = 128, .bw = 1, .bh = 1, .bd = 1, @@ -230,7 +230,7 @@ [ISL_FORMAT_R64G64_PASSTHRU] = { .format = ISL_FORMAT_R64G64_PASSTHRU, .name = "ISL_FORMAT_R64G64_PASSTHRU", - .bs = 16, + .bpb = 128, .bw = 1, .bh = 1, .bd = 1, @@ -250,7 +250,7 @@ [ISL_FORMAT_R32G32B32_FLOAT] = { .format = ISL_FORMAT_R32G32B32_FLOAT, .name = "ISL_FORMAT_R32G32B32_FLOAT", - .bs = 12, + .bpb = 96, .bw = 1, .bh = 1, .bd = 1, @@ -270,7 +270,7 @@ [ISL_FORMAT_R32G32B32_SINT] = { .format = ISL_FORMAT_R32G32B32_SINT, .name = "ISL_FORMAT_R32G32B32_SINT", - .bs = 12, + .bpb = 96, .bw = 1, .bh = 1, .bd = 1, @@ -290,7 +290,7 @@ [ISL_FORMAT_R32G32B32_UINT] = { .format = ISL_FORMAT_R32G32B32_UINT, .name = "ISL_FORMAT_R32G32B32_UINT", - .bs = 12, + .bpb = 96, .bw = 1, .bh = 1, .bd = 1, @@ -310,7 +310,7 @@ [ISL_FORMAT_R32G32B32_UNORM] = { .format = ISL_FORMAT_R32G32B32_UNORM, .name = "ISL_FORMAT_R32G32B32_UNORM", - .bs = 12, + .bpb = 96, .bw = 1, .bh = 1, .bd = 1, @@ -330,7 +330,7 @@ [ISL_FORMAT_R32G32B32_SNORM] = { .format = ISL_FORMAT_R32G32B32_SNORM, .name = "ISL_FORMAT_R32G32B32_SNORM", - .bs = 12, + .bpb = 96, .bw = 1, .bh = 1, .bd = 1, @@ -350,7 +350,7 @@ [ISL_FORMAT_R32G32B32_SSCALED] = { .format = ISL_FORMAT_R32G32B32_SSCALED, .name = "ISL_FORMAT_R32G32B32_SSCALED", - .bs = 12, + .bpb = 96, .bw = 1, .bh = 1, .bd = 1, @@ -370,7 +370,7 @@ [ISL_FORMAT_R32G32B32_USCALED] = { .format = ISL_FORMAT_R32G32B32_USCALED, .name = "ISL_FORMAT_R32G32B32_USCALED", - .bs = 12, + .bpb = 96, .bw = 1, .bh = 1, .bd = 1, @@ -390,7 +390,7 @@ [ISL_FORMAT_R32G32B32_SFIXED] = { .format = ISL_FORMAT_R32G32B32_SFIXED, .name = "ISL_FORMAT_R32G32B32_SFIXED", - .bs = 12, + .bpb = 96, .bw = 1, .bh = 1, .bd = 1, @@ -410,7 +410,7 @@ [ISL_FORMAT_R16G16B16A16_UNORM] = { .format = ISL_FORMAT_R16G16B16A16_UNORM, .name = "ISL_FORMAT_R16G16B16A16_UNORM", - .bs = 8, + .bpb = 64, .bw = 1, .bh = 1, .bd = 1, @@ -430,7 +430,7 @@ [ISL_FORMAT_R16G16B16A16_SNORM] = { .format = ISL_FORMAT_R16G16B16A16_SNORM, .name = "ISL_FORMAT_R16G16B16A16_SNORM", - .bs = 8, + .bpb = 64, .bw = 1, .bh = 1, .bd = 1, @@ -450,7 +450,7 @@ [ISL_FORMAT_R16G16B16A16_SINT] = { .format = ISL_FORMAT_R16G16B16A16_SINT, .name = "ISL_FORMAT_R16G16B16A16_SINT", - .bs = 8, + .bpb = 64, .bw = 1, .bh = 1, .bd = 1, @@ -470,7 +470,7 @@ [ISL_FORMAT_R16G16B16A16_UINT] = { .format = ISL_FORMAT_R16G16B16A16_UINT, .name = "ISL_FORMAT_R16G16B16A16_UINT", - .bs = 8, + .bpb = 64, .bw = 1, .bh = 1, .bd = 1, @@ -490,7 +490,7 @@ [ISL_FORMAT_R16G16B16A16_FLOAT] = { .format = ISL_FORMAT_R16G16B16A16_FLOAT, .name = "ISL_FORMAT_R16G16B16A16_FLOAT", - .bs = 8, + .bpb = 64, .bw = 1, .bh = 1, .bd = 1, @@ -510,7 +510,7 @@ [ISL_FORMAT_R32G32_FLOAT] = { .format = ISL_FORMAT_R32G32_FLOAT, .name = "ISL_FORMAT_R32G32_FLOAT", - .bs = 8, + .bpb = 64, .bw = 1, .bh = 1, .bd = 1, @@ -530,7 +530,7 @@ [ISL_FORMAT_R32G32_SINT] = { .format = ISL_FORMAT_R32G32_SINT, .name = "ISL_FORMAT_R32G32_SINT", - .bs = 8, + .bpb = 64, .bw = 1, .bh = 1, .bd = 1, @@ -550,7 +550,7 @@ [ISL_FORMAT_R32G32_UINT] = { .format = ISL_FORMAT_R32G32_UINT, .name = "ISL_FORMAT_R32G32_UINT", - .bs = 8, + .bpb = 64, .bw = 1, .bh = 1, .bd = 1, @@ -570,7 +570,7 @@ [ISL_FORMAT_R32_FLOAT_X8X24_TYPELESS] = { .format = ISL_FORMAT_R32_FLOAT_X8X24_TYPELESS, .name = "ISL_FORMAT_R32_FLOAT_X8X24_TYPELESS", - .bs = 8, + .bpb = 64, .bw = 1, .bh = 1, .bd = 1, @@ -590,7 +590,7 @@ [ISL_FORMAT_X32_TYPELESS_G8X24_UINT] = { .format = ISL_FORMAT_X32_TYPELESS_G8X24_UINT, .name = "ISL_FORMAT_X32_TYPELESS_G8X24_UINT", - .bs = 8, + .bpb = 64, .bw = 1, .bh = 1, .bd = 1, @@ -610,7 +610,7 @@ [ISL_FORMAT_L32A32_FLOAT] = { .format = ISL_FORMAT_L32A32_FLOAT, .name = "ISL_FORMAT_L32A32_FLOAT", - .bs = 8, + .bpb = 64, .bw = 1, .bh = 1, .bd = 1, @@ -630,7 +630,7 @@ [ISL_FORMAT_R32G32_UNORM] = { .format = ISL_FORMAT_R32G32_UNORM, .name = "ISL_FORMAT_R32G32_UNORM", - .bs = 8, + .bpb = 64, .bw = 1, .bh = 1, .bd = 1, @@ -650,7 +650,7 @@ [ISL_FORMAT_R32G32_SNORM] = { .format = ISL_FORMAT_R32G32_SNORM, .name = "ISL_FORMAT_R32G32_SNORM", - .bs = 8, + .bpb = 64, .bw = 1, .bh = 1, .bd = 1, @@ -670,7 +670,7 @@ [ISL_FORMAT_R64_FLOAT] = { .format = ISL_FORMAT_R64_FLOAT, .name = "ISL_FORMAT_R64_FLOAT", - .bs = 8, + .bpb = 64, .bw = 1, .bh = 1, .bd = 1, @@ -690,7 +690,7 @@ [ISL_FORMAT_R16G16B16X16_UNORM] = { .format = ISL_FORMAT_R16G16B16X16_UNORM, .name = "ISL_FORMAT_R16G16B16X16_UNORM", - .bs = 8, + .bpb = 64, .bw = 1, .bh = 1, .bd = 1, @@ -710,7 +710,7 @@ [ISL_FORMAT_R16G16B16X16_FLOAT] = { .format = ISL_FORMAT_R16G16B16X16_FLOAT, .name = "ISL_FORMAT_R16G16B16X16_FLOAT", - .bs = 8, + .bpb = 64, .bw = 1, .bh = 1, .bd = 1, @@ -730,7 +730,7 @@ [ISL_FORMAT_A32X32_FLOAT] = { .format = ISL_FORMAT_A32X32_FLOAT, .name = "ISL_FORMAT_A32X32_FLOAT", - .bs = 8, + .bpb = 64, .bw = 1, .bh = 1, .bd = 1, @@ -750,7 +750,7 @@ [ISL_FORMAT_L32X32_FLOAT] = { .format = ISL_FORMAT_L32X32_FLOAT, .name = "ISL_FORMAT_L32X32_FLOAT", - .bs = 8, + .bpb = 64, .bw = 1, .bh = 1, .bd = 1, @@ -770,7 +770,7 @@ [ISL_FORMAT_I32X32_FLOAT] = { .format = ISL_FORMAT_I32X32_FLOAT, .name = "ISL_FORMAT_I32X32_FLOAT", - .bs = 8, + .bpb = 64, .bw = 1, .bh = 1, .bd = 1, @@ -790,7 +790,7 @@ [ISL_FORMAT_R16G16B16A16_SSCALED] = { .format = ISL_FORMAT_R16G16B16A16_SSCALED, .name = "ISL_FORMAT_R16G16B16A16_SSCALED", - .bs = 8, + .bpb = 64, .bw = 1, .bh = 1, .bd = 1, @@ -810,7 +810,7 @@ [ISL_FORMAT_R16G16B16A16_USCALED] = { .format = ISL_FORMAT_R16G16B16A16_USCALED, .name = "ISL_FORMAT_R16G16B16A16_USCALED", - .bs = 8, + .bpb = 64, .bw = 1, .bh = 1, .bd = 1, @@ -830,7 +830,7 @@ [ISL_FORMAT_R32G32_SSCALED] = { .format = ISL_FORMAT_R32G32_SSCALED, .name = "ISL_FORMAT_R32G32_SSCALED", - .bs = 8, + .bpb = 64, .bw = 1, .bh = 1, .bd = 1, @@ -850,7 +850,7 @@ [ISL_FORMAT_R32G32_USCALED] = { .format = ISL_FORMAT_R32G32_USCALED, .name = "ISL_FORMAT_R32G32_USCALED", - .bs = 8, + .bpb = 64, .bw = 1, .bh = 1, .bd = 1, @@ -870,7 +870,7 @@ [ISL_FORMAT_R32G32_FLOAT_LD] = { .format = ISL_FORMAT_R32G32_FLOAT_LD, .name = "ISL_FORMAT_R32G32_FLOAT_LD", - .bs = 8, + .bpb = 64, .bw = 1, .bh = 1, .bd = 1, @@ -890,7 +890,7 @@ [ISL_FORMAT_R32G32_SFIXED] = { .format = ISL_FORMAT_R32G32_SFIXED, .name = "ISL_FORMAT_R32G32_SFIXED", - .bs = 8, + .bpb = 64, .bw = 1, .bh = 1, .bd = 1, @@ -910,7 +910,7 @@ [ISL_FORMAT_R64_PASSTHRU] = { .format = ISL_FORMAT_R64_PASSTHRU, .name = "ISL_FORMAT_R64_PASSTHRU", - .bs = 8, + .bpb = 64, .bw = 1, .bh = 1, .bd = 1, @@ -930,7 +930,7 @@ [ISL_FORMAT_B8G8R8A8_UNORM] = { .format = ISL_FORMAT_B8G8R8A8_UNORM, .name = "ISL_FORMAT_B8G8R8A8_UNORM", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -950,7 +950,7 @@ [ISL_FORMAT_B8G8R8A8_UNORM_SRGB] = { .format = ISL_FORMAT_B8G8R8A8_UNORM_SRGB, .name = "ISL_FORMAT_B8G8R8A8_UNORM_SRGB", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -970,7 +970,7 @@ [ISL_FORMAT_R10G10B10A2_UNORM] = { .format = ISL_FORMAT_R10G10B10A2_UNORM, .name = "ISL_FORMAT_R10G10B10A2_UNORM", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -990,7 +990,7 @@ [ISL_FORMAT_R10G10B10A2_UNORM_SRGB] = { .format = ISL_FORMAT_R10G10B10A2_UNORM_SRGB, .name = "ISL_FORMAT_R10G10B10A2_UNORM_SRGB", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1010,7 +1010,7 @@ [ISL_FORMAT_R10G10B10A2_UINT] = { .format = ISL_FORMAT_R10G10B10A2_UINT, .name = "ISL_FORMAT_R10G10B10A2_UINT", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1030,7 +1030,7 @@ [ISL_FORMAT_R10G10B10_SNORM_A2_UNORM] = { .format = ISL_FORMAT_R10G10B10_SNORM_A2_UNORM, .name = "ISL_FORMAT_R10G10B10_SNORM_A2_UNORM", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1050,7 +1050,7 @@ [ISL_FORMAT_R8G8B8A8_UNORM] = { .format = ISL_FORMAT_R8G8B8A8_UNORM, .name = "ISL_FORMAT_R8G8B8A8_UNORM", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1070,7 +1070,7 @@ [ISL_FORMAT_R8G8B8A8_UNORM_SRGB] = { .format = ISL_FORMAT_R8G8B8A8_UNORM_SRGB, .name = "ISL_FORMAT_R8G8B8A8_UNORM_SRGB", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1090,7 +1090,7 @@ [ISL_FORMAT_R8G8B8A8_SNORM] = { .format = ISL_FORMAT_R8G8B8A8_SNORM, .name = "ISL_FORMAT_R8G8B8A8_SNORM", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1110,7 +1110,7 @@ [ISL_FORMAT_R8G8B8A8_SINT] = { .format = ISL_FORMAT_R8G8B8A8_SINT, .name = "ISL_FORMAT_R8G8B8A8_SINT", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1130,7 +1130,7 @@ [ISL_FORMAT_R8G8B8A8_UINT] = { .format = ISL_FORMAT_R8G8B8A8_UINT, .name = "ISL_FORMAT_R8G8B8A8_UINT", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1150,7 +1150,7 @@ [ISL_FORMAT_R16G16_UNORM] = { .format = ISL_FORMAT_R16G16_UNORM, .name = "ISL_FORMAT_R16G16_UNORM", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1170,7 +1170,7 @@ [ISL_FORMAT_R16G16_SNORM] = { .format = ISL_FORMAT_R16G16_SNORM, .name = "ISL_FORMAT_R16G16_SNORM", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1190,7 +1190,7 @@ [ISL_FORMAT_R16G16_SINT] = { .format = ISL_FORMAT_R16G16_SINT, .name = "ISL_FORMAT_R16G16_SINT", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1210,7 +1210,7 @@ [ISL_FORMAT_R16G16_UINT] = { .format = ISL_FORMAT_R16G16_UINT, .name = "ISL_FORMAT_R16G16_UINT", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1230,7 +1230,7 @@ [ISL_FORMAT_R16G16_FLOAT] = { .format = ISL_FORMAT_R16G16_FLOAT, .name = "ISL_FORMAT_R16G16_FLOAT", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1250,7 +1250,7 @@ [ISL_FORMAT_B10G10R10A2_UNORM] = { .format = ISL_FORMAT_B10G10R10A2_UNORM, .name = "ISL_FORMAT_B10G10R10A2_UNORM", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1270,7 +1270,7 @@ [ISL_FORMAT_B10G10R10A2_UNORM_SRGB] = { .format = ISL_FORMAT_B10G10R10A2_UNORM_SRGB, .name = "ISL_FORMAT_B10G10R10A2_UNORM_SRGB", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1290,7 +1290,7 @@ [ISL_FORMAT_R11G11B10_FLOAT] = { .format = ISL_FORMAT_R11G11B10_FLOAT, .name = "ISL_FORMAT_R11G11B10_FLOAT", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1310,7 +1310,7 @@ [ISL_FORMAT_R32_SINT] = { .format = ISL_FORMAT_R32_SINT, .name = "ISL_FORMAT_R32_SINT", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1330,7 +1330,7 @@ [ISL_FORMAT_R32_UINT] = { .format = ISL_FORMAT_R32_UINT, .name = "ISL_FORMAT_R32_UINT", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1350,7 +1350,7 @@ [ISL_FORMAT_R32_FLOAT] = { .format = ISL_FORMAT_R32_FLOAT, .name = "ISL_FORMAT_R32_FLOAT", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1370,7 +1370,7 @@ [ISL_FORMAT_R24_UNORM_X8_TYPELESS] = { .format = ISL_FORMAT_R24_UNORM_X8_TYPELESS, .name = "ISL_FORMAT_R24_UNORM_X8_TYPELESS", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1390,7 +1390,7 @@ [ISL_FORMAT_X24_TYPELESS_G8_UINT] = { .format = ISL_FORMAT_X24_TYPELESS_G8_UINT, .name = "ISL_FORMAT_X24_TYPELESS_G8_UINT", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1410,7 +1410,7 @@ [ISL_FORMAT_L32_UNORM] = { .format = ISL_FORMAT_L32_UNORM, .name = "ISL_FORMAT_L32_UNORM", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1430,7 +1430,7 @@ [ISL_FORMAT_A32_UNORM] = { .format = ISL_FORMAT_A32_UNORM, .name = "ISL_FORMAT_A32_UNORM", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1450,7 +1450,7 @@ [ISL_FORMAT_L16A16_UNORM] = { .format = ISL_FORMAT_L16A16_UNORM, .name = "ISL_FORMAT_L16A16_UNORM", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1470,7 +1470,7 @@ [ISL_FORMAT_I24X8_UNORM] = { .format = ISL_FORMAT_I24X8_UNORM, .name = "ISL_FORMAT_I24X8_UNORM", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1490,7 +1490,7 @@ [ISL_FORMAT_L24X8_UNORM] = { .format = ISL_FORMAT_L24X8_UNORM, .name = "ISL_FORMAT_L24X8_UNORM", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1510,7 +1510,7 @@ [ISL_FORMAT_A24X8_UNORM] = { .format = ISL_FORMAT_A24X8_UNORM, .name = "ISL_FORMAT_A24X8_UNORM", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1530,7 +1530,7 @@ [ISL_FORMAT_I32_FLOAT] = { .format = ISL_FORMAT_I32_FLOAT, .name = "ISL_FORMAT_I32_FLOAT", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1550,7 +1550,7 @@ [ISL_FORMAT_L32_FLOAT] = { .format = ISL_FORMAT_L32_FLOAT, .name = "ISL_FORMAT_L32_FLOAT", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1570,7 +1570,7 @@ [ISL_FORMAT_A32_FLOAT] = { .format = ISL_FORMAT_A32_FLOAT, .name = "ISL_FORMAT_A32_FLOAT", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1590,7 +1590,7 @@ [ISL_FORMAT_X8B8_UNORM_G8R8_SNORM] = { .format = ISL_FORMAT_X8B8_UNORM_G8R8_SNORM, .name = "ISL_FORMAT_X8B8_UNORM_G8R8_SNORM", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1610,7 +1610,7 @@ [ISL_FORMAT_A8X8_UNORM_G8R8_SNORM] = { .format = ISL_FORMAT_A8X8_UNORM_G8R8_SNORM, .name = "ISL_FORMAT_A8X8_UNORM_G8R8_SNORM", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1630,7 +1630,7 @@ [ISL_FORMAT_B8X8_UNORM_G8R8_SNORM] = { .format = ISL_FORMAT_B8X8_UNORM_G8R8_SNORM, .name = "ISL_FORMAT_B8X8_UNORM_G8R8_SNORM", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1650,7 +1650,7 @@ [ISL_FORMAT_B8G8R8X8_UNORM] = { .format = ISL_FORMAT_B8G8R8X8_UNORM, .name = "ISL_FORMAT_B8G8R8X8_UNORM", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1670,7 +1670,7 @@ [ISL_FORMAT_B8G8R8X8_UNORM_SRGB] = { .format = ISL_FORMAT_B8G8R8X8_UNORM_SRGB, .name = "ISL_FORMAT_B8G8R8X8_UNORM_SRGB", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1690,7 +1690,7 @@ [ISL_FORMAT_R8G8B8X8_UNORM] = { .format = ISL_FORMAT_R8G8B8X8_UNORM, .name = "ISL_FORMAT_R8G8B8X8_UNORM", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1710,7 +1710,7 @@ [ISL_FORMAT_R8G8B8X8_UNORM_SRGB] = { .format = ISL_FORMAT_R8G8B8X8_UNORM_SRGB, .name = "ISL_FORMAT_R8G8B8X8_UNORM_SRGB", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1730,7 +1730,7 @@ [ISL_FORMAT_R9G9B9E5_SHAREDEXP] = { .format = ISL_FORMAT_R9G9B9E5_SHAREDEXP, .name = "ISL_FORMAT_R9G9B9E5_SHAREDEXP", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1750,7 +1750,7 @@ [ISL_FORMAT_B10G10R10X2_UNORM] = { .format = ISL_FORMAT_B10G10R10X2_UNORM, .name = "ISL_FORMAT_B10G10R10X2_UNORM", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1770,7 +1770,7 @@ [ISL_FORMAT_L16A16_FLOAT] = { .format = ISL_FORMAT_L16A16_FLOAT, .name = "ISL_FORMAT_L16A16_FLOAT", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1790,7 +1790,7 @@ [ISL_FORMAT_R32_UNORM] = { .format = ISL_FORMAT_R32_UNORM, .name = "ISL_FORMAT_R32_UNORM", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1810,7 +1810,7 @@ [ISL_FORMAT_R32_SNORM] = { .format = ISL_FORMAT_R32_SNORM, .name = "ISL_FORMAT_R32_SNORM", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1830,7 +1830,7 @@ [ISL_FORMAT_R10G10B10X2_USCALED] = { .format = ISL_FORMAT_R10G10B10X2_USCALED, .name = "ISL_FORMAT_R10G10B10X2_USCALED", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1850,7 +1850,7 @@ [ISL_FORMAT_R8G8B8A8_SSCALED] = { .format = ISL_FORMAT_R8G8B8A8_SSCALED, .name = "ISL_FORMAT_R8G8B8A8_SSCALED", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1870,7 +1870,7 @@ [ISL_FORMAT_R8G8B8A8_USCALED] = { .format = ISL_FORMAT_R8G8B8A8_USCALED, .name = "ISL_FORMAT_R8G8B8A8_USCALED", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1890,7 +1890,7 @@ [ISL_FORMAT_R16G16_SSCALED] = { .format = ISL_FORMAT_R16G16_SSCALED, .name = "ISL_FORMAT_R16G16_SSCALED", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1910,7 +1910,7 @@ [ISL_FORMAT_R16G16_USCALED] = { .format = ISL_FORMAT_R16G16_USCALED, .name = "ISL_FORMAT_R16G16_USCALED", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1930,7 +1930,7 @@ [ISL_FORMAT_R32_SSCALED] = { .format = ISL_FORMAT_R32_SSCALED, .name = "ISL_FORMAT_R32_SSCALED", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1950,7 +1950,7 @@ [ISL_FORMAT_R32_USCALED] = { .format = ISL_FORMAT_R32_USCALED, .name = "ISL_FORMAT_R32_USCALED", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -1970,7 +1970,7 @@ [ISL_FORMAT_B5G6R5_UNORM] = { .format = ISL_FORMAT_B5G6R5_UNORM, .name = "ISL_FORMAT_B5G6R5_UNORM", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -1990,7 +1990,7 @@ [ISL_FORMAT_B5G6R5_UNORM_SRGB] = { .format = ISL_FORMAT_B5G6R5_UNORM_SRGB, .name = "ISL_FORMAT_B5G6R5_UNORM_SRGB", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2010,7 +2010,7 @@ [ISL_FORMAT_B5G5R5A1_UNORM] = { .format = ISL_FORMAT_B5G5R5A1_UNORM, .name = "ISL_FORMAT_B5G5R5A1_UNORM", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2030,7 +2030,7 @@ [ISL_FORMAT_B5G5R5A1_UNORM_SRGB] = { .format = ISL_FORMAT_B5G5R5A1_UNORM_SRGB, .name = "ISL_FORMAT_B5G5R5A1_UNORM_SRGB", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2050,7 +2050,7 @@ [ISL_FORMAT_B4G4R4A4_UNORM] = { .format = ISL_FORMAT_B4G4R4A4_UNORM, .name = "ISL_FORMAT_B4G4R4A4_UNORM", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2070,7 +2070,7 @@ [ISL_FORMAT_B4G4R4A4_UNORM_SRGB] = { .format = ISL_FORMAT_B4G4R4A4_UNORM_SRGB, .name = "ISL_FORMAT_B4G4R4A4_UNORM_SRGB", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2090,7 +2090,7 @@ [ISL_FORMAT_R8G8_UNORM] = { .format = ISL_FORMAT_R8G8_UNORM, .name = "ISL_FORMAT_R8G8_UNORM", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2110,7 +2110,7 @@ [ISL_FORMAT_R8G8_SNORM] = { .format = ISL_FORMAT_R8G8_SNORM, .name = "ISL_FORMAT_R8G8_SNORM", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2130,7 +2130,7 @@ [ISL_FORMAT_R8G8_SINT] = { .format = ISL_FORMAT_R8G8_SINT, .name = "ISL_FORMAT_R8G8_SINT", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2150,7 +2150,7 @@ [ISL_FORMAT_R8G8_UINT] = { .format = ISL_FORMAT_R8G8_UINT, .name = "ISL_FORMAT_R8G8_UINT", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2170,7 +2170,7 @@ [ISL_FORMAT_R16_UNORM] = { .format = ISL_FORMAT_R16_UNORM, .name = "ISL_FORMAT_R16_UNORM", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2190,7 +2190,7 @@ [ISL_FORMAT_R16_SNORM] = { .format = ISL_FORMAT_R16_SNORM, .name = "ISL_FORMAT_R16_SNORM", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2210,7 +2210,7 @@ [ISL_FORMAT_R16_SINT] = { .format = ISL_FORMAT_R16_SINT, .name = "ISL_FORMAT_R16_SINT", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2230,7 +2230,7 @@ [ISL_FORMAT_R16_UINT] = { .format = ISL_FORMAT_R16_UINT, .name = "ISL_FORMAT_R16_UINT", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2250,7 +2250,7 @@ [ISL_FORMAT_R16_FLOAT] = { .format = ISL_FORMAT_R16_FLOAT, .name = "ISL_FORMAT_R16_FLOAT", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2270,7 +2270,7 @@ [ISL_FORMAT_A8P8_UNORM_PALETTE0] = { .format = ISL_FORMAT_A8P8_UNORM_PALETTE0, .name = "ISL_FORMAT_A8P8_UNORM_PALETTE0", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2290,7 +2290,7 @@ [ISL_FORMAT_A8P8_UNORM_PALETTE1] = { .format = ISL_FORMAT_A8P8_UNORM_PALETTE1, .name = "ISL_FORMAT_A8P8_UNORM_PALETTE1", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2310,7 +2310,7 @@ [ISL_FORMAT_I16_UNORM] = { .format = ISL_FORMAT_I16_UNORM, .name = "ISL_FORMAT_I16_UNORM", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2330,7 +2330,7 @@ [ISL_FORMAT_L16_UNORM] = { .format = ISL_FORMAT_L16_UNORM, .name = "ISL_FORMAT_L16_UNORM", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2350,7 +2350,7 @@ [ISL_FORMAT_A16_UNORM] = { .format = ISL_FORMAT_A16_UNORM, .name = "ISL_FORMAT_A16_UNORM", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2370,7 +2370,7 @@ [ISL_FORMAT_L8A8_UNORM] = { .format = ISL_FORMAT_L8A8_UNORM, .name = "ISL_FORMAT_L8A8_UNORM", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2390,7 +2390,7 @@ [ISL_FORMAT_I16_FLOAT] = { .format = ISL_FORMAT_I16_FLOAT, .name = "ISL_FORMAT_I16_FLOAT", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2410,7 +2410,7 @@ [ISL_FORMAT_L16_FLOAT] = { .format = ISL_FORMAT_L16_FLOAT, .name = "ISL_FORMAT_L16_FLOAT", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2430,7 +2430,7 @@ [ISL_FORMAT_A16_FLOAT] = { .format = ISL_FORMAT_A16_FLOAT, .name = "ISL_FORMAT_A16_FLOAT", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2450,7 +2450,7 @@ [ISL_FORMAT_L8A8_UNORM_SRGB] = { .format = ISL_FORMAT_L8A8_UNORM_SRGB, .name = "ISL_FORMAT_L8A8_UNORM_SRGB", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2470,7 +2470,7 @@ [ISL_FORMAT_R5G5_SNORM_B6_UNORM] = { .format = ISL_FORMAT_R5G5_SNORM_B6_UNORM, .name = "ISL_FORMAT_R5G5_SNORM_B6_UNORM", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2490,7 +2490,7 @@ [ISL_FORMAT_B5G5R5X1_UNORM] = { .format = ISL_FORMAT_B5G5R5X1_UNORM, .name = "ISL_FORMAT_B5G5R5X1_UNORM", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2510,7 +2510,7 @@ [ISL_FORMAT_B5G5R5X1_UNORM_SRGB] = { .format = ISL_FORMAT_B5G5R5X1_UNORM_SRGB, .name = "ISL_FORMAT_B5G5R5X1_UNORM_SRGB", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2530,7 +2530,7 @@ [ISL_FORMAT_R8G8_SSCALED] = { .format = ISL_FORMAT_R8G8_SSCALED, .name = "ISL_FORMAT_R8G8_SSCALED", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2550,7 +2550,7 @@ [ISL_FORMAT_R8G8_USCALED] = { .format = ISL_FORMAT_R8G8_USCALED, .name = "ISL_FORMAT_R8G8_USCALED", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2570,7 +2570,7 @@ [ISL_FORMAT_R16_SSCALED] = { .format = ISL_FORMAT_R16_SSCALED, .name = "ISL_FORMAT_R16_SSCALED", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2590,7 +2590,7 @@ [ISL_FORMAT_R16_USCALED] = { .format = ISL_FORMAT_R16_USCALED, .name = "ISL_FORMAT_R16_USCALED", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2610,7 +2610,7 @@ [ISL_FORMAT_P8A8_UNORM_PALETTE0] = { .format = ISL_FORMAT_P8A8_UNORM_PALETTE0, .name = "ISL_FORMAT_P8A8_UNORM_PALETTE0", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2630,7 +2630,7 @@ [ISL_FORMAT_P8A8_UNORM_PALETTE1] = { .format = ISL_FORMAT_P8A8_UNORM_PALETTE1, .name = "ISL_FORMAT_P8A8_UNORM_PALETTE1", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2650,7 +2650,7 @@ [ISL_FORMAT_A1B5G5R5_UNORM] = { .format = ISL_FORMAT_A1B5G5R5_UNORM, .name = "ISL_FORMAT_A1B5G5R5_UNORM", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2670,7 +2670,7 @@ [ISL_FORMAT_A4B4G4R4_UNORM] = { .format = ISL_FORMAT_A4B4G4R4_UNORM, .name = "ISL_FORMAT_A4B4G4R4_UNORM", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2690,7 +2690,7 @@ [ISL_FORMAT_L8A8_UINT] = { .format = ISL_FORMAT_L8A8_UINT, .name = "ISL_FORMAT_L8A8_UINT", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2710,7 +2710,7 @@ [ISL_FORMAT_L8A8_SINT] = { .format = ISL_FORMAT_L8A8_SINT, .name = "ISL_FORMAT_L8A8_SINT", - .bs = 2, + .bpb = 16, .bw = 1, .bh = 1, .bd = 1, @@ -2730,7 +2730,7 @@ [ISL_FORMAT_R8_UNORM] = { .format = ISL_FORMAT_R8_UNORM, .name = "ISL_FORMAT_R8_UNORM", - .bs = 1, + .bpb = 8, .bw = 1, .bh = 1, .bd = 1, @@ -2750,7 +2750,7 @@ [ISL_FORMAT_R8_SNORM] = { .format = ISL_FORMAT_R8_SNORM, .name = "ISL_FORMAT_R8_SNORM", - .bs = 1, + .bpb = 8, .bw = 1, .bh = 1, .bd = 1, @@ -2770,7 +2770,7 @@ [ISL_FORMAT_R8_SINT] = { .format = ISL_FORMAT_R8_SINT, .name = "ISL_FORMAT_R8_SINT", - .bs = 1, + .bpb = 8, .bw = 1, .bh = 1, .bd = 1, @@ -2790,7 +2790,7 @@ [ISL_FORMAT_R8_UINT] = { .format = ISL_FORMAT_R8_UINT, .name = "ISL_FORMAT_R8_UINT", - .bs = 1, + .bpb = 8, .bw = 1, .bh = 1, .bd = 1, @@ -2810,7 +2810,7 @@ [ISL_FORMAT_A8_UNORM] = { .format = ISL_FORMAT_A8_UNORM, .name = "ISL_FORMAT_A8_UNORM", - .bs = 1, + .bpb = 8, .bw = 1, .bh = 1, .bd = 1, @@ -2830,7 +2830,7 @@ [ISL_FORMAT_I8_UNORM] = { .format = ISL_FORMAT_I8_UNORM, .name = "ISL_FORMAT_I8_UNORM", - .bs = 1, + .bpb = 8, .bw = 1, .bh = 1, .bd = 1, @@ -2850,7 +2850,7 @@ [ISL_FORMAT_L8_UNORM] = { .format = ISL_FORMAT_L8_UNORM, .name = "ISL_FORMAT_L8_UNORM", - .bs = 1, + .bpb = 8, .bw = 1, .bh = 1, .bd = 1, @@ -2870,7 +2870,7 @@ [ISL_FORMAT_P4A4_UNORM_PALETTE0] = { .format = ISL_FORMAT_P4A4_UNORM_PALETTE0, .name = "ISL_FORMAT_P4A4_UNORM_PALETTE0", - .bs = 1, + .bpb = 8, .bw = 1, .bh = 1, .bd = 1, @@ -2890,7 +2890,7 @@ [ISL_FORMAT_A4P4_UNORM_PALETTE0] = { .format = ISL_FORMAT_A4P4_UNORM_PALETTE0, .name = "ISL_FORMAT_A4P4_UNORM_PALETTE0", - .bs = 1, + .bpb = 8, .bw = 1, .bh = 1, .bd = 1, @@ -2910,7 +2910,7 @@ [ISL_FORMAT_R8_SSCALED] = { .format = ISL_FORMAT_R8_SSCALED, .name = "ISL_FORMAT_R8_SSCALED", - .bs = 1, + .bpb = 8, .bw = 1, .bh = 1, .bd = 1, @@ -2930,7 +2930,7 @@ [ISL_FORMAT_R8_USCALED] = { .format = ISL_FORMAT_R8_USCALED, .name = "ISL_FORMAT_R8_USCALED", - .bs = 1, + .bpb = 8, .bw = 1, .bh = 1, .bd = 1, @@ -2950,7 +2950,7 @@ [ISL_FORMAT_P8_UNORM_PALETTE0] = { .format = ISL_FORMAT_P8_UNORM_PALETTE0, .name = "ISL_FORMAT_P8_UNORM_PALETTE0", - .bs = 1, + .bpb = 8, .bw = 1, .bh = 1, .bd = 1, @@ -2970,7 +2970,7 @@ [ISL_FORMAT_L8_UNORM_SRGB] = { .format = ISL_FORMAT_L8_UNORM_SRGB, .name = "ISL_FORMAT_L8_UNORM_SRGB", - .bs = 1, + .bpb = 8, .bw = 1, .bh = 1, .bd = 1, @@ -2990,7 +2990,7 @@ [ISL_FORMAT_P8_UNORM_PALETTE1] = { .format = ISL_FORMAT_P8_UNORM_PALETTE1, .name = "ISL_FORMAT_P8_UNORM_PALETTE1", - .bs = 1, + .bpb = 8, .bw = 1, .bh = 1, .bd = 1, @@ -3010,7 +3010,7 @@ [ISL_FORMAT_P4A4_UNORM_PALETTE1] = { .format = ISL_FORMAT_P4A4_UNORM_PALETTE1, .name = "ISL_FORMAT_P4A4_UNORM_PALETTE1", - .bs = 1, + .bpb = 8, .bw = 1, .bh = 1, .bd = 1, @@ -3030,7 +3030,7 @@ [ISL_FORMAT_A4P4_UNORM_PALETTE1] = { .format = ISL_FORMAT_A4P4_UNORM_PALETTE1, .name = "ISL_FORMAT_A4P4_UNORM_PALETTE1", - .bs = 1, + .bpb = 8, .bw = 1, .bh = 1, .bd = 1, @@ -3050,7 +3050,7 @@ [ISL_FORMAT_Y8_UNORM] = { .format = ISL_FORMAT_Y8_UNORM, .name = "ISL_FORMAT_Y8_UNORM", - .bs = 0, + .bpb = 0, .bw = 0, .bh = 0, .bd = 0, @@ -3070,7 +3070,7 @@ [ISL_FORMAT_L8_UINT] = { .format = ISL_FORMAT_L8_UINT, .name = "ISL_FORMAT_L8_UINT", - .bs = 1, + .bpb = 8, .bw = 1, .bh = 1, .bd = 1, @@ -3090,7 +3090,7 @@ [ISL_FORMAT_L8_SINT] = { .format = ISL_FORMAT_L8_SINT, .name = "ISL_FORMAT_L8_SINT", - .bs = 1, + .bpb = 8, .bw = 1, .bh = 1, .bd = 1, @@ -3110,7 +3110,7 @@ [ISL_FORMAT_I8_UINT] = { .format = ISL_FORMAT_I8_UINT, .name = "ISL_FORMAT_I8_UINT", - .bs = 1, + .bpb = 8, .bw = 1, .bh = 1, .bd = 1, @@ -3130,7 +3130,7 @@ [ISL_FORMAT_I8_SINT] = { .format = ISL_FORMAT_I8_SINT, .name = "ISL_FORMAT_I8_SINT", - .bs = 1, + .bpb = 8, .bw = 1, .bh = 1, .bd = 1, @@ -3150,7 +3150,7 @@ [ISL_FORMAT_DXT1_RGB_SRGB] = { .format = ISL_FORMAT_DXT1_RGB_SRGB, .name = "ISL_FORMAT_DXT1_RGB_SRGB", - .bs = 8, + .bpb = 64, .bw = 4, .bh = 4, .bd = 1, @@ -3170,7 +3170,7 @@ [ISL_FORMAT_R1_UNORM] = { .format = ISL_FORMAT_R1_UNORM, .name = "ISL_FORMAT_R1_UNORM", - .bs = 0, + .bpb = 1, .bw = 1, .bh = 1, .bd = 1, @@ -3190,7 +3190,7 @@ [ISL_FORMAT_YCRCB_NORMAL] = { .format = ISL_FORMAT_YCRCB_NORMAL, .name = "ISL_FORMAT_YCRCB_NORMAL", - .bs = 0, + .bpb = 0, .bw = 0, .bh = 0, .bd = 0, @@ -3210,7 +3210,7 @@ [ISL_FORMAT_YCRCB_SWAPUVY] = { .format = ISL_FORMAT_YCRCB_SWAPUVY, .name = "ISL_FORMAT_YCRCB_SWAPUVY", - .bs = 0, + .bpb = 0, .bw = 0, .bh = 0, .bd = 0, @@ -3230,7 +3230,7 @@ [ISL_FORMAT_P2_UNORM_PALETTE0] = { .format = ISL_FORMAT_P2_UNORM_PALETTE0, .name = "ISL_FORMAT_P2_UNORM_PALETTE0", - .bs = 0, + .bpb = 2, .bw = 1, .bh = 1, .bd = 1, @@ -3250,7 +3250,7 @@ [ISL_FORMAT_P2_UNORM_PALETTE1] = { .format = ISL_FORMAT_P2_UNORM_PALETTE1, .name = "ISL_FORMAT_P2_UNORM_PALETTE1", - .bs = 0, + .bpb = 2, .bw = 1, .bh = 1, .bd = 1, @@ -3270,7 +3270,7 @@ [ISL_FORMAT_BC1_UNORM] = { .format = ISL_FORMAT_BC1_UNORM, .name = "ISL_FORMAT_BC1_UNORM", - .bs = 8, + .bpb = 64, .bw = 4, .bh = 4, .bd = 1, @@ -3290,7 +3290,7 @@ [ISL_FORMAT_BC2_UNORM] = { .format = ISL_FORMAT_BC2_UNORM, .name = "ISL_FORMAT_BC2_UNORM", - .bs = 16, + .bpb = 128, .bw = 4, .bh = 4, .bd = 1, @@ -3310,7 +3310,7 @@ [ISL_FORMAT_BC3_UNORM] = { .format = ISL_FORMAT_BC3_UNORM, .name = "ISL_FORMAT_BC3_UNORM", - .bs = 16, + .bpb = 128, .bw = 4, .bh = 4, .bd = 1, @@ -3330,7 +3330,7 @@ [ISL_FORMAT_BC4_UNORM] = { .format = ISL_FORMAT_BC4_UNORM, .name = "ISL_FORMAT_BC4_UNORM", - .bs = 8, + .bpb = 64, .bw = 4, .bh = 4, .bd = 1, @@ -3350,7 +3350,7 @@ [ISL_FORMAT_BC5_UNORM] = { .format = ISL_FORMAT_BC5_UNORM, .name = "ISL_FORMAT_BC5_UNORM", - .bs = 16, + .bpb = 128, .bw = 4, .bh = 4, .bd = 1, @@ -3370,7 +3370,7 @@ [ISL_FORMAT_BC1_UNORM_SRGB] = { .format = ISL_FORMAT_BC1_UNORM_SRGB, .name = "ISL_FORMAT_BC1_UNORM_SRGB", - .bs = 8, + .bpb = 64, .bw = 4, .bh = 4, .bd = 1, @@ -3390,7 +3390,7 @@ [ISL_FORMAT_BC2_UNORM_SRGB] = { .format = ISL_FORMAT_BC2_UNORM_SRGB, .name = "ISL_FORMAT_BC2_UNORM_SRGB", - .bs = 16, + .bpb = 128, .bw = 4, .bh = 4, .bd = 1, @@ -3410,7 +3410,7 @@ [ISL_FORMAT_BC3_UNORM_SRGB] = { .format = ISL_FORMAT_BC3_UNORM_SRGB, .name = "ISL_FORMAT_BC3_UNORM_SRGB", - .bs = 16, + .bpb = 128, .bw = 4, .bh = 4, .bd = 1, @@ -3430,7 +3430,7 @@ [ISL_FORMAT_MONO8] = { .format = ISL_FORMAT_MONO8, .name = "ISL_FORMAT_MONO8", - .bs = 0, + .bpb = 1, .bw = 1, .bh = 1, .bd = 1, @@ -3450,7 +3450,7 @@ [ISL_FORMAT_YCRCB_SWAPUV] = { .format = ISL_FORMAT_YCRCB_SWAPUV, .name = "ISL_FORMAT_YCRCB_SWAPUV", - .bs = 0, + .bpb = 0, .bw = 0, .bh = 0, .bd = 0, @@ -3470,7 +3470,7 @@ [ISL_FORMAT_YCRCB_SWAPY] = { .format = ISL_FORMAT_YCRCB_SWAPY, .name = "ISL_FORMAT_YCRCB_SWAPY", - .bs = 0, + .bpb = 0, .bw = 0, .bh = 0, .bd = 0, @@ -3490,7 +3490,7 @@ [ISL_FORMAT_DXT1_RGB] = { .format = ISL_FORMAT_DXT1_RGB, .name = "ISL_FORMAT_DXT1_RGB", - .bs = 8, + .bpb = 64, .bw = 4, .bh = 4, .bd = 1, @@ -3510,7 +3510,7 @@ [ISL_FORMAT_FXT1] = { .format = ISL_FORMAT_FXT1, .name = "ISL_FORMAT_FXT1", - .bs = 16, + .bpb = 128, .bw = 8, .bh = 4, .bd = 1, @@ -3530,7 +3530,7 @@ [ISL_FORMAT_R8G8B8_UNORM] = { .format = ISL_FORMAT_R8G8B8_UNORM, .name = "ISL_FORMAT_R8G8B8_UNORM", - .bs = 3, + .bpb = 24, .bw = 1, .bh = 1, .bd = 1, @@ -3550,7 +3550,7 @@ [ISL_FORMAT_R8G8B8_SNORM] = { .format = ISL_FORMAT_R8G8B8_SNORM, .name = "ISL_FORMAT_R8G8B8_SNORM", - .bs = 3, + .bpb = 24, .bw = 1, .bh = 1, .bd = 1, @@ -3570,7 +3570,7 @@ [ISL_FORMAT_R8G8B8_SSCALED] = { .format = ISL_FORMAT_R8G8B8_SSCALED, .name = "ISL_FORMAT_R8G8B8_SSCALED", - .bs = 3, + .bpb = 24, .bw = 1, .bh = 1, .bd = 1, @@ -3590,7 +3590,7 @@ [ISL_FORMAT_R8G8B8_USCALED] = { .format = ISL_FORMAT_R8G8B8_USCALED, .name = "ISL_FORMAT_R8G8B8_USCALED", - .bs = 3, + .bpb = 24, .bw = 1, .bh = 1, .bd = 1, @@ -3610,7 +3610,7 @@ [ISL_FORMAT_R64G64B64A64_FLOAT] = { .format = ISL_FORMAT_R64G64B64A64_FLOAT, .name = "ISL_FORMAT_R64G64B64A64_FLOAT", - .bs = 32, + .bpb = 256, .bw = 1, .bh = 1, .bd = 1, @@ -3630,7 +3630,7 @@ [ISL_FORMAT_R64G64B64_FLOAT] = { .format = ISL_FORMAT_R64G64B64_FLOAT, .name = "ISL_FORMAT_R64G64B64_FLOAT", - .bs = 24, + .bpb = 196, .bw = 1, .bh = 1, .bd = 1, @@ -3650,7 +3650,7 @@ [ISL_FORMAT_BC4_SNORM] = { .format = ISL_FORMAT_BC4_SNORM, .name = "ISL_FORMAT_BC4_SNORM", - .bs = 8, + .bpb = 64, .bw = 4, .bh = 4, .bd = 1, @@ -3670,7 +3670,7 @@ [ISL_FORMAT_BC5_SNORM] = { .format = ISL_FORMAT_BC5_SNORM, .name = "ISL_FORMAT_BC5_SNORM", - .bs = 16, + .bpb = 128, .bw = 4, .bh = 4, .bd = 1, @@ -3690,7 +3690,7 @@ [ISL_FORMAT_R16G16B16_FLOAT] = { .format = ISL_FORMAT_R16G16B16_FLOAT, .name = "ISL_FORMAT_R16G16B16_FLOAT", - .bs = 6, + .bpb = 48, .bw = 1, .bh = 1, .bd = 1, @@ -3710,7 +3710,7 @@ [ISL_FORMAT_R16G16B16_UNORM] = { .format = ISL_FORMAT_R16G16B16_UNORM, .name = "ISL_FORMAT_R16G16B16_UNORM", - .bs = 6, + .bpb = 48, .bw = 1, .bh = 1, .bd = 1, @@ -3730,7 +3730,7 @@ [ISL_FORMAT_R16G16B16_SNORM] = { .format = ISL_FORMAT_R16G16B16_SNORM, .name = "ISL_FORMAT_R16G16B16_SNORM", - .bs = 6, + .bpb = 48, .bw = 1, .bh = 1, .bd = 1, @@ -3750,7 +3750,7 @@ [ISL_FORMAT_R16G16B16_SSCALED] = { .format = ISL_FORMAT_R16G16B16_SSCALED, .name = "ISL_FORMAT_R16G16B16_SSCALED", - .bs = 6, + .bpb = 48, .bw = 1, .bh = 1, .bd = 1, @@ -3770,7 +3770,7 @@ [ISL_FORMAT_R16G16B16_USCALED] = { .format = ISL_FORMAT_R16G16B16_USCALED, .name = "ISL_FORMAT_R16G16B16_USCALED", - .bs = 6, + .bpb = 48, .bw = 1, .bh = 1, .bd = 1, @@ -3790,7 +3790,7 @@ [ISL_FORMAT_BC6H_SF16] = { .format = ISL_FORMAT_BC6H_SF16, .name = "ISL_FORMAT_BC6H_SF16", - .bs = 16, + .bpb = 128, .bw = 4, .bh = 4, .bd = 1, @@ -3810,7 +3810,7 @@ [ISL_FORMAT_BC7_UNORM] = { .format = ISL_FORMAT_BC7_UNORM, .name = "ISL_FORMAT_BC7_UNORM", - .bs = 16, + .bpb = 128, .bw = 4, .bh = 4, .bd = 1, @@ -3830,7 +3830,7 @@ [ISL_FORMAT_BC7_UNORM_SRGB] = { .format = ISL_FORMAT_BC7_UNORM_SRGB, .name = "ISL_FORMAT_BC7_UNORM_SRGB", - .bs = 16, + .bpb = 128, .bw = 4, .bh = 4, .bd = 1, @@ -3850,7 +3850,7 @@ [ISL_FORMAT_BC6H_UF16] = { .format = ISL_FORMAT_BC6H_UF16, .name = "ISL_FORMAT_BC6H_UF16", - .bs = 16, + .bpb = 128, .bw = 4, .bh = 4, .bd = 1, @@ -3870,7 +3870,7 @@ [ISL_FORMAT_PLANAR_420_8] = { .format = ISL_FORMAT_PLANAR_420_8, .name = "ISL_FORMAT_PLANAR_420_8", - .bs = 0, + .bpb = 0, .bw = 0, .bh = 0, .bd = 0, @@ -3890,7 +3890,7 @@ [ISL_FORMAT_R8G8B8_UNORM_SRGB] = { .format = ISL_FORMAT_R8G8B8_UNORM_SRGB, .name = "ISL_FORMAT_R8G8B8_UNORM_SRGB", - .bs = 3, + .bpb = 24, .bw = 1, .bh = 1, .bd = 1, @@ -3910,7 +3910,7 @@ [ISL_FORMAT_ETC1_RGB8] = { .format = ISL_FORMAT_ETC1_RGB8, .name = "ISL_FORMAT_ETC1_RGB8", - .bs = 8, + .bpb = 64, .bw = 4, .bh = 4, .bd = 1, @@ -3930,7 +3930,7 @@ [ISL_FORMAT_ETC2_RGB8] = { .format = ISL_FORMAT_ETC2_RGB8, .name = "ISL_FORMAT_ETC2_RGB8", - .bs = 8, + .bpb = 64, .bw = 4, .bh = 4, .bd = 1, @@ -3950,7 +3950,7 @@ [ISL_FORMAT_EAC_R11] = { .format = ISL_FORMAT_EAC_R11, .name = "ISL_FORMAT_EAC_R11", - .bs = 8, + .bpb = 64, .bw = 4, .bh = 4, .bd = 1, @@ -3970,7 +3970,7 @@ [ISL_FORMAT_EAC_RG11] = { .format = ISL_FORMAT_EAC_RG11, .name = "ISL_FORMAT_EAC_RG11", - .bs = 16, + .bpb = 128, .bw = 4, .bh = 4, .bd = 1, @@ -3990,7 +3990,7 @@ [ISL_FORMAT_EAC_SIGNED_R11] = { .format = ISL_FORMAT_EAC_SIGNED_R11, .name = "ISL_FORMAT_EAC_SIGNED_R11", - .bs = 8, + .bpb = 64, .bw = 4, .bh = 4, .bd = 1, @@ -4010,7 +4010,7 @@ [ISL_FORMAT_EAC_SIGNED_RG11] = { .format = ISL_FORMAT_EAC_SIGNED_RG11, .name = "ISL_FORMAT_EAC_SIGNED_RG11", - .bs = 16, + .bpb = 128, .bw = 4, .bh = 4, .bd = 1, @@ -4030,7 +4030,7 @@ [ISL_FORMAT_ETC2_SRGB8] = { .format = ISL_FORMAT_ETC2_SRGB8, .name = "ISL_FORMAT_ETC2_SRGB8", - .bs = 8, + .bpb = 64, .bw = 4, .bh = 4, .bd = 1, @@ -4050,7 +4050,7 @@ [ISL_FORMAT_R16G16B16_UINT] = { .format = ISL_FORMAT_R16G16B16_UINT, .name = "ISL_FORMAT_R16G16B16_UINT", - .bs = 6, + .bpb = 48, .bw = 1, .bh = 1, .bd = 1, @@ -4070,7 +4070,7 @@ [ISL_FORMAT_R16G16B16_SINT] = { .format = ISL_FORMAT_R16G16B16_SINT, .name = "ISL_FORMAT_R16G16B16_SINT", - .bs = 6, + .bpb = 48, .bw = 1, .bh = 1, .bd = 1, @@ -4090,7 +4090,7 @@ [ISL_FORMAT_R32_SFIXED] = { .format = ISL_FORMAT_R32_SFIXED, .name = "ISL_FORMAT_R32_SFIXED", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -4110,7 +4110,7 @@ [ISL_FORMAT_R10G10B10A2_SNORM] = { .format = ISL_FORMAT_R10G10B10A2_SNORM, .name = "ISL_FORMAT_R10G10B10A2_SNORM", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -4130,7 +4130,7 @@ [ISL_FORMAT_R10G10B10A2_USCALED] = { .format = ISL_FORMAT_R10G10B10A2_USCALED, .name = "ISL_FORMAT_R10G10B10A2_USCALED", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -4150,7 +4150,7 @@ [ISL_FORMAT_R10G10B10A2_SSCALED] = { .format = ISL_FORMAT_R10G10B10A2_SSCALED, .name = "ISL_FORMAT_R10G10B10A2_SSCALED", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -4170,7 +4170,7 @@ [ISL_FORMAT_R10G10B10A2_SINT] = { .format = ISL_FORMAT_R10G10B10A2_SINT, .name = "ISL_FORMAT_R10G10B10A2_SINT", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -4190,7 +4190,7 @@ [ISL_FORMAT_B10G10R10A2_SNORM] = { .format = ISL_FORMAT_B10G10R10A2_SNORM, .name = "ISL_FORMAT_B10G10R10A2_SNORM", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -4210,7 +4210,7 @@ [ISL_FORMAT_B10G10R10A2_USCALED] = { .format = ISL_FORMAT_B10G10R10A2_USCALED, .name = "ISL_FORMAT_B10G10R10A2_USCALED", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -4230,7 +4230,7 @@ [ISL_FORMAT_B10G10R10A2_SSCALED] = { .format = ISL_FORMAT_B10G10R10A2_SSCALED, .name = "ISL_FORMAT_B10G10R10A2_SSCALED", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -4250,7 +4250,7 @@ [ISL_FORMAT_B10G10R10A2_UINT] = { .format = ISL_FORMAT_B10G10R10A2_UINT, .name = "ISL_FORMAT_B10G10R10A2_UINT", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -4270,7 +4270,7 @@ [ISL_FORMAT_B10G10R10A2_SINT] = { .format = ISL_FORMAT_B10G10R10A2_SINT, .name = "ISL_FORMAT_B10G10R10A2_SINT", - .bs = 4, + .bpb = 32, .bw = 1, .bh = 1, .bd = 1, @@ -4290,7 +4290,7 @@ [ISL_FORMAT_R64G64B64A64_PASSTHRU] = { .format = ISL_FORMAT_R64G64B64A64_PASSTHRU, .name = "ISL_FORMAT_R64G64B64A64_PASSTHRU", - .bs = 32, + .bpb = 256, .bw = 1, .bh = 1, .bd = 1, @@ -4310,7 +4310,7 @@ [ISL_FORMAT_R64G64B64_PASSTHRU] = { .format = ISL_FORMAT_R64G64B64_PASSTHRU, .name = "ISL_FORMAT_R64G64B64_PASSTHRU", - .bs = 24, + .bpb = 192, .bw = 1, .bh = 1, .bd = 1, @@ -4330,7 +4330,7 @@ [ISL_FORMAT_ETC2_RGB8_PTA] = { .format = ISL_FORMAT_ETC2_RGB8_PTA, .name = "ISL_FORMAT_ETC2_RGB8_PTA", - .bs = 8, + .bpb = 64, .bw = 4, .bh = 4, .bd = 1, @@ -4350,7 +4350,7 @@ [ISL_FORMAT_ETC2_SRGB8_PTA] = { .format = ISL_FORMAT_ETC2_SRGB8_PTA, .name = "ISL_FORMAT_ETC2_SRGB8_PTA", - .bs = 8, + .bpb = 64, .bw = 4, .bh = 4, .bd = 1, @@ -4370,7 +4370,7 @@ [ISL_FORMAT_ETC2_EAC_RGBA8] = { .format = ISL_FORMAT_ETC2_EAC_RGBA8, .name = "ISL_FORMAT_ETC2_EAC_RGBA8", - .bs = 16, + .bpb = 128, .bw = 4, .bh = 4, .bd = 1, @@ -4390,7 +4390,7 @@ [ISL_FORMAT_ETC2_EAC_SRGB8_A8] = { .format = ISL_FORMAT_ETC2_EAC_SRGB8_A8, .name = "ISL_FORMAT_ETC2_EAC_SRGB8_A8", - .bs = 16, + .bpb = 128, .bw = 4, .bh = 4, .bd = 1, @@ -4410,7 +4410,7 @@ [ISL_FORMAT_R8G8B8_UINT] = { .format = ISL_FORMAT_R8G8B8_UINT, .name = "ISL_FORMAT_R8G8B8_UINT", - .bs = 3, + .bpb = 24, .bw = 1, .bh = 1, .bd = 1, @@ -4430,7 +4430,7 @@ [ISL_FORMAT_R8G8B8_SINT] = { .format = ISL_FORMAT_R8G8B8_SINT, .name = "ISL_FORMAT_R8G8B8_SINT", - .bs = 3, + .bpb = 24, .bw = 1, .bh = 1, .bd = 1, @@ -4450,7 +4450,7 @@ [ISL_FORMAT_RAW] = { .format = ISL_FORMAT_RAW, .name = "ISL_FORMAT_RAW", - .bs = 0, + .bpb = 0, .bw = 0, .bh = 0, .bd = 0, @@ -4470,7 +4470,7 @@ [ISL_FORMAT_ASTC_LDR_2D_4X4_U8SRGB] = { .format = ISL_FORMAT_ASTC_LDR_2D_4X4_U8SRGB, .name = "ISL_FORMAT_ASTC_LDR_2D_4X4_U8SRGB", - .bs = 16, + .bpb = 128, .bw = 4, .bh = 4, .bd = 1, @@ -4490,7 +4490,7 @@ [ISL_FORMAT_ASTC_LDR_2D_5X4_U8SRGB] = { .format = ISL_FORMAT_ASTC_LDR_2D_5X4_U8SRGB, .name = "ISL_FORMAT_ASTC_LDR_2D_5X4_U8SRGB", - .bs = 16, + .bpb = 128, .bw = 5, .bh = 4, .bd = 1, @@ -4510,7 +4510,7 @@ [ISL_FORMAT_ASTC_LDR_2D_5X5_U8SRGB] = { .format = ISL_FORMAT_ASTC_LDR_2D_5X5_U8SRGB, .name = "ISL_FORMAT_ASTC_LDR_2D_5X5_U8SRGB", - .bs = 16, + .bpb = 128, .bw = 5, .bh = 5, .bd = 1, @@ -4530,7 +4530,7 @@ [ISL_FORMAT_ASTC_LDR_2D_6X5_U8SRGB] = { .format = ISL_FORMAT_ASTC_LDR_2D_6X5_U8SRGB, .name = "ISL_FORMAT_ASTC_LDR_2D_6X5_U8SRGB", - .bs = 16, + .bpb = 128, .bw = 6, .bh = 5, .bd = 1, @@ -4550,7 +4550,7 @@ [ISL_FORMAT_ASTC_LDR_2D_6X6_U8SRGB] = { .format = ISL_FORMAT_ASTC_LDR_2D_6X6_U8SRGB, .name = "ISL_FORMAT_ASTC_LDR_2D_6X6_U8SRGB", - .bs = 16, + .bpb = 128, .bw = 6, .bh = 6, .bd = 1, @@ -4570,7 +4570,7 @@ [ISL_FORMAT_ASTC_LDR_2D_8X5_U8SRGB] = { .format = ISL_FORMAT_ASTC_LDR_2D_8X5_U8SRGB, .name = "ISL_FORMAT_ASTC_LDR_2D_8X5_U8SRGB", - .bs = 16, + .bpb = 128, .bw = 8, .bh = 5, .bd = 1, @@ -4590,7 +4590,7 @@ [ISL_FORMAT_ASTC_LDR_2D_8X6_U8SRGB] = { .format = ISL_FORMAT_ASTC_LDR_2D_8X6_U8SRGB, .name = "ISL_FORMAT_ASTC_LDR_2D_8X6_U8SRGB", - .bs = 16, + .bpb = 128, .bw = 8, .bh = 6, .bd = 1, @@ -4610,7 +4610,7 @@ [ISL_FORMAT_ASTC_LDR_2D_8X8_U8SRGB] = { .format = ISL_FORMAT_ASTC_LDR_2D_8X8_U8SRGB, .name = "ISL_FORMAT_ASTC_LDR_2D_8X8_U8SRGB", - .bs = 16, + .bpb = 128, .bw = 8, .bh = 8, .bd = 1, @@ -4630,7 +4630,7 @@ [ISL_FORMAT_ASTC_LDR_2D_10X5_U8SRGB] = { .format = ISL_FORMAT_ASTC_LDR_2D_10X5_U8SRGB, .name = "ISL_FORMAT_ASTC_LDR_2D_10X5_U8SRGB", - .bs = 16, + .bpb = 128, .bw = 10, .bh = 5, .bd = 1, @@ -4650,7 +4650,7 @@ [ISL_FORMAT_ASTC_LDR_2D_10X6_U8SRGB] = { .format = ISL_FORMAT_ASTC_LDR_2D_10X6_U8SRGB, .name = "ISL_FORMAT_ASTC_LDR_2D_10X6_U8SRGB", - .bs = 16, + .bpb = 128, .bw = 10, .bh = 6, .bd = 1, @@ -4670,7 +4670,7 @@ [ISL_FORMAT_ASTC_LDR_2D_10X8_U8SRGB] = { .format = ISL_FORMAT_ASTC_LDR_2D_10X8_U8SRGB, .name = "ISL_FORMAT_ASTC_LDR_2D_10X8_U8SRGB", - .bs = 16, + .bpb = 128, .bw = 10, .bh = 8, .bd = 1, @@ -4690,7 +4690,7 @@ [ISL_FORMAT_ASTC_LDR_2D_10X10_U8SRGB] = { .format = ISL_FORMAT_ASTC_LDR_2D_10X10_U8SRGB, .name = "ISL_FORMAT_ASTC_LDR_2D_10X10_U8SRGB", - .bs = 16, + .bpb = 128, .bw = 10, .bh = 10, .bd = 1, @@ -4710,7 +4710,7 @@ [ISL_FORMAT_ASTC_LDR_2D_12X10_U8SRGB] = { .format = ISL_FORMAT_ASTC_LDR_2D_12X10_U8SRGB, .name = "ISL_FORMAT_ASTC_LDR_2D_12X10_U8SRGB", - .bs = 16, + .bpb = 128, .bw = 12, .bh = 10, .bd = 1, @@ -4730,7 +4730,7 @@ [ISL_FORMAT_ASTC_LDR_2D_12X12_U8SRGB] = { .format = ISL_FORMAT_ASTC_LDR_2D_12X12_U8SRGB, .name = "ISL_FORMAT_ASTC_LDR_2D_12X12_U8SRGB", - .bs = 16, + .bpb = 128, .bw = 12, .bh = 12, .bd = 1, @@ -4750,7 +4750,7 @@ [ISL_FORMAT_ASTC_LDR_2D_4X4_FLT16] = { .format = ISL_FORMAT_ASTC_LDR_2D_4X4_FLT16, .name = "ISL_FORMAT_ASTC_LDR_2D_4X4_FLT16", - .bs = 16, + .bpb = 128, .bw = 4, .bh = 4, .bd = 1, @@ -4770,7 +4770,7 @@ [ISL_FORMAT_ASTC_LDR_2D_5X4_FLT16] = { .format = ISL_FORMAT_ASTC_LDR_2D_5X4_FLT16, .name = "ISL_FORMAT_ASTC_LDR_2D_5X4_FLT16", - .bs = 16, + .bpb = 128, .bw = 5, .bh = 4, .bd = 1, @@ -4790,7 +4790,7 @@ [ISL_FORMAT_ASTC_LDR_2D_5X5_FLT16] = { .format = ISL_FORMAT_ASTC_LDR_2D_5X5_FLT16, .name = "ISL_FORMAT_ASTC_LDR_2D_5X5_FLT16", - .bs = 16, + .bpb = 128, .bw = 5, .bh = 5, .bd = 1, @@ -4810,7 +4810,7 @@ [ISL_FORMAT_ASTC_LDR_2D_6X5_FLT16] = { .format = ISL_FORMAT_ASTC_LDR_2D_6X5_FLT16, .name = "ISL_FORMAT_ASTC_LDR_2D_6X5_FLT16", - .bs = 16, + .bpb = 128, .bw = 6, .bh = 5, .bd = 1, @@ -4830,7 +4830,7 @@ [ISL_FORMAT_ASTC_LDR_2D_6X6_FLT16] = { .format = ISL_FORMAT_ASTC_LDR_2D_6X6_FLT16, .name = "ISL_FORMAT_ASTC_LDR_2D_6X6_FLT16", - .bs = 16, + .bpb = 128, .bw = 6, .bh = 6, .bd = 1, @@ -4850,7 +4850,7 @@ [ISL_FORMAT_ASTC_LDR_2D_8X5_FLT16] = { .format = ISL_FORMAT_ASTC_LDR_2D_8X5_FLT16, .name = "ISL_FORMAT_ASTC_LDR_2D_8X5_FLT16", - .bs = 16, + .bpb = 128, .bw = 8, .bh = 5, .bd = 1, @@ -4870,7 +4870,7 @@ [ISL_FORMAT_ASTC_LDR_2D_8X6_FLT16] = { .format = ISL_FORMAT_ASTC_LDR_2D_8X6_FLT16, .name = "ISL_FORMAT_ASTC_LDR_2D_8X6_FLT16", - .bs = 16, + .bpb = 128, .bw = 8, .bh = 6, .bd = 1, @@ -4890,7 +4890,7 @@ [ISL_FORMAT_ASTC_LDR_2D_8X8_FLT16] = { .format = ISL_FORMAT_ASTC_LDR_2D_8X8_FLT16, .name = "ISL_FORMAT_ASTC_LDR_2D_8X8_FLT16", - .bs = 16, + .bpb = 128, .bw = 8, .bh = 8, .bd = 1, @@ -4910,7 +4910,7 @@ [ISL_FORMAT_ASTC_LDR_2D_10X5_FLT16] = { .format = ISL_FORMAT_ASTC_LDR_2D_10X5_FLT16, .name = "ISL_FORMAT_ASTC_LDR_2D_10X5_FLT16", - .bs = 16, + .bpb = 128, .bw = 10, .bh = 5, .bd = 1, @@ -4930,7 +4930,7 @@ [ISL_FORMAT_ASTC_LDR_2D_10X6_FLT16] = { .format = ISL_FORMAT_ASTC_LDR_2D_10X6_FLT16, .name = "ISL_FORMAT_ASTC_LDR_2D_10X6_FLT16", - .bs = 16, + .bpb = 128, .bw = 10, .bh = 6, .bd = 1, @@ -4950,7 +4950,7 @@ [ISL_FORMAT_ASTC_LDR_2D_10X8_FLT16] = { .format = ISL_FORMAT_ASTC_LDR_2D_10X8_FLT16, .name = "ISL_FORMAT_ASTC_LDR_2D_10X8_FLT16", - .bs = 16, + .bpb = 128, .bw = 10, .bh = 8, .bd = 1, @@ -4970,7 +4970,7 @@ [ISL_FORMAT_ASTC_LDR_2D_10X10_FLT16] = { .format = ISL_FORMAT_ASTC_LDR_2D_10X10_FLT16, .name = "ISL_FORMAT_ASTC_LDR_2D_10X10_FLT16", - .bs = 16, + .bpb = 128, .bw = 10, .bh = 10, .bd = 1, @@ -4990,7 +4990,7 @@ [ISL_FORMAT_ASTC_LDR_2D_12X10_FLT16] = { .format = ISL_FORMAT_ASTC_LDR_2D_12X10_FLT16, .name = "ISL_FORMAT_ASTC_LDR_2D_12X10_FLT16", - .bs = 16, + .bpb = 128, .bw = 12, .bh = 10, .bd = 1, @@ -5010,7 +5010,7 @@ [ISL_FORMAT_ASTC_LDR_2D_12X12_FLT16] = { .format = ISL_FORMAT_ASTC_LDR_2D_12X12_FLT16, .name = "ISL_FORMAT_ASTC_LDR_2D_12X12_FLT16", - .bs = 16, + .bpb = 128, .bw = 12, .bh = 12, .bd = 1, @@ -5027,4 +5027,284 @@ .txc = ISL_TXC_ASTC, }, + [ISL_FORMAT_HIZ] = { + .format = ISL_FORMAT_HIZ, + .name = "ISL_FORMAT_HIZ", + .bpb = 128, + .bw = 8, + .bh = 4, + .bd = 1, + .channels = { + .r = {}, + .g = {}, + .b = {}, + .a = {}, + .l = {}, + .i = {}, + .p = {}, + }, + .colorspace = ISL_COLORSPACE_NONE, + .txc = ISL_TXC_HIZ, + }, + + [ISL_FORMAT_MCS_2X] = { + .format = ISL_FORMAT_MCS_2X, + .name = "ISL_FORMAT_MCS_2X", + .bpb = 8, + .bw = 1, + .bh = 1, + .bd = 1, + .channels = { + .r = {}, + .g = {}, + .b = {}, + .a = {}, + .l = {}, + .i = {}, + .p = {}, + }, + .colorspace = ISL_COLORSPACE_NONE, + .txc = ISL_TXC_MCS, + }, + + [ISL_FORMAT_MCS_4X] = { + .format = ISL_FORMAT_MCS_4X, + .name = "ISL_FORMAT_MCS_4X", + .bpb = 8, + .bw = 1, + .bh = 1, + .bd = 1, + .channels = { + .r = {}, + .g = {}, + .b = {}, + .a = {}, + .l = {}, + .i = {}, + .p = {}, + }, + .colorspace = ISL_COLORSPACE_NONE, + .txc = ISL_TXC_MCS, + }, + + [ISL_FORMAT_MCS_8X] = { + .format = ISL_FORMAT_MCS_8X, + .name = "ISL_FORMAT_MCS_8X", + .bpb = 32, + .bw = 1, + .bh = 1, + .bd = 1, + .channels = { + .r = {}, + .g = {}, + .b = {}, + .a = {}, + .l = {}, + .i = {}, + .p = {}, + }, + .colorspace = ISL_COLORSPACE_NONE, + .txc = ISL_TXC_MCS, + }, + + [ISL_FORMAT_MCS_16X] = { + .format = ISL_FORMAT_MCS_16X, + .name = "ISL_FORMAT_MCS_16X", + .bpb = 64, + .bw = 1, + .bh = 1, + .bd = 1, + .channels = { + .r = {}, + .g = {}, + .b = {}, + .a = {}, + .l = {}, + .i = {}, + .p = {}, + }, + .colorspace = ISL_COLORSPACE_NONE, + .txc = ISL_TXC_MCS, + }, + + [ISL_FORMAT_GEN7_CCS_32BPP_X] = { + .format = ISL_FORMAT_GEN7_CCS_32BPP_X, + .name = "ISL_FORMAT_GEN7_CCS_32BPP_X", + .bpb = 1, + .bw = 16, + .bh = 2, + .bd = 1, + .channels = { + .r = {}, + .g = {}, + .b = {}, + .a = {}, + .l = {}, + .i = {}, + .p = {}, + }, + .colorspace = ISL_COLORSPACE_NONE, + .txc = ISL_TXC_CCS, + }, + + [ISL_FORMAT_GEN7_CCS_64BPP_X] = { + .format = ISL_FORMAT_GEN7_CCS_64BPP_X, + .name = "ISL_FORMAT_GEN7_CCS_64BPP_X", + .bpb = 1, + .bw = 8, + .bh = 2, + .bd = 1, + .channels = { + .r = {}, + .g = {}, + .b = {}, + .a = {}, + .l = {}, + .i = {}, + .p = {}, + }, + .colorspace = ISL_COLORSPACE_NONE, + .txc = ISL_TXC_CCS, + }, + + [ISL_FORMAT_GEN7_CCS_128BPP_X] = { + .format = ISL_FORMAT_GEN7_CCS_128BPP_X, + .name = "ISL_FORMAT_GEN7_CCS_128BPP_X", + .bpb = 1, + .bw = 4, + .bh = 2, + .bd = 1, + .channels = { + .r = {}, + .g = {}, + .b = {}, + .a = {}, + .l = {}, + .i = {}, + .p = {}, + }, + .colorspace = ISL_COLORSPACE_NONE, + .txc = ISL_TXC_CCS, + }, + + [ISL_FORMAT_GEN7_CCS_32BPP_Y] = { + .format = ISL_FORMAT_GEN7_CCS_32BPP_Y, + .name = "ISL_FORMAT_GEN7_CCS_32BPP_Y", + .bpb = 1, + .bw = 8, + .bh = 4, + .bd = 1, + .channels = { + .r = {}, + .g = {}, + .b = {}, + .a = {}, + .l = {}, + .i = {}, + .p = {}, + }, + .colorspace = ISL_COLORSPACE_NONE, + .txc = ISL_TXC_CCS, + }, + + [ISL_FORMAT_GEN7_CCS_64BPP_Y] = { + .format = ISL_FORMAT_GEN7_CCS_64BPP_Y, + .name = "ISL_FORMAT_GEN7_CCS_64BPP_Y", + .bpb = 1, + .bw = 4, + .bh = 4, + .bd = 1, + .channels = { + .r = {}, + .g = {}, + .b = {}, + .a = {}, + .l = {}, + .i = {}, + .p = {}, + }, + .colorspace = ISL_COLORSPACE_NONE, + .txc = ISL_TXC_CCS, + }, + + [ISL_FORMAT_GEN7_CCS_128BPP_Y] = { + .format = ISL_FORMAT_GEN7_CCS_128BPP_Y, + .name = "ISL_FORMAT_GEN7_CCS_128BPP_Y", + .bpb = 1, + .bw = 2, + .bh = 4, + .bd = 1, + .channels = { + .r = {}, + .g = {}, + .b = {}, + .a = {}, + .l = {}, + .i = {}, + .p = {}, + }, + .colorspace = ISL_COLORSPACE_NONE, + .txc = ISL_TXC_CCS, + }, + + [ISL_FORMAT_GEN9_CCS_32BPP] = { + .format = ISL_FORMAT_GEN9_CCS_32BPP, + .name = "ISL_FORMAT_GEN9_CCS_32BPP", + .bpb = 2, + .bw = 8, + .bh = 4, + .bd = 1, + .channels = { + .r = {}, + .g = {}, + .b = {}, + .a = {}, + .l = {}, + .i = {}, + .p = {}, + }, + .colorspace = ISL_COLORSPACE_NONE, + .txc = ISL_TXC_CCS, + }, + + [ISL_FORMAT_GEN9_CCS_64BPP] = { + .format = ISL_FORMAT_GEN9_CCS_64BPP, + .name = "ISL_FORMAT_GEN9_CCS_64BPP", + .bpb = 2, + .bw = 4, + .bh = 4, + .bd = 1, + .channels = { + .r = {}, + .g = {}, + .b = {}, + .a = {}, + .l = {}, + .i = {}, + .p = {}, + }, + .colorspace = ISL_COLORSPACE_NONE, + .txc = ISL_TXC_CCS, + }, + + [ISL_FORMAT_GEN9_CCS_128BPP] = { + .format = ISL_FORMAT_GEN9_CCS_128BPP, + .name = "ISL_FORMAT_GEN9_CCS_128BPP", + .bpb = 2, + .bw = 2, + .bh = 4, + .bd = 1, + .channels = { + .r = {}, + .g = {}, + .b = {}, + .a = {}, + .l = {}, + .i = {}, + .p = {}, + }, + .colorspace = ISL_COLORSPACE_NONE, + .txc = ISL_TXC_CCS, + }, + }; diff -Nru mesa-12.0.6/src/intel/isl/isl_format_layout.csv mesa-17.0.7/src/intel/isl/isl_format_layout.csv --- mesa-12.0.6/src/intel/isl/isl_format_layout.csv 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/isl/isl_format_layout.csv 2017-06-01 10:37:10.000000000 +0000 @@ -314,3 +314,17 @@ ASTC_LDR_2D_10X10_FLT16 , 128, 10, 10, 1, sf16, sf16, sf16, sf16, , , , linear, astc ASTC_LDR_2D_12X10_FLT16 , 128, 12, 10, 1, sf16, sf16, sf16, sf16, , , , linear, astc ASTC_LDR_2D_12X12_FLT16 , 128, 12, 12, 1, sf16, sf16, sf16, sf16, , , , linear, astc +HIZ , 128, 8, 4, 1, , , , , , , , , hiz +MCS_2X , 8, 1, 1, 1, , , , , , , , , mcs +MCS_4X , 8, 1, 1, 1, , , , , , , , , mcs +MCS_8X , 32, 1, 1, 1, , , , , , , , , mcs +MCS_16X , 64, 1, 1, 1, , , , , , , , , mcs +GEN7_CCS_32BPP_X , 1, 16, 2, 1, , , , , , , , , ccs +GEN7_CCS_64BPP_X , 1, 8, 2, 1, , , , , , , , , ccs +GEN7_CCS_128BPP_X , 1, 4, 2, 1, , , , , , , , , ccs +GEN7_CCS_32BPP_Y , 1, 8, 4, 1, , , , , , , , , ccs +GEN7_CCS_64BPP_Y , 1, 4, 4, 1, , , , , , , , , ccs +GEN7_CCS_128BPP_Y , 1, 2, 4, 1, , , , , , , , , ccs +GEN9_CCS_32BPP , 2, 8, 4, 1, , , , , , , , , ccs +GEN9_CCS_64BPP , 2, 4, 4, 1, , , , , , , , , ccs +GEN9_CCS_128BPP , 2, 2, 4, 1, , , , , , , , , ccs diff -Nru mesa-12.0.6/src/intel/isl/isl_gen4.c mesa-17.0.7/src/intel/isl/isl_gen4.c --- mesa-12.0.6/src/intel/isl/isl_gen4.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/isl/isl_gen4.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,10 +25,10 @@ #include "isl_priv.h" bool -gen4_choose_msaa_layout(const struct isl_device *dev, - const struct isl_surf_init_info *info, - enum isl_tiling tiling, - enum isl_msaa_layout *msaa_layout) +isl_gen4_choose_msaa_layout(const struct isl_device *dev, + const struct isl_surf_init_info *info, + enum isl_tiling tiling, + enum isl_msaa_layout *msaa_layout) { /* Gen4 and Gen5 do not support MSAA */ assert(info->samples >= 1); @@ -38,11 +38,12 @@ } void -gen4_choose_image_alignment_el(const struct isl_device *dev, - const struct isl_surf_init_info *restrict info, - enum isl_tiling tiling, - enum isl_msaa_layout msaa_layout, - struct isl_extent3d *image_align_el) +isl_gen4_choose_image_alignment_el(const struct isl_device *dev, + const struct isl_surf_init_info *restrict info, + enum isl_tiling tiling, + enum isl_dim_layout dim_layout, + enum isl_msaa_layout msaa_layout, + struct isl_extent3d *image_align_el) { assert(info->samples == 1); assert(msaa_layout == ISL_MSAA_LAYOUT_NONE); diff -Nru mesa-12.0.6/src/intel/isl/isl_gen4.h mesa-17.0.7/src/intel/isl/isl_gen4.h --- mesa-12.0.6/src/intel/isl/isl_gen4.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/isl/isl_gen4.h 2017-06-01 10:37:10.000000000 +0000 @@ -21,27 +21,31 @@ * IN THE SOFTWARE. */ -#pragma once +#ifndef ISL_GEN4_H +#define ISL_GEN4_H -#include "isl_priv.h" +#include "isl.h" #ifdef __cplusplus extern "C" { #endif bool -gen4_choose_msaa_layout(const struct isl_device *dev, - const struct isl_surf_init_info *info, - enum isl_tiling tiling, - enum isl_msaa_layout *msaa_layout); +isl_gen4_choose_msaa_layout(const struct isl_device *dev, + const struct isl_surf_init_info *info, + enum isl_tiling tiling, + enum isl_msaa_layout *msaa_layout); void -gen4_choose_image_alignment_el(const struct isl_device *dev, - const struct isl_surf_init_info *restrict info, - enum isl_tiling tiling, - enum isl_msaa_layout msaa_layout, - struct isl_extent3d *image_align_el); +isl_gen4_choose_image_alignment_el(const struct isl_device *dev, + const struct isl_surf_init_info *restrict info, + enum isl_tiling tiling, + enum isl_dim_layout dim_layout, + enum isl_msaa_layout msaa_layout, + struct isl_extent3d *image_align_el); #ifdef __cplusplus } #endif + +#endif /* ISL_GEN4_H */ diff -Nru mesa-12.0.6/src/intel/isl/isl_gen6.c mesa-17.0.7/src/intel/isl/isl_gen6.c --- mesa-12.0.6/src/intel/isl/isl_gen6.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/isl/isl_gen6.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,13 +25,11 @@ #include "isl_priv.h" bool -gen6_choose_msaa_layout(const struct isl_device *dev, - const struct isl_surf_init_info *info, - enum isl_tiling tiling, - enum isl_msaa_layout *msaa_layout) +isl_gen6_choose_msaa_layout(const struct isl_device *dev, + const struct isl_surf_init_info *info, + enum isl_tiling tiling, + enum isl_msaa_layout *msaa_layout) { - const struct isl_format_layout *fmtl = isl_format_get_layout(info->format); - assert(ISL_DEV_GEN(dev) == 6); assert(info->samples >= 1); @@ -40,22 +38,7 @@ return true; } - /* From the Sandybridge PRM, Volume 4 Part 1 p72, SURFACE_STATE, Surface - * Format: - * - * If Number of Multisamples is set to a value other than - * MULTISAMPLECOUNT_1, this field cannot be set to the following - * formats: - * - * - any format with greater than 64 bits per element - * - any compressed texture format (BC*) - * - any YCRCB* format - */ - if (fmtl->bs > 8) - return false; - if (isl_format_is_compressed(info->format)) - return false; - if (isl_format_is_yuv(info->format)) + if (!isl_format_supports_multisampling(dev->info, info->format)) return false; /* From the Sandybridge PRM, Volume 4 Part 1 p85, SURFACE_STATE, Number of @@ -83,12 +66,16 @@ } void -gen6_choose_image_alignment_el(const struct isl_device *dev, - const struct isl_surf_init_info *restrict info, - enum isl_tiling tiling, - enum isl_msaa_layout msaa_layout, - struct isl_extent3d *image_align_el) +isl_gen6_choose_image_alignment_el(const struct isl_device *dev, + const struct isl_surf_init_info *restrict info, + enum isl_tiling tiling, + enum isl_dim_layout dim_layout, + enum isl_msaa_layout msaa_layout, + struct isl_extent3d *image_align_el) { + /* Handled by isl_choose_image_alignment_el */ + assert(info->format != ISL_FORMAT_HIZ); + /* Note that the surface's horizontal image alignment is not programmable * on Sandybridge. * diff -Nru mesa-12.0.6/src/intel/isl/isl_gen6.h mesa-17.0.7/src/intel/isl/isl_gen6.h --- mesa-12.0.6/src/intel/isl/isl_gen6.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/isl/isl_gen6.h 2017-06-01 10:37:10.000000000 +0000 @@ -21,27 +21,31 @@ * IN THE SOFTWARE. */ -#pragma once +#ifndef ISL_GEN6_H +#define ISL_GEN6_H -#include "isl_priv.h" +#include "isl.h" #ifdef __cplusplus extern "C" { #endif bool -gen6_choose_msaa_layout(const struct isl_device *dev, - const struct isl_surf_init_info *info, - enum isl_tiling tiling, - enum isl_msaa_layout *msaa_layout); +isl_gen6_choose_msaa_layout(const struct isl_device *dev, + const struct isl_surf_init_info *info, + enum isl_tiling tiling, + enum isl_msaa_layout *msaa_layout); void -gen6_choose_image_alignment_el(const struct isl_device *dev, - const struct isl_surf_init_info *restrict info, - enum isl_tiling tiling, - enum isl_msaa_layout msaa_layout, - struct isl_extent3d *image_align_el); +isl_gen6_choose_image_alignment_el(const struct isl_device *dev, + const struct isl_surf_init_info *restrict info, + enum isl_tiling tiling, + enum isl_dim_layout dim_layout, + enum isl_msaa_layout msaa_layout, + struct isl_extent3d *image_align_el); #ifdef __cplusplus } #endif + +#endif /* ISL_GEN6_H */ diff -Nru mesa-12.0.6/src/intel/isl/isl_gen7.c mesa-17.0.7/src/intel/isl/isl_gen7.c --- mesa-12.0.6/src/intel/isl/isl_gen7.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/isl/isl_gen7.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,13 +25,11 @@ #include "isl_priv.h" bool -gen7_choose_msaa_layout(const struct isl_device *dev, - const struct isl_surf_init_info *info, - enum isl_tiling tiling, - enum isl_msaa_layout *msaa_layout) +isl_gen7_choose_msaa_layout(const struct isl_device *dev, + const struct isl_surf_init_info *info, + enum isl_tiling tiling, + enum isl_msaa_layout *msaa_layout) { - const struct isl_format_layout *fmtl = isl_format_get_layout(info->format); - bool require_array = false; bool require_interleaved = false; @@ -43,19 +41,7 @@ return true; } - /* From the Ivybridge PRM, Volume 4 Part 1 p63, SURFACE_STATE, Surface - * Format: - * - * If Number of Multisamples is set to a value other than - * MULTISAMPLECOUNT_1, this field cannot be set to the following - * formats: any format with greater than 64 bits per element, any - * compressed texture format (BC*), and any YCRCB* format. - */ - if (fmtl->bs > 8) - return false; - if (isl_format_is_compressed(info->format)) - return false; - if (isl_format_is_yuv(info->format)) + if (!isl_format_supports_multisampling(dev->info, info->format)) return false; /* From the Ivybridge PRM, Volume 4 Part 1 p73, SURFACE_STATE, Number of @@ -111,7 +97,8 @@ * In the table above, MSFMT_MSS refers to ISL_MSAA_LAYOUT_ARRAY, and * MSFMT_DEPTH_STENCIL refers to ISL_MSAA_LAYOUT_INTERLEAVED. */ - if (isl_surf_usage_is_depth_or_stencil(info->usage)) + if (isl_surf_usage_is_depth_or_stencil(info->usage) || + (info->usage & ISL_SURF_USAGE_HIZ_BIT)) require_interleaved = true; /* From the Ivybridge PRM, Volume 4 Part 1 p72, SURFACE_STATE, Multisampled @@ -168,9 +155,7 @@ gen7_format_needs_valign2(const struct isl_device *dev, enum isl_format format) { - /* This workaround applies only to gen7 */ - if (ISL_DEV_GEN(dev) > 7) - return false; + assert(ISL_DEV_GEN(dev) == 7); /* From the Ivybridge PRM (2012-05-31), Volume 4, Part 1, Section 2.12.1, * RENDER_SURFACE_STATE Surface Vertical Alignment: @@ -197,9 +182,9 @@ * flags except ISL_TILING_X_BIT and ISL_TILING_LINEAR_BIT. */ void -gen7_filter_tiling(const struct isl_device *dev, - const struct isl_surf_init_info *restrict info, - isl_tiling_flags_t *flags) +isl_gen6_filter_tiling(const struct isl_device *dev, + const struct isl_surf_init_info *restrict info, + isl_tiling_flags_t *flags) { /* IVB+ requires separate stencil */ assert(ISL_DEV_USE_SEPARATE_STENCIL(dev)); @@ -230,6 +215,16 @@ *flags &= ~ISL_TILING_W_BIT; } + /* From the SKL+ PRMs, RENDER_SURFACE_STATE:TileMode, + * If Surface Format is ASTC*, this field must be TILEMODE_YMAJOR. + */ + if (isl_format_get_layout(info->format)->txc == ISL_TXC_ASTC) + *flags &= ISL_TILING_Y0_BIT; + + /* MCS buffers are always Y-tiled */ + if (isl_format_get_layout(info->format)->txc == ISL_TXC_MCS) + *flags &= ISL_TILING_Y0_BIT; + if (info->usage & (ISL_SURF_USAGE_DISPLAY_ROTATE_90_BIT | ISL_SURF_USAGE_DISPLAY_ROTATE_180_BIT | ISL_SURF_USAGE_DISPLAY_ROTATE_270_BIT)) { @@ -258,9 +253,13 @@ * For multisample render targets, this field must be 1 (true). MSRTs * can only be tiled. * - * Multisample surfaces never require X tiling, and Y tiling generally - * performs better than X. So choose Y. (Unless it's stencil, then it - * must be W). + * From the Broadwell PRM >> Volume2d: Command Structures >> + * RENDER_SURFACE_STATE Tile Mode: + * + * If Number of Multisamples is not MULTISAMPLECOUNT_1, this field + * must be YMAJOR. + * + * As usual, though, stencil is special and requires W-tiling. */ *flags &= (ISL_TILING_ANY_Y_MASK | ISL_TILING_W_BIT); } @@ -278,6 +277,16 @@ */ *flags &= ~ISL_TILING_Y0_BIT; } + + /* From the Sandybridge PRM, Volume 1, Part 2, page 32: + * + * "NOTE: 128BPE Format Color Buffer ( render target ) MUST be either + * TileX or Linear." + * + * This is necessary all the way back to 965, but is permitted on Gen7+. + */ + if (ISL_DEV_GEN(dev) < 7 && isl_format_get_layout(info->format)->bpb >= 128) + *flags &= ~ISL_TILING_Y0_BIT; } /** @@ -335,37 +344,20 @@ */ if (isl_surf_usage_is_depth(info->usage) || info->samples > 1 || - tiling == ISL_TILING_Y0) { + ((info->usage & ISL_SURF_USAGE_RENDER_TARGET_BIT) && + tiling == ISL_TILING_Y0)) { require_valign4 = true; } if (isl_surf_usage_is_stencil(info->usage)) { /* The Ivybridge PRM states that the stencil buffer's vertical alignment * is 8 [Ivybridge PRM, Volume 1, Part 1, Section 6.18.4.4 Alignment - * Unit Size]. However, valign=8 is outside the set of valid values of - * RENDER_SURFACE_STATE.SurfaceVerticalAlignment, which is VALIGN_2 - * (0x0) and VALIGN_4 (0x1). - * - * The PRM is generally confused about the width, height, and alignment - * of the stencil buffer; and this confusion appears elsewhere. For - * example, the following PRM text effectively converts the stencil - * buffer's 8-pixel alignment to a 4-pixel alignment [Ivybridge PRM, - * Volume 1, Part 1, Section - * 6.18.4.2 Base Address and LOD Calculation]: - * - * For separate stencil buffer, the width must be mutiplied by 2 and - * height divided by 2 as follows: - * - * w_L = 2*i*ceil(W_L/i) - * h_L = 1/2*j*ceil(H_L/j) - * - * The root of the confusion is that, in W tiling, each pair of rows is - * interleaved into one. - * - * FINISHME(chadv): Decide to set valign=4 or valign=8 after isl's API - * is more polished. + * Unit Size]. valign=8 is outside the set of valid values of + * RENDER_SURFACE_STATE.SurfaceVerticalAlignment, but that's ok because + * a stencil buffer will never be used directly for texturing or + * rendering on gen7. */ - require_valign4 = true; + return 8; } assert(!require_valign2 || !require_valign4); @@ -378,12 +370,18 @@ } void -gen7_choose_image_alignment_el(const struct isl_device *dev, - const struct isl_surf_init_info *restrict info, - enum isl_tiling tiling, - enum isl_msaa_layout msaa_layout, - struct isl_extent3d *image_align_el) +isl_gen7_choose_image_alignment_el(const struct isl_device *dev, + const struct isl_surf_init_info *restrict info, + enum isl_tiling tiling, + enum isl_dim_layout dim_layout, + enum isl_msaa_layout msaa_layout, + struct isl_extent3d *image_align_el) { + assert(ISL_DEV_GEN(dev) == 7); + + /* Handled by isl_choose_image_alignment_el */ + assert(info->format != ISL_FORMAT_HIZ); + /* IVB+ does not support combined depthstencil. */ assert(!isl_surf_usage_is_depth_and_stencil(info->usage)); diff -Nru mesa-12.0.6/src/intel/isl/isl_gen7.h mesa-17.0.7/src/intel/isl/isl_gen7.h --- mesa-12.0.6/src/intel/isl/isl_gen7.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/isl/isl_gen7.h 2017-06-01 10:37:10.000000000 +0000 @@ -21,32 +21,36 @@ * IN THE SOFTWARE. */ -#pragma once +#ifndef ISL_GEN7_H +#define ISL_GEN7_H -#include "isl_priv.h" +#include "isl.h" #ifdef __cplusplus extern "C" { #endif void -gen7_filter_tiling(const struct isl_device *dev, - const struct isl_surf_init_info *restrict info, - isl_tiling_flags_t *flags); +isl_gen6_filter_tiling(const struct isl_device *dev, + const struct isl_surf_init_info *restrict info, + isl_tiling_flags_t *flags); bool -gen7_choose_msaa_layout(const struct isl_device *dev, - const struct isl_surf_init_info *info, - enum isl_tiling tiling, - enum isl_msaa_layout *msaa_layout); +isl_gen7_choose_msaa_layout(const struct isl_device *dev, + const struct isl_surf_init_info *info, + enum isl_tiling tiling, + enum isl_msaa_layout *msaa_layout); void -gen7_choose_image_alignment_el(const struct isl_device *dev, - const struct isl_surf_init_info *restrict info, - enum isl_tiling tiling, - enum isl_msaa_layout msaa_layout, - struct isl_extent3d *image_align_el); +isl_gen7_choose_image_alignment_el(const struct isl_device *dev, + const struct isl_surf_init_info *restrict info, + enum isl_tiling tiling, + enum isl_dim_layout dim_layout, + enum isl_msaa_layout msaa_layout, + struct isl_extent3d *image_align_el); #ifdef __cplusplus } #endif + +#endif /* ISL_GEN7_H */ diff -Nru mesa-12.0.6/src/intel/isl/isl_gen8.c mesa-17.0.7/src/intel/isl/isl_gen8.c --- mesa-12.0.6/src/intel/isl/isl_gen8.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/isl/isl_gen8.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,10 +25,10 @@ #include "isl_priv.h" bool -gen8_choose_msaa_layout(const struct isl_device *dev, - const struct isl_surf_init_info *info, - enum isl_tiling tiling, - enum isl_msaa_layout *msaa_layout) +isl_gen8_choose_msaa_layout(const struct isl_device *dev, + const struct isl_surf_init_info *info, + enum isl_tiling tiling, + enum isl_msaa_layout *msaa_layout) { bool require_array = false; bool require_interleaved = false; @@ -41,17 +41,6 @@ } /* From the Broadwell PRM >> Volume2d: Command Structures >> - * RENDER_SURFACE_STATE Tile Mode: - * - * - If Number of Multisamples is not MULTISAMPLECOUNT_1, this field - * must be YMAJOR. - * - * As usual, though, stencil is special. - */ - if (!isl_tiling_is_any_y(tiling) && !isl_surf_usage_is_stencil(info->usage)) - return false; - - /* From the Broadwell PRM >> Volume2d: Command Structures >> * RENDER_SURFACE_STATE Multisampled Surface Storage Format: * * All multisampled render target surfaces must have this field set to @@ -79,12 +68,11 @@ /* More obvious restrictions */ if (isl_surf_usage_is_display(info->usage)) return false; - if (isl_format_is_compressed(info->format)) - return false; - if (isl_format_is_yuv(info->format)) + if (!isl_format_supports_multisampling(dev->info, info->format)) return false; - if (isl_surf_usage_is_depth_or_stencil(info->usage)) + if (isl_surf_usage_is_depth_or_stencil(info->usage) || + (info->usage & ISL_SURF_USAGE_HIZ_BIT)) require_interleaved = true; if (require_array && require_interleaved) @@ -192,14 +180,31 @@ } void -gen8_choose_image_alignment_el(const struct isl_device *dev, - const struct isl_surf_init_info *restrict info, - enum isl_tiling tiling, - enum isl_msaa_layout msaa_layout, - struct isl_extent3d *image_align_el) +isl_gen8_choose_image_alignment_el(const struct isl_device *dev, + const struct isl_surf_init_info *restrict info, + enum isl_tiling tiling, + enum isl_dim_layout dim_layout, + enum isl_msaa_layout msaa_layout, + struct isl_extent3d *image_align_el) { + /* Handled by isl_choose_image_alignment_el */ + assert(info->format != ISL_FORMAT_HIZ); + assert(!isl_tiling_is_std_y(tiling)); + const struct isl_format_layout *fmtl = isl_format_get_layout(info->format); + if (fmtl->txc == ISL_TXC_CCS) { + /* + * Broadwell PRM Vol 7, "MCS Buffer for Render Target(s)" (p. 676): + * + * "Mip-mapped and arrayed surfaces are supported with MCS buffer + * layout with these alignments in the RT space: Horizontal + * Alignment = 256 and Vertical Alignment = 128. + */ + *image_align_el = isl_extent3d(256 / fmtl->bw, 128 / fmtl->bh, 1); + return; + } + /* The below text from the Broadwell PRM provides some insight into the * hardware's requirements for LOD alignment. From the Broadwell PRM >> * Volume 5: Memory Views >> Surface Layout >> 2D Surfaces: diff -Nru mesa-12.0.6/src/intel/isl/isl_gen8.h mesa-17.0.7/src/intel/isl/isl_gen8.h --- mesa-12.0.6/src/intel/isl/isl_gen8.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/isl/isl_gen8.h 2017-06-01 10:37:10.000000000 +0000 @@ -21,27 +21,31 @@ * IN THE SOFTWARE. */ -#pragma once +#ifndef ISL_GEN8_H +#define ISL_GEN8_H -#include "isl_priv.h" +#include "isl.h" #ifdef __cplusplus extern "C" { #endif bool -gen8_choose_msaa_layout(const struct isl_device *dev, - const struct isl_surf_init_info *info, - enum isl_tiling tiling, - enum isl_msaa_layout *msaa_layout); +isl_gen8_choose_msaa_layout(const struct isl_device *dev, + const struct isl_surf_init_info *info, + enum isl_tiling tiling, + enum isl_msaa_layout *msaa_layout); void -gen8_choose_image_alignment_el(const struct isl_device *dev, - const struct isl_surf_init_info *restrict info, - enum isl_tiling tiling, - enum isl_msaa_layout msaa_layout, - struct isl_extent3d *image_align_el); +isl_gen8_choose_image_alignment_el(const struct isl_device *dev, + const struct isl_surf_init_info *restrict info, + enum isl_tiling tiling, + enum isl_dim_layout dim_layout, + enum isl_msaa_layout msaa_layout, + struct isl_extent3d *image_align_el); #ifdef __cplusplus } #endif + +#endif /* ISL_GEN8_H */ diff -Nru mesa-12.0.6/src/intel/isl/isl_gen9.c mesa-17.0.7/src/intel/isl/isl_gen9.c --- mesa-12.0.6/src/intel/isl/isl_gen9.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/isl/isl_gen9.c 2017-06-01 10:37:10.000000000 +0000 @@ -40,7 +40,7 @@ assert(isl_tiling_is_std_y(tiling)); - const uint32_t bs = fmtl->bs; + const uint32_t bpb = fmtl->bpb; const uint32_t is_Ys = tiling == ISL_TILING_Ys; switch (info->dim) { @@ -49,7 +49,7 @@ * Layout and Tiling > 1D Surfaces > 1D Alignment Requirements. */ *align_sa = (struct isl_extent3d) { - .w = 1 << (12 - (ffs(bs) - 1) + (4 * is_Ys)), + .w = 1 << (12 - (ffs(bpb) - 4) + (4 * is_Ys)), .h = 1, .d = 1, }; @@ -60,8 +60,8 @@ * Requirements. */ *align_sa = (struct isl_extent3d) { - .w = 1 << (6 - ((ffs(bs) - 1) / 2) + (4 * is_Ys)), - .h = 1 << (6 - ((ffs(bs) - 0) / 2) + (4 * is_Ys)), + .w = 1 << (6 - ((ffs(bpb) - 4) / 2) + (4 * is_Ys)), + .h = 1 << (6 - ((ffs(bpb) - 3) / 2) + (4 * is_Ys)), .d = 1, }; @@ -86,9 +86,9 @@ * Layout and Tiling > 1D Surfaces > 1D Alignment Requirements. */ *align_sa = (struct isl_extent3d) { - .w = 1 << (4 - ((ffs(bs) + 1) / 3) + (4 * is_Ys)), - .h = 1 << (4 - ((ffs(bs) - 1) / 3) + (2 * is_Ys)), - .d = 1 << (4 - ((ffs(bs) - 0) / 3) + (2 * is_Ys)), + .w = 1 << (4 - ((ffs(bpb) - 2) / 3) + (4 * is_Ys)), + .h = 1 << (4 - ((ffs(bpb) - 4) / 3) + (2 * is_Ys)), + .d = 1 << (4 - ((ffs(bpb) - 3) / 3) + (2 * is_Ys)), }; return; } @@ -97,12 +97,28 @@ } void -gen9_choose_image_alignment_el(const struct isl_device *dev, - const struct isl_surf_init_info *restrict info, - enum isl_tiling tiling, - enum isl_msaa_layout msaa_layout, - struct isl_extent3d *image_align_el) +isl_gen9_choose_image_alignment_el(const struct isl_device *dev, + const struct isl_surf_init_info *restrict info, + enum isl_tiling tiling, + enum isl_dim_layout dim_layout, + enum isl_msaa_layout msaa_layout, + struct isl_extent3d *image_align_el) { + /* Handled by isl_choose_image_alignment_el */ + assert(info->format != ISL_FORMAT_HIZ); + + const struct isl_format_layout *fmtl = isl_format_get_layout(info->format); + if (fmtl->txc == ISL_TXC_CCS) { + /* Sky Lake PRM Vol. 7, "MCS Buffer for Render Target(s)" (p. 632): + * + * "Mip-mapped and arrayed surfaces are supported with MCS buffer + * layout with these alignments in the RT space: Horizontal + * Alignment = 128 and Vertical Alignment = 64." + */ + *image_align_el = isl_extent3d(128 / fmtl->bw, 64 / fmtl->bh, 1); + return; + } + /* This BSpec text provides some insight into the hardware's alignment * requirements [Skylake BSpec > Memory Views > Common Surface Formats > * Surface Layout and Tiling > 2D Surfaces]: @@ -158,7 +174,7 @@ return; } - if (info->dim == ISL_SURF_DIM_1D) { + if (dim_layout == ISL_DIM_LAYOUT_GEN9_1D) { /* See the Skylake BSpec > Memory Views > Common Surface Formats > Surface * Layout and Tiling > 1D Surfaces > 1D Alignment Requirements. */ @@ -180,6 +196,6 @@ return; } - gen8_choose_image_alignment_el(dev, info, tiling, msaa_layout, - image_align_el); + isl_gen8_choose_image_alignment_el(dev, info, tiling, dim_layout, + msaa_layout, image_align_el); } diff -Nru mesa-12.0.6/src/intel/isl/isl_gen9.h mesa-17.0.7/src/intel/isl/isl_gen9.h --- mesa-12.0.6/src/intel/isl/isl_gen9.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/isl/isl_gen9.h 2017-06-01 10:37:10.000000000 +0000 @@ -21,21 +21,25 @@ * IN THE SOFTWARE. */ -#pragma once +#ifndef ISL_GEN9_H +#define ISL_GEN9_H -#include "isl_priv.h" +#include "isl.h" #ifdef __cplusplus extern "C" { #endif void -gen9_choose_image_alignment_el(const struct isl_device *dev, - const struct isl_surf_init_info *restrict info, - enum isl_tiling tiling, - enum isl_msaa_layout msaa_layout, - struct isl_extent3d *image_align_el); +isl_gen9_choose_image_alignment_el(const struct isl_device *dev, + const struct isl_surf_init_info *restrict info, + enum isl_tiling tiling, + enum isl_dim_layout dim_layout, + enum isl_msaa_layout msaa_layout, + struct isl_extent3d *image_align_el); #ifdef __cplusplus } #endif + +#endif /* ISL_GEN9_H */ diff -Nru mesa-12.0.6/src/intel/isl/isl.h mesa-17.0.7/src/intel/isl/isl.h --- mesa-12.0.6/src/intel/isl/isl.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/isl/isl.h 2017-06-01 10:37:10.000000000 +0000 @@ -35,7 +35,8 @@ * - functions */ -#pragma once +#ifndef ISL_H +#define ISL_H #include #include @@ -48,7 +49,7 @@ extern "C" { #endif -struct brw_device_info; +struct gen_device_info; struct brw_image_param; #ifndef ISL_DEV_GEN @@ -65,6 +66,10 @@ (assert(ISL_DEV_GEN(__dev) == (__dev)->info->gen)) #endif +#ifndef ISL_DEV_IS_G4X +#define ISL_DEV_IS_G4X(__dev) ((__dev)->info->is_g4x) +#endif + #ifndef ISL_DEV_IS_HASWELL /** * @brief Get the hardware generation of isl_device. @@ -75,6 +80,10 @@ #define ISL_DEV_IS_HASWELL(__dev) ((__dev)->info->is_haswell) #endif +#ifndef ISL_DEV_IS_BAYTRAIL +#define ISL_DEV_IS_BAYTRAIL(__dev) ((__dev)->info->is_baytrail) +#endif + #ifndef ISL_DEV_USE_SEPARATE_STENCIL /** * You can define this as a compile-time constant in the CFLAGS. For example, @@ -345,6 +354,27 @@ ISL_FORMAT_ASTC_LDR_2D_12X10_FLT16 = 638, ISL_FORMAT_ASTC_LDR_2D_12X12_FLT16 = 639, + /* The formats that follow are internal to ISL and as such don't have an + * explicit number. We'll just let the C compiler assign it for us. Any + * actual hardware formats *must* come before these in the list. + */ + + /* Formats for auxiliary surfaces */ + ISL_FORMAT_HIZ, + ISL_FORMAT_MCS_2X, + ISL_FORMAT_MCS_4X, + ISL_FORMAT_MCS_8X, + ISL_FORMAT_MCS_16X, + ISL_FORMAT_GEN7_CCS_32BPP_X, + ISL_FORMAT_GEN7_CCS_64BPP_X, + ISL_FORMAT_GEN7_CCS_128BPP_X, + ISL_FORMAT_GEN7_CCS_32BPP_Y, + ISL_FORMAT_GEN7_CCS_64BPP_Y, + ISL_FORMAT_GEN7_CCS_128BPP_Y, + ISL_FORMAT_GEN9_CCS_32BPP, + ISL_FORMAT_GEN9_CCS_64BPP, + ISL_FORMAT_GEN9_CCS_128BPP, + /* Hardware doesn't understand this out-of-band value */ ISL_FORMAT_UNSUPPORTED = UINT16_MAX, }; @@ -392,6 +422,11 @@ ISL_TXC_ETC1, ISL_TXC_ETC2, ISL_TXC_ASTC, + + /* Used for auxiliary surface formats */ + ISL_TXC_HIZ, + ISL_TXC_MCS, + ISL_TXC_CCS, }; /** @@ -410,6 +445,8 @@ ISL_TILING_Y0, /**< Legacy Y tiling */ ISL_TILING_Yf, /**< Standard 4K tiling. The 'f' means "four". */ ISL_TILING_Ys, /**< Standard 64K tiling. The 's' means "sixty-four". */ + ISL_TILING_HIZ, /**< Tiling format for HiZ surfaces */ + ISL_TILING_CCS, /**< Tiling format for CCS surfaces */ }; /** @@ -423,6 +460,8 @@ #define ISL_TILING_Y0_BIT (1u << ISL_TILING_Y0) #define ISL_TILING_Yf_BIT (1u << ISL_TILING_Yf) #define ISL_TILING_Ys_BIT (1u << ISL_TILING_Ys) +#define ISL_TILING_HIZ_BIT (1u << ISL_TILING_HIZ) +#define ISL_TILING_CCS_BIT (1u << ISL_TILING_CCS) #define ISL_TILING_ANY_MASK (~0u) #define ISL_TILING_NON_LINEAR_MASK (~ISL_TILING_LINEAR_BIT) @@ -481,6 +520,32 @@ ISL_DIM_LAYOUT_GEN9_1D, }; +enum isl_aux_usage { + /** No Auxiliary surface is used */ + ISL_AUX_USAGE_NONE, + + /** The primary surface is a depth surface and the auxiliary surface is HiZ */ + ISL_AUX_USAGE_HIZ, + + /** The auxiliary surface is an MCS + * + * @invariant isl_surf::samples > 1 + */ + ISL_AUX_USAGE_MCS, + + /** The auxiliary surface is a fast-clear-only compression surface + * + * @invariant isl_surf::samples == 1 + */ + ISL_AUX_USAGE_CCS_D, + + /** The auxiliary surface provides full lossless color compression + * + * @invariant isl_surf::samples == 1 + */ + ISL_AUX_USAGE_CCS_E, +}; + /* TODO(chadv): Explain */ enum isl_array_pitch_span { ISL_ARRAY_PITCH_SPAN_FULL, @@ -505,6 +570,9 @@ #define ISL_SURF_USAGE_DISPLAY_FLIP_X_BIT (1u << 10) #define ISL_SURF_USAGE_DISPLAY_FLIP_Y_BIT (1u << 11) #define ISL_SURF_USAGE_STORAGE_BIT (1u << 12) +#define ISL_SURF_USAGE_HIZ_BIT (1u << 13) +#define ISL_SURF_USAGE_MCS_BIT (1u << 14) +#define ISL_SURF_USAGE_CCS_BIT (1u << 15) /** @} */ /** @@ -600,9 +668,20 @@ struct isl_device { - const struct brw_device_info *info; + const struct gen_device_info *info; bool use_separate_stencil; bool has_bit6_swizzling; + + /** + * Describes the layout of a RENDER_SURFACE_STATE structure for the + * current gen. + */ + struct { + uint8_t size; + uint8_t align; + uint8_t addr_offset; + uint8_t aux_addr_offset; + } ss; }; struct isl_extent2d { @@ -639,7 +718,7 @@ enum isl_format format; const char *name; - uint8_t bs; /**< Block size, in bytes, rounded towards 0 */ + uint16_t bpb; /**< Bits per block */ uint8_t bw; /**< Block width, in pixels */ uint8_t bh; /**< Block height, in pixels */ uint8_t bd; /**< Block depth, in pixels */ @@ -660,9 +739,47 @@ struct isl_tile_info { enum isl_tiling tiling; - uint32_t width; /**< in bytes */ - uint32_t height; /**< in rows of memory */ - uint32_t size; /**< in bytes */ + + /* The size (in bits per block) of a single surface element + * + * For surfaces with power-of-two formats, this is the same as + * isl_format_layout::bpb. For non-power-of-two formats it may be smaller. + * The logical_extent_el field is in terms of elements of this size. + * + * For example, consider ISL_FORMAT_R32G32B32_FLOAT for which + * isl_format_layout::bpb is 96 (a non-power-of-two). In this case, none + * of the tiling formats can actually hold an integer number of 96-bit + * surface elements so isl_tiling_get_info returns an isl_tile_info for a + * 32-bit element size. It is the responsibility of the caller to + * recognize that 32 != 96 ad adjust accordingly. For instance, to compute + * the width of a surface in tiles, you would do: + * + * width_tl = DIV_ROUND_UP(width_el * (format_bpb / tile_info.format_bpb), + * tile_info.logical_extent_el.width); + */ + uint32_t format_bpb; + + /** The logical size of the tile in units of format_bpb size elements + * + * This field determines how a given surface is cut up into tiles. It is + * used to compute the size of a surface in tiles and can be used to + * determine the location of the tile containing any given surface element. + * The exact value of this field depends heavily on the bits-per-block of + * the format being used. + */ + struct isl_extent2d logical_extent_el; + + /** The physical size of the tile in bytes and rows of bytes + * + * This field determines how the tiles of a surface are physically layed + * out in memory. The logical and physical tile extent are frequently the + * same but this is not always the case. For instance, a W-tile (which is + * always used with ISL_FORMAT_R8) has a logical size of 64el x 64el but + * its physical size is 128B x 32rows, the same as a Y-tile. + * + * @see isl_surf::row_pitch + */ + struct isl_extent2d phys_extent_B; }; /** @@ -743,7 +860,17 @@ uint32_t alignment; /** - * Pitch between vertically adjacent surface elements, in bytes. + * The interpretation of this field depends on the value of + * isl_tile_info::physical_extent_B. In particular, the width of the + * surface in tiles is row_pitch / isl_tile_info::physical_extent_B.width + * and the distance in bytes between vertically adjacent tiles in the image + * is given by row_pitch * isl_tile_info::physical_extent_B.height. + * + * For linear images where isl_tile_info::physical_extent_B.height == 1, + * this cleanly reduces to being the distance, in bytes, between vertically + * adjacent surface elements. + * + * @see isl_tile_info::phys_extent_B; */ uint32_t row_pitch; @@ -758,6 +885,22 @@ isl_surf_usage_flags_t usage; }; +struct isl_swizzle { + enum isl_channel_select r:4; + enum isl_channel_select g:4; + enum isl_channel_select b:4; + enum isl_channel_select a:4; +}; + +#define ISL_SWIZZLE(R, G, B, A) ((struct isl_swizzle) { \ + .r = ISL_CHANNEL_SELECT_##R, \ + .g = ISL_CHANNEL_SELECT_##G, \ + .b = ISL_CHANNEL_SELECT_##B, \ + .a = ISL_CHANNEL_SELECT_##A, \ + }) + +#define ISL_SWIZZLE_IDENTITY ISL_SWIZZLE(RED, GREEN, BLUE, ALPHA) + struct isl_view { /** * Indicates the usage of the particular view @@ -783,11 +926,17 @@ * * For cube maps, both base_array_layer and array_len should be * specified in terms of 2-D layers and must be a multiple of 6. + * + * 3-D textures are effectively treated as 2-D arrays when used as a + * storage image or render target. If `usage` contains + * ISL_SURF_USAGE_RENDER_TARGET_BIT or ISL_SURF_USAGE_STORAGE_BIT then + * base_array_layer and array_len are applied. If the surface is only used + * for texturing, they are ignored. */ uint32_t base_array_layer; uint32_t array_len; - enum isl_channel_select channel_select[4]; + struct isl_swizzle swizzle; }; union isl_color_value { @@ -813,11 +962,21 @@ uint32_t mocs; /** + * The auxilary surface or NULL if no auxilary surface is to be used. + */ + const struct isl_surf *aux_surf; + enum isl_aux_usage aux_usage; + uint64_t aux_address; + + /** * The clear color for this surface * * Valid values depend on hardware generation. */ union isl_color_value clear_color; + + /* Intra-tile offset */ + uint16_t x_offset_sa, y_offset_sa; }; struct isl_buffer_fill_state_info { @@ -853,7 +1012,7 @@ void isl_device_init(struct isl_device *dev, - const struct brw_device_info *info, + const struct gen_device_info *info, bool has_bit6_swizzling); isl_sample_count_mask_t ATTRIBUTE_CONST @@ -871,18 +1030,20 @@ return isl_format_layouts[fmt].name; } -bool isl_format_supports_rendering(const struct brw_device_info *devinfo, +bool isl_format_supports_rendering(const struct gen_device_info *devinfo, enum isl_format format); -bool isl_format_supports_alpha_blending(const struct brw_device_info *devinfo, +bool isl_format_supports_alpha_blending(const struct gen_device_info *devinfo, enum isl_format format); -bool isl_format_supports_sampling(const struct brw_device_info *devinfo, +bool isl_format_supports_sampling(const struct gen_device_info *devinfo, enum isl_format format); -bool isl_format_supports_filtering(const struct brw_device_info *devinfo, +bool isl_format_supports_filtering(const struct gen_device_info *devinfo, enum isl_format format); -bool isl_format_supports_vertex_fetch(const struct brw_device_info *devinfo, +bool isl_format_supports_vertex_fetch(const struct gen_device_info *devinfo, enum isl_format format); -bool isl_format_supports_lossless_compression(const struct brw_device_info *devinfo, +bool isl_format_supports_lossless_compression(const struct gen_device_info *devinfo, enum isl_format format); +bool isl_format_supports_multisampling(const struct gen_device_info *devinfo, + enum isl_format format); bool isl_format_has_unorm_channel(enum isl_format fmt) ATTRIBUTE_CONST; bool isl_format_has_snorm_channel(enum isl_format fmt) ATTRIBUTE_CONST; @@ -914,6 +1075,8 @@ unsigned isl_format_get_num_channels(enum isl_format fmt); +uint32_t isl_format_get_depth_format(enum isl_format fmt, bool has_stencil); + static inline bool isl_format_is_compressed(enum isl_format fmt) { @@ -939,6 +1102,11 @@ case ISL_TXC_ETC2: case ISL_TXC_ASTC: return false; + + case ISL_TXC_HIZ: + case ISL_TXC_MCS: + case ISL_TXC_CCS: + unreachable("Should not be called on an aux surface"); } unreachable("bad texture compression mode"); @@ -976,14 +1144,14 @@ bool isl_is_storage_image_format(enum isl_format fmt); enum isl_format -isl_lower_storage_image_format(const struct brw_device_info *devinfo, +isl_lower_storage_image_format(const struct gen_device_info *devinfo, enum isl_format fmt); /* Returns true if this hardware supports typed load/store on a format with * the same size as the given format. */ bool -isl_has_matching_typed_storage_image_format(const struct brw_device_info *devinfo, +isl_has_matching_typed_storage_image_format(const struct gen_device_info *devinfo, enum isl_format fmt); static inline bool @@ -998,21 +1166,8 @@ return (1u << tiling) & ISL_TILING_STD_Y_MASK; } -bool -isl_tiling_get_info(const struct isl_device *dev, - enum isl_tiling tiling, - uint32_t format_block_size, - struct isl_tile_info *info); - -void -isl_tiling_get_extent(const struct isl_device *dev, - enum isl_tiling tiling, - uint32_t format_block_size, - struct isl_extent2d *e); -bool -isl_surf_choose_tiling(const struct isl_device *dev, - const struct isl_surf_init_info *restrict info, - enum isl_tiling *tiling); +struct isl_extent2d ATTRIBUTE_CONST +isl_get_interleaved_msaa_px_size_sa(uint32_t samples); static inline bool isl_surf_usage_is_display(isl_surf_usage_flags_t usage) @@ -1110,6 +1265,21 @@ const struct isl_surf *surf, struct isl_tile_info *tile_info); +void +isl_surf_get_hiz_surf(const struct isl_device *dev, + const struct isl_surf *surf, + struct isl_surf *hiz_surf); + +void +isl_surf_get_mcs_surf(const struct isl_device *dev, + const struct isl_surf *surf, + struct isl_surf *mcs_surf); + +bool +isl_surf_get_ccs_surf(const struct isl_device *dev, + const struct isl_surf *surf, + struct isl_surf *ccs_surf); + #define isl_surf_fill_state(dev, state, ...) \ isl_surf_fill_state_s((dev), (state), \ &(struct isl_surf_fill_state_info) { __VA_ARGS__ }); @@ -1179,8 +1349,8 @@ { const struct isl_format_layout *fmtl = isl_format_get_layout(surf->format); - assert(surf->row_pitch % fmtl->bs == 0); - return surf->row_pitch / fmtl->bs; + assert(surf->row_pitch % (fmtl->bpb / 8) == 0); + return surf->row_pitch / (fmtl->bpb / 8); } /** @@ -1222,6 +1392,22 @@ } /** + * Calculate the offset, in units of surface samples, to a subimage in the + * surface. + * + * @invariant level < surface levels + * @invariant logical_array_layer < logical array length of surface + * @invariant logical_z_offset_px < logical depth of surface at level + */ +void +isl_surf_get_image_offset_sa(const struct isl_surf *surf, + uint32_t level, + uint32_t logical_array_layer, + uint32_t logical_z_offset_px, + uint32_t *x_offset_sa, + uint32_t *y_offset_sa); + +/** * Calculate the offset, in units of surface elements, to a subimage in the * surface. * @@ -1252,11 +1438,43 @@ enum isl_tiling tiling, uint8_t bs, uint32_t row_pitch, - uint32_t total_x_offset_B, - uint32_t total_y_offset_rows, + uint32_t total_x_offset_el, + uint32_t total_y_offset_el, uint32_t *base_address_offset, - uint32_t *x_offset_B, - uint32_t *y_offset_rows); + uint32_t *x_offset_el, + uint32_t *y_offset_el); + +static inline void +isl_tiling_get_intratile_offset_sa(const struct isl_device *dev, + enum isl_tiling tiling, + enum isl_format format, + uint32_t row_pitch, + uint32_t total_x_offset_sa, + uint32_t total_y_offset_sa, + uint32_t *base_address_offset, + uint32_t *x_offset_sa, + uint32_t *y_offset_sa) +{ + const struct isl_format_layout *fmtl = isl_format_get_layout(format); + + assert(fmtl->bpb % 8 == 0); + + /* For computing the intratile offsets, we actually want a strange unit + * which is samples for multisampled surfaces but elements for compressed + * surfaces. + */ + assert(total_x_offset_sa % fmtl->bw == 0); + assert(total_y_offset_sa % fmtl->bh == 0); + const uint32_t total_x_offset = total_x_offset_sa / fmtl->bw; + const uint32_t total_y_offset = total_y_offset_sa / fmtl->bh; + + isl_tiling_get_intratile_offset_el(dev, tiling, fmtl->bpb / 8, row_pitch, + total_x_offset, total_y_offset, + base_address_offset, + x_offset_sa, y_offset_sa); + *x_offset_sa *= fmtl->bw; + *y_offset_sa *= fmtl->bh; +} /** * @brief Get value of 3DSTATE_DEPTH_BUFFER.SurfaceFormat @@ -1271,3 +1489,5 @@ #ifdef __cplusplus } #endif + +#endif /* ISL_H */ diff -Nru mesa-12.0.6/src/intel/isl/isl_priv.h mesa-17.0.7/src/intel/isl/isl_priv.h --- mesa-12.0.6/src/intel/isl/isl_priv.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/isl/isl_priv.h 2017-06-01 10:37:10.000000000 +0000 @@ -21,18 +21,25 @@ * IN THE SOFTWARE. */ -#pragma once +#ifndef ISL_PRIV_H +#define ISL_PRIV_H #include #include -#include "brw_device_info.h" +#include "common/gen_device_info.h" #include "util/macros.h" #include "isl.h" #define isl_finishme(format, ...) \ - __isl_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__) + do { \ + static bool reported = false; \ + if (!reported) { \ + __isl_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__); \ + reported = true; \ + } \ + } while (0) void PRINTFLIKE(3, 4) UNUSED __isl_finishme(const char *file, int line, const char *fmt, ...); @@ -99,6 +106,15 @@ } static inline uint32_t +isl_round_up_to_power_of_two(uint32_t value) +{ + if (value <= 1) + return value; + + return 1 << (32 - __builtin_clz(value - 1)); +} + +static inline uint32_t isl_minify(uint32_t n, uint32_t levels) { if (unlikely(n == 0)) @@ -136,6 +152,18 @@ } void +isl_gen4_surf_fill_state_s(const struct isl_device *dev, void *state, + const struct isl_surf_fill_state_info *restrict info); + +void +isl_gen5_surf_fill_state_s(const struct isl_device *dev, void *state, + const struct isl_surf_fill_state_info *restrict info); + +void +isl_gen6_surf_fill_state_s(const struct isl_device *dev, void *state, + const struct isl_surf_fill_state_info *restrict info); + +void isl_gen7_surf_fill_state_s(const struct isl_device *dev, void *state, const struct isl_surf_fill_state_info *restrict info); @@ -150,6 +178,18 @@ const struct isl_surf_fill_state_info *restrict info); void +isl_gen4_buffer_fill_state_s(void *state, + const struct isl_buffer_fill_state_info *restrict info); + +void +isl_gen5_buffer_fill_state_s(void *state, + const struct isl_buffer_fill_state_info *restrict info); + +void +isl_gen6_buffer_fill_state_s(void *state, + const struct isl_buffer_fill_state_info *restrict info); + +void isl_gen7_buffer_fill_state_s(void *state, const struct isl_buffer_fill_state_info *restrict info); @@ -164,3 +204,5 @@ void isl_gen9_buffer_fill_state_s(void *state, const struct isl_buffer_fill_state_info *restrict info); + +#endif /* ISL_PRIV_H */ diff -Nru mesa-12.0.6/src/intel/isl/isl_storage_image.c mesa-17.0.7/src/intel/isl/isl_storage_image.c --- mesa-12.0.6/src/intel/isl/isl_storage_image.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/isl/isl_storage_image.c 2017-06-01 10:37:10.000000000 +0000 @@ -76,7 +76,7 @@ } enum isl_format -isl_lower_storage_image_format(const struct brw_device_info *devinfo, +isl_lower_storage_image_format(const struct gen_device_info *devinfo, enum isl_format format) { switch (format) { @@ -188,15 +188,15 @@ } bool -isl_has_matching_typed_storage_image_format(const struct brw_device_info *devinfo, +isl_has_matching_typed_storage_image_format(const struct gen_device_info *devinfo, enum isl_format fmt) { if (devinfo->gen >= 9) { return true; } else if (devinfo->gen >= 8 || devinfo->is_haswell) { - return isl_format_get_layout(fmt)->bs <= 8; + return isl_format_get_layout(fmt)->bpb <= 64; } else { - return isl_format_get_layout(fmt)->bs <= 4; + return isl_format_get_layout(fmt)->bpb <= 32; } } @@ -229,7 +229,7 @@ isl_surf_get_image_offset_el(surf, view->base_level, view->base_array_layer, 0, ¶m->offset[0], ¶m->offset[1]); - const int cpp = isl_format_get_layout(surf->format)->bs; + const int cpp = isl_format_get_layout(surf->format)->bpb / 8; param->stride[0] = cpp; param->stride[1] = surf->row_pitch / cpp; @@ -301,6 +301,6 @@ { *param = image_param_defaults; - param->stride[0] = isl_format_layouts[format].bs; + param->stride[0] = isl_format_layouts[format].bpb / 8; param->size[0] = size / param->stride[0]; } diff -Nru mesa-12.0.6/src/intel/isl/isl_surface_state.c mesa-17.0.7/src/intel/isl/isl_surface_state.c --- mesa-12.0.6/src/intel/isl/isl_surface_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/isl/isl_surface_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -78,11 +78,30 @@ }; #endif +#if GEN_GEN >= 7 static const uint32_t isl_to_gen_multisample_layout[] = { [ISL_MSAA_LAYOUT_NONE] = MSFMT_MSS, [ISL_MSAA_LAYOUT_INTERLEAVED] = MSFMT_DEPTH_STENCIL, [ISL_MSAA_LAYOUT_ARRAY] = MSFMT_MSS, }; +#endif + +#if GEN_GEN >= 9 +static const uint32_t isl_to_gen_aux_mode[] = { + [ISL_AUX_USAGE_NONE] = AUX_NONE, + [ISL_AUX_USAGE_HIZ] = AUX_HIZ, + [ISL_AUX_USAGE_MCS] = AUX_CCS_D, + [ISL_AUX_USAGE_CCS_D] = AUX_CCS_D, + [ISL_AUX_USAGE_CCS_E] = AUX_CCS_E, +}; +#elif GEN_GEN >= 8 +static const uint32_t isl_to_gen_aux_mode[] = { + [ISL_AUX_USAGE_NONE] = AUX_NONE, + [ISL_AUX_USAGE_HIZ] = AUX_HIZ, + [ISL_AUX_USAGE_MCS] = AUX_MCS, + [ISL_AUX_USAGE_CCS_D] = AUX_MCS, +}; +#endif static uint8_t get_surftype(enum isl_surf_dim dim, isl_surf_usage_flags_t usage) @@ -94,12 +113,14 @@ assert(!(usage & ISL_SURF_USAGE_CUBE_BIT)); return SURFTYPE_1D; case ISL_SURF_DIM_2D: - if (usage & ISL_SURF_USAGE_STORAGE_BIT) { - /* Storage images are always plain 2-D, not cube */ - return SURFTYPE_2D; - } else if (usage & ISL_SURF_USAGE_CUBE_BIT) { + if ((usage & ISL_SURF_USAGE_CUBE_BIT) && + (usage & ISL_SURF_USAGE_TEXTURE_BIT)) { + /* We need SURFTYPE_CUBE to make cube sampling work */ return SURFTYPE_CUBE; } else { + /* Everything else (render and storage) treat cubes as plain + * 2D array textures + */ return SURFTYPE_2D; } case ISL_SURF_DIM_3D: @@ -113,7 +134,7 @@ * hardware. Note that this does NOT give you the actual hardware enum values * but an index into the isl_to_gen_[hv]align arrays above. */ -static struct isl_extent3d +static inline struct isl_extent3d get_image_alignment(const struct isl_surf *surf) { if (GEN_GEN >= 9) { @@ -123,7 +144,7 @@ * true alignment is likely outside the enum range of HALIGN* and * VALIGN*. */ - return isl_extent3d(0, 0, 0); + return isl_extent3d(4, 4, 1); } else { /* In Skylake, RENDER_SUFFACE_STATE.SurfaceVerticalAlignment is in units * of surface elements (not pixels nor samples). For compressed formats, @@ -153,9 +174,21 @@ default: unreachable("Bad isl_surf_dim"); case ISL_DIM_LAYOUT_GEN4_2D: - case ISL_DIM_LAYOUT_GEN4_3D: if (GEN_GEN >= 9) { - return isl_surf_get_array_pitch_el_rows(surf); + if (surf->dim == ISL_SURF_DIM_3D && surf->tiling == ISL_TILING_W) { + /* This is rather annoying and completely undocumented. It + * appears that the hardware has a bug (or undocumented feature) + * regarding stencil buffers most likely related to the way + * W-tiling is handled as modified Y-tiling. If you bind a 3-D + * stencil buffer normally, and use texelFetch on it, the z or + * array index will get implicitly multiplied by 2 for no obvious + * reason. The fix appears to be to divide qpitch by 2 for + * W-tiled surfaces. + */ + return isl_surf_get_array_pitch_el_rows(surf) / 2; + } else { + return isl_surf_get_array_pitch_el_rows(surf); + } } else { /* From the Broadwell PRM for RENDER_SURFACE_STATE.QPitch * @@ -180,6 +213,22 @@ * slices. */ return isl_surf_get_array_pitch_el(surf); + case ISL_DIM_LAYOUT_GEN4_3D: + /* QPitch doesn't make sense for ISL_DIM_LAYOUT_GEN4_3D since it uses a + * different pitch at each LOD. Also, the QPitch field is ignored for + * these surfaces. From the Broadwell PRM documentation for QPitch: + * + * This field specifies the distance in rows between array slices. It + * is used only in the following cases: + * - Surface Array is enabled OR + * - Number of Mulitsamples is not NUMSAMPLES_1 and Multisampled + * Surface Storage Format set to MSFMT_MSS OR + * - Surface Type is SURFTYPE_CUBE + * + * None of the three conditions above can possibly apply to a 3D surface + * so it is safe to just set QPitch to 0. + */ + return 0; } } #endif /* GEN_GEN >= 8 */ @@ -191,18 +240,65 @@ struct GENX(RENDER_SURFACE_STATE) s = { 0 }; s.SurfaceType = get_surftype(info->surf->dim, info->view->usage); + + if (info->view->usage & ISL_SURF_USAGE_RENDER_TARGET_BIT) + assert(isl_format_supports_rendering(dev->info, info->view->format)); + else if (info->view->usage & ISL_SURF_USAGE_TEXTURE_BIT) + assert(isl_format_supports_sampling(dev->info, info->view->format)); + + /* From the Sky Lake PRM Vol. 2d, RENDER_SURFACE_STATE::SurfaceFormat + * + * This field cannot be a compressed (BC*, DXT*, FXT*, ETC*, EAC*) + * format if the Surface Type is SURFTYPE_1D + */ + if (info->surf->dim == ISL_SURF_DIM_1D) + assert(!isl_format_is_compressed(info->view->format)); + s.SurfaceFormat = info->view->format; #if GEN_IS_HASWELL s.IntegerSurfaceFormat = isl_format_has_int_channel(s.SurfaceFormat); #endif + assert(info->surf->logical_level0_px.width > 0 && + info->surf->logical_level0_px.height > 0); + s.Width = info->surf->logical_level0_px.width - 1; s.Height = info->surf->logical_level0_px.height - 1; + /* In the gen6 PRM Volume 1 Part 1: Graphics Core, Section 7.18.3.7.1 + * (Surface Arrays For all surfaces other than separate stencil buffer): + * + * "[DevSNB] Errata: Sampler MSAA Qpitch will be 4 greater than the value + * calculated in the equation above , for every other odd Surface Height + * starting from 1 i.e. 1,5,9,13" + * + * Since this Qpitch errata only impacts the sampler, we have to adjust the + * input for the rendering surface to achieve the same qpitch. For the + * affected heights, we increment the height by 1 for the rendering + * surface. + */ + if (GEN_GEN == 6 && (info->view->usage & ISL_SURF_USAGE_RENDER_TARGET_BIT) && + info->surf->samples > 1 && + (info->surf->logical_level0_px.height % 4) == 1) + s.Height++; + switch (s.SurfaceType) { case SURFTYPE_1D: case SURFTYPE_2D: + /* From the Ivy Bridge PRM >> RENDER_SURFACE_STATE::MinimumArrayElement: + * + * "If Number of Multisamples is not MULTISAMPLECOUNT_1, this field + * must be set to zero if this surface is used with sampling engine + * messages." + * + * This restriction appears to exist only on Ivy Bridge. + */ + if (GEN_GEN == 7 && !GEN_IS_HASWELL && !ISL_DEV_IS_BAYTRAIL(dev) && + (info->view->usage & ISL_SURF_USAGE_TEXTURE_BIT) && + info->surf->samples > 1) + assert(info->view->base_array_layer == 0); + s.MinimumArrayElement = info->view->base_array_layer; /* From the Broadwell PRM >> RENDER_SURFACE_STATE::Depth: @@ -234,8 +330,6 @@ s.RenderTargetViewExtent = s.Depth; break; case SURFTYPE_3D: - s.MinimumArrayElement = info->view->base_array_layer; - /* From the Broadwell PRM >> RENDER_SURFACE_STATE::Depth: * * If the volume texture is MIP-mapped, this field specifies the @@ -255,18 +349,25 @@ * textures with more levels than we can render to. In order to prevent * assert-failures in the packing function below, we only set the field * when it's actually going to be used by the hardware. + * + * Similaraly, the MinimumArrayElement field is ignored by all hardware + * prior to Sky Lake when texturing and we want it set to 0 anyway. + * Since it's already initialized to 0, we can just leave it alone for + * texture surfaces. */ if (info->view->usage & (ISL_SURF_USAGE_RENDER_TARGET_BIT | ISL_SURF_USAGE_STORAGE_BIT)) { - s.RenderTargetViewExtent = isl_minify(info->surf->logical_level0_px.depth, - info->view->base_level) - 1; + s.MinimumArrayElement = info->view->base_array_layer; + s.RenderTargetViewExtent = info->view->array_len - 1; } break; default: unreachable("bad SurfaceType"); } +#if GEN_GEN >= 7 s.SurfaceArray = info->surf->dim != ISL_SURF_DIM_3D; +#endif if (info->view->usage & ISL_SURF_USAGE_RENDER_TARGET_BIT) { /* For render target surfaces, the hardware interprets field @@ -294,20 +395,15 @@ s.MipTailStartLOD = 15; #endif +#if GEN_GEN >= 6 const struct isl_extent3d image_align = get_image_alignment(info->surf); s.SurfaceVerticalAlignment = isl_to_gen_valign[image_align.height]; +#if GEN_GEN >= 7 s.SurfaceHorizontalAlignment = isl_to_gen_halign[image_align.width]; +#endif +#endif - if (info->surf->tiling == ISL_TILING_W) { - /* From the Broadwell PRM documentation for this field: - * - * "If the surface is a stencil buffer (and thus has Tile Mode set - * to TILEMODE_WMAJOR), the pitch must be set to 2x the value - * computed based on width, as the stencil buffer is stored with - * two rows interleaved." - */ - s.SurfacePitch = info->surf->row_pitch * 2 - 1; - } else if (info->surf->dim_layout == ISL_DIM_LAYOUT_GEN9_1D) { + if (info->surf->dim_layout == ISL_DIM_LAYOUT_GEN9_1D) { /* For gen9 1-D textures, surface pitch is ignored */ s.SurfacePitch = 0; } else { @@ -348,24 +444,111 @@ #endif } +#if GEN_GEN >= 6 + s.NumberofMultisamples = ffs(info->surf->samples) - 1; +#if GEN_GEN >= 7 s.MultisampledSurfaceStorageFormat = isl_to_gen_multisample_layout[info->surf->msaa_layout]; - s.NumberofMultisamples = ffs(info->surf->samples) - 1; +#endif +#endif #if (GEN_GEN >= 8 || GEN_IS_HASWELL) - s.ShaderChannelSelectRed = info->view->channel_select[0]; - s.ShaderChannelSelectGreen = info->view->channel_select[1]; - s.ShaderChannelSelectBlue = info->view->channel_select[2]; - s.ShaderChannelSelectAlpha = info->view->channel_select[3]; + s.ShaderChannelSelectRed = info->view->swizzle.r; + s.ShaderChannelSelectGreen = info->view->swizzle.g; + s.ShaderChannelSelectBlue = info->view->swizzle.b; + s.ShaderChannelSelectAlpha = info->view->swizzle.a; #endif s.SurfaceBaseAddress = info->address; + +#if GEN_GEN >= 6 s.MOCS = info->mocs; +#endif + +#if GEN_GEN > 4 || GEN_IS_G4X + if (info->x_offset_sa != 0 || info->y_offset_sa != 0) { + /* There are fairly strict rules about when the offsets can be used. + * These are mostly taken from the Sky Lake PRM documentation for + * RENDER_SURFACE_STATE. + */ + assert(info->surf->tiling != ISL_TILING_LINEAR); + assert(info->surf->dim == ISL_SURF_DIM_2D); + assert(isl_is_pow2(isl_format_get_layout(info->view->format)->bpb)); + assert(info->surf->levels == 1); + assert(info->surf->logical_level0_px.array_len == 1); + assert(info->aux_usage == ISL_AUX_USAGE_NONE); + + if (GEN_GEN >= 8) { + /* Broadwell added more rules. */ + assert(info->surf->samples == 1); + if (isl_format_get_layout(info->view->format)->bpb == 8) + assert(info->x_offset_sa % 16 == 0); + if (isl_format_get_layout(info->view->format)->bpb == 16) + assert(info->x_offset_sa % 8 == 0); + } + +#if GEN_GEN >= 7 + s.SurfaceArray = false; +#endif + } + + const unsigned x_div = 4; + const unsigned y_div = GEN_GEN >= 8 ? 4 : 2; + assert(info->x_offset_sa % x_div == 0); + assert(info->y_offset_sa % y_div == 0); + s.XOffset = info->x_offset_sa / x_div; + s.YOffset = info->y_offset_sa / y_div; +#else + assert(info->x_offset_sa == 0); + assert(info->y_offset_sa == 0); +#endif + +#if GEN_GEN >= 7 + if (info->aux_surf && info->aux_usage != ISL_AUX_USAGE_NONE) { + struct isl_tile_info tile_info; + isl_surf_get_tile_info(dev, info->aux_surf, &tile_info); + uint32_t pitch_in_tiles = + info->aux_surf->row_pitch / tile_info.phys_extent_B.width; #if GEN_GEN >= 8 - s.AuxiliarySurfaceMode = AUX_NONE; + assert(GEN_GEN >= 9 || info->aux_usage != ISL_AUX_USAGE_CCS_E); + s.AuxiliarySurfacePitch = pitch_in_tiles - 1; + /* Auxiliary surfaces in ISL have compressed formats but the hardware + * doesn't expect our definition of the compression, it expects qpitch + * in units of samples on the main surface. + */ + s.AuxiliarySurfaceQPitch = + isl_surf_get_array_pitch_sa_rows(info->aux_surf) >> 2; + s.AuxiliarySurfaceBaseAddress = info->aux_address; + + if (info->aux_usage == ISL_AUX_USAGE_HIZ) { + /* The number of samples must be 1 */ + assert(info->surf->samples == 1); + + /* The dimension must not be 3D */ + assert(info->surf->dim != ISL_SURF_DIM_3D); + + /* The format must be one of the following: */ + switch (info->view->format) { + case ISL_FORMAT_R32_FLOAT: + case ISL_FORMAT_R24_UNORM_X8_TYPELESS: + case ISL_FORMAT_R16_UNORM: + break; + default: + assert(!"Incompatible HiZ Sampling format"); + break; + } + } + + s.AuxiliarySurfaceMode = isl_to_gen_aux_mode[info->aux_usage]; #else - s.MCSEnable = false; + assert(info->aux_usage == ISL_AUX_USAGE_MCS || + info->aux_usage == ISL_AUX_USAGE_CCS_D); + s.MCSBaseAddress = info->aux_address, + s.MCSSurfacePitch = pitch_in_tiles - 1; + s.MCSEnable = true; +#endif + } #endif #if GEN_GEN >= 8 @@ -385,40 +568,51 @@ s.SamplerL2BypassModeDisable = true; break; default: + /* From the SKL PRM, Programming Note under Sampler Output Channel + * Mapping: + * + * If a surface has an associated HiZ Auxilliary surface, the + * Sampler L2 Bypass Mode Disable field in the RENDER_SURFACE_STATE + * must be set. + */ + if (GEN_GEN >= 9 && info->aux_usage == ISL_AUX_USAGE_HIZ) + s.SamplerL2BypassModeDisable = true; break; } } #endif + if (info->aux_usage != ISL_AUX_USAGE_NONE) { #if GEN_GEN >= 9 - s.RedClearColor = info->clear_color.u32[0]; - s.GreenClearColor = info->clear_color.u32[1]; - s.BlueClearColor = info->clear_color.u32[2]; - s.AlphaClearColor = info->clear_color.u32[3]; + s.RedClearColor = info->clear_color.u32[0]; + s.GreenClearColor = info->clear_color.u32[1]; + s.BlueClearColor = info->clear_color.u32[2]; + s.AlphaClearColor = info->clear_color.u32[3]; #elif GEN_GEN >= 7 - /* Prior to Sky Lake, we only have one bit for the clear color which - * gives us 0 or 1 in whatever the surface's format happens to be. - */ - if (isl_format_has_int_channel(info->view->format)) { - for (unsigned i = 0; i < 4; i++) { - assert(info->clear_color.u32[i] == 0 || - info->clear_color.u32[i] == 1); - } - s.RedClearColor = info->clear_color.u32[0] != 0; - s.GreenClearColor = info->clear_color.u32[1] != 0; - s.BlueClearColor = info->clear_color.u32[2] != 0; - s.AlphaClearColor = info->clear_color.u32[3] != 0; - } else { - for (unsigned i = 0; i < 4; i++) { - assert(info->clear_color.f32[i] == 0.0f || - info->clear_color.f32[i] == 1.0f); + /* Prior to Sky Lake, we only have one bit for the clear color which + * gives us 0 or 1 in whatever the surface's format happens to be. + */ + if (isl_format_has_int_channel(info->view->format)) { + for (unsigned i = 0; i < 4; i++) { + assert(info->clear_color.u32[i] == 0 || + info->clear_color.u32[i] == 1); + } + s.RedClearColor = info->clear_color.u32[0] != 0; + s.GreenClearColor = info->clear_color.u32[1] != 0; + s.BlueClearColor = info->clear_color.u32[2] != 0; + s.AlphaClearColor = info->clear_color.u32[3] != 0; + } else { + for (unsigned i = 0; i < 4; i++) { + assert(info->clear_color.f32[i] == 0.0f || + info->clear_color.f32[i] == 1.0f); + } + s.RedClearColor = info->clear_color.f32[0] != 0.0f; + s.GreenClearColor = info->clear_color.f32[1] != 0.0f; + s.BlueClearColor = info->clear_color.f32[2] != 0.0f; + s.AlphaClearColor = info->clear_color.f32[3] != 0.0f; } - s.RedClearColor = info->clear_color.f32[0] != 0.0f; - s.GreenClearColor = info->clear_color.f32[1] != 0.0f; - s.BlueClearColor = info->clear_color.f32[2] != 0.0f; - s.AlphaClearColor = info->clear_color.f32[3] != 0.0f; - } #endif + } GENX(RENDER_SURFACE_STATE_pack)(NULL, state, &s); } @@ -450,15 +644,31 @@ struct GENX(RENDER_SURFACE_STATE) s = { 0, }; s.SurfaceType = SURFTYPE_BUFFER; - s.SurfaceArray = false; s.SurfaceFormat = info->format; + +#if GEN_GEN >= 6 s.SurfaceVerticalAlignment = isl_to_gen_valign[4]; +#if GEN_GEN >= 7 s.SurfaceHorizontalAlignment = isl_to_gen_halign[4]; + s.SurfaceArray = false; +#endif +#endif + +#if GEN_GEN >= 7 s.Height = ((num_elements - 1) >> 7) & 0x3fff; s.Width = (num_elements - 1) & 0x7f; s.Depth = ((num_elements - 1) >> 21) & 0x3ff; +#else + s.Height = ((num_elements - 1) >> 7) & 0x1fff; + s.Width = (num_elements - 1) & 0x7f; + s.Depth = ((num_elements - 1) >> 20) & 0x7f; +#endif + s.SurfacePitch = info->stride - 1; + +#if GEN_GEN >= 6 s.NumberofMultisamples = MULTISAMPLECOUNT_1; +#endif #if (GEN_GEN >= 8) s.TileMode = LINEAR; @@ -473,7 +683,9 @@ #endif s.SurfaceBaseAddress = info->address; +#if GEN_GEN >= 6 s.MOCS = info->mocs; +#endif #if (GEN_GEN >= 8 || GEN_IS_HASWELL) s.ShaderChannelSelectRed = SCS_RED; diff -Nru mesa-12.0.6/src/intel/isl/Makefile.am mesa-17.0.7/src/intel/isl/Makefile.am --- mesa-12.0.6/src/intel/isl/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/isl/Makefile.am 1970-01-01 00:00:00.000000000 +0000 @@ -1,96 +0,0 @@ -# Copyright 2015-2016 Intel Corporation -# -# Permission is hereby granted, free of charge, to any person obtaining a -# copy of this software and associated documentation files (the "Software"), -# to deal in the Software without restriction, including without limitation -# the rights to use, copy, modify, merge, publish, distribute, sublicense, -# and/or sell copies of the Software, and to permit persons to whom the -# Software is furnished to do so, subject to the following conditions: -# -# The above copyright notice and this permission notice (including the next -# paragraph) shall be included in all copies or substantial portions of the -# Software. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 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install-dvi-am install-exec install-exec-am install-html \ - install-html-am install-info install-info-am install-man \ - install-pdf install-pdf-am install-ps install-ps-am \ - install-strip installcheck installcheck-am installdirs \ - maintainer-clean maintainer-clean-generic mostlyclean \ - mostlyclean-compile mostlyclean-generic mostlyclean-libtool \ - pdf pdf-am ps ps-am recheck tags tags-am uninstall \ - uninstall-am - -.PRECIOUS: Makefile - - -isl_format_layout.c: gen_format_layout.py \ - isl_format_layout.csv - $(PYTHON_GEN) $(srcdir)/gen_format_layout.py \ - --csv $(srcdir)/isl_format_layout.csv --out $@ - -# Tell versions [3.59,3.63) of GNU make to not export all variables. -# Otherwise a system limit (for SysV at least) may be exceeded. -.NOEXPORT: diff -Nru mesa-12.0.6/src/intel/isl/Makefile.sources mesa-17.0.7/src/intel/isl/Makefile.sources --- mesa-12.0.6/src/intel/isl/Makefile.sources 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/isl/Makefile.sources 1970-01-01 00:00:00.000000000 +0000 @@ -1,31 +0,0 @@ -ISL_FILES = \ - isl.c \ - isl.h \ - isl_format.c \ - isl_gen4.c \ - isl_gen4.h \ - isl_gen6.c \ - isl_gen6.h \ - isl_priv.h \ - isl_storage_image.c - -ISL_GEN7_FILES = \ - isl_gen7.c \ - isl_gen7.h \ - isl_surface_state.c - -ISL_GEN75_FILES = \ - isl_surface_state.c - -ISL_GEN8_FILES = \ - isl_gen8.c \ - isl_gen8.h \ - isl_surface_state.c - -ISL_GEN9_FILES = \ - isl_gen9.c \ - isl_gen9.h \ - isl_surface_state.c - -ISL_GENERATED_FILES = \ - isl_format_layout.c diff -Nru mesa-12.0.6/src/intel/isl/tests/isl_surf_get_image_offset_test.c mesa-17.0.7/src/intel/isl/tests/isl_surf_get_image_offset_test.c --- mesa-12.0.6/src/intel/isl/tests/isl_surf_get_image_offset_test.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/isl/tests/isl_surf_get_image_offset_test.c 2017-06-01 10:37:10.000000000 +0000 @@ -26,9 +26,9 @@ #include #include -#include "brw_device_info.h" -#include "isl.h" -#include "isl_priv.h" +#include "common/gen_device_info.h" +#include "isl/isl.h" +#include "isl/isl_priv.h" #define BDW_GT2_DEVID 0x161a @@ -124,9 +124,11 @@ { bool ok; + struct gen_device_info devinfo; + t_assert(gen_get_device_info(BDW_GT2_DEVID, &devinfo)); + struct isl_device dev; - isl_device_init(&dev, brw_get_device_info(BDW_GT2_DEVID), - /*bit6_swizzle*/ false); + isl_device_init(&dev, &devinfo, /*bit6_swizzle*/ false); struct isl_surf surf; ok = isl_surf_init(&dev, &surf, @@ -170,9 +172,11 @@ { bool ok; + struct gen_device_info devinfo; + t_assert(gen_get_device_info(BDW_GT2_DEVID, &devinfo)); + struct isl_device dev; - isl_device_init(&dev, brw_get_device_info(BDW_GT2_DEVID), - /*bit6_swizzle*/ false); + isl_device_init(&dev, &devinfo, /*bit6_swizzle*/ false); struct isl_surf surf; ok = isl_surf_init(&dev, &surf, @@ -229,9 +233,11 @@ { bool ok; + struct gen_device_info devinfo; + t_assert(gen_get_device_info(BDW_GT2_DEVID, &devinfo)); + struct isl_device dev; - isl_device_init(&dev, brw_get_device_info(BDW_GT2_DEVID), - /*bit6_swizzle*/ false); + isl_device_init(&dev, &devinfo, /*bit6_swizzle*/ false); struct isl_surf surf; ok = isl_surf_init(&dev, &surf, diff -Nru mesa-12.0.6/src/intel/Makefile.am mesa-17.0.7/src/intel/Makefile.am --- mesa-12.0.6/src/intel/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -19,4 +19,42 @@ # FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS # IN THE SOFTWARE. -SUBDIRS = genxml isl +include Makefile.sources + +# The gallium includes are for the util/u_math.h include from main/macros.h +AM_CPPFLAGS = \ + -I$(top_srcdir)/include \ + -I$(top_builddir)/src \ + -I$(top_srcdir)/src \ + -I$(top_builddir)/src/compiler/nir \ + -I$(top_builddir)/src/intel \ + -I$(top_srcdir)/src/intel \ + -I$(top_srcdir)/src/mapi \ + -I$(top_srcdir)/src/mesa \ + -I$(top_srcdir)/src/mesa/drivers/dri/i965 \ + -I$(top_srcdir)/src/gallium/auxiliary \ + -I$(top_srcdir)/src/gallium/include \ + $(INTEL_CFLAGS) \ + $(VALGRIND_CFLAGS) \ + $(DEFINES) + +AM_CFLAGS = \ + $(VISIBILITY_CFLAGS) \ + -Wno-override-init + +MKDIR_GEN = $(AM_V_at)$(MKDIR_P) $(@D) +PYTHON_GEN = $(AM_V_GEN)$(PYTHON2) $(PYTHON_FLAGS) + +noinst_LTLIBRARIES = +check_PROGRAMS = +TESTS = +BUILT_SOURCES = +CLEANFILES = +EXTRA_DIST = + +include Makefile.blorp.am +include Makefile.common.am +include Makefile.genxml.am +include Makefile.isl.am + +CLEANFILES += $(BUILT_SOURCES) diff -Nru mesa-12.0.6/src/intel/Makefile.blorp.am mesa-17.0.7/src/intel/Makefile.blorp.am --- mesa-12.0.6/src/intel/Makefile.blorp.am 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/Makefile.blorp.am 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,24 @@ +# Copyright 2015-2016 Intel Corporation +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +# IN THE SOFTWARE. + +noinst_LTLIBRARIES += blorp/libblorp.la + +blorp_libblorp_la_SOURCES = $(BLORP_FILES) diff -Nru mesa-12.0.6/src/intel/Makefile.common.am mesa-17.0.7/src/intel/Makefile.common.am --- mesa-12.0.6/src/intel/Makefile.common.am 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/Makefile.common.am 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,24 @@ +# Copyright © 2016 Intel Corporation +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +# IN THE SOFTWARE. + +noinst_LTLIBRARIES += common/libintel_common.la + +common_libintel_common_la_SOURCES = $(COMMON_FILES) diff -Nru mesa-12.0.6/src/intel/Makefile.genxml.am mesa-17.0.7/src/intel/Makefile.genxml.am --- mesa-12.0.6/src/intel/Makefile.genxml.am 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/Makefile.genxml.am 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,63 @@ +# Copyright © 2016 Intel Corporation +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +# IN THE SOFTWARE. + +BUILT_SOURCES += \ + $(GENXML_GENERATED_FILES) \ + $(AUBINATOR_GENERATED_FILES) + +EXTRA_DIST += \ + $(GENXML_GENERATED_FILES) \ + $(AUBINATOR_GENERATED_FILES) + +SUFFIXES = _pack.h _xml.h .xml + +$(GENXML_GENERATED_FILES): genxml/gen_pack_header.py + +.xml_pack.h: + $(MKDIR_GEN) + $(PYTHON_GEN) $(srcdir)/genxml/gen_pack_header.py $< > $@ || ($(RM) $@; false) + +# xxd generates variable names based on the path of the input file. We +# prefer to generate our own name here, so it doesn't vary from +# in/out-of-tree builds. + +$(GENXML_GENERATED_FILES): Makefile + +.xml_xml.h: + $(MKDIR_GEN) + $(AM_V_GEN) echo -n "static const uint8_t " > $@; \ + echo "$(@F)_xml[] = {" | sed -e 's,_xml.h,,' >> $@; \ + cat $< | $(XXD) -i >> $@; \ + echo "};" >> $@ + +EXTRA_DIST += \ + genxml/gen4.xml \ + genxml/gen45.xml \ + genxml/gen5.xml \ + genxml/gen6.xml \ + genxml/gen7.xml \ + genxml/gen75.xml \ + genxml/gen8.xml \ + genxml/gen9.xml \ + genxml/genX_pack.h \ + genxml/gen_macros.h \ + genxml/gen_pack_header.py \ + genxml/README diff -Nru mesa-12.0.6/src/intel/Makefile.in mesa-17.0.7/src/intel/Makefile.in --- mesa-12.0.6/src/intel/Makefile.in 2017-01-24 01:41:53.000000000 +0000 +++ mesa-17.0.7/src/intel/Makefile.in 2017-06-01 10:37:23.000000000 +0000 @@ -34,6 +34,91 @@ # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING # FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS # IN THE SOFTWARE. + +# Copyright 2015-2016 Intel Corporation +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +# IN THE SOFTWARE. + +# Copyright © 2016 Intel Corporation +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +# IN THE SOFTWARE. + +# Copyright © 2016 Intel Corporation +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +# IN THE SOFTWARE. + +# Copyright 2015-2016 Intel Corporation +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +# IN THE SOFTWARE. + VPATH = @srcdir@ am__is_gnu_make = { \ if test -z '$(MAKELEVEL)'; then \ @@ -109,6 +194,7 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ +check_PROGRAMS = isl/tests/isl_surf_get_image_offset_test$(EXEEXT) subdir = src/intel ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps = $(top_srcdir)/m4/ax_check_gnu_make.m4 \ @@ -127,6 +213,99 @@ mkinstalldirs = $(install_sh) -d CONFIG_CLEAN_FILES = CONFIG_CLEAN_VPATH_FILES = +LTLIBRARIES = $(noinst_LTLIBRARIES) +blorp_libblorp_la_LIBADD = +am__dirstamp = $(am__leading_dot)dirstamp +am__objects_1 = blorp/blorp.lo blorp/blorp_blit.lo \ + blorp/blorp_clear.lo +am_blorp_libblorp_la_OBJECTS = $(am__objects_1) +blorp_libblorp_la_OBJECTS = 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Sadly, +# we cannot use something simpler, involving e.g., "$(TEST_LOGS:.log=)", +# since that might cause problem with VPATH rewrites for suffix-less tests. +# See also 'test-harness-vpath-rewrite.sh' and 'test-trs-basic.sh'. +am__set_TESTS_bases = \ + bases='$(TEST_LOGS)'; \ + bases=`for i in $$bases; do echo $$i; done | sed 's/\.log$$//'`; \ + bases=`echo $$bases` +RECHECK_LOGS = $(TEST_LOGS) +AM_RECURSIVE_TARGETS = check recheck +TEST_SUITE_LOG = test-suite.log +TEST_EXTENSIONS = @EXEEXT@ .test +LOG_DRIVER = $(SHELL) $(top_srcdir)/bin/test-driver +LOG_COMPILE = $(LOG_COMPILER) $(AM_LOG_FLAGS) $(LOG_FLAGS) +am__set_b = \ + case '$@' in \ + */*) \ + case '$*' in \ + */*) b='$*';; \ + *) b=`echo '$@' | sed 's/\.log$$//'`; \ + esac;; \ + *) \ + b='$*';; \ + esac +am__test_logs1 = $(TESTS:=.log) +am__test_logs2 = $(am__test_logs1:@EXEEXT@.log=.log) +TEST_LOGS = $(am__test_logs2:.test.log=.log) +TEST_LOG_DRIVER = $(SHELL) $(top_srcdir)/bin/test-driver +TEST_LOG_COMPILE = $(TEST_LOG_COMPILER) $(AM_TEST_LOG_FLAGS) \ + $(TEST_LOG_FLAGS) +am__DIST_COMMON = $(srcdir)/Makefile.blorp.am \ + $(srcdir)/Makefile.common.am $(srcdir)/Makefile.genxml.am \ + $(srcdir)/Makefile.in $(srcdir)/Makefile.isl.am \ + $(srcdir)/Makefile.sources $(top_srcdir)/bin/depcomp \ + $(top_srcdir)/bin/test-driver DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST) -am__relativize = \ - dir0=`pwd`; \ - sed_first='s,^\([^/]*\)/.*$$,\1,'; \ - sed_rest='s,^[^/]*/*,,'; \ - sed_last='s,^.*/\([^/]*\)$$,\1,'; \ - sed_butlast='s,/*[^/]*$$,,'; \ - while test -n "$$dir1"; do \ - first=`echo "$$dir1" | sed -e "$$sed_first"`; \ - if test "$$first" != "."; then \ - if test "$$first" = ".."; then \ - dir2=`echo "$$dir0" | sed -e "$$sed_last"`/"$$dir2"; \ - dir0=`echo "$$dir0" | sed -e "$$sed_butlast"`; \ - else \ - first2=`echo "$$dir2" | sed -e "$$sed_first"`; \ - if test "$$first2" = "$$first"; then \ - dir2=`echo "$$dir2" | sed -e "$$sed_rest"`; \ - else \ - dir2="../$$dir2"; \ - fi; \ - dir0="$$dir0"/"$$first"; \ - fi; \ - fi; \ - dir1=`echo "$$dir1" | sed -e "$$sed_rest"`; \ - done; \ - reldir="$$dir2" ACLOCAL = @ACLOCAL@ AMDGPU_CFLAGS = @AMDGPU_CFLAGS@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -228,6 +609,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -257,10 +639,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -310,11 +693,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -354,8 +734,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -392,8 +770,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -402,7 +778,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -410,13 +785,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -445,6 +821,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -507,11 +884,159 @@ top_build_prefix = @top_build_prefix@ top_builddir = @top_builddir@ top_srcdir = @top_srcdir@ -SUBDIRS = genxml isl -all: all-recursive +BLORP_FILES = \ + blorp/blorp.c \ + blorp/blorp.h \ + blorp/blorp_blit.c \ + blorp/blorp_clear.c \ + blorp/blorp_genX_exec.h \ + blorp/blorp_priv.h + +COMMON_FILES = \ + common/gen_device_info.c \ + common/gen_device_info.h \ + common/gen_l3_config.c \ + common/gen_l3_config.h \ + common/gen_urb_config.c \ + common/gen_sample_positions.h + +GENXML_GENERATED_FILES = \ + genxml/gen4_pack.h \ + genxml/gen45_pack.h \ + genxml/gen5_pack.h \ + genxml/gen6_pack.h \ + genxml/gen7_pack.h \ + genxml/gen75_pack.h \ + genxml/gen8_pack.h \ + genxml/gen9_pack.h + +AUBINATOR_GENERATED_FILES = \ + genxml/gen6_xml.h \ + genxml/gen7_xml.h \ + genxml/gen75_xml.h \ + genxml/gen8_xml.h \ + genxml/gen9_xml.h + +ISL_FILES = \ + isl/isl.c \ + isl/isl.h \ + isl/isl_format.c \ + isl/isl_priv.h \ + isl/isl_storage_image.c + +ISL_GEN4_FILES = \ + isl/isl_gen4.c \ + isl/isl_gen4.h \ + isl/isl_surface_state.c + +ISL_GEN5_FILES = \ + isl/isl_surface_state.c + +ISL_GEN6_FILES = \ + isl/isl_gen6.c \ + isl/isl_gen6.h \ + isl/isl_surface_state.c + +ISL_GEN7_FILES = \ + isl/isl_gen7.c \ + isl/isl_gen7.h \ + isl/isl_surface_state.c + +ISL_GEN75_FILES = \ + isl/isl_surface_state.c + +ISL_GEN8_FILES = \ + isl/isl_gen8.c \ + isl/isl_gen8.h \ + isl/isl_surface_state.c + +ISL_GEN9_FILES = \ + isl/isl_gen9.c \ + isl/isl_gen9.h \ + isl/isl_surface_state.c + +ISL_GENERATED_FILES = \ + isl/isl_format_layout.c + + +# The gallium includes are for the util/u_math.h include from main/macros.h +AM_CPPFLAGS = \ + -I$(top_srcdir)/include \ + -I$(top_builddir)/src \ + -I$(top_srcdir)/src \ + -I$(top_builddir)/src/compiler/nir \ + -I$(top_builddir)/src/intel \ + -I$(top_srcdir)/src/intel \ + -I$(top_srcdir)/src/mapi \ + -I$(top_srcdir)/src/mesa \ + -I$(top_srcdir)/src/mesa/drivers/dri/i965 \ + -I$(top_srcdir)/src/gallium/auxiliary \ + -I$(top_srcdir)/src/gallium/include \ + $(INTEL_CFLAGS) \ + $(VALGRIND_CFLAGS) \ + $(DEFINES) + +AM_CFLAGS = \ + $(VISIBILITY_CFLAGS) \ + -Wno-override-init + +MKDIR_GEN = $(AM_V_at)$(MKDIR_P) $(@D) +PYTHON_GEN = $(AM_V_GEN)$(PYTHON2) $(PYTHON_FLAGS) +noinst_LTLIBRARIES = blorp/libblorp.la common/libintel_common.la \ + $(ISL_GEN_LIBS) isl/libisl.la +TESTS = $(check_PROGRAMS) +BUILT_SOURCES = $(GENXML_GENERATED_FILES) $(AUBINATOR_GENERATED_FILES) \ + $(ISL_GENERATED_FILES) +CLEANFILES = $(BUILT_SOURCES) + +# ---------------------------------------------------------------------------- +EXTRA_DIST = $(GENXML_GENERATED_FILES) $(AUBINATOR_GENERATED_FILES) \ + genxml/gen4.xml genxml/gen45.xml genxml/gen5.xml \ + genxml/gen6.xml genxml/gen7.xml genxml/gen75.xml \ + genxml/gen8.xml genxml/gen9.xml genxml/genX_pack.h \ + genxml/gen_macros.h genxml/gen_pack_header.py genxml/README \ + isl/gen_format_layout.py isl/isl_format_layout.csv isl/README +blorp_libblorp_la_SOURCES = $(BLORP_FILES) +common_libintel_common_la_SOURCES = $(COMMON_FILES) +SUFFIXES = _pack.h _xml.h .xml +ISL_GEN_LIBS = \ + isl/libisl-gen4.la \ + isl/libisl-gen5.la \ + isl/libisl-gen6.la \ + isl/libisl-gen7.la \ + isl/libisl-gen75.la \ + isl/libisl-gen8.la \ + isl/libisl-gen9.la \ + $(NULL) + +isl_libisl_la_LIBADD = $(ISL_GEN_LIBS) +isl_libisl_la_SOURCES = $(ISL_FILES) $(ISL_GENERATED_FILES) +isl_libisl_gen4_la_SOURCES = $(ISL_GEN4_FILES) +isl_libisl_gen4_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=40 +isl_libisl_gen5_la_SOURCES = $(ISL_GEN5_FILES) +isl_libisl_gen5_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=50 +isl_libisl_gen6_la_SOURCES = $(ISL_GEN6_FILES) +isl_libisl_gen6_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=60 +isl_libisl_gen7_la_SOURCES = $(ISL_GEN7_FILES) +isl_libisl_gen7_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=70 +isl_libisl_gen75_la_SOURCES = $(ISL_GEN75_FILES) +isl_libisl_gen75_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=75 +isl_libisl_gen8_la_SOURCES = $(ISL_GEN8_FILES) +isl_libisl_gen8_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=80 +isl_libisl_gen9_la_SOURCES = $(ISL_GEN9_FILES) +isl_libisl_gen9_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=90 +isl_tests_isl_surf_get_image_offset_test_LDADD = \ + common/libintel_common.la \ + isl/libisl.la \ + $(top_builddir)/src/mesa/drivers/dri/i965/libi965_compiler.la \ + -lm + +all: $(BUILT_SOURCES) + $(MAKE) $(AM_MAKEFLAGS) all-am .SUFFIXES: -$(srcdir)/Makefile.in: $(srcdir)/Makefile.am $(am__configure_deps) +.SUFFIXES: _pack.h _xml.h .xml .c .lo .log .o .obj .test .test$(EXEEXT) .trs +$(srcdir)/Makefile.in: $(srcdir)/Makefile.am $(srcdir)/Makefile.sources $(srcdir)/Makefile.blorp.am $(srcdir)/Makefile.common.am $(srcdir)/Makefile.genxml.am $(srcdir)/Makefile.isl.am $(am__configure_deps) @for dep in $?; do \ case '$(am__configure_deps)' in \ *$$dep*) \ @@ -531,6 +1056,7 @@ echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \ cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \ esac; +$(srcdir)/Makefile.sources $(srcdir)/Makefile.blorp.am $(srcdir)/Makefile.common.am $(srcdir)/Makefile.genxml.am $(srcdir)/Makefile.isl.am $(am__empty): $(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES) cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh @@ -541,67 +1067,290 @@ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh $(am__aclocal_m4_deps): +clean-noinstLTLIBRARIES: + -test -z "$(noinst_LTLIBRARIES)" || rm -f $(noinst_LTLIBRARIES) + @list='$(noinst_LTLIBRARIES)'; \ + locs=`for p in $$list; do echo $$p; done | \ + sed 's|^[^/]*$$|.|; s|/[^/]*$$||; s|$$|/so_locations|' | \ + sort -u`; \ + test -z "$$locs" || { \ + echo rm -f $${locs}; \ + rm -f $${locs}; \ + } +blorp/$(am__dirstamp): + @$(MKDIR_P) blorp + @: > blorp/$(am__dirstamp) +blorp/$(DEPDIR)/$(am__dirstamp): + @$(MKDIR_P) blorp/$(DEPDIR) + @: > blorp/$(DEPDIR)/$(am__dirstamp) +blorp/blorp.lo: blorp/$(am__dirstamp) blorp/$(DEPDIR)/$(am__dirstamp) +blorp/blorp_blit.lo: blorp/$(am__dirstamp) \ + blorp/$(DEPDIR)/$(am__dirstamp) +blorp/blorp_clear.lo: blorp/$(am__dirstamp) \ + blorp/$(DEPDIR)/$(am__dirstamp) + +blorp/libblorp.la: $(blorp_libblorp_la_OBJECTS) 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then \ $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \ @@ -726,100 +1616,145 @@ "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'" install; \ fi mostlyclean-generic: + -test -z "$(TEST_LOGS)" || rm -f $(TEST_LOGS) + -test -z "$(TEST_LOGS:.log=.trs)" || rm -f $(TEST_LOGS:.log=.trs) + -test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG) clean-generic: + -test -z "$(CLEANFILES)" || rm -f $(CLEANFILES) distclean-generic: -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES) -test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES) + -rm -f blorp/$(DEPDIR)/$(am__dirstamp) + -rm -f blorp/$(am__dirstamp) + -rm -f common/$(DEPDIR)/$(am__dirstamp) + -rm -f common/$(am__dirstamp) + -rm -f isl/$(DEPDIR)/$(am__dirstamp) + -rm -f isl/$(am__dirstamp) + -rm -f isl/tests/$(DEPDIR)/$(am__dirstamp) + -rm -f isl/tests/$(am__dirstamp) maintainer-clean-generic: @echo "This command is intended for maintainers to use" @echo "it deletes files that may require special tools to rebuild." -clean: clean-recursive + -test -z "$(BUILT_SOURCES)" || rm -f $(BUILT_SOURCES) +clean: clean-am -clean-am: clean-generic clean-libtool mostlyclean-am +clean-am: clean-checkPROGRAMS clean-generic clean-libtool \ + clean-noinstLTLIBRARIES mostlyclean-am -distclean: distclean-recursive +distclean: distclean-am + -rm -rf blorp/$(DEPDIR) common/$(DEPDIR) isl/$(DEPDIR) isl/tests/$(DEPDIR) -rm -f Makefile -distclean-am: clean-am distclean-generic distclean-tags +distclean-am: clean-am distclean-compile distclean-generic \ + distclean-tags -dvi: dvi-recursive +dvi: dvi-am dvi-am: -html: html-recursive +html: html-am html-am: -info: info-recursive +info: info-am info-am: install-data-am: -install-dvi: install-dvi-recursive +install-dvi: install-dvi-am install-dvi-am: install-exec-am: -install-html: install-html-recursive +install-html: install-html-am install-html-am: -install-info: install-info-recursive +install-info: install-info-am install-info-am: install-man: -install-pdf: install-pdf-recursive +install-pdf: install-pdf-am install-pdf-am: -install-ps: install-ps-recursive +install-ps: install-ps-am install-ps-am: installcheck-am: -maintainer-clean: maintainer-clean-recursive +maintainer-clean: maintainer-clean-am + -rm -rf blorp/$(DEPDIR) common/$(DEPDIR) isl/$(DEPDIR) isl/tests/$(DEPDIR) -rm -f Makefile maintainer-clean-am: distclean-am maintainer-clean-generic -mostlyclean: mostlyclean-recursive +mostlyclean: mostlyclean-am -mostlyclean-am: mostlyclean-generic mostlyclean-libtool +mostlyclean-am: mostlyclean-compile mostlyclean-generic \ + mostlyclean-libtool -pdf: pdf-recursive +pdf: pdf-am pdf-am: -ps: ps-recursive +ps: ps-am ps-am: uninstall-am: -.MAKE: $(am__recursive_targets) install-am install-strip +.MAKE: all check check-am install install-am install-strip -.PHONY: $(am__recursive_targets) CTAGS GTAGS TAGS all all-am check \ - check-am clean clean-generic clean-libtool cscopelist-am ctags \ - ctags-am distclean distclean-generic distclean-libtool \ +.PHONY: CTAGS GTAGS TAGS all all-am check check-TESTS check-am clean \ + clean-checkPROGRAMS clean-generic clean-libtool \ + clean-noinstLTLIBRARIES cscopelist-am ctags ctags-am distclean \ + distclean-compile distclean-generic distclean-libtool \ distclean-tags distdir dvi dvi-am html html-am info info-am \ install install-am install-data install-data-am install-dvi \ install-dvi-am install-exec install-exec-am install-html \ install-html-am install-info install-info-am install-man \ install-pdf install-pdf-am install-ps install-ps-am \ install-strip installcheck installcheck-am installdirs \ - installdirs-am maintainer-clean maintainer-clean-generic \ - mostlyclean mostlyclean-generic mostlyclean-libtool pdf pdf-am \ - ps ps-am tags tags-am uninstall uninstall-am + maintainer-clean maintainer-clean-generic mostlyclean \ + mostlyclean-compile mostlyclean-generic mostlyclean-libtool \ + pdf pdf-am ps ps-am recheck tags tags-am uninstall \ + uninstall-am .PRECIOUS: Makefile +$(GENXML_GENERATED_FILES): genxml/gen_pack_header.py + +.xml_pack.h: + $(MKDIR_GEN) + $(PYTHON_GEN) $(srcdir)/genxml/gen_pack_header.py $< > $@ || ($(RM) $@; false) + +# xxd generates variable names based on the path of the input file. We +# prefer to generate our own name here, so it doesn't vary from +# in/out-of-tree builds. + +$(GENXML_GENERATED_FILES): Makefile + +.xml_xml.h: + $(MKDIR_GEN) + $(AM_V_GEN) echo -n "static const uint8_t " > $@; \ + echo "$(@F)_xml[] = {" | sed -e 's,_xml.h,,' >> $@; \ + cat $< | $(XXD) -i >> $@; \ + echo "};" >> $@ + +isl/isl_format_layout.c: isl/gen_format_layout.py \ + isl/isl_format_layout.csv + $(MKDIR_GEN) + $(PYTHON_GEN) $(srcdir)/isl/gen_format_layout.py \ + --csv $(srcdir)/isl/isl_format_layout.csv --out $@ + # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: diff -Nru mesa-12.0.6/src/intel/Makefile.isl.am mesa-17.0.7/src/intel/Makefile.isl.am --- mesa-12.0.6/src/intel/Makefile.isl.am 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/Makefile.isl.am 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,85 @@ +# Copyright 2015-2016 Intel Corporation +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +# IN THE SOFTWARE. + +ISL_GEN_LIBS = \ + isl/libisl-gen4.la \ + isl/libisl-gen5.la \ + isl/libisl-gen6.la \ + isl/libisl-gen7.la \ + isl/libisl-gen75.la \ + isl/libisl-gen8.la \ + isl/libisl-gen9.la \ + $(NULL) + +noinst_LTLIBRARIES += $(ISL_GEN_LIBS) isl/libisl.la + +isl_libisl_la_LIBADD = $(ISL_GEN_LIBS) +isl_libisl_la_SOURCES = $(ISL_FILES) $(ISL_GENERATED_FILES) + +isl_libisl_gen4_la_SOURCES = $(ISL_GEN4_FILES) +isl_libisl_gen4_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=40 + +isl_libisl_gen5_la_SOURCES = $(ISL_GEN5_FILES) +isl_libisl_gen5_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=50 + +isl_libisl_gen6_la_SOURCES = $(ISL_GEN6_FILES) +isl_libisl_gen6_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=60 + +isl_libisl_gen7_la_SOURCES = $(ISL_GEN7_FILES) +isl_libisl_gen7_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=70 + +isl_libisl_gen75_la_SOURCES = $(ISL_GEN75_FILES) +isl_libisl_gen75_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=75 + +isl_libisl_gen8_la_SOURCES = $(ISL_GEN8_FILES) +isl_libisl_gen8_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=80 + +isl_libisl_gen9_la_SOURCES = $(ISL_GEN9_FILES) +isl_libisl_gen9_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=90 + +BUILT_SOURCES += $(ISL_GENERATED_FILES) + +isl/isl_format_layout.c: isl/gen_format_layout.py \ + isl/isl_format_layout.csv + $(MKDIR_GEN) + $(PYTHON_GEN) $(srcdir)/isl/gen_format_layout.py \ + --csv $(srcdir)/isl/isl_format_layout.csv --out $@ + +# ---------------------------------------------------------------------------- +# Tests +# ---------------------------------------------------------------------------- + +check_PROGRAMS += isl/tests/isl_surf_get_image_offset_test + +TESTS += $(check_PROGRAMS) + +isl_tests_isl_surf_get_image_offset_test_LDADD = \ + common/libintel_common.la \ + isl/libisl.la \ + $(top_builddir)/src/mesa/drivers/dri/i965/libi965_compiler.la \ + -lm + +# ---------------------------------------------------------------------------- + +EXTRA_DIST += \ + isl/gen_format_layout.py \ + isl/isl_format_layout.csv \ + isl/README diff -Nru mesa-12.0.6/src/intel/Makefile.sources mesa-17.0.7/src/intel/Makefile.sources --- mesa-12.0.6/src/intel/Makefile.sources 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/Makefile.sources 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,73 @@ +BLORP_FILES = \ + blorp/blorp.c \ + blorp/blorp.h \ + blorp/blorp_blit.c \ + blorp/blorp_clear.c \ + blorp/blorp_genX_exec.h \ + blorp/blorp_priv.h + +COMMON_FILES = \ + common/gen_device_info.c \ + common/gen_device_info.h \ + common/gen_l3_config.c \ + common/gen_l3_config.h \ + common/gen_urb_config.c \ + common/gen_sample_positions.h + +GENXML_GENERATED_FILES = \ + genxml/gen4_pack.h \ + genxml/gen45_pack.h \ + genxml/gen5_pack.h \ + genxml/gen6_pack.h \ + genxml/gen7_pack.h \ + genxml/gen75_pack.h \ + genxml/gen8_pack.h \ + genxml/gen9_pack.h + +AUBINATOR_GENERATED_FILES = \ + genxml/gen6_xml.h \ + genxml/gen7_xml.h \ + genxml/gen75_xml.h \ + genxml/gen8_xml.h \ + genxml/gen9_xml.h + +ISL_FILES = \ + isl/isl.c \ + isl/isl.h \ + isl/isl_format.c \ + isl/isl_priv.h \ + isl/isl_storage_image.c + +ISL_GEN4_FILES = \ + isl/isl_gen4.c \ + isl/isl_gen4.h \ + isl/isl_surface_state.c + +ISL_GEN5_FILES = \ + isl/isl_surface_state.c + +ISL_GEN6_FILES = \ + isl/isl_gen6.c \ + isl/isl_gen6.h \ + isl/isl_surface_state.c + +ISL_GEN7_FILES = \ + isl/isl_gen7.c \ + isl/isl_gen7.h \ + isl/isl_surface_state.c + +ISL_GEN75_FILES = \ + isl/isl_surface_state.c + +ISL_GEN8_FILES = \ + isl/isl_gen8.c \ + isl/isl_gen8.h \ + isl/isl_surface_state.c + +ISL_GEN9_FILES = \ + isl/isl_gen9.c \ + isl/isl_gen9.h \ + isl/isl_surface_state.c + +ISL_GENERATED_FILES = \ + isl/isl_format_layout.c diff -Nru mesa-12.0.6/src/intel/tools/aubinator.c mesa-17.0.7/src/intel/tools/aubinator.c --- mesa-12.0.6/src/intel/tools/aubinator.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/tools/aubinator.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,1337 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "util/macros.h" + +#include "decoder.h" +#include "intel_aub.h" +#include "gen_disasm.h" + +/* Below is the only command missing from intel_aub.h in libdrm + * So, reuse intel_aub.h from libdrm and #define the + * AUB_MI_BATCH_BUFFER_END as below + */ +#define AUB_MI_BATCH_BUFFER_END (0x0500 << 16) + +#define CSI "\e[" +#define BLUE_HEADER CSI "0;44m" +#define GREEN_HEADER CSI "1;42m" +#define NORMAL CSI "0m" + +/* options */ + +static bool option_full_decode = true; +static bool option_print_offsets = true; +static enum { COLOR_AUTO, COLOR_ALWAYS, COLOR_NEVER } option_color; + +/* state */ + +uint16_t pci_id = 0; +char *input_file = NULL, *xml_path = NULL; +struct gen_spec *spec; +struct gen_disasm *disasm; + +uint64_t gtt_size, gtt_end; +void *gtt; +uint64_t general_state_base; +uint64_t surface_state_base; +uint64_t dynamic_state_base; +uint64_t instruction_base; +uint64_t instruction_bound; + +static inline uint32_t +field(uint32_t value, int start, int end) +{ + uint32_t mask; + + mask = ~0U >> (31 - end + start); + + return (value >> start) & mask; +} + +struct brw_instruction; + +static inline int +valid_offset(uint32_t offset) +{ + return offset < gtt_end; +} + +static void +print_dword_val(struct gen_field_iterator *iter, uint64_t offset, + int *dword_num) +{ + struct gen_field *f; + + f = iter->group->fields[iter->i - 1]; + const int dword = f->start / 32; + + if (*dword_num != dword) { + printf("0x%08"PRIx64": 0x%08x : Dword %d\n", + offset + 4 * dword, iter->p[dword], dword); + *dword_num = dword; + } +} + +static char * +print_iterator_values(struct gen_field_iterator *iter, int *idx) +{ + char *token = NULL; + if (strstr(iter->value, "struct") == NULL) { + if (strlen(iter->description) > 0) { + printf(" %s: %s (%s)\n", + iter->name, iter->value, iter->description); + } else { + printf(" %s: %s\n", iter->name, iter->value); + } + } else { + token = strtok(iter->value, " "); + if (token != NULL) { + token = strtok(NULL, " "); + *idx = atoi(strtok(NULL, ">")); + } else { + token = NULL; + } + printf(" %s:\n", iter->name, token); + } + return token; +} + +static void +decode_structure(struct gen_spec *spec, struct gen_group *strct, + const uint32_t *p) +{ + struct gen_field_iterator iter; + char *token = NULL; + int idx = 0, dword_num = 0; + uint64_t offset = 0; + + if (option_print_offsets) + offset = (void *) p - gtt; + else + offset = 0; + + gen_field_iterator_init(&iter, strct, p, + option_color == COLOR_ALWAYS); + while (gen_field_iterator_next(&iter)) { + idx = 0; + print_dword_val(&iter, offset, &dword_num); + token = print_iterator_values(&iter, &idx); + if (token != NULL) { + struct gen_group *struct_val = gen_spec_find_struct(spec, token); + decode_structure(spec, struct_val, &p[idx]); + token = NULL; + } + } +} + +static void +handle_struct_decode(struct gen_spec *spec, char *struct_name, uint32_t *p) +{ + if (struct_name == NULL) + return; + struct gen_group *struct_val = gen_spec_find_struct(spec, struct_name); + decode_structure(spec, struct_val, p); +} + +static void +dump_binding_table(struct gen_spec *spec, uint32_t offset) +{ + uint32_t *pointers, i; + uint64_t start; + struct gen_group *surface_state; + + surface_state = gen_spec_find_struct(spec, "RENDER_SURFACE_STATE"); + if (surface_state == NULL) { + printf("did not find RENDER_SURFACE_STATE info\n"); + return; + } + + start = surface_state_base + offset; + pointers = gtt + start; + for (i = 0; i < 16; i++) { + if (pointers[i] == 0) + continue; + start = pointers[i] + surface_state_base; + if (!valid_offset(start)) { + printf("pointer %u: %08x \n", + i, pointers[i]); + continue; + } else { + printf("pointer %u: %08x\n", i, pointers[i]); + } + + decode_structure(spec, surface_state, gtt + start); + } +} + +static void +handle_3dstate_index_buffer(struct gen_spec *spec, uint32_t *p) +{ + void *start; + uint32_t length, i, type, size; + + start = gtt + p[2]; + type = (p[1] >> 8) & 3; + size = 1 << type; + length = p[4] / size; + if (length > 10) + length = 10; + + printf("\t"); + + for (i = 0; i < length; i++) { + switch (type) { + case 0: + printf("%3d ", ((uint8_t *)start)[i]); + break; + case 1: + printf("%3d ", ((uint16_t *)start)[i]); + break; + case 2: + printf("%3d ", ((uint32_t *)start)[i]); + break; + } + } + if (length < p[4] / size) + printf("...\n"); + else + printf("\n"); +} + +static inline uint64_t +get_address(struct gen_spec *spec, uint32_t *p) +{ + /* Addresses are always guaranteed to be page-aligned and sometimes + * hardware packets have extra stuff stuffed in the bottom 12 bits. + */ + uint64_t addr = p[0] & ~0xfffu; + + if (gen_spec_get_gen(spec) >= gen_make_gen(8,0)) { + /* On Broadwell and above, we have 48-bit addresses which consume two + * dwords. Some packets require that these get stored in a "canonical + * form" which means that bit 47 is sign-extended through the upper + * bits. In order to correctly handle those aub dumps, we need to mask + * off the top 16 bits. + */ + addr |= ((uint64_t)p[1] & 0xffff) << 32; + } + + return addr; +} + +static inline uint64_t +get_offset(uint32_t *p, uint32_t start, uint32_t end) +{ + assert(start <= end); + assert(end < 64); + + uint64_t mask = (~0ull >> (64 - (end - start + 1))) << start; + + uint64_t offset = p[0]; + if (end >= 32) + offset |= (uint64_t) p[1] << 32; + + return offset & mask; +} + +static void +handle_state_base_address(struct gen_spec *spec, uint32_t *p) +{ + if (gen_spec_get_gen(spec) >= gen_make_gen(8,0)) { + if (p[1] & 1) + general_state_base = get_address(spec, &p[1]); + if (p[4] & 1) + surface_state_base = get_address(spec, &p[4]); + if (p[6] & 1) + dynamic_state_base = get_address(spec, &p[6]); + if (p[10] & 1) + instruction_base = get_address(spec, &p[10]); + if (p[15] & 1) + instruction_bound = p[15] & 0xfff; + } else { + if (p[2] & 1) + surface_state_base = get_address(spec, &p[2]); + if (p[3] & 1) + dynamic_state_base = get_address(spec, &p[3]); + if (p[5] & 1) + instruction_base = get_address(spec, &p[5]); + if (p[9] & 1) + instruction_bound = get_address(spec, &p[9]); + } +} + +static void +dump_samplers(struct gen_spec *spec, uint32_t offset) +{ + uint32_t i; + uint64_t start; + struct gen_group *sampler_state; + + sampler_state = gen_spec_find_struct(spec, "SAMPLER_STATE"); + + start = dynamic_state_base + offset; + for (i = 0; i < 4; i++) { + printf("sampler state %d\n", i); + decode_structure(spec, sampler_state, gtt + start + i * 16); + } +} + +static void +handle_media_interface_descriptor_load(struct gen_spec *spec, uint32_t *p) +{ + int i, length = p[2] / 32; + struct gen_group *descriptor_structure; + uint32_t *descriptors; + uint64_t start; + struct brw_instruction *insns; + + descriptor_structure = + gen_spec_find_struct(spec, "INTERFACE_DESCRIPTOR_DATA"); + if (descriptor_structure == NULL) { + printf("did not find INTERFACE_DESCRIPTOR_DATA info\n"); + return; + } + + start = dynamic_state_base + p[3]; + descriptors = gtt + start; + for (i = 0; i < length; i++, descriptors += 8) { + printf("descriptor %u: %08x\n", i, *descriptors); + decode_structure(spec, descriptor_structure, descriptors); + + start = instruction_base + descriptors[0]; + if (!valid_offset(start)) { + printf("kernel: %08"PRIx64" \n", start); + continue; + } else { + printf("kernel: %08"PRIx64"\n", start); + } + + insns = (struct brw_instruction *) (gtt + start); + gen_disasm_disassemble(disasm, insns, 0, stdout); + + dump_samplers(spec, descriptors[3] & ~0x1f); + dump_binding_table(spec, descriptors[4] & ~0x1f); + } +} + +/* Heuristic to determine whether a uint32_t is probably actually a float + * (http://stackoverflow.com/a/2953466) + */ + +static bool +probably_float(uint32_t bits) +{ + int exp = ((bits & 0x7f800000U) >> 23) - 127; + uint32_t mant = bits & 0x007fffff; + + /* +- 0.0 */ + if (exp == -127 && mant == 0) + return true; + + /* +- 1 billionth to 1 billion */ + if (-30 <= exp && exp <= 30) + return true; + + /* some value with only a few binary digits */ + if ((mant & 0x0000ffff) == 0) + return true; + + return false; +} + +static void +handle_3dstate_vertex_buffers(struct gen_spec *spec, uint32_t *p) +{ + uint32_t *end, *s, *dw, *dwend; + uint64_t offset; + int n, i, count, stride; + + end = (p[0] & 0xff) + p + 2; + for (s = &p[1], n = 0; s < end; s += 4, n++) { + if (gen_spec_get_gen(spec) >= gen_make_gen(8, 0)) { + offset = *(uint64_t *) &s[1]; + dwend = gtt + offset + s[3]; + } else { + offset = s[1]; + dwend = gtt + s[2] + 1; + } + + stride = field(s[0], 0, 11); + count = 0; + printf("vertex buffer %d, size %d\n", n, s[3]); + for (dw = gtt + offset, i = 0; dw < dwend && i < 256; dw++) { + if (count == 0 && count % (8 * 4) == 0) + printf(" "); + + if (probably_float(*dw)) + printf(" %8.2f", *(float *) dw); + else + printf(" 0x%08x", *dw); + + i++; + count += 4; + + if (count == stride) { + printf("\n"); + count = 0; + } else if (count % (8 * 4) == 0) { + printf("\n"); + } else { + printf(" "); + } + } + if (count > 0 && count % (8 * 4) != 0) + printf("\n"); + } +} + +static void +handle_3dstate_vs(struct gen_spec *spec, uint32_t *p) +{ + uint64_t start; + struct brw_instruction *insns; + int vs_enable; + + if (gen_spec_get_gen(spec) >= gen_make_gen(8, 0)) { + start = get_offset(&p[1], 6, 63); + vs_enable = p[7] & 1; + } else { + start = get_offset(&p[1], 6, 31); + vs_enable = p[5] & 1; + } + + if (vs_enable) { + printf("instruction_base %08"PRIx64", start %08"PRIx64"\n", + instruction_base, start); + + insns = (struct brw_instruction *) (gtt + instruction_base + start); + gen_disasm_disassemble(disasm, insns, 0, stdout); + } +} + +static void +handle_3dstate_hs(struct gen_spec *spec, uint32_t *p) +{ + uint64_t start; + struct brw_instruction *insns; + int hs_enable; + + if (gen_spec_get_gen(spec) >= gen_make_gen(8, 0)) { + start = get_offset(&p[3], 6, 63); + } else { + start = get_offset(&p[3], 6, 31); + } + + hs_enable = p[2] & 0x80000000; + + if (hs_enable) { + printf("instruction_base %08"PRIx64", start %08"PRIx64"\n", + instruction_base, start); + + insns = (struct brw_instruction *) (gtt + instruction_base + start); + gen_disasm_disassemble(disasm, insns, 0, stdout); + } +} + +static void +handle_3dstate_constant(struct gen_spec *spec, uint32_t *p) +{ + int i, j, length; + uint32_t *dw; + float *f; + + for (i = 0; i < 4; i++) { + length = (p[1 + i / 2] >> (i & 1) * 16) & 0xffff; + f = (float *) (gtt + p[3 + i * 2] + dynamic_state_base); + dw = (uint32_t *) f; + for (j = 0; j < length * 8; j++) { + if (probably_float(dw[j])) + printf(" %04.3f", f[j]); + else + printf(" 0x%08x", dw[j]); + + if ((j & 7) == 7) + printf("\n"); + } + } +} + +static void +handle_3dstate_ps(struct gen_spec *spec, uint32_t *p) +{ + uint32_t mask = ~((1 << 6) - 1); + uint64_t start; + struct brw_instruction *insns; + static const char unused[] = "unused"; + static const char *pixel_type[3] = {"8 pixel", "16 pixel", "32 pixel"}; + const char *k0, *k1, *k2; + uint32_t k_mask, k1_offset, k2_offset; + + if (gen_spec_get_gen(spec) >= gen_make_gen(8, 0)) { + k_mask = p[6] & 7; + k1_offset = 8; + k2_offset = 10; + } else { + k_mask = p[4] & 7; + k1_offset = 6; + k2_offset = 7; + } + +#define DISPATCH_8 1 +#define DISPATCH_16 2 +#define DISPATCH_32 4 + + switch (k_mask) { + case DISPATCH_8: + k0 = pixel_type[0]; + k1 = unused; + k2 = unused; + break; + case DISPATCH_16: + k0 = pixel_type[1]; + k1 = unused; + k2 = unused; + break; + case DISPATCH_8 | DISPATCH_16: + k0 = pixel_type[0]; + k1 = unused; + k2 = pixel_type[1]; + break; + case DISPATCH_32: + k0 = pixel_type[2]; + k1 = unused; + k2 = unused; + break; + case DISPATCH_16 | DISPATCH_32: + k0 = unused; + k1 = pixel_type[2]; + k2 = pixel_type[1]; + break; + case DISPATCH_8 | DISPATCH_16 | DISPATCH_32: + k0 = pixel_type[0]; + k1 = pixel_type[2]; + k2 = pixel_type[1]; + break; + default: + k0 = unused; + k1 = unused; + k2 = unused; + break; + } + + start = instruction_base + (p[1] & mask); + printf(" Kernel[0] %s\n", k0); + if (k0 != unused) { + insns = (struct brw_instruction *) (gtt + start); + gen_disasm_disassemble(disasm, insns, 0, stdout); + } + + start = instruction_base + (p[k1_offset] & mask); + printf(" Kernel[1] %s\n", k1); + if (k1 != unused) { + insns = (struct brw_instruction *) (gtt + start); + gen_disasm_disassemble(disasm, insns, 0, stdout); + } + + start = instruction_base + (p[k2_offset] & mask); + printf(" Kernel[2] %s\n", k2); + if (k2 != unused) { + insns = (struct brw_instruction *) (gtt + start); + gen_disasm_disassemble(disasm, insns, 0, stdout); + } +} + +static void +handle_3dstate_binding_table_pointers(struct gen_spec *spec, uint32_t *p) +{ + dump_binding_table(spec, p[1]); +} + +static void +handle_3dstate_sampler_state_pointers(struct gen_spec *spec, uint32_t *p) +{ + dump_samplers(spec, p[1]); +} + +static void +handle_3dstate_viewport_state_pointers_cc(struct gen_spec *spec, uint32_t *p) +{ + uint64_t start; + struct gen_group *cc_viewport; + + cc_viewport = gen_spec_find_struct(spec, "CC_VIEWPORT"); + + start = dynamic_state_base + (p[1] & ~0x1fu); + for (uint32_t i = 0; i < 4; i++) { + printf("viewport %d\n", i); + decode_structure(spec, cc_viewport, gtt + start + i * 8); + } +} + +static void +handle_3dstate_viewport_state_pointers_sf_clip(struct gen_spec *spec, + uint32_t *p) +{ + uint64_t start; + struct gen_group *sf_clip_viewport; + + sf_clip_viewport = gen_spec_find_struct(spec, "SF_CLIP_VIEWPORT"); + + start = dynamic_state_base + (p[1] & ~0x3fu); + for (uint32_t i = 0; i < 4; i++) { + printf("viewport %d\n", i); + decode_structure(spec, sf_clip_viewport, gtt + start + i * 64); + } +} + +static void +handle_3dstate_blend_state_pointers(struct gen_spec *spec, uint32_t *p) +{ + uint64_t start; + struct gen_group *blend_state; + + blend_state = gen_spec_find_struct(spec, "BLEND_STATE"); + + start = dynamic_state_base + (p[1] & ~0x3fu); + decode_structure(spec, blend_state, gtt + start); +} + +static void +handle_3dstate_cc_state_pointers(struct gen_spec *spec, uint32_t *p) +{ + uint64_t start; + struct gen_group *cc_state; + + cc_state = gen_spec_find_struct(spec, "COLOR_CALC_STATE"); + + start = dynamic_state_base + (p[1] & ~0x3fu); + decode_structure(spec, cc_state, gtt + start); +} + +static void +handle_3dstate_scissor_state_pointers(struct gen_spec *spec, uint32_t *p) +{ + uint64_t start; + struct gen_group *scissor_rect; + + scissor_rect = gen_spec_find_struct(spec, "SCISSOR_RECT"); + + start = dynamic_state_base + (p[1] & ~0x1fu); + decode_structure(spec, scissor_rect, gtt + start); +} + +static void +handle_load_register_imm(struct gen_spec *spec, uint32_t *p) +{ + struct gen_group *reg = gen_spec_find_register(spec, p[1]); + + if (reg != NULL) { + printf("register %s (0x%x): 0x%x\n", + reg->name, reg->register_offset, p[2]); + decode_structure(spec, reg, &p[2]); + } +} + +#define ARRAY_LENGTH(a) (sizeof (a) / sizeof (a)[0]) + +#define STATE_BASE_ADDRESS 0x61010000 + +#define MEDIA_INTERFACE_DESCRIPTOR_LOAD 0x70020000 + +#define _3DSTATE_INDEX_BUFFER 0x780a0000 +#define _3DSTATE_VERTEX_BUFFERS 0x78080000 + +#define _3DSTATE_VS 0x78100000 +#define _3DSTATE_GS 0x78110000 +#define _3DSTATE_HS 0x781b0000 +#define _3DSTATE_DS 0x781d0000 + +#define _3DSTATE_CONSTANT_VS 0x78150000 +#define _3DSTATE_CONSTANT_GS 0x78160000 +#define _3DSTATE_CONSTANT_PS 0x78170000 +#define _3DSTATE_CONSTANT_HS 0x78190000 +#define _3DSTATE_CONSTANT_DS 0x781A0000 + +#define _3DSTATE_PS 0x78200000 + +#define _3DSTATE_BINDING_TABLE_POINTERS_VS 0x78260000 +#define _3DSTATE_BINDING_TABLE_POINTERS_HS 0x78270000 +#define _3DSTATE_BINDING_TABLE_POINTERS_DS 0x78280000 +#define _3DSTATE_BINDING_TABLE_POINTERS_GS 0x78290000 +#define _3DSTATE_BINDING_TABLE_POINTERS_PS 0x782a0000 + +#define _3DSTATE_SAMPLER_STATE_POINTERS_VS 0x782b0000 +#define _3DSTATE_SAMPLER_STATE_POINTERS_GS 0x782e0000 +#define _3DSTATE_SAMPLER_STATE_POINTERS_PS 0x782f0000 + +#define _3DSTATE_VIEWPORT_STATE_POINTERS_CC 0x78230000 +#define _3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP 0x78210000 +#define _3DSTATE_BLEND_STATE_POINTERS 0x78240000 +#define _3DSTATE_CC_STATE_POINTERS 0x780e0000 +#define _3DSTATE_SCISSOR_STATE_POINTERS 0x780f0000 + +#define _MI_LOAD_REGISTER_IMM 0x11000000 + +struct custom_handler { + uint32_t opcode; + void (*handle)(struct gen_spec *spec, uint32_t *p); +} custom_handlers[] = { + { STATE_BASE_ADDRESS, handle_state_base_address }, + { MEDIA_INTERFACE_DESCRIPTOR_LOAD, handle_media_interface_descriptor_load }, + { _3DSTATE_VERTEX_BUFFERS, handle_3dstate_vertex_buffers }, + { _3DSTATE_INDEX_BUFFER, handle_3dstate_index_buffer }, + { _3DSTATE_VS, handle_3dstate_vs }, + { _3DSTATE_GS, handle_3dstate_vs }, + { _3DSTATE_DS, handle_3dstate_vs }, + { _3DSTATE_HS, handle_3dstate_hs }, + { _3DSTATE_CONSTANT_VS, handle_3dstate_constant }, + { _3DSTATE_CONSTANT_GS, handle_3dstate_constant }, + { _3DSTATE_CONSTANT_PS, handle_3dstate_constant }, + { _3DSTATE_CONSTANT_HS, handle_3dstate_constant }, + { _3DSTATE_CONSTANT_DS, handle_3dstate_constant }, + { _3DSTATE_PS, handle_3dstate_ps }, + + { _3DSTATE_BINDING_TABLE_POINTERS_VS, handle_3dstate_binding_table_pointers }, + { _3DSTATE_BINDING_TABLE_POINTERS_HS, handle_3dstate_binding_table_pointers }, + { _3DSTATE_BINDING_TABLE_POINTERS_DS, handle_3dstate_binding_table_pointers }, + { _3DSTATE_BINDING_TABLE_POINTERS_GS, handle_3dstate_binding_table_pointers }, + { _3DSTATE_BINDING_TABLE_POINTERS_PS, handle_3dstate_binding_table_pointers }, + + { _3DSTATE_SAMPLER_STATE_POINTERS_VS, handle_3dstate_sampler_state_pointers }, + { _3DSTATE_SAMPLER_STATE_POINTERS_GS, handle_3dstate_sampler_state_pointers }, + { _3DSTATE_SAMPLER_STATE_POINTERS_PS, handle_3dstate_sampler_state_pointers }, + + { _3DSTATE_VIEWPORT_STATE_POINTERS_CC, handle_3dstate_viewport_state_pointers_cc }, + { _3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP, handle_3dstate_viewport_state_pointers_sf_clip }, + { _3DSTATE_BLEND_STATE_POINTERS, handle_3dstate_blend_state_pointers }, + { _3DSTATE_CC_STATE_POINTERS, handle_3dstate_cc_state_pointers }, + { _3DSTATE_SCISSOR_STATE_POINTERS, handle_3dstate_scissor_state_pointers }, + { _MI_LOAD_REGISTER_IMM, handle_load_register_imm } +}; + +static void +parse_commands(struct gen_spec *spec, uint32_t *cmds, int size, int engine) +{ + uint32_t *p, *end = cmds + size / 4; + unsigned int length, i; + struct gen_group *inst; + + for (p = cmds; p < end; p += length) { + inst = gen_spec_find_instruction(spec, p); + if (inst == NULL) { + printf("unknown instruction %08x\n", p[0]); + length = (p[0] & 0xff) + 2; + continue; + } + length = gen_group_get_length(inst, p); + + const char *color, *reset_color = NORMAL; + uint64_t offset; + + if (option_full_decode) { + if ((p[0] & 0xffff0000) == AUB_MI_BATCH_BUFFER_START || + (p[0] & 0xffff0000) == AUB_MI_BATCH_BUFFER_END) + color = GREEN_HEADER; + else + color = BLUE_HEADER; + } else + color = NORMAL; + + if (option_color == COLOR_NEVER) { + color = ""; + reset_color = ""; + } + + if (option_print_offsets) + offset = (void *) p - gtt; + else + offset = 0; + + printf("%s0x%08"PRIx64": 0x%08x: %-80s%s\n", + color, offset, p[0], + gen_group_get_name(inst), reset_color); + + if (option_full_decode) { + struct gen_field_iterator iter; + char *token = NULL; + int idx = 0, dword_num = 0; + gen_field_iterator_init(&iter, inst, p, + option_color == COLOR_ALWAYS); + while (gen_field_iterator_next(&iter)) { + idx = 0; + print_dword_val(&iter, offset, &dword_num); + if (dword_num > 0) + token = print_iterator_values(&iter, &idx); + if (token != NULL) { + printf("0x%08"PRIx64": 0x%08x : Dword %d\n", + offset + 4 * idx, p[idx], idx); + handle_struct_decode(spec,token, &p[idx]); + token = NULL; + } + } + + for (i = 0; i < ARRAY_LENGTH(custom_handlers); i++) { + if (gen_group_get_opcode(inst) == + custom_handlers[i].opcode) + custom_handlers[i].handle(spec, p); + } + } + + if ((p[0] & 0xffff0000) == AUB_MI_BATCH_BUFFER_START) { + uint64_t start = get_address(spec, &p[1]); + + if (p[0] & (1 << 22)) { + /* MI_BATCH_BUFFER_START with "2nd Level Batch Buffer" set acts + * like a subroutine call. Commands that come afterwards get + * processed once the 2nd level batch buffer returns with + * MI_BATCH_BUFFER_END. + */ + parse_commands(spec, gtt + start, gtt_end - start, engine); + } else { + /* MI_BATCH_BUFFER_START with "2nd Level Batch Buffer" unset acts + * like a goto. Nothing after it will ever get processed. In + * order to prevent the recursion from growing, we just reset the + * loop and continue; + */ + p = gtt + start; + /* We don't know where secondaries end so use the GTT end */ + end = gtt + gtt_end; + length = 0; + continue; + } + } else if ((p[0] & 0xffff0000) == AUB_MI_BATCH_BUFFER_END) { + break; + } + } +} + +#define GEN_ENGINE_RENDER 1 +#define GEN_ENGINE_BLITTER 2 + +static void +handle_trace_block(uint32_t *p) +{ + int operation = p[1] & AUB_TRACE_OPERATION_MASK; + int type = p[1] & AUB_TRACE_TYPE_MASK; + int address_space = p[1] & AUB_TRACE_ADDRESS_SPACE_MASK; + uint64_t offset = p[3]; + uint32_t size = p[4]; + int header_length = p[0] & 0xffff; + uint32_t *data = p + header_length + 2; + int engine = GEN_ENGINE_RENDER; + + if (gen_spec_get_gen(spec) >= gen_make_gen(8,0)) + offset += (uint64_t) p[5] << 32; + + switch (operation) { + case AUB_TRACE_OP_DATA_WRITE: + if (address_space != AUB_TRACE_MEMTYPE_GTT) + break; + if (gtt_size < offset + size) { + fprintf(stderr, "overflow gtt space: %s\n", strerror(errno)); + exit(EXIT_FAILURE); + } + memcpy((char *) gtt + offset, data, size); + if (gtt_end < offset + size) + gtt_end = offset + size; + break; + case AUB_TRACE_OP_COMMAND_WRITE: + switch (type) { + case AUB_TRACE_TYPE_RING_PRB0: + engine = GEN_ENGINE_RENDER; + break; + case AUB_TRACE_TYPE_RING_PRB2: + engine = GEN_ENGINE_BLITTER; + break; + default: + printf("command write to unknown ring %d\n", type); + break; + } + + parse_commands(spec, data, size, engine); + gtt_end = 0; + break; + } +} + +static void +handle_trace_header(uint32_t *p) +{ + /* The intel_aubdump tool from IGT is kind enough to put a PCI-ID= tag in + * the AUB header comment. If the user hasn't specified a hardware + * generation, try to use the one from the AUB file. + */ + uint32_t *end = p + (p[0] & 0xffff) + 2; + int aub_pci_id = 0; + if (end > &p[12] && p[12] > 0) + sscanf((char *)&p[13], "PCI-ID=%i", &aub_pci_id); + + if (pci_id == 0) + pci_id = aub_pci_id; + + struct gen_device_info devinfo; + if (!gen_get_device_info(pci_id, &devinfo)) { + fprintf(stderr, "can't find device information: pci_id=0x%x\n", pci_id); + exit(EXIT_FAILURE); + } + + if (xml_path == NULL) + spec = gen_spec_load(&devinfo); + else + spec = gen_spec_load_from_path(&devinfo, xml_path); + disasm = gen_disasm_create(pci_id); + + if (spec == NULL || disasm == NULL) + exit(EXIT_FAILURE); + + printf("%sAubinator: Intel AUB file decoder.%-80s%s\n", + GREEN_HEADER, "", NORMAL); + + if (input_file) + printf("File name: %s\n", input_file); + + if (aub_pci_id) + printf("PCI ID: 0x%x\n", aub_pci_id); + + char app_name[33]; + strncpy(app_name, (char *)&p[2], 32); + app_name[32] = 0; + printf("Application name: %s\n", app_name); + + printf("Decoding as: %s\n", gen_get_device_name(pci_id)); + + /* Throw in a new line before the first batch */ + printf("\n"); +} + +struct aub_file { + FILE *stream; + + uint32_t *map, *end, *cursor; + uint32_t *mem_end; +}; + +static struct aub_file * +aub_file_open(const char *filename) +{ + struct aub_file *file; + struct stat sb; + int fd; + + file = calloc(1, sizeof *file); + fd = open(filename, O_RDONLY); + if (fd == -1) { + fprintf(stderr, "open %s failed: %s\n", filename, strerror(errno)); + exit(EXIT_FAILURE); + } + + if (fstat(fd, &sb) == -1) { + fprintf(stderr, "stat failed: %s\n", strerror(errno)); + exit(EXIT_FAILURE); + } + + file->map = mmap(NULL, sb.st_size, + PROT_READ, MAP_SHARED, fd, 0); + if (file->map == MAP_FAILED) { + fprintf(stderr, "mmap failed: %s\n", strerror(errno)); + exit(EXIT_FAILURE); + } + + file->cursor = file->map; + file->end = file->map + sb.st_size / 4; + + return file; +} + +static struct aub_file * +aub_file_stdin(void) +{ + struct aub_file *file; + + file = calloc(1, sizeof *file); + file->stream = stdin; + + return file; +} + +#define TYPE(dw) (((dw) >> 29) & 7) +#define OPCODE(dw) (((dw) >> 23) & 0x3f) +#define SUBOPCODE(dw) (((dw) >> 16) & 0x7f) + +#define MAKE_HEADER(type, opcode, subopcode) \ + (((type) << 29) | ((opcode) << 23) | ((subopcode) << 16)) + +#define TYPE_AUB 0x7 + +/* Classic AUB opcodes */ +#define OPCODE_AUB 0x01 +#define SUBOPCODE_HEADER 0x05 +#define SUBOPCODE_BLOCK 0x41 +#define SUBOPCODE_BMP 0x1e + +/* Newer version AUB opcode */ +#define OPCODE_NEW_AUB 0x2e +#define SUBOPCODE_VERSION 0x00 +#define SUBOPCODE_REG_WRITE 0x03 +#define SUBOPCODE_MEM_POLL 0x05 +#define SUBOPCODE_MEM_WRITE 0x06 + +#define MAKE_GEN(major, minor) ( ((major) << 8) | (minor) ) + +struct { + const char *name; + uint32_t gen; +} device_map[] = { + { "bwr", MAKE_GEN(4, 0) }, + { "cln", MAKE_GEN(4, 0) }, + { "blc", MAKE_GEN(4, 0) }, + { "ctg", MAKE_GEN(4, 0) }, + { "el", MAKE_GEN(4, 0) }, + { "il", MAKE_GEN(4, 0) }, + { "sbr", MAKE_GEN(6, 0) }, + { "ivb", MAKE_GEN(7, 0) }, + { "lrb2", MAKE_GEN(0, 0) }, + { "hsw", MAKE_GEN(7, 5) }, + { "vlv", MAKE_GEN(7, 0) }, + { "bdw", MAKE_GEN(8, 0) }, + { "skl", MAKE_GEN(9, 0) }, + { "chv", MAKE_GEN(8, 0) }, + { "bxt", MAKE_GEN(9, 0) } +}; + +enum { + AUB_ITEM_DECODE_OK, + AUB_ITEM_DECODE_FAILED, + AUB_ITEM_DECODE_NEED_MORE_DATA, +}; + +static int +aub_file_decode_batch(struct aub_file *file) +{ + uint32_t *p, h, device, data_type, *new_cursor; + int header_length, bias; + + if (file->end - file->cursor < 1) + return AUB_ITEM_DECODE_NEED_MORE_DATA; + + p = file->cursor; + h = *p; + header_length = h & 0xffff; + + switch (OPCODE(h)) { + case OPCODE_AUB: + bias = 2; + break; + case OPCODE_NEW_AUB: + bias = 1; + break; + default: + printf("unknown opcode %d at %td/%td\n", + OPCODE(h), file->cursor - file->map, + file->end - file->map); + return AUB_ITEM_DECODE_FAILED; + } + + new_cursor = p + header_length + bias; + if ((h & 0xffff0000) == MAKE_HEADER(TYPE_AUB, OPCODE_AUB, SUBOPCODE_BLOCK)) { + if (file->end - file->cursor < 4) + return AUB_ITEM_DECODE_NEED_MORE_DATA; + new_cursor += p[4] / 4; + } + + if (new_cursor > file->end) + return AUB_ITEM_DECODE_NEED_MORE_DATA; + + switch (h & 0xffff0000) { + case MAKE_HEADER(TYPE_AUB, OPCODE_AUB, SUBOPCODE_HEADER): + handle_trace_header(p); + break; + case MAKE_HEADER(TYPE_AUB, OPCODE_AUB, SUBOPCODE_BLOCK): + handle_trace_block(p); + break; + case MAKE_HEADER(TYPE_AUB, OPCODE_AUB, SUBOPCODE_BMP): + break; + case MAKE_HEADER(TYPE_AUB, OPCODE_NEW_AUB, SUBOPCODE_VERSION): + printf("version block: dw1 %08x\n", p[1]); + device = (p[1] >> 8) & 0xff; + printf(" device %s\n", device_map[device].name); + break; + case MAKE_HEADER(TYPE_AUB, OPCODE_NEW_AUB, SUBOPCODE_REG_WRITE): + printf("register write block: (dwords %d)\n", h & 0xffff); + printf(" reg 0x%x, data 0x%x\n", p[1], p[5]); + break; + case MAKE_HEADER(TYPE_AUB, OPCODE_NEW_AUB, SUBOPCODE_MEM_WRITE): + printf("memory write block (dwords %d):\n", h & 0xffff); + printf(" address 0x%"PRIx64"\n", *(uint64_t *) &p[1]); + data_type = (p[3] >> 20) & 0xff; + if (data_type != 0) + printf(" data type 0x%x\n", data_type); + printf(" address space 0x%x\n", (p[3] >> 28) & 0xf); + break; + case MAKE_HEADER(TYPE_AUB, OPCODE_NEW_AUB, SUBOPCODE_MEM_POLL): + printf("memory poll block (dwords %d):\n", h & 0xffff); + break; + default: + printf("unknown block type=0x%x, opcode=0x%x, " + "subopcode=0x%x (%08x)\n", TYPE(h), OPCODE(h), SUBOPCODE(h), h); + break; + } + file->cursor = new_cursor; + + return AUB_ITEM_DECODE_OK; +} + +static int +aub_file_more_stuff(struct aub_file *file) +{ + return file->cursor < file->end || (file->stream && !feof(file->stream)); +} + +#define AUB_READ_BUFFER_SIZE (4096) +#define MAX(a, b) ((a) < (b) ? (b) : (a)) + +static void +aub_file_data_grow(struct aub_file *file) +{ + size_t old_size = (file->mem_end - file->map) * 4; + size_t new_size = MAX(old_size * 2, AUB_READ_BUFFER_SIZE); + uint32_t *new_start = realloc(file->map, new_size); + + file->cursor = new_start + (file->cursor - file->map); + file->end = new_start + (file->end - file->map); + file->map = new_start; + file->mem_end = file->map + (new_size / 4); +} + +static bool +aub_file_data_load(struct aub_file *file) +{ + size_t r; + + if (file->stream == NULL) + return false; + + /* First remove any consumed data */ + if (file->cursor > file->map) { + memmove(file->map, file->cursor, + (file->end - file->cursor) * 4); + file->end -= file->cursor - file->map; + file->cursor = file->map; + } + + /* Then load some new data in */ + if ((file->mem_end - file->end) < (AUB_READ_BUFFER_SIZE / 4)) + aub_file_data_grow(file); + + r = fread(file->end, 1, (file->mem_end - file->end) * 4, file->stream); + file->end += r / 4; + + return r != 0; +} + +static void +setup_pager(void) +{ + int fds[2]; + pid_t pid; + + if (!isatty(1)) + return; + + if (pipe(fds) == -1) + return; + + pid = fork(); + if (pid == -1) + return; + + if (pid == 0) { + close(fds[1]); + dup2(fds[0], 0); + execlp("less", "less", "-FRSi", NULL); + } + + close(fds[0]); + dup2(fds[1], 1); + close(fds[1]); +} + +static void +print_help(const char *progname, FILE *file) +{ + fprintf(file, + "Usage: %s [OPTION]... [FILE]\n" + "Decode aub file contents from either FILE or the standard input.\n\n" + "A valid --gen option must be provided.\n\n" + " --help display this help and exit\n" + " --gen=platform decode for given platform (ivb, byt, hsw, bdw, chv, skl, kbl or bxt)\n" + " --headers decode only command headers\n" + " --color[=WHEN] colorize the output; WHEN can be 'auto' (default\n" + " if omitted), 'always', or 'never'\n" + " --no-pager don't launch pager\n" + " --no-offsets don't print instruction offsets\n" + " --xml=DIR load hardware xml description from directory DIR\n", + progname); +} + +int main(int argc, char *argv[]) +{ + struct aub_file *file; + int c, i; + bool help = false, pager = true; + const struct { + const char *name; + int pci_id; + } gens[] = { + { "ivb", 0x0166 }, /* Intel(R) Ivybridge Mobile GT2 */ + { "hsw", 0x0416 }, /* Intel(R) Haswell Mobile GT2 */ + { "byt", 0x0155 }, /* Intel(R) Bay Trail */ + { "bdw", 0x1616 }, /* Intel(R) HD Graphics 5500 (Broadwell GT2) */ + { "chv", 0x22B3 }, /* Intel(R) HD Graphics (Cherryview) */ + { "skl", 0x1912 }, /* Intel(R) HD Graphics 530 (Skylake GT2) */ + { "kbl", 0x591D }, /* Intel(R) Kabylake GT2 */ + { "bxt", 0x0A84 } /* Intel(R) HD Graphics (Broxton) */ + }; + const struct option aubinator_opts[] = { + { "help", no_argument, (int *) &help, true }, + { "no-pager", no_argument, (int *) &pager, false }, + { "no-offsets", no_argument, (int *) &option_print_offsets, false }, + { "gen", required_argument, NULL, 'g' }, + { "headers", no_argument, (int *) &option_full_decode, false }, + { "color", required_argument, NULL, 'c' }, + { "xml", required_argument, NULL, 'x' }, + { NULL, 0, NULL, 0 } + }; + + i = 0; + while ((c = getopt_long(argc, argv, "", aubinator_opts, &i)) != -1) { + switch (c) { + case 'g': + for (i = 0; i < ARRAY_SIZE(gens); i++) { + if (!strcmp(optarg, gens[i].name)) { + pci_id = gens[i].pci_id; + break; + } + } + if (i == ARRAY_SIZE(gens)) { + fprintf(stderr, "can't parse gen: '%s', expected ivb, byt, hsw, " + "bdw, chv, skl, kbl or bxt\n", optarg); + exit(EXIT_FAILURE); + } + break; + case 'c': + if (optarg == NULL || strcmp(optarg, "always") == 0) + option_color = COLOR_ALWAYS; + else if (strcmp(optarg, "never") == 0) + option_color = COLOR_NEVER; + else if (strcmp(optarg, "auto") == 0) + option_color = COLOR_AUTO; + else { + fprintf(stderr, "invalid value for --color: %s", optarg); + exit(EXIT_FAILURE); + } + break; + case 'x': + xml_path = strdup(optarg); + break; + default: + break; + } + } + + if (help || argc == 1) { + print_help(argv[0], stderr); + exit(0); + } + + if (optind < argc) + input_file = argv[optind]; + + /* Do this before we redirect stdout to pager. */ + if (option_color == COLOR_AUTO) + option_color = isatty(1) ? COLOR_ALWAYS : COLOR_NEVER; + + if (isatty(1) && pager) + setup_pager(); + + if (input_file == NULL) + file = aub_file_stdin(); + else + file = aub_file_open(input_file); + + /* mmap a terabyte for our gtt space. */ + gtt_size = 1ull << 40; + gtt = mmap(NULL, gtt_size, PROT_READ | PROT_WRITE, + MAP_PRIVATE | MAP_ANONYMOUS | MAP_NORESERVE, -1, 0); + if (gtt == MAP_FAILED) { + fprintf(stderr, "failed to alloc gtt space: %s\n", strerror(errno)); + exit(EXIT_FAILURE); + } + + while (aub_file_more_stuff(file)) { + switch (aub_file_decode_batch(file)) { + case AUB_ITEM_DECODE_OK: + break; + case AUB_ITEM_DECODE_NEED_MORE_DATA: + if (!file->stream) { + file->cursor = file->end; + break; + } + if (aub_file_more_stuff(file) && !aub_file_data_load(file)) { + fprintf(stderr, "failed to load data from stdin\n"); + exit(EXIT_FAILURE); + } + break; + default: + fprintf(stderr, "failed to parse aubdump data\n"); + exit(EXIT_FAILURE); + } + } + + + fflush(stdout); + /* close the stdout which is opened to write the output */ + close(1); + free(xml_path); + + wait(NULL); + + return EXIT_SUCCESS; +} diff -Nru mesa-12.0.6/src/intel/tools/decoder.c mesa-17.0.7/src/intel/tools/decoder.c --- mesa-12.0.6/src/intel/tools/decoder.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/tools/decoder.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,768 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "decoder.h" + +#include "genxml/gen6_xml.h" +#include "genxml/gen7_xml.h" +#include "genxml/gen75_xml.h" +#include "genxml/gen8_xml.h" +#include "genxml/gen9_xml.h" + +#define XML_BUFFER_SIZE 4096 + +#define MAKE_GEN(major, minor) ( ((major) << 8) | (minor) ) + +struct gen_spec { + uint32_t gen; + + int ncommands; + struct gen_group *commands[256]; + int nstructs; + struct gen_group *structs[256]; + int nregisters; + struct gen_group *registers[256]; + int nenums; + struct gen_enum *enums[256]; +}; + +struct location { + const char *filename; + int line_number; +}; + +struct parser_context { + XML_Parser parser; + int foo; + struct location loc; + const char *platform; + + struct gen_group *group; + struct gen_enum *enoom; + + int nfields; + struct gen_field *fields[128]; + + int nvalues; + struct gen_value *values[256]; + + struct gen_spec *spec; +}; + +const char * +gen_group_get_name(struct gen_group *group) +{ + return group->name; +} + +uint32_t +gen_group_get_opcode(struct gen_group *group) +{ + return group->opcode; +} + +struct gen_group * +gen_spec_find_struct(struct gen_spec *spec, const char *name) +{ + for (int i = 0; i < spec->nstructs; i++) + if (strcmp(spec->structs[i]->name, name) == 0) + return spec->structs[i]; + + return NULL; +} + +struct gen_group * +gen_spec_find_register(struct gen_spec *spec, uint32_t offset) +{ + for (int i = 0; i < spec->nregisters; i++) + if (spec->registers[i]->register_offset == offset) + return spec->registers[i]; + + return NULL; +} + +struct gen_enum * +gen_spec_find_enum(struct gen_spec *spec, const char *name) +{ + for (int i = 0; i < spec->nenums; i++) + if (strcmp(spec->enums[i]->name, name) == 0) + return spec->enums[i]; + + return NULL; +} + +uint32_t +gen_spec_get_gen(struct gen_spec *spec) +{ + return spec->gen; +} + +static void __attribute__((noreturn)) +fail(struct location *loc, const char *msg, ...) +{ + va_list ap; + + va_start(ap, msg); + fprintf(stderr, "%s:%d: error: ", + loc->filename, loc->line_number); + vfprintf(stderr, msg, ap); + fprintf(stderr, "\n"); + va_end(ap); + exit(EXIT_FAILURE); +} + +static void * +fail_on_null(void *p) +{ + if (p == NULL) { + fprintf(stderr, "aubinator: out of memory\n"); + exit(EXIT_FAILURE); + } + + return p; +} + +static char * +xstrdup(const char *s) +{ + return fail_on_null(strdup(s)); +} + +static void * +zalloc(size_t s) +{ + return calloc(s, 1); +} + +static void * +xzalloc(size_t s) +{ + return fail_on_null(zalloc(s)); +} + +static struct gen_group * +create_group(struct parser_context *ctx, const char *name, const char **atts) +{ + struct gen_group *group; + + group = xzalloc(sizeof(*group)); + if (name) + group->name = xstrdup(name); + + group->group_offset = 0; + group->group_count = 0; + + return group; +} + +static struct gen_enum * +create_enum(struct parser_context *ctx, const char *name, const char **atts) +{ + struct gen_enum *e; + + e = xzalloc(sizeof(*e)); + if (name) + e->name = xstrdup(name); + + e->nvalues = 0; + + return e; +} + +static void +get_group_offset_count(struct parser_context *ctx, const char *name, + const char **atts, uint32_t *offset, uint32_t *count) +{ + char *p; + int i; + + for (i = 0; atts[i]; i += 2) { + if (strcmp(atts[i], "count") == 0) + *count = strtoul(atts[i + 1], &p, 0); + else if (strcmp(atts[i], "start") == 0) + *offset = strtoul(atts[i + 1], &p, 0); + } + return; +} + +static void +get_register_offset(const char **atts, uint32_t *offset) +{ + char *p; + int i; + + for (i = 0; atts[i]; i += 2) { + if (strcmp(atts[i], "num") == 0) + *offset = strtoul(atts[i + 1], &p, 0); + } + return; +} + +static void +get_start_end_pos(int *start, int *end) +{ + /* start value has to be mod with 32 as we need the relative + * start position in the first DWord. For the end position, add + * the length of the field to the start position to get the + * relative postion in the 64 bit address. + */ + if (*end - *start > 32) { + int len = *end - *start; + *start = *start % 32; + *end = *start + len; + } else { + *start = *start % 32; + *end = *end % 32; + } + + return; +} + +static inline uint64_t +mask(int start, int end) +{ + uint64_t v; + + v = ~0ULL >> (63 - end + start); + + return v << start; +} + +static inline uint64_t +field(uint64_t value, int start, int end) +{ + get_start_end_pos(&start, &end); + return (value & mask(start, end)) >> (start); +} + +static inline uint64_t +field_address(uint64_t value, int start, int end) +{ + /* no need to right shift for address/offset */ + get_start_end_pos(&start, &end); + return (value & mask(start, end)); +} + +static struct gen_type +string_to_type(struct parser_context *ctx, const char *s) +{ + int i, f; + struct gen_group *g; + struct gen_enum *e; + + if (strcmp(s, "int") == 0) + return (struct gen_type) { .kind = GEN_TYPE_INT }; + else if (strcmp(s, "uint") == 0) + return (struct gen_type) { .kind = GEN_TYPE_UINT }; + else if (strcmp(s, "bool") == 0) + return (struct gen_type) { .kind = GEN_TYPE_BOOL }; + else if (strcmp(s, "float") == 0) + return (struct gen_type) { .kind = GEN_TYPE_FLOAT }; + else if (strcmp(s, "address") == 0) + return (struct gen_type) { .kind = GEN_TYPE_ADDRESS }; + else if (strcmp(s, "offset") == 0) + return (struct gen_type) { .kind = GEN_TYPE_OFFSET }; + else if (sscanf(s, "u%d.%d", &i, &f) == 2) + return (struct gen_type) { .kind = GEN_TYPE_UFIXED, .i = i, .f = f }; + else if (sscanf(s, "s%d.%d", &i, &f) == 2) + return (struct gen_type) { .kind = GEN_TYPE_SFIXED, .i = i, .f = f }; + else if (g = gen_spec_find_struct(ctx->spec, s), g != NULL) + return (struct gen_type) { .kind = GEN_TYPE_STRUCT, .gen_struct = g }; + else if (e = gen_spec_find_enum(ctx->spec, s), e != NULL) + return (struct gen_type) { .kind = GEN_TYPE_ENUM, .gen_enum = e }; + else if (strcmp(s, "mbo") == 0) + return (struct gen_type) { .kind = GEN_TYPE_MBO }; + else + fail(&ctx->loc, "invalid type: %s", s); +} + +static struct gen_field * +create_field(struct parser_context *ctx, const char **atts) +{ + struct gen_field *field; + char *p; + int i; + + field = xzalloc(sizeof(*field)); + + for (i = 0; atts[i]; i += 2) { + if (strcmp(atts[i], "name") == 0) + field->name = xstrdup(atts[i + 1]); + else if (strcmp(atts[i], "start") == 0) + field->start = ctx->group->group_offset+strtoul(atts[i + 1], &p, 0); + else if (strcmp(atts[i], "end") == 0) { + field->end = ctx->group->group_offset+strtoul(atts[i + 1], &p, 0); + if (ctx->group->group_offset) + ctx->group->group_offset = field->end+1; + } else if (strcmp(atts[i], "type") == 0) + field->type = string_to_type(ctx, atts[i + 1]); + else if (strcmp(atts[i], "default") == 0 && + field->start >= 16 && field->end <= 31) { + field->has_default = true; + field->default_value = strtoul(atts[i + 1], &p, 0); + } + } + + return field; +} + +static struct gen_value * +create_value(struct parser_context *ctx, const char **atts) +{ + struct gen_value *value = xzalloc(sizeof(*value)); + + for (int i = 0; atts[i]; i += 2) { + if (strcmp(atts[i], "name") == 0) + value->name = xstrdup(atts[i + 1]); + else if (strcmp(atts[i], "value") == 0) + value->value = strtoul(atts[i + 1], NULL, 0); + } + + return value; +} + +static void +start_element(void *data, const char *element_name, const char **atts) +{ + struct parser_context *ctx = data; + int i; + const char *name = NULL; + const char *gen = NULL; + + ctx->loc.line_number = XML_GetCurrentLineNumber(ctx->parser); + + for (i = 0; atts[i]; i += 2) { + if (strcmp(atts[i], "name") == 0) + name = atts[i + 1]; + else if (strcmp(atts[i], "gen") == 0) + gen = atts[i + 1]; + } + + if (strcmp(element_name, "genxml") == 0) { + if (name == NULL) + fail(&ctx->loc, "no platform name given"); + if (gen == NULL) + fail(&ctx->loc, "no gen given"); + + ctx->platform = xstrdup(name); + int major, minor; + int n = sscanf(gen, "%d.%d", &major, &minor); + if (n == 0) + fail(&ctx->loc, "invalid gen given: %s", gen); + if (n == 1) + minor = 0; + + ctx->spec->gen = MAKE_GEN(major, minor); + } else if (strcmp(element_name, "instruction") == 0 || + strcmp(element_name, "struct") == 0) { + ctx->group = create_group(ctx, name, atts); + } else if (strcmp(element_name, "register") == 0) { + ctx->group = create_group(ctx, name, atts); + get_register_offset(atts, &ctx->group->register_offset); + } else if (strcmp(element_name, "group") == 0) { + get_group_offset_count(ctx, name, atts, &ctx->group->group_offset, + &ctx->group->group_count); + } else if (strcmp(element_name, "field") == 0) { + do { + ctx->fields[ctx->nfields++] = create_field(ctx, atts); + if (ctx->group->group_count) + ctx->group->group_count--; + } while (ctx->group->group_count > 0); + } else if (strcmp(element_name, "enum") == 0) { + ctx->enoom = create_enum(ctx, name, atts); + } else if (strcmp(element_name, "value") == 0) { + ctx->values[ctx->nvalues++] = create_value(ctx, atts); + } +} + +static void +end_element(void *data, const char *name) +{ + struct parser_context *ctx = data; + struct gen_spec *spec = ctx->spec; + + if (strcmp(name, "instruction") == 0 || + strcmp(name, "struct") == 0 || + strcmp(name, "register") == 0) { + size_t size = ctx->nfields * sizeof(ctx->fields[0]); + struct gen_group *group = ctx->group; + + group->fields = xzalloc(size); + group->nfields = ctx->nfields; + memcpy(group->fields, ctx->fields, size); + ctx->nfields = 0; + ctx->group = NULL; + + for (int i = 0; i < group->nfields; i++) { + if (group->fields[i]->start >= 16 && + group->fields[i]->end <= 31 && + group->fields[i]->has_default) { + group->opcode_mask |= + mask(group->fields[i]->start % 32, group->fields[i]->end % 32); + group->opcode |= + group->fields[i]->default_value << group->fields[i]->start; + } + } + + if (strcmp(name, "instruction") == 0) + spec->commands[spec->ncommands++] = group; + else if (strcmp(name, "struct") == 0) + spec->structs[spec->nstructs++] = group; + else if (strcmp(name, "register") == 0) + spec->registers[spec->nregisters++] = group; + } else if (strcmp(name, "group") == 0) { + ctx->group->group_offset = 0; + ctx->group->group_count = 0; + } else if (strcmp(name, "field") == 0) { + assert(ctx->nfields > 0); + struct gen_field *field = ctx->fields[ctx->nfields - 1]; + size_t size = ctx->nvalues * sizeof(ctx->values[0]); + field->inline_enum.values = xzalloc(size); + field->inline_enum.nvalues = ctx->nvalues; + memcpy(field->inline_enum.values, ctx->values, size); + ctx->nvalues = 0; + } else if (strcmp(name, "enum") == 0) { + struct gen_enum *e = ctx->enoom; + size_t size = ctx->nvalues * sizeof(ctx->values[0]); + e->values = xzalloc(size); + e->nvalues = ctx->nvalues; + memcpy(e->values, ctx->values, size); + ctx->nvalues = 0; + ctx->enoom = NULL; + spec->enums[spec->nenums++] = e; + } +} + +static void +character_data(void *data, const XML_Char *s, int len) +{ +} + +static int +devinfo_to_gen(const struct gen_device_info *devinfo) +{ + int value = 10 * devinfo->gen; + + if (devinfo->is_baytrail || devinfo->is_haswell) + value += 5; + + return value; +} + +static const struct { + int gen; + const uint8_t *data; + size_t data_length; +} gen_data[] = { + { .gen = 60, .data = gen6_xml, .data_length = sizeof(gen6_xml) }, + { .gen = 70, .data = gen7_xml, .data_length = sizeof(gen7_xml) }, + { .gen = 75, .data = gen75_xml, .data_length = sizeof(gen75_xml) }, + { .gen = 80, .data = gen8_xml, .data_length = sizeof(gen8_xml) }, + { .gen = 90, .data = gen9_xml, .data_length = sizeof(gen9_xml) } +}; + +static const uint8_t * +devinfo_to_xml_data(const struct gen_device_info *devinfo, + uint32_t *data_length) +{ + int i, gen = devinfo_to_gen(devinfo); + + for (i = 0; i < ARRAY_SIZE(gen_data); i++) { + if (gen_data[i].gen == gen) { + *data_length = gen_data[i].data_length; + return gen_data[i].data; + } + } + + unreachable("Unknown generation"); + return NULL; +} + +struct gen_spec * +gen_spec_load(const struct gen_device_info *devinfo) +{ + struct parser_context ctx; + void *buf; + const void *data; + uint32_t data_length = 0; + + memset(&ctx, 0, sizeof ctx); + ctx.parser = XML_ParserCreate(NULL); + XML_SetUserData(ctx.parser, &ctx); + if (ctx.parser == NULL) { + fprintf(stderr, "failed to create parser\n"); + return NULL; + } + + XML_SetElementHandler(ctx.parser, start_element, end_element); + XML_SetCharacterDataHandler(ctx.parser, character_data); + + ctx.spec = xzalloc(sizeof(*ctx.spec)); + + data = devinfo_to_xml_data(devinfo, &data_length); + buf = XML_GetBuffer(ctx.parser, data_length); + + memcpy(buf, data, data_length); + + if (XML_ParseBuffer(ctx.parser, data_length, true) == 0) { + fprintf(stderr, + "Error parsing XML at line %ld col %ld: %s\n", + XML_GetCurrentLineNumber(ctx.parser), + XML_GetCurrentColumnNumber(ctx.parser), + XML_ErrorString(XML_GetErrorCode(ctx.parser))); + XML_ParserFree(ctx.parser); + return NULL; + } + + XML_ParserFree(ctx.parser); + + return ctx.spec; +} + +struct gen_spec * +gen_spec_load_from_path(const struct gen_device_info *devinfo, + const char *path) +{ + struct parser_context ctx; + size_t len, filename_len = strlen(path) + 20; + char *filename = malloc(filename_len); + void *buf; + FILE *input; + + len = snprintf(filename, filename_len, "%s/gen%i.xml", + path, devinfo_to_gen(devinfo)); + assert(len < filename_len); + + input = fopen(filename, "r"); + if (input == NULL) { + fprintf(stderr, "failed to open xml description\n"); + free(filename); + return NULL; + } + + memset(&ctx, 0, sizeof ctx); + ctx.parser = XML_ParserCreate(NULL); + XML_SetUserData(ctx.parser, &ctx); + if (ctx.parser == NULL) { + fprintf(stderr, "failed to create parser\n"); + fclose(input); + free(filename); + return NULL; + } + + XML_SetElementHandler(ctx.parser, start_element, end_element); + XML_SetCharacterDataHandler(ctx.parser, character_data); + ctx.loc.filename = filename; + ctx.spec = xzalloc(sizeof(*ctx.spec)); + + do { + buf = XML_GetBuffer(ctx.parser, XML_BUFFER_SIZE); + len = fread(buf, 1, XML_BUFFER_SIZE, input); + if (len < 0) { + fprintf(stderr, "fread: %m\n"); + fclose(input); + free(filename); + return NULL; + } + if (XML_ParseBuffer(ctx.parser, len, len == 0) == 0) { + fprintf(stderr, + "Error parsing XML at line %ld col %ld: %s\n", + XML_GetCurrentLineNumber(ctx.parser), + XML_GetCurrentColumnNumber(ctx.parser), + XML_ErrorString(XML_GetErrorCode(ctx.parser))); + fclose(input); + free(filename); + return NULL; + } + } while (len > 0); + + XML_ParserFree(ctx.parser); + + fclose(input); + free(filename); + + return ctx.spec; +} + +struct gen_group * +gen_spec_find_instruction(struct gen_spec *spec, const uint32_t *p) +{ + for (int i = 0; i < spec->ncommands; i++) { + uint32_t opcode = *p & spec->commands[i]->opcode_mask; + if (opcode == spec->commands[i]->opcode) + return spec->commands[i]; + } + + return NULL; +} + +int +gen_group_get_length(struct gen_group *group, const uint32_t *p) +{ + uint32_t h = p[0]; + uint32_t type = field(h, 29, 31); + + switch (type) { + case 0: /* MI */ { + uint32_t opcode = field(h, 23, 28); + if (opcode < 16) + return 1; + else + return field(h, 0, 7) + 2; + break; + } + + case 3: /* Render */ { + uint32_t subtype = field(h, 27, 28); + switch (subtype) { + case 0: + return field(h, 0, 7) + 2; + case 1: + return 1; + case 2: + return 2; + case 3: + return field(h, 0, 7) + 2; + } + } + } + + unreachable("bad opcode"); +} + +void +gen_field_iterator_init(struct gen_field_iterator *iter, + struct gen_group *group, + const uint32_t *p, + bool print_colors) +{ + iter->group = group; + iter->p = p; + iter->i = 0; + iter->print_colors = print_colors; +} + +static void +gen_enum_write_value(char *str, size_t max_length, + struct gen_enum *e, uint64_t value) +{ + for (int i = 0; i < e->nvalues; i++) { + if (e->values[i]->value == value) { + strncpy(str, e->values[i]->name, max_length); + return; + } + } +} + +bool +gen_field_iterator_next(struct gen_field_iterator *iter) +{ + struct gen_field *f; + union { + uint64_t qw; + float f; + } v; + + if (iter->i == iter->group->nfields) + return false; + + f = iter->group->fields[iter->i++]; + iter->name = f->name; + int index = f->start / 32; + + if ((f->end - f->start) > 32) + v.qw = ((uint64_t) iter->p[index+1] << 32) | iter->p[index]; + else + v.qw = iter->p[index]; + + iter->description[0] = '\0'; + + switch (f->type.kind) { + case GEN_TYPE_UNKNOWN: + case GEN_TYPE_INT: { + uint64_t value = field(v.qw, f->start, f->end); + snprintf(iter->value, sizeof(iter->value), + "%"PRId64, value); + gen_enum_write_value(iter->description, sizeof(iter->description), + &f->inline_enum, value); + break; + } + case GEN_TYPE_UINT: { + uint64_t value = field(v.qw, f->start, f->end); + snprintf(iter->value, sizeof(iter->value), + "%"PRIu64, value); + gen_enum_write_value(iter->description, sizeof(iter->description), + &f->inline_enum, value); + break; + } + case GEN_TYPE_BOOL: { + const char *true_string = + iter->print_colors ? "\e[0;35mtrue\e[0m" : "true"; + snprintf(iter->value, sizeof(iter->value), + "%s", field(v.qw, f->start, f->end) ? true_string : "false"); + break; + } + case GEN_TYPE_FLOAT: + snprintf(iter->value, sizeof(iter->value), "%f", v.f); + break; + case GEN_TYPE_ADDRESS: + case GEN_TYPE_OFFSET: + snprintf(iter->value, sizeof(iter->value), + "0x%08"PRIx64, field_address(v.qw, f->start, f->end)); + break; + case GEN_TYPE_STRUCT: + snprintf(iter->value, sizeof(iter->value), + "", f->type.gen_struct->name, (f->start / 32)); + break; + case GEN_TYPE_UFIXED: + snprintf(iter->value, sizeof(iter->value), + "%f", (float) field(v.qw, f->start, f->end) / (1 << f->type.f)); + break; + case GEN_TYPE_SFIXED: + /* FIXME: Sign extend extracted field. */ + snprintf(iter->value, sizeof(iter->value), "%s", "foo"); + break; + case GEN_TYPE_MBO: + break; + case GEN_TYPE_ENUM: { + uint64_t value = field(v.qw, f->start, f->end); + snprintf(iter->value, sizeof(iter->value), + "%"PRId64, value); + gen_enum_write_value(iter->description, sizeof(iter->description), + f->type.gen_enum, value); + break; + } + } + + return true; +} diff -Nru mesa-12.0.6/src/intel/tools/decoder.h mesa-17.0.7/src/intel/tools/decoder.h --- mesa-12.0.6/src/intel/tools/decoder.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/tools/decoder.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,131 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef DECODER_H +#define DECODER_H + +#include +#include + +#include "common/gen_device_info.h" + +struct gen_spec; +struct gen_group; +struct gen_field; + +static inline uint32_t gen_make_gen(uint32_t major, uint32_t minor) +{ + return (major << 8) | minor; +} + +struct gen_group *gen_spec_find_struct(struct gen_spec *spec, const char *name); +struct gen_spec *gen_spec_load(const struct gen_device_info *devinfo); +struct gen_spec *gen_spec_load_from_path(const struct gen_device_info *devinfo, + const char *path); +uint32_t gen_spec_get_gen(struct gen_spec *spec); +struct gen_group *gen_spec_find_instruction(struct gen_spec *spec, const uint32_t *p); +struct gen_group *gen_spec_find_register(struct gen_spec *spec, uint32_t offset); +int gen_group_get_length(struct gen_group *group, const uint32_t *p); +const char *gen_group_get_name(struct gen_group *group); +uint32_t gen_group_get_opcode(struct gen_group *group); +struct gen_enum *gen_spec_find_enum(struct gen_spec *spec, const char *name); + +struct gen_field_iterator { + struct gen_group *group; + const char *name; + char value[128]; + char description[128]; + const uint32_t *p; + int i; + bool print_colors; +}; + +struct gen_group { + char *name; + int nfields; + struct gen_field **fields; + uint32_t group_offset, group_count; + + uint32_t opcode_mask; + uint32_t opcode; + + /* Register specific */ + uint32_t register_offset; +}; + +struct gen_value { + char *name; + uint64_t value; +}; + +struct gen_enum { + char *name; + int nvalues; + struct gen_value **values; +}; + +struct gen_type { + enum { + GEN_TYPE_UNKNOWN, + GEN_TYPE_INT, + GEN_TYPE_UINT, + GEN_TYPE_BOOL, + GEN_TYPE_FLOAT, + GEN_TYPE_ADDRESS, + GEN_TYPE_OFFSET, + GEN_TYPE_STRUCT, + GEN_TYPE_UFIXED, + GEN_TYPE_SFIXED, + GEN_TYPE_MBO, + GEN_TYPE_ENUM + } kind; + + /* Struct definition for GEN_TYPE_STRUCT */ + union { + struct gen_group *gen_struct; + struct gen_enum *gen_enum; + struct { + /* Integer and fractional sizes for GEN_TYPE_UFIXED and GEN_TYPE_SFIXED */ + int i, f; + }; + }; +}; + +struct gen_field { + char *name; + int start, end; + struct gen_type type; + bool has_default; + uint32_t default_value; + + struct gen_enum inline_enum; +}; + +void gen_field_iterator_init(struct gen_field_iterator *iter, + struct gen_group *group, + const uint32_t *p, + bool print_colors); + +bool gen_field_iterator_next(struct gen_field_iterator *iter); + +#endif /* DECODER_H */ diff -Nru mesa-12.0.6/src/intel/tools/disasm.c mesa-17.0.7/src/intel/tools/disasm.c --- mesa-12.0.6/src/intel/tools/disasm.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/tools/disasm.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,118 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include + +#include "brw_context.h" +#include "brw_inst.h" +#include "brw_eu.h" + +#include "gen_disasm.h" + +uint64_t INTEL_DEBUG; + +struct gen_disasm { + struct gen_device_info devinfo; +}; + +static bool +is_send(uint32_t opcode) +{ + return (opcode == BRW_OPCODE_SEND || + opcode == BRW_OPCODE_SENDC || + opcode == BRW_OPCODE_SENDS || + opcode == BRW_OPCODE_SENDSC ); +} + +void +gen_disasm_disassemble(struct gen_disasm *disasm, void *assembly, + int start, FILE *out) +{ + struct gen_device_info *devinfo = &disasm->devinfo; + bool dump_hex = false; + int offset = start; + + /* This loop exits when send-with-EOT or when opcode is 0 */ + while (true) { + brw_inst *insn = assembly + offset; + brw_inst uncompacted; + bool compacted = brw_inst_cmpt_control(devinfo, insn); + if (0) + fprintf(out, "0x%08x: ", offset); + + if (compacted) { + brw_compact_inst *compacted = (void *)insn; + if (dump_hex) { + fprintf(out, "0x%08x 0x%08x ", + ((uint32_t *)insn)[1], + ((uint32_t *)insn)[0]); + } + + brw_uncompact_instruction(devinfo, &uncompacted, compacted); + insn = &uncompacted; + offset += 8; + } else { + if (dump_hex) { + fprintf(out, "0x%08x 0x%08x 0x%08x 0x%08x ", + ((uint32_t *)insn)[3], + ((uint32_t *)insn)[2], + ((uint32_t *)insn)[1], + ((uint32_t *)insn)[0]); + } + offset += 16; + } + + brw_disassemble_inst(out, devinfo, insn, compacted); + + /* Simplistic, but efficient way to terminate disasm */ + uint32_t opcode = brw_inst_opcode(devinfo, insn); + if (opcode == 0 || (is_send(opcode) && brw_inst_eot(devinfo, insn))) { + break; + } + } +} + +struct gen_disasm * +gen_disasm_create(int pciid) +{ + struct gen_disasm *gd; + + gd = malloc(sizeof *gd); + if (gd == NULL) + return NULL; + + if (!gen_get_device_info(pciid, &gd->devinfo)) { + free(gd); + return NULL; + } + + brw_init_compaction_tables(&gd->devinfo); + + return gd; +} + +void +gen_disasm_destroy(struct gen_disasm *disasm) +{ + free(disasm); +} diff -Nru mesa-12.0.6/src/intel/tools/gen_disasm.h mesa-17.0.7/src/intel/tools/gen_disasm.h --- mesa-12.0.6/src/intel/tools/gen_disasm.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/tools/gen_disasm.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,35 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef GEN_DISASM_H +#define GEN_DISASM_H + +struct gen_disasm; + +struct gen_disasm *gen_disasm_create(int pciid); +void gen_disasm_disassemble(struct gen_disasm *disasm, + void *assembly, int start, FILE *out); + +void gen_disasm_destroy(struct gen_disasm *disasm); + +#endif /* GEN_DISASM_H */ diff -Nru mesa-12.0.6/src/intel/tools/Makefile.am mesa-17.0.7/src/intel/tools/Makefile.am --- mesa-12.0.6/src/intel/tools/Makefile.am 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/tools/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,65 @@ +# Copyright © 2016 Intel Corporation +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +# IN THE SOFTWARE. + +# The gallium includes are for the util/u_math.h include from main/macros.h +AM_CPPFLAGS = \ + $(INTEL_CFLAGS) \ + $(VALGRIND_CFLAGS) \ + $(DEFINES) \ + -I$(top_srcdir)/include \ + -I$(top_builddir)/src \ + -I$(top_srcdir)/src \ + -I$(top_srcdir)/src/mapi \ + -I$(top_srcdir)/src/mesa \ + -I$(top_srcdir)/src/mesa/drivers/dri/common \ + -I$(top_srcdir)/src/mesa/drivers/dri/i965 \ + -I$(top_srcdir)/src/gallium/auxiliary \ + -I$(top_srcdir)/src/gallium/include \ + -I$(top_builddir)/src/intel \ + -I$(top_srcdir)/src/intel + +aubinator_DEPS = \ + $(top_builddir)/src/intel/common/libintel_common.la \ + $(top_builddir)/src/mesa/drivers/dri/i965/libi965_compiler.la \ + $(top_builddir)/src/util/libmesautil.la \ + $(PER_GEN_LIBS) \ + $(PTHREAD_LIBS) \ + $(DLOPEN_LIBS) \ + -lm + +noinst_PROGRAMS = aubinator + +aubinator_SOURCES = \ + aubinator.c \ + decoder.c \ + decoder.h \ + disasm.c \ + gen_disasm.h + +aubinator_LDADD = \ + $(aubinator_DEPS) \ + $(EXPAT_LIBS) + +aubinator_CFLAGS = \ + $(AM_CFLAGS) \ + $(EXPAT_CFLAGS) \ + -I$(top_srcdir)/include \ + -I$(top_srcdir)/src diff -Nru mesa-12.0.6/src/intel/tools/Makefile.in mesa-17.0.7/src/intel/tools/Makefile.in --- mesa-12.0.6/src/intel/tools/Makefile.in 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/tools/Makefile.in 2017-06-01 10:37:23.000000000 +0000 @@ -0,0 +1,889 @@ +# Makefile.in generated by automake 1.15 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994-2014 Free Software Foundation, Inc. + +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +# PARTICULAR PURPOSE. + +@SET_MAKE@ + +# Copyright © 2016 Intel Corporation +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 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of GNU make to not export all variables. +# Otherwise a system limit (for SysV at least) may be exceeded. +.NOEXPORT: diff -Nru mesa-12.0.6/src/intel/vulkan/anv_allocator.c mesa-17.0.7/src/intel/vulkan/anv_allocator.c --- mesa-12.0.6/src/intel/vulkan/anv_allocator.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_allocator.c 2017-06-01 10:37:10.000000000 +0000 @@ -24,7 +24,7 @@ #include #include #include -#include +#include #include #include #include @@ -246,34 +246,39 @@ static uint32_t anv_block_pool_grow(struct anv_block_pool *pool, struct anv_block_state *state); -void +VkResult anv_block_pool_init(struct anv_block_pool *pool, struct anv_device *device, uint32_t block_size) { + VkResult result; + assert(util_is_power_of_two(block_size)); pool->device = device; - pool->bo.gem_handle = 0; - pool->bo.offset = 0; - pool->bo.size = 0; - pool->bo.is_winsys_bo = false; + anv_bo_init(&pool->bo, 0, 0); pool->block_size = block_size; pool->free_list = ANV_FREE_LIST_EMPTY; pool->back_free_list = ANV_FREE_LIST_EMPTY; pool->fd = memfd_create("block pool", MFD_CLOEXEC); if (pool->fd == -1) - return; + return vk_error(VK_ERROR_INITIALIZATION_FAILED); /* Just make it 2GB up-front. The Linux kernel won't actually back it * with pages until we either map and fault on one of them or we use * userptr and send a chunk of it off to the GPU. */ - if (ftruncate(pool->fd, BLOCK_POOL_MEMFD_SIZE) == -1) - return; + if (ftruncate(pool->fd, BLOCK_POOL_MEMFD_SIZE) == -1) { + result = vk_error(VK_ERROR_INITIALIZATION_FAILED); + goto fail_fd; + } - anv_vector_init(&pool->mmap_cleanups, - round_to_power_of_two(sizeof(struct anv_mmap_cleanup)), 128); + if (!u_vector_init(&pool->mmap_cleanups, + round_to_power_of_two(sizeof(struct anv_mmap_cleanup)), + 128)) { + result = vk_error(VK_ERROR_INITIALIZATION_FAILED); + goto fail_fd; + } pool->state.next = 0; pool->state.end = 0; @@ -282,6 +287,13 @@ /* Immediately grow the pool so we'll have a backing bo. */ pool->state.end = anv_block_pool_grow(pool, &pool->state); + + return VK_SUCCESS; + + fail_fd: + close(pool->fd); + + return result; } void @@ -289,14 +301,14 @@ { struct anv_mmap_cleanup *cleanup; - anv_vector_foreach(cleanup, &pool->mmap_cleanups) { + u_vector_foreach(cleanup, &pool->mmap_cleanups) { if (cleanup->map) munmap(cleanup->map, cleanup->size); if (cleanup->gem_handle) anv_gem_close(pool->device, cleanup->gem_handle); } - anv_vector_finish(&pool->mmap_cleanups); + u_vector_finish(&pool->mmap_cleanups); close(pool->fd); } @@ -420,7 +432,7 @@ assert(center_bo_offset >= pool->back_state.end); assert(size - center_bo_offset >= pool->state.end); - cleanup = anv_vector_add(&pool->mmap_cleanups); + cleanup = u_vector_add(&pool->mmap_cleanups); if (!cleanup) goto fail; *cleanup = ANV_MMAP_CLEANUP_INIT; @@ -463,10 +475,8 @@ * values back into pool. */ pool->map = map + center_bo_offset; pool->center_bo_offset = center_bo_offset; - pool->bo.gem_handle = gem_handle; - pool->bo.size = size; + anv_bo_init(&pool->bo, gem_handle, size); pool->bo.map = map; - pool->bo.index = 0; done: pthread_mutex_unlock(&pool->device->mutex); @@ -831,6 +841,7 @@ if (anv_ptr_free_list_pop(&pool->free_list[bucket], &next_free_void)) { struct bo_pool_bo_link *next_free = next_free_void; *bo = VG_NOACCESS_READ(&next_free->bo); + assert(bo->gem_handle); assert(bo->map == next_free); assert(size <= bo->size); @@ -848,7 +859,7 @@ assert(new_bo.size == pow2_size); new_bo.map = anv_gem_mmap(pool->device, new_bo.gem_handle, 0, pow2_size, 0); - if (new_bo.map == NULL) { + if (new_bo.map == MAP_FAILED) { anv_gem_close(pool->device, new_bo.gem_handle); return vk_error(VK_ERROR_MEMORY_MAP_FAILED); } @@ -865,15 +876,17 @@ { /* Make a copy in case the anv_bo happens to be storred in the BO */ struct anv_bo bo = *bo_in; + + VG(VALGRIND_MEMPOOL_FREE(pool, bo.map)); + struct bo_pool_bo_link *link = bo.map; - link->bo = bo; + VG_NOACCESS_WRITE(&link->bo, bo); assert(util_is_power_of_two(bo.size)); const unsigned size_log2 = ilog2_round_up(bo.size); const unsigned bucket = size_log2 - 12; assert(bucket < ARRAY_SIZE(pool->free_list)); - VG(VALGRIND_MEMPOOL_FREE(pool, bo.map)); anv_ptr_free_list_push(&pool->free_list[bucket], link); } @@ -890,9 +903,9 @@ { for (unsigned s = 0; s < MESA_SHADER_STAGES; s++) { for (unsigned i = 0; i < 16; i++) { - struct anv_bo *bo = &pool->bos[i][s]; - if (bo->size > 0) - anv_gem_close(device, bo->gem_handle); + struct anv_scratch_bo *bo = &pool->bos[i][s]; + if (bo->exists > 0) + anv_gem_close(device, bo->bo.gem_handle); } } } @@ -907,48 +920,59 @@ unsigned scratch_size_log2 = ffs(per_thread_scratch / 2048); assert(scratch_size_log2 < 16); - struct anv_bo *bo = &pool->bos[scratch_size_log2][stage]; + struct anv_scratch_bo *bo = &pool->bos[scratch_size_log2][stage]; - /* From now on, we go into a critical section. In order to remain - * thread-safe, we use the bo size as a lock. A value of 0 means we don't - * have a valid BO yet. A value of 1 means locked. A value greater than 1 - * means we have a bo of the given size. - */ + /* We can use "exists" to shortcut and ignore the critical section */ + if (bo->exists) + return &bo->bo; - if (bo->size > 1) - return bo; + pthread_mutex_lock(&device->mutex); - uint64_t size = __sync_val_compare_and_swap(&bo->size, 0, 1); - if (size == 0) { - /* We own the lock. Allocate a buffer */ + __sync_synchronize(); + if (bo->exists) + return &bo->bo; - struct brw_device_info *devinfo = &device->info; - uint32_t max_threads[] = { - [MESA_SHADER_VERTEX] = devinfo->max_vs_threads, - [MESA_SHADER_TESS_CTRL] = devinfo->max_hs_threads, - [MESA_SHADER_TESS_EVAL] = devinfo->max_ds_threads, - [MESA_SHADER_GEOMETRY] = devinfo->max_gs_threads, - [MESA_SHADER_FRAGMENT] = devinfo->max_wm_threads, - [MESA_SHADER_COMPUTE] = devinfo->max_cs_threads, - }; + const struct anv_physical_device *physical_device = + &device->instance->physicalDevice; + const struct gen_device_info *devinfo = &physical_device->info; - size = per_thread_scratch * max_threads[stage]; + /* WaCSScratchSize:hsw + * + * Haswell's scratch space address calculation appears to be sparse + * rather than tightly packed. The Thread ID has bits indicating which + * subslice, EU within a subslice, and thread within an EU it is. + * There's a maximum of two slices and two subslices, so these can be + * stored with a single bit. Even though there are only 10 EUs per + * subslice, this is stored in 4 bits, so there's an effective maximum + * value of 16 EUs. Similarly, although there are only 7 threads per EU, + * this is stored in a 3 bit number, giving an effective maximum value + * of 8 threads per EU. + * + * This means that we need to use 16 * 8 instead of 10 * 7 for the + * number of threads per subslice. + */ + const unsigned subslices = MAX2(physical_device->subslice_total, 1); + const unsigned scratch_ids_per_subslice = + device->info.is_haswell ? 16 * 8 : devinfo->max_cs_threads; - struct anv_bo new_bo; - anv_bo_init_new(&new_bo, device, size); + uint32_t max_threads[] = { + [MESA_SHADER_VERTEX] = devinfo->max_vs_threads, + [MESA_SHADER_TESS_CTRL] = devinfo->max_tcs_threads, + [MESA_SHADER_TESS_EVAL] = devinfo->max_tes_threads, + [MESA_SHADER_GEOMETRY] = devinfo->max_gs_threads, + [MESA_SHADER_FRAGMENT] = devinfo->max_wm_threads, + [MESA_SHADER_COMPUTE] = scratch_ids_per_subslice * subslices, + }; - bo->gem_handle = new_bo.gem_handle; + uint32_t size = per_thread_scratch * max_threads[stage]; - /* Set the size last because we use it as a lock */ - __sync_synchronize(); - bo->size = size; + anv_bo_init_new(&bo->bo, device, size); - futex_wake((uint32_t *)&bo->size, INT_MAX); - } else { - /* Someone else got here first */ - while (bo->size == 1) - futex_wait((uint32_t *)&bo->size, 1); - } + /* Set the exists last because it may be read by other threads */ + __sync_synchronize(); + bo->exists = true; + + pthread_mutex_unlock(&device->mutex); - return bo; + return &bo->bo; } diff -Nru mesa-12.0.6/src/intel/vulkan/anv_batch_chain.c mesa-17.0.7/src/intel/vulkan/anv_batch_chain.c --- mesa-12.0.6/src/intel/vulkan/anv_batch_chain.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_batch_chain.c 2017-06-01 10:37:10.000000000 +0000 @@ -29,9 +29,10 @@ #include "anv_private.h" -#include "genxml/gen7_pack.h" #include "genxml/gen8_pack.h" +#include "util/debug.h" + /** \file anv_batch_chain.c * * This file contains functions related to anv_cmd_buffer as a data @@ -59,18 +60,18 @@ } list->relocs = - anv_alloc(alloc, list->array_length * sizeof(*list->relocs), 8, + vk_alloc(alloc, list->array_length * sizeof(*list->relocs), 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (list->relocs == NULL) return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); list->reloc_bos = - anv_alloc(alloc, list->array_length * sizeof(*list->reloc_bos), 8, + vk_alloc(alloc, list->array_length * sizeof(*list->reloc_bos), 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (list->reloc_bos == NULL) { - anv_free(alloc, list->relocs); + vk_free(alloc, list->relocs); return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); } @@ -95,8 +96,8 @@ anv_reloc_list_finish(struct anv_reloc_list *list, const VkAllocationCallbacks *alloc) { - anv_free(alloc, list->relocs); - anv_free(alloc, list->reloc_bos); + vk_free(alloc, list->relocs); + vk_free(alloc, list->reloc_bos); } static VkResult @@ -112,16 +113,16 @@ new_length *= 2; struct drm_i915_gem_relocation_entry *new_relocs = - anv_alloc(alloc, new_length * sizeof(*list->relocs), 8, + vk_alloc(alloc, new_length * sizeof(*list->relocs), 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (new_relocs == NULL) return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); struct anv_bo **new_reloc_bos = - anv_alloc(alloc, new_length * sizeof(*list->reloc_bos), 8, + vk_alloc(alloc, new_length * sizeof(*list->reloc_bos), 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (new_reloc_bos == NULL) { - anv_free(alloc, new_relocs); + vk_free(alloc, new_relocs); return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); } @@ -129,8 +130,8 @@ memcpy(new_reloc_bos, list->reloc_bos, list->num_relocs * sizeof(*list->reloc_bos)); - anv_free(alloc, list->relocs); - anv_free(alloc, list->reloc_bos); + vk_free(alloc, list->relocs); + vk_free(alloc, list->reloc_bos); list->array_length = new_length; list->relocs = new_relocs; @@ -246,7 +247,7 @@ { VkResult result; - struct anv_batch_bo *bbo = anv_alloc(&cmd_buffer->pool->alloc, sizeof(*bbo), + struct anv_batch_bo *bbo = vk_alloc(&cmd_buffer->pool->alloc, sizeof(*bbo), 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (bbo == NULL) return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); @@ -267,7 +268,7 @@ fail_bo_alloc: anv_bo_pool_free(&cmd_buffer->device->batch_bo_pool, &bbo->bo); fail_alloc: - anv_free(&cmd_buffer->pool->alloc, bbo); + vk_free(&cmd_buffer->pool->alloc, bbo); return result; } @@ -279,7 +280,7 @@ { VkResult result; - struct anv_batch_bo *bbo = anv_alloc(&cmd_buffer->pool->alloc, sizeof(*bbo), + struct anv_batch_bo *bbo = vk_alloc(&cmd_buffer->pool->alloc, sizeof(*bbo), 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (bbo == NULL) return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); @@ -297,8 +298,6 @@ bbo->length = other_bbo->length; memcpy(bbo->bo.map, other_bbo->bo.map, other_bbo->length); - bbo->last_ss_pool_bo_offset = other_bbo->last_ss_pool_bo_offset; - *bbo_out = bbo; return VK_SUCCESS; @@ -306,7 +305,7 @@ fail_bo_alloc: anv_bo_pool_free(&cmd_buffer->device->batch_bo_pool, &bbo->bo); fail_alloc: - anv_free(&cmd_buffer->pool->alloc, bbo); + vk_free(&cmd_buffer->pool->alloc, bbo); return result; } @@ -318,7 +317,6 @@ batch->next = batch->start = bbo->bo.map; batch->end = bbo->bo.map + bbo->bo.size - batch_padding; batch->relocs = &bbo->relocs; - bbo->last_ss_pool_bo_offset = 0; bbo->relocs.num_relocs = 0; } @@ -377,7 +375,7 @@ { anv_reloc_list_finish(&bbo->relocs, &cmd_buffer->pool->alloc); anv_bo_pool_free(&cmd_buffer->device->batch_bo_pool, &bbo->bo); - anv_free(&cmd_buffer->pool->alloc, bbo); + vk_free(&cmd_buffer->pool->alloc, bbo); } static VkResult @@ -434,7 +432,7 @@ { return (struct anv_address) { .bo = &cmd_buffer->device->surface_state_block_pool.bo, - .offset = *(int32_t *)anv_vector_head(&cmd_buffer->bt_blocks), + .offset = *(int32_t *)u_vector_head(&cmd_buffer->bt_blocks), }; } @@ -450,6 +448,9 @@ * gens. */ +#define GEN7_MI_BATCH_BUFFER_START_length 2 +#define GEN7_MI_BATCH_BUFFER_START_length_bias 2 + const uint32_t gen7_length = GEN7_MI_BATCH_BUFFER_START_length - GEN7_MI_BATCH_BUFFER_START_length_bias; const uint32_t gen8_length = @@ -494,7 +495,7 @@ if (result != VK_SUCCESS) return result; - struct anv_batch_bo **seen_bbo = anv_vector_add(&cmd_buffer->seen_bbos); + struct anv_batch_bo **seen_bbo = u_vector_add(&cmd_buffer->seen_bbos); if (seen_bbo == NULL) { anv_batch_bo_destroy(new_bbo, cmd_buffer); return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); @@ -522,13 +523,84 @@ return VK_SUCCESS; } +/** Allocate a binding table + * + * This function allocates a binding table. This is a bit more complicated + * than one would think due to a combination of Vulkan driver design and some + * unfortunate hardware restrictions. + * + * The 3DSTATE_BINDING_TABLE_POINTERS_* packets only have a 16-bit field for + * the binding table pointer which means that all binding tables need to live + * in the bottom 64k of surface state base address. The way the GL driver has + * classically dealt with this restriction is to emit all surface states + * on-the-fly into the batch and have a batch buffer smaller than 64k. This + * isn't really an option in Vulkan for a couple of reasons: + * + * 1) In Vulkan, we have growing (or chaining) batches so surface states have + * to live in their own buffer and we have to be able to re-emit + * STATE_BASE_ADDRESS as needed which requires a full pipeline stall. In + * order to avoid emitting STATE_BASE_ADDRESS any more often than needed + * (it's not that hard to hit 64k of just binding tables), we allocate + * surface state objects up-front when VkImageView is created. In order + * for this to work, surface state objects need to be allocated from a + * global buffer. + * + * 2) We tried to design the surface state system in such a way that it's + * already ready for bindless texturing. The way bindless texturing works + * on our hardware is that you have a big pool of surface state objects + * (with its own state base address) and the bindless handles are simply + * offsets into that pool. With the architecture we chose, we already + * have that pool and it's exactly the same pool that we use for regular + * surface states so we should already be ready for bindless. + * + * 3) For render targets, we need to be able to fill out the surface states + * later in vkBeginRenderPass so that we can assign clear colors + * correctly. One way to do this would be to just create the surface + * state data and then repeatedly copy it into the surface state BO every + * time we have to re-emit STATE_BASE_ADDRESS. While this works, it's + * rather annoying and just being able to allocate them up-front and + * re-use them for the entire render pass. + * + * While none of these are technically blockers for emitting state on the fly + * like we do in GL, the ability to have a single surface state pool is + * simplifies things greatly. Unfortunately, it comes at a cost... + * + * Because of the 64k limitation of 3DSTATE_BINDING_TABLE_POINTERS_*, we can't + * place the binding tables just anywhere in surface state base address. + * Because 64k isn't a whole lot of space, we can't simply restrict the + * surface state buffer to 64k, we have to be more clever. The solution we've + * chosen is to have a block pool with a maximum size of 2G that starts at + * zero and grows in both directions. All surface states are allocated from + * the top of the pool (positive offsets) and we allocate blocks (< 64k) of + * binding tables from the bottom of the pool (negative offsets). Every time + * we allocate a new binding table block, we set surface state base address to + * point to the bottom of the binding table block. This way all of the + * binding tables in the block are in the bottom 64k of surface state base + * address. When we fill out the binding table, we add the distance between + * the bottom of our binding table block and zero of the block pool to the + * surface state offsets so that they are correct relative to out new surface + * state base address at the bottom of the binding table block. + * + * \see adjust_relocations_from_block_pool() + * \see adjust_relocations_too_block_pool() + * + * \param[in] entries The number of surface state entries the binding + * table should be able to hold. + * + * \param[out] state_offset The offset surface surface state base address + * where the surface states live. This must be + * added to the surface state offset when it is + * written into the binding table entry. + * + * \return An anv_state representing the binding table + */ struct anv_state anv_cmd_buffer_alloc_binding_table(struct anv_cmd_buffer *cmd_buffer, uint32_t entries, uint32_t *state_offset) { struct anv_block_pool *block_pool = &cmd_buffer->device->surface_state_block_pool; - int32_t *bt_block = anv_vector_head(&cmd_buffer->bt_blocks); + int32_t *bt_block = u_vector_head(&cmd_buffer->bt_blocks); struct anv_state state; state.alloc_size = align_u32(entries * 4, 32); @@ -550,7 +622,9 @@ struct anv_state anv_cmd_buffer_alloc_surface_state(struct anv_cmd_buffer *cmd_buffer) { - return anv_state_stream_alloc(&cmd_buffer->surface_state_stream, 64, 64); + struct isl_device *isl_dev = &cmd_buffer->device->isl_dev; + return anv_state_stream_alloc(&cmd_buffer->surface_state_stream, + isl_dev->ss.size, isl_dev->ss.align); } struct anv_state @@ -567,7 +641,7 @@ struct anv_block_pool *block_pool = &cmd_buffer->device->surface_state_block_pool; - int32_t *offset = anv_vector_add(&cmd_buffer->bt_blocks); + int32_t *offset = u_vector_add(&cmd_buffer->bt_blocks); if (offset == NULL) return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); @@ -603,15 +677,15 @@ anv_batch_bo_start(batch_bo, &cmd_buffer->batch, GEN8_MI_BATCH_BUFFER_START_length * 4); - int success = anv_vector_init(&cmd_buffer->seen_bbos, + int success = u_vector_init(&cmd_buffer->seen_bbos, sizeof(struct anv_bo *), 8 * sizeof(struct anv_bo *)); if (!success) goto fail_batch_bo; - *(struct anv_batch_bo **)anv_vector_add(&cmd_buffer->seen_bbos) = batch_bo; + *(struct anv_batch_bo **)u_vector_add(&cmd_buffer->seen_bbos) = batch_bo; - success = anv_vector_init(&cmd_buffer->bt_blocks, sizeof(int32_t), + success = u_vector_init(&cmd_buffer->bt_blocks, sizeof(int32_t), 8 * sizeof(int32_t)); if (!success) goto fail_seen_bbos; @@ -620,19 +694,16 @@ &cmd_buffer->pool->alloc); if (result != VK_SUCCESS) goto fail_bt_blocks; + cmd_buffer->last_ss_pool_center = 0; anv_cmd_buffer_new_binding_table_block(cmd_buffer); - cmd_buffer->execbuf2.objects = NULL; - cmd_buffer->execbuf2.bos = NULL; - cmd_buffer->execbuf2.array_length = 0; - return VK_SUCCESS; fail_bt_blocks: - anv_vector_finish(&cmd_buffer->bt_blocks); + u_vector_finish(&cmd_buffer->bt_blocks); fail_seen_bbos: - anv_vector_finish(&cmd_buffer->seen_bbos); + u_vector_finish(&cmd_buffer->seen_bbos); fail_batch_bo: anv_batch_bo_destroy(batch_bo, cmd_buffer); @@ -643,24 +714,21 @@ anv_cmd_buffer_fini_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer) { int32_t *bt_block; - anv_vector_foreach(bt_block, &cmd_buffer->bt_blocks) { + u_vector_foreach(bt_block, &cmd_buffer->bt_blocks) { anv_block_pool_free(&cmd_buffer->device->surface_state_block_pool, *bt_block); } - anv_vector_finish(&cmd_buffer->bt_blocks); + u_vector_finish(&cmd_buffer->bt_blocks); anv_reloc_list_finish(&cmd_buffer->surface_relocs, &cmd_buffer->pool->alloc); - anv_vector_finish(&cmd_buffer->seen_bbos); + u_vector_finish(&cmd_buffer->seen_bbos); /* Destroy all of the batch buffers */ list_for_each_entry_safe(struct anv_batch_bo, bbo, &cmd_buffer->batch_bos, link) { anv_batch_bo_destroy(bbo, cmd_buffer); } - - anv_free(&cmd_buffer->pool->alloc, cmd_buffer->execbuf2.objects); - anv_free(&cmd_buffer->pool->alloc, cmd_buffer->execbuf2.bos); } void @@ -679,21 +747,22 @@ &cmd_buffer->batch, GEN8_MI_BATCH_BUFFER_START_length * 4); - while (anv_vector_length(&cmd_buffer->bt_blocks) > 1) { - int32_t *bt_block = anv_vector_remove(&cmd_buffer->bt_blocks); + while (u_vector_length(&cmd_buffer->bt_blocks) > 1) { + int32_t *bt_block = u_vector_remove(&cmd_buffer->bt_blocks); anv_block_pool_free(&cmd_buffer->device->surface_state_block_pool, *bt_block); } - assert(anv_vector_length(&cmd_buffer->bt_blocks) == 1); + assert(u_vector_length(&cmd_buffer->bt_blocks) == 1); cmd_buffer->bt_next = 0; cmd_buffer->surface_relocs.num_relocs = 0; + cmd_buffer->last_ss_pool_center = 0; /* Reset the list of seen buffers */ cmd_buffer->seen_bbos.head = 0; cmd_buffer->seen_bbos.tail = 0; - *(struct anv_batch_bo **)anv_vector_add(&cmd_buffer->seen_bbos) = + *(struct anv_batch_bo **)u_vector_add(&cmd_buffer->seen_bbos) = anv_cmd_buffer_current_batch_bo(cmd_buffer); } @@ -712,11 +781,11 @@ cmd_buffer->batch.end += GEN8_MI_BATCH_BUFFER_START_length * 4; assert(cmd_buffer->batch.end == batch_bo->bo.map + batch_bo->bo.size); - anv_batch_emit(&cmd_buffer->batch, GEN7_MI_BATCH_BUFFER_END, bbe); + anv_batch_emit(&cmd_buffer->batch, GEN8_MI_BATCH_BUFFER_END, bbe); /* Round batch up to an even number of dwords. */ if ((cmd_buffer->batch.next - cmd_buffer->batch.start) & 4) - anv_batch_emit(&cmd_buffer->batch, GEN7_MI_NOOP, noop); + anv_batch_emit(&cmd_buffer->batch, GEN8_MI_NOOP, noop); cmd_buffer->exec_mode = ANV_CMD_BUFFER_EXEC_MODE_PRIMARY; } @@ -760,7 +829,7 @@ struct list_head *list) { list_for_each_entry(struct anv_batch_bo, bbo, list, link) { - struct anv_batch_bo **bbo_ptr = anv_vector_add(&cmd_buffer->seen_bbos); + struct anv_batch_bo **bbo_ptr = u_vector_add(&cmd_buffer->seen_bbos); if (bbo_ptr == NULL) return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); @@ -777,7 +846,6 @@ switch (secondary->exec_mode) { case ANV_CMD_BUFFER_EXEC_MODE_EMIT: anv_batch_emit_batch(&primary->batch, &secondary->batch); - anv_cmd_buffer_emit_state_base_address(primary); break; case ANV_CMD_BUFFER_EXEC_MODE_GROW_AND_EMIT: { struct anv_batch_bo *bbo = anv_cmd_buffer_current_batch_bo(primary); @@ -785,7 +853,6 @@ anv_batch_bo_grow(primary, bbo, &primary->batch, length, GEN8_MI_BATCH_BUFFER_START_length * 4); anv_batch_emit_batch(&primary->batch, &secondary->batch); - anv_cmd_buffer_emit_state_base_address(primary); break; } case ANV_CMD_BUFFER_EXEC_MODE_CHAIN: { @@ -826,8 +893,6 @@ p += CACHELINE_SIZE; } } - - anv_cmd_buffer_emit_state_base_address(primary); break; } case ANV_CMD_BUFFER_EXEC_MODE_COPY_AND_CHAIN: { @@ -851,8 +916,6 @@ anv_batch_bo_continue(last_bbo, &primary->batch, GEN8_MI_BATCH_BUFFER_START_length * 4); - - anv_cmd_buffer_emit_state_base_address(primary); break; } default: @@ -863,56 +926,83 @@ &secondary->surface_relocs, 0); } +struct anv_execbuf { + struct drm_i915_gem_execbuffer2 execbuf; + + struct drm_i915_gem_exec_object2 * objects; + uint32_t bo_count; + struct anv_bo ** bos; + + /* Allocated length of the 'objects' and 'bos' arrays */ + uint32_t array_length; +}; + +static void +anv_execbuf_init(struct anv_execbuf *exec) +{ + memset(exec, 0, sizeof(*exec)); +} + +static void +anv_execbuf_finish(struct anv_execbuf *exec, + const VkAllocationCallbacks *alloc) +{ + vk_free(alloc, exec->objects); + vk_free(alloc, exec->bos); +} + static VkResult -anv_cmd_buffer_add_bo(struct anv_cmd_buffer *cmd_buffer, - struct anv_bo *bo, - struct anv_reloc_list *relocs) +anv_execbuf_add_bo(struct anv_execbuf *exec, + struct anv_bo *bo, + struct anv_reloc_list *relocs, + const VkAllocationCallbacks *alloc) { struct drm_i915_gem_exec_object2 *obj = NULL; - if (bo->index < cmd_buffer->execbuf2.bo_count && - cmd_buffer->execbuf2.bos[bo->index] == bo) - obj = &cmd_buffer->execbuf2.objects[bo->index]; + if (bo->index < exec->bo_count && exec->bos[bo->index] == bo) + obj = &exec->objects[bo->index]; if (obj == NULL) { /* We've never seen this one before. Add it to the list and assign * an id that we can use later. */ - if (cmd_buffer->execbuf2.bo_count >= cmd_buffer->execbuf2.array_length) { - uint32_t new_len = cmd_buffer->execbuf2.objects ? - cmd_buffer->execbuf2.array_length * 2 : 64; + if (exec->bo_count >= exec->array_length) { + uint32_t new_len = exec->objects ? exec->array_length * 2 : 64; struct drm_i915_gem_exec_object2 *new_objects = - anv_alloc(&cmd_buffer->pool->alloc, new_len * sizeof(*new_objects), - 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + vk_alloc(alloc, new_len * sizeof(*new_objects), + 8, VK_SYSTEM_ALLOCATION_SCOPE_COMMAND); if (new_objects == NULL) return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); struct anv_bo **new_bos = - anv_alloc(&cmd_buffer->pool->alloc, new_len * sizeof(*new_bos), - 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + vk_alloc(alloc, new_len * sizeof(*new_bos), + 8, VK_SYSTEM_ALLOCATION_SCOPE_COMMAND); if (new_bos == NULL) { - anv_free(&cmd_buffer->pool->alloc, new_objects); + vk_free(alloc, new_objects); return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); } - if (cmd_buffer->execbuf2.objects) { - memcpy(new_objects, cmd_buffer->execbuf2.objects, - cmd_buffer->execbuf2.bo_count * sizeof(*new_objects)); - memcpy(new_bos, cmd_buffer->execbuf2.bos, - cmd_buffer->execbuf2.bo_count * sizeof(*new_bos)); + if (exec->objects) { + memcpy(new_objects, exec->objects, + exec->bo_count * sizeof(*new_objects)); + memcpy(new_bos, exec->bos, + exec->bo_count * sizeof(*new_bos)); } - cmd_buffer->execbuf2.objects = new_objects; - cmd_buffer->execbuf2.bos = new_bos; - cmd_buffer->execbuf2.array_length = new_len; + vk_free(alloc, exec->objects); + vk_free(alloc, exec->bos); + + exec->objects = new_objects; + exec->bos = new_bos; + exec->array_length = new_len; } - assert(cmd_buffer->execbuf2.bo_count < cmd_buffer->execbuf2.array_length); + assert(exec->bo_count < exec->array_length); - bo->index = cmd_buffer->execbuf2.bo_count++; - obj = &cmd_buffer->execbuf2.objects[bo->index]; - cmd_buffer->execbuf2.bos[bo->index] = bo; + bo->index = exec->bo_count++; + obj = &exec->objects[bo->index]; + exec->bos[bo->index] = bo; obj->handle = bo->gem_handle; obj->relocation_count = 0; @@ -935,7 +1025,7 @@ for (size_t i = 0; i < relocs->num_relocs; i++) { /* A quick sanity check on relocations */ assert(relocs->relocs[i].offset < bo->size); - anv_cmd_buffer_add_bo(cmd_buffer, relocs->reloc_bos[i], NULL); + anv_execbuf_add_bo(exec, relocs->reloc_bos[i], NULL, alloc); } } @@ -946,82 +1036,62 @@ anv_cmd_buffer_process_relocs(struct anv_cmd_buffer *cmd_buffer, struct anv_reloc_list *list) { - struct anv_bo *bo; - - /* If the kernel supports I915_EXEC_NO_RELOC, it will compare offset in - * struct drm_i915_gem_exec_object2 against the bos current offset and if - * all bos haven't moved it will skip relocation processing alltogether. - * If I915_EXEC_NO_RELOC is not supported, the kernel ignores the incoming - * value of offset so we can set it either way. For that to work we need - * to make sure all relocs use the same presumed offset. - */ - - for (size_t i = 0; i < list->num_relocs; i++) { - bo = list->reloc_bos[i]; - if (bo->offset != list->relocs[i].presumed_offset) - cmd_buffer->execbuf2.need_reloc = true; - - list->relocs[i].target_handle = bo->index; - } -} - -static uint64_t -read_reloc(const struct anv_device *device, const void *p) -{ - if (device->info.gen >= 8) - return *(uint64_t *)p; - else - return *(uint32_t *)p; + for (size_t i = 0; i < list->num_relocs; i++) + list->relocs[i].target_handle = list->reloc_bos[i]->index; } static void -write_reloc(const struct anv_device *device, void *p, uint64_t v) +write_reloc(const struct anv_device *device, void *p, uint64_t v, bool flush) { - if (device->info.gen >= 8) - *(uint64_t *)p = v; - else + unsigned reloc_size = 0; + if (device->info.gen >= 8) { + /* From the Broadwell PRM Vol. 2a, MI_LOAD_REGISTER_MEM::MemoryAddress: + * + * "This field specifies the address of the memory location where the + * register value specified in the DWord above will read from. The + * address specifies the DWord location of the data. Range = + * GraphicsVirtualAddress[63:2] for a DWord register GraphicsAddress + * [63:48] are ignored by the HW and assumed to be in correct + * canonical form [63:48] == [47]." + */ + const int shift = 63 - 47; + reloc_size = sizeof(uint64_t); + *(uint64_t *)p = (((int64_t)v) << shift) >> shift; + } else { + reloc_size = sizeof(uint32_t); *(uint32_t *)p = v; + } + + if (flush && !device->info.has_llc) + anv_clflush_range(p, reloc_size); } static void -adjust_relocations_from_block_pool(struct anv_block_pool *pool, - struct anv_reloc_list *relocs) +adjust_relocations_from_state_pool(struct anv_block_pool *pool, + struct anv_reloc_list *relocs, + uint32_t last_pool_center_bo_offset) { - for (size_t i = 0; i < relocs->num_relocs; i++) { - /* In general, we don't know how stale the relocated value is. It - * may have been used last time or it may not. Since we don't want - * to stomp it while the GPU may be accessing it, we haven't updated - * it anywhere else in the code. Instead, we just set the presumed - * offset to what it is now based on the delta and the data in the - * block pool. Then the kernel will update it for us if needed. - */ - assert(relocs->relocs[i].offset < pool->state.end); - const void *p = pool->map + relocs->relocs[i].offset; - - /* We're reading back the relocated value from potentially incoherent - * memory here. However, any change to the value will be from the kernel - * writing out relocations, which will keep the CPU cache up to date. - */ - relocs->relocs[i].presumed_offset = - read_reloc(pool->device, p) - relocs->relocs[i].delta; + assert(last_pool_center_bo_offset <= pool->center_bo_offset); + uint32_t delta = pool->center_bo_offset - last_pool_center_bo_offset; + for (size_t i = 0; i < relocs->num_relocs; i++) { /* All of the relocations from this block pool to other BO's should * have been emitted relative to the surface block pool center. We * need to add the center offset to make them relative to the * beginning of the actual GEM bo. */ - relocs->relocs[i].offset += pool->center_bo_offset; + relocs->relocs[i].offset += delta; } } static void -adjust_relocations_to_block_pool(struct anv_block_pool *pool, +adjust_relocations_to_state_pool(struct anv_block_pool *pool, struct anv_bo *from_bo, struct anv_reloc_list *relocs, - uint32_t *last_pool_center_bo_offset) + uint32_t last_pool_center_bo_offset) { - assert(*last_pool_center_bo_offset <= pool->center_bo_offset); - uint32_t delta = pool->center_bo_offset - *last_pool_center_bo_offset; + assert(last_pool_center_bo_offset <= pool->center_bo_offset); + uint32_t delta = pool->center_bo_offset - last_pool_center_bo_offset; /* When we initially emit relocations into a block pool, we don't * actually know what the final center_bo_offset will be so we just emit @@ -1046,37 +1116,147 @@ assert(relocs->relocs[i].offset < from_bo->size); write_reloc(pool->device, from_bo->map + relocs->relocs[i].offset, relocs->relocs[i].presumed_offset + - relocs->relocs[i].delta); + relocs->relocs[i].delta, false); } } +} - *last_pool_center_bo_offset = pool->center_bo_offset; +static void +anv_reloc_list_apply(struct anv_device *device, + struct anv_reloc_list *list, + struct anv_bo *bo, + bool always_relocate) +{ + for (size_t i = 0; i < list->num_relocs; i++) { + struct anv_bo *target_bo = list->reloc_bos[i]; + if (list->relocs[i].presumed_offset == target_bo->offset && + !always_relocate) + continue; + + void *p = bo->map + list->relocs[i].offset; + write_reloc(device, p, target_bo->offset + list->relocs[i].delta, true); + list->relocs[i].presumed_offset = target_bo->offset; + } } -void -anv_cmd_buffer_prepare_execbuf(struct anv_cmd_buffer *cmd_buffer) +/** + * This function applies the relocation for a command buffer and writes the + * actual addresses into the buffers as per what we were told by the kernel on + * the previous execbuf2 call. This should be safe to do because, for each + * relocated address, we have two cases: + * + * 1) The target BO is inactive (as seen by the kernel). In this case, it is + * not in use by the GPU so updating the address is 100% ok. It won't be + * in-use by the GPU (from our context) again until the next execbuf2 + * happens. If the kernel decides to move it in the next execbuf2, it + * will have to do the relocations itself, but that's ok because it should + * have all of the information needed to do so. + * + * 2) The target BO is active (as seen by the kernel). In this case, it + * hasn't moved since the last execbuffer2 call because GTT shuffling + * *only* happens when the BO is idle. (From our perspective, it only + * happens inside the execbuffer2 ioctl, but the shuffling may be + * triggered by another ioctl, with full-ppgtt this is limited to only + * execbuffer2 ioctls on the same context, or memory pressure.) Since the + * target BO hasn't moved, our anv_bo::offset exactly matches the BO's GTT + * address and the relocated value we are writing into the BO will be the + * same as the value that is already there. + * + * There is also a possibility that the target BO is active but the exact + * RENDER_SURFACE_STATE object we are writing the relocation into isn't in + * use. In this case, the address currently in the RENDER_SURFACE_STATE + * may be stale but it's still safe to write the relocation because that + * particular RENDER_SURFACE_STATE object isn't in-use by the GPU and + * won't be until the next execbuf2 call. + * + * By doing relocations on the CPU, we can tell the kernel that it doesn't + * need to bother. We want to do this because the surface state buffer is + * used by every command buffer so, if the kernel does the relocations, it + * will always be busy and the kernel will always stall. This is also + * probably the fastest mechanism for doing relocations since the kernel would + * have to make a full copy of all the relocations lists. + */ +static bool +relocate_cmd_buffer(struct anv_cmd_buffer *cmd_buffer, + struct anv_execbuf *exec) +{ + static int userspace_relocs = -1; + if (userspace_relocs < 0) + userspace_relocs = env_var_as_boolean("ANV_USERSPACE_RELOCS", true); + if (!userspace_relocs) + return false; + + /* First, we have to check to see whether or not we can even do the + * relocation. New buffers which have never been submitted to the kernel + * don't have a valid offset so we need to let the kernel do relocations so + * that we can get offsets for them. On future execbuf2 calls, those + * buffers will have offsets and we will be able to skip relocating. + * Invalid offsets are indicated by anv_bo::offset == (uint64_t)-1. + */ + for (uint32_t i = 0; i < exec->bo_count; i++) { + if (exec->bos[i]->offset == (uint64_t)-1) + return false; + } + + /* Since surface states are shared between command buffers and we don't + * know what order they will be submitted to the kernel, we don't know + * what address is actually written in the surface state object at any + * given time. The only option is to always relocate them. + */ + anv_reloc_list_apply(cmd_buffer->device, &cmd_buffer->surface_relocs, + &cmd_buffer->device->surface_state_block_pool.bo, + true /* always relocate surface states */); + + /* Since we own all of the batch buffers, we know what values are stored + * in the relocated addresses and only have to update them if the offsets + * have changed. + */ + struct anv_batch_bo **bbo; + u_vector_foreach(bbo, &cmd_buffer->seen_bbos) { + anv_reloc_list_apply(cmd_buffer->device, + &(*bbo)->relocs, &(*bbo)->bo, false); + } + + for (uint32_t i = 0; i < exec->bo_count; i++) + exec->objects[i].offset = exec->bos[i]->offset; + + return true; +} + +VkResult +anv_cmd_buffer_execbuf(struct anv_device *device, + struct anv_cmd_buffer *cmd_buffer) { struct anv_batch *batch = &cmd_buffer->batch; struct anv_block_pool *ss_pool = &cmd_buffer->device->surface_state_block_pool; - cmd_buffer->execbuf2.bo_count = 0; - cmd_buffer->execbuf2.need_reloc = false; + struct anv_execbuf execbuf; + anv_execbuf_init(&execbuf); - adjust_relocations_from_block_pool(ss_pool, &cmd_buffer->surface_relocs); - anv_cmd_buffer_add_bo(cmd_buffer, &ss_pool->bo, &cmd_buffer->surface_relocs); + adjust_relocations_from_state_pool(ss_pool, &cmd_buffer->surface_relocs, + cmd_buffer->last_ss_pool_center); + anv_execbuf_add_bo(&execbuf, &ss_pool->bo, &cmd_buffer->surface_relocs, + &device->alloc); /* First, we walk over all of the bos we've seen and add them and their * relocations to the validate list. */ struct anv_batch_bo **bbo; - anv_vector_foreach(bbo, &cmd_buffer->seen_bbos) { - adjust_relocations_to_block_pool(ss_pool, &(*bbo)->bo, &(*bbo)->relocs, - &(*bbo)->last_ss_pool_bo_offset); + u_vector_foreach(bbo, &cmd_buffer->seen_bbos) { + adjust_relocations_to_state_pool(ss_pool, &(*bbo)->bo, &(*bbo)->relocs, + cmd_buffer->last_ss_pool_center); - anv_cmd_buffer_add_bo(cmd_buffer, &(*bbo)->bo, &(*bbo)->relocs); + anv_execbuf_add_bo(&execbuf, &(*bbo)->bo, &(*bbo)->relocs, + &device->alloc); } + /* Now that we've adjusted all of the surface state relocations, we need to + * record the surface state pool center so future executions of the command + * buffer can adjust correctly. + */ + cmd_buffer->last_ss_pool_center = ss_pool->center_bo_offset; + struct anv_batch_bo *first_batch_bo = list_first_entry(&cmd_buffer->batch_bos, struct anv_batch_bo, link); @@ -1085,20 +1265,19 @@ * corresponding to the first batch_bo in the chain with the last * element in the list. */ - if (first_batch_bo->bo.index != cmd_buffer->execbuf2.bo_count - 1) { + if (first_batch_bo->bo.index != execbuf.bo_count - 1) { uint32_t idx = first_batch_bo->bo.index; - uint32_t last_idx = cmd_buffer->execbuf2.bo_count - 1; + uint32_t last_idx = execbuf.bo_count - 1; + + struct drm_i915_gem_exec_object2 tmp_obj = execbuf.objects[idx]; + assert(execbuf.bos[idx] == &first_batch_bo->bo); - struct drm_i915_gem_exec_object2 tmp_obj = - cmd_buffer->execbuf2.objects[idx]; - assert(cmd_buffer->execbuf2.bos[idx] == &first_batch_bo->bo); - - cmd_buffer->execbuf2.objects[idx] = cmd_buffer->execbuf2.objects[last_idx]; - cmd_buffer->execbuf2.bos[idx] = cmd_buffer->execbuf2.bos[last_idx]; - cmd_buffer->execbuf2.bos[idx]->index = idx; + execbuf.objects[idx] = execbuf.objects[last_idx]; + execbuf.bos[idx] = execbuf.bos[last_idx]; + execbuf.bos[idx]->index = idx; - cmd_buffer->execbuf2.objects[last_idx] = tmp_obj; - cmd_buffer->execbuf2.bos[last_idx] = &first_batch_bo->bo; + execbuf.objects[last_idx] = tmp_obj; + execbuf.bos[last_idx] = &first_batch_bo->bo; first_batch_bo->bo.index = last_idx; } @@ -1106,22 +1285,22 @@ * the correct indices in the object array. We have to do this after we * reorder the list above as some of the indices may have changed. */ - anv_vector_foreach(bbo, &cmd_buffer->seen_bbos) + u_vector_foreach(bbo, &cmd_buffer->seen_bbos) anv_cmd_buffer_process_relocs(cmd_buffer, &(*bbo)->relocs); anv_cmd_buffer_process_relocs(cmd_buffer, &cmd_buffer->surface_relocs); if (!cmd_buffer->device->info.has_llc) { __builtin_ia32_mfence(); - anv_vector_foreach(bbo, &cmd_buffer->seen_bbos) { + u_vector_foreach(bbo, &cmd_buffer->seen_bbos) { for (uint32_t i = 0; i < (*bbo)->length; i += CACHELINE_SIZE) __builtin_ia32_clflush((*bbo)->bo.map + i); } } - cmd_buffer->execbuf2.execbuf = (struct drm_i915_gem_execbuffer2) { - .buffers_ptr = (uintptr_t) cmd_buffer->execbuf2.objects, - .buffer_count = cmd_buffer->execbuf2.bo_count, + execbuf.execbuf = (struct drm_i915_gem_execbuffer2) { + .buffers_ptr = (uintptr_t) execbuf.objects, + .buffer_count = execbuf.bo_count, .batch_start_offset = 0, .batch_len = batch->next - batch->start, .cliprects_ptr = 0, @@ -1134,6 +1313,49 @@ .rsvd2 = 0, }; - if (!cmd_buffer->execbuf2.need_reloc) - cmd_buffer->execbuf2.execbuf.flags |= I915_EXEC_NO_RELOC; + if (relocate_cmd_buffer(cmd_buffer, &execbuf)) { + /* If we were able to successfully relocate everything, tell the kernel + * that it can skip doing relocations. The requirement for using + * NO_RELOC is: + * + * 1) The addresses written in the objects must match the corresponding + * reloc.presumed_offset which in turn must match the corresponding + * execobject.offset. + * + * 2) To avoid stalling, execobject.offset should match the current + * address of that object within the active context. + * + * In order to satisfy all of the invariants that make userspace + * relocations to be safe (see relocate_cmd_buffer()), we need to + * further ensure that the addresses we use match those used by the + * kernel for the most recent execbuf2. + * + * The kernel may still choose to do relocations anyway if something has + * moved in the GTT. In this case, the relocation list still needs to be + * valid. All relocations on the batch buffers are already valid and + * kept up-to-date. For surface state relocations, by applying the + * relocations in relocate_cmd_buffer, we ensured that the address in + * the RENDER_SURFACE_STATE matches presumed_offset, so it should be + * safe for the kernel to relocate them as needed. + */ + execbuf.execbuf.flags |= I915_EXEC_NO_RELOC; + } else { + /* In the case where we fall back to doing kernel relocations, we need + * to ensure that the relocation list is valid. All relocations on the + * batch buffers are already valid and kept up-to-date. Since surface + * states are shared between command buffers and we don't know what + * order they will be submitted to the kernel, we don't know what + * address is actually written in the surface state object at any given + * time. The only option is to set a bogus presumed offset and let the + * kernel relocate them. + */ + for (size_t i = 0; i < cmd_buffer->surface_relocs.num_relocs; i++) + cmd_buffer->surface_relocs.relocs[i].presumed_offset = -1; + } + + VkResult result = anv_device_execbuf(device, &execbuf.execbuf, execbuf.bos); + + anv_execbuf_finish(&execbuf, &device->alloc); + + return result; } diff -Nru mesa-12.0.6/src/intel/vulkan/anv_blorp.c mesa-17.0.7/src/intel/vulkan/anv_blorp.c --- mesa-12.0.6/src/intel/vulkan/anv_blorp.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_blorp.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,1669 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "anv_private.h" + +static bool +lookup_blorp_shader(struct blorp_context *blorp, + const void *key, uint32_t key_size, + uint32_t *kernel_out, void *prog_data_out) +{ + struct anv_device *device = blorp->driver_ctx; + + /* The blorp cache must be a real cache */ + assert(device->blorp_shader_cache.cache); + + struct anv_shader_bin *bin = + anv_pipeline_cache_search(&device->blorp_shader_cache, key, key_size); + if (!bin) + return false; + + /* The cache already has a reference and it's not going anywhere so there + * is no need to hold a second reference. + */ + anv_shader_bin_unref(device, bin); + + *kernel_out = bin->kernel.offset; + *(const struct brw_stage_prog_data **)prog_data_out = bin->prog_data; + + return true; +} + +static void +upload_blorp_shader(struct blorp_context *blorp, + const void *key, uint32_t key_size, + const void *kernel, uint32_t kernel_size, + const struct brw_stage_prog_data *prog_data, + uint32_t prog_data_size, + uint32_t *kernel_out, void *prog_data_out) +{ + struct anv_device *device = blorp->driver_ctx; + + /* The blorp cache must be a real cache */ + assert(device->blorp_shader_cache.cache); + + struct anv_pipeline_bind_map bind_map = { + .surface_count = 0, + .sampler_count = 0, + }; + + struct anv_shader_bin *bin = + anv_pipeline_cache_upload_kernel(&device->blorp_shader_cache, + key, key_size, kernel, kernel_size, + prog_data, prog_data_size, &bind_map); + + /* The cache already has a reference and it's not going anywhere so there + * is no need to hold a second reference. + */ + anv_shader_bin_unref(device, bin); + + *kernel_out = bin->kernel.offset; + *(const struct brw_stage_prog_data **)prog_data_out = bin->prog_data; +} + +void +anv_device_init_blorp(struct anv_device *device) +{ + anv_pipeline_cache_init(&device->blorp_shader_cache, device, true); + blorp_init(&device->blorp, device, &device->isl_dev); + device->blorp.compiler = device->instance->physicalDevice.compiler; + device->blorp.mocs.tex = device->default_mocs; + device->blorp.mocs.rb = device->default_mocs; + device->blorp.mocs.vb = device->default_mocs; + device->blorp.lookup_shader = lookup_blorp_shader; + device->blorp.upload_shader = upload_blorp_shader; + switch (device->info.gen) { + case 7: + if (device->info.is_haswell) { + device->blorp.exec = gen75_blorp_exec; + } else { + device->blorp.exec = gen7_blorp_exec; + } + break; + case 8: + device->blorp.exec = gen8_blorp_exec; + break; + case 9: + device->blorp.exec = gen9_blorp_exec; + break; + default: + unreachable("Unknown hardware generation"); + } +} + +void +anv_device_finish_blorp(struct anv_device *device) +{ + blorp_finish(&device->blorp); + anv_pipeline_cache_finish(&device->blorp_shader_cache); +} + +static void +get_blorp_surf_for_anv_buffer(struct anv_device *device, + struct anv_buffer *buffer, uint64_t offset, + uint32_t width, uint32_t height, + uint32_t row_pitch, enum isl_format format, + struct blorp_surf *blorp_surf, + struct isl_surf *isl_surf) +{ + const struct isl_format_layout *fmtl = + isl_format_get_layout(format); + + /* ASTC is the only format which doesn't support linear layouts. + * Create an equivalently sized surface with ISL to get around this. + */ + if (fmtl->txc == ISL_TXC_ASTC) { + /* Use an equivalently sized format */ + format = ISL_FORMAT_R32G32B32A32_UINT; + assert(fmtl->bpb == isl_format_get_layout(format)->bpb); + + /* Shrink the dimensions for the new format */ + width = DIV_ROUND_UP(width, fmtl->bw); + height = DIV_ROUND_UP(height, fmtl->bh); + } + + *blorp_surf = (struct blorp_surf) { + .surf = isl_surf, + .addr = { + .buffer = buffer->bo, + .offset = buffer->offset + offset, + }, + }; + + isl_surf_init(&device->isl_dev, isl_surf, + .dim = ISL_SURF_DIM_2D, + .format = format, + .width = width, + .height = height, + .depth = 1, + .levels = 1, + .array_len = 1, + .samples = 1, + .min_pitch = row_pitch, + .usage = ISL_SURF_USAGE_TEXTURE_BIT | + ISL_SURF_USAGE_RENDER_TARGET_BIT, + .tiling_flags = ISL_TILING_LINEAR_BIT); + assert(isl_surf->row_pitch == row_pitch); +} + +static void +get_blorp_surf_for_anv_image(const struct anv_image *image, + VkImageAspectFlags aspect, + enum isl_aux_usage aux_usage, + struct blorp_surf *blorp_surf) +{ + if (aspect == VK_IMAGE_ASPECT_STENCIL_BIT || + aux_usage == ISL_AUX_USAGE_HIZ) + aux_usage = ISL_AUX_USAGE_NONE; + + const struct anv_surface *surface = + anv_image_get_surface_for_aspect_mask(image, aspect); + + *blorp_surf = (struct blorp_surf) { + .surf = &surface->isl, + .addr = { + .buffer = image->bo, + .offset = image->offset + surface->offset, + }, + }; + + if (aux_usage != ISL_AUX_USAGE_NONE) { + blorp_surf->aux_surf = &image->aux_surface.isl, + blorp_surf->aux_addr = (struct blorp_address) { + .buffer = image->bo, + .offset = image->offset + image->aux_surface.offset, + }; + blorp_surf->aux_usage = aux_usage; + } +} + +void anv_CmdCopyImage( + VkCommandBuffer commandBuffer, + VkImage srcImage, + VkImageLayout srcImageLayout, + VkImage dstImage, + VkImageLayout dstImageLayout, + uint32_t regionCount, + const VkImageCopy* pRegions) +{ + ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); + ANV_FROM_HANDLE(anv_image, src_image, srcImage); + ANV_FROM_HANDLE(anv_image, dst_image, dstImage); + + struct blorp_batch batch; + blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0); + + for (unsigned r = 0; r < regionCount; r++) { + VkOffset3D srcOffset = + anv_sanitize_image_offset(src_image->type, pRegions[r].srcOffset); + VkOffset3D dstOffset = + anv_sanitize_image_offset(dst_image->type, pRegions[r].dstOffset); + VkExtent3D extent = + anv_sanitize_image_extent(src_image->type, pRegions[r].extent); + + unsigned dst_base_layer, layer_count; + if (dst_image->type == VK_IMAGE_TYPE_3D) { + dst_base_layer = pRegions[r].dstOffset.z; + layer_count = pRegions[r].extent.depth; + } else { + dst_base_layer = pRegions[r].dstSubresource.baseArrayLayer; + layer_count = + anv_get_layerCount(dst_image, &pRegions[r].dstSubresource); + } + + unsigned src_base_layer; + if (src_image->type == VK_IMAGE_TYPE_3D) { + src_base_layer = pRegions[r].srcOffset.z; + } else { + src_base_layer = pRegions[r].srcSubresource.baseArrayLayer; + assert(layer_count == + anv_get_layerCount(src_image, &pRegions[r].srcSubresource)); + } + + assert(pRegions[r].srcSubresource.aspectMask == + pRegions[r].dstSubresource.aspectMask); + + uint32_t a; + for_each_bit(a, pRegions[r].dstSubresource.aspectMask) { + VkImageAspectFlagBits aspect = (1 << a); + + struct blorp_surf src_surf, dst_surf; + get_blorp_surf_for_anv_image(src_image, aspect, src_image->aux_usage, + &src_surf); + get_blorp_surf_for_anv_image(dst_image, aspect, dst_image->aux_usage, + &dst_surf); + + for (unsigned i = 0; i < layer_count; i++) { + blorp_copy(&batch, &src_surf, pRegions[r].srcSubresource.mipLevel, + src_base_layer + i, + &dst_surf, pRegions[r].dstSubresource.mipLevel, + dst_base_layer + i, + srcOffset.x, srcOffset.y, + dstOffset.x, dstOffset.y, + extent.width, extent.height); + } + } + } + + blorp_batch_finish(&batch); +} + +static void +copy_buffer_to_image(struct anv_cmd_buffer *cmd_buffer, + struct anv_buffer *anv_buffer, + struct anv_image *anv_image, + uint32_t regionCount, + const VkBufferImageCopy* pRegions, + bool buffer_to_image) +{ + struct blorp_batch batch; + blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0); + + struct { + struct blorp_surf surf; + uint32_t level; + VkOffset3D offset; + } image, buffer, *src, *dst; + + buffer.level = 0; + buffer.offset = (VkOffset3D) { 0, 0, 0 }; + + if (buffer_to_image) { + src = &buffer; + dst = ℑ + } else { + src = ℑ + dst = &buffer; + } + + for (unsigned r = 0; r < regionCount; r++) { + const VkImageAspectFlags aspect = pRegions[r].imageSubresource.aspectMask; + + get_blorp_surf_for_anv_image(anv_image, aspect, anv_image->aux_usage, + &image.surf); + image.offset = + anv_sanitize_image_offset(anv_image->type, pRegions[r].imageOffset); + image.level = pRegions[r].imageSubresource.mipLevel; + + VkExtent3D extent = + anv_sanitize_image_extent(anv_image->type, pRegions[r].imageExtent); + if (anv_image->type != VK_IMAGE_TYPE_3D) { + image.offset.z = pRegions[r].imageSubresource.baseArrayLayer; + extent.depth = + anv_get_layerCount(anv_image, &pRegions[r].imageSubresource); + } + + const enum isl_format buffer_format = + anv_get_isl_format(&cmd_buffer->device->info, anv_image->vk_format, + aspect, VK_IMAGE_TILING_LINEAR); + + const VkExtent3D bufferImageExtent = { + .width = pRegions[r].bufferRowLength ? + pRegions[r].bufferRowLength : extent.width, + .height = pRegions[r].bufferImageHeight ? + pRegions[r].bufferImageHeight : extent.height, + }; + + const struct isl_format_layout *buffer_fmtl = + isl_format_get_layout(buffer_format); + + const uint32_t buffer_row_pitch = + DIV_ROUND_UP(bufferImageExtent.width, buffer_fmtl->bw) * + (buffer_fmtl->bpb / 8); + + const uint32_t buffer_layer_stride = + DIV_ROUND_UP(bufferImageExtent.height, buffer_fmtl->bh) * + buffer_row_pitch; + + struct isl_surf buffer_isl_surf; + get_blorp_surf_for_anv_buffer(cmd_buffer->device, + anv_buffer, pRegions[r].bufferOffset, + extent.width, extent.height, + buffer_row_pitch, buffer_format, + &buffer.surf, &buffer_isl_surf); + + for (unsigned z = 0; z < extent.depth; z++) { + blorp_copy(&batch, &src->surf, src->level, src->offset.z, + &dst->surf, dst->level, dst->offset.z, + src->offset.x, src->offset.y, dst->offset.x, dst->offset.y, + extent.width, extent.height); + + image.offset.z++; + buffer.surf.addr.offset += buffer_layer_stride; + } + } + + blorp_batch_finish(&batch); +} + +void anv_CmdCopyBufferToImage( + VkCommandBuffer commandBuffer, + VkBuffer srcBuffer, + VkImage dstImage, + VkImageLayout dstImageLayout, + uint32_t regionCount, + const VkBufferImageCopy* pRegions) +{ + ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); + ANV_FROM_HANDLE(anv_buffer, src_buffer, srcBuffer); + ANV_FROM_HANDLE(anv_image, dst_image, dstImage); + + copy_buffer_to_image(cmd_buffer, src_buffer, dst_image, + regionCount, pRegions, true); +} + +void anv_CmdCopyImageToBuffer( + VkCommandBuffer commandBuffer, + VkImage srcImage, + VkImageLayout srcImageLayout, + VkBuffer dstBuffer, + uint32_t regionCount, + const VkBufferImageCopy* pRegions) +{ + ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); + ANV_FROM_HANDLE(anv_image, src_image, srcImage); + ANV_FROM_HANDLE(anv_buffer, dst_buffer, dstBuffer); + + copy_buffer_to_image(cmd_buffer, dst_buffer, src_image, + regionCount, pRegions, false); +} + +static bool +flip_coords(unsigned *src0, unsigned *src1, unsigned *dst0, unsigned *dst1) +{ + bool flip = false; + if (*src0 > *src1) { + unsigned tmp = *src0; + *src0 = *src1; + *src1 = tmp; + flip = !flip; + } + + if (*dst0 > *dst1) { + unsigned tmp = *dst0; + *dst0 = *dst1; + *dst1 = tmp; + flip = !flip; + } + + return flip; +} + +void anv_CmdBlitImage( + VkCommandBuffer commandBuffer, + VkImage srcImage, + VkImageLayout srcImageLayout, + VkImage dstImage, + VkImageLayout dstImageLayout, + uint32_t regionCount, + const VkImageBlit* pRegions, + VkFilter filter) + +{ + ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); + ANV_FROM_HANDLE(anv_image, src_image, srcImage); + ANV_FROM_HANDLE(anv_image, dst_image, dstImage); + + struct blorp_surf src, dst; + + uint32_t gl_filter; + switch (filter) { + case VK_FILTER_NEAREST: + gl_filter = 0x2600; /* GL_NEAREST */ + break; + case VK_FILTER_LINEAR: + gl_filter = 0x2601; /* GL_LINEAR */ + break; + default: + unreachable("Invalid filter"); + } + + struct blorp_batch batch; + blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0); + + for (unsigned r = 0; r < regionCount; r++) { + const VkImageSubresourceLayers *src_res = &pRegions[r].srcSubresource; + const VkImageSubresourceLayers *dst_res = &pRegions[r].dstSubresource; + + get_blorp_surf_for_anv_image(src_image, src_res->aspectMask, + src_image->aux_usage, &src); + get_blorp_surf_for_anv_image(dst_image, dst_res->aspectMask, + dst_image->aux_usage, &dst); + + struct anv_format src_format = + anv_get_format(&cmd_buffer->device->info, src_image->vk_format, + src_res->aspectMask, src_image->tiling); + struct anv_format dst_format = + anv_get_format(&cmd_buffer->device->info, dst_image->vk_format, + dst_res->aspectMask, dst_image->tiling); + + unsigned dst_start, dst_end; + if (dst_image->type == VK_IMAGE_TYPE_3D) { + assert(dst_res->baseArrayLayer == 0); + dst_start = pRegions[r].dstOffsets[0].z; + dst_end = pRegions[r].dstOffsets[1].z; + } else { + dst_start = dst_res->baseArrayLayer; + dst_end = dst_start + anv_get_layerCount(dst_image, dst_res); + } + + unsigned src_start, src_end; + if (src_image->type == VK_IMAGE_TYPE_3D) { + assert(src_res->baseArrayLayer == 0); + src_start = pRegions[r].srcOffsets[0].z; + src_end = pRegions[r].srcOffsets[1].z; + } else { + src_start = src_res->baseArrayLayer; + src_end = src_start + anv_get_layerCount(src_image, src_res); + } + + bool flip_z = flip_coords(&src_start, &src_end, &dst_start, &dst_end); + float src_z_step = (float)(src_end + 1 - src_start) / + (float)(dst_end + 1 - dst_start); + + if (flip_z) { + src_start = src_end; + src_z_step *= -1; + } + + unsigned src_x0 = pRegions[r].srcOffsets[0].x; + unsigned src_x1 = pRegions[r].srcOffsets[1].x; + unsigned dst_x0 = pRegions[r].dstOffsets[0].x; + unsigned dst_x1 = pRegions[r].dstOffsets[1].x; + bool flip_x = flip_coords(&src_x0, &src_x1, &dst_x0, &dst_x1); + + unsigned src_y0 = pRegions[r].srcOffsets[0].y; + unsigned src_y1 = pRegions[r].srcOffsets[1].y; + unsigned dst_y0 = pRegions[r].dstOffsets[0].y; + unsigned dst_y1 = pRegions[r].dstOffsets[1].y; + bool flip_y = flip_coords(&src_y0, &src_y1, &dst_y0, &dst_y1); + + const unsigned num_layers = dst_end - dst_start; + for (unsigned i = 0; i < num_layers; i++) { + unsigned dst_z = dst_start + i; + unsigned src_z = src_start + i * src_z_step; + + blorp_blit(&batch, &src, src_res->mipLevel, src_z, + src_format.isl_format, src_format.swizzle, + &dst, dst_res->mipLevel, dst_z, + dst_format.isl_format, dst_format.swizzle, + src_x0, src_y0, src_x1, src_y1, + dst_x0, dst_y0, dst_x1, dst_y1, + gl_filter, flip_x, flip_y); + } + + } + + blorp_batch_finish(&batch); +} + +static enum isl_format +isl_format_for_size(unsigned size_B) +{ + switch (size_B) { + case 1: return ISL_FORMAT_R8_UINT; + case 2: return ISL_FORMAT_R8G8_UINT; + case 4: return ISL_FORMAT_R8G8B8A8_UINT; + case 8: return ISL_FORMAT_R16G16B16A16_UINT; + case 16: return ISL_FORMAT_R32G32B32A32_UINT; + default: + unreachable("Not a power-of-two format size"); + } +} + +static void +do_buffer_copy(struct blorp_batch *batch, + struct anv_bo *src, uint64_t src_offset, + struct anv_bo *dst, uint64_t dst_offset, + int width, int height, int block_size) +{ + struct anv_device *device = batch->blorp->driver_ctx; + + /* The actual format we pick doesn't matter as blorp will throw it away. + * The only thing that actually matters is the size. + */ + enum isl_format format = isl_format_for_size(block_size); + + struct isl_surf surf; + isl_surf_init(&device->isl_dev, &surf, + .dim = ISL_SURF_DIM_2D, + .format = format, + .width = width, + .height = height, + .depth = 1, + .levels = 1, + .array_len = 1, + .samples = 1, + .usage = ISL_SURF_USAGE_TEXTURE_BIT | + ISL_SURF_USAGE_RENDER_TARGET_BIT, + .tiling_flags = ISL_TILING_LINEAR_BIT); + assert(surf.row_pitch == width * block_size); + + struct blorp_surf src_blorp_surf = { + .surf = &surf, + .addr = { + .buffer = src, + .offset = src_offset, + }, + }; + + struct blorp_surf dst_blorp_surf = { + .surf = &surf, + .addr = { + .buffer = dst, + .offset = dst_offset, + }, + }; + + blorp_copy(batch, &src_blorp_surf, 0, 0, &dst_blorp_surf, 0, 0, + 0, 0, 0, 0, width, height); +} + +/** + * Returns the greatest common divisor of a and b that is a power of two. + */ +static inline uint64_t +gcd_pow2_u64(uint64_t a, uint64_t b) +{ + assert(a > 0 || b > 0); + + unsigned a_log2 = ffsll(a) - 1; + unsigned b_log2 = ffsll(b) - 1; + + /* If either a or b is 0, then a_log2 or b_log2 till be UINT_MAX in which + * case, the MIN2() will take the other one. If both are 0 then we will + * hit the assert above. + */ + return 1 << MIN2(a_log2, b_log2); +} + +/* This is maximum possible width/height our HW can handle */ +#define MAX_SURFACE_DIM (1ull << 14) + +void anv_CmdCopyBuffer( + VkCommandBuffer commandBuffer, + VkBuffer srcBuffer, + VkBuffer dstBuffer, + uint32_t regionCount, + const VkBufferCopy* pRegions) +{ + ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); + ANV_FROM_HANDLE(anv_buffer, src_buffer, srcBuffer); + ANV_FROM_HANDLE(anv_buffer, dst_buffer, dstBuffer); + + struct blorp_batch batch; + blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0); + + for (unsigned r = 0; r < regionCount; r++) { + uint64_t src_offset = src_buffer->offset + pRegions[r].srcOffset; + uint64_t dst_offset = dst_buffer->offset + pRegions[r].dstOffset; + uint64_t copy_size = pRegions[r].size; + + /* First, we compute the biggest format that can be used with the + * given offsets and size. + */ + int bs = 16; + bs = gcd_pow2_u64(bs, src_offset); + bs = gcd_pow2_u64(bs, dst_offset); + bs = gcd_pow2_u64(bs, pRegions[r].size); + + /* First, we make a bunch of max-sized copies */ + uint64_t max_copy_size = MAX_SURFACE_DIM * MAX_SURFACE_DIM * bs; + while (copy_size >= max_copy_size) { + do_buffer_copy(&batch, src_buffer->bo, src_offset, + dst_buffer->bo, dst_offset, + MAX_SURFACE_DIM, MAX_SURFACE_DIM, bs); + copy_size -= max_copy_size; + src_offset += max_copy_size; + dst_offset += max_copy_size; + } + + /* Now make a max-width copy */ + uint64_t height = copy_size / (MAX_SURFACE_DIM * bs); + assert(height < MAX_SURFACE_DIM); + if (height != 0) { + uint64_t rect_copy_size = height * MAX_SURFACE_DIM * bs; + do_buffer_copy(&batch, src_buffer->bo, src_offset, + dst_buffer->bo, dst_offset, + MAX_SURFACE_DIM, height, bs); + copy_size -= rect_copy_size; + src_offset += rect_copy_size; + dst_offset += rect_copy_size; + } + + /* Finally, make a small copy to finish it off */ + if (copy_size != 0) { + do_buffer_copy(&batch, src_buffer->bo, src_offset, + dst_buffer->bo, dst_offset, + copy_size / bs, 1, bs); + } + } + + blorp_batch_finish(&batch); +} + +void anv_CmdUpdateBuffer( + VkCommandBuffer commandBuffer, + VkBuffer dstBuffer, + VkDeviceSize dstOffset, + VkDeviceSize dataSize, + const void* pData) +{ + ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); + ANV_FROM_HANDLE(anv_buffer, dst_buffer, dstBuffer); + + struct blorp_batch batch; + blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0); + + /* We can't quite grab a full block because the state stream needs a + * little data at the top to build its linked list. + */ + const uint32_t max_update_size = + cmd_buffer->device->dynamic_state_block_pool.block_size - 64; + + assert(max_update_size < MAX_SURFACE_DIM * 4); + + /* We're about to read data that was written from the CPU. Flush the + * texture cache so we don't get anything stale. + */ + cmd_buffer->state.pending_pipe_bits |= ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT; + + while (dataSize) { + const uint32_t copy_size = MIN2(dataSize, max_update_size); + + struct anv_state tmp_data = + anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, copy_size, 64); + + memcpy(tmp_data.map, pData, copy_size); + + if (!cmd_buffer->device->info.has_llc) + anv_state_clflush(tmp_data); + + int bs = 16; + bs = gcd_pow2_u64(bs, dstOffset); + bs = gcd_pow2_u64(bs, copy_size); + + do_buffer_copy(&batch, + &cmd_buffer->device->dynamic_state_block_pool.bo, + tmp_data.offset, + dst_buffer->bo, dst_buffer->offset + dstOffset, + copy_size / bs, 1, bs); + + dataSize -= copy_size; + dstOffset += copy_size; + pData = (void *)pData + copy_size; + } + + blorp_batch_finish(&batch); +} + +void anv_CmdFillBuffer( + VkCommandBuffer commandBuffer, + VkBuffer dstBuffer, + VkDeviceSize dstOffset, + VkDeviceSize fillSize, + uint32_t data) +{ + ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); + ANV_FROM_HANDLE(anv_buffer, dst_buffer, dstBuffer); + struct blorp_surf surf; + struct isl_surf isl_surf; + + struct blorp_batch batch; + blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0); + + if (fillSize == VK_WHOLE_SIZE) { + fillSize = dst_buffer->size - dstOffset; + /* Make sure fillSize is a multiple of 4 */ + fillSize &= ~3ull; + } + + /* First, we compute the biggest format that can be used with the + * given offsets and size. + */ + int bs = 16; + bs = gcd_pow2_u64(bs, dstOffset); + bs = gcd_pow2_u64(bs, fillSize); + enum isl_format isl_format = isl_format_for_size(bs); + + union isl_color_value color = { + .u32 = { data, data, data, data }, + }; + + const uint64_t max_fill_size = MAX_SURFACE_DIM * MAX_SURFACE_DIM * bs; + while (fillSize >= max_fill_size) { + get_blorp_surf_for_anv_buffer(cmd_buffer->device, + dst_buffer, dstOffset, + MAX_SURFACE_DIM, MAX_SURFACE_DIM, + MAX_SURFACE_DIM * bs, isl_format, + &surf, &isl_surf); + + blorp_clear(&batch, &surf, isl_format, ISL_SWIZZLE_IDENTITY, + 0, 0, 1, 0, 0, MAX_SURFACE_DIM, MAX_SURFACE_DIM, + color, NULL); + fillSize -= max_fill_size; + dstOffset += max_fill_size; + } + + uint64_t height = fillSize / (MAX_SURFACE_DIM * bs); + assert(height < MAX_SURFACE_DIM); + if (height != 0) { + const uint64_t rect_fill_size = height * MAX_SURFACE_DIM * bs; + get_blorp_surf_for_anv_buffer(cmd_buffer->device, + dst_buffer, dstOffset, + MAX_SURFACE_DIM, height, + MAX_SURFACE_DIM * bs, isl_format, + &surf, &isl_surf); + + blorp_clear(&batch, &surf, isl_format, ISL_SWIZZLE_IDENTITY, + 0, 0, 1, 0, 0, MAX_SURFACE_DIM, height, + color, NULL); + fillSize -= rect_fill_size; + dstOffset += rect_fill_size; + } + + if (fillSize != 0) { + const uint32_t width = fillSize / bs; + get_blorp_surf_for_anv_buffer(cmd_buffer->device, + dst_buffer, dstOffset, + width, 1, + width * bs, isl_format, + &surf, &isl_surf); + + blorp_clear(&batch, &surf, isl_format, ISL_SWIZZLE_IDENTITY, + 0, 0, 1, 0, 0, width, 1, + color, NULL); + } + + blorp_batch_finish(&batch); +} + +void anv_CmdClearColorImage( + VkCommandBuffer commandBuffer, + VkImage _image, + VkImageLayout imageLayout, + const VkClearColorValue* pColor, + uint32_t rangeCount, + const VkImageSubresourceRange* pRanges) +{ + ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); + ANV_FROM_HANDLE(anv_image, image, _image); + + static const bool color_write_disable[4] = { false, false, false, false }; + + struct blorp_batch batch; + blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0); + + struct blorp_surf surf; + get_blorp_surf_for_anv_image(image, VK_IMAGE_ASPECT_COLOR_BIT, + image->aux_usage, &surf); + + for (unsigned r = 0; r < rangeCount; r++) { + if (pRanges[r].aspectMask == 0) + continue; + + assert(pRanges[r].aspectMask == VK_IMAGE_ASPECT_COLOR_BIT); + + struct anv_format src_format = + anv_get_format(&cmd_buffer->device->info, image->vk_format, + VK_IMAGE_ASPECT_COLOR_BIT, image->tiling); + + unsigned base_layer = pRanges[r].baseArrayLayer; + unsigned layer_count = anv_get_layerCount(image, &pRanges[r]); + + for (unsigned i = 0; i < anv_get_levelCount(image, &pRanges[r]); i++) { + const unsigned level = pRanges[r].baseMipLevel + i; + const unsigned level_width = anv_minify(image->extent.width, level); + const unsigned level_height = anv_minify(image->extent.height, level); + + if (image->type == VK_IMAGE_TYPE_3D) { + base_layer = 0; + layer_count = anv_minify(image->extent.depth, level); + } + + blorp_clear(&batch, &surf, + src_format.isl_format, src_format.swizzle, + level, base_layer, layer_count, + 0, 0, level_width, level_height, + vk_to_isl_color(*pColor), color_write_disable); + } + } + + blorp_batch_finish(&batch); +} + +void anv_CmdClearDepthStencilImage( + VkCommandBuffer commandBuffer, + VkImage image_h, + VkImageLayout imageLayout, + const VkClearDepthStencilValue* pDepthStencil, + uint32_t rangeCount, + const VkImageSubresourceRange* pRanges) +{ + ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); + ANV_FROM_HANDLE(anv_image, image, image_h); + + struct blorp_batch batch; + blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0); + + struct blorp_surf depth, stencil; + if (image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT) { + get_blorp_surf_for_anv_image(image, VK_IMAGE_ASPECT_DEPTH_BIT, + ISL_AUX_USAGE_NONE, &depth); + } else { + memset(&depth, 0, sizeof(depth)); + } + + if (image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT) { + get_blorp_surf_for_anv_image(image, VK_IMAGE_ASPECT_STENCIL_BIT, + ISL_AUX_USAGE_NONE, &stencil); + } else { + memset(&stencil, 0, sizeof(stencil)); + } + + for (unsigned r = 0; r < rangeCount; r++) { + if (pRanges[r].aspectMask == 0) + continue; + + bool clear_depth = pRanges[r].aspectMask & VK_IMAGE_ASPECT_DEPTH_BIT; + bool clear_stencil = pRanges[r].aspectMask & VK_IMAGE_ASPECT_STENCIL_BIT; + + unsigned base_layer = pRanges[r].baseArrayLayer; + unsigned layer_count = anv_get_layerCount(image, &pRanges[r]); + + for (unsigned i = 0; i < anv_get_levelCount(image, &pRanges[r]); i++) { + const unsigned level = pRanges[r].baseMipLevel + i; + const unsigned level_width = anv_minify(image->extent.width, level); + const unsigned level_height = anv_minify(image->extent.height, level); + + if (image->type == VK_IMAGE_TYPE_3D) + layer_count = anv_minify(image->extent.depth, level); + + blorp_clear_depth_stencil(&batch, &depth, &stencil, + level, base_layer, layer_count, + 0, 0, level_width, level_height, + clear_depth, pDepthStencil->depth, + clear_stencil ? 0xff : 0, + pDepthStencil->stencil); + } + } + + blorp_batch_finish(&batch); +} + +struct anv_state +anv_cmd_buffer_alloc_blorp_binding_table(struct anv_cmd_buffer *cmd_buffer, + uint32_t num_entries, + uint32_t *state_offset) +{ + struct anv_state bt_state = + anv_cmd_buffer_alloc_binding_table(cmd_buffer, num_entries, + state_offset); + if (bt_state.map == NULL) { + /* We ran out of space. Grab a new binding table block. */ + MAYBE_UNUSED VkResult result = + anv_cmd_buffer_new_binding_table_block(cmd_buffer); + assert(result == VK_SUCCESS); + + /* Re-emit state base addresses so we get the new surface state base + * address before we start emitting binding tables etc. + */ + anv_cmd_buffer_emit_state_base_address(cmd_buffer); + + bt_state = anv_cmd_buffer_alloc_binding_table(cmd_buffer, num_entries, + state_offset); + assert(bt_state.map != NULL); + } + + return bt_state; +} + +static uint32_t +binding_table_for_surface_state(struct anv_cmd_buffer *cmd_buffer, + struct anv_state surface_state) +{ + uint32_t state_offset; + struct anv_state bt_state = + anv_cmd_buffer_alloc_blorp_binding_table(cmd_buffer, 1, &state_offset); + + uint32_t *bt_map = bt_state.map; + bt_map[0] = surface_state.offset + state_offset; + + return bt_state.offset; +} + +static void +clear_color_attachment(struct anv_cmd_buffer *cmd_buffer, + struct blorp_batch *batch, + const VkClearAttachment *attachment, + uint32_t rectCount, const VkClearRect *pRects) +{ + const struct anv_subpass *subpass = cmd_buffer->state.subpass; + const uint32_t color_att = attachment->colorAttachment; + const uint32_t att_idx = subpass->color_attachments[color_att]; + + if (att_idx == VK_ATTACHMENT_UNUSED) + return; + + struct anv_render_pass_attachment *pass_att = + &cmd_buffer->state.pass->attachments[att_idx]; + struct anv_attachment_state *att_state = + &cmd_buffer->state.attachments[att_idx]; + + uint32_t binding_table = + binding_table_for_surface_state(cmd_buffer, att_state->color_rt_state); + + union isl_color_value clear_color = + vk_to_isl_color(attachment->clearValue.color); + + for (uint32_t r = 0; r < rectCount; ++r) { + const VkOffset2D offset = pRects[r].rect.offset; + const VkExtent2D extent = pRects[r].rect.extent; + blorp_clear_attachments(batch, binding_table, + ISL_FORMAT_UNSUPPORTED, pass_att->samples, + pRects[r].baseArrayLayer, + pRects[r].layerCount, + offset.x, offset.y, + offset.x + extent.width, offset.y + extent.height, + true, clear_color, false, 0.0f, 0, 0); + } +} + +static void +clear_depth_stencil_attachment(struct anv_cmd_buffer *cmd_buffer, + struct blorp_batch *batch, + const VkClearAttachment *attachment, + uint32_t rectCount, const VkClearRect *pRects) +{ + static const union isl_color_value color_value = { .u32 = { 0, } }; + const struct anv_subpass *subpass = cmd_buffer->state.subpass; + const uint32_t att_idx = subpass->depth_stencil_attachment; + + if (att_idx == VK_ATTACHMENT_UNUSED) + return; + + struct anv_render_pass_attachment *pass_att = + &cmd_buffer->state.pass->attachments[att_idx]; + + bool clear_depth = attachment->aspectMask & VK_IMAGE_ASPECT_DEPTH_BIT; + bool clear_stencil = attachment->aspectMask & VK_IMAGE_ASPECT_STENCIL_BIT; + + enum isl_format depth_format = ISL_FORMAT_UNSUPPORTED; + if (clear_depth) { + depth_format = anv_get_isl_format(&cmd_buffer->device->info, + pass_att->format, + VK_IMAGE_ASPECT_DEPTH_BIT, + VK_IMAGE_TILING_OPTIMAL); + } + + uint32_t binding_table = + binding_table_for_surface_state(cmd_buffer, + cmd_buffer->state.null_surface_state); + + for (uint32_t r = 0; r < rectCount; ++r) { + const VkOffset2D offset = pRects[r].rect.offset; + const VkExtent2D extent = pRects[r].rect.extent; + VkClearDepthStencilValue value = attachment->clearValue.depthStencil; + blorp_clear_attachments(batch, binding_table, + depth_format, pass_att->samples, + pRects[r].baseArrayLayer, + pRects[r].layerCount, + offset.x, offset.y, + offset.x + extent.width, offset.y + extent.height, + false, color_value, + clear_depth, value.depth, + clear_stencil ? 0xff : 0, value.stencil); + } +} + +void anv_CmdClearAttachments( + VkCommandBuffer commandBuffer, + uint32_t attachmentCount, + const VkClearAttachment* pAttachments, + uint32_t rectCount, + const VkClearRect* pRects) +{ + ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); + + /* Because this gets called within a render pass, we tell blorp not to + * trash our depth and stencil buffers. + */ + struct blorp_batch batch; + blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, + BLORP_BATCH_NO_EMIT_DEPTH_STENCIL); + + for (uint32_t a = 0; a < attachmentCount; ++a) { + if (pAttachments[a].aspectMask == VK_IMAGE_ASPECT_COLOR_BIT) { + clear_color_attachment(cmd_buffer, &batch, + &pAttachments[a], + rectCount, pRects); + } else { + clear_depth_stencil_attachment(cmd_buffer, &batch, + &pAttachments[a], + rectCount, pRects); + } + } + + blorp_batch_finish(&batch); +} + +enum subpass_stage { + SUBPASS_STAGE_LOAD, + SUBPASS_STAGE_DRAW, + SUBPASS_STAGE_RESOLVE, +}; + +static bool +attachment_needs_flush(struct anv_cmd_buffer *cmd_buffer, + struct anv_render_pass_attachment *att, + enum subpass_stage stage) +{ + struct anv_render_pass *pass = cmd_buffer->state.pass; + struct anv_subpass *subpass = cmd_buffer->state.subpass; + unsigned subpass_idx = subpass - pass->subpasses; + assert(subpass_idx < pass->subpass_count); + + /* We handle this subpass specially based on the current stage */ + enum anv_subpass_usage usage = att->subpass_usage[subpass_idx]; + switch (stage) { + case SUBPASS_STAGE_LOAD: + if (usage & (ANV_SUBPASS_USAGE_INPUT | ANV_SUBPASS_USAGE_RESOLVE_SRC)) + return true; + break; + + case SUBPASS_STAGE_DRAW: + if (usage & ANV_SUBPASS_USAGE_RESOLVE_SRC) + return true; + break; + + default: + break; + } + + for (uint32_t s = subpass_idx + 1; s < pass->subpass_count; s++) { + usage = att->subpass_usage[s]; + + /* If this attachment is going to be used as an input in this or any + * future subpass, then we need to flush its cache and invalidate the + * texture cache. + */ + if (att->subpass_usage[s] & ANV_SUBPASS_USAGE_INPUT) + return true; + + if (usage & (ANV_SUBPASS_USAGE_DRAW | ANV_SUBPASS_USAGE_RESOLVE_DST)) { + /* We found another subpass that draws to this attachment. We'll + * wait to resolve until then. + */ + return false; + } + } + + return false; +} + +static void +anv_cmd_buffer_flush_attachments(struct anv_cmd_buffer *cmd_buffer, + enum subpass_stage stage) +{ + struct anv_subpass *subpass = cmd_buffer->state.subpass; + struct anv_render_pass *pass = cmd_buffer->state.pass; + + for (uint32_t i = 0; i < subpass->color_count; ++i) { + uint32_t att = subpass->color_attachments[i]; + if (att == VK_ATTACHMENT_UNUSED) + continue; + + assert(att < pass->attachment_count); + if (attachment_needs_flush(cmd_buffer, &pass->attachments[att], stage)) { + cmd_buffer->state.pending_pipe_bits |= + ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT | + ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT; + } + } + + if (subpass->depth_stencil_attachment != VK_ATTACHMENT_UNUSED) { + uint32_t att = subpass->depth_stencil_attachment; + assert(att < pass->attachment_count); + if (attachment_needs_flush(cmd_buffer, &pass->attachments[att], stage)) { + cmd_buffer->state.pending_pipe_bits |= + ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT | + ANV_PIPE_DEPTH_CACHE_FLUSH_BIT; + } + } +} + +static bool +subpass_needs_clear(const struct anv_cmd_buffer *cmd_buffer) +{ + const struct anv_cmd_state *cmd_state = &cmd_buffer->state; + uint32_t ds = cmd_state->subpass->depth_stencil_attachment; + + for (uint32_t i = 0; i < cmd_state->subpass->color_count; ++i) { + uint32_t a = cmd_state->subpass->color_attachments[i]; + if (a == VK_ATTACHMENT_UNUSED) + continue; + + assert(a < cmd_state->pass->attachment_count); + if (cmd_state->attachments[a].pending_clear_aspects) { + return true; + } + } + + if (ds != VK_ATTACHMENT_UNUSED) { + assert(ds < cmd_state->pass->attachment_count); + if (cmd_state->attachments[ds].pending_clear_aspects) + return true; + } + + return false; +} + +void +anv_cmd_buffer_clear_subpass(struct anv_cmd_buffer *cmd_buffer) +{ + const struct anv_cmd_state *cmd_state = &cmd_buffer->state; + const VkRect2D render_area = cmd_buffer->state.render_area; + + + if (!subpass_needs_clear(cmd_buffer)) + return; + + /* Because this gets called within a render pass, we tell blorp not to + * trash our depth and stencil buffers. + */ + struct blorp_batch batch; + blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, + BLORP_BATCH_NO_EMIT_DEPTH_STENCIL); + + VkClearRect clear_rect = { + .rect = cmd_buffer->state.render_area, + .baseArrayLayer = 0, + .layerCount = cmd_buffer->state.framebuffer->layers, + }; + + struct anv_framebuffer *fb = cmd_buffer->state.framebuffer; + for (uint32_t i = 0; i < cmd_state->subpass->color_count; ++i) { + const uint32_t a = cmd_state->subpass->color_attachments[i]; + if (a == VK_ATTACHMENT_UNUSED) + continue; + + assert(a < cmd_state->pass->attachment_count); + struct anv_attachment_state *att_state = &cmd_state->attachments[a]; + + if (!att_state->pending_clear_aspects) + continue; + + assert(att_state->pending_clear_aspects == VK_IMAGE_ASPECT_COLOR_BIT); + + struct anv_image_view *iview = fb->attachments[a]; + const struct anv_image *image = iview->image; + struct blorp_surf surf; + get_blorp_surf_for_anv_image(image, VK_IMAGE_ASPECT_COLOR_BIT, + att_state->aux_usage, &surf); + + if (att_state->fast_clear) { + surf.clear_color = vk_to_isl_color(att_state->clear_value.color); + + /* From the Sky Lake PRM Vol. 7, "Render Target Fast Clear": + * + * "After Render target fast clear, pipe-control with color cache + * write-flush must be issued before sending any DRAW commands on + * that render target." + * + * This comment is a bit cryptic and doesn't really tell you what's + * going or what's really needed. It appears that fast clear ops are + * not properly synchronized with other drawing. This means that we + * cannot have a fast clear operation in the pipe at the same time as + * other regular drawing operations. We need to use a PIPE_CONTROL + * to ensure that the contents of the previous draw hit the render + * target before we resolve and then use a second PIPE_CONTROL after + * the resolve to ensure that it is completed before any additional + * drawing occurs. + */ + cmd_buffer->state.pending_pipe_bits |= + ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT | ANV_PIPE_CS_STALL_BIT; + + blorp_fast_clear(&batch, &surf, iview->isl.format, + iview->isl.base_level, + iview->isl.base_array_layer, fb->layers, + render_area.offset.x, render_area.offset.y, + render_area.offset.x + render_area.extent.width, + render_area.offset.y + render_area.extent.height); + + cmd_buffer->state.pending_pipe_bits |= + ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT | ANV_PIPE_CS_STALL_BIT; + } else { + blorp_clear(&batch, &surf, iview->isl.format, iview->isl.swizzle, + iview->isl.base_level, + iview->isl.base_array_layer, fb->layers, + render_area.offset.x, render_area.offset.y, + render_area.offset.x + render_area.extent.width, + render_area.offset.y + render_area.extent.height, + vk_to_isl_color(att_state->clear_value.color), NULL); + } + + att_state->pending_clear_aspects = 0; + } + + const uint32_t ds = cmd_state->subpass->depth_stencil_attachment; + assert(ds == VK_ATTACHMENT_UNUSED || ds < cmd_state->pass->attachment_count); + + if (ds != VK_ATTACHMENT_UNUSED && + cmd_state->attachments[ds].pending_clear_aspects) { + + VkClearAttachment clear_att = { + .aspectMask = cmd_state->attachments[ds].pending_clear_aspects, + .clearValue = cmd_state->attachments[ds].clear_value, + }; + + + const uint8_t gen = cmd_buffer->device->info.gen; + bool clear_with_hiz = gen >= 8 && cmd_state->attachments[ds].aux_usage == + ISL_AUX_USAGE_HIZ; + const struct anv_image_view *iview = fb->attachments[ds]; + + if (clear_with_hiz) { + const bool clear_depth = clear_att.aspectMask & + VK_IMAGE_ASPECT_DEPTH_BIT; + const bool clear_stencil = clear_att.aspectMask & + VK_IMAGE_ASPECT_STENCIL_BIT; + + /* Check against restrictions for depth buffer clearing. A great GPU + * performance benefit isn't expected when using the HZ sequence for + * stencil-only clears. Therefore, we don't emit a HZ op sequence for + * a stencil clear in addition to using the BLORP-fallback for depth. + */ + if (clear_depth) { + if (!blorp_can_hiz_clear_depth(gen, iview->isl.format, + iview->image->samples, + render_area.offset.x, + render_area.offset.y, + render_area.offset.x + + render_area.extent.width, + render_area.offset.y + + render_area.extent.height)) { + clear_with_hiz = false; + } else if (clear_att.clearValue.depthStencil.depth != + ANV_HZ_FC_VAL) { + /* Don't enable fast depth clears for any color not equal to + * ANV_HZ_FC_VAL. + */ + clear_with_hiz = false; + } else if (gen == 8 && + anv_can_sample_with_hiz(cmd_buffer->device->info.gen, + iview->image->samples)) { + /* Only gen9+ supports returning ANV_HZ_FC_VAL when sampling a + * fast-cleared portion of a HiZ buffer. Testing has revealed + * that Gen8 only supports returning 0.0f. Gens prior to gen8 do + * not support this feature at all. + */ + clear_with_hiz = false; + } + } + + if (clear_with_hiz) { + blorp_gen8_hiz_clear_attachments(&batch, iview->image->samples, + render_area.offset.x, + render_area.offset.y, + render_area.offset.x + + render_area.extent.width, + render_area.offset.y + + render_area.extent.height, + clear_depth, clear_stencil, + clear_att.clearValue. + depthStencil.stencil); + } + } + + if (!clear_with_hiz) { + clear_depth_stencil_attachment(cmd_buffer, &batch, + &clear_att, 1, &clear_rect); + } + + cmd_state->attachments[ds].pending_clear_aspects = 0; + } + + blorp_batch_finish(&batch); + + anv_cmd_buffer_flush_attachments(cmd_buffer, SUBPASS_STAGE_LOAD); +} + +static void +resolve_image(struct blorp_batch *batch, + const struct anv_image *src_image, + uint32_t src_level, uint32_t src_layer, + const struct anv_image *dst_image, + uint32_t dst_level, uint32_t dst_layer, + VkImageAspectFlags aspect_mask, + uint32_t src_x, uint32_t src_y, uint32_t dst_x, uint32_t dst_y, + uint32_t width, uint32_t height) +{ + assert(src_image->type == VK_IMAGE_TYPE_2D); + assert(src_image->samples > 1); + assert(dst_image->type == VK_IMAGE_TYPE_2D); + assert(dst_image->samples == 1); + + uint32_t a; + for_each_bit(a, aspect_mask) { + VkImageAspectFlagBits aspect = 1 << a; + + struct blorp_surf src_surf, dst_surf; + get_blorp_surf_for_anv_image(src_image, aspect, + src_image->aux_usage, &src_surf); + get_blorp_surf_for_anv_image(dst_image, aspect, + dst_image->aux_usage, &dst_surf); + + blorp_blit(batch, + &src_surf, src_level, src_layer, + ISL_FORMAT_UNSUPPORTED, ISL_SWIZZLE_IDENTITY, + &dst_surf, dst_level, dst_layer, + ISL_FORMAT_UNSUPPORTED, ISL_SWIZZLE_IDENTITY, + src_x, src_y, src_x + width, src_y + height, + dst_x, dst_y, dst_x + width, dst_y + height, + 0x2600 /* GL_NEAREST */, false, false); + } +} + +void anv_CmdResolveImage( + VkCommandBuffer commandBuffer, + VkImage srcImage, + VkImageLayout srcImageLayout, + VkImage dstImage, + VkImageLayout dstImageLayout, + uint32_t regionCount, + const VkImageResolve* pRegions) +{ + ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); + ANV_FROM_HANDLE(anv_image, src_image, srcImage); + ANV_FROM_HANDLE(anv_image, dst_image, dstImage); + + struct blorp_batch batch; + blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0); + + for (uint32_t r = 0; r < regionCount; r++) { + assert(pRegions[r].srcSubresource.aspectMask == + pRegions[r].dstSubresource.aspectMask); + assert(anv_get_layerCount(src_image, &pRegions[r].srcSubresource) == + anv_get_layerCount(dst_image, &pRegions[r].dstSubresource)); + + const uint32_t layer_count = + anv_get_layerCount(dst_image, &pRegions[r].dstSubresource); + + for (uint32_t layer = 0; layer < layer_count; layer++) { + resolve_image(&batch, + src_image, pRegions[r].srcSubresource.mipLevel, + pRegions[r].srcSubresource.baseArrayLayer + layer, + dst_image, pRegions[r].dstSubresource.mipLevel, + pRegions[r].dstSubresource.baseArrayLayer + layer, + pRegions[r].dstSubresource.aspectMask, + pRegions[r].srcOffset.x, pRegions[r].srcOffset.y, + pRegions[r].dstOffset.x, pRegions[r].dstOffset.y, + pRegions[r].extent.width, pRegions[r].extent.height); + } + } + + blorp_batch_finish(&batch); +} + +static void +ccs_resolve_attachment(struct anv_cmd_buffer *cmd_buffer, + struct blorp_batch *batch, + uint32_t att) +{ + struct anv_framebuffer *fb = cmd_buffer->state.framebuffer; + struct anv_attachment_state *att_state = + &cmd_buffer->state.attachments[att]; + + if (att_state->aux_usage == ISL_AUX_USAGE_NONE) + return; /* Nothing to resolve */ + + assert(att_state->aux_usage == ISL_AUX_USAGE_CCS_E || + att_state->aux_usage == ISL_AUX_USAGE_CCS_D); + + struct anv_render_pass *pass = cmd_buffer->state.pass; + struct anv_subpass *subpass = cmd_buffer->state.subpass; + unsigned subpass_idx = subpass - pass->subpasses; + assert(subpass_idx < pass->subpass_count); + + /* Scan forward to see what all ways this attachment will be used. + * Ideally, we would like to resolve in the same subpass as the last write + * of a particular attachment. That way we only resolve once but it's + * still hot in the cache. + */ + bool found_draw = false; + enum anv_subpass_usage usage = 0; + for (uint32_t s = subpass_idx + 1; s < pass->subpass_count; s++) { + usage |= pass->attachments[att].subpass_usage[s]; + + if (usage & (ANV_SUBPASS_USAGE_DRAW | ANV_SUBPASS_USAGE_RESOLVE_DST)) { + /* We found another subpass that draws to this attachment. We'll + * wait to resolve until then. + */ + found_draw = true; + break; + } + } + + struct anv_image_view *iview = fb->attachments[att]; + const struct anv_image *image = iview->image; + assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT); + + enum blorp_fast_clear_op resolve_op = BLORP_FAST_CLEAR_OP_NONE; + if (!found_draw) { + /* This is the last subpass that writes to this attachment so we need to + * resolve here. Ideally, we would like to only resolve if the storeOp + * is set to VK_ATTACHMENT_STORE_OP_STORE. However, we need to ensure + * that the CCS bits are set to "resolved" because there may be copy or + * blit operations (which may ignore CCS) between now and the next time + * we render and we need to ensure that anything they write will be + * respected in the next render. Unfortunately, the hardware does not + * provide us with any sort of "invalidate" pass that sets the CCS to + * "resolved" without writing to the render target. + */ + if (iview->image->aux_usage != ISL_AUX_USAGE_CCS_E) { + /* The image destination surface doesn't support compression outside + * the render pass. We need a full resolve. + */ + resolve_op = BLORP_FAST_CLEAR_OP_RESOLVE_FULL; + } else if (att_state->fast_clear) { + /* We don't know what to do with clear colors outside the render + * pass. We need a partial resolve. Only transparent black is + * built into the surface state object and thus no resolve is + * required for this case. + */ + if (att_state->clear_value.color.uint32[0] || + att_state->clear_value.color.uint32[1] || + att_state->clear_value.color.uint32[2] || + att_state->clear_value.color.uint32[3]) + resolve_op = BLORP_FAST_CLEAR_OP_RESOLVE_PARTIAL; + } else { + /* The image "natively" supports all the compression we care about + * and we don't need to resolve at all. If this is the case, we also + * don't need to resolve for any of the input attachment cases below. + */ + } + } else if (usage & ANV_SUBPASS_USAGE_INPUT) { + /* Input attachments are clear-color aware so, at least on Sky Lake, we + * can frequently sample from them with no resolves at all. + */ + if (att_state->aux_usage != att_state->input_aux_usage) { + assert(att_state->input_aux_usage == ISL_AUX_USAGE_NONE); + resolve_op = BLORP_FAST_CLEAR_OP_RESOLVE_FULL; + } else if (!att_state->clear_color_is_zero_one) { + /* Sky Lake PRM, Vol. 2d, RENDER_SURFACE_STATE::Red Clear Color: + * + * "If Number of Multisamples is MULTISAMPLECOUNT_1 AND if this RT + * is fast cleared with non-0/1 clear value, this RT must be + * partially resolved (refer to Partial Resolve operation) before + * binding this surface to Sampler." + */ + resolve_op = BLORP_FAST_CLEAR_OP_RESOLVE_PARTIAL; + } + } + + if (resolve_op == BLORP_FAST_CLEAR_OP_NONE) + return; + + struct blorp_surf surf; + get_blorp_surf_for_anv_image(image, VK_IMAGE_ASPECT_COLOR_BIT, + att_state->aux_usage, &surf); + if (att_state->fast_clear) + surf.clear_color = vk_to_isl_color(att_state->clear_value.color); + + /* From the Sky Lake PRM Vol. 7, "Render Target Resolve": + * + * "When performing a render target resolve, PIPE_CONTROL with end of + * pipe sync must be delivered." + * + * This comment is a bit cryptic and doesn't really tell you what's going + * or what's really needed. It appears that fast clear ops are not + * properly synchronized with other drawing. We need to use a PIPE_CONTROL + * to ensure that the contents of the previous draw hit the render target + * before we resolve and then use a second PIPE_CONTROL after the resolve + * to ensure that it is completed before any additional drawing occurs. + */ + cmd_buffer->state.pending_pipe_bits |= + ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT | ANV_PIPE_CS_STALL_BIT; + + for (uint32_t layer = 0; layer < fb->layers; layer++) { + blorp_ccs_resolve(batch, &surf, + iview->isl.base_level, + iview->isl.base_array_layer + layer, + iview->isl.format, resolve_op); + } + + cmd_buffer->state.pending_pipe_bits |= + ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT | ANV_PIPE_CS_STALL_BIT; + + /* Once we've done any sort of resolve, we're no longer fast-cleared */ + att_state->fast_clear = false; + if (att_state->aux_usage == ISL_AUX_USAGE_CCS_D) + att_state->aux_usage = ISL_AUX_USAGE_NONE; +} + +void +anv_cmd_buffer_resolve_subpass(struct anv_cmd_buffer *cmd_buffer) +{ + struct anv_framebuffer *fb = cmd_buffer->state.framebuffer; + struct anv_subpass *subpass = cmd_buffer->state.subpass; + + + struct blorp_batch batch; + blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0); + + for (uint32_t i = 0; i < subpass->color_count; ++i) { + const uint32_t att = subpass->color_attachments[i]; + if (att == VK_ATTACHMENT_UNUSED) + continue; + + assert(att < cmd_buffer->state.pass->attachment_count); + ccs_resolve_attachment(cmd_buffer, &batch, att); + } + + anv_cmd_buffer_flush_attachments(cmd_buffer, SUBPASS_STAGE_DRAW); + + if (subpass->has_resolve) { + for (uint32_t i = 0; i < subpass->color_count; ++i) { + uint32_t src_att = subpass->color_attachments[i]; + uint32_t dst_att = subpass->resolve_attachments[i]; + + if (dst_att == VK_ATTACHMENT_UNUSED) + continue; + + assert(src_att < cmd_buffer->state.pass->attachment_count); + assert(dst_att < cmd_buffer->state.pass->attachment_count); + + if (cmd_buffer->state.attachments[dst_att].pending_clear_aspects) { + /* From the Vulkan 1.0 spec: + * + * If the first use of an attachment in a render pass is as a + * resolve attachment, then the loadOp is effectively ignored + * as the resolve is guaranteed to overwrite all pixels in the + * render area. + */ + cmd_buffer->state.attachments[dst_att].pending_clear_aspects = 0; + } + + struct anv_image_view *src_iview = fb->attachments[src_att]; + struct anv_image_view *dst_iview = fb->attachments[dst_att]; + + const VkRect2D render_area = cmd_buffer->state.render_area; + + assert(src_iview->aspect_mask == dst_iview->aspect_mask); + resolve_image(&batch, src_iview->image, + src_iview->isl.base_level, + src_iview->isl.base_array_layer, + dst_iview->image, + dst_iview->isl.base_level, + dst_iview->isl.base_array_layer, + src_iview->aspect_mask, + render_area.offset.x, render_area.offset.y, + render_area.offset.x, render_area.offset.y, + render_area.extent.width, render_area.extent.height); + + ccs_resolve_attachment(cmd_buffer, &batch, dst_att); + } + + anv_cmd_buffer_flush_attachments(cmd_buffer, SUBPASS_STAGE_RESOLVE); + } + + blorp_batch_finish(&batch); +} + +void +anv_gen8_hiz_op_resolve(struct anv_cmd_buffer *cmd_buffer, + const struct anv_image *image, + enum blorp_hiz_op op) +{ + assert(image); + + /* Don't resolve depth buffers without an auxiliary HiZ buffer and + * don't perform such a resolve on gens that don't support it. + */ + if (cmd_buffer->device->info.gen < 8 || + image->aux_usage != ISL_AUX_USAGE_HIZ) + return; + + assert(op == BLORP_HIZ_OP_HIZ_RESOLVE || + op == BLORP_HIZ_OP_DEPTH_RESOLVE); + + struct blorp_batch batch; + blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0); + + struct blorp_surf surf; + get_blorp_surf_for_anv_image(image, VK_IMAGE_ASPECT_DEPTH_BIT, + ISL_AUX_USAGE_NONE, &surf); + + /* Manually add the aux HiZ surf */ + surf.aux_surf = &image->aux_surface.isl, + surf.aux_addr = (struct blorp_address) { + .buffer = image->bo, + .offset = image->offset + image->aux_surface.offset, + }; + surf.aux_usage = ISL_AUX_USAGE_HIZ; + + surf.clear_color.u32[0] = (uint32_t) ANV_HZ_FC_VAL; + + blorp_gen6_hiz_op(&batch, &surf, 0, 0, op); + blorp_batch_finish(&batch); +} diff -Nru mesa-12.0.6/src/intel/vulkan/anv_cmd_buffer.c mesa-17.0.7/src/intel/vulkan/anv_cmd_buffer.c --- mesa-12.0.6/src/intel/vulkan/anv_cmd_buffer.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_cmd_buffer.c 2017-06-01 10:37:10.000000000 +0000 @@ -118,7 +118,12 @@ struct anv_cmd_state *state = &cmd_buffer->state; memset(&state->descriptors, 0, sizeof(state->descriptors)); - memset(&state->push_constants, 0, sizeof(state->push_constants)); + for (uint32_t i = 0; i < MESA_SHADER_STAGES; i++) { + if (state->push_constants[i] != NULL) { + vk_free(&cmd_buffer->pool->alloc, state->push_constants[i]); + state->push_constants[i] = NULL; + } + } memset(state->binding_tables, 0, sizeof(state->binding_tables)); memset(state->samplers, 0, sizeof(state->samplers)); @@ -137,82 +142,26 @@ state->need_query_wa = true; if (state->attachments != NULL) { - anv_free(&cmd_buffer->pool->alloc, state->attachments); + vk_free(&cmd_buffer->pool->alloc, state->attachments); state->attachments = NULL; } state->gen7.index_buffer = NULL; } -/** - * Setup anv_cmd_state::attachments for vkCmdBeginRenderPass. - */ -void -anv_cmd_state_setup_attachments(struct anv_cmd_buffer *cmd_buffer, - const VkRenderPassBeginInfo *info) -{ - struct anv_cmd_state *state = &cmd_buffer->state; - ANV_FROM_HANDLE(anv_render_pass, pass, info->renderPass); - - anv_free(&cmd_buffer->pool->alloc, state->attachments); - - if (pass->attachment_count == 0) { - state->attachments = NULL; - return; - } - - state->attachments = anv_alloc(&cmd_buffer->pool->alloc, - pass->attachment_count * - sizeof(state->attachments[0]), - 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); - if (state->attachments == NULL) { - /* FIXME: Propagate VK_ERROR_OUT_OF_HOST_MEMORY to vkEndCommandBuffer */ - abort(); - } - - for (uint32_t i = 0; i < pass->attachment_count; ++i) { - struct anv_render_pass_attachment *att = &pass->attachments[i]; - VkImageAspectFlags att_aspects = vk_format_aspects(att->format); - VkImageAspectFlags clear_aspects = 0; - - if (att_aspects == VK_IMAGE_ASPECT_COLOR_BIT) { - /* color attachment */ - if (att->load_op == VK_ATTACHMENT_LOAD_OP_CLEAR) { - clear_aspects |= VK_IMAGE_ASPECT_COLOR_BIT; - } - } else { - /* depthstencil attachment */ - if ((att_aspects & VK_IMAGE_ASPECT_DEPTH_BIT) && - att->load_op == VK_ATTACHMENT_LOAD_OP_CLEAR) { - clear_aspects |= VK_IMAGE_ASPECT_DEPTH_BIT; - } - if ((att_aspects & VK_IMAGE_ASPECT_STENCIL_BIT) && - att->stencil_load_op == VK_ATTACHMENT_LOAD_OP_CLEAR) { - clear_aspects |= VK_IMAGE_ASPECT_STENCIL_BIT; - } - } - - state->attachments[i].pending_clear_aspects = clear_aspects; - if (clear_aspects) { - assert(info->clearValueCount > i); - state->attachments[i].clear_value = info->pClearValues[i]; - } - } -} - -static VkResult +VkResult anv_cmd_buffer_ensure_push_constants_size(struct anv_cmd_buffer *cmd_buffer, gl_shader_stage stage, uint32_t size) { struct anv_push_constants **ptr = &cmd_buffer->state.push_constants[stage]; if (*ptr == NULL) { - *ptr = anv_alloc(&cmd_buffer->pool->alloc, size, 8, + *ptr = vk_alloc(&cmd_buffer->pool->alloc, size, 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (*ptr == NULL) return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); } else if ((*ptr)->size < size) { - *ptr = anv_realloc(&cmd_buffer->pool->alloc, *ptr, size, 8, + *ptr = vk_realloc(&cmd_buffer->pool->alloc, *ptr, size, 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (*ptr == NULL) return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); @@ -222,11 +171,6 @@ return VK_SUCCESS; } -#define anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, stage, field) \ - anv_cmd_buffer_ensure_push_constants_size(cmd_buffer, stage, \ - (offsetof(struct anv_push_constants, field) + \ - sizeof(cmd_buffer->state.push_constants[0]->field))) - static VkResult anv_create_cmd_buffer( struct anv_device * device, struct anv_cmd_pool * pool, @@ -236,11 +180,14 @@ struct anv_cmd_buffer *cmd_buffer; VkResult result; - cmd_buffer = anv_alloc(&pool->alloc, sizeof(*cmd_buffer), 8, + cmd_buffer = vk_alloc(&pool->alloc, sizeof(*cmd_buffer), 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (cmd_buffer == NULL) return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + for (uint32_t i = 0; i < MESA_SHADER_STAGES; i++) { + cmd_buffer->state.push_constants[i] = NULL; + } cmd_buffer->_loader_data.loaderMagic = ICD_LOADER_MAGIC; cmd_buffer->device = device; cmd_buffer->pool = pool; @@ -270,7 +217,7 @@ return VK_SUCCESS; fail: - anv_free(&cmd_buffer->pool->alloc, cmd_buffer); + vk_free(&cmd_buffer->pool->alloc, cmd_buffer); return result; } @@ -293,9 +240,12 @@ break; } - if (result != VK_SUCCESS) + if (result != VK_SUCCESS) { anv_FreeCommandBuffers(_device, pAllocateInfo->commandPool, i, pCommandBuffers); + for (i = 0; i < pAllocateInfo->commandBufferCount; i++) + pCommandBuffers[i] = VK_NULL_HANDLE; + } return result; } @@ -310,8 +260,8 @@ anv_state_stream_finish(&cmd_buffer->surface_state_stream); anv_state_stream_finish(&cmd_buffer->dynamic_state_stream); - anv_free(&cmd_buffer->pool->alloc, cmd_buffer->state.attachments); - anv_free(&cmd_buffer->pool->alloc, cmd_buffer); + vk_free(&cmd_buffer->pool->alloc, cmd_buffer->state.attachments); + vk_free(&cmd_buffer->pool->alloc, cmd_buffer); } void anv_FreeCommandBuffers( @@ -323,11 +273,14 @@ for (uint32_t i = 0; i < commandBufferCount; i++) { ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, pCommandBuffers[i]); + if (!cmd_buffer) + continue; + anv_cmd_buffer_destroy(cmd_buffer); } } -static VkResult +VkResult anv_cmd_buffer_reset(struct anv_cmd_buffer *cmd_buffer) { cmd_buffer->usage_flags = 0; @@ -371,72 +324,6 @@ } } -VkResult anv_BeginCommandBuffer( - VkCommandBuffer commandBuffer, - const VkCommandBufferBeginInfo* pBeginInfo) -{ - ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); - - /* If this is the first vkBeginCommandBuffer, we must *initialize* the - * command buffer's state. Otherwise, we must *reset* its state. In both - * cases we reset it. - * - * From the Vulkan 1.0 spec: - * - * If a command buffer is in the executable state and the command buffer - * was allocated from a command pool with the - * VK_COMMAND_POOL_CREATE_RESET_COMMAND_BUFFER_BIT flag set, then - * vkBeginCommandBuffer implicitly resets the command buffer, behaving - * as if vkResetCommandBuffer had been called with - * VK_COMMAND_BUFFER_RESET_RELEASE_RESOURCES_BIT not set. It then puts - * the command buffer in the recording state. - */ - anv_cmd_buffer_reset(cmd_buffer); - - cmd_buffer->usage_flags = pBeginInfo->flags; - - assert(cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_SECONDARY || - !(cmd_buffer->usage_flags & VK_COMMAND_BUFFER_USAGE_RENDER_PASS_CONTINUE_BIT)); - - anv_cmd_buffer_emit_state_base_address(cmd_buffer); - - if (cmd_buffer->usage_flags & - VK_COMMAND_BUFFER_USAGE_RENDER_PASS_CONTINUE_BIT) { - cmd_buffer->state.framebuffer = - anv_framebuffer_from_handle(pBeginInfo->pInheritanceInfo->framebuffer); - cmd_buffer->state.pass = - anv_render_pass_from_handle(pBeginInfo->pInheritanceInfo->renderPass); - - struct anv_subpass *subpass = - &cmd_buffer->state.pass->subpasses[pBeginInfo->pInheritanceInfo->subpass]; - - anv_cmd_buffer_set_subpass(cmd_buffer, subpass); - } - - return VK_SUCCESS; -} - -VkResult anv_EndCommandBuffer( - VkCommandBuffer commandBuffer) -{ - ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); - struct anv_device *device = cmd_buffer->device; - - anv_cmd_buffer_end_batch_buffer(cmd_buffer); - - if (cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY) { - /* The algorithm used to compute the validate list is not threadsafe as - * it uses the bo->index field. We have to lock the device around it. - * Fortunately, the chances for contention here are probably very low. - */ - pthread_mutex_lock(&device->mutex); - anv_cmd_buffer_prepare_execbuf(cmd_buffer); - pthread_mutex_unlock(&device->mutex); - } - - return VK_SUCCESS; -} - void anv_CmdBindPipeline( VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, @@ -620,7 +507,6 @@ assert(firstSet + descriptorSetCount < MAX_SETS); - uint32_t dynamic_slot = 0; for (uint32_t i = 0; i < descriptorSetCount; i++) { ANV_FROM_HANDLE(anv_descriptor_set, set, pDescriptorSets[i]); set_layout = layout->set[firstSet + i].layout; @@ -638,7 +524,7 @@ cmd_buffer->state.push_constants[s]; unsigned d = layout->set[firstSet + i].dynamic_offset_start; - const uint32_t *offsets = pDynamicOffsets + dynamic_slot; + const uint32_t *offsets = pDynamicOffsets; struct anv_descriptor *desc = set->descriptors; for (unsigned b = 0; b < set_layout->binding_count; b++) { @@ -647,11 +533,9 @@ unsigned array_size = set_layout->binding[b].array_size; for (unsigned j = 0; j < array_size; j++) { - uint32_t range = 0; - if (desc->buffer_view) - range = desc->buffer_view->range; push->dynamic[d].offset = *(offsets++); - push->dynamic[d].range = range; + push->dynamic[d].range = (desc->buffer_view) ? + desc->buffer_view->range : 0; desc++; d++; } @@ -683,20 +567,6 @@ } } -static void -add_surface_state_reloc(struct anv_cmd_buffer *cmd_buffer, - struct anv_state state, struct anv_bo *bo, uint32_t offset) -{ - /* The address goes in SURFACE_STATE dword 1 for gens < 8 and dwords 8 and - * 9 for gen8+. We only write the first dword for gen8+ here and rely on - * the initial state to set the high bits to 0. */ - - const uint32_t dword = cmd_buffer->device->info.gen < 8 ? 1 : 8; - - anv_reloc_list_add(&cmd_buffer->surface_relocs, &cmd_buffer->pool->alloc, - state.offset + dword * 4, bo, offset); -} - enum isl_format anv_isl_format_for_descriptor_type(VkDescriptorType type) { @@ -714,306 +584,6 @@ } } -static struct anv_state -anv_cmd_buffer_alloc_null_surface_state(struct anv_cmd_buffer *cmd_buffer, - struct anv_framebuffer *fb) -{ - switch (cmd_buffer->device->info.gen) { - case 7: - if (cmd_buffer->device->info.is_haswell) { - return gen75_cmd_buffer_alloc_null_surface_state(cmd_buffer, fb); - } else { - return gen7_cmd_buffer_alloc_null_surface_state(cmd_buffer, fb); - } - case 8: - return gen8_cmd_buffer_alloc_null_surface_state(cmd_buffer, fb); - case 9: - return gen9_cmd_buffer_alloc_null_surface_state(cmd_buffer, fb); - default: - unreachable("Invalid hardware generation"); - } -} - -VkResult -anv_cmd_buffer_emit_binding_table(struct anv_cmd_buffer *cmd_buffer, - gl_shader_stage stage, - struct anv_state *bt_state) -{ - struct anv_framebuffer *fb = cmd_buffer->state.framebuffer; - struct anv_subpass *subpass = cmd_buffer->state.subpass; - struct anv_pipeline *pipeline; - uint32_t bias, state_offset; - - switch (stage) { - case MESA_SHADER_COMPUTE: - pipeline = cmd_buffer->state.compute_pipeline; - bias = 1; - break; - default: - pipeline = cmd_buffer->state.pipeline; - bias = 0; - break; - } - - if (!anv_pipeline_has_stage(pipeline, stage)) { - *bt_state = (struct anv_state) { 0, }; - return VK_SUCCESS; - } - - struct anv_pipeline_bind_map *map = &pipeline->shaders[stage]->bind_map; - if (bias + map->surface_count == 0) { - *bt_state = (struct anv_state) { 0, }; - return VK_SUCCESS; - } - - *bt_state = anv_cmd_buffer_alloc_binding_table(cmd_buffer, - bias + map->surface_count, - &state_offset); - uint32_t *bt_map = bt_state->map; - - if (bt_state->map == NULL) - return VK_ERROR_OUT_OF_DEVICE_MEMORY; - - if (stage == MESA_SHADER_COMPUTE && - get_cs_prog_data(cmd_buffer->state.compute_pipeline)->uses_num_work_groups) { - struct anv_bo *bo = cmd_buffer->state.num_workgroups_bo; - uint32_t bo_offset = cmd_buffer->state.num_workgroups_offset; - - struct anv_state surface_state; - surface_state = - anv_cmd_buffer_alloc_surface_state(cmd_buffer); - - const enum isl_format format = - anv_isl_format_for_descriptor_type(VK_DESCRIPTOR_TYPE_STORAGE_BUFFER); - anv_fill_buffer_surface_state(cmd_buffer->device, surface_state, - format, bo_offset, 12, 1); - - bt_map[0] = surface_state.offset + state_offset; - add_surface_state_reloc(cmd_buffer, surface_state, bo, bo_offset); - } - - if (map->surface_count == 0) - goto out; - - if (map->image_count > 0) { - VkResult result = - anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, stage, images); - if (result != VK_SUCCESS) - return result; - - cmd_buffer->state.push_constants_dirty |= 1 << stage; - } - - uint32_t image = 0; - for (uint32_t s = 0; s < map->surface_count; s++) { - struct anv_pipeline_binding *binding = &map->surface_to_descriptor[s]; - - struct anv_state surface_state; - struct anv_bo *bo; - uint32_t bo_offset; - - if (binding->set == ANV_DESCRIPTOR_SET_COLOR_ATTACHMENTS) { - /* Color attachment binding */ - assert(stage == MESA_SHADER_FRAGMENT); - assert(binding->binding == 0); - if (binding->index < subpass->color_count) { - const struct anv_image_view *iview = - fb->attachments[subpass->color_attachments[binding->index]]; - - assert(iview->color_rt_surface_state.alloc_size); - surface_state = iview->color_rt_surface_state; - add_surface_state_reloc(cmd_buffer, iview->color_rt_surface_state, - iview->bo, iview->offset); - } else { - /* Null render target */ - struct anv_framebuffer *fb = cmd_buffer->state.framebuffer; - surface_state = - anv_cmd_buffer_alloc_null_surface_state(cmd_buffer, fb); - } - - bt_map[bias + s] = surface_state.offset + state_offset; - continue; - } - - struct anv_descriptor_set *set = - cmd_buffer->state.descriptors[binding->set]; - uint32_t offset = set->layout->binding[binding->binding].descriptor_index; - struct anv_descriptor *desc = &set->descriptors[offset + binding->index]; - - switch (desc->type) { - case VK_DESCRIPTOR_TYPE_SAMPLER: - /* Nothing for us to do here */ - continue; - - case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER: - case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE: - case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT: - surface_state = desc->image_view->sampler_surface_state; - assert(surface_state.alloc_size); - bo = desc->image_view->bo; - bo_offset = desc->image_view->offset; - break; - - case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE: { - surface_state = desc->image_view->storage_surface_state; - assert(surface_state.alloc_size); - bo = desc->image_view->bo; - bo_offset = desc->image_view->offset; - - struct brw_image_param *image_param = - &cmd_buffer->state.push_constants[stage]->images[image++]; - - *image_param = desc->image_view->storage_image_param; - image_param->surface_idx = bias + s; - break; - } - - case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER: - case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER: - case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC: - case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC: - case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER: - surface_state = desc->buffer_view->surface_state; - assert(surface_state.alloc_size); - bo = desc->buffer_view->bo; - bo_offset = desc->buffer_view->offset; - break; - - case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER: - surface_state = desc->buffer_view->storage_surface_state; - assert(surface_state.alloc_size); - bo = desc->buffer_view->bo; - bo_offset = desc->buffer_view->offset; - - struct brw_image_param *image_param = - &cmd_buffer->state.push_constants[stage]->images[image++]; - - *image_param = desc->buffer_view->storage_image_param; - image_param->surface_idx = bias + s; - break; - - default: - assert(!"Invalid descriptor type"); - continue; - } - - bt_map[bias + s] = surface_state.offset + state_offset; - add_surface_state_reloc(cmd_buffer, surface_state, bo, bo_offset); - } - assert(image == map->image_count); - - out: - if (!cmd_buffer->device->info.has_llc) - anv_state_clflush(*bt_state); - - return VK_SUCCESS; -} - -VkResult -anv_cmd_buffer_emit_samplers(struct anv_cmd_buffer *cmd_buffer, - gl_shader_stage stage, struct anv_state *state) -{ - struct anv_pipeline *pipeline; - - if (stage == MESA_SHADER_COMPUTE) - pipeline = cmd_buffer->state.compute_pipeline; - else - pipeline = cmd_buffer->state.pipeline; - - if (!anv_pipeline_has_stage(pipeline, stage)) { - *state = (struct anv_state) { 0, }; - return VK_SUCCESS; - } - - struct anv_pipeline_bind_map *map = &pipeline->shaders[stage]->bind_map; - if (map->sampler_count == 0) { - *state = (struct anv_state) { 0, }; - return VK_SUCCESS; - } - - uint32_t size = map->sampler_count * 16; - *state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, size, 32); - - if (state->map == NULL) - return VK_ERROR_OUT_OF_DEVICE_MEMORY; - - for (uint32_t s = 0; s < map->sampler_count; s++) { - struct anv_pipeline_binding *binding = &map->sampler_to_descriptor[s]; - struct anv_descriptor_set *set = - cmd_buffer->state.descriptors[binding->set]; - uint32_t offset = set->layout->binding[binding->binding].descriptor_index; - struct anv_descriptor *desc = &set->descriptors[offset + binding->index]; - - if (desc->type != VK_DESCRIPTOR_TYPE_SAMPLER && - desc->type != VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER) - continue; - - struct anv_sampler *sampler = desc->sampler; - - /* This can happen if we have an unfilled slot since TYPE_SAMPLER - * happens to be zero. - */ - if (sampler == NULL) - continue; - - memcpy(state->map + (s * 16), - sampler->state, sizeof(sampler->state)); - } - - if (!cmd_buffer->device->info.has_llc) - anv_state_clflush(*state); - - return VK_SUCCESS; -} - -uint32_t -anv_cmd_buffer_flush_descriptor_sets(struct anv_cmd_buffer *cmd_buffer) -{ - VkShaderStageFlags dirty = cmd_buffer->state.descriptors_dirty & - cmd_buffer->state.pipeline->active_stages; - - VkResult result = VK_SUCCESS; - anv_foreach_stage(s, dirty) { - result = anv_cmd_buffer_emit_samplers(cmd_buffer, s, - &cmd_buffer->state.samplers[s]); - if (result != VK_SUCCESS) - break; - result = anv_cmd_buffer_emit_binding_table(cmd_buffer, s, - &cmd_buffer->state.binding_tables[s]); - if (result != VK_SUCCESS) - break; - } - - if (result != VK_SUCCESS) { - assert(result == VK_ERROR_OUT_OF_DEVICE_MEMORY); - - result = anv_cmd_buffer_new_binding_table_block(cmd_buffer); - assert(result == VK_SUCCESS); - - /* Re-emit state base addresses so we get the new surface state base - * address before we start emitting binding tables etc. - */ - anv_cmd_buffer_emit_state_base_address(cmd_buffer); - - /* Re-emit all active binding tables */ - dirty |= cmd_buffer->state.pipeline->active_stages; - anv_foreach_stage(s, dirty) { - result = anv_cmd_buffer_emit_samplers(cmd_buffer, s, - &cmd_buffer->state.samplers[s]); - if (result != VK_SUCCESS) - return result; - result = anv_cmd_buffer_emit_binding_table(cmd_buffer, s, - &cmd_buffer->state.binding_tables[s]); - if (result != VK_SUCCESS) - return result; - } - } - - cmd_buffer->state.descriptors_dirty &= ~dirty; - - return dirty; -} - struct anv_state anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer, const void *data, uint32_t size, uint32_t alignment) @@ -1053,41 +623,6 @@ return state; } -/** - * @brief Setup the command buffer for recording commands inside the given - * subpass. - * - * This does not record all commands needed for starting the subpass. - * Starting the subpass may require additional commands. - * - * Note that vkCmdBeginRenderPass, vkCmdNextSubpass, and vkBeginCommandBuffer - * with VK_COMMAND_BUFFER_USAGE_RENDER_PASS_CONTINUE_BIT, all setup the - * command buffer for recording commands for some subpass. But only the first - * two, vkCmdBeginRenderPass and vkCmdNextSubpass, can start a subpass. - */ -void -anv_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer, - struct anv_subpass *subpass) -{ - switch (cmd_buffer->device->info.gen) { - case 7: - if (cmd_buffer->device->info.is_haswell) { - gen75_cmd_buffer_set_subpass(cmd_buffer, subpass); - } else { - gen7_cmd_buffer_set_subpass(cmd_buffer, subpass); - } - break; - case 8: - gen8_cmd_buffer_set_subpass(cmd_buffer, subpass); - break; - case 9: - gen9_cmd_buffer_set_subpass(cmd_buffer, subpass); - break; - default: - unreachable("unsupported gen\n"); - } -} - struct anv_state anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer, gl_shader_stage stage) @@ -1099,7 +634,7 @@ struct anv_push_constants *data = cmd_buffer->state.push_constants[stage]; const struct brw_stage_prog_data *prog_data = - anv_shader_bin_get_prog_data(cmd_buffer->state.pipeline->shaders[stage]); + cmd_buffer->state.pipeline->shaders[stage]->prog_data; /* If we don't actually have any push constants, bail. */ if (data == NULL || prog_data == NULL || prog_data->nr_params == 0) @@ -1203,24 +738,6 @@ cmd_buffer->state.push_constants_dirty |= stageFlags; } -void anv_CmdExecuteCommands( - VkCommandBuffer commandBuffer, - uint32_t commandBufferCount, - const VkCommandBuffer* pCmdBuffers) -{ - ANV_FROM_HANDLE(anv_cmd_buffer, primary, commandBuffer); - - assert(primary->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY); - - for (uint32_t i = 0; i < commandBufferCount; i++) { - ANV_FROM_HANDLE(anv_cmd_buffer, secondary, pCmdBuffers[i]); - - assert(secondary->level == VK_COMMAND_BUFFER_LEVEL_SECONDARY); - - anv_cmd_buffer_add_secondary(primary, secondary); - } -} - VkResult anv_CreateCommandPool( VkDevice _device, const VkCommandPoolCreateInfo* pCreateInfo, @@ -1230,7 +747,7 @@ ANV_FROM_HANDLE(anv_device, device, _device); struct anv_cmd_pool *pool; - pool = anv_alloc2(&device->alloc, pAllocator, sizeof(*pool), 8, + pool = vk_alloc2(&device->alloc, pAllocator, sizeof(*pool), 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (pool == NULL) return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); @@ -1255,12 +772,15 @@ ANV_FROM_HANDLE(anv_device, device, _device); ANV_FROM_HANDLE(anv_cmd_pool, pool, commandPool); + if (!pool) + return; + list_for_each_entry_safe(struct anv_cmd_buffer, cmd_buffer, &pool->cmd_buffers, pool_link) { anv_cmd_buffer_destroy(cmd_buffer); } - anv_free2(&device->alloc, pAllocator, pool); + vk_free2(&device->alloc, pAllocator, pool); } VkResult anv_ResetCommandPool( diff -Nru mesa-12.0.6/src/intel/vulkan/anv_descriptor_set.c mesa-17.0.7/src/intel/vulkan/anv_descriptor_set.c --- mesa-12.0.6/src/intel/vulkan/anv_descriptor_set.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_descriptor_set.c 2017-06-01 10:37:10.000000000 +0000 @@ -58,7 +58,7 @@ (max_binding + 1) * sizeof(set_layout->binding[0]) + immutable_sampler_count * sizeof(struct anv_sampler *); - set_layout = anv_alloc2(&device->alloc, pAllocator, size, 8, + set_layout = vk_alloc2(&device->alloc, pAllocator, size, 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (!set_layout) return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); @@ -200,7 +200,10 @@ ANV_FROM_HANDLE(anv_device, device, _device); ANV_FROM_HANDLE(anv_descriptor_set_layout, set_layout, _set_layout); - anv_free2(&device->alloc, pAllocator, set_layout); + if (!set_layout) + return; + + vk_free2(&device->alloc, pAllocator, set_layout); } static void @@ -228,7 +231,7 @@ assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO); - layout = anv_alloc2(&device->alloc, pAllocator, sizeof(*layout), 8, + layout = vk_alloc2(&device->alloc, pAllocator, sizeof(*layout), 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (layout == NULL) return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); @@ -282,7 +285,10 @@ ANV_FROM_HANDLE(anv_device, device, _device); ANV_FROM_HANDLE(anv_pipeline_layout, pipeline_layout, _pipelineLayout); - anv_free2(&device->alloc, pAllocator, pipeline_layout); + if (!pipeline_layout) + return; + + vk_free2(&device->alloc, pAllocator, pipeline_layout); } /* @@ -323,18 +329,18 @@ } } - const size_t size = - sizeof(*pool) + + const size_t pool_size = pCreateInfo->maxSets * sizeof(struct anv_descriptor_set) + descriptor_count * sizeof(struct anv_descriptor) + buffer_count * sizeof(struct anv_buffer_view); + const size_t total_size = sizeof(*pool) + pool_size; - pool = anv_alloc2(&device->alloc, pAllocator, size, 8, + pool = vk_alloc2(&device->alloc, pAllocator, total_size, 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (!pool) return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); - pool->size = size; + pool->size = pool_size; pool->next = 0; pool->free_list = EMPTY; @@ -355,8 +361,11 @@ ANV_FROM_HANDLE(anv_device, device, _device); ANV_FROM_HANDLE(anv_descriptor_pool, pool, _pool); + if (!pool) + return; + anv_state_stream_finish(&pool->surface_state_stream); - anv_free2(&device->alloc, pAllocator, pool); + vk_free2(&device->alloc, pAllocator, pool); } VkResult anv_ResetDescriptorPool( @@ -393,7 +402,7 @@ struct surface_state_free_list_entry { void *next; - uint32_t offset; + struct anv_state state; }; VkResult @@ -463,10 +472,9 @@ struct anv_state state; if (entry) { - state.map = entry; - state.offset = entry->offset; - state.alloc_size = 64; + state = entry->state; pool->surface_state_free_list = entry->next; + assert(state.alloc_size == 64); } else { state = anv_state_stream_alloc(&pool->surface_state_stream, 64, 64); } @@ -489,7 +497,7 @@ struct surface_state_free_list_entry *entry = set->buffer_views[b].surface_state.map; entry->next = pool->surface_state_free_list; - entry->offset = set->buffer_views[b].surface_state.offset; + entry->state = set->buffer_views[b].surface_state; pool->surface_state_free_list = entry; } @@ -547,6 +555,9 @@ for (uint32_t i = 0; i < count; i++) { ANV_FROM_HANDLE(anv_descriptor_set, set, pDescriptorSets[i]); + if (!set) + continue; + anv_descriptor_set_destroy(device, pool, set); } @@ -606,6 +617,7 @@ case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE: case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE: + case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT: for (uint32_t j = 0; j < write->descriptorCount; j++) { ANV_FROM_HANDLE(anv_image_view, iview, write->pImageInfo[j].imageView); @@ -630,10 +642,6 @@ } break; - case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT: - anv_finishme("input attachments not implemented"); - break; - case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER: case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER: case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC: diff -Nru mesa-12.0.6/src/intel/vulkan/anv_device.c mesa-17.0.7/src/intel/vulkan/anv_device.c --- mesa-12.0.6/src/intel/vulkan/anv_device.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_device.c 2017-06-01 10:37:10.000000000 +0000 @@ -21,15 +21,16 @@ * IN THE SOFTWARE. */ +#include #include #include #include #include +#include #include #include #include "anv_private.h" -#include "anv_timestamp.h" #include "util/strtod.h" #include "util/debug.h" @@ -53,6 +54,34 @@ va_end(args); } +static bool +anv_get_function_timestamp(void *ptr, uint32_t* timestamp) +{ + Dl_info info; + struct stat st; + if (!dladdr(ptr, &info) || !info.dli_fname) + return false; + + if (stat(info.dli_fname, &st)) + return false; + + *timestamp = st.st_mtim.tv_sec; + return true; +} + +static bool +anv_device_get_cache_uuid(void *uuid) +{ + uint32_t timestamp; + + memset(uuid, 0, VK_UUID_SIZE); + if (!anv_get_function_timestamp(anv_device_get_cache_uuid, ×tamp)) + return false; + + snprintf(uuid, VK_UUID_SIZE, "anv-%d", timestamp); + return true; +} + static VkResult anv_physical_device_init(struct anv_physical_device *device, struct anv_instance *instance, @@ -63,8 +92,7 @@ fd = open(path, O_RDWR | O_CLOEXEC); if (fd < 0) - return vk_errorf(VK_ERROR_INITIALIZATION_FAILED, - "failed to open %s: %m", path); + return vk_error(VK_ERROR_INCOMPATIBLE_DRIVER); device->_loader_data.loaderMagic = ICD_LOADER_MAGIC; device->instance = instance; @@ -74,25 +102,23 @@ device->chipset_id = anv_gem_get_param(fd, I915_PARAM_CHIPSET_ID); if (!device->chipset_id) { - result = VK_ERROR_INITIALIZATION_FAILED; + result = vk_error(VK_ERROR_INCOMPATIBLE_DRIVER); goto fail; } - device->name = brw_get_device_name(device->chipset_id); - device->info = brw_get_device_info(device->chipset_id); - if (!device->info) { - result = vk_errorf(VK_ERROR_INITIALIZATION_FAILED, - "failed to get device info"); + device->name = gen_get_device_name(device->chipset_id); + if (!gen_get_device_info(device->chipset_id, &device->info)) { + result = vk_error(VK_ERROR_INCOMPATIBLE_DRIVER); goto fail; } - if (device->info->is_haswell) { + if (device->info.is_haswell) { fprintf(stderr, "WARNING: Haswell Vulkan support is incomplete\n"); - } else if (device->info->gen == 7 && !device->info->is_baytrail) { + } else if (device->info.gen == 7 && !device->info.is_baytrail) { fprintf(stderr, "WARNING: Ivy Bridge Vulkan support is incomplete\n"); - } else if (device->info->gen == 7 && device->info->is_baytrail) { + } else if (device->info.gen == 7 && device->info.is_baytrail) { fprintf(stderr, "WARNING: Bay Trail Vulkan support is incomplete\n"); - } else if (device->info->gen >= 8) { + } else if (device->info.gen >= 8) { /* Broadwell, Cherryview, Skylake, Broxton, Kabylake is as fully * supported as anything */ } else { @@ -102,7 +128,7 @@ } device->cmd_parser_version = -1; - if (device->info->gen == 7) { + if (device->info.gen == 7) { device->cmd_parser_version = anv_gem_get_param(fd, I915_PARAM_CMD_PARSER_VERSION); if (device->cmd_parser_version == -1) { @@ -130,20 +156,50 @@ goto fail; } - if (!device->info->has_llc && + if (!device->info.has_llc && anv_gem_get_param(fd, I915_PARAM_MMAP_VERSION) < 1) { result = vk_errorf(VK_ERROR_INITIALIZATION_FAILED, "kernel missing wc mmap"); goto fail; } + if (!anv_device_get_cache_uuid(device->uuid)) { + result = vk_errorf(VK_ERROR_INITIALIZATION_FAILED, + "cannot generate UUID"); + goto fail; + } bool swizzled = anv_gem_get_bit6_swizzle(fd, I915_TILING_X); - close(fd); + /* GENs prior to 8 do not support EU/Subslice info */ + if (device->info.gen >= 8) { + device->subslice_total = anv_gem_get_param(fd, I915_PARAM_SUBSLICE_TOTAL); + device->eu_total = anv_gem_get_param(fd, I915_PARAM_EU_TOTAL); + + /* Without this information, we cannot get the right Braswell + * brandstrings, and we have to use conservative numbers for GPGPU on + * many platforms, but otherwise, things will just work. + */ + if (device->subslice_total < 1 || device->eu_total < 1) { + fprintf(stderr, "WARNING: Kernel 4.1 required to properly" + " query GPU properties.\n"); + } + } else if (device->info.gen == 7) { + device->subslice_total = 1 << (device->info.gt - 1); + } + + if (device->info.is_cherryview && + device->subslice_total > 0 && device->eu_total > 0) { + /* Logical CS threads = EUs per subslice * 7 threads per EU */ + uint32_t max_cs_threads = device->eu_total / device->subslice_total * 7; + + /* Fuse configurations may give more threads than expected, never less. */ + if (max_cs_threads > device->info.max_cs_threads) + device->info.max_cs_threads = max_cs_threads; + } brw_process_intel_debug_variable(); - device->compiler = brw_compiler_create(NULL, device->info); + device->compiler = brw_compiler_create(NULL, &device->info); if (device->compiler == NULL) { result = vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); goto fail; @@ -152,12 +208,14 @@ device->compiler->shader_perf_log = compiler_perf_log; result = anv_init_wsi(device); - if (result != VK_SUCCESS) - goto fail; + if (result != VK_SUCCESS) { + ralloc_free(device->compiler); + goto fail; + } - /* XXX: Actually detect bit6 swizzling */ - isl_device_init(&device->isl_dev, device->info, swizzled); + isl_device_init(&device->isl_dev, &device->info, swizzled); + close(fd); return VK_SUCCESS; fail: @@ -180,13 +238,19 @@ #ifdef VK_USE_PLATFORM_XCB_KHR { .extensionName = VK_KHR_XCB_SURFACE_EXTENSION_NAME, - .specVersion = 5, + .specVersion = 6, + }, +#endif +#ifdef VK_USE_PLATFORM_XLIB_KHR + { + .extensionName = VK_KHR_XLIB_SURFACE_EXTENSION_NAME, + .specVersion = 6, }, #endif #ifdef VK_USE_PLATFORM_WAYLAND_KHR { .extensionName = VK_KHR_WAYLAND_SURFACE_EXTENSION_NAME, - .specVersion = 4, + .specVersion = 5, }, #endif }; @@ -194,12 +258,16 @@ static const VkExtensionProperties device_extensions[] = { { .extensionName = VK_KHR_SWAPCHAIN_EXTENSION_NAME, - .specVersion = 67, + .specVersion = 68, }, + { + .extensionName = VK_KHR_SAMPLER_MIRROR_CLAMP_TO_EDGE_EXTENSION_NAME, + .specVersion = 1, + } }; static void * -default_alloc_func(void *pUserData, size_t size, size_t align, +default_alloc_func(void *pUserData, size_t size, size_t align, VkSystemAllocationScope allocationScope) { return malloc(size); @@ -264,7 +332,7 @@ return vk_error(VK_ERROR_EXTENSION_NOT_PRESENT); } - instance = anv_alloc2(&default_alloc, pAllocator, sizeof(*instance), 8, + instance = vk_alloc2(&default_alloc, pAllocator, sizeof(*instance), 8, VK_SYSTEM_ALLOCATION_SCOPE_INSTANCE); if (!instance) return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); @@ -294,6 +362,9 @@ { ANV_FROM_HANDLE(anv_instance, instance, _instance); + if (!instance) + return; + if (instance->physicalDeviceCount > 0) { /* We support at most one physical device. */ assert(instance->physicalDeviceCount == 1); @@ -304,7 +375,7 @@ _mesa_locale_fini(); - anv_free(&instance->alloc, instance); + vk_free(&instance->alloc, instance); } VkResult anv_EnumeratePhysicalDevices( @@ -321,7 +392,7 @@ snprintf(path, sizeof(path), "/dev/dri/renderD%d", 128 + i); result = anv_physical_device_init(&instance->physicalDevice, instance, path); - if (result == VK_SUCCESS) + if (result != VK_ERROR_INCOMPATIBLE_DRIVER) break; } @@ -356,6 +427,8 @@ } else if (*pPhysicalDeviceCount >= 1) { pPhysicalDevices[0] = anv_physical_device_to_handle(&instance->physicalDevice); *pPhysicalDeviceCount = 1; + } else if (*pPhysicalDeviceCount < instance->physicalDeviceCount) { + return VK_INCOMPLETE; } else { *pPhysicalDeviceCount = 0; } @@ -372,47 +445,47 @@ *pFeatures = (VkPhysicalDeviceFeatures) { .robustBufferAccess = true, .fullDrawIndexUint32 = true, - .imageCubeArray = false, + .imageCubeArray = true, .independentBlend = true, .geometryShader = true, - .tessellationShader = false, - .sampleRateShading = false, + .tessellationShader = true, + .sampleRateShading = true, .dualSrcBlend = true, .logicOp = true, .multiDrawIndirect = false, - .drawIndirectFirstInstance = false, + .drawIndirectFirstInstance = true, .depthClamp = true, - .depthBiasClamp = false, + .depthBiasClamp = true, .fillModeNonSolid = true, .depthBounds = false, .wideLines = true, .largePoints = true, .alphaToOne = true, .multiViewport = true, - .samplerAnisotropy = false, /* FINISHME */ - .textureCompressionETC2 = pdevice->info->gen >= 8 || - pdevice->info->is_baytrail, - .textureCompressionASTC_LDR = pdevice->info->gen >= 9, /* FINISHME CHV */ + .samplerAnisotropy = true, + .textureCompressionETC2 = pdevice->info.gen >= 8 || + pdevice->info.is_baytrail, + .textureCompressionASTC_LDR = pdevice->info.gen >= 9, /* FINISHME CHV */ .textureCompressionBC = true, .occlusionQueryPrecise = true, .pipelineStatisticsQuery = false, .fragmentStoresAndAtomics = true, .shaderTessellationAndGeometryPointSize = true, - .shaderImageGatherExtended = false, - .shaderStorageImageExtendedFormats = false, + .shaderImageGatherExtended = true, + .shaderStorageImageExtendedFormats = true, .shaderStorageImageMultisample = false, + .shaderStorageImageReadWithoutFormat = false, + .shaderStorageImageWriteWithoutFormat = false, .shaderUniformBufferArrayDynamicIndexing = true, .shaderSampledImageArrayDynamicIndexing = true, .shaderStorageBufferArrayDynamicIndexing = true, .shaderStorageImageArrayDynamicIndexing = true, - .shaderStorageImageReadWithoutFormat = false, - .shaderStorageImageWriteWithoutFormat = true, - .shaderClipDistance = false, - .shaderCullDistance = false, - .shaderFloat64 = false, + .shaderClipDistance = true, + .shaderCullDistance = true, + .shaderFloat64 = pdevice->info.gen >= 8, .shaderInt64 = false, .shaderInt16 = false, - .alphaToOne = true, + .shaderResourceMinLod = false, .variableMultisampleRate = false, .inheritedQueries = false, }; @@ -423,19 +496,12 @@ pdevice->compiler->scalar_stage[MESA_SHADER_GEOMETRY]; } -void -anv_device_get_cache_uuid(void *uuid) -{ - memset(uuid, 0, VK_UUID_SIZE); - snprintf(uuid, VK_UUID_SIZE, "anv-%s", ANV_TIMESTAMP); -} - void anv_GetPhysicalDeviceProperties( VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties* pProperties) { ANV_FROM_HANDLE(anv_physical_device, pdevice, physicalDevice); - const struct brw_device_info *devinfo = pdevice->info; + const struct gen_device_info *devinfo = &pdevice->info; const float time_stamp_base = devinfo->gen >= 9 ? 83.333 : 80.0; @@ -470,9 +536,9 @@ .maxPerStageResources = 128, .maxDescriptorSetSamplers = 256, .maxDescriptorSetUniformBuffers = 256, - .maxDescriptorSetUniformBuffersDynamic = 256, + .maxDescriptorSetUniformBuffersDynamic = MAX_DYNAMIC_BUFFERS / 2, .maxDescriptorSetStorageBuffers = 256, - .maxDescriptorSetStorageBuffersDynamic = 256, + .maxDescriptorSetStorageBuffersDynamic = MAX_DYNAMIC_BUFFERS / 2, .maxDescriptorSetSampledImages = 256, .maxDescriptorSetStorageImages = 256, .maxDescriptorSetInputAttachments = 256, @@ -481,14 +547,14 @@ .maxVertexInputAttributeOffset = 2047, .maxVertexInputBindingStride = 2048, .maxVertexOutputComponents = 128, - .maxTessellationGenerationLevel = 0, - .maxTessellationPatchSize = 0, - .maxTessellationControlPerVertexInputComponents = 0, - .maxTessellationControlPerVertexOutputComponents = 0, - .maxTessellationControlPerPatchOutputComponents = 0, - .maxTessellationControlTotalOutputComponents = 0, - .maxTessellationEvaluationInputComponents = 0, - .maxTessellationEvaluationOutputComponents = 0, + .maxTessellationGenerationLevel = 64, + .maxTessellationPatchSize = 32, + .maxTessellationControlPerVertexInputComponents = 128, + .maxTessellationControlPerVertexOutputComponents = 128, + .maxTessellationControlPerPatchOutputComponents = 128, + .maxTessellationControlTotalOutputComponents = 2048, + .maxTessellationEvaluationInputComponents = 128, + .maxTessellationEvaluationOutputComponents = 128, .maxGeometryShaderInvocations = 32, .maxGeometryInputComponents = 64, .maxGeometryOutputComponents = 128, @@ -496,7 +562,7 @@ .maxGeometryTotalOutputComponents = 1024, .maxFragmentInputComponents = 128, .maxFragmentOutputAttachments = 8, - .maxFragmentDualSrcAttachments = 2, + .maxFragmentDualSrcAttachments = 1, .maxFragmentCombinedOutputResources = 8, .maxComputeSharedMemorySize = 32768, .maxComputeWorkGroupCount = { 65535, 65535, 65535 }, @@ -519,18 +585,18 @@ .viewportSubPixelBits = 13, /* We take a float? */ .minMemoryMapAlignment = 4096, /* A page */ .minTexelBufferOffsetAlignment = 1, - .minUniformBufferOffsetAlignment = 1, - .minStorageBufferOffsetAlignment = 1, + .minUniformBufferOffsetAlignment = 16, + .minStorageBufferOffsetAlignment = 4, .minTexelOffset = -8, .maxTexelOffset = 7, - .minTexelGatherOffset = -8, - .maxTexelGatherOffset = 7, - .minInterpolationOffset = 0, /* FIXME */ - .maxInterpolationOffset = 0, /* FIXME */ - .subPixelInterpolationOffsetBits = 0, /* FIXME */ + .minTexelGatherOffset = -32, + .maxTexelGatherOffset = 31, + .minInterpolationOffset = -0.5, + .maxInterpolationOffset = 0.4375, + .subPixelInterpolationOffsetBits = 4, .maxFramebufferWidth = (1 << 14), .maxFramebufferHeight = (1 << 14), - .maxFramebufferLayers = (1 << 10), + .maxFramebufferLayers = (1 << 11), .framebufferColorSampleCounts = sample_counts, .framebufferDepthSampleCounts = sample_counts, .framebufferStencilSampleCounts = sample_counts, @@ -543,10 +609,10 @@ .storageImageSampleCounts = VK_SAMPLE_COUNT_1_BIT, .maxSampleMaskWords = 1, .timestampComputeAndGraphics = false, - .timestampPeriod = time_stamp_base / (1000 * 1000 * 1000), - .maxClipDistances = 0 /* FIXME */, - .maxCullDistances = 0 /* FIXME */, - .maxCombinedClipAndCullDistances = 0 /* FIXME */, + .timestampPeriod = time_stamp_base, + .maxClipDistances = 8, + .maxCullDistances = 8, + .maxCombinedClipAndCullDistances = 8, .discreteQueuePriorities = 1, .pointSizeRange = { 0.125, 255.875 }, .lineWidthRange = { 0.0, 7.9921875 }, @@ -570,7 +636,7 @@ }; strcpy(pProperties->deviceName, pdevice->name); - anv_device_get_cache_uuid(pProperties->pipelineCacheUUID); + memcpy(pProperties->pipelineCacheUUID, pdevice->uuid, VK_UUID_SIZE); } void anv_GetPhysicalDeviceQueueFamilyProperties( @@ -600,6 +666,8 @@ .timestampValidBits = 36, /* XXX: Real value here */ .minImageTransferGranularity = (VkExtent3D) { 1, 1, 1 }, }; + + *pCount = 1; } void anv_GetPhysicalDeviceMemoryProperties( @@ -614,7 +682,7 @@ */ heap_size = 3 * physical_device->aperture_size / 4; - if (physical_device->info->has_llc) { + if (physical_device->info.has_llc) { /* Big core GPUs share LLC with the CPU and thus one memory type can be * both cached and coherent at the same time. */ @@ -658,7 +726,7 @@ VkInstance instance, const char* pName) { - return anv_lookup_entrypoint(pName); + return anv_lookup_entrypoint(NULL, pName); } /* With version 1+ of the loader interface the ICD should expose @@ -678,20 +746,19 @@ } PFN_vkVoidFunction anv_GetDeviceProcAddr( - VkDevice device, + VkDevice _device, const char* pName) { - return anv_lookup_entrypoint(pName); + ANV_FROM_HANDLE(anv_device, device, _device); + return anv_lookup_entrypoint(&device->info, pName); } -static VkResult +static void anv_queue_init(struct anv_device *device, struct anv_queue *queue) { queue->_loader_data.loaderMagic = ICD_LOADER_MAGIC; queue->device = device; queue->pool = &device->surface_state_pool; - - return VK_SUCCESS; } static void @@ -745,7 +812,7 @@ { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 exec2_objects[1]; - struct anv_bo bo; + struct anv_bo bo, *exec_bos[1]; VkResult result = VK_SUCCESS; uint32_t size; int64_t timeout; @@ -761,6 +828,7 @@ if (!device->info.has_llc) anv_clflush_range(bo.map, size); + exec_bos[0] = &bo; exec2_objects[0].handle = bo.gem_handle; exec2_objects[0].relocation_count = 0; exec2_objects[0].relocs_ptr = 0; @@ -784,18 +852,15 @@ execbuf.rsvd1 = device->context_id; execbuf.rsvd2 = 0; - ret = anv_gem_execbuffer(device, &execbuf); - if (ret != 0) { - /* We don't know the real error. */ - result = vk_errorf(VK_ERROR_OUT_OF_DEVICE_MEMORY, "execbuf2 failed: %m"); + result = anv_device_execbuf(device, &execbuf, exec_bos); + if (result != VK_SUCCESS) goto fail; - } timeout = INT64_MAX; ret = anv_gem_wait(device, bo.gem_handle, &timeout); if (ret != 0) { /* We don't know the real error. */ - result = vk_errorf(VK_ERROR_OUT_OF_DEVICE_MEMORY, "execbuf2 failed: %m"); + result = vk_errorf(VK_ERROR_DEVICE_LOST, "execbuf2 failed: %m"); goto fail; } @@ -830,9 +895,7 @@ return vk_error(VK_ERROR_EXTENSION_NOT_PRESENT); } - anv_set_dispatch_devinfo(physical_device->info); - - device = anv_alloc2(&physical_device->instance->alloc, pAllocator, + device = vk_alloc2(&physical_device->instance->alloc, pAllocator, sizeof(*device), 8, VK_SYSTEM_ALLOCATION_SCOPE_DEVICE); if (!device) @@ -860,7 +923,7 @@ goto fail_fd; } - device->info = *physical_device->info; + device->info = physical_device->info; device->isl_dev = physical_device->isl_dev; /* On Broadwell and later, we can use batch chaining to more efficiently @@ -875,6 +938,12 @@ pthread_mutex_init(&device->mutex, NULL); + pthread_condattr_t condattr; + pthread_condattr_init(&condattr); + pthread_condattr_setclock(&condattr, CLOCK_MONOTONIC); + pthread_cond_init(&device->queue_submit, NULL); + pthread_condattr_destroy(&condattr); + anv_bo_pool_init(&device->batch_bo_pool, device); anv_block_pool_init(&device->dynamic_state_block_pool, device, 16384); @@ -882,7 +951,7 @@ anv_state_pool_init(&device->dynamic_state_pool, &device->dynamic_state_block_pool); - anv_block_pool_init(&device->instruction_block_pool, device, 128 * 1024); + anv_block_pool_init(&device->instruction_block_pool, device, 1024 * 1024); anv_state_pool_init(&device->instruction_state_pool, &device->instruction_block_pool); @@ -918,9 +987,7 @@ if (result != VK_SUCCESS) goto fail_fd; - result = anv_device_init_meta(device); - if (result != VK_SUCCESS) - goto fail_fd; + anv_device_init_blorp(device); anv_device_init_border_colors(device); @@ -931,7 +998,7 @@ fail_fd: close(device->fd); fail_device: - anv_free(&device->alloc, device); + vk_free(&device->alloc, device); return result; } @@ -942,9 +1009,12 @@ { ANV_FROM_HANDLE(anv_device, device, _device); - anv_queue_finish(&device->queue); + if (!device) + return; - anv_device_finish_meta(device); + anv_device_finish_blorp(device); + + anv_queue_finish(&device->queue); #ifdef HAVE_VALGRIND /* We only need to free these to prevent valgrind errors. The backing @@ -953,23 +1023,28 @@ anv_state_pool_free(&device->dynamic_state_pool, device->border_colors); #endif + anv_scratch_pool_finish(device, &device->scratch_pool); + anv_gem_munmap(device->workaround_bo.map, device->workaround_bo.size); anv_gem_close(device, device->workaround_bo.gem_handle); - anv_bo_pool_finish(&device->batch_bo_pool); - anv_state_pool_finish(&device->dynamic_state_pool); - anv_block_pool_finish(&device->dynamic_state_block_pool); - anv_state_pool_finish(&device->instruction_state_pool); - anv_block_pool_finish(&device->instruction_block_pool); anv_state_pool_finish(&device->surface_state_pool); anv_block_pool_finish(&device->surface_state_block_pool); - anv_scratch_pool_finish(device, &device->scratch_pool); + anv_state_pool_finish(&device->instruction_state_pool); + anv_block_pool_finish(&device->instruction_block_pool); + anv_state_pool_finish(&device->dynamic_state_pool); + anv_block_pool_finish(&device->dynamic_state_block_pool); - close(device->fd); + anv_bo_pool_finish(&device->batch_bo_pool); + pthread_cond_destroy(&device->queue_submit); pthread_mutex_destroy(&device->mutex); - anv_free(&device->alloc, device); + anv_gem_destroy_context(device, device->context_id); + + close(device->fd); + + vk_free(&device->alloc, device); } VkResult anv_EnumerateInstanceExtensionProperties( @@ -982,10 +1057,11 @@ return VK_SUCCESS; } - assert(*pPropertyCount >= ARRAY_SIZE(global_extensions)); + *pPropertyCount = MIN2(*pPropertyCount, ARRAY_SIZE(global_extensions)); + typed_memcpy(pProperties, global_extensions, *pPropertyCount); - *pPropertyCount = ARRAY_SIZE(global_extensions); - memcpy(pProperties, global_extensions, sizeof(global_extensions)); + if (*pPropertyCount < ARRAY_SIZE(global_extensions)) + return VK_INCOMPLETE; return VK_SUCCESS; } @@ -1001,10 +1077,11 @@ return VK_SUCCESS; } - assert(*pPropertyCount >= ARRAY_SIZE(device_extensions)); + *pPropertyCount = MIN2(*pPropertyCount, ARRAY_SIZE(device_extensions)); + typed_memcpy(pProperties, device_extensions, *pPropertyCount); - *pPropertyCount = ARRAY_SIZE(device_extensions); - memcpy(pProperties, device_extensions, sizeof(device_extensions)); + if (*pPropertyCount < ARRAY_SIZE(device_extensions)) + return VK_INCOMPLETE; return VK_SUCCESS; } @@ -1049,6 +1126,25 @@ *pQueue = anv_queue_to_handle(&device->queue); } +VkResult +anv_device_execbuf(struct anv_device *device, + struct drm_i915_gem_execbuffer2 *execbuf, + struct anv_bo **execbuf_bos) +{ + int ret = anv_gem_execbuffer(device, execbuf); + if (ret != 0) { + /* We don't know the real error. */ + return vk_errorf(VK_ERROR_DEVICE_LOST, "execbuf2 failed: %m"); + } + + struct drm_i915_gem_exec_object2 *objects = + (void *)(uintptr_t)execbuf->buffers_ptr; + for (uint32_t k = 0; k < execbuf->buffer_count; k++) + execbuf_bos[k]->offset = objects[k].offset; + + return VK_SUCCESS; +} + VkResult anv_QueueSubmit( VkQueue _queue, uint32_t submitCount, @@ -1058,7 +1154,34 @@ ANV_FROM_HANDLE(anv_queue, queue, _queue); ANV_FROM_HANDLE(anv_fence, fence, _fence); struct anv_device *device = queue->device; - int ret; + VkResult result = VK_SUCCESS; + + /* We lock around QueueSubmit for three main reasons: + * + * 1) When a block pool is resized, we create a new gem handle with a + * different size and, in the case of surface states, possibly a + * different center offset but we re-use the same anv_bo struct when + * we do so. If this happens in the middle of setting up an execbuf, + * we could end up with our list of BOs out of sync with our list of + * gem handles. + * + * 2) The algorithm we use for building the list of unique buffers isn't + * thread-safe. While the client is supposed to syncronize around + * QueueSubmit, this would be extremely difficult to debug if it ever + * came up in the wild due to a broken app. It's better to play it + * safe and just lock around QueueSubmit. + * + * 3) The anv_cmd_buffer_execbuf function may perform relocations in + * userspace. Due to the fact that the surface state buffer is shared + * between batches, we can't afford to have that happen from multiple + * threads at the same time. Even though the user is supposed to + * ensure this doesn't happen, we play it safe as in (2) above. + * + * Since the only other things that ever take the device lock such as block + * pool resize only rarely happen, this will almost never be contended so + * taking a lock isn't really an expensive operation in this case. + */ + pthread_mutex_lock(&device->mutex); for (uint32_t i = 0; i < submitCount; i++) { for (uint32_t j = 0; j < pSubmits[i].commandBufferCount; j++) { @@ -1066,28 +1189,28 @@ pSubmits[i].pCommandBuffers[j]); assert(cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY); - ret = anv_gem_execbuffer(device, &cmd_buffer->execbuf2.execbuf); - if (ret != 0) { - /* We don't know the real error. */ - return vk_errorf(VK_ERROR_OUT_OF_DEVICE_MEMORY, - "execbuf2 failed: %m"); - } - - for (uint32_t k = 0; k < cmd_buffer->execbuf2.bo_count; k++) - cmd_buffer->execbuf2.bos[k]->offset = cmd_buffer->execbuf2.objects[k].offset; + result = anv_cmd_buffer_execbuf(device, cmd_buffer); + if (result != VK_SUCCESS) + goto out; } } if (fence) { - ret = anv_gem_execbuffer(device, &fence->execbuf); - if (ret != 0) { - /* We don't know the real error. */ - return vk_errorf(VK_ERROR_OUT_OF_DEVICE_MEMORY, - "execbuf2 failed: %m"); - } + struct anv_bo *fence_bo = &fence->bo; + result = anv_device_execbuf(device, &fence->execbuf, &fence_bo); + if (result != VK_SUCCESS) + goto out; + + /* Update the fence and wake up any waiters */ + assert(fence->state == ANV_FENCE_STATE_RESET); + fence->state = ANV_FENCE_STATE_SUBMITTED; + pthread_cond_broadcast(&device->queue_submit); } - return VK_SUCCESS; +out: + pthread_mutex_unlock(&device->mutex); + + return result; } VkResult anv_QueueWaitIdle( @@ -1095,7 +1218,7 @@ { ANV_FROM_HANDLE(anv_queue, queue, _queue); - return ANV_CALL(DeviceWaitIdle)(anv_device_to_handle(queue->device)); + return anv_DeviceWaitIdle(anv_device_to_handle(queue->device)); } VkResult anv_DeviceWaitIdle( @@ -1117,15 +1240,11 @@ VkResult anv_bo_init_new(struct anv_bo *bo, struct anv_device *device, uint64_t size) { - bo->gem_handle = anv_gem_create(device, size); - if (!bo->gem_handle) + uint32_t gem_handle = anv_gem_create(device, size); + if (!gem_handle) return vk_error(VK_ERROR_OUT_OF_DEVICE_MEMORY); - bo->map = NULL; - bo->index = 0; - bo->offset = 0; - bo->size = size; - bo->is_winsys_bo = false; + anv_bo_init(bo, gem_handle, size); return VK_SUCCESS; } @@ -1142,11 +1261,8 @@ assert(pAllocateInfo->sType == VK_STRUCTURE_TYPE_MEMORY_ALLOCATE_INFO); - if (pAllocateInfo->allocationSize == 0) { - /* Apparently, this is allowed */ - *pMem = VK_NULL_HANDLE; - return VK_SUCCESS; - } + /* The Vulkan 1.0.33 spec says "allocationSize must be greater than 0". */ + assert(pAllocateInfo->allocationSize > 0); /* We support exactly one memory heap. */ assert(pAllocateInfo->memoryTypeIndex == 0 || @@ -1154,7 +1270,7 @@ /* FINISHME: Fail if allocation request exceeds heap size. */ - mem = anv_alloc2(&device->alloc, pAllocator, sizeof(*mem), 8, + mem = vk_alloc2(&device->alloc, pAllocator, sizeof(*mem), 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (mem == NULL) return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); @@ -1176,7 +1292,7 @@ return VK_SUCCESS; fail: - anv_free2(&device->alloc, pAllocator, mem); + vk_free2(&device->alloc, pAllocator, mem); return result; } @@ -1201,7 +1317,7 @@ if (mem->bo.gem_handle != 0) anv_gem_close(device, mem->bo.gem_handle); - anv_free2(&device->alloc, pAllocator, mem); + vk_free2(&device->alloc, pAllocator, mem); } VkResult anv_MapMemory( @@ -1223,6 +1339,16 @@ if (size == VK_WHOLE_SIZE) size = mem->bo.size - offset; + /* From the Vulkan spec version 1.0.32 docs for MapMemory: + * + * * If size is not equal to VK_WHOLE_SIZE, size must be greater than 0 + * assert(size != 0); + * * If size is not equal to VK_WHOLE_SIZE, size must be less than or + * equal to the size of the memory minus offset + */ + assert(size > 0); + assert(offset + size <= mem->bo.size); + /* FIXME: Is this supposed to be thread safe? Since vkUnmapMemory() only * takes a VkDeviceMemory pointer, it seems like only one map of the memory * at a time is valid. We could just mmap up front and return an offset @@ -1328,11 +1454,12 @@ } void anv_GetBufferMemoryRequirements( - VkDevice device, + VkDevice _device, VkBuffer _buffer, VkMemoryRequirements* pMemoryRequirements) { ANV_FROM_HANDLE(anv_buffer, buffer, _buffer); + ANV_FROM_HANDLE(anv_device, device, _device); /* The Vulkan spec (git aaed022) says: * @@ -1341,20 +1468,21 @@ * only if the memory type `i` in the VkPhysicalDeviceMemoryProperties * structure for the physical device is supported. * - * We support exactly one memory type. + * We support exactly one memory type on LLC, two on non-LLC. */ - pMemoryRequirements->memoryTypeBits = 1; + pMemoryRequirements->memoryTypeBits = device->info.has_llc ? 1 : 3; pMemoryRequirements->size = buffer->size; pMemoryRequirements->alignment = 16; } void anv_GetImageMemoryRequirements( - VkDevice device, + VkDevice _device, VkImage _image, VkMemoryRequirements* pMemoryRequirements) { ANV_FROM_HANDLE(anv_image, image, _image); + ANV_FROM_HANDLE(anv_device, device, _device); /* The Vulkan spec (git aaed022) says: * @@ -1363,9 +1491,9 @@ * only if the memory type `i` in the VkPhysicalDeviceMemoryProperties * structure for the physical device is supported. * - * We support exactly one memory type. + * We support exactly one memory type on LLC, two on non-LLC. */ - pMemoryRequirements->memoryTypeBits = 1; + pMemoryRequirements->memoryTypeBits = device->info.has_llc ? 1 : 3; pMemoryRequirements->size = image->size; pMemoryRequirements->alignment = image->alignment; @@ -1408,26 +1536,6 @@ return VK_SUCCESS; } -VkResult anv_BindImageMemory( - VkDevice device, - VkImage _image, - VkDeviceMemory _memory, - VkDeviceSize memoryOffset) -{ - ANV_FROM_HANDLE(anv_device_memory, mem, _memory); - ANV_FROM_HANDLE(anv_image, image, _image); - - if (mem) { - image->bo = &mem->bo; - image->offset = memoryOffset; - } else { - image->bo = NULL; - image->offset = 0; - } - - return VK_SUCCESS; -} - VkResult anv_QueueBindSparse( VkQueue queue, uint32_t bindInfoCount, @@ -1496,7 +1604,11 @@ fence->execbuf.rsvd1 = device->context_id; fence->execbuf.rsvd2 = 0; - fence->ready = false; + if (pCreateInfo->flags & VK_FENCE_CREATE_SIGNALED_BIT) { + fence->state = ANV_FENCE_STATE_SIGNALED; + } else { + fence->state = ANV_FENCE_STATE_RESET; + } *pFence = anv_fence_to_handle(fence); @@ -1511,6 +1623,9 @@ ANV_FROM_HANDLE(anv_device, device, _device); ANV_FROM_HANDLE(anv_fence, fence, _fence); + if (!fence) + return; + assert(fence->bo.map == fence); anv_bo_pool_free(&device->batch_bo_pool, &fence->bo); } @@ -1522,7 +1637,7 @@ { for (uint32_t i = 0; i < fenceCount; i++) { ANV_FROM_HANDLE(anv_fence, fence, pFences[i]); - fence->ready = false; + fence->state = ANV_FENCE_STATE_RESET; } return VK_SUCCESS; @@ -1537,26 +1652,41 @@ int64_t t = 0; int ret; - if (fence->ready) - return VK_SUCCESS; + switch (fence->state) { + case ANV_FENCE_STATE_RESET: + /* If it hasn't even been sent off to the GPU yet, it's not ready */ + return VK_NOT_READY; - ret = anv_gem_wait(device, fence->bo.gem_handle, &t); - if (ret == 0) { - fence->ready = true; + case ANV_FENCE_STATE_SIGNALED: + /* It's been signaled, return success */ return VK_SUCCESS; - } - return VK_NOT_READY; + case ANV_FENCE_STATE_SUBMITTED: + /* It's been submitted to the GPU but we don't know if it's done yet. */ + ret = anv_gem_wait(device, fence->bo.gem_handle, &t); + if (ret == 0) { + fence->state = ANV_FENCE_STATE_SIGNALED; + return VK_SUCCESS; + } else { + return VK_NOT_READY; + } + default: + unreachable("Invalid fence status"); + } } +#define NSEC_PER_SEC 1000000000 +#define INT_TYPE_MAX(type) ((1ull << (sizeof(type) * 8 - 1)) - 1) + VkResult anv_WaitForFences( VkDevice _device, uint32_t fenceCount, const VkFence* pFences, VkBool32 waitAll, - uint64_t timeout) + uint64_t _timeout) { ANV_FROM_HANDLE(anv_device, device, _device); + int ret; /* DRM_IOCTL_I915_GEM_WAIT uses a signed 64 bit timeout and is supposed * to block indefinitely timeouts <= 0. Unfortunately, this was broken @@ -1565,22 +1695,107 @@ * best we can do is to clamp the timeout to INT64_MAX. This limits the * maximum timeout from 584 years to 292 years - likely not a big deal. */ - if (timeout > INT64_MAX) - timeout = INT64_MAX; + int64_t timeout = MIN2(_timeout, INT64_MAX); - int64_t t = timeout; + uint32_t pending_fences = fenceCount; + while (pending_fences) { + pending_fences = 0; + bool signaled_fences = false; + for (uint32_t i = 0; i < fenceCount; i++) { + ANV_FROM_HANDLE(anv_fence, fence, pFences[i]); + switch (fence->state) { + case ANV_FENCE_STATE_RESET: + /* This fence hasn't been submitted yet, we'll catch it the next + * time around. Yes, this may mean we dead-loop but, short of + * lots of locking and a condition variable, there's not much that + * we can do about that. + */ + pending_fences++; + continue; + + case ANV_FENCE_STATE_SIGNALED: + /* This fence is not pending. If waitAll isn't set, we can return + * early. Otherwise, we have to keep going. + */ + if (!waitAll) + return VK_SUCCESS; + continue; + + case ANV_FENCE_STATE_SUBMITTED: + /* These are the fences we really care about. Go ahead and wait + * on it until we hit a timeout. + */ + ret = anv_gem_wait(device, fence->bo.gem_handle, &timeout); + if (ret == -1 && errno == ETIME) { + return VK_TIMEOUT; + } else if (ret == -1) { + /* We don't know the real error. */ + return vk_errorf(VK_ERROR_DEVICE_LOST, "gem wait failed: %m"); + } else { + fence->state = ANV_FENCE_STATE_SIGNALED; + signaled_fences = true; + if (!waitAll) + return VK_SUCCESS; + continue; + } + } + } - /* FIXME: handle !waitAll */ + if (pending_fences && !signaled_fences) { + /* If we've hit this then someone decided to vkWaitForFences before + * they've actually submitted any of them to a queue. This is a + * fairly pessimal case, so it's ok to lock here and use a standard + * pthreads condition variable. + */ + pthread_mutex_lock(&device->mutex); + + /* It's possible that some of the fences have changed state since the + * last time we checked. Now that we have the lock, check for + * pending fences again and don't wait if it's changed. + */ + uint32_t now_pending_fences = 0; + for (uint32_t i = 0; i < fenceCount; i++) { + ANV_FROM_HANDLE(anv_fence, fence, pFences[i]); + if (fence->state == ANV_FENCE_STATE_RESET) + now_pending_fences++; + } + assert(now_pending_fences <= pending_fences); - for (uint32_t i = 0; i < fenceCount; i++) { - ANV_FROM_HANDLE(anv_fence, fence, pFences[i]); - int ret = anv_gem_wait(device, fence->bo.gem_handle, &t); - if (ret == -1 && errno == ETIME) { - return VK_TIMEOUT; - } else if (ret == -1) { - /* We don't know the real error. */ - return vk_errorf(VK_ERROR_OUT_OF_DEVICE_MEMORY, - "gem wait failed: %m"); + if (now_pending_fences == pending_fences) { + struct timespec before; + clock_gettime(CLOCK_MONOTONIC, &before); + + uint32_t abs_nsec = before.tv_nsec + timeout % NSEC_PER_SEC; + uint64_t abs_sec = before.tv_sec + (abs_nsec / NSEC_PER_SEC) + + (timeout / NSEC_PER_SEC); + abs_nsec %= NSEC_PER_SEC; + + /* Avoid roll-over in tv_sec on 32-bit systems if the user + * provided timeout is UINT64_MAX + */ + struct timespec abstime; + abstime.tv_nsec = abs_nsec; + abstime.tv_sec = MIN2(abs_sec, INT_TYPE_MAX(abstime.tv_sec)); + + ret = pthread_cond_timedwait(&device->queue_submit, + &device->mutex, &abstime); + assert(ret != EINVAL); + + struct timespec after; + clock_gettime(CLOCK_MONOTONIC, &after); + uint64_t time_elapsed = + ((uint64_t)after.tv_sec * NSEC_PER_SEC + after.tv_nsec) - + ((uint64_t)before.tv_sec * NSEC_PER_SEC + before.tv_nsec); + + if (time_elapsed >= timeout) { + pthread_mutex_unlock(&device->mutex); + return VK_TIMEOUT; + } + + timeout -= time_elapsed; + } + + pthread_mutex_unlock(&device->mutex); } } @@ -1650,6 +1865,9 @@ ANV_FROM_HANDLE(anv_device, device, _device); ANV_FROM_HANDLE(anv_event, event, _event); + if (!event) + return; + anv_state_pool_free(&device->dynamic_state_pool, event->state); } @@ -1719,7 +1937,7 @@ assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_BUFFER_CREATE_INFO); - buffer = anv_alloc2(&device->alloc, pAllocator, sizeof(*buffer), 8, + buffer = vk_alloc2(&device->alloc, pAllocator, sizeof(*buffer), 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (buffer == NULL) return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); @@ -1742,7 +1960,10 @@ ANV_FROM_HANDLE(anv_device, device, _device); ANV_FROM_HANDLE(anv_buffer, buffer, _buffer); - anv_free2(&device->alloc, pAllocator, buffer); + if (!buffer) + return; + + vk_free2(&device->alloc, pAllocator, buffer); } void @@ -1769,7 +1990,10 @@ ANV_FROM_HANDLE(anv_device, device, _device); ANV_FROM_HANDLE(anv_sampler, sampler, _sampler); - anv_free2(&device->alloc, pAllocator, sampler); + if (!sampler) + return; + + vk_free2(&device->alloc, pAllocator, sampler); } VkResult anv_CreateFramebuffer( @@ -1785,7 +2009,7 @@ size_t size = sizeof(*framebuffer) + sizeof(struct anv_image_view *) * pCreateInfo->attachmentCount; - framebuffer = anv_alloc2(&device->alloc, pAllocator, size, 8, + framebuffer = vk_alloc2(&device->alloc, pAllocator, size, 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (framebuffer == NULL) return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); @@ -1813,5 +2037,52 @@ ANV_FROM_HANDLE(anv_device, device, _device); ANV_FROM_HANDLE(anv_framebuffer, fb, _fb); - anv_free2(&device->alloc, pAllocator, fb); + if (!fb) + return; + + vk_free2(&device->alloc, pAllocator, fb); +} + +/* vk_icd.h does not declare this function, so we declare it here to + * suppress Wmissing-prototypes. + */ +PUBLIC VKAPI_ATTR VkResult VKAPI_CALL +vk_icdNegotiateLoaderICDInterfaceVersion(uint32_t* pSupportedVersion); + +PUBLIC VKAPI_ATTR VkResult VKAPI_CALL +vk_icdNegotiateLoaderICDInterfaceVersion(uint32_t* pSupportedVersion) +{ + /* For the full details on loader interface versioning, see + * . + * What follows is a condensed summary, to help you navigate the large and + * confusing official doc. + * + * - Loader interface v0 is incompatible with later versions. We don't + * support it. + * + * - In loader interface v1: + * - The first ICD entrypoint called by the loader is + * vk_icdGetInstanceProcAddr(). The ICD must statically expose this + * entrypoint. + * - The ICD must statically expose no other Vulkan symbol unless it is + * linked with -Bsymbolic. + * - Each dispatchable Vulkan handle created by the ICD must be + * a pointer to a struct whose first member is VK_LOADER_DATA. The + * ICD must initialize VK_LOADER_DATA.loadMagic to ICD_LOADER_MAGIC. + * - The loader implements vkCreate{PLATFORM}SurfaceKHR() and + * vkDestroySurfaceKHR(). The ICD must be capable of working with + * such loader-managed surfaces. + * + * - Loader interface v2 differs from v1 in: + * - The first ICD entrypoint called by the loader is + * vk_icdNegotiateLoaderICDInterfaceVersion(). The ICD must + * statically expose this entrypoint. + * + * - Loader interface v3 differs from v2 in: + * - The ICD must implement vkCreate{PLATFORM}SurfaceKHR(), + * vkDestroySurfaceKHR(), and other API which uses VKSurfaceKHR, + * because the loader no longer does so. + */ + *pSupportedVersion = MIN2(*pSupportedVersion, 3u); + return VK_SUCCESS; } diff -Nru mesa-12.0.6/src/intel/vulkan/anv_dump.c mesa-17.0.7/src/intel/vulkan/anv_dump.c --- mesa-12.0.6/src/intel/vulkan/anv_dump.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_dump.c 2017-06-01 10:37:10.000000000 +0000 @@ -23,94 +23,141 @@ #include "anv_private.h" +#include "util/list.h" +#include "util/ralloc.h" + /* This file contains utility functions for help debugging. They can be * called from GDB or similar to help inspect images and buffers. + * + * To dump the framebuffers of an application after each render pass, all you + * have to do is the following + * + * 1) Start the application in GDB + * 2) Run until you get to the point where the rendering errors occur + * 3) Pause in GDB and set a breakpoint in anv_QueuePresentKHR + * 4) Continue until it reaches anv_QueuePresentKHR + * 5) Call anv_dump_start(queue->device, ANV_DUMP_FRAMEBUFFERS_BIT) + * 6) Continue until the next anv_QueuePresentKHR call + * 7) Call anv_dump_finish() to complete the dump and write files + * + * While it's a bit manual, the process does allow you to do some very + * valuable debugging by dumping every render target at the end of every + * render pass. It's worth noting that this assumes that the application + * creates all of the command buffers more-or-less in-order and between the + * two anv_QueuePresentKHR calls. */ -void -anv_dump_image_to_ppm(struct anv_device *device, - struct anv_image *image, unsigned miplevel, - unsigned array_layer, const char *filename) +struct dump_image { + struct list_head link; + + const char *filename; + + VkExtent2D extent; + VkImage image; + VkDeviceMemory memory; +}; + +static void +dump_image_init(struct anv_device *device, struct dump_image *image, + uint32_t width, uint32_t height, const char *filename) { VkDevice vk_device = anv_device_to_handle(device); MAYBE_UNUSED VkResult result; - VkExtent2D extent = { image->extent.width, image->extent.height }; - for (unsigned i = 0; i < miplevel; i++) { - extent.width = MAX2(1, extent.width / 2); - extent.height = MAX2(1, extent.height / 2); - } + image->filename = filename; + image->extent = (VkExtent2D) { width, height }; - VkImage copy_image; result = anv_CreateImage(vk_device, &(VkImageCreateInfo) { .sType = VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO, .imageType = VK_IMAGE_TYPE_2D, .format = VK_FORMAT_R8G8B8A8_UNORM, - .extent = (VkExtent3D) { extent.width, extent.height, 1 }, + .extent = (VkExtent3D) { width, height, 1 }, .mipLevels = 1, .arrayLayers = 1, .samples = 1, .tiling = VK_IMAGE_TILING_LINEAR, .usage = VK_IMAGE_USAGE_TRANSFER_DST_BIT, .flags = 0, - }, NULL, ©_image); + }, NULL, &image->image); assert(result == VK_SUCCESS); VkMemoryRequirements reqs; - anv_GetImageMemoryRequirements(vk_device, copy_image, &reqs); + anv_GetImageMemoryRequirements(vk_device, image->image, &reqs); - VkDeviceMemory memory; result = anv_AllocateMemory(vk_device, &(VkMemoryAllocateInfo) { .sType = VK_STRUCTURE_TYPE_MEMORY_ALLOCATE_INFO, .allocationSize = reqs.size, .memoryTypeIndex = 0, - }, NULL, &memory); + }, NULL, &image->memory); assert(result == VK_SUCCESS); - result = anv_BindImageMemory(vk_device, copy_image, memory, 0); + result = anv_BindImageMemory(vk_device, image->image, image->memory, 0); assert(result == VK_SUCCESS); +} - VkCommandPool commandPool; - result = anv_CreateCommandPool(vk_device, - &(VkCommandPoolCreateInfo) { - .sType = VK_STRUCTURE_TYPE_COMMAND_POOL_CREATE_INFO, - .queueFamilyIndex = 0, - .flags = 0, - }, NULL, &commandPool); - assert(result == VK_SUCCESS); +static void +dump_image_finish(struct anv_device *device, struct dump_image *image) +{ + VkDevice vk_device = anv_device_to_handle(device); - VkCommandBuffer cmd; - result = anv_AllocateCommandBuffers(vk_device, - &(VkCommandBufferAllocateInfo) { - .sType = VK_STRUCTURE_TYPE_COMMAND_BUFFER_ALLOCATE_INFO, - .commandPool = commandPool, - .level = VK_COMMAND_BUFFER_LEVEL_PRIMARY, - .commandBufferCount = 1, - }, &cmd); - assert(result == VK_SUCCESS); + anv_DestroyImage(vk_device, image->image, NULL); + anv_FreeMemory(vk_device, image->memory, NULL); +} - result = anv_BeginCommandBuffer(cmd, - &(VkCommandBufferBeginInfo) { - .sType = VK_STRUCTURE_TYPE_COMMAND_BUFFER_BEGIN_INFO, - .flags = VK_COMMAND_BUFFER_USAGE_ONE_TIME_SUBMIT_BIT, +static void +dump_image_do_blit(struct anv_device *device, struct dump_image *image, + struct anv_cmd_buffer *cmd_buffer, struct anv_image *src, + VkImageAspectFlagBits aspect, + unsigned miplevel, unsigned array_layer) +{ + PFN_vkCmdPipelineBarrier CmdPipelineBarrier = + (void *)anv_GetDeviceProcAddr(anv_device_to_handle(device), + "vkCmdPipelineBarrier"); + + CmdPipelineBarrier(anv_cmd_buffer_to_handle(cmd_buffer), + VK_PIPELINE_STAGE_TRANSFER_BIT, + VK_PIPELINE_STAGE_TRANSFER_BIT, + 0, 0, NULL, 0, NULL, 1, + &(VkImageMemoryBarrier) { + .sType = VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER, + .srcAccessMask = ~0, + .dstAccessMask = VK_ACCESS_TRANSFER_READ_BIT, + .oldLayout = VK_IMAGE_LAYOUT_GENERAL, + .newLayout = VK_IMAGE_LAYOUT_GENERAL, + .srcQueueFamilyIndex = 0, + .dstQueueFamilyIndex = 0, + .image = anv_image_to_handle(src), + .subresourceRange = (VkImageSubresourceRange) { + .aspectMask = aspect, + .baseMipLevel = miplevel, + .levelCount = 1, + .baseArrayLayer = array_layer, + .layerCount = 1, + }, }); - assert(result == VK_SUCCESS); - anv_CmdBlitImage(cmd, - anv_image_to_handle(image), VK_IMAGE_LAYOUT_GENERAL, - copy_image, VK_IMAGE_LAYOUT_GENERAL, 1, + /* We need to do a blit so the image needs to be declared as sampled. The + * only thing these are used for is making sure we create the correct + * views, so it should be find to just stomp it and set it back. + */ + VkImageUsageFlags old_usage = src->usage; + src->usage |= VK_IMAGE_USAGE_SAMPLED_BIT; + + anv_CmdBlitImage(anv_cmd_buffer_to_handle(cmd_buffer), + anv_image_to_handle(src), VK_IMAGE_LAYOUT_GENERAL, + image->image, VK_IMAGE_LAYOUT_GENERAL, 1, &(VkImageBlit) { .srcSubresource = { - .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT, + .aspectMask = aspect, .mipLevel = miplevel, .baseArrayLayer = array_layer, .layerCount = 1, }, .srcOffsets = { { 0, 0, 0 }, - { extent.width, extent.height, 1 }, + { image->extent.width, image->extent.height, 1 }, }, .dstSubresource = { .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT, @@ -120,23 +167,25 @@ }, .dstOffsets = { { 0, 0, 0 }, - { extent.width, extent.height, 1 }, + { image->extent.width, image->extent.height, 1 }, }, }, VK_FILTER_NEAREST); - ANV_CALL(CmdPipelineBarrier)(cmd, + src->usage = old_usage; + + CmdPipelineBarrier(anv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_STAGE_TRANSFER_BIT, VK_PIPELINE_STAGE_TRANSFER_BIT, - true, 0, NULL, 0, NULL, 1, + 0, 0, NULL, 0, NULL, 1, &(VkImageMemoryBarrier) { .sType = VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER, - .srcAccessMask = VK_ACCESS_HOST_READ_BIT, - .dstAccessMask = VK_ACCESS_TRANSFER_WRITE_BIT, + .srcAccessMask = VK_ACCESS_TRANSFER_WRITE_BIT, + .dstAccessMask = VK_ACCESS_HOST_READ_BIT, .oldLayout = VK_IMAGE_LAYOUT_GENERAL, .newLayout = VK_IMAGE_LAYOUT_GENERAL, .srcQueueFamilyIndex = 0, .dstQueueFamilyIndex = 0, - .image = copy_image, + .image = image->image, .subresourceRange = (VkImageSubresourceRange) { .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT, .baseMipLevel = 0, @@ -145,8 +194,106 @@ .layerCount = 1, }, }); +} + +static void +dump_image_write_to_ppm(struct anv_device *device, struct dump_image *image) +{ + VkDevice vk_device = anv_device_to_handle(device); + MAYBE_UNUSED VkResult result; + + VkMemoryRequirements reqs; + anv_GetImageMemoryRequirements(vk_device, image->image, &reqs); - result = anv_EndCommandBuffer(cmd); + uint8_t *map; + result = anv_MapMemory(vk_device, image->memory, 0, reqs.size, 0, (void **)&map); + assert(result == VK_SUCCESS); + + VkSubresourceLayout layout; + anv_GetImageSubresourceLayout(vk_device, image->image, + &(VkImageSubresource) { + .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT, + .mipLevel = 0, + .arrayLayer = 0, + }, &layout); + + map += layout.offset; + + FILE *file = fopen(image->filename, "wb"); + assert(file); + + uint8_t *row = malloc(image->extent.width * 3); + assert(row); + + fprintf(file, "P6\n%d %d\n255\n", image->extent.width, image->extent.height); + for (unsigned y = 0; y < image->extent.height; y++) { + for (unsigned x = 0; x < image->extent.width; x++) { + row[x * 3 + 0] = map[x * 4 + 0]; + row[x * 3 + 1] = map[x * 4 + 1]; + row[x * 3 + 2] = map[x * 4 + 2]; + } + fwrite(row, 3, image->extent.width, file); + + map += layout.rowPitch; + } + free(row); + fclose(file); + + anv_UnmapMemory(vk_device, image->memory); +} + +void +anv_dump_image_to_ppm(struct anv_device *device, + struct anv_image *image, unsigned miplevel, + unsigned array_layer, VkImageAspectFlagBits aspect, + const char *filename) +{ + VkDevice vk_device = anv_device_to_handle(device); + MAYBE_UNUSED VkResult result; + + PFN_vkBeginCommandBuffer BeginCommandBuffer = + (void *)anv_GetDeviceProcAddr(anv_device_to_handle(device), + "vkBeginCommandBuffer"); + PFN_vkEndCommandBuffer EndCommandBuffer = + (void *)anv_GetDeviceProcAddr(anv_device_to_handle(device), + "vkEndCommandBuffer"); + + const uint32_t width = anv_minify(image->extent.width, miplevel); + const uint32_t height = anv_minify(image->extent.height, miplevel); + + struct dump_image dump; + dump_image_init(device, &dump, width, height, filename); + + VkCommandPool commandPool; + result = anv_CreateCommandPool(vk_device, + &(VkCommandPoolCreateInfo) { + .sType = VK_STRUCTURE_TYPE_COMMAND_POOL_CREATE_INFO, + .queueFamilyIndex = 0, + .flags = 0, + }, NULL, &commandPool); + assert(result == VK_SUCCESS); + + VkCommandBuffer cmd; + result = anv_AllocateCommandBuffers(vk_device, + &(VkCommandBufferAllocateInfo) { + .sType = VK_STRUCTURE_TYPE_COMMAND_BUFFER_ALLOCATE_INFO, + .commandPool = commandPool, + .level = VK_COMMAND_BUFFER_LEVEL_PRIMARY, + .commandBufferCount = 1, + }, &cmd); + assert(result == VK_SUCCESS); + + result = BeginCommandBuffer(cmd, + &(VkCommandBufferBeginInfo) { + .sType = VK_STRUCTURE_TYPE_COMMAND_BUFFER_BEGIN_INFO, + .flags = VK_COMMAND_BUFFER_USAGE_ONE_TIME_SUBMIT_BIT, + }); + assert(result == VK_SUCCESS); + + dump_image_do_blit(device, &dump, anv_cmd_buffer_from_handle(cmd), image, + aspect, miplevel, array_layer); + + result = EndCommandBuffer(cmd); assert(result == VK_SUCCESS); VkFence fence; @@ -171,39 +318,129 @@ anv_DestroyFence(vk_device, fence, NULL); anv_DestroyCommandPool(vk_device, commandPool, NULL); - uint8_t *map; - result = anv_MapMemory(vk_device, memory, 0, reqs.size, 0, (void **)&map); - assert(result == VK_SUCCESS); + dump_image_write_to_ppm(device, &dump); + dump_image_finish(device, &dump); +} - VkSubresourceLayout layout; - anv_GetImageSubresourceLayout(vk_device, copy_image, - &(VkImageSubresource) { - .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT, - .mipLevel = 0, - .arrayLayer = 0, - }, &layout); +static pthread_mutex_t dump_mutex = PTHREAD_MUTEX_INITIALIZER; - map += layout.offset; +static enum anv_dump_action dump_actions = 0; - /* Now we can finally write the PPM file */ - FILE *file = fopen(filename, "wb"); - assert(file); +/* Used to prevent recursive dumping */ +static enum anv_dump_action dump_old_actions; - fprintf(file, "P6\n%d %d\n255\n", extent.width, extent.height); - for (unsigned y = 0; y < extent.height; y++) { - uint8_t row[extent.width * 3]; - for (unsigned x = 0; x < extent.width; x++) { - row[x * 3 + 0] = map[x * 4 + 0]; - row[x * 3 + 1] = map[x * 4 + 1]; - row[x * 3 + 2] = map[x * 4 + 2]; - } - fwrite(row, 3, extent.width, file); +struct list_head dump_list; +static void *dump_ctx; +static struct anv_device *dump_device; +static unsigned dump_count; - map += layout.rowPitch; +void +anv_dump_start(struct anv_device *device, enum anv_dump_action actions) +{ + pthread_mutex_lock(&dump_mutex); + + dump_device = device; + dump_actions = actions; + list_inithead(&dump_list); + dump_ctx = ralloc_context(NULL); + dump_count = 0; + + pthread_mutex_unlock(&dump_mutex); +} + +void +anv_dump_finish() +{ + anv_DeviceWaitIdle(anv_device_to_handle(dump_device)); + + pthread_mutex_lock(&dump_mutex); + + list_for_each_entry(struct dump_image, dump, &dump_list, link) { + dump_image_write_to_ppm(dump_device, dump); + dump_image_finish(dump_device, dump); + } + + dump_actions = 0; + dump_device = NULL; + list_inithead(&dump_list); + + ralloc_free(dump_ctx); + dump_ctx = NULL; + + pthread_mutex_unlock(&dump_mutex); +} + +static bool +dump_lock(enum anv_dump_action action) +{ + if (likely((dump_actions & action) == 0)) + return false; + + pthread_mutex_lock(&dump_mutex); + + /* Prevent recursive dumping */ + dump_old_actions = dump_actions; + dump_actions = 0; + + return true; +} + +static void +dump_unlock() +{ + dump_actions = dump_old_actions; + pthread_mutex_unlock(&dump_mutex); +} + +static void +dump_add_image(struct anv_cmd_buffer *cmd_buffer, struct anv_image *image, + VkImageAspectFlagBits aspect, + unsigned miplevel, unsigned array_layer, const char *filename) +{ + const uint32_t width = anv_minify(image->extent.width, miplevel); + const uint32_t height = anv_minify(image->extent.height, miplevel); + + struct dump_image *dump = ralloc(dump_ctx, struct dump_image); + + dump_image_init(cmd_buffer->device, dump, width, height, filename); + dump_image_do_blit(cmd_buffer->device, dump, cmd_buffer, image, + aspect, miplevel, array_layer); + + list_addtail(&dump->link, &dump_list); +} + +void +anv_dump_add_framebuffer(struct anv_cmd_buffer *cmd_buffer, + struct anv_framebuffer *fb) +{ + if (!dump_lock(ANV_DUMP_FRAMEBUFFERS_BIT)) + return; + + unsigned dump_idx = dump_count++; + + for (unsigned i = 0; i < fb->attachment_count; i++) { + struct anv_image_view *iview = fb->attachments[i]; + + uint32_t b; + for_each_bit(b, iview->image->aspects) { + VkImageAspectFlagBits aspect = (1 << b); + char suffix; + switch (aspect) { + case VK_IMAGE_ASPECT_COLOR_BIT: suffix = 'c'; break; + case VK_IMAGE_ASPECT_DEPTH_BIT: suffix = 'd'; break; + case VK_IMAGE_ASPECT_STENCIL_BIT: suffix = 's'; break; + default: + unreachable("Invalid aspect"); + } + + char *filename = ralloc_asprintf(dump_ctx, "framebuffer%04d-%d%c.ppm", + dump_idx, i, suffix); + + dump_add_image(cmd_buffer, (struct anv_image *)iview->image, aspect, + iview->isl.base_level, iview->isl.base_array_layer, + filename); + } } - fclose(file); - anv_UnmapMemory(vk_device, memory); - anv_DestroyImage(vk_device, copy_image, NULL); - anv_FreeMemory(vk_device, memory, NULL); + dump_unlock(); } diff -Nru mesa-12.0.6/src/intel/vulkan/anv_entrypoints.c mesa-17.0.7/src/intel/vulkan/anv_entrypoints.c --- mesa-12.0.6/src/intel/vulkan/anv_entrypoints.c 2017-01-24 01:43:26.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_entrypoints.c 2017-06-01 10:38:06.000000000 +0000 @@ -39,20 +39,20 @@ "vkCreateInstance\0" "vkDestroyInstance\0" "vkEnumeratePhysicalDevices\0" - "vkGetPhysicalDeviceFeatures\0" - "vkGetPhysicalDeviceFormatProperties\0" - "vkGetPhysicalDeviceImageFormatProperties\0" + "vkGetDeviceProcAddr\0" + "vkGetInstanceProcAddr\0" "vkGetPhysicalDeviceProperties\0" "vkGetPhysicalDeviceQueueFamilyProperties\0" "vkGetPhysicalDeviceMemoryProperties\0" - "vkGetInstanceProcAddr\0" - "vkGetDeviceProcAddr\0" + "vkGetPhysicalDeviceFeatures\0" + "vkGetPhysicalDeviceFormatProperties\0" + "vkGetPhysicalDeviceImageFormatProperties\0" "vkCreateDevice\0" "vkDestroyDevice\0" - "vkEnumerateInstanceExtensionProperties\0" - "vkEnumerateDeviceExtensionProperties\0" "vkEnumerateInstanceLayerProperties\0" + "vkEnumerateInstanceExtensionProperties\0" "vkEnumerateDeviceLayerProperties\0" + "vkEnumerateDeviceExtensionProperties\0" "vkGetDeviceQueue\0" "vkQueueSubmit\0" "vkQueueWaitIdle\0" @@ -64,10 +64,10 @@ "vkFlushMappedMemoryRanges\0" "vkInvalidateMappedMemoryRanges\0" "vkGetDeviceMemoryCommitment\0" - "vkBindBufferMemory\0" - "vkBindImageMemory\0" "vkGetBufferMemoryRequirements\0" + "vkBindBufferMemory\0" "vkGetImageMemoryRequirements\0" + "vkBindImageMemory\0" "vkGetImageSparseMemoryRequirements\0" "vkGetPhysicalDeviceSparseImageFormatProperties\0" "vkQueueBindSparse\0" @@ -173,6 +173,17 @@ "vkCmdNextSubpass\0" "vkCmdEndRenderPass\0" "vkCmdExecuteCommands\0" + "vkCreateAndroidSurfaceKHR\0" + "vkGetPhysicalDeviceDisplayPropertiesKHR\0" + "vkGetPhysicalDeviceDisplayPlanePropertiesKHR\0" + "vkGetDisplayPlaneSupportedDisplaysKHR\0" + "vkGetDisplayModePropertiesKHR\0" + "vkCreateDisplayModeKHR\0" + "vkGetDisplayPlaneCapabilitiesKHR\0" + "vkCreateDisplayPlaneSurfaceKHR\0" + "vkCreateSharedSwapchainsKHR\0" + "vkCreateMirSurfaceKHR\0" + "vkGetPhysicalDeviceMirPresentationSupportKHR\0" "vkDestroySurfaceKHR\0" "vkGetPhysicalDeviceSurfaceSupportKHR\0" "vkGetPhysicalDeviceSurfaceCapabilitiesKHR\0" @@ -183,21 +194,35 @@ "vkGetSwapchainImagesKHR\0" "vkAcquireNextImageKHR\0" "vkQueuePresentKHR\0" - "vkGetPhysicalDeviceDisplayPropertiesKHR\0" - "vkGetPhysicalDeviceDisplayPlanePropertiesKHR\0" - "vkGetDisplayPlaneSupportedDisplaysKHR\0" - "vkGetDisplayModePropertiesKHR\0" - "vkCreateDisplayModeKHR\0" - "vkGetDisplayPlaneCapabilitiesKHR\0" - "vkCreateDisplayPlaneSurfaceKHR\0" - "vkCreateSharedSwapchainsKHR\0" - "vkCreateXcbSurfaceKHR\0" - "vkGetPhysicalDeviceXcbPresentationSupportKHR\0" "vkCreateWaylandSurfaceKHR\0" "vkGetPhysicalDeviceWaylandPresentationSupportKHR\0" + "vkCreateWin32SurfaceKHR\0" + "vkGetPhysicalDeviceWin32PresentationSupportKHR\0" + "vkCreateXlibSurfaceKHR\0" + "vkGetPhysicalDeviceXlibPresentationSupportKHR\0" + "vkCreateXcbSurfaceKHR\0" + "vkGetPhysicalDeviceXcbPresentationSupportKHR\0" "vkCreateDebugReportCallbackEXT\0" "vkDestroyDebugReportCallbackEXT\0" "vkDebugReportMessageEXT\0" + "vkDebugMarkerSetObjectNameEXT\0" + "vkDebugMarkerSetObjectTagEXT\0" + "vkCmdDebugMarkerBeginEXT\0" + "vkCmdDebugMarkerEndEXT\0" + "vkCmdDebugMarkerInsertEXT\0" + "vkGetPhysicalDeviceExternalImageFormatPropertiesNV\0" + "vkGetMemoryWin32HandleNV\0" + "vkCmdDrawIndirectCountAMD\0" + "vkCmdDrawIndexedIndirectCountAMD\0" + "vkCmdProcessCommandsNVX\0" + "vkCmdReserveSpaceForCommandsNVX\0" + "vkCreateIndirectCommandsLayoutNVX\0" + "vkDestroyIndirectCommandsLayoutNVX\0" + "vkCreateObjectTableNVX\0" + "vkDestroyObjectTableNVX\0" + "vkRegisterObjectsNVX\0" + "vkUnregisterObjectsNVX\0" + "vkGetPhysicalDeviceGeneratedCommandsPropertiesNVX\0" "vkCreateDmaBufImageINTEL\0" ; @@ -205,20 +230,20 @@ { 0, 0x38a581a6 }, { 17, 0x9bd21af2 }, { 35, 0x5787c327 }, - { 62, 0x113e2f33 }, - { 90, 0x3e54b398 }, - { 126, 0xdd36a867 }, - { 167, 0x52fe22c9 }, - { 197, 0x4e5fc88a }, - { 238, 0xa90da4da }, - { 274, 0x3d2ae9ad }, - { 296, 0xba013486 }, + { 62, 0xba013486 }, + { 82, 0x3d2ae9ad }, + { 104, 0x52fe22c9 }, + { 134, 0x4e5fc88a }, + { 175, 0xa90da4da }, + { 211, 0x113e2f33 }, + { 239, 0x3e54b398 }, + { 275, 0xdd36a867 }, { 316, 0x085ed23f }, { 331, 0x1fbcc9cb }, - { 347, 0xeb27627e }, - { 386, 0x5fd13eed }, - { 423, 0x081f69d8 }, - { 458, 0x2f8566e7 }, + { 347, 0x081f69d8 }, + { 382, 0xeb27627e }, + { 421, 0x2f8566e7 }, + { 454, 0x5fd13eed }, { 491, 0xcc920d9a }, { 508, 0xfa4713ec }, { 522, 0x6f8fc2a5 }, @@ -230,10 +255,10 @@ { 611, 0xff52f051 }, { 637, 0x1e115cca }, { 668, 0x46e38db5 }, - { 696, 0x06bcbdcb }, - { 715, 0x5caaae4a }, - { 733, 0xab98422a }, - { 763, 0x916f1e63 }, + { 696, 0xab98422a }, + { 726, 0x06bcbdcb }, + { 745, 0x916f1e63 }, + { 774, 0x5caaae4a }, { 792, 0x15855f5b }, { 827, 0x272ef8ef }, { 874, 0xc3628a09 }, @@ -339,32 +364,57 @@ { 2848, 0x2eeec2f9 }, { 2865, 0xdcdb0235 }, { 2884, 0x9eaabe40 }, - { 2905, 0xf204ce7d }, - { 2925, 0x1a687885 }, - { 2962, 0x77890558 }, - { 3004, 0xe32227c8 }, - { 3041, 0x31c3cbd1 }, - { 3083, 0xcdefcaa8 }, - { 3104, 0x5a93ab74 }, - { 3126, 0x57695f28 }, - { 3150, 0xc3fedb2e }, - { 3172, 0xfc5fb6ce }, - { 3190, 0x0fa0cd2e }, - { 3230, 0xb9b8ddba }, - { 3275, 0xabef4889 }, - { 3313, 0x36b8a8de }, - { 3343, 0xcc0bde41 }, - { 3366, 0x4b60d48c }, - { 3399, 0x7ac4dacb }, - { 3430, 0x47655c4a }, - { 3458, 0xc5e5b106 }, - { 3480, 0x41782cb9 }, - { 3525, 0x2b2a4b79 }, - { 3551, 0x84e085ac }, - { 3600, 0x0987ef56 }, - { 3631, 0x43d4c4e2 }, - { 3663, 0xa4e75334 }, - { 3687, 0x6392dfa7 }, + { 2905, 0x03667f4e }, + { 2931, 0x0fa0cd2e }, + { 2971, 0xb9b8ddba }, + { 3016, 0xabef4889 }, + { 3054, 0x36b8a8de }, + { 3084, 0xcc0bde41 }, + { 3107, 0x4b60d48c }, + { 3140, 0x7ac4dacb }, + { 3171, 0x47655c4a }, + { 3199, 0x2ce93a55 }, + { 3221, 0xcf1e6028 }, + { 3266, 0xf204ce7d }, + { 3286, 0x1a687885 }, + { 3323, 0x77890558 }, + { 3365, 0xe32227c8 }, + { 3402, 0x31c3cbd1 }, + { 3444, 0xcdefcaa8 }, + { 3465, 0x5a93ab74 }, + { 3487, 0x57695f28 }, + { 3511, 0xc3fedb2e }, + { 3533, 0xfc5fb6ce }, + { 3551, 0x2b2a4b79 }, + { 3577, 0x84e085ac }, + { 3626, 0xfa2ba1e2 }, + { 3650, 0x80e72505 }, + { 3697, 0xa693bc66 }, + { 3720, 0x34a063ab }, + { 3766, 0xc5e5b106 }, + { 3788, 0x41782cb9 }, + { 3833, 0x0987ef56 }, + { 3864, 0x43d4c4e2 }, + { 3896, 0xa4e75334 }, + { 3920, 0xe206fb25 }, + { 3950, 0x30799448 }, + { 3979, 0xaec8bb10 }, + { 4004, 0xd6a1433e }, + { 4027, 0x0173d440 }, + { 4053, 0xc8420c4c }, + { 4104, 0x0c8795b9 }, + { 4129, 0xe5ad0a50 }, + { 4155, 0xc86e9287 }, + { 4188, 0x736675ae }, + { 4212, 0x016068ae }, + { 4244, 0xe619127f }, + { 4278, 0x1c3d25d3 }, + { 4313, 0x4948814a }, + { 4336, 0x957087d6 }, + { 4360, 0xe04e9f74 }, + { 4381, 0x5babdfe5 }, + { 4404, 0x93de8434 }, + { 4454, 0x6392dfa7 }, }; @@ -377,20 +427,20 @@ VkResult anv_CreateInstance(const VkInstanceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkInstance* pInstance) __attribute__ ((weak)); void anv_DestroyInstance(VkInstance instance, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); VkResult anv_EnumeratePhysicalDevices(VkInstance instance, uint32_t* pPhysicalDeviceCount, VkPhysicalDevice* pPhysicalDevices) __attribute__ ((weak)); -void anv_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures) __attribute__ ((weak)); -void anv_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties) __attribute__ ((weak)); -VkResult anv_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties) __attribute__ ((weak)); +PFN_vkVoidFunction anv_GetDeviceProcAddr(VkDevice device, const char* pName) __attribute__ ((weak)); +PFN_vkVoidFunction anv_GetInstanceProcAddr(VkInstance instance, const char* pName) __attribute__ ((weak)); void anv_GetPhysicalDeviceProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties* pProperties) __attribute__ ((weak)); void anv_GetPhysicalDeviceQueueFamilyProperties(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties* pQueueFamilyProperties) __attribute__ ((weak)); void anv_GetPhysicalDeviceMemoryProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties* pMemoryProperties) __attribute__ ((weak)); -PFN_vkVoidFunction anv_GetInstanceProcAddr(VkInstance instance, const char* pName) __attribute__ ((weak)); -PFN_vkVoidFunction anv_GetDeviceProcAddr(VkDevice device, const char* pName) __attribute__ ((weak)); +void anv_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures) __attribute__ ((weak)); +void anv_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties) __attribute__ ((weak)); +VkResult anv_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties) __attribute__ ((weak)); VkResult anv_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDevice* pDevice) __attribute__ ((weak)); void anv_DestroyDevice(VkDevice device, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); -VkResult anv_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak)); -VkResult anv_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak)); VkResult anv_EnumerateInstanceLayerProperties(uint32_t* pPropertyCount, VkLayerProperties* pProperties) __attribute__ ((weak)); +VkResult anv_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak)); VkResult anv_EnumerateDeviceLayerProperties(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkLayerProperties* pProperties) __attribute__ ((weak)); +VkResult anv_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak)); void anv_GetDeviceQueue(VkDevice device, uint32_t queueFamilyIndex, uint32_t queueIndex, VkQueue* pQueue) __attribute__ ((weak)); VkResult anv_QueueSubmit(VkQueue queue, uint32_t submitCount, const VkSubmitInfo* pSubmits, VkFence fence) __attribute__ ((weak)); VkResult anv_QueueWaitIdle(VkQueue queue) __attribute__ ((weak)); @@ -402,10 +452,10 @@ VkResult anv_FlushMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges) __attribute__ ((weak)); VkResult anv_InvalidateMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges) __attribute__ ((weak)); void anv_GetDeviceMemoryCommitment(VkDevice device, VkDeviceMemory memory, VkDeviceSize* pCommittedMemoryInBytes) __attribute__ ((weak)); -VkResult anv_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak)); -VkResult anv_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak)); void anv_GetBufferMemoryRequirements(VkDevice device, VkBuffer buffer, VkMemoryRequirements* pMemoryRequirements) __attribute__ ((weak)); +VkResult anv_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak)); void anv_GetImageMemoryRequirements(VkDevice device, VkImage image, VkMemoryRequirements* pMemoryRequirements) __attribute__ ((weak)); +VkResult anv_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak)); void anv_GetImageSparseMemoryRequirements(VkDevice device, VkImage image, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements* pSparseMemoryRequirements) __attribute__ ((weak)); void anv_GetPhysicalDeviceSparseImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkSampleCountFlagBits samples, VkImageUsageFlags usage, VkImageTiling tiling, uint32_t* pPropertyCount, VkSparseImageFormatProperties* pProperties) __attribute__ ((weak)); VkResult anv_QueueBindSparse(VkQueue queue, uint32_t bindInfoCount, const VkBindSparseInfo* pBindInfo, VkFence fence) __attribute__ ((weak)); @@ -491,7 +541,7 @@ void anv_CmdBlitImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageBlit* pRegions, VkFilter filter) __attribute__ ((weak)); void anv_CmdCopyBufferToImage(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkBufferImageCopy* pRegions) __attribute__ ((weak)); void anv_CmdCopyImageToBuffer(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferImageCopy* pRegions) __attribute__ ((weak)); -void anv_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const uint32_t* pData) __attribute__ ((weak)); +void anv_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const void* pData) __attribute__ ((weak)); void anv_CmdFillBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize size, uint32_t data) __attribute__ ((weak)); void anv_CmdClearColorImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearColorValue* pColor, uint32_t rangeCount, const VkImageSubresourceRange* pRanges) __attribute__ ((weak)); void anv_CmdClearDepthStencilImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearDepthStencilValue* pDepthStencil, uint32_t rangeCount, const VkImageSubresourceRange* pRanges) __attribute__ ((weak)); @@ -511,6 +561,23 @@ void anv_CmdNextSubpass(VkCommandBuffer commandBuffer, VkSubpassContents contents) __attribute__ ((weak)); void anv_CmdEndRenderPass(VkCommandBuffer commandBuffer) __attribute__ ((weak)); void anv_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers) __attribute__ ((weak)); +#ifdef VK_USE_PLATFORM_ANDROID_KHR +VkResult anv_CreateAndroidSurfaceKHR(VkInstance instance, const VkAndroidSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_ANDROID_KHR +VkResult anv_GetPhysicalDeviceDisplayPropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPropertiesKHR* pProperties) __attribute__ ((weak)); +VkResult anv_GetPhysicalDeviceDisplayPlanePropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPlanePropertiesKHR* pProperties) __attribute__ ((weak)); +VkResult anv_GetDisplayPlaneSupportedDisplaysKHR(VkPhysicalDevice physicalDevice, uint32_t planeIndex, uint32_t* pDisplayCount, VkDisplayKHR* pDisplays) __attribute__ ((weak)); +VkResult anv_GetDisplayModePropertiesKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, uint32_t* pPropertyCount, VkDisplayModePropertiesKHR* pProperties) __attribute__ ((weak)); +VkResult anv_CreateDisplayModeKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, const VkDisplayModeCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDisplayModeKHR* pMode) __attribute__ ((weak)); +VkResult anv_GetDisplayPlaneCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkDisplayModeKHR mode, uint32_t planeIndex, VkDisplayPlaneCapabilitiesKHR* pCapabilities) __attribute__ ((weak)); +VkResult anv_CreateDisplayPlaneSurfaceKHR(VkInstance instance, const VkDisplaySurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +VkResult anv_CreateSharedSwapchainsKHR(VkDevice device, uint32_t swapchainCount, const VkSwapchainCreateInfoKHR* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchains) __attribute__ ((weak)); +#ifdef VK_USE_PLATFORM_MIR_KHR +VkResult anv_CreateMirSurfaceKHR(VkInstance instance, const VkMirSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_MIR_KHR +#ifdef VK_USE_PLATFORM_MIR_KHR +VkBool32 anv_GetPhysicalDeviceMirPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, MirConnection* connection) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_MIR_KHR void anv_DestroySurfaceKHR(VkInstance instance, VkSurfaceKHR surface, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); VkResult anv_GetPhysicalDeviceSurfaceSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, VkSurfaceKHR surface, VkBool32* pSupported) __attribute__ ((weak)); VkResult anv_GetPhysicalDeviceSurfaceCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, VkSurfaceCapabilitiesKHR* pSurfaceCapabilities) __attribute__ ((weak)); @@ -521,49 +588,73 @@ VkResult anv_GetSwapchainImagesKHR(VkDevice device, VkSwapchainKHR swapchain, uint32_t* pSwapchainImageCount, VkImage* pSwapchainImages) __attribute__ ((weak)); VkResult anv_AcquireNextImageKHR(VkDevice device, VkSwapchainKHR swapchain, uint64_t timeout, VkSemaphore semaphore, VkFence fence, uint32_t* pImageIndex) __attribute__ ((weak)); VkResult anv_QueuePresentKHR(VkQueue queue, const VkPresentInfoKHR* pPresentInfo) __attribute__ ((weak)); -VkResult anv_GetPhysicalDeviceDisplayPropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPropertiesKHR* pProperties) __attribute__ ((weak)); -VkResult anv_GetPhysicalDeviceDisplayPlanePropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPlanePropertiesKHR* pProperties) __attribute__ ((weak)); -VkResult anv_GetDisplayPlaneSupportedDisplaysKHR(VkPhysicalDevice physicalDevice, uint32_t planeIndex, uint32_t* pDisplayCount, VkDisplayKHR* pDisplays) __attribute__ ((weak)); -VkResult anv_GetDisplayModePropertiesKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, uint32_t* pPropertyCount, VkDisplayModePropertiesKHR* pProperties) __attribute__ ((weak)); -VkResult anv_CreateDisplayModeKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, const VkDisplayModeCreateInfoKHR*pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDisplayModeKHR* pMode) __attribute__ ((weak)); -VkResult anv_GetDisplayPlaneCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkDisplayModeKHR mode, uint32_t planeIndex, VkDisplayPlaneCapabilitiesKHR* pCapabilities) __attribute__ ((weak)); -VkResult anv_CreateDisplayPlaneSurfaceKHR(VkInstance instance, const VkDisplaySurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); -VkResult anv_CreateSharedSwapchainsKHR(VkDevice device, uint32_t swapchainCount, const VkSwapchainCreateInfoKHR* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchains) __attribute__ ((weak)); -#ifdef VK_USE_PLATFORM_XCB_KHR -VkResult anv_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); -#endif // VK_USE_PLATFORM_XCB_KHR -#ifdef VK_USE_PLATFORM_XCB_KHR -VkBool32 anv_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id) __attribute__ ((weak)); -#endif // VK_USE_PLATFORM_XCB_KHR #ifdef VK_USE_PLATFORM_WAYLAND_KHR VkResult anv_CreateWaylandSurfaceKHR(VkInstance instance, const VkWaylandSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); #endif // VK_USE_PLATFORM_WAYLAND_KHR #ifdef VK_USE_PLATFORM_WAYLAND_KHR VkBool32 anv_GetPhysicalDeviceWaylandPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, struct wl_display* display) __attribute__ ((weak)); #endif // VK_USE_PLATFORM_WAYLAND_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR +VkResult anv_CreateWin32SurfaceKHR(VkInstance instance, const VkWin32SurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR +VkBool32 anv_GetPhysicalDeviceWin32PresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR +VkResult anv_CreateXlibSurfaceKHR(VkInstance instance, const VkXlibSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR +VkBool32 anv_GetPhysicalDeviceXlibPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, Display* dpy, VisualID visualID) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR +VkResult anv_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_XCB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR +VkBool32 anv_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_XCB_KHR VkResult anv_CreateDebugReportCallbackEXT(VkInstance instance, const VkDebugReportCallbackCreateInfoEXT* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDebugReportCallbackEXT* pCallback) __attribute__ ((weak)); void anv_DestroyDebugReportCallbackEXT(VkInstance instance, VkDebugReportCallbackEXT callback, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); void anv_DebugReportMessageEXT(VkInstance instance, VkDebugReportFlagsEXT flags, VkDebugReportObjectTypeEXT objectType, uint64_t object, size_t location, int32_t messageCode, const char* pLayerPrefix, const char* pMessage) __attribute__ ((weak)); -VkResult anv_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMem, VkImage* pImage) __attribute__ ((weak)); +VkResult anv_DebugMarkerSetObjectNameEXT(VkDevice device, VkDebugMarkerObjectNameInfoEXT* pNameInfo) __attribute__ ((weak)); +VkResult anv_DebugMarkerSetObjectTagEXT(VkDevice device, VkDebugMarkerObjectTagInfoEXT* pTagInfo) __attribute__ ((weak)); +void anv_CmdDebugMarkerBeginEXT(VkCommandBuffer commandBuffer, VkDebugMarkerMarkerInfoEXT* pMarkerInfo) __attribute__ ((weak)); +void anv_CmdDebugMarkerEndEXT(VkCommandBuffer commandBuffer) __attribute__ ((weak)); +void anv_CmdDebugMarkerInsertEXT(VkCommandBuffer commandBuffer, VkDebugMarkerMarkerInfoEXT* pMarkerInfo) __attribute__ ((weak)); +VkResult anv_GetPhysicalDeviceExternalImageFormatPropertiesNV(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkExternalMemoryHandleTypeFlagsNV externalHandleType, VkExternalImageFormatPropertiesNV* pExternalImageFormatProperties) __attribute__ ((weak)); +#ifdef VK_USE_PLATFORM_WIN32_KHR +VkResult anv_GetMemoryWin32HandleNV(VkDevice device, VkDeviceMemory memory, VkExternalMemoryHandleTypeFlagsNV handleType, HANDLE* pHandle) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_WIN32_KHR +void anv_CmdDrawIndirectCountAMD(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkBuffer countBuffer, VkDeviceSize countBufferOffset, uint32_t maxDrawCount, uint32_t stride) __attribute__ ((weak)); +void anv_CmdDrawIndexedIndirectCountAMD(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkBuffer countBuffer, VkDeviceSize countBufferOffset, uint32_t maxDrawCount, uint32_t stride) __attribute__ ((weak)); +void anv_CmdProcessCommandsNVX(VkCommandBuffer commandBuffer, const VkCmdProcessCommandsInfoNVX* pProcessCommandsInfo) __attribute__ ((weak)); +void anv_CmdReserveSpaceForCommandsNVX(VkCommandBuffer commandBuffer, const VkCmdReserveSpaceForCommandsInfoNVX* pReserveSpaceInfo) __attribute__ ((weak)); +VkResult anv_CreateIndirectCommandsLayoutNVX(VkDevice device, const VkIndirectCommandsLayoutCreateInfoNVX* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkIndirectCommandsLayoutNVX* pIndirectCommandsLayout) __attribute__ ((weak)); +void anv_DestroyIndirectCommandsLayoutNVX(VkDevice device, VkIndirectCommandsLayoutNVX indirectCommandsLayout, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult anv_CreateObjectTableNVX(VkDevice device, const VkObjectTableCreateInfoNVX* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkObjectTableNVX* pObjectTable) __attribute__ ((weak)); +void anv_DestroyObjectTableNVX(VkDevice device, VkObjectTableNVX objectTable, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult anv_RegisterObjectsNVX(VkDevice device, VkObjectTableNVX objectTable, uint32_t objectCount, const VkObjectTableEntryNVX* const* ppObjectTableEntries, const uint32_t* pObjectIndices) __attribute__ ((weak)); +VkResult anv_UnregisterObjectsNVX(VkDevice device, VkObjectTableNVX objectTable, uint32_t objectCount, const VkObjectEntryTypeNVX* pObjectEntryTypes, const uint32_t* pObjectIndices) __attribute__ ((weak)); +void anv_GetPhysicalDeviceGeneratedCommandsPropertiesNVX(VkPhysicalDevice physicalDevice, VkDeviceGeneratedCommandsFeaturesNVX* pFeatures, VkDeviceGeneratedCommandsLimitsNVX* pLimits) __attribute__ ((weak)); +VkResult anv_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator,VkDeviceMemory* pMem,VkImage* pImage) __attribute__ ((weak)); const struct anv_dispatch_table anv_layer = { .CreateInstance = anv_CreateInstance, .DestroyInstance = anv_DestroyInstance, .EnumeratePhysicalDevices = anv_EnumeratePhysicalDevices, - .GetPhysicalDeviceFeatures = anv_GetPhysicalDeviceFeatures, - .GetPhysicalDeviceFormatProperties = anv_GetPhysicalDeviceFormatProperties, - .GetPhysicalDeviceImageFormatProperties = anv_GetPhysicalDeviceImageFormatProperties, + .GetDeviceProcAddr = anv_GetDeviceProcAddr, + .GetInstanceProcAddr = anv_GetInstanceProcAddr, .GetPhysicalDeviceProperties = anv_GetPhysicalDeviceProperties, .GetPhysicalDeviceQueueFamilyProperties = anv_GetPhysicalDeviceQueueFamilyProperties, .GetPhysicalDeviceMemoryProperties = anv_GetPhysicalDeviceMemoryProperties, - .GetInstanceProcAddr = anv_GetInstanceProcAddr, - .GetDeviceProcAddr = anv_GetDeviceProcAddr, + .GetPhysicalDeviceFeatures = anv_GetPhysicalDeviceFeatures, + .GetPhysicalDeviceFormatProperties = anv_GetPhysicalDeviceFormatProperties, + .GetPhysicalDeviceImageFormatProperties = anv_GetPhysicalDeviceImageFormatProperties, .CreateDevice = anv_CreateDevice, .DestroyDevice = anv_DestroyDevice, - .EnumerateInstanceExtensionProperties = anv_EnumerateInstanceExtensionProperties, - .EnumerateDeviceExtensionProperties = anv_EnumerateDeviceExtensionProperties, .EnumerateInstanceLayerProperties = anv_EnumerateInstanceLayerProperties, + .EnumerateInstanceExtensionProperties = anv_EnumerateInstanceExtensionProperties, .EnumerateDeviceLayerProperties = anv_EnumerateDeviceLayerProperties, + .EnumerateDeviceExtensionProperties = anv_EnumerateDeviceExtensionProperties, .GetDeviceQueue = anv_GetDeviceQueue, .QueueSubmit = anv_QueueSubmit, .QueueWaitIdle = anv_QueueWaitIdle, @@ -575,10 +666,10 @@ .FlushMappedMemoryRanges = anv_FlushMappedMemoryRanges, .InvalidateMappedMemoryRanges = anv_InvalidateMappedMemoryRanges, .GetDeviceMemoryCommitment = anv_GetDeviceMemoryCommitment, - .BindBufferMemory = anv_BindBufferMemory, - .BindImageMemory = anv_BindImageMemory, .GetBufferMemoryRequirements = anv_GetBufferMemoryRequirements, + .BindBufferMemory = anv_BindBufferMemory, .GetImageMemoryRequirements = anv_GetImageMemoryRequirements, + .BindImageMemory = anv_BindImageMemory, .GetImageSparseMemoryRequirements = anv_GetImageSparseMemoryRequirements, .GetPhysicalDeviceSparseImageFormatProperties = anv_GetPhysicalDeviceSparseImageFormatProperties, .QueueBindSparse = anv_QueueBindSparse, @@ -684,6 +775,23 @@ .CmdNextSubpass = anv_CmdNextSubpass, .CmdEndRenderPass = anv_CmdEndRenderPass, .CmdExecuteCommands = anv_CmdExecuteCommands, +#ifdef VK_USE_PLATFORM_ANDROID_KHR + .CreateAndroidSurfaceKHR = anv_CreateAndroidSurfaceKHR, +#endif // VK_USE_PLATFORM_ANDROID_KHR + .GetPhysicalDeviceDisplayPropertiesKHR = anv_GetPhysicalDeviceDisplayPropertiesKHR, + .GetPhysicalDeviceDisplayPlanePropertiesKHR = anv_GetPhysicalDeviceDisplayPlanePropertiesKHR, + .GetDisplayPlaneSupportedDisplaysKHR = anv_GetDisplayPlaneSupportedDisplaysKHR, + .GetDisplayModePropertiesKHR = anv_GetDisplayModePropertiesKHR, + .CreateDisplayModeKHR = anv_CreateDisplayModeKHR, + .GetDisplayPlaneCapabilitiesKHR = anv_GetDisplayPlaneCapabilitiesKHR, + .CreateDisplayPlaneSurfaceKHR = anv_CreateDisplayPlaneSurfaceKHR, + .CreateSharedSwapchainsKHR = anv_CreateSharedSwapchainsKHR, +#ifdef VK_USE_PLATFORM_MIR_KHR + .CreateMirSurfaceKHR = anv_CreateMirSurfaceKHR, +#endif // VK_USE_PLATFORM_MIR_KHR +#ifdef VK_USE_PLATFORM_MIR_KHR + .GetPhysicalDeviceMirPresentationSupportKHR = anv_GetPhysicalDeviceMirPresentationSupportKHR, +#endif // VK_USE_PLATFORM_MIR_KHR .DestroySurfaceKHR = anv_DestroySurfaceKHR, .GetPhysicalDeviceSurfaceSupportKHR = anv_GetPhysicalDeviceSurfaceSupportKHR, .GetPhysicalDeviceSurfaceCapabilitiesKHR = anv_GetPhysicalDeviceSurfaceCapabilitiesKHR, @@ -694,49 +802,73 @@ .GetSwapchainImagesKHR = anv_GetSwapchainImagesKHR, .AcquireNextImageKHR = anv_AcquireNextImageKHR, .QueuePresentKHR = anv_QueuePresentKHR, - .GetPhysicalDeviceDisplayPropertiesKHR = anv_GetPhysicalDeviceDisplayPropertiesKHR, - .GetPhysicalDeviceDisplayPlanePropertiesKHR = anv_GetPhysicalDeviceDisplayPlanePropertiesKHR, - .GetDisplayPlaneSupportedDisplaysKHR = anv_GetDisplayPlaneSupportedDisplaysKHR, - .GetDisplayModePropertiesKHR = anv_GetDisplayModePropertiesKHR, - .CreateDisplayModeKHR = anv_CreateDisplayModeKHR, - .GetDisplayPlaneCapabilitiesKHR = anv_GetDisplayPlaneCapabilitiesKHR, - .CreateDisplayPlaneSurfaceKHR = anv_CreateDisplayPlaneSurfaceKHR, - .CreateSharedSwapchainsKHR = anv_CreateSharedSwapchainsKHR, -#ifdef VK_USE_PLATFORM_XCB_KHR - .CreateXcbSurfaceKHR = anv_CreateXcbSurfaceKHR, -#endif // VK_USE_PLATFORM_XCB_KHR -#ifdef VK_USE_PLATFORM_XCB_KHR - .GetPhysicalDeviceXcbPresentationSupportKHR = anv_GetPhysicalDeviceXcbPresentationSupportKHR, -#endif // VK_USE_PLATFORM_XCB_KHR #ifdef VK_USE_PLATFORM_WAYLAND_KHR .CreateWaylandSurfaceKHR = anv_CreateWaylandSurfaceKHR, #endif // VK_USE_PLATFORM_WAYLAND_KHR #ifdef VK_USE_PLATFORM_WAYLAND_KHR .GetPhysicalDeviceWaylandPresentationSupportKHR = anv_GetPhysicalDeviceWaylandPresentationSupportKHR, #endif // VK_USE_PLATFORM_WAYLAND_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR + .CreateWin32SurfaceKHR = anv_CreateWin32SurfaceKHR, +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR + .GetPhysicalDeviceWin32PresentationSupportKHR = anv_GetPhysicalDeviceWin32PresentationSupportKHR, +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR + .CreateXlibSurfaceKHR = anv_CreateXlibSurfaceKHR, +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR + .GetPhysicalDeviceXlibPresentationSupportKHR = anv_GetPhysicalDeviceXlibPresentationSupportKHR, +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR + .CreateXcbSurfaceKHR = anv_CreateXcbSurfaceKHR, +#endif // VK_USE_PLATFORM_XCB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR + .GetPhysicalDeviceXcbPresentationSupportKHR = anv_GetPhysicalDeviceXcbPresentationSupportKHR, +#endif // VK_USE_PLATFORM_XCB_KHR .CreateDebugReportCallbackEXT = anv_CreateDebugReportCallbackEXT, .DestroyDebugReportCallbackEXT = anv_DestroyDebugReportCallbackEXT, .DebugReportMessageEXT = anv_DebugReportMessageEXT, + .DebugMarkerSetObjectNameEXT = anv_DebugMarkerSetObjectNameEXT, + .DebugMarkerSetObjectTagEXT = anv_DebugMarkerSetObjectTagEXT, + .CmdDebugMarkerBeginEXT = anv_CmdDebugMarkerBeginEXT, + .CmdDebugMarkerEndEXT = anv_CmdDebugMarkerEndEXT, + .CmdDebugMarkerInsertEXT = anv_CmdDebugMarkerInsertEXT, + .GetPhysicalDeviceExternalImageFormatPropertiesNV = anv_GetPhysicalDeviceExternalImageFormatPropertiesNV, +#ifdef VK_USE_PLATFORM_WIN32_KHR + .GetMemoryWin32HandleNV = anv_GetMemoryWin32HandleNV, +#endif // VK_USE_PLATFORM_WIN32_KHR + .CmdDrawIndirectCountAMD = anv_CmdDrawIndirectCountAMD, + .CmdDrawIndexedIndirectCountAMD = anv_CmdDrawIndexedIndirectCountAMD, + .CmdProcessCommandsNVX = anv_CmdProcessCommandsNVX, + .CmdReserveSpaceForCommandsNVX = anv_CmdReserveSpaceForCommandsNVX, + .CreateIndirectCommandsLayoutNVX = anv_CreateIndirectCommandsLayoutNVX, + .DestroyIndirectCommandsLayoutNVX = anv_DestroyIndirectCommandsLayoutNVX, + .CreateObjectTableNVX = anv_CreateObjectTableNVX, + .DestroyObjectTableNVX = anv_DestroyObjectTableNVX, + .RegisterObjectsNVX = anv_RegisterObjectsNVX, + .UnregisterObjectsNVX = anv_UnregisterObjectsNVX, + .GetPhysicalDeviceGeneratedCommandsPropertiesNVX = anv_GetPhysicalDeviceGeneratedCommandsPropertiesNVX, .CreateDmaBufImageINTEL = anv_CreateDmaBufImageINTEL, }; VkResult gen7_CreateInstance(const VkInstanceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkInstance* pInstance) __attribute__ ((weak)); void gen7_DestroyInstance(VkInstance instance, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); VkResult gen7_EnumeratePhysicalDevices(VkInstance instance, uint32_t* pPhysicalDeviceCount, VkPhysicalDevice* pPhysicalDevices) __attribute__ ((weak)); -void gen7_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures) __attribute__ ((weak)); -void gen7_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties) __attribute__ ((weak)); -VkResult gen7_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties) __attribute__ ((weak)); +PFN_vkVoidFunction gen7_GetDeviceProcAddr(VkDevice device, const char* pName) __attribute__ ((weak)); +PFN_vkVoidFunction gen7_GetInstanceProcAddr(VkInstance instance, const char* pName) __attribute__ ((weak)); void gen7_GetPhysicalDeviceProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties* pProperties) __attribute__ ((weak)); void gen7_GetPhysicalDeviceQueueFamilyProperties(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties* pQueueFamilyProperties) __attribute__ ((weak)); void gen7_GetPhysicalDeviceMemoryProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties* pMemoryProperties) __attribute__ ((weak)); -PFN_vkVoidFunction gen7_GetInstanceProcAddr(VkInstance instance, const char* pName) __attribute__ ((weak)); -PFN_vkVoidFunction gen7_GetDeviceProcAddr(VkDevice device, const char* pName) __attribute__ ((weak)); +void gen7_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures) __attribute__ ((weak)); +void gen7_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties) __attribute__ ((weak)); +VkResult gen7_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties) __attribute__ ((weak)); VkResult gen7_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDevice* pDevice) __attribute__ ((weak)); void gen7_DestroyDevice(VkDevice device, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); -VkResult gen7_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak)); -VkResult gen7_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak)); VkResult gen7_EnumerateInstanceLayerProperties(uint32_t* pPropertyCount, VkLayerProperties* pProperties) __attribute__ ((weak)); +VkResult gen7_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak)); VkResult gen7_EnumerateDeviceLayerProperties(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkLayerProperties* pProperties) __attribute__ ((weak)); +VkResult gen7_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak)); void gen7_GetDeviceQueue(VkDevice device, uint32_t queueFamilyIndex, uint32_t queueIndex, VkQueue* pQueue) __attribute__ ((weak)); VkResult gen7_QueueSubmit(VkQueue queue, uint32_t submitCount, const VkSubmitInfo* pSubmits, VkFence fence) __attribute__ ((weak)); VkResult gen7_QueueWaitIdle(VkQueue queue) __attribute__ ((weak)); @@ -748,10 +880,10 @@ VkResult gen7_FlushMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges) __attribute__ ((weak)); VkResult gen7_InvalidateMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges) __attribute__ ((weak)); void gen7_GetDeviceMemoryCommitment(VkDevice device, VkDeviceMemory memory, VkDeviceSize* pCommittedMemoryInBytes) __attribute__ ((weak)); -VkResult gen7_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak)); -VkResult gen7_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak)); void gen7_GetBufferMemoryRequirements(VkDevice device, VkBuffer buffer, VkMemoryRequirements* pMemoryRequirements) __attribute__ ((weak)); +VkResult gen7_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak)); void gen7_GetImageMemoryRequirements(VkDevice device, VkImage image, VkMemoryRequirements* pMemoryRequirements) __attribute__ ((weak)); +VkResult gen7_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak)); void gen7_GetImageSparseMemoryRequirements(VkDevice device, VkImage image, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements* pSparseMemoryRequirements) __attribute__ ((weak)); void gen7_GetPhysicalDeviceSparseImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkSampleCountFlagBits samples, VkImageUsageFlags usage, VkImageTiling tiling, uint32_t* pPropertyCount, VkSparseImageFormatProperties* pProperties) __attribute__ ((weak)); VkResult gen7_QueueBindSparse(VkQueue queue, uint32_t bindInfoCount, const VkBindSparseInfo* pBindInfo, VkFence fence) __attribute__ ((weak)); @@ -837,7 +969,7 @@ void gen7_CmdBlitImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageBlit* pRegions, VkFilter filter) __attribute__ ((weak)); void gen7_CmdCopyBufferToImage(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkBufferImageCopy* pRegions) __attribute__ ((weak)); void gen7_CmdCopyImageToBuffer(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferImageCopy* pRegions) __attribute__ ((weak)); -void gen7_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const uint32_t* pData) __attribute__ ((weak)); +void gen7_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const void* pData) __attribute__ ((weak)); void gen7_CmdFillBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize size, uint32_t data) __attribute__ ((weak)); void gen7_CmdClearColorImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearColorValue* pColor, uint32_t rangeCount, const VkImageSubresourceRange* pRanges) __attribute__ ((weak)); void gen7_CmdClearDepthStencilImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearDepthStencilValue* pDepthStencil, uint32_t rangeCount, const VkImageSubresourceRange* pRanges) __attribute__ ((weak)); @@ -857,6 +989,23 @@ void gen7_CmdNextSubpass(VkCommandBuffer commandBuffer, VkSubpassContents contents) __attribute__ ((weak)); void gen7_CmdEndRenderPass(VkCommandBuffer commandBuffer) __attribute__ ((weak)); void gen7_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers) __attribute__ ((weak)); +#ifdef VK_USE_PLATFORM_ANDROID_KHR +VkResult gen7_CreateAndroidSurfaceKHR(VkInstance instance, const VkAndroidSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_ANDROID_KHR +VkResult gen7_GetPhysicalDeviceDisplayPropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPropertiesKHR* pProperties) __attribute__ ((weak)); +VkResult gen7_GetPhysicalDeviceDisplayPlanePropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPlanePropertiesKHR* pProperties) __attribute__ ((weak)); +VkResult gen7_GetDisplayPlaneSupportedDisplaysKHR(VkPhysicalDevice physicalDevice, uint32_t planeIndex, uint32_t* pDisplayCount, VkDisplayKHR* pDisplays) __attribute__ ((weak)); +VkResult gen7_GetDisplayModePropertiesKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, uint32_t* pPropertyCount, VkDisplayModePropertiesKHR* pProperties) __attribute__ ((weak)); +VkResult gen7_CreateDisplayModeKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, const VkDisplayModeCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDisplayModeKHR* pMode) __attribute__ ((weak)); +VkResult gen7_GetDisplayPlaneCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkDisplayModeKHR mode, uint32_t planeIndex, VkDisplayPlaneCapabilitiesKHR* pCapabilities) __attribute__ ((weak)); +VkResult gen7_CreateDisplayPlaneSurfaceKHR(VkInstance instance, const VkDisplaySurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +VkResult gen7_CreateSharedSwapchainsKHR(VkDevice device, uint32_t swapchainCount, const VkSwapchainCreateInfoKHR* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchains) __attribute__ ((weak)); +#ifdef VK_USE_PLATFORM_MIR_KHR +VkResult gen7_CreateMirSurfaceKHR(VkInstance instance, const VkMirSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_MIR_KHR +#ifdef VK_USE_PLATFORM_MIR_KHR +VkBool32 gen7_GetPhysicalDeviceMirPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, MirConnection* connection) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_MIR_KHR void gen7_DestroySurfaceKHR(VkInstance instance, VkSurfaceKHR surface, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); VkResult gen7_GetPhysicalDeviceSurfaceSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, VkSurfaceKHR surface, VkBool32* pSupported) __attribute__ ((weak)); VkResult gen7_GetPhysicalDeviceSurfaceCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, VkSurfaceCapabilitiesKHR* pSurfaceCapabilities) __attribute__ ((weak)); @@ -867,49 +1016,73 @@ VkResult gen7_GetSwapchainImagesKHR(VkDevice device, VkSwapchainKHR swapchain, uint32_t* pSwapchainImageCount, VkImage* pSwapchainImages) __attribute__ ((weak)); VkResult gen7_AcquireNextImageKHR(VkDevice device, VkSwapchainKHR swapchain, uint64_t timeout, VkSemaphore semaphore, VkFence fence, uint32_t* pImageIndex) __attribute__ ((weak)); VkResult gen7_QueuePresentKHR(VkQueue queue, const VkPresentInfoKHR* pPresentInfo) __attribute__ ((weak)); -VkResult gen7_GetPhysicalDeviceDisplayPropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPropertiesKHR* pProperties) __attribute__ ((weak)); -VkResult gen7_GetPhysicalDeviceDisplayPlanePropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPlanePropertiesKHR* pProperties) __attribute__ ((weak)); -VkResult gen7_GetDisplayPlaneSupportedDisplaysKHR(VkPhysicalDevice physicalDevice, uint32_t planeIndex, uint32_t* pDisplayCount, VkDisplayKHR* pDisplays) __attribute__ ((weak)); -VkResult gen7_GetDisplayModePropertiesKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, uint32_t* pPropertyCount, VkDisplayModePropertiesKHR* pProperties) __attribute__ ((weak)); -VkResult gen7_CreateDisplayModeKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, const VkDisplayModeCreateInfoKHR*pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDisplayModeKHR* pMode) __attribute__ ((weak)); -VkResult gen7_GetDisplayPlaneCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkDisplayModeKHR mode, uint32_t planeIndex, VkDisplayPlaneCapabilitiesKHR* pCapabilities) __attribute__ ((weak)); -VkResult gen7_CreateDisplayPlaneSurfaceKHR(VkInstance instance, const VkDisplaySurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); -VkResult gen7_CreateSharedSwapchainsKHR(VkDevice device, uint32_t swapchainCount, const VkSwapchainCreateInfoKHR* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchains) __attribute__ ((weak)); -#ifdef VK_USE_PLATFORM_XCB_KHR -VkResult gen7_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); -#endif // VK_USE_PLATFORM_XCB_KHR -#ifdef VK_USE_PLATFORM_XCB_KHR -VkBool32 gen7_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id) __attribute__ ((weak)); -#endif // VK_USE_PLATFORM_XCB_KHR #ifdef VK_USE_PLATFORM_WAYLAND_KHR VkResult gen7_CreateWaylandSurfaceKHR(VkInstance instance, const VkWaylandSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); #endif // VK_USE_PLATFORM_WAYLAND_KHR #ifdef VK_USE_PLATFORM_WAYLAND_KHR VkBool32 gen7_GetPhysicalDeviceWaylandPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, struct wl_display* display) __attribute__ ((weak)); #endif // VK_USE_PLATFORM_WAYLAND_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR +VkResult gen7_CreateWin32SurfaceKHR(VkInstance instance, const VkWin32SurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR +VkBool32 gen7_GetPhysicalDeviceWin32PresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR +VkResult gen7_CreateXlibSurfaceKHR(VkInstance instance, const VkXlibSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR +VkBool32 gen7_GetPhysicalDeviceXlibPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, Display* dpy, VisualID visualID) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR +VkResult gen7_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_XCB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR +VkBool32 gen7_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_XCB_KHR VkResult gen7_CreateDebugReportCallbackEXT(VkInstance instance, const VkDebugReportCallbackCreateInfoEXT* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDebugReportCallbackEXT* pCallback) __attribute__ ((weak)); void gen7_DestroyDebugReportCallbackEXT(VkInstance instance, VkDebugReportCallbackEXT callback, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); void gen7_DebugReportMessageEXT(VkInstance instance, VkDebugReportFlagsEXT flags, VkDebugReportObjectTypeEXT objectType, uint64_t object, size_t location, int32_t messageCode, const char* pLayerPrefix, const char* pMessage) __attribute__ ((weak)); -VkResult gen7_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMem, VkImage* pImage) __attribute__ ((weak)); +VkResult gen7_DebugMarkerSetObjectNameEXT(VkDevice device, VkDebugMarkerObjectNameInfoEXT* pNameInfo) __attribute__ ((weak)); +VkResult gen7_DebugMarkerSetObjectTagEXT(VkDevice device, VkDebugMarkerObjectTagInfoEXT* pTagInfo) __attribute__ ((weak)); +void gen7_CmdDebugMarkerBeginEXT(VkCommandBuffer commandBuffer, VkDebugMarkerMarkerInfoEXT* pMarkerInfo) __attribute__ ((weak)); +void gen7_CmdDebugMarkerEndEXT(VkCommandBuffer commandBuffer) __attribute__ ((weak)); +void gen7_CmdDebugMarkerInsertEXT(VkCommandBuffer commandBuffer, VkDebugMarkerMarkerInfoEXT* pMarkerInfo) __attribute__ ((weak)); +VkResult gen7_GetPhysicalDeviceExternalImageFormatPropertiesNV(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkExternalMemoryHandleTypeFlagsNV externalHandleType, VkExternalImageFormatPropertiesNV* pExternalImageFormatProperties) __attribute__ ((weak)); +#ifdef VK_USE_PLATFORM_WIN32_KHR +VkResult gen7_GetMemoryWin32HandleNV(VkDevice device, VkDeviceMemory memory, VkExternalMemoryHandleTypeFlagsNV handleType, HANDLE* pHandle) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_WIN32_KHR +void gen7_CmdDrawIndirectCountAMD(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkBuffer countBuffer, VkDeviceSize countBufferOffset, uint32_t maxDrawCount, uint32_t stride) __attribute__ ((weak)); +void gen7_CmdDrawIndexedIndirectCountAMD(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkBuffer countBuffer, VkDeviceSize countBufferOffset, uint32_t maxDrawCount, uint32_t stride) __attribute__ ((weak)); +void gen7_CmdProcessCommandsNVX(VkCommandBuffer commandBuffer, const VkCmdProcessCommandsInfoNVX* pProcessCommandsInfo) __attribute__ ((weak)); +void gen7_CmdReserveSpaceForCommandsNVX(VkCommandBuffer commandBuffer, const VkCmdReserveSpaceForCommandsInfoNVX* pReserveSpaceInfo) __attribute__ ((weak)); +VkResult gen7_CreateIndirectCommandsLayoutNVX(VkDevice device, const VkIndirectCommandsLayoutCreateInfoNVX* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkIndirectCommandsLayoutNVX* pIndirectCommandsLayout) __attribute__ ((weak)); +void gen7_DestroyIndirectCommandsLayoutNVX(VkDevice device, VkIndirectCommandsLayoutNVX indirectCommandsLayout, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult gen7_CreateObjectTableNVX(VkDevice device, const VkObjectTableCreateInfoNVX* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkObjectTableNVX* pObjectTable) __attribute__ ((weak)); +void gen7_DestroyObjectTableNVX(VkDevice device, VkObjectTableNVX objectTable, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult gen7_RegisterObjectsNVX(VkDevice device, VkObjectTableNVX objectTable, uint32_t objectCount, const VkObjectTableEntryNVX* const* ppObjectTableEntries, const uint32_t* pObjectIndices) __attribute__ ((weak)); +VkResult gen7_UnregisterObjectsNVX(VkDevice device, VkObjectTableNVX objectTable, uint32_t objectCount, const VkObjectEntryTypeNVX* pObjectEntryTypes, const uint32_t* pObjectIndices) __attribute__ ((weak)); +void gen7_GetPhysicalDeviceGeneratedCommandsPropertiesNVX(VkPhysicalDevice physicalDevice, VkDeviceGeneratedCommandsFeaturesNVX* pFeatures, VkDeviceGeneratedCommandsLimitsNVX* pLimits) __attribute__ ((weak)); +VkResult gen7_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator,VkDeviceMemory* pMem,VkImage* pImage) __attribute__ ((weak)); const struct anv_dispatch_table gen7_layer = { .CreateInstance = gen7_CreateInstance, .DestroyInstance = gen7_DestroyInstance, .EnumeratePhysicalDevices = gen7_EnumeratePhysicalDevices, - .GetPhysicalDeviceFeatures = gen7_GetPhysicalDeviceFeatures, - .GetPhysicalDeviceFormatProperties = gen7_GetPhysicalDeviceFormatProperties, - .GetPhysicalDeviceImageFormatProperties = gen7_GetPhysicalDeviceImageFormatProperties, + .GetDeviceProcAddr = gen7_GetDeviceProcAddr, + .GetInstanceProcAddr = gen7_GetInstanceProcAddr, .GetPhysicalDeviceProperties = gen7_GetPhysicalDeviceProperties, .GetPhysicalDeviceQueueFamilyProperties = gen7_GetPhysicalDeviceQueueFamilyProperties, .GetPhysicalDeviceMemoryProperties = gen7_GetPhysicalDeviceMemoryProperties, - .GetInstanceProcAddr = gen7_GetInstanceProcAddr, - .GetDeviceProcAddr = gen7_GetDeviceProcAddr, + .GetPhysicalDeviceFeatures = gen7_GetPhysicalDeviceFeatures, + .GetPhysicalDeviceFormatProperties = gen7_GetPhysicalDeviceFormatProperties, + .GetPhysicalDeviceImageFormatProperties = gen7_GetPhysicalDeviceImageFormatProperties, .CreateDevice = gen7_CreateDevice, .DestroyDevice = gen7_DestroyDevice, - .EnumerateInstanceExtensionProperties = gen7_EnumerateInstanceExtensionProperties, - .EnumerateDeviceExtensionProperties = gen7_EnumerateDeviceExtensionProperties, .EnumerateInstanceLayerProperties = gen7_EnumerateInstanceLayerProperties, + .EnumerateInstanceExtensionProperties = gen7_EnumerateInstanceExtensionProperties, .EnumerateDeviceLayerProperties = gen7_EnumerateDeviceLayerProperties, + .EnumerateDeviceExtensionProperties = gen7_EnumerateDeviceExtensionProperties, .GetDeviceQueue = gen7_GetDeviceQueue, .QueueSubmit = gen7_QueueSubmit, .QueueWaitIdle = gen7_QueueWaitIdle, @@ -921,10 +1094,10 @@ .FlushMappedMemoryRanges = gen7_FlushMappedMemoryRanges, .InvalidateMappedMemoryRanges = gen7_InvalidateMappedMemoryRanges, .GetDeviceMemoryCommitment = gen7_GetDeviceMemoryCommitment, - .BindBufferMemory = gen7_BindBufferMemory, - .BindImageMemory = gen7_BindImageMemory, .GetBufferMemoryRequirements = gen7_GetBufferMemoryRequirements, + .BindBufferMemory = gen7_BindBufferMemory, .GetImageMemoryRequirements = gen7_GetImageMemoryRequirements, + .BindImageMemory = gen7_BindImageMemory, .GetImageSparseMemoryRequirements = gen7_GetImageSparseMemoryRequirements, .GetPhysicalDeviceSparseImageFormatProperties = gen7_GetPhysicalDeviceSparseImageFormatProperties, .QueueBindSparse = gen7_QueueBindSparse, @@ -1030,6 +1203,23 @@ .CmdNextSubpass = gen7_CmdNextSubpass, .CmdEndRenderPass = gen7_CmdEndRenderPass, .CmdExecuteCommands = gen7_CmdExecuteCommands, +#ifdef VK_USE_PLATFORM_ANDROID_KHR + .CreateAndroidSurfaceKHR = gen7_CreateAndroidSurfaceKHR, +#endif // VK_USE_PLATFORM_ANDROID_KHR + .GetPhysicalDeviceDisplayPropertiesKHR = gen7_GetPhysicalDeviceDisplayPropertiesKHR, + .GetPhysicalDeviceDisplayPlanePropertiesKHR = gen7_GetPhysicalDeviceDisplayPlanePropertiesKHR, + .GetDisplayPlaneSupportedDisplaysKHR = gen7_GetDisplayPlaneSupportedDisplaysKHR, + .GetDisplayModePropertiesKHR = gen7_GetDisplayModePropertiesKHR, + .CreateDisplayModeKHR = gen7_CreateDisplayModeKHR, + .GetDisplayPlaneCapabilitiesKHR = gen7_GetDisplayPlaneCapabilitiesKHR, + .CreateDisplayPlaneSurfaceKHR = gen7_CreateDisplayPlaneSurfaceKHR, + .CreateSharedSwapchainsKHR = gen7_CreateSharedSwapchainsKHR, +#ifdef VK_USE_PLATFORM_MIR_KHR + .CreateMirSurfaceKHR = gen7_CreateMirSurfaceKHR, +#endif // VK_USE_PLATFORM_MIR_KHR +#ifdef VK_USE_PLATFORM_MIR_KHR + .GetPhysicalDeviceMirPresentationSupportKHR = gen7_GetPhysicalDeviceMirPresentationSupportKHR, +#endif // VK_USE_PLATFORM_MIR_KHR .DestroySurfaceKHR = gen7_DestroySurfaceKHR, .GetPhysicalDeviceSurfaceSupportKHR = gen7_GetPhysicalDeviceSurfaceSupportKHR, .GetPhysicalDeviceSurfaceCapabilitiesKHR = gen7_GetPhysicalDeviceSurfaceCapabilitiesKHR, @@ -1040,49 +1230,73 @@ .GetSwapchainImagesKHR = gen7_GetSwapchainImagesKHR, .AcquireNextImageKHR = gen7_AcquireNextImageKHR, .QueuePresentKHR = gen7_QueuePresentKHR, - .GetPhysicalDeviceDisplayPropertiesKHR = gen7_GetPhysicalDeviceDisplayPropertiesKHR, - .GetPhysicalDeviceDisplayPlanePropertiesKHR = gen7_GetPhysicalDeviceDisplayPlanePropertiesKHR, - .GetDisplayPlaneSupportedDisplaysKHR = gen7_GetDisplayPlaneSupportedDisplaysKHR, - .GetDisplayModePropertiesKHR = gen7_GetDisplayModePropertiesKHR, - .CreateDisplayModeKHR = gen7_CreateDisplayModeKHR, - .GetDisplayPlaneCapabilitiesKHR = gen7_GetDisplayPlaneCapabilitiesKHR, - .CreateDisplayPlaneSurfaceKHR = gen7_CreateDisplayPlaneSurfaceKHR, - .CreateSharedSwapchainsKHR = gen7_CreateSharedSwapchainsKHR, -#ifdef VK_USE_PLATFORM_XCB_KHR - .CreateXcbSurfaceKHR = gen7_CreateXcbSurfaceKHR, -#endif // VK_USE_PLATFORM_XCB_KHR -#ifdef VK_USE_PLATFORM_XCB_KHR - .GetPhysicalDeviceXcbPresentationSupportKHR = gen7_GetPhysicalDeviceXcbPresentationSupportKHR, -#endif // VK_USE_PLATFORM_XCB_KHR #ifdef VK_USE_PLATFORM_WAYLAND_KHR .CreateWaylandSurfaceKHR = gen7_CreateWaylandSurfaceKHR, #endif // VK_USE_PLATFORM_WAYLAND_KHR #ifdef VK_USE_PLATFORM_WAYLAND_KHR .GetPhysicalDeviceWaylandPresentationSupportKHR = gen7_GetPhysicalDeviceWaylandPresentationSupportKHR, #endif // VK_USE_PLATFORM_WAYLAND_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR + .CreateWin32SurfaceKHR = gen7_CreateWin32SurfaceKHR, +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR + .GetPhysicalDeviceWin32PresentationSupportKHR = gen7_GetPhysicalDeviceWin32PresentationSupportKHR, +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR + .CreateXlibSurfaceKHR = gen7_CreateXlibSurfaceKHR, +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR + .GetPhysicalDeviceXlibPresentationSupportKHR = gen7_GetPhysicalDeviceXlibPresentationSupportKHR, +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR + .CreateXcbSurfaceKHR = gen7_CreateXcbSurfaceKHR, +#endif // VK_USE_PLATFORM_XCB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR + .GetPhysicalDeviceXcbPresentationSupportKHR = gen7_GetPhysicalDeviceXcbPresentationSupportKHR, +#endif // VK_USE_PLATFORM_XCB_KHR .CreateDebugReportCallbackEXT = gen7_CreateDebugReportCallbackEXT, .DestroyDebugReportCallbackEXT = gen7_DestroyDebugReportCallbackEXT, .DebugReportMessageEXT = gen7_DebugReportMessageEXT, + .DebugMarkerSetObjectNameEXT = gen7_DebugMarkerSetObjectNameEXT, + .DebugMarkerSetObjectTagEXT = gen7_DebugMarkerSetObjectTagEXT, + .CmdDebugMarkerBeginEXT = gen7_CmdDebugMarkerBeginEXT, + .CmdDebugMarkerEndEXT = gen7_CmdDebugMarkerEndEXT, + .CmdDebugMarkerInsertEXT = gen7_CmdDebugMarkerInsertEXT, + .GetPhysicalDeviceExternalImageFormatPropertiesNV = gen7_GetPhysicalDeviceExternalImageFormatPropertiesNV, +#ifdef VK_USE_PLATFORM_WIN32_KHR + .GetMemoryWin32HandleNV = gen7_GetMemoryWin32HandleNV, +#endif // VK_USE_PLATFORM_WIN32_KHR + .CmdDrawIndirectCountAMD = gen7_CmdDrawIndirectCountAMD, + .CmdDrawIndexedIndirectCountAMD = gen7_CmdDrawIndexedIndirectCountAMD, + .CmdProcessCommandsNVX = gen7_CmdProcessCommandsNVX, + .CmdReserveSpaceForCommandsNVX = gen7_CmdReserveSpaceForCommandsNVX, + .CreateIndirectCommandsLayoutNVX = gen7_CreateIndirectCommandsLayoutNVX, + .DestroyIndirectCommandsLayoutNVX = gen7_DestroyIndirectCommandsLayoutNVX, + .CreateObjectTableNVX = gen7_CreateObjectTableNVX, + .DestroyObjectTableNVX = gen7_DestroyObjectTableNVX, + .RegisterObjectsNVX = gen7_RegisterObjectsNVX, + .UnregisterObjectsNVX = gen7_UnregisterObjectsNVX, + .GetPhysicalDeviceGeneratedCommandsPropertiesNVX = gen7_GetPhysicalDeviceGeneratedCommandsPropertiesNVX, .CreateDmaBufImageINTEL = gen7_CreateDmaBufImageINTEL, }; VkResult gen75_CreateInstance(const VkInstanceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkInstance* pInstance) __attribute__ ((weak)); void gen75_DestroyInstance(VkInstance instance, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); VkResult gen75_EnumeratePhysicalDevices(VkInstance instance, uint32_t* pPhysicalDeviceCount, VkPhysicalDevice* pPhysicalDevices) __attribute__ ((weak)); -void gen75_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures) __attribute__ ((weak)); -void gen75_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties) __attribute__ ((weak)); -VkResult gen75_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties) __attribute__ ((weak)); +PFN_vkVoidFunction gen75_GetDeviceProcAddr(VkDevice device, const char* pName) __attribute__ ((weak)); +PFN_vkVoidFunction gen75_GetInstanceProcAddr(VkInstance instance, const char* pName) __attribute__ ((weak)); void gen75_GetPhysicalDeviceProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties* pProperties) __attribute__ ((weak)); void gen75_GetPhysicalDeviceQueueFamilyProperties(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties* pQueueFamilyProperties) __attribute__ ((weak)); void gen75_GetPhysicalDeviceMemoryProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties* pMemoryProperties) __attribute__ ((weak)); -PFN_vkVoidFunction gen75_GetInstanceProcAddr(VkInstance instance, const char* pName) __attribute__ ((weak)); -PFN_vkVoidFunction gen75_GetDeviceProcAddr(VkDevice device, const char* pName) __attribute__ ((weak)); +void gen75_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures) __attribute__ ((weak)); +void gen75_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties) __attribute__ ((weak)); +VkResult gen75_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties) __attribute__ ((weak)); VkResult gen75_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDevice* pDevice) __attribute__ ((weak)); void gen75_DestroyDevice(VkDevice device, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); -VkResult gen75_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak)); -VkResult gen75_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak)); VkResult gen75_EnumerateInstanceLayerProperties(uint32_t* pPropertyCount, VkLayerProperties* pProperties) __attribute__ ((weak)); +VkResult gen75_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak)); VkResult gen75_EnumerateDeviceLayerProperties(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkLayerProperties* pProperties) __attribute__ ((weak)); +VkResult gen75_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak)); void gen75_GetDeviceQueue(VkDevice device, uint32_t queueFamilyIndex, uint32_t queueIndex, VkQueue* pQueue) __attribute__ ((weak)); VkResult gen75_QueueSubmit(VkQueue queue, uint32_t submitCount, const VkSubmitInfo* pSubmits, VkFence fence) __attribute__ ((weak)); VkResult gen75_QueueWaitIdle(VkQueue queue) __attribute__ ((weak)); @@ -1094,10 +1308,10 @@ VkResult gen75_FlushMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges) __attribute__ ((weak)); VkResult gen75_InvalidateMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges) __attribute__ ((weak)); void gen75_GetDeviceMemoryCommitment(VkDevice device, VkDeviceMemory memory, VkDeviceSize* pCommittedMemoryInBytes) __attribute__ ((weak)); -VkResult gen75_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak)); -VkResult gen75_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak)); void gen75_GetBufferMemoryRequirements(VkDevice device, VkBuffer buffer, VkMemoryRequirements* pMemoryRequirements) __attribute__ ((weak)); +VkResult gen75_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak)); void gen75_GetImageMemoryRequirements(VkDevice device, VkImage image, VkMemoryRequirements* pMemoryRequirements) __attribute__ ((weak)); +VkResult gen75_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak)); void gen75_GetImageSparseMemoryRequirements(VkDevice device, VkImage image, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements* pSparseMemoryRequirements) __attribute__ ((weak)); void gen75_GetPhysicalDeviceSparseImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkSampleCountFlagBits samples, VkImageUsageFlags usage, VkImageTiling tiling, uint32_t* pPropertyCount, VkSparseImageFormatProperties* pProperties) __attribute__ ((weak)); VkResult gen75_QueueBindSparse(VkQueue queue, uint32_t bindInfoCount, const VkBindSparseInfo* pBindInfo, VkFence fence) __attribute__ ((weak)); @@ -1183,7 +1397,7 @@ void gen75_CmdBlitImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageBlit* pRegions, VkFilter filter) __attribute__ ((weak)); void gen75_CmdCopyBufferToImage(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkBufferImageCopy* pRegions) __attribute__ ((weak)); void gen75_CmdCopyImageToBuffer(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferImageCopy* pRegions) __attribute__ ((weak)); -void gen75_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const uint32_t* pData) __attribute__ ((weak)); +void gen75_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const void* pData) __attribute__ ((weak)); void gen75_CmdFillBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize size, uint32_t data) __attribute__ ((weak)); void gen75_CmdClearColorImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearColorValue* pColor, uint32_t rangeCount, const VkImageSubresourceRange* pRanges) __attribute__ ((weak)); void gen75_CmdClearDepthStencilImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearDepthStencilValue* pDepthStencil, uint32_t rangeCount, const VkImageSubresourceRange* pRanges) __attribute__ ((weak)); @@ -1203,6 +1417,23 @@ void gen75_CmdNextSubpass(VkCommandBuffer commandBuffer, VkSubpassContents contents) __attribute__ ((weak)); void gen75_CmdEndRenderPass(VkCommandBuffer commandBuffer) __attribute__ ((weak)); void gen75_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers) __attribute__ ((weak)); +#ifdef VK_USE_PLATFORM_ANDROID_KHR +VkResult gen75_CreateAndroidSurfaceKHR(VkInstance instance, const VkAndroidSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_ANDROID_KHR +VkResult gen75_GetPhysicalDeviceDisplayPropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPropertiesKHR* pProperties) __attribute__ ((weak)); +VkResult gen75_GetPhysicalDeviceDisplayPlanePropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPlanePropertiesKHR* pProperties) __attribute__ ((weak)); +VkResult gen75_GetDisplayPlaneSupportedDisplaysKHR(VkPhysicalDevice physicalDevice, uint32_t planeIndex, uint32_t* pDisplayCount, VkDisplayKHR* pDisplays) __attribute__ ((weak)); +VkResult gen75_GetDisplayModePropertiesKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, uint32_t* pPropertyCount, VkDisplayModePropertiesKHR* pProperties) __attribute__ ((weak)); +VkResult gen75_CreateDisplayModeKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, const VkDisplayModeCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDisplayModeKHR* pMode) __attribute__ ((weak)); +VkResult gen75_GetDisplayPlaneCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkDisplayModeKHR mode, uint32_t planeIndex, VkDisplayPlaneCapabilitiesKHR* pCapabilities) __attribute__ ((weak)); +VkResult gen75_CreateDisplayPlaneSurfaceKHR(VkInstance instance, const VkDisplaySurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +VkResult gen75_CreateSharedSwapchainsKHR(VkDevice device, uint32_t swapchainCount, const VkSwapchainCreateInfoKHR* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchains) __attribute__ ((weak)); +#ifdef VK_USE_PLATFORM_MIR_KHR +VkResult gen75_CreateMirSurfaceKHR(VkInstance instance, const VkMirSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_MIR_KHR +#ifdef VK_USE_PLATFORM_MIR_KHR +VkBool32 gen75_GetPhysicalDeviceMirPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, MirConnection* connection) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_MIR_KHR void gen75_DestroySurfaceKHR(VkInstance instance, VkSurfaceKHR surface, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); VkResult gen75_GetPhysicalDeviceSurfaceSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, VkSurfaceKHR surface, VkBool32* pSupported) __attribute__ ((weak)); VkResult gen75_GetPhysicalDeviceSurfaceCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, VkSurfaceCapabilitiesKHR* pSurfaceCapabilities) __attribute__ ((weak)); @@ -1213,49 +1444,73 @@ VkResult gen75_GetSwapchainImagesKHR(VkDevice device, VkSwapchainKHR swapchain, uint32_t* pSwapchainImageCount, VkImage* pSwapchainImages) __attribute__ ((weak)); VkResult gen75_AcquireNextImageKHR(VkDevice device, VkSwapchainKHR swapchain, uint64_t timeout, VkSemaphore semaphore, VkFence fence, uint32_t* pImageIndex) __attribute__ ((weak)); VkResult gen75_QueuePresentKHR(VkQueue queue, const VkPresentInfoKHR* pPresentInfo) __attribute__ ((weak)); -VkResult gen75_GetPhysicalDeviceDisplayPropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPropertiesKHR* pProperties) __attribute__ ((weak)); -VkResult gen75_GetPhysicalDeviceDisplayPlanePropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPlanePropertiesKHR* pProperties) __attribute__ ((weak)); -VkResult gen75_GetDisplayPlaneSupportedDisplaysKHR(VkPhysicalDevice physicalDevice, uint32_t planeIndex, uint32_t* pDisplayCount, VkDisplayKHR* pDisplays) __attribute__ ((weak)); -VkResult gen75_GetDisplayModePropertiesKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, uint32_t* pPropertyCount, VkDisplayModePropertiesKHR* pProperties) __attribute__ ((weak)); -VkResult gen75_CreateDisplayModeKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, const VkDisplayModeCreateInfoKHR*pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDisplayModeKHR* pMode) __attribute__ ((weak)); -VkResult gen75_GetDisplayPlaneCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkDisplayModeKHR mode, uint32_t planeIndex, VkDisplayPlaneCapabilitiesKHR* pCapabilities) __attribute__ ((weak)); -VkResult gen75_CreateDisplayPlaneSurfaceKHR(VkInstance instance, const VkDisplaySurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); -VkResult gen75_CreateSharedSwapchainsKHR(VkDevice device, uint32_t swapchainCount, const VkSwapchainCreateInfoKHR* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchains) __attribute__ ((weak)); -#ifdef VK_USE_PLATFORM_XCB_KHR -VkResult gen75_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); -#endif // VK_USE_PLATFORM_XCB_KHR -#ifdef VK_USE_PLATFORM_XCB_KHR -VkBool32 gen75_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id) __attribute__ ((weak)); -#endif // VK_USE_PLATFORM_XCB_KHR #ifdef VK_USE_PLATFORM_WAYLAND_KHR VkResult gen75_CreateWaylandSurfaceKHR(VkInstance instance, const VkWaylandSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); #endif // VK_USE_PLATFORM_WAYLAND_KHR #ifdef VK_USE_PLATFORM_WAYLAND_KHR VkBool32 gen75_GetPhysicalDeviceWaylandPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, struct wl_display* display) __attribute__ ((weak)); #endif // VK_USE_PLATFORM_WAYLAND_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR +VkResult gen75_CreateWin32SurfaceKHR(VkInstance instance, const VkWin32SurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR +VkBool32 gen75_GetPhysicalDeviceWin32PresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR +VkResult gen75_CreateXlibSurfaceKHR(VkInstance instance, const VkXlibSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR +VkBool32 gen75_GetPhysicalDeviceXlibPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, Display* dpy, VisualID visualID) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR +VkResult gen75_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_XCB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR +VkBool32 gen75_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_XCB_KHR VkResult gen75_CreateDebugReportCallbackEXT(VkInstance instance, const VkDebugReportCallbackCreateInfoEXT* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDebugReportCallbackEXT* pCallback) __attribute__ ((weak)); void gen75_DestroyDebugReportCallbackEXT(VkInstance instance, VkDebugReportCallbackEXT callback, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); void gen75_DebugReportMessageEXT(VkInstance instance, VkDebugReportFlagsEXT flags, VkDebugReportObjectTypeEXT objectType, uint64_t object, size_t location, int32_t messageCode, const char* pLayerPrefix, const char* pMessage) __attribute__ ((weak)); -VkResult gen75_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMem, VkImage* pImage) __attribute__ ((weak)); +VkResult gen75_DebugMarkerSetObjectNameEXT(VkDevice device, VkDebugMarkerObjectNameInfoEXT* pNameInfo) __attribute__ ((weak)); +VkResult gen75_DebugMarkerSetObjectTagEXT(VkDevice device, VkDebugMarkerObjectTagInfoEXT* pTagInfo) __attribute__ ((weak)); +void gen75_CmdDebugMarkerBeginEXT(VkCommandBuffer commandBuffer, VkDebugMarkerMarkerInfoEXT* pMarkerInfo) __attribute__ ((weak)); +void gen75_CmdDebugMarkerEndEXT(VkCommandBuffer commandBuffer) __attribute__ ((weak)); +void gen75_CmdDebugMarkerInsertEXT(VkCommandBuffer commandBuffer, VkDebugMarkerMarkerInfoEXT* pMarkerInfo) __attribute__ ((weak)); +VkResult gen75_GetPhysicalDeviceExternalImageFormatPropertiesNV(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkExternalMemoryHandleTypeFlagsNV externalHandleType, VkExternalImageFormatPropertiesNV* pExternalImageFormatProperties) __attribute__ ((weak)); +#ifdef VK_USE_PLATFORM_WIN32_KHR +VkResult gen75_GetMemoryWin32HandleNV(VkDevice device, VkDeviceMemory memory, VkExternalMemoryHandleTypeFlagsNV handleType, HANDLE* pHandle) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_WIN32_KHR +void gen75_CmdDrawIndirectCountAMD(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkBuffer countBuffer, VkDeviceSize countBufferOffset, uint32_t maxDrawCount, uint32_t stride) __attribute__ ((weak)); +void gen75_CmdDrawIndexedIndirectCountAMD(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkBuffer countBuffer, VkDeviceSize countBufferOffset, uint32_t maxDrawCount, uint32_t stride) __attribute__ ((weak)); +void gen75_CmdProcessCommandsNVX(VkCommandBuffer commandBuffer, const VkCmdProcessCommandsInfoNVX* pProcessCommandsInfo) __attribute__ ((weak)); +void gen75_CmdReserveSpaceForCommandsNVX(VkCommandBuffer commandBuffer, const VkCmdReserveSpaceForCommandsInfoNVX* pReserveSpaceInfo) __attribute__ ((weak)); +VkResult gen75_CreateIndirectCommandsLayoutNVX(VkDevice device, const VkIndirectCommandsLayoutCreateInfoNVX* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkIndirectCommandsLayoutNVX* pIndirectCommandsLayout) __attribute__ ((weak)); +void gen75_DestroyIndirectCommandsLayoutNVX(VkDevice device, VkIndirectCommandsLayoutNVX indirectCommandsLayout, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult gen75_CreateObjectTableNVX(VkDevice device, const VkObjectTableCreateInfoNVX* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkObjectTableNVX* pObjectTable) __attribute__ ((weak)); +void gen75_DestroyObjectTableNVX(VkDevice device, VkObjectTableNVX objectTable, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult gen75_RegisterObjectsNVX(VkDevice device, VkObjectTableNVX objectTable, uint32_t objectCount, const VkObjectTableEntryNVX* const* ppObjectTableEntries, const uint32_t* pObjectIndices) __attribute__ ((weak)); +VkResult gen75_UnregisterObjectsNVX(VkDevice device, VkObjectTableNVX objectTable, uint32_t objectCount, const VkObjectEntryTypeNVX* pObjectEntryTypes, const uint32_t* pObjectIndices) __attribute__ ((weak)); +void gen75_GetPhysicalDeviceGeneratedCommandsPropertiesNVX(VkPhysicalDevice physicalDevice, VkDeviceGeneratedCommandsFeaturesNVX* pFeatures, VkDeviceGeneratedCommandsLimitsNVX* pLimits) __attribute__ ((weak)); +VkResult gen75_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator,VkDeviceMemory* pMem,VkImage* pImage) __attribute__ ((weak)); const struct anv_dispatch_table gen75_layer = { .CreateInstance = gen75_CreateInstance, .DestroyInstance = gen75_DestroyInstance, .EnumeratePhysicalDevices = gen75_EnumeratePhysicalDevices, - .GetPhysicalDeviceFeatures = gen75_GetPhysicalDeviceFeatures, - .GetPhysicalDeviceFormatProperties = gen75_GetPhysicalDeviceFormatProperties, - .GetPhysicalDeviceImageFormatProperties = gen75_GetPhysicalDeviceImageFormatProperties, + .GetDeviceProcAddr = gen75_GetDeviceProcAddr, + .GetInstanceProcAddr = gen75_GetInstanceProcAddr, .GetPhysicalDeviceProperties = gen75_GetPhysicalDeviceProperties, .GetPhysicalDeviceQueueFamilyProperties = gen75_GetPhysicalDeviceQueueFamilyProperties, .GetPhysicalDeviceMemoryProperties = gen75_GetPhysicalDeviceMemoryProperties, - .GetInstanceProcAddr = gen75_GetInstanceProcAddr, - .GetDeviceProcAddr = gen75_GetDeviceProcAddr, + .GetPhysicalDeviceFeatures = gen75_GetPhysicalDeviceFeatures, + .GetPhysicalDeviceFormatProperties = gen75_GetPhysicalDeviceFormatProperties, + .GetPhysicalDeviceImageFormatProperties = gen75_GetPhysicalDeviceImageFormatProperties, .CreateDevice = gen75_CreateDevice, .DestroyDevice = gen75_DestroyDevice, - .EnumerateInstanceExtensionProperties = gen75_EnumerateInstanceExtensionProperties, - .EnumerateDeviceExtensionProperties = gen75_EnumerateDeviceExtensionProperties, .EnumerateInstanceLayerProperties = gen75_EnumerateInstanceLayerProperties, + .EnumerateInstanceExtensionProperties = gen75_EnumerateInstanceExtensionProperties, .EnumerateDeviceLayerProperties = gen75_EnumerateDeviceLayerProperties, + .EnumerateDeviceExtensionProperties = gen75_EnumerateDeviceExtensionProperties, .GetDeviceQueue = gen75_GetDeviceQueue, .QueueSubmit = gen75_QueueSubmit, .QueueWaitIdle = gen75_QueueWaitIdle, @@ -1267,10 +1522,10 @@ .FlushMappedMemoryRanges = gen75_FlushMappedMemoryRanges, .InvalidateMappedMemoryRanges = gen75_InvalidateMappedMemoryRanges, .GetDeviceMemoryCommitment = gen75_GetDeviceMemoryCommitment, - .BindBufferMemory = gen75_BindBufferMemory, - .BindImageMemory = gen75_BindImageMemory, .GetBufferMemoryRequirements = gen75_GetBufferMemoryRequirements, + .BindBufferMemory = gen75_BindBufferMemory, .GetImageMemoryRequirements = gen75_GetImageMemoryRequirements, + .BindImageMemory = gen75_BindImageMemory, .GetImageSparseMemoryRequirements = gen75_GetImageSparseMemoryRequirements, .GetPhysicalDeviceSparseImageFormatProperties = gen75_GetPhysicalDeviceSparseImageFormatProperties, .QueueBindSparse = gen75_QueueBindSparse, @@ -1376,6 +1631,23 @@ .CmdNextSubpass = gen75_CmdNextSubpass, .CmdEndRenderPass = gen75_CmdEndRenderPass, .CmdExecuteCommands = gen75_CmdExecuteCommands, +#ifdef VK_USE_PLATFORM_ANDROID_KHR + .CreateAndroidSurfaceKHR = gen75_CreateAndroidSurfaceKHR, +#endif // VK_USE_PLATFORM_ANDROID_KHR + .GetPhysicalDeviceDisplayPropertiesKHR = gen75_GetPhysicalDeviceDisplayPropertiesKHR, + .GetPhysicalDeviceDisplayPlanePropertiesKHR = gen75_GetPhysicalDeviceDisplayPlanePropertiesKHR, + .GetDisplayPlaneSupportedDisplaysKHR = gen75_GetDisplayPlaneSupportedDisplaysKHR, + .GetDisplayModePropertiesKHR = gen75_GetDisplayModePropertiesKHR, + .CreateDisplayModeKHR = gen75_CreateDisplayModeKHR, + .GetDisplayPlaneCapabilitiesKHR = gen75_GetDisplayPlaneCapabilitiesKHR, + .CreateDisplayPlaneSurfaceKHR = gen75_CreateDisplayPlaneSurfaceKHR, + .CreateSharedSwapchainsKHR = gen75_CreateSharedSwapchainsKHR, +#ifdef VK_USE_PLATFORM_MIR_KHR + .CreateMirSurfaceKHR = gen75_CreateMirSurfaceKHR, +#endif // VK_USE_PLATFORM_MIR_KHR +#ifdef VK_USE_PLATFORM_MIR_KHR + .GetPhysicalDeviceMirPresentationSupportKHR = gen75_GetPhysicalDeviceMirPresentationSupportKHR, +#endif // VK_USE_PLATFORM_MIR_KHR .DestroySurfaceKHR = gen75_DestroySurfaceKHR, .GetPhysicalDeviceSurfaceSupportKHR = gen75_GetPhysicalDeviceSurfaceSupportKHR, .GetPhysicalDeviceSurfaceCapabilitiesKHR = gen75_GetPhysicalDeviceSurfaceCapabilitiesKHR, @@ -1386,49 +1658,73 @@ .GetSwapchainImagesKHR = gen75_GetSwapchainImagesKHR, .AcquireNextImageKHR = gen75_AcquireNextImageKHR, .QueuePresentKHR = gen75_QueuePresentKHR, - .GetPhysicalDeviceDisplayPropertiesKHR = gen75_GetPhysicalDeviceDisplayPropertiesKHR, - .GetPhysicalDeviceDisplayPlanePropertiesKHR = gen75_GetPhysicalDeviceDisplayPlanePropertiesKHR, - .GetDisplayPlaneSupportedDisplaysKHR = gen75_GetDisplayPlaneSupportedDisplaysKHR, - .GetDisplayModePropertiesKHR = gen75_GetDisplayModePropertiesKHR, - .CreateDisplayModeKHR = gen75_CreateDisplayModeKHR, - .GetDisplayPlaneCapabilitiesKHR = gen75_GetDisplayPlaneCapabilitiesKHR, - .CreateDisplayPlaneSurfaceKHR = gen75_CreateDisplayPlaneSurfaceKHR, - .CreateSharedSwapchainsKHR = gen75_CreateSharedSwapchainsKHR, -#ifdef VK_USE_PLATFORM_XCB_KHR - .CreateXcbSurfaceKHR = gen75_CreateXcbSurfaceKHR, -#endif // VK_USE_PLATFORM_XCB_KHR -#ifdef VK_USE_PLATFORM_XCB_KHR - .GetPhysicalDeviceXcbPresentationSupportKHR = gen75_GetPhysicalDeviceXcbPresentationSupportKHR, -#endif // VK_USE_PLATFORM_XCB_KHR #ifdef VK_USE_PLATFORM_WAYLAND_KHR .CreateWaylandSurfaceKHR = gen75_CreateWaylandSurfaceKHR, #endif // VK_USE_PLATFORM_WAYLAND_KHR #ifdef VK_USE_PLATFORM_WAYLAND_KHR .GetPhysicalDeviceWaylandPresentationSupportKHR = gen75_GetPhysicalDeviceWaylandPresentationSupportKHR, #endif // VK_USE_PLATFORM_WAYLAND_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR + .CreateWin32SurfaceKHR = gen75_CreateWin32SurfaceKHR, +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR + .GetPhysicalDeviceWin32PresentationSupportKHR = gen75_GetPhysicalDeviceWin32PresentationSupportKHR, +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR + .CreateXlibSurfaceKHR = gen75_CreateXlibSurfaceKHR, +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR + .GetPhysicalDeviceXlibPresentationSupportKHR = gen75_GetPhysicalDeviceXlibPresentationSupportKHR, +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR + .CreateXcbSurfaceKHR = gen75_CreateXcbSurfaceKHR, +#endif // VK_USE_PLATFORM_XCB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR + .GetPhysicalDeviceXcbPresentationSupportKHR = gen75_GetPhysicalDeviceXcbPresentationSupportKHR, +#endif // VK_USE_PLATFORM_XCB_KHR .CreateDebugReportCallbackEXT = gen75_CreateDebugReportCallbackEXT, .DestroyDebugReportCallbackEXT = gen75_DestroyDebugReportCallbackEXT, .DebugReportMessageEXT = gen75_DebugReportMessageEXT, + .DebugMarkerSetObjectNameEXT = gen75_DebugMarkerSetObjectNameEXT, + .DebugMarkerSetObjectTagEXT = gen75_DebugMarkerSetObjectTagEXT, + .CmdDebugMarkerBeginEXT = gen75_CmdDebugMarkerBeginEXT, + .CmdDebugMarkerEndEXT = gen75_CmdDebugMarkerEndEXT, + .CmdDebugMarkerInsertEXT = gen75_CmdDebugMarkerInsertEXT, + .GetPhysicalDeviceExternalImageFormatPropertiesNV = gen75_GetPhysicalDeviceExternalImageFormatPropertiesNV, +#ifdef VK_USE_PLATFORM_WIN32_KHR + .GetMemoryWin32HandleNV = gen75_GetMemoryWin32HandleNV, +#endif // VK_USE_PLATFORM_WIN32_KHR + .CmdDrawIndirectCountAMD = gen75_CmdDrawIndirectCountAMD, + .CmdDrawIndexedIndirectCountAMD = gen75_CmdDrawIndexedIndirectCountAMD, + .CmdProcessCommandsNVX = gen75_CmdProcessCommandsNVX, + .CmdReserveSpaceForCommandsNVX = gen75_CmdReserveSpaceForCommandsNVX, + .CreateIndirectCommandsLayoutNVX = gen75_CreateIndirectCommandsLayoutNVX, + .DestroyIndirectCommandsLayoutNVX = gen75_DestroyIndirectCommandsLayoutNVX, + .CreateObjectTableNVX = gen75_CreateObjectTableNVX, + .DestroyObjectTableNVX = gen75_DestroyObjectTableNVX, + .RegisterObjectsNVX = gen75_RegisterObjectsNVX, + .UnregisterObjectsNVX = gen75_UnregisterObjectsNVX, + .GetPhysicalDeviceGeneratedCommandsPropertiesNVX = gen75_GetPhysicalDeviceGeneratedCommandsPropertiesNVX, .CreateDmaBufImageINTEL = gen75_CreateDmaBufImageINTEL, }; VkResult gen8_CreateInstance(const VkInstanceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkInstance* pInstance) __attribute__ ((weak)); void gen8_DestroyInstance(VkInstance instance, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); VkResult gen8_EnumeratePhysicalDevices(VkInstance instance, uint32_t* pPhysicalDeviceCount, VkPhysicalDevice* pPhysicalDevices) __attribute__ ((weak)); -void gen8_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures) __attribute__ ((weak)); -void gen8_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties) __attribute__ ((weak)); -VkResult gen8_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties) __attribute__ ((weak)); +PFN_vkVoidFunction gen8_GetDeviceProcAddr(VkDevice device, const char* pName) __attribute__ ((weak)); +PFN_vkVoidFunction gen8_GetInstanceProcAddr(VkInstance instance, const char* pName) __attribute__ ((weak)); void gen8_GetPhysicalDeviceProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties* pProperties) __attribute__ ((weak)); void gen8_GetPhysicalDeviceQueueFamilyProperties(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties* pQueueFamilyProperties) __attribute__ ((weak)); void gen8_GetPhysicalDeviceMemoryProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties* pMemoryProperties) __attribute__ ((weak)); -PFN_vkVoidFunction gen8_GetInstanceProcAddr(VkInstance instance, const char* pName) __attribute__ ((weak)); -PFN_vkVoidFunction gen8_GetDeviceProcAddr(VkDevice device, const char* pName) __attribute__ ((weak)); +void gen8_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures) __attribute__ ((weak)); +void gen8_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties) __attribute__ ((weak)); +VkResult gen8_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties) __attribute__ ((weak)); VkResult gen8_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDevice* pDevice) __attribute__ ((weak)); void gen8_DestroyDevice(VkDevice device, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); -VkResult gen8_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak)); -VkResult gen8_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak)); VkResult gen8_EnumerateInstanceLayerProperties(uint32_t* pPropertyCount, VkLayerProperties* pProperties) __attribute__ ((weak)); +VkResult gen8_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak)); VkResult gen8_EnumerateDeviceLayerProperties(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkLayerProperties* pProperties) __attribute__ ((weak)); +VkResult gen8_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak)); void gen8_GetDeviceQueue(VkDevice device, uint32_t queueFamilyIndex, uint32_t queueIndex, VkQueue* pQueue) __attribute__ ((weak)); VkResult gen8_QueueSubmit(VkQueue queue, uint32_t submitCount, const VkSubmitInfo* pSubmits, VkFence fence) __attribute__ ((weak)); VkResult gen8_QueueWaitIdle(VkQueue queue) __attribute__ ((weak)); @@ -1440,10 +1736,10 @@ VkResult gen8_FlushMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges) __attribute__ ((weak)); VkResult gen8_InvalidateMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges) __attribute__ ((weak)); void gen8_GetDeviceMemoryCommitment(VkDevice device, VkDeviceMemory memory, VkDeviceSize* pCommittedMemoryInBytes) __attribute__ ((weak)); -VkResult gen8_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak)); -VkResult gen8_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak)); void gen8_GetBufferMemoryRequirements(VkDevice device, VkBuffer buffer, VkMemoryRequirements* pMemoryRequirements) __attribute__ ((weak)); +VkResult gen8_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak)); void gen8_GetImageMemoryRequirements(VkDevice device, VkImage image, VkMemoryRequirements* pMemoryRequirements) __attribute__ ((weak)); +VkResult gen8_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak)); void gen8_GetImageSparseMemoryRequirements(VkDevice device, VkImage image, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements* pSparseMemoryRequirements) __attribute__ ((weak)); void gen8_GetPhysicalDeviceSparseImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkSampleCountFlagBits samples, VkImageUsageFlags usage, VkImageTiling tiling, uint32_t* pPropertyCount, VkSparseImageFormatProperties* pProperties) __attribute__ ((weak)); VkResult gen8_QueueBindSparse(VkQueue queue, uint32_t bindInfoCount, const VkBindSparseInfo* pBindInfo, VkFence fence) __attribute__ ((weak)); @@ -1529,7 +1825,7 @@ void gen8_CmdBlitImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageBlit* pRegions, VkFilter filter) __attribute__ ((weak)); void gen8_CmdCopyBufferToImage(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkBufferImageCopy* pRegions) __attribute__ ((weak)); void gen8_CmdCopyImageToBuffer(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferImageCopy* pRegions) __attribute__ ((weak)); -void gen8_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const uint32_t* pData) __attribute__ ((weak)); +void gen8_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const void* pData) __attribute__ ((weak)); void gen8_CmdFillBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize size, uint32_t data) __attribute__ ((weak)); void gen8_CmdClearColorImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearColorValue* pColor, uint32_t rangeCount, const VkImageSubresourceRange* pRanges) __attribute__ ((weak)); void gen8_CmdClearDepthStencilImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearDepthStencilValue* pDepthStencil, uint32_t rangeCount, const VkImageSubresourceRange* pRanges) __attribute__ ((weak)); @@ -1549,6 +1845,23 @@ void gen8_CmdNextSubpass(VkCommandBuffer commandBuffer, VkSubpassContents contents) __attribute__ ((weak)); void gen8_CmdEndRenderPass(VkCommandBuffer commandBuffer) __attribute__ ((weak)); void gen8_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers) __attribute__ ((weak)); +#ifdef VK_USE_PLATFORM_ANDROID_KHR +VkResult gen8_CreateAndroidSurfaceKHR(VkInstance instance, const VkAndroidSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_ANDROID_KHR +VkResult gen8_GetPhysicalDeviceDisplayPropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPropertiesKHR* pProperties) __attribute__ ((weak)); +VkResult gen8_GetPhysicalDeviceDisplayPlanePropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPlanePropertiesKHR* pProperties) __attribute__ ((weak)); +VkResult gen8_GetDisplayPlaneSupportedDisplaysKHR(VkPhysicalDevice physicalDevice, uint32_t planeIndex, uint32_t* pDisplayCount, VkDisplayKHR* pDisplays) __attribute__ ((weak)); +VkResult gen8_GetDisplayModePropertiesKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, uint32_t* pPropertyCount, VkDisplayModePropertiesKHR* pProperties) __attribute__ ((weak)); +VkResult gen8_CreateDisplayModeKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, const VkDisplayModeCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDisplayModeKHR* pMode) __attribute__ ((weak)); +VkResult gen8_GetDisplayPlaneCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkDisplayModeKHR mode, uint32_t planeIndex, VkDisplayPlaneCapabilitiesKHR* pCapabilities) __attribute__ ((weak)); +VkResult gen8_CreateDisplayPlaneSurfaceKHR(VkInstance instance, const VkDisplaySurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +VkResult gen8_CreateSharedSwapchainsKHR(VkDevice device, uint32_t swapchainCount, const VkSwapchainCreateInfoKHR* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchains) __attribute__ ((weak)); +#ifdef VK_USE_PLATFORM_MIR_KHR +VkResult gen8_CreateMirSurfaceKHR(VkInstance instance, const VkMirSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_MIR_KHR +#ifdef VK_USE_PLATFORM_MIR_KHR +VkBool32 gen8_GetPhysicalDeviceMirPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, MirConnection* connection) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_MIR_KHR void gen8_DestroySurfaceKHR(VkInstance instance, VkSurfaceKHR surface, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); VkResult gen8_GetPhysicalDeviceSurfaceSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, VkSurfaceKHR surface, VkBool32* pSupported) __attribute__ ((weak)); VkResult gen8_GetPhysicalDeviceSurfaceCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, VkSurfaceCapabilitiesKHR* pSurfaceCapabilities) __attribute__ ((weak)); @@ -1559,49 +1872,73 @@ VkResult gen8_GetSwapchainImagesKHR(VkDevice device, VkSwapchainKHR swapchain, uint32_t* pSwapchainImageCount, VkImage* pSwapchainImages) __attribute__ ((weak)); VkResult gen8_AcquireNextImageKHR(VkDevice device, VkSwapchainKHR swapchain, uint64_t timeout, VkSemaphore semaphore, VkFence fence, uint32_t* pImageIndex) __attribute__ ((weak)); VkResult gen8_QueuePresentKHR(VkQueue queue, const VkPresentInfoKHR* pPresentInfo) __attribute__ ((weak)); -VkResult gen8_GetPhysicalDeviceDisplayPropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPropertiesKHR* pProperties) __attribute__ ((weak)); -VkResult gen8_GetPhysicalDeviceDisplayPlanePropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPlanePropertiesKHR* pProperties) __attribute__ ((weak)); -VkResult gen8_GetDisplayPlaneSupportedDisplaysKHR(VkPhysicalDevice physicalDevice, uint32_t planeIndex, uint32_t* pDisplayCount, VkDisplayKHR* pDisplays) __attribute__ ((weak)); -VkResult gen8_GetDisplayModePropertiesKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, uint32_t* pPropertyCount, VkDisplayModePropertiesKHR* pProperties) __attribute__ ((weak)); -VkResult gen8_CreateDisplayModeKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, const VkDisplayModeCreateInfoKHR*pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDisplayModeKHR* pMode) __attribute__ ((weak)); -VkResult gen8_GetDisplayPlaneCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkDisplayModeKHR mode, uint32_t planeIndex, VkDisplayPlaneCapabilitiesKHR* pCapabilities) __attribute__ ((weak)); -VkResult gen8_CreateDisplayPlaneSurfaceKHR(VkInstance instance, const VkDisplaySurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); -VkResult gen8_CreateSharedSwapchainsKHR(VkDevice device, uint32_t swapchainCount, const VkSwapchainCreateInfoKHR* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchains) __attribute__ ((weak)); -#ifdef VK_USE_PLATFORM_XCB_KHR -VkResult gen8_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); -#endif // VK_USE_PLATFORM_XCB_KHR -#ifdef VK_USE_PLATFORM_XCB_KHR -VkBool32 gen8_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id) __attribute__ ((weak)); -#endif // VK_USE_PLATFORM_XCB_KHR #ifdef VK_USE_PLATFORM_WAYLAND_KHR VkResult gen8_CreateWaylandSurfaceKHR(VkInstance instance, const VkWaylandSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); #endif // VK_USE_PLATFORM_WAYLAND_KHR #ifdef VK_USE_PLATFORM_WAYLAND_KHR VkBool32 gen8_GetPhysicalDeviceWaylandPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, struct wl_display* display) __attribute__ ((weak)); #endif // VK_USE_PLATFORM_WAYLAND_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR +VkResult gen8_CreateWin32SurfaceKHR(VkInstance instance, const VkWin32SurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR +VkBool32 gen8_GetPhysicalDeviceWin32PresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR +VkResult gen8_CreateXlibSurfaceKHR(VkInstance instance, const VkXlibSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR +VkBool32 gen8_GetPhysicalDeviceXlibPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, Display* dpy, VisualID visualID) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR +VkResult gen8_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_XCB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR +VkBool32 gen8_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_XCB_KHR VkResult gen8_CreateDebugReportCallbackEXT(VkInstance instance, const VkDebugReportCallbackCreateInfoEXT* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDebugReportCallbackEXT* pCallback) __attribute__ ((weak)); void gen8_DestroyDebugReportCallbackEXT(VkInstance instance, VkDebugReportCallbackEXT callback, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); void gen8_DebugReportMessageEXT(VkInstance instance, VkDebugReportFlagsEXT flags, VkDebugReportObjectTypeEXT objectType, uint64_t object, size_t location, int32_t messageCode, const char* pLayerPrefix, const char* pMessage) __attribute__ ((weak)); -VkResult gen8_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMem, VkImage* pImage) __attribute__ ((weak)); +VkResult gen8_DebugMarkerSetObjectNameEXT(VkDevice device, VkDebugMarkerObjectNameInfoEXT* pNameInfo) __attribute__ ((weak)); +VkResult gen8_DebugMarkerSetObjectTagEXT(VkDevice device, VkDebugMarkerObjectTagInfoEXT* pTagInfo) __attribute__ ((weak)); +void gen8_CmdDebugMarkerBeginEXT(VkCommandBuffer commandBuffer, VkDebugMarkerMarkerInfoEXT* pMarkerInfo) __attribute__ ((weak)); +void gen8_CmdDebugMarkerEndEXT(VkCommandBuffer commandBuffer) __attribute__ ((weak)); +void gen8_CmdDebugMarkerInsertEXT(VkCommandBuffer commandBuffer, VkDebugMarkerMarkerInfoEXT* pMarkerInfo) __attribute__ ((weak)); +VkResult gen8_GetPhysicalDeviceExternalImageFormatPropertiesNV(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkExternalMemoryHandleTypeFlagsNV externalHandleType, VkExternalImageFormatPropertiesNV* pExternalImageFormatProperties) __attribute__ ((weak)); +#ifdef VK_USE_PLATFORM_WIN32_KHR +VkResult gen8_GetMemoryWin32HandleNV(VkDevice device, VkDeviceMemory memory, VkExternalMemoryHandleTypeFlagsNV handleType, HANDLE* pHandle) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_WIN32_KHR +void gen8_CmdDrawIndirectCountAMD(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkBuffer countBuffer, VkDeviceSize countBufferOffset, uint32_t maxDrawCount, uint32_t stride) __attribute__ ((weak)); +void gen8_CmdDrawIndexedIndirectCountAMD(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkBuffer countBuffer, VkDeviceSize countBufferOffset, uint32_t maxDrawCount, uint32_t stride) __attribute__ ((weak)); +void gen8_CmdProcessCommandsNVX(VkCommandBuffer commandBuffer, const VkCmdProcessCommandsInfoNVX* pProcessCommandsInfo) __attribute__ ((weak)); +void gen8_CmdReserveSpaceForCommandsNVX(VkCommandBuffer commandBuffer, const VkCmdReserveSpaceForCommandsInfoNVX* pReserveSpaceInfo) __attribute__ ((weak)); +VkResult gen8_CreateIndirectCommandsLayoutNVX(VkDevice device, const VkIndirectCommandsLayoutCreateInfoNVX* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkIndirectCommandsLayoutNVX* pIndirectCommandsLayout) __attribute__ ((weak)); +void gen8_DestroyIndirectCommandsLayoutNVX(VkDevice device, VkIndirectCommandsLayoutNVX indirectCommandsLayout, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult gen8_CreateObjectTableNVX(VkDevice device, const VkObjectTableCreateInfoNVX* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkObjectTableNVX* pObjectTable) __attribute__ ((weak)); +void gen8_DestroyObjectTableNVX(VkDevice device, VkObjectTableNVX objectTable, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult gen8_RegisterObjectsNVX(VkDevice device, VkObjectTableNVX objectTable, uint32_t objectCount, const VkObjectTableEntryNVX* const* ppObjectTableEntries, const uint32_t* pObjectIndices) __attribute__ ((weak)); +VkResult gen8_UnregisterObjectsNVX(VkDevice device, VkObjectTableNVX objectTable, uint32_t objectCount, const VkObjectEntryTypeNVX* pObjectEntryTypes, const uint32_t* pObjectIndices) __attribute__ ((weak)); +void gen8_GetPhysicalDeviceGeneratedCommandsPropertiesNVX(VkPhysicalDevice physicalDevice, VkDeviceGeneratedCommandsFeaturesNVX* pFeatures, VkDeviceGeneratedCommandsLimitsNVX* pLimits) __attribute__ ((weak)); +VkResult gen8_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator,VkDeviceMemory* pMem,VkImage* pImage) __attribute__ ((weak)); const struct anv_dispatch_table gen8_layer = { .CreateInstance = gen8_CreateInstance, .DestroyInstance = gen8_DestroyInstance, .EnumeratePhysicalDevices = gen8_EnumeratePhysicalDevices, - .GetPhysicalDeviceFeatures = gen8_GetPhysicalDeviceFeatures, - .GetPhysicalDeviceFormatProperties = gen8_GetPhysicalDeviceFormatProperties, - .GetPhysicalDeviceImageFormatProperties = gen8_GetPhysicalDeviceImageFormatProperties, + .GetDeviceProcAddr = gen8_GetDeviceProcAddr, + .GetInstanceProcAddr = gen8_GetInstanceProcAddr, .GetPhysicalDeviceProperties = gen8_GetPhysicalDeviceProperties, .GetPhysicalDeviceQueueFamilyProperties = gen8_GetPhysicalDeviceQueueFamilyProperties, .GetPhysicalDeviceMemoryProperties = gen8_GetPhysicalDeviceMemoryProperties, - .GetInstanceProcAddr = gen8_GetInstanceProcAddr, - .GetDeviceProcAddr = gen8_GetDeviceProcAddr, + .GetPhysicalDeviceFeatures = gen8_GetPhysicalDeviceFeatures, + .GetPhysicalDeviceFormatProperties = gen8_GetPhysicalDeviceFormatProperties, + .GetPhysicalDeviceImageFormatProperties = gen8_GetPhysicalDeviceImageFormatProperties, .CreateDevice = gen8_CreateDevice, .DestroyDevice = gen8_DestroyDevice, - .EnumerateInstanceExtensionProperties = gen8_EnumerateInstanceExtensionProperties, - .EnumerateDeviceExtensionProperties = gen8_EnumerateDeviceExtensionProperties, .EnumerateInstanceLayerProperties = gen8_EnumerateInstanceLayerProperties, + .EnumerateInstanceExtensionProperties = gen8_EnumerateInstanceExtensionProperties, .EnumerateDeviceLayerProperties = gen8_EnumerateDeviceLayerProperties, + .EnumerateDeviceExtensionProperties = gen8_EnumerateDeviceExtensionProperties, .GetDeviceQueue = gen8_GetDeviceQueue, .QueueSubmit = gen8_QueueSubmit, .QueueWaitIdle = gen8_QueueWaitIdle, @@ -1613,10 +1950,10 @@ .FlushMappedMemoryRanges = gen8_FlushMappedMemoryRanges, .InvalidateMappedMemoryRanges = gen8_InvalidateMappedMemoryRanges, .GetDeviceMemoryCommitment = gen8_GetDeviceMemoryCommitment, - .BindBufferMemory = gen8_BindBufferMemory, - .BindImageMemory = gen8_BindImageMemory, .GetBufferMemoryRequirements = gen8_GetBufferMemoryRequirements, + .BindBufferMemory = gen8_BindBufferMemory, .GetImageMemoryRequirements = gen8_GetImageMemoryRequirements, + .BindImageMemory = gen8_BindImageMemory, .GetImageSparseMemoryRequirements = gen8_GetImageSparseMemoryRequirements, .GetPhysicalDeviceSparseImageFormatProperties = gen8_GetPhysicalDeviceSparseImageFormatProperties, .QueueBindSparse = gen8_QueueBindSparse, @@ -1722,6 +2059,23 @@ .CmdNextSubpass = gen8_CmdNextSubpass, .CmdEndRenderPass = gen8_CmdEndRenderPass, .CmdExecuteCommands = gen8_CmdExecuteCommands, +#ifdef VK_USE_PLATFORM_ANDROID_KHR + .CreateAndroidSurfaceKHR = gen8_CreateAndroidSurfaceKHR, +#endif // VK_USE_PLATFORM_ANDROID_KHR + .GetPhysicalDeviceDisplayPropertiesKHR = gen8_GetPhysicalDeviceDisplayPropertiesKHR, + .GetPhysicalDeviceDisplayPlanePropertiesKHR = gen8_GetPhysicalDeviceDisplayPlanePropertiesKHR, + .GetDisplayPlaneSupportedDisplaysKHR = gen8_GetDisplayPlaneSupportedDisplaysKHR, + .GetDisplayModePropertiesKHR = gen8_GetDisplayModePropertiesKHR, + .CreateDisplayModeKHR = gen8_CreateDisplayModeKHR, + .GetDisplayPlaneCapabilitiesKHR = gen8_GetDisplayPlaneCapabilitiesKHR, + .CreateDisplayPlaneSurfaceKHR = gen8_CreateDisplayPlaneSurfaceKHR, + .CreateSharedSwapchainsKHR = gen8_CreateSharedSwapchainsKHR, +#ifdef VK_USE_PLATFORM_MIR_KHR + .CreateMirSurfaceKHR = gen8_CreateMirSurfaceKHR, +#endif // VK_USE_PLATFORM_MIR_KHR +#ifdef VK_USE_PLATFORM_MIR_KHR + .GetPhysicalDeviceMirPresentationSupportKHR = gen8_GetPhysicalDeviceMirPresentationSupportKHR, +#endif // VK_USE_PLATFORM_MIR_KHR .DestroySurfaceKHR = gen8_DestroySurfaceKHR, .GetPhysicalDeviceSurfaceSupportKHR = gen8_GetPhysicalDeviceSurfaceSupportKHR, .GetPhysicalDeviceSurfaceCapabilitiesKHR = gen8_GetPhysicalDeviceSurfaceCapabilitiesKHR, @@ -1732,49 +2086,73 @@ .GetSwapchainImagesKHR = gen8_GetSwapchainImagesKHR, .AcquireNextImageKHR = gen8_AcquireNextImageKHR, .QueuePresentKHR = gen8_QueuePresentKHR, - .GetPhysicalDeviceDisplayPropertiesKHR = gen8_GetPhysicalDeviceDisplayPropertiesKHR, - .GetPhysicalDeviceDisplayPlanePropertiesKHR = gen8_GetPhysicalDeviceDisplayPlanePropertiesKHR, - .GetDisplayPlaneSupportedDisplaysKHR = gen8_GetDisplayPlaneSupportedDisplaysKHR, - .GetDisplayModePropertiesKHR = gen8_GetDisplayModePropertiesKHR, - .CreateDisplayModeKHR = gen8_CreateDisplayModeKHR, - .GetDisplayPlaneCapabilitiesKHR = gen8_GetDisplayPlaneCapabilitiesKHR, - .CreateDisplayPlaneSurfaceKHR = gen8_CreateDisplayPlaneSurfaceKHR, - .CreateSharedSwapchainsKHR = gen8_CreateSharedSwapchainsKHR, -#ifdef VK_USE_PLATFORM_XCB_KHR - .CreateXcbSurfaceKHR = gen8_CreateXcbSurfaceKHR, -#endif // VK_USE_PLATFORM_XCB_KHR -#ifdef VK_USE_PLATFORM_XCB_KHR - .GetPhysicalDeviceXcbPresentationSupportKHR = gen8_GetPhysicalDeviceXcbPresentationSupportKHR, -#endif // VK_USE_PLATFORM_XCB_KHR #ifdef VK_USE_PLATFORM_WAYLAND_KHR .CreateWaylandSurfaceKHR = gen8_CreateWaylandSurfaceKHR, #endif // VK_USE_PLATFORM_WAYLAND_KHR #ifdef VK_USE_PLATFORM_WAYLAND_KHR .GetPhysicalDeviceWaylandPresentationSupportKHR = gen8_GetPhysicalDeviceWaylandPresentationSupportKHR, #endif // VK_USE_PLATFORM_WAYLAND_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR + .CreateWin32SurfaceKHR = gen8_CreateWin32SurfaceKHR, +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR + .GetPhysicalDeviceWin32PresentationSupportKHR = gen8_GetPhysicalDeviceWin32PresentationSupportKHR, +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR + .CreateXlibSurfaceKHR = gen8_CreateXlibSurfaceKHR, +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR + .GetPhysicalDeviceXlibPresentationSupportKHR = gen8_GetPhysicalDeviceXlibPresentationSupportKHR, +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR + .CreateXcbSurfaceKHR = gen8_CreateXcbSurfaceKHR, +#endif // VK_USE_PLATFORM_XCB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR + .GetPhysicalDeviceXcbPresentationSupportKHR = gen8_GetPhysicalDeviceXcbPresentationSupportKHR, +#endif // VK_USE_PLATFORM_XCB_KHR .CreateDebugReportCallbackEXT = gen8_CreateDebugReportCallbackEXT, .DestroyDebugReportCallbackEXT = gen8_DestroyDebugReportCallbackEXT, .DebugReportMessageEXT = gen8_DebugReportMessageEXT, + .DebugMarkerSetObjectNameEXT = gen8_DebugMarkerSetObjectNameEXT, + .DebugMarkerSetObjectTagEXT = gen8_DebugMarkerSetObjectTagEXT, + .CmdDebugMarkerBeginEXT = gen8_CmdDebugMarkerBeginEXT, + .CmdDebugMarkerEndEXT = gen8_CmdDebugMarkerEndEXT, + .CmdDebugMarkerInsertEXT = gen8_CmdDebugMarkerInsertEXT, + .GetPhysicalDeviceExternalImageFormatPropertiesNV = gen8_GetPhysicalDeviceExternalImageFormatPropertiesNV, +#ifdef VK_USE_PLATFORM_WIN32_KHR + .GetMemoryWin32HandleNV = gen8_GetMemoryWin32HandleNV, +#endif // VK_USE_PLATFORM_WIN32_KHR + .CmdDrawIndirectCountAMD = gen8_CmdDrawIndirectCountAMD, + .CmdDrawIndexedIndirectCountAMD = gen8_CmdDrawIndexedIndirectCountAMD, + .CmdProcessCommandsNVX = gen8_CmdProcessCommandsNVX, + .CmdReserveSpaceForCommandsNVX = gen8_CmdReserveSpaceForCommandsNVX, + .CreateIndirectCommandsLayoutNVX = gen8_CreateIndirectCommandsLayoutNVX, + .DestroyIndirectCommandsLayoutNVX = gen8_DestroyIndirectCommandsLayoutNVX, + .CreateObjectTableNVX = gen8_CreateObjectTableNVX, + .DestroyObjectTableNVX = gen8_DestroyObjectTableNVX, + .RegisterObjectsNVX = gen8_RegisterObjectsNVX, + .UnregisterObjectsNVX = gen8_UnregisterObjectsNVX, + .GetPhysicalDeviceGeneratedCommandsPropertiesNVX = gen8_GetPhysicalDeviceGeneratedCommandsPropertiesNVX, .CreateDmaBufImageINTEL = gen8_CreateDmaBufImageINTEL, }; VkResult gen9_CreateInstance(const VkInstanceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkInstance* pInstance) __attribute__ ((weak)); void gen9_DestroyInstance(VkInstance instance, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); VkResult gen9_EnumeratePhysicalDevices(VkInstance instance, uint32_t* pPhysicalDeviceCount, VkPhysicalDevice* pPhysicalDevices) __attribute__ ((weak)); -void gen9_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures) __attribute__ ((weak)); -void gen9_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties) __attribute__ ((weak)); -VkResult gen9_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties) __attribute__ ((weak)); +PFN_vkVoidFunction gen9_GetDeviceProcAddr(VkDevice device, const char* pName) __attribute__ ((weak)); +PFN_vkVoidFunction gen9_GetInstanceProcAddr(VkInstance instance, const char* pName) __attribute__ ((weak)); void gen9_GetPhysicalDeviceProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties* pProperties) __attribute__ ((weak)); void gen9_GetPhysicalDeviceQueueFamilyProperties(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties* pQueueFamilyProperties) __attribute__ ((weak)); void gen9_GetPhysicalDeviceMemoryProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties* pMemoryProperties) __attribute__ ((weak)); -PFN_vkVoidFunction gen9_GetInstanceProcAddr(VkInstance instance, const char* pName) __attribute__ ((weak)); -PFN_vkVoidFunction gen9_GetDeviceProcAddr(VkDevice device, const char* pName) __attribute__ ((weak)); +void gen9_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures) __attribute__ ((weak)); +void gen9_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties) __attribute__ ((weak)); +VkResult gen9_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties) __attribute__ ((weak)); VkResult gen9_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDevice* pDevice) __attribute__ ((weak)); void gen9_DestroyDevice(VkDevice device, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); -VkResult gen9_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak)); -VkResult gen9_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak)); VkResult gen9_EnumerateInstanceLayerProperties(uint32_t* pPropertyCount, VkLayerProperties* pProperties) __attribute__ ((weak)); +VkResult gen9_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak)); VkResult gen9_EnumerateDeviceLayerProperties(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkLayerProperties* pProperties) __attribute__ ((weak)); +VkResult gen9_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak)); void gen9_GetDeviceQueue(VkDevice device, uint32_t queueFamilyIndex, uint32_t queueIndex, VkQueue* pQueue) __attribute__ ((weak)); VkResult gen9_QueueSubmit(VkQueue queue, uint32_t submitCount, const VkSubmitInfo* pSubmits, VkFence fence) __attribute__ ((weak)); VkResult gen9_QueueWaitIdle(VkQueue queue) __attribute__ ((weak)); @@ -1786,10 +2164,10 @@ VkResult gen9_FlushMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges) __attribute__ ((weak)); VkResult gen9_InvalidateMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges) __attribute__ ((weak)); void gen9_GetDeviceMemoryCommitment(VkDevice device, VkDeviceMemory memory, VkDeviceSize* pCommittedMemoryInBytes) __attribute__ ((weak)); -VkResult gen9_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak)); -VkResult gen9_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak)); void gen9_GetBufferMemoryRequirements(VkDevice device, VkBuffer buffer, VkMemoryRequirements* pMemoryRequirements) __attribute__ ((weak)); +VkResult gen9_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak)); void gen9_GetImageMemoryRequirements(VkDevice device, VkImage image, VkMemoryRequirements* pMemoryRequirements) __attribute__ ((weak)); +VkResult gen9_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak)); void gen9_GetImageSparseMemoryRequirements(VkDevice device, VkImage image, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements* pSparseMemoryRequirements) __attribute__ ((weak)); void gen9_GetPhysicalDeviceSparseImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkSampleCountFlagBits samples, VkImageUsageFlags usage, VkImageTiling tiling, uint32_t* pPropertyCount, VkSparseImageFormatProperties* pProperties) __attribute__ ((weak)); VkResult gen9_QueueBindSparse(VkQueue queue, uint32_t bindInfoCount, const VkBindSparseInfo* pBindInfo, VkFence fence) __attribute__ ((weak)); @@ -1875,7 +2253,7 @@ void gen9_CmdBlitImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageBlit* pRegions, VkFilter filter) __attribute__ ((weak)); void gen9_CmdCopyBufferToImage(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkBufferImageCopy* pRegions) __attribute__ ((weak)); void gen9_CmdCopyImageToBuffer(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferImageCopy* pRegions) __attribute__ ((weak)); -void gen9_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const uint32_t* pData) __attribute__ ((weak)); +void gen9_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const void* pData) __attribute__ ((weak)); void gen9_CmdFillBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize size, uint32_t data) __attribute__ ((weak)); void gen9_CmdClearColorImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearColorValue* pColor, uint32_t rangeCount, const VkImageSubresourceRange* pRanges) __attribute__ ((weak)); void gen9_CmdClearDepthStencilImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearDepthStencilValue* pDepthStencil, uint32_t rangeCount, const VkImageSubresourceRange* pRanges) __attribute__ ((weak)); @@ -1895,6 +2273,23 @@ void gen9_CmdNextSubpass(VkCommandBuffer commandBuffer, VkSubpassContents contents) __attribute__ ((weak)); void gen9_CmdEndRenderPass(VkCommandBuffer commandBuffer) __attribute__ ((weak)); void gen9_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers) __attribute__ ((weak)); +#ifdef VK_USE_PLATFORM_ANDROID_KHR +VkResult gen9_CreateAndroidSurfaceKHR(VkInstance instance, const VkAndroidSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_ANDROID_KHR +VkResult gen9_GetPhysicalDeviceDisplayPropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPropertiesKHR* pProperties) __attribute__ ((weak)); +VkResult gen9_GetPhysicalDeviceDisplayPlanePropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPlanePropertiesKHR* pProperties) __attribute__ ((weak)); +VkResult gen9_GetDisplayPlaneSupportedDisplaysKHR(VkPhysicalDevice physicalDevice, uint32_t planeIndex, uint32_t* pDisplayCount, VkDisplayKHR* pDisplays) __attribute__ ((weak)); +VkResult gen9_GetDisplayModePropertiesKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, uint32_t* pPropertyCount, VkDisplayModePropertiesKHR* pProperties) __attribute__ ((weak)); +VkResult gen9_CreateDisplayModeKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, const VkDisplayModeCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDisplayModeKHR* pMode) __attribute__ ((weak)); +VkResult gen9_GetDisplayPlaneCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkDisplayModeKHR mode, uint32_t planeIndex, VkDisplayPlaneCapabilitiesKHR* pCapabilities) __attribute__ ((weak)); +VkResult gen9_CreateDisplayPlaneSurfaceKHR(VkInstance instance, const VkDisplaySurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +VkResult gen9_CreateSharedSwapchainsKHR(VkDevice device, uint32_t swapchainCount, const VkSwapchainCreateInfoKHR* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchains) __attribute__ ((weak)); +#ifdef VK_USE_PLATFORM_MIR_KHR +VkResult gen9_CreateMirSurfaceKHR(VkInstance instance, const VkMirSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_MIR_KHR +#ifdef VK_USE_PLATFORM_MIR_KHR +VkBool32 gen9_GetPhysicalDeviceMirPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, MirConnection* connection) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_MIR_KHR void gen9_DestroySurfaceKHR(VkInstance instance, VkSurfaceKHR surface, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); VkResult gen9_GetPhysicalDeviceSurfaceSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, VkSurfaceKHR surface, VkBool32* pSupported) __attribute__ ((weak)); VkResult gen9_GetPhysicalDeviceSurfaceCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, VkSurfaceCapabilitiesKHR* pSurfaceCapabilities) __attribute__ ((weak)); @@ -1905,49 +2300,73 @@ VkResult gen9_GetSwapchainImagesKHR(VkDevice device, VkSwapchainKHR swapchain, uint32_t* pSwapchainImageCount, VkImage* pSwapchainImages) __attribute__ ((weak)); VkResult gen9_AcquireNextImageKHR(VkDevice device, VkSwapchainKHR swapchain, uint64_t timeout, VkSemaphore semaphore, VkFence fence, uint32_t* pImageIndex) __attribute__ ((weak)); VkResult gen9_QueuePresentKHR(VkQueue queue, const VkPresentInfoKHR* pPresentInfo) __attribute__ ((weak)); -VkResult gen9_GetPhysicalDeviceDisplayPropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPropertiesKHR* pProperties) __attribute__ ((weak)); -VkResult gen9_GetPhysicalDeviceDisplayPlanePropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPlanePropertiesKHR* pProperties) __attribute__ ((weak)); -VkResult gen9_GetDisplayPlaneSupportedDisplaysKHR(VkPhysicalDevice physicalDevice, uint32_t planeIndex, uint32_t* pDisplayCount, VkDisplayKHR* pDisplays) __attribute__ ((weak)); -VkResult gen9_GetDisplayModePropertiesKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, uint32_t* pPropertyCount, VkDisplayModePropertiesKHR* pProperties) __attribute__ ((weak)); -VkResult gen9_CreateDisplayModeKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, const VkDisplayModeCreateInfoKHR*pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDisplayModeKHR* pMode) __attribute__ ((weak)); -VkResult gen9_GetDisplayPlaneCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkDisplayModeKHR mode, uint32_t planeIndex, VkDisplayPlaneCapabilitiesKHR* pCapabilities) __attribute__ ((weak)); -VkResult gen9_CreateDisplayPlaneSurfaceKHR(VkInstance instance, const VkDisplaySurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); -VkResult gen9_CreateSharedSwapchainsKHR(VkDevice device, uint32_t swapchainCount, const VkSwapchainCreateInfoKHR* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchains) __attribute__ ((weak)); -#ifdef VK_USE_PLATFORM_XCB_KHR -VkResult gen9_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); -#endif // VK_USE_PLATFORM_XCB_KHR -#ifdef VK_USE_PLATFORM_XCB_KHR -VkBool32 gen9_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id) __attribute__ ((weak)); -#endif // VK_USE_PLATFORM_XCB_KHR #ifdef VK_USE_PLATFORM_WAYLAND_KHR VkResult gen9_CreateWaylandSurfaceKHR(VkInstance instance, const VkWaylandSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); #endif // VK_USE_PLATFORM_WAYLAND_KHR #ifdef VK_USE_PLATFORM_WAYLAND_KHR VkBool32 gen9_GetPhysicalDeviceWaylandPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, struct wl_display* display) __attribute__ ((weak)); #endif // VK_USE_PLATFORM_WAYLAND_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR +VkResult gen9_CreateWin32SurfaceKHR(VkInstance instance, const VkWin32SurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR +VkBool32 gen9_GetPhysicalDeviceWin32PresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR +VkResult gen9_CreateXlibSurfaceKHR(VkInstance instance, const VkXlibSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR +VkBool32 gen9_GetPhysicalDeviceXlibPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, Display* dpy, VisualID visualID) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR +VkResult gen9_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_XCB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR +VkBool32 gen9_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_XCB_KHR VkResult gen9_CreateDebugReportCallbackEXT(VkInstance instance, const VkDebugReportCallbackCreateInfoEXT* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDebugReportCallbackEXT* pCallback) __attribute__ ((weak)); void gen9_DestroyDebugReportCallbackEXT(VkInstance instance, VkDebugReportCallbackEXT callback, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); void gen9_DebugReportMessageEXT(VkInstance instance, VkDebugReportFlagsEXT flags, VkDebugReportObjectTypeEXT objectType, uint64_t object, size_t location, int32_t messageCode, const char* pLayerPrefix, const char* pMessage) __attribute__ ((weak)); -VkResult gen9_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMem, VkImage* pImage) __attribute__ ((weak)); +VkResult gen9_DebugMarkerSetObjectNameEXT(VkDevice device, VkDebugMarkerObjectNameInfoEXT* pNameInfo) __attribute__ ((weak)); +VkResult gen9_DebugMarkerSetObjectTagEXT(VkDevice device, VkDebugMarkerObjectTagInfoEXT* pTagInfo) __attribute__ ((weak)); +void gen9_CmdDebugMarkerBeginEXT(VkCommandBuffer commandBuffer, VkDebugMarkerMarkerInfoEXT* pMarkerInfo) __attribute__ ((weak)); +void gen9_CmdDebugMarkerEndEXT(VkCommandBuffer commandBuffer) __attribute__ ((weak)); +void gen9_CmdDebugMarkerInsertEXT(VkCommandBuffer commandBuffer, VkDebugMarkerMarkerInfoEXT* pMarkerInfo) __attribute__ ((weak)); +VkResult gen9_GetPhysicalDeviceExternalImageFormatPropertiesNV(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkExternalMemoryHandleTypeFlagsNV externalHandleType, VkExternalImageFormatPropertiesNV* pExternalImageFormatProperties) __attribute__ ((weak)); +#ifdef VK_USE_PLATFORM_WIN32_KHR +VkResult gen9_GetMemoryWin32HandleNV(VkDevice device, VkDeviceMemory memory, VkExternalMemoryHandleTypeFlagsNV handleType, HANDLE* pHandle) __attribute__ ((weak)); +#endif // VK_USE_PLATFORM_WIN32_KHR +void gen9_CmdDrawIndirectCountAMD(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkBuffer countBuffer, VkDeviceSize countBufferOffset, uint32_t maxDrawCount, uint32_t stride) __attribute__ ((weak)); +void gen9_CmdDrawIndexedIndirectCountAMD(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkBuffer countBuffer, VkDeviceSize countBufferOffset, uint32_t maxDrawCount, uint32_t stride) __attribute__ ((weak)); +void gen9_CmdProcessCommandsNVX(VkCommandBuffer commandBuffer, const VkCmdProcessCommandsInfoNVX* pProcessCommandsInfo) __attribute__ ((weak)); +void gen9_CmdReserveSpaceForCommandsNVX(VkCommandBuffer commandBuffer, const VkCmdReserveSpaceForCommandsInfoNVX* pReserveSpaceInfo) __attribute__ ((weak)); +VkResult gen9_CreateIndirectCommandsLayoutNVX(VkDevice device, const VkIndirectCommandsLayoutCreateInfoNVX* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkIndirectCommandsLayoutNVX* pIndirectCommandsLayout) __attribute__ ((weak)); +void gen9_DestroyIndirectCommandsLayoutNVX(VkDevice device, VkIndirectCommandsLayoutNVX indirectCommandsLayout, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult gen9_CreateObjectTableNVX(VkDevice device, const VkObjectTableCreateInfoNVX* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkObjectTableNVX* pObjectTable) __attribute__ ((weak)); +void gen9_DestroyObjectTableNVX(VkDevice device, VkObjectTableNVX objectTable, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak)); +VkResult gen9_RegisterObjectsNVX(VkDevice device, VkObjectTableNVX objectTable, uint32_t objectCount, const VkObjectTableEntryNVX* const* ppObjectTableEntries, const uint32_t* pObjectIndices) __attribute__ ((weak)); +VkResult gen9_UnregisterObjectsNVX(VkDevice device, VkObjectTableNVX objectTable, uint32_t objectCount, const VkObjectEntryTypeNVX* pObjectEntryTypes, const uint32_t* pObjectIndices) __attribute__ ((weak)); +void gen9_GetPhysicalDeviceGeneratedCommandsPropertiesNVX(VkPhysicalDevice physicalDevice, VkDeviceGeneratedCommandsFeaturesNVX* pFeatures, VkDeviceGeneratedCommandsLimitsNVX* pLimits) __attribute__ ((weak)); +VkResult gen9_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator,VkDeviceMemory* pMem,VkImage* pImage) __attribute__ ((weak)); const struct anv_dispatch_table gen9_layer = { .CreateInstance = gen9_CreateInstance, .DestroyInstance = gen9_DestroyInstance, .EnumeratePhysicalDevices = gen9_EnumeratePhysicalDevices, - .GetPhysicalDeviceFeatures = gen9_GetPhysicalDeviceFeatures, - .GetPhysicalDeviceFormatProperties = gen9_GetPhysicalDeviceFormatProperties, - .GetPhysicalDeviceImageFormatProperties = gen9_GetPhysicalDeviceImageFormatProperties, + .GetDeviceProcAddr = gen9_GetDeviceProcAddr, + .GetInstanceProcAddr = gen9_GetInstanceProcAddr, .GetPhysicalDeviceProperties = gen9_GetPhysicalDeviceProperties, .GetPhysicalDeviceQueueFamilyProperties = gen9_GetPhysicalDeviceQueueFamilyProperties, .GetPhysicalDeviceMemoryProperties = gen9_GetPhysicalDeviceMemoryProperties, - .GetInstanceProcAddr = gen9_GetInstanceProcAddr, - .GetDeviceProcAddr = gen9_GetDeviceProcAddr, + .GetPhysicalDeviceFeatures = gen9_GetPhysicalDeviceFeatures, + .GetPhysicalDeviceFormatProperties = gen9_GetPhysicalDeviceFormatProperties, + .GetPhysicalDeviceImageFormatProperties = gen9_GetPhysicalDeviceImageFormatProperties, .CreateDevice = gen9_CreateDevice, .DestroyDevice = gen9_DestroyDevice, - .EnumerateInstanceExtensionProperties = gen9_EnumerateInstanceExtensionProperties, - .EnumerateDeviceExtensionProperties = gen9_EnumerateDeviceExtensionProperties, .EnumerateInstanceLayerProperties = gen9_EnumerateInstanceLayerProperties, + .EnumerateInstanceExtensionProperties = gen9_EnumerateInstanceExtensionProperties, .EnumerateDeviceLayerProperties = gen9_EnumerateDeviceLayerProperties, + .EnumerateDeviceExtensionProperties = gen9_EnumerateDeviceExtensionProperties, .GetDeviceQueue = gen9_GetDeviceQueue, .QueueSubmit = gen9_QueueSubmit, .QueueWaitIdle = gen9_QueueWaitIdle, @@ -1959,10 +2378,10 @@ .FlushMappedMemoryRanges = gen9_FlushMappedMemoryRanges, .InvalidateMappedMemoryRanges = gen9_InvalidateMappedMemoryRanges, .GetDeviceMemoryCommitment = gen9_GetDeviceMemoryCommitment, - .BindBufferMemory = gen9_BindBufferMemory, - .BindImageMemory = gen9_BindImageMemory, .GetBufferMemoryRequirements = gen9_GetBufferMemoryRequirements, + .BindBufferMemory = gen9_BindBufferMemory, .GetImageMemoryRequirements = gen9_GetImageMemoryRequirements, + .BindImageMemory = gen9_BindImageMemory, .GetImageSparseMemoryRequirements = gen9_GetImageSparseMemoryRequirements, .GetPhysicalDeviceSparseImageFormatProperties = gen9_GetPhysicalDeviceSparseImageFormatProperties, .QueueBindSparse = gen9_QueueBindSparse, @@ -2068,6 +2487,23 @@ .CmdNextSubpass = gen9_CmdNextSubpass, .CmdEndRenderPass = gen9_CmdEndRenderPass, .CmdExecuteCommands = gen9_CmdExecuteCommands, +#ifdef VK_USE_PLATFORM_ANDROID_KHR + .CreateAndroidSurfaceKHR = gen9_CreateAndroidSurfaceKHR, +#endif // VK_USE_PLATFORM_ANDROID_KHR + .GetPhysicalDeviceDisplayPropertiesKHR = gen9_GetPhysicalDeviceDisplayPropertiesKHR, + .GetPhysicalDeviceDisplayPlanePropertiesKHR = gen9_GetPhysicalDeviceDisplayPlanePropertiesKHR, + .GetDisplayPlaneSupportedDisplaysKHR = gen9_GetDisplayPlaneSupportedDisplaysKHR, + .GetDisplayModePropertiesKHR = gen9_GetDisplayModePropertiesKHR, + .CreateDisplayModeKHR = gen9_CreateDisplayModeKHR, + .GetDisplayPlaneCapabilitiesKHR = gen9_GetDisplayPlaneCapabilitiesKHR, + .CreateDisplayPlaneSurfaceKHR = gen9_CreateDisplayPlaneSurfaceKHR, + .CreateSharedSwapchainsKHR = gen9_CreateSharedSwapchainsKHR, +#ifdef VK_USE_PLATFORM_MIR_KHR + .CreateMirSurfaceKHR = gen9_CreateMirSurfaceKHR, +#endif // VK_USE_PLATFORM_MIR_KHR +#ifdef VK_USE_PLATFORM_MIR_KHR + .GetPhysicalDeviceMirPresentationSupportKHR = gen9_GetPhysicalDeviceMirPresentationSupportKHR, +#endif // VK_USE_PLATFORM_MIR_KHR .DestroySurfaceKHR = gen9_DestroySurfaceKHR, .GetPhysicalDeviceSurfaceSupportKHR = gen9_GetPhysicalDeviceSurfaceSupportKHR, .GetPhysicalDeviceSurfaceCapabilitiesKHR = gen9_GetPhysicalDeviceSurfaceCapabilitiesKHR, @@ -2078,49 +2514,65 @@ .GetSwapchainImagesKHR = gen9_GetSwapchainImagesKHR, .AcquireNextImageKHR = gen9_AcquireNextImageKHR, .QueuePresentKHR = gen9_QueuePresentKHR, - .GetPhysicalDeviceDisplayPropertiesKHR = gen9_GetPhysicalDeviceDisplayPropertiesKHR, - .GetPhysicalDeviceDisplayPlanePropertiesKHR = gen9_GetPhysicalDeviceDisplayPlanePropertiesKHR, - .GetDisplayPlaneSupportedDisplaysKHR = gen9_GetDisplayPlaneSupportedDisplaysKHR, - .GetDisplayModePropertiesKHR = gen9_GetDisplayModePropertiesKHR, - .CreateDisplayModeKHR = gen9_CreateDisplayModeKHR, - .GetDisplayPlaneCapabilitiesKHR = gen9_GetDisplayPlaneCapabilitiesKHR, - .CreateDisplayPlaneSurfaceKHR = gen9_CreateDisplayPlaneSurfaceKHR, - .CreateSharedSwapchainsKHR = gen9_CreateSharedSwapchainsKHR, -#ifdef VK_USE_PLATFORM_XCB_KHR - .CreateXcbSurfaceKHR = gen9_CreateXcbSurfaceKHR, -#endif // VK_USE_PLATFORM_XCB_KHR -#ifdef VK_USE_PLATFORM_XCB_KHR - .GetPhysicalDeviceXcbPresentationSupportKHR = gen9_GetPhysicalDeviceXcbPresentationSupportKHR, -#endif // VK_USE_PLATFORM_XCB_KHR #ifdef VK_USE_PLATFORM_WAYLAND_KHR .CreateWaylandSurfaceKHR = gen9_CreateWaylandSurfaceKHR, #endif // VK_USE_PLATFORM_WAYLAND_KHR #ifdef VK_USE_PLATFORM_WAYLAND_KHR .GetPhysicalDeviceWaylandPresentationSupportKHR = gen9_GetPhysicalDeviceWaylandPresentationSupportKHR, #endif // VK_USE_PLATFORM_WAYLAND_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR + .CreateWin32SurfaceKHR = gen9_CreateWin32SurfaceKHR, +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR + .GetPhysicalDeviceWin32PresentationSupportKHR = gen9_GetPhysicalDeviceWin32PresentationSupportKHR, +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR + .CreateXlibSurfaceKHR = gen9_CreateXlibSurfaceKHR, +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR + .GetPhysicalDeviceXlibPresentationSupportKHR = gen9_GetPhysicalDeviceXlibPresentationSupportKHR, +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR + .CreateXcbSurfaceKHR = gen9_CreateXcbSurfaceKHR, +#endif // VK_USE_PLATFORM_XCB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR + .GetPhysicalDeviceXcbPresentationSupportKHR = gen9_GetPhysicalDeviceXcbPresentationSupportKHR, +#endif // VK_USE_PLATFORM_XCB_KHR .CreateDebugReportCallbackEXT = gen9_CreateDebugReportCallbackEXT, .DestroyDebugReportCallbackEXT = gen9_DestroyDebugReportCallbackEXT, .DebugReportMessageEXT = gen9_DebugReportMessageEXT, + .DebugMarkerSetObjectNameEXT = gen9_DebugMarkerSetObjectNameEXT, + .DebugMarkerSetObjectTagEXT = gen9_DebugMarkerSetObjectTagEXT, + .CmdDebugMarkerBeginEXT = gen9_CmdDebugMarkerBeginEXT, + .CmdDebugMarkerEndEXT = gen9_CmdDebugMarkerEndEXT, + .CmdDebugMarkerInsertEXT = gen9_CmdDebugMarkerInsertEXT, + .GetPhysicalDeviceExternalImageFormatPropertiesNV = gen9_GetPhysicalDeviceExternalImageFormatPropertiesNV, +#ifdef VK_USE_PLATFORM_WIN32_KHR + .GetMemoryWin32HandleNV = gen9_GetMemoryWin32HandleNV, +#endif // VK_USE_PLATFORM_WIN32_KHR + .CmdDrawIndirectCountAMD = gen9_CmdDrawIndirectCountAMD, + .CmdDrawIndexedIndirectCountAMD = gen9_CmdDrawIndexedIndirectCountAMD, + .CmdProcessCommandsNVX = gen9_CmdProcessCommandsNVX, + .CmdReserveSpaceForCommandsNVX = gen9_CmdReserveSpaceForCommandsNVX, + .CreateIndirectCommandsLayoutNVX = gen9_CreateIndirectCommandsLayoutNVX, + .DestroyIndirectCommandsLayoutNVX = gen9_DestroyIndirectCommandsLayoutNVX, + .CreateObjectTableNVX = gen9_CreateObjectTableNVX, + .DestroyObjectTableNVX = gen9_DestroyObjectTableNVX, + .RegisterObjectsNVX = gen9_RegisterObjectsNVX, + .UnregisterObjectsNVX = gen9_UnregisterObjectsNVX, + .GetPhysicalDeviceGeneratedCommandsPropertiesNVX = gen9_GetPhysicalDeviceGeneratedCommandsPropertiesNVX, .CreateDmaBufImageINTEL = gen9_CreateDmaBufImageINTEL, }; -static const struct brw_device_info *dispatch_devinfo; - -void -anv_set_dispatch_devinfo(const struct brw_device_info *devinfo) -{ - dispatch_devinfo = devinfo; -} - -void * __attribute__ ((noinline)) -anv_resolve_entrypoint(uint32_t index) +static void * __attribute__ ((noinline)) +anv_resolve_entrypoint(const struct gen_device_info *devinfo, uint32_t index) { - if (dispatch_devinfo == NULL) { + if (devinfo == NULL) { return anv_layer.entrypoints[index]; } - switch (dispatch_devinfo->gen) { + switch (devinfo->gen) { case 9: if (gen9_layer.entrypoints[index]) return gen9_layer.entrypoints[index]; @@ -2130,7 +2582,7 @@ return gen8_layer.entrypoints[index]; /* fall through */ case 7: - if (dispatch_devinfo->is_haswell && gen75_layer.entrypoints[index]) + if (devinfo->is_haswell && gen75_layer.entrypoints[index]) return gen75_layer.entrypoints[index]; if (gen7_layer.entrypoints[index]) @@ -2146,57 +2598,57 @@ /* Hash table stats: * size 256 entries * collisions entries - * 0 109 - * 1 29 - * 2 9 - * 3 8 - * 4 4 - * 5 1 - * 6 0 - * 7 1 - * 8 1 - * 9+ 1 + * 0 116 + * 1 34 + * 2 10 + * 3 10 + * 4 3 + * 5 3 + * 6 3 + * 7 2 + * 8 2 + * 9+ 5 */ #define none 0xffff static const uint16_t map[] = { - 0x0044, none, none, none, 0x0096, 0x002b, 0x0040, 0x0061, - 0x0049, 0x0022, 0x0056, none, none, none, 0x0095, none, - none, none, none, 0x0067, none, none, none, 0x0099, - 0x0052, 0x009b, 0x0058, 0x004c, none, 0x0069, none, none, + 0x0044, none, none, none, 0x008d, 0x002b, 0x0040, 0x0061, + 0x0049, 0x0022, 0x0056, none, 0x00b8, none, 0x008c, none, + 0x00ab, 0x00ad, none, 0x0067, none, none, none, 0x0090, + 0x0052, 0x00a4, 0x0058, 0x004c, none, 0x0069, none, none, none, none, 0x0054, none, 0x0014, 0x005b, 0x0070, 0x0002, - 0x007c, none, 0x001e, 0x002f, none, none, 0x0077, 0x0018, - 0x004b, 0x002a, none, 0x0003, 0x0065, 0x0080, 0x006d, 0x0053, - none, none, 0x004d, 0x0090, 0x0024, none, 0x005e, 0x000b, - 0x0088, 0x0091, none, none, 0x005c, 0x0033, none, 0x00a1, - 0x0087, 0x003f, 0x001d, 0x002c, 0x0082, 0x005a, none, none, - none, 0x0019, 0x0046, 0x003a, 0x0093, none, 0x0034, none, - 0x0051, none, none, 0x0020, none, 0x0066, 0x0075, none, - none, none, 0x0035, 0x001f, 0x006f, 0x0060, 0x0047, 0x0005, - 0x0023, 0x009f, none, 0x006b, none, 0x0041, 0x0028, none, - 0x0068, none, none, 0x003e, 0x0048, 0x007b, 0x0055, none, - none, 0x0045, 0x006e, 0x0084, none, 0x0089, 0x000d, 0x0030, - none, 0x0027, 0x0081, 0x009a, 0x005d, 0x008a, 0x000a, 0x008f, - none, 0x0063, 0x0007, none, 0x0098, 0x0097, none, none, + 0x007c, none, 0x001c, 0x002f, 0x00bb, none, 0x0077, 0x0018, + 0x004b, 0x002a, none, 0x0008, 0x0065, 0x0080, 0x006d, 0x0053, + 0x00a9, none, 0x004d, 0x0093, 0x0024, 0x00b4, 0x005e, 0x000b, + 0x0088, 0x008a, none, none, 0x005c, 0x0033, none, 0x00a8, + 0x0087, 0x003f, 0x001f, 0x002c, 0x0082, 0x005a, 0x0089, none, + 0x00b0, 0x0019, 0x0046, 0x003a, 0x008e, 0x0092, 0x0034, none, + 0x0051, none, 0x00ba, 0x0020, none, 0x0066, 0x0075, 0x00ae, + none, 0x009b, 0x0035, 0x001e, 0x006f, 0x0060, 0x0047, 0x000a, + 0x0023, 0x00a6, none, 0x006b, none, 0x0041, 0x0028, none, + 0x0068, none, none, 0x003e, 0x0048, 0x007b, 0x0055, 0x00a1, + none, 0x0045, 0x006e, 0x0084, none, 0x0094, 0x000e, 0x0030, + none, 0x0027, 0x0081, 0x0091, 0x005d, 0x0095, 0x0003, 0x009a, + none, 0x0063, 0x0006, none, 0x008f, 0x009c, none, none, none, 0x0059, 0x0026, none, 0x003c, none, 0x0037, none, - 0x0004, 0x0038, 0x0011, none, 0x0072, 0x0016, none, 0x003d, + 0x0009, 0x0038, 0x0011, none, 0x0072, 0x0016, none, 0x003d, 0x00a0, 0x006a, 0x003b, none, 0x004a, 0x0013, 0x0000, 0x007a, - 0x002e, 0x0071, none, none, 0x0074, 0x0009, 0x004f, 0x0029, - none, 0x004e, 0x009d, 0x0031, none, 0x001b, none, 0x0073, - 0x005f, 0x0032, 0x0078, 0x008e, none, none, none, 0x006c, - none, none, 0x0036, none, 0x0050, none, 0x007d, none, - 0x008c, 0x0006, 0x001a, 0x000c, 0x009c, 0x0094, 0x0092, none, - none, 0x008d, 0x009e, 0x0015, 0x0083, 0x0043, none, none, - 0x000f, none, 0x0008, none, 0x0025, 0x007f, 0x001c, none, - 0x0076, none, 0x0064, 0x0085, none, none, none, 0x0010, - 0x007e, none, none, 0x0017, 0x0012, 0x000e, none, 0x0021, - 0x008b, 0x0079, 0x0001, 0x00a2, none, 0x002d, none, none, - none, 0x0086, none, 0x0062, none, 0x0057, 0x0042, 0x0039, + 0x002e, 0x0071, none, 0x00a3, 0x0074, 0x0004, 0x004f, 0x0029, + 0x00ac, 0x004e, 0x009e, 0x0031, none, 0x001b, none, 0x0073, + 0x005f, 0x0032, 0x0078, 0x0099, 0x00b6, none, none, 0x006c, + 0x00b1, 0x00b2, 0x0036, none, 0x0050, 0x00a2, 0x007d, none, + 0x0097, 0x0005, 0x001a, 0x000c, 0x00a5, 0x008b, 0x009d, none, + none, 0x0098, 0x009f, 0x0015, 0x0083, 0x0043, 0x00b7, none, + 0x000d, 0x00a7, 0x0007, none, 0x0025, 0x007f, 0x001d, 0x00af, + 0x0076, none, 0x0064, 0x0085, none, 0x00b9, 0x00b5, 0x000f, + 0x007e, none, none, 0x0017, 0x0012, 0x0010, none, 0x0021, + 0x0096, 0x0079, 0x0001, 0x00aa, none, 0x002d, none, none, + none, 0x0086, 0x00b3, 0x0062, none, 0x0057, 0x0042, 0x0039, }; void * -anv_lookup_entrypoint(const char *name) +anv_lookup_entrypoint(const struct gen_device_info *devinfo, const char *name) { static const uint32_t prime_factor = 5024183; static const uint32_t prime_step = 19; @@ -2220,6 +2672,6 @@ if (strcmp(name, strings + e->name) != 0) return NULL; - return anv_resolve_entrypoint(i); + return anv_resolve_entrypoint(devinfo, i); } diff -Nru mesa-12.0.6/src/intel/vulkan/anv_entrypoints_gen.py mesa-17.0.7/src/intel/vulkan/anv_entrypoints_gen.py --- mesa-12.0.6/src/intel/vulkan/anv_entrypoints_gen.py 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_entrypoints_gen.py 2017-06-01 10:37:10.000000000 +0000 @@ -22,14 +22,8 @@ # IN THE SOFTWARE. # -import fileinput, re, sys - -# Each function typedef in the vulkan.h header is all on one line and matches -# this regepx. We hope that won't change. - -p = re.compile('typedef ([^ ]*) *\((?:VKAPI_PTR)? *\*PFN_vk([^(]*)\)(.*);') - -entrypoints = [] +import sys +import xml.etree.ElementTree as ET # We generate a static hash table for entry point lookup # (vkGetProcAddress). We use a linear congruential generator for our hash @@ -51,29 +45,11 @@ return h -def get_platform_guard_macro(name): - if "Xlib" in name: - return "VK_USE_PLATFORM_XLIB_KHR" - elif "Xcb" in name: - return "VK_USE_PLATFORM_XCB_KHR" - elif "Wayland" in name: - return "VK_USE_PLATFORM_WAYLAND_KHR" - elif "Mir" in name: - return "VK_USE_PLATFORM_MIR_KHR" - elif "Android" in name: - return "VK_USE_PLATFORM_ANDROID_KHR" - elif "Win32" in name: - return "VK_USE_PLATFORM_WIN32_KHR" - else: - return None - -def print_guard_start(name): - guard = get_platform_guard_macro(name) +def print_guard_start(guard): if guard is not None: print "#ifdef {0}".format(guard) -def print_guard_end(name): - guard = get_platform_guard_macro(name) +def print_guard_end(guard): if guard is not None: print "#endif // {0}".format(guard) @@ -87,18 +63,47 @@ opt_code = True sys.argv.pop() -# Parse the entry points in the header - -i = 0 -for line in fileinput.input(): - m = p.match(line) - if (m): - if m.group(2) == 'VoidFunction': - continue - fullname = "vk" + m.group(2) - h = hash(fullname) - entrypoints.append((m.group(1), m.group(2), m.group(3), i, h)) - i = i + 1 +# Extract the entry points from the registry +def get_entrypoints(doc, entrypoints_to_defines): + entrypoints = [] + commands = doc.findall('./commands/command') + for i, command in enumerate(commands): + type = command.find('./proto/type').text + fullname = command.find('./proto/name').text + shortname = fullname[2:] + params = map(lambda p: "".join(p.itertext()), command.findall('./param')) + params = ', '.join(params) + if fullname in entrypoints_to_defines: + guard = entrypoints_to_defines[fullname] + else: + guard = None + entrypoints.append((type, shortname, params, i, hash(fullname), guard)) + return entrypoints + +# Maps entry points to extension defines +def get_entrypoints_defines(doc): + entrypoints_to_defines = {} + extensions = doc.findall('./extensions/extension') + for extension in extensions: + define = extension.get('protect') + entrypoints = extension.findall('./require/command') + for entrypoint in entrypoints: + fullname = entrypoint.get('name') + entrypoints_to_defines[fullname] = define + return entrypoints_to_defines + +doc = ET.parse(sys.stdin) +entrypoints = get_entrypoints(doc, get_entrypoints_defines(doc)) + +# Manually add CreateDmaBufImageINTEL for which we don't have an extension +# defined. +entrypoints.append(('VkResult', 'CreateDmaBufImageINTEL', + 'VkDevice device, ' + + 'const VkDmaBufImageCreateInfo* pCreateInfo, ' + + 'const VkAllocationCallbacks* pAllocator,' + + 'VkDeviceMemory* pMem,' + + 'VkImage* pImage', len(entrypoints), + hash('vkCreateDmaBufImageINTEL'), None)) # For outputting entrypoints.h we generate a anv_EntryPoint() prototype # per entry point. @@ -111,8 +116,7 @@ print " void *entrypoints[%d];" % len(entrypoints) print " struct {" - for type, name, args, num, h in entrypoints: - guard = get_platform_guard_macro(name) + for type, name, args, num, h, guard in entrypoints: if guard is not None: print "#ifdef {0}".format(guard) print " PFN_vk{0} {0};".format(name) @@ -125,16 +129,16 @@ print " };\n" print "};\n" - print "void anv_set_dispatch_devinfo(const struct brw_device_info *info);\n" + print "void anv_set_dispatch_devinfo(const struct gen_device_info *info);\n" - for type, name, args, num, h in entrypoints: - print_guard_start(name) - print "%s anv_%s%s;" % (type, name, args) - print "%s gen7_%s%s;" % (type, name, args) - print "%s gen75_%s%s;" % (type, name, args) - print "%s gen8_%s%s;" % (type, name, args) - print "%s gen9_%s%s;" % (type, name, args) - print_guard_end(name) + for type, name, args, num, h, guard in entrypoints: + print_guard_start(guard) + print "%s anv_%s(%s);" % (type, name, args) + print "%s gen7_%s(%s);" % (type, name, args) + print "%s gen75_%s(%s);" % (type, name, args) + print "%s gen8_%s(%s);" % (type, name, args) + print "%s gen9_%s(%s);" % (type, name, args) + print_guard_end(guard) exit() @@ -180,7 +184,7 @@ offsets = [] i = 0; -for type, name, args, num, h in entrypoints: +for type, name, args, num, h, guard in entrypoints: print " \"vk%s\\0\"" % name offsets.append(i) i += 2 + len(name) + 1 @@ -189,7 +193,7 @@ # Now generate the table of all entry points print "\nstatic const struct anv_entrypoint entrypoints[] = {" -for type, name, args, num, h in entrypoints: +for type, name, args, num, h, guard in entrypoints: print " { %5d, 0x%08x }," % (offsets[num], h) print "};\n" @@ -202,34 +206,26 @@ """ for layer in [ "anv", "gen7", "gen75", "gen8", "gen9" ]: - for type, name, args, num, h in entrypoints: - print_guard_start(name) - print "%s %s_%s%s __attribute__ ((weak));" % (type, layer, name, args) - print_guard_end(name) + for type, name, args, num, h, guard in entrypoints: + print_guard_start(guard) + print "%s %s_%s(%s) __attribute__ ((weak));" % (type, layer, name, args) + print_guard_end(guard) print "\nconst struct anv_dispatch_table %s_layer = {" % layer - for type, name, args, num, h in entrypoints: - print_guard_start(name) + for type, name, args, num, h, guard in entrypoints: + print_guard_start(guard) print " .%s = %s_%s," % (name, layer, name) - print_guard_end(name) + print_guard_end(guard) print "};\n" print """ -static const struct brw_device_info *dispatch_devinfo; - -void -anv_set_dispatch_devinfo(const struct brw_device_info *devinfo) -{ - dispatch_devinfo = devinfo; -} - -void * __attribute__ ((noinline)) -anv_resolve_entrypoint(uint32_t index) +static void * __attribute__ ((noinline)) +anv_resolve_entrypoint(const struct gen_device_info *devinfo, uint32_t index) { - if (dispatch_devinfo == NULL) { + if (devinfo == NULL) { return anv_layer.entrypoints[index]; } - switch (dispatch_devinfo->gen) { + switch (devinfo->gen) { case 9: if (gen9_layer.entrypoints[index]) return gen9_layer.entrypoints[index]; @@ -239,7 +235,7 @@ return gen8_layer.entrypoints[index]; /* fall through */ case 7: - if (dispatch_devinfo->is_haswell && gen75_layer.entrypoints[index]) + if (devinfo->is_haswell && gen75_layer.entrypoints[index]) return gen75_layer.entrypoints[index]; if (gen7_layer.entrypoints[index]) @@ -259,7 +255,7 @@ map = [none for f in xrange(hash_size)] collisions = [0 for f in xrange(10)] -for type, name, args, num, h in entrypoints: +for type, name, args, num, h, guard in entrypoints: level = 0 while map[h & hash_mask] != none: h = h + prime_step @@ -294,14 +290,14 @@ print "0x%04x," % (map[j] & 0xffff), print -print "};" +print "};" # Finally we generate the hash table lookup function. The hash function and # linear probing algorithm matches the hash table generated above. print """ void * -anv_lookup_entrypoint(const char *name) +anv_lookup_entrypoint(const struct gen_device_info *devinfo, const char *name) { static const uint32_t prime_factor = %d; static const uint32_t prime_step = %d; @@ -325,6 +321,6 @@ if (strcmp(name, strings + e->name) != 0) return NULL; - return anv_resolve_entrypoint(i); + return anv_resolve_entrypoint(devinfo, i); } """ % (prime_factor, prime_step, hash_mask) diff -Nru mesa-12.0.6/src/intel/vulkan/anv_entrypoints.h mesa-17.0.7/src/intel/vulkan/anv_entrypoints.h --- mesa-12.0.6/src/intel/vulkan/anv_entrypoints.h 2017-01-24 01:43:26.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_entrypoints.h 2017-06-01 10:38:06.000000000 +0000 @@ -2,25 +2,25 @@ struct anv_dispatch_table { union { - void *entrypoints[163]; + void *entrypoints[188]; struct { PFN_vkCreateInstance CreateInstance; PFN_vkDestroyInstance DestroyInstance; PFN_vkEnumeratePhysicalDevices EnumeratePhysicalDevices; - PFN_vkGetPhysicalDeviceFeatures GetPhysicalDeviceFeatures; - PFN_vkGetPhysicalDeviceFormatProperties GetPhysicalDeviceFormatProperties; - PFN_vkGetPhysicalDeviceImageFormatProperties GetPhysicalDeviceImageFormatProperties; + PFN_vkGetDeviceProcAddr GetDeviceProcAddr; + PFN_vkGetInstanceProcAddr GetInstanceProcAddr; PFN_vkGetPhysicalDeviceProperties GetPhysicalDeviceProperties; PFN_vkGetPhysicalDeviceQueueFamilyProperties GetPhysicalDeviceQueueFamilyProperties; PFN_vkGetPhysicalDeviceMemoryProperties GetPhysicalDeviceMemoryProperties; - PFN_vkGetInstanceProcAddr GetInstanceProcAddr; - PFN_vkGetDeviceProcAddr GetDeviceProcAddr; + PFN_vkGetPhysicalDeviceFeatures GetPhysicalDeviceFeatures; + PFN_vkGetPhysicalDeviceFormatProperties GetPhysicalDeviceFormatProperties; + PFN_vkGetPhysicalDeviceImageFormatProperties GetPhysicalDeviceImageFormatProperties; PFN_vkCreateDevice CreateDevice; PFN_vkDestroyDevice DestroyDevice; - PFN_vkEnumerateInstanceExtensionProperties EnumerateInstanceExtensionProperties; - PFN_vkEnumerateDeviceExtensionProperties EnumerateDeviceExtensionProperties; PFN_vkEnumerateInstanceLayerProperties EnumerateInstanceLayerProperties; + PFN_vkEnumerateInstanceExtensionProperties EnumerateInstanceExtensionProperties; PFN_vkEnumerateDeviceLayerProperties EnumerateDeviceLayerProperties; + PFN_vkEnumerateDeviceExtensionProperties EnumerateDeviceExtensionProperties; PFN_vkGetDeviceQueue GetDeviceQueue; PFN_vkQueueSubmit QueueSubmit; PFN_vkQueueWaitIdle QueueWaitIdle; @@ -32,10 +32,10 @@ PFN_vkFlushMappedMemoryRanges FlushMappedMemoryRanges; PFN_vkInvalidateMappedMemoryRanges InvalidateMappedMemoryRanges; PFN_vkGetDeviceMemoryCommitment GetDeviceMemoryCommitment; - PFN_vkBindBufferMemory BindBufferMemory; - PFN_vkBindImageMemory BindImageMemory; PFN_vkGetBufferMemoryRequirements GetBufferMemoryRequirements; + PFN_vkBindBufferMemory BindBufferMemory; PFN_vkGetImageMemoryRequirements GetImageMemoryRequirements; + PFN_vkBindImageMemory BindImageMemory; PFN_vkGetImageSparseMemoryRequirements GetImageSparseMemoryRequirements; PFN_vkGetPhysicalDeviceSparseImageFormatProperties GetPhysicalDeviceSparseImageFormatProperties; PFN_vkQueueBindSparse QueueBindSparse; @@ -141,16 +141,11 @@ PFN_vkCmdNextSubpass CmdNextSubpass; PFN_vkCmdEndRenderPass CmdEndRenderPass; PFN_vkCmdExecuteCommands CmdExecuteCommands; - PFN_vkDestroySurfaceKHR DestroySurfaceKHR; - PFN_vkGetPhysicalDeviceSurfaceSupportKHR GetPhysicalDeviceSurfaceSupportKHR; - PFN_vkGetPhysicalDeviceSurfaceCapabilitiesKHR GetPhysicalDeviceSurfaceCapabilitiesKHR; - PFN_vkGetPhysicalDeviceSurfaceFormatsKHR GetPhysicalDeviceSurfaceFormatsKHR; - PFN_vkGetPhysicalDeviceSurfacePresentModesKHR GetPhysicalDeviceSurfacePresentModesKHR; - PFN_vkCreateSwapchainKHR CreateSwapchainKHR; - PFN_vkDestroySwapchainKHR DestroySwapchainKHR; - PFN_vkGetSwapchainImagesKHR GetSwapchainImagesKHR; - PFN_vkAcquireNextImageKHR AcquireNextImageKHR; - PFN_vkQueuePresentKHR QueuePresentKHR; +#ifdef VK_USE_PLATFORM_ANDROID_KHR + PFN_vkCreateAndroidSurfaceKHR CreateAndroidSurfaceKHR; +#else + void *CreateAndroidSurfaceKHR; +#endif PFN_vkGetPhysicalDeviceDisplayPropertiesKHR GetPhysicalDeviceDisplayPropertiesKHR; PFN_vkGetPhysicalDeviceDisplayPlanePropertiesKHR GetPhysicalDeviceDisplayPlanePropertiesKHR; PFN_vkGetDisplayPlaneSupportedDisplaysKHR GetDisplayPlaneSupportedDisplaysKHR; @@ -159,16 +154,26 @@ PFN_vkGetDisplayPlaneCapabilitiesKHR GetDisplayPlaneCapabilitiesKHR; PFN_vkCreateDisplayPlaneSurfaceKHR CreateDisplayPlaneSurfaceKHR; PFN_vkCreateSharedSwapchainsKHR CreateSharedSwapchainsKHR; -#ifdef VK_USE_PLATFORM_XCB_KHR - PFN_vkCreateXcbSurfaceKHR CreateXcbSurfaceKHR; +#ifdef VK_USE_PLATFORM_MIR_KHR + PFN_vkCreateMirSurfaceKHR CreateMirSurfaceKHR; #else - void *CreateXcbSurfaceKHR; + void *CreateMirSurfaceKHR; #endif -#ifdef VK_USE_PLATFORM_XCB_KHR - PFN_vkGetPhysicalDeviceXcbPresentationSupportKHR GetPhysicalDeviceXcbPresentationSupportKHR; +#ifdef VK_USE_PLATFORM_MIR_KHR + PFN_vkGetPhysicalDeviceMirPresentationSupportKHR GetPhysicalDeviceMirPresentationSupportKHR; #else - void *GetPhysicalDeviceXcbPresentationSupportKHR; + void *GetPhysicalDeviceMirPresentationSupportKHR; #endif + PFN_vkDestroySurfaceKHR DestroySurfaceKHR; + PFN_vkGetPhysicalDeviceSurfaceSupportKHR GetPhysicalDeviceSurfaceSupportKHR; + PFN_vkGetPhysicalDeviceSurfaceCapabilitiesKHR GetPhysicalDeviceSurfaceCapabilitiesKHR; + PFN_vkGetPhysicalDeviceSurfaceFormatsKHR GetPhysicalDeviceSurfaceFormatsKHR; + PFN_vkGetPhysicalDeviceSurfacePresentModesKHR GetPhysicalDeviceSurfacePresentModesKHR; + PFN_vkCreateSwapchainKHR CreateSwapchainKHR; + PFN_vkDestroySwapchainKHR DestroySwapchainKHR; + PFN_vkGetSwapchainImagesKHR GetSwapchainImagesKHR; + PFN_vkAcquireNextImageKHR AcquireNextImageKHR; + PFN_vkQueuePresentKHR QueuePresentKHR; #ifdef VK_USE_PLATFORM_WAYLAND_KHR PFN_vkCreateWaylandSurfaceKHR CreateWaylandSurfaceKHR; #else @@ -179,9 +184,61 @@ #else void *GetPhysicalDeviceWaylandPresentationSupportKHR; #endif +#ifdef VK_USE_PLATFORM_WIN32_KHR + PFN_vkCreateWin32SurfaceKHR CreateWin32SurfaceKHR; +#else + void *CreateWin32SurfaceKHR; +#endif +#ifdef VK_USE_PLATFORM_WIN32_KHR + PFN_vkGetPhysicalDeviceWin32PresentationSupportKHR GetPhysicalDeviceWin32PresentationSupportKHR; +#else + void *GetPhysicalDeviceWin32PresentationSupportKHR; +#endif +#ifdef VK_USE_PLATFORM_XLIB_KHR + PFN_vkCreateXlibSurfaceKHR CreateXlibSurfaceKHR; +#else + void *CreateXlibSurfaceKHR; +#endif +#ifdef VK_USE_PLATFORM_XLIB_KHR + PFN_vkGetPhysicalDeviceXlibPresentationSupportKHR GetPhysicalDeviceXlibPresentationSupportKHR; +#else + void *GetPhysicalDeviceXlibPresentationSupportKHR; +#endif +#ifdef VK_USE_PLATFORM_XCB_KHR + PFN_vkCreateXcbSurfaceKHR CreateXcbSurfaceKHR; +#else + void *CreateXcbSurfaceKHR; +#endif +#ifdef VK_USE_PLATFORM_XCB_KHR + PFN_vkGetPhysicalDeviceXcbPresentationSupportKHR GetPhysicalDeviceXcbPresentationSupportKHR; +#else + void *GetPhysicalDeviceXcbPresentationSupportKHR; +#endif PFN_vkCreateDebugReportCallbackEXT CreateDebugReportCallbackEXT; PFN_vkDestroyDebugReportCallbackEXT DestroyDebugReportCallbackEXT; PFN_vkDebugReportMessageEXT DebugReportMessageEXT; + PFN_vkDebugMarkerSetObjectNameEXT DebugMarkerSetObjectNameEXT; + PFN_vkDebugMarkerSetObjectTagEXT DebugMarkerSetObjectTagEXT; + PFN_vkCmdDebugMarkerBeginEXT CmdDebugMarkerBeginEXT; + PFN_vkCmdDebugMarkerEndEXT CmdDebugMarkerEndEXT; + PFN_vkCmdDebugMarkerInsertEXT CmdDebugMarkerInsertEXT; + PFN_vkGetPhysicalDeviceExternalImageFormatPropertiesNV GetPhysicalDeviceExternalImageFormatPropertiesNV; +#ifdef VK_USE_PLATFORM_WIN32_KHR + PFN_vkGetMemoryWin32HandleNV GetMemoryWin32HandleNV; +#else + void *GetMemoryWin32HandleNV; +#endif + PFN_vkCmdDrawIndirectCountAMD CmdDrawIndirectCountAMD; + PFN_vkCmdDrawIndexedIndirectCountAMD CmdDrawIndexedIndirectCountAMD; + PFN_vkCmdProcessCommandsNVX CmdProcessCommandsNVX; + PFN_vkCmdReserveSpaceForCommandsNVX CmdReserveSpaceForCommandsNVX; + PFN_vkCreateIndirectCommandsLayoutNVX CreateIndirectCommandsLayoutNVX; + PFN_vkDestroyIndirectCommandsLayoutNVX DestroyIndirectCommandsLayoutNVX; + PFN_vkCreateObjectTableNVX CreateObjectTableNVX; + PFN_vkDestroyObjectTableNVX DestroyObjectTableNVX; + PFN_vkRegisterObjectsNVX RegisterObjectsNVX; + PFN_vkUnregisterObjectsNVX UnregisterObjectsNVX; + PFN_vkGetPhysicalDeviceGeneratedCommandsPropertiesNVX GetPhysicalDeviceGeneratedCommandsPropertiesNVX; PFN_vkCreateDmaBufImageINTEL CreateDmaBufImageINTEL; }; @@ -189,7 +246,7 @@ }; -void anv_set_dispatch_devinfo(const struct brw_device_info *info); +void anv_set_dispatch_devinfo(const struct gen_device_info *info); VkResult anv_CreateInstance(const VkInstanceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkInstance* pInstance); VkResult gen7_CreateInstance(const VkInstanceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkInstance* pInstance); @@ -206,21 +263,16 @@ VkResult gen75_EnumeratePhysicalDevices(VkInstance instance, uint32_t* pPhysicalDeviceCount, VkPhysicalDevice* pPhysicalDevices); VkResult gen8_EnumeratePhysicalDevices(VkInstance instance, uint32_t* pPhysicalDeviceCount, VkPhysicalDevice* pPhysicalDevices); VkResult gen9_EnumeratePhysicalDevices(VkInstance instance, uint32_t* pPhysicalDeviceCount, VkPhysicalDevice* pPhysicalDevices); -void anv_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures); -void gen7_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures); -void gen75_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures); -void gen8_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures); -void gen9_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures); -void anv_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties); -void gen7_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties); -void gen75_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties); -void gen8_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties); -void gen9_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties); -VkResult anv_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties); -VkResult gen7_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties); -VkResult gen75_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties); -VkResult gen8_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties); -VkResult gen9_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties); +PFN_vkVoidFunction anv_GetDeviceProcAddr(VkDevice device, const char* pName); +PFN_vkVoidFunction gen7_GetDeviceProcAddr(VkDevice device, const char* pName); +PFN_vkVoidFunction gen75_GetDeviceProcAddr(VkDevice device, const char* pName); +PFN_vkVoidFunction gen8_GetDeviceProcAddr(VkDevice device, const char* pName); +PFN_vkVoidFunction gen9_GetDeviceProcAddr(VkDevice device, const char* pName); +PFN_vkVoidFunction anv_GetInstanceProcAddr(VkInstance instance, const char* pName); +PFN_vkVoidFunction gen7_GetInstanceProcAddr(VkInstance instance, const char* pName); +PFN_vkVoidFunction gen75_GetInstanceProcAddr(VkInstance instance, const char* pName); +PFN_vkVoidFunction gen8_GetInstanceProcAddr(VkInstance instance, const char* pName); +PFN_vkVoidFunction gen9_GetInstanceProcAddr(VkInstance instance, const char* pName); void anv_GetPhysicalDeviceProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties* pProperties); void gen7_GetPhysicalDeviceProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties* pProperties); void gen75_GetPhysicalDeviceProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties* pProperties); @@ -236,16 +288,21 @@ void gen75_GetPhysicalDeviceMemoryProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties* pMemoryProperties); void gen8_GetPhysicalDeviceMemoryProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties* pMemoryProperties); void gen9_GetPhysicalDeviceMemoryProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties* pMemoryProperties); -PFN_vkVoidFunction anv_GetInstanceProcAddr(VkInstance instance, const char* pName); -PFN_vkVoidFunction gen7_GetInstanceProcAddr(VkInstance instance, const char* pName); -PFN_vkVoidFunction gen75_GetInstanceProcAddr(VkInstance instance, const char* pName); -PFN_vkVoidFunction gen8_GetInstanceProcAddr(VkInstance instance, const char* pName); -PFN_vkVoidFunction gen9_GetInstanceProcAddr(VkInstance instance, const char* pName); -PFN_vkVoidFunction anv_GetDeviceProcAddr(VkDevice device, const char* pName); -PFN_vkVoidFunction gen7_GetDeviceProcAddr(VkDevice device, const char* pName); -PFN_vkVoidFunction gen75_GetDeviceProcAddr(VkDevice device, const char* pName); -PFN_vkVoidFunction gen8_GetDeviceProcAddr(VkDevice device, const char* pName); -PFN_vkVoidFunction gen9_GetDeviceProcAddr(VkDevice device, const char* pName); +void anv_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures); +void gen7_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures); +void gen75_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures); +void gen8_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures); +void gen9_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures); +void anv_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties); +void gen7_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties); +void gen75_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties); +void gen8_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties); +void gen9_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties); +VkResult anv_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties); +VkResult gen7_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties); +VkResult gen75_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties); +VkResult gen8_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties); +VkResult gen9_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties); VkResult anv_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDevice* pDevice); VkResult gen7_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDevice* pDevice); VkResult gen75_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDevice* pDevice); @@ -256,26 +313,26 @@ void gen75_DestroyDevice(VkDevice device, const VkAllocationCallbacks* pAllocator); void gen8_DestroyDevice(VkDevice device, const VkAllocationCallbacks* pAllocator); void gen9_DestroyDevice(VkDevice device, const VkAllocationCallbacks* pAllocator); -VkResult anv_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties); -VkResult gen7_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties); -VkResult gen75_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties); -VkResult gen8_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties); -VkResult gen9_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties); -VkResult anv_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties); -VkResult gen7_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties); -VkResult gen75_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties); -VkResult gen8_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties); -VkResult gen9_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties); VkResult anv_EnumerateInstanceLayerProperties(uint32_t* pPropertyCount, VkLayerProperties* pProperties); VkResult gen7_EnumerateInstanceLayerProperties(uint32_t* pPropertyCount, VkLayerProperties* pProperties); VkResult gen75_EnumerateInstanceLayerProperties(uint32_t* pPropertyCount, VkLayerProperties* pProperties); VkResult gen8_EnumerateInstanceLayerProperties(uint32_t* pPropertyCount, VkLayerProperties* pProperties); VkResult gen9_EnumerateInstanceLayerProperties(uint32_t* pPropertyCount, VkLayerProperties* pProperties); +VkResult anv_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties); +VkResult gen7_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties); +VkResult gen75_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties); +VkResult gen8_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties); +VkResult gen9_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties); VkResult anv_EnumerateDeviceLayerProperties(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkLayerProperties* pProperties); VkResult gen7_EnumerateDeviceLayerProperties(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkLayerProperties* pProperties); VkResult gen75_EnumerateDeviceLayerProperties(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkLayerProperties* pProperties); VkResult gen8_EnumerateDeviceLayerProperties(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkLayerProperties* pProperties); VkResult gen9_EnumerateDeviceLayerProperties(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkLayerProperties* pProperties); +VkResult anv_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties); +VkResult gen7_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties); +VkResult gen75_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties); +VkResult gen8_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties); +VkResult gen9_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties); void anv_GetDeviceQueue(VkDevice device, uint32_t queueFamilyIndex, uint32_t queueIndex, VkQueue* pQueue); void gen7_GetDeviceQueue(VkDevice device, uint32_t queueFamilyIndex, uint32_t queueIndex, VkQueue* pQueue); void gen75_GetDeviceQueue(VkDevice device, uint32_t queueFamilyIndex, uint32_t queueIndex, VkQueue* pQueue); @@ -331,26 +388,26 @@ void gen75_GetDeviceMemoryCommitment(VkDevice device, VkDeviceMemory memory, VkDeviceSize* pCommittedMemoryInBytes); void gen8_GetDeviceMemoryCommitment(VkDevice device, VkDeviceMemory memory, VkDeviceSize* pCommittedMemoryInBytes); void gen9_GetDeviceMemoryCommitment(VkDevice device, VkDeviceMemory memory, VkDeviceSize* pCommittedMemoryInBytes); -VkResult anv_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset); -VkResult gen7_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset); -VkResult gen75_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset); -VkResult gen8_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset); -VkResult gen9_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset); -VkResult anv_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset); -VkResult gen7_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset); -VkResult gen75_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset); -VkResult gen8_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset); -VkResult gen9_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset); void anv_GetBufferMemoryRequirements(VkDevice device, VkBuffer buffer, VkMemoryRequirements* pMemoryRequirements); void gen7_GetBufferMemoryRequirements(VkDevice device, VkBuffer buffer, VkMemoryRequirements* pMemoryRequirements); void gen75_GetBufferMemoryRequirements(VkDevice device, VkBuffer buffer, VkMemoryRequirements* pMemoryRequirements); void gen8_GetBufferMemoryRequirements(VkDevice device, VkBuffer buffer, VkMemoryRequirements* pMemoryRequirements); void gen9_GetBufferMemoryRequirements(VkDevice device, VkBuffer buffer, VkMemoryRequirements* pMemoryRequirements); +VkResult anv_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset); +VkResult gen7_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset); +VkResult gen75_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset); +VkResult gen8_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset); +VkResult gen9_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset); void anv_GetImageMemoryRequirements(VkDevice device, VkImage image, VkMemoryRequirements* pMemoryRequirements); void gen7_GetImageMemoryRequirements(VkDevice device, VkImage image, VkMemoryRequirements* pMemoryRequirements); void gen75_GetImageMemoryRequirements(VkDevice device, VkImage image, VkMemoryRequirements* pMemoryRequirements); void gen8_GetImageMemoryRequirements(VkDevice device, VkImage image, VkMemoryRequirements* pMemoryRequirements); void gen9_GetImageMemoryRequirements(VkDevice device, VkImage image, VkMemoryRequirements* pMemoryRequirements); +VkResult anv_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset); +VkResult gen7_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset); +VkResult gen75_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset); +VkResult gen8_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset); +VkResult gen9_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset); void anv_GetImageSparseMemoryRequirements(VkDevice device, VkImage image, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements* pSparseMemoryRequirements); void gen7_GetImageSparseMemoryRequirements(VkDevice device, VkImage image, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements* pSparseMemoryRequirements); void gen75_GetImageSparseMemoryRequirements(VkDevice device, VkImage image, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements* pSparseMemoryRequirements); @@ -776,11 +833,11 @@ void gen75_CmdCopyImageToBuffer(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferImageCopy* pRegions); void gen8_CmdCopyImageToBuffer(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferImageCopy* pRegions); void gen9_CmdCopyImageToBuffer(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferImageCopy* pRegions); -void anv_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const uint32_t* pData); -void gen7_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const uint32_t* pData); -void gen75_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const uint32_t* pData); -void gen8_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const uint32_t* pData); -void gen9_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const uint32_t* pData); +void anv_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const void* pData); +void gen7_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const void* pData); +void gen75_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const void* pData); +void gen8_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const void* pData); +void gen9_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const void* pData); void anv_CmdFillBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize size, uint32_t data); void gen7_CmdFillBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize size, uint32_t data); void gen75_CmdFillBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize size, uint32_t data); @@ -876,6 +933,67 @@ void gen75_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers); void gen8_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers); void gen9_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers); +#ifdef VK_USE_PLATFORM_ANDROID_KHR +VkResult anv_CreateAndroidSurfaceKHR(VkInstance instance, const VkAndroidSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +VkResult gen7_CreateAndroidSurfaceKHR(VkInstance instance, const VkAndroidSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +VkResult gen75_CreateAndroidSurfaceKHR(VkInstance instance, const VkAndroidSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +VkResult gen8_CreateAndroidSurfaceKHR(VkInstance instance, const VkAndroidSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +VkResult gen9_CreateAndroidSurfaceKHR(VkInstance instance, const VkAndroidSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +#endif // VK_USE_PLATFORM_ANDROID_KHR +VkResult anv_GetPhysicalDeviceDisplayPropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPropertiesKHR* pProperties); +VkResult gen7_GetPhysicalDeviceDisplayPropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPropertiesKHR* pProperties); +VkResult gen75_GetPhysicalDeviceDisplayPropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPropertiesKHR* pProperties); +VkResult gen8_GetPhysicalDeviceDisplayPropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPropertiesKHR* pProperties); +VkResult gen9_GetPhysicalDeviceDisplayPropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPropertiesKHR* pProperties); +VkResult anv_GetPhysicalDeviceDisplayPlanePropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPlanePropertiesKHR* pProperties); +VkResult gen7_GetPhysicalDeviceDisplayPlanePropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPlanePropertiesKHR* pProperties); +VkResult gen75_GetPhysicalDeviceDisplayPlanePropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPlanePropertiesKHR* pProperties); +VkResult gen8_GetPhysicalDeviceDisplayPlanePropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPlanePropertiesKHR* pProperties); +VkResult gen9_GetPhysicalDeviceDisplayPlanePropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPlanePropertiesKHR* pProperties); +VkResult anv_GetDisplayPlaneSupportedDisplaysKHR(VkPhysicalDevice physicalDevice, uint32_t planeIndex, uint32_t* pDisplayCount, VkDisplayKHR* pDisplays); +VkResult gen7_GetDisplayPlaneSupportedDisplaysKHR(VkPhysicalDevice physicalDevice, uint32_t planeIndex, uint32_t* pDisplayCount, VkDisplayKHR* pDisplays); +VkResult gen75_GetDisplayPlaneSupportedDisplaysKHR(VkPhysicalDevice physicalDevice, uint32_t planeIndex, uint32_t* pDisplayCount, VkDisplayKHR* pDisplays); +VkResult gen8_GetDisplayPlaneSupportedDisplaysKHR(VkPhysicalDevice physicalDevice, uint32_t planeIndex, uint32_t* pDisplayCount, VkDisplayKHR* pDisplays); +VkResult gen9_GetDisplayPlaneSupportedDisplaysKHR(VkPhysicalDevice physicalDevice, uint32_t planeIndex, uint32_t* pDisplayCount, VkDisplayKHR* pDisplays); +VkResult anv_GetDisplayModePropertiesKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, uint32_t* pPropertyCount, VkDisplayModePropertiesKHR* pProperties); +VkResult gen7_GetDisplayModePropertiesKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, uint32_t* pPropertyCount, VkDisplayModePropertiesKHR* pProperties); +VkResult gen75_GetDisplayModePropertiesKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, uint32_t* pPropertyCount, VkDisplayModePropertiesKHR* pProperties); +VkResult gen8_GetDisplayModePropertiesKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, uint32_t* pPropertyCount, VkDisplayModePropertiesKHR* pProperties); +VkResult gen9_GetDisplayModePropertiesKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, uint32_t* pPropertyCount, VkDisplayModePropertiesKHR* pProperties); +VkResult anv_CreateDisplayModeKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, const VkDisplayModeCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDisplayModeKHR* pMode); +VkResult gen7_CreateDisplayModeKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, const VkDisplayModeCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDisplayModeKHR* pMode); +VkResult gen75_CreateDisplayModeKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, const VkDisplayModeCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDisplayModeKHR* pMode); +VkResult gen8_CreateDisplayModeKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, const VkDisplayModeCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDisplayModeKHR* pMode); +VkResult gen9_CreateDisplayModeKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, const VkDisplayModeCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDisplayModeKHR* pMode); +VkResult anv_GetDisplayPlaneCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkDisplayModeKHR mode, uint32_t planeIndex, VkDisplayPlaneCapabilitiesKHR* pCapabilities); +VkResult gen7_GetDisplayPlaneCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkDisplayModeKHR mode, uint32_t planeIndex, VkDisplayPlaneCapabilitiesKHR* pCapabilities); +VkResult gen75_GetDisplayPlaneCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkDisplayModeKHR mode, uint32_t planeIndex, VkDisplayPlaneCapabilitiesKHR* pCapabilities); +VkResult gen8_GetDisplayPlaneCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkDisplayModeKHR mode, uint32_t planeIndex, VkDisplayPlaneCapabilitiesKHR* pCapabilities); +VkResult gen9_GetDisplayPlaneCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkDisplayModeKHR mode, uint32_t planeIndex, VkDisplayPlaneCapabilitiesKHR* pCapabilities); +VkResult anv_CreateDisplayPlaneSurfaceKHR(VkInstance instance, const VkDisplaySurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +VkResult gen7_CreateDisplayPlaneSurfaceKHR(VkInstance instance, const VkDisplaySurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +VkResult gen75_CreateDisplayPlaneSurfaceKHR(VkInstance instance, const VkDisplaySurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +VkResult gen8_CreateDisplayPlaneSurfaceKHR(VkInstance instance, const VkDisplaySurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +VkResult gen9_CreateDisplayPlaneSurfaceKHR(VkInstance instance, const VkDisplaySurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +VkResult anv_CreateSharedSwapchainsKHR(VkDevice device, uint32_t swapchainCount, const VkSwapchainCreateInfoKHR* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchains); +VkResult gen7_CreateSharedSwapchainsKHR(VkDevice device, uint32_t swapchainCount, const VkSwapchainCreateInfoKHR* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchains); +VkResult gen75_CreateSharedSwapchainsKHR(VkDevice device, uint32_t swapchainCount, const VkSwapchainCreateInfoKHR* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchains); +VkResult gen8_CreateSharedSwapchainsKHR(VkDevice device, uint32_t swapchainCount, const VkSwapchainCreateInfoKHR* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchains); +VkResult gen9_CreateSharedSwapchainsKHR(VkDevice device, uint32_t swapchainCount, const VkSwapchainCreateInfoKHR* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchains); +#ifdef VK_USE_PLATFORM_MIR_KHR +VkResult anv_CreateMirSurfaceKHR(VkInstance instance, const VkMirSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +VkResult gen7_CreateMirSurfaceKHR(VkInstance instance, const VkMirSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +VkResult gen75_CreateMirSurfaceKHR(VkInstance instance, const VkMirSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +VkResult gen8_CreateMirSurfaceKHR(VkInstance instance, const VkMirSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +VkResult gen9_CreateMirSurfaceKHR(VkInstance instance, const VkMirSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +#endif // VK_USE_PLATFORM_MIR_KHR +#ifdef VK_USE_PLATFORM_MIR_KHR +VkBool32 anv_GetPhysicalDeviceMirPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, MirConnection* connection); +VkBool32 gen7_GetPhysicalDeviceMirPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, MirConnection* connection); +VkBool32 gen75_GetPhysicalDeviceMirPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, MirConnection* connection); +VkBool32 gen8_GetPhysicalDeviceMirPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, MirConnection* connection); +VkBool32 gen9_GetPhysicalDeviceMirPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, MirConnection* connection); +#endif // VK_USE_PLATFORM_MIR_KHR void anv_DestroySurfaceKHR(VkInstance instance, VkSurfaceKHR surface, const VkAllocationCallbacks* pAllocator); void gen7_DestroySurfaceKHR(VkInstance instance, VkSurfaceKHR surface, const VkAllocationCallbacks* pAllocator); void gen75_DestroySurfaceKHR(VkInstance instance, VkSurfaceKHR surface, const VkAllocationCallbacks* pAllocator); @@ -926,60 +1044,6 @@ VkResult gen75_QueuePresentKHR(VkQueue queue, const VkPresentInfoKHR* pPresentInfo); VkResult gen8_QueuePresentKHR(VkQueue queue, const VkPresentInfoKHR* pPresentInfo); VkResult gen9_QueuePresentKHR(VkQueue queue, const VkPresentInfoKHR* pPresentInfo); -VkResult anv_GetPhysicalDeviceDisplayPropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPropertiesKHR* pProperties); -VkResult gen7_GetPhysicalDeviceDisplayPropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPropertiesKHR* pProperties); -VkResult gen75_GetPhysicalDeviceDisplayPropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPropertiesKHR* pProperties); -VkResult gen8_GetPhysicalDeviceDisplayPropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPropertiesKHR* pProperties); -VkResult gen9_GetPhysicalDeviceDisplayPropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPropertiesKHR* pProperties); -VkResult anv_GetPhysicalDeviceDisplayPlanePropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPlanePropertiesKHR* pProperties); -VkResult gen7_GetPhysicalDeviceDisplayPlanePropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPlanePropertiesKHR* pProperties); -VkResult gen75_GetPhysicalDeviceDisplayPlanePropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPlanePropertiesKHR* pProperties); -VkResult gen8_GetPhysicalDeviceDisplayPlanePropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPlanePropertiesKHR* pProperties); -VkResult gen9_GetPhysicalDeviceDisplayPlanePropertiesKHR(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkDisplayPlanePropertiesKHR* pProperties); -VkResult anv_GetDisplayPlaneSupportedDisplaysKHR(VkPhysicalDevice physicalDevice, uint32_t planeIndex, uint32_t* pDisplayCount, VkDisplayKHR* pDisplays); -VkResult gen7_GetDisplayPlaneSupportedDisplaysKHR(VkPhysicalDevice physicalDevice, uint32_t planeIndex, uint32_t* pDisplayCount, VkDisplayKHR* pDisplays); -VkResult gen75_GetDisplayPlaneSupportedDisplaysKHR(VkPhysicalDevice physicalDevice, uint32_t planeIndex, uint32_t* pDisplayCount, VkDisplayKHR* pDisplays); -VkResult gen8_GetDisplayPlaneSupportedDisplaysKHR(VkPhysicalDevice physicalDevice, uint32_t planeIndex, uint32_t* pDisplayCount, VkDisplayKHR* pDisplays); -VkResult gen9_GetDisplayPlaneSupportedDisplaysKHR(VkPhysicalDevice physicalDevice, uint32_t planeIndex, uint32_t* pDisplayCount, VkDisplayKHR* pDisplays); -VkResult anv_GetDisplayModePropertiesKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, uint32_t* pPropertyCount, VkDisplayModePropertiesKHR* pProperties); -VkResult gen7_GetDisplayModePropertiesKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, uint32_t* pPropertyCount, VkDisplayModePropertiesKHR* pProperties); -VkResult gen75_GetDisplayModePropertiesKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, uint32_t* pPropertyCount, VkDisplayModePropertiesKHR* pProperties); -VkResult gen8_GetDisplayModePropertiesKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, uint32_t* pPropertyCount, VkDisplayModePropertiesKHR* pProperties); -VkResult gen9_GetDisplayModePropertiesKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, uint32_t* pPropertyCount, VkDisplayModePropertiesKHR* pProperties); -VkResult anv_CreateDisplayModeKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, const VkDisplayModeCreateInfoKHR*pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDisplayModeKHR* pMode); -VkResult gen7_CreateDisplayModeKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, const VkDisplayModeCreateInfoKHR*pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDisplayModeKHR* pMode); -VkResult gen75_CreateDisplayModeKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, const VkDisplayModeCreateInfoKHR*pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDisplayModeKHR* pMode); -VkResult gen8_CreateDisplayModeKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, const VkDisplayModeCreateInfoKHR*pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDisplayModeKHR* pMode); -VkResult gen9_CreateDisplayModeKHR(VkPhysicalDevice physicalDevice, VkDisplayKHR display, const VkDisplayModeCreateInfoKHR*pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDisplayModeKHR* pMode); -VkResult anv_GetDisplayPlaneCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkDisplayModeKHR mode, uint32_t planeIndex, VkDisplayPlaneCapabilitiesKHR* pCapabilities); -VkResult gen7_GetDisplayPlaneCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkDisplayModeKHR mode, uint32_t planeIndex, VkDisplayPlaneCapabilitiesKHR* pCapabilities); -VkResult gen75_GetDisplayPlaneCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkDisplayModeKHR mode, uint32_t planeIndex, VkDisplayPlaneCapabilitiesKHR* pCapabilities); -VkResult gen8_GetDisplayPlaneCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkDisplayModeKHR mode, uint32_t planeIndex, VkDisplayPlaneCapabilitiesKHR* pCapabilities); -VkResult gen9_GetDisplayPlaneCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkDisplayModeKHR mode, uint32_t planeIndex, VkDisplayPlaneCapabilitiesKHR* pCapabilities); -VkResult anv_CreateDisplayPlaneSurfaceKHR(VkInstance instance, const VkDisplaySurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); -VkResult gen7_CreateDisplayPlaneSurfaceKHR(VkInstance instance, const VkDisplaySurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); -VkResult gen75_CreateDisplayPlaneSurfaceKHR(VkInstance instance, const VkDisplaySurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); -VkResult gen8_CreateDisplayPlaneSurfaceKHR(VkInstance instance, const VkDisplaySurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); -VkResult gen9_CreateDisplayPlaneSurfaceKHR(VkInstance instance, const VkDisplaySurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); -VkResult anv_CreateSharedSwapchainsKHR(VkDevice device, uint32_t swapchainCount, const VkSwapchainCreateInfoKHR* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchains); -VkResult gen7_CreateSharedSwapchainsKHR(VkDevice device, uint32_t swapchainCount, const VkSwapchainCreateInfoKHR* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchains); -VkResult gen75_CreateSharedSwapchainsKHR(VkDevice device, uint32_t swapchainCount, const VkSwapchainCreateInfoKHR* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchains); -VkResult gen8_CreateSharedSwapchainsKHR(VkDevice device, uint32_t swapchainCount, const VkSwapchainCreateInfoKHR* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchains); -VkResult gen9_CreateSharedSwapchainsKHR(VkDevice device, uint32_t swapchainCount, const VkSwapchainCreateInfoKHR* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchains); -#ifdef VK_USE_PLATFORM_XCB_KHR -VkResult anv_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); -VkResult gen7_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); -VkResult gen75_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); -VkResult gen8_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); -VkResult gen9_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); -#endif // VK_USE_PLATFORM_XCB_KHR -#ifdef VK_USE_PLATFORM_XCB_KHR -VkBool32 anv_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id); -VkBool32 gen7_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id); -VkBool32 gen75_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id); -VkBool32 gen8_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id); -VkBool32 gen9_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id); -#endif // VK_USE_PLATFORM_XCB_KHR #ifdef VK_USE_PLATFORM_WAYLAND_KHR VkResult anv_CreateWaylandSurfaceKHR(VkInstance instance, const VkWaylandSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); VkResult gen7_CreateWaylandSurfaceKHR(VkInstance instance, const VkWaylandSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); @@ -994,6 +1058,48 @@ VkBool32 gen8_GetPhysicalDeviceWaylandPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, struct wl_display* display); VkBool32 gen9_GetPhysicalDeviceWaylandPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, struct wl_display* display); #endif // VK_USE_PLATFORM_WAYLAND_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR +VkResult anv_CreateWin32SurfaceKHR(VkInstance instance, const VkWin32SurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +VkResult gen7_CreateWin32SurfaceKHR(VkInstance instance, const VkWin32SurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +VkResult gen75_CreateWin32SurfaceKHR(VkInstance instance, const VkWin32SurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +VkResult gen8_CreateWin32SurfaceKHR(VkInstance instance, const VkWin32SurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +VkResult gen9_CreateWin32SurfaceKHR(VkInstance instance, const VkWin32SurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_WIN32_KHR +VkBool32 anv_GetPhysicalDeviceWin32PresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex); +VkBool32 gen7_GetPhysicalDeviceWin32PresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex); +VkBool32 gen75_GetPhysicalDeviceWin32PresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex); +VkBool32 gen8_GetPhysicalDeviceWin32PresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex); +VkBool32 gen9_GetPhysicalDeviceWin32PresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex); +#endif // VK_USE_PLATFORM_WIN32_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR +VkResult anv_CreateXlibSurfaceKHR(VkInstance instance, const VkXlibSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +VkResult gen7_CreateXlibSurfaceKHR(VkInstance instance, const VkXlibSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +VkResult gen75_CreateXlibSurfaceKHR(VkInstance instance, const VkXlibSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +VkResult gen8_CreateXlibSurfaceKHR(VkInstance instance, const VkXlibSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +VkResult gen9_CreateXlibSurfaceKHR(VkInstance instance, const VkXlibSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XLIB_KHR +VkBool32 anv_GetPhysicalDeviceXlibPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, Display* dpy, VisualID visualID); +VkBool32 gen7_GetPhysicalDeviceXlibPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, Display* dpy, VisualID visualID); +VkBool32 gen75_GetPhysicalDeviceXlibPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, Display* dpy, VisualID visualID); +VkBool32 gen8_GetPhysicalDeviceXlibPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, Display* dpy, VisualID visualID); +VkBool32 gen9_GetPhysicalDeviceXlibPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, Display* dpy, VisualID visualID); +#endif // VK_USE_PLATFORM_XLIB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR +VkResult anv_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +VkResult gen7_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +VkResult gen75_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +VkResult gen8_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +VkResult gen9_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface); +#endif // VK_USE_PLATFORM_XCB_KHR +#ifdef VK_USE_PLATFORM_XCB_KHR +VkBool32 anv_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id); +VkBool32 gen7_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id); +VkBool32 gen75_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id); +VkBool32 gen8_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id); +VkBool32 gen9_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id); +#endif // VK_USE_PLATFORM_XCB_KHR VkResult anv_CreateDebugReportCallbackEXT(VkInstance instance, const VkDebugReportCallbackCreateInfoEXT* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDebugReportCallbackEXT* pCallback); VkResult gen7_CreateDebugReportCallbackEXT(VkInstance instance, const VkDebugReportCallbackCreateInfoEXT* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDebugReportCallbackEXT* pCallback); VkResult gen75_CreateDebugReportCallbackEXT(VkInstance instance, const VkDebugReportCallbackCreateInfoEXT* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDebugReportCallbackEXT* pCallback); @@ -1009,8 +1115,100 @@ void gen75_DebugReportMessageEXT(VkInstance instance, VkDebugReportFlagsEXT flags, VkDebugReportObjectTypeEXT objectType, uint64_t object, size_t location, int32_t messageCode, const char* pLayerPrefix, const char* pMessage); void gen8_DebugReportMessageEXT(VkInstance instance, VkDebugReportFlagsEXT flags, VkDebugReportObjectTypeEXT objectType, uint64_t object, size_t location, int32_t messageCode, const char* pLayerPrefix, const char* pMessage); void gen9_DebugReportMessageEXT(VkInstance instance, VkDebugReportFlagsEXT flags, VkDebugReportObjectTypeEXT objectType, uint64_t object, size_t location, int32_t messageCode, const char* pLayerPrefix, const char* pMessage); -VkResult anv_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMem, VkImage* pImage); -VkResult gen7_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMem, VkImage* pImage); -VkResult gen75_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMem, VkImage* pImage); -VkResult gen8_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMem, VkImage* pImage); -VkResult gen9_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMem, VkImage* pImage); +VkResult anv_DebugMarkerSetObjectNameEXT(VkDevice device, VkDebugMarkerObjectNameInfoEXT* pNameInfo); +VkResult gen7_DebugMarkerSetObjectNameEXT(VkDevice device, VkDebugMarkerObjectNameInfoEXT* pNameInfo); +VkResult gen75_DebugMarkerSetObjectNameEXT(VkDevice device, VkDebugMarkerObjectNameInfoEXT* pNameInfo); +VkResult gen8_DebugMarkerSetObjectNameEXT(VkDevice device, VkDebugMarkerObjectNameInfoEXT* pNameInfo); +VkResult gen9_DebugMarkerSetObjectNameEXT(VkDevice device, VkDebugMarkerObjectNameInfoEXT* pNameInfo); +VkResult anv_DebugMarkerSetObjectTagEXT(VkDevice device, VkDebugMarkerObjectTagInfoEXT* pTagInfo); +VkResult gen7_DebugMarkerSetObjectTagEXT(VkDevice device, VkDebugMarkerObjectTagInfoEXT* pTagInfo); +VkResult gen75_DebugMarkerSetObjectTagEXT(VkDevice device, VkDebugMarkerObjectTagInfoEXT* pTagInfo); +VkResult gen8_DebugMarkerSetObjectTagEXT(VkDevice device, VkDebugMarkerObjectTagInfoEXT* pTagInfo); +VkResult gen9_DebugMarkerSetObjectTagEXT(VkDevice device, VkDebugMarkerObjectTagInfoEXT* pTagInfo); +void anv_CmdDebugMarkerBeginEXT(VkCommandBuffer commandBuffer, VkDebugMarkerMarkerInfoEXT* pMarkerInfo); +void gen7_CmdDebugMarkerBeginEXT(VkCommandBuffer commandBuffer, VkDebugMarkerMarkerInfoEXT* pMarkerInfo); +void gen75_CmdDebugMarkerBeginEXT(VkCommandBuffer commandBuffer, VkDebugMarkerMarkerInfoEXT* pMarkerInfo); +void gen8_CmdDebugMarkerBeginEXT(VkCommandBuffer commandBuffer, VkDebugMarkerMarkerInfoEXT* pMarkerInfo); +void gen9_CmdDebugMarkerBeginEXT(VkCommandBuffer commandBuffer, VkDebugMarkerMarkerInfoEXT* pMarkerInfo); +void anv_CmdDebugMarkerEndEXT(VkCommandBuffer commandBuffer); +void gen7_CmdDebugMarkerEndEXT(VkCommandBuffer commandBuffer); +void gen75_CmdDebugMarkerEndEXT(VkCommandBuffer commandBuffer); +void gen8_CmdDebugMarkerEndEXT(VkCommandBuffer commandBuffer); +void gen9_CmdDebugMarkerEndEXT(VkCommandBuffer commandBuffer); +void anv_CmdDebugMarkerInsertEXT(VkCommandBuffer commandBuffer, VkDebugMarkerMarkerInfoEXT* pMarkerInfo); +void gen7_CmdDebugMarkerInsertEXT(VkCommandBuffer commandBuffer, VkDebugMarkerMarkerInfoEXT* pMarkerInfo); +void gen75_CmdDebugMarkerInsertEXT(VkCommandBuffer commandBuffer, VkDebugMarkerMarkerInfoEXT* pMarkerInfo); +void gen8_CmdDebugMarkerInsertEXT(VkCommandBuffer commandBuffer, VkDebugMarkerMarkerInfoEXT* pMarkerInfo); +void gen9_CmdDebugMarkerInsertEXT(VkCommandBuffer commandBuffer, VkDebugMarkerMarkerInfoEXT* pMarkerInfo); +VkResult anv_GetPhysicalDeviceExternalImageFormatPropertiesNV(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkExternalMemoryHandleTypeFlagsNV externalHandleType, VkExternalImageFormatPropertiesNV* pExternalImageFormatProperties); +VkResult gen7_GetPhysicalDeviceExternalImageFormatPropertiesNV(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkExternalMemoryHandleTypeFlagsNV externalHandleType, VkExternalImageFormatPropertiesNV* pExternalImageFormatProperties); +VkResult gen75_GetPhysicalDeviceExternalImageFormatPropertiesNV(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkExternalMemoryHandleTypeFlagsNV externalHandleType, VkExternalImageFormatPropertiesNV* pExternalImageFormatProperties); +VkResult gen8_GetPhysicalDeviceExternalImageFormatPropertiesNV(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkExternalMemoryHandleTypeFlagsNV externalHandleType, VkExternalImageFormatPropertiesNV* pExternalImageFormatProperties); +VkResult gen9_GetPhysicalDeviceExternalImageFormatPropertiesNV(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkExternalMemoryHandleTypeFlagsNV externalHandleType, VkExternalImageFormatPropertiesNV* pExternalImageFormatProperties); +#ifdef VK_USE_PLATFORM_WIN32_KHR +VkResult anv_GetMemoryWin32HandleNV(VkDevice device, VkDeviceMemory memory, VkExternalMemoryHandleTypeFlagsNV handleType, HANDLE* pHandle); +VkResult gen7_GetMemoryWin32HandleNV(VkDevice device, VkDeviceMemory memory, VkExternalMemoryHandleTypeFlagsNV handleType, HANDLE* pHandle); +VkResult gen75_GetMemoryWin32HandleNV(VkDevice device, VkDeviceMemory memory, VkExternalMemoryHandleTypeFlagsNV handleType, HANDLE* pHandle); +VkResult gen8_GetMemoryWin32HandleNV(VkDevice device, VkDeviceMemory memory, VkExternalMemoryHandleTypeFlagsNV handleType, HANDLE* pHandle); +VkResult gen9_GetMemoryWin32HandleNV(VkDevice device, VkDeviceMemory memory, VkExternalMemoryHandleTypeFlagsNV handleType, HANDLE* pHandle); +#endif // VK_USE_PLATFORM_WIN32_KHR +void anv_CmdDrawIndirectCountAMD(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkBuffer countBuffer, VkDeviceSize countBufferOffset, uint32_t maxDrawCount, uint32_t stride); +void gen7_CmdDrawIndirectCountAMD(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkBuffer countBuffer, VkDeviceSize countBufferOffset, uint32_t maxDrawCount, uint32_t stride); +void gen75_CmdDrawIndirectCountAMD(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkBuffer countBuffer, VkDeviceSize countBufferOffset, uint32_t maxDrawCount, uint32_t stride); +void gen8_CmdDrawIndirectCountAMD(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkBuffer countBuffer, VkDeviceSize countBufferOffset, uint32_t maxDrawCount, uint32_t stride); +void gen9_CmdDrawIndirectCountAMD(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkBuffer countBuffer, VkDeviceSize countBufferOffset, uint32_t maxDrawCount, uint32_t stride); +void anv_CmdDrawIndexedIndirectCountAMD(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkBuffer countBuffer, VkDeviceSize countBufferOffset, uint32_t maxDrawCount, uint32_t stride); +void gen7_CmdDrawIndexedIndirectCountAMD(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkBuffer countBuffer, VkDeviceSize countBufferOffset, uint32_t maxDrawCount, uint32_t stride); +void gen75_CmdDrawIndexedIndirectCountAMD(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkBuffer countBuffer, VkDeviceSize countBufferOffset, uint32_t maxDrawCount, uint32_t stride); +void gen8_CmdDrawIndexedIndirectCountAMD(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkBuffer countBuffer, VkDeviceSize countBufferOffset, uint32_t maxDrawCount, uint32_t stride); +void gen9_CmdDrawIndexedIndirectCountAMD(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkBuffer countBuffer, VkDeviceSize countBufferOffset, uint32_t maxDrawCount, uint32_t stride); +void anv_CmdProcessCommandsNVX(VkCommandBuffer commandBuffer, const VkCmdProcessCommandsInfoNVX* pProcessCommandsInfo); +void gen7_CmdProcessCommandsNVX(VkCommandBuffer commandBuffer, const VkCmdProcessCommandsInfoNVX* pProcessCommandsInfo); +void gen75_CmdProcessCommandsNVX(VkCommandBuffer commandBuffer, const VkCmdProcessCommandsInfoNVX* pProcessCommandsInfo); +void gen8_CmdProcessCommandsNVX(VkCommandBuffer commandBuffer, const VkCmdProcessCommandsInfoNVX* pProcessCommandsInfo); +void gen9_CmdProcessCommandsNVX(VkCommandBuffer commandBuffer, const VkCmdProcessCommandsInfoNVX* pProcessCommandsInfo); +void anv_CmdReserveSpaceForCommandsNVX(VkCommandBuffer commandBuffer, const VkCmdReserveSpaceForCommandsInfoNVX* pReserveSpaceInfo); +void gen7_CmdReserveSpaceForCommandsNVX(VkCommandBuffer commandBuffer, const VkCmdReserveSpaceForCommandsInfoNVX* pReserveSpaceInfo); +void gen75_CmdReserveSpaceForCommandsNVX(VkCommandBuffer commandBuffer, const VkCmdReserveSpaceForCommandsInfoNVX* pReserveSpaceInfo); +void gen8_CmdReserveSpaceForCommandsNVX(VkCommandBuffer commandBuffer, const VkCmdReserveSpaceForCommandsInfoNVX* pReserveSpaceInfo); +void gen9_CmdReserveSpaceForCommandsNVX(VkCommandBuffer commandBuffer, const VkCmdReserveSpaceForCommandsInfoNVX* pReserveSpaceInfo); +VkResult anv_CreateIndirectCommandsLayoutNVX(VkDevice device, const VkIndirectCommandsLayoutCreateInfoNVX* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkIndirectCommandsLayoutNVX* pIndirectCommandsLayout); +VkResult gen7_CreateIndirectCommandsLayoutNVX(VkDevice device, const VkIndirectCommandsLayoutCreateInfoNVX* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkIndirectCommandsLayoutNVX* pIndirectCommandsLayout); +VkResult gen75_CreateIndirectCommandsLayoutNVX(VkDevice device, const VkIndirectCommandsLayoutCreateInfoNVX* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkIndirectCommandsLayoutNVX* pIndirectCommandsLayout); +VkResult gen8_CreateIndirectCommandsLayoutNVX(VkDevice device, const VkIndirectCommandsLayoutCreateInfoNVX* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkIndirectCommandsLayoutNVX* pIndirectCommandsLayout); +VkResult gen9_CreateIndirectCommandsLayoutNVX(VkDevice device, const VkIndirectCommandsLayoutCreateInfoNVX* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkIndirectCommandsLayoutNVX* pIndirectCommandsLayout); +void anv_DestroyIndirectCommandsLayoutNVX(VkDevice device, VkIndirectCommandsLayoutNVX indirectCommandsLayout, const VkAllocationCallbacks* pAllocator); +void gen7_DestroyIndirectCommandsLayoutNVX(VkDevice device, VkIndirectCommandsLayoutNVX indirectCommandsLayout, const VkAllocationCallbacks* pAllocator); +void gen75_DestroyIndirectCommandsLayoutNVX(VkDevice device, VkIndirectCommandsLayoutNVX indirectCommandsLayout, const VkAllocationCallbacks* pAllocator); +void gen8_DestroyIndirectCommandsLayoutNVX(VkDevice device, VkIndirectCommandsLayoutNVX indirectCommandsLayout, const VkAllocationCallbacks* pAllocator); +void gen9_DestroyIndirectCommandsLayoutNVX(VkDevice device, VkIndirectCommandsLayoutNVX indirectCommandsLayout, const VkAllocationCallbacks* pAllocator); +VkResult anv_CreateObjectTableNVX(VkDevice device, const VkObjectTableCreateInfoNVX* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkObjectTableNVX* pObjectTable); +VkResult gen7_CreateObjectTableNVX(VkDevice device, const VkObjectTableCreateInfoNVX* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkObjectTableNVX* pObjectTable); +VkResult gen75_CreateObjectTableNVX(VkDevice device, const VkObjectTableCreateInfoNVX* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkObjectTableNVX* pObjectTable); +VkResult gen8_CreateObjectTableNVX(VkDevice device, const VkObjectTableCreateInfoNVX* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkObjectTableNVX* pObjectTable); +VkResult gen9_CreateObjectTableNVX(VkDevice device, const VkObjectTableCreateInfoNVX* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkObjectTableNVX* pObjectTable); +void anv_DestroyObjectTableNVX(VkDevice device, VkObjectTableNVX objectTable, const VkAllocationCallbacks* pAllocator); +void gen7_DestroyObjectTableNVX(VkDevice device, VkObjectTableNVX objectTable, const VkAllocationCallbacks* pAllocator); +void gen75_DestroyObjectTableNVX(VkDevice device, VkObjectTableNVX objectTable, const VkAllocationCallbacks* pAllocator); +void gen8_DestroyObjectTableNVX(VkDevice device, VkObjectTableNVX objectTable, const VkAllocationCallbacks* pAllocator); +void gen9_DestroyObjectTableNVX(VkDevice device, VkObjectTableNVX objectTable, const VkAllocationCallbacks* pAllocator); +VkResult anv_RegisterObjectsNVX(VkDevice device, VkObjectTableNVX objectTable, uint32_t objectCount, const VkObjectTableEntryNVX* const* ppObjectTableEntries, const uint32_t* pObjectIndices); +VkResult gen7_RegisterObjectsNVX(VkDevice device, VkObjectTableNVX objectTable, uint32_t objectCount, const VkObjectTableEntryNVX* const* ppObjectTableEntries, const uint32_t* pObjectIndices); +VkResult gen75_RegisterObjectsNVX(VkDevice device, VkObjectTableNVX objectTable, uint32_t objectCount, const VkObjectTableEntryNVX* const* ppObjectTableEntries, const uint32_t* pObjectIndices); +VkResult gen8_RegisterObjectsNVX(VkDevice device, VkObjectTableNVX objectTable, uint32_t objectCount, const VkObjectTableEntryNVX* const* ppObjectTableEntries, const uint32_t* pObjectIndices); +VkResult gen9_RegisterObjectsNVX(VkDevice device, VkObjectTableNVX objectTable, uint32_t objectCount, const VkObjectTableEntryNVX* const* ppObjectTableEntries, const uint32_t* pObjectIndices); +VkResult anv_UnregisterObjectsNVX(VkDevice device, VkObjectTableNVX objectTable, uint32_t objectCount, const VkObjectEntryTypeNVX* pObjectEntryTypes, const uint32_t* pObjectIndices); +VkResult gen7_UnregisterObjectsNVX(VkDevice device, VkObjectTableNVX objectTable, uint32_t objectCount, const VkObjectEntryTypeNVX* pObjectEntryTypes, const uint32_t* pObjectIndices); +VkResult gen75_UnregisterObjectsNVX(VkDevice device, VkObjectTableNVX objectTable, uint32_t objectCount, const VkObjectEntryTypeNVX* pObjectEntryTypes, const uint32_t* pObjectIndices); +VkResult gen8_UnregisterObjectsNVX(VkDevice device, VkObjectTableNVX objectTable, uint32_t objectCount, const VkObjectEntryTypeNVX* pObjectEntryTypes, const uint32_t* pObjectIndices); +VkResult gen9_UnregisterObjectsNVX(VkDevice device, VkObjectTableNVX objectTable, uint32_t objectCount, const VkObjectEntryTypeNVX* pObjectEntryTypes, const uint32_t* pObjectIndices); +void anv_GetPhysicalDeviceGeneratedCommandsPropertiesNVX(VkPhysicalDevice physicalDevice, VkDeviceGeneratedCommandsFeaturesNVX* pFeatures, VkDeviceGeneratedCommandsLimitsNVX* pLimits); +void gen7_GetPhysicalDeviceGeneratedCommandsPropertiesNVX(VkPhysicalDevice physicalDevice, VkDeviceGeneratedCommandsFeaturesNVX* pFeatures, VkDeviceGeneratedCommandsLimitsNVX* pLimits); +void gen75_GetPhysicalDeviceGeneratedCommandsPropertiesNVX(VkPhysicalDevice physicalDevice, VkDeviceGeneratedCommandsFeaturesNVX* pFeatures, VkDeviceGeneratedCommandsLimitsNVX* pLimits); +void gen8_GetPhysicalDeviceGeneratedCommandsPropertiesNVX(VkPhysicalDevice physicalDevice, VkDeviceGeneratedCommandsFeaturesNVX* pFeatures, VkDeviceGeneratedCommandsLimitsNVX* pLimits); +void gen9_GetPhysicalDeviceGeneratedCommandsPropertiesNVX(VkPhysicalDevice physicalDevice, VkDeviceGeneratedCommandsFeaturesNVX* pFeatures, VkDeviceGeneratedCommandsLimitsNVX* pLimits); +VkResult anv_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator,VkDeviceMemory* pMem,VkImage* pImage); +VkResult gen7_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator,VkDeviceMemory* pMem,VkImage* pImage); +VkResult gen75_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator,VkDeviceMemory* pMem,VkImage* pImage); +VkResult gen8_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator,VkDeviceMemory* pMem,VkImage* pImage); +VkResult gen9_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator,VkDeviceMemory* pMem,VkImage* pImage); diff -Nru mesa-12.0.6/src/intel/vulkan/anv_formats.c mesa-17.0.7/src/intel/vulkan/anv_formats.c --- mesa-12.0.6/src/intel/vulkan/anv_formats.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_formats.c 2017-06-01 10:37:10.000000000 +0000 @@ -24,16 +24,24 @@ #include "anv_private.h" #include "vk_format_info.h" -#define ISL_SWIZZLE(r, g, b, a) { \ - ISL_CHANNEL_SELECT_##r, \ - ISL_CHANNEL_SELECT_##g, \ - ISL_CHANNEL_SELECT_##b, \ - ISL_CHANNEL_SELECT_##a, \ +/* + * gcc-4 and earlier don't allow compound literals where a constant + * is required in -std=c99/gnu99 mode, so we can't use ISL_SWIZZLE() + * here. -std=c89/gnu89 would allow it, but we depend on c99 features + * so using -std=c89/gnu89 is not an option. Starting from gcc-5 + * compound literals can also be considered constant in -std=c99/gnu99 + * mode. + */ +#define _ISL_SWIZZLE(r, g, b, a) { \ + ISL_CHANNEL_SELECT_##r, \ + ISL_CHANNEL_SELECT_##g, \ + ISL_CHANNEL_SELECT_##b, \ + ISL_CHANNEL_SELECT_##a, \ } -#define RGBA ISL_SWIZZLE(RED, GREEN, BLUE, ALPHA) -#define BGRA ISL_SWIZZLE(BLUE, GREEN, RED, ALPHA) -#define RGB1 ISL_SWIZZLE(RED, GREEN, BLUE, ONE) +#define RGBA _ISL_SWIZZLE(RED, GREEN, BLUE, ALPHA) +#define BGRA _ISL_SWIZZLE(BLUE, GREEN, RED, ALPHA) +#define RGB1 _ISL_SWIZZLE(RED, GREEN, BLUE, ONE) #define swiz_fmt(__vk_fmt, __hw_fmt, __swizzle) \ [__vk_fmt] = { \ @@ -79,7 +87,7 @@ fmt(VK_FORMAT_R8G8B8_SSCALED, ISL_FORMAT_R8G8B8_SSCALED), fmt(VK_FORMAT_R8G8B8_UINT, ISL_FORMAT_R8G8B8_UINT), fmt(VK_FORMAT_R8G8B8_SINT, ISL_FORMAT_R8G8B8_SINT), - fmt(VK_FORMAT_R8G8B8_SRGB, ISL_FORMAT_UNSUPPORTED), /* B8G8R8A8_UNORM_SRGB */ + fmt(VK_FORMAT_R8G8B8_SRGB, ISL_FORMAT_R8G8B8_UNORM_SRGB), fmt(VK_FORMAT_R8G8B8A8_UNORM, ISL_FORMAT_R8G8B8A8_UNORM), fmt(VK_FORMAT_R8G8B8A8_SNORM, ISL_FORMAT_R8G8B8A8_SNORM), fmt(VK_FORMAT_R8G8B8A8_USCALED, ISL_FORMAT_R8G8B8A8_USCALED), @@ -148,16 +156,16 @@ fmt(VK_FORMAT_R32G32B32A32_SFLOAT, ISL_FORMAT_R32G32B32A32_FLOAT), fmt(VK_FORMAT_R64_UINT, ISL_FORMAT_R64_PASSTHRU), fmt(VK_FORMAT_R64_SINT, ISL_FORMAT_R64_PASSTHRU), - fmt(VK_FORMAT_R64_SFLOAT, ISL_FORMAT_R64_FLOAT), + fmt(VK_FORMAT_R64_SFLOAT, ISL_FORMAT_R64_PASSTHRU), fmt(VK_FORMAT_R64G64_UINT, ISL_FORMAT_R64G64_PASSTHRU), fmt(VK_FORMAT_R64G64_SINT, ISL_FORMAT_R64G64_PASSTHRU), - fmt(VK_FORMAT_R64G64_SFLOAT, ISL_FORMAT_R64G64_FLOAT), + fmt(VK_FORMAT_R64G64_SFLOAT, ISL_FORMAT_R64G64_PASSTHRU), fmt(VK_FORMAT_R64G64B64_UINT, ISL_FORMAT_R64G64B64_PASSTHRU), fmt(VK_FORMAT_R64G64B64_SINT, ISL_FORMAT_R64G64B64_PASSTHRU), - fmt(VK_FORMAT_R64G64B64_SFLOAT, ISL_FORMAT_R64G64B64_FLOAT), + fmt(VK_FORMAT_R64G64B64_SFLOAT, ISL_FORMAT_R64G64B64_PASSTHRU), fmt(VK_FORMAT_R64G64B64A64_UINT, ISL_FORMAT_R64G64B64A64_PASSTHRU), fmt(VK_FORMAT_R64G64B64A64_SINT, ISL_FORMAT_R64G64B64A64_PASSTHRU), - fmt(VK_FORMAT_R64G64B64A64_SFLOAT, ISL_FORMAT_R64G64B64A64_FLOAT), + fmt(VK_FORMAT_R64G64B64A64_SFLOAT, ISL_FORMAT_R64G64B64A64_PASSTHRU), fmt(VK_FORMAT_B10G11R11_UFLOAT_PACK32, ISL_FORMAT_R11G11B10_FLOAT), fmt(VK_FORMAT_E5B9G9R9_UFLOAT_PACK32, ISL_FORMAT_R9G9B9E5_SHAREDEXP), @@ -169,8 +177,8 @@ fmt(VK_FORMAT_D24_UNORM_S8_UINT, ISL_FORMAT_R24_UNORM_X8_TYPELESS), fmt(VK_FORMAT_D32_SFLOAT_S8_UINT, ISL_FORMAT_R32_FLOAT), - fmt(VK_FORMAT_BC1_RGB_UNORM_BLOCK, ISL_FORMAT_DXT1_RGB), - fmt(VK_FORMAT_BC1_RGB_SRGB_BLOCK, ISL_FORMAT_DXT1_RGB_SRGB), + swiz_fmt(VK_FORMAT_BC1_RGB_UNORM_BLOCK, ISL_FORMAT_BC1_UNORM, RGB1), + swiz_fmt(VK_FORMAT_BC1_RGB_SRGB_BLOCK, ISL_FORMAT_BC1_UNORM_SRGB, RGB1), fmt(VK_FORMAT_BC1_RGBA_UNORM_BLOCK, ISL_FORMAT_BC1_UNORM), fmt(VK_FORMAT_BC1_RGBA_SRGB_BLOCK, ISL_FORMAT_BC1_UNORM_SRGB), fmt(VK_FORMAT_BC2_UNORM_BLOCK, ISL_FORMAT_BC2_UNORM), @@ -245,7 +253,7 @@ * Exactly one bit must be set in \a aspect. */ struct anv_format -anv_get_format(const struct brw_device_info *devinfo, VkFormat vk_format, +anv_get_format(const struct gen_device_info *devinfo, VkFormat vk_format, VkImageAspectFlags aspect, VkImageTiling tiling) { struct anv_format format = anv_formats[vk_format]; @@ -271,25 +279,26 @@ isl_format_get_layout(format.isl_format); if (tiling == VK_IMAGE_TILING_OPTIMAL && - !util_is_power_of_two(isl_layout->bs)) { + !util_is_power_of_two(isl_layout->bpb)) { /* Tiled formats *must* be power-of-two because we need up upload * them with the render pipeline. For 3-channel formats, we fix * this by switching them over to RGBX or RGBA formats under the * hood. */ enum isl_format rgbx = isl_format_rgb_to_rgbx(format.isl_format); - if (rgbx != ISL_FORMAT_UNSUPPORTED) { + if (rgbx != ISL_FORMAT_UNSUPPORTED && + isl_format_supports_rendering(devinfo, rgbx)) { format.isl_format = rgbx; } else { format.isl_format = isl_format_rgb_to_rgba(format.isl_format); - format.swizzle = (struct anv_format_swizzle) RGB1; + format.swizzle = ISL_SWIZZLE(RED, GREEN, BLUE, ONE); } } - /* The B4G4R4A4 format isn't available prior to Sky Lake so we have to fall + /* The B4G4R4A4 format isn't available prior to Broadwell so we have to fall * back to a format with a more complex swizzle. */ - if (vk_format == VK_FORMAT_B4G4R4A4_UNORM_PACK16 && devinfo->gen < 9) { + if (vk_format == VK_FORMAT_B4G4R4A4_UNORM_PACK16 && devinfo->gen < 8) { return (struct anv_format) { .isl_format = ISL_FORMAT_B4G4R4A4_UNORM, .swizzle = ISL_SWIZZLE(GREEN, RED, ALPHA, BLUE), @@ -302,7 +311,7 @@ // Format capabilities static VkFormatFeatureFlags -get_image_format_properties(const struct brw_device_info *devinfo, +get_image_format_properties(const struct gen_device_info *devinfo, enum isl_format base, struct anv_format format) { if (format.isl_format == ISL_FORMAT_UNSUPPORTED) @@ -343,7 +352,7 @@ } static VkFormatFeatureFlags -get_buffer_format_properties(const struct brw_device_info *devinfo, +get_buffer_format_properties(const struct gen_device_info *devinfo, enum isl_format format) { if (format == ISL_FORMAT_UNSUPPORTED) @@ -371,8 +380,8 @@ VkFormat format, VkFormatProperties *out_properties) { - int gen = physical_device->info->gen * 10; - if (physical_device->info->is_haswell) + int gen = physical_device->info.gen * 10; + if (physical_device->info.is_haswell) gen += 5; VkFormatFeatureFlags linear = 0, tiled = 0, buffer = 0; @@ -380,25 +389,25 @@ /* Nothing to do here */ } else if (vk_format_is_depth_or_stencil(format)) { tiled |= VK_FORMAT_FEATURE_DEPTH_STENCIL_ATTACHMENT_BIT; - if (physical_device->info->gen >= 8) + if (physical_device->info.gen >= 8) tiled |= VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT; tiled |= VK_FORMAT_FEATURE_BLIT_SRC_BIT | VK_FORMAT_FEATURE_BLIT_DST_BIT; } else { struct anv_format linear_fmt, tiled_fmt; - linear_fmt = anv_get_format(physical_device->info, format, + linear_fmt = anv_get_format(&physical_device->info, format, VK_IMAGE_ASPECT_COLOR_BIT, VK_IMAGE_TILING_LINEAR); - tiled_fmt = anv_get_format(physical_device->info, format, + tiled_fmt = anv_get_format(&physical_device->info, format, VK_IMAGE_ASPECT_COLOR_BIT, VK_IMAGE_TILING_OPTIMAL); - linear = get_image_format_properties(physical_device->info, + linear = get_image_format_properties(&physical_device->info, linear_fmt.isl_format, linear_fmt); - tiled = get_image_format_properties(physical_device->info, + tiled = get_image_format_properties(&physical_device->info, linear_fmt.isl_format, tiled_fmt); - buffer = get_buffer_format_properties(physical_device->info, + buffer = get_buffer_format_properties(&physical_device->info, linear_fmt.isl_format); /* XXX: We handle 3-channel formats by switching them out for RGBX or @@ -409,11 +418,15 @@ * what most clients will want. */ if (linear_fmt.isl_format != ISL_FORMAT_UNSUPPORTED && - !util_is_power_of_two(isl_format_layouts[linear_fmt.isl_format].bs) && + !util_is_power_of_two(isl_format_layouts[linear_fmt.isl_format].bpb) && isl_format_rgb_to_rgbx(linear_fmt.isl_format) == ISL_FORMAT_UNSUPPORTED) { tiled &= ~VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BIT & ~VK_FORMAT_FEATURE_BLIT_DST_BIT; } + + /* ASTC textures must be in Y-tiled memory */ + if (isl_format_get_layout(linear_fmt.isl_format)->txc == ISL_TXC_ASTC) + linear = 0; } out_properties->linearTilingFeatures = linear; @@ -454,6 +467,9 @@ uint32_t maxArraySize; VkSampleCountFlags sampleCounts = VK_SAMPLE_COUNT_1_BIT; + if (anv_formats[format].isl_format == ISL_FORMAT_UNSUPPORTED) + goto unsupported; + anv_physical_device_get_format_properties(physical_device, format, &format_props); @@ -498,6 +514,17 @@ break; } + /* Our hardware doesn't support 1D compressed textures. + * From the SKL PRM, RENDER_SURFACE_STATE::SurfaceFormat: + * * This field cannot be a compressed (BC*, DXT*, FXT*, ETC*, EAC*) format + * if the Surface Type is SURFTYPE_1D. + * * This field cannot be ASTC format if the Surface Type is SURFTYPE_1D. + */ + if (type == VK_IMAGE_TYPE_1D && + isl_format_is_compressed(anv_formats[format].isl_format)) { + goto unsupported; + } + if (tiling == VK_IMAGE_TILING_OPTIMAL && type == VK_IMAGE_TYPE_2D && (format_feature_flags & (VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BIT | @@ -507,25 +534,15 @@ sampleCounts = isl_device_get_sample_counts(&physical_device->isl_dev); } - if (usage & VK_IMAGE_USAGE_TRANSFER_SRC_BIT) { - /* Meta implements transfers by sampling from the source image. */ - if (!(format_feature_flags & VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT)) { - goto unsupported; - } - } - -#if 0 - if (usage & VK_IMAGE_USAGE_TRANSFER_DST_BIT) { - if (anv_format_for_vk_format(format)->has_stencil) { - /* Not yet implemented because copying to a W-tiled surface is crazy - * hard. - */ - anv_finishme("support VK_IMAGE_USAGE_TRANSFER_DST_BIT for " - "stencil format"); + if (usage & (VK_IMAGE_USAGE_TRANSFER_SRC_BIT | + VK_IMAGE_USAGE_TRANSFER_DST_BIT)) { + /* Accept transfers on anything we can sample from or renderer to. */ + if (!(format_feature_flags & (VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BIT | + VK_FORMAT_FEATURE_DEPTH_STENCIL_ATTACHMENT_BIT | + VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT))) { goto unsupported; } } -#endif if (usage & VK_IMAGE_USAGE_SAMPLED_BIT) { if (!(format_feature_flags & VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT)) { diff -Nru mesa-12.0.6/src/intel/vulkan/anv_genX.h mesa-17.0.7/src/intel/vulkan/anv_genX.h --- mesa-12.0.6/src/intel/vulkan/anv_genX.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_genX.h 2017-06-01 10:37:10.000000000 +0000 @@ -22,49 +22,49 @@ */ /* + * NOTE: The header can be included multiple times, from the same file. + */ + +/* * Gen-specific function declarations. This header must *not* be included - * directly. Instead, it is included multiple times by gen8_private.h. + * directly. Instead, it is included multiple times by anv_private.h. * * In this header file, the usual genx() macro is available. */ +#ifndef ANV_PRIVATE_H +#error This file is included by means other than anv_private.h +#endif + VkResult genX(init_device_state)(struct anv_device *device); void genX(cmd_buffer_emit_state_base_address)(struct anv_cmd_buffer *cmd_buffer); -struct anv_state -genX(cmd_buffer_alloc_null_surface_state)(struct anv_cmd_buffer *cmd_buffer, - struct anv_framebuffer *fb); - -void genX(cmd_buffer_set_subpass)(struct anv_cmd_buffer *cmd_buffer, - struct anv_subpass *subpass); - void genX(cmd_buffer_apply_pipe_flushes)(struct anv_cmd_buffer *cmd_buffer); +void genX(cmd_buffer_emit_gen7_depth_flush)(struct anv_cmd_buffer *cmd_buffer); + void genX(flush_pipeline_select_3d)(struct anv_cmd_buffer *cmd_buffer); void genX(flush_pipeline_select_gpgpu)(struct anv_cmd_buffer *cmd_buffer); -void genX(setup_pipeline_l3_config)(struct anv_pipeline *pipeline); - void genX(cmd_buffer_config_l3)(struct anv_cmd_buffer *cmd_buffer, - const struct anv_pipeline *pipeline); + const struct gen_l3_config *cfg); void genX(cmd_buffer_flush_state)(struct anv_cmd_buffer *cmd_buffer); void genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer); void genX(cmd_buffer_flush_compute_state)(struct anv_cmd_buffer *cmd_buffer); -VkResult -genX(graphics_pipeline_create)(VkDevice _device, - struct anv_pipeline_cache *cache, - const VkGraphicsPipelineCreateInfo *pCreateInfo, - const struct anv_graphics_pipeline_create_info *extra, - const VkAllocationCallbacks *alloc, - VkPipeline *pPipeline); - -VkResult -genX(compute_pipeline_create)(VkDevice _device, - struct anv_pipeline_cache *cache, - const VkComputePipelineCreateInfo *pCreateInfo, - const VkAllocationCallbacks *alloc, - VkPipeline *pPipeline); +void +genX(emit_urb_setup)(struct anv_device *device, struct anv_batch *batch, + const struct gen_l3_config *l3_config, + VkShaderStageFlags active_stages, + const unsigned entry_size[4]); + +void genX(cmd_buffer_gpu_memcpy)(struct anv_cmd_buffer *cmd_buffer, + struct anv_bo *dst, uint32_t dst_offset, + struct anv_bo *src, uint32_t src_offset, + uint32_t size); + +void genX(blorp_exec)(struct blorp_batch *batch, + const struct blorp_params *params); diff -Nru mesa-12.0.6/src/intel/vulkan/anv_image.c mesa-17.0.7/src/intel/vulkan/anv_image.c --- mesa-12.0.6/src/intel/vulkan/anv_image.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_image.c 2017-06-01 10:37:10.000000000 +0000 @@ -26,8 +26,10 @@ #include #include #include +#include #include "anv_private.h" +#include "util/debug.h" #include "vk_format_info.h" @@ -40,9 +42,6 @@ { isl_surf_usage_flags_t isl_usage = 0; - /* FINISHME: Support aux surfaces */ - isl_usage |= ISL_SURF_USAGE_DISABLE_AUX_BIT; - if (vk_usage & VK_IMAGE_USAGE_SAMPLED_BIT) isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT; @@ -55,26 +54,33 @@ if (vk_usage & VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT) isl_usage |= ISL_SURF_USAGE_CUBE_BIT; - if (vk_usage & VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT) { - switch (aspect) { - default: - unreachable("bad VkImageAspect"); - case VK_IMAGE_ASPECT_DEPTH_BIT: - isl_usage |= ISL_SURF_USAGE_DEPTH_BIT; - break; - case VK_IMAGE_ASPECT_STENCIL_BIT: - isl_usage |= ISL_SURF_USAGE_STENCIL_BIT; - break; - } + /* Even if we're only using it for transfer operations, clears to depth and + * stencil images happen as depth and stencil so they need the right ISL + * usage bits or else things will fall apart. + */ + switch (aspect) { + case VK_IMAGE_ASPECT_DEPTH_BIT: + isl_usage |= ISL_SURF_USAGE_DEPTH_BIT; + break; + case VK_IMAGE_ASPECT_STENCIL_BIT: + isl_usage |= ISL_SURF_USAGE_STENCIL_BIT; + break; + case VK_IMAGE_ASPECT_COLOR_BIT: + break; + default: + unreachable("bad VkImageAspect"); } if (vk_usage & VK_IMAGE_USAGE_TRANSFER_SRC_BIT) { - /* Meta implements transfers by sampling from the source image. */ + /* blorp implements transfers by sampling from the source image. */ isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT; } - if (vk_usage & VK_IMAGE_USAGE_TRANSFER_DST_BIT) { - /* Meta implements transfers by rendering into the destination image. */ + if (vk_usage & VK_IMAGE_USAGE_TRANSFER_DST_BIT && + aspect == VK_IMAGE_ASPECT_COLOR_BIT) { + /* blorp implements transfers by rendering into the destination image. + * Only request this with color images, as we deal with depth/stencil + * formats differently. */ isl_usage |= ISL_SURF_USAGE_RENDER_TARGET_BIT; } @@ -99,6 +105,16 @@ } } +static void +add_surface(struct anv_image *image, struct anv_surface *surf) +{ + assert(surf->isl.size > 0); /* isl surface must be initialized */ + + surf->offset = align_u32(image->size, surf->isl.alignment); + image->size = surf->offset + surf->isl.size; + image->alignment = MAX2(image->alignment, surf->isl.alignment); +} + /** * Initialize the anv_image::*_surface selected by \a aspect. Then update the * image's memory requirements (that is, the image's size and alignment). @@ -120,9 +136,17 @@ [VK_IMAGE_TYPE_3D] = ISL_SURF_DIM_3D, }; - isl_tiling_flags_t tiling_flags = anv_info->isl_tiling_flags; - if (vk_info->tiling == VK_IMAGE_TILING_LINEAR) - tiling_flags = ISL_TILING_LINEAR_BIT; + /* Translate the Vulkan tiling to an equivalent ISL tiling, then filter the + * result with an optionally provided ISL tiling argument. + */ + isl_tiling_flags_t tiling_flags = + (vk_info->tiling == VK_IMAGE_TILING_LINEAR) ? + ISL_TILING_LINEAR_BIT : ISL_TILING_ANY_MASK; + + if (anv_info->isl_tiling_flags) + tiling_flags &= anv_info->isl_tiling_flags; + + assert(tiling_flags); struct anv_surface *anv_surf = get_surface(image, aspect); @@ -152,52 +176,83 @@ */ assert(ok); - anv_surf->offset = align_u32(image->size, anv_surf->isl.alignment); - image->size = anv_surf->offset + anv_surf->isl.size; - image->alignment = MAX(image->alignment, anv_surf->isl.alignment); - - return VK_SUCCESS; -} - -/** - * Parameter @a format is required and overrides VkImageCreateInfo::format. - */ -static VkImageUsageFlags -anv_image_get_full_usage(const VkImageCreateInfo *info, - VkImageAspectFlags aspects) -{ - VkImageUsageFlags usage = info->usage; + add_surface(image, anv_surf); - if (info->samples > 1 && - (usage & VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT)) { - /* Meta will resolve the image by binding it as a texture. */ - usage |= VK_IMAGE_USAGE_SAMPLED_BIT; - } - - if (usage & VK_IMAGE_USAGE_TRANSFER_SRC_BIT) { - /* Meta will transfer from the image by binding it as a texture. */ - usage |= VK_IMAGE_USAGE_SAMPLED_BIT; - } - - if (usage & VK_IMAGE_USAGE_TRANSFER_DST_BIT) { - /* For non-clear transfer operations, meta will transfer to the image by - * binding it as a color attachment, even if the image format is not - * a color format. + /* Add a HiZ surface to a depth buffer that will be used for rendering. + */ + if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) { + /* We don't advertise that depth buffers could be used as storage + * images. */ - usage |= VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT; + assert(!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT)); - if (aspects & (VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT)) { - /* vkCmdClearDepthStencilImage() only requires that - * VK_IMAGE_USAGE_TRANSFER_SRC_BIT be set. In particular, it does - * not require VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT. Meta - * clears the image, though, by binding it as a depthstencil - * attachment. + /* Allow the user to control HiZ enabling. Disable by default on gen7 + * because resolves are not currently implemented pre-BDW. + */ + if (!(image->usage & VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT)) { + /* It will never be used as an attachment, HiZ is pointless. */ + } else if (image->usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT) { + /* From the 1.0.37 spec: + * + * "An attachment used as an input attachment and depth/stencil + * attachment must be in either VK_IMAGE_LAYOUT_GENERAL or + * VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL." + * + * It will never have a layout of + * VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL, so HiZ is + * currently pointless. If transfer operations learn to use the HiZ + * buffer, we can enable HiZ for VK_IMAGE_LAYOUT_GENERAL and support + * input attachments. */ - usage |= VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT; + anv_finishme("Implement HiZ for input attachments"); + } else if (!env_var_as_boolean("INTEL_VK_HIZ", dev->info.gen >= 8)) { + anv_finishme("Implement gen7 HiZ"); + } else if (vk_info->mipLevels > 1) { + anv_finishme("Test multi-LOD HiZ"); + } else if (vk_info->arrayLayers > 1) { + anv_finishme("Implement multi-arrayLayer HiZ clears and resolves"); + } else if (dev->info.gen == 8 && vk_info->samples > 1) { + anv_finishme("Test gen8 multisampled HiZ"); + } else { + assert(image->aux_surface.isl.size == 0); + isl_surf_get_hiz_surf(&dev->isl_dev, &image->depth_surface.isl, + &image->aux_surface.isl); + add_surface(image, &image->aux_surface); + image->aux_usage = ISL_AUX_USAGE_HIZ; + } + } else if (aspect == VK_IMAGE_ASPECT_COLOR_BIT && vk_info->samples == 1) { + if (!unlikely(INTEL_DEBUG & DEBUG_NO_RBC)) { + assert(image->aux_surface.isl.size == 0); + ok = isl_surf_get_ccs_surf(&dev->isl_dev, &anv_surf->isl, + &image->aux_surface.isl); + if (ok) { + add_surface(image, &image->aux_surface); + + /* For images created without MUTABLE_FORMAT_BIT set, we know that + * they will always be used with the original format. In + * particular, they will always be used with a format that + * supports color compression. This means that it's safe to just + * leave compression on at all times for these formats. + */ + if (!(vk_info->flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT) && + isl_format_supports_lossless_compression(&dev->info, format)) { + if (vk_info->usage & VK_IMAGE_USAGE_STORAGE_BIT) { + /* + * For now, we leave compression off for anything that may + * be used as a storage image. This is because accessing + * storage images may involve ccs-incompatible views or even + * untyped messages which don't support compression at all. + */ + anv_finishme("Enable CCS for storage images"); + } else { + image->aux_usage = ISL_AUX_USAGE_CCS_E; + } + } + } } } - return usage; + return VK_SUCCESS; } VkResult @@ -220,7 +275,7 @@ anv_assert(pCreateInfo->extent.height > 0); anv_assert(pCreateInfo->extent.depth > 0); - image = anv_alloc2(&device->alloc, alloc, sizeof(*image), 8, + image = vk_alloc2(&device->alloc, alloc, sizeof(*image), 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (!image) return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); @@ -233,8 +288,9 @@ image->levels = pCreateInfo->mipLevels; image->array_size = pCreateInfo->arrayLayers; image->samples = pCreateInfo->samples; - image->usage = anv_image_get_full_usage(pCreateInfo, image->aspects); + image->usage = pCreateInfo->usage; image->tiling = pCreateInfo->tiling; + image->aux_usage = ISL_AUX_USAGE_NONE; uint32_t b; for_each_bit(b, image->aspects) { @@ -249,7 +305,7 @@ fail: if (image) - anv_free2(&device->alloc, alloc, image); + vk_free2(&device->alloc, alloc, image); return r; } @@ -263,7 +319,6 @@ return anv_image_create(device, &(struct anv_image_create_info) { .vk_info = pCreateInfo, - .isl_tiling_flags = ISL_TILING_ANY_MASK, }, pAllocator, pImage); @@ -274,8 +329,61 @@ const VkAllocationCallbacks *pAllocator) { ANV_FROM_HANDLE(anv_device, device, _device); + ANV_FROM_HANDLE(anv_image, image, _image); - anv_free2(&device->alloc, pAllocator, anv_image_from_handle(_image)); + if (!image) + return; + + vk_free2(&device->alloc, pAllocator, image); +} + +VkResult anv_BindImageMemory( + VkDevice _device, + VkImage _image, + VkDeviceMemory _memory, + VkDeviceSize memoryOffset) +{ + ANV_FROM_HANDLE(anv_device, device, _device); + ANV_FROM_HANDLE(anv_device_memory, mem, _memory); + ANV_FROM_HANDLE(anv_image, image, _image); + + if (mem == NULL) { + image->bo = NULL; + image->offset = 0; + return VK_SUCCESS; + } + + image->bo = &mem->bo; + image->offset = memoryOffset; + + if (image->aux_surface.isl.size > 0) { + + /* The offset and size must be a multiple of 4K or else the + * anv_gem_mmap call below will fail. + */ + assert((image->offset + image->aux_surface.offset) % 4096 == 0); + assert(image->aux_surface.isl.size % 4096 == 0); + + /* Auxiliary surfaces need to have their memory cleared to 0 before they + * can be used. For CCS surfaces, this puts them in the "resolved" + * state so they can be used with CCS enabled before we ever touch it + * from the GPU. For HiZ, we need something valid or else we may get + * GPU hangs on some hardware and 0 works fine. + */ + void *map = anv_gem_mmap(device, image->bo->gem_handle, + image->offset + image->aux_surface.offset, + image->aux_surface.isl.size, + device->info.has_llc ? 0 : I915_MMAP_WC); + + if (map == MAP_FAILED) + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + + memset(map, 0, image->aux_surface.isl.size); + + anv_gem_munmap(map, image->aux_surface.isl.size); + } + + return VK_SUCCESS; } static void @@ -326,19 +434,14 @@ } static struct anv_state -alloc_surface_state(struct anv_device *device, - struct anv_cmd_buffer *cmd_buffer) +alloc_surface_state(struct anv_device *device) { - if (cmd_buffer) { - return anv_cmd_buffer_alloc_surface_state(cmd_buffer); - } else { - return anv_state_pool_alloc(&device->surface_state_pool, 64, 64); - } + return anv_state_pool_alloc(&device->surface_state_pool, 64, 64); } static enum isl_channel_select remap_swizzle(VkComponentSwizzle swizzle, VkComponentSwizzle component, - struct anv_format_swizzle format_swizzle) + struct isl_swizzle format_swizzle) { if (swizzle == VK_COMPONENT_SWIZZLE_IDENTITY) swizzle = component; @@ -355,14 +458,22 @@ } } -void -anv_image_view_init(struct anv_image_view *iview, - struct anv_device *device, - const VkImageViewCreateInfo* pCreateInfo, - struct anv_cmd_buffer *cmd_buffer, - VkImageUsageFlags usage_mask) + +VkResult +anv_CreateImageView(VkDevice _device, + const VkImageViewCreateInfo *pCreateInfo, + const VkAllocationCallbacks *pAllocator, + VkImageView *pView) { + ANV_FROM_HANDLE(anv_device, device, _device); ANV_FROM_HANDLE(anv_image, image, pCreateInfo->image); + struct anv_image_view *iview; + + iview = vk_alloc2(&device->alloc, pAllocator, sizeof(*iview), 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (iview == NULL) + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + const VkImageSubresourceRange *range = &pCreateInfo->subresourceRange; assert(range->layerCount > 0); @@ -385,7 +496,7 @@ break; } - struct anv_surface *surface = + const struct anv_surface *surface = anv_image_get_surface_for_aspect_mask(image, range->aspectMask); iview->image = image; @@ -398,24 +509,21 @@ struct anv_format format = anv_get_format(&device->info, pCreateInfo->format, range->aspectMask, image->tiling); - iview->base_layer = range->baseArrayLayer; - iview->base_mip = range->baseMipLevel; - - struct isl_view isl_view = { + iview->isl = (struct isl_view) { .format = format.isl_format, .base_level = range->baseMipLevel, .levels = anv_get_levelCount(image, range), .base_array_layer = range->baseArrayLayer, .array_len = anv_get_layerCount(image, range), - .channel_select = { - remap_swizzle(pCreateInfo->components.r, - VK_COMPONENT_SWIZZLE_R, format.swizzle), - remap_swizzle(pCreateInfo->components.g, - VK_COMPONENT_SWIZZLE_G, format.swizzle), - remap_swizzle(pCreateInfo->components.b, - VK_COMPONENT_SWIZZLE_B, format.swizzle), - remap_swizzle(pCreateInfo->components.a, - VK_COMPONENT_SWIZZLE_A, format.swizzle), + .swizzle = { + .r = remap_swizzle(pCreateInfo->components.r, + VK_COMPONENT_SWIZZLE_R, format.swizzle), + .g = remap_swizzle(pCreateInfo->components.g, + VK_COMPONENT_SWIZZLE_G, format.swizzle), + .b = remap_swizzle(pCreateInfo->components.b, + VK_COMPONENT_SWIZZLE_B, format.swizzle), + .a = remap_swizzle(pCreateInfo->components.a, + VK_COMPONENT_SWIZZLE_A, format.swizzle), }, }; @@ -425,22 +533,56 @@ .depth = anv_minify(image->extent.depth , range->baseMipLevel), }; - isl_surf_usage_flags_t cube_usage; + if (image->type == VK_IMAGE_TYPE_3D) { + iview->isl.base_array_layer = 0; + iview->isl.array_len = iview->extent.depth; + } + if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE || pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE_ARRAY) { - cube_usage = ISL_SURF_USAGE_CUBE_BIT; + iview->isl.usage = ISL_SURF_USAGE_CUBE_BIT; } else { - cube_usage = 0; + iview->isl.usage = 0; + } + + /* If the HiZ buffer can be sampled from, set the constant clear color. + * If it cannot, disable the isl aux usage flag. + */ + float red_clear_color = 0.0f; + enum isl_aux_usage surf_usage = image->aux_usage; + if (image->aux_usage == ISL_AUX_USAGE_HIZ) { + if (iview->aspect_mask & VK_IMAGE_ASPECT_DEPTH_BIT && + anv_can_sample_with_hiz(device->info.gen, image->samples)) { + /* When a HiZ buffer is sampled on gen9+, ensure that + * the constant fast clear value is set in the surface state. + */ + if (device->info.gen >= 9) + red_clear_color = ANV_HZ_FC_VAL; + } else { + surf_usage = ISL_AUX_USAGE_NONE; + } } - if (image->usage & usage_mask & VK_IMAGE_USAGE_SAMPLED_BIT) { - iview->sampler_surface_state = alloc_surface_state(device, cmd_buffer); + /* Input attachment surfaces for color are allocated and filled + * out at BeginRenderPass time because they need compression information. + * Compression is not yet enabled for depth textures and stencil doesn't + * allow compression so we can just use the texture surface state from the + * view. + */ + if (image->usage & VK_IMAGE_USAGE_SAMPLED_BIT || + (image->usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT && + !(iview->aspect_mask & VK_IMAGE_ASPECT_COLOR_BIT))) { + iview->sampler_surface_state = alloc_surface_state(device); - isl_view.usage = cube_usage | ISL_SURF_USAGE_TEXTURE_BIT; + struct isl_view view = iview->isl; + view.usage |= ISL_SURF_USAGE_TEXTURE_BIT; isl_surf_fill_state(&device->isl_dev, iview->sampler_surface_state.map, .surf = &surface->isl, - .view = &isl_view, + .view = &view, + .clear_color.f32 = { red_clear_color,}, + .aux_surf = &image->aux_surface.isl, + .aux_usage = image->aux_usage, .mocs = device->default_mocs); if (!device->info.has_llc) @@ -449,35 +591,22 @@ iview->sampler_surface_state.alloc_size = 0; } - if (image->usage & usage_mask & VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT) { - iview->color_rt_surface_state = alloc_surface_state(device, cmd_buffer); - - isl_view.usage = cube_usage | ISL_SURF_USAGE_RENDER_TARGET_BIT; - isl_surf_fill_state(&device->isl_dev, - iview->color_rt_surface_state.map, - .surf = &surface->isl, - .view = &isl_view, - .mocs = device->default_mocs); - - if (!device->info.has_llc) - anv_state_clflush(iview->color_rt_surface_state); - } else { - iview->color_rt_surface_state.alloc_size = 0; - } - /* NOTE: This one needs to go last since it may stomp isl_view.format */ - if (image->usage & usage_mask & VK_IMAGE_USAGE_STORAGE_BIT) { - iview->storage_surface_state = alloc_surface_state(device, cmd_buffer); + if (image->usage & VK_IMAGE_USAGE_STORAGE_BIT) { + iview->storage_surface_state = alloc_surface_state(device); if (isl_has_matching_typed_storage_image_format(&device->info, format.isl_format)) { - isl_view.usage = cube_usage | ISL_SURF_USAGE_STORAGE_BIT; - isl_view.format = isl_lower_storage_image_format(&device->info, - isl_view.format); + struct isl_view view = iview->isl; + view.usage |= ISL_SURF_USAGE_STORAGE_BIT; + view.format = isl_lower_storage_image_format(&device->info, + format.isl_format); isl_surf_fill_state(&device->isl_dev, iview->storage_surface_state.map, .surf = &surface->isl, - .view = &isl_view, + .view = &view, + .aux_surf = &image->aux_surface.isl, + .aux_usage = image->aux_usage, .mocs = device->default_mocs); } else { anv_fill_buffer_surface_state(device, iview->storage_surface_state, @@ -488,32 +617,15 @@ isl_surf_fill_image_param(&device->isl_dev, &iview->storage_image_param, - &surface->isl, &isl_view); + &surface->isl, &iview->isl); if (!device->info.has_llc) anv_state_clflush(iview->storage_surface_state); } else { iview->storage_surface_state.alloc_size = 0; } -} - -VkResult -anv_CreateImageView(VkDevice _device, - const VkImageViewCreateInfo *pCreateInfo, - const VkAllocationCallbacks *pAllocator, - VkImageView *pView) -{ - ANV_FROM_HANDLE(anv_device, device, _device); - struct anv_image_view *view; - - view = anv_alloc2(&device->alloc, pAllocator, sizeof(*view), 8, - VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); - if (view == NULL) - return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); - - anv_image_view_init(view, device, pCreateInfo, NULL, ~0); - *pView = anv_image_view_to_handle(view); + *pView = anv_image_view_to_handle(iview); return VK_SUCCESS; } @@ -525,10 +637,8 @@ ANV_FROM_HANDLE(anv_device, device, _device); ANV_FROM_HANDLE(anv_image_view, iview, _iview); - if (iview->color_rt_surface_state.alloc_size > 0) { - anv_state_pool_free(&device->surface_state_pool, - iview->color_rt_surface_state); - } + if (!iview) + return; if (iview->sampler_surface_state.alloc_size > 0) { anv_state_pool_free(&device->surface_state_pool, @@ -540,23 +650,31 @@ iview->storage_surface_state); } - anv_free2(&device->alloc, pAllocator, iview); + vk_free2(&device->alloc, pAllocator, iview); } -void anv_buffer_view_init(struct anv_buffer_view *view, - struct anv_device *device, - const VkBufferViewCreateInfo* pCreateInfo, - struct anv_cmd_buffer *cmd_buffer) +VkResult +anv_CreateBufferView(VkDevice _device, + const VkBufferViewCreateInfo *pCreateInfo, + const VkAllocationCallbacks *pAllocator, + VkBufferView *pView) { + ANV_FROM_HANDLE(anv_device, device, _device); ANV_FROM_HANDLE(anv_buffer, buffer, pCreateInfo->buffer); + struct anv_buffer_view *view; + + view = vk_alloc2(&device->alloc, pAllocator, sizeof(*view), 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (!view) + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); /* TODO: Handle the format swizzle? */ view->format = anv_get_isl_format(&device->info, pCreateInfo->format, VK_IMAGE_ASPECT_COLOR_BIT, VK_IMAGE_TILING_LINEAR); - const uint32_t format_bs = isl_format_get_layout(view->format)->bs; + const uint32_t format_bs = isl_format_get_layout(view->format)->bpb / 8; view->bo = buffer->bo; view->offset = buffer->offset + pCreateInfo->offset; view->range = pCreateInfo->range == VK_WHOLE_SIZE ? @@ -564,7 +682,7 @@ view->range = align_down_npot_u32(view->range, format_bs); if (buffer->usage & VK_BUFFER_USAGE_UNIFORM_TEXEL_BUFFER_BIT) { - view->surface_state = alloc_surface_state(device, cmd_buffer); + view->surface_state = alloc_surface_state(device); anv_fill_buffer_surface_state(device, view->surface_state, view->format, @@ -574,7 +692,7 @@ } if (buffer->usage & VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT) { - view->storage_surface_state = alloc_surface_state(device, cmd_buffer); + view->storage_surface_state = alloc_surface_state(device); enum isl_format storage_format = isl_has_matching_typed_storage_image_format(&device->info, @@ -586,7 +704,7 @@ storage_format, view->offset, view->range, (storage_format == ISL_FORMAT_RAW ? 1 : - isl_format_get_layout(storage_format)->bs)); + isl_format_get_layout(storage_format)->bpb / 8)); isl_buffer_fill_image_param(&device->isl_dev, &view->storage_image_param, @@ -594,23 +712,6 @@ } else { view->storage_surface_state = (struct anv_state){ 0 }; } -} - -VkResult -anv_CreateBufferView(VkDevice _device, - const VkBufferViewCreateInfo *pCreateInfo, - const VkAllocationCallbacks *pAllocator, - VkBufferView *pView) -{ - ANV_FROM_HANDLE(anv_device, device, _device); - struct anv_buffer_view *view; - - view = anv_alloc2(&device->alloc, pAllocator, sizeof(*view), 8, - VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); - if (!view) - return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); - - anv_buffer_view_init(view, device, pCreateInfo, NULL); *pView = anv_buffer_view_to_handle(view); @@ -624,6 +725,9 @@ ANV_FROM_HANDLE(anv_device, device, _device); ANV_FROM_HANDLE(anv_buffer_view, view, bufferView); + if (!view) + return; + if (view->surface_state.alloc_size > 0) anv_state_pool_free(&device->surface_state_pool, view->surface_state); @@ -632,28 +736,17 @@ anv_state_pool_free(&device->surface_state_pool, view->storage_surface_state); - anv_free2(&device->alloc, pAllocator, view); + vk_free2(&device->alloc, pAllocator, view); } -struct anv_surface * -anv_image_get_surface_for_aspect_mask(struct anv_image *image, VkImageAspectFlags aspect_mask) +const struct anv_surface * +anv_image_get_surface_for_aspect_mask(const struct anv_image *image, + VkImageAspectFlags aspect_mask) { switch (aspect_mask) { case VK_IMAGE_ASPECT_COLOR_BIT: - /* Dragons will eat you. - * - * Meta attaches all destination surfaces as color render targets. Guess - * what surface the Meta Dragons really want. - */ - if (image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT) { - return &image->depth_surface; - } else if (image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT) { - return &image->stencil_surface; - } else { - assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT); - return &image->color_surface; - } - break; + assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT); + return &image->color_surface; case VK_IMAGE_ASPECT_DEPTH_BIT: assert(image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT); return &image->depth_surface; diff -Nru mesa-12.0.6/src/intel/vulkan/anv_intel.c mesa-17.0.7/src/intel/vulkan/anv_intel.c --- mesa-12.0.6/src/intel/vulkan/anv_intel.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_intel.c 2017-06-01 10:37:10.000000000 +0000 @@ -44,21 +44,20 @@ assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DMA_BUF_IMAGE_CREATE_INFO_INTEL); - mem = anv_alloc2(&device->alloc, pAllocator, sizeof(*mem), 8, + mem = vk_alloc2(&device->alloc, pAllocator, sizeof(*mem), 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (mem == NULL) return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); - mem->bo.gem_handle = anv_gem_fd_to_handle(device, pCreateInfo->fd); - if (!mem->bo.gem_handle) { + uint32_t gem_handle = anv_gem_fd_to_handle(device, pCreateInfo->fd); + if (!gem_handle) { result = vk_error(VK_ERROR_OUT_OF_DEVICE_MEMORY); goto fail; } - mem->bo.map = NULL; - mem->bo.index = 0; - mem->bo.offset = 0; - mem->bo.size = pCreateInfo->strideInBytes * pCreateInfo->extent.height; + uint64_t size = (uint64_t)pCreateInfo->strideInBytes * pCreateInfo->extent.height; + + anv_bo_init(&mem->bo, gem_handle, size); anv_image_create(_device, &(struct anv_image_create_info) { @@ -94,7 +93,7 @@ return VK_SUCCESS; fail: - anv_free2(&device->alloc, pAllocator, mem); + vk_free2(&device->alloc, pAllocator, mem); return result; } diff -Nru mesa-12.0.6/src/intel/vulkan/anv_meta_blit2d.c mesa-17.0.7/src/intel/vulkan/anv_meta_blit2d.c --- mesa-12.0.6/src/intel/vulkan/anv_meta_blit2d.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_meta_blit2d.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,1531 +0,0 @@ -/* - * Copyright © 2016 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - -#include "anv_meta.h" -#include "nir/nir_builder.h" - -enum blit2d_src_type { - /* We can make a "normal" image view of this source and just texture - * from it like you would in any other shader. - */ - BLIT2D_SRC_TYPE_NORMAL, - - /* The source is W-tiled and we need to detile manually in the shader. - * This will work on any platform but is needed for all W-tiled sources - * prior to Broadwell. - */ - BLIT2D_SRC_TYPE_W_DETILE, - - BLIT2D_NUM_SRC_TYPES, -}; - -enum blit2d_dst_type { - /* We can bind this destination as a "normal" render target and render - * to it just like you would anywhere else. - */ - BLIT2D_DST_TYPE_NORMAL, - - /* The destination is W-tiled and we need to do the tiling manually in - * the shader. This is required for all W-tiled destinations. - * - * Sky Lake adds a feature for providing explicit stencil values in the - * shader but mesa doesn't support that yet so neither do we. - */ - BLIT2D_DST_TYPE_W_TILE, - - /* The destination has a 3-channel RGB format. Since we can't render to - * non-power-of-two textures, we have to bind it as a red texture and - * select the correct component for the given red pixel in the shader. - */ - BLIT2D_DST_TYPE_RGB, - - BLIT2D_NUM_DST_TYPES, -}; - -static VkFormat -vk_format_for_size(int bs) -{ - /* The choice of UNORM and UINT formats is very intentional here. Most of - * the time, we want to use a UINT format to avoid any rounding error in - * the blit. For stencil blits, R8_UINT is required by the hardware. - * (It's the only format allowed in conjunction with W-tiling.) Also we - * intentionally use the 4-channel formats whenever we can. This is so - * that, when we do a RGB <-> RGBX copy, the two formats will line up even - * though one of them is 3/4 the size of the other. The choice of UNORM - * vs. UINT is also very intentional because Haswell doesn't handle 8 or - * 16-bit RGB UINT formats at all so we have to use UNORM there. - * Fortunately, the only time we should ever use two different formats in - * the table below is for RGB -> RGBA blits and so we will never have any - * UNORM/UINT mismatch. - */ - switch (bs) { - case 1: return VK_FORMAT_R8_UINT; - case 2: return VK_FORMAT_R8G8_UINT; - case 3: return VK_FORMAT_R8G8B8_UNORM; - case 4: return VK_FORMAT_R8G8B8A8_UNORM; - case 6: return VK_FORMAT_R16G16B16_UNORM; - case 8: return VK_FORMAT_R16G16B16A16_UNORM; - case 12: return VK_FORMAT_R32G32B32_UINT; - case 16: return VK_FORMAT_R32G32B32A32_UINT; - default: - unreachable("Invalid format block size"); - } -} - -/* This function returns the format corresponding to a single component of the - * RGB format for the given size returned by vk_format_for_size(). - */ -static VkFormat -vk_single_component_format_for_rgb_size(int bs) -{ - switch (bs) { - case 3: return VK_FORMAT_R8_UNORM; - case 6: return VK_FORMAT_R16_UNORM; - case 12: return VK_FORMAT_R32_UINT; - default: - unreachable("Invalid format block size"); - } -} - -static void -create_iview(struct anv_cmd_buffer *cmd_buffer, - struct anv_meta_blit2d_surf *surf, - uint64_t offset, - VkImageUsageFlags usage, - uint32_t width, - uint32_t height, - VkFormat format, - VkImage *img, - struct anv_image_view *iview) -{ - const VkImageCreateInfo image_info = { - .sType = VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO, - .imageType = VK_IMAGE_TYPE_2D, - .format = format, - .extent = { - .width = width, - .height = height, - .depth = 1, - }, - .mipLevels = 1, - .arrayLayers = 1, - .samples = 1, - .tiling = surf->tiling == ISL_TILING_LINEAR ? - VK_IMAGE_TILING_LINEAR : VK_IMAGE_TILING_OPTIMAL, - .usage = usage, - }; - - /* Create the VkImage that is bound to the surface's memory. */ - anv_image_create(anv_device_to_handle(cmd_buffer->device), - &(struct anv_image_create_info) { - .vk_info = &image_info, - .isl_tiling_flags = 1 << surf->tiling, - .stride = surf->pitch, - }, &cmd_buffer->pool->alloc, img); - - /* We could use a vk call to bind memory, but that would require - * creating a dummy memory object etc. so there's really no point. - */ - anv_image_from_handle(*img)->bo = surf->bo; - anv_image_from_handle(*img)->offset = surf->base_offset + offset; - - anv_image_view_init(iview, cmd_buffer->device, - &(VkImageViewCreateInfo) { - .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO, - .image = *img, - .viewType = VK_IMAGE_VIEW_TYPE_2D, - .format = image_info.format, - .subresourceRange = { - .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT, - .baseMipLevel = 0, - .levelCount = 1, - .baseArrayLayer = 0, - .layerCount = 1 - }, - }, cmd_buffer, usage); -} - -struct blit2d_src_temps { - VkImage image; - struct anv_image_view iview; - - struct anv_buffer buffer; - struct anv_buffer_view bview; - - VkDescriptorPool desc_pool; - VkDescriptorSet set; -}; - -static void -blit2d_bind_src(struct anv_cmd_buffer *cmd_buffer, - struct anv_meta_blit2d_surf *src, - enum blit2d_src_type src_type, - struct anv_meta_blit2d_rect *rect, - struct blit2d_src_temps *tmp) -{ - struct anv_device *device = cmd_buffer->device; - VkDevice vk_device = anv_device_to_handle(cmd_buffer->device); - - if (src_type == BLIT2D_SRC_TYPE_NORMAL) { - uint32_t offset = 0; - isl_tiling_get_intratile_offset_el(&cmd_buffer->device->isl_dev, - src->tiling, src->bs, src->pitch, - rect->src_x, rect->src_y, - &offset, &rect->src_x, &rect->src_y); - - create_iview(cmd_buffer, src, offset, VK_IMAGE_USAGE_SAMPLED_BIT, - rect->src_x + rect->width, rect->src_y + rect->height, - vk_format_for_size(src->bs), - &tmp->image, &tmp->iview); - - anv_CreateDescriptorPool(vk_device, - &(const VkDescriptorPoolCreateInfo) { - .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_POOL_CREATE_INFO, - .pNext = NULL, - .flags = 0, - .maxSets = 1, - .poolSizeCount = 1, - .pPoolSizes = (VkDescriptorPoolSize[]) { - { - .type = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, - .descriptorCount = 1 - }, - } - }, &cmd_buffer->pool->alloc, &tmp->desc_pool); - - anv_AllocateDescriptorSets(vk_device, - &(VkDescriptorSetAllocateInfo) { - .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_ALLOCATE_INFO, - .descriptorPool = tmp->desc_pool, - .descriptorSetCount = 1, - .pSetLayouts = &device->meta_state.blit2d.img_ds_layout - }, &tmp->set); - - anv_UpdateDescriptorSets(vk_device, - 1, /* writeCount */ - (VkWriteDescriptorSet[]) { - { - .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstSet = tmp->set, - .dstBinding = 0, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, - .pImageInfo = (VkDescriptorImageInfo[]) { - { - .sampler = NULL, - .imageView = anv_image_view_to_handle(&tmp->iview), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - } - } - }, 0, NULL); - - anv_CmdBindDescriptorSets(anv_cmd_buffer_to_handle(cmd_buffer), - VK_PIPELINE_BIND_POINT_GRAPHICS, - device->meta_state.blit2d.img_p_layout, 0, 1, - &tmp->set, 0, NULL); - } else { - assert(src_type == BLIT2D_SRC_TYPE_W_DETILE); - assert(src->tiling == ISL_TILING_W); - assert(src->bs == 1); - - uint32_t tile_offset = 0; - isl_tiling_get_intratile_offset_el(&cmd_buffer->device->isl_dev, - ISL_TILING_W, 1, src->pitch, - rect->src_x, rect->src_y, - &tile_offset, - &rect->src_x, &rect->src_y); - - tmp->buffer = (struct anv_buffer) { - .device = device, - .size = align_u32(rect->src_y + rect->height, 64) * src->pitch, - .usage = VK_BUFFER_USAGE_UNIFORM_TEXEL_BUFFER_BIT, - .bo = src->bo, - .offset = src->base_offset + tile_offset, - }; - - anv_buffer_view_init(&tmp->bview, device, - &(VkBufferViewCreateInfo) { - .sType = VK_STRUCTURE_TYPE_BUFFER_VIEW_CREATE_INFO, - .buffer = anv_buffer_to_handle(&tmp->buffer), - .format = VK_FORMAT_R8_UINT, - .offset = 0, - .range = VK_WHOLE_SIZE, - }, cmd_buffer); - - anv_CreateDescriptorPool(vk_device, - &(const VkDescriptorPoolCreateInfo) { - .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_POOL_CREATE_INFO, - .pNext = NULL, - .flags = 0, - .maxSets = 1, - .poolSizeCount = 1, - .pPoolSizes = (VkDescriptorPoolSize[]) { - { - .type = VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER, - .descriptorCount = 1 - }, - } - }, &cmd_buffer->pool->alloc, &tmp->desc_pool); - - anv_AllocateDescriptorSets(vk_device, - &(VkDescriptorSetAllocateInfo) { - .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_ALLOCATE_INFO, - .descriptorPool = tmp->desc_pool, - .descriptorSetCount = 1, - .pSetLayouts = &device->meta_state.blit2d.buf_ds_layout - }, &tmp->set); - - anv_UpdateDescriptorSets(vk_device, - 1, /* writeCount */ - (VkWriteDescriptorSet[]) { - { - .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstSet = tmp->set, - .dstBinding = 0, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER, - .pTexelBufferView = (VkBufferView[]) { - anv_buffer_view_to_handle(&tmp->bview), - }, - } - }, 0, NULL); - - anv_CmdBindDescriptorSets(anv_cmd_buffer_to_handle(cmd_buffer), - VK_PIPELINE_BIND_POINT_GRAPHICS, - device->meta_state.blit2d.buf_p_layout, 0, 1, - &tmp->set, 0, NULL); - } -} - -static void -blit2d_unbind_src(struct anv_cmd_buffer *cmd_buffer, - enum blit2d_src_type src_type, - struct blit2d_src_temps *tmp) -{ - anv_DestroyDescriptorPool(anv_device_to_handle(cmd_buffer->device), - tmp->desc_pool, &cmd_buffer->pool->alloc); - if (src_type == BLIT2D_SRC_TYPE_NORMAL) { - anv_DestroyImage(anv_device_to_handle(cmd_buffer->device), - tmp->image, &cmd_buffer->pool->alloc); - } -} - -struct blit2d_dst_temps { - VkImage image; - struct anv_image_view iview; - VkFramebuffer fb; -}; - -static void -blit2d_bind_dst(struct anv_cmd_buffer *cmd_buffer, - struct anv_meta_blit2d_surf *dst, - uint64_t offset, - uint32_t width, - uint32_t height, - VkFormat format, - struct blit2d_dst_temps *tmp) -{ - create_iview(cmd_buffer, dst, offset, VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT, - width, height, format, &tmp->image, &tmp->iview); - - anv_CreateFramebuffer(anv_device_to_handle(cmd_buffer->device), - &(VkFramebufferCreateInfo) { - .sType = VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO, - .attachmentCount = 1, - .pAttachments = (VkImageView[]) { - anv_image_view_to_handle(&tmp->iview), - }, - .width = width, - .height = height, - .layers = 1 - }, &cmd_buffer->pool->alloc, &tmp->fb); -} - -static void -blit2d_unbind_dst(struct anv_cmd_buffer *cmd_buffer, - struct blit2d_dst_temps *tmp) -{ - VkDevice vk_device = anv_device_to_handle(cmd_buffer->device); - anv_DestroyFramebuffer(vk_device, tmp->fb, &cmd_buffer->pool->alloc); - anv_DestroyImage(vk_device, tmp->image, &cmd_buffer->pool->alloc); -} - -void -anv_meta_end_blit2d(struct anv_cmd_buffer *cmd_buffer, - struct anv_meta_saved_state *save) -{ - anv_meta_restore(save, cmd_buffer); -} - -void -anv_meta_begin_blit2d(struct anv_cmd_buffer *cmd_buffer, - struct anv_meta_saved_state *save) -{ - anv_meta_save(save, cmd_buffer, 0); -} - -static void -bind_pipeline(struct anv_cmd_buffer *cmd_buffer, - enum blit2d_src_type src_type, - enum blit2d_dst_type dst_type) -{ - VkPipeline pipeline = - cmd_buffer->device->meta_state.blit2d.pipelines[src_type][dst_type]; - - if (cmd_buffer->state.pipeline != anv_pipeline_from_handle(pipeline)) { - anv_CmdBindPipeline(anv_cmd_buffer_to_handle(cmd_buffer), - VK_PIPELINE_BIND_POINT_GRAPHICS, pipeline); - } -} - -static void -anv_meta_blit2d_normal_dst(struct anv_cmd_buffer *cmd_buffer, - struct anv_meta_blit2d_surf *src, - enum blit2d_src_type src_type, - struct anv_meta_blit2d_surf *dst, - unsigned num_rects, - struct anv_meta_blit2d_rect *rects) -{ - struct anv_device *device = cmd_buffer->device; - - for (unsigned r = 0; r < num_rects; ++r) { - struct blit2d_src_temps src_temps; - blit2d_bind_src(cmd_buffer, src, src_type, &rects[r], &src_temps); - - uint32_t offset = 0; - isl_tiling_get_intratile_offset_el(&cmd_buffer->device->isl_dev, - dst->tiling, dst->bs, dst->pitch, - rects[r].dst_x, rects[r].dst_y, - &offset, - &rects[r].dst_x, &rects[r].dst_y); - - struct blit2d_dst_temps dst_temps; - blit2d_bind_dst(cmd_buffer, dst, offset, rects[r].dst_x + rects[r].width, - rects[r].dst_y + rects[r].height, - vk_format_for_size(dst->bs), &dst_temps); - - struct blit_vb_data { - float pos[2]; - float tex_coord[3]; - } *vb_data; - - unsigned vb_size = sizeof(struct anv_vue_header) + 3 * sizeof(*vb_data); - - struct anv_state vb_state = - anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, vb_size, 16); - memset(vb_state.map, 0, sizeof(struct anv_vue_header)); - vb_data = vb_state.map + sizeof(struct anv_vue_header); - - vb_data[0] = (struct blit_vb_data) { - .pos = { - rects[r].dst_x + rects[r].width, - rects[r].dst_y + rects[r].height, - }, - .tex_coord = { - rects[r].src_x + rects[r].width, - rects[r].src_y + rects[r].height, - src->pitch, - }, - }; - - vb_data[1] = (struct blit_vb_data) { - .pos = { - rects[r].dst_x, - rects[r].dst_y + rects[r].height, - }, - .tex_coord = { - rects[r].src_x, - rects[r].src_y + rects[r].height, - src->pitch, - }, - }; - - vb_data[2] = (struct blit_vb_data) { - .pos = { - rects[r].dst_x, - rects[r].dst_y, - }, - .tex_coord = { - rects[r].src_x, - rects[r].src_y, - src->pitch, - }, - }; - - if (!device->info.has_llc) - anv_state_clflush(vb_state); - - struct anv_buffer vertex_buffer = { - .device = device, - .size = vb_size, - .bo = &device->dynamic_state_block_pool.bo, - .offset = vb_state.offset, - }; - - anv_CmdBindVertexBuffers(anv_cmd_buffer_to_handle(cmd_buffer), 0, 2, - (VkBuffer[]) { - anv_buffer_to_handle(&vertex_buffer), - anv_buffer_to_handle(&vertex_buffer) - }, - (VkDeviceSize[]) { - 0, - sizeof(struct anv_vue_header), - }); - - ANV_CALL(CmdBeginRenderPass)(anv_cmd_buffer_to_handle(cmd_buffer), - &(VkRenderPassBeginInfo) { - .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, - .renderPass = device->meta_state.blit2d.render_pass, - .framebuffer = dst_temps.fb, - .renderArea = { - .offset = { rects[r].dst_x, rects[r].dst_y, }, - .extent = { rects[r].width, rects[r].height }, - }, - .clearValueCount = 0, - .pClearValues = NULL, - }, VK_SUBPASS_CONTENTS_INLINE); - - bind_pipeline(cmd_buffer, src_type, BLIT2D_DST_TYPE_NORMAL); - - ANV_CALL(CmdDraw)(anv_cmd_buffer_to_handle(cmd_buffer), 3, 1, 0, 0); - - ANV_CALL(CmdEndRenderPass)(anv_cmd_buffer_to_handle(cmd_buffer)); - - /* At the point where we emit the draw call, all data from the - * descriptor sets, etc. has been used. We are free to delete it. - */ - blit2d_unbind_src(cmd_buffer, src_type, &src_temps); - blit2d_unbind_dst(cmd_buffer, &dst_temps); - } -} - -static void -anv_meta_blit2d_w_tiled_dst(struct anv_cmd_buffer *cmd_buffer, - struct anv_meta_blit2d_surf *src, - enum blit2d_src_type src_type, - struct anv_meta_blit2d_surf *dst, - unsigned num_rects, - struct anv_meta_blit2d_rect *rects) -{ - struct anv_device *device = cmd_buffer->device; - - for (unsigned r = 0; r < num_rects; ++r) { - struct blit2d_src_temps src_temps; - blit2d_bind_src(cmd_buffer, src, src_type, &rects[r], &src_temps); - - assert(dst->bs == 1); - uint32_t offset; - isl_tiling_get_intratile_offset_el(&cmd_buffer->device->isl_dev, - ISL_TILING_W, 1, dst->pitch, - rects[r].dst_x, rects[r].dst_y, - &offset, - &rects[r].dst_x, &rects[r].dst_y); - - /* The original coordinates were in terms of an actual W-tiled offset - * but we are binding this image as Y-tiled. We need to adjust our - * rectangle accordingly. - */ - uint32_t xmin_Y, xmax_Y, ymin_Y, ymax_Y; - xmin_Y = (rects[r].dst_x / 8) * 16; - xmax_Y = DIV_ROUND_UP(rects[r].dst_x + rects[r].width, 8) * 16; - ymin_Y = (rects[r].dst_y / 4) * 2; - ymax_Y = DIV_ROUND_UP(rects[r].dst_y + rects[r].height, 4) * 2; - - struct anv_meta_blit2d_surf dst_Y = { - .bo = dst->bo, - .tiling = ISL_TILING_Y0, - .base_offset = dst->base_offset, - .bs = 1, - .pitch = dst->pitch * 2, - }; - - struct blit2d_dst_temps dst_temps; - blit2d_bind_dst(cmd_buffer, &dst_Y, offset, xmax_Y, ymax_Y, - VK_FORMAT_R8_UINT, &dst_temps); - - struct blit_vb_header { - struct anv_vue_header vue; - int32_t tex_offset[2]; - uint32_t tex_pitch; - uint32_t bounds[4]; - } *vb_header; - - struct blit_vb_data { - float pos[2]; - } *vb_data; - - unsigned vb_size = sizeof(*vb_header) + 3 * sizeof(*vb_data); - - struct anv_state vb_state = - anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, vb_size, 16); - vb_header = vb_state.map; - - *vb_header = (struct blit_vb_header) { - .tex_offset = { - rects[r].src_x - rects[r].dst_x, - rects[r].src_y - rects[r].dst_y, - }, - .tex_pitch = src->pitch, - .bounds = { - rects[r].dst_x, - rects[r].dst_y, - rects[r].dst_x + rects[r].width, - rects[r].dst_y + rects[r].height, - }, - }; - - vb_data = (void *)(vb_header + 1); - - vb_data[0] = (struct blit_vb_data) { - .pos = { - xmax_Y, - ymax_Y, - }, - }; - - vb_data[1] = (struct blit_vb_data) { - .pos = { - xmin_Y, - ymax_Y, - }, - }; - - vb_data[2] = (struct blit_vb_data) { - .pos = { - xmin_Y, - ymin_Y, - }, - }; - - if (!device->info.has_llc) - anv_state_clflush(vb_state); - - struct anv_buffer vertex_buffer = { - .device = device, - .size = vb_size, - .bo = &device->dynamic_state_block_pool.bo, - .offset = vb_state.offset, - }; - - anv_CmdBindVertexBuffers(anv_cmd_buffer_to_handle(cmd_buffer), 0, 2, - (VkBuffer[]) { - anv_buffer_to_handle(&vertex_buffer), - anv_buffer_to_handle(&vertex_buffer) - }, - (VkDeviceSize[]) { - 0, - (void *)vb_data - vb_state.map, - }); - - ANV_CALL(CmdBeginRenderPass)(anv_cmd_buffer_to_handle(cmd_buffer), - &(VkRenderPassBeginInfo) { - .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, - .renderPass = device->meta_state.blit2d.render_pass, - .framebuffer = dst_temps.fb, - .renderArea = { - .offset = { xmin_Y, ymin_Y, }, - .extent = { xmax_Y - xmin_Y, ymax_Y - ymin_Y }, - }, - .clearValueCount = 0, - .pClearValues = NULL, - }, VK_SUBPASS_CONTENTS_INLINE); - - bind_pipeline(cmd_buffer, src_type, BLIT2D_DST_TYPE_W_TILE); - - ANV_CALL(CmdDraw)(anv_cmd_buffer_to_handle(cmd_buffer), 3, 1, 0, 0); - - ANV_CALL(CmdEndRenderPass)(anv_cmd_buffer_to_handle(cmd_buffer)); - - /* At the point where we emit the draw call, all data from the - * descriptor sets, etc. has been used. We are free to delete it. - */ - blit2d_unbind_src(cmd_buffer, src_type, &src_temps); - blit2d_unbind_dst(cmd_buffer, &dst_temps); - } -} - -static void -anv_meta_blit2d_rgb_dst(struct anv_cmd_buffer *cmd_buffer, - struct anv_meta_blit2d_surf *src, - enum blit2d_src_type src_type, - struct anv_meta_blit2d_surf *dst, - unsigned num_rects, - struct anv_meta_blit2d_rect *rects) -{ - struct anv_device *device = cmd_buffer->device; - - for (unsigned r = 0; r < num_rects; ++r) { - struct blit2d_src_temps src_temps; - blit2d_bind_src(cmd_buffer, src, src_type, &rects[r], &src_temps); - - assert(dst->bs % 3 == 0); - assert(dst->tiling == ISL_TILING_LINEAR); - - uint32_t offset; - isl_tiling_get_intratile_offset_el(&cmd_buffer->device->isl_dev, - dst->tiling, 1, dst->pitch, - rects[r].dst_x, rects[r].dst_y, - &offset, - &rects[r].dst_x, &rects[r].dst_y); - - /* A red surface three times as wide as the actual RGB destination */ - struct anv_meta_blit2d_surf dst_R = { - .bo = dst->bo, - .tiling = dst->tiling, - .base_offset = dst->base_offset, - .bs = dst->bs / 3, - .pitch = dst->pitch, - }; - - struct blit2d_dst_temps dst_temps; - blit2d_bind_dst(cmd_buffer, &dst_R, offset, - (rects[r].dst_x + rects[r].width) * 3, - rects[r].dst_y + rects[r].height, - vk_single_component_format_for_rgb_size(dst->bs), - &dst_temps); - - struct blit_vb_data { - float pos[2]; - float tex_coord[3]; - } *vb_data; - - unsigned vb_size = sizeof(struct anv_vue_header) + 3 * sizeof(*vb_data); - - struct anv_state vb_state = - anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, vb_size, 16); - memset(vb_state.map, 0, sizeof(struct anv_vue_header)); - vb_data = vb_state.map + sizeof(struct anv_vue_header); - - vb_data[0] = (struct blit_vb_data) { - .pos = { - (rects[r].dst_x + rects[r].width) * 3, - rects[r].dst_y + rects[r].height, - }, - .tex_coord = { - rects[r].src_x + rects[r].width, - rects[r].src_y + rects[r].height, - src->pitch, - }, - }; - - vb_data[1] = (struct blit_vb_data) { - .pos = { - rects[r].dst_x * 3, - rects[r].dst_y + rects[r].height, - }, - .tex_coord = { - rects[r].src_x, - rects[r].src_y + rects[r].height, - src->pitch, - }, - }; - - vb_data[2] = (struct blit_vb_data) { - .pos = { - rects[r].dst_x * 3, - rects[r].dst_y, - }, - .tex_coord = { - rects[r].src_x, - rects[r].src_y, - src->pitch, - }, - }; - - if (!device->info.has_llc) - anv_state_clflush(vb_state); - - struct anv_buffer vertex_buffer = { - .device = device, - .size = vb_size, - .bo = &device->dynamic_state_block_pool.bo, - .offset = vb_state.offset, - }; - - anv_CmdBindVertexBuffers(anv_cmd_buffer_to_handle(cmd_buffer), 0, 2, - (VkBuffer[]) { - anv_buffer_to_handle(&vertex_buffer), - anv_buffer_to_handle(&vertex_buffer) - }, - (VkDeviceSize[]) { - 0, - sizeof(struct anv_vue_header), - }); - - ANV_CALL(CmdBeginRenderPass)(anv_cmd_buffer_to_handle(cmd_buffer), - &(VkRenderPassBeginInfo) { - .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, - .renderPass = device->meta_state.blit2d.render_pass, - .framebuffer = dst_temps.fb, - .renderArea = { - .offset = { rects[r].dst_x, rects[r].dst_y, }, - .extent = { rects[r].width, rects[r].height }, - }, - .clearValueCount = 0, - .pClearValues = NULL, - }, VK_SUBPASS_CONTENTS_INLINE); - - bind_pipeline(cmd_buffer, src_type, BLIT2D_DST_TYPE_RGB); - - ANV_CALL(CmdDraw)(anv_cmd_buffer_to_handle(cmd_buffer), 3, 1, 0, 0); - - ANV_CALL(CmdEndRenderPass)(anv_cmd_buffer_to_handle(cmd_buffer)); - - /* At the point where we emit the draw call, all data from the - * descriptor sets, etc. has been used. We are free to delete it. - */ - blit2d_unbind_src(cmd_buffer, src_type, &src_temps); - blit2d_unbind_dst(cmd_buffer, &dst_temps); - } -} - -void -anv_meta_blit2d(struct anv_cmd_buffer *cmd_buffer, - struct anv_meta_blit2d_surf *src, - struct anv_meta_blit2d_surf *dst, - unsigned num_rects, - struct anv_meta_blit2d_rect *rects) -{ - enum blit2d_src_type src_type; - if (src->tiling == ISL_TILING_W && cmd_buffer->device->info.gen < 8) { - src_type = BLIT2D_SRC_TYPE_W_DETILE; - } else { - src_type = BLIT2D_SRC_TYPE_NORMAL; - } - - if (dst->tiling == ISL_TILING_W) { - anv_meta_blit2d_w_tiled_dst(cmd_buffer, src, src_type, dst, - num_rects, rects); - return; - } else if (dst->bs % 3 == 0) { - anv_meta_blit2d_rgb_dst(cmd_buffer, src, src_type, dst, - num_rects, rects); - return; - } else { - assert(util_is_power_of_two(dst->bs)); - anv_meta_blit2d_normal_dst(cmd_buffer, src, src_type, dst, - num_rects, rects); - } -} - -static nir_shader * -build_nir_vertex_shader(void) -{ - const struct glsl_type *vec4 = glsl_vec4_type(); - nir_builder b; - - nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_VERTEX, NULL); - b.shader->info.name = ralloc_strdup(b.shader, "meta_blit_vs"); - - nir_variable *pos_in = nir_variable_create(b.shader, nir_var_shader_in, - vec4, "a_pos"); - pos_in->data.location = VERT_ATTRIB_GENERIC0; - nir_variable *pos_out = nir_variable_create(b.shader, nir_var_shader_out, - vec4, "gl_Position"); - pos_out->data.location = VARYING_SLOT_POS; - nir_copy_var(&b, pos_out, pos_in); - - nir_variable *tex_pos_in = nir_variable_create(b.shader, nir_var_shader_in, - vec4, "a_tex_pos"); - tex_pos_in->data.location = VERT_ATTRIB_GENERIC1; - nir_variable *tex_pos_out = nir_variable_create(b.shader, nir_var_shader_out, - vec4, "v_tex_pos"); - tex_pos_out->data.location = VARYING_SLOT_VAR0; - tex_pos_out->data.interpolation = INTERP_QUALIFIER_SMOOTH; - nir_copy_var(&b, tex_pos_out, tex_pos_in); - - nir_variable *other_in = nir_variable_create(b.shader, nir_var_shader_in, - vec4, "a_other"); - other_in->data.location = VERT_ATTRIB_GENERIC2; - nir_variable *other_out = nir_variable_create(b.shader, nir_var_shader_out, - vec4, "v_other"); - other_out->data.location = VARYING_SLOT_VAR1; - other_out->data.interpolation = INTERP_QUALIFIER_FLAT; - nir_copy_var(&b, other_out, other_in); - - return b.shader; -} - -typedef nir_ssa_def* (*texel_fetch_build_func)(struct nir_builder *, - struct anv_device *, - nir_ssa_def *, nir_ssa_def *); - -static nir_ssa_def * -nir_copy_bits(struct nir_builder *b, nir_ssa_def *dst, unsigned dst_offset, - nir_ssa_def *src, unsigned src_offset, unsigned num_bits) -{ - unsigned src_mask = (~1u >> (32 - num_bits)) << src_offset; - nir_ssa_def *masked = nir_iand(b, src, nir_imm_int(b, src_mask)); - - nir_ssa_def *shifted; - if (dst_offset > src_offset) { - shifted = nir_ishl(b, masked, nir_imm_int(b, dst_offset - src_offset)); - } else if (dst_offset < src_offset) { - shifted = nir_ushr(b, masked, nir_imm_int(b, src_offset - dst_offset)); - } else { - assert(dst_offset == src_offset); - shifted = masked; - } - - return nir_ior(b, dst, shifted); -} - -static nir_ssa_def * -build_nir_w_tiled_fetch(struct nir_builder *b, struct anv_device *device, - nir_ssa_def *tex_pos, nir_ssa_def *tex_pitch) -{ - nir_ssa_def *x = nir_channel(b, tex_pos, 0); - nir_ssa_def *y = nir_channel(b, tex_pos, 1); - - /* First, compute the block-aligned offset */ - nir_ssa_def *x_major = nir_ushr(b, x, nir_imm_int(b, 6)); - nir_ssa_def *y_major = nir_ushr(b, y, nir_imm_int(b, 6)); - nir_ssa_def *offset = - nir_iadd(b, nir_imul(b, y_major, - nir_imul(b, tex_pitch, nir_imm_int(b, 64))), - nir_imul(b, x_major, nir_imm_int(b, 4096))); - - /* Compute the bottom 12 bits of the offset */ - offset = nir_copy_bits(b, offset, 0, x, 0, 1); - offset = nir_copy_bits(b, offset, 1, y, 0, 1); - offset = nir_copy_bits(b, offset, 2, x, 1, 1); - offset = nir_copy_bits(b, offset, 3, y, 1, 1); - offset = nir_copy_bits(b, offset, 4, x, 2, 1); - offset = nir_copy_bits(b, offset, 5, y, 2, 4); - offset = nir_copy_bits(b, offset, 9, x, 3, 3); - - if (device->isl_dev.has_bit6_swizzling) { - offset = nir_ixor(b, offset, - nir_ushr(b, nir_iand(b, offset, nir_imm_int(b, 0x0200)), - nir_imm_int(b, 3))); - } - - const struct glsl_type *sampler_type = - glsl_sampler_type(GLSL_SAMPLER_DIM_BUF, false, false, GLSL_TYPE_FLOAT); - nir_variable *sampler = nir_variable_create(b->shader, nir_var_uniform, - sampler_type, "s_tex"); - sampler->data.descriptor_set = 0; - sampler->data.binding = 0; - - nir_tex_instr *tex = nir_tex_instr_create(b->shader, 1); - tex->sampler_dim = GLSL_SAMPLER_DIM_BUF; - tex->op = nir_texop_txf; - tex->src[0].src_type = nir_tex_src_coord; - tex->src[0].src = nir_src_for_ssa(offset); - tex->dest_type = nir_type_float; /* TODO */ - tex->is_array = false; - tex->coord_components = 1; - tex->texture = nir_deref_var_create(tex, sampler); - tex->sampler = NULL; - - nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex"); - nir_builder_instr_insert(b, &tex->instr); - - return &tex->dest.ssa; -} - -static nir_ssa_def * -build_nir_texel_fetch(struct nir_builder *b, struct anv_device *device, - nir_ssa_def *tex_pos, nir_ssa_def *tex_pitch) -{ - const struct glsl_type *sampler_type = - glsl_sampler_type(GLSL_SAMPLER_DIM_2D, false, false, GLSL_TYPE_FLOAT); - nir_variable *sampler = nir_variable_create(b->shader, nir_var_uniform, - sampler_type, "s_tex"); - sampler->data.descriptor_set = 0; - sampler->data.binding = 0; - - nir_tex_instr *tex = nir_tex_instr_create(b->shader, 2); - tex->sampler_dim = GLSL_SAMPLER_DIM_2D; - tex->op = nir_texop_txf; - tex->src[0].src_type = nir_tex_src_coord; - tex->src[0].src = nir_src_for_ssa(tex_pos); - tex->src[1].src_type = nir_tex_src_lod; - tex->src[1].src = nir_src_for_ssa(nir_imm_int(b, 0)); - tex->dest_type = nir_type_float; /* TODO */ - tex->is_array = false; - tex->coord_components = 2; - tex->texture = nir_deref_var_create(tex, sampler); - tex->sampler = NULL; - - nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex"); - nir_builder_instr_insert(b, &tex->instr); - - return &tex->dest.ssa; -} - -static const VkPipelineVertexInputStateCreateInfo normal_vi_create_info = { - .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO, - .vertexBindingDescriptionCount = 2, - .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) { - { - .binding = 0, - .stride = 0, - .inputRate = VK_VERTEX_INPUT_RATE_INSTANCE - }, - { - .binding = 1, - .stride = 5 * sizeof(float), - .inputRate = VK_VERTEX_INPUT_RATE_VERTEX - }, - }, - .vertexAttributeDescriptionCount = 3, - .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) { - { - /* VUE Header */ - .location = 0, - .binding = 0, - .format = VK_FORMAT_R32G32B32A32_UINT, - .offset = 0 - }, - { - /* Position */ - .location = 1, - .binding = 1, - .format = VK_FORMAT_R32G32_SFLOAT, - .offset = 0 - }, - { - /* Texture Coordinate */ - .location = 2, - .binding = 1, - .format = VK_FORMAT_R32G32B32_SFLOAT, - .offset = 8 - }, - }, -}; - -static nir_shader * -build_nir_copy_fragment_shader(struct anv_device *device, - texel_fetch_build_func txf_func) -{ - const struct glsl_type *vec4 = glsl_vec4_type(); - const struct glsl_type *vec3 = glsl_vector_type(GLSL_TYPE_FLOAT, 3); - nir_builder b; - - nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL); - b.shader->info.name = ralloc_strdup(b.shader, "meta_blit2d_fs"); - - nir_variable *tex_pos_in = nir_variable_create(b.shader, nir_var_shader_in, - vec3, "v_tex_pos"); - tex_pos_in->data.location = VARYING_SLOT_VAR0; - - nir_variable *color_out = nir_variable_create(b.shader, nir_var_shader_out, - vec4, "f_color"); - color_out->data.location = FRAG_RESULT_DATA0; - - nir_ssa_def *pos_int = nir_f2i(&b, nir_load_var(&b, tex_pos_in)); - unsigned swiz[4] = { 0, 1 }; - nir_ssa_def *tex_pos = nir_swizzle(&b, pos_int, swiz, 2, false); - nir_ssa_def *tex_pitch = nir_channel(&b, pos_int, 2); - - nir_ssa_def *color = txf_func(&b, device, tex_pos, tex_pitch); - nir_store_var(&b, color_out, color, 0xf); - - return b.shader; -} - -/* RGB copies have the same interface as normal copies */ -#define rgb_vi_create_info normal_vi_create_info - -static nir_shader * -build_nir_rgb_fragment_shader(struct anv_device *device, - texel_fetch_build_func txf_func) -{ - const struct glsl_type *vec4 = glsl_vec4_type(); - const struct glsl_type *vec3 = glsl_vector_type(GLSL_TYPE_FLOAT, 3); - nir_builder b; - - nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL); - b.shader->info.name = ralloc_strdup(b.shader, "meta_blit2d_fs"); - - nir_variable *tex_pos_in = nir_variable_create(b.shader, nir_var_shader_in, - vec3, "v_tex_pos"); - tex_pos_in->data.location = VARYING_SLOT_VAR0; - - nir_variable *color_out = nir_variable_create(b.shader, nir_var_shader_out, - vec4, "f_color"); - color_out->data.location = FRAG_RESULT_DATA0; - - /* We need gl_FragCoord so we know our position */ - nir_variable *frag_coord_in = nir_variable_create(b.shader, - nir_var_shader_in, - vec4, "gl_FragCoord"); - frag_coord_in->data.location = VARYING_SLOT_POS; - frag_coord_in->data.origin_upper_left = true; - - nir_ssa_def *pos_int = nir_f2i(&b, nir_load_var(&b, tex_pos_in)); - unsigned swiz[4] = { 0, 1 }; - nir_ssa_def *tex_pos = nir_swizzle(&b, pos_int, swiz, 2, false); - nir_ssa_def *tex_pitch = nir_channel(&b, pos_int, 2); - - nir_ssa_def *color = txf_func(&b, device, tex_pos, tex_pitch); - - /* We figure out which component we are by the x component of FragCoord */ - nir_ssa_def *frag_coord_int = nir_f2i(&b, nir_load_var(&b, frag_coord_in)); - nir_ssa_def *comp = nir_umod(&b, nir_channel(&b, frag_coord_int, 0), - nir_imm_int(&b, 3)); - - /* Select the given channel from the texelFetch result */ - nir_ssa_def *color_channel = - nir_bcsel(&b, nir_ieq(&b, comp, nir_imm_int(&b, 0)), - nir_channel(&b, color, 0), - nir_bcsel(&b, nir_ieq(&b, comp, nir_imm_int(&b, 1)), - nir_channel(&b, color, 1), - nir_channel(&b, color, 2))); - - nir_ssa_def *u = nir_ssa_undef(&b, 1, 32); - nir_store_var(&b, color_out, nir_vec4(&b, color_channel, u, u, u), 0x1); - - return b.shader; -} - -static const VkPipelineVertexInputStateCreateInfo w_tiled_vi_create_info = { - .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO, - .vertexBindingDescriptionCount = 2, - .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) { - { - .binding = 0, - .stride = 0, - .inputRate = VK_VERTEX_INPUT_RATE_INSTANCE - }, - { - .binding = 1, - .stride = 2 * sizeof(float), - .inputRate = VK_VERTEX_INPUT_RATE_VERTEX - }, - }, - .vertexAttributeDescriptionCount = 4, - .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) { - { - /* VUE Header */ - .location = 0, - .binding = 0, - .format = VK_FORMAT_R32G32B32A32_UINT, - .offset = 0 - }, - { - /* Position */ - .location = 1, - .binding = 1, - .format = VK_FORMAT_R32G32_SFLOAT, - .offset = 0 - }, - { - /* Texture Offset */ - .location = 2, - .binding = 0, - .format = VK_FORMAT_R32G32B32_UINT, - .offset = 16 - }, - { - /* Destination bounds */ - .location = 3, - .binding = 0, - .format = VK_FORMAT_R32G32B32A32_UINT, - .offset = 28 - }, - }, -}; - -static nir_shader * -build_nir_w_tiled_fragment_shader(struct anv_device *device, - texel_fetch_build_func txf_func) -{ - const struct glsl_type *vec4 = glsl_vec4_type(); - const struct glsl_type *ivec3 = glsl_vector_type(GLSL_TYPE_INT, 3); - const struct glsl_type *uvec4 = glsl_vector_type(GLSL_TYPE_UINT, 4); - nir_builder b; - - nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL); - b.shader->info.name = ralloc_strdup(b.shader, "meta_blit2d_fs"); - - /* We need gl_FragCoord so we know our Y-tiled position */ - nir_variable *frag_coord_in = nir_variable_create(b.shader, - nir_var_shader_in, - vec4, "gl_FragCoord"); - frag_coord_in->data.location = VARYING_SLOT_POS; - frag_coord_in->data.origin_upper_left = true; - - /* In location 0 we have an ivec3 that has the offset from dest to - * source in the first two components and the stride in the third. - */ - nir_variable *tex_off_in = nir_variable_create(b.shader, nir_var_shader_in, - ivec3, "v_tex_off"); - tex_off_in->data.location = VARYING_SLOT_VAR0; - tex_off_in->data.interpolation = INTERP_QUALIFIER_FLAT; - - /* In location 1 we have a uvec4 that gives us the bounds of the - * destination. We need to discard if we get outside this boundary. - */ - nir_variable *bounds_in = nir_variable_create(b.shader, nir_var_shader_in, - uvec4, "v_bounds"); - bounds_in->data.location = VARYING_SLOT_VAR1; - bounds_in->data.interpolation = INTERP_QUALIFIER_FLAT; - - nir_variable *color_out = nir_variable_create(b.shader, nir_var_shader_out, - vec4, "f_color"); - color_out->data.location = FRAG_RESULT_DATA0; - - nir_ssa_def *frag_coord_int = nir_f2i(&b, nir_load_var(&b, frag_coord_in)); - nir_ssa_def *x_Y = nir_channel(&b, frag_coord_int, 0); - nir_ssa_def *y_Y = nir_channel(&b, frag_coord_int, 1); - - /* Compute the W-tiled position from the Y-tiled position */ - nir_ssa_def *x_W = nir_iand(&b, x_Y, nir_imm_int(&b, 0xffffff80)); - x_W = nir_ushr(&b, x_W, nir_imm_int(&b, 1)); - x_W = nir_copy_bits(&b, x_W, 0, x_Y, 0, 1); - x_W = nir_copy_bits(&b, x_W, 1, x_Y, 2, 1); - x_W = nir_copy_bits(&b, x_W, 2, y_Y, 0, 1); - x_W = nir_copy_bits(&b, x_W, 3, x_Y, 4, 3); - - nir_ssa_def *y_W = nir_iand(&b, y_Y, nir_imm_int(&b, 0xffffffe0)); - y_W = nir_ishl(&b, y_W, nir_imm_int(&b, 1)); - y_W = nir_copy_bits(&b, y_W, 0, x_Y, 1, 1); - y_W = nir_copy_bits(&b, y_W, 1, x_Y, 3, 1); - y_W = nir_copy_bits(&b, y_W, 2, y_Y, 1, 4); - - /* Figure out if we are out-of-bounds and discard */ - nir_ssa_def *bounds = nir_load_var(&b, bounds_in); - nir_ssa_def *oob = - nir_ior(&b, nir_ult(&b, x_W, nir_channel(&b, bounds, 0)), - nir_ior(&b, nir_ult(&b, y_W, nir_channel(&b, bounds, 1)), - nir_ior(&b, nir_uge(&b, x_W, nir_channel(&b, bounds, 2)), - nir_uge(&b, y_W, nir_channel(&b, bounds, 3))))); - - nir_intrinsic_instr *discard = - nir_intrinsic_instr_create(b.shader, nir_intrinsic_discard_if); - discard->src[0] = nir_src_for_ssa(oob); - nir_builder_instr_insert(&b, &discard->instr); - - nir_ssa_def *tex_off = nir_channels(&b, nir_load_var(&b, tex_off_in), 0x3); - nir_ssa_def *tex_pos = nir_iadd(&b, nir_vec2(&b, x_W, y_W), tex_off); - nir_ssa_def *tex_pitch = nir_channel(&b, nir_load_var(&b, tex_off_in), 2); - - nir_ssa_def *color = txf_func(&b, device, tex_pos, tex_pitch); - nir_store_var(&b, color_out, color, 0xf); - - return b.shader; -} - -void -anv_device_finish_meta_blit2d_state(struct anv_device *device) -{ - if (device->meta_state.blit2d.render_pass) { - anv_DestroyRenderPass(anv_device_to_handle(device), - device->meta_state.blit2d.render_pass, - &device->meta_state.alloc); - } - - if (device->meta_state.blit2d.img_p_layout) { - anv_DestroyPipelineLayout(anv_device_to_handle(device), - device->meta_state.blit2d.img_p_layout, - &device->meta_state.alloc); - } - - if (device->meta_state.blit2d.img_ds_layout) { - anv_DestroyDescriptorSetLayout(anv_device_to_handle(device), - device->meta_state.blit2d.img_ds_layout, - &device->meta_state.alloc); - } - - if (device->meta_state.blit2d.buf_p_layout) { - anv_DestroyPipelineLayout(anv_device_to_handle(device), - device->meta_state.blit2d.buf_p_layout, - &device->meta_state.alloc); - } - - if (device->meta_state.blit2d.buf_ds_layout) { - anv_DestroyDescriptorSetLayout(anv_device_to_handle(device), - device->meta_state.blit2d.buf_ds_layout, - &device->meta_state.alloc); - } - - for (unsigned src = 0; src < BLIT2D_NUM_SRC_TYPES; src++) { - for (unsigned dst = 0; dst < BLIT2D_NUM_DST_TYPES; dst++) { - if (device->meta_state.blit2d.pipelines[src][dst]) { - anv_DestroyPipeline(anv_device_to_handle(device), - device->meta_state.blit2d.pipelines[src][dst], - &device->meta_state.alloc); - } - } - } -} - -static VkResult -blit2d_init_pipeline(struct anv_device *device, - enum blit2d_src_type src_type, - enum blit2d_dst_type dst_type) -{ - VkResult result; - - texel_fetch_build_func src_func; - switch (src_type) { - case BLIT2D_SRC_TYPE_NORMAL: - src_func = build_nir_texel_fetch; - break; - case BLIT2D_SRC_TYPE_W_DETILE: - src_func = build_nir_w_tiled_fetch; - break; - default: - unreachable("Invalid blit2d source type"); - } - - const VkPipelineVertexInputStateCreateInfo *vi_create_info; - struct anv_shader_module fs = { .nir = NULL }; - switch (dst_type) { - case BLIT2D_DST_TYPE_NORMAL: - fs.nir = build_nir_copy_fragment_shader(device, src_func); - vi_create_info = &normal_vi_create_info; - break; - case BLIT2D_DST_TYPE_W_TILE: - fs.nir = build_nir_w_tiled_fragment_shader(device, src_func); - vi_create_info = &w_tiled_vi_create_info; - break; - case BLIT2D_DST_TYPE_RGB: - /* RGB destinations and W-detiling don't mix */ - if (src_type != BLIT2D_SRC_TYPE_NORMAL) - return VK_SUCCESS; - - fs.nir = build_nir_rgb_fragment_shader(device, src_func); - vi_create_info = &rgb_vi_create_info; - break; - default: - return VK_SUCCESS; - } - - /* We don't use a vertex shader for blitting, but instead build and pass - * the VUEs directly to the rasterization backend. However, we do need - * to provide GLSL source for the vertex shader so that the compiler - * does not dead-code our inputs. - */ - struct anv_shader_module vs = { - .nir = build_nir_vertex_shader(), - }; - - VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = { - { - .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, - .stage = VK_SHADER_STAGE_VERTEX_BIT, - .module = anv_shader_module_to_handle(&vs), - .pName = "main", - .pSpecializationInfo = NULL - }, { - .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, - .stage = VK_SHADER_STAGE_FRAGMENT_BIT, - .module = anv_shader_module_to_handle(&fs), - .pName = "main", - .pSpecializationInfo = NULL - }, - }; - - const VkGraphicsPipelineCreateInfo vk_pipeline_info = { - .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO, - .stageCount = ARRAY_SIZE(pipeline_shader_stages), - .pStages = pipeline_shader_stages, - .pVertexInputState = vi_create_info, - .pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO, - .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP, - .primitiveRestartEnable = false, - }, - .pViewportState = &(VkPipelineViewportStateCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO, - .viewportCount = 1, - .scissorCount = 1, - }, - .pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO, - .rasterizerDiscardEnable = false, - .polygonMode = VK_POLYGON_MODE_FILL, - .cullMode = VK_CULL_MODE_NONE, - .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE - }, - .pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO, - .rasterizationSamples = 1, - .sampleShadingEnable = false, - .pSampleMask = (VkSampleMask[]) { UINT32_MAX }, - }, - .pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO, - .attachmentCount = 1, - .pAttachments = (VkPipelineColorBlendAttachmentState []) { - { .colorWriteMask = - VK_COLOR_COMPONENT_A_BIT | - VK_COLOR_COMPONENT_R_BIT | - VK_COLOR_COMPONENT_G_BIT | - VK_COLOR_COMPONENT_B_BIT }, - } - }, - .pDynamicState = &(VkPipelineDynamicStateCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO, - .dynamicStateCount = 9, - .pDynamicStates = (VkDynamicState[]) { - VK_DYNAMIC_STATE_VIEWPORT, - VK_DYNAMIC_STATE_SCISSOR, - VK_DYNAMIC_STATE_LINE_WIDTH, - VK_DYNAMIC_STATE_DEPTH_BIAS, - VK_DYNAMIC_STATE_BLEND_CONSTANTS, - VK_DYNAMIC_STATE_DEPTH_BOUNDS, - VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK, - VK_DYNAMIC_STATE_STENCIL_WRITE_MASK, - VK_DYNAMIC_STATE_STENCIL_REFERENCE, - }, - }, - .flags = 0, - .layout = device->meta_state.blit2d.img_p_layout, - .renderPass = device->meta_state.blit2d.render_pass, - .subpass = 0, - }; - - const struct anv_graphics_pipeline_create_info anv_pipeline_info = { - .color_attachment_count = -1, - .use_repclear = false, - .disable_vs = true, - .use_rectlist = true - }; - - result = anv_graphics_pipeline_create(anv_device_to_handle(device), - VK_NULL_HANDLE, - &vk_pipeline_info, &anv_pipeline_info, - &device->meta_state.alloc, - &device->meta_state.blit2d.pipelines[src_type][dst_type]); - - ralloc_free(vs.nir); - ralloc_free(fs.nir); - - return result; -} - -VkResult -anv_device_init_meta_blit2d_state(struct anv_device *device) -{ - VkResult result; - - zero(device->meta_state.blit2d); - - result = anv_CreateRenderPass(anv_device_to_handle(device), - &(VkRenderPassCreateInfo) { - .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO, - .attachmentCount = 1, - .pAttachments = &(VkAttachmentDescription) { - .format = VK_FORMAT_UNDEFINED, /* Our shaders don't care */ - .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD, - .storeOp = VK_ATTACHMENT_STORE_OP_STORE, - .initialLayout = VK_IMAGE_LAYOUT_GENERAL, - .finalLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - .subpassCount = 1, - .pSubpasses = &(VkSubpassDescription) { - .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS, - .inputAttachmentCount = 0, - .colorAttachmentCount = 1, - .pColorAttachments = &(VkAttachmentReference) { - .attachment = 0, - .layout = VK_IMAGE_LAYOUT_GENERAL, - }, - .pResolveAttachments = NULL, - .pDepthStencilAttachment = &(VkAttachmentReference) { - .attachment = VK_ATTACHMENT_UNUSED, - .layout = VK_IMAGE_LAYOUT_GENERAL, - }, - .preserveAttachmentCount = 1, - .pPreserveAttachments = (uint32_t[]) { 0 }, - }, - .dependencyCount = 0, - }, &device->meta_state.alloc, &device->meta_state.blit2d.render_pass); - if (result != VK_SUCCESS) - goto fail; - - result = anv_CreateDescriptorSetLayout(anv_device_to_handle(device), - &(VkDescriptorSetLayoutCreateInfo) { - .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO, - .bindingCount = 1, - .pBindings = (VkDescriptorSetLayoutBinding[]) { - { - .binding = 0, - .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, - .descriptorCount = 1, - .stageFlags = VK_SHADER_STAGE_FRAGMENT_BIT, - .pImmutableSamplers = NULL - }, - } - }, &device->meta_state.alloc, &device->meta_state.blit2d.img_ds_layout); - if (result != VK_SUCCESS) - goto fail; - - result = anv_CreatePipelineLayout(anv_device_to_handle(device), - &(VkPipelineLayoutCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO, - .setLayoutCount = 1, - .pSetLayouts = &device->meta_state.blit2d.img_ds_layout, - }, - &device->meta_state.alloc, &device->meta_state.blit2d.img_p_layout); - if (result != VK_SUCCESS) - goto fail; - - result = anv_CreateDescriptorSetLayout(anv_device_to_handle(device), - &(VkDescriptorSetLayoutCreateInfo) { - .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO, - .bindingCount = 1, - .pBindings = (VkDescriptorSetLayoutBinding[]) { - { - .binding = 0, - .descriptorType = VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER, - .descriptorCount = 1, - .stageFlags = VK_SHADER_STAGE_FRAGMENT_BIT, - .pImmutableSamplers = NULL - }, - } - }, &device->meta_state.alloc, &device->meta_state.blit2d.buf_ds_layout); - if (result != VK_SUCCESS) - goto fail; - - result = anv_CreatePipelineLayout(anv_device_to_handle(device), - &(VkPipelineLayoutCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO, - .setLayoutCount = 1, - .pSetLayouts = &device->meta_state.blit2d.buf_ds_layout, - }, - &device->meta_state.alloc, &device->meta_state.blit2d.buf_p_layout); - if (result != VK_SUCCESS) - goto fail; - - for (unsigned src = 0; src < BLIT2D_NUM_SRC_TYPES; src++) { - for (unsigned dst = 0; dst < BLIT2D_NUM_DST_TYPES; dst++) { - result = blit2d_init_pipeline(device, src, dst); - if (result != VK_SUCCESS) - goto fail; - } - } - - return VK_SUCCESS; - -fail: - anv_device_finish_meta_blit2d_state(device); - return result; -} diff -Nru mesa-12.0.6/src/intel/vulkan/anv_meta_blit.c mesa-17.0.7/src/intel/vulkan/anv_meta_blit.c --- mesa-12.0.6/src/intel/vulkan/anv_meta_blit.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_meta_blit.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,739 +0,0 @@ -/* - * Copyright © 2015 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - -#include "anv_meta.h" -#include "nir/nir_builder.h" - -struct blit_region { - VkOffset3D src_offset; - VkExtent3D src_extent; - VkOffset3D dest_offset; - VkExtent3D dest_extent; -}; - -static nir_shader * -build_nir_vertex_shader(void) -{ - const struct glsl_type *vec4 = glsl_vec4_type(); - nir_builder b; - - nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_VERTEX, NULL); - b.shader->info.name = ralloc_strdup(b.shader, "meta_blit_vs"); - - nir_variable *pos_in = nir_variable_create(b.shader, nir_var_shader_in, - vec4, "a_pos"); - pos_in->data.location = VERT_ATTRIB_GENERIC0; - nir_variable *pos_out = nir_variable_create(b.shader, nir_var_shader_out, - vec4, "gl_Position"); - pos_out->data.location = VARYING_SLOT_POS; - nir_copy_var(&b, pos_out, pos_in); - - nir_variable *tex_pos_in = nir_variable_create(b.shader, nir_var_shader_in, - vec4, "a_tex_pos"); - tex_pos_in->data.location = VERT_ATTRIB_GENERIC1; - nir_variable *tex_pos_out = nir_variable_create(b.shader, nir_var_shader_out, - vec4, "v_tex_pos"); - tex_pos_out->data.location = VARYING_SLOT_VAR0; - tex_pos_out->data.interpolation = INTERP_QUALIFIER_SMOOTH; - nir_copy_var(&b, tex_pos_out, tex_pos_in); - - return b.shader; -} - -static nir_shader * -build_nir_copy_fragment_shader(enum glsl_sampler_dim tex_dim) -{ - const struct glsl_type *vec4 = glsl_vec4_type(); - nir_builder b; - - nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL); - b.shader->info.name = ralloc_strdup(b.shader, "meta_blit_fs"); - - nir_variable *tex_pos_in = nir_variable_create(b.shader, nir_var_shader_in, - vec4, "v_tex_pos"); - tex_pos_in->data.location = VARYING_SLOT_VAR0; - - /* Swizzle the array index which comes in as Z coordinate into the right - * position. - */ - unsigned swz[] = { 0, (tex_dim == GLSL_SAMPLER_DIM_1D ? 2 : 1), 2 }; - nir_ssa_def *const tex_pos = - nir_swizzle(&b, nir_load_var(&b, tex_pos_in), swz, - (tex_dim == GLSL_SAMPLER_DIM_1D ? 2 : 3), false); - - const struct glsl_type *sampler_type = - glsl_sampler_type(tex_dim, false, tex_dim != GLSL_SAMPLER_DIM_3D, - glsl_get_base_type(vec4)); - nir_variable *sampler = nir_variable_create(b.shader, nir_var_uniform, - sampler_type, "s_tex"); - sampler->data.descriptor_set = 0; - sampler->data.binding = 0; - - nir_tex_instr *tex = nir_tex_instr_create(b.shader, 1); - tex->sampler_dim = tex_dim; - tex->op = nir_texop_tex; - tex->src[0].src_type = nir_tex_src_coord; - tex->src[0].src = nir_src_for_ssa(tex_pos); - tex->dest_type = nir_type_float; /* TODO */ - tex->is_array = glsl_sampler_type_is_array(sampler_type); - tex->coord_components = tex_pos->num_components; - tex->texture = nir_deref_var_create(tex, sampler); - tex->sampler = nir_deref_var_create(tex, sampler); - - nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex"); - nir_builder_instr_insert(&b, &tex->instr); - - nir_variable *color_out = nir_variable_create(b.shader, nir_var_shader_out, - vec4, "f_color"); - color_out->data.location = FRAG_RESULT_DATA0; - nir_store_var(&b, color_out, &tex->dest.ssa, 0xf); - - return b.shader; -} - -static void -meta_prepare_blit(struct anv_cmd_buffer *cmd_buffer, - struct anv_meta_saved_state *saved_state) -{ - anv_meta_save(saved_state, cmd_buffer, 0); -} - -static void -meta_emit_blit(struct anv_cmd_buffer *cmd_buffer, - struct anv_image *src_image, - struct anv_image_view *src_iview, - VkOffset3D src_offset, - VkExtent3D src_extent, - struct anv_image *dest_image, - struct anv_image_view *dest_iview, - VkOffset3D dest_offset, - VkExtent3D dest_extent, - VkFilter blit_filter) -{ - struct anv_device *device = cmd_buffer->device; - - struct blit_vb_data { - float pos[2]; - float tex_coord[3]; - } *vb_data; - - assert(src_image->samples == dest_image->samples); - - unsigned vb_size = sizeof(struct anv_vue_header) + 3 * sizeof(*vb_data); - - struct anv_state vb_state = - anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, vb_size, 16); - memset(vb_state.map, 0, sizeof(struct anv_vue_header)); - vb_data = vb_state.map + sizeof(struct anv_vue_header); - - vb_data[0] = (struct blit_vb_data) { - .pos = { - dest_offset.x + dest_extent.width, - dest_offset.y + dest_extent.height, - }, - .tex_coord = { - (float)(src_offset.x + src_extent.width) - / (float)src_iview->extent.width, - (float)(src_offset.y + src_extent.height) - / (float)src_iview->extent.height, - (float)src_offset.z / (float)src_iview->extent.depth, - }, - }; - - vb_data[1] = (struct blit_vb_data) { - .pos = { - dest_offset.x, - dest_offset.y + dest_extent.height, - }, - .tex_coord = { - (float)src_offset.x / (float)src_iview->extent.width, - (float)(src_offset.y + src_extent.height) / - (float)src_iview->extent.height, - (float)src_offset.z / (float)src_iview->extent.depth, - }, - }; - - vb_data[2] = (struct blit_vb_data) { - .pos = { - dest_offset.x, - dest_offset.y, - }, - .tex_coord = { - (float)src_offset.x / (float)src_iview->extent.width, - (float)src_offset.y / (float)src_iview->extent.height, - (float)src_offset.z / (float)src_iview->extent.depth, - }, - }; - - if (!device->info.has_llc) - anv_state_clflush(vb_state); - - struct anv_buffer vertex_buffer = { - .device = device, - .size = vb_size, - .bo = &device->dynamic_state_block_pool.bo, - .offset = vb_state.offset, - }; - - anv_CmdBindVertexBuffers(anv_cmd_buffer_to_handle(cmd_buffer), 0, 2, - (VkBuffer[]) { - anv_buffer_to_handle(&vertex_buffer), - anv_buffer_to_handle(&vertex_buffer) - }, - (VkDeviceSize[]) { - 0, - sizeof(struct anv_vue_header), - }); - - VkSampler sampler; - ANV_CALL(CreateSampler)(anv_device_to_handle(device), - &(VkSamplerCreateInfo) { - .sType = VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO, - .magFilter = blit_filter, - .minFilter = blit_filter, - .addressModeU = VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE, - .addressModeV = VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE, - .addressModeW = VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE, - }, &cmd_buffer->pool->alloc, &sampler); - - VkDescriptorPool desc_pool; - anv_CreateDescriptorPool(anv_device_to_handle(device), - &(const VkDescriptorPoolCreateInfo) { - .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_POOL_CREATE_INFO, - .pNext = NULL, - .flags = 0, - .maxSets = 1, - .poolSizeCount = 1, - .pPoolSizes = (VkDescriptorPoolSize[]) { - { - .type = VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER, - .descriptorCount = 1 - }, - } - }, &cmd_buffer->pool->alloc, &desc_pool); - - VkDescriptorSet set; - anv_AllocateDescriptorSets(anv_device_to_handle(device), - &(VkDescriptorSetAllocateInfo) { - .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_ALLOCATE_INFO, - .descriptorPool = desc_pool, - .descriptorSetCount = 1, - .pSetLayouts = &device->meta_state.blit.ds_layout - }, &set); - - anv_UpdateDescriptorSets(anv_device_to_handle(device), - 1, /* writeCount */ - (VkWriteDescriptorSet[]) { - { - .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstSet = set, - .dstBinding = 0, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER, - .pImageInfo = (VkDescriptorImageInfo[]) { - { - .sampler = sampler, - .imageView = anv_image_view_to_handle(src_iview), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - } - } - }, 0, NULL); - - VkFramebuffer fb; - anv_CreateFramebuffer(anv_device_to_handle(device), - &(VkFramebufferCreateInfo) { - .sType = VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO, - .attachmentCount = 1, - .pAttachments = (VkImageView[]) { - anv_image_view_to_handle(dest_iview), - }, - .width = dest_iview->extent.width, - .height = dest_iview->extent.height, - .layers = 1 - }, &cmd_buffer->pool->alloc, &fb); - - ANV_CALL(CmdBeginRenderPass)(anv_cmd_buffer_to_handle(cmd_buffer), - &(VkRenderPassBeginInfo) { - .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, - .renderPass = device->meta_state.blit.render_pass, - .framebuffer = fb, - .renderArea = { - .offset = { dest_offset.x, dest_offset.y }, - .extent = { dest_extent.width, dest_extent.height }, - }, - .clearValueCount = 0, - .pClearValues = NULL, - }, VK_SUBPASS_CONTENTS_INLINE); - - VkPipeline pipeline; - - switch (src_image->type) { - case VK_IMAGE_TYPE_1D: - pipeline = device->meta_state.blit.pipeline_1d_src; - break; - case VK_IMAGE_TYPE_2D: - pipeline = device->meta_state.blit.pipeline_2d_src; - break; - case VK_IMAGE_TYPE_3D: - pipeline = device->meta_state.blit.pipeline_3d_src; - break; - default: - unreachable(!"bad VkImageType"); - } - - if (cmd_buffer->state.pipeline != anv_pipeline_from_handle(pipeline)) { - anv_CmdBindPipeline(anv_cmd_buffer_to_handle(cmd_buffer), - VK_PIPELINE_BIND_POINT_GRAPHICS, pipeline); - } - - anv_CmdBindDescriptorSets(anv_cmd_buffer_to_handle(cmd_buffer), - VK_PIPELINE_BIND_POINT_GRAPHICS, - device->meta_state.blit.pipeline_layout, 0, 1, - &set, 0, NULL); - - ANV_CALL(CmdDraw)(anv_cmd_buffer_to_handle(cmd_buffer), 3, 1, 0, 0); - - ANV_CALL(CmdEndRenderPass)(anv_cmd_buffer_to_handle(cmd_buffer)); - - /* At the point where we emit the draw call, all data from the - * descriptor sets, etc. has been used. We are free to delete it. - */ - anv_DestroyDescriptorPool(anv_device_to_handle(device), - desc_pool, &cmd_buffer->pool->alloc); - anv_DestroySampler(anv_device_to_handle(device), sampler, - &cmd_buffer->pool->alloc); - anv_DestroyFramebuffer(anv_device_to_handle(device), fb, - &cmd_buffer->pool->alloc); -} - -static void -meta_finish_blit(struct anv_cmd_buffer *cmd_buffer, - const struct anv_meta_saved_state *saved_state) -{ - anv_meta_restore(saved_state, cmd_buffer); -} - -void anv_CmdBlitImage( - VkCommandBuffer commandBuffer, - VkImage srcImage, - VkImageLayout srcImageLayout, - VkImage destImage, - VkImageLayout destImageLayout, - uint32_t regionCount, - const VkImageBlit* pRegions, - VkFilter filter) - -{ - ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); - ANV_FROM_HANDLE(anv_image, src_image, srcImage); - ANV_FROM_HANDLE(anv_image, dest_image, destImage); - struct anv_meta_saved_state saved_state; - - /* From the Vulkan 1.0 spec: - * - * vkCmdBlitImage must not be used for multisampled source or - * destination images. Use vkCmdResolveImage for this purpose. - */ - assert(src_image->samples == 1); - assert(dest_image->samples == 1); - - meta_prepare_blit(cmd_buffer, &saved_state); - - for (unsigned r = 0; r < regionCount; r++) { - struct anv_image_view src_iview; - anv_image_view_init(&src_iview, cmd_buffer->device, - &(VkImageViewCreateInfo) { - .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO, - .image = srcImage, - .viewType = anv_meta_get_view_type(src_image), - .format = src_image->vk_format, - .subresourceRange = { - .aspectMask = pRegions[r].srcSubresource.aspectMask, - .baseMipLevel = pRegions[r].srcSubresource.mipLevel, - .levelCount = 1, - .baseArrayLayer = pRegions[r].srcSubresource.baseArrayLayer, - .layerCount = 1 - }, - }, - cmd_buffer, VK_IMAGE_USAGE_SAMPLED_BIT); - - const VkOffset3D dest_offset = { - .x = pRegions[r].dstOffsets[0].x, - .y = pRegions[r].dstOffsets[0].y, - .z = 0, - }; - - if (pRegions[r].dstOffsets[1].x < pRegions[r].dstOffsets[0].x || - pRegions[r].dstOffsets[1].y < pRegions[r].dstOffsets[0].y || - pRegions[r].srcOffsets[1].x < pRegions[r].srcOffsets[0].x || - pRegions[r].srcOffsets[1].y < pRegions[r].srcOffsets[0].y) - anv_finishme("FINISHME: Allow flipping in blits"); - - const VkExtent3D dest_extent = { - .width = pRegions[r].dstOffsets[1].x - pRegions[r].dstOffsets[0].x, - .height = pRegions[r].dstOffsets[1].y - pRegions[r].dstOffsets[0].y, - }; - - const VkExtent3D src_extent = { - .width = pRegions[r].srcOffsets[1].x - pRegions[r].srcOffsets[0].x, - .height = pRegions[r].srcOffsets[1].y - pRegions[r].srcOffsets[0].y, - }; - - const uint32_t dest_array_slice = - anv_meta_get_iview_layer(dest_image, &pRegions[r].dstSubresource, - &pRegions[r].dstOffsets[0]); - - if (pRegions[r].srcSubresource.layerCount > 1) - anv_finishme("FINISHME: copy multiple array layers"); - - if (pRegions[r].srcOffsets[0].z + 1 != pRegions[r].srcOffsets[1].z || - pRegions[r].dstOffsets[0].z + 1 != pRegions[r].dstOffsets[1].z) - anv_finishme("FINISHME: copy multiple depth layers"); - - struct anv_image_view dest_iview; - anv_image_view_init(&dest_iview, cmd_buffer->device, - &(VkImageViewCreateInfo) { - .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO, - .image = destImage, - .viewType = anv_meta_get_view_type(dest_image), - .format = dest_image->vk_format, - .subresourceRange = { - .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT, - .baseMipLevel = pRegions[r].dstSubresource.mipLevel, - .levelCount = 1, - .baseArrayLayer = dest_array_slice, - .layerCount = 1 - }, - }, - cmd_buffer, VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT); - - meta_emit_blit(cmd_buffer, - src_image, &src_iview, - pRegions[r].srcOffsets[0], src_extent, - dest_image, &dest_iview, - dest_offset, dest_extent, - filter); - } - - meta_finish_blit(cmd_buffer, &saved_state); -} - -void -anv_device_finish_meta_blit_state(struct anv_device *device) -{ - anv_DestroyRenderPass(anv_device_to_handle(device), - device->meta_state.blit.render_pass, - &device->meta_state.alloc); - anv_DestroyPipeline(anv_device_to_handle(device), - device->meta_state.blit.pipeline_1d_src, - &device->meta_state.alloc); - anv_DestroyPipeline(anv_device_to_handle(device), - device->meta_state.blit.pipeline_2d_src, - &device->meta_state.alloc); - anv_DestroyPipeline(anv_device_to_handle(device), - device->meta_state.blit.pipeline_3d_src, - &device->meta_state.alloc); - anv_DestroyPipelineLayout(anv_device_to_handle(device), - device->meta_state.blit.pipeline_layout, - &device->meta_state.alloc); - anv_DestroyDescriptorSetLayout(anv_device_to_handle(device), - device->meta_state.blit.ds_layout, - &device->meta_state.alloc); -} - -VkResult -anv_device_init_meta_blit_state(struct anv_device *device) -{ - VkResult result; - - result = anv_CreateRenderPass(anv_device_to_handle(device), - &(VkRenderPassCreateInfo) { - .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO, - .attachmentCount = 1, - .pAttachments = &(VkAttachmentDescription) { - .format = VK_FORMAT_UNDEFINED, /* Our shaders don't care */ - .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD, - .storeOp = VK_ATTACHMENT_STORE_OP_STORE, - .initialLayout = VK_IMAGE_LAYOUT_GENERAL, - .finalLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - .subpassCount = 1, - .pSubpasses = &(VkSubpassDescription) { - .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS, - .inputAttachmentCount = 0, - .colorAttachmentCount = 1, - .pColorAttachments = &(VkAttachmentReference) { - .attachment = 0, - .layout = VK_IMAGE_LAYOUT_GENERAL, - }, - .pResolveAttachments = NULL, - .pDepthStencilAttachment = &(VkAttachmentReference) { - .attachment = VK_ATTACHMENT_UNUSED, - .layout = VK_IMAGE_LAYOUT_GENERAL, - }, - .preserveAttachmentCount = 1, - .pPreserveAttachments = (uint32_t[]) { 0 }, - }, - .dependencyCount = 0, - }, &device->meta_state.alloc, &device->meta_state.blit.render_pass); - if (result != VK_SUCCESS) - goto fail; - - /* We don't use a vertex shader for blitting, but instead build and pass - * the VUEs directly to the rasterization backend. However, we do need - * to provide GLSL source for the vertex shader so that the compiler - * does not dead-code our inputs. - */ - struct anv_shader_module vs = { - .nir = build_nir_vertex_shader(), - }; - - struct anv_shader_module fs_1d = { - .nir = build_nir_copy_fragment_shader(GLSL_SAMPLER_DIM_1D), - }; - - struct anv_shader_module fs_2d = { - .nir = build_nir_copy_fragment_shader(GLSL_SAMPLER_DIM_2D), - }; - - struct anv_shader_module fs_3d = { - .nir = build_nir_copy_fragment_shader(GLSL_SAMPLER_DIM_3D), - }; - - VkPipelineVertexInputStateCreateInfo vi_create_info = { - .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO, - .vertexBindingDescriptionCount = 2, - .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) { - { - .binding = 0, - .stride = 0, - .inputRate = VK_VERTEX_INPUT_RATE_INSTANCE - }, - { - .binding = 1, - .stride = 5 * sizeof(float), - .inputRate = VK_VERTEX_INPUT_RATE_VERTEX - }, - }, - .vertexAttributeDescriptionCount = 3, - .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) { - { - /* VUE Header */ - .location = 0, - .binding = 0, - .format = VK_FORMAT_R32G32B32A32_UINT, - .offset = 0 - }, - { - /* Position */ - .location = 1, - .binding = 1, - .format = VK_FORMAT_R32G32_SFLOAT, - .offset = 0 - }, - { - /* Texture Coordinate */ - .location = 2, - .binding = 1, - .format = VK_FORMAT_R32G32B32_SFLOAT, - .offset = 8 - } - } - }; - - VkDescriptorSetLayoutCreateInfo ds_layout_info = { - .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO, - .bindingCount = 1, - .pBindings = (VkDescriptorSetLayoutBinding[]) { - { - .binding = 0, - .descriptorType = VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER, - .descriptorCount = 1, - .stageFlags = VK_SHADER_STAGE_FRAGMENT_BIT, - .pImmutableSamplers = NULL - }, - } - }; - result = anv_CreateDescriptorSetLayout(anv_device_to_handle(device), - &ds_layout_info, - &device->meta_state.alloc, - &device->meta_state.blit.ds_layout); - if (result != VK_SUCCESS) - goto fail_render_pass; - - result = anv_CreatePipelineLayout(anv_device_to_handle(device), - &(VkPipelineLayoutCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO, - .setLayoutCount = 1, - .pSetLayouts = &device->meta_state.blit.ds_layout, - }, - &device->meta_state.alloc, &device->meta_state.blit.pipeline_layout); - if (result != VK_SUCCESS) - goto fail_descriptor_set_layout; - - VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = { - { - .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, - .stage = VK_SHADER_STAGE_VERTEX_BIT, - .module = anv_shader_module_to_handle(&vs), - .pName = "main", - .pSpecializationInfo = NULL - }, { - .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, - .stage = VK_SHADER_STAGE_FRAGMENT_BIT, - .module = VK_NULL_HANDLE, /* TEMPLATE VALUE! FILL ME IN! */ - .pName = "main", - .pSpecializationInfo = NULL - }, - }; - - const VkGraphicsPipelineCreateInfo vk_pipeline_info = { - .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO, - .stageCount = ARRAY_SIZE(pipeline_shader_stages), - .pStages = pipeline_shader_stages, - .pVertexInputState = &vi_create_info, - .pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO, - .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP, - .primitiveRestartEnable = false, - }, - .pViewportState = &(VkPipelineViewportStateCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO, - .viewportCount = 1, - .scissorCount = 1, - }, - .pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO, - .rasterizerDiscardEnable = false, - .polygonMode = VK_POLYGON_MODE_FILL, - .cullMode = VK_CULL_MODE_NONE, - .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE - }, - .pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO, - .rasterizationSamples = 1, - .sampleShadingEnable = false, - .pSampleMask = (VkSampleMask[]) { UINT32_MAX }, - }, - .pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO, - .attachmentCount = 1, - .pAttachments = (VkPipelineColorBlendAttachmentState []) { - { .colorWriteMask = - VK_COLOR_COMPONENT_A_BIT | - VK_COLOR_COMPONENT_R_BIT | - VK_COLOR_COMPONENT_G_BIT | - VK_COLOR_COMPONENT_B_BIT }, - } - }, - .pDynamicState = &(VkPipelineDynamicStateCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO, - .dynamicStateCount = 9, - .pDynamicStates = (VkDynamicState[]) { - VK_DYNAMIC_STATE_VIEWPORT, - VK_DYNAMIC_STATE_SCISSOR, - VK_DYNAMIC_STATE_LINE_WIDTH, - VK_DYNAMIC_STATE_DEPTH_BIAS, - VK_DYNAMIC_STATE_BLEND_CONSTANTS, - VK_DYNAMIC_STATE_DEPTH_BOUNDS, - VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK, - VK_DYNAMIC_STATE_STENCIL_WRITE_MASK, - VK_DYNAMIC_STATE_STENCIL_REFERENCE, - }, - }, - .flags = 0, - .layout = device->meta_state.blit.pipeline_layout, - .renderPass = device->meta_state.blit.render_pass, - .subpass = 0, - }; - - const struct anv_graphics_pipeline_create_info anv_pipeline_info = { - .color_attachment_count = -1, - .use_repclear = false, - .disable_vs = true, - .use_rectlist = true - }; - - pipeline_shader_stages[1].module = anv_shader_module_to_handle(&fs_1d); - result = anv_graphics_pipeline_create(anv_device_to_handle(device), - VK_NULL_HANDLE, - &vk_pipeline_info, &anv_pipeline_info, - &device->meta_state.alloc, &device->meta_state.blit.pipeline_1d_src); - if (result != VK_SUCCESS) - goto fail_pipeline_layout; - - pipeline_shader_stages[1].module = anv_shader_module_to_handle(&fs_2d); - result = anv_graphics_pipeline_create(anv_device_to_handle(device), - VK_NULL_HANDLE, - &vk_pipeline_info, &anv_pipeline_info, - &device->meta_state.alloc, &device->meta_state.blit.pipeline_2d_src); - if (result != VK_SUCCESS) - goto fail_pipeline_1d; - - pipeline_shader_stages[1].module = anv_shader_module_to_handle(&fs_3d); - result = anv_graphics_pipeline_create(anv_device_to_handle(device), - VK_NULL_HANDLE, - &vk_pipeline_info, &anv_pipeline_info, - &device->meta_state.alloc, &device->meta_state.blit.pipeline_3d_src); - if (result != VK_SUCCESS) - goto fail_pipeline_2d; - - ralloc_free(vs.nir); - ralloc_free(fs_1d.nir); - ralloc_free(fs_2d.nir); - ralloc_free(fs_3d.nir); - - return VK_SUCCESS; - - fail_pipeline_2d: - anv_DestroyPipeline(anv_device_to_handle(device), - device->meta_state.blit.pipeline_2d_src, - &device->meta_state.alloc); - - fail_pipeline_1d: - anv_DestroyPipeline(anv_device_to_handle(device), - device->meta_state.blit.pipeline_1d_src, - &device->meta_state.alloc); - - fail_pipeline_layout: - anv_DestroyPipelineLayout(anv_device_to_handle(device), - device->meta_state.blit.pipeline_layout, - &device->meta_state.alloc); - fail_descriptor_set_layout: - anv_DestroyDescriptorSetLayout(anv_device_to_handle(device), - device->meta_state.blit.ds_layout, - &device->meta_state.alloc); - fail_render_pass: - anv_DestroyRenderPass(anv_device_to_handle(device), - device->meta_state.blit.render_pass, - &device->meta_state.alloc); - - ralloc_free(vs.nir); - ralloc_free(fs_1d.nir); - ralloc_free(fs_2d.nir); - ralloc_free(fs_3d.nir); - fail: - return result; -} diff -Nru mesa-12.0.6/src/intel/vulkan/anv_meta.c mesa-17.0.7/src/intel/vulkan/anv_meta.c --- mesa-12.0.6/src/intel/vulkan/anv_meta.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_meta.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,176 +0,0 @@ -/* - * Copyright © 2015 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - -#include "anv_meta.h" - -struct anv_render_pass anv_meta_dummy_renderpass = {0}; - -void -anv_meta_save(struct anv_meta_saved_state *state, - const struct anv_cmd_buffer *cmd_buffer, - uint32_t dynamic_mask) -{ - state->old_pipeline = cmd_buffer->state.pipeline; - state->old_descriptor_set0 = cmd_buffer->state.descriptors[0]; - memcpy(state->old_vertex_bindings, cmd_buffer->state.vertex_bindings, - sizeof(state->old_vertex_bindings)); - - state->dynamic_mask = dynamic_mask; - anv_dynamic_state_copy(&state->dynamic, &cmd_buffer->state.dynamic, - dynamic_mask); -} - -void -anv_meta_restore(const struct anv_meta_saved_state *state, - struct anv_cmd_buffer *cmd_buffer) -{ - cmd_buffer->state.pipeline = state->old_pipeline; - cmd_buffer->state.descriptors[0] = state->old_descriptor_set0; - memcpy(cmd_buffer->state.vertex_bindings, state->old_vertex_bindings, - sizeof(state->old_vertex_bindings)); - - cmd_buffer->state.vb_dirty |= (1 << ANV_META_VERTEX_BINDING_COUNT) - 1; - cmd_buffer->state.dirty |= ANV_CMD_DIRTY_PIPELINE; - cmd_buffer->state.descriptors_dirty |= VK_SHADER_STAGE_FRAGMENT_BIT; - - anv_dynamic_state_copy(&cmd_buffer->state.dynamic, &state->dynamic, - state->dynamic_mask); - cmd_buffer->state.dirty |= state->dynamic_mask; - - /* Since we've used the pipeline with the VS disabled, set - * need_query_wa. See CmdBeginQuery. - */ - cmd_buffer->state.need_query_wa = true; -} - -VkImageViewType -anv_meta_get_view_type(const struct anv_image *image) -{ - switch (image->type) { - case VK_IMAGE_TYPE_1D: return VK_IMAGE_VIEW_TYPE_1D; - case VK_IMAGE_TYPE_2D: return VK_IMAGE_VIEW_TYPE_2D; - case VK_IMAGE_TYPE_3D: return VK_IMAGE_VIEW_TYPE_3D; - default: - unreachable("bad VkImageViewType"); - } -} - -/** - * When creating a destination VkImageView, this function provides the needed - * VkImageViewCreateInfo::subresourceRange::baseArrayLayer. - */ -uint32_t -anv_meta_get_iview_layer(const struct anv_image *dest_image, - const VkImageSubresourceLayers *dest_subresource, - const VkOffset3D *dest_offset) -{ - switch (dest_image->type) { - case VK_IMAGE_TYPE_1D: - case VK_IMAGE_TYPE_2D: - return dest_subresource->baseArrayLayer; - case VK_IMAGE_TYPE_3D: - /* HACK: Vulkan does not allow attaching a 3D image to a framebuffer, - * but meta does it anyway. When doing so, we translate the - * destination's z offset into an array offset. - */ - return dest_offset->z; - default: - assert(!"bad VkImageType"); - return 0; - } -} - -static void * -meta_alloc(void* _device, size_t size, size_t alignment, - VkSystemAllocationScope allocationScope) -{ - struct anv_device *device = _device; - return device->alloc.pfnAllocation(device->alloc.pUserData, size, alignment, - VK_SYSTEM_ALLOCATION_SCOPE_DEVICE); -} - -static void * -meta_realloc(void* _device, void *original, size_t size, size_t alignment, - VkSystemAllocationScope allocationScope) -{ - struct anv_device *device = _device; - return device->alloc.pfnReallocation(device->alloc.pUserData, original, - size, alignment, - VK_SYSTEM_ALLOCATION_SCOPE_DEVICE); -} - -static void -meta_free(void* _device, void *data) -{ - struct anv_device *device = _device; - return device->alloc.pfnFree(device->alloc.pUserData, data); -} - -VkResult -anv_device_init_meta(struct anv_device *device) -{ - VkResult result; - - device->meta_state.alloc = (VkAllocationCallbacks) { - .pUserData = device, - .pfnAllocation = meta_alloc, - .pfnReallocation = meta_realloc, - .pfnFree = meta_free, - }; - - result = anv_device_init_meta_clear_state(device); - if (result != VK_SUCCESS) - goto fail_clear; - - result = anv_device_init_meta_resolve_state(device); - if (result != VK_SUCCESS) - goto fail_resolve; - - result = anv_device_init_meta_blit_state(device); - if (result != VK_SUCCESS) - goto fail_blit; - - result = anv_device_init_meta_blit2d_state(device); - if (result != VK_SUCCESS) - goto fail_blit2d; - - return VK_SUCCESS; - -fail_blit2d: - anv_device_finish_meta_blit_state(device); -fail_blit: - anv_device_finish_meta_resolve_state(device); -fail_resolve: - anv_device_finish_meta_clear_state(device); -fail_clear: - return result; -} - -void -anv_device_finish_meta(struct anv_device *device) -{ - anv_device_finish_meta_resolve_state(device); - anv_device_finish_meta_clear_state(device); - anv_device_finish_meta_blit_state(device); - anv_device_finish_meta_blit2d_state(device); -} diff -Nru mesa-12.0.6/src/intel/vulkan/anv_meta_clear.c mesa-17.0.7/src/intel/vulkan/anv_meta_clear.c --- mesa-12.0.6/src/intel/vulkan/anv_meta_clear.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_meta_clear.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,1081 +0,0 @@ -/* - * Copyright © 2015 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - -#include "anv_meta.h" -#include "anv_private.h" -#include "nir/nir_builder.h" - -#include "util/u_format_rgb9e5.h" - -/** Vertex attributes for color clears. */ -struct color_clear_vattrs { - struct anv_vue_header vue_header; - float position[2]; /**< 3DPRIM_RECTLIST */ - VkClearColorValue color; -}; - -/** Vertex attributes for depthstencil clears. */ -struct depthstencil_clear_vattrs { - struct anv_vue_header vue_header; - float position[2]; /*<< 3DPRIM_RECTLIST */ -}; - -static void -meta_clear_begin(struct anv_meta_saved_state *saved_state, - struct anv_cmd_buffer *cmd_buffer) -{ - anv_meta_save(saved_state, cmd_buffer, - (1 << VK_DYNAMIC_STATE_VIEWPORT) | - (1 << VK_DYNAMIC_STATE_STENCIL_REFERENCE) | - (1 << VK_DYNAMIC_STATE_STENCIL_WRITE_MASK)); - - /* Avoid uploading more viewport states than necessary */ - cmd_buffer->state.dynamic.viewport.count = 0; -} - -static void -meta_clear_end(struct anv_meta_saved_state *saved_state, - struct anv_cmd_buffer *cmd_buffer) -{ - anv_meta_restore(saved_state, cmd_buffer); -} - -static void -build_color_shaders(struct nir_shader **out_vs, - struct nir_shader **out_fs, - uint32_t frag_output) -{ - nir_builder vs_b; - nir_builder fs_b; - - nir_builder_init_simple_shader(&vs_b, NULL, MESA_SHADER_VERTEX, NULL); - nir_builder_init_simple_shader(&fs_b, NULL, MESA_SHADER_FRAGMENT, NULL); - - vs_b.shader->info.name = ralloc_strdup(vs_b.shader, "meta_clear_color_vs"); - fs_b.shader->info.name = ralloc_strdup(fs_b.shader, "meta_clear_color_fs"); - - const struct glsl_type *position_type = glsl_vec4_type(); - const struct glsl_type *color_type = glsl_vec4_type(); - - nir_variable *vs_in_pos = - nir_variable_create(vs_b.shader, nir_var_shader_in, position_type, - "a_position"); - vs_in_pos->data.location = VERT_ATTRIB_GENERIC0; - - nir_variable *vs_out_pos = - nir_variable_create(vs_b.shader, nir_var_shader_out, position_type, - "gl_Position"); - vs_out_pos->data.location = VARYING_SLOT_POS; - - nir_variable *vs_in_color = - nir_variable_create(vs_b.shader, nir_var_shader_in, color_type, - "a_color"); - vs_in_color->data.location = VERT_ATTRIB_GENERIC1; - - nir_variable *vs_out_color = - nir_variable_create(vs_b.shader, nir_var_shader_out, color_type, - "v_color"); - vs_out_color->data.location = VARYING_SLOT_VAR0; - vs_out_color->data.interpolation = INTERP_QUALIFIER_FLAT; - - nir_variable *fs_in_color = - nir_variable_create(fs_b.shader, nir_var_shader_in, color_type, - "v_color"); - fs_in_color->data.location = vs_out_color->data.location; - fs_in_color->data.interpolation = vs_out_color->data.interpolation; - - nir_variable *fs_out_color = - nir_variable_create(fs_b.shader, nir_var_shader_out, color_type, - "f_color"); - fs_out_color->data.location = FRAG_RESULT_DATA0 + frag_output; - - nir_copy_var(&vs_b, vs_out_pos, vs_in_pos); - nir_copy_var(&vs_b, vs_out_color, vs_in_color); - nir_copy_var(&fs_b, fs_out_color, fs_in_color); - - *out_vs = vs_b.shader; - *out_fs = fs_b.shader; -} - -static VkResult -create_pipeline(struct anv_device *device, - uint32_t samples, - struct nir_shader *vs_nir, - struct nir_shader *fs_nir, - const VkPipelineVertexInputStateCreateInfo *vi_state, - const VkPipelineDepthStencilStateCreateInfo *ds_state, - const VkPipelineColorBlendStateCreateInfo *cb_state, - const VkAllocationCallbacks *alloc, - bool use_repclear, - struct anv_pipeline **pipeline) -{ - VkDevice device_h = anv_device_to_handle(device); - VkResult result; - - struct anv_shader_module vs_m = { .nir = vs_nir }; - struct anv_shader_module fs_m = { .nir = fs_nir }; - - VkPipeline pipeline_h = VK_NULL_HANDLE; - result = anv_graphics_pipeline_create(device_h, - VK_NULL_HANDLE, - &(VkGraphicsPipelineCreateInfo) { - .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO, - .stageCount = fs_nir ? 2 : 1, - .pStages = (VkPipelineShaderStageCreateInfo[]) { - { - .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, - .stage = VK_SHADER_STAGE_VERTEX_BIT, - .module = anv_shader_module_to_handle(&vs_m), - .pName = "main", - }, - { - .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, - .stage = VK_SHADER_STAGE_FRAGMENT_BIT, - .module = anv_shader_module_to_handle(&fs_m), - .pName = "main", - }, - }, - .pVertexInputState = vi_state, - .pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO, - .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP, - .primitiveRestartEnable = false, - }, - .pViewportState = &(VkPipelineViewportStateCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO, - .viewportCount = 1, - .pViewports = NULL, /* dynamic */ - .scissorCount = 1, - .pScissors = NULL, /* dynamic */ - }, - .pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO, - .rasterizerDiscardEnable = false, - .polygonMode = VK_POLYGON_MODE_FILL, - .cullMode = VK_CULL_MODE_NONE, - .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE, - .depthBiasEnable = false, - .depthClampEnable = true, - }, - .pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO, - .rasterizationSamples = samples, - .sampleShadingEnable = false, - .pSampleMask = (VkSampleMask[]) { ~0 }, - .alphaToCoverageEnable = false, - .alphaToOneEnable = false, - }, - .pDepthStencilState = ds_state, - .pColorBlendState = cb_state, - .pDynamicState = &(VkPipelineDynamicStateCreateInfo) { - /* The meta clear pipeline declares all state as dynamic. - * As a consequence, vkCmdBindPipeline writes no dynamic state - * to the cmd buffer. Therefore, at the end of the meta clear, - * we need only restore dynamic state was vkCmdSet. - */ - .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO, - .dynamicStateCount = 8, - .pDynamicStates = (VkDynamicState[]) { - /* Everything except stencil write mask */ - VK_DYNAMIC_STATE_VIEWPORT, - VK_DYNAMIC_STATE_SCISSOR, - VK_DYNAMIC_STATE_LINE_WIDTH, - VK_DYNAMIC_STATE_DEPTH_BIAS, - VK_DYNAMIC_STATE_BLEND_CONSTANTS, - VK_DYNAMIC_STATE_DEPTH_BOUNDS, - VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK, - VK_DYNAMIC_STATE_STENCIL_REFERENCE, - }, - }, - .flags = 0, - .renderPass = anv_render_pass_to_handle(&anv_meta_dummy_renderpass), - .subpass = 0, - }, - &(struct anv_graphics_pipeline_create_info) { - .color_attachment_count = MAX_RTS, - .use_repclear = use_repclear, - .disable_vs = true, - .use_rectlist = true - }, - alloc, - &pipeline_h); - - ralloc_free(vs_nir); - ralloc_free(fs_nir); - - *pipeline = anv_pipeline_from_handle(pipeline_h); - - return result; -} - -static VkResult -create_color_pipeline(struct anv_device *device, - uint32_t samples, - uint32_t frag_output, - struct anv_pipeline **pipeline) -{ - struct nir_shader *vs_nir; - struct nir_shader *fs_nir; - build_color_shaders(&vs_nir, &fs_nir, frag_output); - - const VkPipelineVertexInputStateCreateInfo vi_state = { - .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO, - .vertexBindingDescriptionCount = 1, - .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) { - { - .binding = 0, - .stride = sizeof(struct color_clear_vattrs), - .inputRate = VK_VERTEX_INPUT_RATE_VERTEX - }, - }, - .vertexAttributeDescriptionCount = 3, - .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) { - { - /* VUE Header */ - .location = 0, - .binding = 0, - .format = VK_FORMAT_R32G32B32A32_UINT, - .offset = offsetof(struct color_clear_vattrs, vue_header), - }, - { - /* Position */ - .location = 1, - .binding = 0, - .format = VK_FORMAT_R32G32_SFLOAT, - .offset = offsetof(struct color_clear_vattrs, position), - }, - { - /* Color */ - .location = 2, - .binding = 0, - .format = VK_FORMAT_R32G32B32A32_SFLOAT, - .offset = offsetof(struct color_clear_vattrs, color), - }, - }, - }; - - const VkPipelineDepthStencilStateCreateInfo ds_state = { - .sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO, - .depthTestEnable = false, - .depthWriteEnable = false, - .depthBoundsTestEnable = false, - .stencilTestEnable = false, - }; - - VkPipelineColorBlendAttachmentState blend_attachment_state[MAX_RTS] = { 0 }; - blend_attachment_state[frag_output] = (VkPipelineColorBlendAttachmentState) { - .blendEnable = false, - .colorWriteMask = VK_COLOR_COMPONENT_A_BIT | - VK_COLOR_COMPONENT_R_BIT | - VK_COLOR_COMPONENT_G_BIT | - VK_COLOR_COMPONENT_B_BIT, - }; - - const VkPipelineColorBlendStateCreateInfo cb_state = { - .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO, - .logicOpEnable = false, - .attachmentCount = MAX_RTS, - .pAttachments = blend_attachment_state - }; - - /* Use the repclear shader. Since the NIR shader we are providing has - * exactly one output, that output will get compacted down to binding - * table entry 0. The hard-coded repclear shader is then exactly what - * we want regardless of what attachment we are actually clearing. - */ - return - create_pipeline(device, samples, vs_nir, fs_nir, &vi_state, &ds_state, - &cb_state, &device->meta_state.alloc, - /*use_repclear*/ true, pipeline); -} - -static void -destroy_pipeline(struct anv_device *device, struct anv_pipeline *pipeline) -{ - if (!pipeline) - return; - - ANV_CALL(DestroyPipeline)(anv_device_to_handle(device), - anv_pipeline_to_handle(pipeline), - &device->meta_state.alloc); -} - -void -anv_device_finish_meta_clear_state(struct anv_device *device) -{ - struct anv_meta_state *state = &device->meta_state; - - for (uint32_t i = 0; i < ARRAY_SIZE(state->clear); ++i) { - for (uint32_t j = 0; j < ARRAY_SIZE(state->clear[i].color_pipelines); ++j) { - destroy_pipeline(device, state->clear[i].color_pipelines[j]); - } - - destroy_pipeline(device, state->clear[i].depth_only_pipeline); - destroy_pipeline(device, state->clear[i].stencil_only_pipeline); - destroy_pipeline(device, state->clear[i].depthstencil_pipeline); - } -} - -static void -emit_color_clear(struct anv_cmd_buffer *cmd_buffer, - const VkClearAttachment *clear_att, - const VkClearRect *clear_rect) -{ - struct anv_device *device = cmd_buffer->device; - const struct anv_subpass *subpass = cmd_buffer->state.subpass; - const struct anv_framebuffer *fb = cmd_buffer->state.framebuffer; - const uint32_t subpass_att = clear_att->colorAttachment; - const uint32_t pass_att = subpass->color_attachments[subpass_att]; - const struct anv_image_view *iview = fb->attachments[pass_att]; - const uint32_t samples = iview->image->samples; - const uint32_t samples_log2 = ffs(samples) - 1; - struct anv_pipeline *pipeline = - device->meta_state.clear[samples_log2].color_pipelines[subpass_att]; - VkClearColorValue clear_value = clear_att->clearValue.color; - - VkCommandBuffer cmd_buffer_h = anv_cmd_buffer_to_handle(cmd_buffer); - VkPipeline pipeline_h = anv_pipeline_to_handle(pipeline); - - assert(samples_log2 < ARRAY_SIZE(device->meta_state.clear)); - assert(clear_att->aspectMask == VK_IMAGE_ASPECT_COLOR_BIT); - assert(clear_att->colorAttachment < subpass->color_count); - - const struct color_clear_vattrs vertex_data[3] = { - { - .vue_header = { 0 }, - .position = { - clear_rect->rect.offset.x, - clear_rect->rect.offset.y, - }, - .color = clear_value, - }, - { - .vue_header = { 0 }, - .position = { - clear_rect->rect.offset.x + clear_rect->rect.extent.width, - clear_rect->rect.offset.y, - }, - .color = clear_value, - }, - { - .vue_header = { 0 }, - .position = { - clear_rect->rect.offset.x + clear_rect->rect.extent.width, - clear_rect->rect.offset.y + clear_rect->rect.extent.height, - }, - .color = clear_value, - }, - }; - - struct anv_state state = - anv_cmd_buffer_emit_dynamic(cmd_buffer, vertex_data, sizeof(vertex_data), 16); - - struct anv_buffer vertex_buffer = { - .device = device, - .size = sizeof(vertex_data), - .bo = &device->dynamic_state_block_pool.bo, - .offset = state.offset, - }; - - ANV_CALL(CmdBindVertexBuffers)(cmd_buffer_h, 0, 1, - (VkBuffer[]) { anv_buffer_to_handle(&vertex_buffer) }, - (VkDeviceSize[]) { 0 }); - - if (cmd_buffer->state.pipeline != pipeline) { - ANV_CALL(CmdBindPipeline)(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS, - pipeline_h); - } - - ANV_CALL(CmdDraw)(cmd_buffer_h, 3, 1, 0, 0); -} - - -static void -build_depthstencil_shader(struct nir_shader **out_vs) -{ - nir_builder vs_b; - - nir_builder_init_simple_shader(&vs_b, NULL, MESA_SHADER_VERTEX, NULL); - - vs_b.shader->info.name = ralloc_strdup(vs_b.shader, "meta_clear_depthstencil_vs"); - - const struct glsl_type *position_type = glsl_vec4_type(); - - nir_variable *vs_in_pos = - nir_variable_create(vs_b.shader, nir_var_shader_in, position_type, - "a_position"); - vs_in_pos->data.location = VERT_ATTRIB_GENERIC0; - - nir_variable *vs_out_pos = - nir_variable_create(vs_b.shader, nir_var_shader_out, position_type, - "gl_Position"); - vs_out_pos->data.location = VARYING_SLOT_POS; - - nir_copy_var(&vs_b, vs_out_pos, vs_in_pos); - - *out_vs = vs_b.shader; -} - -static VkResult -create_depthstencil_pipeline(struct anv_device *device, - VkImageAspectFlags aspects, - uint32_t samples, - struct anv_pipeline **pipeline) -{ - struct nir_shader *vs_nir; - - build_depthstencil_shader(&vs_nir); - - const VkPipelineVertexInputStateCreateInfo vi_state = { - .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO, - .vertexBindingDescriptionCount = 1, - .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) { - { - .binding = 0, - .stride = sizeof(struct depthstencil_clear_vattrs), - .inputRate = VK_VERTEX_INPUT_RATE_VERTEX - }, - }, - .vertexAttributeDescriptionCount = 2, - .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) { - { - /* VUE Header */ - .location = 0, - .binding = 0, - .format = VK_FORMAT_R32G32B32A32_UINT, - .offset = offsetof(struct depthstencil_clear_vattrs, vue_header), - }, - { - /* Position */ - .location = 1, - .binding = 0, - .format = VK_FORMAT_R32G32_SFLOAT, - .offset = offsetof(struct depthstencil_clear_vattrs, position), - }, - }, - }; - - const VkPipelineDepthStencilStateCreateInfo ds_state = { - .sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO, - .depthTestEnable = (aspects & VK_IMAGE_ASPECT_DEPTH_BIT), - .depthCompareOp = VK_COMPARE_OP_ALWAYS, - .depthWriteEnable = (aspects & VK_IMAGE_ASPECT_DEPTH_BIT), - .depthBoundsTestEnable = false, - .stencilTestEnable = (aspects & VK_IMAGE_ASPECT_STENCIL_BIT), - .front = { - .passOp = VK_STENCIL_OP_REPLACE, - .compareOp = VK_COMPARE_OP_ALWAYS, - .writeMask = UINT32_MAX, - .reference = 0, /* dynamic */ - }, - .back = { 0 /* dont care */ }, - }; - - const VkPipelineColorBlendStateCreateInfo cb_state = { - .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO, - .logicOpEnable = false, - .attachmentCount = 0, - .pAttachments = NULL, - }; - - return create_pipeline(device, samples, vs_nir, NULL, &vi_state, &ds_state, - &cb_state, &device->meta_state.alloc, - /*use_repclear*/ true, pipeline); -} - -static void -emit_depthstencil_clear(struct anv_cmd_buffer *cmd_buffer, - const VkClearAttachment *clear_att, - const VkClearRect *clear_rect) -{ - struct anv_device *device = cmd_buffer->device; - struct anv_meta_state *meta_state = &device->meta_state; - const struct anv_subpass *subpass = cmd_buffer->state.subpass; - const struct anv_framebuffer *fb = cmd_buffer->state.framebuffer; - const uint32_t pass_att = subpass->depth_stencil_attachment; - const struct anv_image_view *iview = fb->attachments[pass_att]; - const uint32_t samples = iview->image->samples; - const uint32_t samples_log2 = ffs(samples) - 1; - VkClearDepthStencilValue clear_value = clear_att->clearValue.depthStencil; - VkImageAspectFlags aspects = clear_att->aspectMask; - - VkCommandBuffer cmd_buffer_h = anv_cmd_buffer_to_handle(cmd_buffer); - - assert(samples_log2 < ARRAY_SIZE(meta_state->clear)); - assert(aspects == VK_IMAGE_ASPECT_DEPTH_BIT || - aspects == VK_IMAGE_ASPECT_STENCIL_BIT || - aspects == (VK_IMAGE_ASPECT_DEPTH_BIT | - VK_IMAGE_ASPECT_STENCIL_BIT)); - assert(pass_att != VK_ATTACHMENT_UNUSED); - - const struct depthstencil_clear_vattrs vertex_data[3] = { - { - .vue_header = { 0 }, - .position = { - clear_rect->rect.offset.x, - clear_rect->rect.offset.y, - }, - }, - { - .vue_header = { 0 }, - .position = { - clear_rect->rect.offset.x + clear_rect->rect.extent.width, - clear_rect->rect.offset.y, - }, - }, - { - .vue_header = { 0 }, - .position = { - clear_rect->rect.offset.x + clear_rect->rect.extent.width, - clear_rect->rect.offset.y + clear_rect->rect.extent.height, - }, - }, - }; - - struct anv_state state = - anv_cmd_buffer_emit_dynamic(cmd_buffer, vertex_data, sizeof(vertex_data), 16); - - struct anv_buffer vertex_buffer = { - .device = device, - .size = sizeof(vertex_data), - .bo = &device->dynamic_state_block_pool.bo, - .offset = state.offset, - }; - - ANV_CALL(CmdSetViewport)(cmd_buffer_h, 0, 1, - (VkViewport[]) { - { - .x = 0, - .y = 0, - .width = fb->width, - .height = fb->height, - - /* Ignored when clearing only stencil. */ - .minDepth = clear_value.depth, - .maxDepth = clear_value.depth, - }, - }); - - if (aspects & VK_IMAGE_ASPECT_STENCIL_BIT) { - ANV_CALL(CmdSetStencilReference)(cmd_buffer_h, VK_STENCIL_FACE_FRONT_BIT, - clear_value.stencil); - } - - ANV_CALL(CmdBindVertexBuffers)(cmd_buffer_h, 0, 1, - (VkBuffer[]) { anv_buffer_to_handle(&vertex_buffer) }, - (VkDeviceSize[]) { 0 }); - - struct anv_pipeline *pipeline; - switch (aspects) { - case VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT: - pipeline = meta_state->clear[samples_log2].depthstencil_pipeline; - break; - case VK_IMAGE_ASPECT_DEPTH_BIT: - pipeline = meta_state->clear[samples_log2].depth_only_pipeline; - break; - case VK_IMAGE_ASPECT_STENCIL_BIT: - pipeline = meta_state->clear[samples_log2].stencil_only_pipeline; - break; - default: - unreachable("expected depth or stencil aspect"); - } - - if (cmd_buffer->state.pipeline != pipeline) { - ANV_CALL(CmdBindPipeline)(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS, - anv_pipeline_to_handle(pipeline)); - } - - ANV_CALL(CmdDraw)(cmd_buffer_h, 3, 1, 0, 0); -} - -VkResult -anv_device_init_meta_clear_state(struct anv_device *device) -{ - VkResult res; - struct anv_meta_state *state = &device->meta_state; - - zero(device->meta_state.clear); - - for (uint32_t i = 0; i < ARRAY_SIZE(state->clear); ++i) { - uint32_t samples = 1 << i; - - for (uint32_t j = 0; j < ARRAY_SIZE(state->clear[i].color_pipelines); ++j) { - res = create_color_pipeline(device, samples, /* frag_output */ j, - &state->clear[i].color_pipelines[j]); - if (res != VK_SUCCESS) - goto fail; - } - - res = create_depthstencil_pipeline(device, - VK_IMAGE_ASPECT_DEPTH_BIT, samples, - &state->clear[i].depth_only_pipeline); - if (res != VK_SUCCESS) - goto fail; - - res = create_depthstencil_pipeline(device, - VK_IMAGE_ASPECT_STENCIL_BIT, samples, - &state->clear[i].stencil_only_pipeline); - if (res != VK_SUCCESS) - goto fail; - - res = create_depthstencil_pipeline(device, - VK_IMAGE_ASPECT_DEPTH_BIT | - VK_IMAGE_ASPECT_STENCIL_BIT, samples, - &state->clear[i].depthstencil_pipeline); - if (res != VK_SUCCESS) - goto fail; - } - - return VK_SUCCESS; - -fail: - anv_device_finish_meta_clear_state(device); - return res; -} - -/** - * The parameters mean that same as those in vkCmdClearAttachments. - */ -static void -emit_clear(struct anv_cmd_buffer *cmd_buffer, - const VkClearAttachment *clear_att, - const VkClearRect *clear_rect) -{ - if (clear_att->aspectMask & VK_IMAGE_ASPECT_COLOR_BIT) { - emit_color_clear(cmd_buffer, clear_att, clear_rect); - } else { - assert(clear_att->aspectMask & (VK_IMAGE_ASPECT_DEPTH_BIT | - VK_IMAGE_ASPECT_STENCIL_BIT)); - emit_depthstencil_clear(cmd_buffer, clear_att, clear_rect); - } -} - -static bool -subpass_needs_clear(const struct anv_cmd_buffer *cmd_buffer) -{ - const struct anv_cmd_state *cmd_state = &cmd_buffer->state; - uint32_t ds = cmd_state->subpass->depth_stencil_attachment; - - for (uint32_t i = 0; i < cmd_state->subpass->color_count; ++i) { - uint32_t a = cmd_state->subpass->color_attachments[i]; - if (cmd_state->attachments[a].pending_clear_aspects) { - return true; - } - } - - if (ds != VK_ATTACHMENT_UNUSED && - cmd_state->attachments[ds].pending_clear_aspects) { - return true; - } - - return false; -} - -/** - * Emit any pending attachment clears for the current subpass. - * - * @see anv_attachment_state::pending_clear_aspects - */ -void -anv_cmd_buffer_clear_subpass(struct anv_cmd_buffer *cmd_buffer) -{ - struct anv_cmd_state *cmd_state = &cmd_buffer->state; - struct anv_meta_saved_state saved_state; - - if (!subpass_needs_clear(cmd_buffer)) - return; - - meta_clear_begin(&saved_state, cmd_buffer); - - if (cmd_state->framebuffer->layers > 1) - anv_finishme("clearing multi-layer framebuffer"); - - VkClearRect clear_rect = { - .rect = cmd_state->render_area, - .baseArrayLayer = 0, - .layerCount = 1, /* FINISHME: clear multi-layer framebuffer */ - }; - - for (uint32_t i = 0; i < cmd_state->subpass->color_count; ++i) { - uint32_t a = cmd_state->subpass->color_attachments[i]; - - if (!cmd_state->attachments[a].pending_clear_aspects) - continue; - - assert(cmd_state->attachments[a].pending_clear_aspects == - VK_IMAGE_ASPECT_COLOR_BIT); - - VkClearAttachment clear_att = { - .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT, - .colorAttachment = i, /* Use attachment index relative to subpass */ - .clearValue = cmd_state->attachments[a].clear_value, - }; - - emit_clear(cmd_buffer, &clear_att, &clear_rect); - cmd_state->attachments[a].pending_clear_aspects = 0; - } - - uint32_t ds = cmd_state->subpass->depth_stencil_attachment; - - if (ds != VK_ATTACHMENT_UNUSED && - cmd_state->attachments[ds].pending_clear_aspects) { - - VkClearAttachment clear_att = { - .aspectMask = cmd_state->attachments[ds].pending_clear_aspects, - .clearValue = cmd_state->attachments[ds].clear_value, - }; - - emit_clear(cmd_buffer, &clear_att, &clear_rect); - cmd_state->attachments[ds].pending_clear_aspects = 0; - } - - meta_clear_end(&saved_state, cmd_buffer); -} - -static void -anv_cmd_clear_image(struct anv_cmd_buffer *cmd_buffer, - struct anv_image *image, - VkImageLayout image_layout, - VkClearValue clear_value, - uint32_t range_count, - const VkImageSubresourceRange *ranges) -{ - VkDevice device_h = anv_device_to_handle(cmd_buffer->device); - - VkFormat vk_format = image->vk_format; - if (vk_format == VK_FORMAT_E5B9G9R9_UFLOAT_PACK32) { - /* We can't actually render to this format so we have to work around it - * by manually unpacking and using R32_UINT. - */ - clear_value.color.uint32[0] = - float3_to_rgb9e5(clear_value.color.float32); - vk_format = VK_FORMAT_R32_UINT; - } - - for (uint32_t r = 0; r < range_count; r++) { - const VkImageSubresourceRange *range = &ranges[r]; - for (uint32_t l = 0; l < anv_get_levelCount(image, range); ++l) { - const uint32_t layer_count = image->type == VK_IMAGE_TYPE_3D ? - anv_minify(image->extent.depth, l) : - anv_get_layerCount(image, range); - for (uint32_t s = 0; s < layer_count; ++s) { - struct anv_image_view iview; - anv_image_view_init(&iview, cmd_buffer->device, - &(VkImageViewCreateInfo) { - .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO, - .image = anv_image_to_handle(image), - .viewType = anv_meta_get_view_type(image), - .format = vk_format, - .subresourceRange = { - .aspectMask = range->aspectMask, - .baseMipLevel = range->baseMipLevel + l, - .levelCount = 1, - .baseArrayLayer = range->baseArrayLayer + s, - .layerCount = 1 - }, - }, - cmd_buffer, VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT); - - VkFramebuffer fb; - anv_CreateFramebuffer(device_h, - &(VkFramebufferCreateInfo) { - .sType = VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO, - .attachmentCount = 1, - .pAttachments = (VkImageView[]) { - anv_image_view_to_handle(&iview), - }, - .width = iview.extent.width, - .height = iview.extent.height, - .layers = 1 - }, - &cmd_buffer->pool->alloc, - &fb); - - VkAttachmentDescription att_desc = { - .format = vk_format, - .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD, - .storeOp = VK_ATTACHMENT_STORE_OP_STORE, - .stencilLoadOp = VK_ATTACHMENT_LOAD_OP_LOAD, - .stencilStoreOp = VK_ATTACHMENT_STORE_OP_STORE, - .initialLayout = image_layout, - .finalLayout = image_layout, - }; - - VkSubpassDescription subpass_desc = { - .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS, - .inputAttachmentCount = 0, - .colorAttachmentCount = 0, - .pColorAttachments = NULL, - .pResolveAttachments = NULL, - .pDepthStencilAttachment = NULL, - .preserveAttachmentCount = 0, - .pPreserveAttachments = NULL, - }; - - const VkAttachmentReference att_ref = { - .attachment = 0, - .layout = image_layout, - }; - - if (range->aspectMask & VK_IMAGE_ASPECT_COLOR_BIT) { - subpass_desc.colorAttachmentCount = 1; - subpass_desc.pColorAttachments = &att_ref; - } else { - subpass_desc.pDepthStencilAttachment = &att_ref; - } - - VkRenderPass pass; - anv_CreateRenderPass(device_h, - &(VkRenderPassCreateInfo) { - .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO, - .attachmentCount = 1, - .pAttachments = &att_desc, - .subpassCount = 1, - .pSubpasses = &subpass_desc, - }, - &cmd_buffer->pool->alloc, - &pass); - - ANV_CALL(CmdBeginRenderPass)(anv_cmd_buffer_to_handle(cmd_buffer), - &(VkRenderPassBeginInfo) { - .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, - .renderArea = { - .offset = { 0, 0, }, - .extent = { - .width = iview.extent.width, - .height = iview.extent.height, - }, - }, - .renderPass = pass, - .framebuffer = fb, - .clearValueCount = 0, - .pClearValues = NULL, - }, - VK_SUBPASS_CONTENTS_INLINE); - - VkClearAttachment clear_att = { - .aspectMask = range->aspectMask, - .colorAttachment = 0, - .clearValue = clear_value, - }; - - VkClearRect clear_rect = { - .rect = { - .offset = { 0, 0 }, - .extent = { iview.extent.width, iview.extent.height }, - }, - .baseArrayLayer = range->baseArrayLayer, - .layerCount = 1, /* FINISHME: clear multi-layer framebuffer */ - }; - - emit_clear(cmd_buffer, &clear_att, &clear_rect); - - ANV_CALL(CmdEndRenderPass)(anv_cmd_buffer_to_handle(cmd_buffer)); - ANV_CALL(DestroyRenderPass)(device_h, pass, - &cmd_buffer->pool->alloc); - ANV_CALL(DestroyFramebuffer)(device_h, fb, - &cmd_buffer->pool->alloc); - } - } - } -} - -void anv_CmdClearColorImage( - VkCommandBuffer commandBuffer, - VkImage image_h, - VkImageLayout imageLayout, - const VkClearColorValue* pColor, - uint32_t rangeCount, - const VkImageSubresourceRange* pRanges) -{ - ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); - ANV_FROM_HANDLE(anv_image, image, image_h); - struct anv_meta_saved_state saved_state; - - meta_clear_begin(&saved_state, cmd_buffer); - - anv_cmd_clear_image(cmd_buffer, image, imageLayout, - (VkClearValue) { .color = *pColor }, - rangeCount, pRanges); - - meta_clear_end(&saved_state, cmd_buffer); -} - -void anv_CmdClearDepthStencilImage( - VkCommandBuffer commandBuffer, - VkImage image_h, - VkImageLayout imageLayout, - const VkClearDepthStencilValue* pDepthStencil, - uint32_t rangeCount, - const VkImageSubresourceRange* pRanges) -{ - ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); - ANV_FROM_HANDLE(anv_image, image, image_h); - struct anv_meta_saved_state saved_state; - - meta_clear_begin(&saved_state, cmd_buffer); - - anv_cmd_clear_image(cmd_buffer, image, imageLayout, - (VkClearValue) { .depthStencil = *pDepthStencil }, - rangeCount, pRanges); - - meta_clear_end(&saved_state, cmd_buffer); -} - -void anv_CmdClearAttachments( - VkCommandBuffer commandBuffer, - uint32_t attachmentCount, - const VkClearAttachment* pAttachments, - uint32_t rectCount, - const VkClearRect* pRects) -{ - ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); - struct anv_meta_saved_state saved_state; - - meta_clear_begin(&saved_state, cmd_buffer); - - /* FINISHME: We can do better than this dumb loop. It thrashes too much - * state. - */ - for (uint32_t a = 0; a < attachmentCount; ++a) { - for (uint32_t r = 0; r < rectCount; ++r) { - emit_clear(cmd_buffer, &pAttachments[a], &pRects[r]); - } - } - - meta_clear_end(&saved_state, cmd_buffer); -} - -static void -do_buffer_fill(struct anv_cmd_buffer *cmd_buffer, - struct anv_bo *dest, uint64_t dest_offset, - int width, int height, VkFormat fill_format, uint32_t data) -{ - VkDevice vk_device = anv_device_to_handle(cmd_buffer->device); - - VkImageCreateInfo image_info = { - .sType = VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO, - .imageType = VK_IMAGE_TYPE_2D, - .format = fill_format, - .extent = { - .width = width, - .height = height, - .depth = 1, - }, - .mipLevels = 1, - .arrayLayers = 1, - .samples = 1, - .tiling = VK_IMAGE_TILING_LINEAR, - .usage = VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT, - .flags = 0, - }; - - VkImage dest_image; - image_info.usage = VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT; - anv_CreateImage(vk_device, &image_info, - &cmd_buffer->pool->alloc, &dest_image); - - /* We could use a vk call to bind memory, but that would require - * creating a dummy memory object etc. so there's really no point. - */ - anv_image_from_handle(dest_image)->bo = dest; - anv_image_from_handle(dest_image)->offset = dest_offset; - - const VkClearValue clear_value = { - .color = { - .uint32 = { data, data, data, data } - } - }; - - const VkImageSubresourceRange range = { - .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT, - .baseMipLevel = 0, - .levelCount = 1, - .baseArrayLayer = 0, - .layerCount = 1, - }; - - anv_cmd_clear_image(cmd_buffer, anv_image_from_handle(dest_image), - VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL, - clear_value, 1, &range); -} - -void anv_CmdFillBuffer( - VkCommandBuffer commandBuffer, - VkBuffer dstBuffer, - VkDeviceSize dstOffset, - VkDeviceSize fillSize, - uint32_t data) -{ - ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); - ANV_FROM_HANDLE(anv_buffer, dst_buffer, dstBuffer); - struct anv_meta_saved_state saved_state; - - meta_clear_begin(&saved_state, cmd_buffer); - - VkFormat format; - int bs; - if ((fillSize & 15) == 0 && (dstOffset & 15) == 0) { - format = VK_FORMAT_R32G32B32A32_UINT; - bs = 16; - } else if ((fillSize & 7) == 0 && (dstOffset & 15) == 0) { - format = VK_FORMAT_R32G32_UINT; - bs = 8; - } else { - assert((fillSize & 3) == 0 && (dstOffset & 3) == 0); - format = VK_FORMAT_R32_UINT; - bs = 4; - } - - /* This is maximum possible width/height our HW can handle */ - const uint64_t max_surface_dim = 1 << 14; - - /* First, we make a bunch of max-sized copies */ - const uint64_t max_fill_size = max_surface_dim * max_surface_dim * bs; - while (fillSize > max_fill_size) { - do_buffer_fill(cmd_buffer, dst_buffer->bo, - dst_buffer->offset + dstOffset, - max_surface_dim, max_surface_dim, format, data); - fillSize -= max_fill_size; - dstOffset += max_fill_size; - } - - uint64_t height = fillSize / (max_surface_dim * bs); - assert(height < max_surface_dim); - if (height != 0) { - const uint64_t rect_fill_size = height * max_surface_dim * bs; - do_buffer_fill(cmd_buffer, dst_buffer->bo, - dst_buffer->offset + dstOffset, - max_surface_dim, height, format, data); - fillSize -= rect_fill_size; - dstOffset += rect_fill_size; - } - - if (fillSize != 0) { - do_buffer_fill(cmd_buffer, dst_buffer->bo, - dst_buffer->offset + dstOffset, - fillSize / bs, 1, format, data); - } - - meta_clear_end(&saved_state, cmd_buffer); -} diff -Nru mesa-12.0.6/src/intel/vulkan/anv_meta_copy.c mesa-17.0.7/src/intel/vulkan/anv_meta_copy.c --- mesa-12.0.6/src/intel/vulkan/anv_meta_copy.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_meta_copy.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,479 +0,0 @@ -/* - * Copyright © 2016 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - -#include "anv_meta.h" - -static VkExtent3D -meta_image_block_size(const struct anv_image *image) -{ - if (image->aspects == VK_IMAGE_ASPECT_COLOR_BIT) { - const struct isl_format_layout *isl_layout = - isl_format_get_layout(image->color_surface.isl.format); - return (VkExtent3D) { isl_layout->bw, isl_layout->bh, isl_layout->bd }; - } else { - return (VkExtent3D) { 1, 1, 1 }; - } -} - -/* Returns the user-provided VkBufferImageCopy::imageExtent in units of - * elements rather than texels. One element equals one texel or one block - * if Image is uncompressed or compressed, respectively. - */ -static struct VkExtent3D -meta_region_extent_el(const struct anv_image *image, - const struct VkExtent3D *extent) -{ - const VkExtent3D block = meta_image_block_size(image); - return anv_sanitize_image_extent(image->type, (VkExtent3D) { - .width = DIV_ROUND_UP(extent->width , block.width), - .height = DIV_ROUND_UP(extent->height, block.height), - .depth = DIV_ROUND_UP(extent->depth , block.depth), - }); -} - -/* Returns the user-provided VkBufferImageCopy::imageOffset in units of - * elements rather than texels. One element equals one texel or one block - * if Image is uncompressed or compressed, respectively. - */ -static struct VkOffset3D -meta_region_offset_el(const struct anv_image *image, - const struct VkOffset3D *offset) -{ - const VkExtent3D block = meta_image_block_size(image); - return anv_sanitize_image_offset(image->type, (VkOffset3D) { - .x = offset->x / block.width, - .y = offset->y / block.height, - .z = offset->z / block.depth, - }); -} - -static struct anv_meta_blit2d_surf -blit_surf_for_image(const struct anv_image* image, - const struct anv_surface *surf) -{ - return (struct anv_meta_blit2d_surf) { - .bo = image->bo, - .tiling = surf->isl.tiling, - .base_offset = image->offset + surf->offset, - .bs = isl_format_get_layout(surf->isl.format)->bs, - .pitch = isl_surf_get_row_pitch(&surf->isl), - }; -} - -static void -do_buffer_copy(struct anv_cmd_buffer *cmd_buffer, - struct anv_bo *src, uint64_t src_offset, - struct anv_bo *dest, uint64_t dest_offset, - int width, int height, int bs) -{ - struct anv_meta_blit2d_surf b_src = { - .bo = src, - .tiling = ISL_TILING_LINEAR, - .base_offset = src_offset, - .bs = bs, - .pitch = width * bs, - }; - struct anv_meta_blit2d_surf b_dst = { - .bo = dest, - .tiling = ISL_TILING_LINEAR, - .base_offset = dest_offset, - .bs = bs, - .pitch = width * bs, - }; - struct anv_meta_blit2d_rect rect = { - .width = width, - .height = height, - }; - anv_meta_blit2d(cmd_buffer, &b_src, &b_dst, 1, &rect); -} - -static void -meta_copy_buffer_to_image(struct anv_cmd_buffer *cmd_buffer, - struct anv_buffer* buffer, - struct anv_image* image, - uint32_t regionCount, - const VkBufferImageCopy* pRegions, - bool forward) -{ - struct anv_meta_saved_state saved_state; - - /* The Vulkan 1.0 spec says "dstImage must have a sample count equal to - * VK_SAMPLE_COUNT_1_BIT." - */ - assert(image->samples == 1); - - anv_meta_begin_blit2d(cmd_buffer, &saved_state); - - for (unsigned r = 0; r < regionCount; r++) { - - /** - * From the Vulkan 1.0.6 spec: 18.3 Copying Data Between Images - * extent is the size in texels of the source image to copy in width, - * height and depth. 1D images use only x and width. 2D images use x, y, - * width and height. 3D images use x, y, z, width, height and depth. - * - * - * Also, convert the offsets and extent from units of texels to units of - * blocks - which is the highest resolution accessible in this command. - */ - const VkOffset3D img_offset_el = - meta_region_offset_el(image, &pRegions[r].imageOffset); - const VkExtent3D bufferExtent = { - .width = pRegions[r].bufferRowLength ? - pRegions[r].bufferRowLength : pRegions[r].imageExtent.width, - .height = pRegions[r].bufferImageHeight ? - pRegions[r].bufferImageHeight : pRegions[r].imageExtent.height, - }; - const VkExtent3D buf_extent_el = - meta_region_extent_el(image, &bufferExtent); - - /* Start creating blit rect */ - const VkExtent3D img_extent_el = - meta_region_extent_el(image, &pRegions[r].imageExtent); - struct anv_meta_blit2d_rect rect = { - .width = img_extent_el.width, - .height = img_extent_el.height, - }; - - /* Create blit surfaces */ - VkImageAspectFlags aspect = pRegions[r].imageSubresource.aspectMask; - const struct anv_surface *img_surf = - anv_image_get_surface_for_aspect_mask(image, aspect); - struct anv_meta_blit2d_surf img_bsurf = - blit_surf_for_image(image, img_surf); - enum isl_format buf_format = anv_get_isl_format(&cmd_buffer->device->info, - image->vk_format, aspect, - VK_IMAGE_TILING_LINEAR); - struct anv_meta_blit2d_surf buf_bsurf = { - .bo = buffer->bo, - .tiling = ISL_TILING_LINEAR, - .base_offset = buffer->offset + pRegions[r].bufferOffset, - .bs = isl_format_get_layout(buf_format)->bs, - .pitch = buf_extent_el.width * buf_bsurf.bs, - }; - - /* Set direction-dependent variables */ - struct anv_meta_blit2d_surf *dst_bsurf = forward ? &img_bsurf : &buf_bsurf; - struct anv_meta_blit2d_surf *src_bsurf = forward ? &buf_bsurf : &img_bsurf; - uint32_t *x_offset = forward ? &rect.dst_x : &rect.src_x; - uint32_t *y_offset = forward ? &rect.dst_y : &rect.src_y; - - /* Loop through each 3D or array slice */ - unsigned num_slices_3d = img_extent_el.depth; - unsigned num_slices_array = pRegions[r].imageSubresource.layerCount; - unsigned slice_3d = 0; - unsigned slice_array = 0; - while (slice_3d < num_slices_3d && slice_array < num_slices_array) { - - /* Finish creating blit rect */ - isl_surf_get_image_offset_el(&img_surf->isl, - pRegions[r].imageSubresource.mipLevel, - pRegions[r].imageSubresource.baseArrayLayer - + slice_array, - img_offset_el.z + slice_3d, - x_offset, - y_offset); - *x_offset += img_offset_el.x; - *y_offset += img_offset_el.y; - - /* Perform Blit */ - anv_meta_blit2d(cmd_buffer, src_bsurf, dst_bsurf, 1, &rect); - - /* Once we've done the blit, all of the actual information about - * the image is embedded in the command buffer so we can just - * increment the offset directly in the image effectively - * re-binding it to different backing memory. - */ - buf_bsurf.base_offset += buf_extent_el.width * - buf_extent_el.height * buf_bsurf.bs; - - if (image->type == VK_IMAGE_TYPE_3D) - slice_3d++; - else - slice_array++; - } - } - anv_meta_end_blit2d(cmd_buffer, &saved_state); -} - -void anv_CmdCopyBufferToImage( - VkCommandBuffer commandBuffer, - VkBuffer srcBuffer, - VkImage destImage, - VkImageLayout destImageLayout, - uint32_t regionCount, - const VkBufferImageCopy* pRegions) -{ - ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); - ANV_FROM_HANDLE(anv_image, dest_image, destImage); - ANV_FROM_HANDLE(anv_buffer, src_buffer, srcBuffer); - - meta_copy_buffer_to_image(cmd_buffer, src_buffer, dest_image, - regionCount, pRegions, true); -} - -void anv_CmdCopyImageToBuffer( - VkCommandBuffer commandBuffer, - VkImage srcImage, - VkImageLayout srcImageLayout, - VkBuffer destBuffer, - uint32_t regionCount, - const VkBufferImageCopy* pRegions) -{ - ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); - ANV_FROM_HANDLE(anv_image, src_image, srcImage); - ANV_FROM_HANDLE(anv_buffer, dst_buffer, destBuffer); - - meta_copy_buffer_to_image(cmd_buffer, dst_buffer, src_image, - regionCount, pRegions, false); -} - -void anv_CmdCopyImage( - VkCommandBuffer commandBuffer, - VkImage srcImage, - VkImageLayout srcImageLayout, - VkImage destImage, - VkImageLayout destImageLayout, - uint32_t regionCount, - const VkImageCopy* pRegions) -{ - ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); - ANV_FROM_HANDLE(anv_image, src_image, srcImage); - ANV_FROM_HANDLE(anv_image, dest_image, destImage); - struct anv_meta_saved_state saved_state; - - /* From the Vulkan 1.0 spec: - * - * vkCmdCopyImage can be used to copy image data between multisample - * images, but both images must have the same number of samples. - */ - assert(src_image->samples == dest_image->samples); - - anv_meta_begin_blit2d(cmd_buffer, &saved_state); - - for (unsigned r = 0; r < regionCount; r++) { - assert(pRegions[r].srcSubresource.aspectMask == - pRegions[r].dstSubresource.aspectMask); - - VkImageAspectFlags aspect = pRegions[r].srcSubresource.aspectMask; - - /* Create blit surfaces */ - struct anv_surface *src_surf = - anv_image_get_surface_for_aspect_mask(src_image, aspect); - struct anv_surface *dst_surf = - anv_image_get_surface_for_aspect_mask(dest_image, aspect); - struct anv_meta_blit2d_surf b_src = - blit_surf_for_image(src_image, src_surf); - struct anv_meta_blit2d_surf b_dst = - blit_surf_for_image(dest_image, dst_surf); - - /** - * From the Vulkan 1.0.6 spec: 18.4 Copying Data Between Buffers and Images - * imageExtent is the size in texels of the image to copy in width, height - * and depth. 1D images use only x and width. 2D images use x, y, width - * and height. 3D images use x, y, z, width, height and depth. - * - * Also, convert the offsets and extent from units of texels to units of - * blocks - which is the highest resolution accessible in this command. - */ - const VkOffset3D dst_offset_el = - meta_region_offset_el(dest_image, &pRegions[r].dstOffset); - const VkOffset3D src_offset_el = - meta_region_offset_el(src_image, &pRegions[r].srcOffset); - const VkExtent3D img_extent_el = - meta_region_extent_el(src_image, &pRegions[r].extent); - - /* Start creating blit rect */ - struct anv_meta_blit2d_rect rect = { - .width = img_extent_el.width, - .height = img_extent_el.height, - }; - - /* Loop through each 3D or array slice */ - unsigned num_slices_3d = img_extent_el.depth; - unsigned num_slices_array = pRegions[r].dstSubresource.layerCount; - unsigned slice_3d = 0; - unsigned slice_array = 0; - while (slice_3d < num_slices_3d && slice_array < num_slices_array) { - - /* Finish creating blit rect */ - isl_surf_get_image_offset_el(&dst_surf->isl, - pRegions[r].dstSubresource.mipLevel, - pRegions[r].dstSubresource.baseArrayLayer - + slice_array, - dst_offset_el.z + slice_3d, - &rect.dst_x, - &rect.dst_y); - isl_surf_get_image_offset_el(&src_surf->isl, - pRegions[r].srcSubresource.mipLevel, - pRegions[r].srcSubresource.baseArrayLayer - + slice_array, - src_offset_el.z + slice_3d, - &rect.src_x, - &rect.src_y); - rect.dst_x += dst_offset_el.x; - rect.dst_y += dst_offset_el.y; - rect.src_x += src_offset_el.x; - rect.src_y += src_offset_el.y; - - /* Perform Blit */ - anv_meta_blit2d(cmd_buffer, &b_src, &b_dst, 1, &rect); - - if (dest_image->type == VK_IMAGE_TYPE_3D) - slice_3d++; - else - slice_array++; - } - } - - anv_meta_end_blit2d(cmd_buffer, &saved_state); -} - -void anv_CmdCopyBuffer( - VkCommandBuffer commandBuffer, - VkBuffer srcBuffer, - VkBuffer destBuffer, - uint32_t regionCount, - const VkBufferCopy* pRegions) -{ - ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); - ANV_FROM_HANDLE(anv_buffer, src_buffer, srcBuffer); - ANV_FROM_HANDLE(anv_buffer, dest_buffer, destBuffer); - - struct anv_meta_saved_state saved_state; - - anv_meta_begin_blit2d(cmd_buffer, &saved_state); - - for (unsigned r = 0; r < regionCount; r++) { - uint64_t src_offset = src_buffer->offset + pRegions[r].srcOffset; - uint64_t dest_offset = dest_buffer->offset + pRegions[r].dstOffset; - uint64_t copy_size = pRegions[r].size; - - /* First, we compute the biggest format that can be used with the - * given offsets and size. - */ - int bs = 16; - - int fs = ffs(src_offset) - 1; - if (fs != -1) - bs = MIN2(bs, 1 << fs); - assert(src_offset % bs == 0); - - fs = ffs(dest_offset) - 1; - if (fs != -1) - bs = MIN2(bs, 1 << fs); - assert(dest_offset % bs == 0); - - fs = ffs(pRegions[r].size) - 1; - if (fs != -1) - bs = MIN2(bs, 1 << fs); - assert(pRegions[r].size % bs == 0); - - /* This is maximum possible width/height our HW can handle */ - uint64_t max_surface_dim = 1 << 14; - - /* First, we make a bunch of max-sized copies */ - uint64_t max_copy_size = max_surface_dim * max_surface_dim * bs; - while (copy_size >= max_copy_size) { - do_buffer_copy(cmd_buffer, src_buffer->bo, src_offset, - dest_buffer->bo, dest_offset, - max_surface_dim, max_surface_dim, bs); - copy_size -= max_copy_size; - src_offset += max_copy_size; - dest_offset += max_copy_size; - } - - uint64_t height = copy_size / (max_surface_dim * bs); - assert(height < max_surface_dim); - if (height != 0) { - uint64_t rect_copy_size = height * max_surface_dim * bs; - do_buffer_copy(cmd_buffer, src_buffer->bo, src_offset, - dest_buffer->bo, dest_offset, - max_surface_dim, height, bs); - copy_size -= rect_copy_size; - src_offset += rect_copy_size; - dest_offset += rect_copy_size; - } - - if (copy_size != 0) { - do_buffer_copy(cmd_buffer, src_buffer->bo, src_offset, - dest_buffer->bo, dest_offset, - copy_size / bs, 1, bs); - } - } - - anv_meta_end_blit2d(cmd_buffer, &saved_state); -} - -void anv_CmdUpdateBuffer( - VkCommandBuffer commandBuffer, - VkBuffer dstBuffer, - VkDeviceSize dstOffset, - VkDeviceSize dataSize, - const uint32_t* pData) -{ - ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); - ANV_FROM_HANDLE(anv_buffer, dst_buffer, dstBuffer); - struct anv_meta_saved_state saved_state; - - anv_meta_begin_blit2d(cmd_buffer, &saved_state); - - /* We can't quite grab a full block because the state stream needs a - * little data at the top to build its linked list. - */ - const uint32_t max_update_size = - cmd_buffer->device->dynamic_state_block_pool.block_size - 64; - - assert(max_update_size < (1 << 14) * 4); - - while (dataSize) { - const uint32_t copy_size = MIN2(dataSize, max_update_size); - - struct anv_state tmp_data = - anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, copy_size, 64); - - memcpy(tmp_data.map, pData, copy_size); - - int bs; - if ((copy_size & 15) == 0 && (dstOffset & 15) == 0) { - bs = 16; - } else if ((copy_size & 7) == 0 && (dstOffset & 7) == 0) { - bs = 8; - } else { - assert((copy_size & 3) == 0 && (dstOffset & 3) == 0); - bs = 4; - } - - do_buffer_copy(cmd_buffer, - &cmd_buffer->device->dynamic_state_block_pool.bo, - tmp_data.offset, - dst_buffer->bo, dst_buffer->offset + dstOffset, - copy_size / bs, 1, bs); - - dataSize -= copy_size; - dstOffset += copy_size; - pData = (void *)pData + copy_size; - } - - anv_meta_end_blit2d(cmd_buffer, &saved_state); -} diff -Nru mesa-12.0.6/src/intel/vulkan/anv_meta.h mesa-17.0.7/src/intel/vulkan/anv_meta.h --- mesa-12.0.6/src/intel/vulkan/anv_meta.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_meta.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,113 +0,0 @@ -/* - * Copyright © 2015 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - -#pragma once - -#include "anv_private.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#define ANV_META_VERTEX_BINDING_COUNT 2 - -struct anv_meta_saved_state { - struct anv_vertex_binding old_vertex_bindings[ANV_META_VERTEX_BINDING_COUNT]; - struct anv_descriptor_set *old_descriptor_set0; - struct anv_pipeline *old_pipeline; - - /** - * Bitmask of (1 << VK_DYNAMIC_STATE_*). Defines the set of saved dynamic - * state. - */ - uint32_t dynamic_mask; - struct anv_dynamic_state dynamic; -}; - -VkResult anv_device_init_meta_clear_state(struct anv_device *device); -void anv_device_finish_meta_clear_state(struct anv_device *device); - -VkResult anv_device_init_meta_resolve_state(struct anv_device *device); -void anv_device_finish_meta_resolve_state(struct anv_device *device); - -VkResult anv_device_init_meta_blit_state(struct anv_device *device); -void anv_device_finish_meta_blit_state(struct anv_device *device); - -VkResult anv_device_init_meta_blit2d_state(struct anv_device *device); -void anv_device_finish_meta_blit2d_state(struct anv_device *device); - -void -anv_meta_save(struct anv_meta_saved_state *state, - const struct anv_cmd_buffer *cmd_buffer, - uint32_t dynamic_mask); - -void -anv_meta_restore(const struct anv_meta_saved_state *state, - struct anv_cmd_buffer *cmd_buffer); - -VkImageViewType -anv_meta_get_view_type(const struct anv_image *image); - -uint32_t -anv_meta_get_iview_layer(const struct anv_image *dest_image, - const VkImageSubresourceLayers *dest_subresource, - const VkOffset3D *dest_offset); - -struct anv_meta_blit2d_surf { - struct anv_bo *bo; - enum isl_tiling tiling; - - /** Base offset to the start of the image */ - uint64_t base_offset; - - /** The size of an element in bytes. */ - uint8_t bs; - - /** Pitch between rows in bytes. */ - uint32_t pitch; -}; - -struct anv_meta_blit2d_rect { - uint32_t src_x, src_y; - uint32_t dst_x, dst_y; - uint32_t width, height; -}; - -void -anv_meta_begin_blit2d(struct anv_cmd_buffer *cmd_buffer, - struct anv_meta_saved_state *save); - -void -anv_meta_blit2d(struct anv_cmd_buffer *cmd_buffer, - struct anv_meta_blit2d_surf *src, - struct anv_meta_blit2d_surf *dst, - unsigned num_rects, - struct anv_meta_blit2d_rect *rects); - -void -anv_meta_end_blit2d(struct anv_cmd_buffer *cmd_buffer, - struct anv_meta_saved_state *save); - -#ifdef __cplusplus -} -#endif diff -Nru mesa-12.0.6/src/intel/vulkan/anv_meta_resolve.c mesa-17.0.7/src/intel/vulkan/anv_meta_resolve.c --- mesa-12.0.6/src/intel/vulkan/anv_meta_resolve.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_meta_resolve.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,870 +0,0 @@ -/* - * Copyright © 2016 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - -#include -#include - -#include "anv_meta.h" -#include "anv_private.h" -#include "nir/nir_builder.h" - -/** - * Vertex attributes used by all pipelines. - */ -struct vertex_attrs { - struct anv_vue_header vue_header; - float position[2]; /**< 3DPRIM_RECTLIST */ - float tex_position[2]; -}; - -static void -meta_resolve_save(struct anv_meta_saved_state *saved_state, - struct anv_cmd_buffer *cmd_buffer) -{ - anv_meta_save(saved_state, cmd_buffer, 0); -} - -static void -meta_resolve_restore(struct anv_meta_saved_state *saved_state, - struct anv_cmd_buffer *cmd_buffer) -{ - anv_meta_restore(saved_state, cmd_buffer); -} - -static VkPipeline * -get_pipeline_h(struct anv_device *device, uint32_t samples) -{ - uint32_t i = ffs(samples) - 2; /* log2(samples) - 1 */ - - assert(samples >= 2); - assert(i < ARRAY_SIZE(device->meta_state.resolve.pipelines)); - - return &device->meta_state.resolve.pipelines[i]; -} - -static nir_shader * -build_nir_vs(void) -{ - const struct glsl_type *vec4 = glsl_vec4_type(); - - nir_builder b; - nir_variable *a_position; - nir_variable *v_position; - nir_variable *a_tex_position; - nir_variable *v_tex_position; - - nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_VERTEX, NULL); - b.shader->info.name = ralloc_strdup(b.shader, "meta_resolve_vs"); - - a_position = nir_variable_create(b.shader, nir_var_shader_in, vec4, - "a_position"); - a_position->data.location = VERT_ATTRIB_GENERIC0; - - v_position = nir_variable_create(b.shader, nir_var_shader_out, vec4, - "gl_Position"); - v_position->data.location = VARYING_SLOT_POS; - - a_tex_position = nir_variable_create(b.shader, nir_var_shader_in, vec4, - "a_tex_position"); - a_tex_position->data.location = VERT_ATTRIB_GENERIC1; - - v_tex_position = nir_variable_create(b.shader, nir_var_shader_out, vec4, - "v_tex_position"); - v_tex_position->data.location = VARYING_SLOT_VAR0; - - nir_copy_var(&b, v_position, a_position); - nir_copy_var(&b, v_tex_position, a_tex_position); - - return b.shader; -} - -static nir_shader * -build_nir_fs(uint32_t num_samples) -{ - const struct glsl_type *vec4 = glsl_vec4_type(); - - const struct glsl_type *sampler2DMS = - glsl_sampler_type(GLSL_SAMPLER_DIM_MS, - /*is_shadow*/ false, - /*is_array*/ false, - GLSL_TYPE_FLOAT); - - nir_builder b; - nir_variable *u_tex; /* uniform sampler */ - nir_variable *v_position; /* vec4, varying fragment position */ - nir_variable *v_tex_position; /* vec4, varying texture coordinate */ - nir_variable *f_color; /* vec4, fragment output color */ - nir_ssa_def *accum; /* vec4, accumulation of sample values */ - - nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL); - b.shader->info.name = ralloc_asprintf(b.shader, - "meta_resolve_fs_samples%02d", - num_samples); - - u_tex = nir_variable_create(b.shader, nir_var_uniform, sampler2DMS, - "u_tex"); - u_tex->data.descriptor_set = 0; - u_tex->data.binding = 0; - - v_position = nir_variable_create(b.shader, nir_var_shader_in, vec4, - "v_position"); - v_position->data.location = VARYING_SLOT_POS; - v_position->data.origin_upper_left = true; - - v_tex_position = nir_variable_create(b.shader, nir_var_shader_in, vec4, - "v_tex_position"); - v_tex_position->data.location = VARYING_SLOT_VAR0; - - f_color = nir_variable_create(b.shader, nir_var_shader_out, vec4, - "f_color"); - f_color->data.location = FRAG_RESULT_DATA0; - - accum = nir_imm_vec4(&b, 0, 0, 0, 0); - - nir_ssa_def *tex_position_ivec = - nir_f2i(&b, nir_load_var(&b, v_tex_position)); - - for (uint32_t i = 0; i < num_samples; ++i) { - nir_tex_instr *tex; - - tex = nir_tex_instr_create(b.shader, /*num_srcs*/ 2); - tex->texture = nir_deref_var_create(tex, u_tex); - tex->sampler = nir_deref_var_create(tex, u_tex); - tex->sampler_dim = GLSL_SAMPLER_DIM_MS; - tex->op = nir_texop_txf_ms; - tex->src[0].src = nir_src_for_ssa(tex_position_ivec); - tex->src[0].src_type = nir_tex_src_coord; - tex->src[1].src = nir_src_for_ssa(nir_imm_int(&b, i)); - tex->src[1].src_type = nir_tex_src_ms_index; - tex->dest_type = nir_type_float; - tex->is_array = false; - tex->coord_components = 3; - nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex"); - nir_builder_instr_insert(&b, &tex->instr); - - accum = nir_fadd(&b, accum, &tex->dest.ssa); - } - - accum = nir_fdiv(&b, accum, nir_imm_float(&b, num_samples)); - nir_store_var(&b, f_color, accum, /*writemask*/ 4); - - return b.shader; -} - -static VkResult -create_pass(struct anv_device *device) -{ - VkResult result; - VkDevice device_h = anv_device_to_handle(device); - const VkAllocationCallbacks *alloc = &device->meta_state.alloc; - - result = anv_CreateRenderPass(device_h, - &(VkRenderPassCreateInfo) { - .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO, - .attachmentCount = 1, - .pAttachments = &(VkAttachmentDescription) { - .format = VK_FORMAT_UNDEFINED, /* Our shaders don't care */ - .samples = 1, - .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD, - .storeOp = VK_ATTACHMENT_STORE_OP_STORE, - .initialLayout = VK_IMAGE_LAYOUT_GENERAL, - .finalLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - .subpassCount = 1, - .pSubpasses = &(VkSubpassDescription) { - .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS, - .inputAttachmentCount = 0, - .colorAttachmentCount = 1, - .pColorAttachments = &(VkAttachmentReference) { - .attachment = 0, - .layout = VK_IMAGE_LAYOUT_GENERAL, - }, - .pResolveAttachments = NULL, - .pDepthStencilAttachment = &(VkAttachmentReference) { - .attachment = VK_ATTACHMENT_UNUSED, - }, - .preserveAttachmentCount = 0, - .pPreserveAttachments = NULL, - }, - .dependencyCount = 0, - }, - alloc, - &device->meta_state.resolve.pass); - - return result; -} - -static VkResult -create_pipeline(struct anv_device *device, - uint32_t num_samples, - VkShaderModule vs_module_h) -{ - VkResult result; - VkDevice device_h = anv_device_to_handle(device); - - struct anv_shader_module fs_module = { - .nir = build_nir_fs(num_samples), - }; - - if (!fs_module.nir) { - /* XXX: Need more accurate error */ - result = VK_ERROR_OUT_OF_HOST_MEMORY; - goto cleanup; - } - - result = anv_graphics_pipeline_create(device_h, - VK_NULL_HANDLE, - &(VkGraphicsPipelineCreateInfo) { - .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO, - .stageCount = 2, - .pStages = (VkPipelineShaderStageCreateInfo[]) { - { - .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, - .stage = VK_SHADER_STAGE_VERTEX_BIT, - .module = vs_module_h, - .pName = "main", - }, - { - .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO, - .stage = VK_SHADER_STAGE_FRAGMENT_BIT, - .module = anv_shader_module_to_handle(&fs_module), - .pName = "main", - }, - }, - .pVertexInputState = &(VkPipelineVertexInputStateCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO, - .vertexBindingDescriptionCount = 1, - .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) { - { - .binding = 0, - .stride = sizeof(struct vertex_attrs), - .inputRate = VK_VERTEX_INPUT_RATE_VERTEX - }, - }, - .vertexAttributeDescriptionCount = 3, - .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) { - { - /* VUE Header */ - .location = 0, - .binding = 0, - .format = VK_FORMAT_R32G32B32A32_UINT, - .offset = offsetof(struct vertex_attrs, vue_header), - }, - { - /* Position */ - .location = 1, - .binding = 0, - .format = VK_FORMAT_R32G32_SFLOAT, - .offset = offsetof(struct vertex_attrs, position), - }, - { - /* Texture Coordinate */ - .location = 2, - .binding = 0, - .format = VK_FORMAT_R32G32_SFLOAT, - .offset = offsetof(struct vertex_attrs, tex_position), - }, - }, - }, - .pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO, - .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP, - .primitiveRestartEnable = false, - }, - .pViewportState = &(VkPipelineViewportStateCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO, - .viewportCount = 1, - .scissorCount = 1, - }, - .pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO, - .depthClampEnable = false, - .rasterizerDiscardEnable = false, - .polygonMode = VK_POLYGON_MODE_FILL, - .cullMode = VK_CULL_MODE_NONE, - .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE, - }, - .pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO, - .rasterizationSamples = 1, - .sampleShadingEnable = false, - .pSampleMask = (VkSampleMask[]) { 0x1 }, - .alphaToCoverageEnable = false, - .alphaToOneEnable = false, - }, - .pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO, - .logicOpEnable = false, - .attachmentCount = 1, - .pAttachments = (VkPipelineColorBlendAttachmentState []) { - { - .colorWriteMask = VK_COLOR_COMPONENT_R_BIT | - VK_COLOR_COMPONENT_G_BIT | - VK_COLOR_COMPONENT_B_BIT | - VK_COLOR_COMPONENT_A_BIT, - }, - }, - }, - .pDynamicState = &(VkPipelineDynamicStateCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO, - .dynamicStateCount = 2, - .pDynamicStates = (VkDynamicState[]) { - VK_DYNAMIC_STATE_VIEWPORT, - VK_DYNAMIC_STATE_SCISSOR, - }, - }, - .layout = device->meta_state.resolve.pipeline_layout, - .renderPass = device->meta_state.resolve.pass, - .subpass = 0, - }, - &(struct anv_graphics_pipeline_create_info) { - .color_attachment_count = -1, - .use_repclear = false, - .disable_vs = true, - .use_rectlist = true - }, - &device->meta_state.alloc, - get_pipeline_h(device, num_samples)); - if (result != VK_SUCCESS) - goto cleanup; - - goto cleanup; - -cleanup: - ralloc_free(fs_module.nir); - return result; -} - -void -anv_device_finish_meta_resolve_state(struct anv_device *device) -{ - struct anv_meta_state *state = &device->meta_state; - VkDevice device_h = anv_device_to_handle(device); - VkRenderPass pass_h = device->meta_state.resolve.pass; - VkPipelineLayout pipeline_layout_h = device->meta_state.resolve.pipeline_layout; - VkDescriptorSetLayout ds_layout_h = device->meta_state.resolve.ds_layout; - const VkAllocationCallbacks *alloc = &device->meta_state.alloc; - - if (pass_h) - ANV_CALL(DestroyRenderPass)(device_h, pass_h, - &device->meta_state.alloc); - - if (pipeline_layout_h) - ANV_CALL(DestroyPipelineLayout)(device_h, pipeline_layout_h, alloc); - - if (ds_layout_h) - ANV_CALL(DestroyDescriptorSetLayout)(device_h, ds_layout_h, alloc); - - for (uint32_t i = 0; i < ARRAY_SIZE(state->resolve.pipelines); ++i) { - VkPipeline pipeline_h = state->resolve.pipelines[i]; - - if (pipeline_h) { - ANV_CALL(DestroyPipeline)(device_h, pipeline_h, alloc); - } - } -} - -VkResult -anv_device_init_meta_resolve_state(struct anv_device *device) -{ - VkResult res = VK_SUCCESS; - VkDevice device_h = anv_device_to_handle(device); - const VkAllocationCallbacks *alloc = &device->meta_state.alloc; - - const isl_sample_count_mask_t sample_count_mask = - isl_device_get_sample_counts(&device->isl_dev); - - zero(device->meta_state.resolve); - - struct anv_shader_module vs_module = { .nir = build_nir_vs() }; - if (!vs_module.nir) { - /* XXX: Need more accurate error */ - res = VK_ERROR_OUT_OF_HOST_MEMORY; - goto fail; - } - - VkShaderModule vs_module_h = anv_shader_module_to_handle(&vs_module); - - res = anv_CreateDescriptorSetLayout(device_h, - &(VkDescriptorSetLayoutCreateInfo) { - .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO, - .bindingCount = 1, - .pBindings = (VkDescriptorSetLayoutBinding[]) { - { - .binding = 0, - .descriptorType = VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER, - .descriptorCount = 1, - .stageFlags = VK_SHADER_STAGE_FRAGMENT_BIT, - }, - }, - }, - alloc, - &device->meta_state.resolve.ds_layout); - if (res != VK_SUCCESS) - goto fail; - - res = anv_CreatePipelineLayout(device_h, - &(VkPipelineLayoutCreateInfo) { - .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO, - .setLayoutCount = 1, - .pSetLayouts = (VkDescriptorSetLayout[]) { - device->meta_state.resolve.ds_layout, - }, - }, - alloc, - &device->meta_state.resolve.pipeline_layout); - if (res != VK_SUCCESS) - goto fail; - - res = create_pass(device); - if (res != VK_SUCCESS) - goto fail; - - for (uint32_t i = 0; - i < ARRAY_SIZE(device->meta_state.resolve.pipelines); ++i) { - - uint32_t sample_count = 1 << (1 + i); - if (!(sample_count_mask & sample_count)) - continue; - - res = create_pipeline(device, sample_count, vs_module_h); - if (res != VK_SUCCESS) - goto fail; - } - - goto cleanup; - -fail: - anv_device_finish_meta_resolve_state(device); - -cleanup: - ralloc_free(vs_module.nir); - - return res; -} - -static void -emit_resolve(struct anv_cmd_buffer *cmd_buffer, - struct anv_image_view *src_iview, - const VkOffset2D *src_offset, - struct anv_image_view *dest_iview, - const VkOffset2D *dest_offset, - const VkExtent2D *resolve_extent) -{ - struct anv_device *device = cmd_buffer->device; - VkDevice device_h = anv_device_to_handle(device); - VkCommandBuffer cmd_buffer_h = anv_cmd_buffer_to_handle(cmd_buffer); - const struct anv_image *src_image = src_iview->image; - - const struct vertex_attrs vertex_data[3] = { - { - .vue_header = {0}, - .position = { - dest_offset->x + resolve_extent->width, - dest_offset->y + resolve_extent->height, - }, - .tex_position = { - src_offset->x + resolve_extent->width, - src_offset->y + resolve_extent->height, - }, - }, - { - .vue_header = {0}, - .position = { - dest_offset->x, - dest_offset->y + resolve_extent->height, - }, - .tex_position = { - src_offset->x, - src_offset->y + resolve_extent->height, - }, - }, - { - .vue_header = {0}, - .position = { - dest_offset->x, - dest_offset->y, - }, - .tex_position = { - src_offset->x, - src_offset->y, - }, - }, - }; - - struct anv_state vertex_mem = - anv_cmd_buffer_emit_dynamic(cmd_buffer, vertex_data, - sizeof(vertex_data), 16); - - struct anv_buffer vertex_buffer = { - .device = device, - .size = sizeof(vertex_data), - .bo = &cmd_buffer->dynamic_state_stream.block_pool->bo, - .offset = vertex_mem.offset, - }; - - VkBuffer vertex_buffer_h = anv_buffer_to_handle(&vertex_buffer); - - anv_CmdBindVertexBuffers(cmd_buffer_h, - /*firstBinding*/ 0, - /*bindingCount*/ 1, - (VkBuffer[]) { vertex_buffer_h }, - (VkDeviceSize[]) { 0 }); - - VkSampler sampler_h; - ANV_CALL(CreateSampler)(device_h, - &(VkSamplerCreateInfo) { - .sType = VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO, - .magFilter = VK_FILTER_NEAREST, - .minFilter = VK_FILTER_NEAREST, - .mipmapMode = VK_SAMPLER_MIPMAP_MODE_NEAREST, - .addressModeU = VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE, - .addressModeV = VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE, - .addressModeW = VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE, - .mipLodBias = 0.0, - .anisotropyEnable = false, - .compareEnable = false, - .minLod = 0.0, - .maxLod = 0.0, - .unnormalizedCoordinates = false, - }, - &cmd_buffer->pool->alloc, - &sampler_h); - - VkDescriptorPool desc_pool; - anv_CreateDescriptorPool(anv_device_to_handle(device), - &(const VkDescriptorPoolCreateInfo) { - .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_POOL_CREATE_INFO, - .pNext = NULL, - .flags = 0, - .maxSets = 1, - .poolSizeCount = 1, - .pPoolSizes = (VkDescriptorPoolSize[]) { - { - .type = VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER, - .descriptorCount = 1 - }, - } - }, &cmd_buffer->pool->alloc, &desc_pool); - - VkDescriptorSet desc_set_h; - anv_AllocateDescriptorSets(device_h, - &(VkDescriptorSetAllocateInfo) { - .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_ALLOCATE_INFO, - .descriptorPool = desc_pool, - .descriptorSetCount = 1, - .pSetLayouts = (VkDescriptorSetLayout[]) { - device->meta_state.resolve.ds_layout, - }, - }, - &desc_set_h); - - anv_UpdateDescriptorSets(device_h, - /*writeCount*/ 1, - (VkWriteDescriptorSet[]) { - { - .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstSet = desc_set_h, - .dstBinding = 0, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER, - .pImageInfo = (VkDescriptorImageInfo[]) { - { - .sampler = sampler_h, - .imageView = anv_image_view_to_handle(src_iview), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - }, - }, - }, - /*copyCount*/ 0, - /*copies */ NULL); - - VkPipeline pipeline_h = *get_pipeline_h(device, src_image->samples); - ANV_FROM_HANDLE(anv_pipeline, pipeline, pipeline_h); - - if (cmd_buffer->state.pipeline != pipeline) { - anv_CmdBindPipeline(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS, - pipeline_h); - } - - anv_CmdBindDescriptorSets(cmd_buffer_h, - VK_PIPELINE_BIND_POINT_GRAPHICS, - device->meta_state.resolve.pipeline_layout, - /*firstSet*/ 0, - /* setCount */ 1, - (VkDescriptorSet[]) { - desc_set_h, - }, - /*copyCount*/ 0, - /*copies */ NULL); - - ANV_CALL(CmdDraw)(cmd_buffer_h, 3, 1, 0, 0); - - /* All objects below are consumed by the draw call. We may safely destroy - * them. - */ - anv_DestroyDescriptorPool(anv_device_to_handle(device), - desc_pool, &cmd_buffer->pool->alloc); - anv_DestroySampler(device_h, sampler_h, - &cmd_buffer->pool->alloc); -} - -void anv_CmdResolveImage( - VkCommandBuffer cmd_buffer_h, - VkImage src_image_h, - VkImageLayout src_image_layout, - VkImage dest_image_h, - VkImageLayout dest_image_layout, - uint32_t region_count, - const VkImageResolve* regions) -{ - ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, cmd_buffer_h); - ANV_FROM_HANDLE(anv_image, src_image, src_image_h); - ANV_FROM_HANDLE(anv_image, dest_image, dest_image_h); - struct anv_device *device = cmd_buffer->device; - struct anv_meta_saved_state state; - VkDevice device_h = anv_device_to_handle(device); - - meta_resolve_save(&state, cmd_buffer); - - assert(src_image->samples > 1); - assert(dest_image->samples == 1); - - if (src_image->samples >= 16) { - /* See commit aa3f9aaf31e9056a255f9e0472ebdfdaa60abe54 for the - * glBlitFramebuffer workaround for samples >= 16. - */ - anv_finishme("vkCmdResolveImage: need interpolation workaround when " - "samples >= 16"); - } - - if (src_image->array_size > 1) - anv_finishme("vkCmdResolveImage: multisample array images"); - - for (uint32_t r = 0; r < region_count; ++r) { - const VkImageResolve *region = ®ions[r]; - - /* From the Vulkan 1.0 spec: - * - * - The aspectMask member of srcSubresource and dstSubresource must - * only contain VK_IMAGE_ASPECT_COLOR_BIT - * - * - The layerCount member of srcSubresource and dstSubresource must - * match - */ - assert(region->srcSubresource.aspectMask == VK_IMAGE_ASPECT_COLOR_BIT); - assert(region->dstSubresource.aspectMask == VK_IMAGE_ASPECT_COLOR_BIT); - assert(region->srcSubresource.layerCount == - region->dstSubresource.layerCount); - - const uint32_t src_base_layer = - anv_meta_get_iview_layer(src_image, ®ion->srcSubresource, - ®ion->srcOffset); - - const uint32_t dest_base_layer = - anv_meta_get_iview_layer(dest_image, ®ion->dstSubresource, - ®ion->dstOffset); - - /** - * From Vulkan 1.0.6 spec: 18.6 Resolving Multisample Images - * - * extent is the size in texels of the source image to resolve in width, - * height and depth. 1D images use only x and width. 2D images use x, y, - * width and height. 3D images use x, y, z, width, height and depth. - * - * srcOffset and dstOffset select the initial x, y, and z offsets in - * texels of the sub-regions of the source and destination image data. - * extent is the size in texels of the source image to resolve in width, - * height and depth. 1D images use only x and width. 2D images use x, y, - * width and height. 3D images use x, y, z, width, height and depth. - */ - const struct VkExtent3D extent = - anv_sanitize_image_extent(src_image->type, region->extent); - const struct VkOffset3D srcOffset = - anv_sanitize_image_offset(src_image->type, region->srcOffset); - const struct VkOffset3D dstOffset = - anv_sanitize_image_offset(dest_image->type, region->dstOffset); - - - for (uint32_t layer = 0; layer < region->srcSubresource.layerCount; - ++layer) { - - struct anv_image_view src_iview; - anv_image_view_init(&src_iview, cmd_buffer->device, - &(VkImageViewCreateInfo) { - .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO, - .image = src_image_h, - .viewType = anv_meta_get_view_type(src_image), - .format = src_image->vk_format, - .subresourceRange = { - .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT, - .baseMipLevel = region->srcSubresource.mipLevel, - .levelCount = 1, - .baseArrayLayer = src_base_layer + layer, - .layerCount = 1, - }, - }, - cmd_buffer, VK_IMAGE_USAGE_SAMPLED_BIT); - - struct anv_image_view dest_iview; - anv_image_view_init(&dest_iview, cmd_buffer->device, - &(VkImageViewCreateInfo) { - .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO, - .image = dest_image_h, - .viewType = anv_meta_get_view_type(dest_image), - .format = dest_image->vk_format, - .subresourceRange = { - .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT, - .baseMipLevel = region->dstSubresource.mipLevel, - .levelCount = 1, - .baseArrayLayer = dest_base_layer + layer, - .layerCount = 1, - }, - }, - cmd_buffer, VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT); - - VkFramebuffer fb_h; - anv_CreateFramebuffer(device_h, - &(VkFramebufferCreateInfo) { - .sType = VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO, - .attachmentCount = 1, - .pAttachments = (VkImageView[]) { - anv_image_view_to_handle(&dest_iview), - }, - .width = anv_minify(dest_image->extent.width, - region->dstSubresource.mipLevel), - .height = anv_minify(dest_image->extent.height, - region->dstSubresource.mipLevel), - .layers = 1 - }, - &cmd_buffer->pool->alloc, - &fb_h); - - ANV_CALL(CmdBeginRenderPass)(cmd_buffer_h, - &(VkRenderPassBeginInfo) { - .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, - .renderPass = device->meta_state.resolve.pass, - .framebuffer = fb_h, - .renderArea = { - .offset = { - dstOffset.x, - dstOffset.y, - }, - .extent = { - extent.width, - extent.height, - } - }, - .clearValueCount = 0, - .pClearValues = NULL, - }, - VK_SUBPASS_CONTENTS_INLINE); - - emit_resolve(cmd_buffer, - &src_iview, - &(VkOffset2D) { - .x = srcOffset.x, - .y = srcOffset.y, - }, - &dest_iview, - &(VkOffset2D) { - .x = dstOffset.x, - .y = dstOffset.y, - }, - &(VkExtent2D) { - .width = extent.width, - .height = extent.height, - }); - - ANV_CALL(CmdEndRenderPass)(cmd_buffer_h); - - anv_DestroyFramebuffer(device_h, fb_h, - &cmd_buffer->pool->alloc); - } - } - - meta_resolve_restore(&state, cmd_buffer); -} - -/** - * Emit any needed resolves for the current subpass. - */ -void -anv_cmd_buffer_resolve_subpass(struct anv_cmd_buffer *cmd_buffer) -{ - struct anv_framebuffer *fb = cmd_buffer->state.framebuffer; - struct anv_subpass *subpass = cmd_buffer->state.subpass; - struct anv_meta_saved_state saved_state; - - /* FINISHME(perf): Skip clears for resolve attachments. - * - * From the Vulkan 1.0 spec: - * - * If the first use of an attachment in a render pass is as a resolve - * attachment, then the loadOp is effectively ignored as the resolve is - * guaranteed to overwrite all pixels in the render area. - */ - - if (!subpass->has_resolve) - return; - - meta_resolve_save(&saved_state, cmd_buffer); - - for (uint32_t i = 0; i < subpass->color_count; ++i) { - uint32_t src_att = subpass->color_attachments[i]; - uint32_t dest_att = subpass->resolve_attachments[i]; - - if (dest_att == VK_ATTACHMENT_UNUSED) - continue; - - struct anv_image_view *src_iview = fb->attachments[src_att]; - struct anv_image_view *dest_iview = fb->attachments[dest_att]; - - struct anv_subpass resolve_subpass = { - .color_count = 1, - .color_attachments = (uint32_t[]) { dest_att }, - .depth_stencil_attachment = VK_ATTACHMENT_UNUSED, - }; - - anv_cmd_buffer_set_subpass(cmd_buffer, &resolve_subpass); - - /* Subpass resolves must respect the render area. We can ignore the - * render area here because vkCmdBeginRenderPass set the render area - * with 3DSTATE_DRAWING_RECTANGLE. - * - * XXX(chadv): Does the hardware really respect - * 3DSTATE_DRAWING_RECTANGLE when draing a 3DPRIM_RECTLIST? - */ - emit_resolve(cmd_buffer, - src_iview, - &(VkOffset2D) { 0, 0 }, - dest_iview, - &(VkOffset2D) { 0, 0 }, - &(VkExtent2D) { fb->width, fb->height }); - } - - cmd_buffer->state.subpass = subpass; - meta_resolve_restore(&saved_state, cmd_buffer); -} diff -Nru mesa-12.0.6/src/intel/vulkan/anv_nir_apply_pipeline_layout.c mesa-17.0.7/src/intel/vulkan/anv_nir_apply_pipeline_layout.c --- mesa-12.0.6/src/intel/vulkan/anv_nir_apply_pipeline_layout.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_nir_apply_pipeline_layout.c 2017-06-01 10:37:10.000000000 +0000 @@ -346,6 +346,33 @@ } } + nir_foreach_variable(var, &shader->uniforms) { + if (!glsl_type_is_image(var->interface_type)) + continue; + + enum glsl_sampler_dim dim = glsl_get_sampler_dim(var->interface_type); + if (dim != GLSL_SAMPLER_DIM_SUBPASS && + dim != GLSL_SAMPLER_DIM_SUBPASS_MS) + continue; + + const uint32_t set = var->data.descriptor_set; + const uint32_t binding = var->data.binding; + const uint32_t array_size = + layout->set[set].layout->binding[binding].array_size; + + if (!BITSET_TEST(state.set[set].used, binding)) + continue; + + struct anv_pipeline_binding *pipe_binding = + &map->surface_to_descriptor[state.set[set].surface_offsets[binding]]; + for (unsigned i = 0; i < array_size; i++) { + assert(pipe_binding[i].set == set); + assert(pipe_binding[i].binding == binding); + assert(pipe_binding[i].index == i); + pipe_binding[i].input_attachment_index = var->data.index + i; + } + } + nir_foreach_function(function, shader) { if (!function->impl) continue; diff -Nru mesa-12.0.6/src/intel/vulkan/anv_nir.h mesa-17.0.7/src/intel/vulkan/anv_nir.h --- mesa-12.0.6/src/intel/vulkan/anv_nir.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_nir.h 2017-06-01 10:37:10.000000000 +0000 @@ -21,7 +21,8 @@ * IN THE SOFTWARE. */ -#pragma once +#ifndef ANV_NIR_H +#define ANV_NIR_H #include "nir/nir.h" #include "anv_private.h" @@ -30,6 +31,8 @@ extern "C" { #endif +void anv_nir_lower_input_attachments(nir_shader *shader); + void anv_nir_lower_push_constants(nir_shader *shader); void anv_nir_apply_dynamic_offsets(struct anv_pipeline *pipeline, @@ -43,3 +46,5 @@ #ifdef __cplusplus } #endif + +#endif /* ANV_NIR_H */ diff -Nru mesa-12.0.6/src/intel/vulkan/anv_nir_lower_input_attachments.c mesa-17.0.7/src/intel/vulkan/anv_nir_lower_input_attachments.c --- mesa-12.0.6/src/intel/vulkan/anv_nir_lower_input_attachments.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_nir_lower_input_attachments.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,137 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "anv_nir.h" +#include "nir/nir_builder.h" + +static nir_ssa_def * +load_frag_coord(nir_builder *b) +{ + nir_foreach_variable(var, &b->shader->inputs) { + if (var->data.location == VARYING_SLOT_POS) + return nir_load_var(b, var); + } + + nir_variable *pos = nir_variable_create(b->shader, nir_var_shader_in, + glsl_vec4_type(), NULL); + pos->data.location = VARYING_SLOT_POS; + pos->data.origin_upper_left = true; + + return nir_load_var(b, pos); +} + +static void +try_lower_input_load(nir_function_impl *impl, nir_intrinsic_instr *load) +{ + + const struct glsl_type *image_type = + glsl_without_array(load->variables[0]->var->type); + enum glsl_sampler_dim image_dim = glsl_get_sampler_dim(image_type); + if (image_dim != GLSL_SAMPLER_DIM_SUBPASS && + image_dim != GLSL_SAMPLER_DIM_SUBPASS_MS) + return; + + const bool multisampled = (image_dim == GLSL_SAMPLER_DIM_SUBPASS_MS); + + nir_builder b; + nir_builder_init(&b, impl); + b.cursor = nir_before_instr(&load->instr); + + nir_ssa_def *frag_coord = nir_f2i(&b, load_frag_coord(&b)); + nir_ssa_def *offset = nir_ssa_for_src(&b, load->src[0], 2); + nir_ssa_def *pos = nir_iadd(&b, frag_coord, offset); + + nir_ssa_def *layer = + nir_load_system_value(&b, nir_intrinsic_load_layer_id, 0); + nir_ssa_def *coord = + nir_vec3(&b, nir_channel(&b, pos, 0), nir_channel(&b, pos, 1), layer); + + nir_tex_instr *tex = nir_tex_instr_create(b.shader, 2 + multisampled); + + tex->op = nir_texop_txf; + + switch (glsl_get_sampler_result_type(image_type)) { + case GLSL_TYPE_FLOAT: + tex->dest_type = nir_type_float; + break; + case GLSL_TYPE_INT: + tex->dest_type = nir_type_int; + break; + case GLSL_TYPE_UINT: + tex->dest_type = nir_type_uint; + break; + default: + unreachable("Invalid image type"); + } + tex->is_array = true; + tex->is_shadow = false; + + tex->texture = nir_deref_var_clone(load->variables[0], tex); + tex->sampler = NULL; + tex->texture_index = 0; + tex->sampler_index = 0; + + tex->src[0].src_type = nir_tex_src_coord; + tex->src[0].src = nir_src_for_ssa(coord); + tex->coord_components = 3; + + tex->src[1].src_type = nir_tex_src_lod; + tex->src[1].src = nir_src_for_ssa(nir_imm_int(&b, 0)); + + if (image_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) { + tex->op = nir_texop_txf_ms; + tex->src[2].src_type = nir_tex_src_ms_index; + tex->src[2].src = load->src[1]; + } + + nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, NULL); + nir_builder_instr_insert(&b, &tex->instr); + + nir_ssa_def_rewrite_uses(&load->dest.ssa, + nir_src_for_ssa(&tex->dest.ssa)); +} + +void +anv_nir_lower_input_attachments(nir_shader *shader) +{ + assert(shader->stage == MESA_SHADER_FRAGMENT); + + nir_foreach_function(function, shader) { + if (!function->impl) + continue; + + nir_foreach_block(block, function->impl) { + nir_foreach_instr(instr, block) { + if (instr->type != nir_instr_type_intrinsic) + continue; + + nir_intrinsic_instr *load = nir_instr_as_intrinsic(instr); + + if (load->intrinsic != nir_intrinsic_image_load) + continue; + + try_lower_input_load(function->impl, load); + } + } + } +} diff -Nru mesa-12.0.6/src/intel/vulkan/anv_nir_lower_push_constants.c mesa-17.0.7/src/intel/vulkan/anv_nir_lower_push_constants.c --- mesa-12.0.6/src/intel/vulkan/anv_nir_lower_push_constants.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_nir_lower_push_constants.c 2017-06-01 10:37:10.000000000 +0000 @@ -42,7 +42,6 @@ continue; assert(intrin->const_index[0] % 4 == 0); - assert(intrin->const_index[1] == 128); /* We just turn them into uniform loads */ intrin->intrinsic = nir_intrinsic_load_uniform; diff -Nru mesa-12.0.6/src/intel/vulkan/anv_pass.c mesa-17.0.7/src/intel/vulkan/anv_pass.c --- mesa-12.0.6/src/intel/vulkan/anv_pass.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_pass.c 2017-06-01 10:37:10.000000000 +0000 @@ -41,7 +41,7 @@ attachments_offset = size; size += pCreateInfo->attachmentCount * sizeof(pass->attachments[0]); - pass = anv_alloc2(&device->alloc, pAllocator, size, 8, + pass = vk_alloc2(&device->alloc, pAllocator, size, 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (pass == NULL) return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); @@ -54,15 +54,30 @@ pass->subpass_count = pCreateInfo->subpassCount; pass->attachments = (void *) pass + attachments_offset; + pass->subpass_usages = + vk_zalloc2(&device->alloc, pAllocator, + pass->subpass_count * pass->attachment_count * + sizeof(*pass->subpass_usages), + 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (pass->subpass_usages == NULL) { + vk_free2(&device->alloc, pAllocator, pass); + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + } + + enum anv_subpass_usage *usages = pass->subpass_usages; for (uint32_t i = 0; i < pCreateInfo->attachmentCount; i++) { struct anv_render_pass_attachment *att = &pass->attachments[i]; att->format = pCreateInfo->pAttachments[i].format; att->samples = pCreateInfo->pAttachments[i].samples; + att->usage = 0; att->load_op = pCreateInfo->pAttachments[i].loadOp; + att->store_op = pCreateInfo->pAttachments[i].storeOp; att->stencil_load_op = pCreateInfo->pAttachments[i].stencilLoadOp; - // att->store_op = pCreateInfo->pAttachments[i].storeOp; - // att->stencil_store_op = pCreateInfo->pAttachments[i].stencilStoreOp; + att->initial_layout = pCreateInfo->pAttachments[i].initialLayout; + att->final_layout = pCreateInfo->pAttachments[i].finalLayout; + att->subpass_usage = usages; + usages += pass->subpass_count; } uint32_t subpass_attachment_count = 0, *p; @@ -77,11 +92,12 @@ } pass->subpass_attachments = - anv_alloc2(&device->alloc, pAllocator, + vk_alloc2(&device->alloc, pAllocator, subpass_attachment_count * sizeof(uint32_t), 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (pass->subpass_attachments == NULL) { - anv_free2(&device->alloc, pAllocator, pass); + vk_free2(&device->alloc, pAllocator, pass->subpass_usages); + vk_free2(&device->alloc, pAllocator, pass); return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); } @@ -98,8 +114,17 @@ p += desc->inputAttachmentCount; for (uint32_t j = 0; j < desc->inputAttachmentCount; j++) { - subpass->input_attachments[j] - = desc->pInputAttachments[j].attachment; + uint32_t a = desc->pInputAttachments[j].attachment; + subpass->input_attachments[j] = a; + if (a != VK_ATTACHMENT_UNUSED) { + pass->attachments[a].usage |= VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT; + pass->attachments[a].subpass_usage[i] |= ANV_SUBPASS_USAGE_INPUT; + pass->attachments[a].last_subpass_idx = i; + + if (desc->pDepthStencilAttachment && + a == desc->pDepthStencilAttachment->attachment) + subpass->has_ds_self_dep = true; + } } } @@ -108,8 +133,13 @@ p += desc->colorAttachmentCount; for (uint32_t j = 0; j < desc->colorAttachmentCount; j++) { - subpass->color_attachments[j] - = desc->pColorAttachments[j].attachment; + uint32_t a = desc->pColorAttachments[j].attachment; + subpass->color_attachments[j] = a; + if (a != VK_ATTACHMENT_UNUSED) { + pass->attachments[a].usage |= VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT; + pass->attachments[a].subpass_usage[i] |= ANV_SUBPASS_USAGE_DRAW; + pass->attachments[a].last_subpass_idx = i; + } } } @@ -121,16 +151,36 @@ for (uint32_t j = 0; j < desc->colorAttachmentCount; j++) { uint32_t a = desc->pResolveAttachments[j].attachment; subpass->resolve_attachments[j] = a; - if (a != VK_ATTACHMENT_UNUSED) + if (a != VK_ATTACHMENT_UNUSED) { subpass->has_resolve = true; + uint32_t color_att = desc->pColorAttachments[j].attachment; + pass->attachments[color_att].usage |= + VK_IMAGE_USAGE_TRANSFER_SRC_BIT; + pass->attachments[a].usage |= VK_IMAGE_USAGE_TRANSFER_DST_BIT; + + pass->attachments[color_att].subpass_usage[i] |= + ANV_SUBPASS_USAGE_RESOLVE_SRC; + pass->attachments[a].subpass_usage[i] |= + ANV_SUBPASS_USAGE_RESOLVE_DST; + pass->attachments[a].last_subpass_idx = i; + } } } if (desc->pDepthStencilAttachment) { - subpass->depth_stencil_attachment = - desc->pDepthStencilAttachment->attachment; + uint32_t a = desc->pDepthStencilAttachment->attachment; + subpass->depth_stencil_attachment = a; + subpass->depth_stencil_layout = + desc->pDepthStencilAttachment->layout; + if (a != VK_ATTACHMENT_UNUSED) { + pass->attachments[a].usage |= + VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT; + pass->attachments[a].subpass_usage[i] |= ANV_SUBPASS_USAGE_DRAW; + pass->attachments[a].last_subpass_idx = i; + } } else { subpass->depth_stencil_attachment = VK_ATTACHMENT_UNUSED; + subpass->depth_stencil_layout = VK_IMAGE_LAYOUT_UNDEFINED; } } @@ -147,8 +197,12 @@ ANV_FROM_HANDLE(anv_device, device, _device); ANV_FROM_HANDLE(anv_render_pass, pass, _pass); - anv_free2(&device->alloc, pAllocator, pass->subpass_attachments); - anv_free2(&device->alloc, pAllocator, pass); + if (!pass) + return; + + vk_free2(&device->alloc, pAllocator, pass->subpass_attachments); + vk_free2(&device->alloc, pAllocator, pass->subpass_usages); + vk_free2(&device->alloc, pAllocator, pass); } void anv_GetRenderAreaGranularity( @@ -156,5 +210,18 @@ VkRenderPass renderPass, VkExtent2D* pGranularity) { + ANV_FROM_HANDLE(anv_render_pass, pass, renderPass); + + /* This granularity satisfies HiZ fast clear alignment requirements + * for all sample counts. + */ + for (unsigned i = 0; i < pass->subpass_count; ++i) { + if (pass->subpasses[i].depth_stencil_attachment != + VK_ATTACHMENT_UNUSED) { + *pGranularity = (VkExtent2D) { .width = 8, .height = 4 }; + return; + } + } + *pGranularity = (VkExtent2D) { 1, 1 }; } diff -Nru mesa-12.0.6/src/intel/vulkan/anv_pipeline.c mesa-17.0.7/src/intel/vulkan/anv_pipeline.c --- mesa-12.0.6/src/intel/vulkan/anv_pipeline.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_pipeline.c 2017-06-01 10:37:10.000000000 +0000 @@ -28,6 +28,7 @@ #include #include "util/mesa-sha1.h" +#include "common/gen_l3_config.h" #include "anv_private.h" #include "brw_nir.h" #include "anv_nir.h" @@ -50,13 +51,12 @@ assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SHADER_MODULE_CREATE_INFO); assert(pCreateInfo->flags == 0); - module = anv_alloc2(&device->alloc, pAllocator, + module = vk_alloc2(&device->alloc, pAllocator, sizeof(*module) + pCreateInfo->codeSize, 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (module == NULL) return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); - module->nir = NULL; module->size = pCreateInfo->codeSize; memcpy(module->data, pCreateInfo->pCode, module->size); @@ -75,7 +75,10 @@ ANV_FROM_HANDLE(anv_device, device, _device); ANV_FROM_HANDLE(anv_shader_module, module, _module); - anv_free2(&device->alloc, pAllocator, module); + if (!module) + return; + + vk_free2(&device->alloc, pAllocator, module); } #define SPIR_V_MAGIC_NUMBER 0x07230203 @@ -99,95 +102,85 @@ const nir_shader_compiler_options *nir_options = compiler->glsl_compiler_options[stage].NirOptions; - nir_shader *nir; - nir_function *entry_point; - if (module->nir) { - /* Some things such as our meta clear/blit code will give us a NIR - * shader directly. In that case, we just ignore the SPIR-V entirely - * and just use the NIR shader */ - nir = module->nir; - nir->options = nir_options; - nir_validate_shader(nir); - - assert(exec_list_length(&nir->functions) == 1); - struct exec_node *node = exec_list_get_head(&nir->functions); - entry_point = exec_node_data(nir_function, node, node); - } else { - uint32_t *spirv = (uint32_t *) module->data; - assert(spirv[0] == SPIR_V_MAGIC_NUMBER); - assert(module->size % 4 == 0); - - uint32_t num_spec_entries = 0; - struct nir_spirv_specialization *spec_entries = NULL; - if (spec_info && spec_info->mapEntryCount > 0) { - num_spec_entries = spec_info->mapEntryCount; - spec_entries = malloc(num_spec_entries * sizeof(*spec_entries)); - for (uint32_t i = 0; i < num_spec_entries; i++) { - VkSpecializationMapEntry entry = spec_info->pMapEntries[i]; - const void *data = spec_info->pData + entry.offset; - assert(data + entry.size <= spec_info->pData + spec_info->dataSize); - - spec_entries[i].id = spec_info->pMapEntries[i].constantID; - spec_entries[i].data = *(const uint32_t *)data; - } - } - - entry_point = spirv_to_nir(spirv, module->size / 4, - spec_entries, num_spec_entries, - stage, entrypoint_name, nir_options); - nir = entry_point->shader; - assert(nir->stage == stage); - nir_validate_shader(nir); - - free(spec_entries); - - if (stage == MESA_SHADER_FRAGMENT) { - nir_lower_wpos_center(nir); - nir_validate_shader(nir); - } - - nir_lower_returns(nir); - nir_validate_shader(nir); - - nir_inline_functions(nir); - nir_validate_shader(nir); - - /* Pick off the single entrypoint that we want */ - foreach_list_typed_safe(nir_function, func, node, &nir->functions) { - if (func != entry_point) - exec_node_remove(&func->node); + uint32_t *spirv = (uint32_t *) module->data; + assert(spirv[0] == SPIR_V_MAGIC_NUMBER); + assert(module->size % 4 == 0); + + uint32_t num_spec_entries = 0; + struct nir_spirv_specialization *spec_entries = NULL; + if (spec_info && spec_info->mapEntryCount > 0) { + num_spec_entries = spec_info->mapEntryCount; + spec_entries = malloc(num_spec_entries * sizeof(*spec_entries)); + for (uint32_t i = 0; i < num_spec_entries; i++) { + VkSpecializationMapEntry entry = spec_info->pMapEntries[i]; + const void *data = spec_info->pData + entry.offset; + assert(data + entry.size <= spec_info->pData + spec_info->dataSize); + + spec_entries[i].id = spec_info->pMapEntries[i].constantID; + if (spec_info->dataSize == 8) + spec_entries[i].data64 = *(const uint64_t *)data; + else + spec_entries[i].data32 = *(const uint32_t *)data; } - assert(exec_list_length(&nir->functions) == 1); - entry_point->name = ralloc_strdup(entry_point, "main"); + } - nir_remove_dead_variables(nir, nir_var_shader_in); - nir_remove_dead_variables(nir, nir_var_shader_out); - nir_remove_dead_variables(nir, nir_var_system_value); - nir_validate_shader(nir); + const struct nir_spirv_supported_extensions supported_ext = { + .float64 = device->instance->physicalDevice.info.gen >= 8, + .tessellation = true, + }; + + nir_function *entry_point = + spirv_to_nir(spirv, module->size / 4, + spec_entries, num_spec_entries, + stage, entrypoint_name, &supported_ext, nir_options); + nir_shader *nir = entry_point->shader; + assert(nir->stage == stage); + nir_validate_shader(nir); + + free(spec_entries); + + /* We have to lower away local constant initializers right before we + * inline functions. That way they get properly initialized at the top + * of the function and not at the top of its caller. + */ + NIR_PASS_V(nir, nir_lower_constant_initializers, nir_var_local); + NIR_PASS_V(nir, nir_lower_returns); + NIR_PASS_V(nir, nir_inline_functions); + + /* Pick off the single entrypoint that we want */ + foreach_list_typed_safe(nir_function, func, node, &nir->functions) { + if (func != entry_point) + exec_node_remove(&func->node); + } + assert(exec_list_length(&nir->functions) == 1); + entry_point->name = ralloc_strdup(entry_point, "main"); - nir_propagate_invariant(nir); - nir_validate_shader(nir); + NIR_PASS_V(nir, nir_remove_dead_variables, + nir_var_shader_in | nir_var_shader_out | nir_var_system_value); - nir_lower_io_to_temporaries(entry_point->shader, entry_point, true, false); + if (stage == MESA_SHADER_FRAGMENT) + NIR_PASS_V(nir, nir_lower_wpos_center); - nir_lower_system_values(nir); - nir_validate_shader(nir); - } + /* Now that we've deleted all but the main function, we can go ahead and + * lower the rest of the constant initializers. + */ + NIR_PASS_V(nir, nir_lower_constant_initializers, ~0); + NIR_PASS_V(nir, nir_propagate_invariant); + NIR_PASS_V(nir, nir_lower_io_to_temporaries, + entry_point->impl, true, false); + NIR_PASS_V(nir, nir_lower_system_values); /* Vulkan uses the separate-shader linking model */ - nir->info.separate_shader = true; + nir->info->separate_shader = true; nir = brw_preprocess_nir(compiler, nir); - nir_shader_gather_info(nir, entry_point->impl); + NIR_PASS_V(nir, nir_lower_clip_cull_distance_arrays); - nir_variable_mode indirect_mask = 0; - if (compiler->glsl_compiler_options[stage].EmitNoIndirectInput) - indirect_mask |= nir_var_shader_in; - if (compiler->glsl_compiler_options[stage].EmitNoIndirectTemp) - indirect_mask |= nir_var_local; + if (stage == MESA_SHADER_FRAGMENT) + NIR_PASS_V(nir, anv_nir_lower_input_attachments); - nir_lower_indirect_derefs(nir, indirect_mask); + nir_shader_gather_info(nir, entry_point->impl); return nir; } @@ -200,6 +193,9 @@ ANV_FROM_HANDLE(anv_device, device, _device); ANV_FROM_HANDLE(anv_pipeline, pipeline, _pipeline); + if (!pipeline) + return; + anv_reloc_list_finish(&pipeline->batch_relocs, pAllocator ? pAllocator : &device->alloc); if (pipeline->blend_state.map) @@ -210,7 +206,7 @@ anv_shader_bin_unref(device, pipeline->shaders[s]); } - anv_free2(&device->alloc, pAllocator, pipeline); + vk_free2(&device->alloc, pAllocator, pipeline); } static const uint32_t vk_to_gen_primitive_type[] = { @@ -224,11 +220,10 @@ [VK_PRIMITIVE_TOPOLOGY_LINE_STRIP_WITH_ADJACENCY] = _3DPRIM_LINESTRIP_ADJ, [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST_WITH_ADJACENCY] = _3DPRIM_TRILIST_ADJ, [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP_WITH_ADJACENCY] = _3DPRIM_TRISTRIP_ADJ, -/* [VK_PRIMITIVE_TOPOLOGY_PATCH_LIST] = _3DPRIM_PATCHLIST_1 */ }; static void -populate_sampler_prog_key(const struct brw_device_info *devinfo, +populate_sampler_prog_key(const struct gen_device_info *devinfo, struct brw_sampler_prog_key_data *key) { /* XXX: Handle texture swizzle on HSW- */ @@ -239,7 +234,7 @@ } static void -populate_vs_prog_key(const struct brw_device_info *devinfo, +populate_vs_prog_key(const struct gen_device_info *devinfo, struct brw_vs_prog_key *key) { memset(key, 0, sizeof(*key)); @@ -252,7 +247,7 @@ } static void -populate_gs_prog_key(const struct brw_device_info *devinfo, +populate_gs_prog_key(const struct gen_device_info *devinfo, struct brw_gs_prog_key *key) { memset(key, 0, sizeof(*key)); @@ -261,18 +256,22 @@ } static void -populate_wm_prog_key(const struct brw_device_info *devinfo, +populate_wm_prog_key(const struct anv_pipeline *pipeline, const VkGraphicsPipelineCreateInfo *info, - const struct anv_graphics_pipeline_create_info *extra, struct brw_wm_prog_key *key) { + const struct gen_device_info *devinfo = &pipeline->device->info; ANV_FROM_HANDLE(anv_render_pass, render_pass, info->renderPass); memset(key, 0, sizeof(*key)); populate_sampler_prog_key(devinfo, &key->tex); - /* TODO: Fill out key->input_slots_valid */ + /* TODO: we could set this to 0 based on the information in nir_shader, but + * this function is called before spirv_to_nir. */ + const struct brw_vue_map *vue_map = + &anv_pipeline_get_last_vue_prog_data(pipeline)->vue_map; + key->input_slots_valid = vue_map->slots_valid; /* Vulkan doesn't specify a default */ key->high_quality_derivatives = false; @@ -280,12 +279,8 @@ /* XXX Vulkan doesn't appear to specify */ key->clamp_fragment_color = false; - if (extra && extra->color_attachment_count >= 0) { - key->nr_color_regions = extra->color_attachment_count; - } else { - key->nr_color_regions = - render_pass->subpasses[info->subpass].color_count; - } + key->nr_color_regions = + render_pass->subpasses[info->subpass].color_count; key->replicate_alpha = key->nr_color_regions > 1 && info->pMultisampleState && @@ -303,7 +298,7 @@ } static void -populate_cs_prog_key(const struct brw_device_info *devinfo, +populate_cs_prog_key(const struct gen_device_info *devinfo, struct brw_cs_prog_key *key) { memset(key, 0, sizeof(*key)); @@ -326,7 +321,7 @@ if (nir == NULL) return NULL; - anv_nir_lower_push_constants(nir); + NIR_PASS_V(nir, anv_nir_lower_push_constants); /* Figure out the number of parameters */ prog_data->nr_params = 0; @@ -335,14 +330,15 @@ /* If the shader uses any push constants at all, we'll just give * them the maximum possible number */ + assert(nir->num_uniforms <= MAX_PUSH_CONSTANTS_SIZE); prog_data->nr_params += MAX_PUSH_CONSTANTS_SIZE / sizeof(float); } if (pipeline->layout && pipeline->layout->stage[stage].has_dynamic_offsets) prog_data->nr_params += MAX_DYNAMIC_BUFFERS * 2; - if (nir->info.num_images > 0) { - prog_data->nr_params += nir->info.num_images * BRW_IMAGE_PARAM_SIZE; + if (nir->info->num_images > 0) { + prog_data->nr_params += nir->info->num_images * BRW_IMAGE_PARAM_SIZE; pipeline->needs_data_cache = true; } @@ -350,7 +346,7 @@ ((struct brw_cs_prog_data *)prog_data)->thread_local_id_index = prog_data->nr_params++; /* The CS Thread ID uniform */ - if (nir->info.num_ssbos > 0) + if (nir->info->num_ssbos > 0) pipeline->needs_data_cache = true; if (prog_data->nr_params > 0) { @@ -403,7 +399,8 @@ struct anv_pipeline_cache *cache, const void *key_data, uint32_t key_size, const void *kernel_data, uint32_t kernel_size, - const void *prog_data, uint32_t prog_data_size, + const struct brw_stage_prog_data *prog_data, + uint32_t prog_data_size, const struct anv_pipeline_bind_map *bind_map) { if (cache) { @@ -414,7 +411,8 @@ } else { return anv_shader_bin_create(pipeline->device, key_data, key_size, kernel_data, kernel_size, - prog_data, prog_data_size, bind_map); + prog_data, prog_data_size, + prog_data->param, bind_map); } } @@ -471,15 +469,15 @@ void *mem_ctx = ralloc_context(NULL); - if (module->nir == NULL) - ralloc_steal(mem_ctx, nir); + ralloc_steal(mem_ctx, nir); - prog_data.inputs_read = nir->info.inputs_read; + prog_data.inputs_read = nir->info->inputs_read; + prog_data.double_inputs_read = nir->info->double_inputs_read; brw_compute_vue_map(&pipeline->device->info, &prog_data.base.vue_map, - nir->info.outputs_written, - nir->info.separate_shader); + nir->info->outputs_written, + nir->info->separate_shader); unsigned code_size; const unsigned *shader_code = @@ -492,7 +490,8 @@ bin = anv_pipeline_upload_kernel(pipeline, cache, sha1, 20, shader_code, code_size, - &prog_data, sizeof(prog_data), &map); + &prog_data.base.base, sizeof(prog_data), + &map); if (!bin) { ralloc_free(mem_ctx); return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); @@ -501,18 +500,189 @@ ralloc_free(mem_ctx); } - const struct brw_vs_prog_data *vs_prog_data = - (const struct brw_vs_prog_data *)anv_shader_bin_get_prog_data(bin); + anv_pipeline_add_compiled_stage(pipeline, MESA_SHADER_VERTEX, bin); - if (vs_prog_data->base.dispatch_mode == DISPATCH_MODE_SIMD8) { - pipeline->vs_simd8 = bin->kernel.offset; - pipeline->vs_vec4 = NO_KERNEL; - } else { - pipeline->vs_simd8 = NO_KERNEL; - pipeline->vs_vec4 = bin->kernel.offset; + return VK_SUCCESS; +} + +static void +merge_tess_info(struct shader_info *tes_info, + const struct shader_info *tcs_info) +{ + /* The Vulkan 1.0.38 spec, section 21.1 Tessellator says: + * + * "PointMode. Controls generation of points rather than triangles + * or lines. This functionality defaults to disabled, and is + * enabled if either shader stage includes the execution mode. + * + * and about Triangles, Quads, IsoLines, VertexOrderCw, VertexOrderCcw, + * PointMode, SpacingEqual, SpacingFractionalEven, SpacingFractionalOdd, + * and OutputVertices, it says: + * + * "One mode must be set in at least one of the tessellation + * shader stages." + * + * So, the fields can be set in either the TCS or TES, but they must + * agree if set in both. Our backend looks at TES, so bitwise-or in + * the values from the TCS. + */ + assert(tcs_info->tess.tcs_vertices_out == 0 || + tes_info->tess.tcs_vertices_out == 0 || + tcs_info->tess.tcs_vertices_out == tes_info->tess.tcs_vertices_out); + tes_info->tess.tcs_vertices_out |= tcs_info->tess.tcs_vertices_out; + + assert(tcs_info->tess.spacing == TESS_SPACING_UNSPECIFIED || + tes_info->tess.spacing == TESS_SPACING_UNSPECIFIED || + tcs_info->tess.spacing == tes_info->tess.spacing); + tes_info->tess.spacing |= tcs_info->tess.spacing; + + tes_info->tess.ccw |= tcs_info->tess.ccw; + tes_info->tess.point_mode |= tcs_info->tess.point_mode; +} + +static VkResult +anv_pipeline_compile_tcs_tes(struct anv_pipeline *pipeline, + struct anv_pipeline_cache *cache, + const VkGraphicsPipelineCreateInfo *info, + struct anv_shader_module *tcs_module, + const char *tcs_entrypoint, + const VkSpecializationInfo *tcs_spec_info, + struct anv_shader_module *tes_module, + const char *tes_entrypoint, + const VkSpecializationInfo *tes_spec_info) +{ + const struct gen_device_info *devinfo = &pipeline->device->info; + const struct brw_compiler *compiler = + pipeline->device->instance->physicalDevice.compiler; + struct anv_pipeline_bind_map tcs_map; + struct anv_pipeline_bind_map tes_map; + struct brw_tcs_prog_key tcs_key = { 0, }; + struct brw_tes_prog_key tes_key = { 0, }; + struct anv_shader_bin *tcs_bin = NULL; + struct anv_shader_bin *tes_bin = NULL; + unsigned char tcs_sha1[40]; + unsigned char tes_sha1[40]; + + populate_sampler_prog_key(&pipeline->device->info, &tcs_key.tex); + populate_sampler_prog_key(&pipeline->device->info, &tes_key.tex); + tcs_key.input_vertices = info->pTessellationState->patchControlPoints; + + if (cache) { + anv_hash_shader(tcs_sha1, &tcs_key, sizeof(tcs_key), tcs_module, + tcs_entrypoint, pipeline->layout, tcs_spec_info); + anv_hash_shader(tes_sha1, &tes_key, sizeof(tes_key), tes_module, + tes_entrypoint, pipeline->layout, tes_spec_info); + memcpy(&tcs_sha1[20], tes_sha1, 20); + memcpy(&tes_sha1[20], tcs_sha1, 20); + tcs_bin = anv_pipeline_cache_search(cache, tcs_sha1, sizeof(tcs_sha1)); + tes_bin = anv_pipeline_cache_search(cache, tes_sha1, sizeof(tes_sha1)); + } + + if (tcs_bin == NULL || tes_bin == NULL) { + struct brw_tcs_prog_data tcs_prog_data = { 0, }; + struct brw_tes_prog_data tes_prog_data = { 0, }; + struct anv_pipeline_binding tcs_surface_to_descriptor[256]; + struct anv_pipeline_binding tcs_sampler_to_descriptor[256]; + struct anv_pipeline_binding tes_surface_to_descriptor[256]; + struct anv_pipeline_binding tes_sampler_to_descriptor[256]; + + tcs_map = (struct anv_pipeline_bind_map) { + .surface_to_descriptor = tcs_surface_to_descriptor, + .sampler_to_descriptor = tcs_sampler_to_descriptor + }; + tes_map = (struct anv_pipeline_bind_map) { + .surface_to_descriptor = tes_surface_to_descriptor, + .sampler_to_descriptor = tes_sampler_to_descriptor + }; + + nir_shader *tcs_nir = + anv_pipeline_compile(pipeline, tcs_module, tcs_entrypoint, + MESA_SHADER_TESS_CTRL, tcs_spec_info, + &tcs_prog_data.base.base, &tcs_map); + nir_shader *tes_nir = + anv_pipeline_compile(pipeline, tes_module, tes_entrypoint, + MESA_SHADER_TESS_EVAL, tes_spec_info, + &tes_prog_data.base.base, &tes_map); + if (tcs_nir == NULL || tes_nir == NULL) + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + + nir_lower_tes_patch_vertices(tes_nir, + tcs_nir->info->tess.tcs_vertices_out); + + /* Copy TCS info into the TES info */ + merge_tess_info(tes_nir->info, tcs_nir->info); + + anv_fill_binding_table(&tcs_prog_data.base.base, 0); + anv_fill_binding_table(&tes_prog_data.base.base, 0); + + void *mem_ctx = ralloc_context(NULL); + + ralloc_steal(mem_ctx, tcs_nir); + ralloc_steal(mem_ctx, tes_nir); + + /* Whacking the key after cache lookup is a bit sketchy, but all of + * this comes from the SPIR-V, which is part of the hash used for the + * pipeline cache. So it should be safe. + */ + tcs_key.tes_primitive_mode = tes_nir->info->tess.primitive_mode; + tcs_key.outputs_written = tcs_nir->info->outputs_written; + tcs_key.patch_outputs_written = tcs_nir->info->patch_outputs_written; + tcs_key.quads_workaround = + devinfo->gen < 9 && + tes_nir->info->tess.primitive_mode == 7 /* GL_QUADS */ && + tes_nir->info->tess.spacing == TESS_SPACING_EQUAL; + + tes_key.inputs_read = tcs_key.outputs_written; + tes_key.patch_inputs_read = tcs_key.patch_outputs_written; + + unsigned code_size; + const int shader_time_index = -1; + const unsigned *shader_code; + + shader_code = + brw_compile_tcs(compiler, NULL, mem_ctx, &tcs_key, &tcs_prog_data, + tcs_nir, shader_time_index, &code_size, NULL); + if (shader_code == NULL) { + ralloc_free(mem_ctx); + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + } + + tcs_bin = anv_pipeline_upload_kernel(pipeline, cache, + tcs_sha1, sizeof(tcs_sha1), + shader_code, code_size, + &tcs_prog_data.base.base, + sizeof(tcs_prog_data), + &tcs_map); + if (!tcs_bin) { + ralloc_free(mem_ctx); + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + } + + shader_code = + brw_compile_tes(compiler, NULL, mem_ctx, &tes_key, + &tcs_prog_data.base.vue_map, &tes_prog_data, tes_nir, + NULL, shader_time_index, &code_size, NULL); + if (shader_code == NULL) { + ralloc_free(mem_ctx); + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + } + + tes_bin = anv_pipeline_upload_kernel(pipeline, cache, + tes_sha1, sizeof(tes_sha1), + shader_code, code_size, + &tes_prog_data.base.base, + sizeof(tes_prog_data), + &tes_map); + if (!tes_bin) { + ralloc_free(mem_ctx); + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + } + + ralloc_free(mem_ctx); } - anv_pipeline_add_compiled_stage(pipeline, MESA_SHADER_VERTEX, bin); + anv_pipeline_add_compiled_stage(pipeline, MESA_SHADER_TESS_CTRL, tcs_bin); + anv_pipeline_add_compiled_stage(pipeline, MESA_SHADER_TESS_EVAL, tes_bin); return VK_SUCCESS; } @@ -560,13 +730,12 @@ void *mem_ctx = ralloc_context(NULL); - if (module->nir == NULL) - ralloc_steal(mem_ctx, nir); + ralloc_steal(mem_ctx, nir); brw_compute_vue_map(&pipeline->device->info, &prog_data.base.vue_map, - nir->info.outputs_written, - nir->info.separate_shader); + nir->info->outputs_written, + nir->info->separate_shader); unsigned code_size; const unsigned *shader_code = @@ -580,7 +749,8 @@ /* TODO: SIMD8 GS */ bin = anv_pipeline_upload_kernel(pipeline, cache, sha1, 20, shader_code, code_size, - &prog_data, sizeof(prog_data), &map); + &prog_data.base.base, sizeof(prog_data), + &map); if (!bin) { ralloc_free(mem_ctx); return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); @@ -589,8 +759,6 @@ ralloc_free(mem_ctx); } - pipeline->gs_kernel = bin->kernel.offset; - anv_pipeline_add_compiled_stage(pipeline, MESA_SHADER_GEOMETRY, bin); return VK_SUCCESS; @@ -600,7 +768,6 @@ anv_pipeline_compile_fs(struct anv_pipeline *pipeline, struct anv_pipeline_cache *cache, const VkGraphicsPipelineCreateInfo *info, - const struct anv_graphics_pipeline_create_info *extra, struct anv_shader_module *module, const char *entrypoint, const VkSpecializationInfo *spec_info) @@ -612,7 +779,7 @@ struct anv_shader_bin *bin = NULL; unsigned char sha1[20]; - populate_wm_prog_key(&pipeline->device->info, info, extra, &key); + populate_wm_prog_key(pipeline, info, &key); if (cache) { anv_hash_shader(sha1, &key, sizeof(key), module, entrypoint, @@ -638,7 +805,7 @@ unsigned num_rts = 0; struct anv_pipeline_binding rt_bindings[8]; - nir_function_impl *impl = nir_shader_get_entrypoint(nir)->impl; + nir_function_impl *impl = nir_shader_get_entrypoint(nir); nir_foreach_variable_safe(var, &nir->outputs) { if (var->data.location < FRAG_RESULT_DATA0) continue; @@ -670,17 +837,12 @@ num_rts += array_len; } - if (pipeline->use_repclear) { - assert(num_rts == 1); - key.nr_color_regions = 1; - } - if (num_rts == 0) { /* If we have no render targets, we need a null render target */ rt_bindings[0] = (struct anv_pipeline_binding) { .set = ANV_DESCRIPTOR_SET_COLOR_ATTACHMENTS, .binding = 0, - .index = UINT16_MAX, + .index = UINT8_MAX, }; num_rts = 1; } @@ -696,14 +858,12 @@ void *mem_ctx = ralloc_context(NULL); - if (module->nir == NULL) - ralloc_steal(mem_ctx, nir); + ralloc_steal(mem_ctx, nir); unsigned code_size; const unsigned *shader_code = brw_compile_fs(compiler, NULL, mem_ctx, &key, &prog_data, nir, - NULL, -1, -1, true, pipeline->use_repclear, - &code_size, NULL); + NULL, -1, -1, true, false, NULL, &code_size, NULL); if (shader_code == NULL) { ralloc_free(mem_ctx); return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); @@ -711,7 +871,8 @@ bin = anv_pipeline_upload_kernel(pipeline, cache, sha1, 20, shader_code, code_size, - &prog_data, sizeof(prog_data), &map); + &prog_data.base, sizeof(prog_data), + &map); if (!bin) { ralloc_free(mem_ctx); return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); @@ -720,8 +881,6 @@ ralloc_free(mem_ctx); } - pipeline->ps_ksp0 = bin->kernel.offset; - anv_pipeline_add_compiled_stage(pipeline, MESA_SHADER_FRAGMENT, bin); return VK_SUCCESS; @@ -770,8 +929,7 @@ void *mem_ctx = ralloc_context(NULL); - if (module->nir == NULL) - ralloc_steal(mem_ctx, nir); + ralloc_steal(mem_ctx, nir); unsigned code_size; const unsigned *shader_code = @@ -784,7 +942,8 @@ bin = anv_pipeline_upload_kernel(pipeline, cache, sha1, 20, shader_code, code_size, - &prog_data, sizeof(prog_data), &map); + &prog_data.base, sizeof(prog_data), + &map); if (!bin) { ralloc_free(mem_ctx); return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); @@ -793,177 +952,11 @@ ralloc_free(mem_ctx); } - pipeline->cs_simd = bin->kernel.offset; - anv_pipeline_add_compiled_stage(pipeline, MESA_SHADER_COMPUTE, bin); return VK_SUCCESS; } - -void -anv_setup_pipeline_l3_config(struct anv_pipeline *pipeline) -{ - const struct brw_device_info *devinfo = &pipeline->device->info; - switch (devinfo->gen) { - case 7: - if (devinfo->is_haswell) - gen75_setup_pipeline_l3_config(pipeline); - else - gen7_setup_pipeline_l3_config(pipeline); - break; - case 8: - gen8_setup_pipeline_l3_config(pipeline); - break; - case 9: - gen9_setup_pipeline_l3_config(pipeline); - break; - default: - unreachable("unsupported gen\n"); - } -} - -void -anv_compute_urb_partition(struct anv_pipeline *pipeline) -{ - const struct brw_device_info *devinfo = &pipeline->device->info; - - bool vs_present = pipeline->active_stages & VK_SHADER_STAGE_VERTEX_BIT; - unsigned vs_size = vs_present ? - get_vs_prog_data(pipeline)->base.urb_entry_size : 1; - unsigned vs_entry_size_bytes = vs_size * 64; - bool gs_present = pipeline->active_stages & VK_SHADER_STAGE_GEOMETRY_BIT; - unsigned gs_size = gs_present ? - get_gs_prog_data(pipeline)->base.urb_entry_size : 1; - unsigned gs_entry_size_bytes = gs_size * 64; - - /* From p35 of the Ivy Bridge PRM (section 1.7.1: 3DSTATE_URB_GS): - * - * VS Number of URB Entries must be divisible by 8 if the VS URB Entry - * Allocation Size is less than 9 512-bit URB entries. - * - * Similar text exists for GS. - */ - unsigned vs_granularity = (vs_size < 9) ? 8 : 1; - unsigned gs_granularity = (gs_size < 9) ? 8 : 1; - - /* URB allocations must be done in 8k chunks. */ - unsigned chunk_size_bytes = 8192; - - /* Determine the size of the URB in chunks. */ - unsigned urb_chunks = pipeline->urb.total_size * 1024 / chunk_size_bytes; - - /* Reserve space for push constants */ - unsigned push_constant_kb; - if (pipeline->device->info.gen >= 8) - push_constant_kb = 32; - else if (pipeline->device->info.is_haswell) - push_constant_kb = pipeline->device->info.gt == 3 ? 32 : 16; - else - push_constant_kb = 16; - - unsigned push_constant_bytes = push_constant_kb * 1024; - unsigned push_constant_chunks = - push_constant_bytes / chunk_size_bytes; - - /* Initially, assign each stage the minimum amount of URB space it needs, - * and make a note of how much additional space it "wants" (the amount of - * additional space it could actually make use of). - */ - - /* VS has a lower limit on the number of URB entries */ - unsigned vs_chunks = - ALIGN(devinfo->urb.min_vs_entries * vs_entry_size_bytes, - chunk_size_bytes) / chunk_size_bytes; - unsigned vs_wants = - ALIGN(devinfo->urb.max_vs_entries * vs_entry_size_bytes, - chunk_size_bytes) / chunk_size_bytes - vs_chunks; - - unsigned gs_chunks = 0; - unsigned gs_wants = 0; - if (gs_present) { - /* There are two constraints on the minimum amount of URB space we can - * allocate: - * - * (1) We need room for at least 2 URB entries, since we always operate - * the GS in DUAL_OBJECT mode. - * - * (2) We can't allocate less than nr_gs_entries_granularity. - */ - gs_chunks = ALIGN(MAX2(gs_granularity, 2) * gs_entry_size_bytes, - chunk_size_bytes) / chunk_size_bytes; - gs_wants = - ALIGN(devinfo->urb.max_gs_entries * gs_entry_size_bytes, - chunk_size_bytes) / chunk_size_bytes - gs_chunks; - } - - /* There should always be enough URB space to satisfy the minimum - * requirements of each stage. - */ - unsigned total_needs = push_constant_chunks + vs_chunks + gs_chunks; - assert(total_needs <= urb_chunks); - - /* Mete out remaining space (if any) in proportion to "wants". */ - unsigned total_wants = vs_wants + gs_wants; - unsigned remaining_space = urb_chunks - total_needs; - if (remaining_space > total_wants) - remaining_space = total_wants; - if (remaining_space > 0) { - unsigned vs_additional = (unsigned) - round(vs_wants * (((double) remaining_space) / total_wants)); - vs_chunks += vs_additional; - remaining_space -= vs_additional; - gs_chunks += remaining_space; - } - - /* Sanity check that we haven't over-allocated. */ - assert(push_constant_chunks + vs_chunks + gs_chunks <= urb_chunks); - - /* Finally, compute the number of entries that can fit in the space - * allocated to each stage. - */ - unsigned nr_vs_entries = vs_chunks * chunk_size_bytes / vs_entry_size_bytes; - unsigned nr_gs_entries = gs_chunks * chunk_size_bytes / gs_entry_size_bytes; - - /* Since we rounded up when computing *_wants, this may be slightly more - * than the maximum allowed amount, so correct for that. - */ - nr_vs_entries = MIN2(nr_vs_entries, devinfo->urb.max_vs_entries); - nr_gs_entries = MIN2(nr_gs_entries, devinfo->urb.max_gs_entries); - - /* Ensure that we program a multiple of the granularity. */ - nr_vs_entries = ROUND_DOWN_TO(nr_vs_entries, vs_granularity); - nr_gs_entries = ROUND_DOWN_TO(nr_gs_entries, gs_granularity); - - /* Finally, sanity check to make sure we have at least the minimum number - * of entries needed for each stage. - */ - assert(nr_vs_entries >= devinfo->urb.min_vs_entries); - if (gs_present) - assert(nr_gs_entries >= 2); - - /* Lay out the URB in the following order: - * - push constants - * - VS - * - GS - */ - pipeline->urb.start[MESA_SHADER_VERTEX] = push_constant_chunks; - pipeline->urb.size[MESA_SHADER_VERTEX] = vs_size; - pipeline->urb.entries[MESA_SHADER_VERTEX] = nr_vs_entries; - - pipeline->urb.start[MESA_SHADER_GEOMETRY] = push_constant_chunks + vs_chunks; - pipeline->urb.size[MESA_SHADER_GEOMETRY] = gs_size; - pipeline->urb.entries[MESA_SHADER_GEOMETRY] = nr_gs_entries; - - pipeline->urb.start[MESA_SHADER_TESS_CTRL] = push_constant_chunks; - pipeline->urb.size[MESA_SHADER_TESS_CTRL] = 1; - pipeline->urb.entries[MESA_SHADER_TESS_CTRL] = 0; - - pipeline->urb.start[MESA_SHADER_TESS_EVAL] = push_constant_chunks; - pipeline->urb.size[MESA_SHADER_TESS_EVAL] = 1; - pipeline->urb.entries[MESA_SHADER_TESS_EVAL] = 0; -} - /** * Copy pipeline state not marked as dynamic. * Dynamic state is pipeline state which hasn't been provided at pipeline @@ -1112,30 +1105,30 @@ struct anv_subpass *subpass = NULL; /* Assert that all required members of VkGraphicsPipelineCreateInfo are - * present, as explained by the Vulkan (20 Oct 2015, git-aa308cb), Section - * 4.2 Graphics Pipeline. + * present. See the Vulkan 1.0.28 spec, Section 9.2 Graphics Pipelines. */ assert(info->sType == VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO); renderpass = anv_render_pass_from_handle(info->renderPass); assert(renderpass); - if (renderpass != &anv_meta_dummy_renderpass) { - assert(info->subpass < renderpass->subpass_count); - subpass = &renderpass->subpasses[info->subpass]; - } + assert(info->subpass < renderpass->subpass_count); + subpass = &renderpass->subpasses[info->subpass]; assert(info->stageCount >= 1); assert(info->pVertexInputState); assert(info->pInputAssemblyState); - assert(info->pViewportState); assert(info->pRasterizationState); + if (!info->pRasterizationState->rasterizerDiscardEnable) { + assert(info->pViewportState); + assert(info->pMultisampleState); - if (subpass && subpass->depth_stencil_attachment != VK_ATTACHMENT_UNUSED) - assert(info->pDepthStencilState); + if (subpass && subpass->depth_stencil_attachment != VK_ATTACHMENT_UNUSED) + assert(info->pDepthStencilState); - if (subpass && subpass->color_count > 0) - assert(info->pColorBlendState); + if (subpass && subpass->color_count > 0) + assert(info->pColorBlendState); + } for (uint32_t i = 0; i < info->stageCount; ++i) { switch (info->pStages[i].stage) { @@ -1149,12 +1142,31 @@ } } +/** + * Calculate the desired L3 partitioning based on the current state of the + * pipeline. For now this simply returns the conservative defaults calculated + * by get_default_l3_weights(), but we could probably do better by gathering + * more statistics from the pipeline state (e.g. guess of expected URB usage + * and bound surfaces), or by using feed-back from performance counters. + */ +void +anv_pipeline_setup_l3_config(struct anv_pipeline *pipeline, bool needs_slm) +{ + const struct gen_device_info *devinfo = &pipeline->device->info; + + const struct gen_l3_weights w = + gen_get_default_l3_weights(devinfo, pipeline->needs_data_cache, needs_slm); + + pipeline->urb.l3_config = gen_get_l3_config(devinfo, w); + pipeline->urb.total_size = + gen_get_l3_config_urb_size(devinfo, pipeline->urb.l3_config); +} + VkResult anv_pipeline_init(struct anv_pipeline *pipeline, struct anv_device *device, struct anv_pipeline_cache *cache, const VkGraphicsPipelineCreateInfo *pCreateInfo, - const struct anv_graphics_pipeline_create_info *extra, const VkAllocationCallbacks *alloc) { VkResult result; @@ -1182,8 +1194,6 @@ pipeline->depth_clamp_enable = pCreateInfo->pRasterizationState && pCreateInfo->pRasterizationState->depthClampEnable; - pipeline->use_repclear = extra && extra->use_repclear; - pipeline->needs_data_cache = false; /* When we free the pipeline, we detect stages based on the NULL status @@ -1191,11 +1201,6 @@ */ memset(pipeline->shaders, 0, sizeof(pipeline->shaders)); - pipeline->vs_simd8 = NO_KERNEL; - pipeline->vs_vec4 = NO_KERNEL; - pipeline->gs_kernel = NO_KERNEL; - pipeline->ps_ksp0 = NO_KERNEL; - pipeline->active_stages = 0; const VkPipelineShaderStageCreateInfo *pStages[MESA_SHADER_STAGES] = { 0, }; @@ -1215,8 +1220,15 @@ goto compile_fail; } - if (modules[MESA_SHADER_TESS_CTRL] || modules[MESA_SHADER_TESS_EVAL]) - anv_finishme("no tessellation support"); + if (modules[MESA_SHADER_TESS_EVAL]) { + anv_pipeline_compile_tcs_tes(pipeline, cache, pCreateInfo, + modules[MESA_SHADER_TESS_CTRL], + pStages[MESA_SHADER_TESS_CTRL]->pName, + pStages[MESA_SHADER_TESS_CTRL]->pSpecializationInfo, + modules[MESA_SHADER_TESS_EVAL], + pStages[MESA_SHADER_TESS_EVAL]->pName, + pStages[MESA_SHADER_TESS_EVAL]->pSpecializationInfo); + } if (modules[MESA_SHADER_GEOMETRY]) { result = anv_pipeline_compile_gs(pipeline, cache, pCreateInfo, @@ -1228,7 +1240,7 @@ } if (modules[MESA_SHADER_FRAGMENT]) { - result = anv_pipeline_compile_fs(pipeline, cache, pCreateInfo, extra, + result = anv_pipeline_compile_fs(pipeline, cache, pCreateInfo, modules[MESA_SHADER_FRAGMENT], pStages[MESA_SHADER_FRAGMENT]->pName, pStages[MESA_SHADER_FRAGMENT]->pSpecializationInfo); @@ -1236,27 +1248,14 @@ goto compile_fail; } - if (!(pipeline->active_stages & VK_SHADER_STAGE_VERTEX_BIT)) { - /* Vertex is only optional if disable_vs is set */ - assert(extra->disable_vs); - } + assert(pipeline->active_stages & VK_SHADER_STAGE_VERTEX_BIT); - anv_setup_pipeline_l3_config(pipeline); - anv_compute_urb_partition(pipeline); + anv_pipeline_setup_l3_config(pipeline, false); const VkPipelineVertexInputStateCreateInfo *vi_info = pCreateInfo->pVertexInputState; - uint64_t inputs_read; - if (extra && extra->disable_vs) { - /* If the VS is disabled, just assume the user knows what they're - * doing and apply the layout blindly. This can only come from - * meta, so this *should* be safe. - */ - inputs_read = ~0ull; - } else { - inputs_read = get_vs_prog_data(pipeline)->inputs_read; - } + const uint64_t inputs_read = get_vs_prog_data(pipeline)->inputs_read; pipeline->vb_used = 0; for (uint32_t i = 0; i < vi_info->vertexAttributeDescriptionCount; i++) { @@ -1289,11 +1288,14 @@ const VkPipelineInputAssemblyStateCreateInfo *ia_info = pCreateInfo->pInputAssemblyState; + const VkPipelineTessellationStateCreateInfo *tess_info = + pCreateInfo->pTessellationState; pipeline->primitive_restart = ia_info->primitiveRestartEnable; - pipeline->topology = vk_to_gen_primitive_type[ia_info->topology]; - if (extra && extra->use_rectlist) - pipeline->topology = _3DPRIM_RECTLIST; + if (anv_pipeline_has_stage(pipeline, MESA_SHADER_TESS_EVAL)) + pipeline->topology = _3DPRIM_PATCHLIST(tess_info->patchControlPoints); + else + pipeline->topology = vk_to_gen_primitive_type[ia_info->topology]; return VK_SUCCESS; @@ -1307,110 +1309,3 @@ return result; } - -VkResult -anv_graphics_pipeline_create( - VkDevice _device, - VkPipelineCache _cache, - const VkGraphicsPipelineCreateInfo *pCreateInfo, - const struct anv_graphics_pipeline_create_info *extra, - const VkAllocationCallbacks *pAllocator, - VkPipeline *pPipeline) -{ - ANV_FROM_HANDLE(anv_device, device, _device); - ANV_FROM_HANDLE(anv_pipeline_cache, cache, _cache); - - switch (device->info.gen) { - case 7: - if (device->info.is_haswell) - return gen75_graphics_pipeline_create(_device, cache, pCreateInfo, extra, pAllocator, pPipeline); - else - return gen7_graphics_pipeline_create(_device, cache, pCreateInfo, extra, pAllocator, pPipeline); - case 8: - return gen8_graphics_pipeline_create(_device, cache, pCreateInfo, extra, pAllocator, pPipeline); - case 9: - return gen9_graphics_pipeline_create(_device, cache, pCreateInfo, extra, pAllocator, pPipeline); - default: - unreachable("unsupported gen\n"); - } -} - -VkResult anv_CreateGraphicsPipelines( - VkDevice _device, - VkPipelineCache pipelineCache, - uint32_t count, - const VkGraphicsPipelineCreateInfo* pCreateInfos, - const VkAllocationCallbacks* pAllocator, - VkPipeline* pPipelines) -{ - VkResult result = VK_SUCCESS; - - unsigned i = 0; - for (; i < count; i++) { - result = anv_graphics_pipeline_create(_device, - pipelineCache, - &pCreateInfos[i], - NULL, pAllocator, &pPipelines[i]); - if (result != VK_SUCCESS) { - for (unsigned j = 0; j < i; j++) { - anv_DestroyPipeline(_device, pPipelines[j], pAllocator); - } - - return result; - } - } - - return VK_SUCCESS; -} - -static VkResult anv_compute_pipeline_create( - VkDevice _device, - VkPipelineCache _cache, - const VkComputePipelineCreateInfo* pCreateInfo, - const VkAllocationCallbacks* pAllocator, - VkPipeline* pPipeline) -{ - ANV_FROM_HANDLE(anv_device, device, _device); - ANV_FROM_HANDLE(anv_pipeline_cache, cache, _cache); - - switch (device->info.gen) { - case 7: - if (device->info.is_haswell) - return gen75_compute_pipeline_create(_device, cache, pCreateInfo, pAllocator, pPipeline); - else - return gen7_compute_pipeline_create(_device, cache, pCreateInfo, pAllocator, pPipeline); - case 8: - return gen8_compute_pipeline_create(_device, cache, pCreateInfo, pAllocator, pPipeline); - case 9: - return gen9_compute_pipeline_create(_device, cache, pCreateInfo, pAllocator, pPipeline); - default: - unreachable("unsupported gen\n"); - } -} - -VkResult anv_CreateComputePipelines( - VkDevice _device, - VkPipelineCache pipelineCache, - uint32_t count, - const VkComputePipelineCreateInfo* pCreateInfos, - const VkAllocationCallbacks* pAllocator, - VkPipeline* pPipelines) -{ - VkResult result = VK_SUCCESS; - - unsigned i = 0; - for (; i < count; i++) { - result = anv_compute_pipeline_create(_device, pipelineCache, - &pCreateInfos[i], - pAllocator, &pPipelines[i]); - if (result != VK_SUCCESS) { - for (unsigned j = 0; j < i; j++) { - anv_DestroyPipeline(_device, pPipelines[j], pAllocator); - } - - return result; - } - } - - return VK_SUCCESS; -} diff -Nru mesa-12.0.6/src/intel/vulkan/anv_pipeline_cache.c mesa-17.0.7/src/intel/vulkan/anv_pipeline_cache.c --- mesa-12.0.6/src/intel/vulkan/anv_pipeline_cache.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_pipeline_cache.c 2017-06-01 10:37:10.000000000 +0000 @@ -26,13 +26,9 @@ #include "util/debug.h" #include "anv_private.h" -struct shader_bin_key { - uint32_t size; - uint8_t data[0]; -}; - static size_t -anv_shader_bin_size(uint32_t prog_data_size, uint32_t key_size, +anv_shader_bin_size(uint32_t prog_data_size, uint32_t nr_params, + uint32_t key_size, uint32_t surface_count, uint32_t sampler_count) { const uint32_t binding_data_size = @@ -40,32 +36,25 @@ return align_u32(sizeof(struct anv_shader_bin), 8) + align_u32(prog_data_size, 8) + + align_u32(nr_params * sizeof(void *), 8) + align_u32(sizeof(uint32_t) + key_size, 8) + align_u32(binding_data_size, 8); } -static inline const struct shader_bin_key * -anv_shader_bin_get_key(const struct anv_shader_bin *shader) -{ - const void *data = shader; - data += align_u32(sizeof(struct anv_shader_bin), 8); - data += align_u32(shader->prog_data_size, 8); - return data; -} - struct anv_shader_bin * anv_shader_bin_create(struct anv_device *device, const void *key_data, uint32_t key_size, const void *kernel_data, uint32_t kernel_size, - const void *prog_data, uint32_t prog_data_size, + const struct brw_stage_prog_data *prog_data, + uint32_t prog_data_size, const void *prog_data_param, const struct anv_pipeline_bind_map *bind_map) { const size_t size = - anv_shader_bin_size(prog_data_size, key_size, + anv_shader_bin_size(prog_data_size, prog_data->nr_params, key_size, bind_map->surface_count, bind_map->sampler_count); struct anv_shader_bin *shader = - anv_alloc(&device->alloc, size, 8, VK_SYSTEM_ALLOCATION_SCOPE_DEVICE); + vk_alloc(&device->alloc, size, 8, VK_SYSTEM_ALLOCATION_SCOPE_DEVICE); if (!shader) return NULL; @@ -82,10 +71,20 @@ void *data = shader; data += align_u32(sizeof(struct anv_shader_bin), 8); + shader->prog_data = data; + struct brw_stage_prog_data *new_prog_data = data; memcpy(data, prog_data, prog_data_size); data += align_u32(prog_data_size, 8); - struct shader_bin_key *key = data; + assert(prog_data->nr_pull_params == 0); + assert(prog_data->nr_image_params == 0); + new_prog_data->param = data; + uint32_t param_size = prog_data->nr_params * sizeof(void *); + memcpy(data, prog_data_param, param_size); + data += align_u32(param_size, 8); + + shader->key = data; + struct anv_shader_bin_key *key = data; key->size = key_size; memcpy(key->data, key_data, key_size); data += align_u32(sizeof(*key) + key_size, 8); @@ -108,14 +107,14 @@ { assert(shader->ref_cnt == 0); anv_state_pool_free(&device->instruction_state_pool, shader->kernel); - anv_free(&device->alloc, shader); + vk_free(&device->alloc, shader); } static size_t anv_shader_bin_data_size(const struct anv_shader_bin *shader) { return anv_shader_bin_size(shader->prog_data_size, - anv_shader_bin_get_key(shader)->size, + shader->prog_data->nr_params, shader->key->size, shader->bind_map.surface_count, shader->bind_map.sampler_count) + align_u32(shader->kernel_size, 8); @@ -126,7 +125,7 @@ { size_t struct_size = anv_shader_bin_size(shader->prog_data_size, - anv_shader_bin_get_key(shader)->size, + shader->prog_data->nr_params, shader->key->size, shader->bind_map.surface_count, shader->bind_map.sampler_count); @@ -151,14 +150,14 @@ static uint32_t shader_bin_key_hash_func(const void *void_key) { - const struct shader_bin_key *key = void_key; + const struct anv_shader_bin_key *key = void_key; return _mesa_hash_data(key->data, key->size); } static bool shader_bin_key_compare_func(const void *void_a, const void *void_b) { - const struct shader_bin_key *a = void_a, *b = void_b; + const struct anv_shader_bin_key *a = void_a, *b = void_b; if (a->size != b->size) return false; @@ -230,7 +229,7 @@ const void *key_data, uint32_t key_size) { uint32_t vla[1 + DIV_ROUND_UP(key_size, sizeof(uint32_t))]; - struct shader_bin_key *key = (void *)vla; + struct anv_shader_bin_key *key = (void *)vla; key->size = key_size; memcpy(key->data, key_data, key_size); @@ -266,7 +265,9 @@ anv_pipeline_cache_add_shader(struct anv_pipeline_cache *cache, const void *key_data, uint32_t key_size, const void *kernel_data, uint32_t kernel_size, - const void *prog_data, uint32_t prog_data_size, + const struct brw_stage_prog_data *prog_data, + uint32_t prog_data_size, + const void *prog_data_param, const struct anv_pipeline_bind_map *bind_map) { struct anv_shader_bin *shader = @@ -277,11 +278,12 @@ struct anv_shader_bin *bin = anv_shader_bin_create(cache->device, key_data, key_size, kernel_data, kernel_size, - prog_data, prog_data_size, bind_map); + prog_data, prog_data_size, prog_data_param, + bind_map); if (!bin) return NULL; - _mesa_hash_table_insert(cache->cache, anv_shader_bin_get_key(bin), bin); + _mesa_hash_table_insert(cache->cache, bin->key, bin); return bin; } @@ -290,7 +292,8 @@ anv_pipeline_cache_upload_kernel(struct anv_pipeline_cache *cache, const void *key_data, uint32_t key_size, const void *kernel_data, uint32_t kernel_size, - const void *prog_data, uint32_t prog_data_size, + const struct brw_stage_prog_data *prog_data, + uint32_t prog_data_size, const struct anv_pipeline_bind_map *bind_map) { if (cache->cache) { @@ -299,7 +302,8 @@ struct anv_shader_bin *bin = anv_pipeline_cache_add_shader(cache, key_data, key_size, kernel_data, kernel_size, - prog_data, prog_data_size, bind_map); + prog_data, prog_data_size, + prog_data->param, bind_map); pthread_mutex_unlock(&cache->mutex); @@ -311,7 +315,8 @@ /* In this case, we're not caching it so the caller owns it entirely */ return anv_shader_bin_create(cache->device, key_data, key_size, kernel_data, kernel_size, - prog_data, prog_data_size, bind_map); + prog_data, prog_data_size, + prog_data->param, bind_map); } } @@ -328,8 +333,8 @@ const void *data, size_t size) { struct anv_device *device = cache->device; + struct anv_physical_device *pdevice = &device->instance->physicalDevice; struct cache_header header; - uint8_t uuid[VK_UUID_SIZE]; if (cache->cache == NULL) return; @@ -345,8 +350,7 @@ return; if (header.device_id != device->chipset_id) return; - anv_device_get_cache_uuid(uuid); - if (memcmp(header.uuid, uuid, VK_UUID_SIZE) != 0) + if (memcmp(header.uuid, pdevice->uuid, VK_UUID_SIZE) != 0) return; const void *end = data + size; @@ -366,10 +370,16 @@ memcpy(&bin, p, sizeof(bin)); p += align_u32(sizeof(struct anv_shader_bin), 8); - const void *prog_data = p; + const struct brw_stage_prog_data *prog_data = p; p += align_u32(bin.prog_data_size, 8); + if (p > end) + break; + + uint32_t param_size = prog_data->nr_params * sizeof(void *); + const void *prog_data_param = p; + p += align_u32(param_size, 8); - struct shader_bin_key key; + struct anv_shader_bin_key key; if (p + sizeof(key) > end) break; memcpy(&key, p, sizeof(key)); @@ -392,7 +402,7 @@ anv_pipeline_cache_add_shader(cache, key_data, key.size, kernel_data, bin.kernel_size, prog_data, bin.prog_data_size, - &bin.bind_map); + prog_data_param, &bin.bind_map); } } @@ -417,7 +427,7 @@ assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_PIPELINE_CACHE_CREATE_INFO); assert(pCreateInfo->flags == 0); - cache = anv_alloc2(&device->alloc, pAllocator, + cache = vk_alloc2(&device->alloc, pAllocator, sizeof(*cache), 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (cache == NULL) @@ -443,9 +453,12 @@ ANV_FROM_HANDLE(anv_device, device, _device); ANV_FROM_HANDLE(anv_pipeline_cache, cache, _cache); + if (!cache) + return; + anv_pipeline_cache_finish(cache); - anv_free2(&device->alloc, pAllocator, cache); + vk_free2(&device->alloc, pAllocator, cache); } VkResult anv_GetPipelineCacheData( @@ -456,6 +469,7 @@ { ANV_FROM_HANDLE(anv_device, device, _device); ANV_FROM_HANDLE(anv_pipeline_cache, cache, _cache); + struct anv_physical_device *pdevice = &device->instance->physicalDevice; struct cache_header *header; if (pData == NULL) { @@ -483,20 +497,23 @@ header->header_version = VK_PIPELINE_CACHE_HEADER_VERSION_ONE; header->vendor_id = 0x8086; header->device_id = device->chipset_id; - anv_device_get_cache_uuid(header->uuid); + memcpy(header->uuid, pdevice->uuid, VK_UUID_SIZE); p += align_u32(header->header_size, 8); uint32_t *count = p; p += align_u32(sizeof(*count), 8); *count = 0; + VkResult result = VK_SUCCESS; if (cache->cache) { struct hash_entry *entry; hash_table_foreach(cache->cache, entry) { struct anv_shader_bin *shader = entry->data; size_t data_size = anv_shader_bin_data_size(entry->data); - if (p + data_size > end) + if (p + data_size > end) { + result = VK_INCOMPLETE; break; + } anv_shader_bin_write_data(shader, p); p += data_size; @@ -507,7 +524,7 @@ *pDataSize = p - pData; - return VK_SUCCESS; + return result; } VkResult anv_MergePipelineCaches( @@ -529,11 +546,11 @@ struct hash_entry *entry; hash_table_foreach(src->cache, entry) { struct anv_shader_bin *bin = entry->data; - if (_mesa_hash_table_search(dst->cache, anv_shader_bin_get_key(bin))) + if (_mesa_hash_table_search(dst->cache, bin->key)) continue; anv_shader_bin_ref(bin); - _mesa_hash_table_insert(dst->cache, anv_shader_bin_get_key(bin), bin); + _mesa_hash_table_insert(dst->cache, bin->key, bin); } } diff -Nru mesa-12.0.6/src/intel/vulkan/anv_private.h mesa-17.0.7/src/intel/vulkan/anv_private.h --- mesa-12.0.6/src/intel/vulkan/anv_private.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_private.h 2017-06-01 10:37:10.000000000 +0000 @@ -21,7 +21,8 @@ * IN THE SOFTWARE. */ -#pragma once +#ifndef ANV_PRIVATE_H +#define ANV_PRIVATE_H #include #include @@ -40,10 +41,13 @@ #define VG(x) #endif -#include "brw_device_info.h" +#include "common/gen_device_info.h" +#include "blorp/blorp.h" #include "brw_compiler.h" #include "util/macros.h" #include "util/list.h" +#include "util/u_vector.h" +#include "util/vk_alloc.h" /* Pre-declarations needed for WSI entrypoints */ struct wl_surface; @@ -52,7 +56,7 @@ typedef uint32_t xcb_visualid_t; typedef uint32_t xcb_window_t; -struct anv_l3_config; +struct gen_l3_config; #include #include @@ -62,10 +66,27 @@ #include "brw_context.h" #include "isl/isl.h" +#include "wsi_common.h" + #ifdef __cplusplus extern "C" { #endif +/* Allowing different clear colors requires us to perform a depth resolve at + * the end of certain render passes. This is because while slow clears store + * the clear color in the HiZ buffer, fast clears (without a resolve) don't. + * See the PRMs for examples describing when additional resolves would be + * necessary. To enable fast clears without requiring extra resolves, we set + * the clear value to a globally-defined one. We could allow different values + * if the user doesn't expect coherent data during or after a render passes + * (VK_ATTACHMENT_STORE_OP_DONT_CARE), but such users (aside from the CTS) + * don't seem to exist yet. In almost all Vulkan applications tested thus far, + * 1.0f seems to be the only value used. The only application that doesn't set + * this value does so through the usage of an seemingly uninitialized clear + * value. + */ +#define ANV_HZ_FC_VAL 1.0f + #define MAX_VBS 32 #define MAX_SETS 8 #define MAX_RTS 8 @@ -74,14 +95,9 @@ #define MAX_PUSH_CONSTANTS_SIZE 128 #define MAX_DYNAMIC_BUFFERS 16 #define MAX_IMAGES 8 -#define MAX_SAMPLES_LOG2 4 /* SKL supports 16 samples */ -#define anv_noreturn __attribute__((__noreturn__)) #define anv_printflike(a, b) __attribute__((__format__(__printf__, a, b))) -#define MIN(a, b) ((a) < (b) ? (a) : (b)) -#define MAX(a, b) ((a) > (b) ? (a) : (b)) - static inline uint32_t align_down_npot_u32(uint32_t v, uint32_t a) { @@ -123,7 +139,7 @@ if (unlikely(n == 0)) return 0; else - return MAX(n >> levels, 1); + return MAX2(n >> levels, 1); } static inline float @@ -150,26 +166,29 @@ } } +static inline union isl_color_value +vk_to_isl_color(VkClearColorValue color) +{ + return (union isl_color_value) { + .u32 = { + color.uint32[0], + color.uint32[1], + color.uint32[2], + color.uint32[3], + }, + }; +} + #define for_each_bit(b, dword) \ for (uint32_t __dword = (dword); \ (b) = __builtin_ffs(__dword) - 1, __dword; \ __dword &= ~(1 << (b))) #define typed_memcpy(dest, src, count) ({ \ - static_assert(sizeof(*src) == sizeof(*dest), ""); \ + STATIC_ASSERT(sizeof(*src) == sizeof(*dest)); \ memcpy((dest), (src), (count) * sizeof(*(src))); \ }) -#define zero(x) (memset(&(x), 0, sizeof(x))) - -/* Define no kernel as 1, since that's an illegal offset for a kernel */ -#define NO_KERNEL 1 - -struct anv_common { - VkStructureType sType; - const void* pNext; -}; - /* Whenever we generate an error, pass it through this function. Useful for * debugging, where we can break on it. Only call at error site, not when * propagating errors. Might be useful to plug in a stack trace here. @@ -194,7 +213,13 @@ * Print a FINISHME message, including its source location. */ #define anv_finishme(format, ...) \ - __anv_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__); + do { \ + static bool reported = false; \ + if (!reported) { \ + __anv_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__); \ + reported = true; \ + } \ + } while (0) /* A non-fatal assert. Useful for debugging. */ #ifdef DEBUG @@ -216,9 +241,6 @@ #define anv_validate if (0) #endif -void anv_abortf(const char *format, ...) anv_noreturn anv_printflike(1, 2); -void anv_abortfv(const char *format, va_list va) anv_noreturn; - #define stub_return(v) \ do { \ anv_finishme("stub %s", __func__); \ @@ -239,51 +261,6 @@ * wraparound. */ -struct anv_vector { - uint32_t head; - uint32_t tail; - uint32_t element_size; - uint32_t size; - void *data; -}; - -int anv_vector_init(struct anv_vector *queue, uint32_t element_size, uint32_t size); -void *anv_vector_add(struct anv_vector *queue); -void *anv_vector_remove(struct anv_vector *queue); - -static inline int -anv_vector_length(struct anv_vector *queue) -{ - return (queue->head - queue->tail) / queue->element_size; -} - -static inline void * -anv_vector_head(struct anv_vector *vector) -{ - assert(vector->tail < vector->head); - return (void *)((char *)vector->data + - ((vector->head - vector->element_size) & - (vector->size - 1))); -} - -static inline void * -anv_vector_tail(struct anv_vector *vector) -{ - return (void *)((char *)vector->data + (vector->tail & (vector->size - 1))); -} - -static inline void -anv_vector_finish(struct anv_vector *queue) -{ - free(queue->data); -} - -#define anv_vector_foreach(elem, queue) \ - static_assert(__builtin_types_compatible_p(__typeof__(queue), struct anv_vector *), ""); \ - for (uint32_t __anv_vector_offset = (queue)->tail; \ - elem = (queue)->data + (__anv_vector_offset & ((queue)->size - 1)), __anv_vector_offset < (queue)->head; \ - __anv_vector_offset += (queue)->element_size) - struct anv_bo { uint32_t gem_handle; @@ -309,6 +286,17 @@ bool is_winsys_bo; }; +static inline void +anv_bo_init(struct anv_bo *bo, uint32_t gem_handle, uint64_t size) +{ + bo->gem_handle = gem_handle; + bo->index = 0; + bo->offset = -1; + bo->size = size; + bo->map = NULL; + bo->is_winsys_bo = false; +} + /* Represents a lock-free linked list of "free" things. This is used by * both the block pool and the state pools. Unfortunately, in order to * solve the ABA problem, we can't use a single uint32_t head. @@ -362,7 +350,7 @@ * Array of mmaps and gem handles owned by the block pool, reclaimed when * the block pool is destroyed. */ - struct anv_vector mmap_cleanups; + struct u_vector mmap_cleanups; uint32_t block_size; @@ -400,7 +388,7 @@ }; #define ANV_MIN_STATE_SIZE_LOG2 6 -#define ANV_MAX_STATE_SIZE_LOG2 17 +#define ANV_MAX_STATE_SIZE_LOG2 20 #define ANV_STATE_BUCKETS (ANV_MAX_STATE_SIZE_LOG2 - ANV_MIN_STATE_SIZE_LOG2 + 1) @@ -441,14 +429,27 @@ } } +static inline void +anv_invalidate_range(void *start, size_t size) +{ + void *p = (void *) (((uintptr_t) start) & ~CACHELINE_MASK); + void *end = start + size; + + while (p < end) { + __builtin_ia32_clflush(p); + p += CACHELINE_SIZE; + } + __builtin_ia32_mfence(); +} + static void inline anv_state_clflush(struct anv_state state) { anv_clflush_range(state.map, state.alloc_size); } -void anv_block_pool_init(struct anv_block_pool *pool, - struct anv_device *device, uint32_t block_size); +VkResult anv_block_pool_init(struct anv_block_pool *pool, + struct anv_device *device, uint32_t block_size); void anv_block_pool_finish(struct anv_block_pool *pool); int32_t anv_block_pool_alloc(struct anv_block_pool *pool); int32_t anv_block_pool_alloc_back(struct anv_block_pool *pool); @@ -481,9 +482,14 @@ uint32_t size); void anv_bo_pool_free(struct anv_bo_pool *pool, const struct anv_bo *bo); +struct anv_scratch_bo { + bool exists; + struct anv_bo bo; +}; + struct anv_scratch_pool { /* Indexed by Per-Thread Scratch Space number (the hardware value) and stage */ - struct anv_bo bos[16][MESA_SHADER_STAGES]; + struct anv_scratch_bo bos[16][MESA_SHADER_STAGES]; }; void anv_scratch_pool_init(struct anv_device *device, @@ -495,67 +501,8 @@ gl_shader_stage stage, unsigned per_thread_scratch); -void *anv_resolve_entrypoint(uint32_t index); - extern struct anv_dispatch_table dtable; -#define ANV_CALL(func) ({ \ - if (dtable.func == NULL) { \ - size_t idx = offsetof(struct anv_dispatch_table, func) / sizeof(void *); \ - dtable.entrypoints[idx] = anv_resolve_entrypoint(idx); \ - } \ - dtable.func; \ -}) - -static inline void * -anv_alloc(const VkAllocationCallbacks *alloc, - size_t size, size_t align, - VkSystemAllocationScope scope) -{ - return alloc->pfnAllocation(alloc->pUserData, size, align, scope); -} - -static inline void * -anv_realloc(const VkAllocationCallbacks *alloc, - void *ptr, size_t size, size_t align, - VkSystemAllocationScope scope) -{ - return alloc->pfnReallocation(alloc->pUserData, ptr, size, align, scope); -} - -static inline void -anv_free(const VkAllocationCallbacks *alloc, void *data) -{ - alloc->pfnFree(alloc->pUserData, data); -} - -static inline void * -anv_alloc2(const VkAllocationCallbacks *parent_alloc, - const VkAllocationCallbacks *alloc, - size_t size, size_t align, - VkSystemAllocationScope scope) -{ - if (alloc) - return anv_alloc(alloc, size, align, scope); - else - return anv_alloc(parent_alloc, size, align, scope); -} - -static inline void -anv_free2(const VkAllocationCallbacks *parent_alloc, - const VkAllocationCallbacks *alloc, - void *data) -{ - if (alloc) - anv_free(alloc, data); - else - anv_free(parent_alloc, data); -} - -struct anv_wsi_interaface; - -#define VK_ICD_WSI_PLATFORM_MAX 5 - struct anv_physical_device { VK_LOADER_DATA _loader_data; @@ -563,13 +510,18 @@ uint32_t chipset_id; char path[20]; const char * name; - const struct brw_device_info * info; + struct gen_device_info info; uint64_t aperture_size; struct brw_compiler * compiler; struct isl_device isl_dev; int cmd_parser_version; - struct anv_wsi_interface * wsi[VK_ICD_WSI_PLATFORM_MAX]; + uint32_t eu_total; + uint32_t subslice_total; + + uint8_t uuid[VK_UUID_SIZE]; + + struct wsi_device wsi_device; }; struct anv_instance { @@ -585,69 +537,6 @@ VkResult anv_init_wsi(struct anv_physical_device *physical_device); void anv_finish_wsi(struct anv_physical_device *physical_device); -struct anv_meta_state { - VkAllocationCallbacks alloc; - - /** - * Use array element `i` for images with `2^i` samples. - */ - struct { - /** - * Pipeline N is used to clear color attachment N of the current - * subpass. - * - * HACK: We use one pipeline per color attachment to work around the - * compiler's inability to dynamically set the render target index of - * the render target write message. - */ - struct anv_pipeline *color_pipelines[MAX_RTS]; - - struct anv_pipeline *depth_only_pipeline; - struct anv_pipeline *stencil_only_pipeline; - struct anv_pipeline *depthstencil_pipeline; - } clear[1 + MAX_SAMPLES_LOG2]; - - struct { - VkRenderPass render_pass; - - /** Pipeline that blits from a 1D image. */ - VkPipeline pipeline_1d_src; - - /** Pipeline that blits from a 2D image. */ - VkPipeline pipeline_2d_src; - - /** Pipeline that blits from a 3D image. */ - VkPipeline pipeline_3d_src; - - VkPipelineLayout pipeline_layout; - VkDescriptorSetLayout ds_layout; - } blit; - - struct { - VkRenderPass render_pass; - - VkPipelineLayout img_p_layout; - VkDescriptorSetLayout img_ds_layout; - VkPipelineLayout buf_p_layout; - VkDescriptorSetLayout buf_ds_layout; - - /* Pipelines indexed by source and destination type. See the - * blit2d_src_type and blit2d_dst_type enums in anv_meta_blit2d.c to - * see what these mean. - */ - VkPipeline pipelines[2][3]; - } blit2d; - - struct { - /** Pipeline [i] resolves an image with 2^(i+1) samples. */ - VkPipeline pipelines[MAX_SAMPLES_LOG2]; - - VkRenderPass pass; - VkPipelineLayout pipeline_layout; - VkDescriptorSetLayout ds_layout; - } resolve; -}; - struct anv_queue { VK_LOADER_DATA _loader_data; @@ -677,7 +566,8 @@ anv_pipeline_cache_upload_kernel(struct anv_pipeline_cache *cache, const void *key_data, uint32_t key_size, const void *kernel_data, uint32_t kernel_size, - const void *prog_data, uint32_t prog_data_size, + const struct brw_stage_prog_data *prog_data, + uint32_t prog_data_size, const struct anv_pipeline_bind_map *bind_map); struct anv_device { @@ -687,7 +577,7 @@ struct anv_instance * instance; uint32_t chipset_id; - struct brw_device_info info; + struct gen_device_info info; struct isl_device isl_dev; int context_id; int fd; @@ -707,7 +597,8 @@ struct anv_bo workaround_bo; - struct anv_meta_state meta_state; + struct anv_pipeline_cache blorp_shader_cache; + struct blorp_context blorp; struct anv_state border_colors; @@ -718,10 +609,15 @@ uint32_t default_mocs; pthread_mutex_t mutex; + pthread_cond_t queue_submit; }; -void anv_device_get_cache_uuid(void *uuid); +void anv_device_init_blorp(struct anv_device *device); +void anv_device_finish_blorp(struct anv_device *device); +VkResult anv_device_execbuf(struct anv_device *device, + struct drm_i915_gem_execbuffer2 *execbuf, + struct anv_bo **execbuf_bos); void* anv_gem_mmap(struct anv_device *device, uint32_t gem_handle, uint64_t offset, uint64_t size, uint32_t flags); @@ -773,9 +669,6 @@ /* Bytes actually consumed in this batch BO */ size_t length; - /* Last seen surface state block pool bo offset */ - uint32_t last_ss_pool_bo_offset; - struct anv_reloc_list relocs; }; @@ -807,12 +700,9 @@ uint32_t offset; }; -#define __gen_address_type struct anv_address -#define __gen_user_data struct anv_batch - static inline uint64_t -__gen_combine_address(struct anv_batch *batch, void *location, - const struct anv_address address, uint32_t delta) +_anv_combine_address(struct anv_batch *batch, void *location, + const struct anv_address address, uint32_t delta) { if (address.bo == NULL) { return address.offset + delta; @@ -823,6 +713,10 @@ } } +#define __gen_address_type struct anv_address +#define __gen_user_data struct anv_batch +#define __gen_combine_address _anv_combine_address + /* Wrapper macros needed to work around preprocessor argument issues. In * particular, arguments don't get pre-evaluated if they are concatenated. * This means that, if you pass GENX(3DSTATE_PS) into the emit macro, the @@ -858,7 +752,7 @@ do { \ uint32_t *dw; \ \ - static_assert(ARRAY_SIZE(dwords0) == ARRAY_SIZE(dwords1), "mismatch merge"); \ + STATIC_ASSERT(ARRAY_SIZE(dwords0) == ARRAY_SIZE(dwords1)); \ dw = anv_batch_emit_dwords((batch), ARRAY_SIZE(dwords0)); \ for (uint32_t i = 0; i < ARRAY_SIZE(dwords0); i++) \ dw[i] = (dwords0)[i] | (dwords1)[i]; \ @@ -1046,6 +940,9 @@ /* Index in the binding */ uint8_t index; + + /* Input attachment index (relative to the subpass) */ + uint8_t input_attachment_index; }; struct anv_pipeline_layout { @@ -1216,15 +1113,23 @@ * The clear value is valid only if there exists a pending clear. */ struct anv_attachment_state { + enum isl_aux_usage aux_usage; + enum isl_aux_usage input_aux_usage; + struct anv_state color_rt_state; + struct anv_state input_att_state; + + VkImageLayout current_layout; VkImageAspectFlags pending_clear_aspects; + bool fast_clear; VkClearValue clear_value; + bool clear_color_is_zero_one; }; /** State required while building cmd buffer */ struct anv_cmd_state { /* PIPELINE_SELECT.PipelineSelection */ uint32_t current_pipeline; - const struct anv_l3_config * current_l3_config; + const struct gen_l3_config * current_l3_config; uint32_t vb_dirty; anv_cmd_dirty_mask_t dirty; anv_cmd_dirty_mask_t compute_dirty; @@ -1256,6 +1161,19 @@ */ struct anv_attachment_state * attachments; + /** + * Surface states for color render targets. These are stored in a single + * flat array. For depth-stencil attachments, the surface state is simply + * left blank. + */ + struct anv_state render_pass_states; + + /** + * A null surface state of the right size to match the framebuffer. This + * is one of the states in render_pass_states. + */ + struct anv_state null_surface_state; + struct { struct anv_buffer * index_buffer; uint32_t index_type; /**< 3DSTATE_INDEX_BUFFER.IndexFormat */ @@ -1300,32 +1218,18 @@ * * initialized by anv_cmd_buffer_init_batch_bo_chain() */ - struct anv_vector seen_bbos; + struct u_vector seen_bbos; /* A vector of int32_t's for every block of binding tables. * * initialized by anv_cmd_buffer_init_batch_bo_chain() */ - struct anv_vector bt_blocks; + struct u_vector bt_blocks; uint32_t bt_next; - struct anv_reloc_list surface_relocs; - - /* Information needed for execbuf - * - * These fields are generated by anv_cmd_buffer_prepare_execbuf(). - */ - struct { - struct drm_i915_gem_execbuffer2 execbuf; - - struct drm_i915_gem_exec_object2 * objects; - uint32_t bo_count; - struct anv_bo ** bos; - - /* Allocated length of the 'objects' and 'bos' arrays */ - uint32_t array_length; - bool need_reloc; - } execbuf2; + struct anv_reloc_list surface_relocs; + /** Last seen surface state block pool center bo offset */ + uint32_t last_ss_pool_center; /* Serial for tracking buffer completion */ uint32_t serial; @@ -1347,12 +1251,18 @@ void anv_cmd_buffer_add_secondary(struct anv_cmd_buffer *primary, struct anv_cmd_buffer *secondary); void anv_cmd_buffer_prepare_execbuf(struct anv_cmd_buffer *cmd_buffer); +VkResult anv_cmd_buffer_execbuf(struct anv_device *device, + struct anv_cmd_buffer *cmd_buffer); + +VkResult anv_cmd_buffer_reset(struct anv_cmd_buffer *cmd_buffer); -VkResult anv_cmd_buffer_emit_binding_table(struct anv_cmd_buffer *cmd_buffer, - unsigned stage, struct anv_state *bt_state); -VkResult anv_cmd_buffer_emit_samplers(struct anv_cmd_buffer *cmd_buffer, - unsigned stage, struct anv_state *state); -uint32_t anv_cmd_buffer_flush_descriptor_sets(struct anv_cmd_buffer *cmd_buffer); +VkResult +anv_cmd_buffer_ensure_push_constants_size(struct anv_cmd_buffer *cmd_buffer, + gl_shader_stage stage, uint32_t size); +#define anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, stage, field) \ + anv_cmd_buffer_ensure_push_constants_size(cmd_buffer, stage, \ + (offsetof(struct anv_push_constants, field) + \ + sizeof(cmd_buffer->state.push_constants[0]->field))) struct anv_state anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer, const void *data, uint32_t size, uint32_t alignment); @@ -1379,13 +1289,12 @@ bool depth_clamp_enable); void gen7_cmd_buffer_emit_scissor(struct anv_cmd_buffer *cmd_buffer); -void anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer); - -void anv_cmd_state_setup_attachments(struct anv_cmd_buffer *cmd_buffer, - const VkRenderPassBeginInfo *info); +void anv_cmd_buffer_setup_attachments(struct anv_cmd_buffer *cmd_buffer, + struct anv_render_pass *pass, + struct anv_framebuffer *framebuffer, + const VkClearValue *clear_values); -void anv_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer, - struct anv_subpass *subpass); +void anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer); struct anv_state anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer, @@ -1399,13 +1308,30 @@ const struct anv_image_view * anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer); +struct anv_state +anv_cmd_buffer_alloc_blorp_binding_table(struct anv_cmd_buffer *cmd_buffer, + uint32_t num_entries, + uint32_t *state_offset); + void anv_cmd_buffer_dump(struct anv_cmd_buffer *cmd_buffer); +enum anv_fence_state { + /** Indicates that this is a new (or newly reset fence) */ + ANV_FENCE_STATE_RESET, + + /** Indicates that this fence has been submitted to the GPU but is still + * (as far as we know) in use by the GPU. + */ + ANV_FENCE_STATE_SUBMITTED, + + ANV_FENCE_STATE_SIGNALED, +}; + struct anv_fence { struct anv_bo bo; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 exec2_objects[1]; - bool ready; + enum anv_fence_state state; }; struct anv_event { @@ -1413,11 +1339,7 @@ struct anv_state state; }; -struct nir_shader; - struct anv_shader_module { - struct nir_shader * nir; - unsigned char sha1[20]; uint32_t size; char data[0]; @@ -1459,24 +1381,33 @@ struct anv_pipeline_binding * sampler_to_descriptor; }; +struct anv_shader_bin_key { + uint32_t size; + uint8_t data[0]; +}; + struct anv_shader_bin { uint32_t ref_cnt; + const struct anv_shader_bin_key *key; + struct anv_state kernel; uint32_t kernel_size; - struct anv_pipeline_bind_map bind_map; - + const struct brw_stage_prog_data *prog_data; uint32_t prog_data_size; - /* Prog data follows, then the key, both aligned to 8-bytes */ + struct anv_pipeline_bind_map bind_map; + + /* Prog data follows, then params, then the key, all aligned to 8-bytes */ }; struct anv_shader_bin * anv_shader_bin_create(struct anv_device *device, const void *key, uint32_t key_size, const void *kernel, uint32_t kernel_size, - const void *prog_data, uint32_t prog_data_size, + const struct brw_stage_prog_data *prog_data, + uint32_t prog_data_size, const void *prog_data_param, const struct anv_pipeline_bind_map *bind_map); void @@ -1497,14 +1428,6 @@ anv_shader_bin_destroy(device, shader); } -static inline const struct brw_stage_prog_data * -anv_shader_bin_get_prog_data(const struct anv_shader_bin *shader) -{ - const void *data = shader; - data += align_u32(sizeof(struct anv_shader_bin), 8); - return data; -} - struct anv_pipeline { struct anv_device * device; struct anv_batch batch; @@ -1515,26 +1438,17 @@ struct anv_pipeline_layout * layout; - bool use_repclear; bool needs_data_cache; struct anv_shader_bin * shaders[MESA_SHADER_STAGES]; struct { - uint32_t start[MESA_SHADER_GEOMETRY + 1]; - uint32_t size[MESA_SHADER_GEOMETRY + 1]; - uint32_t entries[MESA_SHADER_GEOMETRY + 1]; - const struct anv_l3_config * l3_config; + const struct gen_l3_config * l3_config; uint32_t total_size; } urb; VkShaderStageFlags active_stages; struct anv_state blend_state; - uint32_t vs_simd8; - uint32_t vs_vec4; - uint32_t ps_ksp0; - uint32_t gs_kernel; - uint32_t cs_simd; uint32_t vb_used; uint32_t binding_stride[MAX_VBS]; @@ -1560,6 +1474,8 @@ struct { uint32_t wm_depth_stencil[4]; } gen9; + + uint32_t interface_descriptor_data[8]; }; static inline bool @@ -1571,38 +1487,38 @@ #define ANV_DECL_GET_PROG_DATA_FUNC(prefix, stage) \ static inline const struct brw_##prefix##_prog_data * \ -get_##prefix##_prog_data(struct anv_pipeline *pipeline) \ +get_##prefix##_prog_data(const struct anv_pipeline *pipeline) \ { \ if (anv_pipeline_has_stage(pipeline, stage)) { \ return (const struct brw_##prefix##_prog_data *) \ - anv_shader_bin_get_prog_data(pipeline->shaders[stage]); \ + pipeline->shaders[stage]->prog_data; \ } else { \ return NULL; \ } \ } ANV_DECL_GET_PROG_DATA_FUNC(vs, MESA_SHADER_VERTEX) +ANV_DECL_GET_PROG_DATA_FUNC(tcs, MESA_SHADER_TESS_CTRL) +ANV_DECL_GET_PROG_DATA_FUNC(tes, MESA_SHADER_TESS_EVAL) ANV_DECL_GET_PROG_DATA_FUNC(gs, MESA_SHADER_GEOMETRY) ANV_DECL_GET_PROG_DATA_FUNC(wm, MESA_SHADER_FRAGMENT) ANV_DECL_GET_PROG_DATA_FUNC(cs, MESA_SHADER_COMPUTE) -struct anv_graphics_pipeline_create_info { - /** - * If non-negative, overrides the color attachment count of the pipeline's - * subpass. - */ - int8_t color_attachment_count; - - bool use_repclear; - bool disable_vs; - bool use_rectlist; -}; +static inline const struct brw_vue_prog_data * +anv_pipeline_get_last_vue_prog_data(const struct anv_pipeline *pipeline) +{ + if (anv_pipeline_has_stage(pipeline, MESA_SHADER_GEOMETRY)) + return &get_gs_prog_data(pipeline)->base; + else if (anv_pipeline_has_stage(pipeline, MESA_SHADER_TESS_EVAL)) + return &get_tes_prog_data(pipeline)->base; + else + return &get_vs_prog_data(pipeline)->base; +} VkResult anv_pipeline_init(struct anv_pipeline *pipeline, struct anv_device *device, struct anv_pipeline_cache *cache, const VkGraphicsPipelineCreateInfo *pCreateInfo, - const struct anv_graphics_pipeline_create_info *extra, const VkAllocationCallbacks *alloc); VkResult @@ -1613,47 +1529,30 @@ const char *entrypoint, const VkSpecializationInfo *spec_info); -VkResult -anv_graphics_pipeline_create(VkDevice device, - VkPipelineCache cache, - const VkGraphicsPipelineCreateInfo *pCreateInfo, - const struct anv_graphics_pipeline_create_info *extra, - const VkAllocationCallbacks *alloc, - VkPipeline *pPipeline); - -struct anv_format_swizzle { - enum isl_channel_select r:4; - enum isl_channel_select g:4; - enum isl_channel_select b:4; - enum isl_channel_select a:4; -}; - struct anv_format { enum isl_format isl_format:16; - struct anv_format_swizzle swizzle; + struct isl_swizzle swizzle; }; struct anv_format -anv_get_format(const struct brw_device_info *devinfo, VkFormat format, +anv_get_format(const struct gen_device_info *devinfo, VkFormat format, VkImageAspectFlags aspect, VkImageTiling tiling); static inline enum isl_format -anv_get_isl_format(const struct brw_device_info *devinfo, VkFormat vk_format, +anv_get_isl_format(const struct gen_device_info *devinfo, VkFormat vk_format, VkImageAspectFlags aspect, VkImageTiling tiling) { return anv_get_format(devinfo, vk_format, aspect, tiling).isl_format; } void -anv_compute_urb_partition(struct anv_pipeline *pipeline); - -void -anv_setup_pipeline_l3_config(struct anv_pipeline *pipeline); +anv_pipeline_setup_l3_config(struct anv_pipeline *pipeline, bool needs_slm); /** * Subsurface of an anv_image. */ struct anv_surface { + /** Valid only if isl_surf::size > 0. */ struct isl_surf isl; /** @@ -1703,16 +1602,38 @@ struct anv_surface stencil_surface; }; }; + + /** + * For color images, this is the aux usage for this image when not used as a + * color attachment. + * + * For depth/stencil images, this is set to ISL_AUX_USAGE_HIZ if the image + * has a HiZ buffer. + */ + enum isl_aux_usage aux_usage; + + struct anv_surface aux_surface; }; -static inline uint32_t -anv_get_layerCount(const struct anv_image *image, - const VkImageSubresourceRange *range) +/* Returns true if a HiZ-enabled depth buffer can be sampled from. */ +static inline bool +anv_can_sample_with_hiz(uint8_t gen, uint32_t samples) { - return range->layerCount == VK_REMAINING_ARRAY_LAYERS ? - image->array_size - range->baseArrayLayer : range->layerCount; + return gen >= 8 && samples == 1; } +void +anv_gen8_hiz_op_resolve(struct anv_cmd_buffer *cmd_buffer, + const struct anv_image *image, + enum blorp_hiz_op op); + +/* This is defined as a macro so that it works for both + * VkImageSubresourceRange and VkImageSubresourceLayers + */ +#define anv_get_layerCount(_image, _range) \ + ((_range)->layerCount == VK_REMAINING_ARRAY_LAYERS ? \ + (_image)->array_size - (_range)->baseArrayLayer : (_range)->layerCount) + static inline uint32_t anv_get_levelCount(const struct anv_image *image, const VkImageSubresourceRange *range) @@ -1727,15 +1648,12 @@ struct anv_bo *bo; uint32_t offset; /**< Offset into bo. */ + struct isl_view isl; + VkImageAspectFlags aspect_mask; VkFormat vk_format; - uint32_t base_layer; - uint32_t base_mip; VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */ - /** RENDER_SURFACE_STATE when using image as a color render target. */ - struct anv_state color_rt_surface_state; - /** RENDER_SURFACE_STATE when using image as a sampler surface. */ struct anv_state sampler_surface_state; @@ -1747,7 +1665,10 @@ struct anv_image_create_info { const VkImageCreateInfo *vk_info; + + /** An opt-in bitmask which filters an ISL-mapping of the Vulkan tiling. */ isl_tiling_flags_t isl_tiling_flags; + uint32_t stride; }; @@ -1756,16 +1677,10 @@ const VkAllocationCallbacks* alloc, VkImage *pImage); -struct anv_surface * -anv_image_get_surface_for_aspect_mask(struct anv_image *image, +const struct anv_surface * +anv_image_get_surface_for_aspect_mask(const struct anv_image *image, VkImageAspectFlags aspect_mask); -void anv_image_view_init(struct anv_image_view *view, - struct anv_device *device, - const VkImageViewCreateInfo* pCreateInfo, - struct anv_cmd_buffer *cmd_buffer, - VkImageUsageFlags usage_mask); - struct anv_buffer_view { enum isl_format format; /**< VkBufferViewCreateInfo::format */ struct anv_bo *bo; @@ -1778,11 +1693,6 @@ struct brw_image_param storage_image_param; }; -void anv_buffer_view_init(struct anv_buffer_view *view, - struct anv_device *device, - const VkBufferViewCreateInfo* pCreateInfo, - struct anv_cmd_buffer *cmd_buffer); - enum isl_format anv_isl_format_for_descriptor_type(VkDescriptorType type); @@ -1851,29 +1761,56 @@ uint32_t color_count; uint32_t * color_attachments; uint32_t * resolve_attachments; + + /* TODO: Consider storing the depth/stencil VkAttachmentReference + * instead of its two structure members (below) individually. + */ uint32_t depth_stencil_attachment; + VkImageLayout depth_stencil_layout; + + /** Subpass has a depth/stencil self-dependency */ + bool has_ds_self_dep; /** Subpass has at least one resolve attachment */ bool has_resolve; }; +enum anv_subpass_usage { + ANV_SUBPASS_USAGE_DRAW = (1 << 0), + ANV_SUBPASS_USAGE_INPUT = (1 << 1), + ANV_SUBPASS_USAGE_RESOLVE_SRC = (1 << 2), + ANV_SUBPASS_USAGE_RESOLVE_DST = (1 << 3), +}; + struct anv_render_pass_attachment { + /* TODO: Consider using VkAttachmentDescription instead of storing each of + * its members individually. + */ VkFormat format; uint32_t samples; + VkImageUsageFlags usage; VkAttachmentLoadOp load_op; + VkAttachmentStoreOp store_op; VkAttachmentLoadOp stencil_load_op; + VkImageLayout initial_layout; + VkImageLayout final_layout; + + /* An array, indexed by subpass id, of how the attachment will be used. */ + enum anv_subpass_usage * subpass_usage; + + /* The subpass id in which the attachment will be used last. */ + uint32_t last_subpass_idx; }; struct anv_render_pass { uint32_t attachment_count; uint32_t subpass_count; uint32_t * subpass_attachments; + enum anv_subpass_usage * subpass_usages; struct anv_render_pass_attachment * attachments; struct anv_subpass subpasses[0]; }; -extern struct anv_render_pass anv_meta_dummy_renderpass; - struct anv_query_pool_slot { uint64_t begin; uint64_t end; @@ -1886,14 +1823,23 @@ struct anv_bo bo; }; -VkResult anv_device_init_meta(struct anv_device *device); -void anv_device_finish_meta(struct anv_device *device); - -void *anv_lookup_entrypoint(const char *name); +void *anv_lookup_entrypoint(const struct gen_device_info *devinfo, + const char *name); void anv_dump_image_to_ppm(struct anv_device *device, struct anv_image *image, unsigned miplevel, - unsigned array_layer, const char *filename); + unsigned array_layer, VkImageAspectFlagBits aspect, + const char *filename); + +enum anv_dump_action { + ANV_DUMP_FRAMEBUFFERS_BIT = 0x1, +}; + +void anv_dump_start(struct anv_device *device, enum anv_dump_action actions); +void anv_dump_finish(void); + +void anv_dump_add_framebuffer(struct anv_cmd_buffer *cmd_buffer, + struct anv_framebuffer *fb); #define ANV_DEFINE_HANDLE_CASTS(__anv_type, __VkType) \ \ @@ -1952,21 +1898,6 @@ ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_sampler, VkSampler) ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_shader_module, VkShaderModule) -#define ANV_DEFINE_STRUCT_CASTS(__anv_type, __VkType) \ - \ - static inline const __VkType * \ - __anv_type ## _to_ ## __VkType(const struct __anv_type *__anv_obj) \ - { \ - return (const __VkType *) __anv_obj; \ - } - -#define ANV_COMMON_TO_STRUCT(__VkType, __vk_name, __common_name) \ - const __VkType *__vk_name = anv_common_to_ ## __VkType(__common_name) - -ANV_DEFINE_STRUCT_CASTS(anv_common, VkMemoryBarrier) -ANV_DEFINE_STRUCT_CASTS(anv_common, VkBufferMemoryBarrier) -ANV_DEFINE_STRUCT_CASTS(anv_common, VkImageMemoryBarrier) - /* Gen-specific function declarations */ #ifdef genX # include "anv_genX.h" @@ -1988,3 +1919,5 @@ #ifdef __cplusplus } #endif + +#endif /* ANV_PRIVATE_H */ diff -Nru mesa-12.0.6/src/intel/vulkan/anv_query.c mesa-17.0.7/src/intel/vulkan/anv_query.c --- mesa-12.0.6/src/intel/vulkan/anv_query.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_query.c 2017-06-01 10:37:10.000000000 +0000 @@ -54,7 +54,7 @@ } slot_size = sizeof(struct anv_query_pool_slot); - pool = anv_alloc2(&device->alloc, pAllocator, sizeof(*pool), 8, + pool = vk_alloc2(&device->alloc, pAllocator, sizeof(*pool), 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (pool == NULL) return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); @@ -74,7 +74,7 @@ return VK_SUCCESS; fail: - anv_free2(&device->alloc, pAllocator, pool); + vk_free2(&device->alloc, pAllocator, pool); return result; } @@ -87,9 +87,12 @@ ANV_FROM_HANDLE(anv_device, device, _device); ANV_FROM_HANDLE(anv_query_pool, pool, _pool); + if (!pool) + return; + anv_gem_munmap(pool->bo.map, pool->bo.size); anv_gem_close(device, pool->bo.gem_handle); - anv_free2(&device->alloc, pAllocator, pool); + vk_free2(&device->alloc, pAllocator, pool); } VkResult anv_GetQueryPoolResults( @@ -126,32 +129,59 @@ void *data_end = pData + dataSize; struct anv_query_pool_slot *slot = pool->bo.map; + if (!device->info.has_llc) { + uint64_t offset = firstQuery * sizeof(*slot); + uint64_t size = queryCount * sizeof(*slot); + anv_invalidate_range(pool->bo.map + offset, + MIN2(size, pool->bo.size - offset)); + } + + VkResult status = VK_SUCCESS; for (uint32_t i = 0; i < queryCount; i++) { - switch (pool->type) { - case VK_QUERY_TYPE_OCCLUSION: { - result = slot[firstQuery + i].end - slot[firstQuery + i].begin; - break; - } - case VK_QUERY_TYPE_PIPELINE_STATISTICS: - unreachable("pipeline stats not supported"); - case VK_QUERY_TYPE_TIMESTAMP: { - result = slot[firstQuery + i].begin; - break; - } - default: - unreachable("invalid pool type"); + bool available = slot[firstQuery + i].available; + + /* From the Vulkan 1.0.42 spec: + * + * "If VK_QUERY_RESULT_WAIT_BIT and VK_QUERY_RESULT_PARTIAL_BIT are + * both not set then no result values are written to pData for + * queries that are in the unavailable state at the time of the call, + * and vkGetQueryPoolResults returns VK_NOT_READY. However, + * availability state is still written to pData for those queries if + * VK_QUERY_RESULT_WITH_AVAILABILITY_BIT is set." + */ + bool write_results = available || (flags & VK_QUERY_RESULT_PARTIAL_BIT); + + if (write_results) { + switch (pool->type) { + case VK_QUERY_TYPE_OCCLUSION: { + result = slot[firstQuery + i].end - slot[firstQuery + i].begin; + break; + } + case VK_QUERY_TYPE_PIPELINE_STATISTICS: + unreachable("pipeline stats not supported"); + case VK_QUERY_TYPE_TIMESTAMP: { + result = slot[firstQuery + i].begin; + break; + } + default: + unreachable("invalid pool type"); + } + } else { + status = VK_NOT_READY; } if (flags & VK_QUERY_RESULT_64_BIT) { uint64_t *dst = pData; - dst[0] = result; + if (write_results) + dst[0] = result; if (flags & VK_QUERY_RESULT_WITH_AVAILABILITY_BIT) dst[1] = slot[firstQuery + i].available; } else { uint32_t *dst = pData; if (result > UINT32_MAX) result = UINT32_MAX; - dst[0] = result; + if (write_results) + dst[0] = result; if (flags & VK_QUERY_RESULT_WITH_AVAILABILITY_BIT) dst[1] = slot[firstQuery + i].available; } @@ -161,27 +191,5 @@ break; } - return VK_SUCCESS; -} - -void anv_CmdResetQueryPool( - VkCommandBuffer commandBuffer, - VkQueryPool queryPool, - uint32_t firstQuery, - uint32_t queryCount) -{ - ANV_FROM_HANDLE(anv_query_pool, pool, queryPool); - - for (uint32_t i = 0; i < queryCount; i++) { - switch (pool->type) { - case VK_QUERY_TYPE_OCCLUSION: - case VK_QUERY_TYPE_TIMESTAMP: { - struct anv_query_pool_slot *slot = pool->bo.map; - slot[firstQuery + i].available = 0; - break; - } - default: - assert(!"Invalid query type"); - } - } + return status; } diff -Nru mesa-12.0.6/src/intel/vulkan/anv_timestamp.h mesa-17.0.7/src/intel/vulkan/anv_timestamp.h --- mesa-12.0.6/src/intel/vulkan/anv_timestamp.h 2017-01-24 01:43:26.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_timestamp.h 1970-01-01 00:00:00.000000000 +0000 @@ -1 +0,0 @@ -#define ANV_TIMESTAMP "1485222206" diff -Nru mesa-12.0.6/src/intel/vulkan/anv_util.c mesa-17.0.7/src/intel/vulkan/anv_util.c --- mesa-12.0.6/src/intel/vulkan/anv_util.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_util.c 2017-06-01 10:37:10.000000000 +0000 @@ -63,25 +63,6 @@ fprintf(stderr, "%s:%d: FINISHME: %s\n", file, line, buffer); } -void anv_noreturn anv_printflike(1, 2) -anv_abortf(const char *format, ...) -{ - va_list va; - - va_start(va, format); - anv_abortfv(format, va); - va_end(va); -} - -void anv_noreturn -anv_abortfv(const char *format, va_list va) -{ - fprintf(stderr, "vk: error: "); - vfprintf(stderr, format, va); - fprintf(stderr, "\n"); - abort(); -} - VkResult __vk_errorf(VkResult error, const char *file, int line, const char *format, ...) { @@ -125,78 +106,3 @@ return error; } - -int -anv_vector_init(struct anv_vector *vector, uint32_t element_size, uint32_t size) -{ - assert(util_is_power_of_two(size)); - assert(element_size < size && util_is_power_of_two(element_size)); - - vector->head = 0; - vector->tail = 0; - vector->element_size = element_size; - vector->size = size; - vector->data = malloc(size); - - return vector->data != NULL; -} - -void * -anv_vector_add(struct anv_vector *vector) -{ - uint32_t offset, size, split, src_tail, dst_tail; - void *data; - - if (vector->head - vector->tail == vector->size) { - size = vector->size * 2; - data = malloc(size); - if (data == NULL) - return NULL; - src_tail = vector->tail & (vector->size - 1); - dst_tail = vector->tail & (size - 1); - if (src_tail == 0) { - /* Since we know that the vector is full, this means that it's - * linear from start to end so we can do one copy. - */ - memcpy(data + dst_tail, vector->data, vector->size); - } else { - /* In this case, the vector is split into two pieces and we have - * to do two copies. We have to be careful to make sure each - * piece goes to the right locations. Thanks to the change in - * size, it may or may not still wrap around. - */ - split = align_u32(vector->tail, vector->size); - assert(vector->tail <= split && split < vector->head); - memcpy(data + dst_tail, vector->data + src_tail, - split - vector->tail); - memcpy(data + (split & (size - 1)), vector->data, - vector->head - split); - } - free(vector->data); - vector->data = data; - vector->size = size; - } - - assert(vector->head - vector->tail < vector->size); - - offset = vector->head & (vector->size - 1); - vector->head += vector->element_size; - - return vector->data + offset; -} - -void * -anv_vector_remove(struct anv_vector *vector) -{ - uint32_t offset; - - if (vector->head == vector->tail) - return NULL; - - assert(vector->head - vector->tail <= vector->size); - - offset = vector->tail & (vector->size - 1); - vector->tail += vector->element_size; - - return vector->data + offset; -} diff -Nru mesa-12.0.6/src/intel/vulkan/anv_wsi.c mesa-17.0.7/src/intel/vulkan/anv_wsi.c --- mesa-12.0.6/src/intel/vulkan/anv_wsi.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_wsi.c 2017-06-01 10:37:10.000000000 +0000 @@ -21,26 +21,34 @@ * IN THE SOFTWARE. */ -#include "anv_wsi.h" +#include "anv_private.h" +#include "wsi_common.h" +#include "vk_format_info.h" + +static const struct wsi_callbacks wsi_cbs = { + .get_phys_device_format_properties = anv_GetPhysicalDeviceFormatProperties, +}; VkResult anv_init_wsi(struct anv_physical_device *physical_device) { VkResult result; - memset(physical_device->wsi, 0, sizeof(physical_device->wsi)); + memset(physical_device->wsi_device.wsi, 0, sizeof(physical_device->wsi_device.wsi)); #ifdef VK_USE_PLATFORM_XCB_KHR - result = anv_x11_init_wsi(physical_device); + result = wsi_x11_init_wsi(&physical_device->wsi_device, &physical_device->instance->alloc); if (result != VK_SUCCESS) return result; #endif #ifdef VK_USE_PLATFORM_WAYLAND_KHR - result = anv_wl_init_wsi(physical_device); + result = wsi_wl_init_wsi(&physical_device->wsi_device, &physical_device->instance->alloc, + anv_physical_device_to_handle(physical_device), + &wsi_cbs); if (result != VK_SUCCESS) { #ifdef VK_USE_PLATFORM_XCB_KHR - anv_x11_finish_wsi(physical_device); + wsi_x11_finish_wsi(&physical_device->wsi_device, &physical_device->instance->alloc); #endif return result; } @@ -53,10 +61,10 @@ anv_finish_wsi(struct anv_physical_device *physical_device) { #ifdef VK_USE_PLATFORM_WAYLAND_KHR - anv_wl_finish_wsi(physical_device); + wsi_wl_finish_wsi(&physical_device->wsi_device, &physical_device->instance->alloc); #endif #ifdef VK_USE_PLATFORM_XCB_KHR - anv_x11_finish_wsi(physical_device); + wsi_x11_finish_wsi(&physical_device->wsi_device, &physical_device->instance->alloc); #endif } @@ -66,9 +74,12 @@ const VkAllocationCallbacks* pAllocator) { ANV_FROM_HANDLE(anv_instance, instance, _instance); - ANV_FROM_HANDLE(_VkIcdSurfaceBase, surface, _surface); + ICD_FROM_HANDLE(VkIcdSurfaceBase, surface, _surface); - anv_free2(&instance->alloc, pAllocator, surface); + if (!surface) + return; + + vk_free2(&instance->alloc, pAllocator, surface); } VkResult anv_GetPhysicalDeviceSurfaceSupportKHR( @@ -78,10 +89,12 @@ VkBool32* pSupported) { ANV_FROM_HANDLE(anv_physical_device, device, physicalDevice); - ANV_FROM_HANDLE(_VkIcdSurfaceBase, surface, _surface); - struct anv_wsi_interface *iface = device->wsi[surface->platform]; + ICD_FROM_HANDLE(VkIcdSurfaceBase, surface, _surface); + struct wsi_interface *iface = device->wsi_device.wsi[surface->platform]; - return iface->get_support(surface, device, queueFamilyIndex, pSupported); + return iface->get_support(surface, &device->wsi_device, + &device->instance->alloc, + queueFamilyIndex, pSupported); } VkResult anv_GetPhysicalDeviceSurfaceCapabilitiesKHR( @@ -90,10 +103,10 @@ VkSurfaceCapabilitiesKHR* pSurfaceCapabilities) { ANV_FROM_HANDLE(anv_physical_device, device, physicalDevice); - ANV_FROM_HANDLE(_VkIcdSurfaceBase, surface, _surface); - struct anv_wsi_interface *iface = device->wsi[surface->platform]; + ICD_FROM_HANDLE(VkIcdSurfaceBase, surface, _surface); + struct wsi_interface *iface = device->wsi_device.wsi[surface->platform]; - return iface->get_capabilities(surface, device, pSurfaceCapabilities); + return iface->get_capabilities(surface, pSurfaceCapabilities); } VkResult anv_GetPhysicalDeviceSurfaceFormatsKHR( @@ -103,10 +116,10 @@ VkSurfaceFormatKHR* pSurfaceFormats) { ANV_FROM_HANDLE(anv_physical_device, device, physicalDevice); - ANV_FROM_HANDLE(_VkIcdSurfaceBase, surface, _surface); - struct anv_wsi_interface *iface = device->wsi[surface->platform]; + ICD_FROM_HANDLE(VkIcdSurfaceBase, surface, _surface); + struct wsi_interface *iface = device->wsi_device.wsi[surface->platform]; - return iface->get_formats(surface, device, pSurfaceFormatCount, + return iface->get_formats(surface, &device->wsi_device, pSurfaceFormatCount, pSurfaceFormats); } @@ -117,13 +130,129 @@ VkPresentModeKHR* pPresentModes) { ANV_FROM_HANDLE(anv_physical_device, device, physicalDevice); - ANV_FROM_HANDLE(_VkIcdSurfaceBase, surface, _surface); - struct anv_wsi_interface *iface = device->wsi[surface->platform]; + ICD_FROM_HANDLE(VkIcdSurfaceBase, surface, _surface); + struct wsi_interface *iface = device->wsi_device.wsi[surface->platform]; - return iface->get_present_modes(surface, device, pPresentModeCount, + return iface->get_present_modes(surface, pPresentModeCount, pPresentModes); } + +static VkResult +x11_anv_wsi_image_create(VkDevice device_h, + const VkSwapchainCreateInfoKHR *pCreateInfo, + const VkAllocationCallbacks* pAllocator, + VkImage *image_p, + VkDeviceMemory *memory_p, + uint32_t *size, + uint32_t *offset, + uint32_t *row_pitch, int *fd_p) +{ + struct anv_device *device = anv_device_from_handle(device_h); + VkImage image_h; + struct anv_image *image; + + VkResult result; + result = anv_image_create(anv_device_to_handle(device), + &(struct anv_image_create_info) { + .isl_tiling_flags = ISL_TILING_X_BIT, + .stride = 0, + .vk_info = + &(VkImageCreateInfo) { + .sType = VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO, + .imageType = VK_IMAGE_TYPE_2D, + .format = pCreateInfo->imageFormat, + .extent = { + .width = pCreateInfo->imageExtent.width, + .height = pCreateInfo->imageExtent.height, + .depth = 1 + }, + .mipLevels = 1, + .arrayLayers = 1, + .samples = 1, + /* FIXME: Need a way to use X tiling to allow scanout */ + .tiling = VK_IMAGE_TILING_OPTIMAL, + .usage = (pCreateInfo->imageUsage | + VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT), + .flags = 0, + }}, + NULL, + &image_h); + if (result != VK_SUCCESS) + return result; + + image = anv_image_from_handle(image_h); + assert(vk_format_is_color(image->vk_format)); + + VkDeviceMemory memory_h; + struct anv_device_memory *memory; + result = anv_AllocateMemory(anv_device_to_handle(device), + &(VkMemoryAllocateInfo) { + .sType = VK_STRUCTURE_TYPE_MEMORY_ALLOCATE_INFO, + .allocationSize = image->size, + .memoryTypeIndex = 0, + }, + NULL /* XXX: pAllocator */, + &memory_h); + if (result != VK_SUCCESS) + goto fail_create_image; + + memory = anv_device_memory_from_handle(memory_h); + memory->bo.is_winsys_bo = true; + + anv_BindImageMemory(device_h, image_h, memory_h, 0); + + struct anv_surface *surface = &image->color_surface; + assert(surface->isl.tiling == ISL_TILING_X); + + *row_pitch = surface->isl.row_pitch; + int ret = anv_gem_set_tiling(device, memory->bo.gem_handle, + surface->isl.row_pitch, I915_TILING_X); + if (ret) { + /* FINISHME: Choose a better error. */ + result = vk_errorf(VK_ERROR_OUT_OF_DEVICE_MEMORY, + "set_tiling failed: %m"); + goto fail_alloc_memory; + } + + int fd = anv_gem_handle_to_fd(device, memory->bo.gem_handle); + if (fd == -1) { + /* FINISHME: Choose a better error. */ + result = vk_errorf(VK_ERROR_OUT_OF_DEVICE_MEMORY, + "handle_to_fd failed: %m"); + goto fail_alloc_memory; + } + + *image_p = image_h; + *memory_p = memory_h; + *fd_p = fd; + *size = image->size; + *offset = image->offset; + return VK_SUCCESS; +fail_alloc_memory: + anv_FreeMemory(device_h, memory_h, pAllocator); + +fail_create_image: + anv_DestroyImage(device_h, image_h, pAllocator); + return result; +} + +static void +x11_anv_wsi_image_free(VkDevice device, + const VkAllocationCallbacks* pAllocator, + VkImage image_h, + VkDeviceMemory memory_h) +{ + anv_DestroyImage(device, image_h, pAllocator); + + anv_FreeMemory(device, memory_h, pAllocator); +} + +static const struct wsi_image_fns anv_wsi_image_fns = { + .create_wsi_image = x11_anv_wsi_image_create, + .free_wsi_image = x11_anv_wsi_image_free, +}; + VkResult anv_CreateSwapchainKHR( VkDevice _device, const VkSwapchainCreateInfoKHR* pCreateInfo, @@ -131,42 +260,56 @@ VkSwapchainKHR* pSwapchain) { ANV_FROM_HANDLE(anv_device, device, _device); - ANV_FROM_HANDLE(_VkIcdSurfaceBase, surface, pCreateInfo->surface); - struct anv_wsi_interface *iface = - device->instance->physicalDevice.wsi[surface->platform]; - struct anv_swapchain *swapchain; + ICD_FROM_HANDLE(VkIcdSurfaceBase, surface, pCreateInfo->surface); + struct wsi_interface *iface = + device->instance->physicalDevice.wsi_device.wsi[surface->platform]; + struct wsi_swapchain *swapchain; + const VkAllocationCallbacks *alloc; - VkResult result = iface->create_swapchain(surface, device, pCreateInfo, - pAllocator, &swapchain); + if (pAllocator) + alloc = pAllocator; + else + alloc = &device->alloc; + VkResult result = iface->create_swapchain(surface, _device, + &device->instance->physicalDevice.wsi_device, + pCreateInfo, + alloc, &anv_wsi_image_fns, + &swapchain); if (result != VK_SUCCESS) return result; - if (pAllocator) - swapchain->alloc = *pAllocator; - else - swapchain->alloc = device->alloc; + swapchain->alloc = *alloc; for (unsigned i = 0; i < ARRAY_SIZE(swapchain->fences); i++) swapchain->fences[i] = VK_NULL_HANDLE; - *pSwapchain = anv_swapchain_to_handle(swapchain); + *pSwapchain = wsi_swapchain_to_handle(swapchain); return VK_SUCCESS; } void anv_DestroySwapchainKHR( - VkDevice device, + VkDevice _device, VkSwapchainKHR _swapchain, const VkAllocationCallbacks* pAllocator) { - ANV_FROM_HANDLE(anv_swapchain, swapchain, _swapchain); + ANV_FROM_HANDLE(anv_device, device, _device); + ANV_FROM_HANDLE(wsi_swapchain, swapchain, _swapchain); + const VkAllocationCallbacks *alloc; + if (!swapchain) + return; + + if (pAllocator) + alloc = pAllocator; + else + alloc = &device->alloc; for (unsigned i = 0; i < ARRAY_SIZE(swapchain->fences); i++) { if (swapchain->fences[i] != VK_NULL_HANDLE) - anv_DestroyFence(device, swapchain->fences[i], pAllocator); + anv_DestroyFence(_device, swapchain->fences[i], pAllocator); } - swapchain->destroy(swapchain, pAllocator); + swapchain->destroy(swapchain, alloc); } VkResult anv_GetSwapchainImagesKHR( @@ -175,7 +318,7 @@ uint32_t* pSwapchainImageCount, VkImage* pSwapchainImages) { - ANV_FROM_HANDLE(anv_swapchain, swapchain, _swapchain); + ANV_FROM_HANDLE(wsi_swapchain, swapchain, _swapchain); return swapchain->get_images(swapchain, pSwapchainImageCount, pSwapchainImages); @@ -186,13 +329,20 @@ VkSwapchainKHR _swapchain, uint64_t timeout, VkSemaphore semaphore, - VkFence fence, + VkFence _fence, uint32_t* pImageIndex) { - ANV_FROM_HANDLE(anv_swapchain, swapchain, _swapchain); + ANV_FROM_HANDLE(wsi_swapchain, swapchain, _swapchain); + ANV_FROM_HANDLE(anv_fence, fence, _fence); + + VkResult result = swapchain->acquire_next_image(swapchain, timeout, + semaphore, pImageIndex); - return swapchain->acquire_next_image(swapchain, timeout, semaphore, - pImageIndex); + /* Thanks to implicit sync, the image is ready immediately. */ + if (fence) + fence->state = ANV_FENCE_STATE_SIGNALED; + + return result; } VkResult anv_QueuePresentKHR( @@ -200,21 +350,25 @@ const VkPresentInfoKHR* pPresentInfo) { ANV_FROM_HANDLE(anv_queue, queue, _queue); - VkResult result; + VkResult result = VK_SUCCESS; for (uint32_t i = 0; i < pPresentInfo->swapchainCount; i++) { - ANV_FROM_HANDLE(anv_swapchain, swapchain, pPresentInfo->pSwapchains[i]); + ANV_FROM_HANDLE(wsi_swapchain, swapchain, pPresentInfo->pSwapchains[i]); + VkResult item_result; - assert(swapchain->device == queue->device); + assert(anv_device_from_handle(swapchain->device) == queue->device); if (swapchain->fences[0] == VK_NULL_HANDLE) { - result = anv_CreateFence(anv_device_to_handle(queue->device), + item_result = anv_CreateFence(anv_device_to_handle(queue->device), &(VkFenceCreateInfo) { .sType = VK_STRUCTURE_TYPE_FENCE_CREATE_INFO, .flags = 0, }, &swapchain->alloc, &swapchain->fences[0]); - if (result != VK_SUCCESS) - return result; + if (pPresentInfo->pResults != NULL) + pPresentInfo->pResults[i] = item_result; + result = result == VK_SUCCESS ? item_result : result; + if (item_result != VK_SUCCESS) + continue; } else { anv_ResetFences(anv_device_to_handle(queue->device), 1, &swapchain->fences[0]); @@ -222,11 +376,14 @@ anv_QueueSubmit(_queue, 0, NULL, swapchain->fences[0]); - result = swapchain->queue_present(swapchain, queue, - pPresentInfo->pImageIndices[i]); + item_result = swapchain->queue_present(swapchain, + pPresentInfo->pImageIndices[i]); /* TODO: What if one of them returns OUT_OF_DATE? */ - if (result != VK_SUCCESS) - return result; + if (pPresentInfo->pResults != NULL) + pPresentInfo->pResults[i] = item_result; + result = result == VK_SUCCESS ? item_result : result; + if (item_result != VK_SUCCESS) + continue; VkFence last = swapchain->fences[2]; swapchain->fences[2] = swapchain->fences[1]; diff -Nru mesa-12.0.6/src/intel/vulkan/anv_wsi.h mesa-17.0.7/src/intel/vulkan/anv_wsi.h --- mesa-12.0.6/src/intel/vulkan/anv_wsi.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_wsi.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,78 +0,0 @@ -/* - * Copyright © 2015 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - -#pragma once - -#include "anv_private.h" - -struct anv_swapchain; - -struct anv_wsi_interface { - VkResult (*get_support)(VkIcdSurfaceBase *surface, - struct anv_physical_device *device, - uint32_t queueFamilyIndex, - VkBool32* pSupported); - VkResult (*get_capabilities)(VkIcdSurfaceBase *surface, - struct anv_physical_device *device, - VkSurfaceCapabilitiesKHR* pSurfaceCapabilities); - VkResult (*get_formats)(VkIcdSurfaceBase *surface, - struct anv_physical_device *device, - uint32_t* pSurfaceFormatCount, - VkSurfaceFormatKHR* pSurfaceFormats); - VkResult (*get_present_modes)(VkIcdSurfaceBase *surface, - struct anv_physical_device *device, - uint32_t* pPresentModeCount, - VkPresentModeKHR* pPresentModes); - VkResult (*create_swapchain)(VkIcdSurfaceBase *surface, - struct anv_device *device, - const VkSwapchainCreateInfoKHR* pCreateInfo, - const VkAllocationCallbacks* pAllocator, - struct anv_swapchain **swapchain); -}; - -struct anv_swapchain { - struct anv_device *device; - - VkAllocationCallbacks alloc; - - VkFence fences[3]; - - VkResult (*destroy)(struct anv_swapchain *swapchain, - const VkAllocationCallbacks *pAllocator); - VkResult (*get_images)(struct anv_swapchain *swapchain, - uint32_t *pCount, VkImage *pSwapchainImages); - VkResult (*acquire_next_image)(struct anv_swapchain *swap_chain, - uint64_t timeout, VkSemaphore semaphore, - uint32_t *image_index); - VkResult (*queue_present)(struct anv_swapchain *swap_chain, - struct anv_queue *queue, - uint32_t image_index); -}; - -ANV_DEFINE_NONDISP_HANDLE_CASTS(_VkIcdSurfaceBase, VkSurfaceKHR) -ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_swapchain, VkSwapchainKHR) - -VkResult anv_x11_init_wsi(struct anv_physical_device *physical_device); -void anv_x11_finish_wsi(struct anv_physical_device *physical_device); -VkResult anv_wl_init_wsi(struct anv_physical_device *physical_device); -void anv_wl_finish_wsi(struct anv_physical_device *physical_device); diff -Nru mesa-12.0.6/src/intel/vulkan/anv_wsi_wayland.c mesa-17.0.7/src/intel/vulkan/anv_wsi_wayland.c --- mesa-12.0.6/src/intel/vulkan/anv_wsi_wayland.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_wsi_wayland.c 2017-06-01 10:37:10.000000000 +0000 @@ -24,297 +24,11 @@ #include #include -#include "anv_wsi.h" - #include "vk_format_info.h" #include -#define MIN_NUM_IMAGES 2 - -struct wsi_wl_display { - struct anv_physical_device *physical_device; - struct wl_display * display; - struct wl_drm * drm; - - /* Vector of VkFormats supported */ - struct anv_vector formats; - - uint32_t capabilities; -}; - -struct wsi_wayland { - struct anv_wsi_interface base; - - struct anv_physical_device * physical_device; - - pthread_mutex_t mutex; - /* Hash table of wl_display -> wsi_wl_display mappings */ - struct hash_table * displays; -}; - -static void -wsi_wl_display_add_vk_format(struct wsi_wl_display *display, VkFormat format) -{ - /* Don't add a format that's already in the list */ - VkFormat *f; - anv_vector_foreach(f, &display->formats) - if (*f == format) - return; - - /* Don't add formats that aren't renderable. */ - VkFormatProperties props; - anv_GetPhysicalDeviceFormatProperties( - anv_physical_device_to_handle(display->physical_device), format, &props); - if (!(props.optimalTilingFeatures & VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BIT)) - return; - - f = anv_vector_add(&display->formats); - if (f) - *f = format; -} - -static void -drm_handle_device(void *data, struct wl_drm *drm, const char *name) -{ - fprintf(stderr, "wl_drm.device(%s)\n", name); -} - -static uint32_t -wl_drm_format_for_vk_format(VkFormat vk_format, bool alpha) -{ - switch (vk_format) { - /* TODO: Figure out what all the formats mean and make this table - * correct. - */ -#if 0 - case VK_FORMAT_R4G4B4A4_UNORM: - return alpha ? WL_DRM_FORMAT_ABGR4444 : WL_DRM_FORMAT_XBGR4444; - case VK_FORMAT_R5G6B5_UNORM: - return WL_DRM_FORMAT_BGR565; - case VK_FORMAT_R5G5B5A1_UNORM: - return alpha ? WL_DRM_FORMAT_ABGR1555 : WL_DRM_FORMAT_XBGR1555; - case VK_FORMAT_R8G8B8_UNORM: - return WL_DRM_FORMAT_XBGR8888; - case VK_FORMAT_R8G8B8A8_UNORM: - return alpha ? WL_DRM_FORMAT_ABGR8888 : WL_DRM_FORMAT_XBGR8888; - case VK_FORMAT_R10G10B10A2_UNORM: - return alpha ? WL_DRM_FORMAT_ABGR2101010 : WL_DRM_FORMAT_XBGR2101010; - case VK_FORMAT_B4G4R4A4_UNORM: - return alpha ? WL_DRM_FORMAT_ARGB4444 : WL_DRM_FORMAT_XRGB4444; - case VK_FORMAT_B5G6R5_UNORM: - return WL_DRM_FORMAT_RGB565; - case VK_FORMAT_B5G5R5A1_UNORM: - return alpha ? WL_DRM_FORMAT_XRGB1555 : WL_DRM_FORMAT_XRGB1555; -#endif - case VK_FORMAT_B8G8R8_SRGB: - return WL_DRM_FORMAT_BGRX8888; - case VK_FORMAT_B8G8R8A8_SRGB: - return alpha ? WL_DRM_FORMAT_ARGB8888 : WL_DRM_FORMAT_XRGB8888; -#if 0 - case VK_FORMAT_B10G10R10A2_UNORM: - return alpha ? WL_DRM_FORMAT_ARGB2101010 : WL_DRM_FORMAT_XRGB2101010; -#endif - - default: - assert("!Unsupported Vulkan format"); - return 0; - } -} - -static void -drm_handle_format(void *data, struct wl_drm *drm, uint32_t wl_format) -{ - struct wsi_wl_display *display = data; - - switch (wl_format) { -#if 0 - case WL_DRM_FORMAT_ABGR4444: - case WL_DRM_FORMAT_XBGR4444: - wsi_wl_display_add_vk_format(display, VK_FORMAT_R4G4B4A4_UNORM); - break; - case WL_DRM_FORMAT_BGR565: - wsi_wl_display_add_vk_format(display, VK_FORMAT_R5G6B5_UNORM); - break; - case WL_DRM_FORMAT_ABGR1555: - case WL_DRM_FORMAT_XBGR1555: - wsi_wl_display_add_vk_format(display, VK_FORMAT_R5G5B5A1_UNORM); - break; - case WL_DRM_FORMAT_XBGR8888: - wsi_wl_display_add_vk_format(display, VK_FORMAT_R8G8B8_UNORM); - /* fallthrough */ - case WL_DRM_FORMAT_ABGR8888: - wsi_wl_display_add_vk_format(display, VK_FORMAT_R8G8B8A8_UNORM); - break; - case WL_DRM_FORMAT_ABGR2101010: - case WL_DRM_FORMAT_XBGR2101010: - wsi_wl_display_add_vk_format(display, VK_FORMAT_R10G10B10A2_UNORM); - break; - case WL_DRM_FORMAT_ARGB4444: - case WL_DRM_FORMAT_XRGB4444: - wsi_wl_display_add_vk_format(display, VK_FORMAT_B4G4R4A4_UNORM); - break; - case WL_DRM_FORMAT_RGB565: - wsi_wl_display_add_vk_format(display, VK_FORMAT_B5G6R5_UNORM); - break; - case WL_DRM_FORMAT_ARGB1555: - case WL_DRM_FORMAT_XRGB1555: - wsi_wl_display_add_vk_format(display, VK_FORMAT_B5G5R5A1_UNORM); - break; -#endif - case WL_DRM_FORMAT_XRGB8888: - wsi_wl_display_add_vk_format(display, VK_FORMAT_B8G8R8_SRGB); - /* fallthrough */ - case WL_DRM_FORMAT_ARGB8888: - wsi_wl_display_add_vk_format(display, VK_FORMAT_B8G8R8A8_SRGB); - break; -#if 0 - case WL_DRM_FORMAT_ARGB2101010: - case WL_DRM_FORMAT_XRGB2101010: - wsi_wl_display_add_vk_format(display, VK_FORMAT_B10G10R10A2_UNORM); - break; -#endif - } -} - -static void -drm_handle_authenticated(void *data, struct wl_drm *drm) -{ -} - -static void -drm_handle_capabilities(void *data, struct wl_drm *drm, uint32_t capabilities) -{ - struct wsi_wl_display *display = data; - - display->capabilities = capabilities; -} - -static const struct wl_drm_listener drm_listener = { - drm_handle_device, - drm_handle_format, - drm_handle_authenticated, - drm_handle_capabilities, -}; - -static void -registry_handle_global(void *data, struct wl_registry *registry, - uint32_t name, const char *interface, uint32_t version) -{ - struct wsi_wl_display *display = data; - - if (strcmp(interface, "wl_drm") == 0) { - assert(display->drm == NULL); - - assert(version >= 2); - display->drm = wl_registry_bind(registry, name, &wl_drm_interface, 2); - - if (display->drm) - wl_drm_add_listener(display->drm, &drm_listener, display); - } -} - -static void -registry_handle_global_remove(void *data, struct wl_registry *registry, - uint32_t name) -{ /* No-op */ } - -static const struct wl_registry_listener registry_listener = { - registry_handle_global, - registry_handle_global_remove -}; - -static void -wsi_wl_display_destroy(struct wsi_wayland *wsi, struct wsi_wl_display *display) -{ - anv_vector_finish(&display->formats); - if (display->drm) - wl_drm_destroy(display->drm); - anv_free(&wsi->physical_device->instance->alloc, display); -} - -static struct wsi_wl_display * -wsi_wl_display_create(struct wsi_wayland *wsi, struct wl_display *wl_display) -{ - struct wsi_wl_display *display = - anv_alloc(&wsi->physical_device->instance->alloc, sizeof(*display), 8, - VK_SYSTEM_ALLOCATION_SCOPE_INSTANCE); - if (!display) - return NULL; - - memset(display, 0, sizeof(*display)); - - display->display = wl_display; - display->physical_device = wsi->physical_device; - - if (!anv_vector_init(&display->formats, sizeof(VkFormat), 8)) - goto fail; - - struct wl_registry *registry = wl_display_get_registry(wl_display); - if (!registry) - return NULL; - - wl_registry_add_listener(registry, ®istry_listener, display); - - /* Round-rip to get the wl_drm global */ - wl_display_roundtrip(wl_display); - - if (!display->drm) - goto fail; - - /* Round-rip to get wl_drm formats and capabilities */ - wl_display_roundtrip(wl_display); - - /* We need prime support */ - if (!(display->capabilities & WL_DRM_CAPABILITY_PRIME)) - goto fail; - - /* We don't need this anymore */ - wl_registry_destroy(registry); - - return display; - -fail: - if (registry) - wl_registry_destroy(registry); - - wsi_wl_display_destroy(wsi, display); - return NULL; -} - -static struct wsi_wl_display * -wsi_wl_get_display(struct anv_physical_device *device, - struct wl_display *wl_display) -{ - struct wsi_wayland *wsi = - (struct wsi_wayland *)device->wsi[VK_ICD_WSI_PLATFORM_WAYLAND]; - - pthread_mutex_lock(&wsi->mutex); - - struct hash_entry *entry = _mesa_hash_table_search(wsi->displays, - wl_display); - if (!entry) { - /* We're about to make a bunch of blocking calls. Let's drop the - * mutex for now so we don't block up too badly. - */ - pthread_mutex_unlock(&wsi->mutex); - - struct wsi_wl_display *display = wsi_wl_display_create(wsi, wl_display); - - pthread_mutex_lock(&wsi->mutex); - - entry = _mesa_hash_table_search(wsi->displays, wl_display); - if (entry) { - /* Oops, someone raced us to it */ - wsi_wl_display_destroy(wsi, display); - } else { - entry = _mesa_hash_table_insert(wsi->displays, wl_display, display); - } - } - - pthread_mutex_unlock(&wsi->mutex); - - return entry->data; -} +#include "wsi_common_wayland.h" +#include "anv_private.h" VkBool32 anv_GetPhysicalDeviceWaylandPresentationSupportKHR( VkPhysicalDevice physicalDevice, @@ -323,109 +37,9 @@ { ANV_FROM_HANDLE(anv_physical_device, physical_device, physicalDevice); - return wsi_wl_get_display(physical_device, display) != NULL; + return wsi_wl_get_presentation_support(&physical_device->wsi_device, display); } -static VkResult -wsi_wl_surface_get_support(VkIcdSurfaceBase *surface, - struct anv_physical_device *device, - uint32_t queueFamilyIndex, - VkBool32* pSupported) -{ - *pSupported = true; - - return VK_SUCCESS; -} - -static const VkPresentModeKHR present_modes[] = { - VK_PRESENT_MODE_MAILBOX_KHR, - VK_PRESENT_MODE_FIFO_KHR, -}; - -static VkResult -wsi_wl_surface_get_capabilities(VkIcdSurfaceBase *surface, - struct anv_physical_device *device, - VkSurfaceCapabilitiesKHR* caps) -{ - caps->minImageCount = MIN_NUM_IMAGES; - caps->maxImageCount = 4; - caps->currentExtent = (VkExtent2D) { -1, -1 }; - caps->minImageExtent = (VkExtent2D) { 1, 1 }; - caps->maxImageExtent = (VkExtent2D) { INT16_MAX, INT16_MAX }; - caps->supportedTransforms = VK_SURFACE_TRANSFORM_IDENTITY_BIT_KHR; - caps->currentTransform = VK_SURFACE_TRANSFORM_IDENTITY_BIT_KHR; - caps->maxImageArrayLayers = 1; - - caps->supportedCompositeAlpha = - VK_COMPOSITE_ALPHA_OPAQUE_BIT_KHR | - VK_COMPOSITE_ALPHA_PRE_MULTIPLIED_BIT_KHR; - - caps->supportedUsageFlags = - VK_IMAGE_USAGE_TRANSFER_SRC_BIT | - VK_IMAGE_USAGE_SAMPLED_BIT | - VK_IMAGE_USAGE_TRANSFER_DST_BIT | - VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT; - - return VK_SUCCESS; -} - -static VkResult -wsi_wl_surface_get_formats(VkIcdSurfaceBase *icd_surface, - struct anv_physical_device *device, - uint32_t* pSurfaceFormatCount, - VkSurfaceFormatKHR* pSurfaceFormats) -{ - VkIcdSurfaceWayland *surface = (VkIcdSurfaceWayland *)icd_surface; - struct wsi_wl_display *display = - wsi_wl_get_display(device, surface->display); - - uint32_t count = anv_vector_length(&display->formats); - - if (pSurfaceFormats == NULL) { - *pSurfaceFormatCount = count; - return VK_SUCCESS; - } - - assert(*pSurfaceFormatCount >= count); - *pSurfaceFormatCount = count; - - VkFormat *f; - anv_vector_foreach(f, &display->formats) { - *(pSurfaceFormats++) = (VkSurfaceFormatKHR) { - .format = *f, - /* TODO: We should get this from the compositor somehow */ - .colorSpace = VK_COLORSPACE_SRGB_NONLINEAR_KHR, - }; - } - - return VK_SUCCESS; -} - -static VkResult -wsi_wl_surface_get_present_modes(VkIcdSurfaceBase *surface, - struct anv_physical_device *device, - uint32_t* pPresentModeCount, - VkPresentModeKHR* pPresentModes) -{ - if (pPresentModes == NULL) { - *pPresentModeCount = ARRAY_SIZE(present_modes); - return VK_SUCCESS; - } - - assert(*pPresentModeCount >= ARRAY_SIZE(present_modes)); - typed_memcpy(pPresentModes, present_modes, *pPresentModeCount); - *pPresentModeCount = ARRAY_SIZE(present_modes); - - return VK_SUCCESS; -} - -static VkResult -wsi_wl_surface_create_swapchain(VkIcdSurfaceBase *surface, - struct anv_device *device, - const VkSwapchainCreateInfoKHR* pCreateInfo, - const VkAllocationCallbacks* pAllocator, - struct anv_swapchain **swapchain); - VkResult anv_CreateWaylandSurfaceKHR( VkInstance _instance, const VkWaylandSurfaceCreateInfoKHR* pCreateInfo, @@ -433,454 +47,13 @@ VkSurfaceKHR* pSurface) { ANV_FROM_HANDLE(anv_instance, instance, _instance); - + const VkAllocationCallbacks *alloc; assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_WAYLAND_SURFACE_CREATE_INFO_KHR); - VkIcdSurfaceWayland *surface; - - surface = anv_alloc2(&instance->alloc, pAllocator, sizeof *surface, 8, - VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); - if (surface == NULL) - return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); - - surface->base.platform = VK_ICD_WSI_PLATFORM_WAYLAND; - surface->display = pCreateInfo->display; - surface->surface = pCreateInfo->surface; - - *pSurface = _VkIcdSurfaceBase_to_handle(&surface->base); - - return VK_SUCCESS; -} - -struct wsi_wl_image { - struct anv_image * image; - struct anv_device_memory * memory; - struct wl_buffer * buffer; - bool busy; -}; - -struct wsi_wl_swapchain { - struct anv_swapchain base; - - struct wsi_wl_display * display; - struct wl_event_queue * queue; - struct wl_surface * surface; - - VkExtent2D extent; - VkFormat vk_format; - uint32_t drm_format; - - VkPresentModeKHR present_mode; - bool fifo_ready; - - uint32_t image_count; - struct wsi_wl_image images[0]; -}; - -static VkResult -wsi_wl_swapchain_get_images(struct anv_swapchain *anv_chain, - uint32_t *pCount, VkImage *pSwapchainImages) -{ - struct wsi_wl_swapchain *chain = (struct wsi_wl_swapchain *)anv_chain; - - if (pSwapchainImages == NULL) { - *pCount = chain->image_count; - return VK_SUCCESS; - } - - assert(chain->image_count <= *pCount); - for (uint32_t i = 0; i < chain->image_count; i++) - pSwapchainImages[i] = anv_image_to_handle(chain->images[i].image); - - *pCount = chain->image_count; - - return VK_SUCCESS; -} - -static VkResult -wsi_wl_swapchain_acquire_next_image(struct anv_swapchain *anv_chain, - uint64_t timeout, - VkSemaphore semaphore, - uint32_t *image_index) -{ - struct wsi_wl_swapchain *chain = (struct wsi_wl_swapchain *)anv_chain; - - int ret = wl_display_dispatch_queue_pending(chain->display->display, - chain->queue); - /* XXX: I'm not sure if out-of-date is the right error here. If - * wl_display_dispatch_queue_pending fails it most likely means we got - * kicked by the server so this seems more-or-less correct. - */ - if (ret < 0) - return vk_error(VK_ERROR_OUT_OF_DATE_KHR); - - while (1) { - for (uint32_t i = 0; i < chain->image_count; i++) { - if (!chain->images[i].busy) { - /* We found a non-busy image */ - *image_index = i; - chain->images[i].busy = true; - return VK_SUCCESS; - } - } - - /* This time we do a blocking dispatch because we can't go - * anywhere until we get an event. - */ - int ret = wl_display_roundtrip_queue(chain->display->display, - chain->queue); - if (ret < 0) - return vk_error(VK_ERROR_OUT_OF_DATE_KHR); - } -} - -static void -frame_handle_done(void *data, struct wl_callback *callback, uint32_t serial) -{ - struct wsi_wl_swapchain *chain = data; - - chain->fifo_ready = true; - - wl_callback_destroy(callback); -} - -static const struct wl_callback_listener frame_listener = { - frame_handle_done, -}; - -static VkResult -wsi_wl_swapchain_queue_present(struct anv_swapchain *anv_chain, - struct anv_queue *queue, - uint32_t image_index) -{ - struct wsi_wl_swapchain *chain = (struct wsi_wl_swapchain *)anv_chain; - - if (chain->present_mode == VK_PRESENT_MODE_FIFO_KHR) { - while (!chain->fifo_ready) { - int ret = wl_display_dispatch_queue(chain->display->display, - chain->queue); - if (ret < 0) - return vk_error(VK_ERROR_OUT_OF_DATE_KHR); - } - } - - assert(image_index < chain->image_count); - wl_surface_attach(chain->surface, chain->images[image_index].buffer, 0, 0); - wl_surface_damage(chain->surface, 0, 0, INT32_MAX, INT32_MAX); - - if (chain->present_mode == VK_PRESENT_MODE_FIFO_KHR) { - struct wl_callback *frame = wl_surface_frame(chain->surface); - wl_proxy_set_queue((struct wl_proxy *)frame, chain->queue); - wl_callback_add_listener(frame, &frame_listener, chain); - chain->fifo_ready = false; - } - - chain->images[image_index].busy = true; - wl_surface_commit(chain->surface); - wl_display_flush(chain->display->display); - - return VK_SUCCESS; -} - -static void -wsi_wl_image_finish(struct wsi_wl_swapchain *chain, struct wsi_wl_image *image, - const VkAllocationCallbacks* pAllocator) -{ - VkDevice vk_device = anv_device_to_handle(chain->base.device); - anv_FreeMemory(vk_device, anv_device_memory_to_handle(image->memory), - pAllocator); - anv_DestroyImage(vk_device, anv_image_to_handle(image->image), - pAllocator); -} - -static void -buffer_handle_release(void *data, struct wl_buffer *buffer) -{ - struct wsi_wl_image *image = data; - - assert(image->buffer == buffer); - - image->busy = false; -} - -static const struct wl_buffer_listener buffer_listener = { - buffer_handle_release, -}; - -static VkResult -wsi_wl_image_init(struct wsi_wl_swapchain *chain, - struct wsi_wl_image *image, - const VkSwapchainCreateInfoKHR *pCreateInfo, - const VkAllocationCallbacks* pAllocator) -{ - VkDevice vk_device = anv_device_to_handle(chain->base.device); - VkResult result; - - VkImage vk_image; - result = anv_image_create(vk_device, - &(struct anv_image_create_info) { - .isl_tiling_flags = ISL_TILING_X_BIT, - .stride = 0, - .vk_info = - &(VkImageCreateInfo) { - .sType = VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO, - .imageType = VK_IMAGE_TYPE_2D, - .format = chain->vk_format, - .extent = { - .width = chain->extent.width, - .height = chain->extent.height, - .depth = 1 - }, - .mipLevels = 1, - .arrayLayers = 1, - .samples = 1, - /* FIXME: Need a way to use X tiling to allow scanout */ - .tiling = VK_IMAGE_TILING_OPTIMAL, - .usage = (VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT | - pCreateInfo->imageUsage), - .flags = 0, - }}, - pAllocator, - &vk_image); - - if (result != VK_SUCCESS) - return result; - - image->image = anv_image_from_handle(vk_image); - assert(vk_format_is_color(image->image->vk_format)); - - struct anv_surface *surface = &image->image->color_surface; - - VkDeviceMemory vk_memory; - result = anv_AllocateMemory(vk_device, - &(VkMemoryAllocateInfo) { - .sType = VK_STRUCTURE_TYPE_MEMORY_ALLOCATE_INFO, - .allocationSize = image->image->size, - .memoryTypeIndex = 0, - }, - pAllocator, - &vk_memory); - - if (result != VK_SUCCESS) - goto fail_image; - - image->memory = anv_device_memory_from_handle(vk_memory); - image->memory->bo.is_winsys_bo = true; - - result = anv_BindImageMemory(vk_device, vk_image, vk_memory, 0); - - if (result != VK_SUCCESS) - goto fail_mem; - - int ret = anv_gem_set_tiling(chain->base.device, - image->memory->bo.gem_handle, - surface->isl.row_pitch, I915_TILING_X); - if (ret) { - /* FINISHME: Choose a better error. */ - result = vk_error(VK_ERROR_OUT_OF_DEVICE_MEMORY); - goto fail_mem; - } - - int fd = anv_gem_handle_to_fd(chain->base.device, - image->memory->bo.gem_handle); - if (fd == -1) { - /* FINISHME: Choose a better error. */ - result = vk_error(VK_ERROR_OUT_OF_DEVICE_MEMORY); - goto fail_mem; - } - - image->buffer = wl_drm_create_prime_buffer(chain->display->drm, - fd, /* name */ - chain->extent.width, - chain->extent.height, - chain->drm_format, - surface->offset, - surface->isl.row_pitch, - 0, 0, 0, 0 /* unused */); - wl_display_roundtrip(chain->display->display); - close(fd); - - wl_proxy_set_queue((struct wl_proxy *)image->buffer, chain->queue); - wl_buffer_add_listener(image->buffer, &buffer_listener, image); - - return VK_SUCCESS; - -fail_mem: - anv_FreeMemory(vk_device, vk_memory, pAllocator); -fail_image: - anv_DestroyImage(vk_device, vk_image, pAllocator); - - return result; -} - -static VkResult -wsi_wl_swapchain_destroy(struct anv_swapchain *anv_chain, - const VkAllocationCallbacks *pAllocator) -{ - struct wsi_wl_swapchain *chain = (struct wsi_wl_swapchain *)anv_chain; - - for (uint32_t i = 0; i < chain->image_count; i++) { - if (chain->images[i].buffer) - wsi_wl_image_finish(chain, &chain->images[i], pAllocator); - } - - anv_free2(&chain->base.device->alloc, pAllocator, chain); - - return VK_SUCCESS; -} - -static VkResult -wsi_wl_surface_create_swapchain(VkIcdSurfaceBase *icd_surface, - struct anv_device *device, - const VkSwapchainCreateInfoKHR* pCreateInfo, - const VkAllocationCallbacks* pAllocator, - struct anv_swapchain **swapchain_out) -{ - VkIcdSurfaceWayland *surface = (VkIcdSurfaceWayland *)icd_surface; - struct wsi_wl_swapchain *chain; - VkResult result; - - assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SWAPCHAIN_CREATE_INFO_KHR); - - int num_images = pCreateInfo->minImageCount; - - assert(num_images >= MIN_NUM_IMAGES); - - /* For true mailbox mode, we need at least 4 images: - * 1) One to scan out from - * 2) One to have queued for scan-out - * 3) One to be currently held by the Wayland compositor - * 4) One to render to - */ - if (pCreateInfo->presentMode == VK_PRESENT_MODE_MAILBOX_KHR) - num_images = MAX2(num_images, 4); - - size_t size = sizeof(*chain) + num_images * sizeof(chain->images[0]); - chain = anv_alloc2(&device->alloc, pAllocator, size, 8, - VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); - if (chain == NULL) - return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); - - chain->base.device = device; - chain->base.destroy = wsi_wl_swapchain_destroy; - chain->base.get_images = wsi_wl_swapchain_get_images; - chain->base.acquire_next_image = wsi_wl_swapchain_acquire_next_image; - chain->base.queue_present = wsi_wl_swapchain_queue_present; - - chain->surface = surface->surface; - chain->extent = pCreateInfo->imageExtent; - chain->vk_format = pCreateInfo->imageFormat; - chain->drm_format = wl_drm_format_for_vk_format(chain->vk_format, false); - - chain->present_mode = pCreateInfo->presentMode; - chain->fifo_ready = true; - - chain->image_count = num_images; - - /* Mark a bunch of stuff as NULL. This way we can just call - * destroy_swapchain for cleanup. - */ - for (uint32_t i = 0; i < chain->image_count; i++) - chain->images[i].buffer = NULL; - chain->queue = NULL; - - chain->display = wsi_wl_get_display(&device->instance->physicalDevice, - surface->display); - if (!chain->display) { - result = vk_error(VK_ERROR_INITIALIZATION_FAILED); - goto fail; - } - - chain->queue = wl_display_create_queue(chain->display->display); - if (!chain->queue) { - result = vk_error(VK_ERROR_INITIALIZATION_FAILED); - goto fail; - } - - for (uint32_t i = 0; i < chain->image_count; i++) { - result = wsi_wl_image_init(chain, &chain->images[i], - pCreateInfo, pAllocator); - if (result != VK_SUCCESS) - goto fail; - chain->images[i].busy = false; - } - - *swapchain_out = &chain->base; - - return VK_SUCCESS; - -fail: - wsi_wl_swapchain_destroy(&chain->base, pAllocator); - - return result; -} - -VkResult -anv_wl_init_wsi(struct anv_physical_device *device) -{ - struct wsi_wayland *wsi; - VkResult result; - - wsi = anv_alloc(&device->instance->alloc, sizeof(*wsi), 8, - VK_SYSTEM_ALLOCATION_SCOPE_INSTANCE); - if (!wsi) { - result = vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); - goto fail; - } - - wsi->physical_device = device; - - int ret = pthread_mutex_init(&wsi->mutex, NULL); - if (ret != 0) { - if (ret == ENOMEM) { - result = vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); - } else { - /* FINISHME: Choose a better error. */ - result = vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); - } - - goto fail_alloc; - } - - wsi->displays = _mesa_hash_table_create(NULL, _mesa_hash_pointer, - _mesa_key_pointer_equal); - if (!wsi->displays) { - result = vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); - goto fail_mutex; - } - - wsi->base.get_support = wsi_wl_surface_get_support; - wsi->base.get_capabilities = wsi_wl_surface_get_capabilities; - wsi->base.get_formats = wsi_wl_surface_get_formats; - wsi->base.get_present_modes = wsi_wl_surface_get_present_modes; - wsi->base.create_swapchain = wsi_wl_surface_create_swapchain; - - device->wsi[VK_ICD_WSI_PLATFORM_WAYLAND] = &wsi->base; - - return VK_SUCCESS; - -fail_mutex: - pthread_mutex_destroy(&wsi->mutex); - -fail_alloc: - anv_free(&device->instance->alloc, wsi); -fail: - device->wsi[VK_ICD_WSI_PLATFORM_WAYLAND] = NULL; - - return result; -} - -void -anv_wl_finish_wsi(struct anv_physical_device *device) -{ - struct wsi_wayland *wsi = - (struct wsi_wayland *)device->wsi[VK_ICD_WSI_PLATFORM_WAYLAND]; - - if (wsi) { - _mesa_hash_table_destroy(wsi->displays, NULL); - - pthread_mutex_destroy(&wsi->mutex); + if (pAllocator) + alloc = pAllocator; + else + alloc = &instance->alloc; - anv_free(&device->instance->alloc, wsi); - } + return wsi_create_wl_surface(alloc, pCreateInfo, pSurface); } diff -Nru mesa-12.0.6/src/intel/vulkan/anv_wsi_x11.c mesa-17.0.7/src/intel/vulkan/anv_wsi_x11.c --- mesa-12.0.6/src/intel/vulkan/anv_wsi_x11.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/anv_wsi_x11.c 2017-06-01 10:37:10.000000000 +0000 @@ -21,214 +21,14 @@ * IN THE SOFTWARE. */ +#include #include #include #include #include -#include "anv_wsi.h" - -#include "vk_format_info.h" -#include "util/hash_table.h" - -struct wsi_x11_connection { - bool has_dri3; - bool has_present; -}; - -struct wsi_x11 { - struct anv_wsi_interface base; - - pthread_mutex_t mutex; - /* Hash table of xcb_connection -> wsi_x11_connection mappings */ - struct hash_table *connections; -}; - -static struct wsi_x11_connection * -wsi_x11_connection_create(struct anv_physical_device *device, - xcb_connection_t *conn) -{ - xcb_query_extension_cookie_t dri3_cookie, pres_cookie; - xcb_query_extension_reply_t *dri3_reply, *pres_reply; - - struct wsi_x11_connection *wsi_conn = - anv_alloc(&device->instance->alloc, sizeof(*wsi_conn), 8, - VK_SYSTEM_ALLOCATION_SCOPE_INSTANCE); - if (!wsi_conn) - return NULL; - - dri3_cookie = xcb_query_extension(conn, 4, "DRI3"); - pres_cookie = xcb_query_extension(conn, 7, "PRESENT"); - - dri3_reply = xcb_query_extension_reply(conn, dri3_cookie, NULL); - pres_reply = xcb_query_extension_reply(conn, pres_cookie, NULL); - if (dri3_reply == NULL || pres_reply == NULL) { - free(dri3_reply); - free(pres_reply); - anv_free(&device->instance->alloc, wsi_conn); - return NULL; - } - - wsi_conn->has_dri3 = dri3_reply->present != 0; - wsi_conn->has_present = pres_reply->present != 0; - - free(dri3_reply); - free(pres_reply); - - return wsi_conn; -} - -static void -wsi_x11_connection_destroy(struct anv_physical_device *device, - struct wsi_x11_connection *conn) -{ - anv_free(&device->instance->alloc, conn); -} - -static struct wsi_x11_connection * -wsi_x11_get_connection(struct anv_physical_device *device, - xcb_connection_t *conn) -{ - struct wsi_x11 *wsi = - (struct wsi_x11 *)device->wsi[VK_ICD_WSI_PLATFORM_XCB]; - - pthread_mutex_lock(&wsi->mutex); - - struct hash_entry *entry = _mesa_hash_table_search(wsi->connections, conn); - if (!entry) { - /* We're about to make a bunch of blocking calls. Let's drop the - * mutex for now so we don't block up too badly. - */ - pthread_mutex_unlock(&wsi->mutex); - - struct wsi_x11_connection *wsi_conn = - wsi_x11_connection_create(device, conn); - - pthread_mutex_lock(&wsi->mutex); - - entry = _mesa_hash_table_search(wsi->connections, conn); - if (entry) { - /* Oops, someone raced us to it */ - wsi_x11_connection_destroy(device, wsi_conn); - } else { - entry = _mesa_hash_table_insert(wsi->connections, conn, wsi_conn); - } - } - - pthread_mutex_unlock(&wsi->mutex); - - return entry->data; -} - -static const VkSurfaceFormatKHR formats[] = { - { .format = VK_FORMAT_B8G8R8A8_SRGB, }, -}; - -static const VkPresentModeKHR present_modes[] = { - VK_PRESENT_MODE_MAILBOX_KHR, -}; - -static xcb_screen_t * -get_screen_for_root(xcb_connection_t *conn, xcb_window_t root) -{ - xcb_screen_iterator_t screen_iter = - xcb_setup_roots_iterator(xcb_get_setup(conn)); - - for (; screen_iter.rem; xcb_screen_next (&screen_iter)) { - if (screen_iter.data->root == root) - return screen_iter.data; - } - - return NULL; -} - -static xcb_visualtype_t * -screen_get_visualtype(xcb_screen_t *screen, xcb_visualid_t visual_id, - unsigned *depth) -{ - xcb_depth_iterator_t depth_iter = - xcb_screen_allowed_depths_iterator(screen); - - for (; depth_iter.rem; xcb_depth_next (&depth_iter)) { - xcb_visualtype_iterator_t visual_iter = - xcb_depth_visuals_iterator (depth_iter.data); - - for (; visual_iter.rem; xcb_visualtype_next (&visual_iter)) { - if (visual_iter.data->visual_id == visual_id) { - if (depth) - *depth = depth_iter.data->depth; - return visual_iter.data; - } - } - } - - return NULL; -} - -static xcb_visualtype_t * -connection_get_visualtype(xcb_connection_t *conn, xcb_visualid_t visual_id, - unsigned *depth) -{ - xcb_screen_iterator_t screen_iter = - xcb_setup_roots_iterator(xcb_get_setup(conn)); - - /* For this we have to iterate over all of the screens which is rather - * annoying. Fortunately, there is probably only 1. - */ - for (; screen_iter.rem; xcb_screen_next (&screen_iter)) { - xcb_visualtype_t *visual = screen_get_visualtype(screen_iter.data, - visual_id, depth); - if (visual) - return visual; - } - - return NULL; -} - -static xcb_visualtype_t * -get_visualtype_for_window(xcb_connection_t *conn, xcb_window_t window, - unsigned *depth) -{ - xcb_query_tree_cookie_t tree_cookie; - xcb_get_window_attributes_cookie_t attrib_cookie; - xcb_query_tree_reply_t *tree; - xcb_get_window_attributes_reply_t *attrib; - - tree_cookie = xcb_query_tree(conn, window); - attrib_cookie = xcb_get_window_attributes(conn, window); - - tree = xcb_query_tree_reply(conn, tree_cookie, NULL); - attrib = xcb_get_window_attributes_reply(conn, attrib_cookie, NULL); - if (attrib == NULL || tree == NULL) { - free(attrib); - free(tree); - return NULL; - } - - xcb_window_t root = tree->root; - xcb_visualid_t visual_id = attrib->visual; - free(attrib); - free(tree); - - xcb_screen_t *screen = get_screen_for_root(conn, root); - if (screen == NULL) - return NULL; - - return screen_get_visualtype(screen, visual_id, depth); -} - -static bool -visual_has_alpha(xcb_visualtype_t *visual, unsigned depth) -{ - uint32_t rgb_mask = visual->red_mask | - visual->green_mask | - visual->blue_mask; - - uint32_t all_mask = 0xffffffff >> (32 - depth); - - /* Do we have bits left over after RGB? */ - return (all_mask & ~rgb_mask) != 0; -} +#include "wsi_common_x11.h" +#include "anv_private.h" VkBool32 anv_GetPhysicalDeviceXcbPresentationSupportKHR( VkPhysicalDevice physicalDevice, @@ -238,162 +38,26 @@ { ANV_FROM_HANDLE(anv_physical_device, device, physicalDevice); - struct wsi_x11_connection *wsi_conn = - wsi_x11_get_connection(device, connection); - - if (!wsi_conn->has_dri3) { - fprintf(stderr, "vulkan: No DRI3 support\n"); - return false; - } - - unsigned visual_depth; - if (!connection_get_visualtype(connection, visual_id, &visual_depth)) - return false; - - if (visual_depth != 24 && visual_depth != 32) - return false; - - return true; + return wsi_get_physical_device_xcb_presentation_support( + &device->wsi_device, + &device->instance->alloc, + queueFamilyIndex, connection, visual_id); } -static VkResult -x11_surface_get_support(VkIcdSurfaceBase *icd_surface, - struct anv_physical_device *device, - uint32_t queueFamilyIndex, - VkBool32* pSupported) -{ - VkIcdSurfaceXcb *surface = (VkIcdSurfaceXcb *)icd_surface; - - struct wsi_x11_connection *wsi_conn = - wsi_x11_get_connection(device, surface->connection); - if (!wsi_conn) - return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); - - if (!wsi_conn->has_dri3) { - fprintf(stderr, "vulkan: No DRI3 support\n"); - *pSupported = false; - return VK_SUCCESS; - } - - unsigned visual_depth; - if (!get_visualtype_for_window(surface->connection, surface->window, - &visual_depth)) { - *pSupported = false; - return VK_SUCCESS; - } - - if (visual_depth != 24 && visual_depth != 32) { - *pSupported = false; - return VK_SUCCESS; - } - - *pSupported = true; - return VK_SUCCESS; -} - -static VkResult -x11_surface_get_capabilities(VkIcdSurfaceBase *icd_surface, - struct anv_physical_device *device, - VkSurfaceCapabilitiesKHR *caps) -{ - VkIcdSurfaceXcb *surface = (VkIcdSurfaceXcb *)icd_surface; - xcb_get_geometry_cookie_t geom_cookie; - xcb_generic_error_t *err; - xcb_get_geometry_reply_t *geom; - unsigned visual_depth; - - geom_cookie = xcb_get_geometry(surface->connection, surface->window); - - /* This does a round-trip. This is why we do get_geometry first and - * wait to read the reply until after we have a visual. - */ - xcb_visualtype_t *visual = - get_visualtype_for_window(surface->connection, surface->window, - &visual_depth); - - geom = xcb_get_geometry_reply(surface->connection, geom_cookie, &err); - if (geom) { - VkExtent2D extent = { geom->width, geom->height }; - caps->currentExtent = extent; - caps->minImageExtent = extent; - caps->maxImageExtent = extent; - } else { - /* This can happen if the client didn't wait for the configure event - * to come back from the compositor. In that case, we don't know the - * size of the window so we just return valid "I don't know" stuff. - */ - caps->currentExtent = (VkExtent2D) { -1, -1 }; - caps->minImageExtent = (VkExtent2D) { 1, 1 }; - caps->maxImageExtent = (VkExtent2D) { INT16_MAX, INT16_MAX }; - } - free(err); - free(geom); - - if (visual_has_alpha(visual, visual_depth)) { - caps->supportedCompositeAlpha = VK_COMPOSITE_ALPHA_INHERIT_BIT_KHR | - VK_COMPOSITE_ALPHA_PRE_MULTIPLIED_BIT_KHR; - } else { - caps->supportedCompositeAlpha = VK_COMPOSITE_ALPHA_INHERIT_BIT_KHR | - VK_COMPOSITE_ALPHA_OPAQUE_BIT_KHR; - } - - caps->minImageCount = 2; - caps->maxImageCount = 4; - caps->supportedTransforms = VK_SURFACE_TRANSFORM_IDENTITY_BIT_KHR; - caps->currentTransform = VK_SURFACE_TRANSFORM_IDENTITY_BIT_KHR; - caps->maxImageArrayLayers = 1; - caps->supportedUsageFlags = - VK_IMAGE_USAGE_TRANSFER_SRC_BIT | - VK_IMAGE_USAGE_SAMPLED_BIT | - VK_IMAGE_USAGE_TRANSFER_DST_BIT | - VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT; - - return VK_SUCCESS; -} - -static VkResult -x11_surface_get_formats(VkIcdSurfaceBase *surface, - struct anv_physical_device *device, - uint32_t *pSurfaceFormatCount, - VkSurfaceFormatKHR *pSurfaceFormats) -{ - if (pSurfaceFormats == NULL) { - *pSurfaceFormatCount = ARRAY_SIZE(formats); - return VK_SUCCESS; - } - - assert(*pSurfaceFormatCount >= ARRAY_SIZE(formats)); - typed_memcpy(pSurfaceFormats, formats, *pSurfaceFormatCount); - *pSurfaceFormatCount = ARRAY_SIZE(formats); - - return VK_SUCCESS; -} - -static VkResult -x11_surface_get_present_modes(VkIcdSurfaceBase *surface, - struct anv_physical_device *device, - uint32_t *pPresentModeCount, - VkPresentModeKHR *pPresentModes) +VkBool32 anv_GetPhysicalDeviceXlibPresentationSupportKHR( + VkPhysicalDevice physicalDevice, + uint32_t queueFamilyIndex, + Display* dpy, + VisualID visualID) { - if (pPresentModes == NULL) { - *pPresentModeCount = ARRAY_SIZE(present_modes); - return VK_SUCCESS; - } - - assert(*pPresentModeCount >= ARRAY_SIZE(present_modes)); - typed_memcpy(pPresentModes, present_modes, *pPresentModeCount); - *pPresentModeCount = ARRAY_SIZE(present_modes); + ANV_FROM_HANDLE(anv_physical_device, device, physicalDevice); - return VK_SUCCESS; + return wsi_get_physical_device_xcb_presentation_support( + &device->wsi_device, + &device->instance->alloc, + queueFamilyIndex, XGetXCBConnection(dpy), visualID); } -static VkResult -x11_surface_create_swapchain(VkIcdSurfaceBase *surface, - struct anv_device *device, - const VkSwapchainCreateInfoKHR* pCreateInfo, - const VkAllocationCallbacks* pAllocator, - struct anv_swapchain **swapchain); - VkResult anv_CreateXcbSurfaceKHR( VkInstance _instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, @@ -401,509 +65,32 @@ VkSurfaceKHR* pSurface) { ANV_FROM_HANDLE(anv_instance, instance, _instance); - + const VkAllocationCallbacks *alloc; assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_XCB_SURFACE_CREATE_INFO_KHR); - VkIcdSurfaceXcb *surface; - - surface = anv_alloc2(&instance->alloc, pAllocator, sizeof *surface, 8, - VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); - if (surface == NULL) - return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); - - surface->base.platform = VK_ICD_WSI_PLATFORM_XCB; - surface->connection = pCreateInfo->connection; - surface->window = pCreateInfo->window; - - *pSurface = _VkIcdSurfaceBase_to_handle(&surface->base); - - return VK_SUCCESS; -} - -struct x11_image { - struct anv_image * image; - struct anv_device_memory * memory; - xcb_pixmap_t pixmap; - bool busy; - struct xshmfence * shm_fence; - uint32_t sync_fence; -}; - -struct x11_swapchain { - struct anv_swapchain base; - - xcb_connection_t * conn; - xcb_window_t window; - xcb_gc_t gc; - VkExtent2D extent; - uint32_t image_count; - - xcb_present_event_t event_id; - xcb_special_event_t * special_event; - uint64_t send_sbc; - uint32_t stamp; - - struct x11_image images[0]; -}; - -static VkResult -x11_get_images(struct anv_swapchain *anv_chain, - uint32_t* pCount, VkImage *pSwapchainImages) -{ - struct x11_swapchain *chain = (struct x11_swapchain *)anv_chain; - - if (pSwapchainImages == NULL) { - *pCount = chain->image_count; - return VK_SUCCESS; - } - - assert(chain->image_count <= *pCount); - for (uint32_t i = 0; i < chain->image_count; i++) - pSwapchainImages[i] = anv_image_to_handle(chain->images[i].image); - - *pCount = chain->image_count; - - return VK_SUCCESS; -} - -static VkResult -x11_handle_dri3_present_event(struct x11_swapchain *chain, - xcb_present_generic_event_t *event) -{ - switch (event->evtype) { - case XCB_PRESENT_CONFIGURE_NOTIFY: { - xcb_present_configure_notify_event_t *config = (void *) event; - - if (config->width != chain->extent.width || - config->height != chain->extent.height) - return vk_error(VK_ERROR_OUT_OF_DATE_KHR); - - break; - } - - case XCB_PRESENT_EVENT_IDLE_NOTIFY: { - xcb_present_idle_notify_event_t *idle = (void *) event; - - for (unsigned i = 0; i < chain->image_count; i++) { - if (chain->images[i].pixmap == idle->pixmap) { - chain->images[i].busy = false; - break; - } - } - - break; - } - - case XCB_PRESENT_COMPLETE_NOTIFY: - default: - break; - } - - return VK_SUCCESS; -} - -static VkResult -x11_acquire_next_image(struct anv_swapchain *anv_chain, - uint64_t timeout, - VkSemaphore semaphore, - uint32_t *image_index) -{ - struct x11_swapchain *chain = (struct x11_swapchain *)anv_chain; - - while (1) { - for (uint32_t i = 0; i < chain->image_count; i++) { - if (!chain->images[i].busy) { - /* We found a non-busy image */ - xshmfence_await(chain->images[i].shm_fence); - *image_index = i; - chain->images[i].busy = true; - return VK_SUCCESS; - } - } - - xcb_flush(chain->conn); - xcb_generic_event_t *event = - xcb_wait_for_special_event(chain->conn, chain->special_event); - if (!event) - return vk_error(VK_ERROR_OUT_OF_DATE_KHR); - - VkResult result = x11_handle_dri3_present_event(chain, (void *)event); - free(event); - if (result != VK_SUCCESS) - return result; - } -} - -static VkResult -x11_queue_present(struct anv_swapchain *anv_chain, - struct anv_queue *queue, - uint32_t image_index) -{ - struct x11_swapchain *chain = (struct x11_swapchain *)anv_chain; - struct x11_image *image = &chain->images[image_index]; - - assert(image_index < chain->image_count); - - uint32_t options = XCB_PRESENT_OPTION_NONE; - - int64_t target_msc = 0; - int64_t divisor = 0; - int64_t remainder = 0; - - options |= XCB_PRESENT_OPTION_ASYNC; - - xshmfence_reset(image->shm_fence); - - ++chain->send_sbc; - xcb_void_cookie_t cookie = - xcb_present_pixmap(chain->conn, - chain->window, - image->pixmap, - (uint32_t) chain->send_sbc, - 0, /* valid */ - 0, /* update */ - 0, /* x_off */ - 0, /* y_off */ - XCB_NONE, /* target_crtc */ - XCB_NONE, - image->sync_fence, - options, - target_msc, - divisor, - remainder, 0, NULL); - xcb_discard_reply(chain->conn, cookie.sequence); - image->busy = true; - - xcb_flush(chain->conn); - - return VK_SUCCESS; -} - -static VkResult -x11_image_init(struct anv_device *device, struct x11_swapchain *chain, - const VkSwapchainCreateInfoKHR *pCreateInfo, - const VkAllocationCallbacks* pAllocator, - struct x11_image *image) -{ - xcb_void_cookie_t cookie; - VkResult result; - - VkImage image_h; - result = anv_image_create(anv_device_to_handle(device), - &(struct anv_image_create_info) { - .isl_tiling_flags = ISL_TILING_X_BIT, - .stride = 0, - .vk_info = - &(VkImageCreateInfo) { - .sType = VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO, - .imageType = VK_IMAGE_TYPE_2D, - .format = pCreateInfo->imageFormat, - .extent = { - .width = pCreateInfo->imageExtent.width, - .height = pCreateInfo->imageExtent.height, - .depth = 1 - }, - .mipLevels = 1, - .arrayLayers = 1, - .samples = 1, - /* FIXME: Need a way to use X tiling to allow scanout */ - .tiling = VK_IMAGE_TILING_OPTIMAL, - .usage = (pCreateInfo->imageUsage | - VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT), - .flags = 0, - }}, - NULL, - &image_h); - if (result != VK_SUCCESS) - return result; - - image->image = anv_image_from_handle(image_h); - assert(vk_format_is_color(image->image->vk_format)); - - VkDeviceMemory memory_h; - result = anv_AllocateMemory(anv_device_to_handle(device), - &(VkMemoryAllocateInfo) { - .sType = VK_STRUCTURE_TYPE_MEMORY_ALLOCATE_INFO, - .allocationSize = image->image->size, - .memoryTypeIndex = 0, - }, - NULL /* XXX: pAllocator */, - &memory_h); - if (result != VK_SUCCESS) - goto fail_create_image; - - image->memory = anv_device_memory_from_handle(memory_h); - image->memory->bo.is_winsys_bo = true; - - anv_BindImageMemory(VK_NULL_HANDLE, image_h, memory_h, 0); - - struct anv_surface *surface = &image->image->color_surface; - assert(surface->isl.tiling == ISL_TILING_X); - - int ret = anv_gem_set_tiling(device, image->memory->bo.gem_handle, - surface->isl.row_pitch, I915_TILING_X); - if (ret) { - /* FINISHME: Choose a better error. */ - result = vk_errorf(VK_ERROR_OUT_OF_DEVICE_MEMORY, - "set_tiling failed: %m"); - goto fail_alloc_memory; - } - - int fd = anv_gem_handle_to_fd(device, image->memory->bo.gem_handle); - if (fd == -1) { - /* FINISHME: Choose a better error. */ - result = vk_errorf(VK_ERROR_OUT_OF_DEVICE_MEMORY, - "handle_to_fd failed: %m"); - goto fail_alloc_memory; - } - - uint32_t bpp = 32; - uint32_t depth = 24; - image->pixmap = xcb_generate_id(chain->conn); - - cookie = - xcb_dri3_pixmap_from_buffer_checked(chain->conn, - image->pixmap, - chain->window, - image->image->size, - pCreateInfo->imageExtent.width, - pCreateInfo->imageExtent.height, - surface->isl.row_pitch, - depth, bpp, fd); - xcb_discard_reply(chain->conn, cookie.sequence); - - int fence_fd = xshmfence_alloc_shm(); - if (fence_fd < 0) - goto fail_pixmap; - - image->shm_fence = xshmfence_map_shm(fence_fd); - if (image->shm_fence == NULL) - goto fail_shmfence_alloc; - - image->sync_fence = xcb_generate_id(chain->conn); - xcb_dri3_fence_from_fd(chain->conn, - image->pixmap, - image->sync_fence, - false, - fence_fd); - - image->busy = false; - xshmfence_trigger(image->shm_fence); - - return VK_SUCCESS; - -fail_shmfence_alloc: - close(fence_fd); - -fail_pixmap: - cookie = xcb_free_pixmap(chain->conn, image->pixmap); - xcb_discard_reply(chain->conn, cookie.sequence); - -fail_alloc_memory: - anv_FreeMemory(anv_device_to_handle(chain->base.device), - anv_device_memory_to_handle(image->memory), pAllocator); - -fail_create_image: - anv_DestroyImage(anv_device_to_handle(chain->base.device), - anv_image_to_handle(image->image), pAllocator); - - return result; -} - -static void -x11_image_finish(struct x11_swapchain *chain, - const VkAllocationCallbacks* pAllocator, - struct x11_image *image) -{ - xcb_void_cookie_t cookie; - - cookie = xcb_sync_destroy_fence(chain->conn, image->sync_fence); - xcb_discard_reply(chain->conn, cookie.sequence); - xshmfence_unmap_shm(image->shm_fence); - - cookie = xcb_free_pixmap(chain->conn, image->pixmap); - xcb_discard_reply(chain->conn, cookie.sequence); - - anv_DestroyImage(anv_device_to_handle(chain->base.device), - anv_image_to_handle(image->image), pAllocator); - - anv_FreeMemory(anv_device_to_handle(chain->base.device), - anv_device_memory_to_handle(image->memory), pAllocator); -} - -static VkResult -x11_swapchain_destroy(struct anv_swapchain *anv_chain, - const VkAllocationCallbacks *pAllocator) -{ - struct x11_swapchain *chain = (struct x11_swapchain *)anv_chain; - - for (uint32_t i = 0; i < chain->image_count; i++) - x11_image_finish(chain, pAllocator, &chain->images[i]); - - xcb_unregister_for_special_event(chain->conn, chain->special_event); - - anv_free2(&chain->base.device->alloc, pAllocator, chain); + if (pAllocator) + alloc = pAllocator; + else + alloc = &instance->alloc; - return VK_SUCCESS; + return wsi_create_xcb_surface(alloc, pCreateInfo, pSurface); } -static VkResult -x11_surface_create_swapchain(VkIcdSurfaceBase *icd_surface, - struct anv_device *device, - const VkSwapchainCreateInfoKHR *pCreateInfo, - const VkAllocationCallbacks* pAllocator, - struct anv_swapchain **swapchain_out) -{ - VkIcdSurfaceXcb *surface = (VkIcdSurfaceXcb *)icd_surface; - struct x11_swapchain *chain; - xcb_void_cookie_t cookie; - VkResult result; - - assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SWAPCHAIN_CREATE_INFO_KHR); - - int num_images = pCreateInfo->minImageCount; - - /* For true mailbox mode, we need at least 4 images: - * 1) One to scan out from - * 2) One to have queued for scan-out - * 3) One to be currently held by the Wayland compositor - * 4) One to render to - */ - if (pCreateInfo->presentMode == VK_PRESENT_MODE_MAILBOX_KHR) - num_images = MAX2(num_images, 4); - - size_t size = sizeof(*chain) + num_images * sizeof(chain->images[0]); - chain = anv_alloc2(&device->alloc, pAllocator, size, 8, - VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); - if (chain == NULL) - return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); - - chain->base.device = device; - chain->base.destroy = x11_swapchain_destroy; - chain->base.get_images = x11_get_images; - chain->base.acquire_next_image = x11_acquire_next_image; - chain->base.queue_present = x11_queue_present; - - chain->conn = surface->connection; - chain->window = surface->window; - chain->extent = pCreateInfo->imageExtent; - chain->image_count = num_images; - chain->send_sbc = 0; - - chain->event_id = xcb_generate_id(chain->conn); - xcb_present_select_input(chain->conn, chain->event_id, chain->window, - XCB_PRESENT_EVENT_MASK_CONFIGURE_NOTIFY | - XCB_PRESENT_EVENT_MASK_COMPLETE_NOTIFY | - XCB_PRESENT_EVENT_MASK_IDLE_NOTIFY); - - /* Create an XCB event queue to hold present events outside of the usual - * application event queue - */ - chain->special_event = - xcb_register_for_special_xge(chain->conn, &xcb_present_id, - chain->event_id, NULL); - - chain->gc = xcb_generate_id(chain->conn); - if (!chain->gc) { - /* FINISHME: Choose a better error. */ - result = vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); - goto fail_register; - } - - cookie = xcb_create_gc(chain->conn, - chain->gc, - chain->window, - XCB_GC_GRAPHICS_EXPOSURES, - (uint32_t []) { 0 }); - xcb_discard_reply(chain->conn, cookie.sequence); - - uint32_t image = 0; - for (; image < chain->image_count; image++) { - result = x11_image_init(device, chain, pCreateInfo, pAllocator, - &chain->images[image]); - if (result != VK_SUCCESS) - goto fail_init_images; - } - - *swapchain_out = &chain->base; - - return VK_SUCCESS; - -fail_init_images: - for (uint32_t j = 0; j < image; j++) - x11_image_finish(chain, pAllocator, &chain->images[j]); - -fail_register: - xcb_unregister_for_special_event(chain->conn, chain->special_event); - - anv_free2(&device->alloc, pAllocator, chain); - - return result; -} - -VkResult -anv_x11_init_wsi(struct anv_physical_device *device) -{ - struct wsi_x11 *wsi; - VkResult result; - - wsi = anv_alloc(&device->instance->alloc, sizeof(*wsi), 8, - VK_SYSTEM_ALLOCATION_SCOPE_INSTANCE); - if (!wsi) { - result = vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); - goto fail; - } - - int ret = pthread_mutex_init(&wsi->mutex, NULL); - if (ret != 0) { - if (ret == ENOMEM) { - result = vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); - } else { - /* FINISHME: Choose a better error. */ - result = vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); - } - - goto fail_alloc; - } - - wsi->connections = _mesa_hash_table_create(NULL, _mesa_hash_pointer, - _mesa_key_pointer_equal); - if (!wsi->connections) { - result = vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); - goto fail_mutex; - } - - wsi->base.get_support = x11_surface_get_support; - wsi->base.get_capabilities = x11_surface_get_capabilities; - wsi->base.get_formats = x11_surface_get_formats; - wsi->base.get_present_modes = x11_surface_get_present_modes; - wsi->base.create_swapchain = x11_surface_create_swapchain; - - device->wsi[VK_ICD_WSI_PLATFORM_XCB] = &wsi->base; - - return VK_SUCCESS; - -fail_mutex: - pthread_mutex_destroy(&wsi->mutex); -fail_alloc: - anv_free(&device->instance->alloc, wsi); -fail: - device->wsi[VK_ICD_WSI_PLATFORM_XCB] = NULL; - - return result; -} - -void -anv_x11_finish_wsi(struct anv_physical_device *device) +VkResult anv_CreateXlibSurfaceKHR( + VkInstance _instance, + const VkXlibSurfaceCreateInfoKHR* pCreateInfo, + const VkAllocationCallbacks* pAllocator, + VkSurfaceKHR* pSurface) { - struct wsi_x11 *wsi = - (struct wsi_x11 *)device->wsi[VK_ICD_WSI_PLATFORM_XCB]; + ANV_FROM_HANDLE(anv_instance, instance, _instance); + const VkAllocationCallbacks *alloc; - if (wsi) { - _mesa_hash_table_destroy(wsi->connections, NULL); + assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_XLIB_SURFACE_CREATE_INFO_KHR); - pthread_mutex_destroy(&wsi->mutex); + if (pAllocator) + alloc = pAllocator; + else + alloc = &instance->alloc; - anv_free(&device->instance->alloc, wsi); - } + return wsi_create_xlib_surface(alloc, pCreateInfo, pSurface); } diff -Nru mesa-12.0.6/src/intel/vulkan/gen7_cmd_buffer.c mesa-17.0.7/src/intel/vulkan/gen7_cmd_buffer.c --- mesa-12.0.6/src/intel/vulkan/gen7_cmd_buffer.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/gen7_cmd_buffer.c 2017-06-01 10:37:10.000000000 +0000 @@ -28,6 +28,7 @@ #include #include "anv_private.h" +#include "vk_format_info.h" #include "genxml/gen_macros.h" #include "genxml/genX_pack.h" @@ -121,92 +122,34 @@ cmd_buffer->state.gen7.index_offset = offset; } -static VkResult -flush_compute_descriptor_set(struct anv_cmd_buffer *cmd_buffer) +static uint32_t +get_depth_format(struct anv_cmd_buffer *cmd_buffer) { - struct anv_device *device = cmd_buffer->device; - struct anv_pipeline *pipeline = cmd_buffer->state.compute_pipeline; - struct anv_state surfaces = { 0, }, samplers = { 0, }; - VkResult result; - - result = anv_cmd_buffer_emit_samplers(cmd_buffer, - MESA_SHADER_COMPUTE, &samplers); - if (result != VK_SUCCESS) - return result; - result = anv_cmd_buffer_emit_binding_table(cmd_buffer, - MESA_SHADER_COMPUTE, &surfaces); - if (result != VK_SUCCESS) - return result; - - struct anv_state push_state = anv_cmd_buffer_cs_push_constants(cmd_buffer); - - const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline); - const struct brw_stage_prog_data *prog_data = &cs_prog_data->base; - - if (push_state.alloc_size) { - anv_batch_emit(&cmd_buffer->batch, GENX(MEDIA_CURBE_LOAD), curbe) { - curbe.CURBETotalDataLength = push_state.alloc_size; - curbe.CURBEDataStartAddress = push_state.offset; - } - } - - const uint32_t slm_size = encode_slm_size(GEN_GEN, prog_data->total_shared); - - struct anv_state state = - anv_state_pool_emit(&device->dynamic_state_pool, - GENX(INTERFACE_DESCRIPTOR_DATA), 64, - .KernelStartPointer = pipeline->cs_simd, - .BindingTablePointer = surfaces.offset, - .SamplerStatePointer = samplers.offset, - .ConstantURBEntryReadLength = - cs_prog_data->push.per_thread.regs, -#if GEN_IS_HASWELL - .CrossThreadConstantDataReadLength = - cs_prog_data->push.cross_thread.regs, -#else - .ConstantURBEntryReadOffset = 0, -#endif - .BarrierEnable = cs_prog_data->uses_barrier, - .SharedLocalMemorySize = slm_size, - .NumberofThreadsinGPGPUThreadGroup = - cs_prog_data->threads); - - const uint32_t size = GENX(INTERFACE_DESCRIPTOR_DATA_length) * sizeof(uint32_t); - anv_batch_emit(&cmd_buffer->batch, - GENX(MEDIA_INTERFACE_DESCRIPTOR_LOAD), idl) { - idl.InterfaceDescriptorTotalLength = size; - idl.InterfaceDescriptorDataStartAddress = state.offset; - } + const struct anv_render_pass *pass = cmd_buffer->state.pass; + const struct anv_subpass *subpass = cmd_buffer->state.subpass; - return VK_SUCCESS; -} - -void -genX(cmd_buffer_flush_compute_state)(struct anv_cmd_buffer *cmd_buffer) -{ - struct anv_pipeline *pipeline = cmd_buffer->state.compute_pipeline; - MAYBE_UNUSED VkResult result; + if (subpass->depth_stencil_attachment >= pass->attachment_count) + return D16_UNORM; - assert(pipeline->active_stages == VK_SHADER_STAGE_COMPUTE_BIT); + struct anv_render_pass_attachment *att = + &pass->attachments[subpass->depth_stencil_attachment]; - genX(cmd_buffer_config_l3)(cmd_buffer, pipeline); + switch (att->format) { + case VK_FORMAT_D16_UNORM: + case VK_FORMAT_D16_UNORM_S8_UINT: + return D16_UNORM; - genX(flush_pipeline_select_gpgpu)(cmd_buffer); + case VK_FORMAT_X8_D24_UNORM_PACK32: + case VK_FORMAT_D24_UNORM_S8_UINT: + return D24_UNORM_X8_UINT; - if (cmd_buffer->state.compute_dirty & ANV_CMD_DIRTY_PIPELINE) - anv_batch_emit_batch(&cmd_buffer->batch, &pipeline->batch); + case VK_FORMAT_D32_SFLOAT: + case VK_FORMAT_D32_SFLOAT_S8_UINT: + return D32_FLOAT; - if ((cmd_buffer->state.descriptors_dirty & VK_SHADER_STAGE_COMPUTE_BIT) || - (cmd_buffer->state.compute_dirty & ANV_CMD_DIRTY_PIPELINE)) { - /* FIXME: figure out descriptors for gen7 */ - result = flush_compute_descriptor_set(cmd_buffer); - assert(result == VK_SUCCESS); - cmd_buffer->state.descriptors_dirty &= ~VK_SHADER_STAGE_COMPUTE_BIT; + default: + return D16_UNORM; } - - cmd_buffer->state.compute_dirty = 0; - - genX(cmd_buffer_apply_pipe_flushes)(cmd_buffer); } void @@ -218,20 +161,10 @@ ANV_CMD_DIRTY_RENDER_TARGETS | ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH | ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS)) { - - const struct anv_image_view *iview = - anv_cmd_buffer_get_depth_stencil_view(cmd_buffer); - const struct anv_image *image = iview ? iview->image : NULL; - const bool has_depth = - image && (image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT); - const uint32_t depth_format = has_depth ? - isl_surf_get_depth_format(&cmd_buffer->device->isl_dev, - &image->depth_surface.isl) : D16_UNORM; - uint32_t sf_dw[GENX(3DSTATE_SF_length)]; struct GENX(3DSTATE_SF) sf = { GENX(3DSTATE_SF_header), - .DepthBufferSurfaceFormat = depth_format, + .DepthBufferSurfaceFormat = get_depth_format(cmd_buffer), .LineWidth = cmd_buffer->state.dynamic.line_width, .GlobalDepthOffsetConstant = cmd_buffer->state.dynamic.depth_bias.bias, .GlobalDepthOffsetScale = cmd_buffer->state.dynamic.depth_bias.slope, diff -Nru mesa-12.0.6/src/intel/vulkan/gen7_pipeline.c mesa-17.0.7/src/intel/vulkan/gen7_pipeline.c --- mesa-12.0.6/src/intel/vulkan/gen7_pipeline.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/gen7_pipeline.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,321 +0,0 @@ -/* - * Copyright © 2015 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - -#include -#include -#include -#include -#include - -#include "anv_private.h" - -#include "genxml/gen_macros.h" -#include "genxml/genX_pack.h" - -#include "genX_pipeline_util.h" - -static void -gen7_emit_rs_state(struct anv_pipeline *pipeline, - const VkPipelineRasterizationStateCreateInfo *info, - const struct anv_graphics_pipeline_create_info *extra) -{ - struct GENX(3DSTATE_SF) sf = { - GENX(3DSTATE_SF_header), - - /* LegacyGlobalDepthBiasEnable */ - - .StatisticsEnable = true, - .FrontFaceFillMode = vk_to_gen_fillmode[info->polygonMode], - .BackFaceFillMode = vk_to_gen_fillmode[info->polygonMode], - .ViewTransformEnable = !(extra && extra->use_rectlist), - .FrontWinding = vk_to_gen_front_face[info->frontFace], - /* bool AntiAliasingEnable; */ - - .CullMode = vk_to_gen_cullmode[info->cullMode], - - /* uint32_t LineEndCapAntialiasingRegionWidth; */ - .ScissorRectangleEnable = !(extra && extra->use_rectlist), - - /* uint32_t MultisampleRasterizationMode; */ - /* bool LastPixelEnable; */ - - .TriangleStripListProvokingVertexSelect = 0, - .LineStripListProvokingVertexSelect = 0, - .TriangleFanProvokingVertexSelect = 1, - - /* uint32_t AALineDistanceMode; */ - /* uint32_t VertexSubPixelPrecisionSelect; */ - .UsePointWidthState = false, - .PointWidth = 1.0, - .GlobalDepthOffsetEnableSolid = info->depthBiasEnable, - .GlobalDepthOffsetEnableWireframe = info->depthBiasEnable, - .GlobalDepthOffsetEnablePoint = info->depthBiasEnable, - }; - - GENX(3DSTATE_SF_pack)(NULL, &pipeline->gen7.sf, &sf); -} - -VkResult -genX(graphics_pipeline_create)( - VkDevice _device, - struct anv_pipeline_cache * cache, - const VkGraphicsPipelineCreateInfo* pCreateInfo, - const struct anv_graphics_pipeline_create_info *extra, - const VkAllocationCallbacks* pAllocator, - VkPipeline* pPipeline) -{ - ANV_FROM_HANDLE(anv_device, device, _device); - ANV_FROM_HANDLE(anv_render_pass, pass, pCreateInfo->renderPass); - struct anv_subpass *subpass = &pass->subpasses[pCreateInfo->subpass]; - struct anv_pipeline *pipeline; - VkResult result; - - assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO); - - pipeline = anv_alloc2(&device->alloc, pAllocator, sizeof(*pipeline), 8, - VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); - if (pipeline == NULL) - return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); - - result = anv_pipeline_init(pipeline, device, cache, - pCreateInfo, extra, pAllocator); - if (result != VK_SUCCESS) { - anv_free2(&device->alloc, pAllocator, pipeline); - return result; - } - - assert(pCreateInfo->pVertexInputState); - emit_vertex_input(pipeline, pCreateInfo->pVertexInputState, extra); - - assert(pCreateInfo->pRasterizationState); - gen7_emit_rs_state(pipeline, pCreateInfo->pRasterizationState, extra); - - emit_ds_state(pipeline, pCreateInfo->pDepthStencilState, pass, subpass); - - emit_cb_state(pipeline, pCreateInfo->pColorBlendState, - pCreateInfo->pMultisampleState); - - emit_urb_setup(pipeline); - - emit_3dstate_clip(pipeline, pCreateInfo->pViewportState, - pCreateInfo->pRasterizationState, extra); - - if (pCreateInfo->pMultisampleState && - pCreateInfo->pMultisampleState->rasterizationSamples > 1) - anv_finishme("VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO"); - - uint32_t samples = 1; - uint32_t log2_samples = __builtin_ffs(samples) - 1; - - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_MULTISAMPLE), ms) { - ms.PixelLocation = PIXLOC_CENTER; - ms.NumberofMultisamples = log2_samples; - } - - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_SAMPLE_MASK), sm) { - sm.SampleMask = 0xff; - } - - const struct brw_vs_prog_data *vs_prog_data = get_vs_prog_data(pipeline); - -#if 0 - /* From gen7_vs_state.c */ - - /** - * From Graphics BSpec: 3D-Media-GPGPU Engine > 3D Pipeline Stages > - * Geometry > Geometry Shader > State: - * - * "Note: Because of corruption in IVB:GT2, software needs to flush the - * whole fixed function pipeline when the GS enable changes value in - * the 3DSTATE_GS." - * - * The hardware architects have clarified that in this context "flush the - * whole fixed function pipeline" means to emit a PIPE_CONTROL with the "CS - * Stall" bit set. - */ - if (!brw->is_haswell && !brw->is_baytrail) - gen7_emit_vs_workaround_flush(brw); -#endif - - if (pipeline->vs_vec4 == NO_KERNEL || (extra && extra->disable_vs)) - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_VS), vs); - else - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_VS), vs) { - vs.KernelStartPointer = pipeline->vs_vec4; - - vs.ScratchSpaceBasePointer = (struct anv_address) { - .bo = anv_scratch_pool_alloc(device, &device->scratch_pool, - MESA_SHADER_VERTEX, - vs_prog_data->base.base.total_scratch), - .offset = 0, - }; - vs.PerThreadScratchSpace = scratch_space(&vs_prog_data->base.base); - - vs.DispatchGRFStartRegisterforURBData = - vs_prog_data->base.base.dispatch_grf_start_reg; - - vs.VertexURBEntryReadLength = vs_prog_data->base.urb_read_length; - vs.VertexURBEntryReadOffset = 0; - vs.MaximumNumberofThreads = device->info.max_vs_threads - 1; - vs.StatisticsEnable = true; - vs.VSFunctionEnable = true; - } - - const struct brw_gs_prog_data *gs_prog_data = get_gs_prog_data(pipeline); - - if (pipeline->gs_kernel == NO_KERNEL || (extra && extra->disable_vs)) { - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_GS), gs); - } else { - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_GS), gs) { - gs.KernelStartPointer = pipeline->gs_kernel; - - gs.ScratchSpaceBasePointer = (struct anv_address) { - .bo = anv_scratch_pool_alloc(device, &device->scratch_pool, - MESA_SHADER_GEOMETRY, - gs_prog_data->base.base.total_scratch), - .offset = 0, - }; - gs.PerThreadScratchSpace = scratch_space(&gs_prog_data->base.base); - - gs.OutputVertexSize = gs_prog_data->output_vertex_size_hwords * 2 - 1; - gs.OutputTopology = gs_prog_data->output_topology; - gs.VertexURBEntryReadLength = gs_prog_data->base.urb_read_length; - gs.IncludeVertexHandles = gs_prog_data->base.include_vue_handles; - - gs.DispatchGRFStartRegisterforURBData = - gs_prog_data->base.base.dispatch_grf_start_reg; - - gs.MaximumNumberofThreads = device->info.max_gs_threads - 1; - /* This in the next dword on HSW. */ - gs.ControlDataFormat = gs_prog_data->control_data_format; - gs.ControlDataHeaderSize = gs_prog_data->control_data_header_size_hwords; - gs.InstanceControl = MAX2(gs_prog_data->invocations, 1) - 1; - gs.DispatchMode = gs_prog_data->base.dispatch_mode; - gs.GSStatisticsEnable = true; - gs.IncludePrimitiveID = gs_prog_data->include_primitive_id; -# if (GEN_IS_HASWELL) - gs.ReorderMode = REORDER_TRAILING; -# else - gs.ReorderEnable = true; -# endif - gs.GSEnable = true; - } - } - - if (pipeline->ps_ksp0 == NO_KERNEL) { - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_SBE), sbe); - - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_WM), wm) { - wm.StatisticsEnable = true; - wm.ThreadDispatchEnable = false; - wm.LineEndCapAntialiasingRegionWidth = 0; /* 0.5 pixels */ - wm.LineAntialiasingRegionWidth = 1; /* 1.0 pixels */ - wm.EarlyDepthStencilControl = EDSC_NORMAL; - wm.PointRasterizationRule = RASTRULE_UPPER_RIGHT; - } - - /* Even if no fragments are ever dispatched, the hardware hangs if we - * don't at least set the maximum number of threads. - */ - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_PS), ps) { - ps.MaximumNumberofThreads = device->info.max_wm_threads - 1; - } - } else { - const struct brw_wm_prog_data *wm_prog_data = get_wm_prog_data(pipeline); - if (wm_prog_data->urb_setup[VARYING_SLOT_BFC0] != -1 || - wm_prog_data->urb_setup[VARYING_SLOT_BFC1] != -1) - anv_finishme("two-sided color needs sbe swizzling setup"); - if (wm_prog_data->urb_setup[VARYING_SLOT_PRIMITIVE_ID] != -1) - anv_finishme("primitive_id needs sbe swizzling setup"); - - emit_3dstate_sbe(pipeline); - - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_PS), ps) { - ps.KernelStartPointer0 = pipeline->ps_ksp0; - - ps.ScratchSpaceBasePointer = (struct anv_address) { - .bo = anv_scratch_pool_alloc(device, &device->scratch_pool, - MESA_SHADER_FRAGMENT, - wm_prog_data->base.total_scratch), - .offset = 0, - }; - ps.PerThreadScratchSpace = scratch_space(&wm_prog_data->base); - ps.MaximumNumberofThreads = device->info.max_wm_threads - 1; - ps.PushConstantEnable = wm_prog_data->base.nr_params > 0; - ps.AttributeEnable = wm_prog_data->num_varying_inputs > 0; - ps.oMaskPresenttoRenderTarget = wm_prog_data->uses_omask; - - ps.RenderTargetFastClearEnable = false; - ps.DualSourceBlendEnable = false; - ps.RenderTargetResolveEnable = false; - - ps.PositionXYOffsetSelect = wm_prog_data->uses_pos_offset ? - POSOFFSET_SAMPLE : POSOFFSET_NONE; - - ps._32PixelDispatchEnable = false; - ps._16PixelDispatchEnable = wm_prog_data->dispatch_16; - ps._8PixelDispatchEnable = wm_prog_data->dispatch_8; - - ps.DispatchGRFStartRegisterforConstantSetupData0 = - wm_prog_data->base.dispatch_grf_start_reg, - ps.DispatchGRFStartRegisterforConstantSetupData1 = 0, - ps.DispatchGRFStartRegisterforConstantSetupData2 = - wm_prog_data->dispatch_grf_start_reg_2, - - /* Haswell requires the sample mask to be set in this packet as well as - * in 3DSTATE_SAMPLE_MASK; the values should match. */ - /* _NEW_BUFFERS, _NEW_MULTISAMPLE */ - - ps.KernelStartPointer1 = 0; - ps.KernelStartPointer2 = pipeline->ps_ksp0 + wm_prog_data->prog_offset_2; - } - - /* FIXME-GEN7: This needs a lot more work, cf gen7 upload_wm_state(). */ - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_WM), wm) { - wm.StatisticsEnable = true; - wm.ThreadDispatchEnable = true; - wm.LineEndCapAntialiasingRegionWidth = 0; /* 0.5 pixels */ - wm.LineAntialiasingRegionWidth = 1; /* 1.0 pixels */ - wm.PointRasterizationRule = RASTRULE_UPPER_RIGHT; - wm.PixelShaderKillPixel = wm_prog_data->uses_kill; - wm.PixelShaderComputedDepthMode = wm_prog_data->computed_depth_mode; - wm.PixelShaderUsesSourceDepth = wm_prog_data->uses_src_depth; - wm.PixelShaderUsesSourceW = wm_prog_data->uses_src_w; - wm.PixelShaderUsesInputCoverageMask = wm_prog_data->uses_sample_mask; - - if (wm_prog_data->early_fragment_tests) { - wm.EarlyDepthStencilControl = EDSC_PREPS; - } else if (wm_prog_data->has_side_effects) { - wm.EarlyDepthStencilControl = EDSC_PSEXEC; - } else { - wm.EarlyDepthStencilControl = EDSC_NORMAL; - } - - wm.BarycentricInterpolationMode = wm_prog_data->barycentric_interp_modes; - } - } - - *pPipeline = anv_pipeline_to_handle(pipeline); - - return VK_SUCCESS; -} diff -Nru mesa-12.0.6/src/intel/vulkan/gen8_cmd_buffer.c mesa-17.0.7/src/intel/vulkan/gen8_cmd_buffer.c --- mesa-12.0.6/src/intel/vulkan/gen8_cmd_buffer.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/gen8_cmd_buffer.c 2017-06-01 10:37:10.000000000 +0000 @@ -120,30 +120,40 @@ cmd_buffer->state.pipeline->gen8.sf); } -#include "genxml/gen9_pack.h" -static void -__emit_gen9_sf_state(struct anv_cmd_buffer *cmd_buffer) +void +gen9_emit_sf_state(struct anv_cmd_buffer *cmd_buffer); + +#if GEN_GEN == 9 + +void +gen9_emit_sf_state(struct anv_cmd_buffer *cmd_buffer) { - uint32_t sf_dw[GENX(3DSTATE_SF_length)]; - struct GEN9_3DSTATE_SF sf = { - GEN9_3DSTATE_SF_header, - .LineWidth = cmd_buffer->state.dynamic.line_width, - }; - GEN9_3DSTATE_SF_pack(NULL, sf_dw, &sf); - /* FIXME: gen9.fs */ - anv_batch_emit_merge(&cmd_buffer->batch, sf_dw, - cmd_buffer->state.pipeline->gen8.sf); + __emit_genx_sf_state(cmd_buffer); } +#endif + +#if GEN_GEN == 8 + static void __emit_sf_state(struct anv_cmd_buffer *cmd_buffer) { if (cmd_buffer->device->info.is_cherryview) - __emit_gen9_sf_state(cmd_buffer); + gen9_emit_sf_state(cmd_buffer); else __emit_genx_sf_state(cmd_buffer); } +#else + +static void +__emit_sf_state(struct anv_cmd_buffer *cmd_buffer) +{ + __emit_genx_sf_state(cmd_buffer); +} + +#endif + void genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer) { @@ -312,92 +322,24 @@ cmd_buffer->state.dirty |= ANV_CMD_DIRTY_INDEX_BUFFER; } -static VkResult -flush_compute_descriptor_set(struct anv_cmd_buffer *cmd_buffer) -{ - struct anv_device *device = cmd_buffer->device; - struct anv_pipeline *pipeline = cmd_buffer->state.compute_pipeline; - struct anv_state surfaces = { 0, }, samplers = { 0, }; - VkResult result; - - result = anv_cmd_buffer_emit_samplers(cmd_buffer, - MESA_SHADER_COMPUTE, &samplers); - if (result != VK_SUCCESS) - return result; - result = anv_cmd_buffer_emit_binding_table(cmd_buffer, - MESA_SHADER_COMPUTE, &surfaces); - if (result != VK_SUCCESS) - return result; - - struct anv_state push_state = anv_cmd_buffer_cs_push_constants(cmd_buffer); - - const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline); - const struct brw_stage_prog_data *prog_data = &cs_prog_data->base; - - if (push_state.alloc_size) { - anv_batch_emit(&cmd_buffer->batch, GENX(MEDIA_CURBE_LOAD), curbe) { - curbe.CURBETotalDataLength = push_state.alloc_size; - curbe.CURBEDataStartAddress = push_state.offset; - } - } - - const uint32_t slm_size = encode_slm_size(GEN_GEN, prog_data->total_shared); - - struct anv_state state = - anv_state_pool_emit(&device->dynamic_state_pool, - GENX(INTERFACE_DESCRIPTOR_DATA), 64, - .KernelStartPointer = pipeline->cs_simd, - .KernelStartPointerHigh = 0, - .BindingTablePointer = surfaces.offset, - .BindingTableEntryCount = 0, - .SamplerStatePointer = samplers.offset, - .SamplerCount = 0, - .ConstantIndirectURBEntryReadLength = - cs_prog_data->push.per_thread.regs, - .ConstantURBEntryReadOffset = 0, - .BarrierEnable = cs_prog_data->uses_barrier, - .SharedLocalMemorySize = slm_size, - .NumberofThreadsinGPGPUThreadGroup = - cs_prog_data->threads, - .CrossThreadConstantDataReadLength = - cs_prog_data->push.cross_thread.regs); - - uint32_t size = GENX(INTERFACE_DESCRIPTOR_DATA_length) * sizeof(uint32_t); - anv_batch_emit(&cmd_buffer->batch, - GENX(MEDIA_INTERFACE_DESCRIPTOR_LOAD), mid) { - mid.InterfaceDescriptorTotalLength = size; - mid.InterfaceDescriptorDataStartAddress = state.offset; - } - - return VK_SUCCESS; -} - -void -genX(cmd_buffer_flush_compute_state)(struct anv_cmd_buffer *cmd_buffer) -{ - struct anv_pipeline *pipeline = cmd_buffer->state.compute_pipeline; - MAYBE_UNUSED VkResult result; - - assert(pipeline->active_stages == VK_SHADER_STAGE_COMPUTE_BIT); - - genX(cmd_buffer_config_l3)(cmd_buffer, pipeline); - - genX(flush_pipeline_select_gpgpu)(cmd_buffer); - - if (cmd_buffer->state.compute_dirty & ANV_CMD_DIRTY_PIPELINE) - anv_batch_emit_batch(&cmd_buffer->batch, &pipeline->batch); - - if ((cmd_buffer->state.descriptors_dirty & VK_SHADER_STAGE_COMPUTE_BIT) || - (cmd_buffer->state.compute_dirty & ANV_CMD_DIRTY_PIPELINE)) { - result = flush_compute_descriptor_set(cmd_buffer); - assert(result == VK_SUCCESS); - cmd_buffer->state.descriptors_dirty &= ~VK_SHADER_STAGE_COMPUTE_BIT; - } - - cmd_buffer->state.compute_dirty = 0; - - genX(cmd_buffer_apply_pipe_flushes)(cmd_buffer); -} +/* Set of stage bits for which are pipelined, i.e. they get queued by the + * command streamer for later execution. + */ +#define ANV_PIPELINE_STAGE_PIPELINED_BITS \ + (VK_PIPELINE_STAGE_VERTEX_INPUT_BIT | \ + VK_PIPELINE_STAGE_VERTEX_SHADER_BIT | \ + VK_PIPELINE_STAGE_TESSELLATION_CONTROL_SHADER_BIT | \ + VK_PIPELINE_STAGE_TESSELLATION_EVALUATION_SHADER_BIT | \ + VK_PIPELINE_STAGE_GEOMETRY_SHADER_BIT | \ + VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT | \ + VK_PIPELINE_STAGE_EARLY_FRAGMENT_TESTS_BIT | \ + VK_PIPELINE_STAGE_LATE_FRAGMENT_TESTS_BIT | \ + VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT | \ + VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT | \ + VK_PIPELINE_STAGE_TRANSFER_BIT | \ + VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT | \ + VK_PIPELINE_STAGE_ALL_GRAPHICS_BIT | \ + VK_PIPELINE_STAGE_ALL_COMMANDS_BIT) void genX(CmdSetEvent)( VkCommandBuffer commandBuffer, @@ -408,6 +350,11 @@ ANV_FROM_HANDLE(anv_event, event, _event); anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { + if (stageMask & ANV_PIPELINE_STAGE_PIPELINED_BITS) { + pc.StallAtPixelScoreboard = true; + pc.CommandStreamerStallEnable = true; + } + pc.DestinationAddressType = DAT_PPGTT, pc.PostSyncOperation = WriteImmediateData, pc.Address = (struct anv_address) { @@ -427,6 +374,11 @@ ANV_FROM_HANDLE(anv_event, event, _event); anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { + if (stageMask & ANV_PIPELINE_STAGE_PIPELINED_BITS) { + pc.StallAtPixelScoreboard = true; + pc.CommandStreamerStallEnable = true; + } + pc.DestinationAddressType = DAT_PPGTT; pc.PostSyncOperation = WriteImmediateData; pc.Address = (struct anv_address) { diff -Nru mesa-12.0.6/src/intel/vulkan/gen8_pipeline.c mesa-17.0.7/src/intel/vulkan/gen8_pipeline.c --- mesa-12.0.6/src/intel/vulkan/gen8_pipeline.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/gen8_pipeline.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,393 +0,0 @@ -/* - * Copyright © 2015 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - -#include -#include -#include -#include -#include - -#include "anv_private.h" - -#include "genxml/gen_macros.h" -#include "genxml/genX_pack.h" - -#include "genX_pipeline_util.h" - -static void -emit_ia_state(struct anv_pipeline *pipeline, - const VkPipelineInputAssemblyStateCreateInfo *info, - const struct anv_graphics_pipeline_create_info *extra) -{ - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_VF_TOPOLOGY), vft) { - vft.PrimitiveTopologyType = pipeline->topology; - } -} - -static void -emit_rs_state(struct anv_pipeline *pipeline, - const VkPipelineRasterizationStateCreateInfo *info, - const VkPipelineMultisampleStateCreateInfo *ms_info, - const struct anv_graphics_pipeline_create_info *extra) -{ - uint32_t samples = 1; - - if (ms_info) - samples = ms_info->rasterizationSamples; - - struct GENX(3DSTATE_SF) sf = { - GENX(3DSTATE_SF_header), - .ViewportTransformEnable = !(extra && extra->use_rectlist), - .TriangleStripListProvokingVertexSelect = 0, - .LineStripListProvokingVertexSelect = 0, - .TriangleFanProvokingVertexSelect = 1, - .PointWidthSource = Vertex, - .PointWidth = 1.0, - }; - - /* FINISHME: VkBool32 rasterizerDiscardEnable; */ - - GENX(3DSTATE_SF_pack)(NULL, pipeline->gen8.sf, &sf); - - struct GENX(3DSTATE_RASTER) raster = { - GENX(3DSTATE_RASTER_header), - - /* For details on 3DSTATE_RASTER multisample state, see the BSpec table - * "Multisample Modes State". - */ - .DXMultisampleRasterizationEnable = samples > 1, - .ForcedSampleCount = FSC_NUMRASTSAMPLES_0, - .ForceMultisampling = false, - - .FrontWinding = vk_to_gen_front_face[info->frontFace], - .CullMode = vk_to_gen_cullmode[info->cullMode], - .FrontFaceFillMode = vk_to_gen_fillmode[info->polygonMode], - .BackFaceFillMode = vk_to_gen_fillmode[info->polygonMode], - .ScissorRectangleEnable = !(extra && extra->use_rectlist), -#if GEN_GEN == 8 - .ViewportZClipTestEnable = !pipeline->depth_clamp_enable, -#else - /* GEN9+ splits ViewportZClipTestEnable into near and far enable bits */ - .ViewportZFarClipTestEnable = !pipeline->depth_clamp_enable, - .ViewportZNearClipTestEnable = !pipeline->depth_clamp_enable, -#endif - .GlobalDepthOffsetEnableSolid = info->depthBiasEnable, - .GlobalDepthOffsetEnableWireframe = info->depthBiasEnable, - .GlobalDepthOffsetEnablePoint = info->depthBiasEnable, - }; - - GENX(3DSTATE_RASTER_pack)(NULL, pipeline->gen8.raster, &raster); -} - -static void -emit_ms_state(struct anv_pipeline *pipeline, - const VkPipelineMultisampleStateCreateInfo *info) -{ - uint32_t samples = 1; - uint32_t log2_samples = 0; - - /* From the Vulkan 1.0 spec: - * If pSampleMask is NULL, it is treated as if the mask has all bits - * enabled, i.e. no coverage is removed from fragments. - * - * 3DSTATE_SAMPLE_MASK.SampleMask is 16 bits. - */ - uint32_t sample_mask = 0xffff; - - if (info) { - samples = info->rasterizationSamples; - log2_samples = __builtin_ffs(samples) - 1; - } - - if (info && info->pSampleMask) - sample_mask &= info->pSampleMask[0]; - - if (info && info->sampleShadingEnable) - anv_finishme("VkPipelineMultisampleStateCreateInfo::sampleShadingEnable"); - - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_MULTISAMPLE), ms) { - /* The PRM says that this bit is valid only for DX9: - * - * SW can choose to set this bit only for DX9 API. DX10/OGL API's - * should not have any effect by setting or not setting this bit. - */ - ms.PixelPositionOffsetEnable = false; - - ms.PixelLocation = CENTER; - ms.NumberofMultisamples = log2_samples; - } - - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_SAMPLE_MASK), sm) { - sm.SampleMask = sample_mask; - } -} - -VkResult -genX(graphics_pipeline_create)( - VkDevice _device, - struct anv_pipeline_cache * cache, - const VkGraphicsPipelineCreateInfo* pCreateInfo, - const struct anv_graphics_pipeline_create_info *extra, - const VkAllocationCallbacks* pAllocator, - VkPipeline* pPipeline) -{ - ANV_FROM_HANDLE(anv_device, device, _device); - ANV_FROM_HANDLE(anv_render_pass, pass, pCreateInfo->renderPass); - struct anv_subpass *subpass = &pass->subpasses[pCreateInfo->subpass]; - struct anv_pipeline *pipeline; - VkResult result; - uint32_t offset, length; - - assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO); - - pipeline = anv_alloc2(&device->alloc, pAllocator, sizeof(*pipeline), 8, - VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); - if (pipeline == NULL) - return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); - - result = anv_pipeline_init(pipeline, device, cache, - pCreateInfo, extra, pAllocator); - if (result != VK_SUCCESS) { - anv_free2(&device->alloc, pAllocator, pipeline); - return result; - } - - assert(pCreateInfo->pVertexInputState); - emit_vertex_input(pipeline, pCreateInfo->pVertexInputState, extra); - assert(pCreateInfo->pInputAssemblyState); - emit_ia_state(pipeline, pCreateInfo->pInputAssemblyState, extra); - assert(pCreateInfo->pRasterizationState); - emit_rs_state(pipeline, pCreateInfo->pRasterizationState, - pCreateInfo->pMultisampleState, extra); - emit_ms_state(pipeline, pCreateInfo->pMultisampleState); - emit_ds_state(pipeline, pCreateInfo->pDepthStencilState, pass, subpass); - emit_cb_state(pipeline, pCreateInfo->pColorBlendState, - pCreateInfo->pMultisampleState); - - emit_urb_setup(pipeline); - - emit_3dstate_clip(pipeline, pCreateInfo->pViewportState, - pCreateInfo->pRasterizationState, extra); - - const struct brw_wm_prog_data *wm_prog_data = get_wm_prog_data(pipeline); - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_WM), wm) { - wm.StatisticsEnable = true; - wm.LineEndCapAntialiasingRegionWidth = _05pixels; - wm.LineAntialiasingRegionWidth = _10pixels; - wm.ForceThreadDispatchEnable = NORMAL; - wm.PointRasterizationRule = RASTRULE_UPPER_RIGHT; - - if (wm_prog_data && wm_prog_data->early_fragment_tests) { - wm.EarlyDepthStencilControl = PREPS; - } else if (wm_prog_data && wm_prog_data->has_side_effects) { - wm.EarlyDepthStencilControl = PSEXEC; - } else { - wm.EarlyDepthStencilControl = NORMAL; - } - - wm.BarycentricInterpolationMode = pipeline->ps_ksp0 == NO_KERNEL ? - 0 : wm_prog_data->barycentric_interp_modes; - } - - if (pipeline->gs_kernel == NO_KERNEL) { - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_GS), gs); - } else { - const struct brw_gs_prog_data *gs_prog_data = get_gs_prog_data(pipeline); - offset = 1; - length = (gs_prog_data->base.vue_map.num_slots + 1) / 2 - offset; - - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_GS), gs) { - gs.SingleProgramFlow = false; - gs.KernelStartPointer = pipeline->gs_kernel; - gs.VectorMaskEnable = false; - gs.SamplerCount = 0; - gs.BindingTableEntryCount = 0; - gs.ExpectedVertexCount = gs_prog_data->vertices_in; - - gs.ScratchSpaceBasePointer = (struct anv_address) { - .bo = anv_scratch_pool_alloc(device, &device->scratch_pool, - MESA_SHADER_GEOMETRY, - gs_prog_data->base.base.total_scratch), - .offset = 0, - }; - gs.PerThreadScratchSpace = scratch_space(&gs_prog_data->base.base); - gs.OutputVertexSize = gs_prog_data->output_vertex_size_hwords * 2 - 1; - gs.OutputTopology = gs_prog_data->output_topology; - gs.VertexURBEntryReadLength = gs_prog_data->base.urb_read_length; - gs.IncludeVertexHandles = gs_prog_data->base.include_vue_handles; - - gs.DispatchGRFStartRegisterForURBData = - gs_prog_data->base.base.dispatch_grf_start_reg; - - gs.MaximumNumberofThreads = device->info.max_gs_threads / 2 - 1; - gs.ControlDataHeaderSize = gs_prog_data->control_data_header_size_hwords; - gs.DispatchMode = gs_prog_data->base.dispatch_mode; - gs.StatisticsEnable = true; - gs.IncludePrimitiveID = gs_prog_data->include_primitive_id; - gs.ReorderMode = TRAILING; - gs.Enable = true; - - gs.ControlDataFormat = gs_prog_data->control_data_format; - - gs.StaticOutput = gs_prog_data->static_vertex_count >= 0; - gs.StaticOutputVertexCount = - gs_prog_data->static_vertex_count >= 0 ? - gs_prog_data->static_vertex_count : 0; - - /* FIXME: mesa sets this based on ctx->Transform.ClipPlanesEnabled: - * UserClipDistanceClipTestEnableBitmask_3DSTATE_GS(v) - * UserClipDistanceCullTestEnableBitmask(v) - */ - - gs.VertexURBEntryOutputReadOffset = offset; - gs.VertexURBEntryOutputLength = length; - } - } - - const struct brw_vs_prog_data *vs_prog_data = get_vs_prog_data(pipeline); - /* Skip the VUE header and position slots */ - offset = 1; - length = (vs_prog_data->base.vue_map.num_slots + 1) / 2 - offset; - - uint32_t vs_start = pipeline->vs_simd8 != NO_KERNEL ? pipeline->vs_simd8 : - pipeline->vs_vec4; - - if (vs_start == NO_KERNEL || (extra && extra->disable_vs)) { - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_VS), vs) { - vs.FunctionEnable = false; - /* Even if VS is disabled, SBE still gets the amount of - * vertex data to read from this field. */ - vs.VertexURBEntryOutputReadOffset = offset; - vs.VertexURBEntryOutputLength = length; - } - } else { - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_VS), vs) { - vs.KernelStartPointer = vs_start; - vs.SingleVertexDispatch = false; - vs.VectorMaskEnable = false; - vs.SamplerCount = 0; - - vs.BindingTableEntryCount = - vs_prog_data->base.base.binding_table.size_bytes / 4, - - vs.ThreadDispatchPriority = false; - vs.FloatingPointMode = IEEE754; - vs.IllegalOpcodeExceptionEnable = false; - vs.AccessesUAV = false; - vs.SoftwareExceptionEnable = false; - - vs.ScratchSpaceBasePointer = (struct anv_address) { - .bo = anv_scratch_pool_alloc(device, &device->scratch_pool, - MESA_SHADER_VERTEX, - vs_prog_data->base.base.total_scratch), - .offset = 0, - }; - vs.PerThreadScratchSpace = scratch_space(&vs_prog_data->base.base); - - vs.DispatchGRFStartRegisterForURBData = - vs_prog_data->base.base.dispatch_grf_start_reg; - - vs.VertexURBEntryReadLength = vs_prog_data->base.urb_read_length; - vs.VertexURBEntryReadOffset = 0; - - vs.MaximumNumberofThreads = device->info.max_vs_threads - 1; - vs.StatisticsEnable = false; - vs.SIMD8DispatchEnable = pipeline->vs_simd8 != NO_KERNEL; - vs.VertexCacheDisable = false; - vs.FunctionEnable = true; - - vs.VertexURBEntryOutputReadOffset = offset; - vs.VertexURBEntryOutputLength = length; - - /* TODO */ - vs.UserClipDistanceClipTestEnableBitmask = 0; - vs.UserClipDistanceCullTestEnableBitmask = 0; - } - } - - const int num_thread_bias = GEN_GEN == 8 ? 2 : 1; - if (pipeline->ps_ksp0 == NO_KERNEL) { - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_PS), ps); - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_PS_EXTRA), extra) { - extra.PixelShaderValid = false; - } - } else { - emit_3dstate_sbe(pipeline); - - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_PS), ps) { - ps.KernelStartPointer0 = pipeline->ps_ksp0; - ps.KernelStartPointer1 = 0; - ps.KernelStartPointer2 = pipeline->ps_ksp0 + wm_prog_data->prog_offset_2; - ps._8PixelDispatchEnable = wm_prog_data->dispatch_8; - ps._16PixelDispatchEnable = wm_prog_data->dispatch_16; - ps._32PixelDispatchEnable = false; - ps.SingleProgramFlow = false; - ps.VectorMaskEnable = true; - ps.SamplerCount = 1; - ps.PushConstantEnable = wm_prog_data->base.nr_params > 0; - ps.PositionXYOffsetSelect = wm_prog_data->uses_pos_offset ? - POSOFFSET_SAMPLE: POSOFFSET_NONE; - - ps.MaximumNumberofThreadsPerPSD = 64 - num_thread_bias; - - ps.ScratchSpaceBasePointer = (struct anv_address) { - .bo = anv_scratch_pool_alloc(device, &device->scratch_pool, - MESA_SHADER_FRAGMENT, - wm_prog_data->base.total_scratch), - .offset = 0, - }; - ps.PerThreadScratchSpace = scratch_space(&wm_prog_data->base); - - ps.DispatchGRFStartRegisterForConstantSetupData0 = - wm_prog_data->base.dispatch_grf_start_reg; - ps.DispatchGRFStartRegisterForConstantSetupData1 = 0; - ps.DispatchGRFStartRegisterForConstantSetupData2 = - wm_prog_data->dispatch_grf_start_reg_2; - } - - bool per_sample_ps = pCreateInfo->pMultisampleState && - pCreateInfo->pMultisampleState->sampleShadingEnable; - - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_PS_EXTRA), ps) { - ps.PixelShaderValid = true; - ps.PixelShaderKillsPixel = wm_prog_data->uses_kill; - ps.PixelShaderComputedDepthMode = wm_prog_data->computed_depth_mode; - ps.AttributeEnable = wm_prog_data->num_varying_inputs > 0; - ps.oMaskPresenttoRenderTarget = wm_prog_data->uses_omask; - ps.PixelShaderIsPerSample = per_sample_ps; - ps.PixelShaderUsesSourceDepth = wm_prog_data->uses_src_depth; - ps.PixelShaderUsesSourceW = wm_prog_data->uses_src_w; -#if GEN_GEN >= 9 - ps.PixelShaderPullsBary = wm_prog_data->pulls_bary; - ps.InputCoverageMaskState = wm_prog_data->uses_sample_mask ? - ICMS_INNER_CONSERVATIVE : ICMS_NONE; -#else - ps.PixelShaderUsesInputCoverageMask = wm_prog_data->uses_sample_mask; -#endif - } - } - - *pPipeline = anv_pipeline_to_handle(pipeline); - - return VK_SUCCESS; -} diff -Nru mesa-12.0.6/src/intel/vulkan/genX_blorp_exec.c mesa-17.0.7/src/intel/vulkan/genX_blorp_exec.c --- mesa-12.0.6/src/intel/vulkan/genX_blorp_exec.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/genX_blorp_exec.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,186 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include + +#include "anv_private.h" + +/* These are defined in anv_private.h and blorp_genX_exec.h */ +#undef __gen_address_type +#undef __gen_user_data +#undef __gen_combine_address + +#include "common/gen_l3_config.h" +#include "common/gen_sample_positions.h" +#include "blorp/blorp_genX_exec.h" + +static void * +blorp_emit_dwords(struct blorp_batch *batch, unsigned n) +{ + struct anv_cmd_buffer *cmd_buffer = batch->driver_batch; + return anv_batch_emit_dwords(&cmd_buffer->batch, n); +} + +static uint64_t +blorp_emit_reloc(struct blorp_batch *batch, + void *location, struct blorp_address address, uint32_t delta) +{ + struct anv_cmd_buffer *cmd_buffer = batch->driver_batch; + assert(cmd_buffer->batch.start <= location && + location < cmd_buffer->batch.end); + return anv_batch_emit_reloc(&cmd_buffer->batch, location, + address.buffer, address.offset + delta); +} + +static void +blorp_surface_reloc(struct blorp_batch *batch, uint32_t ss_offset, + struct blorp_address address, uint32_t delta) +{ + struct anv_cmd_buffer *cmd_buffer = batch->driver_batch; + anv_reloc_list_add(&cmd_buffer->surface_relocs, &cmd_buffer->pool->alloc, + ss_offset, address.buffer, address.offset + delta); +} + +static void * +blorp_alloc_dynamic_state(struct blorp_batch *batch, + enum aub_state_struct_type type, + uint32_t size, + uint32_t alignment, + uint32_t *offset) +{ + struct anv_cmd_buffer *cmd_buffer = batch->driver_batch; + + struct anv_state state = + anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, size, alignment); + + *offset = state.offset; + return state.map; +} + +static void +blorp_alloc_binding_table(struct blorp_batch *batch, unsigned num_entries, + unsigned state_size, unsigned state_alignment, + uint32_t *bt_offset, + uint32_t *surface_offsets, void **surface_maps) +{ + struct anv_cmd_buffer *cmd_buffer = batch->driver_batch; + + uint32_t state_offset; + struct anv_state bt_state = + anv_cmd_buffer_alloc_blorp_binding_table(cmd_buffer, num_entries, + &state_offset); + + uint32_t *bt_map = bt_state.map; + *bt_offset = bt_state.offset; + + for (unsigned i = 0; i < num_entries; i++) { + struct anv_state surface_state = + anv_cmd_buffer_alloc_surface_state(cmd_buffer); + bt_map[i] = surface_state.offset + state_offset; + surface_offsets[i] = surface_state.offset; + surface_maps[i] = surface_state.map; + } + + if (!cmd_buffer->device->info.has_llc) + anv_state_clflush(bt_state); +} + +static void * +blorp_alloc_vertex_buffer(struct blorp_batch *batch, uint32_t size, + struct blorp_address *addr) +{ + struct anv_cmd_buffer *cmd_buffer = batch->driver_batch; + + /* From the Skylake PRM, 3DSTATE_VERTEX_BUFFERS: + * + * "The VF cache needs to be invalidated before binding and then using + * Vertex Buffers that overlap with any previously bound Vertex Buffer + * (at a 64B granularity) since the last invalidation. A VF cache + * invalidate is performed by setting the "VF Cache Invalidation Enable" + * bit in PIPE_CONTROL." + * + * This restriction first appears in the Skylake PRM but the internal docs + * also list it as being an issue on Broadwell. In order to avoid this + * problem, we align all vertex buffer allocations to 64 bytes. + */ + struct anv_state vb_state = + anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, size, 64); + + *addr = (struct blorp_address) { + .buffer = &cmd_buffer->device->dynamic_state_block_pool.bo, + .offset = vb_state.offset, + }; + + return vb_state.map; +} + +static void +blorp_flush_range(struct blorp_batch *batch, void *start, size_t size) +{ + struct anv_device *device = batch->blorp->driver_ctx; + if (!device->info.has_llc) + anv_clflush_range(start, size); +} + +static void +blorp_emit_urb_config(struct blorp_batch *batch, unsigned vs_entry_size) +{ + struct anv_device *device = batch->blorp->driver_ctx; + struct anv_cmd_buffer *cmd_buffer = batch->driver_batch; + + const unsigned entry_size[4] = { vs_entry_size, 1, 1, 1 }; + + genX(emit_urb_setup)(device, &cmd_buffer->batch, + cmd_buffer->state.current_l3_config, + VK_SHADER_STAGE_VERTEX_BIT | + VK_SHADER_STAGE_FRAGMENT_BIT, + entry_size); +} + +void genX(blorp_exec)(struct blorp_batch *batch, + const struct blorp_params *params); + +void +genX(blorp_exec)(struct blorp_batch *batch, + const struct blorp_params *params) +{ + struct anv_cmd_buffer *cmd_buffer = batch->driver_batch; + + if (!cmd_buffer->state.current_l3_config) { + const struct gen_l3_config *cfg = + gen_get_default_l3_config(&cmd_buffer->device->info); + genX(cmd_buffer_config_l3)(cmd_buffer, cfg); + } + + genX(cmd_buffer_apply_pipe_flushes)(cmd_buffer); + + genX(flush_pipeline_select_3d)(cmd_buffer); + + genX(cmd_buffer_emit_gen7_depth_flush)(cmd_buffer); + + blorp_exec(batch, params); + + cmd_buffer->state.vb_dirty = ~0; + cmd_buffer->state.dirty = ~0; + cmd_buffer->state.push_constants_dirty = ~0; +} diff -Nru mesa-12.0.6/src/intel/vulkan/genX_cmd_buffer.c mesa-17.0.7/src/intel/vulkan/genX_cmd_buffer.c --- mesa-12.0.6/src/intel/vulkan/genX_cmd_buffer.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/genX_cmd_buffer.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,17 +25,36 @@ #include #include "anv_private.h" +#include "vk_format_info.h" +#include "common/gen_l3_config.h" #include "genxml/gen_macros.h" #include "genxml/genX_pack.h" +static void +emit_lrm(struct anv_batch *batch, + uint32_t reg, struct anv_bo *bo, uint32_t offset) +{ + anv_batch_emit(batch, GENX(MI_LOAD_REGISTER_MEM), lrm) { + lrm.RegisterAddress = reg; + lrm.MemoryAddress = (struct anv_address) { bo, offset }; + } +} + +static void +emit_lri(struct anv_batch *batch, uint32_t reg, uint32_t imm) +{ + anv_batch_emit(batch, GENX(MI_LOAD_REGISTER_IMM), lri) { + lri.RegisterOffset = reg; + lri.DataDWord = imm; + } +} + void genX(cmd_buffer_emit_state_base_address)(struct anv_cmd_buffer *cmd_buffer) { struct anv_device *device = cmd_buffer->device; -/* XXX: Do we need this on more than just BDW? */ -#if (GEN_GEN >= 8) /* Emit a render target cache flush. * * This isn't documented anywhere in the PRM. However, it seems to be @@ -44,9 +63,10 @@ * clear depth, reset state base address, and then go render stuff. */ anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { + pc.DCFlushEnable = true; pc.RenderTargetCacheFlushEnable = true; + pc.CommandStreamerStallEnable = true; } -#endif anv_batch_emit(&cmd_buffer->batch, GENX(STATE_BASE_ADDRESS), sba) { sba.GeneralStateBaseAddress = (struct anv_address) { NULL, 0 }; @@ -60,8 +80,8 @@ sba.DynamicStateBaseAddress = (struct anv_address) { &device->dynamic_state_block_pool.bo, 0 }; - sba.DynamicStateMemoryObjectControlState = GENX(MOCS), - sba.DynamicStateBaseAddressModifyEnable = true, + sba.DynamicStateMemoryObjectControlState = GENX(MOCS); + sba.DynamicStateBaseAddressModifyEnable = true; sba.IndirectObjectBaseAddress = (struct anv_address) { NULL, 0 }; sba.IndirectObjectMemoryObjectControlState = GENX(MOCS); @@ -127,7 +147,692 @@ */ anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { pc.TextureCacheInvalidationEnable = true; + pc.ConstantCacheInvalidationEnable = true; + pc.StateCacheInvalidationEnable = true; + } +} + +static void +add_surface_state_reloc(struct anv_cmd_buffer *cmd_buffer, + struct anv_state state, + struct anv_bo *bo, uint32_t offset) +{ + const struct isl_device *isl_dev = &cmd_buffer->device->isl_dev; + + anv_reloc_list_add(&cmd_buffer->surface_relocs, &cmd_buffer->pool->alloc, + state.offset + isl_dev->ss.addr_offset, bo, offset); +} + +static void +add_image_view_relocs(struct anv_cmd_buffer *cmd_buffer, + const struct anv_image_view *iview, + enum isl_aux_usage aux_usage, + struct anv_state state) +{ + const struct isl_device *isl_dev = &cmd_buffer->device->isl_dev; + + anv_reloc_list_add(&cmd_buffer->surface_relocs, &cmd_buffer->pool->alloc, + state.offset + isl_dev->ss.addr_offset, + iview->bo, iview->offset); + + if (aux_usage != ISL_AUX_USAGE_NONE) { + uint32_t aux_offset = iview->offset + iview->image->aux_surface.offset; + + /* On gen7 and prior, the bottom 12 bits of the MCS base address are + * used to store other information. This should be ok, however, because + * surface buffer addresses are always 4K page alinged. + */ + assert((aux_offset & 0xfff) == 0); + uint32_t *aux_addr_dw = state.map + isl_dev->ss.aux_addr_offset; + aux_offset += *aux_addr_dw & 0xfff; + + anv_reloc_list_add(&cmd_buffer->surface_relocs, &cmd_buffer->pool->alloc, + state.offset + isl_dev->ss.aux_addr_offset, + iview->bo, aux_offset); + } +} + +static bool +color_is_zero_one(VkClearColorValue value, enum isl_format format) +{ + if (isl_format_has_int_channel(format)) { + for (unsigned i = 0; i < 4; i++) { + if (value.int32[i] != 0 && value.int32[i] != 1) + return false; + } + } else { + for (unsigned i = 0; i < 4; i++) { + if (value.float32[i] != 0.0f && value.float32[i] != 1.0f) + return false; + } + } + + return true; +} + +static void +color_attachment_compute_aux_usage(struct anv_device *device, + struct anv_attachment_state *att_state, + struct anv_image_view *iview, + VkRect2D render_area, + union isl_color_value *fast_clear_color) +{ + if (iview->image->aux_surface.isl.size == 0) { + att_state->aux_usage = ISL_AUX_USAGE_NONE; + att_state->input_aux_usage = ISL_AUX_USAGE_NONE; + att_state->fast_clear = false; + return; + } + + assert(iview->image->aux_surface.isl.usage & ISL_SURF_USAGE_CCS_BIT); + + att_state->clear_color_is_zero_one = + color_is_zero_one(att_state->clear_value.color, iview->isl.format); + + if (att_state->pending_clear_aspects == VK_IMAGE_ASPECT_COLOR_BIT) { + /* Start off assuming fast clears are possible */ + att_state->fast_clear = true; + + /* Potentially, we could do partial fast-clears but doing so has crazy + * alignment restrictions. It's easier to just restrict to full size + * fast clears for now. + */ + if (render_area.offset.x != 0 || + render_area.offset.y != 0 || + render_area.extent.width != iview->extent.width || + render_area.extent.height != iview->extent.height) + att_state->fast_clear = false; + + if (GEN_GEN <= 7) { + /* On gen7, we can't do multi-LOD or multi-layer fast-clears. We + * technically can, but it comes with crazy restrictions that we + * don't want to deal with now. + */ + if (iview->isl.base_level > 0 || + iview->isl.base_array_layer > 0 || + iview->isl.array_len > 1) + att_state->fast_clear = false; + } + + /* On Broadwell and earlier, we can only handle 0/1 clear colors */ + if (GEN_GEN <= 8 && !att_state->clear_color_is_zero_one) + att_state->fast_clear = false; + + if (att_state->fast_clear) { + memcpy(fast_clear_color->u32, att_state->clear_value.color.uint32, + sizeof(fast_clear_color->u32)); + } + } else { + att_state->fast_clear = false; + } + + if (isl_format_supports_lossless_compression(&device->info, + iview->isl.format)) { + att_state->aux_usage = ISL_AUX_USAGE_CCS_E; + att_state->input_aux_usage = ISL_AUX_USAGE_CCS_E; + } else if (att_state->fast_clear) { + att_state->aux_usage = ISL_AUX_USAGE_CCS_D; + /* From the Sky Lake PRM, RENDER_SURFACE_STATE::AuxiliarySurfaceMode: + * + * "If Number of Multisamples is MULTISAMPLECOUNT_1, AUX_CCS_D + * setting is only allowed if Surface Format supported for Fast + * Clear. In addition, if the surface is bound to the sampling + * engine, Surface Format must be supported for Render Target + * Compression for surfaces bound to the sampling engine." + * + * In other words, we can only sample from a fast-cleared image if it + * also supports color compression. + */ + if (isl_format_supports_lossless_compression(&device->info, iview->isl.format)) + att_state->input_aux_usage = ISL_AUX_USAGE_CCS_D; + else + att_state->input_aux_usage = ISL_AUX_USAGE_NONE; + } else { + att_state->aux_usage = ISL_AUX_USAGE_NONE; + att_state->input_aux_usage = ISL_AUX_USAGE_NONE; + } +} + +static bool +need_input_attachment_state(const struct anv_render_pass_attachment *att) +{ + if (!(att->usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT)) + return false; + + /* We only allocate input attachment states for color surfaces. Compression + * is not yet enabled for depth textures and stencil doesn't allow + * compression so we can just use the texture surface state from the view. + */ + return vk_format_is_color(att->format); +} + +static enum isl_aux_usage +layout_to_hiz_usage(VkImageLayout layout, uint8_t samples) +{ + switch (layout) { + case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL: + return ISL_AUX_USAGE_HIZ; + case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL: + case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL: + if (anv_can_sample_with_hiz(GEN_GEN, samples)) + return ISL_AUX_USAGE_HIZ; + /* Fall-through */ + case VK_IMAGE_LAYOUT_GENERAL: + /* This buffer could be used as a source or destination in a transfer + * operation. Transfer operations current don't perform HiZ-enabled reads + * and writes. + */ + default: + return ISL_AUX_USAGE_NONE; + } +} + +/* Transitions a HiZ-enabled depth buffer from one layout to another. Unless + * the initial layout is undefined, the HiZ buffer and depth buffer will + * represent the same data at the end of this operation. + */ +static void +transition_depth_buffer(struct anv_cmd_buffer *cmd_buffer, + const struct anv_image *image, + VkImageLayout initial_layout, + VkImageLayout final_layout) +{ + assert(image); + + if (image->aux_usage != ISL_AUX_USAGE_HIZ || final_layout == initial_layout) + return; + + const bool hiz_enabled = layout_to_hiz_usage(initial_layout, image->samples) == + ISL_AUX_USAGE_HIZ; + const bool enable_hiz = layout_to_hiz_usage(final_layout, image->samples) == + ISL_AUX_USAGE_HIZ; + + enum blorp_hiz_op hiz_op; + if (initial_layout == VK_IMAGE_LAYOUT_UNDEFINED) { + /* We've already initialized the aux HiZ buffer at BindImageMemory time, + * so there's no need to perform a HIZ resolve or clear to avoid GPU hangs. + * This initial layout indicates that the user doesn't care about the data + * that's currently in the buffer, so resolves are not necessary except + * for the special case noted below. + */ + hiz_op = BLORP_HIZ_OP_NONE; + } else if (hiz_enabled && !enable_hiz) { + hiz_op = BLORP_HIZ_OP_DEPTH_RESOLVE; + } else if (!hiz_enabled && enable_hiz) { + hiz_op = BLORP_HIZ_OP_HIZ_RESOLVE; + } else { + assert(hiz_enabled == enable_hiz); + /* If the same buffer will be used, no resolves are necessary except for + * the special case noted below. + */ + hiz_op = BLORP_HIZ_OP_NONE; + } + + if (hiz_op != BLORP_HIZ_OP_NONE) + anv_gen8_hiz_op_resolve(cmd_buffer, image, hiz_op); + + /* Images that have sampling with HiZ enabled cause all shader sampling to + * load data with the HiZ buffer. Therefore, in the case of transitioning to + * the general layout - which currently routes all writes to the depth + * buffer - we must ensure that the HiZ buffer remains consistent with the + * depth buffer by performing an additional HIZ resolve if the operation + * required by this transition was not already a HiZ resolve. + */ + if (final_layout == VK_IMAGE_LAYOUT_GENERAL && + anv_can_sample_with_hiz(GEN_GEN, image->samples) && + hiz_op != BLORP_HIZ_OP_HIZ_RESOLVE) { + anv_gen8_hiz_op_resolve(cmd_buffer, image, BLORP_HIZ_OP_HIZ_RESOLVE); + } +} + + +/** + * Setup anv_cmd_state::attachments for vkCmdBeginRenderPass. + */ +static void +genX(cmd_buffer_setup_attachments)(struct anv_cmd_buffer *cmd_buffer, + struct anv_render_pass *pass, + const VkRenderPassBeginInfo *begin) +{ + const struct isl_device *isl_dev = &cmd_buffer->device->isl_dev; + struct anv_cmd_state *state = &cmd_buffer->state; + + vk_free(&cmd_buffer->pool->alloc, state->attachments); + + if (pass->attachment_count == 0) { + state->attachments = NULL; + return; + } + + state->attachments = vk_alloc(&cmd_buffer->pool->alloc, + pass->attachment_count * + sizeof(state->attachments[0]), + 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (state->attachments == NULL) { + /* FIXME: Propagate VK_ERROR_OUT_OF_HOST_MEMORY to vkEndCommandBuffer */ + abort(); + } + + /* Reserve one for the NULL state. */ + unsigned num_states = 1; + for (uint32_t i = 0; i < pass->attachment_count; ++i) { + if (vk_format_is_color(pass->attachments[i].format)) + num_states++; + + if (need_input_attachment_state(&pass->attachments[i])) + num_states++; + } + + const uint32_t ss_stride = align_u32(isl_dev->ss.size, isl_dev->ss.align); + state->render_pass_states = + anv_state_stream_alloc(&cmd_buffer->surface_state_stream, + num_states * ss_stride, isl_dev->ss.align); + + struct anv_state next_state = state->render_pass_states; + next_state.alloc_size = isl_dev->ss.size; + + state->null_surface_state = next_state; + next_state.offset += ss_stride; + next_state.map += ss_stride; + + for (uint32_t i = 0; i < pass->attachment_count; ++i) { + if (vk_format_is_color(pass->attachments[i].format)) { + state->attachments[i].color_rt_state = next_state; + next_state.offset += ss_stride; + next_state.map += ss_stride; + } + + if (need_input_attachment_state(&pass->attachments[i])) { + state->attachments[i].input_att_state = next_state; + next_state.offset += ss_stride; + next_state.map += ss_stride; + } + } + assert(next_state.offset == state->render_pass_states.offset + + state->render_pass_states.alloc_size); + + if (begin) { + ANV_FROM_HANDLE(anv_framebuffer, framebuffer, begin->framebuffer); + assert(pass->attachment_count == framebuffer->attachment_count); + + struct GENX(RENDER_SURFACE_STATE) null_ss = { + .SurfaceType = SURFTYPE_NULL, + .SurfaceArray = framebuffer->layers > 0, + .SurfaceFormat = ISL_FORMAT_R8G8B8A8_UNORM, +#if GEN_GEN >= 8 + .TileMode = YMAJOR, +#else + .TiledSurface = true, +#endif + .Width = framebuffer->width - 1, + .Height = framebuffer->height - 1, + .Depth = framebuffer->layers - 1, + .RenderTargetViewExtent = framebuffer->layers - 1, + }; + GENX(RENDER_SURFACE_STATE_pack)(NULL, state->null_surface_state.map, + &null_ss); + + for (uint32_t i = 0; i < pass->attachment_count; ++i) { + struct anv_render_pass_attachment *att = &pass->attachments[i]; + VkImageAspectFlags att_aspects = vk_format_aspects(att->format); + VkImageAspectFlags clear_aspects = 0; + + if (att_aspects == VK_IMAGE_ASPECT_COLOR_BIT) { + /* color attachment */ + if (att->load_op == VK_ATTACHMENT_LOAD_OP_CLEAR) { + clear_aspects |= VK_IMAGE_ASPECT_COLOR_BIT; + } + } else { + /* depthstencil attachment */ + if ((att_aspects & VK_IMAGE_ASPECT_DEPTH_BIT) && + att->load_op == VK_ATTACHMENT_LOAD_OP_CLEAR) { + clear_aspects |= VK_IMAGE_ASPECT_DEPTH_BIT; + } + if ((att_aspects & VK_IMAGE_ASPECT_STENCIL_BIT) && + att->stencil_load_op == VK_ATTACHMENT_LOAD_OP_CLEAR) { + clear_aspects |= VK_IMAGE_ASPECT_STENCIL_BIT; + } + } + + state->attachments[i].current_layout = att->initial_layout; + state->attachments[i].pending_clear_aspects = clear_aspects; + if (clear_aspects) + state->attachments[i].clear_value = begin->pClearValues[i]; + + struct anv_image_view *iview = framebuffer->attachments[i]; + assert(iview->vk_format == att->format); + + union isl_color_value clear_color = { .u32 = { 0, } }; + if (att_aspects == VK_IMAGE_ASPECT_COLOR_BIT) { + color_attachment_compute_aux_usage(cmd_buffer->device, + &state->attachments[i], + iview, begin->renderArea, + &clear_color); + + struct isl_view view = iview->isl; + view.usage |= ISL_SURF_USAGE_RENDER_TARGET_BIT; + isl_surf_fill_state(isl_dev, + state->attachments[i].color_rt_state.map, + .surf = &iview->image->color_surface.isl, + .view = &view, + .aux_surf = &iview->image->aux_surface.isl, + .aux_usage = state->attachments[i].aux_usage, + .clear_color = clear_color, + .mocs = cmd_buffer->device->default_mocs); + + add_image_view_relocs(cmd_buffer, iview, + state->attachments[i].aux_usage, + state->attachments[i].color_rt_state); + } else { + if (iview->image->aux_usage == ISL_AUX_USAGE_HIZ) { + state->attachments[i].aux_usage = + layout_to_hiz_usage(att->initial_layout, iview->image->samples); + } else { + state->attachments[i].aux_usage = ISL_AUX_USAGE_NONE; + } + state->attachments[i].input_aux_usage = ISL_AUX_USAGE_NONE; + } + + if (need_input_attachment_state(&pass->attachments[i])) { + struct isl_view view = iview->isl; + view.usage |= ISL_SURF_USAGE_TEXTURE_BIT; + isl_surf_fill_state(isl_dev, + state->attachments[i].input_att_state.map, + .surf = &iview->image->color_surface.isl, + .view = &view, + .aux_surf = &iview->image->aux_surface.isl, + .aux_usage = state->attachments[i].input_aux_usage, + .clear_color = clear_color, + .mocs = cmd_buffer->device->default_mocs); + + add_image_view_relocs(cmd_buffer, iview, + state->attachments[i].input_aux_usage, + state->attachments[i].input_att_state); + } + } + + if (!cmd_buffer->device->info.has_llc) + anv_state_clflush(state->render_pass_states); + } +} + +VkResult +genX(BeginCommandBuffer)( + VkCommandBuffer commandBuffer, + const VkCommandBufferBeginInfo* pBeginInfo) +{ + ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); + + /* If this is the first vkBeginCommandBuffer, we must *initialize* the + * command buffer's state. Otherwise, we must *reset* its state. In both + * cases we reset it. + * + * From the Vulkan 1.0 spec: + * + * If a command buffer is in the executable state and the command buffer + * was allocated from a command pool with the + * VK_COMMAND_POOL_CREATE_RESET_COMMAND_BUFFER_BIT flag set, then + * vkBeginCommandBuffer implicitly resets the command buffer, behaving + * as if vkResetCommandBuffer had been called with + * VK_COMMAND_BUFFER_RESET_RELEASE_RESOURCES_BIT not set. It then puts + * the command buffer in the recording state. + */ + anv_cmd_buffer_reset(cmd_buffer); + + cmd_buffer->usage_flags = pBeginInfo->flags; + + assert(cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_SECONDARY || + !(cmd_buffer->usage_flags & VK_COMMAND_BUFFER_USAGE_RENDER_PASS_CONTINUE_BIT)); + + genX(cmd_buffer_emit_state_base_address)(cmd_buffer); + + /* We sometimes store vertex data in the dynamic state buffer for blorp + * operations and our dynamic state stream may re-use data from previous + * command buffers. In order to prevent stale cache data, we flush the VF + * cache. We could do this on every blorp call but that's not really + * needed as all of the data will get written by the CPU prior to the GPU + * executing anything. The chances are fairly high that they will use + * blorp at least once per primary command buffer so it shouldn't be + * wasted. + */ + if (cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY) + cmd_buffer->state.pending_pipe_bits |= ANV_PIPE_VF_CACHE_INVALIDATE_BIT; + + if (cmd_buffer->usage_flags & + VK_COMMAND_BUFFER_USAGE_RENDER_PASS_CONTINUE_BIT) { + cmd_buffer->state.pass = + anv_render_pass_from_handle(pBeginInfo->pInheritanceInfo->renderPass); + cmd_buffer->state.subpass = + &cmd_buffer->state.pass->subpasses[pBeginInfo->pInheritanceInfo->subpass]; + cmd_buffer->state.framebuffer = NULL; + + genX(cmd_buffer_setup_attachments)(cmd_buffer, cmd_buffer->state.pass, + NULL); + + cmd_buffer->state.dirty |= ANV_CMD_DIRTY_RENDER_TARGETS; + } + + return VK_SUCCESS; +} + +VkResult +genX(EndCommandBuffer)( + VkCommandBuffer commandBuffer) +{ + ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); + + genX(cmd_buffer_apply_pipe_flushes)(cmd_buffer); + + anv_cmd_buffer_end_batch_buffer(cmd_buffer); + + return VK_SUCCESS; +} + +void +genX(CmdExecuteCommands)( + VkCommandBuffer commandBuffer, + uint32_t commandBufferCount, + const VkCommandBuffer* pCmdBuffers) +{ + ANV_FROM_HANDLE(anv_cmd_buffer, primary, commandBuffer); + + assert(primary->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY); + + /* The secondary command buffer doesn't know which textures etc. have been + * flushed prior to their execution. Apply those flushes now. + */ + genX(cmd_buffer_apply_pipe_flushes)(primary); + + for (uint32_t i = 0; i < commandBufferCount; i++) { + ANV_FROM_HANDLE(anv_cmd_buffer, secondary, pCmdBuffers[i]); + + assert(secondary->level == VK_COMMAND_BUFFER_LEVEL_SECONDARY); + + if (secondary->usage_flags & + VK_COMMAND_BUFFER_USAGE_RENDER_PASS_CONTINUE_BIT) { + /* If we're continuing a render pass from the primary, we need to + * copy the surface states for the current subpass into the storage + * we allocated for them in BeginCommandBuffer. + */ + struct anv_bo *ss_bo = &primary->device->surface_state_block_pool.bo; + struct anv_state src_state = primary->state.render_pass_states; + struct anv_state dst_state = secondary->state.render_pass_states; + assert(src_state.alloc_size == dst_state.alloc_size); + + genX(cmd_buffer_gpu_memcpy)(primary, ss_bo, dst_state.offset, + ss_bo, src_state.offset, + src_state.alloc_size); + } + + anv_cmd_buffer_add_secondary(primary, secondary); + } + + /* Each of the secondary command buffers will use its own state base + * address. We need to re-emit state base address for the primary after + * all of the secondaries are done. + * + * TODO: Maybe we want to make this a dirty bit to avoid extra state base + * address calls? + */ + genX(cmd_buffer_emit_state_base_address)(primary); +} + +#define IVB_L3SQCREG1_SQGHPCI_DEFAULT 0x00730000 +#define VLV_L3SQCREG1_SQGHPCI_DEFAULT 0x00d30000 +#define HSW_L3SQCREG1_SQGHPCI_DEFAULT 0x00610000 + +/** + * Program the hardware to use the specified L3 configuration. + */ +void +genX(cmd_buffer_config_l3)(struct anv_cmd_buffer *cmd_buffer, + const struct gen_l3_config *cfg) +{ + assert(cfg); + if (cfg == cmd_buffer->state.current_l3_config) + return; + + if (unlikely(INTEL_DEBUG & DEBUG_L3)) { + fprintf(stderr, "L3 config transition: "); + gen_dump_l3_config(cfg, stderr); + } + + const bool has_slm = cfg->n[GEN_L3P_SLM]; + + /* According to the hardware docs, the L3 partitioning can only be changed + * while the pipeline is completely drained and the caches are flushed, + * which involves a first PIPE_CONTROL flush which stalls the pipeline... + */ + anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { + pc.DCFlushEnable = true; + pc.PostSyncOperation = NoWrite; + pc.CommandStreamerStallEnable = true; + } + + /* ...followed by a second pipelined PIPE_CONTROL that initiates + * invalidation of the relevant caches. Note that because RO invalidation + * happens at the top of the pipeline (i.e. right away as the PIPE_CONTROL + * command is processed by the CS) we cannot combine it with the previous + * stalling flush as the hardware documentation suggests, because that + * would cause the CS to stall on previous rendering *after* RO + * invalidation and wouldn't prevent the RO caches from being polluted by + * concurrent rendering before the stall completes. This intentionally + * doesn't implement the SKL+ hardware workaround suggesting to enable CS + * stall on PIPE_CONTROLs with the texture cache invalidation bit set for + * GPGPU workloads because the previous and subsequent PIPE_CONTROLs + * already guarantee that there is no concurrent GPGPU kernel execution + * (see SKL HSD 2132585). + */ + anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { + pc.TextureCacheInvalidationEnable = true; + pc.ConstantCacheInvalidationEnable = true; + pc.InstructionCacheInvalidateEnable = true; + pc.StateCacheInvalidationEnable = true; + pc.PostSyncOperation = NoWrite; + } + + /* Now send a third stalling flush to make sure that invalidation is + * complete when the L3 configuration registers are modified. + */ + anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { + pc.DCFlushEnable = true; + pc.PostSyncOperation = NoWrite; + pc.CommandStreamerStallEnable = true; + } + +#if GEN_GEN >= 8 + + assert(!cfg->n[GEN_L3P_IS] && !cfg->n[GEN_L3P_C] && !cfg->n[GEN_L3P_T]); + + uint32_t l3cr; + anv_pack_struct(&l3cr, GENX(L3CNTLREG), + .SLMEnable = has_slm, + .URBAllocation = cfg->n[GEN_L3P_URB], + .ROAllocation = cfg->n[GEN_L3P_RO], + .DCAllocation = cfg->n[GEN_L3P_DC], + .AllAllocation = cfg->n[GEN_L3P_ALL]); + + /* Set up the L3 partitioning. */ + emit_lri(&cmd_buffer->batch, GENX(L3CNTLREG_num), l3cr); + +#else + + const bool has_dc = cfg->n[GEN_L3P_DC] || cfg->n[GEN_L3P_ALL]; + const bool has_is = cfg->n[GEN_L3P_IS] || cfg->n[GEN_L3P_RO] || + cfg->n[GEN_L3P_ALL]; + const bool has_c = cfg->n[GEN_L3P_C] || cfg->n[GEN_L3P_RO] || + cfg->n[GEN_L3P_ALL]; + const bool has_t = cfg->n[GEN_L3P_T] || cfg->n[GEN_L3P_RO] || + cfg->n[GEN_L3P_ALL]; + + assert(!cfg->n[GEN_L3P_ALL]); + + /* When enabled SLM only uses a portion of the L3 on half of the banks, + * the matching space on the remaining banks has to be allocated to a + * client (URB for all validated configurations) set to the + * lower-bandwidth 2-bank address hashing mode. + */ + const struct gen_device_info *devinfo = &cmd_buffer->device->info; + const bool urb_low_bw = has_slm && !devinfo->is_baytrail; + assert(!urb_low_bw || cfg->n[GEN_L3P_URB] == cfg->n[GEN_L3P_SLM]); + + /* Minimum number of ways that can be allocated to the URB. */ + MAYBE_UNUSED const unsigned n0_urb = devinfo->is_baytrail ? 32 : 0; + assert(cfg->n[GEN_L3P_URB] >= n0_urb); + + uint32_t l3sqcr1, l3cr2, l3cr3; + anv_pack_struct(&l3sqcr1, GENX(L3SQCREG1), + .ConvertDC_UC = !has_dc, + .ConvertIS_UC = !has_is, + .ConvertC_UC = !has_c, + .ConvertT_UC = !has_t); + l3sqcr1 |= + GEN_IS_HASWELL ? HSW_L3SQCREG1_SQGHPCI_DEFAULT : + devinfo->is_baytrail ? VLV_L3SQCREG1_SQGHPCI_DEFAULT : + IVB_L3SQCREG1_SQGHPCI_DEFAULT; + + anv_pack_struct(&l3cr2, GENX(L3CNTLREG2), + .SLMEnable = has_slm, + .URBLowBandwidth = urb_low_bw, + .URBAllocation = cfg->n[GEN_L3P_URB], +#if !GEN_IS_HASWELL + .ALLAllocation = cfg->n[GEN_L3P_ALL], +#endif + .ROAllocation = cfg->n[GEN_L3P_RO], + .DCAllocation = cfg->n[GEN_L3P_DC]); + + anv_pack_struct(&l3cr3, GENX(L3CNTLREG3), + .ISAllocation = cfg->n[GEN_L3P_IS], + .ISLowBandwidth = 0, + .CAllocation = cfg->n[GEN_L3P_C], + .CLowBandwidth = 0, + .TAllocation = cfg->n[GEN_L3P_T], + .TLowBandwidth = 0); + + /* Set up the L3 partitioning. */ + emit_lri(&cmd_buffer->batch, GENX(L3SQCREG1_num), l3sqcr1); + emit_lri(&cmd_buffer->batch, GENX(L3CNTLREG2_num), l3cr2); + emit_lri(&cmd_buffer->batch, GENX(L3CNTLREG3_num), l3cr3); + +#if GEN_IS_HASWELL + if (cmd_buffer->device->instance->physicalDevice.cmd_parser_version >= 4) { + /* Enable L3 atomics on HSW if we have a DC partition, otherwise keep + * them disabled to avoid crashing the system hard. + */ + uint32_t scratch1, chicken3; + anv_pack_struct(&scratch1, GENX(SCRATCH1), + .L3AtomicDisable = !has_dc); + anv_pack_struct(&chicken3, GENX(CHICKEN3), + .L3AtomicDisableMask = true, + .L3AtomicDisable = !has_dc); + emit_lri(&cmd_buffer->batch, GENX(SCRATCH1_num), scratch1); + emit_lri(&cmd_buffer->batch, GENX(CHICKEN3_num), chicken3); } +#endif + +#endif + + cmd_buffer->state.current_l3_config = cfg; } void @@ -241,6 +946,13 @@ for (uint32_t i = 0; i < imageMemoryBarrierCount; i++) { src_flags |= pImageMemoryBarriers[i].srcAccessMask; dst_flags |= pImageMemoryBarriers[i].dstAccessMask; + ANV_FROM_HANDLE(anv_image, image, pImageMemoryBarriers[i].image); + if (pImageMemoryBarriers[i].subresourceRange.aspectMask & + VK_IMAGE_ASPECT_DEPTH_BIT) { + transition_depth_buffer(cmd_buffer, image, + pImageMemoryBarriers[i].oldLayout, + pImageMemoryBarriers[i].newLayout); + } } enum anv_pipe_bits pipe_bits = 0; @@ -277,7 +989,7 @@ pipe_bits |= ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT; break; case VK_ACCESS_SHADER_READ_BIT: - case VK_ACCESS_COLOR_ATTACHMENT_READ_BIT: + case VK_ACCESS_INPUT_ATTACHMENT_READ_BIT: case VK_ACCESS_TRANSFER_READ_BIT: pipe_bits |= ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT; break; @@ -355,6 +1067,310 @@ cmd_buffer->state.push_constants_dirty |= VK_SHADER_STAGE_ALL_GRAPHICS; } +static VkResult +emit_binding_table(struct anv_cmd_buffer *cmd_buffer, + gl_shader_stage stage, + struct anv_state *bt_state) +{ + struct anv_subpass *subpass = cmd_buffer->state.subpass; + struct anv_pipeline *pipeline; + uint32_t bias, state_offset; + + switch (stage) { + case MESA_SHADER_COMPUTE: + pipeline = cmd_buffer->state.compute_pipeline; + bias = 1; + break; + default: + pipeline = cmd_buffer->state.pipeline; + bias = 0; + break; + } + + if (!anv_pipeline_has_stage(pipeline, stage)) { + *bt_state = (struct anv_state) { 0, }; + return VK_SUCCESS; + } + + struct anv_pipeline_bind_map *map = &pipeline->shaders[stage]->bind_map; + if (bias + map->surface_count == 0) { + *bt_state = (struct anv_state) { 0, }; + return VK_SUCCESS; + } + + *bt_state = anv_cmd_buffer_alloc_binding_table(cmd_buffer, + bias + map->surface_count, + &state_offset); + uint32_t *bt_map = bt_state->map; + + if (bt_state->map == NULL) + return VK_ERROR_OUT_OF_DEVICE_MEMORY; + + if (stage == MESA_SHADER_COMPUTE && + get_cs_prog_data(cmd_buffer->state.compute_pipeline)->uses_num_work_groups) { + struct anv_bo *bo = cmd_buffer->state.num_workgroups_bo; + uint32_t bo_offset = cmd_buffer->state.num_workgroups_offset; + + struct anv_state surface_state; + surface_state = + anv_cmd_buffer_alloc_surface_state(cmd_buffer); + + const enum isl_format format = + anv_isl_format_for_descriptor_type(VK_DESCRIPTOR_TYPE_STORAGE_BUFFER); + anv_fill_buffer_surface_state(cmd_buffer->device, surface_state, + format, bo_offset, 12, 1); + + bt_map[0] = surface_state.offset + state_offset; + add_surface_state_reloc(cmd_buffer, surface_state, bo, bo_offset); + } + + if (map->surface_count == 0) + goto out; + + if (map->image_count > 0) { + VkResult result = + anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, stage, images); + if (result != VK_SUCCESS) + return result; + + cmd_buffer->state.push_constants_dirty |= 1 << stage; + } + + uint32_t image = 0; + for (uint32_t s = 0; s < map->surface_count; s++) { + struct anv_pipeline_binding *binding = &map->surface_to_descriptor[s]; + + struct anv_state surface_state; + + if (binding->set == ANV_DESCRIPTOR_SET_COLOR_ATTACHMENTS) { + /* Color attachment binding */ + assert(stage == MESA_SHADER_FRAGMENT); + assert(binding->binding == 0); + if (binding->index < subpass->color_count) { + const unsigned att = subpass->color_attachments[binding->index]; + + /* From the Vulkan 1.0.46 spec: + * + * "If any color or depth/stencil attachments are + * VK_ATTACHMENT_UNUSED, then no writes occur for those + * attachments." + */ + if (att == VK_ATTACHMENT_UNUSED) { + surface_state = cmd_buffer->state.null_surface_state; + } else { + surface_state = cmd_buffer->state.attachments[att].color_rt_state; + } + } else { + surface_state = cmd_buffer->state.null_surface_state; + } + + bt_map[bias + s] = surface_state.offset + state_offset; + continue; + } + + struct anv_descriptor_set *set = + cmd_buffer->state.descriptors[binding->set]; + uint32_t offset = set->layout->binding[binding->binding].descriptor_index; + struct anv_descriptor *desc = &set->descriptors[offset + binding->index]; + + switch (desc->type) { + case VK_DESCRIPTOR_TYPE_SAMPLER: + /* Nothing for us to do here */ + continue; + + case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER: + case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE: + surface_state = desc->image_view->sampler_surface_state; + assert(surface_state.alloc_size); + add_image_view_relocs(cmd_buffer, desc->image_view, + desc->image_view->image->aux_usage, + surface_state); + break; + + case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT: + assert(stage == MESA_SHADER_FRAGMENT); + if (desc->image_view->aspect_mask != VK_IMAGE_ASPECT_COLOR_BIT) { + /* For depth and stencil input attachments, we treat it like any + * old texture that a user may have bound. + */ + surface_state = desc->image_view->sampler_surface_state; + assert(surface_state.alloc_size); + add_image_view_relocs(cmd_buffer, desc->image_view, + desc->image_view->image->aux_usage, + surface_state); + } else { + /* For color input attachments, we create the surface state at + * vkBeginRenderPass time so that we can include aux and clear + * color information. + */ + assert(binding->input_attachment_index < subpass->input_count); + const unsigned subpass_att = binding->input_attachment_index; + const unsigned att = subpass->input_attachments[subpass_att]; + surface_state = cmd_buffer->state.attachments[att].input_att_state; + } + break; + + case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE: { + surface_state = desc->image_view->storage_surface_state; + assert(surface_state.alloc_size); + add_image_view_relocs(cmd_buffer, desc->image_view, + desc->image_view->image->aux_usage, + surface_state); + + struct brw_image_param *image_param = + &cmd_buffer->state.push_constants[stage]->images[image++]; + + *image_param = desc->image_view->storage_image_param; + image_param->surface_idx = bias + s; + break; + } + + case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER: + case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER: + case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC: + case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC: + case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER: + surface_state = desc->buffer_view->surface_state; + assert(surface_state.alloc_size); + add_surface_state_reloc(cmd_buffer, surface_state, + desc->buffer_view->bo, + desc->buffer_view->offset); + break; + + case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER: + surface_state = desc->buffer_view->storage_surface_state; + assert(surface_state.alloc_size); + add_surface_state_reloc(cmd_buffer, surface_state, + desc->buffer_view->bo, + desc->buffer_view->offset); + + struct brw_image_param *image_param = + &cmd_buffer->state.push_constants[stage]->images[image++]; + + *image_param = desc->buffer_view->storage_image_param; + image_param->surface_idx = bias + s; + break; + + default: + assert(!"Invalid descriptor type"); + continue; + } + + bt_map[bias + s] = surface_state.offset + state_offset; + } + assert(image == map->image_count); + + out: + if (!cmd_buffer->device->info.has_llc) + anv_state_clflush(*bt_state); + + return VK_SUCCESS; +} + +static VkResult +emit_samplers(struct anv_cmd_buffer *cmd_buffer, + gl_shader_stage stage, + struct anv_state *state) +{ + struct anv_pipeline *pipeline; + + if (stage == MESA_SHADER_COMPUTE) + pipeline = cmd_buffer->state.compute_pipeline; + else + pipeline = cmd_buffer->state.pipeline; + + if (!anv_pipeline_has_stage(pipeline, stage)) { + *state = (struct anv_state) { 0, }; + return VK_SUCCESS; + } + + struct anv_pipeline_bind_map *map = &pipeline->shaders[stage]->bind_map; + if (map->sampler_count == 0) { + *state = (struct anv_state) { 0, }; + return VK_SUCCESS; + } + + uint32_t size = map->sampler_count * 16; + *state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, size, 32); + + if (state->map == NULL) + return VK_ERROR_OUT_OF_DEVICE_MEMORY; + + for (uint32_t s = 0; s < map->sampler_count; s++) { + struct anv_pipeline_binding *binding = &map->sampler_to_descriptor[s]; + struct anv_descriptor_set *set = + cmd_buffer->state.descriptors[binding->set]; + uint32_t offset = set->layout->binding[binding->binding].descriptor_index; + struct anv_descriptor *desc = &set->descriptors[offset + binding->index]; + + if (desc->type != VK_DESCRIPTOR_TYPE_SAMPLER && + desc->type != VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER) + continue; + + struct anv_sampler *sampler = desc->sampler; + + /* This can happen if we have an unfilled slot since TYPE_SAMPLER + * happens to be zero. + */ + if (sampler == NULL) + continue; + + memcpy(state->map + (s * 16), + sampler->state, sizeof(sampler->state)); + } + + if (!cmd_buffer->device->info.has_llc) + anv_state_clflush(*state); + + return VK_SUCCESS; +} + +static uint32_t +flush_descriptor_sets(struct anv_cmd_buffer *cmd_buffer) +{ + VkShaderStageFlags dirty = cmd_buffer->state.descriptors_dirty & + cmd_buffer->state.pipeline->active_stages; + + VkResult result = VK_SUCCESS; + anv_foreach_stage(s, dirty) { + result = emit_samplers(cmd_buffer, s, &cmd_buffer->state.samplers[s]); + if (result != VK_SUCCESS) + break; + result = emit_binding_table(cmd_buffer, s, + &cmd_buffer->state.binding_tables[s]); + if (result != VK_SUCCESS) + break; + } + + if (result != VK_SUCCESS) { + assert(result == VK_ERROR_OUT_OF_DEVICE_MEMORY); + + result = anv_cmd_buffer_new_binding_table_block(cmd_buffer); + assert(result == VK_SUCCESS); + + /* Re-emit state base addresses so we get the new surface state base + * address before we start emitting binding tables etc. + */ + genX(cmd_buffer_emit_state_base_address)(cmd_buffer); + + /* Re-emit all active binding tables */ + dirty |= cmd_buffer->state.pipeline->active_stages; + anv_foreach_stage(s, dirty) { + result = emit_samplers(cmd_buffer, s, &cmd_buffer->state.samplers[s]); + if (result != VK_SUCCESS) + return result; + result = emit_binding_table(cmd_buffer, s, + &cmd_buffer->state.binding_tables[s]); + if (result != VK_SUCCESS) + return result; + } + } + + cmd_buffer->state.descriptors_dirty &= ~dirty; + + return dirty; +} + static void cmd_buffer_emit_descriptor_pointers(struct anv_cmd_buffer *cmd_buffer, uint32_t stages) @@ -452,7 +1468,7 @@ assert((pipeline->active_stages & VK_SHADER_STAGE_COMPUTE_BIT) == 0); - genX(cmd_buffer_config_l3)(cmd_buffer, pipeline); + genX(cmd_buffer_config_l3)(cmd_buffer, pipeline->urb.l3_config); genX(flush_pipeline_select_3d)(cmd_buffer); @@ -533,6 +1549,10 @@ } #endif + /* Render targets live in the same binding table as fragment descriptors */ + if (cmd_buffer->state.dirty & ANV_CMD_DIRTY_RENDER_TARGETS) + cmd_buffer->state.descriptors_dirty |= VK_SHADER_STAGE_FRAGMENT_BIT; + /* We emit the binding tables and sampler tables first, then emit push * constants and then finally emit binding table and sampler table * pointers. It has to happen in this order, since emitting the binding @@ -542,7 +1562,7 @@ */ uint32_t dirty = 0; if (cmd_buffer->state.descriptors_dirty) - dirty = anv_cmd_buffer_flush_descriptor_sets(cmd_buffer); + dirty = flush_descriptor_sets(cmd_buffer); if (cmd_buffer->state.push_constants_dirty) { #if GEN_GEN >= 9 @@ -680,25 +1700,6 @@ #define GEN7_3DPRIM_START_INSTANCE 0x243C #define GEN7_3DPRIM_BASE_VERTEX 0x2440 -static void -emit_lrm(struct anv_batch *batch, - uint32_t reg, struct anv_bo *bo, uint32_t offset) -{ - anv_batch_emit(batch, GENX(MI_LOAD_REGISTER_MEM), lrm) { - lrm.RegisterAddress = reg; - lrm.MemoryAddress = (struct anv_address) { bo, offset }; - } -} - -static void -emit_lri(struct anv_batch *batch, uint32_t reg, uint32_t imm) -{ - anv_batch_emit(batch, GENX(MI_LOAD_REGISTER_IMM), lri) { - lri.RegisterOffset = reg; - lri.DataDWord = imm; - } -} - void genX(CmdDrawIndirect)( VkCommandBuffer commandBuffer, VkBuffer _buffer, @@ -764,6 +1765,106 @@ } } +static VkResult +flush_compute_descriptor_set(struct anv_cmd_buffer *cmd_buffer) +{ + struct anv_pipeline *pipeline = cmd_buffer->state.compute_pipeline; + struct anv_state surfaces = { 0, }, samplers = { 0, }; + VkResult result; + + result = emit_binding_table(cmd_buffer, MESA_SHADER_COMPUTE, &surfaces); + if (result != VK_SUCCESS) { + assert(result == VK_ERROR_OUT_OF_DEVICE_MEMORY); + result = anv_cmd_buffer_new_binding_table_block(cmd_buffer); + assert(result == VK_SUCCESS); + + /* Re-emit state base addresses so we get the new surface state base + * address before we start emitting binding tables etc. + */ + genX(cmd_buffer_emit_state_base_address)(cmd_buffer); + + result = emit_binding_table(cmd_buffer, MESA_SHADER_COMPUTE, &surfaces); + assert(result == VK_SUCCESS); + } + + result = emit_samplers(cmd_buffer, MESA_SHADER_COMPUTE, &samplers); + assert(result == VK_SUCCESS); + + uint32_t iface_desc_data_dw[GENX(INTERFACE_DESCRIPTOR_DATA_length)]; + struct GENX(INTERFACE_DESCRIPTOR_DATA) desc = { + .BindingTablePointer = surfaces.offset, + .SamplerStatePointer = samplers.offset, + }; + GENX(INTERFACE_DESCRIPTOR_DATA_pack)(NULL, iface_desc_data_dw, &desc); + + struct anv_state state = + anv_cmd_buffer_merge_dynamic(cmd_buffer, iface_desc_data_dw, + pipeline->interface_descriptor_data, + GENX(INTERFACE_DESCRIPTOR_DATA_length), + 64); + + uint32_t size = GENX(INTERFACE_DESCRIPTOR_DATA_length) * sizeof(uint32_t); + anv_batch_emit(&cmd_buffer->batch, + GENX(MEDIA_INTERFACE_DESCRIPTOR_LOAD), mid) { + mid.InterfaceDescriptorTotalLength = size; + mid.InterfaceDescriptorDataStartAddress = state.offset; + } + + return VK_SUCCESS; +} + +void +genX(cmd_buffer_flush_compute_state)(struct anv_cmd_buffer *cmd_buffer) +{ + struct anv_pipeline *pipeline = cmd_buffer->state.compute_pipeline; + MAYBE_UNUSED VkResult result; + + assert(pipeline->active_stages == VK_SHADER_STAGE_COMPUTE_BIT); + + genX(cmd_buffer_config_l3)(cmd_buffer, pipeline->urb.l3_config); + + genX(flush_pipeline_select_gpgpu)(cmd_buffer); + + if (cmd_buffer->state.compute_dirty & ANV_CMD_DIRTY_PIPELINE) { + /* From the Sky Lake PRM Vol 2a, MEDIA_VFE_STATE: + * + * "A stalling PIPE_CONTROL is required before MEDIA_VFE_STATE unless + * the only bits that are changed are scoreboard related: Scoreboard + * Enable, Scoreboard Type, Scoreboard Mask, Scoreboard * Delta. For + * these scoreboard related states, a MEDIA_STATE_FLUSH is + * sufficient." + */ + cmd_buffer->state.pending_pipe_bits |= ANV_PIPE_CS_STALL_BIT; + genX(cmd_buffer_apply_pipe_flushes)(cmd_buffer); + + anv_batch_emit_batch(&cmd_buffer->batch, &pipeline->batch); + } + + if ((cmd_buffer->state.descriptors_dirty & VK_SHADER_STAGE_COMPUTE_BIT) || + (cmd_buffer->state.compute_dirty & ANV_CMD_DIRTY_PIPELINE)) { + /* FIXME: figure out descriptors for gen7 */ + result = flush_compute_descriptor_set(cmd_buffer); + assert(result == VK_SUCCESS); + cmd_buffer->state.descriptors_dirty &= ~VK_SHADER_STAGE_COMPUTE_BIT; + } + + if (cmd_buffer->state.push_constants_dirty & VK_SHADER_STAGE_COMPUTE_BIT) { + struct anv_state push_state = + anv_cmd_buffer_cs_push_constants(cmd_buffer); + + if (push_state.alloc_size) { + anv_batch_emit(&cmd_buffer->batch, GENX(MEDIA_CURBE_LOAD), curbe) { + curbe.CURBETotalDataLength = push_state.alloc_size; + curbe.CURBEDataStartAddress = push_state.offset; + } + } + } + + cmd_buffer->state.compute_dirty = 0; + + genX(cmd_buffer_apply_pipe_flushes)(cmd_buffer); +} + #if GEN_GEN == 7 static bool @@ -938,33 +2039,33 @@ */ if (pipeline == GPGPU) anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_CC_STATE_POINTERS), t); -#elif GEN_GEN <= 7 - /* From "BXML » GT » MI » vol1a GPU Overview » [Instruction] - * PIPELINE_SELECT [DevBWR+]": - * - * Project: DEVSNB+ - * - * Software must ensure all the write caches are flushed through a - * stalling PIPE_CONTROL command followed by another PIPE_CONTROL - * command to invalidate read only caches prior to programming - * MI_PIPELINE_SELECT command to change the Pipeline Select Mode. - */ - anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { - pc.RenderTargetCacheFlushEnable = true; - pc.DepthCacheFlushEnable = true; - pc.DCFlushEnable = true; - pc.PostSyncOperation = NoWrite; - pc.CommandStreamerStallEnable = true; - } - - anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { - pc.TextureCacheInvalidationEnable = true; - pc.ConstantCacheInvalidationEnable = true; - pc.StateCacheInvalidationEnable = true; - pc.InstructionCacheInvalidateEnable = true; - pc.PostSyncOperation = NoWrite; - } #endif + + /* From "BXML » GT » MI » vol1a GPU Overview » [Instruction] + * PIPELINE_SELECT [DevBWR+]": + * + * Project: DEVSNB+ + * + * Software must ensure all the write caches are flushed through a + * stalling PIPE_CONTROL command followed by another PIPE_CONTROL + * command to invalidate read only caches prior to programming + * MI_PIPELINE_SELECT command to change the Pipeline Select Mode. + */ + anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { + pc.RenderTargetCacheFlushEnable = true; + pc.DepthCacheFlushEnable = true; + pc.DCFlushEnable = true; + pc.PostSyncOperation = NoWrite; + pc.CommandStreamerStallEnable = true; + } + + anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { + pc.TextureCacheInvalidationEnable = true; + pc.ConstantCacheInvalidationEnable = true; + pc.StateCacheInvalidationEnable = true; + pc.InstructionCacheInvalidateEnable = true; + pc.PostSyncOperation = NoWrite; + } } void @@ -1001,34 +2102,78 @@ } } -struct anv_state -genX(cmd_buffer_alloc_null_surface_state)(struct anv_cmd_buffer *cmd_buffer, - struct anv_framebuffer *fb) +void +genX(cmd_buffer_emit_gen7_depth_flush)(struct anv_cmd_buffer *cmd_buffer) { - struct anv_state state = - anv_state_stream_alloc(&cmd_buffer->surface_state_stream, 64, 64); - - struct GENX(RENDER_SURFACE_STATE) null_ss = { - .SurfaceType = SURFTYPE_NULL, - .SurfaceArray = fb->layers > 0, - .SurfaceFormat = ISL_FORMAT_R8G8B8A8_UNORM, -#if GEN_GEN >= 8 - .TileMode = YMAJOR, -#else - .TiledSurface = true, -#endif - .Width = fb->width - 1, - .Height = fb->height - 1, - .Depth = fb->layers - 1, - .RenderTargetViewExtent = fb->layers - 1, - }; - - GENX(RENDER_SURFACE_STATE_pack)(NULL, state.map, &null_ss); + if (GEN_GEN >= 8) + return; - if (!cmd_buffer->device->info.has_llc) - anv_state_clflush(state); + /* From the Haswell PRM, documentation for 3DSTATE_DEPTH_BUFFER: + * + * "Restriction: Prior to changing Depth/Stencil Buffer state (i.e., any + * combination of 3DSTATE_DEPTH_BUFFER, 3DSTATE_CLEAR_PARAMS, + * 3DSTATE_STENCIL_BUFFER, 3DSTATE_HIER_DEPTH_BUFFER) SW must first + * issue a pipelined depth stall (PIPE_CONTROL with Depth Stall bit + * set), followed by a pipelined depth cache flush (PIPE_CONTROL with + * Depth Flush Bit set, followed by another pipelined depth stall + * (PIPE_CONTROL with Depth Stall Bit set), unless SW can otherwise + * guarantee that the pipeline from WM onwards is already flushed (e.g., + * via a preceding MI_FLUSH)." + */ + anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pipe) { + pipe.DepthStallEnable = true; + } + anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pipe) { + pipe.DepthCacheFlushEnable = true; + } + anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pipe) { + pipe.DepthStallEnable = true; + } +} - return state; +static uint32_t +depth_stencil_surface_type(enum isl_surf_dim dim) +{ + switch (dim) { + case ISL_SURF_DIM_1D: + if (GEN_GEN >= 9) { + /* From the Sky Lake PRM, 3DSTATAE_DEPTH_BUFFER::SurfaceType + * + * Programming Notes: + * The Surface Type of the depth buffer must be the same as the + * Surface Type of the render target(s) (defined in + * SURFACE_STATE), unless either the depth buffer or render + * targets are SURFTYPE_NULL (see exception below for SKL). 1D + * surface type not allowed for depth surface and stencil surface. + * + * Workaround: + * If depth/stencil is enabled with 1D render target, + * depth/stencil surface type needs to be set to 2D surface type + * and height set to 1. Depth will use (legacy) TileY and stencil + * will use TileW. For this case only, the Surface Type of the + * depth buffer can be 2D while the Surface Type of the render + * target(s) are 1D, representing an exception to a programming + * note above. + */ + return SURFTYPE_2D; + } else { + return SURFTYPE_1D; + } + case ISL_SURF_DIM_2D: + return SURFTYPE_2D; + case ISL_SURF_DIM_3D: + if (GEN_GEN >= 9) { + /* The Sky Lake docs list the value for 3D as "Reserved". However, + * they have the exact same layout as 2D arrays on gen9+, so we can + * just use 2D here. + */ + return SURFTYPE_2D; + } else { + return SURFTYPE_3D; + } + default: + unreachable("Invalid surface dimension"); + } } static void @@ -1040,19 +2185,25 @@ anv_cmd_buffer_get_depth_stencil_view(cmd_buffer); const struct anv_image *image = iview ? iview->image : NULL; const bool has_depth = image && (image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT); + const uint32_t ds = cmd_buffer->state.subpass->depth_stencil_attachment; + const bool has_hiz = image != NULL && + cmd_buffer->state.attachments[ds].aux_usage == ISL_AUX_USAGE_HIZ; const bool has_stencil = image && (image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT); /* FIXME: Implement the PMA stall W/A */ /* FIXME: Width and Height are wrong */ + genX(cmd_buffer_emit_gen7_depth_flush)(cmd_buffer); + /* Emit 3DSTATE_DEPTH_BUFFER */ if (has_depth) { anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_DEPTH_BUFFER), db) { - db.SurfaceType = SURFTYPE_2D; + db.SurfaceType = + depth_stencil_surface_type(image->depth_surface.isl.dim); db.DepthWriteEnable = true; db.StencilWriteEnable = has_stencil; - db.HierarchicalDepthBufferEnable = false; + db.HierarchicalDepthBufferEnable = has_hiz; db.SurfaceFormat = isl_surf_get_depth_format(&device->isl_dev, &image->depth_surface.isl); @@ -1061,20 +2212,23 @@ .bo = image->bo, .offset = image->offset + image->depth_surface.offset, }; - db.DepthBufferObjectControlState = GENX(MOCS), + db.DepthBufferObjectControlState = GENX(MOCS); db.SurfacePitch = image->depth_surface.isl.row_pitch - 1; db.Height = image->extent.height - 1; db.Width = image->extent.width - 1; - db.LOD = iview->base_mip; - db.Depth = image->array_size - 1; /* FIXME: 3-D */ - db.MinimumArrayElement = iview->base_layer; + db.LOD = iview->isl.base_level; + db.MinimumArrayElement = iview->isl.base_array_layer; + + assert(image->depth_surface.isl.dim != ISL_SURF_DIM_3D); + db.Depth = + db.RenderTargetViewExtent = + iview->isl.array_len - iview->isl.base_array_layer - 1; #if GEN_GEN >= 8 db.SurfaceQPitch = - isl_surf_get_array_pitch_el_rows(&image->depth_surface.isl) >> 2, + isl_surf_get_array_pitch_el_rows(&image->depth_surface.isl) >> 2; #endif - db.RenderTargetViewExtent = 1 - 1; } } else { /* Even when no depth buffer is present, the hardware requires that @@ -1096,31 +2250,61 @@ * be combined with a stencil buffer so we use D32_FLOAT instead. */ anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_DEPTH_BUFFER), db) { - db.SurfaceType = SURFTYPE_2D; + if (has_stencil) { + db.SurfaceType = + depth_stencil_surface_type(image->stencil_surface.isl.dim); + } else { + db.SurfaceType = SURFTYPE_2D; + } db.SurfaceFormat = D32_FLOAT; - db.Width = fb->width - 1; - db.Height = fb->height - 1; + db.Width = MAX2(fb->width, 1) - 1; + db.Height = MAX2(fb->height, 1) - 1; db.StencilWriteEnable = has_stencil; } } + if (has_hiz) { + anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_HIER_DEPTH_BUFFER), hdb) { + hdb.HierarchicalDepthBufferObjectControlState = GENX(MOCS); + hdb.SurfacePitch = image->aux_surface.isl.row_pitch - 1; + hdb.SurfaceBaseAddress = (struct anv_address) { + .bo = image->bo, + .offset = image->offset + image->aux_surface.offset, + }; +#if GEN_GEN >= 8 + /* From the SKL PRM Vol2a: + * + * The interpretation of this field is dependent on Surface Type + * as follows: + * - SURFTYPE_1D: distance in pixels between array slices + * - SURFTYPE_2D/CUBE: distance in rows between array slices + * - SURFTYPE_3D: distance in rows between R - slices + * + * Unfortunately, the docs aren't 100% accurate here. They fail to + * mention that the 1-D rule only applies to linear 1-D images. + * Since depth and HiZ buffers are always tiled, they are treated as + * 2-D images. Prior to Sky Lake, this field is always in rows. + */ + hdb.SurfaceQPitch = + isl_surf_get_array_pitch_sa_rows(&image->aux_surface.isl) >> 2; +#endif + } + } else { + anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_HIER_DEPTH_BUFFER), hdb); + } + /* Emit 3DSTATE_STENCIL_BUFFER */ if (has_stencil) { anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_STENCIL_BUFFER), sb) { #if GEN_GEN >= 8 || GEN_IS_HASWELL - sb.StencilBufferEnable = true, + sb.StencilBufferEnable = true; #endif - sb.StencilBufferObjectControlState = GENX(MOCS), + sb.StencilBufferObjectControlState = GENX(MOCS); - /* Stencil buffers have strange pitch. The PRM says: - * - * The pitch must be set to 2x the value computed based on width, - * as the stencil buffer is stored with two rows interleaved. - */ - sb.SurfacePitch = 2 * image->stencil_surface.isl.row_pitch - 1, + sb.SurfacePitch = image->stencil_surface.isl.row_pitch - 1; #if GEN_GEN >= 8 - sb.SurfaceQPitch = isl_surf_get_array_pitch_el_rows(&image->stencil_surface.isl) >> 2, + sb.SurfaceQPitch = isl_surf_get_array_pitch_el_rows(&image->stencil_surface.isl) >> 2; #endif sb.SurfaceBaseAddress = (struct anv_address) { .bo = image->bo, @@ -1131,25 +2315,52 @@ anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_STENCIL_BUFFER), sb); } - /* Disable hierarchial depth buffers. */ - anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_HIER_DEPTH_BUFFER), hz); - - /* Clear the clear params. */ - anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_CLEAR_PARAMS), cp); + /* From the IVB PRM Vol2P1, 11.5.5.4 3DSTATE_CLEAR_PARAMS: + * + * 3DSTATE_CLEAR_PARAMS must always be programmed in the along with + * the other Depth/Stencil state commands(i.e. 3DSTATE_DEPTH_BUFFER, + * 3DSTATE_STENCIL_BUFFER, or 3DSTATE_HIER_DEPTH_BUFFER) + * + * Testing also shows that some variant of this restriction may exist HSW+. + * On BDW+, it is not possible to emit 2 of these packets consecutively when + * both have DepthClearValueValid set. An analysis of such state programming + * on SKL showed that the GPU doesn't register the latter packet's clear + * value. + */ + anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_CLEAR_PARAMS), cp) { + if (has_hiz) { + cp.DepthClearValueValid = true; + cp.DepthClearValue = ANV_HZ_FC_VAL; + } + } } -/** - * @see anv_cmd_buffer_set_subpass() - */ -void +static void genX(cmd_buffer_set_subpass)(struct anv_cmd_buffer *cmd_buffer, struct anv_subpass *subpass) { cmd_buffer->state.subpass = subpass; - cmd_buffer->state.descriptors_dirty |= VK_SHADER_STAGE_FRAGMENT_BIT; + cmd_buffer->state.dirty |= ANV_CMD_DIRTY_RENDER_TARGETS; + + const struct anv_image_view *iview = + anv_cmd_buffer_get_depth_stencil_view(cmd_buffer); + + if (iview && iview->image->aux_usage == ISL_AUX_USAGE_HIZ) { + const uint32_t ds = subpass->depth_stencil_attachment; + transition_depth_buffer(cmd_buffer, iview->image, + cmd_buffer->state.attachments[ds].current_layout, + cmd_buffer->state.subpass->depth_stencil_layout); + cmd_buffer->state.attachments[ds].current_layout = + cmd_buffer->state.subpass->depth_stencil_layout; + cmd_buffer->state.attachments[ds].aux_usage = + layout_to_hiz_usage(cmd_buffer->state.subpass->depth_stencil_layout, + iview->image->samples); + } cmd_buffer_emit_depth_stencil(cmd_buffer); + + anv_cmd_buffer_clear_subpass(cmd_buffer); } void genX(CmdBeginRenderPass)( @@ -1164,12 +2375,11 @@ cmd_buffer->state.framebuffer = framebuffer; cmd_buffer->state.pass = pass; cmd_buffer->state.render_area = pRenderPassBegin->renderArea; - anv_cmd_state_setup_attachments(cmd_buffer, pRenderPassBegin); + genX(cmd_buffer_setup_attachments)(cmd_buffer, pass, pRenderPassBegin); genX(flush_pipeline_select_3d)(cmd_buffer); genX(cmd_buffer_set_subpass)(cmd_buffer, pass->subpasses); - anv_cmd_buffer_clear_subpass(cmd_buffer); } void genX(CmdNextSubpass)( @@ -1180,9 +2390,22 @@ assert(cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY); + const struct anv_image_view *iview = + anv_cmd_buffer_get_depth_stencil_view(cmd_buffer); + + if (iview && iview->image->aux_usage == ISL_AUX_USAGE_HIZ) { + const uint32_t ds = cmd_buffer->state.subpass->depth_stencil_attachment; + + if (cmd_buffer->state.subpass - cmd_buffer->state.pass->subpasses == + cmd_buffer->state.pass->attachments[ds].last_subpass_idx) { + transition_depth_buffer(cmd_buffer, iview->image, + cmd_buffer->state.attachments[ds].current_layout, + cmd_buffer->state.pass->attachments[ds].final_layout); + } + } + anv_cmd_buffer_resolve_subpass(cmd_buffer); genX(cmd_buffer_set_subpass)(cmd_buffer, cmd_buffer->state.subpass + 1); - anv_cmd_buffer_clear_subpass(cmd_buffer); } void genX(CmdEndRenderPass)( @@ -1190,7 +2413,25 @@ { ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); + const struct anv_image_view *iview = + anv_cmd_buffer_get_depth_stencil_view(cmd_buffer); + + if (iview && iview->image->aux_usage == ISL_AUX_USAGE_HIZ) { + const uint32_t ds = cmd_buffer->state.subpass->depth_stencil_attachment; + + if (cmd_buffer->state.subpass - cmd_buffer->state.pass->subpasses == + cmd_buffer->state.pass->attachments[ds].last_subpass_idx) { + transition_depth_buffer(cmd_buffer, iview->image, + cmd_buffer->state.attachments[ds].current_layout, + cmd_buffer->state.pass->attachments[ds].final_layout); + } + } + anv_cmd_buffer_resolve_subpass(cmd_buffer); + +#ifndef NDEBUG + anv_dump_add_framebuffer(cmd_buffer, cmd_buffer->state.framebuffer); +#endif } static void @@ -1220,6 +2461,36 @@ } } +void genX(CmdResetQueryPool)( + VkCommandBuffer commandBuffer, + VkQueryPool queryPool, + uint32_t firstQuery, + uint32_t queryCount) +{ + ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); + ANV_FROM_HANDLE(anv_query_pool, pool, queryPool); + + for (uint32_t i = 0; i < queryCount; i++) { + switch (pool->type) { + case VK_QUERY_TYPE_OCCLUSION: + case VK_QUERY_TYPE_TIMESTAMP: { + anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_DATA_IMM), sdm) { + sdm.Address = (struct anv_address) { + .bo = &pool->bo, + .offset = (firstQuery + i) * sizeof(struct anv_query_pool_slot) + + offsetof(struct anv_query_pool_slot, available), + }; + sdm.DataDWord0 = 0; + sdm.DataDWord1 = 0; + } + break; + } + default: + assert(!"Invalid query type"); + } + } +} + void genX(CmdBeginQuery)( VkCommandBuffer commandBuffer, VkQueryPool queryPool, @@ -1307,8 +2578,8 @@ default: /* Everything else is bottom-of-pipe */ anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { - pc.DestinationAddressType = DAT_PPGTT, - pc.PostSyncOperation = WriteTimestamp, + pc.DestinationAddressType = DAT_PPGTT; + pc.PostSyncOperation = WriteTimestamp; pc.Address = (struct anv_address) { &pool->bo, offset }; if (GEN_GEN == 9 && cmd_buffer->device->info.gt == 4) @@ -1317,7 +2588,7 @@ break; } - emit_query_availability(cmd_buffer, &pool->bo, query + 16); + emit_query_availability(cmd_buffer, &pool->bo, offset + 16); } #if GEN_GEN > 7 || GEN_IS_HASWELL diff -Nru mesa-12.0.6/src/intel/vulkan/genX_gpu_memcpy.c mesa-17.0.7/src/intel/vulkan/genX_gpu_memcpy.c --- mesa-12.0.6/src/intel/vulkan/genX_gpu_memcpy.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/genX_gpu_memcpy.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,232 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "anv_private.h" + +#include "genxml/gen_macros.h" +#include "genxml/genX_pack.h" + +#include "common/gen_l3_config.h" + +/** + * This file implements some lightweight memcpy/memset operations on the GPU + * using a vertex buffer and streamout. + */ + +/** + * Returns the greatest common divisor of a and b that is a power of two. + */ +static inline uint64_t +gcd_pow2_u64(uint64_t a, uint64_t b) +{ + assert(a > 0 || b > 0); + + unsigned a_log2 = ffsll(a) - 1; + unsigned b_log2 = ffsll(b) - 1; + + /* If either a or b is 0, then a_log2 or b_log2 will be UINT_MAX in which + * case, the MIN2() will take the other one. If both are 0 then we will + * hit the assert above. + */ + return 1 << MIN2(a_log2, b_log2); +} + +void +genX(cmd_buffer_gpu_memcpy)(struct anv_cmd_buffer *cmd_buffer, + struct anv_bo *dst, uint32_t dst_offset, + struct anv_bo *src, uint32_t src_offset, + uint32_t size) +{ + if (size == 0) + return; + + assert(dst_offset + size <= dst->size); + assert(src_offset + size <= src->size); + + /* The maximum copy block size is 4 32-bit components at a time. */ + unsigned bs = 16; + bs = gcd_pow2_u64(bs, src_offset); + bs = gcd_pow2_u64(bs, dst_offset); + bs = gcd_pow2_u64(bs, size); + + enum isl_format format; + switch (bs) { + case 4: format = ISL_FORMAT_R32_UINT; break; + case 8: format = ISL_FORMAT_R32G32_UINT; break; + case 16: format = ISL_FORMAT_R32G32B32A32_UINT; break; + default: + unreachable("Invalid size"); + } + + if (!cmd_buffer->state.current_l3_config) { + const struct gen_l3_config *cfg = + gen_get_default_l3_config(&cmd_buffer->device->info); + genX(cmd_buffer_config_l3)(cmd_buffer, cfg); + } + + genX(cmd_buffer_apply_pipe_flushes)(cmd_buffer); + + genX(flush_pipeline_select_3d)(cmd_buffer); + + uint32_t *dw; + dw = anv_batch_emitn(&cmd_buffer->batch, 5, GENX(3DSTATE_VERTEX_BUFFERS)); + GENX(VERTEX_BUFFER_STATE_pack)(&cmd_buffer->batch, dw + 1, + &(struct GENX(VERTEX_BUFFER_STATE)) { + .VertexBufferIndex = 32, /* Reserved for this */ + .AddressModifyEnable = true, + .BufferStartingAddress = { src, src_offset }, + .BufferPitch = bs, +#if (GEN_GEN >= 8) + .MemoryObjectControlState = GENX(MOCS), + .BufferSize = size, +#else + .VertexBufferMemoryObjectControlState = GENX(MOCS), + .EndAddress = { src, src_offset + size - 1 }, +#endif + }); + + dw = anv_batch_emitn(&cmd_buffer->batch, 3, GENX(3DSTATE_VERTEX_ELEMENTS)); + GENX(VERTEX_ELEMENT_STATE_pack)(&cmd_buffer->batch, dw + 1, + &(struct GENX(VERTEX_ELEMENT_STATE)) { + .VertexBufferIndex = 32, + .Valid = true, + .SourceElementFormat = format, + .SourceElementOffset = 0, + .Component0Control = (bs >= 4) ? VFCOMP_STORE_SRC : VFCOMP_STORE_0, + .Component1Control = (bs >= 8) ? VFCOMP_STORE_SRC : VFCOMP_STORE_0, + .Component2Control = (bs >= 12) ? VFCOMP_STORE_SRC : VFCOMP_STORE_0, + .Component3Control = (bs >= 16) ? VFCOMP_STORE_SRC : VFCOMP_STORE_0, + }); + +#if GEN_GEN >= 8 + anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_VF_SGVS), sgvs); +#endif + + /* Disable all shader stages */ + anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_VS), vs); + anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_HS), hs); + anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_TE), te); + anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_DS), DS); + anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_GS), gs); + anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_PS), gs); + + anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_SBE), sbe) { + sbe.VertexURBEntryReadOffset = 1; + sbe.NumberofSFOutputAttributes = 1; + sbe.VertexURBEntryReadLength = 1; +#if GEN_GEN >= 8 + sbe.ForceVertexURBEntryReadLength = true; + sbe.ForceVertexURBEntryReadOffset = true; +#endif + +#if GEN_GEN >= 9 + for (unsigned i = 0; i < 32; i++) + sbe.AttributeActiveComponentFormat[i] = ACF_XYZW; +#endif + } + + /* Emit URB setup. We tell it that the VS is active because we want it to + * allocate space for the VS. Even though one isn't run, we need VUEs to + * store the data that VF is going to pass to SOL. + */ + const unsigned entry_size[4] = { DIV_ROUND_UP(32, 64), 1, 1, 1 }; + + genX(emit_urb_setup)(cmd_buffer->device, &cmd_buffer->batch, + cmd_buffer->state.current_l3_config, + VK_SHADER_STAGE_VERTEX_BIT, entry_size); + + anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_SO_BUFFER), sob) { + sob.SOBufferIndex = 0; + sob.SOBufferObjectControlState = GENX(MOCS); + sob.SurfaceBaseAddress = (struct anv_address) { dst, dst_offset }; + +#if GEN_GEN >= 8 + sob.SOBufferEnable = true; + sob.SurfaceSize = size - 1; +#else + sob.SurfacePitch = bs; + sob.SurfaceEndAddress = sob.SurfaceBaseAddress; + sob.SurfaceEndAddress.offset += size; +#endif + +#if GEN_GEN >= 8 + /* As SOL writes out data, it updates the SO_WRITE_OFFSET registers with + * the end position of the stream. We need to reset this value to 0 at + * the beginning of the run or else SOL will start at the offset from + * the previous draw. + */ + sob.StreamOffsetWriteEnable = true; + sob.StreamOffset = 0; +#endif + } + +#if GEN_GEN <= 7 + /* The hardware can do this for us on BDW+ (see above) */ + anv_batch_emit(&cmd_buffer->batch, GENX(MI_LOAD_REGISTER_IMM), load) { + load.RegisterOffset = GENX(SO_WRITE_OFFSET0_num); + load.DataDWord = 0; + } +#endif + + dw = anv_batch_emitn(&cmd_buffer->batch, 5, GENX(3DSTATE_SO_DECL_LIST), + .StreamtoBufferSelects0 = (1 << 0), + .NumEntries0 = 1); + GENX(SO_DECL_ENTRY_pack)(&cmd_buffer->batch, dw + 3, + &(struct GENX(SO_DECL_ENTRY)) { + .Stream0Decl = { + .OutputBufferSlot = 0, + .RegisterIndex = 0, + .ComponentMask = (1 << (bs / 4)) - 1, + }, + }); + + anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_STREAMOUT), so) { + so.SOFunctionEnable = true; + so.RenderingDisable = true; + so.Stream0VertexReadOffset = 0; + so.Stream0VertexReadLength = DIV_ROUND_UP(32, 64); +#if GEN_GEN >= 8 + so.Buffer0SurfacePitch = bs; +#else + so.SOBufferEnable0 = true; +#endif + } + +#if GEN_GEN >= 8 + anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_VF_TOPOLOGY), topo) { + topo.PrimitiveTopologyType = _3DPRIM_POINTLIST; + } +#endif + + anv_batch_emit(&cmd_buffer->batch, GENX(3DPRIMITIVE), prim) { + prim.VertexAccessType = SEQUENTIAL; + prim.PrimitiveTopologyType = _3DPRIM_POINTLIST; + prim.VertexCountPerInstance = size / bs; + prim.StartVertexLocation = 0; + prim.InstanceCount = 1; + prim.StartInstanceLocation = 0; + prim.BaseVertexLocation = 0; + } + + cmd_buffer->state.dirty |= ANV_CMD_DIRTY_PIPELINE; +} diff -Nru mesa-12.0.6/src/intel/vulkan/genX_l3.c mesa-17.0.7/src/intel/vulkan/genX_l3.c --- mesa-12.0.6/src/intel/vulkan/genX_l3.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/genX_l3.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,545 +0,0 @@ -/* - * Copyright (c) 2015 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - -#include "anv_private.h" - -#include "genxml/gen_macros.h" -#include "genxml/genX_pack.h" - -/** - * Chunk of L3 cache reserved for some specific purpose. - */ -enum anv_l3_partition { - /** Shared local memory. */ - L3P_SLM = 0, - /** Unified return buffer. */ - L3P_URB, - /** Union of DC and RO. */ - L3P_ALL, - /** Data cluster RW partition. */ - L3P_DC, - /** Union of IS, C and T. */ - L3P_RO, - /** Instruction and state cache. */ - L3P_IS, - /** Constant cache. */ - L3P_C, - /** Texture cache. */ - L3P_T, - /** Number of supported L3 partitions. */ - NUM_L3P -}; - -/** - * L3 configuration represented as the number of ways allocated for each - * partition. \sa get_l3_way_size(). - */ -struct anv_l3_config { - unsigned n[NUM_L3P]; -}; - -#if GEN_GEN == 7 - -/** - * IVB/HSW validated L3 configurations. The first entry will be used as - * default by gen7_restore_default_l3_config(), otherwise the ordering is - * unimportant. - */ -static const struct anv_l3_config ivb_l3_configs[] = { - /* SLM URB ALL DC RO IS C T */ - {{ 0, 32, 0, 0, 32, 0, 0, 0 }}, - {{ 0, 32, 0, 16, 16, 0, 0, 0 }}, - {{ 0, 32, 0, 4, 0, 8, 4, 16 }}, - {{ 0, 28, 0, 8, 0, 8, 4, 16 }}, - {{ 0, 28, 0, 16, 0, 8, 4, 8 }}, - {{ 0, 28, 0, 8, 0, 16, 4, 8 }}, - {{ 0, 28, 0, 0, 0, 16, 4, 16 }}, - {{ 0, 32, 0, 0, 0, 16, 0, 16 }}, - {{ 0, 28, 0, 4, 32, 0, 0, 0 }}, - {{ 16, 16, 0, 16, 16, 0, 0, 0 }}, - {{ 16, 16, 0, 8, 0, 8, 8, 8 }}, - {{ 16, 16, 0, 4, 0, 8, 4, 16 }}, - {{ 16, 16, 0, 4, 0, 16, 4, 8 }}, - {{ 16, 16, 0, 0, 32, 0, 0, 0 }}, - {{ 0 }} -}; - -#endif - -#if GEN_GEN == 7 && !GEN_IS_HASWELL - -/** - * VLV validated L3 configurations. \sa ivb_l3_configs. - */ -static const struct anv_l3_config vlv_l3_configs[] = { - /* SLM URB ALL DC RO IS C T */ - {{ 0, 64, 0, 0, 32, 0, 0, 0 }}, - {{ 0, 80, 0, 0, 16, 0, 0, 0 }}, - {{ 0, 80, 0, 8, 8, 0, 0, 0 }}, - {{ 0, 64, 0, 16, 16, 0, 0, 0 }}, - {{ 0, 60, 0, 4, 32, 0, 0, 0 }}, - {{ 32, 32, 0, 16, 16, 0, 0, 0 }}, - {{ 32, 40, 0, 8, 16, 0, 0, 0 }}, - {{ 32, 40, 0, 16, 8, 0, 0, 0 }}, - {{ 0 }} -}; - -#endif - -#if GEN_GEN == 8 - -/** - * BDW validated L3 configurations. \sa ivb_l3_configs. - */ -static const struct anv_l3_config bdw_l3_configs[] = { - /* SLM URB ALL DC RO IS C T */ - {{ 0, 48, 48, 0, 0, 0, 0, 0 }}, - {{ 0, 48, 0, 16, 32, 0, 0, 0 }}, - {{ 0, 32, 0, 16, 48, 0, 0, 0 }}, - {{ 0, 32, 0, 0, 64, 0, 0, 0 }}, - {{ 0, 32, 64, 0, 0, 0, 0, 0 }}, - {{ 24, 16, 48, 0, 0, 0, 0, 0 }}, - {{ 24, 16, 0, 16, 32, 0, 0, 0 }}, - {{ 24, 16, 0, 32, 16, 0, 0, 0 }}, - {{ 0 }} -}; - -#endif - -#if GEN_GEN == 8 || GEN_GEN == 9 - -/** - * CHV/SKL validated L3 configurations. \sa ivb_l3_configs. - */ -static const struct anv_l3_config chv_l3_configs[] = { - /* SLM URB ALL DC RO IS C T */ - {{ 0, 48, 48, 0, 0, 0, 0, 0 }}, - {{ 0, 48, 0, 16, 32, 0, 0, 0 }}, - {{ 0, 32, 0, 16, 48, 0, 0, 0 }}, - {{ 0, 32, 0, 0, 64, 0, 0, 0 }}, - {{ 0, 32, 64, 0, 0, 0, 0, 0 }}, - {{ 32, 16, 48, 0, 0, 0, 0, 0 }}, - {{ 32, 16, 0, 16, 32, 0, 0, 0 }}, - {{ 32, 16, 0, 32, 16, 0, 0, 0 }}, - {{ 0 }} -}; - -#endif - -/** - * Return a zero-terminated array of validated L3 configurations for the - * specified device. - */ -static inline const struct anv_l3_config * -get_l3_configs(const struct brw_device_info *devinfo) -{ - assert(devinfo->gen == GEN_GEN); -#if GEN_IS_HASWELL - return ivb_l3_configs; -#elif GEN_GEN == 7 - return (devinfo->is_baytrail ? vlv_l3_configs : ivb_l3_configs); -#elif GEN_GEN == 8 - return (devinfo->is_cherryview ? chv_l3_configs : bdw_l3_configs); -#elif GEN_GEN == 9 - return chv_l3_configs; -#else -#error GEN not supported -#endif -} - -/** - * Return the size of an L3 way in KB. - */ -static unsigned -get_l3_way_size(const struct brw_device_info *devinfo) -{ - if (devinfo->is_baytrail) - return 2; - - else if (devinfo->is_cherryview || devinfo->gt == 1) - return 4; - - else - return 8 * devinfo->num_slices; -} - -/** - * L3 configuration represented as a vector of weights giving the desired - * relative size of each partition. The scale is arbitrary, only the ratios - * between weights will have an influence on the selection of the closest L3 - * configuration. - */ -struct anv_l3_weights { - float w[NUM_L3P]; -}; - -/** - * L1-normalize a vector of L3 partition weights. - */ -static struct anv_l3_weights -norm_l3_weights(struct anv_l3_weights w) -{ - float sz = 0; - - for (unsigned i = 0; i < NUM_L3P; i++) - sz += w.w[i]; - - for (unsigned i = 0; i < NUM_L3P; i++) - w.w[i] /= sz; - - return w; -} - -/** - * Get the relative partition weights of the specified L3 configuration. - */ -static struct anv_l3_weights -get_config_l3_weights(const struct anv_l3_config *cfg) -{ - if (cfg) { - struct anv_l3_weights w; - - for (unsigned i = 0; i < NUM_L3P; i++) - w.w[i] = cfg->n[i]; - - return norm_l3_weights(w); - } else { - const struct anv_l3_weights w = { { 0 } }; - return w; - } -} - -/** - * Distance between two L3 configurations represented as vectors of weights. - * Usually just the L1 metric except when the two configurations are - * considered incompatible in which case the distance will be infinite. Note - * that the compatibility condition is asymmetric -- They will be considered - * incompatible whenever the reference configuration \p w0 requires SLM, DC, - * or URB but \p w1 doesn't provide it. - */ -static float -diff_l3_weights(struct anv_l3_weights w0, struct anv_l3_weights w1) -{ - if ((w0.w[L3P_SLM] && !w1.w[L3P_SLM]) || - (w0.w[L3P_DC] && !w1.w[L3P_DC] && !w1.w[L3P_ALL]) || - (w0.w[L3P_URB] && !w1.w[L3P_URB])) { - return HUGE_VALF; - - } else { - float dw = 0; - - for (unsigned i = 0; i < NUM_L3P; i++) - dw += fabs(w0.w[i] - w1.w[i]); - - return dw; - } -} - -/** - * Return the closest validated L3 configuration for the specified device and - * weight vector. - */ -static const struct anv_l3_config * -get_l3_config(const struct brw_device_info *devinfo, struct anv_l3_weights w0) -{ - const struct anv_l3_config *const cfgs = get_l3_configs(devinfo); - const struct anv_l3_config *cfg_best = NULL; - float dw_best = HUGE_VALF; - - for (const struct anv_l3_config *cfg = cfgs; cfg->n[L3P_URB]; cfg++) { - const float dw = diff_l3_weights(w0, get_config_l3_weights(cfg)); - - if (dw < dw_best) { - cfg_best = cfg; - dw_best = dw; - } - } - - return cfg_best; -} - -/** - * Return a reasonable default L3 configuration for the specified device based - * on whether SLM and DC are required. In the non-SLM non-DC case the result - * is intended to approximately resemble the hardware defaults. - */ -static struct anv_l3_weights -get_default_l3_weights(const struct brw_device_info *devinfo, - bool needs_dc, bool needs_slm) -{ - struct anv_l3_weights w = {{ 0 }}; - - w.w[L3P_SLM] = needs_slm; - w.w[L3P_URB] = 1.0; - - if (devinfo->gen >= 8) { - w.w[L3P_ALL] = 1.0; - } else { - w.w[L3P_DC] = needs_dc ? 0.1 : 0; - w.w[L3P_RO] = devinfo->is_baytrail ? 0.5 : 1.0; - } - - return norm_l3_weights(w); -} - -/** - * Calculate the desired L3 partitioning based on the current state of the - * pipeline. For now this simply returns the conservative defaults calculated - * by get_default_l3_weights(), but we could probably do better by gathering - * more statistics from the pipeline state (e.g. guess of expected URB usage - * and bound surfaces), or by using feed-back from performance counters. - */ -static struct anv_l3_weights -get_pipeline_state_l3_weights(const struct anv_pipeline *pipeline) -{ - bool needs_dc = false, needs_slm = false; - - for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { - if (!anv_pipeline_has_stage(pipeline, i)) - continue; - - const struct brw_stage_prog_data *prog_data = - anv_shader_bin_get_prog_data(pipeline->shaders[i]); - - needs_dc |= pipeline->needs_data_cache; - needs_slm |= prog_data->total_shared; - } - - return get_default_l3_weights(&pipeline->device->info, - needs_dc, needs_slm); -} - -#define emit_lri(batch, reg, imm) \ - anv_batch_emit(batch, GENX(MI_LOAD_REGISTER_IMM), lri) { \ - lri.RegisterOffset = __anv_reg_num(reg); \ - lri.DataDWord = imm; \ - } - -#define IVB_L3SQCREG1_SQGHPCI_DEFAULT 0x00730000 -#define VLV_L3SQCREG1_SQGHPCI_DEFAULT 0x00d30000 -#define HSW_L3SQCREG1_SQGHPCI_DEFAULT 0x00610000 - -/** - * Program the hardware to use the specified L3 configuration. - */ -static void -setup_l3_config(struct anv_cmd_buffer *cmd_buffer/*, struct brw_context *brw*/, - const struct anv_l3_config *cfg) -{ - const bool has_slm = cfg->n[L3P_SLM]; - - /* According to the hardware docs, the L3 partitioning can only be changed - * while the pipeline is completely drained and the caches are flushed, - * which involves a first PIPE_CONTROL flush which stalls the pipeline... - */ - anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { - pc.DCFlushEnable = true; - pc.PostSyncOperation = NoWrite; - pc.CommandStreamerStallEnable = true; - } - - /* ...followed by a second pipelined PIPE_CONTROL that initiates - * invalidation of the relevant caches. Note that because RO invalidation - * happens at the top of the pipeline (i.e. right away as the PIPE_CONTROL - * command is processed by the CS) we cannot combine it with the previous - * stalling flush as the hardware documentation suggests, because that - * would cause the CS to stall on previous rendering *after* RO - * invalidation and wouldn't prevent the RO caches from being polluted by - * concurrent rendering before the stall completes. This intentionally - * doesn't implement the SKL+ hardware workaround suggesting to enable CS - * stall on PIPE_CONTROLs with the texture cache invalidation bit set for - * GPGPU workloads because the previous and subsequent PIPE_CONTROLs - * already guarantee that there is no concurrent GPGPU kernel execution - * (see SKL HSD 2132585). - */ - anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { - pc.TextureCacheInvalidationEnable = true; - pc.ConstantCacheInvalidationEnable = true; - pc.InstructionCacheInvalidateEnable = true; - pc.StateCacheInvalidationEnable = true; - pc.PostSyncOperation = NoWrite; - } - - /* Now send a third stalling flush to make sure that invalidation is - * complete when the L3 configuration registers are modified. - */ - anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { - pc.DCFlushEnable = true; - pc.PostSyncOperation = NoWrite; - pc.CommandStreamerStallEnable = true; - } - -#if GEN_GEN >= 8 - - assert(!cfg->n[L3P_IS] && !cfg->n[L3P_C] && !cfg->n[L3P_T]); - - uint32_t l3cr; - anv_pack_struct(&l3cr, GENX(L3CNTLREG), - .SLMEnable = has_slm, - .URBAllocation = cfg->n[L3P_URB], - .ROAllocation = cfg->n[L3P_RO], - .DCAllocation = cfg->n[L3P_DC], - .AllAllocation = cfg->n[L3P_ALL]); - - /* Set up the L3 partitioning. */ - emit_lri(&cmd_buffer->batch, GENX(L3CNTLREG), l3cr); - -#else - - const bool has_dc = cfg->n[L3P_DC] || cfg->n[L3P_ALL]; - const bool has_is = cfg->n[L3P_IS] || cfg->n[L3P_RO] || cfg->n[L3P_ALL]; - const bool has_c = cfg->n[L3P_C] || cfg->n[L3P_RO] || cfg->n[L3P_ALL]; - const bool has_t = cfg->n[L3P_T] || cfg->n[L3P_RO] || cfg->n[L3P_ALL]; - - assert(!cfg->n[L3P_ALL]); - - /* When enabled SLM only uses a portion of the L3 on half of the banks, - * the matching space on the remaining banks has to be allocated to a - * client (URB for all validated configurations) set to the - * lower-bandwidth 2-bank address hashing mode. - */ - const struct brw_device_info *devinfo = &cmd_buffer->device->info; - const bool urb_low_bw = has_slm && !devinfo->is_baytrail; - assert(!urb_low_bw || cfg->n[L3P_URB] == cfg->n[L3P_SLM]); - - /* Minimum number of ways that can be allocated to the URB. */ - const unsigned n0_urb = (devinfo->is_baytrail ? 32 : 0); - assert(cfg->n[L3P_URB] >= n0_urb); - - uint32_t l3sqcr1, l3cr2, l3cr3; - anv_pack_struct(&l3sqcr1, GENX(L3SQCREG1), - .ConvertDC_UC = !has_dc, - .ConvertIS_UC = !has_is, - .ConvertC_UC = !has_c, - .ConvertT_UC = !has_t); - l3sqcr1 |= - GEN_IS_HASWELL ? HSW_L3SQCREG1_SQGHPCI_DEFAULT : - devinfo->is_baytrail ? VLV_L3SQCREG1_SQGHPCI_DEFAULT : - IVB_L3SQCREG1_SQGHPCI_DEFAULT; - - anv_pack_struct(&l3cr2, GENX(L3CNTLREG2), - .SLMEnable = has_slm, - .URBLowBandwidth = urb_low_bw, - .URBAllocation = cfg->n[L3P_URB], -#if !GEN_IS_HASWELL - .ALLAllocation = cfg->n[L3P_ALL], -#endif - .ROAllocation = cfg->n[L3P_RO], - .DCAllocation = cfg->n[L3P_DC]); - - anv_pack_struct(&l3cr3, GENX(L3CNTLREG3), - .ISAllocation = cfg->n[L3P_IS], - .ISLowBandwidth = 0, - .CAllocation = cfg->n[L3P_C], - .CLowBandwidth = 0, - .TAllocation = cfg->n[L3P_T], - .TLowBandwidth = 0); - - /* Set up the L3 partitioning. */ - emit_lri(&cmd_buffer->batch, GENX(L3SQCREG1), l3sqcr1); - emit_lri(&cmd_buffer->batch, GENX(L3CNTLREG2), l3cr2); - emit_lri(&cmd_buffer->batch, GENX(L3CNTLREG3), l3cr3); - -#if GEN_IS_HASWELL - if (cmd_buffer->device->instance->physicalDevice.cmd_parser_version >= 4) { - /* Enable L3 atomics on HSW if we have a DC partition, otherwise keep - * them disabled to avoid crashing the system hard. - */ - uint32_t scratch1, chicken3; - anv_pack_struct(&scratch1, GENX(SCRATCH1), - .L3AtomicDisable = !has_dc); - anv_pack_struct(&chicken3, GENX(CHICKEN3), - .L3AtomicDisable = !has_dc); - emit_lri(&cmd_buffer->batch, GENX(SCRATCH1), scratch1); - emit_lri(&cmd_buffer->batch, GENX(CHICKEN3), chicken3); - } -#endif - -#endif - -} - -/** - * Return the unit brw_context::urb::size is expressed in, in KB. \sa - * brw_device_info::urb::size. - */ -static unsigned -get_urb_size_scale(const struct brw_device_info *devinfo) -{ - return (devinfo->gen >= 8 ? devinfo->num_slices : 1); -} - -void -genX(setup_pipeline_l3_config)(struct anv_pipeline *pipeline) -{ - const struct anv_l3_weights w = get_pipeline_state_l3_weights(pipeline); - const struct brw_device_info *devinfo = &pipeline->device->info; - const struct anv_l3_config *const cfg = get_l3_config(devinfo, w); - pipeline->urb.l3_config = cfg; - - unsigned sz = cfg->n[L3P_URB] * get_l3_way_size(devinfo); - -#if GEN_GEN == 9 - /* From the SKL "L3 Allocation and Programming" documentation: - * - * "URB is limited to 1008KB due to programming restrictions. This is not - * a restriction of the L3 implementation, but of the FF and other clients. - * Therefore, in a GT4 implementation it is possible for the programmed - * allocation of the L3 data array to provide 3*384KB=1152KB for URB, but - * only 1008KB of this will be used." - */ - sz = MIN2(1008, sz); -#endif - - pipeline->urb.total_size = sz / get_urb_size_scale(devinfo); -} - -/** - * Print out the specified L3 configuration. - */ -static void -dump_l3_config(const struct anv_l3_config *cfg) -{ - fprintf(stderr, "SLM=%d URB=%d ALL=%d DC=%d RO=%d IS=%d C=%d T=%d\n", - cfg->n[L3P_SLM], cfg->n[L3P_URB], cfg->n[L3P_ALL], - cfg->n[L3P_DC], cfg->n[L3P_RO], - cfg->n[L3P_IS], cfg->n[L3P_C], cfg->n[L3P_T]); -} - -void -genX(cmd_buffer_config_l3)(struct anv_cmd_buffer *cmd_buffer, - const struct anv_pipeline *pipeline) -{ - struct anv_cmd_state *state = &cmd_buffer->state; - const struct anv_l3_config *const cfg = pipeline->urb.l3_config; - assert(cfg); - if (cfg != state->current_l3_config) { - setup_l3_config(cmd_buffer, cfg); - state->current_l3_config = cfg; - - if (unlikely(INTEL_DEBUG & DEBUG_L3)) { - fprintf(stderr, "L3 config transition: "); - dump_l3_config(cfg); - } - } -} diff -Nru mesa-12.0.6/src/intel/vulkan/genX_pipeline.c mesa-17.0.7/src/intel/vulkan/genX_pipeline.c --- mesa-12.0.6/src/intel/vulkan/genX_pipeline.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/genX_pipeline.c 2017-06-01 10:37:10.000000000 +0000 @@ -26,8 +26,1509 @@ #include "genxml/gen_macros.h" #include "genxml/genX_pack.h" -VkResult -genX(compute_pipeline_create)( +#include "common/gen_l3_config.h" +#include "common/gen_sample_positions.h" +#include "vk_format_info.h" + +static uint32_t +vertex_element_comp_control(enum isl_format format, unsigned comp) +{ + uint8_t bits; + switch (comp) { + case 0: bits = isl_format_layouts[format].channels.r.bits; break; + case 1: bits = isl_format_layouts[format].channels.g.bits; break; + case 2: bits = isl_format_layouts[format].channels.b.bits; break; + case 3: bits = isl_format_layouts[format].channels.a.bits; break; + default: unreachable("Invalid component"); + } + + /* + * Take in account hardware restrictions when dealing with 64-bit floats. + * + * From Broadwell spec, command reference structures, page 586: + * "When SourceElementFormat is set to one of the *64*_PASSTHRU formats, + * 64-bit components are stored * in the URB without any conversion. In + * this case, vertex elements must be written as 128 or 256 bits, with + * VFCOMP_STORE_0 being used to pad the output as required. E.g., if + * R64_PASSTHRU is used to copy a 64-bit Red component into the URB, + * Component 1 must be specified as VFCOMP_STORE_0 (with Components 2,3 + * set to VFCOMP_NOSTORE) in order to output a 128-bit vertex element, or + * Components 1-3 must be specified as VFCOMP_STORE_0 in order to output + * a 256-bit vertex element. Likewise, use of R64G64B64_PASSTHRU requires + * Component 3 to be specified as VFCOMP_STORE_0 in order to output a + * 256-bit vertex element." + */ + if (bits) { + return VFCOMP_STORE_SRC; + } else if (comp >= 2 && + !isl_format_layouts[format].channels.b.bits && + isl_format_layouts[format].channels.r.type == ISL_RAW) { + /* When emitting 64-bit attributes, we need to write either 128 or 256 + * bit chunks, using VFCOMP_NOSTORE when not writing the chunk, and + * VFCOMP_STORE_0 to pad the written chunk */ + return VFCOMP_NOSTORE; + } else if (comp < 3 || + isl_format_layouts[format].channels.r.type == ISL_RAW) { + /* Note we need to pad with value 0, not 1, due hardware restrictions + * (see comment above) */ + return VFCOMP_STORE_0; + } else if (isl_format_layouts[format].channels.r.type == ISL_UINT || + isl_format_layouts[format].channels.r.type == ISL_SINT) { + assert(comp == 3); + return VFCOMP_STORE_1_INT; + } else { + assert(comp == 3); + return VFCOMP_STORE_1_FP; + } +} + +static void +emit_vertex_input(struct anv_pipeline *pipeline, + const VkPipelineVertexInputStateCreateInfo *info) +{ + const struct brw_vs_prog_data *vs_prog_data = get_vs_prog_data(pipeline); + + /* Pull inputs_read out of the VS prog data */ + const uint64_t inputs_read = vs_prog_data->inputs_read; + const uint64_t double_inputs_read = vs_prog_data->double_inputs_read; + assert((inputs_read & ((1 << VERT_ATTRIB_GENERIC0) - 1)) == 0); + const uint32_t elements = inputs_read >> VERT_ATTRIB_GENERIC0; + const uint32_t elements_double = double_inputs_read >> VERT_ATTRIB_GENERIC0; + +#if GEN_GEN >= 8 + /* On BDW+, we only need to allocate space for base ids. Setting up + * the actual vertex and instance id is a separate packet. + */ + const bool needs_svgs_elem = vs_prog_data->uses_basevertex || + vs_prog_data->uses_baseinstance; +#else + /* On Haswell and prior, vertex and instance id are created by using the + * ComponentControl fields, so we need an element for any of them. + */ + const bool needs_svgs_elem = vs_prog_data->uses_vertexid || + vs_prog_data->uses_instanceid || + vs_prog_data->uses_basevertex || + vs_prog_data->uses_baseinstance; +#endif + + uint32_t elem_count = __builtin_popcount(elements) - + __builtin_popcount(elements_double) / 2; + + uint32_t total_elems = elem_count + needs_svgs_elem; + if (total_elems == 0) + return; + + uint32_t *p; + + const uint32_t num_dwords = 1 + total_elems * 2; + p = anv_batch_emitn(&pipeline->batch, num_dwords, + GENX(3DSTATE_VERTEX_ELEMENTS)); + memset(p + 1, 0, (num_dwords - 1) * 4); + + for (uint32_t i = 0; i < info->vertexAttributeDescriptionCount; i++) { + const VkVertexInputAttributeDescription *desc = + &info->pVertexAttributeDescriptions[i]; + enum isl_format format = anv_get_isl_format(&pipeline->device->info, + desc->format, + VK_IMAGE_ASPECT_COLOR_BIT, + VK_IMAGE_TILING_LINEAR); + + assert(desc->binding < 32); + + if ((elements & (1 << desc->location)) == 0) + continue; /* Binding unused */ + + uint32_t slot = + __builtin_popcount(elements & ((1 << desc->location) - 1)) - + DIV_ROUND_UP(__builtin_popcount(elements_double & + ((1 << desc->location) -1)), 2); + + struct GENX(VERTEX_ELEMENT_STATE) element = { + .VertexBufferIndex = desc->binding, + .Valid = true, + .SourceElementFormat = format, + .EdgeFlagEnable = false, + .SourceElementOffset = desc->offset, + .Component0Control = vertex_element_comp_control(format, 0), + .Component1Control = vertex_element_comp_control(format, 1), + .Component2Control = vertex_element_comp_control(format, 2), + .Component3Control = vertex_element_comp_control(format, 3), + }; + GENX(VERTEX_ELEMENT_STATE_pack)(NULL, &p[1 + slot * 2], &element); + +#if GEN_GEN >= 8 + /* On Broadwell and later, we have a separate VF_INSTANCING packet + * that controls instancing. On Haswell and prior, that's part of + * VERTEX_BUFFER_STATE which we emit later. + */ + anv_batch_emit(&pipeline->batch, GENX(3DSTATE_VF_INSTANCING), vfi) { + vfi.InstancingEnable = pipeline->instancing_enable[desc->binding]; + vfi.VertexElementIndex = slot; + /* Vulkan so far doesn't have an instance divisor, so + * this is always 1 (ignored if not instancing). */ + vfi.InstanceDataStepRate = 1; + } +#endif + } + + const uint32_t id_slot = elem_count; + if (needs_svgs_elem) { + /* From the Broadwell PRM for the 3D_Vertex_Component_Control enum: + * "Within a VERTEX_ELEMENT_STATE structure, if a Component + * Control field is set to something other than VFCOMP_STORE_SRC, + * no higher-numbered Component Control fields may be set to + * VFCOMP_STORE_SRC" + * + * This means, that if we have BaseInstance, we need BaseVertex as + * well. Just do all or nothing. + */ + uint32_t base_ctrl = (vs_prog_data->uses_basevertex || + vs_prog_data->uses_baseinstance) ? + VFCOMP_STORE_SRC : VFCOMP_STORE_0; + + struct GENX(VERTEX_ELEMENT_STATE) element = { + .VertexBufferIndex = 32, /* Reserved for this */ + .Valid = true, + .SourceElementFormat = ISL_FORMAT_R32G32_UINT, + .Component0Control = base_ctrl, + .Component1Control = base_ctrl, +#if GEN_GEN >= 8 + .Component2Control = VFCOMP_STORE_0, + .Component3Control = VFCOMP_STORE_0, +#else + .Component2Control = VFCOMP_STORE_VID, + .Component3Control = VFCOMP_STORE_IID, +#endif + }; + GENX(VERTEX_ELEMENT_STATE_pack)(NULL, &p[1 + id_slot * 2], &element); + } + +#if GEN_GEN >= 8 + anv_batch_emit(&pipeline->batch, GENX(3DSTATE_VF_SGVS), sgvs) { + sgvs.VertexIDEnable = vs_prog_data->uses_vertexid; + sgvs.VertexIDComponentNumber = 2; + sgvs.VertexIDElementOffset = id_slot; + sgvs.InstanceIDEnable = vs_prog_data->uses_instanceid; + sgvs.InstanceIDComponentNumber = 3; + sgvs.InstanceIDElementOffset = id_slot; + } +#endif +} + +void +genX(emit_urb_setup)(struct anv_device *device, struct anv_batch *batch, + const struct gen_l3_config *l3_config, + VkShaderStageFlags active_stages, + const unsigned entry_size[4]) +{ + const struct gen_device_info *devinfo = &device->info; +#if GEN_IS_HASWELL + const unsigned push_constant_kb = devinfo->gt == 3 ? 32 : 16; +#else + const unsigned push_constant_kb = GEN_GEN >= 8 ? 32 : 16; +#endif + + const unsigned urb_size_kb = gen_get_l3_config_urb_size(devinfo, l3_config); + + unsigned entries[4]; + unsigned start[4]; + gen_get_urb_config(devinfo, + 1024 * push_constant_kb, 1024 * urb_size_kb, + active_stages & + VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT, + active_stages & VK_SHADER_STAGE_GEOMETRY_BIT, + entry_size, entries, start); + +#if GEN_GEN == 7 && !GEN_IS_HASWELL + /* From the IVB PRM Vol. 2, Part 1, Section 3.2.1: + * + * "A PIPE_CONTROL with Post-Sync Operation set to 1h and a depth stall + * needs to be sent just prior to any 3DSTATE_VS, 3DSTATE_URB_VS, + * 3DSTATE_CONSTANT_VS, 3DSTATE_BINDING_TABLE_POINTER_VS, + * 3DSTATE_SAMPLER_STATE_POINTER_VS command. Only one PIPE_CONTROL + * needs to be sent before any combination of VS associated 3DSTATE." + */ + anv_batch_emit(batch, GEN7_PIPE_CONTROL, pc) { + pc.DepthStallEnable = true; + pc.PostSyncOperation = WriteImmediateData; + pc.Address = (struct anv_address) { &device->workaround_bo, 0 }; + } +#endif + + for (int i = 0; i <= MESA_SHADER_GEOMETRY; i++) { + anv_batch_emit(batch, GENX(3DSTATE_URB_VS), urb) { + urb._3DCommandSubOpcode += i; + urb.VSURBStartingAddress = start[i]; + urb.VSURBEntryAllocationSize = entry_size[i] - 1; + urb.VSNumberofURBEntries = entries[i]; + } + } +} + +static inline void +emit_urb_setup(struct anv_pipeline *pipeline) +{ + unsigned entry_size[4]; + for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) { + const struct brw_vue_prog_data *prog_data = + !anv_pipeline_has_stage(pipeline, i) ? NULL : + (const struct brw_vue_prog_data *) pipeline->shaders[i]->prog_data; + + entry_size[i] = prog_data ? prog_data->urb_entry_size : 1; + } + + genX(emit_urb_setup)(pipeline->device, &pipeline->batch, + pipeline->urb.l3_config, + pipeline->active_stages, entry_size); +} + +static void +emit_3dstate_sbe(struct anv_pipeline *pipeline) +{ + const struct brw_wm_prog_data *wm_prog_data = get_wm_prog_data(pipeline); + + if (!anv_pipeline_has_stage(pipeline, MESA_SHADER_FRAGMENT)) { + anv_batch_emit(&pipeline->batch, GENX(3DSTATE_SBE), sbe); +#if GEN_GEN >= 8 + anv_batch_emit(&pipeline->batch, GENX(3DSTATE_SBE_SWIZ), sbe); +#endif + return; + } + + const struct brw_vue_map *fs_input_map = + &anv_pipeline_get_last_vue_prog_data(pipeline)->vue_map; + + struct GENX(3DSTATE_SBE) sbe = { + GENX(3DSTATE_SBE_header), + .AttributeSwizzleEnable = true, + .PointSpriteTextureCoordinateOrigin = UPPERLEFT, + .NumberofSFOutputAttributes = wm_prog_data->num_varying_inputs, + .ConstantInterpolationEnable = wm_prog_data->flat_inputs, + }; + +#if GEN_GEN >= 9 + for (unsigned i = 0; i < 32; i++) + sbe.AttributeActiveComponentFormat[i] = ACF_XYZW; +#endif + +#if GEN_GEN >= 8 + /* On Broadwell, they broke 3DSTATE_SBE into two packets */ + struct GENX(3DSTATE_SBE_SWIZ) swiz = { + GENX(3DSTATE_SBE_SWIZ_header), + }; +#else +# define swiz sbe +#endif + + /* Skip the VUE header and position slots by default */ + unsigned urb_entry_read_offset = 1; + int max_source_attr = 0; + for (int attr = 0; attr < VARYING_SLOT_MAX; attr++) { + int input_index = wm_prog_data->urb_setup[attr]; + + if (input_index < 0) + continue; + + /* gl_Layer is stored in the VUE header */ + if (attr == VARYING_SLOT_LAYER) { + urb_entry_read_offset = 0; + continue; + } + + if (attr == VARYING_SLOT_PNTC) { + sbe.PointSpriteTextureCoordinateEnable = 1 << input_index; + continue; + } + + const int slot = fs_input_map->varying_to_slot[attr]; + + if (input_index >= 16) + continue; + + if (slot == -1) { + /* This attribute does not exist in the VUE--that means that the + * vertex shader did not write to it. It could be that it's a + * regular varying read by the fragment shader but not written by + * the vertex shader or it's gl_PrimitiveID. In the first case the + * value is undefined, in the second it needs to be + * gl_PrimitiveID. + */ + swiz.Attribute[input_index].ConstantSource = PRIM_ID; + swiz.Attribute[input_index].ComponentOverrideX = true; + swiz.Attribute[input_index].ComponentOverrideY = true; + swiz.Attribute[input_index].ComponentOverrideZ = true; + swiz.Attribute[input_index].ComponentOverrideW = true; + } else { + /* We have to subtract two slots to accout for the URB entry output + * read offset in the VS and GS stages. + */ + assert(slot >= 2); + const int source_attr = slot - 2 * urb_entry_read_offset; + max_source_attr = MAX2(max_source_attr, source_attr); + swiz.Attribute[input_index].SourceAttribute = source_attr; + } + } + + sbe.VertexURBEntryReadOffset = urb_entry_read_offset; + sbe.VertexURBEntryReadLength = DIV_ROUND_UP(max_source_attr + 1, 2); +#if GEN_GEN >= 8 + sbe.ForceVertexURBEntryReadOffset = true; + sbe.ForceVertexURBEntryReadLength = true; +#endif + + uint32_t *dw = anv_batch_emit_dwords(&pipeline->batch, + GENX(3DSTATE_SBE_length)); + GENX(3DSTATE_SBE_pack)(&pipeline->batch, dw, &sbe); + +#if GEN_GEN >= 8 + dw = anv_batch_emit_dwords(&pipeline->batch, GENX(3DSTATE_SBE_SWIZ_length)); + GENX(3DSTATE_SBE_SWIZ_pack)(&pipeline->batch, dw, &swiz); +#endif +} + +static const uint32_t vk_to_gen_cullmode[] = { + [VK_CULL_MODE_NONE] = CULLMODE_NONE, + [VK_CULL_MODE_FRONT_BIT] = CULLMODE_FRONT, + [VK_CULL_MODE_BACK_BIT] = CULLMODE_BACK, + [VK_CULL_MODE_FRONT_AND_BACK] = CULLMODE_BOTH +}; + +static const uint32_t vk_to_gen_fillmode[] = { + [VK_POLYGON_MODE_FILL] = FILL_MODE_SOLID, + [VK_POLYGON_MODE_LINE] = FILL_MODE_WIREFRAME, + [VK_POLYGON_MODE_POINT] = FILL_MODE_POINT, +}; + +static const uint32_t vk_to_gen_front_face[] = { + [VK_FRONT_FACE_COUNTER_CLOCKWISE] = 1, + [VK_FRONT_FACE_CLOCKWISE] = 0 +}; + +static void +emit_rs_state(struct anv_pipeline *pipeline, + const VkPipelineRasterizationStateCreateInfo *rs_info, + const VkPipelineMultisampleStateCreateInfo *ms_info, + const struct anv_render_pass *pass, + const struct anv_subpass *subpass) +{ + struct GENX(3DSTATE_SF) sf = { + GENX(3DSTATE_SF_header), + }; + + sf.ViewportTransformEnable = true; + sf.StatisticsEnable = true; + sf.TriangleStripListProvokingVertexSelect = 0; + sf.LineStripListProvokingVertexSelect = 0; + sf.TriangleFanProvokingVertexSelect = 1; + + const struct brw_vue_prog_data *last_vue_prog_data = + anv_pipeline_get_last_vue_prog_data(pipeline); + + if (last_vue_prog_data->vue_map.slots_valid & VARYING_BIT_PSIZ) { + sf.PointWidthSource = Vertex; + } else { + sf.PointWidthSource = State; + sf.PointWidth = 1.0; + } + +#if GEN_GEN >= 8 + struct GENX(3DSTATE_RASTER) raster = { + GENX(3DSTATE_RASTER_header), + }; +#else +# define raster sf +#endif + + /* For details on 3DSTATE_RASTER multisample state, see the BSpec table + * "Multisample Modes State". + */ +#if GEN_GEN >= 8 + raster.DXMultisampleRasterizationEnable = true; + raster.ForcedSampleCount = FSC_NUMRASTSAMPLES_0; + raster.ForceMultisampling = false; +#else + raster.MultisampleRasterizationMode = + (ms_info && ms_info->rasterizationSamples > 1) ? + MSRASTMODE_ON_PATTERN : MSRASTMODE_OFF_PIXEL; +#endif + + raster.FrontWinding = vk_to_gen_front_face[rs_info->frontFace]; + raster.CullMode = vk_to_gen_cullmode[rs_info->cullMode]; + raster.FrontFaceFillMode = vk_to_gen_fillmode[rs_info->polygonMode]; + raster.BackFaceFillMode = vk_to_gen_fillmode[rs_info->polygonMode]; + raster.ScissorRectangleEnable = true; + +#if GEN_GEN >= 9 + /* GEN9+ splits ViewportZClipTestEnable into near and far enable bits */ + raster.ViewportZFarClipTestEnable = !pipeline->depth_clamp_enable; + raster.ViewportZNearClipTestEnable = !pipeline->depth_clamp_enable; +#elif GEN_GEN >= 8 + raster.ViewportZClipTestEnable = !pipeline->depth_clamp_enable; +#endif + + raster.GlobalDepthOffsetEnableSolid = rs_info->depthBiasEnable; + raster.GlobalDepthOffsetEnableWireframe = rs_info->depthBiasEnable; + raster.GlobalDepthOffsetEnablePoint = rs_info->depthBiasEnable; + +#if GEN_GEN == 7 + /* Gen7 requires that we provide the depth format in 3DSTATE_SF so that it + * can get the depth offsets correct. + */ + if (subpass->depth_stencil_attachment < pass->attachment_count) { + VkFormat vk_format = + pass->attachments[subpass->depth_stencil_attachment].format; + assert(vk_format_is_depth_or_stencil(vk_format)); + if (vk_format_aspects(vk_format) & VK_IMAGE_ASPECT_DEPTH_BIT) { + enum isl_format isl_format = + anv_get_isl_format(&pipeline->device->info, vk_format, + VK_IMAGE_ASPECT_DEPTH_BIT, + VK_IMAGE_TILING_OPTIMAL); + sf.DepthBufferSurfaceFormat = + isl_format_get_depth_format(isl_format, false); + } + } +#endif + +#if GEN_GEN >= 8 + GENX(3DSTATE_SF_pack)(NULL, pipeline->gen8.sf, &sf); + GENX(3DSTATE_RASTER_pack)(NULL, pipeline->gen8.raster, &raster); +#else +# undef raster + GENX(3DSTATE_SF_pack)(NULL, &pipeline->gen7.sf, &sf); +#endif +} + +static void +emit_ms_state(struct anv_pipeline *pipeline, + const VkPipelineMultisampleStateCreateInfo *info) +{ + uint32_t samples = 1; + uint32_t log2_samples = 0; + + /* From the Vulkan 1.0 spec: + * If pSampleMask is NULL, it is treated as if the mask has all bits + * enabled, i.e. no coverage is removed from fragments. + * + * 3DSTATE_SAMPLE_MASK.SampleMask is 16 bits. + */ +#if GEN_GEN >= 8 + uint32_t sample_mask = 0xffff; +#else + uint32_t sample_mask = 0xff; +#endif + + if (info) { + samples = info->rasterizationSamples; + log2_samples = __builtin_ffs(samples) - 1; + } + + if (info && info->pSampleMask) + sample_mask &= info->pSampleMask[0]; + + anv_batch_emit(&pipeline->batch, GENX(3DSTATE_MULTISAMPLE), ms) { + ms.NumberofMultisamples = log2_samples; + +#if GEN_GEN >= 8 + /* The PRM says that this bit is valid only for DX9: + * + * SW can choose to set this bit only for DX9 API. DX10/OGL API's + * should not have any effect by setting or not setting this bit. + */ + ms.PixelPositionOffsetEnable = false; + ms.PixelLocation = CENTER; +#else + ms.PixelLocation = PIXLOC_CENTER; + + switch (samples) { + case 1: + GEN_SAMPLE_POS_1X(ms.Sample); + break; + case 2: + GEN_SAMPLE_POS_2X(ms.Sample); + break; + case 4: + GEN_SAMPLE_POS_4X(ms.Sample); + break; + case 8: + GEN_SAMPLE_POS_8X(ms.Sample); + break; + default: + break; + } +#endif + } + + anv_batch_emit(&pipeline->batch, GENX(3DSTATE_SAMPLE_MASK), sm) { + sm.SampleMask = sample_mask; + } +} + +static const uint32_t vk_to_gen_logic_op[] = { + [VK_LOGIC_OP_COPY] = LOGICOP_COPY, + [VK_LOGIC_OP_CLEAR] = LOGICOP_CLEAR, + [VK_LOGIC_OP_AND] = LOGICOP_AND, + [VK_LOGIC_OP_AND_REVERSE] = LOGICOP_AND_REVERSE, + [VK_LOGIC_OP_AND_INVERTED] = LOGICOP_AND_INVERTED, + [VK_LOGIC_OP_NO_OP] = LOGICOP_NOOP, + [VK_LOGIC_OP_XOR] = LOGICOP_XOR, + [VK_LOGIC_OP_OR] = LOGICOP_OR, + [VK_LOGIC_OP_NOR] = LOGICOP_NOR, + [VK_LOGIC_OP_EQUIVALENT] = LOGICOP_EQUIV, + [VK_LOGIC_OP_INVERT] = LOGICOP_INVERT, + [VK_LOGIC_OP_OR_REVERSE] = LOGICOP_OR_REVERSE, + [VK_LOGIC_OP_COPY_INVERTED] = LOGICOP_COPY_INVERTED, + [VK_LOGIC_OP_OR_INVERTED] = LOGICOP_OR_INVERTED, + [VK_LOGIC_OP_NAND] = LOGICOP_NAND, + [VK_LOGIC_OP_SET] = LOGICOP_SET, +}; + +static const uint32_t vk_to_gen_blend[] = { + [VK_BLEND_FACTOR_ZERO] = BLENDFACTOR_ZERO, + [VK_BLEND_FACTOR_ONE] = BLENDFACTOR_ONE, + [VK_BLEND_FACTOR_SRC_COLOR] = BLENDFACTOR_SRC_COLOR, + [VK_BLEND_FACTOR_ONE_MINUS_SRC_COLOR] = BLENDFACTOR_INV_SRC_COLOR, + [VK_BLEND_FACTOR_DST_COLOR] = BLENDFACTOR_DST_COLOR, + [VK_BLEND_FACTOR_ONE_MINUS_DST_COLOR] = BLENDFACTOR_INV_DST_COLOR, + [VK_BLEND_FACTOR_SRC_ALPHA] = BLENDFACTOR_SRC_ALPHA, + [VK_BLEND_FACTOR_ONE_MINUS_SRC_ALPHA] = BLENDFACTOR_INV_SRC_ALPHA, + [VK_BLEND_FACTOR_DST_ALPHA] = BLENDFACTOR_DST_ALPHA, + [VK_BLEND_FACTOR_ONE_MINUS_DST_ALPHA] = BLENDFACTOR_INV_DST_ALPHA, + [VK_BLEND_FACTOR_CONSTANT_COLOR] = BLENDFACTOR_CONST_COLOR, + [VK_BLEND_FACTOR_ONE_MINUS_CONSTANT_COLOR]= BLENDFACTOR_INV_CONST_COLOR, + [VK_BLEND_FACTOR_CONSTANT_ALPHA] = BLENDFACTOR_CONST_ALPHA, + [VK_BLEND_FACTOR_ONE_MINUS_CONSTANT_ALPHA]= BLENDFACTOR_INV_CONST_ALPHA, + [VK_BLEND_FACTOR_SRC_ALPHA_SATURATE] = BLENDFACTOR_SRC_ALPHA_SATURATE, + [VK_BLEND_FACTOR_SRC1_COLOR] = BLENDFACTOR_SRC1_COLOR, + [VK_BLEND_FACTOR_ONE_MINUS_SRC1_COLOR] = BLENDFACTOR_INV_SRC1_COLOR, + [VK_BLEND_FACTOR_SRC1_ALPHA] = BLENDFACTOR_SRC1_ALPHA, + [VK_BLEND_FACTOR_ONE_MINUS_SRC1_ALPHA] = BLENDFACTOR_INV_SRC1_ALPHA, +}; + +static const uint32_t vk_to_gen_blend_op[] = { + [VK_BLEND_OP_ADD] = BLENDFUNCTION_ADD, + [VK_BLEND_OP_SUBTRACT] = BLENDFUNCTION_SUBTRACT, + [VK_BLEND_OP_REVERSE_SUBTRACT] = BLENDFUNCTION_REVERSE_SUBTRACT, + [VK_BLEND_OP_MIN] = BLENDFUNCTION_MIN, + [VK_BLEND_OP_MAX] = BLENDFUNCTION_MAX, +}; + +static const uint32_t vk_to_gen_compare_op[] = { + [VK_COMPARE_OP_NEVER] = PREFILTEROPNEVER, + [VK_COMPARE_OP_LESS] = PREFILTEROPLESS, + [VK_COMPARE_OP_EQUAL] = PREFILTEROPEQUAL, + [VK_COMPARE_OP_LESS_OR_EQUAL] = PREFILTEROPLEQUAL, + [VK_COMPARE_OP_GREATER] = PREFILTEROPGREATER, + [VK_COMPARE_OP_NOT_EQUAL] = PREFILTEROPNOTEQUAL, + [VK_COMPARE_OP_GREATER_OR_EQUAL] = PREFILTEROPGEQUAL, + [VK_COMPARE_OP_ALWAYS] = PREFILTEROPALWAYS, +}; + +static const uint32_t vk_to_gen_stencil_op[] = { + [VK_STENCIL_OP_KEEP] = STENCILOP_KEEP, + [VK_STENCIL_OP_ZERO] = STENCILOP_ZERO, + [VK_STENCIL_OP_REPLACE] = STENCILOP_REPLACE, + [VK_STENCIL_OP_INCREMENT_AND_CLAMP] = STENCILOP_INCRSAT, + [VK_STENCIL_OP_DECREMENT_AND_CLAMP] = STENCILOP_DECRSAT, + [VK_STENCIL_OP_INVERT] = STENCILOP_INVERT, + [VK_STENCIL_OP_INCREMENT_AND_WRAP] = STENCILOP_INCR, + [VK_STENCIL_OP_DECREMENT_AND_WRAP] = STENCILOP_DECR, +}; + +static void +emit_ds_state(struct anv_pipeline *pipeline, + const VkPipelineDepthStencilStateCreateInfo *info, + const struct anv_render_pass *pass, + const struct anv_subpass *subpass) +{ +#if GEN_GEN == 7 +# define depth_stencil_dw pipeline->gen7.depth_stencil_state +#elif GEN_GEN == 8 +# define depth_stencil_dw pipeline->gen8.wm_depth_stencil +#else +# define depth_stencil_dw pipeline->gen9.wm_depth_stencil +#endif + + if (info == NULL) { + /* We're going to OR this together with the dynamic state. We need + * to make sure it's initialized to something useful. + */ + memset(depth_stencil_dw, 0, sizeof(depth_stencil_dw)); + return; + } + + /* VkBool32 depthBoundsTestEnable; // optional (depth_bounds_test) */ + +#if GEN_GEN <= 7 + struct GENX(DEPTH_STENCIL_STATE) depth_stencil = { +#else + struct GENX(3DSTATE_WM_DEPTH_STENCIL) depth_stencil = { +#endif + .DepthTestEnable = info->depthTestEnable, + .DepthBufferWriteEnable = info->depthWriteEnable, + .DepthTestFunction = vk_to_gen_compare_op[info->depthCompareOp], + .DoubleSidedStencilEnable = true, + + .StencilTestEnable = info->stencilTestEnable, + .StencilBufferWriteEnable = info->stencilTestEnable, + .StencilFailOp = vk_to_gen_stencil_op[info->front.failOp], + .StencilPassDepthPassOp = vk_to_gen_stencil_op[info->front.passOp], + .StencilPassDepthFailOp = vk_to_gen_stencil_op[info->front.depthFailOp], + .StencilTestFunction = vk_to_gen_compare_op[info->front.compareOp], + .BackfaceStencilFailOp = vk_to_gen_stencil_op[info->back.failOp], + .BackfaceStencilPassDepthPassOp = vk_to_gen_stencil_op[info->back.passOp], + .BackfaceStencilPassDepthFailOp =vk_to_gen_stencil_op[info->back.depthFailOp], + .BackfaceStencilTestFunction = vk_to_gen_compare_op[info->back.compareOp], + }; + + VkImageAspectFlags aspects = 0; + if (subpass->depth_stencil_attachment != VK_ATTACHMENT_UNUSED) { + VkFormat depth_stencil_format = + pass->attachments[subpass->depth_stencil_attachment].format; + aspects = vk_format_aspects(depth_stencil_format); + } + + /* The Vulkan spec requires that if either depth or stencil is not present, + * the pipeline is to act as if the test silently passes. + */ + if (!(aspects & VK_IMAGE_ASPECT_DEPTH_BIT)) { + depth_stencil.DepthBufferWriteEnable = false; + depth_stencil.DepthTestFunction = PREFILTEROPALWAYS; + } + + if (!(aspects & VK_IMAGE_ASPECT_STENCIL_BIT)) { + depth_stencil.StencilBufferWriteEnable = false; + depth_stencil.StencilTestFunction = PREFILTEROPALWAYS; + depth_stencil.BackfaceStencilTestFunction = PREFILTEROPALWAYS; + } + + /* From the Broadwell PRM: + * + * "If Depth_Test_Enable = 1 AND Depth_Test_func = EQUAL, the + * Depth_Write_Enable must be set to 0." + */ + if (info->depthTestEnable && info->depthCompareOp == VK_COMPARE_OP_EQUAL) + depth_stencil.DepthBufferWriteEnable = false; + +#if GEN_GEN <= 7 + GENX(DEPTH_STENCIL_STATE_pack)(NULL, depth_stencil_dw, &depth_stencil); +#else + GENX(3DSTATE_WM_DEPTH_STENCIL_pack)(NULL, depth_stencil_dw, &depth_stencil); +#endif +} + +static void +emit_cb_state(struct anv_pipeline *pipeline, + const VkPipelineColorBlendStateCreateInfo *info, + const VkPipelineMultisampleStateCreateInfo *ms_info) +{ + struct anv_device *device = pipeline->device; + + const uint32_t num_dwords = GENX(BLEND_STATE_length); + pipeline->blend_state = + anv_state_pool_alloc(&device->dynamic_state_pool, num_dwords * 4, 64); + + struct GENX(BLEND_STATE) blend_state = { +#if GEN_GEN >= 8 + .AlphaToCoverageEnable = ms_info && ms_info->alphaToCoverageEnable, + .AlphaToOneEnable = ms_info && ms_info->alphaToOneEnable, +#else + /* Make sure it gets zeroed */ + .Entry = { { 0, }, }, +#endif + }; + + /* Default everything to disabled */ + for (uint32_t i = 0; i < 8; i++) { + blend_state.Entry[i].WriteDisableAlpha = true; + blend_state.Entry[i].WriteDisableRed = true; + blend_state.Entry[i].WriteDisableGreen = true; + blend_state.Entry[i].WriteDisableBlue = true; + } + + uint32_t surface_count = 0; + struct anv_pipeline_bind_map *map; + if (anv_pipeline_has_stage(pipeline, MESA_SHADER_FRAGMENT)) { + map = &pipeline->shaders[MESA_SHADER_FRAGMENT]->bind_map; + surface_count = map->surface_count; + } + + bool has_writeable_rt = false; + for (unsigned i = 0; i < surface_count; i++) { + struct anv_pipeline_binding *binding = &map->surface_to_descriptor[i]; + + /* All color attachments are at the beginning of the binding table */ + if (binding->set != ANV_DESCRIPTOR_SET_COLOR_ATTACHMENTS) + break; + + /* We can have at most 8 attachments */ + assert(i < 8); + + if (info == NULL || binding->index >= info->attachmentCount) + continue; + + assert(binding->binding == 0); + const VkPipelineColorBlendAttachmentState *a = + &info->pAttachments[binding->index]; + + blend_state.Entry[i] = (struct GENX(BLEND_STATE_ENTRY)) { +#if GEN_GEN < 8 + .AlphaToCoverageEnable = ms_info && ms_info->alphaToCoverageEnable, + .AlphaToOneEnable = ms_info && ms_info->alphaToOneEnable, +#endif + .LogicOpEnable = info->logicOpEnable, + .LogicOpFunction = vk_to_gen_logic_op[info->logicOp], + .ColorBufferBlendEnable = a->blendEnable, + .ColorClampRange = COLORCLAMP_RTFORMAT, + .PreBlendColorClampEnable = true, + .PostBlendColorClampEnable = true, + .SourceBlendFactor = vk_to_gen_blend[a->srcColorBlendFactor], + .DestinationBlendFactor = vk_to_gen_blend[a->dstColorBlendFactor], + .ColorBlendFunction = vk_to_gen_blend_op[a->colorBlendOp], + .SourceAlphaBlendFactor = vk_to_gen_blend[a->srcAlphaBlendFactor], + .DestinationAlphaBlendFactor = vk_to_gen_blend[a->dstAlphaBlendFactor], + .AlphaBlendFunction = vk_to_gen_blend_op[a->alphaBlendOp], + .WriteDisableAlpha = !(a->colorWriteMask & VK_COLOR_COMPONENT_A_BIT), + .WriteDisableRed = !(a->colorWriteMask & VK_COLOR_COMPONENT_R_BIT), + .WriteDisableGreen = !(a->colorWriteMask & VK_COLOR_COMPONENT_G_BIT), + .WriteDisableBlue = !(a->colorWriteMask & VK_COLOR_COMPONENT_B_BIT), + }; + + if (a->srcColorBlendFactor != a->srcAlphaBlendFactor || + a->dstColorBlendFactor != a->dstAlphaBlendFactor || + a->colorBlendOp != a->alphaBlendOp) { +#if GEN_GEN >= 8 + blend_state.IndependentAlphaBlendEnable = true; +#else + blend_state.Entry[i].IndependentAlphaBlendEnable = true; +#endif + } + + if (a->colorWriteMask != 0) + has_writeable_rt = true; + + /* Our hardware applies the blend factor prior to the blend function + * regardless of what function is used. Technically, this means the + * hardware can do MORE than GL or Vulkan specify. However, it also + * means that, for MIN and MAX, we have to stomp the blend factor to + * ONE to make it a no-op. + */ + if (a->colorBlendOp == VK_BLEND_OP_MIN || + a->colorBlendOp == VK_BLEND_OP_MAX) { + blend_state.Entry[i].SourceBlendFactor = BLENDFACTOR_ONE; + blend_state.Entry[i].DestinationBlendFactor = BLENDFACTOR_ONE; + } + if (a->alphaBlendOp == VK_BLEND_OP_MIN || + a->alphaBlendOp == VK_BLEND_OP_MAX) { + blend_state.Entry[i].SourceAlphaBlendFactor = BLENDFACTOR_ONE; + blend_state.Entry[i].DestinationAlphaBlendFactor = BLENDFACTOR_ONE; + } + } + +#if GEN_GEN >= 8 + struct GENX(BLEND_STATE_ENTRY) *bs0 = &blend_state.Entry[0]; + anv_batch_emit(&pipeline->batch, GENX(3DSTATE_PS_BLEND), blend) { + blend.AlphaToCoverageEnable = blend_state.AlphaToCoverageEnable; + blend.HasWriteableRT = has_writeable_rt; + blend.ColorBufferBlendEnable = bs0->ColorBufferBlendEnable; + blend.SourceAlphaBlendFactor = bs0->SourceAlphaBlendFactor; + blend.DestinationAlphaBlendFactor = bs0->DestinationAlphaBlendFactor; + blend.SourceBlendFactor = bs0->SourceBlendFactor; + blend.DestinationBlendFactor = bs0->DestinationBlendFactor; + blend.AlphaTestEnable = false; + blend.IndependentAlphaBlendEnable = + blend_state.IndependentAlphaBlendEnable; + } +#else + (void)has_writeable_rt; +#endif + + GENX(BLEND_STATE_pack)(NULL, pipeline->blend_state.map, &blend_state); + if (!device->info.has_llc) + anv_state_clflush(pipeline->blend_state); + + anv_batch_emit(&pipeline->batch, GENX(3DSTATE_BLEND_STATE_POINTERS), bsp) { + bsp.BlendStatePointer = pipeline->blend_state.offset; +#if GEN_GEN >= 8 + bsp.BlendStatePointerValid = true; +#endif + } +} + +static void +emit_3dstate_clip(struct anv_pipeline *pipeline, + const VkPipelineViewportStateCreateInfo *vp_info, + const VkPipelineRasterizationStateCreateInfo *rs_info) +{ + const struct brw_wm_prog_data *wm_prog_data = get_wm_prog_data(pipeline); + (void) wm_prog_data; + anv_batch_emit(&pipeline->batch, GENX(3DSTATE_CLIP), clip) { + clip.ClipEnable = true; + clip.EarlyCullEnable = true; + clip.APIMode = APIMODE_D3D, + clip.ViewportXYClipTestEnable = true; + + clip.ClipMode = CLIPMODE_NORMAL; + + clip.TriangleStripListProvokingVertexSelect = 0; + clip.LineStripListProvokingVertexSelect = 0; + clip.TriangleFanProvokingVertexSelect = 1; + + clip.MinimumPointWidth = 0.125; + clip.MaximumPointWidth = 255.875; + + const struct brw_vue_prog_data *last = + anv_pipeline_get_last_vue_prog_data(pipeline); + + /* From the Vulkan 1.0.45 spec: + * + * "If the last active vertex processing stage shader entry point's + * interface does not include a variable decorated with + * ViewportIndex, then the first viewport is used." + */ + if (vp_info && (last->vue_map.slots_valid & VARYING_BIT_VIEWPORT)) { + clip.MaximumVPIndex = vp_info->viewportCount - 1; + } else { + clip.MaximumVPIndex = 0; + } + + /* From the Vulkan 1.0.45 spec: + * + * "If the last active vertex processing stage shader entry point's + * interface does not include a variable decorated with Layer, then + * the first layer is used." + */ + clip.ForceZeroRTAIndexEnable = + !(last->vue_map.slots_valid & VARYING_BIT_LAYER); + +#if GEN_GEN == 7 + clip.FrontWinding = vk_to_gen_front_face[rs_info->frontFace]; + clip.CullMode = vk_to_gen_cullmode[rs_info->cullMode]; + clip.ViewportZClipTestEnable = !pipeline->depth_clamp_enable; + if (last) { + clip.UserClipDistanceClipTestEnableBitmask = last->clip_distance_mask; + clip.UserClipDistanceCullTestEnableBitmask = last->cull_distance_mask; + } +#else + clip.NonPerspectiveBarycentricEnable = wm_prog_data ? + (wm_prog_data->barycentric_interp_modes & 0x38) != 0 : 0; +#endif + } +} + +static void +emit_3dstate_streamout(struct anv_pipeline *pipeline, + const VkPipelineRasterizationStateCreateInfo *rs_info) +{ + anv_batch_emit(&pipeline->batch, GENX(3DSTATE_STREAMOUT), so) { + so.RenderingDisable = rs_info->rasterizerDiscardEnable; + } +} + +static inline uint32_t +get_sampler_count(const struct anv_shader_bin *bin) +{ + return DIV_ROUND_UP(bin->bind_map.sampler_count, 4); +} + +static inline uint32_t +get_binding_table_entry_count(const struct anv_shader_bin *bin) +{ + return DIV_ROUND_UP(bin->bind_map.surface_count, 32); +} + +static inline struct anv_address +get_scratch_address(struct anv_pipeline *pipeline, + gl_shader_stage stage, + const struct anv_shader_bin *bin) +{ + return (struct anv_address) { + .bo = anv_scratch_pool_alloc(pipeline->device, + &pipeline->device->scratch_pool, + stage, bin->prog_data->total_scratch), + .offset = 0, + }; +} + +static inline uint32_t +get_scratch_space(const struct anv_shader_bin *bin) +{ + return ffs(bin->prog_data->total_scratch / 2048); +} + +static inline uint32_t +get_urb_output_offset() +{ + /* Skip the VUE header and position slots */ + return 1; +} + +static inline uint32_t +get_urb_output_length(const struct anv_shader_bin *bin) +{ + const struct brw_vue_prog_data *prog_data = + (const struct brw_vue_prog_data *)bin->prog_data; + + return (prog_data->vue_map.num_slots + 1) / 2 - get_urb_output_offset(); +} + +static void +emit_3dstate_vs(struct anv_pipeline *pipeline) +{ + const struct gen_device_info *devinfo = &pipeline->device->info; + const struct brw_vs_prog_data *vs_prog_data = get_vs_prog_data(pipeline); + const struct anv_shader_bin *vs_bin = + pipeline->shaders[MESA_SHADER_VERTEX]; + + assert(anv_pipeline_has_stage(pipeline, MESA_SHADER_VERTEX)); + + anv_batch_emit(&pipeline->batch, GENX(3DSTATE_VS), vs) { + vs.FunctionEnable = true; + vs.StatisticsEnable = true; + vs.KernelStartPointer = vs_bin->kernel.offset; +#if GEN_GEN >= 8 + vs.SIMD8DispatchEnable = + vs_prog_data->base.dispatch_mode == DISPATCH_MODE_SIMD8; +#endif + + assert(!vs_prog_data->base.base.use_alt_mode); + vs.SingleVertexDispatch = false; + vs.VectorMaskEnable = false; + vs.SamplerCount = get_sampler_count(vs_bin); + vs.BindingTableEntryCount = get_binding_table_entry_count(vs_bin); + vs.FloatingPointMode = IEEE754; + vs.IllegalOpcodeExceptionEnable = false; + vs.SoftwareExceptionEnable = false; + vs.MaximumNumberofThreads = devinfo->max_vs_threads - 1; + vs.VertexCacheDisable = false; + + vs.VertexURBEntryReadLength = vs_prog_data->base.urb_read_length; + vs.VertexURBEntryReadOffset = 0; + vs.DispatchGRFStartRegisterForURBData = + vs_prog_data->base.base.dispatch_grf_start_reg; + +#if GEN_GEN >= 8 + vs.VertexURBEntryOutputReadOffset = get_urb_output_offset(); + vs.VertexURBEntryOutputLength = get_urb_output_length(vs_bin); + + vs.UserClipDistanceClipTestEnableBitmask = + vs_prog_data->base.clip_distance_mask; + vs.UserClipDistanceCullTestEnableBitmask = + vs_prog_data->base.cull_distance_mask; +#endif + + vs.PerThreadScratchSpace = get_scratch_space(vs_bin); + vs.ScratchSpaceBasePointer = + get_scratch_address(pipeline, MESA_SHADER_VERTEX, vs_bin); + } +} + +static void +emit_3dstate_hs_te_ds(struct anv_pipeline *pipeline) +{ + if (!anv_pipeline_has_stage(pipeline, MESA_SHADER_TESS_EVAL)) { + anv_batch_emit(&pipeline->batch, GENX(3DSTATE_HS), hs); + anv_batch_emit(&pipeline->batch, GENX(3DSTATE_TE), te); + anv_batch_emit(&pipeline->batch, GENX(3DSTATE_DS), ds); + return; + } + + const struct gen_device_info *devinfo = &pipeline->device->info; + const struct anv_shader_bin *tcs_bin = + pipeline->shaders[MESA_SHADER_TESS_CTRL]; + const struct anv_shader_bin *tes_bin = + pipeline->shaders[MESA_SHADER_TESS_EVAL]; + + const struct brw_tcs_prog_data *tcs_prog_data = get_tcs_prog_data(pipeline); + const struct brw_tes_prog_data *tes_prog_data = get_tes_prog_data(pipeline); + + anv_batch_emit(&pipeline->batch, GENX(3DSTATE_HS), hs) { + hs.FunctionEnable = true; + hs.StatisticsEnable = true; + hs.KernelStartPointer = tcs_bin->kernel.offset; + + hs.SamplerCount = get_sampler_count(tcs_bin); + hs.BindingTableEntryCount = get_binding_table_entry_count(tcs_bin); + hs.MaximumNumberofThreads = devinfo->max_tcs_threads - 1; + hs.IncludeVertexHandles = true; + hs.InstanceCount = tcs_prog_data->instances - 1; + + hs.VertexURBEntryReadLength = 0; + hs.VertexURBEntryReadOffset = 0; + hs.DispatchGRFStartRegisterForURBData = + tcs_prog_data->base.base.dispatch_grf_start_reg; + + hs.PerThreadScratchSpace = get_scratch_space(tcs_bin); + hs.ScratchSpaceBasePointer = + get_scratch_address(pipeline, MESA_SHADER_TESS_CTRL, tcs_bin); + } + + anv_batch_emit(&pipeline->batch, GENX(3DSTATE_TE), te) { + te.Partitioning = tes_prog_data->partitioning; + te.OutputTopology = tes_prog_data->output_topology; + te.TEDomain = tes_prog_data->domain; + te.TEEnable = true; + te.MaximumTessellationFactorOdd = 63.0; + te.MaximumTessellationFactorNotOdd = 64.0; + } + + anv_batch_emit(&pipeline->batch, GENX(3DSTATE_DS), ds) { + ds.FunctionEnable = true; + ds.StatisticsEnable = true; + ds.KernelStartPointer = tes_bin->kernel.offset; + + ds.SamplerCount = get_sampler_count(tes_bin); + ds.BindingTableEntryCount = get_binding_table_entry_count(tes_bin); + ds.MaximumNumberofThreads = devinfo->max_tes_threads - 1; + + ds.ComputeWCoordinateEnable = + tes_prog_data->domain == BRW_TESS_DOMAIN_TRI; + + ds.PatchURBEntryReadLength = tes_prog_data->base.urb_read_length; + ds.PatchURBEntryReadOffset = 0; + ds.DispatchGRFStartRegisterForURBData = + tes_prog_data->base.base.dispatch_grf_start_reg; + +#if GEN_GEN >= 8 + ds.VertexURBEntryOutputReadOffset = 1; + ds.VertexURBEntryOutputLength = + (tes_prog_data->base.vue_map.num_slots + 1) / 2 - 1; + + ds.DispatchMode = + tes_prog_data->base.dispatch_mode == DISPATCH_MODE_SIMD8 ? + DISPATCH_MODE_SIMD8_SINGLE_PATCH : + DISPATCH_MODE_SIMD4X2; + + ds.UserClipDistanceClipTestEnableBitmask = + tes_prog_data->base.clip_distance_mask; + ds.UserClipDistanceCullTestEnableBitmask = + tes_prog_data->base.cull_distance_mask; +#endif + + ds.PerThreadScratchSpace = get_scratch_space(tes_bin); + ds.ScratchSpaceBasePointer = + get_scratch_address(pipeline, MESA_SHADER_TESS_EVAL, tes_bin); + } +} + +static void +emit_3dstate_gs(struct anv_pipeline *pipeline) +{ + const struct gen_device_info *devinfo = &pipeline->device->info; + const struct anv_shader_bin *gs_bin = + pipeline->shaders[MESA_SHADER_GEOMETRY]; + + if (!anv_pipeline_has_stage(pipeline, MESA_SHADER_GEOMETRY)) { + anv_batch_emit(&pipeline->batch, GENX(3DSTATE_GS), gs); + return; + } + + const struct brw_gs_prog_data *gs_prog_data = get_gs_prog_data(pipeline); + + anv_batch_emit(&pipeline->batch, GENX(3DSTATE_GS), gs) { + gs.FunctionEnable = true; + gs.StatisticsEnable = true; + gs.KernelStartPointer = gs_bin->kernel.offset; + gs.DispatchMode = gs_prog_data->base.dispatch_mode; + + gs.SingleProgramFlow = false; + gs.VectorMaskEnable = false; + gs.SamplerCount = get_sampler_count(gs_bin); + gs.BindingTableEntryCount = get_binding_table_entry_count(gs_bin); + gs.IncludeVertexHandles = gs_prog_data->base.include_vue_handles; + gs.IncludePrimitiveID = gs_prog_data->include_primitive_id; + + if (GEN_GEN == 8) { + /* Broadwell is weird. It needs us to divide by 2. */ + gs.MaximumNumberofThreads = devinfo->max_gs_threads / 2 - 1; + } else { + gs.MaximumNumberofThreads = devinfo->max_gs_threads - 1; + } + + gs.OutputVertexSize = gs_prog_data->output_vertex_size_hwords * 2 - 1; + gs.OutputTopology = gs_prog_data->output_topology; + gs.VertexURBEntryReadLength = gs_prog_data->base.urb_read_length; + gs.ControlDataFormat = gs_prog_data->control_data_format; + gs.ControlDataHeaderSize = gs_prog_data->control_data_header_size_hwords; + gs.InstanceControl = MAX2(gs_prog_data->invocations, 1) - 1; +#if GEN_GEN >= 8 || GEN_IS_HASWELL + gs.ReorderMode = TRAILING; +#else + gs.ReorderEnable = true; +#endif + +#if GEN_GEN >= 8 + gs.ExpectedVertexCount = gs_prog_data->vertices_in; + gs.StaticOutput = gs_prog_data->static_vertex_count >= 0; + gs.StaticOutputVertexCount = gs_prog_data->static_vertex_count >= 0 ? + gs_prog_data->static_vertex_count : 0; +#endif + + gs.VertexURBEntryReadOffset = 0; + gs.VertexURBEntryReadLength = gs_prog_data->base.urb_read_length; + gs.DispatchGRFStartRegisterForURBData = + gs_prog_data->base.base.dispatch_grf_start_reg; + +#if GEN_GEN >= 8 + gs.VertexURBEntryOutputReadOffset = get_urb_output_offset(); + gs.VertexURBEntryOutputLength = get_urb_output_length(gs_bin); + + gs.UserClipDistanceClipTestEnableBitmask = + gs_prog_data->base.clip_distance_mask; + gs.UserClipDistanceCullTestEnableBitmask = + gs_prog_data->base.cull_distance_mask; +#endif + + gs.PerThreadScratchSpace = get_scratch_space(gs_bin); + gs.ScratchSpaceBasePointer = + get_scratch_address(pipeline, MESA_SHADER_GEOMETRY, gs_bin); + } +} + +static void +emit_3dstate_wm(struct anv_pipeline *pipeline, struct anv_subpass *subpass, + const VkPipelineMultisampleStateCreateInfo *multisample) +{ + const struct brw_wm_prog_data *wm_prog_data = get_wm_prog_data(pipeline); + + MAYBE_UNUSED uint32_t samples = + multisample ? multisample->rasterizationSamples : 1; + + anv_batch_emit(&pipeline->batch, GENX(3DSTATE_WM), wm) { + wm.StatisticsEnable = true; + wm.LineEndCapAntialiasingRegionWidth = _05pixels; + wm.LineAntialiasingRegionWidth = _10pixels; + wm.PointRasterizationRule = RASTRULE_UPPER_RIGHT; + + if (anv_pipeline_has_stage(pipeline, MESA_SHADER_FRAGMENT)) { + if (wm_prog_data->early_fragment_tests) { + wm.EarlyDepthStencilControl = EDSC_PREPS; + } else if (wm_prog_data->has_side_effects) { + wm.EarlyDepthStencilControl = EDSC_PSEXEC; + } else { + wm.EarlyDepthStencilControl = EDSC_NORMAL; + } + + wm.BarycentricInterpolationMode = + wm_prog_data->barycentric_interp_modes; + +#if GEN_GEN < 8 + /* FIXME: This needs a lot more work, cf gen7 upload_wm_state(). */ + wm.ThreadDispatchEnable = true; + + wm.PixelShaderComputedDepthMode = wm_prog_data->computed_depth_mode; + wm.PixelShaderUsesSourceDepth = wm_prog_data->uses_src_depth; + wm.PixelShaderUsesSourceW = wm_prog_data->uses_src_w; + wm.PixelShaderUsesInputCoverageMask = wm_prog_data->uses_sample_mask; + + /* If the subpass has a depth or stencil self-dependency, then we + * need to force the hardware to do the depth/stencil write *after* + * fragment shader execution. Otherwise, the writes may hit memory + * before we get around to fetching from the input attachment and we + * may get the depth or stencil value from the current draw rather + * than the previous one. + */ + wm.PixelShaderKillsPixel = subpass->has_ds_self_dep || + wm_prog_data->uses_kill; + + if (samples > 1) { + wm.MultisampleRasterizationMode = MSRASTMODE_ON_PATTERN; + if (wm_prog_data->persample_dispatch) { + wm.MultisampleDispatchMode = MSDISPMODE_PERSAMPLE; + } else { + wm.MultisampleDispatchMode = MSDISPMODE_PERPIXEL; + } + } else { + wm.MultisampleRasterizationMode = MSRASTMODE_OFF_PIXEL; + wm.MultisampleDispatchMode = MSDISPMODE_PERSAMPLE; + } +#endif + } + } +} + +static inline bool +is_dual_src_blend_factor(VkBlendFactor factor) +{ + return factor == VK_BLEND_FACTOR_SRC1_COLOR || + factor == VK_BLEND_FACTOR_ONE_MINUS_SRC1_COLOR || + factor == VK_BLEND_FACTOR_SRC1_ALPHA || + factor == VK_BLEND_FACTOR_ONE_MINUS_SRC1_ALPHA; +} + +static void +emit_3dstate_ps(struct anv_pipeline *pipeline, + const VkPipelineColorBlendStateCreateInfo *blend) +{ + MAYBE_UNUSED const struct gen_device_info *devinfo = &pipeline->device->info; + const struct anv_shader_bin *fs_bin = + pipeline->shaders[MESA_SHADER_FRAGMENT]; + + if (!anv_pipeline_has_stage(pipeline, MESA_SHADER_FRAGMENT)) { + anv_batch_emit(&pipeline->batch, GENX(3DSTATE_PS), ps) { +#if GEN_GEN == 7 + /* Even if no fragments are ever dispatched, gen7 hardware hangs if + * we don't at least set the maximum number of threads. + */ + ps.MaximumNumberofThreads = devinfo->max_wm_threads - 1; +#endif + } + return; + } + + const struct brw_wm_prog_data *wm_prog_data = get_wm_prog_data(pipeline); + +#if GEN_GEN < 8 + /* The hardware wedges if you have this bit set but don't turn on any dual + * source blend factors. + */ + bool dual_src_blend = false; + if (wm_prog_data->dual_src_blend && blend) { + for (uint32_t i = 0; i < blend->attachmentCount; i++) { + const VkPipelineColorBlendAttachmentState *bstate = + &blend->pAttachments[i]; + + if (bstate->blendEnable && + (is_dual_src_blend_factor(bstate->srcColorBlendFactor) || + is_dual_src_blend_factor(bstate->dstColorBlendFactor) || + is_dual_src_blend_factor(bstate->srcAlphaBlendFactor) || + is_dual_src_blend_factor(bstate->dstAlphaBlendFactor))) { + dual_src_blend = true; + break; + } + } + } +#endif + + anv_batch_emit(&pipeline->batch, GENX(3DSTATE_PS), ps) { + ps.KernelStartPointer0 = fs_bin->kernel.offset; + ps.KernelStartPointer1 = 0; + ps.KernelStartPointer2 = fs_bin->kernel.offset + + wm_prog_data->prog_offset_2; + ps._8PixelDispatchEnable = wm_prog_data->dispatch_8; + ps._16PixelDispatchEnable = wm_prog_data->dispatch_16; + ps._32PixelDispatchEnable = false; + + ps.SingleProgramFlow = false; + ps.VectorMaskEnable = true; + ps.SamplerCount = get_sampler_count(fs_bin); + ps.BindingTableEntryCount = get_binding_table_entry_count(fs_bin); + ps.PushConstantEnable = wm_prog_data->base.nr_params > 0; + ps.PositionXYOffsetSelect = wm_prog_data->uses_pos_offset ? + POSOFFSET_SAMPLE: POSOFFSET_NONE; +#if GEN_GEN < 8 + ps.AttributeEnable = wm_prog_data->num_varying_inputs > 0; + ps.oMaskPresenttoRenderTarget = wm_prog_data->uses_omask; + ps.DualSourceBlendEnable = dual_src_blend; +#endif + +#if GEN_IS_HASWELL + /* Haswell requires the sample mask to be set in this packet as well + * as in 3DSTATE_SAMPLE_MASK; the values should match. + */ + ps.SampleMask = 0xff; +#endif + +#if GEN_GEN >= 9 + ps.MaximumNumberofThreadsPerPSD = 64 - 1; +#elif GEN_GEN >= 8 + ps.MaximumNumberofThreadsPerPSD = 64 - 2; +#else + ps.MaximumNumberofThreads = devinfo->max_wm_threads - 1; +#endif + + ps.DispatchGRFStartRegisterForConstantSetupData0 = + wm_prog_data->base.dispatch_grf_start_reg; + ps.DispatchGRFStartRegisterForConstantSetupData1 = 0; + ps.DispatchGRFStartRegisterForConstantSetupData2 = + wm_prog_data->dispatch_grf_start_reg_2; + + ps.PerThreadScratchSpace = get_scratch_space(fs_bin); + ps.ScratchSpaceBasePointer = + get_scratch_address(pipeline, MESA_SHADER_FRAGMENT, fs_bin); + } +} + +static inline bool +has_color_buffer_write_enabled(const struct anv_pipeline *pipeline) +{ + const struct anv_shader_bin *shader_bin = + pipeline->shaders[MESA_SHADER_FRAGMENT]; + if (!shader_bin) + return false; + + const struct anv_pipeline_bind_map *bind_map = &shader_bin->bind_map; + for (int i = 0; i < bind_map->surface_count; i++) { + if (bind_map->surface_to_descriptor[i].set != + ANV_DESCRIPTOR_SET_COLOR_ATTACHMENTS) + continue; + if (bind_map->surface_to_descriptor[i].index != UINT8_MAX) + return true; + } + + return false; +} + +#if GEN_GEN >= 8 +static void +emit_3dstate_ps_extra(struct anv_pipeline *pipeline, + struct anv_subpass *subpass) +{ + const struct brw_wm_prog_data *wm_prog_data = get_wm_prog_data(pipeline); + + if (!anv_pipeline_has_stage(pipeline, MESA_SHADER_FRAGMENT)) { + anv_batch_emit(&pipeline->batch, GENX(3DSTATE_PS_EXTRA), ps); + return; + } + + anv_batch_emit(&pipeline->batch, GENX(3DSTATE_PS_EXTRA), ps) { + ps.PixelShaderValid = true; + ps.AttributeEnable = wm_prog_data->num_varying_inputs > 0; + ps.oMaskPresenttoRenderTarget = wm_prog_data->uses_omask; + ps.PixelShaderIsPerSample = wm_prog_data->persample_dispatch; + ps.PixelShaderComputedDepthMode = wm_prog_data->computed_depth_mode; + ps.PixelShaderUsesSourceDepth = wm_prog_data->uses_src_depth; + ps.PixelShaderUsesSourceW = wm_prog_data->uses_src_w; + + /* If the subpass has a depth or stencil self-dependency, then we need + * to force the hardware to do the depth/stencil write *after* fragment + * shader execution. Otherwise, the writes may hit memory before we get + * around to fetching from the input attachment and we may get the depth + * or stencil value from the current draw rather than the previous one. + */ + ps.PixelShaderKillsPixel = subpass->has_ds_self_dep || + wm_prog_data->uses_kill; + + /* The stricter cross-primitive coherency guarantees that the hardware + * gives us with the "Accesses UAV" bit set for at least one shader stage + * and the "UAV coherency required" bit set on the 3DPRIMITIVE command are + * redundant within the current image, atomic counter and SSBO GL APIs, + * which all have very loose ordering and coherency requirements and + * generally rely on the application to insert explicit barriers when a + * shader invocation is expected to see the memory writes performed by the + * invocations of some previous primitive. Regardless of the value of + * "UAV coherency required", the "Accesses UAV" bits will implicitly cause + * an in most cases useless DC flush when the lowermost stage with the bit + * set finishes execution. + * + * It would be nice to disable it, but in some cases we can't because on + * Gen8+ it also has an influence on rasterization via the PS UAV-only + * signal (which could be set independently from the coherency mechanism + * in the 3DSTATE_WM command on Gen7), and because in some cases it will + * determine whether the hardware skips execution of the fragment shader + * or not via the ThreadDispatchEnable signal. However if we know that + * GEN8_PS_BLEND_HAS_WRITEABLE_RT is going to be set and + * GEN8_PSX_PIXEL_SHADER_NO_RT_WRITE is not set it shouldn't make any + * difference so we may just disable it here. + * + * Gen8 hardware tries to compute ThreadDispatchEnable for us but doesn't + * take into account KillPixels when no depth or stencil writes are + * enabled. In order for occlusion queries to work correctly with no + * attachments, we need to force-enable here. + */ + if ((wm_prog_data->has_side_effects || wm_prog_data->uses_kill) && + !has_color_buffer_write_enabled(pipeline)) + ps.PixelShaderHasUAV = true; + +#if GEN_GEN >= 9 + ps.PixelShaderPullsBary = wm_prog_data->pulls_bary; + ps.InputCoverageMaskState = wm_prog_data->uses_sample_mask ? + ICMS_INNER_CONSERVATIVE : ICMS_NONE; +#else + ps.PixelShaderUsesInputCoverageMask = wm_prog_data->uses_sample_mask; +#endif + } +} + +static void +emit_3dstate_vf_topology(struct anv_pipeline *pipeline) +{ + anv_batch_emit(&pipeline->batch, GENX(3DSTATE_VF_TOPOLOGY), vft) { + vft.PrimitiveTopologyType = pipeline->topology; + } +} +#endif + +static VkResult +genX(graphics_pipeline_create)( + VkDevice _device, + struct anv_pipeline_cache * cache, + const VkGraphicsPipelineCreateInfo* pCreateInfo, + const VkAllocationCallbacks* pAllocator, + VkPipeline* pPipeline) +{ + ANV_FROM_HANDLE(anv_device, device, _device); + ANV_FROM_HANDLE(anv_render_pass, pass, pCreateInfo->renderPass); + struct anv_subpass *subpass = &pass->subpasses[pCreateInfo->subpass]; + struct anv_pipeline *pipeline; + VkResult result; + + assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO); + + pipeline = vk_alloc2(&device->alloc, pAllocator, sizeof(*pipeline), 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (pipeline == NULL) + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); + + result = anv_pipeline_init(pipeline, device, cache, + pCreateInfo, pAllocator); + if (result != VK_SUCCESS) { + vk_free2(&device->alloc, pAllocator, pipeline); + return result; + } + + assert(pCreateInfo->pVertexInputState); + emit_vertex_input(pipeline, pCreateInfo->pVertexInputState); + assert(pCreateInfo->pRasterizationState); + emit_rs_state(pipeline, pCreateInfo->pRasterizationState, + pCreateInfo->pMultisampleState, pass, subpass); + emit_ms_state(pipeline, pCreateInfo->pMultisampleState); + emit_ds_state(pipeline, pCreateInfo->pDepthStencilState, pass, subpass); + emit_cb_state(pipeline, pCreateInfo->pColorBlendState, + pCreateInfo->pMultisampleState); + + emit_urb_setup(pipeline); + + emit_3dstate_clip(pipeline, pCreateInfo->pViewportState, + pCreateInfo->pRasterizationState); + emit_3dstate_streamout(pipeline, pCreateInfo->pRasterizationState); + +#if 0 + /* From gen7_vs_state.c */ + + /** + * From Graphics BSpec: 3D-Media-GPGPU Engine > 3D Pipeline Stages > + * Geometry > Geometry Shader > State: + * + * "Note: Because of corruption in IVB:GT2, software needs to flush the + * whole fixed function pipeline when the GS enable changes value in + * the 3DSTATE_GS." + * + * The hardware architects have clarified that in this context "flush the + * whole fixed function pipeline" means to emit a PIPE_CONTROL with the "CS + * Stall" bit set. + */ + if (!brw->is_haswell && !brw->is_baytrail) + gen7_emit_vs_workaround_flush(brw); +#endif + + emit_3dstate_vs(pipeline); + emit_3dstate_hs_te_ds(pipeline); + emit_3dstate_gs(pipeline); + emit_3dstate_sbe(pipeline); + emit_3dstate_wm(pipeline, subpass, pCreateInfo->pMultisampleState); + emit_3dstate_ps(pipeline, pCreateInfo->pColorBlendState); +#if GEN_GEN >= 8 + emit_3dstate_ps_extra(pipeline, subpass); + emit_3dstate_vf_topology(pipeline); +#endif + + *pPipeline = anv_pipeline_to_handle(pipeline); + + return VK_SUCCESS; +} + +static VkResult +compute_pipeline_create( VkDevice _device, struct anv_pipeline_cache * cache, const VkComputePipelineCreateInfo* pCreateInfo, @@ -35,12 +1536,15 @@ VkPipeline* pPipeline) { ANV_FROM_HANDLE(anv_device, device, _device); + const struct anv_physical_device *physical_device = + &device->instance->physicalDevice; + const struct gen_device_info *devinfo = &physical_device->info; struct anv_pipeline *pipeline; VkResult result; assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_COMPUTE_PIPELINE_CREATE_INFO); - pipeline = anv_alloc2(&device->alloc, pAllocator, sizeof(*pipeline), 8, + pipeline = vk_alloc2(&device->alloc, pAllocator, sizeof(*pipeline), 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (pipeline == NULL) return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); @@ -53,7 +1557,7 @@ result = anv_reloc_list_init(&pipeline->batch_relocs, pAllocator ? pAllocator : &device->alloc); if (result != VK_SUCCESS) { - anv_free2(&device->alloc, pAllocator, pipeline); + vk_free2(&device->alloc, pAllocator, pipeline); return result; } pipeline->batch.next = pipeline->batch.start = pipeline->batch_data; @@ -65,10 +1569,6 @@ */ memset(pipeline->shaders, 0, sizeof(pipeline->shaders)); - pipeline->vs_simd8 = NO_KERNEL; - pipeline->vs_vec4 = NO_KERNEL; - pipeline->gs_kernel = NO_KERNEL; - pipeline->active_stages = 0; pipeline->needs_data_cache = false; @@ -79,16 +1579,14 @@ pCreateInfo->stage.pName, pCreateInfo->stage.pSpecializationInfo); if (result != VK_SUCCESS) { - anv_free2(&device->alloc, pAllocator, pipeline); + vk_free2(&device->alloc, pAllocator, pipeline); return result; } - pipeline->use_repclear = false; - - anv_setup_pipeline_l3_config(pipeline); - const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline); + anv_pipeline_setup_l3_config(pipeline, cs_prog_data->base.total_shared > 0); + uint32_t group_size = cs_prog_data->local_size[0] * cs_prog_data->local_size[1] * cs_prog_data->local_size[2]; uint32_t remainder = group_size & (cs_prog_data->simd_size - 1); @@ -102,20 +1600,19 @@ ALIGN(cs_prog_data->push.per_thread.regs * cs_prog_data->threads + cs_prog_data->push.cross_thread.regs, 2); + const uint32_t subslices = MAX2(physical_device->subslice_total, 1); + + const struct anv_shader_bin *cs_bin = + pipeline->shaders[MESA_SHADER_COMPUTE]; + anv_batch_emit(&pipeline->batch, GENX(MEDIA_VFE_STATE), vfe) { - vfe.ScratchSpaceBasePointer = (struct anv_address) { - .bo = anv_scratch_pool_alloc(device, &device->scratch_pool, - MESA_SHADER_COMPUTE, - cs_prog_data->base.total_scratch), - .offset = 0, - }; - vfe.PerThreadScratchSpace = ffs(cs_prog_data->base.total_scratch / 2048); #if GEN_GEN > 7 vfe.StackSize = 0; #else vfe.GPGPUMode = true; #endif - vfe.MaximumNumberofThreads = device->info.max_cs_threads - 1; + vfe.MaximumNumberofThreads = + devinfo->max_cs_threads * subslices - 1; vfe.NumberofURBEntries = GEN_GEN <= 7 ? 0 : 2; vfe.ResetGatewayTimer = true; #if GEN_GEN <= 8 @@ -123,9 +1620,98 @@ #endif vfe.URBEntryAllocationSize = GEN_GEN <= 7 ? 0 : 2; vfe.CURBEAllocationSize = vfe_curbe_allocation; + + vfe.PerThreadScratchSpace = get_scratch_space(cs_bin); + vfe.ScratchSpaceBasePointer = + get_scratch_address(pipeline, MESA_SHADER_COMPUTE, cs_bin); } + struct GENX(INTERFACE_DESCRIPTOR_DATA) desc = { + .KernelStartPointer = cs_bin->kernel.offset, + + .SamplerCount = get_sampler_count(cs_bin), + .BindingTableEntryCount = get_binding_table_entry_count(cs_bin), + .BarrierEnable = cs_prog_data->uses_barrier, + .SharedLocalMemorySize = + encode_slm_size(GEN_GEN, cs_prog_data->base.total_shared), + +#if !GEN_IS_HASWELL + .ConstantURBEntryReadOffset = 0, +#endif + .ConstantURBEntryReadLength = cs_prog_data->push.per_thread.regs, +#if GEN_GEN >= 8 || GEN_IS_HASWELL + .CrossThreadConstantDataReadLength = + cs_prog_data->push.cross_thread.regs, +#endif + + .NumberofThreadsinGPGPUThreadGroup = cs_prog_data->threads, + }; + GENX(INTERFACE_DESCRIPTOR_DATA_pack)(NULL, + pipeline->interface_descriptor_data, + &desc); + *pPipeline = anv_pipeline_to_handle(pipeline); return VK_SUCCESS; } + +VkResult genX(CreateGraphicsPipelines)( + VkDevice _device, + VkPipelineCache pipelineCache, + uint32_t count, + const VkGraphicsPipelineCreateInfo* pCreateInfos, + const VkAllocationCallbacks* pAllocator, + VkPipeline* pPipelines) +{ + ANV_FROM_HANDLE(anv_pipeline_cache, pipeline_cache, pipelineCache); + + VkResult result = VK_SUCCESS; + + unsigned i; + for (i = 0; i < count; i++) { + result = genX(graphics_pipeline_create)(_device, + pipeline_cache, + &pCreateInfos[i], + pAllocator, &pPipelines[i]); + + /* Bail out on the first error as it is not obvious what error should be + * report upon 2 different failures. */ + if (result != VK_SUCCESS) + break; + } + + for (; i < count; i++) + pPipelines[i] = VK_NULL_HANDLE; + + return result; +} + +VkResult genX(CreateComputePipelines)( + VkDevice _device, + VkPipelineCache pipelineCache, + uint32_t count, + const VkComputePipelineCreateInfo* pCreateInfos, + const VkAllocationCallbacks* pAllocator, + VkPipeline* pPipelines) +{ + ANV_FROM_HANDLE(anv_pipeline_cache, pipeline_cache, pipelineCache); + + VkResult result = VK_SUCCESS; + + unsigned i; + for (i = 0; i < count; i++) { + result = compute_pipeline_create(_device, pipeline_cache, + &pCreateInfos[i], + pAllocator, &pPipelines[i]); + + /* Bail out on the first error as it is not obvious what error should be + * report upon 2 different failures. */ + if (result != VK_SUCCESS) + break; + } + + for (; i < count; i++) + pPipelines[i] = VK_NULL_HANDLE; + + return result; +} diff -Nru mesa-12.0.6/src/intel/vulkan/genX_pipeline_util.h mesa-17.0.7/src/intel/vulkan/genX_pipeline_util.h --- mesa-12.0.6/src/intel/vulkan/genX_pipeline_util.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/genX_pipeline_util.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,693 +0,0 @@ -/* - * Copyright © 2015 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - -#include "vk_format_info.h" - -static uint32_t -vertex_element_comp_control(enum isl_format format, unsigned comp) -{ - uint8_t bits; - switch (comp) { - case 0: bits = isl_format_layouts[format].channels.r.bits; break; - case 1: bits = isl_format_layouts[format].channels.g.bits; break; - case 2: bits = isl_format_layouts[format].channels.b.bits; break; - case 3: bits = isl_format_layouts[format].channels.a.bits; break; - default: unreachable("Invalid component"); - } - - if (bits) { - return VFCOMP_STORE_SRC; - } else if (comp < 3) { - return VFCOMP_STORE_0; - } else if (isl_format_layouts[format].channels.r.type == ISL_UINT || - isl_format_layouts[format].channels.r.type == ISL_SINT) { - assert(comp == 3); - return VFCOMP_STORE_1_INT; - } else { - assert(comp == 3); - return VFCOMP_STORE_1_FP; - } -} - -static void -emit_vertex_input(struct anv_pipeline *pipeline, - const VkPipelineVertexInputStateCreateInfo *info, - const struct anv_graphics_pipeline_create_info *extra) -{ - const struct brw_vs_prog_data *vs_prog_data = get_vs_prog_data(pipeline); - - uint32_t elements; - if (extra && extra->disable_vs) { - /* If the VS is disabled, just assume the user knows what they're - * doing and apply the layout blindly. This can only come from - * meta, so this *should* be safe. - */ - elements = 0; - for (uint32_t i = 0; i < info->vertexAttributeDescriptionCount; i++) - elements |= (1 << info->pVertexAttributeDescriptions[i].location); - } else { - /* Pull inputs_read out of the VS prog data */ - uint64_t inputs_read = vs_prog_data->inputs_read; - assert((inputs_read & ((1 << VERT_ATTRIB_GENERIC0) - 1)) == 0); - elements = inputs_read >> VERT_ATTRIB_GENERIC0; - } - -#if GEN_GEN >= 8 - /* On BDW+, we only need to allocate space for base ids. Setting up - * the actual vertex and instance id is a separate packet. - */ - const bool needs_svgs_elem = vs_prog_data->uses_basevertex || - vs_prog_data->uses_baseinstance; -#else - /* On Haswell and prior, vertex and instance id are created by using the - * ComponentControl fields, so we need an element for any of them. - */ - const bool needs_svgs_elem = vs_prog_data->uses_vertexid || - vs_prog_data->uses_instanceid || - vs_prog_data->uses_basevertex || - vs_prog_data->uses_baseinstance; -#endif - - uint32_t elem_count = __builtin_popcount(elements) + needs_svgs_elem; - if (elem_count == 0) - return; - - uint32_t *p; - - const uint32_t num_dwords = 1 + elem_count * 2; - p = anv_batch_emitn(&pipeline->batch, num_dwords, - GENX(3DSTATE_VERTEX_ELEMENTS)); - memset(p + 1, 0, (num_dwords - 1) * 4); - - for (uint32_t i = 0; i < info->vertexAttributeDescriptionCount; i++) { - const VkVertexInputAttributeDescription *desc = - &info->pVertexAttributeDescriptions[i]; - enum isl_format format = anv_get_isl_format(&pipeline->device->info, - desc->format, - VK_IMAGE_ASPECT_COLOR_BIT, - VK_IMAGE_TILING_LINEAR); - - assert(desc->binding < 32); - - if ((elements & (1 << desc->location)) == 0) - continue; /* Binding unused */ - - uint32_t slot = __builtin_popcount(elements & ((1 << desc->location) - 1)); - - struct GENX(VERTEX_ELEMENT_STATE) element = { - .VertexBufferIndex = desc->binding, - .Valid = true, - .SourceElementFormat = format, - .EdgeFlagEnable = false, - .SourceElementOffset = desc->offset, - .Component0Control = vertex_element_comp_control(format, 0), - .Component1Control = vertex_element_comp_control(format, 1), - .Component2Control = vertex_element_comp_control(format, 2), - .Component3Control = vertex_element_comp_control(format, 3), - }; - GENX(VERTEX_ELEMENT_STATE_pack)(NULL, &p[1 + slot * 2], &element); - -#if GEN_GEN >= 8 - /* On Broadwell and later, we have a separate VF_INSTANCING packet - * that controls instancing. On Haswell and prior, that's part of - * VERTEX_BUFFER_STATE which we emit later. - */ - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_VF_INSTANCING), vfi) { - vfi.InstancingEnable = pipeline->instancing_enable[desc->binding], - vfi.VertexElementIndex = slot, - /* Vulkan so far doesn't have an instance divisor, so - * this is always 1 (ignored if not instancing). */ - vfi.InstanceDataStepRate = 1; - } -#endif - } - - const uint32_t id_slot = __builtin_popcount(elements); - if (needs_svgs_elem) { - /* From the Broadwell PRM for the 3D_Vertex_Component_Control enum: - * "Within a VERTEX_ELEMENT_STATE structure, if a Component - * Control field is set to something other than VFCOMP_STORE_SRC, - * no higher-numbered Component Control fields may be set to - * VFCOMP_STORE_SRC" - * - * This means, that if we have BaseInstance, we need BaseVertex as - * well. Just do all or nothing. - */ - uint32_t base_ctrl = (vs_prog_data->uses_basevertex || - vs_prog_data->uses_baseinstance) ? - VFCOMP_STORE_SRC : VFCOMP_STORE_0; - - struct GENX(VERTEX_ELEMENT_STATE) element = { - .VertexBufferIndex = 32, /* Reserved for this */ - .Valid = true, - .SourceElementFormat = ISL_FORMAT_R32G32_UINT, - .Component0Control = base_ctrl, - .Component1Control = base_ctrl, -#if GEN_GEN >= 8 - .Component2Control = VFCOMP_STORE_0, - .Component3Control = VFCOMP_STORE_0, -#else - .Component2Control = VFCOMP_STORE_VID, - .Component3Control = VFCOMP_STORE_IID, -#endif - }; - GENX(VERTEX_ELEMENT_STATE_pack)(NULL, &p[1 + id_slot * 2], &element); - } - -#if GEN_GEN >= 8 - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_VF_SGVS), sgvs) { - sgvs.VertexIDEnable = vs_prog_data->uses_vertexid; - sgvs.VertexIDComponentNumber = 2; - sgvs.VertexIDElementOffset = id_slot; - sgvs.InstanceIDEnable = vs_prog_data->uses_instanceid; - sgvs.InstanceIDComponentNumber = 3; - sgvs.InstanceIDElementOffset = id_slot; - } -#endif -} - -static inline void -emit_urb_setup(struct anv_pipeline *pipeline) -{ -#if GEN_GEN == 7 && !GEN_IS_HASWELL - struct anv_device *device = pipeline->device; - - /* From the IVB PRM Vol. 2, Part 1, Section 3.2.1: - * - * "A PIPE_CONTROL with Post-Sync Operation set to 1h and a depth stall - * needs to be sent just prior to any 3DSTATE_VS, 3DSTATE_URB_VS, - * 3DSTATE_CONSTANT_VS, 3DSTATE_BINDING_TABLE_POINTER_VS, - * 3DSTATE_SAMPLER_STATE_POINTER_VS command. Only one PIPE_CONTROL - * needs to be sent before any combination of VS associated 3DSTATE." - */ - anv_batch_emit(&pipeline->batch, GEN7_PIPE_CONTROL, pc) { - pc.DepthStallEnable = true; - pc.PostSyncOperation = WriteImmediateData; - pc.Address = (struct anv_address) { &device->workaround_bo, 0 }; - } -#endif - - for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) { - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_URB_VS), urb) { - urb._3DCommandSubOpcode = 48 + i; - urb.VSURBStartingAddress = pipeline->urb.start[i]; - urb.VSURBEntryAllocationSize = pipeline->urb.size[i] - 1; - urb.VSNumberofURBEntries = pipeline->urb.entries[i]; - } - } -} - -static void -emit_3dstate_sbe(struct anv_pipeline *pipeline) -{ - const struct brw_vs_prog_data *vs_prog_data = get_vs_prog_data(pipeline); - const struct brw_gs_prog_data *gs_prog_data = get_gs_prog_data(pipeline); - const struct brw_wm_prog_data *wm_prog_data = get_wm_prog_data(pipeline); - const struct brw_vue_map *fs_input_map; - - if (pipeline->gs_kernel == NO_KERNEL) - fs_input_map = &vs_prog_data->base.vue_map; - else - fs_input_map = &gs_prog_data->base.vue_map; - - struct GENX(3DSTATE_SBE) sbe = { - GENX(3DSTATE_SBE_header), - .AttributeSwizzleEnable = true, - .PointSpriteTextureCoordinateOrigin = UPPERLEFT, - .NumberofSFOutputAttributes = wm_prog_data->num_varying_inputs, - .ConstantInterpolationEnable = wm_prog_data->flat_inputs, - -#if GEN_GEN >= 9 - .Attribute0ActiveComponentFormat = ACF_XYZW, - .Attribute1ActiveComponentFormat = ACF_XYZW, - .Attribute2ActiveComponentFormat = ACF_XYZW, - .Attribute3ActiveComponentFormat = ACF_XYZW, - .Attribute4ActiveComponentFormat = ACF_XYZW, - .Attribute5ActiveComponentFormat = ACF_XYZW, - .Attribute6ActiveComponentFormat = ACF_XYZW, - .Attribute7ActiveComponentFormat = ACF_XYZW, - .Attribute8ActiveComponentFormat = ACF_XYZW, - .Attribute9ActiveComponentFormat = ACF_XYZW, - .Attribute10ActiveComponentFormat = ACF_XYZW, - .Attribute11ActiveComponentFormat = ACF_XYZW, - .Attribute12ActiveComponentFormat = ACF_XYZW, - .Attribute13ActiveComponentFormat = ACF_XYZW, - .Attribute14ActiveComponentFormat = ACF_XYZW, - .Attribute15ActiveComponentFormat = ACF_XYZW, - /* wow, much field, very attribute */ - .Attribute16ActiveComponentFormat = ACF_XYZW, - .Attribute17ActiveComponentFormat = ACF_XYZW, - .Attribute18ActiveComponentFormat = ACF_XYZW, - .Attribute19ActiveComponentFormat = ACF_XYZW, - .Attribute20ActiveComponentFormat = ACF_XYZW, - .Attribute21ActiveComponentFormat = ACF_XYZW, - .Attribute22ActiveComponentFormat = ACF_XYZW, - .Attribute23ActiveComponentFormat = ACF_XYZW, - .Attribute24ActiveComponentFormat = ACF_XYZW, - .Attribute25ActiveComponentFormat = ACF_XYZW, - .Attribute26ActiveComponentFormat = ACF_XYZW, - .Attribute27ActiveComponentFormat = ACF_XYZW, - .Attribute28ActiveComponentFormat = ACF_XYZW, - .Attribute29ActiveComponentFormat = ACF_XYZW, - .Attribute28ActiveComponentFormat = ACF_XYZW, - .Attribute29ActiveComponentFormat = ACF_XYZW, - .Attribute30ActiveComponentFormat = ACF_XYZW, -#endif - }; - -#if GEN_GEN >= 8 - /* On Broadwell, they broke 3DSTATE_SBE into two packets */ - struct GENX(3DSTATE_SBE_SWIZ) swiz = { - GENX(3DSTATE_SBE_SWIZ_header), - }; -#else -# define swiz sbe -#endif - - int max_source_attr = 0; - for (int attr = 0; attr < VARYING_SLOT_MAX; attr++) { - int input_index = wm_prog_data->urb_setup[attr]; - - if (input_index < 0) - continue; - - if (attr == VARYING_SLOT_PNTC) { - sbe.PointSpriteTextureCoordinateEnable = 1 << input_index; - continue; - } - - const int slot = fs_input_map->varying_to_slot[attr]; - - if (input_index >= 16) - continue; - - if (slot == -1) { - /* This attribute does not exist in the VUE--that means that the - * vertex shader did not write to it. It could be that it's a - * regular varying read by the fragment shader but not written by - * the vertex shader or it's gl_PrimitiveID. In the first case the - * value is undefined, in the second it needs to be - * gl_PrimitiveID. - */ - swiz.Attribute[input_index].ConstantSource = PRIM_ID; - swiz.Attribute[input_index].ComponentOverrideX = true; - swiz.Attribute[input_index].ComponentOverrideY = true; - swiz.Attribute[input_index].ComponentOverrideZ = true; - swiz.Attribute[input_index].ComponentOverrideW = true; - } else { - assert(slot >= 2); - const int source_attr = slot - 2; - max_source_attr = MAX2(max_source_attr, source_attr); - /* We have to subtract two slots to accout for the URB entry output - * read offset in the VS and GS stages. - */ - swiz.Attribute[input_index].SourceAttribute = source_attr; - } - } - - sbe.VertexURBEntryReadOffset = 1; /* Skip the VUE header and position slots */ - sbe.VertexURBEntryReadLength = DIV_ROUND_UP(max_source_attr + 1, 2); - - uint32_t *dw = anv_batch_emit_dwords(&pipeline->batch, - GENX(3DSTATE_SBE_length)); - GENX(3DSTATE_SBE_pack)(&pipeline->batch, dw, &sbe); - -#if GEN_GEN >= 8 - dw = anv_batch_emit_dwords(&pipeline->batch, GENX(3DSTATE_SBE_SWIZ_length)); - GENX(3DSTATE_SBE_SWIZ_pack)(&pipeline->batch, dw, &swiz); -#endif -} - -static inline uint32_t -scratch_space(const struct brw_stage_prog_data *prog_data) -{ - return ffs(prog_data->total_scratch / 2048); -} - -static const uint32_t vk_to_gen_cullmode[] = { - [VK_CULL_MODE_NONE] = CULLMODE_NONE, - [VK_CULL_MODE_FRONT_BIT] = CULLMODE_FRONT, - [VK_CULL_MODE_BACK_BIT] = CULLMODE_BACK, - [VK_CULL_MODE_FRONT_AND_BACK] = CULLMODE_BOTH -}; - -static const uint32_t vk_to_gen_fillmode[] = { - [VK_POLYGON_MODE_FILL] = FILL_MODE_SOLID, - [VK_POLYGON_MODE_LINE] = FILL_MODE_WIREFRAME, - [VK_POLYGON_MODE_POINT] = FILL_MODE_POINT, -}; - -static const uint32_t vk_to_gen_front_face[] = { - [VK_FRONT_FACE_COUNTER_CLOCKWISE] = 1, - [VK_FRONT_FACE_CLOCKWISE] = 0 -}; - -static const uint32_t vk_to_gen_logic_op[] = { - [VK_LOGIC_OP_COPY] = LOGICOP_COPY, - [VK_LOGIC_OP_CLEAR] = LOGICOP_CLEAR, - [VK_LOGIC_OP_AND] = LOGICOP_AND, - [VK_LOGIC_OP_AND_REVERSE] = LOGICOP_AND_REVERSE, - [VK_LOGIC_OP_AND_INVERTED] = LOGICOP_AND_INVERTED, - [VK_LOGIC_OP_NO_OP] = LOGICOP_NOOP, - [VK_LOGIC_OP_XOR] = LOGICOP_XOR, - [VK_LOGIC_OP_OR] = LOGICOP_OR, - [VK_LOGIC_OP_NOR] = LOGICOP_NOR, - [VK_LOGIC_OP_EQUIVALENT] = LOGICOP_EQUIV, - [VK_LOGIC_OP_INVERT] = LOGICOP_INVERT, - [VK_LOGIC_OP_OR_REVERSE] = LOGICOP_OR_REVERSE, - [VK_LOGIC_OP_COPY_INVERTED] = LOGICOP_COPY_INVERTED, - [VK_LOGIC_OP_OR_INVERTED] = LOGICOP_OR_INVERTED, - [VK_LOGIC_OP_NAND] = LOGICOP_NAND, - [VK_LOGIC_OP_SET] = LOGICOP_SET, -}; - -static const uint32_t vk_to_gen_blend[] = { - [VK_BLEND_FACTOR_ZERO] = BLENDFACTOR_ZERO, - [VK_BLEND_FACTOR_ONE] = BLENDFACTOR_ONE, - [VK_BLEND_FACTOR_SRC_COLOR] = BLENDFACTOR_SRC_COLOR, - [VK_BLEND_FACTOR_ONE_MINUS_SRC_COLOR] = BLENDFACTOR_INV_SRC_COLOR, - [VK_BLEND_FACTOR_DST_COLOR] = BLENDFACTOR_DST_COLOR, - [VK_BLEND_FACTOR_ONE_MINUS_DST_COLOR] = BLENDFACTOR_INV_DST_COLOR, - [VK_BLEND_FACTOR_SRC_ALPHA] = BLENDFACTOR_SRC_ALPHA, - [VK_BLEND_FACTOR_ONE_MINUS_SRC_ALPHA] = BLENDFACTOR_INV_SRC_ALPHA, - [VK_BLEND_FACTOR_DST_ALPHA] = BLENDFACTOR_DST_ALPHA, - [VK_BLEND_FACTOR_ONE_MINUS_DST_ALPHA] = BLENDFACTOR_INV_DST_ALPHA, - [VK_BLEND_FACTOR_CONSTANT_COLOR] = BLENDFACTOR_CONST_COLOR, - [VK_BLEND_FACTOR_ONE_MINUS_CONSTANT_COLOR]= BLENDFACTOR_INV_CONST_COLOR, - [VK_BLEND_FACTOR_CONSTANT_ALPHA] = BLENDFACTOR_CONST_ALPHA, - [VK_BLEND_FACTOR_ONE_MINUS_CONSTANT_ALPHA]= BLENDFACTOR_INV_CONST_ALPHA, - [VK_BLEND_FACTOR_SRC_ALPHA_SATURATE] = BLENDFACTOR_SRC_ALPHA_SATURATE, - [VK_BLEND_FACTOR_SRC1_COLOR] = BLENDFACTOR_SRC1_COLOR, - [VK_BLEND_FACTOR_ONE_MINUS_SRC1_COLOR] = BLENDFACTOR_INV_SRC1_COLOR, - [VK_BLEND_FACTOR_SRC1_ALPHA] = BLENDFACTOR_SRC1_ALPHA, - [VK_BLEND_FACTOR_ONE_MINUS_SRC1_ALPHA] = BLENDFACTOR_INV_SRC1_ALPHA, -}; - -static const uint32_t vk_to_gen_blend_op[] = { - [VK_BLEND_OP_ADD] = BLENDFUNCTION_ADD, - [VK_BLEND_OP_SUBTRACT] = BLENDFUNCTION_SUBTRACT, - [VK_BLEND_OP_REVERSE_SUBTRACT] = BLENDFUNCTION_REVERSE_SUBTRACT, - [VK_BLEND_OP_MIN] = BLENDFUNCTION_MIN, - [VK_BLEND_OP_MAX] = BLENDFUNCTION_MAX, -}; - -static const uint32_t vk_to_gen_compare_op[] = { - [VK_COMPARE_OP_NEVER] = PREFILTEROPNEVER, - [VK_COMPARE_OP_LESS] = PREFILTEROPLESS, - [VK_COMPARE_OP_EQUAL] = PREFILTEROPEQUAL, - [VK_COMPARE_OP_LESS_OR_EQUAL] = PREFILTEROPLEQUAL, - [VK_COMPARE_OP_GREATER] = PREFILTEROPGREATER, - [VK_COMPARE_OP_NOT_EQUAL] = PREFILTEROPNOTEQUAL, - [VK_COMPARE_OP_GREATER_OR_EQUAL] = PREFILTEROPGEQUAL, - [VK_COMPARE_OP_ALWAYS] = PREFILTEROPALWAYS, -}; - -static const uint32_t vk_to_gen_stencil_op[] = { - [VK_STENCIL_OP_KEEP] = STENCILOP_KEEP, - [VK_STENCIL_OP_ZERO] = STENCILOP_ZERO, - [VK_STENCIL_OP_REPLACE] = STENCILOP_REPLACE, - [VK_STENCIL_OP_INCREMENT_AND_CLAMP] = STENCILOP_INCRSAT, - [VK_STENCIL_OP_DECREMENT_AND_CLAMP] = STENCILOP_DECRSAT, - [VK_STENCIL_OP_INVERT] = STENCILOP_INVERT, - [VK_STENCIL_OP_INCREMENT_AND_WRAP] = STENCILOP_INCR, - [VK_STENCIL_OP_DECREMENT_AND_WRAP] = STENCILOP_DECR, -}; - -static void -emit_ds_state(struct anv_pipeline *pipeline, - const VkPipelineDepthStencilStateCreateInfo *info, - const struct anv_render_pass *pass, - const struct anv_subpass *subpass) -{ -#if GEN_GEN == 7 -# define depth_stencil_dw pipeline->gen7.depth_stencil_state -#elif GEN_GEN == 8 -# define depth_stencil_dw pipeline->gen8.wm_depth_stencil -#else -# define depth_stencil_dw pipeline->gen9.wm_depth_stencil -#endif - - if (info == NULL) { - /* We're going to OR this together with the dynamic state. We need - * to make sure it's initialized to something useful. - */ - memset(depth_stencil_dw, 0, sizeof(depth_stencil_dw)); - return; - } - - /* VkBool32 depthBoundsTestEnable; // optional (depth_bounds_test) */ - -#if GEN_GEN <= 7 - struct GENX(DEPTH_STENCIL_STATE) depth_stencil = { -#else - struct GENX(3DSTATE_WM_DEPTH_STENCIL) depth_stencil = { -#endif - .DepthTestEnable = info->depthTestEnable, - .DepthBufferWriteEnable = info->depthWriteEnable, - .DepthTestFunction = vk_to_gen_compare_op[info->depthCompareOp], - .DoubleSidedStencilEnable = true, - - .StencilTestEnable = info->stencilTestEnable, - .StencilBufferWriteEnable = info->stencilTestEnable, - .StencilFailOp = vk_to_gen_stencil_op[info->front.failOp], - .StencilPassDepthPassOp = vk_to_gen_stencil_op[info->front.passOp], - .StencilPassDepthFailOp = vk_to_gen_stencil_op[info->front.depthFailOp], - .StencilTestFunction = vk_to_gen_compare_op[info->front.compareOp], - .BackfaceStencilFailOp = vk_to_gen_stencil_op[info->back.failOp], - .BackfaceStencilPassDepthPassOp = vk_to_gen_stencil_op[info->back.passOp], - .BackfaceStencilPassDepthFailOp =vk_to_gen_stencil_op[info->back.depthFailOp], - .BackfaceStencilTestFunction = vk_to_gen_compare_op[info->back.compareOp], - }; - - VkImageAspectFlags aspects = 0; - if (pass->attachments == NULL) { - /* This comes from meta. Assume we have verything. */ - aspects = VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT; - } else if (subpass->depth_stencil_attachment != VK_ATTACHMENT_UNUSED) { - VkFormat depth_stencil_format = - pass->attachments[subpass->depth_stencil_attachment].format; - aspects = vk_format_aspects(depth_stencil_format); - } - - /* The Vulkan spec requires that if either depth or stencil is not present, - * the pipeline is to act as if the test silently passes. - */ - if (!(aspects & VK_IMAGE_ASPECT_DEPTH_BIT)) { - depth_stencil.DepthBufferWriteEnable = false; - depth_stencil.DepthTestFunction = PREFILTEROPALWAYS; - } - - if (!(aspects & VK_IMAGE_ASPECT_STENCIL_BIT)) { - depth_stencil.StencilBufferWriteEnable = false; - depth_stencil.StencilTestFunction = PREFILTEROPALWAYS; - depth_stencil.BackfaceStencilTestFunction = PREFILTEROPALWAYS; - } - - /* From the Broadwell PRM: - * - * "If Depth_Test_Enable = 1 AND Depth_Test_func = EQUAL, the - * Depth_Write_Enable must be set to 0." - */ - if (info->depthTestEnable && info->depthCompareOp == VK_COMPARE_OP_EQUAL) - depth_stencil.DepthBufferWriteEnable = false; - -#if GEN_GEN <= 7 - GENX(DEPTH_STENCIL_STATE_pack)(NULL, depth_stencil_dw, &depth_stencil); -#else - GENX(3DSTATE_WM_DEPTH_STENCIL_pack)(NULL, depth_stencil_dw, &depth_stencil); -#endif -} - -static void -emit_cb_state(struct anv_pipeline *pipeline, - const VkPipelineColorBlendStateCreateInfo *info, - const VkPipelineMultisampleStateCreateInfo *ms_info) -{ - struct anv_device *device = pipeline->device; - - const uint32_t num_dwords = GENX(BLEND_STATE_length); - pipeline->blend_state = - anv_state_pool_alloc(&device->dynamic_state_pool, num_dwords * 4, 64); - - struct GENX(BLEND_STATE) blend_state = { -#if GEN_GEN >= 8 - .AlphaToCoverageEnable = ms_info && ms_info->alphaToCoverageEnable, - .AlphaToOneEnable = ms_info && ms_info->alphaToOneEnable, -#else - /* Make sure it gets zeroed */ - .Entry = { { 0, }, }, -#endif - }; - - /* Default everything to disabled */ - for (uint32_t i = 0; i < 8; i++) { - blend_state.Entry[i].WriteDisableAlpha = true; - blend_state.Entry[i].WriteDisableRed = true; - blend_state.Entry[i].WriteDisableGreen = true; - blend_state.Entry[i].WriteDisableBlue = true; - } - - uint32_t surface_count = 0; - struct anv_pipeline_bind_map *map; - if (anv_pipeline_has_stage(pipeline, MESA_SHADER_FRAGMENT)) { - map = &pipeline->shaders[MESA_SHADER_FRAGMENT]->bind_map; - surface_count = map->surface_count; - } - - bool has_writeable_rt = false; - for (unsigned i = 0; i < surface_count; i++) { - struct anv_pipeline_binding *binding = &map->surface_to_descriptor[i]; - - /* All color attachments are at the beginning of the binding table */ - if (binding->set != ANV_DESCRIPTOR_SET_COLOR_ATTACHMENTS) - break; - - /* We can have at most 8 attachments */ - assert(i < 8); - - if (binding->index >= info->attachmentCount) - continue; - - assert(binding->binding == 0); - const VkPipelineColorBlendAttachmentState *a = - &info->pAttachments[binding->index]; - - blend_state.Entry[i] = (struct GENX(BLEND_STATE_ENTRY)) { -#if GEN_GEN < 8 - .AlphaToCoverageEnable = ms_info && ms_info->alphaToCoverageEnable, - .AlphaToOneEnable = ms_info && ms_info->alphaToOneEnable, -#endif - .LogicOpEnable = info->logicOpEnable, - .LogicOpFunction = vk_to_gen_logic_op[info->logicOp], - .ColorBufferBlendEnable = a->blendEnable, - .ColorClampRange = COLORCLAMP_RTFORMAT, - .PreBlendColorClampEnable = true, - .PostBlendColorClampEnable = true, - .SourceBlendFactor = vk_to_gen_blend[a->srcColorBlendFactor], - .DestinationBlendFactor = vk_to_gen_blend[a->dstColorBlendFactor], - .ColorBlendFunction = vk_to_gen_blend_op[a->colorBlendOp], - .SourceAlphaBlendFactor = vk_to_gen_blend[a->srcAlphaBlendFactor], - .DestinationAlphaBlendFactor = vk_to_gen_blend[a->dstAlphaBlendFactor], - .AlphaBlendFunction = vk_to_gen_blend_op[a->alphaBlendOp], - .WriteDisableAlpha = !(a->colorWriteMask & VK_COLOR_COMPONENT_A_BIT), - .WriteDisableRed = !(a->colorWriteMask & VK_COLOR_COMPONENT_R_BIT), - .WriteDisableGreen = !(a->colorWriteMask & VK_COLOR_COMPONENT_G_BIT), - .WriteDisableBlue = !(a->colorWriteMask & VK_COLOR_COMPONENT_B_BIT), - }; - - if (a->srcColorBlendFactor != a->srcAlphaBlendFactor || - a->dstColorBlendFactor != a->dstAlphaBlendFactor || - a->colorBlendOp != a->alphaBlendOp) { -#if GEN_GEN >= 8 - blend_state.IndependentAlphaBlendEnable = true; -#else - blend_state.Entry[i].IndependentAlphaBlendEnable = true; -#endif - } - - if (a->colorWriteMask != 0) - has_writeable_rt = true; - - /* Our hardware applies the blend factor prior to the blend function - * regardless of what function is used. Technically, this means the - * hardware can do MORE than GL or Vulkan specify. However, it also - * means that, for MIN and MAX, we have to stomp the blend factor to - * ONE to make it a no-op. - */ - if (a->colorBlendOp == VK_BLEND_OP_MIN || - a->colorBlendOp == VK_BLEND_OP_MAX) { - blend_state.Entry[i].SourceBlendFactor = BLENDFACTOR_ONE; - blend_state.Entry[i].DestinationBlendFactor = BLENDFACTOR_ONE; - } - if (a->alphaBlendOp == VK_BLEND_OP_MIN || - a->alphaBlendOp == VK_BLEND_OP_MAX) { - blend_state.Entry[i].SourceAlphaBlendFactor = BLENDFACTOR_ONE; - blend_state.Entry[i].DestinationAlphaBlendFactor = BLENDFACTOR_ONE; - } - } - -#if GEN_GEN >= 8 - struct GENX(BLEND_STATE_ENTRY) *bs0 = &blend_state.Entry[0]; - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_PS_BLEND), blend) { - blend.AlphaToCoverageEnable = blend_state.AlphaToCoverageEnable; - blend.HasWriteableRT = has_writeable_rt; - blend.ColorBufferBlendEnable = bs0->ColorBufferBlendEnable; - blend.SourceAlphaBlendFactor = bs0->SourceAlphaBlendFactor; - blend.DestinationAlphaBlendFactor = bs0->DestinationAlphaBlendFactor; - blend.SourceBlendFactor = bs0->SourceBlendFactor; - blend.DestinationBlendFactor = bs0->DestinationBlendFactor; - blend.AlphaTestEnable = false; - blend.IndependentAlphaBlendEnable = - blend_state.IndependentAlphaBlendEnable; - } -#else - (void)has_writeable_rt; -#endif - - GENX(BLEND_STATE_pack)(NULL, pipeline->blend_state.map, &blend_state); - if (!device->info.has_llc) - anv_state_clflush(pipeline->blend_state); - - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_BLEND_STATE_POINTERS), bsp) { - bsp.BlendStatePointer = pipeline->blend_state.offset; -#if GEN_GEN >= 8 - bsp.BlendStatePointerValid = true; -#endif - } -} - -static void -emit_3dstate_clip(struct anv_pipeline *pipeline, - const VkPipelineViewportStateCreateInfo *vp_info, - const VkPipelineRasterizationStateCreateInfo *rs_info, - const struct anv_graphics_pipeline_create_info *extra) -{ - const struct brw_wm_prog_data *wm_prog_data = get_wm_prog_data(pipeline); - (void) wm_prog_data; - anv_batch_emit(&pipeline->batch, GENX(3DSTATE_CLIP), clip) { - clip.ClipEnable = !(extra && extra->use_rectlist); - clip.EarlyCullEnable = true; - clip.APIMode = APIMODE_D3D, - clip.ViewportXYClipTestEnable = true; - - clip.ClipMode = rs_info->rasterizerDiscardEnable ? - CLIPMODE_REJECT_ALL : CLIPMODE_NORMAL; - - clip.TriangleStripListProvokingVertexSelect = 0; - clip.LineStripListProvokingVertexSelect = 0; - clip.TriangleFanProvokingVertexSelect = 1; - - clip.MinimumPointWidth = 0.125; - clip.MaximumPointWidth = 255.875; - clip.MaximumVPIndex = vp_info->viewportCount - 1; - -#if GEN_GEN == 7 - clip.FrontWinding = vk_to_gen_front_face[rs_info->frontFace]; - clip.CullMode = vk_to_gen_cullmode[rs_info->cullMode]; - clip.ViewportZClipTestEnable = !pipeline->depth_clamp_enable; -#else - clip.NonPerspectiveBarycentricEnable = wm_prog_data ? - (wm_prog_data->barycentric_interp_modes & 0x38) != 0 : 0; -#endif - } -} diff -Nru mesa-12.0.6/src/intel/vulkan/genX_state.c mesa-17.0.7/src/intel/vulkan/genX_state.c --- mesa-12.0.6/src/intel/vulkan/genX_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/genX_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -29,6 +29,7 @@ #include "anv_private.h" +#include "common/gen_sample_positions.h" #include "genxml/gen_macros.h" #include "genxml/genX_pack.h" @@ -54,11 +55,6 @@ anv_batch_emit(&batch, GENX(3DSTATE_VF_STATISTICS), vfs) vfs.StatisticsEnable = true; - anv_batch_emit(&batch, GENX(3DSTATE_HS), hs); - anv_batch_emit(&batch, GENX(3DSTATE_TE), ts); - anv_batch_emit(&batch, GENX(3DSTATE_DS), ds); - - anv_batch_emit(&batch, GENX(3DSTATE_STREAMOUT), so); anv_batch_emit(&batch, GENX(3DSTATE_AA_LINE_PARAMETERS), aa); anv_batch_emit(&batch, GENX(3DSTATE_DRAWING_RECTANGLE), rect) { @@ -77,69 +73,12 @@ * VkPhysicalDeviceFeatures::standardSampleLocations. */ anv_batch_emit(&batch, GENX(3DSTATE_SAMPLE_PATTERN), sp) { - sp._1xSample0XOffset = 0.5; - sp._1xSample0YOffset = 0.5; - sp._2xSample0XOffset = 0.25; - sp._2xSample0YOffset = 0.25; - sp._2xSample1XOffset = 0.75; - sp._2xSample1YOffset = 0.75; - sp._4xSample0XOffset = 0.375; - sp._4xSample0YOffset = 0.125; - sp._4xSample1XOffset = 0.875; - sp._4xSample1YOffset = 0.375; - sp._4xSample2XOffset = 0.125; - sp._4xSample2YOffset = 0.625; - sp._4xSample3XOffset = 0.625; - sp._4xSample3YOffset = 0.875; - sp._8xSample0XOffset = 0.5625; - sp._8xSample0YOffset = 0.3125; - sp._8xSample1XOffset = 0.4375; - sp._8xSample1YOffset = 0.6875; - sp._8xSample2XOffset = 0.8125; - sp._8xSample2YOffset = 0.5625; - sp._8xSample3XOffset = 0.3125; - sp._8xSample3YOffset = 0.1875; - sp._8xSample4XOffset = 0.1875; - sp._8xSample4YOffset = 0.8125; - sp._8xSample5XOffset = 0.0625; - sp._8xSample5YOffset = 0.4375; - sp._8xSample6XOffset = 0.6875; - sp._8xSample6YOffset = 0.9375; - sp._8xSample7XOffset = 0.9375; - sp._8xSample7YOffset = 0.0625; + GEN_SAMPLE_POS_1X(sp._1xSample); + GEN_SAMPLE_POS_2X(sp._2xSample); + GEN_SAMPLE_POS_4X(sp._4xSample); + GEN_SAMPLE_POS_8X(sp._8xSample); #if GEN_GEN >= 9 - sp._16xSample0XOffset = 0.5625; - sp._16xSample0YOffset = 0.5625; - sp._16xSample1XOffset = 0.4375; - sp._16xSample1YOffset = 0.3125; - sp._16xSample2XOffset = 0.3125; - sp._16xSample2YOffset = 0.6250; - sp._16xSample3XOffset = 0.7500; - sp._16xSample3YOffset = 0.4375; - sp._16xSample4XOffset = 0.1875; - sp._16xSample4YOffset = 0.3750; - sp._16xSample5XOffset = 0.6250; - sp._16xSample5YOffset = 0.8125; - sp._16xSample6XOffset = 0.8125; - sp._16xSample6YOffset = 0.6875; - sp._16xSample7XOffset = 0.6875; - sp._16xSample7YOffset = 0.1875; - sp._16xSample8XOffset = 0.3750; - sp._16xSample8YOffset = 0.8750; - sp._16xSample9XOffset = 0.5000; - sp._16xSample9YOffset = 0.0625; - sp._16xSample10XOffset = 0.2500; - sp._16xSample10YOffset = 0.1250; - sp._16xSample11XOffset = 0.1250; - sp._16xSample11YOffset = 0.7500; - sp._16xSample12XOffset = 0.0000; - sp._16xSample12YOffset = 0.5000; - sp._16xSample13XOffset = 0.9375; - sp._16xSample13YOffset = 0.2500; - sp._16xSample14XOffset = 0.8750; - sp._16xSample14YOffset = 0.9375; - sp._16xSample15XOffset = 0.0625; - sp._16xSample15YOffset = 0.0000; + GEN_SAMPLE_POS_16X(sp._16xSample); #endif } #endif @@ -158,7 +97,7 @@ default: assert(!"Invalid filter"); case VK_FILTER_NEAREST: - return MAPFILTER_NEAREST; + return anisotropyEnable ? MAPFILTER_ANISOTROPIC : MAPFILTER_NEAREST; case VK_FILTER_LINEAR: return anisotropyEnable ? MAPFILTER_ANISOTROPIC : MAPFILTER_LINEAR; } @@ -216,7 +155,7 @@ assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO); - sampler = anv_alloc2(&device->alloc, pAllocator, sizeof(*sampler), 8, + sampler = vk_alloc2(&device->alloc, pAllocator, sizeof(*sampler), 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (!sampler) return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); @@ -224,6 +163,11 @@ uint32_t border_color_offset = device->border_colors.offset + pCreateInfo->borderColor * 64; + bool enable_min_filter_addr_rounding = + pCreateInfo->minFilter != VK_FILTER_NEAREST; + bool enable_mag_filter_addr_rounding = + pCreateInfo->magFilter != VK_FILTER_NEAREST; + struct GENX(SAMPLER_STATE) sampler_state = { .SamplerDisable = false, .TextureBorderColorMode = DX10OGL, @@ -259,12 +203,12 @@ #endif .MaximumAnisotropy = vk_to_gen_max_anisotropy(pCreateInfo->maxAnisotropy), - .RAddressMinFilterRoundingEnable = 0, - .RAddressMagFilterRoundingEnable = 0, - .VAddressMinFilterRoundingEnable = 0, - .VAddressMagFilterRoundingEnable = 0, - .UAddressMinFilterRoundingEnable = 0, - .UAddressMagFilterRoundingEnable = 0, + .RAddressMinFilterRoundingEnable = enable_min_filter_addr_rounding, + .RAddressMagFilterRoundingEnable = enable_mag_filter_addr_rounding, + .VAddressMinFilterRoundingEnable = enable_min_filter_addr_rounding, + .VAddressMagFilterRoundingEnable = enable_mag_filter_addr_rounding, + .UAddressMinFilterRoundingEnable = enable_min_filter_addr_rounding, + .UAddressMagFilterRoundingEnable = enable_mag_filter_addr_rounding, .TrilinearFilterQuality = 0, .NonnormalizedCoordinateEnable = pCreateInfo->unnormalizedCoordinates, .TCXAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressModeU], diff -Nru mesa-12.0.6/src/intel/vulkan/intel_icd.json mesa-17.0.7/src/intel/vulkan/intel_icd.json --- mesa-12.0.6/src/intel/vulkan/intel_icd.json 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/intel_icd.json 1970-01-01 00:00:00.000000000 +0000 @@ -1,7 +0,0 @@ -{ - "file_format_version": "1.0.0", - "ICD": { - "library_path": "libvulkan_intel.so", - "api_version": "1.0.3" - } -} diff -Nru mesa-12.0.6/src/intel/vulkan/intel_icd.json.in mesa-17.0.7/src/intel/vulkan/intel_icd.json.in --- mesa-12.0.6/src/intel/vulkan/intel_icd.json.in 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/intel_icd.json.in 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,7 @@ +{ + "file_format_version": "1.0.0", + "ICD": { + "library_path": "@install_libdir@/libvulkan_intel.so", + "api_version": "1.0.3" + } +} diff -Nru mesa-12.0.6/src/intel/vulkan/Makefile.am mesa-17.0.7/src/intel/vulkan/Makefile.am --- mesa-12.0.6/src/intel/vulkan/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -23,9 +23,11 @@ vulkan_includedir = $(includedir)/vulkan -vulkan_include_HEADERS = \ +noinst_HEADERS = \ $(top_srcdir)/include/vulkan/vk_platform.h \ - $(top_srcdir)/include/vulkan/vulkan.h \ + $(top_srcdir)/include/vulkan/vulkan.h + +vulkan_include_HEADERS = \ $(top_srcdir)/include/vulkan/vulkan_intel.h lib_LTLIBRARIES = libvulkan_intel.la @@ -33,22 +35,20 @@ check_LTLIBRARIES = libvulkan-test.la PER_GEN_LIBS = \ - libanv-gen7.la \ - libanv-gen75.la \ - libanv-gen8.la \ - libanv-gen9.la + libanv-gen7.la \ + libanv-gen75.la \ + libanv-gen8.la \ + libanv-gen9.la noinst_LTLIBRARIES = $(PER_GEN_LIBS) # The gallium includes are for the util/u_math.h include from main/macros.h AM_CPPFLAGS = \ - $(INTEL_CFLAGS) \ - $(VALGRIND_CFLAGS) \ - $(DEFINES) \ -I$(top_srcdir)/include \ -I$(top_builddir)/src \ -I$(top_srcdir)/src \ + -I$(top_srcdir)/src/vulkan/wsi \ -I$(top_builddir)/src/compiler \ -I$(top_srcdir)/src/compiler \ -I$(top_builddir)/src/compiler/nir \ @@ -61,6 +61,17 @@ -I$(top_builddir)/src/intel \ -I$(top_srcdir)/src/intel +if HAVE_PLATFORM_WAYLAND +AM_CPPFLAGS += \ + -I$(top_builddir)/src/egl/wayland/wayland-drm \ + -I$(top_srcdir)/src/egl/wayland/wayland-drm +endif + +AM_CPPFLAGS += \ + $(INTEL_CFLAGS) \ + $(VALGRIND_CFLAGS) \ + $(DEFINES) + AM_CFLAGS = \ $(VISIBILITY_CFLAGS) \ -Wno-override-init -msse2 @@ -82,23 +93,36 @@ $(VULKAN_GENERATED_FILES) \ $(VULKAN_FILES) -VULKAN_LIB_DEPS = +VULKAN_LIB_DEPS = \ + libvulkan_common.la \ + $(top_builddir)/src/vulkan/wsi/libvulkan_wsi.la \ + $(top_builddir)/src/mesa/drivers/dri/i965/libi965_compiler.la \ + $(top_builddir)/src/compiler/nir/libnir.la \ + $(top_builddir)/src/util/libmesautil.la \ + $(top_builddir)/src/intel/common/libintel_common.la \ + $(top_builddir)/src/intel/isl/libisl.la \ + $(top_builddir)/src/intel/blorp/libblorp.la \ + $(PER_GEN_LIBS) \ + $(PTHREAD_LIBS) \ + $(DLOPEN_LIBS) \ + -lm if HAVE_PLATFORM_X11 AM_CPPFLAGS += \ $(XCB_DRI3_CFLAGS) \ - -DVK_USE_PLATFORM_XCB_KHR + -DVK_USE_PLATFORM_XCB_KHR \ + -DVK_USE_PLATFORM_XLIB_KHR VULKAN_SOURCES += $(VULKAN_WSI_X11_FILES) -VULKAN_LIB_DEPS += $(XCB_DRI3_LIBS) + +# FIXME: Use pkg-config for X11-xcb ldflags. +VULKAN_LIB_DEPS += $(XCB_DRI3_LIBS) -lX11-xcb endif if HAVE_PLATFORM_WAYLAND AM_CPPFLAGS += \ - -I$(top_builddir)/src/egl/wayland/wayland-drm \ - -I$(top_srcdir)/src/egl/wayland/wayland-drm \ $(WAYLAND_CFLAGS) \ -DVK_USE_PLATFORM_WAYLAND_KHR @@ -112,47 +136,26 @@ noinst_LTLIBRARIES += libvulkan_common.la libvulkan_common_la_SOURCES = $(VULKAN_SOURCES) -VULKAN_LIB_DEPS += \ - libvulkan_common.la \ - $(top_builddir)/src/mesa/drivers/dri/i965/libi965_compiler.la \ - $(top_builddir)/src/compiler/nir/libnir.la \ - $(top_builddir)/src/util/libmesautil.la \ - $(top_builddir)/src/intel/isl/libisl.la \ - $(PER_GEN_LIBS) \ - $(PTHREAD_LIBS) \ - $(DLOPEN_LIBS) \ - -lm - nodist_EXTRA_libvulkan_intel_la_SOURCES = dummy.cpp libvulkan_intel_la_SOURCES = $(VULKAN_GEM_FILES) -VULKAN_ENTRYPOINT_CPPFLAGS = \ - $(XCB_DRI3_CFLAGS) \ - $(WAYLAND_CFLAGS) \ - -DVK_USE_PLATFORM_XCB_KHR \ - -DVK_USE_PLATFORM_WAYLAND_KHR +vulkan_api_xml = $(top_srcdir)/src/vulkan/registry/vk.xml -anv_entrypoints.h : anv_entrypoints_gen.py $(vulkan_include_HEADERS) - $(AM_V_GEN)$(CPP) $(VULKAN_ENTRYPOINT_CPPFLAGS) $(top_srcdir)/include/vulkan/vulkan_intel.h |\ +anv_entrypoints.h : anv_entrypoints_gen.py $(vulkan_api_xml) + $(AM_V_GEN) cat $(vulkan_api_xml) |\ $(PYTHON2) $(srcdir)/anv_entrypoints_gen.py header > $@ -anv_entrypoints.c : anv_entrypoints_gen.py $(vulkan_include_HEADERS) - $(AM_V_GEN)$(CPP) $(VULKAN_ENTRYPOINT_CPPFLAGS) $(top_srcdir)/include/vulkan/vulkan_intel.h |\ +anv_entrypoints.c : anv_entrypoints_gen.py $(vulkan_api_xml) + $(AM_V_GEN) cat $(vulkan_api_xml) |\ $(PYTHON2) $(srcdir)/anv_entrypoints_gen.py code > $@ -.PHONY: anv_timestamp.h - -anv_timestamp.h: - @echo "Updating anv_timestamp.h" - $(AM_V_GEN) echo "#define ANV_TIMESTAMP \"$(TIMESTAMP_CMD)\"" > $@ - BUILT_SOURCES = $(VULKAN_GENERATED_FILES) -CLEANFILES = $(BUILT_SOURCES) dev_icd.json +CLEANFILES = $(BUILT_SOURCES) dev_icd.json intel_icd.@host_cpu@.json EXTRA_DIST = \ $(top_srcdir)/include/vulkan/vk_icd.h \ anv_entrypoints_gen.py \ dev_icd.json.in \ - intel_icd.json + intel_icd.json.in libvulkan_intel_la_LIBADD = $(VULKAN_LIB_DEPS) @@ -167,7 +170,7 @@ icdconfdir = @VULKAN_ICD_INSTALL_DIR@ -icdconf_DATA = intel_icd.json +icdconf_DATA = intel_icd.@host_cpu@.json # The following is used for development purposes, by setting VK_ICD_FILENAMES. noinst_DATA = dev_icd.json @@ -176,13 +179,18 @@ -e "s#@build_libdir@#${abs_top_builddir}/${LIB_DIR}#" \ < $(srcdir)/dev_icd.json.in > $@ +intel_icd.@host_cpu@.json : intel_icd.json.in + $(AM_V_GEN) $(SED) \ + -e "s#@install_libdir@#${libdir}#" \ + < $(srcdir)/intel_icd.json.in > $@ + # Libvulkan with dummy gem. Used for unit tests. libvulkan_test_la_SOURCES = $(VULKAN_GEM_STUB_FILES) libvulkan_test_la_LIBADD = $(VULKAN_LIB_DEPS) include $(top_srcdir)/install-lib-links.mk -noinst_HEADERS = \ +noinst_HEADERS += \ tests/state_pool_test_helper.h LDADD = \ diff -Nru mesa-12.0.6/src/intel/vulkan/Makefile.in mesa-17.0.7/src/intel/vulkan/Makefile.in --- mesa-12.0.6/src/intel/vulkan/Makefile.in 2017-01-24 01:41:54.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/Makefile.in 2017-06-01 10:37:23.000000000 +0000 @@ -136,20 +136,25 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_PLATFORM_X11_TRUE@am__append_1 = \ +@HAVE_PLATFORM_WAYLAND_TRUE@am__append_1 = \ +@HAVE_PLATFORM_WAYLAND_TRUE@ -I$(top_builddir)/src/egl/wayland/wayland-drm \ +@HAVE_PLATFORM_WAYLAND_TRUE@ -I$(top_srcdir)/src/egl/wayland/wayland-drm + +@HAVE_PLATFORM_X11_TRUE@am__append_2 = \ @HAVE_PLATFORM_X11_TRUE@ $(XCB_DRI3_CFLAGS) \ -@HAVE_PLATFORM_X11_TRUE@ -DVK_USE_PLATFORM_XCB_KHR +@HAVE_PLATFORM_X11_TRUE@ -DVK_USE_PLATFORM_XCB_KHR \ +@HAVE_PLATFORM_X11_TRUE@ -DVK_USE_PLATFORM_XLIB_KHR -@HAVE_PLATFORM_X11_TRUE@am__append_2 = $(VULKAN_WSI_X11_FILES) -@HAVE_PLATFORM_X11_TRUE@am__append_3 = $(XCB_DRI3_LIBS) -@HAVE_PLATFORM_WAYLAND_TRUE@am__append_4 = \ -@HAVE_PLATFORM_WAYLAND_TRUE@ -I$(top_builddir)/src/egl/wayland/wayland-drm \ -@HAVE_PLATFORM_WAYLAND_TRUE@ -I$(top_srcdir)/src/egl/wayland/wayland-drm \ +@HAVE_PLATFORM_X11_TRUE@am__append_3 = $(VULKAN_WSI_X11_FILES) + +# FIXME: Use pkg-config for X11-xcb ldflags. +@HAVE_PLATFORM_X11_TRUE@am__append_4 = $(XCB_DRI3_LIBS) -lX11-xcb +@HAVE_PLATFORM_WAYLAND_TRUE@am__append_5 = \ @HAVE_PLATFORM_WAYLAND_TRUE@ $(WAYLAND_CFLAGS) \ @HAVE_PLATFORM_WAYLAND_TRUE@ -DVK_USE_PLATFORM_WAYLAND_KHR -@HAVE_PLATFORM_WAYLAND_TRUE@am__append_5 = $(VULKAN_WSI_WAYLAND_FILES) -@HAVE_PLATFORM_WAYLAND_TRUE@am__append_6 = \ +@HAVE_PLATFORM_WAYLAND_TRUE@am__append_6 = $(VULKAN_WSI_WAYLAND_FILES) +@HAVE_PLATFORM_WAYLAND_TRUE@am__append_7 = \ @HAVE_PLATFORM_WAYLAND_TRUE@ $(top_builddir)/src/egl/wayland/wayland-drm/libwayland-drm.la \ @HAVE_PLATFORM_WAYLAND_TRUE@ $(WAYLAND_LIBS) @@ -208,9 +213,10 @@ LTLIBRARIES = $(lib_LTLIBRARIES) $(noinst_LTLIBRARIES) libanv_gen7_la_LIBADD = am__objects_1 = libanv_gen7_la-genX_cmd_buffer.lo \ - libanv_gen7_la-genX_l3.lo libanv_gen7_la-genX_pipeline.lo \ - libanv_gen7_la-gen7_cmd_buffer.lo \ - libanv_gen7_la-gen7_pipeline.lo libanv_gen7_la-genX_state.lo + libanv_gen7_la-genX_blorp_exec.lo \ + libanv_gen7_la-genX_gpu_memcpy.lo \ + libanv_gen7_la-genX_pipeline.lo \ + libanv_gen7_la-gen7_cmd_buffer.lo libanv_gen7_la-genX_state.lo am_libanv_gen7_la_OBJECTS = $(am__objects_1) libanv_gen7_la_OBJECTS = $(am_libanv_gen7_la_OBJECTS) AM_V_lt = $(am__v_lt_@AM_V@) @@ -223,9 +229,11 @@ $@ libanv_gen75_la_LIBADD = am__objects_2 = libanv_gen75_la-genX_cmd_buffer.lo \ - libanv_gen75_la-genX_l3.lo libanv_gen75_la-genX_pipeline.lo \ + libanv_gen75_la-genX_blorp_exec.lo \ + libanv_gen75_la-genX_gpu_memcpy.lo \ + libanv_gen75_la-genX_pipeline.lo \ libanv_gen75_la-gen7_cmd_buffer.lo \ - libanv_gen75_la-gen7_pipeline.lo libanv_gen75_la-genX_state.lo + libanv_gen75_la-genX_state.lo am_libanv_gen75_la_OBJECTS = $(am__objects_2) libanv_gen75_la_OBJECTS = $(am_libanv_gen75_la_OBJECTS) libanv_gen75_la_LINK = $(LIBTOOL) $(AM_V_lt) --tag=CC \ @@ -234,9 +242,10 @@ -o $@ libanv_gen8_la_LIBADD = am__objects_3 = libanv_gen8_la-genX_cmd_buffer.lo \ - libanv_gen8_la-genX_l3.lo libanv_gen8_la-genX_pipeline.lo \ - libanv_gen8_la-gen8_cmd_buffer.lo \ - libanv_gen8_la-gen8_pipeline.lo libanv_gen8_la-genX_state.lo + libanv_gen8_la-genX_blorp_exec.lo \ + libanv_gen8_la-genX_gpu_memcpy.lo \ + libanv_gen8_la-genX_pipeline.lo \ + libanv_gen8_la-gen8_cmd_buffer.lo libanv_gen8_la-genX_state.lo am_libanv_gen8_la_OBJECTS = $(am__objects_3) libanv_gen8_la_OBJECTS = $(am_libanv_gen8_la_OBJECTS) libanv_gen8_la_LINK = $(LIBTOOL) $(AM_V_lt) --tag=CC \ @@ -245,9 +254,10 @@ $@ libanv_gen9_la_LIBADD = am__objects_4 = libanv_gen9_la-genX_cmd_buffer.lo \ - libanv_gen9_la-genX_l3.lo libanv_gen9_la-genX_pipeline.lo \ - libanv_gen9_la-gen8_cmd_buffer.lo \ - libanv_gen9_la-gen8_pipeline.lo libanv_gen9_la-genX_state.lo + libanv_gen9_la-genX_blorp_exec.lo \ + libanv_gen9_la-genX_gpu_memcpy.lo \ + libanv_gen9_la-genX_pipeline.lo \ + libanv_gen9_la-gen8_cmd_buffer.lo libanv_gen9_la-genX_state.lo am_libanv_gen9_la_OBJECTS = $(am__objects_4) libanv_gen9_la_OBJECTS = $(am_libanv_gen9_la_OBJECTS) libanv_gen9_la_LINK = $(LIBTOOL) $(AM_V_lt) --tag=CC \ @@ -258,37 +268,38 @@ @HAVE_PLATFORM_X11_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) @HAVE_PLATFORM_WAYLAND_TRUE@am__DEPENDENCIES_3 = $(top_builddir)/src/egl/wayland/wayland-drm/libwayland-drm.la \ @HAVE_PLATFORM_WAYLAND_TRUE@ $(am__DEPENDENCIES_1) -am__DEPENDENCIES_4 = $(am__DEPENDENCIES_2) $(am__DEPENDENCIES_3) \ - libvulkan_common.la \ +am__DEPENDENCIES_4 = libvulkan_common.la \ + $(top_builddir)/src/vulkan/wsi/libvulkan_wsi.la \ $(top_builddir)/src/mesa/drivers/dri/i965/libi965_compiler.la \ $(top_builddir)/src/compiler/nir/libnir.la \ $(top_builddir)/src/util/libmesautil.la \ - $(top_builddir)/src/intel/isl/libisl.la $(PER_GEN_LIBS) \ - $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) + $(top_builddir)/src/intel/common/libintel_common.la \ + $(top_builddir)/src/intel/isl/libisl.la \ + $(top_builddir)/src/intel/blorp/libblorp.la $(PER_GEN_LIBS) \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_2) $(am__DEPENDENCIES_3) libvulkan_test_la_DEPENDENCIES = $(am__DEPENDENCIES_4) am__objects_5 = anv_gem_stubs.lo am_libvulkan_test_la_OBJECTS = $(am__objects_5) libvulkan_test_la_OBJECTS = $(am_libvulkan_test_la_OBJECTS) libvulkan_common_la_LIBADD = am__libvulkan_common_la_SOURCES_DIST = anv_entrypoints.c \ - anv_entrypoints.h anv_timestamp.h anv_allocator.c \ - anv_batch_chain.c anv_cmd_buffer.c anv_descriptor_set.c \ - anv_device.c anv_dump.c anv_formats.c anv_genX.h anv_image.c \ - anv_intel.c anv_meta.c anv_meta.h anv_meta_blit.c \ - anv_meta_blit2d.c anv_meta_clear.c anv_meta_copy.c \ - anv_meta_resolve.c anv_nir.h anv_nir_apply_dynamic_offsets.c \ - anv_nir_apply_pipeline_layout.c anv_nir_lower_push_constants.c \ - anv_pass.c anv_pipeline.c anv_pipeline_cache.c anv_private.h \ - anv_query.c anv_util.c anv_wsi.c anv_wsi.h \ - genX_pipeline_util.h vk_format_info.h anv_wsi_x11.c \ - anv_wsi_wayland.c + anv_entrypoints.h anv_allocator.c anv_batch_chain.c \ + anv_blorp.c anv_cmd_buffer.c anv_descriptor_set.c anv_device.c \ + anv_dump.c anv_formats.c anv_genX.h anv_image.c anv_intel.c \ + anv_nir.h anv_nir_apply_dynamic_offsets.c \ + anv_nir_apply_pipeline_layout.c \ + anv_nir_lower_input_attachments.c \ + anv_nir_lower_push_constants.c anv_pass.c anv_pipeline.c \ + anv_pipeline_cache.c anv_private.h anv_query.c anv_util.c \ + anv_wsi.c vk_format_info.h anv_wsi_x11.c anv_wsi_wayland.c am__objects_6 = anv_entrypoints.lo -am__objects_7 = anv_allocator.lo anv_batch_chain.lo anv_cmd_buffer.lo \ - anv_descriptor_set.lo anv_device.lo anv_dump.lo anv_formats.lo \ - anv_image.lo anv_intel.lo anv_meta.lo anv_meta_blit.lo \ - anv_meta_blit2d.lo anv_meta_clear.lo anv_meta_copy.lo \ - anv_meta_resolve.lo anv_nir_apply_dynamic_offsets.lo \ +am__objects_7 = anv_allocator.lo anv_batch_chain.lo anv_blorp.lo \ + anv_cmd_buffer.lo anv_descriptor_set.lo anv_device.lo \ + anv_dump.lo anv_formats.lo anv_image.lo anv_intel.lo \ + anv_nir_apply_dynamic_offsets.lo \ anv_nir_apply_pipeline_layout.lo \ + anv_nir_lower_input_attachments.lo \ anv_nir_lower_push_constants.lo anv_pass.lo anv_pipeline.lo \ anv_pipeline_cache.lo anv_query.lo anv_util.lo anv_wsi.lo am__objects_8 = anv_wsi_x11.lo @@ -608,6 +619,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -622,6 +635,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -651,10 +665,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -704,11 +719,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -748,8 +760,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -786,8 +796,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -796,7 +804,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -804,13 +811,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -839,6 +847,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -904,6 +913,7 @@ VULKAN_FILES := \ anv_allocator.c \ anv_batch_chain.c \ + anv_blorp.c \ anv_cmd_buffer.c \ anv_descriptor_set.c \ anv_device.c \ @@ -912,16 +922,10 @@ anv_genX.h \ anv_image.c \ anv_intel.c \ - anv_meta.c \ - anv_meta.h \ - anv_meta_blit.c \ - anv_meta_blit2d.c \ - anv_meta_clear.c \ - anv_meta_copy.c \ - anv_meta_resolve.c \ anv_nir.h \ anv_nir_apply_dynamic_offsets.c \ anv_nir_apply_pipeline_layout.c \ + anv_nir_lower_input_attachments.c \ anv_nir_lower_push_constants.c \ anv_pass.c \ anv_pipeline.c \ @@ -930,8 +934,6 @@ anv_query.c \ anv_util.c \ anv_wsi.c \ - anv_wsi.h \ - genX_pipeline_util.h \ vk_format_info.h VULKAN_WSI_WAYLAND_FILES := \ @@ -948,62 +950,61 @@ VULKAN_GENERATED_FILES := \ anv_entrypoints.c \ - anv_entrypoints.h \ - anv_timestamp.h + anv_entrypoints.h GEN7_FILES := \ genX_cmd_buffer.c \ - genX_l3.c \ + genX_blorp_exec.c \ + genX_gpu_memcpy.c \ genX_pipeline.c \ gen7_cmd_buffer.c \ - gen7_pipeline.c \ genX_state.c GEN75_FILES := \ genX_cmd_buffer.c \ - genX_l3.c \ + genX_blorp_exec.c \ + genX_gpu_memcpy.c \ genX_pipeline.c \ gen7_cmd_buffer.c \ - gen7_pipeline.c \ genX_state.c GEN8_FILES := \ genX_cmd_buffer.c \ - genX_l3.c \ + genX_blorp_exec.c \ + genX_gpu_memcpy.c \ genX_pipeline.c \ gen8_cmd_buffer.c \ - gen8_pipeline.c \ genX_state.c GEN9_FILES := \ genX_cmd_buffer.c \ - genX_l3.c \ + genX_blorp_exec.c \ + genX_gpu_memcpy.c \ genX_pipeline.c \ gen8_cmd_buffer.c \ - gen8_pipeline.c \ genX_state.c vulkan_includedir = $(includedir)/vulkan -vulkan_include_HEADERS = \ - $(top_srcdir)/include/vulkan/vk_platform.h \ +noinst_HEADERS = $(top_srcdir)/include/vulkan/vk_platform.h \ $(top_srcdir)/include/vulkan/vulkan.h \ + tests/state_pool_test_helper.h +vulkan_include_HEADERS = \ $(top_srcdir)/include/vulkan/vulkan_intel.h lib_LTLIBRARIES = libvulkan_intel.la check_LTLIBRARIES = libvulkan-test.la PER_GEN_LIBS = \ - libanv-gen7.la \ - libanv-gen75.la \ - libanv-gen8.la \ - libanv-gen9.la + libanv-gen7.la \ + libanv-gen75.la \ + libanv-gen8.la \ + libanv-gen9.la noinst_LTLIBRARIES = $(PER_GEN_LIBS) libvulkan_common.la # The gallium includes are for the util/u_math.h include from main/macros.h -AM_CPPFLAGS = $(INTEL_CFLAGS) $(VALGRIND_CFLAGS) $(DEFINES) \ - -I$(top_srcdir)/include -I$(top_builddir)/src \ - -I$(top_srcdir)/src -I$(top_builddir)/src/compiler \ - -I$(top_srcdir)/src/compiler \ +AM_CPPFLAGS = -I$(top_srcdir)/include -I$(top_builddir)/src \ + -I$(top_srcdir)/src -I$(top_srcdir)/src/vulkan/wsi \ + -I$(top_builddir)/src/compiler -I$(top_srcdir)/src/compiler \ -I$(top_builddir)/src/compiler/nir -I$(top_srcdir)/src/mapi \ -I$(top_srcdir)/src/mesa \ -I$(top_srcdir)/src/mesa/drivers/dri/common \ @@ -1011,7 +1012,8 @@ -I$(top_srcdir)/src/gallium/auxiliary \ -I$(top_srcdir)/src/gallium/include \ -I$(top_builddir)/src/intel -I$(top_srcdir)/src/intel \ - $(am__append_1) $(am__append_4) + $(am__append_1) $(INTEL_CFLAGS) $(VALGRIND_CFLAGS) $(DEFINES) \ + $(am__append_2) $(am__append_5) AM_CFLAGS = \ $(VISIBILITY_CFLAGS) \ -Wno-override-init -msse2 @@ -1025,29 +1027,28 @@ libanv_gen9_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=90 libanv_gen9_la_SOURCES = $(GEN9_FILES) VULKAN_SOURCES = $(VULKAN_GENERATED_FILES) $(VULKAN_FILES) \ - $(am__append_2) $(am__append_5) -VULKAN_LIB_DEPS = $(am__append_3) $(am__append_6) libvulkan_common.la \ + $(am__append_3) $(am__append_6) +VULKAN_LIB_DEPS = libvulkan_common.la \ + $(top_builddir)/src/vulkan/wsi/libvulkan_wsi.la \ $(top_builddir)/src/mesa/drivers/dri/i965/libi965_compiler.la \ $(top_builddir)/src/compiler/nir/libnir.la \ $(top_builddir)/src/util/libmesautil.la \ - $(top_builddir)/src/intel/isl/libisl.la $(PER_GEN_LIBS) \ - $(PTHREAD_LIBS) $(DLOPEN_LIBS) -lm + $(top_builddir)/src/intel/common/libintel_common.la \ + $(top_builddir)/src/intel/isl/libisl.la \ + $(top_builddir)/src/intel/blorp/libblorp.la $(PER_GEN_LIBS) \ + $(PTHREAD_LIBS) $(DLOPEN_LIBS) -lm $(am__append_4) \ + $(am__append_7) libvulkan_common_la_SOURCES = $(VULKAN_SOURCES) nodist_EXTRA_libvulkan_intel_la_SOURCES = dummy.cpp libvulkan_intel_la_SOURCES = $(VULKAN_GEM_FILES) -VULKAN_ENTRYPOINT_CPPFLAGS = \ - $(XCB_DRI3_CFLAGS) \ - $(WAYLAND_CFLAGS) \ - -DVK_USE_PLATFORM_XCB_KHR \ - -DVK_USE_PLATFORM_WAYLAND_KHR - +vulkan_api_xml = $(top_srcdir)/src/vulkan/registry/vk.xml BUILT_SOURCES = $(VULKAN_GENERATED_FILES) -CLEANFILES = $(BUILT_SOURCES) dev_icd.json +CLEANFILES = $(BUILT_SOURCES) dev_icd.json intel_icd.@host_cpu@.json EXTRA_DIST = \ $(top_srcdir)/include/vulkan/vk_icd.h \ anv_entrypoints_gen.py \ dev_icd.json.in \ - intel_icd.json + intel_icd.json.in libvulkan_intel_la_LIBADD = $(VULKAN_LIB_DEPS) libvulkan_intel_la_LDFLAGS = \ @@ -1060,16 +1061,13 @@ $(LD_NO_UNDEFINED) icdconfdir = @VULKAN_ICD_INSTALL_DIR@ -icdconf_DATA = intel_icd.json +icdconf_DATA = intel_icd.@host_cpu@.json # The following is used for development purposes, by setting VK_ICD_FILENAMES. noinst_DATA = dev_icd.json # Libvulkan with dummy gem. Used for unit tests. libvulkan_test_la_SOURCES = $(VULKAN_GEM_STUB_FILES) libvulkan_test_la_LIBADD = $(VULKAN_LIB_DEPS) -noinst_HEADERS = \ - tests/state_pool_test_helper.h - LDADD = \ libvulkan-test.la \ $(PTHREAD_LIBS) -lm -lstdc++ @@ -1237,6 +1235,7 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/anv_allocator.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/anv_batch_chain.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/anv_blorp.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/anv_cmd_buffer.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/anv_descriptor_set.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/anv_device.Plo@am__quote@ @@ -1247,14 +1246,9 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/anv_gem_stubs.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/anv_image.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/anv_intel.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/anv_meta.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/anv_meta_blit.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/anv_meta_blit2d.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/anv_meta_clear.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/anv_meta_copy.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/anv_meta_resolve.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/anv_nir_apply_dynamic_offsets.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/anv_nir_apply_pipeline_layout.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/anv_nir_lower_input_attachments.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/anv_nir_lower_push_constants.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/anv_pass.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/anv_pipeline.Plo@am__quote@ @@ -1266,27 +1260,27 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/anv_wsi_x11.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/dummy.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen75_la-gen7_cmd_buffer.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen75_la-gen7_pipeline.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen75_la-genX_blorp_exec.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen75_la-genX_cmd_buffer.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen75_la-genX_l3.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen75_la-genX_gpu_memcpy.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen75_la-genX_pipeline.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen75_la-genX_state.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen7_la-gen7_cmd_buffer.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen7_la-gen7_pipeline.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen7_la-genX_blorp_exec.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen7_la-genX_cmd_buffer.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen7_la-genX_l3.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen7_la-genX_gpu_memcpy.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen7_la-genX_pipeline.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen7_la-genX_state.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen8_la-gen8_cmd_buffer.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen8_la-gen8_pipeline.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen8_la-genX_blorp_exec.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen8_la-genX_cmd_buffer.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen8_la-genX_l3.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen8_la-genX_gpu_memcpy.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen8_la-genX_pipeline.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen8_la-genX_state.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen9_la-gen8_cmd_buffer.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen9_la-gen8_pipeline.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen9_la-genX_blorp_exec.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen9_la-genX_cmd_buffer.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libanv_gen9_la-genX_l3.Plo@am__quote@ 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+@am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libanv_gen8_la_CFLAGS) $(CFLAGS) -c -o libanv_gen8_la-genX_gpu_memcpy.lo `test -f 'genX_gpu_memcpy.c' || echo '$(srcdir)/'`genX_gpu_memcpy.c libanv_gen8_la-genX_pipeline.lo: genX_pipeline.c @am__fastdepCC_TRUE@ $(AM_V_CC)$(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libanv_gen8_la_CFLAGS) $(CFLAGS) -MT libanv_gen8_la-genX_pipeline.lo -MD -MP -MF $(DEPDIR)/libanv_gen8_la-genX_pipeline.Tpo -c -o libanv_gen8_la-genX_pipeline.lo `test -f 'genX_pipeline.c' || echo '$(srcdir)/'`genX_pipeline.c @@ -1430,13 +1431,6 @@ @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(LIBTOOL) $(AM_V_lt) --tag=CC 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@am__fastdepCC_TRUE@ $(AM_V_CC)$(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libanv_gen9_la_CFLAGS) $(CFLAGS) -MT libanv_gen9_la-genX_state.lo -MD -MP -MF $(DEPDIR)/libanv_gen9_la-genX_state.Tpo -c -o libanv_gen9_la-genX_state.lo `test -f 'genX_state.c' || echo '$(srcdir)/'`genX_state.c @am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) $(DEPDIR)/libanv_gen9_la-genX_state.Tpo $(DEPDIR)/libanv_gen9_la-genX_state.Plo @@ -1973,25 +1967,24 @@ .PRECIOUS: Makefile -anv_entrypoints.h : anv_entrypoints_gen.py $(vulkan_include_HEADERS) - $(AM_V_GEN)$(CPP) $(VULKAN_ENTRYPOINT_CPPFLAGS) $(top_srcdir)/include/vulkan/vulkan_intel.h |\ +anv_entrypoints.h : anv_entrypoints_gen.py $(vulkan_api_xml) + $(AM_V_GEN) cat $(vulkan_api_xml) |\ $(PYTHON2) $(srcdir)/anv_entrypoints_gen.py header > $@ -anv_entrypoints.c : anv_entrypoints_gen.py $(vulkan_include_HEADERS) - $(AM_V_GEN)$(CPP) $(VULKAN_ENTRYPOINT_CPPFLAGS) $(top_srcdir)/include/vulkan/vulkan_intel.h |\ +anv_entrypoints.c : anv_entrypoints_gen.py $(vulkan_api_xml) + $(AM_V_GEN) cat $(vulkan_api_xml) |\ $(PYTHON2) $(srcdir)/anv_entrypoints_gen.py code > $@ -.PHONY: anv_timestamp.h - -anv_timestamp.h: - @echo "Updating anv_timestamp.h" - $(AM_V_GEN) echo "#define ANV_TIMESTAMP \"$(TIMESTAMP_CMD)\"" > $@ - dev_icd.json : dev_icd.json.in $(AM_V_GEN) $(SED) \ -e "s#@build_libdir@#${abs_top_builddir}/${LIB_DIR}#" \ < $(srcdir)/dev_icd.json.in > $@ +intel_icd.@host_cpu@.json : intel_icd.json.in + $(AM_V_GEN) $(SED) \ + -e "s#@install_libdir@#${libdir}#" \ + < $(srcdir)/intel_icd.json.in > $@ + @BUILD_SHARED_TRUE@@HAVE_COMPAT_SYMLINKS_TRUE@all-local : .install-mesa-links @BUILD_SHARED_TRUE@@HAVE_COMPAT_SYMLINKS_TRUE@.install-mesa-links : $(lib_LTLIBRARIES) diff -Nru mesa-12.0.6/src/intel/vulkan/Makefile.sources mesa-17.0.7/src/intel/vulkan/Makefile.sources --- mesa-12.0.6/src/intel/vulkan/Makefile.sources 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/Makefile.sources 2017-06-01 10:37:10.000000000 +0000 @@ -22,6 +22,7 @@ VULKAN_FILES := \ anv_allocator.c \ anv_batch_chain.c \ + anv_blorp.c \ anv_cmd_buffer.c \ anv_descriptor_set.c \ anv_device.c \ @@ -30,16 +31,10 @@ anv_genX.h \ anv_image.c \ anv_intel.c \ - anv_meta.c \ - anv_meta.h \ - anv_meta_blit.c \ - anv_meta_blit2d.c \ - anv_meta_clear.c \ - anv_meta_copy.c \ - anv_meta_resolve.c \ anv_nir.h \ anv_nir_apply_dynamic_offsets.c \ anv_nir_apply_pipeline_layout.c \ + anv_nir_lower_input_attachments.c \ anv_nir_lower_push_constants.c \ anv_pass.c \ anv_pipeline.c \ @@ -48,8 +43,6 @@ anv_query.c \ anv_util.c \ anv_wsi.c \ - anv_wsi.h \ - genX_pipeline_util.h \ vk_format_info.h VULKAN_WSI_WAYLAND_FILES := \ @@ -66,38 +59,37 @@ VULKAN_GENERATED_FILES := \ anv_entrypoints.c \ - anv_entrypoints.h \ - anv_timestamp.h + anv_entrypoints.h GEN7_FILES := \ genX_cmd_buffer.c \ - genX_l3.c \ + genX_blorp_exec.c \ + genX_gpu_memcpy.c \ genX_pipeline.c \ gen7_cmd_buffer.c \ - gen7_pipeline.c \ genX_state.c GEN75_FILES := \ genX_cmd_buffer.c \ - genX_l3.c \ + genX_blorp_exec.c \ + genX_gpu_memcpy.c \ genX_pipeline.c \ gen7_cmd_buffer.c \ - gen7_pipeline.c \ genX_state.c GEN8_FILES := \ genX_cmd_buffer.c \ - genX_l3.c \ + genX_blorp_exec.c \ + genX_gpu_memcpy.c \ genX_pipeline.c \ gen8_cmd_buffer.c \ - gen8_pipeline.c \ genX_state.c GEN9_FILES := \ genX_cmd_buffer.c \ - genX_l3.c \ + genX_blorp_exec.c \ + genX_gpu_memcpy.c \ genX_pipeline.c \ gen8_cmd_buffer.c \ - gen8_pipeline.c \ genX_state.c diff -Nru mesa-12.0.6/src/intel/vulkan/TODO mesa-17.0.7/src/intel/vulkan/TODO --- mesa-12.0.6/src/intel/vulkan/TODO 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/TODO 2017-06-01 10:37:10.000000000 +0000 @@ -2,32 +2,15 @@ ================= Missing Features: - - FP64 - - Tessellation - - Cull and Clip Distance - - Sampler anisotropy (Is there anything to do here?) - - Image Gather Extended - Storage Image Without Format - Investigate CTS failures on HSW - Pipeline statistics queries - Sparse memory - - Per-sample-dispatch, minSampleShading - -Code sharing with GL: - - Add surface capability introspection to ISL (pull the surface format - table from brw_surface_formats.c) - - Generalize blorp to use ISL and be sharable between the two drivers Performance: - - HiZ (Nanley) - - Fast color clears (after HiZ?) + - Multi-{sampled/gen8,LOD} HiZ - Compressed multisample support - - Renderbuffer compression (SKL+) - Pushing pieces of UBOs? - Enable guardband clipping - - Remove alloc in renderpass begin to renderpass create - pma stall workaround - Use soft-pin to avoid relocations - -Cleanups: - - Deduplicate gen7 and gen8 diff -Nru mesa-12.0.6/src/intel/vulkan/vk_format_info.h mesa-17.0.7/src/intel/vulkan/vk_format_info.h --- mesa-12.0.6/src/intel/vulkan/vk_format_info.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/intel/vulkan/vk_format_info.h 2017-06-01 10:37:10.000000000 +0000 @@ -21,7 +21,8 @@ * IN THE SOFTWARE. */ -#pragma once +#ifndef VK_FORMAT_INFO_H +#define VK_FORMAT_INFO_H #include #include @@ -63,3 +64,12 @@ const VkImageAspectFlags aspects = vk_format_aspects(format); return aspects & (VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT); } + +static inline bool +vk_format_has_depth(VkFormat format) +{ + const VkImageAspectFlags aspects = vk_format_aspects(format); + return aspects & VK_IMAGE_ASPECT_DEPTH_BIT; +} + +#endif /* VK_FORMAT_INFO_H */ diff -Nru mesa-12.0.6/src/loader/loader.c mesa-17.0.7/src/loader/loader.c --- mesa-12.0.6/src/loader/loader.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/loader/loader.c 2017-06-01 10:37:10.000000000 +0000 @@ -1,45 +1,7 @@ /* * Copyright (C) 2013 Rob Clark - * - * This code is derived from the following files. - * - * * src/glx/dri3_common.c - * Copyright © 2013 Keith Packard - * - * * src/egl/drivers/dri2/common.c - * * src/gbm/backends/dri/driver_name.c - * Copyright © 2011 Intel Corporation - * - * Authors: - * Kristian Høgsberg - * Benjamin Franzke - * - * * src/gallium/targets/egl-static/egl.c - * Copyright (C) 2010-2011 LunarG Inc. - * - * Authors: - * Chia-I Wu - * - * * src/gallium/state_trackers/egl/drm/native_drm.c - * Copyright (C) 2010 Chia-I Wu - * - * * src/egl/drivers/dri2/platform_android.c - * - * Copyright (C) 2010-2011 Chia-I Wu - * Copyright (C) 2010-2011 LunarG Inc. - * - * Based on platform_x11, which has - * - * Copyright © 2011 Intel Corporation - * - * * src/gallium/auxiliary/pipe-loader/pipe_loader_drm.c - * Copyright 2011 Intel Corporation - * Copyright 2012 Francisco Jerez - * All Rights Reserved. - * - * Authors: - * Kristian Høgsberg - * Benjamin Franzke + * Copyright (C) 2014-2016 Emil Velikov + * Copyright (C) 2016 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -69,17 +31,8 @@ #include #include #include +#include #include -#ifdef HAVE_LIBUDEV -#include -#include -#include -#include -#ifdef USE_DRICONF -#include "xmlconfig.h" -#include "xmlpool.h" -#endif -#endif #ifdef MAJOR_IN_MKDEV #include #endif @@ -89,7 +42,13 @@ #include "loader.h" #ifdef HAVE_LIBDRM +#include +#include #include +#ifdef USE_DRICONF +#include "xmlconfig.h" +#include "xmlpool.h" +#endif #endif #define __IS_LOADER @@ -123,266 +82,92 @@ return fd; } -#ifdef HAVE_LIBUDEV -#include - -static void *udev_handle = NULL; +#if defined(HAVE_LIBDRM) +#ifdef USE_DRICONF +static const char __driConfigOptionsLoader[] = +DRI_CONF_BEGIN + DRI_CONF_SECTION_INITIALIZATION + DRI_CONF_DEVICE_ID_PATH_TAG() + DRI_CONF_SECTION_END +DRI_CONF_END; -static void * -udev_dlopen_handle(void) +static char *loader_get_dri_config_device_id(void) { - char name[80]; - unsigned flags = RTLD_NOLOAD | RTLD_LOCAL | RTLD_LAZY; - int version; - - /* libudev.so.1 changed the return types of the two unref functions - * from voids to pointers. We don't use those return values, and the - * only ABI I've heard that cares about this kind of change (calling - * a function with a void * return that actually only returns void) - * might be ia64. - */ - - /* First try opening an already linked libudev, then try loading one */ - do { - for (version = 1; version >= 0; version--) { - snprintf(name, sizeof(name), "libudev.so.%d", version); - udev_handle = dlopen(name, flags); - if (udev_handle) - return udev_handle; - } - - if ((flags & RTLD_NOLOAD) == 0) - break; - - flags &= ~RTLD_NOLOAD; - } while (1); - - log_(_LOADER_WARNING, - "Couldn't dlopen libudev.so.1 or " - "libudev.so.0, driver detection may be broken.\n"); - return NULL; -} + driOptionCache defaultInitOptions; + driOptionCache userInitOptions; + char *prime = NULL; -static int dlsym_failed = 0; + driParseOptionInfo(&defaultInitOptions, __driConfigOptionsLoader); + driParseConfigFiles(&userInitOptions, &defaultInitOptions, 0, "loader"); + if (driCheckOption(&userInitOptions, "device_id", DRI_STRING)) + prime = strdup(driQueryOptionstr(&userInitOptions, "device_id")); + driDestroyOptionCache(&userInitOptions); + driDestroyOptionInfo(&defaultInitOptions); -static void * -checked_dlsym(void *dlopen_handle, const char *name) -{ - void *result = dlsym(dlopen_handle, name); - if (!result) - dlsym_failed = 1; - return result; + return prime; } +#endif -#define UDEV_SYMBOL(ret, name, args) \ - ret (*name) args = checked_dlsym(udev_dlopen_handle(), #name); - - -static inline struct udev_device * -udev_device_new_from_fd(struct udev *udev, int fd) +static char *drm_construct_id_path_tag(drmDevicePtr device) { - struct udev_device *device; - struct stat buf; - UDEV_SYMBOL(struct udev_device *, udev_device_new_from_devnum, - (struct udev *udev, char type, dev_t devnum)); +/* Length of "pci-xxxx_xx_xx_x\0" */ +#define PCI_ID_PATH_TAG_LENGTH 17 + char *tag = NULL; - if (dlsym_failed) - return NULL; - - if (fstat(fd, &buf) < 0) { - log_(_LOADER_WARNING, "MESA-LOADER: failed to stat fd %d\n", fd); - return NULL; - } + if (device->bustype == DRM_BUS_PCI) { + tag = calloc(PCI_ID_PATH_TAG_LENGTH, sizeof(char)); + if (tag == NULL) + return NULL; - device = udev_device_new_from_devnum(udev, 'c', buf.st_rdev); - if (device == NULL) { - log_(_LOADER_WARNING, - "MESA-LOADER: could not create udev device for fd %d\n", fd); - return NULL; + snprintf(tag, PCI_ID_PATH_TAG_LENGTH, "pci-%04x_%02x_%02x_%1u", + device->businfo.pci->domain, device->businfo.pci->bus, + device->businfo.pci->dev, device->businfo.pci->func); } - - return device; + return tag; } -static int -libudev_get_pci_id_for_fd(int fd, int *vendor_id, int *chip_id) +static bool drm_device_matches_tag(drmDevicePtr device, const char *prime_tag) { - struct udev *udev = NULL; - struct udev_device *device = NULL, *parent; - const char *pci_id; - UDEV_SYMBOL(struct udev *, udev_new, (void)); - UDEV_SYMBOL(struct udev_device *, udev_device_get_parent, - (struct udev_device *)); - UDEV_SYMBOL(const char *, udev_device_get_property_value, - (struct udev_device *, const char *)); - UDEV_SYMBOL(struct udev_device *, udev_device_unref, - (struct udev_device *)); - UDEV_SYMBOL(struct udev *, udev_unref, (struct udev *)); - - *chip_id = -1; - - if (dlsym_failed) - return 0; - - udev = udev_new(); - device = udev_device_new_from_fd(udev, fd); - if (!device) - goto out; - - parent = udev_device_get_parent(device); - if (parent == NULL) { - log_(_LOADER_WARNING, "MESA-LOADER: could not get parent device\n"); - goto out; - } - - pci_id = udev_device_get_property_value(parent, "PCI_ID"); - if (pci_id == NULL) { - log_(_LOADER_INFO, "MESA-LOADER: no PCI ID\n"); - *chip_id = -1; - goto out; - } else if (sscanf(pci_id, "%x:%x", vendor_id, chip_id) != 2) { - log_(_LOADER_WARNING, "MESA-LOADER: malformed PCI ID\n"); - *chip_id = -1; - goto out; - } + char *tag = drm_construct_id_path_tag(device); + int ret; -out: - if (device) - udev_device_unref(device); - if (udev) - udev_unref(udev); + if (tag == NULL) + return false; - return (*chip_id >= 0); -} + ret = strcmp(tag, prime_tag); -static char * -get_render_node_from_id_path_tag(struct udev *udev, - char *id_path_tag, - char another_tag) -{ - struct udev_device *device; - struct udev_enumerate *e; - struct udev_list_entry *entry; - const char *path, *id_path_tag_tmp; - char *path_res; - char found = 0; - UDEV_SYMBOL(struct udev_enumerate *, udev_enumerate_new, - (struct udev *)); - UDEV_SYMBOL(int, udev_enumerate_add_match_subsystem, - (struct udev_enumerate *, const char *)); - UDEV_SYMBOL(int, udev_enumerate_add_match_sysname, - (struct udev_enumerate *, const char *)); - UDEV_SYMBOL(int, udev_enumerate_scan_devices, - (struct udev_enumerate *)); - UDEV_SYMBOL(struct udev_list_entry *, udev_enumerate_get_list_entry, - (struct udev_enumerate *)); - UDEV_SYMBOL(void, udev_enumerate_unref, - (struct udev_enumerate *)); - UDEV_SYMBOL(struct udev_list_entry *, udev_list_entry_get_next, - (struct udev_list_entry *)); - UDEV_SYMBOL(const char *, udev_list_entry_get_name, - (struct udev_list_entry *)); - UDEV_SYMBOL(struct udev_device *, udev_device_new_from_syspath, - (struct udev *, const char *)); - UDEV_SYMBOL(const char *, udev_device_get_property_value, - (struct udev_device *, const char *)); - UDEV_SYMBOL(const char *, udev_device_get_devnode, - (struct udev_device *)); - UDEV_SYMBOL(struct udev_device *, udev_device_unref, - (struct udev_device *)); - - e = udev_enumerate_new(udev); - udev_enumerate_add_match_subsystem(e, "drm"); - udev_enumerate_add_match_sysname(e, "render*"); - - udev_enumerate_scan_devices(e); - udev_list_entry_foreach(entry, udev_enumerate_get_list_entry(e)) { - path = udev_list_entry_get_name(entry); - device = udev_device_new_from_syspath(udev, path); - if (!device) - continue; - id_path_tag_tmp = udev_device_get_property_value(device, "ID_PATH_TAG"); - if (id_path_tag_tmp) { - if ((!another_tag && !strcmp(id_path_tag, id_path_tag_tmp)) || - (another_tag && strcmp(id_path_tag, id_path_tag_tmp))) { - found = 1; - break; - } - } - udev_device_unref(device); - } - - udev_enumerate_unref(e); - - if (found) { - path_res = strdup(udev_device_get_devnode(device)); - udev_device_unref(device); - return path_res; - } - return NULL; + free(tag); + return ret == 0; } -static char * -get_id_path_tag_from_fd(struct udev *udev, int fd) +static char *drm_get_id_path_tag_for_fd(int fd) { - struct udev_device *device; - const char *id_path_tag_tmp; - char *id_path_tag; - UDEV_SYMBOL(const char *, udev_device_get_property_value, - (struct udev_device *, const char *)); - UDEV_SYMBOL(struct udev_device *, udev_device_unref, - (struct udev_device *)); - - device = udev_device_new_from_fd(udev, fd); - if (!device) - return NULL; + drmDevicePtr device; + char *tag; - id_path_tag_tmp = udev_device_get_property_value(device, "ID_PATH_TAG"); - if (!id_path_tag_tmp) - return NULL; - - id_path_tag = strdup(id_path_tag_tmp); + if (drmGetDevice(fd, &device) != 0) + return NULL; - udev_device_unref(device); - return id_path_tag; + tag = drm_construct_id_path_tag(device); + drmFreeDevice(&device); + return tag; } -#ifdef USE_DRICONF -const char __driConfigOptionsLoader[] = -DRI_CONF_BEGIN - DRI_CONF_SECTION_INITIALIZATION - DRI_CONF_DEVICE_ID_PATH_TAG() - DRI_CONF_SECTION_END -DRI_CONF_END; -#endif - int loader_get_user_preferred_fd(int default_fd, int *different_device) { - struct udev *udev; -#ifdef USE_DRICONF - driOptionCache defaultInitOptions; - driOptionCache userInitOptions; -#endif +/* Arbitrary "maximum" value of drm devices. */ +#define MAX_DRM_DEVICES 32 const char *dri_prime = getenv("DRI_PRIME"); - char *prime = NULL; - int is_different_device = 0, fd = default_fd; - char *default_device_id_path_tag; - char *device_name = NULL; - char another_tag = 0; - UDEV_SYMBOL(struct udev *, udev_new, (void)); - UDEV_SYMBOL(struct udev *, udev_unref, (struct udev *)); + char *default_tag, *prime = NULL; + drmDevicePtr devices[MAX_DRM_DEVICES]; + int i, num_devices, fd; + bool found = false; if (dri_prime) prime = strdup(dri_prime); #ifdef USE_DRICONF - else { - driParseOptionInfo(&defaultInitOptions, __driConfigOptionsLoader); - driParseConfigFiles(&userInitOptions, &defaultInitOptions, 0, "loader"); - if (driCheckOption(&userInitOptions, "device_id", DRI_STRING)) - prime = strdup(driQueryOptionstr(&userInitOptions, "device_id")); - driDestroyOptionCache(&userInitOptions); - driDestroyOptionInfo(&defaultInitOptions); - } + else + prime = loader_get_dri_config_device_id(); #endif if (prime == NULL) { @@ -390,55 +175,66 @@ return default_fd; } - udev = udev_new(); - if (!udev) - goto prime_clean; - - default_device_id_path_tag = get_id_path_tag_from_fd(udev, default_fd); - if (!default_device_id_path_tag) - goto udev_clean; + default_tag = drm_get_id_path_tag_for_fd(default_fd); + if (default_tag == NULL) + goto err; + + num_devices = drmGetDevices(devices, MAX_DRM_DEVICES); + if (num_devices < 0) + goto err; - is_different_device = 1; /* two format are supported: * "1": choose any other card than the card used by default. * id_path_tag: (for example "pci-0000_02_00_0") choose the card * with this id_path_tag. */ if (!strcmp(prime,"1")) { - free(prime); - prime = strdup(default_device_id_path_tag); - /* request a card with a different card than the default card */ - another_tag = 1; - } else if (!strcmp(default_device_id_path_tag, prime)) - /* we are to get a new fd (render-node) of the same device */ - is_different_device = 0; - - device_name = get_render_node_from_id_path_tag(udev, - prime, - another_tag); - if (device_name == NULL) { - is_different_device = 0; - goto default_device_clean; - } - - fd = loader_open_device(device_name); - if (fd >= 0) { - close(default_fd); + /* Hmm... detection for 2-7 seems to be broken. Oh well ... + * Pick the first render device that is not our own. + */ + for (i = 0; i < num_devices; i++) { + if (devices[i]->available_nodes & 1 << DRM_NODE_RENDER && + !drm_device_matches_tag(devices[i], default_tag)) { + + found = true; + break; + } + } } else { - fd = default_fd; - is_different_device = 0; + for (i = 0; i < num_devices; i++) { + if (devices[i]->available_nodes & 1 << DRM_NODE_RENDER && + drm_device_matches_tag(devices[i], prime)) { + + found = true; + break; + } + } } - free(device_name); - default_device_clean: - free(default_device_id_path_tag); - udev_clean: - udev_unref(udev); - prime_clean: - free(prime); + if (!found) { + drmFreeDevices(devices, num_devices); + goto err; + } + + fd = loader_open_device(devices[i]->nodes[DRM_NODE_RENDER]); + drmFreeDevices(devices, num_devices); + if (fd < 0) + goto err; - *different_device = is_different_device; + close(default_fd); + + *different_device = !!strcmp(default_tag, prime); + + free(default_tag); + free(prime); return fd; + + err: + *different_device = 0; + + free(default_tag); + free(prime); + return default_fd; } #else int loader_get_user_preferred_fd(int default_fd, int *different_device) @@ -448,7 +244,7 @@ } #endif -#if defined(HAVE_SYSFS) || defined(HAVE_LIBDRM) +#if defined(HAVE_LIBDRM) static int dev_node_from_fd(int fd, unsigned int *maj, unsigned int *min) { @@ -471,113 +267,32 @@ } #endif -#if defined(HAVE_SYSFS) -static int -sysfs_get_pci_id_for_fd(int fd, int *vendor_id, int *chip_id) -{ - unsigned int maj, min; - FILE *f; - char buf[0x40]; - - if (dev_node_from_fd(fd, &maj, &min) < 0) { - *chip_id = -1; - return 0; - } - - snprintf(buf, sizeof(buf), "/sys/dev/char/%d:%d/device/vendor", maj, min); - if (!(f = fopen(buf, "r"))) { - *chip_id = -1; - return 0; - } - if (fscanf(f, "%x", vendor_id) != 1) { - *chip_id = -1; - fclose(f); - return 0; - } - fclose(f); - snprintf(buf, sizeof(buf), "/sys/dev/char/%d:%d/device/device", maj, min); - if (!(f = fopen(buf, "r"))) { - *chip_id = -1; - return 0; - } - if (fscanf(f, "%x", chip_id) != 1) { - *chip_id = -1; - fclose(f); - return 0; - } - fclose(f); - return 1; -} -#endif - #if defined(HAVE_LIBDRM) -/* for i915 */ -#include -/* for radeon */ -#include static int drm_get_pci_id_for_fd(int fd, int *vendor_id, int *chip_id) { - drmVersionPtr version; + drmDevicePtr device; + int ret; - *chip_id = -1; - - version = drmGetVersion(fd); - if (!version) { - log_(_LOADER_WARNING, "MESA-LOADER: invalid drm fd\n"); - return 0; - } - if (!version->name) { - log_(_LOADER_WARNING, "MESA-LOADER: unable to determine the driver name\n"); - drmFreeVersion(version); - return 0; - } - - if (strcmp(version->name, "i915") == 0) { - struct drm_i915_getparam gp; - int ret; - - *vendor_id = 0x8086; - - memset(&gp, 0, sizeof(gp)); - gp.param = I915_PARAM_CHIPSET_ID; - gp.value = chip_id; - ret = drmCommandWriteRead(fd, DRM_I915_GETPARAM, &gp, sizeof(gp)); - if (ret) { - log_(_LOADER_WARNING, "MESA-LOADER: failed to get param for i915\n"); - *chip_id = -1; + if (drmGetDevice(fd, &device) == 0) { + if (device->bustype == DRM_BUS_PCI) { + *vendor_id = device->deviceinfo.pci->vendor_id; + *chip_id = device->deviceinfo.pci->device_id; + ret = 1; } - } - else if (strcmp(version->name, "radeon") == 0) { - struct drm_radeon_info info; - int ret; - - *vendor_id = 0x1002; - - memset(&info, 0, sizeof(info)); - info.request = RADEON_INFO_DEVICE_ID; - info.value = (unsigned long) chip_id; - ret = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info)); - if (ret) { - log_(_LOADER_WARNING, "MESA-LOADER: failed to get info for radeon\n"); - *chip_id = -1; + else { + log_(_LOADER_DEBUG, "MESA-LOADER: device is not located on the PCI bus\n"); + ret = 0; } + drmFreeDevice(&device); } - else if (strcmp(version->name, "nouveau") == 0) { - *vendor_id = 0x10de; - /* not used */ - *chip_id = 0; - } - else if (strcmp(version->name, "vmwgfx") == 0) { - *vendor_id = 0x15ad; - /* assume SVGA II */ - *chip_id = 0x0405; + else { + log_(_LOADER_WARNING, "MESA-LOADER: failed to retrieve device information\n"); + ret = 0; } - drmFreeVersion(version); - - return (*chip_id >= 0); + return ret; } #endif @@ -585,14 +300,6 @@ int loader_get_pci_id_for_fd(int fd, int *vendor_id, int *chip_id) { -#if HAVE_LIBUDEV - if (libudev_get_pci_id_for_fd(fd, vendor_id, chip_id)) - return 1; -#endif -#if HAVE_SYSFS - if (sysfs_get_pci_id_for_fd(fd, vendor_id, chip_id)) - return 1; -#endif #if HAVE_LIBDRM if (drm_get_pci_id_for_fd(fd, vendor_id, chip_id)) return 1; @@ -601,81 +308,6 @@ } -#ifdef HAVE_LIBUDEV -static char * -libudev_get_device_name_for_fd(int fd) -{ - char *device_name = NULL; - struct udev *udev; - struct udev_device *device; - const char *const_device_name; - UDEV_SYMBOL(struct udev *, udev_new, (void)); - UDEV_SYMBOL(const char *, udev_device_get_devnode, - (struct udev_device *)); - UDEV_SYMBOL(struct udev_device *, udev_device_unref, - (struct udev_device *)); - UDEV_SYMBOL(struct udev *, udev_unref, (struct udev *)); - - if (dlsym_failed) - return NULL; - - udev = udev_new(); - device = udev_device_new_from_fd(udev, fd); - if (device == NULL) - return NULL; - - const_device_name = udev_device_get_devnode(device); - if (!const_device_name) - goto out; - device_name = strdup(const_device_name); - -out: - udev_device_unref(device); - udev_unref(udev); - return device_name; -} -#endif - - -#if HAVE_SYSFS -static char * -sysfs_get_device_name_for_fd(int fd) -{ - char *device_name = NULL; - unsigned int maj, min; - FILE *f; - char buf[0x40]; - static const char match[9] = "\0DEVNAME="; - int expected = 1; - - if (dev_node_from_fd(fd, &maj, &min) < 0) - return NULL; - - snprintf(buf, sizeof(buf), "/sys/dev/char/%d:%d/uevent", maj, min); - if (!(f = fopen(buf, "r"))) - return NULL; - - while (expected < sizeof(match)) { - int c = getc(f); - - if (c == EOF) { - fclose(f); - return NULL; - } else if (c == match[expected] ) - expected++; - else - expected = 0; - } - - strcpy(buf, "/dev/"); - if (fgets(buf + 5, sizeof(buf) - 5, f)) - device_name = strdup(buf); - - fclose(f); - return device_name; -} -#endif - #if defined(HAVE_LIBDRM) static char * drm_get_device_name_for_fd(int fd) @@ -700,14 +332,6 @@ { char *result = NULL; -#if HAVE_LIBUDEV - if ((result = libudev_get_device_name_for_fd(fd))) - return result; -#endif -#if HAVE_SYSFS - if ((result = sysfs_get_device_name_for_fd(fd))) - return result; -#endif #if HAVE_LIBDRM if ((result = drm_get_device_name_for_fd(fd))) return result; @@ -716,14 +340,11 @@ } char * -loader_get_driver_for_fd(int fd, unsigned driver_types) +loader_get_driver_for_fd(int fd) { int vendor_id, chip_id, i, j; char *driver = NULL; - if (!driver_types) - driver_types = _LOADER_GALLIUM | _LOADER_DRI; - if (!loader_get_pci_id_for_fd(fd, &vendor_id, &chip_id)) { #if HAVE_LIBDRM @@ -748,9 +369,6 @@ if (vendor_id != driver_map[i].vendor_id) continue; - if (!(driver_types & driver_map[i].driver_types)) - continue; - if (driver_map[i].predicate && !driver_map[i].predicate(fd)) continue; @@ -778,3 +396,28 @@ { log_ = logger; } + +/* XXX: Local definition to avoid pulling the heavyweight GL/gl.h and + * GL/internal/dri_interface.h + */ + +#ifndef __DRI_DRIVER_GET_EXTENSIONS +#define __DRI_DRIVER_GET_EXTENSIONS "__driDriverGetExtensions" +#endif + +char * +loader_get_extensions_name(const char *driver_name) +{ + char *name = NULL; + + if (asprintf(&name, "%s_%s", __DRI_DRIVER_GET_EXTENSIONS, driver_name) < 0) + return NULL; + + const size_t len = strlen(name); + for (size_t i = 0; i < len; i++) { + if (name[i] == '-') + name[i] = '_'; + } + + return name; +} diff -Nru mesa-12.0.6/src/loader/loader_dri3_helper.c mesa-17.0.7/src/loader/loader_dri3_helper.c --- mesa-12.0.6/src/loader/loader_dri3_helper.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/loader/loader_dri3_helper.c 2017-06-01 10:37:10.000000000 +0000 @@ -95,9 +95,9 @@ xcb_free_pixmap(draw->conn, buffer->pixmap); xcb_sync_destroy_fence(draw->conn, buffer->sync_fence); xshmfence_unmap_shm(buffer->shm_fence); - (draw->ext->image->destroyImage)(buffer->image); + draw->ext->image->destroyImage(buffer->image); if (buffer->linear_buffer) - (draw->ext->image->destroyImage)(buffer->linear_buffer); + draw->ext->image->destroyImage(buffer->linear_buffer); free(buffer); } @@ -106,15 +106,21 @@ { int i; - (draw->ext->core->destroyDrawable)(draw->dri_drawable); + draw->ext->core->destroyDrawable(draw->dri_drawable); for (i = 0; i < LOADER_DRI3_NUM_BUFFERS; i++) { if (draw->buffers[i]) dri3_free_render_buffer(draw, draw->buffers[i]); } - if (draw->special_event) + if (draw->special_event) { + xcb_void_cookie_t cookie = + xcb_present_select_input_checked(draw->conn, draw->eid, draw->drawable, + XCB_PRESENT_EVENT_MASK_NO_EVENT); + + xcb_discard_reply(draw->conn, cookie.sequence); xcb_unregister_for_special_event(draw->conn, draw->special_event); + } } int @@ -124,7 +130,7 @@ bool is_different_gpu, const __DRIconfig *dri_config, struct loader_dri3_extensions *ext, - struct loader_dri3_vtable *vtable, + const struct loader_dri3_vtable *vtable, struct loader_dri3_drawable *draw) { xcb_get_geometry_cookie_t cookie; @@ -165,9 +171,9 @@ /* Create a new drawable */ draw->dri_drawable = - (draw->ext->image_driver->createNewDrawable)(dri_screen, - dri_config, - draw); + draw->ext->image_driver->createNewDrawable(dri_screen, + dri_config, + draw); if (!draw->dri_drawable) return 1; @@ -734,7 +740,7 @@ ++(*draw->stamp); } - (draw->ext->flush->invalidate)(draw->dri_drawable); + draw->ext->flush->invalidate(draw->dri_drawable); return ret; } @@ -850,34 +856,34 @@ goto no_image; if (!draw->is_different_gpu) { - buffer->image = (draw->ext->image->createImage)(draw->dri_screen, - width, height, - format, - __DRI_IMAGE_USE_SHARE | - __DRI_IMAGE_USE_SCANOUT | - __DRI_IMAGE_USE_BACKBUFFER, - buffer); + buffer->image = draw->ext->image->createImage(draw->dri_screen, + width, height, + format, + __DRI_IMAGE_USE_SHARE | + __DRI_IMAGE_USE_SCANOUT | + __DRI_IMAGE_USE_BACKBUFFER, + buffer); pixmap_buffer = buffer->image; if (!buffer->image) goto no_image; } else { - buffer->image = (draw->ext->image->createImage)(draw->dri_screen, - width, height, - format, - 0, - buffer); + buffer->image = draw->ext->image->createImage(draw->dri_screen, + width, height, + format, + 0, + buffer); if (!buffer->image) goto no_image; buffer->linear_buffer = - (draw->ext->image->createImage)(draw->dri_screen, - width, height, format, - __DRI_IMAGE_USE_SHARE | - __DRI_IMAGE_USE_LINEAR | - __DRI_IMAGE_USE_BACKBUFFER, - buffer); + draw->ext->image->createImage(draw->dri_screen, + width, height, format, + __DRI_IMAGE_USE_SHARE | + __DRI_IMAGE_USE_LINEAR | + __DRI_IMAGE_USE_BACKBUFFER, + buffer); pixmap_buffer = buffer->linear_buffer; if (!buffer->linear_buffer) @@ -886,14 +892,14 @@ /* X wants the stride, so ask the image for it */ - if (!(draw->ext->image->queryImage)(pixmap_buffer, __DRI_IMAGE_ATTRIB_STRIDE, - &stride)) + if (!draw->ext->image->queryImage(pixmap_buffer, __DRI_IMAGE_ATTRIB_STRIDE, + &stride)) goto no_buffer_attrib; buffer->pitch = stride; - if (!(draw->ext->image->queryImage)(pixmap_buffer, __DRI_IMAGE_ATTRIB_FD, - &buffer_fd)) + if (!draw->ext->image->queryImage(pixmap_buffer, __DRI_IMAGE_ATTRIB_FD, + &buffer_fd)) goto no_buffer_attrib; xcb_dri3_pixmap_from_buffer(draw->conn, @@ -924,10 +930,10 @@ return buffer; no_buffer_attrib: - (draw->ext->image->destroyImage)(pixmap_buffer); + draw->ext->image->destroyImage(pixmap_buffer); no_linear_buffer: if (draw->is_different_gpu) - (draw->ext->image->destroyImage)(buffer->image); + draw->ext->image->destroyImage(buffer->image); no_image: free(buffer); no_buffer: @@ -1076,19 +1082,19 @@ * we've gotten the planar wrapper, pull the single plane out of it and * discard the wrapper. */ - image_planar = (image->createImageFromFds)(dri_screen, - bp_reply->width, - bp_reply->height, - image_format_to_fourcc(format), - fds, 1, - &stride, &offset, loaderPrivate); + image_planar = image->createImageFromFds(dri_screen, + bp_reply->width, + bp_reply->height, + image_format_to_fourcc(format), + fds, 1, + &stride, &offset, loaderPrivate); close(fds[0]); if (!image_planar) return NULL; - ret = (image->fromPlanar)(image_planar, 0, loaderPrivate); + ret = image->fromPlanar(image_planar, 0, loaderPrivate); - (image->destroyImage)(image_planar); + image->destroyImage(image_planar); return ret; } @@ -1402,3 +1408,26 @@ return true; } + +/** loader_dri3_update_drawable_geometry + * + * Get the current drawable geometry. + */ +void +loader_dri3_update_drawable_geometry(struct loader_dri3_drawable *draw) +{ + xcb_get_geometry_cookie_t geom_cookie; + xcb_get_geometry_reply_t *geom_reply; + + geom_cookie = xcb_get_geometry(draw->conn, draw->drawable); + + geom_reply = xcb_get_geometry_reply(draw->conn, geom_cookie, NULL); + + if (geom_reply) { + draw->width = geom_reply->width; + draw->height = geom_reply->height; + draw->vtable->set_drawable_size(draw, draw->width, draw->height); + + free(geom_reply); + } +} diff -Nru mesa-12.0.6/src/loader/loader_dri3_helper.h mesa-17.0.7/src/loader/loader_dri3_helper.h --- mesa-12.0.6/src/loader/loader_dri3_helper.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/loader/loader_dri3_helper.h 2017-06-01 10:37:10.000000000 +0000 @@ -159,7 +159,7 @@ bool first_init; struct loader_dri3_extensions *ext; - struct loader_dri3_vtable *vtable; + const struct loader_dri3_vtable *vtable; }; void @@ -176,7 +176,7 @@ bool is_different_gpu, const __DRIconfig *dri_config, struct loader_dri3_extensions *ext, - struct loader_dri3_vtable *vtable, + const struct loader_dri3_vtable *vtable, struct loader_dri3_drawable*); bool loader_dri3_wait_for_msc(struct loader_dri3_drawable *draw, @@ -239,4 +239,6 @@ uint32_t buffer_mask, struct __DRIimageList *buffers); +void +loader_dri3_update_drawable_geometry(struct loader_dri3_drawable *draw); #endif diff -Nru mesa-12.0.6/src/loader/loader.h mesa-17.0.7/src/loader/loader.h --- mesa-12.0.6/src/loader/loader.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/loader/loader.h 2017-06-01 10:37:10.000000000 +0000 @@ -33,9 +33,6 @@ /* Helpers to figure out driver and device name, eg. from pci-id, etc. */ -#define _LOADER_DRI (1 << 0) -#define _LOADER_GALLIUM (1 << 1) - int loader_open_device(const char *); @@ -43,7 +40,7 @@ loader_get_pci_id_for_fd(int fd, int *vendor_id, int *chip_id); char * -loader_get_driver_for_fd(int fd, unsigned driver_types); +loader_get_driver_for_fd(int fd); char * loader_get_device_name_for_fd(int fd); @@ -68,6 +65,8 @@ void loader_set_logger(void (*logger)(int level, const char *fmt, ...)); +char * +loader_get_extensions_name(const char *driver_name); #ifdef __cplusplus } diff -Nru mesa-12.0.6/src/loader/Makefile.am mesa-17.0.7/src/loader/Makefile.am --- mesa-12.0.6/src/loader/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/loader/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -31,8 +31,7 @@ -I$(top_srcdir)/src \ $(VISIBILITY_CFLAGS) \ $(XCB_DRI3_CFLAGS) \ - $(LIBDRM_CFLAGS) \ - $(LIBUDEV_CFLAGS) + $(LIBDRM_CFLAGS) libloader_la_CPPFLAGS = $(AM_CPPFLAGS) libloader_la_SOURCES = $(LOADER_C_FILES) @@ -40,13 +39,13 @@ if HAVE_DRICOMMON libloader_la_CPPFLAGS += \ - -I$(top_srcdir)/src/mesa/drivers/dri/common/ \ -I$(top_builddir)/src/mesa/drivers/dri/common/ \ + -I$(top_srcdir)/src/mesa/drivers/dri/common/ \ -I$(top_srcdir)/src/mesa/ \ -I$(top_srcdir)/src/mapi/ \ -DUSE_DRICONF - libloader_la_LIBADD += \ +libloader_la_LIBADD += \ $(top_builddir)/src/mesa/drivers/dri/common/libxmlconfig.la endif diff -Nru mesa-12.0.6/src/loader/Makefile.in mesa-17.0.7/src/loader/Makefile.in --- mesa-12.0.6/src/loader/Makefile.in 2017-01-24 01:41:54.000000000 +0000 +++ mesa-17.0.7/src/loader/Makefile.in 2017-06-01 10:37:23.000000000 +0000 @@ -111,8 +111,8 @@ host_triplet = @host@ target_triplet = @target@ @HAVE_DRICOMMON_TRUE@am__append_1 = \ -@HAVE_DRICOMMON_TRUE@ -I$(top_srcdir)/src/mesa/drivers/dri/common/ \ @HAVE_DRICOMMON_TRUE@ -I$(top_builddir)/src/mesa/drivers/dri/common/ \ +@HAVE_DRICOMMON_TRUE@ -I$(top_srcdir)/src/mesa/drivers/dri/common/ \ @HAVE_DRICOMMON_TRUE@ -I$(top_srcdir)/src/mesa/ \ @HAVE_DRICOMMON_TRUE@ -I$(top_srcdir)/src/mapi/ \ @HAVE_DRICOMMON_TRUE@ -DUSE_DRICONF @@ -232,6 +232,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -246,6 +248,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -275,10 +278,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -328,11 +332,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -372,8 +373,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -410,8 +409,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -420,7 +417,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -428,13 +424,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -463,6 +460,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -539,8 +537,7 @@ -I$(top_srcdir)/src \ $(VISIBILITY_CFLAGS) \ $(XCB_DRI3_CFLAGS) \ - $(LIBDRM_CFLAGS) \ - $(LIBUDEV_CFLAGS) + $(LIBDRM_CFLAGS) libloader_la_CPPFLAGS = $(AM_CPPFLAGS) $(am__append_1) libloader_la_SOURCES = $(LOADER_C_FILES) diff -Nru mesa-12.0.6/src/loader/pci_id_driver_map.c mesa-17.0.7/src/loader/pci_id_driver_map.c --- mesa-12.0.6/src/loader/pci_id_driver_map.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/loader/pci_id_driver_map.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,6 +25,7 @@ #ifdef HAVE_LIBDRM +#include #include #include @@ -45,7 +46,8 @@ is_nouveau_vieux(int fd) { int chipset = nouveau_chipset(fd); - return chipset > 0 && chipset < 0x30; + return (chipset > 0 && chipset < 0x30) || + (chipset < 0x40 && getenv("NOUVEAU_VIEUX") != NULL); } #else diff -Nru mesa-12.0.6/src/loader/pci_id_driver_map.h mesa-17.0.7/src/loader/pci_id_driver_map.h --- mesa-12.0.6/src/loader/pci_id_driver_map.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/loader/pci_id_driver_map.h 2017-06-01 10:37:10.000000000 +0000 @@ -72,20 +72,19 @@ const char *driver; const int *chip_ids; int num_chips_ids; - unsigned driver_types; int (*predicate)(int fd); } driver_map[] = { - { 0x8086, "i915", i915_chip_ids, ARRAY_SIZE(i915_chip_ids), _LOADER_DRI | _LOADER_GALLIUM }, - { 0x8086, "i965", i965_chip_ids, ARRAY_SIZE(i965_chip_ids), _LOADER_DRI | _LOADER_GALLIUM }, - { 0x1002, "radeon", r100_chip_ids, ARRAY_SIZE(r100_chip_ids), _LOADER_DRI }, - { 0x1002, "r200", r200_chip_ids, ARRAY_SIZE(r200_chip_ids), _LOADER_DRI }, - { 0x1002, "r300", r300_chip_ids, ARRAY_SIZE(r300_chip_ids), _LOADER_GALLIUM }, - { 0x1002, "r600", r600_chip_ids, ARRAY_SIZE(r600_chip_ids), _LOADER_GALLIUM }, - { 0x1002, "radeonsi", radeonsi_chip_ids, ARRAY_SIZE(radeonsi_chip_ids), _LOADER_GALLIUM}, - { 0x10de, "nouveau_vieux", NULL, -1, _LOADER_DRI, is_nouveau_vieux }, - { 0x10de, "nouveau", NULL, -1, _LOADER_GALLIUM }, - { 0x1af4, "virtio_gpu", virtio_gpu_chip_ids, ARRAY_SIZE(virtio_gpu_chip_ids), _LOADER_GALLIUM }, - { 0x15ad, "vmwgfx", vmwgfx_chip_ids, ARRAY_SIZE(vmwgfx_chip_ids), _LOADER_GALLIUM }, + { 0x8086, "i915", i915_chip_ids, ARRAY_SIZE(i915_chip_ids) }, + { 0x8086, "i965", i965_chip_ids, ARRAY_SIZE(i965_chip_ids) }, + { 0x1002, "radeon", r100_chip_ids, ARRAY_SIZE(r100_chip_ids) }, + { 0x1002, "r200", r200_chip_ids, ARRAY_SIZE(r200_chip_ids) }, + { 0x1002, "r300", r300_chip_ids, ARRAY_SIZE(r300_chip_ids) }, + { 0x1002, "r600", r600_chip_ids, ARRAY_SIZE(r600_chip_ids) }, + { 0x1002, "radeonsi", radeonsi_chip_ids, ARRAY_SIZE(radeonsi_chip_ids) }, + { 0x10de, "nouveau_vieux", NULL, -1, is_nouveau_vieux }, + { 0x10de, "nouveau", NULL, -1, }, + { 0x1af4, "virtio_gpu", virtio_gpu_chip_ids, ARRAY_SIZE(virtio_gpu_chip_ids) }, + { 0x15ad, "vmwgfx", vmwgfx_chip_ids, ARRAY_SIZE(vmwgfx_chip_ids) }, { 0x0000, NULL, NULL, 0 }, }; diff -Nru mesa-12.0.6/src/loader/SConscript mesa-17.0.7/src/loader/SConscript --- mesa-12.0.6/src/loader/SConscript 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/loader/SConscript 2017-06-01 10:37:10.000000000 +0000 @@ -8,9 +8,9 @@ '#include' ]) -if env['udev']: - env.PkgUseModules('UDEV') - env.Append(CPPDEFINES = ['HAVE_LIBUDEV']) +if env['drm']: + env.PkgUseModules('DRM') + env.Append(CPPDEFINES = ['HAVE_LIBDRM']) # parse Makefile.sources sources = env.ParseSourceList('Makefile.sources', 'LOADER_C_FILES') diff -Nru mesa-12.0.6/src/Makefile.am mesa-17.0.7/src/Makefile.am --- mesa-12.0.6/src/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -44,6 +44,7 @@ BUILT_SOURCES = git_sha1.h CLEANFILES = $(BUILT_SOURCES) +EXTRA_DIST = SUBDIRS = . gtest util mapi/glapi/gen mapi @@ -74,6 +75,10 @@ # include only conditionally ? SUBDIRS += compiler +if HAVE_AMD_DRIVERS +SUBDIRS += amd +endif + if HAVE_INTEL_DRIVERS SUBDIRS += intel endif @@ -107,16 +112,30 @@ SUBDIRS += egl endif +if HAVE_INTEL_DRIVERS +SUBDIRS += intel/tools +endif + +if HAVE_VULKAN_COMMON +SUBDIRS += vulkan/wsi +endif +EXTRA_DIST += vulkan/registry/vk.xml + ## Requires the i965 compiler (part of mesa) and wayland-drm if HAVE_INTEL_VULKAN SUBDIRS += intel/vulkan endif +# Requires wayland-drm +if HAVE_RADEON_VULKAN +SUBDIRS += amd/vulkan +endif + if HAVE_GALLIUM SUBDIRS += gallium endif -EXTRA_DIST = \ +EXTRA_DIST += \ getopt hgl SConscript \ $(top_srcdir)/include/GL/mesa_glinterop.h @@ -127,12 +146,15 @@ -I$(top_srcdir)/include/ \ -I$(top_srcdir)/src/mapi/ \ -I$(top_srcdir)/src/mesa/ \ + -I$(top_srcdir)/src/gallium/include \ + -I$(top_srcdir)/src/gallium/auxiliary \ $(DEFINES) noinst_LTLIBRARIES = libglsl_util.la libglsl_util_la_SOURCES = \ + mesa/main/extensions_table.c \ mesa/main/imports.c \ - mesa/program/prog_hash_table.c \ + mesa/program/prog_parameter.c \ mesa/program/symbol_table.c \ mesa/program/dummy_errors.c diff -Nru mesa-12.0.6/src/Makefile.in mesa-17.0.7/src/Makefile.in --- mesa-12.0.6/src/Makefile.in 2017-01-24 01:41:44.000000000 +0000 +++ mesa-17.0.7/src/Makefile.in 2017-06-01 10:37:19.000000000 +0000 @@ -112,15 +112,21 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -@HAVE_INTEL_DRIVERS_TRUE@am__append_1 = intel -@NEED_OPENGL_COMMON_TRUE@am__append_2 = mesa -@HAVE_DRI_GLX_TRUE@am__append_3 = glx -@HAVE_PLATFORM_WAYLAND_TRUE@am__append_4 = egl/wayland/wayland-drm -@HAVE_GBM_TRUE@am__append_5 = gbm -@HAVE_PLATFORM_WAYLAND_TRUE@am__append_6 = egl/wayland/wayland-egl -@HAVE_EGL_TRUE@am__append_7 = egl -@HAVE_INTEL_VULKAN_TRUE@am__append_8 = intel/vulkan -@HAVE_GALLIUM_TRUE@am__append_9 = gallium +@HAVE_AMD_DRIVERS_TRUE@am__append_1 = amd +@HAVE_INTEL_DRIVERS_TRUE@am__append_2 = intel +@NEED_OPENGL_COMMON_TRUE@am__append_3 = mesa +@HAVE_DRI_GLX_TRUE@am__append_4 = glx +@HAVE_PLATFORM_WAYLAND_TRUE@am__append_5 = egl/wayland/wayland-drm +@HAVE_GBM_TRUE@am__append_6 = gbm +@HAVE_PLATFORM_WAYLAND_TRUE@am__append_7 = egl/wayland/wayland-egl +@HAVE_EGL_TRUE@am__append_8 = egl +@HAVE_INTEL_DRIVERS_TRUE@am__append_9 = intel/tools +@HAVE_VULKAN_COMMON_TRUE@am__append_10 = vulkan/wsi +@HAVE_INTEL_VULKAN_TRUE@am__append_11 = intel/vulkan + +# Requires wayland-drm +@HAVE_RADEON_VULKAN_TRUE@am__append_12 = amd/vulkan +@HAVE_GALLIUM_TRUE@am__append_13 = gallium subdir = src ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps = $(top_srcdir)/m4/ax_check_gnu_make.m4 \ @@ -144,9 +150,9 @@ LTLIBRARIES = $(noinst_LTLIBRARIES) libglsl_util_la_LIBADD = am__dirstamp = $(am__leading_dot)dirstamp -am_libglsl_util_la_OBJECTS = mesa/main/imports.lo \ - mesa/program/prog_hash_table.lo mesa/program/symbol_table.lo \ - mesa/program/dummy_errors.lo +am_libglsl_util_la_OBJECTS = mesa/main/extensions_table.lo \ + mesa/main/imports.lo mesa/program/prog_parameter.lo \ + mesa/program/symbol_table.lo mesa/program/dummy_errors.lo libglsl_util_la_OBJECTS = $(am_libglsl_util_la_OBJECTS) AM_V_lt = $(am__v_lt_@AM_V@) am__v_lt_ = $(am__v_lt_@AM_DEFAULT_V@) @@ -267,9 +273,10 @@ done | $(am__uniquify_input)` ETAGS = etags CTAGS = ctags -DIST_SUBDIRS = . gtest util mapi/glapi/gen mapi compiler intel mesa \ - loader glx egl/wayland/wayland-drm gbm egl/wayland/wayland-egl \ - egl intel/vulkan gallium +DIST_SUBDIRS = . gtest util mapi/glapi/gen mapi compiler amd intel \ + mesa loader glx egl/wayland/wayland-drm gbm \ + egl/wayland/wayland-egl egl intel/tools vulkan/wsi \ + intel/vulkan amd/vulkan gallium am__DIST_COMMON = $(srcdir)/Makefile.in $(top_srcdir)/bin/depcomp DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST) am__relativize = \ @@ -302,6 +309,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -316,6 +325,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -345,10 +355,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -398,11 +409,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -442,8 +450,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -480,8 +486,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -490,7 +494,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -498,13 +501,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -533,6 +537,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -597,12 +602,15 @@ top_srcdir = @top_srcdir@ BUILT_SOURCES = git_sha1.h CLEANFILES = $(BUILT_SOURCES) +EXTRA_DIST = vulkan/registry/vk.xml getopt hgl SConscript \ + $(top_srcdir)/include/GL/mesa_glinterop.h # include only conditionally ? SUBDIRS = . gtest util mapi/glapi/gen mapi compiler $(am__append_1) \ - $(am__append_2) loader $(am__append_3) $(am__append_4) \ + $(am__append_2) $(am__append_3) loader $(am__append_4) \ $(am__append_5) $(am__append_6) $(am__append_7) \ - $(am__append_8) $(am__append_9) + $(am__append_8) $(am__append_9) $(am__append_10) \ + $(am__append_11) $(am__append_12) $(am__append_13) @HAVE_OPENGL_TRUE@gldir = $(includedir)/GL @HAVE_OPENGL_TRUE@gl_HEADERS = \ @HAVE_OPENGL_TRUE@ $(top_srcdir)/include/GL/gl.h \ @@ -620,22 +628,21 @@ @HAVE_GLX_TRUE@pkgconfig_DATA = mesa/gl.pc @HAVE_COMMON_OSMESA_TRUE@osmesadir = $(includedir)/GL @HAVE_COMMON_OSMESA_TRUE@osmesa_HEADERS = $(top_srcdir)/include/GL/osmesa.h -EXTRA_DIST = \ - getopt hgl SConscript \ - $(top_srcdir)/include/GL/mesa_glinterop.h - AM_CFLAGS = $(VISIBILITY_CFLAGS) AM_CXXFLAGS = $(VISIBILITY_CXXFLAGS) AM_CPPFLAGS = \ -I$(top_srcdir)/include/ \ -I$(top_srcdir)/src/mapi/ \ -I$(top_srcdir)/src/mesa/ \ + -I$(top_srcdir)/src/gallium/include \ + -I$(top_srcdir)/src/gallium/auxiliary \ $(DEFINES) noinst_LTLIBRARIES = libglsl_util.la libglsl_util_la_SOURCES = \ + mesa/main/extensions_table.c \ mesa/main/imports.c \ - mesa/program/prog_hash_table.c \ + mesa/program/prog_parameter.c \ mesa/program/symbol_table.c \ mesa/program/dummy_errors.c @@ -690,6 +697,8 @@ mesa/main/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) mesa/main/$(DEPDIR) @: > mesa/main/$(DEPDIR)/$(am__dirstamp) +mesa/main/extensions_table.lo: mesa/main/$(am__dirstamp) \ + mesa/main/$(DEPDIR)/$(am__dirstamp) mesa/main/imports.lo: mesa/main/$(am__dirstamp) \ mesa/main/$(DEPDIR)/$(am__dirstamp) mesa/program/$(am__dirstamp): @@ -698,7 +707,7 @@ mesa/program/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) mesa/program/$(DEPDIR) @: > mesa/program/$(DEPDIR)/$(am__dirstamp) -mesa/program/prog_hash_table.lo: mesa/program/$(am__dirstamp) \ +mesa/program/prog_parameter.lo: mesa/program/$(am__dirstamp) \ mesa/program/$(DEPDIR)/$(am__dirstamp) mesa/program/symbol_table.lo: mesa/program/$(am__dirstamp) \ mesa/program/$(DEPDIR)/$(am__dirstamp) @@ -718,9 +727,10 @@ distclean-compile: -rm -f *.tab.c +@AMDEP_TRUE@@am__include@ @am__quote@mesa/main/$(DEPDIR)/extensions_table.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@mesa/main/$(DEPDIR)/imports.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@mesa/program/$(DEPDIR)/dummy_errors.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@mesa/program/$(DEPDIR)/prog_hash_table.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@mesa/program/$(DEPDIR)/prog_parameter.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@mesa/program/$(DEPDIR)/symbol_table.Plo@am__quote@ .c.o: diff -Nru mesa-12.0.6/src/mapi/entry_x86-64_tls.h mesa-17.0.7/src/mapi/entry_x86-64_tls.h --- mesa-12.0.6/src/mapi/entry_x86-64_tls.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mapi/entry_x86-64_tls.h 2017-06-01 10:37:10.000000000 +0000 @@ -41,11 +41,23 @@ ".balign 32\n" \ func ":" +#ifndef __ILP32__ + #define STUB_ASM_CODE(slot) \ "movq " ENTRY_CURRENT_TABLE "@GOTTPOFF(%rip), %rax\n\t" \ "movq %fs:(%rax), %r11\n\t" \ "jmp *(8 * " slot ")(%r11)" +#else + +#define STUB_ASM_CODE(slot) \ + "movq " ENTRY_CURRENT_TABLE "@GOTTPOFF(%rip), %rax\n\t" \ + "movl %fs:(%rax), %r11d\n\t" \ + "movl 4*" slot "(%r11d), %r11d\n\t" \ + "jmp *%r11" + +#endif + #define MAPI_TMP_STUB_ASM_GCC #include "mapi_tmp.h" @@ -72,19 +84,32 @@ entry_patch(mapi_func entry, int slot) { char *code = (char *) entry; - *((unsigned int *) (code + 12)) = slot * sizeof(mapi_func); + int offset = 12; +#ifdef __ILP32__ + offset = 13; +#endif + *((unsigned int *) (code + offset)) = slot * sizeof(mapi_func); } mapi_func entry_generate(int slot) { - const char code_templ[16] = { + const char code_templ[] = { +#ifndef __ILP32__ /* movq %fs:0, %r11 */ 0x64, 0x4c, 0x8b, 0x1c, 0x25, 0x00, 0x00, 0x00, 0x00, /* jmp *0x1234(%r11) */ 0x41, 0xff, 0xa3, 0x34, 0x12, 0x00, 0x00, +#else + /* movl %fs:0, %r11d */ + 0x64, 0x44, 0x8b, 0x1c, 0x25, 0x00, 0x00, 0x00, 0x00, + /* movl 0x1234(%r11d), %r11d */ + 0x67, 0x45, 0x8b, 0x9b, 0x34, 0x12, 0x00, 0x00, + /* jmp *%r11 */ + 0x41, 0xff, 0xe3, +#endif }; - unsigned long addr; + unsigned long long addr; char *code; mapi_func entry; diff -Nru mesa-12.0.6/src/mapi/es1api/glapi_mapi_tmp.h mesa-17.0.7/src/mapi/es1api/glapi_mapi_tmp.h --- mesa-12.0.6/src/mapi/es1api/glapi_mapi_tmp.h 2017-01-24 01:43:10.000000000 +0000 +++ mesa-17.0.7/src/mapi/es1api/glapi_mapi_tmp.h 2017-06-01 10:37:56.000000000 +0000 @@ -924,375 +924,379 @@ void APIENTRY gl_dispatch_stub_909(GLuint first, GLsizei count, const GLuint *samplers); void APIENTRY gl_dispatch_stub_910(GLuint first, GLsizei count, const GLuint *textures); void APIENTRY gl_dispatch_stub_911(GLuint first, GLsizei count, const GLuint *buffers, const GLintptr *offsets, const GLsizei *strides); -void APIENTRY gl_dispatch_stub_912(GLenum mode, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); -void APIENTRY gl_dispatch_stub_913(GLenum mode, GLenum type, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); -void APIENTRY gl_dispatch_stub_914(GLenum origin, GLenum depth); -void APIENTRY gl_dispatch_stub_915(GLuint unit, GLuint texture); -void APIENTRY gl_dispatch_stub_916(GLuint readFramebuffer, GLuint drawFramebuffer, GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter); -GLenum APIENTRY gl_dispatch_stub_917(GLuint framebuffer, GLenum target); -void APIENTRY gl_dispatch_stub_918(GLuint buffer, GLenum internalformat, GLenum format, GLenum type, const GLvoid *data); -void APIENTRY gl_dispatch_stub_919(GLuint buffer, GLenum internalformat, GLintptr offset, GLsizeiptr size, GLenum format, GLenum type, const GLvoid *data); -void APIENTRY gl_dispatch_stub_920(GLuint framebuffer, GLenum buffer, GLint drawbuffer, GLfloat depth, GLint stencil); -void APIENTRY gl_dispatch_stub_921(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLfloat *value); -void APIENTRY gl_dispatch_stub_922(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLint *value); -void APIENTRY gl_dispatch_stub_923(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLuint *value); -void APIENTRY gl_dispatch_stub_924(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLsizei imageSize, const GLvoid *data); -void APIENTRY gl_dispatch_stub_925(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const GLvoid *data); -void APIENTRY gl_dispatch_stub_926(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid *data); -void APIENTRY gl_dispatch_stub_927(GLuint readBuffer, GLuint writeBuffer, GLintptr readOffset, GLintptr writeOffset, GLsizeiptr size); -void APIENTRY gl_dispatch_stub_928(GLuint texture, GLint level, GLint xoffset, GLint x, GLint y, GLsizei width); -void APIENTRY gl_dispatch_stub_929(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height); -void APIENTRY gl_dispatch_stub_930(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height); -void APIENTRY gl_dispatch_stub_931(GLsizei n, GLuint *buffers); -void APIENTRY gl_dispatch_stub_932(GLsizei n, GLuint *framebuffers); -void APIENTRY gl_dispatch_stub_933(GLsizei n, GLuint *pipelines); -void APIENTRY gl_dispatch_stub_934(GLenum target, GLsizei n, GLuint *ids); -void APIENTRY gl_dispatch_stub_935(GLsizei n, GLuint *renderbuffers); -void APIENTRY gl_dispatch_stub_936(GLsizei n, GLuint *samplers); -void APIENTRY gl_dispatch_stub_937(GLenum target, GLsizei n, GLuint *textures); -void APIENTRY gl_dispatch_stub_938(GLsizei n, GLuint *ids); -void APIENTRY gl_dispatch_stub_939(GLsizei n, GLuint *arrays); -void APIENTRY gl_dispatch_stub_940(GLuint vaobj, GLuint index); +void APIENTRY gl_dispatch_stub_912(GLuint num_groups_x, GLuint num_groups_y, GLuint num_groups_z, GLuint group_size_x, GLuint group_size_y, GLuint group_size_z); +void APIENTRY gl_dispatch_stub_913(GLenum mode, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); +void APIENTRY gl_dispatch_stub_914(GLenum mode, GLenum type, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); +void APIENTRY gl_dispatch_stub_915(GLenum origin, GLenum depth); +void APIENTRY gl_dispatch_stub_916(GLuint unit, GLuint texture); +void APIENTRY gl_dispatch_stub_917(GLuint readFramebuffer, GLuint drawFramebuffer, GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter); +GLenum APIENTRY gl_dispatch_stub_918(GLuint framebuffer, GLenum target); +void APIENTRY gl_dispatch_stub_919(GLuint buffer, GLenum internalformat, GLenum format, GLenum type, const GLvoid *data); +void APIENTRY gl_dispatch_stub_920(GLuint buffer, GLenum internalformat, GLintptr offset, GLsizeiptr size, GLenum format, GLenum type, const GLvoid *data); +void APIENTRY gl_dispatch_stub_921(GLuint framebuffer, GLenum buffer, GLint drawbuffer, GLfloat depth, GLint stencil); +void APIENTRY gl_dispatch_stub_922(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLfloat *value); +void APIENTRY gl_dispatch_stub_923(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLint *value); +void APIENTRY gl_dispatch_stub_924(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLuint *value); +void APIENTRY gl_dispatch_stub_925(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLsizei imageSize, const GLvoid *data); +void APIENTRY gl_dispatch_stub_926(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const GLvoid *data); +void APIENTRY gl_dispatch_stub_927(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid *data); +void APIENTRY gl_dispatch_stub_928(GLuint readBuffer, GLuint writeBuffer, GLintptr readOffset, GLintptr writeOffset, GLsizeiptr size); +void APIENTRY gl_dispatch_stub_929(GLuint texture, GLint level, GLint xoffset, GLint x, GLint y, GLsizei width); +void APIENTRY gl_dispatch_stub_930(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height); +void APIENTRY gl_dispatch_stub_931(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height); +void APIENTRY gl_dispatch_stub_932(GLsizei n, GLuint *buffers); +void APIENTRY gl_dispatch_stub_933(GLsizei n, GLuint *framebuffers); +void APIENTRY gl_dispatch_stub_934(GLsizei n, GLuint *pipelines); +void APIENTRY gl_dispatch_stub_935(GLenum target, GLsizei n, GLuint *ids); +void APIENTRY gl_dispatch_stub_936(GLsizei n, GLuint *renderbuffers); +void APIENTRY gl_dispatch_stub_937(GLsizei n, GLuint *samplers); +void APIENTRY gl_dispatch_stub_938(GLenum target, GLsizei n, GLuint *textures); +void APIENTRY gl_dispatch_stub_939(GLsizei n, GLuint *ids); +void APIENTRY gl_dispatch_stub_940(GLsizei n, GLuint *arrays); void APIENTRY gl_dispatch_stub_941(GLuint vaobj, GLuint index); -void APIENTRY gl_dispatch_stub_942(GLuint buffer, GLintptr offset, GLsizeiptr length); -void APIENTRY gl_dispatch_stub_943(GLuint texture); -void APIENTRY gl_dispatch_stub_944(GLuint texture, GLint level, GLsizei bufSize, GLvoid *pixels); -void APIENTRY gl_dispatch_stub_945(GLuint buffer, GLenum pname, GLint64 *params); -void APIENTRY gl_dispatch_stub_946(GLuint buffer, GLenum pname, GLint *params); -void APIENTRY gl_dispatch_stub_947(GLuint buffer, GLenum pname, GLvoid **params); -void APIENTRY gl_dispatch_stub_948(GLuint buffer, GLintptr offset, GLsizeiptr size, GLvoid *data); -void APIENTRY gl_dispatch_stub_949(GLuint framebuffer, GLenum attachment, GLenum pname, GLint *params); -void APIENTRY gl_dispatch_stub_950(GLuint framebuffer, GLenum pname, GLint *param); -void APIENTRY gl_dispatch_stub_951(GLuint renderbuffer, GLenum pname, GLint *params); -void APIENTRY gl_dispatch_stub_952(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); +void APIENTRY gl_dispatch_stub_942(GLuint vaobj, GLuint index); +void APIENTRY gl_dispatch_stub_943(GLuint buffer, GLintptr offset, GLsizeiptr length); +void APIENTRY gl_dispatch_stub_944(GLuint texture); +void APIENTRY gl_dispatch_stub_945(GLuint texture, GLint level, GLsizei bufSize, GLvoid *pixels); +void APIENTRY gl_dispatch_stub_946(GLuint buffer, GLenum pname, GLint64 *params); +void APIENTRY gl_dispatch_stub_947(GLuint buffer, GLenum pname, GLint *params); +void APIENTRY gl_dispatch_stub_948(GLuint buffer, GLenum pname, GLvoid **params); +void APIENTRY gl_dispatch_stub_949(GLuint buffer, GLintptr offset, GLsizeiptr size, GLvoid *data); +void APIENTRY gl_dispatch_stub_950(GLuint framebuffer, GLenum attachment, GLenum pname, GLint *params); +void APIENTRY gl_dispatch_stub_951(GLuint framebuffer, GLenum pname, GLint *param); +void APIENTRY gl_dispatch_stub_952(GLuint renderbuffer, GLenum pname, GLint *params); void APIENTRY gl_dispatch_stub_953(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); void APIENTRY gl_dispatch_stub_954(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); void APIENTRY gl_dispatch_stub_955(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); -void APIENTRY gl_dispatch_stub_956(GLuint texture, GLint level, GLenum format, GLenum type, GLsizei bufSize, GLvoid *pixels); -void APIENTRY gl_dispatch_stub_957(GLuint texture, GLint level, GLenum pname, GLfloat *params); -void APIENTRY gl_dispatch_stub_958(GLuint texture, GLint level, GLenum pname, GLint *params); -void APIENTRY gl_dispatch_stub_959(GLuint texture, GLenum pname, GLint *params); -void APIENTRY gl_dispatch_stub_960(GLuint texture, GLenum pname, GLuint *params); -void APIENTRY gl_dispatch_stub_961(GLuint texture, GLenum pname, GLfloat *params); -void APIENTRY gl_dispatch_stub_962(GLuint texture, GLenum pname, GLint *params); -void APIENTRY gl_dispatch_stub_963(GLuint xfb, GLenum pname, GLuint index, GLint64 *param); -void APIENTRY gl_dispatch_stub_964(GLuint xfb, GLenum pname, GLuint index, GLint *param); -void APIENTRY gl_dispatch_stub_965(GLuint xfb, GLenum pname, GLint *param); -void APIENTRY gl_dispatch_stub_966(GLuint vaobj, GLuint index, GLenum pname, GLint64 *param); -void APIENTRY gl_dispatch_stub_967(GLuint vaobj, GLuint index, GLenum pname, GLint *param); -void APIENTRY gl_dispatch_stub_968(GLuint vaobj, GLenum pname, GLint *param); -void APIENTRY gl_dispatch_stub_969(GLuint framebuffer, GLsizei numAttachments, const GLenum *attachments); -void APIENTRY gl_dispatch_stub_970(GLuint framebuffer, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height); -GLvoid * APIENTRY gl_dispatch_stub_971(GLuint buffer, GLenum access); -GLvoid * APIENTRY gl_dispatch_stub_972(GLuint buffer, GLintptr offset, GLsizeiptr length, GLbitfield access); -void APIENTRY gl_dispatch_stub_973(GLuint buffer, GLsizeiptr size, const GLvoid *data, GLenum usage); -void APIENTRY gl_dispatch_stub_974(GLuint buffer, GLsizeiptr size, const GLvoid *data, GLbitfield flags); -void APIENTRY gl_dispatch_stub_975(GLuint buffer, GLintptr offset, GLsizeiptr size, const GLvoid *data); -void APIENTRY gl_dispatch_stub_976(GLuint framebuffer, GLenum buf); -void APIENTRY gl_dispatch_stub_977(GLuint framebuffer, GLsizei n, const GLenum *bufs); -void APIENTRY gl_dispatch_stub_978(GLuint framebuffer, GLenum pname, GLint param); -void APIENTRY gl_dispatch_stub_979(GLuint framebuffer, GLenum buf); -void APIENTRY gl_dispatch_stub_980(GLuint framebuffer, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer); -void APIENTRY gl_dispatch_stub_981(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level); -void APIENTRY gl_dispatch_stub_982(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level, GLint layer); -void APIENTRY gl_dispatch_stub_983(GLuint renderbuffer, GLenum internalformat, GLsizei width, GLsizei height); -void APIENTRY gl_dispatch_stub_984(GLuint renderbuffer, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height); -void APIENTRY gl_dispatch_stub_985(GLuint texture, GLenum internalformat, GLuint buffer); -void APIENTRY gl_dispatch_stub_986(GLuint texture, GLenum internalformat, GLuint buffer, GLintptr offset, GLsizeiptr size); -void APIENTRY gl_dispatch_stub_987(GLuint texture, GLenum pname, const GLint *params); -void APIENTRY gl_dispatch_stub_988(GLuint texture, GLenum pname, const GLuint *params); -void APIENTRY gl_dispatch_stub_989(GLuint texture, GLenum pname, GLfloat param); -void APIENTRY gl_dispatch_stub_990(GLuint texture, GLenum pname, const GLfloat *param); -void APIENTRY gl_dispatch_stub_991(GLuint texture, GLenum pname, GLint param); -void APIENTRY gl_dispatch_stub_992(GLuint texture, GLenum pname, const GLint *param); -void APIENTRY gl_dispatch_stub_993(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width); -void APIENTRY gl_dispatch_stub_994(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height); -void APIENTRY gl_dispatch_stub_995(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations); -void APIENTRY gl_dispatch_stub_996(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth); -void APIENTRY gl_dispatch_stub_997(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedsamplelocations); -void APIENTRY gl_dispatch_stub_998(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLenum type, const GLvoid *pixels); -void APIENTRY gl_dispatch_stub_999(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid *pixels); -void APIENTRY gl_dispatch_stub_1000(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid *pixels); -void APIENTRY gl_dispatch_stub_1001(GLuint xfb, GLuint index, GLuint buffer); -void APIENTRY gl_dispatch_stub_1002(GLuint xfb, GLuint index, GLuint buffer, GLintptr offset, GLsizeiptr size); -GLboolean APIENTRY gl_dispatch_stub_1003(GLuint buffer); -void APIENTRY gl_dispatch_stub_1004(GLuint vaobj, GLuint attribindex, GLuint bindingindex); -void APIENTRY gl_dispatch_stub_1005(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLboolean normalized, GLuint relativeoffset); -void APIENTRY gl_dispatch_stub_1006(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset); +void APIENTRY gl_dispatch_stub_956(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); +void APIENTRY gl_dispatch_stub_957(GLuint texture, GLint level, GLenum format, GLenum type, GLsizei bufSize, GLvoid *pixels); +void APIENTRY gl_dispatch_stub_958(GLuint texture, GLint level, GLenum pname, GLfloat *params); +void APIENTRY gl_dispatch_stub_959(GLuint texture, GLint level, GLenum pname, GLint *params); +void APIENTRY gl_dispatch_stub_960(GLuint texture, GLenum pname, GLint *params); +void APIENTRY gl_dispatch_stub_961(GLuint texture, GLenum pname, GLuint *params); +void APIENTRY gl_dispatch_stub_962(GLuint texture, GLenum pname, GLfloat *params); +void APIENTRY gl_dispatch_stub_963(GLuint texture, GLenum pname, GLint *params); +void APIENTRY gl_dispatch_stub_964(GLuint xfb, GLenum pname, GLuint index, GLint64 *param); +void APIENTRY gl_dispatch_stub_965(GLuint xfb, GLenum pname, GLuint index, GLint *param); +void APIENTRY gl_dispatch_stub_966(GLuint xfb, GLenum pname, GLint *param); +void APIENTRY gl_dispatch_stub_967(GLuint vaobj, GLuint index, GLenum pname, GLint64 *param); +void APIENTRY gl_dispatch_stub_968(GLuint vaobj, GLuint index, GLenum pname, GLint *param); +void APIENTRY gl_dispatch_stub_969(GLuint vaobj, GLenum pname, GLint *param); +void APIENTRY gl_dispatch_stub_970(GLuint framebuffer, GLsizei numAttachments, const GLenum *attachments); +void APIENTRY gl_dispatch_stub_971(GLuint framebuffer, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height); +GLvoid * APIENTRY gl_dispatch_stub_972(GLuint buffer, GLenum access); +GLvoid * APIENTRY gl_dispatch_stub_973(GLuint buffer, GLintptr offset, GLsizeiptr length, GLbitfield access); +void APIENTRY gl_dispatch_stub_974(GLuint buffer, GLsizeiptr size, const GLvoid *data, GLenum usage); +void APIENTRY gl_dispatch_stub_975(GLuint buffer, GLsizeiptr size, const GLvoid *data, GLbitfield flags); +void APIENTRY gl_dispatch_stub_976(GLuint buffer, GLintptr offset, GLsizeiptr size, const GLvoid *data); +void APIENTRY gl_dispatch_stub_977(GLuint framebuffer, GLenum buf); +void APIENTRY gl_dispatch_stub_978(GLuint framebuffer, GLsizei n, const GLenum *bufs); +void APIENTRY gl_dispatch_stub_979(GLuint framebuffer, GLenum pname, GLint param); +void APIENTRY gl_dispatch_stub_980(GLuint framebuffer, GLenum buf); +void APIENTRY gl_dispatch_stub_981(GLuint framebuffer, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer); +void APIENTRY gl_dispatch_stub_982(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level); +void APIENTRY gl_dispatch_stub_983(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level, GLint layer); +void APIENTRY gl_dispatch_stub_984(GLuint renderbuffer, GLenum internalformat, GLsizei width, GLsizei height); +void APIENTRY gl_dispatch_stub_985(GLuint renderbuffer, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height); +void APIENTRY gl_dispatch_stub_986(GLuint texture, GLenum internalformat, GLuint buffer); +void APIENTRY gl_dispatch_stub_987(GLuint texture, GLenum internalformat, GLuint buffer, GLintptr offset, GLsizeiptr size); +void APIENTRY gl_dispatch_stub_988(GLuint texture, GLenum pname, const GLint *params); +void APIENTRY gl_dispatch_stub_989(GLuint texture, GLenum pname, const GLuint *params); +void APIENTRY gl_dispatch_stub_990(GLuint texture, GLenum pname, GLfloat param); +void APIENTRY gl_dispatch_stub_991(GLuint texture, GLenum pname, const GLfloat *param); +void APIENTRY gl_dispatch_stub_992(GLuint texture, GLenum pname, GLint param); +void APIENTRY gl_dispatch_stub_993(GLuint texture, GLenum pname, const GLint *param); +void APIENTRY gl_dispatch_stub_994(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width); +void APIENTRY gl_dispatch_stub_995(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height); +void APIENTRY gl_dispatch_stub_996(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations); +void APIENTRY gl_dispatch_stub_997(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth); +void APIENTRY gl_dispatch_stub_998(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedsamplelocations); +void APIENTRY gl_dispatch_stub_999(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLenum type, const GLvoid *pixels); +void APIENTRY gl_dispatch_stub_1000(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid *pixels); +void APIENTRY gl_dispatch_stub_1001(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid *pixels); +void APIENTRY gl_dispatch_stub_1002(GLuint xfb, GLuint index, GLuint buffer); +void APIENTRY gl_dispatch_stub_1003(GLuint xfb, GLuint index, GLuint buffer, GLintptr offset, GLsizeiptr size); +GLboolean APIENTRY gl_dispatch_stub_1004(GLuint buffer); +void APIENTRY gl_dispatch_stub_1005(GLuint vaobj, GLuint attribindex, GLuint bindingindex); +void APIENTRY gl_dispatch_stub_1006(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLboolean normalized, GLuint relativeoffset); void APIENTRY gl_dispatch_stub_1007(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset); -void APIENTRY gl_dispatch_stub_1008(GLuint vaobj, GLuint bindingindex, GLuint divisor); -void APIENTRY gl_dispatch_stub_1009(GLuint vaobj, GLuint buffer); -void APIENTRY gl_dispatch_stub_1010(GLuint vaobj, GLuint bindingindex, GLuint buffer, GLintptr offset, GLsizei stride); -void APIENTRY gl_dispatch_stub_1011(GLuint vaobj, GLuint first, GLsizei count, const GLuint *buffers, const GLintptr *offsets, const GLsizei *strides); -void APIENTRY gl_dispatch_stub_1012(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLsizei bufSize, GLvoid *pixels); -void APIENTRY gl_dispatch_stub_1013(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, GLsizei bufSize, GLvoid *pixels); -void APIENTRY gl_dispatch_stub_1014(GLuint buffer); -void APIENTRY gl_dispatch_stub_1015(GLuint buffer, GLintptr offset, GLsizeiptr length); -void APIENTRY gl_dispatch_stub_1016(GLenum target, GLsizei numAttachments, const GLenum *attachments); -void APIENTRY gl_dispatch_stub_1017(GLenum target, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height); -void APIENTRY gl_dispatch_stub_1018(GLuint texture, GLint level); -void APIENTRY gl_dispatch_stub_1019(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth); -void APIENTRY gl_dispatch_stub_1020(GLfloat factor, GLfloat bias); -void APIENTRY gl_dispatch_stub_1021(GLfloat x, GLfloat y, GLfloat z, GLfloat width, GLfloat height); -void APIENTRY gl_dispatch_stub_1022(const GLfloat *coords); -void APIENTRY gl_dispatch_stub_1023(GLint x, GLint y, GLint z, GLint width, GLint height); -void APIENTRY gl_dispatch_stub_1024(const GLint *coords); -void APIENTRY gl_dispatch_stub_1025(GLshort x, GLshort y, GLshort z, GLshort width, GLshort height); -void APIENTRY gl_dispatch_stub_1026(const GLshort *coords); -void APIENTRY gl_dispatch_stub_1027(GLfixed x, GLfixed y, GLfixed z, GLfixed width, GLfixed height); -void APIENTRY gl_dispatch_stub_1028(const GLfixed *coords); +void APIENTRY gl_dispatch_stub_1008(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset); +void APIENTRY gl_dispatch_stub_1009(GLuint vaobj, GLuint bindingindex, GLuint divisor); +void APIENTRY gl_dispatch_stub_1010(GLuint vaobj, GLuint buffer); +void APIENTRY gl_dispatch_stub_1011(GLuint vaobj, GLuint bindingindex, GLuint buffer, GLintptr offset, GLsizei stride); +void APIENTRY gl_dispatch_stub_1012(GLuint vaobj, GLuint first, GLsizei count, const GLuint *buffers, const GLintptr *offsets, const GLsizei *strides); +void APIENTRY gl_dispatch_stub_1013(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLsizei bufSize, GLvoid *pixels); +void APIENTRY gl_dispatch_stub_1014(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, GLsizei bufSize, GLvoid *pixels); +void APIENTRY gl_dispatch_stub_1015(GLuint buffer); +void APIENTRY gl_dispatch_stub_1016(GLuint buffer, GLintptr offset, GLsizeiptr length); +void APIENTRY gl_dispatch_stub_1017(GLenum target, GLsizei numAttachments, const GLenum *attachments); +void APIENTRY gl_dispatch_stub_1018(GLenum target, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height); +void APIENTRY gl_dispatch_stub_1019(GLuint texture, GLint level); +void APIENTRY gl_dispatch_stub_1020(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth); +void APIENTRY gl_dispatch_stub_1021(GLfloat factor, GLfloat bias); +void APIENTRY gl_dispatch_stub_1022(GLfloat x, GLfloat y, GLfloat z, GLfloat width, GLfloat height); +void APIENTRY gl_dispatch_stub_1023(const GLfloat *coords); +void APIENTRY gl_dispatch_stub_1024(GLint x, GLint y, GLint z, GLint width, GLint height); +void APIENTRY gl_dispatch_stub_1025(const GLint *coords); +void APIENTRY gl_dispatch_stub_1026(GLshort x, GLshort y, GLshort z, GLshort width, GLshort height); +void APIENTRY gl_dispatch_stub_1027(const GLshort *coords); +void APIENTRY gl_dispatch_stub_1028(GLfixed x, GLfixed y, GLfixed z, GLfixed width, GLfixed height); +void APIENTRY gl_dispatch_stub_1029(const GLfixed *coords); GLAPI void APIENTRY glPointSizePointerOES(GLenum type, GLsizei stride, const GLvoid *pointer); -GLbitfield APIENTRY gl_dispatch_stub_1030(GLfixed *mantissa, GLint *exponent); -void APIENTRY gl_dispatch_stub_1031(GLclampf value, GLboolean invert); -void APIENTRY gl_dispatch_stub_1032(GLenum pattern); -void APIENTRY gl_dispatch_stub_1033(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); -void APIENTRY gl_dispatch_stub_1034(GLsizei stride, GLsizei count, const GLboolean *pointer); -void APIENTRY gl_dispatch_stub_1035(GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); +GLbitfield APIENTRY gl_dispatch_stub_1031(GLfixed *mantissa, GLint *exponent); +void APIENTRY gl_dispatch_stub_1032(GLclampf value, GLboolean invert); +void APIENTRY gl_dispatch_stub_1033(GLenum pattern); +void APIENTRY gl_dispatch_stub_1034(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); +void APIENTRY gl_dispatch_stub_1035(GLsizei stride, GLsizei count, const GLboolean *pointer); void APIENTRY gl_dispatch_stub_1036(GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); -void APIENTRY gl_dispatch_stub_1037(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); +void APIENTRY gl_dispatch_stub_1037(GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); void APIENTRY gl_dispatch_stub_1038(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); -void APIENTRY gl_dispatch_stub_1039(GLenum target, GLsizei numAttachments, const GLenum *attachments); -void APIENTRY gl_dispatch_stub_1040(GLuint pipeline, GLuint program); -void APIENTRY gl_dispatch_stub_1041(GLuint pipeline); -GLuint APIENTRY gl_dispatch_stub_1042(GLenum type, GLsizei count, const GLchar * const *strings); -void APIENTRY gl_dispatch_stub_1043(GLsizei n, const GLuint *pipelines); -void APIENTRY gl_dispatch_stub_1044(GLsizei n, GLuint *pipelines); -void APIENTRY gl_dispatch_stub_1045(GLuint pipeline, GLsizei bufSize, GLsizei *length, GLchar *infoLog); -void APIENTRY gl_dispatch_stub_1046(GLuint pipeline, GLenum pname, GLint *params); -GLboolean APIENTRY gl_dispatch_stub_1047(GLuint pipeline); -void APIENTRY gl_dispatch_stub_1048(GLint first, GLsizei count); -void APIENTRY gl_dispatch_stub_1049(GLuint program, GLint location, GLdouble x); -void APIENTRY gl_dispatch_stub_1050(GLuint program, GLint location, GLsizei count, const GLdouble *value); -void APIENTRY gl_dispatch_stub_1051(GLuint program, GLint location, GLfloat x); -void APIENTRY gl_dispatch_stub_1052(GLuint program, GLint location, GLsizei count, const GLfloat *value); -void APIENTRY gl_dispatch_stub_1053(GLuint program, GLint location, GLint x); -void APIENTRY gl_dispatch_stub_1054(GLuint program, GLint location, GLsizei count, const GLint *value); -void APIENTRY gl_dispatch_stub_1055(GLuint program, GLint location, GLuint x); -void APIENTRY gl_dispatch_stub_1056(GLuint program, GLint location, GLsizei count, const GLuint *value); -void APIENTRY gl_dispatch_stub_1057(GLuint program, GLint location, GLdouble x, GLdouble y); -void APIENTRY gl_dispatch_stub_1058(GLuint program, GLint location, GLsizei count, const GLdouble *value); -void APIENTRY gl_dispatch_stub_1059(GLuint program, GLint location, GLfloat x, GLfloat y); -void APIENTRY gl_dispatch_stub_1060(GLuint program, GLint location, GLsizei count, const GLfloat *value); -void APIENTRY gl_dispatch_stub_1061(GLuint program, GLint location, GLint x, GLint y); -void APIENTRY gl_dispatch_stub_1062(GLuint program, GLint location, GLsizei count, const GLint *value); -void APIENTRY gl_dispatch_stub_1063(GLuint program, GLint location, GLuint x, GLuint y); -void APIENTRY gl_dispatch_stub_1064(GLuint program, GLint location, GLsizei count, const GLuint *value); -void APIENTRY gl_dispatch_stub_1065(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z); -void APIENTRY gl_dispatch_stub_1066(GLuint program, GLint location, GLsizei count, const GLdouble *value); -void APIENTRY gl_dispatch_stub_1067(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z); -void APIENTRY gl_dispatch_stub_1068(GLuint program, GLint location, GLsizei count, const GLfloat *value); -void APIENTRY gl_dispatch_stub_1069(GLuint program, GLint location, GLint x, GLint y, GLint z); -void APIENTRY gl_dispatch_stub_1070(GLuint program, GLint location, GLsizei count, const GLint *value); -void APIENTRY gl_dispatch_stub_1071(GLuint program, GLint location, GLuint x, GLuint y, GLuint z); -void APIENTRY gl_dispatch_stub_1072(GLuint program, GLint location, GLsizei count, const GLuint *value); -void APIENTRY gl_dispatch_stub_1073(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z, GLdouble w); -void APIENTRY gl_dispatch_stub_1074(GLuint program, GLint location, GLsizei count, const GLdouble *value); -void APIENTRY gl_dispatch_stub_1075(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z, GLfloat w); -void APIENTRY gl_dispatch_stub_1076(GLuint program, GLint location, GLsizei count, const GLfloat *value); -void APIENTRY gl_dispatch_stub_1077(GLuint program, GLint location, GLint x, GLint y, GLint z, GLint w); -void APIENTRY gl_dispatch_stub_1078(GLuint program, GLint location, GLsizei count, const GLint *value); -void APIENTRY gl_dispatch_stub_1079(GLuint program, GLint location, GLuint x, GLuint y, GLuint z, GLuint w); -void APIENTRY gl_dispatch_stub_1080(GLuint program, GLint location, GLsizei count, const GLuint *value); -void APIENTRY gl_dispatch_stub_1081(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); -void APIENTRY gl_dispatch_stub_1082(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY gl_dispatch_stub_1083(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); -void APIENTRY gl_dispatch_stub_1084(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY gl_dispatch_stub_1085(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); -void APIENTRY gl_dispatch_stub_1086(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY gl_dispatch_stub_1087(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); -void APIENTRY gl_dispatch_stub_1088(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY gl_dispatch_stub_1089(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); -void APIENTRY gl_dispatch_stub_1090(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY gl_dispatch_stub_1091(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); -void APIENTRY gl_dispatch_stub_1092(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY gl_dispatch_stub_1093(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); -void APIENTRY gl_dispatch_stub_1094(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY gl_dispatch_stub_1095(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); -void APIENTRY gl_dispatch_stub_1096(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY gl_dispatch_stub_1097(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); -void APIENTRY gl_dispatch_stub_1098(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY gl_dispatch_stub_1099(void); -void APIENTRY gl_dispatch_stub_1100(GLuint pipeline, GLbitfield stages, GLuint program); -void APIENTRY gl_dispatch_stub_1101(GLuint pipeline); -void APIENTRY gl_dispatch_stub_1102(GLDEBUGPROC callback, const GLvoid *userParam); -void APIENTRY gl_dispatch_stub_1103(GLenum source, GLenum type, GLenum severity, GLsizei count, const GLuint *ids, GLboolean enabled); -void APIENTRY gl_dispatch_stub_1104(GLenum source, GLenum type, GLuint id, GLenum severity, GLsizei length, const GLchar *buf); -GLuint APIENTRY gl_dispatch_stub_1105(GLuint count, GLsizei bufsize, GLenum *sources, GLenum *types, GLuint *ids, GLenum *severities, GLsizei *lengths, GLchar *messageLog); -void APIENTRY gl_dispatch_stub_1106(GLenum identifier, GLuint name, GLsizei bufSize, GLsizei *length, GLchar *label); -void APIENTRY gl_dispatch_stub_1107(const GLvoid *ptr, GLsizei bufSize, GLsizei *length, GLchar *label); -void APIENTRY gl_dispatch_stub_1108(GLenum identifier, GLuint name, GLsizei length, const GLchar *label); -void APIENTRY gl_dispatch_stub_1109(const GLvoid *ptr, GLsizei length, const GLchar *label); -void APIENTRY gl_dispatch_stub_1110(void); -void APIENTRY gl_dispatch_stub_1111(GLenum source, GLuint id, GLsizei length, const GLchar *message); -void APIENTRY gl_dispatch_stub_1112(GLfloat red, GLfloat green, GLfloat blue); -void APIENTRY gl_dispatch_stub_1113(const GLfloat *v); +void APIENTRY gl_dispatch_stub_1039(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); +void APIENTRY gl_dispatch_stub_1040(GLenum target, GLsizei numAttachments, const GLenum *attachments); +void APIENTRY gl_dispatch_stub_1041(GLuint pipeline, GLuint program); +void APIENTRY gl_dispatch_stub_1042(GLuint pipeline); +GLuint APIENTRY gl_dispatch_stub_1043(GLenum type, GLsizei count, const GLchar * const *strings); +void APIENTRY gl_dispatch_stub_1044(GLsizei n, const GLuint *pipelines); +void APIENTRY gl_dispatch_stub_1045(GLsizei n, GLuint *pipelines); +void APIENTRY gl_dispatch_stub_1046(GLuint pipeline, GLsizei bufSize, GLsizei *length, GLchar *infoLog); +void APIENTRY gl_dispatch_stub_1047(GLuint pipeline, GLenum pname, GLint *params); +GLboolean APIENTRY gl_dispatch_stub_1048(GLuint pipeline); +void APIENTRY gl_dispatch_stub_1049(GLint first, GLsizei count); +void APIENTRY gl_dispatch_stub_1050(GLuint program, GLint location, GLdouble x); +void APIENTRY gl_dispatch_stub_1051(GLuint program, GLint location, GLsizei count, const GLdouble *value); +void APIENTRY gl_dispatch_stub_1052(GLuint program, GLint location, GLfloat x); +void APIENTRY gl_dispatch_stub_1053(GLuint program, GLint location, GLsizei count, const GLfloat *value); +void APIENTRY gl_dispatch_stub_1054(GLuint program, GLint location, GLint x); +void APIENTRY gl_dispatch_stub_1055(GLuint program, GLint location, GLsizei count, const GLint *value); +void APIENTRY gl_dispatch_stub_1056(GLuint program, GLint location, GLuint x); +void APIENTRY gl_dispatch_stub_1057(GLuint program, GLint location, GLsizei count, const GLuint *value); +void APIENTRY gl_dispatch_stub_1058(GLuint program, GLint location, GLdouble x, GLdouble y); +void APIENTRY gl_dispatch_stub_1059(GLuint program, GLint location, GLsizei count, const GLdouble *value); +void APIENTRY gl_dispatch_stub_1060(GLuint program, GLint location, GLfloat x, GLfloat y); +void APIENTRY gl_dispatch_stub_1061(GLuint program, GLint location, GLsizei count, const GLfloat *value); +void APIENTRY gl_dispatch_stub_1062(GLuint program, GLint location, GLint x, GLint y); +void APIENTRY gl_dispatch_stub_1063(GLuint program, GLint location, GLsizei count, const GLint *value); +void APIENTRY gl_dispatch_stub_1064(GLuint program, GLint location, GLuint x, GLuint y); +void APIENTRY gl_dispatch_stub_1065(GLuint program, GLint location, GLsizei count, const GLuint *value); +void APIENTRY gl_dispatch_stub_1066(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z); +void APIENTRY gl_dispatch_stub_1067(GLuint program, GLint location, GLsizei count, const GLdouble *value); +void APIENTRY gl_dispatch_stub_1068(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z); +void APIENTRY gl_dispatch_stub_1069(GLuint program, GLint location, GLsizei count, const GLfloat *value); +void APIENTRY gl_dispatch_stub_1070(GLuint program, GLint location, GLint x, GLint y, GLint z); +void APIENTRY gl_dispatch_stub_1071(GLuint program, GLint location, GLsizei count, const GLint *value); +void APIENTRY gl_dispatch_stub_1072(GLuint program, GLint location, GLuint x, GLuint y, GLuint z); +void APIENTRY gl_dispatch_stub_1073(GLuint program, GLint location, GLsizei count, const GLuint *value); +void APIENTRY gl_dispatch_stub_1074(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z, GLdouble w); +void APIENTRY gl_dispatch_stub_1075(GLuint program, GLint location, GLsizei count, const GLdouble *value); +void APIENTRY gl_dispatch_stub_1076(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z, GLfloat w); +void APIENTRY gl_dispatch_stub_1077(GLuint program, GLint location, GLsizei count, const GLfloat *value); +void APIENTRY gl_dispatch_stub_1078(GLuint program, GLint location, GLint x, GLint y, GLint z, GLint w); +void APIENTRY gl_dispatch_stub_1079(GLuint program, GLint location, GLsizei count, const GLint *value); +void APIENTRY gl_dispatch_stub_1080(GLuint program, GLint location, GLuint x, GLuint y, GLuint z, GLuint w); +void APIENTRY gl_dispatch_stub_1081(GLuint program, GLint location, GLsizei count, const GLuint *value); +void APIENTRY gl_dispatch_stub_1082(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY gl_dispatch_stub_1083(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +void APIENTRY gl_dispatch_stub_1084(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY gl_dispatch_stub_1085(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +void APIENTRY gl_dispatch_stub_1086(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY gl_dispatch_stub_1087(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +void APIENTRY gl_dispatch_stub_1088(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY gl_dispatch_stub_1089(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +void APIENTRY gl_dispatch_stub_1090(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY gl_dispatch_stub_1091(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +void APIENTRY gl_dispatch_stub_1092(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY gl_dispatch_stub_1093(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +void APIENTRY gl_dispatch_stub_1094(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY gl_dispatch_stub_1095(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +void APIENTRY gl_dispatch_stub_1096(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY gl_dispatch_stub_1097(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +void APIENTRY gl_dispatch_stub_1098(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY gl_dispatch_stub_1099(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +void APIENTRY gl_dispatch_stub_1100(void); +void APIENTRY gl_dispatch_stub_1101(GLuint pipeline, GLbitfield stages, GLuint program); +void APIENTRY gl_dispatch_stub_1102(GLuint pipeline); +void APIENTRY gl_dispatch_stub_1103(GLDEBUGPROC callback, const GLvoid *userParam); +void APIENTRY gl_dispatch_stub_1104(GLenum source, GLenum type, GLenum severity, GLsizei count, const GLuint *ids, GLboolean enabled); +void APIENTRY gl_dispatch_stub_1105(GLenum source, GLenum type, GLuint id, GLenum severity, GLsizei length, const GLchar *buf); +GLuint APIENTRY gl_dispatch_stub_1106(GLuint count, GLsizei bufsize, GLenum *sources, GLenum *types, GLuint *ids, GLenum *severities, GLsizei *lengths, GLchar *messageLog); +void APIENTRY gl_dispatch_stub_1107(GLenum identifier, GLuint name, GLsizei bufSize, GLsizei *length, GLchar *label); +void APIENTRY gl_dispatch_stub_1108(const GLvoid *ptr, GLsizei bufSize, GLsizei *length, GLchar *label); +void APIENTRY gl_dispatch_stub_1109(GLenum identifier, GLuint name, GLsizei length, const GLchar *label); +void APIENTRY gl_dispatch_stub_1110(const GLvoid *ptr, GLsizei length, const GLchar *label); +void APIENTRY gl_dispatch_stub_1111(void); +void APIENTRY gl_dispatch_stub_1112(GLenum source, GLuint id, GLsizei length, const GLchar *message); +void APIENTRY gl_dispatch_stub_1113(GLfloat red, GLfloat green, GLfloat blue); +void APIENTRY gl_dispatch_stub_1114(const GLfloat *v); GLAPI void APIENTRY glMultiDrawElementsEXT(GLenum mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount); -void APIENTRY gl_dispatch_stub_1115(GLfloat coord); -void APIENTRY gl_dispatch_stub_1116(const GLfloat *coord); -void APIENTRY gl_dispatch_stub_1117(void); -void APIENTRY gl_dispatch_stub_1118(GLdouble x, GLdouble y, GLdouble z, GLdouble w); -void APIENTRY gl_dispatch_stub_1119(const GLdouble *v); -void APIENTRY gl_dispatch_stub_1120(GLfloat x, GLfloat y, GLfloat z, GLfloat w); -void APIENTRY gl_dispatch_stub_1121(const GLfloat *v); -void APIENTRY gl_dispatch_stub_1122(GLint x, GLint y, GLint z, GLint w); -void APIENTRY gl_dispatch_stub_1123(const GLint *v); -void APIENTRY gl_dispatch_stub_1124(GLshort x, GLshort y, GLshort z, GLshort w); -void APIENTRY gl_dispatch_stub_1125(const GLshort *v); -void APIENTRY gl_dispatch_stub_1126(const GLenum *mode, const GLint *first, const GLsizei *count, GLsizei primcount, GLint modestride); -void APIENTRY gl_dispatch_stub_1127(const GLenum *mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount, GLint modestride); -GLboolean APIENTRY gl_dispatch_stub_1128(GLsizei n, const GLuint *ids, GLboolean *residences); -void APIENTRY gl_dispatch_stub_1129(GLenum target, GLuint id, const GLfloat *params); -void APIENTRY gl_dispatch_stub_1130(GLenum target, GLuint index, GLenum pname, GLdouble *params); -void APIENTRY gl_dispatch_stub_1131(GLenum target, GLuint index, GLenum pname, GLfloat *params); -void APIENTRY gl_dispatch_stub_1132(GLuint id, GLenum pname, GLubyte *program); -void APIENTRY gl_dispatch_stub_1133(GLuint id, GLenum pname, GLint *params); -void APIENTRY gl_dispatch_stub_1134(GLenum target, GLuint address, GLenum pname, GLint *params); -void APIENTRY gl_dispatch_stub_1135(GLuint index, GLenum pname, GLdouble *params); -void APIENTRY gl_dispatch_stub_1136(GLuint index, GLenum pname, GLfloat *params); -void APIENTRY gl_dispatch_stub_1137(GLuint index, GLenum pname, GLint *params); -void APIENTRY gl_dispatch_stub_1138(GLenum target, GLuint id, GLsizei len, const GLubyte *program); -void APIENTRY gl_dispatch_stub_1139(GLenum target, GLuint index, GLsizei num, const GLdouble *params); -void APIENTRY gl_dispatch_stub_1140(GLenum target, GLuint index, GLsizei num, const GLfloat *params); -void APIENTRY gl_dispatch_stub_1141(GLsizei n, const GLuint *ids); -void APIENTRY gl_dispatch_stub_1142(GLenum target, GLuint address, GLenum matrix, GLenum transform); -void APIENTRY gl_dispatch_stub_1143(GLuint index, GLdouble x); -void APIENTRY gl_dispatch_stub_1144(GLuint index, const GLdouble *v); -void APIENTRY gl_dispatch_stub_1145(GLuint index, GLfloat x); -void APIENTRY gl_dispatch_stub_1146(GLuint index, const GLfloat *v); -void APIENTRY gl_dispatch_stub_1147(GLuint index, GLshort x); -void APIENTRY gl_dispatch_stub_1148(GLuint index, const GLshort *v); -void APIENTRY gl_dispatch_stub_1149(GLuint index, GLdouble x, GLdouble y); -void APIENTRY gl_dispatch_stub_1150(GLuint index, const GLdouble *v); -void APIENTRY gl_dispatch_stub_1151(GLuint index, GLfloat x, GLfloat y); -void APIENTRY gl_dispatch_stub_1152(GLuint index, const GLfloat *v); -void APIENTRY gl_dispatch_stub_1153(GLuint index, GLshort x, GLshort y); -void APIENTRY gl_dispatch_stub_1154(GLuint index, const GLshort *v); -void APIENTRY gl_dispatch_stub_1155(GLuint index, GLdouble x, GLdouble y, GLdouble z); -void APIENTRY gl_dispatch_stub_1156(GLuint index, const GLdouble *v); -void APIENTRY gl_dispatch_stub_1157(GLuint index, GLfloat x, GLfloat y, GLfloat z); -void APIENTRY gl_dispatch_stub_1158(GLuint index, const GLfloat *v); -void APIENTRY gl_dispatch_stub_1159(GLuint index, GLshort x, GLshort y, GLshort z); -void APIENTRY gl_dispatch_stub_1160(GLuint index, const GLshort *v); -void APIENTRY gl_dispatch_stub_1161(GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w); -void APIENTRY gl_dispatch_stub_1162(GLuint index, const GLdouble *v); -void APIENTRY gl_dispatch_stub_1163(GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w); -void APIENTRY gl_dispatch_stub_1164(GLuint index, const GLfloat *v); -void APIENTRY gl_dispatch_stub_1165(GLuint index, GLshort x, GLshort y, GLshort z, GLshort w); -void APIENTRY gl_dispatch_stub_1166(GLuint index, const GLshort *v); -void APIENTRY gl_dispatch_stub_1167(GLuint index, GLubyte x, GLubyte y, GLubyte z, GLubyte w); -void APIENTRY gl_dispatch_stub_1168(GLuint index, const GLubyte *v); -void APIENTRY gl_dispatch_stub_1169(GLuint index, GLint size, GLenum type, GLsizei stride, const GLvoid *pointer); -void APIENTRY gl_dispatch_stub_1170(GLuint index, GLsizei n, const GLdouble *v); -void APIENTRY gl_dispatch_stub_1171(GLuint index, GLsizei n, const GLfloat *v); -void APIENTRY gl_dispatch_stub_1172(GLuint index, GLsizei n, const GLshort *v); -void APIENTRY gl_dispatch_stub_1173(GLuint index, GLsizei n, const GLdouble *v); -void APIENTRY gl_dispatch_stub_1174(GLuint index, GLsizei n, const GLfloat *v); -void APIENTRY gl_dispatch_stub_1175(GLuint index, GLsizei n, const GLshort *v); -void APIENTRY gl_dispatch_stub_1176(GLuint index, GLsizei n, const GLdouble *v); -void APIENTRY gl_dispatch_stub_1177(GLuint index, GLsizei n, const GLfloat *v); -void APIENTRY gl_dispatch_stub_1178(GLuint index, GLsizei n, const GLshort *v); -void APIENTRY gl_dispatch_stub_1179(GLuint index, GLsizei n, const GLdouble *v); -void APIENTRY gl_dispatch_stub_1180(GLuint index, GLsizei n, const GLfloat *v); -void APIENTRY gl_dispatch_stub_1181(GLuint index, GLsizei n, const GLshort *v); -void APIENTRY gl_dispatch_stub_1182(GLuint index, GLsizei n, const GLubyte *v); -void APIENTRY gl_dispatch_stub_1183(GLenum pname, GLfloat *param); -void APIENTRY gl_dispatch_stub_1184(GLenum pname, GLint *param); -void APIENTRY gl_dispatch_stub_1185(GLenum pname, const GLfloat *param); -void APIENTRY gl_dispatch_stub_1186(GLenum pname, const GLint *param); -void APIENTRY gl_dispatch_stub_1187(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); -void APIENTRY gl_dispatch_stub_1188(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); -void APIENTRY gl_dispatch_stub_1189(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); -void APIENTRY gl_dispatch_stub_1190(void); -void APIENTRY gl_dispatch_stub_1191(GLuint id); -void APIENTRY gl_dispatch_stub_1192(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); -void APIENTRY gl_dispatch_stub_1193(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); -void APIENTRY gl_dispatch_stub_1194(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); -void APIENTRY gl_dispatch_stub_1195(GLuint id); -void APIENTRY gl_dispatch_stub_1196(void); -GLuint APIENTRY gl_dispatch_stub_1197(GLuint range); -void APIENTRY gl_dispatch_stub_1198(GLuint dst, GLuint coord, GLenum swizzle); -void APIENTRY gl_dispatch_stub_1199(GLuint dst, GLuint interp, GLenum swizzle); -void APIENTRY gl_dispatch_stub_1200(GLuint dst, const GLfloat *value); -void APIENTRY gl_dispatch_stub_1201(GLenum face); -void APIENTRY gl_dispatch_stub_1202(GLuint array); -void APIENTRY gl_dispatch_stub_1203(GLsizei n, GLuint *arrays); -void APIENTRY gl_dispatch_stub_1204(GLuint id, GLsizei len, const GLubyte *name, GLdouble *params); -void APIENTRY gl_dispatch_stub_1205(GLuint id, GLsizei len, const GLubyte *name, GLfloat *params); -void APIENTRY gl_dispatch_stub_1206(GLuint id, GLsizei len, const GLubyte *name, GLdouble x, GLdouble y, GLdouble z, GLdouble w); -void APIENTRY gl_dispatch_stub_1207(GLuint id, GLsizei len, const GLubyte *name, const GLdouble *v); -void APIENTRY gl_dispatch_stub_1208(GLuint id, GLsizei len, const GLubyte *name, GLfloat x, GLfloat y, GLfloat z, GLfloat w); -void APIENTRY gl_dispatch_stub_1209(GLuint id, GLsizei len, const GLubyte *name, const GLfloat *v); -void APIENTRY gl_dispatch_stub_1210(void); -void APIENTRY gl_dispatch_stub_1211(GLenum coord, GLenum pname, GLfixed *params); -void APIENTRY gl_dispatch_stub_1212(GLenum coord, GLenum pname, GLint param); -void APIENTRY gl_dispatch_stub_1213(GLenum coord, GLenum pname, const GLfixed *params); -void APIENTRY gl_dispatch_stub_1214(GLclampd zmin, GLclampd zmax); -void APIENTRY gl_dispatch_stub_1215(GLenum target, GLuint framebuffer); -void APIENTRY gl_dispatch_stub_1216(GLenum target, GLuint renderbuffer); -void APIENTRY gl_dispatch_stub_1217(GLsizei len, const GLvoid *string); -void APIENTRY gl_dispatch_stub_1218(GLenum target, GLenum pname, GLint param); -void APIENTRY gl_dispatch_stub_1219(GLenum target, GLintptr offset, GLsizeiptr size); -void APIENTRY gl_dispatch_stub_1220(GLuint index, GLint x); -void APIENTRY gl_dispatch_stub_1221(GLuint index, GLuint x); -void APIENTRY gl_dispatch_stub_1222(GLuint index, GLint x, GLint y); -void APIENTRY gl_dispatch_stub_1223(GLuint index, const GLint *v); -void APIENTRY gl_dispatch_stub_1224(GLuint index, GLuint x, GLuint y); -void APIENTRY gl_dispatch_stub_1225(GLuint index, const GLuint *v); -void APIENTRY gl_dispatch_stub_1226(GLuint index, GLint x, GLint y, GLint z); -void APIENTRY gl_dispatch_stub_1227(GLuint index, const GLint *v); -void APIENTRY gl_dispatch_stub_1228(GLuint index, GLuint x, GLuint y, GLuint z); -void APIENTRY gl_dispatch_stub_1229(GLuint index, const GLuint *v); -void APIENTRY gl_dispatch_stub_1230(GLuint index, GLint x, GLint y, GLint z, GLint w); -void APIENTRY gl_dispatch_stub_1231(GLuint index, const GLint *v); -void APIENTRY gl_dispatch_stub_1232(GLuint index, GLuint x, GLuint y, GLuint z, GLuint w); -void APIENTRY gl_dispatch_stub_1233(GLuint index, const GLuint *v); -void APIENTRY gl_dispatch_stub_1234(GLint r, GLint g, GLint b, GLint a); -void APIENTRY gl_dispatch_stub_1235(GLuint r, GLuint g, GLuint b, GLuint a); -void APIENTRY gl_dispatch_stub_1236(GLenum target, GLuint index, GLuint buffer, GLintptr offset); -void APIENTRY gl_dispatch_stub_1237(GLuint monitor); -void APIENTRY gl_dispatch_stub_1238(GLsizei n, GLuint *monitors); -void APIENTRY gl_dispatch_stub_1239(GLuint monitor); -void APIENTRY gl_dispatch_stub_1240(GLsizei n, GLuint *monitors); -void APIENTRY gl_dispatch_stub_1241(GLuint monitor, GLenum pname, GLsizei dataSize, GLuint *data, GLint *bytesWritten); -void APIENTRY gl_dispatch_stub_1242(GLuint group, GLuint counter, GLenum pname, GLvoid *data); -void APIENTRY gl_dispatch_stub_1243(GLuint group, GLuint counter, GLsizei bufSize, GLsizei *length, GLchar *counterString); -void APIENTRY gl_dispatch_stub_1244(GLuint group, GLint *numCounters, GLint *maxActiveCounters, GLsizei countersSize, GLuint *counters); -void APIENTRY gl_dispatch_stub_1245(GLuint group, GLsizei bufSize, GLsizei *length, GLchar *groupString); -void APIENTRY gl_dispatch_stub_1246(GLint *numGroups, GLsizei groupsSize, GLuint *groups); -void APIENTRY gl_dispatch_stub_1247(GLuint monitor, GLboolean enable, GLuint group, GLint numCounters, GLuint *counterList); -void APIENTRY gl_dispatch_stub_1248(GLenum objectType, GLuint name, GLenum pname, GLint *value); -GLenum APIENTRY gl_dispatch_stub_1249(GLenum objectType, GLuint name, GLenum option); -GLenum APIENTRY gl_dispatch_stub_1250(GLenum objectType, GLuint name, GLenum option); -void APIENTRY gl_dispatch_stub_1251(GLuint program); -GLuint APIENTRY gl_dispatch_stub_1252(GLenum type, const GLchar *string); -void APIENTRY gl_dispatch_stub_1253(GLenum type, GLuint program); -void APIENTRY gl_dispatch_stub_1254(void); -void APIENTRY gl_dispatch_stub_1255(void); -void APIENTRY gl_dispatch_stub_1256(GLintptr surface, GLenum pname, GLsizei bufSize, GLsizei *length, GLint *values); -void APIENTRY gl_dispatch_stub_1257(const GLvoid *vdpDevice, const GLvoid *getProcAddress); -GLboolean APIENTRY gl_dispatch_stub_1258(GLintptr surface); -void APIENTRY gl_dispatch_stub_1259(GLsizei numSurfaces, const GLintptr *surfaces); -GLintptr APIENTRY gl_dispatch_stub_1260(const GLvoid *vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint *textureNames); -GLintptr APIENTRY gl_dispatch_stub_1261(const GLvoid *vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint *textureNames); -void APIENTRY gl_dispatch_stub_1262(GLintptr surface, GLenum access); -void APIENTRY gl_dispatch_stub_1263(GLsizei numSurfaces, const GLintptr *surfaces); -void APIENTRY gl_dispatch_stub_1264(GLintptr surface); -void APIENTRY gl_dispatch_stub_1265(GLuint queryHandle); -void APIENTRY gl_dispatch_stub_1266(GLuint queryId, GLuint *queryHandle); -void APIENTRY gl_dispatch_stub_1267(GLuint queryHandle); +void APIENTRY gl_dispatch_stub_1116(GLfloat coord); +void APIENTRY gl_dispatch_stub_1117(const GLfloat *coord); +void APIENTRY gl_dispatch_stub_1118(void); +void APIENTRY gl_dispatch_stub_1119(GLdouble x, GLdouble y, GLdouble z, GLdouble w); +void APIENTRY gl_dispatch_stub_1120(const GLdouble *v); +void APIENTRY gl_dispatch_stub_1121(GLfloat x, GLfloat y, GLfloat z, GLfloat w); +void APIENTRY gl_dispatch_stub_1122(const GLfloat *v); +void APIENTRY gl_dispatch_stub_1123(GLint x, GLint y, GLint z, GLint w); +void APIENTRY gl_dispatch_stub_1124(const GLint *v); +void APIENTRY gl_dispatch_stub_1125(GLshort x, GLshort y, GLshort z, GLshort w); +void APIENTRY gl_dispatch_stub_1126(const GLshort *v); +void APIENTRY gl_dispatch_stub_1127(const GLenum *mode, const GLint *first, const GLsizei *count, GLsizei primcount, GLint modestride); +void APIENTRY gl_dispatch_stub_1128(const GLenum *mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount, GLint modestride); +GLboolean APIENTRY gl_dispatch_stub_1129(GLsizei n, const GLuint *ids, GLboolean *residences); +void APIENTRY gl_dispatch_stub_1130(GLenum target, GLuint id, const GLfloat *params); +void APIENTRY gl_dispatch_stub_1131(GLenum target, GLuint index, GLenum pname, GLdouble *params); +void APIENTRY gl_dispatch_stub_1132(GLenum target, GLuint index, GLenum pname, GLfloat *params); +void APIENTRY gl_dispatch_stub_1133(GLuint id, GLenum pname, GLubyte *program); +void APIENTRY gl_dispatch_stub_1134(GLuint id, GLenum pname, GLint *params); +void APIENTRY gl_dispatch_stub_1135(GLenum target, GLuint address, GLenum pname, GLint *params); +void APIENTRY gl_dispatch_stub_1136(GLuint index, GLenum pname, GLdouble *params); +void APIENTRY gl_dispatch_stub_1137(GLuint index, GLenum pname, GLfloat *params); +void APIENTRY gl_dispatch_stub_1138(GLuint index, GLenum pname, GLint *params); +void APIENTRY gl_dispatch_stub_1139(GLenum target, GLuint id, GLsizei len, const GLubyte *program); +void APIENTRY gl_dispatch_stub_1140(GLenum target, GLuint index, GLsizei num, const GLdouble *params); +void APIENTRY gl_dispatch_stub_1141(GLenum target, GLuint index, GLsizei num, const GLfloat *params); +void APIENTRY gl_dispatch_stub_1142(GLsizei n, const GLuint *ids); +void APIENTRY gl_dispatch_stub_1143(GLenum target, GLuint address, GLenum matrix, GLenum transform); +void APIENTRY gl_dispatch_stub_1144(GLuint index, GLdouble x); +void APIENTRY gl_dispatch_stub_1145(GLuint index, const GLdouble *v); +void APIENTRY gl_dispatch_stub_1146(GLuint index, GLfloat x); +void APIENTRY gl_dispatch_stub_1147(GLuint index, const GLfloat *v); +void APIENTRY gl_dispatch_stub_1148(GLuint index, GLshort x); +void APIENTRY gl_dispatch_stub_1149(GLuint index, const GLshort *v); +void APIENTRY gl_dispatch_stub_1150(GLuint index, GLdouble x, GLdouble y); +void APIENTRY gl_dispatch_stub_1151(GLuint index, const GLdouble *v); +void APIENTRY gl_dispatch_stub_1152(GLuint index, GLfloat x, GLfloat y); +void APIENTRY gl_dispatch_stub_1153(GLuint index, const GLfloat *v); +void APIENTRY gl_dispatch_stub_1154(GLuint index, GLshort x, GLshort y); +void APIENTRY gl_dispatch_stub_1155(GLuint index, const GLshort *v); +void APIENTRY gl_dispatch_stub_1156(GLuint index, GLdouble x, GLdouble y, GLdouble z); +void APIENTRY gl_dispatch_stub_1157(GLuint index, const GLdouble *v); +void APIENTRY gl_dispatch_stub_1158(GLuint index, GLfloat x, GLfloat y, GLfloat z); +void APIENTRY gl_dispatch_stub_1159(GLuint index, const GLfloat *v); +void APIENTRY gl_dispatch_stub_1160(GLuint index, GLshort x, GLshort y, GLshort z); +void APIENTRY gl_dispatch_stub_1161(GLuint index, const GLshort *v); +void APIENTRY gl_dispatch_stub_1162(GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w); +void APIENTRY gl_dispatch_stub_1163(GLuint index, const GLdouble *v); +void APIENTRY gl_dispatch_stub_1164(GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w); +void APIENTRY gl_dispatch_stub_1165(GLuint index, const GLfloat *v); +void APIENTRY gl_dispatch_stub_1166(GLuint index, GLshort x, GLshort y, GLshort z, GLshort w); +void APIENTRY gl_dispatch_stub_1167(GLuint index, const GLshort *v); +void APIENTRY gl_dispatch_stub_1168(GLuint index, GLubyte x, GLubyte y, GLubyte z, GLubyte w); +void APIENTRY gl_dispatch_stub_1169(GLuint index, const GLubyte *v); +void APIENTRY gl_dispatch_stub_1170(GLuint index, GLint size, GLenum type, GLsizei stride, const GLvoid *pointer); +void APIENTRY gl_dispatch_stub_1171(GLuint index, GLsizei n, const GLdouble *v); +void APIENTRY gl_dispatch_stub_1172(GLuint index, GLsizei n, const GLfloat *v); +void APIENTRY gl_dispatch_stub_1173(GLuint index, GLsizei n, const GLshort *v); +void APIENTRY gl_dispatch_stub_1174(GLuint index, GLsizei n, const GLdouble *v); +void APIENTRY gl_dispatch_stub_1175(GLuint index, GLsizei n, const GLfloat *v); +void APIENTRY gl_dispatch_stub_1176(GLuint index, GLsizei n, const GLshort *v); +void APIENTRY gl_dispatch_stub_1177(GLuint index, GLsizei n, const GLdouble *v); +void APIENTRY gl_dispatch_stub_1178(GLuint index, GLsizei n, const GLfloat *v); +void APIENTRY gl_dispatch_stub_1179(GLuint index, GLsizei n, const GLshort *v); +void APIENTRY gl_dispatch_stub_1180(GLuint index, GLsizei n, const GLdouble *v); +void APIENTRY gl_dispatch_stub_1181(GLuint index, GLsizei n, const GLfloat *v); +void APIENTRY gl_dispatch_stub_1182(GLuint index, GLsizei n, const GLshort *v); +void APIENTRY gl_dispatch_stub_1183(GLuint index, GLsizei n, const GLubyte *v); +void APIENTRY gl_dispatch_stub_1184(GLenum pname, GLfloat *param); +void APIENTRY gl_dispatch_stub_1185(GLenum pname, GLint *param); +void APIENTRY gl_dispatch_stub_1186(GLenum pname, const GLfloat *param); +void APIENTRY gl_dispatch_stub_1187(GLenum pname, const GLint *param); +void APIENTRY gl_dispatch_stub_1188(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); +void APIENTRY gl_dispatch_stub_1189(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); +void APIENTRY gl_dispatch_stub_1190(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); +void APIENTRY gl_dispatch_stub_1191(void); +void APIENTRY gl_dispatch_stub_1192(GLuint id); +void APIENTRY gl_dispatch_stub_1193(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); +void APIENTRY gl_dispatch_stub_1194(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); +void APIENTRY gl_dispatch_stub_1195(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); +void APIENTRY gl_dispatch_stub_1196(GLuint id); +void APIENTRY gl_dispatch_stub_1197(void); +GLuint APIENTRY gl_dispatch_stub_1198(GLuint range); +void APIENTRY gl_dispatch_stub_1199(GLuint dst, GLuint coord, GLenum swizzle); +void APIENTRY gl_dispatch_stub_1200(GLuint dst, GLuint interp, GLenum swizzle); +void APIENTRY gl_dispatch_stub_1201(GLuint dst, const GLfloat *value); +void APIENTRY gl_dispatch_stub_1202(GLuint first, GLsizei count, const GLfloat *v); +void APIENTRY gl_dispatch_stub_1203(GLuint index, GLfloat n, GLfloat f); +void APIENTRY gl_dispatch_stub_1204(GLenum face); +void APIENTRY gl_dispatch_stub_1205(GLuint array); +void APIENTRY gl_dispatch_stub_1206(GLsizei n, GLuint *arrays); +void APIENTRY gl_dispatch_stub_1207(GLuint id, GLsizei len, const GLubyte *name, GLdouble *params); +void APIENTRY gl_dispatch_stub_1208(GLuint id, GLsizei len, const GLubyte *name, GLfloat *params); +void APIENTRY gl_dispatch_stub_1209(GLuint id, GLsizei len, const GLubyte *name, GLdouble x, GLdouble y, GLdouble z, GLdouble w); +void APIENTRY gl_dispatch_stub_1210(GLuint id, GLsizei len, const GLubyte *name, const GLdouble *v); +void APIENTRY gl_dispatch_stub_1211(GLuint id, GLsizei len, const GLubyte *name, GLfloat x, GLfloat y, GLfloat z, GLfloat w); +void APIENTRY gl_dispatch_stub_1212(GLuint id, GLsizei len, const GLubyte *name, const GLfloat *v); +void APIENTRY gl_dispatch_stub_1213(void); +void APIENTRY gl_dispatch_stub_1214(GLenum coord, GLenum pname, GLfixed *params); +void APIENTRY gl_dispatch_stub_1215(GLenum coord, GLenum pname, GLint param); +void APIENTRY gl_dispatch_stub_1216(GLenum coord, GLenum pname, const GLfixed *params); +void APIENTRY gl_dispatch_stub_1217(GLclampd zmin, GLclampd zmax); +void APIENTRY gl_dispatch_stub_1218(GLenum target, GLuint framebuffer); +void APIENTRY gl_dispatch_stub_1219(GLenum target, GLuint renderbuffer); +void APIENTRY gl_dispatch_stub_1220(GLsizei len, const GLvoid *string); +void APIENTRY gl_dispatch_stub_1221(GLenum target, GLenum pname, GLint param); +void APIENTRY gl_dispatch_stub_1222(GLenum target, GLintptr offset, GLsizeiptr size); +void APIENTRY gl_dispatch_stub_1223(GLuint index, GLint x); +void APIENTRY gl_dispatch_stub_1224(GLuint index, GLuint x); +void APIENTRY gl_dispatch_stub_1225(GLuint index, GLint x, GLint y); +void APIENTRY gl_dispatch_stub_1226(GLuint index, const GLint *v); +void APIENTRY gl_dispatch_stub_1227(GLuint index, GLuint x, GLuint y); +void APIENTRY gl_dispatch_stub_1228(GLuint index, const GLuint *v); +void APIENTRY gl_dispatch_stub_1229(GLuint index, GLint x, GLint y, GLint z); +void APIENTRY gl_dispatch_stub_1230(GLuint index, const GLint *v); +void APIENTRY gl_dispatch_stub_1231(GLuint index, GLuint x, GLuint y, GLuint z); +void APIENTRY gl_dispatch_stub_1232(GLuint index, const GLuint *v); +void APIENTRY gl_dispatch_stub_1233(GLuint index, GLint x, GLint y, GLint z, GLint w); +void APIENTRY gl_dispatch_stub_1234(GLuint index, const GLint *v); +void APIENTRY gl_dispatch_stub_1235(GLuint index, GLuint x, GLuint y, GLuint z, GLuint w); +void APIENTRY gl_dispatch_stub_1236(GLuint index, const GLuint *v); +void APIENTRY gl_dispatch_stub_1237(GLint r, GLint g, GLint b, GLint a); +void APIENTRY gl_dispatch_stub_1238(GLuint r, GLuint g, GLuint b, GLuint a); +void APIENTRY gl_dispatch_stub_1239(GLenum target, GLuint index, GLuint buffer, GLintptr offset); +void APIENTRY gl_dispatch_stub_1240(GLuint monitor); +void APIENTRY gl_dispatch_stub_1241(GLsizei n, GLuint *monitors); +void APIENTRY gl_dispatch_stub_1242(GLuint monitor); +void APIENTRY gl_dispatch_stub_1243(GLsizei n, GLuint *monitors); +void APIENTRY gl_dispatch_stub_1244(GLuint monitor, GLenum pname, GLsizei dataSize, GLuint *data, GLint *bytesWritten); +void APIENTRY gl_dispatch_stub_1245(GLuint group, GLuint counter, GLenum pname, GLvoid *data); +void APIENTRY gl_dispatch_stub_1246(GLuint group, GLuint counter, GLsizei bufSize, GLsizei *length, GLchar *counterString); +void APIENTRY gl_dispatch_stub_1247(GLuint group, GLint *numCounters, GLint *maxActiveCounters, GLsizei countersSize, GLuint *counters); +void APIENTRY gl_dispatch_stub_1248(GLuint group, GLsizei bufSize, GLsizei *length, GLchar *groupString); +void APIENTRY gl_dispatch_stub_1249(GLint *numGroups, GLsizei groupsSize, GLuint *groups); +void APIENTRY gl_dispatch_stub_1250(GLuint monitor, GLboolean enable, GLuint group, GLint numCounters, GLuint *counterList); +void APIENTRY gl_dispatch_stub_1251(GLenum objectType, GLuint name, GLenum pname, GLint *value); +GLenum APIENTRY gl_dispatch_stub_1252(GLenum objectType, GLuint name, GLenum option); +GLenum APIENTRY gl_dispatch_stub_1253(GLenum objectType, GLuint name, GLenum option); +void APIENTRY gl_dispatch_stub_1254(GLuint program); +GLuint APIENTRY gl_dispatch_stub_1255(GLenum type, const GLchar *string); +void APIENTRY gl_dispatch_stub_1256(GLenum type, GLuint program); +void APIENTRY gl_dispatch_stub_1257(void); +void APIENTRY gl_dispatch_stub_1258(void); +void APIENTRY gl_dispatch_stub_1259(GLintptr surface, GLenum pname, GLsizei bufSize, GLsizei *length, GLint *values); +void APIENTRY gl_dispatch_stub_1260(const GLvoid *vdpDevice, const GLvoid *getProcAddress); +GLboolean APIENTRY gl_dispatch_stub_1261(GLintptr surface); +void APIENTRY gl_dispatch_stub_1262(GLsizei numSurfaces, const GLintptr *surfaces); +GLintptr APIENTRY gl_dispatch_stub_1263(const GLvoid *vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint *textureNames); +GLintptr APIENTRY gl_dispatch_stub_1264(const GLvoid *vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint *textureNames); +void APIENTRY gl_dispatch_stub_1265(GLintptr surface, GLenum access); +void APIENTRY gl_dispatch_stub_1266(GLsizei numSurfaces, const GLintptr *surfaces); +void APIENTRY gl_dispatch_stub_1267(GLintptr surface); void APIENTRY gl_dispatch_stub_1268(GLuint queryHandle); -void APIENTRY gl_dispatch_stub_1269(GLuint *queryId); -void APIENTRY gl_dispatch_stub_1270(GLuint queryId, GLuint *nextQueryId); -void APIENTRY gl_dispatch_stub_1271(GLuint queryId, GLuint counterId, GLuint counterNameLength, GLchar *counterName, GLuint counterDescLength, GLchar *counterDesc, GLuint *counterOffset, GLuint *counterDataSize, GLuint *counterTypeEnum, GLuint *counterDataTypeEnum, GLuint64 *rawCounterMaxValue); -void APIENTRY gl_dispatch_stub_1272(GLuint queryHandle, GLuint flags, GLsizei dataSize, GLvoid *data, GLuint *bytesWritten); -void APIENTRY gl_dispatch_stub_1273(GLchar *queryName, GLuint *queryId); -void APIENTRY gl_dispatch_stub_1274(GLuint queryId, GLuint queryNameLength, GLchar *queryName, GLuint *dataSize, GLuint *noCounters, GLuint *noInstances, GLuint *capsMask); -void APIENTRY gl_dispatch_stub_1275(GLfloat factor, GLfloat units, GLfloat clamp); -void APIENTRY gl_dispatch_stub_1276(GLenum frontfunc, GLenum backfunc, GLint ref, GLuint mask); -void APIENTRY gl_dispatch_stub_1277(GLenum target, GLuint index, GLsizei count, const GLfloat *params); -void APIENTRY gl_dispatch_stub_1278(GLenum target, GLuint index, GLsizei count, const GLfloat *params); -void APIENTRY gl_dispatch_stub_1279(GLenum target, GLvoid *writeOffset); -void APIENTRY gl_dispatch_stub_1280(GLenum target, GLvoid *writeOffset); +void APIENTRY gl_dispatch_stub_1269(GLuint queryId, GLuint *queryHandle); +void APIENTRY gl_dispatch_stub_1270(GLuint queryHandle); +void APIENTRY gl_dispatch_stub_1271(GLuint queryHandle); +void APIENTRY gl_dispatch_stub_1272(GLuint *queryId); +void APIENTRY gl_dispatch_stub_1273(GLuint queryId, GLuint *nextQueryId); +void APIENTRY gl_dispatch_stub_1274(GLuint queryId, GLuint counterId, GLuint counterNameLength, GLchar *counterName, GLuint counterDescLength, GLchar *counterDesc, GLuint *counterOffset, GLuint *counterDataSize, GLuint *counterTypeEnum, GLuint *counterDataTypeEnum, GLuint64 *rawCounterMaxValue); +void APIENTRY gl_dispatch_stub_1275(GLuint queryHandle, GLuint flags, GLsizei dataSize, GLvoid *data, GLuint *bytesWritten); +void APIENTRY gl_dispatch_stub_1276(GLchar *queryName, GLuint *queryId); +void APIENTRY gl_dispatch_stub_1277(GLuint queryId, GLuint queryNameLength, GLchar *queryName, GLuint *dataSize, GLuint *noCounters, GLuint *noInstances, GLuint *capsMask); +void APIENTRY gl_dispatch_stub_1278(GLfloat factor, GLfloat units, GLfloat clamp); +void APIENTRY gl_dispatch_stub_1279(GLenum mode, GLsizei count, const GLint *box); +void APIENTRY gl_dispatch_stub_1280(GLenum frontfunc, GLenum backfunc, GLint ref, GLuint mask); +void APIENTRY gl_dispatch_stub_1281(GLenum target, GLuint index, GLsizei count, const GLfloat *params); +void APIENTRY gl_dispatch_stub_1282(GLenum target, GLuint index, GLsizei count, const GLfloat *params); +void APIENTRY gl_dispatch_stub_1283(GLenum target, GLvoid *writeOffset); +void APIENTRY gl_dispatch_stub_1284(GLenum target, GLvoid *writeOffset); GLAPI void APIENTRY glAlphaFuncx(GLenum func, GLclampx ref); GLAPI void APIENTRY glClearColorx(GLclampx red, GLclampx green, GLclampx blue, GLclampx alpha); GLAPI void APIENTRY glClearDepthx(GLclampx depth); @@ -1336,6 +1340,8 @@ GLAPI void APIENTRY glPointParameterx(GLenum pname, GLfixed param); GLAPI void APIENTRY glPointParameterxv(GLenum pname, const GLfixed *params); GLAPI void APIENTRY glTexParameterxv(GLenum target, GLenum pname, const GLfixed *params); +void APIENTRY gl_dispatch_stub_1328(void); +void APIENTRY gl_dispatch_stub_1329(GLfloat minX, GLfloat minY, GLfloat minZ, GLfloat minW, GLfloat maxX, GLfloat maxY, GLfloat maxZ, GLfloat maxW); #undef MAPI_TMP_DEFINES #endif /* MAPI_TMP_DEFINES */ @@ -2057,315 +2063,315 @@ GLAPI void APIENTRY glPointSizePointerOES(GLenum type, GLsizei stride, const GLvoid *pointer) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1029]; + mapi_func _func = ((const mapi_func *) _tbl)[1030]; ((void (APIENTRY *)(GLenum type, GLsizei stride, const GLvoid *pointer)) _func)(type, stride, pointer); } GLAPI void APIENTRY glMultiDrawElementsEXT(GLenum mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1114]; + mapi_func _func = ((const mapi_func *) _tbl)[1115]; ((void (APIENTRY *)(GLenum mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount)) _func)(mode, count, type, indices, primcount); } GLAPI void APIENTRY glAlphaFuncx(GLenum func, GLclampx ref) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1281]; + mapi_func _func = ((const mapi_func *) _tbl)[1285]; ((void (APIENTRY *)(GLenum func, GLclampx ref)) _func)(func, ref); } GLAPI void APIENTRY glClearColorx(GLclampx red, GLclampx green, GLclampx blue, GLclampx alpha) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1282]; + mapi_func _func = ((const mapi_func *) _tbl)[1286]; ((void (APIENTRY *)(GLclampx red, GLclampx green, GLclampx blue, GLclampx alpha)) _func)(red, green, blue, alpha); } GLAPI void APIENTRY glClearDepthx(GLclampx depth) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1283]; + mapi_func _func = ((const mapi_func *) _tbl)[1287]; ((void (APIENTRY *)(GLclampx depth)) _func)(depth); } GLAPI void APIENTRY glColor4x(GLfixed red, GLfixed green, GLfixed blue, GLfixed alpha) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1284]; + mapi_func _func = ((const mapi_func *) _tbl)[1288]; ((void (APIENTRY *)(GLfixed red, GLfixed green, GLfixed blue, GLfixed alpha)) _func)(red, green, blue, alpha); } GLAPI void APIENTRY glDepthRangex(GLclampx zNear, GLclampx zFar) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1285]; + mapi_func _func = ((const mapi_func *) _tbl)[1289]; ((void (APIENTRY *)(GLclampx zNear, GLclampx zFar)) _func)(zNear, zFar); } GLAPI void APIENTRY glFogx(GLenum pname, GLfixed param) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1286]; + mapi_func _func = ((const mapi_func *) _tbl)[1290]; ((void (APIENTRY *)(GLenum pname, GLfixed param)) _func)(pname, param); } GLAPI void APIENTRY glFogxv(GLenum pname, const GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1287]; + mapi_func _func = ((const mapi_func *) _tbl)[1291]; ((void (APIENTRY *)(GLenum pname, const GLfixed *params)) _func)(pname, params); } GLAPI void APIENTRY glFrustumf(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1288]; + mapi_func _func = ((const mapi_func *) _tbl)[1292]; ((void (APIENTRY *)(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar)) _func)(left, right, bottom, top, zNear, zFar); } GLAPI void APIENTRY glFrustumx(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1289]; + mapi_func _func = ((const mapi_func *) _tbl)[1293]; ((void (APIENTRY *)(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar)) _func)(left, right, bottom, top, zNear, zFar); } GLAPI void APIENTRY glLightModelx(GLenum pname, GLfixed param) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1290]; + mapi_func _func = ((const mapi_func *) _tbl)[1294]; ((void (APIENTRY *)(GLenum pname, GLfixed param)) _func)(pname, param); } GLAPI void APIENTRY glLightModelxv(GLenum pname, const GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1291]; + mapi_func _func = ((const mapi_func *) _tbl)[1295]; ((void (APIENTRY *)(GLenum pname, const GLfixed *params)) _func)(pname, params); } GLAPI void APIENTRY glLightx(GLenum light, GLenum pname, GLfixed param) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1292]; + mapi_func _func = ((const mapi_func *) _tbl)[1296]; ((void (APIENTRY *)(GLenum light, GLenum pname, GLfixed param)) _func)(light, pname, param); } GLAPI void APIENTRY glLightxv(GLenum light, GLenum pname, const GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1293]; + mapi_func _func = ((const mapi_func *) _tbl)[1297]; ((void (APIENTRY *)(GLenum light, GLenum pname, const GLfixed *params)) _func)(light, pname, params); } GLAPI void APIENTRY glLineWidthx(GLfixed width) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1294]; + mapi_func _func = ((const mapi_func *) _tbl)[1298]; ((void (APIENTRY *)(GLfixed width)) _func)(width); } GLAPI void APIENTRY glLoadMatrixx(const GLfixed *m) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1295]; + mapi_func _func = ((const mapi_func *) _tbl)[1299]; ((void (APIENTRY *)(const GLfixed *m)) _func)(m); } GLAPI void APIENTRY glMaterialx(GLenum face, GLenum pname, GLfixed param) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1296]; + mapi_func _func = ((const mapi_func *) _tbl)[1300]; ((void (APIENTRY *)(GLenum face, GLenum pname, GLfixed param)) _func)(face, pname, param); } GLAPI void APIENTRY glMaterialxv(GLenum face, GLenum pname, const GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1297]; + mapi_func _func = ((const mapi_func *) _tbl)[1301]; ((void (APIENTRY *)(GLenum face, GLenum pname, const GLfixed *params)) _func)(face, pname, params); } GLAPI void APIENTRY glMultMatrixx(const GLfixed *m) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1298]; + mapi_func _func = ((const mapi_func *) _tbl)[1302]; ((void (APIENTRY *)(const GLfixed *m)) _func)(m); } GLAPI void APIENTRY glMultiTexCoord4x(GLenum target, GLfixed s, GLfixed t, GLfixed r, GLfixed q) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1299]; + mapi_func _func = ((const mapi_func *) _tbl)[1303]; ((void (APIENTRY *)(GLenum target, GLfixed s, GLfixed t, GLfixed r, GLfixed q)) _func)(target, s, t, r, q); } GLAPI void APIENTRY glNormal3x(GLfixed nx, GLfixed ny, GLfixed nz) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1300]; + mapi_func _func = ((const mapi_func *) _tbl)[1304]; ((void (APIENTRY *)(GLfixed nx, GLfixed ny, GLfixed nz)) _func)(nx, ny, nz); } GLAPI void APIENTRY glOrthof(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1301]; + mapi_func _func = ((const mapi_func *) _tbl)[1305]; ((void (APIENTRY *)(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar)) _func)(left, right, bottom, top, zNear, zFar); } GLAPI void APIENTRY glOrthox(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1302]; + mapi_func _func = ((const mapi_func *) _tbl)[1306]; ((void (APIENTRY *)(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar)) _func)(left, right, bottom, top, zNear, zFar); } GLAPI void APIENTRY glPointSizex(GLfixed size) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1303]; + mapi_func _func = ((const mapi_func *) _tbl)[1307]; ((void (APIENTRY *)(GLfixed size)) _func)(size); } GLAPI void APIENTRY glPolygonOffsetx(GLfixed factor, GLfixed units) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1304]; + mapi_func _func = ((const mapi_func *) _tbl)[1308]; ((void (APIENTRY *)(GLfixed factor, GLfixed units)) _func)(factor, units); } GLAPI void APIENTRY glRotatex(GLfixed angle, GLfixed x, GLfixed y, GLfixed z) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1305]; + mapi_func _func = ((const mapi_func *) _tbl)[1309]; ((void (APIENTRY *)(GLfixed angle, GLfixed x, GLfixed y, GLfixed z)) _func)(angle, x, y, z); } GLAPI void APIENTRY glSampleCoveragex(GLclampx value, GLboolean invert) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1306]; + mapi_func _func = ((const mapi_func *) _tbl)[1310]; ((void (APIENTRY *)(GLclampx value, GLboolean invert)) _func)(value, invert); } GLAPI void APIENTRY glScalex(GLfixed x, GLfixed y, GLfixed z) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1307]; + mapi_func _func = ((const mapi_func *) _tbl)[1311]; ((void (APIENTRY *)(GLfixed x, GLfixed y, GLfixed z)) _func)(x, y, z); } GLAPI void APIENTRY glTexEnvx(GLenum target, GLenum pname, GLfixed param) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1308]; + mapi_func _func = ((const mapi_func *) _tbl)[1312]; ((void (APIENTRY *)(GLenum target, GLenum pname, GLfixed param)) _func)(target, pname, param); } GLAPI void APIENTRY glTexEnvxv(GLenum target, GLenum pname, const GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1309]; + mapi_func _func = ((const mapi_func *) _tbl)[1313]; ((void (APIENTRY *)(GLenum target, GLenum pname, const GLfixed *params)) _func)(target, pname, params); } GLAPI void APIENTRY glTexParameterx(GLenum target, GLenum pname, GLfixed param) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1310]; + mapi_func _func = ((const mapi_func *) _tbl)[1314]; ((void (APIENTRY *)(GLenum target, GLenum pname, GLfixed param)) _func)(target, pname, param); } GLAPI void APIENTRY glTranslatex(GLfixed x, GLfixed y, GLfixed z) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1311]; + mapi_func _func = ((const mapi_func *) _tbl)[1315]; ((void (APIENTRY *)(GLfixed x, GLfixed y, GLfixed z)) _func)(x, y, z); } GLAPI void APIENTRY glClipPlanef(GLenum plane, const GLfloat *equation) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1312]; + mapi_func _func = ((const mapi_func *) _tbl)[1316]; ((void (APIENTRY *)(GLenum plane, const GLfloat *equation)) _func)(plane, equation); } GLAPI void APIENTRY glClipPlanex(GLenum plane, const GLfixed *equation) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1313]; + mapi_func _func = ((const mapi_func *) _tbl)[1317]; ((void (APIENTRY *)(GLenum plane, const GLfixed *equation)) _func)(plane, equation); } GLAPI void APIENTRY glGetClipPlanef(GLenum plane, GLfloat *equation) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1314]; + mapi_func _func = ((const mapi_func *) _tbl)[1318]; ((void (APIENTRY *)(GLenum plane, GLfloat *equation)) _func)(plane, equation); } GLAPI void APIENTRY glGetClipPlanex(GLenum plane, GLfixed *equation) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1315]; + mapi_func _func = ((const mapi_func *) _tbl)[1319]; ((void (APIENTRY *)(GLenum plane, GLfixed *equation)) _func)(plane, equation); } GLAPI void APIENTRY glGetFixedv(GLenum pname, GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1316]; + mapi_func _func = ((const mapi_func *) _tbl)[1320]; ((void (APIENTRY *)(GLenum pname, GLfixed *params)) _func)(pname, params); } GLAPI void APIENTRY glGetLightxv(GLenum light, GLenum pname, GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1317]; + mapi_func _func = ((const mapi_func *) _tbl)[1321]; ((void (APIENTRY *)(GLenum light, GLenum pname, GLfixed *params)) _func)(light, pname, params); } GLAPI void APIENTRY glGetMaterialxv(GLenum face, GLenum pname, GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1318]; + mapi_func _func = ((const mapi_func *) _tbl)[1322]; ((void (APIENTRY *)(GLenum face, GLenum pname, GLfixed *params)) _func)(face, pname, params); } GLAPI void APIENTRY glGetTexEnvxv(GLenum target, GLenum pname, GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1319]; + mapi_func _func = ((const mapi_func *) _tbl)[1323]; ((void (APIENTRY *)(GLenum target, GLenum pname, GLfixed *params)) _func)(target, pname, params); } GLAPI void APIENTRY glGetTexParameterxv(GLenum target, GLenum pname, GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1320]; + mapi_func _func = ((const mapi_func *) _tbl)[1324]; ((void (APIENTRY *)(GLenum target, GLenum pname, GLfixed *params)) _func)(target, pname, params); } GLAPI void APIENTRY glPointParameterx(GLenum pname, GLfixed param) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1321]; + mapi_func _func = ((const mapi_func *) _tbl)[1325]; ((void (APIENTRY *)(GLenum pname, GLfixed param)) _func)(pname, param); } GLAPI void APIENTRY glPointParameterxv(GLenum pname, const GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1322]; + mapi_func _func = ((const mapi_func *) _tbl)[1326]; ((void (APIENTRY *)(GLenum pname, const GLfixed *params)) _func)(pname, params); } GLAPI void APIENTRY glTexParameterxv(GLenum target, GLenum pname, const GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1323]; + mapi_func _func = ((const mapi_func *) _tbl)[1327]; ((void (APIENTRY *)(GLenum target, GLenum pname, const GLfixed *params)) _func)(target, pname, params); } @@ -2682,139 +2688,139 @@ "\t"STUB_ASM_CODE("814")"\n" STUB_ASM_ENTRY("glPointSizePointerOES")"\n" -"\t"STUB_ASM_CODE("1029")"\n" +"\t"STUB_ASM_CODE("1030")"\n" STUB_ASM_ENTRY("glMultiDrawElementsEXT")"\n" -"\t"STUB_ASM_CODE("1114")"\n" +"\t"STUB_ASM_CODE("1115")"\n" STUB_ASM_ENTRY("glAlphaFuncx")"\n" -"\t"STUB_ASM_CODE("1281")"\n" +"\t"STUB_ASM_CODE("1285")"\n" STUB_ASM_ENTRY("glClearColorx")"\n" -"\t"STUB_ASM_CODE("1282")"\n" +"\t"STUB_ASM_CODE("1286")"\n" STUB_ASM_ENTRY("glClearDepthx")"\n" -"\t"STUB_ASM_CODE("1283")"\n" +"\t"STUB_ASM_CODE("1287")"\n" STUB_ASM_ENTRY("glColor4x")"\n" -"\t"STUB_ASM_CODE("1284")"\n" +"\t"STUB_ASM_CODE("1288")"\n" STUB_ASM_ENTRY("glDepthRangex")"\n" -"\t"STUB_ASM_CODE("1285")"\n" +"\t"STUB_ASM_CODE("1289")"\n" STUB_ASM_ENTRY("glFogx")"\n" -"\t"STUB_ASM_CODE("1286")"\n" +"\t"STUB_ASM_CODE("1290")"\n" STUB_ASM_ENTRY("glFogxv")"\n" -"\t"STUB_ASM_CODE("1287")"\n" +"\t"STUB_ASM_CODE("1291")"\n" STUB_ASM_ENTRY("glFrustumf")"\n" -"\t"STUB_ASM_CODE("1288")"\n" +"\t"STUB_ASM_CODE("1292")"\n" STUB_ASM_ENTRY("glFrustumx")"\n" -"\t"STUB_ASM_CODE("1289")"\n" +"\t"STUB_ASM_CODE("1293")"\n" STUB_ASM_ENTRY("glLightModelx")"\n" -"\t"STUB_ASM_CODE("1290")"\n" +"\t"STUB_ASM_CODE("1294")"\n" STUB_ASM_ENTRY("glLightModelxv")"\n" -"\t"STUB_ASM_CODE("1291")"\n" +"\t"STUB_ASM_CODE("1295")"\n" STUB_ASM_ENTRY("glLightx")"\n" -"\t"STUB_ASM_CODE("1292")"\n" +"\t"STUB_ASM_CODE("1296")"\n" STUB_ASM_ENTRY("glLightxv")"\n" -"\t"STUB_ASM_CODE("1293")"\n" +"\t"STUB_ASM_CODE("1297")"\n" STUB_ASM_ENTRY("glLineWidthx")"\n" -"\t"STUB_ASM_CODE("1294")"\n" +"\t"STUB_ASM_CODE("1298")"\n" STUB_ASM_ENTRY("glLoadMatrixx")"\n" -"\t"STUB_ASM_CODE("1295")"\n" +"\t"STUB_ASM_CODE("1299")"\n" STUB_ASM_ENTRY("glMaterialx")"\n" -"\t"STUB_ASM_CODE("1296")"\n" +"\t"STUB_ASM_CODE("1300")"\n" STUB_ASM_ENTRY("glMaterialxv")"\n" -"\t"STUB_ASM_CODE("1297")"\n" +"\t"STUB_ASM_CODE("1301")"\n" STUB_ASM_ENTRY("glMultMatrixx")"\n" -"\t"STUB_ASM_CODE("1298")"\n" +"\t"STUB_ASM_CODE("1302")"\n" STUB_ASM_ENTRY("glMultiTexCoord4x")"\n" -"\t"STUB_ASM_CODE("1299")"\n" +"\t"STUB_ASM_CODE("1303")"\n" STUB_ASM_ENTRY("glNormal3x")"\n" -"\t"STUB_ASM_CODE("1300")"\n" +"\t"STUB_ASM_CODE("1304")"\n" STUB_ASM_ENTRY("glOrthof")"\n" -"\t"STUB_ASM_CODE("1301")"\n" +"\t"STUB_ASM_CODE("1305")"\n" STUB_ASM_ENTRY("glOrthox")"\n" -"\t"STUB_ASM_CODE("1302")"\n" +"\t"STUB_ASM_CODE("1306")"\n" STUB_ASM_ENTRY("glPointSizex")"\n" -"\t"STUB_ASM_CODE("1303")"\n" +"\t"STUB_ASM_CODE("1307")"\n" STUB_ASM_ENTRY("glPolygonOffsetx")"\n" -"\t"STUB_ASM_CODE("1304")"\n" +"\t"STUB_ASM_CODE("1308")"\n" STUB_ASM_ENTRY("glRotatex")"\n" -"\t"STUB_ASM_CODE("1305")"\n" +"\t"STUB_ASM_CODE("1309")"\n" STUB_ASM_ENTRY("glSampleCoveragex")"\n" -"\t"STUB_ASM_CODE("1306")"\n" +"\t"STUB_ASM_CODE("1310")"\n" STUB_ASM_ENTRY("glScalex")"\n" -"\t"STUB_ASM_CODE("1307")"\n" +"\t"STUB_ASM_CODE("1311")"\n" STUB_ASM_ENTRY("glTexEnvx")"\n" -"\t"STUB_ASM_CODE("1308")"\n" +"\t"STUB_ASM_CODE("1312")"\n" STUB_ASM_ENTRY("glTexEnvxv")"\n" -"\t"STUB_ASM_CODE("1309")"\n" +"\t"STUB_ASM_CODE("1313")"\n" STUB_ASM_ENTRY("glTexParameterx")"\n" -"\t"STUB_ASM_CODE("1310")"\n" +"\t"STUB_ASM_CODE("1314")"\n" STUB_ASM_ENTRY("glTranslatex")"\n" -"\t"STUB_ASM_CODE("1311")"\n" +"\t"STUB_ASM_CODE("1315")"\n" STUB_ASM_ENTRY("glClipPlanef")"\n" -"\t"STUB_ASM_CODE("1312")"\n" +"\t"STUB_ASM_CODE("1316")"\n" STUB_ASM_ENTRY("glClipPlanex")"\n" -"\t"STUB_ASM_CODE("1313")"\n" +"\t"STUB_ASM_CODE("1317")"\n" STUB_ASM_ENTRY("glGetClipPlanef")"\n" -"\t"STUB_ASM_CODE("1314")"\n" +"\t"STUB_ASM_CODE("1318")"\n" STUB_ASM_ENTRY("glGetClipPlanex")"\n" -"\t"STUB_ASM_CODE("1315")"\n" +"\t"STUB_ASM_CODE("1319")"\n" STUB_ASM_ENTRY("glGetFixedv")"\n" -"\t"STUB_ASM_CODE("1316")"\n" +"\t"STUB_ASM_CODE("1320")"\n" STUB_ASM_ENTRY("glGetLightxv")"\n" -"\t"STUB_ASM_CODE("1317")"\n" +"\t"STUB_ASM_CODE("1321")"\n" STUB_ASM_ENTRY("glGetMaterialxv")"\n" -"\t"STUB_ASM_CODE("1318")"\n" +"\t"STUB_ASM_CODE("1322")"\n" STUB_ASM_ENTRY("glGetTexEnvxv")"\n" -"\t"STUB_ASM_CODE("1319")"\n" +"\t"STUB_ASM_CODE("1323")"\n" STUB_ASM_ENTRY("glGetTexParameterxv")"\n" -"\t"STUB_ASM_CODE("1320")"\n" +"\t"STUB_ASM_CODE("1324")"\n" STUB_ASM_ENTRY("glPointParameterx")"\n" -"\t"STUB_ASM_CODE("1321")"\n" +"\t"STUB_ASM_CODE("1325")"\n" STUB_ASM_ENTRY("glPointParameterxv")"\n" -"\t"STUB_ASM_CODE("1322")"\n" +"\t"STUB_ASM_CODE("1326")"\n" STUB_ASM_ENTRY("glTexParameterxv")"\n" -"\t"STUB_ASM_CODE("1323")"\n" +"\t"STUB_ASM_CODE("1327")"\n" ); #undef MAPI_TMP_STUB_ASM_GCC_NO_HIDDEN diff -Nru mesa-12.0.6/src/mapi/es2api/glapi_mapi_tmp.h mesa-17.0.7/src/mapi/es2api/glapi_mapi_tmp.h --- mesa-12.0.6/src/mapi/es2api/glapi_mapi_tmp.h 2017-01-24 01:43:13.000000000 +0000 +++ mesa-17.0.7/src/mapi/es2api/glapi_mapi_tmp.h 2017-06-01 10:37:57.000000000 +0000 @@ -339,7 +339,7 @@ GLAPI void APIENTRY glCopyTexSubImage2D(GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height); GLAPI void APIENTRY glDeleteTextures(GLsizei n, const GLuint *textures); GLAPI void APIENTRY glGenTextures(GLsizei n, GLuint *textures); -void APIENTRY gl_dispatch_stub_329(GLenum pname, GLvoid **params); +GLAPI void APIENTRY glGetPointerv(GLenum pname, GLvoid **params); GLAPI GLboolean APIENTRY glIsTexture(GLuint texture); void APIENTRY gl_dispatch_stub_331(GLsizei n, const GLuint *textures, const GLclampf *priorities); void APIENTRY gl_dispatch_stub_332(GLenum target, GLint level, GLint xoffset, GLsizei width, GLenum format, GLenum type, const GLvoid *pixels); @@ -738,9 +738,13 @@ void APIENTRY gl_dispatch_stub_709(GLenum target, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations); void APIENTRY gl_dispatch_stub_710(GLenum target, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedsamplelocations); void APIENTRY gl_dispatch_stub_711(GLuint buf, GLenum modeRGB, GLenum modeA); +GLAPI void APIENTRY glBlendEquationSeparatei(GLuint buf, GLenum modeRGB, GLenum modeA); void APIENTRY gl_dispatch_stub_712(GLuint buf, GLenum mode); +GLAPI void APIENTRY glBlendEquationi(GLuint buf, GLenum mode); void APIENTRY gl_dispatch_stub_713(GLuint buf, GLenum srcRGB, GLenum dstRGB, GLenum srcA, GLenum dstA); +GLAPI void APIENTRY glBlendFuncSeparatei(GLuint buf, GLenum sfactorRGB, GLenum dfactorRGB, GLenum sfactorAlpha, GLenum dfactorAlpha); void APIENTRY gl_dispatch_stub_714(GLuint buf, GLenum src, GLenum dst); +GLAPI void APIENTRY glBlendFunci(GLuint buf, GLenum sfactor, GLenum dfactor); void APIENTRY gl_dispatch_stub_715(GLuint program, GLuint colorNumber, GLuint index, const GLchar *name); GLint APIENTRY gl_dispatch_stub_716(GLuint program, const GLchar *name); GLAPI void APIENTRY glBindSampler(GLuint unit, GLuint sampler); @@ -827,7 +831,7 @@ void APIENTRY gl_dispatch_stub_798(GLenum shadertype, GLint location, GLuint *params); void APIENTRY gl_dispatch_stub_799(GLenum shadertype, GLsizei count, const GLuint *indices); void APIENTRY gl_dispatch_stub_800(GLenum pname, const GLfloat *values); -void APIENTRY gl_dispatch_stub_801(GLenum pname, GLint value); +GLAPI void APIENTRY glPatchParameteri(GLenum pname, GLint value); GLAPI void APIENTRY glBindTransformFeedback(GLenum target, GLuint id); GLAPI void APIENTRY glDeleteTransformFeedbacks(GLsizei n, const GLuint *ids); void APIENTRY gl_dispatch_stub_804(GLenum mode, GLuint id); @@ -868,6 +872,7 @@ void APIENTRY gl_dispatch_stub_839(GLuint index, GLfloat x, GLfloat y, GLfloat w, GLfloat h); void APIENTRY gl_dispatch_stub_840(GLuint index, const GLfloat *v); GLenum APIENTRY gl_dispatch_stub_841(void); +GLAPI GLenum APIENTRY glGetGraphicsResetStatus(void); void APIENTRY gl_dispatch_stub_842(GLenum target, GLenum format, GLenum type, GLsizei bufSize, GLvoid *table); void APIENTRY gl_dispatch_stub_843(GLenum target, GLint lod, GLsizei bufSize, GLvoid *img); void APIENTRY gl_dispatch_stub_844(GLenum target, GLenum format, GLenum type, GLsizei bufSize, GLvoid *image); @@ -884,9 +889,13 @@ void APIENTRY gl_dispatch_stub_855(GLenum target, GLint level, GLenum format, GLenum type, GLsizei bufSize, GLvoid *img); void APIENTRY gl_dispatch_stub_856(GLuint program, GLint location, GLsizei bufSize, GLdouble *params); void APIENTRY gl_dispatch_stub_857(GLuint program, GLint location, GLsizei bufSize, GLfloat *params); +GLAPI void APIENTRY glGetnUniformfv(GLuint program, GLint location, GLsizei bufSize, GLfloat *params); void APIENTRY gl_dispatch_stub_858(GLuint program, GLint location, GLsizei bufSize, GLint *params); +GLAPI void APIENTRY glGetnUniformiv(GLuint program, GLint location, GLsizei bufSize, GLint *params); void APIENTRY gl_dispatch_stub_859(GLuint program, GLint location, GLsizei bufSize, GLuint *params); +GLAPI void APIENTRY glGetnUniformuiv(GLuint program, GLint location, GLsizei bufSize, GLuint *params); void APIENTRY gl_dispatch_stub_860(GLint x, GLint y, GLsizei width, GLsizei height, GLenum format, GLenum type, GLsizei bufSize, GLvoid *data); +GLAPI void APIENTRY glReadnPixels(GLint x, GLint y, GLsizei width, GLsizei height, GLenum format, GLenum type, GLsizei bufSize, GLvoid *data); void APIENTRY gl_dispatch_stub_861(GLenum mode, GLint first, GLsizei count, GLsizei primcount, GLuint baseinstance); void APIENTRY gl_dispatch_stub_862(GLenum mode, GLsizei count, GLenum type, const GLvoid *indices, GLsizei primcount, GLuint baseinstance); void APIENTRY gl_dispatch_stub_863(GLenum mode, GLsizei count, GLenum type, const GLvoid *indices, GLsizei primcount, GLint basevertex, GLuint baseinstance); @@ -938,134 +947,135 @@ void APIENTRY gl_dispatch_stub_909(GLuint first, GLsizei count, const GLuint *samplers); void APIENTRY gl_dispatch_stub_910(GLuint first, GLsizei count, const GLuint *textures); void APIENTRY gl_dispatch_stub_911(GLuint first, GLsizei count, const GLuint *buffers, const GLintptr *offsets, const GLsizei *strides); -void APIENTRY gl_dispatch_stub_912(GLenum mode, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); -void APIENTRY gl_dispatch_stub_913(GLenum mode, GLenum type, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); -void APIENTRY gl_dispatch_stub_914(GLenum origin, GLenum depth); -void APIENTRY gl_dispatch_stub_915(GLuint unit, GLuint texture); -void APIENTRY gl_dispatch_stub_916(GLuint readFramebuffer, GLuint drawFramebuffer, GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter); -GLenum APIENTRY gl_dispatch_stub_917(GLuint framebuffer, GLenum target); -void APIENTRY gl_dispatch_stub_918(GLuint buffer, GLenum internalformat, GLenum format, GLenum type, const GLvoid *data); -void APIENTRY gl_dispatch_stub_919(GLuint buffer, GLenum internalformat, GLintptr offset, GLsizeiptr size, GLenum format, GLenum type, const GLvoid *data); -void APIENTRY gl_dispatch_stub_920(GLuint framebuffer, GLenum buffer, GLint drawbuffer, GLfloat depth, GLint stencil); -void APIENTRY gl_dispatch_stub_921(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLfloat *value); -void APIENTRY gl_dispatch_stub_922(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLint *value); -void APIENTRY gl_dispatch_stub_923(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLuint *value); -void APIENTRY gl_dispatch_stub_924(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLsizei imageSize, const GLvoid *data); -void APIENTRY gl_dispatch_stub_925(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const GLvoid *data); -void APIENTRY gl_dispatch_stub_926(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid *data); -void APIENTRY gl_dispatch_stub_927(GLuint readBuffer, GLuint writeBuffer, GLintptr readOffset, GLintptr writeOffset, GLsizeiptr size); -void APIENTRY gl_dispatch_stub_928(GLuint texture, GLint level, GLint xoffset, GLint x, GLint y, GLsizei width); -void APIENTRY gl_dispatch_stub_929(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height); -void APIENTRY gl_dispatch_stub_930(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height); -void APIENTRY gl_dispatch_stub_931(GLsizei n, GLuint *buffers); -void APIENTRY gl_dispatch_stub_932(GLsizei n, GLuint *framebuffers); -void APIENTRY gl_dispatch_stub_933(GLsizei n, GLuint *pipelines); -void APIENTRY gl_dispatch_stub_934(GLenum target, GLsizei n, GLuint *ids); -void APIENTRY gl_dispatch_stub_935(GLsizei n, GLuint *renderbuffers); -void APIENTRY gl_dispatch_stub_936(GLsizei n, GLuint *samplers); -void APIENTRY gl_dispatch_stub_937(GLenum target, GLsizei n, GLuint *textures); -void APIENTRY gl_dispatch_stub_938(GLsizei n, GLuint *ids); -void APIENTRY gl_dispatch_stub_939(GLsizei n, GLuint *arrays); -void APIENTRY gl_dispatch_stub_940(GLuint vaobj, GLuint index); +void APIENTRY gl_dispatch_stub_912(GLuint num_groups_x, GLuint num_groups_y, GLuint num_groups_z, GLuint group_size_x, GLuint group_size_y, GLuint group_size_z); +void APIENTRY gl_dispatch_stub_913(GLenum mode, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); +void APIENTRY gl_dispatch_stub_914(GLenum mode, GLenum type, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); +void APIENTRY gl_dispatch_stub_915(GLenum origin, GLenum depth); +void APIENTRY gl_dispatch_stub_916(GLuint unit, GLuint texture); +void APIENTRY gl_dispatch_stub_917(GLuint readFramebuffer, GLuint drawFramebuffer, GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter); +GLenum APIENTRY gl_dispatch_stub_918(GLuint framebuffer, GLenum target); +void APIENTRY gl_dispatch_stub_919(GLuint buffer, GLenum internalformat, GLenum format, GLenum type, const GLvoid *data); +void APIENTRY gl_dispatch_stub_920(GLuint buffer, GLenum internalformat, GLintptr offset, GLsizeiptr size, GLenum format, GLenum type, const GLvoid *data); +void APIENTRY gl_dispatch_stub_921(GLuint framebuffer, GLenum buffer, GLint drawbuffer, GLfloat depth, GLint stencil); +void APIENTRY gl_dispatch_stub_922(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLfloat *value); +void APIENTRY gl_dispatch_stub_923(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLint *value); +void APIENTRY gl_dispatch_stub_924(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLuint *value); +void APIENTRY gl_dispatch_stub_925(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLsizei imageSize, const GLvoid *data); +void APIENTRY gl_dispatch_stub_926(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const GLvoid *data); +void APIENTRY gl_dispatch_stub_927(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid *data); +void APIENTRY gl_dispatch_stub_928(GLuint readBuffer, GLuint writeBuffer, GLintptr readOffset, GLintptr writeOffset, GLsizeiptr size); +void APIENTRY gl_dispatch_stub_929(GLuint texture, GLint level, GLint xoffset, GLint x, GLint y, GLsizei width); +void APIENTRY gl_dispatch_stub_930(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height); +void APIENTRY gl_dispatch_stub_931(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height); +void APIENTRY gl_dispatch_stub_932(GLsizei n, GLuint *buffers); +void APIENTRY gl_dispatch_stub_933(GLsizei n, GLuint *framebuffers); +void APIENTRY gl_dispatch_stub_934(GLsizei n, GLuint *pipelines); +void APIENTRY gl_dispatch_stub_935(GLenum target, GLsizei n, GLuint *ids); +void APIENTRY gl_dispatch_stub_936(GLsizei n, GLuint *renderbuffers); +void APIENTRY gl_dispatch_stub_937(GLsizei n, GLuint *samplers); +void APIENTRY gl_dispatch_stub_938(GLenum target, GLsizei n, GLuint *textures); +void APIENTRY gl_dispatch_stub_939(GLsizei n, GLuint *ids); +void APIENTRY gl_dispatch_stub_940(GLsizei n, GLuint *arrays); void APIENTRY gl_dispatch_stub_941(GLuint vaobj, GLuint index); -void APIENTRY gl_dispatch_stub_942(GLuint buffer, GLintptr offset, GLsizeiptr length); -void APIENTRY gl_dispatch_stub_943(GLuint texture); -void APIENTRY gl_dispatch_stub_944(GLuint texture, GLint level, GLsizei bufSize, GLvoid *pixels); -void APIENTRY gl_dispatch_stub_945(GLuint buffer, GLenum pname, GLint64 *params); -void APIENTRY gl_dispatch_stub_946(GLuint buffer, GLenum pname, GLint *params); -void APIENTRY gl_dispatch_stub_947(GLuint buffer, GLenum pname, GLvoid **params); -void APIENTRY gl_dispatch_stub_948(GLuint buffer, GLintptr offset, GLsizeiptr size, GLvoid *data); -void APIENTRY gl_dispatch_stub_949(GLuint framebuffer, GLenum attachment, GLenum pname, GLint *params); -void APIENTRY gl_dispatch_stub_950(GLuint framebuffer, GLenum pname, GLint *param); -void APIENTRY gl_dispatch_stub_951(GLuint renderbuffer, GLenum pname, GLint *params); -void APIENTRY gl_dispatch_stub_952(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); +void APIENTRY gl_dispatch_stub_942(GLuint vaobj, GLuint index); +void APIENTRY gl_dispatch_stub_943(GLuint buffer, GLintptr offset, GLsizeiptr length); +void APIENTRY gl_dispatch_stub_944(GLuint texture); +void APIENTRY gl_dispatch_stub_945(GLuint texture, GLint level, GLsizei bufSize, GLvoid *pixels); +void APIENTRY gl_dispatch_stub_946(GLuint buffer, GLenum pname, GLint64 *params); +void APIENTRY gl_dispatch_stub_947(GLuint buffer, GLenum pname, GLint *params); +void APIENTRY gl_dispatch_stub_948(GLuint buffer, GLenum pname, GLvoid **params); +void APIENTRY gl_dispatch_stub_949(GLuint buffer, GLintptr offset, GLsizeiptr size, GLvoid *data); +void APIENTRY gl_dispatch_stub_950(GLuint framebuffer, GLenum attachment, GLenum pname, GLint *params); +void APIENTRY gl_dispatch_stub_951(GLuint framebuffer, GLenum pname, GLint *param); +void APIENTRY gl_dispatch_stub_952(GLuint renderbuffer, GLenum pname, GLint *params); void APIENTRY gl_dispatch_stub_953(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); void APIENTRY gl_dispatch_stub_954(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); void APIENTRY gl_dispatch_stub_955(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); -void APIENTRY gl_dispatch_stub_956(GLuint texture, GLint level, GLenum format, GLenum type, GLsizei bufSize, GLvoid *pixels); -void APIENTRY gl_dispatch_stub_957(GLuint texture, GLint level, GLenum pname, GLfloat *params); -void APIENTRY gl_dispatch_stub_958(GLuint texture, GLint level, GLenum pname, GLint *params); -void APIENTRY gl_dispatch_stub_959(GLuint texture, GLenum pname, GLint *params); -void APIENTRY gl_dispatch_stub_960(GLuint texture, GLenum pname, GLuint *params); -void APIENTRY gl_dispatch_stub_961(GLuint texture, GLenum pname, GLfloat *params); -void APIENTRY gl_dispatch_stub_962(GLuint texture, GLenum pname, GLint *params); -void APIENTRY gl_dispatch_stub_963(GLuint xfb, GLenum pname, GLuint index, GLint64 *param); -void APIENTRY gl_dispatch_stub_964(GLuint xfb, GLenum pname, GLuint index, GLint *param); -void APIENTRY gl_dispatch_stub_965(GLuint xfb, GLenum pname, GLint *param); -void APIENTRY gl_dispatch_stub_966(GLuint vaobj, GLuint index, GLenum pname, GLint64 *param); -void APIENTRY gl_dispatch_stub_967(GLuint vaobj, GLuint index, GLenum pname, GLint *param); -void APIENTRY gl_dispatch_stub_968(GLuint vaobj, GLenum pname, GLint *param); -void APIENTRY gl_dispatch_stub_969(GLuint framebuffer, GLsizei numAttachments, const GLenum *attachments); -void APIENTRY gl_dispatch_stub_970(GLuint framebuffer, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height); -GLvoid * APIENTRY gl_dispatch_stub_971(GLuint buffer, GLenum access); -GLvoid * APIENTRY gl_dispatch_stub_972(GLuint buffer, GLintptr offset, GLsizeiptr length, GLbitfield access); -void APIENTRY gl_dispatch_stub_973(GLuint buffer, GLsizeiptr size, const GLvoid *data, GLenum usage); -void APIENTRY gl_dispatch_stub_974(GLuint buffer, GLsizeiptr size, const GLvoid *data, GLbitfield flags); -void APIENTRY gl_dispatch_stub_975(GLuint buffer, GLintptr offset, GLsizeiptr size, const GLvoid *data); -void APIENTRY gl_dispatch_stub_976(GLuint framebuffer, GLenum buf); -void APIENTRY gl_dispatch_stub_977(GLuint framebuffer, GLsizei n, const GLenum *bufs); -void APIENTRY gl_dispatch_stub_978(GLuint framebuffer, GLenum pname, GLint param); -void APIENTRY gl_dispatch_stub_979(GLuint framebuffer, GLenum buf); -void APIENTRY gl_dispatch_stub_980(GLuint framebuffer, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer); -void APIENTRY gl_dispatch_stub_981(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level); -void APIENTRY gl_dispatch_stub_982(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level, GLint layer); -void APIENTRY gl_dispatch_stub_983(GLuint renderbuffer, GLenum internalformat, GLsizei width, GLsizei height); -void APIENTRY gl_dispatch_stub_984(GLuint renderbuffer, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height); -void APIENTRY gl_dispatch_stub_985(GLuint texture, GLenum internalformat, GLuint buffer); -void APIENTRY gl_dispatch_stub_986(GLuint texture, GLenum internalformat, GLuint buffer, GLintptr offset, GLsizeiptr size); -void APIENTRY gl_dispatch_stub_987(GLuint texture, GLenum pname, const GLint *params); -void APIENTRY gl_dispatch_stub_988(GLuint texture, GLenum pname, const GLuint *params); -void APIENTRY gl_dispatch_stub_989(GLuint texture, GLenum pname, GLfloat param); -void APIENTRY gl_dispatch_stub_990(GLuint texture, GLenum pname, const GLfloat *param); -void APIENTRY gl_dispatch_stub_991(GLuint texture, GLenum pname, GLint param); -void APIENTRY gl_dispatch_stub_992(GLuint texture, GLenum pname, const GLint *param); -void APIENTRY gl_dispatch_stub_993(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width); -void APIENTRY gl_dispatch_stub_994(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height); -void APIENTRY gl_dispatch_stub_995(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations); -void APIENTRY gl_dispatch_stub_996(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth); -void APIENTRY gl_dispatch_stub_997(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedsamplelocations); -void APIENTRY gl_dispatch_stub_998(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLenum type, const GLvoid *pixels); -void APIENTRY gl_dispatch_stub_999(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid *pixels); -void APIENTRY gl_dispatch_stub_1000(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid *pixels); -void APIENTRY gl_dispatch_stub_1001(GLuint xfb, GLuint index, GLuint buffer); -void APIENTRY gl_dispatch_stub_1002(GLuint xfb, GLuint index, GLuint buffer, GLintptr offset, GLsizeiptr size); -GLboolean APIENTRY gl_dispatch_stub_1003(GLuint buffer); -void APIENTRY gl_dispatch_stub_1004(GLuint vaobj, GLuint attribindex, GLuint bindingindex); -void APIENTRY gl_dispatch_stub_1005(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLboolean normalized, GLuint relativeoffset); -void APIENTRY gl_dispatch_stub_1006(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset); +void APIENTRY gl_dispatch_stub_956(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); +void APIENTRY gl_dispatch_stub_957(GLuint texture, GLint level, GLenum format, GLenum type, GLsizei bufSize, GLvoid *pixels); +void APIENTRY gl_dispatch_stub_958(GLuint texture, GLint level, GLenum pname, GLfloat *params); +void APIENTRY gl_dispatch_stub_959(GLuint texture, GLint level, GLenum pname, GLint *params); +void APIENTRY gl_dispatch_stub_960(GLuint texture, GLenum pname, GLint *params); +void APIENTRY gl_dispatch_stub_961(GLuint texture, GLenum pname, GLuint *params); +void APIENTRY gl_dispatch_stub_962(GLuint texture, GLenum pname, GLfloat *params); +void APIENTRY gl_dispatch_stub_963(GLuint texture, GLenum pname, GLint *params); +void APIENTRY gl_dispatch_stub_964(GLuint xfb, GLenum pname, GLuint index, GLint64 *param); +void APIENTRY gl_dispatch_stub_965(GLuint xfb, GLenum pname, GLuint index, GLint *param); +void APIENTRY gl_dispatch_stub_966(GLuint xfb, GLenum pname, GLint *param); +void APIENTRY gl_dispatch_stub_967(GLuint vaobj, GLuint index, GLenum pname, GLint64 *param); +void APIENTRY gl_dispatch_stub_968(GLuint vaobj, GLuint index, GLenum pname, GLint *param); +void APIENTRY gl_dispatch_stub_969(GLuint vaobj, GLenum pname, GLint *param); +void APIENTRY gl_dispatch_stub_970(GLuint framebuffer, GLsizei numAttachments, const GLenum *attachments); +void APIENTRY gl_dispatch_stub_971(GLuint framebuffer, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height); +GLvoid * APIENTRY gl_dispatch_stub_972(GLuint buffer, GLenum access); +GLvoid * APIENTRY gl_dispatch_stub_973(GLuint buffer, GLintptr offset, GLsizeiptr length, GLbitfield access); +void APIENTRY gl_dispatch_stub_974(GLuint buffer, GLsizeiptr size, const GLvoid *data, GLenum usage); +void APIENTRY gl_dispatch_stub_975(GLuint buffer, GLsizeiptr size, const GLvoid *data, GLbitfield flags); +void APIENTRY gl_dispatch_stub_976(GLuint buffer, GLintptr offset, GLsizeiptr size, const GLvoid *data); +void APIENTRY gl_dispatch_stub_977(GLuint framebuffer, GLenum buf); +void APIENTRY gl_dispatch_stub_978(GLuint framebuffer, GLsizei n, const GLenum *bufs); +void APIENTRY gl_dispatch_stub_979(GLuint framebuffer, GLenum pname, GLint param); +void APIENTRY gl_dispatch_stub_980(GLuint framebuffer, GLenum buf); +void APIENTRY gl_dispatch_stub_981(GLuint framebuffer, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer); +void APIENTRY gl_dispatch_stub_982(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level); +void APIENTRY gl_dispatch_stub_983(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level, GLint layer); +void APIENTRY gl_dispatch_stub_984(GLuint renderbuffer, GLenum internalformat, GLsizei width, GLsizei height); +void APIENTRY gl_dispatch_stub_985(GLuint renderbuffer, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height); +void APIENTRY gl_dispatch_stub_986(GLuint texture, GLenum internalformat, GLuint buffer); +void APIENTRY gl_dispatch_stub_987(GLuint texture, GLenum internalformat, GLuint buffer, GLintptr offset, GLsizeiptr size); +void APIENTRY gl_dispatch_stub_988(GLuint texture, GLenum pname, const GLint *params); +void APIENTRY gl_dispatch_stub_989(GLuint texture, GLenum pname, const GLuint *params); +void APIENTRY gl_dispatch_stub_990(GLuint texture, GLenum pname, GLfloat param); +void APIENTRY gl_dispatch_stub_991(GLuint texture, GLenum pname, const GLfloat *param); +void APIENTRY gl_dispatch_stub_992(GLuint texture, GLenum pname, GLint param); +void APIENTRY gl_dispatch_stub_993(GLuint texture, GLenum pname, const GLint *param); +void APIENTRY gl_dispatch_stub_994(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width); +void APIENTRY gl_dispatch_stub_995(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height); +void APIENTRY gl_dispatch_stub_996(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations); +void APIENTRY gl_dispatch_stub_997(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth); +void APIENTRY gl_dispatch_stub_998(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedsamplelocations); +void APIENTRY gl_dispatch_stub_999(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLenum type, const GLvoid *pixels); +void APIENTRY gl_dispatch_stub_1000(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid *pixels); +void APIENTRY gl_dispatch_stub_1001(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid *pixels); +void APIENTRY gl_dispatch_stub_1002(GLuint xfb, GLuint index, GLuint buffer); +void APIENTRY gl_dispatch_stub_1003(GLuint xfb, GLuint index, GLuint buffer, GLintptr offset, GLsizeiptr size); +GLboolean APIENTRY gl_dispatch_stub_1004(GLuint buffer); +void APIENTRY gl_dispatch_stub_1005(GLuint vaobj, GLuint attribindex, GLuint bindingindex); +void APIENTRY gl_dispatch_stub_1006(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLboolean normalized, GLuint relativeoffset); void APIENTRY gl_dispatch_stub_1007(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset); -void APIENTRY gl_dispatch_stub_1008(GLuint vaobj, GLuint bindingindex, GLuint divisor); -void APIENTRY gl_dispatch_stub_1009(GLuint vaobj, GLuint buffer); -void APIENTRY gl_dispatch_stub_1010(GLuint vaobj, GLuint bindingindex, GLuint buffer, GLintptr offset, GLsizei stride); -void APIENTRY gl_dispatch_stub_1011(GLuint vaobj, GLuint first, GLsizei count, const GLuint *buffers, const GLintptr *offsets, const GLsizei *strides); -void APIENTRY gl_dispatch_stub_1012(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLsizei bufSize, GLvoid *pixels); -void APIENTRY gl_dispatch_stub_1013(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, GLsizei bufSize, GLvoid *pixels); -void APIENTRY gl_dispatch_stub_1014(GLuint buffer); -void APIENTRY gl_dispatch_stub_1015(GLuint buffer, GLintptr offset, GLsizeiptr length); +void APIENTRY gl_dispatch_stub_1008(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset); +void APIENTRY gl_dispatch_stub_1009(GLuint vaobj, GLuint bindingindex, GLuint divisor); +void APIENTRY gl_dispatch_stub_1010(GLuint vaobj, GLuint buffer); +void APIENTRY gl_dispatch_stub_1011(GLuint vaobj, GLuint bindingindex, GLuint buffer, GLintptr offset, GLsizei stride); +void APIENTRY gl_dispatch_stub_1012(GLuint vaobj, GLuint first, GLsizei count, const GLuint *buffers, const GLintptr *offsets, const GLsizei *strides); +void APIENTRY gl_dispatch_stub_1013(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLsizei bufSize, GLvoid *pixels); +void APIENTRY gl_dispatch_stub_1014(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, GLsizei bufSize, GLvoid *pixels); +void APIENTRY gl_dispatch_stub_1015(GLuint buffer); +void APIENTRY gl_dispatch_stub_1016(GLuint buffer, GLintptr offset, GLsizeiptr length); GLAPI void APIENTRY glInvalidateFramebuffer(GLenum target, GLsizei numAttachments, const GLenum *attachments); GLAPI void APIENTRY glInvalidateSubFramebuffer(GLenum target, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height); -void APIENTRY gl_dispatch_stub_1018(GLuint texture, GLint level); -void APIENTRY gl_dispatch_stub_1019(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth); -void APIENTRY gl_dispatch_stub_1020(GLfloat factor, GLfloat bias); -void APIENTRY gl_dispatch_stub_1021(GLfloat x, GLfloat y, GLfloat z, GLfloat width, GLfloat height); -void APIENTRY gl_dispatch_stub_1022(const GLfloat *coords); -void APIENTRY gl_dispatch_stub_1023(GLint x, GLint y, GLint z, GLint width, GLint height); -void APIENTRY gl_dispatch_stub_1024(const GLint *coords); -void APIENTRY gl_dispatch_stub_1025(GLshort x, GLshort y, GLshort z, GLshort width, GLshort height); -void APIENTRY gl_dispatch_stub_1026(const GLshort *coords); -void APIENTRY gl_dispatch_stub_1027(GLfixed x, GLfixed y, GLfixed z, GLfixed width, GLfixed height); -void APIENTRY gl_dispatch_stub_1028(const GLfixed *coords); -void APIENTRY gl_dispatch_stub_1029(GLenum type, GLsizei stride, const GLvoid *pointer); -GLbitfield APIENTRY gl_dispatch_stub_1030(GLfixed *mantissa, GLint *exponent); -void APIENTRY gl_dispatch_stub_1031(GLclampf value, GLboolean invert); -void APIENTRY gl_dispatch_stub_1032(GLenum pattern); -void APIENTRY gl_dispatch_stub_1033(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); -void APIENTRY gl_dispatch_stub_1034(GLsizei stride, GLsizei count, const GLboolean *pointer); -void APIENTRY gl_dispatch_stub_1035(GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); +void APIENTRY gl_dispatch_stub_1019(GLuint texture, GLint level); +void APIENTRY gl_dispatch_stub_1020(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth); +void APIENTRY gl_dispatch_stub_1021(GLfloat factor, GLfloat bias); +void APIENTRY gl_dispatch_stub_1022(GLfloat x, GLfloat y, GLfloat z, GLfloat width, GLfloat height); +void APIENTRY gl_dispatch_stub_1023(const GLfloat *coords); +void APIENTRY gl_dispatch_stub_1024(GLint x, GLint y, GLint z, GLint width, GLint height); +void APIENTRY gl_dispatch_stub_1025(const GLint *coords); +void APIENTRY gl_dispatch_stub_1026(GLshort x, GLshort y, GLshort z, GLshort width, GLshort height); +void APIENTRY gl_dispatch_stub_1027(const GLshort *coords); +void APIENTRY gl_dispatch_stub_1028(GLfixed x, GLfixed y, GLfixed z, GLfixed width, GLfixed height); +void APIENTRY gl_dispatch_stub_1029(const GLfixed *coords); +void APIENTRY gl_dispatch_stub_1030(GLenum type, GLsizei stride, const GLvoid *pointer); +GLbitfield APIENTRY gl_dispatch_stub_1031(GLfixed *mantissa, GLint *exponent); +void APIENTRY gl_dispatch_stub_1032(GLclampf value, GLboolean invert); +void APIENTRY gl_dispatch_stub_1033(GLenum pattern); +void APIENTRY gl_dispatch_stub_1034(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); +void APIENTRY gl_dispatch_stub_1035(GLsizei stride, GLsizei count, const GLboolean *pointer); void APIENTRY gl_dispatch_stub_1036(GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); -void APIENTRY gl_dispatch_stub_1037(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); +void APIENTRY gl_dispatch_stub_1037(GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); void APIENTRY gl_dispatch_stub_1038(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); -void APIENTRY gl_dispatch_stub_1039(GLenum target, GLsizei numAttachments, const GLenum *attachments); +void APIENTRY gl_dispatch_stub_1039(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); +void APIENTRY gl_dispatch_stub_1040(GLenum target, GLsizei numAttachments, const GLenum *attachments); GLAPI void APIENTRY glActiveShaderProgram(GLuint pipeline, GLuint program); GLAPI void APIENTRY glBindProgramPipeline(GLuint pipeline); GLAPI GLuint APIENTRY glCreateShaderProgramv(GLenum type, GLsizei count, const GLchar * const *strings); @@ -1074,58 +1084,58 @@ GLAPI void APIENTRY glGetProgramPipelineInfoLog(GLuint pipeline, GLsizei bufSize, GLsizei *length, GLchar *infoLog); GLAPI void APIENTRY glGetProgramPipelineiv(GLuint pipeline, GLenum pname, GLint *params); GLAPI GLboolean APIENTRY glIsProgramPipeline(GLuint pipeline); -void APIENTRY gl_dispatch_stub_1048(GLint first, GLsizei count); -void APIENTRY gl_dispatch_stub_1049(GLuint program, GLint location, GLdouble x); -void APIENTRY gl_dispatch_stub_1050(GLuint program, GLint location, GLsizei count, const GLdouble *value); +void APIENTRY gl_dispatch_stub_1049(GLint first, GLsizei count); +void APIENTRY gl_dispatch_stub_1050(GLuint program, GLint location, GLdouble x); +void APIENTRY gl_dispatch_stub_1051(GLuint program, GLint location, GLsizei count, const GLdouble *value); GLAPI void APIENTRY glProgramUniform1f(GLuint program, GLint location, GLfloat x); GLAPI void APIENTRY glProgramUniform1fv(GLuint program, GLint location, GLsizei count, const GLfloat *value); GLAPI void APIENTRY glProgramUniform1i(GLuint program, GLint location, GLint x); GLAPI void APIENTRY glProgramUniform1iv(GLuint program, GLint location, GLsizei count, const GLint *value); GLAPI void APIENTRY glProgramUniform1ui(GLuint program, GLint location, GLuint x); GLAPI void APIENTRY glProgramUniform1uiv(GLuint program, GLint location, GLsizei count, const GLuint *value); -void APIENTRY gl_dispatch_stub_1057(GLuint program, GLint location, GLdouble x, GLdouble y); -void APIENTRY gl_dispatch_stub_1058(GLuint program, GLint location, GLsizei count, const GLdouble *value); +void APIENTRY gl_dispatch_stub_1058(GLuint program, GLint location, GLdouble x, GLdouble y); +void APIENTRY gl_dispatch_stub_1059(GLuint program, GLint location, GLsizei count, const GLdouble *value); GLAPI void APIENTRY glProgramUniform2f(GLuint program, GLint location, GLfloat x, GLfloat y); GLAPI void APIENTRY glProgramUniform2fv(GLuint program, GLint location, GLsizei count, const GLfloat *value); GLAPI void APIENTRY glProgramUniform2i(GLuint program, GLint location, GLint x, GLint y); GLAPI void APIENTRY glProgramUniform2iv(GLuint program, GLint location, GLsizei count, const GLint *value); GLAPI void APIENTRY glProgramUniform2ui(GLuint program, GLint location, GLuint x, GLuint y); GLAPI void APIENTRY glProgramUniform2uiv(GLuint program, GLint location, GLsizei count, const GLuint *value); -void APIENTRY gl_dispatch_stub_1065(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z); -void APIENTRY gl_dispatch_stub_1066(GLuint program, GLint location, GLsizei count, const GLdouble *value); +void APIENTRY gl_dispatch_stub_1066(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z); +void APIENTRY gl_dispatch_stub_1067(GLuint program, GLint location, GLsizei count, const GLdouble *value); GLAPI void APIENTRY glProgramUniform3f(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z); GLAPI void APIENTRY glProgramUniform3fv(GLuint program, GLint location, GLsizei count, const GLfloat *value); GLAPI void APIENTRY glProgramUniform3i(GLuint program, GLint location, GLint x, GLint y, GLint z); GLAPI void APIENTRY glProgramUniform3iv(GLuint program, GLint location, GLsizei count, const GLint *value); GLAPI void APIENTRY glProgramUniform3ui(GLuint program, GLint location, GLuint x, GLuint y, GLuint z); GLAPI void APIENTRY glProgramUniform3uiv(GLuint program, GLint location, GLsizei count, const GLuint *value); -void APIENTRY gl_dispatch_stub_1073(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z, GLdouble w); -void APIENTRY gl_dispatch_stub_1074(GLuint program, GLint location, GLsizei count, const GLdouble *value); +void APIENTRY gl_dispatch_stub_1074(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z, GLdouble w); +void APIENTRY gl_dispatch_stub_1075(GLuint program, GLint location, GLsizei count, const GLdouble *value); GLAPI void APIENTRY glProgramUniform4f(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z, GLfloat w); GLAPI void APIENTRY glProgramUniform4fv(GLuint program, GLint location, GLsizei count, const GLfloat *value); GLAPI void APIENTRY glProgramUniform4i(GLuint program, GLint location, GLint x, GLint y, GLint z, GLint w); GLAPI void APIENTRY glProgramUniform4iv(GLuint program, GLint location, GLsizei count, const GLint *value); GLAPI void APIENTRY glProgramUniform4ui(GLuint program, GLint location, GLuint x, GLuint y, GLuint z, GLuint w); GLAPI void APIENTRY glProgramUniform4uiv(GLuint program, GLint location, GLsizei count, const GLuint *value); -void APIENTRY gl_dispatch_stub_1081(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY gl_dispatch_stub_1082(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); GLAPI void APIENTRY glProgramUniformMatrix2fv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY gl_dispatch_stub_1083(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY gl_dispatch_stub_1084(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); GLAPI void APIENTRY glProgramUniformMatrix2x3fv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY gl_dispatch_stub_1085(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY gl_dispatch_stub_1086(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); GLAPI void APIENTRY glProgramUniformMatrix2x4fv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY gl_dispatch_stub_1087(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY gl_dispatch_stub_1088(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); GLAPI void APIENTRY glProgramUniformMatrix3fv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY gl_dispatch_stub_1089(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY gl_dispatch_stub_1090(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); GLAPI void APIENTRY glProgramUniformMatrix3x2fv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY gl_dispatch_stub_1091(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY gl_dispatch_stub_1092(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); GLAPI void APIENTRY glProgramUniformMatrix3x4fv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY gl_dispatch_stub_1093(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY gl_dispatch_stub_1094(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); GLAPI void APIENTRY glProgramUniformMatrix4fv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY gl_dispatch_stub_1095(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY gl_dispatch_stub_1096(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); GLAPI void APIENTRY glProgramUniformMatrix4x2fv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY gl_dispatch_stub_1097(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY gl_dispatch_stub_1098(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); GLAPI void APIENTRY glProgramUniformMatrix4x3fv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY gl_dispatch_stub_1099(void); +void APIENTRY gl_dispatch_stub_1100(void); GLAPI void APIENTRY glUseProgramStages(GLuint pipeline, GLbitfield stages, GLuint program); GLAPI void APIENTRY glValidateProgramPipeline(GLuint pipeline); GLAPI void APIENTRY glDebugMessageCallback(GLDEBUGPROC callback, const GLvoid *userParam); @@ -1138,222 +1148,227 @@ GLAPI void APIENTRY glObjectPtrLabel(const GLvoid *ptr, GLsizei length, const GLchar *label); GLAPI void APIENTRY glPopDebugGroup(void); GLAPI void APIENTRY glPushDebugGroup(GLenum source, GLuint id, GLsizei length, const GLchar *message); -void APIENTRY gl_dispatch_stub_1112(GLfloat red, GLfloat green, GLfloat blue); -void APIENTRY gl_dispatch_stub_1113(const GLfloat *v); +void APIENTRY gl_dispatch_stub_1113(GLfloat red, GLfloat green, GLfloat blue); +void APIENTRY gl_dispatch_stub_1114(const GLfloat *v); GLAPI void APIENTRY glMultiDrawElementsEXT(GLenum mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount); -void APIENTRY gl_dispatch_stub_1115(GLfloat coord); -void APIENTRY gl_dispatch_stub_1116(const GLfloat *coord); -void APIENTRY gl_dispatch_stub_1117(void); -void APIENTRY gl_dispatch_stub_1118(GLdouble x, GLdouble y, GLdouble z, GLdouble w); -void APIENTRY gl_dispatch_stub_1119(const GLdouble *v); -void APIENTRY gl_dispatch_stub_1120(GLfloat x, GLfloat y, GLfloat z, GLfloat w); -void APIENTRY gl_dispatch_stub_1121(const GLfloat *v); -void APIENTRY gl_dispatch_stub_1122(GLint x, GLint y, GLint z, GLint w); -void APIENTRY gl_dispatch_stub_1123(const GLint *v); -void APIENTRY gl_dispatch_stub_1124(GLshort x, GLshort y, GLshort z, GLshort w); -void APIENTRY gl_dispatch_stub_1125(const GLshort *v); -void APIENTRY gl_dispatch_stub_1126(const GLenum *mode, const GLint *first, const GLsizei *count, GLsizei primcount, GLint modestride); -void APIENTRY gl_dispatch_stub_1127(const GLenum *mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount, GLint modestride); -GLboolean APIENTRY gl_dispatch_stub_1128(GLsizei n, const GLuint *ids, GLboolean *residences); -void APIENTRY gl_dispatch_stub_1129(GLenum target, GLuint id, const GLfloat *params); -void APIENTRY gl_dispatch_stub_1130(GLenum target, GLuint index, GLenum pname, GLdouble *params); -void APIENTRY gl_dispatch_stub_1131(GLenum target, GLuint index, GLenum pname, GLfloat *params); -void APIENTRY gl_dispatch_stub_1132(GLuint id, GLenum pname, GLubyte *program); -void APIENTRY gl_dispatch_stub_1133(GLuint id, GLenum pname, GLint *params); -void APIENTRY gl_dispatch_stub_1134(GLenum target, GLuint address, GLenum pname, GLint *params); -void APIENTRY gl_dispatch_stub_1135(GLuint index, GLenum pname, GLdouble *params); -void APIENTRY gl_dispatch_stub_1136(GLuint index, GLenum pname, GLfloat *params); -void APIENTRY gl_dispatch_stub_1137(GLuint index, GLenum pname, GLint *params); -void APIENTRY gl_dispatch_stub_1138(GLenum target, GLuint id, GLsizei len, const GLubyte *program); -void APIENTRY gl_dispatch_stub_1139(GLenum target, GLuint index, GLsizei num, const GLdouble *params); -void APIENTRY gl_dispatch_stub_1140(GLenum target, GLuint index, GLsizei num, const GLfloat *params); -void APIENTRY gl_dispatch_stub_1141(GLsizei n, const GLuint *ids); -void APIENTRY gl_dispatch_stub_1142(GLenum target, GLuint address, GLenum matrix, GLenum transform); -void APIENTRY gl_dispatch_stub_1143(GLuint index, GLdouble x); -void APIENTRY gl_dispatch_stub_1144(GLuint index, const GLdouble *v); -void APIENTRY gl_dispatch_stub_1145(GLuint index, GLfloat x); -void APIENTRY gl_dispatch_stub_1146(GLuint index, const GLfloat *v); -void APIENTRY gl_dispatch_stub_1147(GLuint index, GLshort x); -void APIENTRY gl_dispatch_stub_1148(GLuint index, const GLshort *v); -void APIENTRY gl_dispatch_stub_1149(GLuint index, GLdouble x, GLdouble y); -void APIENTRY gl_dispatch_stub_1150(GLuint index, const GLdouble *v); -void APIENTRY gl_dispatch_stub_1151(GLuint index, GLfloat x, GLfloat y); -void APIENTRY gl_dispatch_stub_1152(GLuint index, const GLfloat *v); -void APIENTRY gl_dispatch_stub_1153(GLuint index, GLshort x, GLshort y); -void APIENTRY gl_dispatch_stub_1154(GLuint index, const GLshort *v); -void APIENTRY gl_dispatch_stub_1155(GLuint index, GLdouble x, GLdouble y, GLdouble z); -void APIENTRY gl_dispatch_stub_1156(GLuint index, const GLdouble *v); -void APIENTRY gl_dispatch_stub_1157(GLuint index, GLfloat x, GLfloat y, GLfloat z); -void APIENTRY gl_dispatch_stub_1158(GLuint index, const GLfloat *v); -void APIENTRY gl_dispatch_stub_1159(GLuint index, GLshort x, GLshort y, GLshort z); -void APIENTRY gl_dispatch_stub_1160(GLuint index, const GLshort *v); -void APIENTRY gl_dispatch_stub_1161(GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w); -void APIENTRY gl_dispatch_stub_1162(GLuint index, const GLdouble *v); -void APIENTRY gl_dispatch_stub_1163(GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w); -void APIENTRY gl_dispatch_stub_1164(GLuint index, const GLfloat *v); -void APIENTRY gl_dispatch_stub_1165(GLuint index, GLshort x, GLshort y, GLshort z, GLshort w); -void APIENTRY gl_dispatch_stub_1166(GLuint index, const GLshort *v); -void APIENTRY gl_dispatch_stub_1167(GLuint index, GLubyte x, GLubyte y, GLubyte z, GLubyte w); -void APIENTRY gl_dispatch_stub_1168(GLuint index, const GLubyte *v); -void APIENTRY gl_dispatch_stub_1169(GLuint index, GLint size, GLenum type, GLsizei stride, const GLvoid *pointer); -void APIENTRY gl_dispatch_stub_1170(GLuint index, GLsizei n, const GLdouble *v); -void APIENTRY gl_dispatch_stub_1171(GLuint index, GLsizei n, const GLfloat *v); -void APIENTRY gl_dispatch_stub_1172(GLuint index, GLsizei n, const GLshort *v); -void APIENTRY gl_dispatch_stub_1173(GLuint index, GLsizei n, const GLdouble *v); -void APIENTRY gl_dispatch_stub_1174(GLuint index, GLsizei n, const GLfloat *v); -void APIENTRY gl_dispatch_stub_1175(GLuint index, GLsizei n, const GLshort *v); -void APIENTRY gl_dispatch_stub_1176(GLuint index, GLsizei n, const GLdouble *v); -void APIENTRY gl_dispatch_stub_1177(GLuint index, GLsizei n, const GLfloat *v); -void APIENTRY gl_dispatch_stub_1178(GLuint index, GLsizei n, const GLshort *v); -void APIENTRY gl_dispatch_stub_1179(GLuint index, GLsizei n, const GLdouble *v); -void APIENTRY gl_dispatch_stub_1180(GLuint index, GLsizei n, const GLfloat *v); -void APIENTRY gl_dispatch_stub_1181(GLuint index, GLsizei n, const GLshort *v); -void APIENTRY gl_dispatch_stub_1182(GLuint index, GLsizei n, const GLubyte *v); -void APIENTRY gl_dispatch_stub_1183(GLenum pname, GLfloat *param); -void APIENTRY gl_dispatch_stub_1184(GLenum pname, GLint *param); -void APIENTRY gl_dispatch_stub_1185(GLenum pname, const GLfloat *param); -void APIENTRY gl_dispatch_stub_1186(GLenum pname, const GLint *param); -void APIENTRY gl_dispatch_stub_1187(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); -void APIENTRY gl_dispatch_stub_1188(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); -void APIENTRY gl_dispatch_stub_1189(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); -void APIENTRY gl_dispatch_stub_1190(void); -void APIENTRY gl_dispatch_stub_1191(GLuint id); -void APIENTRY gl_dispatch_stub_1192(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); -void APIENTRY gl_dispatch_stub_1193(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); -void APIENTRY gl_dispatch_stub_1194(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); -void APIENTRY gl_dispatch_stub_1195(GLuint id); -void APIENTRY gl_dispatch_stub_1196(void); -GLuint APIENTRY gl_dispatch_stub_1197(GLuint range); -void APIENTRY gl_dispatch_stub_1198(GLuint dst, GLuint coord, GLenum swizzle); -void APIENTRY gl_dispatch_stub_1199(GLuint dst, GLuint interp, GLenum swizzle); -void APIENTRY gl_dispatch_stub_1200(GLuint dst, const GLfloat *value); -void APIENTRY gl_dispatch_stub_1201(GLenum face); -void APIENTRY gl_dispatch_stub_1202(GLuint array); -void APIENTRY gl_dispatch_stub_1203(GLsizei n, GLuint *arrays); -void APIENTRY gl_dispatch_stub_1204(GLuint id, GLsizei len, const GLubyte *name, GLdouble *params); -void APIENTRY gl_dispatch_stub_1205(GLuint id, GLsizei len, const GLubyte *name, GLfloat *params); -void APIENTRY gl_dispatch_stub_1206(GLuint id, GLsizei len, const GLubyte *name, GLdouble x, GLdouble y, GLdouble z, GLdouble w); -void APIENTRY gl_dispatch_stub_1207(GLuint id, GLsizei len, const GLubyte *name, const GLdouble *v); -void APIENTRY gl_dispatch_stub_1208(GLuint id, GLsizei len, const GLubyte *name, GLfloat x, GLfloat y, GLfloat z, GLfloat w); -void APIENTRY gl_dispatch_stub_1209(GLuint id, GLsizei len, const GLubyte *name, const GLfloat *v); -void APIENTRY gl_dispatch_stub_1210(void); -void APIENTRY gl_dispatch_stub_1211(GLenum coord, GLenum pname, GLfixed *params); -void APIENTRY gl_dispatch_stub_1212(GLenum coord, GLenum pname, GLint param); -void APIENTRY gl_dispatch_stub_1213(GLenum coord, GLenum pname, const GLfixed *params); -void APIENTRY gl_dispatch_stub_1214(GLclampd zmin, GLclampd zmax); -void APIENTRY gl_dispatch_stub_1215(GLenum target, GLuint framebuffer); -void APIENTRY gl_dispatch_stub_1216(GLenum target, GLuint renderbuffer); -void APIENTRY gl_dispatch_stub_1217(GLsizei len, const GLvoid *string); -void APIENTRY gl_dispatch_stub_1218(GLenum target, GLenum pname, GLint param); -void APIENTRY gl_dispatch_stub_1219(GLenum target, GLintptr offset, GLsizeiptr size); -void APIENTRY gl_dispatch_stub_1220(GLuint index, GLint x); -void APIENTRY gl_dispatch_stub_1221(GLuint index, GLuint x); -void APIENTRY gl_dispatch_stub_1222(GLuint index, GLint x, GLint y); -void APIENTRY gl_dispatch_stub_1223(GLuint index, const GLint *v); -void APIENTRY gl_dispatch_stub_1224(GLuint index, GLuint x, GLuint y); -void APIENTRY gl_dispatch_stub_1225(GLuint index, const GLuint *v); -void APIENTRY gl_dispatch_stub_1226(GLuint index, GLint x, GLint y, GLint z); -void APIENTRY gl_dispatch_stub_1227(GLuint index, const GLint *v); -void APIENTRY gl_dispatch_stub_1228(GLuint index, GLuint x, GLuint y, GLuint z); -void APIENTRY gl_dispatch_stub_1229(GLuint index, const GLuint *v); -void APIENTRY gl_dispatch_stub_1230(GLuint index, GLint x, GLint y, GLint z, GLint w); +void APIENTRY gl_dispatch_stub_1116(GLfloat coord); +void APIENTRY gl_dispatch_stub_1117(const GLfloat *coord); +void APIENTRY gl_dispatch_stub_1118(void); +void APIENTRY gl_dispatch_stub_1119(GLdouble x, GLdouble y, GLdouble z, GLdouble w); +void APIENTRY gl_dispatch_stub_1120(const GLdouble *v); +void APIENTRY gl_dispatch_stub_1121(GLfloat x, GLfloat y, GLfloat z, GLfloat w); +void APIENTRY gl_dispatch_stub_1122(const GLfloat *v); +void APIENTRY gl_dispatch_stub_1123(GLint x, GLint y, GLint z, GLint w); +void APIENTRY gl_dispatch_stub_1124(const GLint *v); +void APIENTRY gl_dispatch_stub_1125(GLshort x, GLshort y, GLshort z, GLshort w); +void APIENTRY gl_dispatch_stub_1126(const GLshort *v); +void APIENTRY gl_dispatch_stub_1127(const GLenum *mode, const GLint *first, const GLsizei *count, GLsizei primcount, GLint modestride); +void APIENTRY gl_dispatch_stub_1128(const GLenum *mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount, GLint modestride); +GLboolean APIENTRY gl_dispatch_stub_1129(GLsizei n, const GLuint *ids, GLboolean *residences); +void APIENTRY gl_dispatch_stub_1130(GLenum target, GLuint id, const GLfloat *params); +void APIENTRY gl_dispatch_stub_1131(GLenum target, GLuint index, GLenum pname, GLdouble *params); +void APIENTRY gl_dispatch_stub_1132(GLenum target, GLuint index, GLenum pname, GLfloat *params); +void APIENTRY gl_dispatch_stub_1133(GLuint id, GLenum pname, GLubyte *program); +void APIENTRY gl_dispatch_stub_1134(GLuint id, GLenum pname, GLint *params); +void APIENTRY gl_dispatch_stub_1135(GLenum target, GLuint address, GLenum pname, GLint *params); +void APIENTRY gl_dispatch_stub_1136(GLuint index, GLenum pname, GLdouble *params); +void APIENTRY gl_dispatch_stub_1137(GLuint index, GLenum pname, GLfloat *params); +void APIENTRY gl_dispatch_stub_1138(GLuint index, GLenum pname, GLint *params); +void APIENTRY gl_dispatch_stub_1139(GLenum target, GLuint id, GLsizei len, const GLubyte *program); +void APIENTRY gl_dispatch_stub_1140(GLenum target, GLuint index, GLsizei num, const GLdouble *params); +void APIENTRY gl_dispatch_stub_1141(GLenum target, GLuint index, GLsizei num, const GLfloat *params); +void APIENTRY gl_dispatch_stub_1142(GLsizei n, const GLuint *ids); +void APIENTRY gl_dispatch_stub_1143(GLenum target, GLuint address, GLenum matrix, GLenum transform); +void APIENTRY gl_dispatch_stub_1144(GLuint index, GLdouble x); +void APIENTRY gl_dispatch_stub_1145(GLuint index, const GLdouble *v); +void APIENTRY gl_dispatch_stub_1146(GLuint index, GLfloat x); +void APIENTRY gl_dispatch_stub_1147(GLuint index, const GLfloat *v); +void APIENTRY gl_dispatch_stub_1148(GLuint index, GLshort x); +void APIENTRY gl_dispatch_stub_1149(GLuint index, const GLshort *v); +void APIENTRY gl_dispatch_stub_1150(GLuint index, GLdouble x, GLdouble y); +void APIENTRY gl_dispatch_stub_1151(GLuint index, const GLdouble *v); +void APIENTRY gl_dispatch_stub_1152(GLuint index, GLfloat x, GLfloat y); +void APIENTRY gl_dispatch_stub_1153(GLuint index, const GLfloat *v); +void APIENTRY gl_dispatch_stub_1154(GLuint index, GLshort x, GLshort y); +void APIENTRY gl_dispatch_stub_1155(GLuint index, const GLshort *v); +void APIENTRY gl_dispatch_stub_1156(GLuint index, GLdouble x, GLdouble y, GLdouble z); +void APIENTRY gl_dispatch_stub_1157(GLuint index, const GLdouble *v); +void APIENTRY gl_dispatch_stub_1158(GLuint index, GLfloat x, GLfloat y, GLfloat z); +void APIENTRY gl_dispatch_stub_1159(GLuint index, const GLfloat *v); +void APIENTRY gl_dispatch_stub_1160(GLuint index, GLshort x, GLshort y, GLshort z); +void APIENTRY gl_dispatch_stub_1161(GLuint index, const GLshort *v); +void APIENTRY gl_dispatch_stub_1162(GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w); +void APIENTRY gl_dispatch_stub_1163(GLuint index, const GLdouble *v); +void APIENTRY gl_dispatch_stub_1164(GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w); +void APIENTRY gl_dispatch_stub_1165(GLuint index, const GLfloat *v); +void APIENTRY gl_dispatch_stub_1166(GLuint index, GLshort x, GLshort y, GLshort z, GLshort w); +void APIENTRY gl_dispatch_stub_1167(GLuint index, const GLshort *v); +void APIENTRY gl_dispatch_stub_1168(GLuint index, GLubyte x, GLubyte y, GLubyte z, GLubyte w); +void APIENTRY gl_dispatch_stub_1169(GLuint index, const GLubyte *v); +void APIENTRY gl_dispatch_stub_1170(GLuint index, GLint size, GLenum type, GLsizei stride, const GLvoid *pointer); +void APIENTRY gl_dispatch_stub_1171(GLuint index, GLsizei n, const GLdouble *v); +void APIENTRY gl_dispatch_stub_1172(GLuint index, GLsizei n, const GLfloat *v); +void APIENTRY gl_dispatch_stub_1173(GLuint index, GLsizei n, const GLshort *v); +void APIENTRY gl_dispatch_stub_1174(GLuint index, GLsizei n, const GLdouble *v); +void APIENTRY gl_dispatch_stub_1175(GLuint index, GLsizei n, const GLfloat *v); +void APIENTRY gl_dispatch_stub_1176(GLuint index, GLsizei n, const GLshort *v); +void APIENTRY gl_dispatch_stub_1177(GLuint index, GLsizei n, const GLdouble *v); +void APIENTRY gl_dispatch_stub_1178(GLuint index, GLsizei n, const GLfloat *v); +void APIENTRY gl_dispatch_stub_1179(GLuint index, GLsizei n, const GLshort *v); +void APIENTRY gl_dispatch_stub_1180(GLuint index, GLsizei n, const GLdouble *v); +void APIENTRY gl_dispatch_stub_1181(GLuint index, GLsizei n, const GLfloat *v); +void APIENTRY gl_dispatch_stub_1182(GLuint index, GLsizei n, const GLshort *v); +void APIENTRY gl_dispatch_stub_1183(GLuint index, GLsizei n, const GLubyte *v); +void APIENTRY gl_dispatch_stub_1184(GLenum pname, GLfloat *param); +void APIENTRY gl_dispatch_stub_1185(GLenum pname, GLint *param); +void APIENTRY gl_dispatch_stub_1186(GLenum pname, const GLfloat *param); +void APIENTRY gl_dispatch_stub_1187(GLenum pname, const GLint *param); +void APIENTRY gl_dispatch_stub_1188(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); +void APIENTRY gl_dispatch_stub_1189(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); +void APIENTRY gl_dispatch_stub_1190(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); +void APIENTRY gl_dispatch_stub_1191(void); +void APIENTRY gl_dispatch_stub_1192(GLuint id); +void APIENTRY gl_dispatch_stub_1193(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); +void APIENTRY gl_dispatch_stub_1194(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); +void APIENTRY gl_dispatch_stub_1195(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); +void APIENTRY gl_dispatch_stub_1196(GLuint id); +void APIENTRY gl_dispatch_stub_1197(void); +GLuint APIENTRY gl_dispatch_stub_1198(GLuint range); +void APIENTRY gl_dispatch_stub_1199(GLuint dst, GLuint coord, GLenum swizzle); +void APIENTRY gl_dispatch_stub_1200(GLuint dst, GLuint interp, GLenum swizzle); +void APIENTRY gl_dispatch_stub_1201(GLuint dst, const GLfloat *value); +void APIENTRY gl_dispatch_stub_1202(GLuint first, GLsizei count, const GLfloat *v); +void APIENTRY gl_dispatch_stub_1203(GLuint index, GLfloat n, GLfloat f); +void APIENTRY gl_dispatch_stub_1204(GLenum face); +void APIENTRY gl_dispatch_stub_1205(GLuint array); +void APIENTRY gl_dispatch_stub_1206(GLsizei n, GLuint *arrays); +void APIENTRY gl_dispatch_stub_1207(GLuint id, GLsizei len, const GLubyte *name, GLdouble *params); +void APIENTRY gl_dispatch_stub_1208(GLuint id, GLsizei len, const GLubyte *name, GLfloat *params); +void APIENTRY gl_dispatch_stub_1209(GLuint id, GLsizei len, const GLubyte *name, GLdouble x, GLdouble y, GLdouble z, GLdouble w); +void APIENTRY gl_dispatch_stub_1210(GLuint id, GLsizei len, const GLubyte *name, const GLdouble *v); +void APIENTRY gl_dispatch_stub_1211(GLuint id, GLsizei len, const GLubyte *name, GLfloat x, GLfloat y, GLfloat z, GLfloat w); +void APIENTRY gl_dispatch_stub_1212(GLuint id, GLsizei len, const GLubyte *name, const GLfloat *v); +void APIENTRY gl_dispatch_stub_1213(void); +void APIENTRY gl_dispatch_stub_1214(GLenum coord, GLenum pname, GLfixed *params); +void APIENTRY gl_dispatch_stub_1215(GLenum coord, GLenum pname, GLint param); +void APIENTRY gl_dispatch_stub_1216(GLenum coord, GLenum pname, const GLfixed *params); +void APIENTRY gl_dispatch_stub_1217(GLclampd zmin, GLclampd zmax); +void APIENTRY gl_dispatch_stub_1218(GLenum target, GLuint framebuffer); +void APIENTRY gl_dispatch_stub_1219(GLenum target, GLuint renderbuffer); +void APIENTRY gl_dispatch_stub_1220(GLsizei len, const GLvoid *string); +void APIENTRY gl_dispatch_stub_1221(GLenum target, GLenum pname, GLint param); +void APIENTRY gl_dispatch_stub_1222(GLenum target, GLintptr offset, GLsizeiptr size); +void APIENTRY gl_dispatch_stub_1223(GLuint index, GLint x); +void APIENTRY gl_dispatch_stub_1224(GLuint index, GLuint x); +void APIENTRY gl_dispatch_stub_1225(GLuint index, GLint x, GLint y); +void APIENTRY gl_dispatch_stub_1226(GLuint index, const GLint *v); +void APIENTRY gl_dispatch_stub_1227(GLuint index, GLuint x, GLuint y); +void APIENTRY gl_dispatch_stub_1228(GLuint index, const GLuint *v); +void APIENTRY gl_dispatch_stub_1229(GLuint index, GLint x, GLint y, GLint z); +void APIENTRY gl_dispatch_stub_1230(GLuint index, const GLint *v); +void APIENTRY gl_dispatch_stub_1231(GLuint index, GLuint x, GLuint y, GLuint z); +void APIENTRY gl_dispatch_stub_1232(GLuint index, const GLuint *v); +void APIENTRY gl_dispatch_stub_1233(GLuint index, GLint x, GLint y, GLint z, GLint w); GLAPI void APIENTRY glVertexAttribI4i(GLuint index, GLint x, GLint y, GLint z, GLint w); -void APIENTRY gl_dispatch_stub_1231(GLuint index, const GLint *v); +void APIENTRY gl_dispatch_stub_1234(GLuint index, const GLint *v); GLAPI void APIENTRY glVertexAttribI4iv(GLuint index, const GLint *v); -void APIENTRY gl_dispatch_stub_1232(GLuint index, GLuint x, GLuint y, GLuint z, GLuint w); +void APIENTRY gl_dispatch_stub_1235(GLuint index, GLuint x, GLuint y, GLuint z, GLuint w); GLAPI void APIENTRY glVertexAttribI4ui(GLuint index, GLuint x, GLuint y, GLuint z, GLuint w); -void APIENTRY gl_dispatch_stub_1233(GLuint index, const GLuint *v); +void APIENTRY gl_dispatch_stub_1236(GLuint index, const GLuint *v); GLAPI void APIENTRY glVertexAttribI4uiv(GLuint index, const GLuint *v); -void APIENTRY gl_dispatch_stub_1234(GLint r, GLint g, GLint b, GLint a); -void APIENTRY gl_dispatch_stub_1235(GLuint r, GLuint g, GLuint b, GLuint a); -void APIENTRY gl_dispatch_stub_1236(GLenum target, GLuint index, GLuint buffer, GLintptr offset); -void APIENTRY gl_dispatch_stub_1237(GLuint monitor); -void APIENTRY gl_dispatch_stub_1238(GLsizei n, GLuint *monitors); -void APIENTRY gl_dispatch_stub_1239(GLuint monitor); -void APIENTRY gl_dispatch_stub_1240(GLsizei n, GLuint *monitors); -void APIENTRY gl_dispatch_stub_1241(GLuint monitor, GLenum pname, GLsizei dataSize, GLuint *data, GLint *bytesWritten); -void APIENTRY gl_dispatch_stub_1242(GLuint group, GLuint counter, GLenum pname, GLvoid *data); -void APIENTRY gl_dispatch_stub_1243(GLuint group, GLuint counter, GLsizei bufSize, GLsizei *length, GLchar *counterString); -void APIENTRY gl_dispatch_stub_1244(GLuint group, GLint *numCounters, GLint *maxActiveCounters, GLsizei countersSize, GLuint *counters); -void APIENTRY gl_dispatch_stub_1245(GLuint group, GLsizei bufSize, GLsizei *length, GLchar *groupString); -void APIENTRY gl_dispatch_stub_1246(GLint *numGroups, GLsizei groupsSize, GLuint *groups); -void APIENTRY gl_dispatch_stub_1247(GLuint monitor, GLboolean enable, GLuint group, GLint numCounters, GLuint *counterList); -void APIENTRY gl_dispatch_stub_1248(GLenum objectType, GLuint name, GLenum pname, GLint *value); -GLenum APIENTRY gl_dispatch_stub_1249(GLenum objectType, GLuint name, GLenum option); -GLenum APIENTRY gl_dispatch_stub_1250(GLenum objectType, GLuint name, GLenum option); -void APIENTRY gl_dispatch_stub_1251(GLuint program); -GLuint APIENTRY gl_dispatch_stub_1252(GLenum type, const GLchar *string); -void APIENTRY gl_dispatch_stub_1253(GLenum type, GLuint program); -void APIENTRY gl_dispatch_stub_1254(void); -void APIENTRY gl_dispatch_stub_1255(void); -void APIENTRY gl_dispatch_stub_1256(GLintptr surface, GLenum pname, GLsizei bufSize, GLsizei *length, GLint *values); -void APIENTRY gl_dispatch_stub_1257(const GLvoid *vdpDevice, const GLvoid *getProcAddress); -GLboolean APIENTRY gl_dispatch_stub_1258(GLintptr surface); -void APIENTRY gl_dispatch_stub_1259(GLsizei numSurfaces, const GLintptr *surfaces); -GLintptr APIENTRY gl_dispatch_stub_1260(const GLvoid *vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint *textureNames); -GLintptr APIENTRY gl_dispatch_stub_1261(const GLvoid *vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint *textureNames); -void APIENTRY gl_dispatch_stub_1262(GLintptr surface, GLenum access); -void APIENTRY gl_dispatch_stub_1263(GLsizei numSurfaces, const GLintptr *surfaces); -void APIENTRY gl_dispatch_stub_1264(GLintptr surface); -void APIENTRY gl_dispatch_stub_1265(GLuint queryHandle); -void APIENTRY gl_dispatch_stub_1266(GLuint queryId, GLuint *queryHandle); -void APIENTRY gl_dispatch_stub_1267(GLuint queryHandle); +void APIENTRY gl_dispatch_stub_1237(GLint r, GLint g, GLint b, GLint a); +void APIENTRY gl_dispatch_stub_1238(GLuint r, GLuint g, GLuint b, GLuint a); +void APIENTRY gl_dispatch_stub_1239(GLenum target, GLuint index, GLuint buffer, GLintptr offset); +void APIENTRY gl_dispatch_stub_1240(GLuint monitor); +void APIENTRY gl_dispatch_stub_1241(GLsizei n, GLuint *monitors); +void APIENTRY gl_dispatch_stub_1242(GLuint monitor); +void APIENTRY gl_dispatch_stub_1243(GLsizei n, GLuint *monitors); +void APIENTRY gl_dispatch_stub_1244(GLuint monitor, GLenum pname, GLsizei dataSize, GLuint *data, GLint *bytesWritten); +void APIENTRY gl_dispatch_stub_1245(GLuint group, GLuint counter, GLenum pname, GLvoid *data); +void APIENTRY gl_dispatch_stub_1246(GLuint group, GLuint counter, GLsizei bufSize, GLsizei *length, GLchar *counterString); +void APIENTRY gl_dispatch_stub_1247(GLuint group, GLint *numCounters, GLint *maxActiveCounters, GLsizei countersSize, GLuint *counters); +void APIENTRY gl_dispatch_stub_1248(GLuint group, GLsizei bufSize, GLsizei *length, GLchar *groupString); +void APIENTRY gl_dispatch_stub_1249(GLint *numGroups, GLsizei groupsSize, GLuint *groups); +void APIENTRY gl_dispatch_stub_1250(GLuint monitor, GLboolean enable, GLuint group, GLint numCounters, GLuint *counterList); +void APIENTRY gl_dispatch_stub_1251(GLenum objectType, GLuint name, GLenum pname, GLint *value); +GLenum APIENTRY gl_dispatch_stub_1252(GLenum objectType, GLuint name, GLenum option); +GLenum APIENTRY gl_dispatch_stub_1253(GLenum objectType, GLuint name, GLenum option); +void APIENTRY gl_dispatch_stub_1254(GLuint program); +GLuint APIENTRY gl_dispatch_stub_1255(GLenum type, const GLchar *string); +void APIENTRY gl_dispatch_stub_1256(GLenum type, GLuint program); +void APIENTRY gl_dispatch_stub_1257(void); +void APIENTRY gl_dispatch_stub_1258(void); +void APIENTRY gl_dispatch_stub_1259(GLintptr surface, GLenum pname, GLsizei bufSize, GLsizei *length, GLint *values); +void APIENTRY gl_dispatch_stub_1260(const GLvoid *vdpDevice, const GLvoid *getProcAddress); +GLboolean APIENTRY gl_dispatch_stub_1261(GLintptr surface); +void APIENTRY gl_dispatch_stub_1262(GLsizei numSurfaces, const GLintptr *surfaces); +GLintptr APIENTRY gl_dispatch_stub_1263(const GLvoid *vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint *textureNames); +GLintptr APIENTRY gl_dispatch_stub_1264(const GLvoid *vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint *textureNames); +void APIENTRY gl_dispatch_stub_1265(GLintptr surface, GLenum access); +void APIENTRY gl_dispatch_stub_1266(GLsizei numSurfaces, const GLintptr *surfaces); +void APIENTRY gl_dispatch_stub_1267(GLintptr surface); void APIENTRY gl_dispatch_stub_1268(GLuint queryHandle); -void APIENTRY gl_dispatch_stub_1269(GLuint *queryId); -void APIENTRY gl_dispatch_stub_1270(GLuint queryId, GLuint *nextQueryId); -void APIENTRY gl_dispatch_stub_1271(GLuint queryId, GLuint counterId, GLuint counterNameLength, GLchar *counterName, GLuint counterDescLength, GLchar *counterDesc, GLuint *counterOffset, GLuint *counterDataSize, GLuint *counterTypeEnum, GLuint *counterDataTypeEnum, GLuint64 *rawCounterMaxValue); -void APIENTRY gl_dispatch_stub_1272(GLuint queryHandle, GLuint flags, GLsizei dataSize, GLvoid *data, GLuint *bytesWritten); -void APIENTRY gl_dispatch_stub_1273(GLchar *queryName, GLuint *queryId); -void APIENTRY gl_dispatch_stub_1274(GLuint queryId, GLuint queryNameLength, GLchar *queryName, GLuint *dataSize, GLuint *noCounters, GLuint *noInstances, GLuint *capsMask); -void APIENTRY gl_dispatch_stub_1275(GLfloat factor, GLfloat units, GLfloat clamp); -void APIENTRY gl_dispatch_stub_1276(GLenum frontfunc, GLenum backfunc, GLint ref, GLuint mask); -void APIENTRY gl_dispatch_stub_1277(GLenum target, GLuint index, GLsizei count, const GLfloat *params); -void APIENTRY gl_dispatch_stub_1278(GLenum target, GLuint index, GLsizei count, const GLfloat *params); -void APIENTRY gl_dispatch_stub_1279(GLenum target, GLvoid *writeOffset); -void APIENTRY gl_dispatch_stub_1280(GLenum target, GLvoid *writeOffset); -void APIENTRY gl_dispatch_stub_1281(GLenum func, GLclampx ref); -void APIENTRY gl_dispatch_stub_1282(GLclampx red, GLclampx green, GLclampx blue, GLclampx alpha); -void APIENTRY gl_dispatch_stub_1283(GLclampx depth); -void APIENTRY gl_dispatch_stub_1284(GLfixed red, GLfixed green, GLfixed blue, GLfixed alpha); -void APIENTRY gl_dispatch_stub_1285(GLclampx zNear, GLclampx zFar); -void APIENTRY gl_dispatch_stub_1286(GLenum pname, GLfixed param); -void APIENTRY gl_dispatch_stub_1287(GLenum pname, const GLfixed *params); -void APIENTRY gl_dispatch_stub_1288(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar); -void APIENTRY gl_dispatch_stub_1289(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar); +void APIENTRY gl_dispatch_stub_1269(GLuint queryId, GLuint *queryHandle); +void APIENTRY gl_dispatch_stub_1270(GLuint queryHandle); +void APIENTRY gl_dispatch_stub_1271(GLuint queryHandle); +void APIENTRY gl_dispatch_stub_1272(GLuint *queryId); +void APIENTRY gl_dispatch_stub_1273(GLuint queryId, GLuint *nextQueryId); +void APIENTRY gl_dispatch_stub_1274(GLuint queryId, GLuint counterId, GLuint counterNameLength, GLchar *counterName, GLuint counterDescLength, GLchar *counterDesc, GLuint *counterOffset, GLuint *counterDataSize, GLuint *counterTypeEnum, GLuint *counterDataTypeEnum, GLuint64 *rawCounterMaxValue); +void APIENTRY gl_dispatch_stub_1275(GLuint queryHandle, GLuint flags, GLsizei dataSize, GLvoid *data, GLuint *bytesWritten); +void APIENTRY gl_dispatch_stub_1276(GLchar *queryName, GLuint *queryId); +void APIENTRY gl_dispatch_stub_1277(GLuint queryId, GLuint queryNameLength, GLchar *queryName, GLuint *dataSize, GLuint *noCounters, GLuint *noInstances, GLuint *capsMask); +void APIENTRY gl_dispatch_stub_1278(GLfloat factor, GLfloat units, GLfloat clamp); +void APIENTRY gl_dispatch_stub_1279(GLenum mode, GLsizei count, const GLint *box); +void APIENTRY gl_dispatch_stub_1280(GLenum frontfunc, GLenum backfunc, GLint ref, GLuint mask); +void APIENTRY gl_dispatch_stub_1281(GLenum target, GLuint index, GLsizei count, const GLfloat *params); +void APIENTRY gl_dispatch_stub_1282(GLenum target, GLuint index, GLsizei count, const GLfloat *params); +void APIENTRY gl_dispatch_stub_1283(GLenum target, GLvoid *writeOffset); +void APIENTRY gl_dispatch_stub_1284(GLenum target, GLvoid *writeOffset); +void APIENTRY gl_dispatch_stub_1285(GLenum func, GLclampx ref); +void APIENTRY gl_dispatch_stub_1286(GLclampx red, GLclampx green, GLclampx blue, GLclampx alpha); +void APIENTRY gl_dispatch_stub_1287(GLclampx depth); +void APIENTRY gl_dispatch_stub_1288(GLfixed red, GLfixed green, GLfixed blue, GLfixed alpha); +void APIENTRY gl_dispatch_stub_1289(GLclampx zNear, GLclampx zFar); void APIENTRY gl_dispatch_stub_1290(GLenum pname, GLfixed param); void APIENTRY gl_dispatch_stub_1291(GLenum pname, const GLfixed *params); -void APIENTRY gl_dispatch_stub_1292(GLenum light, GLenum pname, GLfixed param); -void APIENTRY gl_dispatch_stub_1293(GLenum light, GLenum pname, const GLfixed *params); -void APIENTRY gl_dispatch_stub_1294(GLfixed width); -void APIENTRY gl_dispatch_stub_1295(const GLfixed *m); -void APIENTRY gl_dispatch_stub_1296(GLenum face, GLenum pname, GLfixed param); -void APIENTRY gl_dispatch_stub_1297(GLenum face, GLenum pname, const GLfixed *params); -void APIENTRY gl_dispatch_stub_1298(const GLfixed *m); -void APIENTRY gl_dispatch_stub_1299(GLenum target, GLfixed s, GLfixed t, GLfixed r, GLfixed q); -void APIENTRY gl_dispatch_stub_1300(GLfixed nx, GLfixed ny, GLfixed nz); -void APIENTRY gl_dispatch_stub_1301(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar); -void APIENTRY gl_dispatch_stub_1302(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar); -void APIENTRY gl_dispatch_stub_1303(GLfixed size); -void APIENTRY gl_dispatch_stub_1304(GLfixed factor, GLfixed units); -void APIENTRY gl_dispatch_stub_1305(GLfixed angle, GLfixed x, GLfixed y, GLfixed z); -void APIENTRY gl_dispatch_stub_1306(GLclampx value, GLboolean invert); -void APIENTRY gl_dispatch_stub_1307(GLfixed x, GLfixed y, GLfixed z); -void APIENTRY gl_dispatch_stub_1308(GLenum target, GLenum pname, GLfixed param); -void APIENTRY gl_dispatch_stub_1309(GLenum target, GLenum pname, const GLfixed *params); -void APIENTRY gl_dispatch_stub_1310(GLenum target, GLenum pname, GLfixed param); +void APIENTRY gl_dispatch_stub_1292(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar); +void APIENTRY gl_dispatch_stub_1293(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar); +void APIENTRY gl_dispatch_stub_1294(GLenum pname, GLfixed param); +void APIENTRY gl_dispatch_stub_1295(GLenum pname, const GLfixed *params); +void APIENTRY gl_dispatch_stub_1296(GLenum light, GLenum pname, GLfixed param); +void APIENTRY gl_dispatch_stub_1297(GLenum light, GLenum pname, const GLfixed *params); +void APIENTRY gl_dispatch_stub_1298(GLfixed width); +void APIENTRY gl_dispatch_stub_1299(const GLfixed *m); +void APIENTRY gl_dispatch_stub_1300(GLenum face, GLenum pname, GLfixed param); +void APIENTRY gl_dispatch_stub_1301(GLenum face, GLenum pname, const GLfixed *params); +void APIENTRY gl_dispatch_stub_1302(const GLfixed *m); +void APIENTRY gl_dispatch_stub_1303(GLenum target, GLfixed s, GLfixed t, GLfixed r, GLfixed q); +void APIENTRY gl_dispatch_stub_1304(GLfixed nx, GLfixed ny, GLfixed nz); +void APIENTRY gl_dispatch_stub_1305(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar); +void APIENTRY gl_dispatch_stub_1306(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar); +void APIENTRY gl_dispatch_stub_1307(GLfixed size); +void APIENTRY gl_dispatch_stub_1308(GLfixed factor, GLfixed units); +void APIENTRY gl_dispatch_stub_1309(GLfixed angle, GLfixed x, GLfixed y, GLfixed z); +void APIENTRY gl_dispatch_stub_1310(GLclampx value, GLboolean invert); void APIENTRY gl_dispatch_stub_1311(GLfixed x, GLfixed y, GLfixed z); -void APIENTRY gl_dispatch_stub_1312(GLenum plane, const GLfloat *equation); -void APIENTRY gl_dispatch_stub_1313(GLenum plane, const GLfixed *equation); -void APIENTRY gl_dispatch_stub_1314(GLenum plane, GLfloat *equation); -void APIENTRY gl_dispatch_stub_1315(GLenum plane, GLfixed *equation); -void APIENTRY gl_dispatch_stub_1316(GLenum pname, GLfixed *params); -void APIENTRY gl_dispatch_stub_1317(GLenum light, GLenum pname, GLfixed *params); -void APIENTRY gl_dispatch_stub_1318(GLenum face, GLenum pname, GLfixed *params); -void APIENTRY gl_dispatch_stub_1319(GLenum target, GLenum pname, GLfixed *params); -void APIENTRY gl_dispatch_stub_1320(GLenum target, GLenum pname, GLfixed *params); -void APIENTRY gl_dispatch_stub_1321(GLenum pname, GLfixed param); -void APIENTRY gl_dispatch_stub_1322(GLenum pname, const GLfixed *params); -void APIENTRY gl_dispatch_stub_1323(GLenum target, GLenum pname, const GLfixed *params); +void APIENTRY gl_dispatch_stub_1312(GLenum target, GLenum pname, GLfixed param); +void APIENTRY gl_dispatch_stub_1313(GLenum target, GLenum pname, const GLfixed *params); +void APIENTRY gl_dispatch_stub_1314(GLenum target, GLenum pname, GLfixed param); +void APIENTRY gl_dispatch_stub_1315(GLfixed x, GLfixed y, GLfixed z); +void APIENTRY gl_dispatch_stub_1316(GLenum plane, const GLfloat *equation); +void APIENTRY gl_dispatch_stub_1317(GLenum plane, const GLfixed *equation); +void APIENTRY gl_dispatch_stub_1318(GLenum plane, GLfloat *equation); +void APIENTRY gl_dispatch_stub_1319(GLenum plane, GLfixed *equation); +void APIENTRY gl_dispatch_stub_1320(GLenum pname, GLfixed *params); +void APIENTRY gl_dispatch_stub_1321(GLenum light, GLenum pname, GLfixed *params); +void APIENTRY gl_dispatch_stub_1322(GLenum face, GLenum pname, GLfixed *params); +void APIENTRY gl_dispatch_stub_1323(GLenum target, GLenum pname, GLfixed *params); +void APIENTRY gl_dispatch_stub_1324(GLenum target, GLenum pname, GLfixed *params); +void APIENTRY gl_dispatch_stub_1325(GLenum pname, GLfixed param); +void APIENTRY gl_dispatch_stub_1326(GLenum pname, const GLfixed *params); +void APIENTRY gl_dispatch_stub_1327(GLenum target, GLenum pname, const GLfixed *params); +GLAPI void APIENTRY glBlendBarrier(void); +GLAPI void APIENTRY glPrimitiveBoundingBox(GLfloat minX, GLfloat minY, GLfloat minZ, GLfloat minW, GLfloat maxX, GLfloat maxY, GLfloat maxZ, GLfloat maxW); #undef MAPI_TMP_DEFINES #endif /* MAPI_TMP_DEFINES */ @@ -1680,6 +1695,13 @@ ((void (APIENTRY *)(GLsizei n, GLuint *textures)) _func)(n, textures); } +GLAPI void APIENTRY glGetPointerv(GLenum pname, GLvoid **params) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[329]; + ((void (APIENTRY *)(GLenum pname, GLvoid **params)) _func)(pname, params); +} + GLAPI GLboolean APIENTRY glIsTexture(GLuint texture) { const struct mapi_table *_tbl = entry_current_get(); @@ -3031,6 +3053,34 @@ ((void (APIENTRY *)(GLuint index, GLbitfield mask)) _func)(index, mask); } +GLAPI void APIENTRY glBlendEquationSeparatei(GLuint buf, GLenum modeRGB, GLenum modeA) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[711]; + ((void (APIENTRY *)(GLuint buf, GLenum modeRGB, GLenum modeA)) _func)(buf, modeRGB, modeA); +} + +GLAPI void APIENTRY glBlendEquationi(GLuint buf, GLenum mode) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[712]; + ((void (APIENTRY *)(GLuint buf, GLenum mode)) _func)(buf, mode); +} + +GLAPI void APIENTRY glBlendFuncSeparatei(GLuint buf, GLenum sfactorRGB, GLenum dfactorRGB, GLenum sfactorAlpha, GLenum dfactorAlpha) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[713]; + ((void (APIENTRY *)(GLuint buf, GLenum sfactorRGB, GLenum dfactorRGB, GLenum sfactorAlpha, GLenum dfactorAlpha)) _func)(buf, sfactorRGB, dfactorRGB, sfactorAlpha, dfactorAlpha); +} + +GLAPI void APIENTRY glBlendFunci(GLuint buf, GLenum sfactor, GLenum dfactor) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[714]; + ((void (APIENTRY *)(GLuint buf, GLenum sfactor, GLenum dfactor)) _func)(buf, sfactor, dfactor); +} + GLAPI void APIENTRY glBindSampler(GLuint unit, GLuint sampler) { const struct mapi_table *_tbl = entry_current_get(); @@ -3143,6 +3193,13 @@ ((void (APIENTRY *)(GLenum mode, GLenum type, const GLvoid *indirect)) _func)(mode, type, indirect); } +GLAPI void APIENTRY glPatchParameteri(GLenum pname, GLint value) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[801]; + ((void (APIENTRY *)(GLenum pname, GLint value)) _func)(pname, value); +} + GLAPI void APIENTRY glBindTransformFeedback(GLenum target, GLuint id) { const struct mapi_table *_tbl = entry_current_get(); @@ -3241,6 +3298,41 @@ ((void (APIENTRY *)(GLuint program, GLenum pname, GLint value)) _func)(program, pname, value); } +GLAPI GLenum APIENTRY glGetGraphicsResetStatus(void) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[841]; + return ((GLenum (APIENTRY *)(void)) _func)(); +} + +GLAPI void APIENTRY glGetnUniformfv(GLuint program, GLint location, GLsizei bufSize, GLfloat *params) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[857]; + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei bufSize, GLfloat *params)) _func)(program, location, bufSize, params); +} + +GLAPI void APIENTRY glGetnUniformiv(GLuint program, GLint location, GLsizei bufSize, GLint *params) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[858]; + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei bufSize, GLint *params)) _func)(program, location, bufSize, params); +} + +GLAPI void APIENTRY glGetnUniformuiv(GLuint program, GLint location, GLsizei bufSize, GLuint *params) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[859]; + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei bufSize, GLuint *params)) _func)(program, location, bufSize, params); +} + +GLAPI void APIENTRY glReadnPixels(GLint x, GLint y, GLsizei width, GLsizei height, GLenum format, GLenum type, GLsizei bufSize, GLvoid *data) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[860]; + ((void (APIENTRY *)(GLint x, GLint y, GLsizei width, GLsizei height, GLenum format, GLenum type, GLsizei bufSize, GLvoid *data)) _func)(x, y, width, height, format, type, bufSize, data); +} + GLAPI void APIENTRY glGetInternalformativ(GLenum target, GLenum internalformat, GLenum pname, GLsizei bufSize, GLint *params) { const struct mapi_table *_tbl = entry_current_get(); @@ -3405,423 +3497,437 @@ GLAPI void APIENTRY glInvalidateFramebuffer(GLenum target, GLsizei numAttachments, const GLenum *attachments) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1016]; + mapi_func _func = ((const mapi_func *) _tbl)[1017]; ((void (APIENTRY *)(GLenum target, GLsizei numAttachments, const GLenum *attachments)) _func)(target, numAttachments, attachments); } GLAPI void APIENTRY glInvalidateSubFramebuffer(GLenum target, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1017]; + mapi_func _func = ((const mapi_func *) _tbl)[1018]; ((void (APIENTRY *)(GLenum target, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height)) _func)(target, numAttachments, attachments, x, y, width, height); } GLAPI void APIENTRY glActiveShaderProgram(GLuint pipeline, GLuint program) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1040]; + mapi_func _func = ((const mapi_func *) _tbl)[1041]; ((void (APIENTRY *)(GLuint pipeline, GLuint program)) _func)(pipeline, program); } GLAPI void APIENTRY glBindProgramPipeline(GLuint pipeline) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1041]; + mapi_func _func = ((const mapi_func *) _tbl)[1042]; ((void (APIENTRY *)(GLuint pipeline)) _func)(pipeline); } GLAPI GLuint APIENTRY glCreateShaderProgramv(GLenum type, GLsizei count, const GLchar * const *strings) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1042]; + mapi_func _func = ((const mapi_func *) _tbl)[1043]; return ((GLuint (APIENTRY *)(GLenum type, GLsizei count, const GLchar * const *strings)) _func)(type, count, strings); } GLAPI void APIENTRY glDeleteProgramPipelines(GLsizei n, const GLuint *pipelines) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1043]; + mapi_func _func = ((const mapi_func *) _tbl)[1044]; ((void (APIENTRY *)(GLsizei n, const GLuint *pipelines)) _func)(n, pipelines); } GLAPI void APIENTRY glGenProgramPipelines(GLsizei n, GLuint *pipelines) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1044]; + mapi_func _func = ((const mapi_func *) _tbl)[1045]; ((void (APIENTRY *)(GLsizei n, GLuint *pipelines)) _func)(n, pipelines); } GLAPI void APIENTRY glGetProgramPipelineInfoLog(GLuint pipeline, GLsizei bufSize, GLsizei *length, GLchar *infoLog) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1045]; + mapi_func _func = ((const mapi_func *) _tbl)[1046]; ((void (APIENTRY *)(GLuint pipeline, GLsizei bufSize, GLsizei *length, GLchar *infoLog)) _func)(pipeline, bufSize, length, infoLog); } GLAPI void APIENTRY glGetProgramPipelineiv(GLuint pipeline, GLenum pname, GLint *params) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1046]; + mapi_func _func = ((const mapi_func *) _tbl)[1047]; ((void (APIENTRY *)(GLuint pipeline, GLenum pname, GLint *params)) _func)(pipeline, pname, params); } GLAPI GLboolean APIENTRY glIsProgramPipeline(GLuint pipeline) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1047]; + mapi_func _func = ((const mapi_func *) _tbl)[1048]; return ((GLboolean (APIENTRY *)(GLuint pipeline)) _func)(pipeline); } GLAPI void APIENTRY glProgramUniform1f(GLuint program, GLint location, GLfloat x) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1051]; + mapi_func _func = ((const mapi_func *) _tbl)[1052]; ((void (APIENTRY *)(GLuint program, GLint location, GLfloat x)) _func)(program, location, x); } GLAPI void APIENTRY glProgramUniform1fv(GLuint program, GLint location, GLsizei count, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1052]; + mapi_func _func = ((const mapi_func *) _tbl)[1053]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLfloat *value)) _func)(program, location, count, value); } GLAPI void APIENTRY glProgramUniform1i(GLuint program, GLint location, GLint x) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1053]; + mapi_func _func = ((const mapi_func *) _tbl)[1054]; ((void (APIENTRY *)(GLuint program, GLint location, GLint x)) _func)(program, location, x); } GLAPI void APIENTRY glProgramUniform1iv(GLuint program, GLint location, GLsizei count, const GLint *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1054]; + mapi_func _func = ((const mapi_func *) _tbl)[1055]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLint *value)) _func)(program, location, count, value); } GLAPI void APIENTRY glProgramUniform1ui(GLuint program, GLint location, GLuint x) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1055]; + mapi_func _func = ((const mapi_func *) _tbl)[1056]; ((void (APIENTRY *)(GLuint program, GLint location, GLuint x)) _func)(program, location, x); } GLAPI void APIENTRY glProgramUniform1uiv(GLuint program, GLint location, GLsizei count, const GLuint *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1056]; + mapi_func _func = ((const mapi_func *) _tbl)[1057]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLuint *value)) _func)(program, location, count, value); } GLAPI void APIENTRY glProgramUniform2f(GLuint program, GLint location, GLfloat x, GLfloat y) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1059]; + mapi_func _func = ((const mapi_func *) _tbl)[1060]; ((void (APIENTRY *)(GLuint program, GLint location, GLfloat x, GLfloat y)) _func)(program, location, x, y); } GLAPI void APIENTRY glProgramUniform2fv(GLuint program, GLint location, GLsizei count, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1060]; + mapi_func _func = ((const mapi_func *) _tbl)[1061]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLfloat *value)) _func)(program, location, count, value); } GLAPI void APIENTRY glProgramUniform2i(GLuint program, GLint location, GLint x, GLint y) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1061]; + mapi_func _func = ((const mapi_func *) _tbl)[1062]; ((void (APIENTRY *)(GLuint program, GLint location, GLint x, GLint y)) _func)(program, location, x, y); } GLAPI void APIENTRY glProgramUniform2iv(GLuint program, GLint location, GLsizei count, const GLint *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1062]; + mapi_func _func = ((const mapi_func *) _tbl)[1063]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLint *value)) _func)(program, location, count, value); } GLAPI void APIENTRY glProgramUniform2ui(GLuint program, GLint location, GLuint x, GLuint y) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1063]; + mapi_func _func = ((const mapi_func *) _tbl)[1064]; ((void (APIENTRY *)(GLuint program, GLint location, GLuint x, GLuint y)) _func)(program, location, x, y); } GLAPI void APIENTRY glProgramUniform2uiv(GLuint program, GLint location, GLsizei count, const GLuint *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1064]; + mapi_func _func = ((const mapi_func *) _tbl)[1065]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLuint *value)) _func)(program, location, count, value); } GLAPI void APIENTRY glProgramUniform3f(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1067]; + mapi_func _func = ((const mapi_func *) _tbl)[1068]; ((void (APIENTRY *)(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z)) _func)(program, location, x, y, z); } GLAPI void APIENTRY glProgramUniform3fv(GLuint program, GLint location, GLsizei count, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1068]; + mapi_func _func = ((const mapi_func *) _tbl)[1069]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLfloat *value)) _func)(program, location, count, value); } GLAPI void APIENTRY glProgramUniform3i(GLuint program, GLint location, GLint x, GLint y, GLint z) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1069]; + mapi_func _func = ((const mapi_func *) _tbl)[1070]; ((void (APIENTRY *)(GLuint program, GLint location, GLint x, GLint y, GLint z)) _func)(program, location, x, y, z); } GLAPI void APIENTRY glProgramUniform3iv(GLuint program, GLint location, GLsizei count, const GLint *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1070]; + mapi_func _func = ((const mapi_func *) _tbl)[1071]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLint *value)) _func)(program, location, count, value); } GLAPI void APIENTRY glProgramUniform3ui(GLuint program, GLint location, GLuint x, GLuint y, GLuint z) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1071]; + mapi_func _func = ((const mapi_func *) _tbl)[1072]; ((void (APIENTRY *)(GLuint program, GLint location, GLuint x, GLuint y, GLuint z)) _func)(program, location, x, y, z); } GLAPI void APIENTRY glProgramUniform3uiv(GLuint program, GLint location, GLsizei count, const GLuint *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1072]; + mapi_func _func = ((const mapi_func *) _tbl)[1073]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLuint *value)) _func)(program, location, count, value); } GLAPI void APIENTRY glProgramUniform4f(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z, GLfloat w) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1075]; + mapi_func _func = ((const mapi_func *) _tbl)[1076]; ((void (APIENTRY *)(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z, GLfloat w)) _func)(program, location, x, y, z, w); } GLAPI void APIENTRY glProgramUniform4fv(GLuint program, GLint location, GLsizei count, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1076]; + mapi_func _func = ((const mapi_func *) _tbl)[1077]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLfloat *value)) _func)(program, location, count, value); } GLAPI void APIENTRY glProgramUniform4i(GLuint program, GLint location, GLint x, GLint y, GLint z, GLint w) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1077]; + mapi_func _func = ((const mapi_func *) _tbl)[1078]; ((void (APIENTRY *)(GLuint program, GLint location, GLint x, GLint y, GLint z, GLint w)) _func)(program, location, x, y, z, w); } GLAPI void APIENTRY glProgramUniform4iv(GLuint program, GLint location, GLsizei count, const GLint *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1078]; + mapi_func _func = ((const mapi_func *) _tbl)[1079]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLint *value)) _func)(program, location, count, value); } GLAPI void APIENTRY glProgramUniform4ui(GLuint program, GLint location, GLuint x, GLuint y, GLuint z, GLuint w) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1079]; + mapi_func _func = ((const mapi_func *) _tbl)[1080]; ((void (APIENTRY *)(GLuint program, GLint location, GLuint x, GLuint y, GLuint z, GLuint w)) _func)(program, location, x, y, z, w); } GLAPI void APIENTRY glProgramUniform4uiv(GLuint program, GLint location, GLsizei count, const GLuint *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1080]; + mapi_func _func = ((const mapi_func *) _tbl)[1081]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLuint *value)) _func)(program, location, count, value); } GLAPI void APIENTRY glProgramUniformMatrix2fv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1082]; + mapi_func _func = ((const mapi_func *) _tbl)[1083]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); } GLAPI void APIENTRY glProgramUniformMatrix2x3fv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1084]; + mapi_func _func = ((const mapi_func *) _tbl)[1085]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); } GLAPI void APIENTRY glProgramUniformMatrix2x4fv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1086]; + mapi_func _func = ((const mapi_func *) _tbl)[1087]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); } GLAPI void APIENTRY glProgramUniformMatrix3fv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1088]; + mapi_func _func = ((const mapi_func *) _tbl)[1089]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); } GLAPI void APIENTRY glProgramUniformMatrix3x2fv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1090]; + mapi_func _func = ((const mapi_func *) _tbl)[1091]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); } GLAPI void APIENTRY glProgramUniformMatrix3x4fv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1092]; + mapi_func _func = ((const mapi_func *) _tbl)[1093]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); } GLAPI void APIENTRY glProgramUniformMatrix4fv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1094]; + mapi_func _func = ((const mapi_func *) _tbl)[1095]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); } GLAPI void APIENTRY glProgramUniformMatrix4x2fv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1096]; + mapi_func _func = ((const mapi_func *) _tbl)[1097]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); } GLAPI void APIENTRY glProgramUniformMatrix4x3fv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1098]; + mapi_func _func = ((const mapi_func *) _tbl)[1099]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); } GLAPI void APIENTRY glUseProgramStages(GLuint pipeline, GLbitfield stages, GLuint program) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1100]; + mapi_func _func = ((const mapi_func *) _tbl)[1101]; ((void (APIENTRY *)(GLuint pipeline, GLbitfield stages, GLuint program)) _func)(pipeline, stages, program); } GLAPI void APIENTRY glValidateProgramPipeline(GLuint pipeline) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1101]; + mapi_func _func = ((const mapi_func *) _tbl)[1102]; ((void (APIENTRY *)(GLuint pipeline)) _func)(pipeline); } GLAPI void APIENTRY glDebugMessageCallback(GLDEBUGPROC callback, const GLvoid *userParam) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1102]; + mapi_func _func = ((const mapi_func *) _tbl)[1103]; ((void (APIENTRY *)(GLDEBUGPROC callback, const GLvoid *userParam)) _func)(callback, userParam); } GLAPI void APIENTRY glDebugMessageControl(GLenum source, GLenum type, GLenum severity, GLsizei count, const GLuint *ids, GLboolean enabled) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1103]; + mapi_func _func = ((const mapi_func *) _tbl)[1104]; ((void (APIENTRY *)(GLenum source, GLenum type, GLenum severity, GLsizei count, const GLuint *ids, GLboolean enabled)) _func)(source, type, severity, count, ids, enabled); } GLAPI void APIENTRY glDebugMessageInsert(GLenum source, GLenum type, GLuint id, GLenum severity, GLsizei length, const GLchar *buf) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1104]; + mapi_func _func = ((const mapi_func *) _tbl)[1105]; ((void (APIENTRY *)(GLenum source, GLenum type, GLuint id, GLenum severity, GLsizei length, const GLchar *buf)) _func)(source, type, id, severity, length, buf); } GLAPI GLuint APIENTRY glGetDebugMessageLog(GLuint count, GLsizei bufsize, GLenum *sources, GLenum *types, GLuint *ids, GLenum *severities, GLsizei *lengths, GLchar *messageLog) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1105]; + mapi_func _func = ((const mapi_func *) _tbl)[1106]; return ((GLuint (APIENTRY *)(GLuint count, GLsizei bufsize, GLenum *sources, GLenum *types, GLuint *ids, GLenum *severities, GLsizei *lengths, GLchar *messageLog)) _func)(count, bufsize, sources, types, ids, severities, lengths, messageLog); } GLAPI void APIENTRY glGetObjectLabel(GLenum identifier, GLuint name, GLsizei bufSize, GLsizei *length, GLchar *label) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1106]; + mapi_func _func = ((const mapi_func *) _tbl)[1107]; ((void (APIENTRY *)(GLenum identifier, GLuint name, GLsizei bufSize, GLsizei *length, GLchar *label)) _func)(identifier, name, bufSize, length, label); } GLAPI void APIENTRY glGetObjectPtrLabel(const GLvoid *ptr, GLsizei bufSize, GLsizei *length, GLchar *label) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1107]; + mapi_func _func = ((const mapi_func *) _tbl)[1108]; ((void (APIENTRY *)(const GLvoid *ptr, GLsizei bufSize, GLsizei *length, GLchar *label)) _func)(ptr, bufSize, length, label); } GLAPI void APIENTRY glObjectLabel(GLenum identifier, GLuint name, GLsizei length, const GLchar *label) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1108]; + mapi_func _func = ((const mapi_func *) _tbl)[1109]; ((void (APIENTRY *)(GLenum identifier, GLuint name, GLsizei length, const GLchar *label)) _func)(identifier, name, length, label); } GLAPI void APIENTRY glObjectPtrLabel(const GLvoid *ptr, GLsizei length, const GLchar *label) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1109]; + mapi_func _func = ((const mapi_func *) _tbl)[1110]; ((void (APIENTRY *)(const GLvoid *ptr, GLsizei length, const GLchar *label)) _func)(ptr, length, label); } GLAPI void APIENTRY glPopDebugGroup(void) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1110]; + mapi_func _func = ((const mapi_func *) _tbl)[1111]; ((void (APIENTRY *)(void)) _func)(); } GLAPI void APIENTRY glPushDebugGroup(GLenum source, GLuint id, GLsizei length, const GLchar *message) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1111]; + mapi_func _func = ((const mapi_func *) _tbl)[1112]; ((void (APIENTRY *)(GLenum source, GLuint id, GLsizei length, const GLchar *message)) _func)(source, id, length, message); } GLAPI void APIENTRY glMultiDrawElementsEXT(GLenum mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1114]; + mapi_func _func = ((const mapi_func *) _tbl)[1115]; ((void (APIENTRY *)(GLenum mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount)) _func)(mode, count, type, indices, primcount); } GLAPI void APIENTRY glVertexAttribI4i(GLuint index, GLint x, GLint y, GLint z, GLint w) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1230]; + mapi_func _func = ((const mapi_func *) _tbl)[1233]; ((void (APIENTRY *)(GLuint index, GLint x, GLint y, GLint z, GLint w)) _func)(index, x, y, z, w); } GLAPI void APIENTRY glVertexAttribI4iv(GLuint index, const GLint *v) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1231]; + mapi_func _func = ((const mapi_func *) _tbl)[1234]; ((void (APIENTRY *)(GLuint index, const GLint *v)) _func)(index, v); } GLAPI void APIENTRY glVertexAttribI4ui(GLuint index, GLuint x, GLuint y, GLuint z, GLuint w) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1232]; + mapi_func _func = ((const mapi_func *) _tbl)[1235]; ((void (APIENTRY *)(GLuint index, GLuint x, GLuint y, GLuint z, GLuint w)) _func)(index, x, y, z, w); } GLAPI void APIENTRY glVertexAttribI4uiv(GLuint index, const GLuint *v) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1233]; + mapi_func _func = ((const mapi_func *) _tbl)[1236]; ((void (APIENTRY *)(GLuint index, const GLuint *v)) _func)(index, v); } +GLAPI void APIENTRY glBlendBarrier(void) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[1328]; + ((void (APIENTRY *)(void)) _func)(); +} + +GLAPI void APIENTRY glPrimitiveBoundingBox(GLfloat minX, GLfloat minY, GLfloat minZ, GLfloat minW, GLfloat maxX, GLfloat maxY, GLfloat maxZ, GLfloat maxW) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[1329]; + ((void (APIENTRY *)(GLfloat minX, GLfloat minY, GLfloat minZ, GLfloat minW, GLfloat maxX, GLfloat maxY, GLfloat maxZ, GLfloat maxW)) _func)(minX, minY, minZ, minW, maxX, maxY, maxZ, maxW); +} + /* does not need public_entries */ #undef MAPI_TMP_PUBLIC_ENTRIES_NO_HIDDEN #endif /* MAPI_TMP_PUBLIC_ENTRIES_NO_HIDDEN */ @@ -3966,6 +4072,9 @@ STUB_ASM_ENTRY("glGenTextures")"\n" "\t"STUB_ASM_CODE("328")"\n" +STUB_ASM_ENTRY("glGetPointerv")"\n" +"\t"STUB_ASM_CODE("329")"\n" + STUB_ASM_ENTRY("glIsTexture")"\n" "\t"STUB_ASM_CODE("330")"\n" @@ -4545,6 +4654,18 @@ STUB_ASM_ENTRY("glSampleMaski")"\n" "\t"STUB_ASM_CODE("708")"\n" +STUB_ASM_ENTRY("glBlendEquationSeparatei")"\n" +"\t"STUB_ASM_CODE("711")"\n" + +STUB_ASM_ENTRY("glBlendEquationi")"\n" +"\t"STUB_ASM_CODE("712")"\n" + +STUB_ASM_ENTRY("glBlendFuncSeparatei")"\n" +"\t"STUB_ASM_CODE("713")"\n" + +STUB_ASM_ENTRY("glBlendFunci")"\n" +"\t"STUB_ASM_CODE("714")"\n" + STUB_ASM_ENTRY("glBindSampler")"\n" "\t"STUB_ASM_CODE("717")"\n" @@ -4593,6 +4714,9 @@ STUB_ASM_ENTRY("glDrawElementsIndirect")"\n" "\t"STUB_ASM_CODE("773")"\n" +STUB_ASM_ENTRY("glPatchParameteri")"\n" +"\t"STUB_ASM_CODE("801")"\n" + STUB_ASM_ENTRY("glBindTransformFeedback")"\n" "\t"STUB_ASM_CODE("802")"\n" @@ -4635,6 +4759,21 @@ STUB_ASM_ENTRY("glProgramParameteri")"\n" "\t"STUB_ASM_CODE("820")"\n" +STUB_ASM_ENTRY("glGetGraphicsResetStatus")"\n" +"\t"STUB_ASM_CODE("841")"\n" + +STUB_ASM_ENTRY("glGetnUniformfv")"\n" +"\t"STUB_ASM_CODE("857")"\n" + +STUB_ASM_ENTRY("glGetnUniformiv")"\n" +"\t"STUB_ASM_CODE("858")"\n" + +STUB_ASM_ENTRY("glGetnUniformuiv")"\n" +"\t"STUB_ASM_CODE("859")"\n" + +STUB_ASM_ENTRY("glReadnPixels")"\n" +"\t"STUB_ASM_CODE("860")"\n" + STUB_ASM_ENTRY("glGetInternalformativ")"\n" "\t"STUB_ASM_CODE("866")"\n" @@ -4705,184 +4844,190 @@ "\t"STUB_ASM_CODE("902")"\n" STUB_ASM_ENTRY("glInvalidateFramebuffer")"\n" -"\t"STUB_ASM_CODE("1016")"\n" +"\t"STUB_ASM_CODE("1017")"\n" STUB_ASM_ENTRY("glInvalidateSubFramebuffer")"\n" -"\t"STUB_ASM_CODE("1017")"\n" +"\t"STUB_ASM_CODE("1018")"\n" STUB_ASM_ENTRY("glActiveShaderProgram")"\n" -"\t"STUB_ASM_CODE("1040")"\n" +"\t"STUB_ASM_CODE("1041")"\n" STUB_ASM_ENTRY("glBindProgramPipeline")"\n" -"\t"STUB_ASM_CODE("1041")"\n" +"\t"STUB_ASM_CODE("1042")"\n" STUB_ASM_ENTRY("glCreateShaderProgramv")"\n" -"\t"STUB_ASM_CODE("1042")"\n" +"\t"STUB_ASM_CODE("1043")"\n" STUB_ASM_ENTRY("glDeleteProgramPipelines")"\n" -"\t"STUB_ASM_CODE("1043")"\n" +"\t"STUB_ASM_CODE("1044")"\n" STUB_ASM_ENTRY("glGenProgramPipelines")"\n" -"\t"STUB_ASM_CODE("1044")"\n" +"\t"STUB_ASM_CODE("1045")"\n" STUB_ASM_ENTRY("glGetProgramPipelineInfoLog")"\n" -"\t"STUB_ASM_CODE("1045")"\n" +"\t"STUB_ASM_CODE("1046")"\n" STUB_ASM_ENTRY("glGetProgramPipelineiv")"\n" -"\t"STUB_ASM_CODE("1046")"\n" +"\t"STUB_ASM_CODE("1047")"\n" STUB_ASM_ENTRY("glIsProgramPipeline")"\n" -"\t"STUB_ASM_CODE("1047")"\n" +"\t"STUB_ASM_CODE("1048")"\n" STUB_ASM_ENTRY("glProgramUniform1f")"\n" -"\t"STUB_ASM_CODE("1051")"\n" +"\t"STUB_ASM_CODE("1052")"\n" STUB_ASM_ENTRY("glProgramUniform1fv")"\n" -"\t"STUB_ASM_CODE("1052")"\n" +"\t"STUB_ASM_CODE("1053")"\n" STUB_ASM_ENTRY("glProgramUniform1i")"\n" -"\t"STUB_ASM_CODE("1053")"\n" +"\t"STUB_ASM_CODE("1054")"\n" STUB_ASM_ENTRY("glProgramUniform1iv")"\n" -"\t"STUB_ASM_CODE("1054")"\n" +"\t"STUB_ASM_CODE("1055")"\n" STUB_ASM_ENTRY("glProgramUniform1ui")"\n" -"\t"STUB_ASM_CODE("1055")"\n" +"\t"STUB_ASM_CODE("1056")"\n" STUB_ASM_ENTRY("glProgramUniform1uiv")"\n" -"\t"STUB_ASM_CODE("1056")"\n" +"\t"STUB_ASM_CODE("1057")"\n" STUB_ASM_ENTRY("glProgramUniform2f")"\n" -"\t"STUB_ASM_CODE("1059")"\n" +"\t"STUB_ASM_CODE("1060")"\n" STUB_ASM_ENTRY("glProgramUniform2fv")"\n" -"\t"STUB_ASM_CODE("1060")"\n" +"\t"STUB_ASM_CODE("1061")"\n" STUB_ASM_ENTRY("glProgramUniform2i")"\n" -"\t"STUB_ASM_CODE("1061")"\n" +"\t"STUB_ASM_CODE("1062")"\n" STUB_ASM_ENTRY("glProgramUniform2iv")"\n" -"\t"STUB_ASM_CODE("1062")"\n" +"\t"STUB_ASM_CODE("1063")"\n" STUB_ASM_ENTRY("glProgramUniform2ui")"\n" -"\t"STUB_ASM_CODE("1063")"\n" +"\t"STUB_ASM_CODE("1064")"\n" STUB_ASM_ENTRY("glProgramUniform2uiv")"\n" -"\t"STUB_ASM_CODE("1064")"\n" +"\t"STUB_ASM_CODE("1065")"\n" STUB_ASM_ENTRY("glProgramUniform3f")"\n" -"\t"STUB_ASM_CODE("1067")"\n" +"\t"STUB_ASM_CODE("1068")"\n" STUB_ASM_ENTRY("glProgramUniform3fv")"\n" -"\t"STUB_ASM_CODE("1068")"\n" +"\t"STUB_ASM_CODE("1069")"\n" STUB_ASM_ENTRY("glProgramUniform3i")"\n" -"\t"STUB_ASM_CODE("1069")"\n" +"\t"STUB_ASM_CODE("1070")"\n" STUB_ASM_ENTRY("glProgramUniform3iv")"\n" -"\t"STUB_ASM_CODE("1070")"\n" +"\t"STUB_ASM_CODE("1071")"\n" STUB_ASM_ENTRY("glProgramUniform3ui")"\n" -"\t"STUB_ASM_CODE("1071")"\n" +"\t"STUB_ASM_CODE("1072")"\n" STUB_ASM_ENTRY("glProgramUniform3uiv")"\n" -"\t"STUB_ASM_CODE("1072")"\n" +"\t"STUB_ASM_CODE("1073")"\n" STUB_ASM_ENTRY("glProgramUniform4f")"\n" -"\t"STUB_ASM_CODE("1075")"\n" +"\t"STUB_ASM_CODE("1076")"\n" STUB_ASM_ENTRY("glProgramUniform4fv")"\n" -"\t"STUB_ASM_CODE("1076")"\n" +"\t"STUB_ASM_CODE("1077")"\n" STUB_ASM_ENTRY("glProgramUniform4i")"\n" -"\t"STUB_ASM_CODE("1077")"\n" +"\t"STUB_ASM_CODE("1078")"\n" STUB_ASM_ENTRY("glProgramUniform4iv")"\n" -"\t"STUB_ASM_CODE("1078")"\n" +"\t"STUB_ASM_CODE("1079")"\n" STUB_ASM_ENTRY("glProgramUniform4ui")"\n" -"\t"STUB_ASM_CODE("1079")"\n" +"\t"STUB_ASM_CODE("1080")"\n" STUB_ASM_ENTRY("glProgramUniform4uiv")"\n" -"\t"STUB_ASM_CODE("1080")"\n" +"\t"STUB_ASM_CODE("1081")"\n" STUB_ASM_ENTRY("glProgramUniformMatrix2fv")"\n" -"\t"STUB_ASM_CODE("1082")"\n" +"\t"STUB_ASM_CODE("1083")"\n" STUB_ASM_ENTRY("glProgramUniformMatrix2x3fv")"\n" -"\t"STUB_ASM_CODE("1084")"\n" +"\t"STUB_ASM_CODE("1085")"\n" STUB_ASM_ENTRY("glProgramUniformMatrix2x4fv")"\n" -"\t"STUB_ASM_CODE("1086")"\n" +"\t"STUB_ASM_CODE("1087")"\n" STUB_ASM_ENTRY("glProgramUniformMatrix3fv")"\n" -"\t"STUB_ASM_CODE("1088")"\n" +"\t"STUB_ASM_CODE("1089")"\n" STUB_ASM_ENTRY("glProgramUniformMatrix3x2fv")"\n" -"\t"STUB_ASM_CODE("1090")"\n" +"\t"STUB_ASM_CODE("1091")"\n" STUB_ASM_ENTRY("glProgramUniformMatrix3x4fv")"\n" -"\t"STUB_ASM_CODE("1092")"\n" +"\t"STUB_ASM_CODE("1093")"\n" STUB_ASM_ENTRY("glProgramUniformMatrix4fv")"\n" -"\t"STUB_ASM_CODE("1094")"\n" +"\t"STUB_ASM_CODE("1095")"\n" STUB_ASM_ENTRY("glProgramUniformMatrix4x2fv")"\n" -"\t"STUB_ASM_CODE("1096")"\n" +"\t"STUB_ASM_CODE("1097")"\n" STUB_ASM_ENTRY("glProgramUniformMatrix4x3fv")"\n" -"\t"STUB_ASM_CODE("1098")"\n" +"\t"STUB_ASM_CODE("1099")"\n" STUB_ASM_ENTRY("glUseProgramStages")"\n" -"\t"STUB_ASM_CODE("1100")"\n" +"\t"STUB_ASM_CODE("1101")"\n" STUB_ASM_ENTRY("glValidateProgramPipeline")"\n" -"\t"STUB_ASM_CODE("1101")"\n" +"\t"STUB_ASM_CODE("1102")"\n" STUB_ASM_ENTRY("glDebugMessageCallback")"\n" -"\t"STUB_ASM_CODE("1102")"\n" +"\t"STUB_ASM_CODE("1103")"\n" STUB_ASM_ENTRY("glDebugMessageControl")"\n" -"\t"STUB_ASM_CODE("1103")"\n" +"\t"STUB_ASM_CODE("1104")"\n" STUB_ASM_ENTRY("glDebugMessageInsert")"\n" -"\t"STUB_ASM_CODE("1104")"\n" +"\t"STUB_ASM_CODE("1105")"\n" STUB_ASM_ENTRY("glGetDebugMessageLog")"\n" -"\t"STUB_ASM_CODE("1105")"\n" +"\t"STUB_ASM_CODE("1106")"\n" STUB_ASM_ENTRY("glGetObjectLabel")"\n" -"\t"STUB_ASM_CODE("1106")"\n" +"\t"STUB_ASM_CODE("1107")"\n" STUB_ASM_ENTRY("glGetObjectPtrLabel")"\n" -"\t"STUB_ASM_CODE("1107")"\n" +"\t"STUB_ASM_CODE("1108")"\n" STUB_ASM_ENTRY("glObjectLabel")"\n" -"\t"STUB_ASM_CODE("1108")"\n" +"\t"STUB_ASM_CODE("1109")"\n" STUB_ASM_ENTRY("glObjectPtrLabel")"\n" -"\t"STUB_ASM_CODE("1109")"\n" +"\t"STUB_ASM_CODE("1110")"\n" STUB_ASM_ENTRY("glPopDebugGroup")"\n" -"\t"STUB_ASM_CODE("1110")"\n" +"\t"STUB_ASM_CODE("1111")"\n" STUB_ASM_ENTRY("glPushDebugGroup")"\n" -"\t"STUB_ASM_CODE("1111")"\n" +"\t"STUB_ASM_CODE("1112")"\n" STUB_ASM_ENTRY("glMultiDrawElementsEXT")"\n" -"\t"STUB_ASM_CODE("1114")"\n" +"\t"STUB_ASM_CODE("1115")"\n" STUB_ASM_ENTRY("glVertexAttribI4i")"\n" -"\t"STUB_ASM_CODE("1230")"\n" +"\t"STUB_ASM_CODE("1233")"\n" STUB_ASM_ENTRY("glVertexAttribI4iv")"\n" -"\t"STUB_ASM_CODE("1231")"\n" +"\t"STUB_ASM_CODE("1234")"\n" STUB_ASM_ENTRY("glVertexAttribI4ui")"\n" -"\t"STUB_ASM_CODE("1232")"\n" +"\t"STUB_ASM_CODE("1235")"\n" STUB_ASM_ENTRY("glVertexAttribI4uiv")"\n" -"\t"STUB_ASM_CODE("1233")"\n" +"\t"STUB_ASM_CODE("1236")"\n" + +STUB_ASM_ENTRY("glBlendBarrier")"\n" +"\t"STUB_ASM_CODE("1328")"\n" + +STUB_ASM_ENTRY("glPrimitiveBoundingBox")"\n" +"\t"STUB_ASM_CODE("1329")"\n" ); #undef MAPI_TMP_STUB_ASM_GCC_NO_HIDDEN diff -Nru mesa-12.0.6/src/mapi/glapi/gen/apiexec.py mesa-17.0.7/src/mapi/glapi/gen/apiexec.py --- mesa-12.0.6/src/mapi/glapi/gen/apiexec.py 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/gen/apiexec.py 2017-06-01 10:37:10.000000000 +0000 @@ -133,12 +133,12 @@ # # Mesa does not support either of the geometry shader extensions, so # OpenGL 3.2 is required. - "ViewportArrayv": exec_info(core=32), - "ViewportIndexedf": exec_info(core=32), - "ViewportIndexedfv": exec_info(core=32), - "ScissorArrayv": exec_info(core=32), - "ScissorIndexed": exec_info(core=32), - "ScissorIndexedv": exec_info(core=32), + "ViewportArrayv": exec_info(core=32, es2=31), + "ViewportIndexedf": exec_info(core=32, es2=31), + "ViewportIndexedfv": exec_info(core=32, es2=31), + "ScissorArrayv": exec_info(core=32, es2=31), + "ScissorIndexed": exec_info(core=32, es2=31), + "ScissorIndexedv": exec_info(core=32, es2=31), "DepthRangeArrayv": exec_info(core=32), "DepthRangeIndexed": exec_info(core=32), # GetFloati_v also GL_ARB_shader_atomic_counters diff -Nru mesa-12.0.6/src/mapi/glapi/gen/ARB_compute_variable_group_size.xml mesa-17.0.7/src/mapi/glapi/gen/ARB_compute_variable_group_size.xml --- mesa-12.0.6/src/mapi/glapi/gen/ARB_compute_variable_group_size.xml 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/gen/ARB_compute_variable_group_size.xml 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,25 @@ + + + + + + + + + + + + + + + + + + + + + + + + + diff -Nru mesa-12.0.6/src/mapi/glapi/gen/ARB_tessellation_shader.xml mesa-17.0.7/src/mapi/glapi/gen/ARB_tessellation_shader.xml --- mesa-12.0.6/src/mapi/glapi/gen/ARB_tessellation_shader.xml 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/gen/ARB_tessellation_shader.xml 2017-06-01 10:37:10.000000000 +0000 @@ -58,6 +58,16 @@ + + + + + + + + + + diff -Nru mesa-12.0.6/src/mapi/glapi/gen/es_EXT.xml mesa-17.0.7/src/mapi/glapi/gen/es_EXT.xml --- mesa-12.0.6/src/mapi/glapi/gen/es_EXT.xml 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/gen/es_EXT.xml 2017-06-01 10:37:10.000000000 +0000 @@ -790,6 +790,11 @@ + + + + + @@ -876,6 +881,16 @@ + + + + + + + + + + @@ -924,6 +939,21 @@ + + + + + + + + + + + + + + + @@ -1079,6 +1109,21 @@ + + + + + + + + + + + + + + + @@ -1297,4 +1342,54 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff -Nru mesa-12.0.6/src/mapi/glapi/gen/EXT_window_rectangles.xml mesa-17.0.7/src/mapi/glapi/gen/EXT_window_rectangles.xml --- mesa-12.0.6/src/mapi/glapi/gen/EXT_window_rectangles.xml 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/gen/EXT_window_rectangles.xml 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,29 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff -Nru mesa-12.0.6/src/mapi/glapi/gen/gl_API.xml mesa-17.0.7/src/mapi/glapi/gen/gl_API.xml --- mesa-12.0.6/src/mapi/glapi/gen/gl_API.xml 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/gen/gl_API.xml 2017-06-01 10:37:10.000000000 +0000 @@ -3185,7 +3185,7 @@ - + @@ -5858,7 +5858,7 @@ - + @@ -8254,7 +8254,9 @@ - + + + @@ -8294,6 +8296,71 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -10123,7 +10190,7 @@ - + @@ -12745,6 +12812,10 @@ + + + + @@ -12758,6 +12829,8 @@ + + diff -Nru mesa-12.0.6/src/mapi/glapi/gen/gl_enums.py mesa-17.0.7/src/mapi/glapi/gen/gl_enums.py --- mesa-12.0.6/src/mapi/glapi/gen/gl_enums.py 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/gen/gl_enums.py 2017-06-01 10:37:10.000000000 +0000 @@ -83,7 +83,12 @@ static char token_tmp[20]; -const char *_mesa_enum_to_string( int nr ) +/** + * This function always returns a string. If the number is a valid enum, it + * returns the enum name. Otherwise, it returns a numeric string. + */ +const char * +_mesa_enum_to_string(int nr) { enum_elt *elt; diff -Nru mesa-12.0.6/src/mapi/glapi/gen/gl_genexec.py mesa-17.0.7/src/mapi/glapi/gen/gl_genexec.py --- mesa-12.0.6/src/mapi/glapi/gen/gl_genexec.py 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/gen/gl_genexec.py 2017-06-01 10:37:10.000000000 +0000 @@ -56,6 +56,7 @@ #include "main/blit.h" #include "main/bufferobj.h" #include "main/arrayobj.h" +#include "main/bbox.h" #include "main/buffers.h" #include "main/clear.h" #include "main/clip.h" @@ -111,7 +112,7 @@ #include "main/texparam.h" #include "main/texstate.h" #include "main/texstorage.h" -#include "main/texturebarrier.h" +#include "main/barrier.h" #include "main/textureview.h" #include "main/transformfeedback.h" #include "main/mtypes.h" diff -Nru mesa-12.0.6/src/mapi/glapi/gen/gl_x86_asm.py mesa-17.0.7/src/mapi/glapi/gen/gl_x86_asm.py --- mesa-12.0.6/src/mapi/glapi/gen/gl_x86_asm.py 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/gen/gl_x86_asm.py 2017-06-01 10:37:10.000000000 +0000 @@ -120,7 +120,7 @@ print '\tJMP(GL_OFFSET(off))' print '#endif' print '' - print '#ifdef HAVE_ALIAS' + print '#ifdef HAVE_FUNC_ATTRIBUTE_ALIAS' print '# define GL_STUB_ALIAS(fn,off,fn_alt,alias,alias_alt)\t\\' print '\t.globl\tGL_PREFIX(fn, fn_alt) ;\t\t\t\\' print '\t.set\tGL_PREFIX(fn, fn_alt), GL_PREFIX(alias, alias_alt)' diff -Nru mesa-12.0.6/src/mapi/glapi/gen/glX_proto_send.py mesa-17.0.7/src/mapi/glapi/gen/glX_proto_send.py --- mesa-12.0.6/src/mapi/glapi/gen/glX_proto_send.py 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/gen/glX_proto_send.py 2017-06-01 10:37:10.000000000 +0000 @@ -383,7 +383,7 @@ procs[n] = func.static_glx_name(n) print """ -#ifdef GLX_SHARED_GLAPI +#ifdef GLX_INDIRECT_RENDERING static const struct proc_pair { @@ -419,7 +419,7 @@ return (pair) ? pair->proc : NULL; } -#endif /* GLX_SHARED_GLAPI */ +#endif /* GLX_INDIRECT_RENDERING */ """ return @@ -573,7 +573,7 @@ condition = 'compsize > 0' print 'if (%s) {' % (condition) - print ' (*gc->fillImage)(gc, %s, %s, %s, %s, %s, %s, %s, %s, %s);' % (dim_str, width, height, depth, param.img_format, param.img_type, param.name, pcPtr, pixHeaderPtr) + print ' gc->fillImage(gc, %s, %s, %s, %s, %s, %s, %s, %s, %s);' % (dim_str, width, height, depth, param.img_format, param.img_type, param.name, pcPtr, pixHeaderPtr) print '} else {' print ' (void) memcpy( %s, default_pixel_store_%uD, default_pixel_store_%uD_size );' % (pixHeaderPtr, dim, dim) print '}' @@ -635,6 +635,15 @@ if name != None and name not in f.glx_vendorpriv_names: print '#endif' + if f.command_variable_length() != "": + print " if (0%s < 0) {" % f.command_variable_length() + print " __glXSetError(gc, GL_INVALID_VALUE);" + if f.return_type != 'void': + print " return 0;" + else: + print " return;" + print " }" + condition_list = [] for p in f.parameterIterateCounters(): condition_list.append( "%s >= 0" % (p.name) ) @@ -1105,7 +1114,7 @@ break print '' - print '#ifdef GLX_SHARED_GLAPI' + print '#ifdef GLX_INDIRECT_RENDERING' print 'extern _X_HIDDEN void (*__indirect_get_proc_address(const char *name))(void);' print '#endif' diff -Nru mesa-12.0.6/src/mapi/glapi/gen/glX_proto_size.py mesa-17.0.7/src/mapi/glapi/gen/glX_proto_size.py --- mesa-12.0.6/src/mapi/glapi/gen/glX_proto_size.py 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/gen/glX_proto_size.py 2017-06-01 10:37:10.000000000 +0000 @@ -330,10 +330,7 @@ self.printFastcall() print '' print '' - print '#if defined(__CYGWIN__) || defined(__MINGW32__) || defined(GLX_USE_APPLEGL)' - print '# undef HAVE_ALIAS' - print '#endif' - print '#ifdef HAVE_ALIAS' + print '#ifdef HAVE_FUNC_ATTRIBUTE_ALIAS' print '# define ALIAS2(from,to) \\' print ' _X_INTERNAL PURE FASTCALL GLint __gl ## from ## _size( GLenum e ) \\' print ' __attribute__ ((alias( # to )));' @@ -452,10 +449,7 @@ print '#include "indirect_size.h"' print '#include "indirect_reqsize.h"' print '' - print '#if defined(__CYGWIN__) || defined(__MINGW32__)' - print '# undef HAVE_ALIAS' - print '#endif' - print '#ifdef HAVE_ALIAS' + print '#ifdef HAVE_FUNC_ATTRIBUTE_ALIAS' print '# define ALIAS2(from,to) \\' print ' GLint __glX ## from ## ReqSize( const GLbyte * pc, Bool swap, int reqlen ) \\' print ' __attribute__ ((alias( # to )));' diff -Nru mesa-12.0.6/src/mapi/glapi/gen/KHR_robustness.xml mesa-17.0.7/src/mapi/glapi/gen/KHR_robustness.xml --- mesa-12.0.6/src/mapi/glapi/gen/KHR_robustness.xml 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/gen/KHR_robustness.xml 2017-06-01 10:37:10.000000000 +0000 @@ -12,6 +12,9 @@ + + + diff -Nru mesa-12.0.6/src/mapi/glapi/gen/Makefile.am mesa-17.0.7/src/mapi/glapi/gen/Makefile.am --- mesa-12.0.6/src/mapi/glapi/gen/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/gen/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -32,6 +32,9 @@ if HAVE_APPLEDRI MESA_GLAPI_OUTPUTS += $(MESA_GLAPI_DIR)/glapi_gentable.c endif +if HAVE_WINDOWSDRI +MESA_GLAPI_OUTPUTS += $(MESA_GLAPI_DIR)/glapi_gentable.c +endif MESA_GLAPI_ASM_OUTPUTS = if HAVE_X86_ASM @@ -117,6 +120,7 @@ ARB_color_buffer_float.xml \ ARB_compressed_texture_pixel_storage.xml \ ARB_compute_shader.xml \ + ARB_compute_variable_group_size.xml \ ARB_copy_buffer.xml \ ARB_copy_image.xml \ ARB_debug_output.xml \ @@ -188,6 +192,7 @@ EXT_texture_array.xml \ EXT_texture_integer.xml \ EXT_transform_feedback.xml \ + EXT_window_rectangles.xml \ GREMEDY_string_marker.xml \ INTEL_performance_query.xml \ KHR_debug.xml \ diff -Nru mesa-12.0.6/src/mapi/glapi/gen/Makefile.in mesa-17.0.7/src/mapi/glapi/gen/Makefile.in --- mesa-12.0.6/src/mapi/glapi/gen/Makefile.in 2017-01-24 01:41:54.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/gen/Makefile.in 2017-06-01 10:37:24.000000000 +0000 @@ -89,9 +89,10 @@ host_triplet = @host@ target_triplet = @target@ @HAVE_APPLEDRI_TRUE@am__append_1 = $(MESA_GLAPI_DIR)/glapi_gentable.c -@HAVE_X86_64_ASM_TRUE@@HAVE_X86_ASM_TRUE@am__append_2 = $(MESA_GLAPI_DIR)/glapi_x86-64.S -@HAVE_X86_64_ASM_FALSE@@HAVE_X86_ASM_TRUE@am__append_3 = $(MESA_GLAPI_DIR)/glapi_x86.S -@HAVE_SPARC_ASM_TRUE@am__append_4 = $(MESA_GLAPI_DIR)/glapi_sparc.S +@HAVE_WINDOWSDRI_TRUE@am__append_2 = $(MESA_GLAPI_DIR)/glapi_gentable.c +@HAVE_X86_64_ASM_TRUE@@HAVE_X86_ASM_TRUE@am__append_3 = $(MESA_GLAPI_DIR)/glapi_x86-64.S +@HAVE_X86_64_ASM_FALSE@@HAVE_X86_ASM_TRUE@am__append_4 = $(MESA_GLAPI_DIR)/glapi_x86.S +@HAVE_SPARC_ASM_TRUE@am__append_5 = $(MESA_GLAPI_DIR)/glapi_sparc.S subdir = src/mapi/glapi/gen ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps = $(top_srcdir)/m4/ax_check_gnu_make.m4 \ @@ -137,6 +138,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -151,6 +154,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -180,10 +184,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -233,11 +238,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -277,8 +279,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -315,8 +315,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -325,7 +323,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -333,13 +330,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -368,6 +366,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -456,9 +455,9 @@ MESA_GLX_DIR = $(top_builddir)/src/glx MESA_GLAPI_OUTPUTS = $(MESA_GLAPI_DIR)/glapi_mapi_tmp.h \ $(MESA_GLAPI_DIR)/glprocs.h $(MESA_GLAPI_DIR)/glapitemp.h \ - $(MESA_GLAPI_DIR)/glapitable.h $(am__append_1) -MESA_GLAPI_ASM_OUTPUTS = $(am__append_2) $(am__append_3) \ - $(am__append_4) + $(MESA_GLAPI_DIR)/glapitable.h $(am__append_1) $(am__append_2) +MESA_GLAPI_ASM_OUTPUTS = $(am__append_3) $(am__append_4) \ + $(am__append_5) BUILT_SOURCES = \ $(MESA_GLAPI_OUTPUTS) \ $(MESA_GLAPI_ASM_OUTPUTS) \ @@ -528,6 +527,7 @@ ARB_color_buffer_float.xml \ ARB_compressed_texture_pixel_storage.xml \ ARB_compute_shader.xml \ + ARB_compute_variable_group_size.xml \ ARB_copy_buffer.xml \ ARB_copy_image.xml \ ARB_debug_output.xml \ @@ -599,6 +599,7 @@ EXT_texture_array.xml \ EXT_texture_integer.xml \ EXT_transform_feedback.xml \ + EXT_window_rectangles.xml \ GREMEDY_string_marker.xml \ INTEL_performance_query.xml \ KHR_debug.xml \ diff -Nru mesa-12.0.6/src/mapi/glapi/gen/remap_helper.py mesa-17.0.7/src/mapi/glapi/gen/remap_helper.py --- mesa-12.0.6/src/mapi/glapi/gen/remap_helper.py 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/gen/remap_helper.py 2017-06-01 10:37:10.000000000 +0000 @@ -121,48 +121,6 @@ print ' { -1, -1 }' print '};' print '' - - # collect functions by versions/extensions - extension_functions = {} - abi_extensions = [] - for f in api.functionIterateAll(): - for n in f.entry_points: - category, num = api.get_category_for_name(n) - # consider only GL_VERSION_X_Y or extensions - c = gl_XML.real_category_name(category) - if c.startswith("GL_"): - if not extension_functions.has_key(c): - extension_functions[c] = [] - extension_functions[c].append(f) - # remember the ext names of the ABI - if (f.is_abi() and n == f.name and - c not in abi_extensions): - abi_extensions.append(c) - # ignore the ABI itself - for ext in abi_extensions: - extension_functions.pop(ext) - - extensions = extension_functions.keys() - extensions.sort() - - # output ABI functions that have alternative names (with ext suffix) - print '/* these functions are in the ABI, but have alternative names */' - print 'static const struct gl_function_remap MESA_alt_functions[] = {' - for ext in extensions: - funcs = [] - for f in extension_functions[ext]: - # test if the function is in the ABI and has alt names - if f.is_abi() and len(f.entry_points) > 1: - funcs.append(f) - if not funcs: - continue - print ' /* from %s */' % ext - for f in funcs: - print ' { %5d, _gloffset_%s },' \ - % (pool_indices[f], f.name) - print ' { -1, -1 }' - print '};' - print '' return diff -Nru mesa-12.0.6/src/mapi/glapi/gen/static_data.py mesa-17.0.7/src/mapi/glapi/gen/static_data.py --- mesa-12.0.6/src/mapi/glapi/gen/static_data.py 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/gen/static_data.py 2017-06-01 10:37:10.000000000 +0000 @@ -436,1291 +436,1303 @@ } functions = [ - "Accum", - "ActiveShaderProgram", - "ActiveTexture", - "ActiveTextureARB", - "AlphaFunc", - "AlphaFuncx", - "AreTexturesResident", - "AreTexturesResidentEXT", - "ArrayElement", - "ArrayElementEXT", - "AttachObjectARB", - "AttachShader", - "Begin", - "BeginConditionalRender", - "BeginConditionalRenderNV", - "BeginQuery", - "BeginQueryARB", - "BeginQueryIndexed", - "BeginTransformFeedback", - "BindAttribLocation", - "BindAttribLocationARB", - "BindBuffer", - "BindBufferARB", - "BindBufferBase", - "BindBufferRange", - "BindBuffersBase", - "BindBuffersRange", - "BindFragDataLocation", - "BindFragDataLocationEXT", - "BindFragDataLocationIndexed", - "BindFramebuffer", - "BindFramebufferEXT", - "BindImageTexture", - "BindImageTextures", - "BindProgramARB", - "BindProgramPipeline", - "BindRenderbuffer", - "BindRenderbufferEXT", - "BindSampler", - "BindSamplers", - "BindTexture", - "BindTextureEXT", - "BindTextures", - "BindTransformFeedback", - "BindVertexArray", - "BindVertexBuffer", - "BindVertexBuffers", - "Bitmap", - "BlendColor", - "BlendColorEXT", - "BlendEquation", - "BlendEquationEXT", - "BlendEquationiARB", - "BlendEquationSeparate", - "BlendEquationSeparateiARB", - "BlendFunc", - "BlendFunciARB", - "BlendFuncSeparate", - "BlendFuncSeparateEXT", - "BlendFuncSeparateiARB", - "BlitFramebuffer", - "BufferData", - "BufferDataARB", - "BufferStorage", - "BufferSubData", - "BufferSubDataARB", - "CallList", - "CallLists", - "CheckFramebufferStatus", - "CheckFramebufferStatusEXT", - "ClampColor", - "ClampColorARB", - "Clear", - "ClearAccum", - "ClearBufferData", - "ClearBufferfi", - "ClearBufferfv", - "ClearBufferiv", - "ClearBufferSubData", - "ClearBufferuiv", - "ClearColor", - "ClearColorIiEXT", - "ClearColorIuiEXT", - "ClearColorx", - "ClearDepth", - "ClearDepthf", - "ClearDepthx", - "ClearIndex", - "ClearStencil", - "ClearTexImage", - "ClearTexSubImage", - "ClientActiveTexture", - "ClientActiveTextureARB", - "ClientWaitSync", - "ClipPlane", - "ClipPlanef", - "ClipPlanex", - "Color3b", - "Color3bv", - "Color3d", - "Color3dv", - "Color3f", - "Color3fv", - "Color3i", - "Color3iv", - "Color3s", - "Color3sv", - "Color3ub", - "Color3ubv", - "Color3ui", - "Color3uiv", - "Color3us", - "Color3usv", - "Color4b", - "Color4bv", - "Color4d", - "Color4dv", - "Color4f", - "Color4fv", - "Color4i", - "Color4iv", - "Color4s", - "Color4sv", - "Color4ub", - "Color4ubv", - "Color4ui", - "Color4uiv", - "Color4us", - "Color4usv", - "Color4x", - "ColorMask", - "ColorMaski", - "ColorMaskIndexedEXT", - "ColorMaterial", - "ColorP3ui", - "ColorP3uiv", - "ColorP4ui", - "ColorP4uiv", - "ColorPointer", - "ColorPointerEXT", - "ColorSubTable", - "ColorTable", - "ColorTableParameterfv", - "ColorTableParameteriv", - "CompileShader", - "CompileShaderARB", - "CompressedTexImage1D", - "CompressedTexImage1DARB", - "CompressedTexImage2D", - "CompressedTexImage2DARB", - "CompressedTexImage3D", - "CompressedTexImage3DARB", - "CompressedTexSubImage1D", - "CompressedTexSubImage1DARB", - "CompressedTexSubImage2D", - "CompressedTexSubImage2DARB", - "CompressedTexSubImage3D", - "CompressedTexSubImage3DARB", - "ConvolutionFilter1D", - "ConvolutionFilter2D", - "ConvolutionParameterf", - "ConvolutionParameterfv", - "ConvolutionParameteri", - "ConvolutionParameteriv", - "CopyBufferSubData", - "CopyColorSubTable", - "CopyColorTable", - "CopyConvolutionFilter1D", - "CopyConvolutionFilter2D", - "CopyImageSubData", - "CopyPixels", - "CopyTexImage1D", - "CopyTexImage2D", - "CopyTexSubImage1D", - "CopyTexSubImage2D", - "CopyTexSubImage3D", - "CopyTexSubImage3DEXT", - "CreateProgram", - "CreateProgramObjectARB", - "CreateShader", - "CreateShaderObjectARB", - "CreateShaderProgramv", - "CullFace", - "DebugMessageCallback", - "DebugMessageCallbackARB", - "DebugMessageControl", - "DebugMessageControlARB", - "DebugMessageInsert", - "DebugMessageInsertARB", - "DeleteBuffers", - "DeleteBuffersARB", - "DeleteFramebuffers", - "DeleteFramebuffersEXT", - "DeleteLists", - "DeleteObjectARB", - "DeleteProgram", - "DeleteProgramPipelines", - "DeleteProgramsARB", - "DeleteQueries", - "DeleteQueriesARB", - "DeleteRenderbuffers", - "DeleteRenderbuffersEXT", - "DeleteSamplers", - "DeleteShader", - "DeleteSync", - "DeleteTextures", - "DeleteTexturesEXT", - "DeleteTransformFeedbacks", - "DeleteVertexArrays", - "DepthFunc", - "DepthMask", - "DepthRange", - "DepthRangeArrayv", - "DepthRangef", - "DepthRangeIndexed", - "DepthRangex", - "DetachObjectARB", - "DetachShader", - "Disable", - "DisableClientState", - "Disablei", - "DisableIndexedEXT", - "DisableVertexAttribArray", - "DisableVertexAttribArrayARB", - "DispatchCompute", - "DispatchComputeIndirect", - "DrawArrays", - "DrawArraysEXT", - "DrawArraysIndirect", - "DrawArraysInstanced", - "DrawArraysInstancedARB", - "DrawArraysInstancedBaseInstance", - "DrawArraysInstancedEXT", - "DrawBuffer", - "DrawBuffers", - "DrawBuffersARB", - "DrawBuffersATI", - "DrawElements", - "DrawElementsBaseVertex", - "DrawElementsIndirect", - "DrawElementsInstanced", - "DrawElementsInstancedARB", - "DrawElementsInstancedBaseInstance", - "DrawElementsInstancedBaseVertex", - "DrawElementsInstancedBaseVertexBaseInstance", - "DrawElementsInstancedEXT", - "DrawPixels", - "DrawRangeElements", - "DrawRangeElementsBaseVertex", - "DrawRangeElementsEXT", - "DrawTransformFeedback", - "DrawTransformFeedbackInstanced", - "DrawTransformFeedbackStream", - "DrawTransformFeedbackStreamInstanced", - "EdgeFlag", - "EdgeFlagPointer", - "EdgeFlagPointerEXT", - "EdgeFlagv", - "Enable", - "EnableClientState", - "Enablei", - "EnableIndexedEXT", - "EnableVertexAttribArray", - "EnableVertexAttribArrayARB", - "End", - "EndConditionalRender", - "EndConditionalRenderNV", - "EndList", - "EndQuery", - "EndQueryARB", - "EndQueryIndexed", - "EndTransformFeedback", - "EvalCoord1d", - "EvalCoord1dv", - "EvalCoord1f", - "EvalCoord1fv", - "EvalCoord2d", - "EvalCoord2dv", - "EvalCoord2f", - "EvalCoord2fv", - "EvalMesh1", - "EvalMesh2", - "EvalPoint1", - "EvalPoint2", - "FeedbackBuffer", - "FenceSync", - "Finish", - "Flush", - "FlushMappedBufferRange", - "FogCoordd", - "FogCoorddEXT", - "FogCoorddv", - "FogCoorddvEXT", - "FogCoordf", - "FogCoordfEXT", - "FogCoordfv", - "FogCoordfvEXT", - "FogCoordPointer", - "FogCoordPointerEXT", - "Fogf", - "Fogfv", - "Fogi", - "Fogiv", - "Fogx", - "Fogxv", - "FramebufferParameteri", - "FramebufferRenderbuffer", - "FramebufferRenderbufferEXT", - "FramebufferTexture", - "FramebufferTexture1D", - "FramebufferTexture1DEXT", - "FramebufferTexture2D", - "FramebufferTexture2DEXT", - "FramebufferTexture3D", - "FramebufferTexture3DEXT", - "FramebufferTextureARB", - "FramebufferTextureLayer", - "FramebufferTextureLayerARB", - "FramebufferTextureLayerEXT", - "FrontFace", - "Frustum", - "Frustumf", - "Frustumx", - "GenBuffers", - "GenBuffersARB", - "GenerateMipmap", - "GenerateMipmapEXT", - "GenFramebuffers", - "GenFramebuffersEXT", - "GenLists", - "GenProgramPipelines", - "GenProgramsARB", - "GenQueries", - "GenQueriesARB", - "GenRenderbuffers", - "GenRenderbuffersEXT", - "GenSamplers", - "GenTextures", - "GenTexturesEXT", - "GenTransformFeedbacks", - "GenVertexArrays", - "GetActiveAtomicCounterBufferiv", - "GetActiveAttrib", - "GetActiveAttribARB", - "GetActiveUniform", - "GetActiveUniformARB", - "GetActiveUniformBlockiv", - "GetActiveUniformBlockName", - "GetActiveUniformName", - "GetActiveUniformsiv", - "GetAttachedObjectsARB", - "GetAttachedShaders", - "GetAttribLocation", - "GetAttribLocationARB", - "GetBooleanIndexedvEXT", - "GetBooleani_v", - "GetBooleanv", - "GetBufferParameteri64v", - "GetBufferParameteriv", - "GetBufferParameterivARB", - "GetBufferPointerv", - "GetBufferPointervARB", - "GetBufferSubData", - "GetBufferSubDataARB", - "GetClipPlane", - "GetClipPlanef", - "GetClipPlanex", - "GetColorTable", - "GetColorTableParameterfv", - "GetColorTableParameteriv", - "GetCompressedTexImage", - "GetCompressedTexImageARB", - "GetConvolutionFilter", - "GetConvolutionParameterfv", - "GetConvolutionParameteriv", - "GetDebugMessageLog", - "GetDebugMessageLogARB", - "GetDoublei_v", - "GetDoublev", - "GetError", - "GetFixedv", - "GetFloati_v", - "GetFloatv", - "GetFragDataIndex", - "GetFragDataLocation", - "GetFragDataLocationEXT", - "GetFramebufferAttachmentParameteriv", - "GetFramebufferAttachmentParameterivEXT", - "GetFramebufferParameteriv", - "GetGraphicsResetStatusARB", - "GetHandleARB", - "GetHistogram", - "GetHistogramParameterfv", - "GetHistogramParameteriv", - "GetInfoLogARB", - "GetInteger64i_v", - "GetInteger64v", - "GetIntegerIndexedvEXT", - "GetIntegeri_v", - "GetIntegerv", - "GetLightfv", - "GetLightiv", - "GetLightxv", - "GetMapdv", - "GetMapfv", - "GetMapiv", - "GetMaterialfv", - "GetMaterialiv", - "GetMaterialxv", - "GetMinmax", - "GetMinmaxParameterfv", - "GetMinmaxParameteriv", - "GetMultisamplefv", - "GetnColorTableARB", - "GetnCompressedTexImageARB", - "GetnConvolutionFilterARB", - "GetnHistogramARB", - "GetnMapdvARB", - "GetnMapfvARB", - "GetnMapivARB", - "GetnMinmaxARB", - "GetnPixelMapfvARB", - "GetnPixelMapuivARB", - "GetnPixelMapusvARB", - "GetnPolygonStippleARB", - "GetnSeparableFilterARB", - "GetnTexImageARB", - "GetnUniformdvARB", - "GetnUniformfvARB", - "GetnUniformivARB", - "GetnUniformuivARB", - "GetObjectLabel", - "GetObjectParameterfvARB", - "GetObjectParameterivARB", - "GetObjectPtrLabel", - "GetPixelMapfv", - "GetPixelMapuiv", - "GetPixelMapusv", - "GetPointerv", - "GetPointervEXT", - "GetPolygonStipple", - "GetProgramBinary", - "GetProgramEnvParameterdvARB", - "GetProgramEnvParameterfvARB", - "GetProgramInfoLog", - "GetProgramInterfaceiv", - "GetProgramiv", - "GetProgramivARB", - "GetProgramLocalParameterdvARB", - "GetProgramLocalParameterfvARB", - "GetProgramPipelineInfoLog", - "GetProgramPipelineiv", - "GetProgramResourceIndex", - "GetProgramResourceiv", - "GetProgramResourceLocation", - "GetProgramResourceName", - "GetProgramStringARB", - "GetQueryIndexediv", - "GetQueryiv", - "GetQueryivARB", - "GetQueryObjectiv", - "GetQueryObjectivARB", - "GetQueryObjectuiv", - "GetQueryObjectuivARB", - "GetRenderbufferParameteriv", - "GetRenderbufferParameterivEXT", - "GetSamplerParameterfv", - "GetSamplerParameterIiv", - "GetSamplerParameterIuiv", - "GetSamplerParameteriv", - "GetSeparableFilter", - "GetShaderInfoLog", - "GetShaderiv", - "GetShaderPrecisionFormat", - "GetShaderSource", - "GetShaderSourceARB", - "GetString", - "GetStringi", - "GetSynciv", - "GetTexEnvfv", - "GetTexEnviv", - "GetTexEnvxv", - "GetTexGendv", - "GetTexGenfv", - "GetTexGeniv", - "GetTexImage", - "GetTexLevelParameterfv", - "GetTexLevelParameteriv", - "GetTexParameterfv", - "GetTexParameterIiv", - "GetTexParameterIivEXT", - "GetTexParameterIuiv", - "GetTexParameterIuivEXT", - "GetTexParameteriv", - "GetTexParameterxv", - "GetTransformFeedbackVarying", - "GetUniformBlockIndex", - "GetUniformfv", - "GetUniformfvARB", - "GetUniformIndices", - "GetUniformiv", - "GetUniformivARB", - "GetUniformLocation", - "GetUniformLocationARB", - "GetUniformuiv", - "GetUniformuivEXT", - "GetVertexAttribdv", - "GetVertexAttribdvARB", - "GetVertexAttribfv", - "GetVertexAttribfvARB", - "GetVertexAttribIiv", - "GetVertexAttribIivEXT", - "GetVertexAttribIuiv", - "GetVertexAttribIuivEXT", - "GetVertexAttribiv", - "GetVertexAttribivARB", - "GetVertexAttribPointerv", - "GetVertexAttribPointervARB", - "Hint", - "Histogram", - "Indexd", - "Indexdv", - "Indexf", - "Indexfv", - "Indexi", - "Indexiv", - "IndexMask", - "IndexPointer", - "IndexPointerEXT", - "Indexs", - "Indexsv", - "Indexub", - "Indexubv", - "InitNames", - "InterleavedArrays", - "InvalidateBufferData", - "InvalidateBufferSubData", - "InvalidateFramebuffer", - "InvalidateSubFramebuffer", - "InvalidateTexImage", - "InvalidateTexSubImage", - "IsBuffer", - "IsBufferARB", - "IsEnabled", - "IsEnabledi", - "IsEnabledIndexedEXT", - "IsFramebuffer", - "IsFramebufferEXT", - "IsList", - "IsProgram", - "IsProgramARB", - "IsProgramPipeline", - "IsQuery", - "IsQueryARB", - "IsRenderbuffer", - "IsRenderbufferEXT", - "IsSampler", - "IsShader", - "IsSync", - "IsTexture", - "IsTextureEXT", - "IsTransformFeedback", - "IsVertexArray", - "Lightf", - "Lightfv", - "Lighti", - "Lightiv", - "LightModelf", - "LightModelfv", - "LightModeli", - "LightModeliv", - "LightModelx", - "LightModelxv", - "Lightx", - "Lightxv", - "LineStipple", - "LineWidth", - "LineWidthx", - "LinkProgram", - "LinkProgramARB", - "ListBase", - "LoadIdentity", - "LoadMatrixd", - "LoadMatrixf", - "LoadMatrixx", - "LoadName", - "LoadTransposeMatrixd", - "LoadTransposeMatrixdARB", - "LoadTransposeMatrixf", - "LoadTransposeMatrixfARB", - "LockArraysEXT", - "LogicOp", - "Map1d", - "Map1f", - "Map2d", - "Map2f", - "MapBuffer", - "MapBufferARB", - "MapBufferRange", - "MapGrid1d", - "MapGrid1f", - "MapGrid2d", - "MapGrid2f", - "Materialf", - "Materialfv", - "Materiali", - "Materialiv", - "Materialx", - "Materialxv", - "MatrixMode", - "MemoryBarrier", - "MemoryBarrierByRegion", - "Minmax", - "MinSampleShading", - "MinSampleShadingARB", - "MultiDrawArrays", - "MultiDrawArraysEXT", - "MultiDrawArraysIndirect", - "MultiDrawElements", - "MultiDrawElementsBaseVertex", - "MultiDrawElementsEXT", - "MultiDrawElementsIndirect", - "MultiTexCoord1d", - "MultiTexCoord1dARB", - "MultiTexCoord1dv", - "MultiTexCoord1dvARB", - "MultiTexCoord1f", - "MultiTexCoord1fARB", - "MultiTexCoord1fv", - "MultiTexCoord1fvARB", - "MultiTexCoord1i", - "MultiTexCoord1iARB", - "MultiTexCoord1iv", - "MultiTexCoord1ivARB", - "MultiTexCoord1s", - "MultiTexCoord1sARB", - "MultiTexCoord1sv", - "MultiTexCoord1svARB", - "MultiTexCoord2d", - "MultiTexCoord2dARB", - "MultiTexCoord2dv", - "MultiTexCoord2dvARB", - "MultiTexCoord2f", - "MultiTexCoord2fARB", - "MultiTexCoord2fv", - "MultiTexCoord2fvARB", - "MultiTexCoord2i", - "MultiTexCoord2iARB", - "MultiTexCoord2iv", - "MultiTexCoord2ivARB", - "MultiTexCoord2s", - "MultiTexCoord2sARB", - "MultiTexCoord2sv", - "MultiTexCoord2svARB", - "MultiTexCoord3d", - "MultiTexCoord3dARB", - "MultiTexCoord3dv", - "MultiTexCoord3dvARB", - "MultiTexCoord3f", - "MultiTexCoord3fARB", - "MultiTexCoord3fv", - "MultiTexCoord3fvARB", - "MultiTexCoord3i", - "MultiTexCoord3iARB", - "MultiTexCoord3iv", - "MultiTexCoord3ivARB", - "MultiTexCoord3s", - "MultiTexCoord3sARB", - "MultiTexCoord3sv", - "MultiTexCoord3svARB", - "MultiTexCoord4d", - "MultiTexCoord4dARB", - "MultiTexCoord4dv", - "MultiTexCoord4dvARB", - "MultiTexCoord4f", - "MultiTexCoord4fARB", - "MultiTexCoord4fv", - "MultiTexCoord4fvARB", - "MultiTexCoord4i", - "MultiTexCoord4iARB", - "MultiTexCoord4iv", - "MultiTexCoord4ivARB", - "MultiTexCoord4s", - "MultiTexCoord4sARB", - "MultiTexCoord4sv", - "MultiTexCoord4svARB", - "MultiTexCoord4x", - "MultiTexCoordP1ui", - "MultiTexCoordP1uiv", - "MultiTexCoordP2ui", - "MultiTexCoordP2uiv", - "MultiTexCoordP3ui", - "MultiTexCoordP3uiv", - "MultiTexCoordP4ui", - "MultiTexCoordP4uiv", - "MultMatrixd", - "MultMatrixf", - "MultMatrixx", - "MultTransposeMatrixd", - "MultTransposeMatrixdARB", - "MultTransposeMatrixf", - "MultTransposeMatrixfARB", - "NewList", - "Normal3b", - "Normal3bv", - "Normal3d", - "Normal3dv", - "Normal3f", - "Normal3fv", - "Normal3i", - "Normal3iv", - "Normal3s", - "Normal3sv", - "Normal3x", - "NormalP3ui", - "NormalP3uiv", - "NormalPointer", - "NormalPointerEXT", - "ObjectLabel", - "ObjectPtrLabel", - "Ortho", - "Orthof", - "Orthox", - "PassThrough", - "PauseTransformFeedback", - "PixelMapfv", - "PixelMapuiv", - "PixelMapusv", - "PixelStoref", - "PixelStorei", - "PixelTransferf", - "PixelTransferi", - "PixelZoom", - "PointParameterf", - "PointParameterfARB", - "PointParameterfEXT", - "PointParameterfv", - "PointParameterfvARB", - "PointParameterfvEXT", - "PointParameteri", - "PointParameteriv", - "PointParameterx", - "PointParameterxv", - "PointSize", - "PointSizePointerOES", - "PointSizex", - "PolygonMode", - "PolygonOffset", - "PolygonOffsetx", - "PolygonStipple", - "PopAttrib", - "PopClientAttrib", - "PopDebugGroup", - "PopMatrix", - "PopName", - "PrimitiveRestartIndex", - "PrimitiveRestartIndexNV", - "PrimitiveRestartNV", - "PrioritizeTextures", - "PrioritizeTexturesEXT", - "ProgramBinary", - "ProgramEnvParameter4dARB", - "ProgramEnvParameter4dvARB", - "ProgramEnvParameter4fARB", - "ProgramEnvParameter4fvARB", - "ProgramLocalParameter4dARB", - "ProgramLocalParameter4dvARB", - "ProgramLocalParameter4fARB", - "ProgramLocalParameter4fvARB", - "ProgramParameteri", - "ProgramParameteriARB", - "ProgramStringARB", - "ProgramUniform1f", - "ProgramUniform1fv", - "ProgramUniform1i", - "ProgramUniform1iv", - "ProgramUniform1ui", - "ProgramUniform1uiv", - "ProgramUniform2f", - "ProgramUniform2fv", - "ProgramUniform2i", - "ProgramUniform2iv", - "ProgramUniform2ui", - "ProgramUniform2uiv", - "ProgramUniform3f", - "ProgramUniform3fv", - "ProgramUniform3i", - "ProgramUniform3iv", - "ProgramUniform3ui", - "ProgramUniform3uiv", - "ProgramUniform4f", - "ProgramUniform4fv", - "ProgramUniform4i", - "ProgramUniform4iv", - "ProgramUniform4ui", - "ProgramUniform4uiv", - "ProgramUniformMatrix2fv", - "ProgramUniformMatrix2x3fv", - "ProgramUniformMatrix2x4fv", - "ProgramUniformMatrix3fv", - "ProgramUniformMatrix3x2fv", - "ProgramUniformMatrix3x4fv", - "ProgramUniformMatrix4fv", - "ProgramUniformMatrix4x2fv", - "ProgramUniformMatrix4x3fv", - "ProvokingVertex", - "ProvokingVertexEXT", - "PushAttrib", - "PushClientAttrib", - "PushDebugGroup", - "PushMatrix", - "PushName", - "RasterPos2d", - "RasterPos2dv", - "RasterPos2f", - "RasterPos2fv", - "RasterPos2i", - "RasterPos2iv", - "RasterPos2s", - "RasterPos2sv", - "RasterPos3d", - "RasterPos3dv", - "RasterPos3f", - "RasterPos3fv", - "RasterPos3i", - "RasterPos3iv", - "RasterPos3s", - "RasterPos3sv", - "RasterPos4d", - "RasterPos4dv", - "RasterPos4f", - "RasterPos4fv", - "RasterPos4i", - "RasterPos4iv", - "RasterPos4s", - "RasterPos4sv", - "ReadBuffer", - "ReadnPixelsARB", - "ReadPixels", - "Rectd", - "Rectdv", - "Rectf", - "Rectfv", - "Recti", - "Rectiv", - "Rects", - "Rectsv", - "ReleaseShaderCompiler", - "RenderbufferStorage", - "RenderbufferStorageEXT", - "RenderbufferStorageMultisample", - "RenderbufferStorageMultisampleEXT", - "RenderMode", - "ResetHistogram", - "ResetMinmax", - "ResumeTransformFeedback", - "Rotated", - "Rotatef", - "Rotatex", - "SampleCoverage", - "SampleCoverageARB", - "SampleCoveragex", - "SampleMaski", - "SamplerParameterf", - "SamplerParameterfv", - "SamplerParameteri", - "SamplerParameterIiv", - "SamplerParameterIuiv", - "SamplerParameteriv", - "Scaled", - "Scalef", - "Scalex", - "Scissor", - "ScissorArrayv", - "ScissorIndexed", - "ScissorIndexedv", - "SecondaryColor3b", - "SecondaryColor3bEXT", - "SecondaryColor3bv", - "SecondaryColor3bvEXT", - "SecondaryColor3d", - "SecondaryColor3dEXT", - "SecondaryColor3dv", - "SecondaryColor3dvEXT", - "SecondaryColor3f", - "SecondaryColor3fEXT", - "SecondaryColor3fv", - "SecondaryColor3fvEXT", - "SecondaryColor3i", - "SecondaryColor3iEXT", - "SecondaryColor3iv", - "SecondaryColor3ivEXT", - "SecondaryColor3s", - "SecondaryColor3sEXT", - "SecondaryColor3sv", - "SecondaryColor3svEXT", - "SecondaryColor3ub", - "SecondaryColor3ubEXT", - "SecondaryColor3ubv", - "SecondaryColor3ubvEXT", - "SecondaryColor3ui", - "SecondaryColor3uiEXT", - "SecondaryColor3uiv", - "SecondaryColor3uivEXT", - "SecondaryColor3us", - "SecondaryColor3usEXT", - "SecondaryColor3usv", - "SecondaryColor3usvEXT", - "SecondaryColorP3ui", - "SecondaryColorP3uiv", - "SecondaryColorPointer", - "SecondaryColorPointerEXT", - "SelectBuffer", - "SeparableFilter2D", - "ShadeModel", - "ShaderBinary", - "ShaderSource", - "ShaderSourceARB", - "StencilFunc", - "StencilFuncSeparate", - "StencilMask", - "StencilMaskSeparate", - "StencilOp", - "StencilOpSeparate", - "TexBuffer", - "TexBufferARB", - "TexBufferRange", - "TexCoord1d", - "TexCoord1dv", - "TexCoord1f", - "TexCoord1fv", - "TexCoord1i", - "TexCoord1iv", - "TexCoord1s", - "TexCoord1sv", - "TexCoord2d", - "TexCoord2dv", - "TexCoord2f", - "TexCoord2fv", - "TexCoord2i", - "TexCoord2iv", - "TexCoord2s", - "TexCoord2sv", - "TexCoord3d", - "TexCoord3dv", - "TexCoord3f", - "TexCoord3fv", - "TexCoord3i", - "TexCoord3iv", - "TexCoord3s", - "TexCoord3sv", - "TexCoord4d", - "TexCoord4dv", - "TexCoord4f", - "TexCoord4fv", - "TexCoord4i", - "TexCoord4iv", - "TexCoord4s", - "TexCoord4sv", - "TexCoordP1ui", - "TexCoordP1uiv", - "TexCoordP2ui", - "TexCoordP2uiv", - "TexCoordP3ui", - "TexCoordP3uiv", - "TexCoordP4ui", - "TexCoordP4uiv", - "TexCoordPointer", - "TexCoordPointerEXT", - "TexEnvf", - "TexEnvfv", - "TexEnvi", - "TexEnviv", - "TexEnvx", - "TexEnvxv", - "TexGend", - "TexGendv", - "TexGenf", - "TexGenfv", - "TexGeni", - "TexGeniv", - "TexImage1D", - "TexImage2D", - "TexImage2DMultisample", - "TexImage3D", - "TexImage3DEXT", - "TexImage3DMultisample", - "TexParameterf", - "TexParameterfv", - "TexParameteri", - "TexParameterIiv", - "TexParameterIivEXT", - "TexParameterIuiv", - "TexParameterIuivEXT", - "TexParameteriv", - "TexParameterx", - "TexParameterxv", - "TexStorage1D", - "TexStorage2D", - "TexStorage2DMultisample", - "TexStorage3D", - "TexStorage3DMultisample", - "TexSubImage1D", - "TexSubImage2D", - "TexSubImage3D", - "TexSubImage3DEXT", - "TextureBarrierNV", - "TextureStorage1DEXT", - "TextureStorage2DEXT", - "TextureStorage3DEXT", - "TextureView", - "TransformFeedbackVaryings", - "Translated", - "Translatef", - "Translatex", - "Uniform1f", - "Uniform1fARB", - "Uniform1fv", - "Uniform1fvARB", - "Uniform1i", - "Uniform1iARB", - "Uniform1iv", - "Uniform1ivARB", - "Uniform1ui", - "Uniform1uiEXT", - "Uniform1uiv", - "Uniform1uivEXT", - "Uniform2f", - "Uniform2fARB", - "Uniform2fv", - "Uniform2fvARB", - "Uniform2i", - "Uniform2iARB", - "Uniform2iv", - "Uniform2ivARB", - "Uniform2ui", - "Uniform2uiEXT", - "Uniform2uiv", - "Uniform2uivEXT", - "Uniform3f", - "Uniform3fARB", - "Uniform3fv", - "Uniform3fvARB", - "Uniform3i", - "Uniform3iARB", - "Uniform3iv", - "Uniform3ivARB", - "Uniform3ui", - "Uniform3uiEXT", - "Uniform3uiv", - "Uniform3uivEXT", - "Uniform4f", - "Uniform4fARB", - "Uniform4fv", - "Uniform4fvARB", - "Uniform4i", - "Uniform4iARB", - "Uniform4iv", - "Uniform4ivARB", - "Uniform4ui", - "Uniform4uiEXT", - "Uniform4uiv", - "Uniform4uivEXT", - "UniformBlockBinding", - "UniformMatrix2fv", - "UniformMatrix2fvARB", - "UniformMatrix2x3fv", - "UniformMatrix2x4fv", - "UniformMatrix3fv", - "UniformMatrix3fvARB", - "UniformMatrix3x2fv", - "UniformMatrix3x4fv", - "UniformMatrix4fv", - "UniformMatrix4fvARB", - "UniformMatrix4x2fv", - "UniformMatrix4x3fv", - "UnlockArraysEXT", - "UnmapBuffer", - "UnmapBufferARB", - "UseProgram", - "UseProgramObjectARB", - "UseProgramStages", - "ValidateProgram", - "ValidateProgramARB", - "ValidateProgramPipeline", - "Vertex2d", - "Vertex2dv", - "Vertex2f", - "Vertex2fv", - "Vertex2i", - "Vertex2iv", - "Vertex2s", - "Vertex2sv", - "Vertex3d", - "Vertex3dv", - "Vertex3f", - "Vertex3fv", - "Vertex3i", - "Vertex3iv", - "Vertex3s", - "Vertex3sv", - "Vertex4d", - "Vertex4dv", - "Vertex4f", - "Vertex4fv", - "Vertex4i", - "Vertex4iv", - "Vertex4s", - "Vertex4sv", - "VertexAttrib1d", - "VertexAttrib1dARB", - "VertexAttrib1dv", - "VertexAttrib1dvARB", - "VertexAttrib1f", - "VertexAttrib1fARB", - "VertexAttrib1fv", - "VertexAttrib1fvARB", - "VertexAttrib1s", - "VertexAttrib1sARB", - "VertexAttrib1sv", - "VertexAttrib1svARB", - "VertexAttrib2d", - "VertexAttrib2dARB", - "VertexAttrib2dv", - "VertexAttrib2dvARB", - "VertexAttrib2f", - "VertexAttrib2fARB", - "VertexAttrib2fv", - "VertexAttrib2fvARB", - "VertexAttrib2s", - "VertexAttrib2sARB", - "VertexAttrib2sv", - "VertexAttrib2svARB", - "VertexAttrib3d", - "VertexAttrib3dARB", - "VertexAttrib3dv", - "VertexAttrib3dvARB", - "VertexAttrib3f", - "VertexAttrib3fARB", - "VertexAttrib3fv", - "VertexAttrib3fvARB", - "VertexAttrib3s", - "VertexAttrib3sARB", - "VertexAttrib3sv", - "VertexAttrib3svARB", - "VertexAttrib4bv", - "VertexAttrib4bvARB", - "VertexAttrib4d", - "VertexAttrib4dARB", - "VertexAttrib4dv", - "VertexAttrib4dvARB", - "VertexAttrib4f", - "VertexAttrib4fARB", - "VertexAttrib4fv", - "VertexAttrib4fvARB", - "VertexAttrib4iv", - "VertexAttrib4ivARB", - "VertexAttrib4Nbv", - "VertexAttrib4NbvARB", - "VertexAttrib4Niv", - "VertexAttrib4NivARB", - "VertexAttrib4Nsv", - "VertexAttrib4NsvARB", - "VertexAttrib4Nub", - "VertexAttrib4NubARB", - "VertexAttrib4Nubv", - "VertexAttrib4NubvARB", - "VertexAttrib4Nuiv", - "VertexAttrib4NuivARB", - "VertexAttrib4Nusv", - "VertexAttrib4NusvARB", - "VertexAttrib4s", - "VertexAttrib4sARB", - "VertexAttrib4sv", - "VertexAttrib4svARB", - "VertexAttrib4ubv", - "VertexAttrib4ubvARB", - "VertexAttrib4uiv", - "VertexAttrib4uivARB", - "VertexAttrib4usv", - "VertexAttrib4usvARB", - "VertexAttribBinding", - "VertexAttribDivisor", - "VertexAttribDivisorARB", - "VertexAttribFormat", - "VertexAttribI1i", - "VertexAttribI1iEXT", - "VertexAttribI1iv", - "VertexAttribI1ivEXT", - "VertexAttribI1ui", - "VertexAttribI1uiEXT", - "VertexAttribI1uiv", - "VertexAttribI1uivEXT", - "VertexAttribI2i", - "VertexAttribI2iEXT", - "VertexAttribI2iv", - "VertexAttribI2ivEXT", - "VertexAttribI2ui", - "VertexAttribI2uiEXT", - "VertexAttribI2uiv", - "VertexAttribI2uivEXT", - "VertexAttribI3i", - "VertexAttribI3iEXT", - "VertexAttribI3iv", - "VertexAttribI3ivEXT", - "VertexAttribI3ui", - "VertexAttribI3uiEXT", - "VertexAttribI3uiv", - "VertexAttribI3uivEXT", - "VertexAttribI4bv", - "VertexAttribI4bvEXT", - "VertexAttribI4i", - "VertexAttribI4iEXT", - "VertexAttribI4iv", - "VertexAttribI4ivEXT", - "VertexAttribI4sv", - "VertexAttribI4svEXT", - "VertexAttribI4ubv", - "VertexAttribI4ubvEXT", - "VertexAttribI4ui", - "VertexAttribI4uiEXT", - "VertexAttribI4uiv", - "VertexAttribI4uivEXT", - "VertexAttribI4usv", - "VertexAttribI4usvEXT", - "VertexAttribIFormat", - "VertexAttribIPointer", - "VertexAttribIPointerEXT", - "VertexAttribLFormat", - "VertexAttribP1ui", - "VertexAttribP1uiv", - "VertexAttribP2ui", - "VertexAttribP2uiv", - "VertexAttribP3ui", - "VertexAttribP3uiv", - "VertexAttribP4ui", - "VertexAttribP4uiv", - "VertexAttribPointer", - "VertexAttribPointerARB", - "VertexBindingDivisor", - "VertexP2ui", - "VertexP2uiv", - "VertexP3ui", - "VertexP3uiv", - "VertexP4ui", - "VertexP4uiv", - "VertexPointer", - "VertexPointerEXT", - "Viewport", - "ViewportArrayv", - "ViewportIndexedf", - "ViewportIndexedfv", - "WaitSync", - "WindowPos2d", - "WindowPos2dARB", - "WindowPos2dv", - "WindowPos2dvARB", - "WindowPos2f", - "WindowPos2fARB", - "WindowPos2fv", - "WindowPos2fvARB", - "WindowPos2i", - "WindowPos2iARB", - "WindowPos2iv", - "WindowPos2ivARB", - "WindowPos2s", - "WindowPos2sARB", - "WindowPos2sv", - "WindowPos2svARB", - "WindowPos3d", - "WindowPos3dARB", - "WindowPos3dv", - "WindowPos3dvARB", - "WindowPos3f", - "WindowPos3fARB", - "WindowPos3fv", - "WindowPos3fvARB", - "WindowPos3i", - "WindowPos3iARB", - "WindowPos3iv", - "WindowPos3ivARB", - "WindowPos3s", - "WindowPos3sARB", - "WindowPos3sv", - "WindowPos3svARB", + "Accum", + "ActiveShaderProgram", + "ActiveTexture", + "ActiveTextureARB", + "AlphaFunc", + "AlphaFuncx", + "AreTexturesResident", + "AreTexturesResidentEXT", + "ArrayElement", + "ArrayElementEXT", + "AttachObjectARB", + "AttachShader", + "Begin", + "BeginConditionalRender", + "BeginConditionalRenderNV", + "BeginQuery", + "BeginQueryARB", + "BeginQueryIndexed", + "BeginTransformFeedback", + "BindAttribLocation", + "BindAttribLocationARB", + "BindBuffer", + "BindBufferARB", + "BindBufferBase", + "BindBufferRange", + "BindBuffersBase", + "BindBuffersRange", + "BindFragDataLocation", + "BindFragDataLocationEXT", + "BindFragDataLocationIndexed", + "BindFramebuffer", + "BindFramebufferEXT", + "BindImageTexture", + "BindImageTextures", + "BindProgramARB", + "BindProgramPipeline", + "BindRenderbuffer", + "BindRenderbufferEXT", + "BindSampler", + "BindSamplers", + "BindTexture", + "BindTextureEXT", + "BindTextures", + "BindTransformFeedback", + "BindVertexArray", + "BindVertexBuffer", + "BindVertexBuffers", + "Bitmap", + "BlendBarrier", + "BlendColor", + "BlendColorEXT", + "BlendEquation", + "BlendEquationEXT", + "BlendEquationi", + "BlendEquationiARB", + "BlendEquationSeparate", + "BlendEquationSeparatei", + "BlendEquationSeparateiARB", + "BlendFunc", + "BlendFunci", + "BlendFunciARB", + "BlendFuncSeparate", + "BlendFuncSeparateEXT", + "BlendFuncSeparatei", + "BlendFuncSeparateiARB", + "BlitFramebuffer", + "BufferData", + "BufferDataARB", + "BufferStorage", + "BufferSubData", + "BufferSubDataARB", + "CallList", + "CallLists", + "CheckFramebufferStatus", + "CheckFramebufferStatusEXT", + "ClampColor", + "ClampColorARB", + "Clear", + "ClearAccum", + "ClearBufferData", + "ClearBufferfi", + "ClearBufferfv", + "ClearBufferiv", + "ClearBufferSubData", + "ClearBufferuiv", + "ClearColor", + "ClearColorIiEXT", + "ClearColorIuiEXT", + "ClearColorx", + "ClearDepth", + "ClearDepthf", + "ClearDepthx", + "ClearIndex", + "ClearStencil", + "ClearTexImage", + "ClearTexSubImage", + "ClientActiveTexture", + "ClientActiveTextureARB", + "ClientWaitSync", + "ClipPlane", + "ClipPlanef", + "ClipPlanex", + "Color3b", + "Color3bv", + "Color3d", + "Color3dv", + "Color3f", + "Color3fv", + "Color3i", + "Color3iv", + "Color3s", + "Color3sv", + "Color3ub", + "Color3ubv", + "Color3ui", + "Color3uiv", + "Color3us", + "Color3usv", + "Color4b", + "Color4bv", + "Color4d", + "Color4dv", + "Color4f", + "Color4fv", + "Color4i", + "Color4iv", + "Color4s", + "Color4sv", + "Color4ub", + "Color4ubv", + "Color4ui", + "Color4uiv", + "Color4us", + "Color4usv", + "Color4x", + "ColorMask", + "ColorMaski", + "ColorMaskIndexedEXT", + "ColorMaterial", + "ColorP3ui", + "ColorP3uiv", + "ColorP4ui", + "ColorP4uiv", + "ColorPointer", + "ColorPointerEXT", + "ColorSubTable", + "ColorTable", + "ColorTableParameterfv", + "ColorTableParameteriv", + "CompileShader", + "CompileShaderARB", + "CompressedTexImage1D", + "CompressedTexImage1DARB", + "CompressedTexImage2D", + "CompressedTexImage2DARB", + "CompressedTexImage3D", + "CompressedTexImage3DARB", + "CompressedTexSubImage1D", + "CompressedTexSubImage1DARB", + "CompressedTexSubImage2D", + "CompressedTexSubImage2DARB", + "CompressedTexSubImage3D", + "CompressedTexSubImage3DARB", + "ConvolutionFilter1D", + "ConvolutionFilter2D", + "ConvolutionParameterf", + "ConvolutionParameterfv", + "ConvolutionParameteri", + "ConvolutionParameteriv", + "CopyBufferSubData", + "CopyColorSubTable", + "CopyColorTable", + "CopyConvolutionFilter1D", + "CopyConvolutionFilter2D", + "CopyImageSubData", + "CopyPixels", + "CopyTexImage1D", + "CopyTexImage2D", + "CopyTexSubImage1D", + "CopyTexSubImage2D", + "CopyTexSubImage3D", + "CopyTexSubImage3DEXT", + "CreateProgram", + "CreateProgramObjectARB", + "CreateShader", + "CreateShaderObjectARB", + "CreateShaderProgramv", + "CullFace", + "DebugMessageCallback", + "DebugMessageCallbackARB", + "DebugMessageControl", + "DebugMessageControlARB", + "DebugMessageInsert", + "DebugMessageInsertARB", + "DeleteBuffers", + "DeleteBuffersARB", + "DeleteFramebuffers", + "DeleteFramebuffersEXT", + "DeleteLists", + "DeleteObjectARB", + "DeleteProgram", + "DeleteProgramPipelines", + "DeleteProgramsARB", + "DeleteQueries", + "DeleteQueriesARB", + "DeleteRenderbuffers", + "DeleteRenderbuffersEXT", + "DeleteSamplers", + "DeleteShader", + "DeleteSync", + "DeleteTextures", + "DeleteTexturesEXT", + "DeleteTransformFeedbacks", + "DeleteVertexArrays", + "DepthFunc", + "DepthMask", + "DepthRange", + "DepthRangeArrayv", + "DepthRangef", + "DepthRangeIndexed", + "DepthRangex", + "DetachObjectARB", + "DetachShader", + "Disable", + "DisableClientState", + "Disablei", + "DisableIndexedEXT", + "DisableVertexAttribArray", + "DisableVertexAttribArrayARB", + "DispatchCompute", + "DispatchComputeIndirect", + "DrawArrays", + "DrawArraysEXT", + "DrawArraysIndirect", + "DrawArraysInstanced", + "DrawArraysInstancedARB", + "DrawArraysInstancedBaseInstance", + "DrawArraysInstancedEXT", + "DrawBuffer", + "DrawBuffers", + "DrawBuffersARB", + "DrawBuffersATI", + "DrawElements", + "DrawElementsBaseVertex", + "DrawElementsIndirect", + "DrawElementsInstanced", + "DrawElementsInstancedARB", + "DrawElementsInstancedBaseInstance", + "DrawElementsInstancedBaseVertex", + "DrawElementsInstancedBaseVertexBaseInstance", + "DrawElementsInstancedEXT", + "DrawPixels", + "DrawRangeElements", + "DrawRangeElementsBaseVertex", + "DrawRangeElementsEXT", + "DrawTransformFeedback", + "DrawTransformFeedbackInstanced", + "DrawTransformFeedbackStream", + "DrawTransformFeedbackStreamInstanced", + "EdgeFlag", + "EdgeFlagPointer", + "EdgeFlagPointerEXT", + "EdgeFlagv", + "Enable", + "EnableClientState", + "Enablei", + "EnableIndexedEXT", + "EnableVertexAttribArray", + "EnableVertexAttribArrayARB", + "End", + "EndConditionalRender", + "EndConditionalRenderNV", + "EndList", + "EndQuery", + "EndQueryARB", + "EndQueryIndexed", + "EndTransformFeedback", + "EvalCoord1d", + "EvalCoord1dv", + "EvalCoord1f", + "EvalCoord1fv", + "EvalCoord2d", + "EvalCoord2dv", + "EvalCoord2f", + "EvalCoord2fv", + "EvalMesh1", + "EvalMesh2", + "EvalPoint1", + "EvalPoint2", + "FeedbackBuffer", + "FenceSync", + "Finish", + "Flush", + "FlushMappedBufferRange", + "FogCoordd", + "FogCoorddEXT", + "FogCoorddv", + "FogCoorddvEXT", + "FogCoordf", + "FogCoordfEXT", + "FogCoordfv", + "FogCoordfvEXT", + "FogCoordPointer", + "FogCoordPointerEXT", + "Fogf", + "Fogfv", + "Fogi", + "Fogiv", + "Fogx", + "Fogxv", + "FramebufferParameteri", + "FramebufferRenderbuffer", + "FramebufferRenderbufferEXT", + "FramebufferTexture", + "FramebufferTexture1D", + "FramebufferTexture1DEXT", + "FramebufferTexture2D", + "FramebufferTexture2DEXT", + "FramebufferTexture3D", + "FramebufferTexture3DEXT", + "FramebufferTextureARB", + "FramebufferTextureLayer", + "FramebufferTextureLayerARB", + "FramebufferTextureLayerEXT", + "FrontFace", + "Frustum", + "Frustumf", + "Frustumx", + "GenBuffers", + "GenBuffersARB", + "GenerateMipmap", + "GenerateMipmapEXT", + "GenFramebuffers", + "GenFramebuffersEXT", + "GenLists", + "GenProgramPipelines", + "GenProgramsARB", + "GenQueries", + "GenQueriesARB", + "GenRenderbuffers", + "GenRenderbuffersEXT", + "GenSamplers", + "GenTextures", + "GenTexturesEXT", + "GenTransformFeedbacks", + "GenVertexArrays", + "GetActiveAtomicCounterBufferiv", + "GetActiveAttrib", + "GetActiveAttribARB", + "GetActiveUniform", + "GetActiveUniformARB", + "GetActiveUniformBlockiv", + "GetActiveUniformBlockName", + "GetActiveUniformName", + "GetActiveUniformsiv", + "GetAttachedObjectsARB", + "GetAttachedShaders", + "GetAttribLocation", + "GetAttribLocationARB", + "GetBooleani_v", + "GetBooleanIndexedvEXT", + "GetBooleanv", + "GetBufferParameteri64v", + "GetBufferParameteriv", + "GetBufferParameterivARB", + "GetBufferPointerv", + "GetBufferPointervARB", + "GetBufferSubData", + "GetBufferSubDataARB", + "GetClipPlane", + "GetClipPlanef", + "GetClipPlanex", + "GetColorTable", + "GetColorTableParameterfv", + "GetColorTableParameteriv", + "GetCompressedTexImage", + "GetCompressedTexImageARB", + "GetConvolutionFilter", + "GetConvolutionParameterfv", + "GetConvolutionParameteriv", + "GetDebugMessageLog", + "GetDebugMessageLogARB", + "GetDoublei_v", + "GetDoublev", + "GetError", + "GetFixedv", + "GetFloati_v", + "GetFloatv", + "GetFragDataIndex", + "GetFragDataLocation", + "GetFragDataLocationEXT", + "GetFramebufferAttachmentParameteriv", + "GetFramebufferAttachmentParameterivEXT", + "GetFramebufferParameteriv", + "GetGraphicsResetStatus", + "GetGraphicsResetStatusARB", + "GetHandleARB", + "GetHistogram", + "GetHistogramParameterfv", + "GetHistogramParameteriv", + "GetInfoLogARB", + "GetInteger64i_v", + "GetInteger64v", + "GetIntegeri_v", + "GetIntegerIndexedvEXT", + "GetIntegerv", + "GetLightfv", + "GetLightiv", + "GetLightxv", + "GetMapdv", + "GetMapfv", + "GetMapiv", + "GetMaterialfv", + "GetMaterialiv", + "GetMaterialxv", + "GetMinmax", + "GetMinmaxParameterfv", + "GetMinmaxParameteriv", + "GetMultisamplefv", + "GetnColorTableARB", + "GetnCompressedTexImageARB", + "GetnConvolutionFilterARB", + "GetnHistogramARB", + "GetnMapdvARB", + "GetnMapfvARB", + "GetnMapivARB", + "GetnMinmaxARB", + "GetnPixelMapfvARB", + "GetnPixelMapuivARB", + "GetnPixelMapusvARB", + "GetnPolygonStippleARB", + "GetnSeparableFilterARB", + "GetnTexImageARB", + "GetnUniformdvARB", + "GetnUniformfv", + "GetnUniformfvARB", + "GetnUniformiv", + "GetnUniformivARB", + "GetnUniformuiv", + "GetnUniformuivARB", + "GetObjectLabel", + "GetObjectParameterfvARB", + "GetObjectParameterivARB", + "GetObjectPtrLabel", + "GetPixelMapfv", + "GetPixelMapuiv", + "GetPixelMapusv", + "GetPointerv", + "GetPointervEXT", + "GetPolygonStipple", + "GetProgramBinary", + "GetProgramEnvParameterdvARB", + "GetProgramEnvParameterfvARB", + "GetProgramInfoLog", + "GetProgramInterfaceiv", + "GetProgramiv", + "GetProgramivARB", + "GetProgramLocalParameterdvARB", + "GetProgramLocalParameterfvARB", + "GetProgramPipelineInfoLog", + "GetProgramPipelineiv", + "GetProgramResourceIndex", + "GetProgramResourceiv", + "GetProgramResourceLocation", + "GetProgramResourceName", + "GetProgramStringARB", + "GetQueryIndexediv", + "GetQueryiv", + "GetQueryivARB", + "GetQueryObjectiv", + "GetQueryObjectivARB", + "GetQueryObjectuiv", + "GetQueryObjectuivARB", + "GetRenderbufferParameteriv", + "GetRenderbufferParameterivEXT", + "GetSamplerParameterfv", + "GetSamplerParameterIiv", + "GetSamplerParameterIuiv", + "GetSamplerParameteriv", + "GetSeparableFilter", + "GetShaderInfoLog", + "GetShaderiv", + "GetShaderPrecisionFormat", + "GetShaderSource", + "GetShaderSourceARB", + "GetString", + "GetStringi", + "GetSynciv", + "GetTexEnvfv", + "GetTexEnviv", + "GetTexEnvxv", + "GetTexGendv", + "GetTexGenfv", + "GetTexGeniv", + "GetTexImage", + "GetTexLevelParameterfv", + "GetTexLevelParameteriv", + "GetTexParameterfv", + "GetTexParameterIiv", + "GetTexParameterIivEXT", + "GetTexParameterIuiv", + "GetTexParameterIuivEXT", + "GetTexParameteriv", + "GetTexParameterxv", + "GetTransformFeedbackVarying", + "GetUniformBlockIndex", + "GetUniformfv", + "GetUniformfvARB", + "GetUniformIndices", + "GetUniformiv", + "GetUniformivARB", + "GetUniformLocation", + "GetUniformLocationARB", + "GetUniformuiv", + "GetUniformuivEXT", + "GetVertexAttribdv", + "GetVertexAttribdvARB", + "GetVertexAttribfv", + "GetVertexAttribfvARB", + "GetVertexAttribIiv", + "GetVertexAttribIivEXT", + "GetVertexAttribIuiv", + "GetVertexAttribIuivEXT", + "GetVertexAttribiv", + "GetVertexAttribivARB", + "GetVertexAttribPointerv", + "GetVertexAttribPointervARB", + "Hint", + "Histogram", + "Indexd", + "Indexdv", + "Indexf", + "Indexfv", + "Indexi", + "Indexiv", + "IndexMask", + "IndexPointer", + "IndexPointerEXT", + "Indexs", + "Indexsv", + "Indexub", + "Indexubv", + "InitNames", + "InterleavedArrays", + "InvalidateBufferData", + "InvalidateBufferSubData", + "InvalidateFramebuffer", + "InvalidateSubFramebuffer", + "InvalidateTexImage", + "InvalidateTexSubImage", + "IsBuffer", + "IsBufferARB", + "IsEnabled", + "IsEnabledi", + "IsEnabledIndexedEXT", + "IsFramebuffer", + "IsFramebufferEXT", + "IsList", + "IsProgram", + "IsProgramARB", + "IsProgramPipeline", + "IsQuery", + "IsQueryARB", + "IsRenderbuffer", + "IsRenderbufferEXT", + "IsSampler", + "IsShader", + "IsSync", + "IsTexture", + "IsTextureEXT", + "IsTransformFeedback", + "IsVertexArray", + "Lightf", + "Lightfv", + "Lighti", + "Lightiv", + "LightModelf", + "LightModelfv", + "LightModeli", + "LightModeliv", + "LightModelx", + "LightModelxv", + "Lightx", + "Lightxv", + "LineStipple", + "LineWidth", + "LineWidthx", + "LinkProgram", + "LinkProgramARB", + "ListBase", + "LoadIdentity", + "LoadMatrixd", + "LoadMatrixf", + "LoadMatrixx", + "LoadName", + "LoadTransposeMatrixd", + "LoadTransposeMatrixdARB", + "LoadTransposeMatrixf", + "LoadTransposeMatrixfARB", + "LockArraysEXT", + "LogicOp", + "Map1d", + "Map1f", + "Map2d", + "Map2f", + "MapBuffer", + "MapBufferARB", + "MapBufferRange", + "MapGrid1d", + "MapGrid1f", + "MapGrid2d", + "MapGrid2f", + "Materialf", + "Materialfv", + "Materiali", + "Materialiv", + "Materialx", + "Materialxv", + "MatrixMode", + "MemoryBarrier", + "MemoryBarrierByRegion", + "Minmax", + "MinSampleShading", + "MinSampleShadingARB", + "MultiDrawArrays", + "MultiDrawArraysEXT", + "MultiDrawArraysIndirect", + "MultiDrawElements", + "MultiDrawElementsBaseVertex", + "MultiDrawElementsEXT", + "MultiDrawElementsIndirect", + "MultiTexCoord1d", + "MultiTexCoord1dARB", + "MultiTexCoord1dv", + "MultiTexCoord1dvARB", + "MultiTexCoord1f", + "MultiTexCoord1fARB", + "MultiTexCoord1fv", + "MultiTexCoord1fvARB", + "MultiTexCoord1i", + "MultiTexCoord1iARB", + "MultiTexCoord1iv", + "MultiTexCoord1ivARB", + "MultiTexCoord1s", + "MultiTexCoord1sARB", + "MultiTexCoord1sv", + "MultiTexCoord1svARB", + "MultiTexCoord2d", + "MultiTexCoord2dARB", + "MultiTexCoord2dv", + "MultiTexCoord2dvARB", + "MultiTexCoord2f", + "MultiTexCoord2fARB", + "MultiTexCoord2fv", + "MultiTexCoord2fvARB", + "MultiTexCoord2i", + "MultiTexCoord2iARB", + "MultiTexCoord2iv", + "MultiTexCoord2ivARB", + "MultiTexCoord2s", + "MultiTexCoord2sARB", + "MultiTexCoord2sv", + "MultiTexCoord2svARB", + "MultiTexCoord3d", + "MultiTexCoord3dARB", + "MultiTexCoord3dv", + "MultiTexCoord3dvARB", + "MultiTexCoord3f", + "MultiTexCoord3fARB", + "MultiTexCoord3fv", + "MultiTexCoord3fvARB", + "MultiTexCoord3i", + "MultiTexCoord3iARB", + "MultiTexCoord3iv", + "MultiTexCoord3ivARB", + "MultiTexCoord3s", + "MultiTexCoord3sARB", + "MultiTexCoord3sv", + "MultiTexCoord3svARB", + "MultiTexCoord4d", + "MultiTexCoord4dARB", + "MultiTexCoord4dv", + "MultiTexCoord4dvARB", + "MultiTexCoord4f", + "MultiTexCoord4fARB", + "MultiTexCoord4fv", + "MultiTexCoord4fvARB", + "MultiTexCoord4i", + "MultiTexCoord4iARB", + "MultiTexCoord4iv", + "MultiTexCoord4ivARB", + "MultiTexCoord4s", + "MultiTexCoord4sARB", + "MultiTexCoord4sv", + "MultiTexCoord4svARB", + "MultiTexCoord4x", + "MultiTexCoordP1ui", + "MultiTexCoordP1uiv", + "MultiTexCoordP2ui", + "MultiTexCoordP2uiv", + "MultiTexCoordP3ui", + "MultiTexCoordP3uiv", + "MultiTexCoordP4ui", + "MultiTexCoordP4uiv", + "MultMatrixd", + "MultMatrixf", + "MultMatrixx", + "MultTransposeMatrixd", + "MultTransposeMatrixdARB", + "MultTransposeMatrixf", + "MultTransposeMatrixfARB", + "NewList", + "Normal3b", + "Normal3bv", + "Normal3d", + "Normal3dv", + "Normal3f", + "Normal3fv", + "Normal3i", + "Normal3iv", + "Normal3s", + "Normal3sv", + "Normal3x", + "NormalP3ui", + "NormalP3uiv", + "NormalPointer", + "NormalPointerEXT", + "ObjectLabel", + "ObjectPtrLabel", + "Ortho", + "Orthof", + "Orthox", + "PassThrough", + "PatchParameteri", + "PauseTransformFeedback", + "PixelMapfv", + "PixelMapuiv", + "PixelMapusv", + "PixelStoref", + "PixelStorei", + "PixelTransferf", + "PixelTransferi", + "PixelZoom", + "PointParameterf", + "PointParameterfARB", + "PointParameterfEXT", + "PointParameterfv", + "PointParameterfvARB", + "PointParameterfvEXT", + "PointParameteri", + "PointParameteriv", + "PointParameterx", + "PointParameterxv", + "PointSize", + "PointSizePointerOES", + "PointSizex", + "PolygonMode", + "PolygonOffset", + "PolygonOffsetx", + "PolygonStipple", + "PopAttrib", + "PopClientAttrib", + "PopDebugGroup", + "PopMatrix", + "PopName", + "PrimitiveBoundingBox", + "PrimitiveRestartIndex", + "PrimitiveRestartIndexNV", + "PrimitiveRestartNV", + "PrioritizeTextures", + "PrioritizeTexturesEXT", + "ProgramBinary", + "ProgramEnvParameter4dARB", + "ProgramEnvParameter4dvARB", + "ProgramEnvParameter4fARB", + "ProgramEnvParameter4fvARB", + "ProgramLocalParameter4dARB", + "ProgramLocalParameter4dvARB", + "ProgramLocalParameter4fARB", + "ProgramLocalParameter4fvARB", + "ProgramParameteri", + "ProgramParameteriARB", + "ProgramStringARB", + "ProgramUniform1f", + "ProgramUniform1fv", + "ProgramUniform1i", + "ProgramUniform1iv", + "ProgramUniform1ui", + "ProgramUniform1uiv", + "ProgramUniform2f", + "ProgramUniform2fv", + "ProgramUniform2i", + "ProgramUniform2iv", + "ProgramUniform2ui", + "ProgramUniform2uiv", + "ProgramUniform3f", + "ProgramUniform3fv", + "ProgramUniform3i", + "ProgramUniform3iv", + "ProgramUniform3ui", + "ProgramUniform3uiv", + "ProgramUniform4f", + "ProgramUniform4fv", + "ProgramUniform4i", + "ProgramUniform4iv", + "ProgramUniform4ui", + "ProgramUniform4uiv", + "ProgramUniformMatrix2fv", + "ProgramUniformMatrix2x3fv", + "ProgramUniformMatrix2x4fv", + "ProgramUniformMatrix3fv", + "ProgramUniformMatrix3x2fv", + "ProgramUniformMatrix3x4fv", + "ProgramUniformMatrix4fv", + "ProgramUniformMatrix4x2fv", + "ProgramUniformMatrix4x3fv", + "ProvokingVertex", + "ProvokingVertexEXT", + "PushAttrib", + "PushClientAttrib", + "PushDebugGroup", + "PushMatrix", + "PushName", + "RasterPos2d", + "RasterPos2dv", + "RasterPos2f", + "RasterPos2fv", + "RasterPos2i", + "RasterPos2iv", + "RasterPos2s", + "RasterPos2sv", + "RasterPos3d", + "RasterPos3dv", + "RasterPos3f", + "RasterPos3fv", + "RasterPos3i", + "RasterPos3iv", + "RasterPos3s", + "RasterPos3sv", + "RasterPos4d", + "RasterPos4dv", + "RasterPos4f", + "RasterPos4fv", + "RasterPos4i", + "RasterPos4iv", + "RasterPos4s", + "RasterPos4sv", + "ReadBuffer", + "ReadnPixels", + "ReadnPixelsARB", + "ReadPixels", + "Rectd", + "Rectdv", + "Rectf", + "Rectfv", + "Recti", + "Rectiv", + "Rects", + "Rectsv", + "ReleaseShaderCompiler", + "RenderbufferStorage", + "RenderbufferStorageEXT", + "RenderbufferStorageMultisample", + "RenderbufferStorageMultisampleEXT", + "RenderMode", + "ResetHistogram", + "ResetMinmax", + "ResumeTransformFeedback", + "Rotated", + "Rotatef", + "Rotatex", + "SampleCoverage", + "SampleCoverageARB", + "SampleCoveragex", + "SampleMaski", + "SamplerParameterf", + "SamplerParameterfv", + "SamplerParameteri", + "SamplerParameterIiv", + "SamplerParameterIuiv", + "SamplerParameteriv", + "Scaled", + "Scalef", + "Scalex", + "Scissor", + "ScissorArrayv", + "ScissorIndexed", + "ScissorIndexedv", + "SecondaryColor3b", + "SecondaryColor3bEXT", + "SecondaryColor3bv", + "SecondaryColor3bvEXT", + "SecondaryColor3d", + "SecondaryColor3dEXT", + "SecondaryColor3dv", + "SecondaryColor3dvEXT", + "SecondaryColor3f", + "SecondaryColor3fEXT", + "SecondaryColor3fv", + "SecondaryColor3fvEXT", + "SecondaryColor3i", + "SecondaryColor3iEXT", + "SecondaryColor3iv", + "SecondaryColor3ivEXT", + "SecondaryColor3s", + "SecondaryColor3sEXT", + "SecondaryColor3sv", + "SecondaryColor3svEXT", + "SecondaryColor3ub", + "SecondaryColor3ubEXT", + "SecondaryColor3ubv", + "SecondaryColor3ubvEXT", + "SecondaryColor3ui", + "SecondaryColor3uiEXT", + "SecondaryColor3uiv", + "SecondaryColor3uivEXT", + "SecondaryColor3us", + "SecondaryColor3usEXT", + "SecondaryColor3usv", + "SecondaryColor3usvEXT", + "SecondaryColorP3ui", + "SecondaryColorP3uiv", + "SecondaryColorPointer", + "SecondaryColorPointerEXT", + "SelectBuffer", + "SeparableFilter2D", + "ShadeModel", + "ShaderBinary", + "ShaderSource", + "ShaderSourceARB", + "StencilFunc", + "StencilFuncSeparate", + "StencilMask", + "StencilMaskSeparate", + "StencilOp", + "StencilOpSeparate", + "TexBuffer", + "TexBufferARB", + "TexBufferRange", + "TexCoord1d", + "TexCoord1dv", + "TexCoord1f", + "TexCoord1fv", + "TexCoord1i", + "TexCoord1iv", + "TexCoord1s", + "TexCoord1sv", + "TexCoord2d", + "TexCoord2dv", + "TexCoord2f", + "TexCoord2fv", + "TexCoord2i", + "TexCoord2iv", + "TexCoord2s", + "TexCoord2sv", + "TexCoord3d", + "TexCoord3dv", + "TexCoord3f", + "TexCoord3fv", + "TexCoord3i", + "TexCoord3iv", + "TexCoord3s", + "TexCoord3sv", + "TexCoord4d", + "TexCoord4dv", + "TexCoord4f", + "TexCoord4fv", + "TexCoord4i", + "TexCoord4iv", + "TexCoord4s", + "TexCoord4sv", + "TexCoordP1ui", + "TexCoordP1uiv", + "TexCoordP2ui", + "TexCoordP2uiv", + "TexCoordP3ui", + "TexCoordP3uiv", + "TexCoordP4ui", + "TexCoordP4uiv", + "TexCoordPointer", + "TexCoordPointerEXT", + "TexEnvf", + "TexEnvfv", + "TexEnvi", + "TexEnviv", + "TexEnvx", + "TexEnvxv", + "TexGend", + "TexGendv", + "TexGenf", + "TexGenfv", + "TexGeni", + "TexGeniv", + "TexImage1D", + "TexImage2D", + "TexImage2DMultisample", + "TexImage3D", + "TexImage3DEXT", + "TexImage3DMultisample", + "TexParameterf", + "TexParameterfv", + "TexParameteri", + "TexParameterIiv", + "TexParameterIivEXT", + "TexParameterIuiv", + "TexParameterIuivEXT", + "TexParameteriv", + "TexParameterx", + "TexParameterxv", + "TexStorage1D", + "TexStorage2D", + "TexStorage2DMultisample", + "TexStorage3D", + "TexStorage3DMultisample", + "TexSubImage1D", + "TexSubImage2D", + "TexSubImage3D", + "TexSubImage3DEXT", + "TextureBarrierNV", + "TextureStorage1DEXT", + "TextureStorage2DEXT", + "TextureStorage3DEXT", + "TextureView", + "TransformFeedbackVaryings", + "Translated", + "Translatef", + "Translatex", + "Uniform1f", + "Uniform1fARB", + "Uniform1fv", + "Uniform1fvARB", + "Uniform1i", + "Uniform1iARB", + "Uniform1iv", + "Uniform1ivARB", + "Uniform1ui", + "Uniform1uiEXT", + "Uniform1uiv", + "Uniform1uivEXT", + "Uniform2f", + "Uniform2fARB", + "Uniform2fv", + "Uniform2fvARB", + "Uniform2i", + "Uniform2iARB", + "Uniform2iv", + "Uniform2ivARB", + "Uniform2ui", + "Uniform2uiEXT", + "Uniform2uiv", + "Uniform2uivEXT", + "Uniform3f", + "Uniform3fARB", + "Uniform3fv", + "Uniform3fvARB", + "Uniform3i", + "Uniform3iARB", + "Uniform3iv", + "Uniform3ivARB", + "Uniform3ui", + "Uniform3uiEXT", + "Uniform3uiv", + "Uniform3uivEXT", + "Uniform4f", + "Uniform4fARB", + "Uniform4fv", + "Uniform4fvARB", + "Uniform4i", + "Uniform4iARB", + "Uniform4iv", + "Uniform4ivARB", + "Uniform4ui", + "Uniform4uiEXT", + "Uniform4uiv", + "Uniform4uivEXT", + "UniformBlockBinding", + "UniformMatrix2fv", + "UniformMatrix2fvARB", + "UniformMatrix2x3fv", + "UniformMatrix2x4fv", + "UniformMatrix3fv", + "UniformMatrix3fvARB", + "UniformMatrix3x2fv", + "UniformMatrix3x4fv", + "UniformMatrix4fv", + "UniformMatrix4fvARB", + "UniformMatrix4x2fv", + "UniformMatrix4x3fv", + "UnlockArraysEXT", + "UnmapBuffer", + "UnmapBufferARB", + "UseProgram", + "UseProgramObjectARB", + "UseProgramStages", + "ValidateProgram", + "ValidateProgramARB", + "ValidateProgramPipeline", + "Vertex2d", + "Vertex2dv", + "Vertex2f", + "Vertex2fv", + "Vertex2i", + "Vertex2iv", + "Vertex2s", + "Vertex2sv", + "Vertex3d", + "Vertex3dv", + "Vertex3f", + "Vertex3fv", + "Vertex3i", + "Vertex3iv", + "Vertex3s", + "Vertex3sv", + "Vertex4d", + "Vertex4dv", + "Vertex4f", + "Vertex4fv", + "Vertex4i", + "Vertex4iv", + "Vertex4s", + "Vertex4sv", + "VertexAttrib1d", + "VertexAttrib1dARB", + "VertexAttrib1dv", + "VertexAttrib1dvARB", + "VertexAttrib1f", + "VertexAttrib1fARB", + "VertexAttrib1fv", + "VertexAttrib1fvARB", + "VertexAttrib1s", + "VertexAttrib1sARB", + "VertexAttrib1sv", + "VertexAttrib1svARB", + "VertexAttrib2d", + "VertexAttrib2dARB", + "VertexAttrib2dv", + "VertexAttrib2dvARB", + "VertexAttrib2f", + "VertexAttrib2fARB", + "VertexAttrib2fv", + "VertexAttrib2fvARB", + "VertexAttrib2s", + "VertexAttrib2sARB", + "VertexAttrib2sv", + "VertexAttrib2svARB", + "VertexAttrib3d", + "VertexAttrib3dARB", + "VertexAttrib3dv", + "VertexAttrib3dvARB", + "VertexAttrib3f", + "VertexAttrib3fARB", + "VertexAttrib3fv", + "VertexAttrib3fvARB", + "VertexAttrib3s", + "VertexAttrib3sARB", + "VertexAttrib3sv", + "VertexAttrib3svARB", + "VertexAttrib4bv", + "VertexAttrib4bvARB", + "VertexAttrib4d", + "VertexAttrib4dARB", + "VertexAttrib4dv", + "VertexAttrib4dvARB", + "VertexAttrib4f", + "VertexAttrib4fARB", + "VertexAttrib4fv", + "VertexAttrib4fvARB", + "VertexAttrib4iv", + "VertexAttrib4ivARB", + "VertexAttrib4Nbv", + "VertexAttrib4NbvARB", + "VertexAttrib4Niv", + "VertexAttrib4NivARB", + "VertexAttrib4Nsv", + "VertexAttrib4NsvARB", + "VertexAttrib4Nub", + "VertexAttrib4NubARB", + "VertexAttrib4Nubv", + "VertexAttrib4NubvARB", + "VertexAttrib4Nuiv", + "VertexAttrib4NuivARB", + "VertexAttrib4Nusv", + "VertexAttrib4NusvARB", + "VertexAttrib4s", + "VertexAttrib4sARB", + "VertexAttrib4sv", + "VertexAttrib4svARB", + "VertexAttrib4ubv", + "VertexAttrib4ubvARB", + "VertexAttrib4uiv", + "VertexAttrib4uivARB", + "VertexAttrib4usv", + "VertexAttrib4usvARB", + "VertexAttribBinding", + "VertexAttribDivisor", + "VertexAttribDivisorARB", + "VertexAttribFormat", + "VertexAttribI1i", + "VertexAttribI1iEXT", + "VertexAttribI1iv", + "VertexAttribI1ivEXT", + "VertexAttribI1ui", + "VertexAttribI1uiEXT", + "VertexAttribI1uiv", + "VertexAttribI1uivEXT", + "VertexAttribI2i", + "VertexAttribI2iEXT", + "VertexAttribI2iv", + "VertexAttribI2ivEXT", + "VertexAttribI2ui", + "VertexAttribI2uiEXT", + "VertexAttribI2uiv", + "VertexAttribI2uivEXT", + "VertexAttribI3i", + "VertexAttribI3iEXT", + "VertexAttribI3iv", + "VertexAttribI3ivEXT", + "VertexAttribI3ui", + "VertexAttribI3uiEXT", + "VertexAttribI3uiv", + "VertexAttribI3uivEXT", + "VertexAttribI4bv", + "VertexAttribI4bvEXT", + "VertexAttribI4i", + "VertexAttribI4iEXT", + "VertexAttribI4iv", + "VertexAttribI4ivEXT", + "VertexAttribI4sv", + "VertexAttribI4svEXT", + "VertexAttribI4ubv", + "VertexAttribI4ubvEXT", + "VertexAttribI4ui", + "VertexAttribI4uiEXT", + "VertexAttribI4uiv", + "VertexAttribI4uivEXT", + "VertexAttribI4usv", + "VertexAttribI4usvEXT", + "VertexAttribIFormat", + "VertexAttribIPointer", + "VertexAttribIPointerEXT", + "VertexAttribLFormat", + "VertexAttribP1ui", + "VertexAttribP1uiv", + "VertexAttribP2ui", + "VertexAttribP2uiv", + "VertexAttribP3ui", + "VertexAttribP3uiv", + "VertexAttribP4ui", + "VertexAttribP4uiv", + "VertexAttribPointer", + "VertexAttribPointerARB", + "VertexBindingDivisor", + "VertexP2ui", + "VertexP2uiv", + "VertexP3ui", + "VertexP3uiv", + "VertexP4ui", + "VertexP4uiv", + "VertexPointer", + "VertexPointerEXT", + "Viewport", + "ViewportArrayv", + "ViewportIndexedf", + "ViewportIndexedfv", + "WaitSync", + "WindowPos2d", + "WindowPos2dARB", + "WindowPos2dv", + "WindowPos2dvARB", + "WindowPos2f", + "WindowPos2fARB", + "WindowPos2fv", + "WindowPos2fvARB", + "WindowPos2i", + "WindowPos2iARB", + "WindowPos2iv", + "WindowPos2ivARB", + "WindowPos2s", + "WindowPos2sARB", + "WindowPos2sv", + "WindowPos2svARB", + "WindowPos3d", + "WindowPos3dARB", + "WindowPos3dv", + "WindowPos3dvARB", + "WindowPos3f", + "WindowPos3fARB", + "WindowPos3fv", + "WindowPos3fvARB", + "WindowPos3i", + "WindowPos3iARB", + "WindowPos3iv", + "WindowPos3ivARB", + "WindowPos3s", + "WindowPos3sARB", + "WindowPos3sv", + "WindowPos3svARB", ] """Functions that need dispatch slots but are not used diff -Nru mesa-12.0.6/src/mapi/glapi/glapi_gentable.c mesa-17.0.7/src/mapi/glapi/glapi_gentable.c --- mesa-12.0.6/src/mapi/glapi/glapi_gentable.c 2017-01-24 01:43:04.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/glapi_gentable.c 2017-06-01 10:37:53.000000000 +0000 @@ -106,7 +106,7 @@ } -#define GLAPI_TABLE_COUNT 1324 +#define GLAPI_TABLE_COUNT 1330 static const char * const _glapi_table_func_names[GLAPI_TABLE_COUNT] = { /* 0 */ "NewList", /* 1 */ "EndList", @@ -1020,418 +1020,424 @@ /* 909 */ "BindSamplers", /* 910 */ "BindTextures", /* 911 */ "BindVertexBuffers", - /* 912 */ "MultiDrawArraysIndirectCountARB", - /* 913 */ "MultiDrawElementsIndirectCountARB", - /* 914 */ "ClipControl", - /* 915 */ "BindTextureUnit", - /* 916 */ "BlitNamedFramebuffer", - /* 917 */ "CheckNamedFramebufferStatus", - /* 918 */ "ClearNamedBufferData", - /* 919 */ "ClearNamedBufferSubData", - /* 920 */ "ClearNamedFramebufferfi", - /* 921 */ "ClearNamedFramebufferfv", - /* 922 */ "ClearNamedFramebufferiv", - /* 923 */ "ClearNamedFramebufferuiv", - /* 924 */ "CompressedTextureSubImage1D", - /* 925 */ "CompressedTextureSubImage2D", - /* 926 */ "CompressedTextureSubImage3D", - /* 927 */ "CopyNamedBufferSubData", - /* 928 */ "CopyTextureSubImage1D", - /* 929 */ "CopyTextureSubImage2D", - /* 930 */ "CopyTextureSubImage3D", - /* 931 */ "CreateBuffers", - /* 932 */ "CreateFramebuffers", - /* 933 */ "CreateProgramPipelines", - /* 934 */ "CreateQueries", - /* 935 */ "CreateRenderbuffers", - /* 936 */ "CreateSamplers", - /* 937 */ "CreateTextures", - /* 938 */ "CreateTransformFeedbacks", - /* 939 */ "CreateVertexArrays", - /* 940 */ "DisableVertexArrayAttrib", - /* 941 */ "EnableVertexArrayAttrib", - /* 942 */ "FlushMappedNamedBufferRange", - /* 943 */ "GenerateTextureMipmap", - /* 944 */ "GetCompressedTextureImage", - /* 945 */ "GetNamedBufferParameteri64v", - /* 946 */ "GetNamedBufferParameteriv", - /* 947 */ "GetNamedBufferPointerv", - /* 948 */ "GetNamedBufferSubData", - /* 949 */ "GetNamedFramebufferAttachmentParameteriv", - /* 950 */ "GetNamedFramebufferParameteriv", - /* 951 */ "GetNamedRenderbufferParameteriv", - /* 952 */ "GetQueryBufferObjecti64v", - /* 953 */ "GetQueryBufferObjectiv", - /* 954 */ "GetQueryBufferObjectui64v", - /* 955 */ "GetQueryBufferObjectuiv", - /* 956 */ "GetTextureImage", - /* 957 */ "GetTextureLevelParameterfv", - /* 958 */ "GetTextureLevelParameteriv", - /* 959 */ "GetTextureParameterIiv", - /* 960 */ "GetTextureParameterIuiv", - /* 961 */ "GetTextureParameterfv", - /* 962 */ "GetTextureParameteriv", - /* 963 */ "GetTransformFeedbacki64_v", - /* 964 */ "GetTransformFeedbacki_v", - /* 965 */ "GetTransformFeedbackiv", - /* 966 */ "GetVertexArrayIndexed64iv", - /* 967 */ "GetVertexArrayIndexediv", - /* 968 */ "GetVertexArrayiv", - /* 969 */ "InvalidateNamedFramebufferData", - /* 970 */ "InvalidateNamedFramebufferSubData", - /* 971 */ "MapNamedBuffer", - /* 972 */ "MapNamedBufferRange", - /* 973 */ "NamedBufferData", - /* 974 */ "NamedBufferStorage", - /* 975 */ "NamedBufferSubData", - /* 976 */ "NamedFramebufferDrawBuffer", - /* 977 */ "NamedFramebufferDrawBuffers", - /* 978 */ "NamedFramebufferParameteri", - /* 979 */ "NamedFramebufferReadBuffer", - /* 980 */ "NamedFramebufferRenderbuffer", - /* 981 */ "NamedFramebufferTexture", - /* 982 */ "NamedFramebufferTextureLayer", - /* 983 */ "NamedRenderbufferStorage", - /* 984 */ "NamedRenderbufferStorageMultisample", - /* 985 */ "TextureBuffer", - /* 986 */ "TextureBufferRange", - /* 987 */ "TextureParameterIiv", - /* 988 */ "TextureParameterIuiv", - /* 989 */ "TextureParameterf", - /* 990 */ "TextureParameterfv", - /* 991 */ "TextureParameteri", - /* 992 */ "TextureParameteriv", - /* 993 */ "TextureStorage1D", - /* 994 */ "TextureStorage2D", - /* 995 */ "TextureStorage2DMultisample", - /* 996 */ "TextureStorage3D", - /* 997 */ "TextureStorage3DMultisample", - /* 998 */ "TextureSubImage1D", - /* 999 */ "TextureSubImage2D", - /* 1000 */ "TextureSubImage3D", - /* 1001 */ "TransformFeedbackBufferBase", - /* 1002 */ "TransformFeedbackBufferRange", - /* 1003 */ "UnmapNamedBuffer", - /* 1004 */ "VertexArrayAttribBinding", - /* 1005 */ "VertexArrayAttribFormat", - /* 1006 */ "VertexArrayAttribIFormat", - /* 1007 */ "VertexArrayAttribLFormat", - /* 1008 */ "VertexArrayBindingDivisor", - /* 1009 */ "VertexArrayElementBuffer", - /* 1010 */ "VertexArrayVertexBuffer", - /* 1011 */ "VertexArrayVertexBuffers", - /* 1012 */ "GetCompressedTextureSubImage", - /* 1013 */ "GetTextureSubImage", - /* 1014 */ "InvalidateBufferData", - /* 1015 */ "InvalidateBufferSubData", - /* 1016 */ "InvalidateFramebuffer", - /* 1017 */ "InvalidateSubFramebuffer", - /* 1018 */ "InvalidateTexImage", - /* 1019 */ "InvalidateTexSubImage", - /* 1020 */ "PolygonOffsetEXT", - /* 1021 */ "DrawTexfOES", - /* 1022 */ "DrawTexfvOES", - /* 1023 */ "DrawTexiOES", - /* 1024 */ "DrawTexivOES", - /* 1025 */ "DrawTexsOES", - /* 1026 */ "DrawTexsvOES", - /* 1027 */ "DrawTexxOES", - /* 1028 */ "DrawTexxvOES", - /* 1029 */ "PointSizePointerOES", - /* 1030 */ "QueryMatrixxOES", - /* 1031 */ "SampleMaskSGIS", - /* 1032 */ "SamplePatternSGIS", - /* 1033 */ "ColorPointerEXT", - /* 1034 */ "EdgeFlagPointerEXT", - /* 1035 */ "IndexPointerEXT", - /* 1036 */ "NormalPointerEXT", - /* 1037 */ "TexCoordPointerEXT", - /* 1038 */ "VertexPointerEXT", - /* 1039 */ "DiscardFramebufferEXT", - /* 1040 */ "ActiveShaderProgram", - /* 1041 */ "BindProgramPipeline", - /* 1042 */ "CreateShaderProgramv", - /* 1043 */ "DeleteProgramPipelines", - /* 1044 */ "GenProgramPipelines", - /* 1045 */ "GetProgramPipelineInfoLog", - /* 1046 */ "GetProgramPipelineiv", - /* 1047 */ "IsProgramPipeline", - /* 1048 */ "LockArraysEXT", - /* 1049 */ "ProgramUniform1d", - /* 1050 */ "ProgramUniform1dv", - /* 1051 */ "ProgramUniform1f", - /* 1052 */ "ProgramUniform1fv", - /* 1053 */ "ProgramUniform1i", - /* 1054 */ "ProgramUniform1iv", - /* 1055 */ "ProgramUniform1ui", - /* 1056 */ "ProgramUniform1uiv", - /* 1057 */ "ProgramUniform2d", - /* 1058 */ "ProgramUniform2dv", - /* 1059 */ "ProgramUniform2f", - /* 1060 */ "ProgramUniform2fv", - /* 1061 */ "ProgramUniform2i", - /* 1062 */ "ProgramUniform2iv", - /* 1063 */ "ProgramUniform2ui", - /* 1064 */ "ProgramUniform2uiv", - /* 1065 */ "ProgramUniform3d", - /* 1066 */ "ProgramUniform3dv", - /* 1067 */ "ProgramUniform3f", - /* 1068 */ "ProgramUniform3fv", - /* 1069 */ "ProgramUniform3i", - /* 1070 */ "ProgramUniform3iv", - /* 1071 */ "ProgramUniform3ui", - /* 1072 */ "ProgramUniform3uiv", - /* 1073 */ "ProgramUniform4d", - /* 1074 */ "ProgramUniform4dv", - /* 1075 */ "ProgramUniform4f", - /* 1076 */ "ProgramUniform4fv", - /* 1077 */ "ProgramUniform4i", - /* 1078 */ "ProgramUniform4iv", - /* 1079 */ "ProgramUniform4ui", - /* 1080 */ "ProgramUniform4uiv", - /* 1081 */ "ProgramUniformMatrix2dv", - /* 1082 */ "ProgramUniformMatrix2fv", - /* 1083 */ "ProgramUniformMatrix2x3dv", - /* 1084 */ "ProgramUniformMatrix2x3fv", - /* 1085 */ "ProgramUniformMatrix2x4dv", - /* 1086 */ "ProgramUniformMatrix2x4fv", - /* 1087 */ "ProgramUniformMatrix3dv", - /* 1088 */ "ProgramUniformMatrix3fv", - /* 1089 */ "ProgramUniformMatrix3x2dv", - /* 1090 */ "ProgramUniformMatrix3x2fv", - /* 1091 */ "ProgramUniformMatrix3x4dv", - /* 1092 */ "ProgramUniformMatrix3x4fv", - /* 1093 */ "ProgramUniformMatrix4dv", - /* 1094 */ "ProgramUniformMatrix4fv", - /* 1095 */ "ProgramUniformMatrix4x2dv", - /* 1096 */ "ProgramUniformMatrix4x2fv", - /* 1097 */ "ProgramUniformMatrix4x3dv", - /* 1098 */ "ProgramUniformMatrix4x3fv", - /* 1099 */ "UnlockArraysEXT", - /* 1100 */ "UseProgramStages", - /* 1101 */ "ValidateProgramPipeline", - /* 1102 */ "DebugMessageCallback", - /* 1103 */ "DebugMessageControl", - /* 1104 */ "DebugMessageInsert", - /* 1105 */ "GetDebugMessageLog", - /* 1106 */ "GetObjectLabel", - /* 1107 */ "GetObjectPtrLabel", - /* 1108 */ "ObjectLabel", - /* 1109 */ "ObjectPtrLabel", - /* 1110 */ "PopDebugGroup", - /* 1111 */ "PushDebugGroup", - /* 1112 */ "SecondaryColor3fEXT", - /* 1113 */ "SecondaryColor3fvEXT", - /* 1114 */ "MultiDrawElementsEXT", - /* 1115 */ "FogCoordfEXT", - /* 1116 */ "FogCoordfvEXT", - /* 1117 */ "ResizeBuffersMESA", - /* 1118 */ "WindowPos4dMESA", - /* 1119 */ "WindowPos4dvMESA", - /* 1120 */ "WindowPos4fMESA", - /* 1121 */ "WindowPos4fvMESA", - /* 1122 */ "WindowPos4iMESA", - /* 1123 */ "WindowPos4ivMESA", - /* 1124 */ "WindowPos4sMESA", - /* 1125 */ "WindowPos4svMESA", - /* 1126 */ "MultiModeDrawArraysIBM", - /* 1127 */ "MultiModeDrawElementsIBM", - /* 1128 */ "AreProgramsResidentNV", - /* 1129 */ "ExecuteProgramNV", - /* 1130 */ "GetProgramParameterdvNV", - /* 1131 */ "GetProgramParameterfvNV", - /* 1132 */ "GetProgramStringNV", - /* 1133 */ "GetProgramivNV", - /* 1134 */ "GetTrackMatrixivNV", - /* 1135 */ "GetVertexAttribdvNV", - /* 1136 */ "GetVertexAttribfvNV", - /* 1137 */ "GetVertexAttribivNV", - /* 1138 */ "LoadProgramNV", - /* 1139 */ "ProgramParameters4dvNV", - /* 1140 */ "ProgramParameters4fvNV", - /* 1141 */ "RequestResidentProgramsNV", - /* 1142 */ "TrackMatrixNV", - /* 1143 */ "VertexAttrib1dNV", - /* 1144 */ "VertexAttrib1dvNV", - /* 1145 */ "VertexAttrib1fNV", - /* 1146 */ "VertexAttrib1fvNV", - /* 1147 */ "VertexAttrib1sNV", - /* 1148 */ "VertexAttrib1svNV", - /* 1149 */ "VertexAttrib2dNV", - /* 1150 */ "VertexAttrib2dvNV", - /* 1151 */ "VertexAttrib2fNV", - /* 1152 */ "VertexAttrib2fvNV", - /* 1153 */ "VertexAttrib2sNV", - /* 1154 */ "VertexAttrib2svNV", - /* 1155 */ "VertexAttrib3dNV", - /* 1156 */ "VertexAttrib3dvNV", - /* 1157 */ "VertexAttrib3fNV", - /* 1158 */ "VertexAttrib3fvNV", - /* 1159 */ "VertexAttrib3sNV", - /* 1160 */ "VertexAttrib3svNV", - /* 1161 */ "VertexAttrib4dNV", - /* 1162 */ "VertexAttrib4dvNV", - /* 1163 */ "VertexAttrib4fNV", - /* 1164 */ "VertexAttrib4fvNV", - /* 1165 */ "VertexAttrib4sNV", - /* 1166 */ "VertexAttrib4svNV", - /* 1167 */ "VertexAttrib4ubNV", - /* 1168 */ "VertexAttrib4ubvNV", - /* 1169 */ "VertexAttribPointerNV", - /* 1170 */ "VertexAttribs1dvNV", - /* 1171 */ "VertexAttribs1fvNV", - /* 1172 */ "VertexAttribs1svNV", - /* 1173 */ "VertexAttribs2dvNV", - /* 1174 */ "VertexAttribs2fvNV", - /* 1175 */ "VertexAttribs2svNV", - /* 1176 */ "VertexAttribs3dvNV", - /* 1177 */ "VertexAttribs3fvNV", - /* 1178 */ "VertexAttribs3svNV", - /* 1179 */ "VertexAttribs4dvNV", - /* 1180 */ "VertexAttribs4fvNV", - /* 1181 */ "VertexAttribs4svNV", - /* 1182 */ "VertexAttribs4ubvNV", - /* 1183 */ "GetTexBumpParameterfvATI", - /* 1184 */ "GetTexBumpParameterivATI", - /* 1185 */ "TexBumpParameterfvATI", - /* 1186 */ "TexBumpParameterivATI", - /* 1187 */ "AlphaFragmentOp1ATI", - /* 1188 */ "AlphaFragmentOp2ATI", - /* 1189 */ "AlphaFragmentOp3ATI", - /* 1190 */ "BeginFragmentShaderATI", - /* 1191 */ "BindFragmentShaderATI", - /* 1192 */ "ColorFragmentOp1ATI", - /* 1193 */ "ColorFragmentOp2ATI", - /* 1194 */ "ColorFragmentOp3ATI", - /* 1195 */ "DeleteFragmentShaderATI", - /* 1196 */ "EndFragmentShaderATI", - /* 1197 */ "GenFragmentShadersATI", - /* 1198 */ "PassTexCoordATI", - /* 1199 */ "SampleMapATI", - /* 1200 */ "SetFragmentShaderConstantATI", - /* 1201 */ "ActiveStencilFaceEXT", - /* 1202 */ "BindVertexArrayAPPLE", - /* 1203 */ "GenVertexArraysAPPLE", - /* 1204 */ "GetProgramNamedParameterdvNV", - /* 1205 */ "GetProgramNamedParameterfvNV", - /* 1206 */ "ProgramNamedParameter4dNV", - /* 1207 */ "ProgramNamedParameter4dvNV", - /* 1208 */ "ProgramNamedParameter4fNV", - /* 1209 */ "ProgramNamedParameter4fvNV", - /* 1210 */ "PrimitiveRestartNV", - /* 1211 */ "GetTexGenxvOES", - /* 1212 */ "TexGenxOES", - /* 1213 */ "TexGenxvOES", - /* 1214 */ "DepthBoundsEXT", - /* 1215 */ "BindFramebufferEXT", - /* 1216 */ "BindRenderbufferEXT", - /* 1217 */ "StringMarkerGREMEDY", - /* 1218 */ "BufferParameteriAPPLE", - /* 1219 */ "FlushMappedBufferRangeAPPLE", - /* 1220 */ "VertexAttribI1iEXT", - /* 1221 */ "VertexAttribI1uiEXT", - /* 1222 */ "VertexAttribI2iEXT", - /* 1223 */ "VertexAttribI2ivEXT", - /* 1224 */ "VertexAttribI2uiEXT", - /* 1225 */ "VertexAttribI2uivEXT", - /* 1226 */ "VertexAttribI3iEXT", - /* 1227 */ "VertexAttribI3ivEXT", - /* 1228 */ "VertexAttribI3uiEXT", - /* 1229 */ "VertexAttribI3uivEXT", - /* 1230 */ "VertexAttribI4iEXT", - /* 1231 */ "VertexAttribI4ivEXT", - /* 1232 */ "VertexAttribI4uiEXT", - /* 1233 */ "VertexAttribI4uivEXT", - /* 1234 */ "ClearColorIiEXT", - /* 1235 */ "ClearColorIuiEXT", - /* 1236 */ "BindBufferOffsetEXT", - /* 1237 */ "BeginPerfMonitorAMD", - /* 1238 */ "DeletePerfMonitorsAMD", - /* 1239 */ "EndPerfMonitorAMD", - /* 1240 */ "GenPerfMonitorsAMD", - /* 1241 */ "GetPerfMonitorCounterDataAMD", - /* 1242 */ "GetPerfMonitorCounterInfoAMD", - /* 1243 */ "GetPerfMonitorCounterStringAMD", - /* 1244 */ "GetPerfMonitorCountersAMD", - /* 1245 */ "GetPerfMonitorGroupStringAMD", - /* 1246 */ "GetPerfMonitorGroupsAMD", - /* 1247 */ "SelectPerfMonitorCountersAMD", - /* 1248 */ "GetObjectParameterivAPPLE", - /* 1249 */ "ObjectPurgeableAPPLE", - /* 1250 */ "ObjectUnpurgeableAPPLE", - /* 1251 */ "ActiveProgramEXT", - /* 1252 */ "CreateShaderProgramEXT", - /* 1253 */ "UseShaderProgramEXT", - /* 1254 */ "TextureBarrierNV", - /* 1255 */ "VDPAUFiniNV", - /* 1256 */ "VDPAUGetSurfaceivNV", - /* 1257 */ "VDPAUInitNV", - /* 1258 */ "VDPAUIsSurfaceNV", - /* 1259 */ "VDPAUMapSurfacesNV", - /* 1260 */ "VDPAURegisterOutputSurfaceNV", - /* 1261 */ "VDPAURegisterVideoSurfaceNV", - /* 1262 */ "VDPAUSurfaceAccessNV", - /* 1263 */ "VDPAUUnmapSurfacesNV", - /* 1264 */ "VDPAUUnregisterSurfaceNV", - /* 1265 */ "BeginPerfQueryINTEL", - /* 1266 */ "CreatePerfQueryINTEL", - /* 1267 */ "DeletePerfQueryINTEL", - /* 1268 */ "EndPerfQueryINTEL", - /* 1269 */ "GetFirstPerfQueryIdINTEL", - /* 1270 */ "GetNextPerfQueryIdINTEL", - /* 1271 */ "GetPerfCounterInfoINTEL", - /* 1272 */ "GetPerfQueryDataINTEL", - /* 1273 */ "GetPerfQueryIdByNameINTEL", - /* 1274 */ "GetPerfQueryInfoINTEL", - /* 1275 */ "PolygonOffsetClampEXT", - /* 1276 */ "StencilFuncSeparateATI", - /* 1277 */ "ProgramEnvParameters4fvEXT", - /* 1278 */ "ProgramLocalParameters4fvEXT", - /* 1279 */ "EGLImageTargetRenderbufferStorageOES", - /* 1280 */ "EGLImageTargetTexture2DOES", - /* 1281 */ "AlphaFuncx", - /* 1282 */ "ClearColorx", - /* 1283 */ "ClearDepthx", - /* 1284 */ "Color4x", - /* 1285 */ "DepthRangex", - /* 1286 */ "Fogx", - /* 1287 */ "Fogxv", - /* 1288 */ "Frustumf", - /* 1289 */ "Frustumx", - /* 1290 */ "LightModelx", - /* 1291 */ "LightModelxv", - /* 1292 */ "Lightx", - /* 1293 */ "Lightxv", - /* 1294 */ "LineWidthx", - /* 1295 */ "LoadMatrixx", - /* 1296 */ "Materialx", - /* 1297 */ "Materialxv", - /* 1298 */ "MultMatrixx", - /* 1299 */ "MultiTexCoord4x", - /* 1300 */ "Normal3x", - /* 1301 */ "Orthof", - /* 1302 */ "Orthox", - /* 1303 */ "PointSizex", - /* 1304 */ "PolygonOffsetx", - /* 1305 */ "Rotatex", - /* 1306 */ "SampleCoveragex", - /* 1307 */ "Scalex", - /* 1308 */ "TexEnvx", - /* 1309 */ "TexEnvxv", - /* 1310 */ "TexParameterx", - /* 1311 */ "Translatex", - /* 1312 */ "ClipPlanef", - /* 1313 */ "ClipPlanex", - /* 1314 */ "GetClipPlanef", - /* 1315 */ "GetClipPlanex", - /* 1316 */ "GetFixedv", - /* 1317 */ "GetLightxv", - /* 1318 */ "GetMaterialxv", - /* 1319 */ "GetTexEnvxv", - /* 1320 */ "GetTexParameterxv", - /* 1321 */ "PointParameterx", - /* 1322 */ "PointParameterxv", - /* 1323 */ "TexParameterxv", + /* 912 */ "DispatchComputeGroupSizeARB", + /* 913 */ "MultiDrawArraysIndirectCountARB", + /* 914 */ "MultiDrawElementsIndirectCountARB", + /* 915 */ "ClipControl", + /* 916 */ "BindTextureUnit", + /* 917 */ "BlitNamedFramebuffer", + /* 918 */ "CheckNamedFramebufferStatus", + /* 919 */ "ClearNamedBufferData", + /* 920 */ "ClearNamedBufferSubData", + /* 921 */ "ClearNamedFramebufferfi", + /* 922 */ "ClearNamedFramebufferfv", + /* 923 */ "ClearNamedFramebufferiv", + /* 924 */ "ClearNamedFramebufferuiv", + /* 925 */ "CompressedTextureSubImage1D", + /* 926 */ "CompressedTextureSubImage2D", + /* 927 */ "CompressedTextureSubImage3D", + /* 928 */ "CopyNamedBufferSubData", + /* 929 */ "CopyTextureSubImage1D", + /* 930 */ "CopyTextureSubImage2D", + /* 931 */ "CopyTextureSubImage3D", + /* 932 */ "CreateBuffers", + /* 933 */ "CreateFramebuffers", + /* 934 */ "CreateProgramPipelines", + /* 935 */ "CreateQueries", + /* 936 */ "CreateRenderbuffers", + /* 937 */ "CreateSamplers", + /* 938 */ "CreateTextures", + /* 939 */ "CreateTransformFeedbacks", + /* 940 */ "CreateVertexArrays", + /* 941 */ "DisableVertexArrayAttrib", + /* 942 */ "EnableVertexArrayAttrib", + /* 943 */ "FlushMappedNamedBufferRange", + /* 944 */ "GenerateTextureMipmap", + /* 945 */ "GetCompressedTextureImage", + /* 946 */ "GetNamedBufferParameteri64v", + /* 947 */ "GetNamedBufferParameteriv", + /* 948 */ "GetNamedBufferPointerv", + /* 949 */ "GetNamedBufferSubData", + /* 950 */ "GetNamedFramebufferAttachmentParameteriv", + /* 951 */ "GetNamedFramebufferParameteriv", + /* 952 */ "GetNamedRenderbufferParameteriv", + /* 953 */ "GetQueryBufferObjecti64v", + /* 954 */ "GetQueryBufferObjectiv", + /* 955 */ "GetQueryBufferObjectui64v", + /* 956 */ "GetQueryBufferObjectuiv", + /* 957 */ "GetTextureImage", + /* 958 */ "GetTextureLevelParameterfv", + /* 959 */ "GetTextureLevelParameteriv", + /* 960 */ "GetTextureParameterIiv", + /* 961 */ "GetTextureParameterIuiv", + /* 962 */ "GetTextureParameterfv", + /* 963 */ "GetTextureParameteriv", + /* 964 */ "GetTransformFeedbacki64_v", + /* 965 */ "GetTransformFeedbacki_v", + /* 966 */ "GetTransformFeedbackiv", + /* 967 */ "GetVertexArrayIndexed64iv", + /* 968 */ "GetVertexArrayIndexediv", + /* 969 */ "GetVertexArrayiv", + /* 970 */ "InvalidateNamedFramebufferData", + /* 971 */ "InvalidateNamedFramebufferSubData", + /* 972 */ "MapNamedBuffer", + /* 973 */ "MapNamedBufferRange", + /* 974 */ "NamedBufferData", + /* 975 */ "NamedBufferStorage", + /* 976 */ "NamedBufferSubData", + /* 977 */ "NamedFramebufferDrawBuffer", + /* 978 */ "NamedFramebufferDrawBuffers", + /* 979 */ "NamedFramebufferParameteri", + /* 980 */ "NamedFramebufferReadBuffer", + /* 981 */ "NamedFramebufferRenderbuffer", + /* 982 */ "NamedFramebufferTexture", + /* 983 */ "NamedFramebufferTextureLayer", + /* 984 */ "NamedRenderbufferStorage", + /* 985 */ "NamedRenderbufferStorageMultisample", + /* 986 */ "TextureBuffer", + /* 987 */ "TextureBufferRange", + /* 988 */ "TextureParameterIiv", + /* 989 */ "TextureParameterIuiv", + /* 990 */ "TextureParameterf", + /* 991 */ "TextureParameterfv", + /* 992 */ "TextureParameteri", + /* 993 */ "TextureParameteriv", + /* 994 */ "TextureStorage1D", + /* 995 */ "TextureStorage2D", + /* 996 */ "TextureStorage2DMultisample", + /* 997 */ "TextureStorage3D", + /* 998 */ "TextureStorage3DMultisample", + /* 999 */ "TextureSubImage1D", + /* 1000 */ "TextureSubImage2D", + /* 1001 */ "TextureSubImage3D", + /* 1002 */ "TransformFeedbackBufferBase", + /* 1003 */ "TransformFeedbackBufferRange", + /* 1004 */ "UnmapNamedBuffer", + /* 1005 */ "VertexArrayAttribBinding", + /* 1006 */ "VertexArrayAttribFormat", + /* 1007 */ "VertexArrayAttribIFormat", + /* 1008 */ "VertexArrayAttribLFormat", + /* 1009 */ "VertexArrayBindingDivisor", + /* 1010 */ "VertexArrayElementBuffer", + /* 1011 */ "VertexArrayVertexBuffer", + /* 1012 */ "VertexArrayVertexBuffers", + /* 1013 */ "GetCompressedTextureSubImage", + /* 1014 */ "GetTextureSubImage", + /* 1015 */ "InvalidateBufferData", + /* 1016 */ "InvalidateBufferSubData", + /* 1017 */ "InvalidateFramebuffer", + /* 1018 */ "InvalidateSubFramebuffer", + /* 1019 */ "InvalidateTexImage", + /* 1020 */ "InvalidateTexSubImage", + /* 1021 */ "PolygonOffsetEXT", + /* 1022 */ "DrawTexfOES", + /* 1023 */ "DrawTexfvOES", + /* 1024 */ "DrawTexiOES", + /* 1025 */ "DrawTexivOES", + /* 1026 */ "DrawTexsOES", + /* 1027 */ "DrawTexsvOES", + /* 1028 */ "DrawTexxOES", + /* 1029 */ "DrawTexxvOES", + /* 1030 */ "PointSizePointerOES", + /* 1031 */ "QueryMatrixxOES", + /* 1032 */ "SampleMaskSGIS", + /* 1033 */ "SamplePatternSGIS", + /* 1034 */ "ColorPointerEXT", + /* 1035 */ "EdgeFlagPointerEXT", + /* 1036 */ "IndexPointerEXT", + /* 1037 */ "NormalPointerEXT", + /* 1038 */ "TexCoordPointerEXT", + /* 1039 */ "VertexPointerEXT", + /* 1040 */ "DiscardFramebufferEXT", + /* 1041 */ "ActiveShaderProgram", + /* 1042 */ "BindProgramPipeline", + /* 1043 */ "CreateShaderProgramv", + /* 1044 */ "DeleteProgramPipelines", + /* 1045 */ "GenProgramPipelines", + /* 1046 */ "GetProgramPipelineInfoLog", + /* 1047 */ "GetProgramPipelineiv", + /* 1048 */ "IsProgramPipeline", + /* 1049 */ "LockArraysEXT", + /* 1050 */ "ProgramUniform1d", + /* 1051 */ "ProgramUniform1dv", + /* 1052 */ "ProgramUniform1f", + /* 1053 */ "ProgramUniform1fv", + /* 1054 */ "ProgramUniform1i", + /* 1055 */ "ProgramUniform1iv", + /* 1056 */ "ProgramUniform1ui", + /* 1057 */ "ProgramUniform1uiv", + /* 1058 */ "ProgramUniform2d", + /* 1059 */ "ProgramUniform2dv", + /* 1060 */ "ProgramUniform2f", + /* 1061 */ "ProgramUniform2fv", + /* 1062 */ "ProgramUniform2i", + /* 1063 */ "ProgramUniform2iv", + /* 1064 */ "ProgramUniform2ui", + /* 1065 */ "ProgramUniform2uiv", + /* 1066 */ "ProgramUniform3d", + /* 1067 */ "ProgramUniform3dv", + /* 1068 */ "ProgramUniform3f", + /* 1069 */ "ProgramUniform3fv", + /* 1070 */ "ProgramUniform3i", + /* 1071 */ "ProgramUniform3iv", + /* 1072 */ "ProgramUniform3ui", + /* 1073 */ "ProgramUniform3uiv", + /* 1074 */ "ProgramUniform4d", + /* 1075 */ "ProgramUniform4dv", + /* 1076 */ "ProgramUniform4f", + /* 1077 */ "ProgramUniform4fv", + /* 1078 */ "ProgramUniform4i", + /* 1079 */ "ProgramUniform4iv", + /* 1080 */ "ProgramUniform4ui", + /* 1081 */ "ProgramUniform4uiv", + /* 1082 */ "ProgramUniformMatrix2dv", + /* 1083 */ "ProgramUniformMatrix2fv", + /* 1084 */ "ProgramUniformMatrix2x3dv", + /* 1085 */ "ProgramUniformMatrix2x3fv", + /* 1086 */ "ProgramUniformMatrix2x4dv", + /* 1087 */ "ProgramUniformMatrix2x4fv", + /* 1088 */ "ProgramUniformMatrix3dv", + /* 1089 */ "ProgramUniformMatrix3fv", + /* 1090 */ "ProgramUniformMatrix3x2dv", + /* 1091 */ "ProgramUniformMatrix3x2fv", + /* 1092 */ "ProgramUniformMatrix3x4dv", + /* 1093 */ "ProgramUniformMatrix3x4fv", + /* 1094 */ "ProgramUniformMatrix4dv", + /* 1095 */ "ProgramUniformMatrix4fv", + /* 1096 */ "ProgramUniformMatrix4x2dv", + /* 1097 */ "ProgramUniformMatrix4x2fv", + /* 1098 */ "ProgramUniformMatrix4x3dv", + /* 1099 */ "ProgramUniformMatrix4x3fv", + /* 1100 */ "UnlockArraysEXT", + /* 1101 */ "UseProgramStages", + /* 1102 */ "ValidateProgramPipeline", + /* 1103 */ "DebugMessageCallback", + /* 1104 */ "DebugMessageControl", + /* 1105 */ "DebugMessageInsert", + /* 1106 */ "GetDebugMessageLog", + /* 1107 */ "GetObjectLabel", + /* 1108 */ "GetObjectPtrLabel", + /* 1109 */ "ObjectLabel", + /* 1110 */ "ObjectPtrLabel", + /* 1111 */ "PopDebugGroup", + /* 1112 */ "PushDebugGroup", + /* 1113 */ "SecondaryColor3fEXT", + /* 1114 */ "SecondaryColor3fvEXT", + /* 1115 */ "MultiDrawElementsEXT", + /* 1116 */ "FogCoordfEXT", + /* 1117 */ "FogCoordfvEXT", + /* 1118 */ "ResizeBuffersMESA", + /* 1119 */ "WindowPos4dMESA", + /* 1120 */ "WindowPos4dvMESA", + /* 1121 */ "WindowPos4fMESA", + /* 1122 */ "WindowPos4fvMESA", + /* 1123 */ "WindowPos4iMESA", + /* 1124 */ "WindowPos4ivMESA", + /* 1125 */ "WindowPos4sMESA", + /* 1126 */ "WindowPos4svMESA", + /* 1127 */ "MultiModeDrawArraysIBM", + /* 1128 */ "MultiModeDrawElementsIBM", + /* 1129 */ "AreProgramsResidentNV", + /* 1130 */ "ExecuteProgramNV", + /* 1131 */ "GetProgramParameterdvNV", + /* 1132 */ "GetProgramParameterfvNV", + /* 1133 */ "GetProgramStringNV", + /* 1134 */ "GetProgramivNV", + /* 1135 */ "GetTrackMatrixivNV", + /* 1136 */ "GetVertexAttribdvNV", + /* 1137 */ "GetVertexAttribfvNV", + /* 1138 */ "GetVertexAttribivNV", + /* 1139 */ "LoadProgramNV", + /* 1140 */ "ProgramParameters4dvNV", + /* 1141 */ "ProgramParameters4fvNV", + /* 1142 */ "RequestResidentProgramsNV", + /* 1143 */ "TrackMatrixNV", + /* 1144 */ "VertexAttrib1dNV", + /* 1145 */ "VertexAttrib1dvNV", + /* 1146 */ "VertexAttrib1fNV", + /* 1147 */ "VertexAttrib1fvNV", + /* 1148 */ "VertexAttrib1sNV", + /* 1149 */ "VertexAttrib1svNV", + /* 1150 */ "VertexAttrib2dNV", + /* 1151 */ "VertexAttrib2dvNV", + /* 1152 */ "VertexAttrib2fNV", + /* 1153 */ "VertexAttrib2fvNV", + /* 1154 */ "VertexAttrib2sNV", + /* 1155 */ "VertexAttrib2svNV", + /* 1156 */ "VertexAttrib3dNV", + /* 1157 */ "VertexAttrib3dvNV", + /* 1158 */ "VertexAttrib3fNV", + /* 1159 */ "VertexAttrib3fvNV", + /* 1160 */ "VertexAttrib3sNV", + /* 1161 */ "VertexAttrib3svNV", + /* 1162 */ "VertexAttrib4dNV", + /* 1163 */ "VertexAttrib4dvNV", + /* 1164 */ "VertexAttrib4fNV", + /* 1165 */ "VertexAttrib4fvNV", + /* 1166 */ "VertexAttrib4sNV", + /* 1167 */ "VertexAttrib4svNV", + /* 1168 */ "VertexAttrib4ubNV", + /* 1169 */ "VertexAttrib4ubvNV", + /* 1170 */ "VertexAttribPointerNV", + /* 1171 */ "VertexAttribs1dvNV", + /* 1172 */ "VertexAttribs1fvNV", + /* 1173 */ "VertexAttribs1svNV", + /* 1174 */ "VertexAttribs2dvNV", + /* 1175 */ "VertexAttribs2fvNV", + /* 1176 */ "VertexAttribs2svNV", + /* 1177 */ "VertexAttribs3dvNV", + /* 1178 */ "VertexAttribs3fvNV", + /* 1179 */ "VertexAttribs3svNV", + /* 1180 */ "VertexAttribs4dvNV", + /* 1181 */ "VertexAttribs4fvNV", + /* 1182 */ "VertexAttribs4svNV", + /* 1183 */ "VertexAttribs4ubvNV", + /* 1184 */ "GetTexBumpParameterfvATI", + /* 1185 */ "GetTexBumpParameterivATI", + /* 1186 */ "TexBumpParameterfvATI", + /* 1187 */ "TexBumpParameterivATI", + /* 1188 */ "AlphaFragmentOp1ATI", + /* 1189 */ "AlphaFragmentOp2ATI", + /* 1190 */ "AlphaFragmentOp3ATI", + /* 1191 */ "BeginFragmentShaderATI", + /* 1192 */ "BindFragmentShaderATI", + /* 1193 */ "ColorFragmentOp1ATI", + /* 1194 */ "ColorFragmentOp2ATI", + /* 1195 */ "ColorFragmentOp3ATI", + /* 1196 */ "DeleteFragmentShaderATI", + /* 1197 */ "EndFragmentShaderATI", + /* 1198 */ "GenFragmentShadersATI", + /* 1199 */ "PassTexCoordATI", + /* 1200 */ "SampleMapATI", + /* 1201 */ "SetFragmentShaderConstantATI", + /* 1202 */ "DepthRangeArrayfvOES", + /* 1203 */ "DepthRangeIndexedfOES", + /* 1204 */ "ActiveStencilFaceEXT", + /* 1205 */ "BindVertexArrayAPPLE", + /* 1206 */ "GenVertexArraysAPPLE", + /* 1207 */ "GetProgramNamedParameterdvNV", + /* 1208 */ "GetProgramNamedParameterfvNV", + /* 1209 */ "ProgramNamedParameter4dNV", + /* 1210 */ "ProgramNamedParameter4dvNV", + /* 1211 */ "ProgramNamedParameter4fNV", + /* 1212 */ "ProgramNamedParameter4fvNV", + /* 1213 */ "PrimitiveRestartNV", + /* 1214 */ "GetTexGenxvOES", + /* 1215 */ "TexGenxOES", + /* 1216 */ "TexGenxvOES", + /* 1217 */ "DepthBoundsEXT", + /* 1218 */ "BindFramebufferEXT", + /* 1219 */ "BindRenderbufferEXT", + /* 1220 */ "StringMarkerGREMEDY", + /* 1221 */ "BufferParameteriAPPLE", + /* 1222 */ "FlushMappedBufferRangeAPPLE", + /* 1223 */ "VertexAttribI1iEXT", + /* 1224 */ "VertexAttribI1uiEXT", + /* 1225 */ "VertexAttribI2iEXT", + /* 1226 */ "VertexAttribI2ivEXT", + /* 1227 */ "VertexAttribI2uiEXT", + /* 1228 */ "VertexAttribI2uivEXT", + /* 1229 */ "VertexAttribI3iEXT", + /* 1230 */ "VertexAttribI3ivEXT", + /* 1231 */ "VertexAttribI3uiEXT", + /* 1232 */ "VertexAttribI3uivEXT", + /* 1233 */ "VertexAttribI4iEXT", + /* 1234 */ "VertexAttribI4ivEXT", + /* 1235 */ "VertexAttribI4uiEXT", + /* 1236 */ "VertexAttribI4uivEXT", + /* 1237 */ "ClearColorIiEXT", + /* 1238 */ "ClearColorIuiEXT", + /* 1239 */ "BindBufferOffsetEXT", + /* 1240 */ "BeginPerfMonitorAMD", + /* 1241 */ "DeletePerfMonitorsAMD", + /* 1242 */ "EndPerfMonitorAMD", + /* 1243 */ "GenPerfMonitorsAMD", + /* 1244 */ "GetPerfMonitorCounterDataAMD", + /* 1245 */ "GetPerfMonitorCounterInfoAMD", + /* 1246 */ "GetPerfMonitorCounterStringAMD", + /* 1247 */ "GetPerfMonitorCountersAMD", + /* 1248 */ "GetPerfMonitorGroupStringAMD", + /* 1249 */ "GetPerfMonitorGroupsAMD", + /* 1250 */ "SelectPerfMonitorCountersAMD", + /* 1251 */ "GetObjectParameterivAPPLE", + /* 1252 */ "ObjectPurgeableAPPLE", + /* 1253 */ "ObjectUnpurgeableAPPLE", + /* 1254 */ "ActiveProgramEXT", + /* 1255 */ "CreateShaderProgramEXT", + /* 1256 */ "UseShaderProgramEXT", + /* 1257 */ "TextureBarrierNV", + /* 1258 */ "VDPAUFiniNV", + /* 1259 */ "VDPAUGetSurfaceivNV", + /* 1260 */ "VDPAUInitNV", + /* 1261 */ "VDPAUIsSurfaceNV", + /* 1262 */ "VDPAUMapSurfacesNV", + /* 1263 */ "VDPAURegisterOutputSurfaceNV", + /* 1264 */ "VDPAURegisterVideoSurfaceNV", + /* 1265 */ "VDPAUSurfaceAccessNV", + /* 1266 */ "VDPAUUnmapSurfacesNV", + /* 1267 */ "VDPAUUnregisterSurfaceNV", + /* 1268 */ "BeginPerfQueryINTEL", + /* 1269 */ "CreatePerfQueryINTEL", + /* 1270 */ "DeletePerfQueryINTEL", + /* 1271 */ "EndPerfQueryINTEL", + /* 1272 */ "GetFirstPerfQueryIdINTEL", + /* 1273 */ "GetNextPerfQueryIdINTEL", + /* 1274 */ "GetPerfCounterInfoINTEL", + /* 1275 */ "GetPerfQueryDataINTEL", + /* 1276 */ "GetPerfQueryIdByNameINTEL", + /* 1277 */ "GetPerfQueryInfoINTEL", + /* 1278 */ "PolygonOffsetClampEXT", + /* 1279 */ "WindowRectanglesEXT", + /* 1280 */ "StencilFuncSeparateATI", + /* 1281 */ "ProgramEnvParameters4fvEXT", + /* 1282 */ "ProgramLocalParameters4fvEXT", + /* 1283 */ "EGLImageTargetRenderbufferStorageOES", + /* 1284 */ "EGLImageTargetTexture2DOES", + /* 1285 */ "AlphaFuncx", + /* 1286 */ "ClearColorx", + /* 1287 */ "ClearDepthx", + /* 1288 */ "Color4x", + /* 1289 */ "DepthRangex", + /* 1290 */ "Fogx", + /* 1291 */ "Fogxv", + /* 1292 */ "Frustumf", + /* 1293 */ "Frustumx", + /* 1294 */ "LightModelx", + /* 1295 */ "LightModelxv", + /* 1296 */ "Lightx", + /* 1297 */ "Lightxv", + /* 1298 */ "LineWidthx", + /* 1299 */ "LoadMatrixx", + /* 1300 */ "Materialx", + /* 1301 */ "Materialxv", + /* 1302 */ "MultMatrixx", + /* 1303 */ "MultiTexCoord4x", + /* 1304 */ "Normal3x", + /* 1305 */ "Orthof", + /* 1306 */ "Orthox", + /* 1307 */ "PointSizex", + /* 1308 */ "PolygonOffsetx", + /* 1309 */ "Rotatex", + /* 1310 */ "SampleCoveragex", + /* 1311 */ "Scalex", + /* 1312 */ "TexEnvx", + /* 1313 */ "TexEnvxv", + /* 1314 */ "TexParameterx", + /* 1315 */ "Translatex", + /* 1316 */ "ClipPlanef", + /* 1317 */ "ClipPlanex", + /* 1318 */ "GetClipPlanef", + /* 1319 */ "GetClipPlanex", + /* 1320 */ "GetFixedv", + /* 1321 */ "GetLightxv", + /* 1322 */ "GetMaterialxv", + /* 1323 */ "GetTexEnvxv", + /* 1324 */ "GetTexParameterxv", + /* 1325 */ "PointParameterx", + /* 1326 */ "PointParameterxv", + /* 1327 */ "TexParameterxv", + /* 1328 */ "BlendBarrier", + /* 1329 */ "PrimitiveBoundingBox", }; struct _glapi_table * diff -Nru mesa-12.0.6/src/mapi/glapi/glapi_getproc.c mesa-17.0.7/src/mapi/glapi/glapi_getproc.c --- mesa-12.0.6/src/mapi/glapi/glapi_getproc.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/glapi_getproc.c 2017-06-01 10:37:10.000000000 +0000 @@ -580,85 +580,3 @@ */ return FIRST_DYNAMIC_OFFSET + MAX_EXTENSION_FUNCS; } - - -/** - * Make sure there are no NULL pointers in the given dispatch table. - * Intended for debugging purposes. - */ -void -_glapi_check_table_not_null(const struct _glapi_table *table) -{ -#ifdef EXTRA_DEBUG /* set to DEBUG for extra DEBUG */ - const GLuint entries = _glapi_get_dispatch_table_size(); - const void **tab = (const void **) table; - GLuint i; - for (i = 1; i < entries; i++) { - assert(tab[i]); - } -#else - (void) table; -#endif -} - - -/** - * Do some spot checks to be sure that the dispatch table - * slots are assigned correctly. For debugging only. - */ -void -_glapi_check_table(const struct _glapi_table *table) -{ -#ifdef EXTRA_DEBUG /* set to DEBUG for extra DEBUG */ - { - GLuint BeginOffset = _glapi_get_proc_offset("glBegin"); - char *BeginFunc = (char*) &table->Begin; - GLuint offset = (BeginFunc - (char *) table) / sizeof(void *); - assert(BeginOffset == offset); - } - { - GLuint viewportOffset = _glapi_get_proc_offset("glViewport"); - char *viewportFunc = (char*) &table->Viewport; - GLuint offset = (viewportFunc - (char *) table) / sizeof(void *); - assert(viewportOffset == offset); - } - { - GLuint VertexPointerOffset = _glapi_get_proc_offset("glVertexPointer"); - char *VertexPointerFunc = (char*) &table->VertexPointer; - GLuint offset = (VertexPointerFunc - (char *) table) / sizeof(void *); - assert(VertexPointerOffset == offset); - } - { - GLuint ResetMinMaxOffset = _glapi_get_proc_offset("glResetMinmax"); - char *ResetMinMaxFunc = (char*) &table->ResetMinmax; - GLuint offset = (ResetMinMaxFunc - (char *) table) / sizeof(void *); - assert(ResetMinMaxOffset == offset); - } - { - GLuint blendColorOffset = _glapi_get_proc_offset("glBlendColor"); - char *blendColorFunc = (char*) &table->BlendColor; - GLuint offset = (blendColorFunc - (char *) table) / sizeof(void *); - assert(blendColorOffset == offset); - } - { - GLuint secondaryColor3fOffset = _glapi_get_proc_offset("glSecondaryColor3fEXT"); - char *secondaryColor3fFunc = (char*) &table->SecondaryColor3fEXT; - GLuint offset = (secondaryColor3fFunc - (char *) table) / sizeof(void *); - assert(secondaryColor3fOffset == offset); - } - { - GLuint pointParameterivOffset = _glapi_get_proc_offset("glPointParameterivNV"); - char *pointParameterivFunc = (char*) &table->PointParameterivNV; - GLuint offset = (pointParameterivFunc - (char *) table) / sizeof(void *); - assert(pointParameterivOffset == offset); - } - { - GLuint setFenceOffset = _glapi_get_proc_offset("glSetFenceNV"); - char *setFenceFunc = (char*) &table->SetFenceNV; - GLuint offset = (setFenceFunc - (char *) table) / sizeof(void *); - assert(setFenceOffset == offset); - } -#else - (void) table; -#endif -} diff -Nru mesa-12.0.6/src/mapi/glapi/glapi.h mesa-17.0.7/src/mapi/glapi/glapi.h --- mesa-12.0.6/src/mapi/glapi/glapi.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/glapi.h 2017-06-01 10:37:10.000000000 +0000 @@ -158,7 +158,7 @@ _glapi_get_proc_name(unsigned int offset); -#ifdef GLX_USE_APPLEGL +#if defined(GLX_USE_APPLEGL) || defined(GLX_USE_WINDOWSGL) _GLAPI_EXPORT struct _glapi_table * _glapi_create_table_from_handle(void *handle, const char *symbol_prefix); #endif diff -Nru mesa-12.0.6/src/mapi/glapi/glapi_mapi_tmp.h mesa-17.0.7/src/mapi/glapi/glapi_mapi_tmp.h --- mesa-12.0.6/src/mapi/glapi/glapi_mapi_tmp.h 2017-01-24 01:42:33.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/glapi_mapi_tmp.h 2017-06-01 10:37:39.000000000 +0000 @@ -1002,9 +1002,13 @@ GLAPI void APIENTRY GLAPI_PREFIX(TexImage2DMultisample)(GLenum target, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations); GLAPI void APIENTRY GLAPI_PREFIX(TexImage3DMultisample)(GLenum target, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedsamplelocations); GLAPI void APIENTRY GLAPI_PREFIX(BlendEquationSeparateiARB)(GLuint buf, GLenum modeRGB, GLenum modeA); +GLAPI void APIENTRY GLAPI_PREFIX(BlendEquationSeparatei)(GLuint buf, GLenum modeRGB, GLenum modeA); GLAPI void APIENTRY GLAPI_PREFIX(BlendEquationiARB)(GLuint buf, GLenum mode); +GLAPI void APIENTRY GLAPI_PREFIX(BlendEquationi)(GLuint buf, GLenum mode); GLAPI void APIENTRY GLAPI_PREFIX(BlendFuncSeparateiARB)(GLuint buf, GLenum srcRGB, GLenum dstRGB, GLenum srcA, GLenum dstA); +GLAPI void APIENTRY GLAPI_PREFIX(BlendFuncSeparatei)(GLuint buf, GLenum sfactorRGB, GLenum dfactorRGB, GLenum sfactorAlpha, GLenum dfactorAlpha); GLAPI void APIENTRY GLAPI_PREFIX(BlendFunciARB)(GLuint buf, GLenum src, GLenum dst); +GLAPI void APIENTRY GLAPI_PREFIX(BlendFunci)(GLuint buf, GLenum sfactor, GLenum dfactor); GLAPI void APIENTRY GLAPI_PREFIX(BindFragDataLocationIndexed)(GLuint program, GLuint colorNumber, GLuint index, const GLchar *name); GLAPI GLint APIENTRY GLAPI_PREFIX(GetFragDataIndex)(GLuint program, const GLchar *name); GLAPI void APIENTRY GLAPI_PREFIX(BindSampler)(GLuint unit, GLuint sampler); @@ -1091,7 +1095,7 @@ void APIENTRY GLAPI_PREFIX(_dispatch_stub_798)(GLenum shadertype, GLint location, GLuint *params); void APIENTRY GLAPI_PREFIX(_dispatch_stub_799)(GLenum shadertype, GLsizei count, const GLuint *indices); void APIENTRY GLAPI_PREFIX(_dispatch_stub_800)(GLenum pname, const GLfloat *values); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_801)(GLenum pname, GLint value); +GLAPI void APIENTRY GLAPI_PREFIX(PatchParameteri)(GLenum pname, GLint value); GLAPI void APIENTRY GLAPI_PREFIX(BindTransformFeedback)(GLenum target, GLuint id); GLAPI void APIENTRY GLAPI_PREFIX(DeleteTransformFeedbacks)(GLsizei n, const GLuint *ids); GLAPI void APIENTRY GLAPI_PREFIX(DrawTransformFeedback)(GLenum mode, GLuint id); @@ -1132,6 +1136,7 @@ GLAPI void APIENTRY GLAPI_PREFIX(ViewportIndexedf)(GLuint index, GLfloat x, GLfloat y, GLfloat w, GLfloat h); GLAPI void APIENTRY GLAPI_PREFIX(ViewportIndexedfv)(GLuint index, const GLfloat *v); GLAPI GLenum APIENTRY GLAPI_PREFIX(GetGraphicsResetStatusARB)(void); +GLAPI GLenum APIENTRY GLAPI_PREFIX(GetGraphicsResetStatus)(void); GLAPI void APIENTRY GLAPI_PREFIX(GetnColorTableARB)(GLenum target, GLenum format, GLenum type, GLsizei bufSize, GLvoid *table); GLAPI void APIENTRY GLAPI_PREFIX(GetnCompressedTexImageARB)(GLenum target, GLint lod, GLsizei bufSize, GLvoid *img); GLAPI void APIENTRY GLAPI_PREFIX(GetnConvolutionFilterARB)(GLenum target, GLenum format, GLenum type, GLsizei bufSize, GLvoid *image); @@ -1148,9 +1153,13 @@ GLAPI void APIENTRY GLAPI_PREFIX(GetnTexImageARB)(GLenum target, GLint level, GLenum format, GLenum type, GLsizei bufSize, GLvoid *img); GLAPI void APIENTRY GLAPI_PREFIX(GetnUniformdvARB)(GLuint program, GLint location, GLsizei bufSize, GLdouble *params); GLAPI void APIENTRY GLAPI_PREFIX(GetnUniformfvARB)(GLuint program, GLint location, GLsizei bufSize, GLfloat *params); +GLAPI void APIENTRY GLAPI_PREFIX(GetnUniformfv)(GLuint program, GLint location, GLsizei bufSize, GLfloat *params); GLAPI void APIENTRY GLAPI_PREFIX(GetnUniformivARB)(GLuint program, GLint location, GLsizei bufSize, GLint *params); +GLAPI void APIENTRY GLAPI_PREFIX(GetnUniformiv)(GLuint program, GLint location, GLsizei bufSize, GLint *params); GLAPI void APIENTRY GLAPI_PREFIX(GetnUniformuivARB)(GLuint program, GLint location, GLsizei bufSize, GLuint *params); +GLAPI void APIENTRY GLAPI_PREFIX(GetnUniformuiv)(GLuint program, GLint location, GLsizei bufSize, GLuint *params); GLAPI void APIENTRY GLAPI_PREFIX(ReadnPixelsARB)(GLint x, GLint y, GLsizei width, GLsizei height, GLenum format, GLenum type, GLsizei bufSize, GLvoid *data); +GLAPI void APIENTRY GLAPI_PREFIX(ReadnPixels)(GLint x, GLint y, GLsizei width, GLsizei height, GLenum format, GLenum type, GLsizei bufSize, GLvoid *data); GLAPI void APIENTRY GLAPI_PREFIX(DrawArraysInstancedBaseInstance)(GLenum mode, GLint first, GLsizei count, GLsizei primcount, GLuint baseinstance); GLAPI void APIENTRY GLAPI_PREFIX(DrawElementsInstancedBaseInstance)(GLenum mode, GLsizei count, GLenum type, const GLvoid *indices, GLsizei primcount, GLuint baseinstance); GLAPI void APIENTRY GLAPI_PREFIX(DrawElementsInstancedBaseVertexBaseInstance)(GLenum mode, GLsizei count, GLenum type, const GLvoid *indices, GLsizei primcount, GLint basevertex, GLuint baseinstance); @@ -1202,134 +1211,135 @@ GLAPI void APIENTRY GLAPI_PREFIX(BindSamplers)(GLuint first, GLsizei count, const GLuint *samplers); GLAPI void APIENTRY GLAPI_PREFIX(BindTextures)(GLuint first, GLsizei count, const GLuint *textures); GLAPI void APIENTRY GLAPI_PREFIX(BindVertexBuffers)(GLuint first, GLsizei count, const GLuint *buffers, const GLintptr *offsets, const GLsizei *strides); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_912)(GLenum mode, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_913)(GLenum mode, GLenum type, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_914)(GLenum origin, GLenum depth); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_915)(GLuint unit, GLuint texture); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_916)(GLuint readFramebuffer, GLuint drawFramebuffer, GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter); -GLenum APIENTRY GLAPI_PREFIX(_dispatch_stub_917)(GLuint framebuffer, GLenum target); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_918)(GLuint buffer, GLenum internalformat, GLenum format, GLenum type, const GLvoid *data); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_919)(GLuint buffer, GLenum internalformat, GLintptr offset, GLsizeiptr size, GLenum format, GLenum type, const GLvoid *data); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_920)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, GLfloat depth, GLint stencil); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_921)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLfloat *value); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_922)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLint *value); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_923)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLuint *value); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_924)(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLsizei imageSize, const GLvoid *data); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_925)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const GLvoid *data); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_926)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid *data); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_927)(GLuint readBuffer, GLuint writeBuffer, GLintptr readOffset, GLintptr writeOffset, GLsizeiptr size); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_928)(GLuint texture, GLint level, GLint xoffset, GLint x, GLint y, GLsizei width); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_929)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_930)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_931)(GLsizei n, GLuint *buffers); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_932)(GLsizei n, GLuint *framebuffers); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_933)(GLsizei n, GLuint *pipelines); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_934)(GLenum target, GLsizei n, GLuint *ids); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_935)(GLsizei n, GLuint *renderbuffers); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_936)(GLsizei n, GLuint *samplers); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_937)(GLenum target, GLsizei n, GLuint *textures); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_938)(GLsizei n, GLuint *ids); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_939)(GLsizei n, GLuint *arrays); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_940)(GLuint vaobj, GLuint index); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_912)(GLuint num_groups_x, GLuint num_groups_y, GLuint num_groups_z, GLuint group_size_x, GLuint group_size_y, GLuint group_size_z); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_913)(GLenum mode, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_914)(GLenum mode, GLenum type, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_915)(GLenum origin, GLenum depth); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_916)(GLuint unit, GLuint texture); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_917)(GLuint readFramebuffer, GLuint drawFramebuffer, GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter); +GLenum APIENTRY GLAPI_PREFIX(_dispatch_stub_918)(GLuint framebuffer, GLenum target); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_919)(GLuint buffer, GLenum internalformat, GLenum format, GLenum type, const GLvoid *data); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_920)(GLuint buffer, GLenum internalformat, GLintptr offset, GLsizeiptr size, GLenum format, GLenum type, const GLvoid *data); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_921)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, GLfloat depth, GLint stencil); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_922)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLfloat *value); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_923)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLint *value); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_924)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLuint *value); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_925)(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLsizei imageSize, const GLvoid *data); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_926)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const GLvoid *data); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_927)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid *data); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_928)(GLuint readBuffer, GLuint writeBuffer, GLintptr readOffset, GLintptr writeOffset, GLsizeiptr size); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_929)(GLuint texture, GLint level, GLint xoffset, GLint x, GLint y, GLsizei width); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_930)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_931)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_932)(GLsizei n, GLuint *buffers); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_933)(GLsizei n, GLuint *framebuffers); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_934)(GLsizei n, GLuint *pipelines); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_935)(GLenum target, GLsizei n, GLuint *ids); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_936)(GLsizei n, GLuint *renderbuffers); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_937)(GLsizei n, GLuint *samplers); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_938)(GLenum target, GLsizei n, GLuint *textures); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_939)(GLsizei n, GLuint *ids); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_940)(GLsizei n, GLuint *arrays); void APIENTRY GLAPI_PREFIX(_dispatch_stub_941)(GLuint vaobj, GLuint index); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_942)(GLuint buffer, GLintptr offset, GLsizeiptr length); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_943)(GLuint texture); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_944)(GLuint texture, GLint level, GLsizei bufSize, GLvoid *pixels); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_945)(GLuint buffer, GLenum pname, GLint64 *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_946)(GLuint buffer, GLenum pname, GLint *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_947)(GLuint buffer, GLenum pname, GLvoid **params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_948)(GLuint buffer, GLintptr offset, GLsizeiptr size, GLvoid *data); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_949)(GLuint framebuffer, GLenum attachment, GLenum pname, GLint *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_950)(GLuint framebuffer, GLenum pname, GLint *param); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_951)(GLuint renderbuffer, GLenum pname, GLint *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_952)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_942)(GLuint vaobj, GLuint index); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_943)(GLuint buffer, GLintptr offset, GLsizeiptr length); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_944)(GLuint texture); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_945)(GLuint texture, GLint level, GLsizei bufSize, GLvoid *pixels); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_946)(GLuint buffer, GLenum pname, GLint64 *params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_947)(GLuint buffer, GLenum pname, GLint *params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_948)(GLuint buffer, GLenum pname, GLvoid **params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_949)(GLuint buffer, GLintptr offset, GLsizeiptr size, GLvoid *data); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_950)(GLuint framebuffer, GLenum attachment, GLenum pname, GLint *params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_951)(GLuint framebuffer, GLenum pname, GLint *param); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_952)(GLuint renderbuffer, GLenum pname, GLint *params); void APIENTRY GLAPI_PREFIX(_dispatch_stub_953)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); void APIENTRY GLAPI_PREFIX(_dispatch_stub_954)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); void APIENTRY GLAPI_PREFIX(_dispatch_stub_955)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_956)(GLuint texture, GLint level, GLenum format, GLenum type, GLsizei bufSize, GLvoid *pixels); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_957)(GLuint texture, GLint level, GLenum pname, GLfloat *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_958)(GLuint texture, GLint level, GLenum pname, GLint *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_959)(GLuint texture, GLenum pname, GLint *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_960)(GLuint texture, GLenum pname, GLuint *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_961)(GLuint texture, GLenum pname, GLfloat *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_962)(GLuint texture, GLenum pname, GLint *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_963)(GLuint xfb, GLenum pname, GLuint index, GLint64 *param); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_964)(GLuint xfb, GLenum pname, GLuint index, GLint *param); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_965)(GLuint xfb, GLenum pname, GLint *param); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_966)(GLuint vaobj, GLuint index, GLenum pname, GLint64 *param); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_967)(GLuint vaobj, GLuint index, GLenum pname, GLint *param); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_968)(GLuint vaobj, GLenum pname, GLint *param); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_969)(GLuint framebuffer, GLsizei numAttachments, const GLenum *attachments); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_970)(GLuint framebuffer, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height); -GLvoid * APIENTRY GLAPI_PREFIX(_dispatch_stub_971)(GLuint buffer, GLenum access); -GLvoid * APIENTRY GLAPI_PREFIX(_dispatch_stub_972)(GLuint buffer, GLintptr offset, GLsizeiptr length, GLbitfield access); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_973)(GLuint buffer, GLsizeiptr size, const GLvoid *data, GLenum usage); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_974)(GLuint buffer, GLsizeiptr size, const GLvoid *data, GLbitfield flags); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_975)(GLuint buffer, GLintptr offset, GLsizeiptr size, const GLvoid *data); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_976)(GLuint framebuffer, GLenum buf); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_977)(GLuint framebuffer, GLsizei n, const GLenum *bufs); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_978)(GLuint framebuffer, GLenum pname, GLint param); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_979)(GLuint framebuffer, GLenum buf); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_980)(GLuint framebuffer, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_981)(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_982)(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level, GLint layer); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_983)(GLuint renderbuffer, GLenum internalformat, GLsizei width, GLsizei height); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_984)(GLuint renderbuffer, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_985)(GLuint texture, GLenum internalformat, GLuint buffer); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_986)(GLuint texture, GLenum internalformat, GLuint buffer, GLintptr offset, GLsizeiptr size); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_987)(GLuint texture, GLenum pname, const GLint *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_988)(GLuint texture, GLenum pname, const GLuint *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_989)(GLuint texture, GLenum pname, GLfloat param); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_990)(GLuint texture, GLenum pname, const GLfloat *param); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_991)(GLuint texture, GLenum pname, GLint param); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_992)(GLuint texture, GLenum pname, const GLint *param); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_993)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_994)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_995)(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_996)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_997)(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedsamplelocations); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_998)(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLenum type, const GLvoid *pixels); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_999)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid *pixels); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1000)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid *pixels); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1001)(GLuint xfb, GLuint index, GLuint buffer); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1002)(GLuint xfb, GLuint index, GLuint buffer, GLintptr offset, GLsizeiptr size); -GLboolean APIENTRY GLAPI_PREFIX(_dispatch_stub_1003)(GLuint buffer); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1004)(GLuint vaobj, GLuint attribindex, GLuint bindingindex); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1005)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLboolean normalized, GLuint relativeoffset); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1006)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_956)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_957)(GLuint texture, GLint level, GLenum format, GLenum type, GLsizei bufSize, GLvoid *pixels); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_958)(GLuint texture, GLint level, GLenum pname, GLfloat *params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_959)(GLuint texture, GLint level, GLenum pname, GLint *params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_960)(GLuint texture, GLenum pname, GLint *params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_961)(GLuint texture, GLenum pname, GLuint *params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_962)(GLuint texture, GLenum pname, GLfloat *params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_963)(GLuint texture, GLenum pname, GLint *params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_964)(GLuint xfb, GLenum pname, GLuint index, GLint64 *param); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_965)(GLuint xfb, GLenum pname, GLuint index, GLint *param); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_966)(GLuint xfb, GLenum pname, GLint *param); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_967)(GLuint vaobj, GLuint index, GLenum pname, GLint64 *param); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_968)(GLuint vaobj, GLuint index, GLenum pname, GLint *param); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_969)(GLuint vaobj, GLenum pname, GLint *param); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_970)(GLuint framebuffer, GLsizei numAttachments, const GLenum *attachments); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_971)(GLuint framebuffer, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height); +GLvoid * APIENTRY GLAPI_PREFIX(_dispatch_stub_972)(GLuint buffer, GLenum access); +GLvoid * APIENTRY GLAPI_PREFIX(_dispatch_stub_973)(GLuint buffer, GLintptr offset, GLsizeiptr length, GLbitfield access); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_974)(GLuint buffer, GLsizeiptr size, const GLvoid *data, GLenum usage); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_975)(GLuint buffer, GLsizeiptr size, const GLvoid *data, GLbitfield flags); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_976)(GLuint buffer, GLintptr offset, GLsizeiptr size, const GLvoid *data); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_977)(GLuint framebuffer, GLenum buf); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_978)(GLuint framebuffer, GLsizei n, const GLenum *bufs); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_979)(GLuint framebuffer, GLenum pname, GLint param); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_980)(GLuint framebuffer, GLenum buf); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_981)(GLuint framebuffer, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_982)(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_983)(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level, GLint layer); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_984)(GLuint renderbuffer, GLenum internalformat, GLsizei width, GLsizei height); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_985)(GLuint renderbuffer, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_986)(GLuint texture, GLenum internalformat, GLuint buffer); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_987)(GLuint texture, GLenum internalformat, GLuint buffer, GLintptr offset, GLsizeiptr size); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_988)(GLuint texture, GLenum pname, const GLint *params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_989)(GLuint texture, GLenum pname, const GLuint *params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_990)(GLuint texture, GLenum pname, GLfloat param); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_991)(GLuint texture, GLenum pname, const GLfloat *param); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_992)(GLuint texture, GLenum pname, GLint param); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_993)(GLuint texture, GLenum pname, const GLint *param); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_994)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_995)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_996)(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_997)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_998)(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedsamplelocations); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_999)(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLenum type, const GLvoid *pixels); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1000)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid *pixels); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1001)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid *pixels); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1002)(GLuint xfb, GLuint index, GLuint buffer); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1003)(GLuint xfb, GLuint index, GLuint buffer, GLintptr offset, GLsizeiptr size); +GLboolean APIENTRY GLAPI_PREFIX(_dispatch_stub_1004)(GLuint buffer); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1005)(GLuint vaobj, GLuint attribindex, GLuint bindingindex); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1006)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLboolean normalized, GLuint relativeoffset); void APIENTRY GLAPI_PREFIX(_dispatch_stub_1007)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1008)(GLuint vaobj, GLuint bindingindex, GLuint divisor); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1009)(GLuint vaobj, GLuint buffer); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1010)(GLuint vaobj, GLuint bindingindex, GLuint buffer, GLintptr offset, GLsizei stride); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1011)(GLuint vaobj, GLuint first, GLsizei count, const GLuint *buffers, const GLintptr *offsets, const GLsizei *strides); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1012)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLsizei bufSize, GLvoid *pixels); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1013)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, GLsizei bufSize, GLvoid *pixels); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1008)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1009)(GLuint vaobj, GLuint bindingindex, GLuint divisor); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1010)(GLuint vaobj, GLuint buffer); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1011)(GLuint vaobj, GLuint bindingindex, GLuint buffer, GLintptr offset, GLsizei stride); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1012)(GLuint vaobj, GLuint first, GLsizei count, const GLuint *buffers, const GLintptr *offsets, const GLsizei *strides); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1013)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLsizei bufSize, GLvoid *pixels); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1014)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, GLsizei bufSize, GLvoid *pixels); GLAPI void APIENTRY GLAPI_PREFIX(InvalidateBufferData)(GLuint buffer); GLAPI void APIENTRY GLAPI_PREFIX(InvalidateBufferSubData)(GLuint buffer, GLintptr offset, GLsizeiptr length); GLAPI void APIENTRY GLAPI_PREFIX(InvalidateFramebuffer)(GLenum target, GLsizei numAttachments, const GLenum *attachments); GLAPI void APIENTRY GLAPI_PREFIX(InvalidateSubFramebuffer)(GLenum target, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height); GLAPI void APIENTRY GLAPI_PREFIX(InvalidateTexImage)(GLuint texture, GLint level); GLAPI void APIENTRY GLAPI_PREFIX(InvalidateTexSubImage)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1020)(GLfloat factor, GLfloat bias); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1021)(GLfloat x, GLfloat y, GLfloat z, GLfloat width, GLfloat height); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1022)(const GLfloat *coords); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1023)(GLint x, GLint y, GLint z, GLint width, GLint height); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1024)(const GLint *coords); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1025)(GLshort x, GLshort y, GLshort z, GLshort width, GLshort height); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1026)(const GLshort *coords); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1027)(GLfixed x, GLfixed y, GLfixed z, GLfixed width, GLfixed height); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1028)(const GLfixed *coords); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1021)(GLfloat factor, GLfloat bias); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1022)(GLfloat x, GLfloat y, GLfloat z, GLfloat width, GLfloat height); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1023)(const GLfloat *coords); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1024)(GLint x, GLint y, GLint z, GLint width, GLint height); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1025)(const GLint *coords); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1026)(GLshort x, GLshort y, GLshort z, GLshort width, GLshort height); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1027)(const GLshort *coords); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1028)(GLfixed x, GLfixed y, GLfixed z, GLfixed width, GLfixed height); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1029)(const GLfixed *coords); GLAPI void APIENTRY GLAPI_PREFIX(PointSizePointerOES)(GLenum type, GLsizei stride, const GLvoid *pointer); -GLbitfield APIENTRY GLAPI_PREFIX(_dispatch_stub_1030)(GLfixed *mantissa, GLint *exponent); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1031)(GLclampf value, GLboolean invert); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1032)(GLenum pattern); +GLbitfield APIENTRY GLAPI_PREFIX(_dispatch_stub_1031)(GLfixed *mantissa, GLint *exponent); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1032)(GLclampf value, GLboolean invert); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1033)(GLenum pattern); GLAPI void APIENTRY GLAPI_PREFIX(ColorPointerEXT)(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); GLAPI void APIENTRY GLAPI_PREFIX(EdgeFlagPointerEXT)(GLsizei stride, GLsizei count, const GLboolean *pointer); GLAPI void APIENTRY GLAPI_PREFIX(IndexPointerEXT)(GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); GLAPI void APIENTRY GLAPI_PREFIX(NormalPointerEXT)(GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); GLAPI void APIENTRY GLAPI_PREFIX(TexCoordPointerEXT)(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); GLAPI void APIENTRY GLAPI_PREFIX(VertexPointerEXT)(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1039)(GLenum target, GLsizei numAttachments, const GLenum *attachments); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1040)(GLenum target, GLsizei numAttachments, const GLenum *attachments); GLAPI void APIENTRY GLAPI_PREFIX(ActiveShaderProgram)(GLuint pipeline, GLuint program); GLAPI void APIENTRY GLAPI_PREFIX(BindProgramPipeline)(GLuint pipeline); GLAPI GLuint APIENTRY GLAPI_PREFIX(CreateShaderProgramv)(GLenum type, GLsizei count, const GLchar * const *strings); @@ -1339,55 +1349,55 @@ GLAPI void APIENTRY GLAPI_PREFIX(GetProgramPipelineiv)(GLuint pipeline, GLenum pname, GLint *params); GLAPI GLboolean APIENTRY GLAPI_PREFIX(IsProgramPipeline)(GLuint pipeline); GLAPI void APIENTRY GLAPI_PREFIX(LockArraysEXT)(GLint first, GLsizei count); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1049)(GLuint program, GLint location, GLdouble x); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1050)(GLuint program, GLint location, GLsizei count, const GLdouble *value); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1050)(GLuint program, GLint location, GLdouble x); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1051)(GLuint program, GLint location, GLsizei count, const GLdouble *value); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform1f)(GLuint program, GLint location, GLfloat x); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform1fv)(GLuint program, GLint location, GLsizei count, const GLfloat *value); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform1i)(GLuint program, GLint location, GLint x); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform1iv)(GLuint program, GLint location, GLsizei count, const GLint *value); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform1ui)(GLuint program, GLint location, GLuint x); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform1uiv)(GLuint program, GLint location, GLsizei count, const GLuint *value); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1057)(GLuint program, GLint location, GLdouble x, GLdouble y); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1058)(GLuint program, GLint location, GLsizei count, const GLdouble *value); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1058)(GLuint program, GLint location, GLdouble x, GLdouble y); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1059)(GLuint program, GLint location, GLsizei count, const GLdouble *value); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform2f)(GLuint program, GLint location, GLfloat x, GLfloat y); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform2fv)(GLuint program, GLint location, GLsizei count, const GLfloat *value); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform2i)(GLuint program, GLint location, GLint x, GLint y); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform2iv)(GLuint program, GLint location, GLsizei count, const GLint *value); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform2ui)(GLuint program, GLint location, GLuint x, GLuint y); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform2uiv)(GLuint program, GLint location, GLsizei count, const GLuint *value); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1065)(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1066)(GLuint program, GLint location, GLsizei count, const GLdouble *value); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1066)(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1067)(GLuint program, GLint location, GLsizei count, const GLdouble *value); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform3f)(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform3fv)(GLuint program, GLint location, GLsizei count, const GLfloat *value); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform3i)(GLuint program, GLint location, GLint x, GLint y, GLint z); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform3iv)(GLuint program, GLint location, GLsizei count, const GLint *value); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform3ui)(GLuint program, GLint location, GLuint x, GLuint y, GLuint z); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform3uiv)(GLuint program, GLint location, GLsizei count, const GLuint *value); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1073)(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z, GLdouble w); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1074)(GLuint program, GLint location, GLsizei count, const GLdouble *value); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1074)(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z, GLdouble w); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1075)(GLuint program, GLint location, GLsizei count, const GLdouble *value); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform4f)(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z, GLfloat w); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform4fv)(GLuint program, GLint location, GLsizei count, const GLfloat *value); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform4i)(GLuint program, GLint location, GLint x, GLint y, GLint z, GLint w); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform4iv)(GLuint program, GLint location, GLsizei count, const GLint *value); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform4ui)(GLuint program, GLint location, GLuint x, GLuint y, GLuint z, GLuint w); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform4uiv)(GLuint program, GLint location, GLsizei count, const GLuint *value); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1081)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1082)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniformMatrix2fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1083)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1084)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniformMatrix2x3fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1085)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1086)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniformMatrix2x4fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1087)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1088)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniformMatrix3fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1089)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1090)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniformMatrix3x2fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1091)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1092)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniformMatrix3x4fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1093)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1094)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniformMatrix4fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1095)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1096)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniformMatrix4x2fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1097)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1098)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniformMatrix4x3fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); GLAPI void APIENTRY GLAPI_PREFIX(UnlockArraysEXT)(void); GLAPI void APIENTRY GLAPI_PREFIX(UseProgramStages)(GLuint pipeline, GLbitfield stages, GLuint program); @@ -1416,109 +1426,111 @@ GLAPI void APIENTRY GLAPI_PREFIX(FogCoordf)(GLfloat coord); GLAPI void APIENTRY GLAPI_PREFIX(FogCoordfvEXT)(const GLfloat *coord); GLAPI void APIENTRY GLAPI_PREFIX(FogCoordfv)(const GLfloat *coord); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1117)(void); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1118)(GLdouble x, GLdouble y, GLdouble z, GLdouble w); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1119)(const GLdouble *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1120)(GLfloat x, GLfloat y, GLfloat z, GLfloat w); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1121)(const GLfloat *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1122)(GLint x, GLint y, GLint z, GLint w); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1123)(const GLint *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1124)(GLshort x, GLshort y, GLshort z, GLshort w); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1125)(const GLshort *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1126)(const GLenum *mode, const GLint *first, const GLsizei *count, GLsizei primcount, GLint modestride); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1127)(const GLenum *mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount, GLint modestride); -GLboolean APIENTRY GLAPI_PREFIX(_dispatch_stub_1128)(GLsizei n, const GLuint *ids, GLboolean *residences); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1129)(GLenum target, GLuint id, const GLfloat *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1130)(GLenum target, GLuint index, GLenum pname, GLdouble *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1131)(GLenum target, GLuint index, GLenum pname, GLfloat *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1132)(GLuint id, GLenum pname, GLubyte *program); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1133)(GLuint id, GLenum pname, GLint *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1134)(GLenum target, GLuint address, GLenum pname, GLint *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1135)(GLuint index, GLenum pname, GLdouble *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1136)(GLuint index, GLenum pname, GLfloat *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1137)(GLuint index, GLenum pname, GLint *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1138)(GLenum target, GLuint id, GLsizei len, const GLubyte *program); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1139)(GLenum target, GLuint index, GLsizei num, const GLdouble *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1140)(GLenum target, GLuint index, GLsizei num, const GLfloat *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1141)(GLsizei n, const GLuint *ids); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1142)(GLenum target, GLuint address, GLenum matrix, GLenum transform); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1143)(GLuint index, GLdouble x); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1144)(GLuint index, const GLdouble *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1145)(GLuint index, GLfloat x); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1146)(GLuint index, const GLfloat *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1147)(GLuint index, GLshort x); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1148)(GLuint index, const GLshort *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1149)(GLuint index, GLdouble x, GLdouble y); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1150)(GLuint index, const GLdouble *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1151)(GLuint index, GLfloat x, GLfloat y); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1152)(GLuint index, const GLfloat *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1153)(GLuint index, GLshort x, GLshort y); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1154)(GLuint index, const GLshort *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1155)(GLuint index, GLdouble x, GLdouble y, GLdouble z); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1156)(GLuint index, const GLdouble *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1157)(GLuint index, GLfloat x, GLfloat y, GLfloat z); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1158)(GLuint index, const GLfloat *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1159)(GLuint index, GLshort x, GLshort y, GLshort z); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1160)(GLuint index, const GLshort *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1161)(GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1162)(GLuint index, const GLdouble *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1163)(GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1164)(GLuint index, const GLfloat *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1165)(GLuint index, GLshort x, GLshort y, GLshort z, GLshort w); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1166)(GLuint index, const GLshort *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1167)(GLuint index, GLubyte x, GLubyte y, GLubyte z, GLubyte w); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1168)(GLuint index, const GLubyte *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1169)(GLuint index, GLint size, GLenum type, GLsizei stride, const GLvoid *pointer); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1170)(GLuint index, GLsizei n, const GLdouble *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1171)(GLuint index, GLsizei n, const GLfloat *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1172)(GLuint index, GLsizei n, const GLshort *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1173)(GLuint index, GLsizei n, const GLdouble *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1174)(GLuint index, GLsizei n, const GLfloat *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1175)(GLuint index, GLsizei n, const GLshort *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1176)(GLuint index, GLsizei n, const GLdouble *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1177)(GLuint index, GLsizei n, const GLfloat *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1178)(GLuint index, GLsizei n, const GLshort *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1179)(GLuint index, GLsizei n, const GLdouble *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1180)(GLuint index, GLsizei n, const GLfloat *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1181)(GLuint index, GLsizei n, const GLshort *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1182)(GLuint index, GLsizei n, const GLubyte *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1183)(GLenum pname, GLfloat *param); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1184)(GLenum pname, GLint *param); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1185)(GLenum pname, const GLfloat *param); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1186)(GLenum pname, const GLint *param); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1187)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1188)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1189)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1190)(void); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1191)(GLuint id); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1192)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1193)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1194)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1195)(GLuint id); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1196)(void); -GLuint APIENTRY GLAPI_PREFIX(_dispatch_stub_1197)(GLuint range); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1198)(GLuint dst, GLuint coord, GLenum swizzle); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1199)(GLuint dst, GLuint interp, GLenum swizzle); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1200)(GLuint dst, const GLfloat *value); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1201)(GLenum face); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1202)(GLuint array); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1203)(GLsizei n, GLuint *arrays); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1204)(GLuint id, GLsizei len, const GLubyte *name, GLdouble *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1205)(GLuint id, GLsizei len, const GLubyte *name, GLfloat *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1206)(GLuint id, GLsizei len, const GLubyte *name, GLdouble x, GLdouble y, GLdouble z, GLdouble w); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1207)(GLuint id, GLsizei len, const GLubyte *name, const GLdouble *v); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1208)(GLuint id, GLsizei len, const GLubyte *name, GLfloat x, GLfloat y, GLfloat z, GLfloat w); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1209)(GLuint id, GLsizei len, const GLubyte *name, const GLfloat *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1118)(void); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1119)(GLdouble x, GLdouble y, GLdouble z, GLdouble w); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1120)(const GLdouble *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1121)(GLfloat x, GLfloat y, GLfloat z, GLfloat w); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1122)(const GLfloat *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1123)(GLint x, GLint y, GLint z, GLint w); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1124)(const GLint *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1125)(GLshort x, GLshort y, GLshort z, GLshort w); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1126)(const GLshort *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1127)(const GLenum *mode, const GLint *first, const GLsizei *count, GLsizei primcount, GLint modestride); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1128)(const GLenum *mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount, GLint modestride); +GLboolean APIENTRY GLAPI_PREFIX(_dispatch_stub_1129)(GLsizei n, const GLuint *ids, GLboolean *residences); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1130)(GLenum target, GLuint id, const GLfloat *params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1131)(GLenum target, GLuint index, GLenum pname, GLdouble *params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1132)(GLenum target, GLuint index, GLenum pname, GLfloat *params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1133)(GLuint id, GLenum pname, GLubyte *program); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1134)(GLuint id, GLenum pname, GLint *params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1135)(GLenum target, GLuint address, GLenum pname, GLint *params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1136)(GLuint index, GLenum pname, GLdouble *params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1137)(GLuint index, GLenum pname, GLfloat *params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1138)(GLuint index, GLenum pname, GLint *params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1139)(GLenum target, GLuint id, GLsizei len, const GLubyte *program); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1140)(GLenum target, GLuint index, GLsizei num, const GLdouble *params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1141)(GLenum target, GLuint index, GLsizei num, const GLfloat *params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1142)(GLsizei n, const GLuint *ids); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1143)(GLenum target, GLuint address, GLenum matrix, GLenum transform); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1144)(GLuint index, GLdouble x); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1145)(GLuint index, const GLdouble *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1146)(GLuint index, GLfloat x); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1147)(GLuint index, const GLfloat *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1148)(GLuint index, GLshort x); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1149)(GLuint index, const GLshort *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1150)(GLuint index, GLdouble x, GLdouble y); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1151)(GLuint index, const GLdouble *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1152)(GLuint index, GLfloat x, GLfloat y); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1153)(GLuint index, const GLfloat *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1154)(GLuint index, GLshort x, GLshort y); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1155)(GLuint index, const GLshort *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1156)(GLuint index, GLdouble x, GLdouble y, GLdouble z); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1157)(GLuint index, const GLdouble *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1158)(GLuint index, GLfloat x, GLfloat y, GLfloat z); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1159)(GLuint index, const GLfloat *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1160)(GLuint index, GLshort x, GLshort y, GLshort z); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1161)(GLuint index, const GLshort *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1162)(GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1163)(GLuint index, const GLdouble *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1164)(GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1165)(GLuint index, const GLfloat *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1166)(GLuint index, GLshort x, GLshort y, GLshort z, GLshort w); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1167)(GLuint index, const GLshort *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1168)(GLuint index, GLubyte x, GLubyte y, GLubyte z, GLubyte w); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1169)(GLuint index, const GLubyte *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1170)(GLuint index, GLint size, GLenum type, GLsizei stride, const GLvoid *pointer); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1171)(GLuint index, GLsizei n, const GLdouble *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1172)(GLuint index, GLsizei n, const GLfloat *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1173)(GLuint index, GLsizei n, const GLshort *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1174)(GLuint index, GLsizei n, const GLdouble *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1175)(GLuint index, GLsizei n, const GLfloat *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1176)(GLuint index, GLsizei n, const GLshort *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1177)(GLuint index, GLsizei n, const GLdouble *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1178)(GLuint index, GLsizei n, const GLfloat *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1179)(GLuint index, GLsizei n, const GLshort *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1180)(GLuint index, GLsizei n, const GLdouble *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1181)(GLuint index, GLsizei n, const GLfloat *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1182)(GLuint index, GLsizei n, const GLshort *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1183)(GLuint index, GLsizei n, const GLubyte *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1184)(GLenum pname, GLfloat *param); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1185)(GLenum pname, GLint *param); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1186)(GLenum pname, const GLfloat *param); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1187)(GLenum pname, const GLint *param); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1188)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1189)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1190)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1191)(void); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1192)(GLuint id); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1193)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1194)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1195)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1196)(GLuint id); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1197)(void); +GLuint APIENTRY GLAPI_PREFIX(_dispatch_stub_1198)(GLuint range); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1199)(GLuint dst, GLuint coord, GLenum swizzle); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1200)(GLuint dst, GLuint interp, GLenum swizzle); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1201)(GLuint dst, const GLfloat *value); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1202)(GLuint first, GLsizei count, const GLfloat *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1203)(GLuint index, GLfloat n, GLfloat f); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1204)(GLenum face); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1205)(GLuint array); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1206)(GLsizei n, GLuint *arrays); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1207)(GLuint id, GLsizei len, const GLubyte *name, GLdouble *params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1208)(GLuint id, GLsizei len, const GLubyte *name, GLfloat *params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1209)(GLuint id, GLsizei len, const GLubyte *name, GLdouble x, GLdouble y, GLdouble z, GLdouble w); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1210)(GLuint id, GLsizei len, const GLubyte *name, const GLdouble *v); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1211)(GLuint id, GLsizei len, const GLubyte *name, GLfloat x, GLfloat y, GLfloat z, GLfloat w); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1212)(GLuint id, GLsizei len, const GLubyte *name, const GLfloat *v); GLAPI void APIENTRY GLAPI_PREFIX(PrimitiveRestartNV)(void); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1211)(GLenum coord, GLenum pname, GLfixed *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1212)(GLenum coord, GLenum pname, GLint param); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1213)(GLenum coord, GLenum pname, const GLfixed *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1214)(GLclampd zmin, GLclampd zmax); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1214)(GLenum coord, GLenum pname, GLfixed *params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1215)(GLenum coord, GLenum pname, GLint param); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1216)(GLenum coord, GLenum pname, const GLfixed *params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1217)(GLclampd zmin, GLclampd zmax); GLAPI void APIENTRY GLAPI_PREFIX(BindFramebufferEXT)(GLenum target, GLuint framebuffer); GLAPI void APIENTRY GLAPI_PREFIX(BindRenderbufferEXT)(GLenum target, GLuint renderbuffer); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1217)(GLsizei len, const GLvoid *string); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1218)(GLenum target, GLenum pname, GLint param); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1219)(GLenum target, GLintptr offset, GLsizeiptr size); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1220)(GLsizei len, const GLvoid *string); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1221)(GLenum target, GLenum pname, GLint param); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1222)(GLenum target, GLintptr offset, GLsizeiptr size); GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI1iEXT)(GLuint index, GLint x); GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI1i)(GLuint index, GLint x); GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI1uiEXT)(GLuint index, GLuint x); @@ -1549,51 +1561,52 @@ GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI4uiv)(GLuint index, const GLuint *v); GLAPI void APIENTRY GLAPI_PREFIX(ClearColorIiEXT)(GLint r, GLint g, GLint b, GLint a); GLAPI void APIENTRY GLAPI_PREFIX(ClearColorIuiEXT)(GLuint r, GLuint g, GLuint b, GLuint a); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1236)(GLenum target, GLuint index, GLuint buffer, GLintptr offset); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1237)(GLuint monitor); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1238)(GLsizei n, GLuint *monitors); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1239)(GLuint monitor); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1240)(GLsizei n, GLuint *monitors); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1241)(GLuint monitor, GLenum pname, GLsizei dataSize, GLuint *data, GLint *bytesWritten); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1242)(GLuint group, GLuint counter, GLenum pname, GLvoid *data); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1243)(GLuint group, GLuint counter, GLsizei bufSize, GLsizei *length, GLchar *counterString); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1244)(GLuint group, GLint *numCounters, GLint *maxActiveCounters, GLsizei countersSize, GLuint *counters); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1245)(GLuint group, GLsizei bufSize, GLsizei *length, GLchar *groupString); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1246)(GLint *numGroups, GLsizei groupsSize, GLuint *groups); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1247)(GLuint monitor, GLboolean enable, GLuint group, GLint numCounters, GLuint *counterList); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1248)(GLenum objectType, GLuint name, GLenum pname, GLint *value); -GLenum APIENTRY GLAPI_PREFIX(_dispatch_stub_1249)(GLenum objectType, GLuint name, GLenum option); -GLenum APIENTRY GLAPI_PREFIX(_dispatch_stub_1250)(GLenum objectType, GLuint name, GLenum option); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1251)(GLuint program); -GLuint APIENTRY GLAPI_PREFIX(_dispatch_stub_1252)(GLenum type, const GLchar *string); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1253)(GLenum type, GLuint program); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1239)(GLenum target, GLuint index, GLuint buffer, GLintptr offset); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1240)(GLuint monitor); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1241)(GLsizei n, GLuint *monitors); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1242)(GLuint monitor); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1243)(GLsizei n, GLuint *monitors); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1244)(GLuint monitor, GLenum pname, GLsizei dataSize, GLuint *data, GLint *bytesWritten); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1245)(GLuint group, GLuint counter, GLenum pname, GLvoid *data); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1246)(GLuint group, GLuint counter, GLsizei bufSize, GLsizei *length, GLchar *counterString); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1247)(GLuint group, GLint *numCounters, GLint *maxActiveCounters, GLsizei countersSize, GLuint *counters); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1248)(GLuint group, GLsizei bufSize, GLsizei *length, GLchar *groupString); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1249)(GLint *numGroups, GLsizei groupsSize, GLuint *groups); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1250)(GLuint monitor, GLboolean enable, GLuint group, GLint numCounters, GLuint *counterList); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1251)(GLenum objectType, GLuint name, GLenum pname, GLint *value); +GLenum APIENTRY GLAPI_PREFIX(_dispatch_stub_1252)(GLenum objectType, GLuint name, GLenum option); +GLenum APIENTRY GLAPI_PREFIX(_dispatch_stub_1253)(GLenum objectType, GLuint name, GLenum option); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1254)(GLuint program); +GLuint APIENTRY GLAPI_PREFIX(_dispatch_stub_1255)(GLenum type, const GLchar *string); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1256)(GLenum type, GLuint program); GLAPI void APIENTRY GLAPI_PREFIX(TextureBarrierNV)(void); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1255)(void); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1256)(GLintptr surface, GLenum pname, GLsizei bufSize, GLsizei *length, GLint *values); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1257)(const GLvoid *vdpDevice, const GLvoid *getProcAddress); -GLboolean APIENTRY GLAPI_PREFIX(_dispatch_stub_1258)(GLintptr surface); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1259)(GLsizei numSurfaces, const GLintptr *surfaces); -GLintptr APIENTRY GLAPI_PREFIX(_dispatch_stub_1260)(const GLvoid *vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint *textureNames); -GLintptr APIENTRY GLAPI_PREFIX(_dispatch_stub_1261)(const GLvoid *vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint *textureNames); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1262)(GLintptr surface, GLenum access); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1263)(GLsizei numSurfaces, const GLintptr *surfaces); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1264)(GLintptr surface); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1265)(GLuint queryHandle); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1266)(GLuint queryId, GLuint *queryHandle); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1267)(GLuint queryHandle); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1258)(void); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1259)(GLintptr surface, GLenum pname, GLsizei bufSize, GLsizei *length, GLint *values); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1260)(const GLvoid *vdpDevice, const GLvoid *getProcAddress); +GLboolean APIENTRY GLAPI_PREFIX(_dispatch_stub_1261)(GLintptr surface); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1262)(GLsizei numSurfaces, const GLintptr *surfaces); +GLintptr APIENTRY GLAPI_PREFIX(_dispatch_stub_1263)(const GLvoid *vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint *textureNames); +GLintptr APIENTRY GLAPI_PREFIX(_dispatch_stub_1264)(const GLvoid *vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint *textureNames); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1265)(GLintptr surface, GLenum access); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1266)(GLsizei numSurfaces, const GLintptr *surfaces); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1267)(GLintptr surface); void APIENTRY GLAPI_PREFIX(_dispatch_stub_1268)(GLuint queryHandle); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1269)(GLuint *queryId); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1270)(GLuint queryId, GLuint *nextQueryId); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1271)(GLuint queryId, GLuint counterId, GLuint counterNameLength, GLchar *counterName, GLuint counterDescLength, GLchar *counterDesc, GLuint *counterOffset, GLuint *counterDataSize, GLuint *counterTypeEnum, GLuint *counterDataTypeEnum, GLuint64 *rawCounterMaxValue); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1272)(GLuint queryHandle, GLuint flags, GLsizei dataSize, GLvoid *data, GLuint *bytesWritten); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1273)(GLchar *queryName, GLuint *queryId); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1274)(GLuint queryId, GLuint queryNameLength, GLchar *queryName, GLuint *dataSize, GLuint *noCounters, GLuint *noInstances, GLuint *capsMask); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1275)(GLfloat factor, GLfloat units, GLfloat clamp); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1276)(GLenum frontfunc, GLenum backfunc, GLint ref, GLuint mask); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1277)(GLenum target, GLuint index, GLsizei count, const GLfloat *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1278)(GLenum target, GLuint index, GLsizei count, const GLfloat *params); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1279)(GLenum target, GLvoid *writeOffset); -void APIENTRY GLAPI_PREFIX(_dispatch_stub_1280)(GLenum target, GLvoid *writeOffset); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1269)(GLuint queryId, GLuint *queryHandle); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1270)(GLuint queryHandle); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1271)(GLuint queryHandle); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1272)(GLuint *queryId); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1273)(GLuint queryId, GLuint *nextQueryId); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1274)(GLuint queryId, GLuint counterId, GLuint counterNameLength, GLchar *counterName, GLuint counterDescLength, GLchar *counterDesc, GLuint *counterOffset, GLuint *counterDataSize, GLuint *counterTypeEnum, GLuint *counterDataTypeEnum, GLuint64 *rawCounterMaxValue); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1275)(GLuint queryHandle, GLuint flags, GLsizei dataSize, GLvoid *data, GLuint *bytesWritten); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1276)(GLchar *queryName, GLuint *queryId); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1277)(GLuint queryId, GLuint queryNameLength, GLchar *queryName, GLuint *dataSize, GLuint *noCounters, GLuint *noInstances, GLuint *capsMask); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1278)(GLfloat factor, GLfloat units, GLfloat clamp); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1279)(GLenum mode, GLsizei count, const GLint *box); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1280)(GLenum frontfunc, GLenum backfunc, GLint ref, GLuint mask); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1281)(GLenum target, GLuint index, GLsizei count, const GLfloat *params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1282)(GLenum target, GLuint index, GLsizei count, const GLfloat *params); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1283)(GLenum target, GLvoid *writeOffset); +void APIENTRY GLAPI_PREFIX(_dispatch_stub_1284)(GLenum target, GLvoid *writeOffset); GLAPI void APIENTRY GLAPI_PREFIX(AlphaFuncx)(GLenum func, GLclampx ref); GLAPI void APIENTRY GLAPI_PREFIX(ClearColorx)(GLclampx red, GLclampx green, GLclampx blue, GLclampx alpha); GLAPI void APIENTRY GLAPI_PREFIX(ClearDepthx)(GLclampx depth); @@ -1637,6 +1650,8 @@ GLAPI void APIENTRY GLAPI_PREFIX(PointParameterx)(GLenum pname, GLfixed param); GLAPI void APIENTRY GLAPI_PREFIX(PointParameterxv)(GLenum pname, const GLfixed *params); GLAPI void APIENTRY GLAPI_PREFIX(TexParameterxv)(GLenum target, GLenum pname, const GLfixed *params); +GLAPI void APIENTRY GLAPI_PREFIX(BlendBarrier)(void); +GLAPI void APIENTRY GLAPI_PREFIX(PrimitiveBoundingBox)(GLfloat minX, GLfloat minY, GLfloat minZ, GLfloat minW, GLfloat maxX, GLfloat maxY, GLfloat maxZ, GLfloat maxW); #undef MAPI_TMP_DEFINES #endif /* MAPI_TMP_DEFINES */ @@ -8425,6 +8440,13 @@ ((void (APIENTRY *)(GLuint buf, GLenum modeRGB, GLenum modeA)) _func)(buf, modeRGB, modeA); } +GLAPI void APIENTRY GLAPI_PREFIX(BlendEquationSeparatei)(GLuint buf, GLenum modeRGB, GLenum modeA) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[711]; + ((void (APIENTRY *)(GLuint buf, GLenum modeRGB, GLenum modeA)) _func)(buf, modeRGB, modeA); +} + GLAPI void APIENTRY GLAPI_PREFIX(BlendEquationiARB)(GLuint buf, GLenum mode) { const struct mapi_table *_tbl = entry_current_get(); @@ -8432,6 +8454,13 @@ ((void (APIENTRY *)(GLuint buf, GLenum mode)) _func)(buf, mode); } +GLAPI void APIENTRY GLAPI_PREFIX(BlendEquationi)(GLuint buf, GLenum mode) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[712]; + ((void (APIENTRY *)(GLuint buf, GLenum mode)) _func)(buf, mode); +} + GLAPI void APIENTRY GLAPI_PREFIX(BlendFuncSeparateiARB)(GLuint buf, GLenum srcRGB, GLenum dstRGB, GLenum srcA, GLenum dstA) { const struct mapi_table *_tbl = entry_current_get(); @@ -8439,6 +8468,13 @@ ((void (APIENTRY *)(GLuint buf, GLenum srcRGB, GLenum dstRGB, GLenum srcA, GLenum dstA)) _func)(buf, srcRGB, dstRGB, srcA, dstA); } +GLAPI void APIENTRY GLAPI_PREFIX(BlendFuncSeparatei)(GLuint buf, GLenum sfactorRGB, GLenum dfactorRGB, GLenum sfactorAlpha, GLenum dfactorAlpha) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[713]; + ((void (APIENTRY *)(GLuint buf, GLenum sfactorRGB, GLenum dfactorRGB, GLenum sfactorAlpha, GLenum dfactorAlpha)) _func)(buf, sfactorRGB, dfactorRGB, sfactorAlpha, dfactorAlpha); +} + GLAPI void APIENTRY GLAPI_PREFIX(BlendFunciARB)(GLuint buf, GLenum src, GLenum dst) { const struct mapi_table *_tbl = entry_current_get(); @@ -8446,6 +8482,13 @@ ((void (APIENTRY *)(GLuint buf, GLenum src, GLenum dst)) _func)(buf, src, dst); } +GLAPI void APIENTRY GLAPI_PREFIX(BlendFunci)(GLuint buf, GLenum sfactor, GLenum dfactor) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[714]; + ((void (APIENTRY *)(GLuint buf, GLenum sfactor, GLenum dfactor)) _func)(buf, sfactor, dfactor); +} + GLAPI void APIENTRY GLAPI_PREFIX(BindFragDataLocationIndexed)(GLuint program, GLuint colorNumber, GLuint index, const GLchar *name) { const struct mapi_table *_tbl = entry_current_get(); @@ -8838,6 +8881,13 @@ ((void (APIENTRY *)(GLenum mode, GLenum type, const GLvoid *indirect)) _func)(mode, type, indirect); } +GLAPI void APIENTRY GLAPI_PREFIX(PatchParameteri)(GLenum pname, GLint value) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[801]; + ((void (APIENTRY *)(GLenum pname, GLint value)) _func)(pname, value); +} + GLAPI void APIENTRY GLAPI_PREFIX(BindTransformFeedback)(GLenum target, GLuint id) { const struct mapi_table *_tbl = entry_current_get(); @@ -9048,6 +9098,13 @@ return ((GLenum (APIENTRY *)(void)) _func)(); } +GLAPI GLenum APIENTRY GLAPI_PREFIX(GetGraphicsResetStatus)(void) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[841]; + return ((GLenum (APIENTRY *)(void)) _func)(); +} + GLAPI void APIENTRY GLAPI_PREFIX(GetnColorTableARB)(GLenum target, GLenum format, GLenum type, GLsizei bufSize, GLvoid *table) { const struct mapi_table *_tbl = entry_current_get(); @@ -9160,6 +9217,13 @@ ((void (APIENTRY *)(GLuint program, GLint location, GLsizei bufSize, GLfloat *params)) _func)(program, location, bufSize, params); } +GLAPI void APIENTRY GLAPI_PREFIX(GetnUniformfv)(GLuint program, GLint location, GLsizei bufSize, GLfloat *params) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[857]; + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei bufSize, GLfloat *params)) _func)(program, location, bufSize, params); +} + GLAPI void APIENTRY GLAPI_PREFIX(GetnUniformivARB)(GLuint program, GLint location, GLsizei bufSize, GLint *params) { const struct mapi_table *_tbl = entry_current_get(); @@ -9167,6 +9231,13 @@ ((void (APIENTRY *)(GLuint program, GLint location, GLsizei bufSize, GLint *params)) _func)(program, location, bufSize, params); } +GLAPI void APIENTRY GLAPI_PREFIX(GetnUniformiv)(GLuint program, GLint location, GLsizei bufSize, GLint *params) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[858]; + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei bufSize, GLint *params)) _func)(program, location, bufSize, params); +} + GLAPI void APIENTRY GLAPI_PREFIX(GetnUniformuivARB)(GLuint program, GLint location, GLsizei bufSize, GLuint *params) { const struct mapi_table *_tbl = entry_current_get(); @@ -9174,6 +9245,13 @@ ((void (APIENTRY *)(GLuint program, GLint location, GLsizei bufSize, GLuint *params)) _func)(program, location, bufSize, params); } +GLAPI void APIENTRY GLAPI_PREFIX(GetnUniformuiv)(GLuint program, GLint location, GLsizei bufSize, GLuint *params) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[859]; + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei bufSize, GLuint *params)) _func)(program, location, bufSize, params); +} + GLAPI void APIENTRY GLAPI_PREFIX(ReadnPixelsARB)(GLint x, GLint y, GLsizei width, GLsizei height, GLenum format, GLenum type, GLsizei bufSize, GLvoid *data) { const struct mapi_table *_tbl = entry_current_get(); @@ -9181,6 +9259,13 @@ ((void (APIENTRY *)(GLint x, GLint y, GLsizei width, GLsizei height, GLenum format, GLenum type, GLsizei bufSize, GLvoid *data)) _func)(x, y, width, height, format, type, bufSize, data); } +GLAPI void APIENTRY GLAPI_PREFIX(ReadnPixels)(GLint x, GLint y, GLsizei width, GLsizei height, GLenum format, GLenum type, GLsizei bufSize, GLvoid *data) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[860]; + ((void (APIENTRY *)(GLint x, GLint y, GLsizei width, GLsizei height, GLenum format, GLenum type, GLsizei bufSize, GLvoid *data)) _func)(x, y, width, height, format, type, bufSize, data); +} + GLAPI void APIENTRY GLAPI_PREFIX(DrawArraysInstancedBaseInstance)(GLenum mode, GLint first, GLsizei count, GLsizei primcount, GLuint baseinstance) { const struct mapi_table *_tbl = entry_current_get(); @@ -9513,1116 +9598,1130 @@ GLAPI void APIENTRY GLAPI_PREFIX(InvalidateBufferData)(GLuint buffer) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1014]; + mapi_func _func = ((const mapi_func *) _tbl)[1015]; ((void (APIENTRY *)(GLuint buffer)) _func)(buffer); } GLAPI void APIENTRY GLAPI_PREFIX(InvalidateBufferSubData)(GLuint buffer, GLintptr offset, GLsizeiptr length) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1015]; + mapi_func _func = ((const mapi_func *) _tbl)[1016]; ((void (APIENTRY *)(GLuint buffer, GLintptr offset, GLsizeiptr length)) _func)(buffer, offset, length); } GLAPI void APIENTRY GLAPI_PREFIX(InvalidateFramebuffer)(GLenum target, GLsizei numAttachments, const GLenum *attachments) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1016]; + mapi_func _func = ((const mapi_func *) _tbl)[1017]; ((void (APIENTRY *)(GLenum target, GLsizei numAttachments, const GLenum *attachments)) _func)(target, numAttachments, attachments); } GLAPI void APIENTRY GLAPI_PREFIX(InvalidateSubFramebuffer)(GLenum target, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1017]; + mapi_func _func = ((const mapi_func *) _tbl)[1018]; ((void (APIENTRY *)(GLenum target, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height)) _func)(target, numAttachments, attachments, x, y, width, height); } GLAPI void APIENTRY GLAPI_PREFIX(InvalidateTexImage)(GLuint texture, GLint level) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1018]; + mapi_func _func = ((const mapi_func *) _tbl)[1019]; ((void (APIENTRY *)(GLuint texture, GLint level)) _func)(texture, level); } GLAPI void APIENTRY GLAPI_PREFIX(InvalidateTexSubImage)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1019]; + mapi_func _func = ((const mapi_func *) _tbl)[1020]; ((void (APIENTRY *)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth)) _func)(texture, level, xoffset, yoffset, zoffset, width, height, depth); } GLAPI void APIENTRY GLAPI_PREFIX(PointSizePointerOES)(GLenum type, GLsizei stride, const GLvoid *pointer) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1029]; + mapi_func _func = ((const mapi_func *) _tbl)[1030]; ((void (APIENTRY *)(GLenum type, GLsizei stride, const GLvoid *pointer)) _func)(type, stride, pointer); } GLAPI void APIENTRY GLAPI_PREFIX(ColorPointerEXT)(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1033]; + mapi_func _func = ((const mapi_func *) _tbl)[1034]; ((void (APIENTRY *)(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer)) _func)(size, type, stride, count, pointer); } GLAPI void APIENTRY GLAPI_PREFIX(EdgeFlagPointerEXT)(GLsizei stride, GLsizei count, const GLboolean *pointer) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1034]; + mapi_func _func = ((const mapi_func *) _tbl)[1035]; ((void (APIENTRY *)(GLsizei stride, GLsizei count, const GLboolean *pointer)) _func)(stride, count, pointer); } GLAPI void APIENTRY GLAPI_PREFIX(IndexPointerEXT)(GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1035]; + mapi_func _func = ((const mapi_func *) _tbl)[1036]; ((void (APIENTRY *)(GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer)) _func)(type, stride, count, pointer); } GLAPI void APIENTRY GLAPI_PREFIX(NormalPointerEXT)(GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1036]; + mapi_func _func = ((const mapi_func *) _tbl)[1037]; ((void (APIENTRY *)(GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer)) _func)(type, stride, count, pointer); } GLAPI void APIENTRY GLAPI_PREFIX(TexCoordPointerEXT)(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1037]; + mapi_func _func = ((const mapi_func *) _tbl)[1038]; ((void (APIENTRY *)(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer)) _func)(size, type, stride, count, pointer); } GLAPI void APIENTRY GLAPI_PREFIX(VertexPointerEXT)(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1038]; + mapi_func _func = ((const mapi_func *) _tbl)[1039]; ((void (APIENTRY *)(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer)) _func)(size, type, stride, count, pointer); } GLAPI void APIENTRY GLAPI_PREFIX(ActiveShaderProgram)(GLuint pipeline, GLuint program) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1040]; + mapi_func _func = ((const mapi_func *) _tbl)[1041]; ((void (APIENTRY *)(GLuint pipeline, GLuint program)) _func)(pipeline, program); } GLAPI void APIENTRY GLAPI_PREFIX(BindProgramPipeline)(GLuint pipeline) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1041]; + mapi_func _func = ((const mapi_func *) _tbl)[1042]; ((void (APIENTRY *)(GLuint pipeline)) _func)(pipeline); } GLAPI GLuint APIENTRY GLAPI_PREFIX(CreateShaderProgramv)(GLenum type, GLsizei count, const GLchar * const *strings) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1042]; + mapi_func _func = ((const mapi_func *) _tbl)[1043]; return ((GLuint (APIENTRY *)(GLenum type, GLsizei count, const GLchar * const *strings)) _func)(type, count, strings); } GLAPI void APIENTRY GLAPI_PREFIX(DeleteProgramPipelines)(GLsizei n, const GLuint *pipelines) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1043]; + mapi_func _func = ((const mapi_func *) _tbl)[1044]; ((void (APIENTRY *)(GLsizei n, const GLuint *pipelines)) _func)(n, pipelines); } GLAPI void APIENTRY GLAPI_PREFIX(GenProgramPipelines)(GLsizei n, GLuint *pipelines) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1044]; + mapi_func _func = ((const mapi_func *) _tbl)[1045]; ((void (APIENTRY *)(GLsizei n, GLuint *pipelines)) _func)(n, pipelines); } GLAPI void APIENTRY GLAPI_PREFIX(GetProgramPipelineInfoLog)(GLuint pipeline, GLsizei bufSize, GLsizei *length, GLchar *infoLog) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1045]; + mapi_func _func = ((const mapi_func *) _tbl)[1046]; ((void (APIENTRY *)(GLuint pipeline, GLsizei bufSize, GLsizei *length, GLchar *infoLog)) _func)(pipeline, bufSize, length, infoLog); } GLAPI void APIENTRY GLAPI_PREFIX(GetProgramPipelineiv)(GLuint pipeline, GLenum pname, GLint *params) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1046]; + mapi_func _func = ((const mapi_func *) _tbl)[1047]; ((void (APIENTRY *)(GLuint pipeline, GLenum pname, GLint *params)) _func)(pipeline, pname, params); } GLAPI GLboolean APIENTRY GLAPI_PREFIX(IsProgramPipeline)(GLuint pipeline) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1047]; + mapi_func _func = ((const mapi_func *) _tbl)[1048]; return ((GLboolean (APIENTRY *)(GLuint pipeline)) _func)(pipeline); } GLAPI void APIENTRY GLAPI_PREFIX(LockArraysEXT)(GLint first, GLsizei count) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1048]; + mapi_func _func = ((const mapi_func *) _tbl)[1049]; ((void (APIENTRY *)(GLint first, GLsizei count)) _func)(first, count); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform1f)(GLuint program, GLint location, GLfloat x) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1051]; + mapi_func _func = ((const mapi_func *) _tbl)[1052]; ((void (APIENTRY *)(GLuint program, GLint location, GLfloat x)) _func)(program, location, x); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform1fv)(GLuint program, GLint location, GLsizei count, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1052]; + mapi_func _func = ((const mapi_func *) _tbl)[1053]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLfloat *value)) _func)(program, location, count, value); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform1i)(GLuint program, GLint location, GLint x) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1053]; + mapi_func _func = ((const mapi_func *) _tbl)[1054]; ((void (APIENTRY *)(GLuint program, GLint location, GLint x)) _func)(program, location, x); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform1iv)(GLuint program, GLint location, GLsizei count, const GLint *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1054]; + mapi_func _func = ((const mapi_func *) _tbl)[1055]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLint *value)) _func)(program, location, count, value); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform1ui)(GLuint program, GLint location, GLuint x) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1055]; + mapi_func _func = ((const mapi_func *) _tbl)[1056]; ((void (APIENTRY *)(GLuint program, GLint location, GLuint x)) _func)(program, location, x); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform1uiv)(GLuint program, GLint location, GLsizei count, const GLuint *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1056]; + mapi_func _func = ((const mapi_func *) _tbl)[1057]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLuint *value)) _func)(program, location, count, value); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform2f)(GLuint program, GLint location, GLfloat x, GLfloat y) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1059]; + mapi_func _func = ((const mapi_func *) _tbl)[1060]; ((void (APIENTRY *)(GLuint program, GLint location, GLfloat x, GLfloat y)) _func)(program, location, x, y); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform2fv)(GLuint program, GLint location, GLsizei count, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1060]; + mapi_func _func = ((const mapi_func *) _tbl)[1061]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLfloat *value)) _func)(program, location, count, value); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform2i)(GLuint program, GLint location, GLint x, GLint y) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1061]; + mapi_func _func = ((const mapi_func *) _tbl)[1062]; ((void (APIENTRY *)(GLuint program, GLint location, GLint x, GLint y)) _func)(program, location, x, y); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform2iv)(GLuint program, GLint location, GLsizei count, const GLint *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1062]; + mapi_func _func = ((const mapi_func *) _tbl)[1063]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLint *value)) _func)(program, location, count, value); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform2ui)(GLuint program, GLint location, GLuint x, GLuint y) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1063]; + mapi_func _func = ((const mapi_func *) _tbl)[1064]; ((void (APIENTRY *)(GLuint program, GLint location, GLuint x, GLuint y)) _func)(program, location, x, y); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform2uiv)(GLuint program, GLint location, GLsizei count, const GLuint *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1064]; + mapi_func _func = ((const mapi_func *) _tbl)[1065]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLuint *value)) _func)(program, location, count, value); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform3f)(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1067]; + mapi_func _func = ((const mapi_func *) _tbl)[1068]; ((void (APIENTRY *)(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z)) _func)(program, location, x, y, z); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform3fv)(GLuint program, GLint location, GLsizei count, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1068]; + mapi_func _func = ((const mapi_func *) _tbl)[1069]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLfloat *value)) _func)(program, location, count, value); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform3i)(GLuint program, GLint location, GLint x, GLint y, GLint z) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1069]; + mapi_func _func = ((const mapi_func *) _tbl)[1070]; ((void (APIENTRY *)(GLuint program, GLint location, GLint x, GLint y, GLint z)) _func)(program, location, x, y, z); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform3iv)(GLuint program, GLint location, GLsizei count, const GLint *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1070]; + mapi_func _func = ((const mapi_func *) _tbl)[1071]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLint *value)) _func)(program, location, count, value); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform3ui)(GLuint program, GLint location, GLuint x, GLuint y, GLuint z) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1071]; + mapi_func _func = ((const mapi_func *) _tbl)[1072]; ((void (APIENTRY *)(GLuint program, GLint location, GLuint x, GLuint y, GLuint z)) _func)(program, location, x, y, z); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform3uiv)(GLuint program, GLint location, GLsizei count, const GLuint *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1072]; + mapi_func _func = ((const mapi_func *) _tbl)[1073]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLuint *value)) _func)(program, location, count, value); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform4f)(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z, GLfloat w) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1075]; + mapi_func _func = ((const mapi_func *) _tbl)[1076]; ((void (APIENTRY *)(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z, GLfloat w)) _func)(program, location, x, y, z, w); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform4fv)(GLuint program, GLint location, GLsizei count, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1076]; + mapi_func _func = ((const mapi_func *) _tbl)[1077]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLfloat *value)) _func)(program, location, count, value); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform4i)(GLuint program, GLint location, GLint x, GLint y, GLint z, GLint w) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1077]; + mapi_func _func = ((const mapi_func *) _tbl)[1078]; ((void (APIENTRY *)(GLuint program, GLint location, GLint x, GLint y, GLint z, GLint w)) _func)(program, location, x, y, z, w); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform4iv)(GLuint program, GLint location, GLsizei count, const GLint *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1078]; + mapi_func _func = ((const mapi_func *) _tbl)[1079]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLint *value)) _func)(program, location, count, value); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform4ui)(GLuint program, GLint location, GLuint x, GLuint y, GLuint z, GLuint w) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1079]; + mapi_func _func = ((const mapi_func *) _tbl)[1080]; ((void (APIENTRY *)(GLuint program, GLint location, GLuint x, GLuint y, GLuint z, GLuint w)) _func)(program, location, x, y, z, w); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniform4uiv)(GLuint program, GLint location, GLsizei count, const GLuint *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1080]; + mapi_func _func = ((const mapi_func *) _tbl)[1081]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLuint *value)) _func)(program, location, count, value); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniformMatrix2fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1082]; + mapi_func _func = ((const mapi_func *) _tbl)[1083]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniformMatrix2x3fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1084]; + mapi_func _func = ((const mapi_func *) _tbl)[1085]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniformMatrix2x4fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1086]; + mapi_func _func = ((const mapi_func *) _tbl)[1087]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniformMatrix3fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1088]; + mapi_func _func = ((const mapi_func *) _tbl)[1089]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniformMatrix3x2fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1090]; + mapi_func _func = ((const mapi_func *) _tbl)[1091]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniformMatrix3x4fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1092]; + mapi_func _func = ((const mapi_func *) _tbl)[1093]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniformMatrix4fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1094]; + mapi_func _func = ((const mapi_func *) _tbl)[1095]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniformMatrix4x2fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1096]; + mapi_func _func = ((const mapi_func *) _tbl)[1097]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); } GLAPI void APIENTRY GLAPI_PREFIX(ProgramUniformMatrix4x3fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1098]; + mapi_func _func = ((const mapi_func *) _tbl)[1099]; ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); } GLAPI void APIENTRY GLAPI_PREFIX(UnlockArraysEXT)(void) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1099]; + mapi_func _func = ((const mapi_func *) _tbl)[1100]; ((void (APIENTRY *)(void)) _func)(); } GLAPI void APIENTRY GLAPI_PREFIX(UseProgramStages)(GLuint pipeline, GLbitfield stages, GLuint program) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1100]; + mapi_func _func = ((const mapi_func *) _tbl)[1101]; ((void (APIENTRY *)(GLuint pipeline, GLbitfield stages, GLuint program)) _func)(pipeline, stages, program); } GLAPI void APIENTRY GLAPI_PREFIX(ValidateProgramPipeline)(GLuint pipeline) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1101]; + mapi_func _func = ((const mapi_func *) _tbl)[1102]; ((void (APIENTRY *)(GLuint pipeline)) _func)(pipeline); } GLAPI void APIENTRY GLAPI_PREFIX(DebugMessageCallback)(GLDEBUGPROC callback, const GLvoid *userParam) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1102]; + mapi_func _func = ((const mapi_func *) _tbl)[1103]; ((void (APIENTRY *)(GLDEBUGPROC callback, const GLvoid *userParam)) _func)(callback, userParam); } GLAPI void APIENTRY GLAPI_PREFIX(DebugMessageCallbackARB)(GLDEBUGPROCARB callback, const GLvoid *userParam) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1102]; + mapi_func _func = ((const mapi_func *) _tbl)[1103]; ((void (APIENTRY *)(GLDEBUGPROCARB callback, const GLvoid *userParam)) _func)(callback, userParam); } GLAPI void APIENTRY GLAPI_PREFIX(DebugMessageControl)(GLenum source, GLenum type, GLenum severity, GLsizei count, const GLuint *ids, GLboolean enabled) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1103]; + mapi_func _func = ((const mapi_func *) _tbl)[1104]; ((void (APIENTRY *)(GLenum source, GLenum type, GLenum severity, GLsizei count, const GLuint *ids, GLboolean enabled)) _func)(source, type, severity, count, ids, enabled); } GLAPI void APIENTRY GLAPI_PREFIX(DebugMessageControlARB)(GLenum source, GLenum type, GLenum severity, GLsizei count, const GLuint *ids, GLboolean enabled) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1103]; + mapi_func _func = ((const mapi_func *) _tbl)[1104]; ((void (APIENTRY *)(GLenum source, GLenum type, GLenum severity, GLsizei count, const GLuint *ids, GLboolean enabled)) _func)(source, type, severity, count, ids, enabled); } GLAPI void APIENTRY GLAPI_PREFIX(DebugMessageInsert)(GLenum source, GLenum type, GLuint id, GLenum severity, GLsizei length, const GLchar *buf) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1104]; + mapi_func _func = ((const mapi_func *) _tbl)[1105]; ((void (APIENTRY *)(GLenum source, GLenum type, GLuint id, GLenum severity, GLsizei length, const GLchar *buf)) _func)(source, type, id, severity, length, buf); } GLAPI void APIENTRY GLAPI_PREFIX(DebugMessageInsertARB)(GLenum source, GLenum type, GLuint id, GLenum severity, GLsizei length, const GLcharARB *buf) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1104]; + mapi_func _func = ((const mapi_func *) _tbl)[1105]; ((void (APIENTRY *)(GLenum source, GLenum type, GLuint id, GLenum severity, GLsizei length, const GLcharARB *buf)) _func)(source, type, id, severity, length, buf); } GLAPI GLuint APIENTRY GLAPI_PREFIX(GetDebugMessageLog)(GLuint count, GLsizei bufsize, GLenum *sources, GLenum *types, GLuint *ids, GLenum *severities, GLsizei *lengths, GLchar *messageLog) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1105]; + mapi_func _func = ((const mapi_func *) _tbl)[1106]; return ((GLuint (APIENTRY *)(GLuint count, GLsizei bufsize, GLenum *sources, GLenum *types, GLuint *ids, GLenum *severities, GLsizei *lengths, GLchar *messageLog)) _func)(count, bufsize, sources, types, ids, severities, lengths, messageLog); } GLAPI GLuint APIENTRY GLAPI_PREFIX(GetDebugMessageLogARB)(GLuint count, GLsizei bufsize, GLenum *sources, GLenum *types, GLuint *ids, GLenum *severities, GLsizei *lengths, GLcharARB *messageLog) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1105]; + mapi_func _func = ((const mapi_func *) _tbl)[1106]; return ((GLuint (APIENTRY *)(GLuint count, GLsizei bufsize, GLenum *sources, GLenum *types, GLuint *ids, GLenum *severities, GLsizei *lengths, GLcharARB *messageLog)) _func)(count, bufsize, sources, types, ids, severities, lengths, messageLog); } GLAPI void APIENTRY GLAPI_PREFIX(GetObjectLabel)(GLenum identifier, GLuint name, GLsizei bufSize, GLsizei *length, GLchar *label) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1106]; + mapi_func _func = ((const mapi_func *) _tbl)[1107]; ((void (APIENTRY *)(GLenum identifier, GLuint name, GLsizei bufSize, GLsizei *length, GLchar *label)) _func)(identifier, name, bufSize, length, label); } GLAPI void APIENTRY GLAPI_PREFIX(GetObjectPtrLabel)(const GLvoid *ptr, GLsizei bufSize, GLsizei *length, GLchar *label) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1107]; + mapi_func _func = ((const mapi_func *) _tbl)[1108]; ((void (APIENTRY *)(const GLvoid *ptr, GLsizei bufSize, GLsizei *length, GLchar *label)) _func)(ptr, bufSize, length, label); } GLAPI void APIENTRY GLAPI_PREFIX(ObjectLabel)(GLenum identifier, GLuint name, GLsizei length, const GLchar *label) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1108]; + mapi_func _func = ((const mapi_func *) _tbl)[1109]; ((void (APIENTRY *)(GLenum identifier, GLuint name, GLsizei length, const GLchar *label)) _func)(identifier, name, length, label); } GLAPI void APIENTRY GLAPI_PREFIX(ObjectPtrLabel)(const GLvoid *ptr, GLsizei length, const GLchar *label) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1109]; + mapi_func _func = ((const mapi_func *) _tbl)[1110]; ((void (APIENTRY *)(const GLvoid *ptr, GLsizei length, const GLchar *label)) _func)(ptr, length, label); } GLAPI void APIENTRY GLAPI_PREFIX(PopDebugGroup)(void) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1110]; + mapi_func _func = ((const mapi_func *) _tbl)[1111]; ((void (APIENTRY *)(void)) _func)(); } GLAPI void APIENTRY GLAPI_PREFIX(PushDebugGroup)(GLenum source, GLuint id, GLsizei length, const GLchar *message) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1111]; + mapi_func _func = ((const mapi_func *) _tbl)[1112]; ((void (APIENTRY *)(GLenum source, GLuint id, GLsizei length, const GLchar *message)) _func)(source, id, length, message); } GLAPI void APIENTRY GLAPI_PREFIX(SecondaryColor3fEXT)(GLfloat red, GLfloat green, GLfloat blue) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1112]; + mapi_func _func = ((const mapi_func *) _tbl)[1113]; ((void (APIENTRY *)(GLfloat red, GLfloat green, GLfloat blue)) _func)(red, green, blue); } GLAPI void APIENTRY GLAPI_PREFIX(SecondaryColor3f)(GLfloat red, GLfloat green, GLfloat blue) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1112]; + mapi_func _func = ((const mapi_func *) _tbl)[1113]; ((void (APIENTRY *)(GLfloat red, GLfloat green, GLfloat blue)) _func)(red, green, blue); } GLAPI void APIENTRY GLAPI_PREFIX(SecondaryColor3fvEXT)(const GLfloat *v) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1113]; + mapi_func _func = ((const mapi_func *) _tbl)[1114]; ((void (APIENTRY *)(const GLfloat *v)) _func)(v); } GLAPI void APIENTRY GLAPI_PREFIX(SecondaryColor3fv)(const GLfloat *v) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1113]; + mapi_func _func = ((const mapi_func *) _tbl)[1114]; ((void (APIENTRY *)(const GLfloat *v)) _func)(v); } GLAPI void APIENTRY GLAPI_PREFIX(MultiDrawElementsEXT)(GLenum mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1114]; + mapi_func _func = ((const mapi_func *) _tbl)[1115]; ((void (APIENTRY *)(GLenum mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount)) _func)(mode, count, type, indices, primcount); } GLAPI void APIENTRY GLAPI_PREFIX(MultiDrawElements)(GLenum mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1114]; + mapi_func _func = ((const mapi_func *) _tbl)[1115]; ((void (APIENTRY *)(GLenum mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount)) _func)(mode, count, type, indices, primcount); } GLAPI void APIENTRY GLAPI_PREFIX(FogCoordfEXT)(GLfloat coord) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1115]; + mapi_func _func = ((const mapi_func *) _tbl)[1116]; ((void (APIENTRY *)(GLfloat coord)) _func)(coord); } GLAPI void APIENTRY GLAPI_PREFIX(FogCoordf)(GLfloat coord) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1115]; + mapi_func _func = ((const mapi_func *) _tbl)[1116]; ((void (APIENTRY *)(GLfloat coord)) _func)(coord); } GLAPI void APIENTRY GLAPI_PREFIX(FogCoordfvEXT)(const GLfloat *coord) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1116]; + mapi_func _func = ((const mapi_func *) _tbl)[1117]; ((void (APIENTRY *)(const GLfloat *coord)) _func)(coord); } GLAPI void APIENTRY GLAPI_PREFIX(FogCoordfv)(const GLfloat *coord) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1116]; + mapi_func _func = ((const mapi_func *) _tbl)[1117]; ((void (APIENTRY *)(const GLfloat *coord)) _func)(coord); } GLAPI void APIENTRY GLAPI_PREFIX(PrimitiveRestartNV)(void) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1210]; + mapi_func _func = ((const mapi_func *) _tbl)[1213]; ((void (APIENTRY *)(void)) _func)(); } GLAPI void APIENTRY GLAPI_PREFIX(BindFramebufferEXT)(GLenum target, GLuint framebuffer) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1215]; + mapi_func _func = ((const mapi_func *) _tbl)[1218]; ((void (APIENTRY *)(GLenum target, GLuint framebuffer)) _func)(target, framebuffer); } GLAPI void APIENTRY GLAPI_PREFIX(BindRenderbufferEXT)(GLenum target, GLuint renderbuffer) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1216]; + mapi_func _func = ((const mapi_func *) _tbl)[1219]; ((void (APIENTRY *)(GLenum target, GLuint renderbuffer)) _func)(target, renderbuffer); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI1iEXT)(GLuint index, GLint x) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1220]; + mapi_func _func = ((const mapi_func *) _tbl)[1223]; ((void (APIENTRY *)(GLuint index, GLint x)) _func)(index, x); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI1i)(GLuint index, GLint x) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1220]; + mapi_func _func = ((const mapi_func *) _tbl)[1223]; ((void (APIENTRY *)(GLuint index, GLint x)) _func)(index, x); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI1uiEXT)(GLuint index, GLuint x) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1221]; + mapi_func _func = ((const mapi_func *) _tbl)[1224]; ((void (APIENTRY *)(GLuint index, GLuint x)) _func)(index, x); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI1ui)(GLuint index, GLuint x) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1221]; + mapi_func _func = ((const mapi_func *) _tbl)[1224]; ((void (APIENTRY *)(GLuint index, GLuint x)) _func)(index, x); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI2iEXT)(GLuint index, GLint x, GLint y) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1222]; + mapi_func _func = ((const mapi_func *) _tbl)[1225]; ((void (APIENTRY *)(GLuint index, GLint x, GLint y)) _func)(index, x, y); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI2i)(GLuint index, GLint x, GLint y) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1222]; + mapi_func _func = ((const mapi_func *) _tbl)[1225]; ((void (APIENTRY *)(GLuint index, GLint x, GLint y)) _func)(index, x, y); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI2ivEXT)(GLuint index, const GLint *v) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1223]; + mapi_func _func = ((const mapi_func *) _tbl)[1226]; ((void (APIENTRY *)(GLuint index, const GLint *v)) _func)(index, v); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI2iv)(GLuint index, const GLint *v) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1223]; + mapi_func _func = ((const mapi_func *) _tbl)[1226]; ((void (APIENTRY *)(GLuint index, const GLint *v)) _func)(index, v); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI2uiEXT)(GLuint index, GLuint x, GLuint y) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1224]; + mapi_func _func = ((const mapi_func *) _tbl)[1227]; ((void (APIENTRY *)(GLuint index, GLuint x, GLuint y)) _func)(index, x, y); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI2ui)(GLuint index, GLuint x, GLuint y) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1224]; + mapi_func _func = ((const mapi_func *) _tbl)[1227]; ((void (APIENTRY *)(GLuint index, GLuint x, GLuint y)) _func)(index, x, y); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI2uivEXT)(GLuint index, const GLuint *v) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1225]; + mapi_func _func = ((const mapi_func *) _tbl)[1228]; ((void (APIENTRY *)(GLuint index, const GLuint *v)) _func)(index, v); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI2uiv)(GLuint index, const GLuint *v) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1225]; + mapi_func _func = ((const mapi_func *) _tbl)[1228]; ((void (APIENTRY *)(GLuint index, const GLuint *v)) _func)(index, v); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI3iEXT)(GLuint index, GLint x, GLint y, GLint z) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1226]; + mapi_func _func = ((const mapi_func *) _tbl)[1229]; ((void (APIENTRY *)(GLuint index, GLint x, GLint y, GLint z)) _func)(index, x, y, z); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI3i)(GLuint index, GLint x, GLint y, GLint z) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1226]; + mapi_func _func = ((const mapi_func *) _tbl)[1229]; ((void (APIENTRY *)(GLuint index, GLint x, GLint y, GLint z)) _func)(index, x, y, z); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI3ivEXT)(GLuint index, const GLint *v) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1227]; + mapi_func _func = ((const mapi_func *) _tbl)[1230]; ((void (APIENTRY *)(GLuint index, const GLint *v)) _func)(index, v); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI3iv)(GLuint index, const GLint *v) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1227]; + mapi_func _func = ((const mapi_func *) _tbl)[1230]; ((void (APIENTRY *)(GLuint index, const GLint *v)) _func)(index, v); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI3uiEXT)(GLuint index, GLuint x, GLuint y, GLuint z) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1228]; + mapi_func _func = ((const mapi_func *) _tbl)[1231]; ((void (APIENTRY *)(GLuint index, GLuint x, GLuint y, GLuint z)) _func)(index, x, y, z); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI3ui)(GLuint index, GLuint x, GLuint y, GLuint z) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1228]; + mapi_func _func = ((const mapi_func *) _tbl)[1231]; ((void (APIENTRY *)(GLuint index, GLuint x, GLuint y, GLuint z)) _func)(index, x, y, z); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI3uivEXT)(GLuint index, const GLuint *v) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1229]; + mapi_func _func = ((const mapi_func *) _tbl)[1232]; ((void (APIENTRY *)(GLuint index, const GLuint *v)) _func)(index, v); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI3uiv)(GLuint index, const GLuint *v) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1229]; + mapi_func _func = ((const mapi_func *) _tbl)[1232]; ((void (APIENTRY *)(GLuint index, const GLuint *v)) _func)(index, v); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI4iEXT)(GLuint index, GLint x, GLint y, GLint z, GLint w) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1230]; + mapi_func _func = ((const mapi_func *) _tbl)[1233]; ((void (APIENTRY *)(GLuint index, GLint x, GLint y, GLint z, GLint w)) _func)(index, x, y, z, w); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI4i)(GLuint index, GLint x, GLint y, GLint z, GLint w) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1230]; + mapi_func _func = ((const mapi_func *) _tbl)[1233]; ((void (APIENTRY *)(GLuint index, GLint x, GLint y, GLint z, GLint w)) _func)(index, x, y, z, w); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI4ivEXT)(GLuint index, const GLint *v) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1231]; + mapi_func _func = ((const mapi_func *) _tbl)[1234]; ((void (APIENTRY *)(GLuint index, const GLint *v)) _func)(index, v); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI4iv)(GLuint index, const GLint *v) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1231]; + mapi_func _func = ((const mapi_func *) _tbl)[1234]; ((void (APIENTRY *)(GLuint index, const GLint *v)) _func)(index, v); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI4uiEXT)(GLuint index, GLuint x, GLuint y, GLuint z, GLuint w) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1232]; + mapi_func _func = ((const mapi_func *) _tbl)[1235]; ((void (APIENTRY *)(GLuint index, GLuint x, GLuint y, GLuint z, GLuint w)) _func)(index, x, y, z, w); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI4ui)(GLuint index, GLuint x, GLuint y, GLuint z, GLuint w) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1232]; + mapi_func _func = ((const mapi_func *) _tbl)[1235]; ((void (APIENTRY *)(GLuint index, GLuint x, GLuint y, GLuint z, GLuint w)) _func)(index, x, y, z, w); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI4uivEXT)(GLuint index, const GLuint *v) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1233]; + mapi_func _func = ((const mapi_func *) _tbl)[1236]; ((void (APIENTRY *)(GLuint index, const GLuint *v)) _func)(index, v); } GLAPI void APIENTRY GLAPI_PREFIX(VertexAttribI4uiv)(GLuint index, const GLuint *v) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1233]; + mapi_func _func = ((const mapi_func *) _tbl)[1236]; ((void (APIENTRY *)(GLuint index, const GLuint *v)) _func)(index, v); } GLAPI void APIENTRY GLAPI_PREFIX(ClearColorIiEXT)(GLint r, GLint g, GLint b, GLint a) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1234]; + mapi_func _func = ((const mapi_func *) _tbl)[1237]; ((void (APIENTRY *)(GLint r, GLint g, GLint b, GLint a)) _func)(r, g, b, a); } GLAPI void APIENTRY GLAPI_PREFIX(ClearColorIuiEXT)(GLuint r, GLuint g, GLuint b, GLuint a) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1235]; + mapi_func _func = ((const mapi_func *) _tbl)[1238]; ((void (APIENTRY *)(GLuint r, GLuint g, GLuint b, GLuint a)) _func)(r, g, b, a); } GLAPI void APIENTRY GLAPI_PREFIX(TextureBarrierNV)(void) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1254]; + mapi_func _func = ((const mapi_func *) _tbl)[1257]; ((void (APIENTRY *)(void)) _func)(); } GLAPI void APIENTRY GLAPI_PREFIX(AlphaFuncx)(GLenum func, GLclampx ref) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1281]; + mapi_func _func = ((const mapi_func *) _tbl)[1285]; ((void (APIENTRY *)(GLenum func, GLclampx ref)) _func)(func, ref); } GLAPI void APIENTRY GLAPI_PREFIX(ClearColorx)(GLclampx red, GLclampx green, GLclampx blue, GLclampx alpha) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1282]; + mapi_func _func = ((const mapi_func *) _tbl)[1286]; ((void (APIENTRY *)(GLclampx red, GLclampx green, GLclampx blue, GLclampx alpha)) _func)(red, green, blue, alpha); } GLAPI void APIENTRY GLAPI_PREFIX(ClearDepthx)(GLclampx depth) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1283]; + mapi_func _func = ((const mapi_func *) _tbl)[1287]; ((void (APIENTRY *)(GLclampx depth)) _func)(depth); } GLAPI void APIENTRY GLAPI_PREFIX(Color4x)(GLfixed red, GLfixed green, GLfixed blue, GLfixed alpha) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1284]; + mapi_func _func = ((const mapi_func *) _tbl)[1288]; ((void (APIENTRY *)(GLfixed red, GLfixed green, GLfixed blue, GLfixed alpha)) _func)(red, green, blue, alpha); } GLAPI void APIENTRY GLAPI_PREFIX(DepthRangex)(GLclampx zNear, GLclampx zFar) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1285]; + mapi_func _func = ((const mapi_func *) _tbl)[1289]; ((void (APIENTRY *)(GLclampx zNear, GLclampx zFar)) _func)(zNear, zFar); } GLAPI void APIENTRY GLAPI_PREFIX(Fogx)(GLenum pname, GLfixed param) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1286]; + mapi_func _func = ((const mapi_func *) _tbl)[1290]; ((void (APIENTRY *)(GLenum pname, GLfixed param)) _func)(pname, param); } GLAPI void APIENTRY GLAPI_PREFIX(Fogxv)(GLenum pname, const GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1287]; + mapi_func _func = ((const mapi_func *) _tbl)[1291]; ((void (APIENTRY *)(GLenum pname, const GLfixed *params)) _func)(pname, params); } GLAPI void APIENTRY GLAPI_PREFIX(Frustumf)(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1288]; + mapi_func _func = ((const mapi_func *) _tbl)[1292]; ((void (APIENTRY *)(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar)) _func)(left, right, bottom, top, zNear, zFar); } GLAPI void APIENTRY GLAPI_PREFIX(Frustumx)(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1289]; + mapi_func _func = ((const mapi_func *) _tbl)[1293]; ((void (APIENTRY *)(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar)) _func)(left, right, bottom, top, zNear, zFar); } GLAPI void APIENTRY GLAPI_PREFIX(LightModelx)(GLenum pname, GLfixed param) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1290]; + mapi_func _func = ((const mapi_func *) _tbl)[1294]; ((void (APIENTRY *)(GLenum pname, GLfixed param)) _func)(pname, param); } GLAPI void APIENTRY GLAPI_PREFIX(LightModelxv)(GLenum pname, const GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1291]; + mapi_func _func = ((const mapi_func *) _tbl)[1295]; ((void (APIENTRY *)(GLenum pname, const GLfixed *params)) _func)(pname, params); } GLAPI void APIENTRY GLAPI_PREFIX(Lightx)(GLenum light, GLenum pname, GLfixed param) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1292]; + mapi_func _func = ((const mapi_func *) _tbl)[1296]; ((void (APIENTRY *)(GLenum light, GLenum pname, GLfixed param)) _func)(light, pname, param); } GLAPI void APIENTRY GLAPI_PREFIX(Lightxv)(GLenum light, GLenum pname, const GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1293]; + mapi_func _func = ((const mapi_func *) _tbl)[1297]; ((void (APIENTRY *)(GLenum light, GLenum pname, const GLfixed *params)) _func)(light, pname, params); } GLAPI void APIENTRY GLAPI_PREFIX(LineWidthx)(GLfixed width) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1294]; + mapi_func _func = ((const mapi_func *) _tbl)[1298]; ((void (APIENTRY *)(GLfixed width)) _func)(width); } GLAPI void APIENTRY GLAPI_PREFIX(LoadMatrixx)(const GLfixed *m) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1295]; + mapi_func _func = ((const mapi_func *) _tbl)[1299]; ((void (APIENTRY *)(const GLfixed *m)) _func)(m); } GLAPI void APIENTRY GLAPI_PREFIX(Materialx)(GLenum face, GLenum pname, GLfixed param) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1296]; + mapi_func _func = ((const mapi_func *) _tbl)[1300]; ((void (APIENTRY *)(GLenum face, GLenum pname, GLfixed param)) _func)(face, pname, param); } GLAPI void APIENTRY GLAPI_PREFIX(Materialxv)(GLenum face, GLenum pname, const GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1297]; + mapi_func _func = ((const mapi_func *) _tbl)[1301]; ((void (APIENTRY *)(GLenum face, GLenum pname, const GLfixed *params)) _func)(face, pname, params); } GLAPI void APIENTRY GLAPI_PREFIX(MultMatrixx)(const GLfixed *m) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1298]; + mapi_func _func = ((const mapi_func *) _tbl)[1302]; ((void (APIENTRY *)(const GLfixed *m)) _func)(m); } GLAPI void APIENTRY GLAPI_PREFIX(MultiTexCoord4x)(GLenum target, GLfixed s, GLfixed t, GLfixed r, GLfixed q) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1299]; + mapi_func _func = ((const mapi_func *) _tbl)[1303]; ((void (APIENTRY *)(GLenum target, GLfixed s, GLfixed t, GLfixed r, GLfixed q)) _func)(target, s, t, r, q); } GLAPI void APIENTRY GLAPI_PREFIX(Normal3x)(GLfixed nx, GLfixed ny, GLfixed nz) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1300]; + mapi_func _func = ((const mapi_func *) _tbl)[1304]; ((void (APIENTRY *)(GLfixed nx, GLfixed ny, GLfixed nz)) _func)(nx, ny, nz); } GLAPI void APIENTRY GLAPI_PREFIX(Orthof)(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1301]; + mapi_func _func = ((const mapi_func *) _tbl)[1305]; ((void (APIENTRY *)(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar)) _func)(left, right, bottom, top, zNear, zFar); } GLAPI void APIENTRY GLAPI_PREFIX(Orthox)(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1302]; + mapi_func _func = ((const mapi_func *) _tbl)[1306]; ((void (APIENTRY *)(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar)) _func)(left, right, bottom, top, zNear, zFar); } GLAPI void APIENTRY GLAPI_PREFIX(PointSizex)(GLfixed size) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1303]; + mapi_func _func = ((const mapi_func *) _tbl)[1307]; ((void (APIENTRY *)(GLfixed size)) _func)(size); } GLAPI void APIENTRY GLAPI_PREFIX(PolygonOffsetx)(GLfixed factor, GLfixed units) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1304]; + mapi_func _func = ((const mapi_func *) _tbl)[1308]; ((void (APIENTRY *)(GLfixed factor, GLfixed units)) _func)(factor, units); } GLAPI void APIENTRY GLAPI_PREFIX(Rotatex)(GLfixed angle, GLfixed x, GLfixed y, GLfixed z) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1305]; + mapi_func _func = ((const mapi_func *) _tbl)[1309]; ((void (APIENTRY *)(GLfixed angle, GLfixed x, GLfixed y, GLfixed z)) _func)(angle, x, y, z); } GLAPI void APIENTRY GLAPI_PREFIX(SampleCoveragex)(GLclampx value, GLboolean invert) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1306]; + mapi_func _func = ((const mapi_func *) _tbl)[1310]; ((void (APIENTRY *)(GLclampx value, GLboolean invert)) _func)(value, invert); } GLAPI void APIENTRY GLAPI_PREFIX(Scalex)(GLfixed x, GLfixed y, GLfixed z) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1307]; + mapi_func _func = ((const mapi_func *) _tbl)[1311]; ((void (APIENTRY *)(GLfixed x, GLfixed y, GLfixed z)) _func)(x, y, z); } GLAPI void APIENTRY GLAPI_PREFIX(TexEnvx)(GLenum target, GLenum pname, GLfixed param) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1308]; + mapi_func _func = ((const mapi_func *) _tbl)[1312]; ((void (APIENTRY *)(GLenum target, GLenum pname, GLfixed param)) _func)(target, pname, param); } GLAPI void APIENTRY GLAPI_PREFIX(TexEnvxv)(GLenum target, GLenum pname, const GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1309]; + mapi_func _func = ((const mapi_func *) _tbl)[1313]; ((void (APIENTRY *)(GLenum target, GLenum pname, const GLfixed *params)) _func)(target, pname, params); } GLAPI void APIENTRY GLAPI_PREFIX(TexParameterx)(GLenum target, GLenum pname, GLfixed param) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1310]; + mapi_func _func = ((const mapi_func *) _tbl)[1314]; ((void (APIENTRY *)(GLenum target, GLenum pname, GLfixed param)) _func)(target, pname, param); } GLAPI void APIENTRY GLAPI_PREFIX(Translatex)(GLfixed x, GLfixed y, GLfixed z) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1311]; + mapi_func _func = ((const mapi_func *) _tbl)[1315]; ((void (APIENTRY *)(GLfixed x, GLfixed y, GLfixed z)) _func)(x, y, z); } GLAPI void APIENTRY GLAPI_PREFIX(ClipPlanef)(GLenum plane, const GLfloat *equation) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1312]; + mapi_func _func = ((const mapi_func *) _tbl)[1316]; ((void (APIENTRY *)(GLenum plane, const GLfloat *equation)) _func)(plane, equation); } GLAPI void APIENTRY GLAPI_PREFIX(ClipPlanex)(GLenum plane, const GLfixed *equation) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1313]; + mapi_func _func = ((const mapi_func *) _tbl)[1317]; ((void (APIENTRY *)(GLenum plane, const GLfixed *equation)) _func)(plane, equation); } GLAPI void APIENTRY GLAPI_PREFIX(GetClipPlanef)(GLenum plane, GLfloat *equation) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1314]; + mapi_func _func = ((const mapi_func *) _tbl)[1318]; ((void (APIENTRY *)(GLenum plane, GLfloat *equation)) _func)(plane, equation); } GLAPI void APIENTRY GLAPI_PREFIX(GetClipPlanex)(GLenum plane, GLfixed *equation) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1315]; + mapi_func _func = ((const mapi_func *) _tbl)[1319]; ((void (APIENTRY *)(GLenum plane, GLfixed *equation)) _func)(plane, equation); } GLAPI void APIENTRY GLAPI_PREFIX(GetFixedv)(GLenum pname, GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1316]; + mapi_func _func = ((const mapi_func *) _tbl)[1320]; ((void (APIENTRY *)(GLenum pname, GLfixed *params)) _func)(pname, params); } GLAPI void APIENTRY GLAPI_PREFIX(GetLightxv)(GLenum light, GLenum pname, GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1317]; + mapi_func _func = ((const mapi_func *) _tbl)[1321]; ((void (APIENTRY *)(GLenum light, GLenum pname, GLfixed *params)) _func)(light, pname, params); } GLAPI void APIENTRY GLAPI_PREFIX(GetMaterialxv)(GLenum face, GLenum pname, GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1318]; + mapi_func _func = ((const mapi_func *) _tbl)[1322]; ((void (APIENTRY *)(GLenum face, GLenum pname, GLfixed *params)) _func)(face, pname, params); } GLAPI void APIENTRY GLAPI_PREFIX(GetTexEnvxv)(GLenum target, GLenum pname, GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1319]; + mapi_func _func = ((const mapi_func *) _tbl)[1323]; ((void (APIENTRY *)(GLenum target, GLenum pname, GLfixed *params)) _func)(target, pname, params); } GLAPI void APIENTRY GLAPI_PREFIX(GetTexParameterxv)(GLenum target, GLenum pname, GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1320]; + mapi_func _func = ((const mapi_func *) _tbl)[1324]; ((void (APIENTRY *)(GLenum target, GLenum pname, GLfixed *params)) _func)(target, pname, params); } GLAPI void APIENTRY GLAPI_PREFIX(PointParameterx)(GLenum pname, GLfixed param) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1321]; + mapi_func _func = ((const mapi_func *) _tbl)[1325]; ((void (APIENTRY *)(GLenum pname, GLfixed param)) _func)(pname, param); } GLAPI void APIENTRY GLAPI_PREFIX(PointParameterxv)(GLenum pname, const GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1322]; + mapi_func _func = ((const mapi_func *) _tbl)[1326]; ((void (APIENTRY *)(GLenum pname, const GLfixed *params)) _func)(pname, params); } GLAPI void APIENTRY GLAPI_PREFIX(TexParameterxv)(GLenum target, GLenum pname, const GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); - mapi_func _func = ((const mapi_func *) _tbl)[1323]; + mapi_func _func = ((const mapi_func *) _tbl)[1327]; ((void (APIENTRY *)(GLenum target, GLenum pname, const GLfixed *params)) _func)(target, pname, params); } +GLAPI void APIENTRY GLAPI_PREFIX(BlendBarrier)(void) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[1328]; + ((void (APIENTRY *)(void)) _func)(); +} + +GLAPI void APIENTRY GLAPI_PREFIX(PrimitiveBoundingBox)(GLfloat minX, GLfloat minY, GLfloat minZ, GLfloat minW, GLfloat maxX, GLfloat maxY, GLfloat maxZ, GLfloat maxW) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[1329]; + ((void (APIENTRY *)(GLfloat minX, GLfloat minY, GLfloat minZ, GLfloat minW, GLfloat maxX, GLfloat maxY, GLfloat maxZ, GLfloat maxW)) _func)(minX, minY, minZ, minW, maxX, maxY, maxZ, maxW); +} + /* does not need public_entries */ #undef MAPI_TMP_PUBLIC_ENTRIES_NO_HIDDEN #endif /* MAPI_TMP_PUBLIC_ENTRIES_NO_HIDDEN */ @@ -13541,15 +13640,27 @@ STUB_ASM_ENTRY(GLAPI_PREFIX_STR(BlendEquationSeparateiARB))"\n" "\t"STUB_ASM_CODE("711")"\n" +".globl "GLAPI_PREFIX_STR(BlendEquationSeparatei)"\n" +".set "GLAPI_PREFIX_STR(BlendEquationSeparatei)", "GLAPI_PREFIX_STR(BlendEquationSeparateiARB)"\n" + STUB_ASM_ENTRY(GLAPI_PREFIX_STR(BlendEquationiARB))"\n" "\t"STUB_ASM_CODE("712")"\n" +".globl "GLAPI_PREFIX_STR(BlendEquationi)"\n" +".set "GLAPI_PREFIX_STR(BlendEquationi)", "GLAPI_PREFIX_STR(BlendEquationiARB)"\n" + STUB_ASM_ENTRY(GLAPI_PREFIX_STR(BlendFuncSeparateiARB))"\n" "\t"STUB_ASM_CODE("713")"\n" +".globl "GLAPI_PREFIX_STR(BlendFuncSeparatei)"\n" +".set "GLAPI_PREFIX_STR(BlendFuncSeparatei)", "GLAPI_PREFIX_STR(BlendFuncSeparateiARB)"\n" + STUB_ASM_ENTRY(GLAPI_PREFIX_STR(BlendFunciARB))"\n" "\t"STUB_ASM_CODE("714")"\n" +".globl "GLAPI_PREFIX_STR(BlendFunci)"\n" +".set "GLAPI_PREFIX_STR(BlendFunci)", "GLAPI_PREFIX_STR(BlendFunciARB)"\n" + STUB_ASM_ENTRY(GLAPI_PREFIX_STR(BindFragDataLocationIndexed))"\n" "\t"STUB_ASM_CODE("715")"\n" @@ -13718,6 +13829,9 @@ STUB_ASM_ENTRY(GLAPI_PREFIX_STR(DrawElementsIndirect))"\n" "\t"STUB_ASM_CODE("773")"\n" +STUB_ASM_ENTRY(GLAPI_PREFIX_STR(PatchParameteri))"\n" +"\t"STUB_ASM_CODE("801")"\n" + STUB_ASM_ENTRY(GLAPI_PREFIX_STR(BindTransformFeedback))"\n" "\t"STUB_ASM_CODE("802")"\n" @@ -13808,6 +13922,9 @@ STUB_ASM_ENTRY(GLAPI_PREFIX_STR(GetGraphicsResetStatusARB))"\n" "\t"STUB_ASM_CODE("841")"\n" +".globl "GLAPI_PREFIX_STR(GetGraphicsResetStatus)"\n" +".set "GLAPI_PREFIX_STR(GetGraphicsResetStatus)", "GLAPI_PREFIX_STR(GetGraphicsResetStatusARB)"\n" + STUB_ASM_ENTRY(GLAPI_PREFIX_STR(GetnColorTableARB))"\n" "\t"STUB_ASM_CODE("842")"\n" @@ -13856,15 +13973,27 @@ STUB_ASM_ENTRY(GLAPI_PREFIX_STR(GetnUniformfvARB))"\n" "\t"STUB_ASM_CODE("857")"\n" +".globl "GLAPI_PREFIX_STR(GetnUniformfv)"\n" +".set "GLAPI_PREFIX_STR(GetnUniformfv)", "GLAPI_PREFIX_STR(GetnUniformfvARB)"\n" + STUB_ASM_ENTRY(GLAPI_PREFIX_STR(GetnUniformivARB))"\n" "\t"STUB_ASM_CODE("858")"\n" +".globl "GLAPI_PREFIX_STR(GetnUniformiv)"\n" +".set "GLAPI_PREFIX_STR(GetnUniformiv)", "GLAPI_PREFIX_STR(GetnUniformivARB)"\n" + STUB_ASM_ENTRY(GLAPI_PREFIX_STR(GetnUniformuivARB))"\n" "\t"STUB_ASM_CODE("859")"\n" +".globl "GLAPI_PREFIX_STR(GetnUniformuiv)"\n" +".set "GLAPI_PREFIX_STR(GetnUniformuiv)", "GLAPI_PREFIX_STR(GetnUniformuivARB)"\n" + STUB_ASM_ENTRY(GLAPI_PREFIX_STR(ReadnPixelsARB))"\n" "\t"STUB_ASM_CODE("860")"\n" +".globl "GLAPI_PREFIX_STR(ReadnPixels)"\n" +".set "GLAPI_PREFIX_STR(ReadnPixels)", "GLAPI_PREFIX_STR(ReadnPixelsARB)"\n" + STUB_ASM_ENTRY(GLAPI_PREFIX_STR(DrawArraysInstancedBaseInstance))"\n" "\t"STUB_ASM_CODE("861")"\n" @@ -14007,481 +14136,487 @@ "\t"STUB_ASM_CODE("911")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(InvalidateBufferData))"\n" -"\t"STUB_ASM_CODE("1014")"\n" +"\t"STUB_ASM_CODE("1015")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(InvalidateBufferSubData))"\n" -"\t"STUB_ASM_CODE("1015")"\n" +"\t"STUB_ASM_CODE("1016")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(InvalidateFramebuffer))"\n" -"\t"STUB_ASM_CODE("1016")"\n" +"\t"STUB_ASM_CODE("1017")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(InvalidateSubFramebuffer))"\n" -"\t"STUB_ASM_CODE("1017")"\n" +"\t"STUB_ASM_CODE("1018")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(InvalidateTexImage))"\n" -"\t"STUB_ASM_CODE("1018")"\n" +"\t"STUB_ASM_CODE("1019")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(InvalidateTexSubImage))"\n" -"\t"STUB_ASM_CODE("1019")"\n" +"\t"STUB_ASM_CODE("1020")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(PointSizePointerOES))"\n" -"\t"STUB_ASM_CODE("1029")"\n" +"\t"STUB_ASM_CODE("1030")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(ColorPointerEXT))"\n" -"\t"STUB_ASM_CODE("1033")"\n" +"\t"STUB_ASM_CODE("1034")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(EdgeFlagPointerEXT))"\n" -"\t"STUB_ASM_CODE("1034")"\n" +"\t"STUB_ASM_CODE("1035")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(IndexPointerEXT))"\n" -"\t"STUB_ASM_CODE("1035")"\n" +"\t"STUB_ASM_CODE("1036")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(NormalPointerEXT))"\n" -"\t"STUB_ASM_CODE("1036")"\n" +"\t"STUB_ASM_CODE("1037")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(TexCoordPointerEXT))"\n" -"\t"STUB_ASM_CODE("1037")"\n" +"\t"STUB_ASM_CODE("1038")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(VertexPointerEXT))"\n" -"\t"STUB_ASM_CODE("1038")"\n" +"\t"STUB_ASM_CODE("1039")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(ActiveShaderProgram))"\n" -"\t"STUB_ASM_CODE("1040")"\n" +"\t"STUB_ASM_CODE("1041")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(BindProgramPipeline))"\n" -"\t"STUB_ASM_CODE("1041")"\n" +"\t"STUB_ASM_CODE("1042")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(CreateShaderProgramv))"\n" -"\t"STUB_ASM_CODE("1042")"\n" +"\t"STUB_ASM_CODE("1043")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(DeleteProgramPipelines))"\n" -"\t"STUB_ASM_CODE("1043")"\n" +"\t"STUB_ASM_CODE("1044")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(GenProgramPipelines))"\n" -"\t"STUB_ASM_CODE("1044")"\n" +"\t"STUB_ASM_CODE("1045")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(GetProgramPipelineInfoLog))"\n" -"\t"STUB_ASM_CODE("1045")"\n" +"\t"STUB_ASM_CODE("1046")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(GetProgramPipelineiv))"\n" -"\t"STUB_ASM_CODE("1046")"\n" +"\t"STUB_ASM_CODE("1047")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(IsProgramPipeline))"\n" -"\t"STUB_ASM_CODE("1047")"\n" +"\t"STUB_ASM_CODE("1048")"\n" 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STUB_ASM_ENTRY(GLAPI_PREFIX_STR(LightModelx))"\n" -"\t"STUB_ASM_CODE("1290")"\n" +"\t"STUB_ASM_CODE("1294")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(LightModelxv))"\n" -"\t"STUB_ASM_CODE("1291")"\n" +"\t"STUB_ASM_CODE("1295")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(Lightx))"\n" -"\t"STUB_ASM_CODE("1292")"\n" +"\t"STUB_ASM_CODE("1296")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(Lightxv))"\n" -"\t"STUB_ASM_CODE("1293")"\n" +"\t"STUB_ASM_CODE("1297")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(LineWidthx))"\n" -"\t"STUB_ASM_CODE("1294")"\n" +"\t"STUB_ASM_CODE("1298")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(LoadMatrixx))"\n" -"\t"STUB_ASM_CODE("1295")"\n" +"\t"STUB_ASM_CODE("1299")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(Materialx))"\n" -"\t"STUB_ASM_CODE("1296")"\n" +"\t"STUB_ASM_CODE("1300")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(Materialxv))"\n" -"\t"STUB_ASM_CODE("1297")"\n" +"\t"STUB_ASM_CODE("1301")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(MultMatrixx))"\n" -"\t"STUB_ASM_CODE("1298")"\n" +"\t"STUB_ASM_CODE("1302")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(MultiTexCoord4x))"\n" -"\t"STUB_ASM_CODE("1299")"\n" +"\t"STUB_ASM_CODE("1303")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(Normal3x))"\n" -"\t"STUB_ASM_CODE("1300")"\n" +"\t"STUB_ASM_CODE("1304")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(Orthof))"\n" -"\t"STUB_ASM_CODE("1301")"\n" +"\t"STUB_ASM_CODE("1305")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(Orthox))"\n" -"\t"STUB_ASM_CODE("1302")"\n" +"\t"STUB_ASM_CODE("1306")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(PointSizex))"\n" -"\t"STUB_ASM_CODE("1303")"\n" +"\t"STUB_ASM_CODE("1307")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(PolygonOffsetx))"\n" -"\t"STUB_ASM_CODE("1304")"\n" +"\t"STUB_ASM_CODE("1308")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(Rotatex))"\n" -"\t"STUB_ASM_CODE("1305")"\n" +"\t"STUB_ASM_CODE("1309")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(SampleCoveragex))"\n" -"\t"STUB_ASM_CODE("1306")"\n" +"\t"STUB_ASM_CODE("1310")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(Scalex))"\n" -"\t"STUB_ASM_CODE("1307")"\n" +"\t"STUB_ASM_CODE("1311")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(TexEnvx))"\n" -"\t"STUB_ASM_CODE("1308")"\n" +"\t"STUB_ASM_CODE("1312")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(TexEnvxv))"\n" -"\t"STUB_ASM_CODE("1309")"\n" +"\t"STUB_ASM_CODE("1313")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(TexParameterx))"\n" -"\t"STUB_ASM_CODE("1310")"\n" +"\t"STUB_ASM_CODE("1314")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(Translatex))"\n" -"\t"STUB_ASM_CODE("1311")"\n" +"\t"STUB_ASM_CODE("1315")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(ClipPlanef))"\n" -"\t"STUB_ASM_CODE("1312")"\n" +"\t"STUB_ASM_CODE("1316")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(ClipPlanex))"\n" -"\t"STUB_ASM_CODE("1313")"\n" +"\t"STUB_ASM_CODE("1317")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(GetClipPlanef))"\n" -"\t"STUB_ASM_CODE("1314")"\n" +"\t"STUB_ASM_CODE("1318")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(GetClipPlanex))"\n" -"\t"STUB_ASM_CODE("1315")"\n" +"\t"STUB_ASM_CODE("1319")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(GetFixedv))"\n" -"\t"STUB_ASM_CODE("1316")"\n" +"\t"STUB_ASM_CODE("1320")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(GetLightxv))"\n" -"\t"STUB_ASM_CODE("1317")"\n" +"\t"STUB_ASM_CODE("1321")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(GetMaterialxv))"\n" -"\t"STUB_ASM_CODE("1318")"\n" +"\t"STUB_ASM_CODE("1322")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(GetTexEnvxv))"\n" -"\t"STUB_ASM_CODE("1319")"\n" +"\t"STUB_ASM_CODE("1323")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(GetTexParameterxv))"\n" -"\t"STUB_ASM_CODE("1320")"\n" +"\t"STUB_ASM_CODE("1324")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(PointParameterx))"\n" -"\t"STUB_ASM_CODE("1321")"\n" +"\t"STUB_ASM_CODE("1325")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(PointParameterxv))"\n" -"\t"STUB_ASM_CODE("1322")"\n" +"\t"STUB_ASM_CODE("1326")"\n" STUB_ASM_ENTRY(GLAPI_PREFIX_STR(TexParameterxv))"\n" -"\t"STUB_ASM_CODE("1323")"\n" +"\t"STUB_ASM_CODE("1327")"\n" + +STUB_ASM_ENTRY(GLAPI_PREFIX_STR(BlendBarrier))"\n" +"\t"STUB_ASM_CODE("1328")"\n" + +STUB_ASM_ENTRY(GLAPI_PREFIX_STR(PrimitiveBoundingBox))"\n" +"\t"STUB_ASM_CODE("1329")"\n" ); #undef MAPI_TMP_STUB_ASM_GCC_NO_HIDDEN diff -Nru mesa-12.0.6/src/mapi/glapi/glapi_priv.h mesa-17.0.7/src/mapi/glapi/glapi_priv.h --- mesa-12.0.6/src/mapi/glapi/glapi_priv.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/glapi_priv.h 2017-06-01 10:37:10.000000000 +0000 @@ -53,16 +53,6 @@ extern "C" { #endif -/* getproc */ - -extern void -_glapi_check_table_not_null(const struct _glapi_table *table); - - -extern void -_glapi_check_table(const struct _glapi_table *table); - - /* entrypoint */ extern void diff -Nru mesa-12.0.6/src/mapi/glapi/glapi_sparc.S mesa-17.0.7/src/mapi/glapi/glapi_sparc.S --- mesa-12.0.6/src/mapi/glapi/glapi_sparc.S 2017-01-24 01:43:08.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/glapi_sparc.S 2017-06-01 10:37:55.000000000 +0000 @@ -1026,8 +1026,7 @@ HIDDEN(gl_dispatch_stub_799) GL_STUB(gl_dispatch_stub_800, 800) HIDDEN(gl_dispatch_stub_800) - GL_STUB(gl_dispatch_stub_801, 801) - HIDDEN(gl_dispatch_stub_801) + GL_STUB(glPatchParameteri, 801) GL_STUB(glBindTransformFeedback, 802) GL_STUB(glDeleteTransformFeedbacks, 803) GL_STUB(glDrawTransformFeedback, 804) @@ -1356,14 +1355,14 @@ HIDDEN(gl_dispatch_stub_1012) GL_STUB(gl_dispatch_stub_1013, 1013) HIDDEN(gl_dispatch_stub_1013) - GL_STUB(glInvalidateBufferData, 1014) - GL_STUB(glInvalidateBufferSubData, 1015) - GL_STUB(glInvalidateFramebuffer, 1016) - GL_STUB(glInvalidateSubFramebuffer, 1017) - GL_STUB(glInvalidateTexImage, 1018) - GL_STUB(glInvalidateTexSubImage, 1019) - GL_STUB(gl_dispatch_stub_1020, 1020) - HIDDEN(gl_dispatch_stub_1020) + GL_STUB(gl_dispatch_stub_1014, 1014) + HIDDEN(gl_dispatch_stub_1014) + GL_STUB(glInvalidateBufferData, 1015) + GL_STUB(glInvalidateBufferSubData, 1016) + GL_STUB(glInvalidateFramebuffer, 1017) + GL_STUB(glInvalidateSubFramebuffer, 1018) + GL_STUB(glInvalidateTexImage, 1019) + GL_STUB(glInvalidateTexSubImage, 1020) GL_STUB(gl_dispatch_stub_1021, 1021) HIDDEN(gl_dispatch_stub_1021) GL_STUB(gl_dispatch_stub_1022, 1022) @@ -1380,117 +1379,117 @@ HIDDEN(gl_dispatch_stub_1027) GL_STUB(gl_dispatch_stub_1028, 1028) HIDDEN(gl_dispatch_stub_1028) - GL_STUB(glPointSizePointerOES, 1029) - GL_STUB(gl_dispatch_stub_1030, 1030) - HIDDEN(gl_dispatch_stub_1030) + GL_STUB(gl_dispatch_stub_1029, 1029) + HIDDEN(gl_dispatch_stub_1029) + GL_STUB(glPointSizePointerOES, 1030) GL_STUB(gl_dispatch_stub_1031, 1031) HIDDEN(gl_dispatch_stub_1031) GL_STUB(gl_dispatch_stub_1032, 1032) HIDDEN(gl_dispatch_stub_1032) - GL_STUB(glColorPointerEXT, 1033) - GL_STUB(glEdgeFlagPointerEXT, 1034) - GL_STUB(glIndexPointerEXT, 1035) - GL_STUB(glNormalPointerEXT, 1036) - GL_STUB(glTexCoordPointerEXT, 1037) - GL_STUB(glVertexPointerEXT, 1038) - GL_STUB(gl_dispatch_stub_1039, 1039) - HIDDEN(gl_dispatch_stub_1039) - GL_STUB(glActiveShaderProgram, 1040) - GL_STUB(glBindProgramPipeline, 1041) - GL_STUB(glCreateShaderProgramv, 1042) - GL_STUB(glDeleteProgramPipelines, 1043) - GL_STUB(glGenProgramPipelines, 1044) - GL_STUB(glGetProgramPipelineInfoLog, 1045) - GL_STUB(glGetProgramPipelineiv, 1046) - GL_STUB(glIsProgramPipeline, 1047) - GL_STUB(glLockArraysEXT, 1048) - GL_STUB(gl_dispatch_stub_1049, 1049) - HIDDEN(gl_dispatch_stub_1049) + GL_STUB(gl_dispatch_stub_1033, 1033) + HIDDEN(gl_dispatch_stub_1033) + GL_STUB(glColorPointerEXT, 1034) + GL_STUB(glEdgeFlagPointerEXT, 1035) + GL_STUB(glIndexPointerEXT, 1036) + GL_STUB(glNormalPointerEXT, 1037) + GL_STUB(glTexCoordPointerEXT, 1038) + GL_STUB(glVertexPointerEXT, 1039) + GL_STUB(gl_dispatch_stub_1040, 1040) + HIDDEN(gl_dispatch_stub_1040) + GL_STUB(glActiveShaderProgram, 1041) + GL_STUB(glBindProgramPipeline, 1042) + GL_STUB(glCreateShaderProgramv, 1043) + GL_STUB(glDeleteProgramPipelines, 1044) + GL_STUB(glGenProgramPipelines, 1045) + GL_STUB(glGetProgramPipelineInfoLog, 1046) + GL_STUB(glGetProgramPipelineiv, 1047) + GL_STUB(glIsProgramPipeline, 1048) + GL_STUB(glLockArraysEXT, 1049) GL_STUB(gl_dispatch_stub_1050, 1050) HIDDEN(gl_dispatch_stub_1050) - GL_STUB(glProgramUniform1f, 1051) - GL_STUB(glProgramUniform1fv, 1052) - GL_STUB(glProgramUniform1i, 1053) - GL_STUB(glProgramUniform1iv, 1054) - GL_STUB(glProgramUniform1ui, 1055) - GL_STUB(glProgramUniform1uiv, 1056) - GL_STUB(gl_dispatch_stub_1057, 1057) - HIDDEN(gl_dispatch_stub_1057) + GL_STUB(gl_dispatch_stub_1051, 1051) + HIDDEN(gl_dispatch_stub_1051) + GL_STUB(glProgramUniform1f, 1052) + GL_STUB(glProgramUniform1fv, 1053) + GL_STUB(glProgramUniform1i, 1054) + GL_STUB(glProgramUniform1iv, 1055) + GL_STUB(glProgramUniform1ui, 1056) + GL_STUB(glProgramUniform1uiv, 1057) GL_STUB(gl_dispatch_stub_1058, 1058) HIDDEN(gl_dispatch_stub_1058) - GL_STUB(glProgramUniform2f, 1059) - GL_STUB(glProgramUniform2fv, 1060) - GL_STUB(glProgramUniform2i, 1061) - GL_STUB(glProgramUniform2iv, 1062) - GL_STUB(glProgramUniform2ui, 1063) - GL_STUB(glProgramUniform2uiv, 1064) - GL_STUB(gl_dispatch_stub_1065, 1065) - HIDDEN(gl_dispatch_stub_1065) + GL_STUB(gl_dispatch_stub_1059, 1059) + HIDDEN(gl_dispatch_stub_1059) + GL_STUB(glProgramUniform2f, 1060) + GL_STUB(glProgramUniform2fv, 1061) + GL_STUB(glProgramUniform2i, 1062) + GL_STUB(glProgramUniform2iv, 1063) + GL_STUB(glProgramUniform2ui, 1064) + GL_STUB(glProgramUniform2uiv, 1065) GL_STUB(gl_dispatch_stub_1066, 1066) HIDDEN(gl_dispatch_stub_1066) - GL_STUB(glProgramUniform3f, 1067) - GL_STUB(glProgramUniform3fv, 1068) - GL_STUB(glProgramUniform3i, 1069) - GL_STUB(glProgramUniform3iv, 1070) - GL_STUB(glProgramUniform3ui, 1071) - GL_STUB(glProgramUniform3uiv, 1072) - GL_STUB(gl_dispatch_stub_1073, 1073) - HIDDEN(gl_dispatch_stub_1073) + GL_STUB(gl_dispatch_stub_1067, 1067) + HIDDEN(gl_dispatch_stub_1067) + GL_STUB(glProgramUniform3f, 1068) + GL_STUB(glProgramUniform3fv, 1069) + GL_STUB(glProgramUniform3i, 1070) + GL_STUB(glProgramUniform3iv, 1071) + GL_STUB(glProgramUniform3ui, 1072) + GL_STUB(glProgramUniform3uiv, 1073) GL_STUB(gl_dispatch_stub_1074, 1074) HIDDEN(gl_dispatch_stub_1074) - GL_STUB(glProgramUniform4f, 1075) - GL_STUB(glProgramUniform4fv, 1076) - GL_STUB(glProgramUniform4i, 1077) - GL_STUB(glProgramUniform4iv, 1078) - GL_STUB(glProgramUniform4ui, 1079) - GL_STUB(glProgramUniform4uiv, 1080) - GL_STUB(gl_dispatch_stub_1081, 1081) - HIDDEN(gl_dispatch_stub_1081) - GL_STUB(glProgramUniformMatrix2fv, 1082) - GL_STUB(gl_dispatch_stub_1083, 1083) - HIDDEN(gl_dispatch_stub_1083) - GL_STUB(glProgramUniformMatrix2x3fv, 1084) - GL_STUB(gl_dispatch_stub_1085, 1085) - HIDDEN(gl_dispatch_stub_1085) - GL_STUB(glProgramUniformMatrix2x4fv, 1086) - GL_STUB(gl_dispatch_stub_1087, 1087) - HIDDEN(gl_dispatch_stub_1087) - GL_STUB(glProgramUniformMatrix3fv, 1088) - GL_STUB(gl_dispatch_stub_1089, 1089) - HIDDEN(gl_dispatch_stub_1089) - GL_STUB(glProgramUniformMatrix3x2fv, 1090) - GL_STUB(gl_dispatch_stub_1091, 1091) - HIDDEN(gl_dispatch_stub_1091) - GL_STUB(glProgramUniformMatrix3x4fv, 1092) - GL_STUB(gl_dispatch_stub_1093, 1093) - HIDDEN(gl_dispatch_stub_1093) - GL_STUB(glProgramUniformMatrix4fv, 1094) - GL_STUB(gl_dispatch_stub_1095, 1095) - HIDDEN(gl_dispatch_stub_1095) - GL_STUB(glProgramUniformMatrix4x2fv, 1096) - GL_STUB(gl_dispatch_stub_1097, 1097) - HIDDEN(gl_dispatch_stub_1097) - GL_STUB(glProgramUniformMatrix4x3fv, 1098) - GL_STUB(glUnlockArraysEXT, 1099) - GL_STUB(glUseProgramStages, 1100) - GL_STUB(glValidateProgramPipeline, 1101) - GL_STUB(glDebugMessageCallback, 1102) - GL_STUB(glDebugMessageControl, 1103) - GL_STUB(glDebugMessageInsert, 1104) - GL_STUB(glGetDebugMessageLog, 1105) - GL_STUB(glGetObjectLabel, 1106) - GL_STUB(glGetObjectPtrLabel, 1107) - GL_STUB(glObjectLabel, 1108) - GL_STUB(glObjectPtrLabel, 1109) - GL_STUB(glPopDebugGroup, 1110) - GL_STUB(glPushDebugGroup, 1111) - GL_STUB(glSecondaryColor3fEXT, 1112) - GL_STUB(glSecondaryColor3fvEXT, 1113) - GL_STUB(glMultiDrawElementsEXT, 1114) - GL_STUB(glFogCoordfEXT, 1115) - GL_STUB(glFogCoordfvEXT, 1116) - GL_STUB(gl_dispatch_stub_1117, 1117) - HIDDEN(gl_dispatch_stub_1117) + GL_STUB(gl_dispatch_stub_1075, 1075) + HIDDEN(gl_dispatch_stub_1075) + GL_STUB(glProgramUniform4f, 1076) + GL_STUB(glProgramUniform4fv, 1077) + GL_STUB(glProgramUniform4i, 1078) + GL_STUB(glProgramUniform4iv, 1079) + GL_STUB(glProgramUniform4ui, 1080) + GL_STUB(glProgramUniform4uiv, 1081) + GL_STUB(gl_dispatch_stub_1082, 1082) + HIDDEN(gl_dispatch_stub_1082) + GL_STUB(glProgramUniformMatrix2fv, 1083) + GL_STUB(gl_dispatch_stub_1084, 1084) + HIDDEN(gl_dispatch_stub_1084) + GL_STUB(glProgramUniformMatrix2x3fv, 1085) + GL_STUB(gl_dispatch_stub_1086, 1086) + HIDDEN(gl_dispatch_stub_1086) + GL_STUB(glProgramUniformMatrix2x4fv, 1087) + GL_STUB(gl_dispatch_stub_1088, 1088) + HIDDEN(gl_dispatch_stub_1088) + GL_STUB(glProgramUniformMatrix3fv, 1089) + GL_STUB(gl_dispatch_stub_1090, 1090) + HIDDEN(gl_dispatch_stub_1090) + GL_STUB(glProgramUniformMatrix3x2fv, 1091) + GL_STUB(gl_dispatch_stub_1092, 1092) + HIDDEN(gl_dispatch_stub_1092) + GL_STUB(glProgramUniformMatrix3x4fv, 1093) + GL_STUB(gl_dispatch_stub_1094, 1094) + HIDDEN(gl_dispatch_stub_1094) + GL_STUB(glProgramUniformMatrix4fv, 1095) + GL_STUB(gl_dispatch_stub_1096, 1096) + HIDDEN(gl_dispatch_stub_1096) + GL_STUB(glProgramUniformMatrix4x2fv, 1097) + GL_STUB(gl_dispatch_stub_1098, 1098) + HIDDEN(gl_dispatch_stub_1098) + GL_STUB(glProgramUniformMatrix4x3fv, 1099) + GL_STUB(glUnlockArraysEXT, 1100) + GL_STUB(glUseProgramStages, 1101) + GL_STUB(glValidateProgramPipeline, 1102) + GL_STUB(glDebugMessageCallback, 1103) + GL_STUB(glDebugMessageControl, 1104) + GL_STUB(glDebugMessageInsert, 1105) + GL_STUB(glGetDebugMessageLog, 1106) + GL_STUB(glGetObjectLabel, 1107) + GL_STUB(glGetObjectPtrLabel, 1108) + GL_STUB(glObjectLabel, 1109) + GL_STUB(glObjectPtrLabel, 1110) + GL_STUB(glPopDebugGroup, 1111) + GL_STUB(glPushDebugGroup, 1112) + GL_STUB(glSecondaryColor3fEXT, 1113) + GL_STUB(glSecondaryColor3fvEXT, 1114) + GL_STUB(glMultiDrawElementsEXT, 1115) + GL_STUB(glFogCoordfEXT, 1116) + GL_STUB(glFogCoordfvEXT, 1117) GL_STUB(gl_dispatch_stub_1118, 1118) HIDDEN(gl_dispatch_stub_1118) GL_STUB(gl_dispatch_stub_1119, 1119) @@ -1675,45 +1674,45 @@ HIDDEN(gl_dispatch_stub_1208) GL_STUB(gl_dispatch_stub_1209, 1209) HIDDEN(gl_dispatch_stub_1209) - GL_STUB(glPrimitiveRestartNV, 1210) + GL_STUB(gl_dispatch_stub_1210, 1210) + HIDDEN(gl_dispatch_stub_1210) GL_STUB(gl_dispatch_stub_1211, 1211) HIDDEN(gl_dispatch_stub_1211) GL_STUB(gl_dispatch_stub_1212, 1212) HIDDEN(gl_dispatch_stub_1212) - GL_STUB(gl_dispatch_stub_1213, 1213) - HIDDEN(gl_dispatch_stub_1213) + GL_STUB(glPrimitiveRestartNV, 1213) GL_STUB(gl_dispatch_stub_1214, 1214) HIDDEN(gl_dispatch_stub_1214) - GL_STUB(glBindFramebufferEXT, 1215) - GL_STUB(glBindRenderbufferEXT, 1216) + GL_STUB(gl_dispatch_stub_1215, 1215) + HIDDEN(gl_dispatch_stub_1215) + GL_STUB(gl_dispatch_stub_1216, 1216) + HIDDEN(gl_dispatch_stub_1216) GL_STUB(gl_dispatch_stub_1217, 1217) HIDDEN(gl_dispatch_stub_1217) - GL_STUB(gl_dispatch_stub_1218, 1218) - HIDDEN(gl_dispatch_stub_1218) - GL_STUB(gl_dispatch_stub_1219, 1219) - HIDDEN(gl_dispatch_stub_1219) - GL_STUB(glVertexAttribI1iEXT, 1220) - GL_STUB(glVertexAttribI1uiEXT, 1221) - GL_STUB(glVertexAttribI2iEXT, 1222) - GL_STUB(glVertexAttribI2ivEXT, 1223) - GL_STUB(glVertexAttribI2uiEXT, 1224) - GL_STUB(glVertexAttribI2uivEXT, 1225) - GL_STUB(glVertexAttribI3iEXT, 1226) - GL_STUB(glVertexAttribI3ivEXT, 1227) - GL_STUB(glVertexAttribI3uiEXT, 1228) - GL_STUB(glVertexAttribI3uivEXT, 1229) - GL_STUB(glVertexAttribI4iEXT, 1230) - GL_STUB(glVertexAttribI4ivEXT, 1231) - GL_STUB(glVertexAttribI4uiEXT, 1232) - GL_STUB(glVertexAttribI4uivEXT, 1233) - GL_STUB(glClearColorIiEXT, 1234) - GL_STUB(glClearColorIuiEXT, 1235) - GL_STUB(gl_dispatch_stub_1236, 1236) - HIDDEN(gl_dispatch_stub_1236) - GL_STUB(gl_dispatch_stub_1237, 1237) - HIDDEN(gl_dispatch_stub_1237) - GL_STUB(gl_dispatch_stub_1238, 1238) - HIDDEN(gl_dispatch_stub_1238) + GL_STUB(glBindFramebufferEXT, 1218) + GL_STUB(glBindRenderbufferEXT, 1219) + GL_STUB(gl_dispatch_stub_1220, 1220) + HIDDEN(gl_dispatch_stub_1220) + GL_STUB(gl_dispatch_stub_1221, 1221) + HIDDEN(gl_dispatch_stub_1221) + GL_STUB(gl_dispatch_stub_1222, 1222) + HIDDEN(gl_dispatch_stub_1222) + GL_STUB(glVertexAttribI1iEXT, 1223) + GL_STUB(glVertexAttribI1uiEXT, 1224) + GL_STUB(glVertexAttribI2iEXT, 1225) + GL_STUB(glVertexAttribI2ivEXT, 1226) + GL_STUB(glVertexAttribI2uiEXT, 1227) + GL_STUB(glVertexAttribI2uivEXT, 1228) + GL_STUB(glVertexAttribI3iEXT, 1229) + GL_STUB(glVertexAttribI3ivEXT, 1230) + GL_STUB(glVertexAttribI3uiEXT, 1231) + GL_STUB(glVertexAttribI3uivEXT, 1232) + GL_STUB(glVertexAttribI4iEXT, 1233) + GL_STUB(glVertexAttribI4ivEXT, 1234) + GL_STUB(glVertexAttribI4uiEXT, 1235) + GL_STUB(glVertexAttribI4uivEXT, 1236) + GL_STUB(glClearColorIiEXT, 1237) + GL_STUB(glClearColorIuiEXT, 1238) GL_STUB(gl_dispatch_stub_1239, 1239) HIDDEN(gl_dispatch_stub_1239) GL_STUB(gl_dispatch_stub_1240, 1240) @@ -1744,13 +1743,13 @@ HIDDEN(gl_dispatch_stub_1252) GL_STUB(gl_dispatch_stub_1253, 1253) HIDDEN(gl_dispatch_stub_1253) - GL_STUB(glTextureBarrierNV, 1254) + GL_STUB(gl_dispatch_stub_1254, 1254) + HIDDEN(gl_dispatch_stub_1254) GL_STUB(gl_dispatch_stub_1255, 1255) HIDDEN(gl_dispatch_stub_1255) GL_STUB(gl_dispatch_stub_1256, 1256) HIDDEN(gl_dispatch_stub_1256) - GL_STUB(gl_dispatch_stub_1257, 1257) - HIDDEN(gl_dispatch_stub_1257) + GL_STUB(glTextureBarrierNV, 1257) GL_STUB(gl_dispatch_stub_1258, 1258) HIDDEN(gl_dispatch_stub_1258) GL_STUB(gl_dispatch_stub_1259, 1259) @@ -1797,49 +1796,59 @@ HIDDEN(gl_dispatch_stub_1279) GL_STUB(gl_dispatch_stub_1280, 1280) HIDDEN(gl_dispatch_stub_1280) - GL_STUB(glAlphaFuncx, 1281) - GL_STUB(glClearColorx, 1282) - GL_STUB(glClearDepthx, 1283) - GL_STUB(glColor4x, 1284) - GL_STUB(glDepthRangex, 1285) - GL_STUB(glFogx, 1286) - GL_STUB(glFogxv, 1287) - GL_STUB(glFrustumf, 1288) - GL_STUB(glFrustumx, 1289) - GL_STUB(glLightModelx, 1290) - GL_STUB(glLightModelxv, 1291) - GL_STUB(glLightx, 1292) - GL_STUB(glLightxv, 1293) - GL_STUB(glLineWidthx, 1294) - GL_STUB(glLoadMatrixx, 1295) - GL_STUB(glMaterialx, 1296) - GL_STUB(glMaterialxv, 1297) - GL_STUB(glMultMatrixx, 1298) - GL_STUB(glMultiTexCoord4x, 1299) - GL_STUB(glNormal3x, 1300) - GL_STUB(glOrthof, 1301) - GL_STUB(glOrthox, 1302) - GL_STUB(glPointSizex, 1303) - GL_STUB(glPolygonOffsetx, 1304) - GL_STUB(glRotatex, 1305) - GL_STUB(glSampleCoveragex, 1306) - GL_STUB(glScalex, 1307) - GL_STUB(glTexEnvx, 1308) - GL_STUB(glTexEnvxv, 1309) - GL_STUB(glTexParameterx, 1310) - GL_STUB(glTranslatex, 1311) - GL_STUB(glClipPlanef, 1312) - GL_STUB(glClipPlanex, 1313) - GL_STUB(glGetClipPlanef, 1314) - GL_STUB(glGetClipPlanex, 1315) - GL_STUB(glGetFixedv, 1316) - GL_STUB(glGetLightxv, 1317) - GL_STUB(glGetMaterialxv, 1318) - GL_STUB(glGetTexEnvxv, 1319) - GL_STUB(glGetTexParameterxv, 1320) - GL_STUB(glPointParameterx, 1321) - GL_STUB(glPointParameterxv, 1322) - GL_STUB(glTexParameterxv, 1323) + GL_STUB(gl_dispatch_stub_1281, 1281) + HIDDEN(gl_dispatch_stub_1281) + GL_STUB(gl_dispatch_stub_1282, 1282) + HIDDEN(gl_dispatch_stub_1282) + GL_STUB(gl_dispatch_stub_1283, 1283) + HIDDEN(gl_dispatch_stub_1283) + GL_STUB(gl_dispatch_stub_1284, 1284) + HIDDEN(gl_dispatch_stub_1284) + GL_STUB(glAlphaFuncx, 1285) + GL_STUB(glClearColorx, 1286) + GL_STUB(glClearDepthx, 1287) + GL_STUB(glColor4x, 1288) + GL_STUB(glDepthRangex, 1289) + GL_STUB(glFogx, 1290) + GL_STUB(glFogxv, 1291) + GL_STUB(glFrustumf, 1292) + GL_STUB(glFrustumx, 1293) + GL_STUB(glLightModelx, 1294) + GL_STUB(glLightModelxv, 1295) + GL_STUB(glLightx, 1296) + GL_STUB(glLightxv, 1297) + GL_STUB(glLineWidthx, 1298) + GL_STUB(glLoadMatrixx, 1299) + GL_STUB(glMaterialx, 1300) + GL_STUB(glMaterialxv, 1301) + GL_STUB(glMultMatrixx, 1302) + GL_STUB(glMultiTexCoord4x, 1303) + GL_STUB(glNormal3x, 1304) + GL_STUB(glOrthof, 1305) + GL_STUB(glOrthox, 1306) + GL_STUB(glPointSizex, 1307) + GL_STUB(glPolygonOffsetx, 1308) + GL_STUB(glRotatex, 1309) + GL_STUB(glSampleCoveragex, 1310) + GL_STUB(glScalex, 1311) + GL_STUB(glTexEnvx, 1312) + GL_STUB(glTexEnvxv, 1313) + GL_STUB(glTexParameterx, 1314) + GL_STUB(glTranslatex, 1315) + GL_STUB(glClipPlanef, 1316) + GL_STUB(glClipPlanex, 1317) + GL_STUB(glGetClipPlanef, 1318) + GL_STUB(glGetClipPlanex, 1319) + GL_STUB(glGetFixedv, 1320) + GL_STUB(glGetLightxv, 1321) + GL_STUB(glGetMaterialxv, 1322) + GL_STUB(glGetTexEnvxv, 1323) + GL_STUB(glGetTexParameterxv, 1324) + GL_STUB(glPointParameterx, 1325) + GL_STUB(glPointParameterxv, 1326) + GL_STUB(glTexParameterxv, 1327) + GL_STUB(glBlendBarrier, 1328) + GL_STUB(glPrimitiveBoundingBox, 1329) GL_STUB_ALIAS(glTexGenfOES, glTexGenf) GL_STUB_ALIAS(glTexGenfvOES, glTexGenfv) GL_STUB_ALIAS(glTexGeniOES, glTexGeni) @@ -2212,6 +2221,7 @@ GL_STUB_ALIAS(glTexBufferARB, glTexBuffer) GL_STUB_ALIAS(glTexBufferEXT, glTexBuffer) GL_STUB_ALIAS(glTexBufferOES, glTexBuffer) + GL_STUB_ALIAS(glFramebufferTextureEXT, glFramebufferTexture) GL_STUB_ALIAS(glFramebufferTextureOES, glFramebufferTexture) GL_STUB_ALIAS(glVertexAttribDivisorARB, glVertexAttribDivisor) GL_STUB_ALIAS(glMinSampleShadingARB, glMinSampleShading) @@ -2313,11 +2323,20 @@ GL_STUB_ALIAS(glSamplerParameterIivOES, glSamplerParameterIiv) GL_STUB_ALIAS(glSamplerParameterIuivEXT, glSamplerParameterIuiv) GL_STUB_ALIAS(glSamplerParameterIuivOES, glSamplerParameterIuiv) + GL_STUB_ALIAS(glPatchParameteriEXT, glPatchParameteri) + GL_STUB_ALIAS(glPatchParameteriOES, glPatchParameteri) GL_STUB_ALIAS(glClearDepthfOES, glClearDepthf) GL_STUB_ALIAS(glDepthRangefOES, glDepthRangef) GL_STUB_ALIAS(glGetProgramBinaryOES, glGetProgramBinary) GL_STUB_ALIAS(glProgramBinaryOES, glProgramBinary) GL_STUB_ALIAS(glProgramParameteriEXT, glProgramParameteri) + GL_STUB_ALIAS(glGetFloati_vOES, glGetFloati_v) + GL_STUB_ALIAS(glScissorArrayvOES, glScissorArrayv) + GL_STUB_ALIAS(glScissorIndexedOES, glScissorIndexed) + GL_STUB_ALIAS(glScissorIndexedvOES, glScissorIndexedv) + GL_STUB_ALIAS(glViewportArrayvOES, glViewportArrayv) + GL_STUB_ALIAS(glViewportIndexedfOES, glViewportIndexedf) + GL_STUB_ALIAS(glViewportIndexedfvOES, glViewportIndexedfv) GL_STUB_ALIAS(glGetGraphicsResetStatus, glGetGraphicsResetStatusARB) GL_STUB_ALIAS(glGetGraphicsResetStatusKHR, glGetGraphicsResetStatusARB) GL_STUB_ALIAS(glGetnUniformfv, glGetnUniformfvARB) @@ -2457,6 +2476,10 @@ GL_STUB_ALIAS(glPointParameterxOES, glPointParameterx) GL_STUB_ALIAS(glPointParameterxvOES, glPointParameterxv) GL_STUB_ALIAS(glTexParameterxvOES, glTexParameterxv) + GL_STUB_ALIAS(glBlendBarrierKHR, glBlendBarrier) + GL_STUB_ALIAS(glPrimitiveBoundingBoxARB, glPrimitiveBoundingBox) + GL_STUB_ALIAS(glPrimitiveBoundingBoxEXT, glPrimitiveBoundingBox) + GL_STUB_ALIAS(glPrimitiveBoundingBoxOES, glPrimitiveBoundingBox) .globl gl_dispatch_functions_end HIDDEN(gl_dispatch_functions_end) diff -Nru mesa-12.0.6/src/mapi/glapi/glapitable.h mesa-17.0.7/src/mapi/glapi/glapitable.h --- mesa-12.0.6/src/mapi/glapi/glapitable.h 2017-01-24 01:42:39.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/glapitable.h 2017-06-01 10:37:42.000000000 +0000 @@ -953,418 +953,424 @@ void (GLAPIENTRYP BindSamplers)(GLuint first, GLsizei count, const GLuint * samplers); /* 909 */ void (GLAPIENTRYP BindTextures)(GLuint first, GLsizei count, const GLuint * textures); /* 910 */ void (GLAPIENTRYP BindVertexBuffers)(GLuint first, GLsizei count, const GLuint * buffers, const GLintptr * offsets, const GLsizei * strides); /* 911 */ - void (GLAPIENTRYP MultiDrawArraysIndirectCountARB)(GLenum mode, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); /* 912 */ - void (GLAPIENTRYP MultiDrawElementsIndirectCountARB)(GLenum mode, GLenum type, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); /* 913 */ - void (GLAPIENTRYP ClipControl)(GLenum origin, GLenum depth); /* 914 */ - void (GLAPIENTRYP BindTextureUnit)(GLuint unit, GLuint texture); /* 915 */ - void (GLAPIENTRYP BlitNamedFramebuffer)(GLuint readFramebuffer, GLuint drawFramebuffer, GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter); /* 916 */ - GLenum (GLAPIENTRYP CheckNamedFramebufferStatus)(GLuint framebuffer, GLenum target); /* 917 */ - void (GLAPIENTRYP ClearNamedBufferData)(GLuint buffer, GLenum internalformat, GLenum format, GLenum type, const GLvoid * data); /* 918 */ - void (GLAPIENTRYP ClearNamedBufferSubData)(GLuint buffer, GLenum internalformat, GLintptr offset, GLsizeiptr size, GLenum format, GLenum type, const GLvoid * data); /* 919 */ - void (GLAPIENTRYP ClearNamedFramebufferfi)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, GLfloat depth, GLint stencil); /* 920 */ - void (GLAPIENTRYP ClearNamedFramebufferfv)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLfloat * value); /* 921 */ - void (GLAPIENTRYP ClearNamedFramebufferiv)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLint * value); /* 922 */ - void (GLAPIENTRYP ClearNamedFramebufferuiv)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLuint * value); /* 923 */ - void (GLAPIENTRYP CompressedTextureSubImage1D)(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLsizei imageSize, const GLvoid * data); /* 924 */ - void (GLAPIENTRYP CompressedTextureSubImage2D)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const GLvoid * data); /* 925 */ - void (GLAPIENTRYP CompressedTextureSubImage3D)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid * data); /* 926 */ - void (GLAPIENTRYP CopyNamedBufferSubData)(GLuint readBuffer, GLuint writeBuffer, GLintptr readOffset, GLintptr writeOffset, GLsizeiptr size); /* 927 */ - void (GLAPIENTRYP CopyTextureSubImage1D)(GLuint texture, GLint level, GLint xoffset, GLint x, GLint y, GLsizei width); /* 928 */ - void (GLAPIENTRYP CopyTextureSubImage2D)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height); /* 929 */ - void (GLAPIENTRYP CopyTextureSubImage3D)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height); /* 930 */ - void (GLAPIENTRYP CreateBuffers)(GLsizei n, GLuint * buffers); /* 931 */ - void (GLAPIENTRYP CreateFramebuffers)(GLsizei n, GLuint * framebuffers); /* 932 */ - void (GLAPIENTRYP CreateProgramPipelines)(GLsizei n, GLuint * pipelines); /* 933 */ - void (GLAPIENTRYP CreateQueries)(GLenum target, GLsizei n, GLuint * ids); /* 934 */ - void (GLAPIENTRYP CreateRenderbuffers)(GLsizei n, GLuint * renderbuffers); /* 935 */ - void (GLAPIENTRYP CreateSamplers)(GLsizei n, GLuint * samplers); /* 936 */ - void (GLAPIENTRYP CreateTextures)(GLenum target, GLsizei n, GLuint * textures); /* 937 */ - void (GLAPIENTRYP CreateTransformFeedbacks)(GLsizei n, GLuint * ids); /* 938 */ - void (GLAPIENTRYP CreateVertexArrays)(GLsizei n, GLuint * arrays); /* 939 */ - void (GLAPIENTRYP DisableVertexArrayAttrib)(GLuint vaobj, GLuint index); /* 940 */ - void (GLAPIENTRYP EnableVertexArrayAttrib)(GLuint vaobj, GLuint index); /* 941 */ - void (GLAPIENTRYP FlushMappedNamedBufferRange)(GLuint buffer, GLintptr offset, GLsizeiptr length); /* 942 */ - void (GLAPIENTRYP GenerateTextureMipmap)(GLuint texture); /* 943 */ - void (GLAPIENTRYP GetCompressedTextureImage)(GLuint texture, GLint level, GLsizei bufSize, GLvoid * pixels); /* 944 */ - void (GLAPIENTRYP GetNamedBufferParameteri64v)(GLuint buffer, GLenum pname, GLint64 * params); /* 945 */ - void (GLAPIENTRYP GetNamedBufferParameteriv)(GLuint buffer, GLenum pname, GLint * params); /* 946 */ - void (GLAPIENTRYP GetNamedBufferPointerv)(GLuint buffer, GLenum pname, GLvoid ** params); /* 947 */ - void (GLAPIENTRYP GetNamedBufferSubData)(GLuint buffer, GLintptr offset, GLsizeiptr size, GLvoid * data); /* 948 */ - void (GLAPIENTRYP GetNamedFramebufferAttachmentParameteriv)(GLuint framebuffer, GLenum attachment, GLenum pname, GLint * params); /* 949 */ - void (GLAPIENTRYP GetNamedFramebufferParameteriv)(GLuint framebuffer, GLenum pname, GLint * param); /* 950 */ - void (GLAPIENTRYP GetNamedRenderbufferParameteriv)(GLuint renderbuffer, GLenum pname, GLint * params); /* 951 */ - void (GLAPIENTRYP GetQueryBufferObjecti64v)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); /* 952 */ - void (GLAPIENTRYP GetQueryBufferObjectiv)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); /* 953 */ - void (GLAPIENTRYP GetQueryBufferObjectui64v)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); /* 954 */ - void (GLAPIENTRYP GetQueryBufferObjectuiv)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); /* 955 */ - void (GLAPIENTRYP GetTextureImage)(GLuint texture, GLint level, GLenum format, GLenum type, GLsizei bufSize, GLvoid * pixels); /* 956 */ - void (GLAPIENTRYP GetTextureLevelParameterfv)(GLuint texture, GLint level, GLenum pname, GLfloat * params); /* 957 */ - void (GLAPIENTRYP GetTextureLevelParameteriv)(GLuint texture, GLint level, GLenum pname, GLint * params); /* 958 */ - void (GLAPIENTRYP GetTextureParameterIiv)(GLuint texture, GLenum pname, GLint * params); /* 959 */ - void (GLAPIENTRYP GetTextureParameterIuiv)(GLuint texture, GLenum pname, GLuint * params); /* 960 */ - void (GLAPIENTRYP GetTextureParameterfv)(GLuint texture, GLenum pname, GLfloat * params); /* 961 */ - void (GLAPIENTRYP GetTextureParameteriv)(GLuint texture, GLenum pname, GLint * params); /* 962 */ - void (GLAPIENTRYP GetTransformFeedbacki64_v)(GLuint xfb, GLenum pname, GLuint index, GLint64 * param); /* 963 */ - void (GLAPIENTRYP GetTransformFeedbacki_v)(GLuint xfb, GLenum pname, GLuint index, GLint * param); /* 964 */ - void (GLAPIENTRYP GetTransformFeedbackiv)(GLuint xfb, GLenum pname, GLint * param); /* 965 */ - void (GLAPIENTRYP GetVertexArrayIndexed64iv)(GLuint vaobj, GLuint index, GLenum pname, GLint64 * param); /* 966 */ - void (GLAPIENTRYP GetVertexArrayIndexediv)(GLuint vaobj, GLuint index, GLenum pname, GLint * param); /* 967 */ - void (GLAPIENTRYP GetVertexArrayiv)(GLuint vaobj, GLenum pname, GLint * param); /* 968 */ - void (GLAPIENTRYP InvalidateNamedFramebufferData)(GLuint framebuffer, GLsizei numAttachments, const GLenum * attachments); /* 969 */ - void (GLAPIENTRYP InvalidateNamedFramebufferSubData)(GLuint framebuffer, GLsizei numAttachments, const GLenum * attachments, GLint x, GLint y, GLsizei width, GLsizei height); /* 970 */ - GLvoid * (GLAPIENTRYP MapNamedBuffer)(GLuint buffer, GLenum access); /* 971 */ - GLvoid * (GLAPIENTRYP MapNamedBufferRange)(GLuint buffer, GLintptr offset, GLsizeiptr length, GLbitfield access); /* 972 */ - void (GLAPIENTRYP NamedBufferData)(GLuint buffer, GLsizeiptr size, const GLvoid * data, GLenum usage); /* 973 */ - void (GLAPIENTRYP NamedBufferStorage)(GLuint buffer, GLsizeiptr size, const GLvoid * data, GLbitfield flags); /* 974 */ - void (GLAPIENTRYP NamedBufferSubData)(GLuint buffer, GLintptr offset, GLsizeiptr size, const GLvoid * data); /* 975 */ - void (GLAPIENTRYP NamedFramebufferDrawBuffer)(GLuint framebuffer, GLenum buf); /* 976 */ - void (GLAPIENTRYP NamedFramebufferDrawBuffers)(GLuint framebuffer, GLsizei n, const GLenum * bufs); /* 977 */ - void (GLAPIENTRYP NamedFramebufferParameteri)(GLuint framebuffer, GLenum pname, GLint param); /* 978 */ - void (GLAPIENTRYP NamedFramebufferReadBuffer)(GLuint framebuffer, GLenum buf); /* 979 */ - void (GLAPIENTRYP NamedFramebufferRenderbuffer)(GLuint framebuffer, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer); /* 980 */ - void (GLAPIENTRYP NamedFramebufferTexture)(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level); /* 981 */ - void (GLAPIENTRYP NamedFramebufferTextureLayer)(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level, GLint layer); /* 982 */ - void (GLAPIENTRYP NamedRenderbufferStorage)(GLuint renderbuffer, GLenum internalformat, GLsizei width, GLsizei height); /* 983 */ - void (GLAPIENTRYP NamedRenderbufferStorageMultisample)(GLuint renderbuffer, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height); /* 984 */ - void (GLAPIENTRYP TextureBuffer)(GLuint texture, GLenum internalformat, GLuint buffer); /* 985 */ - void (GLAPIENTRYP TextureBufferRange)(GLuint texture, GLenum internalformat, GLuint buffer, GLintptr offset, GLsizeiptr size); /* 986 */ - void (GLAPIENTRYP TextureParameterIiv)(GLuint texture, GLenum pname, const GLint * params); /* 987 */ - void (GLAPIENTRYP TextureParameterIuiv)(GLuint texture, GLenum pname, const GLuint * params); /* 988 */ - void (GLAPIENTRYP TextureParameterf)(GLuint texture, GLenum pname, GLfloat param); /* 989 */ - void (GLAPIENTRYP TextureParameterfv)(GLuint texture, GLenum pname, const GLfloat * param); /* 990 */ - void (GLAPIENTRYP TextureParameteri)(GLuint texture, GLenum pname, GLint param); /* 991 */ - void (GLAPIENTRYP TextureParameteriv)(GLuint texture, GLenum pname, const GLint * param); /* 992 */ - void (GLAPIENTRYP TextureStorage1D)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width); /* 993 */ - void (GLAPIENTRYP TextureStorage2D)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height); /* 994 */ - void (GLAPIENTRYP TextureStorage2DMultisample)(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations); /* 995 */ - void (GLAPIENTRYP TextureStorage3D)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth); /* 996 */ - void (GLAPIENTRYP TextureStorage3DMultisample)(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedsamplelocations); /* 997 */ - void (GLAPIENTRYP TextureSubImage1D)(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLenum type, const GLvoid * pixels); /* 998 */ - void (GLAPIENTRYP TextureSubImage2D)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid * pixels); /* 999 */ - void (GLAPIENTRYP TextureSubImage3D)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid * pixels); /* 1000 */ - void (GLAPIENTRYP TransformFeedbackBufferBase)(GLuint xfb, GLuint index, GLuint buffer); /* 1001 */ - void (GLAPIENTRYP TransformFeedbackBufferRange)(GLuint xfb, GLuint index, GLuint buffer, GLintptr offset, GLsizeiptr size); /* 1002 */ - GLboolean (GLAPIENTRYP UnmapNamedBuffer)(GLuint buffer); /* 1003 */ - void (GLAPIENTRYP VertexArrayAttribBinding)(GLuint vaobj, GLuint attribindex, GLuint bindingindex); /* 1004 */ - void (GLAPIENTRYP VertexArrayAttribFormat)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLboolean normalized, GLuint relativeoffset); /* 1005 */ - void (GLAPIENTRYP VertexArrayAttribIFormat)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset); /* 1006 */ - void (GLAPIENTRYP VertexArrayAttribLFormat)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset); /* 1007 */ - void (GLAPIENTRYP VertexArrayBindingDivisor)(GLuint vaobj, GLuint bindingindex, GLuint divisor); /* 1008 */ - void (GLAPIENTRYP VertexArrayElementBuffer)(GLuint vaobj, GLuint buffer); /* 1009 */ - void (GLAPIENTRYP VertexArrayVertexBuffer)(GLuint vaobj, GLuint bindingindex, GLuint buffer, GLintptr offset, GLsizei stride); /* 1010 */ - void (GLAPIENTRYP VertexArrayVertexBuffers)(GLuint vaobj, GLuint first, GLsizei count, const GLuint * buffers, const GLintptr * offsets, const GLsizei * strides); /* 1011 */ - void (GLAPIENTRYP GetCompressedTextureSubImage)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLsizei bufSize, GLvoid * pixels); /* 1012 */ - void (GLAPIENTRYP GetTextureSubImage)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, GLsizei bufSize, GLvoid * pixels); /* 1013 */ - void (GLAPIENTRYP InvalidateBufferData)(GLuint buffer); /* 1014 */ - void (GLAPIENTRYP InvalidateBufferSubData)(GLuint buffer, GLintptr offset, GLsizeiptr length); /* 1015 */ - void (GLAPIENTRYP InvalidateFramebuffer)(GLenum target, GLsizei numAttachments, const GLenum * attachments); /* 1016 */ - void (GLAPIENTRYP InvalidateSubFramebuffer)(GLenum target, GLsizei numAttachments, const GLenum * attachments, GLint x, GLint y, GLsizei width, GLsizei height); /* 1017 */ - void (GLAPIENTRYP InvalidateTexImage)(GLuint texture, GLint level); /* 1018 */ - void (GLAPIENTRYP InvalidateTexSubImage)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth); /* 1019 */ - void (GLAPIENTRYP PolygonOffsetEXT)(GLfloat factor, GLfloat bias); /* 1020 */ - void (GLAPIENTRYP DrawTexfOES)(GLfloat x, GLfloat y, GLfloat z, GLfloat width, GLfloat height); /* 1021 */ - void (GLAPIENTRYP DrawTexfvOES)(const GLfloat * coords); /* 1022 */ - void (GLAPIENTRYP DrawTexiOES)(GLint x, GLint y, GLint z, GLint width, GLint height); /* 1023 */ - void (GLAPIENTRYP DrawTexivOES)(const GLint * coords); /* 1024 */ - void (GLAPIENTRYP DrawTexsOES)(GLshort x, GLshort y, GLshort z, GLshort width, GLshort height); /* 1025 */ - void (GLAPIENTRYP DrawTexsvOES)(const GLshort * coords); /* 1026 */ - void (GLAPIENTRYP DrawTexxOES)(GLfixed x, GLfixed y, GLfixed z, GLfixed width, GLfixed height); /* 1027 */ - void (GLAPIENTRYP DrawTexxvOES)(const GLfixed * coords); /* 1028 */ - void (GLAPIENTRYP PointSizePointerOES)(GLenum type, GLsizei stride, const GLvoid * pointer); /* 1029 */ - GLbitfield (GLAPIENTRYP QueryMatrixxOES)(GLfixed * mantissa, GLint * exponent); /* 1030 */ - void (GLAPIENTRYP SampleMaskSGIS)(GLclampf value, GLboolean invert); /* 1031 */ - void (GLAPIENTRYP SamplePatternSGIS)(GLenum pattern); /* 1032 */ - void (GLAPIENTRYP ColorPointerEXT)(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid * pointer); /* 1033 */ - void (GLAPIENTRYP EdgeFlagPointerEXT)(GLsizei stride, GLsizei count, const GLboolean * pointer); /* 1034 */ - void (GLAPIENTRYP IndexPointerEXT)(GLenum type, GLsizei stride, GLsizei count, const GLvoid * pointer); /* 1035 */ - void (GLAPIENTRYP NormalPointerEXT)(GLenum type, GLsizei stride, GLsizei count, const GLvoid * pointer); /* 1036 */ - void (GLAPIENTRYP TexCoordPointerEXT)(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid * pointer); /* 1037 */ - void (GLAPIENTRYP VertexPointerEXT)(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid * pointer); /* 1038 */ - void (GLAPIENTRYP DiscardFramebufferEXT)(GLenum target, GLsizei numAttachments, const GLenum * attachments); /* 1039 */ - void (GLAPIENTRYP ActiveShaderProgram)(GLuint pipeline, GLuint program); /* 1040 */ - void (GLAPIENTRYP BindProgramPipeline)(GLuint pipeline); /* 1041 */ - GLuint (GLAPIENTRYP CreateShaderProgramv)(GLenum type, GLsizei count, const GLchar * const * strings); /* 1042 */ - void (GLAPIENTRYP DeleteProgramPipelines)(GLsizei n, const GLuint * pipelines); /* 1043 */ - void (GLAPIENTRYP GenProgramPipelines)(GLsizei n, GLuint * pipelines); /* 1044 */ - void (GLAPIENTRYP GetProgramPipelineInfoLog)(GLuint pipeline, GLsizei bufSize, GLsizei * length, GLchar * infoLog); /* 1045 */ - void (GLAPIENTRYP GetProgramPipelineiv)(GLuint pipeline, GLenum pname, GLint * params); /* 1046 */ - GLboolean (GLAPIENTRYP IsProgramPipeline)(GLuint pipeline); /* 1047 */ - void (GLAPIENTRYP LockArraysEXT)(GLint first, GLsizei count); /* 1048 */ - void (GLAPIENTRYP ProgramUniform1d)(GLuint program, GLint location, GLdouble x); /* 1049 */ - void (GLAPIENTRYP ProgramUniform1dv)(GLuint program, GLint location, GLsizei count, const GLdouble * value); /* 1050 */ - void (GLAPIENTRYP ProgramUniform1f)(GLuint program, GLint location, GLfloat x); /* 1051 */ - void (GLAPIENTRYP ProgramUniform1fv)(GLuint program, GLint location, GLsizei count, const GLfloat * value); /* 1052 */ - void (GLAPIENTRYP ProgramUniform1i)(GLuint program, GLint location, GLint x); /* 1053 */ - void (GLAPIENTRYP ProgramUniform1iv)(GLuint program, GLint location, GLsizei count, const GLint * value); /* 1054 */ - void (GLAPIENTRYP ProgramUniform1ui)(GLuint program, GLint location, GLuint x); /* 1055 */ - void (GLAPIENTRYP ProgramUniform1uiv)(GLuint program, GLint location, GLsizei count, const GLuint * value); /* 1056 */ - void (GLAPIENTRYP ProgramUniform2d)(GLuint program, GLint location, GLdouble x, GLdouble y); /* 1057 */ - void (GLAPIENTRYP ProgramUniform2dv)(GLuint program, GLint location, GLsizei count, const GLdouble * value); /* 1058 */ - void (GLAPIENTRYP ProgramUniform2f)(GLuint program, GLint location, GLfloat x, GLfloat y); /* 1059 */ - void (GLAPIENTRYP ProgramUniform2fv)(GLuint program, GLint location, GLsizei count, const GLfloat * value); /* 1060 */ - void (GLAPIENTRYP ProgramUniform2i)(GLuint program, GLint location, GLint x, GLint y); /* 1061 */ - void (GLAPIENTRYP ProgramUniform2iv)(GLuint program, GLint location, GLsizei count, const GLint * value); /* 1062 */ - void (GLAPIENTRYP ProgramUniform2ui)(GLuint program, GLint location, GLuint x, GLuint y); /* 1063 */ - void (GLAPIENTRYP ProgramUniform2uiv)(GLuint program, GLint location, GLsizei count, const GLuint * value); /* 1064 */ - void (GLAPIENTRYP ProgramUniform3d)(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z); /* 1065 */ - void (GLAPIENTRYP ProgramUniform3dv)(GLuint program, GLint location, GLsizei count, const GLdouble * value); /* 1066 */ - void (GLAPIENTRYP ProgramUniform3f)(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z); /* 1067 */ - void (GLAPIENTRYP ProgramUniform3fv)(GLuint program, GLint location, GLsizei count, const GLfloat * value); /* 1068 */ - void (GLAPIENTRYP ProgramUniform3i)(GLuint program, GLint location, GLint x, GLint y, GLint z); /* 1069 */ - void (GLAPIENTRYP ProgramUniform3iv)(GLuint program, GLint location, GLsizei count, const GLint * value); /* 1070 */ - void (GLAPIENTRYP ProgramUniform3ui)(GLuint program, GLint location, GLuint x, GLuint y, GLuint z); /* 1071 */ - void (GLAPIENTRYP ProgramUniform3uiv)(GLuint program, GLint location, GLsizei count, const GLuint * value); /* 1072 */ - void (GLAPIENTRYP ProgramUniform4d)(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z, GLdouble w); /* 1073 */ - void (GLAPIENTRYP ProgramUniform4dv)(GLuint program, GLint location, GLsizei count, const GLdouble * value); /* 1074 */ - void (GLAPIENTRYP ProgramUniform4f)(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z, GLfloat w); /* 1075 */ - void (GLAPIENTRYP ProgramUniform4fv)(GLuint program, GLint location, GLsizei count, const GLfloat * value); /* 1076 */ - void (GLAPIENTRYP ProgramUniform4i)(GLuint program, GLint location, GLint x, GLint y, GLint z, GLint w); /* 1077 */ - void (GLAPIENTRYP ProgramUniform4iv)(GLuint program, GLint location, GLsizei count, const GLint * value); /* 1078 */ - void (GLAPIENTRYP ProgramUniform4ui)(GLuint program, GLint location, GLuint x, GLuint y, GLuint z, GLuint w); /* 1079 */ - void (GLAPIENTRYP ProgramUniform4uiv)(GLuint program, GLint location, GLsizei count, const GLuint * value); /* 1080 */ - void (GLAPIENTRYP ProgramUniformMatrix2dv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); /* 1081 */ - void (GLAPIENTRYP ProgramUniformMatrix2fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); /* 1082 */ - void (GLAPIENTRYP ProgramUniformMatrix2x3dv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); /* 1083 */ - void (GLAPIENTRYP ProgramUniformMatrix2x3fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); /* 1084 */ - void (GLAPIENTRYP ProgramUniformMatrix2x4dv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); /* 1085 */ - void (GLAPIENTRYP ProgramUniformMatrix2x4fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); /* 1086 */ - void (GLAPIENTRYP ProgramUniformMatrix3dv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); /* 1087 */ - void (GLAPIENTRYP ProgramUniformMatrix3fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); /* 1088 */ - void (GLAPIENTRYP ProgramUniformMatrix3x2dv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); /* 1089 */ - void (GLAPIENTRYP ProgramUniformMatrix3x2fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); /* 1090 */ - void (GLAPIENTRYP ProgramUniformMatrix3x4dv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); /* 1091 */ - void (GLAPIENTRYP ProgramUniformMatrix3x4fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); /* 1092 */ - void (GLAPIENTRYP ProgramUniformMatrix4dv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); /* 1093 */ - void (GLAPIENTRYP ProgramUniformMatrix4fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); /* 1094 */ - void (GLAPIENTRYP ProgramUniformMatrix4x2dv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); /* 1095 */ - void (GLAPIENTRYP ProgramUniformMatrix4x2fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); /* 1096 */ - void (GLAPIENTRYP ProgramUniformMatrix4x3dv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); /* 1097 */ - void (GLAPIENTRYP ProgramUniformMatrix4x3fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); /* 1098 */ - void (GLAPIENTRYP UnlockArraysEXT)(void); /* 1099 */ - void (GLAPIENTRYP UseProgramStages)(GLuint pipeline, GLbitfield stages, GLuint program); /* 1100 */ - void (GLAPIENTRYP ValidateProgramPipeline)(GLuint pipeline); /* 1101 */ - void (GLAPIENTRYP DebugMessageCallback)(GLDEBUGPROC callback, const GLvoid * userParam); /* 1102 */ - void (GLAPIENTRYP DebugMessageControl)(GLenum source, GLenum type, GLenum severity, GLsizei count, const GLuint * ids, GLboolean enabled); /* 1103 */ - void (GLAPIENTRYP DebugMessageInsert)(GLenum source, GLenum type, GLuint id, GLenum severity, GLsizei length, const GLchar * buf); /* 1104 */ - GLuint (GLAPIENTRYP GetDebugMessageLog)(GLuint count, GLsizei bufsize, GLenum * sources, GLenum * types, GLuint * ids, GLenum * severities, GLsizei * lengths, GLchar * messageLog); /* 1105 */ - void (GLAPIENTRYP GetObjectLabel)(GLenum identifier, GLuint name, GLsizei bufSize, GLsizei * length, GLchar * label); /* 1106 */ - void (GLAPIENTRYP GetObjectPtrLabel)(const GLvoid * ptr, GLsizei bufSize, GLsizei * length, GLchar * label); /* 1107 */ - void (GLAPIENTRYP ObjectLabel)(GLenum identifier, GLuint name, GLsizei length, const GLchar * label); /* 1108 */ - void (GLAPIENTRYP ObjectPtrLabel)(const GLvoid * ptr, GLsizei length, const GLchar * label); /* 1109 */ - void (GLAPIENTRYP PopDebugGroup)(void); /* 1110 */ - void (GLAPIENTRYP PushDebugGroup)(GLenum source, GLuint id, GLsizei length, const GLchar * message); /* 1111 */ - void (GLAPIENTRYP SecondaryColor3fEXT)(GLfloat red, GLfloat green, GLfloat blue); /* 1112 */ - void (GLAPIENTRYP SecondaryColor3fvEXT)(const GLfloat * v); /* 1113 */ - void (GLAPIENTRYP MultiDrawElementsEXT)(GLenum mode, const GLsizei * count, GLenum type, const GLvoid * const * indices, GLsizei primcount); /* 1114 */ - void (GLAPIENTRYP FogCoordfEXT)(GLfloat coord); /* 1115 */ - void (GLAPIENTRYP FogCoordfvEXT)(const GLfloat * coord); /* 1116 */ - void (GLAPIENTRYP ResizeBuffersMESA)(void); /* 1117 */ - void (GLAPIENTRYP WindowPos4dMESA)(GLdouble x, GLdouble y, GLdouble z, GLdouble w); /* 1118 */ - void (GLAPIENTRYP WindowPos4dvMESA)(const GLdouble * v); /* 1119 */ - void (GLAPIENTRYP WindowPos4fMESA)(GLfloat x, GLfloat y, GLfloat z, GLfloat w); /* 1120 */ - void (GLAPIENTRYP WindowPos4fvMESA)(const GLfloat * v); /* 1121 */ - void (GLAPIENTRYP WindowPos4iMESA)(GLint x, GLint y, GLint z, GLint w); /* 1122 */ - void (GLAPIENTRYP WindowPos4ivMESA)(const GLint * v); /* 1123 */ - void (GLAPIENTRYP WindowPos4sMESA)(GLshort x, GLshort y, GLshort z, GLshort w); /* 1124 */ - void (GLAPIENTRYP WindowPos4svMESA)(const GLshort * v); /* 1125 */ - void (GLAPIENTRYP MultiModeDrawArraysIBM)(const GLenum * mode, const GLint * first, const GLsizei * count, GLsizei primcount, GLint modestride); /* 1126 */ - void (GLAPIENTRYP MultiModeDrawElementsIBM)(const GLenum * mode, const GLsizei * count, GLenum type, const GLvoid * const * indices, GLsizei primcount, GLint modestride); /* 1127 */ - GLboolean (GLAPIENTRYP AreProgramsResidentNV)(GLsizei n, const GLuint * ids, GLboolean * residences); /* 1128 */ - void (GLAPIENTRYP ExecuteProgramNV)(GLenum target, GLuint id, const GLfloat * params); /* 1129 */ - void (GLAPIENTRYP GetProgramParameterdvNV)(GLenum target, GLuint index, GLenum pname, GLdouble * params); /* 1130 */ - void (GLAPIENTRYP GetProgramParameterfvNV)(GLenum target, GLuint index, GLenum pname, GLfloat * params); /* 1131 */ - void (GLAPIENTRYP GetProgramStringNV)(GLuint id, GLenum pname, GLubyte * program); /* 1132 */ - void (GLAPIENTRYP GetProgramivNV)(GLuint id, GLenum pname, GLint * params); /* 1133 */ - void (GLAPIENTRYP GetTrackMatrixivNV)(GLenum target, GLuint address, GLenum pname, GLint * params); /* 1134 */ - void (GLAPIENTRYP GetVertexAttribdvNV)(GLuint index, GLenum pname, GLdouble * params); /* 1135 */ - void (GLAPIENTRYP GetVertexAttribfvNV)(GLuint index, GLenum pname, GLfloat * params); /* 1136 */ - void (GLAPIENTRYP GetVertexAttribivNV)(GLuint index, GLenum pname, GLint * params); /* 1137 */ - void (GLAPIENTRYP LoadProgramNV)(GLenum target, GLuint id, GLsizei len, const GLubyte * program); /* 1138 */ - void (GLAPIENTRYP ProgramParameters4dvNV)(GLenum target, GLuint index, GLsizei num, const GLdouble * params); /* 1139 */ - void (GLAPIENTRYP ProgramParameters4fvNV)(GLenum target, GLuint index, GLsizei num, const GLfloat * params); /* 1140 */ - void (GLAPIENTRYP RequestResidentProgramsNV)(GLsizei n, const GLuint * ids); /* 1141 */ - void (GLAPIENTRYP TrackMatrixNV)(GLenum target, GLuint address, GLenum matrix, GLenum transform); /* 1142 */ - void (GLAPIENTRYP VertexAttrib1dNV)(GLuint index, GLdouble x); /* 1143 */ - void (GLAPIENTRYP VertexAttrib1dvNV)(GLuint index, const GLdouble * v); /* 1144 */ - void (GLAPIENTRYP VertexAttrib1fNV)(GLuint index, GLfloat x); /* 1145 */ - void (GLAPIENTRYP VertexAttrib1fvNV)(GLuint index, const GLfloat * v); /* 1146 */ - void (GLAPIENTRYP VertexAttrib1sNV)(GLuint index, GLshort x); /* 1147 */ - void (GLAPIENTRYP VertexAttrib1svNV)(GLuint index, const GLshort * v); /* 1148 */ - void (GLAPIENTRYP VertexAttrib2dNV)(GLuint index, GLdouble x, GLdouble y); /* 1149 */ - void (GLAPIENTRYP VertexAttrib2dvNV)(GLuint index, const GLdouble * v); /* 1150 */ - void (GLAPIENTRYP VertexAttrib2fNV)(GLuint index, GLfloat x, GLfloat y); /* 1151 */ - void (GLAPIENTRYP VertexAttrib2fvNV)(GLuint index, const GLfloat * v); /* 1152 */ - void (GLAPIENTRYP VertexAttrib2sNV)(GLuint index, GLshort x, GLshort y); /* 1153 */ - void (GLAPIENTRYP VertexAttrib2svNV)(GLuint index, const GLshort * v); /* 1154 */ - void (GLAPIENTRYP VertexAttrib3dNV)(GLuint index, GLdouble x, GLdouble y, GLdouble z); /* 1155 */ - void (GLAPIENTRYP VertexAttrib3dvNV)(GLuint index, const GLdouble * v); /* 1156 */ - void (GLAPIENTRYP VertexAttrib3fNV)(GLuint index, GLfloat x, GLfloat y, GLfloat z); /* 1157 */ - void (GLAPIENTRYP VertexAttrib3fvNV)(GLuint index, const GLfloat * v); /* 1158 */ - void (GLAPIENTRYP VertexAttrib3sNV)(GLuint index, GLshort x, GLshort y, GLshort z); /* 1159 */ - void (GLAPIENTRYP VertexAttrib3svNV)(GLuint index, const GLshort * v); /* 1160 */ - void (GLAPIENTRYP VertexAttrib4dNV)(GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w); /* 1161 */ - void (GLAPIENTRYP VertexAttrib4dvNV)(GLuint index, const GLdouble * v); /* 1162 */ - void (GLAPIENTRYP VertexAttrib4fNV)(GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w); /* 1163 */ - void (GLAPIENTRYP VertexAttrib4fvNV)(GLuint index, const GLfloat * v); /* 1164 */ - void (GLAPIENTRYP VertexAttrib4sNV)(GLuint index, GLshort x, GLshort y, GLshort z, GLshort w); /* 1165 */ - void (GLAPIENTRYP VertexAttrib4svNV)(GLuint index, const GLshort * v); /* 1166 */ - void (GLAPIENTRYP VertexAttrib4ubNV)(GLuint index, GLubyte x, GLubyte y, GLubyte z, GLubyte w); /* 1167 */ - void (GLAPIENTRYP VertexAttrib4ubvNV)(GLuint index, const GLubyte * v); /* 1168 */ - void (GLAPIENTRYP VertexAttribPointerNV)(GLuint index, GLint size, GLenum type, GLsizei stride, const GLvoid * pointer); /* 1169 */ - void (GLAPIENTRYP VertexAttribs1dvNV)(GLuint index, GLsizei n, const GLdouble * v); /* 1170 */ - void (GLAPIENTRYP VertexAttribs1fvNV)(GLuint index, GLsizei n, const GLfloat * v); /* 1171 */ - void (GLAPIENTRYP VertexAttribs1svNV)(GLuint index, GLsizei n, const GLshort * v); /* 1172 */ - void (GLAPIENTRYP VertexAttribs2dvNV)(GLuint index, GLsizei n, const GLdouble * v); /* 1173 */ - void (GLAPIENTRYP VertexAttribs2fvNV)(GLuint index, GLsizei n, const GLfloat * v); /* 1174 */ - void (GLAPIENTRYP VertexAttribs2svNV)(GLuint index, GLsizei n, const GLshort * v); /* 1175 */ - void (GLAPIENTRYP VertexAttribs3dvNV)(GLuint index, GLsizei n, const GLdouble * v); /* 1176 */ - void (GLAPIENTRYP VertexAttribs3fvNV)(GLuint index, GLsizei n, const GLfloat * v); /* 1177 */ - void (GLAPIENTRYP VertexAttribs3svNV)(GLuint index, GLsizei n, const GLshort * v); /* 1178 */ - void (GLAPIENTRYP VertexAttribs4dvNV)(GLuint index, GLsizei n, const GLdouble * v); /* 1179 */ - void (GLAPIENTRYP VertexAttribs4fvNV)(GLuint index, GLsizei n, const GLfloat * v); /* 1180 */ - void (GLAPIENTRYP VertexAttribs4svNV)(GLuint index, GLsizei n, const GLshort * v); /* 1181 */ - void (GLAPIENTRYP VertexAttribs4ubvNV)(GLuint index, GLsizei n, const GLubyte * v); /* 1182 */ - void (GLAPIENTRYP GetTexBumpParameterfvATI)(GLenum pname, GLfloat * param); /* 1183 */ - void (GLAPIENTRYP GetTexBumpParameterivATI)(GLenum pname, GLint * param); /* 1184 */ - void (GLAPIENTRYP TexBumpParameterfvATI)(GLenum pname, const GLfloat * param); /* 1185 */ - void (GLAPIENTRYP TexBumpParameterivATI)(GLenum pname, const GLint * param); /* 1186 */ - void (GLAPIENTRYP AlphaFragmentOp1ATI)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); /* 1187 */ - void (GLAPIENTRYP AlphaFragmentOp2ATI)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); /* 1188 */ - void (GLAPIENTRYP AlphaFragmentOp3ATI)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); /* 1189 */ - void (GLAPIENTRYP BeginFragmentShaderATI)(void); /* 1190 */ - void (GLAPIENTRYP BindFragmentShaderATI)(GLuint id); /* 1191 */ - void (GLAPIENTRYP ColorFragmentOp1ATI)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); /* 1192 */ - void (GLAPIENTRYP ColorFragmentOp2ATI)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); /* 1193 */ - void (GLAPIENTRYP ColorFragmentOp3ATI)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); /* 1194 */ - void (GLAPIENTRYP DeleteFragmentShaderATI)(GLuint id); /* 1195 */ - void (GLAPIENTRYP EndFragmentShaderATI)(void); /* 1196 */ - GLuint (GLAPIENTRYP GenFragmentShadersATI)(GLuint range); /* 1197 */ - void (GLAPIENTRYP PassTexCoordATI)(GLuint dst, GLuint coord, GLenum swizzle); /* 1198 */ - void (GLAPIENTRYP SampleMapATI)(GLuint dst, GLuint interp, GLenum swizzle); /* 1199 */ - void (GLAPIENTRYP SetFragmentShaderConstantATI)(GLuint dst, const GLfloat * value); /* 1200 */ - void (GLAPIENTRYP ActiveStencilFaceEXT)(GLenum face); /* 1201 */ - void (GLAPIENTRYP BindVertexArrayAPPLE)(GLuint array); /* 1202 */ - void (GLAPIENTRYP GenVertexArraysAPPLE)(GLsizei n, GLuint * arrays); /* 1203 */ - void (GLAPIENTRYP GetProgramNamedParameterdvNV)(GLuint id, GLsizei len, const GLubyte * name, GLdouble * params); /* 1204 */ - void (GLAPIENTRYP GetProgramNamedParameterfvNV)(GLuint id, GLsizei len, const GLubyte * name, GLfloat * params); /* 1205 */ - void (GLAPIENTRYP ProgramNamedParameter4dNV)(GLuint id, GLsizei len, const GLubyte * name, GLdouble x, GLdouble y, GLdouble z, GLdouble w); /* 1206 */ - void (GLAPIENTRYP ProgramNamedParameter4dvNV)(GLuint id, GLsizei len, const GLubyte * name, const GLdouble * v); /* 1207 */ - void (GLAPIENTRYP ProgramNamedParameter4fNV)(GLuint id, GLsizei len, const GLubyte * name, GLfloat x, GLfloat y, GLfloat z, GLfloat w); /* 1208 */ - void (GLAPIENTRYP ProgramNamedParameter4fvNV)(GLuint id, GLsizei len, const GLubyte * name, const GLfloat * v); /* 1209 */ - void (GLAPIENTRYP PrimitiveRestartNV)(void); /* 1210 */ - void (GLAPIENTRYP GetTexGenxvOES)(GLenum coord, GLenum pname, GLfixed * params); /* 1211 */ - void (GLAPIENTRYP TexGenxOES)(GLenum coord, GLenum pname, GLint param); /* 1212 */ - void (GLAPIENTRYP TexGenxvOES)(GLenum coord, GLenum pname, const GLfixed * params); /* 1213 */ - void (GLAPIENTRYP DepthBoundsEXT)(GLclampd zmin, GLclampd zmax); /* 1214 */ - void (GLAPIENTRYP BindFramebufferEXT)(GLenum target, GLuint framebuffer); /* 1215 */ - void (GLAPIENTRYP BindRenderbufferEXT)(GLenum target, GLuint renderbuffer); /* 1216 */ - void (GLAPIENTRYP StringMarkerGREMEDY)(GLsizei len, const GLvoid * string); /* 1217 */ - void (GLAPIENTRYP BufferParameteriAPPLE)(GLenum target, GLenum pname, GLint param); /* 1218 */ - void (GLAPIENTRYP FlushMappedBufferRangeAPPLE)(GLenum target, GLintptr offset, GLsizeiptr size); /* 1219 */ - void (GLAPIENTRYP VertexAttribI1iEXT)(GLuint index, GLint x); /* 1220 */ - void (GLAPIENTRYP VertexAttribI1uiEXT)(GLuint index, GLuint x); /* 1221 */ - void (GLAPIENTRYP VertexAttribI2iEXT)(GLuint index, GLint x, GLint y); /* 1222 */ - void (GLAPIENTRYP VertexAttribI2ivEXT)(GLuint index, const GLint * v); /* 1223 */ - void (GLAPIENTRYP VertexAttribI2uiEXT)(GLuint index, GLuint x, GLuint y); /* 1224 */ - void (GLAPIENTRYP VertexAttribI2uivEXT)(GLuint index, const GLuint * v); /* 1225 */ - void (GLAPIENTRYP VertexAttribI3iEXT)(GLuint index, GLint x, GLint y, GLint z); /* 1226 */ - void (GLAPIENTRYP VertexAttribI3ivEXT)(GLuint index, const GLint * v); /* 1227 */ - void (GLAPIENTRYP VertexAttribI3uiEXT)(GLuint index, GLuint x, GLuint y, GLuint z); /* 1228 */ - void (GLAPIENTRYP VertexAttribI3uivEXT)(GLuint index, const GLuint * v); /* 1229 */ - void (GLAPIENTRYP VertexAttribI4iEXT)(GLuint index, GLint x, GLint y, GLint z, GLint w); /* 1230 */ - void (GLAPIENTRYP VertexAttribI4ivEXT)(GLuint index, const GLint * v); /* 1231 */ - void (GLAPIENTRYP VertexAttribI4uiEXT)(GLuint index, GLuint x, GLuint y, GLuint z, GLuint w); /* 1232 */ - void (GLAPIENTRYP VertexAttribI4uivEXT)(GLuint index, const GLuint * v); /* 1233 */ - void (GLAPIENTRYP ClearColorIiEXT)(GLint r, GLint g, GLint b, GLint a); /* 1234 */ - void (GLAPIENTRYP ClearColorIuiEXT)(GLuint r, GLuint g, GLuint b, GLuint a); /* 1235 */ - void (GLAPIENTRYP BindBufferOffsetEXT)(GLenum target, GLuint index, GLuint buffer, GLintptr offset); /* 1236 */ - void (GLAPIENTRYP BeginPerfMonitorAMD)(GLuint monitor); /* 1237 */ - void (GLAPIENTRYP DeletePerfMonitorsAMD)(GLsizei n, GLuint * monitors); /* 1238 */ - void (GLAPIENTRYP EndPerfMonitorAMD)(GLuint monitor); /* 1239 */ - void (GLAPIENTRYP GenPerfMonitorsAMD)(GLsizei n, GLuint * monitors); /* 1240 */ - void (GLAPIENTRYP GetPerfMonitorCounterDataAMD)(GLuint monitor, GLenum pname, GLsizei dataSize, GLuint * data, GLint * bytesWritten); /* 1241 */ - void (GLAPIENTRYP GetPerfMonitorCounterInfoAMD)(GLuint group, GLuint counter, GLenum pname, GLvoid * data); /* 1242 */ - void (GLAPIENTRYP GetPerfMonitorCounterStringAMD)(GLuint group, GLuint counter, GLsizei bufSize, GLsizei * length, GLchar * counterString); /* 1243 */ - void (GLAPIENTRYP GetPerfMonitorCountersAMD)(GLuint group, GLint * numCounters, GLint * maxActiveCounters, GLsizei countersSize, GLuint * counters); /* 1244 */ - void (GLAPIENTRYP GetPerfMonitorGroupStringAMD)(GLuint group, GLsizei bufSize, GLsizei * length, GLchar * groupString); /* 1245 */ - void (GLAPIENTRYP GetPerfMonitorGroupsAMD)(GLint * numGroups, GLsizei groupsSize, GLuint * groups); /* 1246 */ - void (GLAPIENTRYP SelectPerfMonitorCountersAMD)(GLuint monitor, GLboolean enable, GLuint group, GLint numCounters, GLuint * counterList); /* 1247 */ - void (GLAPIENTRYP GetObjectParameterivAPPLE)(GLenum objectType, GLuint name, GLenum pname, GLint * value); /* 1248 */ - GLenum (GLAPIENTRYP ObjectPurgeableAPPLE)(GLenum objectType, GLuint name, GLenum option); /* 1249 */ - GLenum (GLAPIENTRYP ObjectUnpurgeableAPPLE)(GLenum objectType, GLuint name, GLenum option); /* 1250 */ - void (GLAPIENTRYP ActiveProgramEXT)(GLuint program); /* 1251 */ - GLuint (GLAPIENTRYP CreateShaderProgramEXT)(GLenum type, const GLchar * string); /* 1252 */ - void (GLAPIENTRYP UseShaderProgramEXT)(GLenum type, GLuint program); /* 1253 */ - void (GLAPIENTRYP TextureBarrierNV)(void); /* 1254 */ - void (GLAPIENTRYP VDPAUFiniNV)(void); /* 1255 */ - void (GLAPIENTRYP VDPAUGetSurfaceivNV)(GLintptr surface, GLenum pname, GLsizei bufSize, GLsizei * length, GLint * values); /* 1256 */ - void (GLAPIENTRYP VDPAUInitNV)(const GLvoid * vdpDevice, const GLvoid * getProcAddress); /* 1257 */ - GLboolean (GLAPIENTRYP VDPAUIsSurfaceNV)(GLintptr surface); /* 1258 */ - void (GLAPIENTRYP VDPAUMapSurfacesNV)(GLsizei numSurfaces, const GLintptr * surfaces); /* 1259 */ - GLintptr (GLAPIENTRYP VDPAURegisterOutputSurfaceNV)(const GLvoid * vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint * textureNames); /* 1260 */ - GLintptr (GLAPIENTRYP VDPAURegisterVideoSurfaceNV)(const GLvoid * vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint * textureNames); /* 1261 */ - void (GLAPIENTRYP VDPAUSurfaceAccessNV)(GLintptr surface, GLenum access); /* 1262 */ - void (GLAPIENTRYP VDPAUUnmapSurfacesNV)(GLsizei numSurfaces, const GLintptr * surfaces); /* 1263 */ - void (GLAPIENTRYP VDPAUUnregisterSurfaceNV)(GLintptr surface); /* 1264 */ - void (GLAPIENTRYP BeginPerfQueryINTEL)(GLuint queryHandle); /* 1265 */ - void (GLAPIENTRYP CreatePerfQueryINTEL)(GLuint queryId, GLuint * queryHandle); /* 1266 */ - void (GLAPIENTRYP DeletePerfQueryINTEL)(GLuint queryHandle); /* 1267 */ - void (GLAPIENTRYP EndPerfQueryINTEL)(GLuint queryHandle); /* 1268 */ - void (GLAPIENTRYP GetFirstPerfQueryIdINTEL)(GLuint * queryId); /* 1269 */ - void (GLAPIENTRYP GetNextPerfQueryIdINTEL)(GLuint queryId, GLuint * nextQueryId); /* 1270 */ - void (GLAPIENTRYP GetPerfCounterInfoINTEL)(GLuint queryId, GLuint counterId, GLuint counterNameLength, GLchar * counterName, GLuint counterDescLength, GLchar * counterDesc, GLuint * counterOffset, GLuint * counterDataSize, GLuint * counterTypeEnum, GLuint * counterDataTypeEnum, GLuint64 * rawCounterMaxValue); /* 1271 */ - void (GLAPIENTRYP GetPerfQueryDataINTEL)(GLuint queryHandle, GLuint flags, GLsizei dataSize, GLvoid * data, GLuint * bytesWritten); /* 1272 */ - void (GLAPIENTRYP GetPerfQueryIdByNameINTEL)(GLchar * queryName, GLuint * queryId); /* 1273 */ - void (GLAPIENTRYP GetPerfQueryInfoINTEL)(GLuint queryId, GLuint queryNameLength, GLchar * queryName, GLuint * dataSize, GLuint * noCounters, GLuint * noInstances, GLuint * capsMask); /* 1274 */ - void (GLAPIENTRYP PolygonOffsetClampEXT)(GLfloat factor, GLfloat units, GLfloat clamp); /* 1275 */ - void (GLAPIENTRYP StencilFuncSeparateATI)(GLenum frontfunc, GLenum backfunc, GLint ref, GLuint mask); /* 1276 */ - void (GLAPIENTRYP ProgramEnvParameters4fvEXT)(GLenum target, GLuint index, GLsizei count, const GLfloat * params); /* 1277 */ - void (GLAPIENTRYP ProgramLocalParameters4fvEXT)(GLenum target, GLuint index, GLsizei count, const GLfloat * params); /* 1278 */ - void (GLAPIENTRYP EGLImageTargetRenderbufferStorageOES)(GLenum target, GLvoid * writeOffset); /* 1279 */ - void (GLAPIENTRYP EGLImageTargetTexture2DOES)(GLenum target, GLvoid * writeOffset); /* 1280 */ - void (GLAPIENTRYP AlphaFuncx)(GLenum func, GLclampx ref); /* 1281 */ - void (GLAPIENTRYP ClearColorx)(GLclampx red, GLclampx green, GLclampx blue, GLclampx alpha); /* 1282 */ - void (GLAPIENTRYP ClearDepthx)(GLclampx depth); /* 1283 */ - void (GLAPIENTRYP Color4x)(GLfixed red, GLfixed green, GLfixed blue, GLfixed alpha); /* 1284 */ - void (GLAPIENTRYP DepthRangex)(GLclampx zNear, GLclampx zFar); /* 1285 */ - void (GLAPIENTRYP Fogx)(GLenum pname, GLfixed param); /* 1286 */ - void (GLAPIENTRYP Fogxv)(GLenum pname, const GLfixed * params); /* 1287 */ - void (GLAPIENTRYP Frustumf)(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar); /* 1288 */ - void (GLAPIENTRYP Frustumx)(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar); /* 1289 */ - void (GLAPIENTRYP LightModelx)(GLenum pname, GLfixed param); /* 1290 */ - void (GLAPIENTRYP LightModelxv)(GLenum pname, const GLfixed * params); /* 1291 */ - void (GLAPIENTRYP Lightx)(GLenum light, GLenum pname, GLfixed param); /* 1292 */ - void (GLAPIENTRYP Lightxv)(GLenum light, GLenum pname, const GLfixed * params); /* 1293 */ - void (GLAPIENTRYP LineWidthx)(GLfixed width); /* 1294 */ - void (GLAPIENTRYP LoadMatrixx)(const GLfixed * m); /* 1295 */ - void (GLAPIENTRYP Materialx)(GLenum face, GLenum pname, GLfixed param); /* 1296 */ - void (GLAPIENTRYP Materialxv)(GLenum face, GLenum pname, const GLfixed * params); /* 1297 */ - void (GLAPIENTRYP MultMatrixx)(const GLfixed * m); /* 1298 */ - void (GLAPIENTRYP MultiTexCoord4x)(GLenum target, GLfixed s, GLfixed t, GLfixed r, GLfixed q); /* 1299 */ - void (GLAPIENTRYP Normal3x)(GLfixed nx, GLfixed ny, GLfixed nz); /* 1300 */ - void (GLAPIENTRYP Orthof)(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar); /* 1301 */ - void (GLAPIENTRYP Orthox)(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar); /* 1302 */ - void (GLAPIENTRYP PointSizex)(GLfixed size); /* 1303 */ - void (GLAPIENTRYP PolygonOffsetx)(GLfixed factor, GLfixed units); /* 1304 */ - void (GLAPIENTRYP Rotatex)(GLfixed angle, GLfixed x, GLfixed y, GLfixed z); /* 1305 */ - void (GLAPIENTRYP SampleCoveragex)(GLclampx value, GLboolean invert); /* 1306 */ - void (GLAPIENTRYP Scalex)(GLfixed x, GLfixed y, GLfixed z); /* 1307 */ - void (GLAPIENTRYP TexEnvx)(GLenum target, GLenum pname, GLfixed param); /* 1308 */ - void (GLAPIENTRYP TexEnvxv)(GLenum target, GLenum pname, const GLfixed * params); /* 1309 */ - void (GLAPIENTRYP TexParameterx)(GLenum target, GLenum pname, GLfixed param); /* 1310 */ - void (GLAPIENTRYP Translatex)(GLfixed x, GLfixed y, GLfixed z); /* 1311 */ - void (GLAPIENTRYP ClipPlanef)(GLenum plane, const GLfloat * equation); /* 1312 */ - void (GLAPIENTRYP ClipPlanex)(GLenum plane, const GLfixed * equation); /* 1313 */ - void (GLAPIENTRYP GetClipPlanef)(GLenum plane, GLfloat * equation); /* 1314 */ - void (GLAPIENTRYP GetClipPlanex)(GLenum plane, GLfixed * equation); /* 1315 */ - void (GLAPIENTRYP GetFixedv)(GLenum pname, GLfixed * params); /* 1316 */ - void (GLAPIENTRYP GetLightxv)(GLenum light, GLenum pname, GLfixed * params); /* 1317 */ - void (GLAPIENTRYP GetMaterialxv)(GLenum face, GLenum pname, GLfixed * params); /* 1318 */ - void (GLAPIENTRYP GetTexEnvxv)(GLenum target, GLenum pname, GLfixed * params); /* 1319 */ - void (GLAPIENTRYP GetTexParameterxv)(GLenum target, GLenum pname, GLfixed * params); /* 1320 */ - void (GLAPIENTRYP PointParameterx)(GLenum pname, GLfixed param); /* 1321 */ - void (GLAPIENTRYP PointParameterxv)(GLenum pname, const GLfixed * params); /* 1322 */ - void (GLAPIENTRYP TexParameterxv)(GLenum target, GLenum pname, const GLfixed * params); /* 1323 */ + void (GLAPIENTRYP DispatchComputeGroupSizeARB)(GLuint num_groups_x, GLuint num_groups_y, GLuint num_groups_z, GLuint group_size_x, GLuint group_size_y, GLuint group_size_z); /* 912 */ + void (GLAPIENTRYP MultiDrawArraysIndirectCountARB)(GLenum mode, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); /* 913 */ + void (GLAPIENTRYP MultiDrawElementsIndirectCountARB)(GLenum mode, GLenum type, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); /* 914 */ + void (GLAPIENTRYP ClipControl)(GLenum origin, GLenum depth); /* 915 */ + void (GLAPIENTRYP BindTextureUnit)(GLuint unit, GLuint texture); /* 916 */ + void (GLAPIENTRYP BlitNamedFramebuffer)(GLuint readFramebuffer, GLuint drawFramebuffer, GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter); /* 917 */ + GLenum (GLAPIENTRYP CheckNamedFramebufferStatus)(GLuint framebuffer, GLenum target); /* 918 */ + void (GLAPIENTRYP ClearNamedBufferData)(GLuint buffer, GLenum internalformat, GLenum format, GLenum type, const GLvoid * data); /* 919 */ + void (GLAPIENTRYP ClearNamedBufferSubData)(GLuint buffer, GLenum internalformat, GLintptr offset, GLsizeiptr size, GLenum format, GLenum type, const GLvoid * data); /* 920 */ + void (GLAPIENTRYP ClearNamedFramebufferfi)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, GLfloat depth, GLint stencil); /* 921 */ + void (GLAPIENTRYP ClearNamedFramebufferfv)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLfloat * value); /* 922 */ + void (GLAPIENTRYP ClearNamedFramebufferiv)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLint * value); /* 923 */ + void (GLAPIENTRYP ClearNamedFramebufferuiv)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLuint * value); /* 924 */ + void (GLAPIENTRYP CompressedTextureSubImage1D)(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLsizei imageSize, const GLvoid * data); /* 925 */ + void (GLAPIENTRYP CompressedTextureSubImage2D)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const GLvoid * data); /* 926 */ + void (GLAPIENTRYP CompressedTextureSubImage3D)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid * data); /* 927 */ + void (GLAPIENTRYP CopyNamedBufferSubData)(GLuint readBuffer, GLuint writeBuffer, GLintptr readOffset, GLintptr writeOffset, GLsizeiptr size); /* 928 */ + void (GLAPIENTRYP CopyTextureSubImage1D)(GLuint texture, GLint level, GLint xoffset, GLint x, GLint y, GLsizei width); /* 929 */ + void (GLAPIENTRYP CopyTextureSubImage2D)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height); /* 930 */ + void (GLAPIENTRYP CopyTextureSubImage3D)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height); /* 931 */ + void (GLAPIENTRYP CreateBuffers)(GLsizei n, GLuint * buffers); /* 932 */ + void (GLAPIENTRYP CreateFramebuffers)(GLsizei n, GLuint * framebuffers); /* 933 */ + void (GLAPIENTRYP CreateProgramPipelines)(GLsizei n, GLuint * pipelines); /* 934 */ + void (GLAPIENTRYP CreateQueries)(GLenum target, GLsizei n, GLuint * ids); /* 935 */ + void (GLAPIENTRYP CreateRenderbuffers)(GLsizei n, GLuint * renderbuffers); /* 936 */ + void (GLAPIENTRYP CreateSamplers)(GLsizei n, GLuint * samplers); /* 937 */ + void (GLAPIENTRYP CreateTextures)(GLenum target, GLsizei n, GLuint * textures); /* 938 */ + void (GLAPIENTRYP CreateTransformFeedbacks)(GLsizei n, GLuint * ids); /* 939 */ + void (GLAPIENTRYP CreateVertexArrays)(GLsizei n, GLuint * arrays); /* 940 */ + void (GLAPIENTRYP DisableVertexArrayAttrib)(GLuint vaobj, GLuint index); /* 941 */ + void (GLAPIENTRYP EnableVertexArrayAttrib)(GLuint vaobj, GLuint index); /* 942 */ + void (GLAPIENTRYP FlushMappedNamedBufferRange)(GLuint buffer, GLintptr offset, GLsizeiptr length); /* 943 */ + void (GLAPIENTRYP GenerateTextureMipmap)(GLuint texture); /* 944 */ + void (GLAPIENTRYP GetCompressedTextureImage)(GLuint texture, GLint level, GLsizei bufSize, GLvoid * pixels); /* 945 */ + void (GLAPIENTRYP GetNamedBufferParameteri64v)(GLuint buffer, GLenum pname, GLint64 * params); /* 946 */ + void (GLAPIENTRYP GetNamedBufferParameteriv)(GLuint buffer, GLenum pname, GLint * params); /* 947 */ + void (GLAPIENTRYP GetNamedBufferPointerv)(GLuint buffer, GLenum pname, GLvoid ** params); /* 948 */ + void (GLAPIENTRYP GetNamedBufferSubData)(GLuint buffer, GLintptr offset, GLsizeiptr size, GLvoid * data); /* 949 */ + void (GLAPIENTRYP GetNamedFramebufferAttachmentParameteriv)(GLuint framebuffer, GLenum attachment, GLenum pname, GLint * params); /* 950 */ + void (GLAPIENTRYP GetNamedFramebufferParameteriv)(GLuint framebuffer, GLenum pname, GLint * param); /* 951 */ + void (GLAPIENTRYP GetNamedRenderbufferParameteriv)(GLuint renderbuffer, GLenum pname, GLint * params); /* 952 */ + void (GLAPIENTRYP GetQueryBufferObjecti64v)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); /* 953 */ + void (GLAPIENTRYP GetQueryBufferObjectiv)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); /* 954 */ + void (GLAPIENTRYP GetQueryBufferObjectui64v)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); /* 955 */ + void (GLAPIENTRYP GetQueryBufferObjectuiv)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); /* 956 */ + void (GLAPIENTRYP GetTextureImage)(GLuint texture, GLint level, GLenum format, GLenum type, GLsizei bufSize, GLvoid * pixels); /* 957 */ + void (GLAPIENTRYP GetTextureLevelParameterfv)(GLuint texture, GLint level, GLenum pname, GLfloat * params); /* 958 */ + void (GLAPIENTRYP GetTextureLevelParameteriv)(GLuint texture, GLint level, GLenum pname, GLint * params); /* 959 */ + void (GLAPIENTRYP GetTextureParameterIiv)(GLuint texture, GLenum pname, GLint * params); /* 960 */ + void (GLAPIENTRYP GetTextureParameterIuiv)(GLuint texture, GLenum pname, GLuint * params); /* 961 */ + void (GLAPIENTRYP GetTextureParameterfv)(GLuint texture, GLenum pname, GLfloat * params); /* 962 */ + void (GLAPIENTRYP GetTextureParameteriv)(GLuint texture, GLenum pname, GLint * params); /* 963 */ + void (GLAPIENTRYP GetTransformFeedbacki64_v)(GLuint xfb, GLenum pname, GLuint index, GLint64 * param); /* 964 */ + void (GLAPIENTRYP GetTransformFeedbacki_v)(GLuint xfb, GLenum pname, GLuint index, GLint * param); /* 965 */ + void (GLAPIENTRYP GetTransformFeedbackiv)(GLuint xfb, GLenum pname, GLint * param); /* 966 */ + void (GLAPIENTRYP GetVertexArrayIndexed64iv)(GLuint vaobj, GLuint index, GLenum pname, GLint64 * param); /* 967 */ + void (GLAPIENTRYP GetVertexArrayIndexediv)(GLuint vaobj, GLuint index, GLenum pname, GLint * param); /* 968 */ + void (GLAPIENTRYP GetVertexArrayiv)(GLuint vaobj, GLenum pname, GLint * param); /* 969 */ + void (GLAPIENTRYP InvalidateNamedFramebufferData)(GLuint framebuffer, GLsizei numAttachments, const GLenum * attachments); /* 970 */ + void (GLAPIENTRYP InvalidateNamedFramebufferSubData)(GLuint framebuffer, GLsizei numAttachments, const GLenum * attachments, GLint x, GLint y, GLsizei width, GLsizei height); /* 971 */ + GLvoid * (GLAPIENTRYP MapNamedBuffer)(GLuint buffer, GLenum access); /* 972 */ + GLvoid * (GLAPIENTRYP MapNamedBufferRange)(GLuint buffer, GLintptr offset, GLsizeiptr length, GLbitfield access); /* 973 */ + void (GLAPIENTRYP NamedBufferData)(GLuint buffer, GLsizeiptr size, const GLvoid * data, GLenum usage); /* 974 */ + void (GLAPIENTRYP NamedBufferStorage)(GLuint buffer, GLsizeiptr size, const GLvoid * data, GLbitfield flags); /* 975 */ + void (GLAPIENTRYP NamedBufferSubData)(GLuint buffer, GLintptr offset, GLsizeiptr size, const GLvoid * data); /* 976 */ + void (GLAPIENTRYP NamedFramebufferDrawBuffer)(GLuint framebuffer, GLenum buf); /* 977 */ + void (GLAPIENTRYP NamedFramebufferDrawBuffers)(GLuint framebuffer, GLsizei n, const GLenum * bufs); /* 978 */ + void (GLAPIENTRYP NamedFramebufferParameteri)(GLuint framebuffer, GLenum pname, GLint param); /* 979 */ + void (GLAPIENTRYP NamedFramebufferReadBuffer)(GLuint framebuffer, GLenum buf); /* 980 */ + void (GLAPIENTRYP NamedFramebufferRenderbuffer)(GLuint framebuffer, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer); /* 981 */ + void (GLAPIENTRYP NamedFramebufferTexture)(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level); /* 982 */ + void (GLAPIENTRYP NamedFramebufferTextureLayer)(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level, GLint layer); /* 983 */ + void (GLAPIENTRYP NamedRenderbufferStorage)(GLuint renderbuffer, GLenum internalformat, GLsizei width, GLsizei height); /* 984 */ + void (GLAPIENTRYP NamedRenderbufferStorageMultisample)(GLuint renderbuffer, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height); /* 985 */ + void (GLAPIENTRYP TextureBuffer)(GLuint texture, GLenum internalformat, GLuint buffer); /* 986 */ + void (GLAPIENTRYP TextureBufferRange)(GLuint texture, GLenum internalformat, GLuint buffer, GLintptr offset, GLsizeiptr size); /* 987 */ + void (GLAPIENTRYP TextureParameterIiv)(GLuint texture, GLenum pname, const GLint * params); /* 988 */ + void (GLAPIENTRYP TextureParameterIuiv)(GLuint texture, GLenum pname, const GLuint * params); /* 989 */ + void (GLAPIENTRYP TextureParameterf)(GLuint texture, GLenum pname, GLfloat param); /* 990 */ + void (GLAPIENTRYP TextureParameterfv)(GLuint texture, GLenum pname, const GLfloat * param); /* 991 */ + void (GLAPIENTRYP TextureParameteri)(GLuint texture, GLenum pname, GLint param); /* 992 */ + void (GLAPIENTRYP TextureParameteriv)(GLuint texture, GLenum pname, const GLint * param); /* 993 */ + void (GLAPIENTRYP TextureStorage1D)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width); /* 994 */ + void (GLAPIENTRYP TextureStorage2D)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height); /* 995 */ + void (GLAPIENTRYP TextureStorage2DMultisample)(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations); /* 996 */ + void (GLAPIENTRYP TextureStorage3D)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth); /* 997 */ + void (GLAPIENTRYP TextureStorage3DMultisample)(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedsamplelocations); /* 998 */ + void (GLAPIENTRYP TextureSubImage1D)(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLenum type, const GLvoid * pixels); /* 999 */ + void (GLAPIENTRYP TextureSubImage2D)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid * pixels); /* 1000 */ + void (GLAPIENTRYP TextureSubImage3D)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid * pixels); /* 1001 */ + void (GLAPIENTRYP TransformFeedbackBufferBase)(GLuint xfb, GLuint index, GLuint buffer); /* 1002 */ + void (GLAPIENTRYP TransformFeedbackBufferRange)(GLuint xfb, GLuint index, GLuint buffer, GLintptr offset, GLsizeiptr size); /* 1003 */ + GLboolean (GLAPIENTRYP UnmapNamedBuffer)(GLuint buffer); /* 1004 */ + void (GLAPIENTRYP VertexArrayAttribBinding)(GLuint vaobj, GLuint attribindex, GLuint bindingindex); /* 1005 */ + void (GLAPIENTRYP VertexArrayAttribFormat)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLboolean normalized, GLuint relativeoffset); /* 1006 */ + void (GLAPIENTRYP VertexArrayAttribIFormat)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset); /* 1007 */ + void (GLAPIENTRYP VertexArrayAttribLFormat)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset); /* 1008 */ + void (GLAPIENTRYP VertexArrayBindingDivisor)(GLuint vaobj, GLuint bindingindex, GLuint divisor); /* 1009 */ + void (GLAPIENTRYP VertexArrayElementBuffer)(GLuint vaobj, GLuint buffer); /* 1010 */ + void (GLAPIENTRYP VertexArrayVertexBuffer)(GLuint vaobj, GLuint bindingindex, GLuint buffer, GLintptr offset, GLsizei stride); /* 1011 */ + void (GLAPIENTRYP VertexArrayVertexBuffers)(GLuint vaobj, GLuint first, GLsizei count, const GLuint * buffers, const GLintptr * offsets, const GLsizei * strides); /* 1012 */ + void (GLAPIENTRYP GetCompressedTextureSubImage)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLsizei bufSize, GLvoid * pixels); /* 1013 */ + void (GLAPIENTRYP GetTextureSubImage)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, GLsizei bufSize, GLvoid * pixels); /* 1014 */ + void (GLAPIENTRYP InvalidateBufferData)(GLuint buffer); /* 1015 */ + void (GLAPIENTRYP InvalidateBufferSubData)(GLuint buffer, GLintptr offset, GLsizeiptr length); /* 1016 */ + void (GLAPIENTRYP InvalidateFramebuffer)(GLenum target, GLsizei numAttachments, const GLenum * attachments); /* 1017 */ + void (GLAPIENTRYP InvalidateSubFramebuffer)(GLenum target, GLsizei numAttachments, const GLenum * attachments, GLint x, GLint y, GLsizei width, GLsizei height); /* 1018 */ + void (GLAPIENTRYP InvalidateTexImage)(GLuint texture, GLint level); /* 1019 */ + void (GLAPIENTRYP InvalidateTexSubImage)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth); /* 1020 */ + void (GLAPIENTRYP PolygonOffsetEXT)(GLfloat factor, GLfloat bias); /* 1021 */ + void (GLAPIENTRYP DrawTexfOES)(GLfloat x, GLfloat y, GLfloat z, GLfloat width, GLfloat height); /* 1022 */ + void (GLAPIENTRYP DrawTexfvOES)(const GLfloat * coords); /* 1023 */ + void (GLAPIENTRYP DrawTexiOES)(GLint x, GLint y, GLint z, GLint width, GLint height); /* 1024 */ + void (GLAPIENTRYP DrawTexivOES)(const GLint * coords); /* 1025 */ + void (GLAPIENTRYP DrawTexsOES)(GLshort x, GLshort y, GLshort z, GLshort width, GLshort height); /* 1026 */ + void (GLAPIENTRYP DrawTexsvOES)(const GLshort * coords); /* 1027 */ + void (GLAPIENTRYP DrawTexxOES)(GLfixed x, GLfixed y, GLfixed z, GLfixed width, GLfixed height); /* 1028 */ + void (GLAPIENTRYP DrawTexxvOES)(const GLfixed * coords); /* 1029 */ + void (GLAPIENTRYP PointSizePointerOES)(GLenum type, GLsizei stride, const GLvoid * pointer); /* 1030 */ + GLbitfield (GLAPIENTRYP QueryMatrixxOES)(GLfixed * mantissa, GLint * exponent); /* 1031 */ + void (GLAPIENTRYP SampleMaskSGIS)(GLclampf value, GLboolean invert); /* 1032 */ + void (GLAPIENTRYP SamplePatternSGIS)(GLenum pattern); /* 1033 */ + void (GLAPIENTRYP ColorPointerEXT)(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid * pointer); /* 1034 */ + void (GLAPIENTRYP EdgeFlagPointerEXT)(GLsizei stride, GLsizei count, const GLboolean * pointer); /* 1035 */ + void (GLAPIENTRYP IndexPointerEXT)(GLenum type, GLsizei stride, GLsizei count, const GLvoid * pointer); /* 1036 */ + void (GLAPIENTRYP NormalPointerEXT)(GLenum type, GLsizei stride, GLsizei count, const GLvoid * pointer); /* 1037 */ + void (GLAPIENTRYP TexCoordPointerEXT)(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid * pointer); /* 1038 */ + void (GLAPIENTRYP VertexPointerEXT)(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid * pointer); /* 1039 */ + void (GLAPIENTRYP DiscardFramebufferEXT)(GLenum target, GLsizei numAttachments, const GLenum * attachments); /* 1040 */ + void (GLAPIENTRYP ActiveShaderProgram)(GLuint pipeline, GLuint program); /* 1041 */ + void (GLAPIENTRYP BindProgramPipeline)(GLuint pipeline); /* 1042 */ + GLuint (GLAPIENTRYP CreateShaderProgramv)(GLenum type, GLsizei count, const GLchar * const * strings); /* 1043 */ + void (GLAPIENTRYP DeleteProgramPipelines)(GLsizei n, const GLuint * pipelines); /* 1044 */ + void (GLAPIENTRYP GenProgramPipelines)(GLsizei n, GLuint * pipelines); /* 1045 */ + void (GLAPIENTRYP GetProgramPipelineInfoLog)(GLuint pipeline, GLsizei bufSize, GLsizei * length, GLchar * infoLog); /* 1046 */ + void (GLAPIENTRYP GetProgramPipelineiv)(GLuint pipeline, GLenum pname, GLint * params); /* 1047 */ + GLboolean (GLAPIENTRYP IsProgramPipeline)(GLuint pipeline); /* 1048 */ + void (GLAPIENTRYP LockArraysEXT)(GLint first, GLsizei count); /* 1049 */ + void (GLAPIENTRYP ProgramUniform1d)(GLuint program, GLint location, GLdouble x); /* 1050 */ + void (GLAPIENTRYP ProgramUniform1dv)(GLuint program, GLint location, GLsizei count, const GLdouble * value); /* 1051 */ + void (GLAPIENTRYP ProgramUniform1f)(GLuint program, GLint location, GLfloat x); /* 1052 */ + void (GLAPIENTRYP ProgramUniform1fv)(GLuint program, GLint location, GLsizei count, const GLfloat * value); /* 1053 */ + void (GLAPIENTRYP ProgramUniform1i)(GLuint program, GLint location, GLint x); /* 1054 */ + void (GLAPIENTRYP ProgramUniform1iv)(GLuint program, GLint location, GLsizei count, const GLint * value); /* 1055 */ + void (GLAPIENTRYP ProgramUniform1ui)(GLuint program, GLint location, GLuint x); /* 1056 */ + void (GLAPIENTRYP ProgramUniform1uiv)(GLuint program, GLint location, GLsizei count, const GLuint * value); /* 1057 */ + void (GLAPIENTRYP ProgramUniform2d)(GLuint program, GLint location, GLdouble x, GLdouble y); /* 1058 */ + void (GLAPIENTRYP ProgramUniform2dv)(GLuint program, GLint location, GLsizei count, const GLdouble * value); /* 1059 */ + void (GLAPIENTRYP ProgramUniform2f)(GLuint program, GLint location, GLfloat x, GLfloat y); /* 1060 */ + void (GLAPIENTRYP ProgramUniform2fv)(GLuint program, GLint location, GLsizei count, const GLfloat * value); /* 1061 */ + void (GLAPIENTRYP ProgramUniform2i)(GLuint program, GLint location, GLint x, GLint y); /* 1062 */ + void (GLAPIENTRYP ProgramUniform2iv)(GLuint program, GLint location, GLsizei count, const GLint * value); /* 1063 */ + void (GLAPIENTRYP ProgramUniform2ui)(GLuint program, GLint location, GLuint x, GLuint y); /* 1064 */ + void (GLAPIENTRYP ProgramUniform2uiv)(GLuint program, GLint location, GLsizei count, const GLuint * value); /* 1065 */ + void (GLAPIENTRYP ProgramUniform3d)(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z); /* 1066 */ + void (GLAPIENTRYP ProgramUniform3dv)(GLuint program, GLint location, GLsizei count, const GLdouble * value); /* 1067 */ + void (GLAPIENTRYP ProgramUniform3f)(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z); /* 1068 */ + void (GLAPIENTRYP ProgramUniform3fv)(GLuint program, GLint location, GLsizei count, const GLfloat * value); /* 1069 */ + void (GLAPIENTRYP ProgramUniform3i)(GLuint program, GLint location, GLint x, GLint y, GLint z); /* 1070 */ + void (GLAPIENTRYP ProgramUniform3iv)(GLuint program, GLint location, GLsizei count, const GLint * value); /* 1071 */ + void (GLAPIENTRYP ProgramUniform3ui)(GLuint program, GLint location, GLuint x, GLuint y, GLuint z); /* 1072 */ + void (GLAPIENTRYP ProgramUniform3uiv)(GLuint program, GLint location, GLsizei count, const GLuint * value); /* 1073 */ + void (GLAPIENTRYP ProgramUniform4d)(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z, GLdouble w); /* 1074 */ + void (GLAPIENTRYP ProgramUniform4dv)(GLuint program, GLint location, GLsizei count, const GLdouble * value); /* 1075 */ + void (GLAPIENTRYP ProgramUniform4f)(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z, GLfloat w); /* 1076 */ + void (GLAPIENTRYP ProgramUniform4fv)(GLuint program, GLint location, GLsizei count, const GLfloat * value); /* 1077 */ + void (GLAPIENTRYP ProgramUniform4i)(GLuint program, GLint location, GLint x, GLint y, GLint z, GLint w); /* 1078 */ + void (GLAPIENTRYP ProgramUniform4iv)(GLuint program, GLint location, GLsizei count, const GLint * value); /* 1079 */ + void (GLAPIENTRYP ProgramUniform4ui)(GLuint program, GLint location, GLuint x, GLuint y, GLuint z, GLuint w); /* 1080 */ + void (GLAPIENTRYP ProgramUniform4uiv)(GLuint program, GLint location, GLsizei count, const GLuint * value); /* 1081 */ + void (GLAPIENTRYP ProgramUniformMatrix2dv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); /* 1082 */ + void (GLAPIENTRYP ProgramUniformMatrix2fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); /* 1083 */ + void (GLAPIENTRYP ProgramUniformMatrix2x3dv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); /* 1084 */ + void (GLAPIENTRYP ProgramUniformMatrix2x3fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); /* 1085 */ + void (GLAPIENTRYP ProgramUniformMatrix2x4dv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); /* 1086 */ + void (GLAPIENTRYP ProgramUniformMatrix2x4fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); /* 1087 */ + void (GLAPIENTRYP ProgramUniformMatrix3dv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); /* 1088 */ + void (GLAPIENTRYP ProgramUniformMatrix3fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); /* 1089 */ + void (GLAPIENTRYP ProgramUniformMatrix3x2dv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); /* 1090 */ + void (GLAPIENTRYP ProgramUniformMatrix3x2fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); /* 1091 */ + void (GLAPIENTRYP ProgramUniformMatrix3x4dv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); /* 1092 */ + void (GLAPIENTRYP ProgramUniformMatrix3x4fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); /* 1093 */ + void (GLAPIENTRYP ProgramUniformMatrix4dv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); /* 1094 */ + void (GLAPIENTRYP ProgramUniformMatrix4fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); /* 1095 */ + void (GLAPIENTRYP ProgramUniformMatrix4x2dv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); /* 1096 */ + void (GLAPIENTRYP ProgramUniformMatrix4x2fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); /* 1097 */ + void (GLAPIENTRYP ProgramUniformMatrix4x3dv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); /* 1098 */ + void (GLAPIENTRYP ProgramUniformMatrix4x3fv)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); /* 1099 */ + void (GLAPIENTRYP UnlockArraysEXT)(void); /* 1100 */ + void (GLAPIENTRYP UseProgramStages)(GLuint pipeline, GLbitfield stages, GLuint program); /* 1101 */ + void (GLAPIENTRYP ValidateProgramPipeline)(GLuint pipeline); /* 1102 */ + void (GLAPIENTRYP DebugMessageCallback)(GLDEBUGPROC callback, const GLvoid * userParam); /* 1103 */ + void (GLAPIENTRYP DebugMessageControl)(GLenum source, GLenum type, GLenum severity, GLsizei count, const GLuint * ids, GLboolean enabled); /* 1104 */ + void (GLAPIENTRYP DebugMessageInsert)(GLenum source, GLenum type, GLuint id, GLenum severity, GLsizei length, const GLchar * buf); /* 1105 */ + GLuint (GLAPIENTRYP GetDebugMessageLog)(GLuint count, GLsizei bufsize, GLenum * sources, GLenum * types, GLuint * ids, GLenum * severities, GLsizei * lengths, GLchar * messageLog); /* 1106 */ + void (GLAPIENTRYP GetObjectLabel)(GLenum identifier, GLuint name, GLsizei bufSize, GLsizei * length, GLchar * label); /* 1107 */ + void (GLAPIENTRYP GetObjectPtrLabel)(const GLvoid * ptr, GLsizei bufSize, GLsizei * length, GLchar * label); /* 1108 */ + void (GLAPIENTRYP ObjectLabel)(GLenum identifier, GLuint name, GLsizei length, const GLchar * label); /* 1109 */ + void (GLAPIENTRYP ObjectPtrLabel)(const GLvoid * ptr, GLsizei length, const GLchar * label); /* 1110 */ + void (GLAPIENTRYP PopDebugGroup)(void); /* 1111 */ + void (GLAPIENTRYP PushDebugGroup)(GLenum source, GLuint id, GLsizei length, const GLchar * message); /* 1112 */ + void (GLAPIENTRYP SecondaryColor3fEXT)(GLfloat red, GLfloat green, GLfloat blue); /* 1113 */ + void (GLAPIENTRYP SecondaryColor3fvEXT)(const GLfloat * v); /* 1114 */ + void (GLAPIENTRYP MultiDrawElementsEXT)(GLenum mode, const GLsizei * count, GLenum type, const GLvoid * const * indices, GLsizei primcount); /* 1115 */ + void (GLAPIENTRYP FogCoordfEXT)(GLfloat coord); /* 1116 */ + void (GLAPIENTRYP FogCoordfvEXT)(const GLfloat * coord); /* 1117 */ + void (GLAPIENTRYP ResizeBuffersMESA)(void); /* 1118 */ + void (GLAPIENTRYP WindowPos4dMESA)(GLdouble x, GLdouble y, GLdouble z, GLdouble w); /* 1119 */ + void (GLAPIENTRYP WindowPos4dvMESA)(const GLdouble * v); /* 1120 */ + void (GLAPIENTRYP WindowPos4fMESA)(GLfloat x, GLfloat y, GLfloat z, GLfloat w); /* 1121 */ + void (GLAPIENTRYP WindowPos4fvMESA)(const GLfloat * v); /* 1122 */ + void (GLAPIENTRYP WindowPos4iMESA)(GLint x, GLint y, GLint z, GLint w); /* 1123 */ + void (GLAPIENTRYP WindowPos4ivMESA)(const GLint * v); /* 1124 */ + void (GLAPIENTRYP WindowPos4sMESA)(GLshort x, GLshort y, GLshort z, GLshort w); /* 1125 */ + void (GLAPIENTRYP WindowPos4svMESA)(const GLshort * v); /* 1126 */ + void (GLAPIENTRYP MultiModeDrawArraysIBM)(const GLenum * mode, const GLint * first, const GLsizei * count, GLsizei primcount, GLint modestride); /* 1127 */ + void (GLAPIENTRYP MultiModeDrawElementsIBM)(const GLenum * mode, const GLsizei * count, GLenum type, const GLvoid * const * indices, GLsizei primcount, GLint modestride); /* 1128 */ + GLboolean (GLAPIENTRYP AreProgramsResidentNV)(GLsizei n, const GLuint * ids, GLboolean * residences); /* 1129 */ + void (GLAPIENTRYP ExecuteProgramNV)(GLenum target, GLuint id, const GLfloat * params); /* 1130 */ + void (GLAPIENTRYP GetProgramParameterdvNV)(GLenum target, GLuint index, GLenum pname, GLdouble * params); /* 1131 */ + void (GLAPIENTRYP GetProgramParameterfvNV)(GLenum target, GLuint index, GLenum pname, GLfloat * params); /* 1132 */ + void (GLAPIENTRYP GetProgramStringNV)(GLuint id, GLenum pname, GLubyte * program); /* 1133 */ + void (GLAPIENTRYP GetProgramivNV)(GLuint id, GLenum pname, GLint * params); /* 1134 */ + void (GLAPIENTRYP GetTrackMatrixivNV)(GLenum target, GLuint address, GLenum pname, GLint * params); /* 1135 */ + void (GLAPIENTRYP GetVertexAttribdvNV)(GLuint index, GLenum pname, GLdouble * params); /* 1136 */ + void (GLAPIENTRYP GetVertexAttribfvNV)(GLuint index, GLenum pname, GLfloat * params); /* 1137 */ + void (GLAPIENTRYP GetVertexAttribivNV)(GLuint index, GLenum pname, GLint * params); /* 1138 */ + void (GLAPIENTRYP LoadProgramNV)(GLenum target, GLuint id, GLsizei len, const GLubyte * program); /* 1139 */ + void (GLAPIENTRYP ProgramParameters4dvNV)(GLenum target, GLuint index, GLsizei num, const GLdouble * params); /* 1140 */ + void (GLAPIENTRYP ProgramParameters4fvNV)(GLenum target, GLuint index, GLsizei num, const GLfloat * params); /* 1141 */ + void (GLAPIENTRYP RequestResidentProgramsNV)(GLsizei n, const GLuint * ids); /* 1142 */ + void (GLAPIENTRYP TrackMatrixNV)(GLenum target, GLuint address, GLenum matrix, GLenum transform); /* 1143 */ + void (GLAPIENTRYP VertexAttrib1dNV)(GLuint index, GLdouble x); /* 1144 */ + void (GLAPIENTRYP VertexAttrib1dvNV)(GLuint index, const GLdouble * v); /* 1145 */ + void (GLAPIENTRYP VertexAttrib1fNV)(GLuint index, GLfloat x); /* 1146 */ + void (GLAPIENTRYP VertexAttrib1fvNV)(GLuint index, const GLfloat * v); /* 1147 */ + void (GLAPIENTRYP VertexAttrib1sNV)(GLuint index, GLshort x); /* 1148 */ + void (GLAPIENTRYP VertexAttrib1svNV)(GLuint index, const GLshort * v); /* 1149 */ + void (GLAPIENTRYP VertexAttrib2dNV)(GLuint index, GLdouble x, GLdouble y); /* 1150 */ + void (GLAPIENTRYP VertexAttrib2dvNV)(GLuint index, const GLdouble * v); /* 1151 */ + void (GLAPIENTRYP VertexAttrib2fNV)(GLuint index, GLfloat x, GLfloat y); /* 1152 */ + void (GLAPIENTRYP VertexAttrib2fvNV)(GLuint index, const GLfloat * v); /* 1153 */ + void (GLAPIENTRYP VertexAttrib2sNV)(GLuint index, GLshort x, GLshort y); /* 1154 */ + void (GLAPIENTRYP VertexAttrib2svNV)(GLuint index, const GLshort * v); /* 1155 */ + void (GLAPIENTRYP VertexAttrib3dNV)(GLuint index, GLdouble x, GLdouble y, GLdouble z); /* 1156 */ + void (GLAPIENTRYP VertexAttrib3dvNV)(GLuint index, const GLdouble * v); /* 1157 */ + void (GLAPIENTRYP VertexAttrib3fNV)(GLuint index, GLfloat x, GLfloat y, GLfloat z); /* 1158 */ + void (GLAPIENTRYP VertexAttrib3fvNV)(GLuint index, const GLfloat * v); /* 1159 */ + void (GLAPIENTRYP VertexAttrib3sNV)(GLuint index, GLshort x, GLshort y, GLshort z); /* 1160 */ + void (GLAPIENTRYP VertexAttrib3svNV)(GLuint index, const GLshort * v); /* 1161 */ + void (GLAPIENTRYP VertexAttrib4dNV)(GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w); /* 1162 */ + void (GLAPIENTRYP VertexAttrib4dvNV)(GLuint index, const GLdouble * v); /* 1163 */ + void (GLAPIENTRYP VertexAttrib4fNV)(GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w); /* 1164 */ + void (GLAPIENTRYP VertexAttrib4fvNV)(GLuint index, const GLfloat * v); /* 1165 */ + void (GLAPIENTRYP VertexAttrib4sNV)(GLuint index, GLshort x, GLshort y, GLshort z, GLshort w); /* 1166 */ + void (GLAPIENTRYP VertexAttrib4svNV)(GLuint index, const GLshort * v); /* 1167 */ + void (GLAPIENTRYP VertexAttrib4ubNV)(GLuint index, GLubyte x, GLubyte y, GLubyte z, GLubyte w); /* 1168 */ + void (GLAPIENTRYP VertexAttrib4ubvNV)(GLuint index, const GLubyte * v); /* 1169 */ + void (GLAPIENTRYP VertexAttribPointerNV)(GLuint index, GLint size, GLenum type, GLsizei stride, const GLvoid * pointer); /* 1170 */ + void (GLAPIENTRYP VertexAttribs1dvNV)(GLuint index, GLsizei n, const GLdouble * v); /* 1171 */ + void (GLAPIENTRYP VertexAttribs1fvNV)(GLuint index, GLsizei n, const GLfloat * v); /* 1172 */ + void (GLAPIENTRYP VertexAttribs1svNV)(GLuint index, GLsizei n, const GLshort * v); /* 1173 */ + void (GLAPIENTRYP VertexAttribs2dvNV)(GLuint index, GLsizei n, const GLdouble * v); /* 1174 */ + void (GLAPIENTRYP VertexAttribs2fvNV)(GLuint index, GLsizei n, const GLfloat * v); /* 1175 */ + void (GLAPIENTRYP VertexAttribs2svNV)(GLuint index, GLsizei n, const GLshort * v); /* 1176 */ + void (GLAPIENTRYP VertexAttribs3dvNV)(GLuint index, GLsizei n, const GLdouble * v); /* 1177 */ + void (GLAPIENTRYP VertexAttribs3fvNV)(GLuint index, GLsizei n, const GLfloat * v); /* 1178 */ + void (GLAPIENTRYP VertexAttribs3svNV)(GLuint index, GLsizei n, const GLshort * v); /* 1179 */ + void (GLAPIENTRYP VertexAttribs4dvNV)(GLuint index, GLsizei n, const GLdouble * v); /* 1180 */ + void (GLAPIENTRYP VertexAttribs4fvNV)(GLuint index, GLsizei n, const GLfloat * v); /* 1181 */ + void (GLAPIENTRYP VertexAttribs4svNV)(GLuint index, GLsizei n, const GLshort * v); /* 1182 */ + void (GLAPIENTRYP VertexAttribs4ubvNV)(GLuint index, GLsizei n, const GLubyte * v); /* 1183 */ + void (GLAPIENTRYP GetTexBumpParameterfvATI)(GLenum pname, GLfloat * param); /* 1184 */ + void (GLAPIENTRYP GetTexBumpParameterivATI)(GLenum pname, GLint * param); /* 1185 */ + void (GLAPIENTRYP TexBumpParameterfvATI)(GLenum pname, const GLfloat * param); /* 1186 */ + void (GLAPIENTRYP TexBumpParameterivATI)(GLenum pname, const GLint * param); /* 1187 */ + void (GLAPIENTRYP AlphaFragmentOp1ATI)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); /* 1188 */ + void (GLAPIENTRYP AlphaFragmentOp2ATI)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); /* 1189 */ + void (GLAPIENTRYP AlphaFragmentOp3ATI)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); /* 1190 */ + void (GLAPIENTRYP BeginFragmentShaderATI)(void); /* 1191 */ + void (GLAPIENTRYP BindFragmentShaderATI)(GLuint id); /* 1192 */ + void (GLAPIENTRYP ColorFragmentOp1ATI)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); /* 1193 */ + void (GLAPIENTRYP ColorFragmentOp2ATI)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); /* 1194 */ + void (GLAPIENTRYP ColorFragmentOp3ATI)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); /* 1195 */ + void (GLAPIENTRYP DeleteFragmentShaderATI)(GLuint id); /* 1196 */ + void (GLAPIENTRYP EndFragmentShaderATI)(void); /* 1197 */ + GLuint (GLAPIENTRYP GenFragmentShadersATI)(GLuint range); /* 1198 */ + void (GLAPIENTRYP PassTexCoordATI)(GLuint dst, GLuint coord, GLenum swizzle); /* 1199 */ + void (GLAPIENTRYP SampleMapATI)(GLuint dst, GLuint interp, GLenum swizzle); /* 1200 */ + void (GLAPIENTRYP SetFragmentShaderConstantATI)(GLuint dst, const GLfloat * value); /* 1201 */ + void (GLAPIENTRYP DepthRangeArrayfvOES)(GLuint first, GLsizei count, const GLfloat * v); /* 1202 */ + void (GLAPIENTRYP DepthRangeIndexedfOES)(GLuint index, GLfloat n, GLfloat f); /* 1203 */ + void (GLAPIENTRYP ActiveStencilFaceEXT)(GLenum face); /* 1204 */ + void (GLAPIENTRYP BindVertexArrayAPPLE)(GLuint array); /* 1205 */ + void (GLAPIENTRYP GenVertexArraysAPPLE)(GLsizei n, GLuint * arrays); /* 1206 */ + void (GLAPIENTRYP GetProgramNamedParameterdvNV)(GLuint id, GLsizei len, const GLubyte * name, GLdouble * params); /* 1207 */ + void (GLAPIENTRYP GetProgramNamedParameterfvNV)(GLuint id, GLsizei len, const GLubyte * name, GLfloat * params); /* 1208 */ + void (GLAPIENTRYP ProgramNamedParameter4dNV)(GLuint id, GLsizei len, const GLubyte * name, GLdouble x, GLdouble y, GLdouble z, GLdouble w); /* 1209 */ + void (GLAPIENTRYP ProgramNamedParameter4dvNV)(GLuint id, GLsizei len, const GLubyte * name, const GLdouble * v); /* 1210 */ + void (GLAPIENTRYP ProgramNamedParameter4fNV)(GLuint id, GLsizei len, const GLubyte * name, GLfloat x, GLfloat y, GLfloat z, GLfloat w); /* 1211 */ + void (GLAPIENTRYP ProgramNamedParameter4fvNV)(GLuint id, GLsizei len, const GLubyte * name, const GLfloat * v); /* 1212 */ + void (GLAPIENTRYP PrimitiveRestartNV)(void); /* 1213 */ + void (GLAPIENTRYP GetTexGenxvOES)(GLenum coord, GLenum pname, GLfixed * params); /* 1214 */ + void (GLAPIENTRYP TexGenxOES)(GLenum coord, GLenum pname, GLint param); /* 1215 */ + void (GLAPIENTRYP TexGenxvOES)(GLenum coord, GLenum pname, const GLfixed * params); /* 1216 */ + void (GLAPIENTRYP DepthBoundsEXT)(GLclampd zmin, GLclampd zmax); /* 1217 */ + void (GLAPIENTRYP BindFramebufferEXT)(GLenum target, GLuint framebuffer); /* 1218 */ + void (GLAPIENTRYP BindRenderbufferEXT)(GLenum target, GLuint renderbuffer); /* 1219 */ + void (GLAPIENTRYP StringMarkerGREMEDY)(GLsizei len, const GLvoid * string); /* 1220 */ + void (GLAPIENTRYP BufferParameteriAPPLE)(GLenum target, GLenum pname, GLint param); /* 1221 */ + void (GLAPIENTRYP FlushMappedBufferRangeAPPLE)(GLenum target, GLintptr offset, GLsizeiptr size); /* 1222 */ + void (GLAPIENTRYP VertexAttribI1iEXT)(GLuint index, GLint x); /* 1223 */ + void (GLAPIENTRYP VertexAttribI1uiEXT)(GLuint index, GLuint x); /* 1224 */ + void (GLAPIENTRYP VertexAttribI2iEXT)(GLuint index, GLint x, GLint y); /* 1225 */ + void (GLAPIENTRYP VertexAttribI2ivEXT)(GLuint index, const GLint * v); /* 1226 */ + void (GLAPIENTRYP VertexAttribI2uiEXT)(GLuint index, GLuint x, GLuint y); /* 1227 */ + void (GLAPIENTRYP VertexAttribI2uivEXT)(GLuint index, const GLuint * v); /* 1228 */ + void (GLAPIENTRYP VertexAttribI3iEXT)(GLuint index, GLint x, GLint y, GLint z); /* 1229 */ + void (GLAPIENTRYP VertexAttribI3ivEXT)(GLuint index, const GLint * v); /* 1230 */ + void (GLAPIENTRYP VertexAttribI3uiEXT)(GLuint index, GLuint x, GLuint y, GLuint z); /* 1231 */ + void (GLAPIENTRYP VertexAttribI3uivEXT)(GLuint index, const GLuint * v); /* 1232 */ + void (GLAPIENTRYP VertexAttribI4iEXT)(GLuint index, GLint x, GLint y, GLint z, GLint w); /* 1233 */ + void (GLAPIENTRYP VertexAttribI4ivEXT)(GLuint index, const GLint * v); /* 1234 */ + void (GLAPIENTRYP VertexAttribI4uiEXT)(GLuint index, GLuint x, GLuint y, GLuint z, GLuint w); /* 1235 */ + void (GLAPIENTRYP VertexAttribI4uivEXT)(GLuint index, const GLuint * v); /* 1236 */ + void (GLAPIENTRYP ClearColorIiEXT)(GLint r, GLint g, GLint b, GLint a); /* 1237 */ + void (GLAPIENTRYP ClearColorIuiEXT)(GLuint r, GLuint g, GLuint b, GLuint a); /* 1238 */ + void (GLAPIENTRYP BindBufferOffsetEXT)(GLenum target, GLuint index, GLuint buffer, GLintptr offset); /* 1239 */ + void (GLAPIENTRYP BeginPerfMonitorAMD)(GLuint monitor); /* 1240 */ + void (GLAPIENTRYP DeletePerfMonitorsAMD)(GLsizei n, GLuint * monitors); /* 1241 */ + void (GLAPIENTRYP EndPerfMonitorAMD)(GLuint monitor); /* 1242 */ + void (GLAPIENTRYP GenPerfMonitorsAMD)(GLsizei n, GLuint * monitors); /* 1243 */ + void (GLAPIENTRYP GetPerfMonitorCounterDataAMD)(GLuint monitor, GLenum pname, GLsizei dataSize, GLuint * data, GLint * bytesWritten); /* 1244 */ + void (GLAPIENTRYP GetPerfMonitorCounterInfoAMD)(GLuint group, GLuint counter, GLenum pname, GLvoid * data); /* 1245 */ + void (GLAPIENTRYP GetPerfMonitorCounterStringAMD)(GLuint group, GLuint counter, GLsizei bufSize, GLsizei * length, GLchar * counterString); /* 1246 */ + void (GLAPIENTRYP GetPerfMonitorCountersAMD)(GLuint group, GLint * numCounters, GLint * maxActiveCounters, GLsizei countersSize, GLuint * counters); /* 1247 */ + void (GLAPIENTRYP GetPerfMonitorGroupStringAMD)(GLuint group, GLsizei bufSize, GLsizei * length, GLchar * groupString); /* 1248 */ + void (GLAPIENTRYP GetPerfMonitorGroupsAMD)(GLint * numGroups, GLsizei groupsSize, GLuint * groups); /* 1249 */ + void (GLAPIENTRYP SelectPerfMonitorCountersAMD)(GLuint monitor, GLboolean enable, GLuint group, GLint numCounters, GLuint * counterList); /* 1250 */ + void (GLAPIENTRYP GetObjectParameterivAPPLE)(GLenum objectType, GLuint name, GLenum pname, GLint * value); /* 1251 */ + GLenum (GLAPIENTRYP ObjectPurgeableAPPLE)(GLenum objectType, GLuint name, GLenum option); /* 1252 */ + GLenum (GLAPIENTRYP ObjectUnpurgeableAPPLE)(GLenum objectType, GLuint name, GLenum option); /* 1253 */ + void (GLAPIENTRYP ActiveProgramEXT)(GLuint program); /* 1254 */ + GLuint (GLAPIENTRYP CreateShaderProgramEXT)(GLenum type, const GLchar * string); /* 1255 */ + void (GLAPIENTRYP UseShaderProgramEXT)(GLenum type, GLuint program); /* 1256 */ + void (GLAPIENTRYP TextureBarrierNV)(void); /* 1257 */ + void (GLAPIENTRYP VDPAUFiniNV)(void); /* 1258 */ + void (GLAPIENTRYP VDPAUGetSurfaceivNV)(GLintptr surface, GLenum pname, GLsizei bufSize, GLsizei * length, GLint * values); /* 1259 */ + void (GLAPIENTRYP VDPAUInitNV)(const GLvoid * vdpDevice, const GLvoid * getProcAddress); /* 1260 */ + GLboolean (GLAPIENTRYP VDPAUIsSurfaceNV)(GLintptr surface); /* 1261 */ + void (GLAPIENTRYP VDPAUMapSurfacesNV)(GLsizei numSurfaces, const GLintptr * surfaces); /* 1262 */ + GLintptr (GLAPIENTRYP VDPAURegisterOutputSurfaceNV)(const GLvoid * vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint * textureNames); /* 1263 */ + GLintptr (GLAPIENTRYP VDPAURegisterVideoSurfaceNV)(const GLvoid * vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint * textureNames); /* 1264 */ + void (GLAPIENTRYP VDPAUSurfaceAccessNV)(GLintptr surface, GLenum access); /* 1265 */ + void (GLAPIENTRYP VDPAUUnmapSurfacesNV)(GLsizei numSurfaces, const GLintptr * surfaces); /* 1266 */ + void (GLAPIENTRYP VDPAUUnregisterSurfaceNV)(GLintptr surface); /* 1267 */ + void (GLAPIENTRYP BeginPerfQueryINTEL)(GLuint queryHandle); /* 1268 */ + void (GLAPIENTRYP CreatePerfQueryINTEL)(GLuint queryId, GLuint * queryHandle); /* 1269 */ + void (GLAPIENTRYP DeletePerfQueryINTEL)(GLuint queryHandle); /* 1270 */ + void (GLAPIENTRYP EndPerfQueryINTEL)(GLuint queryHandle); /* 1271 */ + void (GLAPIENTRYP GetFirstPerfQueryIdINTEL)(GLuint * queryId); /* 1272 */ + void (GLAPIENTRYP GetNextPerfQueryIdINTEL)(GLuint queryId, GLuint * nextQueryId); /* 1273 */ + void (GLAPIENTRYP GetPerfCounterInfoINTEL)(GLuint queryId, GLuint counterId, GLuint counterNameLength, GLchar * counterName, GLuint counterDescLength, GLchar * counterDesc, GLuint * counterOffset, GLuint * counterDataSize, GLuint * counterTypeEnum, GLuint * counterDataTypeEnum, GLuint64 * rawCounterMaxValue); /* 1274 */ + void (GLAPIENTRYP GetPerfQueryDataINTEL)(GLuint queryHandle, GLuint flags, GLsizei dataSize, GLvoid * data, GLuint * bytesWritten); /* 1275 */ + void (GLAPIENTRYP GetPerfQueryIdByNameINTEL)(GLchar * queryName, GLuint * queryId); /* 1276 */ + void (GLAPIENTRYP GetPerfQueryInfoINTEL)(GLuint queryId, GLuint queryNameLength, GLchar * queryName, GLuint * dataSize, GLuint * noCounters, GLuint * noInstances, GLuint * capsMask); /* 1277 */ + void (GLAPIENTRYP PolygonOffsetClampEXT)(GLfloat factor, GLfloat units, GLfloat clamp); /* 1278 */ + void (GLAPIENTRYP WindowRectanglesEXT)(GLenum mode, GLsizei count, const GLint * box); /* 1279 */ + void (GLAPIENTRYP StencilFuncSeparateATI)(GLenum frontfunc, GLenum backfunc, GLint ref, GLuint mask); /* 1280 */ + void (GLAPIENTRYP ProgramEnvParameters4fvEXT)(GLenum target, GLuint index, GLsizei count, const GLfloat * params); /* 1281 */ + void (GLAPIENTRYP ProgramLocalParameters4fvEXT)(GLenum target, GLuint index, GLsizei count, const GLfloat * params); /* 1282 */ + void (GLAPIENTRYP EGLImageTargetRenderbufferStorageOES)(GLenum target, GLvoid * writeOffset); /* 1283 */ + void (GLAPIENTRYP EGLImageTargetTexture2DOES)(GLenum target, GLvoid * writeOffset); /* 1284 */ + void (GLAPIENTRYP AlphaFuncx)(GLenum func, GLclampx ref); /* 1285 */ + void (GLAPIENTRYP ClearColorx)(GLclampx red, GLclampx green, GLclampx blue, GLclampx alpha); /* 1286 */ + void (GLAPIENTRYP ClearDepthx)(GLclampx depth); /* 1287 */ + void (GLAPIENTRYP Color4x)(GLfixed red, GLfixed green, GLfixed blue, GLfixed alpha); /* 1288 */ + void (GLAPIENTRYP DepthRangex)(GLclampx zNear, GLclampx zFar); /* 1289 */ + void (GLAPIENTRYP Fogx)(GLenum pname, GLfixed param); /* 1290 */ + void (GLAPIENTRYP Fogxv)(GLenum pname, const GLfixed * params); /* 1291 */ + void (GLAPIENTRYP Frustumf)(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar); /* 1292 */ + void (GLAPIENTRYP Frustumx)(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar); /* 1293 */ + void (GLAPIENTRYP LightModelx)(GLenum pname, GLfixed param); /* 1294 */ + void (GLAPIENTRYP LightModelxv)(GLenum pname, const GLfixed * params); /* 1295 */ + void (GLAPIENTRYP Lightx)(GLenum light, GLenum pname, GLfixed param); /* 1296 */ + void (GLAPIENTRYP Lightxv)(GLenum light, GLenum pname, const GLfixed * params); /* 1297 */ + void (GLAPIENTRYP LineWidthx)(GLfixed width); /* 1298 */ + void (GLAPIENTRYP LoadMatrixx)(const GLfixed * m); /* 1299 */ + void (GLAPIENTRYP Materialx)(GLenum face, GLenum pname, GLfixed param); /* 1300 */ + void (GLAPIENTRYP Materialxv)(GLenum face, GLenum pname, const GLfixed * params); /* 1301 */ + void (GLAPIENTRYP MultMatrixx)(const GLfixed * m); /* 1302 */ + void (GLAPIENTRYP MultiTexCoord4x)(GLenum target, GLfixed s, GLfixed t, GLfixed r, GLfixed q); /* 1303 */ + void (GLAPIENTRYP Normal3x)(GLfixed nx, GLfixed ny, GLfixed nz); /* 1304 */ + void (GLAPIENTRYP Orthof)(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar); /* 1305 */ + void (GLAPIENTRYP Orthox)(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar); /* 1306 */ + void (GLAPIENTRYP PointSizex)(GLfixed size); /* 1307 */ + void (GLAPIENTRYP PolygonOffsetx)(GLfixed factor, GLfixed units); /* 1308 */ + void (GLAPIENTRYP Rotatex)(GLfixed angle, GLfixed x, GLfixed y, GLfixed z); /* 1309 */ + void (GLAPIENTRYP SampleCoveragex)(GLclampx value, GLboolean invert); /* 1310 */ + void (GLAPIENTRYP Scalex)(GLfixed x, GLfixed y, GLfixed z); /* 1311 */ + void (GLAPIENTRYP TexEnvx)(GLenum target, GLenum pname, GLfixed param); /* 1312 */ + void (GLAPIENTRYP TexEnvxv)(GLenum target, GLenum pname, const GLfixed * params); /* 1313 */ + void (GLAPIENTRYP TexParameterx)(GLenum target, GLenum pname, GLfixed param); /* 1314 */ + void (GLAPIENTRYP Translatex)(GLfixed x, GLfixed y, GLfixed z); /* 1315 */ + void (GLAPIENTRYP ClipPlanef)(GLenum plane, const GLfloat * equation); /* 1316 */ + void (GLAPIENTRYP ClipPlanex)(GLenum plane, const GLfixed * equation); /* 1317 */ + void (GLAPIENTRYP GetClipPlanef)(GLenum plane, GLfloat * equation); /* 1318 */ + void (GLAPIENTRYP GetClipPlanex)(GLenum plane, GLfixed * equation); /* 1319 */ + void (GLAPIENTRYP GetFixedv)(GLenum pname, GLfixed * params); /* 1320 */ + void (GLAPIENTRYP GetLightxv)(GLenum light, GLenum pname, GLfixed * params); /* 1321 */ + void (GLAPIENTRYP GetMaterialxv)(GLenum face, GLenum pname, GLfixed * params); /* 1322 */ + void (GLAPIENTRYP GetTexEnvxv)(GLenum target, GLenum pname, GLfixed * params); /* 1323 */ + void (GLAPIENTRYP GetTexParameterxv)(GLenum target, GLenum pname, GLfixed * params); /* 1324 */ + void (GLAPIENTRYP PointParameterx)(GLenum pname, GLfixed param); /* 1325 */ + void (GLAPIENTRYP PointParameterxv)(GLenum pname, const GLfixed * params); /* 1326 */ + void (GLAPIENTRYP TexParameterxv)(GLenum target, GLenum pname, const GLfixed * params); /* 1327 */ + void (GLAPIENTRYP BlendBarrier)(void); /* 1328 */ + void (GLAPIENTRYP PrimitiveBoundingBox)(GLfloat minX, GLfloat minY, GLfloat minZ, GLfloat minW, GLfloat maxX, GLfloat maxY, GLfloat maxZ, GLfloat maxW); /* 1329 */ #endif /* !defined HAVE_SHARED_GLAPI */ }; diff -Nru mesa-12.0.6/src/mapi/glapi/glapitemp.h mesa-17.0.7/src/mapi/glapi/glapitemp.h --- mesa-12.0.6/src/mapi/glapi/glapitemp.h 2017-01-24 01:42:38.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/glapitemp.h 2017-06-01 10:37:41.000000000 +0000 @@ -5748,7 +5748,7 @@ KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_616)(GLenum target, GLenum attachment, GLuint texture, GLint level) { (void) target; (void) attachment; (void) texture; (void) level; - DISPATCH(FramebufferTexture, (target, attachment, texture, level), (F, "glFramebufferTextureOES(0x%x, 0x%x, %d, %d);\n", target, attachment, texture, level)); + DISPATCH(FramebufferTexture, (target, attachment, texture, level), (F, "glFramebufferTextureEXT(0x%x, 0x%x, %d, %d);\n", target, attachment, texture, level)); } KEYWORD1 void KEYWORD2 NAME(GetBufferParameteri64v)(GLenum target, GLenum pname, GLint64 * params) @@ -6800,6 +6800,12 @@ DISPATCH(BlendEquationSeparateiARB, (buf, modeRGB, modeA), (F, "glBlendEquationSeparateiARB(%d, 0x%x, 0x%x);\n", buf, modeRGB, modeA)); } +KEYWORD1 void KEYWORD2 NAME(BlendEquationSeparatei)(GLuint buf, GLenum modeRGB, GLenum modeA) +{ + (void) buf; (void) modeRGB; (void) modeA; + DISPATCH(BlendEquationSeparateiARB, (buf, modeRGB, modeA), (F, "glBlendEquationSeparatei(%d, 0x%x, 0x%x);\n", buf, modeRGB, modeA)); +} + KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_711)(GLuint buf, GLenum modeRGB, GLenum modeA); KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_711)(GLuint buf, GLenum modeRGB, GLenum modeA) @@ -6814,6 +6820,12 @@ DISPATCH(BlendEquationiARB, (buf, mode), (F, "glBlendEquationiARB(%d, 0x%x);\n", buf, mode)); } +KEYWORD1 void KEYWORD2 NAME(BlendEquationi)(GLuint buf, GLenum mode) +{ + (void) buf; (void) mode; + DISPATCH(BlendEquationiARB, (buf, mode), (F, "glBlendEquationi(%d, 0x%x);\n", buf, mode)); +} + KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_712)(GLuint buf, GLenum mode); KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_712)(GLuint buf, GLenum mode) @@ -6828,6 +6840,12 @@ DISPATCH(BlendFuncSeparateiARB, (buf, srcRGB, dstRGB, srcA, dstA), (F, "glBlendFuncSeparateiARB(%d, 0x%x, 0x%x, 0x%x, 0x%x);\n", buf, srcRGB, dstRGB, srcA, dstA)); } +KEYWORD1 void KEYWORD2 NAME(BlendFuncSeparatei)(GLuint buf, GLenum sfactorRGB, GLenum dfactorRGB, GLenum sfactorAlpha, GLenum dfactorAlpha) +{ + (void) buf; (void) sfactorRGB; (void) dfactorRGB; (void) sfactorAlpha; (void) dfactorAlpha; + DISPATCH(BlendFuncSeparateiARB, (buf, sfactorRGB, dfactorRGB, sfactorAlpha, dfactorAlpha), (F, "glBlendFuncSeparatei(%d, 0x%x, 0x%x, 0x%x, 0x%x);\n", buf, sfactorRGB, dfactorRGB, sfactorAlpha, dfactorAlpha)); +} + KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_713)(GLuint buf, GLenum srcRGB, GLenum dstRGB, GLenum srcA, GLenum dstA); KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_713)(GLuint buf, GLenum srcRGB, GLenum dstRGB, GLenum srcA, GLenum dstA) @@ -6842,6 +6860,12 @@ DISPATCH(BlendFunciARB, (buf, src, dst), (F, "glBlendFunciARB(%d, 0x%x, 0x%x);\n", buf, src, dst)); } +KEYWORD1 void KEYWORD2 NAME(BlendFunci)(GLuint buf, GLenum sfactor, GLenum dfactor) +{ + (void) buf; (void) sfactor; (void) dfactor; + DISPATCH(BlendFunciARB, (buf, sfactor, dfactor), (F, "glBlendFunci(%d, 0x%x, 0x%x);\n", buf, sfactor, dfactor)); +} + KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_714)(GLuint buf, GLenum src, GLenum dst); KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_714)(GLuint buf, GLenum src, GLenum dst) @@ -7474,12 +7498,18 @@ DISPATCH(PatchParameterfv, (pname, values), (F, "glPatchParameterfv(0x%x, %p);\n", pname, (const void *) values)); } +KEYWORD1 void KEYWORD2 NAME(PatchParameteri)(GLenum pname, GLint value) +{ + (void) pname; (void) value; + DISPATCH(PatchParameteri, (pname, value), (F, "glPatchParameteri(0x%x, %d);\n", pname, value)); +} + KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_801)(GLenum pname, GLint value); KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_801)(GLenum pname, GLint value) { (void) pname; (void) value; - DISPATCH(PatchParameteri, (pname, value), (F, "glPatchParameteri(0x%x, %d);\n", pname, value)); + DISPATCH(PatchParameteri, (pname, value), (F, "glPatchParameteriEXT(0x%x, %d);\n", pname, value)); } KEYWORD1 void KEYWORD2 NAME(BindTransformFeedback)(GLenum target, GLuint id) @@ -7737,52 +7767,113 @@ DISPATCH(GetFloati_v, (target, index, data), (F, "glGetFloati_v(0x%x, %d, %p);\n", target, index, (const void *) data)); } +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_834)(GLenum target, GLuint index, GLfloat * data); + +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_834)(GLenum target, GLuint index, GLfloat * data) +{ + (void) target; (void) index; (void) data; + DISPATCH(GetFloati_v, (target, index, data), (F, "glGetFloati_vOES(0x%x, %d, %p);\n", target, index, (const void *) data)); +} + KEYWORD1 void KEYWORD2 NAME(ScissorArrayv)(GLuint first, GLsizei count, const int * v) { (void) first; (void) count; (void) v; DISPATCH(ScissorArrayv, (first, count, v), (F, "glScissorArrayv(%d, %d, %p);\n", first, count, (const void *) v)); } +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_835)(GLuint first, GLsizei count, const int * v); + +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_835)(GLuint first, GLsizei count, const int * v) +{ + (void) first; (void) count; (void) v; + DISPATCH(ScissorArrayv, (first, count, v), (F, "glScissorArrayvOES(%d, %d, %p);\n", first, count, (const void *) v)); +} + KEYWORD1 void KEYWORD2 NAME(ScissorIndexed)(GLuint index, GLint left, GLint bottom, GLsizei width, GLsizei height) { (void) index; (void) left; (void) bottom; (void) width; (void) height; DISPATCH(ScissorIndexed, (index, left, bottom, width, height), (F, "glScissorIndexed(%d, %d, %d, %d, %d);\n", index, left, bottom, width, height)); } +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_836)(GLuint index, GLint left, GLint bottom, GLsizei width, GLsizei height); + +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_836)(GLuint index, GLint left, GLint bottom, GLsizei width, GLsizei height) +{ + (void) index; (void) left; (void) bottom; (void) width; (void) height; + DISPATCH(ScissorIndexed, (index, left, bottom, width, height), (F, "glScissorIndexedOES(%d, %d, %d, %d, %d);\n", index, left, bottom, width, height)); +} + KEYWORD1 void KEYWORD2 NAME(ScissorIndexedv)(GLuint index, const GLint * v) { (void) index; (void) v; DISPATCH(ScissorIndexedv, (index, v), (F, "glScissorIndexedv(%d, %p);\n", index, (const void *) v)); } +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_837)(GLuint index, const GLint * v); + +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_837)(GLuint index, const GLint * v) +{ + (void) index; (void) v; + DISPATCH(ScissorIndexedv, (index, v), (F, "glScissorIndexedvOES(%d, %p);\n", index, (const void *) v)); +} + KEYWORD1 void KEYWORD2 NAME(ViewportArrayv)(GLuint first, GLsizei count, const GLfloat * v) { (void) first; (void) count; (void) v; DISPATCH(ViewportArrayv, (first, count, v), (F, "glViewportArrayv(%d, %d, %p);\n", first, count, (const void *) v)); } +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_838)(GLuint first, GLsizei count, const GLfloat * v); + +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_838)(GLuint first, GLsizei count, const GLfloat * v) +{ + (void) first; (void) count; (void) v; + DISPATCH(ViewportArrayv, (first, count, v), (F, "glViewportArrayvOES(%d, %d, %p);\n", first, count, (const void *) v)); +} + KEYWORD1 void KEYWORD2 NAME(ViewportIndexedf)(GLuint index, GLfloat x, GLfloat y, GLfloat w, GLfloat h) { (void) index; (void) x; (void) y; (void) w; (void) h; DISPATCH(ViewportIndexedf, (index, x, y, w, h), (F, "glViewportIndexedf(%d, %f, %f, %f, %f);\n", index, x, y, w, h)); } +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_839)(GLuint index, GLfloat x, GLfloat y, GLfloat w, GLfloat h); + +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_839)(GLuint index, GLfloat x, GLfloat y, GLfloat w, GLfloat h) +{ + (void) index; (void) x; (void) y; (void) w; (void) h; + DISPATCH(ViewportIndexedf, (index, x, y, w, h), (F, "glViewportIndexedfOES(%d, %f, %f, %f, %f);\n", index, x, y, w, h)); +} + KEYWORD1 void KEYWORD2 NAME(ViewportIndexedfv)(GLuint index, const GLfloat * v) { (void) index; (void) v; DISPATCH(ViewportIndexedfv, (index, v), (F, "glViewportIndexedfv(%d, %p);\n", index, (const void *) v)); } +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_840)(GLuint index, const GLfloat * v); + +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_840)(GLuint index, const GLfloat * v) +{ + (void) index; (void) v; + DISPATCH(ViewportIndexedfv, (index, v), (F, "glViewportIndexedfvOES(%d, %p);\n", index, (const void *) v)); +} + KEYWORD1 GLenum KEYWORD2 NAME(GetGraphicsResetStatusARB)(void) { RETURN_DISPATCH(GetGraphicsResetStatusARB, (), (F, "glGetGraphicsResetStatusARB();\n")); } +KEYWORD1 GLenum KEYWORD2 NAME(GetGraphicsResetStatus)(void) +{ + RETURN_DISPATCH(GetGraphicsResetStatusARB, (), (F, "glGetGraphicsResetStatus();\n")); +} + KEYWORD1_ALT GLenum KEYWORD2 NAME(_dispatch_stub_841)(void); KEYWORD1_ALT GLenum KEYWORD2 NAME(_dispatch_stub_841)(void) { - RETURN_DISPATCH(GetGraphicsResetStatusARB, (), (F, "glGetGraphicsResetStatus();\n")); + RETURN_DISPATCH(GetGraphicsResetStatusARB, (), (F, "glGetGraphicsResetStatusKHR();\n")); } KEYWORD1 void KEYWORD2 NAME(GetnColorTableARB)(GLenum target, GLenum format, GLenum type, GLsizei bufSize, GLvoid * table) @@ -7881,12 +7972,18 @@ DISPATCH(GetnUniformfvARB, (program, location, bufSize, params), (F, "glGetnUniformfvARB(%d, %d, %d, %p);\n", program, location, bufSize, (const void *) params)); } +KEYWORD1 void KEYWORD2 NAME(GetnUniformfv)(GLuint program, GLint location, GLsizei bufSize, GLfloat * params) +{ + (void) program; (void) location; (void) bufSize; (void) params; + DISPATCH(GetnUniformfvARB, (program, location, bufSize, params), (F, "glGetnUniformfv(%d, %d, %d, %p);\n", program, location, bufSize, (const void *) params)); +} + KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_857)(GLuint program, GLint location, GLsizei bufSize, GLfloat * params); KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_857)(GLuint program, GLint location, GLsizei bufSize, GLfloat * params) { (void) program; (void) location; (void) bufSize; (void) params; - DISPATCH(GetnUniformfvARB, (program, location, bufSize, params), (F, "glGetnUniformfv(%d, %d, %d, %p);\n", program, location, bufSize, (const void *) params)); + DISPATCH(GetnUniformfvARB, (program, location, bufSize, params), (F, "glGetnUniformfvKHR(%d, %d, %d, %p);\n", program, location, bufSize, (const void *) params)); } KEYWORD1 void KEYWORD2 NAME(GetnUniformivARB)(GLuint program, GLint location, GLsizei bufSize, GLint * params) @@ -7895,12 +7992,18 @@ DISPATCH(GetnUniformivARB, (program, location, bufSize, params), (F, "glGetnUniformivARB(%d, %d, %d, %p);\n", program, location, bufSize, (const void *) params)); } +KEYWORD1 void KEYWORD2 NAME(GetnUniformiv)(GLuint program, GLint location, GLsizei bufSize, GLint * params) +{ + (void) program; (void) location; (void) bufSize; (void) params; + DISPATCH(GetnUniformivARB, (program, location, bufSize, params), (F, "glGetnUniformiv(%d, %d, %d, %p);\n", program, location, bufSize, (const void *) params)); +} + KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_858)(GLuint program, GLint location, GLsizei bufSize, GLint * params); KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_858)(GLuint program, GLint location, GLsizei bufSize, GLint * params) { (void) program; (void) location; (void) bufSize; (void) params; - DISPATCH(GetnUniformivARB, (program, location, bufSize, params), (F, "glGetnUniformiv(%d, %d, %d, %p);\n", program, location, bufSize, (const void *) params)); + DISPATCH(GetnUniformivARB, (program, location, bufSize, params), (F, "glGetnUniformivKHR(%d, %d, %d, %p);\n", program, location, bufSize, (const void *) params)); } KEYWORD1 void KEYWORD2 NAME(GetnUniformuivARB)(GLuint program, GLint location, GLsizei bufSize, GLuint * params) @@ -7909,12 +8012,18 @@ DISPATCH(GetnUniformuivARB, (program, location, bufSize, params), (F, "glGetnUniformuivARB(%d, %d, %d, %p);\n", program, location, bufSize, (const void *) params)); } +KEYWORD1 void KEYWORD2 NAME(GetnUniformuiv)(GLuint program, GLint location, GLsizei bufSize, GLuint * params) +{ + (void) program; (void) location; (void) bufSize; (void) params; + DISPATCH(GetnUniformuivARB, (program, location, bufSize, params), (F, "glGetnUniformuiv(%d, %d, %d, %p);\n", program, location, bufSize, (const void *) params)); +} + KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_859)(GLuint program, GLint location, GLsizei bufSize, GLuint * params); KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_859)(GLuint program, GLint location, GLsizei bufSize, GLuint * params) { (void) program; (void) location; (void) bufSize; (void) params; - DISPATCH(GetnUniformuivARB, (program, location, bufSize, params), (F, "glGetnUniformuiv(%d, %d, %d, %p);\n", program, location, bufSize, (const void *) params)); + DISPATCH(GetnUniformuivARB, (program, location, bufSize, params), (F, "glGetnUniformuivKHR(%d, %d, %d, %p);\n", program, location, bufSize, (const void *) params)); } KEYWORD1 void KEYWORD2 NAME(ReadnPixelsARB)(GLint x, GLint y, GLsizei width, GLsizei height, GLenum format, GLenum type, GLsizei bufSize, GLvoid * data) @@ -7923,12 +8032,18 @@ DISPATCH(ReadnPixelsARB, (x, y, width, height, format, type, bufSize, data), (F, "glReadnPixelsARB(%d, %d, %d, %d, 0x%x, 0x%x, %d, %p);\n", x, y, width, height, format, type, bufSize, (const void *) data)); } +KEYWORD1 void KEYWORD2 NAME(ReadnPixels)(GLint x, GLint y, GLsizei width, GLsizei height, GLenum format, GLenum type, GLsizei bufSize, GLvoid * data) +{ + (void) x; (void) y; (void) width; (void) height; (void) format; (void) type; (void) bufSize; (void) data; + DISPATCH(ReadnPixelsARB, (x, y, width, height, format, type, bufSize, data), (F, "glReadnPixels(%d, %d, %d, %d, 0x%x, 0x%x, %d, %p);\n", x, y, width, height, format, type, bufSize, (const void *) data)); +} + KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_860)(GLint x, GLint y, GLsizei width, GLsizei height, GLenum format, GLenum type, GLsizei bufSize, GLvoid * data); KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_860)(GLint x, GLint y, GLsizei width, GLsizei height, GLenum format, GLenum type, GLsizei bufSize, GLvoid * data) { (void) x; (void) y; (void) width; (void) height; (void) format; (void) type; (void) bufSize; (void) data; - DISPATCH(ReadnPixelsARB, (x, y, width, height, format, type, bufSize, data), (F, "glReadnPixels(%d, %d, %d, %d, 0x%x, 0x%x, %d, %p);\n", x, y, width, height, format, type, bufSize, (const void *) data)); + DISPATCH(ReadnPixelsARB, (x, y, width, height, format, type, bufSize, data), (F, "glReadnPixelsKHR(%d, %d, %d, %d, 0x%x, 0x%x, %d, %p);\n", x, y, width, height, format, type, bufSize, (const void *) data)); } KEYWORD1 void KEYWORD2 NAME(DrawArraysInstancedBaseInstance)(GLenum mode, GLint first, GLsizei count, GLsizei primcount, GLuint baseinstance) @@ -8301,817 +8416,825 @@ DISPATCH(BindVertexBuffers, (first, count, buffers, offsets, strides), (F, "glBindVertexBuffers(%d, %d, %p, %p, %p);\n", first, count, (const void *) buffers, (const void *) offsets, (const void *) strides)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_912)(GLenum mode, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_912)(GLuint num_groups_x, GLuint num_groups_y, GLuint num_groups_z, GLuint group_size_x, GLuint group_size_y, GLuint group_size_z); + +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_912)(GLuint num_groups_x, GLuint num_groups_y, GLuint num_groups_z, GLuint group_size_x, GLuint group_size_y, GLuint group_size_z) +{ + (void) num_groups_x; (void) num_groups_y; (void) num_groups_z; (void) group_size_x; (void) group_size_y; (void) group_size_z; + DISPATCH(DispatchComputeGroupSizeARB, (num_groups_x, num_groups_y, num_groups_z, group_size_x, group_size_y, group_size_z), (F, "glDispatchComputeGroupSizeARB(%d, %d, %d, %d, %d, %d);\n", num_groups_x, num_groups_y, num_groups_z, group_size_x, group_size_y, group_size_z)); +} + +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_913)(GLenum mode, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_912)(GLenum mode, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_913)(GLenum mode, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride) { (void) mode; (void) indirect; (void) drawcount; (void) maxdrawcount; (void) stride; DISPATCH(MultiDrawArraysIndirectCountARB, (mode, indirect, drawcount, maxdrawcount, stride), (F, "glMultiDrawArraysIndirectCountARB(0x%x, %d, %d, %d, %d);\n", mode, indirect, drawcount, maxdrawcount, stride)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_913)(GLenum mode, GLenum type, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_914)(GLenum mode, GLenum type, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_913)(GLenum mode, GLenum type, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_914)(GLenum mode, GLenum type, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride) { (void) mode; (void) type; (void) indirect; (void) drawcount; (void) maxdrawcount; (void) stride; DISPATCH(MultiDrawElementsIndirectCountARB, (mode, type, indirect, drawcount, maxdrawcount, stride), (F, "glMultiDrawElementsIndirectCountARB(0x%x, 0x%x, %d, %d, %d, %d);\n", mode, type, indirect, drawcount, maxdrawcount, stride)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_914)(GLenum origin, GLenum depth); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_915)(GLenum origin, GLenum depth); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_914)(GLenum origin, GLenum depth) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_915)(GLenum origin, GLenum depth) { (void) origin; (void) depth; DISPATCH(ClipControl, (origin, depth), (F, "glClipControl(0x%x, 0x%x);\n", origin, depth)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_915)(GLuint unit, GLuint texture); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_916)(GLuint unit, GLuint texture); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_915)(GLuint unit, GLuint texture) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_916)(GLuint unit, GLuint texture) { (void) unit; (void) texture; DISPATCH(BindTextureUnit, (unit, texture), (F, "glBindTextureUnit(%d, %d);\n", unit, texture)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_916)(GLuint readFramebuffer, GLuint drawFramebuffer, GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_917)(GLuint readFramebuffer, GLuint drawFramebuffer, GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_916)(GLuint readFramebuffer, GLuint drawFramebuffer, GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_917)(GLuint readFramebuffer, GLuint drawFramebuffer, GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter) { (void) readFramebuffer; (void) drawFramebuffer; (void) srcX0; (void) srcY0; (void) srcX1; (void) srcY1; (void) dstX0; (void) dstY0; (void) dstX1; (void) dstY1; (void) mask; (void) filter; DISPATCH(BlitNamedFramebuffer, (readFramebuffer, drawFramebuffer, srcX0, srcY0, srcX1, srcY1, dstX0, dstY0, dstX1, dstY1, mask, filter), (F, "glBlitNamedFramebuffer(%d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, 0x%x);\n", readFramebuffer, drawFramebuffer, srcX0, srcY0, srcX1, srcY1, dstX0, dstY0, dstX1, dstY1, mask, filter)); } -KEYWORD1_ALT GLenum KEYWORD2 NAME(_dispatch_stub_917)(GLuint framebuffer, GLenum target); +KEYWORD1_ALT GLenum KEYWORD2 NAME(_dispatch_stub_918)(GLuint framebuffer, GLenum target); -KEYWORD1_ALT GLenum KEYWORD2 NAME(_dispatch_stub_917)(GLuint framebuffer, GLenum target) +KEYWORD1_ALT GLenum KEYWORD2 NAME(_dispatch_stub_918)(GLuint framebuffer, GLenum target) { (void) framebuffer; (void) target; RETURN_DISPATCH(CheckNamedFramebufferStatus, (framebuffer, target), (F, "glCheckNamedFramebufferStatus(%d, 0x%x);\n", framebuffer, target)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_918)(GLuint buffer, GLenum internalformat, GLenum format, GLenum type, const GLvoid * data); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_919)(GLuint buffer, GLenum internalformat, GLenum format, GLenum type, const GLvoid * data); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_918)(GLuint buffer, GLenum internalformat, GLenum format, GLenum type, const GLvoid * data) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_919)(GLuint buffer, GLenum internalformat, GLenum format, GLenum type, const GLvoid * data) { (void) buffer; (void) internalformat; (void) format; (void) type; (void) data; DISPATCH(ClearNamedBufferData, (buffer, internalformat, format, type, data), (F, "glClearNamedBufferData(%d, 0x%x, 0x%x, 0x%x, %p);\n", buffer, internalformat, format, type, (const void *) data)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_919)(GLuint buffer, GLenum internalformat, GLintptr offset, GLsizeiptr size, GLenum format, GLenum type, const GLvoid * data); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_920)(GLuint buffer, GLenum internalformat, GLintptr offset, GLsizeiptr size, GLenum format, GLenum type, const GLvoid * data); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_919)(GLuint buffer, GLenum internalformat, GLintptr offset, GLsizeiptr size, GLenum format, GLenum type, const GLvoid * data) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_920)(GLuint buffer, GLenum internalformat, GLintptr offset, GLsizeiptr size, GLenum format, GLenum type, const GLvoid * data) { (void) buffer; (void) internalformat; (void) offset; (void) size; (void) format; (void) type; (void) data; DISPATCH(ClearNamedBufferSubData, (buffer, internalformat, offset, size, format, type, data), (F, "glClearNamedBufferSubData(%d, 0x%x, %d, %d, 0x%x, 0x%x, %p);\n", buffer, internalformat, offset, size, format, type, (const void *) data)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_920)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, GLfloat depth, GLint stencil); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_921)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, GLfloat depth, GLint stencil); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_920)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, GLfloat depth, GLint stencil) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_921)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, GLfloat depth, GLint stencil) { (void) framebuffer; (void) buffer; (void) drawbuffer; (void) depth; (void) stencil; DISPATCH(ClearNamedFramebufferfi, (framebuffer, buffer, drawbuffer, depth, stencil), (F, "glClearNamedFramebufferfi(%d, 0x%x, %d, %f, %d);\n", framebuffer, buffer, drawbuffer, depth, stencil)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_921)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLfloat * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_922)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLfloat * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_921)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLfloat * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_922)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLfloat * value) { (void) framebuffer; (void) buffer; (void) drawbuffer; (void) value; DISPATCH(ClearNamedFramebufferfv, (framebuffer, buffer, drawbuffer, value), (F, "glClearNamedFramebufferfv(%d, 0x%x, %d, %p);\n", framebuffer, buffer, drawbuffer, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_922)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLint * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_923)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLint * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_922)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLint * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_923)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLint * value) { (void) framebuffer; (void) buffer; (void) drawbuffer; (void) value; DISPATCH(ClearNamedFramebufferiv, (framebuffer, buffer, drawbuffer, value), (F, "glClearNamedFramebufferiv(%d, 0x%x, %d, %p);\n", framebuffer, buffer, drawbuffer, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_923)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLuint * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_924)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLuint * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_923)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLuint * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_924)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLuint * value) { (void) framebuffer; (void) buffer; (void) drawbuffer; (void) value; DISPATCH(ClearNamedFramebufferuiv, (framebuffer, buffer, drawbuffer, value), (F, "glClearNamedFramebufferuiv(%d, 0x%x, %d, %p);\n", framebuffer, buffer, drawbuffer, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_924)(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLsizei imageSize, const GLvoid * data); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_925)(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLsizei imageSize, const GLvoid * data); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_924)(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLsizei imageSize, const GLvoid * data) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_925)(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLsizei imageSize, const GLvoid * data) { (void) texture; (void) level; (void) xoffset; (void) width; (void) format; (void) imageSize; (void) data; DISPATCH(CompressedTextureSubImage1D, (texture, level, xoffset, width, format, imageSize, data), (F, "glCompressedTextureSubImage1D(%d, %d, %d, %d, 0x%x, %d, %p);\n", texture, level, xoffset, width, format, imageSize, (const void *) data)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_925)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const GLvoid * data); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_926)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const GLvoid * data); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_925)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const GLvoid * data) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_926)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const GLvoid * data) { (void) texture; (void) level; (void) xoffset; (void) yoffset; (void) width; (void) height; (void) format; (void) imageSize; (void) data; DISPATCH(CompressedTextureSubImage2D, (texture, level, xoffset, yoffset, width, height, format, imageSize, data), (F, "glCompressedTextureSubImage2D(%d, %d, %d, %d, %d, %d, 0x%x, %d, %p);\n", texture, level, xoffset, yoffset, width, height, format, imageSize, (const void *) data)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_926)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid * data); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_927)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid * data); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_926)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid * data) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_927)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid * data) { (void) texture; (void) level; (void) xoffset; (void) yoffset; (void) zoffset; (void) width; (void) height; (void) depth; (void) format; (void) imageSize; (void) data; DISPATCH(CompressedTextureSubImage3D, (texture, level, xoffset, yoffset, zoffset, width, height, depth, format, imageSize, data), (F, "glCompressedTextureSubImage3D(%d, %d, %d, %d, %d, %d, %d, %d, 0x%x, %d, %p);\n", texture, level, xoffset, yoffset, zoffset, width, height, depth, format, imageSize, (const void *) data)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_927)(GLuint readBuffer, GLuint writeBuffer, GLintptr readOffset, GLintptr writeOffset, GLsizeiptr size); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_928)(GLuint readBuffer, GLuint writeBuffer, GLintptr readOffset, GLintptr writeOffset, GLsizeiptr size); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_927)(GLuint readBuffer, GLuint writeBuffer, GLintptr readOffset, GLintptr writeOffset, GLsizeiptr size) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_928)(GLuint readBuffer, GLuint writeBuffer, GLintptr readOffset, GLintptr writeOffset, GLsizeiptr size) { (void) readBuffer; (void) writeBuffer; (void) readOffset; (void) writeOffset; (void) size; DISPATCH(CopyNamedBufferSubData, (readBuffer, writeBuffer, readOffset, writeOffset, size), (F, "glCopyNamedBufferSubData(%d, %d, %d, %d, %d);\n", readBuffer, writeBuffer, readOffset, writeOffset, size)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_928)(GLuint texture, GLint level, GLint xoffset, GLint x, GLint y, GLsizei width); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_929)(GLuint texture, GLint level, GLint xoffset, GLint x, GLint y, GLsizei width); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_928)(GLuint texture, GLint level, GLint xoffset, GLint x, GLint y, GLsizei width) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_929)(GLuint texture, GLint level, GLint xoffset, GLint x, GLint y, GLsizei width) { (void) texture; (void) level; (void) xoffset; (void) x; (void) y; (void) width; DISPATCH(CopyTextureSubImage1D, (texture, level, xoffset, x, y, width), (F, "glCopyTextureSubImage1D(%d, %d, %d, %d, %d, %d);\n", texture, level, xoffset, x, y, width)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_929)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_930)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_929)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_930)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height) { (void) texture; (void) level; (void) xoffset; (void) yoffset; (void) x; (void) y; (void) width; (void) height; DISPATCH(CopyTextureSubImage2D, (texture, level, xoffset, yoffset, x, y, width, height), (F, "glCopyTextureSubImage2D(%d, %d, %d, %d, %d, %d, %d, %d);\n", texture, level, xoffset, yoffset, x, y, width, height)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_930)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_931)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_930)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_931)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height) { (void) texture; (void) level; (void) xoffset; (void) yoffset; (void) zoffset; (void) x; (void) y; (void) width; (void) height; DISPATCH(CopyTextureSubImage3D, (texture, level, xoffset, yoffset, zoffset, x, y, width, height), (F, "glCopyTextureSubImage3D(%d, %d, %d, %d, %d, %d, %d, %d, %d);\n", texture, level, xoffset, yoffset, zoffset, x, y, width, height)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_931)(GLsizei n, GLuint * buffers); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_932)(GLsizei n, GLuint * buffers); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_931)(GLsizei n, GLuint * buffers) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_932)(GLsizei n, GLuint * buffers) { (void) n; (void) buffers; DISPATCH(CreateBuffers, (n, buffers), (F, "glCreateBuffers(%d, %p);\n", n, (const void *) buffers)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_932)(GLsizei n, GLuint * framebuffers); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_933)(GLsizei n, GLuint * framebuffers); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_932)(GLsizei n, GLuint * framebuffers) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_933)(GLsizei n, GLuint * framebuffers) { (void) n; (void) framebuffers; DISPATCH(CreateFramebuffers, (n, framebuffers), (F, "glCreateFramebuffers(%d, %p);\n", n, (const void *) framebuffers)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_933)(GLsizei n, GLuint * pipelines); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_934)(GLsizei n, GLuint * pipelines); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_933)(GLsizei n, GLuint * pipelines) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_934)(GLsizei n, GLuint * pipelines) { (void) n; (void) pipelines; DISPATCH(CreateProgramPipelines, (n, pipelines), (F, "glCreateProgramPipelines(%d, %p);\n", n, (const void *) pipelines)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_934)(GLenum target, GLsizei n, GLuint * ids); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_935)(GLenum target, GLsizei n, GLuint * ids); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_934)(GLenum target, GLsizei n, GLuint * ids) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_935)(GLenum target, GLsizei n, GLuint * ids) { (void) target; (void) n; (void) ids; DISPATCH(CreateQueries, (target, n, ids), (F, "glCreateQueries(0x%x, %d, %p);\n", target, n, (const void *) ids)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_935)(GLsizei n, GLuint * renderbuffers); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_936)(GLsizei n, GLuint * renderbuffers); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_935)(GLsizei n, GLuint * renderbuffers) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_936)(GLsizei n, GLuint * renderbuffers) { (void) n; (void) renderbuffers; DISPATCH(CreateRenderbuffers, (n, renderbuffers), (F, "glCreateRenderbuffers(%d, %p);\n", n, (const void *) renderbuffers)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_936)(GLsizei n, GLuint * samplers); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_937)(GLsizei n, GLuint * samplers); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_936)(GLsizei n, GLuint * samplers) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_937)(GLsizei n, GLuint * samplers) { (void) n; (void) samplers; DISPATCH(CreateSamplers, (n, samplers), (F, "glCreateSamplers(%d, %p);\n", n, (const void *) samplers)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_937)(GLenum target, GLsizei n, GLuint * textures); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_938)(GLenum target, GLsizei n, GLuint * textures); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_937)(GLenum target, GLsizei n, GLuint * textures) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_938)(GLenum target, GLsizei n, GLuint * textures) { (void) target; (void) n; (void) textures; DISPATCH(CreateTextures, (target, n, textures), (F, "glCreateTextures(0x%x, %d, %p);\n", target, n, (const void *) textures)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_938)(GLsizei n, GLuint * ids); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_939)(GLsizei n, GLuint * ids); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_938)(GLsizei n, GLuint * ids) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_939)(GLsizei n, GLuint * ids) { (void) n; (void) ids; DISPATCH(CreateTransformFeedbacks, (n, ids), (F, "glCreateTransformFeedbacks(%d, %p);\n", n, (const void *) ids)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_939)(GLsizei n, GLuint * arrays); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_940)(GLsizei n, GLuint * arrays); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_939)(GLsizei n, GLuint * arrays) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_940)(GLsizei n, GLuint * arrays) { (void) n; (void) arrays; DISPATCH(CreateVertexArrays, (n, arrays), (F, "glCreateVertexArrays(%d, %p);\n", n, (const void *) arrays)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_940)(GLuint vaobj, GLuint index); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_941)(GLuint vaobj, GLuint index); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_940)(GLuint vaobj, GLuint index) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_941)(GLuint vaobj, GLuint index) { (void) vaobj; (void) index; DISPATCH(DisableVertexArrayAttrib, (vaobj, index), (F, "glDisableVertexArrayAttrib(%d, %d);\n", vaobj, index)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_941)(GLuint vaobj, GLuint index); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_942)(GLuint vaobj, GLuint index); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_941)(GLuint vaobj, GLuint index) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_942)(GLuint vaobj, GLuint index) { (void) vaobj; (void) index; DISPATCH(EnableVertexArrayAttrib, (vaobj, index), (F, "glEnableVertexArrayAttrib(%d, %d);\n", vaobj, index)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_942)(GLuint buffer, GLintptr offset, GLsizeiptr length); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_943)(GLuint buffer, GLintptr offset, GLsizeiptr length); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_942)(GLuint buffer, GLintptr offset, GLsizeiptr length) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_943)(GLuint buffer, GLintptr offset, GLsizeiptr length) { (void) buffer; (void) offset; (void) length; DISPATCH(FlushMappedNamedBufferRange, (buffer, offset, length), (F, "glFlushMappedNamedBufferRange(%d, %d, %d);\n", buffer, offset, length)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_943)(GLuint texture); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_944)(GLuint texture); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_943)(GLuint texture) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_944)(GLuint texture) { (void) texture; DISPATCH(GenerateTextureMipmap, (texture), (F, "glGenerateTextureMipmap(%d);\n", texture)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_944)(GLuint texture, GLint level, GLsizei bufSize, GLvoid * pixels); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_945)(GLuint texture, GLint level, GLsizei bufSize, GLvoid * pixels); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_944)(GLuint texture, GLint level, GLsizei bufSize, GLvoid * pixels) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_945)(GLuint texture, GLint level, GLsizei bufSize, GLvoid * pixels) { (void) texture; (void) level; (void) bufSize; (void) pixels; DISPATCH(GetCompressedTextureImage, (texture, level, bufSize, pixels), (F, "glGetCompressedTextureImage(%d, %d, %d, %p);\n", texture, level, bufSize, (const void *) pixels)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_945)(GLuint buffer, GLenum pname, GLint64 * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_946)(GLuint buffer, GLenum pname, GLint64 * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_945)(GLuint buffer, GLenum pname, GLint64 * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_946)(GLuint buffer, GLenum pname, GLint64 * params) { (void) buffer; (void) pname; (void) params; DISPATCH(GetNamedBufferParameteri64v, (buffer, pname, params), (F, "glGetNamedBufferParameteri64v(%d, 0x%x, %p);\n", buffer, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_946)(GLuint buffer, GLenum pname, GLint * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_947)(GLuint buffer, GLenum pname, GLint * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_946)(GLuint buffer, GLenum pname, GLint * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_947)(GLuint buffer, GLenum pname, GLint * params) { (void) buffer; (void) pname; (void) params; DISPATCH(GetNamedBufferParameteriv, (buffer, pname, params), (F, "glGetNamedBufferParameteriv(%d, 0x%x, %p);\n", buffer, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_947)(GLuint buffer, GLenum pname, GLvoid ** params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_948)(GLuint buffer, GLenum pname, GLvoid ** params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_947)(GLuint buffer, GLenum pname, GLvoid ** params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_948)(GLuint buffer, GLenum pname, GLvoid ** params) { (void) buffer; (void) pname; (void) params; DISPATCH(GetNamedBufferPointerv, (buffer, pname, params), (F, "glGetNamedBufferPointerv(%d, 0x%x, %p);\n", buffer, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_948)(GLuint buffer, GLintptr offset, GLsizeiptr size, GLvoid * data); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_949)(GLuint buffer, GLintptr offset, GLsizeiptr size, GLvoid * data); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_948)(GLuint buffer, GLintptr offset, GLsizeiptr size, GLvoid * data) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_949)(GLuint buffer, GLintptr offset, GLsizeiptr size, GLvoid * data) { (void) buffer; (void) offset; (void) size; (void) data; DISPATCH(GetNamedBufferSubData, (buffer, offset, size, data), (F, "glGetNamedBufferSubData(%d, %d, %d, %p);\n", buffer, offset, size, (const void *) data)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_949)(GLuint framebuffer, GLenum attachment, GLenum pname, GLint * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_950)(GLuint framebuffer, GLenum attachment, GLenum pname, GLint * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_949)(GLuint framebuffer, GLenum attachment, GLenum pname, GLint * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_950)(GLuint framebuffer, GLenum attachment, GLenum pname, GLint * params) { (void) framebuffer; (void) attachment; (void) pname; (void) params; DISPATCH(GetNamedFramebufferAttachmentParameteriv, (framebuffer, attachment, pname, params), (F, "glGetNamedFramebufferAttachmentParameteriv(%d, 0x%x, 0x%x, %p);\n", framebuffer, attachment, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_950)(GLuint framebuffer, GLenum pname, GLint * param); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_951)(GLuint framebuffer, GLenum pname, GLint * param); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_950)(GLuint framebuffer, GLenum pname, GLint * param) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_951)(GLuint framebuffer, GLenum pname, GLint * param) { (void) framebuffer; (void) pname; (void) param; DISPATCH(GetNamedFramebufferParameteriv, (framebuffer, pname, param), (F, "glGetNamedFramebufferParameteriv(%d, 0x%x, %p);\n", framebuffer, pname, (const void *) param)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_951)(GLuint renderbuffer, GLenum pname, GLint * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_952)(GLuint renderbuffer, GLenum pname, GLint * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_951)(GLuint renderbuffer, GLenum pname, GLint * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_952)(GLuint renderbuffer, GLenum pname, GLint * params) { (void) renderbuffer; (void) pname; (void) params; DISPATCH(GetNamedRenderbufferParameteriv, (renderbuffer, pname, params), (F, "glGetNamedRenderbufferParameteriv(%d, 0x%x, %p);\n", renderbuffer, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_952)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_953)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_952)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_953)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset) { (void) id; (void) buffer; (void) pname; (void) offset; DISPATCH(GetQueryBufferObjecti64v, (id, buffer, pname, offset), (F, "glGetQueryBufferObjecti64v(%d, %d, 0x%x, %d);\n", id, buffer, pname, offset)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_953)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_954)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_953)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_954)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset) { (void) id; (void) buffer; (void) pname; (void) offset; DISPATCH(GetQueryBufferObjectiv, (id, buffer, pname, offset), (F, "glGetQueryBufferObjectiv(%d, %d, 0x%x, %d);\n", id, buffer, pname, offset)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_954)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_955)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_954)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_955)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset) { (void) id; (void) buffer; (void) pname; (void) offset; DISPATCH(GetQueryBufferObjectui64v, (id, buffer, pname, offset), (F, "glGetQueryBufferObjectui64v(%d, %d, 0x%x, %d);\n", id, buffer, pname, offset)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_955)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_956)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_955)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_956)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset) { (void) id; (void) buffer; (void) pname; (void) offset; DISPATCH(GetQueryBufferObjectuiv, (id, buffer, pname, offset), (F, "glGetQueryBufferObjectuiv(%d, %d, 0x%x, %d);\n", id, buffer, pname, offset)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_956)(GLuint texture, GLint level, GLenum format, GLenum type, GLsizei bufSize, GLvoid * pixels); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_957)(GLuint texture, GLint level, GLenum format, GLenum type, GLsizei bufSize, GLvoid * pixels); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_956)(GLuint texture, GLint level, GLenum format, GLenum type, GLsizei bufSize, GLvoid * pixels) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_957)(GLuint texture, GLint level, GLenum format, GLenum type, GLsizei bufSize, GLvoid * pixels) { (void) texture; (void) level; (void) format; (void) type; (void) bufSize; (void) pixels; DISPATCH(GetTextureImage, (texture, level, format, type, bufSize, pixels), (F, "glGetTextureImage(%d, %d, 0x%x, 0x%x, %d, %p);\n", texture, level, format, type, bufSize, (const void *) pixels)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_957)(GLuint texture, GLint level, GLenum pname, GLfloat * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_958)(GLuint texture, GLint level, GLenum pname, GLfloat * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_957)(GLuint texture, GLint level, GLenum pname, GLfloat * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_958)(GLuint texture, GLint level, GLenum pname, GLfloat * params) { (void) texture; (void) level; (void) pname; (void) params; DISPATCH(GetTextureLevelParameterfv, (texture, level, pname, params), (F, "glGetTextureLevelParameterfv(%d, %d, 0x%x, %p);\n", texture, level, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_958)(GLuint texture, GLint level, GLenum pname, GLint * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_959)(GLuint texture, GLint level, GLenum pname, GLint * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_958)(GLuint texture, GLint level, GLenum pname, GLint * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_959)(GLuint texture, GLint level, GLenum pname, GLint * params) { (void) texture; (void) level; (void) pname; (void) params; DISPATCH(GetTextureLevelParameteriv, (texture, level, pname, params), (F, "glGetTextureLevelParameteriv(%d, %d, 0x%x, %p);\n", texture, level, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_959)(GLuint texture, GLenum pname, GLint * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_960)(GLuint texture, GLenum pname, GLint * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_959)(GLuint texture, GLenum pname, GLint * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_960)(GLuint texture, GLenum pname, GLint * params) { (void) texture; (void) pname; (void) params; DISPATCH(GetTextureParameterIiv, (texture, pname, params), (F, "glGetTextureParameterIiv(%d, 0x%x, %p);\n", texture, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_960)(GLuint texture, GLenum pname, GLuint * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_961)(GLuint texture, GLenum pname, GLuint * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_960)(GLuint texture, GLenum pname, GLuint * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_961)(GLuint texture, GLenum pname, GLuint * params) { (void) texture; (void) pname; (void) params; DISPATCH(GetTextureParameterIuiv, (texture, pname, params), (F, "glGetTextureParameterIuiv(%d, 0x%x, %p);\n", texture, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_961)(GLuint texture, GLenum pname, GLfloat * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_962)(GLuint texture, GLenum pname, GLfloat * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_961)(GLuint texture, GLenum pname, GLfloat * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_962)(GLuint texture, GLenum pname, GLfloat * params) { (void) texture; (void) pname; (void) params; DISPATCH(GetTextureParameterfv, (texture, pname, params), (F, "glGetTextureParameterfv(%d, 0x%x, %p);\n", texture, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_962)(GLuint texture, GLenum pname, GLint * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_963)(GLuint texture, GLenum pname, GLint * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_962)(GLuint texture, GLenum pname, GLint * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_963)(GLuint texture, GLenum pname, GLint * params) { (void) texture; (void) pname; (void) params; DISPATCH(GetTextureParameteriv, (texture, pname, params), (F, "glGetTextureParameteriv(%d, 0x%x, %p);\n", texture, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_963)(GLuint xfb, GLenum pname, GLuint index, GLint64 * param); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_964)(GLuint xfb, GLenum pname, GLuint index, GLint64 * param); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_963)(GLuint xfb, GLenum pname, GLuint index, GLint64 * param) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_964)(GLuint xfb, GLenum pname, GLuint index, GLint64 * param) { (void) xfb; (void) pname; (void) index; (void) param; DISPATCH(GetTransformFeedbacki64_v, (xfb, pname, index, param), (F, "glGetTransformFeedbacki64_v(%d, 0x%x, %d, %p);\n", xfb, pname, index, (const void *) param)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_964)(GLuint xfb, GLenum pname, GLuint index, GLint * param); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_965)(GLuint xfb, GLenum pname, GLuint index, GLint * param); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_964)(GLuint xfb, GLenum pname, GLuint index, GLint * param) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_965)(GLuint xfb, GLenum pname, GLuint index, GLint * param) { (void) xfb; (void) pname; (void) index; (void) param; DISPATCH(GetTransformFeedbacki_v, (xfb, pname, index, param), (F, "glGetTransformFeedbacki_v(%d, 0x%x, %d, %p);\n", xfb, pname, index, (const void *) param)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_965)(GLuint xfb, GLenum pname, GLint * param); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_966)(GLuint xfb, GLenum pname, GLint * param); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_965)(GLuint xfb, GLenum pname, GLint * param) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_966)(GLuint xfb, GLenum pname, GLint * param) { (void) xfb; (void) pname; (void) param; DISPATCH(GetTransformFeedbackiv, (xfb, pname, param), (F, "glGetTransformFeedbackiv(%d, 0x%x, %p);\n", xfb, pname, (const void *) param)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_966)(GLuint vaobj, GLuint index, GLenum pname, GLint64 * param); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_967)(GLuint vaobj, GLuint index, GLenum pname, GLint64 * param); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_966)(GLuint vaobj, GLuint index, GLenum pname, GLint64 * param) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_967)(GLuint vaobj, GLuint index, GLenum pname, GLint64 * param) { (void) vaobj; (void) index; (void) pname; (void) param; DISPATCH(GetVertexArrayIndexed64iv, (vaobj, index, pname, param), (F, "glGetVertexArrayIndexed64iv(%d, %d, 0x%x, %p);\n", vaobj, index, pname, (const void *) param)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_967)(GLuint vaobj, GLuint index, GLenum pname, GLint * param); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_968)(GLuint vaobj, GLuint index, GLenum pname, GLint * param); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_967)(GLuint vaobj, GLuint index, GLenum pname, GLint * param) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_968)(GLuint vaobj, GLuint index, GLenum pname, GLint * param) { (void) vaobj; (void) index; (void) pname; (void) param; DISPATCH(GetVertexArrayIndexediv, (vaobj, index, pname, param), (F, "glGetVertexArrayIndexediv(%d, %d, 0x%x, %p);\n", vaobj, index, pname, (const void *) param)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_968)(GLuint vaobj, GLenum pname, GLint * param); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_969)(GLuint vaobj, GLenum pname, GLint * param); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_968)(GLuint vaobj, GLenum pname, GLint * param) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_969)(GLuint vaobj, GLenum pname, GLint * param) { (void) vaobj; (void) pname; (void) param; DISPATCH(GetVertexArrayiv, (vaobj, pname, param), (F, "glGetVertexArrayiv(%d, 0x%x, %p);\n", vaobj, pname, (const void *) param)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_969)(GLuint framebuffer, GLsizei numAttachments, const GLenum * attachments); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_970)(GLuint framebuffer, GLsizei numAttachments, const GLenum * attachments); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_969)(GLuint framebuffer, GLsizei numAttachments, const GLenum * attachments) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_970)(GLuint framebuffer, GLsizei numAttachments, const GLenum * attachments) { (void) framebuffer; (void) numAttachments; (void) attachments; DISPATCH(InvalidateNamedFramebufferData, (framebuffer, numAttachments, attachments), (F, "glInvalidateNamedFramebufferData(%d, %d, %p);\n", framebuffer, numAttachments, (const void *) attachments)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_970)(GLuint framebuffer, GLsizei numAttachments, const GLenum * attachments, GLint x, GLint y, GLsizei width, GLsizei height); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_971)(GLuint framebuffer, GLsizei numAttachments, const GLenum * attachments, GLint x, GLint y, GLsizei width, GLsizei height); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_970)(GLuint framebuffer, GLsizei numAttachments, const GLenum * attachments, GLint x, GLint y, GLsizei width, GLsizei height) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_971)(GLuint framebuffer, GLsizei numAttachments, const GLenum * attachments, GLint x, GLint y, GLsizei width, GLsizei height) { (void) framebuffer; (void) numAttachments; (void) attachments; (void) x; (void) y; (void) width; (void) height; DISPATCH(InvalidateNamedFramebufferSubData, (framebuffer, numAttachments, attachments, x, y, width, height), (F, "glInvalidateNamedFramebufferSubData(%d, %d, %p, %d, %d, %d, %d);\n", framebuffer, numAttachments, (const void *) attachments, x, y, width, height)); } -KEYWORD1_ALT GLvoid * KEYWORD2 NAME(_dispatch_stub_971)(GLuint buffer, GLenum access); +KEYWORD1_ALT GLvoid * KEYWORD2 NAME(_dispatch_stub_972)(GLuint buffer, GLenum access); -KEYWORD1_ALT GLvoid * KEYWORD2 NAME(_dispatch_stub_971)(GLuint buffer, GLenum access) +KEYWORD1_ALT GLvoid * KEYWORD2 NAME(_dispatch_stub_972)(GLuint buffer, GLenum access) { (void) buffer; (void) access; RETURN_DISPATCH(MapNamedBuffer, (buffer, access), (F, "glMapNamedBuffer(%d, 0x%x);\n", buffer, access)); } -KEYWORD1_ALT GLvoid * KEYWORD2 NAME(_dispatch_stub_972)(GLuint buffer, GLintptr offset, GLsizeiptr length, GLbitfield access); +KEYWORD1_ALT GLvoid * KEYWORD2 NAME(_dispatch_stub_973)(GLuint buffer, GLintptr offset, GLsizeiptr length, GLbitfield access); -KEYWORD1_ALT GLvoid * KEYWORD2 NAME(_dispatch_stub_972)(GLuint buffer, GLintptr offset, GLsizeiptr length, GLbitfield access) +KEYWORD1_ALT GLvoid * KEYWORD2 NAME(_dispatch_stub_973)(GLuint buffer, GLintptr offset, GLsizeiptr length, GLbitfield access) { (void) buffer; (void) offset; (void) length; (void) access; RETURN_DISPATCH(MapNamedBufferRange, (buffer, offset, length, access), (F, "glMapNamedBufferRange(%d, %d, %d, %d);\n", buffer, offset, length, access)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_973)(GLuint buffer, GLsizeiptr size, const GLvoid * data, GLenum usage); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_974)(GLuint buffer, GLsizeiptr size, const GLvoid * data, GLenum usage); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_973)(GLuint buffer, GLsizeiptr size, const GLvoid * data, GLenum usage) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_974)(GLuint buffer, GLsizeiptr size, const GLvoid * data, GLenum usage) { (void) buffer; (void) size; (void) data; (void) usage; DISPATCH(NamedBufferData, (buffer, size, data, usage), (F, "glNamedBufferData(%d, %d, %p, 0x%x);\n", buffer, size, (const void *) data, usage)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_974)(GLuint buffer, GLsizeiptr size, const GLvoid * data, GLbitfield flags); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_975)(GLuint buffer, GLsizeiptr size, const GLvoid * data, GLbitfield flags); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_974)(GLuint buffer, GLsizeiptr size, const GLvoid * data, GLbitfield flags) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_975)(GLuint buffer, GLsizeiptr size, const GLvoid * data, GLbitfield flags) { (void) buffer; (void) size; (void) data; (void) flags; DISPATCH(NamedBufferStorage, (buffer, size, data, flags), (F, "glNamedBufferStorage(%d, %d, %p, %d);\n", buffer, size, (const void *) data, flags)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_975)(GLuint buffer, GLintptr offset, GLsizeiptr size, const GLvoid * data); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_976)(GLuint buffer, GLintptr offset, GLsizeiptr size, const GLvoid * data); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_975)(GLuint buffer, GLintptr offset, GLsizeiptr size, const GLvoid * data) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_976)(GLuint buffer, GLintptr offset, GLsizeiptr size, const GLvoid * data) { (void) buffer; (void) offset; (void) size; (void) data; DISPATCH(NamedBufferSubData, (buffer, offset, size, data), (F, "glNamedBufferSubData(%d, %d, %d, %p);\n", buffer, offset, size, (const void *) data)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_976)(GLuint framebuffer, GLenum buf); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_977)(GLuint framebuffer, GLenum buf); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_976)(GLuint framebuffer, GLenum buf) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_977)(GLuint framebuffer, GLenum buf) { (void) framebuffer; (void) buf; DISPATCH(NamedFramebufferDrawBuffer, (framebuffer, buf), (F, "glNamedFramebufferDrawBuffer(%d, 0x%x);\n", framebuffer, buf)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_977)(GLuint framebuffer, GLsizei n, const GLenum * bufs); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_978)(GLuint framebuffer, GLsizei n, const GLenum * bufs); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_977)(GLuint framebuffer, GLsizei n, const GLenum * bufs) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_978)(GLuint framebuffer, GLsizei n, const GLenum * bufs) { (void) framebuffer; (void) n; (void) bufs; DISPATCH(NamedFramebufferDrawBuffers, (framebuffer, n, bufs), (F, "glNamedFramebufferDrawBuffers(%d, %d, %p);\n", framebuffer, n, (const void *) bufs)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_978)(GLuint framebuffer, GLenum pname, GLint param); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_979)(GLuint framebuffer, GLenum pname, GLint param); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_978)(GLuint framebuffer, GLenum pname, GLint param) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_979)(GLuint framebuffer, GLenum pname, GLint param) { (void) framebuffer; (void) pname; (void) param; DISPATCH(NamedFramebufferParameteri, (framebuffer, pname, param), (F, "glNamedFramebufferParameteri(%d, 0x%x, %d);\n", framebuffer, pname, param)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_979)(GLuint framebuffer, GLenum buf); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_980)(GLuint framebuffer, GLenum buf); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_979)(GLuint framebuffer, GLenum buf) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_980)(GLuint framebuffer, GLenum buf) { (void) framebuffer; (void) buf; DISPATCH(NamedFramebufferReadBuffer, (framebuffer, buf), (F, "glNamedFramebufferReadBuffer(%d, 0x%x);\n", framebuffer, buf)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_980)(GLuint framebuffer, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_981)(GLuint framebuffer, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_980)(GLuint framebuffer, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_981)(GLuint framebuffer, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer) { (void) framebuffer; (void) attachment; (void) renderbuffertarget; (void) renderbuffer; DISPATCH(NamedFramebufferRenderbuffer, (framebuffer, attachment, renderbuffertarget, renderbuffer), (F, "glNamedFramebufferRenderbuffer(%d, 0x%x, 0x%x, %d);\n", framebuffer, attachment, renderbuffertarget, renderbuffer)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_981)(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_982)(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_981)(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_982)(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level) { (void) framebuffer; (void) attachment; (void) texture; (void) level; DISPATCH(NamedFramebufferTexture, (framebuffer, attachment, texture, level), (F, "glNamedFramebufferTexture(%d, 0x%x, %d, %d);\n", framebuffer, attachment, texture, level)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_982)(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level, GLint layer); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_983)(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level, GLint layer); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_982)(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level, GLint layer) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_983)(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level, GLint layer) { (void) framebuffer; (void) attachment; (void) texture; (void) level; (void) layer; DISPATCH(NamedFramebufferTextureLayer, (framebuffer, attachment, texture, level, layer), (F, "glNamedFramebufferTextureLayer(%d, 0x%x, %d, %d, %d);\n", framebuffer, attachment, texture, level, layer)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_983)(GLuint renderbuffer, GLenum internalformat, GLsizei width, GLsizei height); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_984)(GLuint renderbuffer, GLenum internalformat, GLsizei width, GLsizei height); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_983)(GLuint renderbuffer, GLenum internalformat, GLsizei width, GLsizei height) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_984)(GLuint renderbuffer, GLenum internalformat, GLsizei width, GLsizei height) { (void) renderbuffer; (void) internalformat; (void) width; (void) height; DISPATCH(NamedRenderbufferStorage, (renderbuffer, internalformat, width, height), (F, "glNamedRenderbufferStorage(%d, 0x%x, %d, %d);\n", renderbuffer, internalformat, width, height)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_984)(GLuint renderbuffer, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_985)(GLuint renderbuffer, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_984)(GLuint renderbuffer, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_985)(GLuint renderbuffer, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height) { (void) renderbuffer; (void) samples; (void) internalformat; (void) width; (void) height; DISPATCH(NamedRenderbufferStorageMultisample, (renderbuffer, samples, internalformat, width, height), (F, "glNamedRenderbufferStorageMultisample(%d, %d, 0x%x, %d, %d);\n", renderbuffer, samples, internalformat, width, height)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_985)(GLuint texture, GLenum internalformat, GLuint buffer); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_986)(GLuint texture, GLenum internalformat, GLuint buffer); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_985)(GLuint texture, GLenum internalformat, GLuint buffer) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_986)(GLuint texture, GLenum internalformat, GLuint buffer) { (void) texture; (void) internalformat; (void) buffer; DISPATCH(TextureBuffer, (texture, internalformat, buffer), (F, "glTextureBuffer(%d, 0x%x, %d);\n", texture, internalformat, buffer)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_986)(GLuint texture, GLenum internalformat, GLuint buffer, GLintptr offset, GLsizeiptr size); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_987)(GLuint texture, GLenum internalformat, GLuint buffer, GLintptr offset, GLsizeiptr size); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_986)(GLuint texture, GLenum internalformat, GLuint buffer, GLintptr offset, GLsizeiptr size) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_987)(GLuint texture, GLenum internalformat, GLuint buffer, GLintptr offset, GLsizeiptr size) { (void) texture; (void) internalformat; (void) buffer; (void) offset; (void) size; DISPATCH(TextureBufferRange, (texture, internalformat, buffer, offset, size), (F, "glTextureBufferRange(%d, 0x%x, %d, %d, %d);\n", texture, internalformat, buffer, offset, size)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_987)(GLuint texture, GLenum pname, const GLint * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_988)(GLuint texture, GLenum pname, const GLint * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_987)(GLuint texture, GLenum pname, const GLint * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_988)(GLuint texture, GLenum pname, const GLint * params) { (void) texture; (void) pname; (void) params; DISPATCH(TextureParameterIiv, (texture, pname, params), (F, "glTextureParameterIiv(%d, 0x%x, %p);\n", texture, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_988)(GLuint texture, GLenum pname, const GLuint * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_989)(GLuint texture, GLenum pname, const GLuint * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_988)(GLuint texture, GLenum pname, const GLuint * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_989)(GLuint texture, GLenum pname, const GLuint * params) { (void) texture; (void) pname; (void) params; DISPATCH(TextureParameterIuiv, (texture, pname, params), (F, "glTextureParameterIuiv(%d, 0x%x, %p);\n", texture, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_989)(GLuint texture, GLenum pname, GLfloat param); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_990)(GLuint texture, GLenum pname, GLfloat param); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_989)(GLuint texture, GLenum pname, GLfloat param) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_990)(GLuint texture, GLenum pname, GLfloat param) { (void) texture; (void) pname; (void) param; DISPATCH(TextureParameterf, (texture, pname, param), (F, "glTextureParameterf(%d, 0x%x, %f);\n", texture, pname, param)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_990)(GLuint texture, GLenum pname, const GLfloat * param); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_991)(GLuint texture, GLenum pname, const GLfloat * param); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_990)(GLuint texture, GLenum pname, const GLfloat * param) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_991)(GLuint texture, GLenum pname, const GLfloat * param) { (void) texture; (void) pname; (void) param; DISPATCH(TextureParameterfv, (texture, pname, param), (F, "glTextureParameterfv(%d, 0x%x, %p);\n", texture, pname, (const void *) param)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_991)(GLuint texture, GLenum pname, GLint param); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_992)(GLuint texture, GLenum pname, GLint param); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_991)(GLuint texture, GLenum pname, GLint param) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_992)(GLuint texture, GLenum pname, GLint param) { (void) texture; (void) pname; (void) param; DISPATCH(TextureParameteri, (texture, pname, param), (F, "glTextureParameteri(%d, 0x%x, %d);\n", texture, pname, param)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_992)(GLuint texture, GLenum pname, const GLint * param); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_993)(GLuint texture, GLenum pname, const GLint * param); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_992)(GLuint texture, GLenum pname, const GLint * param) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_993)(GLuint texture, GLenum pname, const GLint * param) { (void) texture; (void) pname; (void) param; DISPATCH(TextureParameteriv, (texture, pname, param), (F, "glTextureParameteriv(%d, 0x%x, %p);\n", texture, pname, (const void *) param)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_993)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_994)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_993)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_994)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width) { (void) texture; (void) levels; (void) internalformat; (void) width; DISPATCH(TextureStorage1D, (texture, levels, internalformat, width), (F, "glTextureStorage1D(%d, %d, 0x%x, %d);\n", texture, levels, internalformat, width)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_994)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_995)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_994)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_995)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height) { (void) texture; (void) levels; (void) internalformat; (void) width; (void) height; DISPATCH(TextureStorage2D, (texture, levels, internalformat, width, height), (F, "glTextureStorage2D(%d, %d, 0x%x, %d, %d);\n", texture, levels, internalformat, width, height)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_995)(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_996)(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_995)(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_996)(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations) { (void) texture; (void) samples; (void) internalformat; (void) width; (void) height; (void) fixedsamplelocations; DISPATCH(TextureStorage2DMultisample, (texture, samples, internalformat, width, height, fixedsamplelocations), (F, "glTextureStorage2DMultisample(%d, %d, 0x%x, %d, %d, %d);\n", texture, samples, internalformat, width, height, fixedsamplelocations)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_996)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_997)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_996)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_997)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth) { (void) texture; (void) levels; (void) internalformat; (void) width; (void) height; (void) depth; DISPATCH(TextureStorage3D, (texture, levels, internalformat, width, height, depth), (F, "glTextureStorage3D(%d, %d, 0x%x, %d, %d, %d);\n", texture, levels, internalformat, width, height, depth)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_997)(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedsamplelocations); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_998)(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedsamplelocations); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_997)(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedsamplelocations) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_998)(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedsamplelocations) { (void) texture; (void) samples; (void) internalformat; (void) width; (void) height; (void) depth; (void) fixedsamplelocations; DISPATCH(TextureStorage3DMultisample, (texture, samples, internalformat, width, height, depth, fixedsamplelocations), (F, "glTextureStorage3DMultisample(%d, %d, 0x%x, %d, %d, %d, %d);\n", texture, samples, internalformat, width, height, depth, fixedsamplelocations)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_998)(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLenum type, const GLvoid * pixels); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_999)(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLenum type, const GLvoid * pixels); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_998)(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLenum type, const GLvoid * pixels) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_999)(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLenum type, const GLvoid * pixels) { (void) texture; (void) level; (void) xoffset; (void) width; (void) format; (void) type; (void) pixels; DISPATCH(TextureSubImage1D, (texture, level, xoffset, width, format, type, pixels), (F, "glTextureSubImage1D(%d, %d, %d, %d, 0x%x, 0x%x, %p);\n", texture, level, xoffset, width, format, type, (const void *) pixels)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_999)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid * pixels); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1000)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid * pixels); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_999)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid * pixels) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1000)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid * pixels) { (void) texture; (void) level; (void) xoffset; (void) yoffset; (void) width; (void) height; (void) format; (void) type; (void) pixels; DISPATCH(TextureSubImage2D, (texture, level, xoffset, yoffset, width, height, format, type, pixels), (F, "glTextureSubImage2D(%d, %d, %d, %d, %d, %d, 0x%x, 0x%x, %p);\n", texture, level, xoffset, yoffset, width, height, format, type, (const void *) pixels)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1000)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid * pixels); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1001)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid * pixels); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1000)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid * pixels) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1001)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid * pixels) { (void) texture; (void) level; (void) xoffset; (void) yoffset; (void) zoffset; (void) width; (void) height; (void) depth; (void) format; (void) type; (void) pixels; DISPATCH(TextureSubImage3D, (texture, level, xoffset, yoffset, zoffset, width, height, depth, format, type, pixels), (F, "glTextureSubImage3D(%d, %d, %d, %d, %d, %d, %d, %d, 0x%x, 0x%x, %p);\n", texture, level, xoffset, yoffset, zoffset, width, height, depth, format, type, (const void *) pixels)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1001)(GLuint xfb, GLuint index, GLuint buffer); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1002)(GLuint xfb, GLuint index, GLuint buffer); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1001)(GLuint xfb, GLuint index, GLuint buffer) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1002)(GLuint xfb, GLuint index, GLuint buffer) { (void) xfb; (void) index; (void) buffer; DISPATCH(TransformFeedbackBufferBase, (xfb, index, buffer), (F, "glTransformFeedbackBufferBase(%d, %d, %d);\n", xfb, index, buffer)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1002)(GLuint xfb, GLuint index, GLuint buffer, GLintptr offset, GLsizeiptr size); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1003)(GLuint xfb, GLuint index, GLuint buffer, GLintptr offset, GLsizeiptr size); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1002)(GLuint xfb, GLuint index, GLuint buffer, GLintptr offset, GLsizeiptr size) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1003)(GLuint xfb, GLuint index, GLuint buffer, GLintptr offset, GLsizeiptr size) { (void) xfb; (void) index; (void) buffer; (void) offset; (void) size; DISPATCH(TransformFeedbackBufferRange, (xfb, index, buffer, offset, size), (F, "glTransformFeedbackBufferRange(%d, %d, %d, %d, %d);\n", xfb, index, buffer, offset, size)); } -KEYWORD1_ALT GLboolean KEYWORD2 NAME(_dispatch_stub_1003)(GLuint buffer); +KEYWORD1_ALT GLboolean KEYWORD2 NAME(_dispatch_stub_1004)(GLuint buffer); -KEYWORD1_ALT GLboolean KEYWORD2 NAME(_dispatch_stub_1003)(GLuint buffer) +KEYWORD1_ALT GLboolean KEYWORD2 NAME(_dispatch_stub_1004)(GLuint buffer) { (void) buffer; RETURN_DISPATCH(UnmapNamedBuffer, (buffer), (F, "glUnmapNamedBuffer(%d);\n", buffer)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1004)(GLuint vaobj, GLuint attribindex, GLuint bindingindex); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1005)(GLuint vaobj, GLuint attribindex, GLuint bindingindex); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1004)(GLuint vaobj, GLuint attribindex, GLuint bindingindex) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1005)(GLuint vaobj, GLuint attribindex, GLuint bindingindex) { (void) vaobj; (void) attribindex; (void) bindingindex; DISPATCH(VertexArrayAttribBinding, (vaobj, attribindex, bindingindex), (F, "glVertexArrayAttribBinding(%d, %d, %d);\n", vaobj, attribindex, bindingindex)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1005)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLboolean normalized, GLuint relativeoffset); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1006)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLboolean normalized, GLuint relativeoffset); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1005)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLboolean normalized, GLuint relativeoffset) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1006)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLboolean normalized, GLuint relativeoffset) { (void) vaobj; (void) attribindex; (void) size; (void) type; (void) normalized; (void) relativeoffset; DISPATCH(VertexArrayAttribFormat, (vaobj, attribindex, size, type, normalized, relativeoffset), (F, "glVertexArrayAttribFormat(%d, %d, %d, 0x%x, %d, %d);\n", vaobj, attribindex, size, type, normalized, relativeoffset)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1006)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1007)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1006)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1007)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset) { (void) vaobj; (void) attribindex; (void) size; (void) type; (void) relativeoffset; DISPATCH(VertexArrayAttribIFormat, (vaobj, attribindex, size, type, relativeoffset), (F, "glVertexArrayAttribIFormat(%d, %d, %d, 0x%x, %d);\n", vaobj, attribindex, size, type, relativeoffset)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1007)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1008)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1007)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1008)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset) { (void) vaobj; (void) attribindex; (void) size; (void) type; (void) relativeoffset; DISPATCH(VertexArrayAttribLFormat, (vaobj, attribindex, size, type, relativeoffset), (F, "glVertexArrayAttribLFormat(%d, %d, %d, 0x%x, %d);\n", vaobj, attribindex, size, type, relativeoffset)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1008)(GLuint vaobj, GLuint bindingindex, GLuint divisor); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1009)(GLuint vaobj, GLuint bindingindex, GLuint divisor); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1008)(GLuint vaobj, GLuint bindingindex, GLuint divisor) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1009)(GLuint vaobj, GLuint bindingindex, GLuint divisor) { (void) vaobj; (void) bindingindex; (void) divisor; DISPATCH(VertexArrayBindingDivisor, (vaobj, bindingindex, divisor), (F, "glVertexArrayBindingDivisor(%d, %d, %d);\n", vaobj, bindingindex, divisor)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1009)(GLuint vaobj, GLuint buffer); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1010)(GLuint vaobj, GLuint buffer); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1009)(GLuint vaobj, GLuint buffer) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1010)(GLuint vaobj, GLuint buffer) { (void) vaobj; (void) buffer; DISPATCH(VertexArrayElementBuffer, (vaobj, buffer), (F, "glVertexArrayElementBuffer(%d, %d);\n", vaobj, buffer)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1010)(GLuint vaobj, GLuint bindingindex, GLuint buffer, GLintptr offset, GLsizei stride); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1011)(GLuint vaobj, GLuint bindingindex, GLuint buffer, GLintptr offset, GLsizei stride); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1010)(GLuint vaobj, GLuint bindingindex, GLuint buffer, GLintptr offset, GLsizei stride) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1011)(GLuint vaobj, GLuint bindingindex, GLuint buffer, GLintptr offset, GLsizei stride) { (void) vaobj; (void) bindingindex; (void) buffer; (void) offset; (void) stride; DISPATCH(VertexArrayVertexBuffer, (vaobj, bindingindex, buffer, offset, stride), (F, "glVertexArrayVertexBuffer(%d, %d, %d, %d, %d);\n", vaobj, bindingindex, buffer, offset, stride)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1011)(GLuint vaobj, GLuint first, GLsizei count, const GLuint * buffers, const GLintptr * offsets, const GLsizei * strides); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1012)(GLuint vaobj, GLuint first, GLsizei count, const GLuint * buffers, const GLintptr * offsets, const GLsizei * strides); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1011)(GLuint vaobj, GLuint first, GLsizei count, const GLuint * buffers, const GLintptr * offsets, const GLsizei * strides) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1012)(GLuint vaobj, GLuint first, GLsizei count, const GLuint * buffers, const GLintptr * offsets, const GLsizei * strides) { (void) vaobj; (void) first; (void) count; (void) buffers; (void) offsets; (void) strides; DISPATCH(VertexArrayVertexBuffers, (vaobj, first, count, buffers, offsets, strides), (F, "glVertexArrayVertexBuffers(%d, %d, %d, %p, %p, %p);\n", vaobj, first, count, (const void *) buffers, (const void *) offsets, (const void *) strides)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1012)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLsizei bufSize, GLvoid * pixels); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1013)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLsizei bufSize, GLvoid * pixels); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1012)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLsizei bufSize, GLvoid * pixels) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1013)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLsizei bufSize, GLvoid * pixels) { (void) texture; (void) level; (void) xoffset; (void) yoffset; (void) zoffset; (void) width; (void) height; (void) depth; (void) bufSize; (void) pixels; DISPATCH(GetCompressedTextureSubImage, (texture, level, xoffset, yoffset, zoffset, width, height, depth, bufSize, pixels), (F, "glGetCompressedTextureSubImage(%d, %d, %d, %d, %d, %d, %d, %d, %d, %p);\n", texture, level, xoffset, yoffset, zoffset, width, height, depth, bufSize, (const void *) pixels)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1013)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, GLsizei bufSize, GLvoid * pixels); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1014)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, GLsizei bufSize, GLvoid * pixels); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1013)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, GLsizei bufSize, GLvoid * pixels) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1014)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, GLsizei bufSize, GLvoid * pixels) { (void) texture; (void) level; (void) xoffset; (void) yoffset; (void) zoffset; (void) width; (void) height; (void) depth; (void) format; (void) type; (void) bufSize; (void) pixels; DISPATCH(GetTextureSubImage, (texture, level, xoffset, yoffset, zoffset, width, height, depth, format, type, bufSize, pixels), (F, "glGetTextureSubImage(%d, %d, %d, %d, %d, %d, %d, %d, 0x%x, 0x%x, %d, %p);\n", texture, level, xoffset, yoffset, zoffset, width, height, depth, format, type, bufSize, (const void *) pixels)); @@ -9153,73 +9276,73 @@ DISPATCH(InvalidateTexSubImage, (texture, level, xoffset, yoffset, zoffset, width, height, depth), (F, "glInvalidateTexSubImage(%d, %d, %d, %d, %d, %d, %d, %d);\n", texture, level, xoffset, yoffset, zoffset, width, height, depth)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1020)(GLfloat factor, GLfloat bias); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1021)(GLfloat factor, GLfloat bias); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1020)(GLfloat factor, GLfloat bias) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1021)(GLfloat factor, GLfloat bias) { (void) factor; (void) bias; DISPATCH(PolygonOffsetEXT, (factor, bias), (F, "glPolygonOffsetEXT(%f, %f);\n", factor, bias)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1021)(GLfloat x, GLfloat y, GLfloat z, GLfloat width, GLfloat height); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1022)(GLfloat x, GLfloat y, GLfloat z, GLfloat width, GLfloat height); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1021)(GLfloat x, GLfloat y, GLfloat z, GLfloat width, GLfloat height) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1022)(GLfloat x, GLfloat y, GLfloat z, GLfloat width, GLfloat height) { (void) x; (void) y; (void) z; (void) width; (void) height; DISPATCH(DrawTexfOES, (x, y, z, width, height), (F, "glDrawTexfOES(%f, %f, %f, %f, %f);\n", x, y, z, width, height)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1022)(const GLfloat * coords); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1023)(const GLfloat * coords); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1022)(const GLfloat * coords) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1023)(const GLfloat * coords) { (void) coords; DISPATCH(DrawTexfvOES, (coords), (F, "glDrawTexfvOES(%p);\n", (const void *) coords)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1023)(GLint x, GLint y, GLint z, GLint width, GLint height); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1024)(GLint x, GLint y, GLint z, GLint width, GLint height); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1023)(GLint x, GLint y, GLint z, GLint width, GLint height) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1024)(GLint x, GLint y, GLint z, GLint width, GLint height) { (void) x; (void) y; (void) z; (void) width; (void) height; DISPATCH(DrawTexiOES, (x, y, z, width, height), (F, "glDrawTexiOES(%d, %d, %d, %d, %d);\n", x, y, z, width, height)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1024)(const GLint * coords); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1025)(const GLint * coords); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1024)(const GLint * coords) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1025)(const GLint * coords) { (void) coords; DISPATCH(DrawTexivOES, (coords), (F, "glDrawTexivOES(%p);\n", (const void *) coords)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1025)(GLshort x, GLshort y, GLshort z, GLshort width, GLshort height); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1026)(GLshort x, GLshort y, GLshort z, GLshort width, GLshort height); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1025)(GLshort x, GLshort y, GLshort z, GLshort width, GLshort height) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1026)(GLshort x, GLshort y, GLshort z, GLshort width, GLshort height) { (void) x; (void) y; (void) z; (void) width; (void) height; DISPATCH(DrawTexsOES, (x, y, z, width, height), (F, "glDrawTexsOES(%d, %d, %d, %d, %d);\n", x, y, z, width, height)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1026)(const GLshort * coords); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1027)(const GLshort * coords); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1026)(const GLshort * coords) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1027)(const GLshort * coords) { (void) coords; DISPATCH(DrawTexsvOES, (coords), (F, "glDrawTexsvOES(%p);\n", (const void *) coords)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1027)(GLfixed x, GLfixed y, GLfixed z, GLfixed width, GLfixed height); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1028)(GLfixed x, GLfixed y, GLfixed z, GLfixed width, GLfixed height); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1027)(GLfixed x, GLfixed y, GLfixed z, GLfixed width, GLfixed height) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1028)(GLfixed x, GLfixed y, GLfixed z, GLfixed width, GLfixed height) { (void) x; (void) y; (void) z; (void) width; (void) height; DISPATCH(DrawTexxOES, (x, y, z, width, height), (F, "glDrawTexxOES(%d, %d, %d, %d, %d);\n", x, y, z, width, height)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1028)(const GLfixed * coords); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1029)(const GLfixed * coords); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1028)(const GLfixed * coords) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1029)(const GLfixed * coords) { (void) coords; DISPATCH(DrawTexxvOES, (coords), (F, "glDrawTexxvOES(%p);\n", (const void *) coords)); @@ -9231,25 +9354,25 @@ DISPATCH(PointSizePointerOES, (type, stride, pointer), (F, "glPointSizePointerOES(0x%x, %d, %p);\n", type, stride, (const void *) pointer)); } -KEYWORD1_ALT GLbitfield KEYWORD2 NAME(_dispatch_stub_1030)(GLfixed * mantissa, GLint * exponent); +KEYWORD1_ALT GLbitfield KEYWORD2 NAME(_dispatch_stub_1031)(GLfixed * mantissa, GLint * exponent); -KEYWORD1_ALT GLbitfield KEYWORD2 NAME(_dispatch_stub_1030)(GLfixed * mantissa, GLint * exponent) +KEYWORD1_ALT GLbitfield KEYWORD2 NAME(_dispatch_stub_1031)(GLfixed * mantissa, GLint * exponent) { (void) mantissa; (void) exponent; RETURN_DISPATCH(QueryMatrixxOES, (mantissa, exponent), (F, "glQueryMatrixxOES(%p, %p);\n", (const void *) mantissa, (const void *) exponent)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1031)(GLclampf value, GLboolean invert); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1032)(GLclampf value, GLboolean invert); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1031)(GLclampf value, GLboolean invert) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1032)(GLclampf value, GLboolean invert) { (void) value; (void) invert; DISPATCH(SampleMaskSGIS, (value, invert), (F, "glSampleMaskSGIS(%f, %d);\n", value, invert)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1032)(GLenum pattern); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1033)(GLenum pattern); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1032)(GLenum pattern) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1033)(GLenum pattern) { (void) pattern; DISPATCH(SamplePatternSGIS, (pattern), (F, "glSamplePatternSGIS(0x%x);\n", pattern)); @@ -9291,9 +9414,9 @@ DISPATCH(VertexPointerEXT, (size, type, stride, count, pointer), (F, "glVertexPointerEXT(%d, 0x%x, %d, %d, %p);\n", size, type, stride, count, (const void *) pointer)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1039)(GLenum target, GLsizei numAttachments, const GLenum * attachments); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1040)(GLenum target, GLsizei numAttachments, const GLenum * attachments); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1039)(GLenum target, GLsizei numAttachments, const GLenum * attachments) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1040)(GLenum target, GLsizei numAttachments, const GLenum * attachments) { (void) target; (void) numAttachments; (void) attachments; DISPATCH(DiscardFramebufferEXT, (target, numAttachments, attachments), (F, "glDiscardFramebufferEXT(0x%x, %d, %p);\n", target, numAttachments, (const void *) attachments)); @@ -9305,9 +9428,9 @@ DISPATCH(ActiveShaderProgram, (pipeline, program), (F, "glActiveShaderProgram(%d, %d);\n", pipeline, program)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1040)(GLuint pipeline, GLuint program); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1041)(GLuint pipeline, GLuint program); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1040)(GLuint pipeline, GLuint program) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1041)(GLuint pipeline, GLuint program) { (void) pipeline; (void) program; DISPATCH(ActiveShaderProgram, (pipeline, program), (F, "glActiveShaderProgramEXT(%d, %d);\n", pipeline, program)); @@ -9319,9 +9442,9 @@ DISPATCH(BindProgramPipeline, (pipeline), (F, "glBindProgramPipeline(%d);\n", pipeline)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1041)(GLuint pipeline); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1042)(GLuint pipeline); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1041)(GLuint pipeline) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1042)(GLuint pipeline) { (void) pipeline; DISPATCH(BindProgramPipeline, (pipeline), (F, "glBindProgramPipelineEXT(%d);\n", pipeline)); @@ -9333,9 +9456,9 @@ RETURN_DISPATCH(CreateShaderProgramv, (type, count, strings), (F, "glCreateShaderProgramv(0x%x, %d, %p);\n", type, count, (const void *) strings)); } -KEYWORD1_ALT GLuint KEYWORD2 NAME(_dispatch_stub_1042)(GLenum type, GLsizei count, const GLchar * const * strings); +KEYWORD1_ALT GLuint KEYWORD2 NAME(_dispatch_stub_1043)(GLenum type, GLsizei count, const GLchar * const * strings); -KEYWORD1_ALT GLuint KEYWORD2 NAME(_dispatch_stub_1042)(GLenum type, GLsizei count, const GLchar * const * strings) +KEYWORD1_ALT GLuint KEYWORD2 NAME(_dispatch_stub_1043)(GLenum type, GLsizei count, const GLchar * const * strings) { (void) type; (void) count; (void) strings; RETURN_DISPATCH(CreateShaderProgramv, (type, count, strings), (F, "glCreateShaderProgramvEXT(0x%x, %d, %p);\n", type, count, (const void *) strings)); @@ -9347,9 +9470,9 @@ DISPATCH(DeleteProgramPipelines, (n, pipelines), (F, "glDeleteProgramPipelines(%d, %p);\n", n, (const void *) pipelines)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1043)(GLsizei n, const GLuint * pipelines); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1044)(GLsizei n, const GLuint * pipelines); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1043)(GLsizei n, const GLuint * pipelines) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1044)(GLsizei n, const GLuint * pipelines) { (void) n; (void) pipelines; DISPATCH(DeleteProgramPipelines, (n, pipelines), (F, "glDeleteProgramPipelinesEXT(%d, %p);\n", n, (const void *) pipelines)); @@ -9361,9 +9484,9 @@ DISPATCH(GenProgramPipelines, (n, pipelines), (F, "glGenProgramPipelines(%d, %p);\n", n, (const void *) pipelines)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1044)(GLsizei n, GLuint * pipelines); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1045)(GLsizei n, GLuint * pipelines); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1044)(GLsizei n, GLuint * pipelines) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1045)(GLsizei n, GLuint * pipelines) { (void) n; (void) pipelines; DISPATCH(GenProgramPipelines, (n, pipelines), (F, "glGenProgramPipelinesEXT(%d, %p);\n", n, (const void *) pipelines)); @@ -9375,9 +9498,9 @@ DISPATCH(GetProgramPipelineInfoLog, (pipeline, bufSize, length, infoLog), (F, "glGetProgramPipelineInfoLog(%d, %d, %p, %p);\n", pipeline, bufSize, (const void *) length, (const void *) infoLog)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1045)(GLuint pipeline, GLsizei bufSize, GLsizei * length, GLchar * infoLog); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1046)(GLuint pipeline, GLsizei bufSize, GLsizei * length, GLchar * infoLog); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1045)(GLuint pipeline, GLsizei bufSize, GLsizei * length, GLchar * infoLog) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1046)(GLuint pipeline, GLsizei bufSize, GLsizei * length, GLchar * infoLog) { (void) pipeline; (void) bufSize; (void) length; (void) infoLog; DISPATCH(GetProgramPipelineInfoLog, (pipeline, bufSize, length, infoLog), (F, "glGetProgramPipelineInfoLogEXT(%d, %d, %p, %p);\n", pipeline, bufSize, (const void *) length, (const void *) infoLog)); @@ -9389,9 +9512,9 @@ DISPATCH(GetProgramPipelineiv, (pipeline, pname, params), (F, "glGetProgramPipelineiv(%d, 0x%x, %p);\n", pipeline, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1046)(GLuint pipeline, GLenum pname, GLint * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1047)(GLuint pipeline, GLenum pname, GLint * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1046)(GLuint pipeline, GLenum pname, GLint * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1047)(GLuint pipeline, GLenum pname, GLint * params) { (void) pipeline; (void) pname; (void) params; DISPATCH(GetProgramPipelineiv, (pipeline, pname, params), (F, "glGetProgramPipelineivEXT(%d, 0x%x, %p);\n", pipeline, pname, (const void *) params)); @@ -9403,9 +9526,9 @@ RETURN_DISPATCH(IsProgramPipeline, (pipeline), (F, "glIsProgramPipeline(%d);\n", pipeline)); } -KEYWORD1_ALT GLboolean KEYWORD2 NAME(_dispatch_stub_1047)(GLuint pipeline); +KEYWORD1_ALT GLboolean KEYWORD2 NAME(_dispatch_stub_1048)(GLuint pipeline); -KEYWORD1_ALT GLboolean KEYWORD2 NAME(_dispatch_stub_1047)(GLuint pipeline) +KEYWORD1_ALT GLboolean KEYWORD2 NAME(_dispatch_stub_1048)(GLuint pipeline) { (void) pipeline; RETURN_DISPATCH(IsProgramPipeline, (pipeline), (F, "glIsProgramPipelineEXT(%d);\n", pipeline)); @@ -9417,17 +9540,17 @@ DISPATCH(LockArraysEXT, (first, count), (F, "glLockArraysEXT(%d, %d);\n", first, count)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1049)(GLuint program, GLint location, GLdouble x); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1050)(GLuint program, GLint location, GLdouble x); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1049)(GLuint program, GLint location, GLdouble x) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1050)(GLuint program, GLint location, GLdouble x) { (void) program; (void) location; (void) x; DISPATCH(ProgramUniform1d, (program, location, x), (F, "glProgramUniform1d(%d, %d, %f);\n", program, location, x)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1050)(GLuint program, GLint location, GLsizei count, const GLdouble * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1051)(GLuint program, GLint location, GLsizei count, const GLdouble * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1050)(GLuint program, GLint location, GLsizei count, const GLdouble * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1051)(GLuint program, GLint location, GLsizei count, const GLdouble * value) { (void) program; (void) location; (void) count; (void) value; DISPATCH(ProgramUniform1dv, (program, location, count, value), (F, "glProgramUniform1dv(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); @@ -9439,9 +9562,9 @@ DISPATCH(ProgramUniform1f, (program, location, x), (F, "glProgramUniform1f(%d, %d, %f);\n", program, location, x)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1051)(GLuint program, GLint location, GLfloat x); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1052)(GLuint program, GLint location, GLfloat x); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1051)(GLuint program, GLint location, GLfloat x) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1052)(GLuint program, GLint location, GLfloat x) { (void) program; (void) location; (void) x; DISPATCH(ProgramUniform1f, (program, location, x), (F, "glProgramUniform1fEXT(%d, %d, %f);\n", program, location, x)); @@ -9453,9 +9576,9 @@ DISPATCH(ProgramUniform1fv, (program, location, count, value), (F, "glProgramUniform1fv(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1052)(GLuint program, GLint location, GLsizei count, const GLfloat * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1053)(GLuint program, GLint location, GLsizei count, const GLfloat * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1052)(GLuint program, GLint location, GLsizei count, const GLfloat * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1053)(GLuint program, GLint location, GLsizei count, const GLfloat * value) { (void) program; (void) location; (void) count; (void) value; DISPATCH(ProgramUniform1fv, (program, location, count, value), (F, "glProgramUniform1fvEXT(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); @@ -9467,9 +9590,9 @@ DISPATCH(ProgramUniform1i, (program, location, x), (F, "glProgramUniform1i(%d, %d, %d);\n", program, location, x)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1053)(GLuint program, GLint location, GLint x); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1054)(GLuint program, GLint location, GLint x); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1053)(GLuint program, GLint location, GLint x) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1054)(GLuint program, GLint location, GLint x) { (void) program; (void) location; (void) x; DISPATCH(ProgramUniform1i, (program, location, x), (F, "glProgramUniform1iEXT(%d, %d, %d);\n", program, location, x)); @@ -9481,9 +9604,9 @@ DISPATCH(ProgramUniform1iv, (program, location, count, value), (F, "glProgramUniform1iv(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1054)(GLuint program, GLint location, GLsizei count, const GLint * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1055)(GLuint program, GLint location, GLsizei count, const GLint * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1054)(GLuint program, GLint location, GLsizei count, const GLint * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1055)(GLuint program, GLint location, GLsizei count, const GLint * value) { (void) program; (void) location; (void) count; (void) value; DISPATCH(ProgramUniform1iv, (program, location, count, value), (F, "glProgramUniform1ivEXT(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); @@ -9495,9 +9618,9 @@ DISPATCH(ProgramUniform1ui, (program, location, x), (F, "glProgramUniform1ui(%d, %d, %d);\n", program, location, x)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1055)(GLuint program, GLint location, GLuint x); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1056)(GLuint program, GLint location, GLuint x); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1055)(GLuint program, GLint location, GLuint x) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1056)(GLuint program, GLint location, GLuint x) { (void) program; (void) location; (void) x; DISPATCH(ProgramUniform1ui, (program, location, x), (F, "glProgramUniform1uiEXT(%d, %d, %d);\n", program, location, x)); @@ -9509,25 +9632,25 @@ DISPATCH(ProgramUniform1uiv, (program, location, count, value), (F, "glProgramUniform1uiv(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1056)(GLuint program, GLint location, GLsizei count, const GLuint * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1057)(GLuint program, GLint location, GLsizei count, const GLuint * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1056)(GLuint program, GLint location, GLsizei count, const GLuint * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1057)(GLuint program, GLint location, GLsizei count, const GLuint * value) { (void) program; (void) location; (void) count; (void) value; DISPATCH(ProgramUniform1uiv, (program, location, count, value), (F, "glProgramUniform1uivEXT(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1057)(GLuint program, GLint location, GLdouble x, GLdouble y); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1058)(GLuint program, GLint location, GLdouble x, GLdouble y); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1057)(GLuint program, GLint location, GLdouble x, GLdouble y) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1058)(GLuint program, GLint location, GLdouble x, GLdouble y) { (void) program; (void) location; (void) x; (void) y; DISPATCH(ProgramUniform2d, (program, location, x, y), (F, "glProgramUniform2d(%d, %d, %f, %f);\n", program, location, x, y)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1058)(GLuint program, GLint location, GLsizei count, const GLdouble * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1059)(GLuint program, GLint location, GLsizei count, const GLdouble * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1058)(GLuint program, GLint location, GLsizei count, const GLdouble * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1059)(GLuint program, GLint location, GLsizei count, const GLdouble * value) { (void) program; (void) location; (void) count; (void) value; DISPATCH(ProgramUniform2dv, (program, location, count, value), (F, "glProgramUniform2dv(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); @@ -9539,9 +9662,9 @@ DISPATCH(ProgramUniform2f, (program, location, x, y), (F, "glProgramUniform2f(%d, %d, %f, %f);\n", program, location, x, y)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1059)(GLuint program, GLint location, GLfloat x, GLfloat y); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1060)(GLuint program, GLint location, GLfloat x, GLfloat y); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1059)(GLuint program, GLint location, GLfloat x, GLfloat y) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1060)(GLuint program, GLint location, GLfloat x, GLfloat y) { (void) program; (void) location; (void) x; (void) y; DISPATCH(ProgramUniform2f, (program, location, x, y), (F, "glProgramUniform2fEXT(%d, %d, %f, %f);\n", program, location, x, y)); @@ -9553,9 +9676,9 @@ DISPATCH(ProgramUniform2fv, (program, location, count, value), (F, "glProgramUniform2fv(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1060)(GLuint program, GLint location, GLsizei count, const GLfloat * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1061)(GLuint program, GLint location, GLsizei count, const GLfloat * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1060)(GLuint program, GLint location, GLsizei count, const GLfloat * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1061)(GLuint program, GLint location, GLsizei count, const GLfloat * value) { (void) program; (void) location; (void) count; (void) value; DISPATCH(ProgramUniform2fv, (program, location, count, value), (F, "glProgramUniform2fvEXT(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); @@ -9567,9 +9690,9 @@ DISPATCH(ProgramUniform2i, (program, location, x, y), (F, "glProgramUniform2i(%d, %d, %d, %d);\n", program, location, x, y)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1061)(GLuint program, GLint location, GLint x, GLint y); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1062)(GLuint program, GLint location, GLint x, GLint y); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1061)(GLuint program, GLint location, GLint x, GLint y) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1062)(GLuint program, GLint location, GLint x, GLint y) { (void) program; (void) location; (void) x; (void) y; DISPATCH(ProgramUniform2i, (program, location, x, y), (F, "glProgramUniform2iEXT(%d, %d, %d, %d);\n", program, location, x, y)); @@ -9581,9 +9704,9 @@ DISPATCH(ProgramUniform2iv, (program, location, count, value), (F, "glProgramUniform2iv(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1062)(GLuint program, GLint location, GLsizei count, const GLint * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1063)(GLuint program, GLint location, GLsizei count, const GLint * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1062)(GLuint program, GLint location, GLsizei count, const GLint * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1063)(GLuint program, GLint location, GLsizei count, const GLint * value) { (void) program; (void) location; (void) count; (void) value; DISPATCH(ProgramUniform2iv, (program, location, count, value), (F, "glProgramUniform2ivEXT(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); @@ -9595,9 +9718,9 @@ DISPATCH(ProgramUniform2ui, (program, location, x, y), (F, "glProgramUniform2ui(%d, %d, %d, %d);\n", program, location, x, y)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1063)(GLuint program, GLint location, GLuint x, GLuint y); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1064)(GLuint program, GLint location, GLuint x, GLuint y); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1063)(GLuint program, GLint location, GLuint x, GLuint y) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1064)(GLuint program, GLint location, GLuint x, GLuint y) { (void) program; (void) location; (void) x; (void) y; DISPATCH(ProgramUniform2ui, (program, location, x, y), (F, "glProgramUniform2uiEXT(%d, %d, %d, %d);\n", program, location, x, y)); @@ -9609,25 +9732,25 @@ DISPATCH(ProgramUniform2uiv, (program, location, count, value), (F, "glProgramUniform2uiv(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1064)(GLuint program, GLint location, GLsizei count, const GLuint * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1065)(GLuint program, GLint location, GLsizei count, const GLuint * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1064)(GLuint program, GLint location, GLsizei count, const GLuint * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1065)(GLuint program, GLint location, GLsizei count, const GLuint * value) { (void) program; (void) location; (void) count; (void) value; DISPATCH(ProgramUniform2uiv, (program, location, count, value), (F, "glProgramUniform2uivEXT(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1065)(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1066)(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1065)(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1066)(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z) { (void) program; (void) location; (void) x; (void) y; (void) z; DISPATCH(ProgramUniform3d, (program, location, x, y, z), (F, "glProgramUniform3d(%d, %d, %f, %f, %f);\n", program, location, x, y, z)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1066)(GLuint program, GLint location, GLsizei count, const GLdouble * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1067)(GLuint program, GLint location, GLsizei count, const GLdouble * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1066)(GLuint program, GLint location, GLsizei count, const GLdouble * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1067)(GLuint program, GLint location, GLsizei count, const GLdouble * value) { (void) program; (void) location; (void) count; (void) value; DISPATCH(ProgramUniform3dv, (program, location, count, value), (F, "glProgramUniform3dv(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); @@ -9639,9 +9762,9 @@ DISPATCH(ProgramUniform3f, (program, location, x, y, z), (F, "glProgramUniform3f(%d, %d, %f, %f, %f);\n", program, location, x, y, z)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1067)(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1068)(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1067)(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1068)(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z) { (void) program; (void) location; (void) x; (void) y; (void) z; DISPATCH(ProgramUniform3f, (program, location, x, y, z), (F, "glProgramUniform3fEXT(%d, %d, %f, %f, %f);\n", program, location, x, y, z)); @@ -9653,9 +9776,9 @@ DISPATCH(ProgramUniform3fv, (program, location, count, value), (F, "glProgramUniform3fv(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1068)(GLuint program, GLint location, GLsizei count, const GLfloat * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1069)(GLuint program, GLint location, GLsizei count, const GLfloat * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1068)(GLuint program, GLint location, GLsizei count, const GLfloat * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1069)(GLuint program, GLint location, GLsizei count, const GLfloat * value) { (void) program; (void) location; (void) count; (void) value; DISPATCH(ProgramUniform3fv, (program, location, count, value), (F, "glProgramUniform3fvEXT(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); @@ -9667,9 +9790,9 @@ DISPATCH(ProgramUniform3i, (program, location, x, y, z), (F, "glProgramUniform3i(%d, %d, %d, %d, %d);\n", program, location, x, y, z)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1069)(GLuint program, GLint location, GLint x, GLint y, GLint z); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1070)(GLuint program, GLint location, GLint x, GLint y, GLint z); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1069)(GLuint program, GLint location, GLint x, GLint y, GLint z) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1070)(GLuint program, GLint location, GLint x, GLint y, GLint z) { (void) program; (void) location; (void) x; (void) y; (void) z; DISPATCH(ProgramUniform3i, (program, location, x, y, z), (F, "glProgramUniform3iEXT(%d, %d, %d, %d, %d);\n", program, location, x, y, z)); @@ -9681,9 +9804,9 @@ DISPATCH(ProgramUniform3iv, (program, location, count, value), (F, "glProgramUniform3iv(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1070)(GLuint program, GLint location, GLsizei count, const GLint * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1071)(GLuint program, GLint location, GLsizei count, const GLint * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1070)(GLuint program, GLint location, GLsizei count, const GLint * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1071)(GLuint program, GLint location, GLsizei count, const GLint * value) { (void) program; (void) location; (void) count; (void) value; DISPATCH(ProgramUniform3iv, (program, location, count, value), (F, "glProgramUniform3ivEXT(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); @@ -9695,9 +9818,9 @@ DISPATCH(ProgramUniform3ui, (program, location, x, y, z), (F, "glProgramUniform3ui(%d, %d, %d, %d, %d);\n", program, location, x, y, z)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1071)(GLuint program, GLint location, GLuint x, GLuint y, GLuint z); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1072)(GLuint program, GLint location, GLuint x, GLuint y, GLuint z); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1071)(GLuint program, GLint location, GLuint x, GLuint y, GLuint z) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1072)(GLuint program, GLint location, GLuint x, GLuint y, GLuint z) { (void) program; (void) location; (void) x; (void) y; (void) z; DISPATCH(ProgramUniform3ui, (program, location, x, y, z), (F, "glProgramUniform3uiEXT(%d, %d, %d, %d, %d);\n", program, location, x, y, z)); @@ -9709,25 +9832,25 @@ DISPATCH(ProgramUniform3uiv, (program, location, count, value), (F, "glProgramUniform3uiv(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1072)(GLuint program, GLint location, GLsizei count, const GLuint * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1073)(GLuint program, GLint location, GLsizei count, const GLuint * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1072)(GLuint program, GLint location, GLsizei count, const GLuint * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1073)(GLuint program, GLint location, GLsizei count, const GLuint * value) { (void) program; (void) location; (void) count; (void) value; DISPATCH(ProgramUniform3uiv, (program, location, count, value), (F, "glProgramUniform3uivEXT(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1073)(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z, GLdouble w); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1074)(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z, GLdouble w); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1073)(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z, GLdouble w) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1074)(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z, GLdouble w) { (void) program; (void) location; (void) x; (void) y; (void) z; (void) w; DISPATCH(ProgramUniform4d, (program, location, x, y, z, w), (F, "glProgramUniform4d(%d, %d, %f, %f, %f, %f);\n", program, location, x, y, z, w)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1074)(GLuint program, GLint location, GLsizei count, const GLdouble * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1075)(GLuint program, GLint location, GLsizei count, const GLdouble * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1074)(GLuint program, GLint location, GLsizei count, const GLdouble * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1075)(GLuint program, GLint location, GLsizei count, const GLdouble * value) { (void) program; (void) location; (void) count; (void) value; DISPATCH(ProgramUniform4dv, (program, location, count, value), (F, "glProgramUniform4dv(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); @@ -9739,9 +9862,9 @@ DISPATCH(ProgramUniform4f, (program, location, x, y, z, w), (F, "glProgramUniform4f(%d, %d, %f, %f, %f, %f);\n", program, location, x, y, z, w)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1075)(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z, GLfloat w); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1076)(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z, GLfloat w); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1075)(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z, GLfloat w) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1076)(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z, GLfloat w) { (void) program; (void) location; (void) x; (void) y; (void) z; (void) w; DISPATCH(ProgramUniform4f, (program, location, x, y, z, w), (F, "glProgramUniform4fEXT(%d, %d, %f, %f, %f, %f);\n", program, location, x, y, z, w)); @@ -9753,9 +9876,9 @@ DISPATCH(ProgramUniform4fv, (program, location, count, value), (F, "glProgramUniform4fv(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1076)(GLuint program, GLint location, GLsizei count, const GLfloat * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1077)(GLuint program, GLint location, GLsizei count, const GLfloat * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1076)(GLuint program, GLint location, GLsizei count, const GLfloat * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1077)(GLuint program, GLint location, GLsizei count, const GLfloat * value) { (void) program; (void) location; (void) count; (void) value; DISPATCH(ProgramUniform4fv, (program, location, count, value), (F, "glProgramUniform4fvEXT(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); @@ -9767,9 +9890,9 @@ DISPATCH(ProgramUniform4i, (program, location, x, y, z, w), (F, "glProgramUniform4i(%d, %d, %d, %d, %d, %d);\n", program, location, x, y, z, w)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1077)(GLuint program, GLint location, GLint x, GLint y, GLint z, GLint w); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1078)(GLuint program, GLint location, GLint x, GLint y, GLint z, GLint w); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1077)(GLuint program, GLint location, GLint x, GLint y, GLint z, GLint w) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1078)(GLuint program, GLint location, GLint x, GLint y, GLint z, GLint w) { (void) program; (void) location; (void) x; (void) y; (void) z; (void) w; DISPATCH(ProgramUniform4i, (program, location, x, y, z, w), (F, "glProgramUniform4iEXT(%d, %d, %d, %d, %d, %d);\n", program, location, x, y, z, w)); @@ -9781,9 +9904,9 @@ DISPATCH(ProgramUniform4iv, (program, location, count, value), (F, "glProgramUniform4iv(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1078)(GLuint program, GLint location, GLsizei count, const GLint * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1079)(GLuint program, GLint location, GLsizei count, const GLint * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1078)(GLuint program, GLint location, GLsizei count, const GLint * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1079)(GLuint program, GLint location, GLsizei count, const GLint * value) { (void) program; (void) location; (void) count; (void) value; DISPATCH(ProgramUniform4iv, (program, location, count, value), (F, "glProgramUniform4ivEXT(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); @@ -9795,9 +9918,9 @@ DISPATCH(ProgramUniform4ui, (program, location, x, y, z, w), (F, "glProgramUniform4ui(%d, %d, %d, %d, %d, %d);\n", program, location, x, y, z, w)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1079)(GLuint program, GLint location, GLuint x, GLuint y, GLuint z, GLuint w); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1080)(GLuint program, GLint location, GLuint x, GLuint y, GLuint z, GLuint w); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1079)(GLuint program, GLint location, GLuint x, GLuint y, GLuint z, GLuint w) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1080)(GLuint program, GLint location, GLuint x, GLuint y, GLuint z, GLuint w) { (void) program; (void) location; (void) x; (void) y; (void) z; (void) w; DISPATCH(ProgramUniform4ui, (program, location, x, y, z, w), (F, "glProgramUniform4uiEXT(%d, %d, %d, %d, %d, %d);\n", program, location, x, y, z, w)); @@ -9809,17 +9932,17 @@ DISPATCH(ProgramUniform4uiv, (program, location, count, value), (F, "glProgramUniform4uiv(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1080)(GLuint program, GLint location, GLsizei count, const GLuint * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1081)(GLuint program, GLint location, GLsizei count, const GLuint * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1080)(GLuint program, GLint location, GLsizei count, const GLuint * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1081)(GLuint program, GLint location, GLsizei count, const GLuint * value) { (void) program; (void) location; (void) count; (void) value; DISPATCH(ProgramUniform4uiv, (program, location, count, value), (F, "glProgramUniform4uivEXT(%d, %d, %d, %p);\n", program, location, count, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1081)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1082)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1081)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1082)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value) { (void) program; (void) location; (void) count; (void) transpose; (void) value; DISPATCH(ProgramUniformMatrix2dv, (program, location, count, transpose, value), (F, "glProgramUniformMatrix2dv(%d, %d, %d, %d, %p);\n", program, location, count, transpose, (const void *) value)); @@ -9831,17 +9954,17 @@ DISPATCH(ProgramUniformMatrix2fv, (program, location, count, transpose, value), (F, "glProgramUniformMatrix2fv(%d, %d, %d, %d, %p);\n", program, location, count, transpose, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1082)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1083)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1082)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1083)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value) { (void) program; (void) location; (void) count; (void) transpose; (void) value; DISPATCH(ProgramUniformMatrix2fv, (program, location, count, transpose, value), (F, "glProgramUniformMatrix2fvEXT(%d, %d, %d, %d, %p);\n", program, location, count, transpose, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1083)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1084)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1083)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1084)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value) { (void) program; (void) location; (void) count; (void) transpose; (void) value; DISPATCH(ProgramUniformMatrix2x3dv, (program, location, count, transpose, value), (F, "glProgramUniformMatrix2x3dv(%d, %d, %d, %d, %p);\n", program, location, count, transpose, (const void *) value)); @@ -9853,17 +9976,17 @@ DISPATCH(ProgramUniformMatrix2x3fv, (program, location, count, transpose, value), (F, "glProgramUniformMatrix2x3fv(%d, %d, %d, %d, %p);\n", program, location, count, transpose, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1084)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1085)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1084)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1085)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value) { (void) program; (void) location; (void) count; (void) transpose; (void) value; DISPATCH(ProgramUniformMatrix2x3fv, (program, location, count, transpose, value), (F, "glProgramUniformMatrix2x3fvEXT(%d, %d, %d, %d, %p);\n", program, location, count, transpose, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1085)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1086)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1085)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1086)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value) { (void) program; (void) location; (void) count; (void) transpose; (void) value; DISPATCH(ProgramUniformMatrix2x4dv, (program, location, count, transpose, value), (F, "glProgramUniformMatrix2x4dv(%d, %d, %d, %d, %p);\n", program, location, count, transpose, (const void *) value)); @@ -9875,17 +9998,17 @@ DISPATCH(ProgramUniformMatrix2x4fv, (program, location, count, transpose, value), (F, "glProgramUniformMatrix2x4fv(%d, %d, %d, %d, %p);\n", program, location, count, transpose, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1086)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1087)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1086)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1087)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value) { (void) program; (void) location; (void) count; (void) transpose; (void) value; DISPATCH(ProgramUniformMatrix2x4fv, (program, location, count, transpose, value), (F, "glProgramUniformMatrix2x4fvEXT(%d, %d, %d, %d, %p);\n", program, location, count, transpose, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1087)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1088)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1087)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1088)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value) { (void) program; (void) location; (void) count; (void) transpose; (void) value; DISPATCH(ProgramUniformMatrix3dv, (program, location, count, transpose, value), (F, "glProgramUniformMatrix3dv(%d, %d, %d, %d, %p);\n", program, location, count, transpose, (const void *) value)); @@ -9897,17 +10020,17 @@ DISPATCH(ProgramUniformMatrix3fv, (program, location, count, transpose, value), (F, "glProgramUniformMatrix3fv(%d, %d, %d, %d, %p);\n", program, location, count, transpose, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1088)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1089)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1088)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1089)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value) { (void) program; (void) location; (void) count; (void) transpose; (void) value; DISPATCH(ProgramUniformMatrix3fv, (program, location, count, transpose, value), (F, "glProgramUniformMatrix3fvEXT(%d, %d, %d, %d, %p);\n", program, location, count, transpose, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1089)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1090)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1089)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1090)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value) { (void) program; (void) location; (void) count; (void) transpose; (void) value; DISPATCH(ProgramUniformMatrix3x2dv, (program, location, count, transpose, value), (F, "glProgramUniformMatrix3x2dv(%d, %d, %d, %d, %p);\n", program, location, count, transpose, (const void *) value)); @@ -9919,17 +10042,17 @@ DISPATCH(ProgramUniformMatrix3x2fv, (program, location, count, transpose, value), (F, "glProgramUniformMatrix3x2fv(%d, %d, %d, %d, %p);\n", program, location, count, transpose, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1090)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1091)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1090)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1091)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value) { (void) program; (void) location; (void) count; (void) transpose; (void) value; DISPATCH(ProgramUniformMatrix3x2fv, (program, location, count, transpose, value), (F, "glProgramUniformMatrix3x2fvEXT(%d, %d, %d, %d, %p);\n", program, location, count, transpose, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1091)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1092)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1091)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1092)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value) { (void) program; (void) location; (void) count; (void) transpose; (void) value; DISPATCH(ProgramUniformMatrix3x4dv, (program, location, count, transpose, value), (F, "glProgramUniformMatrix3x4dv(%d, %d, %d, %d, %p);\n", program, location, count, transpose, (const void *) value)); @@ -9941,17 +10064,17 @@ DISPATCH(ProgramUniformMatrix3x4fv, (program, location, count, transpose, value), (F, "glProgramUniformMatrix3x4fv(%d, %d, %d, %d, %p);\n", program, location, count, transpose, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1092)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1093)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1092)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1093)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value) { (void) program; (void) location; (void) count; (void) transpose; (void) value; DISPATCH(ProgramUniformMatrix3x4fv, (program, location, count, transpose, value), (F, "glProgramUniformMatrix3x4fvEXT(%d, %d, %d, %d, %p);\n", program, location, count, transpose, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1093)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1094)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1093)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1094)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value) { (void) program; (void) location; (void) count; (void) transpose; (void) value; DISPATCH(ProgramUniformMatrix4dv, (program, location, count, transpose, value), (F, "glProgramUniformMatrix4dv(%d, %d, %d, %d, %p);\n", program, location, count, transpose, (const void *) value)); @@ -9963,17 +10086,17 @@ DISPATCH(ProgramUniformMatrix4fv, (program, location, count, transpose, value), (F, "glProgramUniformMatrix4fv(%d, %d, %d, %d, %p);\n", program, location, count, transpose, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1094)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1095)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1094)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1095)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value) { (void) program; (void) location; (void) count; (void) transpose; (void) value; DISPATCH(ProgramUniformMatrix4fv, (program, location, count, transpose, value), (F, "glProgramUniformMatrix4fvEXT(%d, %d, %d, %d, %p);\n", program, location, count, transpose, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1095)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1096)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1095)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1096)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value) { (void) program; (void) location; (void) count; (void) transpose; (void) value; DISPATCH(ProgramUniformMatrix4x2dv, (program, location, count, transpose, value), (F, "glProgramUniformMatrix4x2dv(%d, %d, %d, %d, %p);\n", program, location, count, transpose, (const void *) value)); @@ -9985,17 +10108,17 @@ DISPATCH(ProgramUniformMatrix4x2fv, (program, location, count, transpose, value), (F, "glProgramUniformMatrix4x2fv(%d, %d, %d, %d, %p);\n", program, location, count, transpose, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1096)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1097)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1096)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1097)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value) { (void) program; (void) location; (void) count; (void) transpose; (void) value; DISPATCH(ProgramUniformMatrix4x2fv, (program, location, count, transpose, value), (F, "glProgramUniformMatrix4x2fvEXT(%d, %d, %d, %d, %p);\n", program, location, count, transpose, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1097)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1098)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1097)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1098)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value) { (void) program; (void) location; (void) count; (void) transpose; (void) value; DISPATCH(ProgramUniformMatrix4x3dv, (program, location, count, transpose, value), (F, "glProgramUniformMatrix4x3dv(%d, %d, %d, %d, %p);\n", program, location, count, transpose, (const void *) value)); @@ -10007,9 +10130,9 @@ DISPATCH(ProgramUniformMatrix4x3fv, (program, location, count, transpose, value), (F, "glProgramUniformMatrix4x3fv(%d, %d, %d, %d, %p);\n", program, location, count, transpose, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1098)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1099)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1098)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1099)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value) { (void) program; (void) location; (void) count; (void) transpose; (void) value; DISPATCH(ProgramUniformMatrix4x3fv, (program, location, count, transpose, value), (F, "glProgramUniformMatrix4x3fvEXT(%d, %d, %d, %d, %p);\n", program, location, count, transpose, (const void *) value)); @@ -10026,9 +10149,9 @@ DISPATCH(UseProgramStages, (pipeline, stages, program), (F, "glUseProgramStages(%d, %d, %d);\n", pipeline, stages, program)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1100)(GLuint pipeline, GLbitfield stages, GLuint program); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1101)(GLuint pipeline, GLbitfield stages, GLuint program); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1100)(GLuint pipeline, GLbitfield stages, GLuint program) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1101)(GLuint pipeline, GLbitfield stages, GLuint program) { (void) pipeline; (void) stages; (void) program; DISPATCH(UseProgramStages, (pipeline, stages, program), (F, "glUseProgramStagesEXT(%d, %d, %d);\n", pipeline, stages, program)); @@ -10040,9 +10163,9 @@ DISPATCH(ValidateProgramPipeline, (pipeline), (F, "glValidateProgramPipeline(%d);\n", pipeline)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1101)(GLuint pipeline); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1102)(GLuint pipeline); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1101)(GLuint pipeline) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1102)(GLuint pipeline) { (void) pipeline; DISPATCH(ValidateProgramPipeline, (pipeline), (F, "glValidateProgramPipelineEXT(%d);\n", pipeline)); @@ -10060,9 +10183,9 @@ DISPATCH(DebugMessageCallback, (callback, userParam), (F, "glDebugMessageCallback(%p, %p);\n", (const void *) callback, (const void *) userParam)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1102)(GLDEBUGPROC callback, const GLvoid * userParam); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1103)(GLDEBUGPROC callback, const GLvoid * userParam); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1102)(GLDEBUGPROC callback, const GLvoid * userParam) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1103)(GLDEBUGPROC callback, const GLvoid * userParam) { (void) callback; (void) userParam; DISPATCH(DebugMessageCallback, (callback, userParam), (F, "glDebugMessageCallbackKHR(%p, %p);\n", (const void *) callback, (const void *) userParam)); @@ -10080,9 +10203,9 @@ DISPATCH(DebugMessageControl, (source, type, severity, count, ids, enabled), (F, "glDebugMessageControl(0x%x, 0x%x, 0x%x, %d, %p, %d);\n", source, type, severity, count, (const void *) ids, enabled)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1103)(GLenum source, GLenum type, GLenum severity, GLsizei count, const GLuint * ids, GLboolean enabled); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1104)(GLenum source, GLenum type, GLenum severity, GLsizei count, const GLuint * ids, GLboolean enabled); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1103)(GLenum source, GLenum type, GLenum severity, GLsizei count, const GLuint * ids, GLboolean enabled) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1104)(GLenum source, GLenum type, GLenum severity, GLsizei count, const GLuint * ids, GLboolean enabled) { (void) source; (void) type; (void) severity; (void) count; (void) ids; (void) enabled; DISPATCH(DebugMessageControl, (source, type, severity, count, ids, enabled), (F, "glDebugMessageControlKHR(0x%x, 0x%x, 0x%x, %d, %p, %d);\n", source, type, severity, count, (const void *) ids, enabled)); @@ -10100,9 +10223,9 @@ DISPATCH(DebugMessageInsert, (source, type, id, severity, length, buf), (F, "glDebugMessageInsert(0x%x, 0x%x, %d, 0x%x, %d, %p);\n", source, type, id, severity, length, (const void *) buf)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1104)(GLenum source, GLenum type, GLuint id, GLenum severity, GLsizei length, const GLchar * buf); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1105)(GLenum source, GLenum type, GLuint id, GLenum severity, GLsizei length, const GLchar * buf); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1104)(GLenum source, GLenum type, GLuint id, GLenum severity, GLsizei length, const GLchar * buf) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1105)(GLenum source, GLenum type, GLuint id, GLenum severity, GLsizei length, const GLchar * buf) { (void) source; (void) type; (void) id; (void) severity; (void) length; (void) buf; DISPATCH(DebugMessageInsert, (source, type, id, severity, length, buf), (F, "glDebugMessageInsertKHR(0x%x, 0x%x, %d, 0x%x, %d, %p);\n", source, type, id, severity, length, (const void *) buf)); @@ -10120,9 +10243,9 @@ RETURN_DISPATCH(GetDebugMessageLog, (count, bufsize, sources, types, ids, severities, lengths, messageLog), (F, "glGetDebugMessageLog(%d, %d, %p, %p, %p, %p, %p, %p);\n", count, bufsize, (const void *) sources, (const void *) types, (const void *) ids, (const void *) severities, (const void *) lengths, (const void *) messageLog)); } -KEYWORD1_ALT GLuint KEYWORD2 NAME(_dispatch_stub_1105)(GLuint count, GLsizei bufsize, GLenum * sources, GLenum * types, GLuint * ids, GLenum * severities, GLsizei * lengths, GLchar * messageLog); +KEYWORD1_ALT GLuint KEYWORD2 NAME(_dispatch_stub_1106)(GLuint count, GLsizei bufsize, GLenum * sources, GLenum * types, GLuint * ids, GLenum * severities, GLsizei * lengths, GLchar * messageLog); -KEYWORD1_ALT GLuint KEYWORD2 NAME(_dispatch_stub_1105)(GLuint count, GLsizei bufsize, GLenum * sources, GLenum * types, GLuint * ids, GLenum * severities, GLsizei * lengths, GLchar * messageLog) +KEYWORD1_ALT GLuint KEYWORD2 NAME(_dispatch_stub_1106)(GLuint count, GLsizei bufsize, GLenum * sources, GLenum * types, GLuint * ids, GLenum * severities, GLsizei * lengths, GLchar * messageLog) { (void) count; (void) bufsize; (void) sources; (void) types; (void) ids; (void) severities; (void) lengths; (void) messageLog; RETURN_DISPATCH(GetDebugMessageLog, (count, bufsize, sources, types, ids, severities, lengths, messageLog), (F, "glGetDebugMessageLogKHR(%d, %d, %p, %p, %p, %p, %p, %p);\n", count, bufsize, (const void *) sources, (const void *) types, (const void *) ids, (const void *) severities, (const void *) lengths, (const void *) messageLog)); @@ -10134,9 +10257,9 @@ DISPATCH(GetObjectLabel, (identifier, name, bufSize, length, label), (F, "glGetObjectLabel(0x%x, %d, %d, %p, %p);\n", identifier, name, bufSize, (const void *) length, (const void *) label)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1106)(GLenum identifier, GLuint name, GLsizei bufSize, GLsizei * length, GLchar * label); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1107)(GLenum identifier, GLuint name, GLsizei bufSize, GLsizei * length, GLchar * label); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1106)(GLenum identifier, GLuint name, GLsizei bufSize, GLsizei * length, GLchar * label) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1107)(GLenum identifier, GLuint name, GLsizei bufSize, GLsizei * length, GLchar * label) { (void) identifier; (void) name; (void) bufSize; (void) length; (void) label; DISPATCH(GetObjectLabel, (identifier, name, bufSize, length, label), (F, "glGetObjectLabelKHR(0x%x, %d, %d, %p, %p);\n", identifier, name, bufSize, (const void *) length, (const void *) label)); @@ -10148,9 +10271,9 @@ DISPATCH(GetObjectPtrLabel, (ptr, bufSize, length, label), (F, "glGetObjectPtrLabel(%p, %d, %p, %p);\n", (const void *) ptr, bufSize, (const void *) length, (const void *) label)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1107)(const GLvoid * ptr, GLsizei bufSize, GLsizei * length, GLchar * label); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1108)(const GLvoid * ptr, GLsizei bufSize, GLsizei * length, GLchar * label); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1107)(const GLvoid * ptr, GLsizei bufSize, GLsizei * length, GLchar * label) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1108)(const GLvoid * ptr, GLsizei bufSize, GLsizei * length, GLchar * label) { (void) ptr; (void) bufSize; (void) length; (void) label; DISPATCH(GetObjectPtrLabel, (ptr, bufSize, length, label), (F, "glGetObjectPtrLabelKHR(%p, %d, %p, %p);\n", (const void *) ptr, bufSize, (const void *) length, (const void *) label)); @@ -10162,9 +10285,9 @@ DISPATCH(ObjectLabel, (identifier, name, length, label), (F, "glObjectLabel(0x%x, %d, %d, %p);\n", identifier, name, length, (const void *) label)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1108)(GLenum identifier, GLuint name, GLsizei length, const GLchar * label); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1109)(GLenum identifier, GLuint name, GLsizei length, const GLchar * label); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1108)(GLenum identifier, GLuint name, GLsizei length, const GLchar * label) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1109)(GLenum identifier, GLuint name, GLsizei length, const GLchar * label) { (void) identifier; (void) name; (void) length; (void) label; DISPATCH(ObjectLabel, (identifier, name, length, label), (F, "glObjectLabelKHR(0x%x, %d, %d, %p);\n", identifier, name, length, (const void *) label)); @@ -10176,9 +10299,9 @@ DISPATCH(ObjectPtrLabel, (ptr, length, label), (F, "glObjectPtrLabel(%p, %d, %p);\n", (const void *) ptr, length, (const void *) label)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1109)(const GLvoid * ptr, GLsizei length, const GLchar * label); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1110)(const GLvoid * ptr, GLsizei length, const GLchar * label); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1109)(const GLvoid * ptr, GLsizei length, const GLchar * label) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1110)(const GLvoid * ptr, GLsizei length, const GLchar * label) { (void) ptr; (void) length; (void) label; DISPATCH(ObjectPtrLabel, (ptr, length, label), (F, "glObjectPtrLabelKHR(%p, %d, %p);\n", (const void *) ptr, length, (const void *) label)); @@ -10189,9 +10312,9 @@ DISPATCH(PopDebugGroup, (), (F, "glPopDebugGroup();\n")); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1110)(void); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1111)(void); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1110)(void) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1111)(void) { DISPATCH(PopDebugGroup, (), (F, "glPopDebugGroupKHR();\n")); } @@ -10202,9 +10325,9 @@ DISPATCH(PushDebugGroup, (source, id, length, message), (F, "glPushDebugGroup(0x%x, %d, %d, %p);\n", source, id, length, (const void *) message)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1111)(GLenum source, GLuint id, GLsizei length, const GLchar * message); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1112)(GLenum source, GLuint id, GLsizei length, const GLchar * message); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1111)(GLenum source, GLuint id, GLsizei length, const GLchar * message) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1112)(GLenum source, GLuint id, GLsizei length, const GLchar * message) { (void) source; (void) id; (void) length; (void) message; DISPATCH(PushDebugGroup, (source, id, length, message), (F, "glPushDebugGroupKHR(0x%x, %d, %d, %p);\n", source, id, length, (const void *) message)); @@ -10270,742 +10393,758 @@ DISPATCH(FogCoordfvEXT, (coord), (F, "glFogCoordfvEXT(%p);\n", (const void *) coord)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1117)(void); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1118)(void); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1117)(void) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1118)(void) { DISPATCH(ResizeBuffersMESA, (), (F, "glResizeBuffersMESA();\n")); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1118)(GLdouble x, GLdouble y, GLdouble z, GLdouble w); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1119)(GLdouble x, GLdouble y, GLdouble z, GLdouble w); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1118)(GLdouble x, GLdouble y, GLdouble z, GLdouble w) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1119)(GLdouble x, GLdouble y, GLdouble z, GLdouble w) { (void) x; (void) y; (void) z; (void) w; DISPATCH(WindowPos4dMESA, (x, y, z, w), (F, "glWindowPos4dMESA(%f, %f, %f, %f);\n", x, y, z, w)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1119)(const GLdouble * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1120)(const GLdouble * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1119)(const GLdouble * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1120)(const GLdouble * v) { (void) v; DISPATCH(WindowPos4dvMESA, (v), (F, "glWindowPos4dvMESA(%p);\n", (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1120)(GLfloat x, GLfloat y, GLfloat z, GLfloat w); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1121)(GLfloat x, GLfloat y, GLfloat z, GLfloat w); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1120)(GLfloat x, GLfloat y, GLfloat z, GLfloat w) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1121)(GLfloat x, GLfloat y, GLfloat z, GLfloat w) { (void) x; (void) y; (void) z; (void) w; DISPATCH(WindowPos4fMESA, (x, y, z, w), (F, "glWindowPos4fMESA(%f, %f, %f, %f);\n", x, y, z, w)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1121)(const GLfloat * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1122)(const GLfloat * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1121)(const GLfloat * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1122)(const GLfloat * v) { (void) v; DISPATCH(WindowPos4fvMESA, (v), (F, "glWindowPos4fvMESA(%p);\n", (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1122)(GLint x, GLint y, GLint z, GLint w); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1123)(GLint x, GLint y, GLint z, GLint w); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1122)(GLint x, GLint y, GLint z, GLint w) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1123)(GLint x, GLint y, GLint z, GLint w) { (void) x; (void) y; (void) z; (void) w; DISPATCH(WindowPos4iMESA, (x, y, z, w), (F, "glWindowPos4iMESA(%d, %d, %d, %d);\n", x, y, z, w)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1123)(const GLint * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1124)(const GLint * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1123)(const GLint * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1124)(const GLint * v) { (void) v; DISPATCH(WindowPos4ivMESA, (v), (F, "glWindowPos4ivMESA(%p);\n", (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1124)(GLshort x, GLshort y, GLshort z, GLshort w); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1125)(GLshort x, GLshort y, GLshort z, GLshort w); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1124)(GLshort x, GLshort y, GLshort z, GLshort w) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1125)(GLshort x, GLshort y, GLshort z, GLshort w) { (void) x; (void) y; (void) z; (void) w; DISPATCH(WindowPos4sMESA, (x, y, z, w), (F, "glWindowPos4sMESA(%d, %d, %d, %d);\n", x, y, z, w)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1125)(const GLshort * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1126)(const GLshort * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1125)(const GLshort * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1126)(const GLshort * v) { (void) v; DISPATCH(WindowPos4svMESA, (v), (F, "glWindowPos4svMESA(%p);\n", (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1126)(const GLenum * mode, const GLint * first, const GLsizei * count, GLsizei primcount, GLint modestride); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1127)(const GLenum * mode, const GLint * first, const GLsizei * count, GLsizei primcount, GLint modestride); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1126)(const GLenum * mode, const GLint * first, const GLsizei * count, GLsizei primcount, GLint modestride) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1127)(const GLenum * mode, const GLint * first, const GLsizei * count, GLsizei primcount, GLint modestride) { (void) mode; (void) first; (void) count; (void) primcount; (void) modestride; DISPATCH(MultiModeDrawArraysIBM, (mode, first, count, primcount, modestride), (F, "glMultiModeDrawArraysIBM(%p, %p, %p, %d, %d);\n", (const void *) mode, (const void *) first, (const void *) count, primcount, modestride)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1127)(const GLenum * mode, const GLsizei * count, GLenum type, const GLvoid * const * indices, GLsizei primcount, GLint modestride); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1128)(const GLenum * mode, const GLsizei * count, GLenum type, const GLvoid * const * indices, GLsizei primcount, GLint modestride); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1127)(const GLenum * mode, const GLsizei * count, GLenum type, const GLvoid * const * indices, GLsizei primcount, GLint modestride) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1128)(const GLenum * mode, const GLsizei * count, GLenum type, const GLvoid * const * indices, GLsizei primcount, GLint modestride) { (void) mode; (void) count; (void) type; (void) indices; (void) primcount; (void) modestride; DISPATCH(MultiModeDrawElementsIBM, (mode, count, type, indices, primcount, modestride), (F, "glMultiModeDrawElementsIBM(%p, %p, 0x%x, %p, %d, %d);\n", (const void *) mode, (const void *) count, type, (const void *) indices, primcount, modestride)); } -KEYWORD1_ALT GLboolean KEYWORD2 NAME(_dispatch_stub_1128)(GLsizei n, const GLuint * ids, GLboolean * residences); +KEYWORD1_ALT GLboolean KEYWORD2 NAME(_dispatch_stub_1129)(GLsizei n, const GLuint * ids, GLboolean * residences); -KEYWORD1_ALT GLboolean KEYWORD2 NAME(_dispatch_stub_1128)(GLsizei n, const GLuint * ids, GLboolean * residences) +KEYWORD1_ALT GLboolean KEYWORD2 NAME(_dispatch_stub_1129)(GLsizei n, const GLuint * ids, GLboolean * residences) { (void) n; (void) ids; (void) residences; RETURN_DISPATCH(AreProgramsResidentNV, (n, ids, residences), (F, "glAreProgramsResidentNV(%d, %p, %p);\n", n, (const void *) ids, (const void *) residences)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1129)(GLenum target, GLuint id, const GLfloat * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1130)(GLenum target, GLuint id, const GLfloat * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1129)(GLenum target, GLuint id, const GLfloat * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1130)(GLenum target, GLuint id, const GLfloat * params) { (void) target; (void) id; (void) params; DISPATCH(ExecuteProgramNV, (target, id, params), (F, "glExecuteProgramNV(0x%x, %d, %p);\n", target, id, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1130)(GLenum target, GLuint index, GLenum pname, GLdouble * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1131)(GLenum target, GLuint index, GLenum pname, GLdouble * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1130)(GLenum target, GLuint index, GLenum pname, GLdouble * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1131)(GLenum target, GLuint index, GLenum pname, GLdouble * params) { (void) target; (void) index; (void) pname; (void) params; DISPATCH(GetProgramParameterdvNV, (target, index, pname, params), (F, "glGetProgramParameterdvNV(0x%x, %d, 0x%x, %p);\n", target, index, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1131)(GLenum target, GLuint index, GLenum pname, GLfloat * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1132)(GLenum target, GLuint index, GLenum pname, GLfloat * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1131)(GLenum target, GLuint index, GLenum pname, GLfloat * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1132)(GLenum target, GLuint index, GLenum pname, GLfloat * params) { (void) target; (void) index; (void) pname; (void) params; DISPATCH(GetProgramParameterfvNV, (target, index, pname, params), (F, "glGetProgramParameterfvNV(0x%x, %d, 0x%x, %p);\n", target, index, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1132)(GLuint id, GLenum pname, GLubyte * program); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1133)(GLuint id, GLenum pname, GLubyte * program); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1132)(GLuint id, GLenum pname, GLubyte * program) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1133)(GLuint id, GLenum pname, GLubyte * program) { (void) id; (void) pname; (void) program; DISPATCH(GetProgramStringNV, (id, pname, program), (F, "glGetProgramStringNV(%d, 0x%x, %p);\n", id, pname, (const void *) program)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1133)(GLuint id, GLenum pname, GLint * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1134)(GLuint id, GLenum pname, GLint * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1133)(GLuint id, GLenum pname, GLint * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1134)(GLuint id, GLenum pname, GLint * params) { (void) id; (void) pname; (void) params; DISPATCH(GetProgramivNV, (id, pname, params), (F, "glGetProgramivNV(%d, 0x%x, %p);\n", id, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1134)(GLenum target, GLuint address, GLenum pname, GLint * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1135)(GLenum target, GLuint address, GLenum pname, GLint * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1134)(GLenum target, GLuint address, GLenum pname, GLint * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1135)(GLenum target, GLuint address, GLenum pname, GLint * params) { (void) target; (void) address; (void) pname; (void) params; DISPATCH(GetTrackMatrixivNV, (target, address, pname, params), (F, "glGetTrackMatrixivNV(0x%x, %d, 0x%x, %p);\n", target, address, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1135)(GLuint index, GLenum pname, GLdouble * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1136)(GLuint index, GLenum pname, GLdouble * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1135)(GLuint index, GLenum pname, GLdouble * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1136)(GLuint index, GLenum pname, GLdouble * params) { (void) index; (void) pname; (void) params; DISPATCH(GetVertexAttribdvNV, (index, pname, params), (F, "glGetVertexAttribdvNV(%d, 0x%x, %p);\n", index, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1136)(GLuint index, GLenum pname, GLfloat * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1137)(GLuint index, GLenum pname, GLfloat * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1136)(GLuint index, GLenum pname, GLfloat * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1137)(GLuint index, GLenum pname, GLfloat * params) { (void) index; (void) pname; (void) params; DISPATCH(GetVertexAttribfvNV, (index, pname, params), (F, "glGetVertexAttribfvNV(%d, 0x%x, %p);\n", index, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1137)(GLuint index, GLenum pname, GLint * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1138)(GLuint index, GLenum pname, GLint * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1137)(GLuint index, GLenum pname, GLint * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1138)(GLuint index, GLenum pname, GLint * params) { (void) index; (void) pname; (void) params; DISPATCH(GetVertexAttribivNV, (index, pname, params), (F, "glGetVertexAttribivNV(%d, 0x%x, %p);\n", index, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1138)(GLenum target, GLuint id, GLsizei len, const GLubyte * program); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1139)(GLenum target, GLuint id, GLsizei len, const GLubyte * program); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1138)(GLenum target, GLuint id, GLsizei len, const GLubyte * program) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1139)(GLenum target, GLuint id, GLsizei len, const GLubyte * program) { (void) target; (void) id; (void) len; (void) program; DISPATCH(LoadProgramNV, (target, id, len, program), (F, "glLoadProgramNV(0x%x, %d, %d, %p);\n", target, id, len, (const void *) program)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1139)(GLenum target, GLuint index, GLsizei num, const GLdouble * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1140)(GLenum target, GLuint index, GLsizei num, const GLdouble * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1139)(GLenum target, GLuint index, GLsizei num, const GLdouble * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1140)(GLenum target, GLuint index, GLsizei num, const GLdouble * params) { (void) target; (void) index; (void) num; (void) params; DISPATCH(ProgramParameters4dvNV, (target, index, num, params), (F, "glProgramParameters4dvNV(0x%x, %d, %d, %p);\n", target, index, num, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1140)(GLenum target, GLuint index, GLsizei num, const GLfloat * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1141)(GLenum target, GLuint index, GLsizei num, const GLfloat * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1140)(GLenum target, GLuint index, GLsizei num, const GLfloat * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1141)(GLenum target, GLuint index, GLsizei num, const GLfloat * params) { (void) target; (void) index; (void) num; (void) params; DISPATCH(ProgramParameters4fvNV, (target, index, num, params), (F, "glProgramParameters4fvNV(0x%x, %d, %d, %p);\n", target, index, num, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1141)(GLsizei n, const GLuint * ids); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1142)(GLsizei n, const GLuint * ids); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1141)(GLsizei n, const GLuint * ids) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1142)(GLsizei n, const GLuint * ids) { (void) n; (void) ids; DISPATCH(RequestResidentProgramsNV, (n, ids), (F, "glRequestResidentProgramsNV(%d, %p);\n", n, (const void *) ids)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1142)(GLenum target, GLuint address, GLenum matrix, GLenum transform); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1143)(GLenum target, GLuint address, GLenum matrix, GLenum transform); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1142)(GLenum target, GLuint address, GLenum matrix, GLenum transform) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1143)(GLenum target, GLuint address, GLenum matrix, GLenum transform) { (void) target; (void) address; (void) matrix; (void) transform; DISPATCH(TrackMatrixNV, (target, address, matrix, transform), (F, "glTrackMatrixNV(0x%x, %d, 0x%x, 0x%x);\n", target, address, matrix, transform)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1143)(GLuint index, GLdouble x); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1144)(GLuint index, GLdouble x); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1143)(GLuint index, GLdouble x) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1144)(GLuint index, GLdouble x) { (void) index; (void) x; DISPATCH(VertexAttrib1dNV, (index, x), (F, "glVertexAttrib1dNV(%d, %f);\n", index, x)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1144)(GLuint index, const GLdouble * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1145)(GLuint index, const GLdouble * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1144)(GLuint index, const GLdouble * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1145)(GLuint index, const GLdouble * v) { (void) index; (void) v; DISPATCH(VertexAttrib1dvNV, (index, v), (F, "glVertexAttrib1dvNV(%d, %p);\n", index, (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1145)(GLuint index, GLfloat x); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1146)(GLuint index, GLfloat x); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1145)(GLuint index, GLfloat x) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1146)(GLuint index, GLfloat x) { (void) index; (void) x; DISPATCH(VertexAttrib1fNV, (index, x), (F, "glVertexAttrib1fNV(%d, %f);\n", index, x)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1146)(GLuint index, const GLfloat * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1147)(GLuint index, const GLfloat * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1146)(GLuint index, const GLfloat * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1147)(GLuint index, const GLfloat * v) { (void) index; (void) v; DISPATCH(VertexAttrib1fvNV, (index, v), (F, "glVertexAttrib1fvNV(%d, %p);\n", index, (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1147)(GLuint index, GLshort x); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1148)(GLuint index, GLshort x); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1147)(GLuint index, GLshort x) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1148)(GLuint index, GLshort x) { (void) index; (void) x; DISPATCH(VertexAttrib1sNV, (index, x), (F, "glVertexAttrib1sNV(%d, %d);\n", index, x)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1148)(GLuint index, const GLshort * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1149)(GLuint index, const GLshort * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1148)(GLuint index, const GLshort * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1149)(GLuint index, const GLshort * v) { (void) index; (void) v; DISPATCH(VertexAttrib1svNV, (index, v), (F, "glVertexAttrib1svNV(%d, %p);\n", index, (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1149)(GLuint index, GLdouble x, GLdouble y); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1150)(GLuint index, GLdouble x, GLdouble y); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1149)(GLuint index, GLdouble x, GLdouble y) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1150)(GLuint index, GLdouble x, GLdouble y) { (void) index; (void) x; (void) y; DISPATCH(VertexAttrib2dNV, (index, x, y), (F, "glVertexAttrib2dNV(%d, %f, %f);\n", index, x, y)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1150)(GLuint index, const GLdouble * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1151)(GLuint index, const GLdouble * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1150)(GLuint index, const GLdouble * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1151)(GLuint index, const GLdouble * v) { (void) index; (void) v; DISPATCH(VertexAttrib2dvNV, (index, v), (F, "glVertexAttrib2dvNV(%d, %p);\n", index, (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1151)(GLuint index, GLfloat x, GLfloat y); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1152)(GLuint index, GLfloat x, GLfloat y); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1151)(GLuint index, GLfloat x, GLfloat y) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1152)(GLuint index, GLfloat x, GLfloat y) { (void) index; (void) x; (void) y; DISPATCH(VertexAttrib2fNV, (index, x, y), (F, "glVertexAttrib2fNV(%d, %f, %f);\n", index, x, y)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1152)(GLuint index, const GLfloat * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1153)(GLuint index, const GLfloat * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1152)(GLuint index, const GLfloat * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1153)(GLuint index, const GLfloat * v) { (void) index; (void) v; DISPATCH(VertexAttrib2fvNV, (index, v), (F, "glVertexAttrib2fvNV(%d, %p);\n", index, (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1153)(GLuint index, GLshort x, GLshort y); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1154)(GLuint index, GLshort x, GLshort y); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1153)(GLuint index, GLshort x, GLshort y) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1154)(GLuint index, GLshort x, GLshort y) { (void) index; (void) x; (void) y; DISPATCH(VertexAttrib2sNV, (index, x, y), (F, "glVertexAttrib2sNV(%d, %d, %d);\n", index, x, y)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1154)(GLuint index, const GLshort * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1155)(GLuint index, const GLshort * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1154)(GLuint index, const GLshort * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1155)(GLuint index, const GLshort * v) { (void) index; (void) v; DISPATCH(VertexAttrib2svNV, (index, v), (F, "glVertexAttrib2svNV(%d, %p);\n", index, (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1155)(GLuint index, GLdouble x, GLdouble y, GLdouble z); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1156)(GLuint index, GLdouble x, GLdouble y, GLdouble z); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1155)(GLuint index, GLdouble x, GLdouble y, GLdouble z) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1156)(GLuint index, GLdouble x, GLdouble y, GLdouble z) { (void) index; (void) x; (void) y; (void) z; DISPATCH(VertexAttrib3dNV, (index, x, y, z), (F, "glVertexAttrib3dNV(%d, %f, %f, %f);\n", index, x, y, z)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1156)(GLuint index, const GLdouble * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1157)(GLuint index, const GLdouble * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1156)(GLuint index, const GLdouble * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1157)(GLuint index, const GLdouble * v) { (void) index; (void) v; DISPATCH(VertexAttrib3dvNV, (index, v), (F, "glVertexAttrib3dvNV(%d, %p);\n", index, (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1157)(GLuint index, GLfloat x, GLfloat y, GLfloat z); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1158)(GLuint index, GLfloat x, GLfloat y, GLfloat z); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1157)(GLuint index, GLfloat x, GLfloat y, GLfloat z) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1158)(GLuint index, GLfloat x, GLfloat y, GLfloat z) { (void) index; (void) x; (void) y; (void) z; DISPATCH(VertexAttrib3fNV, (index, x, y, z), (F, "glVertexAttrib3fNV(%d, %f, %f, %f);\n", index, x, y, z)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1158)(GLuint index, const GLfloat * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1159)(GLuint index, const GLfloat * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1158)(GLuint index, const GLfloat * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1159)(GLuint index, const GLfloat * v) { (void) index; (void) v; DISPATCH(VertexAttrib3fvNV, (index, v), (F, "glVertexAttrib3fvNV(%d, %p);\n", index, (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1159)(GLuint index, GLshort x, GLshort y, GLshort z); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1160)(GLuint index, GLshort x, GLshort y, GLshort z); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1159)(GLuint index, GLshort x, GLshort y, GLshort z) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1160)(GLuint index, GLshort x, GLshort y, GLshort z) { (void) index; (void) x; (void) y; (void) z; DISPATCH(VertexAttrib3sNV, (index, x, y, z), (F, "glVertexAttrib3sNV(%d, %d, %d, %d);\n", index, x, y, z)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1160)(GLuint index, const GLshort * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1161)(GLuint index, const GLshort * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1160)(GLuint index, const GLshort * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1161)(GLuint index, const GLshort * v) { (void) index; (void) v; DISPATCH(VertexAttrib3svNV, (index, v), (F, "glVertexAttrib3svNV(%d, %p);\n", index, (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1161)(GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1162)(GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1161)(GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1162)(GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w) { (void) index; (void) x; (void) y; (void) z; (void) w; DISPATCH(VertexAttrib4dNV, (index, x, y, z, w), (F, "glVertexAttrib4dNV(%d, %f, %f, %f, %f);\n", index, x, y, z, w)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1162)(GLuint index, const GLdouble * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1163)(GLuint index, const GLdouble * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1162)(GLuint index, const GLdouble * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1163)(GLuint index, const GLdouble * v) { (void) index; (void) v; DISPATCH(VertexAttrib4dvNV, (index, v), (F, "glVertexAttrib4dvNV(%d, %p);\n", index, (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1163)(GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1164)(GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1163)(GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1164)(GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w) { (void) index; (void) x; (void) y; (void) z; (void) w; DISPATCH(VertexAttrib4fNV, (index, x, y, z, w), (F, "glVertexAttrib4fNV(%d, %f, %f, %f, %f);\n", index, x, y, z, w)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1164)(GLuint index, const GLfloat * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1165)(GLuint index, const GLfloat * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1164)(GLuint index, const GLfloat * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1165)(GLuint index, const GLfloat * v) { (void) index; (void) v; DISPATCH(VertexAttrib4fvNV, (index, v), (F, "glVertexAttrib4fvNV(%d, %p);\n", index, (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1165)(GLuint index, GLshort x, GLshort y, GLshort z, GLshort w); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1166)(GLuint index, GLshort x, GLshort y, GLshort z, GLshort w); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1165)(GLuint index, GLshort x, GLshort y, GLshort z, GLshort w) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1166)(GLuint index, GLshort x, GLshort y, GLshort z, GLshort w) { (void) index; (void) x; (void) y; (void) z; (void) w; DISPATCH(VertexAttrib4sNV, (index, x, y, z, w), (F, "glVertexAttrib4sNV(%d, %d, %d, %d, %d);\n", index, x, y, z, w)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1166)(GLuint index, const GLshort * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1167)(GLuint index, const GLshort * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1166)(GLuint index, const GLshort * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1167)(GLuint index, const GLshort * v) { (void) index; (void) v; DISPATCH(VertexAttrib4svNV, (index, v), (F, "glVertexAttrib4svNV(%d, %p);\n", index, (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1167)(GLuint index, GLubyte x, GLubyte y, GLubyte z, GLubyte w); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1168)(GLuint index, GLubyte x, GLubyte y, GLubyte z, GLubyte w); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1167)(GLuint index, GLubyte x, GLubyte y, GLubyte z, GLubyte w) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1168)(GLuint index, GLubyte x, GLubyte y, GLubyte z, GLubyte w) { (void) index; (void) x; (void) y; (void) z; (void) w; DISPATCH(VertexAttrib4ubNV, (index, x, y, z, w), (F, "glVertexAttrib4ubNV(%d, %d, %d, %d, %d);\n", index, x, y, z, w)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1168)(GLuint index, const GLubyte * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1169)(GLuint index, const GLubyte * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1168)(GLuint index, const GLubyte * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1169)(GLuint index, const GLubyte * v) { (void) index; (void) v; DISPATCH(VertexAttrib4ubvNV, (index, v), (F, "glVertexAttrib4ubvNV(%d, %p);\n", index, (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1169)(GLuint index, GLint size, GLenum type, GLsizei stride, const GLvoid * pointer); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1170)(GLuint index, GLint size, GLenum type, GLsizei stride, const GLvoid * pointer); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1169)(GLuint index, GLint size, GLenum type, GLsizei stride, const GLvoid * pointer) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1170)(GLuint index, GLint size, GLenum type, GLsizei stride, const GLvoid * pointer) { (void) index; (void) size; (void) type; (void) stride; (void) pointer; DISPATCH(VertexAttribPointerNV, (index, size, type, stride, pointer), (F, "glVertexAttribPointerNV(%d, %d, 0x%x, %d, %p);\n", index, size, type, stride, (const void *) pointer)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1170)(GLuint index, GLsizei n, const GLdouble * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1171)(GLuint index, GLsizei n, const GLdouble * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1170)(GLuint index, GLsizei n, const GLdouble * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1171)(GLuint index, GLsizei n, const GLdouble * v) { (void) index; (void) n; (void) v; DISPATCH(VertexAttribs1dvNV, (index, n, v), (F, "glVertexAttribs1dvNV(%d, %d, %p);\n", index, n, (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1171)(GLuint index, GLsizei n, const GLfloat * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1172)(GLuint index, GLsizei n, const GLfloat * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1171)(GLuint index, GLsizei n, const GLfloat * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1172)(GLuint index, GLsizei n, const GLfloat * v) { (void) index; (void) n; (void) v; DISPATCH(VertexAttribs1fvNV, (index, n, v), (F, "glVertexAttribs1fvNV(%d, %d, %p);\n", index, n, (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1172)(GLuint index, GLsizei n, const GLshort * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1173)(GLuint index, GLsizei n, const GLshort * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1172)(GLuint index, GLsizei n, const GLshort * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1173)(GLuint index, GLsizei n, const GLshort * v) { (void) index; (void) n; (void) v; DISPATCH(VertexAttribs1svNV, (index, n, v), (F, "glVertexAttribs1svNV(%d, %d, %p);\n", index, n, (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1173)(GLuint index, GLsizei n, const GLdouble * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1174)(GLuint index, GLsizei n, const GLdouble * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1173)(GLuint index, GLsizei n, const GLdouble * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1174)(GLuint index, GLsizei n, const GLdouble * v) { (void) index; (void) n; (void) v; DISPATCH(VertexAttribs2dvNV, (index, n, v), (F, "glVertexAttribs2dvNV(%d, %d, %p);\n", index, n, (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1174)(GLuint index, GLsizei n, const GLfloat * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1175)(GLuint index, GLsizei n, const GLfloat * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1174)(GLuint index, GLsizei n, const GLfloat * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1175)(GLuint index, GLsizei n, const GLfloat * v) { (void) index; (void) n; (void) v; DISPATCH(VertexAttribs2fvNV, (index, n, v), (F, "glVertexAttribs2fvNV(%d, %d, %p);\n", index, n, (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1175)(GLuint index, GLsizei n, const GLshort * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1176)(GLuint index, GLsizei n, const GLshort * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1175)(GLuint index, GLsizei n, const GLshort * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1176)(GLuint index, GLsizei n, const GLshort * v) { (void) index; (void) n; (void) v; DISPATCH(VertexAttribs2svNV, (index, n, v), (F, "glVertexAttribs2svNV(%d, %d, %p);\n", index, n, (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1176)(GLuint index, GLsizei n, const GLdouble * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1177)(GLuint index, GLsizei n, const GLdouble * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1176)(GLuint index, GLsizei n, const GLdouble * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1177)(GLuint index, GLsizei n, const GLdouble * v) { (void) index; (void) n; (void) v; DISPATCH(VertexAttribs3dvNV, (index, n, v), (F, "glVertexAttribs3dvNV(%d, %d, %p);\n", index, n, (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1177)(GLuint index, GLsizei n, const GLfloat * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1178)(GLuint index, GLsizei n, const GLfloat * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1177)(GLuint index, GLsizei n, const GLfloat * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1178)(GLuint index, GLsizei n, const GLfloat * v) { (void) index; (void) n; (void) v; DISPATCH(VertexAttribs3fvNV, (index, n, v), (F, "glVertexAttribs3fvNV(%d, %d, %p);\n", index, n, (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1178)(GLuint index, GLsizei n, const GLshort * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1179)(GLuint index, GLsizei n, const GLshort * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1178)(GLuint index, GLsizei n, const GLshort * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1179)(GLuint index, GLsizei n, const GLshort * v) { (void) index; (void) n; (void) v; DISPATCH(VertexAttribs3svNV, (index, n, v), (F, "glVertexAttribs3svNV(%d, %d, %p);\n", index, n, (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1179)(GLuint index, GLsizei n, const GLdouble * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1180)(GLuint index, GLsizei n, const GLdouble * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1179)(GLuint index, GLsizei n, const GLdouble * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1180)(GLuint index, GLsizei n, const GLdouble * v) { (void) index; (void) n; (void) v; DISPATCH(VertexAttribs4dvNV, (index, n, v), (F, "glVertexAttribs4dvNV(%d, %d, %p);\n", index, n, (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1180)(GLuint index, GLsizei n, const GLfloat * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1181)(GLuint index, GLsizei n, const GLfloat * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1180)(GLuint index, GLsizei n, const GLfloat * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1181)(GLuint index, GLsizei n, const GLfloat * v) { (void) index; (void) n; (void) v; DISPATCH(VertexAttribs4fvNV, (index, n, v), (F, "glVertexAttribs4fvNV(%d, %d, %p);\n", index, n, (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1181)(GLuint index, GLsizei n, const GLshort * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1182)(GLuint index, GLsizei n, const GLshort * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1181)(GLuint index, GLsizei n, const GLshort * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1182)(GLuint index, GLsizei n, const GLshort * v) { (void) index; (void) n; (void) v; DISPATCH(VertexAttribs4svNV, (index, n, v), (F, "glVertexAttribs4svNV(%d, %d, %p);\n", index, n, (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1182)(GLuint index, GLsizei n, const GLubyte * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1183)(GLuint index, GLsizei n, const GLubyte * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1182)(GLuint index, GLsizei n, const GLubyte * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1183)(GLuint index, GLsizei n, const GLubyte * v) { (void) index; (void) n; (void) v; DISPATCH(VertexAttribs4ubvNV, (index, n, v), (F, "glVertexAttribs4ubvNV(%d, %d, %p);\n", index, n, (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1183)(GLenum pname, GLfloat * param); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1184)(GLenum pname, GLfloat * param); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1183)(GLenum pname, GLfloat * param) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1184)(GLenum pname, GLfloat * param) { (void) pname; (void) param; DISPATCH(GetTexBumpParameterfvATI, (pname, param), (F, "glGetTexBumpParameterfvATI(0x%x, %p);\n", pname, (const void *) param)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1184)(GLenum pname, GLint * param); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1185)(GLenum pname, GLint * param); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1184)(GLenum pname, GLint * param) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1185)(GLenum pname, GLint * param) { (void) pname; (void) param; DISPATCH(GetTexBumpParameterivATI, (pname, param), (F, "glGetTexBumpParameterivATI(0x%x, %p);\n", pname, (const void *) param)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1185)(GLenum pname, const GLfloat * param); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1186)(GLenum pname, const GLfloat * param); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1185)(GLenum pname, const GLfloat * param) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1186)(GLenum pname, const GLfloat * param) { (void) pname; (void) param; DISPATCH(TexBumpParameterfvATI, (pname, param), (F, "glTexBumpParameterfvATI(0x%x, %p);\n", pname, (const void *) param)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1186)(GLenum pname, const GLint * param); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1187)(GLenum pname, const GLint * param); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1186)(GLenum pname, const GLint * param) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1187)(GLenum pname, const GLint * param) { (void) pname; (void) param; DISPATCH(TexBumpParameterivATI, (pname, param), (F, "glTexBumpParameterivATI(0x%x, %p);\n", pname, (const void *) param)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1187)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1188)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1187)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1188)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod) { (void) op; (void) dst; (void) dstMod; (void) arg1; (void) arg1Rep; (void) arg1Mod; DISPATCH(AlphaFragmentOp1ATI, (op, dst, dstMod, arg1, arg1Rep, arg1Mod), (F, "glAlphaFragmentOp1ATI(0x%x, %d, %d, %d, %d, %d);\n", op, dst, dstMod, arg1, arg1Rep, arg1Mod)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1188)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1189)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1188)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1189)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod) { (void) op; (void) dst; (void) dstMod; (void) arg1; (void) arg1Rep; (void) arg1Mod; (void) arg2; (void) arg2Rep; (void) arg2Mod; DISPATCH(AlphaFragmentOp2ATI, (op, dst, dstMod, arg1, arg1Rep, arg1Mod, arg2, arg2Rep, arg2Mod), (F, "glAlphaFragmentOp2ATI(0x%x, %d, %d, %d, %d, %d, %d, %d, %d);\n", op, dst, dstMod, arg1, arg1Rep, arg1Mod, arg2, arg2Rep, arg2Mod)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1189)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1190)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1189)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1190)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod) { (void) op; (void) dst; (void) dstMod; (void) arg1; (void) arg1Rep; (void) arg1Mod; (void) arg2; (void) arg2Rep; (void) arg2Mod; (void) arg3; (void) arg3Rep; (void) arg3Mod; DISPATCH(AlphaFragmentOp3ATI, (op, dst, dstMod, arg1, arg1Rep, arg1Mod, arg2, arg2Rep, arg2Mod, arg3, arg3Rep, arg3Mod), (F, "glAlphaFragmentOp3ATI(0x%x, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d);\n", op, dst, dstMod, arg1, arg1Rep, arg1Mod, arg2, arg2Rep, arg2Mod, arg3, arg3Rep, arg3Mod)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1190)(void); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1191)(void); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1190)(void) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1191)(void) { DISPATCH(BeginFragmentShaderATI, (), (F, "glBeginFragmentShaderATI();\n")); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1191)(GLuint id); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1192)(GLuint id); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1191)(GLuint id) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1192)(GLuint id) { (void) id; DISPATCH(BindFragmentShaderATI, (id), (F, "glBindFragmentShaderATI(%d);\n", id)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1192)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1193)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1192)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1193)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod) { (void) op; (void) dst; (void) dstMask; (void) dstMod; (void) arg1; (void) arg1Rep; (void) arg1Mod; DISPATCH(ColorFragmentOp1ATI, (op, dst, dstMask, dstMod, arg1, arg1Rep, arg1Mod), (F, "glColorFragmentOp1ATI(0x%x, %d, %d, %d, %d, %d, %d);\n", op, dst, dstMask, dstMod, arg1, arg1Rep, arg1Mod)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1193)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1194)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1193)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1194)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod) { (void) op; (void) dst; (void) dstMask; (void) dstMod; (void) arg1; (void) arg1Rep; (void) arg1Mod; (void) arg2; (void) arg2Rep; (void) arg2Mod; DISPATCH(ColorFragmentOp2ATI, (op, dst, dstMask, dstMod, arg1, arg1Rep, arg1Mod, arg2, arg2Rep, arg2Mod), (F, "glColorFragmentOp2ATI(0x%x, %d, %d, %d, %d, %d, %d, %d, %d, %d);\n", op, dst, dstMask, dstMod, arg1, arg1Rep, arg1Mod, arg2, arg2Rep, arg2Mod)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1194)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1195)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1194)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1195)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod) { (void) op; (void) dst; (void) dstMask; (void) dstMod; (void) arg1; (void) arg1Rep; (void) arg1Mod; (void) arg2; (void) arg2Rep; (void) arg2Mod; (void) arg3; (void) arg3Rep; (void) arg3Mod; DISPATCH(ColorFragmentOp3ATI, (op, dst, dstMask, dstMod, arg1, arg1Rep, arg1Mod, arg2, arg2Rep, arg2Mod, arg3, arg3Rep, arg3Mod), (F, "glColorFragmentOp3ATI(0x%x, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d);\n", op, dst, dstMask, dstMod, arg1, arg1Rep, arg1Mod, arg2, arg2Rep, arg2Mod, arg3, arg3Rep, arg3Mod)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1195)(GLuint id); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1196)(GLuint id); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1195)(GLuint id) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1196)(GLuint id) { (void) id; DISPATCH(DeleteFragmentShaderATI, (id), (F, "glDeleteFragmentShaderATI(%d);\n", id)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1196)(void); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1197)(void); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1196)(void) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1197)(void) { DISPATCH(EndFragmentShaderATI, (), (F, "glEndFragmentShaderATI();\n")); } -KEYWORD1_ALT GLuint KEYWORD2 NAME(_dispatch_stub_1197)(GLuint range); +KEYWORD1_ALT GLuint KEYWORD2 NAME(_dispatch_stub_1198)(GLuint range); -KEYWORD1_ALT GLuint KEYWORD2 NAME(_dispatch_stub_1197)(GLuint range) +KEYWORD1_ALT GLuint KEYWORD2 NAME(_dispatch_stub_1198)(GLuint range) { (void) range; RETURN_DISPATCH(GenFragmentShadersATI, (range), (F, "glGenFragmentShadersATI(%d);\n", range)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1198)(GLuint dst, GLuint coord, GLenum swizzle); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1199)(GLuint dst, GLuint coord, GLenum swizzle); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1198)(GLuint dst, GLuint coord, GLenum swizzle) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1199)(GLuint dst, GLuint coord, GLenum swizzle) { (void) dst; (void) coord; (void) swizzle; DISPATCH(PassTexCoordATI, (dst, coord, swizzle), (F, "glPassTexCoordATI(%d, %d, 0x%x);\n", dst, coord, swizzle)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1199)(GLuint dst, GLuint interp, GLenum swizzle); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1200)(GLuint dst, GLuint interp, GLenum swizzle); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1199)(GLuint dst, GLuint interp, GLenum swizzle) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1200)(GLuint dst, GLuint interp, GLenum swizzle) { (void) dst; (void) interp; (void) swizzle; DISPATCH(SampleMapATI, (dst, interp, swizzle), (F, "glSampleMapATI(%d, %d, 0x%x);\n", dst, interp, swizzle)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1200)(GLuint dst, const GLfloat * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1201)(GLuint dst, const GLfloat * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1200)(GLuint dst, const GLfloat * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1201)(GLuint dst, const GLfloat * value) { (void) dst; (void) value; DISPATCH(SetFragmentShaderConstantATI, (dst, value), (F, "glSetFragmentShaderConstantATI(%d, %p);\n", dst, (const void *) value)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1201)(GLenum face); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1202)(GLuint first, GLsizei count, const GLfloat * v); + +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1202)(GLuint first, GLsizei count, const GLfloat * v) +{ + (void) first; (void) count; (void) v; + DISPATCH(DepthRangeArrayfvOES, (first, count, v), (F, "glDepthRangeArrayfvOES(%d, %d, %p);\n", first, count, (const void *) v)); +} + +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1203)(GLuint index, GLfloat n, GLfloat f); + +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1203)(GLuint index, GLfloat n, GLfloat f) +{ + (void) index; (void) n; (void) f; + DISPATCH(DepthRangeIndexedfOES, (index, n, f), (F, "glDepthRangeIndexedfOES(%d, %f, %f);\n", index, n, f)); +} + +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1204)(GLenum face); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1201)(GLenum face) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1204)(GLenum face) { (void) face; DISPATCH(ActiveStencilFaceEXT, (face), (F, "glActiveStencilFaceEXT(0x%x);\n", face)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1202)(GLuint array); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1205)(GLuint array); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1202)(GLuint array) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1205)(GLuint array) { (void) array; DISPATCH(BindVertexArrayAPPLE, (array), (F, "glBindVertexArrayAPPLE(%d);\n", array)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1203)(GLsizei n, GLuint * arrays); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1206)(GLsizei n, GLuint * arrays); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1203)(GLsizei n, GLuint * arrays) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1206)(GLsizei n, GLuint * arrays) { (void) n; (void) arrays; DISPATCH(GenVertexArraysAPPLE, (n, arrays), (F, "glGenVertexArraysAPPLE(%d, %p);\n", n, (const void *) arrays)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1204)(GLuint id, GLsizei len, const GLubyte * name, GLdouble * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1207)(GLuint id, GLsizei len, const GLubyte * name, GLdouble * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1204)(GLuint id, GLsizei len, const GLubyte * name, GLdouble * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1207)(GLuint id, GLsizei len, const GLubyte * name, GLdouble * params) { (void) id; (void) len; (void) name; (void) params; DISPATCH(GetProgramNamedParameterdvNV, (id, len, name, params), (F, "glGetProgramNamedParameterdvNV(%d, %d, %p, %p);\n", id, len, (const void *) name, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1205)(GLuint id, GLsizei len, const GLubyte * name, GLfloat * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1208)(GLuint id, GLsizei len, const GLubyte * name, GLfloat * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1205)(GLuint id, GLsizei len, const GLubyte * name, GLfloat * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1208)(GLuint id, GLsizei len, const GLubyte * name, GLfloat * params) { (void) id; (void) len; (void) name; (void) params; DISPATCH(GetProgramNamedParameterfvNV, (id, len, name, params), (F, "glGetProgramNamedParameterfvNV(%d, %d, %p, %p);\n", id, len, (const void *) name, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1206)(GLuint id, GLsizei len, const GLubyte * name, GLdouble x, GLdouble y, GLdouble z, GLdouble w); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1209)(GLuint id, GLsizei len, const GLubyte * name, GLdouble x, GLdouble y, GLdouble z, GLdouble w); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1206)(GLuint id, GLsizei len, const GLubyte * name, GLdouble x, GLdouble y, GLdouble z, GLdouble w) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1209)(GLuint id, GLsizei len, const GLubyte * name, GLdouble x, GLdouble y, GLdouble z, GLdouble w) { (void) id; (void) len; (void) name; (void) x; (void) y; (void) z; (void) w; DISPATCH(ProgramNamedParameter4dNV, (id, len, name, x, y, z, w), (F, "glProgramNamedParameter4dNV(%d, %d, %p, %f, %f, %f, %f);\n", id, len, (const void *) name, x, y, z, w)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1207)(GLuint id, GLsizei len, const GLubyte * name, const GLdouble * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1210)(GLuint id, GLsizei len, const GLubyte * name, const GLdouble * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1207)(GLuint id, GLsizei len, const GLubyte * name, const GLdouble * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1210)(GLuint id, GLsizei len, const GLubyte * name, const GLdouble * v) { (void) id; (void) len; (void) name; (void) v; DISPATCH(ProgramNamedParameter4dvNV, (id, len, name, v), (F, "glProgramNamedParameter4dvNV(%d, %d, %p, %p);\n", id, len, (const void *) name, (const void *) v)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1208)(GLuint id, GLsizei len, const GLubyte * name, GLfloat x, GLfloat y, GLfloat z, GLfloat w); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1211)(GLuint id, GLsizei len, const GLubyte * name, GLfloat x, GLfloat y, GLfloat z, GLfloat w); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1208)(GLuint id, GLsizei len, const GLubyte * name, GLfloat x, GLfloat y, GLfloat z, GLfloat w) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1211)(GLuint id, GLsizei len, const GLubyte * name, GLfloat x, GLfloat y, GLfloat z, GLfloat w) { (void) id; (void) len; (void) name; (void) x; (void) y; (void) z; (void) w; DISPATCH(ProgramNamedParameter4fNV, (id, len, name, x, y, z, w), (F, "glProgramNamedParameter4fNV(%d, %d, %p, %f, %f, %f, %f);\n", id, len, (const void *) name, x, y, z, w)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1209)(GLuint id, GLsizei len, const GLubyte * name, const GLfloat * v); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1212)(GLuint id, GLsizei len, const GLubyte * name, const GLfloat * v); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1209)(GLuint id, GLsizei len, const GLubyte * name, const GLfloat * v) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1212)(GLuint id, GLsizei len, const GLubyte * name, const GLfloat * v) { (void) id; (void) len; (void) name; (void) v; DISPATCH(ProgramNamedParameter4fvNV, (id, len, name, v), (F, "glProgramNamedParameter4fvNV(%d, %d, %p, %p);\n", id, len, (const void *) name, (const void *) v)); @@ -11016,33 +11155,33 @@ DISPATCH(PrimitiveRestartNV, (), (F, "glPrimitiveRestartNV();\n")); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1211)(GLenum coord, GLenum pname, GLfixed * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1214)(GLenum coord, GLenum pname, GLfixed * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1211)(GLenum coord, GLenum pname, GLfixed * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1214)(GLenum coord, GLenum pname, GLfixed * params) { (void) coord; (void) pname; (void) params; DISPATCH(GetTexGenxvOES, (coord, pname, params), (F, "glGetTexGenxvOES(0x%x, 0x%x, %p);\n", coord, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1212)(GLenum coord, GLenum pname, GLint param); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1215)(GLenum coord, GLenum pname, GLint param); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1212)(GLenum coord, GLenum pname, GLint param) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1215)(GLenum coord, GLenum pname, GLint param) { (void) coord; (void) pname; (void) param; DISPATCH(TexGenxOES, (coord, pname, param), (F, "glTexGenxOES(0x%x, 0x%x, %d);\n", coord, pname, param)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1213)(GLenum coord, GLenum pname, const GLfixed * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1216)(GLenum coord, GLenum pname, const GLfixed * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1213)(GLenum coord, GLenum pname, const GLfixed * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1216)(GLenum coord, GLenum pname, const GLfixed * params) { (void) coord; (void) pname; (void) params; DISPATCH(TexGenxvOES, (coord, pname, params), (F, "glTexGenxvOES(0x%x, 0x%x, %p);\n", coord, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1214)(GLclampd zmin, GLclampd zmax); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1217)(GLclampd zmin, GLclampd zmax); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1214)(GLclampd zmin, GLclampd zmax) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1217)(GLclampd zmin, GLclampd zmax) { (void) zmin; (void) zmax; DISPATCH(DepthBoundsEXT, (zmin, zmax), (F, "glDepthBoundsEXT(%f, %f);\n", zmin, zmax)); @@ -11060,25 +11199,25 @@ DISPATCH(BindRenderbufferEXT, (target, renderbuffer), (F, "glBindRenderbufferEXT(0x%x, %d);\n", target, renderbuffer)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1217)(GLsizei len, const GLvoid * string); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1220)(GLsizei len, const GLvoid * string); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1217)(GLsizei len, const GLvoid * string) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1220)(GLsizei len, const GLvoid * string) { (void) len; (void) string; DISPATCH(StringMarkerGREMEDY, (len, string), (F, "glStringMarkerGREMEDY(%d, %p);\n", len, (const void *) string)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1218)(GLenum target, GLenum pname, GLint param); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1221)(GLenum target, GLenum pname, GLint param); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1218)(GLenum target, GLenum pname, GLint param) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1221)(GLenum target, GLenum pname, GLint param) { (void) target; (void) pname; (void) param; DISPATCH(BufferParameteriAPPLE, (target, pname, param), (F, "glBufferParameteriAPPLE(0x%x, 0x%x, %d);\n", target, pname, param)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1219)(GLenum target, GLintptr offset, GLsizeiptr size); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1222)(GLenum target, GLintptr offset, GLsizeiptr size); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1219)(GLenum target, GLintptr offset, GLsizeiptr size) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1222)(GLenum target, GLintptr offset, GLsizeiptr size) { (void) target; (void) offset; (void) size; DISPATCH(FlushMappedBufferRangeAPPLE, (target, offset, size), (F, "glFlushMappedBufferRangeAPPLE(0x%x, %d, %d);\n", target, offset, size)); @@ -11264,145 +11403,145 @@ DISPATCH(ClearColorIuiEXT, (r, g, b, a), (F, "glClearColorIuiEXT(%d, %d, %d, %d);\n", r, g, b, a)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1236)(GLenum target, GLuint index, GLuint buffer, GLintptr offset); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1239)(GLenum target, GLuint index, GLuint buffer, GLintptr offset); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1236)(GLenum target, GLuint index, GLuint buffer, GLintptr offset) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1239)(GLenum target, GLuint index, GLuint buffer, GLintptr offset) { (void) target; (void) index; (void) buffer; (void) offset; DISPATCH(BindBufferOffsetEXT, (target, index, buffer, offset), (F, "glBindBufferOffsetEXT(0x%x, %d, %d, %d);\n", target, index, buffer, offset)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1237)(GLuint monitor); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1240)(GLuint monitor); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1237)(GLuint monitor) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1240)(GLuint monitor) { (void) monitor; DISPATCH(BeginPerfMonitorAMD, (monitor), (F, "glBeginPerfMonitorAMD(%d);\n", monitor)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1238)(GLsizei n, GLuint * monitors); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1241)(GLsizei n, GLuint * monitors); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1238)(GLsizei n, GLuint * monitors) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1241)(GLsizei n, GLuint * monitors) { (void) n; (void) monitors; DISPATCH(DeletePerfMonitorsAMD, (n, monitors), (F, "glDeletePerfMonitorsAMD(%d, %p);\n", n, (const void *) monitors)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1239)(GLuint monitor); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1242)(GLuint monitor); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1239)(GLuint monitor) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1242)(GLuint monitor) { (void) monitor; DISPATCH(EndPerfMonitorAMD, (monitor), (F, "glEndPerfMonitorAMD(%d);\n", monitor)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1240)(GLsizei n, GLuint * monitors); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1243)(GLsizei n, GLuint * monitors); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1240)(GLsizei n, GLuint * monitors) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1243)(GLsizei n, GLuint * monitors) { (void) n; (void) monitors; DISPATCH(GenPerfMonitorsAMD, (n, monitors), (F, "glGenPerfMonitorsAMD(%d, %p);\n", n, (const void *) monitors)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1241)(GLuint monitor, GLenum pname, GLsizei dataSize, GLuint * data, GLint * bytesWritten); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1244)(GLuint monitor, GLenum pname, GLsizei dataSize, GLuint * data, GLint * bytesWritten); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1241)(GLuint monitor, GLenum pname, GLsizei dataSize, GLuint * data, GLint * bytesWritten) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1244)(GLuint monitor, GLenum pname, GLsizei dataSize, GLuint * data, GLint * bytesWritten) { (void) monitor; (void) pname; (void) dataSize; (void) data; (void) bytesWritten; DISPATCH(GetPerfMonitorCounterDataAMD, (monitor, pname, dataSize, data, bytesWritten), (F, "glGetPerfMonitorCounterDataAMD(%d, 0x%x, %d, %p, %p);\n", monitor, pname, dataSize, (const void *) data, (const void *) bytesWritten)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1242)(GLuint group, GLuint counter, GLenum pname, GLvoid * data); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1245)(GLuint group, GLuint counter, GLenum pname, GLvoid * data); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1242)(GLuint group, GLuint counter, GLenum pname, GLvoid * data) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1245)(GLuint group, GLuint counter, GLenum pname, GLvoid * data) { (void) group; (void) counter; (void) pname; (void) data; DISPATCH(GetPerfMonitorCounterInfoAMD, (group, counter, pname, data), (F, "glGetPerfMonitorCounterInfoAMD(%d, %d, 0x%x, %p);\n", group, counter, pname, (const void *) data)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1243)(GLuint group, GLuint counter, GLsizei bufSize, GLsizei * length, GLchar * counterString); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1246)(GLuint group, GLuint counter, GLsizei bufSize, GLsizei * length, GLchar * counterString); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1243)(GLuint group, GLuint counter, GLsizei bufSize, GLsizei * length, GLchar * counterString) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1246)(GLuint group, GLuint counter, GLsizei bufSize, GLsizei * length, GLchar * counterString) { (void) group; (void) counter; (void) bufSize; (void) length; (void) counterString; DISPATCH(GetPerfMonitorCounterStringAMD, (group, counter, bufSize, length, counterString), (F, "glGetPerfMonitorCounterStringAMD(%d, %d, %d, %p, %p);\n", group, counter, bufSize, (const void *) length, (const void *) counterString)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1244)(GLuint group, GLint * numCounters, GLint * maxActiveCounters, GLsizei countersSize, GLuint * counters); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1247)(GLuint group, GLint * numCounters, GLint * maxActiveCounters, GLsizei countersSize, GLuint * counters); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1244)(GLuint group, GLint * numCounters, GLint * maxActiveCounters, GLsizei countersSize, GLuint * counters) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1247)(GLuint group, GLint * numCounters, GLint * maxActiveCounters, GLsizei countersSize, GLuint * counters) { (void) group; (void) numCounters; (void) maxActiveCounters; (void) countersSize; (void) counters; DISPATCH(GetPerfMonitorCountersAMD, (group, numCounters, maxActiveCounters, countersSize, counters), (F, "glGetPerfMonitorCountersAMD(%d, %p, %p, %d, %p);\n", group, (const void *) numCounters, (const void *) maxActiveCounters, countersSize, (const void *) counters)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1245)(GLuint group, GLsizei bufSize, GLsizei * length, GLchar * groupString); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1248)(GLuint group, GLsizei bufSize, GLsizei * length, GLchar * groupString); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1245)(GLuint group, GLsizei bufSize, GLsizei * length, GLchar * groupString) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1248)(GLuint group, GLsizei bufSize, GLsizei * length, GLchar * groupString) { (void) group; (void) bufSize; (void) length; (void) groupString; DISPATCH(GetPerfMonitorGroupStringAMD, (group, bufSize, length, groupString), (F, "glGetPerfMonitorGroupStringAMD(%d, %d, %p, %p);\n", group, bufSize, (const void *) length, (const void *) groupString)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1246)(GLint * numGroups, GLsizei groupsSize, GLuint * groups); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1249)(GLint * numGroups, GLsizei groupsSize, GLuint * groups); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1246)(GLint * numGroups, GLsizei groupsSize, GLuint * groups) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1249)(GLint * numGroups, GLsizei groupsSize, GLuint * groups) { (void) numGroups; (void) groupsSize; (void) groups; DISPATCH(GetPerfMonitorGroupsAMD, (numGroups, groupsSize, groups), (F, "glGetPerfMonitorGroupsAMD(%p, %d, %p);\n", (const void *) numGroups, groupsSize, (const void *) groups)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1247)(GLuint monitor, GLboolean enable, GLuint group, GLint numCounters, GLuint * counterList); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1250)(GLuint monitor, GLboolean enable, GLuint group, GLint numCounters, GLuint * counterList); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1247)(GLuint monitor, GLboolean enable, GLuint group, GLint numCounters, GLuint * counterList) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1250)(GLuint monitor, GLboolean enable, GLuint group, GLint numCounters, GLuint * counterList) { (void) monitor; (void) enable; (void) group; (void) numCounters; (void) counterList; DISPATCH(SelectPerfMonitorCountersAMD, (monitor, enable, group, numCounters, counterList), (F, "glSelectPerfMonitorCountersAMD(%d, %d, %d, %d, %p);\n", monitor, enable, group, numCounters, (const void *) counterList)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1248)(GLenum objectType, GLuint name, GLenum pname, GLint * value); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1251)(GLenum objectType, GLuint name, GLenum pname, GLint * value); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1248)(GLenum objectType, GLuint name, GLenum pname, GLint * value) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1251)(GLenum objectType, GLuint name, GLenum pname, GLint * value) { (void) objectType; (void) name; (void) pname; (void) value; DISPATCH(GetObjectParameterivAPPLE, (objectType, name, pname, value), (F, "glGetObjectParameterivAPPLE(0x%x, %d, 0x%x, %p);\n", objectType, name, pname, (const void *) value)); } -KEYWORD1_ALT GLenum KEYWORD2 NAME(_dispatch_stub_1249)(GLenum objectType, GLuint name, GLenum option); +KEYWORD1_ALT GLenum KEYWORD2 NAME(_dispatch_stub_1252)(GLenum objectType, GLuint name, GLenum option); -KEYWORD1_ALT GLenum KEYWORD2 NAME(_dispatch_stub_1249)(GLenum objectType, GLuint name, GLenum option) +KEYWORD1_ALT GLenum KEYWORD2 NAME(_dispatch_stub_1252)(GLenum objectType, GLuint name, GLenum option) { (void) objectType; (void) name; (void) option; RETURN_DISPATCH(ObjectPurgeableAPPLE, (objectType, name, option), (F, "glObjectPurgeableAPPLE(0x%x, %d, 0x%x);\n", objectType, name, option)); } -KEYWORD1_ALT GLenum KEYWORD2 NAME(_dispatch_stub_1250)(GLenum objectType, GLuint name, GLenum option); +KEYWORD1_ALT GLenum KEYWORD2 NAME(_dispatch_stub_1253)(GLenum objectType, GLuint name, GLenum option); -KEYWORD1_ALT GLenum KEYWORD2 NAME(_dispatch_stub_1250)(GLenum objectType, GLuint name, GLenum option) +KEYWORD1_ALT GLenum KEYWORD2 NAME(_dispatch_stub_1253)(GLenum objectType, GLuint name, GLenum option) { (void) objectType; (void) name; (void) option; RETURN_DISPATCH(ObjectUnpurgeableAPPLE, (objectType, name, option), (F, "glObjectUnpurgeableAPPLE(0x%x, %d, 0x%x);\n", objectType, name, option)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1251)(GLuint program); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1254)(GLuint program); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1251)(GLuint program) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1254)(GLuint program) { (void) program; DISPATCH(ActiveProgramEXT, (program), (F, "glActiveProgramEXT(%d);\n", program)); } -KEYWORD1_ALT GLuint KEYWORD2 NAME(_dispatch_stub_1252)(GLenum type, const GLchar * string); +KEYWORD1_ALT GLuint KEYWORD2 NAME(_dispatch_stub_1255)(GLenum type, const GLchar * string); -KEYWORD1_ALT GLuint KEYWORD2 NAME(_dispatch_stub_1252)(GLenum type, const GLchar * string) +KEYWORD1_ALT GLuint KEYWORD2 NAME(_dispatch_stub_1255)(GLenum type, const GLchar * string) { (void) type; (void) string; RETURN_DISPATCH(CreateShaderProgramEXT, (type, string), (F, "glCreateShaderProgramEXT(0x%x, %p);\n", type, (const void *) string)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1253)(GLenum type, GLuint program); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1256)(GLenum type, GLuint program); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1253)(GLenum type, GLuint program) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1256)(GLenum type, GLuint program) { (void) type; (void) program; DISPATCH(UseShaderProgramEXT, (type, program), (F, "glUseShaderProgramEXT(0x%x, %d);\n", type, program)); @@ -11413,215 +11552,223 @@ DISPATCH(TextureBarrierNV, (), (F, "glTextureBarrierNV();\n")); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1254)(void); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1257)(void); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1254)(void) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1257)(void) { DISPATCH(TextureBarrierNV, (), (F, "glTextureBarrier();\n")); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1255)(void); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1258)(void); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1255)(void) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1258)(void) { DISPATCH(VDPAUFiniNV, (), (F, "glVDPAUFiniNV();\n")); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1256)(GLintptr surface, GLenum pname, GLsizei bufSize, GLsizei * length, GLint * values); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1259)(GLintptr surface, GLenum pname, GLsizei bufSize, GLsizei * length, GLint * values); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1256)(GLintptr surface, GLenum pname, GLsizei bufSize, GLsizei * length, GLint * values) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1259)(GLintptr surface, GLenum pname, GLsizei bufSize, GLsizei * length, GLint * values) { (void) surface; (void) pname; (void) bufSize; (void) length; (void) values; DISPATCH(VDPAUGetSurfaceivNV, (surface, pname, bufSize, length, values), (F, "glVDPAUGetSurfaceivNV(%d, 0x%x, %d, %p, %p);\n", surface, pname, bufSize, (const void *) length, (const void *) values)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1257)(const GLvoid * vdpDevice, const GLvoid * getProcAddress); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1260)(const GLvoid * vdpDevice, const GLvoid * getProcAddress); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1257)(const GLvoid * vdpDevice, const GLvoid * getProcAddress) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1260)(const GLvoid * vdpDevice, const GLvoid * getProcAddress) { (void) vdpDevice; (void) getProcAddress; DISPATCH(VDPAUInitNV, (vdpDevice, getProcAddress), (F, "glVDPAUInitNV(%p, %p);\n", (const void *) vdpDevice, (const void *) getProcAddress)); } -KEYWORD1_ALT GLboolean KEYWORD2 NAME(_dispatch_stub_1258)(GLintptr surface); +KEYWORD1_ALT GLboolean KEYWORD2 NAME(_dispatch_stub_1261)(GLintptr surface); -KEYWORD1_ALT GLboolean KEYWORD2 NAME(_dispatch_stub_1258)(GLintptr surface) +KEYWORD1_ALT GLboolean KEYWORD2 NAME(_dispatch_stub_1261)(GLintptr surface) { (void) surface; RETURN_DISPATCH(VDPAUIsSurfaceNV, (surface), (F, "glVDPAUIsSurfaceNV(%d);\n", surface)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1259)(GLsizei numSurfaces, const GLintptr * surfaces); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1262)(GLsizei numSurfaces, const GLintptr * surfaces); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1259)(GLsizei numSurfaces, const GLintptr * surfaces) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1262)(GLsizei numSurfaces, const GLintptr * surfaces) { (void) numSurfaces; (void) surfaces; DISPATCH(VDPAUMapSurfacesNV, (numSurfaces, surfaces), (F, "glVDPAUMapSurfacesNV(%d, %p);\n", numSurfaces, (const void *) surfaces)); } -KEYWORD1_ALT GLintptr KEYWORD2 NAME(_dispatch_stub_1260)(const GLvoid * vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint * textureNames); +KEYWORD1_ALT GLintptr KEYWORD2 NAME(_dispatch_stub_1263)(const GLvoid * vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint * textureNames); -KEYWORD1_ALT GLintptr KEYWORD2 NAME(_dispatch_stub_1260)(const GLvoid * vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint * textureNames) +KEYWORD1_ALT GLintptr KEYWORD2 NAME(_dispatch_stub_1263)(const GLvoid * vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint * textureNames) { (void) vdpSurface; (void) target; (void) numTextureNames; (void) textureNames; RETURN_DISPATCH(VDPAURegisterOutputSurfaceNV, (vdpSurface, target, numTextureNames, textureNames), (F, "glVDPAURegisterOutputSurfaceNV(%p, 0x%x, %d, %p);\n", (const void *) vdpSurface, target, numTextureNames, (const void *) textureNames)); } -KEYWORD1_ALT GLintptr KEYWORD2 NAME(_dispatch_stub_1261)(const GLvoid * vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint * textureNames); +KEYWORD1_ALT GLintptr KEYWORD2 NAME(_dispatch_stub_1264)(const GLvoid * vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint * textureNames); -KEYWORD1_ALT GLintptr KEYWORD2 NAME(_dispatch_stub_1261)(const GLvoid * vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint * textureNames) +KEYWORD1_ALT GLintptr KEYWORD2 NAME(_dispatch_stub_1264)(const GLvoid * vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint * textureNames) { (void) vdpSurface; (void) target; (void) numTextureNames; (void) textureNames; RETURN_DISPATCH(VDPAURegisterVideoSurfaceNV, (vdpSurface, target, numTextureNames, textureNames), (F, "glVDPAURegisterVideoSurfaceNV(%p, 0x%x, %d, %p);\n", (const void *) vdpSurface, target, numTextureNames, (const void *) textureNames)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1262)(GLintptr surface, GLenum access); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1265)(GLintptr surface, GLenum access); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1262)(GLintptr surface, GLenum access) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1265)(GLintptr surface, GLenum access) { (void) surface; (void) access; DISPATCH(VDPAUSurfaceAccessNV, (surface, access), (F, "glVDPAUSurfaceAccessNV(%d, 0x%x);\n", surface, access)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1263)(GLsizei numSurfaces, const GLintptr * surfaces); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1266)(GLsizei numSurfaces, const GLintptr * surfaces); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1263)(GLsizei numSurfaces, const GLintptr * surfaces) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1266)(GLsizei numSurfaces, const GLintptr * surfaces) { (void) numSurfaces; (void) surfaces; DISPATCH(VDPAUUnmapSurfacesNV, (numSurfaces, surfaces), (F, "glVDPAUUnmapSurfacesNV(%d, %p);\n", numSurfaces, (const void *) surfaces)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1264)(GLintptr surface); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1267)(GLintptr surface); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1264)(GLintptr surface) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1267)(GLintptr surface) { (void) surface; DISPATCH(VDPAUUnregisterSurfaceNV, (surface), (F, "glVDPAUUnregisterSurfaceNV(%d);\n", surface)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1265)(GLuint queryHandle); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1268)(GLuint queryHandle); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1265)(GLuint queryHandle) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1268)(GLuint queryHandle) { (void) queryHandle; DISPATCH(BeginPerfQueryINTEL, (queryHandle), (F, "glBeginPerfQueryINTEL(%d);\n", queryHandle)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1266)(GLuint queryId, GLuint * queryHandle); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1269)(GLuint queryId, GLuint * queryHandle); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1266)(GLuint queryId, GLuint * queryHandle) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1269)(GLuint queryId, GLuint * queryHandle) { (void) queryId; (void) queryHandle; DISPATCH(CreatePerfQueryINTEL, (queryId, queryHandle), (F, "glCreatePerfQueryINTEL(%d, %p);\n", queryId, (const void *) queryHandle)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1267)(GLuint queryHandle); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1270)(GLuint queryHandle); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1267)(GLuint queryHandle) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1270)(GLuint queryHandle) { (void) queryHandle; DISPATCH(DeletePerfQueryINTEL, (queryHandle), (F, "glDeletePerfQueryINTEL(%d);\n", queryHandle)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1268)(GLuint queryHandle); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1271)(GLuint queryHandle); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1268)(GLuint queryHandle) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1271)(GLuint queryHandle) { (void) queryHandle; DISPATCH(EndPerfQueryINTEL, (queryHandle), (F, "glEndPerfQueryINTEL(%d);\n", queryHandle)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1269)(GLuint * queryId); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1272)(GLuint * queryId); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1269)(GLuint * queryId) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1272)(GLuint * queryId) { (void) queryId; DISPATCH(GetFirstPerfQueryIdINTEL, (queryId), (F, "glGetFirstPerfQueryIdINTEL(%p);\n", (const void *) queryId)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1270)(GLuint queryId, GLuint * nextQueryId); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1273)(GLuint queryId, GLuint * nextQueryId); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1270)(GLuint queryId, GLuint * nextQueryId) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1273)(GLuint queryId, GLuint * nextQueryId) { (void) queryId; (void) nextQueryId; DISPATCH(GetNextPerfQueryIdINTEL, (queryId, nextQueryId), (F, "glGetNextPerfQueryIdINTEL(%d, %p);\n", queryId, (const void *) nextQueryId)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1271)(GLuint queryId, GLuint counterId, GLuint counterNameLength, GLchar * counterName, GLuint counterDescLength, GLchar * counterDesc, GLuint * counterOffset, GLuint * counterDataSize, GLuint * counterTypeEnum, GLuint * counterDataTypeEnum, GLuint64 * rawCounterMaxValue); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1274)(GLuint queryId, GLuint counterId, GLuint counterNameLength, GLchar * counterName, GLuint counterDescLength, GLchar * counterDesc, GLuint * counterOffset, GLuint * counterDataSize, GLuint * counterTypeEnum, GLuint * counterDataTypeEnum, GLuint64 * rawCounterMaxValue); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1271)(GLuint queryId, GLuint counterId, GLuint counterNameLength, GLchar * counterName, GLuint counterDescLength, GLchar * counterDesc, GLuint * counterOffset, GLuint * counterDataSize, GLuint * counterTypeEnum, GLuint * counterDataTypeEnum, GLuint64 * rawCounterMaxValue) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1274)(GLuint queryId, GLuint counterId, GLuint counterNameLength, GLchar * counterName, GLuint counterDescLength, GLchar * counterDesc, GLuint * counterOffset, GLuint * counterDataSize, GLuint * counterTypeEnum, GLuint * counterDataTypeEnum, GLuint64 * rawCounterMaxValue) { (void) queryId; (void) counterId; (void) counterNameLength; (void) counterName; (void) counterDescLength; (void) counterDesc; (void) counterOffset; (void) counterDataSize; (void) counterTypeEnum; (void) counterDataTypeEnum; (void) rawCounterMaxValue; DISPATCH(GetPerfCounterInfoINTEL, (queryId, counterId, counterNameLength, counterName, counterDescLength, counterDesc, counterOffset, counterDataSize, counterTypeEnum, counterDataTypeEnum, rawCounterMaxValue), (F, "glGetPerfCounterInfoINTEL(%d, %d, %d, %p, %d, %p, %p, %p, %p, %p, %p);\n", queryId, counterId, counterNameLength, (const void *) counterName, counterDescLength, (const void *) counterDesc, (const void *) counterOffset, (const void *) counterDataSize, (const void *) counterTypeEnum, (const void *) counterDataTypeEnum, (const void *) rawCounterMaxValue)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1272)(GLuint queryHandle, GLuint flags, GLsizei dataSize, GLvoid * data, GLuint * bytesWritten); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1275)(GLuint queryHandle, GLuint flags, GLsizei dataSize, GLvoid * data, GLuint * bytesWritten); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1272)(GLuint queryHandle, GLuint flags, GLsizei dataSize, GLvoid * data, GLuint * bytesWritten) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1275)(GLuint queryHandle, GLuint flags, GLsizei dataSize, GLvoid * data, GLuint * bytesWritten) { (void) queryHandle; (void) flags; (void) dataSize; (void) data; (void) bytesWritten; DISPATCH(GetPerfQueryDataINTEL, (queryHandle, flags, dataSize, data, bytesWritten), (F, "glGetPerfQueryDataINTEL(%d, %d, %d, %p, %p);\n", queryHandle, flags, dataSize, (const void *) data, (const void *) bytesWritten)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1273)(GLchar * queryName, GLuint * queryId); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1276)(GLchar * queryName, GLuint * queryId); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1273)(GLchar * queryName, GLuint * queryId) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1276)(GLchar * queryName, GLuint * queryId) { (void) queryName; (void) queryId; DISPATCH(GetPerfQueryIdByNameINTEL, (queryName, queryId), (F, "glGetPerfQueryIdByNameINTEL(%p, %p);\n", (const void *) queryName, (const void *) queryId)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1274)(GLuint queryId, GLuint queryNameLength, GLchar * queryName, GLuint * dataSize, GLuint * noCounters, GLuint * noInstances, GLuint * capsMask); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1277)(GLuint queryId, GLuint queryNameLength, GLchar * queryName, GLuint * dataSize, GLuint * noCounters, GLuint * noInstances, GLuint * capsMask); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1274)(GLuint queryId, GLuint queryNameLength, GLchar * queryName, GLuint * dataSize, GLuint * noCounters, GLuint * noInstances, GLuint * capsMask) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1277)(GLuint queryId, GLuint queryNameLength, GLchar * queryName, GLuint * dataSize, GLuint * noCounters, GLuint * noInstances, GLuint * capsMask) { (void) queryId; (void) queryNameLength; (void) queryName; (void) dataSize; (void) noCounters; (void) noInstances; (void) capsMask; DISPATCH(GetPerfQueryInfoINTEL, (queryId, queryNameLength, queryName, dataSize, noCounters, noInstances, capsMask), (F, "glGetPerfQueryInfoINTEL(%d, %d, %p, %p, %p, %p, %p);\n", queryId, queryNameLength, (const void *) queryName, (const void *) dataSize, (const void *) noCounters, (const void *) noInstances, (const void *) capsMask)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1275)(GLfloat factor, GLfloat units, GLfloat clamp); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1278)(GLfloat factor, GLfloat units, GLfloat clamp); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1275)(GLfloat factor, GLfloat units, GLfloat clamp) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1278)(GLfloat factor, GLfloat units, GLfloat clamp) { (void) factor; (void) units; (void) clamp; DISPATCH(PolygonOffsetClampEXT, (factor, units, clamp), (F, "glPolygonOffsetClampEXT(%f, %f, %f);\n", factor, units, clamp)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1276)(GLenum frontfunc, GLenum backfunc, GLint ref, GLuint mask); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1279)(GLenum mode, GLsizei count, const GLint * box); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1276)(GLenum frontfunc, GLenum backfunc, GLint ref, GLuint mask) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1279)(GLenum mode, GLsizei count, const GLint * box) +{ + (void) mode; (void) count; (void) box; + DISPATCH(WindowRectanglesEXT, (mode, count, box), (F, "glWindowRectanglesEXT(0x%x, %d, %p);\n", mode, count, (const void *) box)); +} + +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1280)(GLenum frontfunc, GLenum backfunc, GLint ref, GLuint mask); + +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1280)(GLenum frontfunc, GLenum backfunc, GLint ref, GLuint mask) { (void) frontfunc; (void) backfunc; (void) ref; (void) mask; DISPATCH(StencilFuncSeparateATI, (frontfunc, backfunc, ref, mask), (F, "glStencilFuncSeparateATI(0x%x, 0x%x, %d, %d);\n", frontfunc, backfunc, ref, mask)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1277)(GLenum target, GLuint index, GLsizei count, const GLfloat * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1281)(GLenum target, GLuint index, GLsizei count, const GLfloat * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1277)(GLenum target, GLuint index, GLsizei count, const GLfloat * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1281)(GLenum target, GLuint index, GLsizei count, const GLfloat * params) { (void) target; (void) index; (void) count; (void) params; DISPATCH(ProgramEnvParameters4fvEXT, (target, index, count, params), (F, "glProgramEnvParameters4fvEXT(0x%x, %d, %d, %p);\n", target, index, count, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1278)(GLenum target, GLuint index, GLsizei count, const GLfloat * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1282)(GLenum target, GLuint index, GLsizei count, const GLfloat * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1278)(GLenum target, GLuint index, GLsizei count, const GLfloat * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1282)(GLenum target, GLuint index, GLsizei count, const GLfloat * params) { (void) target; (void) index; (void) count; (void) params; DISPATCH(ProgramLocalParameters4fvEXT, (target, index, count, params), (F, "glProgramLocalParameters4fvEXT(0x%x, %d, %d, %p);\n", target, index, count, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1279)(GLenum target, GLvoid * writeOffset); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1283)(GLenum target, GLvoid * writeOffset); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1279)(GLenum target, GLvoid * writeOffset) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1283)(GLenum target, GLvoid * writeOffset) { (void) target; (void) writeOffset; DISPATCH(EGLImageTargetRenderbufferStorageOES, (target, writeOffset), (F, "glEGLImageTargetRenderbufferStorageOES(0x%x, %p);\n", target, (const void *) writeOffset)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1280)(GLenum target, GLvoid * writeOffset); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1284)(GLenum target, GLvoid * writeOffset); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1280)(GLenum target, GLvoid * writeOffset) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1284)(GLenum target, GLvoid * writeOffset) { (void) target; (void) writeOffset; DISPATCH(EGLImageTargetTexture2DOES, (target, writeOffset), (F, "glEGLImageTargetTexture2DOES(0x%x, %p);\n", target, (const void *) writeOffset)); @@ -11633,9 +11780,9 @@ DISPATCH(AlphaFuncx, (func, ref), (F, "glAlphaFuncx(0x%x, %d);\n", func, ref)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1281)(GLenum func, GLclampx ref); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1285)(GLenum func, GLclampx ref); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1281)(GLenum func, GLclampx ref) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1285)(GLenum func, GLclampx ref) { (void) func; (void) ref; DISPATCH(AlphaFuncx, (func, ref), (F, "glAlphaFuncxOES(0x%x, %d);\n", func, ref)); @@ -11647,9 +11794,9 @@ DISPATCH(ClearColorx, (red, green, blue, alpha), (F, "glClearColorx(%d, %d, %d, %d);\n", red, green, blue, alpha)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1282)(GLclampx red, GLclampx green, GLclampx blue, GLclampx alpha); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1286)(GLclampx red, GLclampx green, GLclampx blue, GLclampx alpha); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1282)(GLclampx red, GLclampx green, GLclampx blue, GLclampx alpha) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1286)(GLclampx red, GLclampx green, GLclampx blue, GLclampx alpha) { (void) red; (void) green; (void) blue; (void) alpha; DISPATCH(ClearColorx, (red, green, blue, alpha), (F, "glClearColorxOES(%d, %d, %d, %d);\n", red, green, blue, alpha)); @@ -11661,9 +11808,9 @@ DISPATCH(ClearDepthx, (depth), (F, "glClearDepthx(%d);\n", depth)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1283)(GLclampx depth); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1287)(GLclampx depth); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1283)(GLclampx depth) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1287)(GLclampx depth) { (void) depth; DISPATCH(ClearDepthx, (depth), (F, "glClearDepthxOES(%d);\n", depth)); @@ -11675,9 +11822,9 @@ DISPATCH(Color4x, (red, green, blue, alpha), (F, "glColor4x(%d, %d, %d, %d);\n", red, green, blue, alpha)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1284)(GLfixed red, GLfixed green, GLfixed blue, GLfixed alpha); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1288)(GLfixed red, GLfixed green, GLfixed blue, GLfixed alpha); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1284)(GLfixed red, GLfixed green, GLfixed blue, GLfixed alpha) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1288)(GLfixed red, GLfixed green, GLfixed blue, GLfixed alpha) { (void) red; (void) green; (void) blue; (void) alpha; DISPATCH(Color4x, (red, green, blue, alpha), (F, "glColor4xOES(%d, %d, %d, %d);\n", red, green, blue, alpha)); @@ -11689,9 +11836,9 @@ DISPATCH(DepthRangex, (zNear, zFar), (F, "glDepthRangex(%d, %d);\n", zNear, zFar)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1285)(GLclampx zNear, GLclampx zFar); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1289)(GLclampx zNear, GLclampx zFar); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1285)(GLclampx zNear, GLclampx zFar) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1289)(GLclampx zNear, GLclampx zFar) { (void) zNear; (void) zFar; DISPATCH(DepthRangex, (zNear, zFar), (F, "glDepthRangexOES(%d, %d);\n", zNear, zFar)); @@ -11703,9 +11850,9 @@ DISPATCH(Fogx, (pname, param), (F, "glFogx(0x%x, %d);\n", pname, param)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1286)(GLenum pname, GLfixed param); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1290)(GLenum pname, GLfixed param); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1286)(GLenum pname, GLfixed param) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1290)(GLenum pname, GLfixed param) { (void) pname; (void) param; DISPATCH(Fogx, (pname, param), (F, "glFogxOES(0x%x, %d);\n", pname, param)); @@ -11717,9 +11864,9 @@ DISPATCH(Fogxv, (pname, params), (F, "glFogxv(0x%x, %p);\n", pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1287)(GLenum pname, const GLfixed * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1291)(GLenum pname, const GLfixed * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1287)(GLenum pname, const GLfixed * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1291)(GLenum pname, const GLfixed * params) { (void) pname; (void) params; DISPATCH(Fogxv, (pname, params), (F, "glFogxvOES(0x%x, %p);\n", pname, (const void *) params)); @@ -11731,9 +11878,9 @@ DISPATCH(Frustumf, (left, right, bottom, top, zNear, zFar), (F, "glFrustumf(%f, %f, %f, %f, %f, %f);\n", left, right, bottom, top, zNear, zFar)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1288)(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1292)(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1288)(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1292)(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar) { (void) left; (void) right; (void) bottom; (void) top; (void) zNear; (void) zFar; DISPATCH(Frustumf, (left, right, bottom, top, zNear, zFar), (F, "glFrustumfOES(%f, %f, %f, %f, %f, %f);\n", left, right, bottom, top, zNear, zFar)); @@ -11745,9 +11892,9 @@ DISPATCH(Frustumx, (left, right, bottom, top, zNear, zFar), (F, "glFrustumx(%d, %d, %d, %d, %d, %d);\n", left, right, bottom, top, zNear, zFar)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1289)(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1293)(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1289)(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1293)(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar) { (void) left; (void) right; (void) bottom; (void) top; (void) zNear; (void) zFar; DISPATCH(Frustumx, (left, right, bottom, top, zNear, zFar), (F, "glFrustumxOES(%d, %d, %d, %d, %d, %d);\n", left, right, bottom, top, zNear, zFar)); @@ -11759,9 +11906,9 @@ DISPATCH(LightModelx, (pname, param), (F, "glLightModelx(0x%x, %d);\n", pname, param)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1290)(GLenum pname, GLfixed param); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1294)(GLenum pname, GLfixed param); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1290)(GLenum pname, GLfixed param) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1294)(GLenum pname, GLfixed param) { (void) pname; (void) param; DISPATCH(LightModelx, (pname, param), (F, "glLightModelxOES(0x%x, %d);\n", pname, param)); @@ -11773,9 +11920,9 @@ DISPATCH(LightModelxv, (pname, params), (F, "glLightModelxv(0x%x, %p);\n", pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1291)(GLenum pname, const GLfixed * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1295)(GLenum pname, const GLfixed * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1291)(GLenum pname, const GLfixed * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1295)(GLenum pname, const GLfixed * params) { (void) pname; (void) params; DISPATCH(LightModelxv, (pname, params), (F, "glLightModelxvOES(0x%x, %p);\n", pname, (const void *) params)); @@ -11787,9 +11934,9 @@ DISPATCH(Lightx, (light, pname, param), (F, "glLightx(0x%x, 0x%x, %d);\n", light, pname, param)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1292)(GLenum light, GLenum pname, GLfixed param); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1296)(GLenum light, GLenum pname, GLfixed param); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1292)(GLenum light, GLenum pname, GLfixed param) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1296)(GLenum light, GLenum pname, GLfixed param) { (void) light; (void) pname; (void) param; DISPATCH(Lightx, (light, pname, param), (F, "glLightxOES(0x%x, 0x%x, %d);\n", light, pname, param)); @@ -11801,9 +11948,9 @@ DISPATCH(Lightxv, (light, pname, params), (F, "glLightxv(0x%x, 0x%x, %p);\n", light, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1293)(GLenum light, GLenum pname, const GLfixed * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1297)(GLenum light, GLenum pname, const GLfixed * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1293)(GLenum light, GLenum pname, const GLfixed * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1297)(GLenum light, GLenum pname, const GLfixed * params) { (void) light; (void) pname; (void) params; DISPATCH(Lightxv, (light, pname, params), (F, "glLightxvOES(0x%x, 0x%x, %p);\n", light, pname, (const void *) params)); @@ -11815,9 +11962,9 @@ DISPATCH(LineWidthx, (width), (F, "glLineWidthx(%d);\n", width)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1294)(GLfixed width); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1298)(GLfixed width); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1294)(GLfixed width) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1298)(GLfixed width) { (void) width; DISPATCH(LineWidthx, (width), (F, "glLineWidthxOES(%d);\n", width)); @@ -11829,9 +11976,9 @@ DISPATCH(LoadMatrixx, (m), (F, "glLoadMatrixx(%p);\n", (const void *) m)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1295)(const GLfixed * m); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1299)(const GLfixed * m); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1295)(const GLfixed * m) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1299)(const GLfixed * m) { (void) m; DISPATCH(LoadMatrixx, (m), (F, "glLoadMatrixxOES(%p);\n", (const void *) m)); @@ -11843,9 +11990,9 @@ DISPATCH(Materialx, (face, pname, param), (F, "glMaterialx(0x%x, 0x%x, %d);\n", face, pname, param)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1296)(GLenum face, GLenum pname, GLfixed param); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1300)(GLenum face, GLenum pname, GLfixed param); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1296)(GLenum face, GLenum pname, GLfixed param) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1300)(GLenum face, GLenum pname, GLfixed param) { (void) face; (void) pname; (void) param; DISPATCH(Materialx, (face, pname, param), (F, "glMaterialxOES(0x%x, 0x%x, %d);\n", face, pname, param)); @@ -11857,9 +12004,9 @@ DISPATCH(Materialxv, (face, pname, params), (F, "glMaterialxv(0x%x, 0x%x, %p);\n", face, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1297)(GLenum face, GLenum pname, const GLfixed * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1301)(GLenum face, GLenum pname, const GLfixed * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1297)(GLenum face, GLenum pname, const GLfixed * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1301)(GLenum face, GLenum pname, const GLfixed * params) { (void) face; (void) pname; (void) params; DISPATCH(Materialxv, (face, pname, params), (F, "glMaterialxvOES(0x%x, 0x%x, %p);\n", face, pname, (const void *) params)); @@ -11871,9 +12018,9 @@ DISPATCH(MultMatrixx, (m), (F, "glMultMatrixx(%p);\n", (const void *) m)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1298)(const GLfixed * m); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1302)(const GLfixed * m); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1298)(const GLfixed * m) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1302)(const GLfixed * m) { (void) m; DISPATCH(MultMatrixx, (m), (F, "glMultMatrixxOES(%p);\n", (const void *) m)); @@ -11885,9 +12032,9 @@ DISPATCH(MultiTexCoord4x, (target, s, t, r, q), (F, "glMultiTexCoord4x(0x%x, %d, %d, %d, %d);\n", target, s, t, r, q)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1299)(GLenum target, GLfixed s, GLfixed t, GLfixed r, GLfixed q); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1303)(GLenum target, GLfixed s, GLfixed t, GLfixed r, GLfixed q); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1299)(GLenum target, GLfixed s, GLfixed t, GLfixed r, GLfixed q) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1303)(GLenum target, GLfixed s, GLfixed t, GLfixed r, GLfixed q) { (void) target; (void) s; (void) t; (void) r; (void) q; DISPATCH(MultiTexCoord4x, (target, s, t, r, q), (F, "glMultiTexCoord4xOES(0x%x, %d, %d, %d, %d);\n", target, s, t, r, q)); @@ -11899,9 +12046,9 @@ DISPATCH(Normal3x, (nx, ny, nz), (F, "glNormal3x(%d, %d, %d);\n", nx, ny, nz)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1300)(GLfixed nx, GLfixed ny, GLfixed nz); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1304)(GLfixed nx, GLfixed ny, GLfixed nz); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1300)(GLfixed nx, GLfixed ny, GLfixed nz) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1304)(GLfixed nx, GLfixed ny, GLfixed nz) { (void) nx; (void) ny; (void) nz; DISPATCH(Normal3x, (nx, ny, nz), (F, "glNormal3xOES(%d, %d, %d);\n", nx, ny, nz)); @@ -11913,9 +12060,9 @@ DISPATCH(Orthof, (left, right, bottom, top, zNear, zFar), (F, "glOrthof(%f, %f, %f, %f, %f, %f);\n", left, right, bottom, top, zNear, zFar)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1301)(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1305)(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1301)(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1305)(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar) { (void) left; (void) right; (void) bottom; (void) top; (void) zNear; (void) zFar; DISPATCH(Orthof, (left, right, bottom, top, zNear, zFar), (F, "glOrthofOES(%f, %f, %f, %f, %f, %f);\n", left, right, bottom, top, zNear, zFar)); @@ -11927,9 +12074,9 @@ DISPATCH(Orthox, (left, right, bottom, top, zNear, zFar), (F, "glOrthox(%d, %d, %d, %d, %d, %d);\n", left, right, bottom, top, zNear, zFar)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1302)(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1306)(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1302)(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1306)(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar) { (void) left; (void) right; (void) bottom; (void) top; (void) zNear; (void) zFar; DISPATCH(Orthox, (left, right, bottom, top, zNear, zFar), (F, "glOrthoxOES(%d, %d, %d, %d, %d, %d);\n", left, right, bottom, top, zNear, zFar)); @@ -11941,9 +12088,9 @@ DISPATCH(PointSizex, (size), (F, "glPointSizex(%d);\n", size)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1303)(GLfixed size); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1307)(GLfixed size); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1303)(GLfixed size) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1307)(GLfixed size) { (void) size; DISPATCH(PointSizex, (size), (F, "glPointSizexOES(%d);\n", size)); @@ -11955,9 +12102,9 @@ DISPATCH(PolygonOffsetx, (factor, units), (F, "glPolygonOffsetx(%d, %d);\n", factor, units)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1304)(GLfixed factor, GLfixed units); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1308)(GLfixed factor, GLfixed units); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1304)(GLfixed factor, GLfixed units) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1308)(GLfixed factor, GLfixed units) { (void) factor; (void) units; DISPATCH(PolygonOffsetx, (factor, units), (F, "glPolygonOffsetxOES(%d, %d);\n", factor, units)); @@ -11969,9 +12116,9 @@ DISPATCH(Rotatex, (angle, x, y, z), (F, "glRotatex(%d, %d, %d, %d);\n", angle, x, y, z)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1305)(GLfixed angle, GLfixed x, GLfixed y, GLfixed z); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1309)(GLfixed angle, GLfixed x, GLfixed y, GLfixed z); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1305)(GLfixed angle, GLfixed x, GLfixed y, GLfixed z) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1309)(GLfixed angle, GLfixed x, GLfixed y, GLfixed z) { (void) angle; (void) x; (void) y; (void) z; DISPATCH(Rotatex, (angle, x, y, z), (F, "glRotatexOES(%d, %d, %d, %d);\n", angle, x, y, z)); @@ -11983,9 +12130,9 @@ DISPATCH(SampleCoveragex, (value, invert), (F, "glSampleCoveragex(%d, %d);\n", value, invert)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1306)(GLclampx value, GLboolean invert); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1310)(GLclampx value, GLboolean invert); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1306)(GLclampx value, GLboolean invert) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1310)(GLclampx value, GLboolean invert) { (void) value; (void) invert; DISPATCH(SampleCoveragex, (value, invert), (F, "glSampleCoveragexOES(%d, %d);\n", value, invert)); @@ -11997,9 +12144,9 @@ DISPATCH(Scalex, (x, y, z), (F, "glScalex(%d, %d, %d);\n", x, y, z)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1307)(GLfixed x, GLfixed y, GLfixed z); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1311)(GLfixed x, GLfixed y, GLfixed z); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1307)(GLfixed x, GLfixed y, GLfixed z) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1311)(GLfixed x, GLfixed y, GLfixed z) { (void) x; (void) y; (void) z; DISPATCH(Scalex, (x, y, z), (F, "glScalexOES(%d, %d, %d);\n", x, y, z)); @@ -12011,9 +12158,9 @@ DISPATCH(TexEnvx, (target, pname, param), (F, "glTexEnvx(0x%x, 0x%x, %d);\n", target, pname, param)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1308)(GLenum target, GLenum pname, GLfixed param); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1312)(GLenum target, GLenum pname, GLfixed param); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1308)(GLenum target, GLenum pname, GLfixed param) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1312)(GLenum target, GLenum pname, GLfixed param) { (void) target; (void) pname; (void) param; DISPATCH(TexEnvx, (target, pname, param), (F, "glTexEnvxOES(0x%x, 0x%x, %d);\n", target, pname, param)); @@ -12025,9 +12172,9 @@ DISPATCH(TexEnvxv, (target, pname, params), (F, "glTexEnvxv(0x%x, 0x%x, %p);\n", target, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1309)(GLenum target, GLenum pname, const GLfixed * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1313)(GLenum target, GLenum pname, const GLfixed * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1309)(GLenum target, GLenum pname, const GLfixed * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1313)(GLenum target, GLenum pname, const GLfixed * params) { (void) target; (void) pname; (void) params; DISPATCH(TexEnvxv, (target, pname, params), (F, "glTexEnvxvOES(0x%x, 0x%x, %p);\n", target, pname, (const void *) params)); @@ -12039,9 +12186,9 @@ DISPATCH(TexParameterx, (target, pname, param), (F, "glTexParameterx(0x%x, 0x%x, %d);\n", target, pname, param)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1310)(GLenum target, GLenum pname, GLfixed param); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1314)(GLenum target, GLenum pname, GLfixed param); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1310)(GLenum target, GLenum pname, GLfixed param) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1314)(GLenum target, GLenum pname, GLfixed param) { (void) target; (void) pname; (void) param; DISPATCH(TexParameterx, (target, pname, param), (F, "glTexParameterxOES(0x%x, 0x%x, %d);\n", target, pname, param)); @@ -12053,9 +12200,9 @@ DISPATCH(Translatex, (x, y, z), (F, "glTranslatex(%d, %d, %d);\n", x, y, z)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1311)(GLfixed x, GLfixed y, GLfixed z); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1315)(GLfixed x, GLfixed y, GLfixed z); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1311)(GLfixed x, GLfixed y, GLfixed z) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1315)(GLfixed x, GLfixed y, GLfixed z) { (void) x; (void) y; (void) z; DISPATCH(Translatex, (x, y, z), (F, "glTranslatexOES(%d, %d, %d);\n", x, y, z)); @@ -12067,9 +12214,9 @@ DISPATCH(ClipPlanef, (plane, equation), (F, "glClipPlanef(0x%x, %p);\n", plane, (const void *) equation)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1312)(GLenum plane, const GLfloat * equation); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1316)(GLenum plane, const GLfloat * equation); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1312)(GLenum plane, const GLfloat * equation) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1316)(GLenum plane, const GLfloat * equation) { (void) plane; (void) equation; DISPATCH(ClipPlanef, (plane, equation), (F, "glClipPlanefOES(0x%x, %p);\n", plane, (const void *) equation)); @@ -12081,9 +12228,9 @@ DISPATCH(ClipPlanex, (plane, equation), (F, "glClipPlanex(0x%x, %p);\n", plane, (const void *) equation)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1313)(GLenum plane, const GLfixed * equation); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1317)(GLenum plane, const GLfixed * equation); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1313)(GLenum plane, const GLfixed * equation) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1317)(GLenum plane, const GLfixed * equation) { (void) plane; (void) equation; DISPATCH(ClipPlanex, (plane, equation), (F, "glClipPlanexOES(0x%x, %p);\n", plane, (const void *) equation)); @@ -12095,9 +12242,9 @@ DISPATCH(GetClipPlanef, (plane, equation), (F, "glGetClipPlanef(0x%x, %p);\n", plane, (const void *) equation)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1314)(GLenum plane, GLfloat * equation); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1318)(GLenum plane, GLfloat * equation); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1314)(GLenum plane, GLfloat * equation) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1318)(GLenum plane, GLfloat * equation) { (void) plane; (void) equation; DISPATCH(GetClipPlanef, (plane, equation), (F, "glGetClipPlanefOES(0x%x, %p);\n", plane, (const void *) equation)); @@ -12109,9 +12256,9 @@ DISPATCH(GetClipPlanex, (plane, equation), (F, "glGetClipPlanex(0x%x, %p);\n", plane, (const void *) equation)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1315)(GLenum plane, GLfixed * equation); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1319)(GLenum plane, GLfixed * equation); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1315)(GLenum plane, GLfixed * equation) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1319)(GLenum plane, GLfixed * equation) { (void) plane; (void) equation; DISPATCH(GetClipPlanex, (plane, equation), (F, "glGetClipPlanexOES(0x%x, %p);\n", plane, (const void *) equation)); @@ -12123,9 +12270,9 @@ DISPATCH(GetFixedv, (pname, params), (F, "glGetFixedv(0x%x, %p);\n", pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1316)(GLenum pname, GLfixed * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1320)(GLenum pname, GLfixed * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1316)(GLenum pname, GLfixed * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1320)(GLenum pname, GLfixed * params) { (void) pname; (void) params; DISPATCH(GetFixedv, (pname, params), (F, "glGetFixedvOES(0x%x, %p);\n", pname, (const void *) params)); @@ -12137,9 +12284,9 @@ DISPATCH(GetLightxv, (light, pname, params), (F, "glGetLightxv(0x%x, 0x%x, %p);\n", light, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1317)(GLenum light, GLenum pname, GLfixed * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1321)(GLenum light, GLenum pname, GLfixed * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1317)(GLenum light, GLenum pname, GLfixed * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1321)(GLenum light, GLenum pname, GLfixed * params) { (void) light; (void) pname; (void) params; DISPATCH(GetLightxv, (light, pname, params), (F, "glGetLightxvOES(0x%x, 0x%x, %p);\n", light, pname, (const void *) params)); @@ -12151,9 +12298,9 @@ DISPATCH(GetMaterialxv, (face, pname, params), (F, "glGetMaterialxv(0x%x, 0x%x, %p);\n", face, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1318)(GLenum face, GLenum pname, GLfixed * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1322)(GLenum face, GLenum pname, GLfixed * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1318)(GLenum face, GLenum pname, GLfixed * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1322)(GLenum face, GLenum pname, GLfixed * params) { (void) face; (void) pname; (void) params; DISPATCH(GetMaterialxv, (face, pname, params), (F, "glGetMaterialxvOES(0x%x, 0x%x, %p);\n", face, pname, (const void *) params)); @@ -12165,9 +12312,9 @@ DISPATCH(GetTexEnvxv, (target, pname, params), (F, "glGetTexEnvxv(0x%x, 0x%x, %p);\n", target, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1319)(GLenum target, GLenum pname, GLfixed * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1323)(GLenum target, GLenum pname, GLfixed * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1319)(GLenum target, GLenum pname, GLfixed * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1323)(GLenum target, GLenum pname, GLfixed * params) { (void) target; (void) pname; (void) params; DISPATCH(GetTexEnvxv, (target, pname, params), (F, "glGetTexEnvxvOES(0x%x, 0x%x, %p);\n", target, pname, (const void *) params)); @@ -12179,9 +12326,9 @@ DISPATCH(GetTexParameterxv, (target, pname, params), (F, "glGetTexParameterxv(0x%x, 0x%x, %p);\n", target, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1320)(GLenum target, GLenum pname, GLfixed * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1324)(GLenum target, GLenum pname, GLfixed * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1320)(GLenum target, GLenum pname, GLfixed * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1324)(GLenum target, GLenum pname, GLfixed * params) { (void) target; (void) pname; (void) params; DISPATCH(GetTexParameterxv, (target, pname, params), (F, "glGetTexParameterxvOES(0x%x, 0x%x, %p);\n", target, pname, (const void *) params)); @@ -12193,9 +12340,9 @@ DISPATCH(PointParameterx, (pname, param), (F, "glPointParameterx(0x%x, %d);\n", pname, param)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1321)(GLenum pname, GLfixed param); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1325)(GLenum pname, GLfixed param); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1321)(GLenum pname, GLfixed param) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1325)(GLenum pname, GLfixed param) { (void) pname; (void) param; DISPATCH(PointParameterx, (pname, param), (F, "glPointParameterxOES(0x%x, %d);\n", pname, param)); @@ -12207,9 +12354,9 @@ DISPATCH(PointParameterxv, (pname, params), (F, "glPointParameterxv(0x%x, %p);\n", pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1322)(GLenum pname, const GLfixed * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1326)(GLenum pname, const GLfixed * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1322)(GLenum pname, const GLfixed * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1326)(GLenum pname, const GLfixed * params) { (void) pname; (void) params; DISPATCH(PointParameterxv, (pname, params), (F, "glPointParameterxvOES(0x%x, %p);\n", pname, (const void *) params)); @@ -12221,14 +12368,40 @@ DISPATCH(TexParameterxv, (target, pname, params), (F, "glTexParameterxv(0x%x, 0x%x, %p);\n", target, pname, (const void *) params)); } -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1323)(GLenum target, GLenum pname, const GLfixed * params); +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1327)(GLenum target, GLenum pname, const GLfixed * params); -KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1323)(GLenum target, GLenum pname, const GLfixed * params) +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1327)(GLenum target, GLenum pname, const GLfixed * params) { (void) target; (void) pname; (void) params; DISPATCH(TexParameterxv, (target, pname, params), (F, "glTexParameterxvOES(0x%x, 0x%x, %p);\n", target, pname, (const void *) params)); } +KEYWORD1 void KEYWORD2 NAME(BlendBarrier)(void) +{ + DISPATCH(BlendBarrier, (), (F, "glBlendBarrier();\n")); +} + +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1328)(void); + +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1328)(void) +{ + DISPATCH(BlendBarrier, (), (F, "glBlendBarrierKHR();\n")); +} + +KEYWORD1 void KEYWORD2 NAME(PrimitiveBoundingBox)(GLfloat minX, GLfloat minY, GLfloat minZ, GLfloat minW, GLfloat maxX, GLfloat maxY, GLfloat maxZ, GLfloat maxW) +{ + (void) minX; (void) minY; (void) minZ; (void) minW; (void) maxX; (void) maxY; (void) maxZ; (void) maxW; + DISPATCH(PrimitiveBoundingBox, (minX, minY, minZ, minW, maxX, maxY, maxZ, maxW), (F, "glPrimitiveBoundingBox(%f, %f, %f, %f, %f, %f, %f, %f);\n", minX, minY, minZ, minW, maxX, maxY, maxZ, maxW)); +} + +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1329)(GLfloat minX, GLfloat minY, GLfloat minZ, GLfloat minW, GLfloat maxX, GLfloat maxY, GLfloat maxZ, GLfloat maxW); + +KEYWORD1_ALT void KEYWORD2 NAME(_dispatch_stub_1329)(GLfloat minX, GLfloat minY, GLfloat minZ, GLfloat minW, GLfloat maxX, GLfloat maxY, GLfloat maxZ, GLfloat maxW) +{ + (void) minX; (void) minY; (void) minZ; (void) minW; (void) maxX; (void) maxY; (void) maxZ; (void) maxW; + DISPATCH(PrimitiveBoundingBox, (minX, minY, minZ, minW, maxX, maxY, maxZ, maxW), (F, "glPrimitiveBoundingBoxARB(%f, %f, %f, %f, %f, %f, %f, %f);\n", minX, minY, minZ, minW, maxX, maxY, maxZ, maxW)); +} + #endif /* _GLAPI_SKIP_NORMAL_ENTRY_POINTS */ @@ -13185,7 +13358,7 @@ TABLE_ENTRY(_dispatch_stub_798), TABLE_ENTRY(_dispatch_stub_799), TABLE_ENTRY(_dispatch_stub_800), - TABLE_ENTRY(_dispatch_stub_801), + TABLE_ENTRY(PatchParameteri), TABLE_ENTRY(BindTransformFeedback), TABLE_ENTRY(DeleteTransformFeedbacks), TABLE_ENTRY(DrawTransformFeedback), @@ -13398,13 +13571,13 @@ TABLE_ENTRY(_dispatch_stub_1011), TABLE_ENTRY(_dispatch_stub_1012), TABLE_ENTRY(_dispatch_stub_1013), + TABLE_ENTRY(_dispatch_stub_1014), TABLE_ENTRY(InvalidateBufferData), TABLE_ENTRY(InvalidateBufferSubData), TABLE_ENTRY(InvalidateFramebuffer), TABLE_ENTRY(InvalidateSubFramebuffer), TABLE_ENTRY(InvalidateTexImage), TABLE_ENTRY(InvalidateTexSubImage), - TABLE_ENTRY(_dispatch_stub_1020), TABLE_ENTRY(_dispatch_stub_1021), TABLE_ENTRY(_dispatch_stub_1022), TABLE_ENTRY(_dispatch_stub_1023), @@ -13413,17 +13586,18 @@ TABLE_ENTRY(_dispatch_stub_1026), TABLE_ENTRY(_dispatch_stub_1027), TABLE_ENTRY(_dispatch_stub_1028), + TABLE_ENTRY(_dispatch_stub_1029), TABLE_ENTRY(PointSizePointerOES), - TABLE_ENTRY(_dispatch_stub_1030), TABLE_ENTRY(_dispatch_stub_1031), TABLE_ENTRY(_dispatch_stub_1032), + TABLE_ENTRY(_dispatch_stub_1033), TABLE_ENTRY(ColorPointerEXT), TABLE_ENTRY(EdgeFlagPointerEXT), TABLE_ENTRY(IndexPointerEXT), TABLE_ENTRY(NormalPointerEXT), TABLE_ENTRY(TexCoordPointerEXT), TABLE_ENTRY(VertexPointerEXT), - TABLE_ENTRY(_dispatch_stub_1039), + TABLE_ENTRY(_dispatch_stub_1040), TABLE_ENTRY(ActiveShaderProgram), TABLE_ENTRY(BindProgramPipeline), TABLE_ENTRY(CreateShaderProgramv), @@ -13433,55 +13607,55 @@ TABLE_ENTRY(GetProgramPipelineiv), TABLE_ENTRY(IsProgramPipeline), TABLE_ENTRY(LockArraysEXT), - TABLE_ENTRY(_dispatch_stub_1049), TABLE_ENTRY(_dispatch_stub_1050), + TABLE_ENTRY(_dispatch_stub_1051), TABLE_ENTRY(ProgramUniform1f), TABLE_ENTRY(ProgramUniform1fv), TABLE_ENTRY(ProgramUniform1i), TABLE_ENTRY(ProgramUniform1iv), TABLE_ENTRY(ProgramUniform1ui), TABLE_ENTRY(ProgramUniform1uiv), - TABLE_ENTRY(_dispatch_stub_1057), TABLE_ENTRY(_dispatch_stub_1058), + TABLE_ENTRY(_dispatch_stub_1059), TABLE_ENTRY(ProgramUniform2f), TABLE_ENTRY(ProgramUniform2fv), TABLE_ENTRY(ProgramUniform2i), TABLE_ENTRY(ProgramUniform2iv), TABLE_ENTRY(ProgramUniform2ui), TABLE_ENTRY(ProgramUniform2uiv), - TABLE_ENTRY(_dispatch_stub_1065), TABLE_ENTRY(_dispatch_stub_1066), + TABLE_ENTRY(_dispatch_stub_1067), TABLE_ENTRY(ProgramUniform3f), TABLE_ENTRY(ProgramUniform3fv), TABLE_ENTRY(ProgramUniform3i), TABLE_ENTRY(ProgramUniform3iv), TABLE_ENTRY(ProgramUniform3ui), TABLE_ENTRY(ProgramUniform3uiv), - TABLE_ENTRY(_dispatch_stub_1073), TABLE_ENTRY(_dispatch_stub_1074), + TABLE_ENTRY(_dispatch_stub_1075), TABLE_ENTRY(ProgramUniform4f), TABLE_ENTRY(ProgramUniform4fv), TABLE_ENTRY(ProgramUniform4i), TABLE_ENTRY(ProgramUniform4iv), TABLE_ENTRY(ProgramUniform4ui), TABLE_ENTRY(ProgramUniform4uiv), - TABLE_ENTRY(_dispatch_stub_1081), + TABLE_ENTRY(_dispatch_stub_1082), TABLE_ENTRY(ProgramUniformMatrix2fv), - TABLE_ENTRY(_dispatch_stub_1083), + TABLE_ENTRY(_dispatch_stub_1084), TABLE_ENTRY(ProgramUniformMatrix2x3fv), - TABLE_ENTRY(_dispatch_stub_1085), + TABLE_ENTRY(_dispatch_stub_1086), TABLE_ENTRY(ProgramUniformMatrix2x4fv), - TABLE_ENTRY(_dispatch_stub_1087), + TABLE_ENTRY(_dispatch_stub_1088), TABLE_ENTRY(ProgramUniformMatrix3fv), - TABLE_ENTRY(_dispatch_stub_1089), + TABLE_ENTRY(_dispatch_stub_1090), TABLE_ENTRY(ProgramUniformMatrix3x2fv), - TABLE_ENTRY(_dispatch_stub_1091), + TABLE_ENTRY(_dispatch_stub_1092), TABLE_ENTRY(ProgramUniformMatrix3x4fv), - TABLE_ENTRY(_dispatch_stub_1093), + TABLE_ENTRY(_dispatch_stub_1094), TABLE_ENTRY(ProgramUniformMatrix4fv), - TABLE_ENTRY(_dispatch_stub_1095), + TABLE_ENTRY(_dispatch_stub_1096), TABLE_ENTRY(ProgramUniformMatrix4x2fv), - TABLE_ENTRY(_dispatch_stub_1097), + TABLE_ENTRY(_dispatch_stub_1098), TABLE_ENTRY(ProgramUniformMatrix4x3fv), TABLE_ENTRY(UnlockArraysEXT), TABLE_ENTRY(UseProgramStages), @@ -13501,7 +13675,6 @@ TABLE_ENTRY(MultiDrawElementsEXT), TABLE_ENTRY(FogCoordfEXT), TABLE_ENTRY(FogCoordfvEXT), - TABLE_ENTRY(_dispatch_stub_1117), TABLE_ENTRY(_dispatch_stub_1118), TABLE_ENTRY(_dispatch_stub_1119), TABLE_ENTRY(_dispatch_stub_1120), @@ -13594,16 +13767,19 @@ TABLE_ENTRY(_dispatch_stub_1207), TABLE_ENTRY(_dispatch_stub_1208), TABLE_ENTRY(_dispatch_stub_1209), - TABLE_ENTRY(PrimitiveRestartNV), + TABLE_ENTRY(_dispatch_stub_1210), TABLE_ENTRY(_dispatch_stub_1211), TABLE_ENTRY(_dispatch_stub_1212), - TABLE_ENTRY(_dispatch_stub_1213), + TABLE_ENTRY(PrimitiveRestartNV), TABLE_ENTRY(_dispatch_stub_1214), + TABLE_ENTRY(_dispatch_stub_1215), + TABLE_ENTRY(_dispatch_stub_1216), + TABLE_ENTRY(_dispatch_stub_1217), TABLE_ENTRY(BindFramebufferEXT), TABLE_ENTRY(BindRenderbufferEXT), - TABLE_ENTRY(_dispatch_stub_1217), - TABLE_ENTRY(_dispatch_stub_1218), - TABLE_ENTRY(_dispatch_stub_1219), + TABLE_ENTRY(_dispatch_stub_1220), + TABLE_ENTRY(_dispatch_stub_1221), + TABLE_ENTRY(_dispatch_stub_1222), TABLE_ENTRY(VertexAttribI1iEXT), TABLE_ENTRY(VertexAttribI1uiEXT), TABLE_ENTRY(VertexAttribI2iEXT), @@ -13620,9 +13796,6 @@ TABLE_ENTRY(VertexAttribI4uivEXT), TABLE_ENTRY(ClearColorIiEXT), TABLE_ENTRY(ClearColorIuiEXT), - TABLE_ENTRY(_dispatch_stub_1236), - TABLE_ENTRY(_dispatch_stub_1237), - TABLE_ENTRY(_dispatch_stub_1238), TABLE_ENTRY(_dispatch_stub_1239), TABLE_ENTRY(_dispatch_stub_1240), TABLE_ENTRY(_dispatch_stub_1241), @@ -13638,10 +13811,10 @@ TABLE_ENTRY(_dispatch_stub_1251), TABLE_ENTRY(_dispatch_stub_1252), TABLE_ENTRY(_dispatch_stub_1253), - TABLE_ENTRY(TextureBarrierNV), + TABLE_ENTRY(_dispatch_stub_1254), TABLE_ENTRY(_dispatch_stub_1255), TABLE_ENTRY(_dispatch_stub_1256), - TABLE_ENTRY(_dispatch_stub_1257), + TABLE_ENTRY(TextureBarrierNV), TABLE_ENTRY(_dispatch_stub_1258), TABLE_ENTRY(_dispatch_stub_1259), TABLE_ENTRY(_dispatch_stub_1260), @@ -13665,6 +13838,10 @@ TABLE_ENTRY(_dispatch_stub_1278), TABLE_ENTRY(_dispatch_stub_1279), TABLE_ENTRY(_dispatch_stub_1280), + TABLE_ENTRY(_dispatch_stub_1281), + TABLE_ENTRY(_dispatch_stub_1282), + TABLE_ENTRY(_dispatch_stub_1283), + TABLE_ENTRY(_dispatch_stub_1284), TABLE_ENTRY(AlphaFuncx), TABLE_ENTRY(ClearColorx), TABLE_ENTRY(ClearDepthx), @@ -13708,6 +13885,8 @@ TABLE_ENTRY(PointParameterx), TABLE_ENTRY(PointParameterxv), TABLE_ENTRY(TexParameterxv), + TABLE_ENTRY(BlendBarrier), + TABLE_ENTRY(PrimitiveBoundingBox), /* A whole bunch of no-op functions. These might be called * when someone tries to call a dynamically-registered * extension function without a current rendering context. @@ -14193,9 +14372,13 @@ TABLE_ENTRY(_dispatch_stub_704), TABLE_ENTRY(_dispatch_stub_705), TABLE_ENTRY(ProvokingVertexEXT), + TABLE_ENTRY(BlendEquationSeparatei), TABLE_ENTRY(_dispatch_stub_711), + TABLE_ENTRY(BlendEquationi), TABLE_ENTRY(_dispatch_stub_712), + TABLE_ENTRY(BlendFuncSeparatei), TABLE_ENTRY(_dispatch_stub_713), + TABLE_ENTRY(BlendFunci), TABLE_ENTRY(_dispatch_stub_714), TABLE_ENTRY(_dispatch_stub_715), TABLE_ENTRY(_dispatch_stub_716), @@ -14203,15 +14386,28 @@ TABLE_ENTRY(_dispatch_stub_721), TABLE_ENTRY(_dispatch_stub_725), TABLE_ENTRY(_dispatch_stub_726), + TABLE_ENTRY(_dispatch_stub_801), TABLE_ENTRY(_dispatch_stub_813), TABLE_ENTRY(_dispatch_stub_814), TABLE_ENTRY(_dispatch_stub_818), TABLE_ENTRY(_dispatch_stub_819), TABLE_ENTRY(_dispatch_stub_820), + TABLE_ENTRY(_dispatch_stub_834), + TABLE_ENTRY(_dispatch_stub_835), + TABLE_ENTRY(_dispatch_stub_836), + TABLE_ENTRY(_dispatch_stub_837), + TABLE_ENTRY(_dispatch_stub_838), + TABLE_ENTRY(_dispatch_stub_839), + TABLE_ENTRY(_dispatch_stub_840), + TABLE_ENTRY(GetGraphicsResetStatus), TABLE_ENTRY(_dispatch_stub_841), + TABLE_ENTRY(GetnUniformfv), TABLE_ENTRY(_dispatch_stub_857), + TABLE_ENTRY(GetnUniformiv), TABLE_ENTRY(_dispatch_stub_858), + TABLE_ENTRY(GetnUniformuiv), TABLE_ENTRY(_dispatch_stub_859), + TABLE_ENTRY(ReadnPixels), TABLE_ENTRY(_dispatch_stub_860), TABLE_ENTRY(_dispatch_stub_861), TABLE_ENTRY(_dispatch_stub_862), @@ -14220,7 +14416,6 @@ TABLE_ENTRY(_dispatch_stub_900), TABLE_ENTRY(_dispatch_stub_902), TABLE_ENTRY(_dispatch_stub_903), - TABLE_ENTRY(_dispatch_stub_1040), TABLE_ENTRY(_dispatch_stub_1041), TABLE_ENTRY(_dispatch_stub_1042), TABLE_ENTRY(_dispatch_stub_1043), @@ -14228,55 +14423,56 @@ TABLE_ENTRY(_dispatch_stub_1045), TABLE_ENTRY(_dispatch_stub_1046), TABLE_ENTRY(_dispatch_stub_1047), - TABLE_ENTRY(_dispatch_stub_1051), + TABLE_ENTRY(_dispatch_stub_1048), TABLE_ENTRY(_dispatch_stub_1052), TABLE_ENTRY(_dispatch_stub_1053), TABLE_ENTRY(_dispatch_stub_1054), TABLE_ENTRY(_dispatch_stub_1055), TABLE_ENTRY(_dispatch_stub_1056), - TABLE_ENTRY(_dispatch_stub_1059), + TABLE_ENTRY(_dispatch_stub_1057), TABLE_ENTRY(_dispatch_stub_1060), TABLE_ENTRY(_dispatch_stub_1061), TABLE_ENTRY(_dispatch_stub_1062), TABLE_ENTRY(_dispatch_stub_1063), TABLE_ENTRY(_dispatch_stub_1064), - TABLE_ENTRY(_dispatch_stub_1067), + TABLE_ENTRY(_dispatch_stub_1065), TABLE_ENTRY(_dispatch_stub_1068), TABLE_ENTRY(_dispatch_stub_1069), TABLE_ENTRY(_dispatch_stub_1070), TABLE_ENTRY(_dispatch_stub_1071), TABLE_ENTRY(_dispatch_stub_1072), - TABLE_ENTRY(_dispatch_stub_1075), + TABLE_ENTRY(_dispatch_stub_1073), TABLE_ENTRY(_dispatch_stub_1076), TABLE_ENTRY(_dispatch_stub_1077), TABLE_ENTRY(_dispatch_stub_1078), TABLE_ENTRY(_dispatch_stub_1079), TABLE_ENTRY(_dispatch_stub_1080), - TABLE_ENTRY(_dispatch_stub_1082), - TABLE_ENTRY(_dispatch_stub_1084), - TABLE_ENTRY(_dispatch_stub_1086), - TABLE_ENTRY(_dispatch_stub_1088), - TABLE_ENTRY(_dispatch_stub_1090), - TABLE_ENTRY(_dispatch_stub_1092), - TABLE_ENTRY(_dispatch_stub_1094), - TABLE_ENTRY(_dispatch_stub_1096), - TABLE_ENTRY(_dispatch_stub_1098), - TABLE_ENTRY(_dispatch_stub_1100), + TABLE_ENTRY(_dispatch_stub_1081), + TABLE_ENTRY(_dispatch_stub_1083), + TABLE_ENTRY(_dispatch_stub_1085), + TABLE_ENTRY(_dispatch_stub_1087), + TABLE_ENTRY(_dispatch_stub_1089), + TABLE_ENTRY(_dispatch_stub_1091), + TABLE_ENTRY(_dispatch_stub_1093), + TABLE_ENTRY(_dispatch_stub_1095), + TABLE_ENTRY(_dispatch_stub_1097), + TABLE_ENTRY(_dispatch_stub_1099), TABLE_ENTRY(_dispatch_stub_1101), - TABLE_ENTRY(DebugMessageCallbackARB), TABLE_ENTRY(_dispatch_stub_1102), - TABLE_ENTRY(DebugMessageControlARB), + TABLE_ENTRY(DebugMessageCallbackARB), TABLE_ENTRY(_dispatch_stub_1103), - TABLE_ENTRY(DebugMessageInsertARB), + TABLE_ENTRY(DebugMessageControlARB), TABLE_ENTRY(_dispatch_stub_1104), - TABLE_ENTRY(GetDebugMessageLogARB), + TABLE_ENTRY(DebugMessageInsertARB), TABLE_ENTRY(_dispatch_stub_1105), + TABLE_ENTRY(GetDebugMessageLogARB), TABLE_ENTRY(_dispatch_stub_1106), TABLE_ENTRY(_dispatch_stub_1107), TABLE_ENTRY(_dispatch_stub_1108), TABLE_ENTRY(_dispatch_stub_1109), TABLE_ENTRY(_dispatch_stub_1110), TABLE_ENTRY(_dispatch_stub_1111), + TABLE_ENTRY(_dispatch_stub_1112), TABLE_ENTRY(SecondaryColor3f), TABLE_ENTRY(SecondaryColor3fv), TABLE_ENTRY(MultiDrawElements), @@ -14296,11 +14492,7 @@ TABLE_ENTRY(VertexAttribI4iv), TABLE_ENTRY(VertexAttribI4ui), TABLE_ENTRY(VertexAttribI4uiv), - TABLE_ENTRY(_dispatch_stub_1254), - TABLE_ENTRY(_dispatch_stub_1281), - TABLE_ENTRY(_dispatch_stub_1282), - TABLE_ENTRY(_dispatch_stub_1283), - TABLE_ENTRY(_dispatch_stub_1284), + TABLE_ENTRY(_dispatch_stub_1257), TABLE_ENTRY(_dispatch_stub_1285), TABLE_ENTRY(_dispatch_stub_1286), TABLE_ENTRY(_dispatch_stub_1287), @@ -14340,6 +14532,12 @@ TABLE_ENTRY(_dispatch_stub_1321), TABLE_ENTRY(_dispatch_stub_1322), TABLE_ENTRY(_dispatch_stub_1323), + TABLE_ENTRY(_dispatch_stub_1324), + TABLE_ENTRY(_dispatch_stub_1325), + TABLE_ENTRY(_dispatch_stub_1326), + TABLE_ENTRY(_dispatch_stub_1327), + TABLE_ENTRY(_dispatch_stub_1328), + TABLE_ENTRY(_dispatch_stub_1329), #endif /* _GLAPI_SKIP_NORMAL_ENTRY_POINTS */ #ifndef _GLAPI_SKIP_PROTO_ENTRY_POINTS TABLE_ENTRY(AreTexturesResidentEXT), diff -Nru mesa-12.0.6/src/mapi/glapi/glapi_x86-64.S mesa-17.0.7/src/mapi/glapi/glapi_x86-64.S --- mesa-12.0.6/src/mapi/glapi/glapi_x86-64.S 2017-01-24 01:42:42.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/glapi_x86-64.S 2017-06-01 10:37:43.000000000 +0000 @@ -30349,10 +30349,9 @@ .size GL_PREFIX(_dispatch_stub_800), .-GL_PREFIX(_dispatch_stub_800) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_801) - .type GL_PREFIX(_dispatch_stub_801), @function - HIDDEN(GL_PREFIX(_dispatch_stub_801)) -GL_PREFIX(_dispatch_stub_801): + .globl GL_PREFIX(PatchParameteri) + .type GL_PREFIX(PatchParameteri), @function +GL_PREFIX(PatchParameteri): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 6408(%rax), %r11 @@ -30384,7 +30383,7 @@ movq 6408(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_801), .-GL_PREFIX(_dispatch_stub_801) + .size GL_PREFIX(PatchParameteri), .-GL_PREFIX(PatchParameteri) .p2align 4,,15 .globl GL_PREFIX(BindTransformFeedback) @@ -35081,7 +35080,11 @@ pushq %rdx pushq %rcx pushq %r8 + pushq %r9 + pushq %rbp call _x86_64_get_dispatch@PLT + popq %rbp + popq %r9 popq %r8 popq %rcx popq %rdx @@ -35101,7 +35104,11 @@ pushq %rdx pushq %rcx pushq %r8 + pushq %r9 + pushq %rbp call _glapi_get_dispatch + popq %rbp + popq %r9 popq %r8 popq %rcx popq %rdx @@ -35127,11 +35134,7 @@ pushq %rdx pushq %rcx pushq %r8 - pushq %r9 - pushq %rbp call _x86_64_get_dispatch@PLT - popq %rbp - popq %r9 popq %r8 popq %rcx popq %rdx @@ -35151,11 +35154,7 @@ pushq %rdx pushq %rcx pushq %r8 - pushq %r9 - pushq %rbp call _glapi_get_dispatch - popq %rbp - popq %r9 popq %r8 popq %rcx popq %rdx @@ -35178,9 +35177,17 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi + pushq %rdx + pushq %rcx + pushq %r8 + pushq %r9 pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp + popq %r9 + popq %r8 + popq %rcx + popq %rdx popq %rsi popq %rdi movq 7312(%rax), %r11 @@ -35194,9 +35201,17 @@ 1: pushq %rdi pushq %rsi + pushq %rdx + pushq %rcx + pushq %r8 + pushq %r9 pushq %rbp call _glapi_get_dispatch popq %rbp + popq %r9 + popq %r8 + popq %rcx + popq %rdx popq %rsi popq %rdi movq 7312(%rax), %r11 @@ -35254,17 +35269,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 - pushq %r9 pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp - popq %r9 - popq %r8 - popq %rcx - popq %rdx popq %rsi popq %rdi movq 7328(%rax), %r11 @@ -35278,17 +35285,9 @@ 1: pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 - pushq %r9 pushq %rbp call _glapi_get_dispatch popq %rbp - popq %r9 - popq %r8 - popq %rcx - popq %rdx popq %rsi popq %rdi movq 7328(%rax), %r11 @@ -35308,9 +35307,17 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi + pushq %rdx + pushq %rcx + pushq %r8 + pushq %r9 pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp + popq %r9 + popq %r8 + popq %rcx + popq %rdx popq %rsi popq %rdi movq 7336(%rax), %r11 @@ -35324,9 +35331,17 @@ 1: pushq %rdi pushq %rsi + pushq %rdx + pushq %rcx + pushq %r8 + pushq %r9 pushq %rbp call _glapi_get_dispatch popq %rbp + popq %r9 + popq %r8 + popq %rcx + popq %rdx popq %rsi popq %rdi movq 7336(%rax), %r11 @@ -35346,13 +35361,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 + pushq %rbp call _x86_64_get_dispatch@PLT - popq %r8 - popq %rcx - popq %rdx + popq %rbp popq %rsi popq %rdi movq 7344(%rax), %r11 @@ -35366,13 +35377,9 @@ 1: pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 + pushq %rbp call _glapi_get_dispatch - popq %r8 - popq %rcx - popq %rdx + popq %rbp popq %rsi popq %rdi movq 7344(%rax), %r11 @@ -35395,11 +35402,7 @@ pushq %rdx pushq %rcx pushq %r8 - pushq %r9 - pushq %rbp call _x86_64_get_dispatch@PLT - popq %rbp - popq %r9 popq %r8 popq %rcx popq %rdx @@ -35419,11 +35422,7 @@ pushq %rdx pushq %rcx pushq %r8 - pushq %r9 - pushq %rbp call _glapi_get_dispatch - popq %rbp - popq %r9 popq %r8 popq %rcx popq %rdx @@ -35444,19 +35443,21 @@ movq 7360(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) - subq $40, %rsp - movq %rdi, (%rsp) - movq %rsi, 8(%rsp) - movq %rdx, 16(%rsp) - movq %xmm0, 24(%rsp) - movq %rcx, 32(%rsp) + pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %r8 + pushq %r9 + pushq %rbp call _x86_64_get_dispatch@PLT - movq 32(%rsp), %rcx - movq 24(%rsp), %xmm0 - movq 16(%rsp), %rdx - movq 8(%rsp), %rsi - movq (%rsp), %rdi - addq $40, %rsp + popq %rbp + popq %r9 + popq %r8 + popq %rcx + popq %rdx + popq %rsi + popq %rdi movq 7360(%rax), %r11 jmp *%r11 #else @@ -35466,19 +35467,21 @@ movq 7360(%rax), %r11 jmp *%r11 1: - subq $40, %rsp - movq %rdi, (%rsp) - movq %rsi, 8(%rsp) - movq %rdx, 16(%rsp) - movq %xmm0, 24(%rsp) - movq %rcx, 32(%rsp) + pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %r8 + pushq %r9 + pushq %rbp call _glapi_get_dispatch - movq 32(%rsp), %rcx - movq 24(%rsp), %xmm0 - movq 16(%rsp), %rdx - movq 8(%rsp), %rsi - movq (%rsp), %rdi - addq $40, %rsp + popq %rbp + popq %r9 + popq %r8 + popq %rcx + popq %rdx + popq %rsi + popq %rdi movq 7360(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ @@ -35494,17 +35497,19 @@ movq 7368(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) - pushq %rdi - pushq %rsi - pushq %rdx - pushq %rcx - pushq %rbp + subq $40, %rsp + movq %rdi, (%rsp) + movq %rsi, 8(%rsp) + movq %rdx, 16(%rsp) + movq %xmm0, 24(%rsp) + movq %rcx, 32(%rsp) call _x86_64_get_dispatch@PLT - popq %rbp - popq %rcx - popq %rdx - popq %rsi - popq %rdi + movq 32(%rsp), %rcx + movq 24(%rsp), %xmm0 + movq 16(%rsp), %rdx + movq 8(%rsp), %rsi + movq (%rsp), %rdi + addq $40, %rsp movq 7368(%rax), %r11 jmp *%r11 #else @@ -35514,17 +35519,19 @@ movq 7368(%rax), %r11 jmp *%r11 1: - pushq %rdi - pushq %rsi - pushq %rdx - pushq %rcx - pushq %rbp + subq $40, %rsp + movq %rdi, (%rsp) + movq %rsi, 8(%rsp) + movq %rdx, 16(%rsp) + movq %xmm0, 24(%rsp) + movq %rcx, 32(%rsp) call _glapi_get_dispatch - popq %rbp - popq %rcx - popq %rdx - popq %rsi - popq %rdi + movq 32(%rsp), %rcx + movq 24(%rsp), %xmm0 + movq 16(%rsp), %rdx + movq 8(%rsp), %rsi + movq (%rsp), %rdi + addq $40, %rsp movq 7368(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ @@ -35636,13 +35643,9 @@ pushq %rsi pushq %rdx pushq %rcx - pushq %r8 - pushq %r9 pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp - popq %r9 - popq %r8 popq %rcx popq %rdx popq %rsi @@ -35660,13 +35663,9 @@ pushq %rsi pushq %rdx pushq %rcx - pushq %r8 - pushq %r9 pushq %rbp call _glapi_get_dispatch popq %rbp - popq %r9 - popq %r8 popq %rcx popq %rdx popq %rsi @@ -35799,7 +35798,11 @@ pushq %rdx pushq %rcx pushq %r8 + pushq %r9 + pushq %rbp call _x86_64_get_dispatch@PLT + popq %rbp + popq %r9 popq %r8 popq %rcx popq %rdx @@ -35819,7 +35822,11 @@ pushq %rdx pushq %rcx pushq %r8 + pushq %r9 + pushq %rbp call _glapi_get_dispatch + popq %rbp + popq %r9 popq %r8 popq %rcx popq %rdx @@ -35845,11 +35852,7 @@ pushq %rdx pushq %rcx pushq %r8 - pushq %r9 - pushq %rbp call _x86_64_get_dispatch@PLT - popq %rbp - popq %r9 popq %r8 popq %rcx popq %rdx @@ -35869,11 +35872,7 @@ pushq %rdx pushq %rcx pushq %r8 - pushq %r9 - pushq %rbp call _glapi_get_dispatch - popq %rbp - popq %r9 popq %r8 popq %rcx popq %rdx @@ -36004,9 +36003,17 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi + pushq %rdx + pushq %rcx + pushq %r8 + pushq %r9 pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp + popq %r9 + popq %r8 + popq %rcx + popq %rdx popq %rsi popq %rdi movq 7448(%rax), %r11 @@ -36020,9 +36027,17 @@ 1: pushq %rdi pushq %rsi + pushq %rdx + pushq %rcx + pushq %r8 + pushq %r9 pushq %rbp call _glapi_get_dispatch popq %rbp + popq %r9 + popq %r8 + popq %rcx + popq %rdx popq %rsi popq %rdi movq 7448(%rax), %r11 @@ -36118,9 +36133,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rdx + pushq %rbp call _x86_64_get_dispatch@PLT - popq %rdx + popq %rbp popq %rsi popq %rdi movq 7472(%rax), %r11 @@ -36134,9 +36149,9 @@ 1: pushq %rdi pushq %rsi - pushq %rdx + pushq %rbp call _glapi_get_dispatch - popq %rdx + popq %rbp popq %rsi popq %rdi movq 7472(%rax), %r11 @@ -36156,9 +36171,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _x86_64_get_dispatch@PLT - popq %rbp + popq %rdx popq %rsi popq %rdi movq 7480(%rax), %r11 @@ -36172,9 +36187,9 @@ 1: pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _glapi_get_dispatch - popq %rbp + popq %rdx popq %rsi popq %rdi movq 7480(%rax), %r11 @@ -36232,9 +36247,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rdx + pushq %rbp call _x86_64_get_dispatch@PLT - popq %rdx + popq %rbp popq %rsi popq %rdi movq 7496(%rax), %r11 @@ -36248,9 +36263,9 @@ 1: pushq %rdi pushq %rsi - pushq %rdx + pushq %rbp call _glapi_get_dispatch - popq %rdx + popq %rbp popq %rsi popq %rdi movq 7496(%rax), %r11 @@ -36270,9 +36285,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _x86_64_get_dispatch@PLT - popq %rbp + popq %rdx popq %rsi popq %rdi movq 7504(%rax), %r11 @@ -36286,9 +36301,9 @@ 1: pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _glapi_get_dispatch - popq %rbp + popq %rdx popq %rsi popq %rdi movq 7504(%rax), %r11 @@ -36422,9 +36437,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rdx + pushq %rbp call _x86_64_get_dispatch@PLT - popq %rdx + popq %rbp popq %rsi popq %rdi movq 7536(%rax), %r11 @@ -36438,9 +36453,9 @@ 1: pushq %rdi pushq %rsi - pushq %rdx + pushq %rbp call _glapi_get_dispatch - popq %rdx + popq %rbp popq %rsi popq %rdi movq 7536(%rax), %r11 @@ -36459,7 +36474,11 @@ jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi + pushq %rsi + pushq %rdx call _x86_64_get_dispatch@PLT + popq %rdx + popq %rsi popq %rdi movq 7544(%rax), %r11 jmp *%r11 @@ -36471,7 +36490,11 @@ jmp *%r11 1: pushq %rdi + pushq %rsi + pushq %rdx call _glapi_get_dispatch + popq %rdx + popq %rsi popq %rdi movq 7544(%rax), %r11 jmp *%r11 @@ -36489,15 +36512,7 @@ jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi - pushq %rsi - pushq %rdx - pushq %rcx - pushq %rbp call _x86_64_get_dispatch@PLT - popq %rbp - popq %rcx - popq %rdx - popq %rsi popq %rdi movq 7552(%rax), %r11 jmp *%r11 @@ -36509,15 +36524,7 @@ jmp *%r11 1: pushq %rdi - pushq %rsi - pushq %rdx - pushq %rcx - pushq %rbp call _glapi_get_dispatch - popq %rbp - popq %rcx - popq %rdx - popq %rsi popq %rdi movq 7552(%rax), %r11 jmp *%r11 @@ -36537,7 +36544,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %rbp call _x86_64_get_dispatch@PLT + popq %rbp + popq %rcx popq %rdx popq %rsi popq %rdi @@ -36553,7 +36564,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %rbp call _glapi_get_dispatch + popq %rbp + popq %rcx popq %rdx popq %rsi popq %rdi @@ -36651,11 +36666,7 @@ pushq %rdi pushq %rsi pushq %rdx - pushq %rcx - pushq %rbp call _x86_64_get_dispatch@PLT - popq %rbp - popq %rcx popq %rdx popq %rsi popq %rdi @@ -36671,11 +36682,7 @@ pushq %rdi pushq %rsi pushq %rdx - pushq %rcx - pushq %rbp call _glapi_get_dispatch - popq %rbp - popq %rcx popq %rdx popq %rsi popq %rdi @@ -36743,7 +36750,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %rbp call _x86_64_get_dispatch@PLT + popq %rbp + popq %rcx popq %rdx popq %rsi popq %rdi @@ -36759,7 +36770,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %rbp call _glapi_get_dispatch + popq %rbp + popq %rcx popq %rdx popq %rsi popq %rdi @@ -36819,11 +36834,7 @@ pushq %rdi pushq %rsi pushq %rdx - pushq %rcx - pushq %rbp call _x86_64_get_dispatch@PLT - popq %rbp - popq %rcx popq %rdx popq %rsi popq %rdi @@ -36839,11 +36850,7 @@ pushq %rdi pushq %rsi pushq %rdx - pushq %rcx - pushq %rbp call _glapi_get_dispatch - popq %rbp - popq %rcx popq %rdx popq %rsi popq %rdi @@ -37004,13 +37011,9 @@ pushq %rsi pushq %rdx pushq %rcx - pushq %r8 - pushq %r9 pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp - popq %r9 - popq %r8 popq %rcx popq %rdx popq %rsi @@ -37028,13 +37031,9 @@ pushq %rsi pushq %rdx pushq %rcx - pushq %r8 - pushq %r9 pushq %rbp call _glapi_get_dispatch popq %rbp - popq %r9 - popq %r8 popq %rcx popq %rdx popq %rsi @@ -37058,9 +37057,13 @@ pushq %rsi pushq %rdx pushq %rcx + pushq %r8 + pushq %r9 pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp + popq %r9 + popq %r8 popq %rcx popq %rdx popq %rsi @@ -37078,9 +37081,13 @@ pushq %rsi pushq %rdx pushq %rcx + pushq %r8 + pushq %r9 pushq %rbp call _glapi_get_dispatch popq %rbp + popq %r9 + popq %r8 popq %rcx popq %rdx popq %rsi @@ -37149,7 +37156,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %rbp call _x86_64_get_dispatch@PLT + popq %rbp + popq %rcx popq %rdx popq %rsi popq %rdi @@ -37165,7 +37176,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %rbp call _glapi_get_dispatch + popq %rbp + popq %rcx popq %rdx popq %rsi popq %rdi @@ -37301,11 +37316,7 @@ pushq %rdi pushq %rsi pushq %rdx - pushq %rcx - pushq %rbp call _x86_64_get_dispatch@PLT - popq %rbp - popq %rcx popq %rdx popq %rsi popq %rdi @@ -37321,11 +37332,7 @@ pushq %rdi pushq %rsi pushq %rdx - pushq %rcx - pushq %rbp call _glapi_get_dispatch - popq %rbp - popq %rcx popq %rdx popq %rsi popq %rdi @@ -37393,7 +37400,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %rbp call _x86_64_get_dispatch@PLT + popq %rbp + popq %rcx popq %rdx popq %rsi popq %rdi @@ -37409,7 +37420,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %rbp call _glapi_get_dispatch + popq %rbp + popq %rcx popq %rdx popq %rsi popq %rdi @@ -37431,11 +37446,7 @@ pushq %rdi pushq %rsi pushq %rdx - pushq %rcx - pushq %rbp call _x86_64_get_dispatch@PLT - popq %rbp - popq %rcx popq %rdx popq %rsi popq %rdi @@ -37451,11 +37462,7 @@ pushq %rdi pushq %rsi pushq %rdx - pushq %rcx - pushq %rbp call _glapi_get_dispatch - popq %rbp - popq %rcx popq %rdx popq %rsi popq %rdi @@ -37523,7 +37530,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %rbp call _x86_64_get_dispatch@PLT + popq %rbp + popq %rcx popq %rdx popq %rsi popq %rdi @@ -37539,7 +37550,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %rbp call _glapi_get_dispatch + popq %rbp + popq %rcx popq %rdx popq %rsi popq %rdi @@ -37599,15 +37614,7 @@ pushq %rdi pushq %rsi pushq %rdx - pushq %rcx - pushq %r8 - pushq %r9 - pushq %rbp call _x86_64_get_dispatch@PLT - popq %rbp - popq %r9 - popq %r8 - popq %rcx popq %rdx popq %rsi popq %rdi @@ -37623,15 +37630,7 @@ pushq %rdi pushq %rsi pushq %rdx - pushq %rcx - pushq %r8 - pushq %r9 - pushq %rbp call _glapi_get_dispatch - popq %rbp - popq %r9 - popq %r8 - popq %rcx popq %rdx popq %rsi popq %rdi @@ -37652,9 +37651,17 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi + pushq %rdx + pushq %rcx + pushq %r8 + pushq %r9 pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp + popq %r9 + popq %r8 + popq %rcx + popq %rdx popq %rsi popq %rdi movq 7768(%rax), %r11 @@ -37668,9 +37675,17 @@ 1: pushq %rdi pushq %rsi + pushq %rdx + pushq %rcx + pushq %r8 + pushq %r9 pushq %rbp call _glapi_get_dispatch popq %rbp + popq %r9 + popq %r8 + popq %rcx + popq %rdx popq %rsi popq %rdi movq 7768(%rax), %r11 @@ -37690,13 +37705,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp - popq %rcx - popq %rdx popq %rsi popq %rdi movq 7776(%rax), %r11 @@ -37710,13 +37721,9 @@ 1: pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx pushq %rbp call _glapi_get_dispatch popq %rbp - popq %rcx - popq %rdx popq %rsi popq %rdi movq 7776(%rax), %r11 @@ -37874,9 +37881,13 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi + pushq %rdx + pushq %rcx pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp + popq %rcx + popq %rdx popq %rsi popq %rdi movq 7808(%rax), %r11 @@ -37890,9 +37901,13 @@ 1: pushq %rdi pushq %rsi + pushq %rdx + pushq %rcx pushq %rbp call _glapi_get_dispatch popq %rbp + popq %rcx + popq %rdx popq %rsi popq %rdi movq 7808(%rax), %r11 @@ -37912,9 +37927,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rdx + pushq %rbp call _x86_64_get_dispatch@PLT - popq %rdx + popq %rbp popq %rsi popq %rdi movq 7816(%rax), %r11 @@ -37928,9 +37943,9 @@ 1: pushq %rdi pushq %rsi - pushq %rdx + pushq %rbp call _glapi_get_dispatch - popq %rdx + popq %rbp popq %rsi popq %rdi movq 7816(%rax), %r11 @@ -37988,9 +38003,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _x86_64_get_dispatch@PLT - popq %rbp + popq %rdx popq %rsi popq %rdi movq 7832(%rax), %r11 @@ -38004,9 +38019,9 @@ 1: pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _glapi_get_dispatch - popq %rbp + popq %rdx popq %rsi popq %rdi movq 7832(%rax), %r11 @@ -38026,13 +38041,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp - popq %rcx - popq %rdx popq %rsi popq %rdi movq 7840(%rax), %r11 @@ -38046,13 +38057,9 @@ 1: pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx pushq %rbp call _glapi_get_dispatch popq %rbp - popq %rcx - popq %rdx popq %rsi popq %rdi movq 7840(%rax), %r11 @@ -38120,9 +38127,9 @@ pushq %rsi pushq %rdx pushq %rcx - pushq %r8 + pushq %rbp call _x86_64_get_dispatch@PLT - popq %r8 + popq %rbp popq %rcx popq %rdx popq %rsi @@ -38140,9 +38147,9 @@ pushq %rsi pushq %rdx pushq %rcx - pushq %r8 + pushq %rbp call _glapi_get_dispatch - popq %r8 + popq %rbp popq %rcx popq %rdx popq %rsi @@ -38166,9 +38173,9 @@ pushq %rsi pushq %rdx pushq %rcx - pushq %rbp + pushq %r8 call _x86_64_get_dispatch@PLT - popq %rbp + popq %r8 popq %rcx popq %rdx popq %rsi @@ -38186,9 +38193,9 @@ pushq %rsi pushq %rdx pushq %rcx - pushq %rbp + pushq %r8 call _glapi_get_dispatch - popq %rbp + popq %r8 popq %rcx popq %rdx popq %rsi @@ -38212,9 +38219,9 @@ pushq %rsi pushq %rdx pushq %rcx - pushq %r8 + pushq %rbp call _x86_64_get_dispatch@PLT - popq %r8 + popq %rbp popq %rcx popq %rdx popq %rsi @@ -38232,9 +38239,9 @@ pushq %rsi pushq %rdx pushq %rcx - pushq %r8 + pushq %rbp call _glapi_get_dispatch - popq %r8 + popq %rbp popq %rcx popq %rdx popq %rsi @@ -38257,7 +38264,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %r8 call _x86_64_get_dispatch@PLT + popq %r8 + popq %rcx popq %rdx popq %rsi popq %rdi @@ -38273,7 +38284,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %r8 call _glapi_get_dispatch + popq %r8 + popq %rcx popq %rdx popq %rsi popq %rdi @@ -38295,11 +38310,7 @@ pushq %rdi pushq %rsi pushq %rdx - pushq %rcx - pushq %r8 call _x86_64_get_dispatch@PLT - popq %r8 - popq %rcx popq %rdx popq %rsi popq %rdi @@ -38315,11 +38326,7 @@ pushq %rdi pushq %rsi pushq %rdx - pushq %rcx - pushq %r8 call _glapi_get_dispatch - popq %r8 - popq %rcx popq %rdx popq %rsi popq %rdi @@ -38341,7 +38348,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %r8 call _x86_64_get_dispatch@PLT + popq %r8 + popq %rcx popq %rdx popq %rsi popq %rdi @@ -38357,7 +38368,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %r8 call _glapi_get_dispatch + popq %r8 + popq %rcx popq %rdx popq %rsi popq %rdi @@ -38414,15 +38429,13 @@ movq 7912(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) - subq $24, %rsp - movq %rdi, (%rsp) - movq %rsi, 8(%rsp) - movq %xmm0, 16(%rsp) + pushq %rdi + pushq %rsi + pushq %rdx call _x86_64_get_dispatch@PLT - movq 16(%rsp), %xmm0 - movq 8(%rsp), %rsi - movq (%rsp), %rdi - addq $24, %rsp + popq %rdx + popq %rsi + popq %rdi movq 7912(%rax), %r11 jmp *%r11 #else @@ -38432,15 +38445,13 @@ movq 7912(%rax), %r11 jmp *%r11 1: - subq $24, %rsp - movq %rdi, (%rsp) - movq %rsi, 8(%rsp) - movq %xmm0, 16(%rsp) + pushq %rdi + pushq %rsi + pushq %rdx call _glapi_get_dispatch - movq 16(%rsp), %xmm0 - movq 8(%rsp), %rsi - movq (%rsp), %rdi - addq $24, %rsp + popq %rdx + popq %rsi + popq %rdi movq 7912(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ @@ -38456,13 +38467,15 @@ movq 7920(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) - pushq %rdi - pushq %rsi - pushq %rdx + subq $24, %rsp + movq %rdi, (%rsp) + movq %rsi, 8(%rsp) + movq %xmm0, 16(%rsp) call _x86_64_get_dispatch@PLT - popq %rdx - popq %rsi - popq %rdi + movq 16(%rsp), %xmm0 + movq 8(%rsp), %rsi + movq (%rsp), %rdi + addq $24, %rsp movq 7920(%rax), %r11 jmp *%r11 #else @@ -38472,13 +38485,15 @@ movq 7920(%rax), %r11 jmp *%r11 1: - pushq %rdi - pushq %rsi - pushq %rdx + subq $24, %rsp + movq %rdi, (%rsp) + movq %rsi, 8(%rsp) + movq %xmm0, 16(%rsp) call _glapi_get_dispatch - popq %rdx - popq %rsi - popq %rdi + movq 16(%rsp), %xmm0 + movq 8(%rsp), %rsi + movq (%rsp), %rdi + addq $24, %rsp movq 7920(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ @@ -38573,11 +38588,7 @@ pushq %rdi pushq %rsi pushq %rdx - pushq %rcx - pushq %rbp call _x86_64_get_dispatch@PLT - popq %rbp - popq %rcx popq %rdx popq %rsi popq %rdi @@ -38593,11 +38604,7 @@ pushq %rdi pushq %rsi pushq %rdx - pushq %rcx - pushq %rbp call _glapi_get_dispatch - popq %rbp - popq %rcx popq %rdx popq %rsi popq %rdi @@ -38620,9 +38627,9 @@ pushq %rsi pushq %rdx pushq %rcx - pushq %r8 + pushq %rbp call _x86_64_get_dispatch@PLT - popq %r8 + popq %rbp popq %rcx popq %rdx popq %rsi @@ -38640,9 +38647,9 @@ pushq %rsi pushq %rdx pushq %rcx - pushq %r8 + pushq %rbp call _glapi_get_dispatch - popq %r8 + popq %rbp popq %rcx popq %rdx popq %rsi @@ -38667,11 +38674,7 @@ pushq %rdx pushq %rcx pushq %r8 - pushq %r9 - pushq %rbp call _x86_64_get_dispatch@PLT - popq %rbp - popq %r9 popq %r8 popq %rcx popq %rdx @@ -38691,11 +38694,7 @@ pushq %rdx pushq %rcx pushq %r8 - pushq %r9 - pushq %rbp call _glapi_get_dispatch - popq %rbp - popq %r9 popq %r8 popq %rcx popq %rdx @@ -38989,7 +38988,15 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %r8 + pushq %r9 + pushq %rbp call _x86_64_get_dispatch@PLT + popq %rbp + popq %r9 + popq %r8 + popq %rcx popq %rdx popq %rsi popq %rdi @@ -39005,7 +39012,15 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %r8 + pushq %r9 + pushq %rbp call _glapi_get_dispatch + popq %rbp + popq %r9 + popq %r8 + popq %rcx popq %rdx popq %rsi popq %rdi @@ -39027,11 +39042,7 @@ pushq %rdi pushq %rsi pushq %rdx - pushq %rcx - pushq %r8 call _x86_64_get_dispatch@PLT - popq %r8 - popq %rcx popq %rdx popq %rsi popq %rdi @@ -39047,11 +39058,7 @@ pushq %rdi pushq %rsi pushq %rdx - pushq %rcx - pushq %r8 call _glapi_get_dispatch - popq %r8 - popq %rcx popq %rdx popq %rsi popq %rdi @@ -39071,7 +39078,15 @@ jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %r8 call _x86_64_get_dispatch@PLT + popq %r8 + popq %rcx + popq %rdx + popq %rsi popq %rdi movq 8024(%rax), %r11 jmp *%r11 @@ -39083,7 +39098,15 @@ jmp *%r11 1: pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %r8 call _glapi_get_dispatch + popq %r8 + popq %rcx + popq %rdx + popq %rsi popq %rdi movq 8024(%rax), %r11 jmp *%r11 @@ -39101,11 +39124,7 @@ jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi - pushq %rsi - pushq %rdx call _x86_64_get_dispatch@PLT - popq %rdx - popq %rsi popq %rdi movq 8032(%rax), %r11 jmp *%r11 @@ -39117,11 +39136,7 @@ jmp *%r11 1: pushq %rdi - pushq %rsi - pushq %rdx call _glapi_get_dispatch - popq %rdx - popq %rsi popq %rdi movq 8032(%rax), %r11 jmp *%r11 @@ -39141,15 +39156,7 @@ pushq %rdi pushq %rsi pushq %rdx - pushq %rcx - pushq %r8 - pushq %r9 - pushq %rbp call _x86_64_get_dispatch@PLT - popq %rbp - popq %r9 - popq %r8 - popq %rcx popq %rdx popq %rsi popq %rdi @@ -39165,15 +39172,7 @@ pushq %rdi pushq %rsi pushq %rdx - pushq %rcx - pushq %r8 - pushq %r9 - pushq %rbp call _glapi_get_dispatch - popq %rbp - popq %r9 - popq %r8 - popq %rcx popq %rdx popq %rsi popq %rdi @@ -39197,7 +39196,11 @@ pushq %rdx pushq %rcx pushq %r8 + pushq %r9 + pushq %rbp call _x86_64_get_dispatch@PLT + popq %rbp + popq %r9 popq %r8 popq %rcx popq %rdx @@ -39217,7 +39220,11 @@ pushq %rdx pushq %rcx pushq %r8 + pushq %r9 + pushq %rbp call _glapi_get_dispatch + popq %rbp + popq %r9 popq %r8 popq %rcx popq %rdx @@ -39287,7 +39294,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %r8 call _x86_64_get_dispatch@PLT + popq %r8 + popq %rcx popq %rdx popq %rsi popq %rdi @@ -39303,7 +39314,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %r8 call _glapi_get_dispatch + popq %r8 + popq %rcx popq %rdx popq %rsi popq %rdi @@ -39324,9 +39339,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _x86_64_get_dispatch@PLT - popq %rbp + popq %rdx popq %rsi popq %rdi movq 8072(%rax), %r11 @@ -39340,9 +39355,9 @@ 1: pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _glapi_get_dispatch - popq %rbp + popq %rdx popq %rsi popq %rdi movq 8072(%rax), %r11 @@ -39362,13 +39377,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 + pushq %rbp call _x86_64_get_dispatch@PLT - popq %r8 - popq %rcx - popq %rdx + popq %rbp popq %rsi popq %rdi movq 8080(%rax), %r11 @@ -39382,13 +39393,9 @@ 1: pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 + pushq %rbp call _glapi_get_dispatch - popq %r8 - popq %rcx - popq %rdx + popq %rbp popq %rsi popq %rdi movq 8080(%rax), %r11 @@ -39411,11 +39418,7 @@ pushq %rdx pushq %rcx pushq %r8 - pushq %r9 - pushq %rbp call _x86_64_get_dispatch@PLT - popq %rbp - popq %r9 popq %r8 popq %rcx popq %rdx @@ -39435,11 +39438,7 @@ pushq %rdx pushq %rcx pushq %r8 - pushq %r9 - pushq %rbp call _glapi_get_dispatch - popq %rbp - popq %r9 popq %r8 popq %rcx popq %rdx @@ -39559,16 +39558,29 @@ .size GL_PREFIX(_dispatch_stub_1013), .-GL_PREFIX(_dispatch_stub_1013) .p2align 4,,15 - .globl GL_PREFIX(InvalidateBufferData) - .type GL_PREFIX(InvalidateBufferData), @function -GL_PREFIX(InvalidateBufferData): + .globl GL_PREFIX(_dispatch_stub_1014) + .type GL_PREFIX(_dispatch_stub_1014), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1014)) +GL_PREFIX(_dispatch_stub_1014): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 8112(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %r8 + pushq %r9 + pushq %rbp call _x86_64_get_dispatch@PLT + popq %rbp + popq %r9 + popq %r8 + popq %rcx + popq %rdx + popq %rsi popq %rdi movq 8112(%rax), %r11 jmp *%r11 @@ -39580,11 +39592,52 @@ jmp *%r11 1: pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %r8 + pushq %r9 + pushq %rbp call _glapi_get_dispatch + popq %rbp + popq %r9 + popq %r8 + popq %rcx + popq %rdx + popq %rsi popq %rdi movq 8112(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ + .size GL_PREFIX(_dispatch_stub_1014), .-GL_PREFIX(_dispatch_stub_1014) + + .p2align 4,,15 + .globl GL_PREFIX(InvalidateBufferData) + .type GL_PREFIX(InvalidateBufferData), @function +GL_PREFIX(InvalidateBufferData): +#if defined(GLX_USE_TLS) + call _x86_64_get_dispatch@PLT + movq 8120(%rax), %r11 + jmp *%r11 +#elif defined(HAVE_PTHREAD) + pushq %rdi + call _x86_64_get_dispatch@PLT + popq %rdi + movq 8120(%rax), %r11 + jmp *%r11 +#else + movq _glapi_Dispatch(%rip), %rax + testq %rax, %rax + je 1f + movq 8120(%rax), %r11 + jmp *%r11 +1: + pushq %rdi + call _glapi_get_dispatch + popq %rdi + movq 8120(%rax), %r11 + jmp *%r11 +#endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(InvalidateBufferData), .-GL_PREFIX(InvalidateBufferData) .p2align 4,,15 @@ -39593,7 +39646,7 @@ GL_PREFIX(InvalidateBufferSubData): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8120(%rax), %r11 + movq 8128(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -39603,13 +39656,13 @@ popq %rdx popq %rsi popq %rdi - movq 8120(%rax), %r11 + movq 8128(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8120(%rax), %r11 + movq 8128(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -39619,7 +39672,7 @@ popq %rdx popq %rsi popq %rdi - movq 8120(%rax), %r11 + movq 8128(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(InvalidateBufferSubData), .-GL_PREFIX(InvalidateBufferSubData) @@ -39630,7 +39683,7 @@ GL_PREFIX(InvalidateFramebuffer): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8128(%rax), %r11 + movq 8136(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -39640,13 +39693,13 @@ popq %rdx popq %rsi popq %rdi - movq 8128(%rax), %r11 + movq 8136(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8128(%rax), %r11 + movq 8136(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -39656,7 +39709,7 @@ popq %rdx popq %rsi popq %rdi - movq 8128(%rax), %r11 + movq 8136(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(InvalidateFramebuffer), .-GL_PREFIX(InvalidateFramebuffer) @@ -39667,7 +39720,7 @@ GL_PREFIX(InvalidateSubFramebuffer): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8136(%rax), %r11 + movq 8144(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -39685,13 +39738,13 @@ popq %rdx popq %rsi popq %rdi - movq 8136(%rax), %r11 + movq 8144(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8136(%rax), %r11 + movq 8144(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -39709,7 +39762,7 @@ popq %rdx popq %rsi popq %rdi - movq 8136(%rax), %r11 + movq 8144(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(InvalidateSubFramebuffer), .-GL_PREFIX(InvalidateSubFramebuffer) @@ -39720,7 +39773,7 @@ GL_PREFIX(InvalidateTexImage): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8144(%rax), %r11 + movq 8152(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -39730,13 +39783,13 @@ popq %rbp popq %rsi popq %rdi - movq 8144(%rax), %r11 + movq 8152(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8144(%rax), %r11 + movq 8152(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -39746,7 +39799,7 @@ popq %rbp popq %rsi popq %rdi - movq 8144(%rax), %r11 + movq 8152(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(InvalidateTexImage), .-GL_PREFIX(InvalidateTexImage) @@ -39757,7 +39810,7 @@ GL_PREFIX(InvalidateTexSubImage): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8152(%rax), %r11 + movq 8160(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -39775,13 +39828,13 @@ popq %rdx popq %rsi popq %rdi - movq 8152(%rax), %r11 + movq 8160(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8152(%rax), %r11 + movq 8160(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -39799,19 +39852,19 @@ popq %rdx popq %rsi popq %rdi - movq 8152(%rax), %r11 + movq 8160(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(InvalidateTexSubImage), .-GL_PREFIX(InvalidateTexSubImage) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1020) - .type GL_PREFIX(_dispatch_stub_1020), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1020)) -GL_PREFIX(_dispatch_stub_1020): + .globl GL_PREFIX(_dispatch_stub_1021) + .type GL_PREFIX(_dispatch_stub_1021), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1021)) +GL_PREFIX(_dispatch_stub_1021): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8160(%rax), %r11 + movq 8168(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) subq $24, %rsp @@ -39821,13 +39874,13 @@ movq 8(%rsp), %xmm1 movq (%rsp), %xmm0 addq $24, %rsp - movq 8160(%rax), %r11 + movq 8168(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8160(%rax), %r11 + movq 8168(%rax), %r11 jmp *%r11 1: subq $24, %rsp @@ -39837,19 +39890,19 @@ movq 8(%rsp), %xmm1 movq (%rsp), %xmm0 addq $24, %rsp - movq 8160(%rax), %r11 + movq 8168(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1020), .-GL_PREFIX(_dispatch_stub_1020) + .size GL_PREFIX(_dispatch_stub_1021), .-GL_PREFIX(_dispatch_stub_1021) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1021) - .type GL_PREFIX(_dispatch_stub_1021), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1021)) -GL_PREFIX(_dispatch_stub_1021): + .globl GL_PREFIX(_dispatch_stub_1022) + .type GL_PREFIX(_dispatch_stub_1022), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1022)) +GL_PREFIX(_dispatch_stub_1022): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8168(%rax), %r11 + movq 8176(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) subq $40, %rsp @@ -39865,13 +39918,13 @@ movq 8(%rsp), %xmm1 movq (%rsp), %xmm0 addq $40, %rsp - movq 8168(%rax), %r11 + movq 8176(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8168(%rax), %r11 + movq 8176(%rax), %r11 jmp *%r11 1: subq $40, %rsp @@ -39887,49 +39940,49 @@ movq 8(%rsp), %xmm1 movq (%rsp), %xmm0 addq $40, %rsp - movq 8168(%rax), %r11 + movq 8176(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1021), .-GL_PREFIX(_dispatch_stub_1021) + .size GL_PREFIX(_dispatch_stub_1022), .-GL_PREFIX(_dispatch_stub_1022) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1022) - .type GL_PREFIX(_dispatch_stub_1022), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1022)) -GL_PREFIX(_dispatch_stub_1022): + .globl GL_PREFIX(_dispatch_stub_1023) + .type GL_PREFIX(_dispatch_stub_1023), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1023)) +GL_PREFIX(_dispatch_stub_1023): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8176(%rax), %r11 + movq 8184(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi call _x86_64_get_dispatch@PLT popq %rdi - movq 8176(%rax), %r11 + movq 8184(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8176(%rax), %r11 + movq 8184(%rax), %r11 jmp *%r11 1: pushq %rdi call _glapi_get_dispatch popq %rdi - movq 8176(%rax), %r11 + movq 8184(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1022), .-GL_PREFIX(_dispatch_stub_1022) + .size GL_PREFIX(_dispatch_stub_1023), .-GL_PREFIX(_dispatch_stub_1023) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1023) - .type GL_PREFIX(_dispatch_stub_1023), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1023)) -GL_PREFIX(_dispatch_stub_1023): + .globl GL_PREFIX(_dispatch_stub_1024) + .type GL_PREFIX(_dispatch_stub_1024), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1024)) +GL_PREFIX(_dispatch_stub_1024): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8184(%rax), %r11 + movq 8192(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -39943,13 +39996,13 @@ popq %rdx popq %rsi popq %rdi - movq 8184(%rax), %r11 + movq 8192(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8184(%rax), %r11 + movq 8192(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -39963,49 +40016,49 @@ popq %rdx popq %rsi popq %rdi - movq 8184(%rax), %r11 + movq 8192(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1023), .-GL_PREFIX(_dispatch_stub_1023) + .size GL_PREFIX(_dispatch_stub_1024), .-GL_PREFIX(_dispatch_stub_1024) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1024) - .type GL_PREFIX(_dispatch_stub_1024), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1024)) -GL_PREFIX(_dispatch_stub_1024): + .globl GL_PREFIX(_dispatch_stub_1025) + .type GL_PREFIX(_dispatch_stub_1025), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1025)) +GL_PREFIX(_dispatch_stub_1025): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8192(%rax), %r11 + movq 8200(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi call _x86_64_get_dispatch@PLT popq %rdi - movq 8192(%rax), %r11 + movq 8200(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8192(%rax), %r11 + movq 8200(%rax), %r11 jmp *%r11 1: pushq %rdi call _glapi_get_dispatch popq %rdi - movq 8192(%rax), %r11 + movq 8200(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1024), .-GL_PREFIX(_dispatch_stub_1024) + .size GL_PREFIX(_dispatch_stub_1025), .-GL_PREFIX(_dispatch_stub_1025) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1025) - .type GL_PREFIX(_dispatch_stub_1025), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1025)) -GL_PREFIX(_dispatch_stub_1025): + .globl GL_PREFIX(_dispatch_stub_1026) + .type GL_PREFIX(_dispatch_stub_1026), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1026)) +GL_PREFIX(_dispatch_stub_1026): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8200(%rax), %r11 + movq 8208(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -40019,13 +40072,13 @@ popq %rdx popq %rsi popq %rdi - movq 8200(%rax), %r11 + movq 8208(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8200(%rax), %r11 + movq 8208(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -40039,49 +40092,49 @@ popq %rdx popq %rsi popq %rdi - movq 8200(%rax), %r11 + movq 8208(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1025), .-GL_PREFIX(_dispatch_stub_1025) + .size GL_PREFIX(_dispatch_stub_1026), .-GL_PREFIX(_dispatch_stub_1026) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1026) - .type GL_PREFIX(_dispatch_stub_1026), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1026)) -GL_PREFIX(_dispatch_stub_1026): + .globl GL_PREFIX(_dispatch_stub_1027) + .type GL_PREFIX(_dispatch_stub_1027), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1027)) +GL_PREFIX(_dispatch_stub_1027): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8208(%rax), %r11 + movq 8216(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi call _x86_64_get_dispatch@PLT popq %rdi - movq 8208(%rax), %r11 + movq 8216(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8208(%rax), %r11 + movq 8216(%rax), %r11 jmp *%r11 1: pushq %rdi call _glapi_get_dispatch popq %rdi - movq 8208(%rax), %r11 + movq 8216(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1026), .-GL_PREFIX(_dispatch_stub_1026) + .size GL_PREFIX(_dispatch_stub_1027), .-GL_PREFIX(_dispatch_stub_1027) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1027) - .type GL_PREFIX(_dispatch_stub_1027), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1027)) -GL_PREFIX(_dispatch_stub_1027): + .globl GL_PREFIX(_dispatch_stub_1028) + .type GL_PREFIX(_dispatch_stub_1028), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1028)) +GL_PREFIX(_dispatch_stub_1028): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8216(%rax), %r11 + movq 8224(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -40095,13 +40148,13 @@ popq %rdx popq %rsi popq %rdi - movq 8216(%rax), %r11 + movq 8224(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8216(%rax), %r11 + movq 8224(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -40115,40 +40168,40 @@ popq %rdx popq %rsi popq %rdi - movq 8216(%rax), %r11 + movq 8224(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1027), .-GL_PREFIX(_dispatch_stub_1027) + .size GL_PREFIX(_dispatch_stub_1028), .-GL_PREFIX(_dispatch_stub_1028) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1028) - .type GL_PREFIX(_dispatch_stub_1028), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1028)) -GL_PREFIX(_dispatch_stub_1028): + .globl GL_PREFIX(_dispatch_stub_1029) + .type GL_PREFIX(_dispatch_stub_1029), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1029)) +GL_PREFIX(_dispatch_stub_1029): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8224(%rax), %r11 + movq 8232(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi call _x86_64_get_dispatch@PLT popq %rdi - movq 8224(%rax), %r11 + movq 8232(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8224(%rax), %r11 + movq 8232(%rax), %r11 jmp *%r11 1: pushq %rdi call _glapi_get_dispatch popq %rdi - movq 8224(%rax), %r11 + movq 8232(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1028), .-GL_PREFIX(_dispatch_stub_1028) + .size GL_PREFIX(_dispatch_stub_1029), .-GL_PREFIX(_dispatch_stub_1029) .p2align 4,,15 .globl GL_PREFIX(PointSizePointerOES) @@ -40156,7 +40209,7 @@ GL_PREFIX(PointSizePointerOES): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8232(%rax), %r11 + movq 8240(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -40166,13 +40219,13 @@ popq %rdx popq %rsi popq %rdi - movq 8232(%rax), %r11 + movq 8240(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8232(%rax), %r11 + movq 8240(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -40182,19 +40235,19 @@ popq %rdx popq %rsi popq %rdi - movq 8232(%rax), %r11 + movq 8240(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(PointSizePointerOES), .-GL_PREFIX(PointSizePointerOES) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1030) - .type GL_PREFIX(_dispatch_stub_1030), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1030)) -GL_PREFIX(_dispatch_stub_1030): + .globl GL_PREFIX(_dispatch_stub_1031) + .type GL_PREFIX(_dispatch_stub_1031), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1031)) +GL_PREFIX(_dispatch_stub_1031): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8240(%rax), %r11 + movq 8248(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -40204,13 +40257,13 @@ popq %rbp popq %rsi popq %rdi - movq 8240(%rax), %r11 + movq 8248(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8240(%rax), %r11 + movq 8248(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -40220,19 +40273,19 @@ popq %rbp popq %rsi popq %rdi - movq 8240(%rax), %r11 + movq 8248(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1030), .-GL_PREFIX(_dispatch_stub_1030) + .size GL_PREFIX(_dispatch_stub_1031), .-GL_PREFIX(_dispatch_stub_1031) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1031) - .type GL_PREFIX(_dispatch_stub_1031), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1031)) -GL_PREFIX(_dispatch_stub_1031): + .globl GL_PREFIX(_dispatch_stub_1032) + .type GL_PREFIX(_dispatch_stub_1032), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1032)) +GL_PREFIX(_dispatch_stub_1032): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8248(%rax), %r11 + movq 8256(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -40242,13 +40295,13 @@ popq %rbp popq %rsi popq %rdi - movq 8248(%rax), %r11 + movq 8256(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8248(%rax), %r11 + movq 8256(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -40258,40 +40311,40 @@ popq %rbp popq %rsi popq %rdi - movq 8248(%rax), %r11 + movq 8256(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1031), .-GL_PREFIX(_dispatch_stub_1031) + .size GL_PREFIX(_dispatch_stub_1032), .-GL_PREFIX(_dispatch_stub_1032) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1032) - .type GL_PREFIX(_dispatch_stub_1032), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1032)) -GL_PREFIX(_dispatch_stub_1032): + .globl GL_PREFIX(_dispatch_stub_1033) + .type GL_PREFIX(_dispatch_stub_1033), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1033)) +GL_PREFIX(_dispatch_stub_1033): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8256(%rax), %r11 + movq 8264(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi call _x86_64_get_dispatch@PLT popq %rdi - movq 8256(%rax), %r11 + movq 8264(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8256(%rax), %r11 + movq 8264(%rax), %r11 jmp *%r11 1: pushq %rdi call _glapi_get_dispatch popq %rdi - movq 8256(%rax), %r11 + movq 8264(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1032), .-GL_PREFIX(_dispatch_stub_1032) + .size GL_PREFIX(_dispatch_stub_1033), .-GL_PREFIX(_dispatch_stub_1033) .p2align 4,,15 .globl GL_PREFIX(ColorPointerEXT) @@ -40299,7 +40352,7 @@ GL_PREFIX(ColorPointerEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8264(%rax), %r11 + movq 8272(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -40313,13 +40366,13 @@ popq %rdx popq %rsi popq %rdi - movq 8264(%rax), %r11 + movq 8272(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8264(%rax), %r11 + movq 8272(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -40333,7 +40386,7 @@ popq %rdx popq %rsi popq %rdi - movq 8264(%rax), %r11 + movq 8272(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ColorPointerEXT), .-GL_PREFIX(ColorPointerEXT) @@ -40344,7 +40397,7 @@ GL_PREFIX(EdgeFlagPointerEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8272(%rax), %r11 + movq 8280(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -40354,13 +40407,13 @@ popq %rdx popq %rsi popq %rdi - movq 8272(%rax), %r11 + movq 8280(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8272(%rax), %r11 + movq 8280(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -40370,7 +40423,7 @@ popq %rdx popq %rsi popq %rdi - movq 8272(%rax), %r11 + movq 8280(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(EdgeFlagPointerEXT), .-GL_PREFIX(EdgeFlagPointerEXT) @@ -40381,7 +40434,7 @@ GL_PREFIX(IndexPointerEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8280(%rax), %r11 + movq 8288(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -40395,13 +40448,13 @@ popq %rdx popq %rsi popq %rdi - movq 8280(%rax), %r11 + movq 8288(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8280(%rax), %r11 + movq 8288(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -40415,7 +40468,7 @@ popq %rdx popq %rsi popq %rdi - movq 8280(%rax), %r11 + movq 8288(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(IndexPointerEXT), .-GL_PREFIX(IndexPointerEXT) @@ -40426,7 +40479,7 @@ GL_PREFIX(NormalPointerEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8288(%rax), %r11 + movq 8296(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -40440,13 +40493,13 @@ popq %rdx popq %rsi popq %rdi - movq 8288(%rax), %r11 + movq 8296(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8288(%rax), %r11 + movq 8296(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -40460,7 +40513,7 @@ popq %rdx popq %rsi popq %rdi - movq 8288(%rax), %r11 + movq 8296(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(NormalPointerEXT), .-GL_PREFIX(NormalPointerEXT) @@ -40471,7 +40524,7 @@ GL_PREFIX(TexCoordPointerEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8296(%rax), %r11 + movq 8304(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -40485,13 +40538,13 @@ popq %rdx popq %rsi popq %rdi - movq 8296(%rax), %r11 + movq 8304(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8296(%rax), %r11 + movq 8304(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -40505,7 +40558,7 @@ popq %rdx popq %rsi popq %rdi - movq 8296(%rax), %r11 + movq 8304(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(TexCoordPointerEXT), .-GL_PREFIX(TexCoordPointerEXT) @@ -40516,7 +40569,7 @@ GL_PREFIX(VertexPointerEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8304(%rax), %r11 + movq 8312(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -40530,13 +40583,13 @@ popq %rdx popq %rsi popq %rdi - movq 8304(%rax), %r11 + movq 8312(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8304(%rax), %r11 + movq 8312(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -40550,19 +40603,19 @@ popq %rdx popq %rsi popq %rdi - movq 8304(%rax), %r11 + movq 8312(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(VertexPointerEXT), .-GL_PREFIX(VertexPointerEXT) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1039) - .type GL_PREFIX(_dispatch_stub_1039), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1039)) -GL_PREFIX(_dispatch_stub_1039): + .globl GL_PREFIX(_dispatch_stub_1040) + .type GL_PREFIX(_dispatch_stub_1040), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1040)) +GL_PREFIX(_dispatch_stub_1040): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8312(%rax), %r11 + movq 8320(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -40572,13 +40625,13 @@ popq %rdx popq %rsi popq %rdi - movq 8312(%rax), %r11 + movq 8320(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8312(%rax), %r11 + movq 8320(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -40588,10 +40641,10 @@ popq %rdx popq %rsi popq %rdi - movq 8312(%rax), %r11 + movq 8320(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1039), .-GL_PREFIX(_dispatch_stub_1039) + .size GL_PREFIX(_dispatch_stub_1040), .-GL_PREFIX(_dispatch_stub_1040) .p2align 4,,15 .globl GL_PREFIX(ActiveShaderProgram) @@ -40599,7 +40652,7 @@ GL_PREFIX(ActiveShaderProgram): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8320(%rax), %r11 + movq 8328(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -40609,13 +40662,13 @@ popq %rbp popq %rsi popq %rdi - movq 8320(%rax), %r11 + movq 8328(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8320(%rax), %r11 + movq 8328(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -40625,7 +40678,7 @@ popq %rbp popq %rsi popq %rdi - movq 8320(%rax), %r11 + movq 8328(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ActiveShaderProgram), .-GL_PREFIX(ActiveShaderProgram) @@ -40636,25 +40689,25 @@ GL_PREFIX(BindProgramPipeline): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8328(%rax), %r11 + movq 8336(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi call _x86_64_get_dispatch@PLT popq %rdi - movq 8328(%rax), %r11 + movq 8336(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8328(%rax), %r11 + movq 8336(%rax), %r11 jmp *%r11 1: pushq %rdi call _glapi_get_dispatch popq %rdi - movq 8328(%rax), %r11 + movq 8336(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(BindProgramPipeline), .-GL_PREFIX(BindProgramPipeline) @@ -40665,7 +40718,7 @@ GL_PREFIX(CreateShaderProgramv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8336(%rax), %r11 + movq 8344(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -40675,13 +40728,13 @@ popq %rdx popq %rsi popq %rdi - movq 8336(%rax), %r11 + movq 8344(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8336(%rax), %r11 + movq 8344(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -40691,7 +40744,7 @@ popq %rdx popq %rsi popq %rdi - movq 8336(%rax), %r11 + movq 8344(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(CreateShaderProgramv), .-GL_PREFIX(CreateShaderProgramv) @@ -40702,7 +40755,7 @@ GL_PREFIX(DeleteProgramPipelines): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8344(%rax), %r11 + movq 8352(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -40712,13 +40765,13 @@ popq %rbp popq %rsi popq %rdi - movq 8344(%rax), %r11 + movq 8352(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8344(%rax), %r11 + movq 8352(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -40728,7 +40781,7 @@ popq %rbp popq %rsi popq %rdi - movq 8344(%rax), %r11 + movq 8352(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(DeleteProgramPipelines), .-GL_PREFIX(DeleteProgramPipelines) @@ -40739,7 +40792,7 @@ GL_PREFIX(GenProgramPipelines): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8352(%rax), %r11 + movq 8360(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -40749,13 +40802,13 @@ popq %rbp popq %rsi popq %rdi - movq 8352(%rax), %r11 + movq 8360(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8352(%rax), %r11 + movq 8360(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -40765,7 +40818,7 @@ popq %rbp popq %rsi popq %rdi - movq 8352(%rax), %r11 + movq 8360(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(GenProgramPipelines), .-GL_PREFIX(GenProgramPipelines) @@ -40776,7 +40829,7 @@ GL_PREFIX(GetProgramPipelineInfoLog): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8360(%rax), %r11 + movq 8368(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -40790,13 +40843,13 @@ popq %rdx popq %rsi popq %rdi - movq 8360(%rax), %r11 + movq 8368(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8360(%rax), %r11 + movq 8368(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -40810,7 +40863,7 @@ popq %rdx popq %rsi popq %rdi - movq 8360(%rax), %r11 + movq 8368(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(GetProgramPipelineInfoLog), .-GL_PREFIX(GetProgramPipelineInfoLog) @@ -40821,7 +40874,7 @@ GL_PREFIX(GetProgramPipelineiv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8368(%rax), %r11 + movq 8376(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -40831,13 +40884,13 @@ popq %rdx popq %rsi popq %rdi - movq 8368(%rax), %r11 + movq 8376(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8368(%rax), %r11 + movq 8376(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -40847,7 +40900,7 @@ popq %rdx popq %rsi popq %rdi - movq 8368(%rax), %r11 + movq 8376(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(GetProgramPipelineiv), .-GL_PREFIX(GetProgramPipelineiv) @@ -40858,25 +40911,25 @@ GL_PREFIX(IsProgramPipeline): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8376(%rax), %r11 + movq 8384(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi call _x86_64_get_dispatch@PLT popq %rdi - movq 8376(%rax), %r11 + movq 8384(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8376(%rax), %r11 + movq 8384(%rax), %r11 jmp *%r11 1: pushq %rdi call _glapi_get_dispatch popq %rdi - movq 8376(%rax), %r11 + movq 8384(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(IsProgramPipeline), .-GL_PREFIX(IsProgramPipeline) @@ -40887,7 +40940,7 @@ GL_PREFIX(LockArraysEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8384(%rax), %r11 + movq 8392(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -40897,13 +40950,13 @@ popq %rbp popq %rsi popq %rdi - movq 8384(%rax), %r11 + movq 8392(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8384(%rax), %r11 + movq 8392(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -40913,19 +40966,19 @@ popq %rbp popq %rsi popq %rdi - movq 8384(%rax), %r11 + movq 8392(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(LockArraysEXT), .-GL_PREFIX(LockArraysEXT) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1049) - .type GL_PREFIX(_dispatch_stub_1049), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1049)) -GL_PREFIX(_dispatch_stub_1049): + .globl GL_PREFIX(_dispatch_stub_1050) + .type GL_PREFIX(_dispatch_stub_1050), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1050)) +GL_PREFIX(_dispatch_stub_1050): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8392(%rax), %r11 + movq 8400(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) subq $24, %rsp @@ -40937,13 +40990,13 @@ movq 8(%rsp), %rsi movq (%rsp), %rdi addq $24, %rsp - movq 8392(%rax), %r11 + movq 8400(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8392(%rax), %r11 + movq 8400(%rax), %r11 jmp *%r11 1: subq $24, %rsp @@ -40955,19 +41008,19 @@ movq 8(%rsp), %rsi movq (%rsp), %rdi addq $24, %rsp - movq 8392(%rax), %r11 + movq 8400(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1049), .-GL_PREFIX(_dispatch_stub_1049) + .size GL_PREFIX(_dispatch_stub_1050), .-GL_PREFIX(_dispatch_stub_1050) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1050) - .type GL_PREFIX(_dispatch_stub_1050), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1050)) -GL_PREFIX(_dispatch_stub_1050): + .globl GL_PREFIX(_dispatch_stub_1051) + .type GL_PREFIX(_dispatch_stub_1051), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1051)) +GL_PREFIX(_dispatch_stub_1051): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8400(%rax), %r11 + movq 8408(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -40981,13 +41034,13 @@ popq %rdx popq %rsi popq %rdi - movq 8400(%rax), %r11 + movq 8408(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8400(%rax), %r11 + movq 8408(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -41001,10 +41054,10 @@ popq %rdx popq %rsi popq %rdi - movq 8400(%rax), %r11 + movq 8408(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1050), .-GL_PREFIX(_dispatch_stub_1050) + .size GL_PREFIX(_dispatch_stub_1051), .-GL_PREFIX(_dispatch_stub_1051) .p2align 4,,15 .globl GL_PREFIX(ProgramUniform1f) @@ -41012,7 +41065,7 @@ GL_PREFIX(ProgramUniform1f): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8408(%rax), %r11 + movq 8416(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) subq $24, %rsp @@ -41024,13 +41077,13 @@ movq 8(%rsp), %rsi movq (%rsp), %rdi addq $24, %rsp - movq 8408(%rax), %r11 + movq 8416(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8408(%rax), %r11 + movq 8416(%rax), %r11 jmp *%r11 1: subq $24, %rsp @@ -41042,7 +41095,7 @@ movq 8(%rsp), %rsi movq (%rsp), %rdi addq $24, %rsp - movq 8408(%rax), %r11 + movq 8416(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ProgramUniform1f), .-GL_PREFIX(ProgramUniform1f) @@ -41053,7 +41106,7 @@ GL_PREFIX(ProgramUniform1fv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8416(%rax), %r11 + movq 8424(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -41067,13 +41120,13 @@ popq %rdx popq %rsi popq %rdi - movq 8416(%rax), %r11 + movq 8424(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8416(%rax), %r11 + movq 8424(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -41087,7 +41140,7 @@ popq %rdx popq %rsi popq %rdi - movq 8416(%rax), %r11 + movq 8424(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ProgramUniform1fv), .-GL_PREFIX(ProgramUniform1fv) @@ -41098,7 +41151,7 @@ GL_PREFIX(ProgramUniform1i): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8424(%rax), %r11 + movq 8432(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -41108,13 +41161,13 @@ popq %rdx popq %rsi popq %rdi - movq 8424(%rax), %r11 + movq 8432(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8424(%rax), %r11 + movq 8432(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -41124,7 +41177,7 @@ popq %rdx popq %rsi popq %rdi - movq 8424(%rax), %r11 + movq 8432(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ProgramUniform1i), .-GL_PREFIX(ProgramUniform1i) @@ -41135,7 +41188,7 @@ GL_PREFIX(ProgramUniform1iv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8432(%rax), %r11 + movq 8440(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -41149,13 +41202,13 @@ popq %rdx popq %rsi popq %rdi - movq 8432(%rax), %r11 + movq 8440(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8432(%rax), %r11 + movq 8440(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -41169,7 +41222,7 @@ popq %rdx popq %rsi popq %rdi - movq 8432(%rax), %r11 + movq 8440(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ProgramUniform1iv), .-GL_PREFIX(ProgramUniform1iv) @@ -41180,7 +41233,7 @@ GL_PREFIX(ProgramUniform1ui): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8440(%rax), %r11 + movq 8448(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -41190,13 +41243,13 @@ popq %rdx popq %rsi popq %rdi - movq 8440(%rax), %r11 + movq 8448(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8440(%rax), %r11 + movq 8448(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -41206,7 +41259,7 @@ popq %rdx popq %rsi popq %rdi - movq 8440(%rax), %r11 + movq 8448(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ProgramUniform1ui), .-GL_PREFIX(ProgramUniform1ui) @@ -41217,7 +41270,7 @@ GL_PREFIX(ProgramUniform1uiv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8448(%rax), %r11 + movq 8456(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -41231,13 +41284,13 @@ popq %rdx popq %rsi popq %rdi - movq 8448(%rax), %r11 + movq 8456(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8448(%rax), %r11 + movq 8456(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -41251,19 +41304,19 @@ popq %rdx popq %rsi popq %rdi - movq 8448(%rax), %r11 + movq 8456(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ProgramUniform1uiv), .-GL_PREFIX(ProgramUniform1uiv) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1057) - .type GL_PREFIX(_dispatch_stub_1057), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1057)) -GL_PREFIX(_dispatch_stub_1057): + .globl GL_PREFIX(_dispatch_stub_1058) + .type GL_PREFIX(_dispatch_stub_1058), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1058)) +GL_PREFIX(_dispatch_stub_1058): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8456(%rax), %r11 + movq 8464(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) subq $40, %rsp @@ -41277,13 +41330,13 @@ movq 8(%rsp), %rsi movq (%rsp), %rdi addq $40, %rsp - movq 8456(%rax), %r11 + movq 8464(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8456(%rax), %r11 + movq 8464(%rax), %r11 jmp *%r11 1: subq $40, %rsp @@ -41297,19 +41350,19 @@ movq 8(%rsp), %rsi movq (%rsp), %rdi addq $40, %rsp - movq 8456(%rax), %r11 + movq 8464(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1057), .-GL_PREFIX(_dispatch_stub_1057) + .size GL_PREFIX(_dispatch_stub_1058), .-GL_PREFIX(_dispatch_stub_1058) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1058) - .type GL_PREFIX(_dispatch_stub_1058), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1058)) -GL_PREFIX(_dispatch_stub_1058): + .globl GL_PREFIX(_dispatch_stub_1059) + .type GL_PREFIX(_dispatch_stub_1059), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1059)) +GL_PREFIX(_dispatch_stub_1059): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8464(%rax), %r11 + movq 8472(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -41323,13 +41376,13 @@ popq %rdx popq %rsi popq %rdi - movq 8464(%rax), %r11 + movq 8472(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8464(%rax), %r11 + movq 8472(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -41343,10 +41396,10 @@ popq %rdx popq %rsi popq %rdi - movq 8464(%rax), %r11 + movq 8472(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1058), .-GL_PREFIX(_dispatch_stub_1058) + .size GL_PREFIX(_dispatch_stub_1059), .-GL_PREFIX(_dispatch_stub_1059) .p2align 4,,15 .globl GL_PREFIX(ProgramUniform2f) @@ -41354,7 +41407,7 @@ GL_PREFIX(ProgramUniform2f): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8472(%rax), %r11 + movq 8480(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) subq $40, %rsp @@ -41368,13 +41421,13 @@ movq 8(%rsp), %rsi movq (%rsp), %rdi addq $40, %rsp - movq 8472(%rax), %r11 + movq 8480(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8472(%rax), %r11 + movq 8480(%rax), %r11 jmp *%r11 1: subq $40, %rsp @@ -41388,7 +41441,7 @@ movq 8(%rsp), %rsi movq (%rsp), %rdi addq $40, %rsp - movq 8472(%rax), %r11 + movq 8480(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ProgramUniform2f), .-GL_PREFIX(ProgramUniform2f) @@ -41399,7 +41452,7 @@ GL_PREFIX(ProgramUniform2fv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8480(%rax), %r11 + movq 8488(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -41413,13 +41466,13 @@ popq %rdx popq %rsi popq %rdi - movq 8480(%rax), %r11 + movq 8488(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8480(%rax), %r11 + movq 8488(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -41433,7 +41486,7 @@ popq %rdx popq %rsi popq %rdi - movq 8480(%rax), %r11 + movq 8488(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ProgramUniform2fv), .-GL_PREFIX(ProgramUniform2fv) @@ -41444,7 +41497,7 @@ GL_PREFIX(ProgramUniform2i): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8488(%rax), %r11 + movq 8496(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -41458,13 +41511,13 @@ popq %rdx popq %rsi popq %rdi - movq 8488(%rax), %r11 + movq 8496(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8488(%rax), %r11 + movq 8496(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -41478,7 +41531,7 @@ popq %rdx popq %rsi popq %rdi - movq 8488(%rax), %r11 + movq 8496(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ProgramUniform2i), .-GL_PREFIX(ProgramUniform2i) @@ -41489,7 +41542,7 @@ GL_PREFIX(ProgramUniform2iv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8496(%rax), %r11 + movq 8504(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -41503,13 +41556,13 @@ popq %rdx popq %rsi popq %rdi - movq 8496(%rax), %r11 + movq 8504(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8496(%rax), %r11 + movq 8504(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -41523,7 +41576,7 @@ popq %rdx popq %rsi popq %rdi - movq 8496(%rax), %r11 + movq 8504(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ProgramUniform2iv), .-GL_PREFIX(ProgramUniform2iv) @@ -41534,7 +41587,7 @@ GL_PREFIX(ProgramUniform2ui): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8504(%rax), %r11 + movq 8512(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -41548,13 +41601,13 @@ popq %rdx popq %rsi popq %rdi - movq 8504(%rax), %r11 + movq 8512(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8504(%rax), %r11 + movq 8512(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -41568,7 +41621,7 @@ popq %rdx popq %rsi popq %rdi - movq 8504(%rax), %r11 + movq 8512(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ProgramUniform2ui), .-GL_PREFIX(ProgramUniform2ui) @@ -41579,7 +41632,7 @@ GL_PREFIX(ProgramUniform2uiv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8512(%rax), %r11 + movq 8520(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -41593,13 +41646,13 @@ popq %rdx popq %rsi popq %rdi - movq 8512(%rax), %r11 + movq 8520(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8512(%rax), %r11 + movq 8520(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -41613,19 +41666,19 @@ popq %rdx popq %rsi popq %rdi - movq 8512(%rax), %r11 + movq 8520(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ProgramUniform2uiv), .-GL_PREFIX(ProgramUniform2uiv) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1065) - .type GL_PREFIX(_dispatch_stub_1065), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1065)) -GL_PREFIX(_dispatch_stub_1065): + .globl GL_PREFIX(_dispatch_stub_1066) + .type GL_PREFIX(_dispatch_stub_1066), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1066)) +GL_PREFIX(_dispatch_stub_1066): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8520(%rax), %r11 + movq 8528(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) subq $40, %rsp @@ -41641,13 +41694,13 @@ movq 8(%rsp), %rsi movq (%rsp), %rdi addq $40, %rsp - movq 8520(%rax), %r11 + movq 8528(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8520(%rax), %r11 + movq 8528(%rax), %r11 jmp *%r11 1: subq $40, %rsp @@ -41663,19 +41716,19 @@ movq 8(%rsp), %rsi movq (%rsp), %rdi addq $40, %rsp - movq 8520(%rax), %r11 + movq 8528(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1065), .-GL_PREFIX(_dispatch_stub_1065) + .size GL_PREFIX(_dispatch_stub_1066), .-GL_PREFIX(_dispatch_stub_1066) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1066) - .type GL_PREFIX(_dispatch_stub_1066), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1066)) -GL_PREFIX(_dispatch_stub_1066): + .globl GL_PREFIX(_dispatch_stub_1067) + .type GL_PREFIX(_dispatch_stub_1067), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1067)) +GL_PREFIX(_dispatch_stub_1067): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8528(%rax), %r11 + movq 8536(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -41689,13 +41742,13 @@ popq %rdx popq %rsi popq %rdi - movq 8528(%rax), %r11 + movq 8536(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8528(%rax), %r11 + movq 8536(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -41709,10 +41762,10 @@ popq %rdx popq %rsi popq %rdi - movq 8528(%rax), %r11 + movq 8536(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1066), .-GL_PREFIX(_dispatch_stub_1066) + .size GL_PREFIX(_dispatch_stub_1067), .-GL_PREFIX(_dispatch_stub_1067) .p2align 4,,15 .globl GL_PREFIX(ProgramUniform3f) @@ -41720,7 +41773,7 @@ GL_PREFIX(ProgramUniform3f): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8536(%rax), %r11 + movq 8544(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) subq $40, %rsp @@ -41736,13 +41789,13 @@ movq 8(%rsp), %rsi movq (%rsp), %rdi addq $40, %rsp - movq 8536(%rax), %r11 + movq 8544(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8536(%rax), %r11 + movq 8544(%rax), %r11 jmp *%r11 1: subq $40, %rsp @@ -41758,7 +41811,7 @@ movq 8(%rsp), %rsi movq (%rsp), %rdi addq $40, %rsp - movq 8536(%rax), %r11 + movq 8544(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ProgramUniform3f), .-GL_PREFIX(ProgramUniform3f) @@ -41769,7 +41822,7 @@ GL_PREFIX(ProgramUniform3fv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8544(%rax), %r11 + movq 8552(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -41783,13 +41836,13 @@ popq %rdx popq %rsi popq %rdi - movq 8544(%rax), %r11 + movq 8552(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8544(%rax), %r11 + movq 8552(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -41803,7 +41856,7 @@ popq %rdx popq %rsi popq %rdi - movq 8544(%rax), %r11 + movq 8552(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ProgramUniform3fv), .-GL_PREFIX(ProgramUniform3fv) @@ -41814,7 +41867,7 @@ GL_PREFIX(ProgramUniform3i): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8552(%rax), %r11 + movq 8560(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -41828,13 +41881,13 @@ popq %rdx popq %rsi popq %rdi - movq 8552(%rax), %r11 + movq 8560(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8552(%rax), %r11 + movq 8560(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -41848,7 +41901,7 @@ popq %rdx popq %rsi popq %rdi - movq 8552(%rax), %r11 + movq 8560(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ProgramUniform3i), .-GL_PREFIX(ProgramUniform3i) @@ -41859,7 +41912,7 @@ GL_PREFIX(ProgramUniform3iv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8560(%rax), %r11 + movq 8568(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -41873,13 +41926,13 @@ popq %rdx popq %rsi popq %rdi - movq 8560(%rax), %r11 + movq 8568(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8560(%rax), %r11 + movq 8568(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -41893,7 +41946,7 @@ popq %rdx popq %rsi popq %rdi - movq 8560(%rax), %r11 + movq 8568(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ProgramUniform3iv), .-GL_PREFIX(ProgramUniform3iv) @@ -41904,7 +41957,7 @@ GL_PREFIX(ProgramUniform3ui): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8568(%rax), %r11 + movq 8576(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -41918,13 +41971,13 @@ popq %rdx popq %rsi popq %rdi - movq 8568(%rax), %r11 + movq 8576(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8568(%rax), %r11 + movq 8576(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -41938,7 +41991,7 @@ popq %rdx popq %rsi popq %rdi - movq 8568(%rax), %r11 + movq 8576(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ProgramUniform3ui), .-GL_PREFIX(ProgramUniform3ui) @@ -41949,7 +42002,7 @@ GL_PREFIX(ProgramUniform3uiv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8576(%rax), %r11 + movq 8584(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -41963,13 +42016,13 @@ popq %rdx popq %rsi popq %rdi - movq 8576(%rax), %r11 + movq 8584(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8576(%rax), %r11 + movq 8584(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -41983,19 +42036,19 @@ popq %rdx popq %rsi popq %rdi - movq 8576(%rax), %r11 + movq 8584(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ProgramUniform3uiv), .-GL_PREFIX(ProgramUniform3uiv) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1073) - .type GL_PREFIX(_dispatch_stub_1073), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1073)) -GL_PREFIX(_dispatch_stub_1073): + .globl GL_PREFIX(_dispatch_stub_1074) + .type GL_PREFIX(_dispatch_stub_1074), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1074)) +GL_PREFIX(_dispatch_stub_1074): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8584(%rax), %r11 + movq 8592(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) subq $56, %rsp @@ -42013,13 +42066,13 @@ movq 8(%rsp), %rsi movq (%rsp), %rdi addq $56, %rsp - movq 8584(%rax), %r11 + movq 8592(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8584(%rax), %r11 + movq 8592(%rax), %r11 jmp *%r11 1: subq $56, %rsp @@ -42037,19 +42090,19 @@ movq 8(%rsp), %rsi movq (%rsp), %rdi addq $56, %rsp - movq 8584(%rax), %r11 + movq 8592(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1073), .-GL_PREFIX(_dispatch_stub_1073) + .size GL_PREFIX(_dispatch_stub_1074), .-GL_PREFIX(_dispatch_stub_1074) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1074) - .type GL_PREFIX(_dispatch_stub_1074), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1074)) -GL_PREFIX(_dispatch_stub_1074): + .globl GL_PREFIX(_dispatch_stub_1075) + .type GL_PREFIX(_dispatch_stub_1075), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1075)) +GL_PREFIX(_dispatch_stub_1075): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8592(%rax), %r11 + movq 8600(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -42063,13 +42116,13 @@ popq %rdx popq %rsi popq %rdi - movq 8592(%rax), %r11 + movq 8600(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8592(%rax), %r11 + movq 8600(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -42083,10 +42136,10 @@ popq %rdx popq %rsi popq %rdi - movq 8592(%rax), %r11 + movq 8600(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1074), .-GL_PREFIX(_dispatch_stub_1074) + .size GL_PREFIX(_dispatch_stub_1075), .-GL_PREFIX(_dispatch_stub_1075) .p2align 4,,15 .globl GL_PREFIX(ProgramUniform4f) @@ -42094,7 +42147,7 @@ GL_PREFIX(ProgramUniform4f): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8600(%rax), %r11 + movq 8608(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) subq $56, %rsp @@ -42112,13 +42165,13 @@ movq 8(%rsp), %rsi movq (%rsp), %rdi addq $56, %rsp - movq 8600(%rax), %r11 + movq 8608(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8600(%rax), %r11 + movq 8608(%rax), %r11 jmp *%r11 1: subq $56, %rsp @@ -42136,7 +42189,7 @@ movq 8(%rsp), %rsi movq (%rsp), %rdi addq $56, %rsp - movq 8600(%rax), %r11 + movq 8608(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ProgramUniform4f), .-GL_PREFIX(ProgramUniform4f) @@ -42147,7 +42200,7 @@ GL_PREFIX(ProgramUniform4fv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8608(%rax), %r11 + movq 8616(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -42161,13 +42214,13 @@ popq %rdx popq %rsi popq %rdi - movq 8608(%rax), %r11 + movq 8616(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8608(%rax), %r11 + movq 8616(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -42181,7 +42234,7 @@ popq %rdx popq %rsi popq %rdi - movq 8608(%rax), %r11 + movq 8616(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ProgramUniform4fv), .-GL_PREFIX(ProgramUniform4fv) @@ -42192,7 +42245,7 @@ GL_PREFIX(ProgramUniform4i): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8616(%rax), %r11 + movq 8624(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -42210,13 +42263,13 @@ popq %rdx popq %rsi popq %rdi - movq 8616(%rax), %r11 + movq 8624(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8616(%rax), %r11 + movq 8624(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -42234,7 +42287,7 @@ popq %rdx popq %rsi popq %rdi - movq 8616(%rax), %r11 + movq 8624(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ProgramUniform4i), .-GL_PREFIX(ProgramUniform4i) @@ -42245,7 +42298,7 @@ GL_PREFIX(ProgramUniform4iv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8624(%rax), %r11 + movq 8632(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -42259,13 +42312,13 @@ popq %rdx popq %rsi popq %rdi - movq 8624(%rax), %r11 + movq 8632(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8624(%rax), %r11 + movq 8632(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -42279,7 +42332,7 @@ popq %rdx popq %rsi popq %rdi - movq 8624(%rax), %r11 + movq 8632(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ProgramUniform4iv), .-GL_PREFIX(ProgramUniform4iv) @@ -42290,7 +42343,7 @@ GL_PREFIX(ProgramUniform4ui): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8632(%rax), %r11 + movq 8640(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -42308,13 +42361,13 @@ popq %rdx popq %rsi popq %rdi - movq 8632(%rax), %r11 + movq 8640(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8632(%rax), %r11 + movq 8640(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -42332,7 +42385,7 @@ popq %rdx popq %rsi popq %rdi - movq 8632(%rax), %r11 + movq 8640(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ProgramUniform4ui), .-GL_PREFIX(ProgramUniform4ui) @@ -42343,7 +42396,7 @@ GL_PREFIX(ProgramUniform4uiv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8640(%rax), %r11 + movq 8648(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -42357,52 +42410,6 @@ popq %rdx popq %rsi popq %rdi - movq 8640(%rax), %r11 - jmp *%r11 -#else - movq _glapi_Dispatch(%rip), %rax - testq %rax, %rax - je 1f - movq 8640(%rax), %r11 - jmp *%r11 -1: - pushq %rdi - pushq %rsi - pushq %rdx - pushq %rcx - pushq %rbp - call _glapi_get_dispatch - popq %rbp - popq %rcx - popq %rdx - popq %rsi - popq %rdi - movq 8640(%rax), %r11 - jmp *%r11 -#endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(ProgramUniform4uiv), .-GL_PREFIX(ProgramUniform4uiv) - - .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1081) - .type GL_PREFIX(_dispatch_stub_1081), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1081)) -GL_PREFIX(_dispatch_stub_1081): -#if defined(GLX_USE_TLS) - call _x86_64_get_dispatch@PLT - movq 8648(%rax), %r11 - jmp *%r11 -#elif defined(HAVE_PTHREAD) - pushq %rdi - pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 - call _x86_64_get_dispatch@PLT - popq %r8 - popq %rcx - popq %rdx - popq %rsi - popq %rdi movq 8648(%rax), %r11 jmp *%r11 #else @@ -42416,9 +42423,9 @@ pushq %rsi pushq %rdx pushq %rcx - pushq %r8 + pushq %rbp call _glapi_get_dispatch - popq %r8 + popq %rbp popq %rcx popq %rdx popq %rsi @@ -42426,12 +42433,13 @@ movq 8648(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1081), .-GL_PREFIX(_dispatch_stub_1081) + .size GL_PREFIX(ProgramUniform4uiv), .-GL_PREFIX(ProgramUniform4uiv) .p2align 4,,15 - .globl GL_PREFIX(ProgramUniformMatrix2fv) - .type GL_PREFIX(ProgramUniformMatrix2fv), @function -GL_PREFIX(ProgramUniformMatrix2fv): + .globl GL_PREFIX(_dispatch_stub_1082) + .type GL_PREFIX(_dispatch_stub_1082), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1082)) +GL_PREFIX(_dispatch_stub_1082): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 8656(%rax), %r11 @@ -42471,13 +42479,12 @@ movq 8656(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(ProgramUniformMatrix2fv), .-GL_PREFIX(ProgramUniformMatrix2fv) + .size GL_PREFIX(_dispatch_stub_1082), .-GL_PREFIX(_dispatch_stub_1082) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1083) - .type GL_PREFIX(_dispatch_stub_1083), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1083)) -GL_PREFIX(_dispatch_stub_1083): + .globl GL_PREFIX(ProgramUniformMatrix2fv) + .type GL_PREFIX(ProgramUniformMatrix2fv), @function +GL_PREFIX(ProgramUniformMatrix2fv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 8664(%rax), %r11 @@ -42517,12 +42524,13 @@ movq 8664(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1083), .-GL_PREFIX(_dispatch_stub_1083) + .size GL_PREFIX(ProgramUniformMatrix2fv), .-GL_PREFIX(ProgramUniformMatrix2fv) .p2align 4,,15 - .globl GL_PREFIX(ProgramUniformMatrix2x3fv) - .type GL_PREFIX(ProgramUniformMatrix2x3fv), @function -GL_PREFIX(ProgramUniformMatrix2x3fv): + .globl GL_PREFIX(_dispatch_stub_1084) + .type GL_PREFIX(_dispatch_stub_1084), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1084)) +GL_PREFIX(_dispatch_stub_1084): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 8672(%rax), %r11 @@ -42562,13 +42570,12 @@ movq 8672(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(ProgramUniformMatrix2x3fv), .-GL_PREFIX(ProgramUniformMatrix2x3fv) + .size GL_PREFIX(_dispatch_stub_1084), .-GL_PREFIX(_dispatch_stub_1084) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1085) - .type GL_PREFIX(_dispatch_stub_1085), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1085)) -GL_PREFIX(_dispatch_stub_1085): + .globl GL_PREFIX(ProgramUniformMatrix2x3fv) + .type GL_PREFIX(ProgramUniformMatrix2x3fv), @function +GL_PREFIX(ProgramUniformMatrix2x3fv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 8680(%rax), %r11 @@ -42608,12 +42615,13 @@ movq 8680(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1085), .-GL_PREFIX(_dispatch_stub_1085) + .size GL_PREFIX(ProgramUniformMatrix2x3fv), .-GL_PREFIX(ProgramUniformMatrix2x3fv) .p2align 4,,15 - .globl GL_PREFIX(ProgramUniformMatrix2x4fv) - .type GL_PREFIX(ProgramUniformMatrix2x4fv), @function -GL_PREFIX(ProgramUniformMatrix2x4fv): + .globl GL_PREFIX(_dispatch_stub_1086) + .type GL_PREFIX(_dispatch_stub_1086), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1086)) +GL_PREFIX(_dispatch_stub_1086): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 8688(%rax), %r11 @@ -42653,13 +42661,12 @@ movq 8688(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(ProgramUniformMatrix2x4fv), .-GL_PREFIX(ProgramUniformMatrix2x4fv) + .size GL_PREFIX(_dispatch_stub_1086), .-GL_PREFIX(_dispatch_stub_1086) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1087) - .type GL_PREFIX(_dispatch_stub_1087), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1087)) -GL_PREFIX(_dispatch_stub_1087): + .globl GL_PREFIX(ProgramUniformMatrix2x4fv) + .type GL_PREFIX(ProgramUniformMatrix2x4fv), @function +GL_PREFIX(ProgramUniformMatrix2x4fv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 8696(%rax), %r11 @@ -42699,12 +42706,13 @@ movq 8696(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1087), .-GL_PREFIX(_dispatch_stub_1087) + .size GL_PREFIX(ProgramUniformMatrix2x4fv), .-GL_PREFIX(ProgramUniformMatrix2x4fv) .p2align 4,,15 - .globl GL_PREFIX(ProgramUniformMatrix3fv) - .type GL_PREFIX(ProgramUniformMatrix3fv), @function -GL_PREFIX(ProgramUniformMatrix3fv): + .globl GL_PREFIX(_dispatch_stub_1088) + .type GL_PREFIX(_dispatch_stub_1088), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1088)) +GL_PREFIX(_dispatch_stub_1088): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 8704(%rax), %r11 @@ -42744,13 +42752,12 @@ movq 8704(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(ProgramUniformMatrix3fv), .-GL_PREFIX(ProgramUniformMatrix3fv) + .size GL_PREFIX(_dispatch_stub_1088), .-GL_PREFIX(_dispatch_stub_1088) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1089) - .type GL_PREFIX(_dispatch_stub_1089), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1089)) -GL_PREFIX(_dispatch_stub_1089): + .globl GL_PREFIX(ProgramUniformMatrix3fv) + .type GL_PREFIX(ProgramUniformMatrix3fv), @function +GL_PREFIX(ProgramUniformMatrix3fv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 8712(%rax), %r11 @@ -42790,12 +42797,13 @@ movq 8712(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1089), .-GL_PREFIX(_dispatch_stub_1089) + .size GL_PREFIX(ProgramUniformMatrix3fv), .-GL_PREFIX(ProgramUniformMatrix3fv) .p2align 4,,15 - .globl GL_PREFIX(ProgramUniformMatrix3x2fv) - .type GL_PREFIX(ProgramUniformMatrix3x2fv), @function -GL_PREFIX(ProgramUniformMatrix3x2fv): + .globl GL_PREFIX(_dispatch_stub_1090) + .type GL_PREFIX(_dispatch_stub_1090), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1090)) +GL_PREFIX(_dispatch_stub_1090): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 8720(%rax), %r11 @@ -42835,13 +42843,12 @@ movq 8720(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(ProgramUniformMatrix3x2fv), .-GL_PREFIX(ProgramUniformMatrix3x2fv) + .size GL_PREFIX(_dispatch_stub_1090), .-GL_PREFIX(_dispatch_stub_1090) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1091) - .type GL_PREFIX(_dispatch_stub_1091), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1091)) -GL_PREFIX(_dispatch_stub_1091): + .globl GL_PREFIX(ProgramUniformMatrix3x2fv) + .type GL_PREFIX(ProgramUniformMatrix3x2fv), @function +GL_PREFIX(ProgramUniformMatrix3x2fv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 8728(%rax), %r11 @@ -42881,12 +42888,13 @@ movq 8728(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1091), .-GL_PREFIX(_dispatch_stub_1091) + .size GL_PREFIX(ProgramUniformMatrix3x2fv), .-GL_PREFIX(ProgramUniformMatrix3x2fv) .p2align 4,,15 - .globl GL_PREFIX(ProgramUniformMatrix3x4fv) - .type GL_PREFIX(ProgramUniformMatrix3x4fv), @function -GL_PREFIX(ProgramUniformMatrix3x4fv): + .globl GL_PREFIX(_dispatch_stub_1092) + .type GL_PREFIX(_dispatch_stub_1092), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1092)) +GL_PREFIX(_dispatch_stub_1092): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 8736(%rax), %r11 @@ -42926,13 +42934,12 @@ movq 8736(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(ProgramUniformMatrix3x4fv), .-GL_PREFIX(ProgramUniformMatrix3x4fv) + .size GL_PREFIX(_dispatch_stub_1092), .-GL_PREFIX(_dispatch_stub_1092) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1093) - .type GL_PREFIX(_dispatch_stub_1093), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1093)) -GL_PREFIX(_dispatch_stub_1093): + .globl GL_PREFIX(ProgramUniformMatrix3x4fv) + .type GL_PREFIX(ProgramUniformMatrix3x4fv), @function +GL_PREFIX(ProgramUniformMatrix3x4fv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 8744(%rax), %r11 @@ -42972,12 +42979,13 @@ movq 8744(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1093), .-GL_PREFIX(_dispatch_stub_1093) + .size GL_PREFIX(ProgramUniformMatrix3x4fv), .-GL_PREFIX(ProgramUniformMatrix3x4fv) .p2align 4,,15 - .globl GL_PREFIX(ProgramUniformMatrix4fv) - .type GL_PREFIX(ProgramUniformMatrix4fv), @function -GL_PREFIX(ProgramUniformMatrix4fv): + .globl GL_PREFIX(_dispatch_stub_1094) + .type GL_PREFIX(_dispatch_stub_1094), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1094)) +GL_PREFIX(_dispatch_stub_1094): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 8752(%rax), %r11 @@ -43017,13 +43025,12 @@ movq 8752(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(ProgramUniformMatrix4fv), .-GL_PREFIX(ProgramUniformMatrix4fv) + .size GL_PREFIX(_dispatch_stub_1094), .-GL_PREFIX(_dispatch_stub_1094) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1095) - .type GL_PREFIX(_dispatch_stub_1095), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1095)) -GL_PREFIX(_dispatch_stub_1095): + .globl GL_PREFIX(ProgramUniformMatrix4fv) + .type GL_PREFIX(ProgramUniformMatrix4fv), @function +GL_PREFIX(ProgramUniformMatrix4fv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 8760(%rax), %r11 @@ -43063,12 +43070,13 @@ movq 8760(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1095), .-GL_PREFIX(_dispatch_stub_1095) + .size GL_PREFIX(ProgramUniformMatrix4fv), .-GL_PREFIX(ProgramUniformMatrix4fv) .p2align 4,,15 - .globl GL_PREFIX(ProgramUniformMatrix4x2fv) - .type GL_PREFIX(ProgramUniformMatrix4x2fv), @function -GL_PREFIX(ProgramUniformMatrix4x2fv): + .globl GL_PREFIX(_dispatch_stub_1096) + .type GL_PREFIX(_dispatch_stub_1096), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1096)) +GL_PREFIX(_dispatch_stub_1096): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 8768(%rax), %r11 @@ -43108,13 +43116,12 @@ movq 8768(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(ProgramUniformMatrix4x2fv), .-GL_PREFIX(ProgramUniformMatrix4x2fv) + .size GL_PREFIX(_dispatch_stub_1096), .-GL_PREFIX(_dispatch_stub_1096) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1097) - .type GL_PREFIX(_dispatch_stub_1097), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1097)) -GL_PREFIX(_dispatch_stub_1097): + .globl GL_PREFIX(ProgramUniformMatrix4x2fv) + .type GL_PREFIX(ProgramUniformMatrix4x2fv), @function +GL_PREFIX(ProgramUniformMatrix4x2fv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 8776(%rax), %r11 @@ -43154,12 +43161,13 @@ movq 8776(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1097), .-GL_PREFIX(_dispatch_stub_1097) + .size GL_PREFIX(ProgramUniformMatrix4x2fv), .-GL_PREFIX(ProgramUniformMatrix4x2fv) .p2align 4,,15 - .globl GL_PREFIX(ProgramUniformMatrix4x3fv) - .type GL_PREFIX(ProgramUniformMatrix4x3fv), @function -GL_PREFIX(ProgramUniformMatrix4x3fv): + .globl GL_PREFIX(_dispatch_stub_1098) + .type GL_PREFIX(_dispatch_stub_1098), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1098)) +GL_PREFIX(_dispatch_stub_1098): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 8784(%rax), %r11 @@ -43199,33 +43207,78 @@ movq 8784(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(ProgramUniformMatrix4x3fv), .-GL_PREFIX(ProgramUniformMatrix4x3fv) + .size GL_PREFIX(_dispatch_stub_1098), .-GL_PREFIX(_dispatch_stub_1098) .p2align 4,,15 - .globl GL_PREFIX(UnlockArraysEXT) - .type GL_PREFIX(UnlockArraysEXT), @function -GL_PREFIX(UnlockArraysEXT): + .globl GL_PREFIX(ProgramUniformMatrix4x3fv) + .type GL_PREFIX(ProgramUniformMatrix4x3fv), @function +GL_PREFIX(ProgramUniformMatrix4x3fv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 8792(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) - pushq %rbp + pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %r8 call _x86_64_get_dispatch@PLT - popq %rbp - movq 8792(%rax), %r11 - jmp *%r11 -#else + popq %r8 + popq %rcx + popq %rdx + popq %rsi + popq %rdi + movq 8792(%rax), %r11 + jmp *%r11 +#else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f movq 8792(%rax), %r11 jmp *%r11 1: + pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %r8 + call _glapi_get_dispatch + popq %r8 + popq %rcx + popq %rdx + popq %rsi + popq %rdi + movq 8792(%rax), %r11 + jmp *%r11 +#endif /* defined(GLX_USE_TLS) */ + .size GL_PREFIX(ProgramUniformMatrix4x3fv), .-GL_PREFIX(ProgramUniformMatrix4x3fv) + + .p2align 4,,15 + .globl GL_PREFIX(UnlockArraysEXT) + .type GL_PREFIX(UnlockArraysEXT), @function +GL_PREFIX(UnlockArraysEXT): +#if defined(GLX_USE_TLS) + call _x86_64_get_dispatch@PLT + movq 8800(%rax), %r11 + jmp *%r11 +#elif defined(HAVE_PTHREAD) + pushq %rbp + call _x86_64_get_dispatch@PLT + popq %rbp + movq 8800(%rax), %r11 + jmp *%r11 +#else + movq _glapi_Dispatch(%rip), %rax + testq %rax, %rax + je 1f + movq 8800(%rax), %r11 + jmp *%r11 +1: pushq %rbp call _glapi_get_dispatch popq %rbp - movq 8792(%rax), %r11 + movq 8800(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(UnlockArraysEXT), .-GL_PREFIX(UnlockArraysEXT) @@ -43236,7 +43289,7 @@ GL_PREFIX(UseProgramStages): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8800(%rax), %r11 + movq 8808(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -43246,13 +43299,13 @@ popq %rdx popq %rsi popq %rdi - movq 8800(%rax), %r11 + movq 8808(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8800(%rax), %r11 + movq 8808(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -43262,7 +43315,7 @@ popq %rdx popq %rsi popq %rdi - movq 8800(%rax), %r11 + movq 8808(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(UseProgramStages), .-GL_PREFIX(UseProgramStages) @@ -43273,25 +43326,25 @@ GL_PREFIX(ValidateProgramPipeline): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8808(%rax), %r11 + movq 8816(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi call _x86_64_get_dispatch@PLT popq %rdi - movq 8808(%rax), %r11 + movq 8816(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8808(%rax), %r11 + movq 8816(%rax), %r11 jmp *%r11 1: pushq %rdi call _glapi_get_dispatch popq %rdi - movq 8808(%rax), %r11 + movq 8816(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ValidateProgramPipeline), .-GL_PREFIX(ValidateProgramPipeline) @@ -43302,7 +43355,7 @@ GL_PREFIX(DebugMessageCallback): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8816(%rax), %r11 + movq 8824(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -43312,13 +43365,13 @@ popq %rbp popq %rsi popq %rdi - movq 8816(%rax), %r11 + movq 8824(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8816(%rax), %r11 + movq 8824(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -43328,7 +43381,7 @@ popq %rbp popq %rsi popq %rdi - movq 8816(%rax), %r11 + movq 8824(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(DebugMessageCallback), .-GL_PREFIX(DebugMessageCallback) @@ -43339,7 +43392,7 @@ GL_PREFIX(DebugMessageControl): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8824(%rax), %r11 + movq 8832(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -43357,13 +43410,13 @@ popq %rdx popq %rsi popq %rdi - movq 8824(%rax), %r11 + movq 8832(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8824(%rax), %r11 + movq 8832(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -43381,7 +43434,7 @@ popq %rdx popq %rsi popq %rdi - movq 8824(%rax), %r11 + movq 8832(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(DebugMessageControl), .-GL_PREFIX(DebugMessageControl) @@ -43392,7 +43445,7 @@ GL_PREFIX(DebugMessageInsert): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8832(%rax), %r11 + movq 8840(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -43410,13 +43463,13 @@ popq %rdx popq %rsi popq %rdi - movq 8832(%rax), %r11 + movq 8840(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8832(%rax), %r11 + movq 8840(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -43434,7 +43487,7 @@ popq %rdx popq %rsi popq %rdi - movq 8832(%rax), %r11 + movq 8840(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(DebugMessageInsert), .-GL_PREFIX(DebugMessageInsert) @@ -43445,7 +43498,7 @@ GL_PREFIX(GetDebugMessageLog): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8840(%rax), %r11 + movq 8848(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -43463,13 +43516,13 @@ popq %rdx popq %rsi popq %rdi - movq 8840(%rax), %r11 + movq 8848(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8840(%rax), %r11 + movq 8848(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -43487,7 +43540,7 @@ popq %rdx popq %rsi popq %rdi - movq 8840(%rax), %r11 + movq 8848(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(GetDebugMessageLog), .-GL_PREFIX(GetDebugMessageLog) @@ -43498,7 +43551,7 @@ GL_PREFIX(GetObjectLabel): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8848(%rax), %r11 + movq 8856(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -43512,13 +43565,13 @@ popq %rdx popq %rsi popq %rdi - movq 8848(%rax), %r11 + movq 8856(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8848(%rax), %r11 + movq 8856(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -43532,7 +43585,7 @@ popq %rdx popq %rsi popq %rdi - movq 8848(%rax), %r11 + movq 8856(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(GetObjectLabel), .-GL_PREFIX(GetObjectLabel) @@ -43543,7 +43596,7 @@ GL_PREFIX(GetObjectPtrLabel): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8856(%rax), %r11 + movq 8864(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -43557,13 +43610,13 @@ popq %rdx popq %rsi popq %rdi - movq 8856(%rax), %r11 + movq 8864(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8856(%rax), %r11 + movq 8864(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -43577,7 +43630,7 @@ popq %rdx popq %rsi popq %rdi - movq 8856(%rax), %r11 + movq 8864(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(GetObjectPtrLabel), .-GL_PREFIX(GetObjectPtrLabel) @@ -43588,7 +43641,7 @@ GL_PREFIX(ObjectLabel): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8864(%rax), %r11 + movq 8872(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -43602,13 +43655,13 @@ popq %rdx popq %rsi popq %rdi - movq 8864(%rax), %r11 + movq 8872(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8864(%rax), %r11 + movq 8872(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -43622,7 +43675,7 @@ popq %rdx popq %rsi popq %rdi - movq 8864(%rax), %r11 + movq 8872(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ObjectLabel), .-GL_PREFIX(ObjectLabel) @@ -43633,7 +43686,7 @@ GL_PREFIX(ObjectPtrLabel): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8872(%rax), %r11 + movq 8880(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -43643,13 +43696,13 @@ popq %rdx popq %rsi popq %rdi - movq 8872(%rax), %r11 + movq 8880(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8872(%rax), %r11 + movq 8880(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -43659,7 +43712,7 @@ popq %rdx popq %rsi popq %rdi - movq 8872(%rax), %r11 + movq 8880(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ObjectPtrLabel), .-GL_PREFIX(ObjectPtrLabel) @@ -43670,25 +43723,25 @@ GL_PREFIX(PopDebugGroup): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8880(%rax), %r11 + movq 8888(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp - movq 8880(%rax), %r11 + movq 8888(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8880(%rax), %r11 + movq 8888(%rax), %r11 jmp *%r11 1: pushq %rbp call _glapi_get_dispatch popq %rbp - movq 8880(%rax), %r11 + movq 8888(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(PopDebugGroup), .-GL_PREFIX(PopDebugGroup) @@ -43699,7 +43752,7 @@ GL_PREFIX(PushDebugGroup): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8888(%rax), %r11 + movq 8896(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -43713,13 +43766,13 @@ popq %rdx popq %rsi popq %rdi - movq 8888(%rax), %r11 + movq 8896(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8888(%rax), %r11 + movq 8896(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -43733,7 +43786,7 @@ popq %rdx popq %rsi popq %rdi - movq 8888(%rax), %r11 + movq 8896(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(PushDebugGroup), .-GL_PREFIX(PushDebugGroup) @@ -43744,7 +43797,7 @@ GL_PREFIX(SecondaryColor3fEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8896(%rax), %r11 + movq 8904(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) subq $24, %rsp @@ -43756,13 +43809,13 @@ movq 8(%rsp), %xmm1 movq (%rsp), %xmm0 addq $24, %rsp - movq 8896(%rax), %r11 + movq 8904(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8896(%rax), %r11 + movq 8904(%rax), %r11 jmp *%r11 1: subq $24, %rsp @@ -43774,7 +43827,7 @@ movq 8(%rsp), %xmm1 movq (%rsp), %xmm0 addq $24, %rsp - movq 8896(%rax), %r11 + movq 8904(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(SecondaryColor3fEXT), .-GL_PREFIX(SecondaryColor3fEXT) @@ -43785,25 +43838,25 @@ GL_PREFIX(SecondaryColor3fvEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8904(%rax), %r11 + movq 8912(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi call _x86_64_get_dispatch@PLT popq %rdi - movq 8904(%rax), %r11 + movq 8912(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8904(%rax), %r11 + movq 8912(%rax), %r11 jmp *%r11 1: pushq %rdi call _glapi_get_dispatch popq %rdi - movq 8904(%rax), %r11 + movq 8912(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(SecondaryColor3fvEXT), .-GL_PREFIX(SecondaryColor3fvEXT) @@ -43814,7 +43867,7 @@ GL_PREFIX(MultiDrawElementsEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8912(%rax), %r11 + movq 8920(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -43828,13 +43881,13 @@ popq %rdx popq %rsi popq %rdi - movq 8912(%rax), %r11 + movq 8920(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8912(%rax), %r11 + movq 8920(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -43848,7 +43901,7 @@ popq %rdx popq %rsi popq %rdi - movq 8912(%rax), %r11 + movq 8920(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(MultiDrawElementsEXT), .-GL_PREFIX(MultiDrawElementsEXT) @@ -43859,7 +43912,7 @@ GL_PREFIX(FogCoordfEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8920(%rax), %r11 + movq 8928(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) subq $8, %rsp @@ -43867,13 +43920,13 @@ call _x86_64_get_dispatch@PLT movq (%rsp), %xmm0 addq $8, %rsp - movq 8920(%rax), %r11 + movq 8928(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8920(%rax), %r11 + movq 8928(%rax), %r11 jmp *%r11 1: subq $8, %rsp @@ -43881,7 +43934,7 @@ call _glapi_get_dispatch movq (%rsp), %xmm0 addq $8, %rsp - movq 8920(%rax), %r11 + movq 8928(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(FogCoordfEXT), .-GL_PREFIX(FogCoordfEXT) @@ -43892,67 +43945,67 @@ GL_PREFIX(FogCoordfvEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8928(%rax), %r11 + movq 8936(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi call _x86_64_get_dispatch@PLT popq %rdi - movq 8928(%rax), %r11 + movq 8936(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8928(%rax), %r11 + movq 8936(%rax), %r11 jmp *%r11 1: pushq %rdi call _glapi_get_dispatch popq %rdi - movq 8928(%rax), %r11 + movq 8936(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(FogCoordfvEXT), .-GL_PREFIX(FogCoordfvEXT) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1117) - .type GL_PREFIX(_dispatch_stub_1117), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1117)) -GL_PREFIX(_dispatch_stub_1117): + .globl GL_PREFIX(_dispatch_stub_1118) + .type GL_PREFIX(_dispatch_stub_1118), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1118)) +GL_PREFIX(_dispatch_stub_1118): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8936(%rax), %r11 + movq 8944(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp - movq 8936(%rax), %r11 + movq 8944(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8936(%rax), %r11 + movq 8944(%rax), %r11 jmp *%r11 1: pushq %rbp call _glapi_get_dispatch popq %rbp - movq 8936(%rax), %r11 + movq 8944(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1117), .-GL_PREFIX(_dispatch_stub_1117) + .size GL_PREFIX(_dispatch_stub_1118), .-GL_PREFIX(_dispatch_stub_1118) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1118) - .type GL_PREFIX(_dispatch_stub_1118), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1118)) -GL_PREFIX(_dispatch_stub_1118): + .globl GL_PREFIX(_dispatch_stub_1119) + .type GL_PREFIX(_dispatch_stub_1119), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1119)) +GL_PREFIX(_dispatch_stub_1119): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8944(%rax), %r11 + movq 8952(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) subq $40, %rsp @@ -43966,13 +44019,13 @@ movq 8(%rsp), %xmm1 movq (%rsp), %xmm0 addq $40, %rsp - movq 8944(%rax), %r11 + movq 8952(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8944(%rax), %r11 + movq 8952(%rax), %r11 jmp *%r11 1: subq $40, %rsp @@ -43986,49 +44039,49 @@ movq 8(%rsp), %xmm1 movq (%rsp), %xmm0 addq $40, %rsp - movq 8944(%rax), %r11 + movq 8952(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1118), .-GL_PREFIX(_dispatch_stub_1118) + .size GL_PREFIX(_dispatch_stub_1119), .-GL_PREFIX(_dispatch_stub_1119) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1119) - .type GL_PREFIX(_dispatch_stub_1119), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1119)) -GL_PREFIX(_dispatch_stub_1119): + .globl GL_PREFIX(_dispatch_stub_1120) + .type GL_PREFIX(_dispatch_stub_1120), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1120)) +GL_PREFIX(_dispatch_stub_1120): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8952(%rax), %r11 + movq 8960(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi call _x86_64_get_dispatch@PLT popq %rdi - movq 8952(%rax), %r11 + movq 8960(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8952(%rax), %r11 + movq 8960(%rax), %r11 jmp *%r11 1: pushq %rdi call _glapi_get_dispatch popq %rdi - movq 8952(%rax), %r11 + movq 8960(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1119), .-GL_PREFIX(_dispatch_stub_1119) + .size GL_PREFIX(_dispatch_stub_1120), .-GL_PREFIX(_dispatch_stub_1120) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1120) - .type GL_PREFIX(_dispatch_stub_1120), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1120)) -GL_PREFIX(_dispatch_stub_1120): + .globl GL_PREFIX(_dispatch_stub_1121) + .type GL_PREFIX(_dispatch_stub_1121), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1121)) +GL_PREFIX(_dispatch_stub_1121): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 8960(%rax), %r11 + movq 8968(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) subq $40, %rsp @@ -44042,13 +44095,13 @@ movq 8(%rsp), %xmm1 movq (%rsp), %xmm0 addq $40, %rsp - movq 8960(%rax), %r11 + movq 8968(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 8960(%rax), %r11 + movq 8968(%rax), %r11 jmp *%r11 1: subq $40, %rsp @@ -44062,40 +44115,10 @@ movq 8(%rsp), %xmm1 movq (%rsp), %xmm0 addq $40, %rsp - movq 8960(%rax), %r11 + movq 8968(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1120), .-GL_PREFIX(_dispatch_stub_1120) - - .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1121) - .type GL_PREFIX(_dispatch_stub_1121), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1121)) -GL_PREFIX(_dispatch_stub_1121): -#if defined(GLX_USE_TLS) - call _x86_64_get_dispatch@PLT - movq 8968(%rax), %r11 - jmp *%r11 -#elif defined(HAVE_PTHREAD) - pushq %rdi - call _x86_64_get_dispatch@PLT - popq %rdi - movq 8968(%rax), %r11 - jmp *%r11 -#else - movq _glapi_Dispatch(%rip), %rax - testq %rax, %rax - je 1f - movq 8968(%rax), %r11 - jmp *%r11 -1: - pushq %rdi - call _glapi_get_dispatch - popq %rdi - movq 8968(%rax), %r11 - jmp *%r11 -#endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1121), .-GL_PREFIX(_dispatch_stub_1121) + .size GL_PREFIX(_dispatch_stub_1121), .-GL_PREFIX(_dispatch_stub_1121) .p2align 4,,15 .globl GL_PREFIX(_dispatch_stub_1122) @@ -44108,15 +44131,7 @@ jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi - pushq %rsi - pushq %rdx - pushq %rcx - pushq %rbp call _x86_64_get_dispatch@PLT - popq %rbp - popq %rcx - popq %rdx - popq %rsi popq %rdi movq 8976(%rax), %r11 jmp *%r11 @@ -44128,15 +44143,7 @@ jmp *%r11 1: pushq %rdi - pushq %rsi - pushq %rdx - pushq %rcx - pushq %rbp call _glapi_get_dispatch - popq %rbp - popq %rcx - popq %rdx - popq %rsi popq %rdi movq 8976(%rax), %r11 jmp *%r11 @@ -44154,7 +44161,15 @@ jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %rbp call _x86_64_get_dispatch@PLT + popq %rbp + popq %rcx + popq %rdx + popq %rsi popq %rdi movq 8984(%rax), %r11 jmp *%r11 @@ -44166,7 +44181,15 @@ jmp *%r11 1: pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %rbp call _glapi_get_dispatch + popq %rbp + popq %rcx + popq %rdx + popq %rsi popq %rdi movq 8984(%rax), %r11 jmp *%r11 @@ -44184,15 +44207,7 @@ jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi - pushq %rsi - pushq %rdx - pushq %rcx - pushq %rbp call _x86_64_get_dispatch@PLT - popq %rbp - popq %rcx - popq %rdx - popq %rsi popq %rdi movq 8992(%rax), %r11 jmp *%r11 @@ -44204,15 +44219,7 @@ jmp *%r11 1: pushq %rdi - pushq %rsi - pushq %rdx - pushq %rcx - pushq %rbp call _glapi_get_dispatch - popq %rbp - popq %rcx - popq %rdx - popq %rsi popq %rdi movq 8992(%rax), %r11 jmp *%r11 @@ -44230,7 +44237,15 @@ jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %rbp call _x86_64_get_dispatch@PLT + popq %rbp + popq %rcx + popq %rdx + popq %rsi popq %rdi movq 9000(%rax), %r11 jmp *%r11 @@ -44242,7 +44257,15 @@ jmp *%r11 1: pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %rbp call _glapi_get_dispatch + popq %rbp + popq %rcx + popq %rdx + popq %rsi popq %rdi movq 9000(%rax), %r11 jmp *%r11 @@ -44260,15 +44283,7 @@ jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi - pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 call _x86_64_get_dispatch@PLT - popq %r8 - popq %rcx - popq %rdx - popq %rsi popq %rdi movq 9008(%rax), %r11 jmp *%r11 @@ -44280,15 +44295,7 @@ jmp *%r11 1: pushq %rdi - pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 call _glapi_get_dispatch - popq %r8 - popq %rcx - popq %rdx - popq %rsi popq %rdi movq 9008(%rax), %r11 jmp *%r11 @@ -44310,11 +44317,7 @@ pushq %rdx pushq %rcx pushq %r8 - pushq %r9 - pushq %rbp call _x86_64_get_dispatch@PLT - popq %rbp - popq %r9 popq %r8 popq %rcx popq %rdx @@ -44334,11 +44337,7 @@ pushq %rdx pushq %rcx pushq %r8 - pushq %r9 - pushq %rbp call _glapi_get_dispatch - popq %rbp - popq %r9 popq %r8 popq %rcx popq %rdx @@ -44362,7 +44361,15 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %r8 + pushq %r9 + pushq %rbp call _x86_64_get_dispatch@PLT + popq %rbp + popq %r9 + popq %r8 + popq %rcx popq %rdx popq %rsi popq %rdi @@ -44378,7 +44385,15 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %r8 + pushq %r9 + pushq %rbp call _glapi_get_dispatch + popq %rbp + popq %r9 + popq %r8 + popq %rcx popq %rdx popq %rsi popq %rdi @@ -44438,11 +44453,7 @@ pushq %rdi pushq %rsi pushq %rdx - pushq %rcx - pushq %rbp call _x86_64_get_dispatch@PLT - popq %rbp - popq %rcx popq %rdx popq %rsi popq %rdi @@ -44458,11 +44469,7 @@ pushq %rdi pushq %rsi pushq %rdx - pushq %rcx - pushq %rbp call _glapi_get_dispatch - popq %rbp - popq %rcx popq %rdx popq %rsi popq %rdi @@ -44530,7 +44537,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %rbp call _x86_64_get_dispatch@PLT + popq %rbp + popq %rcx popq %rdx popq %rsi popq %rdi @@ -44546,7 +44557,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %rbp call _glapi_get_dispatch + popq %rbp + popq %rcx popq %rdx popq %rsi popq %rdi @@ -44606,11 +44621,7 @@ pushq %rdi pushq %rsi pushq %rdx - pushq %rcx - pushq %rbp call _x86_64_get_dispatch@PLT - popq %rbp - popq %rcx popq %rdx popq %rsi popq %rdi @@ -44626,11 +44637,7 @@ pushq %rdi pushq %rsi pushq %rdx - pushq %rcx - pushq %rbp call _glapi_get_dispatch - popq %rbp - popq %rcx popq %rdx popq %rsi popq %rdi @@ -44652,7 +44659,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %rbp call _x86_64_get_dispatch@PLT + popq %rbp + popq %rcx popq %rdx popq %rsi popq %rdi @@ -44668,7 +44679,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %rbp call _glapi_get_dispatch + popq %rbp + popq %rcx popq %rdx popq %rsi popq %rdi @@ -44766,11 +44781,7 @@ pushq %rdi pushq %rsi pushq %rdx - pushq %rcx - pushq %rbp call _x86_64_get_dispatch@PLT - popq %rbp - popq %rcx popq %rdx popq %rsi popq %rdi @@ -44786,11 +44797,7 @@ pushq %rdi pushq %rsi pushq %rdx - pushq %rcx - pushq %rbp call _glapi_get_dispatch - popq %rbp - popq %rcx popq %rdx popq %rsi popq %rdi @@ -44903,9 +44910,13 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi + pushq %rdx + pushq %rcx pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp + popq %rcx + popq %rdx popq %rsi popq %rdi movq 9128(%rax), %r11 @@ -44919,9 +44930,13 @@ 1: pushq %rdi pushq %rsi + pushq %rdx + pushq %rcx pushq %rbp call _glapi_get_dispatch popq %rbp + popq %rcx + popq %rdx popq %rsi popq %rdi movq 9128(%rax), %r11 @@ -44941,13 +44956,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp - popq %rcx - popq %rdx popq %rsi popq %rdi movq 9136(%rax), %r11 @@ -44961,13 +44972,9 @@ 1: pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx pushq %rbp call _glapi_get_dispatch popq %rbp - popq %rcx - popq %rdx popq %rsi popq %rdi movq 9136(%rax), %r11 @@ -44985,13 +44992,17 @@ movq 9144(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) - subq $24, %rsp - movq %rdi, (%rsp) - movq %xmm0, 8(%rsp) + pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %rbp call _x86_64_get_dispatch@PLT - movq 8(%rsp), %xmm0 - movq (%rsp), %rdi - addq $24, %rsp + popq %rbp + popq %rcx + popq %rdx + popq %rsi + popq %rdi movq 9144(%rax), %r11 jmp *%r11 #else @@ -45001,13 +45012,17 @@ movq 9144(%rax), %r11 jmp *%r11 1: - subq $24, %rsp - movq %rdi, (%rsp) - movq %xmm0, 8(%rsp) + pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %rbp call _glapi_get_dispatch - movq 8(%rsp), %xmm0 - movq (%rsp), %rdi - addq $24, %rsp + popq %rbp + popq %rcx + popq %rdx + popq %rsi + popq %rdi movq 9144(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ @@ -45023,13 +45038,13 @@ movq 9152(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) - pushq %rdi - pushq %rsi - pushq %rbp + subq $24, %rsp + movq %rdi, (%rsp) + movq %xmm0, 8(%rsp) call _x86_64_get_dispatch@PLT - popq %rbp - popq %rsi - popq %rdi + movq 8(%rsp), %xmm0 + movq (%rsp), %rdi + addq $24, %rsp movq 9152(%rax), %r11 jmp *%r11 #else @@ -45039,13 +45054,13 @@ movq 9152(%rax), %r11 jmp *%r11 1: - pushq %rdi - pushq %rsi - pushq %rbp + subq $24, %rsp + movq %rdi, (%rsp) + movq %xmm0, 8(%rsp) call _glapi_get_dispatch - popq %rbp - popq %rsi - popq %rdi + movq 8(%rsp), %xmm0 + movq (%rsp), %rdi + addq $24, %rsp movq 9152(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ @@ -45061,13 +45076,13 @@ movq 9160(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) - subq $24, %rsp - movq %rdi, (%rsp) - movq %xmm0, 8(%rsp) + pushq %rdi + pushq %rsi + pushq %rbp call _x86_64_get_dispatch@PLT - movq 8(%rsp), %xmm0 - movq (%rsp), %rdi - addq $24, %rsp + popq %rbp + popq %rsi + popq %rdi movq 9160(%rax), %r11 jmp *%r11 #else @@ -45077,13 +45092,13 @@ movq 9160(%rax), %r11 jmp *%r11 1: - subq $24, %rsp - movq %rdi, (%rsp) - movq %xmm0, 8(%rsp) - call _glapi_get_dispatch - movq 8(%rsp), %xmm0 - movq (%rsp), %rdi - addq $24, %rsp + pushq %rdi + pushq %rsi + pushq %rbp + call _glapi_get_dispatch + popq %rbp + popq %rsi + popq %rdi movq 9160(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ @@ -45099,13 +45114,13 @@ movq 9168(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) - pushq %rdi - pushq %rsi - pushq %rbp + subq $24, %rsp + movq %rdi, (%rsp) + movq %xmm0, 8(%rsp) call _x86_64_get_dispatch@PLT - popq %rbp - popq %rsi - popq %rdi + movq 8(%rsp), %xmm0 + movq (%rsp), %rdi + addq $24, %rsp movq 9168(%rax), %r11 jmp *%r11 #else @@ -45115,13 +45130,13 @@ movq 9168(%rax), %r11 jmp *%r11 1: - pushq %rdi - pushq %rsi - pushq %rbp + subq $24, %rsp + movq %rdi, (%rsp) + movq %xmm0, 8(%rsp) call _glapi_get_dispatch - popq %rbp - popq %rsi - popq %rdi + movq 8(%rsp), %xmm0 + movq (%rsp), %rdi + addq $24, %rsp movq 9168(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ @@ -45213,6 +45228,44 @@ movq 9192(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) + pushq %rdi + pushq %rsi + pushq %rbp + call _x86_64_get_dispatch@PLT + popq %rbp + popq %rsi + popq %rdi + movq 9192(%rax), %r11 + jmp *%r11 +#else + movq _glapi_Dispatch(%rip), %rax + testq %rax, %rax + je 1f + movq 9192(%rax), %r11 + jmp *%r11 +1: + pushq %rdi + pushq %rsi + pushq %rbp + call _glapi_get_dispatch + popq %rbp + popq %rsi + popq %rdi + movq 9192(%rax), %r11 + jmp *%r11 +#endif /* defined(GLX_USE_TLS) */ + .size GL_PREFIX(_dispatch_stub_1149), .-GL_PREFIX(_dispatch_stub_1149) + + .p2align 4,,15 + .globl GL_PREFIX(_dispatch_stub_1150) + .type GL_PREFIX(_dispatch_stub_1150), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1150)) +GL_PREFIX(_dispatch_stub_1150): +#if defined(GLX_USE_TLS) + call _x86_64_get_dispatch@PLT + movq 9200(%rax), %r11 + jmp *%r11 +#elif defined(HAVE_PTHREAD) subq $24, %rsp movq %rdi, (%rsp) movq %xmm0, 8(%rsp) @@ -45222,13 +45275,13 @@ movq 8(%rsp), %xmm0 movq (%rsp), %rdi addq $24, %rsp - movq 9192(%rax), %r11 + movq 9200(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 9192(%rax), %r11 + movq 9200(%rax), %r11 jmp *%r11 1: subq $24, %rsp @@ -45240,19 +45293,19 @@ movq 8(%rsp), %xmm0 movq (%rsp), %rdi addq $24, %rsp - movq 9192(%rax), %r11 + movq 9200(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1149), .-GL_PREFIX(_dispatch_stub_1149) + .size GL_PREFIX(_dispatch_stub_1150), .-GL_PREFIX(_dispatch_stub_1150) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1150) - .type GL_PREFIX(_dispatch_stub_1150), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1150)) -GL_PREFIX(_dispatch_stub_1150): + .globl GL_PREFIX(_dispatch_stub_1151) + .type GL_PREFIX(_dispatch_stub_1151), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1151)) +GL_PREFIX(_dispatch_stub_1151): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 9200(%rax), %r11 + movq 9208(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -45262,13 +45315,13 @@ popq %rbp popq %rsi popq %rdi - movq 9200(%rax), %r11 + movq 9208(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 9200(%rax), %r11 + movq 9208(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -45278,19 +45331,19 @@ popq %rbp popq %rsi popq %rdi - movq 9200(%rax), %r11 + movq 9208(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1150), .-GL_PREFIX(_dispatch_stub_1150) + .size GL_PREFIX(_dispatch_stub_1151), .-GL_PREFIX(_dispatch_stub_1151) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1151) - .type GL_PREFIX(_dispatch_stub_1151), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1151)) -GL_PREFIX(_dispatch_stub_1151): + .globl GL_PREFIX(_dispatch_stub_1152) + .type GL_PREFIX(_dispatch_stub_1152), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1152)) +GL_PREFIX(_dispatch_stub_1152): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 9208(%rax), %r11 + movq 9216(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) subq $24, %rsp @@ -45302,13 +45355,13 @@ movq 8(%rsp), %xmm0 movq (%rsp), %rdi addq $24, %rsp - movq 9208(%rax), %r11 + movq 9216(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 9208(%rax), %r11 + movq 9216(%rax), %r11 jmp *%r11 1: subq $24, %rsp @@ -45320,19 +45373,19 @@ movq 8(%rsp), %xmm0 movq (%rsp), %rdi addq $24, %rsp - movq 9208(%rax), %r11 + movq 9216(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1151), .-GL_PREFIX(_dispatch_stub_1151) + .size GL_PREFIX(_dispatch_stub_1152), .-GL_PREFIX(_dispatch_stub_1152) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1152) - .type GL_PREFIX(_dispatch_stub_1152), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1152)) -GL_PREFIX(_dispatch_stub_1152): + .globl GL_PREFIX(_dispatch_stub_1153) + .type GL_PREFIX(_dispatch_stub_1153), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1153)) +GL_PREFIX(_dispatch_stub_1153): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 9216(%rax), %r11 + movq 9224(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -45342,13 +45395,13 @@ popq %rbp popq %rsi popq %rdi - movq 9216(%rax), %r11 + movq 9224(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 9216(%rax), %r11 + movq 9224(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -45358,19 +45411,19 @@ popq %rbp popq %rsi popq %rdi - movq 9216(%rax), %r11 + movq 9224(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1152), .-GL_PREFIX(_dispatch_stub_1152) + .size GL_PREFIX(_dispatch_stub_1153), .-GL_PREFIX(_dispatch_stub_1153) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1153) - .type GL_PREFIX(_dispatch_stub_1153), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1153)) -GL_PREFIX(_dispatch_stub_1153): + .globl GL_PREFIX(_dispatch_stub_1154) + .type GL_PREFIX(_dispatch_stub_1154), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1154)) +GL_PREFIX(_dispatch_stub_1154): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 9224(%rax), %r11 + movq 9232(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -45380,13 +45433,13 @@ popq %rdx popq %rsi popq %rdi - movq 9224(%rax), %r11 + movq 9232(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 9224(%rax), %r11 + movq 9232(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -45396,19 +45449,19 @@ popq %rdx popq %rsi popq %rdi - movq 9224(%rax), %r11 + movq 9232(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1153), .-GL_PREFIX(_dispatch_stub_1153) + .size GL_PREFIX(_dispatch_stub_1154), .-GL_PREFIX(_dispatch_stub_1154) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1154) - .type GL_PREFIX(_dispatch_stub_1154), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1154)) -GL_PREFIX(_dispatch_stub_1154): + .globl GL_PREFIX(_dispatch_stub_1155) + .type GL_PREFIX(_dispatch_stub_1155), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1155)) +GL_PREFIX(_dispatch_stub_1155): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 9232(%rax), %r11 + movq 9240(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -45418,13 +45471,13 @@ popq %rbp popq %rsi popq %rdi - movq 9232(%rax), %r11 + movq 9240(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 9232(%rax), %r11 + movq 9240(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -45434,19 +45487,19 @@ popq %rbp popq %rsi popq %rdi - movq 9232(%rax), %r11 + movq 9240(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1154), .-GL_PREFIX(_dispatch_stub_1154) + .size GL_PREFIX(_dispatch_stub_1155), .-GL_PREFIX(_dispatch_stub_1155) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1155) - .type GL_PREFIX(_dispatch_stub_1155), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1155)) -GL_PREFIX(_dispatch_stub_1155): + .globl GL_PREFIX(_dispatch_stub_1156) + .type GL_PREFIX(_dispatch_stub_1156), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1156)) +GL_PREFIX(_dispatch_stub_1156): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 9240(%rax), %r11 + movq 9248(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) subq $40, %rsp @@ -45460,13 +45513,13 @@ movq 8(%rsp), %xmm0 movq (%rsp), %rdi addq $40, %rsp - movq 9240(%rax), %r11 + movq 9248(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 9240(%rax), %r11 + movq 9248(%rax), %r11 jmp *%r11 1: subq $40, %rsp @@ -45480,19 +45533,19 @@ movq 8(%rsp), %xmm0 movq (%rsp), %rdi addq $40, %rsp - movq 9240(%rax), %r11 + movq 9248(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1155), .-GL_PREFIX(_dispatch_stub_1155) + .size GL_PREFIX(_dispatch_stub_1156), .-GL_PREFIX(_dispatch_stub_1156) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1156) - .type GL_PREFIX(_dispatch_stub_1156), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1156)) -GL_PREFIX(_dispatch_stub_1156): + .globl GL_PREFIX(_dispatch_stub_1157) + .type GL_PREFIX(_dispatch_stub_1157), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1157)) +GL_PREFIX(_dispatch_stub_1157): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 9248(%rax), %r11 + movq 9256(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -45502,13 +45555,13 @@ popq %rbp popq %rsi popq %rdi - movq 9248(%rax), %r11 + movq 9256(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 9248(%rax), %r11 + movq 9256(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -45518,19 +45571,19 @@ popq %rbp popq %rsi popq %rdi - movq 9248(%rax), %r11 + movq 9256(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1156), .-GL_PREFIX(_dispatch_stub_1156) + .size GL_PREFIX(_dispatch_stub_1157), .-GL_PREFIX(_dispatch_stub_1157) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1157) - .type GL_PREFIX(_dispatch_stub_1157), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1157)) -GL_PREFIX(_dispatch_stub_1157): + .globl GL_PREFIX(_dispatch_stub_1158) + .type GL_PREFIX(_dispatch_stub_1158), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1158)) +GL_PREFIX(_dispatch_stub_1158): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 9256(%rax), %r11 + movq 9264(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) subq $40, %rsp @@ -45544,13 +45597,13 @@ movq 8(%rsp), %xmm0 movq (%rsp), %rdi addq $40, %rsp - movq 9256(%rax), %r11 + movq 9264(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 9256(%rax), %r11 + movq 9264(%rax), %r11 jmp *%r11 1: subq $40, %rsp @@ -45564,19 +45617,19 @@ movq 8(%rsp), %xmm0 movq (%rsp), %rdi addq $40, %rsp - movq 9256(%rax), %r11 + movq 9264(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1157), .-GL_PREFIX(_dispatch_stub_1157) + .size GL_PREFIX(_dispatch_stub_1158), .-GL_PREFIX(_dispatch_stub_1158) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1158) - .type GL_PREFIX(_dispatch_stub_1158), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1158)) -GL_PREFIX(_dispatch_stub_1158): + .globl GL_PREFIX(_dispatch_stub_1159) + .type GL_PREFIX(_dispatch_stub_1159), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1159)) +GL_PREFIX(_dispatch_stub_1159): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 9264(%rax), %r11 + movq 9272(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -45586,13 +45639,13 @@ popq %rbp popq %rsi popq %rdi - movq 9264(%rax), %r11 + movq 9272(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 9264(%rax), %r11 + movq 9272(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -45602,19 +45655,19 @@ popq %rbp popq %rsi popq %rdi - movq 9264(%rax), %r11 + movq 9272(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1158), .-GL_PREFIX(_dispatch_stub_1158) + .size GL_PREFIX(_dispatch_stub_1159), .-GL_PREFIX(_dispatch_stub_1159) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1159) - .type GL_PREFIX(_dispatch_stub_1159), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1159)) -GL_PREFIX(_dispatch_stub_1159): + .globl GL_PREFIX(_dispatch_stub_1160) + .type GL_PREFIX(_dispatch_stub_1160), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1160)) +GL_PREFIX(_dispatch_stub_1160): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 9272(%rax), %r11 + movq 9280(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -45628,13 +45681,13 @@ popq %rdx popq %rsi popq %rdi - movq 9272(%rax), %r11 + movq 9280(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 9272(%rax), %r11 + movq 9280(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -45648,19 +45701,19 @@ popq %rdx popq %rsi popq %rdi - movq 9272(%rax), %r11 + movq 9280(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1159), .-GL_PREFIX(_dispatch_stub_1159) + .size GL_PREFIX(_dispatch_stub_1160), .-GL_PREFIX(_dispatch_stub_1160) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1160) - .type GL_PREFIX(_dispatch_stub_1160), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1160)) -GL_PREFIX(_dispatch_stub_1160): + .globl GL_PREFIX(_dispatch_stub_1161) + .type GL_PREFIX(_dispatch_stub_1161), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1161)) +GL_PREFIX(_dispatch_stub_1161): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 9280(%rax), %r11 + movq 9288(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -45670,13 +45723,13 @@ popq %rbp popq %rsi popq %rdi - movq 9280(%rax), %r11 + movq 9288(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 9280(%rax), %r11 + movq 9288(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -45686,19 +45739,19 @@ popq %rbp popq %rsi popq %rdi - movq 9280(%rax), %r11 + movq 9288(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1160), .-GL_PREFIX(_dispatch_stub_1160) + .size GL_PREFIX(_dispatch_stub_1161), .-GL_PREFIX(_dispatch_stub_1161) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1161) - .type GL_PREFIX(_dispatch_stub_1161), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1161)) -GL_PREFIX(_dispatch_stub_1161): + .globl GL_PREFIX(_dispatch_stub_1162) + .type GL_PREFIX(_dispatch_stub_1162), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1162)) +GL_PREFIX(_dispatch_stub_1162): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 9288(%rax), %r11 + movq 9296(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) subq $40, %rsp @@ -45714,13 +45767,13 @@ movq 8(%rsp), %xmm0 movq (%rsp), %rdi addq $40, %rsp - movq 9288(%rax), %r11 + movq 9296(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 9288(%rax), %r11 + movq 9296(%rax), %r11 jmp *%r11 1: subq $40, %rsp @@ -45736,19 +45789,19 @@ movq 8(%rsp), %xmm0 movq (%rsp), %rdi addq $40, %rsp - movq 9288(%rax), %r11 + movq 9296(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1161), .-GL_PREFIX(_dispatch_stub_1161) + .size GL_PREFIX(_dispatch_stub_1162), .-GL_PREFIX(_dispatch_stub_1162) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1162) - .type GL_PREFIX(_dispatch_stub_1162), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1162)) -GL_PREFIX(_dispatch_stub_1162): + .globl GL_PREFIX(_dispatch_stub_1163) + .type GL_PREFIX(_dispatch_stub_1163), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1163)) +GL_PREFIX(_dispatch_stub_1163): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 9296(%rax), %r11 + movq 9304(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -45758,13 +45811,13 @@ popq %rbp popq %rsi popq %rdi - movq 9296(%rax), %r11 + movq 9304(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 9296(%rax), %r11 + movq 9304(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -45774,19 +45827,19 @@ popq %rbp popq %rsi popq %rdi - movq 9296(%rax), %r11 + movq 9304(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1162), .-GL_PREFIX(_dispatch_stub_1162) + .size GL_PREFIX(_dispatch_stub_1163), .-GL_PREFIX(_dispatch_stub_1163) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1163) - .type GL_PREFIX(_dispatch_stub_1163), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1163)) -GL_PREFIX(_dispatch_stub_1163): + .globl GL_PREFIX(_dispatch_stub_1164) + .type GL_PREFIX(_dispatch_stub_1164), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1164)) +GL_PREFIX(_dispatch_stub_1164): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 9304(%rax), %r11 + movq 9312(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) subq $40, %rsp @@ -45802,13 +45855,13 @@ movq 8(%rsp), %xmm0 movq (%rsp), %rdi addq $40, %rsp - movq 9304(%rax), %r11 + movq 9312(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 9304(%rax), %r11 + movq 9312(%rax), %r11 jmp *%r11 1: subq $40, %rsp @@ -45824,44 +45877,6 @@ movq 8(%rsp), %xmm0 movq (%rsp), %rdi addq $40, %rsp - movq 9304(%rax), %r11 - jmp *%r11 -#endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1163), .-GL_PREFIX(_dispatch_stub_1163) - - .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1164) - .type GL_PREFIX(_dispatch_stub_1164), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1164)) -GL_PREFIX(_dispatch_stub_1164): -#if defined(GLX_USE_TLS) - call _x86_64_get_dispatch@PLT - movq 9312(%rax), %r11 - jmp *%r11 -#elif defined(HAVE_PTHREAD) - pushq %rdi - pushq %rsi - pushq %rbp - call _x86_64_get_dispatch@PLT - popq %rbp - popq %rsi - popq %rdi - movq 9312(%rax), %r11 - jmp *%r11 -#else - movq _glapi_Dispatch(%rip), %rax - testq %rax, %rax - je 1f - movq 9312(%rax), %r11 - jmp *%r11 -1: - pushq %rdi - pushq %rsi - pushq %rbp - call _glapi_get_dispatch - popq %rbp - popq %rsi - popq %rdi movq 9312(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ @@ -45879,13 +45894,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 + pushq %rbp call _x86_64_get_dispatch@PLT - popq %r8 - popq %rcx - popq %rdx + popq %rbp popq %rsi popq %rdi movq 9320(%rax), %r11 @@ -45899,13 +45910,9 @@ 1: pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 + pushq %rbp call _glapi_get_dispatch - popq %r8 - popq %rcx - popq %rdx + popq %rbp popq %rsi popq %rdi movq 9320(%rax), %r11 @@ -45925,9 +45932,13 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx + pushq %rcx + pushq %r8 call _x86_64_get_dispatch@PLT - popq %rbp + popq %r8 + popq %rcx + popq %rdx popq %rsi popq %rdi movq 9328(%rax), %r11 @@ -45941,9 +45952,13 @@ 1: pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx + pushq %rcx + pushq %r8 call _glapi_get_dispatch - popq %rbp + popq %r8 + popq %rcx + popq %rdx popq %rsi popq %rdi movq 9328(%rax), %r11 @@ -45963,13 +45978,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 + pushq %rbp call _x86_64_get_dispatch@PLT - popq %r8 - popq %rcx - popq %rdx + popq %rbp popq %rsi popq %rdi movq 9336(%rax), %r11 @@ -45983,13 +45994,9 @@ 1: pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 + pushq %rbp call _glapi_get_dispatch - popq %r8 - popq %rcx - popq %rdx + popq %rbp popq %rsi popq %rdi movq 9336(%rax), %r11 @@ -46009,9 +46016,13 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx + pushq %rcx + pushq %r8 call _x86_64_get_dispatch@PLT - popq %rbp + popq %r8 + popq %rcx + popq %rdx popq %rsi popq %rdi movq 9344(%rax), %r11 @@ -46025,9 +46036,13 @@ 1: pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx + pushq %rcx + pushq %r8 call _glapi_get_dispatch - popq %rbp + popq %r8 + popq %rcx + popq %rdx popq %rsi popq %rdi movq 9344(%rax), %r11 @@ -46047,13 +46062,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 + pushq %rbp call _x86_64_get_dispatch@PLT - popq %r8 - popq %rcx - popq %rdx + popq %rbp popq %rsi popq %rdi movq 9352(%rax), %r11 @@ -46067,13 +46078,9 @@ 1: pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 + pushq %rbp call _glapi_get_dispatch - popq %r8 - popq %rcx - popq %rdx + popq %rbp popq %rsi popq %rdi movq 9352(%rax), %r11 @@ -46094,7 +46101,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %r8 call _x86_64_get_dispatch@PLT + popq %r8 + popq %rcx popq %rdx popq %rsi popq %rdi @@ -46110,7 +46121,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %r8 call _glapi_get_dispatch + popq %r8 + popq %rcx popq %rdx popq %rsi popq %rdi @@ -46587,9 +46602,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _x86_64_get_dispatch@PLT - popq %rbp + popq %rdx popq %rsi popq %rdi movq 9464(%rax), %r11 @@ -46603,9 +46618,9 @@ 1: pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _glapi_get_dispatch - popq %rbp + popq %rdx popq %rsi popq %rdi movq 9464(%rax), %r11 @@ -46739,17 +46754,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 - pushq %r9 pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp - popq %r9 - popq %r8 - popq %rcx - popq %rdx popq %rsi popq %rdi movq 9496(%rax), %r11 @@ -46763,17 +46770,9 @@ 1: pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 - pushq %r9 pushq %rbp call _glapi_get_dispatch popq %rbp - popq %r9 - popq %r8 - popq %rcx - popq %rdx popq %rsi popq %rdi movq 9496(%rax), %r11 @@ -46899,9 +46898,21 @@ movq 9520(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) + pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %r8 + pushq %r9 pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp + popq %r9 + popq %r8 + popq %rcx + popq %rdx + popq %rsi + popq %rdi movq 9520(%rax), %r11 jmp *%r11 #else @@ -46911,9 +46922,21 @@ movq 9520(%rax), %r11 jmp *%r11 1: + pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %r8 + pushq %r9 pushq %rbp call _glapi_get_dispatch popq %rbp + popq %r9 + popq %r8 + popq %rcx + popq %rdx + popq %rsi + popq %rdi movq 9520(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ @@ -46929,9 +46952,9 @@ movq 9528(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) - pushq %rdi + pushq %rbp call _x86_64_get_dispatch@PLT - popq %rdi + popq %rbp movq 9528(%rax), %r11 jmp *%r11 #else @@ -46941,9 +46964,9 @@ movq 9528(%rax), %r11 jmp *%r11 1: - pushq %rdi + pushq %rbp call _glapi_get_dispatch - popq %rdi + popq %rbp movq 9528(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ @@ -46960,19 +46983,7 @@ jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi - pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 - pushq %r9 - pushq %rbp call _x86_64_get_dispatch@PLT - popq %rbp - popq %r9 - popq %r8 - popq %rcx - popq %rdx - popq %rsi popq %rdi movq 9536(%rax), %r11 jmp *%r11 @@ -46984,19 +46995,7 @@ jmp *%r11 1: pushq %rdi - pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 - pushq %r9 - pushq %rbp call _glapi_get_dispatch - popq %rbp - popq %r9 - popq %r8 - popq %rcx - popq %rdx - popq %rsi popq %rdi movq 9536(%rax), %r11 jmp *%r11 @@ -47122,7 +47121,19 @@ jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %r8 + pushq %r9 + pushq %rbp call _x86_64_get_dispatch@PLT + popq %rbp + popq %r9 + popq %r8 + popq %rcx + popq %rdx + popq %rsi popq %rdi movq 9560(%rax), %r11 jmp *%r11 @@ -47134,7 +47145,19 @@ jmp *%r11 1: pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %r8 + pushq %r9 + pushq %rbp call _glapi_get_dispatch + popq %rbp + popq %r9 + popq %r8 + popq %rcx + popq %rdx + popq %rsi popq %rdi movq 9560(%rax), %r11 jmp *%r11 @@ -47151,9 +47174,9 @@ movq 9568(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) - pushq %rbp + pushq %rdi call _x86_64_get_dispatch@PLT - popq %rbp + popq %rdi movq 9568(%rax), %r11 jmp *%r11 #else @@ -47163,9 +47186,9 @@ movq 9568(%rax), %r11 jmp *%r11 1: - pushq %rbp + pushq %rdi call _glapi_get_dispatch - popq %rbp + popq %rdi movq 9568(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ @@ -47181,9 +47204,9 @@ movq 9576(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) - pushq %rdi + pushq %rbp call _x86_64_get_dispatch@PLT - popq %rdi + popq %rbp movq 9576(%rax), %r11 jmp *%r11 #else @@ -47193,9 +47216,9 @@ movq 9576(%rax), %r11 jmp *%r11 1: - pushq %rdi + pushq %rbp call _glapi_get_dispatch - popq %rdi + popq %rbp movq 9576(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ @@ -47212,11 +47235,7 @@ jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi - pushq %rsi - pushq %rdx call _x86_64_get_dispatch@PLT - popq %rdx - popq %rsi popq %rdi movq 9584(%rax), %r11 jmp *%r11 @@ -47228,11 +47247,7 @@ jmp *%r11 1: pushq %rdi - pushq %rsi - pushq %rdx call _glapi_get_dispatch - popq %rdx - popq %rsi popq %rdi movq 9584(%rax), %r11 jmp *%r11 @@ -47289,9 +47304,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _x86_64_get_dispatch@PLT - popq %rbp + popq %rdx popq %rsi popq %rdi movq 9600(%rax), %r11 @@ -47305,9 +47320,9 @@ 1: pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _glapi_get_dispatch - popq %rbp + popq %rdx popq %rsi popq %rdi movq 9600(%rax), %r11 @@ -47326,7 +47341,11 @@ jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi + pushq %rsi + pushq %rbp call _x86_64_get_dispatch@PLT + popq %rbp + popq %rsi popq %rdi movq 9608(%rax), %r11 jmp *%r11 @@ -47338,7 +47357,11 @@ jmp *%r11 1: pushq %rdi + pushq %rsi + pushq %rbp call _glapi_get_dispatch + popq %rbp + popq %rsi popq %rdi movq 9608(%rax), %r11 jmp *%r11 @@ -47356,7 +47379,11 @@ jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi + pushq %rsi + pushq %rdx call _x86_64_get_dispatch@PLT + popq %rdx + popq %rsi popq %rdi movq 9616(%rax), %r11 jmp *%r11 @@ -47368,7 +47395,11 @@ jmp *%r11 1: pushq %rdi + pushq %rsi + pushq %rdx call _glapi_get_dispatch + popq %rdx + popq %rsi popq %rdi movq 9616(%rax), %r11 jmp *%r11 @@ -47385,13 +47416,15 @@ movq 9624(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) - pushq %rdi - pushq %rsi - pushq %rbp + subq $24, %rsp + movq %rdi, (%rsp) + movq %xmm0, 8(%rsp) + movq %xmm1, 16(%rsp) call _x86_64_get_dispatch@PLT - popq %rbp - popq %rsi - popq %rdi + movq 16(%rsp), %xmm1 + movq 8(%rsp), %xmm0 + movq (%rsp), %rdi + addq $24, %rsp movq 9624(%rax), %r11 jmp *%r11 #else @@ -47401,13 +47434,15 @@ movq 9624(%rax), %r11 jmp *%r11 1: - pushq %rdi - pushq %rsi - pushq %rbp + subq $24, %rsp + movq %rdi, (%rsp) + movq %xmm0, 8(%rsp) + movq %xmm1, 16(%rsp) call _glapi_get_dispatch - popq %rbp - popq %rsi - popq %rdi + movq 16(%rsp), %xmm1 + movq 8(%rsp), %xmm0 + movq (%rsp), %rdi + addq $24, %rsp movq 9624(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ @@ -47424,15 +47459,7 @@ jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi - pushq %rsi - pushq %rdx - pushq %rcx - pushq %rbp call _x86_64_get_dispatch@PLT - popq %rbp - popq %rcx - popq %rdx - popq %rsi popq %rdi movq 9632(%rax), %r11 jmp *%r11 @@ -47444,15 +47471,7 @@ jmp *%r11 1: pushq %rdi - pushq %rsi - pushq %rdx - pushq %rcx - pushq %rbp call _glapi_get_dispatch - popq %rbp - popq %rcx - popq %rdx - popq %rsi popq %rdi movq 9632(%rax), %r11 jmp *%r11 @@ -47470,15 +47489,7 @@ jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi - pushq %rsi - pushq %rdx - pushq %rcx - pushq %rbp call _x86_64_get_dispatch@PLT - popq %rbp - popq %rcx - popq %rdx - popq %rsi popq %rdi movq 9640(%rax), %r11 jmp *%r11 @@ -47490,15 +47501,7 @@ jmp *%r11 1: pushq %rdi - pushq %rsi - pushq %rdx - pushq %rcx - pushq %rbp call _glapi_get_dispatch - popq %rbp - popq %rcx - popq %rdx - popq %rsi popq %rdi movq 9640(%rax), %r11 jmp *%r11 @@ -47515,23 +47518,13 @@ movq 9648(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) - subq $56, %rsp - movq %rdi, (%rsp) - movq %rsi, 8(%rsp) - movq %rdx, 16(%rsp) - movq %xmm0, 24(%rsp) - movq %xmm1, 32(%rsp) - movq %xmm2, 40(%rsp) - movq %xmm3, 48(%rsp) + pushq %rdi + pushq %rsi + pushq %rbp call _x86_64_get_dispatch@PLT - movq 48(%rsp), %xmm3 - movq 40(%rsp), %xmm2 - movq 32(%rsp), %xmm1 - movq 24(%rsp), %xmm0 - movq 16(%rsp), %rdx - movq 8(%rsp), %rsi - movq (%rsp), %rdi - addq $56, %rsp + popq %rbp + popq %rsi + popq %rdi movq 9648(%rax), %r11 jmp *%r11 #else @@ -47541,23 +47534,13 @@ movq 9648(%rax), %r11 jmp *%r11 1: - subq $56, %rsp - movq %rdi, (%rsp) - movq %rsi, 8(%rsp) - movq %rdx, 16(%rsp) - movq %xmm0, 24(%rsp) - movq %xmm1, 32(%rsp) - movq %xmm2, 40(%rsp) - movq %xmm3, 48(%rsp) + pushq %rdi + pushq %rsi + pushq %rbp call _glapi_get_dispatch - movq 48(%rsp), %xmm3 - movq 40(%rsp), %xmm2 - movq 32(%rsp), %xmm1 - movq 24(%rsp), %xmm0 - movq 16(%rsp), %rdx - movq 8(%rsp), %rsi - movq (%rsp), %rdi - addq $56, %rsp + popq %rbp + popq %rsi + popq %rdi movq 9648(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ @@ -47619,6 +47602,52 @@ movq 9664(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) + pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %rbp + call _x86_64_get_dispatch@PLT + popq %rbp + popq %rcx + popq %rdx + popq %rsi + popq %rdi + movq 9664(%rax), %r11 + jmp *%r11 +#else + movq _glapi_Dispatch(%rip), %rax + testq %rax, %rax + je 1f + movq 9664(%rax), %r11 + jmp *%r11 +1: + pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %rbp + call _glapi_get_dispatch + popq %rbp + popq %rcx + popq %rdx + popq %rsi + popq %rdi + movq 9664(%rax), %r11 + jmp *%r11 +#endif /* defined(GLX_USE_TLS) */ + .size GL_PREFIX(_dispatch_stub_1208), .-GL_PREFIX(_dispatch_stub_1208) + + .p2align 4,,15 + .globl GL_PREFIX(_dispatch_stub_1209) + .type GL_PREFIX(_dispatch_stub_1209), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1209)) +GL_PREFIX(_dispatch_stub_1209): +#if defined(GLX_USE_TLS) + call _x86_64_get_dispatch@PLT + movq 9672(%rax), %r11 + jmp *%r11 +#elif defined(HAVE_PTHREAD) subq $56, %rsp movq %rdi, (%rsp) movq %rsi, 8(%rsp) @@ -47636,13 +47665,13 @@ movq 8(%rsp), %rsi movq (%rsp), %rdi addq $56, %rsp - movq 9664(%rax), %r11 + movq 9672(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 9664(%rax), %r11 + movq 9672(%rax), %r11 jmp *%r11 1: subq $56, %rsp @@ -47662,19 +47691,19 @@ movq 8(%rsp), %rsi movq (%rsp), %rdi addq $56, %rsp - movq 9664(%rax), %r11 + movq 9672(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1208), .-GL_PREFIX(_dispatch_stub_1208) + .size GL_PREFIX(_dispatch_stub_1209), .-GL_PREFIX(_dispatch_stub_1209) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1209) - .type GL_PREFIX(_dispatch_stub_1209), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1209)) -GL_PREFIX(_dispatch_stub_1209): + .globl GL_PREFIX(_dispatch_stub_1210) + .type GL_PREFIX(_dispatch_stub_1210), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1210)) +GL_PREFIX(_dispatch_stub_1210): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 9672(%rax), %r11 + movq 9680(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -47688,13 +47717,13 @@ popq %rdx popq %rsi popq %rdi - movq 9672(%rax), %r11 + movq 9680(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 9672(%rax), %r11 + movq 9680(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -47708,39 +47737,10 @@ popq %rdx popq %rsi popq %rdi - movq 9672(%rax), %r11 - jmp *%r11 -#endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1209), .-GL_PREFIX(_dispatch_stub_1209) - - .p2align 4,,15 - .globl GL_PREFIX(PrimitiveRestartNV) - .type GL_PREFIX(PrimitiveRestartNV), @function -GL_PREFIX(PrimitiveRestartNV): -#if defined(GLX_USE_TLS) - call _x86_64_get_dispatch@PLT - movq 9680(%rax), %r11 - jmp *%r11 -#elif defined(HAVE_PTHREAD) - pushq %rbp - call _x86_64_get_dispatch@PLT - popq %rbp - movq 9680(%rax), %r11 - jmp *%r11 -#else - movq _glapi_Dispatch(%rip), %rax - testq %rax, %rax - je 1f - movq 9680(%rax), %r11 - jmp *%r11 -1: - pushq %rbp - call _glapi_get_dispatch - popq %rbp movq 9680(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(PrimitiveRestartNV), .-GL_PREFIX(PrimitiveRestartNV) + .size GL_PREFIX(_dispatch_stub_1210), .-GL_PREFIX(_dispatch_stub_1210) .p2align 4,,15 .globl GL_PREFIX(_dispatch_stub_1211) @@ -47752,13 +47752,23 @@ movq 9688(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) - pushq %rdi - pushq %rsi - pushq %rdx + subq $56, %rsp + movq %rdi, (%rsp) + movq %rsi, 8(%rsp) + movq %rdx, 16(%rsp) + movq %xmm0, 24(%rsp) + movq %xmm1, 32(%rsp) + movq %xmm2, 40(%rsp) + movq %xmm3, 48(%rsp) call _x86_64_get_dispatch@PLT - popq %rdx - popq %rsi - popq %rdi + movq 48(%rsp), %xmm3 + movq 40(%rsp), %xmm2 + movq 32(%rsp), %xmm1 + movq 24(%rsp), %xmm0 + movq 16(%rsp), %rdx + movq 8(%rsp), %rsi + movq (%rsp), %rdi + addq $56, %rsp movq 9688(%rax), %r11 jmp *%r11 #else @@ -47768,13 +47778,23 @@ movq 9688(%rax), %r11 jmp *%r11 1: - pushq %rdi - pushq %rsi - pushq %rdx + subq $56, %rsp + movq %rdi, (%rsp) + movq %rsi, 8(%rsp) + movq %rdx, 16(%rsp) + movq %xmm0, 24(%rsp) + movq %xmm1, 32(%rsp) + movq %xmm2, 40(%rsp) + movq %xmm3, 48(%rsp) call _glapi_get_dispatch - popq %rdx - popq %rsi - popq %rdi + movq 48(%rsp), %xmm3 + movq 40(%rsp), %xmm2 + movq 32(%rsp), %xmm1 + movq 24(%rsp), %xmm0 + movq 16(%rsp), %rdx + movq 8(%rsp), %rsi + movq (%rsp), %rdi + addq $56, %rsp movq 9688(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ @@ -47793,7 +47813,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %rbp call _x86_64_get_dispatch@PLT + popq %rbp + popq %rcx popq %rdx popq %rsi popq %rdi @@ -47809,7 +47833,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %rbp call _glapi_get_dispatch + popq %rbp + popq %rcx popq %rdx popq %rsi popq %rdi @@ -47819,22 +47847,17 @@ .size GL_PREFIX(_dispatch_stub_1212), .-GL_PREFIX(_dispatch_stub_1212) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1213) - .type GL_PREFIX(_dispatch_stub_1213), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1213)) -GL_PREFIX(_dispatch_stub_1213): + .globl GL_PREFIX(PrimitiveRestartNV) + .type GL_PREFIX(PrimitiveRestartNV), @function +GL_PREFIX(PrimitiveRestartNV): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 9704(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) - pushq %rdi - pushq %rsi - pushq %rdx + pushq %rbp call _x86_64_get_dispatch@PLT - popq %rdx - popq %rsi - popq %rdi + popq %rbp movq 9704(%rax), %r11 jmp *%r11 #else @@ -47844,17 +47867,13 @@ movq 9704(%rax), %r11 jmp *%r11 1: - pushq %rdi - pushq %rsi - pushq %rdx + pushq %rbp call _glapi_get_dispatch - popq %rdx - popq %rsi - popq %rdi + popq %rbp movq 9704(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1213), .-GL_PREFIX(_dispatch_stub_1213) + .size GL_PREFIX(PrimitiveRestartNV), .-GL_PREFIX(PrimitiveRestartNV) .p2align 4,,15 .globl GL_PREFIX(_dispatch_stub_1214) @@ -47868,9 +47887,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _x86_64_get_dispatch@PLT - popq %rbp + popq %rdx popq %rsi popq %rdi movq 9712(%rax), %r11 @@ -47884,9 +47903,9 @@ 1: pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _glapi_get_dispatch - popq %rbp + popq %rdx popq %rsi popq %rdi movq 9712(%rax), %r11 @@ -47895,9 +47914,10 @@ .size GL_PREFIX(_dispatch_stub_1214), .-GL_PREFIX(_dispatch_stub_1214) .p2align 4,,15 - .globl GL_PREFIX(BindFramebufferEXT) - .type GL_PREFIX(BindFramebufferEXT), @function -GL_PREFIX(BindFramebufferEXT): + .globl GL_PREFIX(_dispatch_stub_1215) + .type GL_PREFIX(_dispatch_stub_1215), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1215)) +GL_PREFIX(_dispatch_stub_1215): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 9720(%rax), %r11 @@ -47905,9 +47925,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _x86_64_get_dispatch@PLT - popq %rbp + popq %rdx popq %rsi popq %rdi movq 9720(%rax), %r11 @@ -47921,20 +47941,21 @@ 1: pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _glapi_get_dispatch - popq %rbp + popq %rdx popq %rsi popq %rdi movq 9720(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(BindFramebufferEXT), .-GL_PREFIX(BindFramebufferEXT) + .size GL_PREFIX(_dispatch_stub_1215), .-GL_PREFIX(_dispatch_stub_1215) .p2align 4,,15 - .globl GL_PREFIX(BindRenderbufferEXT) - .type GL_PREFIX(BindRenderbufferEXT), @function -GL_PREFIX(BindRenderbufferEXT): + .globl GL_PREFIX(_dispatch_stub_1216) + .type GL_PREFIX(_dispatch_stub_1216), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1216)) +GL_PREFIX(_dispatch_stub_1216): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 9728(%rax), %r11 @@ -47942,9 +47963,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _x86_64_get_dispatch@PLT - popq %rbp + popq %rdx popq %rsi popq %rdi movq 9728(%rax), %r11 @@ -47958,15 +47979,15 @@ 1: pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _glapi_get_dispatch - popq %rbp + popq %rdx popq %rsi popq %rdi movq 9728(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(BindRenderbufferEXT), .-GL_PREFIX(BindRenderbufferEXT) + .size GL_PREFIX(_dispatch_stub_1216), .-GL_PREFIX(_dispatch_stub_1216) .p2align 4,,15 .globl GL_PREFIX(_dispatch_stub_1217) @@ -48007,10 +48028,9 @@ .size GL_PREFIX(_dispatch_stub_1217), .-GL_PREFIX(_dispatch_stub_1217) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1218) - .type GL_PREFIX(_dispatch_stub_1218), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1218)) -GL_PREFIX(_dispatch_stub_1218): + .globl GL_PREFIX(BindFramebufferEXT) + .type GL_PREFIX(BindFramebufferEXT), @function +GL_PREFIX(BindFramebufferEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 9744(%rax), %r11 @@ -48018,9 +48038,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rdx + pushq %rbp call _x86_64_get_dispatch@PLT - popq %rdx + popq %rbp popq %rsi popq %rdi movq 9744(%rax), %r11 @@ -48034,21 +48054,20 @@ 1: pushq %rdi pushq %rsi - pushq %rdx + pushq %rbp call _glapi_get_dispatch - popq %rdx + popq %rbp popq %rsi popq %rdi movq 9744(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1218), .-GL_PREFIX(_dispatch_stub_1218) + .size GL_PREFIX(BindFramebufferEXT), .-GL_PREFIX(BindFramebufferEXT) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1219) - .type GL_PREFIX(_dispatch_stub_1219), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1219)) -GL_PREFIX(_dispatch_stub_1219): + .globl GL_PREFIX(BindRenderbufferEXT) + .type GL_PREFIX(BindRenderbufferEXT), @function +GL_PREFIX(BindRenderbufferEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 9752(%rax), %r11 @@ -48056,9 +48075,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rdx + pushq %rbp call _x86_64_get_dispatch@PLT - popq %rdx + popq %rbp popq %rsi popq %rdi movq 9752(%rax), %r11 @@ -48072,20 +48091,21 @@ 1: pushq %rdi pushq %rsi - pushq %rdx + pushq %rbp call _glapi_get_dispatch - popq %rdx + popq %rbp popq %rsi popq %rdi movq 9752(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1219), .-GL_PREFIX(_dispatch_stub_1219) + .size GL_PREFIX(BindRenderbufferEXT), .-GL_PREFIX(BindRenderbufferEXT) .p2align 4,,15 - .globl GL_PREFIX(VertexAttribI1iEXT) - .type GL_PREFIX(VertexAttribI1iEXT), @function -GL_PREFIX(VertexAttribI1iEXT): + .globl GL_PREFIX(_dispatch_stub_1220) + .type GL_PREFIX(_dispatch_stub_1220), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1220)) +GL_PREFIX(_dispatch_stub_1220): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 9760(%rax), %r11 @@ -48117,12 +48137,13 @@ movq 9760(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(VertexAttribI1iEXT), .-GL_PREFIX(VertexAttribI1iEXT) + .size GL_PREFIX(_dispatch_stub_1220), .-GL_PREFIX(_dispatch_stub_1220) .p2align 4,,15 - .globl GL_PREFIX(VertexAttribI1uiEXT) - .type GL_PREFIX(VertexAttribI1uiEXT), @function -GL_PREFIX(VertexAttribI1uiEXT): + .globl GL_PREFIX(_dispatch_stub_1221) + .type GL_PREFIX(_dispatch_stub_1221), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1221)) +GL_PREFIX(_dispatch_stub_1221): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 9768(%rax), %r11 @@ -48130,9 +48151,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _x86_64_get_dispatch@PLT - popq %rbp + popq %rdx popq %rsi popq %rdi movq 9768(%rax), %r11 @@ -48146,20 +48167,21 @@ 1: pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _glapi_get_dispatch - popq %rbp + popq %rdx popq %rsi popq %rdi movq 9768(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(VertexAttribI1uiEXT), .-GL_PREFIX(VertexAttribI1uiEXT) + .size GL_PREFIX(_dispatch_stub_1221), .-GL_PREFIX(_dispatch_stub_1221) .p2align 4,,15 - .globl GL_PREFIX(VertexAttribI2iEXT) - .type GL_PREFIX(VertexAttribI2iEXT), @function -GL_PREFIX(VertexAttribI2iEXT): + .globl GL_PREFIX(_dispatch_stub_1222) + .type GL_PREFIX(_dispatch_stub_1222), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1222)) +GL_PREFIX(_dispatch_stub_1222): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 9776(%rax), %r11 @@ -48191,12 +48213,12 @@ movq 9776(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(VertexAttribI2iEXT), .-GL_PREFIX(VertexAttribI2iEXT) + .size GL_PREFIX(_dispatch_stub_1222), .-GL_PREFIX(_dispatch_stub_1222) .p2align 4,,15 - .globl GL_PREFIX(VertexAttribI2ivEXT) - .type GL_PREFIX(VertexAttribI2ivEXT), @function -GL_PREFIX(VertexAttribI2ivEXT): + .globl GL_PREFIX(VertexAttribI1iEXT) + .type GL_PREFIX(VertexAttribI1iEXT), @function +GL_PREFIX(VertexAttribI1iEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 9784(%rax), %r11 @@ -48228,12 +48250,12 @@ movq 9784(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(VertexAttribI2ivEXT), .-GL_PREFIX(VertexAttribI2ivEXT) + .size GL_PREFIX(VertexAttribI1iEXT), .-GL_PREFIX(VertexAttribI1iEXT) .p2align 4,,15 - .globl GL_PREFIX(VertexAttribI2uiEXT) - .type GL_PREFIX(VertexAttribI2uiEXT), @function -GL_PREFIX(VertexAttribI2uiEXT): + .globl GL_PREFIX(VertexAttribI1uiEXT) + .type GL_PREFIX(VertexAttribI1uiEXT), @function +GL_PREFIX(VertexAttribI1uiEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 9792(%rax), %r11 @@ -48241,9 +48263,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rdx + pushq %rbp call _x86_64_get_dispatch@PLT - popq %rdx + popq %rbp popq %rsi popq %rdi movq 9792(%rax), %r11 @@ -48257,20 +48279,20 @@ 1: pushq %rdi pushq %rsi - pushq %rdx + pushq %rbp call _glapi_get_dispatch - popq %rdx + popq %rbp popq %rsi popq %rdi movq 9792(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(VertexAttribI2uiEXT), .-GL_PREFIX(VertexAttribI2uiEXT) + .size GL_PREFIX(VertexAttribI1uiEXT), .-GL_PREFIX(VertexAttribI1uiEXT) .p2align 4,,15 - .globl GL_PREFIX(VertexAttribI2uivEXT) - .type GL_PREFIX(VertexAttribI2uivEXT), @function -GL_PREFIX(VertexAttribI2uivEXT): + .globl GL_PREFIX(VertexAttribI2iEXT) + .type GL_PREFIX(VertexAttribI2iEXT), @function +GL_PREFIX(VertexAttribI2iEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 9800(%rax), %r11 @@ -48278,9 +48300,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _x86_64_get_dispatch@PLT - popq %rbp + popq %rdx popq %rsi popq %rdi movq 9800(%rax), %r11 @@ -48294,20 +48316,20 @@ 1: pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _glapi_get_dispatch - popq %rbp + popq %rdx popq %rsi popq %rdi movq 9800(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(VertexAttribI2uivEXT), .-GL_PREFIX(VertexAttribI2uivEXT) + .size GL_PREFIX(VertexAttribI2iEXT), .-GL_PREFIX(VertexAttribI2iEXT) .p2align 4,,15 - .globl GL_PREFIX(VertexAttribI3iEXT) - .type GL_PREFIX(VertexAttribI3iEXT), @function -GL_PREFIX(VertexAttribI3iEXT): + .globl GL_PREFIX(VertexAttribI2ivEXT) + .type GL_PREFIX(VertexAttribI2ivEXT), @function +GL_PREFIX(VertexAttribI2ivEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 9808(%rax), %r11 @@ -48315,13 +48337,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp - popq %rcx - popq %rdx popq %rsi popq %rdi movq 9808(%rax), %r11 @@ -48335,24 +48353,20 @@ 1: pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx pushq %rbp call _glapi_get_dispatch popq %rbp - popq %rcx - popq %rdx popq %rsi popq %rdi movq 9808(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(VertexAttribI3iEXT), .-GL_PREFIX(VertexAttribI3iEXT) + .size GL_PREFIX(VertexAttribI2ivEXT), .-GL_PREFIX(VertexAttribI2ivEXT) .p2align 4,,15 - .globl GL_PREFIX(VertexAttribI3ivEXT) - .type GL_PREFIX(VertexAttribI3ivEXT), @function -GL_PREFIX(VertexAttribI3ivEXT): + .globl GL_PREFIX(VertexAttribI2uiEXT) + .type GL_PREFIX(VertexAttribI2uiEXT), @function +GL_PREFIX(VertexAttribI2uiEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 9816(%rax), %r11 @@ -48360,9 +48374,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _x86_64_get_dispatch@PLT - popq %rbp + popq %rdx popq %rsi popq %rdi movq 9816(%rax), %r11 @@ -48376,20 +48390,20 @@ 1: pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _glapi_get_dispatch - popq %rbp + popq %rdx popq %rsi popq %rdi movq 9816(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(VertexAttribI3ivEXT), .-GL_PREFIX(VertexAttribI3ivEXT) + .size GL_PREFIX(VertexAttribI2uiEXT), .-GL_PREFIX(VertexAttribI2uiEXT) .p2align 4,,15 - .globl GL_PREFIX(VertexAttribI3uiEXT) - .type GL_PREFIX(VertexAttribI3uiEXT), @function -GL_PREFIX(VertexAttribI3uiEXT): + .globl GL_PREFIX(VertexAttribI2uivEXT) + .type GL_PREFIX(VertexAttribI2uivEXT), @function +GL_PREFIX(VertexAttribI2uivEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 9824(%rax), %r11 @@ -48397,13 +48411,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp - popq %rcx - popq %rdx popq %rsi popq %rdi movq 9824(%rax), %r11 @@ -48417,24 +48427,20 @@ 1: pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx pushq %rbp call _glapi_get_dispatch popq %rbp - popq %rcx - popq %rdx popq %rsi popq %rdi movq 9824(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(VertexAttribI3uiEXT), .-GL_PREFIX(VertexAttribI3uiEXT) + .size GL_PREFIX(VertexAttribI2uivEXT), .-GL_PREFIX(VertexAttribI2uivEXT) .p2align 4,,15 - .globl GL_PREFIX(VertexAttribI3uivEXT) - .type GL_PREFIX(VertexAttribI3uivEXT), @function -GL_PREFIX(VertexAttribI3uivEXT): + .globl GL_PREFIX(VertexAttribI3iEXT) + .type GL_PREFIX(VertexAttribI3iEXT), @function +GL_PREFIX(VertexAttribI3iEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 9832(%rax), %r11 @@ -48442,9 +48448,13 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi + pushq %rdx + pushq %rcx pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp + popq %rcx + popq %rdx popq %rsi popq %rdi movq 9832(%rax), %r11 @@ -48458,20 +48468,24 @@ 1: pushq %rdi pushq %rsi + pushq %rdx + pushq %rcx pushq %rbp call _glapi_get_dispatch popq %rbp + popq %rcx + popq %rdx popq %rsi popq %rdi movq 9832(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(VertexAttribI3uivEXT), .-GL_PREFIX(VertexAttribI3uivEXT) + .size GL_PREFIX(VertexAttribI3iEXT), .-GL_PREFIX(VertexAttribI3iEXT) .p2align 4,,15 - .globl GL_PREFIX(VertexAttribI4iEXT) - .type GL_PREFIX(VertexAttribI4iEXT), @function -GL_PREFIX(VertexAttribI4iEXT): + .globl GL_PREFIX(VertexAttribI3ivEXT) + .type GL_PREFIX(VertexAttribI3ivEXT), @function +GL_PREFIX(VertexAttribI3ivEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 9840(%rax), %r11 @@ -48479,13 +48493,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 + pushq %rbp call _x86_64_get_dispatch@PLT - popq %r8 - popq %rcx - popq %rdx + popq %rbp popq %rsi popq %rdi movq 9840(%rax), %r11 @@ -48499,24 +48509,20 @@ 1: pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 + pushq %rbp call _glapi_get_dispatch - popq %r8 - popq %rcx - popq %rdx + popq %rbp popq %rsi popq %rdi movq 9840(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(VertexAttribI4iEXT), .-GL_PREFIX(VertexAttribI4iEXT) + .size GL_PREFIX(VertexAttribI3ivEXT), .-GL_PREFIX(VertexAttribI3ivEXT) .p2align 4,,15 - .globl GL_PREFIX(VertexAttribI4ivEXT) - .type GL_PREFIX(VertexAttribI4ivEXT), @function -GL_PREFIX(VertexAttribI4ivEXT): + .globl GL_PREFIX(VertexAttribI3uiEXT) + .type GL_PREFIX(VertexAttribI3uiEXT), @function +GL_PREFIX(VertexAttribI3uiEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 9848(%rax), %r11 @@ -48524,9 +48530,13 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi + pushq %rdx + pushq %rcx pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp + popq %rcx + popq %rdx popq %rsi popq %rdi movq 9848(%rax), %r11 @@ -48540,20 +48550,24 @@ 1: pushq %rdi pushq %rsi + pushq %rdx + pushq %rcx pushq %rbp call _glapi_get_dispatch popq %rbp + popq %rcx + popq %rdx popq %rsi popq %rdi movq 9848(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(VertexAttribI4ivEXT), .-GL_PREFIX(VertexAttribI4ivEXT) + .size GL_PREFIX(VertexAttribI3uiEXT), .-GL_PREFIX(VertexAttribI3uiEXT) .p2align 4,,15 - .globl GL_PREFIX(VertexAttribI4uiEXT) - .type GL_PREFIX(VertexAttribI4uiEXT), @function -GL_PREFIX(VertexAttribI4uiEXT): + .globl GL_PREFIX(VertexAttribI3uivEXT) + .type GL_PREFIX(VertexAttribI3uivEXT), @function +GL_PREFIX(VertexAttribI3uivEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 9856(%rax), %r11 @@ -48561,13 +48575,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 + pushq %rbp call _x86_64_get_dispatch@PLT - popq %r8 - popq %rcx - popq %rdx + popq %rbp popq %rsi popq %rdi movq 9856(%rax), %r11 @@ -48581,24 +48591,20 @@ 1: pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 + pushq %rbp call _glapi_get_dispatch - popq %r8 - popq %rcx - popq %rdx + popq %rbp popq %rsi popq %rdi movq 9856(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(VertexAttribI4uiEXT), .-GL_PREFIX(VertexAttribI4uiEXT) + .size GL_PREFIX(VertexAttribI3uivEXT), .-GL_PREFIX(VertexAttribI3uivEXT) .p2align 4,,15 - .globl GL_PREFIX(VertexAttribI4uivEXT) - .type GL_PREFIX(VertexAttribI4uivEXT), @function -GL_PREFIX(VertexAttribI4uivEXT): + .globl GL_PREFIX(VertexAttribI4iEXT) + .type GL_PREFIX(VertexAttribI4iEXT), @function +GL_PREFIX(VertexAttribI4iEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 9864(%rax), %r11 @@ -48606,9 +48612,13 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx + pushq %rcx + pushq %r8 call _x86_64_get_dispatch@PLT - popq %rbp + popq %r8 + popq %rcx + popq %rdx popq %rsi popq %rdi movq 9864(%rax), %r11 @@ -48622,20 +48632,24 @@ 1: pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx + pushq %rcx + pushq %r8 call _glapi_get_dispatch - popq %rbp + popq %r8 + popq %rcx + popq %rdx popq %rsi popq %rdi movq 9864(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(VertexAttribI4uivEXT), .-GL_PREFIX(VertexAttribI4uivEXT) + .size GL_PREFIX(VertexAttribI4iEXT), .-GL_PREFIX(VertexAttribI4iEXT) .p2align 4,,15 - .globl GL_PREFIX(ClearColorIiEXT) - .type GL_PREFIX(ClearColorIiEXT), @function -GL_PREFIX(ClearColorIiEXT): + .globl GL_PREFIX(VertexAttribI4ivEXT) + .type GL_PREFIX(VertexAttribI4ivEXT), @function +GL_PREFIX(VertexAttribI4ivEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 9872(%rax), %r11 @@ -48643,13 +48657,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp - popq %rcx - popq %rdx popq %rsi popq %rdi movq 9872(%rax), %r11 @@ -48663,24 +48673,20 @@ 1: pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx pushq %rbp call _glapi_get_dispatch popq %rbp - popq %rcx - popq %rdx popq %rsi popq %rdi movq 9872(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(ClearColorIiEXT), .-GL_PREFIX(ClearColorIiEXT) + .size GL_PREFIX(VertexAttribI4ivEXT), .-GL_PREFIX(VertexAttribI4ivEXT) .p2align 4,,15 - .globl GL_PREFIX(ClearColorIuiEXT) - .type GL_PREFIX(ClearColorIuiEXT), @function -GL_PREFIX(ClearColorIuiEXT): + .globl GL_PREFIX(VertexAttribI4uiEXT) + .type GL_PREFIX(VertexAttribI4uiEXT), @function +GL_PREFIX(VertexAttribI4uiEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 9880(%rax), %r11 @@ -48690,9 +48696,9 @@ pushq %rsi pushq %rdx pushq %rcx - pushq %rbp + pushq %r8 call _x86_64_get_dispatch@PLT - popq %rbp + popq %r8 popq %rcx popq %rdx popq %rsi @@ -48710,9 +48716,9 @@ pushq %rsi pushq %rdx pushq %rcx - pushq %rbp + pushq %r8 call _glapi_get_dispatch - popq %rbp + popq %r8 popq %rcx popq %rdx popq %rsi @@ -48720,13 +48726,12 @@ movq 9880(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(ClearColorIuiEXT), .-GL_PREFIX(ClearColorIuiEXT) + .size GL_PREFIX(VertexAttribI4uiEXT), .-GL_PREFIX(VertexAttribI4uiEXT) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1236) - .type GL_PREFIX(_dispatch_stub_1236), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1236)) -GL_PREFIX(_dispatch_stub_1236): + .globl GL_PREFIX(VertexAttribI4uivEXT) + .type GL_PREFIX(VertexAttribI4uivEXT), @function +GL_PREFIX(VertexAttribI4uivEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 9888(%rax), %r11 @@ -48734,13 +48739,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp - popq %rcx - popq %rdx popq %rsi popq %rdi movq 9888(%rax), %r11 @@ -48754,32 +48755,35 @@ 1: pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx pushq %rbp call _glapi_get_dispatch popq %rbp - popq %rcx - popq %rdx popq %rsi popq %rdi movq 9888(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1236), .-GL_PREFIX(_dispatch_stub_1236) + .size GL_PREFIX(VertexAttribI4uivEXT), .-GL_PREFIX(VertexAttribI4uivEXT) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1237) - .type GL_PREFIX(_dispatch_stub_1237), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1237)) -GL_PREFIX(_dispatch_stub_1237): + .globl GL_PREFIX(ClearColorIiEXT) + .type GL_PREFIX(ClearColorIiEXT), @function +GL_PREFIX(ClearColorIiEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 9896(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %rbp call _x86_64_get_dispatch@PLT + popq %rbp + popq %rcx + popq %rdx + popq %rsi popq %rdi movq 9896(%rax), %r11 jmp *%r11 @@ -48791,18 +48795,25 @@ jmp *%r11 1: pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %rbp call _glapi_get_dispatch + popq %rbp + popq %rcx + popq %rdx + popq %rsi popq %rdi movq 9896(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1237), .-GL_PREFIX(_dispatch_stub_1237) + .size GL_PREFIX(ClearColorIiEXT), .-GL_PREFIX(ClearColorIiEXT) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1238) - .type GL_PREFIX(_dispatch_stub_1238), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1238)) -GL_PREFIX(_dispatch_stub_1238): + .globl GL_PREFIX(ClearColorIuiEXT) + .type GL_PREFIX(ClearColorIuiEXT), @function +GL_PREFIX(ClearColorIuiEXT): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 9904(%rax), %r11 @@ -48810,9 +48821,13 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi + pushq %rdx + pushq %rcx pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp + popq %rcx + popq %rdx popq %rsi popq %rdi movq 9904(%rax), %r11 @@ -48826,15 +48841,19 @@ 1: pushq %rdi pushq %rsi + pushq %rdx + pushq %rcx pushq %rbp call _glapi_get_dispatch popq %rbp + popq %rcx + popq %rdx popq %rsi popq %rdi movq 9904(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1238), .-GL_PREFIX(_dispatch_stub_1238) + .size GL_PREFIX(ClearColorIuiEXT), .-GL_PREFIX(ClearColorIuiEXT) .p2align 4,,15 .globl GL_PREFIX(_dispatch_stub_1239) @@ -48847,7 +48866,15 @@ jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %rbp call _x86_64_get_dispatch@PLT + popq %rbp + popq %rcx + popq %rdx + popq %rsi popq %rdi movq 9912(%rax), %r11 jmp *%r11 @@ -48859,7 +48886,15 @@ jmp *%r11 1: pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %rbp call _glapi_get_dispatch + popq %rbp + popq %rcx + popq %rdx + popq %rsi popq %rdi movq 9912(%rax), %r11 jmp *%r11 @@ -48877,11 +48912,7 @@ jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi - pushq %rsi - pushq %rbp call _x86_64_get_dispatch@PLT - popq %rbp - popq %rsi popq %rdi movq 9920(%rax), %r11 jmp *%r11 @@ -48893,11 +48924,7 @@ jmp *%r11 1: pushq %rdi - pushq %rsi - pushq %rbp call _glapi_get_dispatch - popq %rbp - popq %rsi popq %rdi movq 9920(%rax), %r11 jmp *%r11 @@ -48916,13 +48943,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 + pushq %rbp call _x86_64_get_dispatch@PLT - popq %r8 - popq %rcx - popq %rdx + popq %rbp popq %rsi popq %rdi movq 9928(%rax), %r11 @@ -48936,13 +48959,9 @@ 1: pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 + pushq %rbp call _glapi_get_dispatch - popq %r8 - popq %rcx - popq %rdx + popq %rbp popq %rsi popq %rdi movq 9928(%rax), %r11 @@ -48961,15 +48980,7 @@ jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi - pushq %rsi - pushq %rdx - pushq %rcx - pushq %rbp call _x86_64_get_dispatch@PLT - popq %rbp - popq %rcx - popq %rdx - popq %rsi popq %rdi movq 9936(%rax), %r11 jmp *%r11 @@ -48981,15 +48992,7 @@ jmp *%r11 1: pushq %rdi - pushq %rsi - pushq %rdx - pushq %rcx - pushq %rbp call _glapi_get_dispatch - popq %rbp - popq %rcx - popq %rdx - popq %rsi popq %rdi movq 9936(%rax), %r11 jmp *%r11 @@ -49008,13 +49011,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 + pushq %rbp call _x86_64_get_dispatch@PLT - popq %r8 - popq %rcx - popq %rdx + popq %rbp popq %rsi popq %rdi movq 9944(%rax), %r11 @@ -49028,13 +49027,9 @@ 1: pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 + pushq %rbp call _glapi_get_dispatch - popq %r8 - popq %rcx - popq %rdx + popq %rbp popq %rsi popq %rdi movq 9944(%rax), %r11 @@ -49147,7 +49142,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %r8 call _x86_64_get_dispatch@PLT + popq %r8 + popq %rcx popq %rdx popq %rsi popq %rdi @@ -49163,7 +49162,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %r8 call _glapi_get_dispatch + popq %r8 + popq %rcx popq %rdx popq %rsi popq %rdi @@ -49315,7 +49318,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %r8 call _x86_64_get_dispatch@PLT + popq %r8 + popq %rcx popq %rdx popq %rsi popq %rdi @@ -49331,7 +49338,11 @@ pushq %rdi pushq %rsi pushq %rdx + pushq %rcx + pushq %r8 call _glapi_get_dispatch + popq %r8 + popq %rcx popq %rdx popq %rsi popq %rdi @@ -49351,7 +49362,15 @@ jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %rbp call _x86_64_get_dispatch@PLT + popq %rbp + popq %rcx + popq %rdx + popq %rsi popq %rdi movq 10008(%rax), %r11 jmp *%r11 @@ -49363,7 +49382,15 @@ jmp *%r11 1: pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %rbp call _glapi_get_dispatch + popq %rbp + popq %rcx + popq %rdx + popq %rsi popq %rdi movq 10008(%rax), %r11 jmp *%r11 @@ -49382,9 +49409,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _x86_64_get_dispatch@PLT - popq %rbp + popq %rdx popq %rsi popq %rdi movq 10016(%rax), %r11 @@ -49398,9 +49425,9 @@ 1: pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _glapi_get_dispatch - popq %rbp + popq %rdx popq %rsi popq %rdi movq 10016(%rax), %r11 @@ -49420,9 +49447,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _x86_64_get_dispatch@PLT - popq %rbp + popq %rdx popq %rsi popq %rdi movq 10024(%rax), %r11 @@ -49436,9 +49463,9 @@ 1: pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx call _glapi_get_dispatch - popq %rbp + popq %rdx popq %rsi popq %rdi movq 10024(%rax), %r11 @@ -49447,17 +49474,18 @@ .size GL_PREFIX(_dispatch_stub_1253), .-GL_PREFIX(_dispatch_stub_1253) .p2align 4,,15 - .globl GL_PREFIX(TextureBarrierNV) - .type GL_PREFIX(TextureBarrierNV), @function -GL_PREFIX(TextureBarrierNV): + .globl GL_PREFIX(_dispatch_stub_1254) + .type GL_PREFIX(_dispatch_stub_1254), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1254)) +GL_PREFIX(_dispatch_stub_1254): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 10032(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) - pushq %rbp + pushq %rdi call _x86_64_get_dispatch@PLT - popq %rbp + popq %rdi movq 10032(%rax), %r11 jmp *%r11 #else @@ -49467,13 +49495,13 @@ movq 10032(%rax), %r11 jmp *%r11 1: - pushq %rbp + pushq %rdi call _glapi_get_dispatch - popq %rbp + popq %rdi movq 10032(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(TextureBarrierNV), .-GL_PREFIX(TextureBarrierNV) + .size GL_PREFIX(_dispatch_stub_1254), .-GL_PREFIX(_dispatch_stub_1254) .p2align 4,,15 .globl GL_PREFIX(_dispatch_stub_1255) @@ -49485,9 +49513,13 @@ movq 10040(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) + pushq %rdi + pushq %rsi pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp + popq %rsi + popq %rdi movq 10040(%rax), %r11 jmp *%r11 #else @@ -49497,9 +49529,13 @@ movq 10040(%rax), %r11 jmp *%r11 1: + pushq %rdi + pushq %rsi pushq %rbp call _glapi_get_dispatch popq %rbp + popq %rsi + popq %rdi movq 10040(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ @@ -49517,13 +49553,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 + pushq %rbp call _x86_64_get_dispatch@PLT - popq %r8 - popq %rcx - popq %rdx + popq %rbp popq %rsi popq %rdi movq 10048(%rax), %r11 @@ -49537,13 +49569,9 @@ 1: pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx - pushq %r8 + pushq %rbp call _glapi_get_dispatch - popq %r8 - popq %rcx - popq %rdx + popq %rbp popq %rsi popq %rdi movq 10048(%rax), %r11 @@ -49552,22 +49580,17 @@ .size GL_PREFIX(_dispatch_stub_1256), .-GL_PREFIX(_dispatch_stub_1256) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1257) - .type GL_PREFIX(_dispatch_stub_1257), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1257)) -GL_PREFIX(_dispatch_stub_1257): + .globl GL_PREFIX(TextureBarrierNV) + .type GL_PREFIX(TextureBarrierNV), @function +GL_PREFIX(TextureBarrierNV): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT movq 10056(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) - pushq %rdi - pushq %rsi pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp - popq %rsi - popq %rdi movq 10056(%rax), %r11 jmp *%r11 #else @@ -49577,17 +49600,13 @@ movq 10056(%rax), %r11 jmp *%r11 1: - pushq %rdi - pushq %rsi pushq %rbp call _glapi_get_dispatch popq %rbp - popq %rsi - popq %rdi movq 10056(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1257), .-GL_PREFIX(_dispatch_stub_1257) + .size GL_PREFIX(TextureBarrierNV), .-GL_PREFIX(TextureBarrierNV) .p2align 4,,15 .globl GL_PREFIX(_dispatch_stub_1258) @@ -49599,9 +49618,9 @@ movq 10064(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) - pushq %rdi + pushq %rbp call _x86_64_get_dispatch@PLT - popq %rdi + popq %rbp movq 10064(%rax), %r11 jmp *%r11 #else @@ -49611,9 +49630,9 @@ movq 10064(%rax), %r11 jmp *%r11 1: - pushq %rdi + pushq %rbp call _glapi_get_dispatch - popq %rdi + popq %rbp movq 10064(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ @@ -49631,9 +49650,13 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx + pushq %rcx + pushq %r8 call _x86_64_get_dispatch@PLT - popq %rbp + popq %r8 + popq %rcx + popq %rdx popq %rsi popq %rdi movq 10072(%rax), %r11 @@ -49647,9 +49670,13 @@ 1: pushq %rdi pushq %rsi - pushq %rbp + pushq %rdx + pushq %rcx + pushq %r8 call _glapi_get_dispatch - popq %rbp + popq %r8 + popq %rcx + popq %rdx popq %rsi popq %rdi movq 10072(%rax), %r11 @@ -49669,13 +49696,9 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp - popq %rcx - popq %rdx popq %rsi popq %rdi movq 10080(%rax), %r11 @@ -49689,13 +49712,9 @@ 1: pushq %rdi pushq %rsi - pushq %rdx - pushq %rcx pushq %rbp call _glapi_get_dispatch popq %rbp - popq %rcx - popq %rdx popq %rsi popq %rdi movq 10080(%rax), %r11 @@ -49714,15 +49733,7 @@ jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi - pushq %rsi - pushq %rdx - pushq %rcx - pushq %rbp call _x86_64_get_dispatch@PLT - popq %rbp - popq %rcx - popq %rdx - popq %rsi popq %rdi movq 10088(%rax), %r11 jmp *%r11 @@ -49734,15 +49745,7 @@ jmp *%r11 1: pushq %rdi - pushq %rsi - pushq %rdx - pushq %rcx - pushq %rbp call _glapi_get_dispatch - popq %rbp - popq %rcx - popq %rdx - popq %rsi popq %rdi movq 10088(%rax), %r11 jmp *%r11 @@ -49799,9 +49802,13 @@ #elif defined(HAVE_PTHREAD) pushq %rdi pushq %rsi + pushq %rdx + pushq %rcx pushq %rbp call _x86_64_get_dispatch@PLT popq %rbp + popq %rcx + popq %rdx popq %rsi popq %rdi movq 10104(%rax), %r11 @@ -49815,9 +49822,13 @@ 1: pushq %rdi pushq %rsi + pushq %rdx + pushq %rcx pushq %rbp call _glapi_get_dispatch popq %rbp + popq %rcx + popq %rdx popq %rsi popq %rdi movq 10104(%rax), %r11 @@ -49836,7 +49847,15 @@ jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %rbp call _x86_64_get_dispatch@PLT + popq %rbp + popq %rcx + popq %rdx + popq %rsi popq %rdi movq 10112(%rax), %r11 jmp *%r11 @@ -49848,7 +49867,15 @@ jmp *%r11 1: pushq %rdi + pushq %rsi + pushq %rdx + pushq %rcx + pushq %rbp call _glapi_get_dispatch + popq %rbp + popq %rcx + popq %rdx + popq %rsi popq %rdi movq 10112(%rax), %r11 jmp *%r11 @@ -49866,7 +49893,11 @@ jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi + pushq %rsi + pushq %rbp call _x86_64_get_dispatch@PLT + popq %rbp + popq %rsi popq %rdi movq 10120(%rax), %r11 jmp *%r11 @@ -49878,7 +49909,11 @@ jmp *%r11 1: pushq %rdi + pushq %rsi + pushq %rbp call _glapi_get_dispatch + popq %rbp + popq %rsi popq %rdi movq 10120(%rax), %r11 jmp *%r11 @@ -49994,7 +50029,11 @@ jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi + pushq %rsi + pushq %rbp call _x86_64_get_dispatch@PLT + popq %rbp + popq %rsi popq %rdi movq 10152(%rax), %r11 jmp *%r11 @@ -50006,7 +50045,11 @@ jmp *%r11 1: pushq %rdi + pushq %rsi + pushq %rbp call _glapi_get_dispatch + popq %rbp + popq %rsi popq %rdi movq 10152(%rax), %r11 jmp *%r11 @@ -50024,11 +50067,7 @@ jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi - pushq %rsi - pushq %rbp call _x86_64_get_dispatch@PLT - popq %rbp - popq %rsi popq %rdi movq 10160(%rax), %r11 jmp *%r11 @@ -50040,11 +50079,7 @@ jmp *%r11 1: pushq %rdi - pushq %rsi - pushq %rbp call _glapi_get_dispatch - popq %rbp - popq %rsi popq %rdi movq 10160(%rax), %r11 jmp *%r11 @@ -50062,6 +50097,104 @@ jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi + call _x86_64_get_dispatch@PLT + popq %rdi + movq 10168(%rax), %r11 + jmp *%r11 +#else + movq _glapi_Dispatch(%rip), %rax + testq %rax, %rax + je 1f + movq 10168(%rax), %r11 + jmp *%r11 +1: + pushq %rdi + call _glapi_get_dispatch + popq %rdi + movq 10168(%rax), %r11 + jmp *%r11 +#endif /* defined(GLX_USE_TLS) */ + .size GL_PREFIX(_dispatch_stub_1271), .-GL_PREFIX(_dispatch_stub_1271) + + .p2align 4,,15 + .globl GL_PREFIX(_dispatch_stub_1272) + .type GL_PREFIX(_dispatch_stub_1272), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1272)) +GL_PREFIX(_dispatch_stub_1272): +#if defined(GLX_USE_TLS) + call _x86_64_get_dispatch@PLT + movq 10176(%rax), %r11 + jmp *%r11 +#elif defined(HAVE_PTHREAD) + pushq %rdi + call _x86_64_get_dispatch@PLT + popq %rdi + movq 10176(%rax), %r11 + jmp *%r11 +#else + movq _glapi_Dispatch(%rip), %rax + testq %rax, %rax + je 1f + movq 10176(%rax), %r11 + jmp *%r11 +1: + pushq %rdi + call _glapi_get_dispatch + popq %rdi + movq 10176(%rax), %r11 + jmp *%r11 +#endif /* defined(GLX_USE_TLS) */ + .size GL_PREFIX(_dispatch_stub_1272), .-GL_PREFIX(_dispatch_stub_1272) + + .p2align 4,,15 + .globl GL_PREFIX(_dispatch_stub_1273) + .type GL_PREFIX(_dispatch_stub_1273), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1273)) +GL_PREFIX(_dispatch_stub_1273): +#if defined(GLX_USE_TLS) + call _x86_64_get_dispatch@PLT + movq 10184(%rax), %r11 + jmp *%r11 +#elif defined(HAVE_PTHREAD) + pushq %rdi + pushq %rsi + pushq %rbp + call _x86_64_get_dispatch@PLT + popq %rbp + popq %rsi + popq %rdi + movq 10184(%rax), %r11 + jmp *%r11 +#else + movq _glapi_Dispatch(%rip), %rax + testq %rax, %rax + je 1f + movq 10184(%rax), %r11 + jmp *%r11 +1: + pushq %rdi + pushq %rsi + pushq %rbp + call _glapi_get_dispatch + popq %rbp + popq %rsi + popq %rdi + movq 10184(%rax), %r11 + jmp *%r11 +#endif /* defined(GLX_USE_TLS) */ + .size GL_PREFIX(_dispatch_stub_1273), .-GL_PREFIX(_dispatch_stub_1273) + + .p2align 4,,15 + .globl GL_PREFIX(_dispatch_stub_1274) + .type GL_PREFIX(_dispatch_stub_1274), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1274)) +GL_PREFIX(_dispatch_stub_1274): +#if defined(GLX_USE_TLS) + call _x86_64_get_dispatch@PLT + movq 10192(%rax), %r11 + jmp *%r11 +#elif defined(HAVE_PTHREAD) + pushq %rdi pushq %rsi pushq %rdx pushq %rcx @@ -50076,13 +50209,13 @@ popq %rdx popq %rsi popq %rdi - movq 10168(%rax), %r11 + movq 10192(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10168(%rax), %r11 + movq 10192(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -50100,19 +50233,19 @@ popq %rdx popq %rsi popq %rdi - movq 10168(%rax), %r11 + movq 10192(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1271), .-GL_PREFIX(_dispatch_stub_1271) + .size GL_PREFIX(_dispatch_stub_1274), .-GL_PREFIX(_dispatch_stub_1274) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1272) - .type GL_PREFIX(_dispatch_stub_1272), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1272)) -GL_PREFIX(_dispatch_stub_1272): + .globl GL_PREFIX(_dispatch_stub_1275) + .type GL_PREFIX(_dispatch_stub_1275), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1275)) +GL_PREFIX(_dispatch_stub_1275): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10176(%rax), %r11 + movq 10200(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -50126,13 +50259,13 @@ popq %rdx popq %rsi popq %rdi - movq 10176(%rax), %r11 + movq 10200(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10176(%rax), %r11 + movq 10200(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -50146,19 +50279,19 @@ popq %rdx popq %rsi popq %rdi - movq 10176(%rax), %r11 + movq 10200(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1272), .-GL_PREFIX(_dispatch_stub_1272) + .size GL_PREFIX(_dispatch_stub_1275), .-GL_PREFIX(_dispatch_stub_1275) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1273) - .type GL_PREFIX(_dispatch_stub_1273), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1273)) -GL_PREFIX(_dispatch_stub_1273): + .globl GL_PREFIX(_dispatch_stub_1276) + .type GL_PREFIX(_dispatch_stub_1276), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1276)) +GL_PREFIX(_dispatch_stub_1276): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10184(%rax), %r11 + movq 10208(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -50168,13 +50301,13 @@ popq %rbp popq %rsi popq %rdi - movq 10184(%rax), %r11 + movq 10208(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10184(%rax), %r11 + movq 10208(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -50184,19 +50317,19 @@ popq %rbp popq %rsi popq %rdi - movq 10184(%rax), %r11 + movq 10208(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1273), .-GL_PREFIX(_dispatch_stub_1273) + .size GL_PREFIX(_dispatch_stub_1276), .-GL_PREFIX(_dispatch_stub_1276) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1274) - .type GL_PREFIX(_dispatch_stub_1274), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1274)) -GL_PREFIX(_dispatch_stub_1274): + .globl GL_PREFIX(_dispatch_stub_1277) + .type GL_PREFIX(_dispatch_stub_1277), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1277)) +GL_PREFIX(_dispatch_stub_1277): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10192(%rax), %r11 + movq 10216(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -50214,13 +50347,13 @@ popq %rdx popq %rsi popq %rdi - movq 10192(%rax), %r11 + movq 10216(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10192(%rax), %r11 + movq 10216(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -50238,19 +50371,19 @@ popq %rdx popq %rsi popq %rdi - movq 10192(%rax), %r11 + movq 10216(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1274), .-GL_PREFIX(_dispatch_stub_1274) + .size GL_PREFIX(_dispatch_stub_1277), .-GL_PREFIX(_dispatch_stub_1277) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1275) - .type GL_PREFIX(_dispatch_stub_1275), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1275)) -GL_PREFIX(_dispatch_stub_1275): + .globl GL_PREFIX(_dispatch_stub_1278) + .type GL_PREFIX(_dispatch_stub_1278), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1278)) +GL_PREFIX(_dispatch_stub_1278): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10200(%rax), %r11 + movq 10224(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) subq $24, %rsp @@ -50262,13 +50395,13 @@ movq 8(%rsp), %xmm1 movq (%rsp), %xmm0 addq $24, %rsp - movq 10200(%rax), %r11 + movq 10224(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10200(%rax), %r11 + movq 10224(%rax), %r11 jmp *%r11 1: subq $24, %rsp @@ -50280,19 +50413,57 @@ movq 8(%rsp), %xmm1 movq (%rsp), %xmm0 addq $24, %rsp - movq 10200(%rax), %r11 + movq 10224(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1275), .-GL_PREFIX(_dispatch_stub_1275) + .size GL_PREFIX(_dispatch_stub_1278), .-GL_PREFIX(_dispatch_stub_1278) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1276) - .type GL_PREFIX(_dispatch_stub_1276), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1276)) -GL_PREFIX(_dispatch_stub_1276): + .globl GL_PREFIX(_dispatch_stub_1279) + .type GL_PREFIX(_dispatch_stub_1279), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1279)) +GL_PREFIX(_dispatch_stub_1279): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10208(%rax), %r11 + movq 10232(%rax), %r11 + jmp *%r11 +#elif defined(HAVE_PTHREAD) + pushq %rdi + pushq %rsi + pushq %rdx + call _x86_64_get_dispatch@PLT + popq %rdx + popq %rsi + popq %rdi + movq 10232(%rax), %r11 + jmp *%r11 +#else + movq _glapi_Dispatch(%rip), %rax + testq %rax, %rax + je 1f + movq 10232(%rax), %r11 + jmp *%r11 +1: + pushq %rdi + pushq %rsi + pushq %rdx + call _glapi_get_dispatch + popq %rdx + popq %rsi + popq %rdi + movq 10232(%rax), %r11 + jmp *%r11 +#endif /* defined(GLX_USE_TLS) */ + .size GL_PREFIX(_dispatch_stub_1279), .-GL_PREFIX(_dispatch_stub_1279) + + .p2align 4,,15 + .globl GL_PREFIX(_dispatch_stub_1280) + .type GL_PREFIX(_dispatch_stub_1280), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1280)) +GL_PREFIX(_dispatch_stub_1280): +#if defined(GLX_USE_TLS) + call _x86_64_get_dispatch@PLT + movq 10240(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -50306,13 +50477,13 @@ popq %rdx popq %rsi popq %rdi - movq 10208(%rax), %r11 + movq 10240(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10208(%rax), %r11 + movq 10240(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -50326,19 +50497,19 @@ popq %rdx popq %rsi popq %rdi - movq 10208(%rax), %r11 + movq 10240(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1276), .-GL_PREFIX(_dispatch_stub_1276) + .size GL_PREFIX(_dispatch_stub_1280), .-GL_PREFIX(_dispatch_stub_1280) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1277) - .type GL_PREFIX(_dispatch_stub_1277), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1277)) -GL_PREFIX(_dispatch_stub_1277): + .globl GL_PREFIX(_dispatch_stub_1281) + .type GL_PREFIX(_dispatch_stub_1281), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1281)) +GL_PREFIX(_dispatch_stub_1281): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10216(%rax), %r11 + movq 10248(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -50352,13 +50523,13 @@ popq %rdx popq %rsi popq %rdi - movq 10216(%rax), %r11 + movq 10248(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10216(%rax), %r11 + movq 10248(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -50372,19 +50543,19 @@ popq %rdx popq %rsi popq %rdi - movq 10216(%rax), %r11 + movq 10248(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1277), .-GL_PREFIX(_dispatch_stub_1277) + .size GL_PREFIX(_dispatch_stub_1281), .-GL_PREFIX(_dispatch_stub_1281) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1278) - .type GL_PREFIX(_dispatch_stub_1278), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1278)) -GL_PREFIX(_dispatch_stub_1278): + .globl GL_PREFIX(_dispatch_stub_1282) + .type GL_PREFIX(_dispatch_stub_1282), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1282)) +GL_PREFIX(_dispatch_stub_1282): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10224(%rax), %r11 + movq 10256(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -50398,13 +50569,13 @@ popq %rdx popq %rsi popq %rdi - movq 10224(%rax), %r11 + movq 10256(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10224(%rax), %r11 + movq 10256(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -50418,19 +50589,19 @@ popq %rdx popq %rsi popq %rdi - movq 10224(%rax), %r11 + movq 10256(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1278), .-GL_PREFIX(_dispatch_stub_1278) + .size GL_PREFIX(_dispatch_stub_1282), .-GL_PREFIX(_dispatch_stub_1282) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1279) - .type GL_PREFIX(_dispatch_stub_1279), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1279)) -GL_PREFIX(_dispatch_stub_1279): + .globl GL_PREFIX(_dispatch_stub_1283) + .type GL_PREFIX(_dispatch_stub_1283), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1283)) +GL_PREFIX(_dispatch_stub_1283): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10232(%rax), %r11 + movq 10264(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -50440,13 +50611,13 @@ popq %rbp popq %rsi popq %rdi - movq 10232(%rax), %r11 + movq 10264(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10232(%rax), %r11 + movq 10264(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -50456,19 +50627,19 @@ popq %rbp popq %rsi popq %rdi - movq 10232(%rax), %r11 + movq 10264(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1279), .-GL_PREFIX(_dispatch_stub_1279) + .size GL_PREFIX(_dispatch_stub_1283), .-GL_PREFIX(_dispatch_stub_1283) .p2align 4,,15 - .globl GL_PREFIX(_dispatch_stub_1280) - .type GL_PREFIX(_dispatch_stub_1280), @function - HIDDEN(GL_PREFIX(_dispatch_stub_1280)) -GL_PREFIX(_dispatch_stub_1280): + .globl GL_PREFIX(_dispatch_stub_1284) + .type GL_PREFIX(_dispatch_stub_1284), @function + HIDDEN(GL_PREFIX(_dispatch_stub_1284)) +GL_PREFIX(_dispatch_stub_1284): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10240(%rax), %r11 + movq 10272(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -50478,13 +50649,13 @@ popq %rbp popq %rsi popq %rdi - movq 10240(%rax), %r11 + movq 10272(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10240(%rax), %r11 + movq 10272(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -50494,10 +50665,10 @@ popq %rbp popq %rsi popq %rdi - movq 10240(%rax), %r11 + movq 10272(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ - .size GL_PREFIX(_dispatch_stub_1280), .-GL_PREFIX(_dispatch_stub_1280) + .size GL_PREFIX(_dispatch_stub_1284), .-GL_PREFIX(_dispatch_stub_1284) .p2align 4,,15 .globl GL_PREFIX(AlphaFuncx) @@ -50505,7 +50676,7 @@ GL_PREFIX(AlphaFuncx): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10248(%rax), %r11 + movq 10280(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -50515,13 +50686,13 @@ popq %rbp popq %rsi popq %rdi - movq 10248(%rax), %r11 + movq 10280(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10248(%rax), %r11 + movq 10280(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -50531,7 +50702,7 @@ popq %rbp popq %rsi popq %rdi - movq 10248(%rax), %r11 + movq 10280(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(AlphaFuncx), .-GL_PREFIX(AlphaFuncx) @@ -50542,7 +50713,7 @@ GL_PREFIX(ClearColorx): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10256(%rax), %r11 + movq 10288(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -50556,13 +50727,13 @@ popq %rdx popq %rsi popq %rdi - movq 10256(%rax), %r11 + movq 10288(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10256(%rax), %r11 + movq 10288(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -50576,7 +50747,7 @@ popq %rdx popq %rsi popq %rdi - movq 10256(%rax), %r11 + movq 10288(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ClearColorx), .-GL_PREFIX(ClearColorx) @@ -50587,25 +50758,25 @@ GL_PREFIX(ClearDepthx): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10264(%rax), %r11 + movq 10296(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi call _x86_64_get_dispatch@PLT popq %rdi - movq 10264(%rax), %r11 + movq 10296(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10264(%rax), %r11 + movq 10296(%rax), %r11 jmp *%r11 1: pushq %rdi call _glapi_get_dispatch popq %rdi - movq 10264(%rax), %r11 + movq 10296(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ClearDepthx), .-GL_PREFIX(ClearDepthx) @@ -50616,7 +50787,7 @@ GL_PREFIX(Color4x): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10272(%rax), %r11 + movq 10304(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -50630,13 +50801,13 @@ popq %rdx popq %rsi popq %rdi - movq 10272(%rax), %r11 + movq 10304(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10272(%rax), %r11 + movq 10304(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -50650,7 +50821,7 @@ popq %rdx popq %rsi popq %rdi - movq 10272(%rax), %r11 + movq 10304(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(Color4x), .-GL_PREFIX(Color4x) @@ -50661,7 +50832,7 @@ GL_PREFIX(DepthRangex): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10280(%rax), %r11 + movq 10312(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -50671,13 +50842,13 @@ popq %rbp popq %rsi popq %rdi - movq 10280(%rax), %r11 + movq 10312(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10280(%rax), %r11 + movq 10312(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -50687,7 +50858,7 @@ popq %rbp popq %rsi popq %rdi - movq 10280(%rax), %r11 + movq 10312(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(DepthRangex), .-GL_PREFIX(DepthRangex) @@ -50698,7 +50869,7 @@ GL_PREFIX(Fogx): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10288(%rax), %r11 + movq 10320(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -50708,13 +50879,13 @@ popq %rbp popq %rsi popq %rdi - movq 10288(%rax), %r11 + movq 10320(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10288(%rax), %r11 + movq 10320(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -50724,7 +50895,7 @@ popq %rbp popq %rsi popq %rdi - movq 10288(%rax), %r11 + movq 10320(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(Fogx), .-GL_PREFIX(Fogx) @@ -50735,7 +50906,7 @@ GL_PREFIX(Fogxv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10296(%rax), %r11 + movq 10328(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -50745,13 +50916,13 @@ popq %rbp popq %rsi popq %rdi - movq 10296(%rax), %r11 + movq 10328(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10296(%rax), %r11 + movq 10328(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -50761,7 +50932,7 @@ popq %rbp popq %rsi popq %rdi - movq 10296(%rax), %r11 + movq 10328(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(Fogxv), .-GL_PREFIX(Fogxv) @@ -50772,7 +50943,7 @@ GL_PREFIX(Frustumf): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10304(%rax), %r11 + movq 10336(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) subq $56, %rsp @@ -50790,13 +50961,13 @@ movq 8(%rsp), %xmm1 movq (%rsp), %xmm0 addq $56, %rsp - movq 10304(%rax), %r11 + movq 10336(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10304(%rax), %r11 + movq 10336(%rax), %r11 jmp *%r11 1: subq $56, %rsp @@ -50814,7 +50985,7 @@ movq 8(%rsp), %xmm1 movq (%rsp), %xmm0 addq $56, %rsp - movq 10304(%rax), %r11 + movq 10336(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(Frustumf), .-GL_PREFIX(Frustumf) @@ -50825,7 +50996,7 @@ GL_PREFIX(Frustumx): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10312(%rax), %r11 + movq 10344(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -50843,13 +51014,13 @@ popq %rdx popq %rsi popq %rdi - movq 10312(%rax), %r11 + movq 10344(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10312(%rax), %r11 + movq 10344(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -50867,7 +51038,7 @@ popq %rdx popq %rsi popq %rdi - movq 10312(%rax), %r11 + movq 10344(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(Frustumx), .-GL_PREFIX(Frustumx) @@ -50878,7 +51049,7 @@ GL_PREFIX(LightModelx): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10320(%rax), %r11 + movq 10352(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -50888,13 +51059,13 @@ popq %rbp popq %rsi popq %rdi - movq 10320(%rax), %r11 + movq 10352(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10320(%rax), %r11 + movq 10352(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -50904,7 +51075,7 @@ popq %rbp popq %rsi popq %rdi - movq 10320(%rax), %r11 + movq 10352(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(LightModelx), .-GL_PREFIX(LightModelx) @@ -50915,7 +51086,7 @@ GL_PREFIX(LightModelxv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10328(%rax), %r11 + movq 10360(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -50925,13 +51096,13 @@ popq %rbp popq %rsi popq %rdi - movq 10328(%rax), %r11 + movq 10360(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10328(%rax), %r11 + movq 10360(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -50941,7 +51112,7 @@ popq %rbp popq %rsi popq %rdi - movq 10328(%rax), %r11 + movq 10360(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(LightModelxv), .-GL_PREFIX(LightModelxv) @@ -50952,7 +51123,7 @@ GL_PREFIX(Lightx): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10336(%rax), %r11 + movq 10368(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -50962,13 +51133,13 @@ popq %rdx popq %rsi popq %rdi - movq 10336(%rax), %r11 + movq 10368(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10336(%rax), %r11 + movq 10368(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -50978,7 +51149,7 @@ popq %rdx popq %rsi popq %rdi - movq 10336(%rax), %r11 + movq 10368(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(Lightx), .-GL_PREFIX(Lightx) @@ -50989,7 +51160,7 @@ GL_PREFIX(Lightxv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10344(%rax), %r11 + movq 10376(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -50999,13 +51170,13 @@ popq %rdx popq %rsi popq %rdi - movq 10344(%rax), %r11 + movq 10376(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10344(%rax), %r11 + movq 10376(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -51015,7 +51186,7 @@ popq %rdx popq %rsi popq %rdi - movq 10344(%rax), %r11 + movq 10376(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(Lightxv), .-GL_PREFIX(Lightxv) @@ -51026,25 +51197,25 @@ GL_PREFIX(LineWidthx): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10352(%rax), %r11 + movq 10384(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi call _x86_64_get_dispatch@PLT popq %rdi - movq 10352(%rax), %r11 + movq 10384(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10352(%rax), %r11 + movq 10384(%rax), %r11 jmp *%r11 1: pushq %rdi call _glapi_get_dispatch popq %rdi - movq 10352(%rax), %r11 + movq 10384(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(LineWidthx), .-GL_PREFIX(LineWidthx) @@ -51055,25 +51226,25 @@ GL_PREFIX(LoadMatrixx): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10360(%rax), %r11 + movq 10392(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi call _x86_64_get_dispatch@PLT popq %rdi - movq 10360(%rax), %r11 + movq 10392(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10360(%rax), %r11 + movq 10392(%rax), %r11 jmp *%r11 1: pushq %rdi call _glapi_get_dispatch popq %rdi - movq 10360(%rax), %r11 + movq 10392(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(LoadMatrixx), .-GL_PREFIX(LoadMatrixx) @@ -51084,7 +51255,7 @@ GL_PREFIX(Materialx): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10368(%rax), %r11 + movq 10400(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -51094,13 +51265,13 @@ popq %rdx popq %rsi popq %rdi - movq 10368(%rax), %r11 + movq 10400(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10368(%rax), %r11 + movq 10400(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -51110,7 +51281,7 @@ popq %rdx popq %rsi popq %rdi - movq 10368(%rax), %r11 + movq 10400(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(Materialx), .-GL_PREFIX(Materialx) @@ -51121,7 +51292,7 @@ GL_PREFIX(Materialxv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10376(%rax), %r11 + movq 10408(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -51131,13 +51302,13 @@ popq %rdx popq %rsi popq %rdi - movq 10376(%rax), %r11 + movq 10408(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10376(%rax), %r11 + movq 10408(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -51147,7 +51318,7 @@ popq %rdx popq %rsi popq %rdi - movq 10376(%rax), %r11 + movq 10408(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(Materialxv), .-GL_PREFIX(Materialxv) @@ -51158,25 +51329,25 @@ GL_PREFIX(MultMatrixx): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10384(%rax), %r11 + movq 10416(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi call _x86_64_get_dispatch@PLT popq %rdi - movq 10384(%rax), %r11 + movq 10416(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10384(%rax), %r11 + movq 10416(%rax), %r11 jmp *%r11 1: pushq %rdi call _glapi_get_dispatch popq %rdi - movq 10384(%rax), %r11 + movq 10416(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(MultMatrixx), .-GL_PREFIX(MultMatrixx) @@ -51187,7 +51358,7 @@ GL_PREFIX(MultiTexCoord4x): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10392(%rax), %r11 + movq 10424(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -51201,13 +51372,13 @@ popq %rdx popq %rsi popq %rdi - movq 10392(%rax), %r11 + movq 10424(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10392(%rax), %r11 + movq 10424(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -51221,7 +51392,7 @@ popq %rdx popq %rsi popq %rdi - movq 10392(%rax), %r11 + movq 10424(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(MultiTexCoord4x), .-GL_PREFIX(MultiTexCoord4x) @@ -51232,7 +51403,7 @@ GL_PREFIX(Normal3x): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10400(%rax), %r11 + movq 10432(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -51242,13 +51413,13 @@ popq %rdx popq %rsi popq %rdi - movq 10400(%rax), %r11 + movq 10432(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10400(%rax), %r11 + movq 10432(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -51258,7 +51429,7 @@ popq %rdx popq %rsi popq %rdi - movq 10400(%rax), %r11 + movq 10432(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(Normal3x), .-GL_PREFIX(Normal3x) @@ -51269,7 +51440,7 @@ GL_PREFIX(Orthof): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10408(%rax), %r11 + movq 10440(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) subq $56, %rsp @@ -51287,13 +51458,13 @@ movq 8(%rsp), %xmm1 movq (%rsp), %xmm0 addq $56, %rsp - movq 10408(%rax), %r11 + movq 10440(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10408(%rax), %r11 + movq 10440(%rax), %r11 jmp *%r11 1: subq $56, %rsp @@ -51311,7 +51482,7 @@ movq 8(%rsp), %xmm1 movq (%rsp), %xmm0 addq $56, %rsp - movq 10408(%rax), %r11 + movq 10440(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(Orthof), .-GL_PREFIX(Orthof) @@ -51322,7 +51493,7 @@ GL_PREFIX(Orthox): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10416(%rax), %r11 + movq 10448(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -51340,13 +51511,13 @@ popq %rdx popq %rsi popq %rdi - movq 10416(%rax), %r11 + movq 10448(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10416(%rax), %r11 + movq 10448(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -51364,7 +51535,7 @@ popq %rdx popq %rsi popq %rdi - movq 10416(%rax), %r11 + movq 10448(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(Orthox), .-GL_PREFIX(Orthox) @@ -51375,25 +51546,25 @@ GL_PREFIX(PointSizex): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10424(%rax), %r11 + movq 10456(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi call _x86_64_get_dispatch@PLT popq %rdi - movq 10424(%rax), %r11 + movq 10456(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10424(%rax), %r11 + movq 10456(%rax), %r11 jmp *%r11 1: pushq %rdi call _glapi_get_dispatch popq %rdi - movq 10424(%rax), %r11 + movq 10456(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(PointSizex), .-GL_PREFIX(PointSizex) @@ -51404,7 +51575,7 @@ GL_PREFIX(PolygonOffsetx): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10432(%rax), %r11 + movq 10464(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -51414,13 +51585,13 @@ popq %rbp popq %rsi popq %rdi - movq 10432(%rax), %r11 + movq 10464(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10432(%rax), %r11 + movq 10464(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -51430,7 +51601,7 @@ popq %rbp popq %rsi popq %rdi - movq 10432(%rax), %r11 + movq 10464(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(PolygonOffsetx), .-GL_PREFIX(PolygonOffsetx) @@ -51441,7 +51612,7 @@ GL_PREFIX(Rotatex): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10440(%rax), %r11 + movq 10472(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -51455,13 +51626,13 @@ popq %rdx popq %rsi popq %rdi - movq 10440(%rax), %r11 + movq 10472(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10440(%rax), %r11 + movq 10472(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -51475,7 +51646,7 @@ popq %rdx popq %rsi popq %rdi - movq 10440(%rax), %r11 + movq 10472(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(Rotatex), .-GL_PREFIX(Rotatex) @@ -51486,7 +51657,7 @@ GL_PREFIX(SampleCoveragex): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10448(%rax), %r11 + movq 10480(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -51496,13 +51667,13 @@ popq %rbp popq %rsi popq %rdi - movq 10448(%rax), %r11 + movq 10480(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10448(%rax), %r11 + movq 10480(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -51512,7 +51683,7 @@ popq %rbp popq %rsi popq %rdi - movq 10448(%rax), %r11 + movq 10480(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(SampleCoveragex), .-GL_PREFIX(SampleCoveragex) @@ -51523,7 +51694,7 @@ GL_PREFIX(Scalex): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10456(%rax), %r11 + movq 10488(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -51533,13 +51704,13 @@ popq %rdx popq %rsi popq %rdi - movq 10456(%rax), %r11 + movq 10488(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10456(%rax), %r11 + movq 10488(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -51549,7 +51720,7 @@ popq %rdx popq %rsi popq %rdi - movq 10456(%rax), %r11 + movq 10488(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(Scalex), .-GL_PREFIX(Scalex) @@ -51560,7 +51731,7 @@ GL_PREFIX(TexEnvx): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10464(%rax), %r11 + movq 10496(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -51570,13 +51741,13 @@ popq %rdx popq %rsi popq %rdi - movq 10464(%rax), %r11 + movq 10496(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10464(%rax), %r11 + movq 10496(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -51586,7 +51757,7 @@ popq %rdx popq %rsi popq %rdi - movq 10464(%rax), %r11 + movq 10496(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(TexEnvx), .-GL_PREFIX(TexEnvx) @@ -51597,7 +51768,7 @@ GL_PREFIX(TexEnvxv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10472(%rax), %r11 + movq 10504(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -51607,13 +51778,13 @@ popq %rdx popq %rsi popq %rdi - movq 10472(%rax), %r11 + movq 10504(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10472(%rax), %r11 + movq 10504(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -51623,7 +51794,7 @@ popq %rdx popq %rsi popq %rdi - movq 10472(%rax), %r11 + movq 10504(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(TexEnvxv), .-GL_PREFIX(TexEnvxv) @@ -51634,7 +51805,7 @@ GL_PREFIX(TexParameterx): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10480(%rax), %r11 + movq 10512(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -51644,13 +51815,13 @@ popq %rdx popq %rsi popq %rdi - movq 10480(%rax), %r11 + movq 10512(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10480(%rax), %r11 + movq 10512(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -51660,7 +51831,7 @@ popq %rdx popq %rsi popq %rdi - movq 10480(%rax), %r11 + movq 10512(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(TexParameterx), .-GL_PREFIX(TexParameterx) @@ -51671,7 +51842,7 @@ GL_PREFIX(Translatex): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10488(%rax), %r11 + movq 10520(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -51681,13 +51852,13 @@ popq %rdx popq %rsi popq %rdi - movq 10488(%rax), %r11 + movq 10520(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10488(%rax), %r11 + movq 10520(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -51697,7 +51868,7 @@ popq %rdx popq %rsi popq %rdi - movq 10488(%rax), %r11 + movq 10520(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(Translatex), .-GL_PREFIX(Translatex) @@ -51708,7 +51879,7 @@ GL_PREFIX(ClipPlanef): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10496(%rax), %r11 + movq 10528(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -51718,13 +51889,13 @@ popq %rbp popq %rsi popq %rdi - movq 10496(%rax), %r11 + movq 10528(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10496(%rax), %r11 + movq 10528(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -51734,7 +51905,7 @@ popq %rbp popq %rsi popq %rdi - movq 10496(%rax), %r11 + movq 10528(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ClipPlanef), .-GL_PREFIX(ClipPlanef) @@ -51745,7 +51916,7 @@ GL_PREFIX(ClipPlanex): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10504(%rax), %r11 + movq 10536(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -51755,13 +51926,13 @@ popq %rbp popq %rsi popq %rdi - movq 10504(%rax), %r11 + movq 10536(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10504(%rax), %r11 + movq 10536(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -51771,7 +51942,7 @@ popq %rbp popq %rsi popq %rdi - movq 10504(%rax), %r11 + movq 10536(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(ClipPlanex), .-GL_PREFIX(ClipPlanex) @@ -51782,7 +51953,7 @@ GL_PREFIX(GetClipPlanef): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10512(%rax), %r11 + movq 10544(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -51792,13 +51963,13 @@ popq %rbp popq %rsi popq %rdi - movq 10512(%rax), %r11 + movq 10544(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10512(%rax), %r11 + movq 10544(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -51808,7 +51979,7 @@ popq %rbp popq %rsi popq %rdi - movq 10512(%rax), %r11 + movq 10544(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(GetClipPlanef), .-GL_PREFIX(GetClipPlanef) @@ -51819,7 +51990,7 @@ GL_PREFIX(GetClipPlanex): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10520(%rax), %r11 + movq 10552(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -51829,13 +52000,13 @@ popq %rbp popq %rsi popq %rdi - movq 10520(%rax), %r11 + movq 10552(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10520(%rax), %r11 + movq 10552(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -51845,7 +52016,7 @@ popq %rbp popq %rsi popq %rdi - movq 10520(%rax), %r11 + movq 10552(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(GetClipPlanex), .-GL_PREFIX(GetClipPlanex) @@ -51856,7 +52027,7 @@ GL_PREFIX(GetFixedv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10528(%rax), %r11 + movq 10560(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -51866,13 +52037,13 @@ popq %rbp popq %rsi popq %rdi - movq 10528(%rax), %r11 + movq 10560(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10528(%rax), %r11 + movq 10560(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -51882,7 +52053,7 @@ popq %rbp popq %rsi popq %rdi - movq 10528(%rax), %r11 + movq 10560(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(GetFixedv), .-GL_PREFIX(GetFixedv) @@ -51893,7 +52064,7 @@ GL_PREFIX(GetLightxv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10536(%rax), %r11 + movq 10568(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -51903,13 +52074,13 @@ popq %rdx popq %rsi popq %rdi - movq 10536(%rax), %r11 + movq 10568(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10536(%rax), %r11 + movq 10568(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -51919,7 +52090,7 @@ popq %rdx popq %rsi popq %rdi - movq 10536(%rax), %r11 + movq 10568(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(GetLightxv), .-GL_PREFIX(GetLightxv) @@ -51930,7 +52101,7 @@ GL_PREFIX(GetMaterialxv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10544(%rax), %r11 + movq 10576(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -51940,13 +52111,13 @@ popq %rdx popq %rsi popq %rdi - movq 10544(%rax), %r11 + movq 10576(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10544(%rax), %r11 + movq 10576(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -51956,7 +52127,7 @@ popq %rdx popq %rsi popq %rdi - movq 10544(%rax), %r11 + movq 10576(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(GetMaterialxv), .-GL_PREFIX(GetMaterialxv) @@ -51967,7 +52138,7 @@ GL_PREFIX(GetTexEnvxv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10552(%rax), %r11 + movq 10584(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -51977,13 +52148,13 @@ popq %rdx popq %rsi popq %rdi - movq 10552(%rax), %r11 + movq 10584(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10552(%rax), %r11 + movq 10584(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -51993,7 +52164,7 @@ popq %rdx popq %rsi popq %rdi - movq 10552(%rax), %r11 + movq 10584(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(GetTexEnvxv), .-GL_PREFIX(GetTexEnvxv) @@ -52004,7 +52175,7 @@ GL_PREFIX(GetTexParameterxv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10560(%rax), %r11 + movq 10592(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -52014,13 +52185,13 @@ popq %rdx popq %rsi popq %rdi - movq 10560(%rax), %r11 + movq 10592(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10560(%rax), %r11 + movq 10592(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -52030,7 +52201,7 @@ popq %rdx popq %rsi popq %rdi - movq 10560(%rax), %r11 + movq 10592(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(GetTexParameterxv), .-GL_PREFIX(GetTexParameterxv) @@ -52041,7 +52212,7 @@ GL_PREFIX(PointParameterx): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10568(%rax), %r11 + movq 10600(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -52051,13 +52222,13 @@ popq %rbp popq %rsi popq %rdi - movq 10568(%rax), %r11 + movq 10600(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10568(%rax), %r11 + movq 10600(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -52067,7 +52238,7 @@ popq %rbp popq %rsi popq %rdi - movq 10568(%rax), %r11 + movq 10600(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(PointParameterx), .-GL_PREFIX(PointParameterx) @@ -52078,7 +52249,7 @@ GL_PREFIX(PointParameterxv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10576(%rax), %r11 + movq 10608(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -52088,13 +52259,13 @@ popq %rbp popq %rsi popq %rdi - movq 10576(%rax), %r11 + movq 10608(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10576(%rax), %r11 + movq 10608(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -52104,7 +52275,7 @@ popq %rbp popq %rsi popq %rdi - movq 10576(%rax), %r11 + movq 10608(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(PointParameterxv), .-GL_PREFIX(PointParameterxv) @@ -52115,7 +52286,7 @@ GL_PREFIX(TexParameterxv): #if defined(GLX_USE_TLS) call _x86_64_get_dispatch@PLT - movq 10584(%rax), %r11 + movq 10616(%rax), %r11 jmp *%r11 #elif defined(HAVE_PTHREAD) pushq %rdi @@ -52125,13 +52296,13 @@ popq %rdx popq %rsi popq %rdi - movq 10584(%rax), %r11 + movq 10616(%rax), %r11 jmp *%r11 #else movq _glapi_Dispatch(%rip), %rax testq %rax, %rax je 1f - movq 10584(%rax), %r11 + movq 10616(%rax), %r11 jmp *%r11 1: pushq %rdi @@ -52141,11 +52312,101 @@ popq %rdx popq %rsi popq %rdi - movq 10584(%rax), %r11 + movq 10616(%rax), %r11 jmp *%r11 #endif /* defined(GLX_USE_TLS) */ .size GL_PREFIX(TexParameterxv), .-GL_PREFIX(TexParameterxv) + .p2align 4,,15 + .globl GL_PREFIX(BlendBarrier) + .type GL_PREFIX(BlendBarrier), @function +GL_PREFIX(BlendBarrier): +#if defined(GLX_USE_TLS) + call _x86_64_get_dispatch@PLT + movq 10624(%rax), %r11 + jmp *%r11 +#elif defined(HAVE_PTHREAD) + pushq %rbp + call _x86_64_get_dispatch@PLT + popq %rbp + movq 10624(%rax), %r11 + jmp *%r11 +#else + movq _glapi_Dispatch(%rip), %rax + testq %rax, %rax + je 1f + movq 10624(%rax), %r11 + jmp *%r11 +1: + pushq %rbp + call _glapi_get_dispatch + popq %rbp + movq 10624(%rax), %r11 + jmp *%r11 +#endif /* defined(GLX_USE_TLS) */ + .size GL_PREFIX(BlendBarrier), .-GL_PREFIX(BlendBarrier) + + .p2align 4,,15 + .globl GL_PREFIX(PrimitiveBoundingBox) + .type GL_PREFIX(PrimitiveBoundingBox), @function +GL_PREFIX(PrimitiveBoundingBox): +#if defined(GLX_USE_TLS) + call _x86_64_get_dispatch@PLT + movq 10632(%rax), %r11 + jmp *%r11 +#elif defined(HAVE_PTHREAD) + subq $72, %rsp + movq %xmm0, (%rsp) + movq %xmm1, 8(%rsp) + movq %xmm2, 16(%rsp) + movq %xmm3, 24(%rsp) + movq %xmm4, 32(%rsp) + movq %xmm5, 40(%rsp) + movq %xmm6, 48(%rsp) + movq %xmm7, 56(%rsp) + call _x86_64_get_dispatch@PLT + movq 56(%rsp), %xmm7 + movq 48(%rsp), %xmm6 + movq 40(%rsp), %xmm5 + movq 32(%rsp), %xmm4 + movq 24(%rsp), %xmm3 + movq 16(%rsp), %xmm2 + movq 8(%rsp), %xmm1 + movq (%rsp), %xmm0 + addq $72, %rsp + movq 10632(%rax), %r11 + jmp *%r11 +#else + movq _glapi_Dispatch(%rip), %rax + testq %rax, %rax + je 1f + movq 10632(%rax), %r11 + jmp *%r11 +1: + subq $72, %rsp + movq %xmm0, (%rsp) + movq %xmm1, 8(%rsp) + movq %xmm2, 16(%rsp) + movq %xmm3, 24(%rsp) + movq %xmm4, 32(%rsp) + movq %xmm5, 40(%rsp) + movq %xmm6, 48(%rsp) + movq %xmm7, 56(%rsp) + call _glapi_get_dispatch + movq 56(%rsp), %xmm7 + movq 48(%rsp), %xmm6 + movq 40(%rsp), %xmm5 + movq 32(%rsp), %xmm4 + movq 24(%rsp), %xmm3 + movq 16(%rsp), %xmm2 + movq 8(%rsp), %xmm1 + movq (%rsp), %xmm0 + addq $72, %rsp + movq 10632(%rax), %r11 + jmp *%r11 +#endif /* defined(GLX_USE_TLS) */ + .size GL_PREFIX(PrimitiveBoundingBox), .-GL_PREFIX(PrimitiveBoundingBox) + .globl GL_PREFIX(ArrayElementEXT) ; .set GL_PREFIX(ArrayElementEXT), GL_PREFIX(ArrayElement) .globl GL_PREFIX(BindTextureEXT) ; .set GL_PREFIX(BindTextureEXT), GL_PREFIX(BindTexture) .globl GL_PREFIX(DrawArraysEXT) ; .set GL_PREFIX(DrawArraysEXT), GL_PREFIX(DrawArrays) @@ -52410,6 +52671,15 @@ .globl GL_PREFIX(RenderbufferStorageEXT) ; .set GL_PREFIX(RenderbufferStorageEXT), GL_PREFIX(RenderbufferStorage) .globl GL_PREFIX(RenderbufferStorageMultisampleEXT) ; .set GL_PREFIX(RenderbufferStorageMultisampleEXT), GL_PREFIX(RenderbufferStorageMultisample) .globl GL_PREFIX(ProvokingVertexEXT) ; .set GL_PREFIX(ProvokingVertexEXT), GL_PREFIX(ProvokingVertex) + .globl GL_PREFIX(BlendEquationSeparatei) ; .set GL_PREFIX(BlendEquationSeparatei), GL_PREFIX(BlendEquationSeparateiARB) + .globl GL_PREFIX(BlendEquationi) ; .set GL_PREFIX(BlendEquationi), GL_PREFIX(BlendEquationiARB) + .globl GL_PREFIX(BlendFuncSeparatei) ; .set GL_PREFIX(BlendFuncSeparatei), GL_PREFIX(BlendFuncSeparateiARB) + .globl GL_PREFIX(BlendFunci) ; .set GL_PREFIX(BlendFunci), GL_PREFIX(BlendFunciARB) + .globl GL_PREFIX(GetGraphicsResetStatus) ; .set GL_PREFIX(GetGraphicsResetStatus), GL_PREFIX(GetGraphicsResetStatusARB) + .globl GL_PREFIX(GetnUniformfv) ; .set GL_PREFIX(GetnUniformfv), GL_PREFIX(GetnUniformfvARB) + .globl GL_PREFIX(GetnUniformiv) ; .set GL_PREFIX(GetnUniformiv), GL_PREFIX(GetnUniformivARB) + .globl GL_PREFIX(GetnUniformuiv) ; .set GL_PREFIX(GetnUniformuiv), GL_PREFIX(GetnUniformuivARB) + .globl GL_PREFIX(ReadnPixels) ; .set GL_PREFIX(ReadnPixels), GL_PREFIX(ReadnPixelsARB) .globl GL_PREFIX(DebugMessageCallbackARB) ; .set GL_PREFIX(DebugMessageCallbackARB), GL_PREFIX(DebugMessageCallback) .globl GL_PREFIX(DebugMessageControlARB) ; .set GL_PREFIX(DebugMessageControlARB), GL_PREFIX(DebugMessageControl) .globl GL_PREFIX(DebugMessageInsertARB) ; .set GL_PREFIX(DebugMessageInsertARB), GL_PREFIX(DebugMessageInsert) diff -Nru mesa-12.0.6/src/mapi/glapi/glapi_x86.S mesa-17.0.7/src/mapi/glapi/glapi_x86.S --- mesa-12.0.6/src/mapi/glapi/glapi_x86.S 2017-01-24 01:43:06.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/glapi_x86.S 2017-06-01 10:37:54.000000000 +0000 @@ -92,7 +92,7 @@ JMP(GL_OFFSET(off)) #endif -#ifdef HAVE_ALIAS +#ifdef HAVE_FUNC_ATTRIBUTE_ALIAS # define GL_STUB_ALIAS(fn,off,fn_alt,alias,alias_alt) \ .globl GL_PREFIX(fn, fn_alt) ; \ .set GL_PREFIX(fn, fn_alt), GL_PREFIX(alias, alias_alt) @@ -971,8 +971,7 @@ HIDDEN(GL_PREFIX(_dispatch_stub_799, _dispatch_stub_799@12)) GL_STUB(_dispatch_stub_800, 800, _dispatch_stub_800@8) HIDDEN(GL_PREFIX(_dispatch_stub_800, _dispatch_stub_800@8)) - GL_STUB(_dispatch_stub_801, 801, _dispatch_stub_801@8) - HIDDEN(GL_PREFIX(_dispatch_stub_801, _dispatch_stub_801@8)) + GL_STUB(PatchParameteri, 801, PatchParameteri@8) GL_STUB(BindTransformFeedback, 802, BindTransformFeedback@8) GL_STUB(DeleteTransformFeedbacks, 803, DeleteTransformFeedbacks@8) GL_STUB(DrawTransformFeedback, 804, DrawTransformFeedback@8) @@ -1097,158 +1096,158 @@ GL_STUB(BindSamplers, 909, BindSamplers@12) GL_STUB(BindTextures, 910, BindTextures@12) GL_STUB(BindVertexBuffers, 911, BindVertexBuffers@20) - GL_STUB(_dispatch_stub_912, 912, _dispatch_stub_912@20) - HIDDEN(GL_PREFIX(_dispatch_stub_912, _dispatch_stub_912@20)) - GL_STUB(_dispatch_stub_913, 913, _dispatch_stub_913@24) - HIDDEN(GL_PREFIX(_dispatch_stub_913, _dispatch_stub_913@24)) - GL_STUB(_dispatch_stub_914, 914, _dispatch_stub_914@8) - HIDDEN(GL_PREFIX(_dispatch_stub_914, _dispatch_stub_914@8)) + GL_STUB(_dispatch_stub_912, 912, _dispatch_stub_912@24) + HIDDEN(GL_PREFIX(_dispatch_stub_912, _dispatch_stub_912@24)) + GL_STUB(_dispatch_stub_913, 913, _dispatch_stub_913@20) + HIDDEN(GL_PREFIX(_dispatch_stub_913, _dispatch_stub_913@20)) + GL_STUB(_dispatch_stub_914, 914, _dispatch_stub_914@24) + HIDDEN(GL_PREFIX(_dispatch_stub_914, _dispatch_stub_914@24)) GL_STUB(_dispatch_stub_915, 915, _dispatch_stub_915@8) HIDDEN(GL_PREFIX(_dispatch_stub_915, _dispatch_stub_915@8)) - GL_STUB(_dispatch_stub_916, 916, _dispatch_stub_916@48) - HIDDEN(GL_PREFIX(_dispatch_stub_916, _dispatch_stub_916@48)) - GL_STUB(_dispatch_stub_917, 917, _dispatch_stub_917@8) - HIDDEN(GL_PREFIX(_dispatch_stub_917, _dispatch_stub_917@8)) - GL_STUB(_dispatch_stub_918, 918, _dispatch_stub_918@20) - HIDDEN(GL_PREFIX(_dispatch_stub_918, _dispatch_stub_918@20)) - GL_STUB(_dispatch_stub_919, 919, _dispatch_stub_919@28) - HIDDEN(GL_PREFIX(_dispatch_stub_919, _dispatch_stub_919@28)) - GL_STUB(_dispatch_stub_920, 920, _dispatch_stub_920@20) - HIDDEN(GL_PREFIX(_dispatch_stub_920, _dispatch_stub_920@20)) - GL_STUB(_dispatch_stub_921, 921, _dispatch_stub_921@16) - HIDDEN(GL_PREFIX(_dispatch_stub_921, _dispatch_stub_921@16)) + GL_STUB(_dispatch_stub_916, 916, _dispatch_stub_916@8) + HIDDEN(GL_PREFIX(_dispatch_stub_916, _dispatch_stub_916@8)) + GL_STUB(_dispatch_stub_917, 917, _dispatch_stub_917@48) + HIDDEN(GL_PREFIX(_dispatch_stub_917, _dispatch_stub_917@48)) + GL_STUB(_dispatch_stub_918, 918, _dispatch_stub_918@8) + HIDDEN(GL_PREFIX(_dispatch_stub_918, _dispatch_stub_918@8)) + GL_STUB(_dispatch_stub_919, 919, _dispatch_stub_919@20) + HIDDEN(GL_PREFIX(_dispatch_stub_919, _dispatch_stub_919@20)) + GL_STUB(_dispatch_stub_920, 920, _dispatch_stub_920@28) + HIDDEN(GL_PREFIX(_dispatch_stub_920, _dispatch_stub_920@28)) + GL_STUB(_dispatch_stub_921, 921, _dispatch_stub_921@20) + HIDDEN(GL_PREFIX(_dispatch_stub_921, _dispatch_stub_921@20)) GL_STUB(_dispatch_stub_922, 922, _dispatch_stub_922@16) HIDDEN(GL_PREFIX(_dispatch_stub_922, _dispatch_stub_922@16)) GL_STUB(_dispatch_stub_923, 923, _dispatch_stub_923@16) HIDDEN(GL_PREFIX(_dispatch_stub_923, _dispatch_stub_923@16)) - GL_STUB(_dispatch_stub_924, 924, _dispatch_stub_924@28) - HIDDEN(GL_PREFIX(_dispatch_stub_924, _dispatch_stub_924@28)) - GL_STUB(_dispatch_stub_925, 925, _dispatch_stub_925@36) - HIDDEN(GL_PREFIX(_dispatch_stub_925, _dispatch_stub_925@36)) - GL_STUB(_dispatch_stub_926, 926, _dispatch_stub_926@44) - HIDDEN(GL_PREFIX(_dispatch_stub_926, _dispatch_stub_926@44)) - GL_STUB(_dispatch_stub_927, 927, _dispatch_stub_927@20) - HIDDEN(GL_PREFIX(_dispatch_stub_927, _dispatch_stub_927@20)) - GL_STUB(_dispatch_stub_928, 928, _dispatch_stub_928@24) - HIDDEN(GL_PREFIX(_dispatch_stub_928, _dispatch_stub_928@24)) - GL_STUB(_dispatch_stub_929, 929, _dispatch_stub_929@32) - HIDDEN(GL_PREFIX(_dispatch_stub_929, _dispatch_stub_929@32)) - GL_STUB(_dispatch_stub_930, 930, _dispatch_stub_930@36) - HIDDEN(GL_PREFIX(_dispatch_stub_930, _dispatch_stub_930@36)) - GL_STUB(_dispatch_stub_931, 931, _dispatch_stub_931@8) - HIDDEN(GL_PREFIX(_dispatch_stub_931, _dispatch_stub_931@8)) + GL_STUB(_dispatch_stub_924, 924, _dispatch_stub_924@16) + HIDDEN(GL_PREFIX(_dispatch_stub_924, _dispatch_stub_924@16)) + GL_STUB(_dispatch_stub_925, 925, _dispatch_stub_925@28) + HIDDEN(GL_PREFIX(_dispatch_stub_925, _dispatch_stub_925@28)) + GL_STUB(_dispatch_stub_926, 926, _dispatch_stub_926@36) + HIDDEN(GL_PREFIX(_dispatch_stub_926, _dispatch_stub_926@36)) + GL_STUB(_dispatch_stub_927, 927, _dispatch_stub_927@44) + HIDDEN(GL_PREFIX(_dispatch_stub_927, _dispatch_stub_927@44)) + GL_STUB(_dispatch_stub_928, 928, _dispatch_stub_928@20) + HIDDEN(GL_PREFIX(_dispatch_stub_928, _dispatch_stub_928@20)) + GL_STUB(_dispatch_stub_929, 929, _dispatch_stub_929@24) + HIDDEN(GL_PREFIX(_dispatch_stub_929, _dispatch_stub_929@24)) + GL_STUB(_dispatch_stub_930, 930, _dispatch_stub_930@32) + HIDDEN(GL_PREFIX(_dispatch_stub_930, _dispatch_stub_930@32)) + GL_STUB(_dispatch_stub_931, 931, _dispatch_stub_931@36) + HIDDEN(GL_PREFIX(_dispatch_stub_931, _dispatch_stub_931@36)) GL_STUB(_dispatch_stub_932, 932, _dispatch_stub_932@8) HIDDEN(GL_PREFIX(_dispatch_stub_932, _dispatch_stub_932@8)) GL_STUB(_dispatch_stub_933, 933, _dispatch_stub_933@8) HIDDEN(GL_PREFIX(_dispatch_stub_933, _dispatch_stub_933@8)) - GL_STUB(_dispatch_stub_934, 934, _dispatch_stub_934@12) - HIDDEN(GL_PREFIX(_dispatch_stub_934, _dispatch_stub_934@12)) - GL_STUB(_dispatch_stub_935, 935, _dispatch_stub_935@8) - HIDDEN(GL_PREFIX(_dispatch_stub_935, _dispatch_stub_935@8)) + GL_STUB(_dispatch_stub_934, 934, _dispatch_stub_934@8) + HIDDEN(GL_PREFIX(_dispatch_stub_934, _dispatch_stub_934@8)) + GL_STUB(_dispatch_stub_935, 935, _dispatch_stub_935@12) + HIDDEN(GL_PREFIX(_dispatch_stub_935, _dispatch_stub_935@12)) GL_STUB(_dispatch_stub_936, 936, _dispatch_stub_936@8) HIDDEN(GL_PREFIX(_dispatch_stub_936, _dispatch_stub_936@8)) - GL_STUB(_dispatch_stub_937, 937, _dispatch_stub_937@12) - HIDDEN(GL_PREFIX(_dispatch_stub_937, _dispatch_stub_937@12)) - GL_STUB(_dispatch_stub_938, 938, _dispatch_stub_938@8) - HIDDEN(GL_PREFIX(_dispatch_stub_938, _dispatch_stub_938@8)) + GL_STUB(_dispatch_stub_937, 937, _dispatch_stub_937@8) + HIDDEN(GL_PREFIX(_dispatch_stub_937, _dispatch_stub_937@8)) + GL_STUB(_dispatch_stub_938, 938, _dispatch_stub_938@12) + HIDDEN(GL_PREFIX(_dispatch_stub_938, _dispatch_stub_938@12)) GL_STUB(_dispatch_stub_939, 939, _dispatch_stub_939@8) HIDDEN(GL_PREFIX(_dispatch_stub_939, _dispatch_stub_939@8)) GL_STUB(_dispatch_stub_940, 940, _dispatch_stub_940@8) HIDDEN(GL_PREFIX(_dispatch_stub_940, _dispatch_stub_940@8)) GL_STUB(_dispatch_stub_941, 941, _dispatch_stub_941@8) HIDDEN(GL_PREFIX(_dispatch_stub_941, _dispatch_stub_941@8)) - GL_STUB(_dispatch_stub_942, 942, _dispatch_stub_942@12) - HIDDEN(GL_PREFIX(_dispatch_stub_942, _dispatch_stub_942@12)) - GL_STUB(_dispatch_stub_943, 943, _dispatch_stub_943@4) - HIDDEN(GL_PREFIX(_dispatch_stub_943, _dispatch_stub_943@4)) - GL_STUB(_dispatch_stub_944, 944, _dispatch_stub_944@16) - HIDDEN(GL_PREFIX(_dispatch_stub_944, _dispatch_stub_944@16)) - GL_STUB(_dispatch_stub_945, 945, _dispatch_stub_945@12) - HIDDEN(GL_PREFIX(_dispatch_stub_945, _dispatch_stub_945@12)) + GL_STUB(_dispatch_stub_942, 942, _dispatch_stub_942@8) + HIDDEN(GL_PREFIX(_dispatch_stub_942, _dispatch_stub_942@8)) + GL_STUB(_dispatch_stub_943, 943, _dispatch_stub_943@12) + HIDDEN(GL_PREFIX(_dispatch_stub_943, _dispatch_stub_943@12)) + GL_STUB(_dispatch_stub_944, 944, _dispatch_stub_944@4) + HIDDEN(GL_PREFIX(_dispatch_stub_944, _dispatch_stub_944@4)) + GL_STUB(_dispatch_stub_945, 945, _dispatch_stub_945@16) + HIDDEN(GL_PREFIX(_dispatch_stub_945, _dispatch_stub_945@16)) GL_STUB(_dispatch_stub_946, 946, _dispatch_stub_946@12) HIDDEN(GL_PREFIX(_dispatch_stub_946, _dispatch_stub_946@12)) GL_STUB(_dispatch_stub_947, 947, _dispatch_stub_947@12) HIDDEN(GL_PREFIX(_dispatch_stub_947, _dispatch_stub_947@12)) - GL_STUB(_dispatch_stub_948, 948, _dispatch_stub_948@16) - HIDDEN(GL_PREFIX(_dispatch_stub_948, _dispatch_stub_948@16)) + GL_STUB(_dispatch_stub_948, 948, _dispatch_stub_948@12) + HIDDEN(GL_PREFIX(_dispatch_stub_948, _dispatch_stub_948@12)) GL_STUB(_dispatch_stub_949, 949, _dispatch_stub_949@16) HIDDEN(GL_PREFIX(_dispatch_stub_949, _dispatch_stub_949@16)) - GL_STUB(_dispatch_stub_950, 950, _dispatch_stub_950@12) - HIDDEN(GL_PREFIX(_dispatch_stub_950, _dispatch_stub_950@12)) + GL_STUB(_dispatch_stub_950, 950, _dispatch_stub_950@16) + HIDDEN(GL_PREFIX(_dispatch_stub_950, _dispatch_stub_950@16)) GL_STUB(_dispatch_stub_951, 951, _dispatch_stub_951@12) HIDDEN(GL_PREFIX(_dispatch_stub_951, _dispatch_stub_951@12)) - GL_STUB(_dispatch_stub_952, 952, _dispatch_stub_952@16) - HIDDEN(GL_PREFIX(_dispatch_stub_952, _dispatch_stub_952@16)) + GL_STUB(_dispatch_stub_952, 952, _dispatch_stub_952@12) + HIDDEN(GL_PREFIX(_dispatch_stub_952, _dispatch_stub_952@12)) GL_STUB(_dispatch_stub_953, 953, _dispatch_stub_953@16) HIDDEN(GL_PREFIX(_dispatch_stub_953, _dispatch_stub_953@16)) GL_STUB(_dispatch_stub_954, 954, _dispatch_stub_954@16) HIDDEN(GL_PREFIX(_dispatch_stub_954, _dispatch_stub_954@16)) GL_STUB(_dispatch_stub_955, 955, _dispatch_stub_955@16) HIDDEN(GL_PREFIX(_dispatch_stub_955, _dispatch_stub_955@16)) - GL_STUB(_dispatch_stub_956, 956, _dispatch_stub_956@24) - HIDDEN(GL_PREFIX(_dispatch_stub_956, _dispatch_stub_956@24)) - GL_STUB(_dispatch_stub_957, 957, _dispatch_stub_957@16) - HIDDEN(GL_PREFIX(_dispatch_stub_957, _dispatch_stub_957@16)) + GL_STUB(_dispatch_stub_956, 956, _dispatch_stub_956@16) + HIDDEN(GL_PREFIX(_dispatch_stub_956, _dispatch_stub_956@16)) + GL_STUB(_dispatch_stub_957, 957, _dispatch_stub_957@24) + HIDDEN(GL_PREFIX(_dispatch_stub_957, _dispatch_stub_957@24)) GL_STUB(_dispatch_stub_958, 958, _dispatch_stub_958@16) HIDDEN(GL_PREFIX(_dispatch_stub_958, _dispatch_stub_958@16)) - GL_STUB(_dispatch_stub_959, 959, _dispatch_stub_959@12) - HIDDEN(GL_PREFIX(_dispatch_stub_959, _dispatch_stub_959@12)) + GL_STUB(_dispatch_stub_959, 959, _dispatch_stub_959@16) + HIDDEN(GL_PREFIX(_dispatch_stub_959, _dispatch_stub_959@16)) GL_STUB(_dispatch_stub_960, 960, _dispatch_stub_960@12) HIDDEN(GL_PREFIX(_dispatch_stub_960, _dispatch_stub_960@12)) GL_STUB(_dispatch_stub_961, 961, _dispatch_stub_961@12) HIDDEN(GL_PREFIX(_dispatch_stub_961, _dispatch_stub_961@12)) GL_STUB(_dispatch_stub_962, 962, _dispatch_stub_962@12) HIDDEN(GL_PREFIX(_dispatch_stub_962, _dispatch_stub_962@12)) - GL_STUB(_dispatch_stub_963, 963, _dispatch_stub_963@16) - HIDDEN(GL_PREFIX(_dispatch_stub_963, _dispatch_stub_963@16)) + GL_STUB(_dispatch_stub_963, 963, _dispatch_stub_963@12) + HIDDEN(GL_PREFIX(_dispatch_stub_963, _dispatch_stub_963@12)) GL_STUB(_dispatch_stub_964, 964, _dispatch_stub_964@16) HIDDEN(GL_PREFIX(_dispatch_stub_964, _dispatch_stub_964@16)) - GL_STUB(_dispatch_stub_965, 965, _dispatch_stub_965@12) - HIDDEN(GL_PREFIX(_dispatch_stub_965, _dispatch_stub_965@12)) - GL_STUB(_dispatch_stub_966, 966, _dispatch_stub_966@16) - HIDDEN(GL_PREFIX(_dispatch_stub_966, _dispatch_stub_966@16)) + GL_STUB(_dispatch_stub_965, 965, _dispatch_stub_965@16) + HIDDEN(GL_PREFIX(_dispatch_stub_965, _dispatch_stub_965@16)) + GL_STUB(_dispatch_stub_966, 966, _dispatch_stub_966@12) + HIDDEN(GL_PREFIX(_dispatch_stub_966, _dispatch_stub_966@12)) GL_STUB(_dispatch_stub_967, 967, _dispatch_stub_967@16) HIDDEN(GL_PREFIX(_dispatch_stub_967, _dispatch_stub_967@16)) - GL_STUB(_dispatch_stub_968, 968, _dispatch_stub_968@12) - HIDDEN(GL_PREFIX(_dispatch_stub_968, _dispatch_stub_968@12)) + GL_STUB(_dispatch_stub_968, 968, _dispatch_stub_968@16) + HIDDEN(GL_PREFIX(_dispatch_stub_968, _dispatch_stub_968@16)) GL_STUB(_dispatch_stub_969, 969, _dispatch_stub_969@12) HIDDEN(GL_PREFIX(_dispatch_stub_969, _dispatch_stub_969@12)) - GL_STUB(_dispatch_stub_970, 970, _dispatch_stub_970@28) - HIDDEN(GL_PREFIX(_dispatch_stub_970, _dispatch_stub_970@28)) - GL_STUB(_dispatch_stub_971, 971, _dispatch_stub_971@8) - HIDDEN(GL_PREFIX(_dispatch_stub_971, _dispatch_stub_971@8)) - GL_STUB(_dispatch_stub_972, 972, _dispatch_stub_972@16) - HIDDEN(GL_PREFIX(_dispatch_stub_972, _dispatch_stub_972@16)) + GL_STUB(_dispatch_stub_970, 970, _dispatch_stub_970@12) + HIDDEN(GL_PREFIX(_dispatch_stub_970, _dispatch_stub_970@12)) + GL_STUB(_dispatch_stub_971, 971, _dispatch_stub_971@28) + HIDDEN(GL_PREFIX(_dispatch_stub_971, _dispatch_stub_971@28)) + GL_STUB(_dispatch_stub_972, 972, _dispatch_stub_972@8) + HIDDEN(GL_PREFIX(_dispatch_stub_972, _dispatch_stub_972@8)) GL_STUB(_dispatch_stub_973, 973, _dispatch_stub_973@16) HIDDEN(GL_PREFIX(_dispatch_stub_973, _dispatch_stub_973@16)) GL_STUB(_dispatch_stub_974, 974, _dispatch_stub_974@16) HIDDEN(GL_PREFIX(_dispatch_stub_974, _dispatch_stub_974@16)) GL_STUB(_dispatch_stub_975, 975, _dispatch_stub_975@16) HIDDEN(GL_PREFIX(_dispatch_stub_975, _dispatch_stub_975@16)) - GL_STUB(_dispatch_stub_976, 976, _dispatch_stub_976@8) - HIDDEN(GL_PREFIX(_dispatch_stub_976, _dispatch_stub_976@8)) - GL_STUB(_dispatch_stub_977, 977, _dispatch_stub_977@12) - HIDDEN(GL_PREFIX(_dispatch_stub_977, _dispatch_stub_977@12)) + GL_STUB(_dispatch_stub_976, 976, _dispatch_stub_976@16) + HIDDEN(GL_PREFIX(_dispatch_stub_976, _dispatch_stub_976@16)) + GL_STUB(_dispatch_stub_977, 977, _dispatch_stub_977@8) + HIDDEN(GL_PREFIX(_dispatch_stub_977, _dispatch_stub_977@8)) GL_STUB(_dispatch_stub_978, 978, _dispatch_stub_978@12) HIDDEN(GL_PREFIX(_dispatch_stub_978, _dispatch_stub_978@12)) - GL_STUB(_dispatch_stub_979, 979, _dispatch_stub_979@8) - HIDDEN(GL_PREFIX(_dispatch_stub_979, _dispatch_stub_979@8)) - GL_STUB(_dispatch_stub_980, 980, _dispatch_stub_980@16) - HIDDEN(GL_PREFIX(_dispatch_stub_980, _dispatch_stub_980@16)) + GL_STUB(_dispatch_stub_979, 979, _dispatch_stub_979@12) + HIDDEN(GL_PREFIX(_dispatch_stub_979, _dispatch_stub_979@12)) + GL_STUB(_dispatch_stub_980, 980, _dispatch_stub_980@8) + HIDDEN(GL_PREFIX(_dispatch_stub_980, _dispatch_stub_980@8)) GL_STUB(_dispatch_stub_981, 981, _dispatch_stub_981@16) HIDDEN(GL_PREFIX(_dispatch_stub_981, _dispatch_stub_981@16)) - GL_STUB(_dispatch_stub_982, 982, _dispatch_stub_982@20) - HIDDEN(GL_PREFIX(_dispatch_stub_982, _dispatch_stub_982@20)) - GL_STUB(_dispatch_stub_983, 983, _dispatch_stub_983@16) - HIDDEN(GL_PREFIX(_dispatch_stub_983, _dispatch_stub_983@16)) - GL_STUB(_dispatch_stub_984, 984, _dispatch_stub_984@20) - HIDDEN(GL_PREFIX(_dispatch_stub_984, _dispatch_stub_984@20)) - GL_STUB(_dispatch_stub_985, 985, _dispatch_stub_985@12) - HIDDEN(GL_PREFIX(_dispatch_stub_985, _dispatch_stub_985@12)) - GL_STUB(_dispatch_stub_986, 986, _dispatch_stub_986@20) - HIDDEN(GL_PREFIX(_dispatch_stub_986, _dispatch_stub_986@20)) - GL_STUB(_dispatch_stub_987, 987, _dispatch_stub_987@12) - HIDDEN(GL_PREFIX(_dispatch_stub_987, _dispatch_stub_987@12)) + GL_STUB(_dispatch_stub_982, 982, _dispatch_stub_982@16) + HIDDEN(GL_PREFIX(_dispatch_stub_982, _dispatch_stub_982@16)) + GL_STUB(_dispatch_stub_983, 983, _dispatch_stub_983@20) + HIDDEN(GL_PREFIX(_dispatch_stub_983, _dispatch_stub_983@20)) + GL_STUB(_dispatch_stub_984, 984, _dispatch_stub_984@16) + HIDDEN(GL_PREFIX(_dispatch_stub_984, _dispatch_stub_984@16)) + GL_STUB(_dispatch_stub_985, 985, _dispatch_stub_985@20) + HIDDEN(GL_PREFIX(_dispatch_stub_985, _dispatch_stub_985@20)) + GL_STUB(_dispatch_stub_986, 986, _dispatch_stub_986@12) + HIDDEN(GL_PREFIX(_dispatch_stub_986, _dispatch_stub_986@12)) + GL_STUB(_dispatch_stub_987, 987, _dispatch_stub_987@20) + HIDDEN(GL_PREFIX(_dispatch_stub_987, _dispatch_stub_987@20)) GL_STUB(_dispatch_stub_988, 988, _dispatch_stub_988@12) HIDDEN(GL_PREFIX(_dispatch_stub_988, _dispatch_stub_988@12)) GL_STUB(_dispatch_stub_989, 989, _dispatch_stub_989@12) @@ -1259,237 +1258,237 @@ HIDDEN(GL_PREFIX(_dispatch_stub_991, _dispatch_stub_991@12)) GL_STUB(_dispatch_stub_992, 992, _dispatch_stub_992@12) HIDDEN(GL_PREFIX(_dispatch_stub_992, _dispatch_stub_992@12)) - GL_STUB(_dispatch_stub_993, 993, _dispatch_stub_993@16) - HIDDEN(GL_PREFIX(_dispatch_stub_993, _dispatch_stub_993@16)) - GL_STUB(_dispatch_stub_994, 994, _dispatch_stub_994@20) - HIDDEN(GL_PREFIX(_dispatch_stub_994, _dispatch_stub_994@20)) - GL_STUB(_dispatch_stub_995, 995, _dispatch_stub_995@24) - HIDDEN(GL_PREFIX(_dispatch_stub_995, _dispatch_stub_995@24)) + GL_STUB(_dispatch_stub_993, 993, _dispatch_stub_993@12) + HIDDEN(GL_PREFIX(_dispatch_stub_993, _dispatch_stub_993@12)) + GL_STUB(_dispatch_stub_994, 994, _dispatch_stub_994@16) + HIDDEN(GL_PREFIX(_dispatch_stub_994, _dispatch_stub_994@16)) + GL_STUB(_dispatch_stub_995, 995, _dispatch_stub_995@20) + HIDDEN(GL_PREFIX(_dispatch_stub_995, _dispatch_stub_995@20)) GL_STUB(_dispatch_stub_996, 996, _dispatch_stub_996@24) HIDDEN(GL_PREFIX(_dispatch_stub_996, _dispatch_stub_996@24)) - GL_STUB(_dispatch_stub_997, 997, _dispatch_stub_997@28) - HIDDEN(GL_PREFIX(_dispatch_stub_997, _dispatch_stub_997@28)) + GL_STUB(_dispatch_stub_997, 997, _dispatch_stub_997@24) + HIDDEN(GL_PREFIX(_dispatch_stub_997, _dispatch_stub_997@24)) GL_STUB(_dispatch_stub_998, 998, _dispatch_stub_998@28) HIDDEN(GL_PREFIX(_dispatch_stub_998, _dispatch_stub_998@28)) - GL_STUB(_dispatch_stub_999, 999, _dispatch_stub_999@36) - HIDDEN(GL_PREFIX(_dispatch_stub_999, _dispatch_stub_999@36)) - GL_STUB(_dispatch_stub_1000, 1000, _dispatch_stub_1000@44) - HIDDEN(GL_PREFIX(_dispatch_stub_1000, _dispatch_stub_1000@44)) - GL_STUB(_dispatch_stub_1001, 1001, _dispatch_stub_1001@12) - HIDDEN(GL_PREFIX(_dispatch_stub_1001, _dispatch_stub_1001@12)) - GL_STUB(_dispatch_stub_1002, 1002, _dispatch_stub_1002@20) - HIDDEN(GL_PREFIX(_dispatch_stub_1002, _dispatch_stub_1002@20)) - GL_STUB(_dispatch_stub_1003, 1003, _dispatch_stub_1003@4) - HIDDEN(GL_PREFIX(_dispatch_stub_1003, _dispatch_stub_1003@4)) - GL_STUB(_dispatch_stub_1004, 1004, _dispatch_stub_1004@12) - HIDDEN(GL_PREFIX(_dispatch_stub_1004, _dispatch_stub_1004@12)) - GL_STUB(_dispatch_stub_1005, 1005, _dispatch_stub_1005@24) - HIDDEN(GL_PREFIX(_dispatch_stub_1005, _dispatch_stub_1005@24)) - GL_STUB(_dispatch_stub_1006, 1006, _dispatch_stub_1006@20) - HIDDEN(GL_PREFIX(_dispatch_stub_1006, _dispatch_stub_1006@20)) + GL_STUB(_dispatch_stub_999, 999, _dispatch_stub_999@28) + HIDDEN(GL_PREFIX(_dispatch_stub_999, _dispatch_stub_999@28)) + GL_STUB(_dispatch_stub_1000, 1000, _dispatch_stub_1000@36) + HIDDEN(GL_PREFIX(_dispatch_stub_1000, _dispatch_stub_1000@36)) + GL_STUB(_dispatch_stub_1001, 1001, _dispatch_stub_1001@44) + HIDDEN(GL_PREFIX(_dispatch_stub_1001, _dispatch_stub_1001@44)) + GL_STUB(_dispatch_stub_1002, 1002, _dispatch_stub_1002@12) + HIDDEN(GL_PREFIX(_dispatch_stub_1002, _dispatch_stub_1002@12)) + GL_STUB(_dispatch_stub_1003, 1003, _dispatch_stub_1003@20) + HIDDEN(GL_PREFIX(_dispatch_stub_1003, _dispatch_stub_1003@20)) + GL_STUB(_dispatch_stub_1004, 1004, _dispatch_stub_1004@4) + HIDDEN(GL_PREFIX(_dispatch_stub_1004, _dispatch_stub_1004@4)) + GL_STUB(_dispatch_stub_1005, 1005, _dispatch_stub_1005@12) + HIDDEN(GL_PREFIX(_dispatch_stub_1005, _dispatch_stub_1005@12)) + GL_STUB(_dispatch_stub_1006, 1006, _dispatch_stub_1006@24) + HIDDEN(GL_PREFIX(_dispatch_stub_1006, _dispatch_stub_1006@24)) GL_STUB(_dispatch_stub_1007, 1007, _dispatch_stub_1007@20) HIDDEN(GL_PREFIX(_dispatch_stub_1007, _dispatch_stub_1007@20)) - GL_STUB(_dispatch_stub_1008, 1008, _dispatch_stub_1008@12) - HIDDEN(GL_PREFIX(_dispatch_stub_1008, _dispatch_stub_1008@12)) - GL_STUB(_dispatch_stub_1009, 1009, _dispatch_stub_1009@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1009, _dispatch_stub_1009@8)) - GL_STUB(_dispatch_stub_1010, 1010, _dispatch_stub_1010@20) - HIDDEN(GL_PREFIX(_dispatch_stub_1010, _dispatch_stub_1010@20)) - GL_STUB(_dispatch_stub_1011, 1011, _dispatch_stub_1011@24) - HIDDEN(GL_PREFIX(_dispatch_stub_1011, _dispatch_stub_1011@24)) - GL_STUB(_dispatch_stub_1012, 1012, _dispatch_stub_1012@40) - HIDDEN(GL_PREFIX(_dispatch_stub_1012, _dispatch_stub_1012@40)) - GL_STUB(_dispatch_stub_1013, 1013, _dispatch_stub_1013@48) - HIDDEN(GL_PREFIX(_dispatch_stub_1013, _dispatch_stub_1013@48)) - GL_STUB(InvalidateBufferData, 1014, InvalidateBufferData@4) - GL_STUB(InvalidateBufferSubData, 1015, InvalidateBufferSubData@12) - GL_STUB(InvalidateFramebuffer, 1016, InvalidateFramebuffer@12) - GL_STUB(InvalidateSubFramebuffer, 1017, InvalidateSubFramebuffer@28) - GL_STUB(InvalidateTexImage, 1018, InvalidateTexImage@8) - GL_STUB(InvalidateTexSubImage, 1019, InvalidateTexSubImage@32) - GL_STUB(_dispatch_stub_1020, 1020, _dispatch_stub_1020@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1020, _dispatch_stub_1020@8)) - GL_STUB(_dispatch_stub_1021, 1021, _dispatch_stub_1021@20) - HIDDEN(GL_PREFIX(_dispatch_stub_1021, _dispatch_stub_1021@20)) - GL_STUB(_dispatch_stub_1022, 1022, _dispatch_stub_1022@4) - HIDDEN(GL_PREFIX(_dispatch_stub_1022, _dispatch_stub_1022@4)) - GL_STUB(_dispatch_stub_1023, 1023, _dispatch_stub_1023@20) - HIDDEN(GL_PREFIX(_dispatch_stub_1023, _dispatch_stub_1023@20)) - GL_STUB(_dispatch_stub_1024, 1024, _dispatch_stub_1024@4) - HIDDEN(GL_PREFIX(_dispatch_stub_1024, _dispatch_stub_1024@4)) - GL_STUB(_dispatch_stub_1025, 1025, _dispatch_stub_1025@20) - HIDDEN(GL_PREFIX(_dispatch_stub_1025, _dispatch_stub_1025@20)) - GL_STUB(_dispatch_stub_1026, 1026, _dispatch_stub_1026@4) - HIDDEN(GL_PREFIX(_dispatch_stub_1026, _dispatch_stub_1026@4)) - GL_STUB(_dispatch_stub_1027, 1027, _dispatch_stub_1027@20) - HIDDEN(GL_PREFIX(_dispatch_stub_1027, _dispatch_stub_1027@20)) - GL_STUB(_dispatch_stub_1028, 1028, _dispatch_stub_1028@4) - HIDDEN(GL_PREFIX(_dispatch_stub_1028, _dispatch_stub_1028@4)) - GL_STUB(PointSizePointerOES, 1029, PointSizePointerOES@12) - GL_STUB(_dispatch_stub_1030, 1030, _dispatch_stub_1030@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1030, _dispatch_stub_1030@8)) + GL_STUB(_dispatch_stub_1008, 1008, _dispatch_stub_1008@20) + HIDDEN(GL_PREFIX(_dispatch_stub_1008, _dispatch_stub_1008@20)) + GL_STUB(_dispatch_stub_1009, 1009, _dispatch_stub_1009@12) + HIDDEN(GL_PREFIX(_dispatch_stub_1009, _dispatch_stub_1009@12)) + GL_STUB(_dispatch_stub_1010, 1010, _dispatch_stub_1010@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1010, _dispatch_stub_1010@8)) + GL_STUB(_dispatch_stub_1011, 1011, _dispatch_stub_1011@20) + HIDDEN(GL_PREFIX(_dispatch_stub_1011, _dispatch_stub_1011@20)) + GL_STUB(_dispatch_stub_1012, 1012, _dispatch_stub_1012@24) + HIDDEN(GL_PREFIX(_dispatch_stub_1012, _dispatch_stub_1012@24)) + GL_STUB(_dispatch_stub_1013, 1013, _dispatch_stub_1013@40) + HIDDEN(GL_PREFIX(_dispatch_stub_1013, _dispatch_stub_1013@40)) + GL_STUB(_dispatch_stub_1014, 1014, _dispatch_stub_1014@48) + HIDDEN(GL_PREFIX(_dispatch_stub_1014, _dispatch_stub_1014@48)) + GL_STUB(InvalidateBufferData, 1015, InvalidateBufferData@4) + GL_STUB(InvalidateBufferSubData, 1016, InvalidateBufferSubData@12) + GL_STUB(InvalidateFramebuffer, 1017, InvalidateFramebuffer@12) + GL_STUB(InvalidateSubFramebuffer, 1018, InvalidateSubFramebuffer@28) + GL_STUB(InvalidateTexImage, 1019, InvalidateTexImage@8) + GL_STUB(InvalidateTexSubImage, 1020, InvalidateTexSubImage@32) + GL_STUB(_dispatch_stub_1021, 1021, _dispatch_stub_1021@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1021, _dispatch_stub_1021@8)) + GL_STUB(_dispatch_stub_1022, 1022, _dispatch_stub_1022@20) + HIDDEN(GL_PREFIX(_dispatch_stub_1022, _dispatch_stub_1022@20)) + GL_STUB(_dispatch_stub_1023, 1023, _dispatch_stub_1023@4) + HIDDEN(GL_PREFIX(_dispatch_stub_1023, _dispatch_stub_1023@4)) + GL_STUB(_dispatch_stub_1024, 1024, _dispatch_stub_1024@20) + HIDDEN(GL_PREFIX(_dispatch_stub_1024, _dispatch_stub_1024@20)) + GL_STUB(_dispatch_stub_1025, 1025, _dispatch_stub_1025@4) + HIDDEN(GL_PREFIX(_dispatch_stub_1025, _dispatch_stub_1025@4)) + GL_STUB(_dispatch_stub_1026, 1026, _dispatch_stub_1026@20) + HIDDEN(GL_PREFIX(_dispatch_stub_1026, _dispatch_stub_1026@20)) + GL_STUB(_dispatch_stub_1027, 1027, _dispatch_stub_1027@4) + HIDDEN(GL_PREFIX(_dispatch_stub_1027, _dispatch_stub_1027@4)) + GL_STUB(_dispatch_stub_1028, 1028, _dispatch_stub_1028@20) + HIDDEN(GL_PREFIX(_dispatch_stub_1028, _dispatch_stub_1028@20)) + GL_STUB(_dispatch_stub_1029, 1029, _dispatch_stub_1029@4) + HIDDEN(GL_PREFIX(_dispatch_stub_1029, _dispatch_stub_1029@4)) + GL_STUB(PointSizePointerOES, 1030, PointSizePointerOES@12) GL_STUB(_dispatch_stub_1031, 1031, _dispatch_stub_1031@8) HIDDEN(GL_PREFIX(_dispatch_stub_1031, _dispatch_stub_1031@8)) - GL_STUB(_dispatch_stub_1032, 1032, _dispatch_stub_1032@4) - HIDDEN(GL_PREFIX(_dispatch_stub_1032, _dispatch_stub_1032@4)) - GL_STUB(ColorPointerEXT, 1033, ColorPointerEXT@20) - GL_STUB(EdgeFlagPointerEXT, 1034, EdgeFlagPointerEXT@12) - GL_STUB(IndexPointerEXT, 1035, IndexPointerEXT@16) - GL_STUB(NormalPointerEXT, 1036, NormalPointerEXT@16) - GL_STUB(TexCoordPointerEXT, 1037, TexCoordPointerEXT@20) - GL_STUB(VertexPointerEXT, 1038, VertexPointerEXT@20) - GL_STUB(_dispatch_stub_1039, 1039, _dispatch_stub_1039@12) - HIDDEN(GL_PREFIX(_dispatch_stub_1039, _dispatch_stub_1039@12)) - GL_STUB(ActiveShaderProgram, 1040, ActiveShaderProgram@8) - GL_STUB(BindProgramPipeline, 1041, BindProgramPipeline@4) - GL_STUB(CreateShaderProgramv, 1042, CreateShaderProgramv@12) - GL_STUB(DeleteProgramPipelines, 1043, DeleteProgramPipelines@8) - GL_STUB(GenProgramPipelines, 1044, GenProgramPipelines@8) - GL_STUB(GetProgramPipelineInfoLog, 1045, GetProgramPipelineInfoLog@16) - GL_STUB(GetProgramPipelineiv, 1046, GetProgramPipelineiv@12) - GL_STUB(IsProgramPipeline, 1047, IsProgramPipeline@4) - GL_STUB(LockArraysEXT, 1048, LockArraysEXT@8) - GL_STUB(_dispatch_stub_1049, 1049, _dispatch_stub_1049@16) - HIDDEN(GL_PREFIX(_dispatch_stub_1049, _dispatch_stub_1049@16)) + GL_STUB(_dispatch_stub_1032, 1032, _dispatch_stub_1032@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1032, _dispatch_stub_1032@8)) + GL_STUB(_dispatch_stub_1033, 1033, _dispatch_stub_1033@4) + HIDDEN(GL_PREFIX(_dispatch_stub_1033, _dispatch_stub_1033@4)) + GL_STUB(ColorPointerEXT, 1034, ColorPointerEXT@20) + GL_STUB(EdgeFlagPointerEXT, 1035, EdgeFlagPointerEXT@12) + GL_STUB(IndexPointerEXT, 1036, IndexPointerEXT@16) + GL_STUB(NormalPointerEXT, 1037, NormalPointerEXT@16) + GL_STUB(TexCoordPointerEXT, 1038, TexCoordPointerEXT@20) + GL_STUB(VertexPointerEXT, 1039, VertexPointerEXT@20) + GL_STUB(_dispatch_stub_1040, 1040, _dispatch_stub_1040@12) + HIDDEN(GL_PREFIX(_dispatch_stub_1040, _dispatch_stub_1040@12)) + GL_STUB(ActiveShaderProgram, 1041, ActiveShaderProgram@8) + GL_STUB(BindProgramPipeline, 1042, BindProgramPipeline@4) + GL_STUB(CreateShaderProgramv, 1043, CreateShaderProgramv@12) + GL_STUB(DeleteProgramPipelines, 1044, DeleteProgramPipelines@8) + GL_STUB(GenProgramPipelines, 1045, GenProgramPipelines@8) + GL_STUB(GetProgramPipelineInfoLog, 1046, GetProgramPipelineInfoLog@16) + GL_STUB(GetProgramPipelineiv, 1047, GetProgramPipelineiv@12) + GL_STUB(IsProgramPipeline, 1048, IsProgramPipeline@4) + GL_STUB(LockArraysEXT, 1049, LockArraysEXT@8) GL_STUB(_dispatch_stub_1050, 1050, _dispatch_stub_1050@16) HIDDEN(GL_PREFIX(_dispatch_stub_1050, _dispatch_stub_1050@16)) - GL_STUB(ProgramUniform1f, 1051, ProgramUniform1f@12) - GL_STUB(ProgramUniform1fv, 1052, ProgramUniform1fv@16) - GL_STUB(ProgramUniform1i, 1053, ProgramUniform1i@12) - GL_STUB(ProgramUniform1iv, 1054, ProgramUniform1iv@16) - GL_STUB(ProgramUniform1ui, 1055, ProgramUniform1ui@12) - GL_STUB(ProgramUniform1uiv, 1056, ProgramUniform1uiv@16) - GL_STUB(_dispatch_stub_1057, 1057, _dispatch_stub_1057@24) - HIDDEN(GL_PREFIX(_dispatch_stub_1057, _dispatch_stub_1057@24)) - GL_STUB(_dispatch_stub_1058, 1058, _dispatch_stub_1058@16) - HIDDEN(GL_PREFIX(_dispatch_stub_1058, _dispatch_stub_1058@16)) - GL_STUB(ProgramUniform2f, 1059, ProgramUniform2f@16) - GL_STUB(ProgramUniform2fv, 1060, ProgramUniform2fv@16) - GL_STUB(ProgramUniform2i, 1061, ProgramUniform2i@16) - GL_STUB(ProgramUniform2iv, 1062, ProgramUniform2iv@16) - GL_STUB(ProgramUniform2ui, 1063, ProgramUniform2ui@16) - GL_STUB(ProgramUniform2uiv, 1064, ProgramUniform2uiv@16) - GL_STUB(_dispatch_stub_1065, 1065, _dispatch_stub_1065@32) - HIDDEN(GL_PREFIX(_dispatch_stub_1065, _dispatch_stub_1065@32)) - GL_STUB(_dispatch_stub_1066, 1066, _dispatch_stub_1066@16) - HIDDEN(GL_PREFIX(_dispatch_stub_1066, _dispatch_stub_1066@16)) - GL_STUB(ProgramUniform3f, 1067, ProgramUniform3f@20) - GL_STUB(ProgramUniform3fv, 1068, ProgramUniform3fv@16) - GL_STUB(ProgramUniform3i, 1069, ProgramUniform3i@20) - GL_STUB(ProgramUniform3iv, 1070, ProgramUniform3iv@16) - GL_STUB(ProgramUniform3ui, 1071, ProgramUniform3ui@20) - GL_STUB(ProgramUniform3uiv, 1072, ProgramUniform3uiv@16) - GL_STUB(_dispatch_stub_1073, 1073, _dispatch_stub_1073@40) - HIDDEN(GL_PREFIX(_dispatch_stub_1073, _dispatch_stub_1073@40)) - GL_STUB(_dispatch_stub_1074, 1074, _dispatch_stub_1074@16) - HIDDEN(GL_PREFIX(_dispatch_stub_1074, _dispatch_stub_1074@16)) - GL_STUB(ProgramUniform4f, 1075, ProgramUniform4f@24) - GL_STUB(ProgramUniform4fv, 1076, ProgramUniform4fv@16) - GL_STUB(ProgramUniform4i, 1077, ProgramUniform4i@24) - GL_STUB(ProgramUniform4iv, 1078, ProgramUniform4iv@16) - GL_STUB(ProgramUniform4ui, 1079, ProgramUniform4ui@24) - GL_STUB(ProgramUniform4uiv, 1080, ProgramUniform4uiv@16) - GL_STUB(_dispatch_stub_1081, 1081, _dispatch_stub_1081@20) - HIDDEN(GL_PREFIX(_dispatch_stub_1081, _dispatch_stub_1081@20)) - GL_STUB(ProgramUniformMatrix2fv, 1082, ProgramUniformMatrix2fv@20) - GL_STUB(_dispatch_stub_1083, 1083, _dispatch_stub_1083@20) - HIDDEN(GL_PREFIX(_dispatch_stub_1083, _dispatch_stub_1083@20)) - GL_STUB(ProgramUniformMatrix2x3fv, 1084, ProgramUniformMatrix2x3fv@20) - GL_STUB(_dispatch_stub_1085, 1085, _dispatch_stub_1085@20) - HIDDEN(GL_PREFIX(_dispatch_stub_1085, _dispatch_stub_1085@20)) - GL_STUB(ProgramUniformMatrix2x4fv, 1086, ProgramUniformMatrix2x4fv@20) - GL_STUB(_dispatch_stub_1087, 1087, _dispatch_stub_1087@20) - HIDDEN(GL_PREFIX(_dispatch_stub_1087, _dispatch_stub_1087@20)) - GL_STUB(ProgramUniformMatrix3fv, 1088, ProgramUniformMatrix3fv@20) - GL_STUB(_dispatch_stub_1089, 1089, _dispatch_stub_1089@20) - HIDDEN(GL_PREFIX(_dispatch_stub_1089, _dispatch_stub_1089@20)) - GL_STUB(ProgramUniformMatrix3x2fv, 1090, ProgramUniformMatrix3x2fv@20) - GL_STUB(_dispatch_stub_1091, 1091, _dispatch_stub_1091@20) - HIDDEN(GL_PREFIX(_dispatch_stub_1091, _dispatch_stub_1091@20)) - GL_STUB(ProgramUniformMatrix3x4fv, 1092, ProgramUniformMatrix3x4fv@20) - GL_STUB(_dispatch_stub_1093, 1093, _dispatch_stub_1093@20) - HIDDEN(GL_PREFIX(_dispatch_stub_1093, _dispatch_stub_1093@20)) - GL_STUB(ProgramUniformMatrix4fv, 1094, ProgramUniformMatrix4fv@20) - GL_STUB(_dispatch_stub_1095, 1095, _dispatch_stub_1095@20) - HIDDEN(GL_PREFIX(_dispatch_stub_1095, _dispatch_stub_1095@20)) - GL_STUB(ProgramUniformMatrix4x2fv, 1096, ProgramUniformMatrix4x2fv@20) - GL_STUB(_dispatch_stub_1097, 1097, _dispatch_stub_1097@20) - HIDDEN(GL_PREFIX(_dispatch_stub_1097, _dispatch_stub_1097@20)) - GL_STUB(ProgramUniformMatrix4x3fv, 1098, ProgramUniformMatrix4x3fv@20) - GL_STUB(UnlockArraysEXT, 1099, UnlockArraysEXT@0) - GL_STUB(UseProgramStages, 1100, UseProgramStages@12) - GL_STUB(ValidateProgramPipeline, 1101, ValidateProgramPipeline@4) - GL_STUB(DebugMessageCallback, 1102, DebugMessageCallback@8) - GL_STUB(DebugMessageControl, 1103, DebugMessageControl@24) - GL_STUB(DebugMessageInsert, 1104, DebugMessageInsert@24) - GL_STUB(GetDebugMessageLog, 1105, GetDebugMessageLog@32) - GL_STUB(GetObjectLabel, 1106, GetObjectLabel@20) - GL_STUB(GetObjectPtrLabel, 1107, GetObjectPtrLabel@16) - GL_STUB(ObjectLabel, 1108, ObjectLabel@16) - GL_STUB(ObjectPtrLabel, 1109, ObjectPtrLabel@12) - GL_STUB(PopDebugGroup, 1110, PopDebugGroup@0) - GL_STUB(PushDebugGroup, 1111, PushDebugGroup@16) - GL_STUB(SecondaryColor3fEXT, 1112, SecondaryColor3fEXT@12) - GL_STUB(SecondaryColor3fvEXT, 1113, SecondaryColor3fvEXT@4) - GL_STUB(MultiDrawElementsEXT, 1114, MultiDrawElementsEXT@20) - GL_STUB(FogCoordfEXT, 1115, FogCoordfEXT@4) - GL_STUB(FogCoordfvEXT, 1116, FogCoordfvEXT@4) - GL_STUB(_dispatch_stub_1117, 1117, _dispatch_stub_1117@0) - HIDDEN(GL_PREFIX(_dispatch_stub_1117, _dispatch_stub_1117@0)) - GL_STUB(_dispatch_stub_1118, 1118, _dispatch_stub_1118@32) - HIDDEN(GL_PREFIX(_dispatch_stub_1118, _dispatch_stub_1118@32)) - GL_STUB(_dispatch_stub_1119, 1119, _dispatch_stub_1119@4) - HIDDEN(GL_PREFIX(_dispatch_stub_1119, _dispatch_stub_1119@4)) - GL_STUB(_dispatch_stub_1120, 1120, _dispatch_stub_1120@16) - HIDDEN(GL_PREFIX(_dispatch_stub_1120, _dispatch_stub_1120@16)) - GL_STUB(_dispatch_stub_1121, 1121, _dispatch_stub_1121@4) - HIDDEN(GL_PREFIX(_dispatch_stub_1121, _dispatch_stub_1121@4)) - GL_STUB(_dispatch_stub_1122, 1122, _dispatch_stub_1122@16) - HIDDEN(GL_PREFIX(_dispatch_stub_1122, _dispatch_stub_1122@16)) - GL_STUB(_dispatch_stub_1123, 1123, _dispatch_stub_1123@4) - HIDDEN(GL_PREFIX(_dispatch_stub_1123, _dispatch_stub_1123@4)) - GL_STUB(_dispatch_stub_1124, 1124, _dispatch_stub_1124@16) - HIDDEN(GL_PREFIX(_dispatch_stub_1124, _dispatch_stub_1124@16)) - GL_STUB(_dispatch_stub_1125, 1125, _dispatch_stub_1125@4) - HIDDEN(GL_PREFIX(_dispatch_stub_1125, _dispatch_stub_1125@4)) - GL_STUB(_dispatch_stub_1126, 1126, _dispatch_stub_1126@20) - HIDDEN(GL_PREFIX(_dispatch_stub_1126, _dispatch_stub_1126@20)) - GL_STUB(_dispatch_stub_1127, 1127, _dispatch_stub_1127@24) - HIDDEN(GL_PREFIX(_dispatch_stub_1127, _dispatch_stub_1127@24)) - GL_STUB(_dispatch_stub_1128, 1128, _dispatch_stub_1128@12) - HIDDEN(GL_PREFIX(_dispatch_stub_1128, _dispatch_stub_1128@12)) + GL_STUB(_dispatch_stub_1051, 1051, _dispatch_stub_1051@16) + HIDDEN(GL_PREFIX(_dispatch_stub_1051, _dispatch_stub_1051@16)) + GL_STUB(ProgramUniform1f, 1052, ProgramUniform1f@12) + GL_STUB(ProgramUniform1fv, 1053, ProgramUniform1fv@16) + GL_STUB(ProgramUniform1i, 1054, ProgramUniform1i@12) + GL_STUB(ProgramUniform1iv, 1055, ProgramUniform1iv@16) + GL_STUB(ProgramUniform1ui, 1056, ProgramUniform1ui@12) + GL_STUB(ProgramUniform1uiv, 1057, ProgramUniform1uiv@16) + GL_STUB(_dispatch_stub_1058, 1058, _dispatch_stub_1058@24) + HIDDEN(GL_PREFIX(_dispatch_stub_1058, _dispatch_stub_1058@24)) + GL_STUB(_dispatch_stub_1059, 1059, _dispatch_stub_1059@16) + HIDDEN(GL_PREFIX(_dispatch_stub_1059, _dispatch_stub_1059@16)) + GL_STUB(ProgramUniform2f, 1060, ProgramUniform2f@16) + GL_STUB(ProgramUniform2fv, 1061, ProgramUniform2fv@16) + GL_STUB(ProgramUniform2i, 1062, ProgramUniform2i@16) + GL_STUB(ProgramUniform2iv, 1063, ProgramUniform2iv@16) + GL_STUB(ProgramUniform2ui, 1064, ProgramUniform2ui@16) + GL_STUB(ProgramUniform2uiv, 1065, ProgramUniform2uiv@16) + GL_STUB(_dispatch_stub_1066, 1066, _dispatch_stub_1066@32) + HIDDEN(GL_PREFIX(_dispatch_stub_1066, _dispatch_stub_1066@32)) + GL_STUB(_dispatch_stub_1067, 1067, _dispatch_stub_1067@16) + HIDDEN(GL_PREFIX(_dispatch_stub_1067, _dispatch_stub_1067@16)) + GL_STUB(ProgramUniform3f, 1068, ProgramUniform3f@20) + GL_STUB(ProgramUniform3fv, 1069, ProgramUniform3fv@16) + GL_STUB(ProgramUniform3i, 1070, ProgramUniform3i@20) + GL_STUB(ProgramUniform3iv, 1071, ProgramUniform3iv@16) + GL_STUB(ProgramUniform3ui, 1072, ProgramUniform3ui@20) + GL_STUB(ProgramUniform3uiv, 1073, ProgramUniform3uiv@16) + GL_STUB(_dispatch_stub_1074, 1074, _dispatch_stub_1074@40) + HIDDEN(GL_PREFIX(_dispatch_stub_1074, _dispatch_stub_1074@40)) + GL_STUB(_dispatch_stub_1075, 1075, _dispatch_stub_1075@16) + HIDDEN(GL_PREFIX(_dispatch_stub_1075, _dispatch_stub_1075@16)) + GL_STUB(ProgramUniform4f, 1076, ProgramUniform4f@24) + GL_STUB(ProgramUniform4fv, 1077, ProgramUniform4fv@16) + GL_STUB(ProgramUniform4i, 1078, ProgramUniform4i@24) + GL_STUB(ProgramUniform4iv, 1079, ProgramUniform4iv@16) + GL_STUB(ProgramUniform4ui, 1080, ProgramUniform4ui@24) + GL_STUB(ProgramUniform4uiv, 1081, ProgramUniform4uiv@16) + GL_STUB(_dispatch_stub_1082, 1082, _dispatch_stub_1082@20) + HIDDEN(GL_PREFIX(_dispatch_stub_1082, _dispatch_stub_1082@20)) + GL_STUB(ProgramUniformMatrix2fv, 1083, ProgramUniformMatrix2fv@20) + GL_STUB(_dispatch_stub_1084, 1084, _dispatch_stub_1084@20) + HIDDEN(GL_PREFIX(_dispatch_stub_1084, _dispatch_stub_1084@20)) + GL_STUB(ProgramUniformMatrix2x3fv, 1085, ProgramUniformMatrix2x3fv@20) + GL_STUB(_dispatch_stub_1086, 1086, _dispatch_stub_1086@20) + HIDDEN(GL_PREFIX(_dispatch_stub_1086, _dispatch_stub_1086@20)) + GL_STUB(ProgramUniformMatrix2x4fv, 1087, ProgramUniformMatrix2x4fv@20) + GL_STUB(_dispatch_stub_1088, 1088, _dispatch_stub_1088@20) + HIDDEN(GL_PREFIX(_dispatch_stub_1088, _dispatch_stub_1088@20)) + GL_STUB(ProgramUniformMatrix3fv, 1089, ProgramUniformMatrix3fv@20) + GL_STUB(_dispatch_stub_1090, 1090, _dispatch_stub_1090@20) + HIDDEN(GL_PREFIX(_dispatch_stub_1090, _dispatch_stub_1090@20)) + GL_STUB(ProgramUniformMatrix3x2fv, 1091, ProgramUniformMatrix3x2fv@20) + GL_STUB(_dispatch_stub_1092, 1092, _dispatch_stub_1092@20) + HIDDEN(GL_PREFIX(_dispatch_stub_1092, _dispatch_stub_1092@20)) + GL_STUB(ProgramUniformMatrix3x4fv, 1093, ProgramUniformMatrix3x4fv@20) + GL_STUB(_dispatch_stub_1094, 1094, _dispatch_stub_1094@20) + HIDDEN(GL_PREFIX(_dispatch_stub_1094, _dispatch_stub_1094@20)) + GL_STUB(ProgramUniformMatrix4fv, 1095, ProgramUniformMatrix4fv@20) + GL_STUB(_dispatch_stub_1096, 1096, _dispatch_stub_1096@20) + HIDDEN(GL_PREFIX(_dispatch_stub_1096, _dispatch_stub_1096@20)) + GL_STUB(ProgramUniformMatrix4x2fv, 1097, ProgramUniformMatrix4x2fv@20) + GL_STUB(_dispatch_stub_1098, 1098, _dispatch_stub_1098@20) + HIDDEN(GL_PREFIX(_dispatch_stub_1098, _dispatch_stub_1098@20)) + GL_STUB(ProgramUniformMatrix4x3fv, 1099, ProgramUniformMatrix4x3fv@20) + GL_STUB(UnlockArraysEXT, 1100, UnlockArraysEXT@0) + GL_STUB(UseProgramStages, 1101, UseProgramStages@12) + GL_STUB(ValidateProgramPipeline, 1102, ValidateProgramPipeline@4) + GL_STUB(DebugMessageCallback, 1103, DebugMessageCallback@8) + GL_STUB(DebugMessageControl, 1104, DebugMessageControl@24) + GL_STUB(DebugMessageInsert, 1105, DebugMessageInsert@24) + GL_STUB(GetDebugMessageLog, 1106, GetDebugMessageLog@32) + GL_STUB(GetObjectLabel, 1107, GetObjectLabel@20) + GL_STUB(GetObjectPtrLabel, 1108, GetObjectPtrLabel@16) + GL_STUB(ObjectLabel, 1109, ObjectLabel@16) + GL_STUB(ObjectPtrLabel, 1110, ObjectPtrLabel@12) + GL_STUB(PopDebugGroup, 1111, PopDebugGroup@0) + GL_STUB(PushDebugGroup, 1112, PushDebugGroup@16) + GL_STUB(SecondaryColor3fEXT, 1113, SecondaryColor3fEXT@12) + GL_STUB(SecondaryColor3fvEXT, 1114, SecondaryColor3fvEXT@4) + GL_STUB(MultiDrawElementsEXT, 1115, MultiDrawElementsEXT@20) + GL_STUB(FogCoordfEXT, 1116, FogCoordfEXT@4) + GL_STUB(FogCoordfvEXT, 1117, FogCoordfvEXT@4) + GL_STUB(_dispatch_stub_1118, 1118, _dispatch_stub_1118@0) + HIDDEN(GL_PREFIX(_dispatch_stub_1118, _dispatch_stub_1118@0)) + GL_STUB(_dispatch_stub_1119, 1119, _dispatch_stub_1119@32) + HIDDEN(GL_PREFIX(_dispatch_stub_1119, _dispatch_stub_1119@32)) + GL_STUB(_dispatch_stub_1120, 1120, _dispatch_stub_1120@4) + HIDDEN(GL_PREFIX(_dispatch_stub_1120, _dispatch_stub_1120@4)) + GL_STUB(_dispatch_stub_1121, 1121, _dispatch_stub_1121@16) + HIDDEN(GL_PREFIX(_dispatch_stub_1121, _dispatch_stub_1121@16)) + GL_STUB(_dispatch_stub_1122, 1122, _dispatch_stub_1122@4) + HIDDEN(GL_PREFIX(_dispatch_stub_1122, _dispatch_stub_1122@4)) + GL_STUB(_dispatch_stub_1123, 1123, _dispatch_stub_1123@16) + HIDDEN(GL_PREFIX(_dispatch_stub_1123, _dispatch_stub_1123@16)) + GL_STUB(_dispatch_stub_1124, 1124, _dispatch_stub_1124@4) + HIDDEN(GL_PREFIX(_dispatch_stub_1124, _dispatch_stub_1124@4)) + GL_STUB(_dispatch_stub_1125, 1125, _dispatch_stub_1125@16) + HIDDEN(GL_PREFIX(_dispatch_stub_1125, _dispatch_stub_1125@16)) + GL_STUB(_dispatch_stub_1126, 1126, _dispatch_stub_1126@4) + HIDDEN(GL_PREFIX(_dispatch_stub_1126, _dispatch_stub_1126@4)) + GL_STUB(_dispatch_stub_1127, 1127, _dispatch_stub_1127@20) + HIDDEN(GL_PREFIX(_dispatch_stub_1127, _dispatch_stub_1127@20)) + GL_STUB(_dispatch_stub_1128, 1128, _dispatch_stub_1128@24) + HIDDEN(GL_PREFIX(_dispatch_stub_1128, _dispatch_stub_1128@24)) GL_STUB(_dispatch_stub_1129, 1129, _dispatch_stub_1129@12) HIDDEN(GL_PREFIX(_dispatch_stub_1129, _dispatch_stub_1129@12)) - GL_STUB(_dispatch_stub_1130, 1130, _dispatch_stub_1130@16) - HIDDEN(GL_PREFIX(_dispatch_stub_1130, _dispatch_stub_1130@16)) + GL_STUB(_dispatch_stub_1130, 1130, _dispatch_stub_1130@12) + HIDDEN(GL_PREFIX(_dispatch_stub_1130, _dispatch_stub_1130@12)) GL_STUB(_dispatch_stub_1131, 1131, _dispatch_stub_1131@16) HIDDEN(GL_PREFIX(_dispatch_stub_1131, _dispatch_stub_1131@16)) - GL_STUB(_dispatch_stub_1132, 1132, _dispatch_stub_1132@12) - HIDDEN(GL_PREFIX(_dispatch_stub_1132, _dispatch_stub_1132@12)) + GL_STUB(_dispatch_stub_1132, 1132, _dispatch_stub_1132@16) + HIDDEN(GL_PREFIX(_dispatch_stub_1132, _dispatch_stub_1132@16)) GL_STUB(_dispatch_stub_1133, 1133, _dispatch_stub_1133@12) HIDDEN(GL_PREFIX(_dispatch_stub_1133, _dispatch_stub_1133@12)) - GL_STUB(_dispatch_stub_1134, 1134, _dispatch_stub_1134@16) - HIDDEN(GL_PREFIX(_dispatch_stub_1134, _dispatch_stub_1134@16)) - GL_STUB(_dispatch_stub_1135, 1135, _dispatch_stub_1135@12) - HIDDEN(GL_PREFIX(_dispatch_stub_1135, _dispatch_stub_1135@12)) + GL_STUB(_dispatch_stub_1134, 1134, _dispatch_stub_1134@12) + HIDDEN(GL_PREFIX(_dispatch_stub_1134, _dispatch_stub_1134@12)) + GL_STUB(_dispatch_stub_1135, 1135, _dispatch_stub_1135@16) + HIDDEN(GL_PREFIX(_dispatch_stub_1135, _dispatch_stub_1135@16)) GL_STUB(_dispatch_stub_1136, 1136, _dispatch_stub_1136@12) HIDDEN(GL_PREFIX(_dispatch_stub_1136, _dispatch_stub_1136@12)) GL_STUB(_dispatch_stub_1137, 1137, _dispatch_stub_1137@12) HIDDEN(GL_PREFIX(_dispatch_stub_1137, _dispatch_stub_1137@12)) - GL_STUB(_dispatch_stub_1138, 1138, _dispatch_stub_1138@16) - HIDDEN(GL_PREFIX(_dispatch_stub_1138, _dispatch_stub_1138@16)) + GL_STUB(_dispatch_stub_1138, 1138, _dispatch_stub_1138@12) + HIDDEN(GL_PREFIX(_dispatch_stub_1138, _dispatch_stub_1138@12)) GL_STUB(_dispatch_stub_1139, 1139, _dispatch_stub_1139@16) HIDDEN(GL_PREFIX(_dispatch_stub_1139, _dispatch_stub_1139@16)) GL_STUB(_dispatch_stub_1140, 1140, _dispatch_stub_1140@16) HIDDEN(GL_PREFIX(_dispatch_stub_1140, _dispatch_stub_1140@16)) - GL_STUB(_dispatch_stub_1141, 1141, _dispatch_stub_1141@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1141, _dispatch_stub_1141@8)) - GL_STUB(_dispatch_stub_1142, 1142, _dispatch_stub_1142@16) - HIDDEN(GL_PREFIX(_dispatch_stub_1142, _dispatch_stub_1142@16)) - GL_STUB(_dispatch_stub_1143, 1143, _dispatch_stub_1143@12) - HIDDEN(GL_PREFIX(_dispatch_stub_1143, _dispatch_stub_1143@12)) - GL_STUB(_dispatch_stub_1144, 1144, _dispatch_stub_1144@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1144, _dispatch_stub_1144@8)) + GL_STUB(_dispatch_stub_1141, 1141, _dispatch_stub_1141@16) + HIDDEN(GL_PREFIX(_dispatch_stub_1141, _dispatch_stub_1141@16)) + GL_STUB(_dispatch_stub_1142, 1142, _dispatch_stub_1142@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1142, _dispatch_stub_1142@8)) + GL_STUB(_dispatch_stub_1143, 1143, _dispatch_stub_1143@16) + HIDDEN(GL_PREFIX(_dispatch_stub_1143, _dispatch_stub_1143@16)) + GL_STUB(_dispatch_stub_1144, 1144, _dispatch_stub_1144@12) + HIDDEN(GL_PREFIX(_dispatch_stub_1144, _dispatch_stub_1144@12)) GL_STUB(_dispatch_stub_1145, 1145, _dispatch_stub_1145@8) HIDDEN(GL_PREFIX(_dispatch_stub_1145, _dispatch_stub_1145@8)) GL_STUB(_dispatch_stub_1146, 1146, _dispatch_stub_1146@8) @@ -1498,50 +1497,50 @@ HIDDEN(GL_PREFIX(_dispatch_stub_1147, _dispatch_stub_1147@8)) GL_STUB(_dispatch_stub_1148, 1148, _dispatch_stub_1148@8) HIDDEN(GL_PREFIX(_dispatch_stub_1148, _dispatch_stub_1148@8)) - GL_STUB(_dispatch_stub_1149, 1149, _dispatch_stub_1149@20) - HIDDEN(GL_PREFIX(_dispatch_stub_1149, _dispatch_stub_1149@20)) - GL_STUB(_dispatch_stub_1150, 1150, _dispatch_stub_1150@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1150, _dispatch_stub_1150@8)) - GL_STUB(_dispatch_stub_1151, 1151, _dispatch_stub_1151@12) - HIDDEN(GL_PREFIX(_dispatch_stub_1151, _dispatch_stub_1151@12)) - GL_STUB(_dispatch_stub_1152, 1152, _dispatch_stub_1152@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1152, _dispatch_stub_1152@8)) - GL_STUB(_dispatch_stub_1153, 1153, _dispatch_stub_1153@12) - HIDDEN(GL_PREFIX(_dispatch_stub_1153, _dispatch_stub_1153@12)) - GL_STUB(_dispatch_stub_1154, 1154, _dispatch_stub_1154@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1154, _dispatch_stub_1154@8)) - GL_STUB(_dispatch_stub_1155, 1155, _dispatch_stub_1155@28) - HIDDEN(GL_PREFIX(_dispatch_stub_1155, _dispatch_stub_1155@28)) - GL_STUB(_dispatch_stub_1156, 1156, _dispatch_stub_1156@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1156, _dispatch_stub_1156@8)) - GL_STUB(_dispatch_stub_1157, 1157, _dispatch_stub_1157@16) - HIDDEN(GL_PREFIX(_dispatch_stub_1157, _dispatch_stub_1157@16)) - GL_STUB(_dispatch_stub_1158, 1158, _dispatch_stub_1158@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1158, _dispatch_stub_1158@8)) - GL_STUB(_dispatch_stub_1159, 1159, _dispatch_stub_1159@16) - HIDDEN(GL_PREFIX(_dispatch_stub_1159, _dispatch_stub_1159@16)) - GL_STUB(_dispatch_stub_1160, 1160, _dispatch_stub_1160@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1160, _dispatch_stub_1160@8)) - GL_STUB(_dispatch_stub_1161, 1161, _dispatch_stub_1161@36) - HIDDEN(GL_PREFIX(_dispatch_stub_1161, _dispatch_stub_1161@36)) - GL_STUB(_dispatch_stub_1162, 1162, _dispatch_stub_1162@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1162, _dispatch_stub_1162@8)) - GL_STUB(_dispatch_stub_1163, 1163, _dispatch_stub_1163@20) - HIDDEN(GL_PREFIX(_dispatch_stub_1163, _dispatch_stub_1163@20)) - GL_STUB(_dispatch_stub_1164, 1164, _dispatch_stub_1164@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1164, _dispatch_stub_1164@8)) - GL_STUB(_dispatch_stub_1165, 1165, _dispatch_stub_1165@20) - HIDDEN(GL_PREFIX(_dispatch_stub_1165, _dispatch_stub_1165@20)) - GL_STUB(_dispatch_stub_1166, 1166, _dispatch_stub_1166@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1166, _dispatch_stub_1166@8)) - GL_STUB(_dispatch_stub_1167, 1167, _dispatch_stub_1167@20) - HIDDEN(GL_PREFIX(_dispatch_stub_1167, _dispatch_stub_1167@20)) - GL_STUB(_dispatch_stub_1168, 1168, _dispatch_stub_1168@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1168, _dispatch_stub_1168@8)) - GL_STUB(_dispatch_stub_1169, 1169, _dispatch_stub_1169@20) - HIDDEN(GL_PREFIX(_dispatch_stub_1169, _dispatch_stub_1169@20)) - GL_STUB(_dispatch_stub_1170, 1170, _dispatch_stub_1170@12) - HIDDEN(GL_PREFIX(_dispatch_stub_1170, _dispatch_stub_1170@12)) + GL_STUB(_dispatch_stub_1149, 1149, _dispatch_stub_1149@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1149, _dispatch_stub_1149@8)) + GL_STUB(_dispatch_stub_1150, 1150, _dispatch_stub_1150@20) + HIDDEN(GL_PREFIX(_dispatch_stub_1150, _dispatch_stub_1150@20)) + GL_STUB(_dispatch_stub_1151, 1151, _dispatch_stub_1151@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1151, _dispatch_stub_1151@8)) + GL_STUB(_dispatch_stub_1152, 1152, _dispatch_stub_1152@12) + HIDDEN(GL_PREFIX(_dispatch_stub_1152, _dispatch_stub_1152@12)) + GL_STUB(_dispatch_stub_1153, 1153, _dispatch_stub_1153@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1153, _dispatch_stub_1153@8)) + GL_STUB(_dispatch_stub_1154, 1154, _dispatch_stub_1154@12) + HIDDEN(GL_PREFIX(_dispatch_stub_1154, _dispatch_stub_1154@12)) + GL_STUB(_dispatch_stub_1155, 1155, _dispatch_stub_1155@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1155, _dispatch_stub_1155@8)) + GL_STUB(_dispatch_stub_1156, 1156, _dispatch_stub_1156@28) + HIDDEN(GL_PREFIX(_dispatch_stub_1156, _dispatch_stub_1156@28)) + GL_STUB(_dispatch_stub_1157, 1157, _dispatch_stub_1157@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1157, _dispatch_stub_1157@8)) + GL_STUB(_dispatch_stub_1158, 1158, _dispatch_stub_1158@16) + HIDDEN(GL_PREFIX(_dispatch_stub_1158, _dispatch_stub_1158@16)) + GL_STUB(_dispatch_stub_1159, 1159, _dispatch_stub_1159@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1159, _dispatch_stub_1159@8)) + GL_STUB(_dispatch_stub_1160, 1160, _dispatch_stub_1160@16) + HIDDEN(GL_PREFIX(_dispatch_stub_1160, _dispatch_stub_1160@16)) + GL_STUB(_dispatch_stub_1161, 1161, _dispatch_stub_1161@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1161, _dispatch_stub_1161@8)) + GL_STUB(_dispatch_stub_1162, 1162, _dispatch_stub_1162@36) + HIDDEN(GL_PREFIX(_dispatch_stub_1162, _dispatch_stub_1162@36)) + GL_STUB(_dispatch_stub_1163, 1163, _dispatch_stub_1163@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1163, _dispatch_stub_1163@8)) + GL_STUB(_dispatch_stub_1164, 1164, _dispatch_stub_1164@20) + HIDDEN(GL_PREFIX(_dispatch_stub_1164, _dispatch_stub_1164@20)) + GL_STUB(_dispatch_stub_1165, 1165, _dispatch_stub_1165@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1165, _dispatch_stub_1165@8)) + GL_STUB(_dispatch_stub_1166, 1166, _dispatch_stub_1166@20) + HIDDEN(GL_PREFIX(_dispatch_stub_1166, _dispatch_stub_1166@20)) + GL_STUB(_dispatch_stub_1167, 1167, _dispatch_stub_1167@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1167, _dispatch_stub_1167@8)) + GL_STUB(_dispatch_stub_1168, 1168, _dispatch_stub_1168@20) + HIDDEN(GL_PREFIX(_dispatch_stub_1168, _dispatch_stub_1168@20)) + GL_STUB(_dispatch_stub_1169, 1169, _dispatch_stub_1169@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1169, _dispatch_stub_1169@8)) + GL_STUB(_dispatch_stub_1170, 1170, _dispatch_stub_1170@20) + HIDDEN(GL_PREFIX(_dispatch_stub_1170, _dispatch_stub_1170@20)) GL_STUB(_dispatch_stub_1171, 1171, _dispatch_stub_1171@12) HIDDEN(GL_PREFIX(_dispatch_stub_1171, _dispatch_stub_1171@12)) GL_STUB(_dispatch_stub_1172, 1172, _dispatch_stub_1172@12) @@ -1566,225 +1565,235 @@ HIDDEN(GL_PREFIX(_dispatch_stub_1181, _dispatch_stub_1181@12)) GL_STUB(_dispatch_stub_1182, 1182, _dispatch_stub_1182@12) HIDDEN(GL_PREFIX(_dispatch_stub_1182, _dispatch_stub_1182@12)) - GL_STUB(_dispatch_stub_1183, 1183, _dispatch_stub_1183@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1183, _dispatch_stub_1183@8)) + GL_STUB(_dispatch_stub_1183, 1183, _dispatch_stub_1183@12) + HIDDEN(GL_PREFIX(_dispatch_stub_1183, _dispatch_stub_1183@12)) GL_STUB(_dispatch_stub_1184, 1184, _dispatch_stub_1184@8) HIDDEN(GL_PREFIX(_dispatch_stub_1184, _dispatch_stub_1184@8)) GL_STUB(_dispatch_stub_1185, 1185, _dispatch_stub_1185@8) HIDDEN(GL_PREFIX(_dispatch_stub_1185, _dispatch_stub_1185@8)) GL_STUB(_dispatch_stub_1186, 1186, _dispatch_stub_1186@8) HIDDEN(GL_PREFIX(_dispatch_stub_1186, _dispatch_stub_1186@8)) - GL_STUB(_dispatch_stub_1187, 1187, _dispatch_stub_1187@24) - HIDDEN(GL_PREFIX(_dispatch_stub_1187, _dispatch_stub_1187@24)) - GL_STUB(_dispatch_stub_1188, 1188, _dispatch_stub_1188@36) - HIDDEN(GL_PREFIX(_dispatch_stub_1188, _dispatch_stub_1188@36)) - GL_STUB(_dispatch_stub_1189, 1189, _dispatch_stub_1189@48) - HIDDEN(GL_PREFIX(_dispatch_stub_1189, _dispatch_stub_1189@48)) - GL_STUB(_dispatch_stub_1190, 1190, _dispatch_stub_1190@0) - HIDDEN(GL_PREFIX(_dispatch_stub_1190, _dispatch_stub_1190@0)) - GL_STUB(_dispatch_stub_1191, 1191, _dispatch_stub_1191@4) - HIDDEN(GL_PREFIX(_dispatch_stub_1191, _dispatch_stub_1191@4)) - GL_STUB(_dispatch_stub_1192, 1192, _dispatch_stub_1192@28) - HIDDEN(GL_PREFIX(_dispatch_stub_1192, _dispatch_stub_1192@28)) - GL_STUB(_dispatch_stub_1193, 1193, _dispatch_stub_1193@40) - HIDDEN(GL_PREFIX(_dispatch_stub_1193, _dispatch_stub_1193@40)) - GL_STUB(_dispatch_stub_1194, 1194, _dispatch_stub_1194@52) - HIDDEN(GL_PREFIX(_dispatch_stub_1194, _dispatch_stub_1194@52)) - GL_STUB(_dispatch_stub_1195, 1195, _dispatch_stub_1195@4) - HIDDEN(GL_PREFIX(_dispatch_stub_1195, _dispatch_stub_1195@4)) - GL_STUB(_dispatch_stub_1196, 1196, _dispatch_stub_1196@0) - HIDDEN(GL_PREFIX(_dispatch_stub_1196, _dispatch_stub_1196@0)) - GL_STUB(_dispatch_stub_1197, 1197, _dispatch_stub_1197@4) - HIDDEN(GL_PREFIX(_dispatch_stub_1197, _dispatch_stub_1197@4)) - GL_STUB(_dispatch_stub_1198, 1198, _dispatch_stub_1198@12) - HIDDEN(GL_PREFIX(_dispatch_stub_1198, _dispatch_stub_1198@12)) + GL_STUB(_dispatch_stub_1187, 1187, _dispatch_stub_1187@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1187, _dispatch_stub_1187@8)) + GL_STUB(_dispatch_stub_1188, 1188, _dispatch_stub_1188@24) + HIDDEN(GL_PREFIX(_dispatch_stub_1188, _dispatch_stub_1188@24)) + GL_STUB(_dispatch_stub_1189, 1189, _dispatch_stub_1189@36) + HIDDEN(GL_PREFIX(_dispatch_stub_1189, _dispatch_stub_1189@36)) + GL_STUB(_dispatch_stub_1190, 1190, _dispatch_stub_1190@48) + HIDDEN(GL_PREFIX(_dispatch_stub_1190, _dispatch_stub_1190@48)) + GL_STUB(_dispatch_stub_1191, 1191, _dispatch_stub_1191@0) + HIDDEN(GL_PREFIX(_dispatch_stub_1191, _dispatch_stub_1191@0)) + GL_STUB(_dispatch_stub_1192, 1192, _dispatch_stub_1192@4) + HIDDEN(GL_PREFIX(_dispatch_stub_1192, _dispatch_stub_1192@4)) + GL_STUB(_dispatch_stub_1193, 1193, _dispatch_stub_1193@28) + HIDDEN(GL_PREFIX(_dispatch_stub_1193, _dispatch_stub_1193@28)) + GL_STUB(_dispatch_stub_1194, 1194, _dispatch_stub_1194@40) + HIDDEN(GL_PREFIX(_dispatch_stub_1194, _dispatch_stub_1194@40)) + GL_STUB(_dispatch_stub_1195, 1195, _dispatch_stub_1195@52) + HIDDEN(GL_PREFIX(_dispatch_stub_1195, _dispatch_stub_1195@52)) + GL_STUB(_dispatch_stub_1196, 1196, _dispatch_stub_1196@4) + HIDDEN(GL_PREFIX(_dispatch_stub_1196, _dispatch_stub_1196@4)) + GL_STUB(_dispatch_stub_1197, 1197, _dispatch_stub_1197@0) + HIDDEN(GL_PREFIX(_dispatch_stub_1197, _dispatch_stub_1197@0)) + GL_STUB(_dispatch_stub_1198, 1198, _dispatch_stub_1198@4) + HIDDEN(GL_PREFIX(_dispatch_stub_1198, _dispatch_stub_1198@4)) GL_STUB(_dispatch_stub_1199, 1199, _dispatch_stub_1199@12) HIDDEN(GL_PREFIX(_dispatch_stub_1199, _dispatch_stub_1199@12)) - GL_STUB(_dispatch_stub_1200, 1200, _dispatch_stub_1200@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1200, _dispatch_stub_1200@8)) - GL_STUB(_dispatch_stub_1201, 1201, _dispatch_stub_1201@4) - HIDDEN(GL_PREFIX(_dispatch_stub_1201, _dispatch_stub_1201@4)) - GL_STUB(_dispatch_stub_1202, 1202, _dispatch_stub_1202@4) - HIDDEN(GL_PREFIX(_dispatch_stub_1202, _dispatch_stub_1202@4)) - GL_STUB(_dispatch_stub_1203, 1203, _dispatch_stub_1203@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1203, _dispatch_stub_1203@8)) - GL_STUB(_dispatch_stub_1204, 1204, _dispatch_stub_1204@16) - HIDDEN(GL_PREFIX(_dispatch_stub_1204, _dispatch_stub_1204@16)) - GL_STUB(_dispatch_stub_1205, 1205, _dispatch_stub_1205@16) - HIDDEN(GL_PREFIX(_dispatch_stub_1205, _dispatch_stub_1205@16)) - GL_STUB(_dispatch_stub_1206, 1206, _dispatch_stub_1206@44) - HIDDEN(GL_PREFIX(_dispatch_stub_1206, _dispatch_stub_1206@44)) + GL_STUB(_dispatch_stub_1200, 1200, _dispatch_stub_1200@12) + HIDDEN(GL_PREFIX(_dispatch_stub_1200, _dispatch_stub_1200@12)) + GL_STUB(_dispatch_stub_1201, 1201, _dispatch_stub_1201@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1201, _dispatch_stub_1201@8)) + GL_STUB(_dispatch_stub_1202, 1202, _dispatch_stub_1202@12) + HIDDEN(GL_PREFIX(_dispatch_stub_1202, _dispatch_stub_1202@12)) + GL_STUB(_dispatch_stub_1203, 1203, _dispatch_stub_1203@12) + HIDDEN(GL_PREFIX(_dispatch_stub_1203, _dispatch_stub_1203@12)) + GL_STUB(_dispatch_stub_1204, 1204, _dispatch_stub_1204@4) + HIDDEN(GL_PREFIX(_dispatch_stub_1204, _dispatch_stub_1204@4)) + GL_STUB(_dispatch_stub_1205, 1205, _dispatch_stub_1205@4) + HIDDEN(GL_PREFIX(_dispatch_stub_1205, _dispatch_stub_1205@4)) + GL_STUB(_dispatch_stub_1206, 1206, _dispatch_stub_1206@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1206, _dispatch_stub_1206@8)) GL_STUB(_dispatch_stub_1207, 1207, _dispatch_stub_1207@16) HIDDEN(GL_PREFIX(_dispatch_stub_1207, _dispatch_stub_1207@16)) - GL_STUB(_dispatch_stub_1208, 1208, _dispatch_stub_1208@28) - HIDDEN(GL_PREFIX(_dispatch_stub_1208, _dispatch_stub_1208@28)) - GL_STUB(_dispatch_stub_1209, 1209, _dispatch_stub_1209@16) - HIDDEN(GL_PREFIX(_dispatch_stub_1209, _dispatch_stub_1209@16)) - GL_STUB(PrimitiveRestartNV, 1210, PrimitiveRestartNV@0) - GL_STUB(_dispatch_stub_1211, 1211, _dispatch_stub_1211@12) - HIDDEN(GL_PREFIX(_dispatch_stub_1211, _dispatch_stub_1211@12)) - GL_STUB(_dispatch_stub_1212, 1212, _dispatch_stub_1212@12) - HIDDEN(GL_PREFIX(_dispatch_stub_1212, _dispatch_stub_1212@12)) - GL_STUB(_dispatch_stub_1213, 1213, _dispatch_stub_1213@12) - HIDDEN(GL_PREFIX(_dispatch_stub_1213, _dispatch_stub_1213@12)) - GL_STUB(_dispatch_stub_1214, 1214, _dispatch_stub_1214@16) - HIDDEN(GL_PREFIX(_dispatch_stub_1214, _dispatch_stub_1214@16)) - GL_STUB(BindFramebufferEXT, 1215, BindFramebufferEXT@8) - GL_STUB(BindRenderbufferEXT, 1216, BindRenderbufferEXT@8) - GL_STUB(_dispatch_stub_1217, 1217, _dispatch_stub_1217@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1217, _dispatch_stub_1217@8)) - GL_STUB(_dispatch_stub_1218, 1218, _dispatch_stub_1218@12) - HIDDEN(GL_PREFIX(_dispatch_stub_1218, _dispatch_stub_1218@12)) - GL_STUB(_dispatch_stub_1219, 1219, _dispatch_stub_1219@12) - HIDDEN(GL_PREFIX(_dispatch_stub_1219, _dispatch_stub_1219@12)) - GL_STUB(VertexAttribI1iEXT, 1220, VertexAttribI1iEXT@8) - GL_STUB(VertexAttribI1uiEXT, 1221, VertexAttribI1uiEXT@8) - GL_STUB(VertexAttribI2iEXT, 1222, VertexAttribI2iEXT@12) - GL_STUB(VertexAttribI2ivEXT, 1223, VertexAttribI2ivEXT@8) - GL_STUB(VertexAttribI2uiEXT, 1224, VertexAttribI2uiEXT@12) - GL_STUB(VertexAttribI2uivEXT, 1225, VertexAttribI2uivEXT@8) - GL_STUB(VertexAttribI3iEXT, 1226, VertexAttribI3iEXT@16) - GL_STUB(VertexAttribI3ivEXT, 1227, VertexAttribI3ivEXT@8) - GL_STUB(VertexAttribI3uiEXT, 1228, VertexAttribI3uiEXT@16) - GL_STUB(VertexAttribI3uivEXT, 1229, VertexAttribI3uivEXT@8) - GL_STUB(VertexAttribI4iEXT, 1230, VertexAttribI4iEXT@20) - GL_STUB(VertexAttribI4ivEXT, 1231, VertexAttribI4ivEXT@8) - GL_STUB(VertexAttribI4uiEXT, 1232, VertexAttribI4uiEXT@20) - GL_STUB(VertexAttribI4uivEXT, 1233, VertexAttribI4uivEXT@8) - GL_STUB(ClearColorIiEXT, 1234, ClearColorIiEXT@16) - GL_STUB(ClearColorIuiEXT, 1235, ClearColorIuiEXT@16) - GL_STUB(_dispatch_stub_1236, 1236, _dispatch_stub_1236@16) - HIDDEN(GL_PREFIX(_dispatch_stub_1236, _dispatch_stub_1236@16)) - GL_STUB(_dispatch_stub_1237, 1237, _dispatch_stub_1237@4) - HIDDEN(GL_PREFIX(_dispatch_stub_1237, _dispatch_stub_1237@4)) - GL_STUB(_dispatch_stub_1238, 1238, _dispatch_stub_1238@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1238, _dispatch_stub_1238@8)) - GL_STUB(_dispatch_stub_1239, 1239, _dispatch_stub_1239@4) - HIDDEN(GL_PREFIX(_dispatch_stub_1239, _dispatch_stub_1239@4)) - GL_STUB(_dispatch_stub_1240, 1240, _dispatch_stub_1240@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1240, _dispatch_stub_1240@8)) - GL_STUB(_dispatch_stub_1241, 1241, _dispatch_stub_1241@20) - HIDDEN(GL_PREFIX(_dispatch_stub_1241, _dispatch_stub_1241@20)) - GL_STUB(_dispatch_stub_1242, 1242, _dispatch_stub_1242@16) - HIDDEN(GL_PREFIX(_dispatch_stub_1242, _dispatch_stub_1242@16)) - GL_STUB(_dispatch_stub_1243, 1243, _dispatch_stub_1243@20) - HIDDEN(GL_PREFIX(_dispatch_stub_1243, _dispatch_stub_1243@20)) + GL_STUB(_dispatch_stub_1208, 1208, _dispatch_stub_1208@16) + HIDDEN(GL_PREFIX(_dispatch_stub_1208, _dispatch_stub_1208@16)) + GL_STUB(_dispatch_stub_1209, 1209, _dispatch_stub_1209@44) + HIDDEN(GL_PREFIX(_dispatch_stub_1209, _dispatch_stub_1209@44)) + GL_STUB(_dispatch_stub_1210, 1210, _dispatch_stub_1210@16) + HIDDEN(GL_PREFIX(_dispatch_stub_1210, _dispatch_stub_1210@16)) + GL_STUB(_dispatch_stub_1211, 1211, _dispatch_stub_1211@28) + HIDDEN(GL_PREFIX(_dispatch_stub_1211, _dispatch_stub_1211@28)) + GL_STUB(_dispatch_stub_1212, 1212, _dispatch_stub_1212@16) + HIDDEN(GL_PREFIX(_dispatch_stub_1212, _dispatch_stub_1212@16)) + GL_STUB(PrimitiveRestartNV, 1213, PrimitiveRestartNV@0) + GL_STUB(_dispatch_stub_1214, 1214, _dispatch_stub_1214@12) + HIDDEN(GL_PREFIX(_dispatch_stub_1214, _dispatch_stub_1214@12)) + GL_STUB(_dispatch_stub_1215, 1215, _dispatch_stub_1215@12) + HIDDEN(GL_PREFIX(_dispatch_stub_1215, _dispatch_stub_1215@12)) + GL_STUB(_dispatch_stub_1216, 1216, _dispatch_stub_1216@12) + HIDDEN(GL_PREFIX(_dispatch_stub_1216, _dispatch_stub_1216@12)) + GL_STUB(_dispatch_stub_1217, 1217, _dispatch_stub_1217@16) + HIDDEN(GL_PREFIX(_dispatch_stub_1217, _dispatch_stub_1217@16)) + GL_STUB(BindFramebufferEXT, 1218, BindFramebufferEXT@8) + GL_STUB(BindRenderbufferEXT, 1219, BindRenderbufferEXT@8) + GL_STUB(_dispatch_stub_1220, 1220, _dispatch_stub_1220@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1220, _dispatch_stub_1220@8)) + GL_STUB(_dispatch_stub_1221, 1221, _dispatch_stub_1221@12) + HIDDEN(GL_PREFIX(_dispatch_stub_1221, _dispatch_stub_1221@12)) + GL_STUB(_dispatch_stub_1222, 1222, _dispatch_stub_1222@12) + HIDDEN(GL_PREFIX(_dispatch_stub_1222, _dispatch_stub_1222@12)) + GL_STUB(VertexAttribI1iEXT, 1223, VertexAttribI1iEXT@8) + GL_STUB(VertexAttribI1uiEXT, 1224, VertexAttribI1uiEXT@8) + GL_STUB(VertexAttribI2iEXT, 1225, VertexAttribI2iEXT@12) + GL_STUB(VertexAttribI2ivEXT, 1226, VertexAttribI2ivEXT@8) + GL_STUB(VertexAttribI2uiEXT, 1227, VertexAttribI2uiEXT@12) + GL_STUB(VertexAttribI2uivEXT, 1228, VertexAttribI2uivEXT@8) + GL_STUB(VertexAttribI3iEXT, 1229, VertexAttribI3iEXT@16) + GL_STUB(VertexAttribI3ivEXT, 1230, VertexAttribI3ivEXT@8) + GL_STUB(VertexAttribI3uiEXT, 1231, VertexAttribI3uiEXT@16) + GL_STUB(VertexAttribI3uivEXT, 1232, VertexAttribI3uivEXT@8) + GL_STUB(VertexAttribI4iEXT, 1233, VertexAttribI4iEXT@20) + GL_STUB(VertexAttribI4ivEXT, 1234, VertexAttribI4ivEXT@8) + GL_STUB(VertexAttribI4uiEXT, 1235, VertexAttribI4uiEXT@20) + GL_STUB(VertexAttribI4uivEXT, 1236, VertexAttribI4uivEXT@8) + GL_STUB(ClearColorIiEXT, 1237, ClearColorIiEXT@16) + GL_STUB(ClearColorIuiEXT, 1238, ClearColorIuiEXT@16) + GL_STUB(_dispatch_stub_1239, 1239, _dispatch_stub_1239@16) + HIDDEN(GL_PREFIX(_dispatch_stub_1239, _dispatch_stub_1239@16)) + GL_STUB(_dispatch_stub_1240, 1240, _dispatch_stub_1240@4) + HIDDEN(GL_PREFIX(_dispatch_stub_1240, _dispatch_stub_1240@4)) + GL_STUB(_dispatch_stub_1241, 1241, _dispatch_stub_1241@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1241, _dispatch_stub_1241@8)) + GL_STUB(_dispatch_stub_1242, 1242, _dispatch_stub_1242@4) + HIDDEN(GL_PREFIX(_dispatch_stub_1242, _dispatch_stub_1242@4)) + GL_STUB(_dispatch_stub_1243, 1243, _dispatch_stub_1243@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1243, _dispatch_stub_1243@8)) GL_STUB(_dispatch_stub_1244, 1244, _dispatch_stub_1244@20) HIDDEN(GL_PREFIX(_dispatch_stub_1244, _dispatch_stub_1244@20)) GL_STUB(_dispatch_stub_1245, 1245, _dispatch_stub_1245@16) HIDDEN(GL_PREFIX(_dispatch_stub_1245, _dispatch_stub_1245@16)) - GL_STUB(_dispatch_stub_1246, 1246, _dispatch_stub_1246@12) - HIDDEN(GL_PREFIX(_dispatch_stub_1246, _dispatch_stub_1246@12)) + GL_STUB(_dispatch_stub_1246, 1246, _dispatch_stub_1246@20) + HIDDEN(GL_PREFIX(_dispatch_stub_1246, _dispatch_stub_1246@20)) GL_STUB(_dispatch_stub_1247, 1247, _dispatch_stub_1247@20) HIDDEN(GL_PREFIX(_dispatch_stub_1247, _dispatch_stub_1247@20)) GL_STUB(_dispatch_stub_1248, 1248, _dispatch_stub_1248@16) HIDDEN(GL_PREFIX(_dispatch_stub_1248, _dispatch_stub_1248@16)) GL_STUB(_dispatch_stub_1249, 1249, _dispatch_stub_1249@12) HIDDEN(GL_PREFIX(_dispatch_stub_1249, _dispatch_stub_1249@12)) - GL_STUB(_dispatch_stub_1250, 1250, _dispatch_stub_1250@12) - HIDDEN(GL_PREFIX(_dispatch_stub_1250, _dispatch_stub_1250@12)) - GL_STUB(_dispatch_stub_1251, 1251, _dispatch_stub_1251@4) - HIDDEN(GL_PREFIX(_dispatch_stub_1251, _dispatch_stub_1251@4)) - GL_STUB(_dispatch_stub_1252, 1252, _dispatch_stub_1252@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1252, _dispatch_stub_1252@8)) - GL_STUB(_dispatch_stub_1253, 1253, _dispatch_stub_1253@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1253, _dispatch_stub_1253@8)) - GL_STUB(TextureBarrierNV, 1254, TextureBarrierNV@0) - GL_STUB(_dispatch_stub_1255, 1255, _dispatch_stub_1255@0) - HIDDEN(GL_PREFIX(_dispatch_stub_1255, _dispatch_stub_1255@0)) - GL_STUB(_dispatch_stub_1256, 1256, _dispatch_stub_1256@20) - HIDDEN(GL_PREFIX(_dispatch_stub_1256, _dispatch_stub_1256@20)) - GL_STUB(_dispatch_stub_1257, 1257, _dispatch_stub_1257@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1257, _dispatch_stub_1257@8)) - GL_STUB(_dispatch_stub_1258, 1258, _dispatch_stub_1258@4) - HIDDEN(GL_PREFIX(_dispatch_stub_1258, _dispatch_stub_1258@4)) - GL_STUB(_dispatch_stub_1259, 1259, _dispatch_stub_1259@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1259, _dispatch_stub_1259@8)) - GL_STUB(_dispatch_stub_1260, 1260, _dispatch_stub_1260@16) - HIDDEN(GL_PREFIX(_dispatch_stub_1260, _dispatch_stub_1260@16)) - GL_STUB(_dispatch_stub_1261, 1261, _dispatch_stub_1261@16) - HIDDEN(GL_PREFIX(_dispatch_stub_1261, _dispatch_stub_1261@16)) + GL_STUB(_dispatch_stub_1250, 1250, _dispatch_stub_1250@20) + HIDDEN(GL_PREFIX(_dispatch_stub_1250, _dispatch_stub_1250@20)) + GL_STUB(_dispatch_stub_1251, 1251, _dispatch_stub_1251@16) + HIDDEN(GL_PREFIX(_dispatch_stub_1251, _dispatch_stub_1251@16)) + GL_STUB(_dispatch_stub_1252, 1252, _dispatch_stub_1252@12) + HIDDEN(GL_PREFIX(_dispatch_stub_1252, _dispatch_stub_1252@12)) + GL_STUB(_dispatch_stub_1253, 1253, _dispatch_stub_1253@12) + HIDDEN(GL_PREFIX(_dispatch_stub_1253, _dispatch_stub_1253@12)) + GL_STUB(_dispatch_stub_1254, 1254, _dispatch_stub_1254@4) + HIDDEN(GL_PREFIX(_dispatch_stub_1254, _dispatch_stub_1254@4)) + GL_STUB(_dispatch_stub_1255, 1255, _dispatch_stub_1255@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1255, _dispatch_stub_1255@8)) + GL_STUB(_dispatch_stub_1256, 1256, _dispatch_stub_1256@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1256, _dispatch_stub_1256@8)) + GL_STUB(TextureBarrierNV, 1257, TextureBarrierNV@0) + GL_STUB(_dispatch_stub_1258, 1258, _dispatch_stub_1258@0) + HIDDEN(GL_PREFIX(_dispatch_stub_1258, _dispatch_stub_1258@0)) + GL_STUB(_dispatch_stub_1259, 1259, _dispatch_stub_1259@20) + HIDDEN(GL_PREFIX(_dispatch_stub_1259, _dispatch_stub_1259@20)) + GL_STUB(_dispatch_stub_1260, 1260, _dispatch_stub_1260@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1260, _dispatch_stub_1260@8)) + GL_STUB(_dispatch_stub_1261, 1261, _dispatch_stub_1261@4) + HIDDEN(GL_PREFIX(_dispatch_stub_1261, _dispatch_stub_1261@4)) GL_STUB(_dispatch_stub_1262, 1262, _dispatch_stub_1262@8) HIDDEN(GL_PREFIX(_dispatch_stub_1262, _dispatch_stub_1262@8)) - GL_STUB(_dispatch_stub_1263, 1263, _dispatch_stub_1263@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1263, _dispatch_stub_1263@8)) - GL_STUB(_dispatch_stub_1264, 1264, _dispatch_stub_1264@4) - HIDDEN(GL_PREFIX(_dispatch_stub_1264, _dispatch_stub_1264@4)) - GL_STUB(_dispatch_stub_1265, 1265, _dispatch_stub_1265@4) - HIDDEN(GL_PREFIX(_dispatch_stub_1265, _dispatch_stub_1265@4)) + GL_STUB(_dispatch_stub_1263, 1263, _dispatch_stub_1263@16) + HIDDEN(GL_PREFIX(_dispatch_stub_1263, _dispatch_stub_1263@16)) + GL_STUB(_dispatch_stub_1264, 1264, _dispatch_stub_1264@16) + HIDDEN(GL_PREFIX(_dispatch_stub_1264, _dispatch_stub_1264@16)) + GL_STUB(_dispatch_stub_1265, 1265, _dispatch_stub_1265@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1265, _dispatch_stub_1265@8)) GL_STUB(_dispatch_stub_1266, 1266, _dispatch_stub_1266@8) HIDDEN(GL_PREFIX(_dispatch_stub_1266, _dispatch_stub_1266@8)) GL_STUB(_dispatch_stub_1267, 1267, _dispatch_stub_1267@4) HIDDEN(GL_PREFIX(_dispatch_stub_1267, _dispatch_stub_1267@4)) GL_STUB(_dispatch_stub_1268, 1268, _dispatch_stub_1268@4) HIDDEN(GL_PREFIX(_dispatch_stub_1268, _dispatch_stub_1268@4)) - GL_STUB(_dispatch_stub_1269, 1269, _dispatch_stub_1269@4) - HIDDEN(GL_PREFIX(_dispatch_stub_1269, _dispatch_stub_1269@4)) - GL_STUB(_dispatch_stub_1270, 1270, _dispatch_stub_1270@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1270, _dispatch_stub_1270@8)) - GL_STUB(_dispatch_stub_1271, 1271, _dispatch_stub_1271@44) - HIDDEN(GL_PREFIX(_dispatch_stub_1271, _dispatch_stub_1271@44)) - GL_STUB(_dispatch_stub_1272, 1272, _dispatch_stub_1272@20) - HIDDEN(GL_PREFIX(_dispatch_stub_1272, _dispatch_stub_1272@20)) + GL_STUB(_dispatch_stub_1269, 1269, _dispatch_stub_1269@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1269, _dispatch_stub_1269@8)) + GL_STUB(_dispatch_stub_1270, 1270, _dispatch_stub_1270@4) + HIDDEN(GL_PREFIX(_dispatch_stub_1270, _dispatch_stub_1270@4)) + GL_STUB(_dispatch_stub_1271, 1271, _dispatch_stub_1271@4) + HIDDEN(GL_PREFIX(_dispatch_stub_1271, _dispatch_stub_1271@4)) + GL_STUB(_dispatch_stub_1272, 1272, _dispatch_stub_1272@4) + HIDDEN(GL_PREFIX(_dispatch_stub_1272, _dispatch_stub_1272@4)) GL_STUB(_dispatch_stub_1273, 1273, _dispatch_stub_1273@8) HIDDEN(GL_PREFIX(_dispatch_stub_1273, _dispatch_stub_1273@8)) - GL_STUB(_dispatch_stub_1274, 1274, _dispatch_stub_1274@28) - HIDDEN(GL_PREFIX(_dispatch_stub_1274, _dispatch_stub_1274@28)) - GL_STUB(_dispatch_stub_1275, 1275, _dispatch_stub_1275@12) - HIDDEN(GL_PREFIX(_dispatch_stub_1275, _dispatch_stub_1275@12)) - GL_STUB(_dispatch_stub_1276, 1276, _dispatch_stub_1276@16) - HIDDEN(GL_PREFIX(_dispatch_stub_1276, _dispatch_stub_1276@16)) - GL_STUB(_dispatch_stub_1277, 1277, _dispatch_stub_1277@16) - HIDDEN(GL_PREFIX(_dispatch_stub_1277, _dispatch_stub_1277@16)) - GL_STUB(_dispatch_stub_1278, 1278, _dispatch_stub_1278@16) - HIDDEN(GL_PREFIX(_dispatch_stub_1278, _dispatch_stub_1278@16)) - GL_STUB(_dispatch_stub_1279, 1279, _dispatch_stub_1279@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1279, _dispatch_stub_1279@8)) - GL_STUB(_dispatch_stub_1280, 1280, _dispatch_stub_1280@8) - HIDDEN(GL_PREFIX(_dispatch_stub_1280, _dispatch_stub_1280@8)) - GL_STUB(AlphaFuncx, 1281, AlphaFuncx@8) - GL_STUB(ClearColorx, 1282, ClearColorx@16) - GL_STUB(ClearDepthx, 1283, ClearDepthx@4) - GL_STUB(Color4x, 1284, Color4x@16) - GL_STUB(DepthRangex, 1285, DepthRangex@8) - GL_STUB(Fogx, 1286, Fogx@8) - GL_STUB(Fogxv, 1287, Fogxv@8) - GL_STUB(Frustumf, 1288, Frustumf@24) - GL_STUB(Frustumx, 1289, Frustumx@24) - GL_STUB(LightModelx, 1290, LightModelx@8) - GL_STUB(LightModelxv, 1291, LightModelxv@8) - GL_STUB(Lightx, 1292, Lightx@12) - GL_STUB(Lightxv, 1293, Lightxv@12) - GL_STUB(LineWidthx, 1294, LineWidthx@4) - GL_STUB(LoadMatrixx, 1295, LoadMatrixx@4) - GL_STUB(Materialx, 1296, Materialx@12) - GL_STUB(Materialxv, 1297, Materialxv@12) - GL_STUB(MultMatrixx, 1298, MultMatrixx@4) - GL_STUB(MultiTexCoord4x, 1299, MultiTexCoord4x@20) - GL_STUB(Normal3x, 1300, Normal3x@12) - GL_STUB(Orthof, 1301, Orthof@24) - GL_STUB(Orthox, 1302, Orthox@24) - GL_STUB(PointSizex, 1303, PointSizex@4) - GL_STUB(PolygonOffsetx, 1304, PolygonOffsetx@8) - GL_STUB(Rotatex, 1305, Rotatex@16) - GL_STUB(SampleCoveragex, 1306, SampleCoveragex@8) - GL_STUB(Scalex, 1307, Scalex@12) - GL_STUB(TexEnvx, 1308, TexEnvx@12) - GL_STUB(TexEnvxv, 1309, TexEnvxv@12) - GL_STUB(TexParameterx, 1310, TexParameterx@12) - GL_STUB(Translatex, 1311, Translatex@12) - GL_STUB(ClipPlanef, 1312, ClipPlanef@8) - GL_STUB(ClipPlanex, 1313, ClipPlanex@8) - GL_STUB(GetClipPlanef, 1314, GetClipPlanef@8) - GL_STUB(GetClipPlanex, 1315, GetClipPlanex@8) - GL_STUB(GetFixedv, 1316, GetFixedv@8) - GL_STUB(GetLightxv, 1317, GetLightxv@12) - GL_STUB(GetMaterialxv, 1318, GetMaterialxv@12) - GL_STUB(GetTexEnvxv, 1319, GetTexEnvxv@12) - GL_STUB(GetTexParameterxv, 1320, GetTexParameterxv@12) - GL_STUB(PointParameterx, 1321, PointParameterx@8) - GL_STUB(PointParameterxv, 1322, PointParameterxv@8) - GL_STUB(TexParameterxv, 1323, TexParameterxv@12) + GL_STUB(_dispatch_stub_1274, 1274, _dispatch_stub_1274@44) + HIDDEN(GL_PREFIX(_dispatch_stub_1274, _dispatch_stub_1274@44)) + GL_STUB(_dispatch_stub_1275, 1275, _dispatch_stub_1275@20) + HIDDEN(GL_PREFIX(_dispatch_stub_1275, _dispatch_stub_1275@20)) + GL_STUB(_dispatch_stub_1276, 1276, _dispatch_stub_1276@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1276, _dispatch_stub_1276@8)) + GL_STUB(_dispatch_stub_1277, 1277, _dispatch_stub_1277@28) + HIDDEN(GL_PREFIX(_dispatch_stub_1277, _dispatch_stub_1277@28)) + GL_STUB(_dispatch_stub_1278, 1278, _dispatch_stub_1278@12) + HIDDEN(GL_PREFIX(_dispatch_stub_1278, _dispatch_stub_1278@12)) + GL_STUB(_dispatch_stub_1279, 1279, _dispatch_stub_1279@12) + HIDDEN(GL_PREFIX(_dispatch_stub_1279, _dispatch_stub_1279@12)) + GL_STUB(_dispatch_stub_1280, 1280, _dispatch_stub_1280@16) + HIDDEN(GL_PREFIX(_dispatch_stub_1280, _dispatch_stub_1280@16)) + GL_STUB(_dispatch_stub_1281, 1281, _dispatch_stub_1281@16) + HIDDEN(GL_PREFIX(_dispatch_stub_1281, _dispatch_stub_1281@16)) + GL_STUB(_dispatch_stub_1282, 1282, _dispatch_stub_1282@16) + HIDDEN(GL_PREFIX(_dispatch_stub_1282, _dispatch_stub_1282@16)) + GL_STUB(_dispatch_stub_1283, 1283, _dispatch_stub_1283@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1283, _dispatch_stub_1283@8)) + GL_STUB(_dispatch_stub_1284, 1284, _dispatch_stub_1284@8) + HIDDEN(GL_PREFIX(_dispatch_stub_1284, _dispatch_stub_1284@8)) + GL_STUB(AlphaFuncx, 1285, AlphaFuncx@8) + GL_STUB(ClearColorx, 1286, ClearColorx@16) + GL_STUB(ClearDepthx, 1287, ClearDepthx@4) + GL_STUB(Color4x, 1288, Color4x@16) + GL_STUB(DepthRangex, 1289, DepthRangex@8) + GL_STUB(Fogx, 1290, Fogx@8) + GL_STUB(Fogxv, 1291, Fogxv@8) + GL_STUB(Frustumf, 1292, Frustumf@24) + GL_STUB(Frustumx, 1293, Frustumx@24) + GL_STUB(LightModelx, 1294, LightModelx@8) + GL_STUB(LightModelxv, 1295, LightModelxv@8) + GL_STUB(Lightx, 1296, Lightx@12) + GL_STUB(Lightxv, 1297, Lightxv@12) + GL_STUB(LineWidthx, 1298, LineWidthx@4) + GL_STUB(LoadMatrixx, 1299, LoadMatrixx@4) + GL_STUB(Materialx, 1300, Materialx@12) + GL_STUB(Materialxv, 1301, Materialxv@12) + GL_STUB(MultMatrixx, 1302, MultMatrixx@4) + GL_STUB(MultiTexCoord4x, 1303, MultiTexCoord4x@20) + GL_STUB(Normal3x, 1304, Normal3x@12) + GL_STUB(Orthof, 1305, Orthof@24) + GL_STUB(Orthox, 1306, Orthox@24) + GL_STUB(PointSizex, 1307, PointSizex@4) + GL_STUB(PolygonOffsetx, 1308, PolygonOffsetx@8) + GL_STUB(Rotatex, 1309, Rotatex@16) + GL_STUB(SampleCoveragex, 1310, SampleCoveragex@8) + GL_STUB(Scalex, 1311, Scalex@12) + GL_STUB(TexEnvx, 1312, TexEnvx@12) + GL_STUB(TexEnvxv, 1313, TexEnvxv@12) + GL_STUB(TexParameterx, 1314, TexParameterx@12) + GL_STUB(Translatex, 1315, Translatex@12) + GL_STUB(ClipPlanef, 1316, ClipPlanef@8) + GL_STUB(ClipPlanex, 1317, ClipPlanex@8) + GL_STUB(GetClipPlanef, 1318, GetClipPlanef@8) + GL_STUB(GetClipPlanex, 1319, GetClipPlanex@8) + GL_STUB(GetFixedv, 1320, GetFixedv@8) + GL_STUB(GetLightxv, 1321, GetLightxv@12) + GL_STUB(GetMaterialxv, 1322, GetMaterialxv@12) + GL_STUB(GetTexEnvxv, 1323, GetTexEnvxv@12) + GL_STUB(GetTexParameterxv, 1324, GetTexParameterxv@12) + GL_STUB(PointParameterx, 1325, PointParameterx@8) + GL_STUB(PointParameterxv, 1326, PointParameterxv@8) + GL_STUB(TexParameterxv, 1327, TexParameterxv@12) + GL_STUB(BlendBarrier, 1328, BlendBarrier@0) + GL_STUB(PrimitiveBoundingBox, 1329, PrimitiveBoundingBox@32) GL_STUB_ALIAS(ArrayElementEXT, 306, ArrayElementEXT@4, ArrayElement, ArrayElement@4) GL_STUB_ALIAS(BindTextureEXT, 307, BindTextureEXT@8, BindTexture, BindTexture@8) GL_STUB_ALIAS(DrawArraysEXT, 310, DrawArraysEXT@12, DrawArrays, DrawArrays@12) @@ -2049,29 +2058,38 @@ GL_STUB_ALIAS(RenderbufferStorageEXT, 679, RenderbufferStorageEXT@16, RenderbufferStorage, RenderbufferStorage@16) GL_STUB_ALIAS(RenderbufferStorageMultisampleEXT, 680, RenderbufferStorageMultisampleEXT@20, RenderbufferStorageMultisample, RenderbufferStorageMultisample@20) GL_STUB_ALIAS(ProvokingVertexEXT, 706, ProvokingVertexEXT@4, ProvokingVertex, ProvokingVertex@4) - GL_STUB_ALIAS(DebugMessageCallbackARB, 1102, DebugMessageCallbackARB@8, DebugMessageCallback, DebugMessageCallback@8) - GL_STUB_ALIAS(DebugMessageControlARB, 1103, DebugMessageControlARB@24, DebugMessageControl, DebugMessageControl@24) - GL_STUB_ALIAS(DebugMessageInsertARB, 1104, DebugMessageInsertARB@24, DebugMessageInsert, DebugMessageInsert@24) - GL_STUB_ALIAS(GetDebugMessageLogARB, 1105, GetDebugMessageLogARB@32, GetDebugMessageLog, GetDebugMessageLog@32) - GL_STUB_ALIAS(SecondaryColor3f, 1112, SecondaryColor3f@12, SecondaryColor3fEXT, SecondaryColor3fEXT@12) - GL_STUB_ALIAS(SecondaryColor3fv, 1113, SecondaryColor3fv@4, SecondaryColor3fvEXT, SecondaryColor3fvEXT@4) - GL_STUB_ALIAS(MultiDrawElements, 1114, MultiDrawElements@20, MultiDrawElementsEXT, MultiDrawElementsEXT@20) - GL_STUB_ALIAS(FogCoordf, 1115, FogCoordf@4, FogCoordfEXT, FogCoordfEXT@4) - GL_STUB_ALIAS(FogCoordfv, 1116, FogCoordfv@4, FogCoordfvEXT, FogCoordfvEXT@4) - GL_STUB_ALIAS(VertexAttribI1i, 1220, VertexAttribI1i@8, VertexAttribI1iEXT, VertexAttribI1iEXT@8) - GL_STUB_ALIAS(VertexAttribI1ui, 1221, VertexAttribI1ui@8, VertexAttribI1uiEXT, VertexAttribI1uiEXT@8) - GL_STUB_ALIAS(VertexAttribI2i, 1222, VertexAttribI2i@12, VertexAttribI2iEXT, VertexAttribI2iEXT@12) - GL_STUB_ALIAS(VertexAttribI2iv, 1223, VertexAttribI2iv@8, VertexAttribI2ivEXT, VertexAttribI2ivEXT@8) - GL_STUB_ALIAS(VertexAttribI2ui, 1224, VertexAttribI2ui@12, VertexAttribI2uiEXT, VertexAttribI2uiEXT@12) - GL_STUB_ALIAS(VertexAttribI2uiv, 1225, VertexAttribI2uiv@8, VertexAttribI2uivEXT, VertexAttribI2uivEXT@8) - GL_STUB_ALIAS(VertexAttribI3i, 1226, VertexAttribI3i@16, VertexAttribI3iEXT, VertexAttribI3iEXT@16) - GL_STUB_ALIAS(VertexAttribI3iv, 1227, VertexAttribI3iv@8, VertexAttribI3ivEXT, VertexAttribI3ivEXT@8) - GL_STUB_ALIAS(VertexAttribI3ui, 1228, VertexAttribI3ui@16, VertexAttribI3uiEXT, VertexAttribI3uiEXT@16) - GL_STUB_ALIAS(VertexAttribI3uiv, 1229, VertexAttribI3uiv@8, VertexAttribI3uivEXT, VertexAttribI3uivEXT@8) - GL_STUB_ALIAS(VertexAttribI4i, 1230, VertexAttribI4i@20, VertexAttribI4iEXT, VertexAttribI4iEXT@20) - GL_STUB_ALIAS(VertexAttribI4iv, 1231, VertexAttribI4iv@8, VertexAttribI4ivEXT, VertexAttribI4ivEXT@8) - GL_STUB_ALIAS(VertexAttribI4ui, 1232, VertexAttribI4ui@20, VertexAttribI4uiEXT, VertexAttribI4uiEXT@20) - GL_STUB_ALIAS(VertexAttribI4uiv, 1233, VertexAttribI4uiv@8, VertexAttribI4uivEXT, VertexAttribI4uivEXT@8) + GL_STUB_ALIAS(BlendEquationSeparatei, 711, BlendEquationSeparatei@12, BlendEquationSeparateiARB, BlendEquationSeparateiARB@12) + GL_STUB_ALIAS(BlendEquationi, 712, BlendEquationi@8, BlendEquationiARB, BlendEquationiARB@8) + GL_STUB_ALIAS(BlendFuncSeparatei, 713, BlendFuncSeparatei@20, BlendFuncSeparateiARB, BlendFuncSeparateiARB@20) + GL_STUB_ALIAS(BlendFunci, 714, BlendFunci@12, BlendFunciARB, BlendFunciARB@12) + GL_STUB_ALIAS(GetGraphicsResetStatus, 841, GetGraphicsResetStatus@0, GetGraphicsResetStatusARB, GetGraphicsResetStatusARB@0) + GL_STUB_ALIAS(GetnUniformfv, 857, GetnUniformfv@16, GetnUniformfvARB, GetnUniformfvARB@16) + GL_STUB_ALIAS(GetnUniformiv, 858, GetnUniformiv@16, GetnUniformivARB, GetnUniformivARB@16) + GL_STUB_ALIAS(GetnUniformuiv, 859, GetnUniformuiv@16, GetnUniformuivARB, GetnUniformuivARB@16) + GL_STUB_ALIAS(ReadnPixels, 860, ReadnPixels@32, ReadnPixelsARB, ReadnPixelsARB@32) + GL_STUB_ALIAS(DebugMessageCallbackARB, 1103, DebugMessageCallbackARB@8, DebugMessageCallback, DebugMessageCallback@8) + GL_STUB_ALIAS(DebugMessageControlARB, 1104, DebugMessageControlARB@24, DebugMessageControl, DebugMessageControl@24) + GL_STUB_ALIAS(DebugMessageInsertARB, 1105, DebugMessageInsertARB@24, DebugMessageInsert, DebugMessageInsert@24) + GL_STUB_ALIAS(GetDebugMessageLogARB, 1106, GetDebugMessageLogARB@32, GetDebugMessageLog, GetDebugMessageLog@32) + GL_STUB_ALIAS(SecondaryColor3f, 1113, SecondaryColor3f@12, SecondaryColor3fEXT, SecondaryColor3fEXT@12) + GL_STUB_ALIAS(SecondaryColor3fv, 1114, SecondaryColor3fv@4, SecondaryColor3fvEXT, SecondaryColor3fvEXT@4) + GL_STUB_ALIAS(MultiDrawElements, 1115, MultiDrawElements@20, MultiDrawElementsEXT, MultiDrawElementsEXT@20) + GL_STUB_ALIAS(FogCoordf, 1116, FogCoordf@4, FogCoordfEXT, FogCoordfEXT@4) + GL_STUB_ALIAS(FogCoordfv, 1117, FogCoordfv@4, FogCoordfvEXT, FogCoordfvEXT@4) + GL_STUB_ALIAS(VertexAttribI1i, 1223, VertexAttribI1i@8, VertexAttribI1iEXT, VertexAttribI1iEXT@8) + GL_STUB_ALIAS(VertexAttribI1ui, 1224, VertexAttribI1ui@8, VertexAttribI1uiEXT, VertexAttribI1uiEXT@8) + GL_STUB_ALIAS(VertexAttribI2i, 1225, VertexAttribI2i@12, VertexAttribI2iEXT, VertexAttribI2iEXT@12) + GL_STUB_ALIAS(VertexAttribI2iv, 1226, VertexAttribI2iv@8, VertexAttribI2ivEXT, VertexAttribI2ivEXT@8) + GL_STUB_ALIAS(VertexAttribI2ui, 1227, VertexAttribI2ui@12, VertexAttribI2uiEXT, VertexAttribI2uiEXT@12) + GL_STUB_ALIAS(VertexAttribI2uiv, 1228, VertexAttribI2uiv@8, VertexAttribI2uivEXT, VertexAttribI2uivEXT@8) + GL_STUB_ALIAS(VertexAttribI3i, 1229, VertexAttribI3i@16, VertexAttribI3iEXT, VertexAttribI3iEXT@16) + GL_STUB_ALIAS(VertexAttribI3iv, 1230, VertexAttribI3iv@8, VertexAttribI3ivEXT, VertexAttribI3ivEXT@8) + GL_STUB_ALIAS(VertexAttribI3ui, 1231, VertexAttribI3ui@16, VertexAttribI3uiEXT, VertexAttribI3uiEXT@16) + GL_STUB_ALIAS(VertexAttribI3uiv, 1232, VertexAttribI3uiv@8, VertexAttribI3uivEXT, VertexAttribI3uivEXT@8) + GL_STUB_ALIAS(VertexAttribI4i, 1233, VertexAttribI4i@20, VertexAttribI4iEXT, VertexAttribI4iEXT@20) + GL_STUB_ALIAS(VertexAttribI4iv, 1234, VertexAttribI4iv@8, VertexAttribI4ivEXT, VertexAttribI4ivEXT@8) + GL_STUB_ALIAS(VertexAttribI4ui, 1235, VertexAttribI4ui@20, VertexAttribI4uiEXT, VertexAttribI4uiEXT@20) + GL_STUB_ALIAS(VertexAttribI4uiv, 1236, VertexAttribI4uiv@8, VertexAttribI4uivEXT, VertexAttribI4uivEXT@8) GLOBL GLNAME(gl_dispatch_functions_end) HIDDEN(GLNAME(gl_dispatch_functions_end)) diff -Nru mesa-12.0.6/src/mapi/glapi/glprocs.h mesa-17.0.7/src/mapi/glapi/glprocs.h --- mesa-12.0.6/src/mapi/glapi/glprocs.h 2017-01-24 01:42:36.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/glprocs.h 2017-06-01 10:37:40.000000000 +0000 @@ -964,6 +964,7 @@ "glBindSamplers\0" "glBindTextures\0" "glBindVertexBuffers\0" + "glDispatchComputeGroupSizeARB\0" "glMultiDrawArraysIndirectCountARB\0" "glMultiDrawElementsIndirectCountARB\0" "glClipControl\0" @@ -1253,6 +1254,8 @@ "glPassTexCoordATI\0" "glSampleMapATI\0" "glSetFragmentShaderConstantATI\0" + "glDepthRangeArrayfvOES\0" + "glDepthRangeIndexedfOES\0" "glActiveStencilFaceEXT\0" "glBindVertexArrayAPPLE\0" "glGenVertexArraysAPPLE\0" @@ -1328,6 +1331,7 @@ "glGetPerfQueryIdByNameINTEL\0" "glGetPerfQueryInfoINTEL\0" "glPolygonOffsetClampEXT\0" + "glWindowRectanglesEXT\0" "glStencilFuncSeparateATI\0" "glProgramEnvParameters4fvEXT\0" "glProgramLocalParameters4fvEXT\0" @@ -1376,6 +1380,8 @@ "glPointParameterx\0" "glPointParameterxv\0" "glTexParameterxv\0" + "glBlendBarrier\0" + "glPrimitiveBoundingBox\0" "glTexGenfOES\0" "glTexGenfvOES\0" "glTexGeniOES\0" @@ -1708,6 +1714,7 @@ "glTexBufferARB\0" "glTexBufferEXT\0" "glTexBufferOES\0" + "glFramebufferTextureEXT\0" "glFramebufferTextureOES\0" "glVertexAttribDivisorARB\0" "glMinSampleShadingARB\0" @@ -1811,11 +1818,20 @@ "glSamplerParameterIuivOES\0" "glGetQueryObjecti64vEXT\0" "glGetQueryObjectui64vEXT\0" + "glPatchParameteriEXT\0" + "glPatchParameteriOES\0" "glClearDepthfOES\0" "glDepthRangefOES\0" "glGetProgramBinaryOES\0" "glProgramBinaryOES\0" "glProgramParameteriEXT\0" + "glGetFloati_vOES\0" + "glScissorArrayvOES\0" + "glScissorIndexedOES\0" + "glScissorIndexedvOES\0" + "glViewportArrayvOES\0" + "glViewportIndexedfOES\0" + "glViewportIndexedfvOES\0" "glGetGraphicsResetStatus\0" "glGetGraphicsResetStatusKHR\0" "glGetnUniformfv\0" @@ -1958,6 +1974,10 @@ "glPointParameterxOES\0" "glPointParameterxvOES\0" "glTexParameterxvOES\0" + "glBlendBarrierKHR\0" + "glPrimitiveBoundingBoxARB\0" + "glPrimitiveBoundingBoxEXT\0" + "glPrimitiveBoundingBoxOES\0" ; @@ -2005,7 +2025,6 @@ #define gl_dispatch_stub_798 mgl_dispatch_stub_798 #define gl_dispatch_stub_799 mgl_dispatch_stub_799 #define gl_dispatch_stub_800 mgl_dispatch_stub_800 -#define gl_dispatch_stub_801 mgl_dispatch_stub_801 #define gl_dispatch_stub_821 mgl_dispatch_stub_821 #define gl_dispatch_stub_822 mgl_dispatch_stub_822 #define gl_dispatch_stub_823 mgl_dispatch_stub_823 @@ -2122,7 +2141,7 @@ #define gl_dispatch_stub_1011 mgl_dispatch_stub_1011 #define gl_dispatch_stub_1012 mgl_dispatch_stub_1012 #define gl_dispatch_stub_1013 mgl_dispatch_stub_1013 -#define gl_dispatch_stub_1020 mgl_dispatch_stub_1020 +#define gl_dispatch_stub_1014 mgl_dispatch_stub_1014 #define gl_dispatch_stub_1021 mgl_dispatch_stub_1021 #define gl_dispatch_stub_1022 mgl_dispatch_stub_1022 #define gl_dispatch_stub_1023 mgl_dispatch_stub_1023 @@ -2131,28 +2150,28 @@ #define gl_dispatch_stub_1026 mgl_dispatch_stub_1026 #define gl_dispatch_stub_1027 mgl_dispatch_stub_1027 #define gl_dispatch_stub_1028 mgl_dispatch_stub_1028 -#define gl_dispatch_stub_1030 mgl_dispatch_stub_1030 +#define gl_dispatch_stub_1029 mgl_dispatch_stub_1029 #define gl_dispatch_stub_1031 mgl_dispatch_stub_1031 #define gl_dispatch_stub_1032 mgl_dispatch_stub_1032 -#define gl_dispatch_stub_1039 mgl_dispatch_stub_1039 -#define gl_dispatch_stub_1049 mgl_dispatch_stub_1049 +#define gl_dispatch_stub_1033 mgl_dispatch_stub_1033 +#define gl_dispatch_stub_1040 mgl_dispatch_stub_1040 #define gl_dispatch_stub_1050 mgl_dispatch_stub_1050 -#define gl_dispatch_stub_1057 mgl_dispatch_stub_1057 +#define gl_dispatch_stub_1051 mgl_dispatch_stub_1051 #define gl_dispatch_stub_1058 mgl_dispatch_stub_1058 -#define gl_dispatch_stub_1065 mgl_dispatch_stub_1065 +#define gl_dispatch_stub_1059 mgl_dispatch_stub_1059 #define gl_dispatch_stub_1066 mgl_dispatch_stub_1066 -#define gl_dispatch_stub_1073 mgl_dispatch_stub_1073 +#define gl_dispatch_stub_1067 mgl_dispatch_stub_1067 #define gl_dispatch_stub_1074 mgl_dispatch_stub_1074 -#define gl_dispatch_stub_1081 mgl_dispatch_stub_1081 -#define gl_dispatch_stub_1083 mgl_dispatch_stub_1083 -#define gl_dispatch_stub_1085 mgl_dispatch_stub_1085 -#define gl_dispatch_stub_1087 mgl_dispatch_stub_1087 -#define gl_dispatch_stub_1089 mgl_dispatch_stub_1089 -#define gl_dispatch_stub_1091 mgl_dispatch_stub_1091 -#define gl_dispatch_stub_1093 mgl_dispatch_stub_1093 -#define gl_dispatch_stub_1095 mgl_dispatch_stub_1095 -#define gl_dispatch_stub_1097 mgl_dispatch_stub_1097 -#define gl_dispatch_stub_1117 mgl_dispatch_stub_1117 +#define gl_dispatch_stub_1075 mgl_dispatch_stub_1075 +#define gl_dispatch_stub_1082 mgl_dispatch_stub_1082 +#define gl_dispatch_stub_1084 mgl_dispatch_stub_1084 +#define gl_dispatch_stub_1086 mgl_dispatch_stub_1086 +#define gl_dispatch_stub_1088 mgl_dispatch_stub_1088 +#define gl_dispatch_stub_1090 mgl_dispatch_stub_1090 +#define gl_dispatch_stub_1092 mgl_dispatch_stub_1092 +#define gl_dispatch_stub_1094 mgl_dispatch_stub_1094 +#define gl_dispatch_stub_1096 mgl_dispatch_stub_1096 +#define gl_dispatch_stub_1098 mgl_dispatch_stub_1098 #define gl_dispatch_stub_1118 mgl_dispatch_stub_1118 #define gl_dispatch_stub_1119 mgl_dispatch_stub_1119 #define gl_dispatch_stub_1120 mgl_dispatch_stub_1120 @@ -2245,16 +2264,16 @@ #define gl_dispatch_stub_1207 mgl_dispatch_stub_1207 #define gl_dispatch_stub_1208 mgl_dispatch_stub_1208 #define gl_dispatch_stub_1209 mgl_dispatch_stub_1209 +#define gl_dispatch_stub_1210 mgl_dispatch_stub_1210 #define gl_dispatch_stub_1211 mgl_dispatch_stub_1211 #define gl_dispatch_stub_1212 mgl_dispatch_stub_1212 -#define gl_dispatch_stub_1213 mgl_dispatch_stub_1213 #define gl_dispatch_stub_1214 mgl_dispatch_stub_1214 +#define gl_dispatch_stub_1215 mgl_dispatch_stub_1215 +#define gl_dispatch_stub_1216 mgl_dispatch_stub_1216 #define gl_dispatch_stub_1217 mgl_dispatch_stub_1217 -#define gl_dispatch_stub_1218 mgl_dispatch_stub_1218 -#define gl_dispatch_stub_1219 mgl_dispatch_stub_1219 -#define gl_dispatch_stub_1236 mgl_dispatch_stub_1236 -#define gl_dispatch_stub_1237 mgl_dispatch_stub_1237 -#define gl_dispatch_stub_1238 mgl_dispatch_stub_1238 +#define gl_dispatch_stub_1220 mgl_dispatch_stub_1220 +#define gl_dispatch_stub_1221 mgl_dispatch_stub_1221 +#define gl_dispatch_stub_1222 mgl_dispatch_stub_1222 #define gl_dispatch_stub_1239 mgl_dispatch_stub_1239 #define gl_dispatch_stub_1240 mgl_dispatch_stub_1240 #define gl_dispatch_stub_1241 mgl_dispatch_stub_1241 @@ -2270,9 +2289,9 @@ #define gl_dispatch_stub_1251 mgl_dispatch_stub_1251 #define gl_dispatch_stub_1252 mgl_dispatch_stub_1252 #define gl_dispatch_stub_1253 mgl_dispatch_stub_1253 +#define gl_dispatch_stub_1254 mgl_dispatch_stub_1254 #define gl_dispatch_stub_1255 mgl_dispatch_stub_1255 #define gl_dispatch_stub_1256 mgl_dispatch_stub_1256 -#define gl_dispatch_stub_1257 mgl_dispatch_stub_1257 #define gl_dispatch_stub_1258 mgl_dispatch_stub_1258 #define gl_dispatch_stub_1259 mgl_dispatch_stub_1259 #define gl_dispatch_stub_1260 mgl_dispatch_stub_1260 @@ -2296,6 +2315,10 @@ #define gl_dispatch_stub_1278 mgl_dispatch_stub_1278 #define gl_dispatch_stub_1279 mgl_dispatch_stub_1279 #define gl_dispatch_stub_1280 mgl_dispatch_stub_1280 +#define gl_dispatch_stub_1281 mgl_dispatch_stub_1281 +#define gl_dispatch_stub_1282 mgl_dispatch_stub_1282 +#define gl_dispatch_stub_1283 mgl_dispatch_stub_1283 +#define gl_dispatch_stub_1284 mgl_dispatch_stub_1284 #endif /* USE_MGL_NAMESPACE */ @@ -2343,7 +2366,6 @@ void GLAPIENTRY gl_dispatch_stub_798(GLenum shadertype, GLint location, GLuint * params); void GLAPIENTRY gl_dispatch_stub_799(GLenum shadertype, GLsizei count, const GLuint * indices); void GLAPIENTRY gl_dispatch_stub_800(GLenum pname, const GLfloat * values); -void GLAPIENTRY gl_dispatch_stub_801(GLenum pname, GLint value); void GLAPIENTRY gl_dispatch_stub_821(GLuint index, GLenum pname, GLdouble * params); void GLAPIENTRY gl_dispatch_stub_822(GLuint index, GLdouble x); void GLAPIENTRY gl_dispatch_stub_823(GLuint index, const GLdouble * v); @@ -2358,282 +2380,286 @@ void GLAPIENTRY gl_dispatch_stub_890(GLenum target, GLenum internalformat, GLenum pname, GLsizei bufSize, GLint64 * params); GLint GLAPIENTRY gl_dispatch_stub_896(GLuint program, GLenum programInterface, const GLchar * name); void GLAPIENTRY gl_dispatch_stub_899(GLuint program, GLuint shaderStorageBlockIndex, GLuint shaderStorageBlockBinding); -void GLAPIENTRY gl_dispatch_stub_912(GLenum mode, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); -void GLAPIENTRY gl_dispatch_stub_913(GLenum mode, GLenum type, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); -void GLAPIENTRY gl_dispatch_stub_914(GLenum origin, GLenum depth); -void GLAPIENTRY gl_dispatch_stub_915(GLuint unit, GLuint texture); -void GLAPIENTRY gl_dispatch_stub_916(GLuint readFramebuffer, GLuint drawFramebuffer, GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter); -GLenum GLAPIENTRY gl_dispatch_stub_917(GLuint framebuffer, GLenum target); -void GLAPIENTRY gl_dispatch_stub_918(GLuint buffer, GLenum internalformat, GLenum format, GLenum type, const GLvoid * data); -void GLAPIENTRY gl_dispatch_stub_919(GLuint buffer, GLenum internalformat, GLintptr offset, GLsizeiptr size, GLenum format, GLenum type, const GLvoid * data); -void GLAPIENTRY gl_dispatch_stub_920(GLuint framebuffer, GLenum buffer, GLint drawbuffer, GLfloat depth, GLint stencil); -void GLAPIENTRY gl_dispatch_stub_921(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLfloat * value); -void GLAPIENTRY gl_dispatch_stub_922(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLint * value); -void GLAPIENTRY gl_dispatch_stub_923(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLuint * value); -void GLAPIENTRY gl_dispatch_stub_924(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLsizei imageSize, const GLvoid * data); -void GLAPIENTRY gl_dispatch_stub_925(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const GLvoid * data); -void GLAPIENTRY gl_dispatch_stub_926(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid * data); -void GLAPIENTRY gl_dispatch_stub_927(GLuint readBuffer, GLuint writeBuffer, GLintptr readOffset, GLintptr writeOffset, GLsizeiptr size); -void GLAPIENTRY gl_dispatch_stub_928(GLuint texture, GLint level, GLint xoffset, GLint x, GLint y, GLsizei width); -void GLAPIENTRY gl_dispatch_stub_929(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height); -void GLAPIENTRY gl_dispatch_stub_930(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height); -void GLAPIENTRY gl_dispatch_stub_931(GLsizei n, GLuint * buffers); -void GLAPIENTRY gl_dispatch_stub_932(GLsizei n, GLuint * framebuffers); -void GLAPIENTRY gl_dispatch_stub_933(GLsizei n, GLuint * pipelines); -void GLAPIENTRY gl_dispatch_stub_934(GLenum target, GLsizei n, GLuint * ids); -void GLAPIENTRY gl_dispatch_stub_935(GLsizei n, GLuint * renderbuffers); -void GLAPIENTRY gl_dispatch_stub_936(GLsizei n, GLuint * samplers); -void GLAPIENTRY gl_dispatch_stub_937(GLenum target, GLsizei n, GLuint * textures); -void GLAPIENTRY gl_dispatch_stub_938(GLsizei n, GLuint * ids); -void GLAPIENTRY gl_dispatch_stub_939(GLsizei n, GLuint * arrays); -void GLAPIENTRY gl_dispatch_stub_940(GLuint vaobj, GLuint index); +void GLAPIENTRY gl_dispatch_stub_912(GLuint num_groups_x, GLuint num_groups_y, GLuint num_groups_z, GLuint group_size_x, GLuint group_size_y, GLuint group_size_z); +void GLAPIENTRY gl_dispatch_stub_913(GLenum mode, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); +void GLAPIENTRY gl_dispatch_stub_914(GLenum mode, GLenum type, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); +void GLAPIENTRY gl_dispatch_stub_915(GLenum origin, GLenum depth); +void GLAPIENTRY gl_dispatch_stub_916(GLuint unit, GLuint texture); +void GLAPIENTRY gl_dispatch_stub_917(GLuint readFramebuffer, GLuint drawFramebuffer, GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter); +GLenum GLAPIENTRY gl_dispatch_stub_918(GLuint framebuffer, GLenum target); +void GLAPIENTRY gl_dispatch_stub_919(GLuint buffer, GLenum internalformat, GLenum format, GLenum type, const GLvoid * data); +void GLAPIENTRY gl_dispatch_stub_920(GLuint buffer, GLenum internalformat, GLintptr offset, GLsizeiptr size, GLenum format, GLenum type, const GLvoid * data); +void GLAPIENTRY gl_dispatch_stub_921(GLuint framebuffer, GLenum buffer, GLint drawbuffer, GLfloat depth, GLint stencil); +void GLAPIENTRY gl_dispatch_stub_922(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLfloat * value); +void GLAPIENTRY gl_dispatch_stub_923(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLint * value); +void GLAPIENTRY gl_dispatch_stub_924(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLuint * value); +void GLAPIENTRY gl_dispatch_stub_925(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLsizei imageSize, const GLvoid * data); +void GLAPIENTRY gl_dispatch_stub_926(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const GLvoid * data); +void GLAPIENTRY gl_dispatch_stub_927(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid * data); +void GLAPIENTRY gl_dispatch_stub_928(GLuint readBuffer, GLuint writeBuffer, GLintptr readOffset, GLintptr writeOffset, GLsizeiptr size); +void GLAPIENTRY gl_dispatch_stub_929(GLuint texture, GLint level, GLint xoffset, GLint x, GLint y, GLsizei width); +void GLAPIENTRY gl_dispatch_stub_930(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height); +void GLAPIENTRY gl_dispatch_stub_931(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height); +void GLAPIENTRY gl_dispatch_stub_932(GLsizei n, GLuint * buffers); +void GLAPIENTRY gl_dispatch_stub_933(GLsizei n, GLuint * framebuffers); +void GLAPIENTRY gl_dispatch_stub_934(GLsizei n, GLuint * pipelines); +void GLAPIENTRY gl_dispatch_stub_935(GLenum target, GLsizei n, GLuint * ids); +void GLAPIENTRY gl_dispatch_stub_936(GLsizei n, GLuint * renderbuffers); +void GLAPIENTRY gl_dispatch_stub_937(GLsizei n, GLuint * samplers); +void GLAPIENTRY gl_dispatch_stub_938(GLenum target, GLsizei n, GLuint * textures); +void GLAPIENTRY gl_dispatch_stub_939(GLsizei n, GLuint * ids); +void GLAPIENTRY gl_dispatch_stub_940(GLsizei n, GLuint * arrays); void GLAPIENTRY gl_dispatch_stub_941(GLuint vaobj, GLuint index); -void GLAPIENTRY gl_dispatch_stub_942(GLuint buffer, GLintptr offset, GLsizeiptr length); -void GLAPIENTRY gl_dispatch_stub_943(GLuint texture); -void GLAPIENTRY gl_dispatch_stub_944(GLuint texture, GLint level, GLsizei bufSize, GLvoid * pixels); -void GLAPIENTRY gl_dispatch_stub_945(GLuint buffer, GLenum pname, GLint64 * params); -void GLAPIENTRY gl_dispatch_stub_946(GLuint buffer, GLenum pname, GLint * params); -void GLAPIENTRY gl_dispatch_stub_947(GLuint buffer, GLenum pname, GLvoid ** params); -void GLAPIENTRY gl_dispatch_stub_948(GLuint buffer, GLintptr offset, GLsizeiptr size, GLvoid * data); -void GLAPIENTRY gl_dispatch_stub_949(GLuint framebuffer, GLenum attachment, GLenum pname, GLint * params); -void GLAPIENTRY gl_dispatch_stub_950(GLuint framebuffer, GLenum pname, GLint * param); -void GLAPIENTRY gl_dispatch_stub_951(GLuint renderbuffer, GLenum pname, GLint * params); -void GLAPIENTRY gl_dispatch_stub_952(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); +void GLAPIENTRY gl_dispatch_stub_942(GLuint vaobj, GLuint index); +void GLAPIENTRY gl_dispatch_stub_943(GLuint buffer, GLintptr offset, GLsizeiptr length); +void GLAPIENTRY gl_dispatch_stub_944(GLuint texture); +void GLAPIENTRY gl_dispatch_stub_945(GLuint texture, GLint level, GLsizei bufSize, GLvoid * pixels); +void GLAPIENTRY gl_dispatch_stub_946(GLuint buffer, GLenum pname, GLint64 * params); +void GLAPIENTRY gl_dispatch_stub_947(GLuint buffer, GLenum pname, GLint * params); +void GLAPIENTRY gl_dispatch_stub_948(GLuint buffer, GLenum pname, GLvoid ** params); +void GLAPIENTRY gl_dispatch_stub_949(GLuint buffer, GLintptr offset, GLsizeiptr size, GLvoid * data); +void GLAPIENTRY gl_dispatch_stub_950(GLuint framebuffer, GLenum attachment, GLenum pname, GLint * params); +void GLAPIENTRY gl_dispatch_stub_951(GLuint framebuffer, GLenum pname, GLint * param); +void GLAPIENTRY gl_dispatch_stub_952(GLuint renderbuffer, GLenum pname, GLint * params); void GLAPIENTRY gl_dispatch_stub_953(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); void GLAPIENTRY gl_dispatch_stub_954(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); void GLAPIENTRY gl_dispatch_stub_955(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); -void GLAPIENTRY gl_dispatch_stub_956(GLuint texture, GLint level, GLenum format, GLenum type, GLsizei bufSize, GLvoid * pixels); -void GLAPIENTRY gl_dispatch_stub_957(GLuint texture, GLint level, GLenum pname, GLfloat * params); -void GLAPIENTRY gl_dispatch_stub_958(GLuint texture, GLint level, GLenum pname, GLint * params); -void GLAPIENTRY gl_dispatch_stub_959(GLuint texture, GLenum pname, GLint * params); -void GLAPIENTRY gl_dispatch_stub_960(GLuint texture, GLenum pname, GLuint * params); -void GLAPIENTRY gl_dispatch_stub_961(GLuint texture, GLenum pname, GLfloat * params); -void GLAPIENTRY gl_dispatch_stub_962(GLuint texture, GLenum pname, GLint * params); -void GLAPIENTRY gl_dispatch_stub_963(GLuint xfb, GLenum pname, GLuint index, GLint64 * param); -void GLAPIENTRY gl_dispatch_stub_964(GLuint xfb, GLenum pname, GLuint index, GLint * param); -void GLAPIENTRY gl_dispatch_stub_965(GLuint xfb, GLenum pname, GLint * param); -void GLAPIENTRY gl_dispatch_stub_966(GLuint vaobj, GLuint index, GLenum pname, GLint64 * param); -void GLAPIENTRY gl_dispatch_stub_967(GLuint vaobj, GLuint index, GLenum pname, GLint * param); -void GLAPIENTRY gl_dispatch_stub_968(GLuint vaobj, GLenum pname, GLint * param); -void GLAPIENTRY gl_dispatch_stub_969(GLuint framebuffer, GLsizei numAttachments, const GLenum * attachments); -void GLAPIENTRY gl_dispatch_stub_970(GLuint framebuffer, GLsizei numAttachments, const GLenum * attachments, GLint x, GLint y, GLsizei width, GLsizei height); -GLvoid * GLAPIENTRY gl_dispatch_stub_971(GLuint buffer, GLenum access); -GLvoid * GLAPIENTRY gl_dispatch_stub_972(GLuint buffer, GLintptr offset, GLsizeiptr length, GLbitfield access); -void GLAPIENTRY gl_dispatch_stub_973(GLuint buffer, GLsizeiptr size, const GLvoid * data, GLenum usage); -void GLAPIENTRY gl_dispatch_stub_974(GLuint buffer, GLsizeiptr size, const GLvoid * data, GLbitfield flags); -void GLAPIENTRY gl_dispatch_stub_975(GLuint buffer, GLintptr offset, GLsizeiptr size, const GLvoid * data); -void GLAPIENTRY gl_dispatch_stub_976(GLuint framebuffer, GLenum buf); -void GLAPIENTRY gl_dispatch_stub_977(GLuint framebuffer, GLsizei n, const GLenum * bufs); -void GLAPIENTRY gl_dispatch_stub_978(GLuint framebuffer, GLenum pname, GLint param); -void GLAPIENTRY gl_dispatch_stub_979(GLuint framebuffer, GLenum buf); -void GLAPIENTRY gl_dispatch_stub_980(GLuint framebuffer, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer); -void GLAPIENTRY gl_dispatch_stub_981(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level); -void GLAPIENTRY gl_dispatch_stub_982(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level, GLint layer); -void GLAPIENTRY gl_dispatch_stub_983(GLuint renderbuffer, GLenum internalformat, GLsizei width, GLsizei height); -void GLAPIENTRY gl_dispatch_stub_984(GLuint renderbuffer, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height); -void GLAPIENTRY gl_dispatch_stub_985(GLuint texture, GLenum internalformat, GLuint buffer); -void GLAPIENTRY gl_dispatch_stub_986(GLuint texture, GLenum internalformat, GLuint buffer, GLintptr offset, GLsizeiptr size); -void GLAPIENTRY gl_dispatch_stub_987(GLuint texture, GLenum pname, const GLint * params); -void GLAPIENTRY gl_dispatch_stub_988(GLuint texture, GLenum pname, const GLuint * params); -void GLAPIENTRY gl_dispatch_stub_989(GLuint texture, GLenum pname, GLfloat param); -void GLAPIENTRY gl_dispatch_stub_990(GLuint texture, GLenum pname, const GLfloat * param); -void GLAPIENTRY gl_dispatch_stub_991(GLuint texture, GLenum pname, GLint param); -void GLAPIENTRY gl_dispatch_stub_992(GLuint texture, GLenum pname, const GLint * param); -void GLAPIENTRY gl_dispatch_stub_993(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width); -void GLAPIENTRY gl_dispatch_stub_994(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height); -void GLAPIENTRY gl_dispatch_stub_995(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations); -void GLAPIENTRY gl_dispatch_stub_996(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth); -void GLAPIENTRY gl_dispatch_stub_997(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedsamplelocations); -void GLAPIENTRY gl_dispatch_stub_998(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLenum type, const GLvoid * pixels); -void GLAPIENTRY gl_dispatch_stub_999(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid * pixels); -void GLAPIENTRY gl_dispatch_stub_1000(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid * pixels); -void GLAPIENTRY gl_dispatch_stub_1001(GLuint xfb, GLuint index, GLuint buffer); -void GLAPIENTRY gl_dispatch_stub_1002(GLuint xfb, GLuint index, GLuint buffer, GLintptr offset, GLsizeiptr size); -GLboolean GLAPIENTRY gl_dispatch_stub_1003(GLuint buffer); -void GLAPIENTRY gl_dispatch_stub_1004(GLuint vaobj, GLuint attribindex, GLuint bindingindex); -void GLAPIENTRY gl_dispatch_stub_1005(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLboolean normalized, GLuint relativeoffset); -void GLAPIENTRY gl_dispatch_stub_1006(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset); +void GLAPIENTRY gl_dispatch_stub_956(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); +void GLAPIENTRY gl_dispatch_stub_957(GLuint texture, GLint level, GLenum format, GLenum type, GLsizei bufSize, GLvoid * pixels); +void GLAPIENTRY gl_dispatch_stub_958(GLuint texture, GLint level, GLenum pname, GLfloat * params); +void GLAPIENTRY gl_dispatch_stub_959(GLuint texture, GLint level, GLenum pname, GLint * params); +void GLAPIENTRY gl_dispatch_stub_960(GLuint texture, GLenum pname, GLint * params); +void GLAPIENTRY gl_dispatch_stub_961(GLuint texture, GLenum pname, GLuint * params); +void GLAPIENTRY gl_dispatch_stub_962(GLuint texture, GLenum pname, GLfloat * params); +void GLAPIENTRY gl_dispatch_stub_963(GLuint texture, GLenum pname, GLint * params); +void GLAPIENTRY gl_dispatch_stub_964(GLuint xfb, GLenum pname, GLuint index, GLint64 * param); +void GLAPIENTRY gl_dispatch_stub_965(GLuint xfb, GLenum pname, GLuint index, GLint * param); +void GLAPIENTRY gl_dispatch_stub_966(GLuint xfb, GLenum pname, GLint * param); +void GLAPIENTRY gl_dispatch_stub_967(GLuint vaobj, GLuint index, GLenum pname, GLint64 * param); +void GLAPIENTRY gl_dispatch_stub_968(GLuint vaobj, GLuint index, GLenum pname, GLint * param); +void GLAPIENTRY gl_dispatch_stub_969(GLuint vaobj, GLenum pname, GLint * param); +void GLAPIENTRY gl_dispatch_stub_970(GLuint framebuffer, GLsizei numAttachments, const GLenum * attachments); +void GLAPIENTRY gl_dispatch_stub_971(GLuint framebuffer, GLsizei numAttachments, const GLenum * attachments, GLint x, GLint y, GLsizei width, GLsizei height); +GLvoid * GLAPIENTRY gl_dispatch_stub_972(GLuint buffer, GLenum access); +GLvoid * GLAPIENTRY gl_dispatch_stub_973(GLuint buffer, GLintptr offset, GLsizeiptr length, GLbitfield access); +void GLAPIENTRY gl_dispatch_stub_974(GLuint buffer, GLsizeiptr size, const GLvoid * data, GLenum usage); +void GLAPIENTRY gl_dispatch_stub_975(GLuint buffer, GLsizeiptr size, const GLvoid * data, GLbitfield flags); +void GLAPIENTRY gl_dispatch_stub_976(GLuint buffer, GLintptr offset, GLsizeiptr size, const GLvoid * data); +void GLAPIENTRY gl_dispatch_stub_977(GLuint framebuffer, GLenum buf); +void GLAPIENTRY gl_dispatch_stub_978(GLuint framebuffer, GLsizei n, const GLenum * bufs); +void GLAPIENTRY gl_dispatch_stub_979(GLuint framebuffer, GLenum pname, GLint param); +void GLAPIENTRY gl_dispatch_stub_980(GLuint framebuffer, GLenum buf); +void GLAPIENTRY gl_dispatch_stub_981(GLuint framebuffer, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer); +void GLAPIENTRY gl_dispatch_stub_982(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level); +void GLAPIENTRY gl_dispatch_stub_983(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level, GLint layer); +void GLAPIENTRY gl_dispatch_stub_984(GLuint renderbuffer, GLenum internalformat, GLsizei width, GLsizei height); +void GLAPIENTRY gl_dispatch_stub_985(GLuint renderbuffer, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height); +void GLAPIENTRY gl_dispatch_stub_986(GLuint texture, GLenum internalformat, GLuint buffer); +void GLAPIENTRY gl_dispatch_stub_987(GLuint texture, GLenum internalformat, GLuint buffer, GLintptr offset, GLsizeiptr size); +void GLAPIENTRY gl_dispatch_stub_988(GLuint texture, GLenum pname, const GLint * params); +void GLAPIENTRY gl_dispatch_stub_989(GLuint texture, GLenum pname, const GLuint * params); +void GLAPIENTRY gl_dispatch_stub_990(GLuint texture, GLenum pname, GLfloat param); +void GLAPIENTRY gl_dispatch_stub_991(GLuint texture, GLenum pname, const GLfloat * param); +void GLAPIENTRY gl_dispatch_stub_992(GLuint texture, GLenum pname, GLint param); +void GLAPIENTRY gl_dispatch_stub_993(GLuint texture, GLenum pname, const GLint * param); +void GLAPIENTRY gl_dispatch_stub_994(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width); +void GLAPIENTRY gl_dispatch_stub_995(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height); +void GLAPIENTRY gl_dispatch_stub_996(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations); +void GLAPIENTRY gl_dispatch_stub_997(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth); +void GLAPIENTRY gl_dispatch_stub_998(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedsamplelocations); +void GLAPIENTRY gl_dispatch_stub_999(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLenum type, const GLvoid * pixels); +void GLAPIENTRY gl_dispatch_stub_1000(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid * pixels); +void GLAPIENTRY gl_dispatch_stub_1001(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid * pixels); +void GLAPIENTRY gl_dispatch_stub_1002(GLuint xfb, GLuint index, GLuint buffer); +void GLAPIENTRY gl_dispatch_stub_1003(GLuint xfb, GLuint index, GLuint buffer, GLintptr offset, GLsizeiptr size); +GLboolean GLAPIENTRY gl_dispatch_stub_1004(GLuint buffer); +void GLAPIENTRY gl_dispatch_stub_1005(GLuint vaobj, GLuint attribindex, GLuint bindingindex); +void GLAPIENTRY gl_dispatch_stub_1006(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLboolean normalized, GLuint relativeoffset); void GLAPIENTRY gl_dispatch_stub_1007(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset); -void GLAPIENTRY gl_dispatch_stub_1008(GLuint vaobj, GLuint bindingindex, GLuint divisor); -void GLAPIENTRY gl_dispatch_stub_1009(GLuint vaobj, GLuint buffer); -void GLAPIENTRY gl_dispatch_stub_1010(GLuint vaobj, GLuint bindingindex, GLuint buffer, GLintptr offset, GLsizei stride); -void GLAPIENTRY gl_dispatch_stub_1011(GLuint vaobj, GLuint first, GLsizei count, const GLuint * buffers, const GLintptr * offsets, const GLsizei * strides); -void GLAPIENTRY gl_dispatch_stub_1012(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLsizei bufSize, GLvoid * pixels); -void GLAPIENTRY gl_dispatch_stub_1013(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, GLsizei bufSize, GLvoid * pixels); -void GLAPIENTRY gl_dispatch_stub_1020(GLfloat factor, GLfloat bias); -void GLAPIENTRY gl_dispatch_stub_1021(GLfloat x, GLfloat y, GLfloat z, GLfloat width, GLfloat height); -void GLAPIENTRY gl_dispatch_stub_1022(const GLfloat * coords); -void GLAPIENTRY gl_dispatch_stub_1023(GLint x, GLint y, GLint z, GLint width, GLint height); -void GLAPIENTRY gl_dispatch_stub_1024(const GLint * coords); -void GLAPIENTRY gl_dispatch_stub_1025(GLshort x, GLshort y, GLshort z, GLshort width, GLshort height); -void GLAPIENTRY gl_dispatch_stub_1026(const GLshort * coords); -void GLAPIENTRY gl_dispatch_stub_1027(GLfixed x, GLfixed y, GLfixed z, GLfixed width, GLfixed height); -void GLAPIENTRY gl_dispatch_stub_1028(const GLfixed * coords); -GLbitfield GLAPIENTRY gl_dispatch_stub_1030(GLfixed * mantissa, GLint * exponent); -void GLAPIENTRY gl_dispatch_stub_1031(GLclampf value, GLboolean invert); -void GLAPIENTRY gl_dispatch_stub_1032(GLenum pattern); -void GLAPIENTRY gl_dispatch_stub_1039(GLenum target, GLsizei numAttachments, const GLenum * attachments); -void GLAPIENTRY gl_dispatch_stub_1049(GLuint program, GLint location, GLdouble x); -void GLAPIENTRY gl_dispatch_stub_1050(GLuint program, GLint location, GLsizei count, const GLdouble * value); -void GLAPIENTRY gl_dispatch_stub_1057(GLuint program, GLint location, GLdouble x, GLdouble y); -void GLAPIENTRY gl_dispatch_stub_1058(GLuint program, GLint location, GLsizei count, const GLdouble * value); -void GLAPIENTRY gl_dispatch_stub_1065(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z); -void GLAPIENTRY gl_dispatch_stub_1066(GLuint program, GLint location, GLsizei count, const GLdouble * value); -void GLAPIENTRY gl_dispatch_stub_1073(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z, GLdouble w); -void GLAPIENTRY gl_dispatch_stub_1074(GLuint program, GLint location, GLsizei count, const GLdouble * value); -void GLAPIENTRY gl_dispatch_stub_1081(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); -void GLAPIENTRY gl_dispatch_stub_1083(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); -void GLAPIENTRY gl_dispatch_stub_1085(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); -void GLAPIENTRY gl_dispatch_stub_1087(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); -void GLAPIENTRY gl_dispatch_stub_1089(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); -void GLAPIENTRY gl_dispatch_stub_1091(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); -void GLAPIENTRY gl_dispatch_stub_1093(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); -void GLAPIENTRY gl_dispatch_stub_1095(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); -void GLAPIENTRY gl_dispatch_stub_1097(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); -void GLAPIENTRY gl_dispatch_stub_1117(void); -void GLAPIENTRY gl_dispatch_stub_1118(GLdouble x, GLdouble y, GLdouble z, GLdouble w); -void GLAPIENTRY gl_dispatch_stub_1119(const GLdouble * v); -void GLAPIENTRY gl_dispatch_stub_1120(GLfloat x, GLfloat y, GLfloat z, GLfloat w); -void GLAPIENTRY gl_dispatch_stub_1121(const GLfloat * v); -void GLAPIENTRY gl_dispatch_stub_1122(GLint x, GLint y, GLint z, GLint w); -void GLAPIENTRY gl_dispatch_stub_1123(const GLint * v); -void GLAPIENTRY gl_dispatch_stub_1124(GLshort x, GLshort y, GLshort z, GLshort w); -void GLAPIENTRY gl_dispatch_stub_1125(const GLshort * v); -void GLAPIENTRY gl_dispatch_stub_1126(const GLenum * mode, const GLint * first, const GLsizei * count, GLsizei primcount, GLint modestride); -void GLAPIENTRY gl_dispatch_stub_1127(const GLenum * mode, const GLsizei * count, GLenum type, const GLvoid * const * indices, GLsizei primcount, GLint modestride); -GLboolean GLAPIENTRY gl_dispatch_stub_1128(GLsizei n, const GLuint * ids, GLboolean * residences); -void GLAPIENTRY gl_dispatch_stub_1129(GLenum target, GLuint id, const GLfloat * params); -void GLAPIENTRY gl_dispatch_stub_1130(GLenum target, GLuint index, GLenum pname, GLdouble * params); -void GLAPIENTRY gl_dispatch_stub_1131(GLenum target, GLuint index, GLenum pname, GLfloat * params); -void GLAPIENTRY gl_dispatch_stub_1132(GLuint id, GLenum pname, GLubyte * program); -void GLAPIENTRY gl_dispatch_stub_1133(GLuint id, GLenum pname, GLint * params); -void GLAPIENTRY gl_dispatch_stub_1134(GLenum target, GLuint address, GLenum pname, GLint * params); -void GLAPIENTRY gl_dispatch_stub_1135(GLuint index, GLenum pname, GLdouble * params); -void GLAPIENTRY gl_dispatch_stub_1136(GLuint index, GLenum pname, GLfloat * params); -void GLAPIENTRY gl_dispatch_stub_1137(GLuint index, GLenum pname, GLint * params); -void GLAPIENTRY gl_dispatch_stub_1138(GLenum target, GLuint id, GLsizei len, const GLubyte * program); -void GLAPIENTRY gl_dispatch_stub_1139(GLenum target, GLuint index, GLsizei num, const GLdouble * params); -void GLAPIENTRY gl_dispatch_stub_1140(GLenum target, GLuint index, GLsizei num, const GLfloat * params); -void GLAPIENTRY gl_dispatch_stub_1141(GLsizei n, const GLuint * ids); -void GLAPIENTRY gl_dispatch_stub_1142(GLenum target, GLuint address, GLenum matrix, GLenum transform); -void GLAPIENTRY gl_dispatch_stub_1143(GLuint index, GLdouble x); -void GLAPIENTRY gl_dispatch_stub_1144(GLuint index, const GLdouble * v); -void GLAPIENTRY gl_dispatch_stub_1145(GLuint index, GLfloat x); -void GLAPIENTRY gl_dispatch_stub_1146(GLuint index, const GLfloat * v); -void GLAPIENTRY gl_dispatch_stub_1147(GLuint index, GLshort x); -void GLAPIENTRY gl_dispatch_stub_1148(GLuint index, const GLshort * v); -void GLAPIENTRY gl_dispatch_stub_1149(GLuint index, GLdouble x, GLdouble y); -void GLAPIENTRY gl_dispatch_stub_1150(GLuint index, const GLdouble * v); -void GLAPIENTRY gl_dispatch_stub_1151(GLuint index, GLfloat x, GLfloat y); -void GLAPIENTRY gl_dispatch_stub_1152(GLuint index, const GLfloat * v); -void GLAPIENTRY gl_dispatch_stub_1153(GLuint index, GLshort x, GLshort y); -void GLAPIENTRY gl_dispatch_stub_1154(GLuint index, const GLshort * v); -void GLAPIENTRY gl_dispatch_stub_1155(GLuint index, GLdouble x, GLdouble y, GLdouble z); -void GLAPIENTRY gl_dispatch_stub_1156(GLuint index, const GLdouble * v); -void GLAPIENTRY gl_dispatch_stub_1157(GLuint index, GLfloat x, GLfloat y, GLfloat z); -void GLAPIENTRY gl_dispatch_stub_1158(GLuint index, const GLfloat * v); -void GLAPIENTRY gl_dispatch_stub_1159(GLuint index, GLshort x, GLshort y, GLshort z); -void GLAPIENTRY gl_dispatch_stub_1160(GLuint index, const GLshort * v); -void GLAPIENTRY gl_dispatch_stub_1161(GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w); -void GLAPIENTRY gl_dispatch_stub_1162(GLuint index, const GLdouble * v); -void GLAPIENTRY gl_dispatch_stub_1163(GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w); -void GLAPIENTRY gl_dispatch_stub_1164(GLuint index, const GLfloat * v); -void GLAPIENTRY gl_dispatch_stub_1165(GLuint index, GLshort x, GLshort y, GLshort z, GLshort w); -void GLAPIENTRY gl_dispatch_stub_1166(GLuint index, const GLshort * v); -void GLAPIENTRY gl_dispatch_stub_1167(GLuint index, GLubyte x, GLubyte y, GLubyte z, GLubyte w); -void GLAPIENTRY gl_dispatch_stub_1168(GLuint index, const GLubyte * v); -void GLAPIENTRY gl_dispatch_stub_1169(GLuint index, GLint size, GLenum type, GLsizei stride, const GLvoid * pointer); -void GLAPIENTRY gl_dispatch_stub_1170(GLuint index, GLsizei n, const GLdouble * v); -void GLAPIENTRY gl_dispatch_stub_1171(GLuint index, GLsizei n, const GLfloat * v); -void GLAPIENTRY gl_dispatch_stub_1172(GLuint index, GLsizei n, const GLshort * v); -void GLAPIENTRY gl_dispatch_stub_1173(GLuint index, GLsizei n, const GLdouble * v); -void GLAPIENTRY gl_dispatch_stub_1174(GLuint index, GLsizei n, const GLfloat * v); -void GLAPIENTRY gl_dispatch_stub_1175(GLuint index, GLsizei n, const GLshort * v); -void GLAPIENTRY gl_dispatch_stub_1176(GLuint index, GLsizei n, const GLdouble * v); -void GLAPIENTRY gl_dispatch_stub_1177(GLuint index, GLsizei n, const GLfloat * v); -void GLAPIENTRY gl_dispatch_stub_1178(GLuint index, GLsizei n, const GLshort * v); -void GLAPIENTRY gl_dispatch_stub_1179(GLuint index, GLsizei n, const GLdouble * v); -void GLAPIENTRY gl_dispatch_stub_1180(GLuint index, GLsizei n, const GLfloat * v); -void GLAPIENTRY gl_dispatch_stub_1181(GLuint index, GLsizei n, const GLshort * v); -void GLAPIENTRY gl_dispatch_stub_1182(GLuint index, GLsizei n, const GLubyte * v); -void GLAPIENTRY gl_dispatch_stub_1183(GLenum pname, GLfloat * param); -void GLAPIENTRY gl_dispatch_stub_1184(GLenum pname, GLint * param); -void GLAPIENTRY gl_dispatch_stub_1185(GLenum pname, const GLfloat * param); -void GLAPIENTRY gl_dispatch_stub_1186(GLenum pname, const GLint * param); -void GLAPIENTRY gl_dispatch_stub_1187(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); -void GLAPIENTRY gl_dispatch_stub_1188(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); -void GLAPIENTRY gl_dispatch_stub_1189(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); -void GLAPIENTRY gl_dispatch_stub_1190(void); -void GLAPIENTRY gl_dispatch_stub_1191(GLuint id); -void GLAPIENTRY gl_dispatch_stub_1192(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); -void GLAPIENTRY gl_dispatch_stub_1193(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); -void GLAPIENTRY gl_dispatch_stub_1194(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); -void GLAPIENTRY gl_dispatch_stub_1195(GLuint id); -void GLAPIENTRY gl_dispatch_stub_1196(void); -GLuint GLAPIENTRY gl_dispatch_stub_1197(GLuint range); -void GLAPIENTRY gl_dispatch_stub_1198(GLuint dst, GLuint coord, GLenum swizzle); -void GLAPIENTRY gl_dispatch_stub_1199(GLuint dst, GLuint interp, GLenum swizzle); -void GLAPIENTRY gl_dispatch_stub_1200(GLuint dst, const GLfloat * value); -void GLAPIENTRY gl_dispatch_stub_1201(GLenum face); -void GLAPIENTRY gl_dispatch_stub_1202(GLuint array); -void GLAPIENTRY gl_dispatch_stub_1203(GLsizei n, GLuint * arrays); -void GLAPIENTRY gl_dispatch_stub_1204(GLuint id, GLsizei len, const GLubyte * name, GLdouble * params); -void GLAPIENTRY gl_dispatch_stub_1205(GLuint id, GLsizei len, const GLubyte * name, GLfloat * params); -void GLAPIENTRY gl_dispatch_stub_1206(GLuint id, GLsizei len, const GLubyte * name, GLdouble x, GLdouble y, GLdouble z, GLdouble w); -void GLAPIENTRY gl_dispatch_stub_1207(GLuint id, GLsizei len, const GLubyte * name, const GLdouble * v); -void GLAPIENTRY gl_dispatch_stub_1208(GLuint id, GLsizei len, const GLubyte * name, GLfloat x, GLfloat y, GLfloat z, GLfloat w); -void GLAPIENTRY gl_dispatch_stub_1209(GLuint id, GLsizei len, const GLubyte * name, const GLfloat * v); -void GLAPIENTRY gl_dispatch_stub_1211(GLenum coord, GLenum pname, GLfixed * params); -void GLAPIENTRY gl_dispatch_stub_1212(GLenum coord, GLenum pname, GLint param); -void GLAPIENTRY gl_dispatch_stub_1213(GLenum coord, GLenum pname, const GLfixed * params); -void GLAPIENTRY gl_dispatch_stub_1214(GLclampd zmin, GLclampd zmax); -void GLAPIENTRY gl_dispatch_stub_1217(GLsizei len, const GLvoid * string); -void GLAPIENTRY gl_dispatch_stub_1218(GLenum target, GLenum pname, GLint param); -void GLAPIENTRY gl_dispatch_stub_1219(GLenum target, GLintptr offset, GLsizeiptr size); -void GLAPIENTRY gl_dispatch_stub_1236(GLenum target, GLuint index, GLuint buffer, GLintptr offset); -void GLAPIENTRY gl_dispatch_stub_1237(GLuint monitor); -void GLAPIENTRY gl_dispatch_stub_1238(GLsizei n, GLuint * monitors); -void GLAPIENTRY gl_dispatch_stub_1239(GLuint monitor); -void GLAPIENTRY gl_dispatch_stub_1240(GLsizei n, GLuint * monitors); -void GLAPIENTRY gl_dispatch_stub_1241(GLuint monitor, GLenum pname, GLsizei dataSize, GLuint * data, GLint * bytesWritten); -void GLAPIENTRY gl_dispatch_stub_1242(GLuint group, GLuint counter, GLenum pname, GLvoid * data); -void GLAPIENTRY gl_dispatch_stub_1243(GLuint group, GLuint counter, GLsizei bufSize, GLsizei * length, GLchar * counterString); -void GLAPIENTRY gl_dispatch_stub_1244(GLuint group, GLint * numCounters, GLint * maxActiveCounters, GLsizei countersSize, GLuint * counters); -void GLAPIENTRY gl_dispatch_stub_1245(GLuint group, GLsizei bufSize, GLsizei * length, GLchar * groupString); -void GLAPIENTRY gl_dispatch_stub_1246(GLint * numGroups, GLsizei groupsSize, GLuint * groups); -void GLAPIENTRY gl_dispatch_stub_1247(GLuint monitor, GLboolean enable, GLuint group, GLint numCounters, GLuint * counterList); -void GLAPIENTRY gl_dispatch_stub_1248(GLenum objectType, GLuint name, GLenum pname, GLint * value); -GLenum GLAPIENTRY gl_dispatch_stub_1249(GLenum objectType, GLuint name, GLenum option); -GLenum GLAPIENTRY gl_dispatch_stub_1250(GLenum objectType, GLuint name, GLenum option); -void GLAPIENTRY gl_dispatch_stub_1251(GLuint program); -GLuint GLAPIENTRY gl_dispatch_stub_1252(GLenum type, const GLchar * string); -void GLAPIENTRY gl_dispatch_stub_1253(GLenum type, GLuint program); -void GLAPIENTRY gl_dispatch_stub_1255(void); -void GLAPIENTRY gl_dispatch_stub_1256(GLintptr surface, GLenum pname, GLsizei bufSize, GLsizei * length, GLint * values); -void GLAPIENTRY gl_dispatch_stub_1257(const GLvoid * vdpDevice, const GLvoid * getProcAddress); -GLboolean GLAPIENTRY gl_dispatch_stub_1258(GLintptr surface); -void GLAPIENTRY gl_dispatch_stub_1259(GLsizei numSurfaces, const GLintptr * surfaces); -GLintptr GLAPIENTRY gl_dispatch_stub_1260(const GLvoid * vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint * textureNames); -GLintptr GLAPIENTRY gl_dispatch_stub_1261(const GLvoid * vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint * textureNames); -void GLAPIENTRY gl_dispatch_stub_1262(GLintptr surface, GLenum access); -void GLAPIENTRY gl_dispatch_stub_1263(GLsizei numSurfaces, const GLintptr * surfaces); -void GLAPIENTRY gl_dispatch_stub_1264(GLintptr surface); -void GLAPIENTRY gl_dispatch_stub_1265(GLuint queryHandle); -void GLAPIENTRY gl_dispatch_stub_1266(GLuint queryId, GLuint * queryHandle); -void GLAPIENTRY gl_dispatch_stub_1267(GLuint queryHandle); +void GLAPIENTRY gl_dispatch_stub_1008(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset); +void GLAPIENTRY gl_dispatch_stub_1009(GLuint vaobj, GLuint bindingindex, GLuint divisor); +void GLAPIENTRY gl_dispatch_stub_1010(GLuint vaobj, GLuint buffer); +void GLAPIENTRY gl_dispatch_stub_1011(GLuint vaobj, GLuint bindingindex, GLuint buffer, GLintptr offset, GLsizei stride); +void GLAPIENTRY gl_dispatch_stub_1012(GLuint vaobj, GLuint first, GLsizei count, const GLuint * buffers, const GLintptr * offsets, const GLsizei * strides); +void GLAPIENTRY gl_dispatch_stub_1013(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLsizei bufSize, GLvoid * pixels); +void GLAPIENTRY gl_dispatch_stub_1014(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, GLsizei bufSize, GLvoid * pixels); +void GLAPIENTRY gl_dispatch_stub_1021(GLfloat factor, GLfloat bias); +void GLAPIENTRY gl_dispatch_stub_1022(GLfloat x, GLfloat y, GLfloat z, GLfloat width, GLfloat height); +void GLAPIENTRY gl_dispatch_stub_1023(const GLfloat * coords); +void GLAPIENTRY gl_dispatch_stub_1024(GLint x, GLint y, GLint z, GLint width, GLint height); +void GLAPIENTRY gl_dispatch_stub_1025(const GLint * coords); +void GLAPIENTRY gl_dispatch_stub_1026(GLshort x, GLshort y, GLshort z, GLshort width, GLshort height); +void GLAPIENTRY gl_dispatch_stub_1027(const GLshort * coords); +void GLAPIENTRY gl_dispatch_stub_1028(GLfixed x, GLfixed y, GLfixed z, GLfixed width, GLfixed height); +void GLAPIENTRY gl_dispatch_stub_1029(const GLfixed * coords); +GLbitfield GLAPIENTRY gl_dispatch_stub_1031(GLfixed * mantissa, GLint * exponent); +void GLAPIENTRY gl_dispatch_stub_1032(GLclampf value, GLboolean invert); +void GLAPIENTRY gl_dispatch_stub_1033(GLenum pattern); +void GLAPIENTRY gl_dispatch_stub_1040(GLenum target, GLsizei numAttachments, const GLenum * attachments); +void GLAPIENTRY gl_dispatch_stub_1050(GLuint program, GLint location, GLdouble x); +void GLAPIENTRY gl_dispatch_stub_1051(GLuint program, GLint location, GLsizei count, const GLdouble * value); +void GLAPIENTRY gl_dispatch_stub_1058(GLuint program, GLint location, GLdouble x, GLdouble y); +void GLAPIENTRY gl_dispatch_stub_1059(GLuint program, GLint location, GLsizei count, const GLdouble * value); +void GLAPIENTRY gl_dispatch_stub_1066(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z); +void GLAPIENTRY gl_dispatch_stub_1067(GLuint program, GLint location, GLsizei count, const GLdouble * value); +void GLAPIENTRY gl_dispatch_stub_1074(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z, GLdouble w); +void GLAPIENTRY gl_dispatch_stub_1075(GLuint program, GLint location, GLsizei count, const GLdouble * value); +void GLAPIENTRY gl_dispatch_stub_1082(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); +void GLAPIENTRY gl_dispatch_stub_1084(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); +void GLAPIENTRY gl_dispatch_stub_1086(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); +void GLAPIENTRY gl_dispatch_stub_1088(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); +void GLAPIENTRY gl_dispatch_stub_1090(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); +void GLAPIENTRY gl_dispatch_stub_1092(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); +void GLAPIENTRY gl_dispatch_stub_1094(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); +void GLAPIENTRY gl_dispatch_stub_1096(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); +void GLAPIENTRY gl_dispatch_stub_1098(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value); +void GLAPIENTRY gl_dispatch_stub_1118(void); +void GLAPIENTRY gl_dispatch_stub_1119(GLdouble x, GLdouble y, GLdouble z, GLdouble w); +void GLAPIENTRY gl_dispatch_stub_1120(const GLdouble * v); +void GLAPIENTRY gl_dispatch_stub_1121(GLfloat x, GLfloat y, GLfloat z, GLfloat w); +void GLAPIENTRY gl_dispatch_stub_1122(const GLfloat * v); +void GLAPIENTRY gl_dispatch_stub_1123(GLint x, GLint y, GLint z, GLint w); +void GLAPIENTRY gl_dispatch_stub_1124(const GLint * v); +void GLAPIENTRY gl_dispatch_stub_1125(GLshort x, GLshort y, GLshort z, GLshort w); +void GLAPIENTRY gl_dispatch_stub_1126(const GLshort * v); +void GLAPIENTRY gl_dispatch_stub_1127(const GLenum * mode, const GLint * first, const GLsizei * count, GLsizei primcount, GLint modestride); +void GLAPIENTRY gl_dispatch_stub_1128(const GLenum * mode, const GLsizei * count, GLenum type, const GLvoid * const * indices, GLsizei primcount, GLint modestride); +GLboolean GLAPIENTRY gl_dispatch_stub_1129(GLsizei n, const GLuint * ids, GLboolean * residences); +void GLAPIENTRY gl_dispatch_stub_1130(GLenum target, GLuint id, const GLfloat * params); +void GLAPIENTRY gl_dispatch_stub_1131(GLenum target, GLuint index, GLenum pname, GLdouble * params); +void GLAPIENTRY gl_dispatch_stub_1132(GLenum target, GLuint index, GLenum pname, GLfloat * params); +void GLAPIENTRY gl_dispatch_stub_1133(GLuint id, GLenum pname, GLubyte * program); +void GLAPIENTRY gl_dispatch_stub_1134(GLuint id, GLenum pname, GLint * params); +void GLAPIENTRY gl_dispatch_stub_1135(GLenum target, GLuint address, GLenum pname, GLint * params); +void GLAPIENTRY gl_dispatch_stub_1136(GLuint index, GLenum pname, GLdouble * params); +void GLAPIENTRY gl_dispatch_stub_1137(GLuint index, GLenum pname, GLfloat * params); +void GLAPIENTRY gl_dispatch_stub_1138(GLuint index, GLenum pname, GLint * params); +void GLAPIENTRY gl_dispatch_stub_1139(GLenum target, GLuint id, GLsizei len, const GLubyte * program); +void GLAPIENTRY gl_dispatch_stub_1140(GLenum target, GLuint index, GLsizei num, const GLdouble * params); +void GLAPIENTRY gl_dispatch_stub_1141(GLenum target, GLuint index, GLsizei num, const GLfloat * params); +void GLAPIENTRY gl_dispatch_stub_1142(GLsizei n, const GLuint * ids); +void GLAPIENTRY gl_dispatch_stub_1143(GLenum target, GLuint address, GLenum matrix, GLenum transform); +void GLAPIENTRY gl_dispatch_stub_1144(GLuint index, GLdouble x); +void GLAPIENTRY gl_dispatch_stub_1145(GLuint index, const GLdouble * v); +void GLAPIENTRY gl_dispatch_stub_1146(GLuint index, GLfloat x); +void GLAPIENTRY gl_dispatch_stub_1147(GLuint index, const GLfloat * v); +void GLAPIENTRY gl_dispatch_stub_1148(GLuint index, GLshort x); +void GLAPIENTRY gl_dispatch_stub_1149(GLuint index, const GLshort * v); +void GLAPIENTRY gl_dispatch_stub_1150(GLuint index, GLdouble x, GLdouble y); +void GLAPIENTRY gl_dispatch_stub_1151(GLuint index, const GLdouble * v); +void GLAPIENTRY gl_dispatch_stub_1152(GLuint index, GLfloat x, GLfloat y); +void GLAPIENTRY gl_dispatch_stub_1153(GLuint index, const GLfloat * v); +void GLAPIENTRY gl_dispatch_stub_1154(GLuint index, GLshort x, GLshort y); +void GLAPIENTRY gl_dispatch_stub_1155(GLuint index, const GLshort * v); +void GLAPIENTRY gl_dispatch_stub_1156(GLuint index, GLdouble x, GLdouble y, GLdouble z); +void GLAPIENTRY gl_dispatch_stub_1157(GLuint index, const GLdouble * v); +void GLAPIENTRY gl_dispatch_stub_1158(GLuint index, GLfloat x, GLfloat y, GLfloat z); +void GLAPIENTRY gl_dispatch_stub_1159(GLuint index, const GLfloat * v); +void GLAPIENTRY gl_dispatch_stub_1160(GLuint index, GLshort x, GLshort y, GLshort z); +void GLAPIENTRY gl_dispatch_stub_1161(GLuint index, const GLshort * v); +void GLAPIENTRY gl_dispatch_stub_1162(GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w); +void GLAPIENTRY gl_dispatch_stub_1163(GLuint index, const GLdouble * v); +void GLAPIENTRY gl_dispatch_stub_1164(GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w); +void GLAPIENTRY gl_dispatch_stub_1165(GLuint index, const GLfloat * v); +void GLAPIENTRY gl_dispatch_stub_1166(GLuint index, GLshort x, GLshort y, GLshort z, GLshort w); +void GLAPIENTRY gl_dispatch_stub_1167(GLuint index, const GLshort * v); +void GLAPIENTRY gl_dispatch_stub_1168(GLuint index, GLubyte x, GLubyte y, GLubyte z, GLubyte w); +void GLAPIENTRY gl_dispatch_stub_1169(GLuint index, const GLubyte * v); +void GLAPIENTRY gl_dispatch_stub_1170(GLuint index, GLint size, GLenum type, GLsizei stride, const GLvoid * pointer); +void GLAPIENTRY gl_dispatch_stub_1171(GLuint index, GLsizei n, const GLdouble * v); +void GLAPIENTRY gl_dispatch_stub_1172(GLuint index, GLsizei n, const GLfloat * v); +void GLAPIENTRY gl_dispatch_stub_1173(GLuint index, GLsizei n, const GLshort * v); +void GLAPIENTRY gl_dispatch_stub_1174(GLuint index, GLsizei n, const GLdouble * v); +void GLAPIENTRY gl_dispatch_stub_1175(GLuint index, GLsizei n, const GLfloat * v); +void GLAPIENTRY gl_dispatch_stub_1176(GLuint index, GLsizei n, const GLshort * v); +void GLAPIENTRY gl_dispatch_stub_1177(GLuint index, GLsizei n, const GLdouble * v); +void GLAPIENTRY gl_dispatch_stub_1178(GLuint index, GLsizei n, const GLfloat * v); +void GLAPIENTRY gl_dispatch_stub_1179(GLuint index, GLsizei n, const GLshort * v); +void GLAPIENTRY gl_dispatch_stub_1180(GLuint index, GLsizei n, const GLdouble * v); +void GLAPIENTRY gl_dispatch_stub_1181(GLuint index, GLsizei n, const GLfloat * v); +void GLAPIENTRY gl_dispatch_stub_1182(GLuint index, GLsizei n, const GLshort * v); +void GLAPIENTRY gl_dispatch_stub_1183(GLuint index, GLsizei n, const GLubyte * v); +void GLAPIENTRY gl_dispatch_stub_1184(GLenum pname, GLfloat * param); +void GLAPIENTRY gl_dispatch_stub_1185(GLenum pname, GLint * param); +void GLAPIENTRY gl_dispatch_stub_1186(GLenum pname, const GLfloat * param); +void GLAPIENTRY gl_dispatch_stub_1187(GLenum pname, const GLint * param); +void GLAPIENTRY gl_dispatch_stub_1188(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); +void GLAPIENTRY gl_dispatch_stub_1189(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); +void GLAPIENTRY gl_dispatch_stub_1190(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); +void GLAPIENTRY gl_dispatch_stub_1191(void); +void GLAPIENTRY gl_dispatch_stub_1192(GLuint id); +void GLAPIENTRY gl_dispatch_stub_1193(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); +void GLAPIENTRY gl_dispatch_stub_1194(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); +void GLAPIENTRY gl_dispatch_stub_1195(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); +void GLAPIENTRY gl_dispatch_stub_1196(GLuint id); +void GLAPIENTRY gl_dispatch_stub_1197(void); +GLuint GLAPIENTRY gl_dispatch_stub_1198(GLuint range); +void GLAPIENTRY gl_dispatch_stub_1199(GLuint dst, GLuint coord, GLenum swizzle); +void GLAPIENTRY gl_dispatch_stub_1200(GLuint dst, GLuint interp, GLenum swizzle); +void GLAPIENTRY gl_dispatch_stub_1201(GLuint dst, const GLfloat * value); +void GLAPIENTRY gl_dispatch_stub_1202(GLuint first, GLsizei count, const GLfloat * v); +void GLAPIENTRY gl_dispatch_stub_1203(GLuint index, GLfloat n, GLfloat f); +void GLAPIENTRY gl_dispatch_stub_1204(GLenum face); +void GLAPIENTRY gl_dispatch_stub_1205(GLuint array); +void GLAPIENTRY gl_dispatch_stub_1206(GLsizei n, GLuint * arrays); +void GLAPIENTRY gl_dispatch_stub_1207(GLuint id, GLsizei len, const GLubyte * name, GLdouble * params); +void GLAPIENTRY gl_dispatch_stub_1208(GLuint id, GLsizei len, const GLubyte * name, GLfloat * params); +void GLAPIENTRY gl_dispatch_stub_1209(GLuint id, GLsizei len, const GLubyte * name, GLdouble x, GLdouble y, GLdouble z, GLdouble w); +void GLAPIENTRY gl_dispatch_stub_1210(GLuint id, GLsizei len, const GLubyte * name, const GLdouble * v); +void GLAPIENTRY gl_dispatch_stub_1211(GLuint id, GLsizei len, const GLubyte * name, GLfloat x, GLfloat y, GLfloat z, GLfloat w); +void GLAPIENTRY gl_dispatch_stub_1212(GLuint id, GLsizei len, const GLubyte * name, const GLfloat * v); +void GLAPIENTRY gl_dispatch_stub_1214(GLenum coord, GLenum pname, GLfixed * params); +void GLAPIENTRY gl_dispatch_stub_1215(GLenum coord, GLenum pname, GLint param); +void GLAPIENTRY gl_dispatch_stub_1216(GLenum coord, GLenum pname, const GLfixed * params); +void GLAPIENTRY gl_dispatch_stub_1217(GLclampd zmin, GLclampd zmax); +void GLAPIENTRY gl_dispatch_stub_1220(GLsizei len, const GLvoid * string); +void GLAPIENTRY gl_dispatch_stub_1221(GLenum target, GLenum pname, GLint param); +void GLAPIENTRY gl_dispatch_stub_1222(GLenum target, GLintptr offset, GLsizeiptr size); +void GLAPIENTRY gl_dispatch_stub_1239(GLenum target, GLuint index, GLuint buffer, GLintptr offset); +void GLAPIENTRY gl_dispatch_stub_1240(GLuint monitor); +void GLAPIENTRY gl_dispatch_stub_1241(GLsizei n, GLuint * monitors); +void GLAPIENTRY gl_dispatch_stub_1242(GLuint monitor); +void GLAPIENTRY gl_dispatch_stub_1243(GLsizei n, GLuint * monitors); +void GLAPIENTRY gl_dispatch_stub_1244(GLuint monitor, GLenum pname, GLsizei dataSize, GLuint * data, GLint * bytesWritten); +void GLAPIENTRY gl_dispatch_stub_1245(GLuint group, GLuint counter, GLenum pname, GLvoid * data); +void GLAPIENTRY gl_dispatch_stub_1246(GLuint group, GLuint counter, GLsizei bufSize, GLsizei * length, GLchar * counterString); +void GLAPIENTRY gl_dispatch_stub_1247(GLuint group, GLint * numCounters, GLint * maxActiveCounters, GLsizei countersSize, GLuint * counters); +void GLAPIENTRY gl_dispatch_stub_1248(GLuint group, GLsizei bufSize, GLsizei * length, GLchar * groupString); +void GLAPIENTRY gl_dispatch_stub_1249(GLint * numGroups, GLsizei groupsSize, GLuint * groups); +void GLAPIENTRY gl_dispatch_stub_1250(GLuint monitor, GLboolean enable, GLuint group, GLint numCounters, GLuint * counterList); +void GLAPIENTRY gl_dispatch_stub_1251(GLenum objectType, GLuint name, GLenum pname, GLint * value); +GLenum GLAPIENTRY gl_dispatch_stub_1252(GLenum objectType, GLuint name, GLenum option); +GLenum GLAPIENTRY gl_dispatch_stub_1253(GLenum objectType, GLuint name, GLenum option); +void GLAPIENTRY gl_dispatch_stub_1254(GLuint program); +GLuint GLAPIENTRY gl_dispatch_stub_1255(GLenum type, const GLchar * string); +void GLAPIENTRY gl_dispatch_stub_1256(GLenum type, GLuint program); +void GLAPIENTRY gl_dispatch_stub_1258(void); +void GLAPIENTRY gl_dispatch_stub_1259(GLintptr surface, GLenum pname, GLsizei bufSize, GLsizei * length, GLint * values); +void GLAPIENTRY gl_dispatch_stub_1260(const GLvoid * vdpDevice, const GLvoid * getProcAddress); +GLboolean GLAPIENTRY gl_dispatch_stub_1261(GLintptr surface); +void GLAPIENTRY gl_dispatch_stub_1262(GLsizei numSurfaces, const GLintptr * surfaces); +GLintptr GLAPIENTRY gl_dispatch_stub_1263(const GLvoid * vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint * textureNames); +GLintptr GLAPIENTRY gl_dispatch_stub_1264(const GLvoid * vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint * textureNames); +void GLAPIENTRY gl_dispatch_stub_1265(GLintptr surface, GLenum access); +void GLAPIENTRY gl_dispatch_stub_1266(GLsizei numSurfaces, const GLintptr * surfaces); +void GLAPIENTRY gl_dispatch_stub_1267(GLintptr surface); void GLAPIENTRY gl_dispatch_stub_1268(GLuint queryHandle); -void GLAPIENTRY gl_dispatch_stub_1269(GLuint * queryId); -void GLAPIENTRY gl_dispatch_stub_1270(GLuint queryId, GLuint * nextQueryId); -void GLAPIENTRY gl_dispatch_stub_1271(GLuint queryId, GLuint counterId, GLuint counterNameLength, GLchar * counterName, GLuint counterDescLength, GLchar * counterDesc, GLuint * counterOffset, GLuint * counterDataSize, GLuint * counterTypeEnum, GLuint * counterDataTypeEnum, GLuint64 * rawCounterMaxValue); -void GLAPIENTRY gl_dispatch_stub_1272(GLuint queryHandle, GLuint flags, GLsizei dataSize, GLvoid * data, GLuint * bytesWritten); -void GLAPIENTRY gl_dispatch_stub_1273(GLchar * queryName, GLuint * queryId); -void GLAPIENTRY gl_dispatch_stub_1274(GLuint queryId, GLuint queryNameLength, GLchar * queryName, GLuint * dataSize, GLuint * noCounters, GLuint * noInstances, GLuint * capsMask); -void GLAPIENTRY gl_dispatch_stub_1275(GLfloat factor, GLfloat units, GLfloat clamp); -void GLAPIENTRY gl_dispatch_stub_1276(GLenum frontfunc, GLenum backfunc, GLint ref, GLuint mask); -void GLAPIENTRY gl_dispatch_stub_1277(GLenum target, GLuint index, GLsizei count, const GLfloat * params); -void GLAPIENTRY gl_dispatch_stub_1278(GLenum target, GLuint index, GLsizei count, const GLfloat * params); -void GLAPIENTRY gl_dispatch_stub_1279(GLenum target, GLvoid * writeOffset); -void GLAPIENTRY gl_dispatch_stub_1280(GLenum target, GLvoid * writeOffset); +void GLAPIENTRY gl_dispatch_stub_1269(GLuint queryId, GLuint * queryHandle); +void GLAPIENTRY gl_dispatch_stub_1270(GLuint queryHandle); +void GLAPIENTRY gl_dispatch_stub_1271(GLuint queryHandle); +void GLAPIENTRY gl_dispatch_stub_1272(GLuint * queryId); +void GLAPIENTRY gl_dispatch_stub_1273(GLuint queryId, GLuint * nextQueryId); +void GLAPIENTRY gl_dispatch_stub_1274(GLuint queryId, GLuint counterId, GLuint counterNameLength, GLchar * counterName, GLuint counterDescLength, GLchar * counterDesc, GLuint * counterOffset, GLuint * counterDataSize, GLuint * counterTypeEnum, GLuint * counterDataTypeEnum, GLuint64 * rawCounterMaxValue); +void GLAPIENTRY gl_dispatch_stub_1275(GLuint queryHandle, GLuint flags, GLsizei dataSize, GLvoid * data, GLuint * bytesWritten); +void GLAPIENTRY gl_dispatch_stub_1276(GLchar * queryName, GLuint * queryId); +void GLAPIENTRY gl_dispatch_stub_1277(GLuint queryId, GLuint queryNameLength, GLchar * queryName, GLuint * dataSize, GLuint * noCounters, GLuint * noInstances, GLuint * capsMask); +void GLAPIENTRY gl_dispatch_stub_1278(GLfloat factor, GLfloat units, GLfloat clamp); +void GLAPIENTRY gl_dispatch_stub_1279(GLenum mode, GLsizei count, const GLint * box); +void GLAPIENTRY gl_dispatch_stub_1280(GLenum frontfunc, GLenum backfunc, GLint ref, GLuint mask); +void GLAPIENTRY gl_dispatch_stub_1281(GLenum target, GLuint index, GLsizei count, const GLfloat * params); +void GLAPIENTRY gl_dispatch_stub_1282(GLenum target, GLuint index, GLsizei count, const GLfloat * params); +void GLAPIENTRY gl_dispatch_stub_1283(GLenum target, GLvoid * writeOffset); +void GLAPIENTRY gl_dispatch_stub_1284(GLenum target, GLvoid * writeOffset); /* OpenGL ES specific prototypes */ @@ -2785,6 +2811,16 @@ GLAPI void GLAPIENTRY glDeleteVertexArraysOES(GLsizei n, const GLuint * arrays); GLAPI void GLAPIENTRY glGenVertexArraysOES(GLsizei n, GLuint * arrays); GLAPI GLboolean GLAPIENTRY glIsVertexArrayOES(GLuint array); +/* category GL_OES_viewport_array */ +GLAPI void GLAPIENTRY glGetFloati_vOES(GLenum target, GLuint index, GLfloat * data); +GLAPI void GLAPIENTRY glScissorArrayvOES(GLuint first, GLsizei count, const int * v); +GLAPI void GLAPIENTRY glScissorIndexedOES(GLuint index, GLint left, GLint bottom, GLsizei width, GLsizei height); +GLAPI void GLAPIENTRY glScissorIndexedvOES(GLuint index, const GLint * v); +GLAPI void GLAPIENTRY glViewportArrayvOES(GLuint first, GLsizei count, const GLfloat * v); +GLAPI void GLAPIENTRY glViewportIndexedfOES(GLuint index, GLfloat x, GLfloat y, GLfloat w, GLfloat h); +GLAPI void GLAPIENTRY glViewportIndexedfvOES(GLuint index, const GLfloat * v); +GLAPI void GLAPIENTRY glDepthRangeArrayfvOES(GLuint first, GLsizei count, const GLfloat * v); +GLAPI void GLAPIENTRY glDepthRangeIndexedfOES(GLuint index, GLfloat n, GLfloat f); /* category es1.0 */ GLAPI void GLAPIENTRY glAlphaFuncx(GLenum func, GLclampx ref); GLAPI void GLAPIENTRY glClearColorx(GLclampx red, GLclampx green, GLclampx blue, GLclampx alpha); @@ -2830,6 +2866,9 @@ GLAPI void GLAPIENTRY glPointParameterx(GLenum pname, GLfixed param); GLAPI void GLAPIENTRY glPointParameterxv(GLenum pname, const GLfixed * params); GLAPI void GLAPIENTRY glTexParameterxv(GLenum target, GLenum pname, const GLfixed * params); +/* category es3.2 */ +GLAPI void GLAPIENTRY glBlendBarrier(void); +GLAPI void GLAPIENTRY glPrimitiveBoundingBox(GLfloat minX, GLfloat minY, GLfloat minZ, GLfloat minW, GLfloat maxX, GLfloat maxY, GLfloat maxZ, GLfloat maxW); #endif /* defined(NEED_FUNCTION_POINTER) || defined(GLX_INDIRECT_RENDERING) */ @@ -3635,7 +3674,7 @@ NAME_FUNC_OFFSET(13077, gl_dispatch_stub_798, gl_dispatch_stub_798, NULL, 798), NAME_FUNC_OFFSET(13103, gl_dispatch_stub_799, gl_dispatch_stub_799, NULL, 799), NAME_FUNC_OFFSET(13127, gl_dispatch_stub_800, gl_dispatch_stub_800, NULL, 800), - NAME_FUNC_OFFSET(13146, gl_dispatch_stub_801, gl_dispatch_stub_801, NULL, 801), + NAME_FUNC_OFFSET(13146, glPatchParameteri, glPatchParameteri, NULL, 801), NAME_FUNC_OFFSET(13164, glBindTransformFeedback, glBindTransformFeedback, NULL, 802), NAME_FUNC_OFFSET(13188, glDeleteTransformFeedbacks, glDeleteTransformFeedbacks, NULL, 803), NAME_FUNC_OFFSET(13215, glDrawTransformFeedback, glDrawTransformFeedback, NULL, 804), @@ -3747,999 +3786,1019 @@ NAME_FUNC_OFFSET(15491, glBindTextures, glBindTextures, NULL, 910), NAME_FUNC_OFFSET(15506, glBindVertexBuffers, glBindVertexBuffers, NULL, 911), NAME_FUNC_OFFSET(15526, gl_dispatch_stub_912, gl_dispatch_stub_912, NULL, 912), - NAME_FUNC_OFFSET(15560, gl_dispatch_stub_913, gl_dispatch_stub_913, NULL, 913), - NAME_FUNC_OFFSET(15596, gl_dispatch_stub_914, gl_dispatch_stub_914, NULL, 914), - NAME_FUNC_OFFSET(15610, gl_dispatch_stub_915, gl_dispatch_stub_915, NULL, 915), - NAME_FUNC_OFFSET(15628, gl_dispatch_stub_916, gl_dispatch_stub_916, NULL, 916), - NAME_FUNC_OFFSET(15651, gl_dispatch_stub_917, gl_dispatch_stub_917, NULL, 917), + NAME_FUNC_OFFSET(15556, gl_dispatch_stub_913, gl_dispatch_stub_913, NULL, 913), + NAME_FUNC_OFFSET(15590, gl_dispatch_stub_914, gl_dispatch_stub_914, NULL, 914), + NAME_FUNC_OFFSET(15626, gl_dispatch_stub_915, gl_dispatch_stub_915, NULL, 915), + NAME_FUNC_OFFSET(15640, gl_dispatch_stub_916, gl_dispatch_stub_916, NULL, 916), + NAME_FUNC_OFFSET(15658, gl_dispatch_stub_917, gl_dispatch_stub_917, NULL, 917), NAME_FUNC_OFFSET(15681, gl_dispatch_stub_918, gl_dispatch_stub_918, NULL, 918), - NAME_FUNC_OFFSET(15704, gl_dispatch_stub_919, gl_dispatch_stub_919, NULL, 919), - NAME_FUNC_OFFSET(15730, gl_dispatch_stub_920, gl_dispatch_stub_920, NULL, 920), - NAME_FUNC_OFFSET(15756, gl_dispatch_stub_921, gl_dispatch_stub_921, NULL, 921), - NAME_FUNC_OFFSET(15782, gl_dispatch_stub_922, gl_dispatch_stub_922, NULL, 922), - NAME_FUNC_OFFSET(15808, gl_dispatch_stub_923, gl_dispatch_stub_923, NULL, 923), - NAME_FUNC_OFFSET(15835, gl_dispatch_stub_924, gl_dispatch_stub_924, NULL, 924), + NAME_FUNC_OFFSET(15711, gl_dispatch_stub_919, gl_dispatch_stub_919, NULL, 919), + NAME_FUNC_OFFSET(15734, gl_dispatch_stub_920, gl_dispatch_stub_920, NULL, 920), + NAME_FUNC_OFFSET(15760, gl_dispatch_stub_921, gl_dispatch_stub_921, NULL, 921), + NAME_FUNC_OFFSET(15786, gl_dispatch_stub_922, gl_dispatch_stub_922, NULL, 922), + NAME_FUNC_OFFSET(15812, gl_dispatch_stub_923, gl_dispatch_stub_923, NULL, 923), + NAME_FUNC_OFFSET(15838, gl_dispatch_stub_924, gl_dispatch_stub_924, NULL, 924), NAME_FUNC_OFFSET(15865, gl_dispatch_stub_925, gl_dispatch_stub_925, NULL, 925), NAME_FUNC_OFFSET(15895, gl_dispatch_stub_926, gl_dispatch_stub_926, NULL, 926), NAME_FUNC_OFFSET(15925, gl_dispatch_stub_927, gl_dispatch_stub_927, NULL, 927), - NAME_FUNC_OFFSET(15950, gl_dispatch_stub_928, gl_dispatch_stub_928, NULL, 928), - NAME_FUNC_OFFSET(15974, gl_dispatch_stub_929, gl_dispatch_stub_929, NULL, 929), - NAME_FUNC_OFFSET(15998, gl_dispatch_stub_930, gl_dispatch_stub_930, NULL, 930), - NAME_FUNC_OFFSET(16022, gl_dispatch_stub_931, gl_dispatch_stub_931, NULL, 931), - NAME_FUNC_OFFSET(16038, gl_dispatch_stub_932, gl_dispatch_stub_932, NULL, 932), - NAME_FUNC_OFFSET(16059, gl_dispatch_stub_933, gl_dispatch_stub_933, NULL, 933), - NAME_FUNC_OFFSET(16084, gl_dispatch_stub_934, gl_dispatch_stub_934, NULL, 934), - NAME_FUNC_OFFSET(16100, gl_dispatch_stub_935, gl_dispatch_stub_935, NULL, 935), - NAME_FUNC_OFFSET(16122, gl_dispatch_stub_936, gl_dispatch_stub_936, NULL, 936), - NAME_FUNC_OFFSET(16139, gl_dispatch_stub_937, gl_dispatch_stub_937, NULL, 937), - NAME_FUNC_OFFSET(16156, gl_dispatch_stub_938, gl_dispatch_stub_938, NULL, 938), - NAME_FUNC_OFFSET(16183, gl_dispatch_stub_939, gl_dispatch_stub_939, NULL, 939), - NAME_FUNC_OFFSET(16204, gl_dispatch_stub_940, gl_dispatch_stub_940, NULL, 940), - NAME_FUNC_OFFSET(16231, gl_dispatch_stub_941, gl_dispatch_stub_941, NULL, 941), - NAME_FUNC_OFFSET(16257, gl_dispatch_stub_942, gl_dispatch_stub_942, NULL, 942), + NAME_FUNC_OFFSET(15955, gl_dispatch_stub_928, gl_dispatch_stub_928, NULL, 928), + NAME_FUNC_OFFSET(15980, gl_dispatch_stub_929, gl_dispatch_stub_929, NULL, 929), + NAME_FUNC_OFFSET(16004, gl_dispatch_stub_930, gl_dispatch_stub_930, NULL, 930), + NAME_FUNC_OFFSET(16028, gl_dispatch_stub_931, gl_dispatch_stub_931, NULL, 931), + NAME_FUNC_OFFSET(16052, gl_dispatch_stub_932, gl_dispatch_stub_932, NULL, 932), + NAME_FUNC_OFFSET(16068, gl_dispatch_stub_933, gl_dispatch_stub_933, NULL, 933), + NAME_FUNC_OFFSET(16089, gl_dispatch_stub_934, gl_dispatch_stub_934, NULL, 934), + NAME_FUNC_OFFSET(16114, gl_dispatch_stub_935, gl_dispatch_stub_935, NULL, 935), + NAME_FUNC_OFFSET(16130, gl_dispatch_stub_936, gl_dispatch_stub_936, NULL, 936), + NAME_FUNC_OFFSET(16152, gl_dispatch_stub_937, gl_dispatch_stub_937, NULL, 937), + NAME_FUNC_OFFSET(16169, gl_dispatch_stub_938, gl_dispatch_stub_938, NULL, 938), + NAME_FUNC_OFFSET(16186, gl_dispatch_stub_939, gl_dispatch_stub_939, NULL, 939), + NAME_FUNC_OFFSET(16213, gl_dispatch_stub_940, gl_dispatch_stub_940, NULL, 940), + NAME_FUNC_OFFSET(16234, gl_dispatch_stub_941, gl_dispatch_stub_941, NULL, 941), + NAME_FUNC_OFFSET(16261, gl_dispatch_stub_942, gl_dispatch_stub_942, NULL, 942), NAME_FUNC_OFFSET(16287, gl_dispatch_stub_943, gl_dispatch_stub_943, NULL, 943), - NAME_FUNC_OFFSET(16311, gl_dispatch_stub_944, gl_dispatch_stub_944, NULL, 944), - NAME_FUNC_OFFSET(16339, gl_dispatch_stub_945, gl_dispatch_stub_945, NULL, 945), + NAME_FUNC_OFFSET(16317, gl_dispatch_stub_944, gl_dispatch_stub_944, NULL, 944), + NAME_FUNC_OFFSET(16341, gl_dispatch_stub_945, gl_dispatch_stub_945, NULL, 945), NAME_FUNC_OFFSET(16369, gl_dispatch_stub_946, gl_dispatch_stub_946, NULL, 946), - NAME_FUNC_OFFSET(16397, gl_dispatch_stub_947, gl_dispatch_stub_947, NULL, 947), - NAME_FUNC_OFFSET(16422, gl_dispatch_stub_948, gl_dispatch_stub_948, NULL, 948), - NAME_FUNC_OFFSET(16446, gl_dispatch_stub_949, gl_dispatch_stub_949, NULL, 949), - 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NAME_FUNC_OFFSET(21905, gl_dispatch_stub_1194, gl_dispatch_stub_1194, NULL, 1194), - NAME_FUNC_OFFSET(21927, gl_dispatch_stub_1195, gl_dispatch_stub_1195, NULL, 1195), - NAME_FUNC_OFFSET(21953, gl_dispatch_stub_1196, gl_dispatch_stub_1196, NULL, 1196), - NAME_FUNC_OFFSET(21976, gl_dispatch_stub_1197, gl_dispatch_stub_1197, NULL, 1197), - NAME_FUNC_OFFSET(22000, gl_dispatch_stub_1198, gl_dispatch_stub_1198, NULL, 1198), - NAME_FUNC_OFFSET(22018, gl_dispatch_stub_1199, gl_dispatch_stub_1199, NULL, 1199), - NAME_FUNC_OFFSET(22033, gl_dispatch_stub_1200, gl_dispatch_stub_1200, NULL, 1200), - NAME_FUNC_OFFSET(22064, gl_dispatch_stub_1201, gl_dispatch_stub_1201, NULL, 1201), - NAME_FUNC_OFFSET(22087, gl_dispatch_stub_1202, gl_dispatch_stub_1202, NULL, 1202), - NAME_FUNC_OFFSET(22110, gl_dispatch_stub_1203, gl_dispatch_stub_1203, NULL, 1203), - NAME_FUNC_OFFSET(22133, gl_dispatch_stub_1204, gl_dispatch_stub_1204, NULL, 1204), + NAME_FUNC_OFFSET(17828, gl_dispatch_stub_1003, gl_dispatch_stub_1003, NULL, 1003), + NAME_FUNC_OFFSET(17859, gl_dispatch_stub_1004, gl_dispatch_stub_1004, NULL, 1004), + NAME_FUNC_OFFSET(17878, gl_dispatch_stub_1005, gl_dispatch_stub_1005, NULL, 1005), + NAME_FUNC_OFFSET(17905, gl_dispatch_stub_1006, gl_dispatch_stub_1006, NULL, 1006), + NAME_FUNC_OFFSET(17931, gl_dispatch_stub_1007, gl_dispatch_stub_1007, NULL, 1007), + NAME_FUNC_OFFSET(17958, gl_dispatch_stub_1008, gl_dispatch_stub_1008, NULL, 1008), + NAME_FUNC_OFFSET(17985, gl_dispatch_stub_1009, gl_dispatch_stub_1009, NULL, 1009), + NAME_FUNC_OFFSET(18013, gl_dispatch_stub_1010, gl_dispatch_stub_1010, NULL, 1010), + NAME_FUNC_OFFSET(18040, gl_dispatch_stub_1011, gl_dispatch_stub_1011, NULL, 1011), + NAME_FUNC_OFFSET(18066, gl_dispatch_stub_1012, gl_dispatch_stub_1012, NULL, 1012), + NAME_FUNC_OFFSET(18093, gl_dispatch_stub_1013, gl_dispatch_stub_1013, NULL, 1013), + NAME_FUNC_OFFSET(18124, gl_dispatch_stub_1014, gl_dispatch_stub_1014, NULL, 1014), + NAME_FUNC_OFFSET(18145, glInvalidateBufferData, glInvalidateBufferData, NULL, 1015), + NAME_FUNC_OFFSET(18168, glInvalidateBufferSubData, glInvalidateBufferSubData, NULL, 1016), + NAME_FUNC_OFFSET(18194, glInvalidateFramebuffer, glInvalidateFramebuffer, NULL, 1017), + NAME_FUNC_OFFSET(18218, glInvalidateSubFramebuffer, glInvalidateSubFramebuffer, NULL, 1018), + NAME_FUNC_OFFSET(18245, glInvalidateTexImage, glInvalidateTexImage, NULL, 1019), + NAME_FUNC_OFFSET(18266, glInvalidateTexSubImage, glInvalidateTexSubImage, NULL, 1020), + NAME_FUNC_OFFSET(18290, gl_dispatch_stub_1021, gl_dispatch_stub_1021, NULL, 1021), + NAME_FUNC_OFFSET(18309, gl_dispatch_stub_1022, gl_dispatch_stub_1022, NULL, 1022), + NAME_FUNC_OFFSET(18323, gl_dispatch_stub_1023, gl_dispatch_stub_1023, NULL, 1023), + NAME_FUNC_OFFSET(18338, gl_dispatch_stub_1024, gl_dispatch_stub_1024, NULL, 1024), + NAME_FUNC_OFFSET(18352, gl_dispatch_stub_1025, gl_dispatch_stub_1025, NULL, 1025), + NAME_FUNC_OFFSET(18367, gl_dispatch_stub_1026, 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gl_dispatch_stub_1050, gl_dispatch_stub_1050, NULL, 1050), + NAME_FUNC_OFFSET(18862, gl_dispatch_stub_1051, gl_dispatch_stub_1051, NULL, 1051), + NAME_FUNC_OFFSET(18882, glProgramUniform1f, glProgramUniform1f, NULL, 1052), + NAME_FUNC_OFFSET(18901, glProgramUniform1fv, glProgramUniform1fv, NULL, 1053), + NAME_FUNC_OFFSET(18921, glProgramUniform1i, glProgramUniform1i, NULL, 1054), + NAME_FUNC_OFFSET(18940, glProgramUniform1iv, glProgramUniform1iv, NULL, 1055), + NAME_FUNC_OFFSET(18960, glProgramUniform1ui, glProgramUniform1ui, NULL, 1056), + NAME_FUNC_OFFSET(18980, glProgramUniform1uiv, glProgramUniform1uiv, NULL, 1057), + NAME_FUNC_OFFSET(19001, gl_dispatch_stub_1058, gl_dispatch_stub_1058, NULL, 1058), + NAME_FUNC_OFFSET(19020, gl_dispatch_stub_1059, gl_dispatch_stub_1059, NULL, 1059), + NAME_FUNC_OFFSET(19040, glProgramUniform2f, glProgramUniform2f, NULL, 1060), + NAME_FUNC_OFFSET(19059, glProgramUniform2fv, glProgramUniform2fv, NULL, 1061), + NAME_FUNC_OFFSET(19079, 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NAME_FUNC_OFFSET(20154, glObjectLabel, glObjectLabel, NULL, 1109), + NAME_FUNC_OFFSET(20168, glObjectPtrLabel, glObjectPtrLabel, NULL, 1110), + NAME_FUNC_OFFSET(20185, glPopDebugGroup, glPopDebugGroup, NULL, 1111), + NAME_FUNC_OFFSET(20201, glPushDebugGroup, glPushDebugGroup, NULL, 1112), + NAME_FUNC_OFFSET(20218, glSecondaryColor3fEXT, glSecondaryColor3fEXT, NULL, 1113), + NAME_FUNC_OFFSET(20240, glSecondaryColor3fvEXT, glSecondaryColor3fvEXT, NULL, 1114), + NAME_FUNC_OFFSET(20263, glMultiDrawElementsEXT, glMultiDrawElementsEXT, NULL, 1115), + NAME_FUNC_OFFSET(20286, glFogCoordfEXT, glFogCoordfEXT, NULL, 1116), + NAME_FUNC_OFFSET(20301, glFogCoordfvEXT, glFogCoordfvEXT, NULL, 1117), + NAME_FUNC_OFFSET(20317, gl_dispatch_stub_1118, gl_dispatch_stub_1118, NULL, 1118), + NAME_FUNC_OFFSET(20337, gl_dispatch_stub_1119, gl_dispatch_stub_1119, NULL, 1119), + NAME_FUNC_OFFSET(20355, gl_dispatch_stub_1120, gl_dispatch_stub_1120, NULL, 1120), + NAME_FUNC_OFFSET(20374, gl_dispatch_stub_1121, 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gl_dispatch_stub_1133, gl_dispatch_stub_1133, NULL, 1133), + NAME_FUNC_OFFSET(20653, gl_dispatch_stub_1134, gl_dispatch_stub_1134, NULL, 1134), + NAME_FUNC_OFFSET(20670, gl_dispatch_stub_1135, gl_dispatch_stub_1135, NULL, 1135), + NAME_FUNC_OFFSET(20691, gl_dispatch_stub_1136, gl_dispatch_stub_1136, NULL, 1136), + NAME_FUNC_OFFSET(20713, gl_dispatch_stub_1137, gl_dispatch_stub_1137, NULL, 1137), + NAME_FUNC_OFFSET(20735, gl_dispatch_stub_1138, gl_dispatch_stub_1138, NULL, 1138), + NAME_FUNC_OFFSET(20757, gl_dispatch_stub_1139, gl_dispatch_stub_1139, NULL, 1139), + NAME_FUNC_OFFSET(20773, gl_dispatch_stub_1140, gl_dispatch_stub_1140, NULL, 1140), + NAME_FUNC_OFFSET(20798, gl_dispatch_stub_1141, gl_dispatch_stub_1141, NULL, 1141), + NAME_FUNC_OFFSET(20823, gl_dispatch_stub_1142, gl_dispatch_stub_1142, NULL, 1142), + NAME_FUNC_OFFSET(20851, gl_dispatch_stub_1143, gl_dispatch_stub_1143, NULL, 1143), + NAME_FUNC_OFFSET(20867, gl_dispatch_stub_1144, gl_dispatch_stub_1144, NULL, 1144), + NAME_FUNC_OFFSET(20886, gl_dispatch_stub_1145, gl_dispatch_stub_1145, NULL, 1145), + NAME_FUNC_OFFSET(20906, gl_dispatch_stub_1146, gl_dispatch_stub_1146, NULL, 1146), + NAME_FUNC_OFFSET(20925, gl_dispatch_stub_1147, gl_dispatch_stub_1147, NULL, 1147), + NAME_FUNC_OFFSET(20945, gl_dispatch_stub_1148, gl_dispatch_stub_1148, NULL, 1148), + NAME_FUNC_OFFSET(20964, gl_dispatch_stub_1149, gl_dispatch_stub_1149, NULL, 1149), + NAME_FUNC_OFFSET(20984, gl_dispatch_stub_1150, gl_dispatch_stub_1150, NULL, 1150), + NAME_FUNC_OFFSET(21003, gl_dispatch_stub_1151, gl_dispatch_stub_1151, NULL, 1151), + NAME_FUNC_OFFSET(21023, gl_dispatch_stub_1152, gl_dispatch_stub_1152, NULL, 1152), + NAME_FUNC_OFFSET(21042, gl_dispatch_stub_1153, gl_dispatch_stub_1153, NULL, 1153), + NAME_FUNC_OFFSET(21062, gl_dispatch_stub_1154, gl_dispatch_stub_1154, NULL, 1154), + NAME_FUNC_OFFSET(21081, gl_dispatch_stub_1155, gl_dispatch_stub_1155, NULL, 1155), + NAME_FUNC_OFFSET(21101, gl_dispatch_stub_1156, gl_dispatch_stub_1156, NULL, 1156), + NAME_FUNC_OFFSET(21120, gl_dispatch_stub_1157, gl_dispatch_stub_1157, NULL, 1157), + NAME_FUNC_OFFSET(21140, gl_dispatch_stub_1158, gl_dispatch_stub_1158, NULL, 1158), + NAME_FUNC_OFFSET(21159, gl_dispatch_stub_1159, gl_dispatch_stub_1159, NULL, 1159), + NAME_FUNC_OFFSET(21179, gl_dispatch_stub_1160, gl_dispatch_stub_1160, NULL, 1160), + NAME_FUNC_OFFSET(21198, gl_dispatch_stub_1161, gl_dispatch_stub_1161, NULL, 1161), + NAME_FUNC_OFFSET(21218, gl_dispatch_stub_1162, gl_dispatch_stub_1162, NULL, 1162), + NAME_FUNC_OFFSET(21237, gl_dispatch_stub_1163, gl_dispatch_stub_1163, NULL, 1163), + NAME_FUNC_OFFSET(21257, gl_dispatch_stub_1164, gl_dispatch_stub_1164, NULL, 1164), + NAME_FUNC_OFFSET(21276, gl_dispatch_stub_1165, gl_dispatch_stub_1165, NULL, 1165), + NAME_FUNC_OFFSET(21296, gl_dispatch_stub_1166, gl_dispatch_stub_1166, NULL, 1166), + NAME_FUNC_OFFSET(21315, gl_dispatch_stub_1167, gl_dispatch_stub_1167, NULL, 1167), + NAME_FUNC_OFFSET(21335, gl_dispatch_stub_1168, gl_dispatch_stub_1168, NULL, 1168), + NAME_FUNC_OFFSET(21355, gl_dispatch_stub_1169, gl_dispatch_stub_1169, NULL, 1169), + NAME_FUNC_OFFSET(21376, gl_dispatch_stub_1170, gl_dispatch_stub_1170, NULL, 1170), + NAME_FUNC_OFFSET(21400, gl_dispatch_stub_1171, gl_dispatch_stub_1171, NULL, 1171), + NAME_FUNC_OFFSET(21421, gl_dispatch_stub_1172, gl_dispatch_stub_1172, NULL, 1172), + NAME_FUNC_OFFSET(21442, gl_dispatch_stub_1173, gl_dispatch_stub_1173, NULL, 1173), + NAME_FUNC_OFFSET(21463, gl_dispatch_stub_1174, gl_dispatch_stub_1174, NULL, 1174), + NAME_FUNC_OFFSET(21484, gl_dispatch_stub_1175, gl_dispatch_stub_1175, NULL, 1175), + NAME_FUNC_OFFSET(21505, gl_dispatch_stub_1176, gl_dispatch_stub_1176, NULL, 1176), + NAME_FUNC_OFFSET(21526, gl_dispatch_stub_1177, gl_dispatch_stub_1177, NULL, 1177), + NAME_FUNC_OFFSET(21547, gl_dispatch_stub_1178, gl_dispatch_stub_1178, NULL, 1178), + NAME_FUNC_OFFSET(21568, gl_dispatch_stub_1179, gl_dispatch_stub_1179, NULL, 1179), + NAME_FUNC_OFFSET(21589, gl_dispatch_stub_1180, gl_dispatch_stub_1180, NULL, 1180), + NAME_FUNC_OFFSET(21610, gl_dispatch_stub_1181, gl_dispatch_stub_1181, NULL, 1181), + NAME_FUNC_OFFSET(21631, gl_dispatch_stub_1182, gl_dispatch_stub_1182, NULL, 1182), + NAME_FUNC_OFFSET(21652, gl_dispatch_stub_1183, gl_dispatch_stub_1183, NULL, 1183), + NAME_FUNC_OFFSET(21674, gl_dispatch_stub_1184, gl_dispatch_stub_1184, NULL, 1184), + NAME_FUNC_OFFSET(21701, gl_dispatch_stub_1185, gl_dispatch_stub_1185, NULL, 1185), + NAME_FUNC_OFFSET(21728, gl_dispatch_stub_1186, gl_dispatch_stub_1186, NULL, 1186), + NAME_FUNC_OFFSET(21752, gl_dispatch_stub_1187, gl_dispatch_stub_1187, NULL, 1187), + NAME_FUNC_OFFSET(21776, gl_dispatch_stub_1188, gl_dispatch_stub_1188, NULL, 1188), + NAME_FUNC_OFFSET(21798, gl_dispatch_stub_1189, gl_dispatch_stub_1189, NULL, 1189), + NAME_FUNC_OFFSET(21820, gl_dispatch_stub_1190, gl_dispatch_stub_1190, NULL, 1190), + NAME_FUNC_OFFSET(21842, gl_dispatch_stub_1191, gl_dispatch_stub_1191, NULL, 1191), + NAME_FUNC_OFFSET(21867, gl_dispatch_stub_1192, gl_dispatch_stub_1192, NULL, 1192), + NAME_FUNC_OFFSET(21891, gl_dispatch_stub_1193, gl_dispatch_stub_1193, NULL, 1193), + NAME_FUNC_OFFSET(21913, gl_dispatch_stub_1194, gl_dispatch_stub_1194, NULL, 1194), + NAME_FUNC_OFFSET(21935, gl_dispatch_stub_1195, gl_dispatch_stub_1195, NULL, 1195), + NAME_FUNC_OFFSET(21957, gl_dispatch_stub_1196, gl_dispatch_stub_1196, NULL, 1196), + NAME_FUNC_OFFSET(21983, gl_dispatch_stub_1197, gl_dispatch_stub_1197, NULL, 1197), + NAME_FUNC_OFFSET(22006, gl_dispatch_stub_1198, gl_dispatch_stub_1198, NULL, 1198), + NAME_FUNC_OFFSET(22030, gl_dispatch_stub_1199, gl_dispatch_stub_1199, NULL, 1199), + NAME_FUNC_OFFSET(22048, gl_dispatch_stub_1200, gl_dispatch_stub_1200, NULL, 1200), + NAME_FUNC_OFFSET(22063, gl_dispatch_stub_1201, gl_dispatch_stub_1201, NULL, 1201), + NAME_FUNC_OFFSET(22094, gl_dispatch_stub_1202, gl_dispatch_stub_1202, NULL, 1202), + NAME_FUNC_OFFSET(22117, gl_dispatch_stub_1203, gl_dispatch_stub_1203, NULL, 1203), + NAME_FUNC_OFFSET(22141, gl_dispatch_stub_1204, gl_dispatch_stub_1204, NULL, 1204), NAME_FUNC_OFFSET(22164, gl_dispatch_stub_1205, gl_dispatch_stub_1205, NULL, 1205), - NAME_FUNC_OFFSET(22195, gl_dispatch_stub_1206, gl_dispatch_stub_1206, NULL, 1206), - NAME_FUNC_OFFSET(22223, gl_dispatch_stub_1207, gl_dispatch_stub_1207, NULL, 1207), - NAME_FUNC_OFFSET(22252, gl_dispatch_stub_1208, gl_dispatch_stub_1208, NULL, 1208), - NAME_FUNC_OFFSET(22280, gl_dispatch_stub_1209, gl_dispatch_stub_1209, NULL, 1209), - NAME_FUNC_OFFSET(22309, glPrimitiveRestartNV, glPrimitiveRestartNV, NULL, 1210), - NAME_FUNC_OFFSET(22330, gl_dispatch_stub_1211, gl_dispatch_stub_1211, NULL, 1211), - NAME_FUNC_OFFSET(22347, gl_dispatch_stub_1212, gl_dispatch_stub_1212, NULL, 1212), - NAME_FUNC_OFFSET(22360, gl_dispatch_stub_1213, gl_dispatch_stub_1213, NULL, 1213), - NAME_FUNC_OFFSET(22374, gl_dispatch_stub_1214, gl_dispatch_stub_1214, NULL, 1214), - NAME_FUNC_OFFSET(22391, glBindFramebufferEXT, glBindFramebufferEXT, NULL, 1215), - NAME_FUNC_OFFSET(22412, glBindRenderbufferEXT, glBindRenderbufferEXT, NULL, 1216), - NAME_FUNC_OFFSET(22434, gl_dispatch_stub_1217, gl_dispatch_stub_1217, NULL, 1217), - NAME_FUNC_OFFSET(22456, gl_dispatch_stub_1218, gl_dispatch_stub_1218, NULL, 1218), - NAME_FUNC_OFFSET(22480, gl_dispatch_stub_1219, gl_dispatch_stub_1219, NULL, 1219), - NAME_FUNC_OFFSET(22510, glVertexAttribI1iEXT, glVertexAttribI1iEXT, NULL, 1220), - NAME_FUNC_OFFSET(22531, glVertexAttribI1uiEXT, glVertexAttribI1uiEXT, NULL, 1221), - NAME_FUNC_OFFSET(22553, glVertexAttribI2iEXT, glVertexAttribI2iEXT, NULL, 1222), - NAME_FUNC_OFFSET(22574, glVertexAttribI2ivEXT, glVertexAttribI2ivEXT, NULL, 1223), - NAME_FUNC_OFFSET(22596, glVertexAttribI2uiEXT, glVertexAttribI2uiEXT, NULL, 1224), - NAME_FUNC_OFFSET(22618, glVertexAttribI2uivEXT, glVertexAttribI2uivEXT, NULL, 1225), - NAME_FUNC_OFFSET(22641, glVertexAttribI3iEXT, glVertexAttribI3iEXT, NULL, 1226), - NAME_FUNC_OFFSET(22662, glVertexAttribI3ivEXT, glVertexAttribI3ivEXT, NULL, 1227), - NAME_FUNC_OFFSET(22684, glVertexAttribI3uiEXT, glVertexAttribI3uiEXT, NULL, 1228), - NAME_FUNC_OFFSET(22706, glVertexAttribI3uivEXT, glVertexAttribI3uivEXT, NULL, 1229), - NAME_FUNC_OFFSET(22729, glVertexAttribI4iEXT, glVertexAttribI4iEXT, NULL, 1230), - NAME_FUNC_OFFSET(22750, glVertexAttribI4ivEXT, glVertexAttribI4ivEXT, NULL, 1231), - NAME_FUNC_OFFSET(22772, glVertexAttribI4uiEXT, glVertexAttribI4uiEXT, NULL, 1232), - NAME_FUNC_OFFSET(22794, glVertexAttribI4uivEXT, glVertexAttribI4uivEXT, NULL, 1233), - NAME_FUNC_OFFSET(22817, glClearColorIiEXT, glClearColorIiEXT, NULL, 1234), - NAME_FUNC_OFFSET(22835, glClearColorIuiEXT, glClearColorIuiEXT, NULL, 1235), - NAME_FUNC_OFFSET(22854, gl_dispatch_stub_1236, gl_dispatch_stub_1236, NULL, 1236), - NAME_FUNC_OFFSET(22876, gl_dispatch_stub_1237, gl_dispatch_stub_1237, NULL, 1237), - NAME_FUNC_OFFSET(22898, gl_dispatch_stub_1238, gl_dispatch_stub_1238, NULL, 1238), - NAME_FUNC_OFFSET(22922, gl_dispatch_stub_1239, gl_dispatch_stub_1239, NULL, 1239), - NAME_FUNC_OFFSET(22942, gl_dispatch_stub_1240, gl_dispatch_stub_1240, NULL, 1240), - NAME_FUNC_OFFSET(22963, gl_dispatch_stub_1241, gl_dispatch_stub_1241, NULL, 1241), - NAME_FUNC_OFFSET(22994, gl_dispatch_stub_1242, gl_dispatch_stub_1242, NULL, 1242), - NAME_FUNC_OFFSET(23025, gl_dispatch_stub_1243, gl_dispatch_stub_1243, NULL, 1243), - NAME_FUNC_OFFSET(23058, gl_dispatch_stub_1244, gl_dispatch_stub_1244, NULL, 1244), - NAME_FUNC_OFFSET(23086, gl_dispatch_stub_1245, gl_dispatch_stub_1245, NULL, 1245), - NAME_FUNC_OFFSET(23117, gl_dispatch_stub_1246, gl_dispatch_stub_1246, NULL, 1246), - NAME_FUNC_OFFSET(23143, gl_dispatch_stub_1247, gl_dispatch_stub_1247, NULL, 1247), - NAME_FUNC_OFFSET(23174, gl_dispatch_stub_1248, gl_dispatch_stub_1248, NULL, 1248), - NAME_FUNC_OFFSET(23202, gl_dispatch_stub_1249, gl_dispatch_stub_1249, NULL, 1249), - NAME_FUNC_OFFSET(23225, gl_dispatch_stub_1250, gl_dispatch_stub_1250, NULL, 1250), - NAME_FUNC_OFFSET(23250, gl_dispatch_stub_1251, gl_dispatch_stub_1251, NULL, 1251), - NAME_FUNC_OFFSET(23269, gl_dispatch_stub_1252, gl_dispatch_stub_1252, NULL, 1252), - NAME_FUNC_OFFSET(23294, gl_dispatch_stub_1253, gl_dispatch_stub_1253, NULL, 1253), - NAME_FUNC_OFFSET(23316, glTextureBarrierNV, glTextureBarrierNV, NULL, 1254), - NAME_FUNC_OFFSET(23335, gl_dispatch_stub_1255, gl_dispatch_stub_1255, NULL, 1255), - NAME_FUNC_OFFSET(23349, gl_dispatch_stub_1256, gl_dispatch_stub_1256, NULL, 1256), - NAME_FUNC_OFFSET(23371, gl_dispatch_stub_1257, gl_dispatch_stub_1257, NULL, 1257), - NAME_FUNC_OFFSET(23385, gl_dispatch_stub_1258, gl_dispatch_stub_1258, NULL, 1258), - NAME_FUNC_OFFSET(23404, gl_dispatch_stub_1259, gl_dispatch_stub_1259, NULL, 1259), - NAME_FUNC_OFFSET(23425, gl_dispatch_stub_1260, gl_dispatch_stub_1260, NULL, 1260), - NAME_FUNC_OFFSET(23456, gl_dispatch_stub_1261, gl_dispatch_stub_1261, NULL, 1261), - NAME_FUNC_OFFSET(23486, gl_dispatch_stub_1262, gl_dispatch_stub_1262, NULL, 1262), - NAME_FUNC_OFFSET(23509, gl_dispatch_stub_1263, gl_dispatch_stub_1263, NULL, 1263), - NAME_FUNC_OFFSET(23532, gl_dispatch_stub_1264, gl_dispatch_stub_1264, NULL, 1264), - NAME_FUNC_OFFSET(23559, gl_dispatch_stub_1265, gl_dispatch_stub_1265, NULL, 1265), - NAME_FUNC_OFFSET(23581, gl_dispatch_stub_1266, gl_dispatch_stub_1266, NULL, 1266), - NAME_FUNC_OFFSET(23604, gl_dispatch_stub_1267, gl_dispatch_stub_1267, NULL, 1267), - NAME_FUNC_OFFSET(23627, gl_dispatch_stub_1268, gl_dispatch_stub_1268, NULL, 1268), - NAME_FUNC_OFFSET(23647, gl_dispatch_stub_1269, gl_dispatch_stub_1269, NULL, 1269), - NAME_FUNC_OFFSET(23674, gl_dispatch_stub_1270, gl_dispatch_stub_1270, NULL, 1270), - NAME_FUNC_OFFSET(23700, gl_dispatch_stub_1271, gl_dispatch_stub_1271, NULL, 1271), - NAME_FUNC_OFFSET(23726, gl_dispatch_stub_1272, gl_dispatch_stub_1272, NULL, 1272), - NAME_FUNC_OFFSET(23750, gl_dispatch_stub_1273, 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- NAME_FUNC_OFFSET(24233, glOrthox, glOrthox, NULL, 1302), - NAME_FUNC_OFFSET(24242, glPointSizex, glPointSizex, NULL, 1303), - NAME_FUNC_OFFSET(24255, glPolygonOffsetx, glPolygonOffsetx, NULL, 1304), - NAME_FUNC_OFFSET(24272, glRotatex, glRotatex, NULL, 1305), - NAME_FUNC_OFFSET(24282, glSampleCoveragex, glSampleCoveragex, NULL, 1306), - NAME_FUNC_OFFSET(24300, glScalex, glScalex, NULL, 1307), - NAME_FUNC_OFFSET(24309, glTexEnvx, glTexEnvx, NULL, 1308), - NAME_FUNC_OFFSET(24319, glTexEnvxv, glTexEnvxv, NULL, 1309), - NAME_FUNC_OFFSET(24330, glTexParameterx, glTexParameterx, NULL, 1310), - NAME_FUNC_OFFSET(24346, glTranslatex, glTranslatex, NULL, 1311), - NAME_FUNC_OFFSET(24359, glClipPlanef, glClipPlanef, NULL, 1312), - NAME_FUNC_OFFSET(24372, glClipPlanex, glClipPlanex, NULL, 1313), - NAME_FUNC_OFFSET(24385, glGetClipPlanef, glGetClipPlanef, NULL, 1314), - NAME_FUNC_OFFSET(24401, glGetClipPlanex, glGetClipPlanex, NULL, 1315), - NAME_FUNC_OFFSET(24417, glGetFixedv, glGetFixedv, NULL, 1316), - NAME_FUNC_OFFSET(24429, glGetLightxv, glGetLightxv, NULL, 1317), - NAME_FUNC_OFFSET(24442, glGetMaterialxv, glGetMaterialxv, NULL, 1318), - NAME_FUNC_OFFSET(24458, glGetTexEnvxv, glGetTexEnvxv, NULL, 1319), - NAME_FUNC_OFFSET(24472, glGetTexParameterxv, glGetTexParameterxv, NULL, 1320), - NAME_FUNC_OFFSET(24492, glPointParameterx, glPointParameterx, NULL, 1321), - NAME_FUNC_OFFSET(24510, glPointParameterxv, glPointParameterxv, NULL, 1322), - NAME_FUNC_OFFSET(24529, glTexParameterxv, glTexParameterxv, NULL, 1323), - NAME_FUNC_OFFSET(24546, glTexGenf, glTexGenf, NULL, 190), - NAME_FUNC_OFFSET(24559, glTexGenfv, glTexGenfv, NULL, 191), - NAME_FUNC_OFFSET(24573, glTexGeni, glTexGeni, NULL, 192), - NAME_FUNC_OFFSET(24586, glTexGeniv, glTexGeniv, NULL, 193), - NAME_FUNC_OFFSET(24600, glReadBuffer, glReadBuffer, NULL, 254), - NAME_FUNC_OFFSET(24615, glGetTexGenfv, glGetTexGenfv, NULL, 279), - NAME_FUNC_OFFSET(24632, glGetTexGeniv, glGetTexGeniv, NULL, 280), - NAME_FUNC_OFFSET(24649, glArrayElement, glArrayElement, NULL, 306), - NAME_FUNC_OFFSET(24667, glBindTexture, glBindTexture, NULL, 307), - NAME_FUNC_OFFSET(24684, glDrawArrays, glDrawArrays, NULL, 310), - NAME_FUNC_OFFSET(24700, glAreTexturesResident, glAreTexturesResidentEXT, glAreTexturesResidentEXT, 322), - NAME_FUNC_OFFSET(24725, glCopyTexImage1D, glCopyTexImage1D, NULL, 323), - NAME_FUNC_OFFSET(24745, glCopyTexImage2D, glCopyTexImage2D, NULL, 324), - NAME_FUNC_OFFSET(24765, glCopyTexSubImage1D, glCopyTexSubImage1D, NULL, 325), - NAME_FUNC_OFFSET(24788, glCopyTexSubImage2D, glCopyTexSubImage2D, NULL, 326), - NAME_FUNC_OFFSET(24811, glDeleteTextures, glDeleteTexturesEXT, glDeleteTexturesEXT, 327), - NAME_FUNC_OFFSET(24831, glGenTextures, glGenTexturesEXT, glGenTexturesEXT, 328), - NAME_FUNC_OFFSET(24848, glGetPointerv, glGetPointerv, NULL, 329), - NAME_FUNC_OFFSET(24865, glGetPointerv, glGetPointerv, NULL, 329), - NAME_FUNC_OFFSET(24882, glIsTexture, glIsTextureEXT, glIsTextureEXT, 330), - NAME_FUNC_OFFSET(24897, glPrioritizeTextures, glPrioritizeTextures, NULL, 331), - NAME_FUNC_OFFSET(24921, glTexSubImage1D, glTexSubImage1D, NULL, 332), - NAME_FUNC_OFFSET(24940, glTexSubImage2D, glTexSubImage2D, NULL, 333), - NAME_FUNC_OFFSET(24959, glBlendColor, glBlendColor, NULL, 336), - NAME_FUNC_OFFSET(24975, glBlendEquation, glBlendEquation, NULL, 337), - NAME_FUNC_OFFSET(24994, glBlendEquation, glBlendEquation, NULL, 337), - NAME_FUNC_OFFSET(25013, glDrawRangeElements, glDrawRangeElements, NULL, 338), - NAME_FUNC_OFFSET(25036, glColorTable, glColorTable, NULL, 339), - NAME_FUNC_OFFSET(25052, glColorTable, glColorTable, NULL, 339), - NAME_FUNC_OFFSET(25068, glColorTableParameterfv, glColorTableParameterfv, NULL, 340), - NAME_FUNC_OFFSET(25095, glColorTableParameteriv, glColorTableParameteriv, NULL, 341), - NAME_FUNC_OFFSET(25122, glCopyColorTable, glCopyColorTable, NULL, 342), - NAME_FUNC_OFFSET(25142, glGetColorTable, gl_dispatch_stub_343, gl_dispatch_stub_343, 343), - NAME_FUNC_OFFSET(25161, glGetColorTable, gl_dispatch_stub_343, gl_dispatch_stub_343, 343), - NAME_FUNC_OFFSET(25180, glGetColorTableParameterfv, gl_dispatch_stub_344, gl_dispatch_stub_344, 344), - NAME_FUNC_OFFSET(25210, glGetColorTableParameterfv, gl_dispatch_stub_344, gl_dispatch_stub_344, 344), - NAME_FUNC_OFFSET(25240, glGetColorTableParameteriv, gl_dispatch_stub_345, gl_dispatch_stub_345, 345), - NAME_FUNC_OFFSET(25270, glGetColorTableParameteriv, gl_dispatch_stub_345, gl_dispatch_stub_345, 345), - NAME_FUNC_OFFSET(25300, glColorSubTable, glColorSubTable, NULL, 346), - NAME_FUNC_OFFSET(25319, glCopyColorSubTable, glCopyColorSubTable, NULL, 347), - NAME_FUNC_OFFSET(25342, glConvolutionFilter1D, glConvolutionFilter1D, NULL, 348), - NAME_FUNC_OFFSET(25367, glConvolutionFilter2D, glConvolutionFilter2D, NULL, 349), - NAME_FUNC_OFFSET(25392, glConvolutionParameterf, glConvolutionParameterf, NULL, 350), - NAME_FUNC_OFFSET(25419, glConvolutionParameterfv, glConvolutionParameterfv, NULL, 351), - NAME_FUNC_OFFSET(25447, glConvolutionParameteri, glConvolutionParameteri, NULL, 352), - NAME_FUNC_OFFSET(25474, glConvolutionParameteriv, glConvolutionParameteriv, NULL, 353), - NAME_FUNC_OFFSET(25502, glCopyConvolutionFilter1D, glCopyConvolutionFilter1D, NULL, 354), - NAME_FUNC_OFFSET(25531, glCopyConvolutionFilter2D, glCopyConvolutionFilter2D, NULL, 355), - NAME_FUNC_OFFSET(25560, glGetConvolutionFilter, gl_dispatch_stub_356, gl_dispatch_stub_356, 356), - NAME_FUNC_OFFSET(25586, glGetConvolutionParameterfv, gl_dispatch_stub_357, gl_dispatch_stub_357, 357), - NAME_FUNC_OFFSET(25617, glGetConvolutionParameteriv, gl_dispatch_stub_358, gl_dispatch_stub_358, 358), - NAME_FUNC_OFFSET(25648, glGetSeparableFilter, gl_dispatch_stub_359, gl_dispatch_stub_359, 359), - NAME_FUNC_OFFSET(25672, glSeparableFilter2D, glSeparableFilter2D, NULL, 360), - NAME_FUNC_OFFSET(25695, glGetHistogram, gl_dispatch_stub_361, gl_dispatch_stub_361, 361), - NAME_FUNC_OFFSET(25713, glGetHistogramParameterfv, gl_dispatch_stub_362, gl_dispatch_stub_362, 362), - NAME_FUNC_OFFSET(25742, glGetHistogramParameteriv, gl_dispatch_stub_363, gl_dispatch_stub_363, 363), - NAME_FUNC_OFFSET(25771, glGetMinmax, gl_dispatch_stub_364, gl_dispatch_stub_364, 364), - NAME_FUNC_OFFSET(25786, glGetMinmaxParameterfv, gl_dispatch_stub_365, gl_dispatch_stub_365, 365), - NAME_FUNC_OFFSET(25812, glGetMinmaxParameteriv, gl_dispatch_stub_366, gl_dispatch_stub_366, 366), - NAME_FUNC_OFFSET(25838, glHistogram, glHistogram, NULL, 367), - NAME_FUNC_OFFSET(25853, glMinmax, glMinmax, NULL, 368), - NAME_FUNC_OFFSET(25865, glResetHistogram, glResetHistogram, NULL, 369), - NAME_FUNC_OFFSET(25885, glResetMinmax, glResetMinmax, NULL, 370), - NAME_FUNC_OFFSET(25902, glTexImage3D, glTexImage3D, NULL, 371), - NAME_FUNC_OFFSET(25918, glTexImage3D, glTexImage3D, NULL, 371), - NAME_FUNC_OFFSET(25934, glTexSubImage3D, glTexSubImage3D, NULL, 372), - NAME_FUNC_OFFSET(25953, glTexSubImage3D, glTexSubImage3D, NULL, 372), - NAME_FUNC_OFFSET(25972, glCopyTexSubImage3D, glCopyTexSubImage3D, NULL, 373), - NAME_FUNC_OFFSET(25995, glCopyTexSubImage3D, glCopyTexSubImage3D, NULL, 373), - NAME_FUNC_OFFSET(26018, glActiveTexture, glActiveTexture, NULL, 374), - NAME_FUNC_OFFSET(26037, glClientActiveTexture, glClientActiveTexture, NULL, 375), - NAME_FUNC_OFFSET(26062, glMultiTexCoord1d, glMultiTexCoord1d, NULL, 376), - NAME_FUNC_OFFSET(26083, glMultiTexCoord1dv, glMultiTexCoord1dv, NULL, 377), - NAME_FUNC_OFFSET(26105, glMultiTexCoord1fARB, glMultiTexCoord1fARB, NULL, 378), - NAME_FUNC_OFFSET(26123, glMultiTexCoord1fvARB, glMultiTexCoord1fvARB, NULL, 379), - NAME_FUNC_OFFSET(26142, glMultiTexCoord1i, glMultiTexCoord1i, NULL, 380), - NAME_FUNC_OFFSET(26163, glMultiTexCoord1iv, glMultiTexCoord1iv, NULL, 381), - NAME_FUNC_OFFSET(26185, glMultiTexCoord1s, glMultiTexCoord1s, NULL, 382), - NAME_FUNC_OFFSET(26206, glMultiTexCoord1sv, glMultiTexCoord1sv, NULL, 383), - NAME_FUNC_OFFSET(26228, glMultiTexCoord2d, glMultiTexCoord2d, NULL, 384), - NAME_FUNC_OFFSET(26249, glMultiTexCoord2dv, glMultiTexCoord2dv, NULL, 385), - NAME_FUNC_OFFSET(26271, glMultiTexCoord2fARB, glMultiTexCoord2fARB, NULL, 386), - NAME_FUNC_OFFSET(26289, glMultiTexCoord2fvARB, glMultiTexCoord2fvARB, NULL, 387), - NAME_FUNC_OFFSET(26308, glMultiTexCoord2i, glMultiTexCoord2i, NULL, 388), - NAME_FUNC_OFFSET(26329, glMultiTexCoord2iv, glMultiTexCoord2iv, NULL, 389), - NAME_FUNC_OFFSET(26351, glMultiTexCoord2s, glMultiTexCoord2s, NULL, 390), - NAME_FUNC_OFFSET(26372, glMultiTexCoord2sv, glMultiTexCoord2sv, NULL, 391), - NAME_FUNC_OFFSET(26394, glMultiTexCoord3d, glMultiTexCoord3d, NULL, 392), - NAME_FUNC_OFFSET(26415, glMultiTexCoord3dv, glMultiTexCoord3dv, NULL, 393), - NAME_FUNC_OFFSET(26437, glMultiTexCoord3fARB, glMultiTexCoord3fARB, NULL, 394), - NAME_FUNC_OFFSET(26455, glMultiTexCoord3fvARB, glMultiTexCoord3fvARB, NULL, 395), - NAME_FUNC_OFFSET(26474, glMultiTexCoord3i, glMultiTexCoord3i, NULL, 396), - NAME_FUNC_OFFSET(26495, glMultiTexCoord3iv, glMultiTexCoord3iv, NULL, 397), - NAME_FUNC_OFFSET(26517, glMultiTexCoord3s, glMultiTexCoord3s, NULL, 398), - NAME_FUNC_OFFSET(26538, glMultiTexCoord3sv, glMultiTexCoord3sv, NULL, 399), - NAME_FUNC_OFFSET(26560, glMultiTexCoord4d, glMultiTexCoord4d, NULL, 400), - NAME_FUNC_OFFSET(26581, glMultiTexCoord4dv, glMultiTexCoord4dv, NULL, 401), - NAME_FUNC_OFFSET(26603, glMultiTexCoord4fARB, glMultiTexCoord4fARB, NULL, 402), - NAME_FUNC_OFFSET(26621, glMultiTexCoord4fvARB, glMultiTexCoord4fvARB, NULL, 403), - NAME_FUNC_OFFSET(26640, glMultiTexCoord4i, glMultiTexCoord4i, NULL, 404), - NAME_FUNC_OFFSET(26661, glMultiTexCoord4iv, glMultiTexCoord4iv, NULL, 405), - NAME_FUNC_OFFSET(26683, glMultiTexCoord4s, glMultiTexCoord4s, NULL, 406), - NAME_FUNC_OFFSET(26704, glMultiTexCoord4sv, glMultiTexCoord4sv, NULL, 407), - NAME_FUNC_OFFSET(26726, glCompressedTexImage1D, glCompressedTexImage1D, NULL, 408), - NAME_FUNC_OFFSET(26752, glCompressedTexImage2D, glCompressedTexImage2D, NULL, 409), - NAME_FUNC_OFFSET(26778, glCompressedTexImage3D, glCompressedTexImage3D, NULL, 410), - NAME_FUNC_OFFSET(26804, glCompressedTexImage3D, glCompressedTexImage3D, NULL, 410), - NAME_FUNC_OFFSET(26830, glCompressedTexSubImage1D, glCompressedTexSubImage1D, NULL, 411), - NAME_FUNC_OFFSET(26859, glCompressedTexSubImage2D, glCompressedTexSubImage2D, NULL, 412), - NAME_FUNC_OFFSET(26888, glCompressedTexSubImage3D, glCompressedTexSubImage3D, NULL, 413), - NAME_FUNC_OFFSET(26917, glCompressedTexSubImage3D, glCompressedTexSubImage3D, NULL, 413), - NAME_FUNC_OFFSET(26946, glGetCompressedTexImage, glGetCompressedTexImage, NULL, 414), - NAME_FUNC_OFFSET(26973, glLoadTransposeMatrixd, glLoadTransposeMatrixd, NULL, 415), - NAME_FUNC_OFFSET(26999, glLoadTransposeMatrixf, glLoadTransposeMatrixf, NULL, 416), - NAME_FUNC_OFFSET(27025, glMultTransposeMatrixd, glMultTransposeMatrixd, NULL, 417), - NAME_FUNC_OFFSET(27051, glMultTransposeMatrixf, glMultTransposeMatrixf, NULL, 418), - NAME_FUNC_OFFSET(27077, glSampleCoverage, glSampleCoverage, NULL, 419), - NAME_FUNC_OFFSET(27097, glBlendFuncSeparate, glBlendFuncSeparate, NULL, 420), - NAME_FUNC_OFFSET(27120, glBlendFuncSeparate, glBlendFuncSeparate, NULL, 420), - NAME_FUNC_OFFSET(27144, glBlendFuncSeparate, glBlendFuncSeparate, NULL, 420), - NAME_FUNC_OFFSET(27167, glFogCoordPointer, glFogCoordPointer, NULL, 421), - NAME_FUNC_OFFSET(27188, glFogCoordd, glFogCoordd, NULL, 422), - NAME_FUNC_OFFSET(27203, glFogCoorddv, glFogCoorddv, NULL, 423), - NAME_FUNC_OFFSET(27219, glMultiDrawArrays, glMultiDrawArrays, NULL, 424), - NAME_FUNC_OFFSET(27240, glPointParameterf, glPointParameterf, NULL, 425), - NAME_FUNC_OFFSET(27261, glPointParameterf, glPointParameterf, NULL, 425), - NAME_FUNC_OFFSET(27282, glPointParameterf, glPointParameterf, NULL, 425), - NAME_FUNC_OFFSET(27304, glPointParameterfv, glPointParameterfv, NULL, 426), - NAME_FUNC_OFFSET(27326, glPointParameterfv, glPointParameterfv, NULL, 426), - NAME_FUNC_OFFSET(27348, glPointParameterfv, glPointParameterfv, NULL, 426), - NAME_FUNC_OFFSET(27371, glPointParameteri, glPointParameteri, NULL, 427), - NAME_FUNC_OFFSET(27391, glPointParameteriv, glPointParameteriv, NULL, 428), - NAME_FUNC_OFFSET(27412, glSecondaryColor3b, glSecondaryColor3b, NULL, 429), - NAME_FUNC_OFFSET(27434, glSecondaryColor3bv, glSecondaryColor3bv, NULL, 430), - NAME_FUNC_OFFSET(27457, glSecondaryColor3d, glSecondaryColor3d, NULL, 431), - NAME_FUNC_OFFSET(27479, glSecondaryColor3dv, glSecondaryColor3dv, NULL, 432), - NAME_FUNC_OFFSET(27502, glSecondaryColor3i, glSecondaryColor3i, NULL, 433), - NAME_FUNC_OFFSET(27524, glSecondaryColor3iv, glSecondaryColor3iv, NULL, 434), - NAME_FUNC_OFFSET(27547, glSecondaryColor3s, glSecondaryColor3s, NULL, 435), - NAME_FUNC_OFFSET(27569, glSecondaryColor3sv, glSecondaryColor3sv, NULL, 436), - NAME_FUNC_OFFSET(27592, glSecondaryColor3ub, glSecondaryColor3ub, NULL, 437), - NAME_FUNC_OFFSET(27615, glSecondaryColor3ubv, glSecondaryColor3ubv, NULL, 438), - NAME_FUNC_OFFSET(27639, glSecondaryColor3ui, glSecondaryColor3ui, NULL, 439), - NAME_FUNC_OFFSET(27662, glSecondaryColor3uiv, glSecondaryColor3uiv, NULL, 440), - NAME_FUNC_OFFSET(27686, glSecondaryColor3us, glSecondaryColor3us, NULL, 441), - NAME_FUNC_OFFSET(27709, glSecondaryColor3usv, glSecondaryColor3usv, NULL, 442), - NAME_FUNC_OFFSET(27733, glSecondaryColorPointer, glSecondaryColorPointer, NULL, 443), - NAME_FUNC_OFFSET(27760, glWindowPos2d, glWindowPos2d, NULL, 444), - NAME_FUNC_OFFSET(27777, glWindowPos2d, glWindowPos2d, NULL, 444), - NAME_FUNC_OFFSET(27795, glWindowPos2dv, glWindowPos2dv, NULL, 445), - NAME_FUNC_OFFSET(27813, glWindowPos2dv, glWindowPos2dv, NULL, 445), - NAME_FUNC_OFFSET(27832, glWindowPos2f, glWindowPos2f, NULL, 446), - NAME_FUNC_OFFSET(27849, glWindowPos2f, glWindowPos2f, NULL, 446), - NAME_FUNC_OFFSET(27867, glWindowPos2fv, glWindowPos2fv, NULL, 447), - NAME_FUNC_OFFSET(27885, glWindowPos2fv, glWindowPos2fv, NULL, 447), - NAME_FUNC_OFFSET(27904, glWindowPos2i, glWindowPos2i, NULL, 448), - NAME_FUNC_OFFSET(27921, glWindowPos2i, glWindowPos2i, NULL, 448), - NAME_FUNC_OFFSET(27939, glWindowPos2iv, glWindowPos2iv, NULL, 449), - NAME_FUNC_OFFSET(27957, glWindowPos2iv, glWindowPos2iv, NULL, 449), - NAME_FUNC_OFFSET(27976, glWindowPos2s, glWindowPos2s, NULL, 450), - NAME_FUNC_OFFSET(27993, glWindowPos2s, glWindowPos2s, NULL, 450), - NAME_FUNC_OFFSET(28011, glWindowPos2sv, glWindowPos2sv, NULL, 451), - NAME_FUNC_OFFSET(28029, glWindowPos2sv, glWindowPos2sv, NULL, 451), - NAME_FUNC_OFFSET(28048, glWindowPos3d, glWindowPos3d, NULL, 452), - NAME_FUNC_OFFSET(28065, glWindowPos3d, glWindowPos3d, NULL, 452), - NAME_FUNC_OFFSET(28083, glWindowPos3dv, glWindowPos3dv, NULL, 453), - NAME_FUNC_OFFSET(28101, glWindowPos3dv, glWindowPos3dv, NULL, 453), - NAME_FUNC_OFFSET(28120, glWindowPos3f, glWindowPos3f, NULL, 454), - NAME_FUNC_OFFSET(28137, glWindowPos3f, glWindowPos3f, NULL, 454), - NAME_FUNC_OFFSET(28155, glWindowPos3fv, glWindowPos3fv, NULL, 455), - NAME_FUNC_OFFSET(28173, glWindowPos3fv, glWindowPos3fv, NULL, 455), - NAME_FUNC_OFFSET(28192, glWindowPos3i, glWindowPos3i, NULL, 456), - NAME_FUNC_OFFSET(28209, glWindowPos3i, glWindowPos3i, NULL, 456), - NAME_FUNC_OFFSET(28227, glWindowPos3iv, glWindowPos3iv, NULL, 457), - NAME_FUNC_OFFSET(28245, glWindowPos3iv, glWindowPos3iv, NULL, 457), - NAME_FUNC_OFFSET(28264, glWindowPos3s, glWindowPos3s, NULL, 458), - NAME_FUNC_OFFSET(28281, glWindowPos3s, glWindowPos3s, NULL, 458), - NAME_FUNC_OFFSET(28299, glWindowPos3sv, glWindowPos3sv, NULL, 459), - NAME_FUNC_OFFSET(28317, glWindowPos3sv, glWindowPos3sv, NULL, 459), - NAME_FUNC_OFFSET(28336, glBeginQuery, glBeginQuery, NULL, 460), - NAME_FUNC_OFFSET(28352, glBindBuffer, glBindBuffer, NULL, 461), - NAME_FUNC_OFFSET(28368, glBufferData, glBufferData, NULL, 462), - NAME_FUNC_OFFSET(28384, glBufferSubData, glBufferSubData, NULL, 463), - NAME_FUNC_OFFSET(28403, glDeleteBuffers, glDeleteBuffers, NULL, 464), - NAME_FUNC_OFFSET(28422, glDeleteQueries, glDeleteQueries, NULL, 465), - NAME_FUNC_OFFSET(28441, glEndQuery, glEndQuery, NULL, 466), - NAME_FUNC_OFFSET(28455, glGenBuffers, glGenBuffers, NULL, 467), - NAME_FUNC_OFFSET(28471, glGenQueries, glGenQueries, NULL, 468), - NAME_FUNC_OFFSET(28487, glGetBufferParameteriv, glGetBufferParameteriv, NULL, 469), - NAME_FUNC_OFFSET(28513, glGetBufferPointerv, glGetBufferPointerv, NULL, 470), - NAME_FUNC_OFFSET(28536, glGetBufferPointerv, glGetBufferPointerv, NULL, 470), - NAME_FUNC_OFFSET(28559, glGetBufferSubData, glGetBufferSubData, NULL, 471), - NAME_FUNC_OFFSET(28581, glGetQueryObjectiv, glGetQueryObjectiv, NULL, 472), - NAME_FUNC_OFFSET(28603, glGetQueryObjectuiv, glGetQueryObjectuiv, NULL, 473), - NAME_FUNC_OFFSET(28626, glGetQueryiv, glGetQueryiv, NULL, 474), - NAME_FUNC_OFFSET(28642, glIsBuffer, glIsBuffer, NULL, 475), - NAME_FUNC_OFFSET(28656, glIsQuery, glIsQuery, NULL, 476), - NAME_FUNC_OFFSET(28669, glMapBuffer, glMapBuffer, NULL, 477), - NAME_FUNC_OFFSET(28684, glMapBuffer, glMapBuffer, NULL, 477), - NAME_FUNC_OFFSET(28699, glUnmapBuffer, glUnmapBuffer, NULL, 478), - NAME_FUNC_OFFSET(28716, glUnmapBuffer, glUnmapBuffer, NULL, 478), - NAME_FUNC_OFFSET(28733, glBindAttribLocation, glBindAttribLocation, NULL, 480), - NAME_FUNC_OFFSET(28757, glBlendEquationSeparate, glBlendEquationSeparate, NULL, 481), - NAME_FUNC_OFFSET(28784, glBlendEquationSeparate, glBlendEquationSeparate, NULL, 481), - NAME_FUNC_OFFSET(28811, glBlendEquationSeparate, glBlendEquationSeparate, NULL, 481), - NAME_FUNC_OFFSET(28838, glCompileShader, glCompileShader, NULL, 482), - NAME_FUNC_OFFSET(28857, glDisableVertexAttribArray, glDisableVertexAttribArray, NULL, 488), - NAME_FUNC_OFFSET(28887, glDrawBuffers, glDrawBuffers, NULL, 489), - NAME_FUNC_OFFSET(28904, glDrawBuffers, glDrawBuffers, NULL, 489), - NAME_FUNC_OFFSET(28921, glDrawBuffers, glDrawBuffers, NULL, 489), - NAME_FUNC_OFFSET(28937, glDrawBuffers, glDrawBuffers, NULL, 489), - NAME_FUNC_OFFSET(28954, glEnableVertexAttribArray, glEnableVertexAttribArray, NULL, 490), - NAME_FUNC_OFFSET(28983, glGetActiveAttrib, glGetActiveAttrib, NULL, 491), - NAME_FUNC_OFFSET(29004, glGetActiveUniform, glGetActiveUniform, NULL, 492), - NAME_FUNC_OFFSET(29026, glGetAttribLocation, glGetAttribLocation, NULL, 494), - NAME_FUNC_OFFSET(29049, glGetShaderSource, glGetShaderSource, NULL, 498), - NAME_FUNC_OFFSET(29070, glGetUniformLocation, glGetUniformLocation, NULL, 500), - NAME_FUNC_OFFSET(29094, glGetUniformfv, glGetUniformfv, NULL, 501), - NAME_FUNC_OFFSET(29112, glGetUniformiv, glGetUniformiv, NULL, 502), - NAME_FUNC_OFFSET(29130, glGetVertexAttribPointerv, glGetVertexAttribPointerv, NULL, 503), - NAME_FUNC_OFFSET(29159, glGetVertexAttribPointerv, glGetVertexAttribPointerv, NULL, 503), - NAME_FUNC_OFFSET(29187, glGetVertexAttribdv, glGetVertexAttribdv, NULL, 504), - NAME_FUNC_OFFSET(29210, glGetVertexAttribfv, glGetVertexAttribfv, NULL, 505), - NAME_FUNC_OFFSET(29233, glGetVertexAttribiv, glGetVertexAttribiv, NULL, 506), - NAME_FUNC_OFFSET(29256, glLinkProgram, glLinkProgram, NULL, 509), - NAME_FUNC_OFFSET(29273, glShaderSource, glShaderSource, NULL, 510), - NAME_FUNC_OFFSET(29291, glStencilOpSeparate, glStencilOpSeparate, NULL, 513), - NAME_FUNC_OFFSET(29314, glUniform1f, glUniform1f, NULL, 514), - NAME_FUNC_OFFSET(29329, glUniform1fv, glUniform1fv, NULL, 515), - NAME_FUNC_OFFSET(29345, glUniform1i, glUniform1i, NULL, 516), - NAME_FUNC_OFFSET(29360, glUniform1iv, glUniform1iv, NULL, 517), - NAME_FUNC_OFFSET(29376, glUniform2f, glUniform2f, NULL, 518), - NAME_FUNC_OFFSET(29391, glUniform2fv, glUniform2fv, NULL, 519), - NAME_FUNC_OFFSET(29407, glUniform2i, glUniform2i, NULL, 520), - NAME_FUNC_OFFSET(29422, glUniform2iv, glUniform2iv, NULL, 521), - NAME_FUNC_OFFSET(29438, glUniform3f, glUniform3f, NULL, 522), - NAME_FUNC_OFFSET(29453, glUniform3fv, glUniform3fv, NULL, 523), - NAME_FUNC_OFFSET(29469, glUniform3i, glUniform3i, NULL, 524), - NAME_FUNC_OFFSET(29484, glUniform3iv, glUniform3iv, NULL, 525), - NAME_FUNC_OFFSET(29500, glUniform4f, glUniform4f, NULL, 526), - NAME_FUNC_OFFSET(29515, glUniform4fv, glUniform4fv, NULL, 527), - NAME_FUNC_OFFSET(29531, glUniform4i, glUniform4i, NULL, 528), - NAME_FUNC_OFFSET(29546, glUniform4iv, glUniform4iv, NULL, 529), - NAME_FUNC_OFFSET(29562, glUniformMatrix2fv, glUniformMatrix2fv, NULL, 530), - NAME_FUNC_OFFSET(29584, glUniformMatrix3fv, glUniformMatrix3fv, NULL, 531), - NAME_FUNC_OFFSET(29606, glUniformMatrix4fv, glUniformMatrix4fv, NULL, 532), - NAME_FUNC_OFFSET(29628, glUseProgram, glUseProgram, NULL, 533), - NAME_FUNC_OFFSET(29650, glValidateProgram, glValidateProgram, NULL, 534), - NAME_FUNC_OFFSET(29671, glVertexAttrib1d, glVertexAttrib1d, NULL, 535), - NAME_FUNC_OFFSET(29691, glVertexAttrib1dv, glVertexAttrib1dv, NULL, 536), - NAME_FUNC_OFFSET(29712, glVertexAttrib1s, glVertexAttrib1s, NULL, 537), - NAME_FUNC_OFFSET(29732, glVertexAttrib1sv, glVertexAttrib1sv, NULL, 538), - NAME_FUNC_OFFSET(29753, glVertexAttrib2d, glVertexAttrib2d, NULL, 539), - NAME_FUNC_OFFSET(29773, glVertexAttrib2dv, glVertexAttrib2dv, NULL, 540), - NAME_FUNC_OFFSET(29794, glVertexAttrib2s, glVertexAttrib2s, NULL, 541), - NAME_FUNC_OFFSET(29814, glVertexAttrib2sv, glVertexAttrib2sv, NULL, 542), - NAME_FUNC_OFFSET(29835, glVertexAttrib3d, glVertexAttrib3d, NULL, 543), - NAME_FUNC_OFFSET(29855, glVertexAttrib3dv, glVertexAttrib3dv, NULL, 544), - NAME_FUNC_OFFSET(29876, glVertexAttrib3s, glVertexAttrib3s, NULL, 545), - NAME_FUNC_OFFSET(29896, glVertexAttrib3sv, glVertexAttrib3sv, NULL, 546), - NAME_FUNC_OFFSET(29917, glVertexAttrib4Nbv, glVertexAttrib4Nbv, NULL, 547), - NAME_FUNC_OFFSET(29939, glVertexAttrib4Niv, glVertexAttrib4Niv, NULL, 548), - NAME_FUNC_OFFSET(29961, glVertexAttrib4Nsv, glVertexAttrib4Nsv, NULL, 549), - NAME_FUNC_OFFSET(29983, glVertexAttrib4Nub, glVertexAttrib4Nub, NULL, 550), - NAME_FUNC_OFFSET(30005, glVertexAttrib4Nubv, glVertexAttrib4Nubv, NULL, 551), - NAME_FUNC_OFFSET(30028, glVertexAttrib4Nuiv, glVertexAttrib4Nuiv, NULL, 552), - NAME_FUNC_OFFSET(30051, glVertexAttrib4Nusv, glVertexAttrib4Nusv, NULL, 553), - NAME_FUNC_OFFSET(30074, glVertexAttrib4bv, glVertexAttrib4bv, NULL, 554), - NAME_FUNC_OFFSET(30095, glVertexAttrib4d, glVertexAttrib4d, NULL, 555), - NAME_FUNC_OFFSET(30115, glVertexAttrib4dv, glVertexAttrib4dv, NULL, 556), - NAME_FUNC_OFFSET(30136, glVertexAttrib4iv, glVertexAttrib4iv, NULL, 557), - NAME_FUNC_OFFSET(30157, glVertexAttrib4s, glVertexAttrib4s, NULL, 558), - NAME_FUNC_OFFSET(30177, glVertexAttrib4sv, glVertexAttrib4sv, NULL, 559), - NAME_FUNC_OFFSET(30198, glVertexAttrib4ubv, glVertexAttrib4ubv, NULL, 560), - NAME_FUNC_OFFSET(30220, glVertexAttrib4uiv, glVertexAttrib4uiv, NULL, 561), - NAME_FUNC_OFFSET(30242, glVertexAttrib4usv, glVertexAttrib4usv, NULL, 562), - NAME_FUNC_OFFSET(30264, glVertexAttribPointer, glVertexAttribPointer, NULL, 563), - NAME_FUNC_OFFSET(30289, glBeginConditionalRender, glBeginConditionalRender, NULL, 570), - NAME_FUNC_OFFSET(30316, glBeginTransformFeedback, glBeginTransformFeedback, NULL, 571), - NAME_FUNC_OFFSET(30344, glBindBufferBase, glBindBufferBase, NULL, 572), - NAME_FUNC_OFFSET(30364, glBindBufferRange, glBindBufferRange, NULL, 573), - NAME_FUNC_OFFSET(30385, glBindFragDataLocation, glBindFragDataLocation, NULL, 574), - NAME_FUNC_OFFSET(30411, glClampColor, glClampColor, NULL, 575), - NAME_FUNC_OFFSET(30427, glColorMaski, glColorMaski, NULL, 580), - NAME_FUNC_OFFSET(30449, glColorMaski, glColorMaski, NULL, 580), - NAME_FUNC_OFFSET(30465, glColorMaski, glColorMaski, NULL, 580), - NAME_FUNC_OFFSET(30481, glDisablei, glDisablei, NULL, 581), - NAME_FUNC_OFFSET(30501, glDisablei, glDisablei, NULL, 581), - NAME_FUNC_OFFSET(30515, glDisablei, glDisablei, NULL, 581), - NAME_FUNC_OFFSET(30529, glEnablei, glEnablei, NULL, 582), - NAME_FUNC_OFFSET(30548, glEnablei, glEnablei, NULL, 582), - NAME_FUNC_OFFSET(30561, glEnablei, glEnablei, NULL, 582), - NAME_FUNC_OFFSET(30574, glEndConditionalRender, glEndConditionalRender, NULL, 583), - NAME_FUNC_OFFSET(30599, glEndTransformFeedback, glEndTransformFeedback, NULL, 584), - NAME_FUNC_OFFSET(30625, glGetBooleani_v, glGetBooleani_v, NULL, 585), - NAME_FUNC_OFFSET(30649, glGetFragDataLocation, glGetFragDataLocation, NULL, 586), - NAME_FUNC_OFFSET(30674, glGetIntegeri_v, glGetIntegeri_v, NULL, 587), - NAME_FUNC_OFFSET(30698, glGetTexParameterIiv, glGetTexParameterIiv, NULL, 589), - NAME_FUNC_OFFSET(30722, glGetTexParameterIiv, glGetTexParameterIiv, NULL, 589), - NAME_FUNC_OFFSET(30746, glGetTexParameterIuiv, glGetTexParameterIuiv, NULL, 590), - NAME_FUNC_OFFSET(30771, glGetTexParameterIuiv, glGetTexParameterIuiv, NULL, 590), - NAME_FUNC_OFFSET(30796, glGetTransformFeedbackVarying, glGetTransformFeedbackVarying, NULL, 591), - NAME_FUNC_OFFSET(30829, glGetUniformuiv, glGetUniformuiv, NULL, 592), - NAME_FUNC_OFFSET(30848, glGetVertexAttribIiv, glGetVertexAttribIiv, NULL, 593), - NAME_FUNC_OFFSET(30872, glGetVertexAttribIuiv, glGetVertexAttribIuiv, NULL, 594), - NAME_FUNC_OFFSET(30897, glIsEnabledi, glIsEnabledi, NULL, 595), - NAME_FUNC_OFFSET(30919, glIsEnabledi, glIsEnabledi, NULL, 595), - NAME_FUNC_OFFSET(30935, glIsEnabledi, glIsEnabledi, NULL, 595), - NAME_FUNC_OFFSET(30951, glTexParameterIiv, glTexParameterIiv, NULL, 596), - NAME_FUNC_OFFSET(30972, glTexParameterIiv, glTexParameterIiv, NULL, 596), - NAME_FUNC_OFFSET(30993, glTexParameterIuiv, glTexParameterIuiv, NULL, 597), - NAME_FUNC_OFFSET(31015, glTexParameterIuiv, glTexParameterIuiv, NULL, 597), - NAME_FUNC_OFFSET(31037, glTransformFeedbackVaryings, glTransformFeedbackVaryings, NULL, 598), - NAME_FUNC_OFFSET(31068, glUniform1ui, glUniform1ui, NULL, 599), - NAME_FUNC_OFFSET(31084, glUniform1uiv, glUniform1uiv, NULL, 600), - NAME_FUNC_OFFSET(31101, glUniform2ui, glUniform2ui, NULL, 601), - NAME_FUNC_OFFSET(31117, glUniform2uiv, glUniform2uiv, NULL, 602), - NAME_FUNC_OFFSET(31134, glUniform3ui, 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glProgramEnvParameter4fvARB, glProgramEnvParameter4fvARB, NULL, 635), - NAME_FUNC_OFFSET(31684, glVertexAttrib1fARB, glVertexAttrib1fARB, NULL, 641), - NAME_FUNC_OFFSET(31701, glVertexAttrib1fvARB, glVertexAttrib1fvARB, NULL, 642), - NAME_FUNC_OFFSET(31719, glVertexAttrib2fARB, glVertexAttrib2fARB, NULL, 643), - NAME_FUNC_OFFSET(31736, glVertexAttrib2fvARB, glVertexAttrib2fvARB, NULL, 644), - NAME_FUNC_OFFSET(31754, glVertexAttrib3fARB, glVertexAttrib3fARB, NULL, 645), - NAME_FUNC_OFFSET(31771, glVertexAttrib3fvARB, glVertexAttrib3fvARB, NULL, 646), - NAME_FUNC_OFFSET(31789, glVertexAttrib4fARB, glVertexAttrib4fARB, NULL, 647), - NAME_FUNC_OFFSET(31806, glVertexAttrib4fvARB, glVertexAttrib4fvARB, NULL, 648), - NAME_FUNC_OFFSET(31824, glDrawArraysInstancedARB, glDrawArraysInstancedARB, NULL, 659), - NAME_FUNC_OFFSET(31849, glDrawArraysInstancedARB, glDrawArraysInstancedARB, NULL, 659), - NAME_FUNC_OFFSET(31871, glDrawElementsInstancedARB, glDrawElementsInstancedARB, NULL, 660), - NAME_FUNC_OFFSET(31898, glDrawElementsInstancedARB, glDrawElementsInstancedARB, NULL, 660), - NAME_FUNC_OFFSET(31922, glBindFramebuffer, glBindFramebuffer, NULL, 661), - NAME_FUNC_OFFSET(31943, glBindRenderbuffer, glBindRenderbuffer, NULL, 662), - NAME_FUNC_OFFSET(31965, glBlitFramebuffer, glBlitFramebuffer, NULL, 663), - NAME_FUNC_OFFSET(31986, glCheckFramebufferStatus, glCheckFramebufferStatus, NULL, 664), - NAME_FUNC_OFFSET(32014, glCheckFramebufferStatus, glCheckFramebufferStatus, NULL, 664), - NAME_FUNC_OFFSET(32042, glDeleteFramebuffers, glDeleteFramebuffers, NULL, 665), - NAME_FUNC_OFFSET(32066, glDeleteFramebuffers, glDeleteFramebuffers, NULL, 665), - NAME_FUNC_OFFSET(32090, glDeleteRenderbuffers, glDeleteRenderbuffers, NULL, 666), - NAME_FUNC_OFFSET(32115, glDeleteRenderbuffers, glDeleteRenderbuffers, NULL, 666), - NAME_FUNC_OFFSET(32140, glFramebufferRenderbuffer, glFramebufferRenderbuffer, NULL, 667), - NAME_FUNC_OFFSET(32169, glFramebufferRenderbuffer, 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NULL, 715), - NAME_FUNC_OFFSET(33653, glGetFragDataIndex, glGetFragDataIndex, NULL, 716), - NAME_FUNC_OFFSET(33675, glGetSamplerParameterIiv, glGetSamplerParameterIiv, NULL, 720), - NAME_FUNC_OFFSET(33703, glGetSamplerParameterIiv, glGetSamplerParameterIiv, NULL, 720), - NAME_FUNC_OFFSET(33731, glGetSamplerParameterIuiv, glGetSamplerParameterIuiv, NULL, 721), - NAME_FUNC_OFFSET(33760, glGetSamplerParameterIuiv, glGetSamplerParameterIuiv, NULL, 721), - NAME_FUNC_OFFSET(33789, glSamplerParameterIiv, glSamplerParameterIiv, NULL, 725), - NAME_FUNC_OFFSET(33814, glSamplerParameterIiv, glSamplerParameterIiv, NULL, 725), - NAME_FUNC_OFFSET(33839, glSamplerParameterIuiv, glSamplerParameterIuiv, NULL, 726), - NAME_FUNC_OFFSET(33865, glSamplerParameterIuiv, glSamplerParameterIuiv, NULL, 726), - NAME_FUNC_OFFSET(33891, gl_dispatch_stub_731, gl_dispatch_stub_731, NULL, 731), - NAME_FUNC_OFFSET(33915, gl_dispatch_stub_732, gl_dispatch_stub_732, NULL, 732), - NAME_FUNC_OFFSET(33940, glClearDepthf, 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NAME_FUNC_OFFSET(34198, glReadnPixelsARB, glReadnPixelsARB, NULL, 860), - NAME_FUNC_OFFSET(34212, glReadnPixelsARB, glReadnPixelsARB, NULL, 860), - NAME_FUNC_OFFSET(34229, glDrawArraysInstancedBaseInstance, glDrawArraysInstancedBaseInstance, NULL, 861), - NAME_FUNC_OFFSET(34266, glDrawElementsInstancedBaseInstance, glDrawElementsInstancedBaseInstance, NULL, 862), - NAME_FUNC_OFFSET(34305, glDrawElementsInstancedBaseVertexBaseInstance, glDrawElementsInstancedBaseVertexBaseInstance, NULL, 863), - NAME_FUNC_OFFSET(34354, glCopyImageSubData, glCopyImageSubData, NULL, 880), - NAME_FUNC_OFFSET(34376, glCopyImageSubData, glCopyImageSubData, NULL, 880), - NAME_FUNC_OFFSET(34398, gl_dispatch_stub_896, gl_dispatch_stub_896, NULL, 896), - NAME_FUNC_OFFSET(34435, glTexBufferRange, glTexBufferRange, NULL, 900), - NAME_FUNC_OFFSET(34455, glTexBufferRange, glTexBufferRange, NULL, 900), - NAME_FUNC_OFFSET(34475, glTexStorage3DMultisample, glTexStorage3DMultisample, NULL, 902), - NAME_FUNC_OFFSET(34504, glBufferStorage, glBufferStorage, NULL, 903), - NAME_FUNC_OFFSET(34523, gl_dispatch_stub_1031, gl_dispatch_stub_1031, NULL, 1031), - NAME_FUNC_OFFSET(34539, gl_dispatch_stub_1032, gl_dispatch_stub_1032, NULL, 1032), - NAME_FUNC_OFFSET(34558, glActiveShaderProgram, glActiveShaderProgram, NULL, 1040), - NAME_FUNC_OFFSET(34583, glBindProgramPipeline, glBindProgramPipeline, NULL, 1041), - NAME_FUNC_OFFSET(34608, glCreateShaderProgramv, glCreateShaderProgramv, NULL, 1042), - NAME_FUNC_OFFSET(34634, glDeleteProgramPipelines, glDeleteProgramPipelines, NULL, 1043), - NAME_FUNC_OFFSET(34662, glGenProgramPipelines, glGenProgramPipelines, NULL, 1044), - NAME_FUNC_OFFSET(34687, glGetProgramPipelineInfoLog, glGetProgramPipelineInfoLog, NULL, 1045), - NAME_FUNC_OFFSET(34718, glGetProgramPipelineiv, glGetProgramPipelineiv, NULL, 1046), - NAME_FUNC_OFFSET(34744, glIsProgramPipeline, glIsProgramPipeline, NULL, 1047), - NAME_FUNC_OFFSET(34767, glProgramUniform1f, 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NAME_FUNC_OFFSET(35344, glProgramUniformMatrix2x3fv, glProgramUniformMatrix2x3fv, NULL, 1084), - NAME_FUNC_OFFSET(35375, glProgramUniformMatrix2x4fv, glProgramUniformMatrix2x4fv, NULL, 1086), - NAME_FUNC_OFFSET(35406, glProgramUniformMatrix3fv, glProgramUniformMatrix3fv, NULL, 1088), - NAME_FUNC_OFFSET(35435, glProgramUniformMatrix3x2fv, glProgramUniformMatrix3x2fv, NULL, 1090), - NAME_FUNC_OFFSET(35466, glProgramUniformMatrix3x4fv, glProgramUniformMatrix3x4fv, NULL, 1092), - NAME_FUNC_OFFSET(35497, glProgramUniformMatrix4fv, glProgramUniformMatrix4fv, NULL, 1094), - NAME_FUNC_OFFSET(35526, glProgramUniformMatrix4x2fv, glProgramUniformMatrix4x2fv, NULL, 1096), - NAME_FUNC_OFFSET(35557, glProgramUniformMatrix4x3fv, glProgramUniformMatrix4x3fv, NULL, 1098), - NAME_FUNC_OFFSET(35588, glUseProgramStages, glUseProgramStages, NULL, 1100), - NAME_FUNC_OFFSET(35610, glValidateProgramPipeline, glValidateProgramPipeline, NULL, 1101), - NAME_FUNC_OFFSET(35639, glDebugMessageCallback, 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NAME_FUNC_OFFSET(35936, glPushDebugGroup, glPushDebugGroup, NULL, 1111), - NAME_FUNC_OFFSET(35956, glSecondaryColor3fEXT, glSecondaryColor3fEXT, NULL, 1112), - NAME_FUNC_OFFSET(35975, glSecondaryColor3fvEXT, glSecondaryColor3fvEXT, NULL, 1113), - NAME_FUNC_OFFSET(35995, glMultiDrawElementsEXT, glMultiDrawElementsEXT, NULL, 1114), - NAME_FUNC_OFFSET(36015, glFogCoordfEXT, glFogCoordfEXT, NULL, 1115), - NAME_FUNC_OFFSET(36027, glFogCoordfvEXT, glFogCoordfvEXT, NULL, 1116), - NAME_FUNC_OFFSET(36040, glVertexAttribI1iEXT, glVertexAttribI1iEXT, NULL, 1220), - NAME_FUNC_OFFSET(36058, glVertexAttribI1uiEXT, glVertexAttribI1uiEXT, NULL, 1221), - NAME_FUNC_OFFSET(36077, glVertexAttribI2iEXT, glVertexAttribI2iEXT, NULL, 1222), - NAME_FUNC_OFFSET(36095, glVertexAttribI2ivEXT, glVertexAttribI2ivEXT, NULL, 1223), - NAME_FUNC_OFFSET(36114, glVertexAttribI2uiEXT, glVertexAttribI2uiEXT, NULL, 1224), - NAME_FUNC_OFFSET(36133, glVertexAttribI2uivEXT, glVertexAttribI2uivEXT, NULL, 1225), - NAME_FUNC_OFFSET(36153, glVertexAttribI3iEXT, glVertexAttribI3iEXT, NULL, 1226), - NAME_FUNC_OFFSET(36171, glVertexAttribI3ivEXT, glVertexAttribI3ivEXT, NULL, 1227), - NAME_FUNC_OFFSET(36190, glVertexAttribI3uiEXT, glVertexAttribI3uiEXT, NULL, 1228), - NAME_FUNC_OFFSET(36209, glVertexAttribI3uivEXT, glVertexAttribI3uivEXT, NULL, 1229), - NAME_FUNC_OFFSET(36229, glVertexAttribI4iEXT, glVertexAttribI4iEXT, NULL, 1230), - NAME_FUNC_OFFSET(36247, glVertexAttribI4ivEXT, glVertexAttribI4ivEXT, NULL, 1231), - NAME_FUNC_OFFSET(36266, glVertexAttribI4uiEXT, glVertexAttribI4uiEXT, NULL, 1232), - NAME_FUNC_OFFSET(36285, glVertexAttribI4uivEXT, glVertexAttribI4uivEXT, NULL, 1233), - NAME_FUNC_OFFSET(36305, glTextureBarrierNV, glTextureBarrierNV, NULL, 1254), - NAME_FUNC_OFFSET(36322, glAlphaFuncx, glAlphaFuncx, NULL, 1281), - NAME_FUNC_OFFSET(36338, glClearColorx, glClearColorx, NULL, 1282), - NAME_FUNC_OFFSET(36355, glClearDepthx, glClearDepthx, NULL, 1283), - NAME_FUNC_OFFSET(36372, glColor4x, glColor4x, NULL, 1284), - NAME_FUNC_OFFSET(36385, glDepthRangex, glDepthRangex, NULL, 1285), - NAME_FUNC_OFFSET(36402, glFogx, glFogx, NULL, 1286), - NAME_FUNC_OFFSET(36412, glFogxv, glFogxv, NULL, 1287), - NAME_FUNC_OFFSET(36423, glFrustumf, glFrustumf, NULL, 1288), - NAME_FUNC_OFFSET(36437, glFrustumx, glFrustumx, NULL, 1289), - NAME_FUNC_OFFSET(36451, glLightModelx, glLightModelx, NULL, 1290), - NAME_FUNC_OFFSET(36468, glLightModelxv, glLightModelxv, NULL, 1291), - NAME_FUNC_OFFSET(36486, glLightx, glLightx, NULL, 1292), - NAME_FUNC_OFFSET(36498, glLightxv, glLightxv, NULL, 1293), - NAME_FUNC_OFFSET(36511, glLineWidthx, glLineWidthx, NULL, 1294), - NAME_FUNC_OFFSET(36527, glLoadMatrixx, glLoadMatrixx, NULL, 1295), - NAME_FUNC_OFFSET(36544, glMaterialx, glMaterialx, NULL, 1296), - NAME_FUNC_OFFSET(36559, glMaterialxv, glMaterialxv, NULL, 1297), - NAME_FUNC_OFFSET(36575, glMultMatrixx, glMultMatrixx, NULL, 1298), - NAME_FUNC_OFFSET(36592, glMultiTexCoord4x, glMultiTexCoord4x, NULL, 1299), - NAME_FUNC_OFFSET(36613, glNormal3x, glNormal3x, NULL, 1300), - NAME_FUNC_OFFSET(36627, glOrthof, glOrthof, NULL, 1301), - NAME_FUNC_OFFSET(36639, glOrthox, glOrthox, NULL, 1302), - NAME_FUNC_OFFSET(36651, glPointSizex, glPointSizex, NULL, 1303), - NAME_FUNC_OFFSET(36667, glPolygonOffsetx, glPolygonOffsetx, NULL, 1304), - NAME_FUNC_OFFSET(36687, glRotatex, glRotatex, NULL, 1305), - NAME_FUNC_OFFSET(36700, glSampleCoveragex, glSampleCoveragex, NULL, 1306), - NAME_FUNC_OFFSET(36721, glScalex, glScalex, NULL, 1307), - NAME_FUNC_OFFSET(36733, glTexEnvx, glTexEnvx, NULL, 1308), - NAME_FUNC_OFFSET(36746, glTexEnvxv, glTexEnvxv, NULL, 1309), - NAME_FUNC_OFFSET(36760, glTexParameterx, glTexParameterx, NULL, 1310), - NAME_FUNC_OFFSET(36779, glTranslatex, glTranslatex, NULL, 1311), - NAME_FUNC_OFFSET(36795, glClipPlanef, glClipPlanef, NULL, 1312), - NAME_FUNC_OFFSET(36811, glClipPlanex, glClipPlanex, NULL, 1313), - NAME_FUNC_OFFSET(36827, glGetClipPlanef, glGetClipPlanef, NULL, 1314), - NAME_FUNC_OFFSET(36846, glGetClipPlanex, glGetClipPlanex, NULL, 1315), - NAME_FUNC_OFFSET(36865, glGetFixedv, glGetFixedv, NULL, 1316), - NAME_FUNC_OFFSET(36880, glGetLightxv, glGetLightxv, NULL, 1317), - NAME_FUNC_OFFSET(36896, glGetMaterialxv, glGetMaterialxv, NULL, 1318), - NAME_FUNC_OFFSET(36915, glGetTexEnvxv, glGetTexEnvxv, NULL, 1319), - NAME_FUNC_OFFSET(36932, glGetTexParameterxv, glGetTexParameterxv, NULL, 1320), - NAME_FUNC_OFFSET(36955, glPointParameterx, glPointParameterx, NULL, 1321), - NAME_FUNC_OFFSET(36976, glPointParameterxv, glPointParameterxv, NULL, 1322), - NAME_FUNC_OFFSET(36998, glTexParameterxv, glTexParameterxv, NULL, 1323), + NAME_FUNC_OFFSET(22187, gl_dispatch_stub_1206, gl_dispatch_stub_1206, NULL, 1206), + NAME_FUNC_OFFSET(22210, gl_dispatch_stub_1207, gl_dispatch_stub_1207, NULL, 1207), + NAME_FUNC_OFFSET(22241, gl_dispatch_stub_1208, gl_dispatch_stub_1208, NULL, 1208), + NAME_FUNC_OFFSET(22272, gl_dispatch_stub_1209, gl_dispatch_stub_1209, NULL, 1209), + NAME_FUNC_OFFSET(22300, gl_dispatch_stub_1210, gl_dispatch_stub_1210, NULL, 1210), + NAME_FUNC_OFFSET(22329, gl_dispatch_stub_1211, gl_dispatch_stub_1211, NULL, 1211), + NAME_FUNC_OFFSET(22357, gl_dispatch_stub_1212, gl_dispatch_stub_1212, NULL, 1212), + NAME_FUNC_OFFSET(22386, glPrimitiveRestartNV, glPrimitiveRestartNV, NULL, 1213), + NAME_FUNC_OFFSET(22407, gl_dispatch_stub_1214, gl_dispatch_stub_1214, NULL, 1214), + NAME_FUNC_OFFSET(22424, gl_dispatch_stub_1215, gl_dispatch_stub_1215, NULL, 1215), + NAME_FUNC_OFFSET(22437, gl_dispatch_stub_1216, gl_dispatch_stub_1216, NULL, 1216), + NAME_FUNC_OFFSET(22451, gl_dispatch_stub_1217, gl_dispatch_stub_1217, NULL, 1217), + NAME_FUNC_OFFSET(22468, glBindFramebufferEXT, glBindFramebufferEXT, NULL, 1218), + NAME_FUNC_OFFSET(22489, glBindRenderbufferEXT, glBindRenderbufferEXT, NULL, 1219), + NAME_FUNC_OFFSET(22511, gl_dispatch_stub_1220, gl_dispatch_stub_1220, NULL, 1220), + NAME_FUNC_OFFSET(22533, gl_dispatch_stub_1221, gl_dispatch_stub_1221, NULL, 1221), + NAME_FUNC_OFFSET(22557, gl_dispatch_stub_1222, gl_dispatch_stub_1222, NULL, 1222), + NAME_FUNC_OFFSET(22587, glVertexAttribI1iEXT, glVertexAttribI1iEXT, NULL, 1223), + NAME_FUNC_OFFSET(22608, glVertexAttribI1uiEXT, glVertexAttribI1uiEXT, NULL, 1224), + NAME_FUNC_OFFSET(22630, glVertexAttribI2iEXT, glVertexAttribI2iEXT, NULL, 1225), + NAME_FUNC_OFFSET(22651, glVertexAttribI2ivEXT, glVertexAttribI2ivEXT, NULL, 1226), + NAME_FUNC_OFFSET(22673, glVertexAttribI2uiEXT, glVertexAttribI2uiEXT, NULL, 1227), + NAME_FUNC_OFFSET(22695, glVertexAttribI2uivEXT, glVertexAttribI2uivEXT, NULL, 1228), + NAME_FUNC_OFFSET(22718, glVertexAttribI3iEXT, glVertexAttribI3iEXT, NULL, 1229), + NAME_FUNC_OFFSET(22739, glVertexAttribI3ivEXT, glVertexAttribI3ivEXT, NULL, 1230), + NAME_FUNC_OFFSET(22761, glVertexAttribI3uiEXT, glVertexAttribI3uiEXT, NULL, 1231), + NAME_FUNC_OFFSET(22783, glVertexAttribI3uivEXT, glVertexAttribI3uivEXT, NULL, 1232), + NAME_FUNC_OFFSET(22806, glVertexAttribI4iEXT, glVertexAttribI4iEXT, NULL, 1233), + NAME_FUNC_OFFSET(22827, glVertexAttribI4ivEXT, glVertexAttribI4ivEXT, NULL, 1234), + NAME_FUNC_OFFSET(22849, glVertexAttribI4uiEXT, glVertexAttribI4uiEXT, NULL, 1235), + NAME_FUNC_OFFSET(22871, glVertexAttribI4uivEXT, glVertexAttribI4uivEXT, NULL, 1236), + NAME_FUNC_OFFSET(22894, glClearColorIiEXT, glClearColorIiEXT, NULL, 1237), + NAME_FUNC_OFFSET(22912, glClearColorIuiEXT, glClearColorIuiEXT, NULL, 1238), + NAME_FUNC_OFFSET(22931, gl_dispatch_stub_1239, gl_dispatch_stub_1239, NULL, 1239), + NAME_FUNC_OFFSET(22953, gl_dispatch_stub_1240, gl_dispatch_stub_1240, NULL, 1240), + NAME_FUNC_OFFSET(22975, gl_dispatch_stub_1241, gl_dispatch_stub_1241, NULL, 1241), + NAME_FUNC_OFFSET(22999, gl_dispatch_stub_1242, gl_dispatch_stub_1242, NULL, 1242), + NAME_FUNC_OFFSET(23019, gl_dispatch_stub_1243, gl_dispatch_stub_1243, NULL, 1243), + NAME_FUNC_OFFSET(23040, gl_dispatch_stub_1244, gl_dispatch_stub_1244, NULL, 1244), + NAME_FUNC_OFFSET(23071, gl_dispatch_stub_1245, gl_dispatch_stub_1245, NULL, 1245), + NAME_FUNC_OFFSET(23102, gl_dispatch_stub_1246, gl_dispatch_stub_1246, NULL, 1246), + NAME_FUNC_OFFSET(23135, gl_dispatch_stub_1247, gl_dispatch_stub_1247, NULL, 1247), + NAME_FUNC_OFFSET(23163, gl_dispatch_stub_1248, gl_dispatch_stub_1248, NULL, 1248), + NAME_FUNC_OFFSET(23194, gl_dispatch_stub_1249, gl_dispatch_stub_1249, NULL, 1249), + NAME_FUNC_OFFSET(23220, gl_dispatch_stub_1250, gl_dispatch_stub_1250, NULL, 1250), + NAME_FUNC_OFFSET(23251, gl_dispatch_stub_1251, gl_dispatch_stub_1251, NULL, 1251), + NAME_FUNC_OFFSET(23279, gl_dispatch_stub_1252, gl_dispatch_stub_1252, NULL, 1252), + NAME_FUNC_OFFSET(23302, gl_dispatch_stub_1253, gl_dispatch_stub_1253, NULL, 1253), + NAME_FUNC_OFFSET(23327, gl_dispatch_stub_1254, gl_dispatch_stub_1254, NULL, 1254), + NAME_FUNC_OFFSET(23346, gl_dispatch_stub_1255, gl_dispatch_stub_1255, NULL, 1255), + NAME_FUNC_OFFSET(23371, gl_dispatch_stub_1256, gl_dispatch_stub_1256, NULL, 1256), + NAME_FUNC_OFFSET(23393, glTextureBarrierNV, glTextureBarrierNV, NULL, 1257), + NAME_FUNC_OFFSET(23412, gl_dispatch_stub_1258, gl_dispatch_stub_1258, NULL, 1258), + NAME_FUNC_OFFSET(23426, gl_dispatch_stub_1259, gl_dispatch_stub_1259, NULL, 1259), + NAME_FUNC_OFFSET(23448, gl_dispatch_stub_1260, gl_dispatch_stub_1260, NULL, 1260), + NAME_FUNC_OFFSET(23462, gl_dispatch_stub_1261, gl_dispatch_stub_1261, NULL, 1261), + NAME_FUNC_OFFSET(23481, gl_dispatch_stub_1262, gl_dispatch_stub_1262, NULL, 1262), + NAME_FUNC_OFFSET(23502, gl_dispatch_stub_1263, gl_dispatch_stub_1263, NULL, 1263), + NAME_FUNC_OFFSET(23533, gl_dispatch_stub_1264, gl_dispatch_stub_1264, NULL, 1264), + NAME_FUNC_OFFSET(23563, gl_dispatch_stub_1265, gl_dispatch_stub_1265, NULL, 1265), + NAME_FUNC_OFFSET(23586, gl_dispatch_stub_1266, gl_dispatch_stub_1266, NULL, 1266), + NAME_FUNC_OFFSET(23609, gl_dispatch_stub_1267, gl_dispatch_stub_1267, NULL, 1267), + NAME_FUNC_OFFSET(23636, gl_dispatch_stub_1268, gl_dispatch_stub_1268, NULL, 1268), + NAME_FUNC_OFFSET(23658, gl_dispatch_stub_1269, gl_dispatch_stub_1269, NULL, 1269), + NAME_FUNC_OFFSET(23681, gl_dispatch_stub_1270, gl_dispatch_stub_1270, NULL, 1270), + NAME_FUNC_OFFSET(23704, gl_dispatch_stub_1271, gl_dispatch_stub_1271, NULL, 1271), + NAME_FUNC_OFFSET(23724, gl_dispatch_stub_1272, gl_dispatch_stub_1272, NULL, 1272), + NAME_FUNC_OFFSET(23751, gl_dispatch_stub_1273, gl_dispatch_stub_1273, NULL, 1273), + NAME_FUNC_OFFSET(23777, gl_dispatch_stub_1274, gl_dispatch_stub_1274, NULL, 1274), + NAME_FUNC_OFFSET(23803, gl_dispatch_stub_1275, gl_dispatch_stub_1275, NULL, 1275), + NAME_FUNC_OFFSET(23827, gl_dispatch_stub_1276, gl_dispatch_stub_1276, NULL, 1276), + NAME_FUNC_OFFSET(23855, gl_dispatch_stub_1277, gl_dispatch_stub_1277, NULL, 1277), + NAME_FUNC_OFFSET(23879, gl_dispatch_stub_1278, gl_dispatch_stub_1278, NULL, 1278), + NAME_FUNC_OFFSET(23903, gl_dispatch_stub_1279, gl_dispatch_stub_1279, NULL, 1279), + NAME_FUNC_OFFSET(23925, gl_dispatch_stub_1280, gl_dispatch_stub_1280, NULL, 1280), + NAME_FUNC_OFFSET(23950, gl_dispatch_stub_1281, gl_dispatch_stub_1281, NULL, 1281), + NAME_FUNC_OFFSET(23979, gl_dispatch_stub_1282, gl_dispatch_stub_1282, NULL, 1282), + NAME_FUNC_OFFSET(24010, gl_dispatch_stub_1283, gl_dispatch_stub_1283, NULL, 1283), + NAME_FUNC_OFFSET(24049, gl_dispatch_stub_1284, gl_dispatch_stub_1284, NULL, 1284), + NAME_FUNC_OFFSET(24078, glAlphaFuncx, glAlphaFuncx, NULL, 1285), + NAME_FUNC_OFFSET(24091, glClearColorx, glClearColorx, NULL, 1286), + NAME_FUNC_OFFSET(24105, glClearDepthx, glClearDepthx, NULL, 1287), + NAME_FUNC_OFFSET(24119, glColor4x, glColor4x, NULL, 1288), + NAME_FUNC_OFFSET(24129, glDepthRangex, glDepthRangex, NULL, 1289), + NAME_FUNC_OFFSET(24143, glFogx, glFogx, NULL, 1290), + NAME_FUNC_OFFSET(24150, glFogxv, glFogxv, NULL, 1291), + NAME_FUNC_OFFSET(24158, glFrustumf, glFrustumf, NULL, 1292), + NAME_FUNC_OFFSET(24169, glFrustumx, glFrustumx, NULL, 1293), + NAME_FUNC_OFFSET(24180, glLightModelx, glLightModelx, NULL, 1294), + NAME_FUNC_OFFSET(24194, glLightModelxv, glLightModelxv, NULL, 1295), + NAME_FUNC_OFFSET(24209, glLightx, glLightx, NULL, 1296), + NAME_FUNC_OFFSET(24218, glLightxv, glLightxv, NULL, 1297), + NAME_FUNC_OFFSET(24228, glLineWidthx, glLineWidthx, NULL, 1298), + NAME_FUNC_OFFSET(24241, glLoadMatrixx, glLoadMatrixx, NULL, 1299), + NAME_FUNC_OFFSET(24255, glMaterialx, glMaterialx, NULL, 1300), + NAME_FUNC_OFFSET(24267, glMaterialxv, glMaterialxv, NULL, 1301), + NAME_FUNC_OFFSET(24280, glMultMatrixx, glMultMatrixx, NULL, 1302), + NAME_FUNC_OFFSET(24294, glMultiTexCoord4x, glMultiTexCoord4x, NULL, 1303), + NAME_FUNC_OFFSET(24312, glNormal3x, glNormal3x, NULL, 1304), + NAME_FUNC_OFFSET(24323, glOrthof, glOrthof, NULL, 1305), + NAME_FUNC_OFFSET(24332, glOrthox, glOrthox, NULL, 1306), + NAME_FUNC_OFFSET(24341, glPointSizex, glPointSizex, NULL, 1307), + NAME_FUNC_OFFSET(24354, glPolygonOffsetx, glPolygonOffsetx, NULL, 1308), + NAME_FUNC_OFFSET(24371, glRotatex, glRotatex, NULL, 1309), + NAME_FUNC_OFFSET(24381, glSampleCoveragex, glSampleCoveragex, NULL, 1310), + NAME_FUNC_OFFSET(24399, glScalex, glScalex, NULL, 1311), + NAME_FUNC_OFFSET(24408, glTexEnvx, glTexEnvx, NULL, 1312), + NAME_FUNC_OFFSET(24418, glTexEnvxv, glTexEnvxv, NULL, 1313), + NAME_FUNC_OFFSET(24429, glTexParameterx, glTexParameterx, NULL, 1314), + NAME_FUNC_OFFSET(24445, glTranslatex, glTranslatex, NULL, 1315), + NAME_FUNC_OFFSET(24458, glClipPlanef, glClipPlanef, NULL, 1316), + NAME_FUNC_OFFSET(24471, glClipPlanex, glClipPlanex, NULL, 1317), + NAME_FUNC_OFFSET(24484, glGetClipPlanef, glGetClipPlanef, NULL, 1318), + NAME_FUNC_OFFSET(24500, glGetClipPlanex, glGetClipPlanex, NULL, 1319), + NAME_FUNC_OFFSET(24516, glGetFixedv, glGetFixedv, NULL, 1320), + NAME_FUNC_OFFSET(24528, glGetLightxv, glGetLightxv, NULL, 1321), + NAME_FUNC_OFFSET(24541, glGetMaterialxv, glGetMaterialxv, NULL, 1322), + NAME_FUNC_OFFSET(24557, glGetTexEnvxv, glGetTexEnvxv, NULL, 1323), + NAME_FUNC_OFFSET(24571, glGetTexParameterxv, glGetTexParameterxv, NULL, 1324), + NAME_FUNC_OFFSET(24591, glPointParameterx, glPointParameterx, NULL, 1325), + NAME_FUNC_OFFSET(24609, glPointParameterxv, glPointParameterxv, NULL, 1326), + NAME_FUNC_OFFSET(24628, glTexParameterxv, glTexParameterxv, NULL, 1327), + NAME_FUNC_OFFSET(24645, glBlendBarrier, glBlendBarrier, NULL, 1328), + NAME_FUNC_OFFSET(24660, glPrimitiveBoundingBox, glPrimitiveBoundingBox, NULL, 1329), + NAME_FUNC_OFFSET(24683, glTexGenf, glTexGenf, NULL, 190), + NAME_FUNC_OFFSET(24696, glTexGenfv, glTexGenfv, NULL, 191), + NAME_FUNC_OFFSET(24710, glTexGeni, glTexGeni, NULL, 192), + NAME_FUNC_OFFSET(24723, glTexGeniv, glTexGeniv, NULL, 193), + NAME_FUNC_OFFSET(24737, glReadBuffer, glReadBuffer, NULL, 254), + NAME_FUNC_OFFSET(24752, glGetTexGenfv, glGetTexGenfv, NULL, 279), + NAME_FUNC_OFFSET(24769, glGetTexGeniv, glGetTexGeniv, NULL, 280), + NAME_FUNC_OFFSET(24786, glArrayElement, glArrayElement, NULL, 306), + NAME_FUNC_OFFSET(24804, glBindTexture, glBindTexture, NULL, 307), + NAME_FUNC_OFFSET(24821, glDrawArrays, glDrawArrays, NULL, 310), + NAME_FUNC_OFFSET(24837, glAreTexturesResident, glAreTexturesResidentEXT, glAreTexturesResidentEXT, 322), + NAME_FUNC_OFFSET(24862, glCopyTexImage1D, glCopyTexImage1D, NULL, 323), + NAME_FUNC_OFFSET(24882, glCopyTexImage2D, glCopyTexImage2D, NULL, 324), + NAME_FUNC_OFFSET(24902, glCopyTexSubImage1D, glCopyTexSubImage1D, NULL, 325), + NAME_FUNC_OFFSET(24925, glCopyTexSubImage2D, glCopyTexSubImage2D, NULL, 326), + NAME_FUNC_OFFSET(24948, glDeleteTextures, glDeleteTexturesEXT, glDeleteTexturesEXT, 327), + NAME_FUNC_OFFSET(24968, glGenTextures, glGenTexturesEXT, glGenTexturesEXT, 328), + NAME_FUNC_OFFSET(24985, glGetPointerv, glGetPointerv, NULL, 329), + NAME_FUNC_OFFSET(25002, glGetPointerv, glGetPointerv, NULL, 329), + NAME_FUNC_OFFSET(25019, glIsTexture, glIsTextureEXT, glIsTextureEXT, 330), + NAME_FUNC_OFFSET(25034, glPrioritizeTextures, glPrioritizeTextures, NULL, 331), + NAME_FUNC_OFFSET(25058, glTexSubImage1D, glTexSubImage1D, NULL, 332), + NAME_FUNC_OFFSET(25077, glTexSubImage2D, glTexSubImage2D, NULL, 333), + NAME_FUNC_OFFSET(25096, glBlendColor, glBlendColor, NULL, 336), + NAME_FUNC_OFFSET(25112, glBlendEquation, glBlendEquation, NULL, 337), + NAME_FUNC_OFFSET(25131, glBlendEquation, glBlendEquation, NULL, 337), + NAME_FUNC_OFFSET(25150, glDrawRangeElements, glDrawRangeElements, NULL, 338), + NAME_FUNC_OFFSET(25173, glColorTable, glColorTable, NULL, 339), + NAME_FUNC_OFFSET(25189, glColorTable, glColorTable, NULL, 339), + NAME_FUNC_OFFSET(25205, glColorTableParameterfv, glColorTableParameterfv, NULL, 340), + NAME_FUNC_OFFSET(25232, glColorTableParameteriv, glColorTableParameteriv, NULL, 341), + NAME_FUNC_OFFSET(25259, glCopyColorTable, glCopyColorTable, NULL, 342), + NAME_FUNC_OFFSET(25279, glGetColorTable, gl_dispatch_stub_343, gl_dispatch_stub_343, 343), + NAME_FUNC_OFFSET(25298, glGetColorTable, gl_dispatch_stub_343, gl_dispatch_stub_343, 343), + NAME_FUNC_OFFSET(25317, glGetColorTableParameterfv, gl_dispatch_stub_344, gl_dispatch_stub_344, 344), + NAME_FUNC_OFFSET(25347, glGetColorTableParameterfv, gl_dispatch_stub_344, gl_dispatch_stub_344, 344), + NAME_FUNC_OFFSET(25377, glGetColorTableParameteriv, gl_dispatch_stub_345, gl_dispatch_stub_345, 345), + NAME_FUNC_OFFSET(25407, glGetColorTableParameteriv, gl_dispatch_stub_345, gl_dispatch_stub_345, 345), + NAME_FUNC_OFFSET(25437, glColorSubTable, glColorSubTable, NULL, 346), + NAME_FUNC_OFFSET(25456, glCopyColorSubTable, glCopyColorSubTable, NULL, 347), + NAME_FUNC_OFFSET(25479, glConvolutionFilter1D, glConvolutionFilter1D, NULL, 348), + NAME_FUNC_OFFSET(25504, glConvolutionFilter2D, glConvolutionFilter2D, NULL, 349), + NAME_FUNC_OFFSET(25529, glConvolutionParameterf, glConvolutionParameterf, NULL, 350), + NAME_FUNC_OFFSET(25556, glConvolutionParameterfv, glConvolutionParameterfv, NULL, 351), + NAME_FUNC_OFFSET(25584, glConvolutionParameteri, glConvolutionParameteri, NULL, 352), + NAME_FUNC_OFFSET(25611, glConvolutionParameteriv, glConvolutionParameteriv, NULL, 353), + NAME_FUNC_OFFSET(25639, glCopyConvolutionFilter1D, glCopyConvolutionFilter1D, NULL, 354), + NAME_FUNC_OFFSET(25668, glCopyConvolutionFilter2D, glCopyConvolutionFilter2D, NULL, 355), + NAME_FUNC_OFFSET(25697, glGetConvolutionFilter, gl_dispatch_stub_356, gl_dispatch_stub_356, 356), + NAME_FUNC_OFFSET(25723, glGetConvolutionParameterfv, gl_dispatch_stub_357, gl_dispatch_stub_357, 357), + NAME_FUNC_OFFSET(25754, glGetConvolutionParameteriv, gl_dispatch_stub_358, gl_dispatch_stub_358, 358), + NAME_FUNC_OFFSET(25785, glGetSeparableFilter, gl_dispatch_stub_359, gl_dispatch_stub_359, 359), + NAME_FUNC_OFFSET(25809, glSeparableFilter2D, glSeparableFilter2D, NULL, 360), + NAME_FUNC_OFFSET(25832, glGetHistogram, gl_dispatch_stub_361, gl_dispatch_stub_361, 361), + NAME_FUNC_OFFSET(25850, glGetHistogramParameterfv, gl_dispatch_stub_362, gl_dispatch_stub_362, 362), + NAME_FUNC_OFFSET(25879, glGetHistogramParameteriv, gl_dispatch_stub_363, gl_dispatch_stub_363, 363), + NAME_FUNC_OFFSET(25908, glGetMinmax, gl_dispatch_stub_364, gl_dispatch_stub_364, 364), + NAME_FUNC_OFFSET(25923, glGetMinmaxParameterfv, gl_dispatch_stub_365, gl_dispatch_stub_365, 365), + NAME_FUNC_OFFSET(25949, glGetMinmaxParameteriv, gl_dispatch_stub_366, gl_dispatch_stub_366, 366), + NAME_FUNC_OFFSET(25975, glHistogram, glHistogram, NULL, 367), + NAME_FUNC_OFFSET(25990, glMinmax, glMinmax, NULL, 368), + NAME_FUNC_OFFSET(26002, glResetHistogram, glResetHistogram, NULL, 369), + NAME_FUNC_OFFSET(26022, glResetMinmax, glResetMinmax, NULL, 370), + NAME_FUNC_OFFSET(26039, glTexImage3D, glTexImage3D, NULL, 371), + NAME_FUNC_OFFSET(26055, glTexImage3D, glTexImage3D, NULL, 371), + NAME_FUNC_OFFSET(26071, glTexSubImage3D, glTexSubImage3D, NULL, 372), + NAME_FUNC_OFFSET(26090, glTexSubImage3D, glTexSubImage3D, NULL, 372), + NAME_FUNC_OFFSET(26109, glCopyTexSubImage3D, glCopyTexSubImage3D, NULL, 373), + NAME_FUNC_OFFSET(26132, glCopyTexSubImage3D, glCopyTexSubImage3D, NULL, 373), + NAME_FUNC_OFFSET(26155, glActiveTexture, glActiveTexture, NULL, 374), + NAME_FUNC_OFFSET(26174, glClientActiveTexture, glClientActiveTexture, NULL, 375), + NAME_FUNC_OFFSET(26199, glMultiTexCoord1d, glMultiTexCoord1d, NULL, 376), + NAME_FUNC_OFFSET(26220, glMultiTexCoord1dv, glMultiTexCoord1dv, NULL, 377), + NAME_FUNC_OFFSET(26242, glMultiTexCoord1fARB, glMultiTexCoord1fARB, NULL, 378), + NAME_FUNC_OFFSET(26260, glMultiTexCoord1fvARB, glMultiTexCoord1fvARB, NULL, 379), + NAME_FUNC_OFFSET(26279, glMultiTexCoord1i, glMultiTexCoord1i, NULL, 380), + NAME_FUNC_OFFSET(26300, glMultiTexCoord1iv, glMultiTexCoord1iv, NULL, 381), + NAME_FUNC_OFFSET(26322, glMultiTexCoord1s, glMultiTexCoord1s, NULL, 382), + NAME_FUNC_OFFSET(26343, glMultiTexCoord1sv, glMultiTexCoord1sv, NULL, 383), + NAME_FUNC_OFFSET(26365, glMultiTexCoord2d, glMultiTexCoord2d, NULL, 384), + NAME_FUNC_OFFSET(26386, glMultiTexCoord2dv, glMultiTexCoord2dv, NULL, 385), + NAME_FUNC_OFFSET(26408, glMultiTexCoord2fARB, glMultiTexCoord2fARB, NULL, 386), + NAME_FUNC_OFFSET(26426, glMultiTexCoord2fvARB, glMultiTexCoord2fvARB, NULL, 387), + NAME_FUNC_OFFSET(26445, glMultiTexCoord2i, glMultiTexCoord2i, NULL, 388), + NAME_FUNC_OFFSET(26466, glMultiTexCoord2iv, glMultiTexCoord2iv, NULL, 389), + NAME_FUNC_OFFSET(26488, glMultiTexCoord2s, glMultiTexCoord2s, NULL, 390), + NAME_FUNC_OFFSET(26509, glMultiTexCoord2sv, glMultiTexCoord2sv, NULL, 391), + NAME_FUNC_OFFSET(26531, glMultiTexCoord3d, glMultiTexCoord3d, NULL, 392), + NAME_FUNC_OFFSET(26552, glMultiTexCoord3dv, glMultiTexCoord3dv, NULL, 393), + NAME_FUNC_OFFSET(26574, glMultiTexCoord3fARB, glMultiTexCoord3fARB, NULL, 394), + NAME_FUNC_OFFSET(26592, glMultiTexCoord3fvARB, glMultiTexCoord3fvARB, NULL, 395), + NAME_FUNC_OFFSET(26611, glMultiTexCoord3i, glMultiTexCoord3i, NULL, 396), + NAME_FUNC_OFFSET(26632, glMultiTexCoord3iv, glMultiTexCoord3iv, NULL, 397), + NAME_FUNC_OFFSET(26654, glMultiTexCoord3s, glMultiTexCoord3s, NULL, 398), + NAME_FUNC_OFFSET(26675, glMultiTexCoord3sv, glMultiTexCoord3sv, NULL, 399), + NAME_FUNC_OFFSET(26697, glMultiTexCoord4d, glMultiTexCoord4d, NULL, 400), + NAME_FUNC_OFFSET(26718, glMultiTexCoord4dv, glMultiTexCoord4dv, NULL, 401), + NAME_FUNC_OFFSET(26740, glMultiTexCoord4fARB, glMultiTexCoord4fARB, NULL, 402), + NAME_FUNC_OFFSET(26758, glMultiTexCoord4fvARB, glMultiTexCoord4fvARB, NULL, 403), + NAME_FUNC_OFFSET(26777, glMultiTexCoord4i, glMultiTexCoord4i, NULL, 404), + NAME_FUNC_OFFSET(26798, glMultiTexCoord4iv, glMultiTexCoord4iv, NULL, 405), + NAME_FUNC_OFFSET(26820, glMultiTexCoord4s, glMultiTexCoord4s, NULL, 406), + NAME_FUNC_OFFSET(26841, glMultiTexCoord4sv, glMultiTexCoord4sv, NULL, 407), + NAME_FUNC_OFFSET(26863, glCompressedTexImage1D, glCompressedTexImage1D, NULL, 408), + NAME_FUNC_OFFSET(26889, glCompressedTexImage2D, glCompressedTexImage2D, NULL, 409), + NAME_FUNC_OFFSET(26915, glCompressedTexImage3D, glCompressedTexImage3D, NULL, 410), + NAME_FUNC_OFFSET(26941, glCompressedTexImage3D, glCompressedTexImage3D, NULL, 410), + NAME_FUNC_OFFSET(26967, glCompressedTexSubImage1D, glCompressedTexSubImage1D, NULL, 411), + NAME_FUNC_OFFSET(26996, glCompressedTexSubImage2D, glCompressedTexSubImage2D, NULL, 412), + NAME_FUNC_OFFSET(27025, glCompressedTexSubImage3D, glCompressedTexSubImage3D, NULL, 413), + NAME_FUNC_OFFSET(27054, glCompressedTexSubImage3D, glCompressedTexSubImage3D, NULL, 413), + NAME_FUNC_OFFSET(27083, glGetCompressedTexImage, glGetCompressedTexImage, NULL, 414), + NAME_FUNC_OFFSET(27110, glLoadTransposeMatrixd, glLoadTransposeMatrixd, NULL, 415), + NAME_FUNC_OFFSET(27136, glLoadTransposeMatrixf, glLoadTransposeMatrixf, NULL, 416), + NAME_FUNC_OFFSET(27162, glMultTransposeMatrixd, glMultTransposeMatrixd, NULL, 417), + NAME_FUNC_OFFSET(27188, glMultTransposeMatrixf, glMultTransposeMatrixf, NULL, 418), + NAME_FUNC_OFFSET(27214, glSampleCoverage, glSampleCoverage, NULL, 419), + NAME_FUNC_OFFSET(27234, glBlendFuncSeparate, glBlendFuncSeparate, NULL, 420), + NAME_FUNC_OFFSET(27257, glBlendFuncSeparate, glBlendFuncSeparate, NULL, 420), + NAME_FUNC_OFFSET(27281, glBlendFuncSeparate, glBlendFuncSeparate, NULL, 420), + NAME_FUNC_OFFSET(27304, glFogCoordPointer, glFogCoordPointer, NULL, 421), + NAME_FUNC_OFFSET(27325, glFogCoordd, glFogCoordd, NULL, 422), + NAME_FUNC_OFFSET(27340, glFogCoorddv, glFogCoorddv, NULL, 423), + NAME_FUNC_OFFSET(27356, glMultiDrawArrays, glMultiDrawArrays, NULL, 424), + NAME_FUNC_OFFSET(27377, glPointParameterf, glPointParameterf, NULL, 425), + NAME_FUNC_OFFSET(27398, glPointParameterf, glPointParameterf, NULL, 425), + NAME_FUNC_OFFSET(27419, glPointParameterf, glPointParameterf, NULL, 425), + NAME_FUNC_OFFSET(27441, glPointParameterfv, glPointParameterfv, NULL, 426), + NAME_FUNC_OFFSET(27463, glPointParameterfv, glPointParameterfv, NULL, 426), + NAME_FUNC_OFFSET(27485, glPointParameterfv, glPointParameterfv, NULL, 426), + NAME_FUNC_OFFSET(27508, glPointParameteri, glPointParameteri, NULL, 427), + NAME_FUNC_OFFSET(27528, glPointParameteriv, glPointParameteriv, NULL, 428), + NAME_FUNC_OFFSET(27549, glSecondaryColor3b, glSecondaryColor3b, NULL, 429), + NAME_FUNC_OFFSET(27571, glSecondaryColor3bv, glSecondaryColor3bv, NULL, 430), + NAME_FUNC_OFFSET(27594, glSecondaryColor3d, glSecondaryColor3d, NULL, 431), + NAME_FUNC_OFFSET(27616, glSecondaryColor3dv, glSecondaryColor3dv, NULL, 432), + NAME_FUNC_OFFSET(27639, glSecondaryColor3i, glSecondaryColor3i, NULL, 433), + NAME_FUNC_OFFSET(27661, glSecondaryColor3iv, glSecondaryColor3iv, NULL, 434), + NAME_FUNC_OFFSET(27684, glSecondaryColor3s, glSecondaryColor3s, NULL, 435), + NAME_FUNC_OFFSET(27706, glSecondaryColor3sv, glSecondaryColor3sv, NULL, 436), + NAME_FUNC_OFFSET(27729, glSecondaryColor3ub, glSecondaryColor3ub, NULL, 437), + NAME_FUNC_OFFSET(27752, glSecondaryColor3ubv, glSecondaryColor3ubv, NULL, 438), + NAME_FUNC_OFFSET(27776, glSecondaryColor3ui, glSecondaryColor3ui, NULL, 439), + NAME_FUNC_OFFSET(27799, glSecondaryColor3uiv, glSecondaryColor3uiv, NULL, 440), + NAME_FUNC_OFFSET(27823, glSecondaryColor3us, glSecondaryColor3us, NULL, 441), + NAME_FUNC_OFFSET(27846, glSecondaryColor3usv, glSecondaryColor3usv, NULL, 442), + NAME_FUNC_OFFSET(27870, glSecondaryColorPointer, glSecondaryColorPointer, NULL, 443), + NAME_FUNC_OFFSET(27897, glWindowPos2d, glWindowPos2d, NULL, 444), + NAME_FUNC_OFFSET(27914, glWindowPos2d, glWindowPos2d, NULL, 444), + NAME_FUNC_OFFSET(27932, glWindowPos2dv, glWindowPos2dv, NULL, 445), + NAME_FUNC_OFFSET(27950, glWindowPos2dv, glWindowPos2dv, NULL, 445), + NAME_FUNC_OFFSET(27969, glWindowPos2f, glWindowPos2f, NULL, 446), + NAME_FUNC_OFFSET(27986, glWindowPos2f, glWindowPos2f, NULL, 446), + NAME_FUNC_OFFSET(28004, glWindowPos2fv, glWindowPos2fv, NULL, 447), + NAME_FUNC_OFFSET(28022, glWindowPos2fv, glWindowPos2fv, NULL, 447), + NAME_FUNC_OFFSET(28041, glWindowPos2i, glWindowPos2i, NULL, 448), + NAME_FUNC_OFFSET(28058, glWindowPos2i, glWindowPos2i, NULL, 448), + NAME_FUNC_OFFSET(28076, glWindowPos2iv, glWindowPos2iv, NULL, 449), + NAME_FUNC_OFFSET(28094, glWindowPos2iv, glWindowPos2iv, NULL, 449), + NAME_FUNC_OFFSET(28113, glWindowPos2s, glWindowPos2s, NULL, 450), + NAME_FUNC_OFFSET(28130, glWindowPos2s, glWindowPos2s, NULL, 450), + NAME_FUNC_OFFSET(28148, glWindowPos2sv, glWindowPos2sv, NULL, 451), + NAME_FUNC_OFFSET(28166, glWindowPos2sv, glWindowPos2sv, NULL, 451), + NAME_FUNC_OFFSET(28185, glWindowPos3d, glWindowPos3d, NULL, 452), + NAME_FUNC_OFFSET(28202, glWindowPos3d, glWindowPos3d, NULL, 452), + NAME_FUNC_OFFSET(28220, glWindowPos3dv, glWindowPos3dv, NULL, 453), + NAME_FUNC_OFFSET(28238, glWindowPos3dv, glWindowPos3dv, NULL, 453), + NAME_FUNC_OFFSET(28257, glWindowPos3f, glWindowPos3f, NULL, 454), + NAME_FUNC_OFFSET(28274, glWindowPos3f, glWindowPos3f, NULL, 454), + NAME_FUNC_OFFSET(28292, glWindowPos3fv, glWindowPos3fv, NULL, 455), + NAME_FUNC_OFFSET(28310, glWindowPos3fv, glWindowPos3fv, NULL, 455), + NAME_FUNC_OFFSET(28329, glWindowPos3i, glWindowPos3i, NULL, 456), + NAME_FUNC_OFFSET(28346, glWindowPos3i, glWindowPos3i, NULL, 456), + NAME_FUNC_OFFSET(28364, glWindowPos3iv, glWindowPos3iv, NULL, 457), + NAME_FUNC_OFFSET(28382, glWindowPos3iv, glWindowPos3iv, NULL, 457), + NAME_FUNC_OFFSET(28401, glWindowPos3s, glWindowPos3s, NULL, 458), + NAME_FUNC_OFFSET(28418, glWindowPos3s, glWindowPos3s, NULL, 458), + NAME_FUNC_OFFSET(28436, glWindowPos3sv, glWindowPos3sv, NULL, 459), + NAME_FUNC_OFFSET(28454, glWindowPos3sv, glWindowPos3sv, NULL, 459), + NAME_FUNC_OFFSET(28473, glBeginQuery, glBeginQuery, NULL, 460), + NAME_FUNC_OFFSET(28489, glBindBuffer, glBindBuffer, NULL, 461), + NAME_FUNC_OFFSET(28505, glBufferData, glBufferData, NULL, 462), + NAME_FUNC_OFFSET(28521, glBufferSubData, glBufferSubData, NULL, 463), + NAME_FUNC_OFFSET(28540, glDeleteBuffers, glDeleteBuffers, NULL, 464), + NAME_FUNC_OFFSET(28559, glDeleteQueries, glDeleteQueries, NULL, 465), + NAME_FUNC_OFFSET(28578, glEndQuery, glEndQuery, NULL, 466), + NAME_FUNC_OFFSET(28592, glGenBuffers, glGenBuffers, NULL, 467), + NAME_FUNC_OFFSET(28608, glGenQueries, glGenQueries, NULL, 468), + NAME_FUNC_OFFSET(28624, glGetBufferParameteriv, glGetBufferParameteriv, NULL, 469), + NAME_FUNC_OFFSET(28650, glGetBufferPointerv, glGetBufferPointerv, NULL, 470), + NAME_FUNC_OFFSET(28673, glGetBufferPointerv, glGetBufferPointerv, NULL, 470), + NAME_FUNC_OFFSET(28696, glGetBufferSubData, glGetBufferSubData, NULL, 471), + NAME_FUNC_OFFSET(28718, glGetQueryObjectiv, glGetQueryObjectiv, NULL, 472), + NAME_FUNC_OFFSET(28740, glGetQueryObjectuiv, glGetQueryObjectuiv, NULL, 473), + NAME_FUNC_OFFSET(28763, glGetQueryiv, glGetQueryiv, NULL, 474), + NAME_FUNC_OFFSET(28779, glIsBuffer, glIsBuffer, NULL, 475), + NAME_FUNC_OFFSET(28793, glIsQuery, glIsQuery, NULL, 476), + NAME_FUNC_OFFSET(28806, glMapBuffer, glMapBuffer, NULL, 477), + NAME_FUNC_OFFSET(28821, glMapBuffer, glMapBuffer, NULL, 477), + NAME_FUNC_OFFSET(28836, glUnmapBuffer, glUnmapBuffer, NULL, 478), + NAME_FUNC_OFFSET(28853, glUnmapBuffer, glUnmapBuffer, NULL, 478), + NAME_FUNC_OFFSET(28870, glBindAttribLocation, glBindAttribLocation, NULL, 480), + NAME_FUNC_OFFSET(28894, glBlendEquationSeparate, glBlendEquationSeparate, NULL, 481), + NAME_FUNC_OFFSET(28921, glBlendEquationSeparate, glBlendEquationSeparate, NULL, 481), + NAME_FUNC_OFFSET(28948, glBlendEquationSeparate, glBlendEquationSeparate, NULL, 481), + NAME_FUNC_OFFSET(28975, glCompileShader, glCompileShader, NULL, 482), + NAME_FUNC_OFFSET(28994, glDisableVertexAttribArray, glDisableVertexAttribArray, NULL, 488), + NAME_FUNC_OFFSET(29024, glDrawBuffers, glDrawBuffers, NULL, 489), + NAME_FUNC_OFFSET(29041, glDrawBuffers, glDrawBuffers, NULL, 489), + NAME_FUNC_OFFSET(29058, glDrawBuffers, glDrawBuffers, NULL, 489), + NAME_FUNC_OFFSET(29074, glDrawBuffers, glDrawBuffers, NULL, 489), + NAME_FUNC_OFFSET(29091, glEnableVertexAttribArray, glEnableVertexAttribArray, NULL, 490), + NAME_FUNC_OFFSET(29120, glGetActiveAttrib, glGetActiveAttrib, NULL, 491), + NAME_FUNC_OFFSET(29141, glGetActiveUniform, glGetActiveUniform, NULL, 492), + NAME_FUNC_OFFSET(29163, glGetAttribLocation, glGetAttribLocation, NULL, 494), + NAME_FUNC_OFFSET(29186, glGetShaderSource, glGetShaderSource, NULL, 498), + NAME_FUNC_OFFSET(29207, glGetUniformLocation, glGetUniformLocation, NULL, 500), + NAME_FUNC_OFFSET(29231, glGetUniformfv, glGetUniformfv, NULL, 501), + NAME_FUNC_OFFSET(29249, glGetUniformiv, glGetUniformiv, NULL, 502), + NAME_FUNC_OFFSET(29267, glGetVertexAttribPointerv, glGetVertexAttribPointerv, NULL, 503), + NAME_FUNC_OFFSET(29296, glGetVertexAttribPointerv, glGetVertexAttribPointerv, NULL, 503), + NAME_FUNC_OFFSET(29324, glGetVertexAttribdv, glGetVertexAttribdv, NULL, 504), + NAME_FUNC_OFFSET(29347, glGetVertexAttribfv, glGetVertexAttribfv, NULL, 505), + NAME_FUNC_OFFSET(29370, glGetVertexAttribiv, glGetVertexAttribiv, NULL, 506), + NAME_FUNC_OFFSET(29393, glLinkProgram, glLinkProgram, NULL, 509), + NAME_FUNC_OFFSET(29410, glShaderSource, glShaderSource, NULL, 510), + NAME_FUNC_OFFSET(29428, glStencilOpSeparate, glStencilOpSeparate, NULL, 513), + NAME_FUNC_OFFSET(29451, glUniform1f, glUniform1f, NULL, 514), + NAME_FUNC_OFFSET(29466, glUniform1fv, glUniform1fv, NULL, 515), + NAME_FUNC_OFFSET(29482, glUniform1i, glUniform1i, NULL, 516), + NAME_FUNC_OFFSET(29497, glUniform1iv, glUniform1iv, NULL, 517), + NAME_FUNC_OFFSET(29513, glUniform2f, glUniform2f, NULL, 518), + NAME_FUNC_OFFSET(29528, glUniform2fv, glUniform2fv, NULL, 519), + NAME_FUNC_OFFSET(29544, glUniform2i, glUniform2i, NULL, 520), + NAME_FUNC_OFFSET(29559, glUniform2iv, glUniform2iv, NULL, 521), + NAME_FUNC_OFFSET(29575, glUniform3f, glUniform3f, NULL, 522), + NAME_FUNC_OFFSET(29590, glUniform3fv, glUniform3fv, NULL, 523), + NAME_FUNC_OFFSET(29606, glUniform3i, glUniform3i, NULL, 524), + NAME_FUNC_OFFSET(29621, glUniform3iv, glUniform3iv, NULL, 525), + NAME_FUNC_OFFSET(29637, glUniform4f, glUniform4f, NULL, 526), + NAME_FUNC_OFFSET(29652, glUniform4fv, glUniform4fv, NULL, 527), + NAME_FUNC_OFFSET(29668, glUniform4i, glUniform4i, NULL, 528), + NAME_FUNC_OFFSET(29683, glUniform4iv, glUniform4iv, NULL, 529), + NAME_FUNC_OFFSET(29699, glUniformMatrix2fv, glUniformMatrix2fv, NULL, 530), + NAME_FUNC_OFFSET(29721, glUniformMatrix3fv, glUniformMatrix3fv, NULL, 531), + NAME_FUNC_OFFSET(29743, glUniformMatrix4fv, glUniformMatrix4fv, NULL, 532), + NAME_FUNC_OFFSET(29765, glUseProgram, glUseProgram, NULL, 533), + NAME_FUNC_OFFSET(29787, glValidateProgram, glValidateProgram, NULL, 534), + NAME_FUNC_OFFSET(29808, glVertexAttrib1d, glVertexAttrib1d, NULL, 535), + NAME_FUNC_OFFSET(29828, glVertexAttrib1dv, glVertexAttrib1dv, NULL, 536), + NAME_FUNC_OFFSET(29849, glVertexAttrib1s, glVertexAttrib1s, NULL, 537), + NAME_FUNC_OFFSET(29869, glVertexAttrib1sv, glVertexAttrib1sv, NULL, 538), + NAME_FUNC_OFFSET(29890, glVertexAttrib2d, glVertexAttrib2d, NULL, 539), + NAME_FUNC_OFFSET(29910, glVertexAttrib2dv, glVertexAttrib2dv, NULL, 540), + NAME_FUNC_OFFSET(29931, glVertexAttrib2s, glVertexAttrib2s, NULL, 541), + NAME_FUNC_OFFSET(29951, glVertexAttrib2sv, glVertexAttrib2sv, NULL, 542), + NAME_FUNC_OFFSET(29972, glVertexAttrib3d, glVertexAttrib3d, NULL, 543), + NAME_FUNC_OFFSET(29992, glVertexAttrib3dv, glVertexAttrib3dv, NULL, 544), + NAME_FUNC_OFFSET(30013, glVertexAttrib3s, glVertexAttrib3s, NULL, 545), + NAME_FUNC_OFFSET(30033, glVertexAttrib3sv, glVertexAttrib3sv, NULL, 546), + NAME_FUNC_OFFSET(30054, glVertexAttrib4Nbv, glVertexAttrib4Nbv, NULL, 547), + NAME_FUNC_OFFSET(30076, glVertexAttrib4Niv, glVertexAttrib4Niv, NULL, 548), + NAME_FUNC_OFFSET(30098, glVertexAttrib4Nsv, glVertexAttrib4Nsv, NULL, 549), + NAME_FUNC_OFFSET(30120, glVertexAttrib4Nub, glVertexAttrib4Nub, NULL, 550), + NAME_FUNC_OFFSET(30142, glVertexAttrib4Nubv, glVertexAttrib4Nubv, NULL, 551), + NAME_FUNC_OFFSET(30165, glVertexAttrib4Nuiv, glVertexAttrib4Nuiv, NULL, 552), + NAME_FUNC_OFFSET(30188, glVertexAttrib4Nusv, glVertexAttrib4Nusv, NULL, 553), + NAME_FUNC_OFFSET(30211, glVertexAttrib4bv, glVertexAttrib4bv, NULL, 554), + NAME_FUNC_OFFSET(30232, glVertexAttrib4d, glVertexAttrib4d, NULL, 555), + NAME_FUNC_OFFSET(30252, glVertexAttrib4dv, glVertexAttrib4dv, NULL, 556), + NAME_FUNC_OFFSET(30273, glVertexAttrib4iv, glVertexAttrib4iv, NULL, 557), + NAME_FUNC_OFFSET(30294, glVertexAttrib4s, glVertexAttrib4s, NULL, 558), + NAME_FUNC_OFFSET(30314, glVertexAttrib4sv, glVertexAttrib4sv, NULL, 559), + NAME_FUNC_OFFSET(30335, glVertexAttrib4ubv, glVertexAttrib4ubv, NULL, 560), + NAME_FUNC_OFFSET(30357, glVertexAttrib4uiv, glVertexAttrib4uiv, NULL, 561), + NAME_FUNC_OFFSET(30379, glVertexAttrib4usv, glVertexAttrib4usv, NULL, 562), + NAME_FUNC_OFFSET(30401, glVertexAttribPointer, glVertexAttribPointer, NULL, 563), + NAME_FUNC_OFFSET(30426, glBeginConditionalRender, glBeginConditionalRender, NULL, 570), + NAME_FUNC_OFFSET(30453, glBeginTransformFeedback, glBeginTransformFeedback, NULL, 571), + NAME_FUNC_OFFSET(30481, glBindBufferBase, glBindBufferBase, NULL, 572), + NAME_FUNC_OFFSET(30501, glBindBufferRange, glBindBufferRange, NULL, 573), + NAME_FUNC_OFFSET(30522, glBindFragDataLocation, glBindFragDataLocation, NULL, 574), + NAME_FUNC_OFFSET(30548, glClampColor, glClampColor, NULL, 575), + NAME_FUNC_OFFSET(30564, glColorMaski, glColorMaski, NULL, 580), + NAME_FUNC_OFFSET(30586, glColorMaski, glColorMaski, NULL, 580), + NAME_FUNC_OFFSET(30602, glColorMaski, glColorMaski, NULL, 580), + NAME_FUNC_OFFSET(30618, glDisablei, glDisablei, NULL, 581), + NAME_FUNC_OFFSET(30638, glDisablei, glDisablei, NULL, 581), + NAME_FUNC_OFFSET(30652, glDisablei, glDisablei, NULL, 581), + NAME_FUNC_OFFSET(30666, glEnablei, glEnablei, NULL, 582), + NAME_FUNC_OFFSET(30685, glEnablei, glEnablei, NULL, 582), + NAME_FUNC_OFFSET(30698, glEnablei, glEnablei, NULL, 582), + NAME_FUNC_OFFSET(30711, glEndConditionalRender, glEndConditionalRender, NULL, 583), + NAME_FUNC_OFFSET(30736, glEndTransformFeedback, glEndTransformFeedback, NULL, 584), + NAME_FUNC_OFFSET(30762, glGetBooleani_v, glGetBooleani_v, NULL, 585), + NAME_FUNC_OFFSET(30786, glGetFragDataLocation, glGetFragDataLocation, NULL, 586), + NAME_FUNC_OFFSET(30811, glGetIntegeri_v, glGetIntegeri_v, NULL, 587), + NAME_FUNC_OFFSET(30835, glGetTexParameterIiv, glGetTexParameterIiv, NULL, 589), + NAME_FUNC_OFFSET(30859, glGetTexParameterIiv, glGetTexParameterIiv, NULL, 589), + NAME_FUNC_OFFSET(30883, glGetTexParameterIuiv, glGetTexParameterIuiv, NULL, 590), + NAME_FUNC_OFFSET(30908, glGetTexParameterIuiv, glGetTexParameterIuiv, NULL, 590), + NAME_FUNC_OFFSET(30933, glGetTransformFeedbackVarying, glGetTransformFeedbackVarying, NULL, 591), + NAME_FUNC_OFFSET(30966, glGetUniformuiv, glGetUniformuiv, NULL, 592), + NAME_FUNC_OFFSET(30985, glGetVertexAttribIiv, glGetVertexAttribIiv, NULL, 593), + NAME_FUNC_OFFSET(31009, glGetVertexAttribIuiv, glGetVertexAttribIuiv, NULL, 594), + NAME_FUNC_OFFSET(31034, glIsEnabledi, glIsEnabledi, NULL, 595), + NAME_FUNC_OFFSET(31056, glIsEnabledi, glIsEnabledi, NULL, 595), + NAME_FUNC_OFFSET(31072, glIsEnabledi, glIsEnabledi, NULL, 595), + NAME_FUNC_OFFSET(31088, glTexParameterIiv, glTexParameterIiv, NULL, 596), + NAME_FUNC_OFFSET(31109, glTexParameterIiv, glTexParameterIiv, NULL, 596), + NAME_FUNC_OFFSET(31130, glTexParameterIuiv, glTexParameterIuiv, NULL, 597), + NAME_FUNC_OFFSET(31152, glTexParameterIuiv, glTexParameterIuiv, NULL, 597), + NAME_FUNC_OFFSET(31174, glTransformFeedbackVaryings, glTransformFeedbackVaryings, NULL, 598), + NAME_FUNC_OFFSET(31205, glUniform1ui, glUniform1ui, NULL, 599), + NAME_FUNC_OFFSET(31221, glUniform1uiv, glUniform1uiv, NULL, 600), + NAME_FUNC_OFFSET(31238, glUniform2ui, glUniform2ui, NULL, 601), + NAME_FUNC_OFFSET(31254, glUniform2uiv, glUniform2uiv, NULL, 602), + NAME_FUNC_OFFSET(31271, glUniform3ui, glUniform3ui, NULL, 603), + NAME_FUNC_OFFSET(31287, glUniform3uiv, glUniform3uiv, NULL, 604), + NAME_FUNC_OFFSET(31304, glUniform4ui, glUniform4ui, NULL, 605), + NAME_FUNC_OFFSET(31320, glUniform4uiv, glUniform4uiv, NULL, 606), + NAME_FUNC_OFFSET(31337, glVertexAttribI1iv, glVertexAttribI1iv, NULL, 607), + NAME_FUNC_OFFSET(31359, glVertexAttribI1uiv, glVertexAttribI1uiv, NULL, 608), + NAME_FUNC_OFFSET(31382, glVertexAttribI4bv, glVertexAttribI4bv, NULL, 609), + NAME_FUNC_OFFSET(31404, glVertexAttribI4sv, glVertexAttribI4sv, NULL, 610), + NAME_FUNC_OFFSET(31426, glVertexAttribI4ubv, glVertexAttribI4ubv, NULL, 611), + NAME_FUNC_OFFSET(31449, glVertexAttribI4usv, glVertexAttribI4usv, NULL, 612), + NAME_FUNC_OFFSET(31472, glVertexAttribIPointer, glVertexAttribIPointer, NULL, 613), + NAME_FUNC_OFFSET(31498, glPrimitiveRestartIndex, glPrimitiveRestartIndex, NULL, 614), + NAME_FUNC_OFFSET(31524, glTexBuffer, glTexBuffer, NULL, 615), + NAME_FUNC_OFFSET(31539, glTexBuffer, glTexBuffer, NULL, 615), + NAME_FUNC_OFFSET(31554, glTexBuffer, glTexBuffer, NULL, 615), + NAME_FUNC_OFFSET(31569, glFramebufferTexture, glFramebufferTexture, NULL, 616), + NAME_FUNC_OFFSET(31593, glFramebufferTexture, glFramebufferTexture, NULL, 616), + NAME_FUNC_OFFSET(31617, glVertexAttribDivisor, glVertexAttribDivisor, NULL, 619), + NAME_FUNC_OFFSET(31642, glMinSampleShading, glMinSampleShading, NULL, 620), + NAME_FUNC_OFFSET(31664, glMinSampleShading, glMinSampleShading, NULL, 620), + NAME_FUNC_OFFSET(31686, glBindProgramARB, glBindProgramARB, NULL, 622), + NAME_FUNC_OFFSET(31702, glDeleteProgramsARB, glDeleteProgramsARB, NULL, 623), + NAME_FUNC_OFFSET(31721, glGenProgramsARB, glGenProgramsARB, NULL, 624), + NAME_FUNC_OFFSET(31737, glIsProgramARB, glIsProgramARB, NULL, 631), + NAME_FUNC_OFFSET(31751, glProgramEnvParameter4dARB, glProgramEnvParameter4dARB, NULL, 632), + NAME_FUNC_OFFSET(31774, glProgramEnvParameter4dvARB, glProgramEnvParameter4dvARB, NULL, 633), + NAME_FUNC_OFFSET(31798, glProgramEnvParameter4fARB, glProgramEnvParameter4fARB, NULL, 634), + NAME_FUNC_OFFSET(31821, glProgramEnvParameter4fvARB, glProgramEnvParameter4fvARB, NULL, 635), + NAME_FUNC_OFFSET(31845, glVertexAttrib1fARB, glVertexAttrib1fARB, NULL, 641), + NAME_FUNC_OFFSET(31862, glVertexAttrib1fvARB, glVertexAttrib1fvARB, NULL, 642), + NAME_FUNC_OFFSET(31880, glVertexAttrib2fARB, glVertexAttrib2fARB, NULL, 643), + NAME_FUNC_OFFSET(31897, glVertexAttrib2fvARB, glVertexAttrib2fvARB, NULL, 644), + NAME_FUNC_OFFSET(31915, glVertexAttrib3fARB, glVertexAttrib3fARB, NULL, 645), + NAME_FUNC_OFFSET(31932, glVertexAttrib3fvARB, glVertexAttrib3fvARB, NULL, 646), + NAME_FUNC_OFFSET(31950, glVertexAttrib4fARB, glVertexAttrib4fARB, NULL, 647), + NAME_FUNC_OFFSET(31967, glVertexAttrib4fvARB, glVertexAttrib4fvARB, NULL, 648), + NAME_FUNC_OFFSET(31985, glDrawArraysInstancedARB, glDrawArraysInstancedARB, NULL, 659), + NAME_FUNC_OFFSET(32010, glDrawArraysInstancedARB, glDrawArraysInstancedARB, NULL, 659), + NAME_FUNC_OFFSET(32032, glDrawElementsInstancedARB, glDrawElementsInstancedARB, NULL, 660), + NAME_FUNC_OFFSET(32059, glDrawElementsInstancedARB, glDrawElementsInstancedARB, NULL, 660), + NAME_FUNC_OFFSET(32083, glBindFramebuffer, glBindFramebuffer, NULL, 661), + NAME_FUNC_OFFSET(32104, glBindRenderbuffer, glBindRenderbuffer, NULL, 662), + NAME_FUNC_OFFSET(32126, glBlitFramebuffer, glBlitFramebuffer, NULL, 663), + NAME_FUNC_OFFSET(32147, glCheckFramebufferStatus, glCheckFramebufferStatus, NULL, 664), + NAME_FUNC_OFFSET(32175, glCheckFramebufferStatus, glCheckFramebufferStatus, NULL, 664), + NAME_FUNC_OFFSET(32203, glDeleteFramebuffers, glDeleteFramebuffers, NULL, 665), + NAME_FUNC_OFFSET(32227, glDeleteFramebuffers, glDeleteFramebuffers, NULL, 665), + NAME_FUNC_OFFSET(32251, glDeleteRenderbuffers, glDeleteRenderbuffers, NULL, 666), + NAME_FUNC_OFFSET(32276, glDeleteRenderbuffers, glDeleteRenderbuffers, NULL, 666), + NAME_FUNC_OFFSET(32301, glFramebufferRenderbuffer, glFramebufferRenderbuffer, NULL, 667), + NAME_FUNC_OFFSET(32330, glFramebufferRenderbuffer, glFramebufferRenderbuffer, NULL, 667), + NAME_FUNC_OFFSET(32359, glFramebufferTexture1D, glFramebufferTexture1D, NULL, 668), + NAME_FUNC_OFFSET(32385, glFramebufferTexture2D, glFramebufferTexture2D, NULL, 669), + NAME_FUNC_OFFSET(32411, glFramebufferTexture2D, glFramebufferTexture2D, NULL, 669), + NAME_FUNC_OFFSET(32437, glFramebufferTexture3D, glFramebufferTexture3D, NULL, 670), + NAME_FUNC_OFFSET(32463, glFramebufferTexture3D, glFramebufferTexture3D, NULL, 670), + NAME_FUNC_OFFSET(32489, glFramebufferTextureLayer, glFramebufferTextureLayer, NULL, 671), + NAME_FUNC_OFFSET(32518, glGenFramebuffers, glGenFramebuffers, NULL, 672), + NAME_FUNC_OFFSET(32539, glGenFramebuffers, glGenFramebuffers, NULL, 672), + NAME_FUNC_OFFSET(32560, glGenRenderbuffers, glGenRenderbuffers, NULL, 673), + NAME_FUNC_OFFSET(32582, glGenRenderbuffers, glGenRenderbuffers, NULL, 673), + NAME_FUNC_OFFSET(32604, glGenerateMipmap, glGenerateMipmap, NULL, 674), + NAME_FUNC_OFFSET(32624, glGenerateMipmap, glGenerateMipmap, NULL, 674), + NAME_FUNC_OFFSET(32644, glGetFramebufferAttachmentParameteriv, glGetFramebufferAttachmentParameteriv, NULL, 675), + NAME_FUNC_OFFSET(32685, glGetFramebufferAttachmentParameteriv, glGetFramebufferAttachmentParameteriv, NULL, 675), + NAME_FUNC_OFFSET(32726, glGetRenderbufferParameteriv, glGetRenderbufferParameteriv, NULL, 676), + NAME_FUNC_OFFSET(32758, glGetRenderbufferParameteriv, glGetRenderbufferParameteriv, NULL, 676), + NAME_FUNC_OFFSET(32790, glIsFramebuffer, glIsFramebuffer, NULL, 677), + NAME_FUNC_OFFSET(32809, glIsFramebuffer, glIsFramebuffer, NULL, 677), + NAME_FUNC_OFFSET(32828, glIsRenderbuffer, glIsRenderbuffer, NULL, 678), + NAME_FUNC_OFFSET(32848, glIsRenderbuffer, glIsRenderbuffer, NULL, 678), + NAME_FUNC_OFFSET(32868, glRenderbufferStorage, glRenderbufferStorage, NULL, 679), + NAME_FUNC_OFFSET(32893, glRenderbufferStorage, glRenderbufferStorage, NULL, 679), + NAME_FUNC_OFFSET(32918, glRenderbufferStorageMultisample, glRenderbufferStorageMultisample, NULL, 680), + NAME_FUNC_OFFSET(32954, glFlushMappedBufferRange, glFlushMappedBufferRange, NULL, 681), + NAME_FUNC_OFFSET(32982, glMapBufferRange, glMapBufferRange, NULL, 682), + NAME_FUNC_OFFSET(33002, glBindVertexArray, glBindVertexArray, NULL, 683), + NAME_FUNC_OFFSET(33023, glDeleteVertexArrays, glDeleteVertexArrays, NULL, 684), + NAME_FUNC_OFFSET(33049, glDeleteVertexArrays, glDeleteVertexArrays, NULL, 684), + NAME_FUNC_OFFSET(33073, glGenVertexArrays, glGenVertexArrays, NULL, 685), + NAME_FUNC_OFFSET(33094, glIsVertexArray, glIsVertexArray, NULL, 686), + NAME_FUNC_OFFSET(33115, glIsVertexArray, glIsVertexArray, NULL, 686), + NAME_FUNC_OFFSET(33134, glDrawElementsBaseVertex, glDrawElementsBaseVertex, NULL, 702), + NAME_FUNC_OFFSET(33162, glDrawElementsBaseVertex, glDrawElementsBaseVertex, NULL, 702), + NAME_FUNC_OFFSET(33190, glDrawElementsInstancedBaseVertex, glDrawElementsInstancedBaseVertex, NULL, 703), + NAME_FUNC_OFFSET(33227, glDrawElementsInstancedBaseVertex, glDrawElementsInstancedBaseVertex, NULL, 703), + NAME_FUNC_OFFSET(33264, glDrawRangeElementsBaseVertex, glDrawRangeElementsBaseVertex, NULL, 704), + NAME_FUNC_OFFSET(33297, glDrawRangeElementsBaseVertex, glDrawRangeElementsBaseVertex, NULL, 704), + NAME_FUNC_OFFSET(33330, glMultiDrawElementsBaseVertex, glMultiDrawElementsBaseVertex, NULL, 705), + NAME_FUNC_OFFSET(33363, glMultiDrawElementsBaseVertex, glMultiDrawElementsBaseVertex, NULL, 705), + NAME_FUNC_OFFSET(33396, glProvokingVertex, glProvokingVertex, NULL, 706), + NAME_FUNC_OFFSET(33417, glBlendEquationSeparateiARB, glBlendEquationSeparateiARB, NULL, 711), + NAME_FUNC_OFFSET(33451, glBlendEquationSeparateiARB, glBlendEquationSeparateiARB, NULL, 711), + NAME_FUNC_OFFSET(33476, glBlendEquationSeparateiARB, glBlendEquationSeparateiARB, NULL, 711), + NAME_FUNC_OFFSET(33504, glBlendEquationSeparateiARB, glBlendEquationSeparateiARB, NULL, 711), + NAME_FUNC_OFFSET(33532, glBlendEquationiARB, glBlendEquationiARB, NULL, 712), + NAME_FUNC_OFFSET(33558, glBlendEquationiARB, glBlendEquationiARB, NULL, 712), + NAME_FUNC_OFFSET(33575, glBlendEquationiARB, glBlendEquationiARB, NULL, 712), + NAME_FUNC_OFFSET(33595, glBlendEquationiARB, glBlendEquationiARB, NULL, 712), + NAME_FUNC_OFFSET(33615, glBlendFuncSeparateiARB, glBlendFuncSeparateiARB, NULL, 713), + NAME_FUNC_OFFSET(33645, glBlendFuncSeparateiARB, glBlendFuncSeparateiARB, NULL, 713), + NAME_FUNC_OFFSET(33666, glBlendFuncSeparateiARB, glBlendFuncSeparateiARB, NULL, 713), + NAME_FUNC_OFFSET(33690, glBlendFuncSeparateiARB, glBlendFuncSeparateiARB, NULL, 713), + NAME_FUNC_OFFSET(33714, glBlendFunciARB, glBlendFunciARB, NULL, 714), + NAME_FUNC_OFFSET(33736, glBlendFunciARB, glBlendFunciARB, NULL, 714), + NAME_FUNC_OFFSET(33749, glBlendFunciARB, glBlendFunciARB, NULL, 714), + NAME_FUNC_OFFSET(33765, glBlendFunciARB, glBlendFunciARB, NULL, 714), + NAME_FUNC_OFFSET(33781, glBindFragDataLocationIndexed, glBindFragDataLocationIndexed, NULL, 715), + NAME_FUNC_OFFSET(33814, glGetFragDataIndex, glGetFragDataIndex, NULL, 716), + NAME_FUNC_OFFSET(33836, glGetSamplerParameterIiv, glGetSamplerParameterIiv, NULL, 720), + NAME_FUNC_OFFSET(33864, glGetSamplerParameterIiv, glGetSamplerParameterIiv, NULL, 720), + NAME_FUNC_OFFSET(33892, glGetSamplerParameterIuiv, glGetSamplerParameterIuiv, NULL, 721), + NAME_FUNC_OFFSET(33921, glGetSamplerParameterIuiv, glGetSamplerParameterIuiv, NULL, 721), + NAME_FUNC_OFFSET(33950, glSamplerParameterIiv, glSamplerParameterIiv, NULL, 725), + NAME_FUNC_OFFSET(33975, glSamplerParameterIiv, glSamplerParameterIiv, NULL, 725), + NAME_FUNC_OFFSET(34000, glSamplerParameterIuiv, glSamplerParameterIuiv, NULL, 726), + NAME_FUNC_OFFSET(34026, glSamplerParameterIuiv, glSamplerParameterIuiv, NULL, 726), + NAME_FUNC_OFFSET(34052, gl_dispatch_stub_731, gl_dispatch_stub_731, NULL, 731), + NAME_FUNC_OFFSET(34076, gl_dispatch_stub_732, gl_dispatch_stub_732, NULL, 732), + NAME_FUNC_OFFSET(34101, glPatchParameteri, glPatchParameteri, NULL, 801), + NAME_FUNC_OFFSET(34122, glPatchParameteri, glPatchParameteri, NULL, 801), + NAME_FUNC_OFFSET(34143, glClearDepthf, glClearDepthf, NULL, 813), + NAME_FUNC_OFFSET(34160, glDepthRangef, glDepthRangef, NULL, 814), + NAME_FUNC_OFFSET(34177, glGetProgramBinary, glGetProgramBinary, NULL, 818), + NAME_FUNC_OFFSET(34199, glProgramBinary, glProgramBinary, NULL, 819), + NAME_FUNC_OFFSET(34218, glProgramParameteri, glProgramParameteri, NULL, 820), + NAME_FUNC_OFFSET(34241, glGetFloati_v, glGetFloati_v, NULL, 834), + NAME_FUNC_OFFSET(34258, glScissorArrayv, glScissorArrayv, NULL, 835), + NAME_FUNC_OFFSET(34277, glScissorIndexed, glScissorIndexed, NULL, 836), + NAME_FUNC_OFFSET(34297, glScissorIndexedv, glScissorIndexedv, NULL, 837), + NAME_FUNC_OFFSET(34318, glViewportArrayv, glViewportArrayv, NULL, 838), + NAME_FUNC_OFFSET(34338, glViewportIndexedf, glViewportIndexedf, NULL, 839), + NAME_FUNC_OFFSET(34360, glViewportIndexedfv, glViewportIndexedfv, NULL, 840), + NAME_FUNC_OFFSET(34383, glGetGraphicsResetStatusARB, glGetGraphicsResetStatusARB, NULL, 841), + NAME_FUNC_OFFSET(34408, glGetGraphicsResetStatusARB, glGetGraphicsResetStatusARB, NULL, 841), + NAME_FUNC_OFFSET(34436, glGetnUniformfvARB, glGetnUniformfvARB, NULL, 857), + NAME_FUNC_OFFSET(34452, glGetnUniformfvARB, glGetnUniformfvARB, NULL, 857), + NAME_FUNC_OFFSET(34471, glGetnUniformivARB, glGetnUniformivARB, NULL, 858), + NAME_FUNC_OFFSET(34487, glGetnUniformivARB, glGetnUniformivARB, NULL, 858), + NAME_FUNC_OFFSET(34506, glGetnUniformuivARB, glGetnUniformuivARB, NULL, 859), + NAME_FUNC_OFFSET(34523, glGetnUniformuivARB, glGetnUniformuivARB, NULL, 859), + NAME_FUNC_OFFSET(34543, glReadnPixelsARB, glReadnPixelsARB, NULL, 860), + NAME_FUNC_OFFSET(34557, glReadnPixelsARB, glReadnPixelsARB, NULL, 860), + NAME_FUNC_OFFSET(34574, glDrawArraysInstancedBaseInstance, glDrawArraysInstancedBaseInstance, NULL, 861), + NAME_FUNC_OFFSET(34611, glDrawElementsInstancedBaseInstance, glDrawElementsInstancedBaseInstance, NULL, 862), + NAME_FUNC_OFFSET(34650, glDrawElementsInstancedBaseVertexBaseInstance, glDrawElementsInstancedBaseVertexBaseInstance, NULL, 863), + NAME_FUNC_OFFSET(34699, glCopyImageSubData, glCopyImageSubData, NULL, 880), + NAME_FUNC_OFFSET(34721, glCopyImageSubData, glCopyImageSubData, NULL, 880), + NAME_FUNC_OFFSET(34743, gl_dispatch_stub_896, gl_dispatch_stub_896, NULL, 896), + NAME_FUNC_OFFSET(34780, glTexBufferRange, glTexBufferRange, NULL, 900), + NAME_FUNC_OFFSET(34800, glTexBufferRange, glTexBufferRange, NULL, 900), + NAME_FUNC_OFFSET(34820, glTexStorage3DMultisample, glTexStorage3DMultisample, NULL, 902), + NAME_FUNC_OFFSET(34849, glBufferStorage, glBufferStorage, NULL, 903), + NAME_FUNC_OFFSET(34868, gl_dispatch_stub_1032, gl_dispatch_stub_1032, NULL, 1032), + NAME_FUNC_OFFSET(34884, gl_dispatch_stub_1033, gl_dispatch_stub_1033, NULL, 1033), + NAME_FUNC_OFFSET(34903, glActiveShaderProgram, glActiveShaderProgram, NULL, 1041), + NAME_FUNC_OFFSET(34928, glBindProgramPipeline, glBindProgramPipeline, NULL, 1042), + NAME_FUNC_OFFSET(34953, glCreateShaderProgramv, glCreateShaderProgramv, NULL, 1043), + NAME_FUNC_OFFSET(34979, glDeleteProgramPipelines, glDeleteProgramPipelines, NULL, 1044), + NAME_FUNC_OFFSET(35007, glGenProgramPipelines, glGenProgramPipelines, NULL, 1045), + NAME_FUNC_OFFSET(35032, glGetProgramPipelineInfoLog, glGetProgramPipelineInfoLog, NULL, 1046), + NAME_FUNC_OFFSET(35063, glGetProgramPipelineiv, glGetProgramPipelineiv, NULL, 1047), + NAME_FUNC_OFFSET(35089, glIsProgramPipeline, glIsProgramPipeline, NULL, 1048), + NAME_FUNC_OFFSET(35112, glProgramUniform1f, glProgramUniform1f, NULL, 1052), + NAME_FUNC_OFFSET(35134, glProgramUniform1fv, glProgramUniform1fv, NULL, 1053), + NAME_FUNC_OFFSET(35157, glProgramUniform1i, glProgramUniform1i, NULL, 1054), + NAME_FUNC_OFFSET(35179, glProgramUniform1iv, glProgramUniform1iv, NULL, 1055), + NAME_FUNC_OFFSET(35202, glProgramUniform1ui, glProgramUniform1ui, NULL, 1056), + NAME_FUNC_OFFSET(35225, glProgramUniform1uiv, glProgramUniform1uiv, NULL, 1057), + NAME_FUNC_OFFSET(35249, glProgramUniform2f, glProgramUniform2f, NULL, 1060), + NAME_FUNC_OFFSET(35271, glProgramUniform2fv, glProgramUniform2fv, NULL, 1061), + NAME_FUNC_OFFSET(35294, glProgramUniform2i, glProgramUniform2i, NULL, 1062), + NAME_FUNC_OFFSET(35316, glProgramUniform2iv, glProgramUniform2iv, NULL, 1063), + NAME_FUNC_OFFSET(35339, glProgramUniform2ui, glProgramUniform2ui, NULL, 1064), + NAME_FUNC_OFFSET(35362, glProgramUniform2uiv, glProgramUniform2uiv, NULL, 1065), + NAME_FUNC_OFFSET(35386, glProgramUniform3f, glProgramUniform3f, NULL, 1068), + NAME_FUNC_OFFSET(35408, glProgramUniform3fv, glProgramUniform3fv, NULL, 1069), + NAME_FUNC_OFFSET(35431, glProgramUniform3i, glProgramUniform3i, NULL, 1070), + NAME_FUNC_OFFSET(35453, glProgramUniform3iv, glProgramUniform3iv, NULL, 1071), + NAME_FUNC_OFFSET(35476, glProgramUniform3ui, glProgramUniform3ui, NULL, 1072), + NAME_FUNC_OFFSET(35499, glProgramUniform3uiv, glProgramUniform3uiv, NULL, 1073), + NAME_FUNC_OFFSET(35523, glProgramUniform4f, glProgramUniform4f, NULL, 1076), + NAME_FUNC_OFFSET(35545, glProgramUniform4fv, glProgramUniform4fv, NULL, 1077), + NAME_FUNC_OFFSET(35568, glProgramUniform4i, glProgramUniform4i, NULL, 1078), + NAME_FUNC_OFFSET(35590, glProgramUniform4iv, glProgramUniform4iv, NULL, 1079), + NAME_FUNC_OFFSET(35613, glProgramUniform4ui, glProgramUniform4ui, NULL, 1080), + NAME_FUNC_OFFSET(35636, glProgramUniform4uiv, glProgramUniform4uiv, NULL, 1081), + NAME_FUNC_OFFSET(35660, glProgramUniformMatrix2fv, glProgramUniformMatrix2fv, NULL, 1083), + NAME_FUNC_OFFSET(35689, glProgramUniformMatrix2x3fv, glProgramUniformMatrix2x3fv, NULL, 1085), + NAME_FUNC_OFFSET(35720, glProgramUniformMatrix2x4fv, glProgramUniformMatrix2x4fv, NULL, 1087), + NAME_FUNC_OFFSET(35751, glProgramUniformMatrix3fv, glProgramUniformMatrix3fv, NULL, 1089), + NAME_FUNC_OFFSET(35780, glProgramUniformMatrix3x2fv, glProgramUniformMatrix3x2fv, NULL, 1091), + NAME_FUNC_OFFSET(35811, glProgramUniformMatrix3x4fv, glProgramUniformMatrix3x4fv, NULL, 1093), + NAME_FUNC_OFFSET(35842, glProgramUniformMatrix4fv, glProgramUniformMatrix4fv, NULL, 1095), + NAME_FUNC_OFFSET(35871, glProgramUniformMatrix4x2fv, glProgramUniformMatrix4x2fv, NULL, 1097), + NAME_FUNC_OFFSET(35902, glProgramUniformMatrix4x3fv, glProgramUniformMatrix4x3fv, NULL, 1099), + NAME_FUNC_OFFSET(35933, glUseProgramStages, glUseProgramStages, NULL, 1101), + NAME_FUNC_OFFSET(35955, glValidateProgramPipeline, glValidateProgramPipeline, NULL, 1102), + NAME_FUNC_OFFSET(35984, glDebugMessageCallback, glDebugMessageCallback, NULL, 1103), + NAME_FUNC_OFFSET(36010, glDebugMessageCallback, glDebugMessageCallback, NULL, 1103), + NAME_FUNC_OFFSET(36036, glDebugMessageControl, glDebugMessageControl, NULL, 1104), + NAME_FUNC_OFFSET(36061, glDebugMessageControl, glDebugMessageControl, NULL, 1104), + NAME_FUNC_OFFSET(36086, glDebugMessageInsert, glDebugMessageInsert, NULL, 1105), + NAME_FUNC_OFFSET(36110, glDebugMessageInsert, glDebugMessageInsert, NULL, 1105), + NAME_FUNC_OFFSET(36134, glGetDebugMessageLog, glGetDebugMessageLog, NULL, 1106), + NAME_FUNC_OFFSET(36158, glGetDebugMessageLog, glGetDebugMessageLog, NULL, 1106), + NAME_FUNC_OFFSET(36182, glGetObjectLabel, glGetObjectLabel, NULL, 1107), + NAME_FUNC_OFFSET(36202, glGetObjectPtrLabel, glGetObjectPtrLabel, NULL, 1108), + NAME_FUNC_OFFSET(36225, glObjectLabel, glObjectLabel, NULL, 1109), + NAME_FUNC_OFFSET(36242, glObjectPtrLabel, glObjectPtrLabel, NULL, 1110), + NAME_FUNC_OFFSET(36262, glPopDebugGroup, glPopDebugGroup, NULL, 1111), + NAME_FUNC_OFFSET(36281, glPushDebugGroup, glPushDebugGroup, NULL, 1112), + NAME_FUNC_OFFSET(36301, glSecondaryColor3fEXT, glSecondaryColor3fEXT, NULL, 1113), + NAME_FUNC_OFFSET(36320, glSecondaryColor3fvEXT, glSecondaryColor3fvEXT, NULL, 1114), + NAME_FUNC_OFFSET(36340, glMultiDrawElementsEXT, glMultiDrawElementsEXT, NULL, 1115), + NAME_FUNC_OFFSET(36360, glFogCoordfEXT, glFogCoordfEXT, NULL, 1116), + NAME_FUNC_OFFSET(36372, glFogCoordfvEXT, glFogCoordfvEXT, NULL, 1117), + NAME_FUNC_OFFSET(36385, glVertexAttribI1iEXT, glVertexAttribI1iEXT, NULL, 1223), + NAME_FUNC_OFFSET(36403, glVertexAttribI1uiEXT, glVertexAttribI1uiEXT, NULL, 1224), + NAME_FUNC_OFFSET(36422, glVertexAttribI2iEXT, glVertexAttribI2iEXT, NULL, 1225), + NAME_FUNC_OFFSET(36440, glVertexAttribI2ivEXT, glVertexAttribI2ivEXT, NULL, 1226), + NAME_FUNC_OFFSET(36459, glVertexAttribI2uiEXT, glVertexAttribI2uiEXT, NULL, 1227), + NAME_FUNC_OFFSET(36478, glVertexAttribI2uivEXT, glVertexAttribI2uivEXT, NULL, 1228), + NAME_FUNC_OFFSET(36498, glVertexAttribI3iEXT, glVertexAttribI3iEXT, NULL, 1229), + NAME_FUNC_OFFSET(36516, glVertexAttribI3ivEXT, glVertexAttribI3ivEXT, NULL, 1230), + NAME_FUNC_OFFSET(36535, glVertexAttribI3uiEXT, glVertexAttribI3uiEXT, NULL, 1231), + NAME_FUNC_OFFSET(36554, glVertexAttribI3uivEXT, glVertexAttribI3uivEXT, NULL, 1232), + NAME_FUNC_OFFSET(36574, glVertexAttribI4iEXT, glVertexAttribI4iEXT, NULL, 1233), + NAME_FUNC_OFFSET(36592, glVertexAttribI4ivEXT, glVertexAttribI4ivEXT, NULL, 1234), + NAME_FUNC_OFFSET(36611, glVertexAttribI4uiEXT, glVertexAttribI4uiEXT, NULL, 1235), + NAME_FUNC_OFFSET(36630, glVertexAttribI4uivEXT, glVertexAttribI4uivEXT, NULL, 1236), + NAME_FUNC_OFFSET(36650, glTextureBarrierNV, glTextureBarrierNV, NULL, 1257), + NAME_FUNC_OFFSET(36667, glAlphaFuncx, glAlphaFuncx, NULL, 1285), + NAME_FUNC_OFFSET(36683, glClearColorx, glClearColorx, NULL, 1286), + NAME_FUNC_OFFSET(36700, glClearDepthx, glClearDepthx, NULL, 1287), + NAME_FUNC_OFFSET(36717, glColor4x, glColor4x, NULL, 1288), + NAME_FUNC_OFFSET(36730, glDepthRangex, glDepthRangex, NULL, 1289), + NAME_FUNC_OFFSET(36747, glFogx, glFogx, NULL, 1290), + NAME_FUNC_OFFSET(36757, glFogxv, glFogxv, NULL, 1291), + NAME_FUNC_OFFSET(36768, glFrustumf, glFrustumf, NULL, 1292), + NAME_FUNC_OFFSET(36782, glFrustumx, glFrustumx, NULL, 1293), + NAME_FUNC_OFFSET(36796, glLightModelx, glLightModelx, NULL, 1294), + NAME_FUNC_OFFSET(36813, glLightModelxv, glLightModelxv, NULL, 1295), + NAME_FUNC_OFFSET(36831, glLightx, glLightx, NULL, 1296), + NAME_FUNC_OFFSET(36843, glLightxv, glLightxv, NULL, 1297), + NAME_FUNC_OFFSET(36856, glLineWidthx, glLineWidthx, NULL, 1298), + NAME_FUNC_OFFSET(36872, glLoadMatrixx, glLoadMatrixx, NULL, 1299), + NAME_FUNC_OFFSET(36889, glMaterialx, glMaterialx, NULL, 1300), + NAME_FUNC_OFFSET(36904, glMaterialxv, glMaterialxv, NULL, 1301), + NAME_FUNC_OFFSET(36920, glMultMatrixx, glMultMatrixx, NULL, 1302), + NAME_FUNC_OFFSET(36937, glMultiTexCoord4x, glMultiTexCoord4x, NULL, 1303), + NAME_FUNC_OFFSET(36958, glNormal3x, glNormal3x, NULL, 1304), + NAME_FUNC_OFFSET(36972, glOrthof, glOrthof, NULL, 1305), + NAME_FUNC_OFFSET(36984, glOrthox, glOrthox, NULL, 1306), + NAME_FUNC_OFFSET(36996, glPointSizex, glPointSizex, NULL, 1307), + NAME_FUNC_OFFSET(37012, glPolygonOffsetx, glPolygonOffsetx, NULL, 1308), + NAME_FUNC_OFFSET(37032, glRotatex, glRotatex, NULL, 1309), + NAME_FUNC_OFFSET(37045, glSampleCoveragex, glSampleCoveragex, NULL, 1310), + NAME_FUNC_OFFSET(37066, glScalex, glScalex, NULL, 1311), + NAME_FUNC_OFFSET(37078, glTexEnvx, glTexEnvx, NULL, 1312), + NAME_FUNC_OFFSET(37091, glTexEnvxv, glTexEnvxv, NULL, 1313), + NAME_FUNC_OFFSET(37105, glTexParameterx, glTexParameterx, NULL, 1314), + NAME_FUNC_OFFSET(37124, glTranslatex, glTranslatex, NULL, 1315), + NAME_FUNC_OFFSET(37140, glClipPlanef, glClipPlanef, NULL, 1316), + NAME_FUNC_OFFSET(37156, glClipPlanex, glClipPlanex, NULL, 1317), + NAME_FUNC_OFFSET(37172, glGetClipPlanef, glGetClipPlanef, NULL, 1318), + NAME_FUNC_OFFSET(37191, glGetClipPlanex, glGetClipPlanex, NULL, 1319), + NAME_FUNC_OFFSET(37210, glGetFixedv, glGetFixedv, NULL, 1320), + NAME_FUNC_OFFSET(37225, glGetLightxv, glGetLightxv, NULL, 1321), + NAME_FUNC_OFFSET(37241, glGetMaterialxv, glGetMaterialxv, NULL, 1322), + NAME_FUNC_OFFSET(37260, glGetTexEnvxv, glGetTexEnvxv, NULL, 1323), + NAME_FUNC_OFFSET(37277, glGetTexParameterxv, glGetTexParameterxv, NULL, 1324), + NAME_FUNC_OFFSET(37300, glPointParameterx, glPointParameterx, NULL, 1325), + NAME_FUNC_OFFSET(37321, glPointParameterxv, glPointParameterxv, NULL, 1326), + NAME_FUNC_OFFSET(37343, glTexParameterxv, glTexParameterxv, NULL, 1327), + NAME_FUNC_OFFSET(37363, glBlendBarrier, glBlendBarrier, NULL, 1328), + NAME_FUNC_OFFSET(37381, glPrimitiveBoundingBox, glPrimitiveBoundingBox, NULL, 1329), + NAME_FUNC_OFFSET(37407, glPrimitiveBoundingBox, glPrimitiveBoundingBox, NULL, 1329), + NAME_FUNC_OFFSET(37433, glPrimitiveBoundingBox, glPrimitiveBoundingBox, NULL, 1329), NAME_FUNC_OFFSET(-1, NULL, NULL, NULL, 0) }; diff -Nru mesa-12.0.6/src/mapi/glapi/registry/gl.xml mesa-17.0.7/src/mapi/glapi/registry/gl.xml --- mesa-12.0.6/src/mapi/glapi/registry/gl.xml 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mapi/glapi/registry/gl.xml 2017-06-01 10:37:10.000000000 +0000 @@ -1,7 +1,7 @@ -Copyright (c) 2013-2014 The Khronos Group Inc. +Copyright (c) 2013-2016 The Khronos Group Inc. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and/or associated documentation files (the @@ -142,6 +142,11 @@ typedef khronos_intptr_t GLintptr; typedef khronos_ssize_t GLsizeiptr; + + typedef khronos_uint8_t GLubyte; + typedef khronos_float_t GLfloat; + typedef khronos_intptr_t GLintptr; + typedef khronos_ssize_t GLsizeiptr; typedef void ( *GLDEBUGPROCAMD)(GLuint id,GLenum category,GLenum severity,GLsizei length,const GLchar *message,void *userParam); typedef unsigned short GLhalfNV; @@ -330,6 +335,7 @@ + @@ -2058,9 +2064,10 @@ - + + @@ -2090,6 +2097,7 @@ + @@ -2468,6 +2476,7 @@ + @@ -2730,6 +2739,7 @@ + @@ -2845,6 +2855,7 @@ + @@ -2996,30 +3007,38 @@ + + + + + + + + @@ -3953,18 +3972,22 @@ + + + + @@ -4060,7 +4083,6 @@ - @@ -4152,7 +4174,9 @@ + + @@ -4353,7 +4377,8 @@ - + + @@ -4847,6 +4872,7 @@ + @@ -5962,9 +5988,13 @@ + + + + @@ -6415,7 +6445,9 @@ - + + + @@ -7170,6 +7202,7 @@ + @@ -7314,7 +7347,14 @@ - + + + + + + + + @@ -7464,8 +7504,11 @@ + + + @@ -7475,8 +7518,11 @@ + + + @@ -7881,7 +7927,13 @@ - + + + + + + + @@ -7978,7 +8030,10 @@ - + + + + @@ -8058,28 +8113,39 @@ + + + + + + + + + + + @@ -8092,19 +8158,27 @@ + + + + - + + + + + @@ -8209,6 +8283,7 @@ + @@ -8241,12 +8316,19 @@ + + + + + + + @@ -8257,14 +8339,27 @@ - + + + + + + + + + + + + + - + + @@ -8278,12 +8373,23 @@ - + + + + + + + + - + + + + + @@ -8298,19 +8404,33 @@ + + + + + + + + + + + + + + @@ -8324,19 +8444,33 @@ + + + + + + + + + + + + + + @@ -8383,7 +8517,11 @@ - + + + + + @@ -8399,6 +8537,21 @@ + + + + + + + + + + + + + + + - - + + @@ -8579,6 +8732,9 @@ GLfixed ref + void glApplyFramebufferAttachmentCMAAINTEL + + void glApplyTextureEXT GLenum mode @@ -8838,6 +8994,14 @@ const GLchar *name + void glBindFragDataLocationIndexedEXT + GLuint program + GLuint colorNumber + GLuint index + const GLchar *name + + + void glBindFragmentShaderATI GLuint id @@ -9130,10 +9294,15 @@ const GLubyte *bitmap + void glBlendBarrier + + void glBlendBarrierKHR + void glBlendBarrierNV + void glBlendColor @@ -9741,7 +9910,8 @@ void glClearNamedFramebufferfi GLuint framebuffer GLenum buffer - const GLfloat depth + GLint drawbuffer + GLfloat depth GLint stencil @@ -9766,6 +9936,12 @@ const GLuint *value + void glClearPixelLocalStorageuiEXT + GLsizei offset + GLsizei n + const GLuint *values + + void glClearStencil GLint s @@ -10861,6 +11037,16 @@ const void *bits + void glConservativeRasterParameterfNV + GLenum pname + GLfloat value + + + void glConservativeRasterParameteriNV + GLenum pname + GLint param + + void glConvolutionFilter1D GLenum target GLenum internalformat @@ -11110,7 +11296,7 @@ - void glCopyImageSubDataOES + void glCopyImageSubDataNV GLuint srcName GLenum srcTarget GLint srcLevel @@ -11123,13 +11309,13 @@ GLint dstX GLint dstY GLint dstZ - GLsizei srcWidth - GLsizei srcHeight - GLsizei srcDepth - + GLsizei width + GLsizei height + GLsizei depth + - void glCopyImageSubDataNV + void glCopyImageSubDataOES GLuint srcName GLenum srcTarget GLint srcLevel @@ -11142,10 +11328,10 @@ GLint dstX GLint dstY GLint dstZ - GLsizei width - GLsizei height - GLsizei depth - + GLsizei srcWidth + GLsizei srcHeight + GLsizei srcDepth + void glCopyMultiTexImage1DEXT @@ -11493,6 +11679,15 @@ GLboolean mask + void glCoverageModulationNV + GLenum components + + + void glCoverageModulationTableNV + GLsizei n + const GLfloat *v + + void glCoverageOperationNV GLenum operation @@ -11507,11 +11702,6 @@ GLuint *lists - void glCreateStatesNV - GLsizei n - GLuint *states - - void glCreateFramebuffers GLsizei n GLuint *framebuffers @@ -11576,6 +11766,11 @@ const GLchar **strings + void glCreateStatesNV + GLsizei n + GLuint *states + + GLsync glCreateSyncFromCLeventARB struct _cl_context *context struct _cl_event *event @@ -11780,11 +11975,6 @@ const GLuint *lists - void glDeleteStatesNV - GLsizei n - const GLuint *states - - void glDeleteFencesAPPLE GLsizei n const GLuint *fences @@ -11931,6 +12121,11 @@ + void glDeleteStatesNV + GLsizei n + const GLuint *states + + void glDeleteSync GLsync sync @@ -12013,18 +12208,24 @@ - void glDepthRangeArrayv + void glDepthRangeArrayfvNV GLuint first GLsizei count - const GLdouble *v + const GLfloat *v - void glDepthRangeArrayfvNV + void glDepthRangeArrayfvOES GLuint first GLsizei count const GLfloat *v + void glDepthRangeArrayv + GLuint first + GLsizei count + const GLdouble *v + + void glDepthRangeIndexed GLuint index GLdouble n @@ -12037,6 +12238,12 @@ GLfloat f + void glDepthRangeIndexedfOES + GLuint index + GLfloat n + GLfloat f + + void glDepthRangedNV GLdouble zNear GLdouble zFar @@ -12310,32 +12517,32 @@ const GLenum *bufs - void glDrawCommandsNV + void glDrawCommandsAddressNV GLenum primitiveMode - GLuint buffer - const GLintptr *indirects + const GLuint64 *indirects const GLsizei *sizes GLuint count - void glDrawCommandsAddressNV + void glDrawCommandsNV GLenum primitiveMode - const GLuint64 *indirects + GLuint buffer + const GLintptr *indirects const GLsizei *sizes GLuint count - void glDrawCommandsStatesNV - GLuint buffer - const GLintptr *indirects + void glDrawCommandsStatesAddressNV + const GLuint64 *indirects const GLsizei *sizes const GLuint *states const GLuint *fbos GLuint count - void glDrawCommandsStatesAddressNV - const GLuint64 *indirects + void glDrawCommandsStatesNV + GLuint buffer + const GLintptr *indirects const GLsizei *sizes const GLuint *states const GLuint *fbos @@ -12446,45 +12653,45 @@ GLint basevertex - void glDrawElementsInstancedBaseVertexEXT + void glDrawElementsInstancedBaseVertexBaseInstance GLenum mode GLsizei count - GLenum type - const void *indices + GLenum type + const void *indices GLsizei instancecount GLint basevertex - + GLuint baseinstance - void glDrawElementsInstancedBaseVertexOES + void glDrawElementsInstancedBaseVertexBaseInstanceEXT GLenum mode GLsizei count - GLenum type - const void *indices + GLenum type + const void *indices GLsizei instancecount GLint basevertex - + GLuint baseinstance + - void glDrawElementsInstancedBaseVertexBaseInstance + void glDrawElementsInstancedBaseVertexEXT GLenum mode GLsizei count - GLenum type - const void *indices + GLenum type + const void *indices GLsizei instancecount GLint basevertex - GLuint baseinstance + - void glDrawElementsInstancedBaseVertexBaseInstanceEXT + void glDrawElementsInstancedBaseVertexOES GLenum mode GLsizei count - GLenum type - const void *indices + GLenum type + const void *indices GLsizei instancecount GLint basevertex - GLuint baseinstance - + void glDrawElementsInstancedEXT @@ -12982,6 +13189,9 @@ + void glEvaluateDepthValuesARB + + void glExecuteProgramNV GLenum target GLuint id @@ -13322,6 +13532,10 @@ GLenum mode + void glFragmentCoverageColorNV + GLuint color + + void glFragmentLightModelfSGIX GLenum pname GLfloat param @@ -13415,6 +13629,11 @@ GLint param + void glFramebufferPixelLocalStorageSizeEXT + GLuint target + GLsizei size + + void glFramebufferReadBufferEXT GLuint framebuffer GLenum mode @@ -13444,6 +13663,20 @@ GLuint renderbuffer + void glFramebufferSampleLocationsfvARB + GLenum target + GLuint start + GLsizei count + const GLfloat *v + + + void glFramebufferSampleLocationsfvNV + GLenum target + GLuint start + GLsizei count + const GLfloat *v + + void glFramebufferTexture GLenum target GLenum attachment @@ -13489,6 +13722,16 @@ + void glFramebufferTexture2DDownsampleIMG + GLenum target + GLenum attachment + GLenum textarget + GLuint texture + GLint level + GLint xscale + GLint yscale + + void glFramebufferTexture2DMultisampleEXT GLenum target GLenum attachment @@ -13562,14 +13805,6 @@ - void glFramebufferTextureOES - GLenum target - GLenum attachment - GLuint texture - GLint level - - - void glFramebufferTextureFaceARB GLenum target GLenum attachment @@ -13614,6 +13849,26 @@ + void glFramebufferTextureLayerDownsampleIMG + GLenum target + GLenum attachment + GLuint texture + GLint level + GLint layer + GLint xscale + GLint yscale + + + void glFramebufferTextureMultisampleMultiviewOVR + GLenum target + GLenum attachment + GLuint texture + GLint level + GLsizei samples + GLint baseViewIndex + GLsizei numViews + + void glFramebufferTextureMultiviewOVR GLenum target GLenum attachment @@ -13623,6 +13878,14 @@ GLsizei numViews + void glFramebufferTextureOES + GLenum target + GLenum attachment + GLuint texture + GLint level + + + void glFreeObjectBufferATI GLuint buffer @@ -14368,6 +14631,11 @@ GLfixed *params + void glGetCoverageModulationTableNV + GLsizei bufsize + GLfloat *v + + GLuint glGetDebugMessageLog GLuint count GLsizei bufSize @@ -14510,6 +14778,13 @@ GLfloat *data + void glGetFloati_vEXT + GLenum pname + GLuint index + GLfloat *params + + + void glGetFloati_vNV GLenum target GLuint index @@ -14517,10 +14792,10 @@ - void glGetFloati_vEXT - GLenum pname + void glGetFloati_vOES + GLenum target GLuint index - GLfloat *params + GLfloat *data @@ -14539,6 +14814,12 @@ const GLchar *name + GLint glGetFragDataIndexEXT + GLuint program + const GLchar *name + + + GLint glGetFragDataLocation GLuint program const GLchar *name @@ -14610,6 +14891,10 @@ GLint *params + GLsizei glGetFramebufferPixelLocalStorageSizeEXT + GLuint target + + GLenum glGetGraphicsResetStatus @@ -14772,26 +15057,26 @@ - void glGetInternalformati64v + void glGetInternalformatSampleivNV GLenum target GLenum internalformat + GLsizei samples GLenum pname GLsizei bufSize - GLint64 *params + GLint *params - void glGetInternalformativ + void glGetInternalformati64v GLenum target GLenum internalformat GLenum pname GLsizei bufSize - GLint *params + GLint64 *params - void glGetInternalformatSampleivNV + void glGetInternalformativ GLenum target GLenum internalformat - GLsizei samples GLenum pname GLsizei bufSize GLint *params @@ -15764,6 +16049,12 @@ const GLchar *name + GLint glGetProgramResourceLocationIndexEXT + GLuint program + GLenum programInterface + const GLchar *name + + void glGetProgramResourceName GLuint program GLenum programInterface @@ -16587,6 +16878,12 @@ + void glGetUniformi64vARB + GLuint program + GLint location + GLint64 *params + + void glGetUniformi64vNV GLuint program GLint location @@ -16606,6 +16903,12 @@ + void glGetUniformui64vARB + GLuint program + GLint location + GLuint64 *params + + void glGetUniformui64vNV GLuint program GLint location @@ -17175,6 +17478,13 @@ + void glGetnUniformi64vARB + GLuint program + GLint location + GLsizei bufSize + GLint64 *params + + void glGetnUniformiv GLuint program GLint location @@ -17204,6 +17514,13 @@ + void glGetnUniformui64vARB + GLuint program + GLint location + GLsizei bufSize + GLuint64 *params + + void glGetnUniformuiv GLuint program GLint location @@ -17555,13 +17872,13 @@ - GLboolean glIsEnablediOES + GLboolean glIsEnablediNV GLenum target GLuint index - GLboolean glIsEnablediNV + GLboolean glIsEnablediOES GLenum target GLuint index @@ -18570,6 +18887,10 @@ GLfloat z + void glMaxShaderCompilerThreadsARB + GLuint count + + void glMemoryBarrier GLbitfield barriers @@ -18682,14 +19003,6 @@ - void glMultiDrawArraysIndirectEXT - GLenum mode - const void *indirect - GLsizei drawcount - GLsizei stride - - - void glMultiDrawArraysIndirectBindlessCountNV GLenum mode const void *indirect @@ -18715,6 +19028,14 @@ GLsizei stride + void glMultiDrawArraysIndirectEXT + GLenum mode + const void *indirect + GLsizei drawcount + GLsizei stride + + + void glMultiDrawElementArrayAPPLE GLenum mode const GLint *first @@ -18776,15 +19097,6 @@ GLsizei stride - void glMultiDrawElementsIndirectEXT - GLenum mode - GLenum type - const void *indirect - GLsizei drawcount - GLsizei stride - - - void glMultiDrawElementsIndirectAMD GLenum mode GLenum type @@ -18822,6 +19134,15 @@ GLsizei stride + void glMultiDrawElementsIndirectEXT + GLenum mode + GLenum type + const void *indirect + GLsizei drawcount + GLsizei stride + + + void glMultiDrawRangeElementArrayAPPLE GLenum mode GLuint start @@ -19840,6 +20161,20 @@ GLuint renderbuffer + void glNamedFramebufferSampleLocationsfvARB + GLuint framebuffer + GLuint start + GLsizei count + const GLfloat *v + + + void glNamedFramebufferSampleLocationsfvNV + GLuint framebuffer + GLuint start + GLsizei count + const GLfloat *v + + void glNamedFramebufferTexture GLuint framebuffer GLenum attachment @@ -20856,6 +21191,13 @@ + void glPolygonOffsetClampEXT + GLfloat factor + GLfloat units + GLfloat clamp + + + void glPolygonOffsetEXT GLfloat factor GLfloat bias @@ -20872,13 +21214,6 @@ GLfixed units - void glPolygonOffsetClampEXT - GLfloat factor - GLfloat units - GLfloat clamp - - - void glPolygonStipple const GLubyte *mask @@ -20940,6 +21275,29 @@ GLuint key1 + void glPrimitiveBoundingBox + GLfloat minX + GLfloat minY + GLfloat minZ + GLfloat minW + GLfloat maxX + GLfloat maxY + GLfloat maxZ + GLfloat maxW + + + void glPrimitiveBoundingBoxARB + GLfloat minX + GLfloat minY + GLfloat minZ + GLfloat minW + GLfloat maxX + GLfloat maxY + GLfloat maxZ + GLfloat maxW + + + void glPrimitiveBoundingBoxEXT GLfloat minX GLfloat minY @@ -20949,6 +21307,7 @@ GLfloat maxY GLfloat maxZ GLfloat maxW + void glPrimitiveBoundingBoxOES @@ -20960,6 +21319,7 @@ GLfloat maxY GLfloat maxZ GLfloat maxW + void glPrimitiveRestartIndex @@ -21394,12 +21754,25 @@ GLint v0 + void glProgramUniform1i64ARB + GLuint program + GLint location + GLint64 x + + void glProgramUniform1i64NV GLuint program GLint location GLint64EXT x + void glProgramUniform1i64vARB + GLuint program + GLint location + GLsizei count + const GLint64 *value + + void glProgramUniform1i64vNV GLuint program GLint location @@ -21435,12 +21808,25 @@ GLuint v0 + void glProgramUniform1ui64ARB + GLuint program + GLint location + GLuint64 x + + void glProgramUniform1ui64NV GLuint program GLint location GLuint64EXT x + void glProgramUniform1ui64vARB + GLuint program + GLint location + GLsizei count + const GLuint64 *value + + void glProgramUniform1ui64vNV GLuint program GLint location @@ -21535,6 +21921,13 @@ GLint v1 + void glProgramUniform2i64ARB + GLuint program + GLint location + GLint64 x + GLint64 y + + void glProgramUniform2i64NV GLuint program GLint location @@ -21542,6 +21935,13 @@ GLint64EXT y + void glProgramUniform2i64vARB + GLuint program + GLint location + GLsizei count + const GLint64 *value + + void glProgramUniform2i64vNV GLuint program GLint location @@ -21579,6 +21979,13 @@ GLuint v1 + void glProgramUniform2ui64ARB + GLuint program + GLint location + GLuint64 x + GLuint64 y + + void glProgramUniform2ui64NV GLuint program GLint location @@ -21586,6 +21993,13 @@ GLuint64EXT y + void glProgramUniform2ui64vARB + GLuint program + GLint location + GLsizei count + const GLuint64 *value + + void glProgramUniform2ui64vNV GLuint program GLint location @@ -21686,6 +22100,14 @@ GLint v2 + void glProgramUniform3i64ARB + GLuint program + GLint location + GLint64 x + GLint64 y + GLint64 z + + void glProgramUniform3i64NV GLuint program GLint location @@ -21694,6 +22116,13 @@ GLint64EXT z + void glProgramUniform3i64vARB + GLuint program + GLint location + GLsizei count + const GLint64 *value + + void glProgramUniform3i64vNV GLuint program GLint location @@ -21733,6 +22162,14 @@ GLuint v2 + void glProgramUniform3ui64ARB + GLuint program + GLint location + GLuint64 x + GLuint64 y + GLuint64 z + + void glProgramUniform3ui64NV GLuint program GLint location @@ -21741,6 +22178,13 @@ GLuint64EXT z + void glProgramUniform3ui64vARB + GLuint program + GLint location + GLsizei count + const GLuint64 *value + + void glProgramUniform3ui64vNV GLuint program GLint location @@ -21847,6 +22291,15 @@ GLint v3 + void glProgramUniform4i64ARB + GLuint program + GLint location + GLint64 x + GLint64 y + GLint64 z + GLint64 w + + void glProgramUniform4i64NV GLuint program GLint location @@ -21856,6 +22309,13 @@ GLint64EXT w + void glProgramUniform4i64vARB + GLuint program + GLint location + GLsizei count + const GLint64 *value + + void glProgramUniform4i64vNV GLuint program GLint location @@ -21897,6 +22357,15 @@ GLuint v3 + void glProgramUniform4ui64ARB + GLuint program + GLint location + GLuint64 x + GLuint64 y + GLuint64 z + GLuint64 w + + void glProgramUniform4ui64NV GLuint program GLint location @@ -21906,6 +22375,13 @@ GLuint64EXT w + void glProgramUniform4ui64vARB + GLuint program + GLint location + GLsizei count + const GLuint64 *value + + void glProgramUniform4ui64vNV GLuint program GLint location @@ -22527,6 +23003,11 @@ const GLfixed *coords + void glRasterSamplesEXT + GLuint samples + GLboolean fixedsamplelocations + + void glReadBuffer GLenum src @@ -22972,6 +23453,9 @@ void glResizeBuffersMESA + void glResolveDepthValuesNV + + void glResolveMultisampleFramebufferAPPLE @@ -23183,6 +23667,13 @@ + void glScissorArrayvOES + GLuint first + GLsizei count + const GLint *v + + + void glScissorIndexed GLuint index GLint left @@ -23200,6 +23691,15 @@ + void glScissorIndexedOES + GLuint index + GLint left + GLint bottom + GLsizei width + GLsizei height + + + void glScissorIndexedv GLuint index const GLint *v @@ -23211,6 +23711,12 @@ + void glScissorIndexedvOES + GLuint index + const GLint *v + + + void glSecondaryColor3b GLbyte red GLbyte green @@ -23791,6 +24297,11 @@ const void *string + void glSubpixelPrecisionBiasNV + GLuint xbits + GLuint ybits + + void glSwizzleEXT GLuint res GLuint in @@ -25650,11 +26161,22 @@ GLint v0 + void glUniform1i64ARB + GLint location + GLint64 x + + void glUniform1i64NV GLint location GLint64EXT x + void glUniform1i64vARB + GLint location + GLsizei count + const GLint64 *value + + void glUniform1i64vNV GLint location GLsizei count @@ -25685,11 +26207,22 @@ GLuint v0 + void glUniform1ui64ARB + GLint location + GLuint64 x + + void glUniform1ui64NV GLint location GLuint64EXT x + void glUniform1ui64vARB + GLint location + GLsizei count + const GLuint64 *value + + void glUniform1ui64vNV GLint location GLsizei count @@ -25759,12 +26292,24 @@ GLint v1 + void glUniform2i64ARB + GLint location + GLint64 x + GLint64 y + + void glUniform2i64NV GLint location GLint64EXT x GLint64EXT y + void glUniform2i64vARB + GLint location + GLsizei count + const GLint64 *value + + void glUniform2i64vNV GLint location GLsizei count @@ -25797,12 +26342,24 @@ GLuint v1 + void glUniform2ui64ARB + GLint location + GLuint64 x + GLuint64 y + + void glUniform2ui64NV GLint location GLuint64EXT x GLuint64EXT y + void glUniform2ui64vARB + GLint location + GLsizei count + const GLuint64 *value + + void glUniform2ui64vNV GLint location GLsizei count @@ -25877,6 +26434,13 @@ GLint v2 + void glUniform3i64ARB + GLint location + GLint64 x + GLint64 y + GLint64 z + + void glUniform3i64NV GLint location GLint64EXT x @@ -25884,6 +26448,12 @@ GLint64EXT z + void glUniform3i64vARB + GLint location + GLsizei count + const GLint64 *value + + void glUniform3i64vNV GLint location GLsizei count @@ -25918,6 +26488,13 @@ GLuint v2 + void glUniform3ui64ARB + GLint location + GLuint64 x + GLuint64 y + GLuint64 z + + void glUniform3ui64NV GLint location GLuint64EXT x @@ -25925,6 +26502,12 @@ GLuint64EXT z + void glUniform3ui64vARB + GLint location + GLsizei count + const GLuint64 *value + + void glUniform3ui64vNV GLint location GLsizei count @@ -26004,6 +26587,14 @@ GLint v3 + void glUniform4i64ARB + GLint location + GLint64 x + GLint64 y + GLint64 z + GLint64 w + + void glUniform4i64NV GLint location GLint64EXT x @@ -26012,6 +26603,12 @@ GLint64EXT w + void glUniform4i64vARB + GLint location + GLsizei count + const GLint64 *value + + void glUniform4i64vNV GLint location GLsizei count @@ -26048,6 +26645,14 @@ GLuint v3 + void glUniform4ui64ARB + GLint location + GLuint64 x + GLuint64 y + GLuint64 z + GLuint64 w + + void glUniform4ui64NV GLint location GLuint64EXT x @@ -26056,6 +26661,12 @@ GLuint64EXT w + void glUniform4ui64vARB + GLint location + GLsizei count + const GLuint64 *value + + void glUniform4ui64vNV GLint location GLsizei count @@ -28883,6 +29494,13 @@ + void glViewportArrayvOES + GLuint first + GLsizei count + const GLfloat *v + + + void glViewportIndexedf GLuint index GLfloat x @@ -28891,6 +29509,15 @@ GLfloat h + void glViewportIndexedfOES + GLuint index + GLfloat x + GLfloat y + GLfloat w + GLfloat h + + + void glViewportIndexedfNV GLuint index GLfloat x @@ -28905,12 +29532,32 @@ const GLfloat *v + void glViewportIndexedfvOES + GLuint index + const GLfloat *v + + + void glViewportIndexedfvNV GLuint index const GLfloat *v + void glViewportPositionWScaleNV + GLuint index + GLfloat xcoeff + GLfloat ycoeff + + + void glViewportSwizzleNV + GLuint index + GLenum swizzlex + GLenum swizzley + GLenum swizzlez + GLenum swizzlew + + void glWaitSync GLsync sync GLbitfield flags @@ -29341,6 +29988,12 @@ const GLshort *v + void glWindowRectanglesEXT + GLenum mode + GLsizei count + const GLint *box + + void glWriteMaskEXT GLuint res GLuint in @@ -29349,51 +30002,7 @@ GLenum outZ GLenum outW - - void glCoverageModulationNV - GLenum components - - - void glCoverageModulationTableNV - GLsizei n - const GLfloat *v - - - void glFragmentCoverageColorNV - GLuint color - - - void glFramebufferSampleLocationsfvNV - GLenum target - GLuint start - GLsizei count - const GLfloat *v - - - void glGetCoverageModulationTableNV - GLsizei bufsize - GLfloat *v - - - void glNamedFramebufferSampleLocationsfvNV - GLuint framebuffer - GLuint start - GLsizei count - const GLfloat *v - - - void glRasterSamplesEXT - GLuint samples - GLboolean fixedsamplelocations - - - void glResolveDepthValuesNV - - - void glSubpixelPrecisionBiasNV - GLuint xbits - GLuint ybits - + @@ -35100,6 +35709,726 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -35343,6 +36672,7 @@ + @@ -35760,6 +37090,14 @@ + + + + + + + + @@ -36311,6 +37649,7 @@ + @@ -36520,6 +37859,54 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -36958,6 +38345,13 @@ + + + + + + + @@ -36997,6 +38391,7 @@ + @@ -37110,6 +38505,21 @@ + + + + + + + + + + + + + + + @@ -37219,6 +38629,7 @@ + @@ -37253,7 +38664,9 @@ + + @@ -37453,6 +38866,7 @@ + @@ -37514,6 +38928,8 @@ + + @@ -37722,6 +39138,12 @@ + + + + + + @@ -38833,6 +40255,14 @@ + + + + + + + + @@ -38881,6 +40311,21 @@ + + + + + + + + + + + + + + + @@ -38923,6 +40368,21 @@ + + + + + + + + + + + + + + + @@ -38936,6 +40396,7 @@ + @@ -39947,6 +41408,12 @@ + + + + + + @@ -40070,7 +41537,7 @@ - + @@ -40083,6 +41550,12 @@ + + + + + + @@ -40269,6 +41742,7 @@ + @@ -40334,6 +41808,7 @@ + @@ -40341,6 +41816,16 @@ + + + + + + + + + + @@ -40374,7 +41859,7 @@ - + @@ -40600,7 +42085,7 @@ - + @@ -40824,13 +42309,6 @@ - - - - - - - @@ -40841,6 +42319,13 @@ + + + + + + + @@ -41229,12 +42714,15 @@ - + - - - - + + + + + + + @@ -41360,6 +42848,16 @@ + + + + + + + + + + @@ -41411,6 +42909,13 @@ + + + + + + + @@ -41446,7 +42951,17 @@ + + + + + + + + + + @@ -41507,7 +43022,6 @@ - @@ -41523,6 +43037,7 @@ + @@ -41757,6 +43272,7 @@ + @@ -41919,6 +43435,14 @@ + + + + + + + + @@ -41984,6 +43508,23 @@ + + + + + + + + + + + + + + + + + @@ -42370,7 +43911,7 @@ - + @@ -42815,6 +44356,11 @@ + + + + + @@ -42954,11 +44500,6 @@ - - - - - @@ -42966,6 +44507,11 @@ + + + + + @@ -42998,7 +44544,8 @@ - + + @@ -43048,6 +44595,7 @@ + @@ -43656,6 +45204,23 @@ + + + + + + + + + + + + + + + + + @@ -43755,12 +45320,12 @@ - + - + @@ -44012,6 +45577,7 @@ + @@ -44050,7 +45616,6 @@ - @@ -44162,7 +45727,7 @@ - + @@ -44195,7 +45760,7 @@ - + @@ -44226,6 +45791,7 @@ + @@ -44278,7 +45844,6 @@ - @@ -44447,12 +46012,12 @@ - + @@ -44485,6 +46050,30 @@ + + + + + + + + + + + + + + + + + + + + + + + + @@ -44516,6 +46105,11 @@ + + + + + diff -Nru mesa-12.0.6/src/mapi/Makefile.am mesa-17.0.7/src/mapi/Makefile.am --- mesa-12.0.6/src/mapi/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mapi/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -46,8 +46,8 @@ $(SELINUX_CFLAGS) \ -I$(top_srcdir)/include \ -I$(top_srcdir)/src \ - -I$(top_srcdir)/src/mapi \ - -I$(top_builddir)/src/mapi + -I$(top_builddir)/src/mapi \ + -I$(top_srcdir)/src/mapi include Makefile.sources @@ -56,8 +56,8 @@ glapi_gen_mapi_deps := \ mapi_abi.py \ - $(wildcard glapi/gen/*.xml) \ - $(wildcard glapi/gen/*.py) + $(wildcard $(top_srcdir)/src/mapi/glapi/gen/*.xml) \ + $(wildcard $(top_srcdir)/src/mapi/glapi/gen/*.py) if HAVE_SHARED_GLAPI BUILT_SOURCES += shared-glapi/glapi_mapi_tmp.h @@ -119,6 +119,9 @@ if HAVE_APPLEDRI glapi_libglapi_la_SOURCES += glapi/glapi_gentable.c endif +if HAVE_WINDOWSDRI +glapi_libglapi_la_SOURCES += glapi/glapi_gentable.c +endif if HAVE_SHARED_GLAPI glapi_libglapi_la_SOURCES += $(MAPI_BRIDGE_FILES) glapi/glapi_mapi_tmp.h @@ -210,6 +213,7 @@ GLES3_include_HEADERS = \ $(top_srcdir)/include/GLES3/gl3.h \ $(top_srcdir)/include/GLES3/gl31.h \ + $(top_srcdir)/include/GLES3/gl32.h \ $(top_srcdir)/include/GLES3/gl3ext.h \ $(top_srcdir)/include/GLES3/gl3platform.h diff -Nru mesa-12.0.6/src/mapi/Makefile.in mesa-17.0.7/src/mapi/Makefile.in --- mesa-12.0.6/src/mapi/Makefile.in 2017-01-24 01:41:54.000000000 +0000 +++ mesa-17.0.7/src/mapi/Makefile.in 2017-06-01 10:37:23.000000000 +0000 @@ -131,23 +131,24 @@ build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ -TESTS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__append_12) \ - $(am__append_17) +TESTS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__append_13) \ + $(am__append_18) check_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) @HAVE_SHARED_GLAPI_TRUE@am__append_1 = shared-glapi/glapi_mapi_tmp.h @HAVE_SHARED_GLAPI_TRUE@am__append_2 = shared-glapi/libglapi.la @HAVE_SHARED_GLAPI_TRUE@am__append_3 = shared-glapi-test @HAVE_SHARED_GLAPI_TRUE@am__append_4 = shared-glapi-test @HAVE_APPLEDRI_TRUE@@HAVE_OPENGL_TRUE@am__append_5 = glapi/glapi_gentable.c -@HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_TRUE@am__append_6 = $(MAPI_BRIDGE_FILES) glapi/glapi_mapi_tmp.h -@HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_TRUE@am__append_7 = \ +@HAVE_OPENGL_TRUE@@HAVE_WINDOWSDRI_TRUE@am__append_6 = glapi/glapi_gentable.c +@HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_TRUE@am__append_7 = $(MAPI_BRIDGE_FILES) glapi/glapi_mapi_tmp.h +@HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_TRUE@am__append_8 = \ @HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_TRUE@ -DMAPI_MODE_BRIDGE \ @HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_TRUE@ -DMAPI_ABI_HEADER=\"glapi/glapi_mapi_tmp.h\" -@HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_FALSE@am__append_8 = \ +@HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_FALSE@am__append_9 = \ @HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_FALSE@ -DMAPI_MODE_UTIL -@HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_FALSE@am__append_9 = \ +@HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_FALSE@am__append_10 = \ @HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_FALSE@ glapi/glapi_dispatch.c \ @HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_FALSE@ glapi/glapi_entrypoint.c \ @HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_FALSE@ glapi/glapi_getproc.c \ @@ -158,18 +159,18 @@ @HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_FALSE@ $(GLAPI_ASM_SOURCES) \ @HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_FALSE@ $(MAPI_UTIL_FILES) -@HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_FALSE@am__append_10 = glapi-test @HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_FALSE@am__append_11 = glapi-test -@HAVE_OPENGL_ES1_TRUE@am__append_12 = es1api/ABI-check -@HAVE_OPENGL_ES1_TRUE@am__append_13 = es1api/glapi_mapi_tmp.h -@HAVE_OPENGL_ES1_TRUE@am__append_14 = es1api/glesv1_cm.pc -@HAVE_OPENGL_ES1_TRUE@am__append_15 = es1api/libGLESv1_CM.la -@HAVE_OPENGL_ES1_TRUE@@HAVE_SHARED_GLAPI_TRUE@am__append_16 = shared-glapi/libglapi.la -@HAVE_OPENGL_ES2_TRUE@am__append_17 = es2api/ABI-check -@HAVE_OPENGL_ES2_TRUE@am__append_18 = es2api/glapi_mapi_tmp.h -@HAVE_OPENGL_ES2_TRUE@am__append_19 = es2api/glesv2.pc -@HAVE_OPENGL_ES2_TRUE@am__append_20 = es2api/libGLESv2.la -@HAVE_OPENGL_ES2_TRUE@@HAVE_SHARED_GLAPI_TRUE@am__append_21 = shared-glapi/libglapi.la +@HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_FALSE@am__append_12 = glapi-test +@HAVE_OPENGL_ES1_TRUE@am__append_13 = es1api/ABI-check +@HAVE_OPENGL_ES1_TRUE@am__append_14 = es1api/glapi_mapi_tmp.h +@HAVE_OPENGL_ES1_TRUE@am__append_15 = es1api/glesv1_cm.pc +@HAVE_OPENGL_ES1_TRUE@am__append_16 = es1api/libGLESv1_CM.la +@HAVE_OPENGL_ES1_TRUE@@HAVE_SHARED_GLAPI_TRUE@am__append_17 = shared-glapi/libglapi.la +@HAVE_OPENGL_ES2_TRUE@am__append_18 = es2api/ABI-check +@HAVE_OPENGL_ES2_TRUE@am__append_19 = es2api/glapi_mapi_tmp.h +@HAVE_OPENGL_ES2_TRUE@am__append_20 = es2api/glesv2.pc +@HAVE_OPENGL_ES2_TRUE@am__append_21 = es2api/libGLESv2.la +@HAVE_OPENGL_ES2_TRUE@@HAVE_SHARED_GLAPI_TRUE@am__append_22 = shared-glapi/libglapi.la subdir = src/mapi ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps = $(top_srcdir)/m4/ax_check_gnu_make.m4 \ @@ -223,7 +224,7 @@ LTLIBRARIES = $(lib_LTLIBRARIES) $(noinst_LTLIBRARIES) am__DEPENDENCIES_1 = @HAVE_OPENGL_ES1_TRUE@es1api_libGLESv1_CM_la_DEPENDENCIES = \ -@HAVE_OPENGL_ES1_TRUE@ $(am__DEPENDENCIES_1) $(am__append_16) +@HAVE_OPENGL_ES1_TRUE@ $(am__DEPENDENCIES_1) $(am__append_17) am__es1api_libGLESv1_CM_la_SOURCES_DIST = entry.c \ es1api/glapi_mapi_tmp.h @HAVE_OPENGL_ES1_TRUE@am_es1api_libGLESv1_CM_la_OBJECTS = \ @@ -241,7 +242,7 @@ @HAVE_OPENGL_ES1_TRUE@ $(libdir) am__dirstamp = $(am__leading_dot)dirstamp @HAVE_OPENGL_ES2_TRUE@es2api_libGLESv2_la_DEPENDENCIES = \ -@HAVE_OPENGL_ES2_TRUE@ $(am__DEPENDENCIES_1) $(am__append_21) +@HAVE_OPENGL_ES2_TRUE@ $(am__DEPENDENCIES_1) $(am__append_22) am__es2api_libGLESv2_la_SOURCES_DIST = entry.c es2api/glapi_mapi_tmp.h @HAVE_OPENGL_ES2_TRUE@am_es2api_libGLESv2_la_OBJECTS = \ @HAVE_OPENGL_ES2_TRUE@ es2api_libGLESv2_la-entry.lo @@ -261,23 +262,25 @@ glapi/glapi_x86-64.S u_current.c u_current.h u_execmem.c \ u_execmem.h @HAVE_APPLEDRI_TRUE@@HAVE_OPENGL_TRUE@am__objects_1 = glapi/glapi_libglapi_la-glapi_gentable.lo -am__objects_2 = glapi_libglapi_la-entry.lo -@HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_TRUE@am__objects_3 = \ -@HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_TRUE@ $(am__objects_2) -@HAVE_OPENGL_TRUE@@HAVE_SPARC_ASM_FALSE@@HAVE_X86_64_ASM_FALSE@@HAVE_X86_ASM_TRUE@am__objects_4 = glapi/glapi_libglapi_la-glapi_x86.lo -@HAVE_OPENGL_TRUE@@HAVE_SPARC_ASM_FALSE@@HAVE_X86_64_ASM_TRUE@@HAVE_X86_ASM_TRUE@am__objects_4 = glapi/glapi_libglapi_la-glapi_x86-64.lo -@HAVE_OPENGL_TRUE@@HAVE_SPARC_ASM_TRUE@am__objects_4 = glapi/glapi_libglapi_la-glapi_sparc.lo -am__objects_5 = glapi_libglapi_la-u_current.lo \ +@HAVE_OPENGL_TRUE@@HAVE_WINDOWSDRI_TRUE@am__objects_2 = glapi/glapi_libglapi_la-glapi_gentable.lo +am__objects_3 = glapi_libglapi_la-entry.lo +@HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_TRUE@am__objects_4 = \ +@HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_TRUE@ $(am__objects_3) +@HAVE_OPENGL_TRUE@@HAVE_SPARC_ASM_FALSE@@HAVE_X86_64_ASM_FALSE@@HAVE_X86_ASM_TRUE@am__objects_5 = glapi/glapi_libglapi_la-glapi_x86.lo +@HAVE_OPENGL_TRUE@@HAVE_SPARC_ASM_FALSE@@HAVE_X86_64_ASM_TRUE@@HAVE_X86_ASM_TRUE@am__objects_5 = glapi/glapi_libglapi_la-glapi_x86-64.lo +@HAVE_OPENGL_TRUE@@HAVE_SPARC_ASM_TRUE@am__objects_5 = glapi/glapi_libglapi_la-glapi_sparc.lo +am__objects_6 = glapi_libglapi_la-u_current.lo \ glapi_libglapi_la-u_execmem.lo -@HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_FALSE@am__objects_6 = glapi/glapi_libglapi_la-glapi_dispatch.lo \ +@HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_FALSE@am__objects_7 = glapi/glapi_libglapi_la-glapi_dispatch.lo \ @HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_FALSE@ glapi/glapi_libglapi_la-glapi_entrypoint.lo \ @HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_FALSE@ glapi/glapi_libglapi_la-glapi_getproc.lo \ @HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_FALSE@ glapi/glapi_libglapi_la-glapi_nop.lo \ @HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_FALSE@ glapi/glapi_libglapi_la-glapi.lo \ -@HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_FALSE@ $(am__objects_4) \ -@HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_FALSE@ $(am__objects_5) +@HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_FALSE@ $(am__objects_5) \ +@HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_FALSE@ $(am__objects_6) @HAVE_OPENGL_TRUE@am_glapi_libglapi_la_OBJECTS = $(am__objects_1) \ -@HAVE_OPENGL_TRUE@ $(am__objects_3) $(am__objects_6) +@HAVE_OPENGL_TRUE@ $(am__objects_2) $(am__objects_4) \ +@HAVE_OPENGL_TRUE@ $(am__objects_7) glapi_libglapi_la_OBJECTS = $(am_glapi_libglapi_la_OBJECTS) @HAVE_OPENGL_TRUE@am_glapi_libglapi_la_rpath = @HAVE_SHARED_GLAPI_TRUE@shared_glapi_libglapi_la_DEPENDENCIES = \ @@ -286,14 +289,14 @@ am__shared_glapi_libglapi_la_SOURCES_DIST = entry.c mapi_glapi.c \ stub.c stub.h table.c table.h u_current.c u_current.h \ u_execmem.c u_execmem.h shared-glapi/glapi_mapi_tmp.h -am__objects_7 = shared_glapi_libglapi_la-u_current.lo \ +am__objects_8 = shared_glapi_libglapi_la-u_current.lo \ shared_glapi_libglapi_la-u_execmem.lo -am__objects_8 = shared_glapi_libglapi_la-entry.lo \ +am__objects_9 = shared_glapi_libglapi_la-entry.lo \ shared_glapi_libglapi_la-mapi_glapi.lo \ shared_glapi_libglapi_la-stub.lo \ - shared_glapi_libglapi_la-table.lo $(am__objects_7) + shared_glapi_libglapi_la-table.lo $(am__objects_8) @HAVE_SHARED_GLAPI_TRUE@am_shared_glapi_libglapi_la_OBJECTS = \ -@HAVE_SHARED_GLAPI_TRUE@ $(am__objects_8) +@HAVE_SHARED_GLAPI_TRUE@ $(am__objects_9) shared_glapi_libglapi_la_OBJECTS = \ $(am_shared_glapi_libglapi_la_OBJECTS) shared_glapi_libglapi_la_LINK = $(LIBTOOL) $(AM_V_lt) --tag=CC \ @@ -406,6 +409,7 @@ $(top_srcdir)/include/GLES2/gl2platform.h am__GLES3_include_HEADERS_DIST = $(top_srcdir)/include/GLES3/gl3.h \ $(top_srcdir)/include/GLES3/gl31.h \ + $(top_srcdir)/include/GLES3/gl32.h \ $(top_srcdir)/include/GLES3/gl3ext.h \ $(top_srcdir)/include/GLES3/gl3platform.h am__GLES_include_HEADERS_DIST = $(top_srcdir)/include/GLES/egl.h \ @@ -652,6 +656,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -666,6 +672,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -695,10 +702,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -748,11 +756,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -792,8 +797,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -830,8 +833,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -840,7 +841,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -848,13 +848,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -883,6 +884,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -946,11 +948,11 @@ top_builddir = @top_builddir@ top_srcdir = @top_srcdir@ SUBDIRS = -BUILT_SOURCES = $(am__append_1) $(am__append_13) $(am__append_18) +BUILT_SOURCES = $(am__append_1) $(am__append_14) $(am__append_19) CLEANFILES = $(BUILT_SOURCES) -lib_LTLIBRARIES = $(am__append_2) $(am__append_15) $(am__append_20) +lib_LTLIBRARIES = $(am__append_2) $(am__append_16) $(am__append_21) pkgconfigdir = $(libdir)/pkgconfig -pkgconfig_DATA = $(am__append_14) $(am__append_19) +pkgconfig_DATA = $(am__append_15) $(am__append_20) EXTRA_DIST = \ es1api/ABI-check \ es2api/ABI-check \ @@ -968,8 +970,8 @@ $(SELINUX_CFLAGS) \ -I$(top_srcdir)/include \ -I$(top_srcdir)/src \ - -I$(top_srcdir)/src/mapi \ - -I$(top_builddir)/src/mapi + -I$(top_builddir)/src/mapi \ + -I$(top_srcdir)/src/mapi MAPI_UTIL_FILES = \ u_current.c \ @@ -1008,8 +1010,8 @@ PYTHON_GEN = $(AM_V_GEN)$(PYTHON2) $(PYTHON_FLAGS) glapi_gen_mapi_deps := \ mapi_abi.py \ - $(wildcard glapi/gen/*.xml) \ - $(wildcard glapi/gen/*.py) + $(wildcard $(top_srcdir)/src/mapi/glapi/gen/*.xml) \ + $(wildcard $(top_srcdir)/src/mapi/glapi/gen/*.py) @HAVE_SHARED_GLAPI_TRUE@shared_glapi_libglapi_la_SOURCES = $(MAPI_GLAPI_FILES) shared-glapi/glapi_mapi_tmp.h @HAVE_SHARED_GLAPI_TRUE@shared_glapi_libglapi_la_CFLAGS = \ @@ -1044,11 +1046,12 @@ @HAVE_OPENGL_TRUE@@HAVE_X86_64_ASM_FALSE@@HAVE_X86_ASM_TRUE@GLAPI_ASM_SOURCES = glapi/glapi_x86.S @HAVE_OPENGL_TRUE@@HAVE_X86_64_ASM_TRUE@@HAVE_X86_ASM_TRUE@GLAPI_ASM_SOURCES = glapi/glapi_x86-64.S @HAVE_OPENGL_TRUE@glapi_libglapi_la_SOURCES = $(am__append_5) \ -@HAVE_OPENGL_TRUE@ $(am__append_6) $(am__append_9) +@HAVE_OPENGL_TRUE@ $(am__append_6) $(am__append_7) \ +@HAVE_OPENGL_TRUE@ $(am__append_10) @HAVE_OPENGL_TRUE@glapi_libglapi_la_CPPFLAGS = $(AM_CPPFLAGS) \ @HAVE_OPENGL_TRUE@ -I$(top_srcdir)/src/mapi/glapi \ -@HAVE_OPENGL_TRUE@ -I$(top_srcdir)/src/mesa $(am__append_7) \ -@HAVE_OPENGL_TRUE@ $(am__append_8) +@HAVE_OPENGL_TRUE@ -I$(top_srcdir)/src/mesa $(am__append_8) \ +@HAVE_OPENGL_TRUE@ $(am__append_9) @HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_FALSE@glapi_test_SOURCES = glapi/tests/check_table.cpp @HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_FALSE@glapi_test_CPPFLAGS = \ @HAVE_OPENGL_TRUE@@HAVE_SHARED_GLAPI_FALSE@ $(AM_CPPFLAGS) \ @@ -1076,7 +1079,7 @@ @HAVE_OPENGL_ES1_TRUE@ -DMAPI_ABI_HEADER=\"es1api/glapi_mapi_tmp.h\" @HAVE_OPENGL_ES1_TRUE@es1api_libGLESv1_CM_la_LIBADD = \ -@HAVE_OPENGL_ES1_TRUE@ $(GLESv1_CM_LIB_DEPS) $(am__append_16) +@HAVE_OPENGL_ES1_TRUE@ $(GLESv1_CM_LIB_DEPS) $(am__append_17) @HAVE_OPENGL_ES1_TRUE@es1api_libGLESv1_CM_la_LDFLAGS = \ @HAVE_OPENGL_ES1_TRUE@ -no-undefined \ @HAVE_OPENGL_ES1_TRUE@ -version-number 1:1 \ @@ -1093,6 +1096,7 @@ @HAVE_OPENGL_ES2_TRUE@GLES3_include_HEADERS = \ @HAVE_OPENGL_ES2_TRUE@ $(top_srcdir)/include/GLES3/gl3.h \ @HAVE_OPENGL_ES2_TRUE@ $(top_srcdir)/include/GLES3/gl31.h \ +@HAVE_OPENGL_ES2_TRUE@ $(top_srcdir)/include/GLES3/gl32.h \ @HAVE_OPENGL_ES2_TRUE@ $(top_srcdir)/include/GLES3/gl3ext.h \ @HAVE_OPENGL_ES2_TRUE@ $(top_srcdir)/include/GLES3/gl3platform.h @@ -1107,7 +1111,7 @@ @HAVE_OPENGL_ES2_TRUE@ -DMAPI_ABI_HEADER=\"es2api/glapi_mapi_tmp.h\" @HAVE_OPENGL_ES2_TRUE@es2api_libGLESv2_la_LIBADD = $(GLESv2_LIB_DEPS) \ -@HAVE_OPENGL_ES2_TRUE@ $(am__append_21) +@HAVE_OPENGL_ES2_TRUE@ $(am__append_22) @HAVE_OPENGL_ES2_TRUE@es2api_libGLESv2_la_LDFLAGS = \ @HAVE_OPENGL_ES2_TRUE@ -no-undefined \ @HAVE_OPENGL_ES2_TRUE@ -version-number 2 \ diff -Nru mesa-12.0.6/src/mapi/shared-glapi/glapi_mapi_tmp.h mesa-17.0.7/src/mapi/shared-glapi/glapi_mapi_tmp.h --- mesa-12.0.6/src/mapi/shared-glapi/glapi_mapi_tmp.h 2017-01-24 01:43:15.000000000 +0000 +++ mesa-17.0.7/src/mapi/shared-glapi/glapi_mapi_tmp.h 2017-06-01 10:37:58.000000000 +0000 @@ -922,423 +922,429 @@ void APIENTRY shared_dispatch_stub_909(GLuint first, GLsizei count, const GLuint *samplers); void APIENTRY shared_dispatch_stub_910(GLuint first, GLsizei count, const GLuint *textures); void APIENTRY shared_dispatch_stub_911(GLuint first, GLsizei count, const GLuint *buffers, const GLintptr *offsets, const GLsizei *strides); -void APIENTRY shared_dispatch_stub_912(GLenum mode, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); -void APIENTRY shared_dispatch_stub_913(GLenum mode, GLenum type, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); -void APIENTRY shared_dispatch_stub_914(GLenum origin, GLenum depth); -void APIENTRY shared_dispatch_stub_915(GLuint unit, GLuint texture); -void APIENTRY shared_dispatch_stub_916(GLuint readFramebuffer, GLuint drawFramebuffer, GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter); -GLenum APIENTRY shared_dispatch_stub_917(GLuint framebuffer, GLenum target); -void APIENTRY shared_dispatch_stub_918(GLuint buffer, GLenum internalformat, GLenum format, GLenum type, const GLvoid *data); -void APIENTRY shared_dispatch_stub_919(GLuint buffer, GLenum internalformat, GLintptr offset, GLsizeiptr size, GLenum format, GLenum type, const GLvoid *data); -void APIENTRY shared_dispatch_stub_920(GLuint framebuffer, GLenum buffer, GLint drawbuffer, GLfloat depth, GLint stencil); -void APIENTRY shared_dispatch_stub_921(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLfloat *value); -void APIENTRY shared_dispatch_stub_922(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLint *value); -void APIENTRY shared_dispatch_stub_923(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLuint *value); -void APIENTRY shared_dispatch_stub_924(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLsizei imageSize, const GLvoid *data); -void APIENTRY shared_dispatch_stub_925(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const GLvoid *data); -void APIENTRY shared_dispatch_stub_926(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid *data); -void APIENTRY shared_dispatch_stub_927(GLuint readBuffer, GLuint writeBuffer, GLintptr readOffset, GLintptr writeOffset, GLsizeiptr size); -void APIENTRY shared_dispatch_stub_928(GLuint texture, GLint level, GLint xoffset, GLint x, GLint y, GLsizei width); -void APIENTRY shared_dispatch_stub_929(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height); -void APIENTRY shared_dispatch_stub_930(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height); -void APIENTRY shared_dispatch_stub_931(GLsizei n, GLuint *buffers); -void APIENTRY shared_dispatch_stub_932(GLsizei n, GLuint *framebuffers); -void APIENTRY shared_dispatch_stub_933(GLsizei n, GLuint *pipelines); -void APIENTRY shared_dispatch_stub_934(GLenum target, GLsizei n, GLuint *ids); -void APIENTRY shared_dispatch_stub_935(GLsizei n, GLuint *renderbuffers); -void APIENTRY shared_dispatch_stub_936(GLsizei n, GLuint *samplers); -void APIENTRY shared_dispatch_stub_937(GLenum target, GLsizei n, GLuint *textures); -void APIENTRY shared_dispatch_stub_938(GLsizei n, GLuint *ids); -void APIENTRY shared_dispatch_stub_939(GLsizei n, GLuint *arrays); -void APIENTRY shared_dispatch_stub_940(GLuint vaobj, GLuint index); +void APIENTRY shared_dispatch_stub_912(GLuint num_groups_x, GLuint num_groups_y, GLuint num_groups_z, GLuint group_size_x, GLuint group_size_y, GLuint group_size_z); +void APIENTRY shared_dispatch_stub_913(GLenum mode, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); +void APIENTRY shared_dispatch_stub_914(GLenum mode, GLenum type, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride); +void APIENTRY shared_dispatch_stub_915(GLenum origin, GLenum depth); +void APIENTRY shared_dispatch_stub_916(GLuint unit, GLuint texture); +void APIENTRY shared_dispatch_stub_917(GLuint readFramebuffer, GLuint drawFramebuffer, GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter); +GLenum APIENTRY shared_dispatch_stub_918(GLuint framebuffer, GLenum target); +void APIENTRY shared_dispatch_stub_919(GLuint buffer, GLenum internalformat, GLenum format, GLenum type, const GLvoid *data); +void APIENTRY shared_dispatch_stub_920(GLuint buffer, GLenum internalformat, GLintptr offset, GLsizeiptr size, GLenum format, GLenum type, const GLvoid *data); +void APIENTRY shared_dispatch_stub_921(GLuint framebuffer, GLenum buffer, GLint drawbuffer, GLfloat depth, GLint stencil); +void APIENTRY shared_dispatch_stub_922(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLfloat *value); +void APIENTRY shared_dispatch_stub_923(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLint *value); +void APIENTRY shared_dispatch_stub_924(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLuint *value); +void APIENTRY shared_dispatch_stub_925(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLsizei imageSize, const GLvoid *data); +void APIENTRY shared_dispatch_stub_926(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const GLvoid *data); +void APIENTRY shared_dispatch_stub_927(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid *data); +void APIENTRY shared_dispatch_stub_928(GLuint readBuffer, GLuint writeBuffer, GLintptr readOffset, GLintptr writeOffset, GLsizeiptr size); +void APIENTRY shared_dispatch_stub_929(GLuint texture, GLint level, GLint xoffset, GLint x, GLint y, GLsizei width); +void APIENTRY shared_dispatch_stub_930(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height); +void APIENTRY shared_dispatch_stub_931(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height); +void APIENTRY shared_dispatch_stub_932(GLsizei n, GLuint *buffers); +void APIENTRY shared_dispatch_stub_933(GLsizei n, GLuint *framebuffers); +void APIENTRY shared_dispatch_stub_934(GLsizei n, GLuint *pipelines); +void APIENTRY shared_dispatch_stub_935(GLenum target, GLsizei n, GLuint *ids); +void APIENTRY shared_dispatch_stub_936(GLsizei n, GLuint *renderbuffers); +void APIENTRY shared_dispatch_stub_937(GLsizei n, GLuint *samplers); +void APIENTRY shared_dispatch_stub_938(GLenum target, GLsizei n, GLuint *textures); +void APIENTRY shared_dispatch_stub_939(GLsizei n, GLuint *ids); +void APIENTRY shared_dispatch_stub_940(GLsizei n, GLuint *arrays); void APIENTRY shared_dispatch_stub_941(GLuint vaobj, GLuint index); -void APIENTRY shared_dispatch_stub_942(GLuint buffer, GLintptr offset, GLsizeiptr length); -void APIENTRY shared_dispatch_stub_943(GLuint texture); -void APIENTRY shared_dispatch_stub_944(GLuint texture, GLint level, GLsizei bufSize, GLvoid *pixels); -void APIENTRY shared_dispatch_stub_945(GLuint buffer, GLenum pname, GLint64 *params); -void APIENTRY shared_dispatch_stub_946(GLuint buffer, GLenum pname, GLint *params); -void APIENTRY shared_dispatch_stub_947(GLuint buffer, GLenum pname, GLvoid **params); -void APIENTRY shared_dispatch_stub_948(GLuint buffer, GLintptr offset, GLsizeiptr size, GLvoid *data); -void APIENTRY shared_dispatch_stub_949(GLuint framebuffer, GLenum attachment, GLenum pname, GLint *params); -void APIENTRY shared_dispatch_stub_950(GLuint framebuffer, GLenum pname, GLint *param); -void APIENTRY shared_dispatch_stub_951(GLuint renderbuffer, GLenum pname, GLint *params); -void APIENTRY shared_dispatch_stub_952(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); +void APIENTRY shared_dispatch_stub_942(GLuint vaobj, GLuint index); +void APIENTRY shared_dispatch_stub_943(GLuint buffer, GLintptr offset, GLsizeiptr length); +void APIENTRY shared_dispatch_stub_944(GLuint texture); +void APIENTRY shared_dispatch_stub_945(GLuint texture, GLint level, GLsizei bufSize, GLvoid *pixels); +void APIENTRY shared_dispatch_stub_946(GLuint buffer, GLenum pname, GLint64 *params); +void APIENTRY shared_dispatch_stub_947(GLuint buffer, GLenum pname, GLint *params); +void APIENTRY shared_dispatch_stub_948(GLuint buffer, GLenum pname, GLvoid **params); +void APIENTRY shared_dispatch_stub_949(GLuint buffer, GLintptr offset, GLsizeiptr size, GLvoid *data); +void APIENTRY shared_dispatch_stub_950(GLuint framebuffer, GLenum attachment, GLenum pname, GLint *params); +void APIENTRY shared_dispatch_stub_951(GLuint framebuffer, GLenum pname, GLint *param); +void APIENTRY shared_dispatch_stub_952(GLuint renderbuffer, GLenum pname, GLint *params); void APIENTRY shared_dispatch_stub_953(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); void APIENTRY shared_dispatch_stub_954(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); void APIENTRY shared_dispatch_stub_955(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); -void APIENTRY shared_dispatch_stub_956(GLuint texture, GLint level, GLenum format, GLenum type, GLsizei bufSize, GLvoid *pixels); -void APIENTRY shared_dispatch_stub_957(GLuint texture, GLint level, GLenum pname, GLfloat *params); -void APIENTRY shared_dispatch_stub_958(GLuint texture, GLint level, GLenum pname, GLint *params); -void APIENTRY shared_dispatch_stub_959(GLuint texture, GLenum pname, GLint *params); -void APIENTRY shared_dispatch_stub_960(GLuint texture, GLenum pname, GLuint *params); -void APIENTRY shared_dispatch_stub_961(GLuint texture, GLenum pname, GLfloat *params); -void APIENTRY shared_dispatch_stub_962(GLuint texture, GLenum pname, GLint *params); -void APIENTRY shared_dispatch_stub_963(GLuint xfb, GLenum pname, GLuint index, GLint64 *param); -void APIENTRY shared_dispatch_stub_964(GLuint xfb, GLenum pname, GLuint index, GLint *param); -void APIENTRY shared_dispatch_stub_965(GLuint xfb, GLenum pname, GLint *param); -void APIENTRY shared_dispatch_stub_966(GLuint vaobj, GLuint index, GLenum pname, GLint64 *param); -void APIENTRY shared_dispatch_stub_967(GLuint vaobj, GLuint index, GLenum pname, GLint *param); -void APIENTRY shared_dispatch_stub_968(GLuint vaobj, GLenum pname, GLint *param); -void APIENTRY shared_dispatch_stub_969(GLuint framebuffer, GLsizei numAttachments, const GLenum *attachments); -void APIENTRY shared_dispatch_stub_970(GLuint framebuffer, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height); -GLvoid * APIENTRY shared_dispatch_stub_971(GLuint buffer, GLenum access); -GLvoid * APIENTRY shared_dispatch_stub_972(GLuint buffer, GLintptr offset, GLsizeiptr length, GLbitfield access); -void APIENTRY shared_dispatch_stub_973(GLuint buffer, GLsizeiptr size, const GLvoid *data, GLenum usage); -void APIENTRY shared_dispatch_stub_974(GLuint buffer, GLsizeiptr size, const GLvoid *data, GLbitfield flags); -void APIENTRY shared_dispatch_stub_975(GLuint buffer, GLintptr offset, GLsizeiptr size, const GLvoid *data); -void APIENTRY shared_dispatch_stub_976(GLuint framebuffer, GLenum buf); -void APIENTRY shared_dispatch_stub_977(GLuint framebuffer, GLsizei n, const GLenum *bufs); -void APIENTRY shared_dispatch_stub_978(GLuint framebuffer, GLenum pname, GLint param); -void APIENTRY shared_dispatch_stub_979(GLuint framebuffer, GLenum buf); -void APIENTRY shared_dispatch_stub_980(GLuint framebuffer, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer); -void APIENTRY shared_dispatch_stub_981(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level); -void APIENTRY shared_dispatch_stub_982(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level, GLint layer); -void APIENTRY shared_dispatch_stub_983(GLuint renderbuffer, GLenum internalformat, GLsizei width, GLsizei height); -void APIENTRY shared_dispatch_stub_984(GLuint renderbuffer, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height); -void APIENTRY shared_dispatch_stub_985(GLuint texture, GLenum internalformat, GLuint buffer); -void APIENTRY shared_dispatch_stub_986(GLuint texture, GLenum internalformat, GLuint buffer, GLintptr offset, GLsizeiptr size); -void APIENTRY shared_dispatch_stub_987(GLuint texture, GLenum pname, const GLint *params); -void APIENTRY shared_dispatch_stub_988(GLuint texture, GLenum pname, const GLuint *params); -void APIENTRY shared_dispatch_stub_989(GLuint texture, GLenum pname, GLfloat param); -void APIENTRY shared_dispatch_stub_990(GLuint texture, GLenum pname, const GLfloat *param); -void APIENTRY shared_dispatch_stub_991(GLuint texture, GLenum pname, GLint param); -void APIENTRY shared_dispatch_stub_992(GLuint texture, GLenum pname, const GLint *param); -void APIENTRY shared_dispatch_stub_993(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width); -void APIENTRY shared_dispatch_stub_994(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height); -void APIENTRY shared_dispatch_stub_995(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations); -void APIENTRY shared_dispatch_stub_996(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth); -void APIENTRY shared_dispatch_stub_997(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedsamplelocations); -void APIENTRY shared_dispatch_stub_998(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLenum type, const GLvoid *pixels); -void APIENTRY shared_dispatch_stub_999(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid *pixels); -void APIENTRY shared_dispatch_stub_1000(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid *pixels); -void APIENTRY shared_dispatch_stub_1001(GLuint xfb, GLuint index, GLuint buffer); -void APIENTRY shared_dispatch_stub_1002(GLuint xfb, GLuint index, GLuint buffer, GLintptr offset, GLsizeiptr size); -GLboolean APIENTRY shared_dispatch_stub_1003(GLuint buffer); -void APIENTRY shared_dispatch_stub_1004(GLuint vaobj, GLuint attribindex, GLuint bindingindex); -void APIENTRY shared_dispatch_stub_1005(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLboolean normalized, GLuint relativeoffset); -void APIENTRY shared_dispatch_stub_1006(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset); +void APIENTRY shared_dispatch_stub_956(GLuint id, GLuint buffer, GLenum pname, GLintptr offset); +void APIENTRY shared_dispatch_stub_957(GLuint texture, GLint level, GLenum format, GLenum type, GLsizei bufSize, GLvoid *pixels); +void APIENTRY shared_dispatch_stub_958(GLuint texture, GLint level, GLenum pname, GLfloat *params); +void APIENTRY shared_dispatch_stub_959(GLuint texture, GLint level, GLenum pname, GLint *params); +void APIENTRY shared_dispatch_stub_960(GLuint texture, GLenum pname, GLint *params); +void APIENTRY shared_dispatch_stub_961(GLuint texture, GLenum pname, GLuint *params); +void APIENTRY shared_dispatch_stub_962(GLuint texture, GLenum pname, GLfloat *params); +void APIENTRY shared_dispatch_stub_963(GLuint texture, GLenum pname, GLint *params); +void APIENTRY shared_dispatch_stub_964(GLuint xfb, GLenum pname, GLuint index, GLint64 *param); +void APIENTRY shared_dispatch_stub_965(GLuint xfb, GLenum pname, GLuint index, GLint *param); +void APIENTRY shared_dispatch_stub_966(GLuint xfb, GLenum pname, GLint *param); +void APIENTRY shared_dispatch_stub_967(GLuint vaobj, GLuint index, GLenum pname, GLint64 *param); +void APIENTRY shared_dispatch_stub_968(GLuint vaobj, GLuint index, GLenum pname, GLint *param); +void APIENTRY shared_dispatch_stub_969(GLuint vaobj, GLenum pname, GLint *param); +void APIENTRY shared_dispatch_stub_970(GLuint framebuffer, GLsizei numAttachments, const GLenum *attachments); +void APIENTRY shared_dispatch_stub_971(GLuint framebuffer, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height); +GLvoid * APIENTRY shared_dispatch_stub_972(GLuint buffer, GLenum access); +GLvoid * APIENTRY shared_dispatch_stub_973(GLuint buffer, GLintptr offset, GLsizeiptr length, GLbitfield access); +void APIENTRY shared_dispatch_stub_974(GLuint buffer, GLsizeiptr size, const GLvoid *data, GLenum usage); +void APIENTRY shared_dispatch_stub_975(GLuint buffer, GLsizeiptr size, const GLvoid *data, GLbitfield flags); +void APIENTRY shared_dispatch_stub_976(GLuint buffer, GLintptr offset, GLsizeiptr size, const GLvoid *data); +void APIENTRY shared_dispatch_stub_977(GLuint framebuffer, GLenum buf); +void APIENTRY shared_dispatch_stub_978(GLuint framebuffer, GLsizei n, const GLenum *bufs); +void APIENTRY shared_dispatch_stub_979(GLuint framebuffer, GLenum pname, GLint param); +void APIENTRY shared_dispatch_stub_980(GLuint framebuffer, GLenum buf); +void APIENTRY shared_dispatch_stub_981(GLuint framebuffer, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer); +void APIENTRY shared_dispatch_stub_982(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level); +void APIENTRY shared_dispatch_stub_983(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level, GLint layer); +void APIENTRY shared_dispatch_stub_984(GLuint renderbuffer, GLenum internalformat, GLsizei width, GLsizei height); +void APIENTRY shared_dispatch_stub_985(GLuint renderbuffer, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height); +void APIENTRY shared_dispatch_stub_986(GLuint texture, GLenum internalformat, GLuint buffer); +void APIENTRY shared_dispatch_stub_987(GLuint texture, GLenum internalformat, GLuint buffer, GLintptr offset, GLsizeiptr size); +void APIENTRY shared_dispatch_stub_988(GLuint texture, GLenum pname, const GLint *params); +void APIENTRY shared_dispatch_stub_989(GLuint texture, GLenum pname, const GLuint *params); +void APIENTRY shared_dispatch_stub_990(GLuint texture, GLenum pname, GLfloat param); +void APIENTRY shared_dispatch_stub_991(GLuint texture, GLenum pname, const GLfloat *param); +void APIENTRY shared_dispatch_stub_992(GLuint texture, GLenum pname, GLint param); +void APIENTRY shared_dispatch_stub_993(GLuint texture, GLenum pname, const GLint *param); +void APIENTRY shared_dispatch_stub_994(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width); +void APIENTRY shared_dispatch_stub_995(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height); +void APIENTRY shared_dispatch_stub_996(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations); +void APIENTRY shared_dispatch_stub_997(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth); +void APIENTRY shared_dispatch_stub_998(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedsamplelocations); +void APIENTRY shared_dispatch_stub_999(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLenum type, const GLvoid *pixels); +void APIENTRY shared_dispatch_stub_1000(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid *pixels); +void APIENTRY shared_dispatch_stub_1001(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid *pixels); +void APIENTRY shared_dispatch_stub_1002(GLuint xfb, GLuint index, GLuint buffer); +void APIENTRY shared_dispatch_stub_1003(GLuint xfb, GLuint index, GLuint buffer, GLintptr offset, GLsizeiptr size); +GLboolean APIENTRY shared_dispatch_stub_1004(GLuint buffer); +void APIENTRY shared_dispatch_stub_1005(GLuint vaobj, GLuint attribindex, GLuint bindingindex); +void APIENTRY shared_dispatch_stub_1006(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLboolean normalized, GLuint relativeoffset); void APIENTRY shared_dispatch_stub_1007(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset); -void APIENTRY shared_dispatch_stub_1008(GLuint vaobj, GLuint bindingindex, GLuint divisor); -void APIENTRY shared_dispatch_stub_1009(GLuint vaobj, GLuint buffer); -void APIENTRY shared_dispatch_stub_1010(GLuint vaobj, GLuint bindingindex, GLuint buffer, GLintptr offset, GLsizei stride); -void APIENTRY shared_dispatch_stub_1011(GLuint vaobj, GLuint first, GLsizei count, const GLuint *buffers, const GLintptr *offsets, const GLsizei *strides); -void APIENTRY shared_dispatch_stub_1012(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLsizei bufSize, GLvoid *pixels); -void APIENTRY shared_dispatch_stub_1013(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, GLsizei bufSize, GLvoid *pixels); -void APIENTRY shared_dispatch_stub_1014(GLuint buffer); -void APIENTRY shared_dispatch_stub_1015(GLuint buffer, GLintptr offset, GLsizeiptr length); -void APIENTRY shared_dispatch_stub_1016(GLenum target, GLsizei numAttachments, const GLenum *attachments); -void APIENTRY shared_dispatch_stub_1017(GLenum target, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height); -void APIENTRY shared_dispatch_stub_1018(GLuint texture, GLint level); -void APIENTRY shared_dispatch_stub_1019(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth); -void APIENTRY shared_dispatch_stub_1020(GLfloat factor, GLfloat bias); -void APIENTRY shared_dispatch_stub_1021(GLfloat x, GLfloat y, GLfloat z, GLfloat width, GLfloat height); -void APIENTRY shared_dispatch_stub_1022(const GLfloat *coords); -void APIENTRY shared_dispatch_stub_1023(GLint x, GLint y, GLint z, GLint width, GLint height); -void APIENTRY shared_dispatch_stub_1024(const GLint *coords); -void APIENTRY shared_dispatch_stub_1025(GLshort x, GLshort y, GLshort z, GLshort width, GLshort height); -void APIENTRY shared_dispatch_stub_1026(const GLshort *coords); -void APIENTRY shared_dispatch_stub_1027(GLfixed x, GLfixed y, GLfixed z, GLfixed width, GLfixed height); -void APIENTRY shared_dispatch_stub_1028(const GLfixed *coords); -void APIENTRY shared_dispatch_stub_1029(GLenum type, GLsizei stride, const GLvoid *pointer); -GLbitfield APIENTRY shared_dispatch_stub_1030(GLfixed *mantissa, GLint *exponent); -void APIENTRY shared_dispatch_stub_1031(GLclampf value, GLboolean invert); -void APIENTRY shared_dispatch_stub_1032(GLenum pattern); -void APIENTRY shared_dispatch_stub_1033(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); -void APIENTRY shared_dispatch_stub_1034(GLsizei stride, GLsizei count, const GLboolean *pointer); -void APIENTRY shared_dispatch_stub_1035(GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); +void APIENTRY shared_dispatch_stub_1008(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset); +void APIENTRY shared_dispatch_stub_1009(GLuint vaobj, GLuint bindingindex, GLuint divisor); +void APIENTRY shared_dispatch_stub_1010(GLuint vaobj, GLuint buffer); +void APIENTRY shared_dispatch_stub_1011(GLuint vaobj, GLuint bindingindex, GLuint buffer, GLintptr offset, GLsizei stride); +void APIENTRY shared_dispatch_stub_1012(GLuint vaobj, GLuint first, GLsizei count, const GLuint *buffers, const GLintptr *offsets, const GLsizei *strides); +void APIENTRY shared_dispatch_stub_1013(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLsizei bufSize, GLvoid *pixels); +void APIENTRY shared_dispatch_stub_1014(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, GLsizei bufSize, GLvoid *pixels); +void APIENTRY shared_dispatch_stub_1015(GLuint buffer); +void APIENTRY shared_dispatch_stub_1016(GLuint buffer, GLintptr offset, GLsizeiptr length); +void APIENTRY shared_dispatch_stub_1017(GLenum target, GLsizei numAttachments, const GLenum *attachments); +void APIENTRY shared_dispatch_stub_1018(GLenum target, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height); +void APIENTRY shared_dispatch_stub_1019(GLuint texture, GLint level); +void APIENTRY shared_dispatch_stub_1020(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth); +void APIENTRY shared_dispatch_stub_1021(GLfloat factor, GLfloat bias); +void APIENTRY shared_dispatch_stub_1022(GLfloat x, GLfloat y, GLfloat z, GLfloat width, GLfloat height); +void APIENTRY shared_dispatch_stub_1023(const GLfloat *coords); +void APIENTRY shared_dispatch_stub_1024(GLint x, GLint y, GLint z, GLint width, GLint height); +void APIENTRY shared_dispatch_stub_1025(const GLint *coords); +void APIENTRY shared_dispatch_stub_1026(GLshort x, GLshort y, GLshort z, GLshort width, GLshort height); +void APIENTRY shared_dispatch_stub_1027(const GLshort *coords); +void APIENTRY shared_dispatch_stub_1028(GLfixed x, GLfixed y, GLfixed z, GLfixed width, GLfixed height); +void APIENTRY shared_dispatch_stub_1029(const GLfixed *coords); +void APIENTRY shared_dispatch_stub_1030(GLenum type, GLsizei stride, const GLvoid *pointer); +GLbitfield APIENTRY shared_dispatch_stub_1031(GLfixed *mantissa, GLint *exponent); +void APIENTRY shared_dispatch_stub_1032(GLclampf value, GLboolean invert); +void APIENTRY shared_dispatch_stub_1033(GLenum pattern); +void APIENTRY shared_dispatch_stub_1034(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); +void APIENTRY shared_dispatch_stub_1035(GLsizei stride, GLsizei count, const GLboolean *pointer); void APIENTRY shared_dispatch_stub_1036(GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); -void APIENTRY shared_dispatch_stub_1037(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); +void APIENTRY shared_dispatch_stub_1037(GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); void APIENTRY shared_dispatch_stub_1038(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); -void APIENTRY shared_dispatch_stub_1039(GLenum target, GLsizei numAttachments, const GLenum *attachments); -void APIENTRY shared_dispatch_stub_1040(GLuint pipeline, GLuint program); -void APIENTRY shared_dispatch_stub_1041(GLuint pipeline); -GLuint APIENTRY shared_dispatch_stub_1042(GLenum type, GLsizei count, const GLchar * const *strings); -void APIENTRY shared_dispatch_stub_1043(GLsizei n, const GLuint *pipelines); -void APIENTRY shared_dispatch_stub_1044(GLsizei n, GLuint *pipelines); -void APIENTRY shared_dispatch_stub_1045(GLuint pipeline, GLsizei bufSize, GLsizei *length, GLchar *infoLog); -void APIENTRY shared_dispatch_stub_1046(GLuint pipeline, GLenum pname, GLint *params); -GLboolean APIENTRY shared_dispatch_stub_1047(GLuint pipeline); -void APIENTRY shared_dispatch_stub_1048(GLint first, GLsizei count); -void APIENTRY shared_dispatch_stub_1049(GLuint program, GLint location, GLdouble x); -void APIENTRY shared_dispatch_stub_1050(GLuint program, GLint location, GLsizei count, const GLdouble *value); -void APIENTRY shared_dispatch_stub_1051(GLuint program, GLint location, GLfloat x); -void APIENTRY shared_dispatch_stub_1052(GLuint program, GLint location, GLsizei count, const GLfloat *value); -void APIENTRY shared_dispatch_stub_1053(GLuint program, GLint location, GLint x); -void APIENTRY shared_dispatch_stub_1054(GLuint program, GLint location, GLsizei count, const GLint *value); -void APIENTRY shared_dispatch_stub_1055(GLuint program, GLint location, GLuint x); -void APIENTRY shared_dispatch_stub_1056(GLuint program, GLint location, GLsizei count, const GLuint *value); -void APIENTRY shared_dispatch_stub_1057(GLuint program, GLint location, GLdouble x, GLdouble y); -void APIENTRY shared_dispatch_stub_1058(GLuint program, GLint location, GLsizei count, const GLdouble *value); -void APIENTRY shared_dispatch_stub_1059(GLuint program, GLint location, GLfloat x, GLfloat y); -void APIENTRY shared_dispatch_stub_1060(GLuint program, GLint location, GLsizei count, const GLfloat *value); -void APIENTRY shared_dispatch_stub_1061(GLuint program, GLint location, GLint x, GLint y); -void APIENTRY shared_dispatch_stub_1062(GLuint program, GLint location, GLsizei count, const GLint *value); -void APIENTRY shared_dispatch_stub_1063(GLuint program, GLint location, GLuint x, GLuint y); -void APIENTRY shared_dispatch_stub_1064(GLuint program, GLint location, GLsizei count, const GLuint *value); -void APIENTRY shared_dispatch_stub_1065(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z); -void APIENTRY shared_dispatch_stub_1066(GLuint program, GLint location, GLsizei count, const GLdouble *value); -void APIENTRY shared_dispatch_stub_1067(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z); -void APIENTRY shared_dispatch_stub_1068(GLuint program, GLint location, GLsizei count, const GLfloat *value); -void APIENTRY shared_dispatch_stub_1069(GLuint program, GLint location, GLint x, GLint y, GLint z); -void APIENTRY shared_dispatch_stub_1070(GLuint program, GLint location, GLsizei count, const GLint *value); -void APIENTRY shared_dispatch_stub_1071(GLuint program, GLint location, GLuint x, GLuint y, GLuint z); -void APIENTRY shared_dispatch_stub_1072(GLuint program, GLint location, GLsizei count, const GLuint *value); -void APIENTRY shared_dispatch_stub_1073(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z, GLdouble w); -void APIENTRY shared_dispatch_stub_1074(GLuint program, GLint location, GLsizei count, const GLdouble *value); -void APIENTRY shared_dispatch_stub_1075(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z, GLfloat w); -void APIENTRY shared_dispatch_stub_1076(GLuint program, GLint location, GLsizei count, const GLfloat *value); -void APIENTRY shared_dispatch_stub_1077(GLuint program, GLint location, GLint x, GLint y, GLint z, GLint w); -void APIENTRY shared_dispatch_stub_1078(GLuint program, GLint location, GLsizei count, const GLint *value); -void APIENTRY shared_dispatch_stub_1079(GLuint program, GLint location, GLuint x, GLuint y, GLuint z, GLuint w); -void APIENTRY shared_dispatch_stub_1080(GLuint program, GLint location, GLsizei count, const GLuint *value); -void APIENTRY shared_dispatch_stub_1081(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); -void APIENTRY shared_dispatch_stub_1082(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY shared_dispatch_stub_1083(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); -void APIENTRY shared_dispatch_stub_1084(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY shared_dispatch_stub_1085(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); -void APIENTRY shared_dispatch_stub_1086(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY shared_dispatch_stub_1087(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); -void APIENTRY shared_dispatch_stub_1088(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY shared_dispatch_stub_1089(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); -void APIENTRY shared_dispatch_stub_1090(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY shared_dispatch_stub_1091(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); -void APIENTRY shared_dispatch_stub_1092(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY shared_dispatch_stub_1093(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); -void APIENTRY shared_dispatch_stub_1094(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY shared_dispatch_stub_1095(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); -void APIENTRY shared_dispatch_stub_1096(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY shared_dispatch_stub_1097(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); -void APIENTRY shared_dispatch_stub_1098(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); -void APIENTRY shared_dispatch_stub_1099(void); -void APIENTRY shared_dispatch_stub_1100(GLuint pipeline, GLbitfield stages, GLuint program); -void APIENTRY shared_dispatch_stub_1101(GLuint pipeline); -void APIENTRY shared_dispatch_stub_1102(GLDEBUGPROC callback, const GLvoid *userParam); -void APIENTRY shared_dispatch_stub_1103(GLenum source, GLenum type, GLenum severity, GLsizei count, const GLuint *ids, GLboolean enabled); -void APIENTRY shared_dispatch_stub_1104(GLenum source, GLenum type, GLuint id, GLenum severity, GLsizei length, const GLchar *buf); -GLuint APIENTRY shared_dispatch_stub_1105(GLuint count, GLsizei bufsize, GLenum *sources, GLenum *types, GLuint *ids, GLenum *severities, GLsizei *lengths, GLchar *messageLog); -void APIENTRY shared_dispatch_stub_1106(GLenum identifier, GLuint name, GLsizei bufSize, GLsizei *length, GLchar *label); -void APIENTRY shared_dispatch_stub_1107(const GLvoid *ptr, GLsizei bufSize, GLsizei *length, GLchar *label); -void APIENTRY shared_dispatch_stub_1108(GLenum identifier, GLuint name, GLsizei length, const GLchar *label); -void APIENTRY shared_dispatch_stub_1109(const GLvoid *ptr, GLsizei length, const GLchar *label); -void APIENTRY shared_dispatch_stub_1110(void); -void APIENTRY shared_dispatch_stub_1111(GLenum source, GLuint id, GLsizei length, const GLchar *message); -void APIENTRY shared_dispatch_stub_1112(GLfloat red, GLfloat green, GLfloat blue); -void APIENTRY shared_dispatch_stub_1113(const GLfloat *v); -void APIENTRY shared_dispatch_stub_1114(GLenum mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount); -void APIENTRY shared_dispatch_stub_1115(GLfloat coord); -void APIENTRY shared_dispatch_stub_1116(const GLfloat *coord); -void APIENTRY shared_dispatch_stub_1117(void); -void APIENTRY shared_dispatch_stub_1118(GLdouble x, GLdouble y, GLdouble z, GLdouble w); -void APIENTRY shared_dispatch_stub_1119(const GLdouble *v); -void APIENTRY shared_dispatch_stub_1120(GLfloat x, GLfloat y, GLfloat z, GLfloat w); -void APIENTRY shared_dispatch_stub_1121(const GLfloat *v); -void APIENTRY shared_dispatch_stub_1122(GLint x, GLint y, GLint z, GLint w); -void APIENTRY shared_dispatch_stub_1123(const GLint *v); -void APIENTRY shared_dispatch_stub_1124(GLshort x, GLshort y, GLshort z, GLshort w); -void APIENTRY shared_dispatch_stub_1125(const GLshort *v); -void APIENTRY shared_dispatch_stub_1126(const GLenum *mode, const GLint *first, const GLsizei *count, GLsizei primcount, GLint modestride); -void APIENTRY shared_dispatch_stub_1127(const GLenum *mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount, GLint modestride); -GLboolean APIENTRY shared_dispatch_stub_1128(GLsizei n, const GLuint *ids, GLboolean *residences); -void APIENTRY shared_dispatch_stub_1129(GLenum target, GLuint id, const GLfloat *params); -void APIENTRY shared_dispatch_stub_1130(GLenum target, GLuint index, GLenum pname, GLdouble *params); -void APIENTRY shared_dispatch_stub_1131(GLenum target, GLuint index, GLenum pname, GLfloat *params); -void APIENTRY shared_dispatch_stub_1132(GLuint id, GLenum pname, GLubyte *program); -void APIENTRY shared_dispatch_stub_1133(GLuint id, GLenum pname, GLint *params); -void APIENTRY shared_dispatch_stub_1134(GLenum target, GLuint address, GLenum pname, GLint *params); -void APIENTRY shared_dispatch_stub_1135(GLuint index, GLenum pname, GLdouble *params); -void APIENTRY shared_dispatch_stub_1136(GLuint index, GLenum pname, GLfloat *params); -void APIENTRY shared_dispatch_stub_1137(GLuint index, GLenum pname, GLint *params); -void APIENTRY shared_dispatch_stub_1138(GLenum target, GLuint id, GLsizei len, const GLubyte *program); -void APIENTRY shared_dispatch_stub_1139(GLenum target, GLuint index, GLsizei num, const GLdouble *params); -void APIENTRY shared_dispatch_stub_1140(GLenum target, GLuint index, GLsizei num, const GLfloat *params); -void APIENTRY shared_dispatch_stub_1141(GLsizei n, const GLuint *ids); -void APIENTRY shared_dispatch_stub_1142(GLenum target, GLuint address, GLenum matrix, GLenum transform); -void APIENTRY shared_dispatch_stub_1143(GLuint index, GLdouble x); -void APIENTRY shared_dispatch_stub_1144(GLuint index, const GLdouble *v); -void APIENTRY shared_dispatch_stub_1145(GLuint index, GLfloat x); -void APIENTRY shared_dispatch_stub_1146(GLuint index, const GLfloat *v); -void APIENTRY shared_dispatch_stub_1147(GLuint index, GLshort x); -void APIENTRY shared_dispatch_stub_1148(GLuint index, const GLshort *v); -void APIENTRY shared_dispatch_stub_1149(GLuint index, GLdouble x, GLdouble y); -void APIENTRY shared_dispatch_stub_1150(GLuint index, const GLdouble *v); -void APIENTRY shared_dispatch_stub_1151(GLuint index, GLfloat x, GLfloat y); -void APIENTRY shared_dispatch_stub_1152(GLuint index, const GLfloat *v); -void APIENTRY shared_dispatch_stub_1153(GLuint index, GLshort x, GLshort y); -void APIENTRY shared_dispatch_stub_1154(GLuint index, const GLshort *v); -void APIENTRY shared_dispatch_stub_1155(GLuint index, GLdouble x, GLdouble y, GLdouble z); -void APIENTRY shared_dispatch_stub_1156(GLuint index, const GLdouble *v); -void APIENTRY shared_dispatch_stub_1157(GLuint index, GLfloat x, GLfloat y, GLfloat z); -void APIENTRY shared_dispatch_stub_1158(GLuint index, const GLfloat *v); -void APIENTRY shared_dispatch_stub_1159(GLuint index, GLshort x, GLshort y, GLshort z); -void APIENTRY shared_dispatch_stub_1160(GLuint index, const GLshort *v); -void APIENTRY shared_dispatch_stub_1161(GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w); -void APIENTRY shared_dispatch_stub_1162(GLuint index, const GLdouble *v); -void APIENTRY shared_dispatch_stub_1163(GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w); -void APIENTRY shared_dispatch_stub_1164(GLuint index, const GLfloat *v); -void APIENTRY shared_dispatch_stub_1165(GLuint index, GLshort x, GLshort y, GLshort z, GLshort w); -void APIENTRY shared_dispatch_stub_1166(GLuint index, const GLshort *v); -void APIENTRY shared_dispatch_stub_1167(GLuint index, GLubyte x, GLubyte y, GLubyte z, GLubyte w); -void APIENTRY shared_dispatch_stub_1168(GLuint index, const GLubyte *v); -void APIENTRY shared_dispatch_stub_1169(GLuint index, GLint size, GLenum type, GLsizei stride, const GLvoid *pointer); -void APIENTRY shared_dispatch_stub_1170(GLuint index, GLsizei n, const GLdouble *v); -void APIENTRY shared_dispatch_stub_1171(GLuint index, GLsizei n, const GLfloat *v); -void APIENTRY shared_dispatch_stub_1172(GLuint index, GLsizei n, const GLshort *v); -void APIENTRY shared_dispatch_stub_1173(GLuint index, GLsizei n, const GLdouble *v); -void APIENTRY shared_dispatch_stub_1174(GLuint index, GLsizei n, const GLfloat *v); -void APIENTRY shared_dispatch_stub_1175(GLuint index, GLsizei n, const GLshort *v); -void APIENTRY shared_dispatch_stub_1176(GLuint index, GLsizei n, const GLdouble *v); -void APIENTRY shared_dispatch_stub_1177(GLuint index, GLsizei n, const GLfloat *v); -void APIENTRY shared_dispatch_stub_1178(GLuint index, GLsizei n, const GLshort *v); -void APIENTRY shared_dispatch_stub_1179(GLuint index, GLsizei n, const GLdouble *v); -void APIENTRY shared_dispatch_stub_1180(GLuint index, GLsizei n, const GLfloat *v); -void APIENTRY shared_dispatch_stub_1181(GLuint index, GLsizei n, const GLshort *v); -void APIENTRY shared_dispatch_stub_1182(GLuint index, GLsizei n, const GLubyte *v); -void APIENTRY shared_dispatch_stub_1183(GLenum pname, GLfloat *param); -void APIENTRY shared_dispatch_stub_1184(GLenum pname, GLint *param); -void APIENTRY shared_dispatch_stub_1185(GLenum pname, const GLfloat *param); -void APIENTRY shared_dispatch_stub_1186(GLenum pname, const GLint *param); -void APIENTRY shared_dispatch_stub_1187(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); -void APIENTRY shared_dispatch_stub_1188(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); -void APIENTRY shared_dispatch_stub_1189(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); -void APIENTRY shared_dispatch_stub_1190(void); -void APIENTRY shared_dispatch_stub_1191(GLuint id); -void APIENTRY shared_dispatch_stub_1192(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); -void APIENTRY shared_dispatch_stub_1193(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); -void APIENTRY shared_dispatch_stub_1194(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); -void APIENTRY shared_dispatch_stub_1195(GLuint id); -void APIENTRY shared_dispatch_stub_1196(void); -GLuint APIENTRY shared_dispatch_stub_1197(GLuint range); -void APIENTRY shared_dispatch_stub_1198(GLuint dst, GLuint coord, GLenum swizzle); -void APIENTRY shared_dispatch_stub_1199(GLuint dst, GLuint interp, GLenum swizzle); -void APIENTRY shared_dispatch_stub_1200(GLuint dst, const GLfloat *value); -void APIENTRY shared_dispatch_stub_1201(GLenum face); -void APIENTRY shared_dispatch_stub_1202(GLuint array); -void APIENTRY shared_dispatch_stub_1203(GLsizei n, GLuint *arrays); -void APIENTRY shared_dispatch_stub_1204(GLuint id, GLsizei len, const GLubyte *name, GLdouble *params); -void APIENTRY shared_dispatch_stub_1205(GLuint id, GLsizei len, const GLubyte *name, GLfloat *params); -void APIENTRY shared_dispatch_stub_1206(GLuint id, GLsizei len, const GLubyte *name, GLdouble x, GLdouble y, GLdouble z, GLdouble w); -void APIENTRY shared_dispatch_stub_1207(GLuint id, GLsizei len, const GLubyte *name, const GLdouble *v); -void APIENTRY shared_dispatch_stub_1208(GLuint id, GLsizei len, const GLubyte *name, GLfloat x, GLfloat y, GLfloat z, GLfloat w); -void APIENTRY shared_dispatch_stub_1209(GLuint id, GLsizei len, const GLubyte *name, const GLfloat *v); -void APIENTRY shared_dispatch_stub_1210(void); -void APIENTRY shared_dispatch_stub_1211(GLenum coord, GLenum pname, GLfixed *params); -void APIENTRY shared_dispatch_stub_1212(GLenum coord, GLenum pname, GLint param); -void APIENTRY shared_dispatch_stub_1213(GLenum coord, GLenum pname, const GLfixed *params); -void APIENTRY shared_dispatch_stub_1214(GLclampd zmin, GLclampd zmax); -void APIENTRY shared_dispatch_stub_1215(GLenum target, GLuint framebuffer); -void APIENTRY shared_dispatch_stub_1216(GLenum target, GLuint renderbuffer); -void APIENTRY shared_dispatch_stub_1217(GLsizei len, const GLvoid *string); -void APIENTRY shared_dispatch_stub_1218(GLenum target, GLenum pname, GLint param); -void APIENTRY shared_dispatch_stub_1219(GLenum target, GLintptr offset, GLsizeiptr size); -void APIENTRY shared_dispatch_stub_1220(GLuint index, GLint x); -void APIENTRY shared_dispatch_stub_1221(GLuint index, GLuint x); -void APIENTRY shared_dispatch_stub_1222(GLuint index, GLint x, GLint y); -void APIENTRY shared_dispatch_stub_1223(GLuint index, const GLint *v); -void APIENTRY shared_dispatch_stub_1224(GLuint index, GLuint x, GLuint y); -void APIENTRY shared_dispatch_stub_1225(GLuint index, const GLuint *v); -void APIENTRY shared_dispatch_stub_1226(GLuint index, GLint x, GLint y, GLint z); -void APIENTRY shared_dispatch_stub_1227(GLuint index, const GLint *v); -void APIENTRY shared_dispatch_stub_1228(GLuint index, GLuint x, GLuint y, GLuint z); -void APIENTRY shared_dispatch_stub_1229(GLuint index, const GLuint *v); -void APIENTRY shared_dispatch_stub_1230(GLuint index, GLint x, GLint y, GLint z, GLint w); -void APIENTRY shared_dispatch_stub_1231(GLuint index, const GLint *v); -void APIENTRY shared_dispatch_stub_1232(GLuint index, GLuint x, GLuint y, GLuint z, GLuint w); -void APIENTRY shared_dispatch_stub_1233(GLuint index, const GLuint *v); -void APIENTRY shared_dispatch_stub_1234(GLint r, GLint g, GLint b, GLint a); -void APIENTRY shared_dispatch_stub_1235(GLuint r, GLuint g, GLuint b, GLuint a); -void APIENTRY shared_dispatch_stub_1236(GLenum target, GLuint index, GLuint buffer, GLintptr offset); -void APIENTRY shared_dispatch_stub_1237(GLuint monitor); -void APIENTRY shared_dispatch_stub_1238(GLsizei n, GLuint *monitors); -void APIENTRY shared_dispatch_stub_1239(GLuint monitor); -void APIENTRY shared_dispatch_stub_1240(GLsizei n, GLuint *monitors); -void APIENTRY shared_dispatch_stub_1241(GLuint monitor, GLenum pname, GLsizei dataSize, GLuint *data, GLint *bytesWritten); -void APIENTRY shared_dispatch_stub_1242(GLuint group, GLuint counter, GLenum pname, GLvoid *data); -void APIENTRY shared_dispatch_stub_1243(GLuint group, GLuint counter, GLsizei bufSize, GLsizei *length, GLchar *counterString); -void APIENTRY shared_dispatch_stub_1244(GLuint group, GLint *numCounters, GLint *maxActiveCounters, GLsizei countersSize, GLuint *counters); -void APIENTRY shared_dispatch_stub_1245(GLuint group, GLsizei bufSize, GLsizei *length, GLchar *groupString); -void APIENTRY shared_dispatch_stub_1246(GLint *numGroups, GLsizei groupsSize, GLuint *groups); -void APIENTRY shared_dispatch_stub_1247(GLuint monitor, GLboolean enable, GLuint group, GLint numCounters, GLuint *counterList); -void APIENTRY shared_dispatch_stub_1248(GLenum objectType, GLuint name, GLenum pname, GLint *value); -GLenum APIENTRY shared_dispatch_stub_1249(GLenum objectType, GLuint name, GLenum option); -GLenum APIENTRY shared_dispatch_stub_1250(GLenum objectType, GLuint name, GLenum option); -void APIENTRY shared_dispatch_stub_1251(GLuint program); -GLuint APIENTRY shared_dispatch_stub_1252(GLenum type, const GLchar *string); -void APIENTRY shared_dispatch_stub_1253(GLenum type, GLuint program); -void APIENTRY shared_dispatch_stub_1254(void); -void APIENTRY shared_dispatch_stub_1255(void); -void APIENTRY shared_dispatch_stub_1256(GLintptr surface, GLenum pname, GLsizei bufSize, GLsizei *length, GLint *values); -void APIENTRY shared_dispatch_stub_1257(const GLvoid *vdpDevice, const GLvoid *getProcAddress); -GLboolean APIENTRY shared_dispatch_stub_1258(GLintptr surface); -void APIENTRY shared_dispatch_stub_1259(GLsizei numSurfaces, const GLintptr *surfaces); -GLintptr APIENTRY shared_dispatch_stub_1260(const GLvoid *vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint *textureNames); -GLintptr APIENTRY shared_dispatch_stub_1261(const GLvoid *vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint *textureNames); -void APIENTRY shared_dispatch_stub_1262(GLintptr surface, GLenum access); -void APIENTRY shared_dispatch_stub_1263(GLsizei numSurfaces, const GLintptr *surfaces); -void APIENTRY shared_dispatch_stub_1264(GLintptr surface); -void APIENTRY shared_dispatch_stub_1265(GLuint queryHandle); -void APIENTRY shared_dispatch_stub_1266(GLuint queryId, GLuint *queryHandle); -void APIENTRY shared_dispatch_stub_1267(GLuint queryHandle); +void APIENTRY shared_dispatch_stub_1039(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer); +void APIENTRY shared_dispatch_stub_1040(GLenum target, GLsizei numAttachments, const GLenum *attachments); +void APIENTRY shared_dispatch_stub_1041(GLuint pipeline, GLuint program); +void APIENTRY shared_dispatch_stub_1042(GLuint pipeline); +GLuint APIENTRY shared_dispatch_stub_1043(GLenum type, GLsizei count, const GLchar * const *strings); +void APIENTRY shared_dispatch_stub_1044(GLsizei n, const GLuint *pipelines); +void APIENTRY shared_dispatch_stub_1045(GLsizei n, GLuint *pipelines); +void APIENTRY shared_dispatch_stub_1046(GLuint pipeline, GLsizei bufSize, GLsizei *length, GLchar *infoLog); +void APIENTRY shared_dispatch_stub_1047(GLuint pipeline, GLenum pname, GLint *params); +GLboolean APIENTRY shared_dispatch_stub_1048(GLuint pipeline); +void APIENTRY shared_dispatch_stub_1049(GLint first, GLsizei count); +void APIENTRY shared_dispatch_stub_1050(GLuint program, GLint location, GLdouble x); +void APIENTRY shared_dispatch_stub_1051(GLuint program, GLint location, GLsizei count, const GLdouble *value); +void APIENTRY shared_dispatch_stub_1052(GLuint program, GLint location, GLfloat x); +void APIENTRY shared_dispatch_stub_1053(GLuint program, GLint location, GLsizei count, const GLfloat *value); +void APIENTRY shared_dispatch_stub_1054(GLuint program, GLint location, GLint x); +void APIENTRY shared_dispatch_stub_1055(GLuint program, GLint location, GLsizei count, const GLint *value); +void APIENTRY shared_dispatch_stub_1056(GLuint program, GLint location, GLuint x); +void APIENTRY shared_dispatch_stub_1057(GLuint program, GLint location, GLsizei count, const GLuint *value); +void APIENTRY shared_dispatch_stub_1058(GLuint program, GLint location, GLdouble x, GLdouble y); +void APIENTRY shared_dispatch_stub_1059(GLuint program, GLint location, GLsizei count, const GLdouble *value); +void APIENTRY shared_dispatch_stub_1060(GLuint program, GLint location, GLfloat x, GLfloat y); +void APIENTRY shared_dispatch_stub_1061(GLuint program, GLint location, GLsizei count, const GLfloat *value); +void APIENTRY shared_dispatch_stub_1062(GLuint program, GLint location, GLint x, GLint y); +void APIENTRY shared_dispatch_stub_1063(GLuint program, GLint location, GLsizei count, const GLint *value); +void APIENTRY shared_dispatch_stub_1064(GLuint program, GLint location, GLuint x, GLuint y); +void APIENTRY shared_dispatch_stub_1065(GLuint program, GLint location, GLsizei count, const GLuint *value); +void APIENTRY shared_dispatch_stub_1066(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z); +void APIENTRY shared_dispatch_stub_1067(GLuint program, GLint location, GLsizei count, const GLdouble *value); +void APIENTRY shared_dispatch_stub_1068(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z); +void APIENTRY shared_dispatch_stub_1069(GLuint program, GLint location, GLsizei count, const GLfloat *value); +void APIENTRY shared_dispatch_stub_1070(GLuint program, GLint location, GLint x, GLint y, GLint z); +void APIENTRY shared_dispatch_stub_1071(GLuint program, GLint location, GLsizei count, const GLint *value); +void APIENTRY shared_dispatch_stub_1072(GLuint program, GLint location, GLuint x, GLuint y, GLuint z); +void APIENTRY shared_dispatch_stub_1073(GLuint program, GLint location, GLsizei count, const GLuint *value); +void APIENTRY shared_dispatch_stub_1074(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z, GLdouble w); +void APIENTRY shared_dispatch_stub_1075(GLuint program, GLint location, GLsizei count, const GLdouble *value); +void APIENTRY shared_dispatch_stub_1076(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z, GLfloat w); +void APIENTRY shared_dispatch_stub_1077(GLuint program, GLint location, GLsizei count, const GLfloat *value); +void APIENTRY shared_dispatch_stub_1078(GLuint program, GLint location, GLint x, GLint y, GLint z, GLint w); +void APIENTRY shared_dispatch_stub_1079(GLuint program, GLint location, GLsizei count, const GLint *value); +void APIENTRY shared_dispatch_stub_1080(GLuint program, GLint location, GLuint x, GLuint y, GLuint z, GLuint w); +void APIENTRY shared_dispatch_stub_1081(GLuint program, GLint location, GLsizei count, const GLuint *value); +void APIENTRY shared_dispatch_stub_1082(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY shared_dispatch_stub_1083(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +void APIENTRY shared_dispatch_stub_1084(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY shared_dispatch_stub_1085(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +void APIENTRY shared_dispatch_stub_1086(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY shared_dispatch_stub_1087(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +void APIENTRY shared_dispatch_stub_1088(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY shared_dispatch_stub_1089(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +void APIENTRY shared_dispatch_stub_1090(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY shared_dispatch_stub_1091(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +void APIENTRY shared_dispatch_stub_1092(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY shared_dispatch_stub_1093(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +void APIENTRY shared_dispatch_stub_1094(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY shared_dispatch_stub_1095(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +void APIENTRY shared_dispatch_stub_1096(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY shared_dispatch_stub_1097(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +void APIENTRY shared_dispatch_stub_1098(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value); +void APIENTRY shared_dispatch_stub_1099(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value); +void APIENTRY shared_dispatch_stub_1100(void); +void APIENTRY shared_dispatch_stub_1101(GLuint pipeline, GLbitfield stages, GLuint program); +void APIENTRY shared_dispatch_stub_1102(GLuint pipeline); +void APIENTRY shared_dispatch_stub_1103(GLDEBUGPROC callback, const GLvoid *userParam); +void APIENTRY shared_dispatch_stub_1104(GLenum source, GLenum type, GLenum severity, GLsizei count, const GLuint *ids, GLboolean enabled); +void APIENTRY shared_dispatch_stub_1105(GLenum source, GLenum type, GLuint id, GLenum severity, GLsizei length, const GLchar *buf); +GLuint APIENTRY shared_dispatch_stub_1106(GLuint count, GLsizei bufsize, GLenum *sources, GLenum *types, GLuint *ids, GLenum *severities, GLsizei *lengths, GLchar *messageLog); +void APIENTRY shared_dispatch_stub_1107(GLenum identifier, GLuint name, GLsizei bufSize, GLsizei *length, GLchar *label); +void APIENTRY shared_dispatch_stub_1108(const GLvoid *ptr, GLsizei bufSize, GLsizei *length, GLchar *label); +void APIENTRY shared_dispatch_stub_1109(GLenum identifier, GLuint name, GLsizei length, const GLchar *label); +void APIENTRY shared_dispatch_stub_1110(const GLvoid *ptr, GLsizei length, const GLchar *label); +void APIENTRY shared_dispatch_stub_1111(void); +void APIENTRY shared_dispatch_stub_1112(GLenum source, GLuint id, GLsizei length, const GLchar *message); +void APIENTRY shared_dispatch_stub_1113(GLfloat red, GLfloat green, GLfloat blue); +void APIENTRY shared_dispatch_stub_1114(const GLfloat *v); +void APIENTRY shared_dispatch_stub_1115(GLenum mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount); +void APIENTRY shared_dispatch_stub_1116(GLfloat coord); +void APIENTRY shared_dispatch_stub_1117(const GLfloat *coord); +void APIENTRY shared_dispatch_stub_1118(void); +void APIENTRY shared_dispatch_stub_1119(GLdouble x, GLdouble y, GLdouble z, GLdouble w); +void APIENTRY shared_dispatch_stub_1120(const GLdouble *v); +void APIENTRY shared_dispatch_stub_1121(GLfloat x, GLfloat y, GLfloat z, GLfloat w); +void APIENTRY shared_dispatch_stub_1122(const GLfloat *v); +void APIENTRY shared_dispatch_stub_1123(GLint x, GLint y, GLint z, GLint w); +void APIENTRY shared_dispatch_stub_1124(const GLint *v); +void APIENTRY shared_dispatch_stub_1125(GLshort x, GLshort y, GLshort z, GLshort w); +void APIENTRY shared_dispatch_stub_1126(const GLshort *v); +void APIENTRY shared_dispatch_stub_1127(const GLenum *mode, const GLint *first, const GLsizei *count, GLsizei primcount, GLint modestride); +void APIENTRY shared_dispatch_stub_1128(const GLenum *mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount, GLint modestride); +GLboolean APIENTRY shared_dispatch_stub_1129(GLsizei n, const GLuint *ids, GLboolean *residences); +void APIENTRY shared_dispatch_stub_1130(GLenum target, GLuint id, const GLfloat *params); +void APIENTRY shared_dispatch_stub_1131(GLenum target, GLuint index, GLenum pname, GLdouble *params); +void APIENTRY shared_dispatch_stub_1132(GLenum target, GLuint index, GLenum pname, GLfloat *params); +void APIENTRY shared_dispatch_stub_1133(GLuint id, GLenum pname, GLubyte *program); +void APIENTRY shared_dispatch_stub_1134(GLuint id, GLenum pname, GLint *params); +void APIENTRY shared_dispatch_stub_1135(GLenum target, GLuint address, GLenum pname, GLint *params); +void APIENTRY shared_dispatch_stub_1136(GLuint index, GLenum pname, GLdouble *params); +void APIENTRY shared_dispatch_stub_1137(GLuint index, GLenum pname, GLfloat *params); +void APIENTRY shared_dispatch_stub_1138(GLuint index, GLenum pname, GLint *params); +void APIENTRY shared_dispatch_stub_1139(GLenum target, GLuint id, GLsizei len, const GLubyte *program); +void APIENTRY shared_dispatch_stub_1140(GLenum target, GLuint index, GLsizei num, const GLdouble *params); +void APIENTRY shared_dispatch_stub_1141(GLenum target, GLuint index, GLsizei num, const GLfloat *params); +void APIENTRY shared_dispatch_stub_1142(GLsizei n, const GLuint *ids); +void APIENTRY shared_dispatch_stub_1143(GLenum target, GLuint address, GLenum matrix, GLenum transform); +void APIENTRY shared_dispatch_stub_1144(GLuint index, GLdouble x); +void APIENTRY shared_dispatch_stub_1145(GLuint index, const GLdouble *v); +void APIENTRY shared_dispatch_stub_1146(GLuint index, GLfloat x); +void APIENTRY shared_dispatch_stub_1147(GLuint index, const GLfloat *v); +void APIENTRY shared_dispatch_stub_1148(GLuint index, GLshort x); +void APIENTRY shared_dispatch_stub_1149(GLuint index, const GLshort *v); +void APIENTRY shared_dispatch_stub_1150(GLuint index, GLdouble x, GLdouble y); +void APIENTRY shared_dispatch_stub_1151(GLuint index, const GLdouble *v); +void APIENTRY shared_dispatch_stub_1152(GLuint index, GLfloat x, GLfloat y); +void APIENTRY shared_dispatch_stub_1153(GLuint index, const GLfloat *v); +void APIENTRY shared_dispatch_stub_1154(GLuint index, GLshort x, GLshort y); +void APIENTRY shared_dispatch_stub_1155(GLuint index, const GLshort *v); +void APIENTRY shared_dispatch_stub_1156(GLuint index, GLdouble x, GLdouble y, GLdouble z); +void APIENTRY shared_dispatch_stub_1157(GLuint index, const GLdouble *v); +void APIENTRY shared_dispatch_stub_1158(GLuint index, GLfloat x, GLfloat y, GLfloat z); +void APIENTRY shared_dispatch_stub_1159(GLuint index, const GLfloat *v); +void APIENTRY shared_dispatch_stub_1160(GLuint index, GLshort x, GLshort y, GLshort z); +void APIENTRY shared_dispatch_stub_1161(GLuint index, const GLshort *v); +void APIENTRY shared_dispatch_stub_1162(GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w); +void APIENTRY shared_dispatch_stub_1163(GLuint index, const GLdouble *v); +void APIENTRY shared_dispatch_stub_1164(GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w); +void APIENTRY shared_dispatch_stub_1165(GLuint index, const GLfloat *v); +void APIENTRY shared_dispatch_stub_1166(GLuint index, GLshort x, GLshort y, GLshort z, GLshort w); +void APIENTRY shared_dispatch_stub_1167(GLuint index, const GLshort *v); +void APIENTRY shared_dispatch_stub_1168(GLuint index, GLubyte x, GLubyte y, GLubyte z, GLubyte w); +void APIENTRY shared_dispatch_stub_1169(GLuint index, const GLubyte *v); +void APIENTRY shared_dispatch_stub_1170(GLuint index, GLint size, GLenum type, GLsizei stride, const GLvoid *pointer); +void APIENTRY shared_dispatch_stub_1171(GLuint index, GLsizei n, const GLdouble *v); +void APIENTRY shared_dispatch_stub_1172(GLuint index, GLsizei n, const GLfloat *v); +void APIENTRY shared_dispatch_stub_1173(GLuint index, GLsizei n, const GLshort *v); +void APIENTRY shared_dispatch_stub_1174(GLuint index, GLsizei n, const GLdouble *v); +void APIENTRY shared_dispatch_stub_1175(GLuint index, GLsizei n, const GLfloat *v); +void APIENTRY shared_dispatch_stub_1176(GLuint index, GLsizei n, const GLshort *v); +void APIENTRY shared_dispatch_stub_1177(GLuint index, GLsizei n, const GLdouble *v); +void APIENTRY shared_dispatch_stub_1178(GLuint index, GLsizei n, const GLfloat *v); +void APIENTRY shared_dispatch_stub_1179(GLuint index, GLsizei n, const GLshort *v); +void APIENTRY shared_dispatch_stub_1180(GLuint index, GLsizei n, const GLdouble *v); +void APIENTRY shared_dispatch_stub_1181(GLuint index, GLsizei n, const GLfloat *v); +void APIENTRY shared_dispatch_stub_1182(GLuint index, GLsizei n, const GLshort *v); +void APIENTRY shared_dispatch_stub_1183(GLuint index, GLsizei n, const GLubyte *v); +void APIENTRY shared_dispatch_stub_1184(GLenum pname, GLfloat *param); +void APIENTRY shared_dispatch_stub_1185(GLenum pname, GLint *param); +void APIENTRY shared_dispatch_stub_1186(GLenum pname, const GLfloat *param); +void APIENTRY shared_dispatch_stub_1187(GLenum pname, const GLint *param); +void APIENTRY shared_dispatch_stub_1188(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); +void APIENTRY shared_dispatch_stub_1189(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); +void APIENTRY shared_dispatch_stub_1190(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); +void APIENTRY shared_dispatch_stub_1191(void); +void APIENTRY shared_dispatch_stub_1192(GLuint id); +void APIENTRY shared_dispatch_stub_1193(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod); +void APIENTRY shared_dispatch_stub_1194(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod); +void APIENTRY shared_dispatch_stub_1195(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod); +void APIENTRY shared_dispatch_stub_1196(GLuint id); +void APIENTRY shared_dispatch_stub_1197(void); +GLuint APIENTRY shared_dispatch_stub_1198(GLuint range); +void APIENTRY shared_dispatch_stub_1199(GLuint dst, GLuint coord, GLenum swizzle); +void APIENTRY shared_dispatch_stub_1200(GLuint dst, GLuint interp, GLenum swizzle); +void APIENTRY shared_dispatch_stub_1201(GLuint dst, const GLfloat *value); +void APIENTRY shared_dispatch_stub_1202(GLuint first, GLsizei count, const GLfloat *v); +void APIENTRY shared_dispatch_stub_1203(GLuint index, GLfloat n, GLfloat f); +void APIENTRY shared_dispatch_stub_1204(GLenum face); +void APIENTRY shared_dispatch_stub_1205(GLuint array); +void APIENTRY shared_dispatch_stub_1206(GLsizei n, GLuint *arrays); +void APIENTRY shared_dispatch_stub_1207(GLuint id, GLsizei len, const GLubyte *name, GLdouble *params); +void APIENTRY shared_dispatch_stub_1208(GLuint id, GLsizei len, const GLubyte *name, GLfloat *params); +void APIENTRY shared_dispatch_stub_1209(GLuint id, GLsizei len, const GLubyte *name, GLdouble x, GLdouble y, GLdouble z, GLdouble w); +void APIENTRY shared_dispatch_stub_1210(GLuint id, GLsizei len, const GLubyte *name, const GLdouble *v); +void APIENTRY shared_dispatch_stub_1211(GLuint id, GLsizei len, const GLubyte *name, GLfloat x, GLfloat y, GLfloat z, GLfloat w); +void APIENTRY shared_dispatch_stub_1212(GLuint id, GLsizei len, const GLubyte *name, const GLfloat *v); +void APIENTRY shared_dispatch_stub_1213(void); +void APIENTRY shared_dispatch_stub_1214(GLenum coord, GLenum pname, GLfixed *params); +void APIENTRY shared_dispatch_stub_1215(GLenum coord, GLenum pname, GLint param); +void APIENTRY shared_dispatch_stub_1216(GLenum coord, GLenum pname, const GLfixed *params); +void APIENTRY shared_dispatch_stub_1217(GLclampd zmin, GLclampd zmax); +void APIENTRY shared_dispatch_stub_1218(GLenum target, GLuint framebuffer); +void APIENTRY shared_dispatch_stub_1219(GLenum target, GLuint renderbuffer); +void APIENTRY shared_dispatch_stub_1220(GLsizei len, const GLvoid *string); +void APIENTRY shared_dispatch_stub_1221(GLenum target, GLenum pname, GLint param); +void APIENTRY shared_dispatch_stub_1222(GLenum target, GLintptr offset, GLsizeiptr size); +void APIENTRY shared_dispatch_stub_1223(GLuint index, GLint x); +void APIENTRY shared_dispatch_stub_1224(GLuint index, GLuint x); +void APIENTRY shared_dispatch_stub_1225(GLuint index, GLint x, GLint y); +void APIENTRY shared_dispatch_stub_1226(GLuint index, const GLint *v); +void APIENTRY shared_dispatch_stub_1227(GLuint index, GLuint x, GLuint y); +void APIENTRY shared_dispatch_stub_1228(GLuint index, const GLuint *v); +void APIENTRY shared_dispatch_stub_1229(GLuint index, GLint x, GLint y, GLint z); +void APIENTRY shared_dispatch_stub_1230(GLuint index, const GLint *v); +void APIENTRY shared_dispatch_stub_1231(GLuint index, GLuint x, GLuint y, GLuint z); +void APIENTRY shared_dispatch_stub_1232(GLuint index, const GLuint *v); +void APIENTRY shared_dispatch_stub_1233(GLuint index, GLint x, GLint y, GLint z, GLint w); +void APIENTRY shared_dispatch_stub_1234(GLuint index, const GLint *v); +void APIENTRY shared_dispatch_stub_1235(GLuint index, GLuint x, GLuint y, GLuint z, GLuint w); +void APIENTRY shared_dispatch_stub_1236(GLuint index, const GLuint *v); +void APIENTRY shared_dispatch_stub_1237(GLint r, GLint g, GLint b, GLint a); +void APIENTRY shared_dispatch_stub_1238(GLuint r, GLuint g, GLuint b, GLuint a); +void APIENTRY shared_dispatch_stub_1239(GLenum target, GLuint index, GLuint buffer, GLintptr offset); +void APIENTRY shared_dispatch_stub_1240(GLuint monitor); +void APIENTRY shared_dispatch_stub_1241(GLsizei n, GLuint *monitors); +void APIENTRY shared_dispatch_stub_1242(GLuint monitor); +void APIENTRY shared_dispatch_stub_1243(GLsizei n, GLuint *monitors); +void APIENTRY shared_dispatch_stub_1244(GLuint monitor, GLenum pname, GLsizei dataSize, GLuint *data, GLint *bytesWritten); +void APIENTRY shared_dispatch_stub_1245(GLuint group, GLuint counter, GLenum pname, GLvoid *data); +void APIENTRY shared_dispatch_stub_1246(GLuint group, GLuint counter, GLsizei bufSize, GLsizei *length, GLchar *counterString); +void APIENTRY shared_dispatch_stub_1247(GLuint group, GLint *numCounters, GLint *maxActiveCounters, GLsizei countersSize, GLuint *counters); +void APIENTRY shared_dispatch_stub_1248(GLuint group, GLsizei bufSize, GLsizei *length, GLchar *groupString); +void APIENTRY shared_dispatch_stub_1249(GLint *numGroups, GLsizei groupsSize, GLuint *groups); +void APIENTRY shared_dispatch_stub_1250(GLuint monitor, GLboolean enable, GLuint group, GLint numCounters, GLuint *counterList); +void APIENTRY shared_dispatch_stub_1251(GLenum objectType, GLuint name, GLenum pname, GLint *value); +GLenum APIENTRY shared_dispatch_stub_1252(GLenum objectType, GLuint name, GLenum option); +GLenum APIENTRY shared_dispatch_stub_1253(GLenum objectType, GLuint name, GLenum option); +void APIENTRY shared_dispatch_stub_1254(GLuint program); +GLuint APIENTRY shared_dispatch_stub_1255(GLenum type, const GLchar *string); +void APIENTRY shared_dispatch_stub_1256(GLenum type, GLuint program); +void APIENTRY shared_dispatch_stub_1257(void); +void APIENTRY shared_dispatch_stub_1258(void); +void APIENTRY shared_dispatch_stub_1259(GLintptr surface, GLenum pname, GLsizei bufSize, GLsizei *length, GLint *values); +void APIENTRY shared_dispatch_stub_1260(const GLvoid *vdpDevice, const GLvoid *getProcAddress); +GLboolean APIENTRY shared_dispatch_stub_1261(GLintptr surface); +void APIENTRY shared_dispatch_stub_1262(GLsizei numSurfaces, const GLintptr *surfaces); +GLintptr APIENTRY shared_dispatch_stub_1263(const GLvoid *vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint *textureNames); +GLintptr APIENTRY shared_dispatch_stub_1264(const GLvoid *vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint *textureNames); +void APIENTRY shared_dispatch_stub_1265(GLintptr surface, GLenum access); +void APIENTRY shared_dispatch_stub_1266(GLsizei numSurfaces, const GLintptr *surfaces); +void APIENTRY shared_dispatch_stub_1267(GLintptr surface); void APIENTRY shared_dispatch_stub_1268(GLuint queryHandle); -void APIENTRY shared_dispatch_stub_1269(GLuint *queryId); -void APIENTRY shared_dispatch_stub_1270(GLuint queryId, GLuint *nextQueryId); -void APIENTRY shared_dispatch_stub_1271(GLuint queryId, GLuint counterId, GLuint counterNameLength, GLchar *counterName, GLuint counterDescLength, GLchar *counterDesc, GLuint *counterOffset, GLuint *counterDataSize, GLuint *counterTypeEnum, GLuint *counterDataTypeEnum, GLuint64 *rawCounterMaxValue); -void APIENTRY shared_dispatch_stub_1272(GLuint queryHandle, GLuint flags, GLsizei dataSize, GLvoid *data, GLuint *bytesWritten); -void APIENTRY shared_dispatch_stub_1273(GLchar *queryName, GLuint *queryId); -void APIENTRY shared_dispatch_stub_1274(GLuint queryId, GLuint queryNameLength, GLchar *queryName, GLuint *dataSize, GLuint *noCounters, GLuint *noInstances, GLuint *capsMask); -void APIENTRY shared_dispatch_stub_1275(GLfloat factor, GLfloat units, GLfloat clamp); -void APIENTRY shared_dispatch_stub_1276(GLenum frontfunc, GLenum backfunc, GLint ref, GLuint mask); -void APIENTRY shared_dispatch_stub_1277(GLenum target, GLuint index, GLsizei count, const GLfloat *params); -void APIENTRY shared_dispatch_stub_1278(GLenum target, GLuint index, GLsizei count, const GLfloat *params); -void APIENTRY shared_dispatch_stub_1279(GLenum target, GLvoid *writeOffset); -void APIENTRY shared_dispatch_stub_1280(GLenum target, GLvoid *writeOffset); -void APIENTRY shared_dispatch_stub_1281(GLenum func, GLclampx ref); -void APIENTRY shared_dispatch_stub_1282(GLclampx red, GLclampx green, GLclampx blue, GLclampx alpha); -void APIENTRY shared_dispatch_stub_1283(GLclampx depth); -void APIENTRY shared_dispatch_stub_1284(GLfixed red, GLfixed green, GLfixed blue, GLfixed alpha); -void APIENTRY shared_dispatch_stub_1285(GLclampx zNear, GLclampx zFar); -void APIENTRY shared_dispatch_stub_1286(GLenum pname, GLfixed param); -void APIENTRY shared_dispatch_stub_1287(GLenum pname, const GLfixed *params); -void APIENTRY shared_dispatch_stub_1288(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar); -void APIENTRY shared_dispatch_stub_1289(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar); +void APIENTRY shared_dispatch_stub_1269(GLuint queryId, GLuint *queryHandle); +void APIENTRY shared_dispatch_stub_1270(GLuint queryHandle); +void APIENTRY shared_dispatch_stub_1271(GLuint queryHandle); +void APIENTRY shared_dispatch_stub_1272(GLuint *queryId); +void APIENTRY shared_dispatch_stub_1273(GLuint queryId, GLuint *nextQueryId); +void APIENTRY shared_dispatch_stub_1274(GLuint queryId, GLuint counterId, GLuint counterNameLength, GLchar *counterName, GLuint counterDescLength, GLchar *counterDesc, GLuint *counterOffset, GLuint *counterDataSize, GLuint *counterTypeEnum, GLuint *counterDataTypeEnum, GLuint64 *rawCounterMaxValue); +void APIENTRY shared_dispatch_stub_1275(GLuint queryHandle, GLuint flags, GLsizei dataSize, GLvoid *data, GLuint *bytesWritten); +void APIENTRY shared_dispatch_stub_1276(GLchar *queryName, GLuint *queryId); +void APIENTRY shared_dispatch_stub_1277(GLuint queryId, GLuint queryNameLength, GLchar *queryName, GLuint *dataSize, GLuint *noCounters, GLuint *noInstances, GLuint *capsMask); +void APIENTRY shared_dispatch_stub_1278(GLfloat factor, GLfloat units, GLfloat clamp); +void APIENTRY shared_dispatch_stub_1279(GLenum mode, GLsizei count, const GLint *box); +void APIENTRY shared_dispatch_stub_1280(GLenum frontfunc, GLenum backfunc, GLint ref, GLuint mask); +void APIENTRY shared_dispatch_stub_1281(GLenum target, GLuint index, GLsizei count, const GLfloat *params); +void APIENTRY shared_dispatch_stub_1282(GLenum target, GLuint index, GLsizei count, const GLfloat *params); +void APIENTRY shared_dispatch_stub_1283(GLenum target, GLvoid *writeOffset); +void APIENTRY shared_dispatch_stub_1284(GLenum target, GLvoid *writeOffset); +void APIENTRY shared_dispatch_stub_1285(GLenum func, GLclampx ref); +void APIENTRY shared_dispatch_stub_1286(GLclampx red, GLclampx green, GLclampx blue, GLclampx alpha); +void APIENTRY shared_dispatch_stub_1287(GLclampx depth); +void APIENTRY shared_dispatch_stub_1288(GLfixed red, GLfixed green, GLfixed blue, GLfixed alpha); +void APIENTRY shared_dispatch_stub_1289(GLclampx zNear, GLclampx zFar); void APIENTRY shared_dispatch_stub_1290(GLenum pname, GLfixed param); void APIENTRY shared_dispatch_stub_1291(GLenum pname, const GLfixed *params); -void APIENTRY shared_dispatch_stub_1292(GLenum light, GLenum pname, GLfixed param); -void APIENTRY shared_dispatch_stub_1293(GLenum light, GLenum pname, const GLfixed *params); -void APIENTRY shared_dispatch_stub_1294(GLfixed width); -void APIENTRY shared_dispatch_stub_1295(const GLfixed *m); -void APIENTRY shared_dispatch_stub_1296(GLenum face, GLenum pname, GLfixed param); -void APIENTRY shared_dispatch_stub_1297(GLenum face, GLenum pname, const GLfixed *params); -void APIENTRY shared_dispatch_stub_1298(const GLfixed *m); -void APIENTRY shared_dispatch_stub_1299(GLenum target, GLfixed s, GLfixed t, GLfixed r, GLfixed q); -void APIENTRY shared_dispatch_stub_1300(GLfixed nx, GLfixed ny, GLfixed nz); -void APIENTRY shared_dispatch_stub_1301(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar); -void APIENTRY shared_dispatch_stub_1302(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar); -void APIENTRY shared_dispatch_stub_1303(GLfixed size); -void APIENTRY shared_dispatch_stub_1304(GLfixed factor, GLfixed units); -void APIENTRY shared_dispatch_stub_1305(GLfixed angle, GLfixed x, GLfixed y, GLfixed z); -void APIENTRY shared_dispatch_stub_1306(GLclampx value, GLboolean invert); -void APIENTRY shared_dispatch_stub_1307(GLfixed x, GLfixed y, GLfixed z); -void APIENTRY shared_dispatch_stub_1308(GLenum target, GLenum pname, GLfixed param); -void APIENTRY shared_dispatch_stub_1309(GLenum target, GLenum pname, const GLfixed *params); -void APIENTRY shared_dispatch_stub_1310(GLenum target, GLenum pname, GLfixed param); +void APIENTRY shared_dispatch_stub_1292(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar); +void APIENTRY shared_dispatch_stub_1293(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar); +void APIENTRY shared_dispatch_stub_1294(GLenum pname, GLfixed param); +void APIENTRY shared_dispatch_stub_1295(GLenum pname, const GLfixed *params); +void APIENTRY shared_dispatch_stub_1296(GLenum light, GLenum pname, GLfixed param); +void APIENTRY shared_dispatch_stub_1297(GLenum light, GLenum pname, const GLfixed *params); +void APIENTRY shared_dispatch_stub_1298(GLfixed width); +void APIENTRY shared_dispatch_stub_1299(const GLfixed *m); +void APIENTRY shared_dispatch_stub_1300(GLenum face, GLenum pname, GLfixed param); +void APIENTRY shared_dispatch_stub_1301(GLenum face, GLenum pname, const GLfixed *params); +void APIENTRY shared_dispatch_stub_1302(const GLfixed *m); +void APIENTRY shared_dispatch_stub_1303(GLenum target, GLfixed s, GLfixed t, GLfixed r, GLfixed q); +void APIENTRY shared_dispatch_stub_1304(GLfixed nx, GLfixed ny, GLfixed nz); +void APIENTRY shared_dispatch_stub_1305(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar); +void APIENTRY shared_dispatch_stub_1306(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar); +void APIENTRY shared_dispatch_stub_1307(GLfixed size); +void APIENTRY shared_dispatch_stub_1308(GLfixed factor, GLfixed units); +void APIENTRY shared_dispatch_stub_1309(GLfixed angle, GLfixed x, GLfixed y, GLfixed z); +void APIENTRY shared_dispatch_stub_1310(GLclampx value, GLboolean invert); void APIENTRY shared_dispatch_stub_1311(GLfixed x, GLfixed y, GLfixed z); -void APIENTRY shared_dispatch_stub_1312(GLenum plane, const GLfloat *equation); -void APIENTRY shared_dispatch_stub_1313(GLenum plane, const GLfixed *equation); -void APIENTRY shared_dispatch_stub_1314(GLenum plane, GLfloat *equation); -void APIENTRY shared_dispatch_stub_1315(GLenum plane, GLfixed *equation); -void APIENTRY shared_dispatch_stub_1316(GLenum pname, GLfixed *params); -void APIENTRY shared_dispatch_stub_1317(GLenum light, GLenum pname, GLfixed *params); -void APIENTRY shared_dispatch_stub_1318(GLenum face, GLenum pname, GLfixed *params); -void APIENTRY shared_dispatch_stub_1319(GLenum target, GLenum pname, GLfixed *params); -void APIENTRY shared_dispatch_stub_1320(GLenum target, GLenum pname, GLfixed *params); -void APIENTRY shared_dispatch_stub_1321(GLenum pname, GLfixed param); -void APIENTRY shared_dispatch_stub_1322(GLenum pname, const GLfixed *params); -void APIENTRY shared_dispatch_stub_1323(GLenum target, GLenum pname, const GLfixed *params); +void APIENTRY shared_dispatch_stub_1312(GLenum target, GLenum pname, GLfixed param); +void APIENTRY shared_dispatch_stub_1313(GLenum target, GLenum pname, const GLfixed *params); +void APIENTRY shared_dispatch_stub_1314(GLenum target, GLenum pname, GLfixed param); +void APIENTRY shared_dispatch_stub_1315(GLfixed x, GLfixed y, GLfixed z); +void APIENTRY shared_dispatch_stub_1316(GLenum plane, const GLfloat *equation); +void APIENTRY shared_dispatch_stub_1317(GLenum plane, const GLfixed *equation); +void APIENTRY shared_dispatch_stub_1318(GLenum plane, GLfloat *equation); +void APIENTRY shared_dispatch_stub_1319(GLenum plane, GLfixed *equation); +void APIENTRY shared_dispatch_stub_1320(GLenum pname, GLfixed *params); +void APIENTRY shared_dispatch_stub_1321(GLenum light, GLenum pname, GLfixed *params); +void APIENTRY shared_dispatch_stub_1322(GLenum face, GLenum pname, GLfixed *params); +void APIENTRY shared_dispatch_stub_1323(GLenum target, GLenum pname, GLfixed *params); +void APIENTRY shared_dispatch_stub_1324(GLenum target, GLenum pname, GLfixed *params); +void APIENTRY shared_dispatch_stub_1325(GLenum pname, GLfixed param); +void APIENTRY shared_dispatch_stub_1326(GLenum pname, const GLfixed *params); +void APIENTRY shared_dispatch_stub_1327(GLenum target, GLenum pname, const GLfixed *params); +void APIENTRY shared_dispatch_stub_1328(void); +void APIENTRY shared_dispatch_stub_1329(GLfloat minX, GLfloat minY, GLfloat minZ, GLfloat minW, GLfloat maxX, GLfloat maxY, GLfloat maxZ, GLfloat maxW); #undef MAPI_TMP_DEFINES #endif /* MAPI_TMP_DEFINES */ #ifdef MAPI_TMP_TABLE -#define MAPI_TABLE_NUM_STATIC 1324 +#define MAPI_TABLE_NUM_STATIC 1330 #define MAPI_TABLE_NUM_DYNAMIC 256 #undef MAPI_TMP_TABLE #endif /* MAPI_TMP_TABLE */ @@ -6841,6 +6847,12 @@ noop_warn("glBindVertexBuffers"); } +static void APIENTRY noopDispatchComputeGroupSizeARB(GLuint num_groups_x, GLuint num_groups_y, GLuint num_groups_z, GLuint group_size_x, GLuint group_size_y, GLuint group_size_z) +{ + (void) num_groups_x; (void) num_groups_y; (void) num_groups_z; (void) group_size_x; (void) group_size_y; (void) group_size_z; + noop_warn("glDispatchComputeGroupSizeARB"); +} + static void APIENTRY noopMultiDrawArraysIndirectCountARB(GLenum mode, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride) { (void) mode; (void) indirect; (void) drawcount; (void) maxdrawcount; (void) stride; @@ -8580,6 +8592,18 @@ noop_warn("glSetFragmentShaderConstantATI"); } +static void APIENTRY noopDepthRangeArrayfvOES(GLuint first, GLsizei count, const GLfloat *v) +{ + (void) first; (void) count; (void) v; + noop_warn("glDepthRangeArrayfvOES"); +} + +static void APIENTRY noopDepthRangeIndexedfOES(GLuint index, GLfloat n, GLfloat f) +{ + (void) index; (void) n; (void) f; + noop_warn("glDepthRangeIndexedfOES"); +} + static void APIENTRY noopActiveStencilFaceEXT(GLenum face) { (void) face; @@ -9033,6 +9057,12 @@ noop_warn("glPolygonOffsetClampEXT"); } +static void APIENTRY noopWindowRectanglesEXT(GLenum mode, GLsizei count, const GLint *box) +{ + (void) mode; (void) count; (void) box; + noop_warn("glWindowRectanglesEXT"); +} + static void APIENTRY noopStencilFuncSeparateATI(GLenum frontfunc, GLenum backfunc, GLint ref, GLuint mask) { (void) frontfunc; (void) backfunc; (void) ref; (void) mask; @@ -9321,6 +9351,17 @@ noop_warn("glTexParameterxv"); } +static void APIENTRY noopBlendBarrier(void) +{ + noop_warn("glBlendBarrier"); +} + +static void APIENTRY noopPrimitiveBoundingBox(GLfloat minX, GLfloat minY, GLfloat minZ, GLfloat minW, GLfloat maxX, GLfloat maxY, GLfloat maxZ, GLfloat maxW) +{ + (void) minX; (void) minY; (void) minZ; (void) minW; (void) maxX; (void) maxY; (void) maxZ; (void) maxW; + noop_warn("glPrimitiveBoundingBox"); +} + const mapi_func table_noop_array[] = { (mapi_func) noopNewList, (mapi_func) noopEndList, @@ -10234,6 +10275,7 @@ (mapi_func) noopBindSamplers, (mapi_func) noopBindTextures, (mapi_func) noopBindVertexBuffers, + (mapi_func) noopDispatchComputeGroupSizeARB, (mapi_func) noopMultiDrawArraysIndirectCountARB, (mapi_func) noopMultiDrawElementsIndirectCountARB, (mapi_func) noopClipControl, @@ -10523,6 +10565,8 @@ (mapi_func) noopPassTexCoordATI, (mapi_func) noopSampleMapATI, (mapi_func) noopSetFragmentShaderConstantATI, + (mapi_func) noopDepthRangeArrayfvOES, + (mapi_func) noopDepthRangeIndexedfOES, (mapi_func) noopActiveStencilFaceEXT, (mapi_func) noopBindVertexArrayAPPLE, (mapi_func) noopGenVertexArraysAPPLE, @@ -10598,6 +10642,7 @@ (mapi_func) noopGetPerfQueryIdByNameINTEL, (mapi_func) noopGetPerfQueryInfoINTEL, (mapi_func) noopPolygonOffsetClampEXT, + (mapi_func) noopWindowRectanglesEXT, (mapi_func) noopStencilFuncSeparateATI, (mapi_func) noopProgramEnvParameters4fvEXT, (mapi_func) noopProgramLocalParameters4fvEXT, @@ -10646,6 +10691,8 @@ (mapi_func) noopPointParameterx, (mapi_func) noopPointParameterxv, (mapi_func) noopTexParameterxv, + (mapi_func) noopBlendBarrier, + (mapi_func) noopPrimitiveBoundingBox, (mapi_func) noop_generic, (mapi_func) noop_generic, (mapi_func) noop_generic, @@ -12486,6 +12533,12 @@ (mapi_func) noop_generic, (mapi_func) noop_generic, (mapi_func) noop_generic, + (mapi_func) noop_generic, + (mapi_func) noop_generic, + (mapi_func) noop_generic, + (mapi_func) noop_generic, + (mapi_func) noop_generic, + (mapi_func) noop_generic, (mapi_func) noop_generic }; @@ -12567,6 +12620,8 @@ "BindVertexBuffer\0" "BindVertexBuffers\0" "Bitmap\0" + "BlendBarrier\0" + "BlendBarrierKHR\0" "BlendColor\0" "BlendColorEXT\0" "BlendEquation\0" @@ -12833,8 +12888,10 @@ "DepthFunc\0" "DepthMask\0" "DepthRange\0" + "DepthRangeArrayfvOES\0" "DepthRangeArrayv\0" "DepthRangeIndexed\0" + "DepthRangeIndexedfOES\0" "DepthRangef\0" "DepthRangefOES\0" "DepthRangex\0" @@ -12852,6 +12909,7 @@ "DisableiOES\0" "DiscardFramebufferEXT\0" "DispatchCompute\0" + "DispatchComputeGroupSizeARB\0" "DispatchComputeIndirect\0" "DrawArrays\0" "DrawArraysEXT\0" @@ -12979,6 +13037,7 @@ "FramebufferTexture3D\0" "FramebufferTexture3DEXT\0" "FramebufferTexture3DOES\0" + "FramebufferTextureEXT\0" "FramebufferTextureLayer\0" "FramebufferTextureLayerEXT\0" "FramebufferTextureOES\0" @@ -13077,6 +13136,7 @@ "GetFixedv\0" "GetFixedvOES\0" "GetFloati_v\0" + "GetFloati_vOES\0" "GetFloatv\0" "GetFragDataIndex\0" "GetFragDataIndexEXT\0" @@ -13577,6 +13637,8 @@ "PassThrough\0" "PatchParameterfv\0" "PatchParameteri\0" + "PatchParameteriEXT\0" + "PatchParameteriOES\0" "PauseTransformFeedback\0" "PixelMapfv\0" "PixelMapuiv\0" @@ -13619,6 +13681,10 @@ "PopDebugGroupKHR\0" "PopMatrix\0" "PopName\0" + "PrimitiveBoundingBox\0" + "PrimitiveBoundingBoxARB\0" + "PrimitiveBoundingBoxEXT\0" + "PrimitiveBoundingBoxOES\0" "PrimitiveRestartIndex\0" "PrimitiveRestartIndexNV\0" "PrimitiveRestartNV\0" @@ -13824,8 +13890,11 @@ "ScalexOES\0" "Scissor\0" "ScissorArrayv\0" + "ScissorArrayvOES\0" "ScissorIndexed\0" + "ScissorIndexedOES\0" "ScissorIndexedv\0" + "ScissorIndexedvOES\0" "SecondaryColor3b\0" "SecondaryColor3bEXT\0" "SecondaryColor3bv\0" @@ -14342,8 +14411,11 @@ "VertexPointerEXT\0" "Viewport\0" "ViewportArrayv\0" + "ViewportArrayvOES\0" "ViewportIndexedf\0" + "ViewportIndexedfOES\0" "ViewportIndexedfv\0" + "ViewportIndexedfvOES\0" "WaitSync\0" "WindowPos2d\0" "WindowPos2dARB\0" @@ -14400,23 +14472,24 @@ "WindowPos4iMESA\0" "WindowPos4ivMESA\0" "WindowPos4sMESA\0" - "WindowPos4svMESA"; + "WindowPos4svMESA\0" + "WindowRectanglesEXT"; static const struct mapi_stub public_stubs[] = { { (void *) 0, 213, NULL }, - { (void *) 6, 1251, NULL }, - { (void *) 23, 1040, NULL }, - { (void *) 43, 1040, NULL }, - { (void *) 66, 1201, NULL }, + { (void *) 6, 1254, NULL }, + { (void *) 23, 1041, NULL }, + { (void *) 43, 1041, NULL }, + { (void *) 66, 1204, NULL }, { (void *) 87, 374, NULL }, { (void *) 101, 374, NULL }, - { (void *) 118, 1187, NULL }, - { (void *) 138, 1188, NULL }, - { (void *) 158, 1189, NULL }, + { (void *) 118, 1188, NULL }, + { (void *) 138, 1189, NULL }, + { (void *) 158, 1190, NULL }, { (void *) 178, 240, NULL }, - { (void *) 188, 1281, NULL }, - { (void *) 199, 1281, NULL }, - { (void *) 213, 1128, NULL }, + { (void *) 188, 1285, NULL }, + { (void *) 199, 1285, NULL }, + { (void *) 213, 1129, NULL }, { (void *) 235, 322, NULL }, { (void *) 255, 322, NULL }, { (void *) 278, 306, NULL }, @@ -14426,9 +14499,9 @@ { (void *) 336, 7, NULL }, { (void *) 342, 570, NULL }, { (void *) 365, 570, NULL }, - { (void *) 390, 1190, NULL }, - { (void *) 413, 1237, NULL }, - { (void *) 433, 1265, NULL }, + { (void *) 390, 1191, NULL }, + { (void *) 413, 1240, NULL }, + { (void *) 433, 1268, NULL }, { (void *) 453, 460, NULL }, { (void *) 464, 460, NULL }, { (void *) 478, 809, NULL }, @@ -14440,7 +14513,7 @@ { (void *) 597, 461, NULL }, { (void *) 611, 572, NULL }, { (void *) 626, 572, NULL }, - { (void *) 644, 1236, NULL }, + { (void *) 644, 1239, NULL }, { (void *) 664, 573, NULL }, { (void *) 680, 573, NULL }, { (void *) 699, 906, NULL }, @@ -14449,1866 +14522,1886 @@ { (void *) 753, 574, NULL }, { (void *) 777, 715, NULL }, { (void *) 805, 715, NULL }, - { (void *) 836, 1191, NULL }, + { (void *) 836, 1192, NULL }, { (void *) 858, 661, NULL }, - { (void *) 874, 1215, NULL }, + { (void *) 874, 1218, NULL }, { (void *) 893, 661, NULL }, { (void *) 912, 868, NULL }, { (void *) 929, 908, NULL }, { (void *) 947, 622, NULL }, { (void *) 962, 622, NULL }, - { (void *) 976, 1041, NULL }, - { (void *) 996, 1041, NULL }, + { (void *) 976, 1042, NULL }, + { (void *) 996, 1042, NULL }, { (void *) 1019, 662, NULL }, - { (void *) 1036, 1216, NULL }, + { (void *) 1036, 1219, NULL }, { (void *) 1056, 662, NULL }, { (void *) 1076, 717, NULL }, { (void *) 1088, 909, NULL }, { (void *) 1101, 307, NULL }, { (void *) 1113, 307, NULL }, - { (void *) 1128, 915, NULL }, + { (void *) 1128, 916, NULL }, { (void *) 1144, 910, NULL }, { (void *) 1157, 802, NULL }, { (void *) 1179, 683, NULL }, - { (void *) 1195, 1202, NULL }, + { (void *) 1195, 1205, NULL }, { (void *) 1216, 683, NULL }, { (void *) 1235, 882, NULL }, { (void *) 1252, 911, NULL }, { (void *) 1270, 8, NULL }, - { (void *) 1277, 336, NULL }, - { (void *) 1288, 336, NULL }, - { (void *) 1302, 337, NULL }, - { (void *) 1316, 337, NULL }, - { (void *) 1333, 712, NULL }, - { (void *) 1357, 337, NULL }, - { (void *) 1374, 481, NULL }, - { (void *) 1396, 481, NULL }, - { (void *) 1421, 481, NULL }, - { (void *) 1446, 711, NULL }, - { (void *) 1478, 481, NULL }, - { (void *) 1503, 711, NULL }, - { (void *) 1526, 711, NULL }, - { (void *) 1552, 711, NULL }, - { (void *) 1578, 711, NULL }, - { (void *) 1604, 712, NULL }, - { (void *) 1619, 712, NULL }, - { (void *) 1637, 712, NULL }, - { (void *) 1655, 712, NULL }, - { (void *) 1673, 241, NULL }, - { (void *) 1683, 714, NULL }, - { (void *) 1703, 420, NULL }, - { (void *) 1721, 420, NULL }, - { (void *) 1742, 420, NULL }, - { (void *) 1764, 713, NULL }, - { (void *) 1792, 420, NULL }, - { (void *) 1813, 713, NULL }, - { (void *) 1832, 713, NULL }, - { (void *) 1854, 713, NULL }, - { (void *) 1876, 713, NULL }, - { (void *) 1898, 714, NULL }, - { (void *) 1909, 714, NULL }, - { (void *) 1923, 714, NULL }, - { (void *) 1937, 714, NULL }, - { (void *) 1951, 663, NULL }, - { (void *) 1967, 663, NULL }, - { (void *) 1986, 916, NULL }, - { (void *) 2007, 462, NULL }, - { (void *) 2018, 462, NULL }, - { (void *) 2032, 1218, NULL }, - { (void *) 2054, 903, NULL }, - { (void *) 2068, 903, NULL }, - { (void *) 2085, 463, NULL }, - { (void *) 2099, 463, NULL }, - { (void *) 2116, 2, NULL }, - { (void *) 2125, 3, NULL }, - { (void *) 2135, 664, NULL }, - { (void *) 2158, 664, NULL }, - { (void *) 2184, 664, NULL }, - { (void *) 2210, 917, NULL }, - { (void *) 2238, 575, NULL }, - { (void *) 2249, 575, NULL }, - { (void *) 2263, 203, NULL }, - { (void *) 2269, 204, NULL }, - { (void *) 2280, 876, NULL }, - { (void *) 2296, 877, NULL }, - { (void *) 2315, 576, NULL }, - { (void *) 2329, 577, NULL }, - { (void *) 2343, 578, NULL }, - { (void *) 2357, 579, NULL }, - { (void *) 2372, 206, NULL }, - { (void *) 2383, 1234, NULL }, - { (void *) 2399, 1235, NULL }, - { (void *) 2416, 1282, NULL }, - { (void *) 2428, 1282, NULL }, - { (void *) 2443, 208, NULL }, - { (void *) 2454, 813, NULL }, - { (void *) 2466, 813, NULL }, - { (void *) 2481, 1283, NULL }, - { (void *) 2493, 1283, NULL }, - { (void *) 2508, 205, NULL }, - { (void *) 2519, 918, NULL }, - { (void *) 2540, 919, NULL }, - { (void *) 2564, 920, NULL }, - { (void *) 2588, 921, NULL }, - { (void *) 2612, 922, NULL }, - { (void *) 2636, 923, NULL }, - { (void *) 2661, 207, NULL }, - { (void *) 2674, 904, NULL }, - { (void *) 2688, 905, NULL }, - { (void *) 2705, 375, NULL }, - { (void *) 2725, 375, NULL }, - { (void *) 2748, 695, NULL }, - { (void *) 2763, 914, NULL }, - { (void *) 2775, 150, NULL }, - { (void *) 2785, 1312, NULL }, - { (void *) 2796, 1312, NULL }, - { (void *) 2810, 1313, NULL }, - { (void *) 2821, 1313, NULL }, - { (void *) 2835, 9, NULL }, - { (void *) 2843, 10, NULL }, - { (void *) 2852, 11, NULL }, - { (void *) 2860, 12, NULL }, - { (void *) 2869, 13, NULL }, - { (void *) 2877, 14, NULL }, - { (void *) 2886, 15, NULL }, - { (void *) 2894, 16, NULL }, - { (void *) 2903, 17, NULL }, - { (void *) 2911, 18, NULL }, - { (void *) 2920, 19, NULL }, - { (void *) 2929, 20, NULL }, - { (void *) 2939, 21, NULL }, - { (void *) 2948, 22, NULL }, - { (void *) 2958, 23, NULL }, - { (void *) 2967, 24, NULL }, - { (void *) 2977, 25, NULL }, - { (void *) 2985, 26, NULL }, - { (void *) 2994, 27, NULL }, - { (void *) 3002, 28, NULL }, - { (void *) 3011, 29, NULL }, - { (void *) 3019, 30, NULL }, - { (void *) 3028, 31, NULL }, - { (void *) 3036, 32, NULL }, - { (void *) 3045, 33, NULL }, - { (void *) 3053, 34, NULL }, - { (void *) 3062, 35, NULL }, - { (void *) 3071, 36, NULL }, - { (void *) 3081, 37, NULL }, - { (void *) 3090, 38, NULL }, - { (void *) 3100, 39, NULL }, - { (void *) 3109, 40, NULL }, - { (void *) 3119, 1284, NULL }, - { (void *) 3127, 1284, NULL }, - { (void *) 3138, 1192, NULL }, - { (void *) 3158, 1193, NULL }, - { (void *) 3178, 1194, NULL }, - { (void *) 3198, 210, NULL }, - { (void *) 3208, 580, NULL }, - { (void *) 3228, 580, NULL }, - { (void *) 3239, 580, NULL }, - { (void *) 3253, 580, NULL }, - { (void *) 3267, 151, NULL }, - { (void *) 3281, 734, NULL }, - { (void *) 3291, 735, NULL }, - { (void *) 3302, 736, NULL }, - { (void *) 3312, 737, NULL }, - { (void *) 3323, 308, NULL }, - { (void *) 3336, 1033, NULL }, - { (void *) 3352, 346, NULL }, - { (void *) 3366, 346, NULL }, - { (void *) 3383, 339, NULL }, - { (void *) 3394, 339, NULL }, - { (void *) 3408, 340, NULL }, - { (void *) 3430, 340, NULL }, - { (void *) 3455, 341, NULL }, - { (void *) 3477, 341, NULL }, - { (void *) 3502, 339, NULL }, - { (void *) 3516, 482, NULL }, - { (void *) 3530, 482, NULL }, - { (void *) 3547, 408, NULL }, - { (void *) 3568, 408, NULL }, - { (void *) 3592, 409, NULL }, - { (void *) 3613, 409, NULL }, - { (void *) 3637, 410, NULL }, - { (void *) 3658, 410, NULL }, - { (void *) 3682, 410, NULL }, - { (void *) 3706, 411, NULL }, - { (void *) 3730, 411, NULL }, - { (void *) 3757, 412, NULL }, - { (void *) 3781, 412, NULL }, - { (void *) 3808, 413, NULL }, - { (void *) 3832, 413, NULL }, - { (void *) 3859, 413, NULL }, - { (void *) 3886, 924, NULL }, - { (void *) 3914, 925, NULL }, - { (void *) 3942, 926, NULL }, - { (void *) 3970, 348, NULL }, - { (void *) 3990, 348, NULL }, - { (void *) 4013, 349, NULL }, - { (void *) 4033, 349, NULL }, - { (void *) 4056, 350, NULL }, - { (void *) 4078, 350, NULL }, - { (void *) 4103, 351, NULL }, - { (void *) 4126, 351, NULL }, - { (void *) 4152, 352, NULL }, - { (void *) 4174, 352, NULL }, - { (void *) 4199, 353, NULL }, - { (void *) 4222, 353, NULL }, - { (void *) 4248, 694, NULL }, - { (void *) 4266, 347, NULL }, - { (void *) 4284, 347, NULL }, - { (void *) 4305, 342, NULL }, - { (void *) 4320, 342, NULL }, - { (void *) 4338, 354, NULL }, - { (void *) 4362, 354, NULL }, - { (void *) 4389, 355, NULL }, - { (void *) 4413, 355, NULL }, - { (void *) 4440, 880, NULL }, - { (void *) 4457, 880, NULL }, - { (void *) 4477, 880, NULL }, - { (void *) 4497, 927, NULL }, - { (void *) 4520, 255, NULL }, - { (void *) 4531, 323, NULL }, - { (void *) 4546, 323, NULL }, - { (void *) 4564, 324, NULL }, - { (void *) 4579, 324, NULL }, - { (void *) 4597, 325, NULL }, - { (void *) 4615, 325, NULL }, - { (void *) 4636, 326, NULL }, - { (void *) 4654, 326, NULL }, - { (void *) 4675, 373, NULL }, - { (void *) 4693, 373, NULL }, - { (void *) 4714, 373, NULL }, - { (void *) 4735, 928, NULL }, - { (void *) 4757, 929, NULL }, - { (void *) 4779, 930, NULL }, - { (void *) 4801, 931, NULL }, - { (void *) 4815, 932, NULL }, - { (void *) 4834, 1266, NULL }, - { (void *) 4855, 483, NULL }, - { (void *) 4869, 650, NULL }, - { (void *) 4892, 933, NULL }, - { (void *) 4915, 934, NULL }, - { (void *) 4929, 935, NULL }, - { (void *) 4949, 936, NULL }, - { (void *) 4964, 484, NULL }, - { (void *) 4977, 651, NULL }, - { (void *) 4999, 1252, NULL }, - { (void *) 5022, 1042, NULL }, - { (void *) 5043, 1042, NULL }, - { (void *) 5067, 937, NULL }, - { (void *) 5082, 938, NULL }, - { (void *) 5107, 939, NULL }, - { (void *) 5126, 152, NULL }, - { (void *) 5135, 1102, NULL }, - { (void *) 5156, 1102, NULL }, - { (void *) 5180, 1102, NULL }, - { (void *) 5204, 1103, NULL }, - { (void *) 5224, 1103, NULL }, - { (void *) 5247, 1103, NULL }, - { (void *) 5270, 1104, NULL }, - { (void *) 5289, 1104, NULL }, - { (void *) 5311, 1104, NULL }, - { (void *) 5333, 464, NULL }, - { (void *) 5347, 464, NULL }, - { (void *) 5364, 1195, NULL }, - { (void *) 5388, 665, NULL }, - { (void *) 5407, 665, NULL }, - { (void *) 5429, 665, NULL }, - { (void *) 5451, 4, NULL }, - { (void *) 5463, 652, NULL }, - { (void *) 5479, 1238, NULL }, - { (void *) 5501, 1267, NULL }, - { (void *) 5522, 485, NULL }, - { (void *) 5536, 1043, NULL }, - { (void *) 5559, 1043, NULL }, - { (void *) 5585, 623, NULL }, - { (void *) 5603, 623, NULL }, - { (void *) 5620, 465, NULL }, - { (void *) 5634, 465, NULL }, - { (void *) 5651, 666, NULL }, - { (void *) 5671, 666, NULL }, - { (void *) 5694, 666, NULL }, - { (void *) 5717, 718, NULL }, - { (void *) 5732, 486, NULL }, - { (void *) 5745, 696, NULL }, - { (void *) 5756, 327, NULL }, - { (void *) 5771, 327, NULL }, - { (void *) 5789, 803, NULL }, - { (void *) 5814, 684, NULL }, - { (void *) 5833, 684, NULL }, - { (void *) 5857, 684, NULL }, - { (void *) 5879, 1214, NULL }, - { (void *) 5894, 245, NULL }, - { (void *) 5904, 211, NULL }, - { (void *) 5914, 288, NULL }, - { (void *) 5925, 831, NULL }, - { (void *) 5942, 832, NULL }, - { (void *) 5960, 814, NULL }, - { (void *) 5972, 814, NULL }, - { (void *) 5987, 1285, NULL }, - { (void *) 5999, 1285, NULL }, - { (void *) 6014, 653, NULL }, - { (void *) 6030, 487, NULL }, - { (void *) 6043, 214, NULL }, - { (void *) 6051, 309, NULL }, - { (void *) 6070, 581, NULL }, - { (void *) 6088, 940, NULL }, - { (void *) 6113, 488, NULL }, - { (void *) 6138, 488, NULL }, - { (void *) 6166, 581, NULL }, - { (void *) 6175, 581, NULL }, - { (void *) 6187, 581, NULL }, - { (void *) 6199, 1039, NULL }, - { (void *) 6221, 878, NULL }, - { (void *) 6237, 879, NULL }, - { (void *) 6261, 310, NULL }, - { (void *) 6272, 310, NULL }, - { (void *) 6286, 772, NULL }, - { (void *) 6305, 659, NULL }, - { (void *) 6325, 659, NULL }, - { (void *) 6348, 861, NULL }, - { (void *) 6380, 861, NULL }, - { (void *) 6415, 659, NULL }, - { (void *) 6438, 202, NULL }, - { (void *) 6449, 489, NULL }, - { (void *) 6461, 489, NULL }, - { (void *) 6476, 489, NULL }, - { (void *) 6491, 489, NULL }, - { (void *) 6506, 489, NULL }, - { (void *) 6520, 311, NULL }, - { (void *) 6533, 702, NULL }, - { (void *) 6556, 702, NULL }, - { (void *) 6582, 702, NULL }, - { (void *) 6608, 773, NULL }, - { (void *) 6629, 660, NULL }, - { (void *) 6651, 660, NULL }, - { (void *) 6676, 862, NULL }, - { (void *) 6710, 862, NULL }, - { (void *) 6747, 703, NULL }, - { (void *) 6779, 863, NULL }, - { (void *) 6823, 863, NULL }, - { (void *) 6870, 703, NULL }, - { (void *) 6905, 703, NULL }, - { (void *) 6940, 660, NULL }, - { (void *) 6965, 257, NULL }, - { (void *) 6976, 338, NULL }, - { (void *) 6994, 704, NULL }, - { (void *) 7022, 704, NULL }, - { (void *) 7053, 704, NULL }, - { (void *) 7084, 338, NULL }, - { (void *) 7105, 1021, NULL }, - { (void *) 7117, 1022, NULL }, - { (void *) 7130, 1023, NULL }, - { (void *) 7142, 1024, NULL }, - { (void *) 7155, 1025, NULL }, - { (void *) 7167, 1026, NULL }, - { (void *) 7180, 1027, NULL }, - { (void *) 7192, 1028, NULL }, - { (void *) 7205, 804, NULL }, - { (void *) 7227, 864, NULL }, - { (void *) 7258, 810, NULL }, - { (void *) 7286, 865, NULL }, - { (void *) 7323, 1279, NULL }, - { (void *) 7360, 1280, NULL }, - { (void *) 7387, 41, NULL }, - { (void *) 7396, 312, NULL }, - { (void *) 7412, 1034, NULL }, - { (void *) 7431, 42, NULL }, - { (void *) 7441, 215, NULL }, - { (void *) 7448, 313, NULL }, - { (void *) 7466, 582, NULL }, - { (void *) 7483, 941, NULL }, - { (void *) 7507, 490, NULL }, - { (void *) 7531, 490, NULL }, - { (void *) 7558, 582, NULL }, + { (void *) 1277, 1328, NULL }, + { (void *) 1290, 1328, NULL }, + { (void *) 1306, 336, NULL }, + { (void *) 1317, 336, NULL }, + { (void *) 1331, 337, NULL }, + { (void *) 1345, 337, NULL }, + { (void *) 1362, 712, NULL }, + { (void *) 1386, 337, NULL }, + { (void *) 1403, 481, NULL }, + { (void *) 1425, 481, NULL }, + { (void *) 1450, 481, NULL }, + { (void *) 1475, 711, NULL }, + { (void *) 1507, 481, NULL }, + { (void *) 1532, 711, NULL }, + { (void *) 1555, 711, NULL }, + { (void *) 1581, 711, NULL }, + { (void *) 1607, 711, NULL }, + { (void *) 1633, 712, NULL }, + { (void *) 1648, 712, NULL }, + { (void *) 1666, 712, NULL }, + { (void *) 1684, 712, NULL }, + { (void *) 1702, 241, NULL }, + { (void *) 1712, 714, NULL }, + { (void *) 1732, 420, NULL }, + { (void *) 1750, 420, NULL }, + { (void *) 1771, 420, NULL }, + { (void *) 1793, 713, NULL }, + { (void *) 1821, 420, NULL }, + { (void *) 1842, 713, NULL }, + { (void *) 1861, 713, NULL }, + { (void *) 1883, 713, NULL }, + { (void *) 1905, 713, NULL }, + { (void *) 1927, 714, NULL }, + { (void *) 1938, 714, NULL }, + { (void *) 1952, 714, NULL }, + { (void *) 1966, 714, NULL }, + { (void *) 1980, 663, NULL }, + { (void *) 1996, 663, NULL }, + { (void *) 2015, 917, NULL }, + { (void *) 2036, 462, NULL }, + { (void *) 2047, 462, NULL }, + { (void *) 2061, 1221, NULL }, + { (void *) 2083, 903, NULL }, + { (void *) 2097, 903, NULL }, + { (void *) 2114, 463, NULL }, + { (void *) 2128, 463, NULL }, + { (void *) 2145, 2, NULL }, + { (void *) 2154, 3, NULL }, + { (void *) 2164, 664, NULL }, + { (void *) 2187, 664, NULL }, + { (void *) 2213, 664, NULL }, + { (void *) 2239, 918, NULL }, + { (void *) 2267, 575, NULL }, + { (void *) 2278, 575, NULL }, + { (void *) 2292, 203, NULL }, + { (void *) 2298, 204, NULL }, + { (void *) 2309, 876, NULL }, + { (void *) 2325, 877, NULL }, + { (void *) 2344, 576, NULL }, + { (void *) 2358, 577, NULL }, + { (void *) 2372, 578, NULL }, + { (void *) 2386, 579, NULL }, + { (void *) 2401, 206, NULL }, + { (void *) 2412, 1237, NULL }, + { (void *) 2428, 1238, NULL }, + { (void *) 2445, 1286, NULL }, + { (void *) 2457, 1286, NULL }, + { (void *) 2472, 208, NULL }, + { (void *) 2483, 813, NULL }, + { (void *) 2495, 813, NULL }, + { (void *) 2510, 1287, NULL }, + { (void *) 2522, 1287, NULL }, + { (void *) 2537, 205, NULL }, + { (void *) 2548, 919, NULL }, + { (void *) 2569, 920, NULL }, + { (void *) 2593, 921, NULL }, + { (void *) 2617, 922, NULL }, + { (void *) 2641, 923, NULL }, + { (void *) 2665, 924, NULL }, + { (void *) 2690, 207, NULL }, + { (void *) 2703, 904, NULL }, + { (void *) 2717, 905, NULL }, + { (void *) 2734, 375, NULL }, + { (void *) 2754, 375, NULL }, + { (void *) 2777, 695, NULL }, + { (void *) 2792, 915, NULL }, + { (void *) 2804, 150, NULL }, + { (void *) 2814, 1316, NULL }, + { (void *) 2825, 1316, NULL }, + { (void *) 2839, 1317, NULL }, + { (void *) 2850, 1317, NULL }, + { (void *) 2864, 9, NULL }, + { (void *) 2872, 10, NULL }, + { (void *) 2881, 11, NULL }, + { (void *) 2889, 12, NULL }, + { (void *) 2898, 13, NULL }, + { (void *) 2906, 14, NULL }, + { (void *) 2915, 15, NULL }, + { (void *) 2923, 16, NULL }, + { (void *) 2932, 17, NULL }, + { (void *) 2940, 18, NULL }, + { (void *) 2949, 19, NULL }, + { (void *) 2958, 20, NULL }, + { (void *) 2968, 21, NULL }, + { (void *) 2977, 22, NULL }, + { (void *) 2987, 23, NULL }, + { (void *) 2996, 24, NULL }, + { (void *) 3006, 25, NULL }, + { (void *) 3014, 26, NULL }, + { (void *) 3023, 27, NULL }, + { (void *) 3031, 28, NULL }, + { (void *) 3040, 29, NULL }, + { (void *) 3048, 30, NULL }, + { (void *) 3057, 31, NULL }, + { (void *) 3065, 32, NULL }, + { (void *) 3074, 33, NULL }, + { (void *) 3082, 34, NULL }, + { (void *) 3091, 35, NULL }, + { (void *) 3100, 36, NULL }, + { (void *) 3110, 37, NULL }, + { (void *) 3119, 38, NULL }, + { (void *) 3129, 39, NULL }, + { (void *) 3138, 40, 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NULL }, + { (void *) 3642, 409, NULL }, + { (void *) 3666, 410, NULL }, + { (void *) 3687, 410, NULL }, + { (void *) 3711, 410, NULL }, + { (void *) 3735, 411, NULL }, + { (void *) 3759, 411, NULL }, + { (void *) 3786, 412, NULL }, + { (void *) 3810, 412, NULL }, + { (void *) 3837, 413, NULL }, + { (void *) 3861, 413, NULL }, + { (void *) 3888, 413, NULL }, + { (void *) 3915, 925, NULL }, + { (void *) 3943, 926, NULL }, + { (void *) 3971, 927, NULL }, + { (void *) 3999, 348, NULL }, + { (void *) 4019, 348, NULL }, + { (void *) 4042, 349, NULL }, + { (void *) 4062, 349, NULL }, + { (void *) 4085, 350, NULL }, + { (void *) 4107, 350, NULL }, + { (void *) 4132, 351, NULL }, + { (void *) 4155, 351, NULL }, + { (void *) 4181, 352, NULL }, + { (void *) 4203, 352, NULL }, + { (void *) 4228, 353, NULL }, + { (void *) 4251, 353, NULL }, + { (void *) 4277, 694, NULL }, + { (void *) 4295, 347, NULL }, + { (void *) 4313, 347, NULL }, + { (void *) 4334, 342, NULL }, + { (void *) 4349, 342, NULL }, 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(void *) 4978, 937, NULL }, + { (void *) 4993, 484, NULL }, + { (void *) 5006, 651, NULL }, + { (void *) 5028, 1255, NULL }, + { (void *) 5051, 1043, NULL }, + { (void *) 5072, 1043, NULL }, + { (void *) 5096, 938, NULL }, + { (void *) 5111, 939, NULL }, + { (void *) 5136, 940, NULL }, + { (void *) 5155, 152, NULL }, + { (void *) 5164, 1103, NULL }, + { (void *) 5185, 1103, NULL }, + { (void *) 5209, 1103, NULL }, + { (void *) 5233, 1104, NULL }, + { (void *) 5253, 1104, NULL }, + { (void *) 5276, 1104, NULL }, + { (void *) 5299, 1105, NULL }, + { (void *) 5318, 1105, NULL }, + { (void *) 5340, 1105, NULL }, + { (void *) 5362, 464, NULL }, + { (void *) 5376, 464, NULL }, + { (void *) 5393, 1196, NULL }, + { (void *) 5417, 665, NULL }, + { (void *) 5436, 665, NULL }, + { (void *) 5458, 665, NULL }, + { (void *) 5480, 4, NULL }, + { (void *) 5492, 652, NULL }, + { (void *) 5508, 1241, NULL }, + { (void *) 5530, 1270, NULL }, + { (void *) 5551, 485, NULL }, + { (void *) 5565, 1044, NULL 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(void *) 6708, 773, NULL }, + { (void *) 6729, 660, NULL }, + { (void *) 6751, 660, NULL }, + { (void *) 6776, 862, NULL }, + { (void *) 6810, 862, NULL }, + { (void *) 6847, 703, NULL }, + { (void *) 6879, 863, NULL }, + { (void *) 6923, 863, NULL }, + { (void *) 6970, 703, NULL }, + { (void *) 7005, 703, NULL }, + { (void *) 7040, 660, NULL }, + { (void *) 7065, 257, NULL }, + { (void *) 7076, 338, NULL }, + { (void *) 7094, 704, NULL }, + { (void *) 7122, 704, NULL }, + { (void *) 7153, 704, NULL }, + { (void *) 7184, 338, NULL }, + { (void *) 7205, 1022, NULL }, + { (void *) 7217, 1023, NULL }, + { (void *) 7230, 1024, NULL }, + { (void *) 7242, 1025, NULL }, + { (void *) 7255, 1026, NULL }, + { (void *) 7267, 1027, NULL }, + { (void *) 7280, 1028, NULL }, + { (void *) 7292, 1029, NULL }, + { (void *) 7305, 804, NULL }, + { (void *) 7327, 864, NULL }, + { (void *) 7358, 810, NULL }, + { (void *) 7386, 865, NULL }, + { (void *) 7423, 1283, NULL }, + { (void *) 7460, 1284, NULL }, + { (void *) 7487, 41, NULL }, + { (void *) 7496, 312, NULL }, + { (void *) 7512, 1035, NULL }, + { (void *) 7531, 42, NULL }, + { (void *) 7541, 215, NULL }, + { (void *) 7548, 313, NULL }, { (void *) 7566, 582, NULL }, - { (void *) 7577, 582, NULL }, - { (void *) 7588, 43, NULL }, - { (void *) 7592, 583, NULL }, - { (void *) 7613, 583, NULL }, - { (void *) 7636, 1196, NULL }, - { (void *) 7657, 1, NULL }, - { (void *) 7665, 1239, NULL }, - { (void *) 7683, 1268, NULL }, - { (void *) 7701, 466, NULL }, - { (void *) 7710, 466, NULL }, - { (void *) 7722, 811, NULL }, - { (void *) 7738, 584, NULL }, - { (void *) 7759, 584, NULL }, - { (void *) 7783, 228, NULL }, - { (void *) 7795, 229, NULL }, - { (void *) 7808, 230, NULL }, - { (void *) 7820, 231, NULL }, - { (void *) 7833, 232, NULL }, - { (void *) 7845, 233, NULL }, - { (void *) 7858, 234, NULL }, - { (void *) 7870, 235, NULL }, - { (void *) 7883, 236, NULL }, - { (void *) 7893, 238, NULL }, - { (void *) 7903, 237, NULL }, - { (void *) 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(void *) 15106, 854, NULL }, - { (void *) 15129, 855, NULL }, - { (void *) 15145, 856, NULL }, - { (void *) 15162, 857, NULL }, - { (void *) 15176, 857, NULL }, - { (void *) 15193, 857, NULL }, - { (void *) 15210, 858, NULL }, - { (void *) 15224, 858, NULL }, - { (void *) 15241, 858, NULL }, - { (void *) 15258, 859, NULL }, - { (void *) 15273, 859, NULL }, - { (void *) 15291, 859, NULL }, - { (void *) 15309, 158, NULL }, - { (void *) 15314, 367, NULL }, - { (void *) 15324, 367, NULL }, - { (void *) 15337, 212, NULL }, - { (void *) 15347, 314, NULL }, - { (void *) 15360, 1035, NULL }, - { (void *) 15376, 44, NULL }, - { (void *) 15383, 45, NULL }, - { (void *) 15391, 46, NULL }, - { (void *) 15398, 47, NULL }, - { (void *) 15406, 48, NULL }, - { (void *) 15413, 49, NULL }, - { (void *) 15421, 50, NULL }, - { (void *) 15428, 51, NULL }, - { (void *) 15436, 315, NULL }, - { (void *) 15444, 316, NULL }, - { (void *) 15453, 197, NULL }, - { (void *) 15463, 317, NULL }, - { (void *) 15481, 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NULL }, - { (void *) 28424, 534, NULL }, - { (void *) 28440, 534, NULL }, - { (void *) 28459, 1101, NULL }, - { (void *) 28483, 1101, NULL }, - { (void *) 28510, 126, NULL }, - { (void *) 28519, 127, NULL }, - { (void *) 28529, 128, NULL }, - { (void *) 28538, 129, NULL }, - { (void *) 28548, 130, NULL }, - { (void *) 28557, 131, NULL }, - { (void *) 28567, 132, NULL }, - { (void *) 28576, 133, NULL }, - { (void *) 28586, 134, NULL }, - { (void *) 28595, 135, NULL }, - { (void *) 28605, 136, NULL }, - { (void *) 28614, 137, NULL }, - { (void *) 28624, 138, NULL }, - { (void *) 28633, 139, NULL }, - { (void *) 28643, 140, NULL }, - { (void *) 28652, 141, NULL }, - { (void *) 28662, 142, NULL }, - { (void *) 28671, 143, NULL }, - { (void *) 28681, 144, NULL }, - { (void *) 28690, 145, NULL }, - { (void *) 28700, 146, NULL }, - { (void *) 28709, 147, NULL }, - { (void *) 28719, 148, NULL }, - { (void *) 28728, 149, NULL }, - { (void *) 28738, 1004, NULL }, - { (void *) 28763, 1005, NULL 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NULL }, - { (void *) 29349, 643, NULL }, - { (void *) 29364, 643, NULL }, - { (void *) 29382, 1151, NULL }, - { (void *) 29399, 644, NULL }, - { (void *) 29415, 644, NULL }, - { (void *) 29434, 1152, NULL }, - { (void *) 29452, 541, NULL }, - { (void *) 29467, 541, NULL }, - { (void *) 29485, 1153, NULL }, - { (void *) 29502, 542, NULL }, - { (void *) 29518, 542, NULL }, - { (void *) 29537, 1154, NULL }, - { (void *) 29555, 543, NULL }, - { (void *) 29570, 543, NULL }, - { (void *) 29588, 1155, NULL }, - { (void *) 29605, 544, NULL }, - { (void *) 29621, 544, NULL }, - { (void *) 29640, 1156, NULL }, - { (void *) 29658, 645, NULL }, - { (void *) 29673, 645, NULL }, - { (void *) 29691, 1157, NULL }, - { (void *) 29708, 646, NULL }, - { (void *) 29724, 646, NULL }, - { (void *) 29743, 1158, NULL }, - { (void *) 29761, 545, NULL }, - { (void *) 29776, 545, NULL }, - { (void *) 29794, 1159, NULL }, - { (void *) 29811, 546, NULL }, - { (void *) 29827, 546, NULL }, - { (void *) 29846, 1160, NULL }, - { (void *) 29864, 547, NULL }, - { (void *) 29881, 547, NULL }, - { (void *) 29901, 548, NULL }, - { (void *) 29918, 548, NULL }, - { (void *) 29938, 549, NULL }, - { (void *) 29955, 549, NULL }, - { (void *) 29975, 550, NULL }, - { (void *) 29992, 550, NULL }, - { (void *) 30012, 551, NULL }, - { (void *) 30030, 551, NULL }, - { (void *) 30051, 552, NULL }, - { (void *) 30069, 552, NULL }, - { (void *) 30090, 553, NULL }, - { (void *) 30108, 553, NULL }, - { (void *) 30129, 554, NULL }, - { (void *) 30145, 554, NULL }, - { (void *) 30164, 555, NULL }, - { (void *) 30179, 555, NULL }, - { (void *) 30197, 1161, NULL }, - { (void *) 30214, 556, NULL }, - { (void *) 30230, 556, NULL }, - { (void *) 30249, 1162, NULL }, - { (void *) 30267, 647, NULL }, - { (void *) 30282, 647, NULL }, - { (void *) 30300, 1163, NULL }, - { (void *) 30317, 648, NULL }, - { (void *) 30333, 648, NULL }, - { (void *) 30352, 1164, NULL }, - { (void *) 30370, 557, NULL }, - { (void *) 30386, 557, NULL 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NULL }, - { (void *) 30958, 1224, NULL }, - { (void *) 30975, 1224, NULL }, - { (void *) 30995, 1225, NULL }, - { (void *) 31013, 1225, NULL }, - { (void *) 31034, 1226, NULL }, - { (void *) 31050, 1226, NULL }, - { (void *) 31069, 1227, NULL }, - { (void *) 31086, 1227, NULL }, - { (void *) 31106, 1228, NULL }, - { (void *) 31123, 1228, NULL }, - { (void *) 31143, 1229, NULL }, - { (void *) 31161, 1229, NULL }, - { (void *) 31182, 609, NULL }, - { (void *) 31199, 609, NULL }, - { (void *) 31219, 1230, NULL }, - { (void *) 31235, 1230, NULL }, - { (void *) 31254, 1231, NULL }, - { (void *) 31271, 1231, NULL }, - { (void *) 31291, 610, NULL }, - { (void *) 31308, 610, NULL }, - { (void *) 31328, 611, NULL }, - { (void *) 31346, 611, NULL }, - { (void *) 31367, 1232, NULL }, - { (void *) 31384, 1232, NULL }, - { (void *) 31404, 1233, NULL }, - { (void *) 31422, 1233, NULL }, - { (void *) 31443, 612, NULL }, - { (void *) 31461, 612, NULL }, - { (void *) 31482, 885, NULL }, - { (void *) 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32507, 447, NULL }, - { (void *) 32523, 447, NULL }, - { (void *) 32540, 448, NULL }, - { (void *) 32552, 448, NULL }, - { (void *) 32567, 448, NULL }, - { (void *) 32583, 449, NULL }, - { (void *) 32596, 449, NULL }, - { (void *) 32612, 449, NULL }, - { (void *) 32629, 450, NULL }, - { (void *) 32641, 450, NULL }, - { (void *) 32656, 450, NULL }, - { (void *) 32672, 451, NULL }, - { (void *) 32685, 451, NULL }, - { (void *) 32701, 451, NULL }, - { (void *) 32718, 452, NULL }, - { (void *) 32730, 452, NULL }, - { (void *) 32745, 452, NULL }, - { (void *) 32761, 453, NULL }, - { (void *) 32774, 453, NULL }, - { (void *) 32790, 453, NULL }, - { (void *) 32807, 454, NULL }, - { (void *) 32819, 454, NULL }, - { (void *) 32834, 454, NULL }, - { (void *) 32850, 455, NULL }, - { (void *) 32863, 455, NULL }, - { (void *) 32879, 455, NULL }, - { (void *) 32896, 456, NULL }, - { (void *) 32908, 456, NULL }, - { (void *) 32923, 456, NULL }, - { (void *) 32939, 457, NULL }, - { (void *) 32952, 457, NULL }, - { (void *) 32968, 457, NULL }, - { (void *) 32985, 458, NULL }, - { (void *) 32997, 458, NULL }, - { (void *) 33012, 458, NULL }, - { (void *) 33028, 459, NULL }, - { (void *) 33041, 459, NULL }, - { (void *) 33057, 459, NULL }, - { (void *) 33074, 1118, NULL }, - { (void *) 33090, 1119, NULL }, - { (void *) 33107, 1120, NULL }, - { (void *) 33123, 1121, NULL }, - { (void *) 33140, 1122, NULL }, - { (void *) 33156, 1123, NULL }, - { (void *) 33173, 1124, NULL }, - { (void *) 33189, 1125, NULL } + { (void *) 7583, 942, NULL }, + { (void *) 7607, 490, NULL }, + { (void *) 7631, 490, NULL }, + { (void *) 7658, 582, NULL }, + { (void *) 7666, 582, NULL }, + { (void *) 7677, 582, NULL }, + { (void *) 7688, 43, NULL }, + { (void *) 7692, 583, NULL }, + { (void *) 7713, 583, NULL }, + { (void *) 7736, 1197, NULL }, + { (void *) 7757, 1, NULL }, + { (void *) 7765, 1242, NULL }, + { (void *) 7783, 1271, NULL }, + { (void *) 7801, 466, NULL }, + { (void *) 7810, 466, NULL }, + { (void *) 7822, 811, NULL }, + { (void *) 7838, 584, NULL }, + { (void *) 7859, 584, NULL }, + { (void *) 7883, 228, NULL }, + { (void *) 7895, 229, NULL }, + { (void *) 7908, 230, NULL }, + { (void *) 7920, 231, NULL }, + { (void *) 7933, 232, NULL }, + { (void *) 7945, 233, NULL }, + { (void *) 7958, 234, NULL }, + { (void *) 7970, 235, NULL }, + { (void *) 7983, 236, NULL }, + { (void *) 7993, 238, NULL }, + { (void *) 8003, 237, NULL }, + { (void *) 8014, 239, NULL }, + { (void *) 8025, 1130, NULL }, + { (void *) 8042, 194, NULL }, + { (void *) 8057, 697, NULL }, + { (void *) 8067, 216, NULL }, + { (void *) 8074, 217, NULL }, + { (void *) 8080, 681, NULL }, + { (void *) 8103, 1222, NULL }, + { (void *) 8131, 681, NULL }, + { (void *) 8157, 943, NULL }, + { (void *) 8185, 421, NULL }, + { (void *) 8201, 421, NULL }, + { (void *) 8220, 422, NULL }, + { (void *) 8230, 422, NULL }, + { (void *) 8243, 423, NULL }, + { (void *) 8254, 423, NULL }, + { (void *) 8268, 1116, NULL }, + { (void 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NULL }, + { (void *) 10580, 262, NULL }, + { (void *) 10590, 716, NULL }, + { (void *) 10607, 716, NULL }, + { (void *) 10627, 586, NULL }, + { (void *) 10647, 586, NULL }, + { (void *) 10670, 675, NULL }, + { (void *) 10706, 675, NULL }, + { (void *) 10745, 675, NULL }, + { (void *) 10784, 889, NULL }, + { (void *) 10810, 841, NULL }, + { (void *) 10833, 841, NULL }, + { (void *) 10859, 841, NULL }, + { (void *) 10885, 655, NULL }, + { (void *) 10898, 361, NULL }, + { (void *) 10911, 361, NULL }, + { (void *) 10927, 362, NULL }, + { (void *) 10951, 362, NULL }, + { (void *) 10978, 363, NULL }, + { (void *) 11002, 363, NULL }, + { (void *) 11029, 656, NULL }, + { (void *) 11043, 618, NULL }, + { (void *) 11059, 698, NULL }, + { (void *) 11073, 587, NULL }, + { (void *) 11095, 587, NULL }, + { (void *) 11109, 263, NULL }, + { (void *) 11121, 890, NULL }, + { (void *) 11143, 866, NULL }, + { (void *) 11163, 264, NULL }, + { (void *) 11174, 265, NULL }, + { (void *) 11185, 1321, NULL }, + { (void *) 11196, 1321, NULL }, + { (void *) 11210, 266, NULL }, + { (void *) 11219, 267, NULL }, + { (void *) 11228, 268, NULL }, + { (void *) 11237, 269, NULL }, + { (void *) 11251, 270, NULL }, + { (void *) 11265, 1322, NULL }, + { (void *) 11279, 1322, NULL }, + { (void *) 11296, 364, NULL }, + { (void *) 11306, 364, NULL }, + { (void *) 11319, 365, NULL }, + { (void *) 11340, 365, NULL }, + { (void *) 11364, 366, NULL }, + { (void *) 11385, 366, NULL }, + { (void *) 11409, 707, NULL }, + { (void *) 11426, 946, NULL }, + { (void *) 11454, 947, NULL }, + { (void *) 11480, 948, NULL }, + { (void *) 11503, 949, NULL }, + { (void *) 11525, 950, NULL }, + { (void *) 11566, 951, NULL }, + { (void *) 11597, 952, NULL }, + { (void *) 11629, 1273, NULL }, + { (void *) 11653, 1107, NULL }, + { (void *) 11668, 1107, NULL }, + { (void *) 11686, 657, NULL }, + { (void *) 11710, 1251, NULL }, + { (void *) 11736, 658, NULL }, + { (void *) 11760, 1108, NULL }, + { (void *) 11778, 1108, NULL }, + { (void *) 11799, 1274, NULL }, + { (void *) 11823, 1244, NULL }, + { (void *) 11852, 1245, NULL }, + { (void *) 11881, 1246, NULL }, + { (void *) 11912, 1247, NULL }, + { (void *) 11938, 1248, NULL }, + { (void *) 11967, 1249, NULL }, + { (void *) 11991, 1275, NULL }, + { (void *) 12013, 1276, NULL }, + { (void *) 12039, 1277, NULL }, + { (void *) 12061, 271, NULL }, + { (void *) 12075, 272, NULL }, + { (void *) 12090, 273, NULL }, + { (void *) 12105, 329, NULL }, + { (void *) 12117, 329, NULL }, + { (void *) 12132, 329, NULL }, + { (void *) 12147, 274, NULL }, + { (void *) 12165, 818, NULL }, + { (void *) 12182, 818, NULL }, + { (void *) 12202, 625, NULL }, + { (void *) 12230, 626, NULL }, + { (void *) 12258, 495, NULL }, + { (void *) 12276, 893, NULL }, + { (void *) 12298, 627, NULL }, + { (void *) 12328, 628, NULL }, + { (void *) 12358, 1207, NULL }, + { (void *) 12387, 1208, NULL }, + { (void *) 12416, 1131, NULL }, + { (void *) 12440, 1132, NULL }, + { (void *) 12464, 1046, NULL }, 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(void *) 13128, 676, NULL }, + { (void *) 13155, 676, NULL }, + { (void *) 13185, 676, NULL }, + { (void *) 13215, 720, NULL }, + { (void *) 13238, 720, NULL }, + { (void *) 13264, 720, NULL }, + { (void *) 13290, 721, NULL }, + { (void *) 13314, 721, NULL }, + { (void *) 13341, 721, NULL }, + { (void *) 13368, 722, NULL }, + { (void *) 13390, 723, NULL }, + { (void *) 13412, 359, NULL }, + { (void *) 13431, 359, NULL }, + { (void *) 13453, 497, NULL }, + { (void *) 13470, 815, NULL }, + { (void *) 13495, 498, NULL }, + { (void *) 13511, 498, NULL }, + { (void *) 13530, 499, NULL }, + { (void *) 13542, 275, NULL }, + { (void *) 13552, 588, NULL }, + { (void *) 13563, 796, NULL }, + { (void *) 13582, 797, NULL }, + { (void *) 13611, 699, NULL }, + { (void *) 13621, 1184, NULL }, + { (void *) 13646, 1185, NULL }, + { (void *) 13671, 276, NULL }, + { (void *) 13683, 277, NULL }, + { (void *) 13695, 1323, NULL }, + { (void *) 13707, 1323, NULL }, + { (void *) 13722, 278, NULL }, + { (void *) 13734, 279, NULL }, + { (void *) 13746, 279, NULL }, + { (void *) 13761, 280, NULL }, + { (void *) 13773, 280, NULL }, + { (void *) 13788, 1214, NULL }, + { (void *) 13803, 281, NULL }, + { (void *) 13815, 284, NULL }, + { (void *) 13838, 285, NULL }, + { (void *) 13861, 589, NULL }, + { (void *) 13880, 589, NULL }, + { (void *) 13902, 589, NULL }, + { (void *) 13924, 590, NULL }, + { (void *) 13944, 590, NULL }, + { (void *) 13967, 590, NULL }, + { (void *) 13990, 282, NULL }, + { (void *) 14008, 283, NULL }, + { (void *) 14026, 1324, NULL }, + { (void *) 14044, 1324, NULL }, + { (void *) 14065, 957, NULL }, + { (void *) 14081, 958, NULL }, + { (void *) 14108, 959, NULL }, + { (void *) 14135, 960, NULL }, + { (void *) 14158, 961, NULL }, + { (void *) 14182, 962, NULL }, + { (void *) 14204, 963, NULL }, + { (void *) 14226, 1014, NULL }, + { (void *) 14245, 1135, NULL }, + { (void *) 14264, 591, NULL }, + { (void *) 14292, 591, NULL }, + { (void *) 14323, 964, NULL }, + { (void *) 14349, 965, NULL }, + { (void *) 14373, 966, NULL }, + { (void *) 14396, 691, NULL }, + { (void *) 14417, 692, NULL }, + { (void *) 14435, 500, NULL }, + { (void *) 14454, 500, NULL }, + { (void *) 14476, 798, NULL }, + { (void *) 14500, 774, NULL }, + { (void *) 14513, 501, NULL }, + { (void *) 14526, 501, NULL }, + { (void *) 14542, 502, NULL }, + { (void *) 14555, 502, NULL }, + { (void *) 14571, 592, NULL }, + { (void *) 14585, 592, NULL }, + { (void *) 14602, 967, NULL }, + { (void *) 14628, 968, NULL }, + { (void *) 14652, 969, NULL }, + { (void *) 14669, 593, NULL }, + { (void *) 14688, 593, NULL }, + { (void *) 14710, 594, NULL }, + { (void *) 14730, 594, NULL }, + { (void *) 14753, 821, NULL }, + { (void *) 14772, 503, NULL }, + { (void *) 14796, 503, NULL }, + { (void *) 14823, 503, NULL }, + { (void *) 14849, 504, NULL }, + { (void *) 14867, 504, NULL }, + { (void *) 14888, 1136, NULL }, + { (void *) 14908, 505, NULL }, + { (void *) 14926, 505, NULL }, + { (void *) 14947, 1137, NULL }, + { (void *) 14967, 506, NULL }, + { (void *) 14985, 506, NULL }, + { (void *) 15006, 1138, NULL }, + { (void *) 15026, 842, NULL }, + { (void *) 15044, 843, NULL }, + { (void *) 15070, 844, NULL }, + { (void *) 15095, 845, NULL }, + { (void *) 15112, 846, NULL }, + { (void *) 15125, 847, NULL }, + { (void *) 15138, 848, NULL }, + { (void *) 15151, 849, NULL }, + { (void *) 15165, 850, NULL }, + { (void *) 15183, 851, NULL }, + { (void *) 15202, 852, NULL }, + { (void *) 15221, 853, NULL }, + { (void *) 15243, 854, NULL }, + { (void *) 15266, 855, NULL }, + { (void *) 15282, 856, NULL }, + { (void *) 15299, 857, NULL }, + { (void *) 15313, 857, NULL }, + { (void *) 15330, 857, NULL }, + { (void *) 15347, 858, NULL }, + { (void *) 15361, 858, NULL }, + { (void *) 15378, 858, NULL }, + { (void *) 15395, 859, NULL }, + { (void *) 15410, 859, NULL }, + { (void *) 15428, 859, NULL }, + { (void *) 15446, 158, NULL }, + { (void *) 15451, 367, NULL }, + { (void *) 15461, 367, NULL }, + { (void *) 15474, 212, NULL }, + { (void *) 15484, 314, NULL }, + { (void *) 15497, 1036, NULL }, + { (void *) 15513, 44, NULL }, + { (void *) 15520, 45, NULL }, + { (void *) 15528, 46, NULL }, + { (void *) 15535, 47, NULL }, + { (void *) 15543, 48, NULL }, + { (void *) 15550, 49, NULL }, + { (void *) 15558, 50, NULL }, + { (void *) 15565, 51, NULL }, + { (void *) 15573, 315, NULL }, + { (void *) 15581, 316, NULL }, + { (void *) 15590, 197, NULL }, + { (void *) 15600, 317, NULL }, + { (void *) 15618, 1015, NULL }, + { (void *) 15639, 1016, NULL }, + { (void *) 15663, 1017, NULL }, + { (void *) 15685, 970, NULL }, + { (void *) 15716, 971, NULL }, + { (void *) 15750, 1018, NULL }, + { (void *) 15775, 1019, NULL }, + { (void *) 15794, 1020, NULL }, + { (void *) 15816, 475, NULL }, + { (void *) 15825, 475, NULL }, + { (void *) 15837, 286, NULL }, + { (void *) 15847, 595, NULL }, + { (void *) 15867, 595, NULL }, + { (void *) 15878, 595, NULL }, + { (void *) 15892, 595, NULL }, + { (void *) 15906, 677, NULL }, + { (void *) 15920, 677, NULL }, + { (void *) 15937, 677, NULL }, + { (void *) 15954, 287, NULL }, + { (void *) 15961, 507, NULL }, + { (void *) 15971, 631, NULL }, + { (void *) 15984, 631, NULL }, + { (void *) 15996, 1048, NULL }, + { (void *) 16014, 1048, NULL }, + { (void *) 16035, 476, NULL }, + { (void *) 16043, 476, NULL }, + { (void *) 16054, 678, NULL }, + { (void *) 16069, 678, NULL }, + { (void *) 16087, 678, NULL }, + { (void *) 16105, 724, NULL }, + { (void *) 16115, 508, NULL }, + { (void *) 16124, 700, NULL }, + { (void *) 16131, 330, NULL }, + { (void *) 16141, 330, NULL }, + { (void *) 16154, 806, NULL }, + { (void *) 16174, 686, NULL }, + { (void *) 16188, 686, NULL }, + { (void *) 16207, 686, NULL }, + { (void *) 16224, 163, NULL }, + { (void *) 16236, 164, NULL }, + { (void *) 16249, 165, NULL }, + { (void *) 16261, 166, NULL }, + { (void *) 16274, 1294, NULL }, + { (void *) 16286, 1294, NULL }, + { (void *) 16301, 1295, NULL }, + { (void *) 16314, 1295, NULL }, + { (void *) 16330, 159, NULL }, + { (void *) 16337, 160, NULL }, + { (void *) 16345, 161, NULL }, + { (void *) 16352, 162, NULL }, + { (void *) 16360, 1296, NULL }, + { (void *) 16367, 1296, NULL }, + { (void *) 16377, 1297, NULL }, + { (void *) 16385, 1297, NULL }, + { (void *) 16396, 167, NULL }, + { (void *) 16408, 168, NULL }, + { (void *) 16418, 1298, NULL }, + { (void *) 16429, 1298, NULL }, + { (void *) 16443, 509, NULL }, + { (void *) 16455, 509, NULL }, + { (void *) 16470, 6, NULL }, + { (void *) 16479, 290, NULL }, + { (void *) 16492, 292, NULL }, + { (void *) 16504, 291, NULL }, + { (void *) 16516, 1299, NULL }, + { (void *) 16528, 1299, NULL }, + { (void *) 16543, 198, NULL }, + { (void *) 16552, 1139, NULL }, + { (void *) 16566, 415, NULL }, + { (void *) 16587, 415, NULL }, + { (void *) 16611, 416, NULL }, + { (void *) 16632, 416, NULL }, + { (void *) 16656, 1049, NULL }, + { (void *) 16670, 242, NULL }, + { (void *) 16678, 220, NULL }, + { (void *) 16684, 221, NULL }, + { (void *) 16690, 222, NULL }, + { (void *) 16696, 223, NULL }, + { (void *) 16702, 477, NULL }, + { (void *) 16712, 477, NULL }, + { (void *) 16725, 477, NULL }, + { (void *) 16738, 682, NULL }, + { (void *) 16753, 682, NULL }, + { (void *) 16771, 224, NULL }, + { (void *) 16781, 225, NULL }, + { (void *) 16791, 226, NULL }, + { (void *) 16801, 227, NULL }, + { (void *) 16811, 972, NULL }, + { (void *) 16826, 973, NULL }, + { (void *) 16846, 169, NULL }, + { (void *) 16856, 170, NULL }, + { (void *) 16867, 171, NULL }, + { (void *) 16877, 172, NULL }, + { (void *) 16888, 1300, NULL }, + { (void *) 16898, 1300, NULL }, + { (void *) 16911, 1301, NULL }, + { (void *) 16922, 1301, NULL }, + { (void *) 16936, 293, NULL }, + { (void *) 16947, 869, NULL }, + { (void *) 16961, 621, NULL }, + { (void *) 16983, 620, NULL }, + { (void *) 17000, 620, NULL }, + { (void *) 17020, 620, NULL }, + { (void *) 17040, 368, NULL }, + { (void *) 17047, 368, NULL }, + { (void *) 17057, 295, NULL }, + { (void *) 17069, 294, NULL }, + { (void *) 17081, 1302, NULL }, + { (void *) 17093, 1302, NULL }, + { (void *) 17108, 417, NULL }, + { (void *) 17129, 417, NULL }, + { (void *) 17153, 418, NULL }, + { (void *) 17174, 418, NULL }, + { (void *) 17198, 424, NULL }, + { (void *) 17214, 424, NULL }, + { (void *) 17233, 891, NULL }, + { (void *) 17257, 913, NULL }, + { (void *) 17289, 1115, NULL }, + { (void *) 17307, 705, NULL }, + { (void *) 17335, 705, NULL }, + { (void *) 17366, 705, NULL }, + { (void *) 17397, 1115, NULL }, + { (void *) 17418, 892, NULL }, + { (void *) 17444, 914, NULL }, + { (void *) 17478, 1127, NULL }, + { (void *) 17501, 1128, NULL }, + { (void *) 17526, 376, NULL }, + { (void *) 17542, 376, NULL }, + { (void *) 17561, 377, NULL }, + { (void *) 17578, 377, NULL }, + { (void *) 17598, 378, NULL }, + { (void *) 17614, 378, NULL }, + { (void *) 17633, 379, NULL }, + { (void *) 17650, 379, NULL }, + { (void *) 17670, 380, NULL }, + { (void *) 17686, 380, NULL }, + { (void *) 17705, 381, NULL }, + { (void *) 17722, 381, NULL }, + { (void *) 17742, 382, NULL }, + { (void *) 17758, 382, NULL }, + { (void *) 17777, 383, NULL }, + { (void *) 17794, 383, NULL }, + { (void *) 17814, 384, NULL }, + { (void *) 17830, 384, NULL }, + { (void *) 17849, 385, NULL }, + { (void *) 17866, 385, NULL }, + { (void *) 17886, 386, NULL }, + { (void *) 17902, 386, NULL }, + { (void *) 17921, 387, NULL }, + { (void *) 17938, 387, NULL }, + { (void *) 17958, 388, NULL }, + { (void *) 17974, 388, NULL }, + { (void *) 17993, 389, NULL }, + { (void *) 18010, 389, NULL }, + { (void *) 18030, 390, NULL }, + { (void *) 18046, 390, NULL }, + { (void *) 18065, 391, NULL }, + { (void *) 18082, 391, NULL }, + { (void *) 18102, 392, NULL }, + { (void *) 18118, 392, NULL }, + { (void *) 18137, 393, NULL }, + { (void *) 18154, 393, NULL }, + { (void *) 18174, 394, NULL }, + { (void *) 18190, 394, NULL }, + { (void *) 18209, 395, NULL }, + { (void *) 18226, 395, NULL }, + { (void *) 18246, 396, NULL }, + { (void *) 18262, 396, NULL }, + { (void *) 18281, 397, NULL }, + { (void *) 18298, 397, NULL }, + { (void *) 18318, 398, NULL }, + { (void *) 18334, 398, NULL }, + { (void *) 18353, 399, NULL }, + { (void *) 18370, 399, NULL }, + { (void *) 18390, 400, NULL }, + { (void *) 18406, 400, NULL }, + { (void *) 18425, 401, NULL }, + { (void *) 18442, 401, NULL }, + { (void *) 18462, 402, NULL }, + { (void *) 18478, 402, NULL }, + { (void *) 18497, 403, NULL }, + { (void *) 18514, 403, NULL }, + { (void *) 18534, 404, NULL }, + { (void *) 18550, 404, NULL }, + { (void *) 18569, 405, NULL }, + { (void *) 18586, 405, NULL }, + { (void *) 18606, 406, NULL }, + { (void *) 18622, 406, NULL }, + { (void *) 18641, 407, NULL }, + { (void *) 18658, 407, NULL }, + { (void *) 18678, 1303, NULL }, + { (void *) 18694, 1303, NULL }, + { (void *) 18713, 738, NULL }, + { (void *) 18731, 739, NULL }, + { (void *) 18750, 740, NULL }, + { (void *) 18768, 741, NULL }, + { (void *) 18787, 742, NULL }, + { (void *) 18805, 743, NULL }, + { (void *) 18824, 744, NULL }, + { (void *) 18842, 745, NULL }, + { (void *) 18861, 974, NULL }, + { (void *) 18877, 975, NULL }, + { (void *) 18896, 976, NULL }, + { (void *) 18915, 977, NULL }, + { (void *) 18942, 978, NULL }, + { (void *) 18970, 979, NULL }, + { (void *) 18997, 980, NULL }, + { (void *) 19024, 981, NULL }, + { (void *) 19053, 982, NULL }, + { (void *) 19077, 983, NULL }, + { (void *) 19106, 984, NULL }, + { (void *) 19131, 985, NULL }, + { (void *) 19167, 0, NULL }, + { (void *) 19175, 52, NULL }, + { (void *) 19184, 53, NULL }, + { (void *) 19194, 54, NULL }, + { (void *) 19203, 55, NULL }, + { (void *) 19213, 56, NULL }, + { (void *) 19222, 57, NULL }, + { (void *) 19232, 58, NULL }, + { (void *) 19241, 59, NULL }, + { (void *) 19251, 60, NULL }, + { (void *) 19260, 61, NULL }, + { (void *) 19270, 1304, NULL }, + { (void *) 19279, 1304, NULL }, + { (void *) 19291, 746, NULL }, + { (void *) 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*) 19726, 425, NULL }, + { (void *) 19745, 425, NULL }, + { (void *) 19764, 425, NULL }, + { (void *) 19784, 426, NULL }, + { (void *) 19801, 426, NULL }, + { (void *) 19821, 426, NULL }, + { (void *) 19841, 426, NULL }, + { (void *) 19862, 427, NULL }, + { (void *) 19878, 427, NULL }, + { (void *) 19896, 428, NULL }, + { (void *) 19913, 428, NULL }, + { (void *) 19932, 1325, NULL }, + { (void *) 19948, 1325, NULL }, + { (void *) 19967, 1326, NULL }, + { (void *) 19984, 1326, NULL }, + { (void *) 20004, 173, NULL }, + { (void *) 20014, 1030, NULL }, + { (void *) 20034, 1307, NULL }, + { (void *) 20045, 1307, NULL }, + { (void *) 20059, 174, NULL }, + { (void *) 20071, 319, NULL }, + { (void *) 20085, 1278, NULL }, + { (void *) 20107, 1021, NULL }, + { (void *) 20124, 1308, NULL }, + { (void *) 20139, 1308, NULL }, + { (void *) 20157, 175, NULL }, + { (void *) 20172, 218, NULL }, + { (void *) 20182, 334, NULL }, + { (void *) 20198, 1111, NULL }, + { (void *) 20212, 1111, NULL }, + { (void *) 20229, 297, NULL }, + { (void *) 20239, 200, NULL }, + { (void *) 20247, 1329, NULL }, + { (void *) 20268, 1329, NULL }, + { (void *) 20292, 1329, NULL }, + { (void *) 20316, 1329, NULL }, + { (void *) 20340, 614, NULL }, + { (void *) 20362, 614, NULL }, + { (void *) 20386, 1213, NULL }, + { (void *) 20405, 331, NULL }, + { (void *) 20424, 331, NULL }, + { (void *) 20446, 819, NULL }, + { (void *) 20460, 819, NULL }, + { (void *) 20477, 632, NULL }, + { (void *) 20502, 633, NULL }, + { (void *) 20528, 634, NULL }, + { (void *) 20553, 635, NULL }, + { (void *) 20579, 1281, NULL }, + { (void *) 20606, 636, NULL }, + { (void *) 20633, 637, NULL }, + { (void *) 20661, 638, NULL }, + { (void *) 20688, 639, NULL }, + { (void *) 20716, 1282, NULL }, + { (void *) 20745, 1209, NULL }, + { (void *) 20771, 1210, NULL }, + { (void *) 20798, 1211, NULL }, + { (void *) 20824, 1212, NULL }, + { (void *) 20851, 632, NULL }, + { (void *) 20872, 633, NULL }, + { (void *) 20894, 634, NULL }, + { (void *) 20915, 635, NULL }, + { (void *) 20937, 820, NULL }, + { (void *) 20955, 820, NULL }, + { (void *) 20976, 1140, NULL }, + { (void *) 20999, 1141, NULL }, + { (void *) 21022, 640, NULL }, + { (void *) 21039, 1050, NULL }, + { (void *) 21056, 1051, NULL }, + { (void *) 21074, 1052, NULL }, + { (void *) 21091, 1052, NULL }, + { (void *) 21111, 1053, NULL }, + { (void *) 21129, 1053, NULL }, + { (void *) 21150, 1054, NULL }, + { (void *) 21167, 1054, NULL }, + { (void *) 21187, 1055, NULL }, + { (void *) 21205, 1055, NULL }, + { (void *) 21226, 1056, NULL }, + { (void *) 21244, 1056, NULL }, + { (void *) 21265, 1057, NULL }, + { (void *) 21284, 1057, NULL }, + { (void *) 21306, 1058, NULL }, + { (void *) 21323, 1059, NULL }, + { (void *) 21341, 1060, NULL }, + { (void *) 21358, 1060, NULL }, + { (void *) 21378, 1061, NULL }, + { (void *) 21396, 1061, NULL }, + { (void *) 21417, 1062, NULL }, + { (void *) 21434, 1062, NULL }, + { (void *) 21454, 1063, NULL }, + { (void *) 21472, 1063, NULL }, + { (void *) 21493, 1064, NULL }, + { (void *) 21511, 1064, NULL }, + { (void *) 21532, 1065, NULL }, + { (void *) 21551, 1065, NULL }, + { (void *) 21573, 1066, NULL }, + { (void *) 21590, 1067, NULL }, + { (void *) 21608, 1068, NULL }, + { (void *) 21625, 1068, NULL }, + { (void *) 21645, 1069, NULL }, + { (void *) 21663, 1069, NULL }, + { (void *) 21684, 1070, NULL }, + { (void *) 21701, 1070, NULL }, + { (void *) 21721, 1071, NULL }, + { (void *) 21739, 1071, NULL }, + { (void *) 21760, 1072, NULL }, + { (void *) 21778, 1072, NULL }, + { (void *) 21799, 1073, NULL }, + { (void *) 21818, 1073, NULL }, + { (void *) 21840, 1074, NULL }, + { (void *) 21857, 1075, NULL }, + { (void *) 21875, 1076, NULL }, + { (void *) 21892, 1076, NULL }, + { (void *) 21912, 1077, NULL }, + { (void *) 21930, 1077, NULL }, + { (void *) 21951, 1078, NULL }, + { (void *) 21968, 1078, NULL }, + { (void *) 21988, 1079, NULL }, + { (void *) 22006, 1079, NULL }, + { (void *) 22027, 1080, NULL }, + { (void *) 22045, 1080, NULL }, + { (void *) 22066, 1081, NULL }, + { (void *) 22085, 1081, NULL }, + { (void *) 22107, 1082, NULL }, + { (void *) 22131, 1083, NULL }, + { (void *) 22155, 1083, NULL }, + { (void *) 22182, 1084, NULL }, + { (void *) 22208, 1085, NULL }, + { (void *) 22234, 1085, NULL }, + { (void *) 22263, 1086, NULL }, + { (void *) 22289, 1087, NULL }, + { (void *) 22315, 1087, NULL }, + { (void *) 22344, 1088, NULL }, + { (void *) 22368, 1089, NULL }, + { (void *) 22392, 1089, NULL }, + { (void *) 22419, 1090, NULL }, + { (void *) 22445, 1091, NULL }, + { (void *) 22471, 1091, NULL }, + { (void *) 22500, 1092, NULL }, + { (void *) 22526, 1093, NULL }, + { (void *) 22552, 1093, NULL }, + { (void *) 22581, 1094, NULL }, + { (void *) 22605, 1095, NULL }, + { (void *) 22629, 1095, NULL }, + { (void *) 22656, 1096, NULL }, + { (void *) 22682, 1097, NULL }, + { (void *) 22708, 1097, NULL }, + { (void *) 22737, 1098, NULL }, + { (void *) 22763, 1099, NULL }, + { (void *) 22789, 1099, NULL }, + { (void *) 22818, 706, NULL }, + { (void *) 22834, 706, NULL }, + { (void *) 22853, 219, NULL }, + { (void *) 22864, 335, NULL }, + { (void *) 22881, 1112, NULL }, + { (void *) 22896, 1112, NULL }, + { (void *) 22914, 298, NULL }, + { (void *) 22925, 201, NULL }, + { (void *) 22934, 733, NULL }, + { (void *) 22947, 1031, NULL }, + { (void *) 22963, 62, NULL }, + { (void *) 22975, 63, NULL }, + { (void *) 22988, 64, NULL }, + { (void *) 23000, 65, NULL }, + { (void *) 23013, 66, NULL }, + { (void *) 23025, 67, NULL }, + { (void *) 23038, 68, NULL }, + { (void *) 23050, 69, NULL }, + { (void *) 23063, 70, NULL }, + { (void *) 23075, 71, NULL }, + { (void *) 23088, 72, NULL }, + { (void *) 23100, 73, NULL }, + { (void *) 23113, 74, NULL }, + { (void *) 23125, 75, NULL }, + { (void *) 23138, 76, NULL }, + { (void *) 23150, 77, NULL }, + { (void *) 23163, 78, NULL }, + { (void *) 23175, 79, NULL }, + { (void *) 23188, 80, NULL }, + { (void *) 23200, 81, NULL }, + { (void *) 23213, 82, NULL }, + { (void *) 23225, 83, NULL }, + { (void *) 23238, 84, NULL }, + { (void *) 23250, 85, NULL }, + { (void *) 23263, 254, NULL }, + { (void *) 23274, 254, NULL }, + { (void *) 23287, 256, NULL }, + { (void *) 23298, 860, NULL }, + { (void *) 23310, 860, NULL }, + { (void *) 23325, 860, NULL }, + { (void *) 23340, 86, NULL }, + { (void *) 23346, 87, NULL }, + { (void *) 23353, 88, NULL }, + { (void *) 23359, 89, NULL }, + { (void *) 23366, 90, NULL }, + { (void *) 23372, 91, NULL }, + { (void *) 23379, 92, NULL }, + { (void *) 23385, 93, NULL }, + { (void *) 23392, 816, NULL }, + { (void *) 23414, 196, NULL }, + { (void *) 23425, 679, NULL }, + { (void *) 23445, 679, NULL }, + { (void *) 23468, 680, NULL }, + { (void *) 23499, 680, NULL }, + { (void *) 23533, 679, NULL }, + { (void *) 23556, 1142, NULL }, + { (void *) 23582, 369, NULL }, + { (void *) 23597, 369, NULL }, + { (void *) 23615, 370, NULL }, + { (void *) 23627, 370, NULL }, + { (void *) 23642, 1118, NULL }, + { (void *) 23660, 808, NULL }, + { (void *) 23684, 299, NULL }, + { (void *) 23692, 300, NULL }, + { (void *) 23700, 1309, NULL }, + { (void *) 23708, 1309, NULL }, + { (void *) 23719, 419, NULL }, + { (void *) 23734, 419, NULL }, + { (void *) 23752, 1310, NULL }, + { (void *) 23768, 1310, NULL }, + { (void *) 23787, 1200, NULL }, + { (void *) 23800, 1032, NULL }, + { (void *) 23814, 1032, NULL }, + { (void *) 23829, 708, NULL }, + { (void *) 23841, 1033, NULL }, + { (void *) 23858, 1033, NULL }, + { (void *) 23876, 725, NULL }, + { (void *) 23896, 725, NULL }, + { (void *) 23919, 725, NULL }, + { (void *) 23942, 726, NULL }, + { (void *) 23963, 726, NULL }, + { (void *) 23987, 726, NULL }, + { (void *) 24011, 727, NULL }, + { (void *) 24029, 728, NULL }, + { (void *) 24048, 729, NULL }, + { (void *) 24066, 730, NULL }, + { (void *) 24085, 301, NULL }, + { (void *) 24092, 302, NULL }, + { (void *) 24099, 1311, NULL }, + { (void *) 24106, 1311, NULL }, + { (void *) 24116, 176, NULL }, + { (void *) 24124, 835, NULL }, + { (void *) 24138, 835, NULL }, + { (void *) 24155, 836, NULL }, + { (void *) 24170, 836, NULL }, + { (void *) 24188, 837, NULL }, + { (void *) 24204, 837, NULL }, + { (void *) 24223, 429, NULL }, + { (void *) 24240, 429, NULL }, + { (void *) 24260, 430, NULL }, + { (void *) 24278, 430, NULL }, + { (void *) 24299, 431, NULL }, + { (void *) 24316, 431, NULL }, + { (void *) 24336, 432, NULL }, + { (void *) 24354, 432, NULL }, + { (void *) 24375, 1113, NULL }, + { (void *) 24392, 1113, NULL }, + { (void *) 24412, 1114, NULL }, + { (void *) 24430, 1114, NULL }, + { (void *) 24451, 433, NULL }, + { (void *) 24468, 433, NULL }, + { (void *) 24488, 434, NULL }, + { (void *) 24506, 434, NULL }, + { (void *) 24527, 435, NULL }, + { (void *) 24544, 435, NULL }, + { (void *) 24564, 436, NULL }, + { (void *) 24582, 436, NULL }, + { (void *) 24603, 437, NULL }, + { (void *) 24621, 437, NULL }, + { (void *) 24642, 438, NULL }, + { (void *) 24661, 438, NULL }, + { (void *) 24683, 439, NULL }, + { (void *) 24701, 439, NULL }, + { (void *) 24722, 440, NULL }, + { (void *) 24741, 440, NULL }, + { (void *) 24763, 441, NULL }, + { (void *) 24781, 441, NULL }, + { (void *) 24802, 442, NULL }, + { (void *) 24821, 442, NULL }, + { (void *) 24843, 748, NULL }, + { (void *) 24862, 749, NULL }, + { (void *) 24882, 443, NULL }, + { (void *) 24904, 443, NULL }, + { (void *) 24929, 195, NULL }, + { (void *) 24942, 1250, NULL }, + { (void *) 24971, 360, NULL }, + { (void *) 24989, 360, NULL }, + { (void *) 25010, 1201, NULL }, + { (void *) 25039, 177, NULL }, + { (void *) 25050, 817, NULL }, + { (void *) 25063, 510, NULL }, + { (void *) 25076, 510, NULL }, + { (void *) 25092, 899, NULL }, + { (void *) 25118, 243, NULL }, + { (void *) 25130, 511, NULL }, + { (void *) 25150, 1280, NULL }, + { (void *) 25173, 209, NULL }, + { (void *) 25185, 512, NULL }, + { (void *) 25205, 244, NULL }, + { (void *) 25215, 513, NULL }, + { (void *) 25233, 513, NULL }, + { (void *) 25254, 1220, NULL }, + { (void *) 25274, 615, NULL }, + { (void *) 25284, 615, NULL }, + { (void *) 25297, 615, NULL }, + { (void *) 25310, 615, NULL }, + { (void *) 25323, 900, NULL }, + { (void *) 25338, 900, NULL }, + { (void *) 25356, 900, NULL }, + { (void *) 25374, 1186, NULL }, + { (void *) 25396, 1187, NULL }, + { (void *) 25418, 94, NULL }, + { (void *) 25429, 95, NULL }, + { (void *) 25441, 96, NULL }, + { (void *) 25452, 97, NULL }, + { (void *) 25464, 98, NULL }, + { (void *) 25475, 99, NULL }, + { (void *) 25487, 100, NULL }, + { (void *) 25498, 101, NULL }, + { (void *) 25510, 102, NULL }, + { (void *) 25521, 103, NULL }, + { (void *) 25533, 104, NULL }, + { (void *) 25544, 105, NULL }, + { (void *) 25556, 106, NULL }, + { (void *) 25567, 107, NULL }, + { (void *) 25579, 108, NULL }, + { (void *) 25590, 109, NULL }, + { (void *) 25602, 110, NULL }, + { (void *) 25613, 111, NULL }, + { (void *) 25625, 112, NULL }, + { (void *) 25636, 113, NULL }, + { (void *) 25648, 114, NULL }, + { (void *) 25659, 115, NULL }, + { (void *) 25671, 116, NULL }, + { (void *) 25682, 117, NULL }, + { (void *) 25694, 118, NULL }, + { (void *) 25705, 119, NULL }, + { (void *) 25717, 120, NULL }, + { (void *) 25728, 121, NULL }, + { (void *) 25740, 122, NULL }, + { (void *) 25751, 123, NULL }, + { (void *) 25763, 124, NULL }, + { (void *) 25774, 125, NULL }, + { (void *) 25786, 750, NULL }, + { (void *) 25799, 751, NULL }, + { (void *) 25813, 752, NULL }, + { (void *) 25826, 753, NULL }, + { (void *) 25840, 754, NULL }, + { (void *) 25853, 755, NULL }, + { (void *) 25867, 756, NULL }, + { (void *) 25880, 757, NULL }, + { (void *) 25894, 320, NULL }, + { (void *) 25910, 1038, NULL }, + { (void *) 25929, 184, NULL }, + { (void *) 25937, 185, NULL }, + { (void *) 25946, 186, NULL }, + { (void *) 25954, 187, NULL }, + { (void *) 25963, 1312, NULL }, + { (void *) 25971, 1312, NULL }, + { (void *) 25982, 1313, NULL }, + { (void *) 25991, 1313, NULL }, + { (void *) 26003, 188, NULL }, + { (void *) 26011, 189, NULL }, + { (void *) 26020, 190, NULL }, + { (void *) 26028, 190, NULL }, + { (void *) 26039, 191, NULL }, + { (void *) 26048, 191, NULL }, + { (void *) 26060, 192, NULL }, + { (void *) 26068, 192, NULL }, + { (void *) 26079, 193, NULL }, + { (void *) 26088, 193, NULL }, + { (void *) 26100, 1215, NULL }, + { (void *) 26111, 1216, NULL }, + { (void *) 26123, 182, NULL }, + { (void *) 26134, 183, NULL }, + { (void *) 26145, 709, NULL }, + { (void *) 26167, 371, NULL }, + { (void *) 26178, 371, NULL }, + { (void *) 26192, 710, NULL }, + { (void *) 26214, 371, NULL }, + { (void *) 26228, 596, NULL }, + { (void *) 26244, 596, NULL }, + { (void *) 26263, 596, NULL }, + { (void *) 26282, 597, NULL }, + { (void *) 26299, 597, NULL }, + { (void *) 26319, 597, NULL }, + { (void *) 26339, 178, NULL }, + { (void *) 26353, 179, NULL }, + { (void *) 26368, 180, NULL }, + { (void *) 26382, 181, NULL }, + { (void *) 26397, 1314, NULL }, + { (void *) 26411, 1314, NULL }, + { (void *) 26428, 1327, NULL }, + { (void *) 26443, 1327, NULL }, + { (void *) 26461, 870, NULL }, + { (void *) 26474, 871, NULL }, + { (void *) 26487, 901, NULL }, + { (void *) 26511, 872, NULL }, + { (void *) 26524, 902, NULL }, + { (void *) 26548, 902, NULL }, + { (void *) 26575, 332, NULL }, + { (void *) 26589, 332, NULL }, + { (void *) 26606, 333, NULL }, + { (void *) 26620, 333, NULL }, + { (void *) 26637, 372, NULL }, + { (void *) 26651, 372, NULL }, + { (void *) 26668, 372, NULL }, + { (void *) 26685, 1257, NULL }, + { (void *) 26700, 1257, NULL }, + { (void *) 26717, 986, NULL }, + { (void *) 26731, 987, NULL }, + { (void *) 26750, 988, NULL }, + { (void *) 26770, 989, NULL }, + { (void *) 26791, 990, NULL }, + { (void *) 26809, 991, NULL }, + { (void *) 26828, 992, NULL }, + { (void *) 26846, 993, NULL }, + { (void *) 26865, 994, NULL }, + { (void *) 26882, 873, NULL }, + { (void *) 26902, 995, NULL }, + { (void *) 26919, 874, NULL }, + { (void *) 26939, 996, NULL }, + { (void *) 26967, 997, NULL }, + { (void *) 26984, 875, NULL }, + { (void *) 27004, 998, NULL }, + { (void *) 27032, 999, NULL }, + { (void *) 27050, 1000, NULL }, + { (void *) 27068, 1001, NULL }, + { (void *) 27086, 881, NULL }, + { (void *) 27098, 1143, NULL }, + { (void *) 27112, 1002, NULL }, + { (void *) 27140, 1003, NULL }, + { (void *) 27169, 598, NULL }, + { (void *) 27195, 598, NULL }, + { (void *) 27224, 303, NULL }, + { (void *) 27235, 304, NULL }, + { (void *) 27246, 1315, NULL }, + { (void *) 27257, 1315, NULL }, + { (void *) 27271, 775, NULL }, + { (void *) 27281, 776, NULL }, + { (void *) 27292, 514, NULL }, + { (void *) 27302, 514, NULL }, + { (void *) 27315, 515, NULL }, + { (void *) 27326, 515, NULL }, + { (void *) 27340, 516, NULL }, + { (void *) 27350, 516, NULL }, + { (void *) 27363, 517, NULL }, + { (void *) 27374, 517, NULL }, + { (void *) 27388, 599, NULL }, + { (void *) 27399, 599, NULL }, + { (void *) 27413, 600, NULL }, + { (void *) 27425, 600, NULL }, + { (void *) 27440, 777, NULL }, + { (void *) 27450, 778, NULL }, + { (void *) 27461, 518, NULL }, + { (void *) 27471, 518, NULL }, + { (void *) 27484, 519, NULL }, + { (void *) 27495, 519, NULL }, + { (void *) 27509, 520, NULL }, + { (void *) 27519, 520, NULL }, + { (void *) 27532, 521, NULL }, + { (void *) 27543, 521, NULL }, + { (void *) 27557, 601, NULL }, + { (void *) 27568, 601, NULL }, + { (void *) 27582, 602, NULL }, + { (void *) 27594, 602, NULL }, + { (void *) 27609, 779, NULL }, + { (void *) 27619, 780, NULL }, + { (void *) 27630, 522, NULL }, + { (void *) 27640, 522, NULL }, + { (void *) 27653, 523, NULL }, + { (void *) 27664, 523, NULL }, + { (void *) 27678, 524, NULL }, + { (void *) 27688, 524, NULL }, + { (void *) 27701, 525, NULL }, + { (void *) 27712, 525, NULL }, + { (void *) 27726, 603, NULL }, + { (void *) 27737, 603, NULL }, + { (void *) 27751, 604, NULL }, + { (void *) 27763, 604, NULL }, + { (void *) 27778, 781, NULL }, + { (void *) 27788, 782, NULL }, + { (void *) 27799, 526, NULL }, + { (void *) 27809, 526, NULL }, + { (void *) 27822, 527, NULL }, + { (void *) 27833, 527, NULL }, + { (void *) 27847, 528, NULL }, + { (void *) 27857, 528, NULL }, + { (void *) 27870, 529, NULL }, + { (void *) 27881, 529, NULL }, + { (void *) 27895, 605, NULL }, + { (void *) 27906, 605, NULL }, + { (void *) 27920, 606, NULL }, + { (void *) 27932, 606, NULL }, + { (void *) 27947, 693, NULL }, + { (void *) 27967, 783, NULL }, + { (void *) 27984, 530, NULL }, + { (void *) 28001, 530, NULL }, + { (void *) 28021, 784, NULL }, + { (void *) 28040, 564, NULL }, + { (void *) 28059, 785, NULL }, + { (void *) 28078, 565, NULL }, + { (void *) 28097, 786, NULL }, + { (void *) 28114, 531, NULL }, + { (void *) 28131, 531, NULL }, + { (void *) 28151, 787, NULL }, + { (void *) 28170, 566, NULL }, + { (void *) 28189, 788, NULL }, + { (void *) 28208, 567, NULL }, + { (void *) 28227, 789, NULL }, + { (void *) 28244, 532, NULL }, + { (void *) 28261, 532, NULL }, + { (void *) 28281, 790, NULL }, + { (void *) 28300, 568, NULL }, + { (void *) 28319, 791, NULL }, + { (void *) 28338, 569, NULL }, + { (void *) 28357, 799, NULL }, + { (void *) 28379, 1100, NULL }, + { (void *) 28395, 478, NULL }, + { (void *) 28407, 478, NULL }, + { (void *) 28422, 478, NULL }, + { (void *) 28437, 1004, NULL }, + { (void *) 28454, 533, NULL }, + { (void *) 28465, 533, NULL }, + { (void *) 28485, 1101, NULL }, + { (void *) 28502, 1101, NULL }, + { (void *) 28522, 1256, NULL }, + { (void *) 28542, 1258, NULL }, + { (void *) 28554, 1259, NULL }, + { (void *) 28574, 1260, NULL }, + { (void *) 28586, 1261, NULL }, + { (void *) 28603, 1262, NULL }, + { (void *) 28622, 1263, NULL }, + { (void *) 28651, 1264, NULL }, + { (void *) 28679, 1265, NULL }, + { (void *) 28700, 1266, NULL }, + { (void *) 28721, 1267, NULL }, + { (void *) 28746, 534, NULL }, + { (void *) 28762, 534, NULL }, + { (void *) 28781, 1102, NULL }, + { (void *) 28805, 1102, NULL }, + { (void *) 28832, 126, NULL }, + { (void *) 28841, 127, NULL }, + { (void *) 28851, 128, NULL }, + { (void *) 28860, 129, NULL }, + { (void *) 28870, 130, NULL }, + { (void *) 28879, 131, NULL }, + { (void *) 28889, 132, NULL }, + { (void *) 28898, 133, NULL }, + { (void *) 28908, 134, NULL }, + { (void *) 28917, 135, NULL }, + { (void *) 28927, 136, NULL }, + { (void *) 28936, 137, NULL }, + { (void *) 28946, 138, NULL }, + { (void *) 28955, 139, NULL }, + { (void *) 28965, 140, NULL }, + { (void *) 28974, 141, NULL }, + { (void *) 28984, 142, NULL }, + { (void *) 28993, 143, NULL }, + { (void *) 29003, 144, NULL }, + { (void *) 29012, 145, NULL }, + { (void *) 29022, 146, NULL }, + { (void *) 29031, 147, NULL }, + { (void *) 29041, 148, NULL }, + { (void *) 29050, 149, NULL }, + { (void *) 29060, 1005, NULL }, + { (void *) 29085, 1006, NULL }, + { (void *) 29109, 1007, NULL }, + { (void *) 29134, 1008, NULL }, + { (void *) 29159, 1009, NULL }, + { (void *) 29185, 1010, NULL }, + { (void *) 29210, 1011, NULL }, + { (void *) 29234, 1012, NULL }, + { (void *) 29259, 535, NULL }, + { (void *) 29274, 535, NULL }, + { (void *) 29292, 1144, NULL }, + { (void *) 29309, 536, NULL }, + { (void *) 29325, 536, NULL }, + { (void *) 29344, 1145, NULL }, + { (void *) 29362, 641, NULL }, + { (void *) 29377, 641, NULL }, + { (void *) 29395, 1146, NULL }, + { (void *) 29412, 642, NULL }, + { (void *) 29428, 642, NULL }, + { (void *) 29447, 1147, NULL }, + { (void *) 29465, 537, NULL }, + { (void *) 29480, 537, NULL }, + { (void *) 29498, 1148, NULL }, + { (void *) 29515, 538, NULL }, + { (void *) 29531, 538, NULL }, + { (void *) 29550, 1149, NULL }, + { (void *) 29568, 539, NULL }, + { (void *) 29583, 539, NULL }, + { (void *) 29601, 1150, NULL }, + { (void *) 29618, 540, NULL }, + { (void *) 29634, 540, NULL }, + { (void *) 29653, 1151, NULL }, + { (void *) 29671, 643, NULL }, + { (void *) 29686, 643, NULL }, + { (void *) 29704, 1152, NULL }, + { (void *) 29721, 644, NULL }, + { (void *) 29737, 644, NULL }, + { (void *) 29756, 1153, NULL }, + { (void *) 29774, 541, NULL }, + { (void *) 29789, 541, NULL }, + { (void *) 29807, 1154, NULL }, + { (void *) 29824, 542, NULL }, + { (void *) 29840, 542, NULL }, + { (void *) 29859, 1155, NULL }, + { (void *) 29877, 543, NULL }, + { (void *) 29892, 543, NULL }, + { (void *) 29910, 1156, NULL }, + { (void *) 29927, 544, NULL }, + { (void *) 29943, 544, NULL }, + { (void *) 29962, 1157, NULL }, + { (void *) 29980, 645, NULL }, + { (void *) 29995, 645, NULL }, + { (void *) 30013, 1158, NULL }, + { (void *) 30030, 646, NULL }, + { (void *) 30046, 646, NULL }, + { (void *) 30065, 1159, NULL }, + { (void *) 30083, 545, NULL }, + { (void *) 30098, 545, NULL }, + { (void *) 30116, 1160, NULL }, + { (void *) 30133, 546, NULL }, + { (void *) 30149, 546, NULL }, + { (void *) 30168, 1161, NULL }, + { (void *) 30186, 547, NULL }, + { (void *) 30203, 547, NULL }, + { (void *) 30223, 548, NULL }, + { (void *) 30240, 548, NULL }, + { (void *) 30260, 549, NULL }, + { (void *) 30277, 549, NULL }, + { (void *) 30297, 550, NULL }, + { (void *) 30314, 550, NULL }, + { (void *) 30334, 551, NULL }, + { (void *) 30352, 551, NULL }, + { (void *) 30373, 552, NULL }, + { (void *) 30391, 552, NULL }, + { (void *) 30412, 553, NULL }, + { (void *) 30430, 553, NULL }, + { (void *) 30451, 554, NULL }, + { (void *) 30467, 554, NULL }, + { (void *) 30486, 555, NULL }, + { (void *) 30501, 555, NULL }, + { (void *) 30519, 1162, NULL }, + { (void *) 30536, 556, NULL }, + { (void *) 30552, 556, NULL }, + { (void *) 30571, 1163, NULL }, + { (void *) 30589, 647, NULL }, + { (void *) 30604, 647, NULL }, + { (void *) 30622, 1164, NULL }, + { (void *) 30639, 648, NULL }, + { (void *) 30655, 648, NULL }, + { (void *) 30674, 1165, NULL }, + { (void *) 30692, 557, NULL }, + { (void *) 30708, 557, NULL }, + { (void *) 30727, 558, NULL }, + { (void *) 30742, 558, NULL }, + { (void *) 30760, 1166, NULL }, + { (void *) 30777, 559, NULL }, + { (void *) 30793, 559, NULL }, + { (void *) 30812, 1167, NULL }, + { (void *) 30830, 1168, NULL }, + { (void *) 30848, 560, NULL }, + { (void *) 30865, 560, NULL }, + { (void *) 30885, 1169, NULL }, + { (void *) 30904, 561, NULL }, + { (void *) 30921, 561, NULL }, + { (void *) 30941, 562, NULL }, + { (void *) 30958, 562, NULL }, + { (void *) 30978, 883, NULL }, + { (void *) 30998, 619, NULL }, + { (void *) 31018, 619, NULL }, + { (void *) 31041, 884, NULL }, + { (void *) 31060, 1223, NULL }, + { (void *) 31076, 1223, NULL }, + { (void *) 31095, 607, NULL }, + { (void *) 31112, 607, NULL }, + { (void *) 31132, 1224, NULL }, + { (void *) 31149, 1224, NULL }, + { (void *) 31169, 608, NULL }, + { (void *) 31187, 608, NULL }, + { (void *) 31208, 1225, NULL }, + { (void *) 31224, 1225, NULL }, + { (void *) 31243, 1226, NULL }, + { (void *) 31260, 1226, NULL }, + { (void *) 31280, 1227, NULL }, + { (void *) 31297, 1227, NULL }, + { (void *) 31317, 1228, NULL }, + { (void *) 31335, 1228, NULL }, + { (void *) 31356, 1229, NULL }, + { (void *) 31372, 1229, NULL }, + { (void *) 31391, 1230, NULL }, + { (void *) 31408, 1230, NULL }, + { (void *) 31428, 1231, NULL }, + { (void *) 31445, 1231, NULL }, + { (void *) 31465, 1232, NULL }, + { (void *) 31483, 1232, NULL }, + { (void *) 31504, 609, NULL }, + { (void *) 31521, 609, NULL }, + { (void *) 31541, 1233, NULL }, + { (void *) 31557, 1233, NULL }, + { (void *) 31576, 1234, NULL }, + { (void *) 31593, 1234, NULL }, + { (void *) 31613, 610, NULL }, + { (void *) 31630, 610, NULL }, + { (void *) 31650, 611, NULL }, + { (void *) 31668, 611, NULL }, + { (void *) 31689, 1235, NULL }, + { (void *) 31706, 1235, NULL }, + { (void *) 31726, 1236, NULL }, + { (void *) 31744, 1236, NULL }, + { (void *) 31765, 612, NULL }, + { (void *) 31783, 612, NULL }, + { (void *) 31804, 885, NULL }, + { (void *) 31824, 613, NULL }, + { (void *) 31845, 613, NULL }, + { (void *) 31869, 822, NULL }, + { (void *) 31885, 823, NULL }, + { (void *) 31902, 824, NULL }, + { (void *) 31918, 825, NULL }, + { (void *) 31935, 826, NULL }, + { (void *) 31951, 827, NULL }, + { (void *) 31968, 828, NULL }, + { (void *) 31984, 829, NULL }, + { (void *) 32001, 886, NULL }, + { (void *) 32021, 830, NULL }, + { (void *) 32042, 758, NULL }, + { (void *) 32059, 759, NULL }, + { (void *) 32077, 760, NULL }, + { (void *) 32094, 761, NULL }, + { (void *) 32112, 762, NULL }, + { (void *) 32129, 763, NULL }, + { (void *) 32147, 764, NULL }, + { (void *) 32164, 765, NULL }, + { (void *) 32182, 563, NULL }, + { (void *) 32202, 563, NULL }, + { (void *) 32225, 1170, NULL }, + { (void *) 32247, 1171, NULL }, + { (void *) 32266, 1172, NULL }, + { (void *) 32285, 1173, NULL }, + { (void *) 32304, 1174, NULL }, + { (void *) 32323, 1175, NULL }, + { (void *) 32342, 1176, NULL }, + { (void *) 32361, 1177, NULL }, + { (void *) 32380, 1178, NULL }, + { (void *) 32399, 1179, NULL }, + { (void *) 32418, 1180, NULL }, + { (void *) 32437, 1181, NULL }, + { (void *) 32456, 1182, NULL }, + { (void *) 32475, 1183, NULL }, + { (void *) 32495, 887, NULL }, + { (void *) 32516, 766, NULL }, + { (void *) 32527, 767, NULL }, + { (void *) 32539, 768, NULL }, + { (void *) 32550, 769, NULL }, + { (void *) 32562, 770, NULL }, + { (void *) 32573, 771, NULL }, + { (void *) 32585, 321, NULL }, + { (void *) 32599, 1039, NULL }, + { (void *) 32616, 305, NULL }, + { (void *) 32625, 838, NULL }, + { (void *) 32640, 838, NULL }, + { (void *) 32658, 839, NULL }, + { (void *) 32675, 839, NULL }, + { (void *) 32695, 840, NULL }, + { (void *) 32713, 840, NULL }, + { (void *) 32734, 701, NULL }, + { (void *) 32743, 444, NULL }, + { (void *) 32755, 444, NULL }, + { (void *) 32770, 444, NULL }, + { (void *) 32786, 445, NULL }, + { (void *) 32799, 445, NULL }, + { (void *) 32815, 445, NULL }, + { (void *) 32832, 446, NULL }, + { (void *) 32844, 446, NULL }, + { (void *) 32859, 446, NULL }, + { (void *) 32875, 447, NULL }, + { (void *) 32888, 447, NULL }, + { (void *) 32904, 447, NULL }, + { (void *) 32921, 448, NULL }, + { (void *) 32933, 448, NULL }, + { (void *) 32948, 448, NULL }, + { (void *) 32964, 449, NULL }, + { (void *) 32977, 449, NULL }, + { (void *) 32993, 449, NULL }, + { (void *) 33010, 450, NULL }, + { (void *) 33022, 450, NULL }, + { (void *) 33037, 450, NULL }, + { (void *) 33053, 451, NULL }, + { (void *) 33066, 451, NULL }, + { (void *) 33082, 451, NULL }, + { (void *) 33099, 452, NULL }, + { (void *) 33111, 452, NULL }, + { (void *) 33126, 452, NULL }, + { (void *) 33142, 453, NULL }, + { (void *) 33155, 453, NULL }, + { (void *) 33171, 453, NULL }, + { (void *) 33188, 454, NULL }, + { (void *) 33200, 454, NULL }, + { (void *) 33215, 454, NULL }, + { (void *) 33231, 455, NULL }, + { (void *) 33244, 455, NULL }, + { (void *) 33260, 455, NULL }, + { (void *) 33277, 456, NULL }, + { (void *) 33289, 456, NULL }, + { (void *) 33304, 456, NULL }, + { (void *) 33320, 457, NULL }, + { (void *) 33333, 457, NULL }, + { (void *) 33349, 457, NULL }, + { (void *) 33366, 458, NULL }, + { (void *) 33378, 458, NULL }, + { (void *) 33393, 458, NULL }, + { (void *) 33409, 459, NULL }, + { (void *) 33422, 459, NULL }, + { (void *) 33438, 459, NULL }, + { (void *) 33455, 1119, NULL }, + { (void *) 33471, 1120, NULL }, + { (void *) 33488, 1121, NULL }, + { (void *) 33504, 1122, NULL }, + { (void *) 33521, 1123, NULL }, + { (void *) 33537, 1124, NULL }, + { (void *) 33554, 1125, NULL }, + { (void *) 33570, 1126, NULL }, + { (void *) 33587, 1279, NULL } }; #undef MAPI_TMP_PUBLIC_STUBS #endif /* MAPI_TMP_PUBLIC_STUBS */ @@ -22698,207 +22791,207 @@ ((void (APIENTRY *)(GLuint first, GLsizei count, const GLuint *buffers, const GLintptr *offsets, const GLsizei *strides)) _func)(first, count, buffers, offsets, strides); } -void APIENTRY shared_dispatch_stub_912(GLenum mode, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride) +void APIENTRY shared_dispatch_stub_912(GLuint num_groups_x, GLuint num_groups_y, GLuint num_groups_z, GLuint group_size_x, GLuint group_size_y, GLuint group_size_z) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[912]; - ((void (APIENTRY *)(GLenum mode, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride)) _func)(mode, indirect, drawcount, maxdrawcount, stride); + ((void (APIENTRY *)(GLuint num_groups_x, GLuint num_groups_y, GLuint num_groups_z, GLuint group_size_x, GLuint group_size_y, GLuint group_size_z)) _func)(num_groups_x, num_groups_y, num_groups_z, group_size_x, group_size_y, group_size_z); } -void APIENTRY shared_dispatch_stub_913(GLenum mode, GLenum type, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride) +void APIENTRY shared_dispatch_stub_913(GLenum mode, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[913]; - ((void (APIENTRY *)(GLenum mode, GLenum type, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride)) _func)(mode, type, indirect, drawcount, maxdrawcount, stride); + ((void (APIENTRY *)(GLenum mode, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride)) _func)(mode, indirect, drawcount, maxdrawcount, stride); } -void APIENTRY shared_dispatch_stub_914(GLenum origin, GLenum depth) +void APIENTRY shared_dispatch_stub_914(GLenum mode, GLenum type, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[914]; - ((void (APIENTRY *)(GLenum origin, GLenum depth)) _func)(origin, depth); + ((void (APIENTRY *)(GLenum mode, GLenum type, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride)) _func)(mode, type, indirect, drawcount, maxdrawcount, stride); } -void APIENTRY shared_dispatch_stub_915(GLuint unit, GLuint texture) +void APIENTRY shared_dispatch_stub_915(GLenum origin, GLenum depth) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[915]; - ((void (APIENTRY *)(GLuint unit, GLuint texture)) _func)(unit, texture); + ((void (APIENTRY *)(GLenum origin, GLenum depth)) _func)(origin, depth); } -void APIENTRY shared_dispatch_stub_916(GLuint readFramebuffer, GLuint drawFramebuffer, GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter) +void APIENTRY shared_dispatch_stub_916(GLuint unit, GLuint texture) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[916]; - ((void (APIENTRY *)(GLuint readFramebuffer, GLuint drawFramebuffer, GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter)) _func)(readFramebuffer, drawFramebuffer, srcX0, srcY0, srcX1, srcY1, dstX0, dstY0, dstX1, dstY1, mask, filter); + ((void (APIENTRY *)(GLuint unit, GLuint texture)) _func)(unit, texture); } -GLenum APIENTRY shared_dispatch_stub_917(GLuint framebuffer, GLenum target) +void APIENTRY shared_dispatch_stub_917(GLuint readFramebuffer, GLuint drawFramebuffer, GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[917]; - return ((GLenum (APIENTRY *)(GLuint framebuffer, GLenum target)) _func)(framebuffer, target); + ((void (APIENTRY *)(GLuint readFramebuffer, GLuint drawFramebuffer, GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter)) _func)(readFramebuffer, drawFramebuffer, srcX0, srcY0, srcX1, srcY1, dstX0, dstY0, dstX1, dstY1, mask, filter); } -void APIENTRY shared_dispatch_stub_918(GLuint buffer, GLenum internalformat, GLenum format, GLenum type, const GLvoid *data) +GLenum APIENTRY shared_dispatch_stub_918(GLuint framebuffer, GLenum target) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[918]; - ((void (APIENTRY *)(GLuint buffer, GLenum internalformat, GLenum format, GLenum type, const GLvoid *data)) _func)(buffer, internalformat, format, type, data); + return ((GLenum (APIENTRY *)(GLuint framebuffer, GLenum target)) _func)(framebuffer, target); } -void APIENTRY shared_dispatch_stub_919(GLuint buffer, GLenum internalformat, GLintptr offset, GLsizeiptr size, GLenum format, GLenum type, const GLvoid *data) +void APIENTRY shared_dispatch_stub_919(GLuint buffer, GLenum internalformat, GLenum format, GLenum type, const GLvoid *data) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[919]; - ((void (APIENTRY *)(GLuint buffer, GLenum internalformat, GLintptr offset, GLsizeiptr size, GLenum format, GLenum type, const GLvoid *data)) _func)(buffer, internalformat, offset, size, format, type, data); + ((void (APIENTRY *)(GLuint buffer, GLenum internalformat, GLenum format, GLenum type, const GLvoid *data)) _func)(buffer, internalformat, format, type, data); } -void APIENTRY shared_dispatch_stub_920(GLuint framebuffer, GLenum buffer, GLint drawbuffer, GLfloat depth, GLint stencil) +void APIENTRY shared_dispatch_stub_920(GLuint buffer, GLenum internalformat, GLintptr offset, GLsizeiptr size, GLenum format, GLenum type, const GLvoid *data) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[920]; - ((void (APIENTRY *)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, GLfloat depth, GLint stencil)) _func)(framebuffer, buffer, drawbuffer, depth, stencil); + ((void (APIENTRY *)(GLuint buffer, GLenum internalformat, GLintptr offset, GLsizeiptr size, GLenum format, GLenum type, const GLvoid *data)) _func)(buffer, internalformat, offset, size, format, type, data); } -void APIENTRY shared_dispatch_stub_921(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLfloat *value) +void APIENTRY shared_dispatch_stub_921(GLuint framebuffer, GLenum buffer, GLint drawbuffer, GLfloat depth, GLint stencil) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[921]; - ((void (APIENTRY *)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLfloat *value)) _func)(framebuffer, buffer, drawbuffer, value); + ((void (APIENTRY *)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, GLfloat depth, GLint stencil)) _func)(framebuffer, buffer, drawbuffer, depth, stencil); } -void APIENTRY shared_dispatch_stub_922(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLint *value) +void APIENTRY shared_dispatch_stub_922(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[922]; - ((void (APIENTRY *)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLint *value)) _func)(framebuffer, buffer, drawbuffer, value); + ((void (APIENTRY *)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLfloat *value)) _func)(framebuffer, buffer, drawbuffer, value); } -void APIENTRY shared_dispatch_stub_923(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLuint *value) +void APIENTRY shared_dispatch_stub_923(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLint *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[923]; - ((void (APIENTRY *)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLuint *value)) _func)(framebuffer, buffer, drawbuffer, value); + ((void (APIENTRY *)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLint *value)) _func)(framebuffer, buffer, drawbuffer, value); } -void APIENTRY shared_dispatch_stub_924(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLsizei imageSize, const GLvoid *data) +void APIENTRY shared_dispatch_stub_924(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLuint *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[924]; - ((void (APIENTRY *)(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLsizei imageSize, const GLvoid *data)) _func)(texture, level, xoffset, width, format, imageSize, data); + ((void (APIENTRY *)(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLuint *value)) _func)(framebuffer, buffer, drawbuffer, value); } -void APIENTRY shared_dispatch_stub_925(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const GLvoid *data) +void APIENTRY shared_dispatch_stub_925(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLsizei imageSize, const GLvoid *data) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[925]; - ((void (APIENTRY *)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const GLvoid *data)) _func)(texture, level, xoffset, yoffset, width, height, format, imageSize, data); + ((void (APIENTRY *)(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLsizei imageSize, const GLvoid *data)) _func)(texture, level, xoffset, width, format, imageSize, data); } -void APIENTRY shared_dispatch_stub_926(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid *data) +void APIENTRY shared_dispatch_stub_926(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const GLvoid *data) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[926]; - ((void (APIENTRY *)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid *data)) _func)(texture, level, xoffset, yoffset, zoffset, width, height, depth, format, imageSize, data); + ((void (APIENTRY *)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const GLvoid *data)) _func)(texture, level, xoffset, yoffset, width, height, format, imageSize, data); } -void APIENTRY shared_dispatch_stub_927(GLuint readBuffer, GLuint writeBuffer, GLintptr readOffset, GLintptr writeOffset, GLsizeiptr size) +void APIENTRY shared_dispatch_stub_927(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid *data) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[927]; - ((void (APIENTRY *)(GLuint readBuffer, GLuint writeBuffer, GLintptr readOffset, GLintptr writeOffset, GLsizeiptr size)) _func)(readBuffer, writeBuffer, readOffset, writeOffset, size); + ((void (APIENTRY *)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid *data)) _func)(texture, level, xoffset, yoffset, zoffset, width, height, depth, format, imageSize, data); } -void APIENTRY shared_dispatch_stub_928(GLuint texture, GLint level, GLint xoffset, GLint x, GLint y, GLsizei width) +void APIENTRY shared_dispatch_stub_928(GLuint readBuffer, GLuint writeBuffer, GLintptr readOffset, GLintptr writeOffset, GLsizeiptr size) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[928]; - ((void (APIENTRY *)(GLuint texture, GLint level, GLint xoffset, GLint x, GLint y, GLsizei width)) _func)(texture, level, xoffset, x, y, width); + ((void (APIENTRY *)(GLuint readBuffer, GLuint writeBuffer, GLintptr readOffset, GLintptr writeOffset, GLsizeiptr size)) _func)(readBuffer, writeBuffer, readOffset, writeOffset, size); } -void APIENTRY shared_dispatch_stub_929(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height) +void APIENTRY shared_dispatch_stub_929(GLuint texture, GLint level, GLint xoffset, GLint x, GLint y, GLsizei width) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[929]; - ((void (APIENTRY *)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height)) _func)(texture, level, xoffset, yoffset, x, y, width, height); + ((void (APIENTRY *)(GLuint texture, GLint level, GLint xoffset, GLint x, GLint y, GLsizei width)) _func)(texture, level, xoffset, x, y, width); } -void APIENTRY shared_dispatch_stub_930(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height) +void APIENTRY shared_dispatch_stub_930(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[930]; - ((void (APIENTRY *)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height)) _func)(texture, level, xoffset, yoffset, zoffset, x, y, width, height); + ((void (APIENTRY *)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height)) _func)(texture, level, xoffset, yoffset, x, y, width, height); } -void APIENTRY shared_dispatch_stub_931(GLsizei n, GLuint *buffers) +void APIENTRY shared_dispatch_stub_931(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[931]; - ((void (APIENTRY *)(GLsizei n, GLuint *buffers)) _func)(n, buffers); + ((void (APIENTRY *)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height)) _func)(texture, level, xoffset, yoffset, zoffset, x, y, width, height); } -void APIENTRY shared_dispatch_stub_932(GLsizei n, GLuint *framebuffers) +void APIENTRY shared_dispatch_stub_932(GLsizei n, GLuint *buffers) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[932]; - ((void (APIENTRY *)(GLsizei n, GLuint *framebuffers)) _func)(n, framebuffers); + ((void (APIENTRY *)(GLsizei n, GLuint *buffers)) _func)(n, buffers); } -void APIENTRY shared_dispatch_stub_933(GLsizei n, GLuint *pipelines) +void APIENTRY shared_dispatch_stub_933(GLsizei n, GLuint *framebuffers) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[933]; - ((void (APIENTRY *)(GLsizei n, GLuint *pipelines)) _func)(n, pipelines); + ((void (APIENTRY *)(GLsizei n, GLuint *framebuffers)) _func)(n, framebuffers); } -void APIENTRY shared_dispatch_stub_934(GLenum target, GLsizei n, GLuint *ids) +void APIENTRY shared_dispatch_stub_934(GLsizei n, GLuint *pipelines) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[934]; - ((void (APIENTRY *)(GLenum target, GLsizei n, GLuint *ids)) _func)(target, n, ids); + ((void (APIENTRY *)(GLsizei n, GLuint *pipelines)) _func)(n, pipelines); } -void APIENTRY shared_dispatch_stub_935(GLsizei n, GLuint *renderbuffers) +void APIENTRY shared_dispatch_stub_935(GLenum target, GLsizei n, GLuint *ids) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[935]; - ((void (APIENTRY *)(GLsizei n, GLuint *renderbuffers)) _func)(n, renderbuffers); + ((void (APIENTRY *)(GLenum target, GLsizei n, GLuint *ids)) _func)(target, n, ids); } -void APIENTRY shared_dispatch_stub_936(GLsizei n, GLuint *samplers) +void APIENTRY shared_dispatch_stub_936(GLsizei n, GLuint *renderbuffers) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[936]; - ((void (APIENTRY *)(GLsizei n, GLuint *samplers)) _func)(n, samplers); + ((void (APIENTRY *)(GLsizei n, GLuint *renderbuffers)) _func)(n, renderbuffers); } -void APIENTRY shared_dispatch_stub_937(GLenum target, GLsizei n, GLuint *textures) +void APIENTRY shared_dispatch_stub_937(GLsizei n, GLuint *samplers) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[937]; - ((void (APIENTRY *)(GLenum target, GLsizei n, GLuint *textures)) _func)(target, n, textures); + ((void (APIENTRY *)(GLsizei n, GLuint *samplers)) _func)(n, samplers); } -void APIENTRY shared_dispatch_stub_938(GLsizei n, GLuint *ids) +void APIENTRY shared_dispatch_stub_938(GLenum target, GLsizei n, GLuint *textures) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[938]; - ((void (APIENTRY *)(GLsizei n, GLuint *ids)) _func)(n, ids); + ((void (APIENTRY *)(GLenum target, GLsizei n, GLuint *textures)) _func)(target, n, textures); } -void APIENTRY shared_dispatch_stub_939(GLsizei n, GLuint *arrays) +void APIENTRY shared_dispatch_stub_939(GLsizei n, GLuint *ids) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[939]; - ((void (APIENTRY *)(GLsizei n, GLuint *arrays)) _func)(n, arrays); + ((void (APIENTRY *)(GLsizei n, GLuint *ids)) _func)(n, ids); } -void APIENTRY shared_dispatch_stub_940(GLuint vaobj, GLuint index) +void APIENTRY shared_dispatch_stub_940(GLsizei n, GLuint *arrays) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[940]; - ((void (APIENTRY *)(GLuint vaobj, GLuint index)) _func)(vaobj, index); + ((void (APIENTRY *)(GLsizei n, GLuint *arrays)) _func)(n, arrays); } void APIENTRY shared_dispatch_stub_941(GLuint vaobj, GLuint index) @@ -22908,81 +23001,81 @@ ((void (APIENTRY *)(GLuint vaobj, GLuint index)) _func)(vaobj, index); } -void APIENTRY shared_dispatch_stub_942(GLuint buffer, GLintptr offset, GLsizeiptr length) +void APIENTRY shared_dispatch_stub_942(GLuint vaobj, GLuint index) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[942]; - ((void (APIENTRY *)(GLuint buffer, GLintptr offset, GLsizeiptr length)) _func)(buffer, offset, length); + ((void (APIENTRY *)(GLuint vaobj, GLuint index)) _func)(vaobj, index); } -void APIENTRY shared_dispatch_stub_943(GLuint texture) +void APIENTRY shared_dispatch_stub_943(GLuint buffer, GLintptr offset, GLsizeiptr length) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[943]; - ((void (APIENTRY *)(GLuint texture)) _func)(texture); + ((void (APIENTRY *)(GLuint buffer, GLintptr offset, GLsizeiptr length)) _func)(buffer, offset, length); } -void APIENTRY shared_dispatch_stub_944(GLuint texture, GLint level, GLsizei bufSize, GLvoid *pixels) +void APIENTRY shared_dispatch_stub_944(GLuint texture) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[944]; - ((void (APIENTRY *)(GLuint texture, GLint level, GLsizei bufSize, GLvoid *pixels)) _func)(texture, level, bufSize, pixels); + ((void (APIENTRY *)(GLuint texture)) _func)(texture); } -void APIENTRY shared_dispatch_stub_945(GLuint buffer, GLenum pname, GLint64 *params) +void APIENTRY shared_dispatch_stub_945(GLuint texture, GLint level, GLsizei bufSize, GLvoid *pixels) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[945]; - ((void (APIENTRY *)(GLuint buffer, GLenum pname, GLint64 *params)) _func)(buffer, pname, params); + ((void (APIENTRY *)(GLuint texture, GLint level, GLsizei bufSize, GLvoid *pixels)) _func)(texture, level, bufSize, pixels); } -void APIENTRY shared_dispatch_stub_946(GLuint buffer, GLenum pname, GLint *params) +void APIENTRY shared_dispatch_stub_946(GLuint buffer, GLenum pname, GLint64 *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[946]; - ((void (APIENTRY *)(GLuint buffer, GLenum pname, GLint *params)) _func)(buffer, pname, params); + ((void (APIENTRY *)(GLuint buffer, GLenum pname, GLint64 *params)) _func)(buffer, pname, params); } -void APIENTRY shared_dispatch_stub_947(GLuint buffer, GLenum pname, GLvoid **params) +void APIENTRY shared_dispatch_stub_947(GLuint buffer, GLenum pname, GLint *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[947]; - ((void (APIENTRY *)(GLuint buffer, GLenum pname, GLvoid **params)) _func)(buffer, pname, params); + ((void (APIENTRY *)(GLuint buffer, GLenum pname, GLint *params)) _func)(buffer, pname, params); } -void APIENTRY shared_dispatch_stub_948(GLuint buffer, GLintptr offset, GLsizeiptr size, GLvoid *data) +void APIENTRY shared_dispatch_stub_948(GLuint buffer, GLenum pname, GLvoid **params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[948]; - ((void (APIENTRY *)(GLuint buffer, GLintptr offset, GLsizeiptr size, GLvoid *data)) _func)(buffer, offset, size, data); + ((void (APIENTRY *)(GLuint buffer, GLenum pname, GLvoid **params)) _func)(buffer, pname, params); } -void APIENTRY shared_dispatch_stub_949(GLuint framebuffer, GLenum attachment, GLenum pname, GLint *params) +void APIENTRY shared_dispatch_stub_949(GLuint buffer, GLintptr offset, GLsizeiptr size, GLvoid *data) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[949]; - ((void (APIENTRY *)(GLuint framebuffer, GLenum attachment, GLenum pname, GLint *params)) _func)(framebuffer, attachment, pname, params); + ((void (APIENTRY *)(GLuint buffer, GLintptr offset, GLsizeiptr size, GLvoid *data)) _func)(buffer, offset, size, data); } -void APIENTRY shared_dispatch_stub_950(GLuint framebuffer, GLenum pname, GLint *param) +void APIENTRY shared_dispatch_stub_950(GLuint framebuffer, GLenum attachment, GLenum pname, GLint *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[950]; - ((void (APIENTRY *)(GLuint framebuffer, GLenum pname, GLint *param)) _func)(framebuffer, pname, param); + ((void (APIENTRY *)(GLuint framebuffer, GLenum attachment, GLenum pname, GLint *params)) _func)(framebuffer, attachment, pname, params); } -void APIENTRY shared_dispatch_stub_951(GLuint renderbuffer, GLenum pname, GLint *params) +void APIENTRY shared_dispatch_stub_951(GLuint framebuffer, GLenum pname, GLint *param) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[951]; - ((void (APIENTRY *)(GLuint renderbuffer, GLenum pname, GLint *params)) _func)(renderbuffer, pname, params); + ((void (APIENTRY *)(GLuint framebuffer, GLenum pname, GLint *param)) _func)(framebuffer, pname, param); } -void APIENTRY shared_dispatch_stub_952(GLuint id, GLuint buffer, GLenum pname, GLintptr offset) +void APIENTRY shared_dispatch_stub_952(GLuint renderbuffer, GLenum pname, GLint *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[952]; - ((void (APIENTRY *)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset)) _func)(id, buffer, pname, offset); + ((void (APIENTRY *)(GLuint renderbuffer, GLenum pname, GLint *params)) _func)(renderbuffer, pname, params); } void APIENTRY shared_dispatch_stub_953(GLuint id, GLuint buffer, GLenum pname, GLintptr offset) @@ -23006,361 +23099,361 @@ ((void (APIENTRY *)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset)) _func)(id, buffer, pname, offset); } -void APIENTRY shared_dispatch_stub_956(GLuint texture, GLint level, GLenum format, GLenum type, GLsizei bufSize, GLvoid *pixels) +void APIENTRY shared_dispatch_stub_956(GLuint id, GLuint buffer, GLenum pname, GLintptr offset) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[956]; - ((void (APIENTRY *)(GLuint texture, GLint level, GLenum format, GLenum type, GLsizei bufSize, GLvoid *pixels)) _func)(texture, level, format, type, bufSize, pixels); + ((void (APIENTRY *)(GLuint id, GLuint buffer, GLenum pname, GLintptr offset)) _func)(id, buffer, pname, offset); } -void APIENTRY shared_dispatch_stub_957(GLuint texture, GLint level, GLenum pname, GLfloat *params) +void APIENTRY shared_dispatch_stub_957(GLuint texture, GLint level, GLenum format, GLenum type, GLsizei bufSize, GLvoid *pixels) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[957]; - ((void (APIENTRY *)(GLuint texture, GLint level, GLenum pname, GLfloat *params)) _func)(texture, level, pname, params); + ((void (APIENTRY *)(GLuint texture, GLint level, GLenum format, GLenum type, GLsizei bufSize, GLvoid *pixels)) _func)(texture, level, format, type, bufSize, pixels); } -void APIENTRY shared_dispatch_stub_958(GLuint texture, GLint level, GLenum pname, GLint *params) +void APIENTRY shared_dispatch_stub_958(GLuint texture, GLint level, GLenum pname, GLfloat *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[958]; - ((void (APIENTRY *)(GLuint texture, GLint level, GLenum pname, GLint *params)) _func)(texture, level, pname, params); + ((void (APIENTRY *)(GLuint texture, GLint level, GLenum pname, GLfloat *params)) _func)(texture, level, pname, params); } -void APIENTRY shared_dispatch_stub_959(GLuint texture, GLenum pname, GLint *params) +void APIENTRY shared_dispatch_stub_959(GLuint texture, GLint level, GLenum pname, GLint *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[959]; - ((void (APIENTRY *)(GLuint texture, GLenum pname, GLint *params)) _func)(texture, pname, params); + ((void (APIENTRY *)(GLuint texture, GLint level, GLenum pname, GLint *params)) _func)(texture, level, pname, params); } -void APIENTRY shared_dispatch_stub_960(GLuint texture, GLenum pname, GLuint *params) +void APIENTRY shared_dispatch_stub_960(GLuint texture, GLenum pname, GLint *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[960]; - ((void (APIENTRY *)(GLuint texture, GLenum pname, GLuint *params)) _func)(texture, pname, params); + ((void (APIENTRY *)(GLuint texture, GLenum pname, GLint *params)) _func)(texture, pname, params); } -void APIENTRY shared_dispatch_stub_961(GLuint texture, GLenum pname, GLfloat *params) +void APIENTRY shared_dispatch_stub_961(GLuint texture, GLenum pname, GLuint *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[961]; - ((void (APIENTRY *)(GLuint texture, GLenum pname, GLfloat *params)) _func)(texture, pname, params); + ((void (APIENTRY *)(GLuint texture, GLenum pname, GLuint *params)) _func)(texture, pname, params); } -void APIENTRY shared_dispatch_stub_962(GLuint texture, GLenum pname, GLint *params) +void APIENTRY shared_dispatch_stub_962(GLuint texture, GLenum pname, GLfloat *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[962]; - ((void (APIENTRY *)(GLuint texture, GLenum pname, GLint *params)) _func)(texture, pname, params); + ((void (APIENTRY *)(GLuint texture, GLenum pname, GLfloat *params)) _func)(texture, pname, params); } -void APIENTRY shared_dispatch_stub_963(GLuint xfb, GLenum pname, GLuint index, GLint64 *param) +void APIENTRY shared_dispatch_stub_963(GLuint texture, GLenum pname, GLint *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[963]; - ((void (APIENTRY *)(GLuint xfb, GLenum pname, GLuint index, GLint64 *param)) _func)(xfb, pname, index, param); + ((void (APIENTRY *)(GLuint texture, GLenum pname, GLint *params)) _func)(texture, pname, params); } -void APIENTRY shared_dispatch_stub_964(GLuint xfb, GLenum pname, GLuint index, GLint *param) +void APIENTRY shared_dispatch_stub_964(GLuint xfb, GLenum pname, GLuint index, GLint64 *param) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[964]; - ((void (APIENTRY *)(GLuint xfb, GLenum pname, GLuint index, GLint *param)) _func)(xfb, pname, index, param); + ((void (APIENTRY *)(GLuint xfb, GLenum pname, GLuint index, GLint64 *param)) _func)(xfb, pname, index, param); } -void APIENTRY shared_dispatch_stub_965(GLuint xfb, GLenum pname, GLint *param) +void APIENTRY shared_dispatch_stub_965(GLuint xfb, GLenum pname, GLuint index, GLint *param) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[965]; - ((void (APIENTRY *)(GLuint xfb, GLenum pname, GLint *param)) _func)(xfb, pname, param); + ((void (APIENTRY *)(GLuint xfb, GLenum pname, GLuint index, GLint *param)) _func)(xfb, pname, index, param); } -void APIENTRY shared_dispatch_stub_966(GLuint vaobj, GLuint index, GLenum pname, GLint64 *param) +void APIENTRY shared_dispatch_stub_966(GLuint xfb, GLenum pname, GLint *param) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[966]; - ((void (APIENTRY *)(GLuint vaobj, GLuint index, GLenum pname, GLint64 *param)) _func)(vaobj, index, pname, param); + ((void (APIENTRY *)(GLuint xfb, GLenum pname, GLint *param)) _func)(xfb, pname, param); } -void APIENTRY shared_dispatch_stub_967(GLuint vaobj, GLuint index, GLenum pname, GLint *param) +void APIENTRY shared_dispatch_stub_967(GLuint vaobj, GLuint index, GLenum pname, GLint64 *param) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[967]; - ((void (APIENTRY *)(GLuint vaobj, GLuint index, GLenum pname, GLint *param)) _func)(vaobj, index, pname, param); + ((void (APIENTRY *)(GLuint vaobj, GLuint index, GLenum pname, GLint64 *param)) _func)(vaobj, index, pname, param); } -void APIENTRY shared_dispatch_stub_968(GLuint vaobj, GLenum pname, GLint *param) +void APIENTRY shared_dispatch_stub_968(GLuint vaobj, GLuint index, GLenum pname, GLint *param) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[968]; - ((void (APIENTRY *)(GLuint vaobj, GLenum pname, GLint *param)) _func)(vaobj, pname, param); + ((void (APIENTRY *)(GLuint vaobj, GLuint index, GLenum pname, GLint *param)) _func)(vaobj, index, pname, param); } -void APIENTRY shared_dispatch_stub_969(GLuint framebuffer, GLsizei numAttachments, const GLenum *attachments) +void APIENTRY shared_dispatch_stub_969(GLuint vaobj, GLenum pname, GLint *param) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[969]; - ((void (APIENTRY *)(GLuint framebuffer, GLsizei numAttachments, const GLenum *attachments)) _func)(framebuffer, numAttachments, attachments); + ((void (APIENTRY *)(GLuint vaobj, GLenum pname, GLint *param)) _func)(vaobj, pname, param); } -void APIENTRY shared_dispatch_stub_970(GLuint framebuffer, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height) +void APIENTRY shared_dispatch_stub_970(GLuint framebuffer, GLsizei numAttachments, const GLenum *attachments) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[970]; - ((void (APIENTRY *)(GLuint framebuffer, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height)) _func)(framebuffer, numAttachments, attachments, x, y, width, height); + ((void (APIENTRY *)(GLuint framebuffer, GLsizei numAttachments, const GLenum *attachments)) _func)(framebuffer, numAttachments, attachments); } -GLvoid * APIENTRY shared_dispatch_stub_971(GLuint buffer, GLenum access) +void APIENTRY shared_dispatch_stub_971(GLuint framebuffer, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[971]; - return ((GLvoid * (APIENTRY *)(GLuint buffer, GLenum access)) _func)(buffer, access); + ((void (APIENTRY *)(GLuint framebuffer, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height)) _func)(framebuffer, numAttachments, attachments, x, y, width, height); } -GLvoid * APIENTRY shared_dispatch_stub_972(GLuint buffer, GLintptr offset, GLsizeiptr length, GLbitfield access) +GLvoid * APIENTRY shared_dispatch_stub_972(GLuint buffer, GLenum access) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[972]; - return ((GLvoid * (APIENTRY *)(GLuint buffer, GLintptr offset, GLsizeiptr length, GLbitfield access)) _func)(buffer, offset, length, access); + return ((GLvoid * (APIENTRY *)(GLuint buffer, GLenum access)) _func)(buffer, access); } -void APIENTRY shared_dispatch_stub_973(GLuint buffer, GLsizeiptr size, const GLvoid *data, GLenum usage) +GLvoid * APIENTRY shared_dispatch_stub_973(GLuint buffer, GLintptr offset, GLsizeiptr length, GLbitfield access) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[973]; - ((void (APIENTRY *)(GLuint buffer, GLsizeiptr size, const GLvoid *data, GLenum usage)) _func)(buffer, size, data, usage); + return ((GLvoid * (APIENTRY *)(GLuint buffer, GLintptr offset, GLsizeiptr length, GLbitfield access)) _func)(buffer, offset, length, access); } -void APIENTRY shared_dispatch_stub_974(GLuint buffer, GLsizeiptr size, const GLvoid *data, GLbitfield flags) +void APIENTRY shared_dispatch_stub_974(GLuint buffer, GLsizeiptr size, const GLvoid *data, GLenum usage) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[974]; - ((void (APIENTRY *)(GLuint buffer, GLsizeiptr size, const GLvoid *data, GLbitfield flags)) _func)(buffer, size, data, flags); + ((void (APIENTRY *)(GLuint buffer, GLsizeiptr size, const GLvoid *data, GLenum usage)) _func)(buffer, size, data, usage); } -void APIENTRY shared_dispatch_stub_975(GLuint buffer, GLintptr offset, GLsizeiptr size, const GLvoid *data) +void APIENTRY shared_dispatch_stub_975(GLuint buffer, GLsizeiptr size, const GLvoid *data, GLbitfield flags) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[975]; - ((void (APIENTRY *)(GLuint buffer, GLintptr offset, GLsizeiptr size, const GLvoid *data)) _func)(buffer, offset, size, data); + ((void (APIENTRY *)(GLuint buffer, GLsizeiptr size, const GLvoid *data, GLbitfield flags)) _func)(buffer, size, data, flags); } -void APIENTRY shared_dispatch_stub_976(GLuint framebuffer, GLenum buf) +void APIENTRY shared_dispatch_stub_976(GLuint buffer, GLintptr offset, GLsizeiptr size, const GLvoid *data) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[976]; - ((void (APIENTRY *)(GLuint framebuffer, GLenum buf)) _func)(framebuffer, buf); + ((void (APIENTRY *)(GLuint buffer, GLintptr offset, GLsizeiptr size, const GLvoid *data)) _func)(buffer, offset, size, data); } -void APIENTRY shared_dispatch_stub_977(GLuint framebuffer, GLsizei n, const GLenum *bufs) +void APIENTRY shared_dispatch_stub_977(GLuint framebuffer, GLenum buf) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[977]; - ((void (APIENTRY *)(GLuint framebuffer, GLsizei n, const GLenum *bufs)) _func)(framebuffer, n, bufs); + ((void (APIENTRY *)(GLuint framebuffer, GLenum buf)) _func)(framebuffer, buf); } -void APIENTRY shared_dispatch_stub_978(GLuint framebuffer, GLenum pname, GLint param) +void APIENTRY shared_dispatch_stub_978(GLuint framebuffer, GLsizei n, const GLenum *bufs) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[978]; - ((void (APIENTRY *)(GLuint framebuffer, GLenum pname, GLint param)) _func)(framebuffer, pname, param); + ((void (APIENTRY *)(GLuint framebuffer, GLsizei n, const GLenum *bufs)) _func)(framebuffer, n, bufs); } -void APIENTRY shared_dispatch_stub_979(GLuint framebuffer, GLenum buf) +void APIENTRY shared_dispatch_stub_979(GLuint framebuffer, GLenum pname, GLint param) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[979]; - ((void (APIENTRY *)(GLuint framebuffer, GLenum buf)) _func)(framebuffer, buf); + ((void (APIENTRY *)(GLuint framebuffer, GLenum pname, GLint param)) _func)(framebuffer, pname, param); } -void APIENTRY shared_dispatch_stub_980(GLuint framebuffer, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer) +void APIENTRY shared_dispatch_stub_980(GLuint framebuffer, GLenum buf) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[980]; - ((void (APIENTRY *)(GLuint framebuffer, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer)) _func)(framebuffer, attachment, renderbuffertarget, renderbuffer); + ((void (APIENTRY *)(GLuint framebuffer, GLenum buf)) _func)(framebuffer, buf); } -void APIENTRY shared_dispatch_stub_981(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level) +void APIENTRY shared_dispatch_stub_981(GLuint framebuffer, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[981]; - ((void (APIENTRY *)(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level)) _func)(framebuffer, attachment, texture, level); + ((void (APIENTRY *)(GLuint framebuffer, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer)) _func)(framebuffer, attachment, renderbuffertarget, renderbuffer); } -void APIENTRY shared_dispatch_stub_982(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level, GLint layer) +void APIENTRY shared_dispatch_stub_982(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[982]; - ((void (APIENTRY *)(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level, GLint layer)) _func)(framebuffer, attachment, texture, level, layer); + ((void (APIENTRY *)(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level)) _func)(framebuffer, attachment, texture, level); } -void APIENTRY shared_dispatch_stub_983(GLuint renderbuffer, GLenum internalformat, GLsizei width, GLsizei height) +void APIENTRY shared_dispatch_stub_983(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level, GLint layer) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[983]; - ((void (APIENTRY *)(GLuint renderbuffer, GLenum internalformat, GLsizei width, GLsizei height)) _func)(renderbuffer, internalformat, width, height); + ((void (APIENTRY *)(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level, GLint layer)) _func)(framebuffer, attachment, texture, level, layer); } -void APIENTRY shared_dispatch_stub_984(GLuint renderbuffer, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height) +void APIENTRY shared_dispatch_stub_984(GLuint renderbuffer, GLenum internalformat, GLsizei width, GLsizei height) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[984]; - ((void (APIENTRY *)(GLuint renderbuffer, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height)) _func)(renderbuffer, samples, internalformat, width, height); + ((void (APIENTRY *)(GLuint renderbuffer, GLenum internalformat, GLsizei width, GLsizei height)) _func)(renderbuffer, internalformat, width, height); } -void APIENTRY shared_dispatch_stub_985(GLuint texture, GLenum internalformat, GLuint buffer) +void APIENTRY shared_dispatch_stub_985(GLuint renderbuffer, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[985]; - ((void (APIENTRY *)(GLuint texture, GLenum internalformat, GLuint buffer)) _func)(texture, internalformat, buffer); + ((void (APIENTRY *)(GLuint renderbuffer, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height)) _func)(renderbuffer, samples, internalformat, width, height); } -void APIENTRY shared_dispatch_stub_986(GLuint texture, GLenum internalformat, GLuint buffer, GLintptr offset, GLsizeiptr size) +void APIENTRY shared_dispatch_stub_986(GLuint texture, GLenum internalformat, GLuint buffer) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[986]; - ((void (APIENTRY *)(GLuint texture, GLenum internalformat, GLuint buffer, GLintptr offset, GLsizeiptr size)) _func)(texture, internalformat, buffer, offset, size); + ((void (APIENTRY *)(GLuint texture, GLenum internalformat, GLuint buffer)) _func)(texture, internalformat, buffer); } -void APIENTRY shared_dispatch_stub_987(GLuint texture, GLenum pname, const GLint *params) +void APIENTRY shared_dispatch_stub_987(GLuint texture, GLenum internalformat, GLuint buffer, GLintptr offset, GLsizeiptr size) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[987]; - ((void (APIENTRY *)(GLuint texture, GLenum pname, const GLint *params)) _func)(texture, pname, params); + ((void (APIENTRY *)(GLuint texture, GLenum internalformat, GLuint buffer, GLintptr offset, GLsizeiptr size)) _func)(texture, internalformat, buffer, offset, size); } -void APIENTRY shared_dispatch_stub_988(GLuint texture, GLenum pname, const GLuint *params) +void APIENTRY shared_dispatch_stub_988(GLuint texture, GLenum pname, const GLint *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[988]; - ((void (APIENTRY *)(GLuint texture, GLenum pname, const GLuint *params)) _func)(texture, pname, params); + ((void (APIENTRY *)(GLuint texture, GLenum pname, const GLint *params)) _func)(texture, pname, params); } -void APIENTRY shared_dispatch_stub_989(GLuint texture, GLenum pname, GLfloat param) +void APIENTRY shared_dispatch_stub_989(GLuint texture, GLenum pname, const GLuint *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[989]; - ((void (APIENTRY *)(GLuint texture, GLenum pname, GLfloat param)) _func)(texture, pname, param); + ((void (APIENTRY *)(GLuint texture, GLenum pname, const GLuint *params)) _func)(texture, pname, params); } -void APIENTRY shared_dispatch_stub_990(GLuint texture, GLenum pname, const GLfloat *param) +void APIENTRY shared_dispatch_stub_990(GLuint texture, GLenum pname, GLfloat param) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[990]; - ((void (APIENTRY *)(GLuint texture, GLenum pname, const GLfloat *param)) _func)(texture, pname, param); + ((void (APIENTRY *)(GLuint texture, GLenum pname, GLfloat param)) _func)(texture, pname, param); } -void APIENTRY shared_dispatch_stub_991(GLuint texture, GLenum pname, GLint param) +void APIENTRY shared_dispatch_stub_991(GLuint texture, GLenum pname, const GLfloat *param) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[991]; - ((void (APIENTRY *)(GLuint texture, GLenum pname, GLint param)) _func)(texture, pname, param); + ((void (APIENTRY *)(GLuint texture, GLenum pname, const GLfloat *param)) _func)(texture, pname, param); } -void APIENTRY shared_dispatch_stub_992(GLuint texture, GLenum pname, const GLint *param) +void APIENTRY shared_dispatch_stub_992(GLuint texture, GLenum pname, GLint param) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[992]; - ((void (APIENTRY *)(GLuint texture, GLenum pname, const GLint *param)) _func)(texture, pname, param); + ((void (APIENTRY *)(GLuint texture, GLenum pname, GLint param)) _func)(texture, pname, param); } -void APIENTRY shared_dispatch_stub_993(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width) +void APIENTRY shared_dispatch_stub_993(GLuint texture, GLenum pname, const GLint *param) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[993]; - ((void (APIENTRY *)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width)) _func)(texture, levels, internalformat, width); + ((void (APIENTRY *)(GLuint texture, GLenum pname, const GLint *param)) _func)(texture, pname, param); } -void APIENTRY shared_dispatch_stub_994(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height) +void APIENTRY shared_dispatch_stub_994(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[994]; - ((void (APIENTRY *)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height)) _func)(texture, levels, internalformat, width, height); + ((void (APIENTRY *)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width)) _func)(texture, levels, internalformat, width); } -void APIENTRY shared_dispatch_stub_995(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations) +void APIENTRY shared_dispatch_stub_995(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[995]; - ((void (APIENTRY *)(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations)) _func)(texture, samples, internalformat, width, height, fixedsamplelocations); + ((void (APIENTRY *)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height)) _func)(texture, levels, internalformat, width, height); } -void APIENTRY shared_dispatch_stub_996(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth) +void APIENTRY shared_dispatch_stub_996(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[996]; - ((void (APIENTRY *)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth)) _func)(texture, levels, internalformat, width, height, depth); + ((void (APIENTRY *)(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations)) _func)(texture, samples, internalformat, width, height, fixedsamplelocations); } -void APIENTRY shared_dispatch_stub_997(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedsamplelocations) +void APIENTRY shared_dispatch_stub_997(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[997]; - ((void (APIENTRY *)(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedsamplelocations)) _func)(texture, samples, internalformat, width, height, depth, fixedsamplelocations); + ((void (APIENTRY *)(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth)) _func)(texture, levels, internalformat, width, height, depth); } -void APIENTRY shared_dispatch_stub_998(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLenum type, const GLvoid *pixels) +void APIENTRY shared_dispatch_stub_998(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedsamplelocations) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[998]; - ((void (APIENTRY *)(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLenum type, const GLvoid *pixels)) _func)(texture, level, xoffset, width, format, type, pixels); + ((void (APIENTRY *)(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedsamplelocations)) _func)(texture, samples, internalformat, width, height, depth, fixedsamplelocations); } -void APIENTRY shared_dispatch_stub_999(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid *pixels) +void APIENTRY shared_dispatch_stub_999(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLenum type, const GLvoid *pixels) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[999]; - ((void (APIENTRY *)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid *pixels)) _func)(texture, level, xoffset, yoffset, width, height, format, type, pixels); + ((void (APIENTRY *)(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLenum type, const GLvoid *pixels)) _func)(texture, level, xoffset, width, format, type, pixels); } -void APIENTRY shared_dispatch_stub_1000(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid *pixels) +void APIENTRY shared_dispatch_stub_1000(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid *pixels) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1000]; - ((void (APIENTRY *)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid *pixels)) _func)(texture, level, xoffset, yoffset, zoffset, width, height, depth, format, type, pixels); + ((void (APIENTRY *)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid *pixels)) _func)(texture, level, xoffset, yoffset, width, height, format, type, pixels); } -void APIENTRY shared_dispatch_stub_1001(GLuint xfb, GLuint index, GLuint buffer) +void APIENTRY shared_dispatch_stub_1001(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid *pixels) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1001]; - ((void (APIENTRY *)(GLuint xfb, GLuint index, GLuint buffer)) _func)(xfb, index, buffer); + ((void (APIENTRY *)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid *pixels)) _func)(texture, level, xoffset, yoffset, zoffset, width, height, depth, format, type, pixels); } -void APIENTRY shared_dispatch_stub_1002(GLuint xfb, GLuint index, GLuint buffer, GLintptr offset, GLsizeiptr size) +void APIENTRY shared_dispatch_stub_1002(GLuint xfb, GLuint index, GLuint buffer) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1002]; - ((void (APIENTRY *)(GLuint xfb, GLuint index, GLuint buffer, GLintptr offset, GLsizeiptr size)) _func)(xfb, index, buffer, offset, size); + ((void (APIENTRY *)(GLuint xfb, GLuint index, GLuint buffer)) _func)(xfb, index, buffer); } -GLboolean APIENTRY shared_dispatch_stub_1003(GLuint buffer) +void APIENTRY shared_dispatch_stub_1003(GLuint xfb, GLuint index, GLuint buffer, GLintptr offset, GLsizeiptr size) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1003]; - return ((GLboolean (APIENTRY *)(GLuint buffer)) _func)(buffer); + ((void (APIENTRY *)(GLuint xfb, GLuint index, GLuint buffer, GLintptr offset, GLsizeiptr size)) _func)(xfb, index, buffer, offset, size); } -void APIENTRY shared_dispatch_stub_1004(GLuint vaobj, GLuint attribindex, GLuint bindingindex) +GLboolean APIENTRY shared_dispatch_stub_1004(GLuint buffer) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1004]; - ((void (APIENTRY *)(GLuint vaobj, GLuint attribindex, GLuint bindingindex)) _func)(vaobj, attribindex, bindingindex); + return ((GLboolean (APIENTRY *)(GLuint buffer)) _func)(buffer); } -void APIENTRY shared_dispatch_stub_1005(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLboolean normalized, GLuint relativeoffset) +void APIENTRY shared_dispatch_stub_1005(GLuint vaobj, GLuint attribindex, GLuint bindingindex) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1005]; - ((void (APIENTRY *)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLboolean normalized, GLuint relativeoffset)) _func)(vaobj, attribindex, size, type, normalized, relativeoffset); + ((void (APIENTRY *)(GLuint vaobj, GLuint attribindex, GLuint bindingindex)) _func)(vaobj, attribindex, bindingindex); } -void APIENTRY shared_dispatch_stub_1006(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset) +void APIENTRY shared_dispatch_stub_1006(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLboolean normalized, GLuint relativeoffset) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1006]; - ((void (APIENTRY *)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset)) _func)(vaobj, attribindex, size, type, relativeoffset); + ((void (APIENTRY *)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLboolean normalized, GLuint relativeoffset)) _func)(vaobj, attribindex, size, type, normalized, relativeoffset); } void APIENTRY shared_dispatch_stub_1007(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset) @@ -23370,200 +23463,200 @@ ((void (APIENTRY *)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset)) _func)(vaobj, attribindex, size, type, relativeoffset); } -void APIENTRY shared_dispatch_stub_1008(GLuint vaobj, GLuint bindingindex, GLuint divisor) +void APIENTRY shared_dispatch_stub_1008(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1008]; - ((void (APIENTRY *)(GLuint vaobj, GLuint bindingindex, GLuint divisor)) _func)(vaobj, bindingindex, divisor); + ((void (APIENTRY *)(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset)) _func)(vaobj, attribindex, size, type, relativeoffset); } -void APIENTRY shared_dispatch_stub_1009(GLuint vaobj, GLuint buffer) +void APIENTRY shared_dispatch_stub_1009(GLuint vaobj, GLuint bindingindex, GLuint divisor) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1009]; - ((void (APIENTRY *)(GLuint vaobj, GLuint buffer)) _func)(vaobj, buffer); + ((void (APIENTRY *)(GLuint vaobj, GLuint bindingindex, GLuint divisor)) _func)(vaobj, bindingindex, divisor); } -void APIENTRY shared_dispatch_stub_1010(GLuint vaobj, GLuint bindingindex, GLuint buffer, GLintptr offset, GLsizei stride) +void APIENTRY shared_dispatch_stub_1010(GLuint vaobj, GLuint buffer) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1010]; - ((void (APIENTRY *)(GLuint vaobj, GLuint bindingindex, GLuint buffer, GLintptr offset, GLsizei stride)) _func)(vaobj, bindingindex, buffer, offset, stride); + ((void (APIENTRY *)(GLuint vaobj, GLuint buffer)) _func)(vaobj, buffer); } -void APIENTRY shared_dispatch_stub_1011(GLuint vaobj, GLuint first, GLsizei count, const GLuint *buffers, const GLintptr *offsets, const GLsizei *strides) +void APIENTRY shared_dispatch_stub_1011(GLuint vaobj, GLuint bindingindex, GLuint buffer, GLintptr offset, GLsizei stride) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1011]; - ((void (APIENTRY *)(GLuint vaobj, GLuint first, GLsizei count, const GLuint *buffers, const GLintptr *offsets, const GLsizei *strides)) _func)(vaobj, first, count, buffers, offsets, strides); + ((void (APIENTRY *)(GLuint vaobj, GLuint bindingindex, GLuint buffer, GLintptr offset, GLsizei stride)) _func)(vaobj, bindingindex, buffer, offset, stride); } -void APIENTRY shared_dispatch_stub_1012(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLsizei bufSize, GLvoid *pixels) +void APIENTRY shared_dispatch_stub_1012(GLuint vaobj, GLuint first, GLsizei count, const GLuint *buffers, const GLintptr *offsets, const GLsizei *strides) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1012]; - ((void (APIENTRY *)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLsizei bufSize, GLvoid *pixels)) _func)(texture, level, xoffset, yoffset, zoffset, width, height, depth, bufSize, pixels); + ((void (APIENTRY *)(GLuint vaobj, GLuint first, GLsizei count, const GLuint *buffers, const GLintptr *offsets, const GLsizei *strides)) _func)(vaobj, first, count, buffers, offsets, strides); } -void APIENTRY shared_dispatch_stub_1013(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, GLsizei bufSize, GLvoid *pixels) +void APIENTRY shared_dispatch_stub_1013(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLsizei bufSize, GLvoid *pixels) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1013]; - ((void (APIENTRY *)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, GLsizei bufSize, GLvoid *pixels)) _func)(texture, level, xoffset, yoffset, zoffset, width, height, depth, format, type, bufSize, pixels); + ((void (APIENTRY *)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLsizei bufSize, GLvoid *pixels)) _func)(texture, level, xoffset, yoffset, zoffset, width, height, depth, bufSize, pixels); } -void APIENTRY shared_dispatch_stub_1014(GLuint buffer) +void APIENTRY shared_dispatch_stub_1014(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, GLsizei bufSize, GLvoid *pixels) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1014]; - ((void (APIENTRY *)(GLuint buffer)) _func)(buffer); + ((void (APIENTRY *)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, GLsizei bufSize, GLvoid *pixels)) _func)(texture, level, xoffset, yoffset, zoffset, width, height, depth, format, type, bufSize, pixels); } -void APIENTRY shared_dispatch_stub_1015(GLuint buffer, GLintptr offset, GLsizeiptr length) +void APIENTRY shared_dispatch_stub_1015(GLuint buffer) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1015]; - ((void (APIENTRY *)(GLuint buffer, GLintptr offset, GLsizeiptr length)) _func)(buffer, offset, length); + ((void (APIENTRY *)(GLuint buffer)) _func)(buffer); } -void APIENTRY shared_dispatch_stub_1016(GLenum target, GLsizei numAttachments, const GLenum *attachments) +void APIENTRY shared_dispatch_stub_1016(GLuint buffer, GLintptr offset, GLsizeiptr length) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1016]; - ((void (APIENTRY *)(GLenum target, GLsizei numAttachments, const GLenum *attachments)) _func)(target, numAttachments, attachments); + ((void (APIENTRY *)(GLuint buffer, GLintptr offset, GLsizeiptr length)) _func)(buffer, offset, length); } -void APIENTRY shared_dispatch_stub_1017(GLenum target, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height) +void APIENTRY shared_dispatch_stub_1017(GLenum target, GLsizei numAttachments, const GLenum *attachments) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1017]; - ((void (APIENTRY *)(GLenum target, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height)) _func)(target, numAttachments, attachments, x, y, width, height); + ((void (APIENTRY *)(GLenum target, GLsizei numAttachments, const GLenum *attachments)) _func)(target, numAttachments, attachments); } -void APIENTRY shared_dispatch_stub_1018(GLuint texture, GLint level) +void APIENTRY shared_dispatch_stub_1018(GLenum target, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1018]; - ((void (APIENTRY *)(GLuint texture, GLint level)) _func)(texture, level); + ((void (APIENTRY *)(GLenum target, GLsizei numAttachments, const GLenum *attachments, GLint x, GLint y, GLsizei width, GLsizei height)) _func)(target, numAttachments, attachments, x, y, width, height); } -void APIENTRY shared_dispatch_stub_1019(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth) +void APIENTRY shared_dispatch_stub_1019(GLuint texture, GLint level) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1019]; - ((void (APIENTRY *)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth)) _func)(texture, level, xoffset, yoffset, zoffset, width, height, depth); + ((void (APIENTRY *)(GLuint texture, GLint level)) _func)(texture, level); } -void APIENTRY shared_dispatch_stub_1020(GLfloat factor, GLfloat bias) +void APIENTRY shared_dispatch_stub_1020(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1020]; - ((void (APIENTRY *)(GLfloat factor, GLfloat bias)) _func)(factor, bias); + ((void (APIENTRY *)(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth)) _func)(texture, level, xoffset, yoffset, zoffset, width, height, depth); } -void APIENTRY shared_dispatch_stub_1021(GLfloat x, GLfloat y, GLfloat z, GLfloat width, GLfloat height) +void APIENTRY shared_dispatch_stub_1021(GLfloat factor, GLfloat bias) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1021]; - ((void (APIENTRY *)(GLfloat x, GLfloat y, GLfloat z, GLfloat width, GLfloat height)) _func)(x, y, z, width, height); + ((void (APIENTRY *)(GLfloat factor, GLfloat bias)) _func)(factor, bias); } -void APIENTRY shared_dispatch_stub_1022(const GLfloat *coords) +void APIENTRY shared_dispatch_stub_1022(GLfloat x, GLfloat y, GLfloat z, GLfloat width, GLfloat height) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1022]; - ((void (APIENTRY *)(const GLfloat *coords)) _func)(coords); + ((void (APIENTRY *)(GLfloat x, GLfloat y, GLfloat z, GLfloat width, GLfloat height)) _func)(x, y, z, width, height); } -void APIENTRY shared_dispatch_stub_1023(GLint x, GLint y, GLint z, GLint width, GLint height) +void APIENTRY shared_dispatch_stub_1023(const GLfloat *coords) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1023]; - ((void (APIENTRY *)(GLint x, GLint y, GLint z, GLint width, GLint height)) _func)(x, y, z, width, height); + ((void (APIENTRY *)(const GLfloat *coords)) _func)(coords); } -void APIENTRY shared_dispatch_stub_1024(const GLint *coords) +void APIENTRY shared_dispatch_stub_1024(GLint x, GLint y, GLint z, GLint width, GLint height) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1024]; - ((void (APIENTRY *)(const GLint *coords)) _func)(coords); + ((void (APIENTRY *)(GLint x, GLint y, GLint z, GLint width, GLint height)) _func)(x, y, z, width, height); } -void APIENTRY shared_dispatch_stub_1025(GLshort x, GLshort y, GLshort z, GLshort width, GLshort height) +void APIENTRY shared_dispatch_stub_1025(const GLint *coords) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1025]; - ((void (APIENTRY *)(GLshort x, GLshort y, GLshort z, GLshort width, GLshort height)) _func)(x, y, z, width, height); + ((void (APIENTRY *)(const GLint *coords)) _func)(coords); } -void APIENTRY shared_dispatch_stub_1026(const GLshort *coords) +void APIENTRY shared_dispatch_stub_1026(GLshort x, GLshort y, GLshort z, GLshort width, GLshort height) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1026]; - ((void (APIENTRY *)(const GLshort *coords)) _func)(coords); + ((void (APIENTRY *)(GLshort x, GLshort y, GLshort z, GLshort width, GLshort height)) _func)(x, y, z, width, height); } -void APIENTRY shared_dispatch_stub_1027(GLfixed x, GLfixed y, GLfixed z, GLfixed width, GLfixed height) +void APIENTRY shared_dispatch_stub_1027(const GLshort *coords) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1027]; - ((void (APIENTRY *)(GLfixed x, GLfixed y, GLfixed z, GLfixed width, GLfixed height)) _func)(x, y, z, width, height); + ((void (APIENTRY *)(const GLshort *coords)) _func)(coords); } -void APIENTRY shared_dispatch_stub_1028(const GLfixed *coords) +void APIENTRY shared_dispatch_stub_1028(GLfixed x, GLfixed y, GLfixed z, GLfixed width, GLfixed height) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1028]; - ((void (APIENTRY *)(const GLfixed *coords)) _func)(coords); + ((void (APIENTRY *)(GLfixed x, GLfixed y, GLfixed z, GLfixed width, GLfixed height)) _func)(x, y, z, width, height); } -void APIENTRY shared_dispatch_stub_1029(GLenum type, GLsizei stride, const GLvoid *pointer) +void APIENTRY shared_dispatch_stub_1029(const GLfixed *coords) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1029]; - ((void (APIENTRY *)(GLenum type, GLsizei stride, const GLvoid *pointer)) _func)(type, stride, pointer); + ((void (APIENTRY *)(const GLfixed *coords)) _func)(coords); } -GLbitfield APIENTRY shared_dispatch_stub_1030(GLfixed *mantissa, GLint *exponent) +void APIENTRY shared_dispatch_stub_1030(GLenum type, GLsizei stride, const GLvoid *pointer) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1030]; - return ((GLbitfield (APIENTRY *)(GLfixed *mantissa, GLint *exponent)) _func)(mantissa, exponent); + ((void (APIENTRY *)(GLenum type, GLsizei stride, const GLvoid *pointer)) _func)(type, stride, pointer); } -void APIENTRY shared_dispatch_stub_1031(GLclampf value, GLboolean invert) +GLbitfield APIENTRY shared_dispatch_stub_1031(GLfixed *mantissa, GLint *exponent) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1031]; - ((void (APIENTRY *)(GLclampf value, GLboolean invert)) _func)(value, invert); + return ((GLbitfield (APIENTRY *)(GLfixed *mantissa, GLint *exponent)) _func)(mantissa, exponent); } -void APIENTRY shared_dispatch_stub_1032(GLenum pattern) +void APIENTRY shared_dispatch_stub_1032(GLclampf value, GLboolean invert) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1032]; - ((void (APIENTRY *)(GLenum pattern)) _func)(pattern); + ((void (APIENTRY *)(GLclampf value, GLboolean invert)) _func)(value, invert); } -void APIENTRY shared_dispatch_stub_1033(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer) +void APIENTRY shared_dispatch_stub_1033(GLenum pattern) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1033]; - ((void (APIENTRY *)(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer)) _func)(size, type, stride, count, pointer); + ((void (APIENTRY *)(GLenum pattern)) _func)(pattern); } -void APIENTRY shared_dispatch_stub_1034(GLsizei stride, GLsizei count, const GLboolean *pointer) +void APIENTRY shared_dispatch_stub_1034(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1034]; - ((void (APIENTRY *)(GLsizei stride, GLsizei count, const GLboolean *pointer)) _func)(stride, count, pointer); + ((void (APIENTRY *)(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer)) _func)(size, type, stride, count, pointer); } -void APIENTRY shared_dispatch_stub_1035(GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer) +void APIENTRY shared_dispatch_stub_1035(GLsizei stride, GLsizei count, const GLboolean *pointer) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1035]; - ((void (APIENTRY *)(GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer)) _func)(type, stride, count, pointer); + ((void (APIENTRY *)(GLsizei stride, GLsizei count, const GLboolean *pointer)) _func)(stride, count, pointer); } void APIENTRY shared_dispatch_stub_1036(GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer) @@ -23573,11 +23666,11 @@ ((void (APIENTRY *)(GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer)) _func)(type, stride, count, pointer); } -void APIENTRY shared_dispatch_stub_1037(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer) +void APIENTRY shared_dispatch_stub_1037(GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1037]; - ((void (APIENTRY *)(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer)) _func)(size, type, stride, count, pointer); + ((void (APIENTRY *)(GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer)) _func)(type, stride, count, pointer); } void APIENTRY shared_dispatch_stub_1038(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer) @@ -23587,1607 +23680,1607 @@ ((void (APIENTRY *)(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer)) _func)(size, type, stride, count, pointer); } -void APIENTRY shared_dispatch_stub_1039(GLenum target, GLsizei numAttachments, const GLenum *attachments) +void APIENTRY shared_dispatch_stub_1039(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1039]; - ((void (APIENTRY *)(GLenum target, GLsizei numAttachments, const GLenum *attachments)) _func)(target, numAttachments, attachments); + ((void (APIENTRY *)(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid *pointer)) _func)(size, type, stride, count, pointer); } -void APIENTRY shared_dispatch_stub_1040(GLuint pipeline, GLuint program) +void APIENTRY shared_dispatch_stub_1040(GLenum target, GLsizei numAttachments, const GLenum *attachments) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1040]; - ((void (APIENTRY *)(GLuint pipeline, GLuint program)) _func)(pipeline, program); + ((void (APIENTRY *)(GLenum target, GLsizei numAttachments, const GLenum *attachments)) _func)(target, numAttachments, attachments); } -void APIENTRY shared_dispatch_stub_1041(GLuint pipeline) +void APIENTRY shared_dispatch_stub_1041(GLuint pipeline, GLuint program) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1041]; - ((void (APIENTRY *)(GLuint pipeline)) _func)(pipeline); + ((void (APIENTRY *)(GLuint pipeline, GLuint program)) _func)(pipeline, program); } -GLuint APIENTRY shared_dispatch_stub_1042(GLenum type, GLsizei count, const GLchar * const *strings) +void APIENTRY shared_dispatch_stub_1042(GLuint pipeline) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1042]; - return ((GLuint (APIENTRY *)(GLenum type, GLsizei count, const GLchar * const *strings)) _func)(type, count, strings); + ((void (APIENTRY *)(GLuint pipeline)) _func)(pipeline); } -void APIENTRY shared_dispatch_stub_1043(GLsizei n, const GLuint *pipelines) +GLuint APIENTRY shared_dispatch_stub_1043(GLenum type, GLsizei count, const GLchar * const *strings) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1043]; - ((void (APIENTRY *)(GLsizei n, const GLuint *pipelines)) _func)(n, pipelines); + return ((GLuint (APIENTRY *)(GLenum type, GLsizei count, const GLchar * const *strings)) _func)(type, count, strings); } -void APIENTRY shared_dispatch_stub_1044(GLsizei n, GLuint *pipelines) +void APIENTRY shared_dispatch_stub_1044(GLsizei n, const GLuint *pipelines) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1044]; - ((void (APIENTRY *)(GLsizei n, GLuint *pipelines)) _func)(n, pipelines); + ((void (APIENTRY *)(GLsizei n, const GLuint *pipelines)) _func)(n, pipelines); } -void APIENTRY shared_dispatch_stub_1045(GLuint pipeline, GLsizei bufSize, GLsizei *length, GLchar *infoLog) +void APIENTRY shared_dispatch_stub_1045(GLsizei n, GLuint *pipelines) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1045]; - ((void (APIENTRY *)(GLuint pipeline, GLsizei bufSize, GLsizei *length, GLchar *infoLog)) _func)(pipeline, bufSize, length, infoLog); + ((void (APIENTRY *)(GLsizei n, GLuint *pipelines)) _func)(n, pipelines); } -void APIENTRY shared_dispatch_stub_1046(GLuint pipeline, GLenum pname, GLint *params) +void APIENTRY shared_dispatch_stub_1046(GLuint pipeline, GLsizei bufSize, GLsizei *length, GLchar *infoLog) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1046]; - ((void (APIENTRY *)(GLuint pipeline, GLenum pname, GLint *params)) _func)(pipeline, pname, params); + ((void (APIENTRY *)(GLuint pipeline, GLsizei bufSize, GLsizei *length, GLchar *infoLog)) _func)(pipeline, bufSize, length, infoLog); } -GLboolean APIENTRY shared_dispatch_stub_1047(GLuint pipeline) +void APIENTRY shared_dispatch_stub_1047(GLuint pipeline, GLenum pname, GLint *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1047]; - return ((GLboolean (APIENTRY *)(GLuint pipeline)) _func)(pipeline); + ((void (APIENTRY *)(GLuint pipeline, GLenum pname, GLint *params)) _func)(pipeline, pname, params); } -void APIENTRY shared_dispatch_stub_1048(GLint first, GLsizei count) +GLboolean APIENTRY shared_dispatch_stub_1048(GLuint pipeline) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1048]; - ((void (APIENTRY *)(GLint first, GLsizei count)) _func)(first, count); + return ((GLboolean (APIENTRY *)(GLuint pipeline)) _func)(pipeline); } -void APIENTRY shared_dispatch_stub_1049(GLuint program, GLint location, GLdouble x) +void APIENTRY shared_dispatch_stub_1049(GLint first, GLsizei count) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1049]; - ((void (APIENTRY *)(GLuint program, GLint location, GLdouble x)) _func)(program, location, x); + ((void (APIENTRY *)(GLint first, GLsizei count)) _func)(first, count); } -void APIENTRY shared_dispatch_stub_1050(GLuint program, GLint location, GLsizei count, const GLdouble *value) +void APIENTRY shared_dispatch_stub_1050(GLuint program, GLint location, GLdouble x) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1050]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLdouble *value)) _func)(program, location, count, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLdouble x)) _func)(program, location, x); } -void APIENTRY shared_dispatch_stub_1051(GLuint program, GLint location, GLfloat x) +void APIENTRY shared_dispatch_stub_1051(GLuint program, GLint location, GLsizei count, const GLdouble *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1051]; - ((void (APIENTRY *)(GLuint program, GLint location, GLfloat x)) _func)(program, location, x); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLdouble *value)) _func)(program, location, count, value); } -void APIENTRY shared_dispatch_stub_1052(GLuint program, GLint location, GLsizei count, const GLfloat *value) +void APIENTRY shared_dispatch_stub_1052(GLuint program, GLint location, GLfloat x) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1052]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLfloat *value)) _func)(program, location, count, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLfloat x)) _func)(program, location, x); } -void APIENTRY shared_dispatch_stub_1053(GLuint program, GLint location, GLint x) +void APIENTRY shared_dispatch_stub_1053(GLuint program, GLint location, GLsizei count, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1053]; - ((void (APIENTRY *)(GLuint program, GLint location, GLint x)) _func)(program, location, x); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLfloat *value)) _func)(program, location, count, value); } -void APIENTRY shared_dispatch_stub_1054(GLuint program, GLint location, GLsizei count, const GLint *value) +void APIENTRY shared_dispatch_stub_1054(GLuint program, GLint location, GLint x) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1054]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLint *value)) _func)(program, location, count, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLint x)) _func)(program, location, x); } -void APIENTRY shared_dispatch_stub_1055(GLuint program, GLint location, GLuint x) +void APIENTRY shared_dispatch_stub_1055(GLuint program, GLint location, GLsizei count, const GLint *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1055]; - ((void (APIENTRY *)(GLuint program, GLint location, GLuint x)) _func)(program, location, x); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLint *value)) _func)(program, location, count, value); } -void APIENTRY shared_dispatch_stub_1056(GLuint program, GLint location, GLsizei count, const GLuint *value) +void APIENTRY shared_dispatch_stub_1056(GLuint program, GLint location, GLuint x) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1056]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLuint *value)) _func)(program, location, count, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLuint x)) _func)(program, location, x); } -void APIENTRY shared_dispatch_stub_1057(GLuint program, GLint location, GLdouble x, GLdouble y) +void APIENTRY shared_dispatch_stub_1057(GLuint program, GLint location, GLsizei count, const GLuint *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1057]; - ((void (APIENTRY *)(GLuint program, GLint location, GLdouble x, GLdouble y)) _func)(program, location, x, y); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLuint *value)) _func)(program, location, count, value); } -void APIENTRY shared_dispatch_stub_1058(GLuint program, GLint location, GLsizei count, const GLdouble *value) +void APIENTRY shared_dispatch_stub_1058(GLuint program, GLint location, GLdouble x, GLdouble y) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1058]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLdouble *value)) _func)(program, location, count, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLdouble x, GLdouble y)) _func)(program, location, x, y); } -void APIENTRY shared_dispatch_stub_1059(GLuint program, GLint location, GLfloat x, GLfloat y) +void APIENTRY shared_dispatch_stub_1059(GLuint program, GLint location, GLsizei count, const GLdouble *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1059]; - ((void (APIENTRY *)(GLuint program, GLint location, GLfloat x, GLfloat y)) _func)(program, location, x, y); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLdouble *value)) _func)(program, location, count, value); } -void APIENTRY shared_dispatch_stub_1060(GLuint program, GLint location, GLsizei count, const GLfloat *value) +void APIENTRY shared_dispatch_stub_1060(GLuint program, GLint location, GLfloat x, GLfloat y) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1060]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLfloat *value)) _func)(program, location, count, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLfloat x, GLfloat y)) _func)(program, location, x, y); } -void APIENTRY shared_dispatch_stub_1061(GLuint program, GLint location, GLint x, GLint y) +void APIENTRY shared_dispatch_stub_1061(GLuint program, GLint location, GLsizei count, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1061]; - ((void (APIENTRY *)(GLuint program, GLint location, GLint x, GLint y)) _func)(program, location, x, y); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLfloat *value)) _func)(program, location, count, value); } -void APIENTRY shared_dispatch_stub_1062(GLuint program, GLint location, GLsizei count, const GLint *value) +void APIENTRY shared_dispatch_stub_1062(GLuint program, GLint location, GLint x, GLint y) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1062]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLint *value)) _func)(program, location, count, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLint x, GLint y)) _func)(program, location, x, y); } -void APIENTRY shared_dispatch_stub_1063(GLuint program, GLint location, GLuint x, GLuint y) +void APIENTRY shared_dispatch_stub_1063(GLuint program, GLint location, GLsizei count, const GLint *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1063]; - ((void (APIENTRY *)(GLuint program, GLint location, GLuint x, GLuint y)) _func)(program, location, x, y); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLint *value)) _func)(program, location, count, value); } -void APIENTRY shared_dispatch_stub_1064(GLuint program, GLint location, GLsizei count, const GLuint *value) +void APIENTRY shared_dispatch_stub_1064(GLuint program, GLint location, GLuint x, GLuint y) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1064]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLuint *value)) _func)(program, location, count, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLuint x, GLuint y)) _func)(program, location, x, y); } -void APIENTRY shared_dispatch_stub_1065(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z) +void APIENTRY shared_dispatch_stub_1065(GLuint program, GLint location, GLsizei count, const GLuint *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1065]; - ((void (APIENTRY *)(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z)) _func)(program, location, x, y, z); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLuint *value)) _func)(program, location, count, value); } -void APIENTRY shared_dispatch_stub_1066(GLuint program, GLint location, GLsizei count, const GLdouble *value) +void APIENTRY shared_dispatch_stub_1066(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1066]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLdouble *value)) _func)(program, location, count, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z)) _func)(program, location, x, y, z); } -void APIENTRY shared_dispatch_stub_1067(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z) +void APIENTRY shared_dispatch_stub_1067(GLuint program, GLint location, GLsizei count, const GLdouble *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1067]; - ((void (APIENTRY *)(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z)) _func)(program, location, x, y, z); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLdouble *value)) _func)(program, location, count, value); } -void APIENTRY shared_dispatch_stub_1068(GLuint program, GLint location, GLsizei count, const GLfloat *value) +void APIENTRY shared_dispatch_stub_1068(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1068]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLfloat *value)) _func)(program, location, count, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z)) _func)(program, location, x, y, z); } -void APIENTRY shared_dispatch_stub_1069(GLuint program, GLint location, GLint x, GLint y, GLint z) +void APIENTRY shared_dispatch_stub_1069(GLuint program, GLint location, GLsizei count, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1069]; - ((void (APIENTRY *)(GLuint program, GLint location, GLint x, GLint y, GLint z)) _func)(program, location, x, y, z); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLfloat *value)) _func)(program, location, count, value); } -void APIENTRY shared_dispatch_stub_1070(GLuint program, GLint location, GLsizei count, const GLint *value) +void APIENTRY shared_dispatch_stub_1070(GLuint program, GLint location, GLint x, GLint y, GLint z) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1070]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLint *value)) _func)(program, location, count, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLint x, GLint y, GLint z)) _func)(program, location, x, y, z); } -void APIENTRY shared_dispatch_stub_1071(GLuint program, GLint location, GLuint x, GLuint y, GLuint z) +void APIENTRY shared_dispatch_stub_1071(GLuint program, GLint location, GLsizei count, const GLint *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1071]; - ((void (APIENTRY *)(GLuint program, GLint location, GLuint x, GLuint y, GLuint z)) _func)(program, location, x, y, z); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLint *value)) _func)(program, location, count, value); } -void APIENTRY shared_dispatch_stub_1072(GLuint program, GLint location, GLsizei count, const GLuint *value) +void APIENTRY shared_dispatch_stub_1072(GLuint program, GLint location, GLuint x, GLuint y, GLuint z) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1072]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLuint *value)) _func)(program, location, count, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLuint x, GLuint y, GLuint z)) _func)(program, location, x, y, z); } -void APIENTRY shared_dispatch_stub_1073(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z, GLdouble w) +void APIENTRY shared_dispatch_stub_1073(GLuint program, GLint location, GLsizei count, const GLuint *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1073]; - ((void (APIENTRY *)(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z, GLdouble w)) _func)(program, location, x, y, z, w); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLuint *value)) _func)(program, location, count, value); } -void APIENTRY shared_dispatch_stub_1074(GLuint program, GLint location, GLsizei count, const GLdouble *value) +void APIENTRY shared_dispatch_stub_1074(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z, GLdouble w) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1074]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLdouble *value)) _func)(program, location, count, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z, GLdouble w)) _func)(program, location, x, y, z, w); } -void APIENTRY shared_dispatch_stub_1075(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z, GLfloat w) +void APIENTRY shared_dispatch_stub_1075(GLuint program, GLint location, GLsizei count, const GLdouble *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1075]; - ((void (APIENTRY *)(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z, GLfloat w)) _func)(program, location, x, y, z, w); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLdouble *value)) _func)(program, location, count, value); } -void APIENTRY shared_dispatch_stub_1076(GLuint program, GLint location, GLsizei count, const GLfloat *value) +void APIENTRY shared_dispatch_stub_1076(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z, GLfloat w) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1076]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLfloat *value)) _func)(program, location, count, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z, GLfloat w)) _func)(program, location, x, y, z, w); } -void APIENTRY shared_dispatch_stub_1077(GLuint program, GLint location, GLint x, GLint y, GLint z, GLint w) +void APIENTRY shared_dispatch_stub_1077(GLuint program, GLint location, GLsizei count, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1077]; - ((void (APIENTRY *)(GLuint program, GLint location, GLint x, GLint y, GLint z, GLint w)) _func)(program, location, x, y, z, w); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLfloat *value)) _func)(program, location, count, value); } -void APIENTRY shared_dispatch_stub_1078(GLuint program, GLint location, GLsizei count, const GLint *value) +void APIENTRY shared_dispatch_stub_1078(GLuint program, GLint location, GLint x, GLint y, GLint z, GLint w) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1078]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLint *value)) _func)(program, location, count, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLint x, GLint y, GLint z, GLint w)) _func)(program, location, x, y, z, w); } -void APIENTRY shared_dispatch_stub_1079(GLuint program, GLint location, GLuint x, GLuint y, GLuint z, GLuint w) +void APIENTRY shared_dispatch_stub_1079(GLuint program, GLint location, GLsizei count, const GLint *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1079]; - ((void (APIENTRY *)(GLuint program, GLint location, GLuint x, GLuint y, GLuint z, GLuint w)) _func)(program, location, x, y, z, w); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLint *value)) _func)(program, location, count, value); } -void APIENTRY shared_dispatch_stub_1080(GLuint program, GLint location, GLsizei count, const GLuint *value) +void APIENTRY shared_dispatch_stub_1080(GLuint program, GLint location, GLuint x, GLuint y, GLuint z, GLuint w) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1080]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLuint *value)) _func)(program, location, count, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLuint x, GLuint y, GLuint z, GLuint w)) _func)(program, location, x, y, z, w); } -void APIENTRY shared_dispatch_stub_1081(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value) +void APIENTRY shared_dispatch_stub_1081(GLuint program, GLint location, GLsizei count, const GLuint *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1081]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value)) _func)(program, location, count, transpose, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, const GLuint *value)) _func)(program, location, count, value); } -void APIENTRY shared_dispatch_stub_1082(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) +void APIENTRY shared_dispatch_stub_1082(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1082]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value)) _func)(program, location, count, transpose, value); } -void APIENTRY shared_dispatch_stub_1083(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value) +void APIENTRY shared_dispatch_stub_1083(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1083]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value)) _func)(program, location, count, transpose, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); } -void APIENTRY shared_dispatch_stub_1084(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) +void APIENTRY shared_dispatch_stub_1084(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1084]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value)) _func)(program, location, count, transpose, value); } -void APIENTRY shared_dispatch_stub_1085(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value) +void APIENTRY shared_dispatch_stub_1085(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1085]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value)) _func)(program, location, count, transpose, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); } -void APIENTRY shared_dispatch_stub_1086(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) +void APIENTRY shared_dispatch_stub_1086(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1086]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value)) _func)(program, location, count, transpose, value); } -void APIENTRY shared_dispatch_stub_1087(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value) +void APIENTRY shared_dispatch_stub_1087(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1087]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value)) _func)(program, location, count, transpose, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); } -void APIENTRY shared_dispatch_stub_1088(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) +void APIENTRY shared_dispatch_stub_1088(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1088]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value)) _func)(program, location, count, transpose, value); } -void APIENTRY shared_dispatch_stub_1089(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value) +void APIENTRY shared_dispatch_stub_1089(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1089]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value)) _func)(program, location, count, transpose, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); } -void APIENTRY shared_dispatch_stub_1090(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) +void APIENTRY shared_dispatch_stub_1090(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1090]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value)) _func)(program, location, count, transpose, value); } -void APIENTRY shared_dispatch_stub_1091(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value) +void APIENTRY shared_dispatch_stub_1091(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1091]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value)) _func)(program, location, count, transpose, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); } -void APIENTRY shared_dispatch_stub_1092(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) +void APIENTRY shared_dispatch_stub_1092(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1092]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value)) _func)(program, location, count, transpose, value); } -void APIENTRY shared_dispatch_stub_1093(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value) +void APIENTRY shared_dispatch_stub_1093(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1093]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value)) _func)(program, location, count, transpose, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); } -void APIENTRY shared_dispatch_stub_1094(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) +void APIENTRY shared_dispatch_stub_1094(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1094]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value)) _func)(program, location, count, transpose, value); } -void APIENTRY shared_dispatch_stub_1095(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value) +void APIENTRY shared_dispatch_stub_1095(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1095]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value)) _func)(program, location, count, transpose, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); } -void APIENTRY shared_dispatch_stub_1096(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) +void APIENTRY shared_dispatch_stub_1096(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1096]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value)) _func)(program, location, count, transpose, value); } -void APIENTRY shared_dispatch_stub_1097(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value) +void APIENTRY shared_dispatch_stub_1097(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1097]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value)) _func)(program, location, count, transpose, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); } -void APIENTRY shared_dispatch_stub_1098(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) +void APIENTRY shared_dispatch_stub_1098(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1098]; - ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble *value)) _func)(program, location, count, transpose, value); } -void APIENTRY shared_dispatch_stub_1099(void) +void APIENTRY shared_dispatch_stub_1099(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1099]; - ((void (APIENTRY *)(void)) _func)(); + ((void (APIENTRY *)(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat *value)) _func)(program, location, count, transpose, value); } -void APIENTRY shared_dispatch_stub_1100(GLuint pipeline, GLbitfield stages, GLuint program) +void APIENTRY shared_dispatch_stub_1100(void) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1100]; - ((void (APIENTRY *)(GLuint pipeline, GLbitfield stages, GLuint program)) _func)(pipeline, stages, program); + ((void (APIENTRY *)(void)) _func)(); } -void APIENTRY shared_dispatch_stub_1101(GLuint pipeline) +void APIENTRY shared_dispatch_stub_1101(GLuint pipeline, GLbitfield stages, GLuint program) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1101]; - ((void (APIENTRY *)(GLuint pipeline)) _func)(pipeline); + ((void (APIENTRY *)(GLuint pipeline, GLbitfield stages, GLuint program)) _func)(pipeline, stages, program); } -void APIENTRY shared_dispatch_stub_1102(GLDEBUGPROC callback, const GLvoid *userParam) +void APIENTRY shared_dispatch_stub_1102(GLuint pipeline) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1102]; - ((void (APIENTRY *)(GLDEBUGPROC callback, const GLvoid *userParam)) _func)(callback, userParam); + ((void (APIENTRY *)(GLuint pipeline)) _func)(pipeline); } -void APIENTRY shared_dispatch_stub_1103(GLenum source, GLenum type, GLenum severity, GLsizei count, const GLuint *ids, GLboolean enabled) +void APIENTRY shared_dispatch_stub_1103(GLDEBUGPROC callback, const GLvoid *userParam) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1103]; - ((void (APIENTRY *)(GLenum source, GLenum type, GLenum severity, GLsizei count, const GLuint *ids, GLboolean enabled)) _func)(source, type, severity, count, ids, enabled); + ((void (APIENTRY *)(GLDEBUGPROC callback, const GLvoid *userParam)) _func)(callback, userParam); } -void APIENTRY shared_dispatch_stub_1104(GLenum source, GLenum type, GLuint id, GLenum severity, GLsizei length, const GLchar *buf) +void APIENTRY shared_dispatch_stub_1104(GLenum source, GLenum type, GLenum severity, GLsizei count, const GLuint *ids, GLboolean enabled) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1104]; - ((void (APIENTRY *)(GLenum source, GLenum type, GLuint id, GLenum severity, GLsizei length, const GLchar *buf)) _func)(source, type, id, severity, length, buf); + ((void (APIENTRY *)(GLenum source, GLenum type, GLenum severity, GLsizei count, const GLuint *ids, GLboolean enabled)) _func)(source, type, severity, count, ids, enabled); } -GLuint APIENTRY shared_dispatch_stub_1105(GLuint count, GLsizei bufsize, GLenum *sources, GLenum *types, GLuint *ids, GLenum *severities, GLsizei *lengths, GLchar *messageLog) +void APIENTRY shared_dispatch_stub_1105(GLenum source, GLenum type, GLuint id, GLenum severity, GLsizei length, const GLchar *buf) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1105]; - return ((GLuint (APIENTRY *)(GLuint count, GLsizei bufsize, GLenum *sources, GLenum *types, GLuint *ids, GLenum *severities, GLsizei *lengths, GLchar *messageLog)) _func)(count, bufsize, sources, types, ids, severities, lengths, messageLog); + ((void (APIENTRY *)(GLenum source, GLenum type, GLuint id, GLenum severity, GLsizei length, const GLchar *buf)) _func)(source, type, id, severity, length, buf); } -void APIENTRY shared_dispatch_stub_1106(GLenum identifier, GLuint name, GLsizei bufSize, GLsizei *length, GLchar *label) +GLuint APIENTRY shared_dispatch_stub_1106(GLuint count, GLsizei bufsize, GLenum *sources, GLenum *types, GLuint *ids, GLenum *severities, GLsizei *lengths, GLchar *messageLog) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1106]; - ((void (APIENTRY *)(GLenum identifier, GLuint name, GLsizei bufSize, GLsizei *length, GLchar *label)) _func)(identifier, name, bufSize, length, label); + return ((GLuint (APIENTRY *)(GLuint count, GLsizei bufsize, GLenum *sources, GLenum *types, GLuint *ids, GLenum *severities, GLsizei *lengths, GLchar *messageLog)) _func)(count, bufsize, sources, types, ids, severities, lengths, messageLog); } -void APIENTRY shared_dispatch_stub_1107(const GLvoid *ptr, GLsizei bufSize, GLsizei *length, GLchar *label) +void APIENTRY shared_dispatch_stub_1107(GLenum identifier, GLuint name, GLsizei bufSize, GLsizei *length, GLchar *label) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1107]; - ((void (APIENTRY *)(const GLvoid *ptr, GLsizei bufSize, GLsizei *length, GLchar *label)) _func)(ptr, bufSize, length, label); + ((void (APIENTRY *)(GLenum identifier, GLuint name, GLsizei bufSize, GLsizei *length, GLchar *label)) _func)(identifier, name, bufSize, length, label); } -void APIENTRY shared_dispatch_stub_1108(GLenum identifier, GLuint name, GLsizei length, const GLchar *label) +void APIENTRY shared_dispatch_stub_1108(const GLvoid *ptr, GLsizei bufSize, GLsizei *length, GLchar *label) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1108]; - ((void (APIENTRY *)(GLenum identifier, GLuint name, GLsizei length, const GLchar *label)) _func)(identifier, name, length, label); + ((void (APIENTRY *)(const GLvoid *ptr, GLsizei bufSize, GLsizei *length, GLchar *label)) _func)(ptr, bufSize, length, label); } -void APIENTRY shared_dispatch_stub_1109(const GLvoid *ptr, GLsizei length, const GLchar *label) +void APIENTRY shared_dispatch_stub_1109(GLenum identifier, GLuint name, GLsizei length, const GLchar *label) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1109]; - ((void (APIENTRY *)(const GLvoid *ptr, GLsizei length, const GLchar *label)) _func)(ptr, length, label); + ((void (APIENTRY *)(GLenum identifier, GLuint name, GLsizei length, const GLchar *label)) _func)(identifier, name, length, label); } -void APIENTRY shared_dispatch_stub_1110(void) +void APIENTRY shared_dispatch_stub_1110(const GLvoid *ptr, GLsizei length, const GLchar *label) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1110]; - ((void (APIENTRY *)(void)) _func)(); + ((void (APIENTRY *)(const GLvoid *ptr, GLsizei length, const GLchar *label)) _func)(ptr, length, label); } -void APIENTRY shared_dispatch_stub_1111(GLenum source, GLuint id, GLsizei length, const GLchar *message) +void APIENTRY shared_dispatch_stub_1111(void) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1111]; - ((void (APIENTRY *)(GLenum source, GLuint id, GLsizei length, const GLchar *message)) _func)(source, id, length, message); + ((void (APIENTRY *)(void)) _func)(); } -void APIENTRY shared_dispatch_stub_1112(GLfloat red, GLfloat green, GLfloat blue) +void APIENTRY shared_dispatch_stub_1112(GLenum source, GLuint id, GLsizei length, const GLchar *message) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1112]; - ((void (APIENTRY *)(GLfloat red, GLfloat green, GLfloat blue)) _func)(red, green, blue); + ((void (APIENTRY *)(GLenum source, GLuint id, GLsizei length, const GLchar *message)) _func)(source, id, length, message); } -void APIENTRY shared_dispatch_stub_1113(const GLfloat *v) +void APIENTRY shared_dispatch_stub_1113(GLfloat red, GLfloat green, GLfloat blue) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1113]; - ((void (APIENTRY *)(const GLfloat *v)) _func)(v); + ((void (APIENTRY *)(GLfloat red, GLfloat green, GLfloat blue)) _func)(red, green, blue); } -void APIENTRY shared_dispatch_stub_1114(GLenum mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount) +void APIENTRY shared_dispatch_stub_1114(const GLfloat *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1114]; - ((void (APIENTRY *)(GLenum mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount)) _func)(mode, count, type, indices, primcount); + ((void (APIENTRY *)(const GLfloat *v)) _func)(v); } -void APIENTRY shared_dispatch_stub_1115(GLfloat coord) +void APIENTRY shared_dispatch_stub_1115(GLenum mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1115]; - ((void (APIENTRY *)(GLfloat coord)) _func)(coord); + ((void (APIENTRY *)(GLenum mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount)) _func)(mode, count, type, indices, primcount); } -void APIENTRY shared_dispatch_stub_1116(const GLfloat *coord) +void APIENTRY shared_dispatch_stub_1116(GLfloat coord) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1116]; - ((void (APIENTRY *)(const GLfloat *coord)) _func)(coord); + ((void (APIENTRY *)(GLfloat coord)) _func)(coord); } -void APIENTRY shared_dispatch_stub_1117(void) +void APIENTRY shared_dispatch_stub_1117(const GLfloat *coord) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1117]; - ((void (APIENTRY *)(void)) _func)(); + ((void (APIENTRY *)(const GLfloat *coord)) _func)(coord); } -void APIENTRY shared_dispatch_stub_1118(GLdouble x, GLdouble y, GLdouble z, GLdouble w) +void APIENTRY shared_dispatch_stub_1118(void) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1118]; - ((void (APIENTRY *)(GLdouble x, GLdouble y, GLdouble z, GLdouble w)) _func)(x, y, z, w); + ((void (APIENTRY *)(void)) _func)(); } -void APIENTRY shared_dispatch_stub_1119(const GLdouble *v) +void APIENTRY shared_dispatch_stub_1119(GLdouble x, GLdouble y, GLdouble z, GLdouble w) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1119]; - ((void (APIENTRY *)(const GLdouble *v)) _func)(v); + ((void (APIENTRY *)(GLdouble x, GLdouble y, GLdouble z, GLdouble w)) _func)(x, y, z, w); } -void APIENTRY shared_dispatch_stub_1120(GLfloat x, GLfloat y, GLfloat z, GLfloat w) +void APIENTRY shared_dispatch_stub_1120(const GLdouble *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1120]; - ((void (APIENTRY *)(GLfloat x, GLfloat y, GLfloat z, GLfloat w)) _func)(x, y, z, w); + ((void (APIENTRY *)(const GLdouble *v)) _func)(v); } -void APIENTRY shared_dispatch_stub_1121(const GLfloat *v) +void APIENTRY shared_dispatch_stub_1121(GLfloat x, GLfloat y, GLfloat z, GLfloat w) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1121]; - ((void (APIENTRY *)(const GLfloat *v)) _func)(v); + ((void (APIENTRY *)(GLfloat x, GLfloat y, GLfloat z, GLfloat w)) _func)(x, y, z, w); } -void APIENTRY shared_dispatch_stub_1122(GLint x, GLint y, GLint z, GLint w) +void APIENTRY shared_dispatch_stub_1122(const GLfloat *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1122]; - ((void (APIENTRY *)(GLint x, GLint y, GLint z, GLint w)) _func)(x, y, z, w); + ((void (APIENTRY *)(const GLfloat *v)) _func)(v); } -void APIENTRY shared_dispatch_stub_1123(const GLint *v) +void APIENTRY shared_dispatch_stub_1123(GLint x, GLint y, GLint z, GLint w) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1123]; - ((void (APIENTRY *)(const GLint *v)) _func)(v); + ((void (APIENTRY *)(GLint x, GLint y, GLint z, GLint w)) _func)(x, y, z, w); } -void APIENTRY shared_dispatch_stub_1124(GLshort x, GLshort y, GLshort z, GLshort w) +void APIENTRY shared_dispatch_stub_1124(const GLint *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1124]; - ((void (APIENTRY *)(GLshort x, GLshort y, GLshort z, GLshort w)) _func)(x, y, z, w); + ((void (APIENTRY *)(const GLint *v)) _func)(v); } -void APIENTRY shared_dispatch_stub_1125(const GLshort *v) +void APIENTRY shared_dispatch_stub_1125(GLshort x, GLshort y, GLshort z, GLshort w) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1125]; - ((void (APIENTRY *)(const GLshort *v)) _func)(v); + ((void (APIENTRY *)(GLshort x, GLshort y, GLshort z, GLshort w)) _func)(x, y, z, w); } -void APIENTRY shared_dispatch_stub_1126(const GLenum *mode, const GLint *first, const GLsizei *count, GLsizei primcount, GLint modestride) +void APIENTRY shared_dispatch_stub_1126(const GLshort *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1126]; - ((void (APIENTRY *)(const GLenum *mode, const GLint *first, const GLsizei *count, GLsizei primcount, GLint modestride)) _func)(mode, first, count, primcount, modestride); + ((void (APIENTRY *)(const GLshort *v)) _func)(v); } -void APIENTRY shared_dispatch_stub_1127(const GLenum *mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount, GLint modestride) +void APIENTRY shared_dispatch_stub_1127(const GLenum *mode, const GLint *first, const GLsizei *count, GLsizei primcount, GLint modestride) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1127]; - ((void (APIENTRY *)(const GLenum *mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount, GLint modestride)) _func)(mode, count, type, indices, primcount, modestride); + ((void (APIENTRY *)(const GLenum *mode, const GLint *first, const GLsizei *count, GLsizei primcount, GLint modestride)) _func)(mode, first, count, primcount, modestride); } -GLboolean APIENTRY shared_dispatch_stub_1128(GLsizei n, const GLuint *ids, GLboolean *residences) +void APIENTRY shared_dispatch_stub_1128(const GLenum *mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount, GLint modestride) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1128]; - return ((GLboolean (APIENTRY *)(GLsizei n, const GLuint *ids, GLboolean *residences)) _func)(n, ids, residences); + ((void (APIENTRY *)(const GLenum *mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, GLsizei primcount, GLint modestride)) _func)(mode, count, type, indices, primcount, modestride); } -void APIENTRY shared_dispatch_stub_1129(GLenum target, GLuint id, const GLfloat *params) +GLboolean APIENTRY shared_dispatch_stub_1129(GLsizei n, const GLuint *ids, GLboolean *residences) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1129]; - ((void (APIENTRY *)(GLenum target, GLuint id, const GLfloat *params)) _func)(target, id, params); + return ((GLboolean (APIENTRY *)(GLsizei n, const GLuint *ids, GLboolean *residences)) _func)(n, ids, residences); } -void APIENTRY shared_dispatch_stub_1130(GLenum target, GLuint index, GLenum pname, GLdouble *params) +void APIENTRY shared_dispatch_stub_1130(GLenum target, GLuint id, const GLfloat *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1130]; - ((void (APIENTRY *)(GLenum target, GLuint index, GLenum pname, GLdouble *params)) _func)(target, index, pname, params); + ((void (APIENTRY *)(GLenum target, GLuint id, const GLfloat *params)) _func)(target, id, params); } -void APIENTRY shared_dispatch_stub_1131(GLenum target, GLuint index, GLenum pname, GLfloat *params) +void APIENTRY shared_dispatch_stub_1131(GLenum target, GLuint index, GLenum pname, GLdouble *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1131]; - ((void (APIENTRY *)(GLenum target, GLuint index, GLenum pname, GLfloat *params)) _func)(target, index, pname, params); + ((void (APIENTRY *)(GLenum target, GLuint index, GLenum pname, GLdouble *params)) _func)(target, index, pname, params); } -void APIENTRY shared_dispatch_stub_1132(GLuint id, GLenum pname, GLubyte *program) +void APIENTRY shared_dispatch_stub_1132(GLenum target, GLuint index, GLenum pname, GLfloat *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1132]; - ((void (APIENTRY *)(GLuint id, GLenum pname, GLubyte *program)) _func)(id, pname, program); + ((void (APIENTRY *)(GLenum target, GLuint index, GLenum pname, GLfloat *params)) _func)(target, index, pname, params); } -void APIENTRY shared_dispatch_stub_1133(GLuint id, GLenum pname, GLint *params) +void APIENTRY shared_dispatch_stub_1133(GLuint id, GLenum pname, GLubyte *program) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1133]; - ((void (APIENTRY *)(GLuint id, GLenum pname, GLint *params)) _func)(id, pname, params); + ((void (APIENTRY *)(GLuint id, GLenum pname, GLubyte *program)) _func)(id, pname, program); } -void APIENTRY shared_dispatch_stub_1134(GLenum target, GLuint address, GLenum pname, GLint *params) +void APIENTRY shared_dispatch_stub_1134(GLuint id, GLenum pname, GLint *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1134]; - ((void (APIENTRY *)(GLenum target, GLuint address, GLenum pname, GLint *params)) _func)(target, address, pname, params); + ((void (APIENTRY *)(GLuint id, GLenum pname, GLint *params)) _func)(id, pname, params); } -void APIENTRY shared_dispatch_stub_1135(GLuint index, GLenum pname, GLdouble *params) +void APIENTRY shared_dispatch_stub_1135(GLenum target, GLuint address, GLenum pname, GLint *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1135]; - ((void (APIENTRY *)(GLuint index, GLenum pname, GLdouble *params)) _func)(index, pname, params); + ((void (APIENTRY *)(GLenum target, GLuint address, GLenum pname, GLint *params)) _func)(target, address, pname, params); } -void APIENTRY shared_dispatch_stub_1136(GLuint index, GLenum pname, GLfloat *params) +void APIENTRY shared_dispatch_stub_1136(GLuint index, GLenum pname, GLdouble *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1136]; - ((void (APIENTRY *)(GLuint index, GLenum pname, GLfloat *params)) _func)(index, pname, params); + ((void (APIENTRY *)(GLuint index, GLenum pname, GLdouble *params)) _func)(index, pname, params); } -void APIENTRY shared_dispatch_stub_1137(GLuint index, GLenum pname, GLint *params) +void APIENTRY shared_dispatch_stub_1137(GLuint index, GLenum pname, GLfloat *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1137]; - ((void (APIENTRY *)(GLuint index, GLenum pname, GLint *params)) _func)(index, pname, params); + ((void (APIENTRY *)(GLuint index, GLenum pname, GLfloat *params)) _func)(index, pname, params); } -void APIENTRY shared_dispatch_stub_1138(GLenum target, GLuint id, GLsizei len, const GLubyte *program) +void APIENTRY shared_dispatch_stub_1138(GLuint index, GLenum pname, GLint *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1138]; - ((void (APIENTRY *)(GLenum target, GLuint id, GLsizei len, const GLubyte *program)) _func)(target, id, len, program); + ((void (APIENTRY *)(GLuint index, GLenum pname, GLint *params)) _func)(index, pname, params); } -void APIENTRY shared_dispatch_stub_1139(GLenum target, GLuint index, GLsizei num, const GLdouble *params) +void APIENTRY shared_dispatch_stub_1139(GLenum target, GLuint id, GLsizei len, const GLubyte *program) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1139]; - ((void (APIENTRY *)(GLenum target, GLuint index, GLsizei num, const GLdouble *params)) _func)(target, index, num, params); + ((void (APIENTRY *)(GLenum target, GLuint id, GLsizei len, const GLubyte *program)) _func)(target, id, len, program); } -void APIENTRY shared_dispatch_stub_1140(GLenum target, GLuint index, GLsizei num, const GLfloat *params) +void APIENTRY shared_dispatch_stub_1140(GLenum target, GLuint index, GLsizei num, const GLdouble *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1140]; - ((void (APIENTRY *)(GLenum target, GLuint index, GLsizei num, const GLfloat *params)) _func)(target, index, num, params); + ((void (APIENTRY *)(GLenum target, GLuint index, GLsizei num, const GLdouble *params)) _func)(target, index, num, params); } -void APIENTRY shared_dispatch_stub_1141(GLsizei n, const GLuint *ids) +void APIENTRY shared_dispatch_stub_1141(GLenum target, GLuint index, GLsizei num, const GLfloat *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1141]; - ((void (APIENTRY *)(GLsizei n, const GLuint *ids)) _func)(n, ids); + ((void (APIENTRY *)(GLenum target, GLuint index, GLsizei num, const GLfloat *params)) _func)(target, index, num, params); } -void APIENTRY shared_dispatch_stub_1142(GLenum target, GLuint address, GLenum matrix, GLenum transform) +void APIENTRY shared_dispatch_stub_1142(GLsizei n, const GLuint *ids) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1142]; - ((void (APIENTRY *)(GLenum target, GLuint address, GLenum matrix, GLenum transform)) _func)(target, address, matrix, transform); + ((void (APIENTRY *)(GLsizei n, const GLuint *ids)) _func)(n, ids); } -void APIENTRY shared_dispatch_stub_1143(GLuint index, GLdouble x) +void APIENTRY shared_dispatch_stub_1143(GLenum target, GLuint address, GLenum matrix, GLenum transform) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1143]; - ((void (APIENTRY *)(GLuint index, GLdouble x)) _func)(index, x); + ((void (APIENTRY *)(GLenum target, GLuint address, GLenum matrix, GLenum transform)) _func)(target, address, matrix, transform); } -void APIENTRY shared_dispatch_stub_1144(GLuint index, const GLdouble *v) +void APIENTRY shared_dispatch_stub_1144(GLuint index, GLdouble x) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1144]; - ((void (APIENTRY *)(GLuint index, const GLdouble *v)) _func)(index, v); + ((void (APIENTRY *)(GLuint index, GLdouble x)) _func)(index, x); } -void APIENTRY shared_dispatch_stub_1145(GLuint index, GLfloat x) +void APIENTRY shared_dispatch_stub_1145(GLuint index, const GLdouble *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1145]; - ((void (APIENTRY *)(GLuint index, GLfloat x)) _func)(index, x); + ((void (APIENTRY *)(GLuint index, const GLdouble *v)) _func)(index, v); } -void APIENTRY shared_dispatch_stub_1146(GLuint index, const GLfloat *v) +void APIENTRY shared_dispatch_stub_1146(GLuint index, GLfloat x) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1146]; - ((void (APIENTRY *)(GLuint index, const GLfloat *v)) _func)(index, v); + ((void (APIENTRY *)(GLuint index, GLfloat x)) _func)(index, x); } -void APIENTRY shared_dispatch_stub_1147(GLuint index, GLshort x) +void APIENTRY shared_dispatch_stub_1147(GLuint index, const GLfloat *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1147]; - ((void (APIENTRY *)(GLuint index, GLshort x)) _func)(index, x); + ((void (APIENTRY *)(GLuint index, const GLfloat *v)) _func)(index, v); } -void APIENTRY shared_dispatch_stub_1148(GLuint index, const GLshort *v) +void APIENTRY shared_dispatch_stub_1148(GLuint index, GLshort x) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1148]; - ((void (APIENTRY *)(GLuint index, const GLshort *v)) _func)(index, v); + ((void (APIENTRY *)(GLuint index, GLshort x)) _func)(index, x); } -void APIENTRY shared_dispatch_stub_1149(GLuint index, GLdouble x, GLdouble y) +void APIENTRY shared_dispatch_stub_1149(GLuint index, const GLshort *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1149]; - ((void (APIENTRY *)(GLuint index, GLdouble x, GLdouble y)) _func)(index, x, y); + ((void (APIENTRY *)(GLuint index, const GLshort *v)) _func)(index, v); } -void APIENTRY shared_dispatch_stub_1150(GLuint index, const GLdouble *v) +void APIENTRY shared_dispatch_stub_1150(GLuint index, GLdouble x, GLdouble y) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1150]; - ((void (APIENTRY *)(GLuint index, const GLdouble *v)) _func)(index, v); + ((void (APIENTRY *)(GLuint index, GLdouble x, GLdouble y)) _func)(index, x, y); } -void APIENTRY shared_dispatch_stub_1151(GLuint index, GLfloat x, GLfloat y) +void APIENTRY shared_dispatch_stub_1151(GLuint index, const GLdouble *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1151]; - ((void (APIENTRY *)(GLuint index, GLfloat x, GLfloat y)) _func)(index, x, y); + ((void (APIENTRY *)(GLuint index, const GLdouble *v)) _func)(index, v); } -void APIENTRY shared_dispatch_stub_1152(GLuint index, const GLfloat *v) +void APIENTRY shared_dispatch_stub_1152(GLuint index, GLfloat x, GLfloat y) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1152]; - ((void (APIENTRY *)(GLuint index, const GLfloat *v)) _func)(index, v); + ((void (APIENTRY *)(GLuint index, GLfloat x, GLfloat y)) _func)(index, x, y); } -void APIENTRY shared_dispatch_stub_1153(GLuint index, GLshort x, GLshort y) +void APIENTRY shared_dispatch_stub_1153(GLuint index, const GLfloat *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1153]; - ((void (APIENTRY *)(GLuint index, GLshort x, GLshort y)) _func)(index, x, y); + ((void (APIENTRY *)(GLuint index, const GLfloat *v)) _func)(index, v); } -void APIENTRY shared_dispatch_stub_1154(GLuint index, const GLshort *v) +void APIENTRY shared_dispatch_stub_1154(GLuint index, GLshort x, GLshort y) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1154]; - ((void (APIENTRY *)(GLuint index, const GLshort *v)) _func)(index, v); + ((void (APIENTRY *)(GLuint index, GLshort x, GLshort y)) _func)(index, x, y); } -void APIENTRY shared_dispatch_stub_1155(GLuint index, GLdouble x, GLdouble y, GLdouble z) +void APIENTRY shared_dispatch_stub_1155(GLuint index, const GLshort *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1155]; - ((void (APIENTRY *)(GLuint index, GLdouble x, GLdouble y, GLdouble z)) _func)(index, x, y, z); + ((void (APIENTRY *)(GLuint index, const GLshort *v)) _func)(index, v); } -void APIENTRY shared_dispatch_stub_1156(GLuint index, const GLdouble *v) +void APIENTRY shared_dispatch_stub_1156(GLuint index, GLdouble x, GLdouble y, GLdouble z) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1156]; - ((void (APIENTRY *)(GLuint index, const GLdouble *v)) _func)(index, v); + ((void (APIENTRY *)(GLuint index, GLdouble x, GLdouble y, GLdouble z)) _func)(index, x, y, z); } -void APIENTRY shared_dispatch_stub_1157(GLuint index, GLfloat x, GLfloat y, GLfloat z) +void APIENTRY shared_dispatch_stub_1157(GLuint index, const GLdouble *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1157]; - ((void (APIENTRY *)(GLuint index, GLfloat x, GLfloat y, GLfloat z)) _func)(index, x, y, z); + ((void (APIENTRY *)(GLuint index, const GLdouble *v)) _func)(index, v); } -void APIENTRY shared_dispatch_stub_1158(GLuint index, const GLfloat *v) +void APIENTRY shared_dispatch_stub_1158(GLuint index, GLfloat x, GLfloat y, GLfloat z) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1158]; - ((void (APIENTRY *)(GLuint index, const GLfloat *v)) _func)(index, v); + ((void (APIENTRY *)(GLuint index, GLfloat x, GLfloat y, GLfloat z)) _func)(index, x, y, z); } -void APIENTRY shared_dispatch_stub_1159(GLuint index, GLshort x, GLshort y, GLshort z) +void APIENTRY shared_dispatch_stub_1159(GLuint index, const GLfloat *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1159]; - ((void (APIENTRY *)(GLuint index, GLshort x, GLshort y, GLshort z)) _func)(index, x, y, z); + ((void (APIENTRY *)(GLuint index, const GLfloat *v)) _func)(index, v); } -void APIENTRY shared_dispatch_stub_1160(GLuint index, const GLshort *v) +void APIENTRY shared_dispatch_stub_1160(GLuint index, GLshort x, GLshort y, GLshort z) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1160]; - ((void (APIENTRY *)(GLuint index, const GLshort *v)) _func)(index, v); + ((void (APIENTRY *)(GLuint index, GLshort x, GLshort y, GLshort z)) _func)(index, x, y, z); } -void APIENTRY shared_dispatch_stub_1161(GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w) +void APIENTRY shared_dispatch_stub_1161(GLuint index, const GLshort *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1161]; - ((void (APIENTRY *)(GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w)) _func)(index, x, y, z, w); + ((void (APIENTRY *)(GLuint index, const GLshort *v)) _func)(index, v); } -void APIENTRY shared_dispatch_stub_1162(GLuint index, const GLdouble *v) +void APIENTRY shared_dispatch_stub_1162(GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1162]; - ((void (APIENTRY *)(GLuint index, const GLdouble *v)) _func)(index, v); + ((void (APIENTRY *)(GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w)) _func)(index, x, y, z, w); } -void APIENTRY shared_dispatch_stub_1163(GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w) +void APIENTRY shared_dispatch_stub_1163(GLuint index, const GLdouble *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1163]; - ((void (APIENTRY *)(GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w)) _func)(index, x, y, z, w); + ((void (APIENTRY *)(GLuint index, const GLdouble *v)) _func)(index, v); } -void APIENTRY shared_dispatch_stub_1164(GLuint index, const GLfloat *v) +void APIENTRY shared_dispatch_stub_1164(GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1164]; - ((void (APIENTRY *)(GLuint index, const GLfloat *v)) _func)(index, v); + ((void (APIENTRY *)(GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w)) _func)(index, x, y, z, w); } -void APIENTRY shared_dispatch_stub_1165(GLuint index, GLshort x, GLshort y, GLshort z, GLshort w) +void APIENTRY shared_dispatch_stub_1165(GLuint index, const GLfloat *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1165]; - ((void (APIENTRY *)(GLuint index, GLshort x, GLshort y, GLshort z, GLshort w)) _func)(index, x, y, z, w); + ((void (APIENTRY *)(GLuint index, const GLfloat *v)) _func)(index, v); } -void APIENTRY shared_dispatch_stub_1166(GLuint index, const GLshort *v) +void APIENTRY shared_dispatch_stub_1166(GLuint index, GLshort x, GLshort y, GLshort z, GLshort w) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1166]; - ((void (APIENTRY *)(GLuint index, const GLshort *v)) _func)(index, v); + ((void (APIENTRY *)(GLuint index, GLshort x, GLshort y, GLshort z, GLshort w)) _func)(index, x, y, z, w); } -void APIENTRY shared_dispatch_stub_1167(GLuint index, GLubyte x, GLubyte y, GLubyte z, GLubyte w) +void APIENTRY shared_dispatch_stub_1167(GLuint index, const GLshort *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1167]; - ((void (APIENTRY *)(GLuint index, GLubyte x, GLubyte y, GLubyte z, GLubyte w)) _func)(index, x, y, z, w); + ((void (APIENTRY *)(GLuint index, const GLshort *v)) _func)(index, v); } -void APIENTRY shared_dispatch_stub_1168(GLuint index, const GLubyte *v) +void APIENTRY shared_dispatch_stub_1168(GLuint index, GLubyte x, GLubyte y, GLubyte z, GLubyte w) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1168]; - ((void (APIENTRY *)(GLuint index, const GLubyte *v)) _func)(index, v); + ((void (APIENTRY *)(GLuint index, GLubyte x, GLubyte y, GLubyte z, GLubyte w)) _func)(index, x, y, z, w); } -void APIENTRY shared_dispatch_stub_1169(GLuint index, GLint size, GLenum type, GLsizei stride, const GLvoid *pointer) +void APIENTRY shared_dispatch_stub_1169(GLuint index, const GLubyte *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1169]; - ((void (APIENTRY *)(GLuint index, GLint size, GLenum type, GLsizei stride, const GLvoid *pointer)) _func)(index, size, type, stride, pointer); + ((void (APIENTRY *)(GLuint index, const GLubyte *v)) _func)(index, v); } -void APIENTRY shared_dispatch_stub_1170(GLuint index, GLsizei n, const GLdouble *v) +void APIENTRY shared_dispatch_stub_1170(GLuint index, GLint size, GLenum type, GLsizei stride, const GLvoid *pointer) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1170]; - ((void (APIENTRY *)(GLuint index, GLsizei n, const GLdouble *v)) _func)(index, n, v); + ((void (APIENTRY *)(GLuint index, GLint size, GLenum type, GLsizei stride, const GLvoid *pointer)) _func)(index, size, type, stride, pointer); } -void APIENTRY shared_dispatch_stub_1171(GLuint index, GLsizei n, const GLfloat *v) +void APIENTRY shared_dispatch_stub_1171(GLuint index, GLsizei n, const GLdouble *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1171]; - ((void (APIENTRY *)(GLuint index, GLsizei n, const GLfloat *v)) _func)(index, n, v); + ((void (APIENTRY *)(GLuint index, GLsizei n, const GLdouble *v)) _func)(index, n, v); } -void APIENTRY shared_dispatch_stub_1172(GLuint index, GLsizei n, const GLshort *v) +void APIENTRY shared_dispatch_stub_1172(GLuint index, GLsizei n, const GLfloat *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1172]; - ((void (APIENTRY *)(GLuint index, GLsizei n, const GLshort *v)) _func)(index, n, v); + ((void (APIENTRY *)(GLuint index, GLsizei n, const GLfloat *v)) _func)(index, n, v); } -void APIENTRY shared_dispatch_stub_1173(GLuint index, GLsizei n, const GLdouble *v) +void APIENTRY shared_dispatch_stub_1173(GLuint index, GLsizei n, const GLshort *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1173]; - ((void (APIENTRY *)(GLuint index, GLsizei n, const GLdouble *v)) _func)(index, n, v); + ((void (APIENTRY *)(GLuint index, GLsizei n, const GLshort *v)) _func)(index, n, v); } -void APIENTRY shared_dispatch_stub_1174(GLuint index, GLsizei n, const GLfloat *v) +void APIENTRY shared_dispatch_stub_1174(GLuint index, GLsizei n, const GLdouble *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1174]; - ((void (APIENTRY *)(GLuint index, GLsizei n, const GLfloat *v)) _func)(index, n, v); + ((void (APIENTRY *)(GLuint index, GLsizei n, const GLdouble *v)) _func)(index, n, v); } -void APIENTRY shared_dispatch_stub_1175(GLuint index, GLsizei n, const GLshort *v) +void APIENTRY shared_dispatch_stub_1175(GLuint index, GLsizei n, const GLfloat *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1175]; - ((void (APIENTRY *)(GLuint index, GLsizei n, const GLshort *v)) _func)(index, n, v); + ((void (APIENTRY *)(GLuint index, GLsizei n, const GLfloat *v)) _func)(index, n, v); } -void APIENTRY shared_dispatch_stub_1176(GLuint index, GLsizei n, const GLdouble *v) +void APIENTRY shared_dispatch_stub_1176(GLuint index, GLsizei n, const GLshort *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1176]; - ((void (APIENTRY *)(GLuint index, GLsizei n, const GLdouble *v)) _func)(index, n, v); + ((void (APIENTRY *)(GLuint index, GLsizei n, const GLshort *v)) _func)(index, n, v); } -void APIENTRY shared_dispatch_stub_1177(GLuint index, GLsizei n, const GLfloat *v) +void APIENTRY shared_dispatch_stub_1177(GLuint index, GLsizei n, const GLdouble *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1177]; - ((void (APIENTRY *)(GLuint index, GLsizei n, const GLfloat *v)) _func)(index, n, v); + ((void (APIENTRY *)(GLuint index, GLsizei n, const GLdouble *v)) _func)(index, n, v); } -void APIENTRY shared_dispatch_stub_1178(GLuint index, GLsizei n, const GLshort *v) +void APIENTRY shared_dispatch_stub_1178(GLuint index, GLsizei n, const GLfloat *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1178]; - ((void (APIENTRY *)(GLuint index, GLsizei n, const GLshort *v)) _func)(index, n, v); + ((void (APIENTRY *)(GLuint index, GLsizei n, const GLfloat *v)) _func)(index, n, v); } -void APIENTRY shared_dispatch_stub_1179(GLuint index, GLsizei n, const GLdouble *v) +void APIENTRY shared_dispatch_stub_1179(GLuint index, GLsizei n, const GLshort *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1179]; - ((void (APIENTRY *)(GLuint index, GLsizei n, const GLdouble *v)) _func)(index, n, v); + ((void (APIENTRY *)(GLuint index, GLsizei n, const GLshort *v)) _func)(index, n, v); } -void APIENTRY shared_dispatch_stub_1180(GLuint index, GLsizei n, const GLfloat *v) +void APIENTRY shared_dispatch_stub_1180(GLuint index, GLsizei n, const GLdouble *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1180]; - ((void (APIENTRY *)(GLuint index, GLsizei n, const GLfloat *v)) _func)(index, n, v); + ((void (APIENTRY *)(GLuint index, GLsizei n, const GLdouble *v)) _func)(index, n, v); } -void APIENTRY shared_dispatch_stub_1181(GLuint index, GLsizei n, const GLshort *v) +void APIENTRY shared_dispatch_stub_1181(GLuint index, GLsizei n, const GLfloat *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1181]; - ((void (APIENTRY *)(GLuint index, GLsizei n, const GLshort *v)) _func)(index, n, v); + ((void (APIENTRY *)(GLuint index, GLsizei n, const GLfloat *v)) _func)(index, n, v); } -void APIENTRY shared_dispatch_stub_1182(GLuint index, GLsizei n, const GLubyte *v) +void APIENTRY shared_dispatch_stub_1182(GLuint index, GLsizei n, const GLshort *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1182]; - ((void (APIENTRY *)(GLuint index, GLsizei n, const GLubyte *v)) _func)(index, n, v); + ((void (APIENTRY *)(GLuint index, GLsizei n, const GLshort *v)) _func)(index, n, v); } -void APIENTRY shared_dispatch_stub_1183(GLenum pname, GLfloat *param) +void APIENTRY shared_dispatch_stub_1183(GLuint index, GLsizei n, const GLubyte *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1183]; - ((void (APIENTRY *)(GLenum pname, GLfloat *param)) _func)(pname, param); + ((void (APIENTRY *)(GLuint index, GLsizei n, const GLubyte *v)) _func)(index, n, v); } -void APIENTRY shared_dispatch_stub_1184(GLenum pname, GLint *param) +void APIENTRY shared_dispatch_stub_1184(GLenum pname, GLfloat *param) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1184]; - ((void (APIENTRY *)(GLenum pname, GLint *param)) _func)(pname, param); + ((void (APIENTRY *)(GLenum pname, GLfloat *param)) _func)(pname, param); } -void APIENTRY shared_dispatch_stub_1185(GLenum pname, const GLfloat *param) +void APIENTRY shared_dispatch_stub_1185(GLenum pname, GLint *param) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1185]; - ((void (APIENTRY *)(GLenum pname, const GLfloat *param)) _func)(pname, param); + ((void (APIENTRY *)(GLenum pname, GLint *param)) _func)(pname, param); } -void APIENTRY shared_dispatch_stub_1186(GLenum pname, const GLint *param) +void APIENTRY shared_dispatch_stub_1186(GLenum pname, const GLfloat *param) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1186]; - ((void (APIENTRY *)(GLenum pname, const GLint *param)) _func)(pname, param); + ((void (APIENTRY *)(GLenum pname, const GLfloat *param)) _func)(pname, param); } -void APIENTRY shared_dispatch_stub_1187(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod) +void APIENTRY shared_dispatch_stub_1187(GLenum pname, const GLint *param) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1187]; - ((void (APIENTRY *)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod)) _func)(op, dst, dstMod, arg1, arg1Rep, arg1Mod); + ((void (APIENTRY *)(GLenum pname, const GLint *param)) _func)(pname, param); } -void APIENTRY shared_dispatch_stub_1188(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod) +void APIENTRY shared_dispatch_stub_1188(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1188]; - ((void (APIENTRY *)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod)) _func)(op, dst, dstMod, arg1, arg1Rep, arg1Mod, arg2, arg2Rep, arg2Mod); + ((void (APIENTRY *)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod)) _func)(op, dst, dstMod, arg1, arg1Rep, arg1Mod); } -void APIENTRY shared_dispatch_stub_1189(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod) +void APIENTRY shared_dispatch_stub_1189(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1189]; - ((void (APIENTRY *)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod)) _func)(op, dst, dstMod, arg1, arg1Rep, arg1Mod, arg2, arg2Rep, arg2Mod, arg3, arg3Rep, arg3Mod); + ((void (APIENTRY *)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod)) _func)(op, dst, dstMod, arg1, arg1Rep, arg1Mod, arg2, arg2Rep, arg2Mod); } -void APIENTRY shared_dispatch_stub_1190(void) +void APIENTRY shared_dispatch_stub_1190(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1190]; - ((void (APIENTRY *)(void)) _func)(); + ((void (APIENTRY *)(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod)) _func)(op, dst, dstMod, arg1, arg1Rep, arg1Mod, arg2, arg2Rep, arg2Mod, arg3, arg3Rep, arg3Mod); } -void APIENTRY shared_dispatch_stub_1191(GLuint id) +void APIENTRY shared_dispatch_stub_1191(void) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1191]; - ((void (APIENTRY *)(GLuint id)) _func)(id); + ((void (APIENTRY *)(void)) _func)(); } -void APIENTRY shared_dispatch_stub_1192(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod) +void APIENTRY shared_dispatch_stub_1192(GLuint id) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1192]; - ((void (APIENTRY *)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod)) _func)(op, dst, dstMask, dstMod, arg1, arg1Rep, arg1Mod); + ((void (APIENTRY *)(GLuint id)) _func)(id); } -void APIENTRY shared_dispatch_stub_1193(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod) +void APIENTRY shared_dispatch_stub_1193(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1193]; - ((void (APIENTRY *)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod)) _func)(op, dst, dstMask, dstMod, arg1, arg1Rep, arg1Mod, arg2, arg2Rep, arg2Mod); + ((void (APIENTRY *)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod)) _func)(op, dst, dstMask, dstMod, arg1, arg1Rep, arg1Mod); } -void APIENTRY shared_dispatch_stub_1194(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod) +void APIENTRY shared_dispatch_stub_1194(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1194]; - ((void (APIENTRY *)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod)) _func)(op, dst, dstMask, dstMod, arg1, arg1Rep, arg1Mod, arg2, arg2Rep, arg2Mod, arg3, arg3Rep, arg3Mod); + ((void (APIENTRY *)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod)) _func)(op, dst, dstMask, dstMod, arg1, arg1Rep, arg1Mod, arg2, arg2Rep, arg2Mod); } -void APIENTRY shared_dispatch_stub_1195(GLuint id) +void APIENTRY shared_dispatch_stub_1195(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1195]; - ((void (APIENTRY *)(GLuint id)) _func)(id); + ((void (APIENTRY *)(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod)) _func)(op, dst, dstMask, dstMod, arg1, arg1Rep, arg1Mod, arg2, arg2Rep, arg2Mod, arg3, arg3Rep, arg3Mod); } -void APIENTRY shared_dispatch_stub_1196(void) +void APIENTRY shared_dispatch_stub_1196(GLuint id) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1196]; - ((void (APIENTRY *)(void)) _func)(); + ((void (APIENTRY *)(GLuint id)) _func)(id); } -GLuint APIENTRY shared_dispatch_stub_1197(GLuint range) +void APIENTRY shared_dispatch_stub_1197(void) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1197]; - return ((GLuint (APIENTRY *)(GLuint range)) _func)(range); + ((void (APIENTRY *)(void)) _func)(); } -void APIENTRY shared_dispatch_stub_1198(GLuint dst, GLuint coord, GLenum swizzle) +GLuint APIENTRY shared_dispatch_stub_1198(GLuint range) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1198]; - ((void (APIENTRY *)(GLuint dst, GLuint coord, GLenum swizzle)) _func)(dst, coord, swizzle); + return ((GLuint (APIENTRY *)(GLuint range)) _func)(range); } -void APIENTRY shared_dispatch_stub_1199(GLuint dst, GLuint interp, GLenum swizzle) +void APIENTRY shared_dispatch_stub_1199(GLuint dst, GLuint coord, GLenum swizzle) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1199]; - ((void (APIENTRY *)(GLuint dst, GLuint interp, GLenum swizzle)) _func)(dst, interp, swizzle); + ((void (APIENTRY *)(GLuint dst, GLuint coord, GLenum swizzle)) _func)(dst, coord, swizzle); } -void APIENTRY shared_dispatch_stub_1200(GLuint dst, const GLfloat *value) +void APIENTRY shared_dispatch_stub_1200(GLuint dst, GLuint interp, GLenum swizzle) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1200]; - ((void (APIENTRY *)(GLuint dst, const GLfloat *value)) _func)(dst, value); + ((void (APIENTRY *)(GLuint dst, GLuint interp, GLenum swizzle)) _func)(dst, interp, swizzle); } -void APIENTRY shared_dispatch_stub_1201(GLenum face) +void APIENTRY shared_dispatch_stub_1201(GLuint dst, const GLfloat *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1201]; - ((void (APIENTRY *)(GLenum face)) _func)(face); + ((void (APIENTRY *)(GLuint dst, const GLfloat *value)) _func)(dst, value); } -void APIENTRY shared_dispatch_stub_1202(GLuint array) +void APIENTRY shared_dispatch_stub_1202(GLuint first, GLsizei count, const GLfloat *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1202]; - ((void (APIENTRY *)(GLuint array)) _func)(array); + ((void (APIENTRY *)(GLuint first, GLsizei count, const GLfloat *v)) _func)(first, count, v); } -void APIENTRY shared_dispatch_stub_1203(GLsizei n, GLuint *arrays) +void APIENTRY shared_dispatch_stub_1203(GLuint index, GLfloat n, GLfloat f) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1203]; - ((void (APIENTRY *)(GLsizei n, GLuint *arrays)) _func)(n, arrays); + ((void (APIENTRY *)(GLuint index, GLfloat n, GLfloat f)) _func)(index, n, f); } -void APIENTRY shared_dispatch_stub_1204(GLuint id, GLsizei len, const GLubyte *name, GLdouble *params) +void APIENTRY shared_dispatch_stub_1204(GLenum face) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1204]; - ((void (APIENTRY *)(GLuint id, GLsizei len, const GLubyte *name, GLdouble *params)) _func)(id, len, name, params); + ((void (APIENTRY *)(GLenum face)) _func)(face); } -void APIENTRY shared_dispatch_stub_1205(GLuint id, GLsizei len, const GLubyte *name, GLfloat *params) +void APIENTRY shared_dispatch_stub_1205(GLuint array) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1205]; - ((void (APIENTRY *)(GLuint id, GLsizei len, const GLubyte *name, GLfloat *params)) _func)(id, len, name, params); + ((void (APIENTRY *)(GLuint array)) _func)(array); } -void APIENTRY shared_dispatch_stub_1206(GLuint id, GLsizei len, const GLubyte *name, GLdouble x, GLdouble y, GLdouble z, GLdouble w) +void APIENTRY shared_dispatch_stub_1206(GLsizei n, GLuint *arrays) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1206]; - ((void (APIENTRY *)(GLuint id, GLsizei len, const GLubyte *name, GLdouble x, GLdouble y, GLdouble z, GLdouble w)) _func)(id, len, name, x, y, z, w); + ((void (APIENTRY *)(GLsizei n, GLuint *arrays)) _func)(n, arrays); } -void APIENTRY shared_dispatch_stub_1207(GLuint id, GLsizei len, const GLubyte *name, const GLdouble *v) +void APIENTRY shared_dispatch_stub_1207(GLuint id, GLsizei len, const GLubyte *name, GLdouble *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1207]; - ((void (APIENTRY *)(GLuint id, GLsizei len, const GLubyte *name, const GLdouble *v)) _func)(id, len, name, v); + ((void (APIENTRY *)(GLuint id, GLsizei len, const GLubyte *name, GLdouble *params)) _func)(id, len, name, params); } -void APIENTRY shared_dispatch_stub_1208(GLuint id, GLsizei len, const GLubyte *name, GLfloat x, GLfloat y, GLfloat z, GLfloat w) +void APIENTRY shared_dispatch_stub_1208(GLuint id, GLsizei len, const GLubyte *name, GLfloat *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1208]; - ((void (APIENTRY *)(GLuint id, GLsizei len, const GLubyte *name, GLfloat x, GLfloat y, GLfloat z, GLfloat w)) _func)(id, len, name, x, y, z, w); + ((void (APIENTRY *)(GLuint id, GLsizei len, const GLubyte *name, GLfloat *params)) _func)(id, len, name, params); } -void APIENTRY shared_dispatch_stub_1209(GLuint id, GLsizei len, const GLubyte *name, const GLfloat *v) +void APIENTRY shared_dispatch_stub_1209(GLuint id, GLsizei len, const GLubyte *name, GLdouble x, GLdouble y, GLdouble z, GLdouble w) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1209]; - ((void (APIENTRY *)(GLuint id, GLsizei len, const GLubyte *name, const GLfloat *v)) _func)(id, len, name, v); + ((void (APIENTRY *)(GLuint id, GLsizei len, const GLubyte *name, GLdouble x, GLdouble y, GLdouble z, GLdouble w)) _func)(id, len, name, x, y, z, w); } -void APIENTRY shared_dispatch_stub_1210(void) +void APIENTRY shared_dispatch_stub_1210(GLuint id, GLsizei len, const GLubyte *name, const GLdouble *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1210]; - ((void (APIENTRY *)(void)) _func)(); + ((void (APIENTRY *)(GLuint id, GLsizei len, const GLubyte *name, const GLdouble *v)) _func)(id, len, name, v); } -void APIENTRY shared_dispatch_stub_1211(GLenum coord, GLenum pname, GLfixed *params) +void APIENTRY shared_dispatch_stub_1211(GLuint id, GLsizei len, const GLubyte *name, GLfloat x, GLfloat y, GLfloat z, GLfloat w) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1211]; - ((void (APIENTRY *)(GLenum coord, GLenum pname, GLfixed *params)) _func)(coord, pname, params); + ((void (APIENTRY *)(GLuint id, GLsizei len, const GLubyte *name, GLfloat x, GLfloat y, GLfloat z, GLfloat w)) _func)(id, len, name, x, y, z, w); } -void APIENTRY shared_dispatch_stub_1212(GLenum coord, GLenum pname, GLint param) +void APIENTRY shared_dispatch_stub_1212(GLuint id, GLsizei len, const GLubyte *name, const GLfloat *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1212]; - ((void (APIENTRY *)(GLenum coord, GLenum pname, GLint param)) _func)(coord, pname, param); + ((void (APIENTRY *)(GLuint id, GLsizei len, const GLubyte *name, const GLfloat *v)) _func)(id, len, name, v); } -void APIENTRY shared_dispatch_stub_1213(GLenum coord, GLenum pname, const GLfixed *params) +void APIENTRY shared_dispatch_stub_1213(void) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1213]; - ((void (APIENTRY *)(GLenum coord, GLenum pname, const GLfixed *params)) _func)(coord, pname, params); + ((void (APIENTRY *)(void)) _func)(); } -void APIENTRY shared_dispatch_stub_1214(GLclampd zmin, GLclampd zmax) +void APIENTRY shared_dispatch_stub_1214(GLenum coord, GLenum pname, GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1214]; - ((void (APIENTRY *)(GLclampd zmin, GLclampd zmax)) _func)(zmin, zmax); + ((void (APIENTRY *)(GLenum coord, GLenum pname, GLfixed *params)) _func)(coord, pname, params); } -void APIENTRY shared_dispatch_stub_1215(GLenum target, GLuint framebuffer) +void APIENTRY shared_dispatch_stub_1215(GLenum coord, GLenum pname, GLint param) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1215]; - ((void (APIENTRY *)(GLenum target, GLuint framebuffer)) _func)(target, framebuffer); + ((void (APIENTRY *)(GLenum coord, GLenum pname, GLint param)) _func)(coord, pname, param); } -void APIENTRY shared_dispatch_stub_1216(GLenum target, GLuint renderbuffer) +void APIENTRY shared_dispatch_stub_1216(GLenum coord, GLenum pname, const GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1216]; - ((void (APIENTRY *)(GLenum target, GLuint renderbuffer)) _func)(target, renderbuffer); + ((void (APIENTRY *)(GLenum coord, GLenum pname, const GLfixed *params)) _func)(coord, pname, params); } -void APIENTRY shared_dispatch_stub_1217(GLsizei len, const GLvoid *string) +void APIENTRY shared_dispatch_stub_1217(GLclampd zmin, GLclampd zmax) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1217]; - ((void (APIENTRY *)(GLsizei len, const GLvoid *string)) _func)(len, string); + ((void (APIENTRY *)(GLclampd zmin, GLclampd zmax)) _func)(zmin, zmax); } -void APIENTRY shared_dispatch_stub_1218(GLenum target, GLenum pname, GLint param) +void APIENTRY shared_dispatch_stub_1218(GLenum target, GLuint framebuffer) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1218]; - ((void (APIENTRY *)(GLenum target, GLenum pname, GLint param)) _func)(target, pname, param); + ((void (APIENTRY *)(GLenum target, GLuint framebuffer)) _func)(target, framebuffer); } -void APIENTRY shared_dispatch_stub_1219(GLenum target, GLintptr offset, GLsizeiptr size) +void APIENTRY shared_dispatch_stub_1219(GLenum target, GLuint renderbuffer) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1219]; - ((void (APIENTRY *)(GLenum target, GLintptr offset, GLsizeiptr size)) _func)(target, offset, size); + ((void (APIENTRY *)(GLenum target, GLuint renderbuffer)) _func)(target, renderbuffer); } -void APIENTRY shared_dispatch_stub_1220(GLuint index, GLint x) +void APIENTRY shared_dispatch_stub_1220(GLsizei len, const GLvoid *string) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1220]; - ((void (APIENTRY *)(GLuint index, GLint x)) _func)(index, x); + ((void (APIENTRY *)(GLsizei len, const GLvoid *string)) _func)(len, string); } -void APIENTRY shared_dispatch_stub_1221(GLuint index, GLuint x) +void APIENTRY shared_dispatch_stub_1221(GLenum target, GLenum pname, GLint param) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1221]; - ((void (APIENTRY *)(GLuint index, GLuint x)) _func)(index, x); + ((void (APIENTRY *)(GLenum target, GLenum pname, GLint param)) _func)(target, pname, param); } -void APIENTRY shared_dispatch_stub_1222(GLuint index, GLint x, GLint y) +void APIENTRY shared_dispatch_stub_1222(GLenum target, GLintptr offset, GLsizeiptr size) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1222]; - ((void (APIENTRY *)(GLuint index, GLint x, GLint y)) _func)(index, x, y); + ((void (APIENTRY *)(GLenum target, GLintptr offset, GLsizeiptr size)) _func)(target, offset, size); } -void APIENTRY shared_dispatch_stub_1223(GLuint index, const GLint *v) +void APIENTRY shared_dispatch_stub_1223(GLuint index, GLint x) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1223]; - ((void (APIENTRY *)(GLuint index, const GLint *v)) _func)(index, v); + ((void (APIENTRY *)(GLuint index, GLint x)) _func)(index, x); } -void APIENTRY shared_dispatch_stub_1224(GLuint index, GLuint x, GLuint y) +void APIENTRY shared_dispatch_stub_1224(GLuint index, GLuint x) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1224]; - ((void (APIENTRY *)(GLuint index, GLuint x, GLuint y)) _func)(index, x, y); + ((void (APIENTRY *)(GLuint index, GLuint x)) _func)(index, x); } -void APIENTRY shared_dispatch_stub_1225(GLuint index, const GLuint *v) +void APIENTRY shared_dispatch_stub_1225(GLuint index, GLint x, GLint y) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1225]; - ((void (APIENTRY *)(GLuint index, const GLuint *v)) _func)(index, v); + ((void (APIENTRY *)(GLuint index, GLint x, GLint y)) _func)(index, x, y); } -void APIENTRY shared_dispatch_stub_1226(GLuint index, GLint x, GLint y, GLint z) +void APIENTRY shared_dispatch_stub_1226(GLuint index, const GLint *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1226]; - ((void (APIENTRY *)(GLuint index, GLint x, GLint y, GLint z)) _func)(index, x, y, z); + ((void (APIENTRY *)(GLuint index, const GLint *v)) _func)(index, v); } -void APIENTRY shared_dispatch_stub_1227(GLuint index, const GLint *v) +void APIENTRY shared_dispatch_stub_1227(GLuint index, GLuint x, GLuint y) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1227]; - ((void (APIENTRY *)(GLuint index, const GLint *v)) _func)(index, v); + ((void (APIENTRY *)(GLuint index, GLuint x, GLuint y)) _func)(index, x, y); } -void APIENTRY shared_dispatch_stub_1228(GLuint index, GLuint x, GLuint y, GLuint z) +void APIENTRY shared_dispatch_stub_1228(GLuint index, const GLuint *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1228]; - ((void (APIENTRY *)(GLuint index, GLuint x, GLuint y, GLuint z)) _func)(index, x, y, z); + ((void (APIENTRY *)(GLuint index, const GLuint *v)) _func)(index, v); } -void APIENTRY shared_dispatch_stub_1229(GLuint index, const GLuint *v) +void APIENTRY shared_dispatch_stub_1229(GLuint index, GLint x, GLint y, GLint z) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1229]; - ((void (APIENTRY *)(GLuint index, const GLuint *v)) _func)(index, v); + ((void (APIENTRY *)(GLuint index, GLint x, GLint y, GLint z)) _func)(index, x, y, z); } -void APIENTRY shared_dispatch_stub_1230(GLuint index, GLint x, GLint y, GLint z, GLint w) +void APIENTRY shared_dispatch_stub_1230(GLuint index, const GLint *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1230]; - ((void (APIENTRY *)(GLuint index, GLint x, GLint y, GLint z, GLint w)) _func)(index, x, y, z, w); + ((void (APIENTRY *)(GLuint index, const GLint *v)) _func)(index, v); } -void APIENTRY shared_dispatch_stub_1231(GLuint index, const GLint *v) +void APIENTRY shared_dispatch_stub_1231(GLuint index, GLuint x, GLuint y, GLuint z) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1231]; - ((void (APIENTRY *)(GLuint index, const GLint *v)) _func)(index, v); + ((void (APIENTRY *)(GLuint index, GLuint x, GLuint y, GLuint z)) _func)(index, x, y, z); } -void APIENTRY shared_dispatch_stub_1232(GLuint index, GLuint x, GLuint y, GLuint z, GLuint w) +void APIENTRY shared_dispatch_stub_1232(GLuint index, const GLuint *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1232]; - ((void (APIENTRY *)(GLuint index, GLuint x, GLuint y, GLuint z, GLuint w)) _func)(index, x, y, z, w); + ((void (APIENTRY *)(GLuint index, const GLuint *v)) _func)(index, v); } -void APIENTRY shared_dispatch_stub_1233(GLuint index, const GLuint *v) +void APIENTRY shared_dispatch_stub_1233(GLuint index, GLint x, GLint y, GLint z, GLint w) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1233]; - ((void (APIENTRY *)(GLuint index, const GLuint *v)) _func)(index, v); + ((void (APIENTRY *)(GLuint index, GLint x, GLint y, GLint z, GLint w)) _func)(index, x, y, z, w); } -void APIENTRY shared_dispatch_stub_1234(GLint r, GLint g, GLint b, GLint a) +void APIENTRY shared_dispatch_stub_1234(GLuint index, const GLint *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1234]; - ((void (APIENTRY *)(GLint r, GLint g, GLint b, GLint a)) _func)(r, g, b, a); + ((void (APIENTRY *)(GLuint index, const GLint *v)) _func)(index, v); } -void APIENTRY shared_dispatch_stub_1235(GLuint r, GLuint g, GLuint b, GLuint a) +void APIENTRY shared_dispatch_stub_1235(GLuint index, GLuint x, GLuint y, GLuint z, GLuint w) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1235]; - ((void (APIENTRY *)(GLuint r, GLuint g, GLuint b, GLuint a)) _func)(r, g, b, a); + ((void (APIENTRY *)(GLuint index, GLuint x, GLuint y, GLuint z, GLuint w)) _func)(index, x, y, z, w); } -void APIENTRY shared_dispatch_stub_1236(GLenum target, GLuint index, GLuint buffer, GLintptr offset) +void APIENTRY shared_dispatch_stub_1236(GLuint index, const GLuint *v) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1236]; - ((void (APIENTRY *)(GLenum target, GLuint index, GLuint buffer, GLintptr offset)) _func)(target, index, buffer, offset); + ((void (APIENTRY *)(GLuint index, const GLuint *v)) _func)(index, v); } -void APIENTRY shared_dispatch_stub_1237(GLuint monitor) +void APIENTRY shared_dispatch_stub_1237(GLint r, GLint g, GLint b, GLint a) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1237]; - ((void (APIENTRY *)(GLuint monitor)) _func)(monitor); + ((void (APIENTRY *)(GLint r, GLint g, GLint b, GLint a)) _func)(r, g, b, a); } -void APIENTRY shared_dispatch_stub_1238(GLsizei n, GLuint *monitors) +void APIENTRY shared_dispatch_stub_1238(GLuint r, GLuint g, GLuint b, GLuint a) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1238]; - ((void (APIENTRY *)(GLsizei n, GLuint *monitors)) _func)(n, monitors); + ((void (APIENTRY *)(GLuint r, GLuint g, GLuint b, GLuint a)) _func)(r, g, b, a); } -void APIENTRY shared_dispatch_stub_1239(GLuint monitor) +void APIENTRY shared_dispatch_stub_1239(GLenum target, GLuint index, GLuint buffer, GLintptr offset) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1239]; - ((void (APIENTRY *)(GLuint monitor)) _func)(monitor); + ((void (APIENTRY *)(GLenum target, GLuint index, GLuint buffer, GLintptr offset)) _func)(target, index, buffer, offset); } -void APIENTRY shared_dispatch_stub_1240(GLsizei n, GLuint *monitors) +void APIENTRY shared_dispatch_stub_1240(GLuint monitor) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1240]; - ((void (APIENTRY *)(GLsizei n, GLuint *monitors)) _func)(n, monitors); + ((void (APIENTRY *)(GLuint monitor)) _func)(monitor); } -void APIENTRY shared_dispatch_stub_1241(GLuint monitor, GLenum pname, GLsizei dataSize, GLuint *data, GLint *bytesWritten) +void APIENTRY shared_dispatch_stub_1241(GLsizei n, GLuint *monitors) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1241]; - ((void (APIENTRY *)(GLuint monitor, GLenum pname, GLsizei dataSize, GLuint *data, GLint *bytesWritten)) _func)(monitor, pname, dataSize, data, bytesWritten); + ((void (APIENTRY *)(GLsizei n, GLuint *monitors)) _func)(n, monitors); } -void APIENTRY shared_dispatch_stub_1242(GLuint group, GLuint counter, GLenum pname, GLvoid *data) +void APIENTRY shared_dispatch_stub_1242(GLuint monitor) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1242]; - ((void (APIENTRY *)(GLuint group, GLuint counter, GLenum pname, GLvoid *data)) _func)(group, counter, pname, data); + ((void (APIENTRY *)(GLuint monitor)) _func)(monitor); } -void APIENTRY shared_dispatch_stub_1243(GLuint group, GLuint counter, GLsizei bufSize, GLsizei *length, GLchar *counterString) +void APIENTRY shared_dispatch_stub_1243(GLsizei n, GLuint *monitors) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1243]; - ((void (APIENTRY *)(GLuint group, GLuint counter, GLsizei bufSize, GLsizei *length, GLchar *counterString)) _func)(group, counter, bufSize, length, counterString); + ((void (APIENTRY *)(GLsizei n, GLuint *monitors)) _func)(n, monitors); } -void APIENTRY shared_dispatch_stub_1244(GLuint group, GLint *numCounters, GLint *maxActiveCounters, GLsizei countersSize, GLuint *counters) +void APIENTRY shared_dispatch_stub_1244(GLuint monitor, GLenum pname, GLsizei dataSize, GLuint *data, GLint *bytesWritten) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1244]; - ((void (APIENTRY *)(GLuint group, GLint *numCounters, GLint *maxActiveCounters, GLsizei countersSize, GLuint *counters)) _func)(group, numCounters, maxActiveCounters, countersSize, counters); + ((void (APIENTRY *)(GLuint monitor, GLenum pname, GLsizei dataSize, GLuint *data, GLint *bytesWritten)) _func)(monitor, pname, dataSize, data, bytesWritten); } -void APIENTRY shared_dispatch_stub_1245(GLuint group, GLsizei bufSize, GLsizei *length, GLchar *groupString) +void APIENTRY shared_dispatch_stub_1245(GLuint group, GLuint counter, GLenum pname, GLvoid *data) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1245]; - ((void (APIENTRY *)(GLuint group, GLsizei bufSize, GLsizei *length, GLchar *groupString)) _func)(group, bufSize, length, groupString); + ((void (APIENTRY *)(GLuint group, GLuint counter, GLenum pname, GLvoid *data)) _func)(group, counter, pname, data); } -void APIENTRY shared_dispatch_stub_1246(GLint *numGroups, GLsizei groupsSize, GLuint *groups) +void APIENTRY shared_dispatch_stub_1246(GLuint group, GLuint counter, GLsizei bufSize, GLsizei *length, GLchar *counterString) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1246]; - ((void (APIENTRY *)(GLint *numGroups, GLsizei groupsSize, GLuint *groups)) _func)(numGroups, groupsSize, groups); + ((void (APIENTRY *)(GLuint group, GLuint counter, GLsizei bufSize, GLsizei *length, GLchar *counterString)) _func)(group, counter, bufSize, length, counterString); } -void APIENTRY shared_dispatch_stub_1247(GLuint monitor, GLboolean enable, GLuint group, GLint numCounters, GLuint *counterList) +void APIENTRY shared_dispatch_stub_1247(GLuint group, GLint *numCounters, GLint *maxActiveCounters, GLsizei countersSize, GLuint *counters) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1247]; - ((void (APIENTRY *)(GLuint monitor, GLboolean enable, GLuint group, GLint numCounters, GLuint *counterList)) _func)(monitor, enable, group, numCounters, counterList); + ((void (APIENTRY *)(GLuint group, GLint *numCounters, GLint *maxActiveCounters, GLsizei countersSize, GLuint *counters)) _func)(group, numCounters, maxActiveCounters, countersSize, counters); } -void APIENTRY shared_dispatch_stub_1248(GLenum objectType, GLuint name, GLenum pname, GLint *value) +void APIENTRY shared_dispatch_stub_1248(GLuint group, GLsizei bufSize, GLsizei *length, GLchar *groupString) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1248]; - ((void (APIENTRY *)(GLenum objectType, GLuint name, GLenum pname, GLint *value)) _func)(objectType, name, pname, value); + ((void (APIENTRY *)(GLuint group, GLsizei bufSize, GLsizei *length, GLchar *groupString)) _func)(group, bufSize, length, groupString); } -GLenum APIENTRY shared_dispatch_stub_1249(GLenum objectType, GLuint name, GLenum option) +void APIENTRY shared_dispatch_stub_1249(GLint *numGroups, GLsizei groupsSize, GLuint *groups) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1249]; - return ((GLenum (APIENTRY *)(GLenum objectType, GLuint name, GLenum option)) _func)(objectType, name, option); + ((void (APIENTRY *)(GLint *numGroups, GLsizei groupsSize, GLuint *groups)) _func)(numGroups, groupsSize, groups); } -GLenum APIENTRY shared_dispatch_stub_1250(GLenum objectType, GLuint name, GLenum option) +void APIENTRY shared_dispatch_stub_1250(GLuint monitor, GLboolean enable, GLuint group, GLint numCounters, GLuint *counterList) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1250]; - return ((GLenum (APIENTRY *)(GLenum objectType, GLuint name, GLenum option)) _func)(objectType, name, option); + ((void (APIENTRY *)(GLuint monitor, GLboolean enable, GLuint group, GLint numCounters, GLuint *counterList)) _func)(monitor, enable, group, numCounters, counterList); } -void APIENTRY shared_dispatch_stub_1251(GLuint program) +void APIENTRY shared_dispatch_stub_1251(GLenum objectType, GLuint name, GLenum pname, GLint *value) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1251]; - ((void (APIENTRY *)(GLuint program)) _func)(program); + ((void (APIENTRY *)(GLenum objectType, GLuint name, GLenum pname, GLint *value)) _func)(objectType, name, pname, value); } -GLuint APIENTRY shared_dispatch_stub_1252(GLenum type, const GLchar *string) +GLenum APIENTRY shared_dispatch_stub_1252(GLenum objectType, GLuint name, GLenum option) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1252]; - return ((GLuint (APIENTRY *)(GLenum type, const GLchar *string)) _func)(type, string); + return ((GLenum (APIENTRY *)(GLenum objectType, GLuint name, GLenum option)) _func)(objectType, name, option); } -void APIENTRY shared_dispatch_stub_1253(GLenum type, GLuint program) +GLenum APIENTRY shared_dispatch_stub_1253(GLenum objectType, GLuint name, GLenum option) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1253]; - ((void (APIENTRY *)(GLenum type, GLuint program)) _func)(type, program); + return ((GLenum (APIENTRY *)(GLenum objectType, GLuint name, GLenum option)) _func)(objectType, name, option); } -void APIENTRY shared_dispatch_stub_1254(void) +void APIENTRY shared_dispatch_stub_1254(GLuint program) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1254]; - ((void (APIENTRY *)(void)) _func)(); + ((void (APIENTRY *)(GLuint program)) _func)(program); } -void APIENTRY shared_dispatch_stub_1255(void) +GLuint APIENTRY shared_dispatch_stub_1255(GLenum type, const GLchar *string) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1255]; - ((void (APIENTRY *)(void)) _func)(); + return ((GLuint (APIENTRY *)(GLenum type, const GLchar *string)) _func)(type, string); } -void APIENTRY shared_dispatch_stub_1256(GLintptr surface, GLenum pname, GLsizei bufSize, GLsizei *length, GLint *values) +void APIENTRY shared_dispatch_stub_1256(GLenum type, GLuint program) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1256]; - ((void (APIENTRY *)(GLintptr surface, GLenum pname, GLsizei bufSize, GLsizei *length, GLint *values)) _func)(surface, pname, bufSize, length, values); + ((void (APIENTRY *)(GLenum type, GLuint program)) _func)(type, program); } -void APIENTRY shared_dispatch_stub_1257(const GLvoid *vdpDevice, const GLvoid *getProcAddress) +void APIENTRY shared_dispatch_stub_1257(void) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1257]; - ((void (APIENTRY *)(const GLvoid *vdpDevice, const GLvoid *getProcAddress)) _func)(vdpDevice, getProcAddress); + ((void (APIENTRY *)(void)) _func)(); } -GLboolean APIENTRY shared_dispatch_stub_1258(GLintptr surface) +void APIENTRY shared_dispatch_stub_1258(void) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1258]; - return ((GLboolean (APIENTRY *)(GLintptr surface)) _func)(surface); + ((void (APIENTRY *)(void)) _func)(); } -void APIENTRY shared_dispatch_stub_1259(GLsizei numSurfaces, const GLintptr *surfaces) +void APIENTRY shared_dispatch_stub_1259(GLintptr surface, GLenum pname, GLsizei bufSize, GLsizei *length, GLint *values) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1259]; - ((void (APIENTRY *)(GLsizei numSurfaces, const GLintptr *surfaces)) _func)(numSurfaces, surfaces); + ((void (APIENTRY *)(GLintptr surface, GLenum pname, GLsizei bufSize, GLsizei *length, GLint *values)) _func)(surface, pname, bufSize, length, values); } -GLintptr APIENTRY shared_dispatch_stub_1260(const GLvoid *vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint *textureNames) +void APIENTRY shared_dispatch_stub_1260(const GLvoid *vdpDevice, const GLvoid *getProcAddress) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1260]; - return ((GLintptr (APIENTRY *)(const GLvoid *vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint *textureNames)) _func)(vdpSurface, target, numTextureNames, textureNames); + ((void (APIENTRY *)(const GLvoid *vdpDevice, const GLvoid *getProcAddress)) _func)(vdpDevice, getProcAddress); } -GLintptr APIENTRY shared_dispatch_stub_1261(const GLvoid *vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint *textureNames) +GLboolean APIENTRY shared_dispatch_stub_1261(GLintptr surface) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1261]; - return ((GLintptr (APIENTRY *)(const GLvoid *vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint *textureNames)) _func)(vdpSurface, target, numTextureNames, textureNames); + return ((GLboolean (APIENTRY *)(GLintptr surface)) _func)(surface); } -void APIENTRY shared_dispatch_stub_1262(GLintptr surface, GLenum access) +void APIENTRY shared_dispatch_stub_1262(GLsizei numSurfaces, const GLintptr *surfaces) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1262]; - ((void (APIENTRY *)(GLintptr surface, GLenum access)) _func)(surface, access); + ((void (APIENTRY *)(GLsizei numSurfaces, const GLintptr *surfaces)) _func)(numSurfaces, surfaces); } -void APIENTRY shared_dispatch_stub_1263(GLsizei numSurfaces, const GLintptr *surfaces) +GLintptr APIENTRY shared_dispatch_stub_1263(const GLvoid *vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint *textureNames) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1263]; - ((void (APIENTRY *)(GLsizei numSurfaces, const GLintptr *surfaces)) _func)(numSurfaces, surfaces); + return ((GLintptr (APIENTRY *)(const GLvoid *vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint *textureNames)) _func)(vdpSurface, target, numTextureNames, textureNames); } -void APIENTRY shared_dispatch_stub_1264(GLintptr surface) +GLintptr APIENTRY shared_dispatch_stub_1264(const GLvoid *vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint *textureNames) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1264]; - ((void (APIENTRY *)(GLintptr surface)) _func)(surface); + return ((GLintptr (APIENTRY *)(const GLvoid *vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint *textureNames)) _func)(vdpSurface, target, numTextureNames, textureNames); } -void APIENTRY shared_dispatch_stub_1265(GLuint queryHandle) +void APIENTRY shared_dispatch_stub_1265(GLintptr surface, GLenum access) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1265]; - ((void (APIENTRY *)(GLuint queryHandle)) _func)(queryHandle); + ((void (APIENTRY *)(GLintptr surface, GLenum access)) _func)(surface, access); } -void APIENTRY shared_dispatch_stub_1266(GLuint queryId, GLuint *queryHandle) +void APIENTRY shared_dispatch_stub_1266(GLsizei numSurfaces, const GLintptr *surfaces) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1266]; - ((void (APIENTRY *)(GLuint queryId, GLuint *queryHandle)) _func)(queryId, queryHandle); + ((void (APIENTRY *)(GLsizei numSurfaces, const GLintptr *surfaces)) _func)(numSurfaces, surfaces); } -void APIENTRY shared_dispatch_stub_1267(GLuint queryHandle) +void APIENTRY shared_dispatch_stub_1267(GLintptr surface) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1267]; - ((void (APIENTRY *)(GLuint queryHandle)) _func)(queryHandle); + ((void (APIENTRY *)(GLintptr surface)) _func)(surface); } void APIENTRY shared_dispatch_stub_1268(GLuint queryHandle) @@ -25197,151 +25290,151 @@ ((void (APIENTRY *)(GLuint queryHandle)) _func)(queryHandle); } -void APIENTRY shared_dispatch_stub_1269(GLuint *queryId) +void APIENTRY shared_dispatch_stub_1269(GLuint queryId, GLuint *queryHandle) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1269]; - ((void (APIENTRY *)(GLuint *queryId)) _func)(queryId); + ((void (APIENTRY *)(GLuint queryId, GLuint *queryHandle)) _func)(queryId, queryHandle); } -void APIENTRY shared_dispatch_stub_1270(GLuint queryId, GLuint *nextQueryId) +void APIENTRY shared_dispatch_stub_1270(GLuint queryHandle) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1270]; - ((void (APIENTRY *)(GLuint queryId, GLuint *nextQueryId)) _func)(queryId, nextQueryId); + ((void (APIENTRY *)(GLuint queryHandle)) _func)(queryHandle); } -void APIENTRY shared_dispatch_stub_1271(GLuint queryId, GLuint counterId, GLuint counterNameLength, GLchar *counterName, GLuint counterDescLength, GLchar *counterDesc, GLuint *counterOffset, GLuint *counterDataSize, GLuint *counterTypeEnum, GLuint *counterDataTypeEnum, GLuint64 *rawCounterMaxValue) +void APIENTRY shared_dispatch_stub_1271(GLuint queryHandle) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1271]; - ((void (APIENTRY *)(GLuint queryId, GLuint counterId, GLuint counterNameLength, GLchar *counterName, GLuint counterDescLength, GLchar *counterDesc, GLuint *counterOffset, GLuint *counterDataSize, GLuint *counterTypeEnum, GLuint *counterDataTypeEnum, GLuint64 *rawCounterMaxValue)) _func)(queryId, counterId, counterNameLength, counterName, counterDescLength, counterDesc, counterOffset, counterDataSize, counterTypeEnum, counterDataTypeEnum, rawCounterMaxValue); + ((void (APIENTRY *)(GLuint queryHandle)) _func)(queryHandle); } -void APIENTRY shared_dispatch_stub_1272(GLuint queryHandle, GLuint flags, GLsizei dataSize, GLvoid *data, GLuint *bytesWritten) +void APIENTRY shared_dispatch_stub_1272(GLuint *queryId) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1272]; - ((void (APIENTRY *)(GLuint queryHandle, GLuint flags, GLsizei dataSize, GLvoid *data, GLuint *bytesWritten)) _func)(queryHandle, flags, dataSize, data, bytesWritten); + ((void (APIENTRY *)(GLuint *queryId)) _func)(queryId); } -void APIENTRY shared_dispatch_stub_1273(GLchar *queryName, GLuint *queryId) +void APIENTRY shared_dispatch_stub_1273(GLuint queryId, GLuint *nextQueryId) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1273]; - ((void (APIENTRY *)(GLchar *queryName, GLuint *queryId)) _func)(queryName, queryId); + ((void (APIENTRY *)(GLuint queryId, GLuint *nextQueryId)) _func)(queryId, nextQueryId); } -void APIENTRY shared_dispatch_stub_1274(GLuint queryId, GLuint queryNameLength, GLchar *queryName, GLuint *dataSize, GLuint *noCounters, GLuint *noInstances, GLuint *capsMask) +void APIENTRY shared_dispatch_stub_1274(GLuint queryId, GLuint counterId, GLuint counterNameLength, GLchar *counterName, GLuint counterDescLength, GLchar *counterDesc, GLuint *counterOffset, GLuint *counterDataSize, GLuint *counterTypeEnum, GLuint *counterDataTypeEnum, GLuint64 *rawCounterMaxValue) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1274]; - ((void (APIENTRY *)(GLuint queryId, GLuint queryNameLength, GLchar *queryName, GLuint *dataSize, GLuint *noCounters, GLuint *noInstances, GLuint *capsMask)) _func)(queryId, queryNameLength, queryName, dataSize, noCounters, noInstances, capsMask); + ((void (APIENTRY *)(GLuint queryId, GLuint counterId, GLuint counterNameLength, GLchar *counterName, GLuint counterDescLength, GLchar *counterDesc, GLuint *counterOffset, GLuint *counterDataSize, GLuint *counterTypeEnum, GLuint *counterDataTypeEnum, GLuint64 *rawCounterMaxValue)) _func)(queryId, counterId, counterNameLength, counterName, counterDescLength, counterDesc, counterOffset, counterDataSize, counterTypeEnum, counterDataTypeEnum, rawCounterMaxValue); } -void APIENTRY shared_dispatch_stub_1275(GLfloat factor, GLfloat units, GLfloat clamp) +void APIENTRY shared_dispatch_stub_1275(GLuint queryHandle, GLuint flags, GLsizei dataSize, GLvoid *data, GLuint *bytesWritten) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1275]; - ((void (APIENTRY *)(GLfloat factor, GLfloat units, GLfloat clamp)) _func)(factor, units, clamp); + ((void (APIENTRY *)(GLuint queryHandle, GLuint flags, GLsizei dataSize, GLvoid *data, GLuint *bytesWritten)) _func)(queryHandle, flags, dataSize, data, bytesWritten); } -void APIENTRY shared_dispatch_stub_1276(GLenum frontfunc, GLenum backfunc, GLint ref, GLuint mask) +void APIENTRY shared_dispatch_stub_1276(GLchar *queryName, GLuint *queryId) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1276]; - ((void (APIENTRY *)(GLenum frontfunc, GLenum backfunc, GLint ref, GLuint mask)) _func)(frontfunc, backfunc, ref, mask); + ((void (APIENTRY *)(GLchar *queryName, GLuint *queryId)) _func)(queryName, queryId); } -void APIENTRY shared_dispatch_stub_1277(GLenum target, GLuint index, GLsizei count, const GLfloat *params) +void APIENTRY shared_dispatch_stub_1277(GLuint queryId, GLuint queryNameLength, GLchar *queryName, GLuint *dataSize, GLuint *noCounters, GLuint *noInstances, GLuint *capsMask) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1277]; - ((void (APIENTRY *)(GLenum target, GLuint index, GLsizei count, const GLfloat *params)) _func)(target, index, count, params); + ((void (APIENTRY *)(GLuint queryId, GLuint queryNameLength, GLchar *queryName, GLuint *dataSize, GLuint *noCounters, GLuint *noInstances, GLuint *capsMask)) _func)(queryId, queryNameLength, queryName, dataSize, noCounters, noInstances, capsMask); } -void APIENTRY shared_dispatch_stub_1278(GLenum target, GLuint index, GLsizei count, const GLfloat *params) +void APIENTRY shared_dispatch_stub_1278(GLfloat factor, GLfloat units, GLfloat clamp) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1278]; - ((void (APIENTRY *)(GLenum target, GLuint index, GLsizei count, const GLfloat *params)) _func)(target, index, count, params); + ((void (APIENTRY *)(GLfloat factor, GLfloat units, GLfloat clamp)) _func)(factor, units, clamp); } -void APIENTRY shared_dispatch_stub_1279(GLenum target, GLvoid *writeOffset) +void APIENTRY shared_dispatch_stub_1279(GLenum mode, GLsizei count, const GLint *box) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1279]; - ((void (APIENTRY *)(GLenum target, GLvoid *writeOffset)) _func)(target, writeOffset); + ((void (APIENTRY *)(GLenum mode, GLsizei count, const GLint *box)) _func)(mode, count, box); } -void APIENTRY shared_dispatch_stub_1280(GLenum target, GLvoid *writeOffset) +void APIENTRY shared_dispatch_stub_1280(GLenum frontfunc, GLenum backfunc, GLint ref, GLuint mask) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1280]; - ((void (APIENTRY *)(GLenum target, GLvoid *writeOffset)) _func)(target, writeOffset); + ((void (APIENTRY *)(GLenum frontfunc, GLenum backfunc, GLint ref, GLuint mask)) _func)(frontfunc, backfunc, ref, mask); } -void APIENTRY shared_dispatch_stub_1281(GLenum func, GLclampx ref) +void APIENTRY shared_dispatch_stub_1281(GLenum target, GLuint index, GLsizei count, const GLfloat *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1281]; - ((void (APIENTRY *)(GLenum func, GLclampx ref)) _func)(func, ref); + ((void (APIENTRY *)(GLenum target, GLuint index, GLsizei count, const GLfloat *params)) _func)(target, index, count, params); } -void APIENTRY shared_dispatch_stub_1282(GLclampx red, GLclampx green, GLclampx blue, GLclampx alpha) +void APIENTRY shared_dispatch_stub_1282(GLenum target, GLuint index, GLsizei count, const GLfloat *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1282]; - ((void (APIENTRY *)(GLclampx red, GLclampx green, GLclampx blue, GLclampx alpha)) _func)(red, green, blue, alpha); + ((void (APIENTRY *)(GLenum target, GLuint index, GLsizei count, const GLfloat *params)) _func)(target, index, count, params); } -void APIENTRY shared_dispatch_stub_1283(GLclampx depth) +void APIENTRY shared_dispatch_stub_1283(GLenum target, GLvoid *writeOffset) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1283]; - ((void (APIENTRY *)(GLclampx depth)) _func)(depth); + ((void (APIENTRY *)(GLenum target, GLvoid *writeOffset)) _func)(target, writeOffset); } -void APIENTRY shared_dispatch_stub_1284(GLfixed red, GLfixed green, GLfixed blue, GLfixed alpha) +void APIENTRY shared_dispatch_stub_1284(GLenum target, GLvoid *writeOffset) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1284]; - ((void (APIENTRY *)(GLfixed red, GLfixed green, GLfixed blue, GLfixed alpha)) _func)(red, green, blue, alpha); + ((void (APIENTRY *)(GLenum target, GLvoid *writeOffset)) _func)(target, writeOffset); } -void APIENTRY shared_dispatch_stub_1285(GLclampx zNear, GLclampx zFar) +void APIENTRY shared_dispatch_stub_1285(GLenum func, GLclampx ref) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1285]; - ((void (APIENTRY *)(GLclampx zNear, GLclampx zFar)) _func)(zNear, zFar); + ((void (APIENTRY *)(GLenum func, GLclampx ref)) _func)(func, ref); } -void APIENTRY shared_dispatch_stub_1286(GLenum pname, GLfixed param) +void APIENTRY shared_dispatch_stub_1286(GLclampx red, GLclampx green, GLclampx blue, GLclampx alpha) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1286]; - ((void (APIENTRY *)(GLenum pname, GLfixed param)) _func)(pname, param); + ((void (APIENTRY *)(GLclampx red, GLclampx green, GLclampx blue, GLclampx alpha)) _func)(red, green, blue, alpha); } -void APIENTRY shared_dispatch_stub_1287(GLenum pname, const GLfixed *params) +void APIENTRY shared_dispatch_stub_1287(GLclampx depth) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1287]; - ((void (APIENTRY *)(GLenum pname, const GLfixed *params)) _func)(pname, params); + ((void (APIENTRY *)(GLclampx depth)) _func)(depth); } -void APIENTRY shared_dispatch_stub_1288(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar) +void APIENTRY shared_dispatch_stub_1288(GLfixed red, GLfixed green, GLfixed blue, GLfixed alpha) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1288]; - ((void (APIENTRY *)(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar)) _func)(left, right, bottom, top, zNear, zFar); + ((void (APIENTRY *)(GLfixed red, GLfixed green, GLfixed blue, GLfixed alpha)) _func)(red, green, blue, alpha); } -void APIENTRY shared_dispatch_stub_1289(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar) +void APIENTRY shared_dispatch_stub_1289(GLclampx zNear, GLclampx zFar) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1289]; - ((void (APIENTRY *)(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar)) _func)(left, right, bottom, top, zNear, zFar); + ((void (APIENTRY *)(GLclampx zNear, GLclampx zFar)) _func)(zNear, zFar); } void APIENTRY shared_dispatch_stub_1290(GLenum pname, GLfixed param) @@ -25358,137 +25451,137 @@ ((void (APIENTRY *)(GLenum pname, const GLfixed *params)) _func)(pname, params); } -void APIENTRY shared_dispatch_stub_1292(GLenum light, GLenum pname, GLfixed param) +void APIENTRY shared_dispatch_stub_1292(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1292]; - ((void (APIENTRY *)(GLenum light, GLenum pname, GLfixed param)) _func)(light, pname, param); + ((void (APIENTRY *)(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar)) _func)(left, right, bottom, top, zNear, zFar); } -void APIENTRY shared_dispatch_stub_1293(GLenum light, GLenum pname, const GLfixed *params) +void APIENTRY shared_dispatch_stub_1293(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1293]; - ((void (APIENTRY *)(GLenum light, GLenum pname, const GLfixed *params)) _func)(light, pname, params); + ((void (APIENTRY *)(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar)) _func)(left, right, bottom, top, zNear, zFar); } -void APIENTRY shared_dispatch_stub_1294(GLfixed width) +void APIENTRY shared_dispatch_stub_1294(GLenum pname, GLfixed param) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1294]; - ((void (APIENTRY *)(GLfixed width)) _func)(width); + ((void (APIENTRY *)(GLenum pname, GLfixed param)) _func)(pname, param); } -void APIENTRY shared_dispatch_stub_1295(const GLfixed *m) +void APIENTRY shared_dispatch_stub_1295(GLenum pname, const GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1295]; - ((void (APIENTRY *)(const GLfixed *m)) _func)(m); + ((void (APIENTRY *)(GLenum pname, const GLfixed *params)) _func)(pname, params); } -void APIENTRY shared_dispatch_stub_1296(GLenum face, GLenum pname, GLfixed param) +void APIENTRY shared_dispatch_stub_1296(GLenum light, GLenum pname, GLfixed param) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1296]; - ((void (APIENTRY *)(GLenum face, GLenum pname, GLfixed param)) _func)(face, pname, param); + ((void (APIENTRY *)(GLenum light, GLenum pname, GLfixed param)) _func)(light, pname, param); } -void APIENTRY shared_dispatch_stub_1297(GLenum face, GLenum pname, const GLfixed *params) +void APIENTRY shared_dispatch_stub_1297(GLenum light, GLenum pname, const GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1297]; - ((void (APIENTRY *)(GLenum face, GLenum pname, const GLfixed *params)) _func)(face, pname, params); + ((void (APIENTRY *)(GLenum light, GLenum pname, const GLfixed *params)) _func)(light, pname, params); } -void APIENTRY shared_dispatch_stub_1298(const GLfixed *m) +void APIENTRY shared_dispatch_stub_1298(GLfixed width) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1298]; - ((void (APIENTRY *)(const GLfixed *m)) _func)(m); + ((void (APIENTRY *)(GLfixed width)) _func)(width); } -void APIENTRY shared_dispatch_stub_1299(GLenum target, GLfixed s, GLfixed t, GLfixed r, GLfixed q) +void APIENTRY shared_dispatch_stub_1299(const GLfixed *m) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1299]; - ((void (APIENTRY *)(GLenum target, GLfixed s, GLfixed t, GLfixed r, GLfixed q)) _func)(target, s, t, r, q); + ((void (APIENTRY *)(const GLfixed *m)) _func)(m); } -void APIENTRY shared_dispatch_stub_1300(GLfixed nx, GLfixed ny, GLfixed nz) +void APIENTRY shared_dispatch_stub_1300(GLenum face, GLenum pname, GLfixed param) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1300]; - ((void (APIENTRY *)(GLfixed nx, GLfixed ny, GLfixed nz)) _func)(nx, ny, nz); + ((void (APIENTRY *)(GLenum face, GLenum pname, GLfixed param)) _func)(face, pname, param); } -void APIENTRY shared_dispatch_stub_1301(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar) +void APIENTRY shared_dispatch_stub_1301(GLenum face, GLenum pname, const GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1301]; - ((void (APIENTRY *)(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar)) _func)(left, right, bottom, top, zNear, zFar); + ((void (APIENTRY *)(GLenum face, GLenum pname, const GLfixed *params)) _func)(face, pname, params); } -void APIENTRY shared_dispatch_stub_1302(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar) +void APIENTRY shared_dispatch_stub_1302(const GLfixed *m) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1302]; - ((void (APIENTRY *)(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar)) _func)(left, right, bottom, top, zNear, zFar); + ((void (APIENTRY *)(const GLfixed *m)) _func)(m); } -void APIENTRY shared_dispatch_stub_1303(GLfixed size) +void APIENTRY shared_dispatch_stub_1303(GLenum target, GLfixed s, GLfixed t, GLfixed r, GLfixed q) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1303]; - ((void (APIENTRY *)(GLfixed size)) _func)(size); + ((void (APIENTRY *)(GLenum target, GLfixed s, GLfixed t, GLfixed r, GLfixed q)) _func)(target, s, t, r, q); } -void APIENTRY shared_dispatch_stub_1304(GLfixed factor, GLfixed units) +void APIENTRY shared_dispatch_stub_1304(GLfixed nx, GLfixed ny, GLfixed nz) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1304]; - ((void (APIENTRY *)(GLfixed factor, GLfixed units)) _func)(factor, units); + ((void (APIENTRY *)(GLfixed nx, GLfixed ny, GLfixed nz)) _func)(nx, ny, nz); } -void APIENTRY shared_dispatch_stub_1305(GLfixed angle, GLfixed x, GLfixed y, GLfixed z) +void APIENTRY shared_dispatch_stub_1305(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1305]; - ((void (APIENTRY *)(GLfixed angle, GLfixed x, GLfixed y, GLfixed z)) _func)(angle, x, y, z); + ((void (APIENTRY *)(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar)) _func)(left, right, bottom, top, zNear, zFar); } -void APIENTRY shared_dispatch_stub_1306(GLclampx value, GLboolean invert) +void APIENTRY shared_dispatch_stub_1306(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1306]; - ((void (APIENTRY *)(GLclampx value, GLboolean invert)) _func)(value, invert); + ((void (APIENTRY *)(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar)) _func)(left, right, bottom, top, zNear, zFar); } -void APIENTRY shared_dispatch_stub_1307(GLfixed x, GLfixed y, GLfixed z) +void APIENTRY shared_dispatch_stub_1307(GLfixed size) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1307]; - ((void (APIENTRY *)(GLfixed x, GLfixed y, GLfixed z)) _func)(x, y, z); + ((void (APIENTRY *)(GLfixed size)) _func)(size); } -void APIENTRY shared_dispatch_stub_1308(GLenum target, GLenum pname, GLfixed param) +void APIENTRY shared_dispatch_stub_1308(GLfixed factor, GLfixed units) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1308]; - ((void (APIENTRY *)(GLenum target, GLenum pname, GLfixed param)) _func)(target, pname, param); + ((void (APIENTRY *)(GLfixed factor, GLfixed units)) _func)(factor, units); } -void APIENTRY shared_dispatch_stub_1309(GLenum target, GLenum pname, const GLfixed *params) +void APIENTRY shared_dispatch_stub_1309(GLfixed angle, GLfixed x, GLfixed y, GLfixed z) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1309]; - ((void (APIENTRY *)(GLenum target, GLenum pname, const GLfixed *params)) _func)(target, pname, params); + ((void (APIENTRY *)(GLfixed angle, GLfixed x, GLfixed y, GLfixed z)) _func)(angle, x, y, z); } -void APIENTRY shared_dispatch_stub_1310(GLenum target, GLenum pname, GLfixed param) +void APIENTRY shared_dispatch_stub_1310(GLclampx value, GLboolean invert) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1310]; - ((void (APIENTRY *)(GLenum target, GLenum pname, GLfixed param)) _func)(target, pname, param); + ((void (APIENTRY *)(GLclampx value, GLboolean invert)) _func)(value, invert); } void APIENTRY shared_dispatch_stub_1311(GLfixed x, GLfixed y, GLfixed z) @@ -25498,90 +25591,132 @@ ((void (APIENTRY *)(GLfixed x, GLfixed y, GLfixed z)) _func)(x, y, z); } -void APIENTRY shared_dispatch_stub_1312(GLenum plane, const GLfloat *equation) +void APIENTRY shared_dispatch_stub_1312(GLenum target, GLenum pname, GLfixed param) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1312]; - ((void (APIENTRY *)(GLenum plane, const GLfloat *equation)) _func)(plane, equation); + ((void (APIENTRY *)(GLenum target, GLenum pname, GLfixed param)) _func)(target, pname, param); } -void APIENTRY shared_dispatch_stub_1313(GLenum plane, const GLfixed *equation) +void APIENTRY shared_dispatch_stub_1313(GLenum target, GLenum pname, const GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1313]; - ((void (APIENTRY *)(GLenum plane, const GLfixed *equation)) _func)(plane, equation); + ((void (APIENTRY *)(GLenum target, GLenum pname, const GLfixed *params)) _func)(target, pname, params); } -void APIENTRY shared_dispatch_stub_1314(GLenum plane, GLfloat *equation) +void APIENTRY shared_dispatch_stub_1314(GLenum target, GLenum pname, GLfixed param) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1314]; - ((void (APIENTRY *)(GLenum plane, GLfloat *equation)) _func)(plane, equation); + ((void (APIENTRY *)(GLenum target, GLenum pname, GLfixed param)) _func)(target, pname, param); } -void APIENTRY shared_dispatch_stub_1315(GLenum plane, GLfixed *equation) +void APIENTRY shared_dispatch_stub_1315(GLfixed x, GLfixed y, GLfixed z) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1315]; - ((void (APIENTRY *)(GLenum plane, GLfixed *equation)) _func)(plane, equation); + ((void (APIENTRY *)(GLfixed x, GLfixed y, GLfixed z)) _func)(x, y, z); } -void APIENTRY shared_dispatch_stub_1316(GLenum pname, GLfixed *params) +void APIENTRY shared_dispatch_stub_1316(GLenum plane, const GLfloat *equation) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1316]; - ((void (APIENTRY *)(GLenum pname, GLfixed *params)) _func)(pname, params); + ((void (APIENTRY *)(GLenum plane, const GLfloat *equation)) _func)(plane, equation); } -void APIENTRY shared_dispatch_stub_1317(GLenum light, GLenum pname, GLfixed *params) +void APIENTRY shared_dispatch_stub_1317(GLenum plane, const GLfixed *equation) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1317]; - ((void (APIENTRY *)(GLenum light, GLenum pname, GLfixed *params)) _func)(light, pname, params); + ((void (APIENTRY *)(GLenum plane, const GLfixed *equation)) _func)(plane, equation); } -void APIENTRY shared_dispatch_stub_1318(GLenum face, GLenum pname, GLfixed *params) +void APIENTRY shared_dispatch_stub_1318(GLenum plane, GLfloat *equation) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1318]; - ((void (APIENTRY *)(GLenum face, GLenum pname, GLfixed *params)) _func)(face, pname, params); + ((void (APIENTRY *)(GLenum plane, GLfloat *equation)) _func)(plane, equation); } -void APIENTRY shared_dispatch_stub_1319(GLenum target, GLenum pname, GLfixed *params) +void APIENTRY shared_dispatch_stub_1319(GLenum plane, GLfixed *equation) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1319]; - ((void (APIENTRY *)(GLenum target, GLenum pname, GLfixed *params)) _func)(target, pname, params); + ((void (APIENTRY *)(GLenum plane, GLfixed *equation)) _func)(plane, equation); } -void APIENTRY shared_dispatch_stub_1320(GLenum target, GLenum pname, GLfixed *params) +void APIENTRY shared_dispatch_stub_1320(GLenum pname, GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1320]; - ((void (APIENTRY *)(GLenum target, GLenum pname, GLfixed *params)) _func)(target, pname, params); + ((void (APIENTRY *)(GLenum pname, GLfixed *params)) _func)(pname, params); } -void APIENTRY shared_dispatch_stub_1321(GLenum pname, GLfixed param) +void APIENTRY shared_dispatch_stub_1321(GLenum light, GLenum pname, GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1321]; - ((void (APIENTRY *)(GLenum pname, GLfixed param)) _func)(pname, param); + ((void (APIENTRY *)(GLenum light, GLenum pname, GLfixed *params)) _func)(light, pname, params); } -void APIENTRY shared_dispatch_stub_1322(GLenum pname, const GLfixed *params) +void APIENTRY shared_dispatch_stub_1322(GLenum face, GLenum pname, GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1322]; - ((void (APIENTRY *)(GLenum pname, const GLfixed *params)) _func)(pname, params); + ((void (APIENTRY *)(GLenum face, GLenum pname, GLfixed *params)) _func)(face, pname, params); } -void APIENTRY shared_dispatch_stub_1323(GLenum target, GLenum pname, const GLfixed *params) +void APIENTRY shared_dispatch_stub_1323(GLenum target, GLenum pname, GLfixed *params) { const struct mapi_table *_tbl = entry_current_get(); mapi_func _func = ((const mapi_func *) _tbl)[1323]; + ((void (APIENTRY *)(GLenum target, GLenum pname, GLfixed *params)) _func)(target, pname, params); +} + +void APIENTRY shared_dispatch_stub_1324(GLenum target, GLenum pname, GLfixed *params) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[1324]; + ((void (APIENTRY *)(GLenum target, GLenum pname, GLfixed *params)) _func)(target, pname, params); +} + +void APIENTRY shared_dispatch_stub_1325(GLenum pname, GLfixed param) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[1325]; + ((void (APIENTRY *)(GLenum pname, GLfixed param)) _func)(pname, param); +} + +void APIENTRY shared_dispatch_stub_1326(GLenum pname, const GLfixed *params) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[1326]; + ((void (APIENTRY *)(GLenum pname, const GLfixed *params)) _func)(pname, params); +} + +void APIENTRY shared_dispatch_stub_1327(GLenum target, GLenum pname, const GLfixed *params) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[1327]; ((void (APIENTRY *)(GLenum target, GLenum pname, const GLfixed *params)) _func)(target, pname, params); } +void APIENTRY shared_dispatch_stub_1328(void) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[1328]; + ((void (APIENTRY *)(void)) _func)(); +} + +void APIENTRY shared_dispatch_stub_1329(GLfloat minX, GLfloat minY, GLfloat minZ, GLfloat minW, GLfloat maxX, GLfloat maxY, GLfloat maxZ, GLfloat maxW) +{ + const struct mapi_table *_tbl = entry_current_get(); + mapi_func _func = ((const mapi_func *) _tbl)[1329]; + ((void (APIENTRY *)(GLfloat minX, GLfloat minY, GLfloat minZ, GLfloat minW, GLfloat maxX, GLfloat maxY, GLfloat maxZ, GLfloat maxW)) _func)(minX, minY, minZ, minW, maxX, maxY, maxZ, maxW); +} + static const mapi_func public_entries[] = { (mapi_func) shared_dispatch_stub_0, (mapi_func) shared_dispatch_stub_1, @@ -26906,7 +27041,13 @@ (mapi_func) shared_dispatch_stub_1320, (mapi_func) shared_dispatch_stub_1321, (mapi_func) shared_dispatch_stub_1322, - (mapi_func) shared_dispatch_stub_1323 + (mapi_func) shared_dispatch_stub_1323, + (mapi_func) shared_dispatch_stub_1324, + (mapi_func) shared_dispatch_stub_1325, + (mapi_func) shared_dispatch_stub_1326, + (mapi_func) shared_dispatch_stub_1327, + (mapi_func) shared_dispatch_stub_1328, + (mapi_func) shared_dispatch_stub_1329 }; #undef MAPI_TMP_PUBLIC_ENTRIES #endif /* MAPI_TMP_PUBLIC_ENTRIES */ @@ -32209,6 +32350,30 @@ STUB_ASM_ENTRY("shared_dispatch_stub_1323")"\n" "\t"STUB_ASM_CODE("1323")"\n" +".hidden ""shared_dispatch_stub_1324""\n" +STUB_ASM_ENTRY("shared_dispatch_stub_1324")"\n" +"\t"STUB_ASM_CODE("1324")"\n" + +".hidden ""shared_dispatch_stub_1325""\n" +STUB_ASM_ENTRY("shared_dispatch_stub_1325")"\n" +"\t"STUB_ASM_CODE("1325")"\n" + +".hidden ""shared_dispatch_stub_1326""\n" +STUB_ASM_ENTRY("shared_dispatch_stub_1326")"\n" +"\t"STUB_ASM_CODE("1326")"\n" + +".hidden ""shared_dispatch_stub_1327""\n" +STUB_ASM_ENTRY("shared_dispatch_stub_1327")"\n" +"\t"STUB_ASM_CODE("1327")"\n" + +".hidden ""shared_dispatch_stub_1328""\n" +STUB_ASM_ENTRY("shared_dispatch_stub_1328")"\n" +"\t"STUB_ASM_CODE("1328")"\n" + +".hidden ""shared_dispatch_stub_1329""\n" +STUB_ASM_ENTRY("shared_dispatch_stub_1329")"\n" +"\t"STUB_ASM_CODE("1329")"\n" + ); #undef MAPI_TMP_STUB_ASM_GCC #endif /* MAPI_TMP_STUB_ASM_GCC */ diff -Nru mesa-12.0.6/src/mapi/shared-glapi/SConscript mesa-17.0.7/src/mapi/shared-glapi/SConscript --- mesa-12.0.6/src/mapi/shared-glapi/SConscript 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mapi/shared-glapi/SConscript 2017-06-01 10:37:10.000000000 +0000 @@ -26,10 +26,11 @@ header_name = '%s-tmp.h' % (printer) # generate ABI header + GLAPI = '../glapi/' header = env.CodeGenerate( target = header_name, script = '../mapi_abi.py', - source = '../glapi/gen/gl_and_es_API.xml', + source = [GLAPI + 'gen/gl_and_es_API.xml'] + env.Glob(GLAPI + 'gen/*.xml'), command = python_cmd + ' $SCRIPT ' + \ '--printer %s --mode lib $SOURCE > $TARGET' % (printer), ) diff -Nru mesa-12.0.6/src/mesa/drivers/common/driverfuncs.c mesa-17.0.7/src/mesa/drivers/common/driverfuncs.c --- mesa-12.0.6/src/mesa/drivers/common/driverfuncs.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/common/driverfuncs.c 2017-06-01 10:37:10.000000000 +0000 @@ -47,7 +47,7 @@ #include "main/fbobject.h" #include "main/samplerobj.h" #include "main/syncobj.h" -#include "main/texturebarrier.h" +#include "main/barrier.h" #include "main/transformfeedback.h" #include "program/program.h" @@ -179,7 +179,7 @@ driver->BlitFramebuffer = _swrast_BlitFramebuffer; driver->DiscardFramebuffer = NULL; - _mesa_init_texture_barrier_functions(driver); + _mesa_init_barrier_functions(driver); _mesa_init_shader_object_functions(driver); _mesa_init_transform_feedback_functions(driver); _mesa_init_sampler_object_functions(driver); diff -Nru mesa-12.0.6/src/mesa/drivers/common/meta_blit.c mesa-17.0.7/src/mesa/drivers/common/meta_blit.c --- mesa-12.0.6/src/mesa/drivers/common/meta_blit.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/common/meta_blit.c 2017-06-01 10:37:10.000000000 +0000 @@ -223,8 +223,8 @@ "#undef TEXEL_FETCH\n" "\n" " /* Do bilinear filtering on sample colors. */\n" - " x_0_color = mix(s_0_color, s_1_color, interp.x);\n" - " x_1_color = mix(s_2_color, s_3_color, interp.x);\n" + " x_0_color = mix(s_0_color, s_1_color, interp.x);\n" + " x_1_color = mix(s_2_color, s_3_color, interp.x);\n" " out_color = mix(x_0_color, x_1_color, interp.y);\n" "}\n", sampler_array_suffix, @@ -606,7 +606,6 @@ GLenum filter, GLint flipX, GLint flipY, GLboolean glsl_version, GLboolean do_depth) { - struct save_state *save = &ctx->Meta->Save[ctx->Meta->SaveStackDepth - 1]; int att_index = do_depth ? BUFFER_DEPTH : readFb->_ColorReadBufferIndex; const struct gl_renderbuffer_attachment *readAtt = &readFb->Attachment[att_index]; @@ -719,57 +718,32 @@ fb_tex_blit.samp_obj = _mesa_meta_setup_sampler(ctx, texObj, target, filter, srcLevel); - /* For desktop GL, we do our blits with no net sRGB decode or encode. - * - * However, if both the src and dst can be srgb decode/encoded, enable them - * so that we do any blending (from scaling or from MSAA resolves) in the - * right colorspace. - * - * Our choice of not doing any net encode/decode is from the GL 3.0 - * specification: - * - * "Blit operations bypass the fragment pipeline. The only fragment - * operations which affect a blit are the pixel ownership test and the - * scissor test." - * - * The GL 4.4 specification disagrees and says that the sRGB part of the - * fragment pipeline applies, but this was found to break applications - * (such as Left 4 Dead 2). - * - * However, for ES 3.0, we follow the specification and perform sRGB - * decoding and encoding. The specification has always been clear in - * the ES world, and hasn't changed over time. - */ if (ctx->Extensions.EXT_texture_sRGB_decode) { - bool src_srgb = _mesa_get_format_color_encoding(rb->Format) == GL_SRGB; - if (save->API == API_OPENGLES2 && ctx->Version >= 30) { - /* From the ES 3.0.4 specification, page 198: - * "When values are taken from the read buffer, if the value of - * FRAMEBUFFER_ATTACHMENT_COLOR_ENCODING for the framebuffer - * attachment corresponding to the read buffer is SRGB (see section - * 6.1.13), the red, green, and blue components are converted from - * the non-linear sRGB color space according to equation 3.24. - * - * When values are written to the draw buffers, blit operations - * bypass the fragment pipeline. The only fragment operations which - * affect a blit are the pixel ownership test, the scissor test, - * and sRGB conversion (see section 4.1.8)." - */ - _mesa_set_sampler_srgb_decode(ctx, fb_tex_blit.samp_obj, - src_srgb ? GL_DECODE_EXT - : GL_SKIP_DECODE_EXT); - _mesa_set_framebuffer_srgb(ctx, drawFb->Visual.sRGBCapable); - } else { - if (src_srgb && drawFb->Visual.sRGBCapable) { - _mesa_set_sampler_srgb_decode(ctx, fb_tex_blit.samp_obj, - GL_DECODE_EXT); - _mesa_set_framebuffer_srgb(ctx, GL_TRUE); - } else { - _mesa_set_sampler_srgb_decode(ctx, fb_tex_blit.samp_obj, - GL_SKIP_DECODE_EXT); - /* set_framebuffer_srgb was set by _mesa_meta_begin(). */ - } - } + /* The GL 4.4 spec, section 18.3.1 ("Blitting Pixel Rectangles") says: + * + * "When values are taken from the read buffer, if FRAMEBUFFER_SRGB + * is enabled and the value of FRAMEBUFFER_ATTACHMENT_COLOR_ENCODING + * for the framebuffer attachment corresponding to the read buffer + * is SRGB (see section 9.2.3), the red, green, and blue components + * are converted from the non-linear sRGB color space according to + * equation 3.24. + * + * When values are written to the draw buffers, blit operations + * bypass most of the fragment pipeline. The only fragment + * operations which affect a blit are the pixel ownership test, + * the scissor test, and sRGB conversion (see section 17.3.9)." + * + * ES 3.0 contains nearly the exact same text, but omits the part + * about GL_FRAMEBUFFER_SRGB as that doesn't exist in ES. Mesa + * defaults it to on for ES contexts, so we can safely check it. + */ + const bool decode = + ctx->Color.sRGBEnabled && + _mesa_get_format_color_encoding(rb->Format) == GL_SRGB; + + _mesa_set_sampler_srgb_decode(ctx, fb_tex_blit.samp_obj, + decode ? GL_DECODE_EXT + : GL_SKIP_DECODE_EXT); } if (!glsl_version) { @@ -1012,10 +986,12 @@ return 0; } - /* Only scissor affects blit, but we're doing to set a custom scissor if - * necessary anyway, so save/clear state. + /* Only scissor and FRAMEBUFFER_SRGB affect blit. Leave sRGB alone, but + * save restore scissor as we'll set a custom scissor if necessary. */ - _mesa_meta_begin(ctx, MESA_META_ALL & ~MESA_META_DRAW_BUFFERS); + _mesa_meta_begin(ctx, MESA_META_ALL & + ~(MESA_META_DRAW_BUFFERS | + MESA_META_FRAMEBUFFER_SRGB)); /* Dithering shouldn't be performed for glBlitFramebuffer */ _mesa_set_enable(ctx, GL_DITHER, GL_FALSE); diff -Nru mesa-12.0.6/src/mesa/drivers/common/meta.c mesa-17.0.7/src/mesa/drivers/common/meta.c --- mesa-12.0.6/src/mesa/drivers/common/meta.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/common/meta.c 2017-06-01 10:37:10.000000000 +0000 @@ -85,6 +85,7 @@ #include "drivers/common/meta.h" #include "main/enums.h" #include "main/glformats.h" +#include "util/bitscan.h" #include "util/ralloc.h" /** Return offset in bytes of the field within a vertex struct */ @@ -121,14 +122,14 @@ level, layer, false, __func__); } -struct gl_shader * -_mesa_meta_compile_shader_with_debug(struct gl_context *ctx, GLenum target, - const GLcharARB *source) +static struct gl_shader * +meta_compile_shader_with_debug(struct gl_context *ctx, gl_shader_stage stage, + const GLcharARB *source) { const GLuint name = ~0; struct gl_shader *sh; - sh = ctx->Driver.NewShader(ctx, name, target); + sh = _mesa_new_shader(name, stage); sh->Source = strdup(source); sh->CompileStatus = false; _mesa_compile_shader(ctx, sh); @@ -152,8 +153,9 @@ { _mesa_link_program(ctx, sh_prog); - if (!sh_prog->LinkStatus) { - _mesa_problem(ctx, "meta program link failed:\n%s", sh_prog->InfoLog); + if (!sh_prog->data->LinkStatus) { + _mesa_problem(ctx, "meta program link failed:\n%s", + sh_prog->data->InfoLog); } } @@ -183,9 +185,9 @@ sh_prog->NumShaders = 2; sh_prog->Shaders = malloc(2 * sizeof(struct gl_shader *)); sh_prog->Shaders[0] = - _mesa_meta_compile_shader_with_debug(ctx, GL_VERTEX_SHADER, vs_source); + meta_compile_shader_with_debug(ctx, MESA_SHADER_VERTEX, vs_source); sh_prog->Shaders[1] = - _mesa_meta_compile_shader_with_debug(ctx, GL_FRAGMENT_SHADER, fs_source); + meta_compile_shader_with_debug(ctx, MESA_SHADER_FRAGMENT, fs_source); _mesa_meta_link_program_with_debug(ctx, sh_prog); @@ -565,15 +567,15 @@ if (ctx->Extensions.ARB_vertex_program) { save->VertexProgramEnabled = ctx->VertexProgram.Enabled; - _mesa_reference_vertprog(ctx, &save->VertexProgram, - ctx->VertexProgram.Current); + _mesa_reference_program(ctx, &save->VertexProgram, + ctx->VertexProgram.Current); _mesa_set_enable(ctx, GL_VERTEX_PROGRAM_ARB, GL_FALSE); } if (ctx->Extensions.ARB_fragment_program) { save->FragmentProgramEnabled = ctx->FragmentProgram.Enabled; - _mesa_reference_fragprog(ctx, &save->FragmentProgram, - ctx->FragmentProgram.Current); + _mesa_reference_program(ctx, &save->FragmentProgram, + ctx->FragmentProgram.Current); _mesa_set_enable(ctx, GL_FRAGMENT_PROGRAM_ARB, GL_FALSE); } @@ -682,12 +684,12 @@ } if (state & MESA_META_CLIP) { + GLbitfield mask; save->ClipPlanesEnabled = ctx->Transform.ClipPlanesEnabled; - if (ctx->Transform.ClipPlanesEnabled) { - GLuint i; - for (i = 0; i < ctx->Const.MaxClipPlanes; i++) { - _mesa_set_enable(ctx, GL_CLIP_PLANE0 + i, GL_FALSE); - } + mask = ctx->Transform.ClipPlanesEnabled; + while (mask) { + const int i = u_bit_scan(&mask); + _mesa_set_enable(ctx, GL_CLIP_PLANE0 + i, GL_FALSE); } } @@ -728,7 +730,7 @@ */ if (ctx->Color.ClampFragmentColor != GL_TRUE && ctx->Extensions.ARB_color_buffer_float) - _mesa_ClampColor(GL_CLAMP_FRAGMENT_COLOR, GL_FALSE); + _mesa_ClampColor(GL_CLAMP_FRAGMENT_COLOR, GL_FALSE); } if (state & MESA_META_CLAMP_VERTEX_COLOR) { @@ -746,17 +748,17 @@ save->CondRenderMode = ctx->Query.CondRenderMode; if (ctx->Query.CondRenderQuery) - _mesa_EndConditionalRender(); + _mesa_EndConditionalRender(); } if (state & MESA_META_SELECT_FEEDBACK) { save->RenderMode = ctx->RenderMode; if (ctx->RenderMode == GL_SELECT) { - save->Select = ctx->Select; /* struct copy */ - _mesa_RenderMode(GL_RENDER); + save->Select = ctx->Select; /* struct copy */ + _mesa_RenderMode(GL_RENDER); } else if (ctx->RenderMode == GL_FEEDBACK) { - save->Feedback = ctx->Feedback; /* struct copy */ - _mesa_RenderMode(GL_RENDER); + save->Feedback = ctx->Feedback; /* struct copy */ + _mesa_RenderMode(GL_RENDER); } } @@ -944,17 +946,17 @@ if (ctx->Extensions.ARB_vertex_program) { _mesa_set_enable(ctx, GL_VERTEX_PROGRAM_ARB, save->VertexProgramEnabled); - _mesa_reference_vertprog(ctx, &ctx->VertexProgram.Current, - save->VertexProgram); - _mesa_reference_vertprog(ctx, &save->VertexProgram, NULL); + _mesa_reference_program(ctx, &ctx->VertexProgram.Current, + save->VertexProgram); + _mesa_reference_program(ctx, &save->VertexProgram, NULL); } if (ctx->Extensions.ARB_fragment_program) { _mesa_set_enable(ctx, GL_FRAGMENT_PROGRAM_ARB, save->FragmentProgramEnabled); - _mesa_reference_fragprog(ctx, &ctx->FragmentProgram.Current, - save->FragmentProgram); - _mesa_reference_fragprog(ctx, &save->FragmentProgram, NULL); + _mesa_reference_program(ctx, &ctx->FragmentProgram.Current, + save->FragmentProgram); + _mesa_reference_program(ctx, &save->FragmentProgram, NULL); } if (ctx->Extensions.ATI_fragment_shader) { @@ -1045,11 +1047,11 @@ /* restore texture objects for unit[0] only */ for (tgt = 0; tgt < NUM_TEXTURE_TARGETS; tgt++) { - if (ctx->Texture.Unit[0].CurrentTex[tgt] != save->CurrentTexture[tgt]) { - FLUSH_VERTICES(ctx, _NEW_TEXTURE); - _mesa_reference_texobj(&ctx->Texture.Unit[0].CurrentTex[tgt], - save->CurrentTexture[tgt]); - } + if (ctx->Texture.Unit[0].CurrentTex[tgt] != save->CurrentTexture[tgt]) { + FLUSH_VERTICES(ctx, _NEW_TEXTURE); + _mesa_reference_texobj(&ctx->Texture.Unit[0].CurrentTex[tgt], + save->CurrentTexture[tgt]); + } _mesa_reference_texobj(&save->CurrentTexture[tgt], NULL); } @@ -1090,13 +1092,10 @@ } if (state & MESA_META_CLIP) { - if (save->ClipPlanesEnabled) { - GLuint i; - for (i = 0; i < ctx->Const.MaxClipPlanes; i++) { - if (save->ClipPlanesEnabled & (1 << i)) { - _mesa_set_enable(ctx, GL_CLIP_PLANE0 + i, GL_TRUE); - } - } + GLbitfield mask = save->ClipPlanesEnabled; + while (mask) { + const int i = u_bit_scan(&mask); + _mesa_set_enable(ctx, GL_CLIP_PLANE0 + i, GL_TRUE); } } @@ -1129,17 +1128,17 @@ if (state & MESA_META_CONDITIONAL_RENDER) { if (save->CondRenderQuery) - _mesa_BeginConditionalRender(save->CondRenderQuery->Id, - save->CondRenderMode); + _mesa_BeginConditionalRender(save->CondRenderQuery->Id, + save->CondRenderMode); } if (state & MESA_META_SELECT_FEEDBACK) { if (save->RenderMode == GL_SELECT) { - _mesa_RenderMode(GL_SELECT); - ctx->Select = save->Select; + _mesa_RenderMode(GL_SELECT); + ctx->Select = save->Select; } else if (save->RenderMode == GL_FEEDBACK) { - _mesa_RenderMode(GL_FEEDBACK); - ctx->Feedback = save->Feedback; + _mesa_RenderMode(GL_FEEDBACK); + ctx->Feedback = save->Feedback; } } @@ -1431,17 +1430,17 @@ tex->Width, tex->Height, 0, format, type, pixels); } else { - struct gl_buffer_object *save_unpack_obj = NULL; + struct gl_buffer_object *save_unpack_obj = NULL; - _mesa_reference_buffer_object(ctx, &save_unpack_obj, - ctx->Unpack.BufferObj); - _mesa_BindBuffer(GL_PIXEL_UNPACK_BUFFER_ARB, 0); + _mesa_reference_buffer_object(ctx, &save_unpack_obj, + ctx->Unpack.BufferObj); + _mesa_BindBuffer(GL_PIXEL_UNPACK_BUFFER_ARB, 0); /* create empty texture */ _mesa_TexImage2D(tex->Target, 0, tex->IntFormat, tex->Width, tex->Height, 0, format, type, NULL); - if (save_unpack_obj != NULL) - _mesa_BindBuffer(GL_PIXEL_UNPACK_BUFFER_ARB, - save_unpack_obj->Name); + if (save_unpack_obj != NULL) + _mesa_BindBuffer(GL_PIXEL_UNPACK_BUFFER_ARB, + save_unpack_obj->Name); /* load image */ _mesa_TexSubImage2D(tex->Target, 0, 0, 0, width, height, format, type, pixels); @@ -1705,16 +1704,16 @@ int i; metaSave = (MESA_META_ALPHA_TEST | - MESA_META_BLEND | + MESA_META_BLEND | MESA_META_COLOR_MASK | - MESA_META_DEPTH_TEST | - MESA_META_RASTERIZATION | - MESA_META_SHADER | - MESA_META_STENCIL_TEST | - MESA_META_VERTEX | - MESA_META_VIEWPORT | - MESA_META_CLIP | - MESA_META_CLAMP_FRAGMENT_COLOR | + MESA_META_DEPTH_TEST | + MESA_META_RASTERIZATION | + MESA_META_SHADER | + MESA_META_STENCIL_TEST | + MESA_META_VERTEX | + MESA_META_VIEWPORT | + MESA_META_CLIP | + MESA_META_CLAMP_FRAGMENT_COLOR | MESA_META_MULTISAMPLE | MESA_META_OCCLUSION_QUERY); @@ -1752,7 +1751,7 @@ z = invert_z(ctx->Depth.Clear); } - if (fb->_IntegerColor) { + if (fb->_IntegerBuffers) { assert(glsl); _mesa_meta_use_program(ctx, clear->IntegerShaderProg); _mesa_Uniform4iv(0, 1, ctx->Color.ClearColor.i); @@ -2125,8 +2124,8 @@ * point. */ if (ctx->Color.ClampFragmentColor != GL_TRUE && - ctx->Extensions.ARB_texture_float) - texIntFormat = GL_RGBA32F; + ctx->Extensions.ARB_texture_float) + texIntFormat = GL_RGBA32F; } else if (_mesa_is_stencil_format(format)) { if (ctx->Extensions.ARB_fragment_program && @@ -2314,24 +2313,24 @@ switch (ctx->Color.AlphaFunc) { case GL_NEVER: - return GL_FALSE; + return GL_FALSE; case GL_LESS: - return alpha < ref; + return alpha < ref; case GL_EQUAL: - return alpha == ref; + return alpha == ref; case GL_LEQUAL: - return alpha <= ref; + return alpha <= ref; case GL_GREATER: - return alpha > ref; + return alpha > ref; case GL_NOTEQUAL: - return alpha != ref; + return alpha != ref; case GL_GEQUAL: - return alpha >= ref; + return alpha >= ref; case GL_ALWAYS: - return GL_TRUE; + return GL_TRUE; default: - assert(0); - return GL_FALSE; + assert(0); + return GL_FALSE; } } @@ -2770,7 +2769,7 @@ return GL_UNSIGNED_INT_24_8; default: _mesa_problem(ctx, "Unexpected format %d in get_temp_image_type()", - baseFormat); + baseFormat); return 0; } } @@ -2919,7 +2918,7 @@ */ _mesa_meta_begin(ctx, MESA_META_PIXEL_STORE | MESA_META_PIXEL_TRANSFER); ctx->Driver.ReadPixels(ctx, x, y, width, height, - format, type, &ctx->Pack, buf); + format, type, &ctx->Pack, buf); _mesa_meta_end(ctx); _mesa_update_state(ctx); /* to update pixel transfer state */ @@ -3028,10 +3027,6 @@ assert(!"No compressed 1D textures."); return false; - case GL_TEXTURE_3D: - assert(!"No compressed 3D textures."); - return false; - case GL_TEXTURE_CUBE_MAP_ARRAY: faceTarget = GL_TEXTURE_CUBE_MAP_POSITIVE_X + (slice % 6); break; @@ -3206,8 +3201,8 @@ if (_mesa_need_luminance_to_rgb_conversion(baseTexFormat, destBaseFormat) || /* If we're reading back an RGB(A) texture (using glGetTexImage) as - * luminance then we need to return L=tex(R). - */ + * luminance then we need to return L=tex(R). + */ _mesa_need_rgb_to_luminance_conversion(baseTexFormat, destBaseFormat)) { /* Green and blue must be zero */ @@ -3249,8 +3244,20 @@ for (slice = 0; slice < depth; slice++) { void *dst; - if (texImage->TexObject->Target == GL_TEXTURE_2D_ARRAY - || texImage->TexObject->Target == GL_TEXTURE_CUBE_MAP_ARRAY) { + /* Section 8.11.4 (Texture Image Queries) of the GL 4.5 spec says: + * + * "For three-dimensional, two-dimensional array, cube map array, + * and cube map textures pixel storage operations are applied as + * if the image were two-dimensional, except that the additional + * pixel storage state values PACK_IMAGE_HEIGHT and + * PACK_SKIP_IMAGES are applied. The correspondence of texels to + * memory locations is as defined for TexImage3D in section 8.5." + */ + switch (texImage->TexObject->Target) { + case GL_TEXTURE_3D: + case GL_TEXTURE_2D_ARRAY: + case GL_TEXTURE_CUBE_MAP: + case GL_TEXTURE_CUBE_MAP_ARRAY: { /* Setup pixel packing. SkipPixels and SkipRows will be applied * in the decompress_texture_image() function's call to * glReadPixels but we need to compute the dest slice's address @@ -3261,9 +3268,11 @@ packing.SkipRows = 0; dst = _mesa_image_address3d(&packing, pixels, width, height, format, type, slice, 0, 0); + break; } - else { + default: dst = pixels; + break; } result = decompress_texture_image(ctx, texImage, slice, xoffset, yoffset, width, height, diff -Nru mesa-12.0.6/src/mesa/drivers/common/meta_copy_image.c mesa-17.0.7/src/mesa/drivers/common/meta_copy_image.c --- mesa-12.0.6/src/mesa/drivers/common/meta_copy_image.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/common/meta_copy_image.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,307 +0,0 @@ -/* - * Mesa 3-D graphics library - * - * Copyright (C) 2014 Intel Corporation. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included - * in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include "glheader.h" -#include "context.h" -#include "enums.h" -#include "imports.h" -#include "macros.h" -#include "teximage.h" -#include "texobj.h" -#include "fbobject.h" -#include "framebuffer.h" -#include "buffers.h" -#include "state.h" -#include "mtypes.h" -#include "meta.h" - -/** - * Create a texture image that wraps a renderbuffer. - */ -static struct gl_texture_image * -wrap_renderbuffer(struct gl_context *ctx, struct gl_renderbuffer *rb) -{ - GLenum texTarget; - struct gl_texture_object *texObj; - struct gl_texture_image *texImage; - - if (rb->NumSamples > 1) - texTarget = GL_TEXTURE_2D_MULTISAMPLE; - else - texTarget = GL_TEXTURE_2D; - - /* Texture ID is not significant since it never goes into the hash table */ - texObj = ctx->Driver.NewTextureObject(ctx, 0, texTarget); - assert(texObj); - if (!texObj) - return NULL; - - texImage = _mesa_get_tex_image(ctx, texObj, texTarget, 0); - assert(texImage); - if (!texImage) - return NULL; - - if (!ctx->Driver.BindRenderbufferTexImage(ctx, rb, texImage)) { - _mesa_problem(ctx, "Failed to create texture from renderbuffer"); - return NULL; - } - - if (ctx->Driver.FinishRenderTexture && !rb->NeedsFinishRenderTexture) { - rb->NeedsFinishRenderTexture = true; - ctx->Driver.FinishRenderTexture(ctx, rb); - } - - return texImage; -} - - -/* This function makes a texture view without bothering with all of the API - * checks. Most of them are the same for CopyTexSubImage so checking would - * be redundant. The one major difference is that we don't check for - * whether the texture is immutable or not. However, since the view will - * be created and then immediately destroyed, this should not be a problem. - */ -static bool -make_view(struct gl_context *ctx, struct gl_texture_image *tex_image, - struct gl_texture_image **view_tex_image, GLuint *view_tex_name, - GLenum internal_format) -{ - struct gl_texture_object *tex_obj = tex_image->TexObject; - struct gl_texture_object *view_tex_obj; - mesa_format tex_format; - - /* Set up the new texture object */ - _mesa_GenTextures(1, view_tex_name); - view_tex_obj = _mesa_lookup_texture(ctx, *view_tex_name); - if (!view_tex_obj) - return false; - - tex_format = _mesa_choose_texture_format(ctx, view_tex_obj, tex_obj->Target, - 0, internal_format, - GL_NONE, GL_NONE); - - if (!ctx->Driver.TestProxyTexImage(ctx, tex_obj->Target, 0, tex_format, - tex_image->Width, tex_image->Height, - tex_image->Depth, 0)) { - _mesa_DeleteTextures(1, view_tex_name); - *view_tex_name = 0; - return false; - } - - assert(tex_obj->Target != 0); - assert(tex_obj->TargetIndex < NUM_TEXTURE_TARGETS); - - view_tex_obj->Target = tex_obj->Target; - view_tex_obj->TargetIndex = tex_obj->TargetIndex; - - *view_tex_image = _mesa_get_tex_image(ctx, view_tex_obj, tex_obj->Target, 0); - - if (!*view_tex_image) { - _mesa_DeleteTextures(1, view_tex_name); - *view_tex_name = 0; - return false; - } - - _mesa_init_teximage_fields(ctx, *view_tex_image, - tex_image->Width, tex_image->Height, - tex_image->Depth, - 0, internal_format, tex_format); - - view_tex_obj->MinLevel = tex_image->Level; - view_tex_obj->NumLevels = 1; - view_tex_obj->MinLayer = tex_obj->MinLayer; - view_tex_obj->NumLayers = tex_obj->NumLayers; - view_tex_obj->Immutable = tex_obj->Immutable; - view_tex_obj->ImmutableLevels = tex_obj->ImmutableLevels; - - if (ctx->Driver.TextureView != NULL && - !ctx->Driver.TextureView(ctx, view_tex_obj, tex_obj)) { - _mesa_DeleteTextures(1, view_tex_name); - *view_tex_name = 0; - return false; /* driver recorded error */ - } - - return true; -} - -/** A partial implementation of glCopyImageSubData - * - * This is a partial implementation of glCopyImageSubData that works only - * if both textures are uncompressed and the destination texture is - * renderable. It uses a slight abuse of a texture view (see make_view) to - * turn the source texture into the destination texture type and then uses - * _mesa_meta_BlitFramebuffers to do the copy. - */ -bool -_mesa_meta_CopyImageSubData_uncompressed(struct gl_context *ctx, - struct gl_texture_image *src_tex_image, - struct gl_renderbuffer *src_renderbuffer, - int src_x, int src_y, int src_z, - struct gl_texture_image *dst_tex_image, - struct gl_renderbuffer *dst_renderbuffer, - int dst_x, int dst_y, int dst_z, - int src_width, int src_height) -{ - mesa_format src_format, dst_format; - GLint src_internal_format, dst_internal_format; - GLuint src_view_texture = 0; - struct gl_texture_image *src_view_tex_image; - struct gl_framebuffer *readFb; - struct gl_framebuffer *drawFb = NULL; - bool success = false; - GLbitfield mask; - GLenum status, attachment; - - if (src_renderbuffer) { - src_format = src_renderbuffer->Format; - src_internal_format = src_renderbuffer->InternalFormat; - } else { - assert(src_tex_image); - src_format = src_tex_image->TexFormat; - src_internal_format = src_tex_image->InternalFormat; - } - - if (dst_renderbuffer) { - dst_format = dst_renderbuffer->Format; - dst_internal_format = dst_renderbuffer->InternalFormat; - } else { - assert(dst_tex_image); - dst_format = dst_tex_image->TexFormat; - dst_internal_format = dst_tex_image->InternalFormat; - } - - if (_mesa_is_format_compressed(src_format)) - return false; - - if (_mesa_is_format_compressed(dst_format)) - return false; - - if (src_internal_format == dst_internal_format) { - src_view_tex_image = src_tex_image; - } else { - if (src_renderbuffer) { - assert(src_tex_image == NULL); - src_tex_image = wrap_renderbuffer(ctx, src_renderbuffer); - } - if (!make_view(ctx, src_tex_image, &src_view_tex_image, &src_view_texture, - dst_internal_format)) - goto cleanup; - } - - /* We really only need to stash the bound framebuffers and scissor. */ - _mesa_meta_begin(ctx, MESA_META_SCISSOR); - - readFb = ctx->Driver.NewFramebuffer(ctx, 0xDEADBEEF); - if (readFb == NULL) - goto meta_end; - - drawFb = ctx->Driver.NewFramebuffer(ctx, 0xDEADBEEF); - if (drawFb == NULL) - goto meta_end; - - _mesa_bind_framebuffers(ctx, drawFb, readFb); - - switch (_mesa_get_format_base_format(src_format)) { - case GL_DEPTH_COMPONENT: - attachment = GL_DEPTH_ATTACHMENT; - mask = GL_DEPTH_BUFFER_BIT; - break; - case GL_DEPTH_STENCIL: - attachment = GL_DEPTH_STENCIL_ATTACHMENT; - mask = GL_DEPTH_BUFFER_BIT | GL_STENCIL_BUFFER_BIT; - break; - case GL_STENCIL_INDEX: - attachment = GL_STENCIL_ATTACHMENT; - mask = GL_STENCIL_BUFFER_BIT; - break; - default: - attachment = GL_COLOR_ATTACHMENT0; - mask = GL_COLOR_BUFFER_BIT; - _mesa_DrawBuffer(GL_COLOR_ATTACHMENT0); - _mesa_ReadBuffer(GL_COLOR_ATTACHMENT0); - } - - if (src_view_tex_image) { - /* Prefer the tex image because, even if we have a renderbuffer, we may - * have had to wrap it in a texture view. - */ - _mesa_meta_framebuffer_texture_image(ctx, ctx->ReadBuffer, attachment, - src_view_tex_image, src_z); - } else { - _mesa_framebuffer_renderbuffer(ctx, ctx->ReadBuffer, attachment, - src_renderbuffer); - } - - status = _mesa_check_framebuffer_status(ctx, ctx->ReadBuffer); - if (status != GL_FRAMEBUFFER_COMPLETE) - goto meta_end; - - if (dst_renderbuffer) { - _mesa_framebuffer_renderbuffer(ctx, ctx->DrawBuffer, attachment, - dst_renderbuffer); - } else { - _mesa_meta_framebuffer_texture_image(ctx, ctx->DrawBuffer, attachment, - dst_tex_image, dst_z); - } - - status = _mesa_check_framebuffer_status(ctx, ctx->DrawBuffer); - if (status != GL_FRAMEBUFFER_COMPLETE) - goto meta_end; - - /* Explicitly disable sRGB encoding */ - ctx->DrawBuffer->Visual.sRGBCapable = false; - - /* Since we've bound a new draw framebuffer, we need to update its - * derived state -- _Xmin, etc -- for BlitFramebuffer's clipping to - * be correct. - */ - _mesa_update_state(ctx); - - /* We skip the core BlitFramebuffer checks for format consistency. - * We have already created views to ensure that the texture formats - * match. - */ - ctx->Driver.BlitFramebuffer(ctx, ctx->ReadBuffer, ctx->DrawBuffer, - src_x, src_y, - src_x + src_width, src_y + src_height, - dst_x, dst_y, - dst_x + src_width, dst_y + src_height, - mask, GL_NEAREST); - - success = true; - -meta_end: - _mesa_reference_framebuffer(&readFb, NULL); - _mesa_reference_framebuffer(&drawFb, NULL); - _mesa_meta_end(ctx); - -cleanup: - _mesa_DeleteTextures(1, &src_view_texture); - - /* If we got a renderbuffer source, delete the temporary texture */ - if (src_renderbuffer && src_tex_image) - ctx->Driver.DeleteTexture(ctx, src_tex_image->TexObject); - - return success; -} diff -Nru mesa-12.0.6/src/mesa/drivers/common/meta_generate_mipmap.c mesa-17.0.7/src/mesa/drivers/common/meta_generate_mipmap.c --- mesa-12.0.6/src/mesa/drivers/common/meta_generate_mipmap.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/common/meta_generate_mipmap.c 2017-06-01 10:37:10.000000000 +0000 @@ -182,6 +182,7 @@ _mesa_meta_begin(ctx, MESA_META_ALL & ~MESA_META_DRAW_BUFFERS); _mesa_ColorMask(GL_TRUE, GL_TRUE, GL_TRUE, GL_TRUE); + _mesa_Disable(GL_DITHER); /* Choose between glsl version and fixed function version of * GenerateMipmap function. @@ -221,9 +222,17 @@ GL_LINEAR); _mesa_set_sampler_wrap(ctx, mipmap->samp_obj, GL_CLAMP_TO_EDGE, GL_CLAMP_TO_EDGE, GL_CLAMP_TO_EDGE); + } - /* We don't want to encode or decode sRGB values; treat them as linear. */ - _mesa_set_sampler_srgb_decode(ctx, mipmap->samp_obj, GL_SKIP_DECODE_EXT); + if (ctx->Extensions.EXT_texture_sRGB_decode) { + const struct gl_texture_image *baseImage = + _mesa_select_tex_image(texObj, target, texObj->BaseLevel); + const bool srgb = + _mesa_get_format_color_encoding(baseImage->TexFormat) == GL_SRGB; + + _mesa_set_sampler_srgb_decode(ctx, mipmap->samp_obj, + srgb ? GL_DECODE_EXT : GL_SKIP_DECODE_EXT); + _mesa_set_framebuffer_srgb(ctx, srgb); } _mesa_bind_sampler(ctx, ctx->Texture.CurrentUnit, mipmap->samp_obj); diff -Nru mesa-12.0.6/src/mesa/drivers/common/meta.h mesa-17.0.7/src/mesa/drivers/common/meta.h --- mesa-12.0.6/src/mesa/drivers/common/meta.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/common/meta.h 2017-06-01 10:37:10.000000000 +0000 @@ -121,9 +121,9 @@ /** MESA_META_SHADER */ GLboolean VertexProgramEnabled; - struct gl_vertex_program *VertexProgram; + struct gl_program *VertexProgram; GLboolean FragmentProgramEnabled; - struct gl_fragment_program *FragmentProgram; + struct gl_program *FragmentProgram; GLboolean ATIFragmentShaderEnabled; struct gl_shader_program *Shader[MESA_SHADER_STAGES]; struct gl_shader_program *ActiveShader; @@ -492,16 +492,6 @@ GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter); -bool -_mesa_meta_CopyImageSubData_uncompressed(struct gl_context *ctx, - struct gl_texture_image *src_tex_image, - struct gl_renderbuffer *src_renderbuffer, - int src_x, int src_y, int src_z, - struct gl_texture_image *dst_tex_image, - struct gl_renderbuffer *dst_renderbuffer, - int dst_x, int dst_y, int dst_z, - int src_width, int src_height); - extern void _mesa_meta_Clear(struct gl_context *ctx, GLbitfield buffers); @@ -577,11 +567,6 @@ void _mesa_meta_drawbuffers_from_bitfield(GLbitfield bits); -struct gl_shader * -_mesa_meta_compile_shader_with_debug(struct gl_context *ctx, GLenum target, - const GLcharARB *source); - - void _mesa_meta_link_program_with_debug(struct gl_context *ctx, struct gl_shader_program *sh_prog); diff -Nru mesa-12.0.6/src/mesa/drivers/common/meta_tex_subimage.c mesa-17.0.7/src/mesa/drivers/common/meta_tex_subimage.c --- mesa-12.0.6/src/mesa/drivers/common/meta_tex_subimage.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/common/meta_tex_subimage.c 2017-06-01 10:37:10.000000000 +0000 @@ -235,7 +235,7 @@ if (drawFb == NULL) goto fail; - _mesa_bind_framebuffers(ctx, drawFb, tex_image ? readFb : ctx->ReadBuffer); + _mesa_bind_framebuffers(ctx, drawFb, readFb); if (tex_image->TexObject->Target == GL_TEXTURE_1D_ARRAY) { assert(depth == 1); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/common/drirc mesa-17.0.7/src/mesa/drivers/dri/common/drirc --- mesa-12.0.6/src/mesa/drivers/dri/common/drirc 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/common/drirc 2017-06-01 10:37:10.000000000 +0000 @@ -100,5 +100,9 @@ + + + diff -Nru mesa-12.0.6/src/mesa/drivers/dri/common/dri_test.c mesa-17.0.7/src/mesa/drivers/dri/common/dri_test.c --- mesa-12.0.6/src/mesa/drivers/dri/common/dri_test.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/common/dri_test.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,96 +0,0 @@ -#include "main/glheader.h" -#include "main/compiler.h" -#include "glapi/glapi.h" - -/* This is just supposed to make sure we get a reference to - the driver entry symbol that the compiler doesn't optimize away */ - -extern char __driDriverExtensions[]; - -/* provide glapi symbols */ - -#if defined(GLX_USE_TLS) - -PUBLIC __thread struct _glapi_table * _glapi_tls_Dispatch - __attribute__((tls_model("initial-exec"))); - -PUBLIC __thread void * _glapi_tls_Context - __attribute__((tls_model("initial-exec"))); - -PUBLIC const struct _glapi_table *_glapi_Dispatch; -PUBLIC const void *_glapi_Context; - -#else - -PUBLIC struct _glapi_table *_glapi_Dispatch; -PUBLIC void *_glapi_Context; - -#endif - -PUBLIC void -_glapi_check_multithread(void) -{} - -PUBLIC void -_glapi_set_context(void *context) -{} - -PUBLIC void * -_glapi_get_context(void) -{ - return 0; -} - -PUBLIC void -_glapi_set_dispatch(struct _glapi_table *dispatch) -{} - -PUBLIC struct _glapi_table * -_glapi_get_dispatch(void) -{ - return 0; -} - -PUBLIC int -_glapi_add_dispatch( const char * const * function_names, - const char * parameter_signature ) -{ - return 0; -} - -PUBLIC GLint -_glapi_get_proc_offset(const char *funcName) -{ - return 0; -} - -PUBLIC _glapi_proc -_glapi_get_proc_address(const char *funcName) -{ - return 0; -} - -PUBLIC GLuint -_glapi_get_dispatch_table_size(void) -{ - return 0; -} - -PUBLIC void -_glapi_set_nop_handler(_glapi_nop_handler_proc func) -{ -} - -PUBLIC struct _glapi_table * -_glapi_new_nop_table(unsigned num_entries) -{ - return NULL; -} - -#ifndef NO_MAIN -int main(int argc, char** argv) -{ - void* p = __driDriverExtensions; - return (int)(unsigned long)p; -} -#endif diff -Nru mesa-12.0.6/src/mesa/drivers/dri/common/dri_util.c mesa-17.0.7/src/mesa/drivers/dri/common/dri_util.c --- mesa-12.0.6/src/mesa/drivers/dri/common/dri_util.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/common/dri_util.c 2017-06-01 10:37:10.000000000 +0000 @@ -645,6 +645,8 @@ { __DRIdrawable *pdraw; + assert(data != NULL); + pdraw = malloc(sizeof *pdraw); if (!pdraw) return NULL; @@ -674,6 +676,16 @@ static void driDestroyDrawable(__DRIdrawable *pdp) { + /* + * The loader's data structures are going away, even if pdp itself stays + * around for the time being because it is currently bound. This happens + * when a currently bound GLX pixmap is destroyed. + * + * Clear out the pointer back into the loader's data structures to avoid + * accessing an outdated pointer. + */ + pdp->loaderPrivate = NULL; + dri_put_drawable(pdp); } @@ -830,6 +842,8 @@ switch (format) { case MESA_FORMAT_B5G6R5_UNORM: return __DRI_IMAGE_FORMAT_RGB565; + case MESA_FORMAT_B5G5R5A1_UNORM: + return __DRI_IMAGE_FORMAT_ARGB1555; case MESA_FORMAT_B8G8R8X8_UNORM: return __DRI_IMAGE_FORMAT_XRGB8888; case MESA_FORMAT_B10G10R10A2_UNORM: @@ -842,8 +856,10 @@ return __DRI_IMAGE_FORMAT_ABGR8888; case MESA_FORMAT_R8G8B8X8_UNORM: return __DRI_IMAGE_FORMAT_XBGR8888; + case MESA_FORMAT_L_UNORM8: case MESA_FORMAT_R_UNORM8: return __DRI_IMAGE_FORMAT_R8; + case MESA_FORMAT_L8A8_UNORM: case MESA_FORMAT_R8G8_UNORM: return __DRI_IMAGE_FORMAT_GR88; case MESA_FORMAT_NONE: @@ -861,6 +877,8 @@ switch (image_format) { case __DRI_IMAGE_FORMAT_RGB565: return MESA_FORMAT_B5G6R5_UNORM; + case __DRI_IMAGE_FORMAT_ARGB1555: + return MESA_FORMAT_B5G5R5A1_UNORM; case __DRI_IMAGE_FORMAT_XRGB8888: return MESA_FORMAT_B8G8R8X8_UNORM; case __DRI_IMAGE_FORMAT_ARGB2101010: diff -Nru mesa-12.0.6/src/mesa/drivers/dri/common/Makefile.am mesa-17.0.7/src/mesa/drivers/dri/common/Makefile.am --- mesa-12.0.6/src/mesa/drivers/dri/common/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/common/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -40,8 +40,7 @@ noinst_LTLIBRARIES = \ libdricommon.la \ libxmlconfig.la \ - libmegadriver_stub.la \ - libdri_test_stubs.la + libmegadriver_stub.la libdricommon_la_SOURCES = $(DRI_COMMON_FILES) @@ -49,9 +48,6 @@ libxmlconfig_la_CFLAGS = $(AM_CFLAGS) $(EXPAT_CFLAGS) libxmlconfig_la_LIBADD = $(EXPAT_LIBS) -lm -libdri_test_stubs_la_SOURCES = $(test_stubs_FILES) -libdri_test_stubs_la_CFLAGS = $(AM_CFLAGS) -DNO_MAIN - libmegadriver_stub_la_SOURCES = $(megadriver_stub_FILES) sysconf_DATA = drirc diff -Nru mesa-12.0.6/src/mesa/drivers/dri/common/Makefile.in mesa-17.0.7/src/mesa/drivers/dri/common/Makefile.in --- mesa-12.0.6/src/mesa/drivers/dri/common/Makefile.in 2017-01-24 01:41:55.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/common/Makefile.in 2017-06-01 10:37:24.000000000 +0000 @@ -130,30 +130,22 @@ CONFIG_CLEAN_FILES = CONFIG_CLEAN_VPATH_FILES = LTLIBRARIES = $(noinst_LTLIBRARIES) -libdri_test_stubs_la_LIBADD = -am__objects_1 = libdri_test_stubs_la-dri_test.lo -am_libdri_test_stubs_la_OBJECTS = $(am__objects_1) -libdri_test_stubs_la_OBJECTS = $(am_libdri_test_stubs_la_OBJECTS) +libdricommon_la_LIBADD = +am__objects_1 = utils.lo dri_util.lo +am_libdricommon_la_OBJECTS = $(am__objects_1) +libdricommon_la_OBJECTS = $(am_libdricommon_la_OBJECTS) AM_V_lt = $(am__v_lt_@AM_V@) am__v_lt_ = $(am__v_lt_@AM_DEFAULT_V@) am__v_lt_0 = --silent am__v_lt_1 = -libdri_test_stubs_la_LINK = $(LIBTOOL) $(AM_V_lt) --tag=CC \ - $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=link $(CCLD) \ - $(libdri_test_stubs_la_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) \ - $(LDFLAGS) -o $@ -libdricommon_la_LIBADD = -am__objects_2 = utils.lo dri_util.lo -am_libdricommon_la_OBJECTS = $(am__objects_2) -libdricommon_la_OBJECTS = $(am_libdricommon_la_OBJECTS) libmegadriver_stub_la_LIBADD = -am__objects_3 = megadriver_stub.lo -am_libmegadriver_stub_la_OBJECTS = $(am__objects_3) +am__objects_2 = megadriver_stub.lo +am_libmegadriver_stub_la_OBJECTS = $(am__objects_2) libmegadriver_stub_la_OBJECTS = $(am_libmegadriver_stub_la_OBJECTS) am__DEPENDENCIES_1 = libxmlconfig_la_DEPENDENCIES = $(am__DEPENDENCIES_1) -am__objects_4 = libxmlconfig_la-xmlconfig.lo -am_libxmlconfig_la_OBJECTS = $(am__objects_4) +am__objects_3 = libxmlconfig_la-xmlconfig.lo +am_libxmlconfig_la_OBJECTS = $(am__objects_3) libxmlconfig_la_OBJECTS = $(am_libxmlconfig_la_OBJECTS) libxmlconfig_la_LINK = $(LIBTOOL) $(AM_V_lt) --tag=CC \ $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=link $(CCLD) \ @@ -193,11 +185,10 @@ am__v_CCLD_ = $(am__v_CCLD_@AM_DEFAULT_V@) am__v_CCLD_0 = @echo " CCLD " $@; am__v_CCLD_1 = -SOURCES = $(libdri_test_stubs_la_SOURCES) $(libdricommon_la_SOURCES) \ - $(libmegadriver_stub_la_SOURCES) $(libxmlconfig_la_SOURCES) -DIST_SOURCES = $(libdri_test_stubs_la_SOURCES) \ - $(libdricommon_la_SOURCES) $(libmegadriver_stub_la_SOURCES) \ +SOURCES = $(libdricommon_la_SOURCES) $(libmegadriver_stub_la_SOURCES) \ $(libxmlconfig_la_SOURCES) +DIST_SOURCES = $(libdricommon_la_SOURCES) \ + $(libmegadriver_stub_la_SOURCES) $(libxmlconfig_la_SOURCES) RECURSIVE_TARGETS = all-recursive check-recursive cscopelist-recursive \ ctags-recursive dvi-recursive html-recursive info-recursive \ install-data-recursive install-dvi-recursive \ @@ -301,6 +292,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -315,6 +308,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -344,10 +338,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -397,11 +392,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -441,8 +433,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -479,8 +469,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -489,7 +477,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -497,13 +484,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -532,6 +520,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -615,9 +604,6 @@ src/mesa \ src/mesa/drivers/dri/common -test_stubs_FILES := \ - dri_test.c - megadriver_stub_FILES := \ megadriver_stub.c @@ -637,15 +623,12 @@ noinst_LTLIBRARIES = \ libdricommon.la \ libxmlconfig.la \ - libmegadriver_stub.la \ - libdri_test_stubs.la + libmegadriver_stub.la libdricommon_la_SOURCES = $(DRI_COMMON_FILES) libxmlconfig_la_SOURCES = $(XMLCONFIG_FILES) libxmlconfig_la_CFLAGS = $(AM_CFLAGS) $(EXPAT_CFLAGS) libxmlconfig_la_LIBADD = $(EXPAT_LIBS) -lm -libdri_test_stubs_la_SOURCES = $(test_stubs_FILES) -libdri_test_stubs_la_CFLAGS = $(AM_CFLAGS) -DNO_MAIN libmegadriver_stub_la_SOURCES = $(megadriver_stub_FILES) sysconf_DATA = drirc all: all-recursive @@ -694,9 +677,6 @@ rm -f $${locs}; \ } -libdri_test_stubs.la: $(libdri_test_stubs_la_OBJECTS) $(libdri_test_stubs_la_DEPENDENCIES) $(EXTRA_libdri_test_stubs_la_DEPENDENCIES) - $(AM_V_CCLD)$(libdri_test_stubs_la_LINK) $(libdri_test_stubs_la_OBJECTS) $(libdri_test_stubs_la_LIBADD) $(LIBS) - libdricommon.la: $(libdricommon_la_OBJECTS) $(libdricommon_la_DEPENDENCIES) $(EXTRA_libdricommon_la_DEPENDENCIES) $(AM_V_CCLD)$(LINK) $(libdricommon_la_OBJECTS) $(libdricommon_la_LIBADD) $(LIBS) @@ -713,7 +693,6 @@ -rm -f *.tab.c @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/dri_util.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libdri_test_stubs_la-dri_test.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libxmlconfig_la-xmlconfig.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/megadriver_stub.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/utils.Plo@am__quote@ @@ -742,13 +721,6 @@ @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(LTCOMPILE) -c -o $@ $< -libdri_test_stubs_la-dri_test.lo: dri_test.c -@am__fastdepCC_TRUE@ $(AM_V_CC)$(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libdri_test_stubs_la_CFLAGS) $(CFLAGS) -MT libdri_test_stubs_la-dri_test.lo -MD -MP -MF $(DEPDIR)/libdri_test_stubs_la-dri_test.Tpo -c -o libdri_test_stubs_la-dri_test.lo `test -f 'dri_test.c' || echo '$(srcdir)/'`dri_test.c -@am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) $(DEPDIR)/libdri_test_stubs_la-dri_test.Tpo $(DEPDIR)/libdri_test_stubs_la-dri_test.Plo -@AMDEP_TRUE@@am__fastdepCC_FALSE@ $(AM_V_CC)source='dri_test.c' object='libdri_test_stubs_la-dri_test.lo' libtool=yes @AMDEPBACKSLASH@ -@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ -@am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libdri_test_stubs_la_CFLAGS) $(CFLAGS) -c -o libdri_test_stubs_la-dri_test.lo `test -f 'dri_test.c' || echo '$(srcdir)/'`dri_test.c - libxmlconfig_la-xmlconfig.lo: xmlconfig.c @am__fastdepCC_TRUE@ $(AM_V_CC)$(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libxmlconfig_la_CFLAGS) $(CFLAGS) -MT libxmlconfig_la-xmlconfig.lo -MD -MP -MF $(DEPDIR)/libxmlconfig_la-xmlconfig.Tpo -c -o libxmlconfig_la-xmlconfig.lo `test -f 'xmlconfig.c' || echo '$(srcdir)/'`xmlconfig.c @am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) $(DEPDIR)/libxmlconfig_la-xmlconfig.Tpo $(DEPDIR)/libxmlconfig_la-xmlconfig.Plo diff -Nru mesa-12.0.6/src/mesa/drivers/dri/common/Makefile.sources mesa-17.0.7/src/mesa/drivers/dri/common/Makefile.sources --- mesa-12.0.6/src/mesa/drivers/dri/common/Makefile.sources 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/common/Makefile.sources 2017-06-01 10:37:10.000000000 +0000 @@ -17,8 +17,5 @@ src/mesa \ src/mesa/drivers/dri/common -test_stubs_FILES := \ - dri_test.c - megadriver_stub_FILES := \ megadriver_stub.c diff -Nru mesa-12.0.6/src/mesa/drivers/dri/common/utils.c mesa-17.0.7/src/mesa/drivers/dri/common/utils.c --- mesa-12.0.6/src/mesa/drivers/dri/common/utils.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/common/utils.c 2017-06-01 10:37:10.000000000 +0000 @@ -143,8 +143,10 @@ * \param msaa_samples Array of msaa sample count. 0 represents a visual * without a multisample buffer. * \param num_msaa_modes Number of entries in \c msaa_samples. - * \param visType GLX visual type. Usually either \c GLX_TRUE_COLOR or - * \c GLX_DIRECT_COLOR. + * \param enable_accum Add an accum buffer to the configs + * \param color_depth_match Whether the color depth must match the zs depth + * This forces 32-bit color to have 24-bit depth, and + * 16-bit color to have 16-bit depth. * * \returns * Pointer to any array of pointers to the \c __DRIconfig structures created @@ -158,7 +160,7 @@ unsigned num_depth_stencil_bits, const GLenum * db_modes, unsigned num_db_modes, const uint8_t * msaa_samples, unsigned num_msaa_modes, - GLboolean enable_accum) + GLboolean enable_accum, GLboolean color_depth_match) { static const uint32_t masks_table[][4] = { /* MESA_FORMAT_B5G6R5_UNORM */ @@ -236,6 +238,19 @@ for ( i = 0 ; i < num_db_modes ; i++ ) { for ( h = 0 ; h < num_msaa_modes; h++ ) { for ( j = 0 ; j < num_accum_bits ; j++ ) { + if (color_depth_match && + (depth_bits[k] || stencil_bits[k])) { + /* Depth can really only be 0, 16, 24, or 32. A 32-bit + * color format still matches 24-bit depth, as there + * is an implicit 8-bit stencil. So really we just + * need to make sure that color/depth are both 16 or + * both non-16. + */ + if ((depth_bits[k] + stencil_bits[k] == 16) != + (red_bits + green_bits + blue_bits + alpha_bits == 16)) + continue; + } + *c = malloc (sizeof **c); modes = &(*c)->modes; c++; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/common/utils.h mesa-17.0.7/src/mesa/drivers/dri/common/utils.h --- mesa-12.0.6/src/mesa/drivers/dri/common/utils.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/common/utils.h 2017-06-01 10:37:10.000000000 +0000 @@ -45,7 +45,7 @@ unsigned num_depth_stencil_bits, const GLenum * db_modes, unsigned num_db_modes, const uint8_t * msaa_samples, unsigned num_msaa_modes, - GLboolean enable_accum); + GLboolean enable_accum, GLboolean color_depth_match); __DRIconfig **driConcatConfigs(__DRIconfig **a, __DRIconfig **b); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/common/xmlpool/Makefile.in mesa-17.0.7/src/mesa/drivers/dri/common/xmlpool/Makefile.in --- mesa-12.0.6/src/mesa/drivers/dri/common/xmlpool/Makefile.in 2017-01-24 01:41:55.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/common/xmlpool/Makefile.in 2017-06-01 10:37:24.000000000 +0000 @@ -175,6 +175,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -189,6 +191,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -218,10 +221,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -271,11 +275,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -315,8 +316,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -353,8 +352,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -363,7 +360,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -371,13 +367,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -406,6 +403,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ diff -Nru mesa-12.0.6/src/mesa/drivers/dri/common/xmlpool/options.h mesa-17.0.7/src/mesa/drivers/dri/common/xmlpool/options.h --- mesa-12.0.6/src/mesa/drivers/dri/common/xmlpool/options.h 2017-01-24 01:43:24.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/common/xmlpool/options.h 2017-06-01 10:38:05.000000000 +0000 @@ -300,6 +300,17 @@ DRI_CONF_DESC(sv,"Aktivera S3TC-texturkomprimering även om programvarustöd saknas") \ DRI_CONF_OPT_END +#define DRI_CONF_PRECISE_TRIG(def) \ +DRI_CONF_OPT_BEGIN_B(precise_trig, def) \ + DRI_CONF_DESC(en,"Prefer accuracy over performance in trig functions") \ + DRI_CONF_DESC(ca,"Prefer accuracy over performance in trig functions") \ + DRI_CONF_DESC(de,"Prefer accuracy over performance in trig functions") \ + DRI_CONF_DESC(es,"Prefer accuracy over performance in trig functions") \ + DRI_CONF_DESC(nl,"Prefer accuracy over performance in trig functions") \ + DRI_CONF_DESC(fr,"Prefer accuracy over performance in trig functions") \ + DRI_CONF_DESC(sv,"Prefer accuracy over performance in trig functions") \ +DRI_CONF_OPT_END + #define DRI_CONF_COLOR_REDUCTION_ROUND 0 #define DRI_CONF_COLOR_REDUCTION_DITHER 1 #define DRI_CONF_COLOR_REDUCTION(def) \ @@ -848,4 +859,43 @@ #define DRI_CONF_NINE_OVERRIDEVENDOR(def) \ DRI_CONF_OPT_BEGIN(override_vendorid, int, def) \ DRI_CONF_DESC(en,"Define the vendor_id to report. This allows faking another hardware vendor.") \ + DRI_CONF_DESC(ca,"Define the vendor_id to report. This allows faking another hardware vendor.") \ + DRI_CONF_DESC(de,"Define the vendor_id to report. This allows faking another hardware vendor.") \ + DRI_CONF_DESC(es,"Define the vendor_id to report. This allows faking another hardware vendor.") \ + DRI_CONF_DESC(nl,"Define the vendor_id to report. This allows faking another hardware vendor.") \ + DRI_CONF_DESC(fr,"Define the vendor_id to report. This allows faking another hardware vendor.") \ + DRI_CONF_DESC(sv,"Define the vendor_id to report. This allows faking another hardware vendor.") \ +DRI_CONF_OPT_END + +#define DRI_CONF_NINE_ALLOWDISCARDDELAYEDRELEASE(def) \ +DRI_CONF_OPT_BEGIN_B(discard_delayed_release, def) \ + DRI_CONF_DESC(en,"Whether to allow the display server to release buffers with a delay when using d3d's presentation mode DISCARD. Default to true. Set to false if suffering from lag (thread_submit=true can also help in this situation).") \ + DRI_CONF_DESC(ca,"Whether to allow the display server to release buffers with a delay when using d3d's presentation mode DISCARD. Default to true. Set to false if suffering from lag (thread_submit=true can also help in this situation).") \ + DRI_CONF_DESC(de,"Whether to allow the display server to release buffers with a delay when using d3d's presentation mode DISCARD. Default to true. Set to false if suffering from lag (thread_submit=true can also help in this situation).") \ + DRI_CONF_DESC(es,"Whether to allow the display server to release buffers with a delay when using d3d's presentation mode DISCARD. Default to true. Set to false if suffering from lag (thread_submit=true can also help in this situation).") \ + DRI_CONF_DESC(nl,"Whether to allow the display server to release buffers with a delay when using d3d's presentation mode DISCARD. Default to true. Set to false if suffering from lag (thread_submit=true can also help in this situation).") \ + DRI_CONF_DESC(fr,"Whether to allow the display server to release buffers with a delay when using d3d's presentation mode DISCARD. Default to true. Set to false if suffering from lag (thread_submit=true can also help in this situation).") \ + DRI_CONF_DESC(sv,"Whether to allow the display server to release buffers with a delay when using d3d's presentation mode DISCARD. Default to true. Set to false if suffering from lag (thread_submit=true can also help in this situation).") \ +DRI_CONF_OPT_END + +#define DRI_CONF_NINE_TEARFREEDISCARD(def) \ +DRI_CONF_OPT_BEGIN_B(tearfree_discard, def) \ + DRI_CONF_DESC(en,"Whether to make d3d's presentation mode DISCARD (games usually use that mode) Tear Free. If rendering above screen refresh, some frames will get skipped. false by default.") \ + DRI_CONF_DESC(ca,"Whether to make d3d's presentation mode DISCARD (games usually use that mode) Tear Free. If rendering above screen refresh, some frames will get skipped. false by default.") \ + DRI_CONF_DESC(de,"Whether to make d3d's presentation mode DISCARD (games usually use that mode) Tear Free. If rendering above screen refresh, some frames will get skipped. false by default.") \ + DRI_CONF_DESC(es,"Whether to make d3d's presentation mode DISCARD (games usually use that mode) Tear Free. If rendering above screen refresh, some frames will get skipped. false by default.") \ + DRI_CONF_DESC(nl,"Whether to make d3d's presentation mode DISCARD (games usually use that mode) Tear Free. If rendering above screen refresh, some frames will get skipped. false by default.") \ + DRI_CONF_DESC(fr,"Whether to make d3d's presentation mode DISCARD (games usually use that mode) Tear Free. If rendering above screen refresh, some frames will get skipped. false by default.") \ + DRI_CONF_DESC(sv,"Whether to make d3d's presentation mode DISCARD (games usually use that mode) Tear Free. If rendering above screen refresh, some frames will get skipped. false by default.") \ +DRI_CONF_OPT_END + +#define DRI_CONF_NINE_CSMT(def) \ +DRI_CONF_OPT_BEGIN(csmt_force, int, def) \ + DRI_CONF_DESC(en,"If set to 1, force gallium nine CSMT. If set to 0, disable it. By default (-1) CSMT is enabled on known thread-safe drivers.") \ + DRI_CONF_DESC(ca,"If set to 1, force gallium nine CSMT. If set to 0, disable it. By default (-1) CSMT is enabled on known thread-safe drivers.") \ + DRI_CONF_DESC(de,"If set to 1, force gallium nine CSMT. If set to 0, disable it. By default (-1) CSMT is enabled on known thread-safe drivers.") \ + DRI_CONF_DESC(es,"If set to 1, force gallium nine CSMT. If set to 0, disable it. By default (-1) CSMT is enabled on known thread-safe drivers.") \ + DRI_CONF_DESC(nl,"If set to 1, force gallium nine CSMT. If set to 0, disable it. By default (-1) CSMT is enabled on known thread-safe drivers.") \ + DRI_CONF_DESC(fr,"If set to 1, force gallium nine CSMT. If set to 0, disable it. By default (-1) CSMT is enabled on known thread-safe drivers.") \ + DRI_CONF_DESC(sv,"If set to 1, force gallium nine CSMT. If set to 0, disable it. By default (-1) CSMT is enabled on known thread-safe drivers.") \ DRI_CONF_OPT_END diff -Nru mesa-12.0.6/src/mesa/drivers/dri/common/xmlpool/t_options.h mesa-17.0.7/src/mesa/drivers/dri/common/xmlpool/t_options.h --- mesa-12.0.6/src/mesa/drivers/dri/common/xmlpool/t_options.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/common/xmlpool/t_options.h 2017-06-01 10:37:10.000000000 +0000 @@ -158,6 +158,11 @@ DRI_CONF_DESC(en,gettext("Enable S3TC texture compression even if software support is not available")) \ DRI_CONF_OPT_END +#define DRI_CONF_PRECISE_TRIG(def) \ +DRI_CONF_OPT_BEGIN_B(precise_trig, def) \ + DRI_CONF_DESC(en,gettext("Prefer accuracy over performance in trig functions")) \ +DRI_CONF_OPT_END + #define DRI_CONF_COLOR_REDUCTION_ROUND 0 #define DRI_CONF_COLOR_REDUCTION_DITHER 1 #define DRI_CONF_COLOR_REDUCTION(def) \ @@ -369,5 +374,20 @@ #define DRI_CONF_NINE_OVERRIDEVENDOR(def) \ DRI_CONF_OPT_BEGIN(override_vendorid, int, def) \ - DRI_CONF_DESC(en,"Define the vendor_id to report. This allows faking another hardware vendor.") \ + DRI_CONF_DESC(en,gettext("Define the vendor_id to report. This allows faking another hardware vendor.")) \ +DRI_CONF_OPT_END + +#define DRI_CONF_NINE_ALLOWDISCARDDELAYEDRELEASE(def) \ +DRI_CONF_OPT_BEGIN_B(discard_delayed_release, def) \ + DRI_CONF_DESC(en,gettext("Whether to allow the display server to release buffers with a delay when using d3d's presentation mode DISCARD. Default to true. Set to false if suffering from lag (thread_submit=true can also help in this situation).")) \ +DRI_CONF_OPT_END + +#define DRI_CONF_NINE_TEARFREEDISCARD(def) \ +DRI_CONF_OPT_BEGIN_B(tearfree_discard, def) \ + DRI_CONF_DESC(en,gettext("Whether to make d3d's presentation mode DISCARD (games usually use that mode) Tear Free. If rendering above screen refresh, some frames will get skipped. false by default.")) \ +DRI_CONF_OPT_END + +#define DRI_CONF_NINE_CSMT(def) \ +DRI_CONF_OPT_BEGIN(csmt_force, int, def) \ + DRI_CONF_DESC(en,gettext("If set to 1, force gallium nine CSMT. If set to 0, disable it. By default (-1) CSMT is enabled on known thread-safe drivers.")) \ DRI_CONF_OPT_END diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i915/i830_texblend.c mesa-17.0.7/src/mesa/drivers/dri/i915/i830_texblend.c --- mesa-12.0.6/src/mesa/drivers/dri/i915/i830_texblend.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i915/i830_texblend.c 2017-06-01 10:37:10.000000000 +0000 @@ -28,7 +28,6 @@ #include "main/glheader.h" #include "main/macros.h" #include "main/mtypes.h" -#include "util/simple_list.h" #include "main/enums.h" #include "main/mm.h" diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i915/i915_context.c mesa-17.0.7/src/mesa/drivers/dri/i915/i915_context.c --- mesa-12.0.6/src/mesa/drivers/dri/i915/i915_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i915/i915_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -260,7 +260,6 @@ struct gl_shader_compiler_options *const fs_options = & ctx->Const.ShaderCompilerOptions[MESA_SHADER_FRAGMENT]; fs_options->MaxIfDepth = 0; - fs_options->EmitNoNoise = true; fs_options->EmitNoPow = true; fs_options->EmitNoMainReturn = true; fs_options->EmitNoIndirectInput = true; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i915/i915_context.h mesa-17.0.7/src/mesa/drivers/dri/i915/i915_context.h --- mesa-12.0.6/src/mesa/drivers/dri/i915/i915_context.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i915/i915_context.h 2017-06-01 10:37:10.000000000 +0000 @@ -140,7 +140,7 @@ */ struct i915_fragment_program { - struct gl_fragment_program FragProg; + struct gl_program FragProg; bool translated; bool params_uptodate; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i915/i915_fragprog.c mesa-17.0.7/src/mesa/drivers/dri/i915/i915_fragprog.c --- mesa-12.0.6/src/mesa/drivers/dri/i915/i915_fragprog.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i915/i915_fragprog.c 2017-06-01 10:37:10.000000000 +0000 @@ -95,7 +95,7 @@ static GLuint src_vector(struct i915_fragment_program *p, const struct prog_src_register *source, - const struct gl_fragment_program *program) + const struct gl_program *program) { GLuint src; unsigned unit; @@ -186,7 +186,7 @@ case PROGRAM_STATE_VAR: case PROGRAM_UNIFORM: src = i915_emit_param4fv(p, - &program->Base.Parameters->ParameterValues[source->Index][0].f); + &program->Parameters->ParameterValues[source->Index][0].f); break; default: @@ -278,8 +278,8 @@ #define EMIT_TEX( OP ) \ do { \ GLuint dim = translate_tex_src_target( p, inst->TexSrcTarget ); \ - const struct gl_fragment_program *program = &p->FragProg; \ - GLuint unit = program->Base.SamplerUnits[inst->TexSrcUnit]; \ + const struct gl_program *program = &p->FragProg; \ + GLuint unit = program->SamplerUnits[inst->TexSrcUnit]; \ GLuint sampler = i915_emit_decl(p, REG_TYPE_S, \ unit, dim); \ GLuint coord = src_vector( p, &inst->SrcReg[0], program); \ @@ -313,13 +313,13 @@ */ static bool calc_live_regs( struct i915_fragment_program *p ) { - const struct gl_fragment_program *program = &p->FragProg; + const struct gl_program *program = &p->FragProg; GLuint regsUsed = ~((1 << I915_MAX_TEMPORARY) - 1); uint8_t live_components[I915_MAX_TEMPORARY] = { 0, }; GLint i; - for (i = program->Base.NumInstructions - 1; i >= 0; i--) { - struct prog_instruction *inst = &program->Base.Instructions[i]; + for (i = program->arb.NumInstructions - 1; i >= 0; i--) { + struct prog_instruction *inst = &program->arb.Instructions[i]; int opArgs = _mesa_num_inst_src_regs(inst->Opcode); int a; @@ -361,8 +361,8 @@ static GLuint get_live_regs( struct i915_fragment_program *p, const struct prog_instruction *inst ) { - const struct gl_fragment_program *program = &p->FragProg; - GLuint nr = inst - program->Base.Instructions; + const struct gl_program *program = &p->FragProg; + GLuint nr = inst - program->arb.Instructions; return p->usedRegs[nr]; } @@ -382,11 +382,11 @@ static void upload_program(struct i915_fragment_program *p) { - const struct gl_fragment_program *program = &p->FragProg; - const struct prog_instruction *inst = program->Base.Instructions; + const struct gl_program *program = &p->FragProg; + const struct prog_instruction *inst = program->arb.Instructions; if (INTEL_DEBUG & DEBUG_WM) - _mesa_print_program(&program->Base); + _mesa_print_program(program); /* Is this a parse-failed program? Ensure a valid program is * loaded, as the flagging of an error isn't sufficient to stop @@ -402,9 +402,9 @@ return; } - if (program->Base.NumInstructions > I915_MAX_INSN) { + if (program->arb.NumInstructions > I915_MAX_INSN) { i915_program_error(p, "Exceeded max instructions (%d out of %d)", - program->Base.NumInstructions, I915_MAX_INSN); + program->arb.NumInstructions, I915_MAX_INSN); return; } @@ -1032,7 +1032,7 @@ static void check_texcoord_mapping(struct i915_fragment_program *p) { - GLbitfield64 inputs = p->FragProg.Base.InputsRead; + GLbitfield64 inputs = p->FragProg.info.inputs_read; unsigned unit = 0; for (unsigned i = 0; i < p->ctx->Const.MaxTextureCoordUnits; i++) { @@ -1059,7 +1059,7 @@ static void check_wpos(struct i915_fragment_program *p) { - GLbitfield64 inputs = p->FragProg.Base.InputsRead; + GLbitfield64 inputs = p->FragProg.info.inputs_read; GLint i; unsigned unit = 0; @@ -1087,7 +1087,7 @@ if (INTEL_DEBUG & DEBUG_WM) { printf("fp:\n"); - _mesa_print_program(&p->FragProg.Base); + _mesa_print_program(&p->FragProg); printf("\n"); } @@ -1108,7 +1108,7 @@ GLint i; if (p->nr_params) - _mesa_load_state_parameters(p->ctx, p->FragProg.Base.Parameters); + _mesa_load_state_parameters(p->ctx, p->FragProg.Parameters); for (i = 0; i < p->nr_params; i++) { GLint reg = p->param[i].reg; @@ -1144,21 +1144,23 @@ } static struct gl_program * -i915NewProgram(struct gl_context * ctx, GLenum target, GLuint id) +i915NewProgram(struct gl_context * ctx, GLenum target, GLuint id, + bool is_arb_asm) { switch (target) { case GL_VERTEX_PROGRAM_ARB: { - struct gl_vertex_program *prog = CALLOC_STRUCT(gl_vertex_program); - return _mesa_init_gl_program(&prog->Base, target, id); + struct gl_program *prog = rzalloc(NULL, struct gl_program); + return _mesa_init_gl_program(prog, target, id, is_arb_asm); } case GL_FRAGMENT_PROGRAM_ARB:{ struct i915_fragment_program *prog = - CALLOC_STRUCT(i915_fragment_program); + rzalloc(NULL, struct i915_fragment_program); if (prog) { i915_init_program(I915_CONTEXT(ctx), prog); - return _mesa_init_gl_program(&prog->FragProg.Base, target, id); + return _mesa_init_gl_program(&prog->FragProg, target, id, + is_arb_asm); } else return NULL; @@ -1167,7 +1169,7 @@ default: /* Just fallback: */ - return _mesa_new_program(ctx, target, id); + return _mesa_new_program(ctx, target, id, is_arb_asm); } } @@ -1257,7 +1259,7 @@ struct i915_fragment_program *p = (struct i915_fragment_program *) ctx->FragmentProgram._Current; - const GLbitfield64 inputsRead = p->FragProg.Base.InputsRead; + const GLbitfield64 inputsRead = p->FragProg.info.inputs_read; GLuint s4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_VFMT_MASK; GLuint s2 = S2_TEXCOORD_NONE; int i, offset = 0; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i915/i915_program.c mesa-17.0.7/src/mesa/drivers/dri/i915/i915_program.c --- mesa-12.0.6/src/mesa/drivers/dri/i915/i915_program.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i915/i915_program.c 2017-06-01 10:37:10.000000000 +0000 @@ -517,18 +517,18 @@ } if (p->error) { - p->FragProg.Base.NumNativeInstructions = 0; - p->FragProg.Base.NumNativeAluInstructions = 0; - p->FragProg.Base.NumNativeTexInstructions = 0; - p->FragProg.Base.NumNativeTexIndirections = 0; + p->FragProg.arb.NumNativeInstructions = 0; + p->FragProg.arb.NumNativeAluInstructions = 0; + p->FragProg.arb.NumNativeTexInstructions = 0; + p->FragProg.arb.NumNativeTexIndirections = 0; } else { - p->FragProg.Base.NumNativeInstructions = (p->nr_alu_insn + + p->FragProg.arb.NumNativeInstructions = (p->nr_alu_insn + p->nr_tex_insn + p->nr_decl_insn); - p->FragProg.Base.NumNativeAluInstructions = p->nr_alu_insn; - p->FragProg.Base.NumNativeTexInstructions = p->nr_tex_insn; - p->FragProg.Base.NumNativeTexIndirections = p->nr_tex_indirect; + p->FragProg.arb.NumNativeAluInstructions = p->nr_alu_insn; + p->FragProg.arb.NumNativeTexInstructions = p->nr_tex_insn; + p->FragProg.arb.NumNativeTexIndirections = p->nr_tex_indirect; } p->declarations[0] |= program_size + decl_size - 2; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i915/i915_state.c mesa-17.0.7/src/mesa/drivers/dri/i915/i915_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i915/i915_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i915/i915_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -650,20 +650,17 @@ /* _NEW_PROGRAM */ struct i915_fragment_program *p = (struct i915_fragment_program *) ctx->FragmentProgram._Current; - const GLbitfield64 inputsRead = p->FragProg.Base.InputsRead; + const GLbitfield64 inputsRead = p->FragProg.info.inputs_read; struct i915_context *i915 = i915_context(ctx); GLuint s4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_VFMT_MASK; - int i; GLuint coord_replace_bits = 0x0; - GLuint tex_coord_unit_bits = 0x0; - for (i = 0; i < ctx->Const.MaxTextureCoordUnits; i++) { - /* _NEW_POINT */ - if (ctx->Point.CoordReplace[i] && ctx->Point.PointSprite) - coord_replace_bits |= (1 << i); - if (inputsRead & VARYING_BIT_TEX(i)) - tex_coord_unit_bits |= (1 << i); - } + /* _NEW_POINT */ + if (ctx->Point.PointSprite) + coord_replace_bits = ctx->Point.CoordReplace; + + GLuint tex_coord_unit_bits = + (GLuint)((inputsRead & VARYING_BITS_TEX_ANY) >> VARYING_SLOT_TEX0); /* * Here we can't enable the SPRITE_POINT_ENABLE bit when the mis-match diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i915/intel_clear.c mesa-17.0.7/src/mesa/drivers/dri/i915/intel_clear.c --- mesa-12.0.6/src/mesa/drivers/dri/i915/intel_clear.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i915/intel_clear.c 2017-06-01 10:37:10.000000000 +0000 @@ -81,7 +81,7 @@ intelClear(struct gl_context *ctx, GLbitfield mask) { struct intel_context *intel = intel_context(ctx); - const GLuint colorMask = *((GLuint *) & ctx->Color.ColorMask[0]); + GLuint colorMask; GLbitfield tri_mask = 0; GLbitfield blit_mask = 0; GLbitfield swrast_mask = 0; @@ -89,6 +89,8 @@ struct intel_renderbuffer *irb; int i; + memcpy(&colorMask, &ctx->Color.ColorMask[0], sizeof(colorMask)); + if (mask & (BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_FRONT_RIGHT)) { intel->front_buffer_dirty = true; } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i915/intel_context.h mesa-17.0.7/src/mesa/drivers/dri/i915/intel_context.h --- mesa-12.0.6/src/mesa/drivers/dri/i915/intel_context.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i915/intel_context.h 2017-06-01 10:37:10.000000000 +0000 @@ -104,13 +104,6 @@ #endif #endif -struct intel_sync_object { - struct gl_sync_object Base; - - /** Batch associated with this sync object */ - drm_intel_bo *bo; -}; - struct intel_batchbuffer { /** Current batchbuffer being queued up. */ drm_intel_bo *bo; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i915/intel_fbo.h mesa-17.0.7/src/mesa/drivers/dri/i915/intel_fbo.h --- mesa-12.0.6/src/mesa/drivers/dri/i915/intel_fbo.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i915/intel_fbo.h 2017-06-01 10:37:10.000000000 +0000 @@ -89,10 +89,8 @@ intel_renderbuffer(struct gl_renderbuffer *rb) { struct intel_renderbuffer *irb = (struct intel_renderbuffer *) rb; - if (irb && irb->Base.Base.ClassID == INTEL_RB_CLASS) { - /*_mesa_warning(NULL, "Returning non-intel Rb\n");*/ + if (irb && irb->Base.Base.ClassID == INTEL_RB_CLASS) return irb; - } else return NULL; } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i915/intel_screen.c mesa-17.0.7/src/mesa/drivers/dri/i915/intel_screen.c --- mesa-12.0.6/src/mesa/drivers/dri/i915/intel_screen.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i915/intel_screen.c 2017-06-01 10:37:10.000000000 +0000 @@ -489,9 +489,7 @@ *value = image->planar_format->components; return true; case __DRI_IMAGE_ATTRIB_FD: - if (drm_intel_bo_gem_export_to_prime(image->region->bo, value) == 0) - return true; - return false; + return !drm_intel_bo_gem_export_to_prime(image->region->bo, value); default: return false; } @@ -750,6 +748,9 @@ case __DRI2_RENDERER_UNIFIED_MEMORY_ARCHITECTURE: value[0] = 1; return 0; + case __DRI2_RENDERER_HAS_TEXTURE_3D: + value[0] = 1; + return 0; default: return driQueryRendererIntegerCommon(psp, param, value); } @@ -786,6 +787,7 @@ static const __DRIextension *intelScreenExtensions[] = { &intelTexBufferExtension.base, + &intelFenceExtension.base, &intelFlushExtension.base, &intelImageExtension.base, &intelRendererQueryExtension.base, @@ -1042,7 +1044,8 @@ { static const mesa_format formats[] = { MESA_FORMAT_B5G6R5_UNORM, - MESA_FORMAT_B8G8R8A8_UNORM + MESA_FORMAT_B8G8R8A8_UNORM, + MESA_FORMAT_B8G8R8X8_UNORM }; /* GLX_SWAP_COPY_OML is not supported due to page flipping. */ @@ -1081,7 +1084,7 @@ num_depth_stencil_bits, back_buffer_modes, 2, singlesample_samples, 1, - false); + false, false); configs = driConcatConfigs(configs, new_configs); } @@ -1103,7 +1106,7 @@ depth_bits, stencil_bits, 1, back_buffer_modes, 1, singlesample_samples, 1, - true); + true, false); configs = driConcatConfigs(configs, new_configs); } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i915/intel_screen.h mesa-17.0.7/src/mesa/drivers/dri/i915/intel_screen.h --- mesa-12.0.6/src/mesa/drivers/dri/i915/intel_screen.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i915/intel_screen.h 2017-06-01 10:37:10.000000000 +0000 @@ -156,12 +156,14 @@ #define intel_get_rb_region old_intel_get_rb_region #define intel_renderbuffer_set_draw_offset old_intel_renderbuffer_set_draw_offset #define intel_miptree_create_for_image_buffer old_intel_miptree_create_for_image_buffer +#define intelFenceExtension old_intelFenceExtension extern void intelDestroyContext(__DRIcontext * driContextPriv); extern GLboolean intelUnbindContext(__DRIcontext * driContextPriv); const __DRIextension **__driDriverGetExtensions_i915(void); +extern const __DRI2fenceExtension intelFenceExtension; extern GLboolean intelMakeCurrent(__DRIcontext * driContextPriv, diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i915/intel_syncobj.c mesa-17.0.7/src/mesa/drivers/dri/i915/intel_syncobj.c --- mesa-12.0.6/src/mesa/drivers/dri/i915/intel_syncobj.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i915/intel_syncobj.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,11 +25,11 @@ * */ -/** @file intel_syncobj.c +/** + * \file + * \brief Support for GL_ARB_sync and EGL_KHR_fence_sync. * - * Support for ARB_sync - * - * ARB_sync is implemented by flushing the current batchbuffer and keeping a + * GL_ARB_sync is implemented by flushing the current batchbuffer and keeping a * reference on it. We can then check for completion or wait for completion * using the normal buffer object mechanisms. This does mean that if an * application is using many sync objects, it will emit small batchbuffers @@ -38,19 +38,133 @@ * performance bottleneck, though. */ -#include "util/simple_list.h" #include "main/imports.h" #include "intel_context.h" #include "intel_batchbuffer.h" #include "intel_reg.h" +struct intel_fence { + struct intel_context *intel; + /** The fence waits for completion of this batch. */ + drm_intel_bo *batch_bo; + + mtx_t mutex; + bool signalled; +}; + +struct intel_gl_sync_object { + struct gl_sync_object Base; + struct intel_fence fence; +}; + +static void +intel_fence_finish(struct intel_fence *fence) +{ + if (fence->batch_bo) + drm_intel_bo_unreference(fence->batch_bo); +} + +static void +intel_fence_insert(struct intel_context *intel, struct intel_fence *fence) +{ + assert(!fence->batch_bo); + assert(!fence->signalled); + + intel_batchbuffer_emit_mi_flush(intel); + fence->batch_bo = intel->batch.bo; + drm_intel_bo_reference(fence->batch_bo); + intel_batchbuffer_flush(intel); +} + +static bool +intel_fence_has_completed_locked(struct intel_fence *fence) +{ + if (fence->signalled) + return true; + + if (fence->batch_bo && !drm_intel_bo_busy(fence->batch_bo)) { + drm_intel_bo_unreference(fence->batch_bo); + fence->batch_bo = NULL; + fence->signalled = true; + return true; + } + + return false; +} + +static bool +intel_fence_has_completed(struct intel_fence *fence) +{ + bool ret; + + mtx_lock(&fence->mutex); + ret = intel_fence_has_completed_locked(fence); + mtx_unlock(&fence->mutex); + + return ret; +} + +static bool +intel_fence_client_wait_locked(struct intel_context *intel, struct intel_fence *fence, + uint64_t timeout) +{ + if (fence->signalled) + return true; + + assert(fence->batch_bo); + + /* DRM_IOCTL_I915_GEM_WAIT uses a signed 64 bit timeout and returns + * immediately for timeouts <= 0. The best we can do is to clamp the + * timeout to INT64_MAX. This limits the maximum timeout from 584 years to + * 292 years - likely not a big deal. + */ + if (timeout > INT64_MAX) + timeout = INT64_MAX; + + if (drm_intel_gem_bo_wait(fence->batch_bo, timeout) != 0) + return false; + + fence->signalled = true; + drm_intel_bo_unreference(fence->batch_bo); + fence->batch_bo = NULL; + + return true; +} + +/** + * Return true if the function successfully signals or has already signalled. + * (This matches the behavior expected from __DRI2fence::client_wait_sync). + */ +static bool +intel_fence_client_wait(struct intel_context *intel, struct intel_fence *fence, + uint64_t timeout) +{ + bool ret; + + mtx_lock(&fence->mutex); + ret = intel_fence_client_wait_locked(intel, fence, timeout); + mtx_unlock(&fence->mutex); + + return ret; +} + +static void +intel_fence_server_wait(struct intel_context *intel, struct intel_fence *fence) +{ + /* We have nothing to do for WaitSync. Our GL command stream is sequential, + * so given that the sync object has already flushed the batchbuffer, any + * batchbuffers coming after this waitsync will naturally not occur until + * the previous one is done. + */ +} + static struct gl_sync_object * -intel_new_sync_object(struct gl_context *ctx, GLuint id) +intel_gl_new_sync_object(struct gl_context *ctx, GLuint id) { - struct intel_sync_object *sync; + struct intel_gl_sync_object *sync; - sync = calloc(1, sizeof(struct intel_sync_object)); + sync = calloc(1, sizeof(*sync)); if (!sync) return NULL; @@ -58,71 +172,120 @@ } static void -intel_delete_sync_object(struct gl_context *ctx, struct gl_sync_object *s) +intel_gl_delete_sync_object(struct gl_context *ctx, struct gl_sync_object *s) { - struct intel_sync_object *sync = (struct intel_sync_object *)s; - - if (sync->bo) - drm_intel_bo_unreference(sync->bo); + struct intel_gl_sync_object *sync = (struct intel_gl_sync_object *)s; + intel_fence_finish(&sync->fence); free(sync); } static void -intel_fence_sync(struct gl_context *ctx, struct gl_sync_object *s, +intel_gl_fence_sync(struct gl_context *ctx, struct gl_sync_object *s, GLenum condition, GLbitfield flags) { struct intel_context *intel = intel_context(ctx); - struct intel_sync_object *sync = (struct intel_sync_object *)s; - - assert(condition == GL_SYNC_GPU_COMMANDS_COMPLETE); - intel_batchbuffer_emit_mi_flush(intel); - - sync->bo = intel->batch.bo; - drm_intel_bo_reference(sync->bo); + struct intel_gl_sync_object *sync = (struct intel_gl_sync_object *)s; - intel_flush(ctx); + intel_fence_insert(intel, &sync->fence); } -static void intel_client_wait_sync(struct gl_context *ctx, struct gl_sync_object *s, +static void +intel_gl_client_wait_sync(struct gl_context *ctx, struct gl_sync_object *s, GLbitfield flags, GLuint64 timeout) { - struct intel_sync_object *sync = (struct intel_sync_object *)s; + struct intel_context *intel = intel_context(ctx); + struct intel_gl_sync_object *sync = (struct intel_gl_sync_object *)s; - if (sync->bo && drm_intel_gem_bo_wait(sync->bo, timeout) == 0) { + if (intel_fence_client_wait(intel, &sync->fence, timeout)) s->StatusFlag = 1; - drm_intel_bo_unreference(sync->bo); - sync->bo = NULL; - } } -/* We have nothing to do for WaitSync. Our GL command stream is sequential, - * so given that the sync object has already flushed the batchbuffer, - * any batchbuffers coming after this waitsync will naturally not occur until - * the previous one is done. - */ -static void intel_server_wait_sync(struct gl_context *ctx, struct gl_sync_object *s, +static void +intel_gl_server_wait_sync(struct gl_context *ctx, struct gl_sync_object *s, GLbitfield flags, GLuint64 timeout) { + struct intel_context *intel = intel_context(ctx); + struct intel_gl_sync_object *sync = (struct intel_gl_sync_object *)s; + + intel_fence_server_wait(intel, &sync->fence); } -static void intel_check_sync(struct gl_context *ctx, struct gl_sync_object *s) +static void +intel_gl_check_sync(struct gl_context *ctx, struct gl_sync_object *s) { - struct intel_sync_object *sync = (struct intel_sync_object *)s; + struct intel_gl_sync_object *sync = (struct intel_gl_sync_object *)s; - if (sync->bo && !drm_intel_bo_busy(sync->bo)) { - drm_intel_bo_unreference(sync->bo); - sync->bo = NULL; + if (intel_fence_has_completed(&sync->fence)) s->StatusFlag = 1; - } } -void intel_init_syncobj_functions(struct dd_function_table *functions) +void +intel_init_syncobj_functions(struct dd_function_table *functions) +{ + functions->NewSyncObject = intel_gl_new_sync_object; + functions->DeleteSyncObject = intel_gl_delete_sync_object; + functions->FenceSync = intel_gl_fence_sync; + functions->CheckSync = intel_gl_check_sync; + functions->ClientWaitSync = intel_gl_client_wait_sync; + functions->ServerWaitSync = intel_gl_server_wait_sync; +} + +static void * +intel_dri_create_fence(__DRIcontext *ctx) +{ + struct intel_context *intel = ctx->driverPrivate; + struct intel_fence *fence; + + fence = calloc(1, sizeof(*fence)); + if (!fence) + return NULL; + + mtx_init(&fence->mutex, mtx_plain); + fence->intel = intel; + intel_fence_insert(intel, fence); + + return fence; +} + +static void +intel_dri_destroy_fence(__DRIscreen *screen, void *driver_fence) { - functions->NewSyncObject = intel_new_sync_object; - functions->DeleteSyncObject = intel_delete_sync_object; - functions->FenceSync = intel_fence_sync; - functions->CheckSync = intel_check_sync; - functions->ClientWaitSync = intel_client_wait_sync; - functions->ServerWaitSync = intel_server_wait_sync; + struct intel_fence *fence = driver_fence; + + intel_fence_finish(fence); + free(fence); } + +static GLboolean +intel_dri_client_wait_sync(__DRIcontext *ctx, void *driver_fence, unsigned flags, + uint64_t timeout) +{ + struct intel_fence *fence = driver_fence; + + return intel_fence_client_wait(fence->intel, fence, timeout); +} + +static void +intel_dri_server_wait_sync(__DRIcontext *ctx, void *driver_fence, unsigned flags) +{ + struct intel_fence *fence = driver_fence; + + /* We might be called here with a NULL fence as a result of WaitSyncKHR + * on a EGL_KHR_reusable_sync fence. Nothing to do here in such case. + */ + if (!fence) + return; + + intel_fence_server_wait(fence->intel, fence); +} + +const __DRI2fenceExtension intelFenceExtension = { + .base = { __DRI2_FENCE, 1 }, + + .create_fence = intel_dri_create_fence, + .destroy_fence = intel_dri_destroy_fence, + .client_wait_sync = intel_dri_client_wait_sync, + .server_wait_sync = intel_dri_server_wait_sync, + .get_fence_from_cl_event = NULL, +}; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i915/intel_tris.c mesa-17.0.7/src/mesa/drivers/dri/i915/intel_tris.c --- mesa-12.0.6/src/mesa/drivers/dri/i915/intel_tris.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i915/intel_tris.c 2017-06-01 10:37:10.000000000 +0000 @@ -436,7 +436,7 @@ ***********************************************************************/ /* Currently not working - VERT_ATTRIB_POINTSIZE isn't correctly - * represented in the fragment program InputsRead field. + * represented in the fragment program info.inputs_read field. */ static void intel_atten_point(struct intel_context *intel, intelVertexPtr v0) @@ -955,8 +955,8 @@ ctx->Polygon.OffsetFill) ? DD_TRI_OFFSET : 0) | (ctx->Line.StippleFlag ? DD_LINE_STIPPLE : 0) | (ctx->Point._Attenuated ? DD_POINT_ATTEN : 0); - const struct gl_fragment_program *fprog = ctx->FragmentProgram._Current; - bool have_wpos = (fprog && (fprog->Base.InputsRead & VARYING_BIT_POS)); + const struct gl_program *fprog = ctx->FragmentProgram._Current; + bool have_wpos = (fprog && (fprog->info.inputs_read & VARYING_BIT_POS)); GLuint index = 0; if (INTEL_DEBUG & DEBUG_STATE) diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i915/Makefile.am mesa-17.0.7/src/mesa/drivers/dri/i915/Makefile.am --- mesa-12.0.6/src/mesa/drivers/dri/i915/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i915/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -30,9 +30,9 @@ -I$(top_srcdir)/src/mesa/ \ -I$(top_srcdir)/src/gallium/include \ -I$(top_srcdir)/src/gallium/auxiliary \ + -I$(top_builddir)/src/mesa/drivers/dri/common \ -I$(top_srcdir)/src/mesa/drivers/dri/common \ -I$(top_srcdir)/src/mesa/drivers/dri/intel/server \ - -I$(top_builddir)/src/mesa/drivers/dri/common \ $(DEFINES) \ $(VISIBILITY_CFLAGS) \ $(INTEL_CFLAGS) diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i915/Makefile.in mesa-17.0.7/src/mesa/drivers/dri/i915/Makefile.in --- mesa-12.0.6/src/mesa/drivers/dri/i915/Makefile.in 2017-01-24 01:41:55.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i915/Makefile.in 2017-06-01 10:37:24.000000000 +0000 @@ -218,6 +218,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -232,6 +234,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -261,10 +264,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -314,11 +318,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -358,8 +359,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -396,8 +395,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -406,7 +403,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -414,13 +410,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -449,6 +446,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -583,9 +581,9 @@ -I$(top_srcdir)/src/mesa/ \ -I$(top_srcdir)/src/gallium/include \ -I$(top_srcdir)/src/gallium/auxiliary \ + -I$(top_builddir)/src/mesa/drivers/dri/common \ -I$(top_srcdir)/src/mesa/drivers/dri/common \ -I$(top_srcdir)/src/mesa/drivers/dri/intel/server \ - -I$(top_builddir)/src/mesa/drivers/dri/common \ $(DEFINES) \ $(VISIBILITY_CFLAGS) \ $(INTEL_CFLAGS) diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_binding_tables.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_binding_tables.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_binding_tables.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_binding_tables.c 2017-06-01 10:37:10.000000000 +0000 @@ -100,7 +100,7 @@ } else { /* Upload a new binding table. */ if (INTEL_DEBUG & DEBUG_SHADER_TIME) { - brw->vtbl.emit_buffer_surface_state( + brw_emit_buffer_surface_state( brw, &stage_state->surf_offset[ prog_data->binding_table.shader_time_start], brw->shader_time.bo, 0, BRW_SURFACEFORMAT_RAW, diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp 1970-01-01 00:00:00.000000000 +0000 @@ -1,1987 +0,0 @@ -/* - * Copyright © 2012 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - -#include "main/context.h" -#include "main/teximage.h" -#include "main/fbobject.h" - -#include "compiler/nir/nir_builder.h" - -#include "intel_fbo.h" - -#include "brw_blorp.h" -#include "brw_context.h" -#include "brw_state.h" -#include "brw_meta_util.h" - -#define FILE_DEBUG_FLAG DEBUG_BLORP - -static struct intel_mipmap_tree * -find_miptree(GLbitfield buffer_bit, struct intel_renderbuffer *irb) -{ - struct intel_mipmap_tree *mt = irb->mt; - if (buffer_bit == GL_STENCIL_BUFFER_BIT && mt->stencil_mt) - mt = mt->stencil_mt; - return mt; -} - -static int -blorp_get_texture_swizzle(const struct intel_renderbuffer *irb) -{ - return irb->Base.Base._BaseFormat == GL_RGB ? - MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ONE) : - SWIZZLE_XYZW; -} - -static void -do_blorp_blit(struct brw_context *brw, GLbitfield buffer_bit, - struct intel_renderbuffer *src_irb, mesa_format src_format, - struct intel_renderbuffer *dst_irb, mesa_format dst_format, - GLfloat srcX0, GLfloat srcY0, GLfloat srcX1, GLfloat srcY1, - GLfloat dstX0, GLfloat dstY0, GLfloat dstX1, GLfloat dstY1, - GLenum filter, bool mirror_x, bool mirror_y) -{ - /* Find source/dst miptrees */ - struct intel_mipmap_tree *src_mt = find_miptree(buffer_bit, src_irb); - struct intel_mipmap_tree *dst_mt = find_miptree(buffer_bit, dst_irb); - - const bool es3 = _mesa_is_gles3(&brw->ctx); - /* Do the blit */ - brw_blorp_blit_miptrees(brw, - src_mt, src_irb->mt_level, src_irb->mt_layer, - src_format, blorp_get_texture_swizzle(src_irb), - dst_mt, dst_irb->mt_level, dst_irb->mt_layer, - dst_format, - srcX0, srcY0, srcX1, srcY1, - dstX0, dstY0, dstX1, dstY1, - filter, mirror_x, mirror_y, - es3, es3); - - dst_irb->need_downsample = true; -} - -static bool -try_blorp_blit(struct brw_context *brw, - const struct gl_framebuffer *read_fb, - const struct gl_framebuffer *draw_fb, - GLfloat srcX0, GLfloat srcY0, GLfloat srcX1, GLfloat srcY1, - GLfloat dstX0, GLfloat dstY0, GLfloat dstX1, GLfloat dstY1, - GLenum filter, GLbitfield buffer_bit) -{ - struct gl_context *ctx = &brw->ctx; - - /* Sync up the state of window system buffers. We need to do this before - * we go looking for the buffers. - */ - intel_prepare_render(brw); - - bool mirror_x, mirror_y; - if (brw_meta_mirror_clip_and_scissor(ctx, read_fb, draw_fb, - &srcX0, &srcY0, &srcX1, &srcY1, - &dstX0, &dstY0, &dstX1, &dstY1, - &mirror_x, &mirror_y)) - return true; - - /* Find buffers */ - struct intel_renderbuffer *src_irb; - struct intel_renderbuffer *dst_irb; - struct intel_mipmap_tree *src_mt; - struct intel_mipmap_tree *dst_mt; - switch (buffer_bit) { - case GL_COLOR_BUFFER_BIT: - src_irb = intel_renderbuffer(read_fb->_ColorReadBuffer); - for (unsigned i = 0; i < draw_fb->_NumColorDrawBuffers; ++i) { - dst_irb = intel_renderbuffer(draw_fb->_ColorDrawBuffers[i]); - if (dst_irb) - do_blorp_blit(brw, buffer_bit, - src_irb, src_irb->Base.Base.Format, - dst_irb, dst_irb->Base.Base.Format, - srcX0, srcY0, srcX1, srcY1, - dstX0, dstY0, dstX1, dstY1, - filter, mirror_x, mirror_y); - } - break; - case GL_DEPTH_BUFFER_BIT: - src_irb = - intel_renderbuffer(read_fb->Attachment[BUFFER_DEPTH].Renderbuffer); - dst_irb = - intel_renderbuffer(draw_fb->Attachment[BUFFER_DEPTH].Renderbuffer); - src_mt = find_miptree(buffer_bit, src_irb); - dst_mt = find_miptree(buffer_bit, dst_irb); - - /* We can't handle format conversions between Z24 and other formats - * since we have to lie about the surface format. See the comments in - * brw_blorp_surface_info::set(). - */ - if ((src_mt->format == MESA_FORMAT_Z24_UNORM_X8_UINT) != - (dst_mt->format == MESA_FORMAT_Z24_UNORM_X8_UINT)) - return false; - - do_blorp_blit(brw, buffer_bit, src_irb, MESA_FORMAT_NONE, - dst_irb, MESA_FORMAT_NONE, srcX0, srcY0, - srcX1, srcY1, dstX0, dstY0, dstX1, dstY1, - filter, mirror_x, mirror_y); - break; - case GL_STENCIL_BUFFER_BIT: - src_irb = - intel_renderbuffer(read_fb->Attachment[BUFFER_STENCIL].Renderbuffer); - dst_irb = - intel_renderbuffer(draw_fb->Attachment[BUFFER_STENCIL].Renderbuffer); - do_blorp_blit(brw, buffer_bit, src_irb, MESA_FORMAT_NONE, - dst_irb, MESA_FORMAT_NONE, srcX0, srcY0, - srcX1, srcY1, dstX0, dstY0, dstX1, dstY1, - filter, mirror_x, mirror_y); - break; - default: - unreachable("not reached"); - } - - return true; -} - -bool -brw_blorp_copytexsubimage(struct brw_context *brw, - struct gl_renderbuffer *src_rb, - struct gl_texture_image *dst_image, - int slice, - int srcX0, int srcY0, - int dstX0, int dstY0, - int width, int height) -{ - struct gl_context *ctx = &brw->ctx; - struct intel_renderbuffer *src_irb = intel_renderbuffer(src_rb); - struct intel_texture_image *intel_image = intel_texture_image(dst_image); - - /* No pixel transfer operations (zoom, bias, mapping), just a blit */ - if (brw->ctx._ImageTransferState) - return false; - - /* Sync up the state of window system buffers. We need to do this before - * we go looking at the src renderbuffer's miptree. - */ - intel_prepare_render(brw); - - struct intel_mipmap_tree *src_mt = src_irb->mt; - struct intel_mipmap_tree *dst_mt = intel_image->mt; - - /* There is support for only up to eight samples. */ - if (src_mt->num_samples > 8 || dst_mt->num_samples > 8) - return false; - - /* BLORP is only supported from Gen6 onwards. */ - if (brw->gen < 6) - return false; - - if (_mesa_get_format_base_format(src_rb->Format) != - _mesa_get_format_base_format(dst_image->TexFormat)) { - return false; - } - - /* We can't handle format conversions between Z24 and other formats since - * we have to lie about the surface format. See the comments in - * brw_blorp_surface_info::set(). - */ - if ((src_mt->format == MESA_FORMAT_Z24_UNORM_X8_UINT) != - (dst_mt->format == MESA_FORMAT_Z24_UNORM_X8_UINT)) { - return false; - } - - if (!brw->format_supported_as_render_target[dst_image->TexFormat]) - return false; - - /* Source clipping shouldn't be necessary, since copytexsubimage (in - * src/mesa/main/teximage.c) calls _mesa_clip_copytexsubimage() which - * takes care of it. - * - * Destination clipping shouldn't be necessary since the restrictions on - * glCopyTexSubImage prevent the user from specifying a destination rectangle - * that falls outside the bounds of the destination texture. - * See error_check_subtexture_dimensions(). - */ - - int srcY1 = srcY0 + height; - int srcX1 = srcX0 + width; - int dstX1 = dstX0 + width; - int dstY1 = dstY0 + height; - - /* Account for the fact that in the system framebuffer, the origin is at - * the lower left. - */ - bool mirror_y = false; - if (_mesa_is_winsys_fbo(ctx->ReadBuffer)) { - GLint tmp = src_rb->Height - srcY0; - srcY0 = src_rb->Height - srcY1; - srcY1 = tmp; - mirror_y = true; - } - - /* Account for face selection and texture view MinLayer */ - int dst_slice = slice + dst_image->TexObject->MinLayer + dst_image->Face; - int dst_level = dst_image->Level + dst_image->TexObject->MinLevel; - - brw_blorp_blit_miptrees(brw, - src_mt, src_irb->mt_level, src_irb->mt_layer, - src_rb->Format, blorp_get_texture_swizzle(src_irb), - dst_mt, dst_level, dst_slice, - dst_image->TexFormat, - srcX0, srcY0, srcX1, srcY1, - dstX0, dstY0, dstX1, dstY1, - GL_NEAREST, false, mirror_y, - false, false); - - /* If we're copying to a packed depth stencil texture and the source - * framebuffer has separate stencil, we need to also copy the stencil data - * over. - */ - src_rb = ctx->ReadBuffer->Attachment[BUFFER_STENCIL].Renderbuffer; - if (_mesa_get_format_bits(dst_image->TexFormat, GL_STENCIL_BITS) > 0 && - src_rb != NULL) { - src_irb = intel_renderbuffer(src_rb); - src_mt = src_irb->mt; - - if (src_mt->stencil_mt) - src_mt = src_mt->stencil_mt; - if (dst_mt->stencil_mt) - dst_mt = dst_mt->stencil_mt; - - if (src_mt != dst_mt) { - brw_blorp_blit_miptrees(brw, - src_mt, src_irb->mt_level, src_irb->mt_layer, - src_mt->format, - blorp_get_texture_swizzle(src_irb), - dst_mt, dst_level, dst_slice, - dst_mt->format, - srcX0, srcY0, srcX1, srcY1, - dstX0, dstY0, dstX1, dstY1, - GL_NEAREST, false, mirror_y, - false, false); - } - } - - return true; -} - - -GLbitfield -brw_blorp_framebuffer(struct brw_context *brw, - struct gl_framebuffer *readFb, - struct gl_framebuffer *drawFb, - GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, - GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, - GLbitfield mask, GLenum filter) -{ - /* BLORP is not supported before Gen6. */ - if (brw->gen < 6) - return mask; - - static GLbitfield buffer_bits[] = { - GL_COLOR_BUFFER_BIT, - GL_DEPTH_BUFFER_BIT, - GL_STENCIL_BUFFER_BIT, - }; - - for (unsigned int i = 0; i < ARRAY_SIZE(buffer_bits); ++i) { - if ((mask & buffer_bits[i]) && - try_blorp_blit(brw, readFb, drawFb, - srcX0, srcY0, srcX1, srcY1, - dstX0, dstY0, dstX1, dstY1, - filter, buffer_bits[i])) { - mask &= ~buffer_bits[i]; - } - } - - return mask; -} - - -/** - * Enum to specify the order of arguments in a sampler message - */ -enum sampler_message_arg -{ - SAMPLER_MESSAGE_ARG_U_FLOAT, - SAMPLER_MESSAGE_ARG_V_FLOAT, - SAMPLER_MESSAGE_ARG_U_INT, - SAMPLER_MESSAGE_ARG_V_INT, - SAMPLER_MESSAGE_ARG_R_INT, - SAMPLER_MESSAGE_ARG_SI_INT, - SAMPLER_MESSAGE_ARG_MCS_INT, - SAMPLER_MESSAGE_ARG_ZERO_INT, -}; - -struct brw_blorp_blit_vars { - /* Uniforms values from brw_blorp_wm_push_constants */ - nir_variable *u_dst_x0; - nir_variable *u_dst_x1; - nir_variable *u_dst_y0; - nir_variable *u_dst_y1; - nir_variable *u_rect_grid_x1; - nir_variable *u_rect_grid_y1; - struct { - nir_variable *multiplier; - nir_variable *offset; - } u_x_transform, u_y_transform; - nir_variable *u_src_z; - - /* gl_FragCoord */ - nir_variable *frag_coord; - - /* gl_FragColor */ - nir_variable *color_out; -}; - -static void -brw_blorp_blit_vars_init(nir_builder *b, struct brw_blorp_blit_vars *v, - const struct brw_blorp_blit_prog_key *key) -{ -#define LOAD_UNIFORM(name, type)\ - v->u_##name = nir_variable_create(b->shader, nir_var_uniform, type, #name); \ - v->u_##name->data.location = \ - offsetof(struct brw_blorp_wm_push_constants, name); - - LOAD_UNIFORM(dst_x0, glsl_uint_type()) - LOAD_UNIFORM(dst_x1, glsl_uint_type()) - LOAD_UNIFORM(dst_y0, glsl_uint_type()) - LOAD_UNIFORM(dst_y1, glsl_uint_type()) - LOAD_UNIFORM(rect_grid_x1, glsl_float_type()) - LOAD_UNIFORM(rect_grid_y1, glsl_float_type()) - LOAD_UNIFORM(x_transform.multiplier, glsl_float_type()) - LOAD_UNIFORM(x_transform.offset, glsl_float_type()) - LOAD_UNIFORM(y_transform.multiplier, glsl_float_type()) - LOAD_UNIFORM(y_transform.offset, glsl_float_type()) - LOAD_UNIFORM(src_z, glsl_uint_type()) - -#undef DECL_UNIFORM - - v->frag_coord = nir_variable_create(b->shader, nir_var_shader_in, - glsl_vec4_type(), "gl_FragCoord"); - v->frag_coord->data.location = VARYING_SLOT_POS; - v->frag_coord->data.origin_upper_left = true; - - v->color_out = nir_variable_create(b->shader, nir_var_shader_out, - glsl_vec4_type(), "gl_FragColor"); - v->color_out->data.location = FRAG_RESULT_COLOR; -} - -nir_ssa_def * -blorp_blit_get_frag_coords(nir_builder *b, - const struct brw_blorp_blit_prog_key *key, - struct brw_blorp_blit_vars *v) -{ - nir_ssa_def *coord = nir_f2i(b, nir_load_var(b, v->frag_coord)); - - if (key->persample_msaa_dispatch) { - return nir_vec3(b, nir_channel(b, coord, 0), nir_channel(b, coord, 1), - nir_load_system_value(b, nir_intrinsic_load_sample_id, 0)); - } else { - return nir_vec2(b, nir_channel(b, coord, 0), nir_channel(b, coord, 1)); - } -} - -/** - * Emit code to translate from destination (X, Y) coordinates to source (X, Y) - * coordinates. - */ -nir_ssa_def * -blorp_blit_apply_transform(nir_builder *b, nir_ssa_def *src_pos, - struct brw_blorp_blit_vars *v) -{ - nir_ssa_def *offset = nir_vec2(b, nir_load_var(b, v->u_x_transform.offset), - nir_load_var(b, v->u_y_transform.offset)); - nir_ssa_def *mul = nir_vec2(b, nir_load_var(b, v->u_x_transform.multiplier), - nir_load_var(b, v->u_y_transform.multiplier)); - - return nir_ffma(b, src_pos, mul, offset); -} - -static inline void -blorp_nir_discard_if_outside_rect(nir_builder *b, nir_ssa_def *pos, - struct brw_blorp_blit_vars *v) -{ - nir_ssa_def *c0, *c1, *c2, *c3; - c0 = nir_ult(b, nir_channel(b, pos, 0), nir_load_var(b, v->u_dst_x0)); - c1 = nir_uge(b, nir_channel(b, pos, 0), nir_load_var(b, v->u_dst_x1)); - c2 = nir_ult(b, nir_channel(b, pos, 1), nir_load_var(b, v->u_dst_y0)); - c3 = nir_uge(b, nir_channel(b, pos, 1), nir_load_var(b, v->u_dst_y1)); - nir_ssa_def *oob = nir_ior(b, nir_ior(b, c0, c1), nir_ior(b, c2, c3)); - - nir_intrinsic_instr *discard = - nir_intrinsic_instr_create(b->shader, nir_intrinsic_discard_if); - discard->src[0] = nir_src_for_ssa(oob); - nir_builder_instr_insert(b, &discard->instr); -} - -static nir_tex_instr * -blorp_create_nir_tex_instr(nir_shader *shader, nir_texop op, - nir_ssa_def *pos, unsigned num_srcs, - enum brw_reg_type dst_type) -{ - nir_tex_instr *tex = nir_tex_instr_create(shader, num_srcs); - - tex->op = op; - - switch (dst_type) { - case BRW_REGISTER_TYPE_F: - tex->dest_type = nir_type_float; - break; - case BRW_REGISTER_TYPE_D: - tex->dest_type = nir_type_int; - break; - case BRW_REGISTER_TYPE_UD: - tex->dest_type = nir_type_uint; - break; - default: - unreachable("Invalid texture return type"); - } - - tex->is_array = false; - tex->is_shadow = false; - - /* Blorp only has one texture and it's bound at unit 0 */ - tex->texture = NULL; - tex->sampler = NULL; - tex->texture_index = 0; - tex->sampler_index = 0; - - nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, NULL); - - return tex; -} - -static nir_ssa_def * -blorp_nir_tex(nir_builder *b, nir_ssa_def *pos, enum brw_reg_type dst_type) -{ - nir_tex_instr *tex = - blorp_create_nir_tex_instr(b->shader, nir_texop_tex, pos, 2, dst_type); - - assert(pos->num_components == 2); - tex->sampler_dim = GLSL_SAMPLER_DIM_2D; - tex->coord_components = 2; - tex->src[0].src_type = nir_tex_src_coord; - tex->src[0].src = nir_src_for_ssa(pos); - tex->src[1].src_type = nir_tex_src_lod; - tex->src[1].src = nir_src_for_ssa(nir_imm_int(b, 0)); - - nir_builder_instr_insert(b, &tex->instr); - - return &tex->dest.ssa; -} - -static nir_ssa_def * -blorp_nir_txf(nir_builder *b, struct brw_blorp_blit_vars *v, - nir_ssa_def *pos, enum brw_reg_type dst_type) -{ - nir_tex_instr *tex = - blorp_create_nir_tex_instr(b->shader, nir_texop_txf, pos, 2, dst_type); - - /* In order to properly handle 3-D textures, we pull the Z component from - * a uniform. TODO: This is a bit magic; we should probably make this - * more explicit in the future. - */ - assert(pos->num_components == 2); - pos = nir_vec3(b, nir_channel(b, pos, 0), nir_channel(b, pos, 1), - nir_load_var(b, v->u_src_z)); - - tex->sampler_dim = GLSL_SAMPLER_DIM_3D; - tex->coord_components = 3; - tex->src[0].src_type = nir_tex_src_coord; - tex->src[0].src = nir_src_for_ssa(pos); - tex->src[1].src_type = nir_tex_src_lod; - tex->src[1].src = nir_src_for_ssa(nir_imm_int(b, 0)); - - nir_builder_instr_insert(b, &tex->instr); - - return &tex->dest.ssa; -} - -static nir_ssa_def * -blorp_nir_txf_ms(nir_builder *b, nir_ssa_def *pos, nir_ssa_def *mcs, - enum brw_reg_type dst_type) -{ - nir_tex_instr *tex = - blorp_create_nir_tex_instr(b->shader, nir_texop_txf_ms, pos, - mcs != NULL ? 3 : 2, dst_type); - - tex->sampler_dim = GLSL_SAMPLER_DIM_MS; - tex->coord_components = 2; - tex->src[0].src_type = nir_tex_src_coord; - tex->src[0].src = nir_src_for_ssa(pos); - - tex->src[1].src_type = nir_tex_src_ms_index; - if (pos->num_components == 2) { - tex->src[1].src = nir_src_for_ssa(nir_imm_int(b, 0)); - } else { - assert(pos->num_components == 3); - tex->src[1].src = nir_src_for_ssa(nir_channel(b, pos, 2)); - } - - if (mcs) { - tex->src[2].src_type = nir_tex_src_ms_mcs; - tex->src[2].src = nir_src_for_ssa(mcs); - } - - nir_builder_instr_insert(b, &tex->instr); - - return &tex->dest.ssa; -} - -static nir_ssa_def * -blorp_nir_txf_ms_mcs(nir_builder *b, nir_ssa_def *pos) -{ - nir_tex_instr *tex = - blorp_create_nir_tex_instr(b->shader, nir_texop_txf_ms_mcs, - pos, 1, BRW_REGISTER_TYPE_D); - - tex->sampler_dim = GLSL_SAMPLER_DIM_MS; - tex->coord_components = 2; - tex->src[0].src_type = nir_tex_src_coord; - tex->src[0].src = nir_src_for_ssa(pos); - - nir_builder_instr_insert(b, &tex->instr); - - return &tex->dest.ssa; -} - -static nir_ssa_def * -nir_mask_shift_or(struct nir_builder *b, nir_ssa_def *dst, nir_ssa_def *src, - uint32_t src_mask, int src_left_shift) -{ - nir_ssa_def *masked = nir_iand(b, src, nir_imm_int(b, src_mask)); - - nir_ssa_def *shifted; - if (src_left_shift > 0) { - shifted = nir_ishl(b, masked, nir_imm_int(b, src_left_shift)); - } else if (src_left_shift < 0) { - shifted = nir_ushr(b, masked, nir_imm_int(b, -src_left_shift)); - } else { - assert(src_left_shift == 0); - shifted = masked; - } - - return nir_ior(b, dst, shifted); -} - -/** - * Emit code to compensate for the difference between Y and W tiling. - * - * This code modifies the X and Y coordinates according to the formula: - * - * (X', Y', S') = detile(W-MAJOR, tile(Y-MAJOR, X, Y, S)) - * - * (See brw_blorp_build_nir_shader). - */ -static inline nir_ssa_def * -blorp_nir_retile_y_to_w(nir_builder *b, nir_ssa_def *pos) -{ - assert(pos->num_components == 2); - nir_ssa_def *x_Y = nir_channel(b, pos, 0); - nir_ssa_def *y_Y = nir_channel(b, pos, 1); - - /* Given X and Y coordinates that describe an address using Y tiling, - * translate to the X and Y coordinates that describe the same address - * using W tiling. - * - * If we break down the low order bits of X and Y, using a - * single letter to represent each low-order bit: - * - * X = A << 7 | 0bBCDEFGH - * Y = J << 5 | 0bKLMNP (1) - * - * Then we can apply the Y tiling formula to see the memory offset being - * addressed: - * - * offset = (J * tile_pitch + A) << 12 | 0bBCDKLMNPEFGH (2) - * - * If we apply the W detiling formula to this memory location, that the - * corresponding X' and Y' coordinates are: - * - * X' = A << 6 | 0bBCDPFH (3) - * Y' = J << 6 | 0bKLMNEG - * - * Combining (1) and (3), we see that to transform (X, Y) to (X', Y'), - * we need to make the following computation: - * - * X' = (X & ~0b1011) >> 1 | (Y & 0b1) << 2 | X & 0b1 (4) - * Y' = (Y & ~0b1) << 1 | (X & 0b1000) >> 2 | (X & 0b10) >> 1 - */ - nir_ssa_def *x_W = nir_imm_int(b, 0); - x_W = nir_mask_shift_or(b, x_W, x_Y, 0xfffffff4, -1); - x_W = nir_mask_shift_or(b, x_W, y_Y, 0x1, 2); - x_W = nir_mask_shift_or(b, x_W, x_Y, 0x1, 0); - - nir_ssa_def *y_W = nir_imm_int(b, 0); - y_W = nir_mask_shift_or(b, y_W, y_Y, 0xfffffffe, 1); - y_W = nir_mask_shift_or(b, y_W, x_Y, 0x8, -2); - y_W = nir_mask_shift_or(b, y_W, x_Y, 0x2, -1); - - return nir_vec2(b, x_W, y_W); -} - -/** - * Emit code to compensate for the difference between Y and W tiling. - * - * This code modifies the X and Y coordinates according to the formula: - * - * (X', Y', S') = detile(Y-MAJOR, tile(W-MAJOR, X, Y, S)) - * - * (See brw_blorp_build_nir_shader). - */ -static inline nir_ssa_def * -blorp_nir_retile_w_to_y(nir_builder *b, nir_ssa_def *pos) -{ - assert(pos->num_components == 2); - nir_ssa_def *x_W = nir_channel(b, pos, 0); - nir_ssa_def *y_W = nir_channel(b, pos, 1); - - /* Applying the same logic as above, but in reverse, we obtain the - * formulas: - * - * X' = (X & ~0b101) << 1 | (Y & 0b10) << 2 | (Y & 0b1) << 1 | X & 0b1 - * Y' = (Y & ~0b11) >> 1 | (X & 0b100) >> 2 - */ - nir_ssa_def *x_Y = nir_imm_int(b, 0); - x_Y = nir_mask_shift_or(b, x_Y, x_W, 0xfffffffa, 1); - x_Y = nir_mask_shift_or(b, x_Y, y_W, 0x2, 2); - x_Y = nir_mask_shift_or(b, x_Y, y_W, 0x1, 1); - x_Y = nir_mask_shift_or(b, x_Y, x_W, 0x1, 0); - - nir_ssa_def *y_Y = nir_imm_int(b, 0); - y_Y = nir_mask_shift_or(b, y_Y, y_W, 0xfffffffc, -1); - y_Y = nir_mask_shift_or(b, y_Y, x_W, 0x4, -2); - - return nir_vec2(b, x_Y, y_Y); -} - -/** - * Emit code to compensate for the difference between MSAA and non-MSAA - * surfaces. - * - * This code modifies the X and Y coordinates according to the formula: - * - * (X', Y', S') = encode_msaa(num_samples, IMS, X, Y, S) - * - * (See brw_blorp_blit_program). - */ -static inline nir_ssa_def * -blorp_nir_encode_msaa(nir_builder *b, nir_ssa_def *pos, - unsigned num_samples, enum intel_msaa_layout layout) -{ - assert(pos->num_components == 2 || pos->num_components == 3); - - switch (layout) { - case INTEL_MSAA_LAYOUT_NONE: - assert(pos->num_components == 2); - return pos; - case INTEL_MSAA_LAYOUT_CMS: - /* We can't compensate for compressed layout since at this point in the - * program we haven't read from the MCS buffer. - */ - unreachable("Bad layout in encode_msaa"); - case INTEL_MSAA_LAYOUT_UMS: - /* No translation needed */ - return pos; - case INTEL_MSAA_LAYOUT_IMS: { - nir_ssa_def *x_in = nir_channel(b, pos, 0); - nir_ssa_def *y_in = nir_channel(b, pos, 1); - nir_ssa_def *s_in = pos->num_components == 2 ? nir_imm_int(b, 0) : - nir_channel(b, pos, 2); - - nir_ssa_def *x_out = nir_imm_int(b, 0); - nir_ssa_def *y_out = nir_imm_int(b, 0); - switch (num_samples) { - case 2: - case 4: - /* encode_msaa(2, IMS, X, Y, S) = (X', Y', 0) - * where X' = (X & ~0b1) << 1 | (S & 0b1) << 1 | (X & 0b1) - * Y' = Y - * - * encode_msaa(4, IMS, X, Y, S) = (X', Y', 0) - * where X' = (X & ~0b1) << 1 | (S & 0b1) << 1 | (X & 0b1) - * Y' = (Y & ~0b1) << 1 | (S & 0b10) | (Y & 0b1) - */ - x_out = nir_mask_shift_or(b, x_out, x_in, 0xfffffffe, 1); - x_out = nir_mask_shift_or(b, x_out, s_in, 0x1, 1); - x_out = nir_mask_shift_or(b, x_out, x_in, 0x1, 0); - if (num_samples == 2) { - y_out = y_in; - } else { - y_out = nir_mask_shift_or(b, y_out, y_in, 0xfffffffe, 1); - y_out = nir_mask_shift_or(b, y_out, s_in, 0x2, 0); - y_out = nir_mask_shift_or(b, y_out, y_in, 0x1, 0); - } - break; - - case 8: - /* encode_msaa(8, IMS, X, Y, S) = (X', Y', 0) - * where X' = (X & ~0b1) << 2 | (S & 0b100) | (S & 0b1) << 1 - * | (X & 0b1) - * Y' = (Y & ~0b1) << 1 | (S & 0b10) | (Y & 0b1) - */ - x_out = nir_mask_shift_or(b, x_out, x_in, 0xfffffffe, 2); - x_out = nir_mask_shift_or(b, x_out, s_in, 0x4, 0); - x_out = nir_mask_shift_or(b, x_out, s_in, 0x1, 1); - x_out = nir_mask_shift_or(b, x_out, x_in, 0x1, 0); - y_out = nir_mask_shift_or(b, y_out, y_in, 0xfffffffe, 1); - y_out = nir_mask_shift_or(b, y_out, s_in, 0x2, 0); - y_out = nir_mask_shift_or(b, y_out, y_in, 0x1, 0); - break; - - case 16: - /* encode_msaa(16, IMS, X, Y, S) = (X', Y', 0) - * where X' = (X & ~0b1) << 2 | (S & 0b100) | (S & 0b1) << 1 - * | (X & 0b1) - * Y' = (Y & ~0b1) << 2 | (S & 0b1000) >> 1 (S & 0b10) - * | (Y & 0b1) - */ - x_out = nir_mask_shift_or(b, x_out, x_in, 0xfffffffe, 2); - x_out = nir_mask_shift_or(b, x_out, s_in, 0x4, 0); - x_out = nir_mask_shift_or(b, x_out, s_in, 0x1, 1); - x_out = nir_mask_shift_or(b, x_out, x_in, 0x1, 0); - y_out = nir_mask_shift_or(b, y_out, y_in, 0xfffffffe, 2); - y_out = nir_mask_shift_or(b, y_out, s_in, 0x8, -1); - y_out = nir_mask_shift_or(b, y_out, s_in, 0x2, 0); - y_out = nir_mask_shift_or(b, y_out, y_in, 0x1, 0); - break; - - default: - unreachable("Invalid number of samples for IMS layout"); - } - - return nir_vec2(b, x_out, y_out); - } - - default: - unreachable("Invalid MSAA layout"); - } -} - -/** - * Emit code to compensate for the difference between MSAA and non-MSAA - * surfaces. - * - * This code modifies the X and Y coordinates according to the formula: - * - * (X', Y', S) = decode_msaa(num_samples, IMS, X, Y, S) - * - * (See brw_blorp_blit_program). - */ -static inline nir_ssa_def * -blorp_nir_decode_msaa(nir_builder *b, nir_ssa_def *pos, - unsigned num_samples, enum intel_msaa_layout layout) -{ - assert(pos->num_components == 2 || pos->num_components == 3); - - switch (layout) { - case INTEL_MSAA_LAYOUT_NONE: - /* No translation necessary, and S should already be zero. */ - assert(pos->num_components == 2); - return pos; - case INTEL_MSAA_LAYOUT_CMS: - /* We can't compensate for compressed layout since at this point in the - * program we don't have access to the MCS buffer. - */ - unreachable("Bad layout in encode_msaa"); - case INTEL_MSAA_LAYOUT_UMS: - /* No translation necessary. */ - return pos; - case INTEL_MSAA_LAYOUT_IMS: { - assert(pos->num_components == 2); - - nir_ssa_def *x_in = nir_channel(b, pos, 0); - nir_ssa_def *y_in = nir_channel(b, pos, 1); - - nir_ssa_def *x_out = nir_imm_int(b, 0); - nir_ssa_def *y_out = nir_imm_int(b, 0); - nir_ssa_def *s_out = nir_imm_int(b, 0); - switch (num_samples) { - case 2: - case 4: - /* decode_msaa(2, IMS, X, Y, 0) = (X', Y', S) - * where X' = (X & ~0b11) >> 1 | (X & 0b1) - * S = (X & 0b10) >> 1 - * - * decode_msaa(4, IMS, X, Y, 0) = (X', Y', S) - * where X' = (X & ~0b11) >> 1 | (X & 0b1) - * Y' = (Y & ~0b11) >> 1 | (Y & 0b1) - * S = (Y & 0b10) | (X & 0b10) >> 1 - */ - x_out = nir_mask_shift_or(b, x_out, x_in, 0xfffffffc, -1); - x_out = nir_mask_shift_or(b, x_out, x_in, 0x1, 0); - if (num_samples == 2) { - y_out = y_in; - s_out = nir_mask_shift_or(b, s_out, x_in, 0x2, -1); - } else { - y_out = nir_mask_shift_or(b, y_out, y_in, 0xfffffffc, -1); - y_out = nir_mask_shift_or(b, y_out, y_in, 0x1, 0); - s_out = nir_mask_shift_or(b, s_out, x_in, 0x2, -1); - s_out = nir_mask_shift_or(b, s_out, y_in, 0x2, 0); - } - break; - - case 8: - /* decode_msaa(8, IMS, X, Y, 0) = (X', Y', S) - * where X' = (X & ~0b111) >> 2 | (X & 0b1) - * Y' = (Y & ~0b11) >> 1 | (Y & 0b1) - * S = (X & 0b100) | (Y & 0b10) | (X & 0b10) >> 1 - */ - x_out = nir_mask_shift_or(b, x_out, x_in, 0xfffffff8, -2); - x_out = nir_mask_shift_or(b, x_out, x_in, 0x1, 0); - y_out = nir_mask_shift_or(b, y_out, y_in, 0xfffffffc, -1); - y_out = nir_mask_shift_or(b, y_out, y_in, 0x1, 0); - s_out = nir_mask_shift_or(b, s_out, x_in, 0x4, 0); - s_out = nir_mask_shift_or(b, s_out, y_in, 0x2, 0); - s_out = nir_mask_shift_or(b, s_out, x_in, 0x2, -1); - break; - - case 16: - /* decode_msaa(16, IMS, X, Y, 0) = (X', Y', S) - * where X' = (X & ~0b111) >> 2 | (X & 0b1) - * Y' = (Y & ~0b111) >> 2 | (Y & 0b1) - * S = (Y & 0b100) << 1 | (X & 0b100) | - * (Y & 0b10) | (X & 0b10) >> 1 - */ - x_out = nir_mask_shift_or(b, x_out, x_in, 0xfffffff8, -2); - x_out = nir_mask_shift_or(b, x_out, x_in, 0x1, 0); - y_out = nir_mask_shift_or(b, y_out, y_in, 0xfffffff8, -2); - y_out = nir_mask_shift_or(b, y_out, y_in, 0x1, 0); - s_out = nir_mask_shift_or(b, s_out, y_in, 0x4, 1); - s_out = nir_mask_shift_or(b, s_out, x_in, 0x4, 0); - s_out = nir_mask_shift_or(b, s_out, y_in, 0x2, 0); - s_out = nir_mask_shift_or(b, s_out, x_in, 0x2, -1); - break; - - default: - unreachable("Invalid number of samples for IMS layout"); - } - - return nir_vec3(b, x_out, y_out, s_out); - } - - default: - unreachable("Invalid MSAA layout"); - } -} - -/** - * Count the number of trailing 1 bits in the given value. For example: - * - * count_trailing_one_bits(0) == 0 - * count_trailing_one_bits(7) == 3 - * count_trailing_one_bits(11) == 2 - */ -static inline int count_trailing_one_bits(unsigned value) -{ -#ifdef HAVE___BUILTIN_CTZ - return __builtin_ctz(~value); -#else - return _mesa_bitcount(value & ~(value + 1)); -#endif -} - -static nir_ssa_def * -blorp_nir_manual_blend_average(nir_builder *b, nir_ssa_def *pos, - unsigned tex_samples, - enum intel_msaa_layout tex_layout, - enum brw_reg_type dst_type) -{ - /* If non-null, this is the outer-most if statement */ - nir_if *outer_if = NULL; - - nir_variable *color = - nir_local_variable_create(b->impl, glsl_vec4_type(), "color"); - - nir_ssa_def *mcs = NULL; - if (tex_layout == INTEL_MSAA_LAYOUT_CMS) - mcs = blorp_nir_txf_ms_mcs(b, pos); - - /* We add together samples using a binary tree structure, e.g. for 4x MSAA: - * - * result = ((sample[0] + sample[1]) + (sample[2] + sample[3])) / 4 - * - * This ensures that when all samples have the same value, no numerical - * precision is lost, since each addition operation always adds two equal - * values, and summing two equal floating point values does not lose - * precision. - * - * We perform this computation by treating the texture_data array as a - * stack and performing the following operations: - * - * - push sample 0 onto stack - * - push sample 1 onto stack - * - add top two stack entries - * - push sample 2 onto stack - * - push sample 3 onto stack - * - add top two stack entries - * - add top two stack entries - * - divide top stack entry by 4 - * - * Note that after pushing sample i onto the stack, the number of add - * operations we do is equal to the number of trailing 1 bits in i. This - * works provided the total number of samples is a power of two, which it - * always is for i965. - * - * For integer formats, we replace the add operations with average - * operations and skip the final division. - */ - nir_ssa_def *texture_data[5]; - unsigned stack_depth = 0; - for (unsigned i = 0; i < tex_samples; ++i) { - assert(stack_depth == _mesa_bitcount(i)); /* Loop invariant */ - - /* Push sample i onto the stack */ - assert(stack_depth < ARRAY_SIZE(texture_data)); - - nir_ssa_def *ms_pos = nir_vec3(b, nir_channel(b, pos, 0), - nir_channel(b, pos, 1), - nir_imm_int(b, i)); - texture_data[stack_depth++] = blorp_nir_txf_ms(b, ms_pos, mcs, dst_type); - - if (i == 0 && tex_layout == INTEL_MSAA_LAYOUT_CMS) { - /* The Ivy Bridge PRM, Vol4 Part1 p27 (Multisample Control Surface) - * suggests an optimization: - * - * "A simple optimization with probable large return in - * performance is to compare the MCS value to zero (indicating - * all samples are on sample slice 0), and sample only from - * sample slice 0 using ld2dss if MCS is zero." - * - * Note that in the case where the MCS value is zero, sampling from - * sample slice 0 using ld2dss and sampling from sample 0 using - * ld2dms are equivalent (since all samples are on sample slice 0). - * Since we have already sampled from sample 0, all we need to do is - * skip the remaining fetches and averaging if MCS is zero. - */ - nir_ssa_def *mcs_zero = - nir_ieq(b, nir_channel(b, mcs, 0), nir_imm_int(b, 0)); - if (tex_samples == 16) { - mcs_zero = nir_iand(b, mcs_zero, - nir_ieq(b, nir_channel(b, mcs, 1), nir_imm_int(b, 0))); - } - - nir_if *if_stmt = nir_if_create(b->shader); - if_stmt->condition = nir_src_for_ssa(mcs_zero); - nir_cf_node_insert(b->cursor, &if_stmt->cf_node); - - b->cursor = nir_after_cf_list(&if_stmt->then_list); - nir_store_var(b, color, texture_data[0], 0xf); - - b->cursor = nir_after_cf_list(&if_stmt->else_list); - outer_if = if_stmt; - } - - for (int j = 0; j < count_trailing_one_bits(i); j++) { - assert(stack_depth >= 2); - --stack_depth; - - assert(dst_type == BRW_REGISTER_TYPE_F); - texture_data[stack_depth - 1] = - nir_fadd(b, texture_data[stack_depth - 1], - texture_data[stack_depth]); - } - } - - /* We should have just 1 sample on the stack now. */ - assert(stack_depth == 1); - - texture_data[0] = nir_fmul(b, texture_data[0], - nir_imm_float(b, 1.0 / tex_samples)); - - nir_store_var(b, color, texture_data[0], 0xf); - - if (outer_if) - b->cursor = nir_after_cf_node(&outer_if->cf_node); - - return nir_load_var(b, color); -} - -static inline nir_ssa_def * -nir_imm_vec2(nir_builder *build, float x, float y) -{ - nir_const_value v; - - memset(&v, 0, sizeof(v)); - v.f32[0] = x; - v.f32[1] = y; - - return nir_build_imm(build, 4, 32, v); -} - -static nir_ssa_def * -blorp_nir_manual_blend_bilinear(nir_builder *b, nir_ssa_def *pos, - unsigned tex_samples, - const brw_blorp_blit_prog_key *key, - struct brw_blorp_blit_vars *v) -{ - nir_ssa_def *pos_xy = nir_channels(b, pos, 0x3); - - nir_ssa_def *scale = nir_imm_vec2(b, key->x_scale, key->y_scale); - - /* Translate coordinates to lay out the samples in a rectangular grid - * roughly corresponding to sample locations. - */ - pos_xy = nir_fmul(b, pos_xy, scale); - /* Adjust coordinates so that integers represent pixel centers rather - * than pixel edges. - */ - pos_xy = nir_fadd(b, pos_xy, nir_imm_float(b, -0.5)); - /* Clamp the X, Y texture coordinates to properly handle the sampling of - * texels on texture edges. - */ - pos_xy = nir_fmin(b, nir_fmax(b, pos_xy, nir_imm_float(b, 0.0)), - nir_vec2(b, nir_load_var(b, v->u_rect_grid_x1), - nir_load_var(b, v->u_rect_grid_y1))); - - /* Store the fractional parts to be used as bilinear interpolation - * coefficients. - */ - nir_ssa_def *frac_xy = nir_ffract(b, pos_xy); - /* Round the float coordinates down to nearest integer */ - pos_xy = nir_fdiv(b, nir_ftrunc(b, pos_xy), scale); - - nir_ssa_def *tex_data[4]; - for (unsigned i = 0; i < 4; ++i) { - float sample_off_x = (float)(i & 0x1) / key->x_scale; - float sample_off_y = (float)((i >> 1) & 0x1) / key->y_scale; - nir_ssa_def *sample_off = nir_imm_vec2(b, sample_off_x, sample_off_y); - - nir_ssa_def *sample_coords = nir_fadd(b, pos_xy, sample_off); - nir_ssa_def *sample_coords_int = nir_f2i(b, sample_coords); - - /* The MCS value we fetch has to match up with the pixel that we're - * sampling from. Since we sample from different pixels in each - * iteration of this "for" loop, the call to mcs_fetch() should be - * here inside the loop after computing the pixel coordinates. - */ - nir_ssa_def *mcs = NULL; - if (key->tex_layout == INTEL_MSAA_LAYOUT_CMS) - mcs = blorp_nir_txf_ms_mcs(b, sample_coords_int); - - /* Compute sample index and map the sample index to a sample number. - * Sample index layout shows the numbering of slots in a rectangular - * grid of samples with in a pixel. Sample number layout shows the - * rectangular grid of samples roughly corresponding to the real sample - * locations with in a pixel. - * In case of 4x MSAA, layout of sample indices matches the layout of - * sample numbers: - * --------- - * | 0 | 1 | - * --------- - * | 2 | 3 | - * --------- - * - * In case of 8x MSAA the two layouts don't match. - * sample index layout : --------- sample number layout : --------- - * | 0 | 1 | | 5 | 2 | - * --------- --------- - * | 2 | 3 | | 4 | 6 | - * --------- --------- - * | 4 | 5 | | 0 | 3 | - * --------- --------- - * | 6 | 7 | | 7 | 1 | - * --------- --------- - * - * Fortunately, this can be done fairly easily as: - * S' = (0x17306425 >> (S * 4)) & 0xf - * - * In the case of 16x MSAA the two layouts don't match. - * Sample index layout: Sample number layout: - * --------------------- --------------------- - * | 0 | 1 | 2 | 3 | | 15 | 10 | 9 | 7 | - * --------------------- --------------------- - * | 4 | 5 | 6 | 7 | | 4 | 1 | 3 | 13 | - * --------------------- --------------------- - * | 8 | 9 | 10 | 11 | | 12 | 2 | 0 | 6 | - * --------------------- --------------------- - * | 12 | 13 | 14 | 15 | | 11 | 8 | 5 | 14 | - * --------------------- --------------------- - * - * This is equivalent to - * S' = (0xe58b602cd31479af >> (S * 4)) & 0xf - */ - nir_ssa_def *frac = nir_ffract(b, sample_coords); - nir_ssa_def *sample = - nir_fdot2(b, frac, nir_imm_vec2(b, key->x_scale, - key->x_scale * key->y_scale)); - sample = nir_f2i(b, sample); - - if (tex_samples == 8) { - sample = nir_iand(b, nir_ishr(b, nir_imm_int(b, 0x17306425), - nir_ishl(b, sample, nir_imm_int(b, 2))), - nir_imm_int(b, 0xf)); - } else if (tex_samples == 16) { - nir_ssa_def *sample_low = - nir_iand(b, nir_ishr(b, nir_imm_int(b, 0xd31479af), - nir_ishl(b, sample, nir_imm_int(b, 2))), - nir_imm_int(b, 0xf)); - nir_ssa_def *sample_high = - nir_iand(b, nir_ishr(b, nir_imm_int(b, 0xe58b602c), - nir_ishl(b, nir_iadd(b, sample, - nir_imm_int(b, -8)), - nir_imm_int(b, 2))), - nir_imm_int(b, 0xf)); - - sample = nir_bcsel(b, nir_ilt(b, sample, nir_imm_int(b, 8)), - sample_low, sample_high); - } - nir_ssa_def *pos_ms = nir_vec3(b, nir_channel(b, sample_coords_int, 0), - nir_channel(b, sample_coords_int, 1), - sample); - tex_data[i] = blorp_nir_txf_ms(b, pos_ms, mcs, key->texture_data_type); - } - - nir_ssa_def *frac_x = nir_channel(b, frac_xy, 0); - nir_ssa_def *frac_y = nir_channel(b, frac_xy, 1); - return nir_flrp(b, nir_flrp(b, tex_data[0], tex_data[1], frac_x), - nir_flrp(b, tex_data[2], tex_data[3], frac_x), - frac_y); -} - -/** - * Generator for WM programs used in BLORP blits. - * - * The bulk of the work done by the WM program is to wrap and unwrap the - * coordinate transformations used by the hardware to store surfaces in - * memory. The hardware transforms a pixel location (X, Y, S) (where S is the - * sample index for a multisampled surface) to a memory offset by the - * following formulas: - * - * offset = tile(tiling_format, encode_msaa(num_samples, layout, X, Y, S)) - * (X, Y, S) = decode_msaa(num_samples, layout, detile(tiling_format, offset)) - * - * For a single-sampled surface, or for a multisampled surface using - * INTEL_MSAA_LAYOUT_UMS, encode_msaa() and decode_msaa are the identity - * function: - * - * encode_msaa(1, NONE, X, Y, 0) = (X, Y, 0) - * decode_msaa(1, NONE, X, Y, 0) = (X, Y, 0) - * encode_msaa(n, UMS, X, Y, S) = (X, Y, S) - * decode_msaa(n, UMS, X, Y, S) = (X, Y, S) - * - * For a 4x multisampled surface using INTEL_MSAA_LAYOUT_IMS, encode_msaa() - * embeds the sample number into bit 1 of the X and Y coordinates: - * - * encode_msaa(4, IMS, X, Y, S) = (X', Y', 0) - * where X' = (X & ~0b1) << 1 | (S & 0b1) << 1 | (X & 0b1) - * Y' = (Y & ~0b1 ) << 1 | (S & 0b10) | (Y & 0b1) - * decode_msaa(4, IMS, X, Y, 0) = (X', Y', S) - * where X' = (X & ~0b11) >> 1 | (X & 0b1) - * Y' = (Y & ~0b11) >> 1 | (Y & 0b1) - * S = (Y & 0b10) | (X & 0b10) >> 1 - * - * For an 8x multisampled surface using INTEL_MSAA_LAYOUT_IMS, encode_msaa() - * embeds the sample number into bits 1 and 2 of the X coordinate and bit 1 of - * the Y coordinate: - * - * encode_msaa(8, IMS, X, Y, S) = (X', Y', 0) - * where X' = (X & ~0b1) << 2 | (S & 0b100) | (S & 0b1) << 1 | (X & 0b1) - * Y' = (Y & ~0b1) << 1 | (S & 0b10) | (Y & 0b1) - * decode_msaa(8, IMS, X, Y, 0) = (X', Y', S) - * where X' = (X & ~0b111) >> 2 | (X & 0b1) - * Y' = (Y & ~0b11) >> 1 | (Y & 0b1) - * S = (X & 0b100) | (Y & 0b10) | (X & 0b10) >> 1 - * - * For X tiling, tile() combines together the low-order bits of the X and Y - * coordinates in the pattern 0byyyxxxxxxxxx, creating 4k tiles that are 512 - * bytes wide and 8 rows high: - * - * tile(x_tiled, X, Y, S) = A - * where A = tile_num << 12 | offset - * tile_num = (Y' >> 3) * tile_pitch + (X' >> 9) - * offset = (Y' & 0b111) << 9 - * | (X & 0b111111111) - * X' = X * cpp - * Y' = Y + S * qpitch - * detile(x_tiled, A) = (X, Y, S) - * where X = X' / cpp - * Y = Y' % qpitch - * S = Y' / qpitch - * Y' = (tile_num / tile_pitch) << 3 - * | (A & 0b111000000000) >> 9 - * X' = (tile_num % tile_pitch) << 9 - * | (A & 0b111111111) - * - * (In all tiling formulas, cpp is the number of bytes occupied by a single - * sample ("chars per pixel"), tile_pitch is the number of 4k tiles required - * to fill the width of the surface, and qpitch is the spacing (in rows) - * between array slices). - * - * For Y tiling, tile() combines together the low-order bits of the X and Y - * coordinates in the pattern 0bxxxyyyyyxxxx, creating 4k tiles that are 128 - * bytes wide and 32 rows high: - * - * tile(y_tiled, X, Y, S) = A - * where A = tile_num << 12 | offset - * tile_num = (Y' >> 5) * tile_pitch + (X' >> 7) - * offset = (X' & 0b1110000) << 5 - * | (Y' & 0b11111) << 4 - * | (X' & 0b1111) - * X' = X * cpp - * Y' = Y + S * qpitch - * detile(y_tiled, A) = (X, Y, S) - * where X = X' / cpp - * Y = Y' % qpitch - * S = Y' / qpitch - * Y' = (tile_num / tile_pitch) << 5 - * | (A & 0b111110000) >> 4 - * X' = (tile_num % tile_pitch) << 7 - * | (A & 0b111000000000) >> 5 - * | (A & 0b1111) - * - * For W tiling, tile() combines together the low-order bits of the X and Y - * coordinates in the pattern 0bxxxyyyyxyxyx, creating 4k tiles that are 64 - * bytes wide and 64 rows high (note that W tiling is only used for stencil - * buffers, which always have cpp = 1 and S=0): - * - * tile(w_tiled, X, Y, S) = A - * where A = tile_num << 12 | offset - * tile_num = (Y' >> 6) * tile_pitch + (X' >> 6) - * offset = (X' & 0b111000) << 6 - * | (Y' & 0b111100) << 3 - * | (X' & 0b100) << 2 - * | (Y' & 0b10) << 2 - * | (X' & 0b10) << 1 - * | (Y' & 0b1) << 1 - * | (X' & 0b1) - * X' = X * cpp = X - * Y' = Y + S * qpitch - * detile(w_tiled, A) = (X, Y, S) - * where X = X' / cpp = X' - * Y = Y' % qpitch = Y' - * S = Y / qpitch = 0 - * Y' = (tile_num / tile_pitch) << 6 - * | (A & 0b111100000) >> 3 - * | (A & 0b1000) >> 2 - * | (A & 0b10) >> 1 - * X' = (tile_num % tile_pitch) << 6 - * | (A & 0b111000000000) >> 6 - * | (A & 0b10000) >> 2 - * | (A & 0b100) >> 1 - * | (A & 0b1) - * - * Finally, for a non-tiled surface, tile() simply combines together the X and - * Y coordinates in the natural way: - * - * tile(untiled, X, Y, S) = A - * where A = Y * pitch + X' - * X' = X * cpp - * Y' = Y + S * qpitch - * detile(untiled, A) = (X, Y, S) - * where X = X' / cpp - * Y = Y' % qpitch - * S = Y' / qpitch - * X' = A % pitch - * Y' = A / pitch - * - * (In these formulas, pitch is the number of bytes occupied by a single row - * of samples). - */ -static nir_shader * -brw_blorp_build_nir_shader(struct brw_context *brw, void *mem_ctx, - const brw_blorp_blit_prog_key *key) -{ - nir_ssa_def *src_pos, *dst_pos, *color; - - /* Sanity checks */ - if (key->dst_tiled_w && key->rt_samples > 0) { - /* If the destination image is W tiled and multisampled, then the thread - * must be dispatched once per sample, not once per pixel. This is - * necessary because after conversion between W and Y tiling, there's no - * guarantee that all samples corresponding to a single pixel will still - * be together. - */ - assert(key->persample_msaa_dispatch); - } - - if (key->blend) { - /* We are blending, which means we won't have an opportunity to - * translate the tiling and sample count for the texture surface. So - * the surface state for the texture must be configured with the correct - * tiling and sample count. - */ - assert(!key->src_tiled_w); - assert(key->tex_samples == key->src_samples); - assert(key->tex_layout == key->src_layout); - assert(key->tex_samples > 0); - } - - if (key->persample_msaa_dispatch) { - /* It only makes sense to do persample dispatch if the render target is - * configured as multisampled. - */ - assert(key->rt_samples > 0); - } - - /* Make sure layout is consistent with sample count */ - assert((key->tex_layout == INTEL_MSAA_LAYOUT_NONE) == - (key->tex_samples == 0)); - assert((key->rt_layout == INTEL_MSAA_LAYOUT_NONE) == - (key->rt_samples == 0)); - assert((key->src_layout == INTEL_MSAA_LAYOUT_NONE) == - (key->src_samples == 0)); - assert((key->dst_layout == INTEL_MSAA_LAYOUT_NONE) == - (key->dst_samples == 0)); - - nir_builder b; - nir_builder_init_simple_shader(&b, mem_ctx, MESA_SHADER_FRAGMENT, NULL); - - struct brw_blorp_blit_vars v; - brw_blorp_blit_vars_init(&b, &v, key); - - dst_pos = blorp_blit_get_frag_coords(&b, key, &v); - - /* Render target and texture hardware don't support W tiling until Gen8. */ - const bool rt_tiled_w = false; - const bool tex_tiled_w = brw->gen >= 8 && key->src_tiled_w; - - /* The address that data will be written to is determined by the - * coordinates supplied to the WM thread and the tiling and sample count of - * the render target, according to the formula: - * - * (X, Y, S) = decode_msaa(rt_samples, detile(rt_tiling, offset)) - * - * If the actual tiling and sample count of the destination surface are not - * the same as the configuration of the render target, then these - * coordinates are wrong and we have to adjust them to compensate for the - * difference. - */ - if (rt_tiled_w != key->dst_tiled_w || - key->rt_samples != key->dst_samples || - key->rt_layout != key->dst_layout) { - dst_pos = blorp_nir_encode_msaa(&b, dst_pos, key->rt_samples, - key->rt_layout); - /* Now (X, Y, S) = detile(rt_tiling, offset) */ - if (rt_tiled_w != key->dst_tiled_w) - dst_pos = blorp_nir_retile_y_to_w(&b, dst_pos); - /* Now (X, Y, S) = detile(rt_tiling, offset) */ - dst_pos = blorp_nir_decode_msaa(&b, dst_pos, key->dst_samples, - key->dst_layout); - } - - /* Now (X, Y, S) = decode_msaa(dst_samples, detile(dst_tiling, offset)). - * - * That is: X, Y and S now contain the true coordinates and sample index of - * the data that the WM thread should output. - * - * If we need to kill pixels that are outside the destination rectangle, - * now is the time to do it. - */ - if (key->use_kill) - blorp_nir_discard_if_outside_rect(&b, dst_pos, &v); - - src_pos = blorp_blit_apply_transform(&b, nir_i2f(&b, dst_pos), &v); - if (dst_pos->num_components == 3) { - /* The sample coordinate is an integer that we want left alone but - * blorp_blit_apply_transform() blindly applies the transform to all - * three coordinates. Grab the original sample index. - */ - src_pos = nir_vec3(&b, nir_channel(&b, src_pos, 0), - nir_channel(&b, src_pos, 1), - nir_channel(&b, dst_pos, 2)); - } - - /* If the source image is not multisampled, then we want to fetch sample - * number 0, because that's the only sample there is. - */ - if (key->src_samples == 0) - src_pos = nir_channels(&b, src_pos, 0x3); - - /* X, Y, and S are now the coordinates of the pixel in the source image - * that we want to texture from. Exception: if we are blending, then S is - * irrelevant, because we are going to fetch all samples. - */ - if (key->blend && !key->blit_scaled) { - /* Resolves (effecively) use texelFetch, so we need integers and we - * don't care about the sample index if we got one. - */ - src_pos = nir_f2i(&b, nir_channels(&b, src_pos, 0x3)); - - if (brw->gen == 6) { - /* Because gen6 only supports 4x interleved MSAA, we can do all the - * blending we need with a single linear-interpolated texture lookup - * at the center of the sample. The texture coordinates to be odd - * integers so that they correspond to the center of a 2x2 block - * representing the four samples that maxe up a pixel. So we need - * to multiply our X and Y coordinates each by 2 and then add 1. - */ - src_pos = nir_ishl(&b, src_pos, nir_imm_int(&b, 1)); - src_pos = nir_iadd(&b, src_pos, nir_imm_int(&b, 1)); - src_pos = nir_i2f(&b, src_pos); - color = blorp_nir_tex(&b, src_pos, key->texture_data_type); - } else { - /* Gen7+ hardware doesn't automaticaly blend. */ - color = blorp_nir_manual_blend_average(&b, src_pos, key->src_samples, - key->src_layout, - key->texture_data_type); - } - } else if (key->blend && key->blit_scaled) { - color = blorp_nir_manual_blend_bilinear(&b, src_pos, key->src_samples, key, &v); - } else { - if (key->bilinear_filter) { - color = blorp_nir_tex(&b, src_pos, key->texture_data_type); - } else { - /* We're going to use texelFetch, so we need integers */ - if (src_pos->num_components == 2) { - src_pos = nir_f2i(&b, src_pos); - } else { - assert(src_pos->num_components == 3); - src_pos = nir_vec3(&b, nir_channel(&b, nir_f2i(&b, src_pos), 0), - nir_channel(&b, nir_f2i(&b, src_pos), 1), - nir_channel(&b, src_pos, 2)); - } - - /* We aren't blending, which means we just want to fetch a single - * sample from the source surface. The address that we want to fetch - * from is related to the X, Y and S values according to the formula: - * - * (X, Y, S) = decode_msaa(src_samples, detile(src_tiling, offset)). - * - * If the actual tiling and sample count of the source surface are - * not the same as the configuration of the texture, then we need to - * adjust the coordinates to compensate for the difference. - */ - if (tex_tiled_w != key->src_tiled_w || - key->tex_samples != key->src_samples || - key->tex_layout != key->src_layout) { - src_pos = blorp_nir_encode_msaa(&b, src_pos, key->src_samples, - key->src_layout); - /* Now (X, Y, S) = detile(src_tiling, offset) */ - if (tex_tiled_w != key->src_tiled_w) - src_pos = blorp_nir_retile_w_to_y(&b, src_pos); - /* Now (X, Y, S) = detile(tex_tiling, offset) */ - src_pos = blorp_nir_decode_msaa(&b, src_pos, key->tex_samples, - key->tex_layout); - } - - /* Now (X, Y, S) = decode_msaa(tex_samples, detile(tex_tiling, offset)). - * - * In other words: X, Y, and S now contain values which, when passed to - * the texturing unit, will cause data to be read from the correct - * memory location. So we can fetch the texel now. - */ - if (key->src_samples == 0) { - color = blorp_nir_txf(&b, &v, src_pos, key->texture_data_type); - } else { - nir_ssa_def *mcs = NULL; - if (key->tex_layout == INTEL_MSAA_LAYOUT_CMS) - mcs = blorp_nir_txf_ms_mcs(&b, src_pos); - - color = blorp_nir_txf_ms(&b, src_pos, mcs, key->texture_data_type); - } - } - } - - nir_store_var(&b, v.color_out, color, 0xf); - - return b.shader; -} - -static void -brw_blorp_get_blit_kernel(struct brw_context *brw, - struct brw_blorp_params *params, - const struct brw_blorp_blit_prog_key *prog_key) -{ - if (brw_search_cache(&brw->cache, BRW_CACHE_BLORP_PROG, - prog_key, sizeof(*prog_key), - ¶ms->wm_prog_kernel, ¶ms->wm_prog_data)) - return; - - void *mem_ctx = ralloc_context(NULL); - - const unsigned *program; - unsigned program_size; - struct brw_blorp_prog_data prog_data; - - /* Try and compile with NIR first. If that fails, fall back to the old - * method of building shaders manually. - */ - nir_shader *nir = brw_blorp_build_nir_shader(brw, mem_ctx, prog_key); - struct brw_wm_prog_key wm_key; - brw_blorp_init_wm_prog_key(&wm_key); - wm_key.tex.compressed_multisample_layout_mask = - prog_key->tex_layout == INTEL_MSAA_LAYOUT_CMS; - wm_key.tex.msaa_16 = prog_key->tex_samples == 16; - wm_key.multisample_fbo = prog_key->rt_samples > 1; - - program = brw_blorp_compile_nir_shader(brw, mem_ctx, nir, &wm_key, false, - &prog_data, &program_size); - - brw_upload_cache(&brw->cache, BRW_CACHE_BLORP_PROG, - prog_key, sizeof(*prog_key), - program, program_size, - &prog_data, sizeof(prog_data), - ¶ms->wm_prog_kernel, ¶ms->wm_prog_data); - - ralloc_free(mem_ctx); -} - -static void -brw_blorp_setup_coord_transform(struct brw_blorp_coord_transform *xform, - GLfloat src0, GLfloat src1, - GLfloat dst0, GLfloat dst1, - bool mirror) -{ - float scale = (src1 - src0) / (dst1 - dst0); - if (!mirror) { - /* When not mirroring a coordinate (say, X), we need: - * src_x - src_x0 = (dst_x - dst_x0 + 0.5) * scale - * Therefore: - * src_x = src_x0 + (dst_x - dst_x0 + 0.5) * scale - * - * blorp program uses "round toward zero" to convert the - * transformed floating point coordinates to integer coordinates, - * whereas the behaviour we actually want is "round to nearest", - * so 0.5 provides the necessary correction. - */ - xform->multiplier = scale; - xform->offset = src0 + (-dst0 + 0.5f) * scale; - } else { - /* When mirroring X we need: - * src_x - src_x0 = dst_x1 - dst_x - 0.5 - * Therefore: - * src_x = src_x0 + (dst_x1 -dst_x - 0.5) * scale - */ - xform->multiplier = -scale; - xform->offset = src0 + (dst1 - 0.5f) * scale; - } -} - - -/** - * Determine which MSAA layout the GPU pipeline should be configured for, - * based on the chip generation, the number of samples, and the true layout of - * the image in memory. - */ -inline intel_msaa_layout -compute_msaa_layout_for_pipeline(struct brw_context *brw, unsigned num_samples, - intel_msaa_layout true_layout) -{ - if (num_samples <= 1) { - /* Layout is used to determine if ld2dms is needed for sampling. In - * single sampled case normal ld is enough avoiding also the need to - * fetch mcs. Therefore simply set the layout to none. - */ - if (brw->gen >= 9 && true_layout == INTEL_MSAA_LAYOUT_CMS) { - return INTEL_MSAA_LAYOUT_NONE; - } - - /* When configuring the GPU for non-MSAA, we can still accommodate IMS - * format buffers, by transforming coordinates appropriately. - */ - assert(true_layout == INTEL_MSAA_LAYOUT_NONE || - true_layout == INTEL_MSAA_LAYOUT_IMS); - return INTEL_MSAA_LAYOUT_NONE; - } else { - assert(true_layout != INTEL_MSAA_LAYOUT_NONE); - } - - /* Prior to Gen7, all MSAA surfaces use IMS layout. */ - if (brw->gen == 6) { - assert(true_layout == INTEL_MSAA_LAYOUT_IMS); - } - - return true_layout; -} - - -/** - * Note: if the src (or dst) is a 2D multisample array texture on Gen7+ using - * INTEL_MSAA_LAYOUT_UMS or INTEL_MSAA_LAYOUT_CMS, src_layer (dst_layer) is - * the physical layer holding sample 0. So, for example, if - * src_mt->num_samples == 4, then logical layer n corresponds to src_layer == - * 4*n. - */ -void -brw_blorp_blit_miptrees(struct brw_context *brw, - struct intel_mipmap_tree *src_mt, - unsigned src_level, unsigned src_layer, - mesa_format src_format, int src_swizzle, - struct intel_mipmap_tree *dst_mt, - unsigned dst_level, unsigned dst_layer, - mesa_format dst_format, - float src_x0, float src_y0, - float src_x1, float src_y1, - float dst_x0, float dst_y0, - float dst_x1, float dst_y1, - GLenum filter, bool mirror_x, bool mirror_y, - bool decode_srgb, bool encode_srgb) -{ - /* Get ready to blit. This includes depth resolving the src and dst - * buffers if necessary. Note: it's not necessary to do a color resolve on - * the destination buffer because we use the standard render path to render - * to destination color buffers, and the standard render path is - * fast-color-aware. - */ - intel_miptree_resolve_color(brw, src_mt, INTEL_MIPTREE_IGNORE_CCS_E); - intel_miptree_slice_resolve_depth(brw, src_mt, src_level, src_layer); - intel_miptree_slice_resolve_depth(brw, dst_mt, dst_level, dst_layer); - - intel_miptree_prepare_mcs(brw, dst_mt); - - DBG("%s from %dx %s mt %p %d %d (%f,%f) (%f,%f)" - "to %dx %s mt %p %d %d (%f,%f) (%f,%f) (flip %d,%d)\n", - __func__, - src_mt->num_samples, _mesa_get_format_name(src_mt->format), src_mt, - src_level, src_layer, src_x0, src_y0, src_x1, src_y1, - dst_mt->num_samples, _mesa_get_format_name(dst_mt->format), dst_mt, - dst_level, dst_layer, dst_x0, dst_y0, dst_x1, dst_y1, - mirror_x, mirror_y); - - if (!decode_srgb && _mesa_get_format_color_encoding(src_format) == GL_SRGB) - src_format = _mesa_get_srgb_format_linear(src_format); - - if (!encode_srgb && _mesa_get_format_color_encoding(dst_format) == GL_SRGB) - dst_format = _mesa_get_srgb_format_linear(dst_format); - - struct brw_blorp_params params; - brw_blorp_params_init(¶ms); - - brw_blorp_surface_info_init(brw, ¶ms.src, src_mt, src_level, - src_layer, src_format, false); - brw_blorp_surface_info_init(brw, ¶ms.dst, dst_mt, dst_level, - dst_layer, dst_format, true); - - /* Even though we do multisample resolves at the time of the blit, OpenGL - * specification defines them as if they happen at the time of rendering, - * which means that the type of averaging we do during the resolve should - * only depend on the source format; the destination format should be - * ignored. But, specification doesn't seem to be strict about it. - * - * It has been observed that mulitisample resolves produce slightly better - * looking images when averaging is done using destination format. NVIDIA's - * proprietary OpenGL driver also follow this approach. So, we choose to - * follow it in our driver. - * - * When multisampling, if the source and destination formats are equal - * (aside from the color space), we choose to blit in sRGB space to get - * this higher quality image. - */ - if (params.src.num_samples > 1 && - _mesa_get_format_color_encoding(dst_mt->format) == GL_SRGB && - _mesa_get_srgb_format_linear(src_mt->format) == - _mesa_get_srgb_format_linear(dst_mt->format)) { - assert(brw->format_supported_as_render_target[dst_mt->format]); - params.dst.brw_surfaceformat = brw->render_target_format[dst_mt->format]; - params.src.brw_surfaceformat = brw_format_for_mesa_format(dst_mt->format); - } - - /* When doing a multisample resolve of a GL_LUMINANCE32F or GL_INTENSITY32F - * texture, the above code configures the source format for L32_FLOAT or - * I32_FLOAT, and the destination format for R32_FLOAT. On Sandy Bridge, - * the SAMPLE message appears to handle multisampled L32_FLOAT and - * I32_FLOAT textures incorrectly, resulting in blocky artifacts. So work - * around the problem by using a source format of R32_FLOAT. This - * shouldn't affect rendering correctness, since the destination format is - * R32_FLOAT, so only the contents of the red channel matters. - */ - if (brw->gen == 6 && - params.src.num_samples > 1 && params.dst.num_samples <= 1 && - src_mt->format == dst_mt->format && - params.dst.brw_surfaceformat == BRW_SURFACEFORMAT_R32_FLOAT) { - params.src.brw_surfaceformat = params.dst.brw_surfaceformat; - } - - struct brw_blorp_blit_prog_key wm_prog_key; - memset(&wm_prog_key, 0, sizeof(wm_prog_key)); - - /* texture_data_type indicates the register type that should be used to - * manipulate texture data. - */ - switch (_mesa_get_format_datatype(src_mt->format)) { - case GL_UNSIGNED_NORMALIZED: - case GL_SIGNED_NORMALIZED: - case GL_FLOAT: - wm_prog_key.texture_data_type = BRW_REGISTER_TYPE_F; - break; - case GL_UNSIGNED_INT: - if (src_mt->format == MESA_FORMAT_S_UINT8) { - /* We process stencil as though it's an unsigned normalized color */ - wm_prog_key.texture_data_type = BRW_REGISTER_TYPE_F; - } else { - wm_prog_key.texture_data_type = BRW_REGISTER_TYPE_UD; - } - break; - case GL_INT: - wm_prog_key.texture_data_type = BRW_REGISTER_TYPE_D; - break; - default: - unreachable("Unrecognized blorp format"); - } - - if (brw->gen > 6) { - /* Gen7's rendering hardware only supports the IMS layout for depth and - * stencil render targets. Blorp always maps its destination surface as - * a color render target (even if it's actually a depth or stencil - * buffer). So if the destination is IMS, we'll have to map it as a - * single-sampled texture and interleave the samples ourselves. - */ - if (dst_mt->msaa_layout == INTEL_MSAA_LAYOUT_IMS) - params.dst.num_samples = 0; - } - - if (params.dst.map_stencil_as_y_tiled && params.dst.num_samples > 1) { - /* If the destination surface is a W-tiled multisampled stencil buffer - * that we're mapping as Y tiled, then we need to arrange for the WM - * program to run once per sample rather than once per pixel, because - * the memory layout of related samples doesn't match between W and Y - * tiling. - */ - wm_prog_key.persample_msaa_dispatch = true; - } - - if (params.src.num_samples > 0 && params.dst.num_samples > 1) { - /* We are blitting from a multisample buffer to a multisample buffer, so - * we must preserve samples within a pixel. This means we have to - * arrange for the WM program to run once per sample rather than once - * per pixel. - */ - wm_prog_key.persample_msaa_dispatch = true; - } - - /* Scaled blitting or not. */ - wm_prog_key.blit_scaled = - ((dst_x1 - dst_x0) == (src_x1 - src_x0) && - (dst_y1 - dst_y0) == (src_y1 - src_y0)) ? false : true; - - /* Scaling factors used for bilinear filtering in multisample scaled - * blits. - */ - if (src_mt->num_samples == 16) - wm_prog_key.x_scale = 4.0f; - else - wm_prog_key.x_scale = 2.0f; - wm_prog_key.y_scale = src_mt->num_samples / wm_prog_key.x_scale; - - if (filter == GL_LINEAR && - params.src.num_samples <= 1 && params.dst.num_samples <= 1) - wm_prog_key.bilinear_filter = true; - - GLenum base_format = _mesa_get_format_base_format(src_mt->format); - if (base_format != GL_DEPTH_COMPONENT && /* TODO: what about depth/stencil? */ - base_format != GL_STENCIL_INDEX && - !_mesa_is_format_integer(src_mt->format) && - src_mt->num_samples > 1 && dst_mt->num_samples <= 1) { - /* We are downsampling a non-integer color buffer, so blend. - * - * Regarding integer color buffers, the OpenGL ES 3.2 spec says: - * - * "If the source formats are integer types or stencil values, a - * single sample's value is selected for each pixel." - * - * This implies we should not blend in that case. - */ - wm_prog_key.blend = true; - } - - /* src_samples and dst_samples are the true sample counts */ - wm_prog_key.src_samples = src_mt->num_samples; - wm_prog_key.dst_samples = dst_mt->num_samples; - - /* tex_samples and rt_samples are the sample counts that are set up in - * SURFACE_STATE. - */ - wm_prog_key.tex_samples = params.src.num_samples; - wm_prog_key.rt_samples = params.dst.num_samples; - - /* tex_layout and rt_layout indicate the MSAA layout the GPU pipeline will - * use to access the source and destination surfaces. - */ - wm_prog_key.tex_layout = - compute_msaa_layout_for_pipeline(brw, params.src.num_samples, - params.src.msaa_layout); - wm_prog_key.rt_layout = - compute_msaa_layout_for_pipeline(brw, params.dst.num_samples, - params.dst.msaa_layout); - - /* src_layout and dst_layout indicate the true MSAA layout used by src and - * dst. - */ - wm_prog_key.src_layout = src_mt->msaa_layout; - wm_prog_key.dst_layout = dst_mt->msaa_layout; - - /* On gen9+ compressed single sampled buffers carry the same layout type as - * multisampled. The difference is that they can be sampled using normal - * ld message and as render target behave just like non-compressed surface - * from compiler point of view. Therefore override the type in the program - * key. - */ - if (brw->gen >= 9 && params.src.num_samples <= 1 && - src_mt->msaa_layout == INTEL_MSAA_LAYOUT_CMS) - wm_prog_key.src_layout = INTEL_MSAA_LAYOUT_NONE; - if (brw->gen >= 9 && params.dst.num_samples <= 1 && - dst_mt->msaa_layout == INTEL_MSAA_LAYOUT_CMS) - wm_prog_key.dst_layout = INTEL_MSAA_LAYOUT_NONE; - - wm_prog_key.src_tiled_w = params.src.map_stencil_as_y_tiled; - wm_prog_key.dst_tiled_w = params.dst.map_stencil_as_y_tiled; - /* Round floating point values to nearest integer to avoid "off by one texel" - * kind of errors when blitting. - */ - params.x0 = params.wm_push_consts.dst_x0 = roundf(dst_x0); - params.y0 = params.wm_push_consts.dst_y0 = roundf(dst_y0); - params.x1 = params.wm_push_consts.dst_x1 = roundf(dst_x1); - params.y1 = params.wm_push_consts.dst_y1 = roundf(dst_y1); - params.wm_push_consts.rect_grid_x1 = - minify(src_mt->logical_width0, src_level) * wm_prog_key.x_scale - 1.0f; - params.wm_push_consts.rect_grid_y1 = - minify(src_mt->logical_height0, src_level) * wm_prog_key.y_scale - 1.0f; - - brw_blorp_setup_coord_transform(¶ms.wm_push_consts.x_transform, - src_x0, src_x1, dst_x0, dst_x1, mirror_x); - brw_blorp_setup_coord_transform(¶ms.wm_push_consts.y_transform, - src_y0, src_y1, dst_y0, dst_y1, mirror_y); - - params.wm_push_consts.src_z = - params.src.mt->target == GL_TEXTURE_3D ? params.src.layer : 0; - - if (params.dst.num_samples <= 1 && dst_mt->num_samples > 1) { - /* We must expand the rectangle we send through the rendering pipeline, - * to account for the fact that we are mapping the destination region as - * single-sampled when it is in fact multisampled. We must also align - * it to a multiple of the multisampling pattern, because the - * differences between multisampled and single-sampled surface formats - * will mean that pixels are scrambled within the multisampling pattern. - * TODO: what if this makes the coordinates too large? - * - * Note: this only works if the destination surface uses the IMS layout. - * If it's UMS, then we have no choice but to set up the rendering - * pipeline as multisampled. - */ - assert(dst_mt->msaa_layout == INTEL_MSAA_LAYOUT_IMS); - switch (dst_mt->num_samples) { - case 2: - params.x0 = ROUND_DOWN_TO(params.x0 * 2, 4); - params.y0 = ROUND_DOWN_TO(params.y0, 4); - params.x1 = ALIGN(params.x1 * 2, 4); - params.y1 = ALIGN(params.y1, 4); - break; - case 4: - params.x0 = ROUND_DOWN_TO(params.x0 * 2, 4); - params.y0 = ROUND_DOWN_TO(params.y0 * 2, 4); - params.x1 = ALIGN(params.x1 * 2, 4); - params.y1 = ALIGN(params.y1 * 2, 4); - break; - case 8: - params.x0 = ROUND_DOWN_TO(params.x0 * 4, 8); - params.y0 = ROUND_DOWN_TO(params.y0 * 2, 4); - params.x1 = ALIGN(params.x1 * 4, 8); - params.y1 = ALIGN(params.y1 * 2, 4); - break; - case 16: - params.x0 = ROUND_DOWN_TO(params.x0 * 4, 8); - params.y0 = ROUND_DOWN_TO(params.y0 * 4, 8); - params.x1 = ALIGN(params.x1 * 4, 8); - params.y1 = ALIGN(params.y1 * 4, 8); - break; - default: - unreachable("Unrecognized sample count in brw_blorp_blit_params ctor"); - } - wm_prog_key.use_kill = true; - } - - if (params.dst.map_stencil_as_y_tiled) { - /* We must modify the rectangle we send through the rendering pipeline - * (and the size and x/y offset of the destination surface), to account - * for the fact that we are mapping it as Y-tiled when it is in fact - * W-tiled. - * - * Both Y tiling and W tiling can be understood as organizations of - * 32-byte sub-tiles; within each 32-byte sub-tile, the layout of pixels - * is different, but the layout of the 32-byte sub-tiles within the 4k - * tile is the same (8 sub-tiles across by 16 sub-tiles down, in - * column-major order). In Y tiling, the sub-tiles are 16 bytes wide - * and 2 rows high; in W tiling, they are 8 bytes wide and 4 rows high. - * - * Therefore, to account for the layout differences within the 32-byte - * sub-tiles, we must expand the rectangle so the X coordinates of its - * edges are multiples of 8 (the W sub-tile width), and its Y - * coordinates of its edges are multiples of 4 (the W sub-tile height). - * Then we need to scale the X and Y coordinates of the rectangle to - * account for the differences in aspect ratio between the Y and W - * sub-tiles. We need to modify the layer width and height similarly. - * - * A correction needs to be applied when MSAA is in use: since - * INTEL_MSAA_LAYOUT_IMS uses an interleaving pattern whose height is 4, - * we need to align the Y coordinates to multiples of 8, so that when - * they are divided by two they are still multiples of 4. - * - * Note: Since the x/y offset of the surface will be applied using the - * SURFACE_STATE command packet, it will be invisible to the swizzling - * code in the shader; therefore it needs to be in a multiple of the - * 32-byte sub-tile size. Fortunately it is, since the sub-tile is 8 - * pixels wide and 4 pixels high (when viewed as a W-tiled stencil - * buffer), and the miplevel alignment used for stencil buffers is 8 - * pixels horizontally and either 4 or 8 pixels vertically (see - * intel_horizontal_texture_alignment_unit() and - * intel_vertical_texture_alignment_unit()). - * - * Note: Also, since the SURFACE_STATE command packet can only apply - * offsets that are multiples of 4 pixels horizontally and 2 pixels - * vertically, it is important that the offsets will be multiples of - * these sizes after they are converted into Y-tiled coordinates. - * Fortunately they will be, since we know from above that the offsets - * are a multiple of the 32-byte sub-tile size, and in Y-tiled - * coordinates the sub-tile is 16 pixels wide and 2 pixels high. - * - * TODO: what if this makes the coordinates (or the texture size) too - * large? - */ - const unsigned x_align = 8, y_align = params.dst.num_samples != 0 ? 8 : 4; - params.x0 = ROUND_DOWN_TO(params.x0, x_align) * 2; - params.y0 = ROUND_DOWN_TO(params.y0, y_align) / 2; - params.x1 = ALIGN(params.x1, x_align) * 2; - params.y1 = ALIGN(params.y1, y_align) / 2; - params.dst.width = ALIGN(params.dst.width, x_align) * 2; - params.dst.height = ALIGN(params.dst.height, y_align) / 2; - params.dst.x_offset *= 2; - params.dst.y_offset /= 2; - wm_prog_key.use_kill = true; - } - - if (params.src.map_stencil_as_y_tiled) { - /* We must modify the size and x/y offset of the source surface to - * account for the fact that we are mapping it as Y-tiled when it is in - * fact W tiled. - * - * See the comments above concerning x/y offset alignment for the - * destination surface. - * - * TODO: what if this makes the texture size too large? - */ - const unsigned x_align = 8, y_align = params.src.num_samples != 0 ? 8 : 4; - params.src.width = ALIGN(params.src.width, x_align) * 2; - params.src.height = ALIGN(params.src.height, y_align) / 2; - params.src.x_offset *= 2; - params.src.y_offset /= 2; - } - - brw_blorp_get_blit_kernel(brw, ¶ms, &wm_prog_key); - - params.src.swizzle = src_swizzle; - - brw_blorp_exec(brw, ¶ms); - - intel_miptree_slice_set_needs_hiz_resolve(dst_mt, dst_level, dst_layer); - - if (intel_miptree_is_lossless_compressed(brw, dst_mt)) - dst_mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_UNRESOLVED; -} diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_blorp.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_blorp.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_blorp.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_blorp.c 2017-06-01 10:37:10.000000000 +0000 @@ -21,409 +21,1059 @@ * IN THE SOFTWARE. */ -#include -#include "intel_batchbuffer.h" -#include "intel_fbo.h" +#include "main/context.h" +#include "main/teximage.h" +#include "main/blend.h" +#include "main/fbobject.h" +#include "main/renderbuffer.h" +#include "main/glformats.h" #include "brw_blorp.h" -#include "brw_compiler.h" -#include "brw_nir.h" +#include "brw_context.h" +#include "brw_defines.h" +#include "brw_meta_util.h" #include "brw_state.h" +#include "intel_fbo.h" +#include "intel_debug.h" #define FILE_DEBUG_FLAG DEBUG_BLORP +static bool +brw_blorp_lookup_shader(struct blorp_context *blorp, + const void *key, uint32_t key_size, + uint32_t *kernel_out, void *prog_data_out) +{ + struct brw_context *brw = blorp->driver_ctx; + return brw_search_cache(&brw->cache, BRW_CACHE_BLORP_PROG, + key, key_size, kernel_out, prog_data_out); +} + +static void +brw_blorp_upload_shader(struct blorp_context *blorp, + const void *key, uint32_t key_size, + const void *kernel, uint32_t kernel_size, + const struct brw_stage_prog_data *prog_data, + uint32_t prog_data_size, + uint32_t *kernel_out, void *prog_data_out) +{ + struct brw_context *brw = blorp->driver_ctx; + brw_upload_cache(&brw->cache, BRW_CACHE_BLORP_PROG, key, key_size, + kernel, kernel_size, prog_data, prog_data_size, + kernel_out, prog_data_out); +} + void -brw_blorp_surface_info_init(struct brw_context *brw, - struct brw_blorp_surface_info *info, - struct intel_mipmap_tree *mt, - unsigned int level, unsigned int layer, - mesa_format format, bool is_render_target) -{ - /* Layer is a physical layer, so if this is a 2D multisample array texture - * using INTEL_MSAA_LAYOUT_UMS or INTEL_MSAA_LAYOUT_CMS, then it had better - * be a multiple of num_samples. - */ +brw_blorp_init(struct brw_context *brw) +{ + blorp_init(&brw->blorp, brw, &brw->isl_dev); + + brw->blorp.compiler = brw->screen->compiler; + + switch (brw->gen) { + case 6: + brw->blorp.mocs.tex = 0; + brw->blorp.mocs.rb = 0; + brw->blorp.mocs.vb = 0; + brw->blorp.exec = gen6_blorp_exec; + break; + case 7: + brw->blorp.mocs.tex = GEN7_MOCS_L3; + brw->blorp.mocs.rb = GEN7_MOCS_L3; + brw->blorp.mocs.vb = GEN7_MOCS_L3; + if (brw->is_haswell) { + brw->blorp.exec = gen75_blorp_exec; + } else { + brw->blorp.exec = gen7_blorp_exec; + } + break; + case 8: + brw->blorp.mocs.tex = BDW_MOCS_WB; + brw->blorp.mocs.rb = BDW_MOCS_PTE; + brw->blorp.mocs.vb = BDW_MOCS_WB; + brw->blorp.exec = gen8_blorp_exec; + break; + case 9: + brw->blorp.mocs.tex = SKL_MOCS_WB; + brw->blorp.mocs.rb = SKL_MOCS_PTE; + brw->blorp.mocs.vb = SKL_MOCS_WB; + brw->blorp.exec = gen9_blorp_exec; + break; + default: + unreachable("Invalid gen"); + } + + brw->blorp.lookup_shader = brw_blorp_lookup_shader; + brw->blorp.upload_shader = brw_blorp_upload_shader; +} + +static void +apply_gen6_stencil_hiz_offset(struct isl_surf *surf, + struct intel_mipmap_tree *mt, + uint32_t lod, + uint32_t *offset) +{ + assert(mt->array_layout == ALL_SLICES_AT_EACH_LOD); + + if (mt->format == MESA_FORMAT_S_UINT8) { + /* Note: we can't compute the stencil offset using + * intel_miptree_get_aligned_offset(), because the miptree + * claims that the region is untiled even though it's W tiled. + */ + *offset = mt->level[lod].level_y * mt->pitch + + mt->level[lod].level_x * 64; + } else { + *offset = intel_miptree_get_aligned_offset(mt, + mt->level[lod].level_x, + mt->level[lod].level_y); + } + + surf->logical_level0_px.width = minify(surf->logical_level0_px.width, lod); + surf->logical_level0_px.height = minify(surf->logical_level0_px.height, lod); + surf->phys_level0_sa.width = minify(surf->phys_level0_sa.width, lod); + surf->phys_level0_sa.height = minify(surf->phys_level0_sa.height, lod); + surf->levels = 1; + surf->array_pitch_el_rows = + ALIGN(surf->phys_level0_sa.height, surf->image_alignment_el.height); +} + +static void +blorp_surf_for_miptree(struct brw_context *brw, + struct blorp_surf *surf, + struct intel_mipmap_tree *mt, + bool is_render_target, + uint32_t safe_aux_usage, + unsigned *level, + unsigned start_layer, unsigned num_layers, + struct isl_surf tmp_surfs[2]) +{ if (mt->msaa_layout == INTEL_MSAA_LAYOUT_UMS || mt->msaa_layout == INTEL_MSAA_LAYOUT_CMS) { - assert(mt->num_samples <= 1 || layer % mt->num_samples == 0); + const unsigned num_samples = MAX2(1, mt->num_samples); + for (unsigned i = 0; i < num_layers; i++) { + for (unsigned s = 0; s < num_samples; s++) { + const unsigned phys_layer = (start_layer + i) * num_samples + s; + intel_miptree_check_level_layer(mt, *level, phys_layer); + } + } + } else { + for (unsigned i = 0; i < num_layers; i++) + intel_miptree_check_level_layer(mt, *level, start_layer + i); } - intel_miptree_check_level_layer(mt, level, layer); + intel_miptree_get_isl_surf(brw, mt, &tmp_surfs[0]); + surf->surf = &tmp_surfs[0]; + surf->addr = (struct blorp_address) { + .buffer = mt->bo, + .offset = mt->offset, + .read_domains = is_render_target ? I915_GEM_DOMAIN_RENDER : + I915_GEM_DOMAIN_SAMPLER, + .write_domain = is_render_target ? I915_GEM_DOMAIN_RENDER : 0, + }; + + if (brw->gen == 6 && mt->format == MESA_FORMAT_S_UINT8 && + mt->array_layout == ALL_SLICES_AT_EACH_LOD) { + /* Sandy bridge stencil and HiZ use this ALL_SLICES_AT_EACH_LOD hack in + * order to allow for layered rendering. The hack makes each LOD of the + * stencil or HiZ buffer a single tightly packed array surface at some + * offset into the surface. Since ISL doesn't know how to deal with the + * crazy ALL_SLICES_AT_EACH_LOD layout and since we have to do a manual + * offset of it anyway, we might as well do the offset here and keep the + * hacks inside the i965 driver. + * + * See also gen6_depth_stencil_state.c + */ + uint32_t offset; + apply_gen6_stencil_hiz_offset(&tmp_surfs[0], mt, *level, &offset); + surf->addr.offset += offset; + *level = 0; + } - info->mt = mt; - info->level = level; - info->layer = layer; - info->width = minify(mt->physical_width0, level - mt->first_level); - info->height = minify(mt->physical_height0, level - mt->first_level); + struct isl_surf *aux_surf = &tmp_surfs[1]; + intel_miptree_get_aux_isl_surf(brw, mt, aux_surf, &surf->aux_usage); - intel_miptree_get_image_offset(mt, level, layer, - &info->x_offset, &info->y_offset); + if (surf->aux_usage != ISL_AUX_USAGE_NONE) { + if (surf->aux_usage == ISL_AUX_USAGE_HIZ) { + /* If we're not going to use it as a depth buffer, resolve HiZ */ + if (!(safe_aux_usage & (1 << ISL_AUX_USAGE_HIZ))) { + for (unsigned i = 0; i < num_layers; i++) { + intel_miptree_slice_resolve_depth(brw, mt, *level, + start_layer + i); + + /* If we're rendering to it then we'll need a HiZ resolve once + * we're done before we can use it with HiZ again. + */ + if (is_render_target) + intel_miptree_slice_set_needs_hiz_resolve(mt, *level, + start_layer + i); + } + surf->aux_usage = ISL_AUX_USAGE_NONE; + } + } else if (!(safe_aux_usage & (1 << surf->aux_usage))) { + uint32_t flags = 0; + if (safe_aux_usage & (1 << ISL_AUX_USAGE_CCS_E)) + flags |= INTEL_MIPTREE_IGNORE_CCS_E; + + intel_miptree_resolve_color(brw, mt, + *level, start_layer, num_layers, flags); + + assert(!intel_miptree_has_color_unresolved(mt, *level, 1, + start_layer, num_layers)); + surf->aux_usage = ISL_AUX_USAGE_NONE; + } + } - info->num_samples = mt->num_samples; - info->array_layout = mt->array_layout; - info->map_stencil_as_y_tiled = false; - info->msaa_layout = mt->msaa_layout; - info->swizzle = SWIZZLE_XYZW; + if (is_render_target) + intel_miptree_used_for_rendering(brw, mt, *level, + start_layer, num_layers); + + if (surf->aux_usage != ISL_AUX_USAGE_NONE) { + /* We only really need a clear color if we also have an auxiliary + * surface. Without one, it does nothing. + */ + surf->clear_color = intel_miptree_get_isl_clear_color(brw, mt); - if (format == MESA_FORMAT_NONE) - format = mt->format; + surf->aux_surf = aux_surf; + surf->aux_addr = (struct blorp_address) { + .read_domains = is_render_target ? I915_GEM_DOMAIN_RENDER : + I915_GEM_DOMAIN_SAMPLER, + .write_domain = is_render_target ? I915_GEM_DOMAIN_RENDER : 0, + }; + + if (mt->mcs_buf) { + surf->aux_addr.buffer = mt->mcs_buf->bo; + surf->aux_addr.offset = mt->mcs_buf->offset; + } else { + assert(surf->aux_usage == ISL_AUX_USAGE_HIZ); + struct intel_mipmap_tree *hiz_mt = mt->hiz_buf->mt; + if (hiz_mt) { + surf->aux_addr.buffer = hiz_mt->bo; + if (brw->gen == 6 && + hiz_mt->array_layout == ALL_SLICES_AT_EACH_LOD) { + /* gen6 requires the HiZ buffer to be manually offset to the + * right location. We could fixup the surf but it doesn't + * matter since most of those fields don't matter. + */ + apply_gen6_stencil_hiz_offset(aux_surf, hiz_mt, *level, + &surf->aux_addr.offset); + } else { + surf->aux_addr.offset = 0; + } + assert(hiz_mt->pitch == aux_surf->row_pitch); + } else { + surf->aux_addr.buffer = mt->hiz_buf->aux_base.bo; + surf->aux_addr.offset = mt->hiz_buf->aux_base.offset; + } + } + } else { + surf->aux_addr = (struct blorp_address) { + .buffer = NULL, + }; + memset(&surf->clear_color, 0, sizeof(surf->clear_color)); + } + assert((surf->aux_usage == ISL_AUX_USAGE_NONE) == + (surf->aux_addr.buffer == NULL)); +} +static enum isl_format +brw_blorp_to_isl_format(struct brw_context *brw, mesa_format format, + bool is_render_target) +{ switch (format) { + case MESA_FORMAT_NONE: + return ISL_FORMAT_UNSUPPORTED; case MESA_FORMAT_S_UINT8: - /* The miptree is a W-tiled stencil buffer. Surface states can't be set - * up for W tiling, so we'll need to use Y tiling and have the WM - * program swizzle the coordinates. - */ - info->map_stencil_as_y_tiled = true; - info->brw_surfaceformat = brw->gen >= 8 ? BRW_SURFACEFORMAT_R8_UINT : - BRW_SURFACEFORMAT_R8_UNORM; - break; + return ISL_FORMAT_R8_UINT; case MESA_FORMAT_Z24_UNORM_X8_UINT: - /* It would make sense to use BRW_SURFACEFORMAT_R24_UNORM_X8_TYPELESS - * here, but unfortunately it isn't supported as a render target, which - * would prevent us from blitting to 24-bit depth. - * - * The miptree consists of 32 bits per pixel, arranged as 24-bit depth - * values interleaved with 8 "don't care" bits. Since depth values don't - * require any blending, it doesn't matter how we interpret the bit - * pattern as long as we copy the right amount of data, so just map it - * as 8-bit BGRA. - */ - info->brw_surfaceformat = BRW_SURFACEFORMAT_B8G8R8A8_UNORM; - break; + case MESA_FORMAT_Z24_UNORM_S8_UINT: + return ISL_FORMAT_R24_UNORM_X8_TYPELESS; case MESA_FORMAT_Z_FLOAT32: - info->brw_surfaceformat = BRW_SURFACEFORMAT_R32_FLOAT; - break; + case MESA_FORMAT_Z32_FLOAT_S8X24_UINT: + return ISL_FORMAT_R32_FLOAT; case MESA_FORMAT_Z_UNORM16: - info->brw_surfaceformat = BRW_SURFACEFORMAT_R16_UNORM; - break; + return ISL_FORMAT_R16_UNORM; default: { if (is_render_target) { assert(brw->format_supported_as_render_target[format]); - info->brw_surfaceformat = brw->render_target_format[format]; + return brw->render_target_format[format]; } else { - info->brw_surfaceformat = brw_format_for_mesa_format(format); + return brw_format_for_mesa_format(format); } break; } } } - /** - * Split x_offset and y_offset into a base offset (in bytes) and a remaining - * x/y offset (in pixels). Note: we can't do this by calling - * intel_renderbuffer_tile_offsets(), because the offsets may have been - * adjusted to account for Y vs. W tiling differences. So we compute it - * directly from the adjusted offsets. + * Convert an swizzle enumeration (i.e. SWIZZLE_X) to one of the Gen7.5+ + * "Shader Channel Select" enumerations (i.e. HSW_SCS_RED). The mappings are + * + * SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W, SWIZZLE_ZERO, SWIZZLE_ONE + * 0 1 2 3 4 5 + * 4 5 6 7 0 1 + * SCS_RED, SCS_GREEN, SCS_BLUE, SCS_ALPHA, SCS_ZERO, SCS_ONE + * + * which is simply adding 4 then modding by 8 (or anding with 7). + * + * We then may need to apply workarounds for textureGather hardware bugs. */ -uint32_t -brw_blorp_compute_tile_offsets(const struct brw_blorp_surface_info *info, - uint32_t *tile_x, uint32_t *tile_y) -{ - uint32_t mask_x, mask_y; - - intel_get_tile_masks(info->mt->tiling, info->mt->tr_mode, info->mt->cpp, - info->map_stencil_as_y_tiled, - &mask_x, &mask_y); - - *tile_x = info->x_offset & mask_x; - *tile_y = info->y_offset & mask_y; - - return intel_miptree_get_aligned_offset(info->mt, info->x_offset & ~mask_x, - info->y_offset & ~mask_y, - info->map_stencil_as_y_tiled); +static enum isl_channel_select +swizzle_to_scs(GLenum swizzle) +{ + return (enum isl_channel_select)((swizzle + 4) & 7); } +static unsigned +physical_to_logical_layer(struct intel_mipmap_tree *mt, + unsigned physical_layer) +{ + if (mt->num_samples > 1 && + (mt->msaa_layout == INTEL_MSAA_LAYOUT_UMS || + mt->msaa_layout == INTEL_MSAA_LAYOUT_CMS)) { + assert(physical_layer % mt->num_samples == 0); + return physical_layer / mt->num_samples; + } else { + return physical_layer; + } +} +/** + * Note: if the src (or dst) is a 2D multisample array texture on Gen7+ using + * INTEL_MSAA_LAYOUT_UMS or INTEL_MSAA_LAYOUT_CMS, src_layer (dst_layer) is + * the physical layer holding sample 0. So, for example, if + * src_mt->num_samples == 4, then logical layer n corresponds to src_layer == + * 4*n. + */ void -brw_blorp_params_init(struct brw_blorp_params *params) +brw_blorp_blit_miptrees(struct brw_context *brw, + struct intel_mipmap_tree *src_mt, + unsigned src_level, unsigned src_layer, + mesa_format src_format, int src_swizzle, + struct intel_mipmap_tree *dst_mt, + unsigned dst_level, unsigned dst_layer, + mesa_format dst_format, + float src_x0, float src_y0, + float src_x1, float src_y1, + float dst_x0, float dst_y0, + float dst_x1, float dst_y1, + GLenum filter, bool mirror_x, bool mirror_y, + bool decode_srgb, bool encode_srgb) { - memset(params, 0, sizeof(*params)); - params->hiz_op = GEN6_HIZ_OP_NONE; - params->fast_clear_op = 0; - params->num_varyings = 0; - params->num_draw_buffers = 1; - params->num_layers = 1; + /* Blorp operates in logical layers */ + src_layer = physical_to_logical_layer(src_mt, src_layer); + dst_layer = physical_to_logical_layer(dst_mt, dst_layer); + + DBG("%s from %dx %s mt %p %d %d (%f,%f) (%f,%f)" + "to %dx %s mt %p %d %d (%f,%f) (%f,%f) (flip %d,%d)\n", + __func__, + src_mt->num_samples, _mesa_get_format_name(src_mt->format), src_mt, + src_level, src_layer, src_x0, src_y0, src_x1, src_y1, + dst_mt->num_samples, _mesa_get_format_name(dst_mt->format), dst_mt, + dst_level, dst_layer, dst_x0, dst_y0, dst_x1, dst_y1, + mirror_x, mirror_y); + + if (!decode_srgb && _mesa_get_format_color_encoding(src_format) == GL_SRGB) + src_format = _mesa_get_srgb_format_linear(src_format); + + if (!encode_srgb && _mesa_get_format_color_encoding(dst_format) == GL_SRGB) + dst_format = _mesa_get_srgb_format_linear(dst_format); + + /* When doing a multisample resolve of a GL_LUMINANCE32F or GL_INTENSITY32F + * texture, the above code configures the source format for L32_FLOAT or + * I32_FLOAT, and the destination format for R32_FLOAT. On Sandy Bridge, + * the SAMPLE message appears to handle multisampled L32_FLOAT and + * I32_FLOAT textures incorrectly, resulting in blocky artifacts. So work + * around the problem by using a source format of R32_FLOAT. This + * shouldn't affect rendering correctness, since the destination format is + * R32_FLOAT, so only the contents of the red channel matters. + */ + if (brw->gen == 6 && + src_mt->num_samples > 1 && dst_mt->num_samples <= 1 && + src_mt->format == dst_mt->format && + (dst_format == MESA_FORMAT_L_FLOAT32 || + dst_format == MESA_FORMAT_I_FLOAT32)) { + src_format = dst_format = MESA_FORMAT_R_FLOAT32; + } + + uint32_t src_usage_flags = (1 << ISL_AUX_USAGE_MCS); + if (src_format == src_mt->format) + src_usage_flags |= (1 << ISL_AUX_USAGE_CCS_E); + + uint32_t dst_usage_flags = (1 << ISL_AUX_USAGE_MCS); + if (dst_format == dst_mt->format) { + dst_usage_flags |= (1 << ISL_AUX_USAGE_CCS_E) | + (1 << ISL_AUX_USAGE_CCS_D); + } + + struct isl_surf tmp_surfs[4]; + struct blorp_surf src_surf, dst_surf; + blorp_surf_for_miptree(brw, &src_surf, src_mt, false, src_usage_flags, + &src_level, src_layer, 1, &tmp_surfs[0]); + blorp_surf_for_miptree(brw, &dst_surf, dst_mt, true, dst_usage_flags, + &dst_level, dst_layer, 1, &tmp_surfs[2]); + + struct isl_swizzle src_isl_swizzle = { + .r = swizzle_to_scs(GET_SWZ(src_swizzle, 0)), + .g = swizzle_to_scs(GET_SWZ(src_swizzle, 1)), + .b = swizzle_to_scs(GET_SWZ(src_swizzle, 2)), + .a = swizzle_to_scs(GET_SWZ(src_swizzle, 3)), + }; + + struct blorp_batch batch; + blorp_batch_init(&brw->blorp, &batch, brw, 0); + blorp_blit(&batch, &src_surf, src_level, src_layer, + brw_blorp_to_isl_format(brw, src_format, false), src_isl_swizzle, + &dst_surf, dst_level, dst_layer, + brw_blorp_to_isl_format(brw, dst_format, true), + ISL_SWIZZLE_IDENTITY, + src_x0, src_y0, src_x1, src_y1, + dst_x0, dst_y0, dst_x1, dst_y1, + filter, mirror_x, mirror_y); + blorp_batch_finish(&batch); } void -brw_blorp_init_wm_prog_key(struct brw_wm_prog_key *wm_key) +brw_blorp_copy_miptrees(struct brw_context *brw, + struct intel_mipmap_tree *src_mt, + unsigned src_level, unsigned src_layer, + struct intel_mipmap_tree *dst_mt, + unsigned dst_level, unsigned dst_layer, + unsigned src_x, unsigned src_y, + unsigned dst_x, unsigned dst_y, + unsigned src_width, unsigned src_height) { - memset(wm_key, 0, sizeof(*wm_key)); - wm_key->nr_color_regions = 1; - for (int i = 0; i < MAX_SAMPLERS; i++) - wm_key->tex.swizzles[i] = SWIZZLE_XYZW; + DBG("%s from %dx %s mt %p %d %d (%d,%d) %dx%d" + "to %dx %s mt %p %d %d (%d,%d)\n", + __func__, + src_mt->num_samples, _mesa_get_format_name(src_mt->format), src_mt, + src_level, src_layer, src_x, src_y, src_width, src_height, + dst_mt->num_samples, _mesa_get_format_name(dst_mt->format), dst_mt, + dst_level, dst_layer, dst_x, dst_y); + + struct isl_surf tmp_surfs[4]; + struct blorp_surf src_surf, dst_surf; + blorp_surf_for_miptree(brw, &src_surf, src_mt, false, + (1 << ISL_AUX_USAGE_MCS) | + (1 << ISL_AUX_USAGE_CCS_E), + &src_level, src_layer, 1, &tmp_surfs[0]); + blorp_surf_for_miptree(brw, &dst_surf, dst_mt, true, + (1 << ISL_AUX_USAGE_MCS) | + (1 << ISL_AUX_USAGE_CCS_E), + &dst_level, dst_layer, 1, &tmp_surfs[2]); + + struct blorp_batch batch; + blorp_batch_init(&brw->blorp, &batch, brw, 0); + blorp_copy(&batch, &src_surf, src_level, src_layer, + &dst_surf, dst_level, dst_layer, + src_x, src_y, dst_x, dst_y, src_width, src_height); + blorp_batch_finish(&batch); } -static int -nir_uniform_type_size(const struct glsl_type *type) +static struct intel_mipmap_tree * +find_miptree(GLbitfield buffer_bit, struct intel_renderbuffer *irb) { - /* Only very basic types are allowed */ - assert(glsl_type_is_vector_or_scalar(type)); - assert(glsl_get_bit_size(type) == 32); - - return glsl_get_vector_elements(type) * 4; + struct intel_mipmap_tree *mt = irb->mt; + if (buffer_bit == GL_STENCIL_BUFFER_BIT && mt->stencil_mt) + mt = mt->stencil_mt; + return mt; } -const unsigned * -brw_blorp_compile_nir_shader(struct brw_context *brw, void *mem_ctx, - struct nir_shader *nir, - const struct brw_wm_prog_key *wm_key, - bool use_repclear, - struct brw_blorp_prog_data *prog_data, - unsigned *program_size) +static int +blorp_get_texture_swizzle(const struct intel_renderbuffer *irb) { - const struct brw_compiler *compiler = brw->intelScreen->compiler; - - nir->options = - compiler->glsl_compiler_options[MESA_SHADER_FRAGMENT].NirOptions; + return irb->Base.Base._BaseFormat == GL_RGB ? + MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ONE) : + SWIZZLE_XYZW; +} - struct brw_wm_prog_data wm_prog_data; - memset(&wm_prog_data, 0, sizeof(wm_prog_data)); +static void +do_blorp_blit(struct brw_context *brw, GLbitfield buffer_bit, + struct intel_renderbuffer *src_irb, mesa_format src_format, + struct intel_renderbuffer *dst_irb, mesa_format dst_format, + GLfloat srcX0, GLfloat srcY0, GLfloat srcX1, GLfloat srcY1, + GLfloat dstX0, GLfloat dstY0, GLfloat dstX1, GLfloat dstY1, + GLenum filter, bool mirror_x, bool mirror_y) +{ + const struct gl_context *ctx = &brw->ctx; - /* We set up the params array but instead of making them point at actual - * GL constant values, they just store an index. This is just fine as the - * backend compiler never looks at the contents of the pointers, it just - * re-arranges them for us. - */ - const union gl_constant_value *param[BRW_BLORP_NUM_PUSH_CONSTANT_DWORDS]; - for (unsigned i = 0; i < ARRAY_SIZE(param); i++) - param[i] = (const union gl_constant_value *)(intptr_t)i; - - wm_prog_data.base.nr_params = BRW_BLORP_NUM_PUSH_CONSTANT_DWORDS; - wm_prog_data.base.param = param; - - /* BLORP always just uses the first two binding table entries */ - wm_prog_data.binding_table.render_target_start = 0; - wm_prog_data.base.binding_table.texture_start = 1; - - nir = brw_preprocess_nir(compiler, nir); - nir_remove_dead_variables(nir, nir_var_shader_in); - nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir)->impl); - - /* Uniforms are required to be lowered before going into compile_fs. For - * BLORP, we'll assume that whoever builds the shader sets the location - * they want so we just need to lower them and figure out how many we have - * in total. - */ - nir->num_uniforms = 0; - nir_foreach_variable(var, &nir->uniforms) { - var->data.driver_location = var->data.location; - unsigned end = var->data.location + nir_uniform_type_size(var->type); - nir->num_uniforms = MAX2(nir->num_uniforms, end); - } - nir_lower_io(nir, nir_var_uniform, nir_uniform_type_size); - - const unsigned *program = - brw_compile_fs(compiler, brw, mem_ctx, wm_key, &wm_prog_data, nir, - NULL, -1, -1, false, use_repclear, program_size, NULL); - - /* Copy the relavent bits of wm_prog_data over into the blorp prog data */ - prog_data->dispatch_8 = wm_prog_data.dispatch_8; - prog_data->dispatch_16 = wm_prog_data.dispatch_16; - prog_data->first_curbe_grf_0 = wm_prog_data.base.dispatch_grf_start_reg; - prog_data->first_curbe_grf_2 = wm_prog_data.dispatch_grf_start_reg_2; - prog_data->ksp_offset_2 = wm_prog_data.prog_offset_2; - prog_data->persample_msaa_dispatch = wm_prog_data.persample_dispatch; - - prog_data->nr_params = wm_prog_data.base.nr_params; - for (unsigned i = 0; i < ARRAY_SIZE(param); i++) - prog_data->param[i] = (uintptr_t)wm_prog_data.base.param[i]; + /* Find source/dst miptrees */ + struct intel_mipmap_tree *src_mt = find_miptree(buffer_bit, src_irb); + struct intel_mipmap_tree *dst_mt = find_miptree(buffer_bit, dst_irb); + + const bool do_srgb = ctx->Color.sRGBEnabled; + + /* Do the blit */ + brw_blorp_blit_miptrees(brw, + src_mt, src_irb->mt_level, src_irb->mt_layer, + src_format, blorp_get_texture_swizzle(src_irb), + dst_mt, dst_irb->mt_level, dst_irb->mt_layer, + dst_format, + srcX0, srcY0, srcX1, srcY1, + dstX0, dstY0, dstX1, dstY1, + filter, mirror_x, mirror_y, + do_srgb, do_srgb); - return program; + dst_irb->need_downsample = true; } -/** - * Perform a HiZ or depth resolve operation. - * - * For an overview of HiZ ops, see the following sections of the Sandy Bridge - * PRM, Volume 1, Part 2: - * - 7.5.3.1 Depth Buffer Clear - * - 7.5.3.2 Depth Buffer Resolve - * - 7.5.3.3 Hierarchical Depth Buffer Resolve - */ -void -intel_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt, - unsigned int level, unsigned int layer, enum gen6_hiz_op op) +static bool +try_blorp_blit(struct brw_context *brw, + const struct gl_framebuffer *read_fb, + const struct gl_framebuffer *draw_fb, + GLfloat srcX0, GLfloat srcY0, GLfloat srcX1, GLfloat srcY1, + GLfloat dstX0, GLfloat dstY0, GLfloat dstX1, GLfloat dstY1, + GLenum filter, GLbitfield buffer_bit) { - const char *opname = NULL; + struct gl_context *ctx = &brw->ctx; - switch (op) { - case GEN6_HIZ_OP_DEPTH_RESOLVE: - opname = "depth resolve"; - break; - case GEN6_HIZ_OP_HIZ_RESOLVE: - opname = "hiz ambiguate"; + /* Sync up the state of window system buffers. We need to do this before + * we go looking for the buffers. + */ + intel_prepare_render(brw); + + bool mirror_x, mirror_y; + if (brw_meta_mirror_clip_and_scissor(ctx, read_fb, draw_fb, + &srcX0, &srcY0, &srcX1, &srcY1, + &dstX0, &dstY0, &dstX1, &dstY1, + &mirror_x, &mirror_y)) + return true; + + /* Find buffers */ + struct intel_renderbuffer *src_irb; + struct intel_renderbuffer *dst_irb; + struct intel_mipmap_tree *src_mt; + struct intel_mipmap_tree *dst_mt; + switch (buffer_bit) { + case GL_COLOR_BUFFER_BIT: + src_irb = intel_renderbuffer(read_fb->_ColorReadBuffer); + for (unsigned i = 0; i < draw_fb->_NumColorDrawBuffers; ++i) { + dst_irb = intel_renderbuffer(draw_fb->_ColorDrawBuffers[i]); + if (dst_irb) + do_blorp_blit(brw, buffer_bit, + src_irb, src_irb->Base.Base.Format, + dst_irb, dst_irb->Base.Base.Format, + srcX0, srcY0, srcX1, srcY1, + dstX0, dstY0, dstX1, dstY1, + filter, mirror_x, mirror_y); + } break; - case GEN6_HIZ_OP_DEPTH_CLEAR: - opname = "depth clear"; + case GL_DEPTH_BUFFER_BIT: + src_irb = + intel_renderbuffer(read_fb->Attachment[BUFFER_DEPTH].Renderbuffer); + dst_irb = + intel_renderbuffer(draw_fb->Attachment[BUFFER_DEPTH].Renderbuffer); + src_mt = find_miptree(buffer_bit, src_irb); + dst_mt = find_miptree(buffer_bit, dst_irb); + + /* We can't handle format conversions between Z24 and other formats + * since we have to lie about the surface format. See the comments in + * brw_blorp_surface_info::set(). + */ + if ((src_mt->format == MESA_FORMAT_Z24_UNORM_X8_UINT) != + (dst_mt->format == MESA_FORMAT_Z24_UNORM_X8_UINT)) + return false; + + do_blorp_blit(brw, buffer_bit, src_irb, MESA_FORMAT_NONE, + dst_irb, MESA_FORMAT_NONE, srcX0, srcY0, + srcX1, srcY1, dstX0, dstY0, dstX1, dstY1, + filter, mirror_x, mirror_y); break; - case GEN6_HIZ_OP_NONE: - opname = "noop?"; + case GL_STENCIL_BUFFER_BIT: + src_irb = + intel_renderbuffer(read_fb->Attachment[BUFFER_STENCIL].Renderbuffer); + dst_irb = + intel_renderbuffer(draw_fb->Attachment[BUFFER_STENCIL].Renderbuffer); + do_blorp_blit(brw, buffer_bit, src_irb, MESA_FORMAT_NONE, + dst_irb, MESA_FORMAT_NONE, srcX0, srcY0, + srcX1, srcY1, dstX0, dstY0, dstX1, dstY1, + filter, mirror_x, mirror_y); break; + default: + unreachable("not reached"); } - DBG("%s %s to mt %p level %d layer %d\n", - __func__, opname, mt, level, layer); - - if (brw->gen >= 8) { - gen8_hiz_exec(brw, mt, level, layer, op); - } else { - gen6_blorp_hiz_exec(brw, mt, level, layer, op); - } + return true; } -void -brw_blorp_exec(struct brw_context *brw, const struct brw_blorp_params *params) +bool +brw_blorp_copytexsubimage(struct brw_context *brw, + struct gl_renderbuffer *src_rb, + struct gl_texture_image *dst_image, + int slice, + int srcX0, int srcY0, + int dstX0, int dstY0, + int width, int height) { struct gl_context *ctx = &brw->ctx; - const uint32_t estimated_max_batch_usage = brw->gen >= 8 ? 1800 : 1500; - bool check_aperture_failed_once = false; + struct intel_renderbuffer *src_irb = intel_renderbuffer(src_rb); + struct intel_texture_image *intel_image = intel_texture_image(dst_image); - /* Flush the sampler and render caches. We definitely need to flush the - * sampler cache so that we get updated contents from the render cache for - * the glBlitFramebuffer() source. Also, we are sometimes warned in the - * docs to flush the cache between reinterpretations of the same surface - * data with different formats, which blorp does for stencil and depth - * data. + /* No pixel transfer operations (zoom, bias, mapping), just a blit */ + if (brw->ctx._ImageTransferState) + return false; + + /* Sync up the state of window system buffers. We need to do this before + * we go looking at the src renderbuffer's miptree. */ - brw_emit_mi_flush(brw); + intel_prepare_render(brw); - brw_select_pipeline(brw, BRW_RENDER_PIPELINE); + struct intel_mipmap_tree *src_mt = src_irb->mt; + struct intel_mipmap_tree *dst_mt = intel_image->mt; -retry: - intel_batchbuffer_require_space(brw, estimated_max_batch_usage, RENDER_RING); - intel_batchbuffer_save_state(brw); - drm_intel_bo *saved_bo = brw->batch.bo; - uint32_t saved_used = USED_BATCH(brw->batch); - uint32_t saved_state_batch_offset = brw->batch.state_batch_offset; + /* There is support for only up to eight samples. */ + if (src_mt->num_samples > 8 || dst_mt->num_samples > 8) + return false; + + /* BLORP is only supported from Gen6 onwards. */ + if (brw->gen < 6) + return false; + + if (_mesa_get_format_base_format(src_rb->Format) != + _mesa_get_format_base_format(dst_image->TexFormat)) { + return false; + } - switch (brw->gen) { - case 6: - gen6_blorp_exec(brw, params); - break; - case 7: - gen7_blorp_exec(brw, params); - break; - case 8: - case 9: - gen8_blorp_exec(brw, params); - break; - default: - /* BLORP is not supported before Gen6. */ - unreachable("not reached"); + /* We can't handle format conversions between Z24 and other formats since + * we have to lie about the surface format. See the comments in + * brw_blorp_surface_info::set(). + */ + if ((src_mt->format == MESA_FORMAT_Z24_UNORM_X8_UINT) != + (dst_mt->format == MESA_FORMAT_Z24_UNORM_X8_UINT)) { + return false; } - /* Make sure we didn't wrap the batch unintentionally, and make sure we - * reserved enough space that a wrap will never happen. + if (!brw->format_supported_as_render_target[dst_image->TexFormat]) + return false; + + /* Source clipping shouldn't be necessary, since copytexsubimage (in + * src/mesa/main/teximage.c) calls _mesa_clip_copytexsubimage() which + * takes care of it. + * + * Destination clipping shouldn't be necessary since the restrictions on + * glCopyTexSubImage prevent the user from specifying a destination rectangle + * that falls outside the bounds of the destination texture. + * See error_check_subtexture_dimensions(). */ - assert(brw->batch.bo == saved_bo); - assert((USED_BATCH(brw->batch) - saved_used) * 4 + - (saved_state_batch_offset - brw->batch.state_batch_offset) < - estimated_max_batch_usage); - /* Shut up compiler warnings on release build */ - (void)saved_bo; - (void)saved_used; - (void)saved_state_batch_offset; - - /* Check if the blorp op we just did would make our batch likely to fail to - * map all the BOs into the GPU at batch exec time later. If so, flush the - * batch and try again with nothing else in the batch. + + int srcY1 = srcY0 + height; + int srcX1 = srcX0 + width; + int dstX1 = dstX0 + width; + int dstY1 = dstY0 + height; + + /* Account for the fact that in the system framebuffer, the origin is at + * the lower left. */ - if (dri_bufmgr_check_aperture_space(&brw->batch.bo, 1)) { - if (!check_aperture_failed_once) { - check_aperture_failed_once = true; - intel_batchbuffer_reset_to_saved(brw); - intel_batchbuffer_flush(brw); - goto retry; - } else { - int ret = intel_batchbuffer_flush(brw); - WARN_ONCE(ret == -ENOSPC, - "i965: blorp emit exceeded available aperture space\n"); + bool mirror_y = false; + if (_mesa_is_winsys_fbo(ctx->ReadBuffer)) { + GLint tmp = src_rb->Height - srcY0; + srcY0 = src_rb->Height - srcY1; + srcY1 = tmp; + mirror_y = true; + } + + /* Account for face selection and texture view MinLayer */ + int dst_slice = slice + dst_image->TexObject->MinLayer + dst_image->Face; + int dst_level = dst_image->Level + dst_image->TexObject->MinLevel; + + brw_blorp_blit_miptrees(brw, + src_mt, src_irb->mt_level, src_irb->mt_layer, + src_rb->Format, blorp_get_texture_swizzle(src_irb), + dst_mt, dst_level, dst_slice, + dst_image->TexFormat, + srcX0, srcY0, srcX1, srcY1, + dstX0, dstY0, dstX1, dstY1, + GL_NEAREST, false, mirror_y, + false, false); + + /* If we're copying to a packed depth stencil texture and the source + * framebuffer has separate stencil, we need to also copy the stencil data + * over. + */ + src_rb = ctx->ReadBuffer->Attachment[BUFFER_STENCIL].Renderbuffer; + if (_mesa_get_format_bits(dst_image->TexFormat, GL_STENCIL_BITS) > 0 && + src_rb != NULL) { + src_irb = intel_renderbuffer(src_rb); + src_mt = src_irb->mt; + + if (src_mt->stencil_mt) + src_mt = src_mt->stencil_mt; + if (dst_mt->stencil_mt) + dst_mt = dst_mt->stencil_mt; + + if (src_mt != dst_mt) { + brw_blorp_blit_miptrees(brw, + src_mt, src_irb->mt_level, src_irb->mt_layer, + src_mt->format, + blorp_get_texture_swizzle(src_irb), + dst_mt, dst_level, dst_slice, + dst_mt->format, + srcX0, srcY0, srcX1, srcY1, + dstX0, dstY0, dstX1, dstY1, + GL_NEAREST, false, mirror_y, + false, false); + } + } + + return true; +} + + +GLbitfield +brw_blorp_framebuffer(struct brw_context *brw, + struct gl_framebuffer *readFb, + struct gl_framebuffer *drawFb, + GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, + GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, + GLbitfield mask, GLenum filter) +{ + /* BLORP is not supported before Gen6. */ + if (brw->gen < 6) + return mask; + + static GLbitfield buffer_bits[] = { + GL_COLOR_BUFFER_BIT, + GL_DEPTH_BUFFER_BIT, + GL_STENCIL_BUFFER_BIT, + }; + + for (unsigned int i = 0; i < ARRAY_SIZE(buffer_bits); ++i) { + if ((mask & buffer_bits[i]) && + try_blorp_blit(brw, readFb, drawFb, + srcX0, srcY0, srcX1, srcY1, + dstX0, dstY0, dstX1, dstY1, + filter, buffer_bits[i])) { + mask &= ~buffer_bits[i]; } } - if (unlikely(brw->always_flush_batch)) - intel_batchbuffer_flush(brw); + return mask; +} - /* We've smashed all state compared to what the normal 3D pipeline - * rendering tracks for GL. +static bool +set_write_disables(const struct intel_renderbuffer *irb, + const GLubyte *color_mask, bool *color_write_disable) +{ + /* Format information in the renderbuffer represents the requirements + * given by the client. There are cases where the backing miptree uses, + * for example, RGBA to represent RGBX. Since the client is only expecting + * RGB we can treat alpha as not used and write whatever we like into it. */ - brw->ctx.NewDriverState |= BRW_NEW_BLORP; - brw->no_depth_or_stencil = false; - brw->ib.type = -1; + const GLenum base_format = irb->Base.Base._BaseFormat; + const int components = _mesa_base_format_component_count(base_format); + bool disables = false; + + assert(components > 0); + + for (int i = 0; i < components; i++) { + color_write_disable[i] = !color_mask[i]; + disables = disables || !color_mask[i]; + } + + return disables; +} - /* Flush the sampler cache so any texturing from the destination is - * coherent. +static unsigned +irb_logical_mt_layer(struct intel_renderbuffer *irb) +{ + return physical_to_logical_layer(irb->mt, irb->mt_layer); +} + +static bool +do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb, + struct gl_renderbuffer *rb, unsigned buf, + bool partial_clear, bool encode_srgb) +{ + struct gl_context *ctx = &brw->ctx; + struct intel_renderbuffer *irb = intel_renderbuffer(rb); + mesa_format format = irb->mt->format; + uint32_t x0, x1, y0, y1; + + if (!encode_srgb && _mesa_get_format_color_encoding(format) == GL_SRGB) + format = _mesa_get_srgb_format_linear(format); + + x0 = fb->_Xmin; + x1 = fb->_Xmax; + if (rb->Name != 0) { + y0 = fb->_Ymin; + y1 = fb->_Ymax; + } else { + y0 = rb->Height - fb->_Ymax; + y1 = rb->Height - fb->_Ymin; + } + + /* If the clear region is empty, just return. */ + if (x0 == x1 || y0 == y1) + return true; + + bool can_fast_clear = !partial_clear; + + bool color_write_disable[4] = { false, false, false, false }; + if (set_write_disables(irb, ctx->Color.ColorMask[buf], color_write_disable)) + can_fast_clear = false; + + if (irb->mt->aux_disable & INTEL_AUX_DISABLE_CCS || + !brw_is_color_fast_clear_compatible(brw, irb->mt, &ctx->Color.ClearColor)) + can_fast_clear = false; + + const unsigned logical_layer = irb_logical_mt_layer(irb); + const enum intel_fast_clear_state fast_clear_state = + intel_miptree_get_fast_clear_state(irb->mt, irb->mt_level, + logical_layer); + + /* Surface state can only record one fast clear color value. Therefore + * unless different levels/layers agree on the color it can be used to + * represent only single level/layer. Here it will be reserved for the + * first slice (level 0, layer 0). */ - brw_emit_mi_flush(brw); + if (irb->layer_count > 1 || irb->mt_level || irb->mt_layer) + can_fast_clear = false; + + if (can_fast_clear) { + union gl_color_union override_color = + brw_meta_convert_fast_clear_color(brw, irb->mt, + &ctx->Color.ClearColor); + + /* Record the clear color in the miptree so that it will be + * programmed in SURFACE_STATE by later rendering and resolve + * operations. + */ + const bool color_updated = brw_meta_set_fast_clear_color( + brw, &irb->mt->gen9_fast_clear_color, + &override_color); + + /* If the buffer is already in INTEL_FAST_CLEAR_STATE_CLEAR, the clear + * is redundant and can be skipped. + */ + if (!color_updated && fast_clear_state == INTEL_FAST_CLEAR_STATE_CLEAR) + return true; + + /* If the MCS buffer hasn't been allocated yet, we need to allocate + * it now. + */ + if (!irb->mt->mcs_buf) { + assert(!intel_miptree_is_lossless_compressed(brw, irb->mt)); + if (!intel_miptree_alloc_non_msrt_mcs(brw, irb->mt, false)) { + /* MCS allocation failed--probably this will only happen in + * out-of-memory conditions. But in any case, try to recover + * by falling back to a non-blorp clear technique. + */ + return false; + } + } + } + + const unsigned num_layers = fb->MaxNumLayers ? irb->layer_count : 1; + + /* We can't setup the blorp_surf until we've allocated the MCS above */ + struct isl_surf isl_tmp[2]; + struct blorp_surf surf; + unsigned level = irb->mt_level; + blorp_surf_for_miptree(brw, &surf, irb->mt, true, + (1 << ISL_AUX_USAGE_MCS) | + (1 << ISL_AUX_USAGE_CCS_E) | + (1 << ISL_AUX_USAGE_CCS_D), + &level, logical_layer, num_layers, isl_tmp); + + if (can_fast_clear) { + DBG("%s (fast) to mt %p level %d layers %d+%d\n", __FUNCTION__, + irb->mt, irb->mt_level, irb->mt_layer, num_layers); + + /* Ivybrigde PRM Vol 2, Part 1, "11.7 MCS Buffer for Render Target(s)": + * + * "Any transition from any value in {Clear, Render, Resolve} to a + * different value in {Clear, Render, Resolve} requires end of pipe + * synchronization." + * + * In other words, fast clear ops are not properly synchronized with + * other drawing. We need to use a PIPE_CONTROL to ensure that the + * contents of the previous draw hit the render target before we resolve + * and again afterwards to ensure that the resolve is complete before we + * do any more regular drawing. + */ + brw_emit_pipe_control_flush(brw, + PIPE_CONTROL_RENDER_TARGET_FLUSH | + PIPE_CONTROL_CS_STALL); + + struct blorp_batch batch; + blorp_batch_init(&brw->blorp, &batch, brw, 0); + blorp_fast_clear(&batch, &surf, + (enum isl_format)brw->render_target_format[format], + level, logical_layer, num_layers, + x0, y0, x1, y1); + blorp_batch_finish(&batch); + + brw_emit_pipe_control_flush(brw, + PIPE_CONTROL_RENDER_TARGET_FLUSH | + PIPE_CONTROL_CS_STALL); + + /* Now that the fast clear has occurred, put the buffer in + * INTEL_FAST_CLEAR_STATE_CLEAR so that we won't waste time doing + * redundant clears. + */ + intel_miptree_set_fast_clear_state(brw, irb->mt, irb->mt_level, + logical_layer, num_layers, + INTEL_FAST_CLEAR_STATE_CLEAR); + } else { + DBG("%s (slow) to mt %p level %d layer %d+%d\n", __FUNCTION__, + irb->mt, irb->mt_level, irb->mt_layer, num_layers); + + union isl_color_value clear_color; + memcpy(clear_color.f32, ctx->Color.ClearColor.f, sizeof(float) * 4); + + struct blorp_batch batch; + blorp_batch_init(&brw->blorp, &batch, brw, 0); + blorp_clear(&batch, &surf, + (enum isl_format)brw->render_target_format[format], + ISL_SWIZZLE_IDENTITY, + level, irb_logical_mt_layer(irb), num_layers, + x0, y0, x1, y1, + clear_color, color_write_disable); + blorp_batch_finish(&batch); + } + + return true; +} + +bool +brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb, + GLbitfield mask, bool partial_clear, bool encode_srgb) +{ + for (unsigned buf = 0; buf < fb->_NumColorDrawBuffers; buf++) { + struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[buf]; + struct intel_renderbuffer *irb = intel_renderbuffer(rb); + + /* Only clear the buffers present in the provided mask */ + if (((1 << fb->_ColorDrawBufferIndexes[buf]) & mask) == 0) + continue; + + /* If this is an ES2 context or GL_ARB_ES2_compatibility is supported, + * the framebuffer can be complete with some attachments missing. In + * this case the _ColorDrawBuffers pointer will be NULL. + */ + if (rb == NULL) + continue; + + if (!do_single_blorp_clear(brw, fb, rb, buf, partial_clear, + encode_srgb)) { + return false; + } + + irb->need_downsample = true; + } + + return true; } void -gen6_blorp_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt, - unsigned int level, unsigned int layer, enum gen6_hiz_op op) +brw_blorp_resolve_color(struct brw_context *brw, struct intel_mipmap_tree *mt, + unsigned level, unsigned layer) { - struct brw_blorp_params params; - brw_blorp_params_init(¶ms); + DBG("%s to mt %p level %u layer %u\n", __FUNCTION__, mt, level, layer); - params.hiz_op = op; + const mesa_format format = _mesa_get_srgb_format_linear(mt->format); - brw_blorp_surface_info_init(brw, ¶ms.depth, mt, level, layer, - mt->format, true); + struct isl_surf isl_tmp[2]; + struct blorp_surf surf; + blorp_surf_for_miptree(brw, &surf, mt, true, + (1 << ISL_AUX_USAGE_CCS_E) | + (1 << ISL_AUX_USAGE_CCS_D), + &level, layer, 1 /* num_layers */, + isl_tmp); + + enum blorp_fast_clear_op resolve_op; + if (brw->gen >= 9) { + if (surf.aux_usage == ISL_AUX_USAGE_CCS_E) + resolve_op = BLORP_FAST_CLEAR_OP_RESOLVE_FULL; + else + resolve_op = BLORP_FAST_CLEAR_OP_RESOLVE_PARTIAL; + } else { + assert(surf.aux_usage == ISL_AUX_USAGE_CCS_D); + /* Broadwell and earlier do not have a partial resolve */ + resolve_op = BLORP_FAST_CLEAR_OP_RESOLVE_FULL; + } - /* Align the rectangle primitive to 8x4 pixels. + /* Ivybrigde PRM Vol 2, Part 1, "11.7 MCS Buffer for Render Target(s)": * - * During fast depth clears, the emitted rectangle primitive must be - * aligned to 8x4 pixels. From the Ivybridge PRM, Vol 2 Part 1 Section - * 11.5.3.1 Depth Buffer Clear (and the matching section in the Sandybridge - * PRM): - * If Number of Multisamples is NUMSAMPLES_1, the rectangle must be - * aligned to an 8x4 pixel block relative to the upper left corner - * of the depth buffer [...] + * "Any transition from any value in {Clear, Render, Resolve} to a + * different value in {Clear, Render, Resolve} requires end of pipe + * synchronization." * - * For hiz resolves, the rectangle must also be 8x4 aligned. Item - * WaHizAmbiguate8x4Aligned from the Haswell workarounds page and the - * Ivybridge simulator require the alignment. - * - * To be safe, let's just align the rect for all hiz operations and all - * hardware generations. - * - * However, for some miptree slices of a Z24 texture, emitting an 8x4 - * aligned rectangle that covers the slice may clobber adjacent slices if - * we strictly adhered to the texture alignments specified in the PRM. The - * Ivybridge PRM, Section "Alignment Unit Size", states that - * SURFACE_STATE.Surface_Horizontal_Alignment should be 4 for Z24 surfaces, - * not 8. But commit 1f112cc increased the alignment from 4 to 8, which - * prevents the clobbering. + * In other words, fast clear ops are not properly synchronized with + * other drawing. We need to use a PIPE_CONTROL to ensure that the + * contents of the previous draw hit the render target before we resolve + * and again afterwards to ensure that the resolve is complete before we + * do any more regular drawing. */ - params.dst.num_samples = mt->num_samples; - if (params.dst.num_samples > 1) { - params.depth.width = ALIGN(mt->logical_width0, 8); - params.depth.height = ALIGN(mt->logical_height0, 4); - } else { - params.depth.width = ALIGN(params.depth.width, 8); - params.depth.height = ALIGN(params.depth.height, 4); - } - - params.x1 = params.depth.width; - params.y1 = params.depth.height; + brw_emit_pipe_control_flush(brw, + PIPE_CONTROL_RENDER_TARGET_FLUSH | + PIPE_CONTROL_CS_STALL); + + + struct blorp_batch batch; + blorp_batch_init(&brw->blorp, &batch, brw, 0); + blorp_ccs_resolve(&batch, &surf, level, layer, + brw_blorp_to_isl_format(brw, format, true), + resolve_op); + blorp_batch_finish(&batch); + + /* See comment above */ + brw_emit_pipe_control_flush(brw, + PIPE_CONTROL_RENDER_TARGET_FLUSH | + PIPE_CONTROL_CS_STALL); +} +static void +gen6_blorp_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt, + unsigned int level, unsigned int layer, enum blorp_hiz_op op) +{ assert(intel_miptree_level_has_hiz(mt, level)); - switch (mt->format) { - case MESA_FORMAT_Z_UNORM16: - params.depth_format = BRW_DEPTHFORMAT_D16_UNORM; + struct isl_surf isl_tmp[2]; + struct blorp_surf surf; + blorp_surf_for_miptree(brw, &surf, mt, true, (1 << ISL_AUX_USAGE_HIZ), + &level, layer, 1, isl_tmp); + + struct blorp_batch batch; + blorp_batch_init(&brw->blorp, &batch, brw, 0); + blorp_gen6_hiz_op(&batch, &surf, level, layer, op); + blorp_batch_finish(&batch); +} + +/** + * Perform a HiZ or depth resolve operation. + * + * For an overview of HiZ ops, see the following sections of the Sandy Bridge + * PRM, Volume 1, Part 2: + * - 7.5.3.1 Depth Buffer Clear + * - 7.5.3.2 Depth Buffer Resolve + * - 7.5.3.3 Hierarchical Depth Buffer Resolve + */ +void +intel_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt, + unsigned int level, unsigned int layer, enum blorp_hiz_op op) +{ + const char *opname = NULL; + + switch (op) { + case BLORP_HIZ_OP_DEPTH_RESOLVE: + opname = "depth resolve"; break; - case MESA_FORMAT_Z_FLOAT32: - params.depth_format = BRW_DEPTHFORMAT_D32_FLOAT; + case BLORP_HIZ_OP_HIZ_RESOLVE: + opname = "hiz ambiguate"; break; - case MESA_FORMAT_Z24_UNORM_X8_UINT: - params.depth_format = BRW_DEPTHFORMAT_D24_UNORM_X8_UINT; + case BLORP_HIZ_OP_DEPTH_CLEAR: + opname = "depth clear"; + break; + case BLORP_HIZ_OP_NONE: + opname = "noop?"; break; - default: - unreachable("not reached"); } - brw_blorp_exec(brw, ¶ms); + DBG("%s %s to mt %p level %d layer %d\n", + __func__, opname, mt, level, layer); + + if (brw->gen >= 8) { + gen8_hiz_exec(brw, mt, level, layer, op); + } else { + gen6_blorp_hiz_exec(brw, mt, level, layer, op); + } } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp 1970-01-01 00:00:00.000000000 +0000 @@ -1,333 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - -#include "main/teximage.h" -#include "main/blend.h" -#include "main/fbobject.h" -#include "main/renderbuffer.h" -#include "main/glformats.h" - -#include "util/ralloc.h" - -#include "intel_fbo.h" - -#include "brw_blorp.h" -#include "brw_meta_util.h" -#include "brw_context.h" -#include "brw_eu.h" -#include "brw_state.h" - -#include "nir_builder.h" - -#define FILE_DEBUG_FLAG DEBUG_BLORP - -struct brw_blorp_const_color_prog_key -{ - bool use_simd16_replicated_data; - bool pad[3]; -}; - -static void -brw_blorp_params_get_clear_kernel(struct brw_context *brw, - struct brw_blorp_params *params, - bool use_replicated_data) -{ - struct brw_blorp_const_color_prog_key blorp_key; - memset(&blorp_key, 0, sizeof(blorp_key)); - blorp_key.use_simd16_replicated_data = use_replicated_data; - - if (brw_search_cache(&brw->cache, BRW_CACHE_BLORP_PROG, - &blorp_key, sizeof(blorp_key), - ¶ms->wm_prog_kernel, ¶ms->wm_prog_data)) - return; - - void *mem_ctx = ralloc_context(NULL); - - nir_builder b; - nir_builder_init_simple_shader(&b, mem_ctx, MESA_SHADER_FRAGMENT, NULL); - b.shader->info.name = ralloc_strdup(b.shader, "BLORP-clear"); - - nir_variable *u_color = nir_variable_create(b.shader, nir_var_uniform, - glsl_vec4_type(), "u_color"); - u_color->data.location = 0; - - nir_variable *frag_color = nir_variable_create(b.shader, nir_var_shader_out, - glsl_vec4_type(), - "gl_FragColor"); - frag_color->data.location = FRAG_RESULT_COLOR; - - nir_copy_var(&b, frag_color, u_color); - - struct brw_wm_prog_key wm_key; - brw_blorp_init_wm_prog_key(&wm_key); - - struct brw_blorp_prog_data prog_data; - unsigned program_size; - const unsigned *program = - brw_blorp_compile_nir_shader(brw, mem_ctx, - b.shader, &wm_key, use_replicated_data, - &prog_data, &program_size); - - brw_upload_cache(&brw->cache, BRW_CACHE_BLORP_PROG, - &blorp_key, sizeof(blorp_key), - program, program_size, - &prog_data, sizeof(prog_data), - ¶ms->wm_prog_kernel, ¶ms->wm_prog_data); - - ralloc_free(mem_ctx); -} - -static bool -set_write_disables(const struct intel_renderbuffer *irb, - const GLubyte *color_mask, bool *color_write_disable) -{ - /* Format information in the renderbuffer represents the requirements - * given by the client. There are cases where the backing miptree uses, - * for example, RGBA to represent RGBX. Since the client is only expecting - * RGB we can treat alpha as not used and write whatever we like into it. - */ - const GLenum base_format = irb->Base.Base._BaseFormat; - const int components = _mesa_base_format_component_count(base_format); - bool disables = false; - - assert(components > 0); - - for (int i = 0; i < components; i++) { - color_write_disable[i] = !color_mask[i]; - disables = disables || !color_mask[i]; - } - - return disables; -} - -static bool -do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb, - struct gl_renderbuffer *rb, unsigned buf, - bool partial_clear, bool encode_srgb, unsigned layer) -{ - struct gl_context *ctx = &brw->ctx; - struct intel_renderbuffer *irb = intel_renderbuffer(rb); - mesa_format format = irb->mt->format; - - struct brw_blorp_params params; - brw_blorp_params_init(¶ms); - - if (!encode_srgb && _mesa_get_format_color_encoding(format) == GL_SRGB) - format = _mesa_get_srgb_format_linear(format); - - brw_blorp_surface_info_init(brw, ¶ms.dst, irb->mt, irb->mt_level, - layer, format, true); - - /* Override the surface format according to the context's sRGB rules. */ - params.dst.brw_surfaceformat = brw->render_target_format[format]; - - params.x0 = fb->_Xmin; - params.x1 = fb->_Xmax; - if (rb->Name != 0) { - params.y0 = fb->_Ymin; - params.y1 = fb->_Ymax; - } else { - params.y0 = rb->Height - fb->_Ymax; - params.y1 = rb->Height - fb->_Ymin; - } - - memcpy(¶ms.wm_push_consts.dst_x0, - ctx->Color.ClearColor.f, sizeof(float) * 4); - - bool use_simd16_replicated_data = true; - - /* From the SNB PRM (Vol4_Part1): - * - * "Replicated data (Message Type = 111) is only supported when - * accessing tiled memory. Using this Message Type to access linear - * (untiled) memory is UNDEFINED." - */ - if (irb->mt->tiling == I915_TILING_NONE) - use_simd16_replicated_data = false; - - /* Constant color writes ignore everyting in blend and color calculator - * state. This is not documented. - */ - if (set_write_disables(irb, ctx->Color.ColorMask[buf], - params.color_write_disable)) - use_simd16_replicated_data = false; - - if (irb->mt->fast_clear_state != INTEL_FAST_CLEAR_STATE_NO_MCS && - !partial_clear && use_simd16_replicated_data && - brw_is_color_fast_clear_compatible(brw, irb->mt, - &ctx->Color.ClearColor)) { - memset(¶ms.wm_push_consts, 0xff, 4*sizeof(float)); - params.fast_clear_op = GEN7_PS_RENDER_TARGET_FAST_CLEAR_ENABLE; - - brw_get_fast_clear_rect(brw, fb, irb->mt, ¶ms.x0, ¶ms.y0, - ¶ms.x1, ¶ms.y1); - } else { - brw_meta_get_buffer_rect(fb, ¶ms.x0, ¶ms.y0, - ¶ms.x1, ¶ms.y1); - } - - brw_blorp_params_get_clear_kernel(brw, ¶ms, use_simd16_replicated_data); - - const bool is_fast_clear = - params.fast_clear_op == GEN7_PS_RENDER_TARGET_FAST_CLEAR_ENABLE; - if (is_fast_clear) { - /* Record the clear color in the miptree so that it will be - * programmed in SURFACE_STATE by later rendering and resolve - * operations. - */ - const bool color_updated = brw_meta_set_fast_clear_color( - brw, irb->mt, &ctx->Color.ClearColor); - - /* If the buffer is already in INTEL_FAST_CLEAR_STATE_CLEAR, the clear - * is redundant and can be skipped. - */ - if (!color_updated && - irb->mt->fast_clear_state == INTEL_FAST_CLEAR_STATE_CLEAR) - return true; - - /* If the MCS buffer hasn't been allocated yet, we need to allocate - * it now. - */ - if (!irb->mt->mcs_mt) { - if (!intel_miptree_alloc_non_msrt_mcs(brw, irb->mt)) { - /* MCS allocation failed--probably this will only happen in - * out-of-memory conditions. But in any case, try to recover - * by falling back to a non-blorp clear technique. - */ - return false; - } - } - } - - const char *clear_type; - if (is_fast_clear) - clear_type = "fast"; - else if (use_simd16_replicated_data) - clear_type = "replicated"; - else - clear_type = "slow"; - - DBG("%s (%s) to mt %p level %d layer %d\n", __FUNCTION__, clear_type, - irb->mt, irb->mt_level, irb->mt_layer); - - brw_blorp_exec(brw, ¶ms); - - if (is_fast_clear) { - /* Now that the fast clear has occurred, put the buffer in - * INTEL_FAST_CLEAR_STATE_CLEAR so that we won't waste time doing - * redundant clears. - */ - irb->mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_CLEAR; - } else if (intel_miptree_is_lossless_compressed(brw, irb->mt)) { - /* Compressed buffers can be cleared also using normal rep-clear. In - * such case they bahave such as if they were drawn using normal 3D - * render pipeline, and we simply mark the mcs as dirty. - */ - assert(partial_clear); - irb->mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_UNRESOLVED; - } - - return true; -} - - -extern "C" { -bool -brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb, - GLbitfield mask, bool partial_clear, bool encode_srgb) -{ - for (unsigned buf = 0; buf < fb->_NumColorDrawBuffers; buf++) { - struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[buf]; - struct intel_renderbuffer *irb = intel_renderbuffer(rb); - - /* Only clear the buffers present in the provided mask */ - if (((1 << fb->_ColorDrawBufferIndexes[buf]) & mask) == 0) - continue; - - /* If this is an ES2 context or GL_ARB_ES2_compatibility is supported, - * the framebuffer can be complete with some attachments missing. In - * this case the _ColorDrawBuffers pointer will be NULL. - */ - if (rb == NULL) - continue; - - if (fb->MaxNumLayers > 0) { - unsigned layer_multiplier = - (irb->mt->msaa_layout == INTEL_MSAA_LAYOUT_UMS || - irb->mt->msaa_layout == INTEL_MSAA_LAYOUT_CMS) ? - irb->mt->num_samples : 1; - unsigned num_layers = irb->layer_count; - for (unsigned layer = 0; layer < num_layers; layer++) { - if (!do_single_blorp_clear( - brw, fb, rb, buf, partial_clear, encode_srgb, - irb->mt_layer + layer * layer_multiplier)) { - return false; - } - } - } else { - unsigned layer = irb->mt_layer; - if (!do_single_blorp_clear(brw, fb, rb, buf, partial_clear, - encode_srgb, layer)) - return false; - } - - irb->need_downsample = true; - } - - return true; -} - -void -brw_blorp_resolve_color(struct brw_context *brw, struct intel_mipmap_tree *mt) -{ - DBG("%s to mt %p\n", __FUNCTION__, mt); - - const mesa_format format = _mesa_get_srgb_format_linear(mt->format); - - struct brw_blorp_params params; - brw_blorp_params_init(¶ms); - - brw_blorp_surface_info_init(brw, ¶ms.dst, mt, - 0 /* level */, 0 /* layer */, format, true); - - brw_get_resolve_rect(brw, mt, ¶ms.x0, ¶ms.y0, - ¶ms.x1, ¶ms.y1); - - if (intel_miptree_is_lossless_compressed(brw, mt)) - params.resolve_type = GEN9_PS_RENDER_TARGET_RESOLVE_FULL; - else - params.resolve_type = GEN7_PS_RENDER_TARGET_RESOLVE_ENABLE; - - /* Note: there is no need to initialize push constants because it doesn't - * matter what data gets dispatched to the render target. However, we must - * ensure that the fragment shader delivers the data using the "replicated - * color" message. - */ - - brw_blorp_params_get_clear_kernel(brw, ¶ms, true); - - brw_blorp_exec(brw, ¶ms); - mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_RESOLVED; -} - -} /* extern "C" */ diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_blorp.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_blorp.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_blorp.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_blorp.h 2017-06-01 10:37:10.000000000 +0000 @@ -23,18 +23,16 @@ #pragma once -#include - -#include "brw_reg.h" +#include "blorp/blorp.h" #include "intel_mipmap_tree.h" - -struct brw_context; -struct brw_wm_prog_key; +#include "program/prog_instruction.h" #ifdef __cplusplus extern "C" { #endif +void brw_blorp_init(struct brw_context *brw); + void brw_blorp_blit_miptrees(struct brw_context *brw, struct intel_mipmap_tree *src_mt, @@ -50,417 +48,40 @@ GLenum filter, bool mirror_x, bool mirror_y, bool decode_srgb, bool encode_srgb); +void +brw_blorp_copy_miptrees(struct brw_context *brw, + struct intel_mipmap_tree *src_mt, + unsigned src_level, unsigned src_logical_layer, + struct intel_mipmap_tree *dst_mt, + unsigned dst_level, unsigned dst_logical_layer, + unsigned src_x, unsigned src_y, + unsigned dst_x, unsigned dst_y, + unsigned src_width, unsigned src_height); + bool brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb, GLbitfield mask, bool partial_clear, bool encode_srgb); void brw_blorp_resolve_color(struct brw_context *brw, - struct intel_mipmap_tree *mt); - -/** - * Binding table indices used by BLORP. - */ -enum { - BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX, - BRW_BLORP_TEXTURE_BINDING_TABLE_INDEX, - BRW_BLORP_NUM_BINDING_TABLE_ENTRIES -}; - -struct brw_blorp_surface_info -{ - struct intel_mipmap_tree *mt; - - /** - * The miplevel to use. - */ - uint32_t level; - - /** - * The 2D layer within the miplevel. Combined, level and layer define the - * 2D miptree slice to use. - * - * Note: if mt is a 2D multisample array texture on Gen7+ using - * INTEL_MSAA_LAYOUT_UMS or INTEL_MSAA_LAYOUT_CMS, layer is the physical - * layer holding sample 0. So, for example, if mt->num_samples == 4, then - * logical layer n corresponds to layer == 4*n. - */ - uint32_t layer; - - /** - * Width of the miplevel to be used. For surfaces using - * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels. - */ - uint32_t width; - - /** - * Height of the miplevel to be used. For surfaces using - * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels. - */ - uint32_t height; - - /** - * X offset within the surface to texture from (or render to). For - * surfaces using INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not - * pixels. - */ - uint32_t x_offset; - - /** - * Y offset within the surface to texture from (or render to). For - * surfaces using INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not - * pixels. - */ - uint32_t y_offset; - - /* Setting this flag indicates that the buffer's contents are W-tiled - * stencil data, but the surface state should be set up for Y tiled - * MESA_FORMAT_R_UNORM8 data (this is necessary because surface states don't - * support W tiling). - * - * Since W tiles are 64 pixels wide by 64 pixels high, whereas Y tiles of - * MESA_FORMAT_R_UNORM8 data are 128 pixels wide by 32 pixels high, the width and - * pitch stored in the surface state will be multiplied by 2, and the - * height will be halved. Also, since W and Y tiles store their data in a - * different order, the width and height will be rounded up to a multiple - * of the tile size, to ensure that the WM program can access the full - * width and height of the buffer. - */ - bool map_stencil_as_y_tiled; - - unsigned num_samples; - - /** - * Indicates if we use the standard miptree layout (ALL_LOD_IN_EACH_SLICE), - * or if we tightly pack array slices at each LOD (ALL_SLICES_AT_EACH_LOD). - * - * If ALL_SLICES_AT_EACH_LOD is set, then ARYSPC_LOD0 can be used. Ignored - * prior to Gen7. - */ - enum miptree_array_layout array_layout; - - /** - * Format that should be used when setting up the surface state for this - * surface. Should correspond to one of the BRW_SURFACEFORMAT_* enums. - */ - uint32_t brw_surfaceformat; - - /** - * For MSAA surfaces, MSAA layout that should be used when setting up the - * surface state for this surface. - */ - enum intel_msaa_layout msaa_layout; - - /** - * In order to support cases where RGBA format is backing client requested - * RGB, one needs to have means to force alpha channel to one when user - * requested RGB surface is used as blit source. This is possible by - * setting source swizzle for the texture surface. - */ - int swizzle; -}; - -void -brw_blorp_surface_info_init(struct brw_context *brw, - struct brw_blorp_surface_info *info, - struct intel_mipmap_tree *mt, - unsigned int level, unsigned int layer, - mesa_format format, bool is_render_target); - -uint32_t -brw_blorp_compute_tile_offsets(const struct brw_blorp_surface_info *info, - uint32_t *tile_x, uint32_t *tile_y); - - - -struct brw_blorp_coord_transform -{ - float multiplier; - float offset; -}; - -struct brw_blorp_wm_push_constants -{ - uint32_t dst_x0; - uint32_t dst_x1; - uint32_t dst_y0; - uint32_t dst_y1; - /* Top right coordinates of the rectangular grid used for scaled blitting */ - float rect_grid_x1; - float rect_grid_y1; - struct brw_blorp_coord_transform x_transform; - struct brw_blorp_coord_transform y_transform; - - /* Minimum layer setting works for all the textures types but texture_3d - * for which the setting has no effect. Use the z-coordinate instead. - */ - uint32_t src_z; - - /* Pad out to an integral number of registers */ - uint32_t pad[5]; -}; - -#define BRW_BLORP_NUM_PUSH_CONSTANT_DWORDS \ - (sizeof(struct brw_blorp_wm_push_constants) / 4) - -/* Every 32 bytes of push constant data constitutes one GEN register. */ -static const unsigned int BRW_BLORP_NUM_PUSH_CONST_REGS = - sizeof(struct brw_blorp_wm_push_constants) / 32; - -struct brw_blorp_prog_data -{ - bool dispatch_8; - bool dispatch_16; - - uint8_t first_curbe_grf_0; - uint8_t first_curbe_grf_2; - - uint32_t ksp_offset_2; - - /** - * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more - * than one sample per pixel. - */ - bool persample_msaa_dispatch; - - /* The compiler will re-arrange push constants and store the upload order - * here. Given an index 'i' in the final upload buffer, param[i] gives the - * index in the uniform store. In other words, the value to be uploaded can - * be found by brw_blorp_params::wm_push_consts[param[i]]. - */ - uint8_t nr_params; - uint8_t param[BRW_BLORP_NUM_PUSH_CONSTANT_DWORDS]; -}; - -struct brw_blorp_params -{ - uint32_t x0; - uint32_t y0; - uint32_t x1; - uint32_t y1; - struct brw_blorp_surface_info depth; - uint32_t depth_format; - struct brw_blorp_surface_info src; - struct brw_blorp_surface_info dst; - enum gen6_hiz_op hiz_op; - union { - unsigned fast_clear_op; - unsigned resolve_type; - }; - bool color_write_disable[4]; - struct brw_blorp_wm_push_constants wm_push_consts; - unsigned num_varyings; - unsigned num_draw_buffers; - unsigned num_layers; - uint32_t wm_prog_kernel; - struct brw_blorp_prog_data *wm_prog_data; -}; - -void -brw_blorp_params_init(struct brw_blorp_params *params); - -void -brw_blorp_exec(struct brw_context *brw, const struct brw_blorp_params *params); - -void -gen6_blorp_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt, - unsigned level, unsigned layer, enum gen6_hiz_op op); - -void -gen6_blorp_exec(struct brw_context *brw, - const struct brw_blorp_params *params); - -void -gen7_blorp_exec(struct brw_context *brw, - const struct brw_blorp_params *params); - -void -gen8_blorp_exec(struct brw_context *brw, const struct brw_blorp_params *params); - -struct brw_blorp_blit_prog_key -{ - /* Number of samples per pixel that have been configured in the surface - * state for texturing from. - */ - unsigned tex_samples; - - /* MSAA layout that has been configured in the surface state for texturing - * from. - */ - enum intel_msaa_layout tex_layout; - - /* Actual number of samples per pixel in the source image. */ - unsigned src_samples; - - /* Actual MSAA layout used by the source image. */ - enum intel_msaa_layout src_layout; - - /* Number of samples per pixel that have been configured in the render - * target. - */ - unsigned rt_samples; - - /* MSAA layout that has been configured in the render target. */ - enum intel_msaa_layout rt_layout; - - /* Actual number of samples per pixel in the destination image. */ - unsigned dst_samples; - - /* Actual MSAA layout used by the destination image. */ - enum intel_msaa_layout dst_layout; - - /* Type of the data to be read from the texture (one of - * BRW_REGISTER_TYPE_{UD,D,F}). - */ - enum brw_reg_type texture_data_type; - - /* True if the source image is W tiled. If true, the surface state for the - * source image must be configured as Y tiled, and tex_samples must be 0. - */ - bool src_tiled_w; - - /* True if the destination image is W tiled. If true, the surface state - * for the render target must be configured as Y tiled, and rt_samples must - * be 0. - */ - bool dst_tiled_w; - - /* True if all source samples should be blended together to produce each - * destination pixel. If true, src_tiled_w must be false, tex_samples must - * equal src_samples, and tex_samples must be nonzero. - */ - bool blend; - - /* True if the rectangle being sent through the rendering pipeline might be - * larger than the destination rectangle, so the WM program should kill any - * pixels that are outside the destination rectangle. - */ - bool use_kill; - - /** - * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more - * than one sample per pixel. - */ - bool persample_msaa_dispatch; - - /* True for scaled blitting. */ - bool blit_scaled; - - /* Scale factors between the pixel grid and the grid of samples. We're - * using grid of samples for bilinear filetring in multisample scaled blits. - */ - float x_scale; - float y_scale; - - /* True for blits with filter = GL_LINEAR. */ - bool bilinear_filter; -}; - -/** - * \name BLORP internals - * \{ - * - * Used internally by gen6_blorp_exec() and gen7_blorp_exec(). - */ - -void brw_blorp_init_wm_prog_key(struct brw_wm_prog_key *wm_key); - -const unsigned * -brw_blorp_compile_nir_shader(struct brw_context *brw, void *mem_ctx, - struct nir_shader *nir, - const struct brw_wm_prog_key *wm_key, - bool use_repclear, - struct brw_blorp_prog_data *prog_data, - unsigned *program_size); - -void -gen6_blorp_init(struct brw_context *brw); - -void -gen6_blorp_emit_vertices(struct brw_context *brw, - const struct brw_blorp_params *params); - -uint32_t -gen6_blorp_emit_blend_state(struct brw_context *brw, - const struct brw_blorp_params *params); - -uint32_t -gen6_blorp_emit_cc_state(struct brw_context *brw); - -uint32_t -gen6_blorp_emit_wm_constants(struct brw_context *brw, - const struct brw_blorp_params *params); - -void -gen6_blorp_emit_vs_disable(struct brw_context *brw, - const struct brw_blorp_params *params); - -uint32_t -gen6_blorp_emit_binding_table(struct brw_context *brw, - uint32_t wm_surf_offset_renderbuffer, - uint32_t wm_surf_offset_texture); - -uint32_t -gen6_blorp_emit_depth_stencil_state(struct brw_context *brw, - const struct brw_blorp_params *params); - -void -gen6_blorp_emit_gs_disable(struct brw_context *brw, - const struct brw_blorp_params *params); - -void -gen6_blorp_emit_clip_disable(struct brw_context *brw); - -void -gen6_blorp_emit_drawing_rectangle(struct brw_context *brw, - const struct brw_blorp_params *params); + struct intel_mipmap_tree *mt, + unsigned level, unsigned layer); -uint32_t -gen6_blorp_emit_sampler_state(struct brw_context *brw, - unsigned tex_filter, unsigned max_lod, - bool non_normalized_coords); void -gen7_blorp_emit_urb_config(struct brw_context *brw); +intel_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt, + unsigned int level, unsigned int layer, enum blorp_hiz_op op); -void -gen7_blorp_emit_blend_state_pointer(struct brw_context *brw, - uint32_t cc_blend_state_offset); - -void -gen7_blorp_emit_cc_state_pointer(struct brw_context *brw, - uint32_t cc_state_offset); - -void -gen7_blorp_emit_cc_viewport(struct brw_context *brw); - -void -gen7_blorp_emit_te_disable(struct brw_context *brw); - -void -gen7_blorp_emit_binding_table_pointers_ps(struct brw_context *brw, - uint32_t wm_bind_bo_offset); - -void -gen7_blorp_emit_sampler_state_pointers_ps(struct brw_context *brw, - uint32_t sampler_offset); - -void -gen7_blorp_emit_clear_params(struct brw_context *brw, - const struct brw_blorp_params *params); - -void -gen7_blorp_emit_constant_ps(struct brw_context *brw, - uint32_t wm_push_const_offset); - -void -gen7_blorp_emit_constant_ps_disable(struct brw_context *brw); - -void -gen7_blorp_emit_primitive(struct brw_context *brw, - const struct brw_blorp_params *params); - -/** \} */ +void gen6_blorp_exec(struct blorp_batch *batch, + const struct blorp_params *params); +void gen7_blorp_exec(struct blorp_batch *batch, + const struct blorp_params *params); +void gen75_blorp_exec(struct blorp_batch *batch, + const struct blorp_params *params); +void gen8_blorp_exec(struct blorp_batch *batch, + const struct blorp_params *params); +void gen9_blorp_exec(struct blorp_batch *batch, + const struct blorp_params *params); #ifdef __cplusplus -} /* end extern "C" */ -#endif /* __cplusplus */ +} /* extern "C" */ +#endif diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_cc.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_cc.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_cc.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_cc.c 2017-06-01 10:37:10.000000000 +0000 @@ -44,12 +44,15 @@ struct gl_context *ctx = &brw->ctx; struct brw_cc_viewport *ccv; + /* BRW_NEW_VIEWPORT_COUNT */ + const unsigned viewport_count = brw->clip.viewport_count; + ccv = brw_state_batch(brw, AUB_TRACE_CC_VP_STATE, - sizeof(*ccv) * ctx->Const.MaxViewports, 32, + sizeof(*ccv) * viewport_count, 32, &brw->cc.vp_offset); /* _NEW_TRANSFORM */ - for (unsigned i = 0; i < ctx->Const.MaxViewports; i++) { + for (unsigned i = 0; i < viewport_count; i++) { if (ctx->Transform.DepthClamp) { /* _NEW_VIEWPORT */ ccv[i].min_depth = MIN2(ctx->ViewportArray[i].Near, @@ -77,7 +80,8 @@ .mesa = _NEW_TRANSFORM | _NEW_VIEWPORT, .brw = BRW_NEW_BATCH | - BRW_NEW_BLORP, + BRW_NEW_BLORP | + BRW_NEW_VIEWPORT_COUNT, }, .emit = brw_upload_cc_vp }; @@ -159,7 +163,7 @@ if (ctx->Color.ColorLogicOpEnabled && ctx->Color.LogicOp != GL_COPY) { cc->cc2.logicop_enable = 1; cc->cc5.logicop_func = intel_translate_logic_op(ctx->Color.LogicOp); - } else if (ctx->Color.BlendEnabled) { + } else if (ctx->Color.BlendEnabled && !ctx->Color._AdvancedBlendMode) { GLenum eqRGB = ctx->Color.Blend[0].EquationRGB; GLenum eqA = ctx->Color.Blend[0].EquationA; GLenum srcRGB = ctx->Color.Blend[0].SrcRGB; @@ -221,7 +225,7 @@ cc->cc2.depth_test = 1; cc->cc2.depth_test_function = intel_translate_compare_func(ctx->Depth.Func); - cc->cc2.depth_write_enable = ctx->Depth.Mask; + cc->cc2.depth_write_enable = brw_depth_writes_enabled(brw); } if (brw->stats_wm || unlikely(INTEL_DEBUG & DEBUG_STATS)) diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_cfg.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_cfg.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_cfg.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_cfg.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -51,7 +51,7 @@ } bblock_t::bblock_t(cfg_t *cfg) : - cfg(cfg), idom(NULL), start_ip(0), end_ip(0), num(0) + cfg(cfg), idom(NULL), start_ip(0), end_ip(0), num(0), cycle_count(0) { instructions.make_empty(); parents.make_empty(); @@ -158,6 +158,7 @@ blocks = NULL; num_blocks = 0; idom_dirty = true; + cycle_count = 0; bblock_t *cur = NULL; int ip = 0; @@ -177,9 +178,10 @@ /* set_next_block wants the post-incremented ip */ ip++; + inst->exec_node::remove(); + switch (inst->opcode) { case BRW_OPCODE_IF: - inst->exec_node::remove(); cur->instructions.push_tail(inst); /* Push our information onto a stack so we can recover from @@ -202,7 +204,6 @@ break; case BRW_OPCODE_ELSE: - inst->exec_node::remove(); cur->instructions.push_tail(inst); cur_else = cur; @@ -226,7 +227,6 @@ set_next_block(&cur, cur_endif, ip - 1); } - inst->exec_node::remove(); cur->instructions.push_tail(inst); if (cur_else) { @@ -267,12 +267,10 @@ set_next_block(&cur, cur_do, ip - 1); } - inst->exec_node::remove(); cur->instructions.push_tail(inst); break; case BRW_OPCODE_CONTINUE: - inst->exec_node::remove(); cur->instructions.push_tail(inst); assert(cur_do != NULL); @@ -286,7 +284,6 @@ break; case BRW_OPCODE_BREAK: - inst->exec_node::remove(); cur->instructions.push_tail(inst); assert(cur_while != NULL); @@ -300,7 +297,6 @@ break; case BRW_OPCODE_WHILE: - inst->exec_node::remove(); cur->instructions.push_tail(inst); assert(cur_do != NULL && cur_while != NULL); @@ -317,7 +313,6 @@ break; default: - inst->exec_node::remove(); cur->instructions.push_tail(inst); break; } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_cfg.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_cfg.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_cfg.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_cfg.h 2017-06-01 10:37:10.000000000 +0000 @@ -333,10 +333,9 @@ foreach_in_list(__type, __inst, &(__block)->instructions) #define foreach_inst_in_block_safe(__type, __inst, __block) \ - for (__type *__inst = (__type *)__block->instructions.head, \ - *__next = (__type *)__inst->next, \ - *__end = (__type *)__block->instructions.tail; \ - __next != __end; \ + for (__type *__inst = (__type *)__block->instructions.head_sentinel.next, \ + *__next = (__type *)__inst->next; \ + __next != NULL; \ __inst = __next, \ __next = (__type *)__next->next) diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_clear.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_clear.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_clear.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_clear.c 2017-06-01 10:37:10.000000000 +0000 @@ -36,6 +36,7 @@ #include "brw_context.h" #include "brw_blorp.h" +#include "brw_defines.h" #define FILE_DEBUG_FLAG DEBUG_BLIT @@ -77,12 +78,12 @@ * Returns true if the scissor is a noop (cuts out nothing). */ static bool -noop_scissor(struct gl_context *ctx, struct gl_framebuffer *fb) +noop_scissor(struct gl_framebuffer *fb) { - return ctx->Scissor.ScissorArray[0].X <= 0 && - ctx->Scissor.ScissorArray[0].Y <= 0 && - ctx->Scissor.ScissorArray[0].Width >= fb->Width && - ctx->Scissor.ScissorArray[0].Height >= fb->Height; + return fb->_Xmin <= 0 && + fb->_Ymin <= 0 && + fb->_Xmax >= fb->Width && + fb->_Ymax >= fb->Height; } /** @@ -117,7 +118,7 @@ * a previous clear had happened at a different clear value and resolve it * first. */ - if ((ctx->Scissor.EnableFlags & 1) && !noop_scissor(ctx, fb)) { + if ((ctx->Scissor.EnableFlags & 1) && !noop_scissor(fb)) { perf_debug("Failed to fast clear %dx%d depth because of scissors. " "Possible 5%% performance win if avoided.\n", mt->logical_width0, mt->logical_height0); @@ -174,24 +175,56 @@ mt->depth_clear_value = depth_clear_value; } - /* From the Sandy Bridge PRM, volume 2 part 1, page 313: - * - * "If other rendering operations have preceded this clear, a - * PIPE_CONTROL with write cache flush enabled and Z-inhibit disabled - * must be issued before the rectangle primitive used for the depth - * buffer clear operation. - */ - brw_emit_mi_flush(brw); + if (brw->gen == 6) { + /* From the Sandy Bridge PRM, volume 2 part 1, page 313: + * + * "If other rendering operations have preceded this clear, a + * PIPE_CONTROL with write cache flush enabled and Z-inhibit disabled + * must be issued before the rectangle primitive used for the depth + * buffer clear operation. + */ + brw_emit_pipe_control_flush(brw, + PIPE_CONTROL_RENDER_TARGET_FLUSH | + PIPE_CONTROL_DEPTH_CACHE_FLUSH | + PIPE_CONTROL_CS_STALL); + } else if (brw->gen >= 7) { + /* + * From the Ivybridge PRM, volume 2, "Depth Buffer Clear": + * + * If other rendering operations have preceded this clear, a + * PIPE_CONTROL with depth cache flush enabled, Depth Stall bit + * enabled must be issued before the rectangle primitive used for the + * depth buffer clear operation. + * + * Same applies for Gen8 and Gen9. + * + * In addition, from the Ivybridge PRM, volume 2, 1.10.4.1 PIPE_CONTROL, + * Depth Cache Flush Enable: + * + * This bit must not be set when Depth Stall Enable bit is set in + * this packet. + * + * This is confirmed to hold for real, HSW gets immediate gpu hangs. + * + * Therefore issue two pipe control flushes, one for cache flush and + * another for depth stall. + */ + brw_emit_pipe_control_flush(brw, + PIPE_CONTROL_DEPTH_CACHE_FLUSH | + PIPE_CONTROL_CS_STALL); + + brw_emit_pipe_control_flush(brw, PIPE_CONTROL_DEPTH_STALL); + } if (fb->MaxNumLayers > 0) { for (unsigned layer = 0; layer < depth_irb->layer_count; layer++) { intel_hiz_exec(brw, mt, depth_irb->mt_level, depth_irb->mt_layer + layer, - GEN6_HIZ_OP_DEPTH_CLEAR); + BLORP_HIZ_OP_DEPTH_CLEAR); } } else { intel_hiz_exec(brw, mt, depth_irb->mt_level, depth_irb->mt_layer, - GEN6_HIZ_OP_DEPTH_CLEAR); + BLORP_HIZ_OP_DEPTH_CLEAR); } if (brw->gen == 6) { @@ -201,7 +234,12 @@ * by a PIPE_CONTROL command with DEPTH_STALL bit set and Then * followed by Depth FLUSH' */ - brw_emit_mi_flush(brw); + brw_emit_pipe_control_flush(brw, + PIPE_CONTROL_DEPTH_STALL); + + brw_emit_pipe_control_flush(brw, + PIPE_CONTROL_DEPTH_CACHE_FLUSH | + PIPE_CONTROL_CS_STALL); } /* Now, the HiZ buffer contains data that needs to be resolved to the depth @@ -220,7 +258,7 @@ { struct brw_context *brw = brw_context(ctx); struct gl_framebuffer *fb = ctx->DrawBuffer; - bool partial_clear = ctx->Scissor.EnableFlags && !noop_scissor(ctx, fb); + bool partial_clear = ctx->Scissor.EnableFlags && !noop_scissor(fb); if (!_mesa_check_conditional_render(ctx)) return; @@ -239,6 +277,14 @@ } } + if (mask & BUFFER_BIT_STENCIL) { + struct intel_renderbuffer *stencil_irb = + intel_get_renderbuffer(fb, BUFFER_STENCIL); + struct intel_mipmap_tree *mt = stencil_irb->mt; + if (mt && mt->stencil_mt) + mt->stencil_mt->r8stencil_needs_update = true; + } + /* BLORP is currently only supported on Gen6+. */ if (brw->gen >= 6 && (mask & BUFFER_BITS_COLOR)) { const bool encode_srgb = ctx->Color.sRGBEnabled; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_clip.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_clip.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_clip.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_clip.c 2017-06-01 10:37:10.000000000 +0000 @@ -61,18 +61,13 @@ /* Begin the compilation: */ - brw_init_codegen(brw->intelScreen->devinfo, &c.func, mem_ctx); + brw_init_codegen(&brw->screen->devinfo, &c.func, mem_ctx); c.func.single_program_flow = 1; c.key = *key; c.vue_map = brw->vue_map_geom_out; - c.has_flat_shading = - brw_any_flat_varyings(&key->interpolation_mode); - c.has_noperspective_shading = - brw_any_noperspective_varyings(&key->interpolation_mode); - /* nr_regs is the number of registers filled by reading data from the VUE. * This program accesses the entire VUE, so nr_regs needs to be the size of * the VUE (measured in pairs, since two slots are stored in each @@ -116,7 +111,7 @@ if (unlikely(INTEL_DEBUG & DEBUG_CLIP)) { fprintf(stderr, "clip:\n"); - brw_disassemble(brw->intelScreen->devinfo, c.func.store, + brw_disassemble(&brw->screen->devinfo, c.func.store, 0, program_size, stderr); fprintf(stderr, "\n"); } @@ -144,7 +139,7 @@ _NEW_POLYGON | _NEW_TRANSFORM, BRW_NEW_BLORP | - BRW_NEW_INTERPOLATION_MAP | + BRW_NEW_FS_PROG_DATA | BRW_NEW_REDUCED_PRIMITIVE | BRW_NEW_VUE_MAP_GEOM_OUT)) return; @@ -154,8 +149,15 @@ /* Populate the key: */ - /* BRW_NEW_INTERPOLATION_MAP */ - key.interpolation_mode = brw->interpolation_mode; + /* BRW_NEW_FS_PROG_DATA */ + const struct brw_wm_prog_data *wm_prog_data = + brw_wm_prog_data(brw->wm.base.prog_data); + if (wm_prog_data) { + key.contains_flat_varying = wm_prog_data->contains_flat_varying; + key.contains_noperspective_varying = + wm_prog_data->contains_noperspective_varying; + key.interp_mode = wm_prog_data->interp_mode; + } /* BRW_NEW_REDUCED_PRIMITIVE */ key.primitive = brw->reduced_primitive; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_clip.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_clip.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_clip.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_clip.h 2017-06-01 10:37:10.000000000 +0000 @@ -47,7 +47,9 @@ */ struct brw_clip_prog_key { GLbitfield64 attrs; - struct interpolation_mode_map interpolation_mode; + bool contains_flat_varying; + bool contains_noperspective_varying; + const unsigned char *interp_mode; GLuint primitive:4; GLuint nr_userclip:4; GLuint pv_first:1; @@ -128,9 +130,6 @@ bool need_direction; struct brw_vue_map vue_map; - - bool has_flat_shading; - bool has_noperspective_shading; }; /** diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_clip_line.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_clip_line.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_clip_line.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_clip_line.c 2017-06-01 10:37:10.000000000 +0000 @@ -44,7 +44,7 @@ static void brw_clip_line_alloc_regs( struct brw_clip_compile *c ) { - const struct brw_device_info *devinfo = c->func.devinfo; + const struct gen_device_info *devinfo = c->func.devinfo; GLuint i = 0,j; /* Register usage is static, precompute here: @@ -302,7 +302,7 @@ brw_clip_line_alloc_regs(c); brw_clip_init_ff_sync(c); - if (c->has_flat_shading) { + if (c->key.contains_flat_varying) { if (c->key.pv_first) brw_clip_copy_flatshaded_attributes(c, 1, 0); else diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_clip_tri.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_clip_tri.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_clip_tri.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_clip_tri.c 2017-06-01 10:37:10.000000000 +0000 @@ -49,7 +49,7 @@ void brw_clip_tri_alloc_regs( struct brw_clip_compile *c, GLuint nr_verts ) { - const struct brw_device_info *devinfo = c->func.devinfo; + const struct gen_device_info *devinfo = c->func.devinfo; GLuint i = 0,j; /* Register usage is static, precompute here: @@ -650,7 +650,7 @@ * flatshading, need to apply the flatshade here because we don't * respect the PV when converting to trifan for emit: */ - if (c->has_flat_shading) + if (c->key.contains_flat_varying) brw_clip_tri_flat_shade(c); if ((c->key.clip_mode == BRW_CLIPMODE_NORMAL) || diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_clip_unfilled.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_clip_unfilled.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_clip_unfilled.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_clip_unfilled.c 2017-06-01 10:37:10.000000000 +0000 @@ -519,7 +519,7 @@ /* Need to do this whether we clip or not: */ - if (c->has_flat_shading) + if (c->key.contains_flat_varying) brw_clip_tri_flat_shade(c); brw_clip_init_clipmask(c); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_clip_util.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_clip_util.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_clip_util.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_clip_util.c 2017-06-01 10:37:10.000000000 +0000 @@ -157,7 +157,7 @@ */ /* Take a copy of the v0 NDC coordinates, in case dest == v0. */ - if (c->has_noperspective_shading) { + if (c->key.contains_noperspective_varying) { GLuint offset = brw_varying_to_offset(&c->vue_map, BRW_VARYING_SLOT_NDC); v0_ndc_copy = get_tmp(c); @@ -183,7 +183,7 @@ /* If we have noperspective attributes, * we need to compute the screen-space t */ - if (c->has_noperspective_shading) { + if (c->key.contains_noperspective_varying) { GLuint delta = brw_varying_to_offset(&c->vue_map, BRW_VARYING_SLOT_NDC); struct brw_reg tmp = get_tmp(c); @@ -272,12 +272,12 @@ * Unless the attribute is flat shaded -- in which case just copy * from one of the sources (doesn't matter which; already copied from pv) */ - GLuint interp = c->key.interpolation_mode.mode[slot]; + GLuint interp = c->key.interp_mode[slot]; - if (interp != INTERP_QUALIFIER_FLAT) { + if (interp != INTERP_MODE_FLAT) { struct brw_reg tmp = get_tmp(c); struct brw_reg t = - interp == INTERP_QUALIFIER_NOPERSPECTIVE ? t_nopersp : t0; + interp == INTERP_MODE_NOPERSPECTIVE ? t_nopersp : t0; brw_MUL(p, vec4(brw_null_reg()), @@ -310,7 +310,7 @@ brw_MOV(p, deref_4f(dest_ptr, delta), brw_imm_f(0)); } - if (c->has_noperspective_shading) + if (c->key.contains_noperspective_varying) release_tmp(c, t_nopersp); } @@ -406,7 +406,7 @@ struct brw_codegen *p = &c->func; for (int i = 0; i < c->vue_map.num_slots; i++) { - if (c->key.interpolation_mode.mode[i] == INTERP_QUALIFIER_FLAT) { + if (c->key.interp_mode[i] == INTERP_MODE_FLAT) { brw_MOV(p, byte_offset(c->reg.vertex[to], brw_vue_slot_to_offset(i)), byte_offset(c->reg.vertex[from], brw_vue_slot_to_offset(i))); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_compiler.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_compiler.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_compiler.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_compiler.c 2017-06-01 10:37:10.000000000 +0000 @@ -40,6 +40,7 @@ .lower_fdiv = true, \ .lower_flrp64 = true, \ .native_integers = true, \ + .use_interpolated_input_intrinsics = true, \ .vertex_id_zero_based = true static const struct nir_shader_compiler_options scalar_nir_options = { @@ -54,6 +55,7 @@ .lower_unpack_snorm_4x8 = true, .lower_unpack_unorm_2x16 = true, .lower_unpack_unorm_4x8 = true, + .max_unroll_iterations = 32, }; static const struct nir_shader_compiler_options vector_nir_options = { @@ -74,6 +76,7 @@ .lower_unpack_unorm_2x16 = true, .lower_extract_byte = true, .lower_extract_word = true, + .max_unroll_iterations = 32, }; static const struct nir_shader_compiler_options vector_nir_options_gen6 = { @@ -91,10 +94,11 @@ .lower_unpack_unorm_2x16 = true, .lower_extract_byte = true, .lower_extract_word = true, + .max_unroll_iterations = 32, }; struct brw_compiler * -brw_compiler_create(void *mem_ctx, const struct brw_device_info *devinfo) +brw_compiler_create(void *mem_ctx, const struct gen_device_info *devinfo) { struct brw_compiler *compiler = rzalloc(mem_ctx, struct brw_compiler); @@ -118,15 +122,12 @@ /* We want the GLSL compiler to emit code that uses condition codes */ for (int i = 0; i < MESA_SHADER_STAGES; i++) { - compiler->glsl_compiler_options[i].MaxUnrollIterations = 32; + compiler->glsl_compiler_options[i].MaxUnrollIterations = 0; compiler->glsl_compiler_options[i].MaxIfDepth = devinfo->gen < 6 ? 16 : UINT_MAX; - compiler->glsl_compiler_options[i].EmitNoNoise = true; - compiler->glsl_compiler_options[i].EmitNoMainReturn = true; compiler->glsl_compiler_options[i].EmitNoIndirectInput = true; compiler->glsl_compiler_options[i].EmitNoIndirectUniform = false; - compiler->glsl_compiler_options[i].LowerCombinedClipCullDistance = true; bool is_scalar = compiler->scalar_stage[i]; @@ -134,10 +135,6 @@ compiler->glsl_compiler_options[i].EmitNoIndirectTemp = is_scalar; compiler->glsl_compiler_options[i].OptimizeForAOS = !is_scalar; - /* !ARB_gpu_shader5 */ - if (devinfo->gen < 7) - compiler->glsl_compiler_options[i].EmitNoIndirectSampler = true; - if (is_scalar) { compiler->glsl_compiler_options[i].NirOptions = &scalar_nir_options; } else { @@ -156,8 +153,5 @@ if (compiler->scalar_stage[MESA_SHADER_GEOMETRY]) compiler->glsl_compiler_options[MESA_SHADER_GEOMETRY].EmitNoIndirectInput = false; - compiler->glsl_compiler_options[MESA_SHADER_COMPUTE] - .LowerShaderSharedVariables = true; - return compiler; } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_compiler.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_compiler.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_compiler.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_compiler.h 2017-06-01 10:37:10.000000000 +0000 @@ -24,7 +24,7 @@ #pragma once #include -#include "brw_device_info.h" +#include "common/gen_device_info.h" #include "main/mtypes.h" #include "main/macros.h" @@ -34,11 +34,11 @@ struct ra_regs; struct nir_shader; -struct brw_geometry_program; +struct brw_program; union gl_constant_value; struct brw_compiler { - const struct brw_device_info *devinfo; + const struct gen_device_info *devinfo; struct { struct ra_regs *regs; @@ -260,6 +260,7 @@ unsigned line_aa:2; bool high_quality_derivatives:1; bool force_dual_color_blend:1; + bool coherent_fb_fetch:1; uint16_t drawable_height; uint64_t input_slots_valid; @@ -388,6 +389,7 @@ * surface indices the WM-specific surfaces */ uint32_t render_target_start; + uint32_t render_target_read_start; /** @} */ } binding_table; @@ -395,6 +397,8 @@ bool computed_stencil; bool early_fragment_tests; + bool post_depth_coverage; + bool inner_coverage; bool dispatch_8; bool dispatch_16; bool dual_src_blend; @@ -408,6 +412,9 @@ bool has_side_effects; bool pulls_bary; + bool contains_flat_varying; + bool contains_noperspective_varying; + /** * Mask of which interpolation modes are required by the fragment shader. * Used in hardware setup on gen6+. @@ -420,6 +427,11 @@ */ uint32_t flat_inputs; + /* Mapping of VUE slots to interpolation modes. + * Used by the Gen4-5 clip/sf/wm stages. + */ + unsigned char interp_mode[65]; /* BRW_VARYING_SLOT_COUNT */ + /** * Map from gl_varying_slot to the position within the FS setup data * payload where the varying's attribute vertex deltas should be delivered. @@ -564,7 +576,7 @@ return brw_vue_slot_to_offset(vue_map->varying_to_slot[varying]); } -void brw_compute_vue_map(const struct brw_device_info *devinfo, +void brw_compute_vue_map(const struct gen_device_info *devinfo, struct brw_vue_map *vue_map, GLbitfield64 slots_valid, bool separate_shader); @@ -573,6 +585,12 @@ const GLbitfield64 slots_valid, const GLbitfield is_patch); +/* brw_interpolation_map.c */ +void brw_setup_vue_interpolation(struct brw_vue_map *vue_map, + struct nir_shader *nir, + struct brw_wm_prog_data *prog_data, + const struct gen_device_info *devinfo); + enum shader_dispatch_mode { DISPATCH_MODE_4X1_SINGLE = 0, DISPATCH_MODE_4X2_DUAL_INSTANCE = 1, @@ -618,6 +636,7 @@ GLuint urb_read_length; GLuint total_grf; + uint32_t clip_distance_mask; uint32_t cull_distance_mask; /* Used for calculating urb partitions. In the VS, this is the size of the @@ -633,6 +652,7 @@ struct brw_vue_prog_data base; GLbitfield64 inputs_read; + GLbitfield64 double_inputs_read; unsigned nr_attributes; unsigned nr_attribute_slots; @@ -699,11 +719,6 @@ int invocations; /** - * Gen6 transform feedback enabled flag. - */ - bool gen6_xfb_enabled; - - /** * Gen6: Provoking vertex convention for odd-numbered triangles * in tristrips. */ @@ -729,11 +744,28 @@ unsigned char transform_feedback_swizzles[64 /* BRW_MAX_SOL_BINDINGS */]; }; +#define DEFINE_PROG_DATA_DOWNCAST(stage) \ +static inline struct brw_##stage##_prog_data * \ +brw_##stage##_prog_data(struct brw_stage_prog_data *prog_data) \ +{ \ + return (struct brw_##stage##_prog_data *) prog_data; \ +} +DEFINE_PROG_DATA_DOWNCAST(vue) +DEFINE_PROG_DATA_DOWNCAST(vs) +DEFINE_PROG_DATA_DOWNCAST(tcs) +DEFINE_PROG_DATA_DOWNCAST(tes) +DEFINE_PROG_DATA_DOWNCAST(gs) +DEFINE_PROG_DATA_DOWNCAST(wm) +DEFINE_PROG_DATA_DOWNCAST(cs) +DEFINE_PROG_DATA_DOWNCAST(ff_gs) +DEFINE_PROG_DATA_DOWNCAST(clip) +DEFINE_PROG_DATA_DOWNCAST(sf) +#undef DEFINE_PROG_DATA_DOWNCAST /** @} */ struct brw_compiler * -brw_compiler_create(void *mem_ctx, const struct brw_device_info *devinfo); +brw_compiler_create(void *mem_ctx, const struct gen_device_info *devinfo); /** * Compile a vertex shader. @@ -777,9 +809,10 @@ brw_compile_tes(const struct brw_compiler *compiler, void *log_data, void *mem_ctx, const struct brw_tes_prog_key *key, + const struct brw_vue_map *input_vue_map, struct brw_tes_prog_data *prog_data, const struct nir_shader *shader, - struct gl_shader_program *shader_prog, + struct gl_program *prog, int shader_time_index, unsigned *final_assembly_size, char **error_str); @@ -795,7 +828,7 @@ const struct brw_gs_prog_key *key, struct brw_gs_prog_data *prog_data, const struct nir_shader *shader, - struct gl_shader_program *shader_prog, + struct gl_program *prog, int shader_time_index, unsigned *final_assembly_size, char **error_str); @@ -815,7 +848,7 @@ int shader_time_index8, int shader_time_index16, bool allow_spilling, - bool use_rep_send, + bool use_rep_send, struct brw_vue_map *vue_map, unsigned *final_assembly_size, char **error_str); @@ -866,6 +899,55 @@ return slm_size; } +/** + * Return true if the given shader stage is dispatched contiguously by the + * relevant fixed function starting from channel 0 of the SIMD thread, which + * implies that the dispatch mask of a thread can be assumed to have the form + * '2^n - 1' for some n. + */ +static inline bool +brw_stage_has_packed_dispatch(const struct gen_device_info *devinfo, + gl_shader_stage stage, + const struct brw_stage_prog_data *prog_data) +{ + /* The code below makes assumptions about the hardware's thread dispatch + * behavior that could be proven wrong in future generations -- Make sure + * to do a full test run with brw_fs_test_dispatch_packing() hooked up to + * the NIR front-end before changing this assertion. + */ + assert(devinfo->gen <= 9); + + switch (stage) { + case MESA_SHADER_FRAGMENT: { + /* The PSD discards subspans coming in with no lit samples, which in the + * per-pixel shading case implies that each subspan will either be fully + * lit (due to the VMask being used to allow derivative computations), + * or not dispatched at all. In per-sample dispatch mode individual + * samples from the same subspan have a fixed relative location within + * the SIMD thread, so dispatch of unlit samples cannot be avoided in + * general and we should return false. + */ + const struct brw_wm_prog_data *wm_prog_data = + (const struct brw_wm_prog_data *)prog_data; + return !wm_prog_data->persample_dispatch; + } + case MESA_SHADER_COMPUTE: + /* Compute shaders will be spawned with either a fully enabled dispatch + * mask or with whatever bottom/right execution mask was given to the + * GPGPU walker command to be used along the workgroup edges -- In both + * cases the dispatch mask is required to be tightly packed for our + * invocation index calculations to work. + */ + return true; + default: + /* Most remaining fixed functions are limited to use a packed dispatch + * mask due to the hardware representation of the dispatch mask as a + * single counter representing the number of enabled channels. + */ + return true; + } +} + #ifdef __cplusplus } /* extern "C" */ #endif diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_compute.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_compute.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_compute.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_compute.c 2017-06-01 10:37:10.000000000 +0000 @@ -115,7 +115,8 @@ static void brw_emit_gpgpu_walker(struct brw_context *brw) { - const struct brw_cs_prog_data *prog_data = brw->cs.prog_data; + const struct brw_cs_prog_data *prog_data = + brw_cs_prog_data(brw->cs.base.prog_data); const GLuint *num_groups = brw->compute.num_work_groups; uint32_t indirect_flag; @@ -148,7 +149,7 @@ OUT_BATCH(0); /* Indirect Data Length */ OUT_BATCH(0); /* Indirect Data Start Address */ } - assert(thread_width_max <= brw->max_cs_threads); + assert(thread_width_max <= brw->screen->devinfo.max_cs_threads); OUT_BATCH(SET_FIELD(simd_size / 16, GPGPU_WALKER_SIMD_SIZE) | SET_FIELD(thread_width_max - 1, GPGPU_WALKER_THREAD_WIDTH_MAX)); OUT_BATCH(0); /* Thread Group ID Starting X */ @@ -238,7 +239,7 @@ if (brw->always_flush_batch) intel_batchbuffer_flush(brw); - brw_state_cache_check_size(brw); + brw_program_cache_check_size(brw); /* Note: since compute shaders can't write to framebuffers, there's no need * to call brw_postdraw_set_buffers_need_resolve(). diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_context.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_context.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -31,6 +31,7 @@ */ +#include "compiler/nir/nir.h" #include "main/api_exec.h" #include "main/context.h" #include "main/fbobject.h" @@ -51,6 +52,7 @@ #include "brw_context.h" #include "brw_defines.h" +#include "brw_blorp.h" #include "brw_compiler.h" #include "brw_draw.h" #include "brw_state.h" @@ -79,9 +81,9 @@ const char *const brw_vendor_string = "Intel Open Source Technology Center"; static const char * -get_bsw_model(const struct intel_screen *intelScreen) +get_bsw_model(const struct intel_screen *screen) { - switch (intelScreen->eu_total) { + switch (screen->eu_total) { case 16: return "405"; case 12: @@ -92,13 +94,13 @@ } const char * -brw_get_renderer_string(const struct intel_screen *intelScreen) +brw_get_renderer_string(const struct intel_screen *screen) { const char *chipset; static char buffer[128]; char *bsw = NULL; - switch (intelScreen->deviceID) { + switch (screen->deviceID) { #undef CHIPSET #define CHIPSET(id, symbol, str) case id: chipset = str; break; #include "pci_ids/i965_pci_ids.h" @@ -108,11 +110,11 @@ } /* Braswell branding is funny, so we have to fix it up here */ - if (intelScreen->deviceID == 0x22B1) { + if (screen->deviceID == 0x22B1) { bsw = strdup(chipset); char *needle = strstr(bsw, "XXX"); if (needle) { - memcpy(needle, get_bsw_model(intelScreen), 3); + memcpy(needle, get_bsw_model(screen), 3); chipset = bsw; } } @@ -133,7 +135,7 @@ case GL_RENDERER: return - (GLubyte *) brw_get_renderer_string(brw->intelScreen); + (GLubyte *) brw_get_renderer_string(brw->screen); default: return NULL; @@ -163,10 +165,28 @@ /* Quantize the derived default number of samples */ fb->DefaultGeometry._NumSamples = - intel_quantize_num_samples(brw->intelScreen, + intel_quantize_num_samples(brw->screen, fb->DefaultGeometry.NumSamples); } +static bool +intel_disable_rb_aux_buffer(struct brw_context *brw, const drm_intel_bo *bo) +{ + const struct gl_framebuffer *fb = brw->ctx.DrawBuffer; + bool found = false; + + for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) { + const struct intel_renderbuffer *irb = + intel_renderbuffer(fb->_ColorDrawBuffers[i]); + + if (irb && irb->mt->bo == bo) { + found = brw->draw_aux_buffer_disabled[i] = true; + } + } + + return found; +} + /* On Gen9 color buffers may be compressed by the hardware (lossless * compression). There are, however, format restrictions and care needs to be * taken that the sampler engine is capable for re-interpreting a buffer with @@ -188,7 +208,7 @@ const uint32_t brw_format = brw_format_for_mesa_format(intel_tex->_Format); - if (isl_format_supports_lossless_compression(brw->intelScreen->devinfo, + if (isl_format_supports_lossless_compression(&brw->screen->devinfo, brw_format)) return false; @@ -196,6 +216,10 @@ _mesa_get_format_name(intel_tex->_Format), _mesa_get_format_name(intel_tex->mt->format)); + if (intel_disable_rb_aux_buffer(brw, intel_tex->mt->bo)) + perf_debug("Sampling renderbuffer with non-compressible format - " + "turning off compression"); + return true; } @@ -219,6 +243,9 @@ if (depth_irb) intel_renderbuffer_resolve_hiz(brw, depth_irb); + memset(brw->draw_aux_buffer_disabled, 0, + sizeof(brw->draw_aux_buffer_disabled)); + /* Resolve depth buffer and render cache of each enabled texture. */ int maxEnabledUnit = ctx->Texture._MaxEnabledTexImageUnit; for (int i = 0; i <= maxEnabledUnit; i++) { @@ -227,40 +254,76 @@ tex_obj = intel_texture_object(ctx->Texture.Unit[i]._Current); if (!tex_obj || !tex_obj->mt) continue; - intel_miptree_all_slices_resolve_depth(brw, tex_obj->mt); + if (intel_miptree_sample_with_hiz(brw, tex_obj->mt)) + intel_miptree_all_slices_resolve_hiz(brw, tex_obj->mt); + else + intel_miptree_all_slices_resolve_depth(brw, tex_obj->mt); /* Sampling engine understands lossless compression and resolving * those surfaces should be skipped for performance reasons. */ const int flags = intel_texture_view_requires_resolve(brw, tex_obj) ? 0 : INTEL_MIPTREE_IGNORE_CCS_E; - intel_miptree_resolve_color(brw, tex_obj->mt, flags); + intel_miptree_all_slices_resolve_color(brw, tex_obj->mt, flags); brw_render_cache_set_check_flush(brw, tex_obj->mt->bo); + + if (tex_obj->base.StencilSampling || + tex_obj->mt->format == MESA_FORMAT_S_UINT8) { + intel_update_r8stencil(brw, tex_obj->mt); + } } /* Resolve color for each active shader image. */ for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { - const struct gl_shader *shader = ctx->_Shader->CurrentProgram[i] ? - ctx->_Shader->CurrentProgram[i]->_LinkedShaders[i] : NULL; - - if (unlikely(shader && shader->NumImages)) { - for (unsigned j = 0; j < shader->NumImages; j++) { - struct gl_image_unit *u = &ctx->ImageUnits[shader->ImageUnits[j]]; + const struct gl_linked_shader *shader = + ctx->_Shader->CurrentProgram[i] ? + ctx->_Shader->CurrentProgram[i]->_LinkedShaders[i] : NULL; + + if (unlikely(shader && shader->Program->info.num_images)) { + for (unsigned j = 0; j < shader->Program->info.num_images; j++) { + struct gl_image_unit *u = + &ctx->ImageUnits[shader->Program->sh.ImageUnits[j]]; tex_obj = intel_texture_object(u->TexObj); if (tex_obj && tex_obj->mt) { /* Access to images is implemented using indirect messages * against data port. Normal render target write understands * lossless compression but unfortunately the typed/untyped - * read/write interface doesn't. Therefore the compressed - * surfaces need to be resolved prior to accessing them. + * read/write interface doesn't. Therefore even lossless + * compressed surfaces need to be resolved prior to accessing + * them. Hence skip setting INTEL_MIPTREE_IGNORE_CCS_E. */ - intel_miptree_resolve_color(brw, tex_obj->mt, 0); + intel_miptree_all_slices_resolve_color(brw, tex_obj->mt, 0); + + if (intel_miptree_is_lossless_compressed(brw, tex_obj->mt) && + intel_disable_rb_aux_buffer(brw, tex_obj->mt->bo)) { + perf_debug("Using renderbuffer as shader image - turning " + "off lossless compression"); + } + brw_render_cache_set_check_flush(brw, tex_obj->mt->bo); } } } } + /* Resolve color buffers for non-coherent framebuffer fetch. */ + if (!ctx->Extensions.MESA_shader_framebuffer_fetch && + ctx->FragmentProgram._Current && + ctx->FragmentProgram._Current->info.outputs_read) { + const struct gl_framebuffer *fb = ctx->DrawBuffer; + + for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) { + const struct intel_renderbuffer *irb = + intel_renderbuffer(fb->_ColorDrawBuffers[i]); + + if (irb && + intel_miptree_resolve_color( + brw, irb->mt, irb->mt_level, irb->mt_layer, irb->layer_count, + INTEL_MIPTREE_IGNORE_CCS_E)) + brw_render_cache_set_check_flush(brw, irb->mt->bo); + } + } + /* If FRAMEBUFFER_SRGB is used on Gen9+ then we need to resolve any of the * single-sampled color renderbuffers because the CCS buffer isn't * supported for SRGB formats. This only matters if FRAMEBUFFER_SRGB is @@ -287,7 +350,7 @@ * should be impossible to get here with such surfaces. */ assert(!intel_miptree_is_lossless_compressed(brw, mt)); - intel_miptree_resolve_color(brw, mt, 0); + intel_miptree_all_slices_resolve_color(brw, mt, 0); brw_render_cache_set_check_flush(brw, mt->bo); } } @@ -309,10 +372,10 @@ struct brw_context *brw = brw_context(ctx); __DRIcontext *driContext = brw->driContext; __DRIdrawable *driDrawable = driContext->driDrawablePriv; - __DRIscreen *const screen = brw->intelScreen->driScrnPriv; + __DRIscreen *const dri_screen = brw->screen->driScrnPriv; if (brw->front_buffer_dirty && _mesa_is_winsys_fbo(ctx->DrawBuffer)) { - if (flushFront(screen) && driDrawable && + if (flushFront(dri_screen) && driDrawable && driDrawable->loaderPrivate) { /* Resolve before flushing FAKE_FRONT_LEFT to FRONT_LEFT. @@ -325,7 +388,7 @@ intel_resolve_for_dri2_flush(brw, driDrawable); intel_batchbuffer_flush(brw); - flushFront(screen)(driDrawable, driDrawable->loaderPrivate); + flushFront(dri_screen)(driDrawable, driDrawable->loaderPrivate); /* We set the dirty bit in intel_prepare_render() if we're * front buffer rendering once we get there. @@ -387,7 +450,7 @@ intelInitBufferFuncs(functions); intelInitPixelFuncs(functions); intelInitBufferObjectFuncs(functions); - intel_init_syncobj_functions(functions); + brw_init_syncobj_functions(functions); brw_init_object_purgeable_functions(functions); brwInitFragProgFuncs( functions ); @@ -406,7 +469,7 @@ functions->NewTransformFeedback = brw_new_transform_feedback; functions->DeleteTransformFeedback = brw_delete_transform_feedback; - if (brw->intelScreen->has_mi_math_and_lrr) { + if (can_do_mi_math_and_lrr(brw->screen)) { functions->BeginTransformFeedback = hsw_begin_transform_feedback; functions->EndTransformFeedback = hsw_end_transform_feedback; functions->PauseTransformFeedback = hsw_pause_transform_feedback; @@ -431,7 +494,7 @@ brw_initialize_context_constants(struct brw_context *brw) { struct gl_context *ctx = &brw->ctx; - const struct brw_compiler *compiler = brw->intelScreen->compiler; + const struct brw_compiler *compiler = brw->screen->compiler; const bool stage_exists[MESA_SHADER_STAGES] = { [MESA_SHADER_VERTEX] = true, @@ -440,7 +503,7 @@ [MESA_SHADER_GEOMETRY] = brw->gen >= 6, [MESA_SHADER_FRAGMENT] = true, [MESA_SHADER_COMPUTE] = - (ctx->API == API_OPENGL_CORE && + ((ctx->API == API_OPENGL_COMPAT || ctx->API == API_OPENGL_CORE) && ctx->Const.MaxComputeWorkGroupSize[0] >= 1024) || (ctx->API == API_OPENGLES2 && ctx->Const.MaxComputeWorkGroupSize[0] >= 128) || @@ -465,28 +528,31 @@ ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */ ctx->Const.MaxImageUnits = MAX_IMAGE_UNITS; - ctx->Const.MaxRenderbufferSize = 8192; - ctx->Const.MaxTextureLevels = MIN2(14 /* 8192 */, MAX_TEXTURE_LEVELS); - - /* On Sandy Bridge and prior, the "Render Target View Extent" field of - * RENDER_SURFACE_STATE is only 9 bits so the largest 3-D texture we can do - * a layered render into has a depth of 512. On Iron Lake and earlier, we - * don't support layered rendering and we use manual offsetting to render - * into the different layers so this doesn't matter. On Sandy Bridge, - * however, we do support layered rendering so this is a problem. - */ - ctx->Const.Max3DTextureLevels = brw->gen == 6 ? 10 /* 512 */ : 12; /* 2048 */ - - ctx->Const.MaxCubeTextureLevels = 14; /* 8192 */ + if (brw->gen >= 7) { + ctx->Const.MaxRenderbufferSize = 16384; + ctx->Const.MaxTextureLevels = MIN2(15 /* 16384 */, MAX_TEXTURE_LEVELS); + ctx->Const.MaxCubeTextureLevels = 15; /* 16384 */ + } else { + ctx->Const.MaxRenderbufferSize = 8192; + ctx->Const.MaxTextureLevels = MIN2(14 /* 8192 */, MAX_TEXTURE_LEVELS); + ctx->Const.MaxCubeTextureLevels = 14; /* 8192 */ + } + ctx->Const.Max3DTextureLevels = 12; /* 2048 */ ctx->Const.MaxArrayTextureLayers = brw->gen >= 7 ? 2048 : 512; ctx->Const.MaxTextureMbytes = 1536; ctx->Const.MaxTextureRectSize = 1 << 12; ctx->Const.MaxTextureMaxAnisotropy = 16.0; + ctx->Const.MaxTextureLodBias = 15.0; ctx->Const.StripTextureBorder = true; - if (brw->gen >= 7) + if (brw->gen >= 7) { ctx->Const.MaxProgramTextureGatherComponents = 4; - else if (brw->gen == 6) + ctx->Const.MinProgramTextureGatherOffset = -32; + ctx->Const.MaxProgramTextureGatherOffset = 31; + } else if (brw->gen == 6) { ctx->Const.MaxProgramTextureGatherComponents = 1; + ctx->Const.MinProgramTextureGatherOffset = -8; + ctx->Const.MaxProgramTextureGatherOffset = 7; + } ctx->Const.MaxUniformBlockSize = 65536; @@ -543,10 +609,10 @@ BRW_MAX_SOL_BINDINGS / BRW_MAX_SOL_BUFFERS; ctx->Const.AlwaysUseGetTransformFeedbackVertexCount = - !brw->intelScreen->has_mi_math_and_lrr; + !can_do_mi_math_and_lrr(brw->screen); int max_samples; - const int *msaa_modes = intel_supported_msaa_modes(brw->intelScreen); + const int *msaa_modes = intel_supported_msaa_modes(brw->screen); const int clamp_max_samples = driQueryOptioni(&brw->optionCache, "clamp_max_samples"); @@ -607,7 +673,7 @@ if (brw->gen >= 5 || brw->is_g4x) ctx->Const.MaxClipPlanes = 8; - ctx->Const.LowerTessLevel = true; + ctx->Const.GLSLTessLevelsAsInputs = true; ctx->Const.LowerTCSPatchVerticesIn = brw->gen >= 8; ctx->Const.LowerTESPatchVerticesIn = true; ctx->Const.PrimitiveRestartForPatches = true; @@ -720,7 +786,7 @@ /* We want the GLSL compiler to emit code that uses condition codes */ for (int i = 0; i < MESA_SHADER_STAGES; i++) { ctx->Const.ShaderCompilerOptions[i] = - brw->intelScreen->compiler->glsl_compiler_options[i]; + brw->screen->compiler->glsl_compiler_options[i]; } if (brw->gen >= 7) { @@ -728,8 +794,8 @@ ctx->Const.MaxViewportHeight = 32768; } - /* ARB_viewport_array */ - if (brw->gen >= 6 && ctx->API == API_OPENGL_CORE) { + /* ARB_viewport_array, OES_viewport_array */ + if (brw->gen >= 6) { ctx->Const.MaxViewports = GEN6_NUM_VIEWPORTS; ctx->Const.ViewportSubpixelBits = 0; @@ -748,15 +814,39 @@ ctx->Const.MaxFramebufferHeight = 16384; ctx->Const.MaxFramebufferLayers = ctx->Const.MaxArrayTextureLayers; ctx->Const.MaxFramebufferSamples = max_samples; + + /* OES_primitive_bounding_box */ + ctx->Const.NoPrimitiveBoundingBoxOutput = true; } static void -brw_initialize_cs_context_constants(struct brw_context *brw, unsigned max_threads) +brw_initialize_cs_context_constants(struct brw_context *brw) { struct gl_context *ctx = &brw->ctx; + const struct intel_screen *screen = brw->screen; + struct gen_device_info *devinfo = &brw->screen->devinfo; + + /* FINISHME: Do this for all platforms that the kernel supports */ + if (brw->is_cherryview && + screen->subslice_total > 0 && screen->eu_total > 0) { + /* Logical CS threads = EUs per subslice * 7 threads per EU */ + uint32_t max_cs_threads = screen->eu_total / screen->subslice_total * 7; + + /* Fuse configurations may give more threads than expected, never less. */ + if (max_cs_threads > devinfo->max_cs_threads) + devinfo->max_cs_threads = max_cs_threads; + } + /* Maximum number of scalar compute shader invocations that can be run in * parallel in the same subslice assuming SIMD32 dispatch. + * + * We don't advertise more than 64 threads, because we are limited to 64 by + * our usage of thread_width_max in the gpgpu walker command. This only + * currently impacts Haswell, which otherwise might be able to advertise 70 + * threads. With SIMD32 and 64 threads, Haswell still provides twice the + * required the number of invocation needed for ARB_compute_shader. */ + const unsigned max_threads = MIN2(64, devinfo->max_cs_threads); const uint32_t max_invocations = 32 * max_threads; ctx->Const.MaxComputeWorkGroupSize[0] = max_invocations; ctx->Const.MaxComputeWorkGroupSize[1] = max_invocations; @@ -778,7 +868,7 @@ struct gl_context *ctx = &brw->ctx; driOptionCache *options = &brw->optionCache; - driParseConfigFiles(options, &brw->intelScreen->optionCache, + driParseConfigFiles(options, &brw->screen->optionCache, brw->driContext->driScreenPriv->myNum, "i965"); int bo_reuse_mode = driQueryOptioni(options, "bo_reuse"); @@ -814,9 +904,15 @@ brw->precompile = driQueryOptionb(&brw->optionCache, "shader_precompile"); + if (driQueryOptionb(&brw->optionCache, "precise_trig")) + brw->screen->compiler->precise_trig = true; + ctx->Const.ForceGLSLExtensionsWarn = driQueryOptionb(options, "force_glsl_extensions_warn"); + ctx->Const.ForceGLSLVersion = + driQueryOptioni(options, "force_glsl_version"); + ctx->Const.DisableGLSLLineContinuations = driQueryOptionb(options, "disable_glsl_line_continuations"); @@ -840,10 +936,9 @@ unsigned *dri_ctx_error, void *sharedContextPrivate) { - __DRIscreen *sPriv = driContextPriv->driScreenPriv; struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate; - struct intel_screen *screen = sPriv->driverPrivate; - const struct brw_device_info *devinfo = screen->devinfo; + struct intel_screen *screen = driContextPriv->driScreenPriv->driverPrivate; + const struct gen_device_info *devinfo = &screen->devinfo; struct dd_function_table functions; /* Only allow the __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flag if the kernel @@ -869,7 +964,7 @@ driContextPriv->driverPrivate = brw; brw->driContext = driContextPriv; - brw->intelScreen = screen; + brw->screen = screen; brw->bufmgr = screen->bufmgr; brw->gen = devinfo->gen; @@ -892,6 +987,8 @@ brw->must_use_separate_stencil = devinfo->must_use_separate_stencil; brw->has_swizzling = screen->hw_has_swizzling; + isl_device_init(&brw->isl_dev, devinfo, screen->hw_has_swizzling); + brw->vs.base.stage = MESA_SHADER_VERTEX; brw->tcs.base.stage = MESA_SHADER_TESS_CTRL; brw->tes.base.stage = MESA_SHADER_TESS_EVAL; @@ -955,7 +1052,7 @@ if (INTEL_DEBUG & DEBUG_PERF) brw->perf_debug = true; - brw_initialize_cs_context_constants(brw, devinfo->max_cs_threads); + brw_initialize_cs_context_constants(brw); brw_initialize_context_constants(brw); ctx->Const.ResetStrategy = notify_reset @@ -966,7 +1063,7 @@ intel_fbo_init(brw); - intel_batchbuffer_init(brw); + intel_batchbuffer_init(&brw->batch, brw->bufmgr, brw->has_llc); if (brw->gen >= 6) { /* Create a new hardware context. Using a hardware context means that @@ -997,44 +1094,10 @@ brw_init_surface_formats(brw); - brw->max_vs_threads = devinfo->max_vs_threads; - brw->max_hs_threads = devinfo->max_hs_threads; - brw->max_ds_threads = devinfo->max_ds_threads; - brw->max_gs_threads = devinfo->max_gs_threads; - brw->max_wm_threads = devinfo->max_wm_threads; - /* FINISHME: Do this for all platforms that the kernel supports */ - if (brw->is_cherryview && - screen->subslice_total > 0 && screen->eu_total > 0) { - /* Logical CS threads = EUs per subslice * 7 threads per EU */ - brw->max_cs_threads = screen->eu_total / screen->subslice_total * 7; + if (brw->gen >= 6) + brw_blorp_init(brw); - /* Fuse configurations may give more threads than expected, never less. */ - if (brw->max_cs_threads < devinfo->max_cs_threads) - brw->max_cs_threads = devinfo->max_cs_threads; - } else { - brw->max_cs_threads = devinfo->max_cs_threads; - } brw->urb.size = devinfo->urb.size; - brw->urb.min_vs_entries = devinfo->urb.min_vs_entries; - brw->urb.max_vs_entries = devinfo->urb.max_vs_entries; - brw->urb.max_hs_entries = devinfo->urb.max_hs_entries; - brw->urb.max_ds_entries = devinfo->urb.max_ds_entries; - brw->urb.max_gs_entries = devinfo->urb.max_gs_entries; - - /* Estimate the size of the mappable aperture into the GTT. There's an - * ioctl to get the whole GTT size, but not one to get the mappable subset. - * It turns out it's basically always 256MB, though some ancient hardware - * was smaller. - */ - uint32_t gtt_size = 256 * 1024 * 1024; - - /* We don't want to map two objects such that a memcpy between them would - * just fault one mapping in and then the other over and over forever. So - * we would need to divide the GTT size by 2. Additionally, some GTT is - * taken up by things like the framebuffer and the ringbuffer and such, so - * be more conservative. - */ - brw->max_gtt_map_object_size = gtt_size / 4; if (brw->gen == 6) brw->urb.gs_present = false; @@ -1043,9 +1106,12 @@ brw->prim_restart.enable_cut_index = false; brw->gs.enabled = false; brw->sf.viewport_transform_enable = true; + brw->clip.viewport_count = 1; brw->predicate.state = BRW_PREDICATE_STATE_RENDER; + brw->max_gtt_map_object_size = screen->max_gtt_map_object_size; + brw->use_resource_streamer = screen->has_resource_streamer && (env_var_as_boolean("INTEL_USE_HW_BT", false) || env_var_as_boolean("INTEL_USE_GATHER", false)); @@ -1060,8 +1126,10 @@ brw->perf_debug = true; } - if ((flags & __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS) != 0) + if ((flags & __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS) != 0) { ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_ROBUST_ACCESS_BIT_ARB; + ctx->Const.RobustAccess = GL_TRUE; + } if (INTEL_DEBUG & DEBUG_SHADER_TIME) brw_init_shader_time(brw); @@ -1071,10 +1139,6 @@ _mesa_initialize_dispatch_tables(ctx); _mesa_initialize_vbo_vtxfmt(ctx); - if (ctx->Extensions.AMD_performance_monitor) { - brw_init_performance_monitors(brw); - } - vbo_use_buffer_objects(ctx); vbo_always_unmap_buffers(ctx); @@ -1104,6 +1168,9 @@ brw_destroy_shader_time(brw); } + if (brw->gen >= 6) + blorp_finish(&brw->blorp); + brw_destroy_state(brw); brw_draw_destroy(brw); @@ -1135,7 +1202,7 @@ _swrast_DestroyContext(&brw->ctx); brw_fini_pipe_control(brw); - intel_batchbuffer_free(brw); + intel_batchbuffer_free(&brw->batch); drm_intel_bo_unreference(brw->throttle_batch[1]); drm_intel_bo_unreference(brw->throttle_batch[0]); @@ -1294,10 +1361,13 @@ rb = intel_get_renderbuffer(fb, buffers[i]); if (rb == NULL || rb->mt == NULL) continue; - if (rb->mt->num_samples <= 1) - intel_miptree_resolve_color(brw, rb->mt, 0); - else + if (rb->mt->num_samples <= 1) { + assert(rb->mt_layer == 0 && rb->mt_level == 0 && + rb->layer_count == 1); + intel_miptree_resolve_color(brw, rb->mt, 0, 0, 1, 0); + } else { intel_renderbuffer_downsample(brw, rb); + } } } @@ -1383,7 +1453,7 @@ intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) { struct brw_context *brw = context->driverPrivate; - __DRIscreen *screen = brw->intelScreen->driScrnPriv; + __DRIscreen *dri_screen = brw->screen->driScrnPriv; /* Set this up front, so that in case our buffers get invalidated * while we're getting new buffers, we don't clobber the stamp and @@ -1393,7 +1463,7 @@ if (unlikely(INTEL_DEBUG & DEBUG_DRI)) fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable); - if (screen->image.loader) + if (dri_screen->image.loader) intel_update_image_buffers(brw, drawable); else intel_update_dri2_buffers(brw, drawable); @@ -1457,7 +1527,7 @@ __DRIbuffer **buffers, int *buffer_count) { - __DRIscreen *screen = brw->intelScreen->driScrnPriv; + __DRIscreen *dri_screen = brw->screen->driScrnPriv; struct gl_framebuffer *fb = drawable->driverPrivate; int i = 0; unsigned attachments[8]; @@ -1501,12 +1571,13 @@ assert(i <= ARRAY_SIZE(attachments)); - *buffers = screen->dri2.loader->getBuffersWithFormat(drawable, - &drawable->w, - &drawable->h, - attachments, i / 2, - buffer_count, - drawable->loaderPrivate); + *buffers = + dri_screen->dri2.loader->getBuffersWithFormat(drawable, + &drawable->w, + &drawable->h, + attachments, i / 2, + buffer_count, + drawable->loaderPrivate); } /** @@ -1653,7 +1724,7 @@ intel_update_image_buffers(struct brw_context *brw, __DRIdrawable *drawable) { struct gl_framebuffer *fb = drawable->driverPrivate; - __DRIscreen *screen = brw->intelScreen->driScrnPriv; + __DRIscreen *dri_screen = brw->screen->driScrnPriv; struct intel_renderbuffer *front_rb; struct intel_renderbuffer *back_rb; struct __DRIimageList images; @@ -1679,12 +1750,12 @@ if (back_rb) buffer_mask |= __DRI_IMAGE_BUFFER_BACK; - ret = screen->image.loader->getBuffers(drawable, - driGLFormatToImageFormat(format), - &drawable->dri2.stamp, - drawable->loaderPrivate, - buffer_mask, - &images); + ret = dri_screen->image.loader->getBuffers(drawable, + driGLFormatToImageFormat(format), + &drawable->dri2.stamp, + drawable->loaderPrivate, + buffer_mask, + &images); if (!ret) return; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_context.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_context.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_context.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_context.h 2017-06-01 10:37:10.000000000 +0000 @@ -40,6 +40,9 @@ #include "brw_compiler.h" #include "intel_aub.h" +#include "isl/isl.h" +#include "blorp/blorp.h" + #ifdef __cplusplus extern "C" { /* Evil hack for using libdrm in a c++ compiler. */ @@ -175,7 +178,7 @@ }; enum brw_state_id { - /* brw_cache_ids must come first - see brw_state_cache.c */ + /* brw_cache_ids must come first - see brw_program_cache.c */ BRW_STATE_URB_FENCE = BRW_MAX_CACHE, BRW_STATE_FRAGMENT_PROGRAM, BRW_STATE_GEOMETRY_PROGRAM, @@ -208,7 +211,6 @@ BRW_STATE_ATOMIC_BUFFER, BRW_STATE_IMAGE_UNITS, BRW_STATE_META_IN_PROGRESS, - BRW_STATE_INTERPOLATION_MAP, BRW_STATE_PUSH_CONSTANT_ALLOCATION, BRW_STATE_NUM_SAMPLES, BRW_STATE_TEXTURE_BUFFER, @@ -223,6 +225,8 @@ BRW_STATE_URB_SIZE, BRW_STATE_CC_STATE, BRW_STATE_BLORP, + BRW_STATE_VIEWPORT_COUNT, + BRW_STATE_CONSERVATIVE_RASTERIZATION, BRW_NUM_STATE_BITS }; @@ -249,8 +253,8 @@ #define BRW_NEW_FS_PROG_DATA (1ull << BRW_CACHE_FS_PROG) /* XXX: The BRW_NEW_BLORP_BLIT_PROG_DATA dirty bit is unused (as BLORP doesn't * use the normal state upload paths), but the cache is still used. To avoid - * polluting the brw_state_cache code with special cases, we retain the dirty - * bit for now. It should eventually be removed. + * polluting the brw_program_cache code with special cases, we retain the + * dirty bit for now. It should eventually be removed. */ #define BRW_NEW_BLORP_BLIT_PROG_DATA (1ull << BRW_CACHE_BLORP_PROG) #define BRW_NEW_SF_PROG_DATA (1ull << BRW_CACHE_SF_PROG) @@ -291,6 +295,7 @@ #define BRW_NEW_PROGRAM_CACHE (1ull << BRW_STATE_PROGRAM_CACHE) #define BRW_NEW_STATE_BASE_ADDRESS (1ull << BRW_STATE_STATE_BASE_ADDRESS) #define BRW_NEW_VUE_MAP_GEOM_OUT (1ull << BRW_STATE_VUE_MAP_GEOM_OUT) +#define BRW_NEW_VIEWPORT_COUNT (1ull << BRW_STATE_VIEWPORT_COUNT) #define BRW_NEW_TRANSFORM_FEEDBACK (1ull << BRW_STATE_TRANSFORM_FEEDBACK) #define BRW_NEW_RASTERIZER_DISCARD (1ull << BRW_STATE_RASTERIZER_DISCARD) #define BRW_NEW_STATS_WM (1ull << BRW_STATE_STATS_WM) @@ -298,7 +303,6 @@ #define BRW_NEW_ATOMIC_BUFFER (1ull << BRW_STATE_ATOMIC_BUFFER) #define BRW_NEW_IMAGE_UNITS (1ull << BRW_STATE_IMAGE_UNITS) #define BRW_NEW_META_IN_PROGRESS (1ull << BRW_STATE_META_IN_PROGRESS) -#define BRW_NEW_INTERPOLATION_MAP (1ull << BRW_STATE_INTERPOLATION_MAP) #define BRW_NEW_PUSH_CONSTANT_ALLOCATION (1ull << BRW_STATE_PUSH_CONSTANT_ALLOCATION) #define BRW_NEW_NUM_SAMPLES (1ull << BRW_STATE_NUM_SAMPLES) #define BRW_NEW_TEXTURE_BUFFER (1ull << BRW_STATE_TEXTURE_BUFFER) @@ -313,6 +317,7 @@ #define BRW_NEW_URB_SIZE (1ull << BRW_STATE_URB_SIZE) #define BRW_NEW_CC_STATE (1ull << BRW_STATE_CC_STATE) #define BRW_NEW_BLORP (1ull << BRW_STATE_BLORP) +#define BRW_NEW_CONSERVATIVE_RASTERIZATION (1ull << BRW_STATE_CONSERVATIVE_RASTERIZATION) struct brw_state_flags { /** State update flags signalled by mesa internals */ @@ -323,54 +328,16 @@ uint64_t brw; }; -/** Subclass of Mesa vertex program */ -struct brw_vertex_program { - struct gl_vertex_program program; - GLuint id; -}; - - -/** Subclass of Mesa tessellation control program */ -struct brw_tess_ctrl_program { - struct gl_tess_ctrl_program program; - unsigned id; /**< serial no. to identify tess ctrl progs, never re-used */ -}; - - -/** Subclass of Mesa tessellation evaluation program */ -struct brw_tess_eval_program { - struct gl_tess_eval_program program; - unsigned id; /**< serial no. to identify tess eval progs, never re-used */ -}; - - -/** Subclass of Mesa geometry program */ -struct brw_geometry_program { - struct gl_geometry_program program; - unsigned id; /**< serial no. to identify geom progs, never re-used */ -}; - - -/** Subclass of Mesa fragment program */ -struct brw_fragment_program { - struct gl_fragment_program program; - GLuint id; /**< serial no. to identify frag progs, never re-used */ -}; - - -/** Subclass of Mesa compute program */ -struct brw_compute_program { - struct gl_compute_program program; - unsigned id; /**< serial no. to identify compute progs, never re-used */ -}; - -struct brw_shader { - struct gl_shader base; +/** Subclass of Mesa program */ +struct brw_program { + struct gl_program program; + GLuint id; bool compiled_once; }; + /** * Bitmask indicating which fragment shader inputs represent varyings (and * hence have to be delivered to the fragment shader by the SF/SBE stage). @@ -380,32 +347,6 @@ ~VARYING_BIT_POS & ~VARYING_BIT_FACE) -/* - * Mapping of VUE map slots to interpolation modes. - */ -struct interpolation_mode_map { - unsigned char mode[BRW_VARYING_SLOT_COUNT]; -}; - -static inline bool brw_any_flat_varyings(struct interpolation_mode_map *map) -{ - for (int i = 0; i < BRW_VARYING_SLOT_COUNT; i++) - if (map->mode[i] == INTERP_QUALIFIER_FLAT) - return true; - - return false; -} - -static inline bool brw_any_noperspective_varyings(struct interpolation_mode_map *map) -{ - for (int i = 0; i < BRW_VARYING_SLOT_COUNT; i++) - if (map->mode[i] == INTERP_QUALIFIER_NOPERSPECTIVE) - return true; - - return false; -} - - struct brw_sf_prog_data { GLuint urb_read_length; GLuint total_grf; @@ -512,25 +453,6 @@ */ #define SHADER_TIME_STRIDE 64 -struct brw_cache_item { - /** - * Effectively part of the key, cache_id identifies what kind of state - * buffer is involved, and also which dirty flag should set. - */ - enum brw_cache_id cache_id; - /** 32-bit hash of the key data */ - GLuint hash; - GLuint key_size; /* for variable-sized keys */ - GLuint aux_size; - const void *key; - - uint32_t offset; - uint32_t size; - - struct brw_cache_item *next; -}; - - struct brw_cache { struct brw_context *brw; @@ -575,10 +497,10 @@ GLuint step_rate; }; struct brw_vertex_element { - const struct gl_client_array *glarray; + const struct gl_vertex_array *glarray; int buffer; - + bool is_dual_slot; /** Offset of the first element within the buffer object */ unsigned int offset; }; @@ -731,7 +653,7 @@ struct shader_times; -struct brw_l3_config; +struct gen_l3_config; /** * brw_context is derived from gl_context. @@ -742,35 +664,10 @@ struct { - void (*update_texture_surface)(struct gl_context *ctx, - unsigned unit, - uint32_t *surf_offset, - bool for_gather, uint32_t plane); uint32_t (*update_renderbuffer_surface)(struct brw_context *brw, struct gl_renderbuffer *rb, - bool layered, unsigned unit, + uint32_t flags, unsigned unit, uint32_t surf_index); - - void (*emit_texture_surface_state)(struct brw_context *brw, - struct intel_mipmap_tree *mt, - GLenum target, - unsigned min_layer, - unsigned max_layer, - unsigned min_level, - unsigned max_level, - unsigned format, - unsigned swizzle, - uint32_t *surf_offset, - int surf_index, - bool rw, bool for_gather); - void (*emit_buffer_surface_state)(struct brw_context *brw, - uint32_t *out_offset, - drm_intel_bo *bo, - unsigned buffer_offset, - unsigned surface_format, - unsigned buffer_size, - unsigned pitch, - bool rw); void (*emit_null_surface_state)(struct brw_context *brw, unsigned width, unsigned height, @@ -876,7 +773,7 @@ */ bool perf_debug; - uint32_t max_gtt_map_object_size; + uint64_t max_gtt_map_object_size; int gen; int gt; @@ -901,11 +798,6 @@ bool use_resource_streamer; /** - * Whether LRI can be used to write register values from the batch buffer. - */ - bool can_do_pipelined_register_writes; - - /** * Some versions of Gen hardware don't do centroid interpolation correctly * on unlit pixels, causing incorrect values for derivatives near triangle * edges. Enabling this flag causes the fragment shader to use @@ -914,6 +806,10 @@ */ bool needs_unlit_centroid_workaround; + struct isl_device isl_dev; + + struct blorp_context blorp; + GLuint NewGLState; struct { struct brw_state_flags pipelines[BRW_NUM_PIPELINES]; @@ -1022,12 +918,12 @@ /* Active vertex program: */ - const struct gl_vertex_program *vertex_program; - const struct gl_geometry_program *geometry_program; - const struct gl_tess_ctrl_program *tess_ctrl_program; - const struct gl_tess_eval_program *tess_eval_program; - const struct gl_fragment_program *fragment_program; - const struct gl_compute_program *compute_program; + const struct gl_program *vertex_program; + const struct gl_program *geometry_program; + const struct gl_program *tess_ctrl_program; + const struct gl_program *tess_eval_program; + const struct gl_program *fragment_program; + const struct gl_program *compute_program; /** * Number of samples in ctx->DrawBuffer, updated by BRW_NEW_NUM_SAMPLES so @@ -1035,17 +931,6 @@ */ int num_samples; - /** - * Platform specific constants containing the maximum number of threads - * for each pipeline stage. - */ - unsigned max_vs_threads; - unsigned max_hs_threads; - unsigned max_ds_threads; - unsigned max_gs_threads; - unsigned max_wm_threads; - unsigned max_cs_threads; - /* BRW_NEW_URB_ALLOCATIONS: */ struct { @@ -1058,12 +943,6 @@ bool constrained; - GLuint min_vs_entries; /* Minimum number of VS entries */ - GLuint max_vs_entries; /* Maximum number of VS entries */ - GLuint max_hs_entries; /* Maximum number of HS entries */ - GLuint max_ds_entries; /* Maximum number of DS entries */ - GLuint max_gs_entries; /* Maximum number of GS entries */ - GLuint nr_vs_entries; GLuint nr_hs_entries; GLuint nr_ds_entries; @@ -1081,7 +960,7 @@ GLuint cs_start; /** * URB size in the current configuration. The units this is expressed - * in are somewhat inconsistent, see brw_device_info::urb::size. + * in are somewhat inconsistent, see gen_device_info::urb::size. * * FINISHME: Represent the URB size consistently in KB on all platforms. */ @@ -1129,12 +1008,10 @@ struct { struct brw_stage_state base; - struct brw_vs_prog_data *prog_data; } vs; struct { struct brw_stage_state base; - struct brw_tcs_prog_data *prog_data; /** * True if the 3DSTATE_HS command most recently emitted to the 3D @@ -1145,7 +1022,6 @@ struct { struct brw_stage_state base; - struct brw_tes_prog_data *prog_data; /** * True if the 3DSTATE_DS command most recently emitted to the 3D @@ -1156,7 +1032,6 @@ struct { struct brw_stage_state base; - struct brw_gs_prog_data *prog_data; /** * True if the 3DSTATE_GS command most recently emitted to the 3D @@ -1195,6 +1070,13 @@ * instead of vp_bo. */ uint32_t vp_offset; + + /** + * The number of viewports to use. If gl_ViewportIndex is written, + * we can have up to ctx->Const.MaxViewports viewports. If not, + * the viewport index is always 0, so we can only emit one. + */ + uint8_t viewport_count; } clip; @@ -1210,7 +1092,6 @@ struct { struct brw_stage_state base; - struct brw_wm_prog_data *prog_data; GLuint render_surf; @@ -1226,7 +1107,6 @@ struct { struct brw_stage_state base; - struct brw_cs_prog_data *prog_data; } cs; /* RS hardware binding table */ @@ -1252,43 +1132,6 @@ bool supported; } predicate; - struct { - /** A map from pipeline statistics counter IDs to MMIO addresses. */ - const int *statistics_registers; - - /** The number of active monitors using OA counters. */ - unsigned oa_users; - - /** - * A buffer object storing OA counter snapshots taken at the start and - * end of each batch (creating "bookends" around the batch). - */ - drm_intel_bo *bookend_bo; - - /** The number of snapshots written to bookend_bo. */ - int bookend_snapshots; - - /** - * An array of monitors whose results haven't yet been assembled based on - * the data in buffer objects. - * - * These may be active, or have already ended. However, the results - * have not been requested. - */ - struct brw_perf_monitor_object **unresolved; - int unresolved_elements; - int unresolved_array_size; - - /** - * Mapping from a uint32_t offset within an OA snapshot to the ID of - * the counter which MI_REPORT_PERF_COUNT stores there. - */ - const int *oa_snapshot_layout; - - /** Number of 32-bit entries in a hardware counter snapshot. */ - int entries_per_oa_snapshot; - } perfmon; - int num_atoms[BRW_NUM_PIPELINES]; const struct brw_tracked_state render_atoms[76]; const struct brw_tracked_state compute_atoms[11]; @@ -1305,11 +1148,6 @@ uint32_t render_target_format[MESA_FORMAT_COUNT]; bool format_supported_as_render_target[MESA_FORMAT_COUNT]; - /* Interpolation modes, one byte per vue slot. - * Used Gen4/5 by the clip|sf|wm stages. Ignored on Gen6+. - */ - struct interpolation_mode_map interpolation_mode; - /* PrimitiveRestart */ struct { bool in_progress; @@ -1335,7 +1173,7 @@ int baseinstance; struct { - const struct brw_l3_config *config; + const struct gen_l3_config *config; } l3; struct { @@ -1351,15 +1189,20 @@ struct brw_fast_clear_state *fast_clear_state; + /* Array of flags telling if auxiliary buffer is disabled for corresponding + * renderbuffer. If draw_aux_buffer_disabled[i] is set then use of + * auxiliary buffer for gl_framebuffer::_ColorDrawBuffers[i] is + * disabled. + * This is needed in case the same underlying buffer is also configured + * to be sampled but with a format that the sampling engine can't treat + * compressed or fast cleared. + */ + bool draw_aux_buffer_disabled[MAX_DRAW_BUFFERS]; + __DRIcontext *driContext; - struct intel_screen *intelScreen; + struct intel_screen *screen; }; -/*====================================================================== - * brw_vtbl.c - */ -void brwInitVtbl( struct brw_context *brw ); - /* brw_clear.c */ extern void intelInitClearFuncs(struct dd_function_table *functions); @@ -1369,7 +1212,7 @@ extern const char *const brw_vendor_string; extern const char * -brw_get_renderer_string(const struct intel_screen *intelScreen); +brw_get_renderer_string(const struct intel_screen *screen); enum { DRI_CONF_BO_REUSE_DISABLED, @@ -1472,7 +1315,7 @@ void brw_annotate_aub(struct brw_context *brw); /*====================================================================== - * brw_tex.c + * intel_tex_validate.c */ void brw_validate_textures( struct brw_context *brw ); @@ -1506,9 +1349,9 @@ unsigned thread_count); void brw_init_shader_time(struct brw_context *brw); int brw_get_shader_time_index(struct brw_context *brw, - struct gl_shader_program *shader_prog, struct gl_program *prog, - enum shader_time_shader_type type); + enum shader_time_shader_type type, + bool is_glsl_sh); void brw_collect_and_report_shader_time(struct brw_context *brw); void brw_destroy_shader_time(struct brw_context *brw); @@ -1528,7 +1371,7 @@ void brw_vec4_alloc_reg_set(struct brw_compiler *compiler); /* brw_disasm.c */ -int brw_disassemble_inst(FILE *file, const struct brw_device_info *devinfo, +int brw_disassemble_inst(FILE *file, const struct gen_device_info *devinfo, struct brw_inst *inst, bool is_compacted); /* brw_vs.c */ @@ -1536,7 +1379,7 @@ /* brw_draw_upload.c */ unsigned brw_get_vertex_surface_type(struct brw_context *brw, - const struct gl_client_array *glarray); + const struct gl_vertex_array *glarray); static inline unsigned brw_get_index_type(GLenum type) @@ -1580,16 +1423,15 @@ struct gl_buffer_object *buffer_obj, uint32_t *out_offset, unsigned num_vector_components, unsigned stride_dwords, unsigned offset_dwords); -void brw_upload_ubo_surfaces(struct brw_context *brw, - struct gl_shader *shader, +void brw_upload_ubo_surfaces(struct brw_context *brw, struct gl_program *prog, struct brw_stage_state *stage_state, struct brw_stage_prog_data *prog_data); void brw_upload_abo_surfaces(struct brw_context *brw, - struct gl_shader *shader, + const struct gl_program *prog, struct brw_stage_state *stage_state, struct brw_stage_prog_data *prog_data); void brw_upload_image_surfaces(struct brw_context *brw, - struct gl_shader *shader, + const struct gl_program *prog, struct brw_stage_state *stage_state, struct brw_stage_prog_data *prog_data); @@ -1598,12 +1440,6 @@ struct gl_renderbuffer *rb); uint32_t brw_depth_format(struct brw_context *brw, mesa_format format); -/* brw_performance_monitor.c */ -void brw_init_performance_monitors(struct brw_context *brw); -void brw_dump_perf_monitors(struct brw_context *brw); -void brw_perf_monitor_new_batch(struct brw_context *brw); -void brw_perf_monitor_finish_batch(struct brw_context *brw); - /* intel_buffer_objects.c */ int brw_bo_map(struct brw_context *brw, drm_intel_bo *bo, int write_enable, const char *bo_name); @@ -1619,8 +1455,8 @@ extern int intel_translate_stencil_op(GLenum op); extern int intel_translate_logic_op(GLenum opcode); -/* intel_syncobj.c */ -void intel_init_syncobj_functions(struct dd_function_table *functions); +/* brw_sync.c */ +void brw_init_syncobj_functions(struct dd_function_table *functions); /* gen6_sol.c */ struct gl_transform_feedback_object * @@ -1713,16 +1549,11 @@ unsigned gs_size, unsigned fs_size); void -gen7_emit_urb_state(struct brw_context *brw, - unsigned nr_vs_entries, - unsigned vs_size, unsigned vs_start, - unsigned nr_hs_entries, - unsigned hs_size, unsigned hs_start, - unsigned nr_ds_entries, - unsigned ds_size, unsigned ds_start, - unsigned nr_gs_entries, - unsigned gs_size, unsigned gs_start); - +gen6_upload_urb(struct brw_context *brw, unsigned vs_size, + bool gs_present, unsigned gs_size); +void +gen7_upload_urb(struct brw_context *brw, unsigned vs_size, + bool gs_present, bool tess_present); /* brw_reset.c */ extern GLenum @@ -1744,52 +1575,16 @@ return (struct brw_context *)ctx; } -static inline struct brw_vertex_program * -brw_vertex_program(struct gl_vertex_program *p) -{ - return (struct brw_vertex_program *) p; -} - -static inline const struct brw_vertex_program * -brw_vertex_program_const(const struct gl_vertex_program *p) -{ - return (const struct brw_vertex_program *) p; -} - -static inline struct brw_tess_ctrl_program * -brw_tess_ctrl_program(struct gl_tess_ctrl_program *p) +static inline struct brw_program * +brw_program(struct gl_program *p) { - return (struct brw_tess_ctrl_program *) p; + return (struct brw_program *) p; } -static inline struct brw_tess_eval_program * -brw_tess_eval_program(struct gl_tess_eval_program *p) +static inline const struct brw_program * +brw_program_const(const struct gl_program *p) { - return (struct brw_tess_eval_program *) p; -} - -static inline struct brw_geometry_program * -brw_geometry_program(struct gl_geometry_program *p) -{ - return (struct brw_geometry_program *) p; -} - -static inline struct brw_fragment_program * -brw_fragment_program(struct gl_fragment_program *p) -{ - return (struct brw_fragment_program *) p; -} - -static inline const struct brw_fragment_program * -brw_fragment_program_const(const struct gl_fragment_program *p) -{ - return (const struct brw_fragment_program *) p; -} - -static inline struct brw_compute_program * -brw_compute_program(struct gl_compute_program *p) -{ - return (struct brw_compute_program *) p; + return (const struct brw_program *) p; } /** @@ -1822,12 +1617,30 @@ } bool brw_do_cubemap_normalize(struct exec_list *instructions); -bool brw_lower_texture_gradients(struct brw_context *brw, - struct exec_list *instructions); extern const char * const conditional_modifier[16]; extern const char *const pred_ctrl_align16[16]; +static inline bool +brw_depth_writes_enabled(const struct brw_context *brw) +{ + const struct gl_context *ctx = &brw->ctx; + + /* We consider depth writes disabled if the depth function is GL_EQUAL, + * because it would just overwrite the existing depth value with itself. + * + * These bonus depth writes not only use bandwidth, but they also can + * prevent early depth processing. For example, if the pixel shader + * discards, the hardware must invoke the to determine whether or not + * to do the depth write. If writes are disabled, we may still be able + * to do the depth test before the shader, and skip the shader execution. + * + * The Broadwell 3DSTATE_WM_DEPTH_STENCIL documentation also contains + * a programming note saying to disable depth writes for EQUAL. + */ + return ctx->Depth.Test && ctx->Depth.Mask && ctx->Depth.Func != GL_EQUAL; +} + void brw_emit_depthbuffer(struct brw_context *brw); @@ -1871,7 +1684,7 @@ uint32_t tile_x, uint32_t tile_y); void gen8_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt, - unsigned int level, unsigned int layer, enum gen6_hiz_op op); + unsigned int level, unsigned int layer, enum blorp_hiz_op op); uint32_t get_hw_prim_for_gl_prim(int mode); @@ -1888,7 +1701,7 @@ /* brw_pipe_control.c */ int brw_init_pipe_control(struct brw_context *brw, - const struct brw_device_info *info); + const struct gen_device_info *info); void brw_fini_pipe_control(struct brw_context *brw); void brw_emit_pipe_control_flush(struct brw_context *brw, uint32_t flags); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_cs.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_cs.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_cs.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_cs.c 2017-06-01 10:37:10.000000000 +0000 @@ -35,8 +35,7 @@ #include "compiler/glsl/ir_uniform.h" static void -assign_cs_binding_table_offsets(const struct brw_device_info *devinfo, - const struct gl_shader_program *shader_prog, +assign_cs_binding_table_offsets(const struct gen_device_info *devinfo, const struct gl_program *prog, struct brw_cs_prog_data *prog_data) { @@ -46,17 +45,16 @@ prog_data->binding_table.work_groups_start = next_binding_table_offset; next_binding_table_offset++; - brw_assign_common_binding_table_offsets(MESA_SHADER_COMPUTE, devinfo, - shader_prog, prog, &prog_data->base, + brw_assign_common_binding_table_offsets(devinfo, prog, &prog_data->base, next_binding_table_offset); } static bool brw_codegen_cs_prog(struct brw_context *brw, - struct gl_shader_program *prog, - struct brw_compute_program *cp, + struct brw_program *cp, struct brw_cs_prog_key *key) { + const struct gen_device_info *devinfo = &brw->screen->devinfo; struct gl_context *ctx = &brw->ctx; const GLuint *program; void *mem_ctx = ralloc_context(NULL); @@ -65,33 +63,28 @@ bool start_busy = false; double start_time = 0; - struct brw_shader *cs = - (struct brw_shader *) prog->_LinkedShaders[MESA_SHADER_COMPUTE]; - assert (cs); - memset(&prog_data, 0, sizeof(prog_data)); - if (prog->Comp.SharedSize > 64 * 1024) { - prog->LinkStatus = false; + if (cp->program.info.cs.shared_size > 64 * 1024) { + cp->program.sh.data->LinkStatus = false; const char *error_str = "Compute shader used more than 64KB of shared variables"; - ralloc_strcat(&prog->InfoLog, error_str); + ralloc_strcat(&cp->program.sh.data->InfoLog, error_str); _mesa_problem(NULL, "Failed to link compute shader: %s\n", error_str); ralloc_free(mem_ctx); return false; } else { - prog_data.base.total_shared = prog->Comp.SharedSize; + prog_data.base.total_shared = cp->program.info.cs.shared_size; } - assign_cs_binding_table_offsets(brw->intelScreen->devinfo, prog, - &cp->program.Base, &prog_data); + assign_cs_binding_table_offsets(devinfo, &cp->program, &prog_data); /* Allocate the references to the uniforms that will end up in the * prog_data associated with the compiled program, and which will be freed * by the state cache. */ - int param_count = cp->program.Base.nir->num_uniforms / 4; + int param_count = cp->program.nir->num_uniforms / 4; /* The backend also sometimes add a param for the thread local id. */ prog_data.thread_local_id_index = param_count++; @@ -103,12 +96,13 @@ prog_data.base.pull_param = rzalloc_array(NULL, const gl_constant_value *, param_count); prog_data.base.image_param = - rzalloc_array(NULL, struct brw_image_param, cs->base.NumImages); + rzalloc_array(NULL, struct brw_image_param, + cp->program.info.num_images); prog_data.base.nr_params = param_count; - prog_data.base.nr_image_params = cs->base.NumImages; + prog_data.base.nr_image_params = cp->program.info.num_images; - brw_nir_setup_glsl_uniforms(cp->program.Base.nir, prog, &cp->program.Base, - &prog_data.base, true); + brw_nir_setup_glsl_uniforms(cp->program.nir, &cp->program,&prog_data.base, + true); if (unlikely(brw->perf_debug)) { start_busy = (brw->batch.last_bo && @@ -116,31 +110,28 @@ start_time = get_time(); } - if (unlikely(INTEL_DEBUG & DEBUG_CS)) - brw_dump_ir("compute", prog, &cs->base, &cp->program.Base); - int st_index = -1; if (INTEL_DEBUG & DEBUG_SHADER_TIME) - st_index = brw_get_shader_time_index(brw, prog, &cp->program.Base, ST_CS); + st_index = brw_get_shader_time_index(brw, &cp->program, ST_CS, true); char *error_str; - program = brw_compile_cs(brw->intelScreen->compiler, brw, mem_ctx, - key, &prog_data, cp->program.Base.nir, - st_index, &program_size, &error_str); + program = brw_compile_cs(brw->screen->compiler, brw, mem_ctx, key, + &prog_data, cp->program.nir, st_index, + &program_size, &error_str); if (program == NULL) { - prog->LinkStatus = false; - ralloc_strcat(&prog->InfoLog, error_str); + cp->program.sh.data->LinkStatus = false; + ralloc_strcat(&cp->program.sh.data->InfoLog, error_str); _mesa_problem(NULL, "Failed to compile compute shader: %s\n", error_str); ralloc_free(mem_ctx); return false; } - if (unlikely(brw->perf_debug) && cs) { - if (cs->compiled_once) { + if (unlikely(brw->perf_debug)) { + if (cp->compiled_once) { _mesa_problem(&brw->ctx, "CS programs shouldn't need recompiles"); } - cs->compiled_once = true; + cp->compiled_once = true; if (start_busy && !drm_intel_bo_busy(brw->batch.last_bo)) { perf_debug("CS compile took %.03f ms and stalled the GPU\n", @@ -148,7 +139,7 @@ } } - const unsigned subslices = MAX2(brw->intelScreen->subslice_total, 1); + const unsigned subslices = MAX2(brw->screen->subslice_total, 1); /* WaCSScratchSize:hsw * @@ -166,20 +157,17 @@ * number of threads per subslice. */ const unsigned scratch_ids_per_subslice = - brw->is_haswell ? 16 * 8 : brw->max_cs_threads; + brw->is_haswell ? 16 * 8 : devinfo->max_cs_threads; brw_alloc_stage_scratch(brw, &brw->cs.base, prog_data.base.total_scratch, scratch_ids_per_subslice * subslices); - if (unlikely(INTEL_DEBUG & DEBUG_CS)) - fprintf(stderr, "\n"); - brw_upload_cache(&brw->cache, BRW_CACHE_CS_PROG, key, sizeof(*key), program, program_size, &prog_data, sizeof(prog_data), - &brw->cs.base.prog_offset, &brw->cs.prog_data); + &brw->cs.base.prog_offset, &brw->cs.base.prog_data); ralloc_free(mem_ctx); return true; @@ -191,15 +179,13 @@ { struct gl_context *ctx = &brw->ctx; /* BRW_NEW_COMPUTE_PROGRAM */ - const struct brw_compute_program *cp = - (struct brw_compute_program *) brw->compute_program; + const struct brw_program *cp = (struct brw_program *) brw->compute_program; const struct gl_program *prog = (struct gl_program *) cp; memset(key, 0, sizeof(*key)); /* _NEW_TEXTURE */ - brw_populate_sampler_prog_key_data(ctx, prog, brw->cs.base.sampler_count, - &key->tex); + brw_populate_sampler_prog_key_data(ctx, prog, &key->tex); /* The unique compute program ID */ key->program_string_id = cp->id; @@ -211,8 +197,7 @@ { struct gl_context *ctx = &brw->ctx; struct brw_cs_prog_key key; - struct brw_compute_program *cp = (struct brw_compute_program *) - brw->compute_program; + struct brw_program *cp = (struct brw_program *) brw->compute_program; if (!cp) return; @@ -221,34 +206,28 @@ return; brw->cs.base.sampler_count = - _mesa_fls(ctx->ComputeProgram._Current->Base.SamplersUsed); + util_last_bit(ctx->ComputeProgram._Current->SamplersUsed); brw_cs_populate_key(brw, &key); if (!brw_search_cache(&brw->cache, BRW_CACHE_CS_PROG, &key, sizeof(key), - &brw->cs.base.prog_offset, &brw->cs.prog_data)) { - bool success = - brw_codegen_cs_prog(brw, - ctx->Shader.CurrentProgram[MESA_SHADER_COMPUTE], - cp, &key); + &brw->cs.base.prog_offset, + &brw->cs.base.prog_data)) { + bool success = brw_codegen_cs_prog(brw, cp, &key); (void) success; assert(success); } - brw->cs.base.prog_data = &brw->cs.prog_data->base; } bool -brw_cs_precompile(struct gl_context *ctx, - struct gl_shader_program *shader_prog, - struct gl_program *prog) +brw_cs_precompile(struct gl_context *ctx, struct gl_program *prog) { struct brw_context *brw = brw_context(ctx); struct brw_cs_prog_key key; - struct gl_compute_program *cp = (struct gl_compute_program *) prog; - struct brw_compute_program *bcp = brw_compute_program(cp); + struct brw_program *bcp = brw_program(prog); memset(&key, 0, sizeof(key)); key.program_string_id = bcp->id; @@ -256,12 +235,12 @@ brw_setup_tex_for_precompile(brw, &key.tex, prog); uint32_t old_prog_offset = brw->cs.base.prog_offset; - struct brw_cs_prog_data *old_prog_data = brw->cs.prog_data; + struct brw_stage_prog_data *old_prog_data = brw->cs.base.prog_data; - bool success = brw_codegen_cs_prog(brw, shader_prog, bcp, &key); + bool success = brw_codegen_cs_prog(brw, bcp, &key); brw->cs.base.prog_offset = old_prog_offset; - brw->cs.prog_data = old_prog_data; + brw->cs.base.prog_data = old_prog_data; return success; } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_curbe.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_curbe.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_curbe.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_curbe.c 2017-06-01 10:37:10.000000000 +0000 @@ -50,12 +50,14 @@ */ +#include "compiler/nir/nir.h" #include "main/context.h" #include "main/macros.h" #include "main/enums.h" #include "program/prog_parameter.h" #include "program/prog_print.h" #include "program/prog_statevars.h" +#include "util/bitscan.h" #include "intel_batchbuffer.h" #include "intel_buffer_objects.h" #include "brw_context.h" @@ -75,16 +77,16 @@ { struct gl_context *ctx = &brw->ctx; /* BRW_NEW_FS_PROG_DATA */ - const GLuint nr_fp_regs = (brw->wm.prog_data->base.nr_params + 15) / 16; + const GLuint nr_fp_regs = (brw->wm.base.prog_data->nr_params + 15) / 16; /* BRW_NEW_VS_PROG_DATA */ - const GLuint nr_vp_regs = (brw->vs.prog_data->base.base.nr_params + 15) / 16; + const GLuint nr_vp_regs = (brw->vs.base.prog_data->nr_params + 15) / 16; GLuint nr_clip_regs = 0; GLuint total_regs; /* _NEW_TRANSFORM */ if (ctx->Transform.ClipPlanesEnabled) { - GLuint nr_planes = 6 + _mesa_bitcount_64(ctx->Transform.ClipPlanesEnabled); + GLuint nr_planes = 6 + _mesa_bitcount(ctx->Transform.ClipPlanesEnabled); nr_clip_regs = (nr_planes * 4 + 15) / 16; } @@ -212,21 +214,21 @@ /* fragment shader constants */ if (brw->curbe.wm_size) { - _mesa_load_state_parameters(ctx, brw->fragment_program->Base.Parameters); + _mesa_load_state_parameters(ctx, brw->fragment_program->Parameters); /* BRW_NEW_CURBE_OFFSETS */ GLuint offset = brw->curbe.wm_start * 16; /* BRW_NEW_FS_PROG_DATA | _NEW_PROGRAM_CONSTANTS: copy uniform values */ - for (i = 0; i < brw->wm.prog_data->base.nr_params; i++) { - buf[offset + i] = *brw->wm.prog_data->base.param[i]; + for (i = 0; i < brw->wm.base.prog_data->nr_params; i++) { + buf[offset + i] = *brw->wm.base.prog_data->param[i]; } } /* clipper constants */ if (brw->curbe.clip_size) { GLuint offset = brw->curbe.clip_start * 16; - GLuint j; + GLbitfield mask; /* If any planes are going this way, send them all this way: */ @@ -241,26 +243,26 @@ * clip-space: */ clip_planes = brw_select_clip_planes(ctx); - for (j = 0; j < MAX_CLIP_PLANES; j++) { - if (ctx->Transform.ClipPlanesEnabled & (1<Transform.ClipPlanesEnabled; + while (mask) { + const int j = u_bit_scan(&mask); + buf[offset + i * 4 + 0].f = clip_planes[j][0]; + buf[offset + i * 4 + 1].f = clip_planes[j][1]; + buf[offset + i * 4 + 2].f = clip_planes[j][2]; + buf[offset + i * 4 + 3].f = clip_planes[j][3]; + i++; } } /* vertex shader constants */ if (brw->curbe.vs_size) { - _mesa_load_state_parameters(ctx, brw->vertex_program->Base.Parameters); + _mesa_load_state_parameters(ctx, brw->vertex_program->Parameters); GLuint offset = brw->curbe.vs_start * 16; /* BRW_NEW_VS_PROG_DATA | _NEW_PROGRAM_CONSTANTS: copy uniform values */ - for (i = 0; i < brw->vs.prog_data->base.base.nr_params; i++) { - buf[offset + i] = *brw->vs.prog_data->base.base.param[i]; + for (i = 0; i < brw->vs.base.prog_data->nr_params; i++) { + buf[offset + i] = *brw->vs.base.prog_data->param[i]; } } @@ -323,7 +325,7 @@ * BRW_NEW_FRAGMENT_PROGRAM */ if (brw->gen == 4 && !brw->is_g4x && - (brw->fragment_program->Base.InputsRead & (1 << VARYING_SLOT_POS))) { + (brw->fragment_program->info.inputs_read & (1 << VARYING_SLOT_POS))) { BEGIN_BATCH(2); OUT_BATCH(_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP << 16 | (2 - 2)); OUT_BATCH(0); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_defines.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_defines.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_defines.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_defines.h 2017-06-01 10:37:10.000000000 +0000 @@ -29,7 +29,10 @@ * Keith Whitwell */ -#define INTEL_MASK(high, low) (((1<<((high)-(low)+1))-1)<<(low)) +#ifndef BRW_DEFINES_H +#define BRW_DEFINES_H + +#define INTEL_MASK(high, low) (((1u<<((high)-(low)+1))-1)<<(low)) /* Using the GNU statement expression extension */ #define SET_FIELD(value, field) \ ({ \ @@ -47,9 +50,6 @@ */ #define REG_MASK(value) ((value) << 16) -#ifndef BRW_DEFINES_H -#define BRW_DEFINES_H - /* 3D state: */ #define CMD_3D_PRIM 0x7b00 /* 3DPRIMITIVE */ @@ -247,7 +247,7 @@ * Chipset Graphics Controller Programmer's Reference Manual, * Volume 2: 3D/Media", Revision 1.0b as of January 2008, * available at - * http://intellinuxgraphics.org/documentation.html + * https://01.org/linuxgraphics/documentation/hardware-specification-prms * at the time of this writing). * * These appear to be supported on at least some @@ -857,7 +857,7 @@ BRW_OPCODE_XOR = 7, BRW_OPCODE_SHR = 8, BRW_OPCODE_SHL = 9, - // BRW_OPCODE_DIM = 10, /**< Gen7.5 only */ /* Reused */ + BRW_OPCODE_DIM = 10, /**< Gen7.5 only */ /* Reused */ // BRW_OPCODE_SMOV = 10, /**< Gen8+ */ /* Reused */ /* Reserved - 11 */ BRW_OPCODE_ASR = 12, @@ -951,6 +951,10 @@ FS_OPCODE_FB_WRITE_LOGICAL, FS_OPCODE_REP_FB_WRITE, + + FS_OPCODE_FB_READ, + FS_OPCODE_FB_READ_LOGICAL, + SHADER_OPCODE_RCP, SHADER_OPCODE_RSQ, SHADER_OPCODE_SQRT, @@ -1006,7 +1010,7 @@ * For example, parameters for a send-from-GRF message. Or, updating * channels of a size 4 VGRF used to store vec4s such as texturing results. * - * This will be lowered into MOVs from each source to consecutive reg_offsets + * This will be lowered into MOVs from each source to consecutive offsets * of the destination VGRF. * * src[0] may be BAD_FILE. If so, the lowering pass skips emitting the MOV, @@ -1094,6 +1098,12 @@ VEC4_OPCODE_MOV_BYTES, VEC4_OPCODE_PACK_BYTES, VEC4_OPCODE_UNPACK_UNIFORM, + VEC4_OPCODE_FROM_DOUBLE, + VEC4_OPCODE_TO_DOUBLE, + VEC4_OPCODE_PICK_LOW_32BIT, + VEC4_OPCODE_PICK_HIGH_32BIT, + VEC4_OPCODE_SET_LOW_32BIT, + VEC4_OPCODE_SET_HIGH_32BIT, FS_OPCODE_DDX_COARSE, FS_OPCODE_DDX_FINE, @@ -1115,12 +1125,10 @@ FS_OPCODE_MOV_DISPATCH_TO_FLAGS, FS_OPCODE_DISCARD_JUMP, FS_OPCODE_SET_SAMPLE_ID, - FS_OPCODE_SET_SIMD4X2_OFFSET, FS_OPCODE_PACK_HALF_2x16_SPLIT, FS_OPCODE_UNPACK_HALF_2x16_SPLIT_X, FS_OPCODE_UNPACK_HALF_2x16_SPLIT_Y, FS_OPCODE_PLACEHOLDER_HALT, - FS_OPCODE_INTERPOLATE_AT_CENTROID, FS_OPCODE_INTERPOLATE_AT_SAMPLE, FS_OPCODE_INTERPOLATE_AT_SHARED_OFFSET, FS_OPCODE_INTERPOLATE_AT_PER_SLOT_OFFSET, @@ -1402,7 +1410,7 @@ enum tex_logical_srcs { /** Texture coordinates */ TEX_LOGICAL_SRC_COORDINATE, - /** Shadow comparitor */ + /** Shadow comparator */ TEX_LOGICAL_SRC_SHADOW_C, /** dPdx if the operation takes explicit derivatives, otherwise LOD value */ TEX_LOGICAL_SRC_LOD, @@ -1417,7 +1425,7 @@ /** Texture sampler index */ TEX_LOGICAL_SRC_SAMPLER, /** Texel offset for gathers */ - TEX_LOGICAL_SRC_OFFSET_VALUE, + TEX_LOGICAL_SRC_TG4_OFFSET, /** REQUIRED: Number of coordinate components (as UD immediate) */ TEX_LOGICAL_SRC_COORD_COMPONENTS, /** REQUIRED: Number of derivative components (as UD immediate) */ @@ -1666,6 +1674,12 @@ #define BRW_DATAPORT_OWORD_BLOCK_2_OWORDS 2 #define BRW_DATAPORT_OWORD_BLOCK_4_OWORDS 3 #define BRW_DATAPORT_OWORD_BLOCK_8_OWORDS 4 +#define BRW_DATAPORT_OWORD_BLOCK_DWORDS(n) \ + ((n) == 4 ? BRW_DATAPORT_OWORD_BLOCK_1_OWORDLOW : \ + (n) == 8 ? BRW_DATAPORT_OWORD_BLOCK_2_OWORDS : \ + (n) == 16 ? BRW_DATAPORT_OWORD_BLOCK_4_OWORDS : \ + (n) == 32 ? BRW_DATAPORT_OWORD_BLOCK_8_OWORDS : \ + (abort(), ~0)) #define BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD 0 #define BRW_DATAPORT_OWORD_DUAL_BLOCK_4OWORDS 2 @@ -1778,6 +1792,10 @@ #define HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2 12 #define HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE 13 +/* GEN9 */ +#define GEN9_DATAPORT_RC_RENDER_TARGET_WRITE 12 +#define GEN9_DATAPORT_RC_RENDER_TARGET_READ 13 + /* Dataport special binding table indices: */ #define BRW_BTI_STATELESS 255 #define GEN7_BTI_SLM 254 @@ -2210,6 +2228,7 @@ # define GEN7_CLIP_VERTEX_SUBPIXEL_PRECISION_8 (0 << 19) # define GEN7_CLIP_VERTEX_SUBPIXEL_PRECISION_4 (1 << 19) # define GEN7_CLIP_EARLY_CULL (1 << 18) +# define GEN8_CLIP_FORCE_USER_CLIP_DISTANCE_BITMASK (1 << 17) # define GEN7_CLIP_CULLMODE_BOTH (0 << 16) # define GEN7_CLIP_CULLMODE_NONE (1 << 16) # define GEN7_CLIP_CULLMODE_FRONT (2 << 16) @@ -2365,6 +2384,7 @@ #define _3DSTATE_RASTER 0x7850 /* GEN8+ */ /* DW1 */ # define GEN9_RASTER_VIEWPORT_Z_FAR_CLIP_TEST_ENABLE (1 << 26) +# define GEN9_RASTER_CONSERVATIVE_RASTERIZATION_ENABLE (1 << 24) # define GEN8_RASTER_FRONT_WINDING_CCW (1 << 21) # define GEN8_RASTER_CULL_BOTH (0 << 16) # define GEN8_RASTER_CULL_NONE (1 << 16) @@ -2533,19 +2553,19 @@ # define GEN8_PSX_SHADER_USES_INPUT_COVERAGE_MASK (1 << 1) # define GEN9_PSX_SHADER_NORMAL_COVERAGE_MASK_SHIFT 0 -enum brw_wm_barycentric_interp_mode { - BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC = 0, - BRW_WM_PERSPECTIVE_CENTROID_BARYCENTRIC = 1, - BRW_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC = 2, - BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC = 3, - BRW_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC = 4, - BRW_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC = 5, - BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT = 6 +enum brw_barycentric_mode { + BRW_BARYCENTRIC_PERSPECTIVE_PIXEL = 0, + BRW_BARYCENTRIC_PERSPECTIVE_CENTROID = 1, + BRW_BARYCENTRIC_PERSPECTIVE_SAMPLE = 2, + BRW_BARYCENTRIC_NONPERSPECTIVE_PIXEL = 3, + BRW_BARYCENTRIC_NONPERSPECTIVE_CENTROID = 4, + BRW_BARYCENTRIC_NONPERSPECTIVE_SAMPLE = 5, + BRW_BARYCENTRIC_MODE_COUNT = 6 }; -#define BRW_WM_NONPERSPECTIVE_BARYCENTRIC_BITS \ - ((1 << BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC) | \ - (1 << BRW_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC) | \ - (1 << BRW_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC)) +#define BRW_BARYCENTRIC_NONPERSPECTIVE_BITS \ + ((1 << BRW_BARYCENTRIC_NONPERSPECTIVE_PIXEL) | \ + (1 << BRW_BARYCENTRIC_NONPERSPECTIVE_CENTROID) | \ + (1 << BRW_BARYCENTRIC_NONPERSPECTIVE_SAMPLE)) #define _3DSTATE_WM 0x7814 /* GEN6+ */ /* DW1: kernel pointer */ @@ -2964,4 +2984,277 @@ # define GPGPU_WALKER_THREAD_WIDTH_MAX_SHIFT 0 # define GPGPU_WALKER_THREAD_WIDTH_MAX_MASK INTEL_MASK(5, 0) +#define CMD_MI (0x0 << 29) +#define CMD_2D (0x2 << 29) +#define CMD_3D (0x3 << 29) + +#define MI_NOOP (CMD_MI | 0) + +#define MI_BATCH_BUFFER_END (CMD_MI | 0xA << 23) + +#define MI_FLUSH (CMD_MI | (4 << 23)) +#define FLUSH_MAP_CACHE (1 << 0) +#define INHIBIT_FLUSH_RENDER_CACHE (1 << 2) + +#define MI_STORE_DATA_IMM (CMD_MI | (0x20 << 23)) +#define MI_LOAD_REGISTER_IMM (CMD_MI | (0x22 << 23)) +#define MI_LOAD_REGISTER_REG (CMD_MI | (0x2A << 23)) + +#define MI_FLUSH_DW (CMD_MI | (0x26 << 23) | 2) + +#define MI_STORE_REGISTER_MEM (CMD_MI | (0x24 << 23)) +# define MI_STORE_REGISTER_MEM_USE_GGTT (1 << 22) +# define MI_STORE_REGISTER_MEM_PREDICATE (1 << 21) + +/* Load a value from memory into a register. Only available on Gen7+. */ +#define GEN7_MI_LOAD_REGISTER_MEM (CMD_MI | (0x29 << 23)) +# define MI_LOAD_REGISTER_MEM_USE_GGTT (1 << 22) +/* Haswell RS control */ +#define MI_RS_CONTROL (CMD_MI | (0x6 << 23)) +#define MI_RS_STORE_DATA_IMM (CMD_MI | (0x2b << 23)) + +/* Manipulate the predicate bit based on some register values. Only on Gen7+ */ +#define GEN7_MI_PREDICATE (CMD_MI | (0xC << 23)) +# define MI_PREDICATE_LOADOP_KEEP (0 << 6) +# define MI_PREDICATE_LOADOP_LOAD (2 << 6) +# define MI_PREDICATE_LOADOP_LOADINV (3 << 6) +# define MI_PREDICATE_COMBINEOP_SET (0 << 3) +# define MI_PREDICATE_COMBINEOP_AND (1 << 3) +# define MI_PREDICATE_COMBINEOP_OR (2 << 3) +# define MI_PREDICATE_COMBINEOP_XOR (3 << 3) +# define MI_PREDICATE_COMPAREOP_TRUE (0 << 0) +# define MI_PREDICATE_COMPAREOP_FALSE (1 << 0) +# define MI_PREDICATE_COMPAREOP_SRCS_EQUAL (2 << 0) +# define MI_PREDICATE_COMPAREOP_DELTAS_EQUAL (3 << 0) + +#define HSW_MI_MATH (CMD_MI | (0x1a << 23)) + +#define MI_MATH_ALU2(opcode, operand1, operand2) \ + ( ((MI_MATH_OPCODE_##opcode) << 20) | ((MI_MATH_OPERAND_##operand1) << 10) | \ + ((MI_MATH_OPERAND_##operand2) << 0) ) + +#define MI_MATH_ALU1(opcode, operand1) \ + ( ((MI_MATH_OPCODE_##opcode) << 20) | ((MI_MATH_OPERAND_##operand1) << 10) ) + +#define MI_MATH_ALU0(opcode) \ + ( ((MI_MATH_OPCODE_##opcode) << 20) ) + +#define MI_MATH_OPCODE_NOOP 0x000 +#define MI_MATH_OPCODE_LOAD 0x080 +#define MI_MATH_OPCODE_LOADINV 0x480 +#define MI_MATH_OPCODE_LOAD0 0x081 +#define MI_MATH_OPCODE_LOAD1 0x481 +#define MI_MATH_OPCODE_ADD 0x100 +#define MI_MATH_OPCODE_SUB 0x101 +#define MI_MATH_OPCODE_AND 0x102 +#define MI_MATH_OPCODE_OR 0x103 +#define MI_MATH_OPCODE_XOR 0x104 +#define MI_MATH_OPCODE_STORE 0x180 +#define MI_MATH_OPCODE_STOREINV 0x580 + +#define MI_MATH_OPERAND_R0 0x00 +#define MI_MATH_OPERAND_R1 0x01 +#define MI_MATH_OPERAND_R2 0x02 +#define MI_MATH_OPERAND_R3 0x03 +#define MI_MATH_OPERAND_R4 0x04 +#define MI_MATH_OPERAND_SRCA 0x20 +#define MI_MATH_OPERAND_SRCB 0x21 +#define MI_MATH_OPERAND_ACCU 0x31 +#define MI_MATH_OPERAND_ZF 0x32 +#define MI_MATH_OPERAND_CF 0x33 + +/** @{ + * + * PIPE_CONTROL operation, a combination MI_FLUSH and register write with + * additional flushing control. + */ +#define _3DSTATE_PIPE_CONTROL (CMD_3D | (3 << 27) | (2 << 24)) +#define PIPE_CONTROL_CS_STALL (1 << 20) +#define PIPE_CONTROL_GLOBAL_SNAPSHOT_COUNT_RESET (1 << 19) +#define PIPE_CONTROL_TLB_INVALIDATE (1 << 18) +#define PIPE_CONTROL_SYNC_GFDT (1 << 17) +#define PIPE_CONTROL_MEDIA_STATE_CLEAR (1 << 16) +#define PIPE_CONTROL_NO_WRITE (0 << 14) +#define PIPE_CONTROL_WRITE_IMMEDIATE (1 << 14) +#define PIPE_CONTROL_WRITE_DEPTH_COUNT (2 << 14) +#define PIPE_CONTROL_WRITE_TIMESTAMP (3 << 14) +#define PIPE_CONTROL_DEPTH_STALL (1 << 13) +#define PIPE_CONTROL_RENDER_TARGET_FLUSH (1 << 12) +#define PIPE_CONTROL_INSTRUCTION_INVALIDATE (1 << 11) +#define PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE (1 << 10) /* GM45+ only */ +#define PIPE_CONTROL_ISP_DIS (1 << 9) +#define PIPE_CONTROL_INTERRUPT_ENABLE (1 << 8) +#define PIPE_CONTROL_FLUSH_ENABLE (1 << 7) /* Gen7+ only */ +/* GT */ +#define PIPE_CONTROL_DATA_CACHE_FLUSH (1 << 5) +#define PIPE_CONTROL_VF_CACHE_INVALIDATE (1 << 4) +#define PIPE_CONTROL_CONST_CACHE_INVALIDATE (1 << 3) +#define PIPE_CONTROL_STATE_CACHE_INVALIDATE (1 << 2) +#define PIPE_CONTROL_STALL_AT_SCOREBOARD (1 << 1) +#define PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0) +#define PIPE_CONTROL_PPGTT_WRITE (0 << 2) +#define PIPE_CONTROL_GLOBAL_GTT_WRITE (1 << 2) + +#define PIPE_CONTROL_CACHE_FLUSH_BITS \ + (PIPE_CONTROL_DEPTH_CACHE_FLUSH | PIPE_CONTROL_DATA_CACHE_FLUSH | \ + PIPE_CONTROL_RENDER_TARGET_FLUSH) + +#define PIPE_CONTROL_CACHE_INVALIDATE_BITS \ + (PIPE_CONTROL_STATE_CACHE_INVALIDATE | PIPE_CONTROL_CONST_CACHE_INVALIDATE | \ + PIPE_CONTROL_VF_CACHE_INVALIDATE | PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | \ + PIPE_CONTROL_INSTRUCTION_INVALIDATE) + +/** @} */ + +#define XY_SETUP_BLT_CMD (CMD_2D | (0x01 << 22)) + +#define XY_COLOR_BLT_CMD (CMD_2D | (0x50 << 22)) + +#define XY_SRC_COPY_BLT_CMD (CMD_2D | (0x53 << 22)) + +#define XY_FAST_COPY_BLT_CMD (CMD_2D | (0x42 << 22)) + +#define XY_TEXT_IMMEDIATE_BLIT_CMD (CMD_2D | (0x31 << 22)) +# define XY_TEXT_BYTE_PACKED (1 << 16) + +/* BR00 */ +#define XY_BLT_WRITE_ALPHA (1 << 21) +#define XY_BLT_WRITE_RGB (1 << 20) +#define XY_SRC_TILED (1 << 15) +#define XY_DST_TILED (1 << 11) + +/* BR00 */ +#define XY_FAST_SRC_TILED_64K (3 << 20) +#define XY_FAST_SRC_TILED_Y (2 << 20) +#define XY_FAST_SRC_TILED_X (1 << 20) + +#define XY_FAST_DST_TILED_64K (3 << 13) +#define XY_FAST_DST_TILED_Y (2 << 13) +#define XY_FAST_DST_TILED_X (1 << 13) + +/* BR13 */ +#define BR13_8 (0x0 << 24) +#define BR13_565 (0x1 << 24) +#define BR13_8888 (0x3 << 24) +#define BR13_16161616 (0x4 << 24) +#define BR13_32323232 (0x5 << 24) + +#define XY_FAST_SRC_TRMODE_YF (1 << 31) +#define XY_FAST_DST_TRMODE_YF (1 << 30) + +/* Pipeline Statistics Counter Registers */ +#define IA_VERTICES_COUNT 0x2310 +#define IA_PRIMITIVES_COUNT 0x2318 +#define VS_INVOCATION_COUNT 0x2320 +#define HS_INVOCATION_COUNT 0x2300 +#define DS_INVOCATION_COUNT 0x2308 +#define GS_INVOCATION_COUNT 0x2328 +#define GS_PRIMITIVES_COUNT 0x2330 +#define CL_INVOCATION_COUNT 0x2338 +#define CL_PRIMITIVES_COUNT 0x2340 +#define PS_INVOCATION_COUNT 0x2348 +#define CS_INVOCATION_COUNT 0x2290 +#define PS_DEPTH_COUNT 0x2350 + +#define GEN6_SO_PRIM_STORAGE_NEEDED 0x2280 +#define GEN7_SO_PRIM_STORAGE_NEEDED(n) (0x5240 + (n) * 8) + +#define GEN6_SO_NUM_PRIMS_WRITTEN 0x2288 +#define GEN7_SO_NUM_PRIMS_WRITTEN(n) (0x5200 + (n) * 8) + +#define GEN7_SO_WRITE_OFFSET(n) (0x5280 + (n) * 4) + +#define TIMESTAMP 0x2358 + +#define BCS_SWCTRL 0x22200 +# define BCS_SWCTRL_SRC_Y (1 << 0) +# define BCS_SWCTRL_DST_Y (1 << 1) + +#define OACONTROL 0x2360 +# define OACONTROL_COUNTER_SELECT_SHIFT 2 +# define OACONTROL_ENABLE_COUNTERS (1 << 0) + +/* Auto-Draw / Indirect Registers */ +#define GEN7_3DPRIM_END_OFFSET 0x2420 +#define GEN7_3DPRIM_START_VERTEX 0x2430 +#define GEN7_3DPRIM_VERTEX_COUNT 0x2434 +#define GEN7_3DPRIM_INSTANCE_COUNT 0x2438 +#define GEN7_3DPRIM_START_INSTANCE 0x243C +#define GEN7_3DPRIM_BASE_VERTEX 0x2440 + +/* Auto-Compute / Indirect Registers */ +#define GEN7_GPGPU_DISPATCHDIMX 0x2500 +#define GEN7_GPGPU_DISPATCHDIMY 0x2504 +#define GEN7_GPGPU_DISPATCHDIMZ 0x2508 + +#define GEN7_CACHE_MODE_1 0x7004 +# define GEN8_HIZ_NP_PMA_FIX_ENABLE (1 << 11) +# define GEN8_HIZ_NP_EARLY_Z_FAILS_DISABLE (1 << 13) +# define GEN9_PARTIAL_RESOLVE_DISABLE_IN_VC (1 << 1) +# define GEN8_HIZ_PMA_MASK_BITS \ + REG_MASK(GEN8_HIZ_NP_PMA_FIX_ENABLE | GEN8_HIZ_NP_EARLY_Z_FAILS_DISABLE) + +/* Predicate registers */ +#define MI_PREDICATE_SRC0 0x2400 +#define MI_PREDICATE_SRC1 0x2408 +#define MI_PREDICATE_DATA 0x2410 +#define MI_PREDICATE_RESULT 0x2418 +#define MI_PREDICATE_RESULT_1 0x241C +#define MI_PREDICATE_RESULT_2 0x2214 + +#define HSW_CS_GPR(n) (0x2600 + (n) * 8) + +/* L3 cache control registers. */ +#define GEN7_L3SQCREG1 0xb010 +/* L3SQ general and high priority credit initialization. */ +# define IVB_L3SQCREG1_SQGHPCI_DEFAULT 0x00730000 +# define VLV_L3SQCREG1_SQGHPCI_DEFAULT 0x00d30000 +# define HSW_L3SQCREG1_SQGHPCI_DEFAULT 0x00610000 +# define GEN7_L3SQCREG1_CONV_DC_UC (1 << 24) +# define GEN7_L3SQCREG1_CONV_IS_UC (1 << 25) +# define GEN7_L3SQCREG1_CONV_C_UC (1 << 26) +# define GEN7_L3SQCREG1_CONV_T_UC (1 << 27) + +#define GEN7_L3CNTLREG2 0xb020 +# define GEN7_L3CNTLREG2_SLM_ENABLE (1 << 0) +# define GEN7_L3CNTLREG2_URB_ALLOC_SHIFT 1 +# define GEN7_L3CNTLREG2_URB_ALLOC_MASK INTEL_MASK(6, 1) +# define GEN7_L3CNTLREG2_URB_LOW_BW (1 << 7) +# define GEN7_L3CNTLREG2_ALL_ALLOC_SHIFT 8 +# define GEN7_L3CNTLREG2_ALL_ALLOC_MASK INTEL_MASK(13, 8) +# define GEN7_L3CNTLREG2_RO_ALLOC_SHIFT 14 +# define GEN7_L3CNTLREG2_RO_ALLOC_MASK INTEL_MASK(19, 14) +# define GEN7_L3CNTLREG2_RO_LOW_BW (1 << 20) +# define GEN7_L3CNTLREG2_DC_ALLOC_SHIFT 21 +# define GEN7_L3CNTLREG2_DC_ALLOC_MASK INTEL_MASK(26, 21) +# define GEN7_L3CNTLREG2_DC_LOW_BW (1 << 27) + +#define GEN7_L3CNTLREG3 0xb024 +# define GEN7_L3CNTLREG3_IS_ALLOC_SHIFT 1 +# define GEN7_L3CNTLREG3_IS_ALLOC_MASK INTEL_MASK(6, 1) +# define GEN7_L3CNTLREG3_IS_LOW_BW (1 << 7) +# define GEN7_L3CNTLREG3_C_ALLOC_SHIFT 8 +# define GEN7_L3CNTLREG3_C_ALLOC_MASK INTEL_MASK(13, 8) +# define GEN7_L3CNTLREG3_C_LOW_BW (1 << 14) +# define GEN7_L3CNTLREG3_T_ALLOC_SHIFT 15 +# define GEN7_L3CNTLREG3_T_ALLOC_MASK INTEL_MASK(20, 15) +# define GEN7_L3CNTLREG3_T_LOW_BW (1 << 21) + +#define HSW_SCRATCH1 0xb038 +#define HSW_SCRATCH1_L3_ATOMIC_DISABLE (1 << 27) + +#define HSW_ROW_CHICKEN3 0xe49c +#define HSW_ROW_CHICKEN3_L3_ATOMIC_DISABLE (1 << 6) + +#define GEN8_L3CNTLREG 0x7034 +# define GEN8_L3CNTLREG_SLM_ENABLE (1 << 0) +# define GEN8_L3CNTLREG_URB_ALLOC_SHIFT 1 +# define GEN8_L3CNTLREG_URB_ALLOC_MASK INTEL_MASK(7, 1) +# define GEN8_L3CNTLREG_RO_ALLOC_SHIFT 11 +# define GEN8_L3CNTLREG_RO_ALLOC_MASK INTEL_MASK(17, 11) +# define GEN8_L3CNTLREG_DC_ALLOC_SHIFT 18 +# define GEN8_L3CNTLREG_DC_ALLOC_MASK INTEL_MASK(24, 18) +# define GEN8_L3CNTLREG_ALL_ALLOC_SHIFT 25 +# define GEN8_L3CNTLREG_ALL_ALLOC_MASK INTEL_MASK(31, 25) + #endif diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_device_info.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_device_info.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_device_info.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_device_info.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,518 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - -#include -#include -#include "brw_device_info.h" - -static const struct brw_device_info brw_device_info_i965 = { - .gen = 4, - .has_negative_rhw_bug = true, - .num_slices = 1, - .max_vs_threads = 16, - .max_gs_threads = 2, - .max_wm_threads = 8 * 4, - .urb = { - .size = 256, - }, -}; - -static const struct brw_device_info brw_device_info_g4x = { - .gen = 4, - .has_pln = true, - .has_compr4 = true, - .has_surface_tile_offset = true, - .is_g4x = true, - .num_slices = 1, - .max_vs_threads = 32, - .max_gs_threads = 2, - .max_wm_threads = 10 * 5, - .urb = { - .size = 384, - }, -}; - -static const struct brw_device_info brw_device_info_ilk = { - .gen = 5, - .has_pln = true, - .has_compr4 = true, - .has_surface_tile_offset = true, - .num_slices = 1, - .max_vs_threads = 72, - .max_gs_threads = 32, - .max_wm_threads = 12 * 6, - .urb = { - .size = 1024, - }, -}; - -static const struct brw_device_info brw_device_info_snb_gt1 = { - .gen = 6, - .gt = 1, - .has_hiz_and_separate_stencil = true, - .has_llc = true, - .has_pln = true, - .has_surface_tile_offset = true, - .needs_unlit_centroid_workaround = true, - .num_slices = 1, - .max_vs_threads = 24, - .max_gs_threads = 21, /* conservative; 24 if rendering disabled. */ - .max_wm_threads = 40, - .urb = { - .size = 32, - .min_vs_entries = 24, - .max_vs_entries = 256, - .max_gs_entries = 256, - }, -}; - -static const struct brw_device_info brw_device_info_snb_gt2 = { - .gen = 6, - .gt = 2, - .has_hiz_and_separate_stencil = true, - .has_llc = true, - .has_pln = true, - .has_surface_tile_offset = true, - .needs_unlit_centroid_workaround = true, - .num_slices = 1, - .max_vs_threads = 60, - .max_gs_threads = 60, - .max_wm_threads = 80, - .urb = { - .size = 64, - .min_vs_entries = 24, - .max_vs_entries = 256, - .max_gs_entries = 256, - }, -}; - -#define GEN7_FEATURES \ - .gen = 7, \ - .has_hiz_and_separate_stencil = true, \ - .must_use_separate_stencil = true, \ - .has_llc = true, \ - .has_pln = true, \ - .has_surface_tile_offset = true - -static const struct brw_device_info brw_device_info_ivb_gt1 = { - GEN7_FEATURES, .is_ivybridge = true, .gt = 1, - .needs_unlit_centroid_workaround = true, - .num_slices = 1, - .max_vs_threads = 36, - .max_hs_threads = 36, - .max_ds_threads = 36, - .max_gs_threads = 36, - .max_wm_threads = 48, - .max_cs_threads = 36, - .urb = { - .size = 128, - .min_vs_entries = 32, - .max_vs_entries = 512, - .max_hs_entries = 32, - .min_ds_entries = 10, - .max_ds_entries = 288, - .max_gs_entries = 192, - }, -}; - -static const struct brw_device_info brw_device_info_ivb_gt2 = { - GEN7_FEATURES, .is_ivybridge = true, .gt = 2, - .needs_unlit_centroid_workaround = true, - .num_slices = 1, - .max_vs_threads = 128, - .max_hs_threads = 128, - .max_ds_threads = 128, - .max_gs_threads = 128, - .max_wm_threads = 172, - .max_cs_threads = 64, - .urb = { - .size = 256, - .min_vs_entries = 32, - .max_vs_entries = 704, - .max_hs_entries = 64, - .min_ds_entries = 10, - .max_ds_entries = 448, - .max_gs_entries = 320, - }, -}; - -static const struct brw_device_info brw_device_info_byt = { - GEN7_FEATURES, .is_baytrail = true, .gt = 1, - .needs_unlit_centroid_workaround = true, - .num_slices = 1, - .has_llc = false, - .max_vs_threads = 36, - .max_hs_threads = 36, - .max_ds_threads = 36, - .max_gs_threads = 36, - .max_wm_threads = 48, - .max_cs_threads = 32, - .urb = { - .size = 128, - .min_vs_entries = 32, - .max_vs_entries = 512, - .max_hs_entries = 32, - .min_ds_entries = 10, - .max_ds_entries = 288, - .max_gs_entries = 192, - }, -}; - -#define HSW_FEATURES \ - GEN7_FEATURES, \ - .is_haswell = true, \ - .supports_simd16_3src = true, \ - .has_resource_streamer = true - -static const struct brw_device_info brw_device_info_hsw_gt1 = { - HSW_FEATURES, .gt = 1, - .num_slices = 1, - .max_vs_threads = 70, - .max_hs_threads = 70, - .max_ds_threads = 70, - .max_gs_threads = 70, - .max_wm_threads = 102, - .max_cs_threads = 70, - .urb = { - .size = 128, - .min_vs_entries = 32, - .max_vs_entries = 640, - .max_hs_entries = 64, - .min_ds_entries = 10, - .max_ds_entries = 384, - .max_gs_entries = 256, - }, -}; - -static const struct brw_device_info brw_device_info_hsw_gt2 = { - HSW_FEATURES, .gt = 2, - .num_slices = 1, - .max_vs_threads = 280, - .max_hs_threads = 256, - .max_ds_threads = 280, - .max_gs_threads = 256, - .max_wm_threads = 204, - .max_cs_threads = 70, - .urb = { - .size = 256, - .min_vs_entries = 64, - .max_vs_entries = 1664, - .max_hs_entries = 128, - .min_ds_entries = 10, - .max_ds_entries = 960, - .max_gs_entries = 640, - }, -}; - -static const struct brw_device_info brw_device_info_hsw_gt3 = { - HSW_FEATURES, .gt = 3, - .num_slices = 2, - .max_vs_threads = 280, - .max_hs_threads = 256, - .max_ds_threads = 280, - .max_gs_threads = 256, - .max_wm_threads = 408, - .max_cs_threads = 70, - .urb = { - .size = 512, - .min_vs_entries = 64, - .max_vs_entries = 1664, - .max_hs_entries = 128, - .min_ds_entries = 10, - .max_ds_entries = 960, - .max_gs_entries = 640, - }, -}; - -#define GEN8_FEATURES \ - .gen = 8, \ - .has_hiz_and_separate_stencil = true, \ - .has_resource_streamer = true, \ - .must_use_separate_stencil = true, \ - .has_llc = true, \ - .has_pln = true, \ - .supports_simd16_3src = true, \ - .max_vs_threads = 504, \ - .max_hs_threads = 504, \ - .max_ds_threads = 504, \ - .max_gs_threads = 504, \ - .max_wm_threads = 384 - -static const struct brw_device_info brw_device_info_bdw_gt1 = { - GEN8_FEATURES, .gt = 1, - .num_slices = 1, - .max_cs_threads = 42, - .urb = { - .size = 192, - .min_vs_entries = 64, - .max_vs_entries = 2560, - .max_hs_entries = 504, - .min_ds_entries = 34, - .max_ds_entries = 1536, - .max_gs_entries = 960, - } -}; - -static const struct brw_device_info brw_device_info_bdw_gt2 = { - GEN8_FEATURES, .gt = 2, - .num_slices = 1, - .max_cs_threads = 56, - .urb = { - .size = 384, - .min_vs_entries = 64, - .max_vs_entries = 2560, - .max_hs_entries = 504, - .min_ds_entries = 34, - .max_ds_entries = 1536, - .max_gs_entries = 960, - } -}; - -static const struct brw_device_info brw_device_info_bdw_gt3 = { - GEN8_FEATURES, .gt = 3, - .num_slices = 2, - .max_cs_threads = 56, - .urb = { - .size = 384, - .min_vs_entries = 64, - .max_vs_entries = 2560, - .max_hs_entries = 504, - .min_ds_entries = 34, - .max_ds_entries = 1536, - .max_gs_entries = 960, - } -}; - -static const struct brw_device_info brw_device_info_chv = { - GEN8_FEATURES, .is_cherryview = 1, .gt = 1, - .has_llc = false, - .num_slices = 1, - .max_vs_threads = 80, - .max_hs_threads = 80, - .max_ds_threads = 80, - .max_gs_threads = 80, - .max_wm_threads = 128, - .max_cs_threads = 6 * 7, - .urb = { - .size = 192, - .min_vs_entries = 34, - .max_vs_entries = 640, - .max_hs_entries = 80, - .min_ds_entries = 34, - .max_ds_entries = 384, - .max_gs_entries = 256, - } -}; - -#define GEN9_FEATURES \ - .gen = 9, \ - .has_hiz_and_separate_stencil = true, \ - .has_resource_streamer = true, \ - .must_use_separate_stencil = true, \ - .has_llc = true, \ - .has_pln = true, \ - .supports_simd16_3src = true, \ - .max_vs_threads = 336, \ - .max_gs_threads = 336, \ - .max_hs_threads = 336, \ - .max_ds_threads = 336, \ - .max_wm_threads = 64 * 12, \ - .max_cs_threads = 56, \ - .urb = { \ - .size = 384, \ - .min_vs_entries = 64, \ - .max_vs_entries = 1856, \ - .max_hs_entries = 672, \ - .min_ds_entries = 34, \ - .max_ds_entries = 1120, \ - .max_gs_entries = 640, \ - } - -static const struct brw_device_info brw_device_info_skl_gt1 = { - GEN9_FEATURES, .gt = 1, - .num_slices = 1, - .urb.size = 192, -}; - -static const struct brw_device_info brw_device_info_skl_gt2 = { - GEN9_FEATURES, .gt = 2, - .num_slices = 1, -}; - -static const struct brw_device_info brw_device_info_skl_gt3 = { - GEN9_FEATURES, .gt = 3, - .num_slices = 2, -}; - -static const struct brw_device_info brw_device_info_skl_gt4 = { - GEN9_FEATURES, .gt = 4, - .num_slices = 3, - /* From the "L3 Allocation and Programming" documentation: - * - * "URB is limited to 1008KB due to programming restrictions. This is not a - * restriction of the L3 implementation, but of the FF and other clients. - * Therefore, in a GT4 implementation it is possible for the programmed - * allocation of the L3 data array to provide 3*384KB=1152KB for URB, but - * only 1008KB of this will be used." - */ - .urb.size = 1008 / 3, -}; - -static const struct brw_device_info brw_device_info_bxt = { - GEN9_FEATURES, - .is_broxton = 1, - .gt = 1, - .has_llc = false, - - .num_slices = 1, - .max_vs_threads = 112, - .max_hs_threads = 112, - .max_ds_threads = 112, - .max_gs_threads = 112, - .max_wm_threads = 64 * 4, - .max_cs_threads = 6 * 6, - .urb = { - .size = 192, - .min_vs_entries = 34, - .max_vs_entries = 704, - .max_hs_entries = 256, - .max_ds_entries = 416, - .max_gs_entries = 256, - } -}; - -static const struct brw_device_info brw_device_info_bxt_2x6 = { - GEN9_FEATURES, - .is_broxton = 1, - .gt = 1, - .has_llc = false, - - .num_slices = 1, - .max_vs_threads = 56, /* XXX: guess */ - .max_hs_threads = 56, /* XXX: guess */ - .max_ds_threads = 56, - .max_gs_threads = 56, - .max_wm_threads = 64 * 4, - .max_cs_threads = 6 * 6, - .urb = { - .size = 128, - .min_vs_entries = 34, - .max_vs_entries = 352, - .max_hs_entries = 128, - .max_ds_entries = 208, - .max_gs_entries = 128, - } -}; -/* - * Note: for all KBL SKUs, the PRM says SKL for GS entries, not SKL+. - * There's no KBL entry. Using the default SKL (GEN9) GS entries value. - */ - -/* - * Both SKL and KBL support a maximum of 64 threads per - * Pixel Shader Dispatch (PSD) unit. - */ -#define KBL_MAX_THREADS_PER_PSD 64 - -static const struct brw_device_info brw_device_info_kbl_gt1 = { - GEN9_FEATURES, - .gt = 1, - - .max_cs_threads = 7 * 6, - .max_wm_threads = KBL_MAX_THREADS_PER_PSD * 4, - .urb.size = 192, - .num_slices = 1, -}; - -static const struct brw_device_info brw_device_info_kbl_gt1_5 = { - GEN9_FEATURES, - .gt = 1, - - .max_cs_threads = 7 * 6, - .max_wm_threads = KBL_MAX_THREADS_PER_PSD * 4, - .num_slices = 1, -}; - -static const struct brw_device_info brw_device_info_kbl_gt2 = { - GEN9_FEATURES, - .gt = 2, - - .max_wm_threads = KBL_MAX_THREADS_PER_PSD * 4, - .num_slices = 1, -}; - -static const struct brw_device_info brw_device_info_kbl_gt3 = { - GEN9_FEATURES, - .gt = 3, - - .max_wm_threads = KBL_MAX_THREADS_PER_PSD * 8, - .num_slices = 2, -}; - -static const struct brw_device_info brw_device_info_kbl_gt4 = { - GEN9_FEATURES, - .gt = 4, - - .max_wm_threads = KBL_MAX_THREADS_PER_PSD * 12, - /* - * From the "L3 Allocation and Programming" documentation: - * - * "URB is limited to 1008KB due to programming restrictions. This - * is not a restriction of the L3 implementation, but of the FF and - * other clients. Therefore, in a GT4 implementation it is - * possible for the programmed allocation of the L3 data array to - * provide 3*384KB=1152KB for URB, but only 1008KB of this - * will be used." - */ - .urb.size = 1008 / 3, - .num_slices = 3, -}; - -const struct brw_device_info * -brw_get_device_info(int devid) -{ - const struct brw_device_info *devinfo; - switch (devid) { -#undef CHIPSET -#define CHIPSET(id, family, name) \ - case id: devinfo = &brw_device_info_##family; break; -#include "pci_ids/i965_pci_ids.h" - default: - fprintf(stderr, "i965_dri.so does not support the 0x%x PCI ID.\n", devid); - return NULL; - } - - return devinfo; -} - -const char * -brw_get_device_name(int devid) -{ - switch (devid) { -#undef CHIPSET -#define CHIPSET(id, family, name) case id: return name; -#include "pci_ids/i965_pci_ids.h" - default: - return NULL; - } -} diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_device_info.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_device_info.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_device_info.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_device_info.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,147 +0,0 @@ - /* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - */ - -#pragma once -#include - -/** - * Intel hardware information and quirks - */ -struct brw_device_info -{ - int gen; /**< Generation number: 4, 5, 6, 7, ... */ - int gt; - - bool is_g4x; - bool is_ivybridge; - bool is_baytrail; - bool is_haswell; - bool is_cherryview; - bool is_broxton; - - bool has_hiz_and_separate_stencil; - bool must_use_separate_stencil; - - bool has_llc; - - bool has_pln; - bool has_compr4; - bool has_surface_tile_offset; - bool supports_simd16_3src; - bool has_resource_streamer; - - /** - * \name Intel hardware quirks - * @{ - */ - bool has_negative_rhw_bug; - - /** - * Some versions of Gen hardware don't do centroid interpolation correctly - * on unlit pixels, causing incorrect values for derivatives near triangle - * edges. Enabling this flag causes the fragment shader to use - * non-centroid interpolation for unlit pixels, at the expense of two extra - * fragment shader instructions. - */ - bool needs_unlit_centroid_workaround; - /** @} */ - - /** - * \name GPU hardware limits - * - * In general, you can find shader thread maximums by looking at the "Maximum - * Number of Threads" field in the Intel PRM description of the 3DSTATE_VS, - * 3DSTATE_GS, 3DSTATE_HS, 3DSTATE_DS, and 3DSTATE_PS commands. URB entry - * limits come from the "Number of URB Entries" field in the the - * 3DSTATE_URB_VS command and friends. - * - * These fields are used to calculate the scratch space to allocate. The - * amount of scratch space can be larger without being harmful on modern - * GPUs, however, prior to Haswell, programming the maximum number of threads - * to greater than the hardware maximum would cause GPU performance to tank. - * - * @{ - */ - /** - * Total number of slices present on the device whether or not they've been - * fused off. - * - * XXX: CS thread counts are limited by the inability to do cross subslice - * communication. It is the effectively the number of logical threads which - * can be executed in a subslice. Fuse configurations may cause this number - * to change, so we program @max_cs_threads as the lower maximum. - */ - unsigned num_slices; - unsigned max_vs_threads; /**< Maximum Vertex Shader threads */ - unsigned max_hs_threads; /**< Maximum Hull Shader threads */ - unsigned max_ds_threads; /**< Maximum Domain Shader threads */ - unsigned max_gs_threads; /**< Maximum Geometry Shader threads. */ - /** - * Theoretical maximum number of Pixel Shader threads. - * - * PSD means Pixel Shader Dispatcher. On modern Intel GPUs, hardware will - * automatically scale pixel shader thread count, based on a single value - * programmed into 3DSTATE_PS. - * - * To calculate the maximum number of threads for Gen8 beyond (which have - * multiple Pixel Shader Dispatchers): - * - * - Look up 3DSTATE_PS and find "Maximum Number of Threads Per PSD" - * - Usually there's only one PSD per subslice, so use the number of - * subslices for number of PSDs. - * - For max_wm_threads, the total should be PSD threads * #PSDs. - */ - unsigned max_wm_threads; - - /** - * Maximum Compute Shader threads. - * - * Thread count * number of EUs per subslice - */ - unsigned max_cs_threads; - - struct { - /** - * Hardware default URB size. - * - * The units this is expressed in are somewhat inconsistent: 512b units - * on Gen4-5, KB on Gen6-7, and KB times the slice count on Gen8+. - * - * Look up "URB Size" in the "Device Attributes" page, and take the - * maximum. Look up the slice count for each GT SKU on the same page. - * urb.size = URB Size (kbytes) / slice count - */ - unsigned size; - unsigned min_vs_entries; - unsigned max_vs_entries; - unsigned max_hs_entries; - unsigned min_ds_entries; - unsigned max_ds_entries; - unsigned max_gs_entries; - } urb; - /** @} */ -}; - -const struct brw_device_info *brw_get_device_info(int devid); -const char *brw_get_device_name(int devid); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_disasm.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_disasm.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_disasm.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_disasm.c 2017-06-01 10:37:10.000000000 +0000 @@ -31,7 +31,7 @@ #include "brw_eu.h" static bool -has_jip(const struct brw_device_info *devinfo, enum opcode opcode) +has_jip(const struct gen_device_info *devinfo, enum opcode opcode) { if (devinfo->gen < 6) return false; @@ -46,7 +46,7 @@ } static bool -has_uip(const struct brw_device_info *devinfo, enum opcode opcode) +has_uip(const struct gen_device_info *devinfo, enum opcode opcode) { if (devinfo->gen < 6) return false; @@ -59,7 +59,7 @@ } static bool -has_branch_ctrl(const struct brw_device_info *devinfo, enum opcode opcode) +has_branch_ctrl(const struct gen_device_info *devinfo, enum opcode opcode) { if (devinfo->gen < 8) return false; @@ -388,6 +388,30 @@ [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORM write", }; +static const char *const dp_rc_msg_type_gen7[16] = { + [GEN7_DATAPORT_RC_MEDIA_BLOCK_READ] = "media block read", + [GEN7_DATAPORT_RC_TYPED_SURFACE_READ] = "typed surface read", + [GEN7_DATAPORT_RC_TYPED_ATOMIC_OP] = "typed atomic op", + [GEN7_DATAPORT_RC_MEMORY_FENCE] = "memory fence", + [GEN7_DATAPORT_RC_MEDIA_BLOCK_WRITE] = "media block write", + [GEN7_DATAPORT_RC_RENDER_TARGET_WRITE] = "RT write", + [GEN7_DATAPORT_RC_TYPED_SURFACE_WRITE] = "typed surface write" +}; + +static const char *const dp_rc_msg_type_gen9[16] = { + [GEN9_DATAPORT_RC_RENDER_TARGET_WRITE] = "RT write", + [GEN9_DATAPORT_RC_RENDER_TARGET_READ] = "RT read" +}; + +static const char *const * +dp_rc_msg_type(const struct gen_device_info *devinfo) +{ + return (devinfo->gen >= 9 ? dp_rc_msg_type_gen9 : + devinfo->gen >= 7 ? dp_rc_msg_type_gen7 : + devinfo->gen >= 6 ? dp_rc_msg_type_gen6 : + dp_write_port_msg_type); +} + static const char *const m_rt_write_subtype[] = { [0b000] = "SIMD16", [0b001] = "SIMD16/RepData", @@ -636,7 +660,7 @@ } static int -print_opcode(FILE *file, const struct brw_device_info *devinfo, +print_opcode(FILE *file, const struct gen_device_info *devinfo, enum opcode id) { const struct opcode_desc *desc = brw_opcode_desc(devinfo, id); @@ -708,7 +732,7 @@ } static int -dest(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst) +dest(FILE *file, const struct gen_device_info *devinfo, brw_inst *inst) { int err = 0; @@ -719,7 +743,7 @@ if (err == -1) return 0; if (brw_inst_dst_da1_subreg_nr(devinfo, inst)) - format(file, ".%ld", brw_inst_dst_da1_subreg_nr(devinfo, inst) / + format(file, ".%"PRIu64, brw_inst_dst_da1_subreg_nr(devinfo, inst) / reg_type_size[brw_inst_dst_reg_type(devinfo, inst)]); string(file, "<"); err |= control(file, "horiz stride", horiz_stride, @@ -730,7 +754,7 @@ } else { string(file, "g[a0"); if (brw_inst_dst_ia_subreg_nr(devinfo, inst)) - format(file, ".%ld", brw_inst_dst_ia_subreg_nr(devinfo, inst) / + format(file, ".%"PRIu64, brw_inst_dst_ia_subreg_nr(devinfo, inst) / reg_type_size[brw_inst_dst_reg_type(devinfo, inst)]); if (brw_inst_dst_ia1_addr_imm(devinfo, inst)) format(file, " %d", brw_inst_dst_ia1_addr_imm(devinfo, inst)); @@ -748,7 +772,7 @@ if (err == -1) return 0; if (brw_inst_dst_da16_subreg_nr(devinfo, inst)) - format(file, ".%ld", brw_inst_dst_da16_subreg_nr(devinfo, inst) / + format(file, ".%u", 16 / reg_type_size[brw_inst_dst_reg_type(devinfo, inst)]); string(file, "<1>"); err |= control(file, "writemask", writemask, @@ -765,7 +789,7 @@ } static int -dest_3src(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst) +dest_3src(FILE *file, const struct gen_device_info *devinfo, brw_inst *inst) { int err = 0; uint32_t reg_file; @@ -779,7 +803,7 @@ if (err == -1) return 0; if (brw_inst_3src_dst_subreg_nr(devinfo, inst)) - format(file, ".%ld", brw_inst_3src_dst_subreg_nr(devinfo, inst)); + format(file, ".%"PRIu64, brw_inst_3src_dst_subreg_nr(devinfo, inst)); string(file, "<1>"); err |= control(file, "writemask", writemask, brw_inst_3src_dst_writemask(devinfo, inst), NULL); @@ -807,7 +831,7 @@ static int src_da1(FILE *file, - const struct brw_device_info *devinfo, + const struct gen_device_info *devinfo, unsigned opcode, unsigned type, unsigned _reg_file, unsigned _vert_stride, unsigned _width, unsigned _horiz_stride, @@ -835,7 +859,7 @@ static int src_ia1(FILE *file, - const struct brw_device_info *devinfo, + const struct gen_device_info *devinfo, unsigned opcode, unsigned type, unsigned _reg_file, @@ -889,7 +913,7 @@ static int src_da16(FILE *file, - const struct brw_device_info *devinfo, + const struct gen_device_info *devinfo, unsigned opcode, unsigned _reg_type, unsigned _reg_file, @@ -918,14 +942,14 @@ format(file, ".%d", 16 / reg_type_size[_reg_type]); string(file, "<"); err |= control(file, "vert stride", vert_stride, _vert_stride, NULL); - string(file, ",4,1>"); + string(file, ">"); err |= src_swizzle(file, BRW_SWIZZLE4(swz_x, swz_y, swz_z, swz_w)); err |= control(file, "src da16 reg type", reg_encoding, _reg_type, NULL); return err; } static int -src0_3src(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst) +src0_3src(FILE *file, const struct gen_device_info *devinfo, brw_inst *inst) { int err = 0; unsigned src0_subreg_nr = brw_inst_3src_src0_subreg_nr(devinfo, inst); @@ -952,7 +976,7 @@ } static int -src1_3src(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst) +src1_3src(FILE *file, const struct gen_device_info *devinfo, brw_inst *inst) { int err = 0; unsigned src1_subreg_nr = brw_inst_3src_src1_subreg_nr(devinfo, inst); @@ -980,7 +1004,7 @@ static int -src2_3src(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst) +src2_3src(FILE *file, const struct gen_device_info *devinfo, brw_inst *inst) { int err = 0; unsigned src2_subreg_nr = brw_inst_3src_src2_subreg_nr(devinfo, inst); @@ -1007,7 +1031,7 @@ } static int -imm(FILE *file, const struct brw_device_info *devinfo, unsigned type, brw_inst *inst) +imm(FILE *file, const struct gen_device_info *devinfo, unsigned type, brw_inst *inst) { switch (type) { case BRW_HW_REG_TYPE_UD: @@ -1049,7 +1073,7 @@ } static int -src0(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst) +src0(FILE *file, const struct gen_device_info *devinfo, brw_inst *inst) { if (brw_inst_src0_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) { return imm(file, devinfo, brw_inst_src0_reg_type(devinfo, inst), inst); @@ -1105,7 +1129,7 @@ } static int -src1(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst) +src1(FILE *file, const struct gen_device_info *devinfo, brw_inst *inst) { if (brw_inst_src1_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) { return imm(file, devinfo, brw_inst_src1_reg_type(devinfo, inst), inst); @@ -1161,12 +1185,16 @@ } static int -qtr_ctrl(FILE *file, const struct brw_device_info *devinfo, brw_inst *inst) +qtr_ctrl(FILE *file, const struct gen_device_info *devinfo, brw_inst *inst) { int qtr_ctl = brw_inst_qtr_control(devinfo, inst); int exec_size = 1 << brw_inst_exec_size(devinfo, inst); - if (exec_size == 8) { + if (exec_size < 8) { + const unsigned nib_ctl = devinfo->gen < 7 ? 0 : + brw_inst_nib_control(devinfo, inst); + format(file, " %dN", qtr_ctl * 2 + nib_ctl + 1); + } else if (exec_size == 8) { switch (qtr_ctl) { case 0: string(file, " 1Q"); @@ -1192,7 +1220,7 @@ #ifdef DEBUG static __attribute__((__unused__)) int -brw_disassemble_imm(const struct brw_device_info *devinfo, +brw_disassemble_imm(const struct gen_device_info *devinfo, uint32_t dw3, uint32_t dw2, uint32_t dw1, uint32_t dw0) { brw_inst inst; @@ -1203,7 +1231,7 @@ #endif int -brw_disassemble_inst(FILE *file, const struct brw_device_info *devinfo, +brw_disassemble_inst(FILE *file, const struct gen_device_info *devinfo, brw_inst *inst, bool is_compacted) { int err = 0; @@ -1216,9 +1244,9 @@ string(file, "("); err |= control(file, "predicate inverse", pred_inv, brw_inst_pred_inv(devinfo, inst), NULL); - format(file, "f%ld", devinfo->gen >= 7 ? brw_inst_flag_reg_nr(devinfo, inst) : 0); + format(file, "f%"PRIu64, devinfo->gen >= 7 ? brw_inst_flag_reg_nr(devinfo, inst) : 0); if (brw_inst_flag_subreg_nr(devinfo, inst)) - format(file, ".%ld", brw_inst_flag_subreg_nr(devinfo, inst)); + format(file, ".%"PRIu64, brw_inst_flag_subreg_nr(devinfo, inst)); if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { err |= control(file, "predicate control align1", pred_ctrl_align1, brw_inst_pred_control(devinfo, inst), NULL); @@ -1252,10 +1280,10 @@ (devinfo->gen < 6 || (opcode != BRW_OPCODE_SEL && opcode != BRW_OPCODE_IF && opcode != BRW_OPCODE_WHILE))) { - format(file, ".f%ld", + format(file, ".f%"PRIu64, devinfo->gen >= 7 ? brw_inst_flag_reg_nr(devinfo, inst) : 0); if (brw_inst_flag_subreg_nr(devinfo, inst)) - format(file, ".%ld", brw_inst_flag_subreg_nr(devinfo, inst)); + format(file, ".%"PRIu64, brw_inst_flag_subreg_nr(devinfo, inst)); } } @@ -1267,7 +1295,7 @@ } if (opcode == BRW_OPCODE_SEND && devinfo->gen < 6) - format(file, " %ld", brw_inst_base_mrf(devinfo, inst)); + format(file, " %"PRIu64, brw_inst_base_mrf(devinfo, inst)); if (has_uip(devinfo, opcode)) { /* Instructions that have UIP also have JIP. */ @@ -1288,7 +1316,7 @@ pad(file, 16); format(file, "Jump: %d", brw_inst_gen4_jump_count(devinfo, inst)); pad(file, 32); - format(file, "Pop: %ld", brw_inst_gen4_pop_count(devinfo, inst)); + format(file, "Pop: %"PRIu64, brw_inst_gen4_pop_count(devinfo, inst)); } else if (devinfo->gen < 6 && (opcode == BRW_OPCODE_IF || opcode == BRW_OPCODE_IFF || opcode == BRW_OPCODE_HALT)) { @@ -1296,7 +1324,7 @@ format(file, "Jump: %d", brw_inst_gen4_jump_count(devinfo, inst)); } else if (devinfo->gen < 6 && opcode == BRW_OPCODE_ENDIF) { pad(file, 16); - format(file, "Pop: %ld", brw_inst_gen4_pop_count(devinfo, inst)); + format(file, "Pop: %"PRIu64, brw_inst_gen4_pop_count(devinfo, inst)); } else if (opcode == BRW_OPCODE_JMPI) { pad(file, 16); err |= src1(file, devinfo, inst); @@ -1369,11 +1397,11 @@ brw_inst_sampler_msg_type(devinfo, inst), &space); err |= control(file, "sampler simd mode", gen5_sampler_simd_mode, brw_inst_sampler_simd_mode(devinfo, inst), &space); - format(file, " Surface = %ld Sampler = %ld", + format(file, " Surface = %"PRIu64" Sampler = %"PRIu64, brw_inst_binding_table_index(devinfo, inst), brw_inst_sampler(devinfo, inst)); } else { - format(file, " (%ld, %ld, %ld, ", + format(file, " (%"PRIu64", %"PRIu64", %"PRIu64", ", brw_inst_binding_table_index(devinfo, inst), brw_inst_sampler(devinfo, inst), brw_inst_sampler_msg_type(devinfo, inst)); @@ -1386,9 +1414,10 @@ } break; case GEN6_SFID_DATAPORT_SAMPLER_CACHE: + case GEN6_SFID_DATAPORT_CONSTANT_CACHE: /* aka BRW_SFID_DATAPORT_READ on Gen4-5 */ if (devinfo->gen >= 6) { - format(file, " (%ld, %ld, %ld, %ld)", + format(file, " (%"PRIu64", %"PRIu64", %"PRIu64", %"PRIu64")", brw_inst_binding_table_index(devinfo, inst), brw_inst_dp_msg_control(devinfo, inst), brw_inst_dp_msg_type(devinfo, inst), @@ -1401,10 +1430,10 @@ brw_inst_dp_read_msg_type(devinfo, inst), &space); - format(file, " MsgCtrl = 0x%lx", + format(file, " MsgCtrl = 0x%"PRIx64, brw_inst_dp_read_msg_control(devinfo, inst)); - format(file, " Surface = %ld", brw_inst_binding_table_index(devinfo, inst)); + format(file, " Surface = %"PRIu64, brw_inst_binding_table_index(devinfo, inst)); } break; @@ -1413,9 +1442,7 @@ unsigned msg_type = brw_inst_dp_write_msg_type(devinfo, inst); err |= control(file, "DP rc message type", - devinfo->gen >= 6 ? dp_rc_msg_type_gen6 - : dp_write_port_msg_type, - msg_type, &space); + dp_rc_msg_type(devinfo), msg_type, &space); bool is_rt_write = msg_type == (devinfo->gen >= 6 ? GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE @@ -1431,18 +1458,18 @@ if (devinfo->gen < 7 && brw_inst_dp_write_commit(devinfo, inst)) string(file, " WriteCommit"); } else { - format(file, " MsgCtrl = 0x%lx", + format(file, " MsgCtrl = 0x%"PRIx64, brw_inst_dp_write_msg_control(devinfo, inst)); } - format(file, " Surface = %ld", brw_inst_binding_table_index(devinfo, inst)); + format(file, " Surface = %"PRIu64, brw_inst_binding_table_index(devinfo, inst)); break; } case BRW_SFID_URB: { unsigned opcode = brw_inst_urb_opcode(devinfo, inst); - format(file, " %ld", brw_inst_urb_global_offset(devinfo, inst)); + format(file, " %"PRIu64, brw_inst_urb_global_offset(devinfo, inst)); space = 1; @@ -1494,7 +1521,7 @@ dp_dc0_msg_type_gen7, brw_inst_dp_msg_type(devinfo, inst), &space); - format(file, ", %ld, ", brw_inst_binding_table_index(devinfo, inst)); + format(file, ", %"PRIu64", ", brw_inst_binding_table_index(devinfo, inst)); switch (brw_inst_dp_msg_type(devinfo, inst)) { case GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP: @@ -1502,7 +1529,7 @@ brw_inst_imm_ud(devinfo, inst) >> 8 & 0xf, &space); break; default: - format(file, "%ld", brw_inst_dp_msg_control(devinfo, inst)); + format(file, "%"PRIu64, brw_inst_dp_msg_control(devinfo, inst)); } format(file, ")"); break; @@ -1519,7 +1546,7 @@ dp_dc1_msg_type_hsw, brw_inst_dp_msg_type(devinfo, inst), &space); - format(file, ", Surface = %ld, ", + format(file, ", Surface = %"PRIu64", ", brw_inst_binding_table_index(devinfo, inst)); switch (brw_inst_dp_msg_type(devinfo, inst)) { @@ -1553,7 +1580,7 @@ case GEN7_SFID_PIXEL_INTERPOLATOR: if (devinfo->gen >= 7) { - format(file, " (%s, %s, 0x%02lx)", + format(file, " (%s, %s, 0x%02"PRIx64")", brw_inst_pi_nopersp(devinfo, inst) ? "linear" : "persp", pixel_interpolator_msg_types[brw_inst_pi_message_type(devinfo, inst)], brw_inst_pi_message_data(devinfo, inst)); @@ -1568,8 +1595,8 @@ if (space) string(file, " "); - format(file, "mlen %ld", brw_inst_mlen(devinfo, inst)); - format(file, " rlen %ld", brw_inst_rlen(devinfo, inst)); + format(file, "mlen %"PRIu64, brw_inst_mlen(devinfo, inst)); + format(file, " rlen %"PRIu64, brw_inst_rlen(devinfo, inst)); } } pad(file, 64); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_draw.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_draw.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_draw.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_draw.c 2017-06-01 10:37:10.000000000 +0000 @@ -38,6 +38,7 @@ #include "swrast/swrast.h" #include "swrast_setup/swrast_setup.h" #include "drivers/common/meta.h" +#include "util/bitscan.h" #include "brw_blorp.h" #include "brw_draw.h" @@ -101,8 +102,8 @@ brw->ctx.NewDriverState |= BRW_NEW_PRIMITIVE; if (reduced_prim[prim->mode] != brw->reduced_primitive) { - brw->reduced_primitive = reduced_prim[prim->mode]; - brw->ctx.NewDriverState |= BRW_NEW_REDUCED_PRIMITIVE; + brw->reduced_primitive = reduced_prim[prim->mode]; + brw->ctx.NewDriverState |= BRW_NEW_REDUCED_PRIMITIVE; } } } @@ -284,7 +285,7 @@ static void brw_merge_inputs(struct brw_context *brw, - const struct gl_client_array *arrays[]) + const struct gl_vertex_array *arrays[]) { const struct gl_context *ctx = &brw->ctx; GLuint i; @@ -301,16 +302,15 @@ } if (brw->gen < 8 && !brw->is_haswell) { - struct gl_program *vp = &ctx->VertexProgram._Current->Base; + uint64_t mask = ctx->VertexProgram._Current->info.inputs_read; /* Prior to Haswell, the hardware can't natively support GL_FIXED or * 2_10_10_10_REV vertex formats. Set appropriate workaround flags. */ - for (i = 0; i < VERT_ATTRIB_MAX; i++) { - if (!(vp->InputsRead & BITFIELD64_BIT(i))) - continue; - + while (mask) { uint8_t wa_flags = 0; + i = u_bit_scan64(&mask); + switch (brw->vb.inputs[i].glarray->Type) { case GL_FIXED: @@ -372,7 +372,7 @@ front_irb->need_downsample = true; if (back_irb) back_irb->need_downsample = true; - if (depth_irb && ctx->Depth.Mask) { + if (depth_irb && brw_depth_writes_enabled(brw)) { intel_renderbuffer_att_set_needs_depth_resolve(depth_att); brw_render_cache_set_add_bo(brw, depth_irb->mt->bo); } @@ -386,13 +386,12 @@ struct intel_renderbuffer *irb = intel_renderbuffer(fb->_ColorDrawBuffers[i]); - if (irb) { - brw_render_cache_set_add_bo(brw, irb->mt->bo); - - if (intel_miptree_is_lossless_compressed(brw, irb->mt)) { - irb->mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_UNRESOLVED; - } - } + if (!irb) + continue; + + brw_render_cache_set_add_bo(brw, irb->mt->bo); + intel_miptree_used_for_rendering( + brw, irb->mt, irb->mt_level, irb->mt_layer, irb->layer_count); } } @@ -409,8 +408,22 @@ struct intel_renderbuffer *irb = intel_renderbuffer(fb->_ColorDrawBuffers[i]); - if (irb) { - intel_miptree_prepare_mcs(brw, irb->mt); + if (!irb) { + continue; + } + + /* For layered rendering non-compressed fast cleared buffers need to be + * resolved. Surface state can carry only one fast color clear value + * while each layer may have its own fast clear color value. For + * compressed buffers color value is available in the color buffer. + */ + if (irb->layer_count > 1 && + !(irb->mt->aux_disable & INTEL_AUX_DISABLE_CCS) && + !intel_miptree_is_lossless_compressed(brw, irb->mt)) { + assert(brw->gen >= 8); + + intel_miptree_resolve_color(brw, irb->mt, irb->mt_level, + irb->mt_layer, irb->layer_count, 0); } } } @@ -420,7 +433,7 @@ */ static void brw_try_draw_prims(struct gl_context *ctx, - const struct gl_client_array *arrays[], + const struct gl_vertex_array *arrays[], const struct _mesa_prim *prims, GLuint nr_prims, const struct _mesa_index_buffer *ib, @@ -452,15 +465,15 @@ * index. */ brw->wm.base.sampler_count = - _mesa_fls(ctx->FragmentProgram._Current->Base.SamplersUsed); + util_last_bit(ctx->FragmentProgram._Current->SamplersUsed); brw->gs.base.sampler_count = ctx->GeometryProgram._Current ? - _mesa_fls(ctx->GeometryProgram._Current->Base.SamplersUsed) : 0; + util_last_bit(ctx->GeometryProgram._Current->SamplersUsed) : 0; brw->tes.base.sampler_count = ctx->TessEvalProgram._Current ? - _mesa_fls(ctx->TessEvalProgram._Current->Base.SamplersUsed) : 0; + util_last_bit(ctx->TessEvalProgram._Current->SamplersUsed) : 0; brw->tcs.base.sampler_count = ctx->TessCtrlProgram._Current ? - _mesa_fls(ctx->TessCtrlProgram._Current->Base.SamplersUsed) : 0; + util_last_bit(ctx->TessCtrlProgram._Current->SamplersUsed) : 0; brw->vs.base.sampler_count = - _mesa_fls(ctx->VertexProgram._Current->Base.SamplersUsed); + util_last_bit(ctx->VertexProgram._Current->SamplersUsed); intel_prepare_render(brw); brw_predraw_set_aux_buffers(brw); @@ -521,15 +534,17 @@ const int new_basevertex = prims[i].indexed ? prims[i].basevertex : prims[i].start; const int new_baseinstance = prims[i].base_instance; + const struct brw_vs_prog_data *vs_prog_data = + brw_vs_prog_data(brw->vs.base.prog_data); if (i > 0) { const bool uses_draw_parameters = - brw->vs.prog_data->uses_basevertex || - brw->vs.prog_data->uses_baseinstance; + vs_prog_data->uses_basevertex || + vs_prog_data->uses_baseinstance; if ((uses_draw_parameters && prims[i].is_indirect) || - (brw->vs.prog_data->uses_basevertex && + (vs_prog_data->uses_basevertex && brw->draw.params.gl_basevertex != new_basevertex) || - (brw->vs.prog_data->uses_baseinstance && + (vs_prog_data->uses_baseinstance && brw->draw.params.gl_baseinstance != new_baseinstance)) brw->ctx.NewDriverState |= BRW_NEW_VERTICES; } @@ -556,19 +571,19 @@ /* gl_DrawID always needs its own vertex buffer since it's not part of * the indirect parameter buffer. If the program uses gl_DrawID we need * to flag BRW_NEW_VERTICES. For the first iteration, we don't have - * valid brw->vs.prog_data, but we always flag BRW_NEW_VERTICES before + * valid vs_prog_data, but we always flag BRW_NEW_VERTICES before * the loop. */ brw->draw.gl_drawid = prims[i].draw_id; drm_intel_bo_unreference(brw->draw.draw_id_bo); brw->draw.draw_id_bo = NULL; - if (i > 0 && brw->vs.prog_data->uses_drawid) + if (i > 0 && vs_prog_data->uses_drawid) brw->ctx.NewDriverState |= BRW_NEW_VERTICES; if (brw->gen < 6) - brw_set_prim(brw, &prims[i]); + brw_set_prim(brw, &prims[i]); else - gen6_set_prim(brw, &prims[i]); + gen6_set_prim(brw, &prims[i]); retry: @@ -578,8 +593,8 @@ * brw->ctx.NewDriverState. */ if (brw->ctx.NewDriverState) { - brw->no_batch_wrap = true; - brw_upload_render_state(brw); + brw->no_batch_wrap = true; + brw_upload_render_state(brw); } brw_emit_prim(brw, &prims[i], brw->primitive, xfb_obj, stream); @@ -587,17 +602,17 @@ brw->no_batch_wrap = false; if (dri_bufmgr_check_aperture_space(&brw->batch.bo, 1)) { - if (!fail_next) { - intel_batchbuffer_reset_to_saved(brw); - intel_batchbuffer_flush(brw); - fail_next = true; - goto retry; - } else { + if (!fail_next) { + intel_batchbuffer_reset_to_saved(brw); + intel_batchbuffer_flush(brw); + fail_next = true; + goto retry; + } else { int ret = intel_batchbuffer_flush(brw); WARN_ONCE(ret == -ENOSPC, "i965: Single primitive emit exceeded " "available aperture space\n"); - } + } } /* Now that we know we haven't run out of aperture space, we can safely @@ -610,7 +625,7 @@ if (brw->always_flush_batch) intel_batchbuffer_flush(brw); - brw_state_cache_check_size(brw); + brw_program_cache_check_size(brw); brw_postdraw_set_buffers_need_resolve(brw); return; @@ -629,7 +644,7 @@ struct gl_buffer_object *indirect) { struct brw_context *brw = brw_context(ctx); - const struct gl_client_array **arrays = ctx->Array._DrawArrays; + const struct gl_vertex_array **arrays = ctx->Array._DrawArrays; struct brw_transform_feedback_object *xfb_obj = (struct brw_transform_feedback_object *) gl_xfb_obj; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_draw.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_draw.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_draw.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_draw.h 2017-06-01 10:37:10.000000000 +0000 @@ -27,9 +27,22 @@ #define BRW_DRAW_H #include "main/mtypes.h" /* for struct gl_context... */ +#include "intel_bufmgr.h" struct brw_context; +uint32_t * +brw_emit_vertex_buffer_state(struct brw_context *brw, + unsigned buffer_nr, + drm_intel_bo *bo, + unsigned start_offset, + unsigned end_offset, + unsigned stride, + unsigned step_rate, + uint32_t *__map); + +#define EMIT_VERTEX_BUFFER_STATE(...) __map = \ + brw_emit_vertex_buffer_state(__VA_ARGS__, __map) void brw_draw_prims(struct gl_context *ctx, const struct _mesa_prim *prims, diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_draw_upload.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_draw_upload.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_draw_upload.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_draw_upload.c 2017-06-01 10:37:10.000000000 +0000 @@ -231,13 +231,97 @@ * 64-bit components are stored in the URB without any conversion." * Also included on BDW PRM, Volume 7, page 470, table "Source Element * Formats Supported in VF Unit" - * Previous PRMs don't include those references. + * + * Previous PRMs don't include those references, so for gen7 we can't use + * PASSTHRU formats directly. But in any case, we prefer to return passthru + * even in that case, because that reflects what we want to achieve, even + * if we would need to workaround on gen < 8. */ - return (brw->gen >= 8 && doubles + return (doubles ? double_types_passthru[size] : double_types_float[size]); } +static bool +is_passthru_format(uint32_t format) +{ + switch (format) { + case BRW_SURFACEFORMAT_R64_PASSTHRU: + case BRW_SURFACEFORMAT_R64G64_PASSTHRU: + case BRW_SURFACEFORMAT_R64G64B64_PASSTHRU: + case BRW_SURFACEFORMAT_R64G64B64A64_PASSTHRU: + return true; + default: + return false; + } +} + +static int +uploads_needed(uint32_t format) +{ + if (!is_passthru_format(format)) + return 1; + + switch (format) { + case BRW_SURFACEFORMAT_R64_PASSTHRU: + case BRW_SURFACEFORMAT_R64G64_PASSTHRU: + return 1; + case BRW_SURFACEFORMAT_R64G64B64_PASSTHRU: + case BRW_SURFACEFORMAT_R64G64B64A64_PASSTHRU: + return 2; + default: + unreachable("not reached"); + } +} + +/* + * Returns the number of componentes associated with a format that is used on + * a 64 to 32 format split. See downsize_format() + */ +static int +upload_format_size(uint32_t upload_format) +{ + switch (upload_format) { + case BRW_SURFACEFORMAT_R32G32_FLOAT: + return 2; + case BRW_SURFACEFORMAT_R32G32B32A32_FLOAT: + return 4; + default: + unreachable("not reached"); + } +} + +/* + * Returns the format that we are finally going to use when upload a vertex + * element. It will only change if we are using *64*PASSTHRU formats, as for + * gen < 8 they need to be splitted on two *32*FLOAT formats. + * + * @upload points in which upload we are. Valid values are [0,1] + */ +static uint32_t +downsize_format_if_needed(uint32_t format, + int upload) +{ + assert(upload == 0 || upload == 1); + + if (!is_passthru_format(format)) + return format; + + switch (format) { + case BRW_SURFACEFORMAT_R64_PASSTHRU: + return BRW_SURFACEFORMAT_R32G32_FLOAT; + case BRW_SURFACEFORMAT_R64G64_PASSTHRU: + return BRW_SURFACEFORMAT_R32G32B32A32_FLOAT; + case BRW_SURFACEFORMAT_R64G64B64_PASSTHRU: + return !upload ? BRW_SURFACEFORMAT_R32G32B32A32_FLOAT + : BRW_SURFACEFORMAT_R32G32_FLOAT; + case BRW_SURFACEFORMAT_R64G64B64A64_PASSTHRU: + return BRW_SURFACEFORMAT_R32G32B32A32_FLOAT; + default: + unreachable("not reached"); + } +} + /** * Given vertex array type/size/format/normalized info, return * the appopriate hardware surface type. @@ -245,7 +329,7 @@ */ unsigned brw_get_vertex_surface_type(struct brw_context *brw, - const struct gl_client_array *glarray) + const struct gl_vertex_array *glarray) { int size = glarray->Size; const bool is_ivybridge_or_older = @@ -290,6 +374,7 @@ case GL_DOUBLE: return double_types(brw, size, glarray->Doubles); case GL_FLOAT: return float_types[size]; case GL_HALF_FLOAT: + case GL_HALF_FLOAT_OES: if (brw->gen < 6 && size == 3) return half_float_types[4]; else @@ -368,6 +453,7 @@ case GL_DOUBLE: return double_types(brw, size, glarray->Doubles); case GL_FLOAT: return float_types[size]; case GL_HALF_FLOAT: + case GL_HALF_FLOAT_OES: if (brw->gen < 6 && size == 3) return half_float_types[4]; else @@ -421,13 +507,22 @@ uint8_t *dst = intel_upload_space(brw, size, dst_stride, &buffer->bo, &buffer->offset); - if (dst_stride == src_stride) { - memcpy(dst, src, size); - } else { - while (count--) { - memcpy(dst, src, dst_stride); - src += src_stride; - dst += dst_stride; + /* The GL 4.5 spec says: + * "If any enabled array’s buffer binding is zero when DrawArrays or + * one of the other drawing commands defined in section 10.4 is called, + * the result is undefined." + * + * In this case, let's the dst with undefined values + */ + if (src != NULL) { + if (dst_stride == src_stride) { + memcpy(dst, src, size); + } else { + while (count--) { + memcpy(dst, src, dst_stride); + src += src_stride; + dst += dst_stride; + } } } buffer->stride = dst_stride; @@ -439,7 +534,9 @@ { struct gl_context *ctx = &brw->ctx; /* BRW_NEW_VS_PROG_DATA */ - GLbitfield64 vs_inputs = brw->vs.prog_data->inputs_read; + const struct brw_vs_prog_data *vs_prog_data = + brw_vs_prog_data(brw->vs.base.prog_data); + GLbitfield64 vs_inputs = vs_prog_data->inputs_read; const unsigned char *ptr = NULL; GLuint interleaved = 0; unsigned int min_index = brw->vb.min_index + brw->basevertex; @@ -468,10 +565,16 @@ /* Accumulate the list of enabled arrays. */ brw->vb.nr_enabled = 0; while (vs_inputs) { - GLuint index = ffsll(vs_inputs) - 1; + GLuint first = ffsll(vs_inputs) - 1; + assert (first < 64); + GLuint index = + first - DIV_ROUND_UP(_mesa_bitcount_64(vs_prog_data->double_inputs_read & + BITFIELD64_MASK(first)), 2); struct brw_vertex_element *input = &brw->vb.inputs[index]; - - vs_inputs &= ~BITFIELD64_BIT(index); + input->is_dual_slot = (vs_prog_data->double_inputs_read & BITFIELD64_BIT(first)) != 0; + vs_inputs &= ~BITFIELD64_BIT(first); + if (input->is_dual_slot) + vs_inputs &= ~BITFIELD64_BIT(first + 1); brw->vb.enabled[brw->vb.nr_enabled++] = input; } @@ -488,7 +591,7 @@ for (i = j = 0; i < brw->vb.nr_enabled; i++) { struct brw_vertex_element *input = brw->vb.enabled[i]; - const struct gl_client_array *glarray = input->glarray; + const struct gl_vertex_array *glarray = input->glarray; if (_mesa_is_bufferobj(glarray->BufferObj)) { struct intel_buffer_object *intel_buffer = @@ -520,7 +623,7 @@ */ unsigned k; for (k = 0; k < i; k++) { - const struct gl_client_array *other = brw->vb.enabled[k]->glarray; + const struct gl_vertex_array *other = brw->vb.enabled[k]->glarray; if (glarray->BufferObj == other->BufferObj && glarray->StrideB == other->StrideB && glarray->InstanceDivisor == other->InstanceDivisor && @@ -552,17 +655,6 @@ input->buffer = j++; input->offset = 0; } - - /* This is a common place to reach if the user mistakenly supplies - * a pointer in place of a VBO offset. If we just let it go through, - * we may end up dereferencing a pointer beyond the bounds of the - * GTT. - * - * The VBO spec allows application termination in this case, and it's - * probably a service to the poor programmer to do so rather than - * trying to just not render. - */ - assert(input->offset < intel_buffer->Base.Size); } else { /* Queue the buffer object up to be uploaded in the next pass, * when we've decided if we're doing interleaved or not. @@ -676,16 +768,18 @@ void brw_prepare_shader_draw_parameters(struct brw_context *brw) { + const struct brw_vs_prog_data *vs_prog_data = + brw_vs_prog_data(brw->vs.base.prog_data); + /* For non-indirect draws, upload gl_BaseVertex. */ - if ((brw->vs.prog_data->uses_basevertex || - brw->vs.prog_data->uses_baseinstance) && + if ((vs_prog_data->uses_basevertex || vs_prog_data->uses_baseinstance) && brw->draw.draw_params_bo == NULL) { intel_upload_data(brw, &brw->draw.params, sizeof(brw->draw.params), 4, &brw->draw.draw_params_bo, &brw->draw.draw_params_offset); } - if (brw->vs.prog_data->uses_drawid) { + if (vs_prog_data->uses_drawid) { intel_upload_data(brw, &brw->draw.gl_drawid, sizeof(brw->draw.gl_drawid), 4, &brw->draw.draw_id_bo, &brw->draw.draw_id_offset); @@ -695,20 +789,22 @@ /** * Emit a VERTEX_BUFFER_STATE entry (part of 3DSTATE_VERTEX_BUFFERS). */ -static uint32_t * -emit_vertex_buffer_state(struct brw_context *brw, - unsigned buffer_nr, - drm_intel_bo *bo, - unsigned bo_ending_address, - unsigned bo_offset, - unsigned stride, - unsigned step_rate, - uint32_t *__map) +uint32_t * +brw_emit_vertex_buffer_state(struct brw_context *brw, + unsigned buffer_nr, + drm_intel_bo *bo, + unsigned start_offset, + unsigned end_offset, + unsigned stride, + unsigned step_rate, + uint32_t *__map) { struct gl_context *ctx = &brw->ctx; uint32_t dw0; - if (brw->gen >= 6) { + if (brw->gen >= 8) { + dw0 = buffer_nr << GEN6_VB0_INDEX_SHIFT; + } else if (brw->gen >= 6) { dw0 = (buffer_nr << GEN6_VB0_INDEX_SHIFT) | (step_rate ? GEN6_VB0_ACCESS_INSTANCEDATA : GEN6_VB0_ACCESS_VERTEXDATA); @@ -721,24 +817,53 @@ if (brw->gen >= 7) dw0 |= GEN7_VB0_ADDRESS_MODIFYENABLE; - if (brw->gen == 7) + switch (brw->gen) { + case 7: dw0 |= GEN7_MOCS_L3 << 16; + break; + case 8: + dw0 |= BDW_MOCS_WB << 16; + break; + case 9: + dw0 |= SKL_MOCS_WB << 16; + break; + } WARN_ONCE(stride >= (brw->gen >= 5 ? 2048 : 2047), "VBO stride %d too large, bad rendering may occur\n", stride); OUT_BATCH(dw0 | (stride << BRW_VB0_PITCH_SHIFT)); - OUT_RELOC(bo, I915_GEM_DOMAIN_VERTEX, 0, bo_offset); - if (brw->gen >= 5) { - OUT_RELOC(bo, I915_GEM_DOMAIN_VERTEX, 0, bo_ending_address); + if (brw->gen >= 8) { + OUT_RELOC64(bo, I915_GEM_DOMAIN_VERTEX, 0, start_offset); + /* From the BSpec: 3D Pipeline Stages - 3D Pipeline Geometry - + * Vertex Fetch (VF) Stage - State + * + * Instead of "VBState.StartingBufferAddress + VBState.MaxIndex x + * VBState.BufferPitch", the address of the byte immediately beyond the + * last valid byte of the buffer is determined by + * "VBState.StartingBufferAddress + VBState.BufferSize". + */ + OUT_BATCH(end_offset - start_offset); + } else if (brw->gen >= 5) { + OUT_RELOC(bo, I915_GEM_DOMAIN_VERTEX, 0, start_offset); + /* From the BSpec: 3D Pipeline Stages - 3D Pipeline Geometry - + * Vertex Fetch (VF) Stage - State + * + * Instead of "VBState.StartingBufferAddress + VBState.MaxIndex x + * VBState.BufferPitch", the address of the byte immediately beyond the + * last valid byte of the buffer is determined by + * "VBState.EndAddress + 1". + */ + OUT_RELOC(bo, I915_GEM_DOMAIN_VERTEX, 0, end_offset - 1); + OUT_BATCH(step_rate); } else { + OUT_RELOC(bo, I915_GEM_DOMAIN_VERTEX, 0, start_offset); OUT_BATCH(0); + OUT_BATCH(step_rate); } - OUT_BATCH(step_rate); return __map; } -#define EMIT_VERTEX_BUFFER_STATE(...) __map = emit_vertex_buffer_state(__VA_ARGS__, __map) static void brw_emit_vertices(struct brw_context *brw) @@ -750,13 +875,28 @@ brw_emit_query_begin(brw); + const struct brw_vs_prog_data *vs_prog_data = + brw_vs_prog_data(brw->vs.base.prog_data); + unsigned nr_elements = brw->vb.nr_enabled; - if (brw->vs.prog_data->uses_vertexid || brw->vs.prog_data->uses_instanceid || - brw->vs.prog_data->uses_basevertex || brw->vs.prog_data->uses_baseinstance) + if (vs_prog_data->uses_vertexid || vs_prog_data->uses_instanceid || + vs_prog_data->uses_basevertex || vs_prog_data->uses_baseinstance) ++nr_elements; - if (brw->vs.prog_data->uses_drawid) + if (vs_prog_data->uses_drawid) nr_elements++; + /* If any of the formats of vb.enabled needs more that one upload, we need + * to add it to nr_elements */ + unsigned extra_uploads = 0; + for (unsigned i = 0; i < brw->vb.nr_enabled; i++) { + struct brw_vertex_element *input = brw->vb.enabled[i]; + uint32_t format = brw_get_vertex_surface_type(brw, input->glarray); + + if (uploads_needed(format) > 1) + extra_uploads++; + } + nr_elements += extra_uploads; + /* If the VS doesn't read any inputs (calculating vertex position from * a state variable for some reason, for example), emit a single pad * VERTEX_ELEMENT struct and bail. @@ -790,10 +930,10 @@ */ const bool uses_draw_params = - brw->vs.prog_data->uses_basevertex || - brw->vs.prog_data->uses_baseinstance; + vs_prog_data->uses_basevertex || + vs_prog_data->uses_baseinstance; const unsigned nr_buffers = brw->vb.nr_buffers + - uses_draw_params + brw->vs.prog_data->uses_drawid; + uses_draw_params + vs_prog_data->uses_drawid; if (nr_buffers) { if (brw->gen >= 6) { @@ -813,27 +953,26 @@ */ unsigned padding = (brw->gen <= 7 && !brw->is_baytrail && !brw->is_haswell) * 2; - EMIT_VERTEX_BUFFER_STATE(brw, i, buffer->bo, - buffer->offset + buffer->size + padding - 1, - buffer->offset, buffer->stride, - buffer->step_rate); + EMIT_VERTEX_BUFFER_STATE(brw, i, buffer->bo, buffer->offset, + buffer->offset + buffer->size + padding, + buffer->stride, buffer->step_rate); } if (uses_draw_params) { EMIT_VERTEX_BUFFER_STATE(brw, brw->vb.nr_buffers, brw->draw.draw_params_bo, - brw->draw.draw_params_bo->size - 1, brw->draw.draw_params_offset, + brw->draw.draw_params_bo->size, 0, /* stride */ 0); /* step rate */ } - if (brw->vs.prog_data->uses_drawid) { + if (vs_prog_data->uses_drawid) { EMIT_VERTEX_BUFFER_STATE(brw, brw->vb.nr_buffers + 1, brw->draw.draw_id_bo, - brw->draw.draw_id_bo->size - 1, brw->draw.draw_id_offset, + brw->draw.draw_id_bo->size, 0, /* stride */ 0); /* step rate */ } @@ -861,6 +1000,10 @@ uint32_t comp1 = BRW_VE1_COMPONENT_STORE_SRC; uint32_t comp2 = BRW_VE1_COMPONENT_STORE_SRC; uint32_t comp3 = BRW_VE1_COMPONENT_STORE_SRC; + unsigned num_uploads = 1; + unsigned c; + + num_uploads = uploads_needed(format); if (input == &brw->vb.inputs[VERT_ATTRIB_EDGEFLAG]) { /* Gen6+ passes edgeflag as sideband along with the vertex, instead @@ -873,58 +1016,71 @@ } } - switch (input->glarray->Size) { - case 0: comp0 = BRW_VE1_COMPONENT_STORE_0; - case 1: comp1 = BRW_VE1_COMPONENT_STORE_0; - case 2: comp2 = BRW_VE1_COMPONENT_STORE_0; - case 3: comp3 = input->glarray->Integer ? BRW_VE1_COMPONENT_STORE_1_INT - : BRW_VE1_COMPONENT_STORE_1_FLT; - break; - } + for (c = 0; c < num_uploads; c++) { + uint32_t upload_format = downsize_format_if_needed(format, c); + /* If we need more that one upload, the offset stride would be 128 + * bits (16 bytes), as for previous uploads we are using the full + * entry. */ + unsigned int offset = input->offset + c * 16; + int size = input->glarray->Size; + + if (is_passthru_format(format)) + size = upload_format_size(upload_format); + + switch (size) { + case 0: comp0 = BRW_VE1_COMPONENT_STORE_0; + case 1: comp1 = BRW_VE1_COMPONENT_STORE_0; + case 2: comp2 = BRW_VE1_COMPONENT_STORE_0; + case 3: comp3 = input->glarray->Integer + ? BRW_VE1_COMPONENT_STORE_1_INT + : BRW_VE1_COMPONENT_STORE_1_FLT; + break; + } - if (brw->gen >= 6) { - OUT_BATCH((input->buffer << GEN6_VE0_INDEX_SHIFT) | - GEN6_VE0_VALID | - (format << BRW_VE0_FORMAT_SHIFT) | - (input->offset << BRW_VE0_SRC_OFFSET_SHIFT)); - } else { - OUT_BATCH((input->buffer << BRW_VE0_INDEX_SHIFT) | - BRW_VE0_VALID | - (format << BRW_VE0_FORMAT_SHIFT) | - (input->offset << BRW_VE0_SRC_OFFSET_SHIFT)); - } + if (brw->gen >= 6) { + OUT_BATCH((input->buffer << GEN6_VE0_INDEX_SHIFT) | + GEN6_VE0_VALID | + (upload_format << BRW_VE0_FORMAT_SHIFT) | + (offset << BRW_VE0_SRC_OFFSET_SHIFT)); + } else { + OUT_BATCH((input->buffer << BRW_VE0_INDEX_SHIFT) | + BRW_VE0_VALID | + (upload_format << BRW_VE0_FORMAT_SHIFT) | + (offset << BRW_VE0_SRC_OFFSET_SHIFT)); + } - if (brw->gen >= 5) - OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) | - (comp1 << BRW_VE1_COMPONENT_1_SHIFT) | - (comp2 << BRW_VE1_COMPONENT_2_SHIFT) | - (comp3 << BRW_VE1_COMPONENT_3_SHIFT)); - else - OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) | - (comp1 << BRW_VE1_COMPONENT_1_SHIFT) | - (comp2 << BRW_VE1_COMPONENT_2_SHIFT) | - (comp3 << BRW_VE1_COMPONENT_3_SHIFT) | - ((i * 4) << BRW_VE1_DST_OFFSET_SHIFT)); + if (brw->gen >= 5) + OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) | + (comp1 << BRW_VE1_COMPONENT_1_SHIFT) | + (comp2 << BRW_VE1_COMPONENT_2_SHIFT) | + (comp3 << BRW_VE1_COMPONENT_3_SHIFT)); + else + OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) | + (comp1 << BRW_VE1_COMPONENT_1_SHIFT) | + (comp2 << BRW_VE1_COMPONENT_2_SHIFT) | + (comp3 << BRW_VE1_COMPONENT_3_SHIFT) | + ((i * 4) << BRW_VE1_DST_OFFSET_SHIFT)); + } } - if (brw->vs.prog_data->uses_vertexid || brw->vs.prog_data->uses_instanceid || - brw->vs.prog_data->uses_basevertex || brw->vs.prog_data->uses_baseinstance) { + if (vs_prog_data->uses_vertexid || vs_prog_data->uses_instanceid || + vs_prog_data->uses_basevertex || vs_prog_data->uses_baseinstance) { uint32_t dw0 = 0, dw1 = 0; uint32_t comp0 = BRW_VE1_COMPONENT_STORE_0; uint32_t comp1 = BRW_VE1_COMPONENT_STORE_0; uint32_t comp2 = BRW_VE1_COMPONENT_STORE_0; uint32_t comp3 = BRW_VE1_COMPONENT_STORE_0; - if (brw->vs.prog_data->uses_basevertex) + if (vs_prog_data->uses_basevertex) comp0 = BRW_VE1_COMPONENT_STORE_SRC; - if (brw->vs.prog_data->uses_baseinstance) + if (vs_prog_data->uses_baseinstance) comp1 = BRW_VE1_COMPONENT_STORE_SRC; - if (brw->vs.prog_data->uses_vertexid) + if (vs_prog_data->uses_vertexid) comp2 = BRW_VE1_COMPONENT_STORE_VID; - if (brw->vs.prog_data->uses_instanceid) + if (vs_prog_data->uses_instanceid) comp3 = BRW_VE1_COMPONENT_STORE_IID; dw1 = (comp0 << BRW_VE1_COMPONENT_0_SHIFT) | @@ -951,7 +1107,7 @@ OUT_BATCH(dw1); } - if (brw->vs.prog_data->uses_drawid) { + if (vs_prog_data->uses_drawid) { uint32_t dw0 = 0, dw1 = 0; dw1 = (BRW_VE1_COMPONENT_STORE_SRC << BRW_VE1_COMPONENT_0_SHIFT) | diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_eu.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_eu.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_eu.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_eu.c 2017-06-01 10:37:10.000000000 +0000 @@ -221,7 +221,7 @@ * the currently selected channel enable group untouched. */ void -brw_inst_set_compression(const struct brw_device_info *devinfo, +brw_inst_set_compression(const struct gen_device_info *devinfo, brw_inst *inst, bool on) { if (devinfo->gen >= 6) { @@ -253,7 +253,7 @@ * [group, group + exec_size) to the instruction passed as argument. */ void -brw_inst_set_group(const struct brw_device_info *devinfo, +brw_inst_set_group(const struct gen_device_info *devinfo, brw_inst *inst, unsigned group) { if (devinfo->gen >= 7) { @@ -318,7 +318,7 @@ /*********************************************************************** */ void -brw_init_codegen(const struct brw_device_info *devinfo, +brw_init_codegen(const struct gen_device_info *devinfo, struct brw_codegen *p, void *mem_ctx) { memset(p, 0, sizeof(*p)); @@ -366,7 +366,7 @@ } void -brw_disassemble(const struct brw_device_info *devinfo, +brw_disassemble(const struct gen_device_info *devinfo, void *assembly, int start, int end, FILE *out) { bool dump_hex = (INTEL_DEBUG & DEBUG_HEX) != 0; @@ -421,7 +421,7 @@ #define GEN_LE(gen) (GEN_LT(gen) | (gen)) static const struct opcode_desc opcode_10_descs[] = { - { .name = "dim", .nsrc = 0, .ndst = 0, .gens = GEN75 }, + { .name = "dim", .nsrc = 1, .ndst = 1, .gens = GEN75 }, { .name = "smov", .nsrc = 0, .ndst = 0, .gens = GEN_GE(GEN8) }, }; @@ -680,7 +680,7 @@ }; static enum gen -gen_from_devinfo(const struct brw_device_info *devinfo) +gen_from_devinfo(const struct gen_device_info *devinfo) { switch (devinfo->gen) { case 4: return devinfo->is_g4x ? GEN45 : GEN4; @@ -698,7 +698,7 @@ * hardware generation, or NULL if the opcode is not supported by the device. */ const struct opcode_desc * -brw_opcode_desc(const struct brw_device_info *devinfo, enum opcode opcode) +brw_opcode_desc(const struct gen_device_info *devinfo, enum opcode opcode) { if (opcode >= ARRAY_SIZE(opcode_descs)) return NULL; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_eu_compact.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_eu_compact.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_eu_compact.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_eu_compact.c 2017-06-01 10:37:10.000000000 +0000 @@ -670,7 +670,7 @@ static const uint16_t *src_index_table; static bool -set_control_index(const struct brw_device_info *devinfo, +set_control_index(const struct gen_device_info *devinfo, brw_compact_inst *dst, brw_inst *src) { uint32_t uncompacted = devinfo->gen >= 8 /* 17b/G45; 19b/IVB+ */ @@ -699,7 +699,7 @@ } static bool -set_datatype_index(const struct brw_device_info *devinfo, brw_compact_inst *dst, +set_datatype_index(const struct gen_device_info *devinfo, brw_compact_inst *dst, brw_inst *src) { uint32_t uncompacted = devinfo->gen >= 8 /* 18b/G45+; 21b/BDW+ */ @@ -720,7 +720,7 @@ } static bool -set_subreg_index(const struct brw_device_info *devinfo, brw_compact_inst *dst, +set_subreg_index(const struct gen_device_info *devinfo, brw_compact_inst *dst, brw_inst *src, bool is_immediate) { uint16_t uncompacted = /* 15b */ @@ -755,7 +755,7 @@ } static bool -set_src0_index(const struct brw_device_info *devinfo, +set_src0_index(const struct gen_device_info *devinfo, brw_compact_inst *dst, brw_inst *src) { uint16_t compacted; @@ -770,7 +770,7 @@ } static bool -set_src1_index(const struct brw_device_info *devinfo, brw_compact_inst *dst, +set_src1_index(const struct gen_device_info *devinfo, brw_compact_inst *dst, brw_inst *src, bool is_immediate) { uint16_t compacted; @@ -790,7 +790,7 @@ } static bool -set_3src_control_index(const struct brw_device_info *devinfo, +set_3src_control_index(const struct gen_device_info *devinfo, brw_compact_inst *dst, brw_inst *src) { assert(devinfo->gen >= 8); @@ -813,7 +813,7 @@ } static bool -set_3src_source_index(const struct brw_device_info *devinfo, +set_3src_source_index(const struct gen_device_info *devinfo, brw_compact_inst *dst, brw_inst *src) { assert(devinfo->gen >= 8); @@ -847,7 +847,7 @@ } static bool -has_unmapped_bits(const struct brw_device_info *devinfo, brw_inst *src) +has_unmapped_bits(const struct gen_device_info *devinfo, brw_inst *src) { /* EOT can only be mapped on a send if the src1 is an immediate */ if ((brw_inst_opcode(devinfo, src) == BRW_OPCODE_SENDC || @@ -878,7 +878,7 @@ } static bool -has_3src_unmapped_bits(const struct brw_device_info *devinfo, brw_inst *src) +has_3src_unmapped_bits(const struct gen_device_info *devinfo, brw_inst *src) { /* Check for three-source instruction bits that don't map to any of the * fields of the compacted instruction. All of them seem to be reserved @@ -900,7 +900,7 @@ } static bool -brw_try_compact_3src_instruction(const struct brw_device_info *devinfo, +brw_try_compact_3src_instruction(const struct gen_device_info *devinfo, brw_compact_inst *dst, brw_inst *src) { assert(devinfo->gen >= 8); @@ -961,7 +961,7 @@ * brw_compact_instructions(). */ bool -brw_try_compact_instruction(const struct brw_device_info *devinfo, +brw_try_compact_instruction(const struct gen_device_info *devinfo, brw_compact_inst *dst, brw_inst *src) { brw_compact_inst temp; @@ -1048,7 +1048,7 @@ } static void -set_uncompacted_control(const struct brw_device_info *devinfo, brw_inst *dst, +set_uncompacted_control(const struct gen_device_info *devinfo, brw_inst *dst, brw_compact_inst *src) { uint32_t uncompacted = @@ -1070,7 +1070,7 @@ } static void -set_uncompacted_datatype(const struct brw_device_info *devinfo, brw_inst *dst, +set_uncompacted_datatype(const struct gen_device_info *devinfo, brw_inst *dst, brw_compact_inst *src) { uint32_t uncompacted = @@ -1087,7 +1087,7 @@ } static void -set_uncompacted_subreg(const struct brw_device_info *devinfo, brw_inst *dst, +set_uncompacted_subreg(const struct gen_device_info *devinfo, brw_inst *dst, brw_compact_inst *src) { uint16_t uncompacted = @@ -1099,7 +1099,7 @@ } static void -set_uncompacted_src0(const struct brw_device_info *devinfo, brw_inst *dst, +set_uncompacted_src0(const struct gen_device_info *devinfo, brw_inst *dst, brw_compact_inst *src) { uint32_t compacted = brw_compact_inst_src0_index(devinfo, src); @@ -1109,7 +1109,7 @@ } static void -set_uncompacted_src1(const struct brw_device_info *devinfo, brw_inst *dst, +set_uncompacted_src1(const struct gen_device_info *devinfo, brw_inst *dst, brw_compact_inst *src, bool is_immediate) { if (is_immediate) { @@ -1125,7 +1125,7 @@ } static void -set_uncompacted_3src_control_index(const struct brw_device_info *devinfo, +set_uncompacted_3src_control_index(const struct gen_device_info *devinfo, brw_inst *dst, brw_compact_inst *src) { assert(devinfo->gen >= 8); @@ -1141,7 +1141,7 @@ } static void -set_uncompacted_3src_source_index(const struct brw_device_info *devinfo, +set_uncompacted_3src_source_index(const struct gen_device_info *devinfo, brw_inst *dst, brw_compact_inst *src) { assert(devinfo->gen >= 8); @@ -1166,7 +1166,7 @@ } static void -brw_uncompact_3src_instruction(const struct brw_device_info *devinfo, +brw_uncompact_3src_instruction(const struct gen_device_info *devinfo, brw_inst *dst, brw_compact_inst *src) { assert(devinfo->gen >= 8); @@ -1197,7 +1197,7 @@ } void -brw_uncompact_instruction(const struct brw_device_info *devinfo, brw_inst *dst, +brw_uncompact_instruction(const struct gen_device_info *devinfo, brw_inst *dst, brw_compact_inst *src) { memset(dst, 0, sizeof(*dst)); @@ -1254,7 +1254,7 @@ #undef uncompact } -void brw_debug_compact_uncompact(const struct brw_device_info *devinfo, +void brw_debug_compact_uncompact(const struct gen_device_info *devinfo, brw_inst *orig, brw_inst *uncompacted) { @@ -1291,7 +1291,7 @@ } static void -update_uip_jip(const struct brw_device_info *devinfo, brw_inst *insn, +update_uip_jip(const struct gen_device_info *devinfo, brw_inst *insn, int this_old_ip, int *compacted_counts) { /* JIP and UIP are in units of: @@ -1319,7 +1319,7 @@ } static void -update_gen4_jump_count(const struct brw_device_info *devinfo, brw_inst *insn, +update_gen4_jump_count(const struct gen_device_info *devinfo, brw_inst *insn, int this_old_ip, int *compacted_counts) { assert(devinfo->gen == 5 || devinfo->is_g4x); @@ -1342,7 +1342,7 @@ } void -brw_init_compaction_tables(const struct brw_device_info *devinfo) +brw_init_compaction_tables(const struct gen_device_info *devinfo) { static bool initialized; if (initialized || p_atomic_cmpxchg(&initialized, false, true) != false) @@ -1404,7 +1404,7 @@ if (unlikely(INTEL_DEBUG & DEBUG_NO_COMPACTION)) return; - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; void *store = p->store + start_offset / 16; /* For an instruction at byte offset 16*i before compaction, this is the * number of compacted instructions minus the number of padding NOP/NENOPs diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_eu_emit.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_eu_emit.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_eu_emit.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_eu_emit.c 2017-06-01 10:37:10.000000000 +0000 @@ -48,7 +48,7 @@ struct brw_reg *src, unsigned msg_reg_nr) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; if (devinfo->gen < 6) return; @@ -78,7 +78,7 @@ * Since we're pretending to have 16 MRFs anyway, we may as well use the * registers required for messages with EOT. */ - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; if (devinfo->gen >= 7 && reg->file == BRW_MESSAGE_REGISTER_FILE) { reg->file = BRW_GENERAL_REGISTER_FILE; reg->nr += GEN7_MRF_HACK_START; @@ -91,7 +91,7 @@ * The hardware encoding may depend on whether the value is an immediate. */ unsigned -brw_reg_type_to_hw_type(const struct brw_device_info *devinfo, +brw_reg_type_to_hw_type(const struct gen_device_info *devinfo, enum brw_reg_type type, enum brw_reg_file file) { if (file == BRW_IMMEDIATE_VALUE) { @@ -144,7 +144,7 @@ void brw_set_dest(struct brw_codegen *p, brw_inst *inst, struct brw_reg dest) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; if (dest.file == BRW_MESSAGE_REGISTER_FILE) assert((dest.nr & ~BRW_MRF_COMPR4) < BRW_MAX_MRF(devinfo->gen)); @@ -222,7 +222,7 @@ extern int reg_type_size[]; static void -validate_reg(const struct brw_device_info *devinfo, +validate_reg(const struct gen_device_info *devinfo, brw_inst *inst, struct brw_reg reg) { const int hstride_for_reg[] = {0, 1, 2, 4}; @@ -320,7 +320,7 @@ void brw_set_src0(struct brw_codegen *p, brw_inst *inst, struct brw_reg reg) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; if (reg.file == BRW_MESSAGE_REGISTER_FILE) assert((reg.nr & ~BRW_MRF_COMPR4) < BRW_MAX_MRF(devinfo->gen)); @@ -350,7 +350,8 @@ brw_inst_set_src0_address_mode(devinfo, inst, reg.address_mode); if (reg.file == BRW_IMMEDIATE_VALUE) { - if (reg.type == BRW_REGISTER_TYPE_DF) + if (reg.type == BRW_REGISTER_TYPE_DF || + brw_inst_opcode(devinfo, inst) == BRW_OPCODE_DIM) brw_inst_set_imm_df(devinfo, inst, reg.df); else brw_inst_set_imm_ud(devinfo, inst, reg.ud); @@ -472,7 +473,7 @@ void brw_set_src1(struct brw_codegen *p, brw_inst *inst, struct brw_reg reg) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; if (reg.file != BRW_ARCHITECTURE_REGISTER_FILE) assert(reg.nr < 128); @@ -567,7 +568,7 @@ bool header_present, bool end_of_thread) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; brw_set_src1(p, inst, brw_imm_d(0)); @@ -599,7 +600,7 @@ bool low_precision, unsigned dataType ) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; unsigned msg_length; unsigned response_length; @@ -645,7 +646,7 @@ unsigned response_length, bool end_of_thread) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; brw_set_message_descriptor(p, insn, BRW_SFID_URB, 1, response_length, true, end_of_thread); @@ -666,7 +667,7 @@ unsigned offset, unsigned swizzle_control ) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; assert(devinfo->gen < 7 || swizzle_control != BRW_URB_SWIZZLE_TRANSPOSE); assert(devinfo->gen < 7 || !(flags & BRW_URB_WRITE_ALLOCATE)); @@ -705,6 +706,7 @@ unsigned binding_table_index, unsigned msg_control, unsigned msg_type, + unsigned target_cache, unsigned msg_length, bool header_present, unsigned last_render_target, @@ -712,21 +714,9 @@ unsigned end_of_thread, unsigned send_commit_msg) { - const struct brw_device_info *devinfo = p->devinfo; - unsigned sfid; - - if (devinfo->gen >= 7) { - /* Use the Render Cache for RT writes; otherwise use the Data Cache */ - if (msg_type == GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE) - sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; - else - sfid = GEN7_SFID_DATAPORT_DATA_CACHE; - } else if (devinfo->gen == 6) { - /* Use the render cache for all write messages. */ - sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; - } else { - sfid = BRW_SFID_DATAPORT_WRITE; - } + const struct gen_device_info *devinfo = p->devinfo; + const unsigned sfid = (devinfo->gen >= 6 ? target_cache : + BRW_SFID_DATAPORT_WRITE); brw_set_message_descriptor(p, insn, sfid, msg_length, response_length, header_present, end_of_thread); @@ -751,19 +741,9 @@ bool header_present, unsigned response_length) { - const struct brw_device_info *devinfo = p->devinfo; - unsigned sfid; - - if (devinfo->gen >= 7) { - sfid = GEN7_SFID_DATAPORT_DATA_CACHE; - } else if (devinfo->gen == 6) { - if (target_cache == BRW_DATAPORT_READ_TARGET_RENDER_CACHE) - sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; - else - sfid = GEN6_SFID_DATAPORT_SAMPLER_CACHE; - } else { - sfid = BRW_SFID_DATAPORT_READ; - } + const struct gen_device_info *devinfo = p->devinfo; + const unsigned sfid = (devinfo->gen >= 6 ? target_cache : + BRW_SFID_DATAPORT_READ); brw_set_message_descriptor(p, insn, sfid, msg_length, response_length, header_present, false); @@ -787,7 +767,7 @@ unsigned simd_mode, unsigned return_format) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; brw_set_message_descriptor(p, inst, BRW_SFID_SAMPLER, msg_length, response_length, header_present, false); @@ -814,7 +794,7 @@ unsigned rlen, bool header_present) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; assert(num_regs == 1 || num_regs == 2 || num_regs == 4 || (devinfo->gen >= 8 && num_regs == 8)); const unsigned block_size = (devinfo->gen >= 8 ? _mesa_logbase2(num_regs) : @@ -834,7 +814,7 @@ brw_inst * brw_next_insn(struct brw_codegen *p, unsigned opcode) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; brw_inst *insn; if (p->nr_insn + 1 > p->store_size) { @@ -889,7 +869,7 @@ brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1, struct brw_reg src2) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; brw_inst *inst = next_insn(p, opcode); gen7_convert_mrf_to_grf(p, &dest); @@ -1041,7 +1021,7 @@ struct brw_reg dest, \ struct brw_reg src) \ { \ - const struct brw_device_info *devinfo = p->devinfo; \ + const struct gen_device_info *devinfo = p->devinfo; \ brw_inst *rnd, *add; \ rnd = next_insn(p, BRW_OPCODE_##OP); \ brw_set_dest(p, rnd, dest); \ @@ -1064,6 +1044,7 @@ ALU2(XOR) ALU2(SHR) ALU2(SHL) +ALU1(DIM) ALU2(ASR) ALU1(FRC) ALU1(RNDD) @@ -1193,7 +1174,7 @@ brw_inst * brw_F32TO16(struct brw_codegen *p, struct brw_reg dst, struct brw_reg src) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; const bool align16 = brw_inst_access_mode(devinfo, p->current) == BRW_ALIGN_16; /* The F32TO16 instruction doesn't support 32-bit destination types in * Align1 mode, and neither does the Gen8 implementation in terms of a @@ -1240,7 +1221,7 @@ brw_inst * brw_F16TO32(struct brw_codegen *p, struct brw_reg dst, struct brw_reg src) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; bool align16 = brw_inst_access_mode(devinfo, p->current) == BRW_ALIGN_16; if (align16) { @@ -1272,10 +1253,8 @@ void brw_NOP(struct brw_codegen *p) { brw_inst *insn = next_insn(p, BRW_OPCODE_NOP); - brw_inst_set_exec_size(p->devinfo, insn, BRW_EXECUTE_1); - brw_set_dest(p, insn, retype(brw_vec1_grf(0,0), BRW_REGISTER_TYPE_UD)); - brw_set_src0(p, insn, retype(brw_vec1_grf(0,0), BRW_REGISTER_TYPE_UD)); - brw_set_src1(p, insn, brw_imm_ud(0x0)); + memset(insn, 0, sizeof(*insn)); + brw_inst_set_opcode(p->devinfo, insn, BRW_OPCODE_NOP); } @@ -1290,7 +1269,7 @@ brw_JMPI(struct brw_codegen *p, struct brw_reg index, unsigned predicate_control) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; struct brw_reg ip = brw_ip_reg(); brw_inst *inst = brw_alu2(p, BRW_OPCODE_JMPI, ip, ip, index); @@ -1360,7 +1339,7 @@ brw_inst * brw_IF(struct brw_codegen *p, unsigned execute_size) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; brw_inst *insn; insn = next_insn(p, BRW_OPCODE_IF); @@ -1408,7 +1387,7 @@ gen6_IF(struct brw_codegen *p, enum brw_conditional_mod conditional, struct brw_reg src0, struct brw_reg src1) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; brw_inst *insn; insn = next_insn(p, BRW_OPCODE_IF); @@ -1435,7 +1414,7 @@ convert_IF_ELSE_to_ADD(struct brw_codegen *p, brw_inst *if_inst, brw_inst *else_inst) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; /* The next instruction (where the ENDIF would be, if it existed) */ brw_inst *next_inst = &p->store[p->nr_insn]; @@ -1476,7 +1455,7 @@ patch_IF_ELSE(struct brw_codegen *p, brw_inst *if_inst, brw_inst *else_inst, brw_inst *endif_inst) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; /* We shouldn't be patching IF and ELSE instructions in single program flow * mode when gen < 6, because in single program flow mode on those @@ -1563,7 +1542,7 @@ void brw_ELSE(struct brw_codegen *p) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; brw_inst *insn; insn = next_insn(p, BRW_OPCODE_ELSE); @@ -1601,7 +1580,7 @@ void brw_ENDIF(struct brw_codegen *p) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; brw_inst *insn = NULL; brw_inst *else_inst = NULL; brw_inst *if_inst = NULL; @@ -1682,7 +1661,7 @@ brw_inst * brw_BREAK(struct brw_codegen *p) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; brw_inst *insn; insn = next_insn(p, BRW_OPCODE_BREAK); @@ -1710,7 +1689,7 @@ brw_inst * brw_CONT(struct brw_codegen *p) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; brw_inst *insn; insn = next_insn(p, BRW_OPCODE_CONTINUE); @@ -1735,7 +1714,7 @@ brw_inst * gen6_HALT(struct brw_codegen *p) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; brw_inst *insn; insn = next_insn(p, BRW_OPCODE_HALT); @@ -1772,7 +1751,7 @@ brw_inst * brw_DO(struct brw_codegen *p, unsigned execute_size) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; if (devinfo->gen >= 6 || p->single_program_flow) { push_loop_stack(p, &p->store[p->nr_insn]); @@ -1806,7 +1785,7 @@ static void brw_patch_break_cont(struct brw_codegen *p, brw_inst *while_inst) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; brw_inst *do_inst = get_inner_do_insn(p); brw_inst *inst; unsigned br = brw_jump_scale(devinfo); @@ -1831,7 +1810,7 @@ brw_inst * brw_WHILE(struct brw_codegen *p) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; brw_inst *insn, *do_insn; unsigned br = brw_jump_scale(devinfo); @@ -1895,7 +1874,7 @@ */ void brw_land_fwd_jump(struct brw_codegen *p, int jmp_insn_idx) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; brw_inst *jmp_insn = &p->store[jmp_insn_idx]; unsigned jmpi = 1; @@ -1919,7 +1898,7 @@ struct brw_reg src0, struct brw_reg src1) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; brw_inst *insn = next_insn(p, BRW_OPCODE_CMP); brw_inst_set_cond_modifier(devinfo, insn, conditional); @@ -1955,7 +1934,7 @@ struct brw_reg src, unsigned precision ) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; brw_inst *insn = next_insn(p, BRW_OPCODE_SEND); unsigned data_type; if (has_scalar_region(src)) { @@ -1988,7 +1967,7 @@ struct brw_reg src0, struct brw_reg src1) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; brw_inst *insn = next_insn(p, BRW_OPCODE_MATH); assert(devinfo->gen >= 6); @@ -2064,7 +2043,11 @@ int num_regs, unsigned offset) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; + const unsigned target_cache = + (devinfo->gen >= 7 ? GEN7_SFID_DATAPORT_DATA_CACHE : + devinfo->gen >= 6 ? GEN6_SFID_DATAPORT_RENDER_CACHE : + BRW_DATAPORT_READ_TARGET_RENDER_CACHE); uint32_t msg_type; if (devinfo->gen >= 6) @@ -2073,11 +2056,6 @@ mrf = retype(mrf, BRW_REGISTER_TYPE_UD); const unsigned mlen = 1 + num_regs; - const unsigned msg_control = - (num_regs == 1 ? BRW_DATAPORT_OWORD_BLOCK_2_OWORDS : - num_regs == 2 ? BRW_DATAPORT_OWORD_BLOCK_4_OWORDS : - num_regs == 4 ? BRW_DATAPORT_OWORD_BLOCK_8_OWORDS : 0); - assert(msg_control); /* Set up the message header. This is g0, with g0.2 filled with * the offset. We don't want to leave our offset around in g0 or @@ -2151,8 +2129,9 @@ brw_set_dp_write_message(p, insn, brw_scratch_surface_idx(p), - msg_control, + BRW_DATAPORT_OWORD_BLOCK_DWORDS(num_regs * 8), msg_type, + target_cache, mlen, true, /* header_present */ 0, /* not a render target */ @@ -2177,7 +2156,7 @@ int num_regs, unsigned offset) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; if (devinfo->gen >= 6) offset /= 16; @@ -2197,11 +2176,10 @@ dest = retype(dest, BRW_REGISTER_TYPE_UW); const unsigned rlen = num_regs; - const unsigned msg_control = - (num_regs == 1 ? BRW_DATAPORT_OWORD_BLOCK_2_OWORDS : - num_regs == 2 ? BRW_DATAPORT_OWORD_BLOCK_4_OWORDS : - num_regs == 4 ? BRW_DATAPORT_OWORD_BLOCK_8_OWORDS : 0); - assert(msg_control); + const unsigned target_cache = + (devinfo->gen >= 7 ? GEN7_SFID_DATAPORT_DATA_CACHE : + devinfo->gen >= 6 ? GEN6_SFID_DATAPORT_RENDER_CACHE : + BRW_DATAPORT_READ_TARGET_RENDER_CACHE); { brw_push_insn_state(p); @@ -2234,9 +2212,9 @@ brw_set_dp_read_message(p, insn, brw_scratch_surface_idx(p), - msg_control, + BRW_DATAPORT_OWORD_BLOCK_DWORDS(num_regs * 8), BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ, /* msg_type */ - BRW_DATAPORT_READ_TARGET_RENDER_CACHE, + target_cache, 1, /* msg_length */ true, /* header_present */ rlen); @@ -2249,9 +2227,8 @@ int num_regs, unsigned offset) { - const struct brw_device_info *devinfo = p->devinfo; brw_inst *insn = next_insn(p, BRW_OPCODE_SEND); - assert(brw_inst_pred_control(devinfo, insn) == BRW_PREDICATE_NONE); + assert(brw_inst_pred_control(p->devinfo, insn) == BRW_PREDICATE_NONE); brw_set_dest(p, insn, retype(dest, BRW_REGISTER_TYPE_UW)); @@ -2279,7 +2256,7 @@ } /** - * Read a float[4] vector from the data port Data Cache (const buffer). + * Read float[4] vectors from the data port constant cache. * Location (in buffer) should be a multiple of 16. * Used for fetching shader constants. */ @@ -2289,7 +2266,11 @@ uint32_t offset, uint32_t bind_table_index) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; + const unsigned target_cache = + (devinfo->gen >= 6 ? GEN6_SFID_DATAPORT_CONSTANT_CACHE : + BRW_DATAPORT_READ_TARGET_DATA_CACHE); + const unsigned exec_size = 1 << brw_inst_exec_size(devinfo, p->current); /* On newer hardware, offset is in units of owords. */ if (devinfo->gen >= 6) @@ -2298,11 +2279,12 @@ mrf = retype(mrf, BRW_REGISTER_TYPE_UD); brw_push_insn_state(p); - brw_set_default_exec_size(p, BRW_EXECUTE_8); brw_set_default_predicate_control(p, BRW_PREDICATE_NONE); brw_set_default_compression_control(p, BRW_COMPRESSION_NONE); brw_set_default_mask_control(p, BRW_MASK_DISABLE); + brw_push_insn_state(p); + brw_set_default_exec_size(p, BRW_EXECUTE_8); brw_MOV(p, mrf, retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UD)); /* set message header global offset field (reg 0, element 2) */ @@ -2311,6 +2293,7 @@ mrf.nr, 2), BRW_REGISTER_TYPE_UD), brw_imm_ud(offset)); + brw_pop_insn_state(p); brw_inst *insn = next_insn(p, BRW_OPCODE_SEND); @@ -2325,15 +2308,13 @@ brw_inst_set_base_mrf(devinfo, insn, mrf.nr); } - brw_set_dp_read_message(p, - insn, - bind_table_index, - BRW_DATAPORT_OWORD_BLOCK_1_OWORDLOW, + brw_set_dp_read_message(p, insn, bind_table_index, + BRW_DATAPORT_OWORD_BLOCK_DWORDS(exec_size), BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ, - BRW_DATAPORT_READ_TARGET_DATA_CACHE, + target_cache, 1, /* msg_length */ true, /* header_present */ - 1); /* response_length (1 reg, 2 owords!) */ + DIV_ROUND_UP(exec_size, 8)); /* response_length */ brw_pop_insn_state(p); } @@ -2350,7 +2331,10 @@ bool last_render_target, bool header_present) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; + const unsigned target_cache = + (devinfo->gen >= 6 ? GEN6_SFID_DATAPORT_RENDER_CACHE : + BRW_DATAPORT_READ_TARGET_RENDER_CACHE); brw_inst *insn; unsigned msg_type; struct brw_reg dest, src0; @@ -2387,6 +2371,7 @@ binding_table_index, msg_control, msg_type, + target_cache, msg_length, header_present, last_render_target, @@ -2395,6 +2380,34 @@ 0 /* send_commit_msg */); } +brw_inst * +gen9_fb_READ(struct brw_codegen *p, + struct brw_reg dst, + struct brw_reg payload, + unsigned binding_table_index, + unsigned msg_length, + unsigned response_length, + bool per_sample) +{ + const struct gen_device_info *devinfo = p->devinfo; + assert(devinfo->gen >= 9); + const unsigned msg_subtype = + brw_inst_exec_size(devinfo, p->current) == BRW_EXECUTE_16 ? 0 : 1; + brw_inst *insn = next_insn(p, BRW_OPCODE_SENDC); + + brw_set_dest(p, insn, dst); + brw_set_src0(p, insn, payload); + brw_set_dp_read_message(p, insn, binding_table_index, + per_sample << 5 | msg_subtype, + GEN9_DATAPORT_RC_RENDER_TARGET_READ, + GEN6_SFID_DATAPORT_RENDER_CACHE, + msg_length, true /* header_present */, + response_length); + brw_inst_set_rt_slot_group(devinfo, insn, + brw_inst_qtr_control(devinfo, p->current) / 2); + + return insn; +} /** * Texture sample instruction. @@ -2414,7 +2427,7 @@ unsigned simd_mode, unsigned return_format) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; brw_inst *insn; if (msg_reg_nr != -1) @@ -2469,7 +2482,7 @@ * exclusively use the offset - we have to use both. */ - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; if (sampler_index.file == BRW_IMMEDIATE_VALUE) { const int sampler_state_size = 16; /* 16 bytes */ @@ -2513,7 +2526,7 @@ unsigned offset, unsigned swizzle) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; brw_inst *insn; gen6_resolve_implied_move(p, &src0, msg_reg_nr); @@ -2557,7 +2570,7 @@ struct brw_reg payload, struct brw_reg desc) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; struct brw_inst *send; int setup; @@ -2617,7 +2630,7 @@ unsigned response_len, bool header_present) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; struct brw_inst *insn; if (surface.file != BRW_IMMEDIATE_VALUE) { @@ -2650,7 +2663,7 @@ } static bool -while_jumps_before_offset(const struct brw_device_info *devinfo, +while_jumps_before_offset(const struct gen_device_info *devinfo, brw_inst *insn, int while_offset, int start_offset) { int scale = 16 / brw_jump_scale(devinfo); @@ -2665,7 +2678,7 @@ { int offset; void *store = p->store; - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; int depth = 0; @@ -2707,7 +2720,7 @@ static int brw_find_loop_end(struct brw_codegen *p, int start_offset) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; int offset; void *store = p->store; @@ -2734,9 +2747,9 @@ * BREAK, CONT, and HALT instructions to their correct locations. */ void -brw_set_uip_jip(struct brw_codegen *p) +brw_set_uip_jip(struct brw_codegen *p, int start_offset) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; int offset; int br = brw_jump_scale(devinfo); int scale = 16 / br; @@ -2745,17 +2758,9 @@ if (devinfo->gen < 6) return; - for (offset = 0; offset < p->next_insn_offset; - offset = next_offset(devinfo, store, offset)) { + for (offset = start_offset; offset < p->next_insn_offset; offset += 16) { brw_inst *insn = store + offset; - - if (brw_inst_cmpt_control(devinfo, insn)) { - /* Fixups for compacted BREAK/CONTINUE not supported yet. */ - assert(brw_inst_opcode(devinfo, insn) != BRW_OPCODE_BREAK && - brw_inst_opcode(devinfo, insn) != BRW_OPCODE_CONTINUE && - brw_inst_opcode(devinfo, insn) != BRW_OPCODE_HALT); - continue; - } + assert(brw_inst_cmpt_control(devinfo, insn) == 0); int block_end_offset = brw_find_next_block_end(p, offset); switch (brw_inst_opcode(devinfo, insn)) { @@ -2819,7 +2824,7 @@ unsigned response_length, bool eot) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; brw_inst *insn; gen6_resolve_implied_move(p, &src0, msg_reg_nr); @@ -2858,6 +2863,11 @@ unsigned binding_table_index, bool send_commit_msg) { + const struct gen_device_info *devinfo = p->devinfo; + const unsigned target_cache = + (devinfo->gen >= 7 ? GEN7_SFID_DATAPORT_DATA_CACHE : + devinfo->gen >= 6 ? GEN6_SFID_DATAPORT_RENDER_CACHE : + BRW_DATAPORT_READ_TARGET_RENDER_CACHE); brw_inst *insn; gen6_resolve_implied_move(p, &src0, msg_reg_nr); @@ -2870,6 +2880,7 @@ binding_table_index, 0, /* msg_control: ignored */ GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE, + target_cache, 1, /* msg_length */ true, /* header_present */ 0, /* last_render_target: ignored */ @@ -2900,14 +2911,14 @@ unsigned atomic_op, bool response_expected) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; unsigned msg_control = atomic_op | /* Atomic Operation Type: BRW_AOP_* */ (response_expected ? 1 << 5 : 0); /* Return data expected */ if (devinfo->gen >= 8 || devinfo->is_haswell) { if (brw_inst_access_mode(devinfo, p->current) == BRW_ALIGN_1) { - if (brw_inst_exec_size(devinfo, p->current) == BRW_EXECUTE_8) + if (brw_inst_exec_size(devinfo, p->current) != BRW_EXECUTE_16) msg_control |= 1 << 4; /* SIMD8 mode */ brw_inst_set_dp_msg_type(devinfo, insn, @@ -2920,7 +2931,7 @@ brw_inst_set_dp_msg_type(devinfo, insn, GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP); - if (brw_inst_exec_size(devinfo, p->current) == BRW_EXECUTE_8) + if (brw_inst_exec_size(devinfo, p->current) != BRW_EXECUTE_16) msg_control |= 1 << 4; /* SIMD8 mode */ } @@ -2936,7 +2947,7 @@ unsigned msg_length, bool response_expected) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; const unsigned sfid = (devinfo->gen >= 8 || devinfo->is_haswell ? HSW_SFID_DATAPORT_DATA_CACHE_1 : GEN7_SFID_DATAPORT_DATA_CACHE); @@ -2963,7 +2974,7 @@ struct brw_inst *insn, unsigned num_channels) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; /* Set mask of 32-bit channels to drop. */ unsigned msg_control = 0xf & (0xf << num_channels); @@ -2989,7 +3000,7 @@ unsigned msg_length, unsigned num_channels) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; const unsigned sfid = (devinfo->gen >= 8 || devinfo->is_haswell ? HSW_SFID_DATAPORT_DATA_CACHE_1 : GEN7_SFID_DATAPORT_DATA_CACHE); @@ -3007,7 +3018,7 @@ struct brw_inst *insn, unsigned num_channels) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; /* Set mask of 32-bit channels to drop. */ unsigned msg_control = 0xf & (0xf << num_channels); @@ -3037,7 +3048,7 @@ unsigned msg_length, unsigned num_channels) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; const unsigned sfid = (devinfo->gen >= 8 || devinfo->is_haswell ? HSW_SFID_DATAPORT_DATA_CACHE_1 : GEN7_SFID_DATAPORT_DATA_CACHE); @@ -3059,7 +3070,7 @@ unsigned atomic_op, bool response_expected) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; unsigned msg_control = atomic_op | /* Atomic Operation Type: BRW_AOP_* */ (response_expected ? 1 << 5 : 0); /* Return data expected */ @@ -3095,7 +3106,7 @@ unsigned atomic_op, unsigned msg_length, bool response_expected) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; const unsigned sfid = (devinfo->gen >= 8 || devinfo->is_haswell ? HSW_SFID_DATAPORT_DATA_CACHE_1 : GEN6_SFID_DATAPORT_RENDER_CACHE); @@ -3117,7 +3128,7 @@ struct brw_inst *insn, unsigned num_channels) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; /* Set mask of unused channels. */ unsigned msg_control = 0xf & (0xf << num_channels); @@ -3152,7 +3163,7 @@ unsigned msg_length, unsigned num_channels) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; const unsigned sfid = (devinfo->gen >= 8 || devinfo->is_haswell ? HSW_SFID_DATAPORT_DATA_CACHE_1 : GEN6_SFID_DATAPORT_RENDER_CACHE); @@ -3171,7 +3182,7 @@ struct brw_inst *insn, unsigned num_channels) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; /* Set mask of unused channels. */ unsigned msg_control = 0xf & (0xf << num_channels); @@ -3206,7 +3217,7 @@ unsigned msg_length, unsigned num_channels) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; const unsigned sfid = (devinfo->gen >= 8 || devinfo->is_haswell ? HSW_SFID_DATAPORT_DATA_CACHE_1 : GEN6_SFID_DATAPORT_RENDER_CACHE); @@ -3228,7 +3239,7 @@ enum brw_message_target sfid, bool commit_enable) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; brw_set_message_descriptor(p, insn, sfid, 1 /* message length */, @@ -3255,7 +3266,7 @@ brw_memory_fence(struct brw_codegen *p, struct brw_reg dst) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; const bool commit_enable = devinfo->gen == 7 && !devinfo->is_haswell; struct brw_inst *insn; @@ -3306,7 +3317,7 @@ unsigned msg_length, unsigned response_length) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; struct brw_inst *insn; const uint16_t exec_size = brw_inst_exec_size(devinfo, p->current); @@ -3328,14 +3339,16 @@ } void -brw_find_live_channel(struct brw_codegen *p, struct brw_reg dst) +brw_find_live_channel(struct brw_codegen *p, struct brw_reg dst, + struct brw_reg mask) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; const unsigned exec_size = 1 << brw_inst_exec_size(devinfo, p->current); const unsigned qtr_control = brw_inst_qtr_control(devinfo, p->current); brw_inst *inst; assert(devinfo->gen >= 7); + assert(mask.type == BRW_REGISTER_TYPE_UD); brw_push_insn_state(p); @@ -3344,18 +3357,32 @@ if (devinfo->gen >= 8) { /* Getting the first active channel index is easy on Gen8: Just find - * the first bit set in the mask register. The same register exists - * on HSW already but it reads back as all ones when the current + * the first bit set in the execution mask. The register exists on + * HSW already but it reads back as all ones when the current * instruction has execution masking disabled, so it's kind of * useless. */ - inst = brw_FBL(p, vec1(dst), - retype(brw_mask_reg(0), BRW_REGISTER_TYPE_UD)); + struct brw_reg exec_mask = + retype(brw_mask_reg(0), BRW_REGISTER_TYPE_UD); + + if (mask.file != BRW_IMMEDIATE_VALUE || mask.ud != 0xffffffff) { + /* Unfortunately, ce0 does not take into account the thread + * dispatch mask, which may be a problem in cases where it's not + * tightly packed (i.e. it doesn't have the form '2^n - 1' for + * some n). Combine ce0 with the given dispatch (or vector) mask + * to mask off those channels which were never dispatched by the + * hardware. + */ + brw_SHR(p, vec1(dst), mask, brw_imm_ud(qtr_control * 8)); + brw_AND(p, vec1(dst), exec_mask, vec1(dst)); + exec_mask = vec1(dst); + } /* Quarter control has the effect of magically shifting the value of - * this register so you'll get the first active channel relative to - * the specified quarter control as result. + * ce0 so you'll get the first active channel relative to the + * specified quarter control as result. */ + inst = brw_FBL(p, vec1(dst), exec_mask); } else { const struct brw_reg flag = brw_flag_reg(1, 0); @@ -3389,9 +3416,14 @@ } else { brw_set_default_mask_control(p, BRW_MASK_DISABLE); - if (devinfo->gen >= 8) { + if (devinfo->gen >= 8 && + mask.file == BRW_IMMEDIATE_VALUE && mask.ud == 0xffffffff) { /* In SIMD4x2 mode the first active channel index is just the - * negation of the first bit of the mask register. + * negation of the first bit of the mask register. Note that ce0 + * doesn't take into account the dispatch mask, so the Gen7 path + * should be used instead unless you have the guarantee that the + * dispatch mask is tightly packed (i.e. it has the form '2^n - 1' + * for some n). */ inst = brw_AND(p, brw_writemask(dst, WRITEMASK_X), negate(retype(brw_mask_reg(0), BRW_REGISTER_TYPE_UD)), @@ -3422,7 +3454,7 @@ struct brw_reg src, struct brw_reg idx) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; const bool align1 = brw_inst_access_mode(devinfo, p->current) == BRW_ALIGN_1; brw_inst *inst; @@ -3550,11 +3582,13 @@ void brw_barrier(struct brw_codegen *p, struct brw_reg src) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; struct brw_inst *inst; assert(devinfo->gen >= 7); + brw_push_insn_state(p); + brw_set_default_access_mode(p, BRW_ALIGN_1); inst = next_insn(p, BRW_OPCODE_SEND); brw_set_dest(p, inst, retype(brw_null_reg(), BRW_REGISTER_TYPE_UW)); brw_set_src0(p, inst, src); @@ -3571,6 +3605,7 @@ BRW_MESSAGE_GATEWAY_SFID_BARRIER_MSG); brw_inst_set_mask_control(devinfo, inst, BRW_MASK_DISABLE); + brw_pop_insn_state(p); } @@ -3580,7 +3615,7 @@ void brw_WAIT(struct brw_codegen *p) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; struct brw_inst *insn; struct brw_reg src = brw_notification_reg(); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_eu.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_eu.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_eu.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_eu.h 2017-06-01 10:37:10.000000000 +0000 @@ -66,7 +66,7 @@ brw_inst *current; bool single_program_flow; - const struct brw_device_info *devinfo; + const struct gen_device_info *devinfo; /* Control flow stacks: * - if_stack contains IF and ELSE instructions which must be patched @@ -100,10 +100,10 @@ void brw_set_default_mask_control( struct brw_codegen *p, unsigned value ); void brw_set_default_saturate( struct brw_codegen *p, bool enable ); void brw_set_default_access_mode( struct brw_codegen *p, unsigned access_mode ); -void brw_inst_set_compression(const struct brw_device_info *devinfo, +void brw_inst_set_compression(const struct gen_device_info *devinfo, brw_inst *inst, bool on); void brw_set_default_compression(struct brw_codegen *p, bool on); -void brw_inst_set_group(const struct brw_device_info *devinfo, +void brw_inst_set_group(const struct gen_device_info *devinfo, brw_inst *inst, unsigned group); void brw_set_default_group(struct brw_codegen *p, unsigned group); void brw_set_default_compression_control(struct brw_codegen *p, enum brw_compression c); @@ -112,9 +112,9 @@ void brw_set_default_flag_reg(struct brw_codegen *p, int reg, int subreg); void brw_set_default_acc_write_control(struct brw_codegen *p, unsigned value); -void brw_init_codegen(const struct brw_device_info *, struct brw_codegen *p, +void brw_init_codegen(const struct gen_device_info *, struct brw_codegen *p, void *mem_ctx); -void brw_disassemble(const struct brw_device_info *devinfo, void *assembly, +void brw_disassemble(const struct gen_device_info *devinfo, void *assembly, int start, int end, FILE *out); const unsigned *brw_get_program( struct brw_codegen *p, unsigned *sz ); @@ -157,6 +157,7 @@ ALU2(XOR) ALU2(SHR) ALU2(SHL) +ALU1(DIM) ALU2(ASR) ALU1(F32TO16) ALU1(F16TO32) @@ -232,6 +233,7 @@ unsigned binding_table_index, unsigned msg_control, unsigned msg_type, + unsigned target_cache, unsigned msg_length, bool header_present, unsigned last_render_target, @@ -291,6 +293,14 @@ bool last_render_target, bool header_present); +brw_inst *gen9_fb_READ(struct brw_codegen *p, + struct brw_reg dst, + struct brw_reg payload, + unsigned binding_table_index, + unsigned msg_length, + unsigned response_length, + bool per_sample); + void brw_SAMPLE(struct brw_codegen *p, struct brw_reg dest, unsigned msg_reg_nr, @@ -357,7 +367,7 @@ * instruction. */ static inline unsigned -brw_jump_scale(const struct brw_device_info *devinfo) +brw_jump_scale(const struct gen_device_info *devinfo) { /* Broadwell measures jump targets in bytes. */ if (devinfo->gen >= 8) @@ -479,7 +489,8 @@ void brw_find_live_channel(struct brw_codegen *p, - struct brw_reg dst); + struct brw_reg dst, + struct brw_reg mask); void brw_broadcast(struct brw_codegen *p, @@ -517,21 +528,21 @@ void brw_set_src1(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg); -void brw_set_uip_jip(struct brw_codegen *p); +void brw_set_uip_jip(struct brw_codegen *p, int start_offset); enum brw_conditional_mod brw_negate_cmod(uint32_t cmod); enum brw_conditional_mod brw_swap_cmod(uint32_t cmod); /* brw_eu_compact.c */ -void brw_init_compaction_tables(const struct brw_device_info *devinfo); +void brw_init_compaction_tables(const struct gen_device_info *devinfo); void brw_compact_instructions(struct brw_codegen *p, int start_offset, int num_annotations, struct annotation *annotation); -void brw_uncompact_instruction(const struct brw_device_info *devinfo, +void brw_uncompact_instruction(const struct gen_device_info *devinfo, brw_inst *dst, brw_compact_inst *src); -bool brw_try_compact_instruction(const struct brw_device_info *devinfo, +bool brw_try_compact_instruction(const struct gen_device_info *devinfo, brw_compact_inst *dst, brw_inst *src); -void brw_debug_compact_uncompact(const struct brw_device_info *devinfo, +void brw_debug_compact_uncompact(const struct gen_device_info *devinfo, brw_inst *orig, brw_inst *uncompacted); /* brw_eu_validate.c */ @@ -539,7 +550,7 @@ struct annotation_info *annotation); static inline int -next_offset(const struct brw_device_info *devinfo, void *store, int offset) +next_offset(const struct gen_device_info *devinfo, void *store, int offset) { brw_inst *insn = (brw_inst *)((char *)store + offset); @@ -574,10 +585,10 @@ }; const struct opcode_desc * -brw_opcode_desc(const struct brw_device_info *devinfo, enum opcode opcode); +brw_opcode_desc(const struct gen_device_info *devinfo, enum opcode opcode); static inline bool -is_3src(const struct brw_device_info *devinfo, enum opcode opcode) +is_3src(const struct gen_device_info *devinfo, enum opcode opcode) { const struct opcode_desc *desc = brw_opcode_desc(devinfo, opcode); return desc && desc->nsrc == 3; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_eu_validate.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_eu_validate.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_eu_validate.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_eu_validate.c 2017-06-01 10:37:10.000000000 +0000 @@ -55,21 +55,27 @@ } while(0) static bool -src0_is_null(const struct brw_device_info *devinfo, const brw_inst *inst) +src0_is_null(const struct gen_device_info *devinfo, const brw_inst *inst) { return brw_inst_src0_reg_file(devinfo, inst) == BRW_ARCHITECTURE_REGISTER_FILE && brw_inst_src0_da_reg_nr(devinfo, inst) == BRW_ARF_NULL; } static bool -src1_is_null(const struct brw_device_info *devinfo, const brw_inst *inst) +src1_is_null(const struct gen_device_info *devinfo, const brw_inst *inst) { return brw_inst_src1_reg_file(devinfo, inst) == BRW_ARCHITECTURE_REGISTER_FILE && brw_inst_src1_da_reg_nr(devinfo, inst) == BRW_ARF_NULL; } +static bool +src0_is_grf(const struct gen_device_info *devinfo, const brw_inst *inst) +{ + return brw_inst_src0_reg_file(devinfo, inst) == BRW_GENERAL_REGISTER_FILE; +} + static unsigned -num_sources_from_inst(const struct brw_device_info *devinfo, +num_sources_from_inst(const struct gen_device_info *devinfo, const brw_inst *inst) { const struct opcode_desc *desc = @@ -118,7 +124,7 @@ } static bool -is_unsupported_inst(const struct brw_device_info *devinfo, +is_unsupported_inst(const struct gen_device_info *devinfo, const brw_inst *inst) { return brw_opcode_desc(devinfo, brw_inst_opcode(devinfo, inst)) == NULL; @@ -128,7 +134,7 @@ brw_validate_instructions(const struct brw_codegen *p, int start_offset, struct annotation_info *annotation) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; const void *store = p->store + start_offset / 16; bool valid = true; @@ -157,6 +163,18 @@ ERROR_IF(is_unsupported_inst(devinfo, inst), "Instruction not supported on this Gen"); + if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND) { + ERROR_IF(brw_inst_src0_address_mode(devinfo, inst) != + BRW_ADDRESS_DIRECT, "send must use direct addressing"); + + if (devinfo->gen >= 7) { + ERROR_IF(!src0_is_grf(devinfo, inst), "send from non-GRF"); + ERROR_IF(brw_inst_eot(devinfo, inst) && + brw_inst_src0_da_reg_nr(devinfo, inst) < 112, + "send with EOT must use g112-g127"); + } + } + if (error_msg.str && annotation) { annotation_insert_error(annotation, src_offset, error_msg.str); } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_ff_gs.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_ff_gs.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_ff_gs.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_ff_gs.c 2017-06-01 10:37:10.000000000 +0000 @@ -56,14 +56,14 @@ memset(&c, 0, sizeof(c)); c.key = *key; - c.vue_map = brw->vs.prog_data->base.vue_map; + c.vue_map = brw_vue_prog_data(brw->vs.base.prog_data)->vue_map; c.nr_regs = (c.vue_map.num_slots + 1)/2; mem_ctx = ralloc_context(NULL); /* Begin the compilation: */ - brw_init_codegen(brw->intelScreen->devinfo, &c.func, mem_ctx); + brw_init_codegen(&brw->screen->devinfo, &c.func, mem_ctx); c.func.single_program_flow = 1; @@ -135,7 +135,7 @@ if (unlikely(INTEL_DEBUG & DEBUG_GS)) { fprintf(stderr, "gs:\n"); - brw_disassemble(brw->intelScreen->devinfo, c.func.store, + brw_disassemble(&brw->screen->devinfo, c.func.store, 0, program_size, stderr); fprintf(stderr, "\n"); } @@ -174,7 +174,7 @@ memset(key, 0, sizeof(*key)); /* BRW_NEW_VS_PROG_DATA (part of VUE map) */ - key->attrs = brw->vs.prog_data->base.vue_map.slots_valid; + key->attrs = brw_vue_prog_data(brw->vs.base.prog_data)->vue_map.slots_valid; /* BRW_NEW_PRIMITIVE */ key->primitive = brw->primitive; @@ -198,7 +198,7 @@ const struct gl_shader_program *shaderprog = ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX]; const struct gl_transform_feedback_info *linked_xfb_info = - &shaderprog->LinkedTransformFeedback; + shaderprog->xfb_program->sh.LinkedTransformFeedback; int i; /* Make sure that the VUE slots won't overflow the unsigned chars in diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_formatquery.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_formatquery.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_formatquery.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_formatquery.c 2017-06-01 10:37:10.000000000 +0000 @@ -23,6 +23,7 @@ #include "brw_context.h" #include "brw_state.h" +#include "main/context.h" #include "main/formatquery.h" #include "main/glformats.h" @@ -50,9 +51,24 @@ return 3; case 7: - samples[0] = 8; - samples[1] = 4; - return 2; + if (internalFormat == GL_RGBA32F && _mesa_is_gles(ctx)) { + /* For GLES, we are allowed to return a smaller number of samples for + * GL_RGBA32F. See OpenGLES 3.2 spec, section 20.3.1 Internal Format + * Query Parameters, under SAMPLES: + * + * "A value less than or equal to the value of MAX_SAMPLES, if + * internalformat is RGBA16F, R32F, RG32F, or RGBA32F." + * + * In brw_render_target_supported, we prevent formats with a size + * greater than 8 bytes from using 8x MSAA on gen7. + */ + samples[0] = 4; + return 1; + } else { + samples[0] = 8; + samples[1] = 4; + return 2; + } case 6: samples[0] = 4; @@ -65,46 +81,6 @@ } } -/** - * Returns a generic GL type from an internal format, so that it can be used - * together with the base format to obtain a mesa_format by calling - * mesa_format_from_format_and_type(). - */ -static GLenum -get_generic_type_for_internal_format(GLenum internalFormat) -{ - if (_mesa_is_color_format(internalFormat)) { - if (_mesa_is_enum_format_unsigned_int(internalFormat)) - return GL_UNSIGNED_BYTE; - else if (_mesa_is_enum_format_signed_int(internalFormat)) - return GL_BYTE; - } else { - switch (internalFormat) { - case GL_STENCIL_INDEX: - case GL_STENCIL_INDEX8: - return GL_UNSIGNED_BYTE; - case GL_DEPTH_COMPONENT: - case GL_DEPTH_COMPONENT16: - return GL_UNSIGNED_SHORT; - case GL_DEPTH_COMPONENT24: - case GL_DEPTH_COMPONENT32: - return GL_UNSIGNED_INT; - case GL_DEPTH_COMPONENT32F: - return GL_FLOAT; - case GL_DEPTH_STENCIL: - case GL_DEPTH24_STENCIL8: - return GL_UNSIGNED_INT_24_8; - case GL_DEPTH32F_STENCIL8: - return GL_FLOAT_32_UNSIGNED_INT_24_8_REV; - default: - /* fall-through */ - break; - } - } - - return GL_FLOAT; -} - void brw_query_internal_format(struct gl_context *ctx, GLenum target, GLenum internalFormat, GLenum pname, GLint *params) @@ -129,37 +105,6 @@ break; } - case GL_INTERNALFORMAT_PREFERRED: { - params[0] = GL_NONE; - - /* We need to resolve an internal format that is compatible with - * the passed internal format, and optimal to the driver. By now, - * we just validate that the passed internal format is supported by - * the driver, and if so return the same internal format, otherwise - * return GL_NONE. - * - * For validating the internal format, we use the - * ctx->TextureFormatSupported map to check that a BRW surface format - * exists, that can be derived from the internal format. But this - * expects a mesa_format, not an internal format. So we need to "come up" - * with a type that is generic enough, to resolve the mesa_format first. - */ - GLenum type = get_generic_type_for_internal_format(internalFormat); - - /* Get a mesa_format from the internal format and type. */ - GLint base_format = _mesa_base_tex_format(ctx, internalFormat); - if (base_format != -1) { - mesa_format mesa_format = - _mesa_format_from_format_and_type(base_format, type); - - if (mesa_format < MESA_FORMAT_COUNT && - ctx->TextureFormatSupported[mesa_format]) { - params[0] = internalFormat; - } - } - break; - } - default: /* By default, we call the driver hook's fallback function from the frontend, * which has generic implementation for all pnames. diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_builder.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_builder.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_builder.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_builder.h 2017-06-01 10:37:10.000000000 +0000 @@ -101,7 +101,7 @@ fs_builder at_end() const { - return at(NULL, (exec_node *)&shader->instructions.tail); + return at(NULL, (exec_node *)&shader->instructions.tail_sentinel); } /** @@ -240,7 +240,7 @@ group() + dispatch_width() <= 16); if (shader->stage != MESA_SHADER_FRAGMENT) { return brw_imm_d(0xffffffff); - } else if (((brw_wm_prog_data *)shader->stage_prog_data)->uses_kill) { + } else if (brw_wm_prog_data(shader->stage_prog_data)->uses_kill) { return brw_flag_reg(0, 1); } else { return retype(brw_vec1_grf(1, 7), BRW_REGISTER_TYPE_UD); @@ -460,6 +460,7 @@ ALU1(CBIT) ALU2(CMPN) ALU3(CSEL) + ALU1(DIM) ALU2(DP2) ALU2(DP3) ALU2(DP4) @@ -568,11 +569,11 @@ { instruction *inst = emit(SHADER_OPCODE_LOAD_PAYLOAD, dst, src, sources); inst->header_size = header_size; - inst->regs_written = header_size; + inst->size_written = header_size * REG_SIZE; for (unsigned i = header_size; i < sources; i++) { - inst->regs_written += - DIV_ROUND_UP(dispatch_width() * type_sz(src[i].type) * - dst.stride, REG_SIZE); + inst->size_written += + ALIGN(dispatch_width() * type_sz(src[i].type) * dst.stride, + REG_SIZE); } return inst; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -433,6 +433,11 @@ case ir_unop_frexp_sig: case ir_unop_frexp_exp: unreachable("should have been lowered by lower_instructions"); + + case ir_unop_vote_any: + case ir_unop_vote_all: + case ir_unop_vote_eq: + unreachable("unsupported"); } ir->remove(); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_cmod_propagation.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_cmod_propagation.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_cmod_propagation.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_cmod_propagation.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -49,7 +49,7 @@ */ static bool -opt_cmod_propagation_local(const brw_device_info *devinfo, bblock_t *block) +opt_cmod_propagation_local(const gen_device_info *devinfo, bblock_t *block) { bool progress = false; int ip = block->end_ip + 1; @@ -88,9 +88,10 @@ bool read_flag = false; foreach_inst_in_block_reverse_starting_from(fs_inst, scan_inst, inst) { - if (scan_inst->overwrites_reg(inst->src[0])) { + if (regions_overlap(scan_inst->dst, scan_inst->size_written, + inst->src[0], inst->size_read(0))) { if (scan_inst->is_partial_write() || - scan_inst->dst.reg_offset != inst->src[0].reg_offset || + scan_inst->dst.offset != inst->src[0].offset || scan_inst->exec_size != inst->exec_size) break; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_combine_constants.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_combine_constants.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_combine_constants.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_combine_constants.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -45,7 +45,7 @@ * replaced with a GRF source. */ static bool -could_coissue(const struct brw_device_info *devinfo, const fs_inst *inst) +could_coissue(const struct gen_device_info *devinfo, const fs_inst *inst) { if (devinfo->gen != 7) return false; @@ -65,7 +65,7 @@ * Returns true for instructions that don't support immediate sources. */ static bool -must_promote_imm(const struct brw_device_info *devinfo, const fs_inst *inst) +must_promote_imm(const struct gen_device_info *devinfo, const fs_inst *inst) { switch (inst->opcode) { case SHADER_OPCODE_POW: @@ -280,12 +280,12 @@ ibld.MOV(reg, brw_imm_f(imm->val)); imm->nr = reg.nr; - imm->subreg_offset = reg.subreg_offset; + imm->subreg_offset = reg.offset; - reg.subreg_offset += sizeof(float); - if ((unsigned)reg.subreg_offset == 8 * sizeof(float)) { + reg.offset += sizeof(float); + if (reg.offset == 8 * sizeof(float)) { reg.nr = alloc.allocate(1); - reg.subreg_offset = 0; + reg.offset = 0; } } promoted_constants = table.len; @@ -296,7 +296,7 @@ fs_reg *reg = link->reg; reg->file = VGRF; reg->nr = table.imm[i].nr; - reg->subreg_offset = table.imm[i].subreg_offset; + reg->offset = table.imm[i].subreg_offset; reg->stride = 0; reg->negate = signbit(reg->f) != signbit(table.imm[i].val); assert((isnan(reg->f) && isnan(table.imm[i].val)) || diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -43,8 +43,8 @@ struct acp_entry : public exec_node { fs_reg dst; fs_reg src; - uint8_t regs_written; - uint8_t regs_read; + uint8_t size_written; + uint8_t size_read; enum opcode opcode; bool saturate; }; @@ -161,8 +161,10 @@ /* Mark ACP entries which are killed by this instruction. */ for (int i = 0; i < num_acp; i++) { - if (inst->overwrites_reg(acp[i]->dst) || - inst->overwrites_reg(acp[i]->src)) { + if (regions_overlap(inst->dst, inst->size_written, + acp[i]->dst, acp[i]->size_written) || + regions_overlap(inst->dst, inst->size_written, + acp[i]->src, acp[i]->size_read)) { BITSET_SET(bd[block->num].kill, i); } } @@ -279,7 +281,7 @@ static bool can_take_stride(fs_inst *inst, unsigned arg, unsigned stride, - const brw_device_info *devinfo) + const gen_device_info *devinfo) { if (stride > 4) return false; @@ -330,22 +332,6 @@ return true; } -/** - * Check that the register region read by src [src.reg_offset, - * src.reg_offset + regs_read] is contained inside the register - * region written by dst [dst.reg_offset, dst.reg_offset + regs_written] - * Both src and dst must have the same register number and file. - */ -static inline bool -region_contained_in(const fs_reg &src, unsigned regs_read, - const fs_reg &dst, unsigned regs_written) -{ - return src.file == dst.file && src.nr == dst.nr && - (src.reg_offset * REG_SIZE + src.subreg_offset >= - dst.reg_offset * REG_SIZE + dst.subreg_offset) && - src.reg_offset + regs_read <= dst.reg_offset + regs_written; -} - bool fs_visitor::try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry) { @@ -368,8 +354,8 @@ /* Bail if inst is reading a range that isn't contained in the range * that entry is writing. */ - if (!region_contained_in(inst->src[arg], inst->regs_read(arg), - entry->dst, entry->regs_written)) + if (!region_contained_in(inst->src[arg], inst->size_read(arg), + entry->dst, entry->size_written)) return false; /* we can't generally copy-propagate UD negations because we @@ -464,31 +450,21 @@ inst->saturate = inst->saturate || entry->saturate; /* Compute the offset of inst->src[arg] relative to entry->dst */ - const unsigned rel_offset = (inst->src[arg].reg_offset - - entry->dst.reg_offset) * REG_SIZE + - inst->src[arg].subreg_offset; + const unsigned rel_offset = inst->src[arg].offset - entry->dst.offset; /* Compute the first component of the copy that the instruction is * reading, and the base byte offset within that component. */ - assert(entry->dst.subreg_offset == 0 && entry->dst.stride == 1); + assert(entry->dst.offset % REG_SIZE == 0 && entry->dst.stride == 1); const unsigned component = rel_offset / type_sz(entry->dst.type); const unsigned suboffset = rel_offset % type_sz(entry->dst.type); - /* Account for the inconsistent units reg_offset is expressed in. - * FINISHME -- Make the units of reg_offset consistent (e.g. bytes?) for - * all register files. - */ - const unsigned reg_size = (entry->src.file == UNIFORM ? 4 : REG_SIZE); - /* Calculate the byte offset at the origin of the copy of the given * component and suboffset. */ - const unsigned offset = suboffset + + inst->src[arg].offset = suboffset + component * entry->src.stride * type_sz(entry->src.type) + - entry->src.reg_offset * reg_size + entry->src.subreg_offset; - inst->src[arg].reg_offset = offset / reg_size; - inst->src[arg].subreg_offset = offset % reg_size; + entry->src.offset; if (has_source_modifiers) { if (entry->dst.type != inst->src[arg].type) { @@ -536,8 +512,8 @@ /* Bail if inst is reading a range that isn't contained in the range * that entry is writing. */ - if (!region_contained_in(inst->src[i], inst->regs_read(i), - entry->dst, entry->regs_written)) + if (!region_contained_in(inst->src[i], inst->size_read(i), + entry->dst, entry->size_written)) continue; /* If the type sizes don't match each channel of the instruction is @@ -748,8 +724,8 @@ return (inst->opcode == BRW_OPCODE_MOV && inst->dst.file == VGRF && ((inst->src[0].file == VGRF && - (inst->src[0].nr != inst->dst.nr || - inst->src[0].reg_offset != inst->dst.reg_offset)) || + !regions_overlap(inst->dst, inst->size_written, + inst->src[0], inst->size_read(0))) || inst->src[0].file == ATTR || inst->src[0].file == UNIFORM || inst->src[0].file == IMM) && @@ -783,8 +759,8 @@ /* kill the destination from the ACP */ if (inst->dst.file == VGRF) { foreach_in_list_safe(acp_entry, entry, &acp[inst->dst.nr % ACP_HASH_SIZE]) { - if (regions_overlap(entry->dst, entry->regs_written * REG_SIZE, - inst->dst, inst->regs_written * REG_SIZE)) + if (regions_overlap(entry->dst, entry->size_written, + inst->dst, inst->size_written)) entry->remove(); } @@ -796,8 +772,8 @@ /* Make sure we kill the entry if this instruction overwrites * _any_ of the registers that it reads */ - if (regions_overlap(entry->src, entry->regs_read * REG_SIZE, - inst->dst, inst->regs_written * REG_SIZE)) + if (regions_overlap(entry->src, entry->size_read, + inst->dst, inst->size_written)) entry->remove(); } } @@ -810,8 +786,8 @@ acp_entry *entry = ralloc(copy_prop_ctx, acp_entry); entry->dst = inst->dst; entry->src = inst->src[0]; - entry->regs_written = inst->regs_written; - entry->regs_read = inst->regs_read(0); + entry->size_written = inst->size_written; + entry->size_read = inst->size_read(0); entry->opcode = inst->opcode; entry->saturate = inst->saturate; acp[entry->dst.nr % ACP_HASH_SIZE].push_tail(entry); @@ -821,15 +797,14 @@ for (int i = 0; i < inst->sources; i++) { int effective_width = i < inst->header_size ? 8 : inst->exec_size; assert(effective_width * type_sz(inst->src[i].type) % REG_SIZE == 0); - int regs_written = effective_width * - type_sz(inst->src[i].type) / REG_SIZE; + const unsigned size_written = effective_width * + type_sz(inst->src[i].type); if (inst->src[i].file == VGRF) { - acp_entry *entry = ralloc(copy_prop_ctx, acp_entry); - entry->dst = inst->dst; - entry->dst.reg_offset += offset; + acp_entry *entry = rzalloc(copy_prop_ctx, acp_entry); + entry->dst = byte_offset(inst->dst, offset); entry->src = inst->src[i]; - entry->regs_written = regs_written; - entry->regs_read = inst->regs_read(i); + entry->size_written = size_written; + entry->size_read = inst->size_read(i); entry->opcode = inst->opcode; if (!entry->dst.equals(inst->src[i])) { acp[entry->dst.nr % ACP_HASH_SIZE].push_tail(entry); @@ -837,7 +812,7 @@ ralloc_free(entry); } } - offset += regs_written; + offset += size_written; } } } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -39,10 +39,14 @@ #include "brw_program.h" #include "brw_dead_control_flow.h" #include "compiler/glsl_types.h" +#include "compiler/nir/nir_builder.h" #include "program/prog_parameter.h" using namespace brw; +static unsigned get_lowered_simd_width(const struct gen_device_info *devinfo, + const fs_inst *inst); + void fs_inst::init(enum opcode opcode, uint8_t exec_size, const fs_reg &dst, const fs_reg *src, unsigned sources) @@ -72,11 +76,10 @@ case FIXED_GRF: case MRF: case ATTR: - this->regs_written = DIV_ROUND_UP(dst.component_size(exec_size), - REG_SIZE); + this->size_written = dst.component_size(exec_size); break; case BAD_FILE: - this->regs_written = 0; + this->size_written = 0; break; case IMM: case UNIFORM: @@ -169,12 +172,12 @@ * be any component of a vector, and then we load 4 contiguous * components starting from that. * - * We break down the const_offset to a portion added to the variable - * offset and a portion done using reg_offset, which means that if you - * have GLSL using something like "uniform vec4 a[20]; gl_FragColor = - * a[i]", we'll temporarily generate 4 vec4 loads from offset i * 4, and - * CSE can later notice that those loads are all the same and eliminate - * the redundant ones. + * We break down the const_offset to a portion added to the variable offset + * and a portion done using fs_reg::offset, which means that if you have + * GLSL using something like "uniform vec4 a[20]; gl_FragColor = a[i]", + * we'll temporarily generate 4 vec4 loads from offset i * 4, and CSE can + * later notice that those loads are all the same and eliminate the + * redundant ones. */ fs_reg vec4_offset = vgrf(glsl_type::uint_type); bld.ADD(vec4_offset, varying_offset, brw_imm_ud(const_offset & ~0xf)); @@ -188,7 +191,7 @@ fs_reg vec4_result = bld.vgrf(BRW_REGISTER_TYPE_F, 4); fs_inst *inst = bld.emit(FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_LOGICAL, vec4_result, surf_index, vec4_offset); - inst->regs_written = 4 * bld.dispatch_width() / 8; + inst->size_written = 4 * vec4_result.component_size(inst->exec_size); if (type_sz(dst.type) == 8) { shuffle_32bit_load_result_to_64bit_data( @@ -238,18 +241,11 @@ } bool -fs_inst::overwrites_reg(const fs_reg ®) const -{ - return reg.in_range(dst, regs_written); -} - -bool fs_inst::is_send_from_grf() const { switch (opcode) { case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7: case SHADER_OPCODE_SHADER_TIME_ADD: - case FS_OPCODE_INTERPOLATE_AT_CENTROID: case FS_OPCODE_INTERPOLATE_AT_SAMPLE: case FS_OPCODE_INTERPOLATE_AT_SHARED_OFFSET: case FS_OPCODE_INTERPOLATE_AT_PER_SLOT_OFFSET: @@ -269,6 +265,7 @@ case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD: return src[1].file == VGRF; case FS_OPCODE_FB_WRITE: + case FS_OPCODE_FB_READ: return src[0].file == VGRF; default: if (is_tex()) @@ -350,10 +347,10 @@ return false; fs_reg reg = this->src[0]; - if (reg.file != VGRF || reg.reg_offset != 0 || reg.stride == 0) + if (reg.file != VGRF || reg.offset != 0 || reg.stride != 1) return false; - if (grf_alloc.sizes[reg.nr] != this->regs_written) + if (grf_alloc.sizes[reg.nr] * REG_SIZE != this->size_written) return false; for (int i = 0; i < this->sources; i++) { @@ -362,7 +359,7 @@ return false; if (i < this->header_size) { - reg.reg_offset += 1; + reg.offset += REG_SIZE; } else { reg = horiz_offset(reg, this->exec_size); } @@ -372,7 +369,7 @@ } bool -fs_inst::can_do_source_mods(const struct brw_device_info *devinfo) +fs_inst::can_do_source_mods(const struct gen_device_info *devinfo) { if (devinfo->gen == 6 && is_math()) return false; @@ -421,8 +418,7 @@ fs_reg::fs_reg(struct ::brw_reg reg) : backend_reg(reg) { - this->reg_offset = 0; - this->subreg_offset = 0; + this->offset = 0; this->stride = 1; if (this->file == IMM && (this->type != BRW_REGISTER_TYPE_V && @@ -436,19 +432,9 @@ fs_reg::equals(const fs_reg &r) const { return (this->backend_reg::equals(r) && - subreg_offset == r.subreg_offset && stride == r.stride); } -fs_reg & -fs_reg::set_smear(unsigned subreg) -{ - assert(file != ARF && file != FIXED_GRF && file != IMM); - subreg_offset = subreg * type_sz(type); - stride = 0; - return *this; -} - bool fs_reg::is_contiguous() const { @@ -507,32 +493,6 @@ } /** - * Returns the number of scalar components needed to store type, assuming - * that vectors are padded out to vec4. - * - * This has the packing rules of type_size_vec4(), but counts components - * similar to type_size_scalar(). - */ -extern "C" int -type_size_vec4_times_4(const struct glsl_type *type) -{ - return 4 * type_size_vec4(type); -} - -/* Attribute arrays are loaded as one vec4 per element (or matrix column), - * except for double-precision types, which are loaded as one dvec4. - */ -extern "C" int -type_size_vs_input(const struct glsl_type *type) -{ - if (type->is_double()) { - return type_size_dvec4(type); - } else { - return type_size_vec4(type); - } -} - -/** * Create a MOV to read the timestamp register. * * The caller is responsible for emitting the MOV. The return value is @@ -561,15 +521,14 @@ void fs_visitor::emit_shader_time_begin() { - shader_start_time = get_timestamp(bld.annotate("shader time start")); - /* We want only the low 32 bits of the timestamp. Since it's running * at the GPU clock rate of ~1.2ghz, it will roll over every ~3 seconds, * which is plenty of time for our purposes. It is identical across the * EUs, but since it's tracking GPU core speed it will increment at a * varying rate as render P-states change. */ - shader_start_time.set_smear(0); + shader_start_time = component( + get_timestamp(bld.annotate("shader time start")), 0); } void @@ -580,8 +539,7 @@ assert(end && ((fs_inst *) end)->eot); const fs_builder ibld = bld.annotate("shader time end") .exec_all().at(NULL, end); - - fs_reg shader_end_time = get_timestamp(ibld); + const fs_reg timestamp = get_timestamp(ibld); /* We only use the low 32 bits of the timestamp - see * emit_shader_time_begin()). @@ -590,22 +548,21 @@ * else that might disrupt timing) by setting smear to 2 and checking if * that field is != 0. */ - shader_end_time.set_smear(0); + const fs_reg shader_end_time = component(timestamp, 0); /* Check that there weren't any timestamp reset events (assuming these * were the only two timestamp reads that happened). */ - fs_reg reset = shader_end_time; - reset.set_smear(2); + const fs_reg reset = component(timestamp, 2); set_condmod(BRW_CONDITIONAL_Z, ibld.AND(ibld.null_reg_ud(), reset, brw_imm_ud(1u))); ibld.IF(BRW_PREDICATE_NORMAL); fs_reg start = shader_start_time; start.negate = true; - fs_reg diff = fs_reg(VGRF, alloc.allocate(1), BRW_REGISTER_TYPE_UD); - diff.set_smear(0); - + const fs_reg diff = component(fs_reg(VGRF, alloc.allocate(1), + BRW_REGISTER_TYPE_UD), + 0); const fs_builder cbld = ibld.group(1, 0); cbld.group(1, 0).ADD(diff, start, shader_end_time); @@ -706,12 +663,16 @@ return ((this->predicate && this->opcode != BRW_OPCODE_SEL) || (this->exec_size * type_sz(this->dst.type)) < 32 || !this->dst.is_contiguous() || - this->dst.subreg_offset > 0); + this->dst.offset % REG_SIZE != 0); } unsigned fs_inst::components_read(unsigned i) const { + /* Return zero if the source is not present. */ + if (src[i].file == BAD_FILE) + return 0; + switch (opcode) { case FS_OPCODE_LINTERP: if (i == 0) @@ -756,7 +717,7 @@ opcode == SHADER_OPCODE_TXD_LOGICAL) return src[TEX_LOGICAL_SRC_GRAD_COMPONENTS].ud; /* Texture offset. */ - else if (i == TEX_LOGICAL_SRC_OFFSET_VALUE) + else if (i == TEX_LOGICAL_SRC_TG4_OFFSET) return 2; /* MCS */ else if (i == TEX_LOGICAL_SRC_MCS && opcode == SHADER_OPCODE_TXF_CMS_W_LOGICAL) @@ -812,11 +773,12 @@ } } -int -fs_inst::regs_read(int arg) const +unsigned +fs_inst::size_read(int arg) const { switch (opcode) { case FS_OPCODE_FB_WRITE: + case FS_OPCODE_FB_READ: case SHADER_OPCODE_URB_WRITE_SIMD8: case SHADER_OPCODE_URB_WRITE_SIMD8_PER_SLOT: case SHADER_OPCODE_URB_WRITE_SIMD8_MASKED: @@ -831,79 +793,52 @@ case SHADER_OPCODE_TYPED_SURFACE_WRITE: case FS_OPCODE_INTERPOLATE_AT_PER_SLOT_OFFSET: if (arg == 0) - return mlen; + return mlen * REG_SIZE; break; case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD_GEN7: /* The payload is actually stored in src1 */ if (arg == 1) - return mlen; + return mlen * REG_SIZE; break; case FS_OPCODE_LINTERP: if (arg == 1) - return 1; + return 16; break; case SHADER_OPCODE_LOAD_PAYLOAD: if (arg < this->header_size) - return 1; + return REG_SIZE; break; case CS_OPCODE_CS_TERMINATE: case SHADER_OPCODE_BARRIER: - return 1; + return REG_SIZE; case SHADER_OPCODE_MOV_INDIRECT: if (arg == 0) { assert(src[2].file == IMM); - unsigned region_length = src[2].ud; - - if (src[0].file == UNIFORM) { - assert(region_length % 4 == 0); - return region_length / 4; - } else if (src[0].file == FIXED_GRF) { - /* If the start of the region is not register aligned, then - * there's some portion of the register that's technically - * unread at the beginning. - * - * However, the register allocator works in terms of whole - * registers, and does not use subnr. It assumes that the - * read starts at the beginning of the register, and extends - * regs_read() whole registers beyond that. - * - * To compensate, we extend the region length to include this - * unread portion at the beginning. - */ - if (src[0].subnr) - region_length += src[0].subnr; - - return DIV_ROUND_UP(region_length, REG_SIZE); - } else { - assert(!"Invalid register file"); - } + return src[2].ud; } break; default: if (is_tex() && arg == 0 && src[0].file == VGRF) - return mlen; + return mlen * REG_SIZE; break; } switch (src[arg].file) { - case BAD_FILE: - return 0; case UNIFORM: case IMM: - return 1; + return components_read(arg) * type_sz(src[arg].type); + case BAD_FILE: case ARF: case FIXED_GRF: case VGRF: case ATTR: - return DIV_ROUND_UP(components_read(arg) * - src[arg].component_size(exec_size), - REG_SIZE); + return components_read(arg) * src[arg].component_size(exec_size); case MRF: unreachable("MRF registers are not allowed as sources"); } @@ -925,7 +860,7 @@ } unsigned -fs_inst::flags_read(const brw_device_info *devinfo) const +fs_inst::flags_read(const gen_device_info *devinfo) const { /* XXX - This doesn't consider explicit uses of the flag register as source * region. @@ -992,21 +927,17 @@ case FS_OPCODE_TXB: case SHADER_OPCODE_TXD: case SHADER_OPCODE_TXF: - case SHADER_OPCODE_TXF_LZ: case SHADER_OPCODE_TXF_CMS: - case SHADER_OPCODE_TXF_CMS_W: case SHADER_OPCODE_TXF_MCS: case SHADER_OPCODE_TG4: case SHADER_OPCODE_TG4_OFFSET: case SHADER_OPCODE_TXL: - case SHADER_OPCODE_TXL_LZ: case SHADER_OPCODE_TXS: case SHADER_OPCODE_LOD: case SHADER_OPCODE_SAMPLEINFO: return 1; case FS_OPCODE_FB_WRITE: return 2; - case FS_OPCODE_GET_BUFFER_SIZE: case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD: case SHADER_OPCODE_GEN4_SCRATCH_READ: return 1; @@ -1014,21 +945,6 @@ return inst->mlen; case SHADER_OPCODE_GEN4_SCRATCH_WRITE: return inst->mlen; - case SHADER_OPCODE_UNTYPED_ATOMIC: - case SHADER_OPCODE_UNTYPED_SURFACE_READ: - case SHADER_OPCODE_UNTYPED_SURFACE_WRITE: - case SHADER_OPCODE_TYPED_ATOMIC: - case SHADER_OPCODE_TYPED_SURFACE_READ: - case SHADER_OPCODE_TYPED_SURFACE_WRITE: - case SHADER_OPCODE_URB_WRITE_SIMD8: - case SHADER_OPCODE_URB_WRITE_SIMD8_PER_SLOT: - case SHADER_OPCODE_URB_WRITE_SIMD8_MASKED: - case SHADER_OPCODE_URB_WRITE_SIMD8_MASKED_PER_SLOT: - case FS_OPCODE_INTERPOLATE_AT_CENTROID: - case FS_OPCODE_INTERPOLATE_AT_SAMPLE: - case FS_OPCODE_INTERPOLATE_AT_SHARED_OFFSET: - case FS_OPCODE_INTERPOLATE_AT_PER_SLOT_OFFSET: - return 0; default: unreachable("not reached"); } @@ -1071,12 +987,10 @@ this->uniforms = v->uniforms; } -fs_reg * -fs_visitor::emit_fragcoord_interpolation() +void +fs_visitor::emit_fragcoord_interpolation(fs_reg wpos) { assert(stage == MESA_SHADER_FRAGMENT); - fs_reg *reg = new(this->mem_ctx) fs_reg(vgrf(glsl_type::vec4_type)); - fs_reg wpos = *reg; /* gl_FragCoord.x */ bld.MOV(wpos, this->pixel_x); @@ -1091,164 +1005,53 @@ bld.MOV(wpos, fs_reg(brw_vec8_grf(payload.source_depth_reg, 0))); } else { bld.emit(FS_OPCODE_LINTERP, wpos, - this->delta_xy[BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC], + this->delta_xy[BRW_BARYCENTRIC_PERSPECTIVE_PIXEL], interp_reg(VARYING_SLOT_POS, 2)); } wpos = offset(wpos, bld, 1); /* gl_FragCoord.w: Already set up in emit_interpolation */ bld.MOV(wpos, this->wpos_w); - - return reg; } -fs_inst * -fs_visitor::emit_linterp(const fs_reg &attr, const fs_reg &interp, - glsl_interp_qualifier interpolation_mode, - bool is_centroid, bool is_sample) +enum brw_barycentric_mode +brw_barycentric_mode(enum glsl_interp_mode mode, nir_intrinsic_op op) { - brw_wm_barycentric_interp_mode barycoord_mode; - if (devinfo->gen >= 6) { - if (is_centroid) { - if (interpolation_mode == INTERP_QUALIFIER_SMOOTH) - barycoord_mode = BRW_WM_PERSPECTIVE_CENTROID_BARYCENTRIC; - else - barycoord_mode = BRW_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC; - } else if (is_sample) { - if (interpolation_mode == INTERP_QUALIFIER_SMOOTH) - barycoord_mode = BRW_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC; - else - barycoord_mode = BRW_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC; - } else { - if (interpolation_mode == INTERP_QUALIFIER_SMOOTH) - barycoord_mode = BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC; - else - barycoord_mode = BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC; - } - } else { - /* On Ironlake and below, there is only one interpolation mode. - * Centroid interpolation doesn't mean anything on this hardware -- - * there is no multisampling. - */ - barycoord_mode = BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC; - } - return bld.emit(FS_OPCODE_LINTERP, attr, - this->delta_xy[barycoord_mode], interp); -} + /* Barycentric modes don't make sense for flat inputs. */ + assert(mode != INTERP_MODE_FLAT); -void -fs_visitor::emit_general_interpolation(fs_reg *attr, const char *name, - const glsl_type *type, - glsl_interp_qualifier interpolation_mode, - int *location, bool mod_centroid, - bool mod_sample) -{ - assert(stage == MESA_SHADER_FRAGMENT); - brw_wm_prog_data *prog_data = (brw_wm_prog_data*) this->prog_data; - brw_wm_prog_key *key = (brw_wm_prog_key*) this->key; - - if (interpolation_mode == INTERP_QUALIFIER_NONE) { - bool is_gl_Color = - *location == VARYING_SLOT_COL0 || *location == VARYING_SLOT_COL1; - if (key->flat_shade && is_gl_Color) { - interpolation_mode = INTERP_QUALIFIER_FLAT; - } else { - interpolation_mode = INTERP_QUALIFIER_SMOOTH; - } + unsigned bary; + switch (op) { + case nir_intrinsic_load_barycentric_pixel: + case nir_intrinsic_load_barycentric_at_offset: + bary = BRW_BARYCENTRIC_PERSPECTIVE_PIXEL; + break; + case nir_intrinsic_load_barycentric_centroid: + bary = BRW_BARYCENTRIC_PERSPECTIVE_CENTROID; + break; + case nir_intrinsic_load_barycentric_sample: + case nir_intrinsic_load_barycentric_at_sample: + bary = BRW_BARYCENTRIC_PERSPECTIVE_SAMPLE; + break; + default: + unreachable("invalid intrinsic"); } - if (type->is_array() || type->is_matrix()) { - const glsl_type *elem_type = glsl_get_array_element(type); - const unsigned length = glsl_get_length(type); - - for (unsigned i = 0; i < length; i++) { - emit_general_interpolation(attr, name, elem_type, interpolation_mode, - location, mod_centroid, mod_sample); - } - } else if (type->is_record()) { - for (unsigned i = 0; i < type->length; i++) { - const glsl_type *field_type = type->fields.structure[i].type; - emit_general_interpolation(attr, name, field_type, interpolation_mode, - location, mod_centroid, mod_sample); - } - } else { - assert(type->is_scalar() || type->is_vector()); - - if (prog_data->urb_setup[*location] == -1) { - /* If there's no incoming setup data for this slot, don't - * emit interpolation for it. - */ - *attr = offset(*attr, bld, type->vector_elements); - (*location)++; - return; - } - - attr->type = brw_type_for_base_type(type->get_scalar_type()); - - if (interpolation_mode == INTERP_QUALIFIER_FLAT) { - /* Constant interpolation (flat shading) case. The SF has - * handed us defined values in only the constant offset - * field of the setup reg. - */ - unsigned vector_elements = type->vector_elements; - - /* Data starts at suboffet 3 in 32-bit units (12 bytes), so it is not - * 64-bit aligned and the current implementation fails to read the - * data properly. Instead, when there is is a double input varying, - * read it as vector of floats with twice the number of components. - */ - if (attr->type == BRW_REGISTER_TYPE_DF) { - vector_elements *= 2; - attr->type = BRW_REGISTER_TYPE_F; - } - for (unsigned int i = 0; i < vector_elements; i++) { - struct brw_reg interp = interp_reg(*location, i); - interp = suboffset(interp, 3); - interp.type = attr->type; - bld.emit(FS_OPCODE_CINTERP, *attr, fs_reg(interp)); - *attr = offset(*attr, bld, 1); - } - } else { - /* Smooth/noperspective interpolation case. */ - for (unsigned int i = 0; i < type->vector_elements; i++) { - struct brw_reg interp = interp_reg(*location, i); - if (devinfo->needs_unlit_centroid_workaround && mod_centroid) { - /* Get the pixel/sample mask into f0 so that we know - * which pixels are lit. Then, for each channel that is - * unlit, replace the centroid data with non-centroid - * data. - */ - bld.emit(FS_OPCODE_MOV_DISPATCH_TO_FLAGS); + if (mode == INTERP_MODE_NOPERSPECTIVE) + bary += 3; - fs_inst *inst; - inst = emit_linterp(*attr, fs_reg(interp), interpolation_mode, - false, false); - inst->predicate = BRW_PREDICATE_NORMAL; - inst->predicate_inverse = true; - if (devinfo->has_pln) - inst->no_dd_clear = true; - - inst = emit_linterp(*attr, fs_reg(interp), interpolation_mode, - mod_centroid && !key->persample_interp, - mod_sample || key->persample_interp); - inst->predicate = BRW_PREDICATE_NORMAL; - inst->predicate_inverse = false; - if (devinfo->has_pln) - inst->no_dd_check = true; + return (enum brw_barycentric_mode) bary; +} - } else { - emit_linterp(*attr, fs_reg(interp), interpolation_mode, - mod_centroid && !key->persample_interp, - mod_sample || key->persample_interp); - } - if (devinfo->gen < 6 && interpolation_mode == INTERP_QUALIFIER_SMOOTH) { - bld.MUL(*attr, *attr, this->pixel_w); - } - *attr = offset(*attr, bld, 1); - } - } - (*location)++; - } +/** + * Turn one of the two CENTROID barycentric modes into PIXEL mode. + */ +static enum brw_barycentric_mode +centroid_to_pixel(enum brw_barycentric_mode bary) +{ + assert(bary == BRW_BARYCENTRIC_PERSPECTIVE_CENTROID || + bary == BRW_BARYCENTRIC_NONPERSPECTIVE_CENTROID); + return (enum brw_barycentric_mode) ((unsigned) bary - 1); } fs_reg * @@ -1296,7 +1099,7 @@ fs_visitor::compute_sample_position(fs_reg dst, fs_reg int_sample_pos) { assert(stage == MESA_SHADER_FRAGMENT); - brw_wm_prog_data *wm_prog_data = (brw_wm_prog_data *) this->prog_data; + struct brw_wm_prog_data *wm_prog_data = brw_wm_prog_data(this->prog_data); assert(dst.type == BRW_REGISTER_TYPE_F); if (wm_prog_data->persample_dispatch) { @@ -1416,9 +1219,9 @@ brw_imm_v(0x44440000)); abld.AND(*reg, tmp, brw_imm_w(0xf)); } else { - fs_reg t1(VGRF, alloc.allocate(1), BRW_REGISTER_TYPE_D); - t1.set_smear(0); - fs_reg t2(VGRF, alloc.allocate(1), BRW_REGISTER_TYPE_W); + const fs_reg t1 = component(fs_reg(VGRF, alloc.allocate(1), + BRW_REGISTER_TYPE_D), 0); + const fs_reg t2(VGRF, alloc.allocate(1), BRW_REGISTER_TYPE_W); /* The PS will be run in MSDISPMODE_PERSAMPLE. For example with * 8x multisampling, subspan 0 will represent sample N (where N @@ -1464,7 +1267,7 @@ fs_visitor::emit_samplemaskin_setup() { assert(stage == MESA_SHADER_FRAGMENT); - brw_wm_prog_data *wm_prog_data = (brw_wm_prog_data *) this->prog_data; + struct brw_wm_prog_data *wm_prog_data = brw_wm_prog_data(this->prog_data); assert(devinfo->gen >= 6); fs_reg *reg = new(this->mem_ctx) fs_reg(vgrf(glsl_type::int_type)); @@ -1515,7 +1318,7 @@ void fs_visitor::emit_discard_jump() { - assert(((brw_wm_prog_data*) this->prog_data)->uses_kill); + assert(brw_wm_prog_data(this->prog_data)->uses_kill); /* For performance, after a discard, jump to the end of the * shader if all relevant channels have been discarded. @@ -1523,9 +1326,7 @@ fs_inst *discard_jump = bld.emit(FS_OPCODE_DISCARD_JUMP); discard_jump->flag_subreg = 1; - discard_jump->predicate = (dispatch_width == 8) - ? BRW_PREDICATE_ALIGN1_ANY8H - : BRW_PREDICATE_ALIGN1_ANY16H; + discard_jump->predicate = BRW_PREDICATE_ALIGN1_ANY4H; discard_jump->predicate_inverse = true; } @@ -1534,8 +1335,7 @@ { assert(stage == MESA_SHADER_GEOMETRY); - struct brw_gs_prog_data *gs_prog_data = - (struct brw_gs_prog_data *) prog_data; + struct brw_gs_prog_data *gs_prog_data = brw_gs_prog_data(prog_data); if (gs_compile->control_data_header_size_bits > 0) { emit_gs_control_data_bits(this->final_gs_vertex_count); @@ -1589,7 +1389,7 @@ foreach_block_and_inst(block, fs_inst, inst, cfg) { for (unsigned int i = 0; i < inst->sources; i++) { if (inst->src[i].file == UNIFORM) { - int uniform_nr = inst->src[i].nr + inst->src[i].reg_offset; + int uniform_nr = inst->src[i].nr + inst->src[i].offset / 4; int constant_nr; if (uniform_nr >= 0 && uniform_nr < (int) uniforms) { constant_nr = push_constant_loc[uniform_nr]; @@ -1611,7 +1411,7 @@ assert(inst->src[i].stride == 0); inst->src[i] = byte_offset( retype(brw_reg, inst->src[i].type), - inst->src[i].subreg_offset); + inst->src[i].offset % 4); } } } @@ -1624,7 +1424,7 @@ fs_visitor::calculate_urb_setup() { assert(stage == MESA_SHADER_FRAGMENT); - brw_wm_prog_data *prog_data = (brw_wm_prog_data*) this->prog_data; + struct brw_wm_prog_data *prog_data = brw_wm_prog_data(this->prog_data); brw_wm_prog_key *key = (brw_wm_prog_key*) this->key; memset(prog_data->urb_setup, -1, @@ -1633,7 +1433,7 @@ int urb_next = 0; /* Figure out where each of the incoming setup attributes lands. */ if (devinfo->gen >= 6) { - if (_mesa_bitcount_64(nir->info.inputs_read & + if (_mesa_bitcount_64(nir->info->inputs_read & BRW_FS_VARYING_INPUT_MASK) <= 16) { /* The SF/SBE pipeline stage can do arbitrary rearrangement of the * first 16 varying inputs, so we can put them wherever we want. @@ -1645,14 +1445,14 @@ * a different vertex (or geometry) shader. */ for (unsigned int i = 0; i < VARYING_SLOT_MAX; i++) { - if (nir->info.inputs_read & BRW_FS_VARYING_INPUT_MASK & + if (nir->info->inputs_read & BRW_FS_VARYING_INPUT_MASK & BITFIELD64_BIT(i)) { prog_data->urb_setup[i] = urb_next++; } } } else { bool include_vue_header = - nir->info.inputs_read & (VARYING_BIT_LAYER | VARYING_BIT_VIEWPORT); + nir->info->inputs_read & (VARYING_BIT_LAYER | VARYING_BIT_VIEWPORT); /* We have enough input varyings that the SF/SBE pipeline stage can't * arbitrarily rearrange them to suit our whim; we have to put them @@ -1662,7 +1462,7 @@ struct brw_vue_map prev_stage_vue_map; brw_compute_vue_map(devinfo, &prev_stage_vue_map, key->input_slots_valid, - nir->info.separate_shader); + nir->info->separate_shader); int first_slot = include_vue_header ? 0 : 2 * BRW_SF_URB_ENTRY_READ_OFFSET; @@ -1671,7 +1471,7 @@ slot++) { int varying = prev_stage_vue_map.slot_to_varying[slot]; if (varying != BRW_VARYING_SLOT_PAD && - (nir->info.inputs_read & BRW_FS_VARYING_INPUT_MASK & + (nir->info->inputs_read & BRW_FS_VARYING_INPUT_MASK & BITFIELD64_BIT(varying))) { prog_data->urb_setup[varying] = slot - first_slot; } @@ -1704,7 +1504,7 @@ * * See compile_sf_prog() for more info. */ - if (nir->info.inputs_read & BITFIELD64_BIT(VARYING_SLOT_PNTC)) + if (nir->info->inputs_read & BITFIELD64_BIT(VARYING_SLOT_PNTC)) prog_data->urb_setup[VARYING_SLOT_PNTC] = urb_next++; } @@ -1715,7 +1515,7 @@ fs_visitor::assign_urb_setup() { assert(stage == MESA_SHADER_FRAGMENT); - brw_wm_prog_data *prog_data = (brw_wm_prog_data*) this->prog_data; + struct brw_wm_prog_data *prog_data = brw_wm_prog_data(this->prog_data); int urb_start = payload.num_regs + prog_data->base.curb_read_length; @@ -1746,7 +1546,7 @@ int grf = payload.num_regs + prog_data->curb_read_length + inst->src[i].nr + - inst->src[i].reg_offset; + inst->src[i].offset / REG_SIZE; /* As explained at brw_reg_from_fs_reg, From the Haswell PRM: * @@ -1768,7 +1568,7 @@ unsigned width = inst->src[i].stride == 0 ? 1 : exec_size; struct brw_reg reg = stride(byte_offset(retype(brw_vec8_grf(grf, 0), inst->src[i].type), - inst->src[i].subreg_offset), + inst->src[i].offset % REG_SIZE), exec_size * inst->src[i].stride, width, inst->src[i].stride); reg.abs = inst->src[i].abs; @@ -1782,7 +1582,7 @@ void fs_visitor::assign_vs_urb_setup() { - brw_vs_prog_data *vs_prog_data = (brw_vs_prog_data *) prog_data; + struct brw_vs_prog_data *vs_prog_data = brw_vs_prog_data(prog_data); assert(stage == MESA_SHADER_VERTEX); @@ -1813,7 +1613,7 @@ { assert(stage == MESA_SHADER_TESS_EVAL); - brw_vue_prog_data *vue_prog_data = (brw_vue_prog_data *) prog_data; + struct brw_vue_prog_data *vue_prog_data = brw_vue_prog_data(prog_data); first_non_payload_grf += 8 * vue_prog_data->urb_read_length; @@ -1828,10 +1628,10 @@ { assert(stage == MESA_SHADER_GEOMETRY); - brw_vue_prog_data *vue_prog_data = (brw_vue_prog_data *) prog_data; + struct brw_vue_prog_data *vue_prog_data = brw_vue_prog_data(prog_data); first_non_payload_grf += - 8 * vue_prog_data->urb_read_length * nir->info.gs.vertices_in; + 8 * vue_prog_data->urb_read_length * nir->info->gs.vertices_in; foreach_block_and_inst(block, fs_inst, inst, cfg) { /* Rewrite all ATTR file references to GRFs. */ @@ -1861,6 +1661,12 @@ void fs_visitor::split_virtual_grfs() { + /* Compact the register file so we eliminate dead vgrfs. This + * only defines split points for live registers, so if we have + * too large dead registers they will hit assertions later. + */ + compact_virtual_grfs(); + int num_vars = this->alloc.count; /* Count the total number of registers */ @@ -1899,14 +1705,14 @@ foreach_block_and_inst(block, fs_inst, inst, cfg) { if (inst->dst.file == VGRF) { - int reg = vgrf_to_reg[inst->dst.nr] + inst->dst.reg_offset; - for (int j = 1; j < inst->regs_written; j++) + int reg = vgrf_to_reg[inst->dst.nr] + inst->dst.offset / REG_SIZE; + for (unsigned j = 1; j < regs_written(inst); j++) split_points[reg + j] = false; } for (int i = 0; i < inst->sources; i++) { if (inst->src[i].file == VGRF) { - int reg = vgrf_to_reg[inst->src[i].nr] + inst->src[i].reg_offset; - for (int j = 1; j < inst->regs_read(i); j++) + int reg = vgrf_to_reg[inst->src[i].nr] + inst->src[i].offset / REG_SIZE; + for (unsigned j = 1; j < regs_read(inst, i); j++) split_points[reg + j] = false; } } @@ -1952,16 +1758,18 @@ foreach_block_and_inst(block, fs_inst, inst, cfg) { if (inst->dst.file == VGRF) { - reg = vgrf_to_reg[inst->dst.nr] + inst->dst.reg_offset; + reg = vgrf_to_reg[inst->dst.nr] + inst->dst.offset / REG_SIZE; inst->dst.nr = new_virtual_grf[reg]; - inst->dst.reg_offset = new_reg_offset[reg]; + inst->dst.offset = new_reg_offset[reg] * REG_SIZE + + inst->dst.offset % REG_SIZE; assert((unsigned)new_reg_offset[reg] < alloc.sizes[new_virtual_grf[reg]]); } for (int i = 0; i < inst->sources; i++) { if (inst->src[i].file == VGRF) { - reg = vgrf_to_reg[inst->src[i].nr] + inst->src[i].reg_offset; + reg = vgrf_to_reg[inst->src[i].nr] + inst->src[i].offset / REG_SIZE; inst->src[i].nr = new_virtual_grf[reg]; - inst->src[i].reg_offset = new_reg_offset[reg]; + inst->src[i].offset = new_reg_offset[reg] * REG_SIZE + + inst->src[i].offset % REG_SIZE; assert((unsigned)new_reg_offset[reg] < alloc.sizes[new_virtual_grf[reg]]); } } @@ -2043,7 +1851,10 @@ } static void -set_push_pull_constant_loc(unsigned uniform, int *chunk_start, bool contiguous, +set_push_pull_constant_loc(unsigned uniform, int *chunk_start, + unsigned *max_chunk_bitsize, + bool contiguous, unsigned bitsize, + const unsigned target_bitsize, int *push_constant_loc, int *pull_constant_loc, unsigned *num_push_constants, unsigned *num_pull_constants, @@ -2055,11 +1866,23 @@ if (*chunk_start < 0) *chunk_start = uniform; + /* Keep track of the maximum bit size access in contiguous uniforms */ + *max_chunk_bitsize = MAX2(*max_chunk_bitsize, bitsize); + /* If this element does not need to be contiguous with the next, we * split at this point and everything between chunk_start and u forms a * single chunk. */ if (!contiguous) { + /* If bitsize doesn't match the target one, skip it */ + if (*max_chunk_bitsize != target_bitsize) { + /* FIXME: right now we only support 32 and 64-bit accesses */ + assert(*max_chunk_bitsize == 4 || *max_chunk_bitsize == 8); + *max_chunk_bitsize = 0; + *chunk_start = -1; + return; + } + unsigned chunk_size = uniform - *chunk_start + 1; /* Decide whether we should push or pull this parameter. In the @@ -2077,6 +1900,7 @@ pull_constant_loc[j] = (*num_pull_constants)++; } + *max_chunk_bitsize = 0; *chunk_start = -1; } } @@ -2099,8 +1923,8 @@ bool is_live[uniforms]; memset(is_live, 0, sizeof(is_live)); - bool is_live_64bit[uniforms]; - memset(is_live_64bit, 0, sizeof(is_live_64bit)); + unsigned bitsize_access[uniforms]; + memset(bitsize_access, 0, sizeof(bitsize_access)); /* For each uniform slot, a value of true indicates that the given slot and * the next slot must remain contiguous. This is used to keep us from @@ -2111,7 +1935,7 @@ int thread_local_id_index = (stage == MESA_SHADER_COMPUTE) ? - ((brw_cs_prog_data*)stage_prog_data)->thread_local_id_index : -1; + brw_cs_prog_data(stage_prog_data)->thread_local_id_index : -1; /* First, we walk through the instructions and do two things: * @@ -2127,7 +1951,7 @@ if (inst->src[i].file != UNIFORM) continue; - int constant_nr = inst->src[i].nr + inst->src[i].reg_offset; + int constant_nr = inst->src[i].nr + inst->src[i].offset / 4; if (inst->opcode == SHADER_OPCODE_MOV_INDIRECT && i == 0) { assert(inst->src[2].ud % 4 == 0); @@ -2137,20 +1961,18 @@ for (unsigned j = constant_nr; j < last; j++) { is_live[j] = true; contiguous[j] = true; - if (type_sz(inst->src[i].type) == 8) { - is_live_64bit[j] = true; - } + bitsize_access[j] = MAX2(bitsize_access[j], type_sz(inst->src[i].type)); } is_live[last] = true; + bitsize_access[last] = MAX2(bitsize_access[last], type_sz(inst->src[i].type)); } else { if (constant_nr >= 0 && constant_nr < (int) uniforms) { int regs_read = inst->components_read(i) * type_sz(inst->src[i].type) / 4; for (int j = 0; j < regs_read; j++) { is_live[constant_nr + j] = true; - if (type_sz(inst->src[i].type) == 8) { - is_live_64bit[constant_nr + j] = true; - } + bitsize_access[constant_nr + j] = + MAX2(bitsize_access[constant_nr + j], type_sz(inst->src[i].type)); } } } @@ -2189,13 +2011,17 @@ memset(pull_constant_loc, -1, uniforms * sizeof(*pull_constant_loc)); int chunk_start = -1; + unsigned max_chunk_bitsize = 0; /* First push 64-bit uniforms to ensure they are properly aligned */ + const unsigned uniform_64_bit_size = type_sz(BRW_REGISTER_TYPE_DF); for (unsigned u = 0; u < uniforms; u++) { - if (!is_live[u] || !is_live_64bit[u]) + if (!is_live[u]) continue; - set_push_pull_constant_loc(u, &chunk_start, contiguous[u], + set_push_pull_constant_loc(u, &chunk_start, &max_chunk_bitsize, + contiguous[u], bitsize_access[u], + uniform_64_bit_size, push_constant_loc, pull_constant_loc, &num_push_constants, &num_pull_constants, max_push_components, max_chunk_size, @@ -2204,15 +2030,18 @@ } /* Then push the rest of uniforms */ + const unsigned uniform_32_bit_size = type_sz(BRW_REGISTER_TYPE_F); for (unsigned u = 0; u < uniforms; u++) { - if (!is_live[u] || is_live_64bit[u]) + if (!is_live[u]) continue; /* Skip thread_local_id_index to put it in the last push register. */ if (thread_local_id_index == (int)u) continue; - set_push_pull_constant_loc(u, &chunk_start, contiguous[u], + set_push_pull_constant_loc(u, &chunk_start, &max_chunk_bitsize, + contiguous[u], bitsize_access[u], + uniform_32_bit_size, push_constant_loc, pull_constant_loc, &num_push_constants, &num_pull_constants, max_push_components, max_chunk_size, @@ -2233,7 +2062,7 @@ stage_prog_data->nr_params = num_push_constants; stage_prog_data->nr_pull_params = num_pull_constants; - /* Up until now, the param[] array has been indexed by reg + reg_offset + /* Up until now, the param[] array has been indexed by reg + offset * of UNIFORM registers. Move pull constants into pull_param[] and * condense param[] to only contain the uniforms we chose to push. * @@ -2256,7 +2085,7 @@ ralloc_free(param); if (stage == MESA_SHADER_COMPUTE) - ((brw_cs_prog_data*)stage_prog_data)->thread_local_id_index = + brw_cs_prog_data(stage_prog_data)->thread_local_id_index = new_thread_local_id_index; } @@ -2281,7 +2110,7 @@ if (inst->opcode == SHADER_OPCODE_MOV_INDIRECT && i == 0) continue; - unsigned location = inst->src[i].nr + inst->src[i].reg_offset; + unsigned location = inst->src[i].nr + inst->src[i].offset / 4; if (location >= uniforms) continue; /* Out of bounds access */ @@ -2290,27 +2119,22 @@ if (pull_index == -1) continue; - const unsigned index = stage_prog_data->binding_table.pull_constants_start; - fs_reg dst; - - if (type_sz(inst->src[i].type) <= 4) - dst = vgrf(glsl_type::float_type); - else - dst = vgrf(glsl_type::double_type); - assert(inst->src[i].stride == 0); - const fs_builder ubld = ibld.exec_all().group(8, 0); - struct brw_reg offset = brw_imm_ud((unsigned)(pull_index * 4) & ~15); + const unsigned index = stage_prog_data->binding_table.pull_constants_start; + const unsigned block_sz = 64; /* Fetch one cacheline at a time. */ + const fs_builder ubld = ibld.exec_all().group(block_sz / 4, 0); + const fs_reg dst = ubld.vgrf(BRW_REGISTER_TYPE_UD); + const unsigned base = pull_index * 4; + ubld.emit(FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD, - dst, brw_imm_ud(index), offset); + dst, brw_imm_ud(index), brw_imm_ud(base & ~(block_sz - 1))); /* Rewrite the instruction to use the temporary VGRF. */ inst->src[i].file = VGRF; inst->src[i].nr = dst.nr; - inst->src[i].reg_offset = 0; - inst->src[i].set_smear((pull_index & 3) * 4 / - type_sz(inst->src[i].type)); + inst->src[i].offset = (base & (block_sz - 1)) + + inst->src[i].offset % 4; brw_mark_surface_used(prog_data, index); } @@ -2318,7 +2142,7 @@ if (inst->opcode == SHADER_OPCODE_MOV_INDIRECT && inst->src[0].file == UNIFORM) { - unsigned location = inst->src[0].nr + inst->src[0].reg_offset; + unsigned location = inst->src[0].nr + inst->src[0].offset / 4; if (location >= uniforms) continue; /* Out of bounds access */ @@ -2674,7 +2498,7 @@ for (unsigned i = 0; i < FB_WRITE_LOGICAL_NUM_SRCS; i++) { if (i == FB_WRITE_LOGICAL_SRC_COLOR0) { if (!fb_write->src[i].equals(tex_inst->dst) || - fb_write->regs_read(i) != tex_inst->regs_written) + fb_write->size_read(i) != tex_inst->size_written) return false; } else if (i != FB_WRITE_LOGICAL_SRC_COMPONENTS) { if (fb_write->src[i].file != BAD_FILE) @@ -2690,7 +2514,7 @@ tex_inst->offset |= fb_write->target << 24; tex_inst->eot = true; tex_inst->dst = ibld.null_reg_ud(); - tex_inst->regs_written = 0; + tex_inst->size_written = 0; fb_write->remove(cfg->blocks[cfg->num_blocks - 1]); /* Marking EOT is sufficient, lower_logical_sends() will notice the EOT @@ -2732,12 +2556,12 @@ if (depth == 0 && inst->dst.file == VGRF && - alloc.sizes[inst->dst.nr] == inst->regs_written && + alloc.sizes[inst->dst.nr] * REG_SIZE == inst->size_written && !inst->is_partial_write()) { if (remap[dst] == -1) { remap[dst] = dst; } else { - remap[dst] = alloc.allocate(inst->regs_written); + remap[dst] = alloc.allocate(regs_written(inst)); inst->dst.nr = remap[dst]; progress = true; } @@ -2805,16 +2629,18 @@ /** * Compute a bitmask with GRF granularity with a bit set for each GRF starting - * from \p r which overlaps the region starting at \p r and spanning \p n GRF - * units. + * from \p r.offset which overlaps the region starting at \p s.offset and + * spanning \p ds bytes. */ static inline unsigned -mask_relative_to(const fs_reg &r, const fs_reg &s, unsigned n) +mask_relative_to(const fs_reg &r, const fs_reg &s, unsigned ds) { - const int rel_offset = (reg_offset(s) - reg_offset(r)) / REG_SIZE; + const int rel_offset = reg_offset(s) - reg_offset(r); + const int shift = rel_offset / REG_SIZE; + const unsigned n = DIV_ROUND_UP(rel_offset % REG_SIZE + ds, REG_SIZE); assert(reg_space(r) == reg_space(s) && - rel_offset >= 0 && rel_offset < int(8 * sizeof(unsigned))); - return ((1 << n) - 1) << rel_offset; + shift >= 0 && shift < int(8 * sizeof(unsigned))); + return ((1 << n) - 1) << shift; } bool @@ -2839,7 +2665,7 @@ inst->dst.type != inst->src[0].type || inst->src[0].abs || inst->src[0].negate || !inst->src[0].is_contiguous() || - inst->src[0].subreg_offset) + inst->src[0].offset % REG_SIZE != 0) continue; /* Can't compute-to-MRF this GRF if someone else was going to @@ -2853,11 +2679,11 @@ * regs_left bitset keeps track of the registers we haven't yet found a * generating instruction for. */ - unsigned regs_left = (1 << inst->regs_read(0)) - 1; + unsigned regs_left = (1 << regs_read(inst, 0)) - 1; foreach_inst_in_block_reverse_starting_from(fs_inst, scan_inst, inst) { - if (regions_overlap(scan_inst->dst, scan_inst->regs_written * REG_SIZE, - inst->src[0], inst->regs_read(0) * REG_SIZE)) { + if (regions_overlap(scan_inst->dst, scan_inst->size_written, + inst->src[0], inst->size_read(0))) { /* Found the last thing to write our reg we want to turn * into a compute-to-MRF. */ @@ -2874,9 +2700,8 @@ * would need us to understand coalescing out more than one MOV at * a time. */ - if (scan_inst->dst.reg_offset < inst->src[0].reg_offset || - scan_inst->dst.reg_offset + scan_inst->regs_written > - inst->src[0].reg_offset + inst->regs_read(0)) + if (!region_contained_in(scan_inst->dst, scan_inst->size_written, + inst->src[0], inst->size_read(0))) break; /* SEND instructions can't have MRF as a destination. */ @@ -2894,7 +2719,7 @@ /* Clear the bits for any registers this instruction overwrites. */ regs_left &= ~mask_relative_to( - inst->src[0], scan_inst->dst, scan_inst->regs_written); + inst->src[0], scan_inst->dst, scan_inst->size_written); if (!regs_left) break; } @@ -2911,16 +2736,16 @@ */ bool interfered = false; for (int i = 0; i < scan_inst->sources; i++) { - if (regions_overlap(scan_inst->src[i], scan_inst->regs_read(i) * REG_SIZE, - inst->src[0], inst->regs_read(0) * REG_SIZE)) { + if (regions_overlap(scan_inst->src[i], scan_inst->size_read(i), + inst->src[0], inst->size_read(0))) { interfered = true; } } if (interfered) break; - if (regions_overlap(scan_inst->dst, scan_inst->regs_written * REG_SIZE, - inst->dst, inst->regs_written * REG_SIZE)) { + if (regions_overlap(scan_inst->dst, scan_inst->size_written, + inst->dst, inst->size_written)) { /* If somebody else writes our MRF here, we can't * compute-to-MRF before that. */ @@ -2929,7 +2754,7 @@ if (scan_inst->mlen > 0 && scan_inst->base_mrf != -1 && regions_overlap(fs_reg(MRF, scan_inst->base_mrf), scan_inst->mlen * REG_SIZE, - inst->dst, inst->regs_written * REG_SIZE)) { + inst->dst, inst->size_written)) { /* Found a SEND instruction, which means that there are * live values in MRFs from base_mrf to base_mrf + * scan_inst->mlen - 1. Don't go pushing our MRF write up @@ -2945,40 +2770,40 @@ /* Found all generating instructions of our MRF's source value, so it * should be safe to rewrite them to point to the MRF directly. */ - regs_left = (1 << inst->regs_read(0)) - 1; + regs_left = (1 << regs_read(inst, 0)) - 1; foreach_inst_in_block_reverse_starting_from(fs_inst, scan_inst, inst) { - if (regions_overlap(scan_inst->dst, scan_inst->regs_written * REG_SIZE, - inst->src[0], inst->regs_read(0) * REG_SIZE)) { + if (regions_overlap(scan_inst->dst, scan_inst->size_written, + inst->src[0], inst->size_read(0))) { /* Clear the bits for any registers this instruction overwrites. */ regs_left &= ~mask_relative_to( - inst->src[0], scan_inst->dst, scan_inst->regs_written); + inst->src[0], scan_inst->dst, scan_inst->size_written); - const unsigned rel_offset = (reg_offset(scan_inst->dst) - - reg_offset(inst->src[0])) / REG_SIZE; + const unsigned rel_offset = reg_offset(scan_inst->dst) - + reg_offset(inst->src[0]); if (inst->dst.nr & BRW_MRF_COMPR4) { /* Apply the same address transformation done by the hardware * for COMPR4 MRF writes. */ - assert(rel_offset < 2); - scan_inst->dst.nr = inst->dst.nr + rel_offset * 4; + assert(rel_offset < 2 * REG_SIZE); + scan_inst->dst.nr = inst->dst.nr + rel_offset / REG_SIZE * 4; /* Clear the COMPR4 bit if the generating instruction is not * compressed. */ - if (scan_inst->regs_written < 2) + if (scan_inst->size_written < 2 * REG_SIZE) scan_inst->dst.nr &= ~BRW_MRF_COMPR4; } else { /* Calculate the MRF number the result of this instruction is * ultimately written to. */ - scan_inst->dst.nr = inst->dst.nr + rel_offset; + scan_inst->dst.nr = inst->dst.nr + rel_offset / REG_SIZE; } scan_inst->dst.file = MRF; - scan_inst->dst.reg_offset = 0; + scan_inst->dst.offset = inst->dst.offset + rel_offset % REG_SIZE; scan_inst->saturate |= inst->saturate; if (!regs_left) break; @@ -3007,6 +2832,14 @@ bool progress = false; unsigned depth = 0; + if (!brw_stage_has_packed_dispatch(devinfo, stage, stage_prog_data)) { + /* The optimization below assumes that channel zero is live on thread + * dispatch, which may not be the case if the fixed function dispatches + * threads sparsely. + */ + return false; + } + foreach_block_and_inst_safe(block, fs_inst, inst, cfg) { switch (inst->opcode) { case BRW_OPCODE_IF: @@ -3150,9 +2983,9 @@ /* Clear out any MRF move records whose sources got overwritten. */ for (unsigned i = 0; i < ARRAY_SIZE(last_mrf_move); i++) { if (last_mrf_move[i] && - regions_overlap(inst->dst, inst->regs_written * REG_SIZE, + regions_overlap(inst->dst, inst->size_written, last_mrf_move[i]->src[0], - last_mrf_move[i]->regs_read(0) * REG_SIZE)) { + last_mrf_move[i]->size_read(0))) { last_mrf_move[i] = NULL; } } @@ -3212,7 +3045,7 @@ fs_visitor::insert_gen4_pre_send_dependency_workarounds(bblock_t *block, fs_inst *inst) { - int write_len = inst->regs_written; + int write_len = regs_written(inst); int first_write_grf = inst->dst.nr; bool needs_dep[BRW_MAX_MRF(devinfo->gen)]; assert(write_len < (int)sizeof(needs_dep) - 1); @@ -3245,7 +3078,7 @@ * dependency has more latency than a MOV. */ if (scan_inst->dst.file == VGRF) { - for (int i = 0; i < scan_inst->regs_written; i++) { + for (unsigned i = 0; i < regs_written(scan_inst); i++) { int reg = scan_inst->dst.nr + i; if (reg >= first_write_grf && @@ -3283,7 +3116,7 @@ void fs_visitor::insert_gen4_post_send_dependency_workarounds(bblock_t *block, fs_inst *inst) { - int write_len = inst->regs_written; + int write_len = regs_written(inst); int first_write_grf = inst->dst.nr; bool needs_dep[BRW_MAX_MRF(devinfo->gen)]; assert(write_len < (int)sizeof(needs_dep) - 1); @@ -3338,10 +3171,6 @@ bool progress = false; - /* Note that we're done with register allocation, so GRF fs_regs always - * have a .reg_offset of 0. - */ - foreach_block_and_inst(block, fs_inst, inst, cfg) { if (inst->mlen != 0 && inst->dst.file == VGRF) { insert_gen4_pre_send_dependency_workarounds(block, inst); @@ -3378,45 +3207,18 @@ continue; if (devinfo->gen >= 7) { - /* The offset arg is a vec4-aligned immediate byte offset. */ - fs_reg const_offset_reg = inst->src[1]; - assert(const_offset_reg.file == IMM && - const_offset_reg.type == BRW_REGISTER_TYPE_UD); - assert(const_offset_reg.ud % 16 == 0); - - fs_reg payload, offset; - if (devinfo->gen >= 9) { - /* We have to use a message header on Skylake to get SIMD4x2 - * mode. Reserve space for the register. - */ - offset = payload = fs_reg(VGRF, alloc.allocate(2)); - offset.reg_offset++; - inst->mlen = 2; - } else { - offset = payload = fs_reg(VGRF, alloc.allocate(1)); - inst->mlen = 1; - } + const fs_builder ubld = fs_builder(this, block, inst).exec_all(); + const fs_reg payload = ubld.group(8, 0).vgrf(BRW_REGISTER_TYPE_UD); + + ubld.group(8, 0).MOV(payload, + retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UD)); + ubld.group(1, 0).MOV(component(payload, 2), + brw_imm_ud(inst->src[1].ud / 16)); - /* This is actually going to be a MOV, but since only the first dword - * is accessed, we have a special opcode to do just that one. Note - * that this needs to be an operation that will be considered a def - * by live variable analysis, or register allocation will explode. - */ - fs_inst *setup = new(mem_ctx) fs_inst(FS_OPCODE_SET_SIMD4X2_OFFSET, - 8, offset, const_offset_reg); - setup->force_writemask_all = true; - - setup->ir = inst->ir; - setup->annotation = inst->annotation; - inst->insert_before(block, setup); - - /* Similarly, this will only populate the first 4 channels of the - * result register (since we only use smear values from 0-3), but we - * don't tell the optimizer. - */ inst->opcode = FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD_GEN7; inst->src[1] = payload; - inst->base_mrf = -1; + inst->header_size = 1; + inst->mlen = 1; invalidate_live_intervals(); } else { @@ -3626,62 +3428,27 @@ inst->dst.type); if (devinfo->gen >= 7) { - fs_reg src1_0_w = inst->src[1]; - fs_reg src1_1_w = inst->src[1]; - if (inst->src[1].file == IMM) { - src1_0_w.ud &= 0xffff; - src1_1_w.ud >>= 16; + ibld.MUL(low, inst->src[0], + brw_imm_uw(inst->src[1].ud & 0xffff)); + ibld.MUL(high, inst->src[0], + brw_imm_uw(inst->src[1].ud >> 16)); } else { - src1_0_w.type = BRW_REGISTER_TYPE_UW; - if (src1_0_w.stride != 0) { - assert(src1_0_w.stride == 1); - src1_0_w.stride = 2; - } - - src1_1_w.type = BRW_REGISTER_TYPE_UW; - if (src1_1_w.stride != 0) { - assert(src1_1_w.stride == 1); - src1_1_w.stride = 2; - } - src1_1_w.subreg_offset += type_sz(BRW_REGISTER_TYPE_UW); + ibld.MUL(low, inst->src[0], + subscript(inst->src[1], BRW_REGISTER_TYPE_UW, 0)); + ibld.MUL(high, inst->src[0], + subscript(inst->src[1], BRW_REGISTER_TYPE_UW, 1)); } - ibld.MUL(low, inst->src[0], src1_0_w); - ibld.MUL(high, inst->src[0], src1_1_w); } else { - fs_reg src0_0_w = inst->src[0]; - fs_reg src0_1_w = inst->src[0]; - - src0_0_w.type = BRW_REGISTER_TYPE_UW; - if (src0_0_w.stride != 0) { - assert(src0_0_w.stride == 1); - src0_0_w.stride = 2; - } - - src0_1_w.type = BRW_REGISTER_TYPE_UW; - if (src0_1_w.stride != 0) { - assert(src0_1_w.stride == 1); - src0_1_w.stride = 2; - } - src0_1_w.subreg_offset += type_sz(BRW_REGISTER_TYPE_UW); - - ibld.MUL(low, src0_0_w, inst->src[1]); - ibld.MUL(high, src0_1_w, inst->src[1]); + ibld.MUL(low, subscript(inst->src[0], BRW_REGISTER_TYPE_UW, 0), + inst->src[1]); + ibld.MUL(high, subscript(inst->src[0], BRW_REGISTER_TYPE_UW, 1), + inst->src[1]); } - fs_reg dst = inst->dst; - dst.type = BRW_REGISTER_TYPE_UW; - dst.subreg_offset = 2; - dst.stride = 2; - - high.type = BRW_REGISTER_TYPE_UW; - high.stride = 2; - - low.type = BRW_REGISTER_TYPE_UW; - low.subreg_offset = 2; - low.stride = 2; - - ibld.ADD(dst, low, high); + ibld.ADD(subscript(inst->dst, BRW_REGISTER_TYPE_UW, 1), + subscript(low, BRW_REGISTER_TYPE_UW, 1), + subscript(high, BRW_REGISTER_TYPE_UW, 0)); if (inst->conditional_mod || orig_dst.file == MRF) { set_condmod(inst->conditional_mod, @@ -3691,7 +3458,7 @@ } else if (inst->opcode == SHADER_OPCODE_MULH) { /* Should have been lowered to 8-wide. */ - assert(inst->exec_size <= 8); + assert(inst->exec_size <= get_lowered_simd_width(devinfo, inst)); const fs_reg acc = retype(brw_acc_reg(inst->exec_size), inst->dst.type); fs_inst *mul = ibld.MUL(acc, inst->src[0], inst->src[1]); @@ -3801,12 +3568,12 @@ static void lower_fb_write_logical_send(const fs_builder &bld, fs_inst *inst, - const brw_wm_prog_data *prog_data, + const struct brw_wm_prog_data *prog_data, const brw_wm_prog_key *key, const fs_visitor::thread_payload &payload) { assert(inst->src[FB_WRITE_LOGICAL_SRC_COMPONENTS].file == IMM); - const brw_device_info *devinfo = bld.shader->devinfo; + const gen_device_info *devinfo = bld.shader->devinfo; const fs_reg &color0 = inst->src[FB_WRITE_LOGICAL_SRC_COLOR0]; const fs_reg &color1 = inst->src[FB_WRITE_LOGICAL_SRC_COLOR1]; const fs_reg &src0_alpha = inst->src[FB_WRITE_LOGICAL_SRC_SRC0_ALPHA]; @@ -3933,12 +3700,11 @@ /* Send from the GRF */ fs_reg payload = fs_reg(VGRF, -1, BRW_REGISTER_TYPE_F); load = bld.LOAD_PAYLOAD(payload, sources, length, payload_header_size); - payload.nr = bld.shader->alloc.allocate(load->regs_written); + payload.nr = bld.shader->alloc.allocate(regs_written(load)); load->dst = payload; inst->src[0] = payload; inst->resize_sources(1); - inst->base_mrf = -1; } else { /* Send from the MRF */ load = bld.LOAD_PAYLOAD(fs_reg(MRF, 1, BRW_REGISTER_TYPE_F), @@ -3955,11 +3721,28 @@ } inst->opcode = FS_OPCODE_FB_WRITE; - inst->mlen = load->regs_written; + inst->mlen = regs_written(load); inst->header_size = header_size; } static void +lower_fb_read_logical_send(const fs_builder &bld, fs_inst *inst) +{ + const fs_builder &ubld = bld.exec_all(); + const unsigned length = 2; + const fs_reg header = ubld.group(8, 0).vgrf(BRW_REGISTER_TYPE_UD, length); + + ubld.group(16, 0) + .MOV(header, retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UD)); + + inst->resize_sources(1); + inst->src[0] = header; + inst->opcode = FS_OPCODE_FB_READ; + inst->mlen = length; + inst->header_size = length; +} + +static void lower_sampler_logical_send_gen4(const fs_builder &bld, fs_inst *inst, opcode op, const fs_reg &coordinate, const fs_reg &shadow_c, @@ -4029,8 +3812,8 @@ } if (has_lod) { - /* Bias/LOD with shadow comparitor is unsupported in SIMD16 -- *Without* - * shadow comparitor (including RESINFO) it's unsupported in SIMD8 mode. + /* Bias/LOD with shadow comparator is unsupported in SIMD16 -- *Without* + * shadow comparator (including RESINFO) it's unsupported in SIMD8 mode. */ assert(shadow_c.file != BAD_FILE ? bld.dispatch_width() == 8 : bld.dispatch_width() == 16); @@ -4073,7 +3856,6 @@ const fs_reg &sample_index, const fs_reg &surface, const fs_reg &sampler, - const fs_reg &offset_value, unsigned coord_components, unsigned grad_components) { @@ -4081,7 +3863,7 @@ fs_reg msg_coords = message; unsigned header_size = 0; - if (offset_value.file != BAD_FILE) { + if (inst->offset != 0) { /* The offsets set up by the visitor are in the m1 header, so we can't * go headerless. */ @@ -4164,7 +3946,7 @@ } static bool -is_high_sampler(const struct brw_device_info *devinfo, const fs_reg &sampler) +is_high_sampler(const struct gen_device_info *devinfo, const fs_reg &sampler) { if (devinfo->gen < 8 && !devinfo->is_haswell) return false; @@ -4181,19 +3963,19 @@ const fs_reg &mcs, const fs_reg &surface, const fs_reg &sampler, - const fs_reg &offset_value, + const fs_reg &tg4_offset, unsigned coord_components, unsigned grad_components) { - const brw_device_info *devinfo = bld.shader->devinfo; - int reg_width = bld.dispatch_width() / 8; + const gen_device_info *devinfo = bld.shader->devinfo; + unsigned reg_width = bld.dispatch_width() / 8; unsigned header_size = 0, length = 0; fs_reg sources[MAX_SAMPLER_MESSAGE_SIZE]; for (unsigned i = 0; i < ARRAY_SIZE(sources); i++) sources[i] = bld.vgrf(BRW_REGISTER_TYPE_F); if (op == SHADER_OPCODE_TG4 || op == SHADER_OPCODE_TG4_OFFSET || - offset_value.file != BAD_FILE || inst->eot || + inst->offset != 0 || inst->eot || op == SHADER_OPCODE_SAMPLEINFO || is_high_sampler(devinfo, sampler)) { /* For general texture offsets (no txf workaround), we need a header to @@ -4214,9 +3996,9 @@ * and we have an explicit header, we need to set up the sampler * writemask. It's reversed from normal: 1 means "don't write". */ - if (!inst->eot && inst->regs_written != 4 * reg_width) { - assert((inst->regs_written % reg_width) == 0); - unsigned mask = ~((1 << (inst->regs_written / reg_width)) - 1) & 0xf; + if (!inst->eot && regs_written(inst) != 4 * reg_width) { + assert(regs_written(inst) % reg_width == 0); + unsigned mask = ~((1 << (regs_written(inst) / reg_width)) - 1) & 0xf; inst->offset |= mask << 12; } } @@ -4228,16 +4010,6 @@ bool coordinate_done = false; - /* The sampler can only meaningfully compute LOD for fragment shader - * messages. For all other stages, we change the opcode to TXL and - * hardcode the LOD to 0. - */ - if (bld.shader->stage != MESA_SHADER_FRAGMENT && - op == SHADER_OPCODE_TEX) { - op = SHADER_OPCODE_TXL; - lod = brw_imm_f(0.0f); - } - /* Set up the LOD info */ switch (op) { case FS_OPCODE_TXB: @@ -4342,16 +4114,13 @@ coordinate_done = true; break; case SHADER_OPCODE_TG4_OFFSET: - /* gather4_po_c should have been lowered in SIMD16 mode. */ - assert(bld.dispatch_width() == 8 || shadow_c.file == BAD_FILE); - /* More crazy intermixing */ for (unsigned i = 0; i < 2; i++) /* u, v */ bld.MOV(sources[length++], offset(coordinate, bld, i)); for (unsigned i = 0; i < 2; i++) /* offu, offv */ bld.MOV(retype(sources[length++], BRW_REGISTER_TYPE_D), - offset(offset_value, bld, i)); + offset(tg4_offset, bld, i)); if (coord_components == 3) /* r if present */ bld.MOV(sources[length++], offset(coordinate, bld, 2)); @@ -4384,7 +4153,6 @@ inst->src[1] = surface; inst->src[2] = sampler; inst->resize_sources(3); - inst->base_mrf = -1; inst->mlen = mlen; inst->header_size = header_size; @@ -4395,7 +4163,7 @@ static void lower_sampler_logical_send(const fs_builder &bld, fs_inst *inst, opcode op) { - const brw_device_info *devinfo = bld.shader->devinfo; + const gen_device_info *devinfo = bld.shader->devinfo; const fs_reg &coordinate = inst->src[TEX_LOGICAL_SRC_COORDINATE]; const fs_reg &shadow_c = inst->src[TEX_LOGICAL_SRC_SHADOW_C]; const fs_reg &lod = inst->src[TEX_LOGICAL_SRC_LOD]; @@ -4404,7 +4172,7 @@ const fs_reg &mcs = inst->src[TEX_LOGICAL_SRC_MCS]; const fs_reg &surface = inst->src[TEX_LOGICAL_SRC_SURFACE]; const fs_reg &sampler = inst->src[TEX_LOGICAL_SRC_SAMPLER]; - const fs_reg &offset_value = inst->src[TEX_LOGICAL_SRC_OFFSET_VALUE]; + const fs_reg &tg4_offset = inst->src[TEX_LOGICAL_SRC_TG4_OFFSET]; assert(inst->src[TEX_LOGICAL_SRC_COORD_COMPONENTS].file == IMM); const unsigned coord_components = inst->src[TEX_LOGICAL_SRC_COORD_COMPONENTS].ud; assert(inst->src[TEX_LOGICAL_SRC_GRAD_COMPONENTS].file == IMM); @@ -4413,12 +4181,12 @@ if (devinfo->gen >= 7) { lower_sampler_logical_send_gen7(bld, inst, op, coordinate, shadow_c, lod, lod2, sample_index, - mcs, surface, sampler, offset_value, + mcs, surface, sampler, tg4_offset, coord_components, grad_components); } else if (devinfo->gen >= 5) { lower_sampler_logical_send_gen5(bld, inst, op, coordinate, shadow_c, lod, lod2, sample_index, - surface, sampler, offset_value, + surface, sampler, coord_components, grad_components); } else { lower_sampler_logical_send_gen4(bld, inst, op, coordinate, @@ -4492,7 +4260,7 @@ static void lower_varying_pull_constant_logical_send(const fs_builder &bld, fs_inst *inst) { - const brw_device_info *devinfo = bld.shader->devinfo; + const gen_device_info *devinfo = bld.shader->devinfo; if (devinfo->gen >= 7) { /* We are switching the instruction from an ALU-like instruction to a @@ -4561,11 +4329,15 @@ case FS_OPCODE_FB_WRITE_LOGICAL: assert(stage == MESA_SHADER_FRAGMENT); lower_fb_write_logical_send(ibld, inst, - (const brw_wm_prog_data *)prog_data, + brw_wm_prog_data(prog_data), (const brw_wm_prog_key *)key, payload); break; + case FS_OPCODE_FB_READ_LOGICAL: + lower_fb_read_logical_send(ibld, inst); + break; + case SHADER_OPCODE_TEX_LOGICAL: lower_sampler_logical_send(ibld, inst, SHADER_OPCODE_TEX); break; @@ -4715,7 +4487,7 @@ * excessively restrictive. */ static unsigned -get_fpu_lowered_simd_width(const struct brw_device_info *devinfo, +get_fpu_lowered_simd_width(const struct gen_device_info *devinfo, const fs_inst *inst) { /* Maximum execution size representable in the instruction controls. */ @@ -4730,10 +4502,10 @@ * which is the one that is going to limit the overall execution size of * the instruction due to this rule. */ - unsigned reg_count = inst->regs_written; + unsigned reg_count = DIV_ROUND_UP(inst->size_written, REG_SIZE); for (unsigned i = 0; i < inst->sources; i++) - reg_count = MAX2(reg_count, (unsigned)inst->regs_read(i)); + reg_count = MAX2(reg_count, DIV_ROUND_UP(inst->size_read(i), REG_SIZE)); /* Calculate the maximum execution size of the instruction based on the * factor by which it goes over the hardware limit of 2 GRFs. @@ -4757,13 +4529,14 @@ */ if (devinfo->gen < 8) { for (unsigned i = 0; i < inst->sources; i++) { - if (inst->regs_written == 2 && - inst->regs_read(i) != 0 && inst->regs_read(i) != 2 && + if (inst->size_written > REG_SIZE && + inst->size_read(i) != 0 && inst->size_read(i) <= REG_SIZE && !is_uniform(inst->src[i]) && !(type_sz(inst->dst.type) == 4 && inst->dst.stride == 1 && - type_sz(inst->src[i].type) == 2 && inst->src[i].stride == 1)) - max_width = MIN2(max_width, inst->exec_size / - inst->regs_written); + type_sz(inst->src[i].type) == 2 && inst->src[i].stride == 1)) { + const unsigned reg_count = DIV_ROUND_UP(inst->size_written, REG_SIZE); + max_width = MIN2(max_width, inst->exec_size / reg_count); + } } } @@ -4789,13 +4562,43 @@ max_width = MIN2(max_width, 16); /* From the IVB PRMs (applies to other devices that don't have the - * brw_device_info::supports_simd16_3src flag set): + * gen_device_info::supports_simd16_3src flag set): * "In Align16 access mode, SIMD16 is not allowed for DW operations and * SIMD8 is not allowed for DF operations." */ if (inst->is_3src(devinfo) && !devinfo->supports_simd16_3src) max_width = MIN2(max_width, inst->exec_size / reg_count); + /* Pre-Gen8 EUs are hardwired to use the QtrCtrl+1 (where QtrCtrl is + * the 8-bit quarter of the execution mask signals specified in the + * instruction control fields) for the second compressed half of any + * single-precision instruction (for double-precision instructions + * it's hardwired to use NibCtrl+1, at least on HSW), which means that + * the EU will apply the wrong execution controls for the second + * sequential GRF write if the number of channels per GRF is not exactly + * eight in single-precision mode (or four in double-float mode). + * + * In this situation we calculate the maximum size of the split + * instructions so they only ever write to a single register. + */ + if (devinfo->gen < 8 && inst->size_written > REG_SIZE && + !inst->force_writemask_all) { + const unsigned channels_per_grf = inst->exec_size / + DIV_ROUND_UP(inst->size_written, REG_SIZE); + unsigned exec_type_size = 0; + for (int i = 0; i < inst->sources; i++) { + if (inst->src[i].file != BAD_FILE) + exec_type_size = MAX2(exec_type_size, type_sz(inst->src[i].type)); + } + assert(exec_type_size); + + /* The hardware shifts exactly 8 channels per compressed half of the + * instruction in single-precision mode and exactly 4 in double-precision. + */ + if (channels_per_grf != (exec_type_size == 8 ? 4 : 8)) + max_width = MIN2(max_width, channels_per_grf); + } + /* Only power-of-two execution sizes are representable in the instruction * control fields. */ @@ -4803,13 +4606,74 @@ } /** + * Get the maximum allowed SIMD width for instruction \p inst accounting for + * various payload size restrictions that apply to sampler message + * instructions. + * + * This is only intended to provide a maximum theoretical bound for the + * execution size of the message based on the number of argument components + * alone, which in most cases will determine whether the SIMD8 or SIMD16 + * variant of the message can be used, though some messages may have + * additional restrictions not accounted for here (e.g. pre-ILK hardware uses + * the message length to determine the exact SIMD width and argument count, + * which makes a number of sampler message combinations impossible to + * represent). + */ +static unsigned +get_sampler_lowered_simd_width(const struct gen_device_info *devinfo, + const fs_inst *inst) +{ + /* Calculate the number of coordinate components that have to be present + * assuming that additional arguments follow the texel coordinates in the + * message payload. On IVB+ there is no need for padding, on ILK-SNB we + * need to pad to four or three components depending on the message, + * pre-ILK we need to pad to at most three components. + */ + const unsigned req_coord_components = + (devinfo->gen >= 7 || + !inst->components_read(TEX_LOGICAL_SRC_COORDINATE)) ? 0 : + (devinfo->gen >= 5 && inst->opcode != SHADER_OPCODE_TXF_LOGICAL && + inst->opcode != SHADER_OPCODE_TXF_CMS_LOGICAL) ? 4 : + 3; + + /* On Gen9+ the LOD argument is for free if we're able to use the LZ + * variant of the TXL or TXF message. + */ + const bool implicit_lod = devinfo->gen >= 9 && + (inst->opcode == SHADER_OPCODE_TXL || + inst->opcode == SHADER_OPCODE_TXF) && + inst->src[TEX_LOGICAL_SRC_LOD].is_zero(); + + /* Calculate the total number of argument components that need to be passed + * to the sampler unit. + */ + const unsigned num_payload_components = + MAX2(inst->components_read(TEX_LOGICAL_SRC_COORDINATE), + req_coord_components) + + inst->components_read(TEX_LOGICAL_SRC_SHADOW_C) + + (implicit_lod ? 0 : inst->components_read(TEX_LOGICAL_SRC_LOD)) + + inst->components_read(TEX_LOGICAL_SRC_LOD2) + + inst->components_read(TEX_LOGICAL_SRC_SAMPLE_INDEX) + + (inst->opcode == SHADER_OPCODE_TG4_OFFSET_LOGICAL ? + inst->components_read(TEX_LOGICAL_SRC_TG4_OFFSET) : 0) + + inst->components_read(TEX_LOGICAL_SRC_MCS); + + /* SIMD16 messages with more than five arguments exceed the maximum message + * size supported by the sampler, regardless of whether a header is + * provided or not. + */ + return MIN2(inst->exec_size, + num_payload_components > MAX_SAMPLER_MESSAGE_SIZE / 2 ? 8 : 16); +} + +/** * Get the closest native SIMD width supported by the hardware for instruction * \p inst. The instruction will be left untouched by * fs_visitor::lower_simd_width() if the returned value is equal to the * original execution size. */ static unsigned -get_lowered_simd_width(const struct brw_device_info *devinfo, +get_lowered_simd_width(const struct gen_device_info *devinfo, const fs_inst *inst) { switch (inst->opcode) { @@ -4909,7 +4773,6 @@ case FS_OPCODE_PACK_HALF_2x16_SPLIT: case FS_OPCODE_UNPACK_HALF_2x16_SPLIT_X: case FS_OPCODE_UNPACK_HALF_2x16_SPLIT_Y: - case FS_OPCODE_INTERPOLATE_AT_CENTROID: case FS_OPCODE_INTERPOLATE_AT_SAMPLE: case FS_OPCODE_INTERPOLATE_AT_SHARED_OFFSET: case FS_OPCODE_INTERPOLATE_AT_PER_SLOT_OFFSET: @@ -4971,6 +4834,9 @@ return (inst->src[FB_WRITE_LOGICAL_SRC_COLOR1].file != BAD_FILE ? 8 : MIN2(16, inst->exec_size)); + case FS_OPCODE_FB_READ_LOGICAL: + return MIN2(16, inst->exec_size); + case SHADER_OPCODE_TEX_LOGICAL: case SHADER_OPCODE_TXF_CMS_LOGICAL: case SHADER_OPCODE_TXF_UMS_LOGICAL: @@ -4978,31 +4844,24 @@ case SHADER_OPCODE_LOD_LOGICAL: case SHADER_OPCODE_TG4_LOGICAL: case SHADER_OPCODE_SAMPLEINFO_LOGICAL: - return MIN2(16, inst->exec_size); + case SHADER_OPCODE_TXF_CMS_W_LOGICAL: + case SHADER_OPCODE_TG4_OFFSET_LOGICAL: + return get_sampler_lowered_simd_width(devinfo, inst); case SHADER_OPCODE_TXD_LOGICAL: /* TXD is unsupported in SIMD16 mode. */ return 8; - case SHADER_OPCODE_TG4_OFFSET_LOGICAL: { - /* gather4_po_c is unsupported in SIMD16 mode. */ - const fs_reg &shadow_c = inst->src[TEX_LOGICAL_SRC_SHADOW_C]; - return (shadow_c.file != BAD_FILE ? 8 : MIN2(16, inst->exec_size)); - } case SHADER_OPCODE_TXL_LOGICAL: - case FS_OPCODE_TXB_LOGICAL: { - /* Gen4 doesn't have SIMD8 non-shadow-compare bias/LOD instructions, and - * Gen4-6 can't support TXL and TXB with shadow comparison in SIMD16 - * mode because the message exceeds the maximum length of 11. + case FS_OPCODE_TXB_LOGICAL: + /* Only one execution size is representable pre-ILK depending on whether + * the shadow reference argument is present. */ - const fs_reg &shadow_c = inst->src[TEX_LOGICAL_SRC_SHADOW_C]; - if (devinfo->gen == 4 && shadow_c.file == BAD_FILE) - return 16; - else if (devinfo->gen < 7 && shadow_c.file != BAD_FILE) - return 8; + if (devinfo->gen == 4) + return inst->src[TEX_LOGICAL_SRC_SHADOW_C].file == BAD_FILE ? 16 : 8; else - return MIN2(16, inst->exec_size); - } + return get_sampler_lowered_simd_width(devinfo, inst); + case SHADER_OPCODE_TXF_LOGICAL: case SHADER_OPCODE_TXS_LOGICAL: /* Gen4 doesn't have SIMD8 variants for the RESINFO and LD-with-LOD @@ -5011,23 +4870,7 @@ if (devinfo->gen == 4) return 16; else - return MIN2(16, inst->exec_size); - - case SHADER_OPCODE_TXF_CMS_W_LOGICAL: { - /* This opcode can take up to 6 arguments which means that in some - * circumstances it can end up with a message that is too long in SIMD16 - * mode. - */ - const unsigned coord_components = - inst->src[TEX_LOGICAL_SRC_COORD_COMPONENTS].ud; - /* First three arguments are the sample index and the two arguments for - * the MCS data. - */ - if ((coord_components + 3) * 2 > MAX_SAMPLER_MESSAGE_SIZE) - return 8; - else - return MIN2(16, inst->exec_size); - } + return get_sampler_lowered_simd_width(devinfo, inst); case SHADER_OPCODE_TYPED_ATOMIC_LOGICAL: case SHADER_OPCODE_TYPED_SURFACE_READ_LOGICAL: @@ -5145,8 +4988,7 @@ * the results of multiple lowered instructions in order to make sure that * they end up arranged correctly in the original destination region. */ - if (inst->regs_written * REG_SIZE > - inst->dst.component_size(inst->exec_size)) + if (inst->size_written > inst->dst.component_size(inst->exec_size)) return true; /* If the lowered execution size is larger than the original the result of @@ -5169,8 +5011,8 @@ * group which could cause one of the lowered instructions to overwrite * the data read from the same source by other lowered instructions. */ - if (regions_overlap(inst->dst, inst->regs_written * REG_SIZE, - inst->src[i], inst->regs_read(i) * REG_SIZE) && + if (regions_overlap(inst->dst, inst->size_written, + inst->src[i], inst->size_read(i)) && !inst->dst.equals(inst->src[i])) return true; } @@ -5196,8 +5038,8 @@ /* Specified channel group from the destination region. */ const fs_reg dst = horiz_offset(inst->dst, lbld.group()); - const unsigned dst_size = inst->regs_written * REG_SIZE / - inst->dst.component_size(inst->exec_size); + const unsigned dst_size = inst->size_written / + inst->dst.component_size(inst->exec_size); if (needs_dst_copy(lbld, inst)) { const fs_reg tmp = lbld.vgrf(inst->dst.type, dst_size); @@ -5249,7 +5091,7 @@ * original or the lowered instruction, whichever is lower. */ const unsigned n = DIV_ROUND_UP(inst->exec_size, lower_width); - const unsigned dst_size = inst->regs_written * REG_SIZE / + const unsigned dst_size = inst->size_written / inst->dst.component_size(inst->exec_size); assert(!inst->writes_accumulator && !inst->mlen); @@ -5273,9 +5115,8 @@ split_inst.src[j] = emit_unzip(lbld, block, inst, j); split_inst.dst = emit_zip(lbld, block, inst); - split_inst.regs_written = DIV_ROUND_UP( - split_inst.dst.component_size(lower_width) * dst_size, - REG_SIZE); + split_inst.size_written = + split_inst.dst.component_size(lower_width) * dst_size; lbld.emit(split_inst); } @@ -5365,13 +5206,13 @@ fprintf(file, "(mlen: %d) ", inst->mlen); } + if (inst->eot) { + fprintf(file, "(EOT) "); + } + switch (inst->dst.file) { case VGRF: fprintf(file, "vgrf%d", inst->dst.nr); - if (alloc.sizes[inst->dst.nr] != inst->regs_written || - inst->dst.subreg_offset) - fprintf(file, "+%d.%d", - inst->dst.reg_offset, inst->dst.subreg_offset); break; case FIXED_GRF: fprintf(file, "g%d", inst->dst.nr); @@ -5383,10 +5224,10 @@ fprintf(file, "(null)"); break; case UNIFORM: - fprintf(file, "***u%d***", inst->dst.nr + inst->dst.reg_offset); + fprintf(file, "***u%d***", inst->dst.nr); break; case ATTR: - fprintf(file, "***attr%d***", inst->dst.nr + inst->dst.reg_offset); + fprintf(file, "***attr%d***", inst->dst.nr); break; case ARF: switch (inst->dst.nr) { @@ -5406,12 +5247,19 @@ fprintf(file, "arf%d.%d", inst->dst.nr & 0xf, inst->dst.subnr); break; } - if (inst->dst.subnr) - fprintf(file, "+%d", inst->dst.subnr); break; case IMM: unreachable("not reached"); } + + if (inst->dst.offset || + (inst->dst.file == VGRF && + alloc.sizes[inst->dst.nr] * REG_SIZE != inst->size_written)) { + const unsigned reg_size = (inst->dst.file == UNIFORM ? 4 : REG_SIZE); + fprintf(file, "+%d.%d", inst->dst.offset / reg_size, + inst->dst.offset % reg_size); + } + if (inst->dst.stride != 1) fprintf(file, "<%u>", inst->dst.stride); fprintf(file, ":%s, ", brw_reg_type_letters(inst->dst.type)); @@ -5424,10 +5272,6 @@ switch (inst->src[i].file) { case VGRF: fprintf(file, "vgrf%d", inst->src[i].nr); - if (alloc.sizes[inst->src[i].nr] != (unsigned)inst->regs_read(i) || - inst->src[i].subreg_offset) - fprintf(file, "+%d.%d", inst->src[i].reg_offset, - inst->src[i].subreg_offset); break; case FIXED_GRF: fprintf(file, "g%d", inst->src[i].nr); @@ -5436,14 +5280,10 @@ fprintf(file, "***m%d***", inst->src[i].nr); break; case ATTR: - fprintf(file, "attr%d+%d", inst->src[i].nr, inst->src[i].reg_offset); + fprintf(file, "attr%d", inst->src[i].nr); break; case UNIFORM: - fprintf(file, "u%d", inst->src[i].nr + inst->src[i].reg_offset); - if (inst->src[i].subreg_offset) { - fprintf(file, "+%d.%d", inst->src[i].reg_offset, - inst->src[i].subreg_offset); - } + fprintf(file, "u%d", inst->src[i].nr); break; case BAD_FILE: fprintf(file, "(null)"); @@ -5494,10 +5334,17 @@ fprintf(file, "arf%d.%d", inst->src[i].nr & 0xf, inst->src[i].subnr); break; } - if (inst->src[i].subnr) - fprintf(file, "+%d", inst->src[i].subnr); break; } + + if (inst->src[i].offset || + (inst->src[i].file == VGRF && + alloc.sizes[inst->src[i].nr] * REG_SIZE != inst->size_read(i))) { + const unsigned reg_size = (inst->src[i].file == UNIFORM ? 4 : REG_SIZE); + fprintf(file, "+%d.%d", inst->src[i].offset / reg_size, + inst->src[i].offset % reg_size); + } + if (inst->src[i].abs) fprintf(file, "|"); @@ -5561,11 +5408,7 @@ fs_visitor::setup_fs_payload_gen6() { assert(stage == MESA_SHADER_FRAGMENT); - brw_wm_prog_data *prog_data = (brw_wm_prog_data*) this->prog_data; - - unsigned barycentric_interp_modes = - (stage == MESA_SHADER_FRAGMENT) ? - ((brw_wm_prog_data*) this->prog_data)->barycentric_interp_modes : 0; + struct brw_wm_prog_data *prog_data = brw_wm_prog_data(this->prog_data); assert(devinfo->gen >= 6); @@ -5574,14 +5417,14 @@ /* R2: only for 32-pixel dispatch.*/ /* R3-26: barycentric interpolation coordinates. These appear in the - * same order that they appear in the brw_wm_barycentric_interp_mode + * same order that they appear in the brw_barycentric_mode * enum. Each set of coordinates occupies 2 registers if dispatch width * == 8 and 4 registers if dispatch width == 16. Coordinates only * appear if they were enabled using the "Barycentric Interpolation * Mode" bits in WM_STATE. */ - for (int i = 0; i < BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT; ++i) { - if (barycentric_interp_modes & (1 << i)) { + for (int i = 0; i < BRW_BARYCENTRIC_MODE_COUNT; ++i) { + if (prog_data->barycentric_interp_modes & (1 << i)) { payload.barycentric_coord_reg[i] = payload.num_regs; payload.num_regs += 2; if (dispatch_width == 16) { @@ -5592,7 +5435,7 @@ /* R27: interpolated depth if uses source depth */ prog_data->uses_src_depth = - (nir->info.inputs_read & (1 << VARYING_SLOT_POS)) != 0; + (nir->info->inputs_read & (1 << VARYING_SLOT_POS)) != 0; if (prog_data->uses_src_depth) { payload.source_depth_reg = payload.num_regs; payload.num_regs++; @@ -5604,7 +5447,7 @@ /* R29: interpolated W set if GEN6_WM_USES_SOURCE_W. */ prog_data->uses_src_w = - (nir->info.inputs_read & (1 << VARYING_SLOT_POS)) != 0; + (nir->info->inputs_read & (1 << VARYING_SLOT_POS)) != 0; if (prog_data->uses_src_w) { payload.source_w_reg = payload.num_regs; payload.num_regs++; @@ -5616,7 +5459,7 @@ /* R31: MSAA position offsets. */ if (prog_data->persample_dispatch && - (nir->info.system_values_read & SYSTEM_BIT_SAMPLE_POS)) { + (nir->info->system_values_read & SYSTEM_BIT_SAMPLE_POS)) { /* From the Ivy Bridge PRM documentation for 3DSTATE_PS: * * "MSDISPMODE_PERSAMPLE is required in order to select @@ -5633,7 +5476,7 @@ /* R32: MSAA input coverage mask */ prog_data->uses_sample_mask = - (nir->info.system_values_read & SYSTEM_BIT_SAMPLE_MASK_IN) != 0; + (nir->info->system_values_read & SYSTEM_BIT_SAMPLE_MASK_IN) != 0; if (prog_data->uses_sample_mask) { assert(devinfo->gen >= 7); payload.sample_mask_in_reg = payload.num_regs; @@ -5647,7 +5490,7 @@ /* R34-: bary for 32-pixel. */ /* R58-59: interp W for 32-pixel. */ - if (nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) { + if (nir->info->outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) { source_depth_to_render_target = true; } } @@ -5664,10 +5507,8 @@ { assert(stage == MESA_SHADER_GEOMETRY); - struct brw_gs_prog_data *gs_prog_data = - (struct brw_gs_prog_data *) prog_data; - struct brw_vue_prog_data *vue_prog_data = - (struct brw_vue_prog_data *) prog_data; + struct brw_gs_prog_data *gs_prog_data = brw_gs_prog_data(prog_data); + struct brw_vue_prog_data *vue_prog_data = brw_vue_prog_data(prog_data); /* R0: thread header, R1: output URB handles */ payload.num_regs = 2; @@ -5686,15 +5527,15 @@ * Note that the GS reads HWords for every vertex - so we * have to multiply by VerticesIn to obtain the total storage requirement. */ - if (8 * vue_prog_data->urb_read_length * nir->info.gs.vertices_in > + if (8 * vue_prog_data->urb_read_length * nir->info->gs.vertices_in > max_push_components || gs_prog_data->invocations > 1) { gs_prog_data->base.include_vue_handles = true; /* R3..RN: ICP Handles for each incoming vertex (when using pull model) */ - payload.num_regs += nir->info.gs.vertices_in; + payload.num_regs += nir->info->gs.vertices_in; vue_prog_data->urb_read_length = - ROUND_DOWN_TO(max_push_components / nir->info.gs.vertices_in, 8) / 8; + ROUND_DOWN_TO(max_push_components / nir->info->gs.vertices_in, 8) / 8; } } @@ -5795,7 +5636,7 @@ if (unlikely(INTEL_DEBUG & DEBUG_OPTIMIZER) && this_progress) { \ char filename[64]; \ snprintf(filename, 64, "%s%d-%s-%02d-%02d-" #pass, \ - stage_abbrev, dispatch_width, nir->info.name, iteration, pass_num); \ + stage_abbrev, dispatch_width, nir->info->name, iteration, pass_num); \ \ backend_shader::dump_instructions(filename); \ } \ @@ -5809,7 +5650,7 @@ if (unlikely(INTEL_DEBUG & DEBUG_OPTIMIZER)) { char filename[64]; snprintf(filename, 64, "%s%d-%s-00-00-start", - stage_abbrev, dispatch_width, nir->info.name); + stage_abbrev, dispatch_width, nir->info->name); backend_shader::dump_instructions(filename); } @@ -5847,6 +5688,16 @@ progress = false; pass_num = 0; + if (OPT(lower_pack)) { + OPT(register_coalesce); + OPT(dead_code_eliminate); + } + + if (OPT(lower_d2x)) { + OPT(opt_copy_propagation); + OPT(dead_code_eliminate); + } + OPT(lower_simd_width); /* After SIMD lowering just in case we had to unroll the EOT send. */ @@ -5883,16 +5734,6 @@ OPT(dead_code_eliminate); } - if (OPT(lower_pack)) { - OPT(register_coalesce); - OPT(dead_code_eliminate); - } - - if (OPT(lower_d2x)) { - OPT(opt_copy_propagation); - OPT(dead_code_eliminate); - } - OPT(opt_combine_constants); OPT(lower_integer_multiplication); @@ -5960,6 +5801,9 @@ } if (!allocated_without_spills) { + if (!allow_spilling) + fail("Failure to register allocate and spilling is not allowed."); + /* We assume that any spilling is worse than just dropping back to * SIMD8. There's probably actually some intermediate point where * SIMD16 with a couple of spills is still better. @@ -5984,8 +5828,6 @@ } } - assert(last_scratch == 0 || allow_spilling); - /* This must come after all optimization and register allocation, since * it inserts dead code that happens to have side effects, and it does * so based on the actual physical registers in use. @@ -5998,7 +5840,7 @@ schedule_instructions(SCHEDULE_POST); if (last_scratch > 0) { - unsigned max_scratch_size = 2 * 1024 * 1024; + MAYBE_UNUSED unsigned max_scratch_size = 2 * 1024 * 1024; prog_data->total_scratch = brw_get_scratch_size(last_scratch); @@ -6074,8 +5916,7 @@ { assert(stage == MESA_SHADER_TESS_CTRL); - struct brw_tcs_prog_data *tcs_prog_data = - (struct brw_tcs_prog_data *) prog_data; + struct brw_tcs_prog_data *tcs_prog_data = brw_tcs_prog_data(prog_data); /* r1-r4 contain the ICP handles. */ payload.num_regs = 5; @@ -6105,15 +5946,15 @@ } /* Fix the disptach mask */ - if (nir->info.tcs.vertices_out % 8) { + if (nir->info->tess.tcs_vertices_out % 8) { bld.CMP(bld.null_reg_ud(), invocation_id, - brw_imm_ud(nir->info.tcs.vertices_out), BRW_CONDITIONAL_L); + brw_imm_ud(nir->info->tess.tcs_vertices_out), BRW_CONDITIONAL_L); bld.IF(BRW_PREDICATE_NORMAL); } emit_nir_code(); - if (nir->info.tcs.vertices_out % 8) { + if (nir->info->tess.tcs_vertices_out % 8) { bld.emit(BRW_OPCODE_ENDIF); } @@ -6129,7 +5970,6 @@ fs_inst *inst = bld.emit(SHADER_OPCODE_URB_WRITE_SIMD8_MASKED, bld.null_reg_ud(), payload); inst->mlen = 3; - inst->base_mrf = -1; inst->eot = true; if (shader_time_index >= 0) @@ -6237,7 +6077,7 @@ bool fs_visitor::run_fs(bool allow_spilling, bool do_rep_send) { - brw_wm_prog_data *wm_prog_data = (brw_wm_prog_data *) this->prog_data; + struct brw_wm_prog_data *wm_prog_data = brw_wm_prog_data(this->prog_data); brw_wm_prog_key *wm_key = (brw_wm_prog_key *) this->key; assert(stage == MESA_SHADER_FRAGMENT); @@ -6257,7 +6097,8 @@ emit_shader_time_begin(); calculate_urb_setup(); - if (nir->info.inputs_read > 0) { + if (nir->info->inputs_read > 0 || + (nir->info->outputs_read > 0 && !wm_key->coherent_fb_fetch)) { if (devinfo->gen < 6) emit_interpolation_setup_gen4(); else @@ -6321,7 +6162,7 @@ if (devinfo->is_haswell && prog_data->total_shared > 0) { /* Move SLM index from g0.0[27:24] to sr0.1[11:8] */ const fs_builder abld = bld.exec_all().group(1, 0); - abld.MOV(retype(suboffset(brw_sr0_reg(), 1), BRW_REGISTER_TYPE_UW), + abld.MOV(retype(brw_sr0_reg(1), BRW_REGISTER_TYPE_UW), suboffset(retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UW), 1)); } @@ -6352,62 +6193,47 @@ /** * Return a bitfield where bit n is set if barycentric interpolation mode n - * (see enum brw_wm_barycentric_interp_mode) is needed by the fragment shader. + * (see enum brw_barycentric_mode) is needed by the fragment shader. + * + * We examine the load_barycentric intrinsics rather than looking at input + * variables so that we catch interpolateAtCentroid() messages too, which + * also need the BRW_BARYCENTRIC_[NON]PERSPECTIVE_CENTROID mode set up. */ static unsigned -brw_compute_barycentric_interp_modes(const struct brw_device_info *devinfo, - bool shade_model_flat, - bool persample_shading, +brw_compute_barycentric_interp_modes(const struct gen_device_info *devinfo, const nir_shader *shader) { unsigned barycentric_interp_modes = 0; - nir_foreach_variable(var, &shader->inputs) { - enum glsl_interp_qualifier interp_qualifier = - (enum glsl_interp_qualifier)var->data.interpolation; - bool is_centroid = var->data.centroid && !persample_shading; - bool is_sample = var->data.sample || persample_shading; - bool is_gl_Color = (var->data.location == VARYING_SLOT_COL0) || - (var->data.location == VARYING_SLOT_COL1); - - /* Ignore WPOS and FACE, because they don't require interpolation. */ - if (var->data.location == VARYING_SLOT_POS || - var->data.location == VARYING_SLOT_FACE) + nir_foreach_function(f, shader) { + if (!f->impl) continue; - /* Determine the set (or sets) of barycentric coordinates needed to - * interpolate this variable. Note that when - * brw->needs_unlit_centroid_workaround is set, centroid interpolation - * uses PIXEL interpolation for unlit pixels and CENTROID interpolation - * for lit pixels, so we need both sets of barycentric coordinates. - */ - if (interp_qualifier == INTERP_QUALIFIER_NOPERSPECTIVE) { - if (is_centroid) { - barycentric_interp_modes |= - 1 << BRW_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC; - } else if (is_sample) { - barycentric_interp_modes |= - 1 << BRW_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC; - } - if ((!is_centroid && !is_sample) || - devinfo->needs_unlit_centroid_workaround) { - barycentric_interp_modes |= - 1 << BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC; - } - } else if (interp_qualifier == INTERP_QUALIFIER_SMOOTH || - (!(shade_model_flat && is_gl_Color) && - interp_qualifier == INTERP_QUALIFIER_NONE)) { - if (is_centroid) { - barycentric_interp_modes |= - 1 << BRW_WM_PERSPECTIVE_CENTROID_BARYCENTRIC; - } else if (is_sample) { - barycentric_interp_modes |= - 1 << BRW_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC; - } - if ((!is_centroid && !is_sample) || - devinfo->needs_unlit_centroid_workaround) { - barycentric_interp_modes |= - 1 << BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC; + nir_foreach_block(block, f->impl) { + nir_foreach_instr(instr, block) { + if (instr->type != nir_instr_type_intrinsic) + continue; + + nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr); + if (intrin->intrinsic != nir_intrinsic_load_interpolated_input) + continue; + + /* Ignore WPOS; it doesn't require interpolation. */ + if (nir_intrinsic_base(intrin) == VARYING_SLOT_POS) + continue; + + intrin = nir_instr_as_intrinsic(intrin->src[0].ssa->parent_instr); + enum glsl_interp_mode interp = (enum glsl_interp_mode) + nir_intrinsic_interp_mode(intrin); + nir_intrinsic_op bary_op = intrin->intrinsic; + enum brw_barycentric_mode bary = + brw_barycentric_mode(interp, bary_op); + + barycentric_interp_modes |= 1 << bary; + + if (devinfo->needs_unlit_centroid_workaround && + bary_op == nir_intrinsic_load_barycentric_centroid) + barycentric_interp_modes |= 1 << centroid_to_pixel(bary); } } } @@ -6417,25 +6243,18 @@ static void brw_compute_flat_inputs(struct brw_wm_prog_data *prog_data, - bool shade_model_flat, const nir_shader *shader) + const nir_shader *shader) { prog_data->flat_inputs = 0; nir_foreach_variable(var, &shader->inputs) { - enum glsl_interp_qualifier interp_qualifier = - (enum glsl_interp_qualifier)var->data.interpolation; - bool is_gl_Color = (var->data.location == VARYING_SLOT_COL0) || - (var->data.location == VARYING_SLOT_COL1); - int input_index = prog_data->urb_setup[var->data.location]; if (input_index < 0) continue; /* flat shading */ - if (interp_qualifier == INTERP_QUALIFIER_FLAT || - (shade_model_flat && is_gl_Color && - interp_qualifier == INTERP_QUALIFIER_NONE)) + if (var->data.interpolation == INTERP_MODE_FLAT) prog_data->flat_inputs |= (1 << input_index); } } @@ -6443,8 +6262,8 @@ static uint8_t computed_depth_mode(const nir_shader *shader) { - if (shader->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) { - switch (shader->info.fs.depth_layout) { + if (shader->info->outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) { + switch (shader->info->fs.depth_layout) { case FRAG_DEPTH_LAYOUT_NONE: case FRAG_DEPTH_LAYOUT_ANY: return BRW_PSCDEPTH_ON; @@ -6459,6 +6278,118 @@ return BRW_PSCDEPTH_OFF; } +/** + * Move load_interpolated_input with simple (payload-based) barycentric modes + * to the top of the program so we don't emit multiple PLNs for the same input. + * + * This works around CSE not being able to handle non-dominating cases + * such as: + * + * if (...) { + * interpolate input + * } else { + * interpolate the same exact input + * } + * + * This should be replaced by global value numbering someday. + */ +void +move_interpolation_to_top(nir_shader *nir) +{ + nir_foreach_function(f, nir) { + if (!f->impl) + continue; + + nir_block *top = nir_start_block(f->impl); + exec_node *cursor_node = NULL; + + nir_foreach_block(block, f->impl) { + if (block == top) + continue; + + nir_foreach_instr_safe(instr, block) { + if (instr->type != nir_instr_type_intrinsic) + continue; + + nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr); + if (intrin->intrinsic != nir_intrinsic_load_interpolated_input) + continue; + nir_intrinsic_instr *bary_intrinsic = + nir_instr_as_intrinsic(intrin->src[0].ssa->parent_instr); + nir_intrinsic_op op = bary_intrinsic->intrinsic; + + /* Leave interpolateAtSample/Offset() where they are. */ + if (op == nir_intrinsic_load_barycentric_at_sample || + op == nir_intrinsic_load_barycentric_at_offset) + continue; + + nir_instr *move[3] = { + &bary_intrinsic->instr, + intrin->src[1].ssa->parent_instr, + instr + }; + + for (unsigned i = 0; i < ARRAY_SIZE(move); i++) { + if (move[i]->block != top) { + move[i]->block = top; + exec_node_remove(&move[i]->node); + if (cursor_node) { + exec_node_insert_after(cursor_node, &move[i]->node); + } else { + exec_list_push_head(&top->instr_list, &move[i]->node); + } + cursor_node = &move[i]->node; + } + } + } + } + nir_metadata_preserve(f->impl, (nir_metadata) + ((unsigned) nir_metadata_block_index | + (unsigned) nir_metadata_dominance)); + } +} + +/** + * Demote per-sample barycentric intrinsics to centroid. + * + * Useful when rendering to a non-multisampled buffer. + */ +static void +demote_sample_qualifiers(nir_shader *nir) +{ + nir_foreach_function(f, nir) { + if (!f->impl) + continue; + + nir_builder b; + nir_builder_init(&b, f->impl); + + nir_foreach_block(block, f->impl) { + nir_foreach_instr_safe(instr, block) { + if (instr->type != nir_instr_type_intrinsic) + continue; + + nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr); + if (intrin->intrinsic != nir_intrinsic_load_barycentric_sample && + intrin->intrinsic != nir_intrinsic_load_barycentric_at_sample) + continue; + + b.cursor = nir_before_instr(instr); + nir_ssa_def *centroid = + nir_load_barycentric(&b, nir_intrinsic_load_barycentric_centroid, + nir_intrinsic_interp_mode(intrin)); + nir_ssa_def_rewrite_uses(&intrin->dest.ssa, + nir_src_for_ssa(centroid)); + nir_instr_remove(instr); + } + } + + nir_metadata_preserve(f->impl, (nir_metadata) + ((unsigned) nir_metadata_block_index | + (unsigned) nir_metadata_dominance)); + } +} + const unsigned * brw_compile_fs(const struct brw_compiler *compiler, void *log_data, void *mem_ctx, @@ -6468,41 +6399,51 @@ struct gl_program *prog, int shader_time_index8, int shader_time_index16, bool allow_spilling, - bool use_rep_send, + bool use_rep_send, struct brw_vue_map *vue_map, unsigned *final_assembly_size, char **error_str) { + const struct gen_device_info *devinfo = compiler->devinfo; + nir_shader *shader = nir_shader_clone(mem_ctx, src_shader); - shader = brw_nir_apply_sampler_key(shader, compiler->devinfo, &key->tex, - true); - brw_nir_lower_fs_inputs(shader); + shader = brw_nir_apply_sampler_key(shader, compiler, &key->tex, true); + brw_nir_lower_fs_inputs(shader, devinfo, key); brw_nir_lower_fs_outputs(shader); - shader = brw_postprocess_nir(shader, compiler->devinfo, true); + + if (devinfo->gen < 6) { + brw_setup_vue_interpolation(vue_map, shader, prog_data, devinfo); + } + + if (!key->multisample_fbo) + NIR_PASS_V(shader, demote_sample_qualifiers); + NIR_PASS_V(shader, move_interpolation_to_top); + shader = brw_postprocess_nir(shader, compiler, true); /* key->alpha_test_func means simulating alpha testing via discards, * so the shader definitely kills pixels. */ - prog_data->uses_kill = shader->info.fs.uses_discard || key->alpha_test_func; + prog_data->uses_kill = shader->info->fs.uses_discard || + key->alpha_test_func; prog_data->uses_omask = key->multisample_fbo && - shader->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK); + shader->info->outputs_written & BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK); prog_data->computed_depth_mode = computed_depth_mode(shader); prog_data->computed_stencil = - shader->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL); + shader->info->outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL); prog_data->persample_dispatch = key->multisample_fbo && (key->persample_interp || - (shader->info.system_values_read & (SYSTEM_BIT_SAMPLE_ID | - SYSTEM_BIT_SAMPLE_POS)) || - shader->info.fs.uses_sample_qualifier); - - prog_data->early_fragment_tests = shader->info.fs.early_fragment_tests; + (shader->info->system_values_read & (SYSTEM_BIT_SAMPLE_ID | + SYSTEM_BIT_SAMPLE_POS)) || + shader->info->fs.uses_sample_qualifier || + shader->info->outputs_read); + + prog_data->early_fragment_tests = shader->info->fs.early_fragment_tests; + prog_data->post_depth_coverage = shader->info->fs.post_depth_coverage; + prog_data->inner_coverage = shader->info->fs.inner_coverage; prog_data->barycentric_interp_modes = - brw_compute_barycentric_interp_modes(compiler->devinfo, - key->flat_shade, - key->persample_interp, - shader); + brw_compute_barycentric_interp_modes(compiler->devinfo, shader); cfg_t *simd8_cfg = NULL, *simd16_cfg = NULL; uint8_t simd8_grf_start = 0, simd16_grf_start = 0; @@ -6574,7 +6515,7 @@ * because it relies on prog_data->urb_setup which is computed in * fs_visitor::calculate_urb_setup(). */ - brw_compute_flat_inputs(prog_data, key->flat_shade, shader); + brw_compute_flat_inputs(prog_data, shader); fs_generator g(compiler, log_data, mem_ctx, (void *) key, &prog_data->base, v8.promoted_constants, v8.runtime_check_aads_emit, @@ -6582,9 +6523,9 @@ if (unlikely(INTEL_DEBUG & DEBUG_WM)) { g.enable_debug(ralloc_asprintf(mem_ctx, "%s fragment shader %s", - shader->info.label ? shader->info.label : - "unnamed", - shader->info.name)); + shader->info->label ? + shader->info->label : "unnamed", + shader->info->name)); } if (simd8_cfg) { @@ -6636,11 +6577,10 @@ } static void -cs_fill_push_const_info(const struct brw_device_info *devinfo, +cs_fill_push_const_info(const struct gen_device_info *devinfo, struct brw_cs_prog_data *cs_prog_data) { - const struct brw_stage_prog_data *prog_data = - (struct brw_stage_prog_data*) cs_prog_data; + const struct brw_stage_prog_data *prog_data = &cs_prog_data->base; bool fill_thread_id = cs_prog_data->thread_local_id_index >= 0 && cs_prog_data->thread_local_id_index < (int)prog_data->nr_params; @@ -6702,8 +6642,7 @@ char **error_str) { nir_shader *shader = nir_shader_clone(mem_ctx, src_shader); - shader = brw_nir_apply_sampler_key(shader, compiler->devinfo, &key->tex, - true); + shader = brw_nir_apply_sampler_key(shader, compiler, &key->tex, true); brw_nir_lower_cs_shared(shader); prog_data->base.total_shared += shader->num_shared; @@ -6716,14 +6655,14 @@ (unsigned)4 * (prog_data->thread_local_id_index + 1)); brw_nir_lower_intrinsics(shader, &prog_data->base); - shader = brw_postprocess_nir(shader, compiler->devinfo, true); + shader = brw_postprocess_nir(shader, compiler, true); - prog_data->local_size[0] = shader->info.cs.local_size[0]; - prog_data->local_size[1] = shader->info.cs.local_size[1]; - prog_data->local_size[2] = shader->info.cs.local_size[2]; + prog_data->local_size[0] = shader->info->cs.local_size[0]; + prog_data->local_size[1] = shader->info->cs.local_size[1]; + prog_data->local_size[2] = shader->info->cs.local_size[2]; unsigned local_workgroup_size = - shader->info.cs.local_size[0] * shader->info.cs.local_size[1] * - shader->info.cs.local_size[2]; + shader->info->cs.local_size[0] * shader->info->cs.local_size[1] * + shader->info->cs.local_size[2]; unsigned max_cs_threads = compiler->devinfo->max_cs_threads; unsigned simd_required = DIV_ROUND_UP(local_workgroup_size, max_cs_threads); @@ -6813,9 +6752,9 @@ MESA_SHADER_COMPUTE); if (INTEL_DEBUG & DEBUG_CS) { char *name = ralloc_asprintf(mem_ctx, "%s compute shader %s", - shader->info.label ? shader->info.label : + shader->info->label ? shader->info->label : "unnamed", - shader->info.name); + shader->info->name); g.enable_debug(name); } @@ -6823,3 +6762,33 @@ return g.get_assembly(final_assembly_size); } + +/** + * Test the dispatch mask packing assumptions of + * brw_stage_has_packed_dispatch(). Call this from e.g. the top of + * fs_visitor::emit_nir_code() to cause a GPU hang if any shader invocation is + * executed with an unexpected dispatch mask. + */ +static UNUSED void +brw_fs_test_dispatch_packing(const fs_builder &bld) +{ + const gl_shader_stage stage = bld.shader->stage; + + if (brw_stage_has_packed_dispatch(bld.shader->devinfo, stage, + bld.shader->stage_prog_data)) { + const fs_builder ubld = bld.exec_all().group(1, 0); + const fs_reg tmp = component(bld.vgrf(BRW_REGISTER_TYPE_UD), 0); + const fs_reg mask = (stage == MESA_SHADER_FRAGMENT ? brw_vmask_reg() : + brw_dmask_reg()); + + ubld.ADD(tmp, mask, brw_imm_ud(1)); + ubld.AND(tmp, mask, tmp); + + /* This will loop forever if the dispatch mask doesn't have the expected + * form '2^n-1', in which case tmp will be non-zero. + */ + bld.emit(BRW_OPCODE_DO); + bld.CMP(bld.null_reg_ud(), tmp, brw_imm_ud(0), BRW_CONDITIONAL_NZ); + set_predicate(BRW_PREDICATE_NORMAL, bld.emit(BRW_OPCODE_WHILE)); + } +} diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_cse.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_cse.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_cse.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_cse.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -71,6 +71,7 @@ case BRW_OPCODE_PLN: case BRW_OPCODE_MAD: case BRW_OPCODE_LRP: + case FS_OPCODE_FB_READ_LOGICAL: case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD: case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_LOGICAL: case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7: @@ -184,12 +185,13 @@ a->dst.type == b->dst.type && a->offset == b->offset && a->mlen == b->mlen && - a->regs_written == b->regs_written && + a->size_written == b->size_written && a->base_mrf == b->base_mrf && a->eot == b->eot && a->header_size == b->header_size && a->shadow_compare == b->shadow_compare && a->pi_noperspective == b->pi_noperspective && + a->target == b->target && a->sources == b->sources && operands_match(a, b, negate); } @@ -197,8 +199,8 @@ static void create_copy_instr(const fs_builder &bld, fs_inst *inst, fs_reg src, bool negate) { - int written = inst->regs_written; - int dst_width = + unsigned written = regs_written(inst); + unsigned dst_width = DIV_ROUND_UP(inst->dst.component_size(inst->exec_size), REG_SIZE); fs_inst *copy; @@ -219,7 +221,7 @@ payload = ralloc_array(bld.shader->mem_ctx, fs_reg, sources); for (int i = 0; i < header_size; i++) { payload[i] = src; - src.reg_offset++; + src.offset += REG_SIZE; } for (int i = header_size; i < sources; i++) { payload[i] = src; @@ -232,7 +234,7 @@ copy->force_writemask_all = inst->force_writemask_all; copy->src[0].negate = negate; } - assert(copy->regs_written == written); + assert(regs_written(copy) == written); } bool @@ -282,7 +284,7 @@ if (no_existing_temp && !entry->generator->dst.is_null()) { const fs_builder ibld = fs_builder(this, block, entry->generator) .at(block, entry->generator->next); - int written = entry->generator->regs_written; + int written = regs_written(entry->generator); entry->tmp = fs_reg(VGRF, alloc.allocate(written), entry->generator->dst.type); @@ -294,7 +296,7 @@ /* dest <- temp */ if (!inst->dst.is_null()) { - assert(inst->regs_written == entry->generator->regs_written); + assert(inst->size_written == entry->generator->size_written); assert(inst->dst.type == entry->tmp.type); const fs_builder ibld(this, block, inst); @@ -333,7 +335,9 @@ /* Kill all AEB entries that use the destination we just * overwrote. */ - if (inst->overwrites_reg(entry->generator->src[i])) { + if (regions_overlap(inst->dst, inst->size_written, + entry->generator->src[i], + entry->generator->size_read(i))) { entry->remove(); ralloc_free(entry); break; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -34,6 +34,42 @@ * yet in the tail end of this block. */ +/** + * Is it safe to eliminate the instruction? + */ +static bool +can_eliminate(const fs_inst *inst, BITSET_WORD *flag_live) +{ + return !inst->is_control_flow() && + !inst->has_side_effects() && + !(flag_live[0] & inst->flags_written()) && + !inst->writes_accumulator; +} + +/** + * Is it safe to omit the write, making the destination ARF null? + */ +static bool +can_omit_write(const fs_inst *inst) +{ + switch (inst->opcode) { + case SHADER_OPCODE_UNTYPED_ATOMIC: + case SHADER_OPCODE_UNTYPED_ATOMIC_LOGICAL: + case SHADER_OPCODE_TYPED_ATOMIC: + case SHADER_OPCODE_TYPED_ATOMIC_LOGICAL: + return true; + default: + /* We can eliminate the destination write for ordinary instructions, + * but not most SENDs. + */ + if (inst->opcode < 128 && inst->mlen == 0) + return true; + + /* It might not be safe for other virtual opcodes. */ + return false; + } +} + bool fs_visitor::dead_code_eliminate() { @@ -42,8 +78,8 @@ calculate_live_intervals(); int num_vars = live_intervals->num_vars; - BITSET_WORD *live = ralloc_array(NULL, BITSET_WORD, BITSET_WORDS(num_vars)); - BITSET_WORD *flag_live = ralloc_array(NULL, BITSET_WORD, 1); + BITSET_WORD *live = rzalloc_array(NULL, BITSET_WORD, BITSET_WORDS(num_vars)); + BITSET_WORD *flag_live = rzalloc_array(NULL, BITSET_WORD, 1); foreach_block_reverse_safe(block, cfg) { memcpy(live, live_intervals->block_data[block->num].liveout, @@ -52,43 +88,21 @@ sizeof(BITSET_WORD)); foreach_inst_in_block_reverse_safe(fs_inst, inst, block) { - if (inst->dst.file == VGRF && !inst->has_side_effects()) { + if (inst->dst.file == VGRF) { + const unsigned var = live_intervals->var_from_reg(inst->dst); bool result_live = false; - if (inst->regs_written == 1) { - int var = live_intervals->var_from_reg(inst->dst); - result_live = BITSET_TEST(live, var); - } else { - int var = live_intervals->var_from_reg(inst->dst); - for (int i = 0; i < inst->regs_written; i++) { - result_live = result_live || BITSET_TEST(live, var + i); - } - } - - if (!result_live) { - progress = true; - - if (inst->writes_accumulator || inst->flags_written()) { - inst->dst = fs_reg(retype(brw_null_reg(), inst->dst.type)); - } else { - inst->opcode = BRW_OPCODE_NOP; - } - } - } + for (unsigned i = 0; i < regs_written(inst); i++) + result_live |= BITSET_TEST(live, var + i); - if (inst->dst.is_null() && inst->flags_written()) { - if (!(flag_live[0] & inst->flags_written())) { - inst->opcode = BRW_OPCODE_NOP; + if (!result_live && + (can_omit_write(inst) || can_eliminate(inst, flag_live))) { + inst->dst = fs_reg(retype(brw_null_reg(), inst->dst.type)); progress = true; } } - if ((inst->opcode != BRW_OPCODE_IF && - inst->opcode != BRW_OPCODE_WHILE) && - inst->dst.is_null() && - !inst->has_side_effects() && - !inst->flags_written() && - !inst->writes_accumulator) { + if (inst->dst.is_null() && can_eliminate(inst, flag_live)) { inst->opcode = BRW_OPCODE_NOP; progress = true; } @@ -96,7 +110,7 @@ if (inst->dst.file == VGRF) { if (!inst->is_partial_write()) { int var = live_intervals->var_from_reg(inst->dst); - for (int i = 0; i < inst->regs_written; i++) { + for (unsigned i = 0; i < regs_written(inst); i++) { BITSET_CLEAR(live, var + i); } } @@ -114,7 +128,7 @@ if (inst->src[i].file == VGRF) { int var = live_intervals->var_from_reg(inst->src[i]); - for (int j = 0; j < inst->regs_read(i); j++) { + for (unsigned j = 0; j < regs_read(inst, i); j++) { BITSET_SET(live, var + j); } } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_generator.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_generator.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_generator.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_generator.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -56,7 +56,6 @@ static struct brw_reg brw_reg_from_fs_reg(fs_inst *inst, fs_reg *reg, unsigned gen, bool compressed) { - assert(reg->reg_offset == 0); struct brw_reg brw_reg; switch (reg->file) { @@ -97,14 +96,14 @@ } brw_reg = retype(brw_reg, reg->type); - brw_reg = byte_offset(brw_reg, reg->subreg_offset); + brw_reg = byte_offset(brw_reg, reg->offset); brw_reg.abs = reg->abs; brw_reg.negate = reg->negate; break; case ARF: case FIXED_GRF: case IMM: - assert(reg->subreg_offset == 0); + assert(reg->offset == 0); brw_reg = reg->as_brw_reg(); break; case BAD_FILE: @@ -199,7 +198,7 @@ { uint32_t msg_control; - brw_wm_prog_data *prog_data = (brw_wm_prog_data*) this->prog_data; + struct brw_wm_prog_data *prog_data = brw_wm_prog_data(this->prog_data); if (devinfo->gen < 6) { brw_push_insn_state(p); @@ -247,7 +246,7 @@ void fs_generator::generate_fb_write(fs_inst *inst, struct brw_reg payload) { - brw_wm_prog_data *prog_data = (brw_wm_prog_data*) this->prog_data; + struct brw_wm_prog_data *prog_data = brw_wm_prog_data(this->prog_data); const brw_wm_prog_key * const key = (brw_wm_prog_key * const) this->key; struct brw_reg implied_header; @@ -354,6 +353,22 @@ } void +fs_generator::generate_fb_read(fs_inst *inst, struct brw_reg dst, + struct brw_reg payload) +{ + assert(inst->size_written % REG_SIZE == 0); + struct brw_wm_prog_data *prog_data = brw_wm_prog_data(this->prog_data); + const unsigned surf_index = + prog_data->binding_table.render_target_start + inst->target; + + gen9_fb_READ(p, dst, payload, surf_index, + inst->header_size, inst->size_written / REG_SIZE, + prog_data->persample_dispatch); + + brw_mark_surface_used(&prog_data->base, surf_index); +} + +void fs_generator::generate_mov_indirect(fs_inst *inst, struct brw_reg dst, struct brw_reg reg, @@ -413,7 +428,7 @@ brw_ADD(p, addr, indirect_byte_offset, brw_imm_uw(imm_byte_offset)); struct brw_reg ind_src = brw_VxH_indirect(0, 0); - brw_inst *mov = brw_MOV(p, dst, retype(ind_src, dst.type)); + brw_inst *mov = brw_MOV(p, dst, retype(ind_src, reg.type)); if (devinfo->gen == 6 && dst.file == BRW_MESSAGE_REGISTER_FILE && !inst->get_next()->is_tail_sentinel() && @@ -435,6 +450,7 @@ struct brw_reg dst, struct brw_reg header) { + assert(inst->size_written % REG_SIZE == 0); assert(header.file == BRW_GENERAL_REGISTER_FILE); assert(header.type == BRW_REGISTER_TYPE_UD); @@ -450,7 +466,7 @@ brw_inst_set_urb_per_slot_offset(p->devinfo, send, true); brw_inst_set_mlen(p->devinfo, send, inst->mlen); - brw_inst_set_rlen(p->devinfo, send, inst->regs_written); + brw_inst_set_rlen(p->devinfo, send, inst->size_written / REG_SIZE); brw_inst_set_header_present(p->devinfo, send, true); brw_inst_set_urb_global_offset(p->devinfo, send, inst->offset); } @@ -492,7 +508,7 @@ insn = brw_next_insn(p, BRW_OPCODE_SEND); brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_UW)); - brw_set_src0(p, insn, payload); + brw_set_src0(p, insn, retype(payload, BRW_REGISTER_TYPE_UW)); brw_set_src1(p, insn, brw_imm_d(0)); /* Terminate a compute shader by sending a message to the thread spawner. @@ -608,6 +624,7 @@ struct brw_reg surface_index, struct brw_reg sampler_index) { + assert(inst->size_written % REG_SIZE == 0); int msg_type = -1; uint32_t simd_mode; uint32_t return_format; @@ -683,7 +700,7 @@ break; case SHADER_OPCODE_TXD: if (inst->shadow_compare) { - /* Gen7.5+. Otherwise, lowered by brw_lower_texture_gradients(). */ + /* Gen7.5+. Otherwise, lowered in NIR */ assert(devinfo->gen >= 8 || devinfo->is_haswell); msg_type = HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE; } else { @@ -878,7 +895,7 @@ surface + base_binding_table_index, sampler % 16, msg_type, - inst->regs_written, + inst->size_written / REG_SIZE, inst->mlen, inst->header_size != 0, simd_mode, @@ -899,8 +916,12 @@ if (brw_regs_equal(&surface_reg, &sampler_reg)) { brw_MUL(p, addr, sampler_reg, brw_imm_uw(0x101)); } else { - brw_SHL(p, addr, sampler_reg, brw_imm_ud(8)); - brw_OR(p, addr, addr, surface_reg); + if (sampler_reg.file == BRW_IMMEDIATE_VALUE) { + brw_OR(p, addr, surface_reg, brw_imm_ud(sampler_reg.ud << 8)); + } else { + brw_SHL(p, addr, sampler_reg, brw_imm_ud(8)); + brw_OR(p, addr, addr, surface_reg); + } } if (base_binding_table_index) brw_ADD(p, addr, addr, brw_imm_ud(base_binding_table_index)); @@ -915,7 +936,7 @@ 0 /* surface */, 0 /* sampler */, msg_type, - inst->regs_written, + inst->size_written / REG_SIZE, inst->mlen /* mlen */, inst->header_size != 0 /* header */, simd_mode, @@ -1052,11 +1073,7 @@ * current block (or the program). */ this->discard_halt_patches.push_tail(new(mem_ctx) ip_record(p->nr_insn)); - - brw_push_insn_state(p); - brw_set_default_mask_control(p, BRW_MASK_DISABLE); gen6_HALT(p); - brw_pop_insn_state(p); } void @@ -1114,6 +1131,7 @@ struct brw_reg index, struct brw_reg offset) { + assert(type_sz(dst.type) == 4); assert(inst->mlen != 0); assert(index.file == BRW_IMMEDIATE_VALUE && @@ -1132,68 +1150,35 @@ fs_generator::generate_uniform_pull_constant_load_gen7(fs_inst *inst, struct brw_reg dst, struct brw_reg index, - struct brw_reg offset) + struct brw_reg payload) { assert(index.type == BRW_REGISTER_TYPE_UD); - - assert(offset.file == BRW_GENERAL_REGISTER_FILE); - /* Reference just the dword we need, to avoid angering validate_reg(). */ - offset = brw_vec1_grf(offset.nr, 0); - - /* We use the SIMD4x2 mode because we want to end up with 4 components in - * the destination loaded consecutively from the same offset (which appears - * in the first component, and the rest are ignored). - */ - dst.width = BRW_WIDTH_4; - - struct brw_reg src = offset; - bool header_present = false; - - if (devinfo->gen >= 9) { - /* Skylake requires a message header in order to use SIMD4x2 mode. */ - src = retype(brw_vec4_grf(offset.nr, 0), BRW_REGISTER_TYPE_UD); - header_present = true; - - brw_push_insn_state(p); - brw_set_default_mask_control(p, BRW_MASK_DISABLE); - brw_set_default_exec_size(p, BRW_EXECUTE_8); - brw_MOV(p, vec8(src), retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UD)); - brw_set_default_access_mode(p, BRW_ALIGN_1); - - brw_MOV(p, get_element_ud(src, 2), - brw_imm_ud(GEN9_SAMPLER_SIMD_MODE_EXTENSION_SIMD4X2)); - brw_pop_insn_state(p); - } + assert(payload.file == BRW_GENERAL_REGISTER_FILE); + assert(type_sz(dst.type) == 4); if (index.file == BRW_IMMEDIATE_VALUE) { - - uint32_t surf_index = index.ud; + const uint32_t surf_index = index.ud; brw_push_insn_state(p); - brw_set_default_compression_control(p, BRW_COMPRESSION_NONE); brw_set_default_mask_control(p, BRW_MASK_DISABLE); brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND); - brw_inst_set_exec_size(devinfo, send, BRW_EXECUTE_4); brw_pop_insn_state(p); brw_set_dest(p, send, retype(dst, BRW_REGISTER_TYPE_UD)); - brw_set_src0(p, send, src); - brw_set_sampler_message(p, send, - surf_index, - 0, /* LD message ignores sampler unit */ - GEN5_SAMPLER_MESSAGE_SAMPLE_LD, - 1, /* rlen */ - inst->mlen, - header_present, - BRW_SAMPLER_SIMD_MODE_SIMD4X2, - 0); - } else { + brw_set_src0(p, send, retype(payload, BRW_REGISTER_TYPE_UD)); + brw_set_dp_read_message(p, send, surf_index, + BRW_DATAPORT_OWORD_BLOCK_DWORDS(inst->exec_size), + GEN7_DATAPORT_DC_OWORD_BLOCK_READ, + GEN6_SFID_DATAPORT_CONSTANT_CACHE, + 1, /* mlen */ + true, /* header */ + DIV_ROUND_UP(inst->size_written, REG_SIZE)); + } else { struct brw_reg addr = vec1(retype(brw_address_reg(0), BRW_REGISTER_TYPE_UD)); brw_push_insn_state(p); brw_set_default_mask_control(p, BRW_MASK_DISABLE); - brw_set_default_access_mode(p, BRW_ALIGN_1); /* a0.0 = surf_index & 0xff */ brw_inst *insn_and = brw_next_insn(p, BRW_OPCODE_AND); @@ -1204,16 +1189,16 @@ /* dst = send(payload, a0.0 | ) */ brw_inst *insn = brw_send_indirect_message( - p, BRW_SFID_SAMPLER, dst, src, addr); - brw_set_sampler_message(p, insn, - 0, - 0, /* LD message ignores sampler unit */ - GEN5_SAMPLER_MESSAGE_SAMPLE_LD, - 1, /* rlen */ - inst->mlen, - header_present, - BRW_SAMPLER_SIMD_MODE_SIMD4X2, - 0); + p, GEN6_SFID_DATAPORT_CONSTANT_CACHE, + retype(dst, BRW_REGISTER_TYPE_UD), + retype(payload, BRW_REGISTER_TYPE_UD), addr); + brw_set_dp_read_message(p, insn, 0 /* surface */, + BRW_DATAPORT_OWORD_BLOCK_DWORDS(inst->exec_size), + GEN7_DATAPORT_DC_OWORD_BLOCK_READ, + GEN6_SFID_DATAPORT_CONSTANT_CACHE, + 1, /* mlen */ + true, /* header */ + DIV_ROUND_UP(inst->size_written, REG_SIZE)); brw_pop_insn_state(p); } @@ -1250,7 +1235,7 @@ */ msg_type = BRW_SAMPLER_MESSAGE_SIMD16_LD; assert(inst->mlen == 3); - assert(inst->regs_written == 8); + assert(inst->size_written == 8 * REG_SIZE); rlen = 8; simd_mode = BRW_SAMPLER_SIMD_MODE_SIMD16; } @@ -1329,7 +1314,6 @@ brw_push_insn_state(p); brw_set_default_mask_control(p, BRW_MASK_DISABLE); - brw_set_default_access_mode(p, BRW_ALIGN_1); /* a0.0 = surf_index & 0xff */ brw_inst *insn_and = brw_next_insn(p, BRW_OPCODE_AND); @@ -1386,6 +1370,7 @@ struct brw_reg msg_data, unsigned msg_type) { + assert(inst->size_written % REG_SIZE == 0); assert(msg_data.type == BRW_REGISTER_TYPE_UD); brw_pixel_interpolator_query(p, @@ -1395,30 +1380,7 @@ msg_type, msg_data, inst->mlen, - inst->regs_written); -} - - -/** - * Sets the first word of a vgrf for gen7+ simd4x2 uniform pull constant - * sampler LD messages. - * - * We don't want to bake it into the send message's code generation because - * that means we don't get a chance to schedule the instructions. - */ -void -fs_generator::generate_set_simd4x2_offset(fs_inst *inst, - struct brw_reg dst, - struct brw_reg value) -{ - assert(value.file == BRW_IMMEDIATE_VALUE); - - brw_push_insn_state(p); - brw_set_default_exec_size(p, BRW_EXECUTE_8); - brw_set_default_compression_control(p, BRW_COMPRESSION_NONE); - brw_set_default_mask_control(p, BRW_MASK_DISABLE); - brw_MOV(p, retype(brw_vec1_reg(dst.file, dst.nr, 0), value.type), value); - brw_pop_insn_state(p); + inst->size_written / REG_SIZE); } /* Sets vstride=1, width=4, hstride=0 of register src1 during @@ -1648,7 +1610,7 @@ brw_set_default_acc_write_control(p, inst->writes_accumulator); brw_set_default_exec_size(p, cvt(inst->exec_size) - 1); - assert(inst->force_writemask_all || inst->exec_size >= 8); + assert(inst->force_writemask_all || inst->exec_size >= 4); assert(inst->force_writemask_all || inst->group % inst->exec_size == 0); assert(inst->base_mrf + inst->mlen <= BRW_MAX_MRF(devinfo->gen)); assert(inst->mlen <= BRW_MAX_MSG_LENGTH); @@ -1760,6 +1722,9 @@ /* FBL only supports UD type for dst. */ brw_FBL(p, retype(dst, BRW_REGISTER_TYPE_UD), src[0]); break; + case BRW_OPCODE_LZD: + brw_LZD(p, dst, src[0]); + break; case BRW_OPCODE_CBIT: assert(devinfo->gen >= 7); /* CBIT only supports UD type for dst. */ @@ -1965,6 +1930,10 @@ generate_fb_write(inst, src[0]); break; + case FS_OPCODE_FB_READ: + generate_fb_read(inst, dst, src[0]); + break; + case FS_OPCODE_MOV_DISPATCH_TO_FLAGS: generate_mov_dispatch_to_flags(inst); break; @@ -2016,13 +1985,15 @@ brw_memory_fence(p, dst); break; - case FS_OPCODE_SET_SIMD4X2_OFFSET: - generate_set_simd4x2_offset(inst, dst, src[0]); - break; - - case SHADER_OPCODE_FIND_LIVE_CHANNEL: - brw_find_live_channel(p, dst); + case SHADER_OPCODE_FIND_LIVE_CHANNEL: { + const struct brw_reg mask = + brw_stage_has_packed_dispatch(devinfo, stage, + prog_data) ? brw_imm_ud(~0u) : + stage == MESA_SHADER_FRAGMENT ? brw_vmask_reg() : + brw_dmask_reg(); + brw_find_live_channel(p, dst, mask); break; + } case SHADER_OPCODE_BROADCAST: assert(inst->force_writemask_all); @@ -2053,11 +2024,6 @@ } break; - case FS_OPCODE_INTERPOLATE_AT_CENTROID: - generate_pixel_interpolator_query(inst, dst, src[0], src[1], - GEN7_PIXEL_INTERPOLATOR_LOC_CENTROID); - break; - case FS_OPCODE_INTERPOLATE_AT_SAMPLE: generate_pixel_interpolator_query(inst, dst, src[0], src[1], GEN7_PIXEL_INTERPOLATOR_LOC_SAMPLE); @@ -2081,6 +2047,13 @@ generate_barrier(inst, src[0]); break; + case BRW_OPCODE_DIM: + assert(devinfo->is_haswell); + assert(src[0].type == BRW_REGISTER_TYPE_DF); + assert(dst.type == BRW_REGISTER_TYPE_DF); + brw_DIM(p, dst, retype(src[0], BRW_REGISTER_TYPE_F)); + break; + default: unreachable("Unsupported opcode"); @@ -2105,7 +2078,7 @@ } } - brw_set_uip_jip(p); + brw_set_uip_jip(p, start_offset); annotation_finalize(&annotation, p->next_insn_offset); #ifndef NDEBUG diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs.h 2017-06-01 10:37:10.000000000 +0000 @@ -169,19 +169,11 @@ void emit_dummy_fs(); void emit_repclear_shader(); - fs_reg *emit_fragcoord_interpolation(); - fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp, - glsl_interp_qualifier interpolation_mode, - bool is_centroid, bool is_sample); + void emit_fragcoord_interpolation(fs_reg wpos); fs_reg *emit_frontfacing_interpolation(); fs_reg *emit_samplepos_setup(); fs_reg *emit_sampleid_setup(); fs_reg *emit_samplemaskin_setup(); - void emit_general_interpolation(fs_reg *attr, const char *name, - const glsl_type *type, - glsl_interp_qualifier interpolation_mode, - int *location, bool mod_centroid, - bool mod_sample); fs_reg *emit_vs_system_value(int location); void emit_interpolation_setup_gen4(); void emit_interpolation_setup_gen6(); @@ -198,9 +190,6 @@ bool opt_zero_samples(); void emit_nir_code(); - void nir_setup_inputs(); - void nir_setup_single_output_varying(fs_reg *reg, const glsl_type *type, - unsigned *location); void nir_setup_outputs(); void nir_setup_uniforms(); void nir_emit_system_values(); @@ -213,8 +202,6 @@ void nir_emit_alu(const brw::fs_builder &bld, nir_alu_instr *instr); void nir_emit_load_const(const brw::fs_builder &bld, nir_load_const_instr *instr); - void nir_emit_undef(const brw::fs_builder &bld, - nir_ssa_undef_instr *instr); void nir_emit_vs_intrinsic(const brw::fs_builder &bld, nir_intrinsic_instr *instr); void nir_emit_tcs_intrinsic(const brw::fs_builder &bld, @@ -255,6 +242,8 @@ fs_reg color1, fs_reg color2, fs_reg src0_alpha, unsigned components); void emit_fb_writes(); + fs_inst *emit_non_coherent_fb_read(const brw::fs_builder &bld, + const fs_reg &dst, unsigned target); void emit_urb_writes(const fs_reg &gs_vertex_count = fs_reg()); void set_gs_stream_control_data_bits(const fs_reg &vertex_count, unsigned stream_id); @@ -265,7 +254,7 @@ void emit_gs_thread_end(); void emit_gs_input_load(const fs_reg &dst, const nir_src &vertex_src, unsigned base_offset, const nir_src &offset_src, - unsigned num_components); + unsigned num_components, unsigned first_component); void emit_cs_terminate(); fs_reg *emit_cs_work_group_id_setup(); @@ -326,17 +315,13 @@ fs_reg frag_stencil; fs_reg sample_mask; fs_reg outputs[VARYING_SLOT_MAX]; - unsigned output_components[VARYING_SLOT_MAX]; fs_reg dual_src_output; - bool do_dual_src; int first_non_payload_grf; /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */ unsigned max_grf; fs_reg *nir_locals; fs_reg *nir_ssa_values; - fs_reg nir_inputs; - fs_reg nir_outputs; fs_reg *nir_system_values; bool failed; @@ -350,7 +335,7 @@ uint8_t dest_depth_reg; uint8_t sample_pos_reg; uint8_t sample_mask_in_reg; - uint8_t barycentric_coord_reg[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT]; + uint8_t barycentric_coord_reg[BRW_BARYCENTRIC_MODE_COUNT]; uint8_t local_invocation_id_reg; /** The number of thread payload registers the hardware will supply. */ @@ -364,7 +349,7 @@ fs_reg pixel_y; fs_reg wpos_w; fs_reg pixel_w; - fs_reg delta_xy[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT]; + fs_reg delta_xy[BRW_BARYCENTRIC_MODE_COUNT]; fs_reg shader_start_time; fs_reg userplane[MAX_CLIP_PLANES]; fs_reg final_gs_vertex_count; @@ -411,6 +396,8 @@ struct brw_reg implied_header, GLuint nr); void generate_fb_write(fs_inst *inst, struct brw_reg payload); + void generate_fb_read(fs_inst *inst, struct brw_reg dst, + struct brw_reg payload); void generate_urb_read(fs_inst *inst, struct brw_reg dst, struct brw_reg payload); void generate_urb_write(fs_inst *inst, struct brw_reg payload); void generate_cs_terminate(fs_inst *inst, struct brw_reg payload); @@ -434,7 +421,7 @@ void generate_uniform_pull_constant_load_gen7(fs_inst *inst, struct brw_reg dst, struct brw_reg surf_index, - struct brw_reg offset); + struct brw_reg payload); void generate_varying_pull_constant_load_gen4(fs_inst *inst, struct brw_reg dst, struct brw_reg index); @@ -455,9 +442,6 @@ struct brw_reg src0, struct brw_reg src1); - void generate_set_simd4x2_offset(fs_inst *inst, - struct brw_reg dst, - struct brw_reg offset); void generate_discard_jump(fs_inst *inst); void generate_pack_half_2x16_split(fs_inst *inst, @@ -483,7 +467,7 @@ const struct brw_compiler *compiler; void *log_data; /* Passed to compiler->*_log functions */ - const struct brw_device_info *devinfo; + const struct gen_device_info *devinfo; struct brw_codegen *p; const void * const key; @@ -512,3 +496,8 @@ const fs_reg &dst, const fs_reg &src, uint32_t components); +fs_reg setup_imm_df(const brw::fs_builder &bld, + double v); + +enum brw_barycentric_mode brw_barycentric_mode(enum glsl_interp_mode mode, + nir_intrinsic_op op); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -41,12 +41,12 @@ * but we currently do not. It is easier for the consumers of this * information to work with whole VGRFs. * - * However, we internally track use/def information at the per-component - * (reg_offset) level for greater accuracy. Large VGRFs may be accessed - * piecemeal over many (possibly non-adjacent) instructions. In this case, - * examining a single instruction is insufficient to decide whether a whole - * VGRF is ultimately used or defined. Tracking individual components - * allows us to easily assemble this information. + * However, we internally track use/def information at the per-GRF level for + * greater accuracy. Large VGRFs may be accessed piecemeal over many + * (possibly non-adjacent) instructions. In this case, examining a single + * instruction is insufficient to decide whether a whole VGRF is ultimately + * used or defined. Tracking individual components allows us to easily + * assemble this information. * * See Muchnick's Advanced Compiler Design and Implementation, section * 14.1 (p444). @@ -118,9 +118,9 @@ if (reg.file != VGRF) continue; - for (int j = 0; j < inst->regs_read(i); j++) { + for (unsigned j = 0; j < regs_read(inst, i); j++) { setup_one_read(bd, inst, ip, reg); - reg.reg_offset++; + reg.offset += REG_SIZE; } } @@ -129,9 +129,9 @@ /* Set def[] for this instruction */ if (inst->dst.file == VGRF) { fs_reg reg = inst->dst; - for (int j = 0; j < inst->regs_written; j++) { + for (unsigned j = 0; j < regs_written(inst); j++) { setup_one_write(bd, inst, ip, reg); - reg.reg_offset++; + reg.offset += REG_SIZE; } } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_live_variables.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_live_variables.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_live_variables.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_live_variables.h 2017-06-01 10:37:10.000000000 +0000 @@ -68,7 +68,7 @@ bool vars_interfere(int a, int b); int var_from_reg(const fs_reg ®) const { - return var_from_vgrf[reg.nr] + reg.reg_offset; + return var_from_vgrf[reg.nr] + reg.offset / REG_SIZE; } /** Map from virtual GRF number to index in block_data arrays. */ diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_nir.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_nir.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_nir.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_nir.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -36,7 +36,6 @@ /* emit the arrays used for inputs and outputs - load/store intrinsics will * be converted to reads/writes of these arrays */ - nir_setup_inputs(); nir_setup_outputs(); nir_setup_uniforms(); nir_emit_system_values(); @@ -50,130 +49,19 @@ } void -fs_visitor::nir_setup_inputs() -{ - if (stage != MESA_SHADER_FRAGMENT) - return; - - nir_inputs = bld.vgrf(BRW_REGISTER_TYPE_F, nir->num_inputs); - - nir_foreach_variable(var, &nir->inputs) { - fs_reg input = offset(nir_inputs, bld, var->data.driver_location); - - fs_reg reg; - if (var->data.location == VARYING_SLOT_POS) { - reg = *emit_fragcoord_interpolation(); - emit_percomp(bld, fs_inst(BRW_OPCODE_MOV, bld.dispatch_width(), - input, reg), 0xF); - } else if (var->data.location == VARYING_SLOT_LAYER) { - struct brw_reg reg = suboffset(interp_reg(VARYING_SLOT_LAYER, 1), 3); - reg.type = BRW_REGISTER_TYPE_D; - bld.emit(FS_OPCODE_CINTERP, retype(input, BRW_REGISTER_TYPE_D), reg); - } else if (var->data.location == VARYING_SLOT_VIEWPORT) { - struct brw_reg reg = suboffset(interp_reg(VARYING_SLOT_VIEWPORT, 2), 3); - reg.type = BRW_REGISTER_TYPE_D; - bld.emit(FS_OPCODE_CINTERP, retype(input, BRW_REGISTER_TYPE_D), reg); - } else { - int location = var->data.location; - emit_general_interpolation(&input, var->name, var->type, - (glsl_interp_qualifier) var->data.interpolation, - &location, var->data.centroid, - var->data.sample); - } - } -} - -void -fs_visitor::nir_setup_single_output_varying(fs_reg *reg, - const glsl_type *type, - unsigned *location) -{ - if (type->is_array() || type->is_matrix()) { - const struct glsl_type *elem_type = glsl_get_array_element(type); - const unsigned length = glsl_get_length(type); - - for (unsigned i = 0; i < length; i++) { - nir_setup_single_output_varying(reg, elem_type, location); - } - } else if (type->is_record()) { - for (unsigned i = 0; i < type->length; i++) { - const struct glsl_type *field_type = type->fields.structure[i].type; - nir_setup_single_output_varying(reg, field_type, location); - } - } else { - assert(type->is_scalar() || type->is_vector()); - unsigned num_elements = type->vector_elements; - if (type->is_double()) - num_elements *= 2; - for (unsigned count = 0; count < num_elements; count += 4) { - this->outputs[*location] = *reg; - this->output_components[*location] = MIN2(4, num_elements - count); - *reg = offset(*reg, bld, 4); - (*location)++; - } - } -} - -void fs_visitor::nir_setup_outputs() { - if (stage == MESA_SHADER_TESS_CTRL) + if (stage == MESA_SHADER_TESS_CTRL || stage == MESA_SHADER_FRAGMENT) return; - brw_wm_prog_key *key = (brw_wm_prog_key*) this->key; - - nir_outputs = bld.vgrf(BRW_REGISTER_TYPE_F, nir->num_outputs); - nir_foreach_variable(var, &nir->outputs) { - fs_reg reg = offset(nir_outputs, bld, var->data.driver_location); - - switch (stage) { - case MESA_SHADER_VERTEX: - case MESA_SHADER_TESS_EVAL: - case MESA_SHADER_GEOMETRY: { - unsigned location = var->data.location; - nir_setup_single_output_varying(®, var->type, &location); - break; - } - case MESA_SHADER_FRAGMENT: - if (key->force_dual_color_blend && - var->data.location == FRAG_RESULT_DATA1) { - this->dual_src_output = reg; - this->do_dual_src = true; - } else if (var->data.index > 0) { - assert(var->data.location == FRAG_RESULT_DATA0); - assert(var->data.index == 1); - this->dual_src_output = reg; - this->do_dual_src = true; - } else if (var->data.location == FRAG_RESULT_COLOR) { - /* Writing gl_FragColor outputs to all color regions. */ - for (unsigned int i = 0; i < MAX2(key->nr_color_regions, 1); i++) { - this->outputs[i] = reg; - this->output_components[i] = 4; - } - } else if (var->data.location == FRAG_RESULT_DEPTH) { - this->frag_depth = reg; - } else if (var->data.location == FRAG_RESULT_STENCIL) { - this->frag_stencil = reg; - } else if (var->data.location == FRAG_RESULT_SAMPLE_MASK) { - this->sample_mask = reg; - } else { - int vector_elements = var->type->without_array()->vector_elements; - - /* gl_FragData or a user-defined FS output */ - assert(var->data.location >= FRAG_RESULT_DATA0 && - var->data.location < FRAG_RESULT_DATA0+BRW_MAX_DRAW_BUFFERS); - - /* General color output. */ - for (unsigned int i = 0; i < MAX2(1, var->type->length); i++) { - int output = var->data.location - FRAG_RESULT_DATA0 + i; - this->outputs[output] = offset(reg, bld, vector_elements * i); - this->output_components[output] = vector_elements; - } - } - break; - default: - unreachable("unhandled shader stage"); + const unsigned vec4s = + var->data.compact ? DIV_ROUND_UP(glsl_get_length(var->type), 4) + : type_size_vec4(var->type); + fs_reg reg = bld.vgrf(BRW_REGISTER_TYPE_F, 4 * vec4s); + for (unsigned i = 0; i < vec4s; i++) { + if (outputs[var->data.driver_location + i].file == BAD_FILE) + outputs[var->data.driver_location + i] = offset(reg, bld, 4 * i); } } } @@ -485,7 +373,10 @@ break; case nir_instr_type_ssa_undef: - nir_emit_undef(abld, nir_instr_as_ssa_undef(instr)); + /* We create a new VGRF for undefs on every use (by handling + * them in get_nir_src()), rather than for each definition. + * This helps register coalescing eliminate MOVs from undef. + */ break; case nir_instr_type_jump: @@ -581,15 +472,8 @@ g0.negate = true; } - tmp.type = BRW_REGISTER_TYPE_W; - tmp.subreg_offset = 2; - tmp.stride = 2; - - bld.OR(tmp, g0, brw_imm_uw(0x3f80)); - - tmp.type = BRW_REGISTER_TYPE_D; - tmp.subreg_offset = 0; - tmp.stride = 1; + bld.OR(subscript(tmp, BRW_REGISTER_TYPE_W, 1), + g0, brw_imm_uw(0x3f80)); } else { /* Bit 31 of g1.6 is 0 if the polygon is front facing. */ fs_reg g1_6 = fs_reg(retype(brw_vec1_grf(1, 6), BRW_REGISTER_TYPE_D)); @@ -616,6 +500,53 @@ return true; } +static void +emit_find_msb_using_lzd(const fs_builder &bld, + const fs_reg &result, + const fs_reg &src, + bool is_signed) +{ + fs_inst *inst; + fs_reg temp = src; + + if (is_signed) { + /* LZD of an absolute value source almost always does the right + * thing. There are two problem values: + * + * * 0x80000000. Since abs(0x80000000) == 0x80000000, LZD returns + * 0. However, findMSB(int(0x80000000)) == 30. + * + * * 0xffffffff. Since abs(0xffffffff) == 1, LZD returns + * 31. Section 8.8 (Integer Functions) of the GLSL 4.50 spec says: + * + * For a value of zero or negative one, -1 will be returned. + * + * * Negative powers of two. LZD(abs(-(1<src[0].negate = true; +} + void fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr) { @@ -789,7 +720,7 @@ * a register and compare with that. */ fs_reg tmp = vgrf(glsl_type::double_type); - bld.MOV(tmp, brw_imm_df(0.0)); + bld.MOV(tmp, setup_imm_df(bld, 0.0)); /* A direct DF CMP using the flag register (null dst) won't work in * SIMD16 because the CMP will be split in two by lower_simd_width, @@ -1128,7 +1059,7 @@ case nir_op_d2b: { /* two-argument instructions can't take 64-bit immediates */ fs_reg zero = vgrf(glsl_type::double_type); - bld.MOV(zero, brw_imm_df(0.0)); + bld.MOV(zero, setup_imm_df(bld, 0.0)); /* A SIMD16 execution needs to be split in two instructions, so use * a vgrf instead of the flag register as dst so instruction splitting * works @@ -1235,35 +1166,6 @@ break; case nir_op_pack_double_2x32_split: - /* Optimize the common case where we are re-packing a double with - * the result of a previous double unpack. In this case we can take the - * 32-bit value to use in the re-pack from the original double and bypass - * the unpack operation. - */ - for (int i = 0; i < 2; i++) { - if (instr->src[i].src.is_ssa) - continue; - - const nir_instr *parent_instr = instr->src[i].src.ssa->parent_instr; - if (parent_instr->type == nir_instr_type_alu) - continue; - - const nir_alu_instr *alu_parent = nir_instr_as_alu(parent_instr); - if (alu_parent->op == nir_op_unpack_double_2x32_split_x || - alu_parent->op == nir_op_unpack_double_2x32_split_y) - continue; - - if (!alu_parent->src[0].src.is_ssa) - continue; - - op[i] = get_nir_src(alu_parent->src[0].src); - op[i] = offset(retype(op[i], BRW_REGISTER_TYPE_DF), bld, - alu_parent->src[0].swizzle[channel]); - if (alu_parent->op == nir_op_unpack_double_2x32_split_y) - op[i] = subscript(op[i], BRW_REGISTER_TYPE_UD, 1); - else - op[i] = subscript(op[i], BRW_REGISTER_TYPE_UD, 0); - } bld.emit(FS_OPCODE_PACK, result, op[0], op[1]); break; @@ -1312,26 +1214,57 @@ bld.CBIT(result, op[0]); break; - case nir_op_ufind_msb: + case nir_op_ufind_msb: { + assert(nir_dest_bit_size(instr->dest.dest) < 64); + emit_find_msb_using_lzd(bld, result, op[0], false); + break; + } + case nir_op_ifind_msb: { assert(nir_dest_bit_size(instr->dest.dest) < 64); - bld.FBH(retype(result, BRW_REGISTER_TYPE_UD), op[0]); - /* FBH counts from the MSB side, while GLSL's findMSB() wants the count - * from the LSB side. If FBH didn't return an error (0xFFFFFFFF), then - * subtract the result from 31 to convert the MSB count into an LSB count. - */ - bld.CMP(bld.null_reg_d(), result, brw_imm_d(-1), BRW_CONDITIONAL_NZ); + if (devinfo->gen < 7) { + emit_find_msb_using_lzd(bld, result, op[0], true); + } else { + bld.FBH(retype(result, BRW_REGISTER_TYPE_UD), op[0]); - inst = bld.ADD(result, result, brw_imm_d(31)); - inst->predicate = BRW_PREDICATE_NORMAL; - inst->src[0].negate = true; + /* FBH counts from the MSB side, while GLSL's findMSB() wants the + * count from the LSB side. If FBH didn't return an error + * (0xFFFFFFFF), then subtract the result from 31 to convert the MSB + * count into an LSB count. + */ + bld.CMP(bld.null_reg_d(), result, brw_imm_d(-1), BRW_CONDITIONAL_NZ); + + inst = bld.ADD(result, result, brw_imm_d(31)); + inst->predicate = BRW_PREDICATE_NORMAL; + inst->src[0].negate = true; + } break; } case nir_op_find_lsb: assert(nir_dest_bit_size(instr->dest.dest) < 64); - bld.FBL(result, op[0]); + + if (devinfo->gen < 7) { + fs_reg temp = vgrf(glsl_type::int_type); + + /* (x & -x) generates a value that consists of only the LSB of x. + * For all powers of 2, findMSB(y) == findLSB(y). + */ + fs_reg src = retype(op[0], BRW_REGISTER_TYPE_D); + fs_reg negated_src = src; + + /* One must be negated, and the other must be non-negated. It + * doesn't matter which is which. + */ + negated_src.negate = true; + src.negate = false; + + bld.AND(temp, src, negated_src); + emit_find_msb_using_lzd(bld, result, temp, false); + } else { + bld.FBL(result, op[0]); + } break; case nir_op_ubitfield_extract: @@ -1440,7 +1373,8 @@ case 64: for (unsigned i = 0; i < instr->def.num_components; i++) - bld.MOV(offset(reg, bld, i), brw_imm_df(instr->value.f64[i])); + bld.MOV(offset(reg, bld, i), + setup_imm_df(bld, instr->value.f64[i])); break; default: @@ -1450,21 +1384,18 @@ nir_ssa_values[instr->def.index] = reg; } -void -fs_visitor::nir_emit_undef(const fs_builder &bld, nir_ssa_undef_instr *instr) -{ - const brw_reg_type reg_type = - instr->def.bit_size == 32 ? BRW_REGISTER_TYPE_D : BRW_REGISTER_TYPE_DF; - nir_ssa_values[instr->def.index] = - bld.vgrf(reg_type, instr->def.num_components); -} - fs_reg fs_visitor::get_nir_src(const nir_src &src) { fs_reg reg; if (src.is_ssa) { - reg = nir_ssa_values[src.ssa->index]; + if (src.ssa->parent_instr->type == nir_instr_type_ssa_undef) { + const brw_reg_type reg_type = src.ssa->bit_size == 32 ? + BRW_REGISTER_TYPE_D : BRW_REGISTER_TYPE_DF; + reg = bld.vgrf(reg_type, src.ssa->num_components); + } else { + reg = nir_ssa_values[src.ssa->index]; + } } else { /* We don't handle indirects on locals */ assert(src.reg.indirect == NULL); @@ -1638,8 +1569,10 @@ const fs_reg &dst, const fs_reg &src, const fs_reg &desc, - glsl_interp_qualifier interpolation) + glsl_interp_mode interpolation) { + struct brw_wm_prog_data *wm_prog_data = + brw_wm_prog_data(bld.shader->stage_prog_data); fs_inst *inst; fs_reg payload; int mlen; @@ -1656,8 +1589,10 @@ inst = bld.emit(opcode, dst, payload, desc); inst->mlen = mlen; /* 2 floats per slot returned */ - inst->regs_written = 2 * bld.dispatch_width() / 8; - inst->pi_noperspective = interpolation == INTERP_QUALIFIER_NOPERSPECTIVE; + inst->size_written = 2 * dst.component_size(inst->exec_size); + inst->pi_noperspective = interpolation == INTERP_MODE_NOPERSPECTIVE; + + wm_prog_data->pulls_bary = true; return inst; } @@ -1683,8 +1618,7 @@ { assert(stage == MESA_SHADER_GEOMETRY); - struct brw_gs_prog_data *gs_prog_data = - (struct brw_gs_prog_data *) prog_data; + struct brw_gs_prog_data *gs_prog_data = brw_gs_prog_data(prog_data); if (gs_compile->control_data_header_size_bits == 0) return; @@ -1745,8 +1679,7 @@ assert(stage == MESA_SHADER_GEOMETRY); assert(gs_compile->control_data_bits_per_vertex != 0); - struct brw_gs_prog_data *gs_prog_data = - (struct brw_gs_prog_data *) prog_data; + struct brw_gs_prog_data *gs_prog_data = brw_gs_prog_data(prog_data); const fs_builder abld = bld.annotate("emit control data bits"); const fs_builder fwa_bld = bld.exec_all(); @@ -1802,7 +1735,7 @@ fs_reg prev_count = bld.vgrf(BRW_REGISTER_TYPE_UD, 1); abld.ADD(prev_count, vertex_count, brw_imm_ud(0xffffffffu)); unsigned log2_bits_per_vertex = - _mesa_fls(gs_compile->control_data_bits_per_vertex); + util_last_bit(gs_compile->control_data_bits_per_vertex); abld.SHR(dword_index, prev_count, brw_imm_ud(6u - log2_bits_per_vertex)); if (per_slot_offset.file != BAD_FILE) { @@ -1901,8 +1834,7 @@ { assert(stage == MESA_SHADER_GEOMETRY); - struct brw_gs_prog_data *gs_prog_data = - (struct brw_gs_prog_data *) prog_data; + struct brw_gs_prog_data *gs_prog_data = brw_gs_prog_data(prog_data); fs_reg vertex_count = get_nir_src(vertex_count_nir_src); vertex_count.type = BRW_REGISTER_TYPE_UD; @@ -1917,7 +1849,7 @@ * be recorded by transform feedback, we can simply discard all geometry * bound to these streams when transform feedback is disabled. */ - if (stream_id > 0 && !nir->info.has_transform_feedback_varyings) + if (stream_id > 0 && !nir->info->has_transform_feedback_varyings) return; /* If we're outputting 32 control data bits or less, then we can wait @@ -1997,9 +1929,10 @@ const nir_src &vertex_src, unsigned base_offset, const nir_src &offset_src, - unsigned num_components) + unsigned num_components, + unsigned first_component) { - struct brw_gs_prog_data *gs_prog_data = (struct brw_gs_prog_data *) prog_data; + struct brw_gs_prog_data *gs_prog_data = brw_gs_prog_data(prog_data); nir_const_value *vertex_const = nir_src_as_const_value(vertex_src); nir_const_value *offset_const = nir_src_as_const_value(offset_src); @@ -2024,7 +1957,7 @@ } else { for (unsigned i = 0; i < num_components; i++) { bld.MOV(offset(dst, bld, i), - fs_reg(ATTR, imm_offset + i, dst.type)); + fs_reg(ATTR, imm_offset + i + first_component, dst.type)); } } return; @@ -2071,12 +2004,12 @@ /* Use first_icp_handle as the base offset. There is one register * of URB handles per vertex, so inform the register allocator that - * we might read up to nir->info.gs.vertices_in registers. + * we might read up to nir->info->gs.vertices_in registers. */ bld.emit(SHADER_OPCODE_MOV_INDIRECT, icp_handle, - fs_reg(brw_vec8_grf(first_icp_handle, 0)), + retype(brw_vec8_grf(first_icp_handle, 0), icp_handle.type), fs_reg(icp_offset_bytes), - brw_imm_ud(nir->info.gs.vertices_in * REG_SIZE)); + brw_imm_ud(nir->info->gs.vertices_in * REG_SIZE)); } } else { assert(gs_prog_data->invocations > 1); @@ -2102,12 +2035,12 @@ /* Use first_icp_handle as the base offset. There is one DWord * of URB handles per vertex, so inform the register allocator that - * we might read up to ceil(nir->info.gs.vertices_in / 8) registers. + * we might read up to ceil(nir->info->gs.vertices_in / 8) registers. */ bld.emit(SHADER_OPCODE_MOV_INDIRECT, icp_handle, - fs_reg(brw_vec8_grf(first_icp_handle, 0)), + retype(brw_vec8_grf(first_icp_handle, 0), icp_handle.type), fs_reg(icp_offset_bytes), - brw_imm_ud(DIV_ROUND_UP(nir->info.gs.vertices_in, 8) * + brw_imm_ud(DIV_ROUND_UP(nir->info->gs.vertices_in, 8) * REG_SIZE)); } } @@ -2126,27 +2059,54 @@ } fs_reg tmp = fs_reg(VGRF, alloc.allocate(4), dst.type); tmp_dst = tmp; + first_component = first_component / 2; } for (unsigned iter = 0; iter < num_iterations; iter++) { if (offset_const) { /* Constant indexing - use global offset. */ - inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8, tmp_dst, icp_handle); + if (first_component != 0) { + unsigned read_components = num_components + first_component; + fs_reg tmp = bld.vgrf(dst.type, read_components); + inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8, tmp, icp_handle); + inst->size_written = read_components * + tmp.component_size(inst->exec_size); + for (unsigned i = 0; i < num_components; i++) { + bld.MOV(offset(tmp_dst, bld, i), + offset(tmp, bld, i + first_component)); + } + } else { + inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8, tmp_dst, + icp_handle); + inst->size_written = num_components * + tmp_dst.component_size(inst->exec_size); + } inst->offset = base_offset + offset_const->u32[0]; - inst->base_mrf = -1; inst->mlen = 1; - inst->regs_written = num_components * type_sz(tmp_dst.type) / 4; } else { /* Indirect indexing - use per-slot offsets as well. */ const fs_reg srcs[] = { icp_handle, indirect_offset }; + unsigned read_components = num_components + first_component; + fs_reg tmp = bld.vgrf(dst.type, read_components); fs_reg payload = bld.vgrf(BRW_REGISTER_TYPE_UD, 2); bld.LOAD_PAYLOAD(payload, srcs, ARRAY_SIZE(srcs), 0); - - inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, tmp_dst, payload); + if (first_component != 0) { + inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, tmp, + payload); + inst->size_written = read_components * + tmp.component_size(inst->exec_size); + for (unsigned i = 0; i < num_components; i++) { + bld.MOV(offset(tmp_dst, bld, i), + offset(tmp, bld, i + first_component)); + } + } else { + inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, tmp_dst, + payload); + inst->size_written = num_components * + tmp_dst.component_size(inst->exec_size); + } inst->offset = base_offset; - inst->base_mrf = -1; inst->mlen = 2; - inst->regs_written = num_components * type_sz(tmp_dst.type) / 4; } if (type_sz(dst.type) == 8) { @@ -2173,7 +2133,7 @@ /* Read the whole VUE header (because of alignment) and read .w. */ fs_reg tmp = bld.vgrf(dst.type, 4); inst->dst = tmp; - inst->regs_written = 4; + inst->size_written = 4 * REG_SIZE; bld.MOV(dst, offset(tmp, bld, 3)); } } @@ -2286,6 +2246,37 @@ break; } + case nir_intrinsic_load_input: { + fs_reg src = fs_reg(ATTR, instr->const_index[0], dest.type); + unsigned first_component = nir_intrinsic_component(instr); + unsigned num_components = instr->num_components; + enum brw_reg_type type = dest.type; + + nir_const_value *const_offset = nir_src_as_const_value(instr->src[0]); + assert(const_offset && "Indirect input loads not allowed"); + src = offset(src, bld, const_offset->u32[0]); + + for (unsigned j = 0; j < num_components; j++) { + bld.MOV(offset(dest, bld, j), offset(src, bld, j + first_component)); + } + + if (type == BRW_REGISTER_TYPE_DF) { + /* Once the double vector is read, set again its original register + * type to continue with normal execution. + */ + src = retype(src, type); + dest = retype(dest, type); + } + + if (type_sz(src.type) == 8) { + shuffle_32bit_load_result_to_64bit_data(bld, + dest, + retype(dest, BRW_REGISTER_TYPE_F), + instr->num_components); + } + break; + } + default: nir_emit_intrinsic(bld, instr); break; @@ -2298,8 +2289,7 @@ { assert(stage == MESA_SHADER_TESS_CTRL); struct brw_tcs_prog_key *tcs_key = (struct brw_tcs_prog_key *) key; - struct brw_tcs_prog_data *tcs_prog_data = - (struct brw_tcs_prog_data *) prog_data; + struct brw_tcs_prog_data *tcs_prog_data = brw_tcs_prog_data(prog_data); fs_reg dst; if (nir_intrinsic_infos[instr->intrinsic].has_dest) @@ -2388,7 +2378,7 @@ /* Start at g1. We might read up to 4 registers. */ bld.emit(SHADER_OPCODE_MOV_INDIRECT, icp_handle, - fs_reg(brw_vec8_grf(1, 0)), vertex_offset_bytes, + retype(brw_vec8_grf(1, 0), icp_handle.type), vertex_offset_bytes, brw_imm_ud(4 * REG_SIZE)); } @@ -2398,8 +2388,10 @@ */ unsigned num_iterations = 1; unsigned num_components = instr->num_components; + unsigned first_component = nir_intrinsic_component(instr); fs_reg orig_dst = dst; if (type_sz(dst.type) == 8) { + first_component = first_component / 2; if (instr->num_components > 2) { num_iterations = 2; num_components = 2; @@ -2412,22 +2404,42 @@ for (unsigned iter = 0; iter < num_iterations; iter++) { if (indirect_offset.file == BAD_FILE) { /* Constant indexing - use global offset. */ - inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8, dst, icp_handle); + if (first_component != 0) { + unsigned read_components = num_components + first_component; + fs_reg tmp = bld.vgrf(dst.type, read_components); + inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8, tmp, icp_handle); + for (unsigned i = 0; i < num_components; i++) { + bld.MOV(offset(dst, bld, i), + offset(tmp, bld, i + first_component)); + } + } else { + inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8, dst, icp_handle); + } inst->offset = imm_offset; inst->mlen = 1; - inst->base_mrf = -1; } else { /* Indirect indexing - use per-slot offsets as well. */ const fs_reg srcs[] = { icp_handle, indirect_offset }; fs_reg payload = bld.vgrf(BRW_REGISTER_TYPE_UD, 2); bld.LOAD_PAYLOAD(payload, srcs, ARRAY_SIZE(srcs), 0); - - inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, dst, payload); + if (first_component != 0) { + unsigned read_components = num_components + first_component; + fs_reg tmp = bld.vgrf(dst.type, read_components); + inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, tmp, + payload); + for (unsigned i = 0; i < num_components; i++) { + bld.MOV(offset(dst, bld, i), + offset(tmp, bld, i + first_component)); + } + } else { + inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, dst, + payload); + } inst->offset = imm_offset; - inst->base_mrf = -1; inst->mlen = 2; } - inst->regs_written = num_components * type_sz(dst.type) / 4; + inst->size_written = (num_components + first_component) * + inst->dst.component_size(inst->exec_size); /* If we are reading 64-bit data using 32-bit read messages we need * build proper 64-bit data elements by shuffling the low and high @@ -2451,7 +2463,7 @@ if (inst->offset == 0 && indirect_offset.file == BAD_FILE) { assert(type_sz(dst.type) < 8); inst->dst = bld.vgrf(dst.type, 4); - inst->regs_written = 4; + inst->size_written = 4 * REG_SIZE; bld.MOV(dst, offset(inst->dst, bld, 3)); } @@ -2460,13 +2472,7 @@ */ if (num_iterations > 1) { num_components = instr->num_components - 2; - if (indirect_offset.file == BAD_FILE) { - imm_offset++; - } else { - fs_reg new_indirect = bld.vgrf(BRW_REGISTER_TYPE_UD, 1); - bld.ADD(new_indirect, indirect_offset, brw_imm_ud(1u)); - indirect_offset = new_indirect; - } + imm_offset++; } } break; @@ -2476,6 +2482,7 @@ case nir_intrinsic_load_per_vertex_output: { fs_reg indirect_offset = get_indirect_offset(instr); unsigned imm_offset = instr->const_index[0]; + unsigned first_component = nir_intrinsic_component(instr); fs_inst *inst; if (indirect_offset.file == BAD_FILE) { @@ -2484,86 +2491,25 @@ bld.MOV(patch_handle, retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UD)); - if (imm_offset == 0) { - /* This is a read of gl_TessLevelInner[], which lives in the - * Patch URB header. The layout depends on the domain. - */ - dst.type = BRW_REGISTER_TYPE_F; - switch (tcs_key->tes_primitive_mode) { - case GL_QUADS: { - /* DWords 3-2 (reversed) */ - fs_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_F, 4); - - inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8, tmp, patch_handle); - inst->offset = 0; - inst->mlen = 1; - inst->base_mrf = -1; - inst->regs_written = 4; - - /* dst.xy = tmp.wz */ - bld.MOV(dst, offset(tmp, bld, 3)); - bld.MOV(offset(dst, bld, 1), offset(tmp, bld, 2)); - break; - } - case GL_TRIANGLES: - /* DWord 4; hardcode offset = 1 and regs_written = 1 */ - inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8, dst, patch_handle); - inst->offset = 1; - inst->mlen = 1; - inst->base_mrf = -1; - inst->regs_written = 1; - break; - case GL_ISOLINES: - /* All channels are undefined. */ - break; - default: - unreachable("Bogus tessellation domain"); - } - } else if (imm_offset == 1) { - /* This is a read of gl_TessLevelOuter[], which lives in the - * Patch URB header. The layout depends on the domain. - */ - dst.type = BRW_REGISTER_TYPE_F; - - fs_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_F, 4); - inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8, tmp, patch_handle); - inst->offset = 1; - inst->mlen = 1; - inst->base_mrf = -1; - inst->regs_written = 4; - - /* Reswizzle: WZYX */ - fs_reg srcs[4] = { - offset(tmp, bld, 3), - offset(tmp, bld, 2), - offset(tmp, bld, 1), - offset(tmp, bld, 0), - }; - - unsigned num_components; - switch (tcs_key->tes_primitive_mode) { - case GL_QUADS: - num_components = 4; - break; - case GL_TRIANGLES: - num_components = 3; - break; - case GL_ISOLINES: - /* Isolines are not reversed; swizzle .zw -> .xy */ - srcs[0] = offset(tmp, bld, 2); - srcs[1] = offset(tmp, bld, 3); - num_components = 2; - break; - default: - unreachable("Bogus tessellation domain"); + { + if (first_component != 0) { + unsigned read_components = + instr->num_components + first_component; + fs_reg tmp = bld.vgrf(dst.type, read_components); + inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8, tmp, + patch_handle); + inst->size_written = read_components * REG_SIZE; + for (unsigned i = 0; i < instr->num_components; i++) { + bld.MOV(offset(dst, bld, i), + offset(tmp, bld, i + first_component)); + } + } else { + inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8, dst, + patch_handle); + inst->size_written = instr->num_components * REG_SIZE; } - bld.LOAD_PAYLOAD(dst, srcs, num_components, 0); - } else { - inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8, dst, patch_handle); inst->offset = imm_offset; inst->mlen = 1; - inst->base_mrf = -1; - inst->regs_written = instr->num_components; } } else { /* Indirect indexing - use per-slot offsets as well. */ @@ -2573,12 +2519,24 @@ }; fs_reg payload = bld.vgrf(BRW_REGISTER_TYPE_UD, 2); bld.LOAD_PAYLOAD(payload, srcs, ARRAY_SIZE(srcs), 0); - - inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, dst, payload); + if (first_component != 0) { + unsigned read_components = + instr->num_components + first_component; + fs_reg tmp = bld.vgrf(dst.type, read_components); + inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, tmp, + payload); + inst->size_written = read_components * REG_SIZE; + for (unsigned i = 0; i < instr->num_components; i++) { + bld.MOV(offset(dst, bld, i), + offset(tmp, bld, i + first_component)); + } + } else { + inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, dst, + payload); + inst->size_written = instr->num_components * REG_SIZE; + } inst->offset = imm_offset; inst->mlen = 2; - inst->base_mrf = -1; - inst->regs_written = instr->num_components; } break; } @@ -2598,61 +2556,12 @@ if (indirect_offset.file != BAD_FILE) { srcs[header_regs++] = indirect_offset; - } else if (!is_passthrough_shader) { - if (imm_offset == 0) { - value.type = BRW_REGISTER_TYPE_F; - - mask &= (1 << tesslevel_inner_components(tcs_key->tes_primitive_mode)) - 1; - - /* This is a write to gl_TessLevelInner[], which lives in the - * Patch URB header. The layout depends on the domain. - */ - switch (tcs_key->tes_primitive_mode) { - case GL_QUADS: - /* gl_TessLevelInner[].xy lives at DWords 3-2 (reversed). - * We use an XXYX swizzle to reverse put .xy in the .wz - * channels, and use a .zw writemask. - */ - mask = writemask_for_backwards_vector(mask); - swiz = BRW_SWIZZLE4(0, 0, 1, 0); - break; - case GL_TRIANGLES: - /* gl_TessLevelInner[].x lives at DWord 4, so we set the - * writemask to X and bump the URB offset by 1. - */ - imm_offset = 1; - break; - case GL_ISOLINES: - /* Skip; gl_TessLevelInner[] doesn't exist for isolines. */ - return; - default: - unreachable("Bogus tessellation domain"); - } - } else if (imm_offset == 1) { - /* This is a write to gl_TessLevelOuter[] which lives in the - * Patch URB Header at DWords 4-7. However, it's reversed, so - * instead of .xyzw we have .wzyx. - */ - value.type = BRW_REGISTER_TYPE_F; - - mask &= (1 << tesslevel_outer_components(tcs_key->tes_primitive_mode)) - 1; - - if (tcs_key->tes_primitive_mode == GL_ISOLINES) { - /* Isolines .xy should be stored in .zw, in order. */ - swiz = BRW_SWIZZLE4(0, 0, 0, 1); - mask <<= 2; - } else { - /* Other domains are reversed; store .wzyx instead of .xyzw */ - swiz = BRW_SWIZZLE_WZYX; - mask = writemask_for_backwards_vector(mask); - } - } } if (mask == 0) break; - unsigned num_components = _mesa_fls(mask); + unsigned num_components = util_last_bit(mask); enum opcode opcode; /* We can only pack two 64-bit components in a single message, so send @@ -2660,9 +2569,13 @@ */ unsigned num_iterations = 1; unsigned iter_components = num_components; - if (is_64bit && instr->num_components > 2) { - num_iterations = 2; - iter_components = 2; + unsigned first_component = nir_intrinsic_component(instr); + if (is_64bit) { + first_component = first_component / 2; + if (instr->num_components > 2) { + num_iterations = 2; + iter_components = 2; + } } /* 64-bit data needs to me shuffled before we can write it to the URB. @@ -2672,6 +2585,8 @@ fs_reg tmp = fs_reg(VGRF, alloc.allocate(2 * iter_components), value.type); + mask = mask << first_component; + for (unsigned iter = 0; iter < num_iterations; iter++) { if (!is_64bit && mask != WRITEMASK_XYZW) { srcs[header_regs++] = brw_imm_ud(mask << 16); @@ -2709,11 +2624,12 @@ } for (unsigned i = 0; i < iter_components; i++) { - if (!(mask & (1 << i))) + if (!(mask & (1 << (i + first_component)))) continue; if (!is_64bit) { - srcs[header_regs + i] = offset(value, bld, BRW_GET_SWZ(swiz, i)); + srcs[header_regs + i + first_component] = + offset(value, bld, BRW_GET_SWZ(swiz, i)); } else { /* We need to shuffle the 64-bit data to match the layout * expected by our 32-bit URB write messages. We use a temporary @@ -2730,13 +2646,15 @@ unsigned idx = 2 * i; bld.MOV(dest, offset(tmp, bld, idx)); bld.MOV(offset(dest, bld, 1), offset(tmp, bld, idx + 1)); - srcs[header_regs + idx] = dest; - srcs[header_regs + idx + 1] = offset(dest, bld, 1); + srcs[header_regs + idx + first_component * 2] = dest; + srcs[header_regs + idx + 1 + first_component * 2] = + offset(dest, bld, 1); } } unsigned mlen = - header_regs + (is_64bit ? 2 * iter_components : iter_components); + header_regs + (is_64bit ? 2 * iter_components : iter_components) + + (is_64bit ? 2 * first_component : first_component); fs_reg payload = bld.vgrf(BRW_REGISTER_TYPE_UD, mlen); bld.LOAD_PAYLOAD(payload, srcs, mlen, header_regs); @@ -2744,7 +2662,6 @@ fs_inst *inst = bld.emit(opcode, bld.null_reg_ud(), payload); inst->offset = imm_offset; inst->mlen = mlen; - inst->base_mrf = -1; /* If this is a 64-bit attribute, select the next two 64-bit channels * to be handled in the next iteration. @@ -2768,7 +2685,7 @@ nir_intrinsic_instr *instr) { assert(stage == MESA_SHADER_TESS_EVAL); - struct brw_tes_prog_data *tes_prog_data = (struct brw_tes_prog_data *) prog_data; + struct brw_tes_prog_data *tes_prog_data = brw_tes_prog_data(prog_data); fs_reg dest; if (nir_intrinsic_infos[instr->intrinsic].has_dest) @@ -2785,52 +2702,15 @@ } break; - case nir_intrinsic_load_tess_level_outer: - /* When the TES reads gl_TessLevelOuter, we ensure that the patch header - * appears as a push-model input. So, we can simply use the ATTR file - * rather than issuing URB read messages. The data is stored in the - * high DWords in reverse order - DWord 7 contains .x, DWord 6 contains - * .y, and so on. - */ - switch (tes_prog_data->domain) { - case BRW_TESS_DOMAIN_QUAD: - for (unsigned i = 0; i < 4; i++) - bld.MOV(offset(dest, bld, i), component(fs_reg(ATTR, 0), 7 - i)); - break; - case BRW_TESS_DOMAIN_TRI: - for (unsigned i = 0; i < 3; i++) - bld.MOV(offset(dest, bld, i), component(fs_reg(ATTR, 0), 7 - i)); - break; - case BRW_TESS_DOMAIN_ISOLINE: - for (unsigned i = 0; i < 2; i++) - bld.MOV(offset(dest, bld, i), component(fs_reg(ATTR, 0), 6 + i)); - break; - } - break; - - case nir_intrinsic_load_tess_level_inner: - /* When the TES reads gl_TessLevelInner, we ensure that the patch header - * appears as a push-model input. So, we can simply use the ATTR file - * rather than issuing URB read messages. - */ - switch (tes_prog_data->domain) { - case BRW_TESS_DOMAIN_QUAD: - bld.MOV(dest, component(fs_reg(ATTR, 0), 3)); - bld.MOV(offset(dest, bld, 1), component(fs_reg(ATTR, 0), 2)); - break; - case BRW_TESS_DOMAIN_TRI: - bld.MOV(dest, component(fs_reg(ATTR, 0), 4)); - break; - case BRW_TESS_DOMAIN_ISOLINE: - /* ignore - value is undefined */ - break; - } - break; - case nir_intrinsic_load_input: case nir_intrinsic_load_per_vertex_input: { fs_reg indirect_offset = get_indirect_offset(instr); unsigned imm_offset = instr->const_index[0]; + unsigned first_component = nir_intrinsic_component(instr); + + if (type_sz(dest.type) == 8) { + first_component = first_component / 2; + } fs_inst *inst; if (indirect_offset.file == BAD_FILE) { @@ -2841,7 +2721,8 @@ if (imm_offset < max_push_slots) { fs_reg src = fs_reg(ATTR, imm_offset / 2, dest.type); for (int i = 0; i < instr->num_components; i++) { - unsigned comp = 16 / type_sz(dest.type) * (imm_offset % 2) + i; + unsigned comp = 16 / type_sz(dest.type) * (imm_offset % 2) + + i + first_component; bld.MOV(offset(dest, bld, i), component(src, comp)); } tes_prog_data->base.urb_read_length = @@ -2855,26 +2736,94 @@ fs_reg patch_handle = bld.vgrf(BRW_REGISTER_TYPE_UD, 1); bld.LOAD_PAYLOAD(patch_handle, srcs, ARRAY_SIZE(srcs), 0); - inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8, dest, patch_handle); + if (first_component != 0) { + unsigned read_components = + instr->num_components + first_component; + fs_reg tmp = bld.vgrf(dest.type, read_components); + inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8, tmp, + patch_handle); + inst->size_written = read_components * REG_SIZE; + for (unsigned i = 0; i < instr->num_components; i++) { + bld.MOV(offset(dest, bld, i), + offset(tmp, bld, i + first_component)); + } + } else { + inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8, dest, + patch_handle); + inst->size_written = instr->num_components * REG_SIZE; + } inst->mlen = 1; inst->offset = imm_offset; - inst->base_mrf = -1; - inst->regs_written = instr->num_components; } } else { /* Indirect indexing - use per-slot offsets as well. */ - const fs_reg srcs[] = { - retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UD), - indirect_offset - }; - fs_reg payload = bld.vgrf(BRW_REGISTER_TYPE_UD, 2); - bld.LOAD_PAYLOAD(payload, srcs, ARRAY_SIZE(srcs), 0); - inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, dest, payload); - inst->mlen = 2; - inst->offset = imm_offset; - inst->base_mrf = -1; - inst->regs_written = instr->num_components; + /* We can only read two double components with each URB read, so + * we send two read messages in that case, each one loading up to + * two double components. + */ + unsigned num_iterations = 1; + unsigned num_components = instr->num_components; + fs_reg orig_dest = dest; + if (type_sz(dest.type) == 8) { + if (instr->num_components > 2) { + num_iterations = 2; + num_components = 2; + } + fs_reg tmp = fs_reg(VGRF, alloc.allocate(4), dest.type); + dest = tmp; + } + + for (unsigned iter = 0; iter < num_iterations; iter++) { + const fs_reg srcs[] = { + retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UD), + indirect_offset + }; + fs_reg payload = bld.vgrf(BRW_REGISTER_TYPE_UD, 2); + bld.LOAD_PAYLOAD(payload, srcs, ARRAY_SIZE(srcs), 0); + + if (first_component != 0) { + unsigned read_components = + num_components + first_component; + fs_reg tmp = bld.vgrf(dest.type, read_components); + inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, tmp, + payload); + for (unsigned i = 0; i < num_components; i++) { + bld.MOV(offset(dest, bld, i), + offset(tmp, bld, i + first_component)); + } + } else { + inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, dest, + payload); + } + inst->mlen = 2; + inst->offset = imm_offset; + inst->size_written = (num_components + first_component) * + inst->dst.component_size(inst->exec_size); + + /* If we are reading 64-bit data using 32-bit read messages we need + * build proper 64-bit data elements by shuffling the low and high + * 32-bit components around like we do for other things like UBOs + * or SSBOs. + */ + if (type_sz(dest.type) == 8) { + shuffle_32bit_load_result_to_64bit_data( + bld, dest, retype(dest, BRW_REGISTER_TYPE_F), num_components); + + for (unsigned c = 0; c < num_components; c++) { + bld.MOV(offset(orig_dest, bld, iter * 2 + c), + offset(dest, bld, c)); + } + } + + /* If we are loading double data and we need a second read message + * adjust the offset + */ + if (num_iterations > 1) { + num_components = instr->num_components - 2; + imm_offset++; + } + } } break; } @@ -2898,7 +2847,7 @@ switch (instr->intrinsic) { case nir_intrinsic_load_primitive_id: assert(stage == MESA_SHADER_GEOMETRY); - assert(((struct brw_gs_prog_data *)prog_data)->include_primitive_id); + assert(brw_gs_prog_data(prog_data)->include_primitive_id); bld.MOV(retype(dest, BRW_REGISTER_TYPE_UD), retype(fs_reg(brw_vec8_grf(2, 0)), BRW_REGISTER_TYPE_UD)); break; @@ -2908,7 +2857,8 @@ case nir_intrinsic_load_per_vertex_input: emit_gs_input_load(dest, instr->src[0], instr->const_index[0], - instr->src[1], instr->num_components); + instr->src[1], instr->num_components, + nir_intrinsic_component(instr)); break; case nir_intrinsic_emit_vertex_with_counter: @@ -2937,14 +2887,167 @@ } } +/** + * Fetch the current render target layer index. + */ +static fs_reg +fetch_render_target_array_index(const fs_builder &bld) +{ + if (bld.shader->devinfo->gen >= 6) { + /* The render target array index is provided in the thread payload as + * bits 26:16 of r0.0. + */ + const fs_reg idx = bld.vgrf(BRW_REGISTER_TYPE_UD); + bld.AND(idx, brw_uw1_reg(BRW_GENERAL_REGISTER_FILE, 0, 1), + brw_imm_uw(0x7ff)); + return idx; + } else { + /* Pre-SNB we only ever render into the first layer of the framebuffer + * since layered rendering is not implemented. + */ + return brw_imm_ud(0); + } +} + +/** + * Fake non-coherent framebuffer read implemented using TXF to fetch from the + * framebuffer at the current fragment coordinates and sample index. + */ +fs_inst * +fs_visitor::emit_non_coherent_fb_read(const fs_builder &bld, const fs_reg &dst, + unsigned target) +{ + const struct gen_device_info *devinfo = bld.shader->devinfo; + + assert(bld.shader->stage == MESA_SHADER_FRAGMENT); + const brw_wm_prog_key *wm_key = + reinterpret_cast(key); + assert(!wm_key->coherent_fb_fetch); + const struct brw_wm_prog_data *wm_prog_data = + brw_wm_prog_data(stage_prog_data); + + /* Calculate the surface index relative to the start of the texture binding + * table block, since that's what the texturing messages expect. + */ + const unsigned surface = target + + wm_prog_data->binding_table.render_target_read_start - + wm_prog_data->base.binding_table.texture_start; + + brw_mark_surface_used( + bld.shader->stage_prog_data, + wm_prog_data->binding_table.render_target_read_start + target); + + /* Calculate the fragment coordinates. */ + const fs_reg coords = bld.vgrf(BRW_REGISTER_TYPE_UD, 3); + bld.MOV(offset(coords, bld, 0), pixel_x); + bld.MOV(offset(coords, bld, 1), pixel_y); + bld.MOV(offset(coords, bld, 2), fetch_render_target_array_index(bld)); + + /* Calculate the sample index and MCS payload when multisampling. Luckily + * the MCS fetch message behaves deterministically for UMS surfaces, so it + * shouldn't be necessary to recompile based on whether the framebuffer is + * CMS or UMS. + */ + if (wm_key->multisample_fbo && + nir_system_values[SYSTEM_VALUE_SAMPLE_ID].file == BAD_FILE) + nir_system_values[SYSTEM_VALUE_SAMPLE_ID] = *emit_sampleid_setup(); + + const fs_reg sample = nir_system_values[SYSTEM_VALUE_SAMPLE_ID]; + const fs_reg mcs = wm_key->multisample_fbo ? + emit_mcs_fetch(coords, 3, brw_imm_ud(surface)) : fs_reg(); + + /* Use either a normal or a CMS texel fetch message depending on whether + * the framebuffer is single or multisample. On SKL+ use the wide CMS + * message just in case the framebuffer uses 16x multisampling, it should + * be equivalent to the normal CMS fetch for lower multisampling modes. + */ + const opcode op = !wm_key->multisample_fbo ? SHADER_OPCODE_TXF_LOGICAL : + devinfo->gen >= 9 ? SHADER_OPCODE_TXF_CMS_W_LOGICAL : + SHADER_OPCODE_TXF_CMS_LOGICAL; + + /* Emit the instruction. */ + const fs_reg srcs[] = { coords, fs_reg(), brw_imm_ud(0), fs_reg(), + sample, mcs, + brw_imm_ud(surface), brw_imm_ud(0), + fs_reg(), brw_imm_ud(3), brw_imm_ud(0) }; + STATIC_ASSERT(ARRAY_SIZE(srcs) == TEX_LOGICAL_NUM_SRCS); + + fs_inst *inst = bld.emit(op, dst, srcs, ARRAY_SIZE(srcs)); + inst->size_written = 4 * inst->dst.component_size(inst->exec_size); + + return inst; +} + +/** + * Actual coherent framebuffer read implemented using the native render target + * read message. Requires SKL+. + */ +static fs_inst * +emit_coherent_fb_read(const fs_builder &bld, const fs_reg &dst, unsigned target) +{ + assert(bld.shader->devinfo->gen >= 9); + fs_inst *inst = bld.emit(FS_OPCODE_FB_READ_LOGICAL, dst); + inst->target = target; + inst->size_written = 4 * inst->dst.component_size(inst->exec_size); + + return inst; +} + +static fs_reg +alloc_temporary(const fs_builder &bld, unsigned size, fs_reg *regs, unsigned n) +{ + if (n && regs[0].file != BAD_FILE) { + return regs[0]; + + } else { + const fs_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_F, size); + + for (unsigned i = 0; i < n; i++) + regs[i] = tmp; + + return tmp; + } +} + +static fs_reg +alloc_frag_output(fs_visitor *v, unsigned location) +{ + assert(v->stage == MESA_SHADER_FRAGMENT); + const brw_wm_prog_key *const key = + reinterpret_cast(v->key); + const unsigned l = GET_FIELD(location, BRW_NIR_FRAG_OUTPUT_LOCATION); + const unsigned i = GET_FIELD(location, BRW_NIR_FRAG_OUTPUT_INDEX); + + if (i > 0 || (key->force_dual_color_blend && l == FRAG_RESULT_DATA1)) + return alloc_temporary(v->bld, 4, &v->dual_src_output, 1); + + else if (l == FRAG_RESULT_COLOR) + return alloc_temporary(v->bld, 4, v->outputs, + MAX2(key->nr_color_regions, 1)); + + else if (l == FRAG_RESULT_DEPTH) + return alloc_temporary(v->bld, 1, &v->frag_depth, 1); + + else if (l == FRAG_RESULT_STENCIL) + return alloc_temporary(v->bld, 1, &v->frag_stencil, 1); + + else if (l == FRAG_RESULT_SAMPLE_MASK) + return alloc_temporary(v->bld, 1, &v->sample_mask, 1); + + else if (l >= FRAG_RESULT_DATA0 && + l < FRAG_RESULT_DATA0 + BRW_MAX_DRAW_BUFFERS) + return alloc_temporary(v->bld, 4, + &v->outputs[l - FRAG_RESULT_DATA0], 1); + + else + unreachable("Invalid location"); +} + void fs_visitor::nir_emit_fs_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr) { assert(stage == MESA_SHADER_FRAGMENT); - struct brw_wm_prog_data *wm_prog_data = - (struct brw_wm_prog_data *) prog_data; - const struct brw_wm_prog_key *wm_key = (const struct brw_wm_prog_key *) key; fs_reg dest; if (nir_intrinsic_infos[instr->intrinsic].has_dest) @@ -2965,6 +3068,11 @@ break; } + case nir_intrinsic_load_layer_id: + dest.type = BRW_REGISTER_TYPE_UD; + bld.MOV(dest, fetch_render_target_array_index(bld)); + break; + case nir_intrinsic_load_helper_invocation: case nir_intrinsic_load_sample_mask_in: case nir_intrinsic_load_sample_id: { @@ -2976,6 +3084,44 @@ break; } + case nir_intrinsic_store_output: { + const fs_reg src = get_nir_src(instr->src[0]); + const nir_const_value *const_offset = nir_src_as_const_value(instr->src[1]); + assert(const_offset && "Indirect output stores not allowed"); + const unsigned location = nir_intrinsic_base(instr) + + SET_FIELD(const_offset->u32[0], BRW_NIR_FRAG_OUTPUT_LOCATION); + const fs_reg new_dest = retype(alloc_frag_output(this, location), + src.type); + + for (unsigned j = 0; j < instr->num_components; j++) + bld.MOV(offset(new_dest, bld, nir_intrinsic_component(instr) + j), + offset(src, bld, j)); + + break; + } + + case nir_intrinsic_load_output: { + const unsigned l = GET_FIELD(nir_intrinsic_base(instr), + BRW_NIR_FRAG_OUTPUT_LOCATION); + assert(l >= FRAG_RESULT_DATA0); + nir_const_value *const_offset = nir_src_as_const_value(instr->src[0]); + assert(const_offset && "Indirect output loads not allowed"); + const unsigned target = l - FRAG_RESULT_DATA0 + const_offset->u32[0]; + const fs_reg tmp = bld.vgrf(dest.type, 4); + + if (reinterpret_cast(key)->coherent_fb_fetch) + emit_coherent_fb_read(bld, tmp, target); + else + emit_non_coherent_fb_read(bld, tmp, target); + + for (unsigned j = 0; j < instr->num_components; j++) { + bld.MOV(offset(dest, bld, j), + offset(tmp, bld, nir_intrinsic_component(instr) + j)); + } + + break; + } + case nir_intrinsic_discard: case nir_intrinsic_discard_if: { /* We track our discarded pixels in f0.1. By predicating on it, we can @@ -3001,191 +3147,221 @@ break; } - case nir_intrinsic_interp_var_at_centroid: - case nir_intrinsic_interp_var_at_sample: - case nir_intrinsic_interp_var_at_offset: { - /* Handle ARB_gpu_shader5 interpolation intrinsics - * - * It's worth a quick word of explanation as to why we handle the full - * variable-based interpolation intrinsic rather than a lowered version - * with like we do for other inputs. We have to do that because the way - * we set up inputs doesn't allow us to use the already setup inputs for - * interpolation. At the beginning of the shader, we go through all of - * the input variables and do the initial interpolation and put it in - * the nir_inputs array based on its location as determined in - * nir_lower_io. If the input isn't used, dead code cleans up and - * everything works fine. However, when we get to the ARB_gpu_shader5 - * interpolation intrinsics, we need to reinterpolate the input - * differently. If we used an intrinsic that just had an index it would - * only give us the offset into the nir_inputs array. However, this is - * useless because that value is post-interpolation and we need - * pre-interpolation. In order to get the actual location of the bits - * we get from the vertex fetching hardware, we need the variable. - */ - wm_prog_data->pulls_bary = true; + case nir_intrinsic_load_input: { + /* load_input is only used for flat inputs */ + unsigned base = nir_intrinsic_base(instr); + unsigned component = nir_intrinsic_component(instr); + unsigned num_components = instr->num_components; + enum brw_reg_type type = dest.type; - fs_reg dst_xy = bld.vgrf(BRW_REGISTER_TYPE_F, 2); - const glsl_interp_qualifier interpolation = - (glsl_interp_qualifier) instr->variables[0]->var->data.interpolation; + /* Special case fields in the VUE header */ + if (base == VARYING_SLOT_LAYER) + component = 1; + else if (base == VARYING_SLOT_VIEWPORT) + component = 2; + + if (nir_dest_bit_size(instr->dest) == 64) { + /* const_index is in 32-bit type size units that could not be aligned + * with DF. We need to read the double vector as if it was a float + * vector of twice the number of components to fetch the right data. + */ + type = BRW_REGISTER_TYPE_F; + num_components *= 2; + } - switch (instr->intrinsic) { - case nir_intrinsic_interp_var_at_centroid: - emit_pixel_interpolater_send(bld, - FS_OPCODE_INTERPOLATE_AT_CENTROID, - dst_xy, - fs_reg(), /* src */ - brw_imm_ud(0u), - interpolation); - break; + for (unsigned int i = 0; i < num_components; i++) { + struct brw_reg interp = interp_reg(base, component + i); + interp = suboffset(interp, 3); + bld.emit(FS_OPCODE_CINTERP, offset(retype(dest, type), bld, i), + retype(fs_reg(interp), type)); + } - case nir_intrinsic_interp_var_at_sample: { - if (!wm_key->multisample_fbo) { - /* From the ARB_gpu_shader5 specification: - * "If multisample buffers are not available, the input varying - * will be evaluated at the center of the pixel." - */ - emit_pixel_interpolater_send(bld, - FS_OPCODE_INTERPOLATE_AT_CENTROID, - dst_xy, - fs_reg(), /* src */ - brw_imm_ud(0u), - interpolation); - break; - } + if (nir_dest_bit_size(instr->dest) == 64) { + shuffle_32bit_load_result_to_64bit_data(bld, + dest, + retype(dest, type), + instr->num_components); + } + break; + } + + case nir_intrinsic_load_barycentric_pixel: + case nir_intrinsic_load_barycentric_centroid: + case nir_intrinsic_load_barycentric_sample: + /* Do nothing - load_interpolated_input handling will handle it later. */ + break; + + case nir_intrinsic_load_barycentric_at_sample: { + const glsl_interp_mode interpolation = + (enum glsl_interp_mode) nir_intrinsic_interp_mode(instr); - nir_const_value *const_sample = nir_src_as_const_value(instr->src[0]); + nir_const_value *const_sample = nir_src_as_const_value(instr->src[0]); - if (const_sample) { - unsigned msg_data = const_sample->i32[0] << 4; + if (const_sample) { + unsigned msg_data = const_sample->i32[0] << 4; + emit_pixel_interpolater_send(bld, + FS_OPCODE_INTERPOLATE_AT_SAMPLE, + dest, + fs_reg(), /* src */ + brw_imm_ud(msg_data), + interpolation); + } else { + const fs_reg sample_src = retype(get_nir_src(instr->src[0]), + BRW_REGISTER_TYPE_UD); + + if (nir_src_is_dynamically_uniform(instr->src[0])) { + const fs_reg sample_id = bld.emit_uniformize(sample_src); + const fs_reg msg_data = vgrf(glsl_type::uint_type); + bld.exec_all().group(1, 0) + .SHL(msg_data, sample_id, brw_imm_ud(4u)); emit_pixel_interpolater_send(bld, FS_OPCODE_INTERPOLATE_AT_SAMPLE, - dst_xy, + dest, fs_reg(), /* src */ - brw_imm_ud(msg_data), + msg_data, interpolation); } else { - const fs_reg sample_src = retype(get_nir_src(instr->src[0]), - BRW_REGISTER_TYPE_UD); + /* Make a loop that sends a message to the pixel interpolater + * for the sample number in each live channel. If there are + * multiple channels with the same sample number then these + * will be handled simultaneously with a single interation of + * the loop. + */ + bld.emit(BRW_OPCODE_DO); - if (nir_src_is_dynamically_uniform(instr->src[0])) { - const fs_reg sample_id = bld.emit_uniformize(sample_src); - const fs_reg msg_data = vgrf(glsl_type::uint_type); - bld.exec_all().group(1, 0) - .SHL(msg_data, sample_id, brw_imm_ud(4u)); + /* Get the next live sample number into sample_id_reg */ + const fs_reg sample_id = bld.emit_uniformize(sample_src); + + /* Set the flag register so that we can perform the send + * message on all channels that have the same sample number + */ + bld.CMP(bld.null_reg_ud(), + sample_src, sample_id, + BRW_CONDITIONAL_EQ); + const fs_reg msg_data = vgrf(glsl_type::uint_type); + bld.exec_all().group(1, 0) + .SHL(msg_data, sample_id, brw_imm_ud(4u)); + fs_inst *inst = emit_pixel_interpolater_send(bld, FS_OPCODE_INTERPOLATE_AT_SAMPLE, - dst_xy, + dest, fs_reg(), /* src */ msg_data, interpolation); - } else { - /* Make a loop that sends a message to the pixel interpolater - * for the sample number in each live channel. If there are - * multiple channels with the same sample number then these - * will be handled simultaneously with a single interation of - * the loop. - */ - bld.emit(BRW_OPCODE_DO); + set_predicate(BRW_PREDICATE_NORMAL, inst); - /* Get the next live sample number into sample_id_reg */ - const fs_reg sample_id = bld.emit_uniformize(sample_src); - - /* Set the flag register so that we can perform the send - * message on all channels that have the same sample number - */ - bld.CMP(bld.null_reg_ud(), - sample_src, sample_id, - BRW_CONDITIONAL_EQ); - const fs_reg msg_data = vgrf(glsl_type::uint_type); - bld.exec_all().group(1, 0) - .SHL(msg_data, sample_id, brw_imm_ud(4u)); - fs_inst *inst = - emit_pixel_interpolater_send(bld, - FS_OPCODE_INTERPOLATE_AT_SAMPLE, - dst_xy, - fs_reg(), /* src */ - msg_data, - interpolation); - set_predicate(BRW_PREDICATE_NORMAL, inst); - - /* Continue the loop if there are any live channels left */ - set_predicate_inv(BRW_PREDICATE_NORMAL, - true, /* inverse */ - bld.emit(BRW_OPCODE_WHILE)); - } + /* Continue the loop if there are any live channels left */ + set_predicate_inv(BRW_PREDICATE_NORMAL, + true, /* inverse */ + bld.emit(BRW_OPCODE_WHILE)); } - - break; } + break; + } - case nir_intrinsic_interp_var_at_offset: { - nir_const_value *const_offset = nir_src_as_const_value(instr->src[0]); + case nir_intrinsic_load_barycentric_at_offset: { + const glsl_interp_mode interpolation = + (enum glsl_interp_mode) nir_intrinsic_interp_mode(instr); - if (const_offset) { - unsigned off_x = MIN2((int)(const_offset->f32[0] * 16), 7) & 0xf; - unsigned off_y = MIN2((int)(const_offset->f32[1] * 16), 7) & 0xf; + nir_const_value *const_offset = nir_src_as_const_value(instr->src[0]); - emit_pixel_interpolater_send(bld, - FS_OPCODE_INTERPOLATE_AT_SHARED_OFFSET, - dst_xy, - fs_reg(), /* src */ - brw_imm_ud(off_x | (off_y << 4)), - interpolation); - } else { - fs_reg src = vgrf(glsl_type::ivec2_type); - fs_reg offset_src = retype(get_nir_src(instr->src[0]), - BRW_REGISTER_TYPE_F); - for (int i = 0; i < 2; i++) { - fs_reg temp = vgrf(glsl_type::float_type); - bld.MUL(temp, offset(offset_src, bld, i), brw_imm_f(16.0f)); - fs_reg itemp = vgrf(glsl_type::int_type); - /* float to int */ - bld.MOV(itemp, temp); - - /* Clamp the upper end of the range to +7/16. - * ARB_gpu_shader5 requires that we support a maximum offset - * of +0.5, which isn't representable in a S0.4 value -- if - * we didn't clamp it, we'd end up with -8/16, which is the - * opposite of what the shader author wanted. - * - * This is legal due to ARB_gpu_shader5's quantization - * rules: - * - * "Not all values of may be supported; x and y - * offsets may be rounded to fixed-point values with the - * number of fraction bits given by the - * implementation-dependent constant - * FRAGMENT_INTERPOLATION_OFFSET_BITS" - */ - set_condmod(BRW_CONDITIONAL_L, - bld.SEL(offset(src, bld, i), itemp, brw_imm_d(7))); - } + if (const_offset) { + unsigned off_x = MIN2((int)(const_offset->f32[0] * 16), 7) & 0xf; + unsigned off_y = MIN2((int)(const_offset->f32[1] * 16), 7) & 0xf; - const enum opcode opcode = FS_OPCODE_INTERPOLATE_AT_PER_SLOT_OFFSET; - emit_pixel_interpolater_send(bld, - opcode, - dst_xy, - src, - brw_imm_ud(0u), - interpolation); + emit_pixel_interpolater_send(bld, + FS_OPCODE_INTERPOLATE_AT_SHARED_OFFSET, + dest, + fs_reg(), /* src */ + brw_imm_ud(off_x | (off_y << 4)), + interpolation); + } else { + fs_reg src = vgrf(glsl_type::ivec2_type); + fs_reg offset_src = retype(get_nir_src(instr->src[0]), + BRW_REGISTER_TYPE_F); + for (int i = 0; i < 2; i++) { + fs_reg temp = vgrf(glsl_type::float_type); + bld.MUL(temp, offset(offset_src, bld, i), brw_imm_f(16.0f)); + fs_reg itemp = vgrf(glsl_type::int_type); + /* float to int */ + bld.MOV(itemp, temp); + + /* Clamp the upper end of the range to +7/16. + * ARB_gpu_shader5 requires that we support a maximum offset + * of +0.5, which isn't representable in a S0.4 value -- if + * we didn't clamp it, we'd end up with -8/16, which is the + * opposite of what the shader author wanted. + * + * This is legal due to ARB_gpu_shader5's quantization + * rules: + * + * "Not all values of may be supported; x and y + * offsets may be rounded to fixed-point values with the + * number of fraction bits given by the + * implementation-dependent constant + * FRAGMENT_INTERPOLATION_OFFSET_BITS" + */ + set_condmod(BRW_CONDITIONAL_L, + bld.SEL(offset(src, bld, i), itemp, brw_imm_d(7))); } - break; - } - default: - unreachable("Invalid intrinsic"); + const enum opcode opcode = FS_OPCODE_INTERPOLATE_AT_PER_SLOT_OFFSET; + emit_pixel_interpolater_send(bld, + opcode, + dest, + src, + brw_imm_ud(0u), + interpolation); } + break; + } - for (unsigned j = 0; j < instr->num_components; j++) { - fs_reg src = interp_reg(instr->variables[0]->var->data.location, j); - src.type = dest.type; + case nir_intrinsic_load_interpolated_input: { + if (nir_intrinsic_base(instr) == VARYING_SLOT_POS) { + emit_fragcoord_interpolation(dest); + break; + } - bld.emit(FS_OPCODE_LINTERP, dest, dst_xy, src); - dest = offset(dest, bld, 1); + assert(instr->src[0].ssa && + instr->src[0].ssa->parent_instr->type == nir_instr_type_intrinsic); + nir_intrinsic_instr *bary_intrinsic = + nir_instr_as_intrinsic(instr->src[0].ssa->parent_instr); + nir_intrinsic_op bary_intrin = bary_intrinsic->intrinsic; + enum glsl_interp_mode interp_mode = + (enum glsl_interp_mode) nir_intrinsic_interp_mode(bary_intrinsic); + fs_reg dst_xy; + + if (bary_intrin == nir_intrinsic_load_barycentric_at_offset || + bary_intrin == nir_intrinsic_load_barycentric_at_sample) { + /* Use the result of the PI message */ + dst_xy = retype(get_nir_src(instr->src[0]), BRW_REGISTER_TYPE_F); + } else { + /* Use the delta_xy values computed from the payload */ + enum brw_barycentric_mode bary = + brw_barycentric_mode(interp_mode, bary_intrin); + + dst_xy = this->delta_xy[bary]; + } + + for (unsigned int i = 0; i < instr->num_components; i++) { + fs_reg interp = + fs_reg(interp_reg(nir_intrinsic_base(instr), + nir_intrinsic_component(instr) + i)); + interp.type = BRW_REGISTER_TYPE_F; + dest.type = BRW_REGISTER_TYPE_F; + + if (devinfo->gen < 6 && interp_mode == INTERP_MODE_SMOOTH) { + fs_reg tmp = vgrf(glsl_type::float_type); + bld.emit(FS_OPCODE_LINTERP, tmp, dst_xy, interp); + bld.MUL(offset(dest, bld, i), tmp, this->pixel_w); + } else { + bld.emit(FS_OPCODE_LINTERP, offset(dest, bld, i), dst_xy, interp); + } } break; } + default: nir_emit_intrinsic(bld, instr); break; @@ -3197,8 +3373,7 @@ nir_intrinsic_instr *instr) { assert(stage == MESA_SHADER_COMPUTE); - struct brw_cs_prog_data *cs_prog_data = - (struct brw_cs_prog_data *) prog_data; + struct brw_cs_prog_data *cs_prog_data = brw_cs_prog_data(prog_data); fs_reg dest; if (nir_intrinsic_infos[instr->intrinsic].has_dest) @@ -3391,35 +3566,41 @@ switch (instr->intrinsic) { case nir_intrinsic_atomic_counter_inc: case nir_intrinsic_atomic_counter_dec: - case nir_intrinsic_atomic_counter_read: { + case nir_intrinsic_atomic_counter_read: + case nir_intrinsic_atomic_counter_add: + case nir_intrinsic_atomic_counter_min: + case nir_intrinsic_atomic_counter_max: + case nir_intrinsic_atomic_counter_and: + case nir_intrinsic_atomic_counter_or: + case nir_intrinsic_atomic_counter_xor: + case nir_intrinsic_atomic_counter_exchange: + case nir_intrinsic_atomic_counter_comp_swap: { if (stage == MESA_SHADER_FRAGMENT && instr->intrinsic != nir_intrinsic_atomic_counter_read) - ((struct brw_wm_prog_data *)prog_data)->has_side_effects = true; + brw_wm_prog_data(prog_data)->has_side_effects = true; + + /* Get some metadata from the image intrinsic. */ + const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; /* Get the arguments of the atomic intrinsic. */ const fs_reg offset = get_nir_src(instr->src[0]); const unsigned surface = (stage_prog_data->binding_table.abo_start + instr->const_index[0]); + const fs_reg src0 = (info->num_srcs >= 2 + ? get_nir_src(instr->src[1]) : fs_reg()); + const fs_reg src1 = (info->num_srcs >= 3 + ? get_nir_src(instr->src[2]) : fs_reg()); fs_reg tmp; + assert(info->num_srcs <= 3); + /* Emit a surface read or atomic op. */ - switch (instr->intrinsic) { - case nir_intrinsic_atomic_counter_read: + if (instr->intrinsic == nir_intrinsic_atomic_counter_read) { tmp = emit_untyped_read(bld, brw_imm_ud(surface), offset, 1, 1); - break; - - case nir_intrinsic_atomic_counter_inc: - tmp = emit_untyped_atomic(bld, brw_imm_ud(surface), offset, fs_reg(), - fs_reg(), 1, 1, BRW_AOP_INC); - break; - - case nir_intrinsic_atomic_counter_dec: - tmp = emit_untyped_atomic(bld, brw_imm_ud(surface), offset, fs_reg(), - fs_reg(), 1, 1, BRW_AOP_PREDEC); - break; - - default: - unreachable("Unreachable"); + } else { + tmp = emit_untyped_atomic(bld, brw_imm_ud(surface), offset, src0, + src1, 1, 1, + get_atomic_counter_op(instr->intrinsic)); } /* Assign the result. */ @@ -3444,7 +3625,7 @@ if (stage == MESA_SHADER_FRAGMENT && instr->intrinsic != nir_intrinsic_image_load) - ((struct brw_wm_prog_data *)prog_data)->has_side_effects = true; + brw_wm_prog_data(prog_data)->has_side_effects = true; /* Get the referenced image variable and type. */ const nir_variable *var = instr->variables[0]->var; @@ -3496,7 +3677,7 @@ const fs_builder ubld = bld.group(8, 0); const fs_reg tmp = ubld.vgrf(BRW_REGISTER_TYPE_UD, 2); ubld.emit(SHADER_OPCODE_MEMORY_FENCE, tmp) - ->regs_written = 2; + ->size_written = 2 * REG_SIZE; break; } @@ -3525,9 +3706,9 @@ case nir_intrinsic_shader_clock: { /* We cannot do anything if there is an event, so ignore it for now */ - fs_reg shader_clock = get_timestamp(bld); - const fs_reg srcs[] = { shader_clock.set_smear(0), shader_clock.set_smear(1) }; - + const fs_reg shader_clock = get_timestamp(bld); + const fs_reg srcs[] = { component(shader_clock, 0), + component(shader_clock, 1) }; bld.LOAD_PAYLOAD(dest, srcs, ARRAY_SIZE(srcs), 0); break; } @@ -3592,7 +3773,7 @@ if (const_offset) { /* Offsets are in bytes but they should always be multiples of 4 */ assert(const_offset->u32[0] % 4 == 0); - src.reg_offset = const_offset->u32[0] / 4; + src.offset = const_offset->u32[0]; for (unsigned j = 0; j < instr->num_components; j++) { bld.MOV(offset(dest, bld, j), offset(src, bld, j)); @@ -3611,31 +3792,30 @@ unsigned read_size = instr->const_index[1] - (instr->num_components - 1) * type_sz(dest.type); - fs_reg indirect_chv_high_32bit; - bool is_chv_bxt_64bit = - (devinfo->is_cherryview || devinfo->is_broxton) && - type_sz(dest.type) == 8; - if (is_chv_bxt_64bit) { - indirect_chv_high_32bit = vgrf(glsl_type::uint_type); - /* Calculate indirect address to read high 32 bits */ - bld.ADD(indirect_chv_high_32bit, indirect, brw_imm_ud(4)); - } + bool supports_64bit_indirects = + !devinfo->is_cherryview && !devinfo->is_broxton; - for (unsigned j = 0; j < instr->num_components; j++) { - if (!is_chv_bxt_64bit) { + if (type_sz(dest.type) != 8 || supports_64bit_indirects) { + for (unsigned j = 0; j < instr->num_components; j++) { bld.emit(SHADER_OPCODE_MOV_INDIRECT, offset(dest, bld, j), offset(src, bld, j), indirect, brw_imm_ud(read_size)); - } else { - bld.emit(SHADER_OPCODE_MOV_INDIRECT, - subscript(offset(dest, bld, j), BRW_REGISTER_TYPE_UD, 0), - offset(src, bld, j), - indirect, brw_imm_ud(read_size)); - - bld.emit(SHADER_OPCODE_MOV_INDIRECT, - subscript(offset(dest, bld, j), BRW_REGISTER_TYPE_UD, 1), - offset(src, bld, j), - indirect_chv_high_32bit, brw_imm_ud(read_size)); + } + } else { + const unsigned num_mov_indirects = + type_sz(dest.type) / type_sz(BRW_REGISTER_TYPE_UD); + /* We read a little bit less per MOV INDIRECT, as they are now + * 32-bits ones instead of 64-bit. Fix read_size then. + */ + const unsigned read_size_32bit = read_size - + (num_mov_indirects - 1) * type_sz(BRW_REGISTER_TYPE_UD); + for (unsigned j = 0; j < instr->num_components; j++) { + for (unsigned i = 0; i < num_mov_indirects; i++) { + bld.emit(SHADER_OPCODE_MOV_INDIRECT, + subscript(offset(dest, bld, j), BRW_REGISTER_TYPE_UD, i), + subscript(offset(src, bld, j), BRW_REGISTER_TYPE_UD, i), + indirect, brw_imm_ud(read_size_32bit)); + } } } } @@ -3666,7 +3846,7 @@ */ brw_mark_surface_used(prog_data, stage_prog_data->binding_table.ubo_start + - nir->info.num_ubos - 1); + nir->info->num_ubos - 1); } nir_const_value *const_offset = nir_src_as_const_value(instr->src[1]); @@ -3687,20 +3867,23 @@ * and we have to split it if necessary. */ const unsigned type_size = type_sz(dest.type); - const fs_reg packed_consts = bld.vgrf(BRW_REGISTER_TYPE_F); + const unsigned block_sz = 64; /* Fetch one cacheline at a time. */ + const fs_builder ubld = bld.exec_all().group(block_sz / 4, 0); + const fs_reg packed_consts = ubld.vgrf(BRW_REGISTER_TYPE_UD); + for (unsigned c = 0; c < instr->num_components;) { const unsigned base = const_offset->u32[0] + c * type_size; - - /* Number of usable components in the next 16B-aligned load */ + /* Number of usable components in the next block-aligned load. */ const unsigned count = MIN2(instr->num_components - c, - (16 - base % 16) / type_size); + (block_sz - base % block_sz) / type_size); - bld.exec_all() - .emit(FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD, - packed_consts, surf_index, brw_imm_ud(base & ~15)); + ubld.emit(FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD, + packed_consts, surf_index, + brw_imm_ud(base & ~(block_sz - 1))); const fs_reg consts = - retype(byte_offset(packed_consts, base & 15), dest.type); + retype(byte_offset(packed_consts, base & (block_sz - 1)), + dest.type); for (unsigned d = 0; d < count; d++) bld.MOV(offset(dest, bld, c + d), component(consts, d)); @@ -3733,7 +3916,7 @@ */ brw_mark_surface_used(prog_data, stage_prog_data->binding_table.ssbo_start + - nir->info.num_ssbos - 1); + nir->info->num_ssbos - 1); } fs_reg offset_reg; @@ -3751,58 +3934,11 @@ break; } - case nir_intrinsic_load_input: { - fs_reg src; - unsigned num_components = instr->num_components; - enum brw_reg_type type = dest.type; - - if (stage == MESA_SHADER_VERTEX) { - src = fs_reg(ATTR, instr->const_index[0], dest.type); - } else { - assert(type_sz(type) >= 4); - if (type == BRW_REGISTER_TYPE_DF) { - /* const_index is in 32-bit type size units that could not be aligned - * with DF. We need to read the double vector as if it was a float - * vector of twice the number of components to fetch the right data. - */ - dest = retype(dest, BRW_REGISTER_TYPE_F); - num_components *= 2; - } - src = offset(retype(nir_inputs, dest.type), bld, - instr->const_index[0]); - } - - nir_const_value *const_offset = nir_src_as_const_value(instr->src[0]); - assert(const_offset && "Indirect input loads not allowed"); - src = offset(src, bld, const_offset->u32[0]); - - for (unsigned j = 0; j < num_components; j++) { - bld.MOV(offset(dest, bld, j), offset(src, bld, j)); - } - - if (type == BRW_REGISTER_TYPE_DF) { - /* Once the double vector is read, set again its original register - * type to continue with normal execution. - */ - src = retype(src, type); - dest = retype(dest, type); - } - - if (type_sz(src.type) == 8) { - shuffle_32bit_load_result_to_64bit_data(bld, - dest, - retype(dest, BRW_REGISTER_TYPE_F), - instr->num_components); - } - - break; - } - case nir_intrinsic_store_ssbo: { assert(devinfo->gen >= 7); if (stage == MESA_SHADER_FRAGMENT) - ((struct brw_wm_prog_data *)prog_data)->has_side_effects = true; + brw_wm_prog_data(prog_data)->has_side_effects = true; /* Block index */ fs_reg surf_index; @@ -3820,7 +3956,7 @@ brw_mark_surface_used(prog_data, stage_prog_data->binding_table.ssbo_start + - nir->info.num_ssbos - 1); + nir->info->num_ssbos - 1); } /* Value */ @@ -3895,14 +4031,14 @@ case nir_intrinsic_store_output: { fs_reg src = get_nir_src(instr->src[0]); - fs_reg new_dest = offset(retype(nir_outputs, src.type), bld, - instr->const_index[0]); nir_const_value *const_offset = nir_src_as_const_value(instr->src[1]); assert(const_offset && "Indirect output stores not allowed"); - new_dest = offset(new_dest, bld, const_offset->u32[0]); + fs_reg new_dest = retype(offset(outputs[instr->const_index[0]], bld, + 4 * const_offset->u32[0]), src.type); unsigned num_components = instr->num_components; + unsigned first_component = nir_intrinsic_component(instr); unsigned bit_size = instr->src[0].is_ssa ? instr->src[0].ssa->bit_size : instr->src[0].reg.reg->bit_size; if (bit_size == 64) { @@ -3916,7 +4052,8 @@ } for (unsigned j = 0; j < num_components; j++) { - bld.MOV(offset(new_dest, bld, j), offset(src, bld, j)); + bld.MOV(offset(new_dest, bld, j + first_component), + offset(src, bld, j)); } break; } @@ -3976,7 +4113,7 @@ src_payload, brw_imm_ud(index)); inst->header_size = 0; inst->mlen = 1; - inst->regs_written = 4; + inst->size_written = 4 * REG_SIZE; bld.MOV(retype(dest, ret_payload.type), component(ret_payload, 0)); brw_mark_surface_used(prog_data, index); @@ -4008,7 +4145,7 @@ int op, nir_intrinsic_instr *instr) { if (stage == MESA_SHADER_FRAGMENT) - ((struct brw_wm_prog_data *)prog_data)->has_side_effects = true; + brw_wm_prog_data(prog_data)->has_side_effects = true; fs_reg dest; if (nir_intrinsic_infos[instr->intrinsic].has_dest) @@ -4031,7 +4168,7 @@ */ brw_mark_surface_used(prog_data, stage_prog_data->binding_table.ssbo_start + - nir->info.num_ssbos - 1); + nir->info->num_ssbos - 1); } fs_reg offset = get_nir_src(instr->src[1]); @@ -4040,7 +4177,7 @@ if (op == BRW_AOP_CMPWR) data2 = get_nir_src(instr->src[3]); - /* Emit the actual atomic operation operation */ + /* Emit the actual atomic operation */ fs_reg atomic_result = emit_untyped_atomic(bld, surface, offset, data1, data2, @@ -4105,6 +4242,7 @@ if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) srcs[TEX_LOGICAL_SRC_LOD] = brw_imm_d(0); + uint32_t header_bits = 0; for (unsigned i = 0; i < instr->num_srcs; i++) { fs_reg src = get_nir_src(instr->src[i].src); switch (instr->src[i].src_type) { @@ -4112,7 +4250,7 @@ srcs[TEX_LOGICAL_SRC_LOD] = retype(get_nir_src_imm(instr->src[i].src), BRW_REGISTER_TYPE_F); break; - case nir_tex_src_comparitor: + case nir_tex_src_comparator: srcs[TEX_LOGICAL_SRC_SHADOW_C] = retype(src, BRW_REGISTER_TYPE_F); break; case nir_tex_src_coord: @@ -4158,12 +4296,14 @@ case nir_tex_src_offset: { nir_const_value *const_offset = nir_src_as_const_value(instr->src[i].src); - if (const_offset) { - unsigned header_bits = brw_texture_offset(const_offset->i32, 3); - if (header_bits != 0) - srcs[TEX_LOGICAL_SRC_OFFSET_VALUE] = brw_imm_ud(header_bits); + unsigned offset_bits = 0; + if (const_offset && + brw_texture_offset(const_offset->i32, + nir_tex_instr_src_size(instr, i), + &offset_bits)) { + header_bits |= offset_bits; } else { - srcs[TEX_LOGICAL_SRC_OFFSET_VALUE] = + srcs[TEX_LOGICAL_SRC_TG4_OFFSET] = retype(src, BRW_REGISTER_TYPE_D); } break; @@ -4237,18 +4377,11 @@ srcs[TEX_LOGICAL_SRC_COORD_COMPONENTS] = brw_imm_d(instr->coord_components); srcs[TEX_LOGICAL_SRC_GRAD_COMPONENTS] = brw_imm_d(lod_components); - if (instr->op == nir_texop_query_levels) { - /* textureQueryLevels() is implemented in terms of TXS so we need to - * pass a valid LOD argument. - */ - assert(srcs[TEX_LOGICAL_SRC_LOD].file == BAD_FILE); - srcs[TEX_LOGICAL_SRC_LOD] = brw_imm_ud(0u); - } - enum opcode opcode; switch (instr->op) { case nir_texop_tex: - opcode = SHADER_OPCODE_TEX_LOGICAL; + opcode = (stage == MESA_SHADER_FRAGMENT ? SHADER_OPCODE_TEX_LOGICAL : + SHADER_OPCODE_TXL_LOGICAL); break; case nir_texop_txb: opcode = FS_OPCODE_TXB_LOGICAL; @@ -4279,8 +4412,7 @@ opcode = SHADER_OPCODE_LOD_LOGICAL; break; case nir_texop_tg4: - if (srcs[TEX_LOGICAL_SRC_OFFSET_VALUE].file != BAD_FILE && - srcs[TEX_LOGICAL_SRC_OFFSET_VALUE].file != IMM) + if (srcs[TEX_LOGICAL_SRC_TG4_OFFSET].file != BAD_FILE) opcode = SHADER_OPCODE_TG4_OFFSET_LOGICAL; else opcode = SHADER_OPCODE_TG4_LOGICAL; @@ -4311,8 +4443,30 @@ unreachable("unknown texture opcode"); } + /* TXS and TXL require a LOD but not everything we implement using those + * two opcodes provides one. Provide a default LOD of 0. + */ + if ((opcode == SHADER_OPCODE_TXS_LOGICAL || + opcode == SHADER_OPCODE_TXL_LOGICAL) && + srcs[TEX_LOGICAL_SRC_LOD].file == BAD_FILE) { + srcs[TEX_LOGICAL_SRC_LOD] = brw_imm_ud(0u); + } + + if (instr->op == nir_texop_tg4) { + if (instr->component == 1 && + key_tex->gather_channel_quirk_mask & (1 << texture)) { + /* gather4 sampler is broken for green channel on RG32F -- + * we must ask for blue instead. + */ + header_bits |= 2 << 16; + } else { + header_bits |= instr->component << 16; + } + } + fs_reg dst = bld.vgrf(brw_type_for_nir_type(instr->dest_type), 4); fs_inst *inst = bld.emit(opcode, dst, srcs, ARRAY_SIZE(srcs)); + inst->offset = header_bits; const unsigned dest_size = nir_tex_instr_dest_size(instr); if (devinfo->gen >= 9 && @@ -4321,56 +4475,31 @@ nir_ssa_def_components_read(&instr->dest.ssa): (1 << dest_size) - 1; assert(write_mask != 0); /* dead code should have been eliminated */ - inst->regs_written = _mesa_fls(write_mask) * dispatch_width / 8; + inst->size_written = util_last_bit(write_mask) * + inst->dst.component_size(inst->exec_size); } else { - inst->regs_written = 4 * dispatch_width / 8; + inst->size_written = 4 * inst->dst.component_size(inst->exec_size); } if (srcs[TEX_LOGICAL_SRC_SHADOW_C].file != BAD_FILE) inst->shadow_compare = true; - if (srcs[TEX_LOGICAL_SRC_OFFSET_VALUE].file == IMM) - inst->offset = srcs[TEX_LOGICAL_SRC_OFFSET_VALUE].ud; - - if (instr->op == nir_texop_tg4) { - if (instr->component == 1 && - key_tex->gather_channel_quirk_mask & (1 << texture)) { - /* gather4 sampler is broken for green channel on RG32F -- - * we must ask for blue instead. - */ - inst->offset |= 2 << 16; - } else { - inst->offset |= instr->component << 16; - } - - if (devinfo->gen == 6) - emit_gen6_gather_wa(key_tex->gen6_gather_wa[texture], dst); - } + if (instr->op == nir_texop_tg4 && devinfo->gen == 6) + emit_gen6_gather_wa(key_tex->gen6_gather_wa[texture], dst); fs_reg nir_dest[4]; for (unsigned i = 0; i < dest_size; i++) nir_dest[i] = offset(dst, bld, i); - bool is_cube_array = instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && - instr->is_array; - if (instr->op == nir_texop_query_levels) { /* # levels is in .w */ nir_dest[0] = offset(dst, bld, 3); - } else if (instr->op == nir_texop_txs && dest_size >= 3 && - (devinfo->gen < 7 || is_cube_array)) { + } else if (instr->op == nir_texop_txs && + dest_size >= 3 && devinfo->gen < 7) { + /* Gen4-6 return 0 instead of 1 for single layer surfaces. */ fs_reg depth = offset(dst, bld, 2); - fs_reg fixed_depth = vgrf(glsl_type::int_type); - - if (is_cube_array) { - /* fixup #layers for cube map arrays */ - bld.emit(SHADER_OPCODE_INT_QUOTIENT, fixed_depth, depth, brw_imm_d(6)); - } else if (devinfo->gen < 7) { - /* Gen4-6 return 0 instead of 1 for single layer surfaces. */ - bld.emit_minmax(fixed_depth, depth, brw_imm_d(1), BRW_CONDITIONAL_GE); - } - - nir_dest[2] = fixed_depth; + nir_dest[2] = vgrf(glsl_type::int_type); + bld.emit_minmax(nir_dest[2], depth, brw_imm_d(1), BRW_CONDITIONAL_GE); } bld.LOAD_PAYLOAD(get_nir_dest(instr->dest), nir_dest, dest_size, 0); @@ -4468,7 +4597,9 @@ assert(type_sz(src.type) == 8); assert(type_sz(dst.type) == 4); - assert(!src.in_range(dst, 2 * components * bld.dispatch_width() / 8)); + assert(!regions_overlap( + dst, 2 * components * dst.component_size(bld.dispatch_width()), + src, components * src.component_size(bld.dispatch_width()))); for (unsigned i = 0; i < components; i++) { const fs_reg component_i = offset(src, bld, i); @@ -4476,3 +4607,51 @@ bld.MOV(offset(dst, bld, 2 * i + 1), subscript(component_i, dst.type, 1)); } } + +fs_reg +setup_imm_df(const fs_builder &bld, double v) +{ + const struct gen_device_info *devinfo = bld.shader->devinfo; + assert(devinfo->gen >= 7); + + if (devinfo->gen >= 8) + return brw_imm_df(v); + + /* gen7.5 does not support DF immediates straighforward but the DIM + * instruction allows to set the 64-bit immediate value. + */ + if (devinfo->is_haswell) { + const fs_builder ubld = bld.exec_all().group(1, 0); + fs_reg dst = ubld.vgrf(BRW_REGISTER_TYPE_DF, 1); + ubld.DIM(dst, brw_imm_df(v)); + return component(dst, 0); + } + + /* gen7 does not support DF immediates, so we generate a 64-bit constant by + * writing the low 32-bit of the constant to suboffset 0 of a VGRF and + * the high 32-bit to suboffset 4 and then applying a stride of 0. + * + * Alternatively, we could also produce a normal VGRF (without stride 0) + * by writing to all the channels in the VGRF, however, that would hit the + * gen7 bug where we have to split writes that span more than 1 register + * into instructions with a width of 4 (otherwise the write to the second + * register written runs into an execmask hardware bug) which isn't very + * nice. + */ + union { + double d; + struct { + uint32_t i1; + uint32_t i2; + }; + } di; + + di.d = v; + + const fs_builder ubld = bld.exec_all().group(1, 0); + const fs_reg tmp = ubld.vgrf(BRW_REGISTER_TYPE_UD, 2); + ubld.MOV(tmp, brw_imm_ud(di.i1)); + ubld.MOV(horiz_offset(tmp, 1), brw_imm_ud(di.i2)); + + return component(retype(tmp, BRW_REGISTER_TYPE_DF), 0); +} diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -36,8 +36,8 @@ assign_reg(unsigned *reg_hw_locations, fs_reg *reg) { if (reg->file == VGRF) { - reg->nr = reg_hw_locations[reg->nr] + reg->reg_offset; - reg->reg_offset = 0; + reg->nr = reg_hw_locations[reg->nr] + reg->offset / REG_SIZE; + reg->offset %= REG_SIZE; } } @@ -75,7 +75,7 @@ static void brw_alloc_reg_set(struct brw_compiler *compiler, int dispatch_width) { - const struct brw_device_info *devinfo = compiler->devinfo; + const struct gen_device_info *devinfo = compiler->devinfo; int base_reg_count = BRW_MAX_GRF; const int index = _mesa_logbase2(dispatch_width / 8); @@ -362,9 +362,9 @@ if (node_nr >= payload_node_count) continue; - for (int j = 0; j < inst->regs_read(i); j++) { + for (unsigned j = 0; j < regs_read(inst, i); j++) { payload_last_use_ip[node_nr + j] = use_ip; - assert(node_nr + j < payload_node_count); + assert(node_nr + j < unsigned(payload_node_count)); } } } @@ -563,14 +563,14 @@ * second operand of a PLN instruction needs to be an * even-numbered register, so we have a special register class * wm_aligned_pairs_class to handle this case. pre-GEN6 always - * uses this->delta_xy[BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC] as the + * uses this->delta_xy[BRW_BARYCENTRIC_PERSPECTIVE_PIXEL] as the * second operand of a PLN instruction (since it doesn't support * any other interpolation modes). So all we need to do is find * that register and set it to the appropriate class. */ if (compiler->fs_reg_sets[rsi].aligned_pairs_class >= 0 && - this->delta_xy[BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC].file == VGRF && - this->delta_xy[BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC].nr == i) { + this->delta_xy[BRW_BARYCENTRIC_PERSPECTIVE_PIXEL].file == VGRF && + this->delta_xy[BRW_BARYCENTRIC_PERSPECTIVE_PIXEL].nr == i) { c = compiler->fs_reg_sets[rsi].aligned_pairs_class; } @@ -754,7 +754,7 @@ emit_unspill(const fs_builder &bld, fs_reg dst, uint32_t spill_offset, unsigned count) { - const brw_device_info *devinfo = bld.shader->devinfo; + const gen_device_info *devinfo = bld.shader->devinfo; const unsigned reg_size = dst.component_size(bld.dispatch_width()) / REG_SIZE; assert(count % reg_size == 0); @@ -780,7 +780,7 @@ unspill_inst->mlen = 1; /* header contains offset */ } - dst.reg_offset += reg_size; + dst.offset += reg_size * REG_SIZE; spill_offset += reg_size * REG_SIZE; } } @@ -796,7 +796,7 @@ for (unsigned i = 0; i < count / reg_size; i++) { fs_inst *spill_inst = bld.emit(SHADER_OPCODE_GEN4_SCRATCH_WRITE, bld.null_reg_f(), src); - src.reg_offset += reg_size; + src.offset += reg_size * REG_SIZE; spill_inst->offset = spill_offset + i * reg_size * REG_SIZE; spill_inst->mlen = 1 + reg_size; /* header, value */ spill_inst->base_mrf = spill_base_mrf(bld.shader); @@ -822,11 +822,11 @@ foreach_block_and_inst(block, fs_inst, inst, cfg) { for (unsigned int i = 0; i < inst->sources; i++) { if (inst->src[i].file == VGRF) - spill_costs[inst->src[i].nr] += loop_scale; + spill_costs[inst->src[i].nr] += regs_read(inst, i) * loop_scale; } if (inst->dst.file == VGRF) - spill_costs[inst->dst.nr] += inst->regs_written * loop_scale; + spill_costs[inst->dst.nr] += regs_written(inst) * loop_scale; switch (inst->opcode) { @@ -903,20 +903,20 @@ for (unsigned int i = 0; i < inst->sources; i++) { if (inst->src[i].file == VGRF && inst->src[i].nr == spill_reg) { - int regs_read = inst->regs_read(i); - int subset_spill_offset = (spill_offset + - REG_SIZE * inst->src[i].reg_offset); - fs_reg unspill_dst(VGRF, alloc.allocate(regs_read)); + int count = regs_read(inst, i); + int subset_spill_offset = spill_offset + + ROUND_DOWN_TO(inst->src[i].offset, REG_SIZE); + fs_reg unspill_dst(VGRF, alloc.allocate(count)); inst->src[i].nr = unspill_dst.nr; - inst->src[i].reg_offset = 0; + inst->src[i].offset %= REG_SIZE; /* We read the largest power-of-two divisor of the register count * (because only POT scratch read blocks are allowed by the * hardware) up to the maximum supported block size. */ const unsigned width = - MIN2(32, 1u << (ffs(MAX2(1, regs_read) * 8) - 1)); + MIN2(32, 1u << (ffs(MAX2(1, count) * 8) - 1)); /* Set exec_all() on unspill messages under the (rather * pessimistic) assumption that there is no one-to-one @@ -926,18 +926,18 @@ * unspill destination is a block-local temporary. */ emit_unspill(ibld.exec_all().group(width, 0), - unspill_dst, subset_spill_offset, regs_read); + unspill_dst, subset_spill_offset, count); } } if (inst->dst.file == VGRF && inst->dst.nr == spill_reg) { - int subset_spill_offset = (spill_offset + - REG_SIZE * inst->dst.reg_offset); - fs_reg spill_src(VGRF, alloc.allocate(inst->regs_written)); + int subset_spill_offset = spill_offset + + ROUND_DOWN_TO(inst->dst.offset, REG_SIZE); + fs_reg spill_src(VGRF, alloc.allocate(regs_written(inst))); inst->dst.nr = spill_src.nr; - inst->dst.reg_offset = 0; + inst->dst.offset %= REG_SIZE; /* If we're immediately spilling the register, we should not use * destination dependency hints. Doing so will cause the GPU do @@ -971,19 +971,19 @@ const fs_builder ubld = ibld.exec_all(!per_channel).group(width, 0); /* If our write is going to affect just part of the - * inst->regs_written(), then we need to unspill the destination - * since we write back out all of the regs_written(). If the - * original instruction had force_writemask_all set and is not a - * partial write, there should be no need for the unspill since the + * regs_written(inst), then we need to unspill the destination since + * we write back out all of the regs_written(). If the original + * instruction had force_writemask_all set and is not a partial + * write, there should be no need for the unspill since the * instruction will be overwriting the whole destination in any case. */ if (inst->is_partial_write() || (!inst->force_writemask_all && !per_channel)) emit_unspill(ubld, spill_src, subset_spill_offset, - inst->regs_written); + regs_written(inst)); emit_spill(ubld.at(block, inst->next), spill_src, - subset_spill_offset, inst->regs_written); + subset_spill_offset, regs_written(inst)); } } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_register_coalesce.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_register_coalesce.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_register_coalesce.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_register_coalesce.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -50,10 +50,12 @@ if (inst->opcode == SHADER_OPCODE_LOAD_PAYLOAD) { fs_reg dst = inst->dst; for (int i = 0; i < inst->sources; i++) { - dst.reg_offset = i; if (!dst.equals(inst->src[i])) { return false; } + dst.offset += (i < inst->header_size ? REG_SIZE : + inst->exec_size * dst.stride * + type_sz(inst->src[i].type)); } return true; } else if (inst->opcode == BRW_OPCODE_MOV) { @@ -136,8 +138,10 @@ if (scan_ip > end_ip) return true; /* registers do not interfere */ - if (scan_inst->overwrites_reg(inst->dst) || - scan_inst->overwrites_reg(inst->src[0])) + if (regions_overlap(scan_inst->dst, scan_inst->size_written, + inst->dst, inst->size_written) || + regions_overlap(scan_inst->dst, scan_inst->size_written, + inst->src[0], inst->size_read(0))) return false; /* registers interfere */ } } @@ -190,9 +194,9 @@ dst_reg_offset[i] = i; } mov[0] = inst; - channels_remaining -= inst->regs_written; + channels_remaining -= regs_written(inst); } else { - const int offset = inst->src[0].reg_offset; + const int offset = inst->src[0].offset / REG_SIZE; if (mov[offset]) { /* This is the second time that this offset in the register has * been set. This means, in particular, that inst->dst was @@ -203,11 +207,10 @@ channels_remaining = -1; continue; } - dst_reg_offset[offset] = inst->dst.reg_offset; - if (inst->regs_written > 1) - dst_reg_offset[offset + 1] = inst->dst.reg_offset + 1; + for (unsigned i = 0; i < MAX2(inst->size_written / REG_SIZE, 1); i++) + dst_reg_offset[offset + i] = inst->dst.offset / REG_SIZE + i; mov[offset] = inst; - channels_remaining -= inst->regs_written; + channels_remaining -= regs_written(inst); } if (channels_remaining) @@ -253,16 +256,16 @@ if (scan_inst->dst.file == VGRF && scan_inst->dst.nr == src_reg) { scan_inst->dst.nr = dst_reg; - scan_inst->dst.reg_offset = - dst_reg_offset[scan_inst->dst.reg_offset]; + scan_inst->dst.offset = scan_inst->dst.offset % REG_SIZE + + dst_reg_offset[scan_inst->dst.offset / REG_SIZE] * REG_SIZE; } for (int j = 0; j < scan_inst->sources; j++) { if (scan_inst->src[j].file == VGRF && scan_inst->src[j].nr == src_reg) { scan_inst->src[j].nr = dst_reg; - scan_inst->src[j].reg_offset = - dst_reg_offset[scan_inst->src[j].reg_offset]; + scan_inst->src[j].offset = scan_inst->src[j].offset % REG_SIZE + + dst_reg_offset[scan_inst->src[j].offset / REG_SIZE] * REG_SIZE; } } } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_saturate_propagation.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_saturate_propagation.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_saturate_propagation.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_saturate_propagation.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -64,7 +64,8 @@ bool interfered = false; foreach_inst_in_block_reverse_starting_from(fs_inst, scan_inst, inst) { - if (scan_inst->overwrites_reg(inst->src[0])) { + if (regions_overlap(scan_inst->dst, scan_inst->size_written, + inst->src[0], inst->size_read(0))) { if (scan_inst->is_partial_write() || (scan_inst->dst.type != inst->dst.type && !scan_inst->can_change_types())) @@ -116,7 +117,8 @@ for (int i = 0; i < scan_inst->sources; i++) { if (scan_inst->src[i].file == VGRF && scan_inst->src[i].nr == inst->src[0].nr && - scan_inst->src[i].reg_offset == inst->src[0].reg_offset) { + scan_inst->src[i].offset / REG_SIZE == + inst->src[0].offset / REG_SIZE) { if (scan_inst->opcode != BRW_OPCODE_MOV || !scan_inst->saturate || scan_inst->src[0].abs || diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -165,6 +165,8 @@ then_mov[i]->exec_size != else_mov[i]->exec_size || then_mov[i]->group != else_mov[i]->group || then_mov[i]->force_writemask_all != else_mov[i]->force_writemask_all || + then_mov[i]->dst.type != then_mov[i]->src[0].type || + else_mov[i]->dst.type != else_mov[i]->src[0].type || then_mov[i]->is_partial_write() || else_mov[i]->is_partial_write() || then_mov[i]->conditional_mod != BRW_CONDITIONAL_NONE || diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -50,7 +50,7 @@ const fs_reg dst = bld.vgrf(BRW_REGISTER_TYPE_UD, rsize); fs_inst *inst = bld.emit(opcode, dst, srcs, ARRAY_SIZE(srcs)); - inst->regs_written = rsize * bld.dispatch_width() / 8; + inst->size_written = rsize * dst.component_size(inst->exec_size); inst->predicate = pred; return dst; } @@ -284,7 +284,7 @@ * Return true if the format conversion boils down to a trivial copy. */ inline bool - is_conversion_trivial(const brw_device_info *devinfo, isl_format format) + is_conversion_trivial(const gen_device_info *devinfo, isl_format format) { return (get_bit_widths(format).r == 32 && is_homogeneous(format)) || format == isl_lower_storage_image_format(devinfo, format); @@ -295,7 +295,7 @@ * compatible bitfield layout, but possibly different data types. */ inline bool - has_supported_bit_layout(const brw_device_info *devinfo, + has_supported_bit_layout(const gen_device_info *devinfo, isl_format format) { const color_u widths = get_bit_widths(format); @@ -314,7 +314,7 @@ * friends implemented as RGBA16UI). */ inline bool - has_split_bit_layout(const brw_device_info *devinfo, isl_format format) + has_split_bit_layout(const gen_device_info *devinfo, isl_format format) { const isl_format lower_format = isl_lower_storage_image_format(devinfo, format); @@ -331,7 +331,7 @@ * significant bits. */ inline bool - has_undefined_high_bits(const brw_device_info *devinfo, + has_undefined_high_bits(const gen_device_info *devinfo, isl_format format) { const isl_format lower_format = @@ -362,7 +362,7 @@ emit_untyped_image_check(const fs_builder &bld, const fs_reg &image, brw_predicate pred) { - const brw_device_info *devinfo = bld.shader->devinfo; + const gen_device_info *devinfo = bld.shader->devinfo; const fs_reg stride = offset(image, bld, BRW_IMAGE_PARAM_STRIDE_OFFSET); if (devinfo->gen == 7 && !devinfo->is_haswell) { @@ -393,7 +393,7 @@ brw_predicate emit_typed_atomic_check(const fs_builder &bld, const fs_reg &image) { - const brw_device_info *devinfo = bld.shader->devinfo; + const gen_device_info *devinfo = bld.shader->devinfo; const fs_reg size = offset(image, bld, BRW_IMAGE_PARAM_SIZE_OFFSET); if (devinfo->gen == 7 && !devinfo->is_haswell) { @@ -509,7 +509,7 @@ emit_address_calculation(const fs_builder &bld, const fs_reg &image, const fs_reg &coord, unsigned dims) { - const brw_device_info *devinfo = bld.shader->devinfo; + const gen_device_info *devinfo = bld.shader->devinfo; const fs_reg off = offset(image, bld, BRW_IMAGE_PARAM_OFFSET_OFFSET); const fs_reg stride = offset(image, bld, BRW_IMAGE_PARAM_STRIDE_OFFSET); const fs_reg tile = offset(image, bld, BRW_IMAGE_PARAM_TILING_OFFSET); @@ -962,7 +962,7 @@ using namespace image_validity; using namespace image_coordinates; using namespace surface_access; - const brw_device_info *devinfo = bld.shader->devinfo; + const gen_device_info *devinfo = bld.shader->devinfo; const isl_format format = isl_format_for_gl_format(gl_format); const isl_format lower_format = isl_lower_storage_image_format(devinfo, format); @@ -982,7 +982,7 @@ /* Untyped surface reads return 32 bits of the surface per * component, without any sort of unpacking or type conversion, */ - const unsigned size = isl_format_get_layout(format)->bs / 4; + const unsigned size = isl_format_get_layout(format)->bpb / 32; /* they don't properly handle out of bounds access, so we have to * check manually if the coordinates are valid and predicate the * surface read on the result, @@ -1071,7 +1071,7 @@ using namespace image_coordinates; using namespace surface_access; const isl_format format = isl_format_for_gl_format(gl_format); - const brw_device_info *devinfo = bld.shader->devinfo; + const gen_device_info *devinfo = bld.shader->devinfo; /* Transform the image coordinates into actual surface coordinates. */ const fs_reg saddr = @@ -1130,7 +1130,7 @@ /* Untyped surface writes store 32 bits of the surface per * component, without any sort of packing or type conversion, */ - const unsigned size = isl_format_get_layout(format)->bs / 4; + const unsigned size = isl_format_get_layout(format)->bpb / 32; /* they don't properly handle out of bounds access, so we have * to check manually if the coordinates are valid and predicate diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_validate.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_validate.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_validate.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_validate.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -43,14 +43,14 @@ { foreach_block_and_inst (block, fs_inst, inst, cfg) { if (inst->dst.file == VGRF) { - fsv_assert(inst->dst.reg_offset + inst->regs_written <= + fsv_assert(inst->dst.offset / REG_SIZE + regs_written(inst) <= alloc.sizes[inst->dst.nr]); } for (unsigned i = 0; i < inst->sources; i++) { if (inst->src[i].file == VGRF) { - fsv_assert(inst->src[i].reg_offset + inst->regs_read(i) <= - (int)alloc.sizes[inst->src[i].nr]); + fsv_assert(inst->src[i].offset / REG_SIZE + regs_read(inst, i) <= + alloc.sizes[inst->src[i].nr]); } } } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -36,38 +36,37 @@ fs_visitor::emit_vs_system_value(int location) { fs_reg *reg = new(this->mem_ctx) - fs_reg(ATTR, 4 * (_mesa_bitcount_64(nir->info.inputs_read) + - _mesa_bitcount_64(nir->info.double_inputs_read)), + fs_reg(ATTR, 4 * _mesa_bitcount_64(nir->info->inputs_read), BRW_REGISTER_TYPE_D); - brw_vs_prog_data *vs_prog_data = (brw_vs_prog_data *) prog_data; + struct brw_vs_prog_data *vs_prog_data = brw_vs_prog_data(prog_data); switch (location) { case SYSTEM_VALUE_BASE_VERTEX: - reg->reg_offset = 0; + reg->offset = 0; vs_prog_data->uses_basevertex = true; break; case SYSTEM_VALUE_BASE_INSTANCE: - reg->reg_offset = 1; + reg->offset = REG_SIZE; vs_prog_data->uses_baseinstance = true; break; case SYSTEM_VALUE_VERTEX_ID: unreachable("should have been lowered"); case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE: - reg->reg_offset = 2; + reg->offset = 2 * REG_SIZE; vs_prog_data->uses_vertexid = true; break; case SYSTEM_VALUE_INSTANCE_ID: - reg->reg_offset = 3; + reg->offset = 3 * REG_SIZE; vs_prog_data->uses_instanceid = true; break; case SYSTEM_VALUE_DRAW_ID: - if (nir->info.system_values_read & + if (nir->info->system_values_read & (BITFIELD64_BIT(SYSTEM_VALUE_BASE_VERTEX) | BITFIELD64_BIT(SYSTEM_VALUE_BASE_INSTANCE) | BITFIELD64_BIT(SYSTEM_VALUE_VERTEX_ID_ZERO_BASE) | BITFIELD64_BIT(SYSTEM_VALUE_INSTANCE_ID))) reg->nr += 4; - reg->reg_offset = 0; + reg->offset = 0; vs_prog_data->uses_drawid = true; break; default: @@ -97,7 +96,7 @@ /* We only care about one or two regs of response, but the sampler always * writes 4/8. */ - inst->regs_written = 4 * dispatch_width / 8; + inst->size_written = 4 * dest.component_size(inst->exec_size); return dest; } @@ -160,7 +159,7 @@ /* Tell the SF we don't have any inputs. Gen4-5 require at least one * varying to avoid GPU hangs, so set that. */ - brw_wm_prog_data *wm_prog_data = (brw_wm_prog_data *) this->prog_data; + struct brw_wm_prog_data *wm_prog_data = brw_wm_prog_data(this->prog_data); wm_prog_data->num_varying_inputs = devinfo->gen < 6 ? 1 : 0; memset(wm_prog_data->urb_setup, -1, sizeof(wm_prog_data->urb_setup[0]) * VARYING_SLOT_MAX); @@ -184,7 +183,7 @@ fs_visitor::interp_reg(int location, int channel) { assert(stage == MESA_SHADER_FRAGMENT); - brw_wm_prog_data *prog_data = (brw_wm_prog_data*) this->prog_data; + struct brw_wm_prog_data *prog_data = brw_wm_prog_data(this->prog_data); int regnr = prog_data->urb_setup[location] * 2 + channel / 2; int stride = (channel & 1) * 4; @@ -213,9 +212,9 @@ abld = bld.annotate("compute pixel deltas from v0"); - this->delta_xy[BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC] = + this->delta_xy[BRW_BARYCENTRIC_PERSPECTIVE_PIXEL] = vgrf(glsl_type::vec2_type); - const fs_reg &delta_xy = this->delta_xy[BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC]; + const fs_reg &delta_xy = this->delta_xy[BRW_BARYCENTRIC_PERSPECTIVE_PIXEL]; const fs_reg xstart(negate(brw_vec1_grf(1, 0))); const fs_reg ystart(negate(brw_vec1_grf(1, 1))); @@ -308,9 +307,41 @@ this->wpos_w = vgrf(glsl_type::float_type); abld.emit(SHADER_OPCODE_RCP, this->wpos_w, this->pixel_w); - for (int i = 0; i < BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT; ++i) { + struct brw_wm_prog_data *wm_prog_data = brw_wm_prog_data(prog_data); + uint32_t centroid_modes = wm_prog_data->barycentric_interp_modes & + (1 << BRW_BARYCENTRIC_PERSPECTIVE_CENTROID | + 1 << BRW_BARYCENTRIC_NONPERSPECTIVE_CENTROID); + + for (int i = 0; i < BRW_BARYCENTRIC_MODE_COUNT; ++i) { uint8_t reg = payload.barycentric_coord_reg[i]; this->delta_xy[i] = fs_reg(brw_vec16_grf(reg, 0)); + + if (devinfo->needs_unlit_centroid_workaround && + (centroid_modes & (1 << i))) { + /* Get the pixel/sample mask into f0 so that we know which + * pixels are lit. Then, for each channel that is unlit, + * replace the centroid data with non-centroid data. + */ + bld.emit(FS_OPCODE_MOV_DISPATCH_TO_FLAGS); + + uint8_t pixel_reg = payload.barycentric_coord_reg[i - 1]; + + set_predicate_inv(BRW_PREDICATE_NORMAL, true, + bld.half(0).MOV(brw_vec8_grf(reg, 0), + brw_vec8_grf(pixel_reg, 0))); + set_predicate_inv(BRW_PREDICATE_NORMAL, true, + bld.half(0).MOV(brw_vec8_grf(reg + 1, 0), + brw_vec8_grf(pixel_reg + 1, 0))); + if (dispatch_width == 16) { + set_predicate_inv(BRW_PREDICATE_NORMAL, true, + bld.half(1).MOV(brw_vec8_grf(reg + 2, 0), + brw_vec8_grf(pixel_reg + 2, 0))); + set_predicate_inv(BRW_PREDICATE_NORMAL, true, + bld.half(1).MOV(brw_vec8_grf(reg + 3, 0), + brw_vec8_grf(pixel_reg + 3, 0))); + } + assert(dispatch_width != 32); /* not implemented yet */ + } } } @@ -374,7 +405,7 @@ fs_reg src0_alpha, unsigned components) { assert(stage == MESA_SHADER_FRAGMENT); - brw_wm_prog_data *prog_data = (brw_wm_prog_data*) this->prog_data; + struct brw_wm_prog_data *prog_data = brw_wm_prog_data(this->prog_data); /* Hand over gl_FragDepth or the payload depth. */ const fs_reg dst_depth = (payload.dest_depth_reg ? @@ -383,13 +414,13 @@ fs_reg src_depth, src_stencil; if (source_depth_to_render_target) { - if (nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) + if (nir->info->outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) src_depth = frag_depth; else src_depth = fs_reg(brw_vec8_grf(payload.source_depth_reg, 0)); } - if (nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL)) + if (nir->info->outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL)) src_stencil = frag_stencil; const fs_reg sources[] = { @@ -413,7 +444,7 @@ fs_visitor::emit_fb_writes() { assert(stage == MESA_SHADER_FRAGMENT); - brw_wm_prog_data *prog_data = (brw_wm_prog_data*) this->prog_data; + struct brw_wm_prog_data *prog_data = brw_wm_prog_data(this->prog_data); brw_wm_prog_key *key = (brw_wm_prog_key*) this->key; fs_inst *inst = NULL; @@ -428,7 +459,7 @@ limit_dispatch_width(8, "Depth writes unsupported in SIMD16+ mode.\n"); } - if (nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL)) { + if (nir->info->outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL)) { /* From the 'Render Target Write message' section of the docs: * "Output Stencil is not supported with SIMD16 Render Target Write * Messages." @@ -437,34 +468,26 @@ "in SIMD16+ mode.\n"); } - if (do_dual_src) { - const fs_builder abld = bld.annotate("FB dual-source write"); + for (int target = 0; target < key->nr_color_regions; target++) { + /* Skip over outputs that weren't written. */ + if (this->outputs[target].file == BAD_FILE) + continue; - inst = emit_single_fb_write(abld, this->outputs[0], - this->dual_src_output, reg_undef, 4); - inst->target = 0; + const fs_builder abld = bld.annotate( + ralloc_asprintf(this->mem_ctx, "FB write target %d", target)); - prog_data->dual_src_blend = true; - } else { - for (int target = 0; target < key->nr_color_regions; target++) { - /* Skip over outputs that weren't written. */ - if (this->outputs[target].file == BAD_FILE) - continue; - - const fs_builder abld = bld.annotate( - ralloc_asprintf(this->mem_ctx, "FB write target %d", target)); - - fs_reg src0_alpha; - if (devinfo->gen >= 6 && key->replicate_alpha && target != 0) - src0_alpha = offset(outputs[0], bld, 3); - - inst = emit_single_fb_write(abld, this->outputs[target], reg_undef, - src0_alpha, - this->output_components[target]); - inst->target = target; - } + fs_reg src0_alpha; + if (devinfo->gen >= 6 && key->replicate_alpha && target != 0) + src0_alpha = offset(outputs[0], bld, 3); + + inst = emit_single_fb_write(abld, this->outputs[target], + this->dual_src_output, src0_alpha, 4); + inst->target = target; } + prog_data->dual_src_blend = (this->dual_src_output.file != BAD_FILE); + assert(!prog_data->dual_src_blend || key->nr_color_regions == 1); + if (inst == NULL) { /* Even if there's no color buffers enabled, we still need to send * alpha out the pipeline to our null renderbuffer to support @@ -509,8 +532,7 @@ */ void fs_visitor::compute_clip_distance(gl_clip_plane *clip_planes) { - struct brw_vue_prog_data *vue_prog_data = - (struct brw_vue_prog_data *) prog_data; + struct brw_vue_prog_data *vue_prog_data = brw_vue_prog_data(prog_data); const struct brw_vs_prog_key *key = (const struct brw_vs_prog_key *) this->key; @@ -545,14 +567,12 @@ const fs_builder abld = bld.annotate("user clip distances"); this->outputs[VARYING_SLOT_CLIP_DIST0] = vgrf(glsl_type::vec4_type); - this->output_components[VARYING_SLOT_CLIP_DIST0] = 4; this->outputs[VARYING_SLOT_CLIP_DIST1] = vgrf(glsl_type::vec4_type); - this->output_components[VARYING_SLOT_CLIP_DIST1] = 4; for (int i = 0; i < key->nr_userclip_plane_consts; i++) { fs_reg u = userplane[i]; - fs_reg output = outputs[VARYING_SLOT_CLIP_DIST0 + i / 4]; - output.reg_offset = i & 3; + const fs_reg output = offset(outputs[VARYING_SLOT_CLIP_DIST0 + i / 4], + bld, i & 3); abld.MUL(output, outputs[clip_vertex], u); for (int j = 1; j < 4; j++) { @@ -568,7 +588,7 @@ int slot, urb_offset, length; int starting_urb_offset = 0; const struct brw_vue_prog_data *vue_prog_data = - (const struct brw_vue_prog_data *) this->prog_data; + brw_vue_prog_data(this->prog_data); const struct brw_vs_prog_key *vs_key = (const struct brw_vs_prog_key *) this->key; const GLbitfield64 psiz_mask = @@ -617,7 +637,7 @@ if (stage == MESA_SHADER_GEOMETRY) { const struct brw_gs_prog_data *gs_prog_data = - (const struct brw_gs_prog_data *) this->prog_data; + brw_gs_prog_data(this->prog_data); /* We need to increment the Global Offset to skip over the control data * header and the extra "Vertex Count" field (1 HWord) at the beginning @@ -651,6 +671,17 @@ length = 0; urb_offset = starting_urb_offset; flush = false; + + /* SSO shaders can have VUE slots allocated which are never actually + * written to, so ignore them when looking for the last (written) slot. + */ + int last_slot = vue_map->num_slots - 1; + while (last_slot > 0 && + (vue_map->slot_to_varying[last_slot] == BRW_VARYING_SLOT_PAD || + outputs[vue_map->slot_to_varying[last_slot]].file == BAD_FILE)) { + last_slot--; + } + for (slot = 0; slot < vue_map->num_slots; slot++) { int varying = vue_map->slot_to_varying[slot]; switch (varying) { @@ -724,10 +755,8 @@ sources[length++] = reg; } } else { - for (unsigned i = 0; i < output_components[varying]; i++) + for (unsigned i = 0; i < 4; i++) sources[length++] = offset(this->outputs[varying], bld, i); - for (unsigned i = output_components[varying]; i < 4; i++) - sources[length++] = brw_imm_d(0); } break; } @@ -738,8 +767,7 @@ * the last slot or if we need to flush (see BAD_FILE varying case * above), emit a URB write send now to flush out the data. */ - int last = slot == vue_map->num_slots - 1; - if (length == 8 || last) + if (length == 8 || slot == last_slot) flush = true; if (flush) { fs_reg *payload_sources = @@ -758,7 +786,7 @@ header_size); fs_inst *inst = abld.emit(opcode, reg_undef, payload); - inst->eot = last && stage != MESA_SHADER_GEOMETRY; + inst->eot = slot == last_slot && stage != MESA_SHADER_GEOMETRY; inst->mlen = length + header_size; inst->offset = urb_offset; urb_offset = starting_urb_offset + slot + 1; @@ -881,8 +909,7 @@ } if (stage == MESA_SHADER_COMPUTE) { - const brw_cs_prog_data *cs_prog_data = - (const brw_cs_prog_data *) prog_data; + const struct brw_cs_prog_data *cs_prog_data = brw_cs_prog_data(prog_data); unsigned size = cs_prog_data->local_size[0] * cs_prog_data->local_size[1] * cs_prog_data->local_size[2]; @@ -901,7 +928,6 @@ this->nir_ssa_values = NULL; memset(&this->payload, 0, sizeof(this->payload)); - memset(this->output_components, 0, sizeof(this->output_components)); this->source_depth_to_render_target = false; this->runtime_check_aads_emit = false; this->first_non_payload_grf = 0; @@ -920,7 +946,6 @@ this->promoted_constants = 0, this->spilled_any_registers = false; - this->do_dual_src = false; } fs_visitor::~fs_visitor() diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_gs.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_gs.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_gs.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_gs.c 2017-06-01 10:37:10.000000000 +0000 @@ -37,31 +37,17 @@ #include "compiler/glsl/ir_uniform.h" static void -brw_gs_debug_recompile(struct brw_context *brw, - struct gl_shader_program *shader_prog, +brw_gs_debug_recompile(struct brw_context *brw, struct gl_program *prog, const struct brw_gs_prog_key *key) { - struct brw_cache_item *c = NULL; - const struct brw_gs_prog_key *old_key = NULL; - bool found = false; - - perf_debug("Recompiling geometry shader for program %d\n", - shader_prog->Name); + perf_debug("Recompiling geometry shader for program %d\n", prog->Id); - for (unsigned int i = 0; i < brw->cache.size; i++) { - for (c = brw->cache.items[i]; c; c = c->next) { - if (c->cache_id == BRW_CACHE_GS_PROG) { - old_key = c->key; - - if (old_key->program_string_id == key->program_string_id) - break; - } - } - if (c) - break; - } + bool found = false; + const struct brw_gs_prog_key *old_key = + brw_find_previous_compile(&brw->cache, BRW_CACHE_GS_PROG, + key->program_string_id); - if (!c) { + if (!old_key) { perf_debug(" Didn't find previous compile in the shader cache for " "debug\n"); return; @@ -75,8 +61,7 @@ } static void -assign_gs_binding_table_offsets(const struct brw_device_info *devinfo, - const struct gl_shader_program *shader_prog, +assign_gs_binding_table_offsets(const struct gen_device_info *devinfo, const struct gl_program *prog, struct brw_gs_prog_data *prog_data) { @@ -85,20 +70,17 @@ */ uint32_t reserved = devinfo->gen == 6 ? BRW_MAX_SOL_BINDINGS : 0; - brw_assign_common_binding_table_offsets(MESA_SHADER_GEOMETRY, devinfo, - shader_prog, prog, - &prog_data->base.base, - reserved); + brw_assign_common_binding_table_offsets(devinfo, prog, + &prog_data->base.base, reserved); } -bool +static bool brw_codegen_gs_prog(struct brw_context *brw, - struct gl_shader_program *prog, - struct brw_geometry_program *gp, + struct brw_program *gp, struct brw_gs_prog_key *key) { - struct brw_compiler *compiler = brw->intelScreen->compiler; - struct gl_shader *shader = prog->_LinkedShaders[MESA_SHADER_GEOMETRY]; + struct brw_compiler *compiler = brw->screen->compiler; + const struct gen_device_info *devinfo = &brw->screen->devinfo; struct brw_stage_state *stage_state = &brw->gs.base; struct brw_gs_prog_data prog_data; bool start_busy = false; @@ -106,8 +88,7 @@ memset(&prog_data, 0, sizeof(prog_data)); - assign_gs_binding_table_offsets(brw->intelScreen->devinfo, prog, - &gp->program.Base, &prog_data); + assign_gs_binding_table_offsets(devinfo, &gp->program, &prog_data); /* Allocate the references to the uniforms that will end up in the * prog_data associated with the compiled program, and which will be freed @@ -117,39 +98,31 @@ * padding around uniform values below vec4 size, so the worst case is that * every uniform is a float which gets padded to the size of a vec4. */ - struct gl_shader *gs = prog->_LinkedShaders[MESA_SHADER_GEOMETRY]; - struct brw_shader *bgs = (struct brw_shader *) gs; - int param_count = gp->program.Base.nir->num_uniforms / 4; + int param_count = gp->program.nir->num_uniforms / 4; prog_data.base.base.param = rzalloc_array(NULL, const gl_constant_value *, param_count); prog_data.base.base.pull_param = rzalloc_array(NULL, const gl_constant_value *, param_count); prog_data.base.base.image_param = - rzalloc_array(NULL, struct brw_image_param, gs->NumImages); + rzalloc_array(NULL, struct brw_image_param, + gp->program.info.num_images); prog_data.base.base.nr_params = param_count; - prog_data.base.base.nr_image_params = gs->NumImages; + prog_data.base.base.nr_image_params = gp->program.info.num_images; - brw_nir_setup_glsl_uniforms(gp->program.Base.nir, prog, &gp->program.Base, + brw_nir_setup_glsl_uniforms(gp->program.nir, &gp->program, &prog_data.base.base, compiler->scalar_stage[MESA_SHADER_GEOMETRY]); - GLbitfield64 outputs_written = gp->program.Base.OutputsWritten; + uint64_t outputs_written = gp->program.info.outputs_written; - prog_data.base.cull_distance_mask = - ((1 << gp->program.Base.CullDistanceArraySize) - 1) << - gp->program.Base.ClipDistanceArraySize; - - brw_compute_vue_map(brw->intelScreen->devinfo, + brw_compute_vue_map(devinfo, &prog_data.base.vue_map, outputs_written, - prog->SeparateShader); - - if (unlikely(INTEL_DEBUG & DEBUG_GS)) - brw_dump_ir("geometry", prog, gs, NULL); + gp->program.info.separate_shader); int st_index = -1; if (INTEL_DEBUG & DEBUG_SHADER_TIME) - st_index = brw_get_shader_time_index(brw, prog, NULL, ST_GS); + st_index = brw_get_shader_time_index(brw, &gp->program, ST_GS, true); if (unlikely(brw->perf_debug)) { start_busy = brw->batch.last_bo && drm_intel_bo_busy(brw->batch.last_bo); @@ -160,35 +133,38 @@ unsigned program_size; char *error_str; const unsigned *program = - brw_compile_gs(brw->intelScreen->compiler, brw, mem_ctx, key, - &prog_data, shader->Program->nir, prog, + brw_compile_gs(brw->screen->compiler, brw, mem_ctx, key, + &prog_data, gp->program.nir, &gp->program, st_index, &program_size, &error_str); if (program == NULL) { + ralloc_strcat(&gp->program.sh.data->InfoLog, error_str); + _mesa_problem(NULL, "Failed to compile geometry shader: %s\n", error_str); + ralloc_free(mem_ctx); return false; } if (unlikely(brw->perf_debug)) { - if (bgs->compiled_once) { - brw_gs_debug_recompile(brw, prog, key); + if (gp->compiled_once) { + brw_gs_debug_recompile(brw, &gp->program, key); } if (start_busy && !drm_intel_bo_busy(brw->batch.last_bo)) { perf_debug("GS compile took %.03f ms and stalled the GPU\n", (get_time() - start_time) * 1000); } - bgs->compiled_once = true; + gp->compiled_once = true; } /* Scratch space is used for register spilling */ brw_alloc_stage_scratch(brw, stage_state, prog_data.base.base.total_scratch, - brw->max_gs_threads); + devinfo->max_gs_threads); brw_upload_cache(&brw->cache, BRW_CACHE_GS_PROG, key, sizeof(*key), program, program_size, &prog_data, sizeof(prog_data), - &stage_state->prog_offset, &brw->gs.prog_data); + &stage_state->prog_offset, &brw->gs.base.prog_data); ralloc_free(mem_ctx); return true; @@ -203,35 +179,28 @@ BRW_NEW_TRANSFORM_FEEDBACK); } -static void +void brw_gs_populate_key(struct brw_context *brw, struct brw_gs_prog_key *key) { struct gl_context *ctx = &brw->ctx; - struct brw_stage_state *stage_state = &brw->gs.base; - struct brw_geometry_program *gp = - (struct brw_geometry_program *) brw->geometry_program; - struct gl_program *prog = &gp->program.Base; + struct brw_program *gp = (struct brw_program *) brw->geometry_program; memset(key, 0, sizeof(*key)); key->program_string_id = gp->id; /* _NEW_TEXTURE */ - brw_populate_sampler_prog_key_data(ctx, prog, stage_state->sampler_count, - &key->tex); + brw_populate_sampler_prog_key_data(ctx, &gp->program, &key->tex); } void brw_upload_gs_prog(struct brw_context *brw) { - struct gl_context *ctx = &brw->ctx; - struct gl_shader_program **current = ctx->_Shader->CurrentProgram; struct brw_stage_state *stage_state = &brw->gs.base; struct brw_gs_prog_key key; /* BRW_NEW_GEOMETRY_PROGRAM */ - struct brw_geometry_program *gp = - (struct brw_geometry_program *) brw->geometry_program; + struct brw_program *gp = (struct brw_program *) brw->geometry_program; if (!brw_gs_state_dirty(brw)) return; @@ -247,7 +216,6 @@ /* Other state atoms had better not try to access prog_data, since * there's no GS program. */ - brw->gs.prog_data = NULL; brw->gs.base.prog_data = NULL; return; @@ -257,38 +225,34 @@ if (!brw_search_cache(&brw->cache, BRW_CACHE_GS_PROG, &key, sizeof(key), - &stage_state->prog_offset, &brw->gs.prog_data)) { - bool success = brw_codegen_gs_prog(brw, current[MESA_SHADER_GEOMETRY], - gp, &key); + &stage_state->prog_offset, + &brw->gs.base.prog_data)) { + bool success = brw_codegen_gs_prog(brw, gp, &key); assert(success); (void)success; } - brw->gs.base.prog_data = &brw->gs.prog_data->base.base; } bool -brw_gs_precompile(struct gl_context *ctx, - struct gl_shader_program *shader_prog, - struct gl_program *prog) +brw_gs_precompile(struct gl_context *ctx, struct gl_program *prog) { struct brw_context *brw = brw_context(ctx); struct brw_gs_prog_key key; uint32_t old_prog_offset = brw->gs.base.prog_offset; - struct brw_gs_prog_data *old_prog_data = brw->gs.prog_data; + struct brw_stage_prog_data *old_prog_data = brw->gs.base.prog_data; bool success; - struct gl_geometry_program *gp = (struct gl_geometry_program *) prog; - struct brw_geometry_program *bgp = brw_geometry_program(gp); + struct brw_program *bgp = brw_program(prog); memset(&key, 0, sizeof(key)); brw_setup_tex_for_precompile(brw, &key.tex, prog); key.program_string_id = bgp->id; - success = brw_codegen_gs_prog(brw, shader_prog, bgp, &key); + success = brw_codegen_gs_prog(brw, bgp, &key); brw->gs.base.prog_offset = old_prog_offset; - brw->gs.prog_data = old_prog_data; + brw->gs.base.prog_data = old_prog_data; return success; } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_gs.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_gs.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_gs.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_gs.h 2017-06-01 10:37:10.000000000 +0000 @@ -37,10 +37,8 @@ void brw_upload_gs_prog(struct brw_context *brw); -bool -brw_codegen_gs_prog(struct brw_context *brw, - struct gl_shader_program *prog, - struct brw_geometry_program *gp, +void +brw_gs_populate_key(struct brw_context *brw, struct brw_gs_prog_key *key); #ifdef __cplusplus diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_gs_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_gs_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_gs_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_gs_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -83,7 +83,8 @@ if (unlikely(INTEL_DEBUG & DEBUG_STATS)) gs->thread4.stats_enable = 1; - gs->gs6.max_vp_index = brw->ctx.Const.MaxViewports - 1; + /* BRW_NEW_VIEWPORT_COUNT */ + gs->gs6.max_vp_index = brw->clip.viewport_count - 1; brw->ctx.NewDriverState |= BRW_NEW_GEN4_UNIT_STATE; } @@ -96,7 +97,8 @@ BRW_NEW_CURBE_OFFSETS | BRW_NEW_FF_GS_PROG_DATA | BRW_NEW_PROGRAM_CACHE | - BRW_NEW_URB_FENCE, + BRW_NEW_URB_FENCE | + BRW_NEW_VIEWPORT_COUNT, }, .emit = brw_upload_gs_unit, }; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_gs_surface_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_gs_surface_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_gs_surface_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_gs_surface_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -23,6 +23,7 @@ #include "main/mtypes.h" #include "program/prog_parameter.h" +#include "main/shaderapi.h" #include "brw_context.h" #include "brw_state.h" @@ -40,18 +41,18 @@ struct brw_stage_state *stage_state = &brw->gs.base; /* BRW_NEW_GEOMETRY_PROGRAM */ - struct brw_geometry_program *gp = - (struct brw_geometry_program *) brw->geometry_program; + struct brw_program *gp = (struct brw_program *) brw->geometry_program; if (!gp) return; /* BRW_NEW_GS_PROG_DATA */ - const struct brw_vue_prog_data *prog_data = &brw->gs.prog_data->base; + const struct brw_stage_prog_data *prog_data = brw->gs.base.prog_data; + _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_GEOMETRY); /* _NEW_PROGRAM_CONSTANTS */ - brw_upload_pull_constants(brw, BRW_NEW_GS_CONSTBUF, &gp->program.Base, - stage_state, &prog_data->base); + brw_upload_pull_constants(brw, BRW_NEW_GS_CONSTBUF, &gp->program, + stage_state, prog_data); } const struct brw_tracked_state brw_gs_pull_constants = { @@ -74,14 +75,14 @@ struct gl_shader_program *prog = ctx->_Shader->CurrentProgram[MESA_SHADER_GEOMETRY]; - if (!prog) + if (!prog || !prog->_LinkedShaders[MESA_SHADER_GEOMETRY]) return; /* BRW_NEW_GS_PROG_DATA */ - struct brw_vue_prog_data *prog_data = &brw->gs.prog_data->base; + struct brw_stage_prog_data *prog_data = brw->gs.base.prog_data; - brw_upload_ubo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_GEOMETRY], - &brw->gs.base, &prog_data->base); + brw_upload_ubo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_GEOMETRY]->Program, + &brw->gs.base, prog_data); } const struct brw_tracked_state brw_gs_ubo_surfaces = { @@ -98,15 +99,12 @@ static void brw_upload_gs_abo_surfaces(struct brw_context *brw) { - struct gl_context *ctx = &brw->ctx; /* _NEW_PROGRAM */ - struct gl_shader_program *prog = - ctx->_Shader->CurrentProgram[MESA_SHADER_GEOMETRY]; + const struct gl_program *gp = brw->geometry_program; - if (prog) { + if (gp) { /* BRW_NEW_GS_PROG_DATA */ - brw_upload_abo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_GEOMETRY], - &brw->gs.base, &brw->gs.prog_data->base.base); + brw_upload_abo_surfaces(brw, gp, &brw->gs.base, brw->gs.base.prog_data); } } @@ -124,15 +122,13 @@ static void brw_upload_gs_image_surfaces(struct brw_context *brw) { - struct gl_context *ctx = &brw->ctx; /* BRW_NEW_GEOMETRY_PROGRAM */ - struct gl_shader_program *prog = - ctx->_Shader->CurrentProgram[MESA_SHADER_GEOMETRY]; + const struct gl_program *gp = brw->geometry_program; - if (prog) { + if (gp) { /* BRW_NEW_GS_PROG_DATA, BRW_NEW_IMAGE_UNITS, _NEW_TEXTURE */ - brw_upload_image_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_GEOMETRY], - &brw->gs.base, &brw->gs.prog_data->base.base); + brw_upload_image_surfaces(brw, gp, &brw->gs.base, + brw->gs.base.prog_data); } } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_inst.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_inst.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_inst.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_inst.h 2017-06-01 10:37:10.000000000 +0000 @@ -52,7 +52,7 @@ #define FC(name, high, low, assertions) \ static inline void \ -brw_inst_set_##name(const struct brw_device_info *devinfo, \ +brw_inst_set_##name(const struct gen_device_info *devinfo, \ brw_inst *inst, uint64_t v) \ { \ assert(assertions); \ @@ -60,7 +60,7 @@ brw_inst_set_bits(inst, high, low, v); \ } \ static inline uint64_t \ -brw_inst_##name(const struct brw_device_info *devinfo, \ +brw_inst_##name(const struct gen_device_info *devinfo, \ const brw_inst *inst) \ { \ assert(assertions); \ @@ -94,14 +94,14 @@ */ #define FF(name, hi4, lo4, hi45, lo45, hi5, lo5, hi6, lo6, hi7, lo7, hi8, lo8)\ static inline void \ -brw_inst_set_##name(const struct brw_device_info *devinfo, \ +brw_inst_set_##name(const struct gen_device_info *devinfo, \ brw_inst *inst, uint64_t value) \ { \ BOUNDS(hi4, lo4, hi45, lo45, hi5, lo5, hi6, lo6, hi7, lo7, hi8, lo8) \ brw_inst_set_bits(inst, high, low, value); \ } \ static inline uint64_t \ -brw_inst_##name(const struct brw_device_info *devinfo, const brw_inst *inst) \ +brw_inst_##name(const struct gen_device_info *devinfo, const brw_inst *inst) \ { \ BOUNDS(hi4, lo4, hi45, lo45, hi5, lo5, hi6, lo6, hi7, lo7, hi8, lo8) \ return brw_inst_bits(inst, high, low); \ @@ -248,7 +248,7 @@ * @{ */ static inline void -brw_inst_set_uip(const struct brw_device_info *devinfo, +brw_inst_set_uip(const struct gen_device_info *devinfo, brw_inst *inst, int32_t value) { assert(devinfo->gen >= 6); @@ -263,7 +263,7 @@ } static inline int32_t -brw_inst_uip(const struct brw_device_info *devinfo, const brw_inst *inst) +brw_inst_uip(const struct gen_device_info *devinfo, const brw_inst *inst) { assert(devinfo->gen >= 6); @@ -275,7 +275,7 @@ } static inline void -brw_inst_set_jip(const struct brw_device_info *devinfo, +brw_inst_set_jip(const struct gen_device_info *devinfo, brw_inst *inst, int32_t value) { assert(devinfo->gen >= 6); @@ -290,7 +290,7 @@ } static inline int32_t -brw_inst_jip(const struct brw_device_info *devinfo, const brw_inst *inst) +brw_inst_jip(const struct gen_device_info *devinfo, const brw_inst *inst) { assert(devinfo->gen >= 6); @@ -304,14 +304,14 @@ /** Like FC, but using int16_t to handle negative jump targets. */ #define FJ(name, high, low, assertions) \ static inline void \ -brw_inst_set_##name(const struct brw_device_info *devinfo, brw_inst *inst, int16_t v) \ +brw_inst_set_##name(const struct gen_device_info *devinfo, brw_inst *inst, int16_t v) \ { \ assert(assertions); \ (void) devinfo; \ brw_inst_set_bits(inst, high, low, (uint16_t) v); \ } \ static inline int16_t \ -brw_inst_##name(const struct brw_device_info *devinfo, const brw_inst *inst) \ +brw_inst_##name(const struct gen_device_info *devinfo, const brw_inst *inst) \ { \ assert(assertions); \ (void) devinfo; \ @@ -554,21 +554,21 @@ * @{ */ static inline int -brw_inst_imm_d(const struct brw_device_info *devinfo, const brw_inst *insn) +brw_inst_imm_d(const struct gen_device_info *devinfo, const brw_inst *insn) { (void) devinfo; return brw_inst_bits(insn, 127, 96); } static inline unsigned -brw_inst_imm_ud(const struct brw_device_info *devinfo, const brw_inst *insn) +brw_inst_imm_ud(const struct gen_device_info *devinfo, const brw_inst *insn) { (void) devinfo; return brw_inst_bits(insn, 127, 96); } static inline float -brw_inst_imm_f(const struct brw_device_info *devinfo, const brw_inst *insn) +brw_inst_imm_f(const struct gen_device_info *devinfo, const brw_inst *insn) { fi_type ft; (void) devinfo; @@ -577,7 +577,7 @@ } static inline double -brw_inst_imm_df(const struct brw_device_info *devinfo, const brw_inst *insn) +brw_inst_imm_df(const struct gen_device_info *devinfo, const brw_inst *insn) { union { double d; @@ -589,7 +589,7 @@ } static inline void -brw_inst_set_imm_d(const struct brw_device_info *devinfo, +brw_inst_set_imm_d(const struct gen_device_info *devinfo, brw_inst *insn, int value) { (void) devinfo; @@ -597,7 +597,7 @@ } static inline void -brw_inst_set_imm_ud(const struct brw_device_info *devinfo, +brw_inst_set_imm_ud(const struct gen_device_info *devinfo, brw_inst *insn, unsigned value) { (void) devinfo; @@ -605,7 +605,7 @@ } static inline void -brw_inst_set_imm_f(const struct brw_device_info *devinfo, +brw_inst_set_imm_f(const struct gen_device_info *devinfo, brw_inst *insn, float value) { fi_type ft; @@ -615,7 +615,7 @@ } static inline void -brw_inst_set_imm_df(const struct brw_device_info *devinfo, +brw_inst_set_imm_df(const struct gen_device_info *devinfo, brw_inst *insn, double value) { union { @@ -632,7 +632,7 @@ /* The AddrImm fields are split into two discontiguous sections on Gen8+ */ #define BRW_IA1_ADDR_IMM(reg, g4_high, g4_low, g8_nine, g8_high, g8_low) \ static inline void \ -brw_inst_set_##reg##_ia1_addr_imm(const struct brw_device_info *devinfo, \ +brw_inst_set_##reg##_ia1_addr_imm(const struct gen_device_info *devinfo, \ brw_inst *inst, \ unsigned value) \ { \ @@ -645,7 +645,7 @@ } \ } \ static inline unsigned \ -brw_inst_##reg##_ia1_addr_imm(const struct brw_device_info *devinfo, \ +brw_inst_##reg##_ia1_addr_imm(const struct gen_device_info *devinfo, \ const brw_inst *inst) \ { \ if (devinfo->gen >= 8) { \ @@ -664,7 +664,7 @@ #define BRW_IA16_ADDR_IMM(reg, g4_high, g4_low, g8_nine, g8_high, g8_low) \ static inline void \ -brw_inst_set_##reg##_ia16_addr_imm(const struct brw_device_info *devinfo, \ +brw_inst_set_##reg##_ia16_addr_imm(const struct gen_device_info *devinfo, \ brw_inst *inst, unsigned value) \ { \ assert((value & ~0x3ff) == 0); \ @@ -676,7 +676,7 @@ } \ } \ static inline unsigned \ -brw_inst_##reg##_ia16_addr_imm(const struct brw_device_info *devinfo, \ +brw_inst_##reg##_ia16_addr_imm(const struct gen_device_info *devinfo, \ const brw_inst *inst) \ { \ if (devinfo->gen >= 8) { \ @@ -782,7 +782,7 @@ #define FC(name, high, low, assertions) \ static inline void \ -brw_compact_inst_set_##name(const struct brw_device_info *devinfo, \ +brw_compact_inst_set_##name(const struct gen_device_info *devinfo, \ brw_compact_inst *inst, unsigned v) \ { \ assert(assertions); \ @@ -790,7 +790,7 @@ brw_compact_inst_set_bits(inst, high, low, v); \ } \ static inline unsigned \ -brw_compact_inst_##name(const struct brw_device_info *devinfo, \ +brw_compact_inst_##name(const struct gen_device_info *devinfo, \ const brw_compact_inst *inst) \ { \ assert(assertions); \ diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_interpolation_map.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_interpolation_map.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_interpolation_map.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_interpolation_map.c 2017-06-01 10:37:10.000000000 +0000 @@ -21,77 +21,78 @@ * IN THE SOFTWARE. */ -#include "brw_state.h" +#include "brw_compiler.h" +#include "brw_context.h" +#include "compiler/nir/nir.h" static char const *get_qual_name(int mode) { switch (mode) { - case INTERP_QUALIFIER_NONE: return "none"; - case INTERP_QUALIFIER_FLAT: return "flat"; - case INTERP_QUALIFIER_SMOOTH: return "smooth"; - case INTERP_QUALIFIER_NOPERSPECTIVE: return "nopersp"; + case INTERP_MODE_NONE: return "none"; + case INTERP_MODE_FLAT: return "flat"; + case INTERP_MODE_SMOOTH: return "smooth"; + case INTERP_MODE_NOPERSPECTIVE: return "nopersp"; default: return "???"; } } +static void +gen4_frag_prog_set_interp_modes(struct brw_wm_prog_data *prog_data, + struct brw_vue_map *vue_map, + unsigned location, unsigned slot_count, + enum glsl_interp_mode interp) +{ + for (unsigned k = 0; k < slot_count; k++) { + unsigned slot = vue_map->varying_to_slot[location + k]; + if (slot != -1 && prog_data->interp_mode[slot] == INTERP_MODE_NONE) { + prog_data->interp_mode[slot] = interp; + + if (prog_data->interp_mode[slot] == INTERP_MODE_FLAT) { + prog_data->contains_flat_varying = true; + } else if (prog_data->interp_mode[slot] == INTERP_MODE_NOPERSPECTIVE) { + prog_data->contains_noperspective_varying = true; + } + } + } +} /* Set up interpolation modes for every element in the VUE */ void -brw_setup_vue_interpolation(struct brw_context *brw) +brw_setup_vue_interpolation(struct brw_vue_map *vue_map, nir_shader *nir, + struct brw_wm_prog_data *prog_data, + const struct gen_device_info *devinfo) { - const struct gl_fragment_program *fprog = brw->fragment_program; - struct brw_vue_map *vue_map = &brw->vue_map_geom_out; - - if (!brw_state_dirty(brw, - _NEW_LIGHT, - BRW_NEW_BLORP | - BRW_NEW_FRAGMENT_PROGRAM | - BRW_NEW_VUE_MAP_GEOM_OUT)) - return; - - memset(&brw->interpolation_mode, INTERP_QUALIFIER_NONE, sizeof(brw->interpolation_mode)); - - brw->ctx.NewDriverState |= BRW_NEW_INTERPOLATION_MAP; + /* Initialise interp_mode. INTERP_MODE_NONE == 0 */ + memset(prog_data->interp_mode, 0, sizeof(prog_data->interp_mode)); - if (!fprog) + if (!vue_map) return; - for (int i = 0; i < vue_map->num_slots; i++) { - int varying = vue_map->slot_to_varying[i]; - if (varying == -1) - continue; - - /* HPOS always wants noperspective. setting it up here allows - * us to not need special handling in the SF program. */ - if (varying == VARYING_SLOT_POS) { - brw->interpolation_mode.mode[i] = INTERP_QUALIFIER_NOPERSPECTIVE; - continue; - } + /* HPOS always wants noperspective. setting it up here allows + * us to not need special handling in the SF program. + */ + unsigned pos_slot = vue_map->varying_to_slot[VARYING_SLOT_POS]; + if (pos_slot != -1) {; + prog_data->interp_mode[pos_slot] = INTERP_MODE_NOPERSPECTIVE; + prog_data->contains_noperspective_varying = true; + } - int frag_attrib = varying; - if (varying == VARYING_SLOT_BFC0 || varying == VARYING_SLOT_BFC1) - frag_attrib = varying - VARYING_SLOT_BFC0 + VARYING_SLOT_COL0; - - if (!(fprog->Base.InputsRead & BITFIELD64_BIT(frag_attrib))) - continue; - - enum glsl_interp_qualifier mode = fprog->InterpQualifier[frag_attrib]; - - /* If the mode is not specified, the default varies: Color values - * follow GL_SHADE_MODEL; everything else is smooth. - */ - if (mode == INTERP_QUALIFIER_NONE) { - if (frag_attrib == VARYING_SLOT_COL0 || frag_attrib == VARYING_SLOT_COL1) - mode = brw->ctx.Light.ShadeModel == GL_FLAT - ? INTERP_QUALIFIER_FLAT : INTERP_QUALIFIER_SMOOTH; - else - mode = INTERP_QUALIFIER_SMOOTH; + foreach_list_typed(nir_variable, var, node, &nir->inputs) { + unsigned location = var->data.location; + unsigned slot_count = glsl_count_attribute_slots(var->type, false); + + gen4_frag_prog_set_interp_modes(prog_data, vue_map, location, slot_count, + var->data.interpolation); + + if (location == VARYING_SLOT_COL0 || location == VARYING_SLOT_COL1) { + location = location + VARYING_SLOT_BFC0 - VARYING_SLOT_COL0; + gen4_frag_prog_set_interp_modes(prog_data, vue_map, location, + slot_count, var->data.interpolation); } - - brw->interpolation_mode.mode[i] = mode; } - if (unlikely(INTEL_DEBUG & DEBUG_VUE)) { + bool debug = false; + if (debug) { fprintf(stderr, "VUE map:\n"); for (int i = 0; i < vue_map->num_slots; i++) { int varying = vue_map->slot_to_varying[i]; @@ -102,7 +103,7 @@ fprintf(stderr, "%d: %d %s ofs %d\n", i, varying, - get_qual_name(brw->interpolation_mode.mode[i]), + get_qual_name(prog_data->interp_mode[i]), brw_vue_slot_to_offset(i)); } } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_ir_fs.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_ir_fs.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_ir_fs.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_ir_fs.h 2017-06-01 10:37:10.000000000 +0000 @@ -49,15 +49,6 @@ */ unsigned component_size(unsigned width) const; - /** Smear a channel of the reg to all channels. */ - fs_reg &set_smear(unsigned subreg); - - /** - * Offset in bytes from the start of the register. Values up to a - * backend_reg::reg_offset unit are valid. - */ - int subreg_offset; - /** Register region horizontal stride */ uint8_t stride; }; @@ -85,17 +76,13 @@ break; case VGRF: case ATTR: - case UNIFORM: { - const unsigned reg_size = (reg.file == UNIFORM ? 4 : REG_SIZE); - const unsigned suboffset = reg.subreg_offset + delta; - reg.reg_offset += suboffset / reg_size; - reg.subreg_offset = suboffset % reg_size; + case UNIFORM: + reg.offset += delta; break; - } case MRF: { - const unsigned suboffset = reg.subreg_offset + delta; + const unsigned suboffset = reg.offset + delta; reg.nr += suboffset / REG_SIZE; - reg.subreg_offset = suboffset % REG_SIZE; + reg.offset = suboffset % REG_SIZE; break; } case ARF: @@ -192,8 +179,23 @@ static inline unsigned reg_offset(const fs_reg &r) { - return ((r.file == VGRF || r.file == IMM ? 0 : r.nr) + r.reg_offset) * - (r.file == UNIFORM ? 4 : REG_SIZE) + r.subreg_offset; + return (r.file == VGRF || r.file == IMM ? 0 : r.nr) * + (r.file == UNIFORM ? 4 : REG_SIZE) + r.offset + + (r.file == ARF || r.file == FIXED_GRF ? r.subnr : 0); +} + +/** + * Return the amount of padding in bytes left unused between individual + * components of register \p r due to a (horizontal) stride value greater than + * one, or zero if components are tightly packed in the register file. + */ +static inline unsigned +reg_padding(const fs_reg &r) +{ + const unsigned stride = ((r.file != ARF && r.file != FIXED_GRF) ? r.stride : + r.hstride == 0 ? 0 : + 1 << (r.hstride - 1)); + return (MAX2(1, stride) - 1) * type_sz(r.type); } /** @@ -224,6 +226,19 @@ } /** + * Check that the register region given by r [r.offset, r.offset + dr[ + * is fully contained inside the register region given by s + * [s.offset, s.offset + ds[. + */ +static inline bool +region_contained_in(const fs_reg &r, unsigned dr, const fs_reg &s, unsigned ds) +{ + return reg_space(r) == reg_space(s) && + reg_offset(r) >= reg_offset(s) && + reg_offset(r) + dr <= reg_offset(s) + ds; +} + +/** * Return whether the given register region is n-periodic, i.e. whether the * original region remains invariant after shifting it by \p n scalar * channels. @@ -325,13 +340,12 @@ void resize_sources(uint8_t num_sources); bool equals(fs_inst *inst) const; - bool overwrites_reg(const fs_reg ®) const; bool is_send_from_grf() const; bool is_partial_write() const; bool is_copy_payload(const brw::simple_allocator &grf_alloc) const; unsigned components_read(unsigned i) const; - int regs_read(int arg) const; - bool can_do_source_mods(const struct brw_device_info *devinfo); + unsigned size_read(int arg) const; + bool can_do_source_mods(const struct gen_device_info *devinfo); bool can_change_types() const; bool has_side_effects() const; bool has_source_and_destination_hazard() const; @@ -340,7 +354,7 @@ * Return the subset of flag registers read by the instruction as a bitset * with byte granularity. */ - unsigned flags_read(const brw_device_info *devinfo) const; + unsigned flags_read(const gen_device_info *devinfo) const; /** * Return the subset of flag registers updated by the instruction (either @@ -353,22 +367,6 @@ uint8_t sources; /**< Number of fs_reg sources. */ - /** - * Execution size of the instruction. This is used by the generator to - * generate the correct binary for the given fs_inst. Current valid - * values are 1, 8, 16. - */ - uint8_t exec_size; - - /** - * Channel group from the hardware execution and predication mask that - * should be applied to the instruction. The subset of channel enable - * signals (calculated from the EU control flow and predication state) - * given by [group, group + exec_size) will be used to mask GRF writes and - * any other side effects of the instruction. - */ - uint8_t group; - bool eot:1; bool pi_noperspective:1; /**< Pixel interpolator noperspective flag */ }; @@ -417,4 +415,37 @@ return inst; } +/** + * Return the number of dataflow registers written by the instruction (either + * fully or partially) counted from 'floor(reg_offset(inst->dst) / + * register_size)'. The somewhat arbitrary register size unit is 4B for the + * UNIFORM and IMM files and 32B for all other files. + */ +inline unsigned +regs_written(const fs_inst *inst) +{ + assert(inst->dst.file != UNIFORM && inst->dst.file != IMM); + return DIV_ROUND_UP(reg_offset(inst->dst) % REG_SIZE + + inst->size_written - + MIN2(inst->size_written, reg_padding(inst->dst)), + REG_SIZE); +} + +/** + * Return the number of dataflow registers read by the instruction (either + * fully or partially) counted from 'floor(reg_offset(inst->src[i]) / + * register_size)'. The somewhat arbitrary register size unit is 4B for the + * UNIFORM and IMM files and 32B for all other files. + */ +inline unsigned +regs_read(const fs_inst *inst, unsigned i) +{ + const unsigned reg_size = + inst->src[i].file == UNIFORM || inst->src[i].file == IMM ? 4 : REG_SIZE; + return DIV_ROUND_UP(reg_offset(inst->src[i]) % reg_size + + inst->size_read(i) - + MIN2(inst->size_read(i), reg_padding(inst->src[i])), + reg_size); +} + #endif diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_ir_vec4.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_ir_vec4.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_ir_vec4.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_ir_vec4.h 2017-06-01 10:37:10.000000000 +0000 @@ -60,15 +60,63 @@ return reg; } +namespace detail { + +static inline void +add_byte_offset(backend_reg *reg, unsigned bytes) +{ + switch (reg->file) { + case BAD_FILE: + break; + case VGRF: + case ATTR: + case UNIFORM: + reg->offset += bytes; + assert(reg->offset % 16 == 0); + break; + case MRF: { + const unsigned suboffset = reg->offset + bytes; + reg->nr += suboffset / REG_SIZE; + reg->offset = suboffset % REG_SIZE; + assert(reg->offset % 16 == 0); + break; + } + case ARF: + case FIXED_GRF: { + const unsigned suboffset = reg->subnr + bytes; + reg->nr += suboffset / REG_SIZE; + reg->subnr = suboffset % REG_SIZE; + assert(reg->subnr % 16 == 0); + break; + } + default: + assert(bytes == 0); + } +} + +} /* namepace detail */ + static inline src_reg -offset(src_reg reg, unsigned delta) +byte_offset(src_reg reg, unsigned bytes) { - assert(delta == 0 || - (reg.file != ARF && reg.file != FIXED_GRF && reg.file != IMM)); - reg.reg_offset += delta; + detail::add_byte_offset(®, bytes); return reg; } +static inline src_reg +offset(src_reg reg, unsigned width, unsigned delta) +{ + const unsigned stride = (reg.file == UNIFORM ? 0 : 4); + const unsigned num_components = MAX2(width / 4 * stride, 4); + return byte_offset(reg, num_components * type_sz(reg.type) * delta); +} + +static inline src_reg +horiz_offset(src_reg reg, unsigned delta) +{ + return byte_offset(reg, delta * type_sz(reg.type)); +} + /** * Reswizzle a given source register. * \sa brw_swizzle(). @@ -130,15 +178,27 @@ } static inline dst_reg -offset(dst_reg reg, unsigned delta) +byte_offset(dst_reg reg, unsigned bytes) { - assert(delta == 0 || - (reg.file != ARF && reg.file != FIXED_GRF && reg.file != IMM)); - reg.reg_offset += delta; + detail::add_byte_offset(®, bytes); return reg; } static inline dst_reg +offset(dst_reg reg, unsigned width, unsigned delta) +{ + const unsigned stride = (reg.file == UNIFORM ? 0 : 4); + const unsigned num_components = MAX2(width / 4 * stride, 4); + return byte_offset(reg, num_components * type_sz(reg.type) * delta); +} + +static inline dst_reg +horiz_offset(dst_reg reg, unsigned delta) +{ + return byte_offset(reg, delta * type_sz(reg.type)); +} + +static inline dst_reg writemask(dst_reg reg, unsigned mask) { assert(reg.file != IMM); @@ -147,6 +207,62 @@ return reg; } +/** + * Return an integer identifying the discrete address space a register is + * contained in. A register is by definition fully contained in the single + * reg_space it belongs to, so two registers with different reg_space ids are + * guaranteed not to overlap. Most register files are a single reg_space of + * its own, only the VGRF file is composed of multiple discrete address + * spaces, one for each VGRF allocation. + */ +static inline uint32_t +reg_space(const backend_reg &r) +{ + return r.file << 16 | (r.file == VGRF ? r.nr : 0); +} + +/** + * Return the base offset in bytes of a register relative to the start of its + * reg_space(). + */ +static inline unsigned +reg_offset(const backend_reg &r) +{ + return (r.file == VGRF || r.file == IMM ? 0 : r.nr) * + (r.file == UNIFORM ? 16 : REG_SIZE) + r.offset + + (r.file == ARF || r.file == FIXED_GRF ? r.subnr : 0); +} + +/** + * Return whether the register region starting at \p r and spanning \p dr + * bytes could potentially overlap the register region starting at \p s and + * spanning \p ds bytes. + */ +static inline bool +regions_overlap(const backend_reg &r, unsigned dr, + const backend_reg &s, unsigned ds) +{ + if (r.file == MRF && (r.nr & BRW_MRF_COMPR4)) { + /* COMPR4 regions are translated by the hardware during decompression + * into two separate half-regions 4 MRFs apart from each other. + */ + backend_reg t0 = r; + t0.nr &= ~BRW_MRF_COMPR4; + backend_reg t1 = t0; + t1.offset += 4 * REG_SIZE; + return regions_overlap(t0, dr / 2, s, ds) || + regions_overlap(t1, dr / 2, s, ds); + + } else if (s.file == MRF && (s.nr & BRW_MRF_COMPR4)) { + return regions_overlap(s, ds, r, dr); + + } else { + return reg_space(r) == reg_space(s) && + !(reg_offset(r) + dr <= reg_offset(s) || + reg_offset(s) + ds <= reg_offset(r)); + } +} + class vec4_instruction : public backend_instruction { public: DECLARE_RALLOC_CXX_OPERATORS(vec4_instruction) @@ -167,15 +283,21 @@ unsigned sol_vertex; /**< gen6: used for setting dst index in SVB header */ bool is_send_from_grf(); - unsigned regs_read(unsigned arg) const; - bool can_reswizzle(const struct brw_device_info *devinfo, int dst_writemask, + unsigned size_read(unsigned arg) const; + bool can_reswizzle(const struct gen_device_info *devinfo, int dst_writemask, int swizzle, int swizzle_mask); void reswizzle(int dst_writemask, int swizzle); - bool can_do_source_mods(const struct brw_device_info *devinfo); - bool can_do_writemask(const struct brw_device_info *devinfo); + bool can_do_source_mods(const struct gen_device_info *devinfo); + bool can_do_writemask(const struct gen_device_info *devinfo); bool can_change_types() const; bool has_source_and_destination_hazard() const; + bool is_align1_partial_write() + { + return opcode == VEC4_OPCODE_SET_LOW_32BIT || + opcode == VEC4_OPCODE_SET_HIGH_32BIT; + } + bool reads_flag() { return predicate || opcode == VS_OPCODE_UNPACK_FLAGS_SIMD4X2; @@ -254,6 +376,35 @@ return inst; } +/** + * Return the number of dataflow registers written by the instruction (either + * fully or partially) counted from 'floor(reg_offset(inst->dst) / + * register_size)'. The somewhat arbitrary register size unit is 16B for the + * UNIFORM and IMM files and 32B for all other files. + */ +inline unsigned +regs_written(const vec4_instruction *inst) +{ + assert(inst->dst.file != UNIFORM && inst->dst.file != IMM); + return DIV_ROUND_UP(reg_offset(inst->dst) % REG_SIZE + inst->size_written, + REG_SIZE); +} + +/** + * Return the number of dataflow registers read by the instruction (either + * fully or partially) counted from 'floor(reg_offset(inst->src[i]) / + * register_size)'. The somewhat arbitrary register size unit is 16B for the + * UNIFORM and IMM files and 32B for all other files. + */ +inline unsigned +regs_read(const vec4_instruction *inst, unsigned i) +{ + const unsigned reg_size = + inst->src[i].file == UNIFORM || inst->src[i].file == IMM ? 16 : REG_SIZE; + return DIV_ROUND_UP(reg_offset(inst->src[i]) % reg_size + inst->size_read(i), + reg_size); +} + } /* namespace brw */ #endif diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_link.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_link.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_link.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_link.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -43,17 +43,17 @@ brw_shader_precompile(struct gl_context *ctx, struct gl_shader_program *sh_prog) { - struct gl_shader *vs = sh_prog->_LinkedShaders[MESA_SHADER_VERTEX]; - struct gl_shader *tcs = sh_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]; - struct gl_shader *tes = sh_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL]; - struct gl_shader *gs = sh_prog->_LinkedShaders[MESA_SHADER_GEOMETRY]; - struct gl_shader *fs = sh_prog->_LinkedShaders[MESA_SHADER_FRAGMENT]; - struct gl_shader *cs = sh_prog->_LinkedShaders[MESA_SHADER_COMPUTE]; + struct gl_linked_shader *vs = sh_prog->_LinkedShaders[MESA_SHADER_VERTEX]; + struct gl_linked_shader *tcs = sh_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]; + struct gl_linked_shader *tes = sh_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL]; + struct gl_linked_shader *gs = sh_prog->_LinkedShaders[MESA_SHADER_GEOMETRY]; + struct gl_linked_shader *fs = sh_prog->_LinkedShaders[MESA_SHADER_FRAGMENT]; + struct gl_linked_shader *cs = sh_prog->_LinkedShaders[MESA_SHADER_COMPUTE]; - if (fs && !brw_fs_precompile(ctx, sh_prog, fs->Program)) + if (fs && !brw_fs_precompile(ctx, fs->Program)) return false; - if (gs && !brw_gs_precompile(ctx, sh_prog, gs->Program)) + if (gs && !brw_gs_precompile(ctx, gs->Program)) return false; if (tes && !brw_tes_precompile(ctx, sh_prog, tes->Program)) @@ -62,10 +62,10 @@ if (tcs && !brw_tcs_precompile(ctx, sh_prog, tcs->Program)) return false; - if (vs && !brw_vs_precompile(ctx, sh_prog, vs->Program)) + if (vs && !brw_vs_precompile(ctx, vs->Program)) return false; - if (cs && !brw_cs_precompile(ctx, sh_prog, cs->Program)) + if (cs && !brw_cs_precompile(ctx, cs->Program)) return false; return true; @@ -73,7 +73,6 @@ static void brw_lower_packing_builtins(struct brw_context *brw, - gl_shader_stage shader_type, exec_list *ir) { /* Gens < 7 don't have instructions to convert to or from half-precision, @@ -86,13 +85,12 @@ } static void -process_glsl_ir(gl_shader_stage stage, - struct brw_context *brw, +process_glsl_ir(struct brw_context *brw, struct gl_shader_program *shader_prog, - struct gl_shader *shader) + struct gl_linked_shader *shader) { struct gl_context *ctx = &brw->ctx; - const struct brw_compiler *compiler = brw->intelScreen->compiler; + const struct brw_compiler *compiler = brw->screen->compiler; const struct gl_shader_compiler_options *options = &ctx->Const.ShaderCompilerOptions[shader->Stage]; @@ -101,50 +99,41 @@ ralloc_adopt(mem_ctx, shader->ir); + lower_blend_equation_advanced(shader); + /* lower_packing_builtins() inserts arithmetic instructions, so it * must precede lower_instructions(). */ - brw_lower_packing_builtins(brw, shader->Stage, shader->ir); + brw_lower_packing_builtins(brw, shader->ir); do_mat_op_to_vec(shader->ir); - lower_instructions(shader->ir, - DIV_TO_MUL_RCP | - SUB_TO_ADD_NEG | - EXP_TO_EXP2 | - LOG_TO_LOG2 | - DFREXP_DLDEXP_TO_ARITH | - CARRY_TO_ARITH | - BORROW_TO_ARITH); + + unsigned instructions_to_lower = (DIV_TO_MUL_RCP | + SUB_TO_ADD_NEG | + EXP_TO_EXP2 | + LOG_TO_LOG2 | + DFREXP_DLDEXP_TO_ARITH); + if (brw->gen < 7) { + instructions_to_lower |= BIT_COUNT_TO_MATH | + EXTRACT_TO_SHIFTS | + INSERT_TO_SHIFTS | + REVERSE_TO_SHIFTS; + } + + lower_instructions(shader->ir, instructions_to_lower); /* Pre-gen6 HW can only nest if-statements 16 deep. Beyond this, * if-statements need to be flattened. */ if (brw->gen < 6) - lower_if_to_cond_assign(shader->ir, 16); + lower_if_to_cond_assign(shader->Stage, shader->ir, 16); do_lower_texture_projection(shader->ir); - brw_lower_texture_gradients(brw, shader->ir); do_vec_index_to_cond_assign(shader->ir); lower_vector_insert(shader->ir, true); lower_offset_arrays(shader->ir); lower_noise(shader->ir); lower_quadop_vector(shader->ir, false); - do_copy_propagation(shader->ir); - - bool lowered_variable_indexing = - lower_variable_index_to_cond_assign((gl_shader_stage)stage, - shader->ir, - options->EmitNoIndirectInput, - options->EmitNoIndirectOutput, - options->EmitNoIndirectTemp, - options->EmitNoIndirectUniform); - - if (unlikely(brw->perf_debug && lowered_variable_indexing)) { - perf_debug("Unsupported form of variable indexing in %s; falling " - "back to very inefficient code generation\n", - _mesa_shader_stage_to_abbrev(shader->Stage)); - } - bool progress; do { progress = false; @@ -156,12 +145,6 @@ brw_do_vector_splitting(shader->ir); } - progress = do_lower_jumps(shader->ir, true, true, - true, /* main return */ - false, /* continue */ - false /* loops */ - ) || progress; - progress = do_common_optimization(shader->ir, true, true, options, ctx->Const.NativeIntegers) || progress; } while (progress); @@ -177,92 +160,109 @@ if (ctx->_Shader->Flags & GLSL_DUMP) { fprintf(stderr, "\n"); - fprintf(stderr, "GLSL IR for linked %s program %d:\n", - _mesa_shader_stage_to_string(shader->Stage), - shader_prog->Name); - _mesa_print_ir(stderr, shader->ir, NULL); + if (shader->ir) { + fprintf(stderr, "GLSL IR for linked %s program %d:\n", + _mesa_shader_stage_to_string(shader->Stage), + shader_prog->Name); + _mesa_print_ir(stderr, shader->ir, NULL); + } else { + fprintf(stderr, "No GLSL IR for linked %s program %d (shader may be " + "from cache)\n", _mesa_shader_stage_to_string(shader->Stage), + shader_prog->Name); + } fprintf(stderr, "\n"); } } -extern "C" struct gl_shader * -brw_new_shader(struct gl_context *ctx, GLuint name, GLuint type) +static void +unify_interfaces(struct shader_info **infos) { - struct brw_shader *shader; + struct shader_info *prev_info = NULL; - shader = rzalloc(NULL, struct brw_shader); - if (shader) { - shader->base.Type = type; - shader->base.Stage = _mesa_shader_enum_to_shader_stage(type); - shader->base.Name = name; - _mesa_init_shader(ctx, &shader->base); - } + for (unsigned i = MESA_SHADER_VERTEX; i < MESA_SHADER_FRAGMENT; i++) { + if (!infos[i]) + continue; + + if (prev_info) { + prev_info->outputs_written |= infos[i]->inputs_read & + ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER); + infos[i]->inputs_read |= prev_info->outputs_written & + ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER); - return &shader->base; + prev_info->patch_outputs_written |= infos[i]->patch_inputs_read; + infos[i]->patch_inputs_read |= prev_info->patch_outputs_written; + } + prev_info = infos[i]; + } } extern "C" GLboolean brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg) { struct brw_context *brw = brw_context(ctx); - const struct brw_compiler *compiler = brw->intelScreen->compiler; + const struct brw_compiler *compiler = brw->screen->compiler; unsigned int stage; + struct shader_info *infos[MESA_SHADER_STAGES] = { 0, }; for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) { - struct gl_shader *shader = shProg->_LinkedShaders[stage]; + struct gl_linked_shader *shader = shProg->_LinkedShaders[stage]; if (!shader) - continue; + continue; - struct gl_program *prog = - ctx->Driver.NewProgram(ctx, _mesa_shader_stage_to_program(stage), - shader->Name); - if (!prog) - return false; + struct gl_program *prog = shader->Program; prog->Parameters = _mesa_new_parameter_list(); - _mesa_copy_linked_program_data((gl_shader_stage) stage, shProg, prog); - - process_glsl_ir((gl_shader_stage) stage, brw, shProg, shader); - - /* Make a pass over the IR to add state references for any built-in - * uniforms that are used. This has to be done now (during linking). - * Code generation doesn't happen until the first time this shader is - * used for rendering. Waiting until then to generate the parameters is - * too late. At that point, the values for the built-in uniforms won't - * get sent to the shader. - */ - foreach_in_list(ir_instruction, node, shader->ir) { - ir_variable *var = node->as_variable(); - - if ((var == NULL) || (var->data.mode != ir_var_uniform) - || (strncmp(var->name, "gl_", 3) != 0)) - continue; + process_glsl_ir(brw, shProg, shader); - const ir_state_slot *const slots = var->get_state_slots(); - assert(slots != NULL); + _mesa_copy_linked_program_data(shProg, shader); - for (unsigned int i = 0; i < var->get_num_state_slots(); i++) { - _mesa_add_state_reference(prog->Parameters, - (gl_state_index *) slots[i].tokens); - } - } - - do_set_program_inouts(shader->ir, prog, shader->Stage); - - prog->SamplersUsed = shader->active_samplers; prog->ShadowSamplers = shader->shadow_samplers; _mesa_update_shader_textures_used(shProg, prog); - _mesa_reference_program(ctx, &shader->Program, prog); - brw_add_texrect_params(prog); + bool debug_enabled = + (INTEL_DEBUG & intel_debug_flag_for_shader_stage(shader->Stage)); + + if (debug_enabled && shader->ir) { + fprintf(stderr, "GLSL IR for native %s shader %d:\n", + _mesa_shader_stage_to_string(shader->Stage), shProg->Name); + _mesa_print_ir(stderr, shader->ir, NULL); + fprintf(stderr, "\n\n"); + } + prog->nir = brw_create_nir(brw, shProg, prog, (gl_shader_stage) stage, compiler->scalar_stage[stage]); + infos[stage] = prog->nir->info; - _mesa_reference_program(ctx, &prog, NULL); + /* Make a pass over the IR to add state references for any built-in + * uniforms that are used. This has to be done now (during linking). + * Code generation doesn't happen until the first time this shader is + * used for rendering. Waiting until then to generate the parameters is + * too late. At that point, the values for the built-in uniforms won't + * get sent to the shader. + */ + nir_foreach_variable(var, &prog->nir->uniforms) { + if (strncmp(var->name, "gl_", 3) == 0) { + const nir_state_slot *const slots = var->state_slots; + assert(var->state_slots != NULL); + + for (unsigned int i = 0; i < var->num_state_slots; i++) { + _mesa_add_state_reference(prog->Parameters, + (gl_state_index *)slots[i].tokens); + } + } + } } + /* The linker tries to dead code eliminate unused varying components, + * and make sure interfaces match. But it isn't able to do so in all + * cases. So, explicitly make the interfaces match by OR'ing together + * the inputs_read/outputs_written bitfields of adjacent stages. + */ + if (!shProg->SeparateShader) + unify_interfaces(infos); + if ((ctx->_Shader->Flags & GLSL_DUMP) && shProg->Name != 0) { for (unsigned i = 0; i < shProg->NumShaders; i++) { const struct gl_shader *sh = shProg->Shaders[i]; @@ -281,5 +281,16 @@ return false; build_program_resource_list(ctx, shProg); + + for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) { + struct gl_linked_shader *shader = shProg->_LinkedShaders[stage]; + if (!shader) + continue; + + /* The GLSL IR won't be needed anymore. */ + ralloc_free(shader->ir); + shader->ir = NULL; + } + return true; } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp 1970-01-01 00:00:00.000000000 +0000 @@ -1,353 +0,0 @@ -/* - * Copyright © 2012 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -/** - * \file brw_lower_texture_gradients.cpp - */ - -#include "compiler/glsl/ir.h" -#include "compiler/glsl/ir_builder.h" -#include "program/prog_instruction.h" -#include "brw_context.h" - -using namespace ir_builder; - -class lower_texture_grad_visitor : public ir_hierarchical_visitor { -public: - lower_texture_grad_visitor(bool has_sample_d_c) - : has_sample_d_c(has_sample_d_c) - { - progress = false; - } - - ir_visitor_status visit_leave(ir_texture *ir); - - - bool progress; - bool has_sample_d_c; - -private: - void emit(ir_variable *, ir_rvalue *); - ir_variable *temp(void *ctx, const glsl_type *type, const char *name); -}; - -/** - * Emit a variable declaration and an assignment to initialize it. - */ -void -lower_texture_grad_visitor::emit(ir_variable *var, ir_rvalue *value) -{ - base_ir->insert_before(var); - base_ir->insert_before(assign(var, value)); -} - -/** - * Emit a temporary variable declaration - */ -ir_variable * -lower_texture_grad_visitor::temp(void *ctx, const glsl_type *type, const char *name) -{ - ir_variable *var = new(ctx) ir_variable(type, name, ir_var_temporary); - base_ir->insert_before(var); - return var; -} - -static const glsl_type * -txs_type(const glsl_type *type) -{ - unsigned dims; - switch (type->sampler_dimensionality) { - case GLSL_SAMPLER_DIM_1D: - dims = 1; - break; - case GLSL_SAMPLER_DIM_2D: - case GLSL_SAMPLER_DIM_RECT: - case GLSL_SAMPLER_DIM_CUBE: - dims = 2; - break; - case GLSL_SAMPLER_DIM_3D: - dims = 3; - break; - default: - unreachable("Should not get here: invalid sampler dimensionality"); - } - - if (type->sampler_array) - dims++; - - return glsl_type::get_instance(GLSL_TYPE_INT, dims, 1); -} - -ir_visitor_status -lower_texture_grad_visitor::visit_leave(ir_texture *ir) -{ - /* Only lower textureGrad with cube maps or shadow samplers */ - if (ir->op != ir_txd || - (ir->sampler->type->sampler_dimensionality != GLSL_SAMPLER_DIM_CUBE && - !ir->shadow_comparitor)) - return visit_continue; - - /* Lower textureGrad() with samplerCube* even if we have the sample_d_c - * message. GLSL provides gradients for the 'r' coordinate. Unfortunately: - * - * From the Ivybridge PRM, Volume 4, Part 1, sample_d message description: - * "The r coordinate contains the faceid, and the r gradients are ignored - * by hardware." - */ - bool need_lowering = !has_sample_d_c || - ir->sampler->type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE; - - if (!need_lowering) - return visit_continue; - - void *mem_ctx = ralloc_parent(ir); - - const glsl_type *grad_type = ir->lod_info.grad.dPdx->type; - - /* Use textureSize() to get the width and height of LOD 0; swizzle away - * the depth/number of array slices. - */ - ir_texture *txs = new(mem_ctx) ir_texture(ir_txs); - txs->set_sampler(ir->sampler->clone(mem_ctx, NULL), - txs_type(ir->sampler->type)); - txs->lod_info.lod = new(mem_ctx) ir_constant(0); - ir_variable *size = - new(mem_ctx) ir_variable(grad_type, "size", ir_var_temporary); - if (ir->sampler->type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE) { - base_ir->insert_before(size); - base_ir->insert_before(assign(size, - swizzle_for_size(expr(ir_unop_i2f, txs), 2), - WRITEMASK_XY)); - base_ir->insert_before(assign(size, new(mem_ctx) ir_constant(1.0f), WRITEMASK_Z)); - } else { - emit(size, expr(ir_unop_i2f, - swizzle_for_size(txs, grad_type->vector_elements))); - } - - /* Scale the gradients by width and height. Effectively, the incoming - * gradients are s'(x,y), t'(x,y), and r'(x,y) from equation 3.19 in the - * GL 3.0 spec; we want u'(x,y), which is w_t * s'(x,y). - */ - ir_variable *dPdx = - new(mem_ctx) ir_variable(grad_type, "dPdx", ir_var_temporary); - emit(dPdx, mul(size, ir->lod_info.grad.dPdx)); - - ir_variable *dPdy = - new(mem_ctx) ir_variable(grad_type, "dPdy", ir_var_temporary); - emit(dPdy, mul(size, ir->lod_info.grad.dPdy)); - - ir->op = ir_txl; - if (ir->sampler->type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE) { - /* Cubemap texture lookups first generate a texture coordinate normalized - * to [-1, 1] on the appropiate face. The appropiate face is determined - * by which component has largest magnitude and its sign. The texture - * coordinate is the quotient of the remaining texture coordinates against - * that absolute value of the component of largest magnitude. This - * division requires that the computing of the derivative of the texel - * coordinate must use the quotient rule. The high level GLSL code is as - * follows: - * - * Step 1: selection - * - * vec3 abs_p, Q, dQdx, dQdy; - * abs_p = abs(ir->coordinate); - * if (abs_p.x >= max(abs_p.y, abs_p.z)) { - * Q = ir->coordinate.yzx; - * dQdx = ir->lod_info.grad.dPdx.yzx; - * dQdy = ir->lod_info.grad.dPdy.yzx; - * } - * if (abs_p.y >= max(abs_p.x, abs_p.z)) { - * Q = ir->coordinate.xzy; - * dQdx = ir->lod_info.grad.dPdx.xzy; - * dQdy = ir->lod_info.grad.dPdy.xzy; - * } - * if (abs_p.z >= max(abs_p.x, abs_p.y)) { - * Q = ir->coordinate; - * dQdx = ir->lod_info.grad.dPdx; - * dQdy = ir->lod_info.grad.dPdy; - * } - * - * Step 2: use quotient rule to compute derivative. The normalized to - * [-1, 1] texel coordinate is given by Q.xy / (sign(Q.z) * Q.z). We are - * only concerned with the magnitudes of the derivatives whose values are - * not affected by the sign. We drop the sign from the computation. - * - * vec2 dx, dy; - * float recip; - * - * recip = 1.0 / Q.z; - * dx = recip * ( dQdx.xy - Q.xy * (dQdx.z * recip) ); - * dy = recip * ( dQdy.xy - Q.xy * (dQdy.z * recip) ); - * - * Step 3: compute LOD. At this point we have the derivatives of the - * texture coordinates normalized to [-1,1]. We take the LOD to be - * result = log2(max(sqrt(dot(dx, dx)), sqrt(dy, dy)) * 0.5 * L) - * = -1.0 + log2(max(sqrt(dot(dx, dx)), sqrt(dy, dy)) * L) - * = -1.0 + log2(sqrt(max(dot(dx, dx), dot(dy,dy))) * L) - * = -1.0 + log2(sqrt(L * L * max(dot(dx, dx), dot(dy,dy)))) - * = -1.0 + 0.5 * log2(L * L * max(dot(dx, dx), dot(dy,dy))) - * where L is the dimension of the cubemap. The code is: - * - * float M, result; - * M = max(dot(dx, dx), dot(dy, dy)); - * L = textureSize(sampler, 0).x; - * result = -1.0 + 0.5 * log2(L * L * M); - */ - -/* Helpers to make code more human readable. */ -#define EMIT(instr) base_ir->insert_before(instr) -#define THEN(irif, instr) irif->then_instructions.push_tail(instr) -#define CLONE(x) x->clone(mem_ctx, NULL) - - ir_variable *abs_p = temp(mem_ctx, glsl_type::vec3_type, "abs_p"); - - EMIT(assign(abs_p, swizzle_for_size(abs(CLONE(ir->coordinate)), 3))); - - ir_variable *Q = temp(mem_ctx, glsl_type::vec3_type, "Q"); - ir_variable *dQdx = temp(mem_ctx, glsl_type::vec3_type, "dQdx"); - ir_variable *dQdy = temp(mem_ctx, glsl_type::vec3_type, "dQdy"); - - /* unmodified dPdx, dPdy values */ - ir_rvalue *dPdx = ir->lod_info.grad.dPdx; - ir_rvalue *dPdy = ir->lod_info.grad.dPdy; - - /* 1. compute selector */ - - /* if (abs_p.x >= max(abs_p.y, abs_p.z)) ... */ - ir_if *branch_x = - new(mem_ctx) ir_if(gequal(swizzle_x(abs_p), - max2(swizzle_y(abs_p), swizzle_z(abs_p)))); - - /* Q = p.yzx; - * dQdx = dPdx.yzx; - * dQdy = dPdy.yzx; - */ - int yzx = MAKE_SWIZZLE4(SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_X, 0); - THEN(branch_x, assign(Q, swizzle(CLONE(ir->coordinate), yzx, 3))); - THEN(branch_x, assign(dQdx, swizzle(CLONE(dPdx), yzx, 3))); - THEN(branch_x, assign(dQdy, swizzle(CLONE(dPdy), yzx, 3))); - EMIT(branch_x); - - /* if (abs_p.y >= max(abs_p.x, abs_p.z)) */ - ir_if *branch_y = - new(mem_ctx) ir_if(gequal(swizzle_y(abs_p), - max2(swizzle_x(abs_p), swizzle_z(abs_p)))); - - /* Q = p.xzy; - * dQdx = dPdx.xzy; - * dQdy = dPdy.xzy; - */ - int xzy = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Z, SWIZZLE_Y, 0); - THEN(branch_y, assign(Q, swizzle(CLONE(ir->coordinate), xzy, 3))); - THEN(branch_y, assign(dQdx, swizzle(CLONE(dPdx), xzy, 3))); - THEN(branch_y, assign(dQdy, swizzle(CLONE(dPdy), xzy, 3))); - EMIT(branch_y); - - /* if (abs_p.z >= max(abs_p.x, abs_p.y)) */ - ir_if *branch_z = - new(mem_ctx) ir_if(gequal(swizzle_z(abs_p), - max2(swizzle_x(abs_p), swizzle_y(abs_p)))); - - /* Q = p; - * dQdx = dPdx; - * dQdy = dPdy; - */ - THEN(branch_z, assign(Q, swizzle_for_size(CLONE(ir->coordinate), 3))); - THEN(branch_z, assign(dQdx, CLONE(dPdx))); - THEN(branch_z, assign(dQdy, CLONE(dPdy))); - EMIT(branch_z); - - /* 2. quotient rule */ - ir_variable *recip = temp(mem_ctx, glsl_type::float_type, "recip"); - EMIT(assign(recip, expr(ir_unop_rcp, swizzle_z(Q)))); - - ir_variable *dx = temp(mem_ctx, glsl_type::vec2_type, "dx"); - ir_variable *dy = temp(mem_ctx, glsl_type::vec2_type, "dy"); - - /* tmp = Q.xy * recip; - * dx = recip * ( dQdx.xy - (tmp * dQdx.z) ); - * dy = recip * ( dQdy.xy - (tmp * dQdy.z) ); - */ - ir_variable *tmp = temp(mem_ctx, glsl_type::vec2_type, "tmp"); - EMIT(assign(tmp, mul(swizzle_xy(Q), recip))); - EMIT(assign(dx, mul(recip, sub(swizzle_xy(dQdx), - mul(tmp, swizzle_z(dQdx)))))); - EMIT(assign(dy, mul(recip, sub(swizzle_xy(dQdy), - mul(tmp, swizzle_z(dQdy)))))); - - /* M = max(dot(dx, dx), dot(dy, dy)); */ - ir_variable *M = temp(mem_ctx, glsl_type::float_type, "M"); - EMIT(assign(M, max2(dot(dx, dx), dot(dy, dy)))); - - /* size has textureSize() of LOD 0 */ - ir_variable *L = temp(mem_ctx, glsl_type::float_type, "L"); - EMIT(assign(L, swizzle_x(size))); - - ir_variable *result = temp(mem_ctx, glsl_type::float_type, "result"); - - /* result = -1.0 + 0.5 * log2(L * L * M); */ - EMIT(assign(result, - add(new(mem_ctx)ir_constant(-1.0f), - mul(new(mem_ctx)ir_constant(0.5f), - expr(ir_unop_log2, mul(mul(L, L), M)))))); - - /* 3. final assignment of parameters to textureLod call */ - ir->lod_info.lod = new (mem_ctx) ir_dereference_variable(result); - -#undef THEN -#undef EMIT - - } else { - /* Calculate rho from equation 3.20 of the GL 3.0 specification. */ - ir_rvalue *rho; - if (dPdx->type->is_scalar()) { - rho = expr(ir_binop_max, expr(ir_unop_abs, dPdx), - expr(ir_unop_abs, dPdy)); - } else { - rho = expr(ir_binop_max, expr(ir_unop_sqrt, dot(dPdx, dPdx)), - expr(ir_unop_sqrt, dot(dPdy, dPdy))); - } - - /* lambda_base = log2(rho). We're ignoring GL state biases for now. */ - ir->lod_info.lod = expr(ir_unop_log2, rho); - } - - progress = true; - return visit_continue; -} - -extern "C" { - -bool -brw_lower_texture_gradients(struct brw_context *brw, - struct exec_list *instructions) -{ - bool has_sample_d_c = brw->gen >= 8 || brw->is_haswell; - lower_texture_grad_visitor v(has_sample_d_c); - - visit_list_elements(&v, instructions); - - return v.progress; -} - -} diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_meta_util.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_meta_util.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_meta_util.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_meta_util.c 2017-06-01 10:37:10.000000000 +0000 @@ -22,6 +22,7 @@ */ #include "brw_context.h" +#include "brw_defines.h" #include "intel_fbo.h" #include "brw_meta_util.h" #include "brw_state.h" @@ -371,13 +372,11 @@ /** * Convert the given color to a bitfield suitable for ORing into DWORD 7 of * SURFACE_STATE (DWORD 12-15 on SKL+). - * - * Returned boolean tells if the given color differs from the stored. */ -bool -brw_meta_set_fast_clear_color(struct brw_context *brw, - struct intel_mipmap_tree *mt, - const union gl_color_union *color) +union gl_color_union +brw_meta_convert_fast_clear_color(const struct brw_context *brw, + const struct intel_mipmap_tree *mt, + const union gl_color_union *color) { union gl_color_union override_color = *color; @@ -409,7 +408,7 @@ override_color.f[3] = 1.0f; } - /* Handle linear→SRGB conversion */ + /* Handle linear to SRGB conversion */ if (brw->ctx.Color.sRGBEnabled && _mesa_get_srgb_format_linear(mt->format) != mt->format) { for (int i = 0; i < 3; i++) { @@ -418,205 +417,34 @@ } } + return override_color; +} + +/* Returned boolean tells if the given color differs from the current. */ +bool +brw_meta_set_fast_clear_color(struct brw_context *brw, + union gl_color_union *curr_color, + const union gl_color_union *new_color) +{ bool updated; + if (brw->gen >= 9) { - updated = memcmp(&mt->gen9_fast_clear_color, &override_color, - sizeof(mt->gen9_fast_clear_color)); - mt->gen9_fast_clear_color = override_color; + updated = memcmp(curr_color, new_color, sizeof(*curr_color)); + *curr_color = *new_color; } else { - const uint32_t old_color_value = mt->fast_clear_color_value; + const uint32_t old_color_value = *(uint32_t *)curr_color; + uint32_t adjusted = 0; - mt->fast_clear_color_value = 0; for (int i = 0; i < 4; i++) { /* Testing for non-0 works for integer and float colors */ - if (override_color.f[i] != 0.0f) { - mt->fast_clear_color_value |= - 1 << (GEN7_SURFACE_CLEAR_COLOR_SHIFT + (3 - i)); + if (new_color->f[i] != 0.0f) { + adjusted |= 1 << (GEN7_SURFACE_CLEAR_COLOR_SHIFT + (3 - i)); } } - updated = (old_color_value != mt->fast_clear_color_value); + updated = (old_color_value != adjusted); + *(uint32_t *)curr_color = adjusted; } return updated; } - -void -brw_get_fast_clear_rect(const struct brw_context *brw, - const struct gl_framebuffer *fb, - const struct intel_mipmap_tree* mt, - unsigned *x0, unsigned *y0, - unsigned *x1, unsigned *y1) -{ - unsigned int x_align, y_align; - unsigned int x_scaledown, y_scaledown; - - /* Only single sampled surfaces need to (and actually can) be resolved. */ - if (mt->msaa_layout == INTEL_MSAA_LAYOUT_NONE || - intel_miptree_is_lossless_compressed(brw, mt)) { - /* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render - * Target(s)", beneath the "Fast Color Clear" bullet (p327): - * - * Clear pass must have a clear rectangle that must follow - * alignment rules in terms of pixels and lines as shown in the - * table below. Further, the clear-rectangle height and width - * must be multiple of the following dimensions. If the height - * and width of the render target being cleared do not meet these - * requirements, an MCS buffer can be created such that it - * follows the requirement and covers the RT. - * - * The alignment size in the table that follows is related to the - * alignment size returned by intel_get_non_msrt_mcs_alignment(), but - * with X alignment multiplied by 16 and Y alignment multiplied by 32. - */ - intel_get_non_msrt_mcs_alignment(mt, &x_align, &y_align); - x_align *= 16; - - /* SKL+ line alignment requirement for Y-tiled are half those of the prior - * generations. - */ - if (brw->gen >= 9) - y_align *= 16; - else - y_align *= 32; - - /* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render - * Target(s)", beneath the "Fast Color Clear" bullet (p327): - * - * In order to optimize the performance MCS buffer (when bound to - * 1X RT) clear similarly to MCS buffer clear for MSRT case, - * clear rect is required to be scaled by the following factors - * in the horizontal and vertical directions: - * - * The X and Y scale down factors in the table that follows are each - * equal to half the alignment value computed above. - */ - x_scaledown = x_align / 2; - y_scaledown = y_align / 2; - - /* From BSpec: 3D-Media-GPGPU Engine > 3D Pipeline > Pixel > Pixel - * Backend > MCS Buffer for Render Target(s) [DevIVB+] > Table "Color - * Clear of Non-MultiSampled Render Target Restrictions": - * - * Clear rectangle must be aligned to two times the number of - * pixels in the table shown below due to 16x16 hashing across the - * slice. - */ - x_align *= 2; - y_align *= 2; - } else { - /* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render - * Target(s)", beneath the "MSAA Compression" bullet (p326): - * - * Clear pass for this case requires that scaled down primitive - * is sent down with upper left co-ordinate to coincide with - * actual rectangle being cleared. For MSAA, clear rectangle’s - * height and width need to as show in the following table in - * terms of (width,height) of the RT. - * - * MSAA Width of Clear Rect Height of Clear Rect - * 2X Ceil(1/8*width) Ceil(1/2*height) - * 4X Ceil(1/8*width) Ceil(1/2*height) - * 8X Ceil(1/2*width) Ceil(1/2*height) - * 16X width Ceil(1/2*height) - * - * The text "with upper left co-ordinate to coincide with actual - * rectangle being cleared" is a little confusing--it seems to imply - * that to clear a rectangle from (x,y) to (x+w,y+h), one needs to - * feed the pipeline using the rectangle (x,y) to - * (x+Ceil(w/N),y+Ceil(h/2)), where N is either 2 or 8 depending on - * the number of samples. Experiments indicate that this is not - * quite correct; actually, what the hardware appears to do is to - * align whatever rectangle is sent down the pipeline to the nearest - * multiple of 2x2 blocks, and then scale it up by a factor of N - * horizontally and 2 vertically. So the resulting alignment is 4 - * vertically and either 4 or 16 horizontally, and the scaledown - * factor is 2 vertically and either 2 or 8 horizontally. - */ - switch (mt->num_samples) { - case 2: - case 4: - x_scaledown = 8; - break; - case 8: - x_scaledown = 2; - break; - case 16: - x_scaledown = 1; - break; - default: - unreachable("Unexpected sample count for fast clear"); - } - y_scaledown = 2; - x_align = x_scaledown * 2; - y_align = y_scaledown * 2; - } - - *x0 = fb->_Xmin; - *x1 = fb->_Xmax; - if (fb->Name != 0) { - *y0 = fb->_Ymin; - *y1 = fb->_Ymax; - } else { - *y0 = fb->Height - fb->_Ymax; - *y1 = fb->Height - fb->_Ymin; - } - - *x0 = ROUND_DOWN_TO(*x0, x_align) / x_scaledown; - *y0 = ROUND_DOWN_TO(*y0, y_align) / y_scaledown; - *x1 = ALIGN(*x1, x_align) / x_scaledown; - *y1 = ALIGN(*y1, y_align) / y_scaledown; -} - -void -brw_meta_get_buffer_rect(const struct gl_framebuffer *fb, - unsigned *x0, unsigned *y0, - unsigned *x1, unsigned *y1) -{ - *x0 = fb->_Xmin; - *x1 = fb->_Xmax; - if (fb->Name != 0) { - *y0 = fb->_Ymin; - *y1 = fb->_Ymax; - } else { - *y0 = fb->Height - fb->_Ymax; - *y1 = fb->Height - fb->_Ymin; - } -} - -void -brw_get_resolve_rect(const struct brw_context *brw, - const struct intel_mipmap_tree *mt, - unsigned *x0, unsigned *y0, - unsigned *x1, unsigned *y1) -{ - unsigned x_align, y_align; - unsigned x_scaledown, y_scaledown; - - /* From the Ivy Bridge PRM, Vol2 Part1 11.9 "Render Target Resolve": - * - * A rectangle primitive must be scaled down by the following factors - * with respect to render target being resolved. - * - * The scaledown factors in the table that follows are related to the - * alignment size returned by intel_get_non_msrt_mcs_alignment() by a - * multiplier. For IVB and HSW, we divide by two, for BDW we multiply - * by 8 and 16. Similar to the fast clear, SKL eases the BDW vertical scaling - * by a factor of 2. - */ - - intel_get_non_msrt_mcs_alignment(mt, &x_align, &y_align); - if (brw->gen >= 9) { - x_scaledown = x_align * 8; - y_scaledown = y_align * 8; - } else if (brw->gen >= 8) { - x_scaledown = x_align * 8; - y_scaledown = y_align * 16; - } else { - x_scaledown = x_align / 2; - y_scaledown = y_align / 2; - } - *x0 = *y0 = 0; - *x1 = ALIGN(mt->logical_width0, x_scaledown) / x_scaledown; - *y1 = ALIGN(mt->logical_height0, y_scaledown) / y_scaledown; -} diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_meta_util.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_meta_util.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_meta_util.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_meta_util.h 2017-06-01 10:37:10.000000000 +0000 @@ -42,28 +42,15 @@ GLfloat *dstX1, GLfloat *dstY1, bool *mirror_x, bool *mirror_y); -void -brw_get_fast_clear_rect(const struct brw_context *brw, - const struct gl_framebuffer *fb, - const struct intel_mipmap_tree* mt, - unsigned *x0, unsigned *y0, - unsigned *x1, unsigned *y1); - -void -brw_get_resolve_rect(const struct brw_context *brw, - const struct intel_mipmap_tree *mt, - unsigned *x0, unsigned *y0, - unsigned *x1, unsigned *y1); - -void -brw_meta_get_buffer_rect(const struct gl_framebuffer *fb, - unsigned *x0, unsigned *y0, - unsigned *x1, unsigned *y1); +union gl_color_union +brw_meta_convert_fast_clear_color(const struct brw_context *brw, + const struct intel_mipmap_tree *mt, + const union gl_color_union *color); bool brw_meta_set_fast_clear_color(struct brw_context *brw, - struct intel_mipmap_tree *mt, - const union gl_color_union *color); + union gl_color_union *curr_color, + const union gl_color_union *new_color); bool brw_is_color_fast_clear_compatible(struct brw_context *brw, diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_misc_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_misc_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_misc_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_misc_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -177,7 +177,7 @@ if (depth_mt) { intel_get_tile_masks(depth_mt->tiling, depth_mt->tr_mode, - depth_mt->cpp, false, + depth_mt->cpp, &tile_mask_x, &tile_mask_y); if (intel_miptree_level_has_hiz(depth_mt, depth_level)) { @@ -185,7 +185,7 @@ intel_get_tile_masks(depth_mt->hiz_buf->mt->tiling, depth_mt->hiz_buf->mt->tr_mode, depth_mt->hiz_buf->mt->cpp, - false, &hiz_tile_mask_x, + &hiz_tile_mask_x, &hiz_tile_mask_y); /* Each HiZ row represents 2 rows of pixels */ @@ -209,7 +209,7 @@ intel_get_tile_masks(stencil_mt->tiling, stencil_mt->tr_mode, stencil_mt->cpp, - false, &stencil_tile_mask_x, + &stencil_tile_mask_x, &stencil_tile_mask_y); tile_mask_x |= stencil_tile_mask_x; @@ -451,14 +451,12 @@ brw->depthstencil.depth_offset = intel_miptree_get_aligned_offset(depth_mt, depth_irb->draw_x & ~tile_mask_x, - depth_irb->draw_y & ~tile_mask_y, - false); + depth_irb->draw_y & ~tile_mask_y); if (intel_renderbuffer_has_hiz(depth_irb)) { brw->depthstencil.hiz_offset = intel_miptree_get_aligned_offset(depth_mt, depth_irb->draw_x & ~tile_mask_x, - (depth_irb->draw_y & ~tile_mask_y) / 2, - false); + (depth_irb->draw_y & ~tile_mask_y) / 2); } } if (stencil_irb) { @@ -795,37 +793,6 @@ }; /** - * AA Line parameters - */ -static void -upload_aa_line_parameters(struct brw_context *brw) -{ - struct gl_context *ctx = &brw->ctx; - - if (!ctx->Line.SmoothFlag) - return; - - /* Original Gen4 doesn't have 3DSTATE_AA_LINE_PARAMETERS. */ - if (brw->gen == 4 && !brw->is_g4x) - return; - - BEGIN_BATCH(3); - OUT_BATCH(_3DSTATE_AA_LINE_PARAMETERS << 16 | (3 - 2)); - /* use legacy aa line coverage computation */ - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - -const struct brw_tracked_state brw_aa_line_parameters = { - .dirty = { - .mesa = _NEW_LINE, - .brw = BRW_NEW_CONTEXT, - }, - .emit = upload_aa_line_parameters -}; - -/** * Line stipple packet */ static void @@ -910,8 +877,9 @@ brw->ctx.NewDriverState |= BRW_NEW_CC_STATE; } + } - } else if (brw->gen >= 6) { + if (brw->gen >= 6) { /* From "BXML » GT » MI » vol1a GPU Overview » [Instruction] * PIPELINE_SELECT [DevBWR+]": * @@ -925,15 +893,6 @@ const unsigned dc_flush = brw->gen >= 7 ? PIPE_CONTROL_DATA_CACHE_FLUSH : 0; - if (brw->gen == 6) { - /* Hardware workaround: SNB B-Spec says: - * - * Before a PIPE_CONTROL with Write Cache Flush Enable = 1, a - * PIPE_CONTROL with any non-zero post-sync-op is required. - */ - brw_emit_post_sync_nonzero_flush(brw); - } - brw_emit_pipe_control_flush(brw, PIPE_CONTROL_RENDER_TARGET_FLUSH | PIPE_CONTROL_DEPTH_CACHE_FLUSH | @@ -1037,6 +996,16 @@ OUT_BATCH(0); ADVANCE_BATCH(); } + + /* Original Gen4 doesn't have 3DSTATE_AA_LINE_PARAMETERS. */ + if (!is_965) { + BEGIN_BATCH(3); + OUT_BATCH(_3DSTATE_AA_LINE_PARAMETERS << 16 | (3 - 2)); + /* use legacy aa line coverage computation */ + OUT_BATCH(0); + OUT_BATCH(0); + ADVANCE_BATCH(); + } const uint32_t _3DSTATE_VF_STATISTICS = is_965 ? GEN4_3DSTATE_VF_STATISTICS : GM45_3DSTATE_VF_STATISTICS; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_multisample_state.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_multisample_state.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_multisample_state.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_multisample_state.h 2017-06-01 10:37:10.000000000 +0000 @@ -24,6 +24,15 @@ #include /** + * Note: There are no standard multisample positions defined in OpenGL + * specifications. Implementations have the freedom to pick the positions + * which give plausible results. But the Vulkan specification does define + * standard sample positions. So, we decided to pick the same pattern in + * OpenGL as in Vulkan to keep it uniform across drivers and also to avoid + * breaking applications which rely on this standard pattern. + */ + +/** * 1x MSAA has a single sample at the center: (0.5, 0.5) -> (0x8, 0x8). * * 2x MSAA sample positions are (0.25, 0.25) and (0.75, 0.75): @@ -46,22 +55,10 @@ brw_multisample_positions_4x = 0xae2ae662; /** - * Sample positions are based on a solution to the "8 queens" puzzle. - * Rationale: in a solution to the 8 queens puzzle, no two queens share - * a row, column, or diagonal. This is a desirable property for samples - * in a multisampling pattern, because it ensures that the samples are - * relatively uniformly distributed through the pixel. - * - * There are several solutions to the 8 queens puzzle (see - * http://en.wikipedia.org/wiki/Eight_queens_puzzle). This solution was - * chosen because it has a queen close to the center; this should - * improve the accuracy of centroid interpolation, since the hardware - * implements centroid interpolation by choosing the centermost sample - * that overlaps with the primitive being drawn. + * Sample positions: * - * Note: from the Ivy Bridge PRM, Vol2 Part1 p304 (3DSTATE_MULTISAMPLE: + * From the Ivy Bridge PRM, Vol2 Part1 p304 (3DSTATE_MULTISAMPLE: * Programming Notes): - * * "When programming the sample offsets (for NUMSAMPLES_4 or _8 and * MSRASTMODE_xxx_PATTERN), the order of the samples 0 to 3 (or 7 * for 8X) must have monotonically increasing distance from the @@ -70,17 +67,17 @@ * * Sample positions: * 1 3 5 7 9 b d f - * 1 5 - * 3 2 - * 5 6 - * 7 4 - * 9 0 - * b 3 - * d 1 - * f 7 + * 1 7 + * 3 3 + * 5 0 + * 7 5 + * 9 2 + * b 1 + * d 4 + * f 6 */ static const uint32_t -brw_multisample_positions_8x[] = { 0xdbb39d79, 0x3ff55117 }; +brw_multisample_positions_8x[] = { 0x53d97b95, 0xf1bf173d }; /** * Sample positions: diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_nir.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_nir.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_nir.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_nir.c 2017-06-01 10:37:10.000000000 +0000 @@ -30,7 +30,8 @@ is_input(nir_intrinsic_instr *intrin) { return intrin->intrinsic == nir_intrinsic_load_input || - intrin->intrinsic == nir_intrinsic_load_per_vertex_input; + intrin->intrinsic == nir_intrinsic_load_per_vertex_input || + intrin->intrinsic == nir_intrinsic_load_interpolated_input; } static bool @@ -95,7 +96,7 @@ } static bool -remap_vs_attrs(nir_block *block, struct nir_shader_info *nir_info) +remap_vs_attrs(nir_block *block, shader_info *nir_info) { nir_foreach_instr(instr, block) { if (instr->type != nir_instr_type_intrinsic) @@ -112,9 +113,7 @@ int attr = intrin->const_index[0]; int slot = _mesa_bitcount_64(nir_info->inputs_read & BITFIELD64_MASK(attr)); - int dslot = _mesa_bitcount_64(nir_info->double_inputs_read & - BITFIELD64_MASK(attr)); - intrin->const_index[0] = 4 * (slot + dslot); + intrin->const_index[0] = 4 * slot; } } return true; @@ -140,9 +139,68 @@ } static bool +remap_tess_levels(nir_builder *b, nir_intrinsic_instr *intr, + GLenum primitive_mode) +{ + const int location = nir_intrinsic_base(intr); + const unsigned component = nir_intrinsic_component(intr); + bool out_of_bounds; + + if (location == VARYING_SLOT_TESS_LEVEL_INNER) { + switch (primitive_mode) { + case GL_QUADS: + /* gl_TessLevelInner[0..1] lives at DWords 3-2 (reversed). */ + nir_intrinsic_set_base(intr, 0); + nir_intrinsic_set_component(intr, 3 - component); + out_of_bounds = false; + break; + case GL_TRIANGLES: + /* gl_TessLevelInner[0] lives at DWord 4. */ + nir_intrinsic_set_base(intr, 1); + out_of_bounds = component > 0; + break; + case GL_ISOLINES: + out_of_bounds = true; + break; + default: + unreachable("Bogus tessellation domain"); + } + } else if (location == VARYING_SLOT_TESS_LEVEL_OUTER) { + if (primitive_mode == GL_ISOLINES) { + /* gl_TessLevelOuter[0..1] lives at DWords 6-7 (in order). */ + nir_intrinsic_set_base(intr, 1); + nir_intrinsic_set_component(intr, 2 + nir_intrinsic_component(intr)); + out_of_bounds = component > 1; + } else { + /* Triangles use DWords 7-5 (reversed); Quads use 7-4 (reversed) */ + nir_intrinsic_set_base(intr, 1); + nir_intrinsic_set_component(intr, 3 - nir_intrinsic_component(intr)); + out_of_bounds = component == 3 && primitive_mode == GL_TRIANGLES; + } + } else { + return false; + } + + if (out_of_bounds) { + if (nir_intrinsic_infos[intr->intrinsic].has_dest) { + b->cursor = nir_before_instr(&intr->instr); + nir_ssa_def *undef = nir_ssa_undef(b, 1, 32); + nir_ssa_def_rewrite_uses(&intr->dest.ssa, nir_src_for_ssa(undef)); + } + nir_instr_remove(&intr->instr); + } + + return true; +} + +static bool remap_patch_urb_offsets(nir_block *block, nir_builder *b, - const struct brw_vue_map *vue_map) + const struct brw_vue_map *vue_map, + GLenum tes_primitive_mode) { + const bool is_passthrough_tcs = b->shader->info->name && + strcmp(b->shader->info->name, "passthrough") == 0; + nir_foreach_instr_safe(instr, block) { if (instr->type != nir_instr_type_intrinsic) continue; @@ -153,6 +211,11 @@ if ((stage == MESA_SHADER_TESS_CTRL && is_output(intrin)) || (stage == MESA_SHADER_TESS_EVAL && is_input(intrin))) { + + if (!is_passthrough_tcs && + remap_tess_levels(b, intrin, tes_primitive_mode)) + continue; + int vue_slot = vue_map->varying_to_slot[intrin->const_index[0]]; assert(vue_slot != -1); intrin->const_index[0] = vue_slot; @@ -190,7 +253,6 @@ void brw_nir_lower_vs_inputs(nir_shader *nir, - const struct brw_device_info *devinfo, bool is_scalar, bool use_legacy_snorm_formula, const uint8_t *vs_attrib_wa_flags) @@ -204,7 +266,7 @@ * loaded as one vec4 or dvec4 per element (or matrix column), depending on * whether it is a double-precision type or not. */ - nir_lower_io(nir, nir_var_shader_in, type_size_vs_input); + nir_lower_io(nir, nir_var_shader_in, type_size_vec4, 0); /* This pass needs actual constants */ nir_opt_constant_folding(nir); @@ -220,7 +282,7 @@ nir_foreach_function(function, nir) { if (function->impl) { nir_foreach_block(block, function->impl) { - remap_vs_attrs(block, &nir->info); + remap_vs_attrs(block, nir->info); } } } @@ -236,7 +298,7 @@ } /* Inputs are stored in vec4 slots, so use type_size_vec4(). */ - nir_lower_io(nir, nir_var_shader_in, type_size_vec4); + nir_lower_io(nir, nir_var_shader_in, type_size_vec4, 0); if (is_scalar || nir->stage != MESA_SHADER_GEOMETRY) { /* This pass needs actual constants */ @@ -261,7 +323,7 @@ var->data.driver_location = var->data.location; } - nir_lower_io(nir, nir_var_shader_in, type_size_vec4); + nir_lower_io(nir, nir_var_shader_in, type_size_vec4, 0); /* This pass needs actual constants */ nir_opt_constant_folding(nir); @@ -273,42 +335,77 @@ nir_builder b; nir_builder_init(&b, function->impl); nir_foreach_block(block, function->impl) { - remap_patch_urb_offsets(block, &b, vue_map); + remap_patch_urb_offsets(block, &b, vue_map, + nir->info->tess.primitive_mode); } } } } void -brw_nir_lower_fs_inputs(nir_shader *nir) +brw_nir_lower_fs_inputs(nir_shader *nir, + const struct gen_device_info *devinfo, + const struct brw_wm_prog_key *key) { - nir_assign_var_locations(&nir->inputs, &nir->num_inputs, type_size_scalar); - nir_lower_io(nir, nir_var_shader_in, type_size_scalar); + foreach_list_typed(nir_variable, var, node, &nir->inputs) { + var->data.driver_location = var->data.location; + + /* Apply default interpolation mode. + * + * Everything defaults to smooth except for the legacy GL color + * built-in variables, which might be flat depending on API state. + */ + if (var->data.interpolation == INTERP_MODE_NONE) { + const bool flat = key->flat_shade && + (var->data.location == VARYING_SLOT_COL0 || + var->data.location == VARYING_SLOT_COL1); + + var->data.interpolation = flat ? INTERP_MODE_FLAT + : INTERP_MODE_SMOOTH; + } + + /* On Ironlake and below, there is only one interpolation mode. + * Centroid interpolation doesn't mean anything on this hardware -- + * there is no multisampling. + */ + if (devinfo->gen < 6) { + var->data.centroid = false; + var->data.sample = false; + } + } + + nir_lower_io_options lower_io_options = 0; + if (key->persample_interp) + lower_io_options |= nir_lower_io_force_sample_interpolation; + + nir_lower_io(nir, nir_var_shader_in, type_size_vec4, lower_io_options); + + /* This pass needs actual constants */ + nir_opt_constant_folding(nir); + + add_const_offset_to_base(nir, nir_var_shader_in); } void brw_nir_lower_vue_outputs(nir_shader *nir, bool is_scalar) { - if (is_scalar) { - nir_assign_var_locations(&nir->outputs, &nir->num_outputs, - type_size_vec4_times_4); - nir_lower_io(nir, nir_var_shader_out, type_size_vec4_times_4); - } else { - nir_foreach_variable(var, &nir->outputs) - var->data.driver_location = var->data.location; - nir_lower_io(nir, nir_var_shader_out, type_size_vec4); + nir_foreach_variable(var, &nir->outputs) { + var->data.driver_location = var->data.location; } + + nir_lower_io(nir, nir_var_shader_out, type_size_vec4, 0); } void -brw_nir_lower_tcs_outputs(nir_shader *nir, const struct brw_vue_map *vue_map) +brw_nir_lower_tcs_outputs(nir_shader *nir, const struct brw_vue_map *vue_map, + GLenum tes_primitive_mode) { nir_foreach_variable(var, &nir->outputs) { var->data.driver_location = var->data.location; } - nir_lower_io(nir, nir_var_shader_out, type_size_vec4); + nir_lower_io(nir, nir_var_shader_out, type_size_vec4, 0); /* This pass needs actual constants */ nir_opt_constant_folding(nir); @@ -320,7 +417,7 @@ nir_builder b; nir_builder_init(&b, function->impl); nir_foreach_block(block, function->impl) { - remap_patch_urb_offsets(block, &b, vue_map); + remap_patch_urb_offsets(block, &b, vue_map, tes_primitive_mode); } } } @@ -329,9 +426,13 @@ void brw_nir_lower_fs_outputs(nir_shader *nir) { - nir_assign_var_locations(&nir->outputs, &nir->num_outputs, - type_size_scalar); - nir_lower_io(nir, nir_var_shader_out, type_size_scalar); + nir_foreach_variable(var, &nir->outputs) { + var->data.driver_location = + SET_FIELD(var->data.index, BRW_NIR_FRAG_OUTPUT_INDEX) | + SET_FIELD(var->data.location, BRW_NIR_FRAG_OUTPUT_LOCATION); + } + + nir_lower_io(nir, nir_var_shader_out, type_size_dvec4, 0); } void @@ -339,7 +440,7 @@ { nir_assign_var_locations(&nir->shared, &nir->num_shared, type_size_scalar_bytes); - nir_lower_io(nir, nir_var_shared, type_size_scalar_bytes); + nir_lower_io(nir, nir_var_shared, type_size_scalar_bytes, 0); } #define OPT(pass, ...) ({ \ @@ -353,30 +454,52 @@ #define OPT_V(pass, ...) NIR_PASS_V(nir, pass, ##__VA_ARGS__) static nir_shader * -nir_optimize(nir_shader *nir, bool is_scalar) +nir_optimize(nir_shader *nir, const struct brw_compiler *compiler, + bool is_scalar) { + nir_variable_mode indirect_mask = 0; + if (compiler->glsl_compiler_options[nir->stage].EmitNoIndirectInput) + indirect_mask |= nir_var_shader_in; + if (compiler->glsl_compiler_options[nir->stage].EmitNoIndirectOutput) + indirect_mask |= nir_var_shader_out; + if (compiler->glsl_compiler_options[nir->stage].EmitNoIndirectTemp) + indirect_mask |= nir_var_local; + bool progress; do { progress = false; OPT_V(nir_lower_vars_to_ssa); + OPT(nir_opt_copy_prop_vars); if (is_scalar) { - OPT_V(nir_lower_alu_to_scalar); + OPT(nir_lower_alu_to_scalar); } OPT(nir_copy_prop); if (is_scalar) { - OPT_V(nir_lower_phis_to_scalar); + OPT(nir_lower_phis_to_scalar); } OPT(nir_copy_prop); OPT(nir_opt_dce); OPT(nir_opt_cse); - OPT(nir_opt_peephole_select); + OPT(nir_opt_peephole_select, 0); OPT(nir_opt_algebraic); OPT(nir_opt_constant_folding); OPT(nir_opt_dead_cf); + if (OPT(nir_opt_trivial_continues)) { + /* If nir_opt_trivial_continues makes progress, then we need to clean + * things up if we want any hope of nir_opt_if or nir_opt_loop_unroll + * to make progress. + */ + OPT(nir_copy_prop); + OPT(nir_opt_dce); + } + OPT(nir_opt_if); + if (nir->options->max_unroll_iterations != 0) { + OPT(nir_opt_loop_unroll, indirect_mask); + } OPT(nir_opt_remove_phis); OPT(nir_opt_undef); OPT_V(nir_lower_doubles, nir_lower_drcp | @@ -406,6 +529,7 @@ nir_shader * brw_preprocess_nir(const struct brw_compiler *compiler, nir_shader *nir) { + const struct gen_device_info *devinfo = compiler->devinfo; bool progress; /* Written by OPT and OPT_V */ (void)progress; @@ -414,13 +538,16 @@ if (nir->stage == MESA_SHADER_GEOMETRY) OPT(nir_lower_gs_intrinsics); - if (compiler->precise_trig) + /* See also brw_nir_trig_workarounds.py */ + if (compiler->precise_trig && + !(devinfo->gen >= 10 || devinfo->is_kabylake)) OPT(brw_nir_apply_trig_workarounds); static const nir_lower_tex_options tex_options = { .lower_txp = ~0, .lower_txf_offset = true, .lower_rect_offset = true, + .lower_txd_cube_map = true, }; OPT(nir_lower_tex, &tex_options); @@ -430,7 +557,7 @@ OPT(nir_split_var_copies); - nir = nir_optimize(nir, is_scalar); + nir = nir_optimize(nir, compiler, is_scalar); if (is_scalar) { OPT_V(nir_lower_load_const_to_scalar); @@ -439,8 +566,20 @@ /* Lower a bunch of stuff */ OPT_V(nir_lower_var_copies); + OPT_V(nir_lower_clip_cull_distance_arrays); + + nir_variable_mode indirect_mask = 0; + if (compiler->glsl_compiler_options[nir->stage].EmitNoIndirectInput) + indirect_mask |= nir_var_shader_in; + if (compiler->glsl_compiler_options[nir->stage].EmitNoIndirectOutput) + indirect_mask |= nir_var_shader_out; + if (compiler->glsl_compiler_options[nir->stage].EmitNoIndirectTemp) + indirect_mask |= nir_var_local; + + nir_lower_indirect_derefs(nir, indirect_mask); + /* Get rid of split copies */ - nir = nir_optimize(nir, is_scalar); + nir = nir_optimize(nir, compiler, is_scalar); OPT(nir_remove_dead_variables, nir_var_local); @@ -455,17 +594,17 @@ * will not work. */ nir_shader * -brw_postprocess_nir(nir_shader *nir, - const struct brw_device_info *devinfo, +brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler, bool is_scalar) { + const struct gen_device_info *devinfo = compiler->devinfo; bool debug_enabled = (INTEL_DEBUG & intel_debug_flag_for_shader_stage(nir->stage)); bool progress; /* Written by OPT and OPT_V */ (void)progress; - nir = nir_optimize(nir, is_scalar); + nir = nir_optimize(nir, compiler, is_scalar); if (devinfo->gen >= 6) { /* Try and fuse multiply-adds */ @@ -474,11 +613,12 @@ OPT(nir_opt_algebraic_late); - OPT(nir_lower_locals_to_regs); - OPT_V(nir_lower_to_source_mods); OPT(nir_copy_prop); OPT(nir_opt_dce); + OPT(nir_opt_move_comparisons); + + OPT(nir_lower_locals_to_regs); if (unlikely(debug_enabled)) { /* Re-index SSA defs so we print more sensible numbers. */ @@ -520,10 +660,11 @@ nir_shader * brw_nir_apply_sampler_key(nir_shader *nir, - const struct brw_device_info *devinfo, + const struct brw_compiler *compiler, const struct brw_sampler_prog_key_data *key_tex, bool is_scalar) { + const struct gen_device_info *devinfo = compiler->devinfo; nir_lower_tex_options tex_options = { 0 }; /* Iron Lake and prior require lowering of all rectangle textures */ @@ -547,13 +688,16 @@ tex_options.swizzles[s][c] = GET_SWZ(key_tex->swizzles[s], c); } + /* Prior to Haswell, we have to lower gradients on shadow samplers */ + tex_options.lower_txd_shadow = devinfo->gen < 8 && !devinfo->is_haswell; + tex_options.lower_y_uv_external = key_tex->y_uv_image_mask; tex_options.lower_y_u_v_external = key_tex->y_u_v_image_mask; tex_options.lower_yx_xuxv_external = key_tex->yx_xuxv_image_mask; if (nir_lower_tex(nir, &tex_options)) { nir_validate_shader(nir); - nir = nir_optimize(nir, is_scalar); + nir = nir_optimize(nir, compiler, is_scalar); } return nir; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_nir.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_nir.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_nir.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_nir.h 2017-06-01 10:37:10.000000000 +0000 @@ -23,15 +23,18 @@ #pragma once -#include "brw_context.h" #include "brw_reg.h" -#include "brw_shader.h" #include "compiler/nir/nir.h" +#include "brw_compiler.h" #ifdef __cplusplus extern "C" { #endif +int type_size_scalar(const struct glsl_type *type); +int type_size_vec4(const struct glsl_type *type); +int type_size_dvec4(const struct glsl_type *type); + static inline int type_size_scalar_bytes(const struct glsl_type *type) { @@ -94,21 +97,23 @@ bool brw_nir_lower_intrinsics(nir_shader *nir, struct brw_stage_prog_data *prog_data); void brw_nir_lower_vs_inputs(nir_shader *nir, - const struct brw_device_info *devinfo, bool is_scalar, bool use_legacy_snorm_formula, const uint8_t *vs_attrib_wa_flags); void brw_nir_lower_vue_inputs(nir_shader *nir, bool is_scalar, const struct brw_vue_map *vue_map); void brw_nir_lower_tes_inputs(nir_shader *nir, const struct brw_vue_map *vue); -void brw_nir_lower_fs_inputs(nir_shader *nir); +void brw_nir_lower_fs_inputs(nir_shader *nir, + const struct gen_device_info *devinfo, + const struct brw_wm_prog_key *key); void brw_nir_lower_vue_outputs(nir_shader *nir, bool is_scalar); -void brw_nir_lower_tcs_outputs(nir_shader *nir, const struct brw_vue_map *vue); +void brw_nir_lower_tcs_outputs(nir_shader *nir, const struct brw_vue_map *vue, + GLenum tes_primitive_mode); void brw_nir_lower_fs_outputs(nir_shader *nir); void brw_nir_lower_cs_shared(nir_shader *nir); nir_shader *brw_postprocess_nir(nir_shader *nir, - const struct brw_device_info *devinfo, + const struct brw_compiler *compiler, bool is_scalar); bool brw_nir_apply_attribute_workarounds(nir_shader *nir, @@ -120,7 +125,7 @@ void brw_nir_apply_tcs_quads_workaround(nir_shader *nir); nir_shader *brw_nir_apply_sampler_key(nir_shader *nir, - const struct brw_device_info *devinfo, + const struct brw_compiler *compiler, const struct brw_sampler_prog_key_data *key, bool is_scalar); @@ -129,7 +134,6 @@ enum glsl_base_type brw_glsl_base_type_for_nir_type(nir_alu_type type); void brw_nir_setup_glsl_uniforms(nir_shader *shader, - struct gl_shader_program *shader_prog, const struct gl_program *prog, struct brw_stage_prog_data *stage_prog_data, bool is_scalar); @@ -139,6 +143,11 @@ bool brw_nir_opt_peephole_ffma(nir_shader *shader); +#define BRW_NIR_FRAG_OUTPUT_INDEX_SHIFT 0 +#define BRW_NIR_FRAG_OUTPUT_INDEX_MASK INTEL_MASK(0, 0) +#define BRW_NIR_FRAG_OUTPUT_LOCATION_SHIFT 1 +#define BRW_NIR_FRAG_OUTPUT_LOCATION_MASK INTEL_MASK(31, 1) + #ifdef __cplusplus } #endif diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_nir_intrinsics.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_nir_intrinsics.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_nir_intrinsics.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_nir_intrinsics.c 2017-06-01 10:37:10.000000000 +0000 @@ -39,12 +39,21 @@ static nir_ssa_def * read_thread_local_id(struct lower_intrinsics_state *state) { + nir_builder *b = &state->builder; + nir_shader *nir = state->nir; + const unsigned *sizes = nir->info->cs.local_size; + const unsigned group_size = sizes[0] * sizes[1] * sizes[2]; + + /* Some programs have local_size dimensions so small that the thread local + * ID will always be 0. + */ + if (group_size <= 8) + return nir_imm_int(b, 0); + assert(state->cs_prog_data->thread_local_id_index >= 0); state->cs_thread_id_used = true; const int id_index = state->cs_prog_data->thread_local_id_index; - nir_builder *b = &state->builder; - nir_shader *nir = state->nir; nir_intrinsic_instr *load = nir_intrinsic_instr_create(nir, nir_intrinsic_load_uniform); load->num_components = 1; @@ -82,8 +91,7 @@ * cs_thread_local_id + channel_num; */ nir_ssa_def *thread_local_id = read_thread_local_id(state); - nir_ssa_def *channel = - nir_load_system_value(b, nir_intrinsic_load_channel_num, 0); + nir_ssa_def *channel = nir_load_channel_num(b); sysval = nir_iadd(b, channel, thread_local_id); break; } @@ -103,10 +111,9 @@ * (gl_WorkGroupSize.x * gl_WorkGroupSize.y)) % * gl_WorkGroupSize.z; */ - unsigned *size = nir->info.cs.local_size; + unsigned *size = nir->info->cs.local_size; - nir_ssa_def *local_index = - nir_load_system_value(b, nir_intrinsic_load_local_invocation_index, 0); + nir_ssa_def *local_index = nir_load_local_invocation_index(b); nir_const_value uvec3; uvec3.u32[0] = 1; @@ -118,7 +125,7 @@ uvec3.u32[2] = size[2]; nir_ssa_def *mod_val = nir_build_imm(b, 3, 32, uvec3); - sysval = nir_imod(b, nir_idiv(b, local_index, div_val), mod_val); + sysval = nir_umod(b, nir_udiv(b, local_index, div_val), mod_val); break; } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_nir_opt_peephole_ffma.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_nir_opt_peephole_ffma.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_nir_opt_peephole_ffma.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_nir_opt_peephole_ffma.c 2017-06-01 10:37:10.000000000 +0000 @@ -26,18 +26,13 @@ */ #include "brw_nir.h" +#include "compiler/nir/nir_builder.h" /* * Implements a small peephole optimization that looks for a multiply that * is only ever used in an add and replaces both with an fma. */ -struct peephole_ffma_state { - void *mem_ctx; - nir_function_impl *impl; - bool progress; -}; - static inline bool are_all_uses_fadd(nir_ssa_def *def) { @@ -113,7 +108,7 @@ break; case nir_op_fmul: - /* Only absorb a fmul into a ffma if the fmul is is only used in fadd + /* Only absorb a fmul into a ffma if the fmul is only used in fadd * operations. This prevents us from being too aggressive with our * fusing which can actually lead to more instructions. */ @@ -167,7 +162,7 @@ } static bool -brw_nir_opt_peephole_ffma_block(nir_block *block, void *mem_ctx) +brw_nir_opt_peephole_ffma_block(nir_builder *b, nir_block *block) { bool progress = false; @@ -229,29 +224,17 @@ continue; } + b->cursor = nir_before_instr(&add->instr); + if (abs) { - for (unsigned i = 0; i < 2; i++) { - nir_alu_instr *abs = nir_alu_instr_create(mem_ctx, nir_op_fabs); - abs->src[0].src = nir_src_for_ssa(mul_src[i]); - nir_ssa_dest_init(&abs->instr, &abs->dest.dest, - mul_src[i]->num_components, bit_size, NULL); - abs->dest.write_mask = (1 << mul_src[i]->num_components) - 1; - nir_instr_insert_before(&add->instr, &abs->instr); - mul_src[i] = &abs->dest.dest.ssa; - } + for (unsigned i = 0; i < 2; i++) + mul_src[i] = nir_fabs(b, mul_src[i]); } - if (negate) { - nir_alu_instr *neg = nir_alu_instr_create(mem_ctx, nir_op_fneg); - neg->src[0].src = nir_src_for_ssa(mul_src[0]); - nir_ssa_dest_init(&neg->instr, &neg->dest.dest, - mul_src[0]->num_components, bit_size, NULL); - neg->dest.write_mask = (1 << mul_src[0]->num_components) - 1; - nir_instr_insert_before(&add->instr, &neg->instr); - mul_src[0] = &neg->dest.dest.ssa; - } + if (negate) + mul_src[0] = nir_fneg(b, mul_src[0]); - nir_alu_instr *ffma = nir_alu_instr_create(mem_ctx, nir_op_ffma); + nir_alu_instr *ffma = nir_alu_instr_create(b->shader, nir_op_ffma); ffma->dest.saturate = add->dest.saturate; ffma->dest.write_mask = add->dest.write_mask; @@ -271,7 +254,7 @@ nir_ssa_def_rewrite_uses(&add->dest.dest.ssa, nir_src_for_ssa(&ffma->dest.dest.ssa)); - nir_instr_insert_before(&add->instr, &ffma->instr); + nir_builder_instr_insert(b, &ffma->instr); assert(list_empty(&add->dest.dest.ssa.uses)); nir_instr_remove(&add->instr); @@ -285,10 +268,12 @@ brw_nir_opt_peephole_ffma_impl(nir_function_impl *impl) { bool progress = false; - void *mem_ctx = ralloc_parent(impl); + + nir_builder builder; + nir_builder_init(&builder, impl); nir_foreach_block(block, impl) { - progress |= brw_nir_opt_peephole_ffma_block(block, mem_ctx); + progress |= brw_nir_opt_peephole_ffma_block(&builder, block); } if (progress) diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_nir_tcs_workarounds.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_nir_tcs_workarounds.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_nir_tcs_workarounds.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_nir_tcs_workarounds.c 2017-06-01 10:37:10.000000000 +0000 @@ -73,7 +73,7 @@ */ static inline nir_ssa_def * -load_output(nir_builder *b, int num_components, int offset) +load_output(nir_builder *b, int num_components, int offset, int component) { nir_intrinsic_instr *load = nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_output); @@ -81,38 +81,20 @@ load->num_components = num_components; load->src[0] = nir_src_for_ssa(nir_imm_int(b, 0)); nir_intrinsic_set_base(load, offset); + nir_intrinsic_set_component(load, component); nir_builder_instr_insert(b, &load->instr); return &load->dest.ssa; } -static inline void -store_output(nir_builder *b, nir_ssa_def *value, int offset, unsigned comps) -{ - nir_intrinsic_instr *store = - nir_intrinsic_instr_create(b->shader, nir_intrinsic_store_output); - store->num_components = comps; - nir_intrinsic_set_write_mask(store, (1u << comps) - 1); - store->src[0] = nir_src_for_ssa(value); - store->src[1] = nir_src_for_ssa(nir_imm_int(b, 0)); - nir_builder_instr_insert(b, &store->instr); -} - static void emit_quads_workaround(nir_builder *b, nir_block *block) { - /* We're going to insert a new if-statement in a predecessor of the end - * block. This would normally create a new block (after the if) which - * would then become the predecessor of the end block, causing our set - * walking to get screwed up. To avoid this, just emit a constant at - * the end of our current block, and insert the if before that. - */ b->cursor = nir_after_block_before_jump(block); - b->cursor = nir_before_instr(nir_imm_int(b, 0)->parent_instr); - nir_ssa_def *inner = load_output(b, 2, 0); - nir_ssa_def *outer = load_output(b, 4, 1); + nir_ssa_def *inner = load_output(b, 2, 0, 2); + nir_ssa_def *outer = load_output(b, 4, 1, 0); nir_ssa_def *any_greater_than_1 = nir_ior(b, nir_bany(b, nir_flt(b, nir_imm_float(b, 1.0f), outer)), @@ -125,8 +107,17 @@ /* Fill out the new then-block */ b->cursor = nir_after_cf_list(&if_stmt->then_list); - store_output(b, nir_bcsel(b, nir_fge(b, nir_imm_float(b, 1.0f), inner), - nir_imm_float(b, 2.0f), inner), 0, 2); + inner = nir_bcsel(b, nir_fge(b, nir_imm_float(b, 1.0f), inner), + nir_imm_float(b, 2.0f), inner); + + nir_intrinsic_instr *store = + nir_intrinsic_instr_create(b->shader, nir_intrinsic_store_output); + store->num_components = 2; + nir_intrinsic_set_write_mask(store, WRITEMASK_XY); + nir_intrinsic_set_component(store, 2); + store->src[0] = nir_src_for_ssa(inner); + store->src[1] = nir_src_for_ssa(nir_imm_int(b, 0)); + nir_builder_instr_insert(b, &store->instr); } void @@ -134,19 +125,28 @@ { assert(nir->stage == MESA_SHADER_TESS_CTRL); - nir_foreach_function(func, nir) { - if (!func->impl) - continue; - - nir_builder b; - nir_builder_init(&b, func->impl); - - struct set_entry *entry; - set_foreach(func->impl->end_block->predecessors, entry) { - nir_block *pred = (nir_block *) entry->key; - emit_quads_workaround(&b, pred); - } + nir_function_impl *impl = nir_shader_get_entrypoint(nir); - nir_metadata_preserve(func->impl, 0); + nir_builder b; + nir_builder_init(&b, impl); + + /* emit_quads_workaround() inserts an if statement into each block, + * which splits it in two. This changes the set of predecessors of + * the end block. We want to process the original set, so to be safe, + * save it off to an array first. + */ + const unsigned num_end_preds = impl->end_block->predecessors->entries; + nir_block *end_preds[num_end_preds]; + unsigned i = 0; + struct set_entry *entry; + + set_foreach(impl->end_block->predecessors, entry) { + end_preds[i++] = (nir_block *) entry->key; + } + + for (i = 0; i < num_end_preds; i++) { + emit_quads_workaround(&b, end_preds[i]); } + + nir_metadata_preserve(impl, 0); } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_nir_trig_workarounds.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_nir_trig_workarounds.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_nir_trig_workarounds.c 2017-01-24 01:43:24.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_nir_trig_workarounds.c 2017-06-01 10:38:05.000000000 +0000 @@ -15,82 +15,104 @@ #endif +#include "compiler/nir/nir_search_helpers.h" static const nir_search_variable search1_0 = { { nir_search_value_variable, 0 }, 0, /* x */ false, nir_type_invalid, + NULL, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_expression search1 = { { nir_search_value_expression, 0 }, false, nir_op_fcos, { &search1_0.value }, + NULL, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_variable replace1_0_0 = { { nir_search_value_variable, 0 }, 0, /* x */ false, nir_type_invalid, + NULL, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_expression replace1_0 = { { nir_search_value_expression, 0 }, false, nir_op_fcos, { &replace1_0_0.value }, + NULL, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_constant replace1_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x3fefffc115df6556 /* 0.99997 */ }, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_expression replace1 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, { &replace1_0.value, &replace1_1.value }, + NULL, }; static const struct transform brw_nir_apply_trig_workarounds_fcos_xforms[] = { { &search1, &replace1.value, 0 }, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_variable search0_0 = { { nir_search_value_variable, 0 }, 0, /* x */ false, nir_type_invalid, + NULL, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_expression search0 = { { nir_search_value_expression, 0 }, false, nir_op_fsin, { &search0_0.value }, + NULL, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_variable replace0_0_0 = { { nir_search_value_variable, 0 }, 0, /* x */ false, nir_type_invalid, + NULL, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_expression replace0_0 = { { nir_search_value_expression, 0 }, false, nir_op_fsin, { &replace0_0_0.value }, + NULL, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_constant replace0_1 = { { nir_search_value_constant, 0 }, nir_type_float, { 0x3fefffc115df6556 /* 0.99997 */ }, }; +#include "compiler/nir/nir_search_helpers.h" static const nir_search_expression replace0 = { { nir_search_value_expression, 0 }, false, nir_op_fmul, { &replace0_0.value, &replace0_1.value }, + NULL, }; static const struct transform brw_nir_apply_trig_workarounds_fsin_xforms[] = { diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_nir_trig_workarounds.py mesa-17.0.7/src/mesa/drivers/dri/i965/brw_nir_trig_workarounds.py --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_nir_trig_workarounds.py 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_nir_trig_workarounds.py 2017-06-01 10:37:10.000000000 +0000 @@ -23,9 +23,10 @@ import nir_algebraic -# The SIN and COS instructions on Intel hardware can produce values -# slightly outside of the [-1.0, 1.0] range for a small set of values. -# Obviously, this can break everyone's expectations about trig functions. +# Prior to Kaby Lake, The SIN and COS instructions on Intel hardware can +# produce values slightly outside of the [-1.0, 1.0] range for a small set of +# values. Obviously, this can break everyone's expectations about trig +# functions. This appears to be fixed in Kaby Lake. # # According to an internal presentation, the COS instruction can produce # a value up to 1.000027 for inputs in the range (0.08296, 0.09888). One diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -68,7 +68,7 @@ static void brw_nir_setup_glsl_uniform(gl_shader_stage stage, nir_variable *var, - struct gl_shader_program *shader_prog, + const struct gl_program *prog, struct brw_stage_prog_data *stage_prog_data, bool is_scalar) { @@ -81,8 +81,9 @@ * with our name, or the prefix of a component that starts with our name. */ unsigned uniform_index = var->data.driver_location / 4; - for (unsigned u = 0; u < shader_prog->NumUniformStorage; u++) { - struct gl_uniform_storage *storage = &shader_prog->UniformStorage[u]; + for (unsigned u = 0; u < prog->sh.data->NumUniformStorage; u++) { + struct gl_uniform_storage *storage = + &prog->sh.data->UniformStorage[u]; if (storage->builtin) continue; @@ -107,7 +108,8 @@ unsigned max_vector_size = 4; if (storage->type->base_type == GLSL_TYPE_DOUBLE) { vector_size *= 2; - max_vector_size *= 2; + if (vector_size > 4) + max_vector_size = 8; } for (unsigned s = 0; s < vector_count; s++) { @@ -129,9 +131,7 @@ } void -brw_nir_setup_glsl_uniforms(nir_shader *shader, - struct gl_shader_program *shader_prog, - const struct gl_program *prog, +brw_nir_setup_glsl_uniforms(nir_shader *shader, const struct gl_program *prog, struct brw_stage_prog_data *stage_prog_data, bool is_scalar) { @@ -145,8 +145,8 @@ brw_nir_setup_glsl_builtin_uniform(var, prog, stage_prog_data, is_scalar); } else { - brw_nir_setup_glsl_uniform(shader->stage, var, shader_prog, - stage_prog_data, is_scalar); + brw_nir_setup_glsl_uniform(shader->stage, var, prog, stage_prog_data, + is_scalar); } } } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_performance_monitor.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_performance_monitor.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_performance_monitor.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_performance_monitor.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,1471 +0,0 @@ -/* - * Copyright © 2013 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -/** - * \file brw_performance_monitor.c - * - * Implementation of the GL_AMD_performance_monitor extension. - * - * On Gen5+ hardware, we have two sources of performance counter data: - * the Observability Architecture counters (MI_REPORT_PERF_COUNT), and - * the Pipeline Statistics Registers. We expose both sets of raw data, - * as well as some useful processed values. - * - * The Observability Architecture (OA) counters for Gen6+ are documented - * in a separate document from the rest of the PRMs. It is available at: - * https://01.org/linuxgraphics/documentation/driver-documentation-prms - * => 2013 Intel Core Processor Family => Observability Performance Counters - * (This one volume covers Sandybridge, Ivybridge, Baytrail, and Haswell.) - * - * On Ironlake, the OA counters were called "CHAPS" counters. Sadly, no public - * documentation exists; our implementation is based on the source code for the - * intel_perf_counters utility (which is available as part of intel-gpu-tools). - */ - -#include - -#include "util/bitset.h" -#include "main/hash.h" -#include "main/macros.h" -#include "main/mtypes.h" -#include "main/performance_monitor.h" - -#include "util/ralloc.h" - -#include "brw_context.h" -#include "brw_defines.h" -#include "intel_batchbuffer.h" - -#define FILE_DEBUG_FLAG DEBUG_PERFMON - -/** - * i965 representation of a performance monitor object. - */ -struct brw_perf_monitor_object -{ - /** The base class. */ - struct gl_perf_monitor_object base; - - /** - * BO containing OA counter snapshots at monitor Begin/End time. - */ - drm_intel_bo *oa_bo; - - /** Indexes into bookend_bo (snapshot numbers) for various segments. */ - int oa_head_end; - int oa_middle_start; - int oa_tail_start; - - /** - * Storage for OA results accumulated so far. - * - * An array indexed by the counter ID in the OA_COUNTERS group. - * - * When we run out of space in bookend_bo, we compute the results so far - * and add them to the value stored here. Then, we can discard bookend_bo. - */ - uint32_t *oa_results; - - /** - * BO containing starting and ending snapshots for any active pipeline - * statistics counters. - */ - drm_intel_bo *pipeline_stats_bo; - - /** - * Storage for final pipeline statistics counter results. - */ - uint64_t *pipeline_stats_results; -}; - -/** Downcasting convenience macro. */ -static inline struct brw_perf_monitor_object * -brw_perf_monitor(struct gl_perf_monitor_object *m) -{ - return (struct brw_perf_monitor_object *) m; -} - -#define SECOND_SNAPSHOT_OFFSET_IN_BYTES 2048 - -/* A random value used to ensure we're getting valid snapshots. */ -#define REPORT_ID 0xd2e9c607 - -/******************************************************************************/ - -#define COUNTER(name) \ - { \ - .Name = name, \ - .Type = GL_UNSIGNED_INT, \ - .Minimum = { .u32 = 0 }, \ - .Maximum = { .u32 = ~0 }, \ - } - -#define COUNTER64(name) \ - { \ - .Name = name, \ - .Type = GL_UNSIGNED_INT64_AMD, \ - .Minimum = { .u64 = 0 }, \ - .Maximum = { .u64 = ~0 }, \ - } - -#define GROUP(name, max_active, counter_list) \ - { \ - .Name = name, \ - .MaxActiveCounters = max_active, \ - .Counters = counter_list, \ - .NumCounters = ARRAY_SIZE(counter_list), \ - } - -/** Performance Monitor Group IDs */ -enum brw_counter_groups { - OA_COUNTERS, /* Observability Architecture (MI_REPORT_PERF_COUNT) Counters */ - PIPELINE_STATS_COUNTERS, /* Pipeline Statistics Register Counters */ -}; - -/** - * Ironlake: - * @{ - * - * The list of CHAPS counters unfortunately does not appear in any public - * documentation, but is available by reading the source code for the - * intel_perf_counters utility (shipped as part of intel-gpu-tools). - */ -static const struct gl_perf_monitor_counter gen5_raw_chaps_counters[] = { - COUNTER("cycles the CS unit is starved"), - COUNTER("cycles the CS unit is stalled"), - COUNTER("cycles the VF unit is starved"), - COUNTER("cycles the VF unit is stalled"), - COUNTER("cycles the VS unit is starved"), - COUNTER("cycles the VS unit is stalled"), - COUNTER("cycles the GS unit is starved"), - COUNTER("cycles the GS unit is stalled"), - COUNTER("cycles the CL unit is starved"), - COUNTER("cycles the CL unit is stalled"), - COUNTER("cycles the SF unit is starved"), - COUNTER("cycles the SF unit is stalled"), - COUNTER("cycles the WZ unit is starved"), - COUNTER("cycles the WZ unit is stalled"), - COUNTER("Z buffer read/write"), - COUNTER("cycles each EU was active"), - COUNTER("cycles each EU was suspended"), - COUNTER("cycles threads loaded all EUs"), - COUNTER("cycles filtering active"), - COUNTER("cycles PS threads executed"), - COUNTER("subspans written to RC"), - COUNTER("bytes read for texture reads"), - COUNTER("texels returned from sampler"), - COUNTER("polygons not culled"), - COUNTER("clocks MASF has valid message"), - COUNTER("64b writes/reads from RC"), - COUNTER("reads on dataport"), - COUNTER("clocks MASF has valid msg not consumed by sampler"), - COUNTER("cycles any EU is stalled for math"), -}; - -static const int gen5_oa_snapshot_layout[] = -{ - -1, /* Report ID */ - -1, /* TIMESTAMP (64-bit) */ - -1, /* ...second half... */ - 0, /* cycles the CS unit is starved */ - 1, /* cycles the CS unit is stalled */ - 2, /* cycles the VF unit is starved */ - 3, /* cycles the VF unit is stalled */ - 4, /* cycles the VS unit is starved */ - 5, /* cycles the VS unit is stalled */ - 6, /* cycles the GS unit is starved */ - 7, /* cycles the GS unit is stalled */ - 8, /* cycles the CL unit is starved */ - 9, /* cycles the CL unit is stalled */ - 10, /* cycles the SF unit is starved */ - 11, /* cycles the SF unit is stalled */ - 12, /* cycles the WZ unit is starved */ - 13, /* cycles the WZ unit is stalled */ - 14, /* Z buffer read/write */ - 15, /* cycles each EU was active */ - 16, /* cycles each EU was suspended */ - 17, /* cycles threads loaded all EUs */ - 18, /* cycles filtering active */ - 19, /* cycles PS threads executed */ - 20, /* subspans written to RC */ - 21, /* bytes read for texture reads */ - 22, /* texels returned from sampler */ - 23, /* polygons not culled */ - 24, /* clocks MASF has valid message */ - 25, /* 64b writes/reads from RC */ - 26, /* reads on dataport */ - 27, /* clocks MASF has valid msg not consumed by sampler */ - 28, /* cycles any EU is stalled for math */ -}; - -static const struct gl_perf_monitor_group gen5_groups[] = { - [OA_COUNTERS] = GROUP("CHAPS Counters", INT_MAX, gen5_raw_chaps_counters), - /* Our pipeline statistics counter handling requires hardware contexts. */ -}; -/** @} */ - -/** - * Sandybridge: - * @{ - * - * A few of the counters here (A17-A20) are not included in the latest - * documentation, but are described in the Ironlake PRM (which strangely - * documents Sandybridge's performance counter system, not Ironlake's). - * It's unclear whether they work or not; empirically, they appear to. - */ - -/** - * Aggregating counters A0-A28: - */ -static const struct gl_perf_monitor_counter gen6_raw_oa_counters[] = { - /* A0: 0 */ COUNTER("Aggregated Core Array Active"), - /* A1: 1 */ COUNTER("Aggregated Core Array Stalled"), - /* A2: 2 */ COUNTER("Vertex Shader Active Time"), - /* A3: Not actually hooked up on Sandybridge. */ - /* A4: 3 */ COUNTER("Vertex Shader Stall Time - Core Stall"), - /* A5: 4 */ COUNTER("# VS threads loaded"), - /* A6: 5 */ COUNTER("Vertex Shader Ready but not running Time"), - /* A7: 6 */ COUNTER("Geometry Shader Active Time"), - /* A8: Not actually hooked up on Sandybridge. */ - /* A9: 7 */ COUNTER("Geometry Shader Stall Time - Core Stall"), - /* A10: 8 */ COUNTER("# GS threads loaded"), - /* A11: 9 */ COUNTER("Geometry Shader Ready but not running Time"), - /* A12: 10 */ COUNTER("Pixel Shader Active Time"), - /* A13: Not actually hooked up on Sandybridge. */ - /* A14: 11 */ COUNTER("Pixel Shader Stall Time - Core Stall"), - /* A15: 12 */ COUNTER("# PS threads loaded"), - /* A16: 13 */ COUNTER("Pixel Shader Ready but not running Time"), - /* A17: 14 */ COUNTER("Early Z Test Pixels Passing"), - /* A18: 15 */ COUNTER("Early Z Test Pixels Failing"), - /* A19: 16 */ COUNTER("Early Stencil Test Pixels Passing"), - /* A20: 17 */ COUNTER("Early Stencil Test Pixels Failing"), - /* A21: 18 */ COUNTER("Pixel Kill Count"), - /* A22: 19 */ COUNTER("Alpha Test Pixels Failed"), - /* A23: 20 */ COUNTER("Post PS Stencil Pixels Failed"), - /* A24: 21 */ COUNTER("Post PS Z buffer Pixels Failed"), - /* A25: 22 */ COUNTER("Pixels/samples Written in the frame buffer"), - /* A26: 23 */ COUNTER("GPU Busy"), - /* A27: 24 */ COUNTER("CL active and not stalled"), - /* A28: 25 */ COUNTER("SF active and stalled"), -}; - -/** - * Sandybridge: Counter Select = 001 - * A0 A1 A2 A3 A4 TIMESTAMP RPT_ID - * A5 A6 A7 A8 A9 A10 A11 A12 - * A13 A14 A15 A16 A17 A18 A19 A20 - * A21 A22 A23 A24 A25 A26 A27 A28 - * - * (Yes, this is a strange order.) We also have to remap for missing counters. - */ -static const int gen6_oa_snapshot_layout[] = -{ - -1, /* Report ID */ - -1, /* TIMESTAMP (64-bit) */ - -1, /* ...second half... */ - 3, /* A4: Vertex Shader Stall Time - Core Stall */ - -1, /* A3: (not available) */ - 2, /* A2: Vertex Shader Active Time */ - 1, /* A1: Aggregated Core Array Stalled */ - 0, /* A0: Aggregated Core Array Active */ - 10, /* A12: Pixel Shader Active Time */ - 9, /* A11: Geometry Shader ready but not running Time */ - 8, /* A10: # GS threads loaded */ - 7, /* A9: Geometry Shader Stall Time - Core Stall */ - -1, /* A8: (not available) */ - 6, /* A7: Geometry Shader Active Time */ - 5, /* A6: Vertex Shader ready but not running Time */ - 4, /* A5: # VS Threads Loaded */ - 17, /* A20: Early Stencil Test Pixels Failing */ - 16, /* A19: Early Stencil Test Pixels Passing */ - 15, /* A18: Early Z Test Pixels Failing */ - 14, /* A17: Early Z Test Pixels Passing */ - 13, /* A16: Pixel Shader ready but not running Time */ - 12, /* A15: # PS threads loaded */ - 11, /* A14: Pixel Shader Stall Time - Core Stall */ - -1, /* A13: (not available) */ - 25, /* A28: SF active and stalled */ - 24, /* A27: CL active and not stalled */ - 23, /* A26: GPU Busy */ - 22, /* A25: Pixels/samples Written in the frame buffer */ - 21, /* A24: Post PS Z buffer Pixels Failed */ - 20, /* A23: Post PS Stencil Pixels Failed */ - 19, /* A22: Alpha Test Pixels Failed */ - 18, /* A21: Pixel Kill Count */ -}; - -static const struct gl_perf_monitor_counter gen6_statistics_counters[] = { - COUNTER64("IA_VERTICES_COUNT"), - COUNTER64("IA_PRIMITIVES_COUNT"), - COUNTER64("VS_INVOCATION_COUNT"), - COUNTER64("GS_INVOCATION_COUNT"), - COUNTER64("GS_PRIMITIVES_COUNT"), - COUNTER64("CL_INVOCATION_COUNT"), - COUNTER64("CL_PRIMITIVES_COUNT"), - COUNTER64("PS_INVOCATION_COUNT"), - COUNTER64("PS_DEPTH_COUNT"), - COUNTER64("SO_NUM_PRIMS_WRITTEN"), - COUNTER64("SO_PRIM_STORAGE_NEEDED"), -}; - -/** MMIO register addresses for each pipeline statistics counter. */ -static const int gen6_statistics_register_addresses[] = { - IA_VERTICES_COUNT, - IA_PRIMITIVES_COUNT, - VS_INVOCATION_COUNT, - GS_INVOCATION_COUNT, - GS_PRIMITIVES_COUNT, - CL_INVOCATION_COUNT, - CL_PRIMITIVES_COUNT, - PS_INVOCATION_COUNT, - PS_DEPTH_COUNT, - GEN6_SO_NUM_PRIMS_WRITTEN, - GEN6_SO_PRIM_STORAGE_NEEDED, -}; - -static const struct gl_perf_monitor_group gen6_groups[] = { - GROUP("Observability Architecture Counters", INT_MAX, gen6_raw_oa_counters), - GROUP("Pipeline Statistics Registers", INT_MAX, gen6_statistics_counters), -}; -/** @} */ - -/** - * Ivybridge/Baytrail/Haswell: - * @{ - */ -static const struct gl_perf_monitor_counter gen7_raw_oa_counters[] = { - COUNTER("Aggregated Core Array Active"), - COUNTER("Aggregated Core Array Stalled"), - COUNTER("Vertex Shader Active Time"), - COUNTER("Vertex Shader Stall Time - Core Stall"), - COUNTER("# VS threads loaded"), - COUNTER("Hull Shader Active Time"), - COUNTER("Hull Shader Stall Time - Core Stall"), - COUNTER("# HS threads loaded"), - COUNTER("Domain Shader Active Time"), - COUNTER("Domain Shader Stall Time - Core Stall"), - COUNTER("# DS threads loaded"), - COUNTER("Compute Shader Active Time"), - COUNTER("Compute Shader Stall Time - Core Stall"), - COUNTER("# CS threads loaded"), - COUNTER("Geometry Shader Active Time"), - COUNTER("Geometry Shader Stall Time - Core Stall"), - COUNTER("# GS threads loaded"), - COUNTER("Pixel Shader Active Time"), - COUNTER("Pixel Shader Stall Time - Core Stall"), - COUNTER("# PS threads loaded"), - COUNTER("HiZ Fast Z Test Pixels Passing"), - COUNTER("HiZ Fast Z Test Pixels Failing"), - COUNTER("Slow Z Test Pixels Passing"), - COUNTER("Slow Z Test Pixels Failing"), - COUNTER("Pixel Kill Count"), - COUNTER("Alpha Test Pixels Failed"), - COUNTER("Post PS Stencil Pixels Failed"), - COUNTER("Post PS Z buffer Pixels Failed"), - COUNTER("3D/GPGPU Render Target Writes"), - COUNTER("Render Engine Busy"), - COUNTER("VS bottleneck"), - COUNTER("GS bottleneck"), -}; - -/** - * Ivybridge/Baytrail/Haswell: Counter Select = 101 - * A4 A3 A2 A1 A0 TIMESTAMP ReportID - * A12 A11 A10 A9 A8 A7 A6 A5 - * A20 A19 A18 A17 A16 A15 A14 A13 - * A28 A27 A26 A25 A24 A23 A22 A21 - * A36 A35 A34 A33 A32 A31 A30 A29 - * A44 A43 A42 A41 A40 A39 A38 A37 - * B7 B6 B5 B4 B3 B2 B1 B0 - * Rsv Rsv Rsv Rsv Rsv Rsv Rsv Rsv - */ -static const int gen7_oa_snapshot_layout[] = -{ - -1, /* Report ID */ - -1, /* TIMESTAMP (64-bit) */ - -1, /* ...second half... */ - 0, /* A0: Aggregated Core Array Active */ - 1, /* A1: Aggregated Core Array Stalled */ - 2, /* A2: Vertex Shader Active Time */ - -1, /* A3: Reserved */ - 3, /* A4: Vertex Shader Stall Time - Core Stall */ - 4, /* A5: # VS threads loaded */ - -1, /* A6: Reserved */ - 5, /* A7: Hull Shader Active Time */ - -1, /* A8: Reserved */ - 6, /* A9: Hull Shader Stall Time - Core Stall */ - 7, /* A10: # HS threads loaded */ - -1, /* A11: Reserved */ - 8, /* A12: Domain Shader Active Time */ - -1, /* A13: Reserved */ - 9, /* A14: Domain Shader Stall Time - Core Stall */ - 10, /* A15: # DS threads loaded */ - -1, /* A16: Reserved */ - 11, /* A17: Compute Shader Active Time */ - -1, /* A18: Reserved */ - 12, /* A19: Compute Shader Stall Time - Core Stall */ - 13, /* A20: # CS threads loaded */ - -1, /* A21: Reserved */ - 14, /* A22: Geometry Shader Active Time */ - -1, /* A23: Reserved */ - 15, /* A24: Geometry Shader Stall Time - Core Stall */ - 16, /* A25: # GS threads loaded */ - -1, /* A26: Reserved */ - 17, /* A27: Pixel Shader Active Time */ - -1, /* A28: Reserved */ - 18, /* A29: Pixel Shader Stall Time - Core Stall */ - 19, /* A30: # PS threads loaded */ - -1, /* A31: Reserved */ - 20, /* A32: HiZ Fast Z Test Pixels Passing */ - 21, /* A33: HiZ Fast Z Test Pixels Failing */ - 22, /* A34: Slow Z Test Pixels Passing */ - 23, /* A35: Slow Z Test Pixels Failing */ - 24, /* A36: Pixel Kill Count */ - 25, /* A37: Alpha Test Pixels Failed */ - 26, /* A38: Post PS Stencil Pixels Failed */ - 27, /* A39: Post PS Z buffer Pixels Failed */ - 28, /* A40: 3D/GPGPU Render Target Writes */ - 29, /* A41: Render Engine Busy */ - 30, /* A42: VS bottleneck */ - 31, /* A43: GS bottleneck */ - -1, /* A44: Reserved */ - -1, /* B0 */ - -1, /* B1 */ - -1, /* B2 */ - -1, /* B3 */ - -1, /* B4 */ - -1, /* B5 */ - -1, /* B6 */ - -1, /* B7 */ - -1, /* Reserved */ - -1, /* Reserved */ - -1, /* Reserved */ - -1, /* Reserved */ - -1, /* Reserved */ - -1, /* Reserved */ - -1, /* Reserved */ - -1, /* Reserved */ -}; - -static const struct gl_perf_monitor_counter gen7_statistics_counters[] = { - COUNTER64("IA_VERTICES_COUNT"), - COUNTER64("IA_PRIMITIVES_COUNT"), - COUNTER64("VS_INVOCATION_COUNT"), - COUNTER64("HS_INVOCATION_COUNT"), - COUNTER64("DS_INVOCATION_COUNT"), - COUNTER64("GS_INVOCATION_COUNT"), - COUNTER64("GS_PRIMITIVES_COUNT"), - COUNTER64("CL_INVOCATION_COUNT"), - COUNTER64("CL_PRIMITIVES_COUNT"), - COUNTER64("PS_INVOCATION_COUNT"), - COUNTER64("PS_DEPTH_COUNT"), - COUNTER64("SO_NUM_PRIMS_WRITTEN (Stream 0)"), - COUNTER64("SO_NUM_PRIMS_WRITTEN (Stream 1)"), - COUNTER64("SO_NUM_PRIMS_WRITTEN (Stream 2)"), - COUNTER64("SO_NUM_PRIMS_WRITTEN (Stream 3)"), - COUNTER64("SO_PRIM_STORAGE_NEEDED (Stream 0)"), - COUNTER64("SO_PRIM_STORAGE_NEEDED (Stream 1)"), - COUNTER64("SO_PRIM_STORAGE_NEEDED (Stream 2)"), - COUNTER64("SO_PRIM_STORAGE_NEEDED (Stream 3)"), -}; - -/** MMIO register addresses for each pipeline statistics counter. */ -static const int gen7_statistics_register_addresses[] = { - IA_VERTICES_COUNT, - IA_PRIMITIVES_COUNT, - VS_INVOCATION_COUNT, - HS_INVOCATION_COUNT, - DS_INVOCATION_COUNT, - GS_INVOCATION_COUNT, - GS_PRIMITIVES_COUNT, - CL_INVOCATION_COUNT, - CL_PRIMITIVES_COUNT, - PS_INVOCATION_COUNT, - PS_DEPTH_COUNT, - GEN7_SO_NUM_PRIMS_WRITTEN(0), - GEN7_SO_NUM_PRIMS_WRITTEN(1), - GEN7_SO_NUM_PRIMS_WRITTEN(2), - GEN7_SO_NUM_PRIMS_WRITTEN(3), - GEN7_SO_PRIM_STORAGE_NEEDED(0), - GEN7_SO_PRIM_STORAGE_NEEDED(1), - GEN7_SO_PRIM_STORAGE_NEEDED(2), - GEN7_SO_PRIM_STORAGE_NEEDED(3), -}; - -static const struct gl_perf_monitor_group gen7_groups[] = { - GROUP("Observability Architecture Counters", INT_MAX, gen7_raw_oa_counters), - GROUP("Pipeline Statistics Registers", INT_MAX, gen7_statistics_counters), -}; -/** @} */ - -/******************************************************************************/ - -static GLboolean brw_is_perf_monitor_result_available(struct gl_context *, struct gl_perf_monitor_object *); - -static void -dump_perf_monitor_callback(GLuint name, void *monitor_void, void *brw_void) -{ - struct brw_context *brw = brw_void; - struct gl_context *ctx = brw_void; - struct gl_perf_monitor_object *m = monitor_void; - struct brw_perf_monitor_object *monitor = monitor_void; - - const char *resolved = ""; - for (int i = 0; i < brw->perfmon.unresolved_elements; i++) { - if (brw->perfmon.unresolved[i] == monitor) { - resolved = "Unresolved"; - break; - } - } - - DBG("%4d %-7s %-6s %-10s %-11s <%3d, %3d, %3d> %-6s %-9s\n", - name, - m->Active ? "Active" : "", - m->Ended ? "Ended" : "", - resolved, - brw_is_perf_monitor_result_available(ctx, m) ? "Available" : "", - monitor->oa_head_end, - monitor->oa_middle_start, - monitor->oa_tail_start, - monitor->oa_bo ? "OA BO" : "", - monitor->pipeline_stats_bo ? "Stats BO" : ""); -} - -void -brw_dump_perf_monitors(struct brw_context *brw) -{ - struct gl_context *ctx = &brw->ctx; - DBG("Monitors: (OA users = %d)\n", brw->perfmon.oa_users); - _mesa_HashWalk(ctx->PerfMonitor.Monitors, dump_perf_monitor_callback, brw); -} - -/******************************************************************************/ - -static bool -monitor_needs_statistics_registers(struct brw_context *brw, - struct gl_perf_monitor_object *m) -{ - return brw->gen >= 6 && m->ActiveGroups[PIPELINE_STATS_COUNTERS]; -} - -/** - * Take a snapshot of any monitored pipeline statistics counters. - */ -static void -snapshot_statistics_registers(struct brw_context *brw, - struct brw_perf_monitor_object *monitor, - uint32_t offset) -{ - struct gl_context *ctx = &brw->ctx; - const int group = PIPELINE_STATS_COUNTERS; - const int num_counters = ctx->PerfMonitor.Groups[group].NumCounters; - - brw_emit_mi_flush(brw); - - for (int i = 0; i < num_counters; i++) { - if (BITSET_TEST(monitor->base.ActiveCounters[group], i)) { - assert(ctx->PerfMonitor.Groups[group].Counters[i].Type == - GL_UNSIGNED_INT64_AMD); - - brw_store_register_mem64(brw, monitor->pipeline_stats_bo, - brw->perfmon.statistics_registers[i], - offset + i * sizeof(uint64_t)); - } - } -} - -/** - * Gather results from pipeline_stats_bo, storing the final values. - * - * This allows us to free pipeline_stats_bo (which is 4K) in favor of a much - * smaller array of final results. - */ -static void -gather_statistics_results(struct brw_context *brw, - struct brw_perf_monitor_object *monitor) -{ - struct gl_context *ctx = &brw->ctx; - const int num_counters = - ctx->PerfMonitor.Groups[PIPELINE_STATS_COUNTERS].NumCounters; - - monitor->pipeline_stats_results = calloc(num_counters, sizeof(uint64_t)); - if (monitor->pipeline_stats_results == NULL) { - _mesa_error_no_memory(__func__); - return; - } - - drm_intel_bo_map(monitor->pipeline_stats_bo, false); - uint64_t *start = monitor->pipeline_stats_bo->virtual; - uint64_t *end = start + (SECOND_SNAPSHOT_OFFSET_IN_BYTES / sizeof(uint64_t)); - - for (int i = 0; i < num_counters; i++) { - monitor->pipeline_stats_results[i] = end[i] - start[i]; - } - drm_intel_bo_unmap(monitor->pipeline_stats_bo); - drm_intel_bo_unreference(monitor->pipeline_stats_bo); - monitor->pipeline_stats_bo = NULL; -} - -/******************************************************************************/ - -static bool -monitor_needs_oa(struct brw_context *brw, - struct gl_perf_monitor_object *m) -{ - return m->ActiveGroups[OA_COUNTERS]; -} - -/** - * Enable the Observability Architecture counters by whacking OACONTROL. - */ -static void -start_oa_counters(struct brw_context *brw) -{ - unsigned counter_format; - - /* Pick the counter format which gives us all the counters. */ - switch (brw->gen) { - case 5: - return; /* Ironlake counters are always running. */ - case 6: - counter_format = 0b001; - break; - case 7: - counter_format = 0b101; - break; - default: - unreachable("Tried to enable OA counters on an unsupported generation."); - } - - BEGIN_BATCH(3); - OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2)); - OUT_BATCH(OACONTROL); - OUT_BATCH(counter_format << OACONTROL_COUNTER_SELECT_SHIFT | - OACONTROL_ENABLE_COUNTERS); - ADVANCE_BATCH(); -} - -/** - * Disable OA counters. - */ -static void -stop_oa_counters(struct brw_context *brw) -{ - /* Ironlake counters never stop. */ - if (brw->gen == 5) - return; - - BEGIN_BATCH(3); - OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2)); - OUT_BATCH(OACONTROL); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - -/** - * The amount of batch space it takes to emit an MI_REPORT_PERF_COUNT snapshot, - * including the required PIPE_CONTROL flushes. - * - * Sandybridge is the worst case scenario: brw_emit_mi_flush expands to four - * PIPE_CONTROLs which are 5 DWords each. We have to flush before and after - * MI_REPORT_PERF_COUNT, so multiply by two. Finally, add the 3 DWords for - * MI_REPORT_PERF_COUNT itself. - */ -#define MI_REPORT_PERF_COUNT_BATCH_DWORDS (2 * (4 * 5) + 3) - -/** - * Emit an MI_REPORT_PERF_COUNT command packet. - * - * This writes the current OA counter values to buffer. - */ -static void -emit_mi_report_perf_count(struct brw_context *brw, - drm_intel_bo *bo, - uint32_t offset_in_bytes, - uint32_t report_id) -{ - assert(offset_in_bytes % 64 == 0); - - /* Make sure the commands to take a snapshot fits in a single batch. */ - intel_batchbuffer_require_space(brw, MI_REPORT_PERF_COUNT_BATCH_DWORDS * 4, - RENDER_RING); - int batch_used = USED_BATCH(brw->batch); - - /* Reports apparently don't always get written unless we flush first. */ - brw_emit_mi_flush(brw); - - if (brw->gen == 5) { - /* Ironlake requires two MI_REPORT_PERF_COUNT commands to write all - * the counters. The report ID is ignored in the second set. - */ - BEGIN_BATCH(6); - OUT_BATCH(GEN5_MI_REPORT_PERF_COUNT | GEN5_MI_COUNTER_SET_0); - OUT_RELOC(bo, - I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, - offset_in_bytes); - OUT_BATCH(report_id); - - OUT_BATCH(GEN5_MI_REPORT_PERF_COUNT | GEN5_MI_COUNTER_SET_1); - OUT_RELOC(bo, - I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, - offset_in_bytes + 64); - OUT_BATCH(report_id); - ADVANCE_BATCH(); - } else if (brw->gen == 6) { - BEGIN_BATCH(3); - OUT_BATCH(GEN6_MI_REPORT_PERF_COUNT); - OUT_RELOC(bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, - offset_in_bytes | MI_COUNTER_ADDRESS_GTT); - OUT_BATCH(report_id); - ADVANCE_BATCH(); - } else if (brw->gen == 7) { - BEGIN_BATCH(3); - OUT_BATCH(GEN6_MI_REPORT_PERF_COUNT); - OUT_RELOC(bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, - offset_in_bytes); - OUT_BATCH(report_id); - ADVANCE_BATCH(); - } else { - unreachable("Unsupported generation for performance counters."); - } - - /* Reports apparently don't always get written unless we flush after. */ - brw_emit_mi_flush(brw); - - (void) batch_used; - assert(USED_BATCH(brw->batch) - batch_used <= MI_REPORT_PERF_COUNT_BATCH_DWORDS * 4); -} - -/** - * Add a monitor to the global list of "unresolved monitors." - * - * Monitors are "unresolved" if they refer to OA counter snapshots in - * bookend_bo. Results (even partial ones) must be gathered for all - * unresolved monitors before it's safe to discard bookend_bo. - */ -static void -add_to_unresolved_monitor_list(struct brw_context *brw, - struct brw_perf_monitor_object *monitor) -{ - if (brw->perfmon.unresolved_elements >= - brw->perfmon.unresolved_array_size) { - brw->perfmon.unresolved_array_size *= 2; - brw->perfmon.unresolved = reralloc(brw, brw->perfmon.unresolved, - struct brw_perf_monitor_object *, - brw->perfmon.unresolved_array_size); - } - - brw->perfmon.unresolved[brw->perfmon.unresolved_elements++] = monitor; -} - -/** - * If possible, throw away the contents of bookend BO. - * - * When all monitoring stops, and no monitors need data from bookend_bo to - * compute results, we can discard it and start writing snapshots at the - * beginning again. This helps reduce the amount of buffer wraparound. - */ -static void -clean_bookend_bo(struct brw_context *brw) -{ - if (brw->perfmon.unresolved_elements == 0) { - DBG("***Resetting bookend snapshots to 0\n"); - brw->perfmon.bookend_snapshots = 0; - } -} - -/** - * Remove a monitor from the global list of "unresolved monitors." - * - * This can happen when: - * - We finish computing a completed monitor's results. - * - We discard unwanted monitor results. - * - A monitor's results can be computed without relying on bookend_bo. - */ -static void -drop_from_unresolved_monitor_list(struct brw_context *brw, - struct brw_perf_monitor_object *monitor) -{ - for (int i = 0; i < brw->perfmon.unresolved_elements; i++) { - if (brw->perfmon.unresolved[i] == monitor) { - int last_elt = --brw->perfmon.unresolved_elements; - - if (i == last_elt) { - brw->perfmon.unresolved[i] = NULL; - } else { - brw->perfmon.unresolved[i] = brw->perfmon.unresolved[last_elt]; - } - - clean_bookend_bo(brw); - return; - } - } -} - -/** - * Given pointers to starting and ending OA snapshots, add the deltas for each - * counter to the results. - */ -static void -add_deltas(struct brw_context *brw, - struct brw_perf_monitor_object *monitor, - uint32_t *start, uint32_t *end) -{ - /* Look for expected report ID values to ensure data is present. */ - assert(start[0] == REPORT_ID); - assert(end[0] == REPORT_ID); - - /* Subtract each counter's ending and starting values, then add the - * difference to the counter's value so far. - */ - for (int i = 3; i < brw->perfmon.entries_per_oa_snapshot; i++) { - /* When debugging, it's useful to note when the ending value is less than - * the starting value; aggregating counters should always increase in - * value (or remain unchanged). This happens periodically due to - * wraparound, but can also indicate serious problems. - */ -#ifdef DEBUG - if (end[i] < start[i]) { - int counter = brw->perfmon.oa_snapshot_layout[i]; - if (counter >= 0) { - DBG("WARNING: \"%s\" ending value was less than the starting " - "value: %u < %u (end - start = %u)\n", - brw->ctx.PerfMonitor.Groups[0].Counters[counter].Name, - end[i], start[i], end[i] - start[i]); - } - } -#endif - monitor->oa_results[i] += end[i] - start[i]; - } -} - -/** - * Gather OA counter results (partial or full) from a series of snapshots. - * - * Monitoring can start or stop at any time, likely at some point mid-batch. - * We write snapshots for both events, storing them in monitor->oa_bo. - * - * Ideally, we would simply subtract those two snapshots to obtain the final - * counter results. Unfortunately, our hardware doesn't preserve their values - * across context switches or GPU sleep states. In order to support multiple - * concurrent OA clients, as well as reliable data across power management, - * we have to take snapshots at the start and end of batches as well. - * - * This results in a three-part sequence of (start, end) intervals: - * - The "head" is from the BeginPerfMonitor snapshot to the end of the first - * batchbuffer. - * - The "middle" is a series of (batch start, batch end) snapshots which - * bookend any batchbuffers between the ones which start/end monitoring. - * - The "tail" is from the start of the last batch where monitoring was - * active to the EndPerfMonitor snapshot. - * - * Due to wrapping in the bookend BO, we may have to accumulate partial results. - * If so, we handle the "head" and any "middle" results so far. When monitoring - * eventually ends, we handle additional "middle" batches and the "tail." - */ -static void -gather_oa_results(struct brw_context *brw, - struct brw_perf_monitor_object *monitor, - uint32_t *bookend_buffer) -{ - struct gl_perf_monitor_object *m = &monitor->base; - assert(monitor->oa_bo != NULL); - - drm_intel_bo_map(monitor->oa_bo, false); - uint32_t *monitor_buffer = monitor->oa_bo->virtual; - - /* If monitoring was entirely contained within a single batch, then the - * bookend BO is irrelevant. Just subtract monitor->bo's two snapshots. - */ - if (monitor->oa_middle_start == -1) { - add_deltas(brw, monitor, - monitor_buffer, - monitor_buffer + (SECOND_SNAPSHOT_OFFSET_IN_BYTES / - sizeof(uint32_t))); - drm_intel_bo_unmap(monitor->oa_bo); - return; - } - - const ptrdiff_t snapshot_size = brw->perfmon.entries_per_oa_snapshot; - - /* First, add the contributions from the "head" interval: - * (snapshot taken at BeginPerfMonitor time, - * snapshot taken at the end of the first batch after monitoring began) - */ - if (monitor->oa_head_end != -1) { - assert(monitor->oa_head_end < brw->perfmon.bookend_snapshots); - add_deltas(brw, monitor, - monitor_buffer, - bookend_buffer + snapshot_size * monitor->oa_head_end); - - /* Make sure we don't count the "head" again in the future. */ - monitor->oa_head_end = -1; - } - - /* Next, count the contributions from the "middle" batches. These are - * (batch begin, batch end) deltas while monitoring was active. - */ - int last_snapshot; - if (m->Ended) - last_snapshot = monitor->oa_tail_start; - else - last_snapshot = brw->perfmon.bookend_snapshots; - - for (int s = monitor->oa_middle_start; s < last_snapshot; s += 2) { - add_deltas(brw, monitor, - bookend_buffer + snapshot_size * s, - bookend_buffer + snapshot_size * (s + 1)); - } - - /* Finally, if the monitor has ended, we need to count the contributions of - * the "tail" interval: - * (start of the batch where monitoring ended, EndPerfMonitor snapshot) - */ - if (m->Ended) { - assert(monitor->oa_tail_start != -1); - add_deltas(brw, monitor, - bookend_buffer + snapshot_size * monitor->oa_tail_start, - monitor_buffer + (SECOND_SNAPSHOT_OFFSET_IN_BYTES / - sizeof(uint32_t))); - } - - drm_intel_bo_unmap(monitor->oa_bo); - - /* If the monitor has ended, then we've gathered all the results, and - * can free the monitor's OA BO. - */ - if (m->Ended) { - drm_intel_bo_unreference(monitor->oa_bo); - monitor->oa_bo = NULL; - - /* The monitor's OA result is now resolved. */ - DBG("Marking %d resolved - results gathered\n", m->Name); - drop_from_unresolved_monitor_list(brw, monitor); - } -} - -/** - * Handle running out of space in the bookend BO. - * - * When we run out of space in the bookend BO, we need to gather up partial - * results for every unresolved monitor. This allows us to free the snapshot - * data in bookend_bo, freeing up the space for reuse. We call this "wrapping." - * - * This will completely compute the result for any unresolved monitors that - * have ended. - */ -static void -wrap_bookend_bo(struct brw_context *brw) -{ - DBG("****Wrap bookend BO****\n"); - /* Note that wrapping will only occur at the start of a batch, since that's - * where we reserve space. So the current batch won't reference bookend_bo - * or any monitor BOs. This means we don't need to worry about - * synchronization. - * - * Also, EndPerfMonitor guarantees that only monitors which span multiple - * batches exist in the unresolved monitor list. - */ - assert(brw->perfmon.oa_users > 0); - - drm_intel_bo_map(brw->perfmon.bookend_bo, false); - uint32_t *bookend_buffer = brw->perfmon.bookend_bo->virtual; - for (int i = 0; i < brw->perfmon.unresolved_elements; i++) { - struct brw_perf_monitor_object *monitor = brw->perfmon.unresolved[i]; - struct gl_perf_monitor_object *m = &monitor->base; - - gather_oa_results(brw, monitor, bookend_buffer); - - if (m->Ended) { - /* gather_oa_results() dropped the monitor from the unresolved list, - * throwing our indices off by one. - */ - --i; - } else { - /* When we create the new bookend_bo, snapshot #0 will be the - * beginning of another "middle" BO. - */ - monitor->oa_middle_start = 0; - assert(monitor->oa_head_end == -1); - assert(monitor->oa_tail_start == -1); - } - } - drm_intel_bo_unmap(brw->perfmon.bookend_bo); - - brw->perfmon.bookend_snapshots = 0; -} - -/* This is fairly arbitrary; the trade off is memory usage vs. extra overhead - * from wrapping. On Gen7, 32768 should be enough for for 128 snapshots before - * wrapping (since each is 256 bytes). - */ -#define BOOKEND_BO_SIZE_BYTES 32768 - -/** - * Check whether bookend_bo has space for a given number of snapshots. - */ -static bool -has_space_for_bookend_snapshots(struct brw_context *brw, int snapshots) -{ - int snapshot_bytes = brw->perfmon.entries_per_oa_snapshot * sizeof(uint32_t); - - /* There are brw->perfmon.bookend_snapshots - 1 existing snapshots. */ - int total_snapshots = (brw->perfmon.bookend_snapshots - 1) + snapshots; - - return total_snapshots * snapshot_bytes < BOOKEND_BO_SIZE_BYTES; -} - -/** - * Write an OA counter snapshot to bookend_bo. - */ -static void -emit_bookend_snapshot(struct brw_context *brw) -{ - int snapshot_bytes = brw->perfmon.entries_per_oa_snapshot * sizeof(uint32_t); - int offset_in_bytes = brw->perfmon.bookend_snapshots * snapshot_bytes; - - emit_mi_report_perf_count(brw, brw->perfmon.bookend_bo, offset_in_bytes, - REPORT_ID); - ++brw->perfmon.bookend_snapshots; -} - -/******************************************************************************/ - -/** - * Initialize a monitor to sane starting state; throw away old buffers. - */ -static void -reinitialize_perf_monitor(struct brw_context *brw, - struct brw_perf_monitor_object *monitor) -{ - if (monitor->oa_bo) { - drm_intel_bo_unreference(monitor->oa_bo); - monitor->oa_bo = NULL; - } - - /* Since the results are now invalid, we don't need to hold on to any - * snapshots in bookend_bo. The monitor is effectively "resolved." - */ - drop_from_unresolved_monitor_list(brw, monitor); - - monitor->oa_head_end = -1; - monitor->oa_middle_start = -1; - monitor->oa_tail_start = -1; - - free(monitor->oa_results); - monitor->oa_results = NULL; - - if (monitor->pipeline_stats_bo) { - drm_intel_bo_unreference(monitor->pipeline_stats_bo); - monitor->pipeline_stats_bo = NULL; - } - - free(monitor->pipeline_stats_results); - monitor->pipeline_stats_results = NULL; -} - -/** - * Driver hook for glBeginPerformanceMonitorAMD(). - */ -static GLboolean -brw_begin_perf_monitor(struct gl_context *ctx, - struct gl_perf_monitor_object *m) -{ - struct brw_context *brw = brw_context(ctx); - struct brw_perf_monitor_object *monitor = brw_perf_monitor(m); - - DBG("Begin(%d)\n", m->Name); - - reinitialize_perf_monitor(brw, monitor); - - if (monitor_needs_oa(brw, m)) { - /* If the global OA bookend BO doesn't exist, allocate it. This should - * only happen once, but we delay until BeginPerfMonitor time to avoid - * wasting memory for contexts that don't use performance monitors. - */ - if (!brw->perfmon.bookend_bo) { - brw->perfmon.bookend_bo = drm_intel_bo_alloc(brw->bufmgr, - "OA bookend BO", - BOOKEND_BO_SIZE_BYTES, 64); - } - - monitor->oa_bo = - drm_intel_bo_alloc(brw->bufmgr, "perf. monitor OA bo", 4096, 64); -#ifdef DEBUG - /* Pre-filling the BO helps debug whether writes landed. */ - drm_intel_bo_map(monitor->oa_bo, true); - memset((char *) monitor->oa_bo->virtual, 0xff, 4096); - drm_intel_bo_unmap(monitor->oa_bo); -#endif - - /* Allocate storage for accumulated OA counter values. */ - monitor->oa_results = - calloc(brw->perfmon.entries_per_oa_snapshot, sizeof(uint32_t)); - - /* If the OA counters aren't already on, enable them. */ - if (brw->perfmon.oa_users == 0) { - /* Ensure the OACONTROL enable and snapshot land in the same batch. */ - int space = (MI_REPORT_PERF_COUNT_BATCH_DWORDS + 3) * 4; - intel_batchbuffer_require_space(brw, space, RENDER_RING); - start_oa_counters(brw); - } - - /* Take a starting OA counter snapshot. */ - emit_mi_report_perf_count(brw, monitor->oa_bo, 0, REPORT_ID); - - monitor->oa_head_end = brw->perfmon.bookend_snapshots; - monitor->oa_middle_start = brw->perfmon.bookend_snapshots + 1; - monitor->oa_tail_start = -1; - - /* Add the monitor to the unresolved list. */ - add_to_unresolved_monitor_list(brw, monitor); - - ++brw->perfmon.oa_users; - } - - if (monitor_needs_statistics_registers(brw, m)) { - monitor->pipeline_stats_bo = - drm_intel_bo_alloc(brw->bufmgr, "perf. monitor stats bo", 4096, 64); - - /* Take starting snapshots. */ - snapshot_statistics_registers(brw, monitor, 0); - } - - return true; -} - -/** - * Driver hook for glEndPerformanceMonitorAMD(). - */ -static void -brw_end_perf_monitor(struct gl_context *ctx, - struct gl_perf_monitor_object *m) -{ - struct brw_context *brw = brw_context(ctx); - struct brw_perf_monitor_object *monitor = brw_perf_monitor(m); - - DBG("End(%d)\n", m->Name); - - if (monitor_needs_oa(brw, m)) { - /* Take an ending OA counter snapshot. */ - emit_mi_report_perf_count(brw, monitor->oa_bo, - SECOND_SNAPSHOT_OFFSET_IN_BYTES, REPORT_ID); - - --brw->perfmon.oa_users; - - if (brw->perfmon.oa_users == 0) - stop_oa_counters(brw); - - if (monitor->oa_head_end == brw->perfmon.bookend_snapshots) { - assert(monitor->oa_head_end != -1); - /* We never actually wrote the snapshot for the end of the first batch - * after BeginPerfMonitor. This means that monitoring was contained - * entirely within a single batch, so we can ignore bookend_bo and - * just compare the monitor's begin/end snapshots directly. - */ - monitor->oa_head_end = -1; - monitor->oa_middle_start = -1; - monitor->oa_tail_start = -1; - - /* We can also mark it resolved since it won't depend on bookend_bo. */ - DBG("Marking %d resolved - entirely in one batch\n", m->Name); - drop_from_unresolved_monitor_list(brw, monitor); - } else { - /* We've written at least one batch end snapshot, so the monitoring - * spanned multiple batches. Mark which snapshot corresponds to the - * start of the current batch. - */ - monitor->oa_tail_start = brw->perfmon.bookend_snapshots - 1; - } - } - - if (monitor_needs_statistics_registers(brw, m)) { - /* Take ending snapshots. */ - snapshot_statistics_registers(brw, monitor, - SECOND_SNAPSHOT_OFFSET_IN_BYTES); - } -} - -/** - * Reset a performance monitor, throwing away any results. - */ -static void -brw_reset_perf_monitor(struct gl_context *ctx, - struct gl_perf_monitor_object *m) -{ - struct brw_context *brw = brw_context(ctx); - struct brw_perf_monitor_object *monitor = brw_perf_monitor(m); - - reinitialize_perf_monitor(brw, monitor); - - if (m->Active) { - brw_begin_perf_monitor(ctx, m); - } -} - -/** - * Is a performance monitor result available? - */ -static GLboolean -brw_is_perf_monitor_result_available(struct gl_context *ctx, - struct gl_perf_monitor_object *m) -{ - struct brw_context *brw = brw_context(ctx); - struct brw_perf_monitor_object *monitor = brw_perf_monitor(m); - - bool oa_available = true; - bool stats_available = true; - - if (monitor_needs_oa(brw, m)) { - oa_available = !monitor->oa_bo || - (!drm_intel_bo_references(brw->batch.bo, monitor->oa_bo) && - !drm_intel_bo_busy(monitor->oa_bo)); - } - - if (monitor_needs_statistics_registers(brw, m)) { - stats_available = !monitor->pipeline_stats_bo || - (!drm_intel_bo_references(brw->batch.bo, monitor->pipeline_stats_bo) && - !drm_intel_bo_busy(monitor->pipeline_stats_bo)); - } - - return oa_available && stats_available; -} - -/** - * Get the performance monitor result. - */ -static void -brw_get_perf_monitor_result(struct gl_context *ctx, - struct gl_perf_monitor_object *m, - GLsizei data_size, - GLuint *data, - GLint *bytes_written) -{ - struct brw_context *brw = brw_context(ctx); - struct brw_perf_monitor_object *monitor = brw_perf_monitor(m); - const GLuint *const data_end = (GLuint *)((uint8_t *) data + data_size); - - DBG("GetResult(%d)\n", m->Name); - brw_dump_perf_monitors(brw); - - /* This hook should only be called when results are available. */ - assert(m->Ended); - - /* Copy data to the supplied array (data). - * - * The output data format is: for each - * active counter. The API allows counters to appear in any order. - */ - GLsizei offset = 0; - - if (monitor_needs_oa(brw, m)) { - /* Gather up the results from the BO, unless we already did due to the - * bookend BO wrapping. - */ - if (monitor->oa_bo) { - /* Since the result is available, all the necessary snapshots will - * have been written to the bookend BO. If other monitors are - * active, the bookend BO may be busy or referenced by the current - * batch, but only for writing snapshots beyond oa_tail_start, - * which we don't care about. - * - * Using an unsynchronized mapping avoids stalling for an - * indeterminate amount of time. - */ - drm_intel_gem_bo_map_unsynchronized(brw->perfmon.bookend_bo); - - gather_oa_results(brw, monitor, brw->perfmon.bookend_bo->virtual); - - drm_intel_bo_unmap(brw->perfmon.bookend_bo); - } - - for (int i = 0; i < brw->perfmon.entries_per_oa_snapshot; i++) { - int group = OA_COUNTERS; - int counter = brw->perfmon.oa_snapshot_layout[i]; - - /* We always capture all the OA counters, but the application may - * have only asked for a subset. Skip unwanted counters. - */ - if (counter < 0 || !BITSET_TEST(m->ActiveCounters[group], counter)) - continue; - - if (data + offset + 3 <= data_end) { - data[offset++] = group; - data[offset++] = counter; - data[offset++] = monitor->oa_results[i]; - } - } - - clean_bookend_bo(brw); - } - - if (monitor_needs_statistics_registers(brw, m)) { - const int num_counters = - ctx->PerfMonitor.Groups[PIPELINE_STATS_COUNTERS].NumCounters; - - if (!monitor->pipeline_stats_results) { - gather_statistics_results(brw, monitor); - - /* Check if we did really get the results */ - if (!monitor->pipeline_stats_results) { - if (bytes_written) { - *bytes_written = 0; - } - return; - } - } - - for (int i = 0; i < num_counters; i++) { - if (BITSET_TEST(m->ActiveCounters[PIPELINE_STATS_COUNTERS], i)) { - if (data + offset + 4 <= data_end) { - data[offset++] = PIPELINE_STATS_COUNTERS; - data[offset++] = i; - *((uint64_t *) (&data[offset])) = monitor->pipeline_stats_results[i]; - offset += 2; - } - } - } - } - - if (bytes_written) - *bytes_written = offset * sizeof(uint32_t); -} - -/** - * Create a new performance monitor object. - */ -static struct gl_perf_monitor_object * -brw_new_perf_monitor(struct gl_context *ctx) -{ - (void) ctx; - return calloc(1, sizeof(struct brw_perf_monitor_object)); -} - -/** - * Delete a performance monitor object. - */ -static void -brw_delete_perf_monitor(struct gl_context *ctx, struct gl_perf_monitor_object *m) -{ - struct brw_perf_monitor_object *monitor = brw_perf_monitor(m); - DBG("Delete(%d)\n", m->Name); - reinitialize_perf_monitor(brw_context(ctx), monitor); - free(monitor); -} - -/******************************************************************************/ - -/** - * Called at the start of every render ring batch. - * - * Enable OA counters and emit the "start of batchbuffer" bookend OA snapshot. - * Since it's a new batch, there will be plenty of space for the commands. - */ -void -brw_perf_monitor_new_batch(struct brw_context *brw) -{ - assert(brw->batch.ring == RENDER_RING); - assert(brw->gen < 6 || USED_BATCH(brw->batch) == 0); - - if (brw->perfmon.oa_users == 0) - return; - - start_oa_counters(brw); - - /* Make sure bookend_bo has enough space for a pair of snapshots. - * If not, "wrap" the BO: gather up any results so far, and start from - * the beginning of the buffer. Reserving a pair guarantees that wrapping - * will only happen at the beginning of a batch, where it's safe to map BOs - * (as the batch is empty and can't refer to any of them yet). - */ - if (!has_space_for_bookend_snapshots(brw, 2)) - wrap_bookend_bo(brw); - - DBG("Bookend Begin Snapshot (%d)\n", brw->perfmon.bookend_snapshots); - emit_bookend_snapshot(brw); -} - -/** - * Called at the end of every render ring batch. - * - * Emit the "end of batchbuffer" bookend OA snapshot and disable the counters. - * - * This relies on there being enough space in BATCH_RESERVED. - */ -void -brw_perf_monitor_finish_batch(struct brw_context *brw) -{ - assert(brw->batch.ring == RENDER_RING); - - if (brw->perfmon.oa_users == 0) - return; - - DBG("Bookend End Snapshot (%d)\n", brw->perfmon.bookend_snapshots); - - /* Not safe to wrap; should've reserved space already. */ - assert(has_space_for_bookend_snapshots(brw, 1)); - - emit_bookend_snapshot(brw); - - stop_oa_counters(brw); -} - -/******************************************************************************/ - -void -brw_init_performance_monitors(struct brw_context *brw) -{ - struct gl_context *ctx = &brw->ctx; - - ctx->Driver.NewPerfMonitor = brw_new_perf_monitor; - ctx->Driver.DeletePerfMonitor = brw_delete_perf_monitor; - ctx->Driver.BeginPerfMonitor = brw_begin_perf_monitor; - ctx->Driver.EndPerfMonitor = brw_end_perf_monitor; - ctx->Driver.ResetPerfMonitor = brw_reset_perf_monitor; - ctx->Driver.IsPerfMonitorResultAvailable = brw_is_perf_monitor_result_available; - ctx->Driver.GetPerfMonitorResult = brw_get_perf_monitor_result; - - if (brw->gen == 5) { - ctx->PerfMonitor.Groups = gen5_groups; - ctx->PerfMonitor.NumGroups = ARRAY_SIZE(gen5_groups); - brw->perfmon.oa_snapshot_layout = gen5_oa_snapshot_layout; - brw->perfmon.entries_per_oa_snapshot = ARRAY_SIZE(gen5_oa_snapshot_layout); - } else if (brw->gen == 6) { - ctx->PerfMonitor.Groups = gen6_groups; - ctx->PerfMonitor.NumGroups = ARRAY_SIZE(gen6_groups); - brw->perfmon.oa_snapshot_layout = gen6_oa_snapshot_layout; - brw->perfmon.entries_per_oa_snapshot = ARRAY_SIZE(gen6_oa_snapshot_layout); - brw->perfmon.statistics_registers = gen6_statistics_register_addresses; - } else if (brw->gen == 7) { - ctx->PerfMonitor.Groups = gen7_groups; - ctx->PerfMonitor.NumGroups = ARRAY_SIZE(gen7_groups); - brw->perfmon.oa_snapshot_layout = gen7_oa_snapshot_layout; - brw->perfmon.entries_per_oa_snapshot = ARRAY_SIZE(gen7_oa_snapshot_layout); - brw->perfmon.statistics_registers = gen7_statistics_register_addresses; - } - - brw->perfmon.unresolved = - ralloc_array(brw, struct brw_perf_monitor_object *, 1); - brw->perfmon.unresolved_elements = 0; - brw->perfmon.unresolved_array_size = 1; -} diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_pipe_control.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_pipe_control.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_pipe_control.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_pipe_control.c 2017-06-01 10:37:10.000000000 +0000 @@ -22,9 +22,9 @@ */ #include "brw_context.h" +#include "brw_defines.h" #include "intel_batchbuffer.h" #include "intel_fbo.h" -#include "intel_reg.h" /** * According to the latest documentation, any PIPE_CONTROL with the @@ -137,6 +137,17 @@ OUT_BATCH(0); ADVANCE_BATCH(); } else if (brw->gen >= 6) { + if (brw->gen == 6 && + (flags & PIPE_CONTROL_RENDER_TARGET_FLUSH)) { + /* Hardware workaround: SNB B-Spec says: + * + * [Dev-SNB{W/A}]: Before a PIPE_CONTROL with Write Cache Flush + * Enable = 1, a PIPE_CONTROL with any non-zero post-sync-op is + * required. + */ + brw_emit_post_sync_nonzero_flush(brw); + } + flags |= gen7_cs_stall_every_four_pipe_controls(brw, flags); BEGIN_BATCH(5); @@ -223,7 +234,7 @@ void brw_emit_depth_stall_flushes(struct brw_context *brw) { - assert(brw->gen >= 6 && brw->gen <= 9); + assert(brw->gen >= 6); /* Starting on BDW, these pipe controls are unnecessary. * @@ -340,20 +351,11 @@ int flags = PIPE_CONTROL_NO_WRITE | PIPE_CONTROL_RENDER_TARGET_FLUSH; if (brw->gen >= 6) { flags |= PIPE_CONTROL_INSTRUCTION_INVALIDATE | + PIPE_CONTROL_CONST_CACHE_INVALIDATE | PIPE_CONTROL_DEPTH_CACHE_FLUSH | PIPE_CONTROL_VF_CACHE_INVALIDATE | PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | PIPE_CONTROL_CS_STALL; - - if (brw->gen == 6) { - /* Hardware workaround: SNB B-Spec says: - * - * [Dev-SNB{W/A}]: Before a PIPE_CONTROL with Write Cache - * Flush Enable =1, a PIPE_CONTROL with any non-zero - * post-sync-op is required. - */ - brw_emit_post_sync_nonzero_flush(brw); - } } brw_emit_pipe_control_flush(brw, flags); } @@ -361,7 +363,7 @@ int brw_init_pipe_control(struct brw_context *brw, - const struct brw_device_info *devinfo) + const struct gen_device_info *devinfo) { if (devinfo->gen < 6) return 0; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_program.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_program.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_program.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_program.c 2017-06-01 10:37:10.000000000 +0000 @@ -53,18 +53,18 @@ if (is_scalar) { nir_assign_var_locations(&nir->uniforms, &nir->num_uniforms, type_size_scalar_bytes); - nir_lower_io(nir, nir_var_uniform, type_size_scalar_bytes); + nir_lower_io(nir, nir_var_uniform, type_size_scalar_bytes, 0); } else { nir_assign_var_locations(&nir->uniforms, &nir->num_uniforms, type_size_vec4_bytes); - nir_lower_io(nir, nir_var_uniform, type_size_vec4_bytes); + nir_lower_io(nir, nir_var_uniform, type_size_vec4_bytes, 0); } } nir_shader * brw_create_nir(struct brw_context *brw, const struct gl_shader_program *shader_prog, - const struct gl_program *prog, + struct gl_program *prog, gl_shader_stage stage, bool is_scalar) { @@ -78,17 +78,19 @@ if (shader_prog) { nir = glsl_to_nir(shader_prog, stage, options); nir_remove_dead_variables(nir, nir_var_shader_in | nir_var_shader_out); + nir_lower_returns(nir); + nir_validate_shader(nir); NIR_PASS_V(nir, nir_lower_io_to_temporaries, nir_shader_get_entrypoint(nir), true, false); } else { nir = prog_to_nir(prog, options); - NIR_PASS_V(nir, nir_convert_to_ssa); /* turn registers into SSA */ + NIR_PASS_V(nir, nir_lower_regs_to_ssa); /* turn registers into SSA */ } nir_validate_shader(nir); (void)progress; - nir = brw_preprocess_nir(brw->intelScreen->compiler, nir); + nir = brw_preprocess_nir(brw->screen->compiler, nir); if (stage == MESA_SHADER_FRAGMENT) { static const struct nir_lower_wpos_ytransform_options wpos_options = { @@ -105,6 +107,17 @@ NIR_PASS(progress, nir, nir_lower_system_values); NIR_PASS_V(nir, brw_nir_lower_uniforms, is_scalar); + nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir)); + + /* nir_shader may have been cloned so make sure shader_info is in sync */ + if (nir->info != &prog->info) { + const char *name = prog->info.name; + const char *label = prog->info.label; + prog->info = *nir->info; + prog->info.name = name; + prog->info.label = label; + } + if (shader_prog) { NIR_PASS_V(nir, nir_lower_samplers, shader_prog); NIR_PASS_V(nir, nir_lower_atomics, shader_prog); @@ -123,87 +136,90 @@ return id; } -static struct gl_program *brwNewProgram( struct gl_context *ctx, - GLenum target, - GLuint id ) +static struct gl_program *brwNewProgram(struct gl_context *ctx, GLenum target, + GLuint id, bool is_arb_asm) { struct brw_context *brw = brw_context(ctx); switch (target) { - case GL_VERTEX_PROGRAM_ARB: { - struct brw_vertex_program *prog = CALLOC_STRUCT(brw_vertex_program); + case GL_VERTEX_PROGRAM_ARB: + case GL_TESS_CONTROL_PROGRAM_NV: + case GL_TESS_EVALUATION_PROGRAM_NV: + case GL_GEOMETRY_PROGRAM_NV: + case GL_COMPUTE_PROGRAM_NV: { + struct brw_program *prog = rzalloc(NULL, struct brw_program); if (prog) { - prog->id = get_new_program_id(brw->intelScreen); + prog->id = get_new_program_id(brw->screen); - return _mesa_init_gl_program(&prog->program.Base, target, id); + return _mesa_init_gl_program(&prog->program, target, id, is_arb_asm); } else return NULL; } case GL_FRAGMENT_PROGRAM_ARB: { - struct brw_fragment_program *prog = CALLOC_STRUCT(brw_fragment_program); + struct brw_program *prog = rzalloc(NULL, struct brw_program); + if (prog) { - prog->id = get_new_program_id(brw->intelScreen); + prog->id = get_new_program_id(brw->screen); - return _mesa_init_gl_program(&prog->program.Base, target, id); + return _mesa_init_gl_program(&prog->program, target, id, is_arb_asm); } else return NULL; } - case GL_GEOMETRY_PROGRAM_NV: { - struct brw_geometry_program *prog = CALLOC_STRUCT(brw_geometry_program); - if (prog) { - prog->id = get_new_program_id(brw->intelScreen); - - return _mesa_init_gl_program(&prog->program.Base, target, id); - } else { - return NULL; - } + default: + unreachable("Unsupported target in brwNewProgram()"); } +} - case GL_TESS_CONTROL_PROGRAM_NV: { - struct brw_tess_ctrl_program *prog = CALLOC_STRUCT(brw_tess_ctrl_program); - if (prog) { - prog->id = get_new_program_id(brw->intelScreen); +static void brwDeleteProgram( struct gl_context *ctx, + struct gl_program *prog ) +{ + struct brw_context *brw = brw_context(ctx); - return _mesa_init_gl_program(&prog->program.Base, target, id); - } else { - return NULL; - } - } + /* Beware! prog's refcount has reached zero, and it's about to be freed. + * + * In brw_upload_pipeline_state(), we compare brw->foo_program to + * ctx->FooProgram._Current, and flag BRW_NEW_FOO_PROGRAM if the + * pointer has changed. + * + * We cannot leave brw->foo_program as a dangling pointer to the dead + * program. malloc() may allocate the same memory for a new gl_program, + * causing us to see matching pointers...but totally different programs. + * + * We cannot set brw->foo_program to NULL, either. If we've deleted the + * active program, Mesa may set ctx->FooProgram._Current to NULL. That + * would cause us to see matching pointers (NULL == NULL), and fail to + * detect that a program has changed since our last draw. + * + * So, set it to a bogus gl_program pointer that will never match, + * causing us to properly reevaluate the state on our next draw. + * + * Getting this wrong causes heisenbugs which are very hard to catch, + * as you need a very specific allocation pattern to hit the problem. + */ + static const struct gl_program deleted_program; - case GL_TESS_EVALUATION_PROGRAM_NV: { - struct brw_tess_eval_program *prog = CALLOC_STRUCT(brw_tess_eval_program); - if (prog) { - prog->id = get_new_program_id(brw->intelScreen); + if (brw->vertex_program == prog) + brw->vertex_program = &deleted_program; - return _mesa_init_gl_program(&prog->program.Base, target, id); - } else { - return NULL; - } - } + if (brw->tess_ctrl_program == prog) + brw->tess_ctrl_program = &deleted_program; - case GL_COMPUTE_PROGRAM_NV: { - struct brw_compute_program *prog = CALLOC_STRUCT(brw_compute_program); - if (prog) { - prog->id = get_new_program_id(brw->intelScreen); + if (brw->tess_eval_program == prog) + brw->tess_eval_program = &deleted_program; - return _mesa_init_gl_program(&prog->program.Base, target, id); - } else { - return NULL; - } - } + if (brw->geometry_program == prog) + brw->geometry_program = &deleted_program; - default: - unreachable("Unsupported target in brwNewProgram()"); - } -} + if (brw->fragment_program == prog) + brw->fragment_program = &deleted_program; + + if (brw->compute_program == prog) + brw->compute_program = &deleted_program; -static void brwDeleteProgram( struct gl_context *ctx, - struct gl_program *prog ) -{ _mesa_delete_program( ctx, prog ); } @@ -213,39 +229,39 @@ GLenum target, struct gl_program *prog) { + assert(target == GL_VERTEX_PROGRAM_ARB || !prog->arb.IsPositionInvariant); + struct brw_context *brw = brw_context(ctx); - const struct brw_compiler *compiler = brw->intelScreen->compiler; + const struct brw_compiler *compiler = brw->screen->compiler; switch (target) { case GL_FRAGMENT_PROGRAM_ARB: { - struct gl_fragment_program *fprog = (struct gl_fragment_program *) prog; - struct brw_fragment_program *newFP = brw_fragment_program(fprog); - const struct brw_fragment_program *curFP = - brw_fragment_program_const(brw->fragment_program); + struct brw_program *newFP = brw_program(prog); + const struct brw_program *curFP = + brw_program_const(brw->fragment_program); if (newFP == curFP) brw->ctx.NewDriverState |= BRW_NEW_FRAGMENT_PROGRAM; - newFP->id = get_new_program_id(brw->intelScreen); + newFP->id = get_new_program_id(brw->screen); brw_add_texrect_params(prog); prog->nir = brw_create_nir(brw, NULL, prog, MESA_SHADER_FRAGMENT, true); - brw_fs_precompile(ctx, NULL, prog); + brw_fs_precompile(ctx, prog); break; } case GL_VERTEX_PROGRAM_ARB: { - struct gl_vertex_program *vprog = (struct gl_vertex_program *) prog; - struct brw_vertex_program *newVP = brw_vertex_program(vprog); - const struct brw_vertex_program *curVP = - brw_vertex_program_const(brw->vertex_program); + struct brw_program *newVP = brw_program(prog); + const struct brw_program *curVP = + brw_program_const(brw->vertex_program); if (newVP == curVP) brw->ctx.NewDriverState |= BRW_NEW_VERTEX_PROGRAM; - if (newVP->program.IsPositionInvariant) { + if (newVP->program.arb.IsPositionInvariant) { _mesa_insert_mvp_code(ctx, &newVP->program); } - newVP->id = get_new_program_id(brw->intelScreen); + newVP->id = get_new_program_id(brw->screen); /* Also tell tnl about it: */ @@ -256,7 +272,7 @@ prog->nir = brw_create_nir(brw, NULL, prog, MESA_SHADER_VERTEX, compiler->scalar_stage[MESA_SHADER_VERTEX]); - brw_vs_precompile(ctx, NULL, prog); + brw_vs_precompile(ctx, prog); break; } default: @@ -310,6 +326,25 @@ brw_emit_pipe_control_flush(brw, bits); } +static void +brw_blend_barrier(struct gl_context *ctx) +{ + struct brw_context *brw = brw_context(ctx); + + if (!ctx->Extensions.MESA_shader_framebuffer_fetch) { + if (brw->gen >= 6) { + brw_emit_pipe_control_flush(brw, + PIPE_CONTROL_RENDER_TARGET_FLUSH | + PIPE_CONTROL_CS_STALL); + brw_emit_pipe_control_flush(brw, + PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE); + } else { + brw_emit_pipe_control_flush(brw, + PIPE_CONTROL_RENDER_TARGET_FLUSH); + } + } +} + void brw_add_texrect_params(struct gl_program *prog) { @@ -375,10 +410,10 @@ functions->DeleteProgram = brwDeleteProgram; functions->ProgramStringNotify = brwProgramStringNotify; - functions->NewShader = brw_new_shader; functions->LinkShader = brw_link_shader; functions->MemoryBarrier = brw_memory_barrier; + functions->BlendBarrier = brw_blend_barrier; } struct shader_times { @@ -605,29 +640,25 @@ * change their lifetimes compared to normal operation. */ int -brw_get_shader_time_index(struct brw_context *brw, - struct gl_shader_program *shader_prog, - struct gl_program *prog, - enum shader_time_shader_type type) +brw_get_shader_time_index(struct brw_context *brw, struct gl_program *prog, + enum shader_time_shader_type type, bool is_glsl_sh) { int shader_time_index = brw->shader_time.num_entries++; assert(shader_time_index < brw->shader_time.max_entries); brw->shader_time.types[shader_time_index] = type; - int id = shader_prog ? shader_prog->Name : prog->Id; const char *name; - if (id == 0) { + if (prog->Id == 0) { name = "ff"; - } else if (!shader_prog) { - name = "prog"; - } else if (shader_prog->Label) { - name = ralloc_strdup(brw->shader_time.names, shader_prog->Label); + } else if (is_glsl_sh) { + name = prog->info.label ? + ralloc_strdup(brw->shader_time.names, prog->info.label) : "glsl"; } else { - name = "glsl"; + name = "prog"; } brw->shader_time.names[shader_time_index] = name; - brw->shader_time.ids[shader_time_index] = id; + brw->shader_time.ids[shader_time_index] = prog->Id; return shader_time_index; } @@ -650,22 +681,11 @@ } void -brw_dump_ir(const char *stage, struct gl_shader_program *shader_prog, - struct gl_shader *shader, struct gl_program *prog) +brw_dump_arb_asm(const char *stage, struct gl_program *prog) { - if (shader_prog) { - if (shader->ir) { - fprintf(stderr, - "GLSL IR for native %s shader %d:\n", - stage, shader_prog->Name); - _mesa_print_ir(stderr, shader->ir, NULL); - fprintf(stderr, "\n\n"); - } - } else { - fprintf(stderr, "ARB_%s_program %d ir for native %s shader\n", - stage, prog->Id, stage); - _mesa_print_program(prog); - } + fprintf(stderr, "ARB_%s_program %d ir for native %s shader\n", + stage, prog->Id, stage); + _mesa_print_program(prog); } void @@ -674,7 +694,7 @@ struct gl_program *prog) { const bool has_shader_channel_select = brw->is_haswell || brw->gen >= 8; - unsigned sampler_count = _mesa_fls(prog->SamplersUsed); + unsigned sampler_count = util_last_bit(prog->SamplersUsed); for (unsigned i = 0; i < sampler_count; i++) { if (!has_shader_channel_select && (prog->ShadowSamplers & (1 << i))) { /* Assume DEPTH_TEXTURE_MODE is the default: X, X, X, 1 */ diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_program_cache.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_program_cache.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_program_cache.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_program_cache.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,551 @@ +/* + Copyright (C) Intel Corp. 2006. All Rights Reserved. + Intel funded Tungsten Graphics to + develop this 3D driver. + + Permission is hereby granted, free of charge, to any person obtaining + a copy of this software and associated documentation files (the + "Software"), to deal in the Software without restriction, including + without limitation the rights to use, copy, modify, merge, publish, + distribute, sublicense, and/or sell copies of the Software, and to + permit persons to whom the Software is furnished to do so, subject to + the following conditions: + + The above copyright notice and this permission notice (including the + next paragraph) shall be included in all copies or substantial + portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE + LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION + OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION + WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + + **********************************************************************/ + /* + * Authors: + * Keith Whitwell + */ + +/** @file brw_program_cache.c + * + * This file implements a simple program cache for 965. The consumers can + * query the hash table of programs using a cache_id and program key, and + * receive the corresponding program buffer object (plus associated auxiliary + * data) in return. Objects in the cache may not have relocations + * (pointers to other BOs) in them. + * + * The inner workings are a simple hash table based on a CRC of the + * key data. + * + * Replacement is not implemented. Instead, when the cache gets too + * big we throw out all of the cache data and let it get regenerated. + */ + +#include "main/imports.h" +#include "intel_batchbuffer.h" +#include "brw_state.h" +#include "brw_vs.h" +#include "brw_wm.h" +#include "brw_gs.h" +#include "brw_cs.h" +#include "brw_program.h" + +#define FILE_DEBUG_FLAG DEBUG_STATE + +struct brw_cache_item { + /** + * Effectively part of the key, cache_id identifies what kind of state + * buffer is involved, and also which dirty flag should set. + */ + enum brw_cache_id cache_id; + + /** 32-bit hash of the key data */ + GLuint hash; + + /** for variable-sized keys */ + GLuint key_size; + GLuint aux_size; + const void *key; + + uint32_t offset; + uint32_t size; + + struct brw_cache_item *next; +}; + +static unsigned +get_program_string_id(enum brw_cache_id cache_id, const void *key) +{ + switch (cache_id) { + case BRW_CACHE_VS_PROG: + return ((struct brw_vs_prog_key *) key)->program_string_id; + case BRW_CACHE_TCS_PROG: + return ((struct brw_tcs_prog_key *) key)->program_string_id; + case BRW_CACHE_TES_PROG: + return ((struct brw_tes_prog_key *) key)->program_string_id; + case BRW_CACHE_GS_PROG: + return ((struct brw_gs_prog_key *) key)->program_string_id; + case BRW_CACHE_CS_PROG: + return ((struct brw_cs_prog_key *) key)->program_string_id; + case BRW_CACHE_FS_PROG: + return ((struct brw_wm_prog_key *) key)->program_string_id; + default: + unreachable("no program string id for this kind of program"); + } +} + +static GLuint +hash_key(struct brw_cache_item *item) +{ + GLuint *ikey = (GLuint *)item->key; + GLuint hash = item->cache_id, i; + + assert(item->key_size % 4 == 0); + + /* I'm sure this can be improved on: + */ + for (i = 0; i < item->key_size/4; i++) { + hash ^= ikey[i]; + hash = (hash << 5) | (hash >> 27); + } + + return hash; +} + +static int +brw_cache_item_equals(const struct brw_cache_item *a, + const struct brw_cache_item *b) +{ + return a->cache_id == b->cache_id && + a->hash == b->hash && + a->key_size == b->key_size && + (memcmp(a->key, b->key, a->key_size) == 0); +} + +static struct brw_cache_item * +search_cache(struct brw_cache *cache, GLuint hash, + struct brw_cache_item *lookup) +{ + struct brw_cache_item *c; + +#if 0 + int bucketcount = 0; + + for (c = cache->items[hash % cache->size]; c; c = c->next) + bucketcount++; + + fprintf(stderr, "bucket %d/%d = %d/%d items\n", hash % cache->size, + cache->size, bucketcount, cache->n_items); +#endif + + for (c = cache->items[hash % cache->size]; c; c = c->next) { + if (brw_cache_item_equals(lookup, c)) + return c; + } + + return NULL; +} + + +static void +rehash(struct brw_cache *cache) +{ + struct brw_cache_item **items; + struct brw_cache_item *c, *next; + GLuint size, i; + + size = cache->size * 3; + items = calloc(size, sizeof(*items)); + + for (i = 0; i < cache->size; i++) + for (c = cache->items[i]; c; c = next) { + next = c->next; + c->next = items[c->hash % size]; + items[c->hash % size] = c; + } + + free(cache->items); + cache->items = items; + cache->size = size; +} + + +/** + * Returns the buffer object matching cache_id and key, or NULL. + */ +bool +brw_search_cache(struct brw_cache *cache, + enum brw_cache_id cache_id, + const void *key, GLuint key_size, + uint32_t *inout_offset, void *inout_aux) +{ + struct brw_context *brw = cache->brw; + struct brw_cache_item *item; + struct brw_cache_item lookup; + GLuint hash; + + lookup.cache_id = cache_id; + lookup.key = key; + lookup.key_size = key_size; + hash = hash_key(&lookup); + lookup.hash = hash; + + item = search_cache(cache, hash, &lookup); + + if (item == NULL) + return false; + + void *aux = ((char *) item->key) + item->key_size; + + if (item->offset != *inout_offset || aux != *((void **) inout_aux)) { + brw->ctx.NewDriverState |= (1 << cache_id); + *inout_offset = item->offset; + *((void **) inout_aux) = aux; + } + + return true; +} + +static void +brw_cache_new_bo(struct brw_cache *cache, uint32_t new_size) +{ + struct brw_context *brw = cache->brw; + drm_intel_bo *new_bo; + + new_bo = drm_intel_bo_alloc(brw->bufmgr, "program cache", new_size, 64); + if (brw->has_llc) + drm_intel_gem_bo_map_unsynchronized(new_bo); + + /* Copy any existing data that needs to be saved. */ + if (cache->next_offset != 0) { + if (brw->has_llc) { + memcpy(new_bo->virtual, cache->bo->virtual, cache->next_offset); + } else { + drm_intel_bo_map(cache->bo, false); + drm_intel_bo_subdata(new_bo, 0, cache->next_offset, + cache->bo->virtual); + drm_intel_bo_unmap(cache->bo); + } + } + + if (brw->has_llc) + drm_intel_bo_unmap(cache->bo); + drm_intel_bo_unreference(cache->bo); + cache->bo = new_bo; + cache->bo_used_by_gpu = false; + + /* Since we have a new BO in place, we need to signal the units + * that depend on it (state base address on gen5+, or unit state before). + */ + brw->ctx.NewDriverState |= BRW_NEW_PROGRAM_CACHE; + brw->batch.state_base_address_emitted = false; +} + +/** + * Attempts to find an item in the cache with identical data. + */ +static const struct brw_cache_item * +brw_lookup_prog(const struct brw_cache *cache, + enum brw_cache_id cache_id, + const void *data, unsigned data_size) +{ + const struct brw_context *brw = cache->brw; + unsigned i; + const struct brw_cache_item *item; + + for (i = 0; i < cache->size; i++) { + for (item = cache->items[i]; item; item = item->next) { + int ret; + + if (item->cache_id != cache_id || item->size != data_size) + continue; + + if (!brw->has_llc) + drm_intel_bo_map(cache->bo, false); + ret = memcmp(cache->bo->virtual + item->offset, data, item->size); + if (!brw->has_llc) + drm_intel_bo_unmap(cache->bo); + if (ret) + continue; + + return item; + } + } + + return NULL; +} + +static uint32_t +brw_alloc_item_data(struct brw_cache *cache, uint32_t size) +{ + uint32_t offset; + struct brw_context *brw = cache->brw; + + /* Allocate space in the cache BO for our new program. */ + if (cache->next_offset + size > cache->bo->size) { + uint32_t new_size = cache->bo->size * 2; + + while (cache->next_offset + size > new_size) + new_size *= 2; + + brw_cache_new_bo(cache, new_size); + } + + /* If we would block on writing to an in-use program BO, just + * recreate it. + */ + if (!brw->has_llc && cache->bo_used_by_gpu) { + perf_debug("Copying busy program cache buffer.\n"); + brw_cache_new_bo(cache, cache->bo->size); + } + + offset = cache->next_offset; + + /* Programs are always 64-byte aligned, so set up the next one now */ + cache->next_offset = ALIGN(offset + size, 64); + + return offset; +} + +const void * +brw_find_previous_compile(struct brw_cache *cache, + enum brw_cache_id cache_id, + unsigned program_string_id) +{ + for (unsigned i = 0; i < cache->size; i++) { + for (struct brw_cache_item *c = cache->items[i]; c; c = c->next) { + if (c->cache_id == cache_id && + get_program_string_id(cache_id, c->key) == program_string_id) { + return c->key; + } + } + } + + return NULL; +} + +void +brw_upload_cache(struct brw_cache *cache, + enum brw_cache_id cache_id, + const void *key, + GLuint key_size, + const void *data, + GLuint data_size, + const void *aux, + GLuint aux_size, + uint32_t *out_offset, + void *out_aux) +{ + struct brw_context *brw = cache->brw; + struct brw_cache_item *item = CALLOC_STRUCT(brw_cache_item); + const struct brw_cache_item *matching_data = + brw_lookup_prog(cache, cache_id, data, data_size); + GLuint hash; + void *tmp; + + item->cache_id = cache_id; + item->size = data_size; + item->key = key; + item->key_size = key_size; + item->aux_size = aux_size; + hash = hash_key(item); + item->hash = hash; + + /* If we can find a matching prog in the cache already, then reuse the + * existing stuff without creating new copy into the underlying buffer + * object. This is notably useful for programs generating shaders at + * runtime, where multiple shaders may compile to the same thing in our + * backend. + */ + if (matching_data) { + item->offset = matching_data->offset; + } else { + item->offset = brw_alloc_item_data(cache, data_size); + + /* Copy data to the buffer */ + if (brw->has_llc) { + memcpy((char *)cache->bo->virtual + item->offset, data, data_size); + } else { + drm_intel_bo_subdata(cache->bo, item->offset, data_size, data); + } + } + + /* Set up the memory containing the key and aux_data */ + tmp = malloc(key_size + aux_size); + + memcpy(tmp, key, key_size); + memcpy(tmp + key_size, aux, aux_size); + + item->key = tmp; + + if (cache->n_items > cache->size * 1.5f) + rehash(cache); + + hash %= cache->size; + item->next = cache->items[hash]; + cache->items[hash] = item; + cache->n_items++; + + *out_offset = item->offset; + *(void **)out_aux = (void *)((char *)item->key + item->key_size); + cache->brw->ctx.NewDriverState |= 1 << cache_id; +} + +void +brw_init_caches(struct brw_context *brw) +{ + struct brw_cache *cache = &brw->cache; + + cache->brw = brw; + + cache->size = 7; + cache->n_items = 0; + cache->items = + calloc(cache->size, sizeof(struct brw_cache_item *)); + + cache->bo = drm_intel_bo_alloc(brw->bufmgr, "program cache", 4096, 64); + if (brw->has_llc) + drm_intel_gem_bo_map_unsynchronized(cache->bo); +} + +static void +brw_clear_cache(struct brw_context *brw, struct brw_cache *cache) +{ + struct brw_cache_item *c, *next; + GLuint i; + + DBG("%s\n", __func__); + + for (i = 0; i < cache->size; i++) { + for (c = cache->items[i]; c; c = next) { + next = c->next; + if (c->cache_id == BRW_CACHE_VS_PROG || + c->cache_id == BRW_CACHE_TCS_PROG || + c->cache_id == BRW_CACHE_TES_PROG || + c->cache_id == BRW_CACHE_GS_PROG || + c->cache_id == BRW_CACHE_FS_PROG || + c->cache_id == BRW_CACHE_CS_PROG) { + const void *item_aux = c->key + c->key_size; + brw_stage_prog_data_free(item_aux); + } + free((void *)c->key); + free(c); + } + cache->items[i] = NULL; + } + + cache->n_items = 0; + + /* Start putting programs into the start of the BO again, since + * we'll never find the old results. + */ + cache->next_offset = 0; + + /* We need to make sure that the programs get regenerated, since + * any offsets leftover in brw_context will no longer be valid. + */ + brw->NewGLState = ~0; + brw->ctx.NewDriverState = ~0ull; + brw->state.pipelines[BRW_RENDER_PIPELINE].mesa = ~0; + brw->state.pipelines[BRW_RENDER_PIPELINE].brw = ~0ull; + brw->state.pipelines[BRW_COMPUTE_PIPELINE].mesa = ~0; + brw->state.pipelines[BRW_COMPUTE_PIPELINE].brw = ~0ull; + + /* Also, NULL out any stale program pointers. */ + brw->vs.base.prog_data = NULL; + brw->tcs.base.prog_data = NULL; + brw->tes.base.prog_data = NULL; + brw->gs.base.prog_data = NULL; + brw->wm.base.prog_data = NULL; + brw->cs.base.prog_data = NULL; + + intel_batchbuffer_flush(brw); +} + +void +brw_program_cache_check_size(struct brw_context *brw) +{ + /* un-tuned guess. Each object is generally a page, so 2000 of them is 8 MB of + * state cache. + */ + if (brw->cache.n_items > 2000) { + perf_debug("Exceeded state cache size limit. Clearing the set " + "of compiled programs, which will trigger recompiles\n"); + brw_clear_cache(brw, &brw->cache); + } +} + + +static void +brw_destroy_cache(struct brw_context *brw, struct brw_cache *cache) +{ + + DBG("%s\n", __func__); + + if (brw->has_llc) + drm_intel_bo_unmap(cache->bo); + drm_intel_bo_unreference(cache->bo); + cache->bo = NULL; + brw_clear_cache(brw, cache); + free(cache->items); + cache->items = NULL; + cache->size = 0; +} + + +void +brw_destroy_caches(struct brw_context *brw) +{ + brw_destroy_cache(brw, &brw->cache); +} + +static const char * +cache_name(enum brw_cache_id cache_id) +{ + switch (cache_id) { + case BRW_CACHE_VS_PROG: + return "VS kernel"; + case BRW_CACHE_TCS_PROG: + return "TCS kernel"; + case BRW_CACHE_TES_PROG: + return "TES kernel"; + case BRW_CACHE_FF_GS_PROG: + return "Fixed-function GS kernel"; + case BRW_CACHE_GS_PROG: + return "GS kernel"; + case BRW_CACHE_CLIP_PROG: + return "CLIP kernel"; + case BRW_CACHE_SF_PROG: + return "SF kernel"; + case BRW_CACHE_FS_PROG: + return "FS kernel"; + case BRW_CACHE_CS_PROG: + return "CS kernel"; + default: + return "unknown"; + } +} + +void +brw_print_program_cache(struct brw_context *brw) +{ + const struct brw_cache *cache = &brw->cache; + struct brw_cache_item *item; + + if (!brw->has_llc) + drm_intel_bo_map(cache->bo, false); + + for (unsigned i = 0; i < cache->size; i++) { + for (item = cache->items[i]; item; item = item->next) { + fprintf(stderr, "%s:\n", cache_name(i)); + brw_disassemble(&brw->screen->devinfo, cache->bo->virtual, + item->offset, item->size, stderr); + } + } + + if (!brw->has_llc) + drm_intel_bo_unmap(cache->bo); +} diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_program.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_program.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_program.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_program.h 2017-06-01 10:37:10.000000000 +0000 @@ -34,7 +34,7 @@ struct nir_shader *brw_create_nir(struct brw_context *brw, const struct gl_shader_program *shader_prog, - const struct gl_program *prog, + struct gl_program *prog, gl_shader_stage stage, bool is_scalar); @@ -44,7 +44,6 @@ void brw_populate_sampler_prog_key_data(struct gl_context *ctx, const struct gl_program *prog, - unsigned sampler_count, struct brw_sampler_prog_key_data *key); bool brw_debug_recompile_sampler_key(struct brw_context *brw, const struct brw_sampler_prog_key_data *old_key, @@ -59,13 +58,14 @@ brw_stage_prog_data_free(const void *prog_data); void -brw_dump_ir(const char *stage, struct gl_shader_program *shader_prog, - struct gl_shader *shader, struct gl_program *prog); +brw_dump_arb_asm(const char *stage, struct gl_program *prog); -void brw_upload_tcs_prog(struct brw_context *brw, - uint64_t per_vertex_slots, uint32_t per_patch_slots); -void brw_upload_tes_prog(struct brw_context *brw, - uint64_t per_vertex_slots, uint32_t per_patch_slots); +void brw_upload_tcs_prog(struct brw_context *brw); +void brw_tcs_populate_key(struct brw_context *brw, + struct brw_tcs_prog_key *key); +void brw_upload_tes_prog(struct brw_context *brw); +void brw_tes_populate_key(struct brw_context *brw, + struct brw_tes_prog_key *key); #ifdef __cplusplus } /* extern "C" */ diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_queryobj.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_queryobj.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_queryobj.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_queryobj.c 2017-06-01 10:37:10.000000000 +0000 @@ -41,7 +41,6 @@ #include "brw_defines.h" #include "brw_state.h" #include "intel_batchbuffer.h" -#include "intel_reg.h" /** * Emit PIPE_CONTROLs to write the current GPU timestamp into a buffer. @@ -496,7 +495,7 @@ struct brw_context *brw = brw_context(ctx); uint64_t result = 0; - switch (brw->intelScreen->hw_has_timestamp) { + switch (brw->screen->hw_has_timestamp) { case 3: /* New kernel, always full 36bit accuracy */ drm_intel_reg_read(brw->bufmgr, TIMESTAMP | 1, &result); break; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_reg.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_reg.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_reg.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_reg.h 2017-06-01 10:37:10.000000000 +0000 @@ -52,7 +52,7 @@ extern "C" { #endif -struct brw_device_info; +struct gen_device_info; /** Number of general purpose registers (VS, WM, etc) */ #define BRW_MAX_GRF 128 @@ -81,12 +81,20 @@ #define BRW_SWIZZLE_ZZZZ BRW_SWIZZLE4(2,2,2,2) #define BRW_SWIZZLE_WWWW BRW_SWIZZLE4(3,3,3,3) #define BRW_SWIZZLE_XYXY BRW_SWIZZLE4(0,1,0,1) +#define BRW_SWIZZLE_YXYX BRW_SWIZZLE4(1,0,1,0) #define BRW_SWIZZLE_XZXZ BRW_SWIZZLE4(0,2,0,2) #define BRW_SWIZZLE_YZXW BRW_SWIZZLE4(1,2,0,3) #define BRW_SWIZZLE_YWYW BRW_SWIZZLE4(1,3,1,3) #define BRW_SWIZZLE_ZXYW BRW_SWIZZLE4(2,0,1,3) #define BRW_SWIZZLE_ZWZW BRW_SWIZZLE4(2,3,2,3) +#define BRW_SWIZZLE_WZWZ BRW_SWIZZLE4(3,2,3,2) #define BRW_SWIZZLE_WZYX BRW_SWIZZLE4(3,2,1,0) +#define BRW_SWIZZLE_XXZZ BRW_SWIZZLE4(0,0,2,2) +#define BRW_SWIZZLE_YYWW BRW_SWIZZLE4(1,1,3,3) +#define BRW_SWIZZLE_YXWZ BRW_SWIZZLE4(1,0,3,2) + +#define BRW_SWZ_COMP_INPUT(comp) (BRW_SWIZZLE_XYZW >> ((comp)*2)) +#define BRW_SWZ_COMP_OUTPUT(comp) (BRW_SWIZZLE_XYZW << ((comp)*2)) static inline bool brw_is_single_value_swizzle(unsigned swiz) @@ -220,7 +228,7 @@ BRW_REGISTER_TYPE_Q, }; -unsigned brw_reg_type_to_hw_type(const struct brw_device_info *devinfo, +unsigned brw_reg_type_to_hw_type(const struct gen_device_info *devinfo, enum brw_reg_type type, enum brw_reg_file file); const char *brw_reg_type_letters(unsigned brw_reg_type); uint32_t brw_swizzle_immediate(enum brw_reg_type type, uint32_t x, unsigned swz); @@ -292,15 +300,19 @@ case BRW_REGISTER_TYPE_UD: case BRW_REGISTER_TYPE_D: case BRW_REGISTER_TYPE_F: + case BRW_REGISTER_TYPE_VF: return 4; case BRW_REGISTER_TYPE_UW: case BRW_REGISTER_TYPE_W: + case BRW_REGISTER_TYPE_UV: + case BRW_REGISTER_TYPE_V: + case BRW_REGISTER_TYPE_HF: return 2; case BRW_REGISTER_TYPE_UB: case BRW_REGISTER_TYPE_B: return 1; default: - return 0; + unreachable("not reached"); } } @@ -513,14 +525,6 @@ } static inline struct brw_reg -suboffset(struct brw_reg reg, unsigned delta) -{ - reg.subnr += delta * type_sz(reg.type); - return reg; -} - - -static inline struct brw_reg offset(struct brw_reg reg, unsigned delta) { reg.nr += delta; @@ -537,6 +541,11 @@ return reg; } +static inline struct brw_reg +suboffset(struct brw_reg reg, unsigned delta) +{ + return byte_offset(reg, delta * type_sz(reg.type)); +} /** Construct unsigned word[16] register */ static inline struct brw_reg @@ -560,6 +569,12 @@ } static inline struct brw_reg +brw_ud1_reg(enum brw_reg_file file, unsigned nr, unsigned subnr) +{ + return retype(brw_vec1_reg(file, nr, subnr), BRW_REGISTER_TYPE_UD); +} + +static inline struct brw_reg brw_imm_reg(enum brw_reg_type type) { return brw_reg(BRW_IMMEDIATE_VALUE, @@ -712,6 +727,12 @@ return brw_vec16_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); } +static inline struct brw_reg +brw_vecn_grf(unsigned width, unsigned nr, unsigned subnr) +{ + return brw_vecn_reg(width, BRW_GENERAL_REGISTER_FILE, nr, subnr); +} + static inline struct brw_reg brw_uw8_grf(unsigned nr, unsigned subnr) @@ -782,19 +803,9 @@ } static inline struct brw_reg -brw_sr0_reg(void) +brw_sr0_reg(unsigned subnr) { - return brw_reg(BRW_ARCHITECTURE_REGISTER_FILE, - BRW_ARF_STATE, - 0, - 0, - 0, - BRW_REGISTER_TYPE_UD, - BRW_VERTICAL_STRIDE_8, - BRW_WIDTH_8, - BRW_HORIZONTAL_STRIDE_1, - BRW_SWIZZLE_XYZW, - WRITEMASK_XYZW); + return brw_ud1_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_STATE, subnr); } static inline struct brw_reg @@ -823,6 +834,18 @@ } static inline struct brw_reg +brw_vmask_reg() +{ + return brw_sr0_reg(3); +} + +static inline struct brw_reg +brw_dmask_reg() +{ + return brw_sr0_reg(2); +} + +static inline struct brw_reg brw_message_reg(unsigned nr) { return brw_vec8_reg(BRW_MESSAGE_REGISTER_FILE, nr, 0); @@ -965,6 +988,13 @@ return (1 << n) - 1; } +static inline unsigned +brw_writemask_for_component_packing(unsigned n, unsigned first_component) +{ + assert(first_component + n <= 4); + return (((1 << n) - 1) << first_component); +} + static inline struct brw_reg negate(struct brw_reg reg) { diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_sampler_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_sampler_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_sampler_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_sampler_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -88,6 +88,7 @@ unsigned wrap_s, unsigned wrap_t, unsigned wrap_r, + unsigned base_level, unsigned min_lod, unsigned max_lod, int lod_bias, @@ -132,6 +133,21 @@ ss[0] |= SET_FIELD(lod_bias & 0x7ff, GEN4_SAMPLER_LOD_BIAS) | SET_FIELD(shadow_function, GEN4_SAMPLER_SHADOW_FUNCTION); + /* This field has existed since the original i965, but is declared MBZ + * until Sandy Bridge. According to the PRM: + * + * "This was added to match OpenGL semantics" + * + * In particular, OpenGL allowed you to offset by 0.5 in certain cases + * to get slightly better filtering. On Ivy Bridge and above, it + * appears that this is added to RENDER_SURFACE_STATE::SurfaceMinLOD so + * the right value is 0.0 or 0.5 (if you want the wacky behavior). On + * Sandy Bridge, however, this sum does not seem to occur and you have + * to set it to the actual base level of the texture. + */ + if (brw->gen == 6) + ss[0] |= SET_FIELD(base_level, BRW_SAMPLER_BASE_MIPLEVEL); + if (brw->gen == 6 && min_filter != mag_filter) ss[0] |= GEN6_SAMPLER_MIN_MAG_NOT_EQUAL; @@ -149,7 +165,7 @@ static uint32_t translate_wrap_mode(struct brw_context *brw, GLenum wrap, bool using_nearest) { - switch( wrap ) { + switch (wrap) { case GL_REPEAT: return BRW_TEXCOORDMODE_WRAP; case GL_CLAMP: @@ -196,6 +212,16 @@ wrap_mode == GEN8_TEXCOORDMODE_HALF_BORDER; } +static bool +has_component(mesa_format format, int i) +{ + if (_mesa_is_format_color_format(format)) + return _mesa_format_has_color_component(format, i); + + /* depth and stencil have only one component */ + return i == 0; +} + /** * Upload SAMPLER_BORDER_COLOR_STATE. */ @@ -203,7 +229,7 @@ upload_default_color(struct brw_context *brw, const struct gl_sampler_object *sampler, mesa_format format, GLenum base_format, - bool is_integer_format, + bool is_integer_format, bool is_stencil_sampling, uint32_t *sdc_offset) { union gl_color_union color; @@ -267,7 +293,7 @@ uint32_t *sdc = brw_state_batch(brw, AUB_TRACE_SAMPLER_DEFAULT_COLOR, 4 * 4, 64, sdc_offset); memcpy(sdc, color.ui, 4 * 4); - } else if (brw->is_haswell && is_integer_format) { + } else if (brw->is_haswell && (is_integer_format || is_stencil_sampling)) { /* Haswell's integer border color support is completely insane: * SAMPLER_BORDER_COLOR_STATE is 20 DWords. The first four are * for float colors. The next 12 DWords are MBZ and only exist to @@ -281,7 +307,9 @@ memset(sdc, 0, 20 * 4); sdc = &sdc[16]; - int bits_per_channel = _mesa_get_format_bits(format, GL_RED_BITS); + bool stencil = format == MESA_FORMAT_S_UINT8 || is_stencil_sampling; + const int bits_per_channel = + _mesa_get_format_bits(format, stencil ? GL_STENCIL_BITS : GL_RED_BITS); /* From the Haswell PRM, "Command Reference: Structures", Page 36: * "If any color channel is missing from the surface format, @@ -291,7 +319,7 @@ */ unsigned c[4] = { 0, 0, 0, 1 }; for (int i = 0; i < 4; i++) { - if (_mesa_format_has_color_component(format, i)) + if (has_component(format, i)) c[i] = color.ui[i]; } @@ -376,12 +404,12 @@ * Sets the sampler state for a single unit based off of the sampler key * entry. */ -void +static void brw_update_sampler_state(struct brw_context *brw, GLenum target, bool tex_cube_map_seamless, GLfloat tex_unit_lod_bias, mesa_format format, GLenum base_format, - bool is_integer_format, + const struct gl_texture_object *texObj, const struct gl_sampler_object *sampler, uint32_t *sampler_state, uint32_t batch_offset_for_sampler_state) @@ -464,7 +492,7 @@ * integer formats. Fall back to CLAMP for now. */ if ((tex_cube_map_seamless || sampler->CubeMapSeamless) && - !(brw->gen == 7 && !brw->is_haswell && is_integer_format)) { + !(brw->gen == 7 && !brw->is_haswell && texObj->_IsIntegerFormat)) { wrap_s = BRW_TEXCOORDMODE_CUBE; wrap_t = BRW_TEXCOORDMODE_CUBE; wrap_r = BRW_TEXCOORDMODE_CUBE; @@ -490,8 +518,13 @@ } const int lod_bits = brw->gen >= 7 ? 8 : 6; - const unsigned min_lod = U_FIXED(CLAMP(sampler->MinLod, 0, 13), lod_bits); - const unsigned max_lod = U_FIXED(CLAMP(sampler->MaxLod, 0, 13), lod_bits); + const float hw_max_lod = brw->gen >= 7 ? 14 : 13; + const unsigned base_level = + U_FIXED(CLAMP(texObj->MinLevel + texObj->BaseLevel, 0, hw_max_lod), 1); + const unsigned min_lod = + U_FIXED(CLAMP(sampler->MinLod, 0, hw_max_lod), lod_bits); + const unsigned max_lod = + U_FIXED(CLAMP(sampler->MaxLod, 0, hw_max_lod), lod_bits); const int lod_bias = S_FIXED(CLAMP(tex_unit_lod_bias + sampler->LodBias, -16, 15), lod_bits); @@ -503,8 +536,8 @@ if (wrap_mode_needs_border_color(wrap_s) || wrap_mode_needs_border_color(wrap_t) || wrap_mode_needs_border_color(wrap_r)) { - upload_default_color(brw, sampler, - format, base_format, is_integer_format, + upload_default_color(brw, sampler, format, base_format, + texObj->_IsIntegerFormat, texObj->StencilSampling, &border_color_offset); } @@ -517,7 +550,7 @@ max_anisotropy, address_rounding, wrap_s, wrap_t, wrap_r, - min_lod, max_lod, lod_bias, + base_level, min_lod, max_lod, lod_bias, shadow_function, non_normalized_coords, border_color_offset); @@ -542,8 +575,7 @@ brw_update_sampler_state(brw, texObj->Target, ctx->Texture.CubeMapSeamless, texUnit->LodBias, firstImage->TexFormat, firstImage->_BaseFormat, - texObj->_IsIntegerFormat, - sampler, + texObj, sampler, sampler_state, batch_offset_for_sampler_state); } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -86,8 +86,36 @@ * its children, or just the issue_time if it's a leaf node. */ int delay; + + /** + * Preferred exit node among the (direct or indirect) successors of this + * node. Among the scheduler nodes blocked by this node, this will be the + * one that may cause earliest program termination, or NULL if none of the + * successors is an exit node. + */ + schedule_node *exit; + + bool is_barrier; }; +/** + * Lower bound of the scheduling time after which one of the instructions + * blocked by this node may lead to program termination. + * + * exit_unblocked_time() determines a strict partial ordering relation '«' on + * the set of scheduler nodes as follows: + * + * n « m <-> exit_unblocked_time(n) < exit_unblocked_time(m) + * + * which can be used to heuristically order nodes according to how early they + * can unblock an exit node and lead to program termination. + */ +static inline int +exit_unblocked_time(const schedule_node *n) +{ + return n->exit ? n->exit->unblocked_time : INT_MAX; +} + void schedule_node::set_latency_gen4() { @@ -414,7 +442,6 @@ this->instructions_to_schedule = 0; this->post_reg_alloc = (mode == SCHEDULE_POST); this->mode = mode; - this->time = 0; if (!post_reg_alloc) { this->reg_pressure_in = rzalloc_array(mem_ctx, int, block_count); @@ -459,7 +486,8 @@ void run(cfg_t *cfg); void add_insts_from_block(bblock_t *block); - void compute_delay(schedule_node *node); + void compute_delays(); + void compute_exits(); virtual void calculate_deps() = 0; virtual schedule_node *choose_instruction_to_schedule() = 0; @@ -485,7 +513,6 @@ int instructions_to_schedule; int grf_count; int hw_reg_count; - int time; int reg_pressure; int block_idx; exec_list instructions; @@ -591,7 +618,7 @@ if (inst->src[i].nr >= hw_reg_count) continue; - for (int j = 0; j < inst->regs_read(i); j++) + for (unsigned j = 0; j < regs_read(inst, i); j++) hw_reads_remaining[inst->src[i].nr + j]++; } } @@ -673,7 +700,7 @@ reads_remaining[inst->src[i].nr]--; } else if (inst->src[i].file == FIXED_GRF && inst->src[i].nr < hw_reg_count) { - for (int off = 0; off < inst->regs_read(i); off++) + for (unsigned off = 0; off < regs_read(inst, i); off++) hw_reads_remaining[inst->src[i].nr + off]--; } } @@ -702,7 +729,7 @@ if (inst->src[i].file == FIXED_GRF && inst->src[i].nr < hw_reg_count) { - for (int off = 0; off < inst->regs_read(i); off++) { + for (unsigned off = 0; off < regs_read(inst, i); off++) { int reg = inst->src[i].nr + off; if (!BITSET_TEST(hw_liveout[block_idx], reg) && hw_reads_remaining[reg] == 1) { @@ -761,7 +788,7 @@ schedule_node::schedule_node(backend_instruction *inst, instruction_scheduler *sched) { - const struct brw_device_info *devinfo = sched->bs->devinfo; + const struct gen_device_info *devinfo = sched->bs->devinfo; this->inst = inst; this->child_array_size = 0; @@ -772,6 +799,8 @@ this->unblocked_time = 0; this->cand_generation = 0; this->delay = 0; + this->exit = NULL; + this->is_barrier = false; /* We can't measure Gen6 timings directly but expect them to be much * closer to Gen7 than Gen4. @@ -796,17 +825,48 @@ this->instructions_to_schedule = block->end_ip - block->start_ip + 1; } -/** Recursive computation of the delay member of a node. */ +/** Computation of the delay member of each node. */ void -instruction_scheduler::compute_delay(schedule_node *n) +instruction_scheduler::compute_delays() { - if (!n->child_count) { - n->delay = issue_time(n->inst); - } else { + foreach_in_list_reverse(schedule_node, n, &instructions) { + if (!n->child_count) { + n->delay = issue_time(n->inst); + } else { + for (int i = 0; i < n->child_count; i++) { + assert(n->children[i]->delay); + n->delay = MAX2(n->delay, n->latency + n->children[i]->delay); + } + } + } +} + +void +instruction_scheduler::compute_exits() +{ + /* Calculate a lower bound of the scheduling time of each node in the + * graph. This is analogous to the node's critical path but calculated + * from the top instead of from the bottom of the block. + */ + foreach_in_list(schedule_node, n, &instructions) { + for (int i = 0; i < n->child_count; i++) { + n->children[i]->unblocked_time = + MAX2(n->children[i]->unblocked_time, + n->unblocked_time + issue_time(n->inst) + n->child_latency[i]); + } + } + + /* Calculate the exit of each node by induction based on the exit nodes of + * its children. The preferred exit of a node is the one among the exit + * nodes of its children which can be unblocked first according to the + * optimistic unblocked time estimate calculated above. + */ + foreach_in_list_reverse(schedule_node, n, &instructions) { + n->exit = (n->inst->opcode == FS_OPCODE_DISCARD_JUMP ? n : NULL); + for (int i = 0; i < n->child_count; i++) { - if (!n->children[i]->delay) - compute_delay(n->children[i]); - n->delay = MAX2(n->delay, n->latency + n->children[i]->delay); + if (exit_unblocked_time(n->children[i]) < exit_unblocked_time(n)) + n->exit = n->children[i]->exit; } } } @@ -872,9 +932,13 @@ schedule_node *prev = (schedule_node *)n->prev; schedule_node *next = (schedule_node *)n->next; + n->is_barrier = true; + if (prev) { while (!prev->is_head_sentinel()) { add_dep(prev, n, 0); + if (prev->is_barrier) + break; prev = (schedule_node *)prev->prev; } } @@ -882,6 +946,8 @@ if (next) { while (!next->is_tail_sentinel()) { add_dep(n, next, 0); + if (next->is_barrier) + break; next = (schedule_node *)next->next; } } @@ -901,8 +967,7 @@ { return inst->opcode == FS_OPCODE_PLACEHOLDER_HALT || inst->is_control_flow() || - inst->eot || - (inst->has_side_effects() && inst->opcode != FS_OPCODE_FB_WRITE); + inst->has_side_effects(); } void @@ -937,16 +1002,17 @@ for (int i = 0; i < inst->sources; i++) { if (inst->src[i].file == VGRF) { if (post_reg_alloc) { - for (int r = 0; r < inst->regs_read(i); r++) + for (unsigned r = 0; r < regs_read(inst, i); r++) add_dep(last_grf_write[inst->src[i].nr + r], n); } else { - for (int r = 0; r < inst->regs_read(i); r++) { - add_dep(last_grf_write[inst->src[i].nr * 16 + inst->src[i].reg_offset + r], n); + for (unsigned r = 0; r < regs_read(inst, i); r++) { + add_dep(last_grf_write[inst->src[i].nr * 16 + + inst->src[i].offset / REG_SIZE + r], n); } } } else if (inst->src[i].file == FIXED_GRF) { if (post_reg_alloc) { - for (int r = 0; r < inst->regs_read(i); r++) + for (unsigned r = 0; r < regs_read(inst, i); r++) add_dep(last_grf_write[inst->src[i].nr + r], n); } else { add_dep(last_fixed_grf_write, n); @@ -984,14 +1050,16 @@ /* write-after-write deps. */ if (inst->dst.file == VGRF) { if (post_reg_alloc) { - for (int r = 0; r < inst->regs_written; r++) { + for (unsigned r = 0; r < regs_written(inst); r++) { add_dep(last_grf_write[inst->dst.nr + r], n); last_grf_write[inst->dst.nr + r] = n; } } else { - for (int r = 0; r < inst->regs_written; r++) { - add_dep(last_grf_write[inst->dst.nr * 16 + inst->dst.reg_offset + r], n); - last_grf_write[inst->dst.nr * 16 + inst->dst.reg_offset + r] = n; + for (unsigned r = 0; r < regs_written(inst); r++) { + add_dep(last_grf_write[inst->dst.nr * 16 + + inst->dst.offset / REG_SIZE + r], n); + last_grf_write[inst->dst.nr * 16 + + inst->dst.offset / REG_SIZE + r] = n; } } } else if (inst->dst.file == MRF) { @@ -1009,7 +1077,7 @@ } } else if (inst->dst.file == FIXED_GRF) { if (post_reg_alloc) { - for (int r = 0; r < inst->regs_written; r++) + for (unsigned r = 0; r < regs_written(inst); r++) last_grf_write[inst->dst.nr + r] = n; } else { last_fixed_grf_write = n; @@ -1060,16 +1128,17 @@ for (int i = 0; i < inst->sources; i++) { if (inst->src[i].file == VGRF) { if (post_reg_alloc) { - for (int r = 0; r < inst->regs_read(i); r++) + for (unsigned r = 0; r < regs_read(inst, i); r++) add_dep(n, last_grf_write[inst->src[i].nr + r], 0); } else { - for (int r = 0; r < inst->regs_read(i); r++) { - add_dep(n, last_grf_write[inst->src[i].nr * 16 + inst->src[i].reg_offset + r], 0); + for (unsigned r = 0; r < regs_read(inst, i); r++) { + add_dep(n, last_grf_write[inst->src[i].nr * 16 + + inst->src[i].offset / REG_SIZE + r], 0); } } } else if (inst->src[i].file == FIXED_GRF) { if (post_reg_alloc) { - for (int r = 0; r < inst->regs_read(i); r++) + for (unsigned r = 0; r < regs_read(inst, i); r++) add_dep(n, last_grf_write[inst->src[i].nr + r], 0); } else { add_dep(n, last_fixed_grf_write, 0); @@ -1109,11 +1178,12 @@ */ if (inst->dst.file == VGRF) { if (post_reg_alloc) { - for (int r = 0; r < inst->regs_written; r++) + for (unsigned r = 0; r < regs_written(inst); r++) last_grf_write[inst->dst.nr + r] = n; } else { - for (int r = 0; r < inst->regs_written; r++) { - last_grf_write[inst->dst.nr * 16 + inst->dst.reg_offset + r] = n; + for (unsigned r = 0; r < regs_written(inst); r++) { + last_grf_write[inst->dst.nr * 16 + + inst->dst.offset / REG_SIZE + r] = n; } } } else if (inst->dst.file == MRF) { @@ -1131,7 +1201,7 @@ } } else if (inst->dst.file == FIXED_GRF) { if (post_reg_alloc) { - for (int r = 0; r < inst->regs_written; r++) + for (unsigned r = 0; r < regs_written(inst); r++) last_grf_write[inst->dst.nr + r] = n; } else { last_fixed_grf_write = n; @@ -1197,7 +1267,7 @@ /* read-after-write deps. */ for (int i = 0; i < 3; i++) { if (inst->src[i].file == VGRF) { - for (unsigned j = 0; j < inst->regs_read(i); ++j) + for (unsigned j = 0; j < regs_read(inst, i); ++j) add_dep(last_grf_write[inst->src[i].nr + j], n); } else if (inst->src[i].file == FIXED_GRF) { add_dep(last_fixed_grf_write, n); @@ -1231,7 +1301,7 @@ /* write-after-write deps. */ if (inst->dst.file == VGRF) { - for (unsigned j = 0; j < inst->regs_written; ++j) { + for (unsigned j = 0; j < regs_written(inst); ++j) { add_dep(last_grf_write[inst->dst.nr + j], n); last_grf_write[inst->dst.nr + j] = n; } @@ -1279,7 +1349,7 @@ /* write-after-read deps. */ for (int i = 0; i < 3; i++) { if (inst->src[i].file == VGRF) { - for (unsigned j = 0; j < inst->regs_read(i); ++j) + for (unsigned j = 0; j < regs_read(inst, i); ++j) add_dep(n, last_grf_write[inst->src[i].nr + j]); } else if (inst->src[i].file == FIXED_GRF) { add_dep(n, last_fixed_grf_write); @@ -1312,7 +1382,7 @@ * can mark this as WAR dependency. */ if (inst->dst.file == VGRF) { - for (unsigned j = 0; j < inst->regs_written; ++j) + for (unsigned j = 0; j < regs_written(inst); ++j) last_grf_write[inst->dst.nr + j] = n; } else if (inst->dst.file == MRF) { last_mrf_write[inst->dst.nr] = n; @@ -1348,11 +1418,15 @@ if (mode == SCHEDULE_PRE || mode == SCHEDULE_POST) { int chosen_time = 0; - /* Of the instructions ready to execute or the closest to - * being ready, choose the oldest one. + /* Of the instructions ready to execute or the closest to being ready, + * choose the one most likely to unblock an early program exit, or + * otherwise the oldest one. */ foreach_in_list(schedule_node, n, &instructions) { - if (!chosen || n->unblocked_time < chosen_time) { + if (!chosen || + exit_unblocked_time(n) < exit_unblocked_time(chosen) || + (exit_unblocked_time(n) == exit_unblocked_time(chosen) && + n->unblocked_time < chosen_time)) { chosen = n; chosen_time = n->unblocked_time; } @@ -1413,16 +1487,16 @@ if (v->devinfo->gen < 7) { fs_inst *chosen_inst = (fs_inst *)chosen->inst; - /* We use regs_written > 1 as our test for the kind of send - * instruction to avoid -- only sends generate many regs, and a - * single-result send is probably actually reducing register - * pressure. + /* We use size_written > 4 * exec_size as our test for the kind + * of send instruction to avoid -- only sends generate many + * regs, and a single-result send is probably actually reducing + * register pressure. */ - if (inst->regs_written <= inst->exec_size / 8 && - chosen_inst->regs_written > chosen_inst->exec_size / 8) { + if (inst->size_written <= 4 * inst->exec_size && + chosen_inst->size_written > 4 * chosen_inst->exec_size) { chosen = n; continue; - } else if (inst->regs_written > chosen_inst->regs_written) { + } else if (inst->size_written > chosen_inst->size_written) { continue; } } @@ -1441,6 +1515,15 @@ continue; } + /* Prefer the node most likely to unblock an early program exit. + */ + if (exit_unblocked_time(n) < exit_unblocked_time(chosen)) { + chosen = n; + continue; + } else if (exit_unblocked_time(n) > exit_unblocked_time(chosen)) { + continue; + } + /* If all other metrics are equal, we prefer the first instruction in * the list (program execution). */ @@ -1488,8 +1571,8 @@ void instruction_scheduler::schedule_instructions(bblock_t *block) { - const struct brw_device_info *devinfo = bs->devinfo; - time = 0; + const struct gen_device_info *devinfo = bs->devinfo; + int time = 0; if (!post_reg_alloc) reg_pressure = reg_pressure_in[block->num]; block_idx = block->num; @@ -1611,9 +1694,6 @@ setup_liveness(cfg); foreach_block(block, cfg) { - if (block->end_ip - block->start_ip <= 1) - continue; - if (reads_remaining) { memset(reads_remaining, 0, grf_count * sizeof(*reads_remaining)); @@ -1629,9 +1709,8 @@ calculate_deps(); - foreach_in_list(schedule_node, n, &instructions) { - compute_delay(n); - } + compute_delays(); + compute_exits(); schedule_instructions(block); } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_sf.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_sf.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_sf.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_sf.c 2017-06-01 10:37:10.000000000 +0000 @@ -29,7 +29,7 @@ * Keith Whitwell */ - +#include "compiler/nir/nir.h" #include "main/macros.h" #include "main/mtypes.h" #include "main/enums.h" @@ -59,7 +59,7 @@ mem_ctx = ralloc_context(NULL); /* Begin the compilation: */ - brw_init_codegen(brw->intelScreen->devinfo, &c.func, mem_ctx); + brw_init_codegen(&brw->screen->devinfo, &c.func, mem_ctx); c.key = *key; c.vue_map = brw->vue_map_geom_out; @@ -79,7 +79,6 @@ c.prog_data.urb_read_length = c.nr_attr_regs; c.prog_data.urb_entry_size = c.nr_setup_regs * 2; - c.has_flat_shading = brw_any_flat_varyings(&key->interpolation_mode); /* Which primitive? Or all three? */ @@ -118,7 +117,7 @@ if (unlikely(INTEL_DEBUG & DEBUG_SF)) { fprintf(stderr, "sf:\n"); - brw_disassemble(brw->intelScreen->devinfo, + brw_disassemble(&brw->screen->devinfo, c.func.store, 0, program_size, stderr); fprintf(stderr, "\n"); } @@ -148,7 +147,7 @@ _NEW_PROGRAM | _NEW_TRANSFORM, BRW_NEW_BLORP | - BRW_NEW_INTERPOLATION_MAP | + BRW_NEW_FS_PROG_DATA | BRW_NEW_REDUCED_PRIMITIVE | BRW_NEW_VUE_MAP_GEOM_OUT)) return; @@ -190,15 +189,13 @@ /* _NEW_POINT */ key.do_point_sprite = ctx->Point.PointSprite; if (key.do_point_sprite) { - int i; - - for (i = 0; i < 8; i++) { - if (ctx->Point.CoordReplace[i]) - key.point_sprite_coord_replace |= (1 << i); - } + key.point_sprite_coord_replace = ctx->Point.CoordReplace & 0xff; } - if (brw->fragment_program->Base.InputsRead & BITFIELD64_BIT(VARYING_SLOT_PNTC)) + if (brw->fragment_program->info.inputs_read & + BITFIELD64_BIT(VARYING_SLOT_PNTC)) { key.do_point_coord = 1; + } + /* * Window coordinates in a FBO are inverted, which means point * sprite origin must be inverted, too. @@ -206,8 +203,13 @@ if ((ctx->Point.SpriteOrigin == GL_LOWER_LEFT) != render_to_fbo) key.sprite_origin_lower_left = true; - /* BRW_NEW_INTERPOLATION_MAP */ - key.interpolation_mode = brw->interpolation_mode; + /* BRW_NEW_FS_PROG_DATA */ + const struct brw_wm_prog_data *wm_prog_data = + brw_wm_prog_data(brw->wm.base.prog_data); + if (wm_prog_data) { + key.contains_flat_varying = wm_prog_data->contains_flat_varying; + key.interp_mode = wm_prog_data->interp_mode; + } /* _NEW_LIGHT | _NEW_PROGRAM */ key.do_twoside_color = ((ctx->Light.Enabled && ctx->Light.Model.TwoSide) || diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_sf_emit.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_sf_emit.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_sf_emit.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_sf_emit.c 2017-06-01 10:37:10.000000000 +0000 @@ -162,7 +162,7 @@ int i; for (i = 0; i < c->vue_map.num_slots; i++) { - if (c->key.interpolation_mode.mode[i] == INTERP_QUALIFIER_FLAT) { + if (c->key.interp_mode[i] == INTERP_MODE_FLAT) { brw_MOV(p, get_vue_slot(c, dst, i), get_vue_slot(c, src, i)); @@ -176,7 +176,7 @@ int count = 0; for (i = 0; i < c->vue_map.num_slots; i++) - if (c->key.interpolation_mode.mode[i] == INTERP_QUALIFIER_FLAT) + if (c->key.interp_mode[i] == INTERP_MODE_FLAT) count++; return count; @@ -336,17 +336,17 @@ GLushort *pc_linear) { bool is_last_attr = (reg == c->nr_setup_regs - 1); - enum glsl_interp_qualifier interp; + enum glsl_interp_mode interp; *pc_persp = 0; *pc_linear = 0; *pc = 0xf; - interp = c->key.interpolation_mode.mode[vert_reg_to_vue_slot(c, reg, 0)]; - if (interp == INTERP_QUALIFIER_SMOOTH) { + interp = c->key.interp_mode[vert_reg_to_vue_slot(c, reg, 0)]; + if (interp == INTERP_MODE_SMOOTH) { *pc_linear = 0xf; *pc_persp = 0xf; - } else if (interp == INTERP_QUALIFIER_NOPERSPECTIVE) + } else if (interp == INTERP_MODE_NOPERSPECTIVE) *pc_linear = 0xf; /* Maybe only processs one attribute on the final round: @@ -354,11 +354,11 @@ if (vert_reg_to_varying(c, reg, 1) != BRW_VARYING_SLOT_COUNT) { *pc |= 0xf0; - interp = c->key.interpolation_mode.mode[vert_reg_to_vue_slot(c, reg, 1)]; - if (interp == INTERP_QUALIFIER_SMOOTH) { + interp = c->key.interp_mode[vert_reg_to_vue_slot(c, reg, 1)]; + if (interp == INTERP_MODE_SMOOTH) { *pc_linear |= 0xf0; *pc_persp |= 0xf0; - } else if (interp == INTERP_QUALIFIER_NOPERSPECTIVE) + } else if (interp == INTERP_MODE_NOPERSPECTIVE) *pc_linear |= 0xf0; } @@ -428,7 +428,7 @@ if (c->key.do_twoside_color) do_twoside_color(c); - if (c->has_flat_shading) + if (c->key.contains_flat_varying) do_flatshade_triangle(c); @@ -514,7 +514,7 @@ invert_det(c); copy_z_inv_w(c); - if (c->has_flat_shading) + if (c->key.contains_flat_varying) do_flatshade_line(c); for (i = 0; i < c->nr_setup_regs; i++) diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_sf.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_sf.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_sf.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_sf.h 2017-06-01 10:37:10.000000000 +0000 @@ -46,7 +46,8 @@ struct brw_sf_prog_key { GLbitfield64 attrs; - struct interpolation_mode_map interpolation_mode; + bool contains_flat_varying; + const unsigned char *interp_mode; uint8_t point_sprite_coord_replace; GLuint primitive:2; GLuint do_twoside_color:1; @@ -98,7 +99,6 @@ unsigned flag_value; struct brw_vue_map vue_map; - bool has_flat_shading; }; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_sf_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_sf_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_sf_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_sf_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -245,7 +245,7 @@ * Chipset Graphics Controller Programmer's Reference Manual, * Volume 2: 3D/Media", Revision 1.0b as of January 2008, * available at - * http://intellinuxgraphics.org/documentation.html + * https://01.org/linuxgraphics/documentation/hardware-specification-prms * at the time of this writing). * * It does work on at least some devices, if not all; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_shader.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_shader.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_shader.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_shader.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -127,10 +127,15 @@ } } -uint32_t -brw_texture_offset(int *offsets, unsigned num_components) +bool +brw_texture_offset(int *offsets, unsigned num_components, uint32_t *offset_bits) { - if (!offsets) return 0; /* nonconstant offset; caller will handle it. */ + if (!offsets) return false; /* nonconstant offset; caller will handle it. */ + + /* offset out of bounds; caller will handle it. */ + for (unsigned i = 0; i < num_components; i++) + if (offsets[i] > 7 || offsets[i] < -8) + return false; /* Combine all three offsets into a single unsigned dword: * @@ -138,16 +143,16 @@ * bits 7:4 - V Offset (Y component) * bits 3:0 - R Offset (Z component) */ - unsigned offset_bits = 0; + *offset_bits = 0; for (unsigned i = 0; i < num_components; i++) { const unsigned shift = 4 * (2 - i); - offset_bits |= (offsets[i] << shift) & (0xF << shift); + *offset_bits |= (offsets[i] << shift) & (0xF << shift); } - return offset_bits; + return true; } const char * -brw_instruction_name(const struct brw_device_info *devinfo, enum opcode op) +brw_instruction_name(const struct gen_device_info *devinfo, enum opcode op) { switch (op) { case BRW_OPCODE_ILLEGAL ... BRW_OPCODE_NOP: @@ -165,6 +170,10 @@ return "fb_write_logical"; case FS_OPCODE_REP_FB_WRITE: return "rep_fb_write"; + case FS_OPCODE_FB_READ: + return "fb_read"; + case FS_OPCODE_FB_READ_LOGICAL: + return "fb_read_logical"; case SHADER_OPCODE_RCP: return "rcp"; @@ -313,6 +322,18 @@ return "pack_bytes"; case VEC4_OPCODE_UNPACK_UNIFORM: return "unpack_uniform"; + case VEC4_OPCODE_FROM_DOUBLE: + return "double_to_single"; + case VEC4_OPCODE_TO_DOUBLE: + return "single_to_double"; + case VEC4_OPCODE_PICK_LOW_32BIT: + return "pick_low_32bit"; + case VEC4_OPCODE_PICK_HIGH_32BIT: + return "pick_high_32bit"; + case VEC4_OPCODE_SET_LOW_32BIT: + return "set_low_32bit"; + case VEC4_OPCODE_SET_HIGH_32BIT: + return "set_high_32bit"; case FS_OPCODE_DDX_COARSE: return "ddx_coarse"; @@ -354,8 +375,6 @@ case FS_OPCODE_SET_SAMPLE_ID: return "set_sample_id"; - case FS_OPCODE_SET_SIMD4X2_OFFSET: - return "set_simd4x2_offset"; case FS_OPCODE_PACK_HALF_2x16_SPLIT: return "pack_half_2x16_split"; @@ -367,8 +386,6 @@ case FS_OPCODE_PLACEHOLDER_HALT: return "placeholder_halt"; - case FS_OPCODE_INTERPOLATE_AT_CENTROID: - return "interp_centroid"; case FS_OPCODE_INTERPOLATE_AT_SAMPLE: return "interp_sample"; case FS_OPCODE_INTERPOLATE_AT_SHARED_OFFSET: @@ -599,51 +616,36 @@ return false; } -unsigned -tesslevel_outer_components(GLenum tes_primitive_mode) -{ - switch (tes_primitive_mode) { - case GL_QUADS: - return 4; - case GL_TRIANGLES: - return 3; - case GL_ISOLINES: - return 2; - default: - unreachable("Bogus tessellation domain"); - } - return 0; -} - -unsigned -tesslevel_inner_components(GLenum tes_primitive_mode) -{ - switch (tes_primitive_mode) { - case GL_QUADS: - return 2; - case GL_TRIANGLES: - return 1; - case GL_ISOLINES: - return 0; - default: - unreachable("Bogus tessellation domain"); - } - return 0; -} - /** - * Given a normal .xyzw writemask, convert it to a writemask for a vector - * that's stored backwards, i.e. .wzyx. + * Get the appropriate atomic op for an image atomic intrinsic. */ unsigned -writemask_for_backwards_vector(unsigned mask) +get_atomic_counter_op(nir_intrinsic_op op) { - unsigned new_mask = 0; - - for (int i = 0; i < 4; i++) - new_mask |= ((mask >> i) & 1) << (3 - i); - - return new_mask; + switch (op) { + case nir_intrinsic_atomic_counter_inc: + return BRW_AOP_INC; + case nir_intrinsic_atomic_counter_dec: + return BRW_AOP_PREDEC; + case nir_intrinsic_atomic_counter_add: + return BRW_AOP_ADD; + case nir_intrinsic_atomic_counter_min: + return BRW_AOP_UMIN; + case nir_intrinsic_atomic_counter_max: + return BRW_AOP_UMAX; + case nir_intrinsic_atomic_counter_and: + return BRW_AOP_AND; + case nir_intrinsic_atomic_counter_or: + return BRW_AOP_OR; + case nir_intrinsic_atomic_counter_xor: + return BRW_AOP_XOR; + case nir_intrinsic_atomic_counter_exchange: + return BRW_AOP_MOV; + case nir_intrinsic_atomic_counter_comp_swap: + return BRW_AOP_CMPWR; + default: + unreachable("Not reachable."); + } } backend_shader::backend_shader(const struct brw_compiler *compiler, @@ -663,14 +665,12 @@ debug_enabled = INTEL_DEBUG & intel_debug_flag_for_shader_stage(stage); stage_name = _mesa_shader_stage_to_string(stage); stage_abbrev = _mesa_shader_stage_to_abbrev(stage); - is_passthrough_shader = - nir->info.name && strcmp(nir->info.name, "passthrough") == 0; } bool backend_reg::equals(const backend_reg &r) const { - return brw_regs_equal(this, &r) && reg_offset == r.reg_offset; + return brw_regs_equal(this, &r) && offset == r.offset; } bool @@ -743,15 +743,6 @@ } bool -backend_reg::in_range(const backend_reg &r, unsigned n) const -{ - return (file == r.file && - nr == r.nr && - reg_offset >= r.reg_offset && - reg_offset < r.reg_offset + n); -} - -bool backend_instruction::is_commutative() const { switch (opcode) { @@ -775,7 +766,7 @@ } bool -backend_instruction::is_3src(const struct brw_device_info *devinfo) const +backend_instruction::is_3src(const struct gen_device_info *devinfo) const { return ::is_3src(devinfo, opcode); } @@ -957,7 +948,7 @@ } bool -backend_instruction::writes_accumulator_implicitly(const struct brw_device_info *devinfo) const +backend_instruction::writes_accumulator_implicitly(const struct gen_device_info *devinfo) const { return writes_accumulator || (devinfo->gen < 6 && @@ -1150,33 +1141,30 @@ * unused but also make sure that addition of small offsets to them will * trigger some of our asserts that surface indices are < BRW_MAX_SURFACES. */ -void -brw_assign_common_binding_table_offsets(gl_shader_stage stage, - const struct brw_device_info *devinfo, - const struct gl_shader_program *shader_prog, +uint32_t +brw_assign_common_binding_table_offsets(const struct gen_device_info *devinfo, const struct gl_program *prog, struct brw_stage_prog_data *stage_prog_data, uint32_t next_binding_table_offset) { - const struct gl_shader *shader = NULL; - int num_textures = _mesa_fls(prog->SamplersUsed); - - if (shader_prog) - shader = shader_prog->_LinkedShaders[stage]; + int num_textures = util_last_bit(prog->SamplersUsed); stage_prog_data->binding_table.texture_start = next_binding_table_offset; next_binding_table_offset += num_textures; - if (shader) { - assert(shader->NumUniformBlocks <= BRW_MAX_UBO); + if (prog->info.num_ubos) { + assert(prog->info.num_ubos <= BRW_MAX_UBO); stage_prog_data->binding_table.ubo_start = next_binding_table_offset; - next_binding_table_offset += shader->NumUniformBlocks; + next_binding_table_offset += prog->info.num_ubos; + } else { + stage_prog_data->binding_table.ubo_start = 0xd0d0d0d0; + } - assert(shader->NumShaderStorageBlocks <= BRW_MAX_SSBO); + if (prog->info.num_ssbos) { + assert(prog->info.num_ssbos <= BRW_MAX_SSBO); stage_prog_data->binding_table.ssbo_start = next_binding_table_offset; - next_binding_table_offset += shader->NumShaderStorageBlocks; + next_binding_table_offset += prog->info.num_ssbos; } else { - stage_prog_data->binding_table.ubo_start = 0xd0d0d0d0; stage_prog_data->binding_table.ssbo_start = 0xd0d0d0d0; } @@ -1187,7 +1175,7 @@ stage_prog_data->binding_table.shader_time_start = 0xd0d0d0d0; } - if (prog->UsesGather) { + if (prog->nir->info->uses_texture_gather) { if (devinfo->gen >= 8) { stage_prog_data->binding_table.gather_texture_start = stage_prog_data->binding_table.texture_start; @@ -1199,16 +1187,16 @@ stage_prog_data->binding_table.gather_texture_start = 0xd0d0d0d0; } - if (shader && shader->NumAtomicBuffers) { + if (prog->info.num_abos) { stage_prog_data->binding_table.abo_start = next_binding_table_offset; - next_binding_table_offset += shader->NumAtomicBuffers; + next_binding_table_offset += prog->info.num_abos; } else { stage_prog_data->binding_table.abo_start = 0xd0d0d0d0; } - if (shader && shader->NumImages) { + if (prog->info.num_images) { stage_prog_data->binding_table.image_start = next_binding_table_offset; - next_binding_table_offset += shader->NumImages; + next_binding_table_offset += prog->info.num_images; } else { stage_prog_data->binding_table.image_start = 0xd0d0d0d0; } @@ -1226,9 +1214,10 @@ stage_prog_data->binding_table.plane_start[2] = next_binding_table_offset; next_binding_table_offset += num_textures; - assert(next_binding_table_offset <= BRW_MAX_SURFACES); - /* prog_data->base.binding_table.size will be set by brw_mark_surface_used. */ + + assert(next_binding_table_offset <= BRW_MAX_SURFACES); + return next_binding_table_offset; } static void @@ -1312,35 +1301,29 @@ void *log_data, void *mem_ctx, const struct brw_tes_prog_key *key, + const struct brw_vue_map *input_vue_map, struct brw_tes_prog_data *prog_data, const nir_shader *src_shader, - struct gl_shader_program *shader_prog, + struct gl_program *prog, int shader_time_index, unsigned *final_assembly_size, char **error_str) { - const struct brw_device_info *devinfo = compiler->devinfo; - struct gl_shader *shader = - shader_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL]; + const struct gen_device_info *devinfo = compiler->devinfo; const bool is_scalar = compiler->scalar_stage[MESA_SHADER_TESS_EVAL]; nir_shader *nir = nir_shader_clone(mem_ctx, src_shader); - nir->info.inputs_read = key->inputs_read; - nir->info.patch_inputs_read = key->patch_inputs_read; - - struct brw_vue_map input_vue_map; - brw_compute_tess_vue_map(&input_vue_map, - nir->info.inputs_read & ~VARYING_BIT_PRIMITIVE_ID, - nir->info.patch_inputs_read); + nir->info->inputs_read = key->inputs_read; + nir->info->patch_inputs_read = key->patch_inputs_read; - nir = brw_nir_apply_sampler_key(nir, devinfo, &key->tex, is_scalar); - brw_nir_lower_tes_inputs(nir, &input_vue_map); + nir = brw_nir_apply_sampler_key(nir, compiler, &key->tex, is_scalar); + brw_nir_lower_tes_inputs(nir, input_vue_map); brw_nir_lower_vue_outputs(nir, is_scalar); - nir = brw_postprocess_nir(nir, compiler->devinfo, is_scalar); + nir = brw_postprocess_nir(nir, compiler, is_scalar); brw_compute_vue_map(devinfo, &prog_data->base.vue_map, - nir->info.outputs_written, - nir->info.separate_shader); + nir->info->outputs_written, + nir->info->separate_shader); unsigned output_size_bytes = prog_data->base.vue_map.num_slots * 4 * 4; @@ -1351,31 +1334,61 @@ return NULL; } + prog_data->base.clip_distance_mask = + ((1 << nir->info->clip_distance_array_size) - 1); + prog_data->base.cull_distance_mask = + ((1 << nir->info->cull_distance_array_size) - 1) << + nir->info->clip_distance_array_size; + /* URB entry sizes are stored as a multiple of 64 bytes. */ prog_data->base.urb_entry_size = ALIGN(output_size_bytes, 64) / 64; + prog_data->base.urb_read_length = 0; - bool need_patch_header = nir->info.system_values_read & - (BITFIELD64_BIT(SYSTEM_VALUE_TESS_LEVEL_OUTER) | - BITFIELD64_BIT(SYSTEM_VALUE_TESS_LEVEL_INNER)); + STATIC_ASSERT(BRW_TESS_PARTITIONING_INTEGER == TESS_SPACING_EQUAL - 1); + STATIC_ASSERT(BRW_TESS_PARTITIONING_ODD_FRACTIONAL == + TESS_SPACING_FRACTIONAL_ODD - 1); + STATIC_ASSERT(BRW_TESS_PARTITIONING_EVEN_FRACTIONAL == + TESS_SPACING_FRACTIONAL_EVEN - 1); - /* The TES will pull most inputs using URB read messages. - * - * However, we push the patch header for TessLevel factors when required, - * as it's a tiny amount of extra data. - */ - prog_data->base.urb_read_length = need_patch_header ? 1 : 0; + prog_data->partitioning = + (enum brw_tess_partitioning) (nir->info->tess.spacing - 1); + + switch (nir->info->tess.primitive_mode) { + case GL_QUADS: + prog_data->domain = BRW_TESS_DOMAIN_QUAD; + break; + case GL_TRIANGLES: + prog_data->domain = BRW_TESS_DOMAIN_TRI; + break; + case GL_ISOLINES: + prog_data->domain = BRW_TESS_DOMAIN_ISOLINE; + break; + default: + unreachable("invalid domain shader primitive mode"); + } + + if (nir->info->tess.point_mode) { + prog_data->output_topology = BRW_TESS_OUTPUT_TOPOLOGY_POINT; + } else if (nir->info->tess.primitive_mode == GL_ISOLINES) { + prog_data->output_topology = BRW_TESS_OUTPUT_TOPOLOGY_LINE; + } else { + /* Hardware winding order is backwards from OpenGL */ + prog_data->output_topology = + nir->info->tess.ccw ? BRW_TESS_OUTPUT_TOPOLOGY_TRI_CW + : BRW_TESS_OUTPUT_TOPOLOGY_TRI_CCW; + } if (unlikely(INTEL_DEBUG & DEBUG_TES)) { fprintf(stderr, "TES Input "); - brw_print_vue_map(stderr, &input_vue_map); + brw_print_vue_map(stderr, input_vue_map); fprintf(stderr, "TES Output "); brw_print_vue_map(stderr, &prog_data->base.vue_map); } if (is_scalar) { fs_visitor v(compiler, log_data, mem_ctx, (void *) key, - &prog_data->base.base, shader->Program, nir, 8, - shader_time_index, &input_vue_map); + &prog_data->base.base, NULL, nir, 8, + shader_time_index, input_vue_map); if (!v.run_tes()) { if (error_str) *error_str = ralloc_strdup(mem_ctx, v.fail_msg); @@ -1391,9 +1404,9 @@ if (unlikely(INTEL_DEBUG & DEBUG_TES)) { g.enable_debug(ralloc_asprintf(mem_ctx, "%s tessellation evaluation shader %s", - nir->info.label ? nir->info.label + nir->info->label ? nir->info->label : "unnamed", - nir->info.name)); + nir->info->name)); } g.generate_code(v.cfg, 8); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_shader.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_shader.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_shader.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_shader.h 2017-06-01 10:37:10.000000000 +0000 @@ -27,6 +27,7 @@ #include "brw_reg.h" #include "brw_defines.h" #include "brw_context.h" +#include "compiler/nir/nir.h" #ifdef __cplusplus #include "brw_ir_allocator.h" @@ -44,14 +45,14 @@ const brw_reg &as_brw_reg() const { assert(file == ARF || file == FIXED_GRF || file == MRF || file == IMM); - assert(reg_offset == 0); + assert(offset == 0); return static_cast(*this); } brw_reg &as_brw_reg() { assert(file == ARF || file == FIXED_GRF || file == MRF || file == IMM); - assert(reg_offset == 0); + assert(offset == 0); return static_cast(*this); } @@ -62,18 +63,9 @@ bool is_negative_one() const; bool is_null() const; bool is_accumulator() const; - bool in_range(const backend_reg &r, unsigned n) const; - /** - * Offset within the virtual register. - * - * In the scalar backend, this is in units of a float per pixel for pre- - * register allocation registers (i.e., one register in SIMD8 mode and two - * registers in SIMD16 mode). - * - * For uniforms, this is in units of 1 float. - */ - uint16_t reg_offset; + /** Offset from the start of the (virtual) register in bytes. */ + uint16_t offset; using brw_reg::type; using brw_reg::file; @@ -102,7 +94,7 @@ #ifdef __cplusplus struct backend_instruction : public exec_node { - bool is_3src(const struct brw_device_info *devinfo) const; + bool is_3src(const struct gen_device_info *devinfo) const; bool is_tex() const; bool is_math() const; bool is_control_flow() const; @@ -111,7 +103,7 @@ bool can_do_saturate() const; bool can_do_cmod() const; bool reads_accumulator_implicitly() const; - bool writes_accumulator_implicitly(const struct brw_device_info *devinfo) const; + bool writes_accumulator_implicitly(const struct gen_device_info *devinfo) const; void remove(bblock_t *block); void insert_after(bblock_t *block, backend_instruction *inst); @@ -141,11 +133,27 @@ const char *annotation; /** @} */ + /** + * Execution size of the instruction. This is used by the generator to + * generate the correct binary for the given instruction. Current valid + * values are 1, 4, 8, 16, 32. + */ + uint8_t exec_size; + + /** + * Channel group from the hardware execution and predication mask that + * should be applied to the instruction. The subset of channel enable + * signals (calculated from the EU control flow and predication state) + * given by [group, group + exec_size) will be used to mask GRF writes and + * any other side effects of the instruction. + */ + uint8_t group; + uint32_t offset; /**< spill/unspill offset or texture offset bitfield */ uint8_t mlen; /**< SEND message length */ int8_t base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */ uint8_t target; /**< MRT target. */ - uint8_t regs_written; /**< Number of registers written by the instruction. */ + unsigned size_written; /**< Data written to the destination register in bytes. */ enum opcode opcode; /* BRW_OPCODE_* or FS_OPCODE_* */ enum brw_conditional_mod conditional_mod; /**< BRW_CONDITIONAL_* */ @@ -190,7 +198,7 @@ const struct brw_compiler *compiler; void *log_data; /* Passed to compiler->*_log functions */ - const struct brw_device_info * const devinfo; + const struct gen_device_info * const devinfo; const nir_shader *nir; struct brw_stage_prog_data * const stage_prog_data; @@ -209,7 +217,6 @@ bool debug_enabled; const char *stage_name; const char *stage_abbrev; - bool is_passthrough_shader; brw::simple_allocator alloc; @@ -223,7 +230,9 @@ virtual void invalidate_live_intervals() = 0; }; -uint32_t brw_texture_offset(int *offsets, unsigned num_components); +bool brw_texture_offset(int *offsets, + unsigned num_components, + uint32_t *offset_bits); void brw_setup_image_uniform_values(gl_shader_stage stage, struct brw_stage_prog_data *stage_prog_data, @@ -237,7 +246,7 @@ enum brw_reg_type brw_type_for_base_type(const struct glsl_type *type); enum brw_conditional_mod brw_conditional_for_comparison(unsigned int op); uint32_t brw_math_function(enum opcode op); -const char *brw_instruction_name(const struct brw_device_info *devinfo, +const char *brw_instruction_name(const struct gen_device_info *devinfo, enum opcode op); bool brw_saturate_immediate(enum brw_reg_type type, struct brw_reg *reg); bool brw_negate_immediate(enum brw_reg_type type, struct brw_reg *reg); @@ -261,45 +270,27 @@ unsigned control_data_header_size_bits; }; -void -brw_assign_common_binding_table_offsets(gl_shader_stage stage, - const struct brw_device_info *devinfo, - const struct gl_shader_program *shader_prog, +uint32_t +brw_assign_common_binding_table_offsets(const struct gen_device_info *devinfo, const struct gl_program *prog, struct brw_stage_prog_data *stage_prog_data, uint32_t next_binding_table_offset); -bool brw_vs_precompile(struct gl_context *ctx, - struct gl_shader_program *shader_prog, - struct gl_program *prog); +bool brw_vs_precompile(struct gl_context *ctx, struct gl_program *prog); bool brw_tcs_precompile(struct gl_context *ctx, struct gl_shader_program *shader_prog, struct gl_program *prog); bool brw_tes_precompile(struct gl_context *ctx, struct gl_shader_program *shader_prog, struct gl_program *prog); -bool brw_gs_precompile(struct gl_context *ctx, - struct gl_shader_program *shader_prog, - struct gl_program *prog); -bool brw_fs_precompile(struct gl_context *ctx, - struct gl_shader_program *shader_prog, - struct gl_program *prog); -bool brw_cs_precompile(struct gl_context *ctx, - struct gl_shader_program *shader_prog, - struct gl_program *prog); +bool brw_gs_precompile(struct gl_context *ctx, struct gl_program *prog); +bool brw_fs_precompile(struct gl_context *ctx, struct gl_program *prog); +bool brw_cs_precompile(struct gl_context *ctx, struct gl_program *prog); GLboolean brw_link_shader(struct gl_context *ctx, struct gl_shader_program *prog); -struct gl_shader *brw_new_shader(struct gl_context *ctx, GLuint name, GLuint type); +struct gl_linked_shader *brw_new_shader(gl_shader_stage stage); -int type_size_scalar(const struct glsl_type *type); -int type_size_vec4(const struct glsl_type *type); -int type_size_dvec4(const struct glsl_type *type); -int type_size_vec4_times_4(const struct glsl_type *type); -int type_size_vs_input(const struct glsl_type *type); - -unsigned tesslevel_outer_components(GLenum tes_primitive_mode); -unsigned tesslevel_inner_components(GLenum tes_primitive_mode); -unsigned writemask_for_backwards_vector(unsigned mask); +unsigned get_atomic_counter_op(nir_intrinsic_op op); #ifdef __cplusplus } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_state_batch.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_state_batch.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_state_batch.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_state_batch.c 2017-06-01 10:37:10.000000000 +0000 @@ -46,9 +46,10 @@ if (!brw->state_batch_list) { /* Our structs are always aligned to at least 32 bytes, so * our array doesn't need to be any larger + * TODO: don't use rzalloc */ - brw->state_batch_list = ralloc_size(brw, sizeof(*brw->state_batch_list) * - batch->bo->size / 32); + brw->state_batch_list = rzalloc_size(brw, sizeof(*brw->state_batch_list) * + batch->bo->size / 32); } brw->state_batch_list[brw->state_batch_count].offset = offset; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_state_cache.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_state_cache.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_state_cache.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_state_cache.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,450 +0,0 @@ -/* - Copyright (C) Intel Corp. 2006. All Rights Reserved. - Intel funded Tungsten Graphics to - develop this 3D driver. - - Permission is hereby granted, free of charge, to any person obtaining - a copy of this software and associated documentation files (the - "Software"), to deal in the Software without restriction, including - without limitation the rights to use, copy, modify, merge, publish, - distribute, sublicense, and/or sell copies of the Software, and to - permit persons to whom the Software is furnished to do so, subject to - the following conditions: - - The above copyright notice and this permission notice (including the - next paragraph) shall be included in all copies or substantial - portions of the Software. - - THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE - LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION - OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - - **********************************************************************/ - /* - * Authors: - * Keith Whitwell - */ - -/** @file brw_state_cache.c - * - * This file implements a simple static state cache for 965. The - * consumers can query the hash table of state using a cache_id, - * opaque key data, and receive the corresponding state buffer object - * of state (plus associated auxiliary data) in return. Objects in - * the cache may not have relocations (pointers to other BOs) in them. - * - * The inner workings are a simple hash table based on a CRC of the - * key data. - * - * Replacement is not implemented. Instead, when the cache gets too - * big we throw out all of the cache data and let it get regenerated. - */ - -#include "main/imports.h" -#include "intel_batchbuffer.h" -#include "brw_state.h" -#include "brw_vs.h" -#include "brw_wm.h" -#include "brw_gs.h" -#include "brw_cs.h" -#include "brw_program.h" - -#define FILE_DEBUG_FLAG DEBUG_STATE - -static GLuint -hash_key(struct brw_cache_item *item) -{ - GLuint *ikey = (GLuint *)item->key; - GLuint hash = item->cache_id, i; - - assert(item->key_size % 4 == 0); - - /* I'm sure this can be improved on: - */ - for (i = 0; i < item->key_size/4; i++) { - hash ^= ikey[i]; - hash = (hash << 5) | (hash >> 27); - } - - return hash; -} - -static int -brw_cache_item_equals(const struct brw_cache_item *a, - const struct brw_cache_item *b) -{ - return a->cache_id == b->cache_id && - a->hash == b->hash && - a->key_size == b->key_size && - (memcmp(a->key, b->key, a->key_size) == 0); -} - -static struct brw_cache_item * -search_cache(struct brw_cache *cache, GLuint hash, - struct brw_cache_item *lookup) -{ - struct brw_cache_item *c; - -#if 0 - int bucketcount = 0; - - for (c = cache->items[hash % cache->size]; c; c = c->next) - bucketcount++; - - fprintf(stderr, "bucket %d/%d = %d/%d items\n", hash % cache->size, - cache->size, bucketcount, cache->n_items); -#endif - - for (c = cache->items[hash % cache->size]; c; c = c->next) { - if (brw_cache_item_equals(lookup, c)) - return c; - } - - return NULL; -} - - -static void -rehash(struct brw_cache *cache) -{ - struct brw_cache_item **items; - struct brw_cache_item *c, *next; - GLuint size, i; - - size = cache->size * 3; - items = calloc(size, sizeof(*items)); - - for (i = 0; i < cache->size; i++) - for (c = cache->items[i]; c; c = next) { - next = c->next; - c->next = items[c->hash % size]; - items[c->hash % size] = c; - } - - free(cache->items); - cache->items = items; - cache->size = size; -} - - -/** - * Returns the buffer object matching cache_id and key, or NULL. - */ -bool -brw_search_cache(struct brw_cache *cache, - enum brw_cache_id cache_id, - const void *key, GLuint key_size, - uint32_t *inout_offset, void *inout_aux) -{ - struct brw_context *brw = cache->brw; - struct brw_cache_item *item; - struct brw_cache_item lookup; - GLuint hash; - - lookup.cache_id = cache_id; - lookup.key = key; - lookup.key_size = key_size; - hash = hash_key(&lookup); - lookup.hash = hash; - - item = search_cache(cache, hash, &lookup); - - if (item == NULL) - return false; - - void *aux = ((char *) item->key) + item->key_size; - - if (item->offset != *inout_offset || aux != *((void **) inout_aux)) { - brw->ctx.NewDriverState |= (1 << cache_id); - *inout_offset = item->offset; - *((void **) inout_aux) = aux; - } - - return true; -} - -static void -brw_cache_new_bo(struct brw_cache *cache, uint32_t new_size) -{ - struct brw_context *brw = cache->brw; - drm_intel_bo *new_bo; - - new_bo = drm_intel_bo_alloc(brw->bufmgr, "program cache", new_size, 64); - if (brw->has_llc) - drm_intel_gem_bo_map_unsynchronized(new_bo); - - /* Copy any existing data that needs to be saved. */ - if (cache->next_offset != 0) { - if (brw->has_llc) { - memcpy(new_bo->virtual, cache->bo->virtual, cache->next_offset); - } else { - drm_intel_bo_map(cache->bo, false); - drm_intel_bo_subdata(new_bo, 0, cache->next_offset, - cache->bo->virtual); - drm_intel_bo_unmap(cache->bo); - } - } - - if (brw->has_llc) - drm_intel_bo_unmap(cache->bo); - drm_intel_bo_unreference(cache->bo); - cache->bo = new_bo; - cache->bo_used_by_gpu = false; - - /* Since we have a new BO in place, we need to signal the units - * that depend on it (state base address on gen5+, or unit state before). - */ - brw->ctx.NewDriverState |= BRW_NEW_PROGRAM_CACHE; - brw->batch.state_base_address_emitted = false; -} - -/** - * Attempts to find an item in the cache with identical data. - */ -static const struct brw_cache_item * -brw_lookup_prog(const struct brw_cache *cache, - enum brw_cache_id cache_id, - const void *data, unsigned data_size) -{ - const struct brw_context *brw = cache->brw; - unsigned i; - const struct brw_cache_item *item; - - for (i = 0; i < cache->size; i++) { - for (item = cache->items[i]; item; item = item->next) { - int ret; - - if (item->cache_id != cache_id || item->size != data_size) - continue; - - if (!brw->has_llc) - drm_intel_bo_map(cache->bo, false); - ret = memcmp(cache->bo->virtual + item->offset, data, item->size); - if (!brw->has_llc) - drm_intel_bo_unmap(cache->bo); - if (ret) - continue; - - return item; - } - } - - return NULL; -} - -static uint32_t -brw_alloc_item_data(struct brw_cache *cache, uint32_t size) -{ - uint32_t offset; - struct brw_context *brw = cache->brw; - - /* Allocate space in the cache BO for our new program. */ - if (cache->next_offset + size > cache->bo->size) { - uint32_t new_size = cache->bo->size * 2; - - while (cache->next_offset + size > new_size) - new_size *= 2; - - brw_cache_new_bo(cache, new_size); - } - - /* If we would block on writing to an in-use program BO, just - * recreate it. - */ - if (!brw->has_llc && cache->bo_used_by_gpu) { - perf_debug("Copying busy program cache buffer.\n"); - brw_cache_new_bo(cache, cache->bo->size); - } - - offset = cache->next_offset; - - /* Programs are always 64-byte aligned, so set up the next one now */ - cache->next_offset = ALIGN(offset + size, 64); - - return offset; -} - -void -brw_upload_cache(struct brw_cache *cache, - enum brw_cache_id cache_id, - const void *key, - GLuint key_size, - const void *data, - GLuint data_size, - const void *aux, - GLuint aux_size, - uint32_t *out_offset, - void *out_aux) -{ - struct brw_context *brw = cache->brw; - struct brw_cache_item *item = CALLOC_STRUCT(brw_cache_item); - const struct brw_cache_item *matching_data = - brw_lookup_prog(cache, cache_id, data, data_size); - GLuint hash; - void *tmp; - - item->cache_id = cache_id; - item->size = data_size; - item->key = key; - item->key_size = key_size; - item->aux_size = aux_size; - hash = hash_key(item); - item->hash = hash; - - /* If we can find a matching prog in the cache already, then reuse the - * existing stuff without creating new copy into the underlying buffer - * object. This is notably useful for programs generating shaders at - * runtime, where multiple shaders may compile to the same thing in our - * backend. - */ - if (matching_data) { - item->offset = matching_data->offset; - } else { - item->offset = brw_alloc_item_data(cache, data_size); - - /* Copy data to the buffer */ - if (brw->has_llc) { - memcpy((char *)cache->bo->virtual + item->offset, data, data_size); - } else { - drm_intel_bo_subdata(cache->bo, item->offset, data_size, data); - } - } - - /* Set up the memory containing the key and aux_data */ - tmp = malloc(key_size + aux_size); - - memcpy(tmp, key, key_size); - memcpy(tmp + key_size, aux, aux_size); - - item->key = tmp; - - if (cache->n_items > cache->size * 1.5f) - rehash(cache); - - hash %= cache->size; - item->next = cache->items[hash]; - cache->items[hash] = item; - cache->n_items++; - - *out_offset = item->offset; - *(void **)out_aux = (void *)((char *)item->key + item->key_size); - cache->brw->ctx.NewDriverState |= 1 << cache_id; -} - -void -brw_init_caches(struct brw_context *brw) -{ - struct brw_cache *cache = &brw->cache; - - cache->brw = brw; - - cache->size = 7; - cache->n_items = 0; - cache->items = - calloc(cache->size, sizeof(struct brw_cache_item *)); - - cache->bo = drm_intel_bo_alloc(brw->bufmgr, - "program cache", - 4096, 64); - if (brw->has_llc) - drm_intel_gem_bo_map_unsynchronized(cache->bo); -} - -static void -brw_clear_cache(struct brw_context *brw, struct brw_cache *cache) -{ - struct brw_cache_item *c, *next; - GLuint i; - - DBG("%s\n", __func__); - - for (i = 0; i < cache->size; i++) { - for (c = cache->items[i]; c; c = next) { - next = c->next; - if (c->cache_id == BRW_CACHE_VS_PROG || - c->cache_id == BRW_CACHE_GS_PROG || - c->cache_id == BRW_CACHE_FS_PROG || - c->cache_id == BRW_CACHE_CS_PROG) { - const void *item_aux = c->key + c->key_size; - brw_stage_prog_data_free(item_aux); - } - free((void *)c->key); - free(c); - } - cache->items[i] = NULL; - } - - cache->n_items = 0; - - /* Start putting programs into the start of the BO again, since - * we'll never find the old results. - */ - cache->next_offset = 0; - - /* We need to make sure that the programs get regenerated, since - * any offsets leftover in brw_context will no longer be valid. - */ - brw->NewGLState = ~0; - brw->ctx.NewDriverState = ~0ull; - brw->state.pipelines[BRW_RENDER_PIPELINE].mesa = ~0; - brw->state.pipelines[BRW_RENDER_PIPELINE].brw = ~0ull; - brw->state.pipelines[BRW_COMPUTE_PIPELINE].mesa = ~0; - brw->state.pipelines[BRW_COMPUTE_PIPELINE].brw = ~0ull; - - /* Also, NULL out any stale program pointers. */ - brw->vs.prog_data = NULL; - brw->vs.base.prog_data = NULL; - brw->tcs.prog_data = NULL; - brw->tcs.base.prog_data = NULL; - brw->tes.prog_data = NULL; - brw->tes.base.prog_data = NULL; - brw->gs.prog_data = NULL; - brw->gs.base.prog_data = NULL; - brw->wm.prog_data = NULL; - brw->wm.base.prog_data = NULL; - brw->cs.prog_data = NULL; - brw->cs.base.prog_data = NULL; - - intel_batchbuffer_flush(brw); -} - -void -brw_state_cache_check_size(struct brw_context *brw) -{ - /* un-tuned guess. Each object is generally a page, so 2000 of them is 8 MB of - * state cache. - */ - if (brw->cache.n_items > 2000) { - perf_debug("Exceeded state cache size limit. Clearing the set " - "of compiled programs, which will trigger recompiles\n"); - brw_clear_cache(brw, &brw->cache); - } -} - - -static void -brw_destroy_cache(struct brw_context *brw, struct brw_cache *cache) -{ - - DBG("%s\n", __func__); - - if (brw->has_llc) - drm_intel_bo_unmap(cache->bo); - drm_intel_bo_unreference(cache->bo); - cache->bo = NULL; - brw_clear_cache(brw, cache); - free(cache->items); - cache->items = NULL; - cache->size = 0; -} - - -void -brw_destroy_caches(struct brw_context *brw) -{ - brw_destroy_cache(brw, &brw->cache); -} diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_state_dump.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_state_dump.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_state_dump.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_state_dump.c 2017-06-01 10:37:10.000000000 +0000 @@ -718,62 +718,6 @@ } static void -dump_prog_cache(struct brw_context *brw) -{ - struct brw_cache *cache = &brw->cache; - unsigned int b; - - drm_intel_bo_map(brw->cache.bo, false); - - for (b = 0; b < cache->size; b++) { - struct brw_cache_item *item; - - for (item = cache->items[b]; item; item = item->next) { - const char *name; - - switch (item->cache_id) { - case BRW_CACHE_VS_PROG: - name = "VS kernel"; - break; - case BRW_CACHE_TCS_PROG: - name = "TCS kernel"; - break; - case BRW_CACHE_TES_PROG: - name = "TES kernel"; - break; - case BRW_CACHE_FF_GS_PROG: - name = "Fixed-function GS kernel"; - break; - case BRW_CACHE_GS_PROG: - name = "GS kernel"; - break; - case BRW_CACHE_CLIP_PROG: - name = "CLIP kernel"; - break; - case BRW_CACHE_SF_PROG: - name = "SF kernel"; - break; - case BRW_CACHE_FS_PROG: - name = "FS kernel"; - break; - case BRW_CACHE_CS_PROG: - name = "CS kernel"; - break; - default: - name = "unknown"; - break; - } - - fprintf(stderr, "%s:\n", name); - brw_disassemble(brw->intelScreen->devinfo, brw->cache.bo->virtual, - item->offset, item->size, stderr); - } - } - - drm_intel_bo_unmap(brw->cache.bo); -} - -static void dump_state_batch(struct brw_context *brw) { int i; @@ -880,5 +824,5 @@ drm_intel_bo_unmap(brw->batch.bo); if (0) - dump_prog_cache(brw); + brw_print_program_cache(brw); } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_state.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_state.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_state.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_state.h 2017-06-01 10:37:10.000000000 +0000 @@ -34,7 +34,6 @@ #define BRW_STATE_H #include "brw_context.h" -#include "brw_defines.h" #ifdef __cplusplus extern "C" { @@ -58,7 +57,6 @@ extern const struct brw_tracked_state brw_fs_samplers; extern const struct brw_tracked_state brw_gs_unit; extern const struct brw_tracked_state brw_line_stipple; -extern const struct brw_tracked_state brw_aa_line_parameters; extern const struct brw_tracked_state brw_binding_table_pointers; extern const struct brw_tracked_state brw_depthbuffer; extern const struct brw_tracked_state brw_polygon_stipple_offset; @@ -86,6 +84,7 @@ extern const struct brw_tracked_state brw_gs_image_surfaces; extern const struct brw_tracked_state brw_vs_unit; extern const struct brw_tracked_state brw_renderbuffer_surfaces; +extern const struct brw_tracked_state brw_renderbuffer_read_surfaces; extern const struct brw_tracked_state brw_texture_surfaces; extern const struct brw_tracked_state brw_wm_binding_table; extern const struct brw_tracked_state brw_gs_binding_table; @@ -111,7 +110,7 @@ extern const struct brw_tracked_state gen6_binding_table_pointers; extern const struct brw_tracked_state gen6_blend_state; extern const struct brw_tracked_state gen6_clip_state; -extern const struct brw_tracked_state gen6_clip_vp; +extern const struct brw_tracked_state gen6_sf_and_clip_viewports; extern const struct brw_tracked_state gen6_color_calc_state; extern const struct brw_tracked_state gen6_depth_stencil_state; extern const struct brw_tracked_state gen6_gs_state; @@ -131,7 +130,6 @@ extern const struct brw_tracked_state gen6_wm_push_constants; extern const struct brw_tracked_state gen6_wm_state; extern const struct brw_tracked_state gen7_depthbuffer; -extern const struct brw_tracked_state gen7_clip_state; extern const struct brw_tracked_state gen7_ds_state; extern const struct brw_tracked_state gen7_gs_state; extern const struct brw_tracked_state gen7_tcs_push_constants; @@ -151,7 +149,6 @@ extern const struct brw_tracked_state gen7_hw_binding_tables; extern const struct brw_tracked_state haswell_cut_index; extern const struct brw_tracked_state gen8_blend_state; -extern const struct brw_tracked_state gen8_disable_stages; extern const struct brw_tracked_state gen8_ds_state; extern const struct brw_tracked_state gen8_gs_state; extern const struct brw_tracked_state gen8_hs_state; @@ -220,29 +217,36 @@ } /*********************************************************************** - * brw_state_cache.c + * brw_program_cache.c */ void brw_upload_cache(struct brw_cache *cache, - enum brw_cache_id cache_id, - const void *key, - GLuint key_sz, - const void *data, - GLuint data_sz, - const void *aux, - GLuint aux_sz, - uint32_t *out_offset, void *out_aux); + enum brw_cache_id cache_id, + const void *key, + GLuint key_sz, + const void *data, + GLuint data_sz, + const void *aux, + GLuint aux_sz, + uint32_t *out_offset, void *out_aux); bool brw_search_cache(struct brw_cache *cache, - enum brw_cache_id cache_id, - const void *key, - GLuint key_size, - uint32_t *inout_offset, void *inout_aux); -void brw_state_cache_check_size( struct brw_context *brw ); + enum brw_cache_id cache_id, + const void *key, + GLuint key_size, + uint32_t *inout_offset, void *inout_aux); + +const void *brw_find_previous_compile(struct brw_cache *cache, + enum brw_cache_id cache_id, + unsigned program_string_id); + +void brw_program_cache_check_size(struct brw_context *brw); void brw_init_caches( struct brw_context *brw ); void brw_destroy_caches( struct brw_context *brw ); +void brw_print_program_cache(struct brw_context *brw); + /*********************************************************************** * brw_state_batch.c */ @@ -263,36 +267,41 @@ uint32_t brw_get_surface_tiling_bits(uint32_t tiling); uint32_t brw_get_surface_num_multisamples(unsigned num_samples); -void brw_configure_w_tiled(const struct intel_mipmap_tree *mt, - bool is_render_target, - unsigned *width, unsigned *height, - unsigned *pitch, uint32_t *tiling, - unsigned *format); - uint32_t brw_format_for_mesa_format(mesa_format mesa_format); GLuint translate_tex_target(GLenum target); GLuint translate_tex_format(struct brw_context *brw, mesa_format mesa_format, - GLenum srgb_decode); + GLenum srgb_decode); int brw_get_texture_swizzle(const struct gl_context *ctx, const struct gl_texture_object *t); +void brw_emit_buffer_surface_state(struct brw_context *brw, + uint32_t *out_offset, + drm_intel_bo *bo, + unsigned buffer_offset, + unsigned surface_format, + unsigned buffer_size, + unsigned pitch, + bool rw); + +void brw_update_texture_surface(struct gl_context *ctx, + unsigned unit, uint32_t *surf_offset, + bool for_gather, uint32_t plane); + +uint32_t brw_update_renderbuffer_surface(struct brw_context *brw, + struct gl_renderbuffer *rb, + uint32_t flags, unsigned unit, + uint32_t surf_index); + void brw_update_renderbuffer_surfaces(struct brw_context *brw, const struct gl_framebuffer *fb, uint32_t render_target_start, uint32_t *surf_offset); /* gen7_wm_surface_state.c */ -uint32_t gen7_surface_tiling_mode(uint32_t tiling); -uint32_t gen7_surface_msaa_bits(unsigned num_samples, enum intel_msaa_layout l); -void gen7_set_surface_mcs_info(struct brw_context *brw, - uint32_t *surf, - uint32_t surf_offset, - const struct intel_mipmap_tree *mcs_mt, - bool is_render_target); void gen7_check_surface_setup(uint32_t *surf, bool is_render_target); void gen7_init_vtable_surface_functions(struct brw_context *brw); @@ -314,22 +323,6 @@ void gen8_init_vtable_surface_functions(struct brw_context *brw); -unsigned gen8_surface_tiling_mode(uint32_t tiling); -unsigned gen8_vertical_alignment(const struct brw_context *brw, - const struct intel_mipmap_tree *mt, - uint32_t surf_type); -unsigned gen8_horizontal_alignment(const struct brw_context *brw, - const struct intel_mipmap_tree *mt, - uint32_t surf_type); -uint32_t *gen8_allocate_surface_state(struct brw_context *brw, - uint32_t *out_offset, int index); - -void gen8_emit_fast_clear_color(const struct brw_context *brw, - const struct intel_mipmap_tree *mt, - uint32_t *surf); -uint32_t gen8_get_aux_mode(const struct brw_context *brw, - const struct intel_mipmap_tree *mt); - /* brw_sampler_state.c */ void brw_emit_sampler_state(struct brw_context *brw, uint32_t *sampler_state, @@ -342,6 +335,7 @@ unsigned wrap_s, unsigned wrap_t, unsigned wrap_r, + unsigned base_level, unsigned min_lod, unsigned max_lod, int lod_bias, @@ -349,15 +343,6 @@ bool non_normalized_coordinates, uint32_t border_color_offset); -void brw_update_sampler_state(struct brw_context *brw, - GLenum target, bool tex_cube_map_seamless, - GLfloat tex_unit_lod_bias, - mesa_format format, GLenum base_format, - bool is_integer_format, - const struct gl_sampler_object *sampler, - uint32_t *sampler_state, - uint32_t batch_offset_for_sampler_state); - /* gen6_wm_state.c */ void gen6_upload_wm_state(struct brw_context *brw, @@ -408,71 +393,73 @@ void gen7_disable_hw_binding_tables(struct brw_context *brw); void gen7_reset_hw_bt_pool_offsets(struct brw_context *brw); -/* brw_interpolation_map.c */ -void brw_setup_vue_interpolation(struct brw_context *brw); - /* brw_clip.c */ void brw_upload_clip_prog(struct brw_context *brw); /* brw_sf.c */ void brw_upload_sf_prog(struct brw_context *brw); +bool brw_is_drawing_points(const struct brw_context *brw); +bool brw_is_drawing_lines(const struct brw_context *brw); + /* gen7_l3_state.c */ void gen7_restore_default_l3_config(struct brw_context *brw); static inline bool -is_drawing_points(const struct brw_context *brw) +use_state_point_size(const struct brw_context *brw) { - /* Determine if the primitives *reaching the SF* are points */ - /* _NEW_POLYGON */ - if (brw->ctx.Polygon.FrontMode == GL_POINT || - brw->ctx.Polygon.BackMode == GL_POINT) { - return true; - } + const struct gl_context *ctx = &brw->ctx; - if (brw->geometry_program) { - /* BRW_NEW_GEOMETRY_PROGRAM */ - return brw->geometry_program->OutputType == GL_POINTS; - } else if (brw->tes.prog_data) { - /* BRW_NEW_TES_PROG_DATA */ - return brw->tes.prog_data->output_topology == - BRW_TESS_OUTPUT_TOPOLOGY_POINT; - } else { - /* BRW_NEW_PRIMITIVE */ - return brw->primitive == _3DPRIM_POINTLIST; - } -} - -static inline bool -is_drawing_lines(const struct brw_context *brw) -{ - /* Determine if the primitives *reaching the SF* are points */ - /* _NEW_POLYGON */ - if (brw->ctx.Polygon.FrontMode == GL_LINE || - brw->ctx.Polygon.BackMode == GL_LINE) { - return true; - } - - if (brw->geometry_program) { - /* BRW_NEW_GEOMETRY_PROGRAM */ - return brw->geometry_program->OutputType == GL_LINE_STRIP; - } else if (brw->tes.prog_data) { - /* BRW_NEW_TES_PROG_DATA */ - return brw->tes.prog_data->output_topology == - BRW_TESS_OUTPUT_TOPOLOGY_LINE; - } else { - /* BRW_NEW_PRIMITIVE */ - switch (brw->primitive) { - case _3DPRIM_LINELIST: - case _3DPRIM_LINESTRIP: - case _3DPRIM_LINELOOP: - return true; - } - } - return false; + /* Section 14.4 (Points) of the OpenGL 4.5 specification says: + * + * "If program point size mode is enabled, the derived point size is + * taken from the (potentially clipped) shader built-in gl_PointSize + * written by: + * + * * the geometry shader, if active; + * * the tessellation evaluation shader, if active and no + * geometry shader is active; + * * the vertex shader, otherwise + * + * and clamped to the implementation-dependent point size range. If + * the value written to gl_PointSize is less than or equal to zero, + * or if no value was written to gl_PointSize, results are undefined. + * If program point size mode is disabled, the derived point size is + * specified with the command + * + * void PointSize(float size); + * + * size specifies the requested size of a point. The default value + * is 1.0." + * + * The rules for GLES come from the ES 3.2, OES_geometry_point_size, and + * OES_tessellation_point_size specifications. To summarize: if the last + * stage before rasterization is a GS or TES, then use gl_PointSize from + * the shader if written. Otherwise, use 1.0. If the last stage is a + * vertex shader, use gl_PointSize, or it is undefined. + * + * We can combine these rules into a single condition for both APIs. + * Using the state point size when the last shader stage doesn't write + * gl_PointSize satisfies GL's requirements, as it's undefined. Because + * ES doesn't have a PointSize() command, the state point size will + * remain 1.0, satisfying the ES default value in the GS/TES case, and + * the VS case (1.0 works for "undefined"). Mesa sets the program point + * mode flag to always-enabled in ES, so we can safely check that, and + * it'll be ignored for ES. + * + * _NEW_PROGRAM | _NEW_POINT + * BRW_NEW_VUE_MAP_GEOM_OUT + */ + return (!ctx->VertexProgram.PointSizeEnabled && !ctx->Point._Attenuated) || + (brw->vue_map_geom_out.slots_valid & VARYING_BIT_PSIZ) == 0; } +void brw_calculate_guardband_size(const struct gen_device_info *devinfo, + uint32_t fb_width, uint32_t fb_height, + float m00, float m11, float m30, float m31, + float *xmin, float *xmax, + float *ymin, float *ymax); #ifdef __cplusplus } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_state_upload.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_state_upload.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_state_upload.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_state_upload.c 2017-06-01 10:37:10.000000000 +0000 @@ -61,6 +61,7 @@ &brw_vs_pull_constants, &brw_wm_pull_constants, &brw_renderbuffer_surfaces, + &brw_renderbuffer_read_surfaces, &brw_texture_surfaces, &brw_vs_binding_table, &brw_wm_binding_table, @@ -89,7 +90,6 @@ &brw_polygon_stipple_offset, &brw_line_stipple, - &brw_aa_line_parameters, &brw_psp_urb_cbs, @@ -103,8 +103,7 @@ static const struct brw_tracked_state *gen6_atoms[] = { - &gen6_clip_vp, - &gen6_sf_vp, + &gen6_sf_and_clip_viewports, /* Command packets: */ @@ -130,6 +129,7 @@ &brw_wm_pull_constants, &brw_wm_ubo_surfaces, &gen6_renderbuffer_surfaces, + &brw_renderbuffer_read_surfaces, &brw_texture_surfaces, &gen6_sol_surface, &brw_vs_binding_table, @@ -158,7 +158,6 @@ &brw_polygon_stipple_offset, &brw_line_stipple, - &brw_aa_line_parameters, &brw_drawing_rect, @@ -214,6 +213,7 @@ &brw_wm_ubo_surfaces, &brw_wm_abo_surfaces, &gen6_renderbuffer_surfaces, + &brw_renderbuffer_read_surfaces, &brw_texture_surfaces, &brw_vs_binding_table, &brw_tcs_binding_table, @@ -234,7 +234,7 @@ &gen7_ds_state, &gen7_gs_state, &gen7_sol_state, - &gen7_clip_state, + &gen6_clip_state, &gen7_sbe_state, &gen7_sf_state, &gen7_wm_state, @@ -248,7 +248,6 @@ &brw_polygon_stipple_offset, &brw_line_stipple, - &brw_aa_line_parameters, &brw_drawing_rect, @@ -317,6 +316,7 @@ &brw_wm_ubo_surfaces, &brw_wm_abo_surfaces, &gen6_renderbuffer_surfaces, + &brw_renderbuffer_read_surfaces, &brw_texture_surfaces, &brw_vs_binding_table, &brw_tcs_binding_table, @@ -331,7 +331,6 @@ &brw_gs_samplers, &gen8_multisample_state, - &gen8_disable_stages, &gen8_vs_state, &gen8_hs_state, &gen7_te_state, @@ -356,7 +355,6 @@ &brw_polygon_stipple_offset, &brw_line_stipple, - &brw_aa_line_parameters, &brw_drawing_rect, @@ -411,6 +409,19 @@ if (brw->gen >= 8) { gen8_emit_3dstate_sample_pattern(brw); + + BEGIN_BATCH(5); + OUT_BATCH(_3DSTATE_WM_HZ_OP << 16 | (5 - 2)); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + ADVANCE_BATCH(); + + BEGIN_BATCH(2); + OUT_BATCH(_3DSTATE_WM_CHROMAKEY << 16 | (2 - 2)); + OUT_BATCH(0); + ADVANCE_BATCH(); } } @@ -517,6 +528,7 @@ ctx->DriverFlags.NewAtomicBuffer = BRW_NEW_ATOMIC_BUFFER; ctx->DriverFlags.NewImageUnits = BRW_NEW_IMAGE_UNITS; ctx->DriverFlags.NewDefaultTessLevels = BRW_NEW_DEFAULT_TESS_LEVELS; + ctx->DriverFlags.NewIntelConservativeRasterization = BRW_NEW_CONSERVATIVE_RASTERIZATION; } @@ -636,7 +648,6 @@ DEFINE_BIT(BRW_NEW_ATOMIC_BUFFER), DEFINE_BIT(BRW_NEW_IMAGE_UNITS), DEFINE_BIT(BRW_NEW_META_IN_PROGRESS), - DEFINE_BIT(BRW_NEW_INTERPOLATION_MAP), DEFINE_BIT(BRW_NEW_PUSH_CONSTANT_ALLOCATION), DEFINE_BIT(BRW_NEW_NUM_SAMPLES), DEFINE_BIT(BRW_NEW_TEXTURE_BUFFER), @@ -651,6 +662,8 @@ DEFINE_BIT(BRW_NEW_URB_SIZE), DEFINE_BIT(BRW_NEW_CC_STATE), DEFINE_BIT(BRW_NEW_BLORP), + DEFINE_BIT(BRW_NEW_VIEWPORT_COUNT), + DEFINE_BIT(BRW_NEW_CONSERVATIVE_RASTERIZATION), {0, 0, 0} }; @@ -668,7 +681,7 @@ { for (int i = 0; bit_map[i].bit != 0; i++) { if (bit_map[i].count > 1) { - fprintf(stderr, "0x%016lx: %12d (%s)\n", + fprintf(stderr, "0x%016"PRIx64": %12d (%s)\n", bit_map[i].bit, bit_map[i].count, bit_map[i].name); } } @@ -678,26 +691,10 @@ brw_upload_tess_programs(struct brw_context *brw) { if (brw->tess_eval_program) { - uint64_t per_vertex_slots = brw->tess_eval_program->Base.InputsRead; - uint32_t per_patch_slots = - brw->tess_eval_program->Base.PatchInputsRead; - - /* The TCS may have additional outputs which aren't read by the - * TES (possibly for cross-thread communication). These need to - * be stored in the Patch URB Entry as well. - */ - if (brw->tess_ctrl_program) { - per_vertex_slots |= brw->tess_ctrl_program->Base.OutputsWritten; - per_patch_slots |= - brw->tess_ctrl_program->Base.PatchOutputsWritten; - } - - brw_upload_tcs_prog(brw, per_vertex_slots, per_patch_slots); - brw_upload_tes_prog(brw, per_vertex_slots, per_patch_slots); + brw_upload_tcs_prog(brw); + brw_upload_tes_prog(brw); } else { - brw->tcs.prog_data = NULL; brw->tcs.base.prog_data = NULL; - brw->tes.prog_data = NULL; brw->tes.base.prog_data = NULL; } } @@ -706,6 +703,8 @@ brw_upload_programs(struct brw_context *brw, enum brw_pipeline pipeline) { + struct gl_context *ctx = &brw->ctx; + if (pipeline == BRW_RENDER_PIPELINE) { brw_upload_vs_prog(brw); brw_upload_tess_programs(brw); @@ -720,25 +719,35 @@ */ GLbitfield64 old_slots = brw->vue_map_geom_out.slots_valid; bool old_separate = brw->vue_map_geom_out.separate; + struct brw_vue_prog_data *vue_prog_data; if (brw->geometry_program) - brw->vue_map_geom_out = brw->gs.prog_data->base.vue_map; + vue_prog_data = brw_vue_prog_data(brw->gs.base.prog_data); else if (brw->tess_eval_program) - brw->vue_map_geom_out = brw->tes.prog_data->base.vue_map; + vue_prog_data = brw_vue_prog_data(brw->tes.base.prog_data); else - brw->vue_map_geom_out = brw->vs.prog_data->base.vue_map; + vue_prog_data = brw_vue_prog_data(brw->vs.base.prog_data); + + brw->vue_map_geom_out = vue_prog_data->vue_map; /* If the layout has changed, signal BRW_NEW_VUE_MAP_GEOM_OUT. */ if (old_slots != brw->vue_map_geom_out.slots_valid || old_separate != brw->vue_map_geom_out.separate) brw->ctx.NewDriverState |= BRW_NEW_VUE_MAP_GEOM_OUT; + if ((old_slots ^ brw->vue_map_geom_out.slots_valid) & + VARYING_BIT_VIEWPORT) { + ctx->NewDriverState |= BRW_NEW_VIEWPORT_COUNT; + brw->clip.viewport_count = + (brw->vue_map_geom_out.slots_valid & VARYING_BIT_VIEWPORT) ? + ctx->Const.MaxViewports : 1; + } + + brw_upload_wm_prog(brw); + if (brw->gen < 6) { - brw_setup_vue_interpolation(brw); brw_upload_clip_prog(brw); brw_upload_sf_prog(brw); } - - brw_upload_wm_prog(brw); } else if (pipeline == BRW_COMPUTE_PIPELINE) { brw_upload_cs_prog(brw); } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_surface_formats.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_surface_formats.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_surface_formats.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_surface_formats.c 2017-06-01 10:37:10.000000000 +0000 @@ -94,7 +94,7 @@ [MESA_FORMAT_L_SRGB8] = BRW_SURFACEFORMAT_L8_UNORM_SRGB, [MESA_FORMAT_L8A8_SRGB] = BRW_SURFACEFORMAT_L8A8_UNORM_SRGB, [MESA_FORMAT_A8L8_SRGB] = 0, - [MESA_FORMAT_SRGB_DXT1] = BRW_SURFACEFORMAT_DXT1_RGB_SRGB, + [MESA_FORMAT_SRGB_DXT1] = BRW_SURFACEFORMAT_BC1_UNORM_SRGB, [MESA_FORMAT_SRGBA_DXT1] = BRW_SURFACEFORMAT_BC1_UNORM_SRGB, [MESA_FORMAT_SRGBA_DXT3] = BRW_SURFACEFORMAT_BC2_UNORM_SRGB, [MESA_FORMAT_SRGBA_DXT5] = BRW_SURFACEFORMAT_BC3_UNORM_SRGB, @@ -288,7 +288,7 @@ void brw_init_surface_formats(struct brw_context *brw) { - const struct brw_device_info *devinfo = brw->intelScreen->devinfo; + const struct gen_device_info *devinfo = &brw->screen->devinfo; struct gl_context *ctx = &brw->ctx; int gen; mesa_format format; @@ -311,6 +311,16 @@ if (texture == 0 && format != MESA_FORMAT_RGBA_FLOAT32) continue; + /* Don't advertise 8 and 16-bit RGB formats to core mesa. This ensures + * that they are renderable from an API perspective since core mesa will + * fall back to RGBA or RGBX (we can't render to non-power-of-two + * formats). For 8-bit, formats, this also keeps us from hitting some + * nasty corners in intel_miptree_map_blit if you ever try to map one. + */ + int format_size = _mesa_get_format_bytes(format); + if (format_size == 3 || format_size == 6) + continue; + if (isl_format_supports_sampling(devinfo, texture) && (isl_format_supports_filtering(devinfo, texture) || is_integer)) ctx->TextureFormatSupported[format] = true; @@ -531,17 +541,6 @@ */ return BRW_SURFACEFORMAT_R32G32B32A32_FLOAT; - case MESA_FORMAT_SRGB_DXT1: - if (brw->gen == 4 && !brw->is_g4x) { - /* Work around missing SRGB DXT1 support on original gen4 by just - * skipping SRGB decode. It's not worth not supporting sRGB in - * general to prevent this. - */ - WARN_ONCE(true, "Demoting sRGB DXT1 texture to non-sRGB\n"); - mesa_format = MESA_FORMAT_RGB_DXT1; - } - return brw_format_for_mesa_format(mesa_format); - case MESA_FORMAT_RGBA_ASTC_4x4: case MESA_FORMAT_RGBA_ASTC_5x4: case MESA_FORMAT_RGBA_ASTC_5x5: diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_sync.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_sync.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_sync.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_sync.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,300 @@ +/* + * Copyright © 2008 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Eric Anholt + * + */ + +/** + * \file + * \brief Support for GL_ARB_sync and EGL_KHR_fence_sync. + * + * GL_ARB_sync is implemented by flushing the current batchbuffer and keeping a + * reference on it. We can then check for completion or wait for completion + * using the normal buffer object mechanisms. This does mean that if an + * application is using many sync objects, it will emit small batchbuffers + * which may end up being a significant overhead. In other tests of removing + * gratuitous batchbuffer syncs in Mesa, it hasn't appeared to be a significant + * performance bottleneck, though. + */ + +#include "main/imports.h" + +#include "brw_context.h" +#include "intel_batchbuffer.h" + +struct brw_fence { + struct brw_context *brw; + /** The fence waits for completion of this batch. */ + drm_intel_bo *batch_bo; + + mtx_t mutex; + bool signalled; +}; + +struct brw_gl_sync { + struct gl_sync_object gl; + struct brw_fence fence; +}; + +static void +brw_fence_init(struct brw_context *brw, struct brw_fence *fence) +{ + fence->brw = brw; + fence->batch_bo = NULL; + mtx_init(&fence->mutex, mtx_plain); +} + +static void +brw_fence_finish(struct brw_fence *fence) +{ + if (fence->batch_bo) + drm_intel_bo_unreference(fence->batch_bo); + + mtx_destroy(&fence->mutex); +} + +static void +brw_fence_insert(struct brw_context *brw, struct brw_fence *fence) +{ + assert(!fence->batch_bo); + assert(!fence->signalled); + + brw_emit_mi_flush(brw); + fence->batch_bo = brw->batch.bo; + drm_intel_bo_reference(fence->batch_bo); + intel_batchbuffer_flush(brw); +} + +static bool +brw_fence_has_completed_locked(struct brw_fence *fence) +{ + if (fence->signalled) + return true; + + if (fence->batch_bo && !drm_intel_bo_busy(fence->batch_bo)) { + drm_intel_bo_unreference(fence->batch_bo); + fence->batch_bo = NULL; + fence->signalled = true; + return true; + } + + return false; +} + +static bool +brw_fence_has_completed(struct brw_fence *fence) +{ + bool ret; + + mtx_lock(&fence->mutex); + ret = brw_fence_has_completed_locked(fence); + mtx_unlock(&fence->mutex); + + return ret; +} + +static bool +brw_fence_client_wait_locked(struct brw_context *brw, struct brw_fence *fence, + uint64_t timeout) +{ + if (fence->signalled) + return true; + + assert(fence->batch_bo); + + /* DRM_IOCTL_I915_GEM_WAIT uses a signed 64 bit timeout and returns + * immediately for timeouts <= 0. The best we can do is to clamp the + * timeout to INT64_MAX. This limits the maximum timeout from 584 years to + * 292 years - likely not a big deal. + */ + if (timeout > INT64_MAX) + timeout = INT64_MAX; + + if (drm_intel_gem_bo_wait(fence->batch_bo, timeout) != 0) + return false; + + fence->signalled = true; + drm_intel_bo_unreference(fence->batch_bo); + fence->batch_bo = NULL; + + return true; +} + +/** + * Return true if the function successfully signals or has already signalled. + * (This matches the behavior expected from __DRI2fence::client_wait_sync). + */ +static bool +brw_fence_client_wait(struct brw_context *brw, struct brw_fence *fence, + uint64_t timeout) +{ + bool ret; + + mtx_lock(&fence->mutex); + ret = brw_fence_client_wait_locked(brw, fence, timeout); + mtx_unlock(&fence->mutex); + + return ret; +} + +static void +brw_fence_server_wait(struct brw_context *brw, struct brw_fence *fence) +{ + /* We have nothing to do for WaitSync. Our GL command stream is sequential, + * so given that the sync object has already flushed the batchbuffer, any + * batchbuffers coming after this waitsync will naturally not occur until + * the previous one is done. + */ +} + +static struct gl_sync_object * +brw_gl_new_sync(struct gl_context *ctx, GLuint id) +{ + struct brw_gl_sync *sync; + + sync = calloc(1, sizeof(*sync)); + if (!sync) + return NULL; + + return &sync->gl; +} + +static void +brw_gl_delete_sync(struct gl_context *ctx, struct gl_sync_object *_sync) +{ + struct brw_gl_sync *sync = (struct brw_gl_sync *) _sync; + + brw_fence_finish(&sync->fence); + free(sync); +} + +static void +brw_gl_fence_sync(struct gl_context *ctx, struct gl_sync_object *_sync, + GLenum condition, GLbitfield flags) +{ + struct brw_context *brw = brw_context(ctx); + struct brw_gl_sync *sync = (struct brw_gl_sync *) _sync; + + brw_fence_init(brw, &sync->fence); + brw_fence_insert(brw, &sync->fence); +} + +static void +brw_gl_client_wait_sync(struct gl_context *ctx, struct gl_sync_object *_sync, + GLbitfield flags, GLuint64 timeout) +{ + struct brw_context *brw = brw_context(ctx); + struct brw_gl_sync *sync = (struct brw_gl_sync *) _sync; + + if (brw_fence_client_wait(brw, &sync->fence, timeout)) + sync->gl.StatusFlag = 1; +} + +static void +brw_gl_server_wait_sync(struct gl_context *ctx, struct gl_sync_object *_sync, + GLbitfield flags, GLuint64 timeout) +{ + struct brw_context *brw = brw_context(ctx); + struct brw_gl_sync *sync = (struct brw_gl_sync *) _sync; + + brw_fence_server_wait(brw, &sync->fence); +} + +static void +brw_gl_check_sync(struct gl_context *ctx, struct gl_sync_object *_sync) +{ + struct brw_gl_sync *sync = (struct brw_gl_sync *) _sync; + + if (brw_fence_has_completed(&sync->fence)) + sync->gl.StatusFlag = 1; +} + +void +brw_init_syncobj_functions(struct dd_function_table *functions) +{ + functions->NewSyncObject = brw_gl_new_sync; + functions->DeleteSyncObject = brw_gl_delete_sync; + functions->FenceSync = brw_gl_fence_sync; + functions->CheckSync = brw_gl_check_sync; + functions->ClientWaitSync = brw_gl_client_wait_sync; + functions->ServerWaitSync = brw_gl_server_wait_sync; +} + +static void * +brw_dri_create_fence(__DRIcontext *ctx) +{ + struct brw_context *brw = ctx->driverPrivate; + struct brw_fence *fence; + + fence = calloc(1, sizeof(*fence)); + if (!fence) + return NULL; + + brw_fence_init(brw, fence); + brw_fence_insert(brw, fence); + + return fence; +} + +static void +brw_dri_destroy_fence(__DRIscreen *dri_screen, void *_fence) +{ + struct brw_fence *fence = _fence; + + brw_fence_finish(fence); + free(fence); +} + +static GLboolean +brw_dri_client_wait_sync(__DRIcontext *ctx, void *_fence, unsigned flags, + uint64_t timeout) +{ + struct brw_fence *fence = _fence; + + return brw_fence_client_wait(fence->brw, fence, timeout); +} + +static void +brw_dri_server_wait_sync(__DRIcontext *ctx, void *_fence, unsigned flags) +{ + struct brw_fence *fence = _fence; + + /* We might be called here with a NULL fence as a result of WaitSyncKHR + * on a EGL_KHR_reusable_sync fence. Nothing to do here in such case. + */ + if (!fence) + return; + + brw_fence_server_wait(fence->brw, fence); +} + +const __DRI2fenceExtension intelFenceExtension = { + .base = { __DRI2_FENCE, 1 }, + + .create_fence = brw_dri_create_fence, + .destroy_fence = brw_dri_destroy_fence, + .client_wait_sync = brw_dri_client_wait_sync, + .server_wait_sync = brw_dri_server_wait_sync, + .get_fence_from_cl_event = NULL, +}; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_tcs.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_tcs.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_tcs.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_tcs.c 2017-06-01 10:37:10.000000000 +0000 @@ -36,12 +36,13 @@ #include "nir_builder.h" static nir_shader * -create_passthrough_tcs(const struct brw_compiler *compiler, +create_passthrough_tcs(void *mem_ctx, const struct brw_compiler *compiler, const nir_shader_compiler_options *options, const struct brw_tcs_prog_key *key) { nir_builder b; - nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_TESS_CTRL, options); + nir_builder_init_simple_shader(&b, mem_ctx, MESA_SHADER_TESS_CTRL, + options); nir_shader *nir = b.shader; nir_variable *var; nir_intrinsic_instr *load; @@ -50,10 +51,11 @@ nir_ssa_def *invoc_id = nir_load_system_value(&b, nir_intrinsic_load_invocation_id, 0); - nir->info.inputs_read = key->outputs_written; - nir->info.outputs_written = key->outputs_written; - nir->info.tcs.vertices_out = key->input_vertices; - nir->info.name = ralloc_strdup(nir, "passthrough"); + nir->info->inputs_read = key->outputs_written & + ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER); + nir->info->outputs_written = key->outputs_written; + nir->info->tess.tcs_vertices_out = key->input_vertices; + nir->info->name = ralloc_strdup(nir, "passthrough"); nir->num_uniforms = 8 * sizeof(uint32_t); var = nir_variable_create(nir, nir_var_uniform, glsl_vec4_type(), "hdr_0"); @@ -80,7 +82,7 @@ } /* Copy inputs to outputs. */ - uint64_t varyings = key->outputs_written; + uint64_t varyings = nir->info->inputs_read; while (varyings != 0) { const int varying = ffsll(varyings) - 1; @@ -115,31 +117,18 @@ } static void -brw_tcs_debug_recompile(struct brw_context *brw, - struct gl_shader_program *shader_prog, +brw_tcs_debug_recompile(struct brw_context *brw, struct gl_program *prog, const struct brw_tcs_prog_key *key) { - struct brw_cache_item *c = NULL; - const struct brw_tcs_prog_key *old_key = NULL; - bool found = false; - perf_debug("Recompiling tessellation control shader for program %d\n", - shader_prog->Name); - - for (unsigned int i = 0; i < brw->cache.size; i++) { - for (c = brw->cache.items[i]; c; c = c->next) { - if (c->cache_id == BRW_CACHE_TCS_PROG) { - old_key = c->key; + prog->Id); - if (old_key->program_string_id == key->program_string_id) - break; - } - } - if (c) - break; - } + bool found = false; + const struct brw_tcs_prog_key *old_key = + brw_find_previous_compile(&brw->cache, BRW_CACHE_TCS_PROG, + key->program_string_id); - if (!c) { + if (!old_key) { perf_debug(" Didn't find previous compile in the shader cache for " "debug\n"); return; @@ -163,22 +152,21 @@ } static bool -brw_codegen_tcs_prog(struct brw_context *brw, - struct gl_shader_program *shader_prog, - struct brw_tess_ctrl_program *tcp, - struct brw_tcs_prog_key *key) +brw_codegen_tcs_prog(struct brw_context *brw, struct brw_program *tcp, + struct brw_program *tep, struct brw_tcs_prog_key *key) { struct gl_context *ctx = &brw->ctx; - const struct brw_compiler *compiler = brw->intelScreen->compiler; - const struct brw_device_info *devinfo = compiler->devinfo; + const struct brw_compiler *compiler = brw->screen->compiler; + const struct gen_device_info *devinfo = compiler->devinfo; struct brw_stage_state *stage_state = &brw->tcs.base; nir_shader *nir; struct brw_tcs_prog_data prog_data; bool start_busy = false; double start_time = 0; + void *mem_ctx = ralloc_context(NULL); if (tcp) { - nir = tcp->program.Base.nir; + nir = tcp->program.nir; } else { /* Create a dummy nir_shader. We won't actually use NIR code to * generate assembly (it's easier to generate assembly directly), @@ -186,7 +174,7 @@ */ const nir_shader_compiler_options *options = ctx->Const.ShaderCompilerOptions[MESA_SHADER_TESS_CTRL].NirOptions; - nir = create_passthrough_tcs(compiler, options, key); + nir = create_passthrough_tcs(mem_ctx, compiler, options, key); } memset(&prog_data, 0, sizeof(prog_data)); @@ -199,8 +187,6 @@ * padding around uniform values below vec4 size, so the worst case is that * every uniform is a float which gets padded to the size of a vec4. */ - struct gl_shader *tcs = shader_prog ? - shader_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL] : NULL; int param_count = nir->num_uniforms / 4; prog_data.base.base.param = @@ -209,17 +195,16 @@ rzalloc_array(NULL, const gl_constant_value *, param_count); prog_data.base.base.nr_params = param_count; - if (tcs) { - brw_assign_common_binding_table_offsets(MESA_SHADER_TESS_CTRL, devinfo, - shader_prog, &tcp->program.Base, + if (tcp) { + brw_assign_common_binding_table_offsets(devinfo, &tcp->program, &prog_data.base.base, 0); prog_data.base.base.image_param = - rzalloc_array(NULL, struct brw_image_param, tcs->NumImages); - prog_data.base.base.nr_image_params = tcs->NumImages; + rzalloc_array(NULL, struct brw_image_param, + tcp->program.info.num_images); + prog_data.base.base.nr_image_params = tcp->program.info.num_images; - brw_nir_setup_glsl_uniforms(nir, shader_prog, &tcp->program.Base, - &prog_data.base.base, + brw_nir_setup_glsl_uniforms(nir, &tcp->program, &prog_data.base.base, compiler->scalar_stage[MESA_SHADER_TESS_CTRL]); } else { /* Upload the Patch URB Header as the first two uniforms. @@ -248,30 +233,24 @@ } } - if (unlikely(INTEL_DEBUG & DEBUG_TCS) && tcs) - brw_dump_ir("tessellation control", shader_prog, tcs, NULL); - int st_index = -1; - if (unlikely(INTEL_DEBUG & DEBUG_SHADER_TIME)) - st_index = brw_get_shader_time_index(brw, shader_prog, NULL, ST_TCS); + if (unlikely((INTEL_DEBUG & DEBUG_SHADER_TIME) && tep)) + st_index = brw_get_shader_time_index(brw, &tep->program, ST_TCS, true); if (unlikely(brw->perf_debug)) { start_busy = brw->batch.last_bo && drm_intel_bo_busy(brw->batch.last_bo); start_time = get_time(); } - void *mem_ctx = ralloc_context(NULL); unsigned program_size; char *error_str; const unsigned *program = brw_compile_tcs(compiler, brw, mem_ctx, key, &prog_data, nir, st_index, &program_size, &error_str); if (program == NULL) { - if (shader_prog) { - shader_prog->LinkStatus = false; - ralloc_strcat(&shader_prog->InfoLog, error_str); - } else { - ralloc_free(nir); + if (tep) { + tep->program.sh.data->LinkStatus = false; + ralloc_strcat(&tep->program.sh.data->InfoLog, error_str); } _mesa_problem(NULL, "Failed to compile tessellation control shader: " @@ -282,13 +261,13 @@ } if (unlikely(brw->perf_debug)) { - struct brw_shader *btcs = (struct brw_shader *) tcs; - if (btcs) { - if (btcs->compiled_once) { - brw_tcs_debug_recompile(brw, shader_prog, key); + if (tcp) { + if (tcp->compiled_once) { + brw_tcs_debug_recompile(brw, &tcp->program, key); } - btcs->compiled_once = true; + tcp->compiled_once = true; } + if (start_busy && !drm_intel_bo_busy(brw->batch.last_bo)) { perf_debug("TCS compile took %.03f ms and stalled the GPU\n", (get_time() - start_time) * 1000); @@ -298,80 +277,85 @@ /* Scratch space is used for register spilling */ brw_alloc_stage_scratch(brw, stage_state, prog_data.base.base.total_scratch, - brw->max_hs_threads); + devinfo->max_tcs_threads); brw_upload_cache(&brw->cache, BRW_CACHE_TCS_PROG, key, sizeof(*key), program, program_size, &prog_data, sizeof(prog_data), - &stage_state->prog_offset, &brw->tcs.prog_data); + &stage_state->prog_offset, &brw->tcs.base.prog_data); ralloc_free(mem_ctx); - if (!tcs) - ralloc_free(nir); return true; } - void -brw_upload_tcs_prog(struct brw_context *brw, - uint64_t per_vertex_slots, - uint32_t per_patch_slots) +brw_tcs_populate_key(struct brw_context *brw, + struct brw_tcs_prog_key *key) { - struct gl_context *ctx = &brw->ctx; - struct gl_shader_program **current = ctx->_Shader->CurrentProgram; - struct brw_stage_state *stage_state = &brw->tcs.base; - struct brw_tcs_prog_key key; - /* BRW_NEW_TESS_PROGRAMS */ - struct brw_tess_ctrl_program *tcp = - (struct brw_tess_ctrl_program *) brw->tess_ctrl_program; - struct brw_tess_eval_program *tep = - (struct brw_tess_eval_program *) brw->tess_eval_program; - assert(tep); + struct brw_program *tcp = (struct brw_program *) brw->tess_ctrl_program; + struct brw_program *tep = (struct brw_program *) brw->tess_eval_program; + struct gl_program *tes_prog = &tep->program; - if (!brw_state_dirty(brw, - _NEW_TEXTURE, - BRW_NEW_PATCH_PRIMITIVE | - BRW_NEW_TESS_PROGRAMS)) - return; + uint64_t per_vertex_slots = tes_prog->info.inputs_read; + uint32_t per_patch_slots = tes_prog->info.patch_inputs_read; - struct gl_program *prog = &tcp->program.Base; + memset(key, 0, sizeof(*key)); - memset(&key, 0, sizeof(key)); + if (tcp) { + struct gl_program *prog = &tcp->program; + per_vertex_slots |= prog->info.outputs_written; + per_patch_slots |= prog->info.patch_outputs_written; + } if (brw->gen < 8 || !tcp) - key.input_vertices = ctx->TessCtrlProgram.patch_vertices; - key.outputs_written = per_vertex_slots; - key.patch_outputs_written = per_patch_slots; + key->input_vertices = brw->ctx.TessCtrlProgram.patch_vertices; + key->outputs_written = per_vertex_slots; + key->patch_outputs_written = per_patch_slots; /* We need to specialize our code generation for tessellation levels * based on the domain the DS is expecting to tessellate. */ - key.tes_primitive_mode = tep->program.PrimitiveMode; - key.quads_workaround = brw->gen < 9 && - tep->program.PrimitiveMode == GL_QUADS && - tep->program.Spacing == GL_EQUAL; + key->tes_primitive_mode = tep->program.info.tess.primitive_mode; + key->quads_workaround = brw->gen < 9 && + tep->program.info.tess.primitive_mode == GL_QUADS && + tep->program.info.tess.spacing == TESS_SPACING_EQUAL; if (tcp) { - key.program_string_id = tcp->id; + key->program_string_id = tcp->id; /* _NEW_TEXTURE */ - brw_populate_sampler_prog_key_data(ctx, prog, stage_state->sampler_count, - &key.tex); - } else { - key.outputs_written = tep->program.Base.InputsRead; + brw_populate_sampler_prog_key_data(&brw->ctx, &tcp->program, &key->tex); } +} + +void +brw_upload_tcs_prog(struct brw_context *brw) +{ + struct brw_stage_state *stage_state = &brw->tcs.base; + struct brw_tcs_prog_key key; + /* BRW_NEW_TESS_PROGRAMS */ + struct brw_program *tcp = (struct brw_program *) brw->tess_ctrl_program; + MAYBE_UNUSED struct brw_program *tep = + (struct brw_program *) brw->tess_eval_program; + assert(tep); + if (!brw_state_dirty(brw, + _NEW_TEXTURE, + BRW_NEW_PATCH_PRIMITIVE | + BRW_NEW_TESS_PROGRAMS)) + return; + + brw_tcs_populate_key(brw, &key); if (!brw_search_cache(&brw->cache, BRW_CACHE_TCS_PROG, &key, sizeof(key), - &stage_state->prog_offset, &brw->tcs.prog_data)) { - bool success = brw_codegen_tcs_prog(brw, current[MESA_SHADER_TESS_CTRL], - tcp, &key); + &stage_state->prog_offset, + &brw->tcs.base.prog_data)) { + bool success = brw_codegen_tcs_prog(brw, tcp, tep, &key); assert(success); (void)success; } - brw->tcs.base.prog_data = &brw->tcs.prog_data->base.base; } @@ -383,12 +367,11 @@ struct brw_context *brw = brw_context(ctx); struct brw_tcs_prog_key key; uint32_t old_prog_offset = brw->tcs.base.prog_offset; - struct brw_tcs_prog_data *old_prog_data = brw->tcs.prog_data; + struct brw_stage_prog_data *old_prog_data = brw->tcs.base.prog_data; bool success; - struct gl_tess_ctrl_program *tcp = (struct gl_tess_ctrl_program *)prog; - struct brw_tess_ctrl_program *btcp = brw_tess_ctrl_program(tcp); - const struct gl_shader *tes = + struct brw_program *btcp = brw_program(prog); + const struct gl_linked_shader *tes = shader_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL]; memset(&key, 0, sizeof(key)); @@ -397,25 +380,30 @@ brw_setup_tex_for_precompile(brw, &key.tex, prog); /* Guess that the input and output patches have the same dimensionality. */ - if (brw->gen < 8) - key.input_vertices = shader_prog->TessCtrl.VerticesOut; + if (brw->gen < 8) { + key.input_vertices = shader_prog-> + _LinkedShaders[MESA_SHADER_TESS_CTRL]->info.TessCtrl.VerticesOut; + } + struct brw_program *btep; if (tes) { - key.tes_primitive_mode = shader_prog->TessEval.PrimitiveMode; + btep = brw_program(tes->Program); + key.tes_primitive_mode = tes->info.TessEval.PrimitiveMode; key.quads_workaround = brw->gen < 9 && - shader_prog->TessEval.PrimitiveMode == GL_QUADS && - shader_prog->TessEval.Spacing == GL_EQUAL; + tes->info.TessEval.PrimitiveMode == GL_QUADS && + tes->info.TessEval.Spacing == TESS_SPACING_EQUAL; } else { + btep = NULL; key.tes_primitive_mode = GL_TRIANGLES; } - key.outputs_written = prog->OutputsWritten; - key.patch_outputs_written = prog->PatchOutputsWritten; + key.outputs_written = prog->nir->info->outputs_written; + key.patch_outputs_written = prog->nir->info->patch_outputs_written; - success = brw_codegen_tcs_prog(brw, shader_prog, btcp, &key); + success = brw_codegen_tcs_prog(brw, btcp, btep, &key); brw->tcs.base.prog_offset = old_prog_offset; - brw->tcs.prog_data = old_prog_data; + brw->tcs.base.prog_data = old_prog_data; return success; } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_tcs_surface_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_tcs_surface_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_tcs_surface_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_tcs_surface_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -23,6 +23,7 @@ #include "main/mtypes.h" #include "program/prog_parameter.h" +#include "main/shaderapi.h" #include "brw_context.h" #include "brw_state.h" @@ -40,17 +41,17 @@ struct brw_stage_state *stage_state = &brw->tcs.base; /* BRW_NEW_TESS_PROGRAMS */ - struct brw_tess_ctrl_program *tcp = - (struct brw_tess_ctrl_program *) brw->tess_ctrl_program; + struct brw_program *tcp = (struct brw_program *) brw->tess_ctrl_program; if (!tcp) return; /* BRW_NEW_TCS_PROG_DATA */ - const struct brw_stage_prog_data *prog_data = &brw->tcs.prog_data->base.base; + const struct brw_stage_prog_data *prog_data = brw->tcs.base.prog_data; + _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_TESS_CTRL); /* _NEW_PROGRAM_CONSTANTS */ - brw_upload_pull_constants(brw, BRW_NEW_TCS_CONSTBUF, &tcp->program.Base, + brw_upload_pull_constants(brw, BRW_NEW_TCS_CONSTBUF, &tcp->program, stage_state, prog_data); } @@ -74,13 +75,13 @@ struct gl_shader_program *prog = ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_CTRL]; - if (!prog) + if (!prog || !prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]) return; /* BRW_NEW_TCS_PROG_DATA */ - struct brw_stage_prog_data *prog_data = &brw->tcs.prog_data->base.base; + struct brw_stage_prog_data *prog_data = brw->tcs.base.prog_data; - brw_upload_ubo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_TESS_CTRL], + brw_upload_ubo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]->Program, &brw->tcs.base, prog_data); } @@ -98,15 +99,13 @@ static void brw_upload_tcs_abo_surfaces(struct brw_context *brw) { - struct gl_context *ctx = &brw->ctx; /* _NEW_PROGRAM */ - struct gl_shader_program *prog = - ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_CTRL]; + const struct gl_program *tcp = brw->tess_ctrl_program; - if (prog) { + if (tcp) { /* BRW_NEW_TCS_PROG_DATA */ - brw_upload_abo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_TESS_CTRL], - &brw->tcs.base, &brw->tcs.prog_data->base.base); + brw_upload_abo_surfaces(brw, tcp, &brw->tcs.base, + brw->tcs.base.prog_data); } } @@ -124,15 +123,13 @@ static void brw_upload_tcs_image_surfaces(struct brw_context *brw) { - struct gl_context *ctx = &brw->ctx; /* BRW_NEW_TESS_PROGRAMS */ - struct gl_shader_program *prog = - ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_CTRL]; + const struct gl_program *tcp = brw->tess_ctrl_program; - if (prog) { + if (tcp) { /* BRW_NEW_TCS_PROG_DATA, BRW_NEW_IMAGE_UNITS */ - brw_upload_image_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_TESS_CTRL], - &brw->tcs.base, &brw->tcs.prog_data->base.base); + brw_upload_image_surfaces(brw, tcp, &brw->tcs.base, + brw->tcs.base.prog_data); } } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_tes.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_tes.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_tes.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_tes.c 2017-06-01 10:37:10.000000000 +0000 @@ -35,31 +35,18 @@ #include "program/prog_parameter.h" static void -brw_tes_debug_recompile(struct brw_context *brw, - struct gl_shader_program *shader_prog, +brw_tes_debug_recompile(struct brw_context *brw, struct gl_program *prog, const struct brw_tes_prog_key *key) { - struct brw_cache_item *c = NULL; - const struct brw_tes_prog_key *old_key = NULL; - bool found = false; - perf_debug("Recompiling tessellation evaluation shader for program %d\n", - shader_prog->Name); + prog->Id); - for (unsigned int i = 0; i < brw->cache.size; i++) { - for (c = brw->cache.items[i]; c; c = c->next) { - if (c->cache_id == BRW_CACHE_TES_PROG) { - old_key = c->key; - - if (old_key->program_string_id == key->program_string_id) - break; - } - } - if (c) - break; - } + bool found = false; + const struct brw_tes_prog_key *old_key = + brw_find_previous_compile(&brw->cache, BRW_CACHE_TES_PROG, + key->program_string_id); - if (!c) { + if (!old_key) { perf_debug(" Didn't find previous compile in the shader cache for " "debug\n"); return; @@ -78,70 +65,22 @@ static bool brw_codegen_tes_prog(struct brw_context *brw, - struct gl_shader_program *shader_prog, - struct brw_tess_eval_program *tep, + struct brw_program *tep, struct brw_tes_prog_key *key) { - const struct brw_compiler *compiler = brw->intelScreen->compiler; - const struct brw_device_info *devinfo = brw->intelScreen->devinfo; + const struct brw_compiler *compiler = brw->screen->compiler; + const struct gen_device_info *devinfo = &brw->screen->devinfo; struct brw_stage_state *stage_state = &brw->tes.base; - nir_shader *nir = tep->program.Base.nir; + nir_shader *nir = tep->program.nir; struct brw_tes_prog_data prog_data; bool start_busy = false; double start_time = 0; memset(&prog_data, 0, sizeof(prog_data)); - brw_assign_common_binding_table_offsets(MESA_SHADER_TESS_EVAL, devinfo, - shader_prog, &tep->program.Base, + brw_assign_common_binding_table_offsets(devinfo, &tep->program, &prog_data.base.base, 0); - switch (tep->program.Spacing) { - case GL_EQUAL: - prog_data.partitioning = BRW_TESS_PARTITIONING_INTEGER; - break; - case GL_FRACTIONAL_ODD: - prog_data.partitioning = BRW_TESS_PARTITIONING_ODD_FRACTIONAL; - break; - case GL_FRACTIONAL_EVEN: - prog_data.partitioning = BRW_TESS_PARTITIONING_EVEN_FRACTIONAL; - break; - default: - unreachable("invalid domain shader spacing"); - } - - switch (tep->program.PrimitiveMode) { - case GL_QUADS: - prog_data.domain = BRW_TESS_DOMAIN_QUAD; - break; - case GL_TRIANGLES: - prog_data.domain = BRW_TESS_DOMAIN_TRI; - break; - case GL_ISOLINES: - prog_data.domain = BRW_TESS_DOMAIN_ISOLINE; - break; - default: - unreachable("invalid domain shader primitive mode"); - } - - if (tep->program.PointMode) { - prog_data.output_topology = BRW_TESS_OUTPUT_TOPOLOGY_POINT; - } else if (tep->program.PrimitiveMode == GL_ISOLINES) { - prog_data.output_topology = BRW_TESS_OUTPUT_TOPOLOGY_LINE; - } else { - /* Hardware winding order is backwards from OpenGL */ - switch (tep->program.VertexOrder) { - case GL_CCW: - prog_data.output_topology = BRW_TESS_OUTPUT_TOPOLOGY_TRI_CW; - break; - case GL_CW: - prog_data.output_topology = BRW_TESS_OUTPUT_TOPOLOGY_TRI_CCW; - break; - default: - unreachable("invalid domain shader vertex order"); - } - } - /* Allocate the references to the uniforms that will end up in the * prog_data associated with the compiled program, and which will be freed * by the state cache. @@ -150,7 +89,6 @@ * padding around uniform values below vec4 size, so the worst case is that * every uniform is a float which gets padded to the size of a vec4. */ - struct gl_shader *tes = shader_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL]; int param_count = nir->num_uniforms / 4; prog_data.base.base.param = @@ -158,41 +96,36 @@ prog_data.base.base.pull_param = rzalloc_array(NULL, const gl_constant_value *, param_count); prog_data.base.base.image_param = - rzalloc_array(NULL, struct brw_image_param, tes->NumImages); + rzalloc_array(NULL, struct brw_image_param, + tep->program.info.num_images); prog_data.base.base.nr_params = param_count; - prog_data.base.base.nr_image_params = tes->NumImages; - - prog_data.base.cull_distance_mask = - ((1 << tep->program.Base.CullDistanceArraySize) - 1) << - tep->program.Base.ClipDistanceArraySize; + prog_data.base.base.nr_image_params = tep->program.info.num_images; - brw_nir_setup_glsl_uniforms(nir, shader_prog, &tep->program.Base, - &prog_data.base.base, + brw_nir_setup_glsl_uniforms(nir, &tep->program, &prog_data.base.base, compiler->scalar_stage[MESA_SHADER_TESS_EVAL]); - if (unlikely(INTEL_DEBUG & DEBUG_TES)) - brw_dump_ir("tessellation evaluation", shader_prog, tes, NULL); - int st_index = -1; if (unlikely(INTEL_DEBUG & DEBUG_SHADER_TIME)) - st_index = brw_get_shader_time_index(brw, shader_prog, NULL, ST_TES); + st_index = brw_get_shader_time_index(brw, &tep->program, ST_TES, true); if (unlikely(brw->perf_debug)) { start_busy = brw->batch.last_bo && drm_intel_bo_busy(brw->batch.last_bo); start_time = get_time(); } + struct brw_vue_map input_vue_map; + brw_compute_tess_vue_map(&input_vue_map, key->inputs_read, + key->patch_inputs_read); + void *mem_ctx = ralloc_context(NULL); unsigned program_size; char *error_str; const unsigned *program = - brw_compile_tes(compiler, brw, mem_ctx, key, &prog_data, nir, - shader_prog, st_index, &program_size, &error_str); + brw_compile_tes(compiler, brw, mem_ctx, key, &input_vue_map, &prog_data, + nir, &tep->program, st_index, &program_size, &error_str); if (program == NULL) { - if (shader_prog) { - shader_prog->LinkStatus = false; - ralloc_strcat(&shader_prog->InfoLog, error_str); - } + tep->program.sh.data->LinkStatus = false; + ralloc_strcat(&tep->program.sh.data->InfoLog, error_str); _mesa_problem(NULL, "Failed to compile tessellation evaluation shader: " "%s\n", error_str); @@ -202,78 +135,87 @@ } if (unlikely(brw->perf_debug)) { - struct brw_shader *btes = (struct brw_shader *) tes; - if (btes->compiled_once) { - brw_tes_debug_recompile(brw, shader_prog, key); + if (tep->compiled_once) { + brw_tes_debug_recompile(brw, &tep->program, key); } if (start_busy && !drm_intel_bo_busy(brw->batch.last_bo)) { perf_debug("TES compile took %.03f ms and stalled the GPU\n", (get_time() - start_time) * 1000); } - btes->compiled_once = true; + tep->compiled_once = true; } /* Scratch space is used for register spilling */ brw_alloc_stage_scratch(brw, stage_state, prog_data.base.base.total_scratch, - brw->max_ds_threads); + devinfo->max_tes_threads); brw_upload_cache(&brw->cache, BRW_CACHE_TES_PROG, key, sizeof(*key), program, program_size, &prog_data, sizeof(prog_data), - &stage_state->prog_offset, &brw->tes.prog_data); + &stage_state->prog_offset, &brw->tes.base.prog_data); ralloc_free(mem_ctx); return true; } +void +brw_tes_populate_key(struct brw_context *brw, + struct brw_tes_prog_key *key) +{ + struct brw_program *tcp = (struct brw_program *) brw->tess_ctrl_program; + struct brw_program *tep = (struct brw_program *) brw->tess_eval_program; + struct gl_program *prog = &tep->program; + + uint64_t per_vertex_slots = prog->info.inputs_read; + uint32_t per_patch_slots = prog->info.patch_inputs_read; + + memset(key, 0, sizeof(*key)); + + key->program_string_id = tep->id; + + /* The TCS may have additional outputs which aren't read by the + * TES (possibly for cross-thread communication). These need to + * be stored in the Patch URB Entry as well. + */ + if (tcp) { + struct gl_program *tcp_prog = &tcp->program; + per_vertex_slots |= tcp_prog->info.outputs_written & + ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER); + per_patch_slots |= tcp_prog->info.patch_outputs_written; + } + + key->inputs_read = per_vertex_slots; + key->patch_inputs_read = per_patch_slots; + + /* _NEW_TEXTURE */ + brw_populate_sampler_prog_key_data(&brw->ctx, prog, &key->tex); +} void -brw_upload_tes_prog(struct brw_context *brw, - uint64_t per_vertex_slots, - uint32_t per_patch_slots) +brw_upload_tes_prog(struct brw_context *brw) { - struct gl_context *ctx = &brw->ctx; - struct gl_shader_program **current = ctx->_Shader->CurrentProgram; struct brw_stage_state *stage_state = &brw->tes.base; struct brw_tes_prog_key key; /* BRW_NEW_TESS_PROGRAMS */ - struct brw_tess_eval_program *tep = - (struct brw_tess_eval_program *) brw->tess_eval_program; + struct brw_program *tep = (struct brw_program *) brw->tess_eval_program; if (!brw_state_dirty(brw, _NEW_TEXTURE, BRW_NEW_TESS_PROGRAMS)) return; - struct gl_program *prog = &tep->program.Base; - - memset(&key, 0, sizeof(key)); - - key.program_string_id = tep->id; - - /* Ignore gl_TessLevelInner/Outer - we treat them as system values, - * not inputs, and they're always present in the URB entry regardless - * of whether or not we read them. - */ - key.inputs_read = per_vertex_slots & - ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER); - key.patch_inputs_read = per_patch_slots; - - /* _NEW_TEXTURE */ - brw_populate_sampler_prog_key_data(ctx, prog, stage_state->sampler_count, - &key.tex); + brw_tes_populate_key(brw, &key); if (!brw_search_cache(&brw->cache, BRW_CACHE_TES_PROG, &key, sizeof(key), - &stage_state->prog_offset, &brw->tes.prog_data)) { - bool success = brw_codegen_tes_prog(brw, current[MESA_SHADER_TESS_EVAL], - tep, &key); + &stage_state->prog_offset, + &brw->tes.base.prog_data)) { + bool success = brw_codegen_tes_prog(brw, tep, &key); assert(success); (void)success; } - brw->tes.base.prog_data = &brw->tes.prog_data->base.base; } @@ -285,35 +227,31 @@ struct brw_context *brw = brw_context(ctx); struct brw_tes_prog_key key; uint32_t old_prog_offset = brw->tes.base.prog_offset; - struct brw_tes_prog_data *old_prog_data = brw->tes.prog_data; + struct brw_stage_prog_data *old_prog_data = brw->tes.base.prog_data; bool success; - struct gl_tess_eval_program *tep = (struct gl_tess_eval_program *)prog; - struct brw_tess_eval_program *btep = brw_tess_eval_program(tep); + struct brw_program *btep = brw_program(prog); memset(&key, 0, sizeof(key)); key.program_string_id = btep->id; - key.inputs_read = prog->InputsRead; - key.patch_inputs_read = prog->PatchInputsRead; + key.inputs_read = prog->nir->info->inputs_read; + key.patch_inputs_read = prog->nir->info->patch_inputs_read; if (shader_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]) { struct gl_program *tcp = shader_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]->Program; - key.inputs_read |= tcp->OutputsWritten; - key.patch_inputs_read |= tcp->PatchOutputsWritten; + key.inputs_read |= tcp->nir->info->outputs_written & + ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER); + key.patch_inputs_read |= tcp->nir->info->patch_outputs_written; } - /* Ignore gl_TessLevelInner/Outer - they're system values. */ - key.inputs_read &= ~(VARYING_BIT_TESS_LEVEL_INNER | - VARYING_BIT_TESS_LEVEL_OUTER); - brw_setup_tex_for_precompile(brw, &key.tex, prog); - success = brw_codegen_tes_prog(brw, shader_prog, btep, &key); + success = brw_codegen_tes_prog(brw, btep, &key); brw->tes.base.prog_offset = old_prog_offset; - brw->tes.prog_data = old_prog_data; + brw->tes.base.prog_data = old_prog_data; return success; } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_tes_surface_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_tes_surface_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_tes_surface_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_tes_surface_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -23,6 +23,7 @@ #include "main/mtypes.h" #include "program/prog_parameter.h" +#include "main/shaderapi.h" #include "brw_context.h" #include "brw_state.h" @@ -40,17 +41,17 @@ struct brw_stage_state *stage_state = &brw->tes.base; /* BRW_NEW_TESS_PROGRAMS */ - struct brw_tess_eval_program *dp = - (struct brw_tess_eval_program *) brw->tess_eval_program; + struct brw_program *dp = (struct brw_program *) brw->tess_eval_program; if (!dp) return; /* BRW_NEW_TES_PROG_DATA */ - const struct brw_stage_prog_data *prog_data = &brw->tes.prog_data->base.base; + const struct brw_stage_prog_data *prog_data = brw->tes.base.prog_data; + _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_TESS_EVAL); /* _NEW_PROGRAM_CONSTANTS */ - brw_upload_pull_constants(brw, BRW_NEW_TES_CONSTBUF, &dp->program.Base, + brw_upload_pull_constants(brw, BRW_NEW_TES_CONSTBUF, &dp->program, stage_state, prog_data); } @@ -74,13 +75,13 @@ struct gl_shader_program *prog = ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_EVAL]; - if (!prog) + if (!prog || !prog->_LinkedShaders[MESA_SHADER_TESS_EVAL]) return; /* BRW_NEW_TES_PROG_DATA */ - struct brw_stage_prog_data *prog_data = &brw->tes.prog_data->base.base; + struct brw_stage_prog_data *prog_data = brw->tes.base.prog_data; - brw_upload_ubo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_TESS_EVAL], + brw_upload_ubo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_TESS_EVAL]->Program, &brw->tes.base, prog_data); } @@ -98,15 +99,13 @@ static void brw_upload_tes_abo_surfaces(struct brw_context *brw) { - struct gl_context *ctx = &brw->ctx; /* _NEW_PROGRAM */ - struct gl_shader_program *prog = - ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_EVAL]; + const struct gl_program *tep = brw->tess_eval_program; - if (prog) { + if (tep) { /* BRW_NEW_TES_PROG_DATA */ - brw_upload_abo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_TESS_EVAL], - &brw->tes.base, &brw->tes.prog_data->base.base); + brw_upload_abo_surfaces(brw, tep, &brw->tes.base, + brw->tes.base.prog_data); } } @@ -124,15 +123,13 @@ static void brw_upload_tes_image_surfaces(struct brw_context *brw) { - struct gl_context *ctx = &brw->ctx; /* BRW_NEW_TESS_PROGRAMS */ - struct gl_shader_program *prog = - ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_EVAL]; + const struct gl_program *tep = brw->tess_eval_program; - if (prog) { + if (tep) { /* BRW_NEW_TES_PROG_DATA, BRW_NEW_IMAGE_UNITS */ - brw_upload_image_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_TESS_EVAL], - &brw->tes.base, &brw->tes.prog_data->base.base); + brw_upload_image_surfaces(brw, tep, &brw->tes.base, + brw->tes.base.prog_data); } } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_tex.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_tex.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_tex.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_tex.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,56 +0,0 @@ -/* - Copyright (C) Intel Corp. 2006. All Rights Reserved. - Intel funded Tungsten Graphics to - develop this 3D driver. - - Permission is hereby granted, free of charge, to any person obtaining - a copy of this software and associated documentation files (the - "Software"), to deal in the Software without restriction, including - without limitation the rights to use, copy, modify, merge, publish, - distribute, sublicense, and/or sell copies of the Software, and to - permit persons to whom the Software is furnished to do so, subject to - the following conditions: - - The above copyright notice and this permission notice (including the - next paragraph) shall be included in all copies or substantial - portions of the Software. - - THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE - LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION - OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - - **********************************************************************/ - /* - * Authors: - * Keith Whitwell - */ - - -#include "main/mtypes.h" -#include "main/teximage.h" - -#include "intel_tex.h" -#include "brw_context.h" - -/** - * Finalizes all textures, completing any rendering that needs to be done - * to prepare them. - */ -void brw_validate_textures( struct brw_context *brw ) -{ - struct gl_context *ctx = &brw->ctx; - int i; - int maxEnabledUnit = ctx->Texture._MaxEnabledTexImageUnit; - - for (i = 0; i <= maxEnabledUnit; i++) { - struct gl_texture_unit *texUnit = &ctx->Texture.Unit[i]; - - if (texUnit->_Current) { - intel_finalize_mipmap_tree(brw, i); - } - } -} diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_tex_layout.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_tex_layout.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_tex_layout.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_tex_layout.c 2017-06-01 10:37:10.000000000 +0000 @@ -610,8 +610,7 @@ if (minimum_pitch < 64) return I915_TILING_NONE; - if (ALIGN(minimum_pitch, 512) >= 32768 || - mt->total_width >= 32768 || mt->total_height >= 32768) { + if (ALIGN(minimum_pitch, 512) >= 32768) { perf_debug("%dx%d miptree too large to blit, falling back to untiled", mt->total_width, mt->total_height); return I915_TILING_NONE; @@ -763,10 +762,8 @@ mt->halign = 8; mt->valign = brw->gen >= 7 ? 8 : 4; } else if (brw->gen >= 9 && mt->tr_mode != INTEL_MIPTREE_TRMODE_NONE) { - /* XY_FAST_COPY_BLT doesn't support horizontal alignment < 32 or - * vertical alignment < 64. */ - mt->halign = MAX2(tr_mode_horizontal_texture_alignment(mt), 32); - mt->valign = MAX2(tr_mode_vertical_texture_alignment(mt), 64); + mt->halign = tr_mode_horizontal_texture_alignment(mt); + mt->valign = tr_mode_vertical_texture_alignment(mt); } else { mt->halign = intel_horizontal_texture_alignment_unit(brw, mt, layout_flags); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_urb.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_urb.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_urb.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_urb.c 2017-06-01 10:37:10.000000000 +0000 @@ -115,7 +115,7 @@ static void recalculate_urb_fence( struct brw_context *brw ) { GLuint csize = brw->curbe.total_size; - GLuint vsize = brw->vs.prog_data->base.urb_entry_size; + GLuint vsize = brw_vue_prog_data(brw->vs.base.prog_data)->urb_entry_size; GLuint sfsize = brw->sf.prog_data->urb_entry_size; if (csize < limits[CS].min_entry_size) diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_builder.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_builder.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_builder.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_builder.h 2017-06-01 10:37:10.000000000 +0000 @@ -52,8 +52,9 @@ /** * Construct a vec4_builder that inserts instructions into \p shader. */ - vec4_builder(backend_shader *shader) : + vec4_builder(backend_shader *shader, unsigned dispatch_width = 8) : shader(shader), block(NULL), cursor(NULL), + _dispatch_width(dispatch_width), _group(0), force_writemask_all(false), annotation() { @@ -67,6 +68,7 @@ */ vec4_builder(backend_shader *shader, bblock_t *block, instruction *inst) : shader(shader), block(block), cursor(inst), + _dispatch_width(inst->exec_size), _group(inst->group), force_writemask_all(inst->force_writemask_all) { annotation.str = inst->annotation; @@ -95,7 +97,26 @@ vec4_builder at_end() const { - return at(NULL, (exec_node *)&shader->instructions.tail); + return at(NULL, (exec_node *)&shader->instructions.tail_sentinel); + } + + /** + * Construct a builder specifying the default SIMD width and group of + * channel enable signals, inheriting other code generation parameters + * from this. + * + * \p n gives the default SIMD width, \p i gives the slot group used for + * predication and control flow masking in multiples of \p n channels. + */ + vec4_builder + group(unsigned n, unsigned i) const + { + assert(force_writemask_all || + (n <= dispatch_width() && i < dispatch_width() / n)); + vec4_builder bld = *this; + bld._dispatch_width = n; + bld._group += i * n; + return bld; } /** @@ -130,7 +151,16 @@ unsigned dispatch_width() const { - return 8; + return _dispatch_width; + } + + /** + * Get the channel group in use. + */ + unsigned + group() const + { + return _group; } /** @@ -281,7 +311,10 @@ instruction * emit(instruction *inst) const { + inst->exec_size = dispatch_width(); + inst->group = group(); inst->force_writemask_all = force_writemask_all; + inst->size_written = inst->exec_size * type_sz(inst->dst.type); inst->annotation = annotation.str; inst->ir = annotation.ir; @@ -373,6 +406,7 @@ ALU1(CBIT) ALU2(CMPN) ALU3(CSEL) + ALU1(DIM) ALU2(DP2) ALU2(DP3) ALU2(DP4) @@ -586,6 +620,8 @@ bblock_t *block; exec_node *cursor; + unsigned _dispatch_width; + unsigned _group; bool force_writemask_all; /** Debug annotation info. */ diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_cmod_propagation.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_cmod_propagation.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_cmod_propagation.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_cmod_propagation.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -68,15 +68,17 @@ bool read_flag = false; foreach_inst_in_block_reverse_starting_from(vec4_instruction, scan_inst, inst) { - if (inst->src[0].in_range(scan_inst->dst, - scan_inst->regs_written)) { + if (regions_overlap(inst->src[0], inst->size_read(0), + scan_inst->dst, scan_inst->size_written)) { if ((scan_inst->predicate && scan_inst->opcode != BRW_OPCODE_SEL) || - scan_inst->dst.reg_offset != inst->src[0].reg_offset || + scan_inst->dst.offset != inst->src[0].offset || (scan_inst->dst.writemask != WRITEMASK_X && scan_inst->dst.writemask != WRITEMASK_XYZW) || (scan_inst->dst.writemask == WRITEMASK_XYZW && inst->src[0].swizzle != BRW_SWIZZLE_XYZW) || - (inst->dst.writemask & ~scan_inst->dst.writemask) != 0) { + (inst->dst.writemask & ~scan_inst->dst.writemask) != 0 || + scan_inst->exec_size != inst->exec_size || + scan_inst->group != inst->group) { break; } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -46,6 +46,7 @@ return (inst->opcode == BRW_OPCODE_MOV && !inst->predicate && inst->dst.file == VGRF && + inst->dst.offset % REG_SIZE == 0 && !inst->dst.reladdr && !inst->src[0].reladdr && (inst->dst.type == inst->src[0].type || @@ -72,7 +73,8 @@ if (!src || src->file != VGRF) return false; - return (src->in_range(inst->dst, inst->regs_written) && + return regions_overlap(*src, REG_SIZE, inst->dst, inst->size_written) && + (inst->dst.offset != src->offset || inst->dst.writemask & (1 << BRW_GET_SWZ(src->swizzle, ch))); } @@ -130,7 +132,7 @@ } static bool -try_constant_propagate(const struct brw_device_info *devinfo, +try_constant_propagate(const struct gen_device_info *devinfo, vec4_instruction *inst, int arg, const copy_entry *entry) { @@ -149,6 +151,13 @@ if (value.file != IMM) return false; + /* 64-bit types can't be used except for one-source instructions, which + * higher levels should have constant folded away, so there's no point in + * propagating immediates here. + */ + if (type_sz(value.type) == 8 || type_sz(inst->src[arg].type) == 8) + return false; + if (value.type == BRW_REGISTER_TYPE_VF) { /* The result of bit-casting the component values of a vector float * cannot in general be represented as an immediate. @@ -281,7 +290,23 @@ } static bool -try_copy_propagate(const struct brw_device_info *devinfo, +is_align1_opcode(unsigned opcode) +{ + switch (opcode) { + case VEC4_OPCODE_FROM_DOUBLE: + case VEC4_OPCODE_TO_DOUBLE: + case VEC4_OPCODE_PICK_LOW_32BIT: + case VEC4_OPCODE_PICK_HIGH_32BIT: + case VEC4_OPCODE_SET_LOW_32BIT: + case VEC4_OPCODE_SET_HIGH_32BIT: + return true; + default: + return false; + } +} + +static bool +try_copy_propagate(const struct gen_device_info *devinfo, vec4_instruction *inst, int arg, const copy_entry *entry, int attributes_per_reg) { @@ -299,11 +324,39 @@ value.file != ATTR) return false; + /* In gen < 8 instructions that write 2 registers also need to read 2 + * registers. Make sure we don't break that restriction by copy + * propagating from a uniform. + */ + if (devinfo->gen < 8 && inst->size_written > REG_SIZE && is_uniform(value)) + return false; + + /* There is a regioning restriction such that if execsize == width + * and hstride != 0 then the vstride can't be 0. When we split instrutions + * that take a single-precision source (like F->DF conversions) we end up + * with a 4-wide source on an instruction with an execution size of 4. + * If we then copy-propagate the source from a uniform we also end up with a + * vstride of 0 and we violate the restriction. + */ + if (inst->exec_size == 4 && value.file == UNIFORM && + type_sz(value.type) == 4) + return false; + + /* If the type of the copy value is different from the type of the + * instruction then the swizzles and writemasks involved don't have the same + * meaning and simply replacing the source would produce different semantics. + */ + if (type_sz(value.type) != type_sz(inst->src[arg].type)) + return false; + if (devinfo->gen >= 8 && (value.negate || value.abs) && is_logic_op(inst->opcode)) { return false; } + if (inst->src[arg].offset % REG_SIZE || value.offset % REG_SIZE) + return false; + bool has_source_modifiers = value.negate || value.abs; /* gen6 math and gen7+ SENDs from GRFs ignore source modifiers on @@ -324,6 +377,14 @@ unsigned composed_swizzle = brw_compose_swizzle(inst->src[arg].swizzle, value.swizzle); + + /* Instructions that operate on vectors in ALIGN1 mode will ignore swizzles + * so copy-propagation won't be safe if the composed swizzle is anything + * other than the identity. + */ + if (is_align1_opcode(inst->opcode) && composed_swizzle != BRW_SWIZZLE_XYZW) + return false; + if (inst->is_3src(devinfo) && (value.file == UNIFORM || (value.file == ATTR && attributes_per_reg != 1)) && @@ -436,12 +497,13 @@ inst->src[i].reladdr) continue; - /* We only handle single-register copies. */ - if (inst->regs_read(i) != 1) + /* We only handle register-aligned single GRF copies. */ + if (inst->size_read(i) != REG_SIZE || + inst->src[i].offset % REG_SIZE) continue; const unsigned reg = (alloc.offsets[inst->src[i].nr] + - inst->src[i].reg_offset); + inst->src[i].offset / REG_SIZE); const copy_entry &entry = entries[reg]; if (do_constant_prop && try_constant_propagate(devinfo, inst, i, &entry)) @@ -453,7 +515,7 @@ /* Track available source registers. */ if (inst->dst.file == VGRF) { const int reg = - alloc.offsets[inst->dst.nr] + inst->dst.reg_offset; + alloc.offsets[inst->dst.nr] + inst->dst.offset / REG_SIZE; /* Update our destination's current channel values. For a direct copy, * the value is the newly propagated source. Otherwise, we don't know diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -68,7 +68,7 @@ src_reg::src_reg(struct ::brw_reg reg) : backend_reg(reg) { - this->reg_offset = 0; + this->offset = 0; this->reladdr = NULL; } @@ -125,7 +125,7 @@ dst_reg::dst_reg(struct ::brw_reg reg) : backend_reg(reg) { - this->reg_offset = 0; + this->offset = 0; this->reladdr = NULL; } @@ -194,16 +194,19 @@ case TES_OPCODE_ADD_INDIRECT_URB_OFFSET: return true; default: - return false; + /* 8-wide compressed DF operations are executed as two 4-wide operations, + * so we have a src/dst hazard if the first half of the instruction + * overwrites the source of the second half. Prevent this by marking + * compressed instructions as having src/dst hazards, so the register + * allocator assigns safe register regions for dst and srcs. + */ + return size_written > REG_SIZE; } } unsigned -vec4_instruction::regs_read(unsigned arg) const +vec4_instruction::size_read(unsigned arg) const { - if (src[arg].file == BAD_FILE) - return 0; - switch (opcode) { case SHADER_OPCODE_SHADER_TIME_ADD: case SHADER_OPCODE_UNTYPED_ATOMIC: @@ -213,18 +216,31 @@ case SHADER_OPCODE_TYPED_SURFACE_READ: case SHADER_OPCODE_TYPED_SURFACE_WRITE: case TCS_OPCODE_URB_WRITE: - return arg == 0 ? mlen : 1; - + if (arg == 0) + return mlen * REG_SIZE; + break; case VS_OPCODE_PULL_CONSTANT_LOAD_GEN7: - return arg == 1 ? mlen : 1; + if (arg == 1) + return mlen * REG_SIZE; + break; + default: + break; + } + switch (src[arg].file) { + case BAD_FILE: + return 0; + case IMM: + case UNIFORM: + return 4 * type_sz(src[arg].type); default: - return 1; + /* XXX - Represent actual vertical stride. */ + return exec_size * type_sz(src[arg].type); } } bool -vec4_instruction::can_do_source_mods(const struct brw_device_info *devinfo) +vec4_instruction::can_do_source_mods(const struct gen_device_info *devinfo) { if (devinfo->gen == 6 && is_math()) return false; @@ -239,10 +255,16 @@ } bool -vec4_instruction::can_do_writemask(const struct brw_device_info *devinfo) +vec4_instruction::can_do_writemask(const struct gen_device_info *devinfo) { switch (opcode) { case SHADER_OPCODE_GEN4_SCRATCH_READ: + case VEC4_OPCODE_FROM_DOUBLE: + case VEC4_OPCODE_TO_DOUBLE: + case VEC4_OPCODE_PICK_LOW_32BIT: + case VEC4_OPCODE_PICK_HIGH_32BIT: + case VEC4_OPCODE_SET_LOW_32BIT: + case VEC4_OPCODE_SET_HIGH_32BIT: case VS_OPCODE_PULL_CONSTANT_LOAD: case VS_OPCODE_PULL_CONSTANT_LOAD_GEN7: case VS_OPCODE_SET_SIMD4X2_HEADER_GEN9: @@ -355,7 +377,7 @@ bool progress = false; foreach_block(block, cfg) { - int last_reg = -1, last_reg_offset = -1; + int last_reg = -1, last_offset = -1; enum brw_reg_file last_reg_file = BAD_FILE; uint8_t imm[4] = { 0 }; @@ -377,6 +399,7 @@ inst->src[0].file == IMM && inst->predicate == BRW_PREDICATE_NONE && inst->dst.writemask != WRITEMASK_XYZW && + type_sz(inst->src[0].type) < 8 && (inst->src[0].type == inst->dst.type || inst->src[0].d == 0)) { vf = brw_float_to_vf(inst->src[0].d); @@ -395,7 +418,7 @@ * sequence. Combine anything we've accumulated so far. */ if (last_reg != inst->dst.nr || - last_reg_offset != inst->dst.reg_offset || + last_offset != inst->dst.offset || last_reg_file != inst->dst.file || (vf > 0 && dest_type != need_type)) { @@ -439,7 +462,7 @@ imm_inst[inst_count++] = inst; last_reg = inst->dst.nr; - last_reg_offset = inst->dst.reg_offset; + last_offset = inst->dst.offset; last_reg_file = inst->dst.file; if (vf > 0) dest_type = need_type; @@ -495,6 +518,16 @@ case BRW_OPCODE_DP2: swizzle = brw_swizzle_for_size(2); break; + + case VEC4_OPCODE_TO_DOUBLE: + case VEC4_OPCODE_FROM_DOUBLE: + case VEC4_OPCODE_PICK_LOW_32BIT: + case VEC4_OPCODE_PICK_HIGH_32BIT: + case VEC4_OPCODE_SET_LOW_32BIT: + case VEC4_OPCODE_SET_HIGH_32BIT: + swizzle = brw_swizzle_for_size(4); + break; + default: swizzle = brw_swizzle_for_mask(inst->dst.writemask); break; @@ -539,22 +572,52 @@ assert(!inst->src[i].reladdr); - inst->src[i].nr += inst->src[i].reg_offset; - inst->src[i].reg_offset = 0; + inst->src[i].nr += inst->src[i].offset / 16; + inst->src[i].offset %= 16; } } } +/* This function returns the register number where we placed the uniform */ +static int +set_push_constant_loc(const int nr_uniforms, int *new_uniform_count, + const int src, const int size, const int channel_size, + int *new_loc, int *new_chan, + int *new_chans_used) +{ + int dst; + /* Find the lowest place we can slot this uniform in. */ + for (dst = 0; dst < nr_uniforms; dst++) { + if (ALIGN(new_chans_used[dst], channel_size) + size <= 4) + break; + } + + assert(dst < nr_uniforms); + + new_loc[src] = dst; + new_chan[src] = ALIGN(new_chans_used[dst], channel_size); + new_chans_used[dst] = ALIGN(new_chans_used[dst], channel_size) + size; + + *new_uniform_count = MAX2(*new_uniform_count, dst + 1); + return dst; +} + void vec4_visitor::pack_uniform_registers() { uint8_t chans_used[this->uniforms]; int new_loc[this->uniforms]; int new_chan[this->uniforms]; + bool is_aligned_to_dvec4[this->uniforms]; + int new_chans_used[this->uniforms]; + int channel_sizes[this->uniforms]; memset(chans_used, 0, sizeof(chans_used)); memset(new_loc, 0, sizeof(new_loc)); memset(new_chan, 0, sizeof(new_chan)); + memset(new_chans_used, 0, sizeof(new_chans_used)); + memset(is_aligned_to_dvec4, 0, sizeof(is_aligned_to_dvec4)); + memset(channel_sizes, 0, sizeof(channel_sizes)); /* Find which uniform vectors are actually used by the program. We * expect unused vector elements when we've moved array access out @@ -583,13 +646,25 @@ if (inst->src[i].file != UNIFORM) continue; + assert(type_sz(inst->src[i].type) % 4 == 0); + int channel_size = type_sz(inst->src[i].type) / 4; + int reg = inst->src[i].nr; for (int c = 0; c < 4; c++) { if (!(readmask & (1 << c))) continue; - chans_used[reg] = MAX2(chans_used[reg], - BRW_GET_SWZ(inst->src[i].swizzle, c) + 1); + unsigned channel = BRW_GET_SWZ(inst->src[i].swizzle, c) + 1; + unsigned used = MAX2(chans_used[reg], channel * channel_size); + if (used <= 4) { + chans_used[reg] = used; + channel_sizes[reg] = MAX2(channel_sizes[reg], channel_size); + } else { + is_aligned_to_dvec4[reg] = true; + is_aligned_to_dvec4[reg + 1] = true; + chans_used[reg + 1] = used - 4; + channel_sizes[reg + 1] = MAX2(channel_sizes[reg + 1], channel_size); + } } } @@ -614,42 +689,60 @@ int new_uniform_count = 0; + /* As the uniforms are going to be reordered, take the data from a temporary + * copy of the original param[]. + */ + gl_constant_value **param = ralloc_array(NULL, gl_constant_value*, + stage_prog_data->nr_params); + memcpy(param, stage_prog_data->param, + sizeof(gl_constant_value*) * stage_prog_data->nr_params); + /* Now, figure out a packing of the live uniform vectors into our - * push constants. + * push constants. Start with dvec{3,4} because they are aligned to + * dvec4 size (2 vec4). */ for (int src = 0; src < uniforms; src++) { int size = chans_used[src]; - if (size == 0) + if (size == 0 || !is_aligned_to_dvec4[src]) continue; - int dst; - /* Find the lowest place we can slot this uniform in. */ - for (dst = 0; dst < src; dst++) { - if (chans_used[dst] + size <= 4) - break; + /* dvec3 are aligned to dvec4 size, apply the alignment of the size + * to 4 to avoid moving last component of a dvec3 to the available + * location at the end of a previous dvec3. These available locations + * could be filled by smaller variables in next loop. + */ + size = ALIGN(size, 4); + int dst = set_push_constant_loc(uniforms, &new_uniform_count, + src, size, channel_sizes[src], + new_loc, new_chan, + new_chans_used); + /* Move the references to the data */ + for (int j = 0; j < size; j++) { + stage_prog_data->param[dst * 4 + new_chan[src] + j] = + param[src * 4 + j]; } + } - if (src == dst) { - new_loc[src] = dst; - new_chan[src] = 0; - } else { - new_loc[src] = dst; - new_chan[src] = chans_used[dst]; + /* Continue with the rest of data, which is aligned to vec4. */ + for (int src = 0; src < uniforms; src++) { + int size = chans_used[src]; - /* Move the references to the data */ - for (int j = 0; j < size; j++) { - stage_prog_data->param[dst * 4 + new_chan[src] + j] = - stage_prog_data->param[src * 4 + j]; - } + if (size == 0 || is_aligned_to_dvec4[src]) + continue; - chans_used[dst] += size; - chans_used[src] = 0; + int dst = set_push_constant_loc(uniforms, &new_uniform_count, + src, size, channel_sizes[src], + new_loc, new_chan, + new_chans_used); + /* Move the references to the data */ + for (int j = 0; j < size; j++) { + stage_prog_data->param[dst * 4 + new_chan[src] + j] = + param[src * 4 + j]; } - - new_uniform_count = MAX2(new_uniform_count, dst + 1); } + ralloc_free(param); this->uniforms = new_uniform_count; /* Now, update the instructions for our repacked uniforms. */ @@ -657,12 +750,12 @@ for (int i = 0 ; i < 3; i++) { int src = inst->src[i].nr; - if (inst->src[i].file != UNIFORM) - continue; + if (inst->src[i].file != UNIFORM) + continue; + int chan = new_chan[src] / channel_sizes[src]; inst->src[i].nr = new_loc[src]; - inst->src[i].swizzle += BRW_SWIZZLE4(new_chan[src], new_chan[src], - new_chan[src], new_chan[src]); + inst->src[i].swizzle += BRW_SWIZZLE4(chan, chan, chan, chan); } } } @@ -808,34 +901,34 @@ pull_constant_loc[i / 4] = -1; if (i >= max_uniform_components) { - const gl_constant_value **values = &stage_prog_data->param[i]; + const gl_constant_value **values = &stage_prog_data->param[i]; - /* Try to find an existing copy of this uniform in the pull - * constants if it was part of an array access already. - */ - for (unsigned int j = 0; j < stage_prog_data->nr_pull_params; j += 4) { - int matches; + /* Try to find an existing copy of this uniform in the pull + * constants if it was part of an array access already. + */ + for (unsigned int j = 0; j < stage_prog_data->nr_pull_params; j += 4) { + int matches; - for (matches = 0; matches < 4; matches++) { - if (stage_prog_data->pull_param[j + matches] != values[matches]) - break; - } + for (matches = 0; matches < 4; matches++) { + if (stage_prog_data->pull_param[j + matches] != values[matches]) + break; + } - if (matches == 4) { - pull_constant_loc[i / 4] = j / 4; - break; - } - } + if (matches == 4) { + pull_constant_loc[i / 4] = j / 4; + break; + } + } - if (pull_constant_loc[i / 4] == -1) { - assert(stage_prog_data->nr_pull_params % 4 == 0); - pull_constant_loc[i / 4] = stage_prog_data->nr_pull_params / 4; + if (pull_constant_loc[i / 4] == -1) { + assert(stage_prog_data->nr_pull_params % 4 == 0); + pull_constant_loc[i / 4] = stage_prog_data->nr_pull_params / 4; - for (int j = 0; j < 4; j++) { - stage_prog_data->pull_param[stage_prog_data->nr_pull_params++] = + for (int j = 0; j < 4; j++) { + stage_prog_data->pull_param[stage_prog_data->nr_pull_params++] = values[j]; - } - } + } + } } } @@ -844,21 +937,23 @@ */ foreach_block_and_inst_safe(block, vec4_instruction, inst, cfg) { for (int i = 0 ; i < 3; i++) { - if (inst->src[i].file != UNIFORM || + if (inst->src[i].file != UNIFORM || pull_constant_loc[inst->src[i].nr] == -1) - continue; + continue; int uniform = inst->src[i].nr; - dst_reg temp = dst_reg(this, glsl_type::vec4_type); + const glsl_type *temp_type = type_sz(inst->src[i].type) == 8 ? + glsl_type::dvec4_type : glsl_type::vec4_type; + dst_reg temp = dst_reg(this, temp_type); - emit_pull_constant_load(block, inst, temp, inst->src[i], - pull_constant_loc[uniform], src_reg()); + emit_pull_constant_load(block, inst, temp, inst->src[i], + pull_constant_loc[uniform], src_reg()); - inst->src[i].file = temp.file; + inst->src[i].file = temp.file; inst->src[i].nr = temp.nr; - inst->src[i].reg_offset = temp.reg_offset; - inst->src[i].reladdr = NULL; + inst->src[i].offset %= 16; + inst->src[i].reladdr = NULL; } } @@ -874,16 +969,31 @@ (reg.type == BRW_REGISTER_TYPE_UD || \ reg.type == BRW_REGISTER_TYPE_D) - /* "When source or destination datatype is 64b or operation is integer DWord +#define IS_64BIT(reg) (reg.file != BAD_FILE && type_sz(reg.type) == 8) + + /* From the Cherryview and Broadwell PRMs: + * + * "When source or destination datatype is 64b or operation is integer DWord * multiply, DepCtrl must not be used." - * May apply to future SoCs as well. + * + * SKL PRMs don't include this restriction, however, gen7 seems to be + * affected, at least by the 64b restriction, since DepCtrl with double + * precision instructions seems to produce GPU hangs in some cases. */ - if (devinfo->is_cherryview) { + if (devinfo->gen == 8 || devinfo->is_broxton) { if (inst->opcode == BRW_OPCODE_MUL && IS_DWORD(inst->src[0]) && IS_DWORD(inst->src[1])) return true; } + + if (devinfo->gen >= 7 && devinfo->gen <= 8) { + if (IS_64BIT(inst->dst) || IS_64BIT(inst->src[0]) || + IS_64BIT(inst->src[1]) || IS_64BIT(inst->src[2])) + return true; + } + +#undef IS_64BIT #undef IS_DWORD if (devinfo->gen >= 8) { @@ -948,7 +1058,7 @@ * on, don't do dependency control across the read. */ for (int i = 0; i < 3; i++) { - int reg = inst->src[i].nr + inst->src[i].reg_offset; + int reg = inst->src[i].nr + inst->src[i].offset / REG_SIZE; if (inst->src[i].file == VGRF) { last_grf_write[reg] = NULL; } else if (inst->src[i].file == FIXED_GRF) { @@ -967,9 +1077,10 @@ /* Now, see if we can do dependency control for this instruction * against a previous one writing to its destination. */ - int reg = inst->dst.nr + inst->dst.reg_offset; + int reg = inst->dst.nr + inst->dst.offset / REG_SIZE; if (inst->dst.file == VGRF || inst->dst.file == FIXED_GRF) { if (last_grf_write[reg] && + last_grf_write[reg]->dst.offset == inst->dst.offset && !(inst->dst.writemask & grf_channels_written[reg])) { last_grf_write[reg]->no_dd_clear = true; inst->no_dd_check = true; @@ -981,6 +1092,7 @@ grf_channels_written[reg] |= inst->dst.writemask; } else if (inst->dst.file == MRF) { if (last_mrf_write[reg] && + last_mrf_write[reg]->dst.offset == inst->dst.offset && !(inst->dst.writemask & mrf_channels_written[reg])) { last_mrf_write[reg]->no_dd_clear = true; inst->no_dd_check = true; @@ -996,7 +1108,7 @@ } bool -vec4_instruction::can_reswizzle(const struct brw_device_info *devinfo, +vec4_instruction::can_reswizzle(const struct gen_device_info *devinfo, int dst_writemask, int swizzle, int swizzle_mask) @@ -1007,6 +1119,13 @@ if (devinfo->gen == 6 && is_math() && swizzle != BRW_SWIZZLE_XYZW) return false; + /* We can't swizzle implicit accumulator access. We'd have to + * reswizzle the producer of the accumulator value in addition + * to the consumer (i.e. both MUL and MACH). Just skip this. + */ + if (reads_accumulator_implicitly()) + return false; + if (!can_do_writemask(devinfo) && dst_writemask != WRITEMASK_XYZW) return false; @@ -1086,7 +1205,7 @@ /* Remove no-op MOVs */ if (inst->dst.file == inst->src[0].file && inst->dst.nr == inst->src[0].nr && - inst->dst.reg_offset == inst->src[0].reg_offset) { + inst->dst.offset == inst->src[0].offset) { bool is_nop_mov = true; for (unsigned c = 0; c < 4; c++) { @@ -1111,7 +1230,7 @@ /* Can't coalesce this GRF if someone else was going to * read it later. */ - if (var_range_end(var_from_reg(alloc, dst_reg(inst->src[0])), 4) > ip) + if (var_range_end(var_from_reg(alloc, dst_reg(inst->src[0])), 8) > ip) continue; /* We need to check interference with the final destination between this @@ -1133,7 +1252,8 @@ inst) { _scan_inst = scan_inst; - if (inst->src[0].in_range(scan_inst->dst, scan_inst->regs_written)) { + if (regions_overlap(inst->src[0], inst->size_read(0), + scan_inst->dst, scan_inst->size_written)) { /* Found something writing to the reg we want to coalesce away. */ if (to_mrf) { /* SEND instructions can't have MRF as a destination. */ @@ -1161,6 +1281,20 @@ scan_inst->dst.type == scan_inst->src[0].type)) break; + /* Only allow coalescing between registers of the same type size. + * Otherwise we would need to make the pass aware of the fact that + * channel sizes are different for single and double precision. + */ + if (type_sz(inst->src[0].type) != type_sz(scan_inst->src[0].type)) + break; + + /* Check that scan_inst writes the same amount of data as the + * instruction, otherwise coalescing would lead to writing a + * different (larger or smaller) region of the destination + */ + if (scan_inst->size_written != inst->size_written) + break; + /* If we can't handle the swizzle, bail. */ if (!scan_inst->can_reswizzle(devinfo, inst->dst.writemask, inst->src[0].swizzle, @@ -1168,8 +1302,13 @@ break; } - /* This doesn't handle coalescing of multiple registers. */ - if (scan_inst->regs_written > 1) + /* This only handles coalescing writes of 8 channels (1 register + * for single-precision and 2 registers for double-precision) + * starting at the source offset of the copy instruction. + */ + if (DIV_ROUND_UP(scan_inst->size_written, + type_sz(scan_inst->dst.type)) > 8 || + scan_inst->dst.offset != inst->src[0].offset) break; /* Mark which channels we found unconditional writes for. */ @@ -1187,8 +1326,8 @@ */ bool interfered = false; for (int i = 0; i < 3; i++) { - if (inst->src[0].in_range(scan_inst->src[i], - scan_inst->regs_read(i))) + if (regions_overlap(inst->src[0], inst->size_read(0), + scan_inst->src[i], scan_inst->size_read(i))) interfered = true; } if (interfered) @@ -1197,7 +1336,8 @@ /* If somebody else writes the same channels of our destination here, * we can't coalesce before that. */ - if (inst->dst.in_range(scan_inst->dst, scan_inst->regs_written) && + if (regions_overlap(inst->dst, inst->size_written, + scan_inst->dst, scan_inst->size_written) && (inst->dst.writemask & scan_inst->dst.writemask) != 0) { break; } @@ -1213,8 +1353,8 @@ } } else { for (int i = 0; i < 3; i++) { - if (inst->dst.in_range(scan_inst->src[i], - scan_inst->regs_read(i))) + if (regions_overlap(inst->dst, inst->size_written, + scan_inst->src[i], scan_inst->size_read(i))) interfered = true; } if (interfered) @@ -1232,12 +1372,12 @@ while (scan_inst != inst) { if (scan_inst->dst.file == VGRF && scan_inst->dst.nr == inst->src[0].nr && - scan_inst->dst.reg_offset == inst->src[0].reg_offset) { + scan_inst->dst.offset == inst->src[0].offset) { scan_inst->reswizzle(inst->dst.writemask, inst->src[0].swizzle); scan_inst->dst.file = inst->dst.file; scan_inst->dst.nr = inst->dst.nr; - scan_inst->dst.reg_offset = inst->dst.reg_offset; + scan_inst->dst.offset = inst->dst.offset; if (inst->saturate && inst->dst.type != scan_inst->dst.type) { /* If we have reached this point, scan_inst is a non @@ -1274,6 +1414,14 @@ bool progress = false; unsigned depth = 0; + if (!brw_stage_has_packed_dispatch(devinfo, stage, stage_prog_data)) { + /* The optimization below assumes that channel zero is live on thread + * dispatch, which may not be the case if the fixed function dispatches + * threads sparsely. + */ + return false; + } + foreach_block_and_inst_safe(block, vec4_instruction, inst, cfg) { switch (inst->opcode) { case BRW_OPCODE_IF: @@ -1307,10 +1455,10 @@ * Splits virtual GRFs requesting more than one contiguous physical register. * * We initially create large virtual GRFs for temporary structures, arrays, - * and matrices, so that the dereference visitor functions can add reg_offsets - * to work their way down to the actual member being accessed. But when it - * comes to optimization, we'd like to treat each register as individual - * storage if possible. + * and matrices, so that the visitor functions can add offsets to work their + * way down to the actual member being accessed. But when it comes to + * optimization, we'd like to treat each register as individual storage if + * possible. * * So far, the only thing that might prevent splitting is a send message from * a GRF on IVB. @@ -1333,11 +1481,11 @@ * to split. */ foreach_block_and_inst(block, vec4_instruction, inst, cfg) { - if (inst->dst.file == VGRF && inst->regs_written > 1) + if (inst->dst.file == VGRF && regs_written(inst) > 1) split_grf[inst->dst.nr] = false; for (int i = 0; i < 3; i++) { - if (inst->src[i].file == VGRF && inst->regs_read(i) > 1) + if (inst->src[i].file == VGRF && regs_read(inst, i) > 1) split_grf[inst->src[i].nr] = false; } } @@ -1360,17 +1508,17 @@ foreach_block_and_inst(block, vec4_instruction, inst, cfg) { if (inst->dst.file == VGRF && split_grf[inst->dst.nr] && - inst->dst.reg_offset != 0) { + inst->dst.offset / REG_SIZE != 0) { inst->dst.nr = (new_virtual_grf[inst->dst.nr] + - inst->dst.reg_offset - 1); - inst->dst.reg_offset = 0; + inst->dst.offset / REG_SIZE - 1); + inst->dst.offset %= REG_SIZE; } for (int i = 0; i < 3; i++) { if (inst->src[i].file == VGRF && split_grf[inst->src[i].nr] && - inst->src[i].reg_offset != 0) { + inst->src[i].offset / REG_SIZE != 0) { inst->src[i].nr = (new_virtual_grf[inst->src[i].nr] + - inst->src[i].reg_offset - 1); - inst->src[i].reg_offset = 0; + inst->src[i].offset / REG_SIZE - 1); + inst->src[i].offset %= REG_SIZE; } } } @@ -1395,7 +1543,8 @@ pred_ctrl_align16[inst->predicate]); } - fprintf(file, "%s", brw_instruction_name(devinfo, inst->opcode)); + fprintf(file, "%s(%d)", brw_instruction_name(devinfo, inst->opcode), + inst->exec_size); if (inst->saturate) fprintf(file, ".sat"); if (inst->conditional_mod) { @@ -1411,7 +1560,7 @@ switch (inst->dst.file) { case VGRF: - fprintf(file, "vgrf%d.%d", inst->dst.nr, inst->dst.reg_offset); + fprintf(file, "vgrf%d", inst->dst.nr); break; case FIXED_GRF: fprintf(file, "g%d", inst->dst.nr); @@ -1437,8 +1586,6 @@ fprintf(file, "arf%d.%d", inst->dst.nr & 0xf, inst->dst.subnr); break; } - if (inst->dst.subnr) - fprintf(file, "+%d", inst->dst.subnr); break; case BAD_FILE: fprintf(file, "(null)"); @@ -1448,6 +1595,13 @@ case UNIFORM: unreachable("not reached"); } + if (inst->dst.offset || + (inst->dst.file == VGRF && + alloc.sizes[inst->dst.nr] * REG_SIZE != inst->size_written)) { + const unsigned reg_size = (inst->dst.file == UNIFORM ? 16 : REG_SIZE); + fprintf(file, "+%d.%d", inst->dst.offset / reg_size, + inst->dst.offset % reg_size); + } if (inst->dst.writemask != WRITEMASK_XYZW) { fprintf(file, "."); if (inst->dst.writemask & 1) @@ -1474,7 +1628,7 @@ fprintf(file, "vgrf%d", inst->src[i].nr); break; case FIXED_GRF: - fprintf(file, "g%d", inst->src[i].nr); + fprintf(file, "g%d.%d", inst->src[i].nr, inst->src[i].subnr); break; case ATTR: fprintf(file, "attr%d", inst->src[i].nr); @@ -1487,6 +1641,9 @@ case BRW_REGISTER_TYPE_F: fprintf(file, "%fF", inst->src[i].f); break; + case BRW_REGISTER_TYPE_DF: + fprintf(file, "%fDF", inst->src[i].df); + break; case BRW_REGISTER_TYPE_D: fprintf(file, "%dD", inst->src[i].d); break; @@ -1523,8 +1680,6 @@ fprintf(file, "arf%d.%d", inst->src[i].nr & 0xf, inst->src[i].subnr); break; } - if (inst->src[i].subnr) - fprintf(file, "+%d", inst->src[i].subnr); break; case BAD_FILE: fprintf(file, "(null)"); @@ -1533,11 +1688,13 @@ unreachable("not reached"); } - /* Don't print .0; and only VGRFs have reg_offsets and sizes */ - if (inst->src[i].reg_offset != 0 && - inst->src[i].file == VGRF && - alloc.sizes[inst->src[i].nr] != 1) - fprintf(file, ".%d", inst->src[i].reg_offset); + if (inst->src[i].offset || + (inst->src[i].file == VGRF && + alloc.sizes[inst->src[i].nr] * REG_SIZE != inst->size_read(i))) { + const unsigned reg_size = (inst->src[i].file == UNIFORM ? 16 : REG_SIZE); + fprintf(file, "+%d.%d", inst->src[i].offset / reg_size, + inst->src[i].offset % reg_size); + } if (inst->src[i].file != IMM) { static const char *chans[4] = {"x", "y", "z", "w"}; @@ -1561,17 +1718,27 @@ if (inst->force_writemask_all) fprintf(file, " NoMask"); + if (inst->exec_size != 8) + fprintf(file, " group%d", inst->group); + fprintf(file, "\n"); } static inline struct brw_reg -attribute_to_hw_reg(int attr, bool interleaved) +attribute_to_hw_reg(int attr, brw_reg_type type, bool interleaved) { - if (interleaved) - return stride(brw_vec4_grf(attr / 2, (attr % 2) * 4), 0, 4, 1); - else - return brw_vec8_grf(attr, 0); + struct brw_reg reg; + + unsigned width = REG_SIZE / 2 / MAX2(4, type_sz(type)); + if (interleaved) { + reg = stride(brw_vecn_grf(width, attr / 2, (attr % 2) * 4), 0, width, 1); + } else { + reg = brw_vecn_grf(width, attr, 0); + } + + reg.type = type; + return reg; } @@ -1593,23 +1760,25 @@ { foreach_block_and_inst(block, vec4_instruction, inst, cfg) { for (int i = 0; i < 3; i++) { - if (inst->src[i].file != ATTR) - continue; + if (inst->src[i].file != ATTR) + continue; - int grf = attribute_map[inst->src[i].nr + inst->src[i].reg_offset]; + int grf = attribute_map[inst->src[i].nr + + inst->src[i].offset / REG_SIZE]; + assert(inst->src[i].offset % REG_SIZE == 0); /* All attributes used in the shader need to have been assigned a * hardware register by the caller */ assert(grf != 0); - struct brw_reg reg = attribute_to_hw_reg(grf, interleaved); - reg.swizzle = inst->src[i].swizzle; - reg.type = inst->src[i].type; - if (inst->src[i].abs) - reg = brw_abs(reg); - if (inst->src[i].negate) - reg = negate(reg); + struct brw_reg reg = + attribute_to_hw_reg(grf, inst->src[i].type, interleaved); + reg.swizzle = inst->src[i].swizzle; + if (inst->src[i].abs) + reg = brw_abs(reg); + if (inst->src[i].negate) + reg = negate(reg); inst->src[i] = reg; } @@ -1624,10 +1793,15 @@ memset(attribute_map, 0, sizeof(attribute_map)); nr_attributes = 0; - for (int i = 0; i < VERT_ATTRIB_MAX; i++) { - if (vs_prog_data->inputs_read & BITFIELD64_BIT(i)) { - attribute_map[i] = payload_reg + nr_attributes; - nr_attributes++; + GLbitfield64 vs_inputs = vs_prog_data->inputs_read; + while (vs_inputs) { + GLuint first = ffsll(vs_inputs) - 1; + int needed_slots = + (vs_prog_data->double_inputs_read & BITFIELD64_BIT(first)) ? 2 : 1; + for (int c = 0; c < needed_slots; c++) { + attribute_map[first + c] = payload_reg + nr_attributes; + nr_attributes++; + vs_inputs &= ~BITFIELD64_BIT(first + c); } } @@ -1648,7 +1822,7 @@ lower_attributes_to_hw_regs(attribute_map, false /* interleaved */); - return payload_reg + vs_prog_data->nr_attributes; + return payload_reg + vs_prog_data->nr_attribute_slots; } int @@ -1808,7 +1982,7 @@ dst_reg offset = dst; dst_reg time = dst; - time.reg_offset++; + time.offset += REG_SIZE; offset.type = BRW_REGISTER_TYPE_UD; int index = shader_time_index * 3 + shader_time_subindex; @@ -1822,6 +1996,22 @@ inst->mlen = 2; } +static bool +is_align1_df(vec4_instruction *inst) +{ + switch (inst->opcode) { + case VEC4_OPCODE_FROM_DOUBLE: + case VEC4_OPCODE_TO_DOUBLE: + case VEC4_OPCODE_PICK_LOW_32BIT: + case VEC4_OPCODE_PICK_HIGH_32BIT: + case VEC4_OPCODE_SET_LOW_32BIT: + case VEC4_OPCODE_SET_HIGH_32BIT: + return true; + default: + return false; + } +} + void vec4_visitor::convert_to_hw_regs() { @@ -1830,30 +2020,36 @@ struct src_reg &src = inst->src[i]; struct brw_reg reg; switch (src.file) { - case VGRF: - reg = brw_vec8_grf(src.nr + src.reg_offset, 0); + case VGRF: { + reg = byte_offset(brw_vecn_grf(4, src.nr, 0), src.offset); reg.type = src.type; - reg.swizzle = src.swizzle; reg.abs = src.abs; reg.negate = src.negate; break; + } - case UNIFORM: - reg = stride(brw_vec4_grf(prog_data->base.dispatch_grf_start_reg + - (src.nr + src.reg_offset) / 2, - ((src.nr + src.reg_offset) % 2) * 4), + case UNIFORM: { + reg = stride(byte_offset(brw_vec4_grf( + prog_data->base.dispatch_grf_start_reg + + src.nr / 2, src.nr % 2 * 4), + src.offset), 0, 4, 1); reg.type = src.type; - reg.swizzle = src.swizzle; reg.abs = src.abs; reg.negate = src.negate; /* This should have been moved to pull constants. */ assert(!src.reladdr); break; + } - case ARF: case FIXED_GRF: + if (type_sz(src.type) == 8) { + reg = src.as_brw_reg(); + break; + } + /* fallthrough */ + case ARF: case IMM: continue; @@ -1867,15 +2063,33 @@ unreachable("not reached"); } + apply_logical_swizzle(®, inst, i); src = reg; + + /* From IVB PRM, vol4, part3, "General Restrictions on Regioning + * Parameters": + * + * "If ExecSize = Width and HorzStride ≠ 0, VertStride must be set + * to Width * HorzStride." + * + * We can break this rule with DF sources on DF align1 + * instructions, because the exec_size would be 4 and width is 4. + * As we know we are not accessing to next GRF, it is safe to + * set vstride to the formula given by the rule itself. + */ + if (is_align1_df(inst) && (cvt(inst->exec_size) - 1) == src.width) + src.vstride = src.width + src.hstride; } if (inst->is_3src(devinfo)) { /* 3-src instructions with scalar sources support arbitrary subnr, * but don't actually use swizzles. Convert swizzle into subnr. + * Skip this for double-precision instructions: RepCtrl=1 is not + * allowed for them and needs special handling. */ for (int i = 0; i < 3; i++) { - if (inst->src[i].vstride == BRW_VERTICAL_STRIDE_0) { + if (inst->src[i].vstride == BRW_VERTICAL_STRIDE_0 && + type_sz(inst->src[i].type) < 8) { assert(brw_is_single_value_swizzle(inst->src[i].swizzle)); inst->src[i].subnr += 4 * BRW_GET_SWZ(inst->src[i].swizzle, 0); } @@ -1887,14 +2101,14 @@ switch (inst->dst.file) { case VGRF: - reg = brw_vec8_grf(dst.nr + dst.reg_offset, 0); + reg = byte_offset(brw_vec8_grf(dst.nr, 0), dst.offset); reg.type = dst.type; reg.writemask = dst.writemask; break; case MRF: - assert(((dst.nr + dst.reg_offset) & ~BRW_MRF_COMPR4) < BRW_MAX_MRF(devinfo->gen)); - reg = brw_message_reg(dst.nr + dst.reg_offset); + reg = byte_offset(brw_message_reg(dst.nr), dst.offset); + assert((reg.nr & ~BRW_MRF_COMPR4) < BRW_MAX_MRF(devinfo->gen)); reg.type = dst.type; reg.writemask = dst.writemask; break; @@ -1918,6 +2132,491 @@ } } +static bool +stage_uses_interleaved_attributes(unsigned stage, + enum shader_dispatch_mode dispatch_mode) +{ + switch (stage) { + case MESA_SHADER_TESS_EVAL: + return true; + case MESA_SHADER_GEOMETRY: + return dispatch_mode != DISPATCH_MODE_4X2_DUAL_OBJECT; + default: + return false; + } +} + +/** + * Get the closest native SIMD width supported by the hardware for instruction + * \p inst. The instruction will be left untouched by + * vec4_visitor::lower_simd_width() if the returned value matches the + * instruction's original execution size. + */ +static unsigned +get_lowered_simd_width(const struct gen_device_info *devinfo, + enum shader_dispatch_mode dispatch_mode, + unsigned stage, const vec4_instruction *inst) +{ + /* Do not split some instructions that require special handling */ + switch (inst->opcode) { + case SHADER_OPCODE_GEN4_SCRATCH_READ: + case SHADER_OPCODE_GEN4_SCRATCH_WRITE: + return inst->exec_size; + default: + break; + } + + unsigned lowered_width = MIN2(16, inst->exec_size); + + /* We need to split some cases of double-precision instructions that write + * 2 registers. We only need to care about this in gen7 because that is the + * only hardware that implements fp64 in Align16. + */ + if (devinfo->gen == 7 && inst->size_written > REG_SIZE) { + /* Align16 8-wide double-precision SEL does not work well. Verified + * empirically. + */ + if (inst->opcode == BRW_OPCODE_SEL && type_sz(inst->dst.type) == 8) + lowered_width = MIN2(lowered_width, 4); + + /* HSW PRM, 3D Media GPGPU Engine, Region Alignment Rules for Direct + * Register Addressing: + * + * "When destination spans two registers, the source MUST span two + * registers." + */ + for (unsigned i = 0; i < 3; i++) { + if (inst->src[i].file == BAD_FILE) + continue; + if (inst->size_read(i) <= REG_SIZE) + lowered_width = MIN2(lowered_width, 4); + + /* Interleaved attribute setups use a vertical stride of 0, which + * makes them hit the associated instruction decompression bug in gen7. + * Split them to prevent this. + */ + if (inst->src[i].file == ATTR && + stage_uses_interleaved_attributes(stage, dispatch_mode)) + lowered_width = MIN2(lowered_width, 4); + } + } + + return lowered_width; +} + +static bool +dst_src_regions_overlap(vec4_instruction *inst) +{ + if (inst->size_written == 0) + return false; + + unsigned dst_start = inst->dst.offset; + unsigned dst_end = dst_start + inst->size_written - 1; + for (int i = 0; i < 3; i++) { + if (inst->src[i].file == BAD_FILE) + continue; + + if (inst->dst.file != inst->src[i].file || + inst->dst.nr != inst->src[i].nr) + continue; + + unsigned src_start = inst->src[i].offset; + unsigned src_end = src_start + inst->size_read(i) - 1; + + if ((dst_start >= src_start && dst_start <= src_end) || + (dst_end >= src_start && dst_end <= src_end) || + (dst_start <= src_start && dst_end >= src_end)) { + return true; + } + } + + return false; +} + +bool +vec4_visitor::lower_simd_width() +{ + bool progress = false; + + foreach_block_and_inst_safe(block, vec4_instruction, inst, cfg) { + const unsigned lowered_width = + get_lowered_simd_width(devinfo, prog_data->dispatch_mode, stage, inst); + assert(lowered_width <= inst->exec_size); + if (lowered_width == inst->exec_size) + continue; + + /* We need to deal with source / destination overlaps when splitting. + * The hardware supports reading from and writing to the same register + * in the same instruction, but we need to be careful that each split + * instruction we produce does not corrupt the source of the next. + * + * The easiest way to handle this is to make the split instructions write + * to temporaries if there is an src/dst overlap and then move from the + * temporaries to the original destination. We also need to consider + * instructions that do partial writes via align1 opcodes, in which case + * we need to make sure that the we initialize the temporary with the + * value of the instruction's dst. + */ + bool needs_temp = dst_src_regions_overlap(inst); + for (unsigned n = 0; n < inst->exec_size / lowered_width; n++) { + unsigned channel_offset = lowered_width * n; + + unsigned size_written = lowered_width * type_sz(inst->dst.type); + + /* Create the split instruction from the original so that we copy all + * relevant instruction fields, then set the width and calculate the + * new dst/src regions. + */ + vec4_instruction *linst = new(mem_ctx) vec4_instruction(*inst); + linst->exec_size = lowered_width; + linst->group = channel_offset; + linst->size_written = size_written; + + /* Compute split dst region */ + dst_reg dst; + if (needs_temp) { + unsigned num_regs = DIV_ROUND_UP(size_written, REG_SIZE); + dst = retype(dst_reg(VGRF, alloc.allocate(num_regs)), + inst->dst.type); + if (inst->is_align1_partial_write()) { + vec4_instruction *copy = MOV(dst, src_reg(inst->dst)); + copy->exec_size = lowered_width; + copy->group = channel_offset; + copy->size_written = size_written; + inst->insert_before(block, copy); + } + } else { + dst = horiz_offset(inst->dst, channel_offset); + } + linst->dst = dst; + + /* Compute split source regions */ + for (int i = 0; i < 3; i++) { + if (linst->src[i].file == BAD_FILE) + continue; + + if (!is_uniform(linst->src[i])) + linst->src[i] = horiz_offset(linst->src[i], channel_offset); + } + + inst->insert_before(block, linst); + + /* If we used a temporary to store the result of the split + * instruction, copy the result to the original destination + */ + if (needs_temp) { + vec4_instruction *mov = + MOV(offset(inst->dst, lowered_width, n), src_reg(dst)); + mov->exec_size = lowered_width; + mov->group = channel_offset; + mov->size_written = size_written; + mov->predicate = inst->predicate; + inst->insert_before(block, mov); + } + } + + inst->remove(block); + progress = true; + } + + if (progress) + invalidate_live_intervals(); + + return progress; +} + +static brw_predicate +scalarize_predicate(brw_predicate predicate, unsigned writemask) +{ + if (predicate != BRW_PREDICATE_NORMAL) + return predicate; + + switch (writemask) { + case WRITEMASK_X: + return BRW_PREDICATE_ALIGN16_REPLICATE_X; + case WRITEMASK_Y: + return BRW_PREDICATE_ALIGN16_REPLICATE_Y; + case WRITEMASK_Z: + return BRW_PREDICATE_ALIGN16_REPLICATE_Z; + case WRITEMASK_W: + return BRW_PREDICATE_ALIGN16_REPLICATE_W; + default: + unreachable("invalid writemask"); + } +} + +/* Gen7 has a hardware decompression bug that we can exploit to represent + * handful of additional swizzles natively. + */ +static bool +is_gen7_supported_64bit_swizzle(vec4_instruction *inst, unsigned arg) +{ + switch (inst->src[arg].swizzle) { + case BRW_SWIZZLE_XXXX: + case BRW_SWIZZLE_YYYY: + case BRW_SWIZZLE_ZZZZ: + case BRW_SWIZZLE_WWWW: + case BRW_SWIZZLE_XYXY: + case BRW_SWIZZLE_YXYX: + case BRW_SWIZZLE_ZWZW: + case BRW_SWIZZLE_WZWZ: + return true; + default: + return false; + } +} + +/* 64-bit sources use regions with a width of 2. These 2 elements in each row + * can be addressed using 32-bit swizzles (which is what the hardware supports) + * but it also means that the swizzle we apply on the first two components of a + * dvec4 is coupled with the swizzle we use for the last 2. In other words, + * only some specific swizzle combinations can be natively supported. + * + * FIXME: we can go an step further and implement even more swizzle + * variations using only partial scalarization. + * + * For more details see: + * https://bugs.freedesktop.org/show_bug.cgi?id=92760#c82 + */ +bool +vec4_visitor::is_supported_64bit_region(vec4_instruction *inst, unsigned arg) +{ + const src_reg &src = inst->src[arg]; + assert(type_sz(src.type) == 8); + + /* Uniform regions have a vstride=0. Because we use 2-wide rows with + * 64-bit regions it means that we cannot access components Z/W, so + * return false for any such case. Interleaved attributes will also be + * mapped to GRF registers with a vstride of 0, so apply the same + * treatment. + */ + if ((is_uniform(src) || + (stage_uses_interleaved_attributes(stage, prog_data->dispatch_mode) && + src.file == ATTR)) && + (brw_mask_for_swizzle(src.swizzle) & 12)) + return false; + + switch (src.swizzle) { + case BRW_SWIZZLE_XYZW: + case BRW_SWIZZLE_XXZZ: + case BRW_SWIZZLE_YYWW: + case BRW_SWIZZLE_YXWZ: + return true; + default: + return devinfo->gen == 7 && is_gen7_supported_64bit_swizzle(inst, arg); + } +} + +bool +vec4_visitor::scalarize_df() +{ + bool progress = false; + + foreach_block_and_inst_safe(block, vec4_instruction, inst, cfg) { + /* Skip DF instructions that operate in Align1 mode */ + if (is_align1_df(inst)) + continue; + + /* Check if this is a double-precision instruction */ + bool is_double = type_sz(inst->dst.type) == 8; + for (int arg = 0; !is_double && arg < 3; arg++) { + is_double = inst->src[arg].file != BAD_FILE && + type_sz(inst->src[arg].type) == 8; + } + + if (!is_double) + continue; + + /* Skip the lowering for specific regioning scenarios that we can + * support natively. + */ + bool skip_lowering = true; + + /* XY and ZW writemasks operate in 32-bit, which means that they don't + * have a native 64-bit representation and they should always be split. + */ + if (inst->dst.writemask == WRITEMASK_XY || + inst->dst.writemask == WRITEMASK_ZW) { + skip_lowering = false; + } else { + for (unsigned i = 0; i < 3; i++) { + if (inst->src[i].file == BAD_FILE || type_sz(inst->src[i].type) < 8) + continue; + skip_lowering = skip_lowering && is_supported_64bit_region(inst, i); + } + } + + if (skip_lowering) + continue; + + /* Generate scalar instructions for each enabled channel */ + for (unsigned chan = 0; chan < 4; chan++) { + unsigned chan_mask = 1 << chan; + if (!(inst->dst.writemask & chan_mask)) + continue; + + vec4_instruction *scalar_inst = new(mem_ctx) vec4_instruction(*inst); + + for (unsigned i = 0; i < 3; i++) { + unsigned swz = BRW_GET_SWZ(inst->src[i].swizzle, chan); + scalar_inst->src[i].swizzle = BRW_SWIZZLE4(swz, swz, swz, swz); + } + + scalar_inst->dst.writemask = chan_mask; + + if (inst->predicate != BRW_PREDICATE_NONE) { + scalar_inst->predicate = + scalarize_predicate(inst->predicate, chan_mask); + } + + inst->insert_before(block, scalar_inst); + } + + inst->remove(block); + progress = true; + } + + if (progress) + invalidate_live_intervals(); + + return progress; +} + +bool +vec4_visitor::lower_64bit_mad_to_mul_add() +{ + bool progress = false; + + foreach_block_and_inst_safe(block, vec4_instruction, inst, cfg) { + if (inst->opcode != BRW_OPCODE_MAD) + continue; + + if (type_sz(inst->dst.type) != 8) + continue; + + dst_reg mul_dst = dst_reg(this, glsl_type::dvec4_type); + + /* Use the copy constructor so we copy all relevant instruction fields + * from the original mad into the add and mul instructions + */ + vec4_instruction *mul = new(mem_ctx) vec4_instruction(*inst); + mul->opcode = BRW_OPCODE_MUL; + mul->dst = mul_dst; + mul->src[0] = inst->src[1]; + mul->src[1] = inst->src[2]; + mul->src[2].file = BAD_FILE; + + vec4_instruction *add = new(mem_ctx) vec4_instruction(*inst); + add->opcode = BRW_OPCODE_ADD; + add->src[0] = src_reg(mul_dst); + add->src[1] = inst->src[0]; + add->src[2].file = BAD_FILE; + + inst->insert_before(block, mul); + inst->insert_before(block, add); + inst->remove(block); + + progress = true; + } + + if (progress) + invalidate_live_intervals(); + + return progress; +} + +/* The align16 hardware can only do 32-bit swizzle channels, so we need to + * translate the logical 64-bit swizzle channels that we use in the Vec4 IR + * to 32-bit swizzle channels in hardware registers. + * + * @inst and @arg identify the original vec4 IR source operand we need to + * translate the swizzle for and @hw_reg is the hardware register where we + * will write the hardware swizzle to use. + * + * This pass assumes that Align16/DF instructions have been fully scalarized + * previously so there is just one 64-bit swizzle channel to deal with for any + * given Vec4 IR source. + */ +void +vec4_visitor::apply_logical_swizzle(struct brw_reg *hw_reg, + vec4_instruction *inst, int arg) +{ + src_reg reg = inst->src[arg]; + + if (reg.file == BAD_FILE || reg.file == BRW_IMMEDIATE_VALUE) + return; + + /* If this is not a 64-bit operand or this is a scalar instruction we don't + * need to do anything about the swizzles. + */ + if(type_sz(reg.type) < 8 || is_align1_df(inst)) { + hw_reg->swizzle = reg.swizzle; + return; + } + + /* Take the 64-bit logical swizzle channel and translate it to 32-bit */ + assert(brw_is_single_value_swizzle(reg.swizzle) || + is_supported_64bit_region(inst, arg)); + + /* Apply the region <2, 2, 1> for GRF or <0, 2, 1> for uniforms, as align16 + * HW can only do 32-bit swizzle channels. + */ + hw_reg->width = BRW_WIDTH_2; + + if (is_supported_64bit_region(inst, arg) && + !is_gen7_supported_64bit_swizzle(inst, arg)) { + /* Supported 64-bit swizzles are those such that their first two + * components, when expanded to 32-bit swizzles, match the semantics + * of the original 64-bit swizzle with 2-wide row regioning. + */ + unsigned swizzle0 = BRW_GET_SWZ(reg.swizzle, 0); + unsigned swizzle1 = BRW_GET_SWZ(reg.swizzle, 1); + hw_reg->swizzle = BRW_SWIZZLE4(swizzle0 * 2, swizzle0 * 2 + 1, + swizzle1 * 2, swizzle1 * 2 + 1); + } else { + /* If we got here then we have one of the following: + * + * 1. An unsupported swizzle, which should be single-value thanks to the + * scalarization pass. + * + * 2. A gen7 supported swizzle. These can be single-value or double-value + * swizzles. If the latter, they are never cross-dvec2 channels. For + * these we always need to activate the gen7 vstride=0 exploit. + */ + unsigned swizzle0 = BRW_GET_SWZ(reg.swizzle, 0); + unsigned swizzle1 = BRW_GET_SWZ(reg.swizzle, 1); + assert((swizzle0 < 2) == (swizzle1 < 2)); + + /* To gain access to Z/W components we need to select the second half + * of the register and then use a X/Y swizzle to select Z/W respectively. + */ + if (swizzle0 >= 2) { + *hw_reg = suboffset(*hw_reg, 2); + swizzle0 -= 2; + swizzle1 -= 2; + } + + /* All gen7-specific supported swizzles require the vstride=0 exploit */ + if (devinfo->gen == 7 && is_gen7_supported_64bit_swizzle(inst, arg)) + hw_reg->vstride = BRW_VERTICAL_STRIDE_0; + + /* Any 64-bit source with an offset at 16B is intended to address the + * second half of a register and needs a vertical stride of 0 so we: + * + * 1. Don't violate register region restrictions. + * 2. Activate the gen7 instruction decompresion bug exploit when + * execsize > 4 + */ + if (hw_reg->subnr % REG_SIZE == 16) { + assert(devinfo->gen == 7); + hw_reg->vstride = BRW_VERTICAL_STRIDE_0; + } + + hw_reg->swizzle = BRW_SWIZZLE4(swizzle0 * 2, swizzle0 * 2 + 1, + swizzle1 * 2, swizzle1 * 2 + 1); + } +} + bool vec4_visitor::run() { @@ -1955,7 +2654,7 @@ if (unlikely(INTEL_DEBUG & DEBUG_OPTIMIZER) && this_progress) { \ char filename[64]; \ snprintf(filename, 64, "%s-%s-%02d-%02d-" #pass, \ - stage_abbrev, nir->info.name, iteration, pass_num); \ + stage_abbrev, nir->info->name, iteration, pass_num); \ \ backend_shader::dump_instructions(filename); \ } \ @@ -1968,7 +2667,7 @@ if (unlikely(INTEL_DEBUG & DEBUG_OPTIMIZER)) { char filename[64]; snprintf(filename, 64, "%s-%s-00-00-start", - stage_abbrev, nir->info.name); + stage_abbrev, nir->info->name); backend_shader::dump_instructions(filename); } @@ -2009,9 +2708,23 @@ OPT(dead_code_eliminate); } + if (OPT(lower_simd_width)) { + OPT(opt_copy_propagation); + OPT(dead_code_eliminate); + } + if (failed) return false; + OPT(lower_64bit_mad_to_mul_add); + + /* Run this before payload setup because tesselation shaders + * rely on it to prevent cross dvec2 regioning on DF attributes + * that are setup so that XY are on the second half of register and + * ZW are in the first half of the next. + */ + OPT(scalarize_df); + setup_payload(); if (unlikely(INTEL_DEBUG & DEBUG_SPILL_VEC4)) { @@ -2025,6 +2738,12 @@ continue; spill_reg(i); } + + /* We want to run this after spilling because 64-bit (un)spills need to + * emit code to shuffle 64-bit data for the 32-bit scratch read/write + * messages that can produce unsupported 64-bit swizzle regions. + */ + OPT(scalarize_df); } bool allocated_without_spills = reg_allocate(); @@ -2040,6 +2759,12 @@ if (failed) return false; } + + /* We want to run this after spilling because 64-bit (un)spills need to + * emit code to shuffle 64-bit data for the 32-bit scratch read/write + * messages that can produce unsupported 64-bit swizzle regions. + */ + OPT(scalarize_df); } opt_schedule_instructions(); @@ -2079,36 +2804,41 @@ { const bool is_scalar = compiler->scalar_stage[MESA_SHADER_VERTEX]; nir_shader *shader = nir_shader_clone(mem_ctx, src_shader); - shader = brw_nir_apply_sampler_key(shader, compiler->devinfo, &key->tex, - is_scalar); - brw_nir_lower_vs_inputs(shader, compiler->devinfo, is_scalar, + shader = brw_nir_apply_sampler_key(shader, compiler, &key->tex, is_scalar); + brw_nir_lower_vs_inputs(shader, is_scalar, use_legacy_snorm_formula, key->gl_attrib_wa_flags); brw_nir_lower_vue_outputs(shader, is_scalar); - shader = brw_postprocess_nir(shader, compiler->devinfo, is_scalar); + shader = brw_postprocess_nir(shader, compiler, is_scalar); const unsigned *assembly = NULL; - unsigned nr_attributes = _mesa_bitcount_64(prog_data->inputs_read); + prog_data->base.clip_distance_mask = + ((1 << shader->info->clip_distance_array_size) - 1); + prog_data->base.cull_distance_mask = + ((1 << shader->info->cull_distance_array_size) - 1) << + shader->info->clip_distance_array_size; + + unsigned nr_attribute_slots = _mesa_bitcount_64(prog_data->inputs_read); /* gl_VertexID and gl_InstanceID are system values, but arrive via an * incoming vertex attribute. So, add an extra slot. */ - if (shader->info.system_values_read & + if (shader->info->system_values_read & (BITFIELD64_BIT(SYSTEM_VALUE_BASE_VERTEX) | BITFIELD64_BIT(SYSTEM_VALUE_BASE_INSTANCE) | BITFIELD64_BIT(SYSTEM_VALUE_VERTEX_ID_ZERO_BASE) | BITFIELD64_BIT(SYSTEM_VALUE_INSTANCE_ID))) { - nr_attributes++; + nr_attribute_slots++; } /* gl_DrawID has its very own vec4 */ - if (shader->info.system_values_read & BITFIELD64_BIT(SYSTEM_VALUE_DRAW_ID)) { - nr_attributes++; + if (shader->info->system_values_read & + BITFIELD64_BIT(SYSTEM_VALUE_DRAW_ID)) { + nr_attribute_slots++; } - unsigned nr_attribute_slots = - nr_attributes + - _mesa_bitcount_64(shader->info.double_inputs_read); + unsigned nr_attributes = nr_attribute_slots - + DIV_ROUND_UP(_mesa_bitcount_64(shader->info->double_inputs_read), 2); /* The 3DSTATE_VS documentation lists the lower bound on "Vertex URB Entry * Read Length" as 1 in vec4 mode, and 0 in SIMD8 mode. Empirically, in @@ -2136,6 +2866,11 @@ else prog_data->base.urb_entry_size = DIV_ROUND_UP(vue_entries, 4); + if (INTEL_DEBUG & DEBUG_VS) { + fprintf(stderr, "VS Output "); + brw_print_vue_map(stderr, &prog_data->base.vue_map); + } + if (is_scalar) { prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8; @@ -2157,8 +2892,9 @@ if (INTEL_DEBUG & DEBUG_VS) { const char *debug_name = ralloc_asprintf(mem_ctx, "%s vertex shader %s", - shader->info.label ? shader->info.label : "unnamed", - shader->info.name); + shader->info->label ? shader->info->label : + "unnamed", + shader->info->name); g.enable_debug(debug_name); } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -129,7 +129,9 @@ a->shadow_compare == b->shadow_compare && a->dst.writemask == b->dst.writemask && a->force_writemask_all == b->force_writemask_all && - a->regs_written == b->regs_written && + a->size_written == b->size_written && + a->exec_size == b->exec_size && + a->group == b->group && operands_match(a, b); } @@ -178,12 +180,19 @@ bool no_existing_temp = entry->tmp.file == BAD_FILE; if (no_existing_temp && !entry->generator->dst.is_null()) { entry->tmp = retype(src_reg(VGRF, alloc.allocate( - entry->generator->regs_written), + regs_written(entry->generator)), NULL), inst->dst.type); - for (unsigned i = 0; i < entry->generator->regs_written; ++i) { - vec4_instruction *copy = MOV(offset(entry->generator->dst, i), - offset(entry->tmp, i)); + const unsigned width = entry->generator->exec_size; + unsigned component_size = width * type_sz(entry->tmp.type); + unsigned num_copy_movs = + DIV_ROUND_UP(entry->generator->size_written, component_size); + for (unsigned i = 0; i < num_copy_movs; ++i) { + vec4_instruction *copy = + MOV(offset(entry->generator->dst, width, i), + offset(entry->tmp, width, i)); + copy->exec_size = width; + copy->group = entry->generator->group; copy->force_writemask_all = entry->generator->force_writemask_all; entry->generator->insert_after(block, copy); @@ -195,10 +204,16 @@ /* dest <- temp */ if (!inst->dst.is_null()) { assert(inst->dst.type == entry->tmp.type); - - for (unsigned i = 0; i < inst->regs_written; ++i) { - vec4_instruction *copy = MOV(offset(inst->dst, i), - offset(entry->tmp, i)); + const unsigned width = inst->exec_size; + unsigned component_size = width * type_sz(inst->dst.type); + unsigned num_copy_movs = + DIV_ROUND_UP(inst->size_written, component_size); + for (unsigned i = 0; i < num_copy_movs; ++i) { + vec4_instruction *copy = + MOV(offset(inst->dst, width, i), + offset(entry->tmp, width, i)); + copy->exec_size = inst->exec_size; + copy->group = inst->group; copy->force_writemask_all = inst->force_writemask_all; inst->insert_before(block, copy); } @@ -246,7 +261,7 @@ * more -- a sure sign they'll fail operands_match(). */ if (src->file == VGRF) { - if (var_range_end(var_from_reg(alloc, dst_reg(*src)), 4) < ip) { + if (var_range_end(var_from_reg(alloc, dst_reg(*src)), 8) < ip) { entry->remove(); ralloc_free(entry); break; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_dead_code_eliminate.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_dead_code_eliminate.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_dead_code_eliminate.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_dead_code_eliminate.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -44,8 +44,8 @@ calculate_live_intervals(); int num_vars = live_intervals->num_vars; - BITSET_WORD *live = ralloc_array(NULL, BITSET_WORD, BITSET_WORDS(num_vars)); - BITSET_WORD *flag_live = ralloc_array(NULL, BITSET_WORD, 1); + BITSET_WORD *live = rzalloc_array(NULL, BITSET_WORD, BITSET_WORDS(num_vars)); + BITSET_WORD *flag_live = rzalloc_array(NULL, BITSET_WORD, 1); foreach_block_reverse_safe(block, cfg) { memcpy(live, live_intervals->block_data[block->num].liveout, @@ -57,12 +57,12 @@ if ((inst->dst.file == VGRF && !inst->has_side_effects()) || (inst->dst.is_null() && inst->writes_flag())){ bool result_live[4] = { false }; - if (inst->dst.file == VGRF) { - for (unsigned i = 0; i < inst->regs_written; i++) { - for (int c = 0; c < 4; c++) - result_live[c] |= BITSET_TEST( - live, var_from_reg(alloc, offset(inst->dst, i), c)); + for (unsigned i = 0; i < DIV_ROUND_UP(inst->size_written, 16); i++) { + for (int c = 0; c < 4; c++) { + const unsigned v = var_from_reg(alloc, inst->dst, c, i); + result_live[c] |= BITSET_TEST(live, v); + } } } else { for (unsigned c = 0; c < 4; c++) @@ -109,12 +109,13 @@ } } - if (inst->dst.file == VGRF && !inst->predicate) { - for (unsigned i = 0; i < inst->regs_written; i++) { + if (inst->dst.file == VGRF && !inst->predicate && + !inst->is_align1_partial_write()) { + for (unsigned i = 0; i < DIV_ROUND_UP(inst->size_written, 16); i++) { for (int c = 0; c < 4; c++) { if (inst->dst.writemask & (1 << c)) { - BITSET_CLEAR(live, var_from_reg(alloc, - offset(inst->dst, i), c)); + const unsigned v = var_from_reg(alloc, inst->dst, c, i); + BITSET_CLEAR(live, v); } } } @@ -132,10 +133,10 @@ for (int i = 0; i < 3; i++) { if (inst->src[i].file == VGRF) { - for (unsigned j = 0; j < inst->regs_read(i); j++) { + for (unsigned j = 0; j < DIV_ROUND_UP(inst->size_read(i), 16); j++) { for (int c = 0; c < 4; c++) { - BITSET_SET(live, var_from_reg(alloc, - offset(inst->src[i], j), c)); + const unsigned v = var_from_reg(alloc, inst->src[i], c, j); + BITSET_SET(live, v); } } } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -106,13 +106,14 @@ static void generate_tex(struct brw_codegen *p, struct brw_vue_prog_data *prog_data, + gl_shader_stage stage, vec4_instruction *inst, struct brw_reg dst, struct brw_reg src, struct brw_reg surface_index, struct brw_reg sampler_index) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; int msg_type = -1; if (devinfo->gen >= 5) { @@ -238,8 +239,16 @@ */ dw2 |= GEN9_SAMPLER_SIMD_MODE_EXTENSION_SIMD4X2; - if (dw2) + /* The VS, DS, and FS stages have the g0.2 payload delivered as 0, + * so header0.2 is 0 when g0 is copied. The HS and GS stages do + * not, so we must set to to 0 to avoid setting undesirable bits + * in the message header. + */ + if (dw2 || + stage == MESA_SHADER_TESS_CTRL || + stage == MESA_SHADER_GEOMETRY) { brw_MOV(p, get_element_ud(header, 2), brw_imm_ud(dw2)); + } brw_adjust_sampler_state_pointer(p, header, sampler_index); brw_pop_insn_state(p); @@ -298,8 +307,12 @@ if (brw_regs_equal(&surface_reg, &sampler_reg)) { brw_MUL(p, addr, sampler_reg, brw_imm_uw(0x101)); } else { - brw_SHL(p, addr, sampler_reg, brw_imm_ud(8)); - brw_OR(p, addr, addr, surface_reg); + if (sampler_reg.file == BRW_IMMEDIATE_VALUE) { + brw_OR(p, addr, surface_reg, brw_imm_ud(sampler_reg.ud << 8)); + } else { + brw_SHL(p, addr, sampler_reg, brw_imm_ud(8)); + brw_OR(p, addr, addr, surface_reg); + } } if (base_binding_table_index) brw_ADD(p, addr, addr, brw_imm_ud(base_binding_table_index)); @@ -728,7 +741,7 @@ static void generate_tcs_get_instance_id(struct brw_codegen *p, struct brw_reg dst) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; const bool ivb = devinfo->is_ivybridge || devinfo->is_baytrail; /* "Instance Count" comes as part of the payload in r0.2 bits 23:17. @@ -759,7 +772,7 @@ vec4_instruction *inst, struct brw_reg urb_header) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; brw_inst *send = brw_next_insn(p, BRW_OPCODE_SEND); brw_set_dest(p, send, brw_null_reg()); @@ -929,7 +942,7 @@ struct brw_reg dst, struct brw_reg header) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; assert(header.file == BRW_GENERAL_REGISTER_FILE); assert(header.type == BRW_REGISTER_TYPE_UD); @@ -954,7 +967,7 @@ struct brw_reg vertex, struct brw_reg is_unpaired) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; assert(vertex.file == BRW_IMMEDIATE_VALUE); assert(vertex.type == BRW_REGISTER_TYPE_UD); @@ -1034,7 +1047,7 @@ struct brw_vue_prog_data *prog_data, struct brw_reg dst) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; const bool ivb = devinfo->is_ivybridge || devinfo->is_baytrail; struct brw_reg m0_2 = get_element_ud(dst, 2); unsigned instances = ((struct brw_tcs_prog_data *) prog_data)->instances; @@ -1123,7 +1136,7 @@ struct brw_reg dst, struct brw_reg index) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; struct brw_reg header = brw_vec8_grf(0, 0); gen6_resolve_implied_move(p, &header, inst->base_mrf); @@ -1140,6 +1153,11 @@ else msg_type = BRW_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ; + const unsigned target_cache = + devinfo->gen >= 7 ? GEN7_SFID_DATAPORT_DATA_CACHE : + devinfo->gen >= 6 ? GEN6_SFID_DATAPORT_RENDER_CACHE : + BRW_DATAPORT_READ_TARGET_RENDER_CACHE; + /* Each of the 8 channel enables is considered for whether each * dword is written. */ @@ -1151,8 +1169,7 @@ brw_set_dp_read_message(p, send, brw_scratch_surface_idx(p), BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD, - msg_type, - BRW_DATAPORT_READ_TARGET_RENDER_CACHE, + msg_type, target_cache, 2, /* mlen */ true, /* header_present */ 1 /* rlen */); @@ -1165,7 +1182,11 @@ struct brw_reg src, struct brw_reg index) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; + const unsigned target_cache = + (devinfo->gen >= 7 ? GEN7_SFID_DATAPORT_DATA_CACHE : + devinfo->gen >= 6 ? GEN6_SFID_DATAPORT_RENDER_CACHE : + BRW_DATAPORT_READ_TARGET_RENDER_CACHE); struct brw_reg header = brw_vec8_grf(0, 0); bool write_commit; @@ -1225,6 +1246,7 @@ brw_scratch_surface_idx(p), BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD, msg_type, + target_cache, 3, /* mlen */ true, /* header present */ false, /* not a render target write */ @@ -1241,7 +1263,10 @@ struct brw_reg index, struct brw_reg offset) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; + const unsigned target_cache = + (devinfo->gen >= 6 ? GEN6_SFID_DATAPORT_SAMPLER_CACHE : + BRW_DATAPORT_READ_TARGET_DATA_CACHE); assert(index.file == BRW_IMMEDIATE_VALUE && index.type == BRW_REGISTER_TYPE_UD); uint32_t surf_index = index.ud; @@ -1287,7 +1312,7 @@ surf_index, BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD, msg_type, - BRW_DATAPORT_READ_TARGET_DATA_CACHE, + target_cache, 2, /* mlen */ true, /* header_present */ 1 /* rlen */); @@ -1469,12 +1494,13 @@ struct brw_vue_prog_data *prog_data, const struct cfg_t *cfg) { - const struct brw_device_info *devinfo = p->devinfo; + const struct gen_device_info *devinfo = p->devinfo; const char *stage_abbrev = _mesa_shader_stage_to_abbrev(nir->stage); bool debug_flag = INTEL_DEBUG & intel_debug_flag_for_shader_stage(nir->stage); struct annotation_info annotation; memset(&annotation, 0, sizeof(annotation)); + int spill_count = 0, fill_count = 0; int loop_count = 0; foreach_block_and_inst (block, vec4_instruction, inst, cfg) { @@ -1494,39 +1520,21 @@ brw_set_default_saturate(p, inst->saturate); brw_set_default_mask_control(p, inst->force_writemask_all); brw_set_default_acc_write_control(p, inst->writes_accumulator); + brw_set_default_exec_size(p, cvt(inst->exec_size) - 1); + + assert(inst->group % inst->exec_size == 0); + assert(inst->group % 8 == 0 || + inst->dst.type == BRW_REGISTER_TYPE_DF || + inst->src[0].type == BRW_REGISTER_TYPE_DF || + inst->src[1].type == BRW_REGISTER_TYPE_DF || + inst->src[2].type == BRW_REGISTER_TYPE_DF); + if (!inst->force_writemask_all) + brw_set_default_group(p, inst->group); assert(inst->base_mrf + inst->mlen <= BRW_MAX_MRF(devinfo->gen)); assert(inst->mlen <= BRW_MAX_MSG_LENGTH); unsigned pre_emit_nr_insn = p->nr_insn; - bool fix_exec_size = false; - - if (dst.width == BRW_WIDTH_4) { - /* This happens in attribute fixups for "dual instanced" geometry - * shaders, since they use attributes that are vec4's. Since the exec - * width is only 4, it's essential that the caller set - * force_writemask_all in order to make sure the instruction is executed - * regardless of which channels are enabled. - */ - assert(inst->force_writemask_all); - - /* Fix up any <8;8,1> or <0;4,1> source registers to <4;4,1> to satisfy - * the following register region restrictions (from Graphics BSpec: - * 3D-Media-GPGPU Engine > EU Overview > Registers and Register Regions - * > Register Region Restrictions) - * - * 1. ExecSize must be greater than or equal to Width. - * - * 2. If ExecSize = Width and HorzStride != 0, VertStride must be set - * to Width * HorzStride." - */ - for (int i = 0; i < 3; i++) { - if (src[i].file == BRW_GENERAL_REGISTER_FILE) - src[i] = stride(src[i], 4, 4, 1); - } - brw_set_default_exec_size(p, BRW_EXECUTE_4); - fix_exec_size = true; - } switch (inst->opcode) { case VEC4_OPCODE_UNPACK_UNIFORM: @@ -1637,6 +1645,9 @@ /* FBL only supports UD type for dst. */ brw_FBL(p, retype(dst, BRW_REGISTER_TYPE_UD), src[0]); break; + case BRW_OPCODE_LZD: + brw_LZD(p, dst, src[0]); + break; case BRW_OPCODE_CBIT: assert(devinfo->gen >= 7); /* CBIT only supports UD type for dst. */ @@ -1746,7 +1757,8 @@ case SHADER_OPCODE_TG4: case SHADER_OPCODE_TG4_OFFSET: case SHADER_OPCODE_SAMPLEINFO: - generate_tex(p, prog_data, inst, dst, src[0], src[1], src[2]); + generate_tex(p, prog_data, nir->stage, + inst, dst, src[0], src[1], src[2]); break; case VS_OPCODE_URB_WRITE: @@ -1755,10 +1767,12 @@ case SHADER_OPCODE_GEN4_SCRATCH_READ: generate_scratch_read(p, inst, dst, src[0]); + fill_count++; break; case SHADER_OPCODE_GEN4_SCRATCH_WRITE: generate_scratch_write(p, inst, dst, src[0], src[1]); + spill_count++; break; case VS_OPCODE_PULL_CONSTANT_LOAD: @@ -1881,9 +1895,14 @@ brw_memory_fence(p, dst); break; - case SHADER_OPCODE_FIND_LIVE_CHANNEL: - brw_find_live_channel(p, dst); + case SHADER_OPCODE_FIND_LIVE_CHANNEL: { + const struct brw_reg mask = + brw_stage_has_packed_dispatch(devinfo, nir->stage, + &prog_data->base) ? brw_imm_ud(~0u) : + brw_dmask_reg(); + brw_find_live_channel(p, dst, mask); break; + } case SHADER_OPCODE_BROADCAST: assert(inst->force_writemask_all); @@ -1910,6 +1929,93 @@ break; } + case VEC4_OPCODE_FROM_DOUBLE: { + assert(type_sz(src[0].type) == 8); + assert(type_sz(dst.type) == 4); + + brw_set_default_access_mode(p, BRW_ALIGN_1); + + dst.hstride = BRW_HORIZONTAL_STRIDE_2; + dst.width = BRW_WIDTH_4; + brw_MOV(p, dst, src[0]); + + struct brw_reg dst_as_src = dst; + dst.hstride = BRW_HORIZONTAL_STRIDE_1; + dst.width = BRW_WIDTH_8; + brw_MOV(p, dst, dst_as_src); + + brw_set_default_access_mode(p, BRW_ALIGN_16); + break; + } + + case VEC4_OPCODE_TO_DOUBLE: { + assert(type_sz(src[0].type) == 4); + assert(type_sz(dst.type) == 8); + + brw_set_default_access_mode(p, BRW_ALIGN_1); + + struct brw_reg tmp = retype(dst, src[0].type); + tmp.hstride = BRW_HORIZONTAL_STRIDE_2; + tmp.width = BRW_WIDTH_4; + src[0].vstride = BRW_VERTICAL_STRIDE_4; + src[0].hstride = BRW_HORIZONTAL_STRIDE_1; + src[0].width = BRW_WIDTH_4; + brw_MOV(p, tmp, src[0]); + + tmp.vstride = BRW_VERTICAL_STRIDE_8; + tmp.hstride = BRW_HORIZONTAL_STRIDE_2; + tmp.width = BRW_WIDTH_4; + brw_MOV(p, dst, tmp); + + brw_set_default_access_mode(p, BRW_ALIGN_16); + break; + } + + case VEC4_OPCODE_PICK_LOW_32BIT: + case VEC4_OPCODE_PICK_HIGH_32BIT: { + /* Stores the low/high 32-bit of each 64-bit element in src[0] into + * dst using ALIGN1 mode and a <8,4,2>:UD region on the source. + */ + assert(type_sz(src[0].type) == 8); + assert(type_sz(dst.type) == 4); + + brw_set_default_access_mode(p, BRW_ALIGN_1); + + dst = retype(dst, BRW_REGISTER_TYPE_UD); + dst.hstride = BRW_HORIZONTAL_STRIDE_1; + + src[0] = retype(src[0], BRW_REGISTER_TYPE_UD); + if (inst->opcode == VEC4_OPCODE_PICK_HIGH_32BIT) + src[0] = suboffset(src[0], 1); + src[0] = spread(src[0], 2); + brw_MOV(p, dst, src[0]); + + brw_set_default_access_mode(p, BRW_ALIGN_16); + break; + } + + case VEC4_OPCODE_SET_LOW_32BIT: + case VEC4_OPCODE_SET_HIGH_32BIT: { + /* Reads consecutive 32-bit elements from src[0] and writes + * them to the low/high 32-bit of each 64-bit element in dst. + */ + assert(type_sz(src[0].type) == 4); + assert(type_sz(dst.type) == 8); + + brw_set_default_access_mode(p, BRW_ALIGN_1); + + dst = retype(dst, BRW_REGISTER_TYPE_UD); + if (inst->opcode == VEC4_OPCODE_SET_HIGH_32BIT) + dst = suboffset(dst, 1); + dst.hstride = BRW_HORIZONTAL_STRIDE_2; + + src[0] = retype(src[0], BRW_REGISTER_TYPE_UD); + brw_MOV(p, dst, src[0]); + + brw_set_default_access_mode(p, BRW_ALIGN_16); + break; + } + case VEC4_OPCODE_PACK_BYTES: { /* Is effectively: * @@ -2014,13 +2120,17 @@ generate_mov_indirect(p, inst, dst, src[0], src[1], src[2]); break; + case BRW_OPCODE_DIM: + assert(devinfo->is_haswell); + assert(src[0].type == BRW_REGISTER_TYPE_DF); + assert(dst.type == BRW_REGISTER_TYPE_DF); + brw_DIM(p, dst, retype(src[0], BRW_REGISTER_TYPE_F)); + break; + default: unreachable("Unsupported opcode"); } - if (fix_exec_size) - brw_set_default_exec_size(p, BRW_EXECUTE_8); - if (inst->opcode == VEC4_OPCODE_PACK_BYTES) { /* Handled dependency hints in the generator. */ @@ -2039,7 +2149,7 @@ } } - brw_set_uip_jip(p); + brw_set_uip_jip(p, 0); annotation_finalize(&annotation, p->next_insn_offset); #ifndef NDEBUG @@ -2055,13 +2165,13 @@ if (unlikely(debug_flag)) { fprintf(stderr, "Native code for %s %s shader %s:\n", - nir->info.label ? nir->info.label : "unnamed", - _mesa_shader_stage_to_string(nir->stage), nir->info.name); + nir->info->label ? nir->info->label : "unnamed", + _mesa_shader_stage_to_string(nir->stage), nir->info->name); - fprintf(stderr, "%s vec4 shader: %d instructions. %d loops. %u cycles." - "Compacted %d to %d bytes (%.0f%%)\n", - stage_abbrev, - before_size / 16, loop_count, cfg->cycle_count, before_size, after_size, + fprintf(stderr, "%s vec4 shader: %d instructions. %d loops. %u cycles. %d:%d " + "spills:fills. Compacted %d to %d bytes (%.0f%%)\n", + stage_abbrev, before_size / 16, loop_count, cfg->cycle_count, + spill_count, fill_count, before_size, after_size, 100.0f * (before_size - after_size) / before_size); dump_assembly(p->store, annotation.ann_count, annotation.ann, @@ -2072,10 +2182,11 @@ compiler->shader_debug_log(log_data, "%s vec4 shader: %d inst, %d loops, %u cycles, " - "compacted %d to %d bytes.", + "%d:%d spills:fills, compacted %d to %d bytes.", stage_abbrev, before_size / 16, - loop_count, cfg->cycle_count, - before_size, after_size); + loop_count, cfg->cycle_count, spill_count, + fill_count, before_size, after_size); + } extern "C" const unsigned * diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_gs_nir.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_gs_nir.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_gs_nir.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_gs_nir.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -64,21 +64,40 @@ * be constant. We should handle indirects someday. */ nir_const_value *vertex = nir_src_as_const_value(instr->src[0]); - nir_const_value *offset = nir_src_as_const_value(instr->src[1]); + nir_const_value *offset_reg = nir_src_as_const_value(instr->src[1]); - /* Make up a type...we have no way of knowing... */ - const glsl_type *const type = glsl_type::ivec(instr->num_components); + if (nir_dest_bit_size(instr->dest) == 64) { + src = src_reg(ATTR, BRW_VARYING_SLOT_COUNT * vertex->u32[0] + + instr->const_index[0] + offset_reg->u32[0], + glsl_type::dvec4_type); - src = src_reg(ATTR, BRW_VARYING_SLOT_COUNT * vertex->u32[0] + - instr->const_index[0] + offset->u32[0], - type); - /* gl_PointSize is passed in the .w component of the VUE header */ - if (instr->const_index[0] == VARYING_SLOT_PSIZ) - src.swizzle = BRW_SWIZZLE_WWWW; - - dest = get_nir_dest(instr->dest, src.type); - dest.writemask = brw_writemask_for_size(instr->num_components); - emit(MOV(dest, src)); + dst_reg tmp = dst_reg(this, glsl_type::dvec4_type); + shuffle_64bit_data(tmp, src, false); + + src = src_reg(tmp); + src.swizzle = BRW_SWZ_COMP_INPUT(nir_intrinsic_component(instr) / 2); + + /* Write to dst reg taking into account original writemask */ + dest = get_nir_dest(instr->dest, BRW_REGISTER_TYPE_DF); + dest.writemask = brw_writemask_for_size(instr->num_components); + emit(MOV(dest, src)); + } else { + /* Make up a type...we have no way of knowing... */ + const glsl_type *const type = glsl_type::ivec(instr->num_components); + + src = src_reg(ATTR, BRW_VARYING_SLOT_COUNT * vertex->u32[0] + + instr->const_index[0] + offset_reg->u32[0], + type); + src.swizzle = BRW_SWZ_COMP_INPUT(nir_intrinsic_component(instr)); + + /* gl_PointSize is passed in the .w component of the VUE header */ + if (instr->const_index[0] == VARYING_SLOT_PSIZ) + src.swizzle = BRW_SWIZZLE_WWWW; + + dest = get_nir_dest(instr->dest, src.type); + dest.writemask = brw_writemask_for_size(instr->num_components); + emit(MOV(dest, src)); + } break; } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -84,7 +84,7 @@ * so the total number of input slots that will be delivered to the GS (and * thus the stride of the input arrays) is urb_read_length * 2. */ - const unsigned num_input_vertices = nir->info.gs.vertices_in; + const unsigned num_input_vertices = nir->info->gs.vertices_in; assert(num_input_vertices <= MAX_GS_INPUT_VERTICES); unsigned input_array_stride = prog_data->urb_read_length * 2; @@ -337,7 +337,7 @@ emit(ADD(dst_reg(prev_count), this->vertex_count, brw_imm_ud(0xffffffffu))); unsigned log2_bits_per_vertex = - _mesa_fls(c->control_data_bits_per_vertex); + util_last_bit(c->control_data_bits_per_vertex); emit(SHR(dst_reg(dword_index), prev_count, brw_imm_ud(6 - log2_bits_per_vertex))); } @@ -454,7 +454,7 @@ * be recorded by transform feedback, we can simply discard all geometry * bound to these streams when transform feedback is disabled. */ - if (stream_id > 0 && !nir->info.has_transform_feedback_varyings) + if (stream_id > 0 && !nir->info->has_transform_feedback_varyings) return; /* If we're outputting 32 control data bits or less, then we can wait @@ -590,7 +590,7 @@ const struct brw_gs_prog_key *key, struct brw_gs_prog_data *prog_data, const nir_shader *src_shader, - struct gl_shader_program *shader_prog, + struct gl_program *prog, int shader_time_index, unsigned *final_assembly_size, char **error_str) @@ -609,32 +609,33 @@ * * For SSO pipelines, we use a fixed VUE map layout based on variable * locations, so we can rely on rendezvous-by-location making this work. - * - * However, we need to ignore VARYING_SLOT_PRIMITIVE_ID, as it's not - * written by previous stages and shows up via payload magic. */ - GLbitfield64 inputs_read = - shader->info.inputs_read & ~VARYING_BIT_PRIMITIVE_ID; + GLbitfield64 inputs_read = shader->info->inputs_read; brw_compute_vue_map(compiler->devinfo, &c.input_vue_map, inputs_read, - shader->info.separate_shader); + shader->info->separate_shader); - shader = brw_nir_apply_sampler_key(shader, compiler->devinfo, &key->tex, - is_scalar); + shader = brw_nir_apply_sampler_key(shader, compiler, &key->tex, is_scalar); brw_nir_lower_vue_inputs(shader, is_scalar, &c.input_vue_map); brw_nir_lower_vue_outputs(shader, is_scalar); - shader = brw_postprocess_nir(shader, compiler->devinfo, is_scalar); + shader = brw_postprocess_nir(shader, compiler, is_scalar); + + prog_data->base.clip_distance_mask = + ((1 << shader->info->clip_distance_array_size) - 1); + prog_data->base.cull_distance_mask = + ((1 << shader->info->cull_distance_array_size) - 1) << + shader->info->clip_distance_array_size; prog_data->include_primitive_id = - (shader->info.inputs_read & VARYING_BIT_PRIMITIVE_ID) != 0; + (shader->info->system_values_read & (1 << SYSTEM_VALUE_PRIMITIVE_ID)) != 0; - prog_data->invocations = shader->info.gs.invocations; + prog_data->invocations = shader->info->gs.invocations; if (compiler->devinfo->gen >= 8) prog_data->static_vertex_count = nir_gs_count_vertices(shader); if (compiler->devinfo->gen >= 7) { - if (shader->info.gs.output_primitive == GL_POINTS) { + if (shader->info->gs.output_primitive == GL_POINTS) { /* When the output type is points, the geometry shader may output data * to multiple streams, and EndPrimitive() has no effect. So we * configure the hardware to interpret the control data as stream ID. @@ -642,7 +643,7 @@ prog_data->control_data_format = GEN7_GS_CONTROL_DATA_FORMAT_GSCTL_SID; /* We only have to emit control bits if we are using streams */ - if (shader_prog && shader_prog->Geom.UsesStreams) + if (prog && prog->info.gs.uses_streams) c.control_data_bits_per_vertex = 2; else c.control_data_bits_per_vertex = 0; @@ -659,20 +660,14 @@ * EndPrimitive(). */ c.control_data_bits_per_vertex = - shader->info.gs.uses_end_primitive ? 1 : 0; + shader->info->gs.uses_end_primitive ? 1 : 0; } } else { /* There are no control data bits in gen6. */ c.control_data_bits_per_vertex = 0; - - /* If it is using transform feedback, enable it */ - if (shader->info.has_transform_feedback_varyings) - prog_data->gen6_xfb_enabled = true; - else - prog_data->gen6_xfb_enabled = false; } c.control_data_header_size_bits = - shader->info.gs.vertices_out * c.control_data_bits_per_vertex; + shader->info->gs.vertices_out * c.control_data_bits_per_vertex; /* 1 HWORD = 32 bytes = 256 bits */ prog_data->control_data_header_size_hwords = @@ -767,7 +762,7 @@ unsigned output_size_bytes; if (compiler->devinfo->gen >= 7) { output_size_bytes = - prog_data->output_vertex_size_hwords * 32 * shader->info.gs.vertices_out; + prog_data->output_vertex_size_hwords * 32 * shader->info->gs.vertices_out; output_size_bytes += 32 * prog_data->control_data_header_size_hwords; } else { output_size_bytes = prog_data->output_vertex_size_hwords * 32; @@ -779,7 +774,13 @@ if (compiler->devinfo->gen >= 8) output_size_bytes += 32; - assert(output_size_bytes >= 1); + /* Shaders can technically set max_vertices = 0, at which point we + * may have a URB size of 0 bytes. Nothing good can come from that, + * so enforce a minimum size. + */ + if (output_size_bytes == 0) + output_size_bytes = 1; + unsigned max_output_size_bytes = GEN7_MAX_GS_URB_ENTRY_SIZE_BYTES; if (compiler->devinfo->gen == 6) max_output_size_bytes = GEN6_MAX_GS_URB_ENTRY_SIZE_BYTES; @@ -796,9 +797,9 @@ prog_data->base.urb_entry_size = ALIGN(output_size_bytes, 128) / 128; prog_data->output_topology = - get_hw_prim_for_gl_prim(shader->info.gs.output_primitive); + get_hw_prim_for_gl_prim(shader->info->gs.output_primitive); - prog_data->vertices_in = shader->info.gs.vertices_in; + prog_data->vertices_in = shader->info->gs.vertices_in; /* GS inputs are read from the VUE 256 bits (2 vec4's) at a time, so we * need to program a URB read length of ceiling(num_slots / 2). @@ -827,9 +828,9 @@ false, MESA_SHADER_GEOMETRY); if (unlikely(INTEL_DEBUG & DEBUG_GS)) { const char *label = - shader->info.label ? shader->info.label : "unnamed"; + shader->info->label ? shader->info->label : "unnamed"; char *name = ralloc_asprintf(mem_ctx, "%s geometry shader %s", - label, shader->info.name); + label, shader->info->name); g.enable_debug(name); } g.generate_code(v.cfg, 8); @@ -848,10 +849,36 @@ vec4_gs_visitor v(compiler, log_data, &c, prog_data, shader, mem_ctx, true /* no_spills */, shader_time_index); + + /* Backup 'nr_params' and 'param' as they can be modified by the + * the DUAL_OBJECT visitor. If it fails, we will run the fallback + * (DUAL_INSTANCED or SINGLE mode) and we need to restore original + * values. + */ + const unsigned param_count = prog_data->base.base.nr_params; + gl_constant_value **param = ralloc_array(NULL, gl_constant_value*, + param_count); + memcpy(param, prog_data->base.base.param, + sizeof(gl_constant_value*) * param_count); + if (v.run()) { + /* Success! Backup is not needed */ + ralloc_free(param); return brw_vec4_generate_assembly(compiler, log_data, mem_ctx, shader, &prog_data->base, v.cfg, final_assembly_size); + } else { + /* These variables could be modified by the execution of the GS + * visitor if it packed the uniforms in the push constant buffer. + * As it failed, we need restore them so we can start again with + * DUAL_INSTANCED or SINGLE mode. + * + * FIXME: Could more variables be modified by this execution? + */ + memcpy(prog_data->base.base.param, param, + sizeof(gl_constant_value*) * param_count); + prog_data->base.base.nr_params = param_count; + ralloc_free(param); } } } @@ -892,7 +919,7 @@ shader, mem_ctx, false /* no_spills */, shader_time_index); else - gs = new gen6_gs_visitor(compiler, log_data, &c, prog_data, shader_prog, + gs = new gen6_gs_visitor(compiler, log_data, &c, prog_data, prog, shader, mem_ctx, false /* no_spills */, shader_time_index); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4.h 2017-06-01 10:37:10.000000000 +0000 @@ -79,6 +79,11 @@ return dst_reg(brw_null_reg()); } + dst_reg dst_null_df() + { + return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_DF)); + } + dst_reg dst_null_d() { return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); @@ -113,8 +118,9 @@ /* Regs for vertex results. Generated at ir_variable visiting time * for the ir->location's used. */ - dst_reg output_reg[BRW_VARYING_SLOT_COUNT]; - const char *output_reg_annotation[BRW_VARYING_SLOT_COUNT]; + dst_reg output_reg[VARYING_SLOT_TESS_MAX][4]; + unsigned output_num_components[VARYING_SLOT_TESS_MAX][4]; + const char *output_reg_annotation[VARYING_SLOT_TESS_MAX]; int uniforms; src_reg shader_start_time; @@ -155,6 +161,13 @@ void opt_schedule_instructions(); void convert_to_hw_regs(); + bool is_supported_64bit_region(vec4_instruction *inst, unsigned arg); + bool lower_simd_width(); + bool scalarize_df(); + bool lower_64bit_mad_to_mul_add(); + void apply_logical_swizzle(struct brw_reg *hw_reg, + vec4_instruction *inst, int arg); + vec4_instruction *emit(vec4_instruction *inst); vec4_instruction *emit(enum opcode opcode); @@ -213,6 +226,8 @@ EMIT3(MAD) EMIT2(ADDC) EMIT2(SUBB) + EMIT1(DIM) + #undef EMIT1 #undef EMIT2 #undef EMIT3 @@ -251,15 +266,14 @@ const glsl_type *dest_type, src_reg coordinate, int coord_components, - src_reg shadow_comparitor, + src_reg shadow_comparator, src_reg lod, src_reg lod2, src_reg sample_index, uint32_t constant_offset, src_reg offset_value, src_reg mcs, - bool is_cube_array, uint32_t surface, src_reg surface_reg, - uint32_t sampler, src_reg sampler_reg); + src_reg sampler_reg); src_reg emit_mcs_fetch(const glsl_type *coordinate_type, src_reg coordinate, src_reg surface); @@ -267,7 +281,7 @@ void emit_ndc_computation(); void emit_psiz_and_flags(dst_reg reg); - vec4_instruction *emit_generic_urb_slot(dst_reg reg, int varying); + vec4_instruction *emit_generic_urb_slot(dst_reg reg, int varying, int comp); virtual void emit_urb_slot(dst_reg reg, int varying); void emit_shader_time_begin(); @@ -308,6 +322,18 @@ bool optimize_predicate(nir_alu_instr *instr, enum brw_predicate *predicate); + void emit_conversion_from_double(dst_reg dst, src_reg src, bool saturate, + brw_reg_type single_type); + void emit_conversion_to_double(dst_reg dst, src_reg src, bool saturate, + brw_reg_type single_type); + + src_reg setup_imm_df(double v); + + vec4_instruction *shuffle_64bit_data(dst_reg dst, src_reg src, + bool for_write, + bblock_t *block = NULL, + vec4_instruction *ref = NULL); + virtual void emit_nir_code(); virtual void nir_setup_uniforms(); virtual void nir_setup_system_value_intrinsic(nir_intrinsic_instr *instr); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_live_variables.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_live_variables.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_live_variables.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_live_variables.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -76,10 +76,9 @@ /* Set use[] for this instruction */ for (unsigned int i = 0; i < 3; i++) { if (inst->src[i].file == VGRF) { - for (unsigned j = 0; j < inst->regs_read(i); j++) { + for (unsigned j = 0; j < DIV_ROUND_UP(inst->size_read(i), 16); j++) { for (int c = 0; c < 4; c++) { - const unsigned v = - var_from_reg(alloc, offset(inst->src[i], j), c); + const unsigned v = var_from_reg(alloc, inst->src[i], c, j); if (!BITSET_TEST(bd->def, v)) BITSET_SET(bd->use, v); } @@ -99,11 +98,10 @@ */ if (inst->dst.file == VGRF && (!inst->predicate || inst->opcode == BRW_OPCODE_SEL)) { - for (unsigned i = 0; i < inst->regs_written; i++) { + for (unsigned i = 0; i < DIV_ROUND_UP(inst->size_written, 16); i++) { for (int c = 0; c < 4; c++) { if (inst->dst.writemask & (1 << c)) { - const unsigned v = - var_from_reg(alloc, offset(inst->dst, i), c); + const unsigned v = var_from_reg(alloc, inst->dst, c, i); if (!BITSET_TEST(bd->use, v)) BITSET_SET(bd->def, v); } @@ -188,7 +186,7 @@ { mem_ctx = ralloc_context(NULL); - num_vars = alloc.total_size * 4; + num_vars = alloc.total_size * 8; block_data = rzalloc_array(mem_ctx, struct block_data, cfg->num_blocks); bitset_words = BITSET_WORDS(num_vars); @@ -238,14 +236,14 @@ if (this->live_intervals) return; - int *start = ralloc_array(mem_ctx, int, this->alloc.total_size * 4); - int *end = ralloc_array(mem_ctx, int, this->alloc.total_size * 4); + int *start = ralloc_array(mem_ctx, int, this->alloc.total_size * 8); + int *end = ralloc_array(mem_ctx, int, this->alloc.total_size * 8); ralloc_free(this->virtual_grf_start); ralloc_free(this->virtual_grf_end); this->virtual_grf_start = start; this->virtual_grf_end = end; - for (unsigned i = 0; i < this->alloc.total_size * 4; i++) { + for (unsigned i = 0; i < this->alloc.total_size * 8; i++) { start[i] = MAX_INSTRUCTION; end[i] = -1; } @@ -257,10 +255,9 @@ foreach_block_and_inst(block, vec4_instruction, inst, cfg) { for (unsigned int i = 0; i < 3; i++) { if (inst->src[i].file == VGRF) { - for (unsigned j = 0; j < inst->regs_read(i); j++) { + for (unsigned j = 0; j < DIV_ROUND_UP(inst->size_read(i), 16); j++) { for (int c = 0; c < 4; c++) { - const unsigned v = - var_from_reg(alloc, offset(inst->src[i], j), c); + const unsigned v = var_from_reg(alloc, inst->src[i], c, j); start[v] = MIN2(start[v], ip); end[v] = ip; } @@ -269,11 +266,10 @@ } if (inst->dst.file == VGRF) { - for (unsigned i = 0; i < inst->regs_written; i++) { + for (unsigned i = 0; i < DIV_ROUND_UP(inst->size_written, 16); i++) { for (int c = 0; c < 4; c++) { if (inst->dst.writemask & (1 << c)) { - const unsigned v = - var_from_reg(alloc, offset(inst->dst, i), c); + const unsigned v = var_from_reg(alloc, inst->dst, c, i); start[v] = MIN2(start[v], ip); end[v] = ip; } @@ -340,8 +336,8 @@ bool vec4_visitor::virtual_grf_interferes(int a, int b) { - return !((var_range_end(4 * alloc.offsets[a], 4 * alloc.sizes[a]) <= - var_range_start(4 * alloc.offsets[b], 4 * alloc.sizes[b])) || - (var_range_end(4 * alloc.offsets[b], 4 * alloc.sizes[b]) <= - var_range_start(4 * alloc.offsets[a], 4 * alloc.sizes[a]))); + return !((var_range_end(8 * alloc.offsets[a], 8 * alloc.sizes[a]) <= + var_range_start(8 * alloc.offsets[b], 8 * alloc.sizes[b])) || + (var_range_end(8 * alloc.offsets[b], 8 * alloc.sizes[b]) <= + var_range_start(8 * alloc.offsets[a], 8 * alloc.sizes[a]))); } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_live_variables.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_live_variables.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_live_variables.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_live_variables.h 2017-06-01 10:37:10.000000000 +0000 @@ -78,23 +78,35 @@ void *mem_ctx; }; +/* Returns the variable index for the k-th dword of the c-th component of + * register reg. + */ inline unsigned var_from_reg(const simple_allocator &alloc, const src_reg ®, - unsigned c = 0) + unsigned c = 0, unsigned k = 0) { - assert(reg.file == VGRF && reg.nr < alloc.count && - reg.reg_offset < alloc.sizes[reg.nr] && c < 4); - return (4 * (alloc.offsets[reg.nr] + reg.reg_offset) + - BRW_GET_SWZ(reg.swizzle, c)); + assert(reg.file == VGRF && reg.nr < alloc.count && c < 4); + const unsigned csize = DIV_ROUND_UP(type_sz(reg.type), 4); + unsigned result = + 8 * (alloc.offsets[reg.nr] + reg.offset / REG_SIZE) + + (BRW_GET_SWZ(reg.swizzle, c) + k / csize * 4) * csize + k % csize; + /* Do not exceed the limit for this register */ + assert(result < 8 * (alloc.offsets[reg.nr] + alloc.sizes[reg.nr])); + return result; } inline unsigned var_from_reg(const simple_allocator &alloc, const dst_reg ®, - unsigned c = 0) + unsigned c = 0, unsigned k = 0) { - assert(reg.file == VGRF && reg.nr < alloc.count && - reg.reg_offset < alloc.sizes[reg.nr] && c < 4); - return 4 * (alloc.offsets[reg.nr] + reg.reg_offset) + c; + assert(reg.file == VGRF && reg.nr < alloc.count && c < 4); + const unsigned csize = DIV_ROUND_UP(type_sz(reg.type), 4); + unsigned result = + 8 * (alloc.offsets[reg.nr] + reg.offset / REG_SIZE) + + (c + k / csize * 4) * csize + k % csize; + /* Do not exceed the limit for this register */ + assert(result < 8 * (alloc.offsets[reg.nr] + alloc.sizes[reg.nr])); + return result; } } /* namespace brw */ diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -140,8 +140,11 @@ foreach_list_typed(nir_register, reg, node, &impl->registers) { unsigned array_elems = reg->num_array_elems == 0 ? 1 : reg->num_array_elems; + const unsigned num_regs = array_elems * DIV_ROUND_UP(reg->bit_size, 32); + nir_locals[reg->index] = dst_reg(VGRF, alloc.allocate(num_regs)); - nir_locals[reg->index] = dst_reg(VGRF, alloc.allocate(array_elems)); + if (reg->bit_size == 64) + nir_locals[reg->index].type = BRW_REGISTER_TYPE_DF; } nir_ssa_values = ralloc_array(mem_ctx, dst_reg, impl->ssa_alloc); @@ -256,7 +259,9 @@ dst_reg reg; reg = v->nir_locals[nir_reg->index]; - reg = offset(reg, base_offset); + if (nir_reg->bit_size == 64) + reg.type = BRW_REGISTER_TYPE_DF; + reg = offset(reg, 8, base_offset); if (indirect) { reg.reladdr = new(v->mem_ctx) src_reg(v->get_nir_src(*indirect, @@ -270,7 +275,10 @@ vec4_visitor::get_nir_dest(const nir_dest &dest) { if (dest.is_ssa) { - dst_reg dst = dst_reg(VGRF, alloc.allocate(1)); + dst_reg dst = + dst_reg(VGRF, alloc.allocate(DIV_ROUND_UP(dest.ssa.bit_size, 32))); + if (dest.ssa.bit_size == 64) + dst.type = BRW_REGISTER_TYPE_DF; nir_ssa_values[dest.ssa.index] = dst; return dst; } else { @@ -302,8 +310,8 @@ reg = nir_ssa_values[src.ssa->index]; } else { - reg = dst_reg_for_nir_reg(this, src.reg.reg, src.reg.base_offset, - src.reg.indirect); + reg = dst_reg_for_nir_reg(this, src.reg.reg, src.reg.base_offset, + src.reg.indirect); } reg = retype(reg, type); @@ -324,7 +332,7 @@ vec4_visitor::get_nir_src(const nir_src &src, unsigned num_components) { /* if type is not specified, default to signed int */ - return get_nir_src(src, nir_type_int, num_components); + return get_nir_src(src, nir_type_int32, num_components); } src_reg @@ -348,8 +356,15 @@ void vec4_visitor::nir_emit_load_const(nir_load_const_instr *instr) { - dst_reg reg = dst_reg(VGRF, alloc.allocate(1)); - reg.type = BRW_REGISTER_TYPE_D; + dst_reg reg; + + if (instr->def.bit_size == 64) { + reg = dst_reg(VGRF, alloc.allocate(2)); + reg.type = BRW_REGISTER_TYPE_DF; + } else { + reg = dst_reg(VGRF, alloc.allocate(1)); + reg.type = BRW_REGISTER_TYPE_D; + } unsigned remaining = brw_writemask_for_size(instr->def.num_components); @@ -364,13 +379,20 @@ continue; for (unsigned j = i; j < instr->def.num_components; j++) { - if (instr->value.u32[i] == instr->value.u32[j]) { + if ((instr->def.bit_size == 32 && + instr->value.u32[i] == instr->value.u32[j]) || + (instr->def.bit_size == 64 && + instr->value.f64[i] == instr->value.f64[j])) { writemask |= 1 << j; } } reg.writemask = writemask; - emit(MOV(reg, brw_imm_d(instr->value.i32[i]))); + if (instr->def.bit_size == 64) { + emit(MOV(reg, setup_imm_df(instr->value.f64[i]))); + } else { + emit(MOV(reg, brw_imm_d(instr->value.i32[i]))); + } remaining &= ~writemask; } @@ -395,13 +417,24 @@ /* We set EmitNoIndirectInput for VS */ assert(const_offset); + dest = get_nir_dest(instr->dest); + dest.writemask = brw_writemask_for_size(instr->num_components); + src = src_reg(ATTR, instr->const_index[0] + const_offset->u32[0], glsl_type::uvec4_type); + src = retype(src, dest.type); - dest = get_nir_dest(instr->dest, src.type); - dest.writemask = brw_writemask_for_size(instr->num_components); - - emit(MOV(dest, src)); + bool is_64bit = nir_dest_bit_size(instr->dest) == 64; + if (is_64bit) { + dst_reg tmp = dst_reg(this, glsl_type::dvec4_type); + src.swizzle = BRW_SWIZZLE_XYZW; + shuffle_64bit_data(tmp, src, false); + emit(MOV(dest, src_reg(tmp))); + } else { + /* Swizzle source based on component layout qualifier */ + src.swizzle = BRW_SWZ_COMP_INPUT(nir_intrinsic_component(instr)); + emit(MOV(dest, src)); + } break; } @@ -411,10 +444,35 @@ int varying = instr->const_index[0] + const_offset->u32[0]; - src = get_nir_src(instr->src[0], BRW_REGISTER_TYPE_F, - instr->num_components); + bool is_64bit = nir_src_bit_size(instr->src[0]) == 64; + if (is_64bit) { + src_reg data; + src = get_nir_src(instr->src[0], BRW_REGISTER_TYPE_DF, + instr->num_components); + data = src_reg(this, glsl_type::dvec4_type); + shuffle_64bit_data(dst_reg(data), src, true); + src = retype(data, BRW_REGISTER_TYPE_F); + } else { + src = get_nir_src(instr->src[0], BRW_REGISTER_TYPE_F, + instr->num_components); + } + + unsigned c = nir_intrinsic_component(instr); + output_reg[varying][c] = dst_reg(src); + output_num_components[varying][c] = instr->num_components; + + unsigned num_components = instr->num_components; + if (is_64bit) + num_components *= 2; + + output_reg[varying][c] = dst_reg(src); + output_num_components[varying][c] = MIN2(4, num_components); - output_reg[varying] = dst_reg(src); + if (is_64bit && num_components > 4) { + assert(num_components <= 8); + output_reg[varying + 1][c] = byte_offset(dst_reg(src), REG_SIZE); + output_num_components[varying + 1][c] = num_components - 4; + } break; } @@ -464,7 +522,7 @@ brw_mark_surface_used(&prog_data->base, prog_data->base.binding_table.ssbo_start + - nir->info.num_ssbos - 1); + nir->info->num_ssbos - 1); } /* Offset */ @@ -477,7 +535,7 @@ } /* Value */ - src_reg val_reg = get_nir_src(instr->src[0], 4); + src_reg val_reg = get_nir_src(instr->src[0], BRW_REGISTER_TYPE_F, 4); /* Writemask */ unsigned write_mask = instr->const_index[0]; @@ -523,24 +581,47 @@ const vec4_builder bld = vec4_builder(this).at_end() .annotate(current_annotation, base_ir); - int swizzle[4] = { 0, 0, 0, 0}; + unsigned type_slots = nir_src_bit_size(instr->src[0]) / 32; + if (type_slots == 2) { + dst_reg tmp = dst_reg(this, glsl_type::dvec4_type); + shuffle_64bit_data(tmp, retype(val_reg, tmp.type), true); + val_reg = src_reg(retype(tmp, BRW_REGISTER_TYPE_F)); + } + + uint8_t swizzle[4] = { 0, 0, 0, 0}; int num_channels = 0; unsigned skipped_channels = 0; int num_components = instr->num_components; for (int i = 0; i < num_components; i++) { + /* Read components Z/W of a dvec from the appropriate place. We will + * also have to adjust the swizzle (we do that with the '% 4' below) + */ + if (i == 2 && type_slots == 2) + val_reg = byte_offset(val_reg, REG_SIZE); + /* Check if this channel needs to be written. If so, record the * channel we need to take the data from in the swizzle array */ int component_mask = 1 << i; int write_test = write_mask & component_mask; - if (write_test) - swizzle[num_channels++] = i; + if (write_test) { + /* If we are writing doubles we have to write 2 channels worth of + * of data (64 bits) for each double component. + */ + swizzle[num_channels++] = (i * type_slots) % 4; + if (type_slots == 2) + swizzle[num_channels++] = (i * type_slots + 1) % 4; + } /* If we don't have to write this channel it means we have a gap in the * vector, so write the channels we accumulated until now, if any. Do - * the same if this was the last component in the vector. + * the same if this was the last component in the vector, if we have + * enough channels for a full vec4 write or if we have processed + * components XY of a dvec (since components ZW are not in the same + * SIMD register) */ - if (!write_test || i == num_components - 1) { + if (!write_test || i == num_components - 1 || num_channels == 4 || + (i == 1 && type_slots == 2)) { if (num_channels > 0) { /* We have channels to write, so update the offset we need to * write at to skip the channels we skipped, if any. @@ -574,8 +655,9 @@ num_channels = 0; } - /* We did not write the current channel, so increase skipped count */ - skipped_channels++; + /* If we didn't write the channel, increase skipped count */ + if (!write_test) + skipped_channels += type_slots; } } @@ -606,7 +688,7 @@ */ brw_mark_surface_used(&prog_data->base, prog_data->base.binding_table.ssbo_start + - nir->info.num_ssbos - 1); + nir->info->num_ssbos - 1); } src_reg offset_reg; @@ -621,14 +703,39 @@ const vec4_builder bld = vec4_builder(this).at_end() .annotate(current_annotation, base_ir); - src_reg read_result = emit_untyped_read(bld, surf_index, offset_reg, - 1 /* dims */, 4 /* size*/, - BRW_PREDICATE_NONE); + src_reg read_result; dst_reg dest = get_nir_dest(instr->dest); + if (type_sz(dest.type) < 8) { + read_result = emit_untyped_read(bld, surf_index, offset_reg, + 1 /* dims */, 4 /* size*/, + BRW_PREDICATE_NONE); + } else { + src_reg shuffled = src_reg(this, glsl_type::dvec4_type); + + src_reg temp; + temp = emit_untyped_read(bld, surf_index, offset_reg, + 1 /* dims */, 4 /* size*/, + BRW_PREDICATE_NONE); + emit(MOV(dst_reg(retype(shuffled, temp.type)), temp)); + + if (offset_reg.file == IMM) + offset_reg.ud += 16; + else + emit(ADD(dst_reg(offset_reg), offset_reg, brw_imm_ud(16))); + + temp = emit_untyped_read(bld, surf_index, offset_reg, + 1 /* dims */, 4 /* size*/, + BRW_PREDICATE_NONE); + emit(MOV(dst_reg(retype(byte_offset(shuffled, REG_SIZE), temp.type)), + temp)); + + read_result = src_reg(this, glsl_type::dvec4_type); + shuffle_64bit_data(dst_reg(read_result), shuffled, false); + } + read_result.type = dest.type; read_result.swizzle = brw_swizzle_for_size(instr->num_components); emit(MOV(dest, read_result)); - break; } @@ -697,7 +804,8 @@ * The swizzle also works in the indirect case as the generator adds * the swizzle to the offset for us. */ - unsigned shift = (nir_intrinsic_base(instr) % 16) / 4; + const int type_size = type_sz(src.type); + unsigned shift = (nir_intrinsic_base(instr) % 16) / type_size; assert(shift + instr->num_components <= 4); nir_const_value *const_offset = nir_src_as_const_value(instr->src[0]); @@ -705,14 +813,20 @@ /* Offsets are in bytes but they should always be multiples of 4 */ assert(const_offset->u32[0] % 4 == 0); - unsigned offset = const_offset->u32[0] + shift * 4; - src.reg_offset = offset / 16; - shift = (offset % 16) / 4; + src.swizzle = brw_swizzle_for_size(instr->num_components); + dest.writemask = brw_writemask_for_size(instr->num_components); + unsigned offset = const_offset->u32[0] + shift * type_size; + src.offset = ROUND_DOWN_TO(offset, 16); + shift = (offset % 16) / type_size; + assert(shift + instr->num_components <= 4); src.swizzle += BRW_SWIZZLE4(shift, shift, shift, shift); emit(MOV(dest, src)); } else { - src.swizzle += BRW_SWIZZLE4(shift, shift, shift, shift); + /* Uniform arrays are vec4 aligned, because of std140 alignment + * rules. + */ + assert(shift == 0); src_reg indirect = get_nir_src(instr->src[0], BRW_REGISTER_TYPE_UD, 1); @@ -730,33 +844,32 @@ case nir_intrinsic_atomic_counter_dec: { unsigned surf_index = prog_data->base.binding_table.abo_start + (unsigned) instr->const_index[0]; - src_reg offset = get_nir_src(instr->src[0], nir_type_int, - instr->num_components); - const src_reg surface = brw_imm_ud(surf_index); const vec4_builder bld = vec4_builder(this).at_end().annotate(current_annotation, base_ir); + + /* Get some metadata from the image intrinsic. */ + const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; + + /* Get the arguments of the atomic intrinsic. */ + src_reg offset = get_nir_src(instr->src[0], nir_type_int32, + instr->num_components); + const src_reg surface = brw_imm_ud(surf_index); + const src_reg src0 = (info->num_srcs >= 2 + ? get_nir_src(instr->src[1]) : src_reg()); + const src_reg src1 = (info->num_srcs >= 3 + ? get_nir_src(instr->src[2]) : src_reg()); + src_reg tmp; dest = get_nir_dest(instr->dest); - switch (instr->intrinsic) { - case nir_intrinsic_atomic_counter_inc: - tmp = emit_untyped_atomic(bld, surface, offset, - src_reg(), src_reg(), - 1, 1, - BRW_AOP_INC); - break; - case nir_intrinsic_atomic_counter_dec: + if (instr->intrinsic == nir_intrinsic_atomic_counter_read) { + tmp = emit_untyped_read(bld, surface, offset, 1, 1); + } else { tmp = emit_untyped_atomic(bld, surface, offset, - src_reg(), src_reg(), + src0, src1, 1, 1, - BRW_AOP_PREDEC); - break; - case nir_intrinsic_atomic_counter_read: - tmp = emit_untyped_read(bld, surface, offset, 1, 1); - break; - default: - unreachable("Unreachable"); + get_atomic_counter_op(instr->intrinsic)); } bld.MOV(retype(dest, tmp.type), tmp); @@ -784,7 +897,7 @@ * from any live channel. */ surf_index = src_reg(this, glsl_type::uint_type); - emit(ADD(dst_reg(surf_index), get_nir_src(instr->src[0], nir_type_int, + emit(ADD(dst_reg(surf_index), get_nir_src(instr->src[0], nir_type_int32, instr->num_components), brw_imm_ud(prog_data->base.binding_table.ubo_start))); surf_index = emit_uniformize(surf_index); @@ -794,34 +907,53 @@ */ brw_mark_surface_used(&prog_data->base, prog_data->base.binding_table.ubo_start + - nir->info.num_ubos - 1); + nir->info->num_ubos - 1); } - src_reg offset; + src_reg offset_reg; nir_const_value *const_offset = nir_src_as_const_value(instr->src[1]); if (const_offset) { - offset = brw_imm_ud(const_offset->u32[0] & ~15); + offset_reg = brw_imm_ud(const_offset->u32[0] & ~15); } else { - offset = get_nir_src(instr->src[1], nir_type_int, 1); + offset_reg = get_nir_src(instr->src[1], nir_type_uint32, 1); } - src_reg packed_consts = src_reg(this, glsl_type::vec4_type); - packed_consts.type = dest.type; + src_reg packed_consts; + if (nir_dest_bit_size(instr->dest) == 32) { + packed_consts = src_reg(this, glsl_type::vec4_type); + emit_pull_constant_load_reg(dst_reg(packed_consts), + surf_index, + offset_reg, + NULL, NULL /* before_block/inst */); + } else { + src_reg temp = src_reg(this, glsl_type::dvec4_type); + src_reg temp_float = retype(temp, BRW_REGISTER_TYPE_F); + + emit_pull_constant_load_reg(dst_reg(temp_float), + surf_index, offset_reg, NULL, NULL); + if (offset_reg.file == IMM) + offset_reg.ud += 16; + else + emit(ADD(dst_reg(offset_reg), offset_reg, brw_imm_ud(16u))); + emit_pull_constant_load_reg(dst_reg(byte_offset(temp_float, REG_SIZE)), + surf_index, offset_reg, NULL, NULL); - emit_pull_constant_load_reg(dst_reg(packed_consts), - surf_index, - offset, - NULL, NULL /* before_block/inst */); + packed_consts = src_reg(this, glsl_type::dvec4_type); + shuffle_64bit_data(dst_reg(packed_consts), temp, false); + } packed_consts.swizzle = brw_swizzle_for_size(instr->num_components); if (const_offset) { - packed_consts.swizzle += BRW_SWIZZLE4(const_offset->u32[0] % 16 / 4, - const_offset->u32[0] % 16 / 4, - const_offset->u32[0] % 16 / 4, - const_offset->u32[0] % 16 / 4); + unsigned type_size = type_sz(dest.type); + packed_consts.swizzle += + BRW_SWIZZLE4(const_offset->u32[0] % 16 / type_size, + const_offset->u32[0] % 16 / type_size, + const_offset->u32[0] % 16 / type_size, + const_offset->u32[0] % 16 / type_size); } - emit(MOV(dest, packed_consts)); + emit(MOV(dest, retype(packed_consts, dest.type))); + break; } @@ -830,7 +962,7 @@ vec4_builder(this).at_end().annotate(current_annotation, base_ir); const dst_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_UD, 2); bld.emit(SHADER_OPCODE_MEMORY_FENCE, tmp) - ->regs_written = 2; + ->size_written = 2 * REG_SIZE; break; } @@ -873,7 +1005,7 @@ */ brw_mark_surface_used(&prog_data->base, prog_data->base.binding_table.ssbo_start + - nir->info.num_ssbos - 1); + nir->info->num_ssbos - 1); } src_reg offset = get_nir_src(instr->src[1], 1); @@ -978,8 +1110,10 @@ src_reg op[2]; assert(nir_op_infos[cmp_instr->op].num_inputs == 2); for (unsigned i = 0; i < 2; i++) { - op[i] = get_nir_src(cmp_instr->src[i].src, - nir_op_infos[cmp_instr->op].input_types[i], 4); + nir_alu_type type = nir_op_infos[cmp_instr->op].input_types[i]; + unsigned bit_size = nir_src_bit_size(cmp_instr->src[i].src); + type = (nir_alu_type) (((unsigned) type) | bit_size); + op[i] = get_nir_src(cmp_instr->src[i].src, type, 4); unsigned base_swizzle = brw_swizzle_for_nir_swizzle(cmp_instr->src[i].swizzle); op[i].swizzle = brw_compose_swizzle(size_swizzle, base_swizzle); @@ -993,19 +1127,158 @@ return true; } +static void +emit_find_msb_using_lzd(const vec4_builder &bld, + const dst_reg &dst, + const src_reg &src, + bool is_signed) +{ + vec4_instruction *inst; + src_reg temp = src; + + if (is_signed) { + /* LZD of an absolute value source almost always does the right + * thing. There are two problem values: + * + * * 0x80000000. Since abs(0x80000000) == 0x80000000, LZD returns + * 0. However, findMSB(int(0x80000000)) == 30. + * + * * 0xffffffff. Since abs(0xffffffff) == 1, LZD returns + * 31. Section 8.8 (Integer Functions) of the GLSL 4.50 spec says: + * + * For a value of zero or negative one, -1 will be returned. + * + * * Negative powers of two. LZD(abs(-(1<src[0].negate = true; +} + +void +vec4_visitor::emit_conversion_from_double(dst_reg dst, src_reg src, + bool saturate, + brw_reg_type single_type) +{ + /* BDW PRM vol 15 - workarounds: + * DF->f format conversion for Align16 has wrong emask calculation when + * source is immediate. + */ + if (devinfo->gen == 8 && single_type == BRW_REGISTER_TYPE_F && + src.file == BRW_IMMEDIATE_VALUE) { + vec4_instruction *inst = emit(MOV(dst, brw_imm_f(src.df))); + inst->saturate = saturate; + return; + } + + dst_reg temp = dst_reg(this, glsl_type::dvec4_type); + emit(MOV(temp, src)); + + dst_reg temp2 = dst_reg(this, glsl_type::dvec4_type); + temp2 = retype(temp2, single_type); + emit(VEC4_OPCODE_FROM_DOUBLE, temp2, src_reg(temp)) + ->size_written = 2 * REG_SIZE; + + vec4_instruction *inst = emit(MOV(dst, src_reg(temp2))); + inst->saturate = saturate; +} + +void +vec4_visitor::emit_conversion_to_double(dst_reg dst, src_reg src, + bool saturate, + brw_reg_type single_type) +{ + dst_reg tmp_dst = dst_reg(src_reg(this, glsl_type::dvec4_type)); + src_reg tmp_src = retype(src_reg(this, glsl_type::vec4_type), single_type); + emit(MOV(dst_reg(tmp_src), retype(src, single_type))); + emit(VEC4_OPCODE_TO_DOUBLE, tmp_dst, tmp_src); + vec4_instruction *inst = emit(MOV(dst, src_reg(tmp_dst))); + inst->saturate = saturate; +} + +src_reg +vec4_visitor::setup_imm_df(double v) +{ + assert(devinfo->gen >= 7); + + if (devinfo->gen >= 8) + return brw_imm_df(v); + + /* gen7.5 does not support DF immediates straighforward but the DIM + * instruction allows to set the 64-bit immediate value. + */ + if (devinfo->is_haswell) { + dst_reg dst = retype(dst_reg(VGRF, alloc.allocate(2)), BRW_REGISTER_TYPE_DF); + emit(DIM(dst, brw_imm_df(v)))->force_writemask_all = true; + return swizzle(src_reg(retype(dst, BRW_REGISTER_TYPE_DF)), BRW_SWIZZLE_XXXX); + } + + /* gen7 does not support DF immediates */ + union { + double d; + struct { + uint32_t i1; + uint32_t i2; + }; + } di; + + di.d = v; + + /* Write the low 32-bit of the constant to the X:UD channel and the + * high 32-bit to the Y:UD channel to build the constant in a VGRF. + * We have to do this twice (offset 0 and offset 1), since a DF VGRF takes + * two SIMD8 registers in SIMD4x2 execution. Finally, return a swizzle + * XXXX so any access to the VGRF only reads the constant data in these + * channels. + */ + const dst_reg tmp = + retype(dst_reg(VGRF, alloc.allocate(2)), BRW_REGISTER_TYPE_UD); + for (int n = 0; n < 2; n++) { + emit(MOV(writemask(offset(tmp, 8, n), WRITEMASK_X), brw_imm_ud(di.i1))) + ->force_writemask_all = true; + emit(MOV(writemask(offset(tmp, 8, n), WRITEMASK_Y), brw_imm_ud(di.i2))) + ->force_writemask_all = true; + } + + return swizzle(src_reg(retype(tmp, BRW_REGISTER_TYPE_DF)), BRW_SWIZZLE_XXXX); +} + void vec4_visitor::nir_emit_alu(nir_alu_instr *instr) { vec4_instruction *inst; - dst_reg dst = get_nir_dest(instr->dest.dest, - nir_op_infos[instr->op].output_type); + nir_alu_type dst_type = (nir_alu_type) (nir_op_infos[instr->op].output_type | + nir_dest_bit_size(instr->dest.dest)); + dst_reg dst = get_nir_dest(instr->dest.dest, dst_type); dst.writemask = instr->dest.write_mask; src_reg op[4]; for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) { - op[i] = get_nir_src(instr->src[i].src, - nir_op_infos[instr->op].input_types[i], 4); + nir_alu_type src_type = (nir_alu_type) + (nir_op_infos[instr->op].input_types[i] | + nir_src_bit_size(instr->src[i].src)); + op[i] = get_nir_src(instr->src[i].src, src_type, 4); op[i].swizzle = brw_swizzle_for_nir_swizzle(instr->src[i].swizzle); op[i].abs = instr->src[i].abs; op[i].negate = instr->src[i].negate; @@ -1034,9 +1307,33 @@ inst = emit(MOV(dst, op[0])); break; - case nir_op_fadd: - /* fall through */ + case nir_op_d2f: + emit_conversion_from_double(dst, op[0], instr->dest.saturate, + BRW_REGISTER_TYPE_F); + break; + + case nir_op_f2d: + emit_conversion_to_double(dst, op[0], instr->dest.saturate, + BRW_REGISTER_TYPE_F); + break; + + case nir_op_d2i: + case nir_op_d2u: + emit_conversion_from_double(dst, op[0], instr->dest.saturate, + instr->op == nir_op_d2i ? BRW_REGISTER_TYPE_D : + BRW_REGISTER_TYPE_UD); + break; + + case nir_op_i2d: + case nir_op_u2d: + emit_conversion_to_double(dst, op[0], instr->dest.saturate, + instr->op == nir_op_i2d ? BRW_REGISTER_TYPE_D : + BRW_REGISTER_TYPE_UD); + break; + case nir_op_iadd: + assert(nir_dest_bit_size(instr->dest.dest) < 64); + case nir_op_fadd: inst = emit(ADD(dst, op[0], op[1])); inst->saturate = instr->dest.saturate; break; @@ -1047,6 +1344,7 @@ break; case nir_op_imul: { + assert(nir_dest_bit_size(instr->dest.dest) < 64); if (devinfo->gen < 8) { nir_const_value *value0 = nir_src_as_const_value(instr->src[0].src); nir_const_value *value1 = nir_src_as_const_value(instr->src[1].src); @@ -1082,6 +1380,7 @@ case nir_op_imul_high: case nir_op_umul_high: { + assert(nir_dest_bit_size(instr->dest.dest) < 64); struct brw_reg acc = retype(brw_acc_reg(8), dst.type); if (devinfo->gen >= 8) @@ -1120,6 +1419,7 @@ case nir_op_idiv: case nir_op_udiv: + assert(nir_dest_bit_size(instr->dest.dest) < 64); emit_math(SHADER_OPCODE_INT_QUOTIENT, dst, op[0], op[1]); break; @@ -1129,6 +1429,7 @@ * appears that our hardware just does the right thing for signed * remainder. */ + assert(nir_dest_bit_size(instr->dest.dest) < 64); emit_math(SHADER_OPCODE_INT_REMAINDER, dst, op[0], op[1]); break; @@ -1182,6 +1483,7 @@ break; case nir_op_uadd_carry: { + assert(nir_dest_bit_size(instr->dest.dest) < 64); struct brw_reg acc = retype(brw_acc_reg(8), BRW_REGISTER_TYPE_UD); emit(ADDC(dst_null_ud(), op[0], op[1])); @@ -1190,6 +1492,7 @@ } case nir_op_usub_borrow: { + assert(nir_dest_bit_size(instr->dest.dest) < 64); struct brw_reg acc = retype(brw_acc_reg(8), BRW_REGISTER_TYPE_UD); emit(SUBB(dst_null_ud(), op[0], op[1])); @@ -1257,16 +1560,18 @@ break; } - case nir_op_fmin: case nir_op_imin: case nir_op_umin: + assert(nir_dest_bit_size(instr->dest.dest) < 64); + case nir_op_fmin: inst = emit_minmax(BRW_CONDITIONAL_L, dst, op[0], op[1]); inst->saturate = instr->dest.saturate; break; - case nir_op_fmax: case nir_op_imax: case nir_op_umax: + assert(nir_dest_bit_size(instr->dest.dest) < 64); + case nir_op_fmax: inst = emit_minmax(BRW_CONDITIONAL_GE, dst, op[0], op[1]); inst->saturate = instr->dest.saturate; break; @@ -1279,26 +1584,46 @@ case nir_op_fddy_fine: unreachable("derivatives are not valid in vertex shaders"); - case nir_op_flt: case nir_op_ilt: case nir_op_ult: - case nir_op_fge: case nir_op_ige: case nir_op_uge: - case nir_op_feq: case nir_op_ieq: - case nir_op_fne: case nir_op_ine: - emit(CMP(dst, op[0], op[1], - brw_conditional_for_nir_comparison(instr->op))); + assert(nir_dest_bit_size(instr->dest.dest) < 64); + /* Fallthrough */ + case nir_op_flt: + case nir_op_fge: + case nir_op_feq: + case nir_op_fne: { + enum brw_conditional_mod conditional_mod = + brw_conditional_for_nir_comparison(instr->op); + + if (nir_src_bit_size(instr->src[0].src) < 64) { + emit(CMP(dst, op[0], op[1], conditional_mod)); + } else { + /* Produce a 32-bit boolean result from the DF comparison by selecting + * only the low 32-bit in each DF produced. Do this in a temporary + * so we can then move from there to the result using align16 again + * to honor the original writemask. + */ + dst_reg temp = dst_reg(this, glsl_type::dvec4_type); + emit(CMP(temp, op[0], op[1], conditional_mod)); + dst_reg result = dst_reg(this, glsl_type::bvec4_type); + emit(VEC4_OPCODE_PICK_LOW_32BIT, result, src_reg(temp)); + emit(MOV(dst, src_reg(result))); + } break; + } - case nir_op_ball_fequal2: case nir_op_ball_iequal2: - case nir_op_ball_fequal3: case nir_op_ball_iequal3: - case nir_op_ball_fequal4: - case nir_op_ball_iequal4: { + case nir_op_ball_iequal4: + assert(nir_dest_bit_size(instr->dest.dest) < 64); + /* Fallthrough */ + case nir_op_ball_fequal2: + case nir_op_ball_fequal3: + case nir_op_ball_fequal4: { unsigned swiz = brw_swizzle_for_size(nir_op_infos[instr->op].input_sizes[0]); @@ -1310,12 +1635,14 @@ break; } - case nir_op_bany_fnequal2: case nir_op_bany_inequal2: - case nir_op_bany_fnequal3: case nir_op_bany_inequal3: - case nir_op_bany_fnequal4: - case nir_op_bany_inequal4: { + case nir_op_bany_inequal4: + assert(nir_dest_bit_size(instr->dest.dest) < 64); + /* Fallthrough */ + case nir_op_bany_fnequal2: + case nir_op_bany_fnequal3: + case nir_op_bany_fnequal4: { unsigned swiz = brw_swizzle_for_size(nir_op_infos[instr->op].input_sizes[0]); @@ -1329,6 +1656,7 @@ } case nir_op_inot: + assert(nir_dest_bit_size(instr->dest.dest) < 64); if (devinfo->gen >= 8) { op[0] = resolve_source_modifiers(op[0]); } @@ -1336,6 +1664,7 @@ break; case nir_op_ixor: + assert(nir_dest_bit_size(instr->dest.dest) < 64); if (devinfo->gen >= 8) { op[0] = resolve_source_modifiers(op[0]); op[1] = resolve_source_modifiers(op[1]); @@ -1344,6 +1673,7 @@ break; case nir_op_ior: + assert(nir_dest_bit_size(instr->dest.dest) < 64); if (devinfo->gen >= 8) { op[0] = resolve_source_modifiers(op[0]); op[1] = resolve_source_modifiers(op[1]); @@ -1352,6 +1682,7 @@ break; case nir_op_iand: + assert(nir_dest_bit_size(instr->dest.dest) < 64); if (devinfo->gen >= 8) { op[0] = resolve_source_modifiers(op[0]); op[1] = resolve_source_modifiers(op[1]); @@ -1368,6 +1699,24 @@ emit(CMP(dst, op[0], brw_imm_f(0.0f), BRW_CONDITIONAL_NZ)); break; + case nir_op_d2b: { + /* We use a MOV with conditional_mod to check if the provided value is + * 0.0. We want this to flush denormalized numbers to zero, so we set a + * source modifier on the source operand to trigger this, as source + * modifiers don't affect the result of the testing against 0.0. + */ + src_reg value = op[0]; + value.abs = true; + vec4_instruction *inst = emit(MOV(dst_null_df(), value)); + inst->conditional_mod = BRW_CONDITIONAL_NZ; + + src_reg one = src_reg(this, glsl_type::ivec4_type); + emit(MOV(dst_reg(one), brw_imm_d(~0))); + inst = emit(BRW_OPCODE_SEL, dst, one, brw_imm_d(0)); + inst->predicate = BRW_PREDICATE_NORMAL; + break; + } + case nir_op_i2b: emit(CMP(dst, op[0], brw_imm_d(0), BRW_CONDITIONAL_NZ)); break; @@ -1419,6 +1768,29 @@ break; } + case nir_op_pack_double_2x32_split: { + dst_reg result = dst_reg(this, glsl_type::dvec4_type); + dst_reg tmp = dst_reg(this, glsl_type::uvec4_type); + emit(MOV(tmp, retype(op[0], BRW_REGISTER_TYPE_UD))); + emit(VEC4_OPCODE_SET_LOW_32BIT, result, src_reg(tmp)); + emit(MOV(tmp, retype(op[1], BRW_REGISTER_TYPE_UD))); + emit(VEC4_OPCODE_SET_HIGH_32BIT, result, src_reg(tmp)); + emit(MOV(dst, src_reg(result))); + break; + } + + case nir_op_unpack_double_2x32_split_x: + case nir_op_unpack_double_2x32_split_y: { + enum opcode oper = (instr->op == nir_op_unpack_double_2x32_split_x) ? + VEC4_OPCODE_PICK_LOW_32BIT : VEC4_OPCODE_PICK_HIGH_32BIT; + dst_reg tmp = dst_reg(this, glsl_type::dvec4_type); + emit(MOV(tmp, op[0])); + dst_reg tmp2 = dst_reg(this, glsl_type::uvec4_type); + emit(oper, tmp2, src_reg(tmp)); + emit(MOV(dst, src_reg(tmp2))); + break; + } + case nir_op_unpack_half_2x16: /* As NIR does not guarantee that we have a correct swizzle outside the * boundaries of a vector, and the implementation of emit_unpack_half_2x16 @@ -1437,55 +1809,97 @@ break; case nir_op_unpack_unorm_4x8: + assert(nir_dest_bit_size(instr->dest.dest) < 64); emit_unpack_unorm_4x8(dst, op[0]); break; case nir_op_pack_unorm_4x8: + assert(nir_dest_bit_size(instr->dest.dest) < 64); emit_pack_unorm_4x8(dst, op[0]); break; case nir_op_unpack_snorm_4x8: + assert(nir_dest_bit_size(instr->dest.dest) < 64); emit_unpack_snorm_4x8(dst, op[0]); break; case nir_op_pack_snorm_4x8: + assert(nir_dest_bit_size(instr->dest.dest) < 64); emit_pack_snorm_4x8(dst, op[0]); break; case nir_op_bitfield_reverse: + assert(nir_dest_bit_size(instr->dest.dest) < 64); emit(BFREV(dst, op[0])); break; case nir_op_bit_count: + assert(nir_dest_bit_size(instr->dest.dest) < 64); emit(CBIT(dst, op[0])); break; case nir_op_ufind_msb: - case nir_op_ifind_msb: { - emit(FBH(retype(dst, BRW_REGISTER_TYPE_UD), op[0])); + assert(nir_dest_bit_size(instr->dest.dest) < 64); + emit_find_msb_using_lzd(vec4_builder(this).at_end(), dst, op[0], false); + break; - /* FBH counts from the MSB side, while GLSL's findMSB() wants the count - * from the LSB side. If FBH didn't return an error (0xFFFFFFFF), then - * subtract the result from 31 to convert the MSB count into an LSB count. - */ + case nir_op_ifind_msb: { + assert(nir_dest_bit_size(instr->dest.dest) < 64); + vec4_builder bld = vec4_builder(this).at_end(); src_reg src(dst); - emit(CMP(dst_null_d(), src, brw_imm_d(-1), BRW_CONDITIONAL_NZ)); - inst = emit(ADD(dst, src, brw_imm_d(31))); - inst->predicate = BRW_PREDICATE_NORMAL; - inst->src[0].negate = true; + if (devinfo->gen < 7) { + emit_find_msb_using_lzd(bld, dst, op[0], true); + } else { + emit(FBH(retype(dst, BRW_REGISTER_TYPE_UD), op[0])); + + /* FBH counts from the MSB side, while GLSL's findMSB() wants the + * count from the LSB side. If FBH didn't return an error + * (0xFFFFFFFF), then subtract the result from 31 to convert the MSB + * count into an LSB count. + */ + bld.CMP(dst_null_d(), src, brw_imm_d(-1), BRW_CONDITIONAL_NZ); + + inst = bld.ADD(dst, src, brw_imm_d(31)); + inst->predicate = BRW_PREDICATE_NORMAL; + inst->src[0].negate = true; + } break; } - case nir_op_find_lsb: - emit(FBL(dst, op[0])); + case nir_op_find_lsb: { + assert(nir_dest_bit_size(instr->dest.dest) < 64); + vec4_builder bld = vec4_builder(this).at_end(); + + if (devinfo->gen < 7) { + dst_reg temp = bld.vgrf(BRW_REGISTER_TYPE_D); + + /* (x & -x) generates a value that consists of only the LSB of x. + * For all powers of 2, findMSB(y) == findLSB(y). + */ + src_reg src = src_reg(retype(op[0], BRW_REGISTER_TYPE_D)); + src_reg negated_src = src; + + /* One must be negated, and the other must be non-negated. It + * doesn't matter which is which. + */ + negated_src.negate = true; + src.negate = false; + + bld.AND(temp, src, negated_src); + emit_find_msb_using_lzd(bld, dst, src_reg(temp), false); + } else { + bld.FBL(dst, op[0]); + } break; + } case nir_op_ubitfield_extract: case nir_op_ibitfield_extract: unreachable("should have been lowered"); case nir_op_ubfe: case nir_op_ibfe: + assert(nir_dest_bit_size(instr->dest.dest) < 64); op[0] = fix_3src_operand(op[0]); op[1] = fix_3src_operand(op[1]); op[2] = fix_3src_operand(op[2]); @@ -1494,10 +1908,12 @@ break; case nir_op_bfm: + assert(nir_dest_bit_size(instr->dest.dest) < 64); emit(BFI1(dst, op[0], op[1])); break; case nir_op_bfi: + assert(nir_dest_bit_size(instr->dest.dest) < 64); op[0] = fix_3src_operand(op[0]); op[1] = fix_3src_operand(op[1]); op[2] = fix_3src_operand(op[2]); @@ -1509,24 +1925,58 @@ unreachable("not reached: should have been lowered"); case nir_op_fsign: - /* AND(val, 0x80000000) gives the sign bit. - * - * Predicated OR ORs 1.0 (0x3f800000) with the sign bit if val is not - * zero. - */ - emit(CMP(dst_null_f(), op[0], brw_imm_f(0.0f), BRW_CONDITIONAL_NZ)); + if (type_sz(op[0].type) < 8) { + /* AND(val, 0x80000000) gives the sign bit. + * + * Predicated OR ORs 1.0 (0x3f800000) with the sign bit if val is not + * zero. + */ + emit(CMP(dst_null_f(), op[0], brw_imm_f(0.0f), BRW_CONDITIONAL_NZ)); + + op[0].type = BRW_REGISTER_TYPE_UD; + dst.type = BRW_REGISTER_TYPE_UD; + emit(AND(dst, op[0], brw_imm_ud(0x80000000u))); + + inst = emit(OR(dst, src_reg(dst), brw_imm_ud(0x3f800000u))); + inst->predicate = BRW_PREDICATE_NORMAL; + dst.type = BRW_REGISTER_TYPE_F; + + if (instr->dest.saturate) { + inst = emit(MOV(dst, src_reg(dst))); + inst->saturate = true; + } + } else { + /* For doubles we do the same but we need to consider: + * + * - We use a MOV with conditional_mod instead of a CMP so that we can + * skip loading a 0.0 immediate. We use a source modifier on the + * source of the MOV so that we flush denormalized values to 0. + * Since we want to compare against 0, this won't alter the result. + * - We need to extract the high 32-bit of each DF where the sign + * is stored. + * - We need to produce a DF result. + */ - op[0].type = BRW_REGISTER_TYPE_UD; - dst.type = BRW_REGISTER_TYPE_UD; - emit(AND(dst, op[0], brw_imm_ud(0x80000000u))); + /* Check for zero */ + src_reg value = op[0]; + value.abs = true; + inst = emit(MOV(dst_null_df(), value)); + inst->conditional_mod = BRW_CONDITIONAL_NZ; + + /* AND each high 32-bit channel with 0x80000000u */ + dst_reg tmp = dst_reg(this, glsl_type::uvec4_type); + emit(VEC4_OPCODE_PICK_HIGH_32BIT, tmp, op[0]); + emit(AND(tmp, src_reg(tmp), brw_imm_ud(0x80000000u))); - inst = emit(OR(dst, src_reg(dst), brw_imm_ud(0x3f800000u))); - inst->predicate = BRW_PREDICATE_NORMAL; - dst.type = BRW_REGISTER_TYPE_F; + /* Add 1.0 to each channel, predicated to skip the cases where the + * channel's value was 0 + */ + inst = emit(OR(tmp, src_reg(tmp), brw_imm_ud(0x3f800000u))); + inst->predicate = BRW_PREDICATE_NORMAL; - if (instr->dest.saturate) { - inst = emit(MOV(dst, src_reg(dst))); - inst->saturate = true; + /* Now convert the result from float to double */ + emit_conversion_to_double(dst, src_reg(tmp), instr->dest.saturate, + BRW_REGISTER_TYPE_F); } break; @@ -1535,6 +1985,7 @@ * -> non-negative val generates 0x00000000. * Predicated OR sets 1 if val is positive. */ + assert(nir_dest_bit_size(instr->dest.dest) < 64); emit(CMP(dst_null_d(), op[0], brw_imm_d(0), BRW_CONDITIONAL_G)); emit(ASR(dst, op[0], brw_imm_d(31))); inst = emit(OR(dst, src_reg(dst), brw_imm_d(1))); @@ -1542,24 +1993,34 @@ break; case nir_op_ishl: + assert(nir_dest_bit_size(instr->dest.dest) < 64); emit(SHL(dst, op[0], op[1])); break; case nir_op_ishr: + assert(nir_dest_bit_size(instr->dest.dest) < 64); emit(ASR(dst, op[0], op[1])); break; case nir_op_ushr: + assert(nir_dest_bit_size(instr->dest.dest) < 64); emit(SHR(dst, op[0], op[1])); break; case nir_op_ffma: - op[0] = fix_3src_operand(op[0]); - op[1] = fix_3src_operand(op[1]); - op[2] = fix_3src_operand(op[2]); + if (type_sz(dst.type) == 8) { + dst_reg mul_dst = dst_reg(this, glsl_type::dvec4_type); + emit(MUL(mul_dst, op[1], op[0])); + inst = emit(ADD(dst, src_reg(mul_dst), op[2])); + inst->saturate = instr->dest.saturate; + } else { + op[0] = fix_3src_operand(op[0]); + op[1] = fix_3src_operand(op[1]); + op[2] = fix_3src_operand(op[2]); - inst = emit(MAD(dst, op[2], op[1], op[0])); - inst->saturate = instr->dest.saturate; + inst = emit(MAD(dst, op[2], op[1], op[0])); + inst->saturate = instr->dest.saturate; + } break; case nir_op_flrp: @@ -1613,10 +2074,11 @@ inst->saturate = instr->dest.saturate; break; - case nir_op_fabs: case nir_op_iabs: - case nir_op_fneg: case nir_op_ineg: + assert(nir_dest_bit_size(instr->dest.dest) < 64); + case nir_op_fabs: + case nir_op_fneg: case nir_op_fsat: unreachable("not reached: should be lowered by lower_source mods"); @@ -1696,20 +2158,8 @@ glsl_type_for_nir_alu_type(nir_alu_type alu_type, unsigned components) { - switch (alu_type) { - case nir_type_float: - return glsl_type::vec(components); - case nir_type_int: - return glsl_type::ivec(components); - case nir_type_uint: - return glsl_type::uvec(components); - case nir_type_bool: - return glsl_type::bvec(components); - default: - return glsl_type::error_type; - } - - return glsl_type::error_type; + return glsl_type::get_instance(brw_glsl_base_type_for_nir_type(alu_type), + components, 1); } void @@ -1721,7 +2171,7 @@ src_reg sampler_reg = brw_imm_ud(sampler); src_reg coordinate; const glsl_type *coord_type = NULL; - src_reg shadow_comparitor; + src_reg shadow_comparator; src_reg offset_value; src_reg lod, lod2; src_reg sample_index; @@ -1740,8 +2190,8 @@ uint32_t constant_offset = 0; for (unsigned i = 0; i < instr->num_srcs; i++) { switch (instr->src[i].src_type) { - case nir_tex_src_comparitor: - shadow_comparitor = get_nir_src(instr->src[i].src, + case nir_tex_src_comparator: + shadow_comparator = get_nir_src(instr->src[i].src, BRW_REGISTER_TYPE_F, 1); break; @@ -1797,9 +2247,10 @@ case nir_tex_src_offset: { nir_const_value *const_offset = nir_src_as_const_value(instr->src[i].src); - if (const_offset) { - constant_offset = brw_texture_offset(const_offset->i32, 3); - } else { + if (!const_offset || + !brw_texture_offset(const_offset->i32, + nir_tex_instr_src_size(instr, i), + &constant_offset)) { offset_value = get_nir_src(instr->src[i].src, BRW_REGISTER_TYPE_D, 2); } @@ -1875,23 +2326,89 @@ ir_texture_opcode op = ir_texture_opcode_for_nir_texop(instr->op); - bool is_cube_array = - instr->op == nir_texop_txs && - instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && - instr->is_array; - emit_texture(op, dest, dest_type, coordinate, instr->coord_components, - shadow_comparitor, + shadow_comparator, lod, lod2, sample_index, - constant_offset, offset_value, - mcs, is_cube_array, - texture, texture_reg, sampler, sampler_reg); + constant_offset, offset_value, mcs, + texture, texture_reg, sampler_reg); } void vec4_visitor::nir_emit_undef(nir_ssa_undef_instr *instr) { - nir_ssa_values[instr->def.index] = dst_reg(VGRF, alloc.allocate(1)); + nir_ssa_values[instr->def.index] = + dst_reg(VGRF, alloc.allocate(DIV_ROUND_UP(instr->def.bit_size, 32))); +} + +/* SIMD4x2 64bit data is stored in register space like this: + * + * r0.0:DF x0 y0 z0 w0 + * r1.0:DF x1 y1 z1 w1 + * + * When we need to write data such as this to memory using 32-bit write + * messages we need to shuffle it in this fashion: + * + * r0.0:DF x0 y0 x1 y1 (to be written at base offset) + * r0.0:DF z0 w0 z1 w1 (to be written at base offset + 16) + * + * We need to do the inverse operation when we read using 32-bit messages, + * which we can do by applying the same exact shuffling on the 64-bit data + * read, only that because the data for each vertex is positioned differently + * we need to apply different channel enables. + * + * This function takes 64bit data and shuffles it as explained above. + * + * The @for_write parameter is used to specify if the shuffling is being done + * for proper SIMD4x2 64-bit data that needs to be shuffled prior to a 32-bit + * write message (for_write = true), or instead we are doing the inverse + * operation and we have just read 64-bit data using a 32-bit messages that we + * need to shuffle to create valid SIMD4x2 64-bit data (for_write = false). + * + * If @block and @ref are non-NULL, then the shuffling is done after @ref, + * otherwise the instructions are emitted normally at the end. The function + * returns the last instruction inserted. + * + * Notice that @src and @dst cannot be the same register. + */ +vec4_instruction * +vec4_visitor::shuffle_64bit_data(dst_reg dst, src_reg src, bool for_write, + bblock_t *block, vec4_instruction *ref) +{ + assert(type_sz(src.type) == 8); + assert(type_sz(dst.type) == 8); + assert(!regions_overlap(dst, 2 * REG_SIZE, src, 2 * REG_SIZE)); + assert(!ref == !block); + + const vec4_builder bld = !ref ? vec4_builder(this).at_end() : + vec4_builder(this).at(block, ref->next); + + /* Resolve swizzle in src */ + vec4_instruction *inst; + if (src.swizzle != BRW_SWIZZLE_XYZW) { + dst_reg data = dst_reg(this, glsl_type::dvec4_type); + inst = bld.MOV(data, src); + src = src_reg(data); + } + + /* dst+0.XY = src+0.XY */ + inst = bld.group(4, 0).MOV(writemask(dst, WRITEMASK_XY), src); + + /* dst+0.ZW = src+1.XY */ + inst = bld.group(4, for_write ? 1 : 0) + .MOV(writemask(dst, WRITEMASK_ZW), + swizzle(byte_offset(src, REG_SIZE), BRW_SWIZZLE_XYXY)); + + /* dst+1.XY = src+0.ZW */ + inst = bld.group(4, for_write ? 0 : 1) + .MOV(writemask(byte_offset(dst, REG_SIZE), WRITEMASK_XY), + swizzle(src, BRW_SWIZZLE_ZWZW)); + + /* dst+1.ZW = src+1.ZW */ + inst = bld.group(4, 1) + .MOV(writemask(byte_offset(dst, REG_SIZE), WRITEMASK_ZW), + byte_offset(src, REG_SIZE)); + + return inst; } } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -33,8 +33,8 @@ assign(unsigned int *reg_hw_locations, backend_reg *reg) { if (reg->file == VGRF) { - reg->nr = reg_hw_locations[reg->nr] + reg->reg_offset; - reg->reg_offset = 0; + reg->nr = reg_hw_locations[reg->nr] + reg->offset / REG_SIZE; + reg->offset %= REG_SIZE; } } @@ -369,14 +369,27 @@ return prev_inst_read_scratch_reg; } +static inline unsigned +spill_cost_for_type(enum brw_reg_type type) +{ + /* Spilling of a 64-bit register involves emitting 2 32-bit scratch + * messages plus the 64b/32b shuffling code. + */ + return type_sz(type) == 8 ? 2.25f : 1.0f; +} + void vec4_visitor::evaluate_spill_costs(float *spill_costs, bool *no_spill) { float loop_scale = 1.0; + unsigned *reg_type_size = (unsigned *) + ralloc_size(NULL, this->alloc.count * sizeof(unsigned)); + for (unsigned i = 0; i < this->alloc.count; i++) { spill_costs[i] = 0.0; - no_spill[i] = alloc.sizes[i] != 1; + no_spill[i] = alloc.sizes[i] != 1 && alloc.sizes[i] != 2; + reg_type_size[i] = 0; } /* Calculate costs for spilling nodes. Call it a cost of 1 per @@ -385,22 +398,74 @@ */ foreach_block_and_inst(block, vec4_instruction, inst, cfg) { for (unsigned int i = 0; i < 3; i++) { - if (inst->src[i].file == VGRF) { + if (inst->src[i].file == VGRF && !no_spill[inst->src[i].nr]) { /* We will only unspill src[i] it it wasn't unspilled for the * previous instruction, in which case we'll just reuse the scratch * reg for this instruction. */ if (!can_use_scratch_for_source(inst, i, inst->src[i].nr)) { - spill_costs[inst->src[i].nr] += loop_scale; - if (inst->src[i].reladdr) + spill_costs[inst->src[i].nr] += + loop_scale * spill_cost_for_type(inst->src[i].type); + if (inst->src[i].reladdr || + inst->src[i].offset >= REG_SIZE) + no_spill[inst->src[i].nr] = true; + + /* We don't support unspills of partial DF reads. + * + * Our 64-bit unspills are implemented with two 32-bit scratch + * messages, each one reading that for both SIMD4x2 threads that + * we need to shuffle into correct 64-bit data. Ensure that we + * are reading data for both threads. + */ + if (type_sz(inst->src[i].type) == 8 && inst->exec_size != 8) no_spill[inst->src[i].nr] = true; } + + /* We can't spill registers that mix 32-bit and 64-bit access (that + * contain 64-bit data that is operated on via 32-bit instructions) + */ + unsigned type_size = type_sz(inst->src[i].type); + if (reg_type_size[inst->src[i].nr] == 0) + reg_type_size[inst->src[i].nr] = type_size; + else if (reg_type_size[inst->src[i].nr] != type_size) + no_spill[inst->src[i].nr] = true; } } - if (inst->dst.file == VGRF) { - spill_costs[inst->dst.nr] += loop_scale; - if (inst->dst.reladdr) + if (inst->dst.file == VGRF && !no_spill[inst->dst.nr]) { + spill_costs[inst->dst.nr] += + loop_scale * spill_cost_for_type(inst->dst.type); + if (inst->dst.reladdr || inst->dst.offset >= REG_SIZE) + no_spill[inst->dst.nr] = true; + + /* We don't support spills of partial DF writes. + * + * Our 64-bit spills are implemented with two 32-bit scratch messages, + * each one writing that for both SIMD4x2 threads. Ensure that we + * are writing data for both threads. + */ + if (type_sz(inst->dst.type) == 8 && inst->exec_size != 8) + no_spill[inst->dst.nr] = true; + + /* FROM_DOUBLE opcodes are setup so that they use a dst register + * with a size of 2 even if they only produce a single-precison + * result (this is so that the opcode can use the larger register to + * produce a 64-bit aligned intermediary result as required by the + * hardware during the conversion process). This creates a problem for + * spilling though, because when we attempt to emit a spill for the + * dst we see a 32-bit destination and emit a scratch write that + * allocates a single spill register. + */ + if (inst->opcode == VEC4_OPCODE_FROM_DOUBLE) + no_spill[inst->dst.nr] = true; + + /* We can't spill registers that mix 32-bit and 64-bit access (that + * contain 64-bit data that is operated on via 32-bit instructions) + */ + unsigned type_size = type_sz(inst->dst.type); + if (reg_type_size[inst->dst.nr] == 0) + reg_type_size[inst->dst.nr] = type_size; + else if (reg_type_size[inst->dst.nr] != type_size) no_spill[inst->dst.nr] = true; } @@ -428,6 +493,8 @@ break; } } + + ralloc_free(reg_type_size); } int @@ -449,8 +516,9 @@ void vec4_visitor::spill_reg(int spill_reg_nr) { - assert(alloc.sizes[spill_reg_nr] == 1); - unsigned int spill_offset = last_scratch++; + assert(alloc.sizes[spill_reg_nr] == 1 || alloc.sizes[spill_reg_nr] == 2); + unsigned int spill_offset = last_scratch; + last_scratch += alloc.sizes[spill_reg_nr]; /* Generate spill/unspill instructions for the objects being spilled. */ int scratch_reg = -1; @@ -464,12 +532,14 @@ * for consecutive instructions that read different channels of * the same vec4. */ - scratch_reg = alloc.allocate(1); + scratch_reg = alloc.allocate(alloc.sizes[spill_reg_nr]); src_reg temp = inst->src[i]; temp.nr = scratch_reg; + temp.offset = 0; temp.swizzle = BRW_SWIZZLE_XYZW; emit_scratch_read(block, inst, dst_reg(temp), inst->src[i], spill_offset); + temp.offset = inst->src[i].offset; } assert(scratch_reg != -1); inst->src[i].nr = scratch_reg; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_surface_builder.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_surface_builder.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_surface_builder.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_surface_builder.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -42,9 +42,9 @@ DIV_ROUND_UP(size * dst_stride, 4)); for (unsigned i = 0; i < size; ++i) - bld.MOV(writemask(offset(dst, i * dst_stride / 4), + bld.MOV(writemask(offset(dst, 8, i * dst_stride / 4), 1 << (i * dst_stride % 4)), - swizzle(offset(src, i * src_stride / 4), + swizzle(offset(src, 8, i * src_stride / 4), brw_swizzle_for_mask(1 << (i * src_stride % 4)))); return src_reg(dst); @@ -124,16 +124,16 @@ unsigned n = 0; if (header_sz) - bld.exec_all().MOV(offset(payload, n++), + bld.exec_all().MOV(offset(payload, 8, n++), retype(header, BRW_REGISTER_TYPE_UD)); for (unsigned i = 0; i < addr_sz; i++) - bld.MOV(offset(payload, n++), - offset(retype(addr, BRW_REGISTER_TYPE_UD), i)); + bld.MOV(offset(payload, 8, n++), + offset(retype(addr, BRW_REGISTER_TYPE_UD), 8, i)); for (unsigned i = 0; i < src_sz; i++) - bld.MOV(offset(payload, n++), - offset(retype(src, BRW_REGISTER_TYPE_UD), i)); + bld.MOV(offset(payload, 8, n++), + offset(retype(src, BRW_REGISTER_TYPE_UD), 8, i)); /* Reduce the dynamically uniform surface index to a single * scalar. @@ -145,7 +145,7 @@ vec4_instruction *inst = bld.emit(op, dst, src_reg(payload), usurface, brw_imm_ud(arg)); inst->mlen = sz; - inst->regs_written = ret_sz; + inst->size_written = ret_sz * REG_SIZE; inst->header_size = header_sz; inst->predicate = pred; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -94,9 +94,10 @@ * HS instance dispatched will only have its bottom half doing real * work, and so we need to disable the upper half: */ - if (nir->info.tcs.vertices_out % 2) { + if (nir->info->tess.tcs_vertices_out % 2) { emit(CMP(dst_null_d(), invocation_id, - brw_imm_ud(nir->info.tcs.vertices_out), BRW_CONDITIONAL_L)); + brw_imm_ud(nir->info->tess.tcs_vertices_out), + BRW_CONDITIONAL_L)); /* Matching ENDIF is in emit_thread_end() */ emit(IF(BRW_PREDICATE_NORMAL)); @@ -110,7 +111,7 @@ vec4_instruction *inst; current_annotation = "thread end"; - if (nir->info.tcs.vertices_out % 2) { + if (nir->info->tess.tcs_vertices_out % 2) { emit(BRW_OPCODE_ENDIF); } @@ -166,6 +167,7 @@ vec4_tcs_visitor::emit_input_urb_read(const dst_reg &dst, const src_reg &vertex_index, unsigned base_offset, + unsigned first_component, const src_reg &indirect_offset) { vec4_instruction *inst; @@ -191,13 +193,16 @@ if (inst->offset == 0 && indirect_offset.file == BAD_FILE) { emit(MOV(dst, swizzle(src_reg(temp), BRW_SWIZZLE_WWWW))); } else { - emit(MOV(dst, src_reg(temp))); + src_reg src = src_reg(temp); + src.swizzle = BRW_SWZ_COMP_INPUT(first_component); + emit(MOV(dst, src)); } } void vec4_tcs_visitor::emit_output_urb_read(const dst_reg &dst, unsigned base_offset, + unsigned first_component, const src_reg &indirect_offset) { vec4_instruction *inst; @@ -205,14 +210,20 @@ /* Set up the message header to reference the proper parts of the URB */ dst_reg header = dst_reg(this, glsl_type::uvec4_type); inst = emit(TCS_OPCODE_SET_OUTPUT_URB_OFFSETS, header, - brw_imm_ud(dst.writemask), indirect_offset); + brw_imm_ud(dst.writemask << first_component), indirect_offset); inst->force_writemask_all = true; - /* Read into a temporary, ignoring writemasking. */ vec4_instruction *read = emit(VEC4_OPCODE_URB_READ, dst, src_reg(header)); read->offset = base_offset; read->mlen = 1; read->base_mrf = -1; + + if (first_component) { + /* Read into a temporary and copy with a swizzle and writemask. */ + read->dst = retype(dst_reg(this, glsl_type::ivec4_type), dst.type); + emit(MOV(dst, swizzle(src_reg(read->dst), + BRW_SWZ_COMP_INPUT(first_component)))); + } } void @@ -230,7 +241,8 @@ inst = emit(TCS_OPCODE_SET_OUTPUT_URB_OFFSETS, dst_reg(message), brw_imm_ud(writemask), indirect_offset); inst->force_writemask_all = true; - inst = emit(MOV(offset(dst_reg(retype(message, value.type)), 1), value)); + inst = emit(MOV(byte_offset(dst_reg(retype(message, value.type)), REG_SIZE), + value)); inst->force_writemask_all = true; inst = emit(TCS_OPCODE_URB_WRITE, dst_null_f(), message); @@ -264,10 +276,37 @@ vertex_const ? src_reg(brw_imm_ud(vertex_const->u32[0])) : get_nir_src(instr->src[0], BRW_REGISTER_TYPE_UD, 1); - dst_reg dst = get_nir_dest(instr->dest, BRW_REGISTER_TYPE_D); - dst.writemask = brw_writemask_for_size(instr->num_components); + unsigned first_component = nir_intrinsic_component(instr); + if (nir_dest_bit_size(instr->dest) == 64) { + /* We need to emit up to two 32-bit URB reads, then shuffle + * the result into a temporary, then move to the destination + * honoring the writemask + * + * We don't need to divide first_component by 2 because + * emit_input_urb_read takes a 32-bit type. + */ + dst_reg tmp = dst_reg(this, glsl_type::dvec4_type); + dst_reg tmp_d = retype(tmp, BRW_REGISTER_TYPE_D); + emit_input_urb_read(tmp_d, vertex_index, imm_offset, + first_component, indirect_offset); + if (instr->num_components > 2) { + emit_input_urb_read(byte_offset(tmp_d, REG_SIZE), vertex_index, + imm_offset + 1, 0, indirect_offset); + } - emit_input_urb_read(dst, vertex_index, imm_offset, indirect_offset); + src_reg tmp_src = retype(src_reg(tmp_d), BRW_REGISTER_TYPE_DF); + dst_reg shuffled = dst_reg(this, glsl_type::dvec4_type); + shuffle_64bit_data(shuffled, tmp_src, false); + + dst_reg dst = get_nir_dest(instr->dest, BRW_REGISTER_TYPE_DF); + dst.writemask = brw_writemask_for_size(instr->num_components); + emit(MOV(dst, src_reg(shuffled))); + } else { + dst_reg dst = get_nir_dest(instr->dest, BRW_REGISTER_TYPE_D); + dst.writemask = brw_writemask_for_size(instr->num_components); + emit_input_urb_read(dst, vertex_index, imm_offset, + first_component, indirect_offset); + } break; } case nir_intrinsic_load_input: @@ -281,60 +320,8 @@ dst_reg dst = get_nir_dest(instr->dest, BRW_REGISTER_TYPE_D); dst.writemask = brw_writemask_for_size(instr->num_components); - if (imm_offset == 0 && indirect_offset.file == BAD_FILE) { - dst.type = BRW_REGISTER_TYPE_F; - - /* This is a read of gl_TessLevelInner[], which lives in the - * Patch URB header. The layout depends on the domain. - */ - switch (key->tes_primitive_mode) { - case GL_QUADS: { - /* DWords 3-2 (reversed); use offset 0 and WZYX swizzle. */ - dst_reg tmp(this, glsl_type::vec4_type); - emit_output_urb_read(tmp, 0, src_reg()); - emit(MOV(writemask(dst, WRITEMASK_XY), - swizzle(src_reg(tmp), BRW_SWIZZLE_WZYX))); - break; - } - case GL_TRIANGLES: - /* DWord 4; use offset 1 but normal swizzle/writemask. */ - emit_output_urb_read(writemask(dst, WRITEMASK_X), 1, src_reg()); - break; - case GL_ISOLINES: - /* All channels are undefined. */ - return; - default: - unreachable("Bogus tessellation domain"); - } - } else if (imm_offset == 1 && indirect_offset.file == BAD_FILE) { - dst.type = BRW_REGISTER_TYPE_F; - unsigned swiz = BRW_SWIZZLE_WZYX; - - /* This is a read of gl_TessLevelOuter[], which lives in the - * high 4 DWords of the Patch URB header, in reverse order. - */ - switch (key->tes_primitive_mode) { - case GL_QUADS: - dst.writemask = WRITEMASK_XYZW; - break; - case GL_TRIANGLES: - dst.writemask = WRITEMASK_XYZ; - break; - case GL_ISOLINES: - /* Isolines are not reversed; swizzle .zw -> .xy */ - swiz = BRW_SWIZZLE_ZWZW; - dst.writemask = WRITEMASK_XY; - return; - default: - unreachable("Bogus tessellation domain"); - } - - dst_reg tmp(this, glsl_type::vec4_type); - emit_output_urb_read(tmp, 1, src_reg()); - emit(MOV(dst, swizzle(src_reg(tmp), swiz))); - } else { - emit_output_urb_read(dst, imm_offset, indirect_offset); - } + emit_output_urb_read(dst, imm_offset, nir_intrinsic_component(instr), + indirect_offset); break; } case nir_intrinsic_store_output: @@ -346,64 +333,42 @@ src_reg indirect_offset = get_indirect_offset(instr); unsigned imm_offset = instr->const_index[0]; - /* The passthrough shader writes the whole patch header as two vec4s; - * skip all the gl_TessLevelInner/Outer swizzling. - */ - if (indirect_offset.file == BAD_FILE && !is_passthrough_shader) { - if (imm_offset == 0) { - value.type = BRW_REGISTER_TYPE_F; - - mask &= - (1 << tesslevel_inner_components(key->tes_primitive_mode)) - 1; - - /* This is a write to gl_TessLevelInner[], which lives in the - * Patch URB header. The layout depends on the domain. - */ - switch (key->tes_primitive_mode) { - case GL_QUADS: - /* gl_TessLevelInner[].xy lives at DWords 3-2 (reversed). - * We use an XXYX swizzle to reverse put .xy in the .wz - * channels, and use a .zw writemask. - */ - swiz = BRW_SWIZZLE4(0, 0, 1, 0); - mask = writemask_for_backwards_vector(mask); - break; - case GL_TRIANGLES: - /* gl_TessLevelInner[].x lives at DWord 4, so we set the - * writemask to X and bump the URB offset by 1. - */ - imm_offset = 1; - break; - case GL_ISOLINES: - /* Skip; gl_TessLevelInner[] doesn't exist for isolines. */ - return; - default: - unreachable("Bogus tessellation domain"); - } - } else if (imm_offset == 1) { - value.type = BRW_REGISTER_TYPE_F; - - mask &= - (1 << tesslevel_outer_components(key->tes_primitive_mode)) - 1; - - /* This is a write to gl_TessLevelOuter[] which lives in the - * Patch URB Header at DWords 4-7. However, it's reversed, so - * instead of .xyzw we have .wzyx. - */ - if (key->tes_primitive_mode == GL_ISOLINES) { - /* Isolines .xy should be stored in .zw, in order. */ - swiz = BRW_SWIZZLE4(0, 0, 0, 1); - mask <<= 2; - } else { - /* Other domains are reversed; store .wzyx instead of .xyzw. */ - swiz = BRW_SWIZZLE_WZYX; - mask = writemask_for_backwards_vector(mask); - } - } + unsigned first_component = nir_intrinsic_component(instr); + if (first_component) { + if (nir_src_bit_size(instr->src[0]) == 64) + first_component /= 2; + assert(swiz == BRW_SWIZZLE_XYZW); + swiz = BRW_SWZ_COMP_OUTPUT(first_component); + mask = mask << first_component; } - emit_urb_write(swizzle(value, swiz), mask, - imm_offset, indirect_offset); + if (nir_src_bit_size(instr->src[0]) == 64) { + /* For 64-bit data we need to shuffle the data before we write and + * emit two messages. Also, since each channel is twice as large we + * need to fix the writemask in each 32-bit message to account for it. + */ + value = swizzle(retype(value, BRW_REGISTER_TYPE_DF), swiz); + dst_reg shuffled = dst_reg(this, glsl_type::dvec4_type); + shuffle_64bit_data(shuffled, value, true); + src_reg shuffled_float = src_reg(retype(shuffled, BRW_REGISTER_TYPE_F)); + + for (int n = 0; n < 2; n++) { + unsigned fixed_mask = 0; + if (mask & WRITEMASK_X) + fixed_mask |= WRITEMASK_XY; + if (mask & WRITEMASK_Y) + fixed_mask |= WRITEMASK_ZW; + emit_urb_write(shuffled_float, fixed_mask, + imm_offset, indirect_offset); + + shuffled_float = byte_offset(shuffled_float, REG_SIZE); + mask >>= 2; + imm_offset++; + } + } else { + emit_urb_write(swizzle(value, swiz), mask, + imm_offset, indirect_offset); + } break; } @@ -431,35 +396,34 @@ unsigned *final_assembly_size, char **error_str) { - const struct brw_device_info *devinfo = compiler->devinfo; + const struct gen_device_info *devinfo = compiler->devinfo; struct brw_vue_prog_data *vue_prog_data = &prog_data->base; const bool is_scalar = compiler->scalar_stage[MESA_SHADER_TESS_CTRL]; nir_shader *nir = nir_shader_clone(mem_ctx, src_shader); - nir->info.outputs_written = key->outputs_written; - nir->info.patch_outputs_written = key->patch_outputs_written; + nir->info->outputs_written = key->outputs_written; + nir->info->patch_outputs_written = key->patch_outputs_written; struct brw_vue_map input_vue_map; - brw_compute_vue_map(devinfo, &input_vue_map, - nir->info.inputs_read & ~VARYING_BIT_PRIMITIVE_ID, - true); - + brw_compute_vue_map(devinfo, &input_vue_map, nir->info->inputs_read, + nir->info->separate_shader); brw_compute_tess_vue_map(&vue_prog_data->vue_map, - nir->info.outputs_written, - nir->info.patch_outputs_written); + nir->info->outputs_written, + nir->info->patch_outputs_written); - nir = brw_nir_apply_sampler_key(nir, devinfo, &key->tex, is_scalar); + nir = brw_nir_apply_sampler_key(nir, compiler, &key->tex, is_scalar); brw_nir_lower_vue_inputs(nir, is_scalar, &input_vue_map); - brw_nir_lower_tcs_outputs(nir, &vue_prog_data->vue_map); + brw_nir_lower_tcs_outputs(nir, &vue_prog_data->vue_map, + key->tes_primitive_mode); if (key->quads_workaround) brw_nir_apply_tcs_quads_workaround(nir); - nir = brw_postprocess_nir(nir, compiler->devinfo, is_scalar); + nir = brw_postprocess_nir(nir, compiler, is_scalar); if (is_scalar) - prog_data->instances = DIV_ROUND_UP(nir->info.tcs.vertices_out, 8); + prog_data->instances = DIV_ROUND_UP(nir->info->tess.tcs_vertices_out, 8); else - prog_data->instances = DIV_ROUND_UP(nir->info.tcs.vertices_out, 2); + prog_data->instances = DIV_ROUND_UP(nir->info->tess.tcs_vertices_out, 2); /* Compute URB entry size. The maximum allowed URB entry size is 32k. * That divides up as follows: @@ -478,7 +442,8 @@ unsigned output_size_bytes = 0; /* Note that the patch header is counted in num_per_patch_slots. */ output_size_bytes += num_per_patch_slots * 16; - output_size_bytes += nir->info.tcs.vertices_out * num_per_vertex_slots * 16; + output_size_bytes += nir->info->tess.tcs_vertices_out * + num_per_vertex_slots * 16; assert(output_size_bytes >= 1); if (output_size_bytes > GEN7_MAX_HS_URB_ENTRY_SIZE_BYTES) @@ -519,9 +484,9 @@ if (unlikely(INTEL_DEBUG & DEBUG_TCS)) { g.enable_debug(ralloc_asprintf(mem_ctx, "%s tessellation control shader %s", - nir->info.label ? nir->info.label + nir->info->label ? nir->info->label : "unnamed", - nir->info.name)); + nir->info->name)); } g.generate_code(v.cfg, 8); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_tcs.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_tcs.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_tcs.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_tcs.h 2017-06-01 10:37:10.000000000 +0000 @@ -60,9 +60,11 @@ void emit_input_urb_read(const dst_reg &dst, const src_reg &vertex_index, unsigned base_offset, + unsigned first_component, const src_reg &indirect_offset); void emit_output_urb_read(const dst_reg &dst, unsigned base_offset, + unsigned first_component, const src_reg &indirect_offset); void emit_urb_write(const src_reg &value, unsigned writemask, diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_tes.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_tes.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_tes.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_tes.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -82,14 +82,33 @@ if (inst->src[i].file != ATTR) continue; - struct brw_reg grf = - brw_vec4_grf(reg + inst->src[i].nr / 2, 4 * (inst->src[i].nr % 2)); - grf = stride(grf, 0, 4, 1); + bool is_64bit = type_sz(inst->src[i].type) == 8; + + unsigned slot = inst->src[i].nr + inst->src[i].offset / 16; + struct brw_reg grf = brw_vec4_grf(reg + slot / 2, 4 * (slot % 2)); + grf = stride(grf, 0, is_64bit ? 2 : 4, 1); grf.swizzle = inst->src[i].swizzle; grf.type = inst->src[i].type; grf.abs = inst->src[i].abs; grf.negate = inst->src[i].negate; + /* For 64-bit attributes we can end up with components XY in the + * second half of a register and components ZW in the first half + * of the next. Fix it up here. + */ + if (is_64bit && grf.subnr > 0) { + /* We can't do swizzles that mix XY and ZW channels in this case. + * Such cases should have been handled by the scalarization pass. + */ + assert((brw_mask_for_swizzle(grf.swizzle) & 0x3) ^ + (brw_mask_for_swizzle(grf.swizzle) & 0xc)); + if (brw_mask_for_swizzle(grf.swizzle) & 0xc) { + grf.subnr = 0; + grf.nr++; + grf.swizzle -= BRW_SWIZZLE_ZZZZ; + } + } + inst->src[i] = grf; } } @@ -179,6 +198,10 @@ src_reg indirect_offset = get_indirect_offset(instr); unsigned imm_offset = instr->const_index[0]; src_reg header = input_read_header; + bool is_64bit = nir_dest_bit_size(instr->dest) == 64; + unsigned first_component = nir_intrinsic_component(instr); + if (is_64bit) + first_component /= 2; if (indirect_offset.file != BAD_FILE) { header = src_reg(this, glsl_type::uvec4_type); @@ -190,27 +213,67 @@ */ const unsigned max_push_slots = 24; if (imm_offset < max_push_slots) { - emit(MOV(get_nir_dest(instr->dest, BRW_REGISTER_TYPE_D), - src_reg(ATTR, imm_offset, glsl_type::ivec4_type))); + const glsl_type *src_glsl_type = + is_64bit ? glsl_type::dvec4_type : glsl_type::ivec4_type; + src_reg src = src_reg(ATTR, imm_offset, src_glsl_type); + src.swizzle = BRW_SWZ_COMP_INPUT(first_component); + + const brw_reg_type dst_reg_type = + is_64bit ? BRW_REGISTER_TYPE_DF : BRW_REGISTER_TYPE_D; + emit(MOV(get_nir_dest(instr->dest, dst_reg_type), src)); + prog_data->urb_read_length = MAX2(prog_data->urb_read_length, - DIV_ROUND_UP(imm_offset + 1, 2)); + DIV_ROUND_UP(imm_offset + (is_64bit ? 2 : 1), 2)); break; } } - dst_reg temp(this, glsl_type::ivec4_type); - vec4_instruction *read = - emit(VEC4_OPCODE_URB_READ, temp, src_reg(header)); - read->offset = imm_offset; - read->urb_write_flags = BRW_URB_WRITE_PER_SLOT_OFFSET; - - /* Copy to target. We might end up with some funky writemasks landing - * in here, but we really don't want them in the above pseudo-ops. - */ - dst_reg dst = get_nir_dest(instr->dest, BRW_REGISTER_TYPE_D); - dst.writemask = brw_writemask_for_size(instr->num_components); - emit(MOV(dst, src_reg(temp))); + if (!is_64bit) { + dst_reg temp(this, glsl_type::ivec4_type); + vec4_instruction *read = + emit(VEC4_OPCODE_URB_READ, temp, src_reg(header)); + read->offset = imm_offset; + read->urb_write_flags = BRW_URB_WRITE_PER_SLOT_OFFSET; + + src_reg src = src_reg(temp); + src.swizzle = BRW_SWZ_COMP_INPUT(first_component); + + /* Copy to target. We might end up with some funky writemasks landing + * in here, but we really don't want them in the above pseudo-ops. + */ + dst_reg dst = get_nir_dest(instr->dest, BRW_REGISTER_TYPE_D); + dst.writemask = brw_writemask_for_size(instr->num_components); + emit(MOV(dst, src)); + } else { + /* For 64-bit we need to load twice as many 32-bit components, and for + * dvec3/4 we need to emit 2 URB Read messages + */ + dst_reg temp(this, glsl_type::dvec4_type); + dst_reg temp_d = retype(temp, BRW_REGISTER_TYPE_D); + + vec4_instruction *read = + emit(VEC4_OPCODE_URB_READ, temp_d, src_reg(header)); + read->offset = imm_offset; + read->urb_write_flags = BRW_URB_WRITE_PER_SLOT_OFFSET; + + if (instr->num_components > 2) { + read = emit(VEC4_OPCODE_URB_READ, byte_offset(temp_d, REG_SIZE), + src_reg(header)); + read->offset = imm_offset + 1; + read->urb_write_flags = BRW_URB_WRITE_PER_SLOT_OFFSET; + } + + src_reg temp_as_src = src_reg(temp); + temp_as_src.swizzle = BRW_SWZ_COMP_INPUT(first_component); + + dst_reg shuffled(this, glsl_type::dvec4_type); + shuffle_64bit_data(shuffled, temp_as_src, false); + + dst_reg dst = get_nir_dest(instr->dest, BRW_REGISTER_TYPE_DF); + dst.writemask = brw_writemask_for_size(instr->num_components); + emit(MOV(dst, src_reg(shuffled))); + } break; } default: diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -46,7 +46,6 @@ this->predicate = BRW_PREDICATE_NONE; this->predicate_inverse = false; this->target = 0; - this->regs_written = (dst.file == BAD_FILE ? 0 : 1); this->shadow_compare = false; this->ir = NULL; this->urb_write_flags = BRW_URB_WRITE_NO_FLAGS; @@ -55,6 +54,10 @@ this->mlen = 0; this->base_mrf = 0; this->offset = 0; + this->exec_size = 8; + this->group = 0; + this->size_written = (dst.file == BAD_FILE ? + 0 : this->exec_size * type_sz(dst.type)); this->annotation = NULL; } @@ -183,6 +186,7 @@ ALU2_ACC(ADDC) ALU2_ACC(SUBB) ALU2(MAC) +ALU1(DIM) /** Gen4 predicated IF. */ vec4_instruction * @@ -585,7 +589,7 @@ if (type->is_matrix()) { const glsl_type *col_type = type->column_type(); unsigned col_slots = - (as_vec4 && col_type->is_dual_slot_double()) ? 2 : 1; + (as_vec4 && col_type->is_dual_slot()) ? 2 : 1; return type->matrix_columns * col_slots; } else { /* Regardless of size of vector, it gets a vec4. This is bad @@ -593,7 +597,7 @@ * mess. Hopefully a later pass over the code can pack scalars * down if appropriate. */ - return (as_vec4 && type->is_dual_slot_double()) ? 2 : 1; + return (as_vec4 && type->is_dual_slot()) ? 2 : 1; } case GLSL_TYPE_ARRAY: assert(type->length > 0); @@ -780,7 +784,7 @@ else emit(pull); - dst_reg index_reg = retype(offset(dst_reg(header), 1), + dst_reg index_reg = retype(byte_offset(dst_reg(header), REG_SIZE), offset_reg.type); pull = MOV(writemask(index_reg, WRITEMASK_X), offset_reg); @@ -900,16 +904,14 @@ const glsl_type *dest_type, src_reg coordinate, int coord_components, - src_reg shadow_comparitor, + src_reg shadow_comparator, src_reg lod, src_reg lod2, src_reg sample_index, uint32_t constant_offset, src_reg offset_value, src_reg mcs, - bool is_cube_array, uint32_t surface, src_reg surface_reg, - uint32_t sampler, src_reg sampler_reg) { /* The sampler can only meaningfully compute LOD for fragment shader @@ -972,7 +974,7 @@ inst->base_mrf = 2; inst->mlen = inst->header_size; inst->dst.writemask = WRITEMASK_XYZW; - inst->shadow_compare = shadow_comparitor.file != BAD_FILE; + inst->shadow_compare = shadow_comparator.file != BAD_FILE; inst->src[1] = surface_reg; inst->src[2] = sampler_reg; @@ -1000,11 +1002,11 @@ emit(MOV(dst_reg(MRF, param_base, coordinate.type, zero_mask), brw_imm_d(0))); } - /* Load the shadow comparitor */ - if (shadow_comparitor.file != BAD_FILE && op != ir_txd && (op != ir_tg4 || offset_value.file == BAD_FILE)) { - emit(MOV(dst_reg(MRF, param_base + 1, shadow_comparitor.type, + /* Load the shadow comparator */ + if (shadow_comparator.file != BAD_FILE && op != ir_txd && (op != ir_tg4 || offset_value.file == BAD_FILE)) { + emit(MOV(dst_reg(MRF, param_base + 1, shadow_comparator.type, WRITEMASK_X), - shadow_comparitor)); + shadow_comparator)); inst->mlen++; } @@ -1013,7 +1015,7 @@ int mrf, writemask; if (devinfo->gen >= 5) { mrf = param_base + 1; - if (shadow_comparitor.file != BAD_FILE) { + if (shadow_comparator.file != BAD_FILE) { writemask = WRITEMASK_Y; /* mlen already incremented */ } else { @@ -1059,17 +1061,17 @@ emit(MOV(dst_reg(MRF, param_base + 1, type, WRITEMASK_YW), lod2)); inst->mlen++; - if (dest_type->vector_elements == 3 || shadow_comparitor.file != BAD_FILE) { + if (dest_type->vector_elements == 3 || shadow_comparator.file != BAD_FILE) { lod.swizzle = BRW_SWIZZLE_ZZZZ; lod2.swizzle = BRW_SWIZZLE_ZZZZ; emit(MOV(dst_reg(MRF, param_base + 2, type, WRITEMASK_X), lod)); emit(MOV(dst_reg(MRF, param_base + 2, type, WRITEMASK_Y), lod2)); inst->mlen++; - if (shadow_comparitor.file != BAD_FILE) { + if (shadow_comparator.file != BAD_FILE) { emit(MOV(dst_reg(MRF, param_base + 2, - shadow_comparitor.type, WRITEMASK_Z), - shadow_comparitor)); + shadow_comparator.type, WRITEMASK_Z), + shadow_comparator)); } } } else /* devinfo->gen == 4 */ { @@ -1078,9 +1080,9 @@ inst->mlen += 2; } } else if (op == ir_tg4 && offset_value.file != BAD_FILE) { - if (shadow_comparitor.file != BAD_FILE) { - emit(MOV(dst_reg(MRF, param_base, shadow_comparitor.type, WRITEMASK_W), - shadow_comparitor)); + if (shadow_comparator.file != BAD_FILE) { + emit(MOV(dst_reg(MRF, param_base, shadow_comparator.type, WRITEMASK_W), + shadow_comparator)); } emit(MOV(dst_reg(MRF, param_base + 1, glsl_type::ivec2_type, WRITEMASK_XY), @@ -1094,16 +1096,10 @@ /* fixup num layers (z) for cube arrays: hardware returns faces * layers; * spec requires layers. */ - if (op == ir_txs) { - if (is_cube_array) { - emit_math(SHADER_OPCODE_INT_QUOTIENT, - writemask(inst->dst, WRITEMASK_Z), - src_reg(inst->dst), brw_imm_d(6)); - } else if (devinfo->gen < 7) { - /* Gen4-6 return 0 instead of 1 for single layer surfaces. */ - emit_minmax(BRW_CONDITIONAL_GE, writemask(inst->dst, WRITEMASK_Z), - src_reg(inst->dst), brw_imm_d(1)); - } + if (op == ir_txs && devinfo->gen < 7) { + /* Gen4-6 return 0 instead of 1 for single layer surfaces. */ + emit_minmax(BRW_CONDITIONAL_GE, writemask(inst->dst, WRITEMASK_Z), + src_reg(inst->dst), brw_imm_d(1)); } if (devinfo->gen == 6 && op == ir_tg4) { @@ -1147,7 +1143,7 @@ } void -vec4_visitor::gs_emit_vertex(int stream_id) +vec4_visitor::gs_emit_vertex(int /* stream_id */) { unreachable("not reached"); } @@ -1161,15 +1157,16 @@ void vec4_visitor::emit_ndc_computation() { - if (output_reg[VARYING_SLOT_POS].file == BAD_FILE) + if (output_reg[VARYING_SLOT_POS][0].file == BAD_FILE) return; /* Get the position */ - src_reg pos = src_reg(output_reg[VARYING_SLOT_POS]); + src_reg pos = src_reg(output_reg[VARYING_SLOT_POS][0]); /* Build ndc coords, which are (x/w, y/w, z/w, 1/w) */ dst_reg ndc = dst_reg(this, glsl_type::vec4_type); - output_reg[BRW_VARYING_SLOT_NDC] = ndc; + output_reg[BRW_VARYING_SLOT_NDC][0] = ndc; + output_num_components[BRW_VARYING_SLOT_NDC][0] = 4; current_annotation = "NDC"; dst_reg ndc_w = ndc; @@ -1189,7 +1186,7 @@ { if (devinfo->gen < 6 && ((prog_data->vue_map.slots_valid & VARYING_BIT_PSIZ) || - output_reg[VARYING_SLOT_CLIP_DIST0].file != BAD_FILE || + output_reg[VARYING_SLOT_CLIP_DIST0][0].file != BAD_FILE || devinfo->has_negative_rhw_bug)) { dst_reg header1 = dst_reg(this, glsl_type::uvec4_type); dst_reg header1_w = header1; @@ -1198,23 +1195,23 @@ emit(MOV(header1, brw_imm_ud(0u))); if (prog_data->vue_map.slots_valid & VARYING_BIT_PSIZ) { - src_reg psiz = src_reg(output_reg[VARYING_SLOT_PSIZ]); + src_reg psiz = src_reg(output_reg[VARYING_SLOT_PSIZ][0]); current_annotation = "Point size"; emit(MUL(header1_w, psiz, brw_imm_f((float)(1 << 11)))); emit(AND(header1_w, src_reg(header1_w), brw_imm_d(0x7ff << 8))); } - if (output_reg[VARYING_SLOT_CLIP_DIST0].file != BAD_FILE) { + if (output_reg[VARYING_SLOT_CLIP_DIST0][0].file != BAD_FILE) { current_annotation = "Clipping flags"; dst_reg flags0 = dst_reg(this, glsl_type::uint_type); dst_reg flags1 = dst_reg(this, glsl_type::uint_type); - emit(CMP(dst_null_f(), src_reg(output_reg[VARYING_SLOT_CLIP_DIST0]), brw_imm_f(0.0f), BRW_CONDITIONAL_L)); + emit(CMP(dst_null_f(), src_reg(output_reg[VARYING_SLOT_CLIP_DIST0][0]), brw_imm_f(0.0f), BRW_CONDITIONAL_L)); emit(VS_OPCODE_UNPACK_FLAGS_SIMD4X2, flags0, brw_imm_d(0)); emit(OR(header1_w, src_reg(header1_w), src_reg(flags0))); - emit(CMP(dst_null_f(), src_reg(output_reg[VARYING_SLOT_CLIP_DIST1]), brw_imm_f(0.0f), BRW_CONDITIONAL_L)); + emit(CMP(dst_null_f(), src_reg(output_reg[VARYING_SLOT_CLIP_DIST1][0]), brw_imm_f(0.0f), BRW_CONDITIONAL_L)); emit(VS_OPCODE_UNPACK_FLAGS_SIMD4X2, flags1, brw_imm_d(0)); emit(SHL(flags1, src_reg(flags1), brw_imm_d(4))); emit(OR(header1_w, src_reg(header1_w), src_reg(flags1))); @@ -1230,15 +1227,15 @@ * clipped against all fixed planes. */ if (devinfo->has_negative_rhw_bug && - output_reg[BRW_VARYING_SLOT_NDC].file != BAD_FILE) { - src_reg ndc_w = src_reg(output_reg[BRW_VARYING_SLOT_NDC]); + output_reg[BRW_VARYING_SLOT_NDC][0].file != BAD_FILE) { + src_reg ndc_w = src_reg(output_reg[BRW_VARYING_SLOT_NDC][0]); ndc_w.swizzle = BRW_SWIZZLE_WWWW; emit(CMP(dst_null_f(), ndc_w, brw_imm_f(0.0f), BRW_CONDITIONAL_L)); vec4_instruction *inst; inst = emit(OR(header1_w, src_reg(header1_w), brw_imm_ud(1u << 6))); inst->predicate = BRW_PREDICATE_NORMAL; - output_reg[BRW_VARYING_SLOT_NDC].type = BRW_REGISTER_TYPE_F; - inst = emit(MOV(output_reg[BRW_VARYING_SLOT_NDC], brw_imm_f(0.0f))); + output_reg[BRW_VARYING_SLOT_NDC][0].type = BRW_REGISTER_TYPE_F; + inst = emit(MOV(output_reg[BRW_VARYING_SLOT_NDC][0], brw_imm_f(0.0f))); inst->predicate = BRW_PREDICATE_NORMAL; } @@ -1250,7 +1247,7 @@ if (prog_data->vue_map.slots_valid & VARYING_BIT_PSIZ) { dst_reg reg_w = reg; reg_w.writemask = WRITEMASK_W; - src_reg reg_as_src = src_reg(output_reg[VARYING_SLOT_PSIZ]); + src_reg reg_as_src = src_reg(output_reg[VARYING_SLOT_PSIZ][0]); reg_as_src.type = reg_w.type; reg_as_src.swizzle = brw_swizzle_for_size(1); emit(MOV(reg_w, reg_as_src)); @@ -1259,36 +1256,45 @@ dst_reg reg_y = reg; reg_y.writemask = WRITEMASK_Y; reg_y.type = BRW_REGISTER_TYPE_D; - output_reg[VARYING_SLOT_LAYER].type = reg_y.type; - emit(MOV(reg_y, src_reg(output_reg[VARYING_SLOT_LAYER]))); + output_reg[VARYING_SLOT_LAYER][0].type = reg_y.type; + emit(MOV(reg_y, src_reg(output_reg[VARYING_SLOT_LAYER][0]))); } if (prog_data->vue_map.slots_valid & VARYING_BIT_VIEWPORT) { dst_reg reg_z = reg; reg_z.writemask = WRITEMASK_Z; reg_z.type = BRW_REGISTER_TYPE_D; - output_reg[VARYING_SLOT_VIEWPORT].type = reg_z.type; - emit(MOV(reg_z, src_reg(output_reg[VARYING_SLOT_VIEWPORT]))); + output_reg[VARYING_SLOT_VIEWPORT][0].type = reg_z.type; + emit(MOV(reg_z, src_reg(output_reg[VARYING_SLOT_VIEWPORT][0]))); } } } vec4_instruction * -vec4_visitor::emit_generic_urb_slot(dst_reg reg, int varying) +vec4_visitor::emit_generic_urb_slot(dst_reg reg, int varying, int component) { assert(varying < VARYING_SLOT_MAX); - assert(output_reg[varying].type == reg.type); - current_annotation = output_reg_annotation[varying]; - if (output_reg[varying].file != BAD_FILE) - return emit(MOV(reg, src_reg(output_reg[varying]))); - else + + unsigned num_comps = output_num_components[varying][component]; + if (num_comps == 0) return NULL; + + assert(output_reg[varying][component].type == reg.type); + current_annotation = output_reg_annotation[varying]; + if (output_reg[varying][component].file != BAD_FILE) { + src_reg src = src_reg(output_reg[varying][component]); + src.swizzle = BRW_SWZ_COMP_OUTPUT(component); + reg.writemask = + brw_writemask_for_component_packing(num_comps, component); + return emit(MOV(reg, src)); + } + return NULL; } void vec4_visitor::emit_urb_slot(dst_reg reg, int varying) { reg.type = BRW_REGISTER_TYPE_F; - output_reg[varying].type = reg.type; + output_reg[varying][0].type = reg.type; switch (varying) { case VARYING_SLOT_PSIZ: @@ -1300,13 +1306,13 @@ } case BRW_VARYING_SLOT_NDC: current_annotation = "NDC"; - if (output_reg[BRW_VARYING_SLOT_NDC].file != BAD_FILE) - emit(MOV(reg, src_reg(output_reg[BRW_VARYING_SLOT_NDC]))); + if (output_reg[BRW_VARYING_SLOT_NDC][0].file != BAD_FILE) + emit(MOV(reg, src_reg(output_reg[BRW_VARYING_SLOT_NDC][0]))); break; case VARYING_SLOT_POS: current_annotation = "gl_Position"; - if (output_reg[VARYING_SLOT_POS].file != BAD_FILE) - emit(MOV(reg, src_reg(output_reg[VARYING_SLOT_POS]))); + if (output_reg[VARYING_SLOT_POS][0].file != BAD_FILE) + emit(MOV(reg, src_reg(output_reg[VARYING_SLOT_POS][0]))); break; case VARYING_SLOT_EDGE: /* This is present when doing unfilled polygons. We're supposed to copy @@ -1323,13 +1329,15 @@ /* No need to write to this slot */ break; default: - emit_generic_urb_slot(reg, varying); + for (int i = 0; i < 4; i++) { + emit_generic_urb_slot(reg, varying, i); + } break; } } static int -align_interleaved_urb_mlen(const struct brw_device_info *devinfo, int mlen) +align_interleaved_urb_mlen(const struct gen_device_info *devinfo, int mlen) { if (devinfo->gen >= 6) { /* URB data written (does not include the message header reg) must @@ -1435,13 +1443,23 @@ message_header_scale *= 16; if (reladdr) { + /* A vec4 is 16 bytes and a dvec4 is 32 bytes so for doubles we have + * to multiply the reladdr by 2. Notice that the reg_offset part + * is in units of 16 bytes and is used to select the low/high 16-byte + * chunk of a full dvec4, so we don't want to multiply that part. + */ src_reg index = src_reg(this, glsl_type::int_type); - - emit_before(block, inst, ADD(dst_reg(index), *reladdr, - brw_imm_d(reg_offset))); - emit_before(block, inst, MUL(dst_reg(index), index, - brw_imm_d(message_header_scale))); - + if (type_sz(inst->dst.type) < 8) { + emit_before(block, inst, ADD(dst_reg(index), *reladdr, + brw_imm_d(reg_offset))); + emit_before(block, inst, MUL(dst_reg(index), index, + brw_imm_d(message_header_scale))); + } else { + emit_before(block, inst, MUL(dst_reg(index), *reladdr, + brw_imm_d(message_header_scale * 2))); + emit_before(block, inst, ADD(dst_reg(index), index, + brw_imm_d(reg_offset * message_header_scale))); + } return index; } else { return brw_imm_d(reg_offset * message_header_scale); @@ -1459,11 +1477,23 @@ dst_reg temp, src_reg orig_src, int base_offset) { - int reg_offset = base_offset + orig_src.reg_offset; + assert(orig_src.offset % REG_SIZE == 0); + int reg_offset = base_offset + orig_src.offset / REG_SIZE; src_reg index = get_scratch_offset(block, inst, orig_src.reladdr, reg_offset); - emit_before(block, inst, SCRATCH_READ(temp, index)); + if (type_sz(orig_src.type) < 8) { + emit_before(block, inst, SCRATCH_READ(temp, index)); + } else { + dst_reg shuffled = dst_reg(this, glsl_type::dvec4_type); + dst_reg shuffled_float = retype(shuffled, BRW_REGISTER_TYPE_F); + emit_before(block, inst, SCRATCH_READ(shuffled_float, index)); + index = get_scratch_offset(block, inst, orig_src.reladdr, reg_offset + 1); + vec4_instruction *last_read = + SCRATCH_READ(byte_offset(shuffled_float, REG_SIZE), index); + emit_before(block, inst, last_read); + shuffle_64bit_data(temp, src_reg(shuffled), false, block, last_read); + } } /** @@ -1476,7 +1506,8 @@ vec4_visitor::emit_scratch_write(bblock_t *block, vec4_instruction *inst, int base_offset) { - int reg_offset = base_offset + inst->dst.reg_offset; + assert(inst->dst.offset % REG_SIZE == 0); + int reg_offset = base_offset + inst->dst.offset / REG_SIZE; src_reg index = get_scratch_offset(block, inst, inst->dst.reladdr, reg_offset); @@ -1487,21 +1518,67 @@ * weren't initialized, it will confuse live interval analysis, which will * make spilling fail to make progress. */ - const src_reg temp = swizzle(retype(src_reg(this, glsl_type::vec4_type), + bool is_64bit = type_sz(inst->dst.type) == 8; + const glsl_type *alloc_type = + is_64bit ? glsl_type::dvec4_type : glsl_type::vec4_type; + const src_reg temp = swizzle(retype(src_reg(this, alloc_type), inst->dst.type), brw_swizzle_for_mask(inst->dst.writemask)); - dst_reg dst = dst_reg(brw_writemask(brw_vec8_grf(0, 0), - inst->dst.writemask)); - vec4_instruction *write = SCRATCH_WRITE(dst, temp, index); - if (inst->opcode != BRW_OPCODE_SEL) - write->predicate = inst->predicate; - write->ir = inst->ir; - write->annotation = inst->annotation; - inst->insert_after(block, write); + + if (!is_64bit) { + dst_reg dst = dst_reg(brw_writemask(brw_vec8_grf(0, 0), + inst->dst.writemask)); + vec4_instruction *write = SCRATCH_WRITE(dst, temp, index); + if (inst->opcode != BRW_OPCODE_SEL) + write->predicate = inst->predicate; + write->ir = inst->ir; + write->annotation = inst->annotation; + inst->insert_after(block, write); + } else { + dst_reg shuffled = dst_reg(this, alloc_type); + vec4_instruction *last = + shuffle_64bit_data(shuffled, temp, true, block, inst); + src_reg shuffled_float = src_reg(retype(shuffled, BRW_REGISTER_TYPE_F)); + + uint8_t mask = 0; + if (inst->dst.writemask & WRITEMASK_X) + mask |= WRITEMASK_XY; + if (inst->dst.writemask & WRITEMASK_Y) + mask |= WRITEMASK_ZW; + if (mask) { + dst_reg dst = dst_reg(brw_writemask(brw_vec8_grf(0, 0), mask)); + + vec4_instruction *write = SCRATCH_WRITE(dst, shuffled_float, index); + if (inst->opcode != BRW_OPCODE_SEL) + write->predicate = inst->predicate; + write->ir = inst->ir; + write->annotation = inst->annotation; + last->insert_after(block, write); + } + + mask = 0; + if (inst->dst.writemask & WRITEMASK_Z) + mask |= WRITEMASK_XY; + if (inst->dst.writemask & WRITEMASK_W) + mask |= WRITEMASK_ZW; + if (mask) { + dst_reg dst = dst_reg(brw_writemask(brw_vec8_grf(0, 0), mask)); + + src_reg index = get_scratch_offset(block, inst, inst->dst.reladdr, + reg_offset + 1); + vec4_instruction *write = + SCRATCH_WRITE(dst, byte_offset(shuffled_float, REG_SIZE), index); + if (inst->opcode != BRW_OPCODE_SEL) + write->predicate = inst->predicate; + write->ir = inst->ir; + write->annotation = inst->annotation; + last->insert_after(block, write); + } + } inst->dst.file = temp.file; inst->dst.nr = temp.nr; - inst->dst.reg_offset = temp.reg_offset; + inst->dst.offset %= REG_SIZE; inst->dst.reladdr = NULL; } @@ -1528,10 +1605,11 @@ /* Now handle scratch access on src */ if (src.file == VGRF && scratch_loc[src.nr] != -1) { - dst_reg temp = dst_reg(this, glsl_type::vec4_type); + dst_reg temp = dst_reg(this, type_sz(src.type) == 8 ? + glsl_type::dvec4_type : glsl_type::vec4_type); emit_scratch_read(block, inst, temp, src, scratch_loc[src.nr]); src.nr = temp.nr; - src.reg_offset = temp.reg_offset; + src.offset %= REG_SIZE; src.reladdr = NULL; } @@ -1624,32 +1702,57 @@ */ void vec4_visitor::emit_pull_constant_load(bblock_t *block, vec4_instruction *inst, - dst_reg temp, src_reg orig_src, + dst_reg temp, src_reg orig_src, int base_offset, src_reg indirect) { - int reg_offset = base_offset + orig_src.reg_offset; + assert(orig_src.offset % 16 == 0); const unsigned index = prog_data->base.binding_table.pull_constants_start; - src_reg offset; - if (indirect.file != BAD_FILE) { - offset = src_reg(this, glsl_type::uint_type); - - emit_before(block, inst, ADD(dst_reg(offset), indirect, - brw_imm_ud(reg_offset * 16))); - } else if (devinfo->gen >= 8) { - /* Store the offset in a GRF so we can send-from-GRF. */ - offset = src_reg(this, glsl_type::uint_type); - emit_before(block, inst, MOV(dst_reg(offset), brw_imm_ud(reg_offset * 16))); - } else { - offset = brw_imm_d(reg_offset * 16); - } + /* For 64bit loads we need to emit two 32-bit load messages and we also + * we need to shuffle the 32-bit data result into proper 64-bit data. To do + * that we emit the 32-bit loads into a temporary and we shuffle the result + * into the original destination. + */ + dst_reg orig_temp = temp; + bool is_64bit = type_sz(orig_src.type) == 8; + if (is_64bit) { + assert(type_sz(temp.type) == 8); + dst_reg temp_df = dst_reg(this, glsl_type::dvec4_type); + temp = retype(temp_df, BRW_REGISTER_TYPE_F); + } + + src_reg src = orig_src; + for (int i = 0; i < (is_64bit ? 2 : 1); i++) { + int reg_offset = base_offset + src.offset / 16; + + src_reg offset; + if (indirect.file != BAD_FILE) { + offset = src_reg(this, glsl_type::uint_type); + emit_before(block, inst, ADD(dst_reg(offset), indirect, + brw_imm_ud(reg_offset * 16))); + } else if (devinfo->gen >= 8) { + /* Store the offset in a GRF so we can send-from-GRF. */ + offset = src_reg(this, glsl_type::uint_type); + emit_before(block, inst, MOV(dst_reg(offset), + brw_imm_ud(reg_offset * 16))); + } else { + offset = brw_imm_d(reg_offset * 16); + } - emit_pull_constant_load_reg(temp, - brw_imm_ud(index), - offset, - block, inst); + emit_pull_constant_load_reg(byte_offset(temp, i * REG_SIZE), + brw_imm_ud(index), + offset, + block, inst); + + src = byte_offset(src, 16); + } brw_mark_surface_used(&prog_data->base, index); + + if (is_64bit) { + temp = retype(temp, BRW_REGISTER_TYPE_DF); + shuffle_64bit_data(orig_temp, src_reg(temp), false, block, inst); + } } /** @@ -1688,7 +1791,7 @@ inst->src[0].file != UNIFORM) continue; - int uniform_nr = inst->src[0].nr + inst->src[0].reg_offset; + int uniform_nr = inst->src[0].nr + inst->src[0].offset / 16; for (unsigned j = 0; j < DIV_ROUND_UP(inst->src[2].ud, 16); j++) pull_constant_loc[uniform_nr + j] = 0; @@ -1718,7 +1821,7 @@ inst->src[0].file != UNIFORM) continue; - int uniform_nr = inst->src[0].nr + inst->src[0].reg_offset; + int uniform_nr = inst->src[0].nr + inst->src[0].offset / 16; assert(inst->src[0].swizzle == BRW_SWIZZLE_NOOP); @@ -1771,6 +1874,8 @@ this->current_annotation = NULL; memset(this->output_reg_annotation, 0, sizeof(this->output_reg_annotation)); + memset(this->output_num_components, 0, sizeof(this->output_num_components)); + this->virtual_grf_start = NULL; this->virtual_grf_end = NULL; this->live_intervals = NULL; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_vs_visitor.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_vs_visitor.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vec4_vs_visitor.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vec4_vs_visitor.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -104,7 +104,7 @@ vec4_vs_visitor::emit_urb_slot(dst_reg reg, int varying) { reg.type = BRW_REGISTER_TYPE_F; - output_reg[varying].type = reg.type; + output_reg[varying][0].type = reg.type; switch (varying) { case VARYING_SLOT_COL0: @@ -115,7 +115,7 @@ * and we only support GS in core profile. So, this must be a vertex * shader. */ - vec4_instruction *inst = emit_generic_urb_slot(reg, varying); + vec4_instruction *inst = emit_generic_urb_slot(reg, varying, 0); if (inst && key->clamp_vertex_color) inst->saturate = true; break; @@ -150,7 +150,7 @@ ++i) { reg.writemask = 1 << i; emit(DP4(reg, - src_reg(output_reg[clip_vertex]), + src_reg(output_reg[clip_vertex][0]), src_reg(this->userplane[i + offset]))); } } @@ -180,11 +180,15 @@ if (key->nr_userclip_plane_consts > 0) { current_annotation = "user clip distances"; - output_reg[VARYING_SLOT_CLIP_DIST0] = dst_reg(this, glsl_type::vec4_type); - output_reg[VARYING_SLOT_CLIP_DIST1] = dst_reg(this, glsl_type::vec4_type); + output_reg[VARYING_SLOT_CLIP_DIST0][0] = + dst_reg(this, glsl_type::vec4_type); + output_reg[VARYING_SLOT_CLIP_DIST1][0] = + dst_reg(this, glsl_type::vec4_type); + output_num_components[VARYING_SLOT_CLIP_DIST0][0] = 4; + output_num_components[VARYING_SLOT_CLIP_DIST1][0] = 4; - emit_clip_distances(output_reg[VARYING_SLOT_CLIP_DIST0], 0); - emit_clip_distances(output_reg[VARYING_SLOT_CLIP_DIST1], 4); + emit_clip_distances(output_reg[VARYING_SLOT_CLIP_DIST0][0], 0); + emit_clip_distances(output_reg[VARYING_SLOT_CLIP_DIST1][0], 4); } /* For VS, we always end the thread by emitting a single vertex. diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vs.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vs.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vs.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vs.c 2017-06-01 10:37:10.000000000 +0000 @@ -43,47 +43,121 @@ #include "util/ralloc.h" -bool +GLbitfield64 +brw_vs_outputs_written(struct brw_context *brw, struct brw_vs_prog_key *key, + GLbitfield64 user_varyings) +{ + GLbitfield64 outputs_written = user_varyings; + + if (key->copy_edgeflag) { + outputs_written |= BITFIELD64_BIT(VARYING_SLOT_EDGE); + } + + if (brw->gen < 6) { + /* Put dummy slots into the VUE for the SF to put the replaced + * point sprite coords in. We shouldn't need these dummy slots, + * which take up precious URB space, but it would mean that the SF + * doesn't get nice aligned pairs of input coords into output + * coords, which would be a pain to handle. + */ + for (unsigned i = 0; i < 8; i++) { + if (key->point_coord_replace & (1 << i)) + outputs_written |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + i); + } + + /* if back colors are written, allocate slots for front colors too */ + if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC0)) + outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL0); + if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC1)) + outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL1); + } + + /* In order for legacy clipping to work, we need to populate the clip + * distance varying slots whenever clipping is enabled, even if the vertex + * shader doesn't write to gl_ClipDistance. + */ + if (key->nr_userclip_plane_consts > 0) { + outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0); + outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1); + } + + return outputs_written; +} + +static void +brw_vs_debug_recompile(struct brw_context *brw, struct gl_program *prog, + const struct brw_vs_prog_key *key) +{ + perf_debug("Recompiling vertex shader for program %d\n", prog->Id); + + bool found = false; + const struct brw_vs_prog_key *old_key = + brw_find_previous_compile(&brw->cache, BRW_CACHE_VS_PROG, + key->program_string_id); + + if (!old_key) { + perf_debug(" Didn't find previous compile in the shader cache for " + "debug\n"); + return; + } + + for (unsigned int i = 0; i < VERT_ATTRIB_MAX; i++) { + found |= key_debug(brw, "Vertex attrib w/a flags", + old_key->gl_attrib_wa_flags[i], + key->gl_attrib_wa_flags[i]); + } + + found |= key_debug(brw, "legacy user clipping", + old_key->nr_userclip_plane_consts, + key->nr_userclip_plane_consts); + + found |= key_debug(brw, "copy edgeflag", + old_key->copy_edgeflag, key->copy_edgeflag); + found |= key_debug(brw, "PointCoord replace", + old_key->point_coord_replace, key->point_coord_replace); + found |= key_debug(brw, "vertex color clamping", + old_key->clamp_vertex_color, key->clamp_vertex_color); + + found |= brw_debug_recompile_sampler_key(brw, &old_key->tex, &key->tex); + + if (!found) { + perf_debug(" Something else\n"); + } +} + +static bool brw_codegen_vs_prog(struct brw_context *brw, - struct gl_shader_program *prog, - struct brw_vertex_program *vp, + struct brw_program *vp, struct brw_vs_prog_key *key) { - const struct brw_compiler *compiler = brw->intelScreen->compiler; + const struct brw_compiler *compiler = brw->screen->compiler; + const struct gen_device_info *devinfo = &brw->screen->devinfo; GLuint program_size; const GLuint *program; struct brw_vs_prog_data prog_data; struct brw_stage_prog_data *stage_prog_data = &prog_data.base.base; void *mem_ctx; - int i; - struct brw_shader *vs = NULL; bool start_busy = false; double start_time = 0; - if (prog) - vs = (struct brw_shader *) prog->_LinkedShaders[MESA_SHADER_VERTEX]; - memset(&prog_data, 0, sizeof(prog_data)); /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */ - if (!prog) + if (vp->program.is_arb_asm) stage_prog_data->use_alt_mode = true; mem_ctx = ralloc_context(NULL); - brw_assign_common_binding_table_offsets(MESA_SHADER_VERTEX, - brw->intelScreen->devinfo, - prog, &vp->program.Base, + brw_assign_common_binding_table_offsets(devinfo, &vp->program, &prog_data.base.base, 0); /* Allocate the references to the uniforms that will end up in the * prog_data associated with the compiled program, and which will be freed * by the state cache. */ - int param_count = vp->program.Base.nir->num_uniforms / 4; + int param_count = vp->program.nir->num_uniforms / 4; - if (vs) - prog_data.base.base.nr_image_params = vs->base.NumImages; + prog_data.base.base.nr_image_params = vp->program.info.num_images; /* vec4_visitor::setup_uniform_clipplane_values() also uploads user clip * planes as uniforms. @@ -99,64 +173,30 @@ stage_prog_data->nr_image_params); stage_prog_data->nr_params = param_count; - if (prog) { - brw_nir_setup_glsl_uniforms(vp->program.Base.nir, prog, &vp->program.Base, + if (!vp->program.is_arb_asm) { + brw_nir_setup_glsl_uniforms(vp->program.nir, &vp->program, &prog_data.base.base, compiler->scalar_stage[MESA_SHADER_VERTEX]); } else { - brw_nir_setup_arb_uniforms(vp->program.Base.nir, &vp->program.Base, + brw_nir_setup_arb_uniforms(vp->program.nir, &vp->program, &prog_data.base.base); } - GLbitfield64 outputs_written = vp->program.Base.OutputsWritten; - prog_data.inputs_read = vp->program.Base.InputsRead; + uint64_t outputs_written = + brw_vs_outputs_written(brw, key, vp->program.info.outputs_written); + prog_data.inputs_read = vp->program.info.inputs_read; + prog_data.double_inputs_read = vp->program.info.double_inputs_read; if (key->copy_edgeflag) { - outputs_written |= BITFIELD64_BIT(VARYING_SLOT_EDGE); prog_data.inputs_read |= VERT_BIT_EDGEFLAG; } - prog_data.base.cull_distance_mask = - ((1 << vp->program.Base.CullDistanceArraySize) - 1) << - vp->program.Base.ClipDistanceArraySize; - - if (brw->gen < 6) { - /* Put dummy slots into the VUE for the SF to put the replaced - * point sprite coords in. We shouldn't need these dummy slots, - * which take up precious URB space, but it would mean that the SF - * doesn't get nice aligned pairs of input coords into output - * coords, which would be a pain to handle. - */ - for (i = 0; i < 8; i++) { - if (key->point_coord_replace & (1 << i)) - outputs_written |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + i); - } - - /* if back colors are written, allocate slots for front colors too */ - if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC0)) - outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL0); - if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC1)) - outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL1); - } - - /* In order for legacy clipping to work, we need to populate the clip - * distance varying slots whenever clipping is enabled, even if the vertex - * shader doesn't write to gl_ClipDistance. - */ - if (key->nr_userclip_plane_consts > 0) { - outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0); - outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1); - } - - brw_compute_vue_map(brw->intelScreen->devinfo, + brw_compute_vue_map(devinfo, &prog_data.base.vue_map, outputs_written, - prog ? prog->SeparateShader || - prog->_LinkedShaders[MESA_SHADER_TESS_EVAL] - : false); + vp->program.nir->info->separate_shader); if (0) { - _mesa_fprint_program_opt(stderr, &vp->program.Base, PROG_PRINT_DEBUG, - true); + _mesa_fprint_program_opt(stderr, &vp->program, PROG_PRINT_DEBUG, true); } if (unlikely(brw->perf_debug)) { @@ -166,28 +206,28 @@ } if (unlikely(INTEL_DEBUG & DEBUG_VS)) { - brw_dump_ir("vertex", prog, vs ? &vs->base : NULL, &vp->program.Base); - - fprintf(stderr, "VS Output "); - brw_print_vue_map(stderr, &prog_data.base.vue_map); + if (vp->program.is_arb_asm) + brw_dump_arb_asm("vertex", &vp->program); } int st_index = -1; - if (INTEL_DEBUG & DEBUG_SHADER_TIME) - st_index = brw_get_shader_time_index(brw, prog, &vp->program.Base, ST_VS); + if (INTEL_DEBUG & DEBUG_SHADER_TIME) { + st_index = brw_get_shader_time_index(brw, &vp->program, ST_VS, + !vp->program.is_arb_asm); + } /* Emit GEN4 code. */ char *error_str; - program = brw_compile_vs(compiler, brw, mem_ctx, key, - &prog_data, vp->program.Base.nir, + program = brw_compile_vs(compiler, brw, mem_ctx, key, &prog_data, + vp->program.nir, brw_select_clip_planes(&brw->ctx), !_mesa_is_gles3(&brw->ctx), st_index, &program_size, &error_str); if (program == NULL) { - if (prog) { - prog->LinkStatus = false; - ralloc_strcat(&prog->InfoLog, error_str); + if (!vp->program.is_arb_asm) { + vp->program.sh.data->LinkStatus = false; + ralloc_strcat(&vp->program.sh.data->InfoLog, error_str); } _mesa_problem(NULL, "Failed to compile vertex shader: %s\n", error_str); @@ -196,86 +236,32 @@ return false; } - if (unlikely(brw->perf_debug) && vs) { - if (vs->compiled_once) { - brw_vs_debug_recompile(brw, prog, key); + if (unlikely(brw->perf_debug)) { + if (vp->compiled_once) { + brw_vs_debug_recompile(brw, &vp->program, key); } if (start_busy && !drm_intel_bo_busy(brw->batch.last_bo)) { perf_debug("VS compile took %.03f ms and stalled the GPU\n", (get_time() - start_time) * 1000); } - vs->compiled_once = true; + vp->compiled_once = true; } /* Scratch space is used for register spilling */ brw_alloc_stage_scratch(brw, &brw->vs.base, prog_data.base.base.total_scratch, - brw->max_vs_threads); + devinfo->max_vs_threads); brw_upload_cache(&brw->cache, BRW_CACHE_VS_PROG, key, sizeof(struct brw_vs_prog_key), program, program_size, &prog_data, sizeof(prog_data), - &brw->vs.base.prog_offset, &brw->vs.prog_data); + &brw->vs.base.prog_offset, &brw->vs.base.prog_data); ralloc_free(mem_ctx); return true; } -void -brw_vs_debug_recompile(struct brw_context *brw, - struct gl_shader_program *prog, - const struct brw_vs_prog_key *key) -{ - struct brw_cache_item *c = NULL; - const struct brw_vs_prog_key *old_key = NULL; - bool found = false; - - perf_debug("Recompiling vertex shader for program %d\n", prog->Name); - - for (unsigned int i = 0; i < brw->cache.size; i++) { - for (c = brw->cache.items[i]; c; c = c->next) { - if (c->cache_id == BRW_CACHE_VS_PROG) { - old_key = c->key; - - if (old_key->program_string_id == key->program_string_id) - break; - } - } - if (c) - break; - } - - if (!c) { - perf_debug(" Didn't find previous compile in the shader cache for " - "debug\n"); - return; - } - - for (unsigned int i = 0; i < VERT_ATTRIB_MAX; i++) { - found |= key_debug(brw, "Vertex attrib w/a flags", - old_key->gl_attrib_wa_flags[i], - key->gl_attrib_wa_flags[i]); - } - - found |= key_debug(brw, "legacy user clipping", - old_key->nr_userclip_plane_consts, - key->nr_userclip_plane_consts); - - found |= key_debug(brw, "copy edgeflag", - old_key->copy_edgeflag, key->copy_edgeflag); - found |= key_debug(brw, "PointCoord replace", - old_key->point_coord_replace, key->point_coord_replace); - found |= key_debug(brw, "vertex color clamping", - old_key->clamp_vertex_color, key->clamp_vertex_color); - - found |= brw_debug_recompile_sampler_key(brw, &old_key->tex, &key->tex); - - if (!found) { - perf_debug(" Something else\n"); - } -} - static bool brw_vs_state_dirty(const struct brw_context *brw) { @@ -290,16 +276,14 @@ BRW_NEW_VS_ATTRIB_WORKAROUNDS); } -static void +void brw_vs_populate_key(struct brw_context *brw, struct brw_vs_prog_key *key) { struct gl_context *ctx = &brw->ctx; /* BRW_NEW_VERTEX_PROGRAM */ - struct brw_vertex_program *vp = - (struct brw_vertex_program *)brw->vertex_program; + struct brw_program *vp = (struct brw_program *)brw->vertex_program; struct gl_program *prog = (struct gl_program *) brw->vertex_program; - int i; memset(key, 0, sizeof(*key)); @@ -309,51 +293,46 @@ key->program_string_id = vp->id; if (ctx->Transform.ClipPlanesEnabled != 0 && - (ctx->API == API_OPENGL_COMPAT || - ctx->API == API_OPENGLES) && - vp->program.Base.ClipDistanceArraySize == 0) { + (ctx->API == API_OPENGL_COMPAT || ctx->API == API_OPENGLES) && + vp->program.ClipDistanceArraySize == 0) { key->nr_userclip_plane_consts = _mesa_logbase2(ctx->Transform.ClipPlanesEnabled) + 1; } - /* _NEW_POLYGON */ if (brw->gen < 6) { + /* _NEW_POLYGON */ key->copy_edgeflag = (ctx->Polygon.FrontMode != GL_FILL || ctx->Polygon.BackMode != GL_FILL); + + /* _NEW_POINT */ + if (ctx->Point.PointSprite) { + key->point_coord_replace = ctx->Point.CoordReplace & 0xff; + } } - if (prog->OutputsWritten & (VARYING_BIT_COL0 | VARYING_BIT_COL1 | - VARYING_BIT_BFC0 | VARYING_BIT_BFC1)) { + if (prog->nir->info->outputs_written & + (VARYING_BIT_COL0 | VARYING_BIT_COL1 | VARYING_BIT_BFC0 | + VARYING_BIT_BFC1)) { /* _NEW_LIGHT | _NEW_BUFFERS */ key->clamp_vertex_color = ctx->Light._ClampVertexColor; } - /* _NEW_POINT */ - if (brw->gen < 6 && ctx->Point.PointSprite) { - for (i = 0; i < 8; i++) { - if (ctx->Point.CoordReplace[i]) - key->point_coord_replace |= (1 << i); - } - } - /* _NEW_TEXTURE */ - brw_populate_sampler_prog_key_data(ctx, prog, brw->vs.base.sampler_count, - &key->tex); + brw_populate_sampler_prog_key_data(ctx, prog, &key->tex); /* BRW_NEW_VS_ATTRIB_WORKAROUNDS */ - memcpy(key->gl_attrib_wa_flags, brw->vb.attrib_wa_flags, - sizeof(brw->vb.attrib_wa_flags)); + if (brw->gen < 8 && !brw->is_haswell) { + memcpy(key->gl_attrib_wa_flags, brw->vb.attrib_wa_flags, + sizeof(brw->vb.attrib_wa_flags)); + } } void brw_upload_vs_prog(struct brw_context *brw) { - struct gl_context *ctx = &brw->ctx; - struct gl_shader_program **current = ctx->_Shader->CurrentProgram; struct brw_vs_prog_key key; /* BRW_NEW_VERTEX_PROGRAM */ - struct brw_vertex_program *vp = - (struct brw_vertex_program *)brw->vertex_program; + struct brw_program *vp = (struct brw_program *)brw->vertex_program; if (!brw_vs_state_dirty(brw)) return; @@ -362,41 +341,37 @@ if (!brw_search_cache(&brw->cache, BRW_CACHE_VS_PROG, &key, sizeof(key), - &brw->vs.base.prog_offset, &brw->vs.prog_data)) { - bool success = brw_codegen_vs_prog(brw, current[MESA_SHADER_VERTEX], - vp, &key); + &brw->vs.base.prog_offset, &brw->vs.base.prog_data)) { + bool success = brw_codegen_vs_prog(brw, vp, &key); (void) success; assert(success); } - brw->vs.base.prog_data = &brw->vs.prog_data->base.base; } bool -brw_vs_precompile(struct gl_context *ctx, - struct gl_shader_program *shader_prog, - struct gl_program *prog) +brw_vs_precompile(struct gl_context *ctx, struct gl_program *prog) { struct brw_context *brw = brw_context(ctx); struct brw_vs_prog_key key; uint32_t old_prog_offset = brw->vs.base.prog_offset; - struct brw_vs_prog_data *old_prog_data = brw->vs.prog_data; + struct brw_stage_prog_data *old_prog_data = brw->vs.base.prog_data; bool success; - struct gl_vertex_program *vp = (struct gl_vertex_program *) prog; - struct brw_vertex_program *bvp = brw_vertex_program(vp); + struct brw_program *bvp = brw_program(prog); memset(&key, 0, sizeof(key)); brw_setup_tex_for_precompile(brw, &key.tex, prog); key.program_string_id = bvp->id; key.clamp_vertex_color = - (prog->OutputsWritten & (VARYING_BIT_COL0 | VARYING_BIT_COL1 | - VARYING_BIT_BFC0 | VARYING_BIT_BFC1)); + (prog->nir->info->outputs_written & + (VARYING_BIT_COL0 | VARYING_BIT_COL1 | VARYING_BIT_BFC0 | + VARYING_BIT_BFC1)); - success = brw_codegen_vs_prog(brw, shader_prog, bvp, &key); + success = brw_codegen_vs_prog(brw, bvp, &key); brw->vs.base.prog_offset = old_prog_offset; - brw->vs.prog_data = old_prog_data; + brw->vs.base.prog_data = old_prog_data; return success; } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vs.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vs.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vs.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vs.h 2017-06-01 10:37:10.000000000 +0000 @@ -51,17 +51,15 @@ extern "C" { #endif -void brw_vs_debug_recompile(struct brw_context *brw, - struct gl_shader_program *prog, - const struct brw_vs_prog_key *key); +GLbitfield64 +brw_vs_outputs_written(struct brw_context *brw, struct brw_vs_prog_key *key, + GLbitfield64 outputs_written); void brw_upload_vs_prog(struct brw_context *brw); -bool -brw_codegen_vs_prog(struct brw_context *brw, - struct gl_shader_program *prog, - struct brw_vertex_program *vp, +void +brw_vs_populate_key(struct brw_context *brw, struct brw_vs_prog_key *key); #ifdef __cplusplus diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vs_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vs_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vs_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vs_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -39,7 +39,11 @@ static void brw_upload_vs_unit(struct brw_context *brw) { + const struct gen_device_info *devinfo = &brw->screen->devinfo; struct brw_stage_state *stage_state = &brw->vs.base; + const struct brw_stage_prog_data *prog_data = stage_state->prog_data; + const struct brw_vue_prog_data *vue_prog_data = + brw_vue_prog_data(stage_state->prog_data); struct brw_vs_unit_state *vs; @@ -48,8 +52,7 @@ memset(vs, 0, sizeof(*vs)); /* BRW_NEW_PROGRAM_CACHE | BRW_NEW_VS_PROG_DATA */ - vs->thread0.grf_reg_count = - ALIGN(brw->vs.prog_data->base.total_grf, 16) / 16 - 1; + vs->thread0.grf_reg_count = ALIGN(vue_prog_data->total_grf, 16) / 16 - 1; vs->thread0.kernel_start_pointer = brw_program_reloc(brw, stage_state->state_offset + @@ -57,7 +60,7 @@ stage_state->prog_offset + (vs->thread0.grf_reg_count << 1)) >> 6; - if (brw->vs.prog_data->base.base.use_alt_mode) + if (prog_data->use_alt_mode) vs->thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754; else vs->thread1.floating_point_mode = BRW_FLOATING_POINT_IEEE_754; @@ -77,9 +80,9 @@ vs->thread1.single_program_flow = (brw->gen == 5); vs->thread1.binding_table_entry_count = - brw->vs.prog_data->base.base.binding_table.size_bytes / 4; + prog_data->binding_table.size_bytes / 4; - if (brw->vs.prog_data->base.base.total_scratch != 0) { + if (prog_data->total_scratch != 0) { vs->thread2.scratch_space_base_pointer = stage_state->scratch_bo->offset64 >> 10; /* reloc */ vs->thread2.per_thread_scratch_space = @@ -89,11 +92,9 @@ vs->thread2.per_thread_scratch_space = 0; } - vs->thread3.urb_entry_read_length = brw->vs.prog_data->base.urb_read_length; - vs->thread3.const_urb_entry_read_length - = brw->vs.prog_data->base.base.curb_read_length; - vs->thread3.dispatch_grf_start_reg = - brw->vs.prog_data->base.base.dispatch_grf_start_reg; + vs->thread3.urb_entry_read_length = vue_prog_data->urb_read_length; + vs->thread3.const_urb_entry_read_length = prog_data->curb_read_length; + vs->thread3.dispatch_grf_start_reg = prog_data->dispatch_grf_start_reg; vs->thread3.urb_entry_read_offset = 0; /* BRW_NEW_CURBE_OFFSETS */ @@ -137,7 +138,7 @@ vs->thread4.urb_entry_allocation_size = brw->urb.vsize - 1; vs->thread4.max_threads = CLAMP(brw->urb.nr_vs_entries / 2, - 1, brw->max_vs_threads) - 1; + 1, devinfo->max_vs_threads) - 1; if (brw->gen == 5) vs->vs5.sampler_count = 0; /* hardware requirement */ @@ -169,7 +170,7 @@ } /* Emit scratch space relocation */ - if (brw->vs.prog_data->base.base.total_scratch != 0) { + if (prog_data->total_scratch != 0) { drm_intel_bo_emit_reloc(brw->batch.bo, stage_state->state_offset + offsetof(struct brw_vs_unit_state, thread2), diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vs_surface_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vs_surface_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vs_surface_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vs_surface_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -31,6 +31,7 @@ #include "main/mtypes.h" #include "program/prog_parameter.h" +#include "main/shaderapi.h" #include "brw_context.h" #include "brw_state.h" @@ -112,14 +113,14 @@ struct brw_stage_state *stage_state = &brw->vs.base; /* BRW_NEW_VERTEX_PROGRAM */ - struct brw_vertex_program *vp = - (struct brw_vertex_program *) brw->vertex_program; + struct brw_program *vp = (struct brw_program *) brw->vertex_program; /* BRW_NEW_VS_PROG_DATA */ - const struct brw_stage_prog_data *prog_data = &brw->vs.prog_data->base.base; + const struct brw_stage_prog_data *prog_data = brw->vs.base.prog_data; + _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_VERTEX); /* _NEW_PROGRAM_CONSTANTS */ - brw_upload_pull_constants(brw, BRW_NEW_VS_CONSTBUF, &vp->program.Base, + brw_upload_pull_constants(brw, BRW_NEW_VS_CONSTBUF, &vp->program, stage_state, prog_data); } @@ -142,12 +143,12 @@ struct gl_shader_program *prog = ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX]; - if (!prog) + if (!prog || !prog->_LinkedShaders[MESA_SHADER_VERTEX]) return; /* BRW_NEW_VS_PROG_DATA */ - brw_upload_ubo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_VERTEX], - &brw->vs.base, &brw->vs.prog_data->base.base); + brw_upload_ubo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_VERTEX]->Program, + &brw->vs.base, brw->vs.base.prog_data); } const struct brw_tracked_state brw_vs_ubo_surfaces = { @@ -164,15 +165,12 @@ static void brw_upload_vs_abo_surfaces(struct brw_context *brw) { - struct gl_context *ctx = &brw->ctx; /* _NEW_PROGRAM */ - struct gl_shader_program *prog = - ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX]; + const struct gl_program *vp = brw->vertex_program; - if (prog) { + if (vp) { /* BRW_NEW_VS_PROG_DATA */ - brw_upload_abo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_VERTEX], - &brw->vs.base, &brw->vs.prog_data->base.base); + brw_upload_abo_surfaces(brw, vp, &brw->vs.base, brw->vs.base.prog_data); } } @@ -190,15 +188,13 @@ static void brw_upload_vs_image_surfaces(struct brw_context *brw) { - struct gl_context *ctx = &brw->ctx; /* BRW_NEW_VERTEX_PROGRAM */ - struct gl_shader_program *prog = - ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX]; + const struct gl_program *vp = brw->vertex_program; - if (prog) { + if (vp) { /* BRW_NEW_VS_PROG_DATA, BRW_NEW_IMAGE_UNITS, _NEW_TEXTURE */ - brw_upload_image_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_VERTEX], - &brw->vs.base, &brw->vs.prog_data->base.base); + brw_upload_image_surfaces(brw, vp, &brw->vs.base, + brw->vs.base.prog_data); } } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vue_map.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vue_map.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_vue_map.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_vue_map.c 2017-06-01 10:37:10.000000000 +0000 @@ -56,7 +56,7 @@ * Compute the VUE map for a shader stage. */ void -brw_compute_vue_map(const struct brw_device_info *devinfo, +brw_compute_vue_map(const struct gen_device_info *devinfo, struct brw_vue_map *vue_map, GLbitfield64 slots_valid, bool separate) @@ -68,6 +68,19 @@ if (devinfo->gen < 6) separate = false; + if (separate) { + /* In SSO mode, we don't know whether the adjacent stage will + * read/write gl_ClipDistance, which has a fixed slot location. + * We have to assume the worst and reserve a slot for it, or else + * the rest of our varyings will be off by a slot. + * + * Note that we don't have to worry about COL/BFC, as those built-in + * variables only exist in legacy GL, which only supports VS and FS. + */ + slots_valid |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0); + slots_valid |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1); + } + vue_map->slots_valid = slots_valid; vue_map->separate = separate; @@ -168,14 +181,12 @@ const int varying = ffsll(generics) - 1; if (separate) { slot = first_generic_slot + varying - VARYING_SLOT_VAR0; - assign_vue_slot(vue_map, varying, slot); - } else { - assign_vue_slot(vue_map, varying, slot++); } + assign_vue_slot(vue_map, varying, slot++); generics &= ~BITFIELD64_BIT(varying); } - vue_map->num_slots = separate ? slot + 1 : slot; + vue_map->num_slots = slot; vue_map->num_per_vertex_slots = 0; vue_map->num_per_patch_slots = 0; } @@ -192,6 +203,9 @@ /* I don't think anything actually uses this... */ vue_map->slots_valid = vertex_slots; + /* separate isn't really meaningful, but make sure it's initialized */ + vue_map->separate = false; + vertex_slots &= ~(VARYING_BIT_TESS_LEVEL_OUTER | VARYING_BIT_TESS_LEVEL_INNER); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_wm.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_wm.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_wm.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_wm.c 2017-06-01 10:37:10.000000000 +0000 @@ -42,8 +42,7 @@ #include "util/ralloc.h" static void -assign_fs_binding_table_offsets(const struct brw_device_info *devinfo, - const struct gl_shader_program *shader_prog, +assign_fs_binding_table_offsets(const struct gen_device_info *devinfo, const struct gl_program *prog, const struct brw_wm_prog_key *key, struct brw_wm_prog_data *prog_data) @@ -56,9 +55,64 @@ prog_data->binding_table.render_target_start = next_binding_table_offset; next_binding_table_offset += MAX2(key->nr_color_regions, 1); - brw_assign_common_binding_table_offsets(MESA_SHADER_FRAGMENT, devinfo, - shader_prog, prog, &prog_data->base, - next_binding_table_offset); + next_binding_table_offset = + brw_assign_common_binding_table_offsets(devinfo, prog, &prog_data->base, + next_binding_table_offset); + + if (prog->nir->info->outputs_read && !key->coherent_fb_fetch) { + prog_data->binding_table.render_target_read_start = + next_binding_table_offset; + next_binding_table_offset += key->nr_color_regions; + } +} + +static void +brw_wm_debug_recompile(struct brw_context *brw, struct gl_program *prog, + const struct brw_wm_prog_key *key) +{ + perf_debug("Recompiling fragment shader for program %d\n", prog->Id); + + bool found = false; + const struct brw_wm_prog_key *old_key = + brw_find_previous_compile(&brw->cache, BRW_CACHE_FS_PROG, + key->program_string_id); + + if (!old_key) { + perf_debug(" Didn't find previous compile in the shader cache for debug\n"); + return; + } + + found |= key_debug(brw, "alphatest, computed depth, depth test, or " + "depth write", + old_key->iz_lookup, key->iz_lookup); + found |= key_debug(brw, "depth statistics", + old_key->stats_wm, key->stats_wm); + found |= key_debug(brw, "flat shading", + old_key->flat_shade, key->flat_shade); + found |= key_debug(brw, "per-sample interpolation", + old_key->persample_interp, key->persample_interp); + found |= key_debug(brw, "number of color buffers", + old_key->nr_color_regions, key->nr_color_regions); + found |= key_debug(brw, "MRT alpha test or alpha-to-coverage", + old_key->replicate_alpha, key->replicate_alpha); + found |= key_debug(brw, "fragment color clamping", + old_key->clamp_fragment_color, key->clamp_fragment_color); + found |= key_debug(brw, "multisampled FBO", + old_key->multisample_fbo, key->multisample_fbo); + found |= key_debug(brw, "line smoothing", + old_key->line_aa, key->line_aa); + found |= key_debug(brw, "input slots valid", + old_key->input_slots_valid, key->input_slots_valid); + found |= key_debug(brw, "mrt alpha test function", + old_key->alpha_test_func, key->alpha_test_func); + found |= key_debug(brw, "mrt alpha test reference value", + old_key->alpha_test_ref, key->alpha_test_ref); + + found |= brw_debug_recompile_sampler_key(brw, &old_key->tex, &key->tex); + + if (!found) { + perf_debug(" Something else\n"); + } } /** @@ -66,40 +120,35 @@ * Depending on the instructions used (i.e. flow control instructions) * we'll use one of two code generators. */ -bool +static bool brw_codegen_wm_prog(struct brw_context *brw, - struct gl_shader_program *prog, - struct brw_fragment_program *fp, - struct brw_wm_prog_key *key) + struct brw_program *fp, + struct brw_wm_prog_key *key, + struct brw_vue_map *vue_map) { + const struct gen_device_info *devinfo = &brw->screen->devinfo; struct gl_context *ctx = &brw->ctx; void *mem_ctx = ralloc_context(NULL); struct brw_wm_prog_data prog_data; const GLuint *program; - struct brw_shader *fs = NULL; GLuint program_size; bool start_busy = false; double start_time = 0; - if (prog) - fs = (struct brw_shader *)prog->_LinkedShaders[MESA_SHADER_FRAGMENT]; - memset(&prog_data, 0, sizeof(prog_data)); /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */ - if (!prog) + if (fp->program.is_arb_asm) prog_data.base.use_alt_mode = true; - assign_fs_binding_table_offsets(brw->intelScreen->devinfo, prog, - &fp->program.Base, key, &prog_data); + assign_fs_binding_table_offsets(devinfo, &fp->program, key, &prog_data); /* Allocate the references to the uniforms that will end up in the * prog_data associated with the compiled program, and which will be freed * by the state cache. */ - int param_count = fp->program.Base.nir->num_uniforms / 4; - if (fs) - prog_data.base.nr_image_params = fs->base.NumImages; + int param_count = fp->program.nir->num_uniforms / 4; + prog_data.base.nr_image_params = fp->program.info.num_images; /* The backend also sometimes adds params for texture size. */ param_count += 2 * ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits; prog_data.base.param = @@ -111,12 +160,15 @@ prog_data.base.nr_image_params); prog_data.base.nr_params = param_count; - if (prog) { - brw_nir_setup_glsl_uniforms(fp->program.Base.nir, prog, &fp->program.Base, + if (!fp->program.is_arb_asm) { + brw_nir_setup_glsl_uniforms(fp->program.nir, &fp->program, &prog_data.base, true); } else { - brw_nir_setup_arb_uniforms(fp->program.Base.nir, &fp->program.Base, + brw_nir_setup_arb_uniforms(fp->program.nir, &fp->program, &prog_data.base); + + if (unlikely(INTEL_DEBUG & DEBUG_WM)) + brw_dump_arb_asm("fragment", &fp->program); } if (unlikely(brw->perf_debug)) { @@ -125,25 +177,25 @@ start_time = get_time(); } - if (unlikely(INTEL_DEBUG & DEBUG_WM)) - brw_dump_ir("fragment", prog, fs ? &fs->base : NULL, &fp->program.Base); - int st_index8 = -1, st_index16 = -1; if (INTEL_DEBUG & DEBUG_SHADER_TIME) { - st_index8 = brw_get_shader_time_index(brw, prog, &fp->program.Base, ST_FS8); - st_index16 = brw_get_shader_time_index(brw, prog, &fp->program.Base, ST_FS16); + st_index8 = brw_get_shader_time_index(brw, &fp->program, ST_FS8, + !fp->program.is_arb_asm); + st_index16 = brw_get_shader_time_index(brw, &fp->program, ST_FS16, + !fp->program.is_arb_asm); } char *error_str = NULL; - program = brw_compile_fs(brw->intelScreen->compiler, brw, mem_ctx, - key, &prog_data, fp->program.Base.nir, - &fp->program.Base, st_index8, st_index16, - true, brw->use_rep_send, + program = brw_compile_fs(brw->screen->compiler, brw, mem_ctx, + key, &prog_data, fp->program.nir, + &fp->program, st_index8, st_index16, + true, brw->use_rep_send, vue_map, &program_size, &error_str); + if (program == NULL) { - if (prog) { - prog->LinkStatus = false; - ralloc_strcat(&prog->InfoLog, error_str); + if (!fp->program.is_arb_asm) { + fp->program.sh.data->LinkStatus = false; + ralloc_strcat(&fp->program.sh.data->InfoLog, error_str); } _mesa_problem(NULL, "Failed to compile fragment shader: %s\n", error_str); @@ -152,10 +204,10 @@ return false; } - if (unlikely(brw->perf_debug) && fs) { - if (fs->compiled_once) - brw_wm_debug_recompile(brw, prog, key); - fs->compiled_once = true; + if (unlikely(brw->perf_debug)) { + if (fp->compiled_once) + brw_wm_debug_recompile(brw, &fp->program, key); + fp->compiled_once = true; if (start_busy && !drm_intel_bo_busy(brw->batch.last_bo)) { perf_debug("FS compile took %.03f ms and stalled the GPU\n", @@ -165,16 +217,16 @@ brw_alloc_stage_scratch(brw, &brw->wm.base, prog_data.base.total_scratch, - brw->max_wm_threads); + devinfo->max_wm_threads); - if (unlikely(INTEL_DEBUG & DEBUG_WM)) + if (unlikely((INTEL_DEBUG & DEBUG_WM) && fp->program.is_arb_asm)) fprintf(stderr, "\n"); brw_upload_cache(&brw->cache, BRW_CACHE_FS_PROG, - key, sizeof(struct brw_wm_prog_key), - program, program_size, - &prog_data, sizeof(prog_data), - &brw->wm.base.prog_offset, &brw->wm.prog_data); + key, sizeof(struct brw_wm_prog_key), + program, program_size, + &prog_data, sizeof(prog_data), + &brw->wm.base.prog_offset, &brw->wm.base.prog_data); ralloc_free(mem_ctx); @@ -225,68 +277,6 @@ return found; } -void -brw_wm_debug_recompile(struct brw_context *brw, - struct gl_shader_program *prog, - const struct brw_wm_prog_key *key) -{ - struct brw_cache_item *c = NULL; - const struct brw_wm_prog_key *old_key = NULL; - bool found = false; - - perf_debug("Recompiling fragment shader for program %d\n", prog->Name); - - for (unsigned int i = 0; i < brw->cache.size; i++) { - for (c = brw->cache.items[i]; c; c = c->next) { - if (c->cache_id == BRW_CACHE_FS_PROG) { - old_key = c->key; - - if (old_key->program_string_id == key->program_string_id) - break; - } - } - if (c) - break; - } - - if (!c) { - perf_debug(" Didn't find previous compile in the shader cache for debug\n"); - return; - } - - found |= key_debug(brw, "alphatest, computed depth, depth test, or " - "depth write", - old_key->iz_lookup, key->iz_lookup); - found |= key_debug(brw, "depth statistics", - old_key->stats_wm, key->stats_wm); - found |= key_debug(brw, "flat shading", - old_key->flat_shade, key->flat_shade); - found |= key_debug(brw, "per-sample interpolation", - old_key->persample_interp, key->persample_interp); - found |= key_debug(brw, "number of color buffers", - old_key->nr_color_regions, key->nr_color_regions); - found |= key_debug(brw, "MRT alpha test or alpha-to-coverage", - old_key->replicate_alpha, key->replicate_alpha); - found |= key_debug(brw, "fragment color clamping", - old_key->clamp_fragment_color, key->clamp_fragment_color); - found |= key_debug(brw, "multisampled FBO", - old_key->multisample_fbo, key->multisample_fbo); - found |= key_debug(brw, "line smoothing", - old_key->line_aa, key->line_aa); - found |= key_debug(brw, "input slots valid", - old_key->input_slots_valid, key->input_slots_valid); - found |= key_debug(brw, "mrt alpha test function", - old_key->alpha_test_func, key->alpha_test_func); - found |= key_debug(brw, "mrt alpha test reference value", - old_key->alpha_test_ref, key->alpha_test_ref); - - found |= brw_debug_recompile_sampler_key(brw, &old_key->tex, &key->tex); - - if (!found) { - perf_debug(" Something else\n"); - } -} - static uint8_t gen6_gather_workaround(GLenum internalformat) { @@ -305,25 +295,24 @@ void brw_populate_sampler_prog_key_data(struct gl_context *ctx, - const struct gl_program *prog, - unsigned sampler_count, - struct brw_sampler_prog_key_data *key) + const struct gl_program *prog, + struct brw_sampler_prog_key_data *key) { struct brw_context *brw = brw_context(ctx); + GLbitfield mask = prog->SamplersUsed; - for (int s = 0; s < sampler_count; s++) { - key->swizzles[s] = SWIZZLE_NOOP; + while (mask) { + const int s = u_bit_scan(&mask); - if (!(prog->SamplersUsed & (1 << s))) - continue; + key->swizzles[s] = SWIZZLE_NOOP; int unit_id = prog->SamplerUnits[s]; const struct gl_texture_unit *unit = &ctx->Texture.Unit[unit_id]; if (unit->_Current && unit->_Current->Target != GL_TEXTURE_BUFFER) { - const struct gl_texture_object *t = unit->_Current; - const struct gl_texture_image *img = t->Image[0][t->BaseLevel]; - struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit_id); + const struct gl_texture_object *t = unit->_Current; + const struct gl_texture_image *img = t->Image[0][t->BaseLevel]; + struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit_id); const bool alpha_depth = t->DepthMode == GL_ALPHA && (img->_BaseFormat == GL_DEPTH_COMPONENT || @@ -335,29 +324,57 @@ if (alpha_depth || (brw->gen < 8 && !brw->is_haswell)) key->swizzles[s] = brw_get_texture_swizzle(ctx, t); - if (brw->gen < 8 && + if (brw->gen < 8 && sampler->MinFilter != GL_NEAREST && - sampler->MagFilter != GL_NEAREST) { - if (sampler->WrapS == GL_CLAMP) - key->gl_clamp_mask[0] |= 1 << s; - if (sampler->WrapT == GL_CLAMP) - key->gl_clamp_mask[1] |= 1 << s; - if (sampler->WrapR == GL_CLAMP) - key->gl_clamp_mask[2] |= 1 << s; - } + sampler->MagFilter != GL_NEAREST) { + if (sampler->WrapS == GL_CLAMP) + key->gl_clamp_mask[0] |= 1 << s; + if (sampler->WrapT == GL_CLAMP) + key->gl_clamp_mask[1] |= 1 << s; + if (sampler->WrapR == GL_CLAMP) + key->gl_clamp_mask[2] |= 1 << s; + } - /* gather4's channel select for green from RG32F is broken; requires - * a shader w/a on IVB; fixable with just SCS on HSW. - */ - if (brw->gen == 7 && !brw->is_haswell && prog->UsesGather) { - if (img->InternalFormat == GL_RG32F) - key->gather_channel_quirk_mask |= 1 << s; + /* gather4 for RG32* is broken in multiple ways on Gen7. */ + if (brw->gen == 7 && prog->nir->info->uses_texture_gather) { + switch (img->InternalFormat) { + case GL_RG32I: + case GL_RG32UI: { + /* We have to override the format to R32G32_FLOAT_LD. + * This means that SCS_ALPHA and SCS_ONE will return 0x3f8 + * (1.0) rather than integer 1. This needs shader hacks. + * + * On Ivybridge, we whack W (alpha) to ONE in our key's + * swizzle. On Haswell, we look at the original texture + * swizzle, and use XYZW with channels overridden to ONE, + * leaving normal texture swizzling to SCS. + */ + unsigned src_swizzle = + brw->is_haswell ? t->_Swizzle : key->swizzles[s]; + for (int i = 0; i < 4; i++) { + unsigned src_comp = GET_SWZ(src_swizzle, i); + if (src_comp == SWIZZLE_ONE || src_comp == SWIZZLE_W) { + key->swizzles[i] &= ~(0x7 << (3 * i)); + key->swizzles[i] |= SWIZZLE_ONE << (3 * i); + } + } + /* fallthrough */ + } + case GL_RG32F: + /* The channel select for green doesn't work - we have to + * request blue. Haswell can use SCS for this, but Ivybridge + * needs a shader workaround. + */ + if (!brw->is_haswell) + key->gather_channel_quirk_mask |= 1 << s; + break; + } } /* Gen6's gather4 is broken for UINT/SINT; we treat them as * UNORM/FLOAT instead and fix it in the shader. */ - if (brw->gen == 6 && prog->UsesGather) { + if (brw->gen == 6 && prog->nir->info->uses_texture_gather) { key->gen6_gather_wa[s] = gen6_gather_workaround(img->InternalFormat); } @@ -423,13 +440,12 @@ BRW_NEW_VUE_MAP_GEOM_OUT); } -static void +void brw_wm_populate_key(struct brw_context *brw, struct brw_wm_prog_key *key) { struct gl_context *ctx = &brw->ctx; /* BRW_NEW_FRAGMENT_PROGRAM */ - const struct brw_fragment_program *fp = - (struct brw_fragment_program *) brw->fragment_program; + const struct brw_program *fp = brw_program_const(brw->fragment_program); const struct gl_program *prog = (struct gl_program *) brw->fragment_program; GLuint lookup = 0; GLuint line_aa; @@ -440,26 +456,28 @@ */ if (brw->gen < 6) { /* _NEW_COLOR */ - if (fp->program.UsesKill || ctx->Color.AlphaEnabled) - lookup |= IZ_PS_KILL_ALPHATEST_BIT; + if (prog->info.fs.uses_discard || ctx->Color.AlphaEnabled) { + lookup |= IZ_PS_KILL_ALPHATEST_BIT; + } - if (fp->program.Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) - lookup |= IZ_PS_COMPUTES_DEPTH_BIT; + if (prog->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) { + lookup |= IZ_PS_COMPUTES_DEPTH_BIT; + } /* _NEW_DEPTH */ if (ctx->Depth.Test) - lookup |= IZ_DEPTH_TEST_ENABLE_BIT; + lookup |= IZ_DEPTH_TEST_ENABLE_BIT; - if (ctx->Depth.Test && ctx->Depth.Mask) /* ?? */ - lookup |= IZ_DEPTH_WRITE_ENABLE_BIT; + if (brw_depth_writes_enabled(brw)) + lookup |= IZ_DEPTH_WRITE_ENABLE_BIT; /* _NEW_STENCIL | _NEW_BUFFERS */ if (ctx->Stencil._Enabled) { - lookup |= IZ_STENCIL_TEST_ENABLE_BIT; + lookup |= IZ_STENCIL_TEST_ENABLE_BIT; - if (ctx->Stencil.WriteMask[0] || - ctx->Stencil.WriteMask[ctx->Stencil._BackFace]) - lookup |= IZ_STENCIL_WRITE_ENABLE_BIT; + if (ctx->Stencil.WriteMask[0] || + ctx->Stencil.WriteMask[ctx->Stencil._BackFace]) + lookup |= IZ_STENCIL_WRITE_ENABLE_BIT; } key->iz_lookup = lookup; } @@ -469,24 +487,24 @@ /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */ if (ctx->Line.SmoothFlag) { if (brw->reduced_primitive == GL_LINES) { - line_aa = AA_ALWAYS; + line_aa = AA_ALWAYS; } else if (brw->reduced_primitive == GL_TRIANGLES) { - if (ctx->Polygon.FrontMode == GL_LINE) { - line_aa = AA_SOMETIMES; + if (ctx->Polygon.FrontMode == GL_LINE) { + line_aa = AA_SOMETIMES; + + if (ctx->Polygon.BackMode == GL_LINE || + (ctx->Polygon.CullFlag && + ctx->Polygon.CullFaceMode == GL_BACK)) + line_aa = AA_ALWAYS; + } + else if (ctx->Polygon.BackMode == GL_LINE) { + line_aa = AA_SOMETIMES; - if (ctx->Polygon.BackMode == GL_LINE || - (ctx->Polygon.CullFlag && - ctx->Polygon.CullFaceMode == GL_BACK)) - line_aa = AA_ALWAYS; - } - else if (ctx->Polygon.BackMode == GL_LINE) { - line_aa = AA_SOMETIMES; - - if ((ctx->Polygon.CullFlag && - ctx->Polygon.CullFaceMode == GL_FRONT)) - line_aa = AA_ALWAYS; - } + if ((ctx->Polygon.CullFlag && + ctx->Polygon.CullFaceMode == GL_FRONT)) + line_aa = AA_ALWAYS; + } } } @@ -506,8 +524,7 @@ key->clamp_fragment_color = ctx->Color._ClampFragmentColor; /* _NEW_TEXTURE */ - brw_populate_sampler_prog_key_data(ctx, prog, brw->wm.base.sampler_count, - &key->tex); + brw_populate_sampler_prog_key_data(ctx, prog, &key->tex); /* _NEW_BUFFERS */ key->nr_color_regions = ctx->DrawBuffer->_NumColorDrawBuffers; @@ -518,7 +535,8 @@ /* _NEW_MULTISAMPLE, _NEW_COLOR, _NEW_BUFFERS */ key->replicate_alpha = ctx->DrawBuffer->_NumColorDrawBuffers > 1 && - (ctx->Multisample.SampleAlphaToCoverage || ctx->Color.AlphaEnabled); + (_mesa_is_alpha_test_enabled(ctx) || + _mesa_is_alpha_to_coverage_enabled(ctx)); /* _NEW_BUFFERS _NEW_MULTISAMPLE */ /* Ignore sample qualifier while computing this flag. */ @@ -532,10 +550,10 @@ } /* BRW_NEW_VUE_MAP_GEOM_OUT */ - if (brw->gen < 6 || _mesa_bitcount_64(fp->program.Base.InputsRead & - BRW_FS_VARYING_INPUT_MASK) > 16) + if (brw->gen < 6 || _mesa_bitcount_64(prog->info.inputs_read & + BRW_FS_VARYING_INPUT_MASK) > 16) { key->input_slots_valid = brw->vue_map_geom_out.slots_valid; - + } /* _NEW_COLOR | _NEW_BUFFERS */ /* Pre-gen6, the hardware alpha test always used each render @@ -551,16 +569,16 @@ /* The unique fragment program ID */ key->program_string_id = fp->id; + + /* Whether reads from the framebuffer should behave coherently. */ + key->coherent_fb_fetch = ctx->Extensions.MESA_shader_framebuffer_fetch; } void brw_upload_wm_prog(struct brw_context *brw) { - struct gl_context *ctx = &brw->ctx; - struct gl_shader_program *current = ctx->_Shader->_CurrentFragmentProgram; struct brw_wm_prog_key key; - struct brw_fragment_program *fp = (struct brw_fragment_program *) - brw->fragment_program; + struct brw_program *fp = (struct brw_program *) brw->fragment_program; if (!brw_wm_state_dirty(brw)) return; @@ -568,33 +586,33 @@ brw_wm_populate_key(brw, &key); if (!brw_search_cache(&brw->cache, BRW_CACHE_FS_PROG, - &key, sizeof(key), - &brw->wm.base.prog_offset, &brw->wm.prog_data)) { - bool success = brw_codegen_wm_prog(brw, current, fp, &key); + &key, sizeof(key), + &brw->wm.base.prog_offset, + &brw->wm.base.prog_data)) { + bool success = brw_codegen_wm_prog(brw, fp, &key, + &brw->vue_map_geom_out); (void) success; assert(success); } - brw->wm.base.prog_data = &brw->wm.prog_data->base; } bool -brw_fs_precompile(struct gl_context *ctx, - struct gl_shader_program *shader_prog, - struct gl_program *prog) +brw_fs_precompile(struct gl_context *ctx, struct gl_program *prog) { struct brw_context *brw = brw_context(ctx); struct brw_wm_prog_key key; - struct gl_fragment_program *fp = (struct gl_fragment_program *) prog; - struct brw_fragment_program *bfp = brw_fragment_program(fp); + struct brw_program *bfp = brw_program(prog); memset(&key, 0, sizeof(key)); + uint64_t outputs_written = prog->info.outputs_written; + if (brw->gen < 6) { - if (fp->UsesKill) + if (prog->info.fs.uses_discard) key.iz_lookup |= IZ_PS_KILL_ALPHATEST_BIT; - if (fp->Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) + if (outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) key.iz_lookup |= IZ_PS_COMPUTES_DEPTH_BIT; /* Just assume depth testing. */ @@ -602,25 +620,37 @@ key.iz_lookup |= IZ_DEPTH_WRITE_ENABLE_BIT; } - if (brw->gen < 6 || _mesa_bitcount_64(fp->Base.InputsRead & - BRW_FS_VARYING_INPUT_MASK) > 16) - key.input_slots_valid = fp->Base.InputsRead | VARYING_BIT_POS; + if (brw->gen < 6 || _mesa_bitcount_64(prog->info.inputs_read & + BRW_FS_VARYING_INPUT_MASK) > 16) { + key.input_slots_valid = prog->info.inputs_read | VARYING_BIT_POS; + } - brw_setup_tex_for_precompile(brw, &key.tex, &fp->Base); + brw_setup_tex_for_precompile(brw, &key.tex, prog); - key.nr_color_regions = _mesa_bitcount_64(fp->Base.OutputsWritten & + key.nr_color_regions = _mesa_bitcount_64(outputs_written & ~(BITFIELD64_BIT(FRAG_RESULT_DEPTH) | - BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK))); + BITFIELD64_BIT(FRAG_RESULT_STENCIL) | + BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK))); key.program_string_id = bfp->id; + /* Whether reads from the framebuffer should behave coherently. */ + key.coherent_fb_fetch = ctx->Extensions.MESA_shader_framebuffer_fetch; + uint32_t old_prog_offset = brw->wm.base.prog_offset; - struct brw_wm_prog_data *old_prog_data = brw->wm.prog_data; + struct brw_stage_prog_data *old_prog_data = brw->wm.base.prog_data; + + struct brw_vue_map vue_map; + if (brw->gen < 6) { + brw_compute_vue_map(&brw->screen->devinfo, &vue_map, + prog->info.inputs_read | VARYING_BIT_POS, + false); + } - bool success = brw_codegen_wm_prog(brw, shader_prog, bfp, &key); + bool success = brw_codegen_wm_prog(brw, bfp, &key, &vue_map); brw->wm.base.prog_offset = old_prog_offset; - brw->wm.prog_data = old_prog_data; + brw->wm.base.prog_data = old_prog_data; return success; } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_wm.h mesa-17.0.7/src/mesa/drivers/dri/i965/brw_wm.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_wm.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_wm.h 2017-06-01 10:37:10.000000000 +0000 @@ -60,17 +60,14 @@ #endif bool brw_color_buffer_write_enabled(struct brw_context *brw); -bool brw_codegen_wm_prog(struct brw_context *brw, - struct gl_shader_program *prog, - struct brw_fragment_program *fp, - struct brw_wm_prog_key *key); -void brw_wm_debug_recompile(struct brw_context *brw, - struct gl_shader_program *prog, - const struct brw_wm_prog_key *key); void brw_upload_wm_prog(struct brw_context *brw); +void +brw_wm_populate_key(struct brw_context *brw, + struct brw_wm_prog_key *key); + #ifdef __cplusplus } // extern "C" #endif diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_wm_iz.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/brw_wm_iz.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_wm_iz.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_wm_iz.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -123,7 +123,7 @@ void fs_visitor::setup_fs_payload_gen4() { assert(stage == MESA_SHADER_FRAGMENT); - brw_wm_prog_data *prog_data = (brw_wm_prog_data*) this->prog_data; + struct brw_wm_prog_data *prog_data = brw_wm_prog_data(this->prog_data); brw_wm_prog_key *key = (brw_wm_prog_key*) this->key; GLuint reg = 2; bool kill_stats_promoted_workaround = false; @@ -143,7 +143,7 @@ } prog_data->uses_src_depth = - (nir->info.inputs_read & (1 << VARYING_SLOT_POS)) != 0; + (nir->info->inputs_read & (1 << VARYING_SLOT_POS)) != 0; if (wm_iz_table[lookup].sd_present || prog_data->uses_src_depth || kill_stats_promoted_workaround) { payload.source_depth_reg = reg; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_wm_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_wm_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_wm_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_wm_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -37,6 +37,7 @@ #include "brw_state.h" #include "brw_defines.h" #include "brw_wm.h" +#include "compiler/nir/nir.h" /*********************************************************************** * WM unit - fragment programs and rasterization @@ -47,17 +48,17 @@ { struct gl_context *ctx = &brw->ctx; /* BRW_NEW_FRAGMENT_PROGRAM */ - const struct gl_fragment_program *fp = brw->fragment_program; + const struct gl_program *fp = brw->fragment_program; unsigned i; /* _NEW_BUFFERS */ for (i = 0; i < ctx->DrawBuffer->_NumColorDrawBuffers; i++) { struct gl_renderbuffer *rb = ctx->DrawBuffer->_ColorDrawBuffers[i]; + uint64_t outputs_written = fp->info.outputs_written; /* _NEW_COLOR */ - if (rb && - (fp->Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_COLOR) || - fp->Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DATA0 + i)) && + if (rb && (outputs_written & BITFIELD64_BIT(FRAG_RESULT_COLOR) || + outputs_written & BITFIELD64_BIT(FRAG_RESULT_DATA0 + i)) && (ctx->Color.ColorMask[i][0] || ctx->Color.ColorMask[i][1] || ctx->Color.ColorMask[i][2] || @@ -75,11 +76,13 @@ static void brw_upload_wm_unit(struct brw_context *brw) { + const struct gen_device_info *devinfo = &brw->screen->devinfo; struct gl_context *ctx = &brw->ctx; /* BRW_NEW_FRAGMENT_PROGRAM */ - const struct gl_fragment_program *fp = brw->fragment_program; + const struct gl_program *fp = brw->fragment_program; /* BRW_NEW_FS_PROG_DATA */ - const struct brw_wm_prog_data *prog_data = brw->wm.prog_data; + const struct brw_wm_prog_data *prog_data = + brw_wm_prog_data(brw->wm.base.prog_data); struct brw_wm_unit_state *wm; wm = brw_state_batch(brw, AUB_TRACE_WM_STATE, @@ -165,7 +168,7 @@ /* BRW_NEW_FRAGMENT_PROGRAM */ wm->wm5.program_uses_depth = prog_data->uses_src_depth; - wm->wm5.program_computes_depth = (fp->Base.OutputsWritten & + wm->wm5.program_computes_depth = (fp->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) != 0; /* _NEW_BUFFERS * Override for NULL depthbuffer case, required by the Pixel Shader Computed @@ -178,7 +181,7 @@ wm->wm5.program_uses_killpixel = prog_data->uses_kill || ctx->Color.AlphaEnabled; - wm->wm5.max_threads = brw->max_wm_threads - 1; + wm->wm5.max_threads = devinfo->max_wm_threads - 1; /* _NEW_BUFFERS | _NEW_COLOR */ if (brw_color_buffer_write_enabled(brw) || @@ -270,4 +273,3 @@ }, .emit = brw_upload_wm_unit, }; - diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/brw_wm_surface_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/brw_wm_surface_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/brw_wm_surface_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/brw_wm_surface_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -30,14 +30,17 @@ */ +#include "compiler/nir/nir.h" #include "main/context.h" #include "main/blend.h" #include "main/mtypes.h" #include "main/samplerobj.h" #include "main/shaderimage.h" +#include "main/teximage.h" #include "program/prog_parameter.h" #include "program/prog_instruction.h" #include "main/framebuffer.h" +#include "main/shaderapi.h" #include "isl/isl.h" @@ -52,6 +55,186 @@ #include "brw_defines.h" #include "brw_wm.h" +enum { + INTEL_RENDERBUFFER_LAYERED = 1 << 0, + INTEL_AUX_BUFFER_DISABLED = 1 << 1, +}; + +uint32_t tex_mocs[] = { + [7] = GEN7_MOCS_L3, + [8] = BDW_MOCS_WB, + [9] = SKL_MOCS_WB, +}; + +uint32_t rb_mocs[] = { + [7] = GEN7_MOCS_L3, + [8] = BDW_MOCS_PTE, + [9] = SKL_MOCS_PTE, +}; + +static void +brw_emit_surface_state(struct brw_context *brw, + struct intel_mipmap_tree *mt, uint32_t flags, + GLenum target, struct isl_view view, + uint32_t mocs, uint32_t *surf_offset, int surf_index, + unsigned read_domains, unsigned write_domains) +{ + uint32_t tile_x = mt->level[0].slice[0].x_offset; + uint32_t tile_y = mt->level[0].slice[0].y_offset; + uint32_t offset = mt->offset; + + struct isl_surf surf; + intel_miptree_get_isl_surf(brw, mt, &surf); + + surf.dim = get_isl_surf_dim(target); + + const enum isl_dim_layout dim_layout = + get_isl_dim_layout(&brw->screen->devinfo, mt->tiling, target); + + if (surf.dim_layout != dim_layout) { + /* The layout of the specified texture target is not compatible with the + * actual layout of the miptree structure in memory -- You're entering + * dangerous territory, this can only possibly work if you only intended + * to access a single level and slice of the texture, and the hardware + * supports the tile offset feature in order to allow non-tile-aligned + * base offsets, since we'll have to point the hardware to the first + * texel of the level instead of relying on the usual base level/layer + * controls. + */ + assert(brw->has_surface_tile_offset); + assert(view.levels == 1 && view.array_len == 1); + assert(tile_x == 0 && tile_y == 0); + + offset += intel_miptree_get_tile_offsets(mt, view.base_level, + view.base_array_layer, + &tile_x, &tile_y); + + /* Minify the logical dimensions of the texture. */ + const unsigned l = view.base_level - mt->first_level; + surf.logical_level0_px.width = minify(surf.logical_level0_px.width, l); + surf.logical_level0_px.height = surf.dim <= ISL_SURF_DIM_1D ? 1 : + minify(surf.logical_level0_px.height, l); + surf.logical_level0_px.depth = surf.dim <= ISL_SURF_DIM_2D ? 1 : + minify(surf.logical_level0_px.depth, l); + + /* Only the base level and layer can be addressed with the overridden + * layout. + */ + surf.logical_level0_px.array_len = 1; + surf.levels = 1; + surf.dim_layout = dim_layout; + + /* The requested slice of the texture is now at the base level and + * layer. + */ + view.base_level = 0; + view.base_array_layer = 0; + } + + union isl_color_value clear_color = { .u32 = { 0, 0, 0, 0 } }; + + drm_intel_bo *aux_bo; + struct isl_surf *aux_surf = NULL, aux_surf_s; + uint64_t aux_offset = 0; + enum isl_aux_usage aux_usage = ISL_AUX_USAGE_NONE; + if ((mt->mcs_buf || intel_miptree_sample_with_hiz(brw, mt)) && + !(flags & INTEL_AUX_BUFFER_DISABLED)) { + intel_miptree_get_aux_isl_surf(brw, mt, &aux_surf_s, &aux_usage); + aux_surf = &aux_surf_s; + + if (mt->mcs_buf) { + aux_bo = mt->mcs_buf->bo; + aux_offset = mt->mcs_buf->bo->offset64 + mt->mcs_buf->offset; + } else { + aux_bo = mt->hiz_buf->aux_base.bo; + aux_offset = mt->hiz_buf->aux_base.bo->offset64; + } + + /* We only really need a clear color if we also have an auxiliary + * surface. Without one, it does nothing. + */ + clear_color = intel_miptree_get_isl_clear_color(brw, mt); + } + + void *state = __brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, + brw->isl_dev.ss.size, + brw->isl_dev.ss.align, + surf_index, surf_offset); + + isl_surf_fill_state(&brw->isl_dev, state, .surf = &surf, .view = &view, + .address = mt->bo->offset64 + offset, + .aux_surf = aux_surf, .aux_usage = aux_usage, + .aux_address = aux_offset, + .mocs = mocs, .clear_color = clear_color, + .x_offset_sa = tile_x, .y_offset_sa = tile_y); + + drm_intel_bo_emit_reloc(brw->batch.bo, + *surf_offset + brw->isl_dev.ss.addr_offset, + mt->bo, offset, + read_domains, write_domains); + + if (aux_surf) { + /* On gen7 and prior, the upper 20 bits of surface state DWORD 6 are the + * upper 20 bits of the GPU address of the MCS buffer; the lower 12 bits + * contain other control information. Since buffer addresses are always + * on 4k boundaries (and thus have their lower 12 bits zero), we can use + * an ordinary reloc to do the necessary address translation. + */ + assert((aux_offset & 0xfff) == 0); + uint32_t *aux_addr = state + brw->isl_dev.ss.aux_addr_offset; + drm_intel_bo_emit_reloc(brw->batch.bo, + *surf_offset + brw->isl_dev.ss.aux_addr_offset, + aux_bo, *aux_addr - aux_bo->offset64, + read_domains, write_domains); + } +} + +uint32_t +brw_update_renderbuffer_surface(struct brw_context *brw, + struct gl_renderbuffer *rb, + uint32_t flags, unsigned unit /* unused */, + uint32_t surf_index) +{ + struct gl_context *ctx = &brw->ctx; + struct intel_renderbuffer *irb = intel_renderbuffer(rb); + struct intel_mipmap_tree *mt = irb->mt; + + if (brw->gen < 9) { + assert(!(flags & INTEL_AUX_BUFFER_DISABLED)); + } + + assert(brw_render_target_supported(brw, rb)); + + mesa_format rb_format = _mesa_get_render_format(ctx, intel_rb_format(irb)); + if (unlikely(!brw->format_supported_as_render_target[rb_format])) { + _mesa_problem(ctx, "%s: renderbuffer format %s unsupported\n", + __func__, _mesa_get_format_name(rb_format)); + } + + const unsigned layer_multiplier = + (irb->mt->msaa_layout == INTEL_MSAA_LAYOUT_UMS || + irb->mt->msaa_layout == INTEL_MSAA_LAYOUT_CMS) ? + MAX2(irb->mt->num_samples, 1) : 1; + + struct isl_view view = { + .format = brw->render_target_format[rb_format], + .base_level = irb->mt_level - irb->mt->first_level, + .levels = 1, + .base_array_layer = irb->mt_layer / layer_multiplier, + .array_len = MAX2(irb->layer_count, 1), + .swizzle = ISL_SWIZZLE_IDENTITY, + .usage = ISL_SURF_USAGE_RENDER_TARGET_BIT, + }; + + uint32_t offset; + brw_emit_surface_state(brw, mt, flags, mt->target, view, + rb_mocs[brw->gen], + &offset, surf_index, + I915_GEM_DOMAIN_RENDER, + I915_GEM_DOMAIN_RENDER); + return offset; +} + GLuint translate_tex_target(GLenum target) { @@ -105,31 +288,6 @@ return BRW_SURFACE_MULTISAMPLECOUNT_1; } -void -brw_configure_w_tiled(const struct intel_mipmap_tree *mt, - bool is_render_target, - unsigned *width, unsigned *height, - unsigned *pitch, uint32_t *tiling, unsigned *format) -{ - static const unsigned halign_stencil = 8; - - /* In Y-tiling row is twice as wide as in W-tiling, and subsequently - * there are half as many rows. - * In addition, mip-levels are accessed manually by the program and - * therefore the surface is setup to cover all the mip-levels for one slice. - * (Hardware is still used to access individual slices). - */ - *tiling = I915_TILING_Y; - *pitch = mt->pitch * 2; - *width = ALIGN(mt->total_width, halign_stencil) * 2; - *height = (mt->total_height / mt->physical_depth0) / 2; - - if (is_render_target) { - *format = BRW_SURFACEFORMAT_R8_UINT; - } -} - - /** * Compute the combination of DEPTH_TEXTURE_MODE and EXT_texture_swizzle * swizzling. @@ -233,7 +391,9 @@ case GL_RED: case GL_RG: case GL_RGB: - if (_mesa_get_format_bits(img->TexFormat, GL_ALPHA_BITS) > 0) + if (_mesa_get_format_bits(img->TexFormat, GL_ALPHA_BITS) > 0 || + img->TexFormat == MESA_FORMAT_RGB_DXT1 || + img->TexFormat == MESA_FORMAT_SRGB_DXT1) swizzles[3] = SWIZZLE_ONE; break; } @@ -244,35 +404,274 @@ swizzles[GET_SWZ(t->_Swizzle, 3)]); } -static void -gen4_emit_buffer_surface_state(struct brw_context *brw, - uint32_t *out_offset, - drm_intel_bo *bo, - unsigned buffer_offset, - unsigned surface_format, - unsigned buffer_size, - unsigned pitch, - bool rw) -{ - uint32_t *surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, - 6 * 4, 32, out_offset); - memset(surf, 0, 6 * 4); +/** + * Convert an swizzle enumeration (i.e. SWIZZLE_X) to one of the Gen7.5+ + * "Shader Channel Select" enumerations (i.e. HSW_SCS_RED). The mappings are + * + * SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W, SWIZZLE_ZERO, SWIZZLE_ONE + * 0 1 2 3 4 5 + * 4 5 6 7 0 1 + * SCS_RED, SCS_GREEN, SCS_BLUE, SCS_ALPHA, SCS_ZERO, SCS_ONE + * + * which is simply adding 4 then modding by 8 (or anding with 7). + * + * We then may need to apply workarounds for textureGather hardware bugs. + */ +static unsigned +swizzle_to_scs(GLenum swizzle, bool need_green_to_blue) +{ + unsigned scs = (swizzle + 4) & 7; - surf[0] = BRW_SURFACE_BUFFER << BRW_SURFACE_TYPE_SHIFT | - surface_format << BRW_SURFACE_FORMAT_SHIFT | - (brw->gen >= 6 ? BRW_SURFACE_RC_READ_WRITE : 0); - surf[1] = (bo ? bo->offset64 : 0) + buffer_offset; /* reloc */ - surf[2] = ((buffer_size - 1) & 0x7f) << BRW_SURFACE_WIDTH_SHIFT | - (((buffer_size - 1) >> 7) & 0x1fff) << BRW_SURFACE_HEIGHT_SHIFT; - surf[3] = (((buffer_size - 1) >> 20) & 0x7f) << BRW_SURFACE_DEPTH_SHIFT | - (pitch - 1) << BRW_SURFACE_PITCH_SHIFT; - - /* Emit relocation to surface contents. The 965 PRM, Volume 4, section - * 5.1.2 "Data Cache" says: "the data cache does not exist as a separate - * physical cache. It is mapped in hardware to the sampler cache." + return (need_green_to_blue && scs == HSW_SCS_GREEN) ? HSW_SCS_BLUE : scs; +} + +static unsigned +brw_find_matching_rb(const struct gl_framebuffer *fb, + const struct intel_mipmap_tree *mt) +{ + for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) { + const struct intel_renderbuffer *irb = + intel_renderbuffer(fb->_ColorDrawBuffers[i]); + + if (irb && irb->mt == mt) + return i; + } + + return fb->_NumColorDrawBuffers; +} + +static inline bool +brw_texture_view_sane(const struct brw_context *brw, + const struct intel_mipmap_tree *mt, + const struct isl_view *view) +{ + /* There are special cases only for lossless compression. */ + if (!intel_miptree_is_lossless_compressed(brw, mt)) + return true; + + if (isl_format_supports_lossless_compression(&brw->screen->devinfo, + view->format)) + return true; + + /* Logic elsewhere needs to take care to resolve the color buffer prior + * to sampling it as non-compressed. */ + if (intel_miptree_has_color_unresolved(mt, view->base_level, view->levels, + view->base_array_layer, + view->array_len)) + return false; + + const struct gl_framebuffer *fb = brw->ctx.DrawBuffer; + const unsigned rb_index = brw_find_matching_rb(fb, mt); + + if (rb_index == fb->_NumColorDrawBuffers) + return true; + + /* Underlying surface is compressed but it is sampled using a format that + * the sampling engine doesn't support as compressed. Compression must be + * disabled for both sampling engine and data port in case the same surface + * is used also as render target. + */ + return brw->draw_aux_buffer_disabled[rb_index]; +} + +static bool +brw_disable_aux_surface(const struct brw_context *brw, + const struct intel_mipmap_tree *mt, + const struct isl_view *view) +{ + /* Nothing to disable. */ + if (!mt->mcs_buf) + return false; + + const bool is_unresolved = intel_miptree_has_color_unresolved( + mt, view->base_level, view->levels, + view->base_array_layer, view->array_len); + + /* There are special cases only for lossless compression. */ + if (!intel_miptree_is_lossless_compressed(brw, mt)) + return !is_unresolved; + + const struct gl_framebuffer *fb = brw->ctx.DrawBuffer; + const unsigned rb_index = brw_find_matching_rb(fb, mt); + + /* If we are drawing into this with compression enabled, then we must also + * enable compression when texturing from it regardless of + * fast_clear_state. If we don't then, after the first draw call with + * this setup, there will be data in the CCS which won't get picked up by + * subsequent texturing operations as required by ARB_texture_barrier. + * Since we don't want to re-emit the binding table or do a resolve + * operation every draw call, the easiest thing to do is just enable + * compression on the texturing side. This is completely safe to do + * since, if compressed texturing weren't allowed, we would have disabled + * compression of render targets in whatever_that_function_is_called(). + */ + if (rb_index < fb->_NumColorDrawBuffers) { + if (brw->draw_aux_buffer_disabled[rb_index]) { + assert(!is_unresolved); + } + + return brw->draw_aux_buffer_disabled[rb_index]; + } + + return !is_unresolved; +} + +void +brw_update_texture_surface(struct gl_context *ctx, + unsigned unit, + uint32_t *surf_offset, + bool for_gather, + uint32_t plane) +{ + struct brw_context *brw = brw_context(ctx); + struct gl_texture_object *obj = ctx->Texture.Unit[unit]._Current; + + if (obj->Target == GL_TEXTURE_BUFFER) { + brw_update_buffer_texture_surface(ctx, unit, surf_offset); + + } else { + struct intel_texture_object *intel_obj = intel_texture_object(obj); + struct intel_mipmap_tree *mt = intel_obj->mt; + + if (plane > 0) { + if (mt->plane[plane - 1] == NULL) + return; + mt = mt->plane[plane - 1]; + } + + struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit); + /* If this is a view with restricted NumLayers, then our effective depth + * is not just the miptree depth. + */ + const unsigned view_num_layers = + (obj->Immutable && obj->Target != GL_TEXTURE_3D) ? obj->NumLayers : + mt->logical_depth0; + + /* Handling GL_ALPHA as a surface format override breaks 1.30+ style + * texturing functions that return a float, as our code generation always + * selects the .x channel (which would always be 0). + */ + struct gl_texture_image *firstImage = obj->Image[0][obj->BaseLevel]; + const bool alpha_depth = obj->DepthMode == GL_ALPHA && + (firstImage->_BaseFormat == GL_DEPTH_COMPONENT || + firstImage->_BaseFormat == GL_DEPTH_STENCIL); + const unsigned swizzle = (unlikely(alpha_depth) ? SWIZZLE_XYZW : + brw_get_texture_swizzle(&brw->ctx, obj)); + + mesa_format mesa_fmt = plane == 0 ? intel_obj->_Format : mt->format; + unsigned format = translate_tex_format(brw, mesa_fmt, + sampler->sRGBDecode); + + /* Implement gen6 and gen7 gather work-around */ + bool need_green_to_blue = false; + if (for_gather) { + if (brw->gen == 7 && (format == BRW_SURFACEFORMAT_R32G32_FLOAT || + format == BRW_SURFACEFORMAT_R32G32_SINT || + format == BRW_SURFACEFORMAT_R32G32_UINT)) { + format = BRW_SURFACEFORMAT_R32G32_FLOAT_LD; + need_green_to_blue = brw->is_haswell; + } else if (brw->gen == 6) { + /* Sandybridge's gather4 message is broken for integer formats. + * To work around this, we pretend the surface is UNORM for + * 8 or 16-bit formats, and emit shader instructions to recover + * the real INT/UINT value. For 32-bit formats, we pretend + * the surface is FLOAT, and simply reinterpret the resulting + * bits. + */ + switch (format) { + case BRW_SURFACEFORMAT_R8_SINT: + case BRW_SURFACEFORMAT_R8_UINT: + format = BRW_SURFACEFORMAT_R8_UNORM; + break; + + case BRW_SURFACEFORMAT_R16_SINT: + case BRW_SURFACEFORMAT_R16_UINT: + format = BRW_SURFACEFORMAT_R16_UNORM; + break; + + case BRW_SURFACEFORMAT_R32_SINT: + case BRW_SURFACEFORMAT_R32_UINT: + format = BRW_SURFACEFORMAT_R32_FLOAT; + break; + + default: + break; + } + } + } + + if (obj->StencilSampling && firstImage->_BaseFormat == GL_DEPTH_STENCIL) { + if (brw->gen <= 7) { + assert(mt->r8stencil_mt && !mt->stencil_mt->r8stencil_needs_update); + mt = mt->r8stencil_mt; + } else { + mt = mt->stencil_mt; + } + format = BRW_SURFACEFORMAT_R8_UINT; + } else if (brw->gen <= 7 && mt->format == MESA_FORMAT_S_UINT8) { + assert(mt->r8stencil_mt && !mt->r8stencil_needs_update); + mt = mt->r8stencil_mt; + format = BRW_SURFACEFORMAT_R8_UINT; + } + + const int surf_index = surf_offset - &brw->wm.base.surf_offset[0]; + + struct isl_view view = { + .format = format, + .base_level = obj->MinLevel + obj->BaseLevel, + .levels = intel_obj->_MaxLevel - obj->BaseLevel + 1, + .base_array_layer = obj->MinLayer, + .array_len = view_num_layers, + .swizzle = { + .r = swizzle_to_scs(GET_SWZ(swizzle, 0), need_green_to_blue), + .g = swizzle_to_scs(GET_SWZ(swizzle, 1), need_green_to_blue), + .b = swizzle_to_scs(GET_SWZ(swizzle, 2), need_green_to_blue), + .a = swizzle_to_scs(GET_SWZ(swizzle, 3), need_green_to_blue), + }, + .usage = ISL_SURF_USAGE_TEXTURE_BIT, + }; + + if (obj->Target == GL_TEXTURE_CUBE_MAP || + obj->Target == GL_TEXTURE_CUBE_MAP_ARRAY) + view.usage |= ISL_SURF_USAGE_CUBE_BIT; + + assert(brw_texture_view_sane(brw, mt, &view)); + + const int flags = brw_disable_aux_surface(brw, mt, &view) ? + INTEL_AUX_BUFFER_DISABLED : 0; + brw_emit_surface_state(brw, mt, flags, mt->target, view, + tex_mocs[brw->gen], + surf_offset, surf_index, + I915_GEM_DOMAIN_SAMPLER, 0); + } +} + +void +brw_emit_buffer_surface_state(struct brw_context *brw, + uint32_t *out_offset, + drm_intel_bo *bo, + unsigned buffer_offset, + unsigned surface_format, + unsigned buffer_size, + unsigned pitch, + bool rw) +{ + uint32_t *dw = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, + brw->isl_dev.ss.size, + brw->isl_dev.ss.align, + out_offset); + + isl_buffer_fill_state(&brw->isl_dev, dw, + .address = (bo ? bo->offset64 : 0) + buffer_offset, + .size = buffer_size, + .format = surface_format, + .stride = pitch, + .mocs = tex_mocs[brw->gen]); + if (bo) { - drm_intel_bo_emit_reloc(brw->batch.bo, *out_offset + 4, + drm_intel_bo_emit_reloc(brw->batch.bo, + *out_offset + brw->isl_dev.ss.addr_offset, bo, buffer_offset, I915_GEM_DOMAIN_SAMPLER, (rw ? I915_GEM_DOMAIN_SAMPLER : 0)); @@ -304,104 +703,12 @@ _mesa_get_format_name(format)); } - brw->vtbl.emit_buffer_surface_state(brw, surf_offset, bo, - tObj->BufferOffset, - brw_format, - size / texel_size, - texel_size, - false /* rw */); -} - -static void -brw_update_texture_surface(struct gl_context *ctx, - unsigned unit, - uint32_t *surf_offset, - bool for_gather, - uint32_t plane) -{ - struct brw_context *brw = brw_context(ctx); - struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current; - struct intel_texture_object *intelObj = intel_texture_object(tObj); - struct intel_mipmap_tree *mt = intelObj->mt; - struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit); - uint32_t *surf; - - /* BRW_NEW_TEXTURE_BUFFER */ - if (tObj->Target == GL_TEXTURE_BUFFER) { - brw_update_buffer_texture_surface(ctx, unit, surf_offset); - return; - } - - if (plane > 0) { - if (mt->plane[plane - 1] == NULL) - return; - mt = mt->plane[plane - 1]; - } - - surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, - 6 * 4, 32, surf_offset); - - mesa_format mesa_fmt = plane == 0 ? intelObj->_Format : mt->format; - uint32_t tex_format = translate_tex_format(brw, mesa_fmt, - sampler->sRGBDecode); - - if (for_gather) { - /* Sandybridge's gather4 message is broken for integer formats. - * To work around this, we pretend the surface is UNORM for - * 8 or 16-bit formats, and emit shader instructions to recover - * the real INT/UINT value. For 32-bit formats, we pretend - * the surface is FLOAT, and simply reinterpret the resulting - * bits. - */ - switch (tex_format) { - case BRW_SURFACEFORMAT_R8_SINT: - case BRW_SURFACEFORMAT_R8_UINT: - tex_format = BRW_SURFACEFORMAT_R8_UNORM; - break; - - case BRW_SURFACEFORMAT_R16_SINT: - case BRW_SURFACEFORMAT_R16_UINT: - tex_format = BRW_SURFACEFORMAT_R16_UNORM; - break; - - case BRW_SURFACEFORMAT_R32_SINT: - case BRW_SURFACEFORMAT_R32_UINT: - tex_format = BRW_SURFACEFORMAT_R32_FLOAT; - break; - - default: - break; - } - } - - surf[0] = (translate_tex_target(tObj->Target) << BRW_SURFACE_TYPE_SHIFT | - BRW_SURFACE_MIPMAPLAYOUT_BELOW << BRW_SURFACE_MIPLAYOUT_SHIFT | - BRW_SURFACE_CUBEFACE_ENABLES | - tex_format << BRW_SURFACE_FORMAT_SHIFT); - - surf[1] = mt->bo->offset64 + mt->offset; /* reloc */ - - surf[2] = ((intelObj->_MaxLevel - tObj->BaseLevel) << BRW_SURFACE_LOD_SHIFT | - (mt->logical_width0 - 1) << BRW_SURFACE_WIDTH_SHIFT | - (mt->logical_height0 - 1) << BRW_SURFACE_HEIGHT_SHIFT); - - surf[3] = (brw_get_surface_tiling_bits(mt->tiling) | - (mt->logical_depth0 - 1) << BRW_SURFACE_DEPTH_SHIFT | - (mt->pitch - 1) << BRW_SURFACE_PITCH_SHIFT); - - const unsigned min_lod = tObj->MinLevel + tObj->BaseLevel - mt->first_level; - surf[4] = (brw_get_surface_num_multisamples(mt->num_samples) | - SET_FIELD(min_lod, BRW_SURFACE_MIN_LOD) | - SET_FIELD(tObj->MinLayer, BRW_SURFACE_MIN_ARRAY_ELEMENT)); - - surf[5] = mt->valign == 4 ? BRW_SURFACE_VERTICAL_ALIGN_ENABLE : 0; - - /* Emit relocation to surface contents */ - drm_intel_bo_emit_reloc(brw->batch.bo, - *surf_offset + 4, - mt->bo, - surf[1] - mt->bo->offset64, - I915_GEM_DOMAIN_SAMPLER, 0); + brw_emit_buffer_surface_state(brw, surf_offset, bo, + tObj->BufferOffset, + brw_format, + size, + texel_size, + false /* rw */); } /** @@ -415,9 +722,9 @@ uint32_t size, uint32_t *out_offset) { - brw->vtbl.emit_buffer_surface_state(brw, out_offset, bo, offset, - BRW_SURFACEFORMAT_R32G32B32A32_FLOAT, - size, 1, false); + brw_emit_buffer_surface_state(brw, out_offset, bo, offset, + BRW_SURFACEFORMAT_R32G32B32A32_FLOAT, + size, 1, false); } /** @@ -437,9 +744,9 @@ * include a pixel mask header that we need to ensure correct behavior * with helper invocations, which cannot write to the buffer. */ - brw->vtbl.emit_buffer_surface_state(brw, out_offset, bo, offset, - BRW_SURFACEFORMAT_RAW, - size, 1, true); + brw_emit_buffer_surface_state(brw, out_offset, bo, offset, + BRW_SURFACEFORMAT_RAW, + size, 1, true); } /** @@ -538,13 +845,13 @@ { struct brw_stage_state *stage_state = &brw->wm.base; /* BRW_NEW_FRAGMENT_PROGRAM */ - struct brw_fragment_program *fp = - (struct brw_fragment_program *) brw->fragment_program; + struct brw_program *fp = (struct brw_program *) brw->fragment_program; /* BRW_NEW_FS_PROG_DATA */ - struct brw_stage_prog_data *prog_data = &brw->wm.prog_data->base; + struct brw_stage_prog_data *prog_data = brw->wm.base.prog_data; + _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_FRAGMENT); /* _NEW_PROGRAM_CONSTANTS */ - brw_upload_pull_constants(brw, BRW_NEW_SURFACES, &fp->program.Base, + brw_upload_pull_constants(brw, BRW_NEW_SURFACES, &fp->program, stage_state, prog_data); } @@ -661,10 +968,10 @@ * usable for further buffers when doing ARB_draw_buffer support. */ static uint32_t -brw_update_renderbuffer_surface(struct brw_context *brw, - struct gl_renderbuffer *rb, - bool layered, unsigned unit, - uint32_t surf_index) +gen4_update_renderbuffer_surface(struct brw_context *brw, + struct gl_renderbuffer *rb, + uint32_t flags, unsigned unit, + uint32_t surf_index) { struct gl_context *ctx = &brw->ctx; struct intel_renderbuffer *irb = intel_renderbuffer(rb); @@ -677,7 +984,8 @@ mesa_format rb_format = _mesa_get_render_format(ctx, intel_rb_format(irb)); /* BRW_NEW_FS_PROG_DATA */ - assert(!layered); + assert(!(flags & INTEL_RENDERBUFFER_LAYERED)); + assert(!(flags & INTEL_AUX_BUFFER_DISABLED)); if (rb->TexImage && !brw->has_surface_tile_offset) { intel_renderbuffer_get_tile_offsets(irb, &tile_x, &tile_y); @@ -694,8 +1002,6 @@ } } - intel_miptree_used_for_rendering(irb->mt); - surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, 6 * 4, 32, &offset); format = brw->render_target_format[rb_format]; @@ -732,8 +1038,8 @@ if (brw->gen < 6) { /* _NEW_COLOR */ - if (!ctx->Color.ColorLogicOpEnabled && - (ctx->Color.BlendEnabled & (1 << unit))) + if (!ctx->Color.ColorLogicOpEnabled && !ctx->Color._AdvancedBlendMode && + (ctx->Color.BlendEnabled & (1 << unit))) surf[0] |= BRW_SURFACE_BLEND_ENABLED; if (!ctx->Color.ColorMask[unit][0]) @@ -780,12 +1086,15 @@ if (fb->_NumColorDrawBuffers >= 1) { for (i = 0; i < fb->_NumColorDrawBuffers; i++) { const uint32_t surf_index = render_target_start + i; + const int flags = (_mesa_geometric_layers(fb) > 0 ? + INTEL_RENDERBUFFER_LAYERED : 0) | + (brw->draw_aux_buffer_disabled[i] ? + INTEL_AUX_BUFFER_DISABLED : 0); if (intel_renderbuffer(fb->_ColorDrawBuffers[i])) { surf_offset[surf_index] = brw->vtbl.update_renderbuffer_surface( - brw, fb->_ColorDrawBuffers[i], - _mesa_geometric_layers(fb) > 0, i, surf_index); + brw, fb->_ColorDrawBuffers[i], flags, i, surf_index); } else { brw->vtbl.emit_null_surface_state(brw, w, h, s, &surf_offset[surf_index]); @@ -803,11 +1112,15 @@ { const struct gl_context *ctx = &brw->ctx; + /* BRW_NEW_FS_PROG_DATA */ + const struct brw_wm_prog_data *wm_prog_data = + brw_wm_prog_data(brw->wm.base.prog_data); + /* _NEW_BUFFERS | _NEW_COLOR */ const struct gl_framebuffer *fb = ctx->DrawBuffer; brw_update_renderbuffer_surfaces( brw, fb, - brw->wm.prog_data->binding_table.render_target_start, + wm_prog_data->binding_table.render_target_start, brw->wm.base.surf_offset); brw->ctx.NewDriverState |= BRW_NEW_SURFACES; } @@ -832,6 +1145,96 @@ .emit = update_renderbuffer_surfaces, }; +static void +update_renderbuffer_read_surfaces(struct brw_context *brw) +{ + const struct gl_context *ctx = &brw->ctx; + + /* BRW_NEW_FS_PROG_DATA */ + const struct brw_wm_prog_data *wm_prog_data = + brw_wm_prog_data(brw->wm.base.prog_data); + + /* BRW_NEW_FRAGMENT_PROGRAM */ + if (!ctx->Extensions.MESA_shader_framebuffer_fetch && + brw->fragment_program && brw->fragment_program->info.outputs_read) { + /* _NEW_BUFFERS */ + const struct gl_framebuffer *fb = ctx->DrawBuffer; + + for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) { + struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[i]; + const struct intel_renderbuffer *irb = intel_renderbuffer(rb); + const unsigned surf_index = + wm_prog_data->binding_table.render_target_read_start + i; + uint32_t *surf_offset = &brw->wm.base.surf_offset[surf_index]; + + if (irb) { + const unsigned format = brw->render_target_format[ + _mesa_get_render_format(ctx, intel_rb_format(irb))]; + assert(isl_format_supports_sampling(&brw->screen->devinfo, + format)); + + /* Override the target of the texture if the render buffer is a + * single slice of a 3D texture (since the minimum array element + * field of the surface state structure is ignored by the sampler + * unit for 3D textures on some hardware), or if the render buffer + * is a 1D array (since shaders always provide the array index + * coordinate at the Z component to avoid state-dependent + * recompiles when changing the texture target of the + * framebuffer). + */ + const GLenum target = + (irb->mt->target == GL_TEXTURE_3D && + irb->layer_count == 1) ? GL_TEXTURE_2D : + irb->mt->target == GL_TEXTURE_1D_ARRAY ? GL_TEXTURE_2D_ARRAY : + irb->mt->target; + + /* intel_renderbuffer::mt_layer is expressed in sample units for + * the UMS and CMS multisample layouts, but + * intel_renderbuffer::layer_count is expressed in units of whole + * logical layers regardless of the multisample layout. + */ + const unsigned mt_layer_unit = + (irb->mt->msaa_layout == INTEL_MSAA_LAYOUT_UMS || + irb->mt->msaa_layout == INTEL_MSAA_LAYOUT_CMS) ? + MAX2(irb->mt->num_samples, 1) : 1; + + const struct isl_view view = { + .format = format, + .base_level = irb->mt_level - irb->mt->first_level, + .levels = 1, + .base_array_layer = irb->mt_layer / mt_layer_unit, + .array_len = irb->layer_count, + .swizzle = ISL_SWIZZLE_IDENTITY, + .usage = ISL_SURF_USAGE_TEXTURE_BIT, + }; + + const int flags = brw->draw_aux_buffer_disabled[i] ? + INTEL_AUX_BUFFER_DISABLED : 0; + brw_emit_surface_state(brw, irb->mt, flags, target, view, + tex_mocs[brw->gen], + surf_offset, surf_index, + I915_GEM_DOMAIN_SAMPLER, 0); + + } else { + brw->vtbl.emit_null_surface_state( + brw, _mesa_geometric_width(fb), _mesa_geometric_height(fb), + _mesa_geometric_samples(fb), surf_offset); + } + } + + brw->ctx.NewDriverState |= BRW_NEW_SURFACES; + } +} + +const struct brw_tracked_state brw_renderbuffer_read_surfaces = { + .dirty = { + .mesa = _NEW_BUFFERS, + .brw = BRW_NEW_BATCH | + BRW_NEW_FRAGMENT_PROGRAM | + BRW_NEW_FS_PROG_DATA, + }, + .emit = update_renderbuffer_read_surfaces, +}; static void update_stage_texture_surfaces(struct brw_context *brw, @@ -852,7 +1255,7 @@ else surf_offset += stage_state->prog_data->binding_table.plane_start[plane]; - unsigned num_samplers = _mesa_fls(prog->SamplersUsed); + unsigned num_samplers = util_last_bit(prog->SamplersUsed); for (unsigned s = 0; s < num_samplers; s++) { surf_offset[s] = 0; @@ -861,7 +1264,7 @@ /* _NEW_TEXTURE */ if (ctx->Texture.Unit[unit]._Current) { - brw->vtbl.update_texture_surface(ctx, unit, surf_offset + s, for_gather, plane); + brw_update_texture_surface(ctx, unit, surf_offset + s, for_gather, plane); } } } @@ -898,15 +1301,15 @@ * allows the surface format to be overriden for only the * gather4 messages. */ if (brw->gen < 8) { - if (vs && vs->UsesGather) + if (vs && vs->nir->info->uses_texture_gather) update_stage_texture_surfaces(brw, vs, &brw->vs.base, true, 0); - if (tcs && tcs->UsesGather) + if (tcs && tcs->nir->info->uses_texture_gather) update_stage_texture_surfaces(brw, tcs, &brw->tcs.base, true, 0); - if (tes && tes->UsesGather) + if (tes && tes->nir->info->uses_texture_gather) update_stage_texture_surfaces(brw, tes, &brw->tes.base, true, 0); - if (gs && gs->UsesGather) + if (gs && gs->nir->info->uses_texture_gather) update_stage_texture_surfaces(brw, gs, &brw->gs.base, true, 0); - if (fs && fs->UsesGather) + if (fs && fs->nir->info->uses_texture_gather) update_stage_texture_surfaces(brw, fs, &brw->wm.base, true, 0); } @@ -951,7 +1354,7 @@ * gather4 messages. */ if (brw->gen < 8) { - if (cs && cs->UsesGather) + if (cs && cs->nir->info->uses_texture_gather) update_stage_texture_surfaces(brw, cs, &brw->cs.base, true, 0); } @@ -970,22 +1373,21 @@ void -brw_upload_ubo_surfaces(struct brw_context *brw, - struct gl_shader *shader, +brw_upload_ubo_surfaces(struct brw_context *brw, struct gl_program *prog, struct brw_stage_state *stage_state, struct brw_stage_prog_data *prog_data) { struct gl_context *ctx = &brw->ctx; - if (!shader) + if (!prog) return; uint32_t *ubo_surf_offsets = &stage_state->surf_offset[prog_data->binding_table.ubo_start]; - for (int i = 0; i < shader->NumUniformBlocks; i++) { + for (int i = 0; i < prog->info.num_ubos; i++) { struct gl_uniform_buffer_binding *binding = - &ctx->UniformBufferBindings[shader->UniformBlocks[i]->Binding]; + &ctx->UniformBufferBindings[prog->sh.UniformBlocks[i]->Binding]; if (binding->BufferObject == ctx->Shared->NullBufferObj) { brw->vtbl.emit_null_surface_state(brw, 1, 1, 1, &ubo_surf_offsets[i]); @@ -1008,9 +1410,9 @@ uint32_t *ssbo_surf_offsets = &stage_state->surf_offset[prog_data->binding_table.ssbo_start]; - for (int i = 0; i < shader->NumShaderStorageBlocks; i++) { + for (int i = 0; i < prog->info.num_ssbos; i++) { struct gl_shader_storage_buffer_binding *binding = - &ctx->ShaderStorageBufferBindings[shader->ShaderStorageBlocks[i]->Binding]; + &ctx->ShaderStorageBufferBindings[prog->sh.ShaderStorageBlocks[i]->Binding]; if (binding->BufferObject == ctx->Shared->NullBufferObj) { brw->vtbl.emit_null_surface_state(brw, 1, 1, 1, &ssbo_surf_offsets[i]); @@ -1030,7 +1432,7 @@ } } - if (shader->NumUniformBlocks || shader->NumShaderStorageBlocks) + if (prog->info.num_ubos || prog->info.num_ssbos) brw->ctx.NewDriverState |= BRW_NEW_SURFACES; } @@ -1039,14 +1441,10 @@ { struct gl_context *ctx = &brw->ctx; /* _NEW_PROGRAM */ - struct gl_shader_program *prog = ctx->_Shader->_CurrentFragmentProgram; - - if (!prog) - return; + struct gl_program *prog = ctx->_Shader->_CurrentFragmentProgram; /* BRW_NEW_FS_PROG_DATA */ - brw_upload_ubo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_FRAGMENT], - &brw->wm.base, &brw->wm.prog_data->base); + brw_upload_ubo_surfaces(brw, prog, &brw->wm.base, brw->wm.base.prog_data); } const struct brw_tracked_state brw_wm_ubo_surfaces = { @@ -1068,12 +1466,12 @@ struct gl_shader_program *prog = ctx->_Shader->CurrentProgram[MESA_SHADER_COMPUTE]; - if (!prog) + if (!prog || !prog->_LinkedShaders[MESA_SHADER_COMPUTE]) return; /* BRW_NEW_CS_PROG_DATA */ - brw_upload_ubo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_COMPUTE], - &brw->cs.base, &brw->cs.prog_data->base); + brw_upload_ubo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_COMPUTE]->Program, + &brw->cs.base, brw->cs.base.prog_data); } const struct brw_tracked_state brw_cs_ubo_surfaces = { @@ -1089,7 +1487,7 @@ void brw_upload_abo_surfaces(struct brw_context *brw, - struct gl_shader *shader, + const struct gl_program *prog, struct brw_stage_state *stage_state, struct brw_stage_prog_data *prog_data) { @@ -1097,18 +1495,18 @@ uint32_t *surf_offsets = &stage_state->surf_offset[prog_data->binding_table.abo_start]; - if (shader && shader->NumAtomicBuffers) { - for (unsigned i = 0; i < shader->NumAtomicBuffers; i++) { + if (prog->info.num_abos) { + for (unsigned i = 0; i < prog->info.num_abos; i++) { struct gl_atomic_buffer_binding *binding = - &ctx->AtomicBufferBindings[shader->AtomicBuffers[i]->Binding]; + &ctx->AtomicBufferBindings[prog->sh.AtomicBuffers[i]->Binding]; struct intel_buffer_object *intel_bo = intel_buffer_object(binding->BufferObject); drm_intel_bo *bo = intel_bufferobj_buffer( brw, intel_bo, binding->Offset, intel_bo->Base.Size - binding->Offset); - brw->vtbl.emit_buffer_surface_state(brw, &surf_offsets[i], bo, - binding->Offset, BRW_SURFACEFORMAT_RAW, - bo->size - binding->Offset, 1, true); + brw_emit_buffer_surface_state(brw, &surf_offsets[i], bo, + binding->Offset, BRW_SURFACEFORMAT_RAW, + bo->size - binding->Offset, 1, true); } brw->ctx.NewDriverState |= BRW_NEW_SURFACES; @@ -1118,14 +1516,12 @@ static void brw_upload_wm_abo_surfaces(struct brw_context *brw) { - struct gl_context *ctx = &brw->ctx; /* _NEW_PROGRAM */ - struct gl_shader_program *prog = ctx->_Shader->_CurrentFragmentProgram; + const struct gl_program *wm = brw->fragment_program; - if (prog) { + if (wm) { /* BRW_NEW_FS_PROG_DATA */ - brw_upload_abo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_FRAGMENT], - &brw->wm.base, &brw->wm.prog_data->base); + brw_upload_abo_surfaces(brw, wm, &brw->wm.base, brw->wm.base.prog_data); } } @@ -1143,15 +1539,12 @@ static void brw_upload_cs_abo_surfaces(struct brw_context *brw) { - struct gl_context *ctx = &brw->ctx; /* _NEW_PROGRAM */ - struct gl_shader_program *prog = - ctx->_Shader->CurrentProgram[MESA_SHADER_COMPUTE]; + const struct gl_program *cp = brw->compute_program; - if (prog) { + if (cp) { /* BRW_NEW_CS_PROG_DATA */ - brw_upload_abo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_COMPUTE], - &brw->cs.base, &brw->cs.prog_data->base); + brw_upload_abo_surfaces(brw, cp, &brw->cs.base, brw->cs.base.prog_data); } } @@ -1169,15 +1562,13 @@ static void brw_upload_cs_image_surfaces(struct brw_context *brw) { - struct gl_context *ctx = &brw->ctx; /* _NEW_PROGRAM */ - struct gl_shader_program *prog = - ctx->_Shader->CurrentProgram[MESA_SHADER_COMPUTE]; + const struct gl_program *cp = brw->compute_program; - if (prog) { + if (cp) { /* BRW_NEW_CS_PROG_DATA, BRW_NEW_IMAGE_UNITS, _NEW_TEXTURE */ - brw_upload_image_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_COMPUTE], - &brw->cs.base, &brw->cs.prog_data->base); + brw_upload_image_surfaces(brw, cp, &brw->cs.base, + brw->cs.base.prog_data); } } @@ -1195,7 +1586,7 @@ static uint32_t get_image_format(struct brw_context *brw, mesa_format format, GLenum access) { - const struct brw_device_info *devinfo = brw->intelScreen->devinfo; + const struct gen_device_info *devinfo = &brw->screen->devinfo; uint32_t hw_format = brw_format_for_mesa_format(format); if (access == GL_WRITE_ONLY) { return hw_format; @@ -1236,10 +1627,10 @@ struct brw_image_param *param) { struct gl_buffer_object *obj = u->TexObj->BufferObject; - + const uint32_t size = MIN2((uint32_t)u->TexObj->BufferSize, obj->Size); update_default_image_param(brw, u, surface_idx, param); - param->size[0] = obj->Size / _mesa_get_format_bytes(u->_ActualFormat); + param->size[0] = size / _mesa_get_format_bytes(u->_ActualFormat); param->stride[0] = _mesa_get_format_bytes(u->_ActualFormat); } @@ -1328,9 +1719,9 @@ const unsigned texel_size = (format == BRW_SURFACEFORMAT_RAW ? 1 : _mesa_get_format_bytes(u->_ActualFormat)); - brw->vtbl.emit_buffer_surface_state( + brw_emit_buffer_surface_state( brw, surf_offset, intel_obj->buffer, obj->BufferOffset, - format, intel_obj->Base.Size / texel_size, texel_size, + format, intel_obj->Base.Size, texel_size, access != GL_READ_ONLY); update_buffer_image_param(brw, u, surface_idx, param); @@ -1340,28 +1731,37 @@ struct intel_mipmap_tree *mt = intel_obj->mt; if (format == BRW_SURFACEFORMAT_RAW) { - brw->vtbl.emit_buffer_surface_state( + brw_emit_buffer_surface_state( brw, surf_offset, mt->bo, mt->offset, format, mt->bo->size - mt->offset, 1 /* pitch */, access != GL_READ_ONLY); } else { - const unsigned min_layer = obj->MinLayer + u->_Layer; - const unsigned min_level = obj->MinLevel + u->Level; const unsigned num_layers = (!u->Layered ? 1 : obj->Target == GL_TEXTURE_CUBE_MAP ? 6 : mt->logical_depth0); - const GLenum target = (obj->Target == GL_TEXTURE_CUBE_MAP || - obj->Target == GL_TEXTURE_CUBE_MAP_ARRAY ? - GL_TEXTURE_2D_ARRAY : obj->Target); - const int surf_index = surf_offset - &brw->wm.base.surf_offset[0]; - brw->vtbl.emit_texture_surface_state( - brw, mt, target, - min_layer, min_layer + num_layers, - min_level, min_level + 1, - format, SWIZZLE_XYZW, - surf_offset, surf_index, access != GL_READ_ONLY, false); + struct isl_view view = { + .format = format, + .base_level = obj->MinLevel + u->Level, + .levels = 1, + .base_array_layer = obj->MinLayer + u->_Layer, + .array_len = num_layers, + .swizzle = ISL_SWIZZLE_IDENTITY, + .usage = ISL_SURF_USAGE_STORAGE_BIT, + }; + + const int surf_index = surf_offset - &brw->wm.base.surf_offset[0]; + const bool unresolved = intel_miptree_has_color_unresolved( + mt, view.base_level, view.levels, + view.base_array_layer, view.array_len); + const int flags = unresolved ? 0 : INTEL_AUX_BUFFER_DISABLED; + brw_emit_surface_state(brw, mt, flags, mt->target, view, + tex_mocs[brw->gen], + surf_offset, surf_index, + I915_GEM_DOMAIN_SAMPLER, + access == GL_READ_ONLY ? 0 : + I915_GEM_DOMAIN_SAMPLER); } update_texture_image_param(brw, u, surface_idx, param); @@ -1375,18 +1775,19 @@ void brw_upload_image_surfaces(struct brw_context *brw, - struct gl_shader *shader, + const struct gl_program *prog, struct brw_stage_state *stage_state, struct brw_stage_prog_data *prog_data) { + assert(prog); struct gl_context *ctx = &brw->ctx; - if (shader && shader->NumImages) { - for (unsigned i = 0; i < shader->NumImages; i++) { - struct gl_image_unit *u = &ctx->ImageUnits[shader->ImageUnits[i]]; + if (prog->info.num_images) { + for (unsigned i = 0; i < prog->info.num_images; i++) { + struct gl_image_unit *u = &ctx->ImageUnits[prog->sh.ImageUnits[i]]; const unsigned surf_idx = prog_data->binding_table.image_start + i; - update_image_surface(brw, u, shader->ImageAccess[i], + update_image_surface(brw, u, prog->sh.ImageAccess[i], surf_idx, &stage_state->surf_offset[surf_idx], &prog_data->image_param[i]); @@ -1404,14 +1805,13 @@ static void brw_upload_wm_image_surfaces(struct brw_context *brw) { - struct gl_context *ctx = &brw->ctx; /* BRW_NEW_FRAGMENT_PROGRAM */ - struct gl_shader_program *prog = ctx->_Shader->_CurrentFragmentProgram; + const struct gl_program *wm = brw->fragment_program; - if (prog) { + if (wm) { /* BRW_NEW_FS_PROG_DATA, BRW_NEW_IMAGE_UNITS, _NEW_TEXTURE */ - brw_upload_image_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_FRAGMENT], - &brw->wm.base, &brw->wm.prog_data->base); + brw_upload_image_surfaces(brw, wm, &brw->wm.base, + brw->wm.base.prog_data); } } @@ -1430,10 +1830,15 @@ void gen4_init_vtable_surface_functions(struct brw_context *brw) { - brw->vtbl.update_texture_surface = brw_update_texture_surface; - brw->vtbl.update_renderbuffer_surface = brw_update_renderbuffer_surface; + brw->vtbl.update_renderbuffer_surface = gen4_update_renderbuffer_surface; brw->vtbl.emit_null_surface_state = brw_emit_null_surface_state; - brw->vtbl.emit_buffer_surface_state = gen4_emit_buffer_surface_state; +} + +void +gen6_init_vtable_surface_functions(struct brw_context *brw) +{ + gen4_init_vtable_surface_functions(brw); + brw->vtbl.update_renderbuffer_surface = brw_update_renderbuffer_surface; } static void @@ -1444,7 +1849,8 @@ struct gl_shader_program *prog = ctx->_Shader->CurrentProgram[MESA_SHADER_COMPUTE]; /* BRW_NEW_CS_PROG_DATA */ - const struct brw_cs_prog_data *cs_prog_data = brw->cs.prog_data; + const struct brw_cs_prog_data *cs_prog_data = + brw_cs_prog_data(brw->cs.base.prog_data); if (prog && cs_prog_data->uses_num_work_groups) { const unsigned surf_idx = @@ -1466,10 +1872,10 @@ bo_offset = brw->compute.num_work_groups_offset; } - brw->vtbl.emit_buffer_surface_state(brw, surf_offset, - bo, bo_offset, - BRW_SURFACEFORMAT_RAW, - 3 * sizeof(GLuint), 1, true); + brw_emit_buffer_surface_state(brw, surf_offset, + bo, bo_offset, + BRW_SURFACEFORMAT_RAW, + 3 * sizeof(GLuint), 1, true); brw->ctx.NewDriverState |= BRW_NEW_SURFACES; } } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_blorp.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_blorp.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_blorp.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_blorp.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,1059 +0,0 @@ -/* - * Copyright © 2011 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - -#include - -#include "intel_batchbuffer.h" -#include "intel_mipmap_tree.h" - -#include "brw_context.h" -#include "brw_state.h" - -#include "brw_blorp.h" - -static void -gen6_blorp_emit_vertex_buffer_state(struct brw_context *brw, - unsigned num_elems, - unsigned vbo_size, - uint32_t vertex_offset) -{ - /* 3DSTATE_VERTEX_BUFFERS */ - const int num_buffers = 1; - const int batch_length = 1 + 4 * num_buffers; - - uint32_t dw0 = GEN6_VB0_ACCESS_VERTEXDATA | - (num_elems * sizeof(float)) << BRW_VB0_PITCH_SHIFT; - - if (brw->gen >= 7) - dw0 |= GEN7_VB0_ADDRESS_MODIFYENABLE; - - switch (brw->gen) { - case 7: - dw0 |= GEN7_MOCS_L3 << 16; - break; - case 8: - dw0 |= BDW_MOCS_WB << 16; - break; - case 9: - dw0 |= SKL_MOCS_WB << 16; - break; - } - - BEGIN_BATCH(batch_length); - OUT_BATCH((_3DSTATE_VERTEX_BUFFERS << 16) | (batch_length - 2)); - OUT_BATCH(dw0); - if (brw->gen >= 8) { - OUT_RELOC64(brw->batch.bo, I915_GEM_DOMAIN_VERTEX, 0, vertex_offset); - OUT_BATCH(vbo_size); - } else { - /* start address */ - OUT_RELOC(brw->batch.bo, I915_GEM_DOMAIN_VERTEX, 0, - vertex_offset); - /* end address */ - OUT_RELOC(brw->batch.bo, I915_GEM_DOMAIN_VERTEX, 0, - vertex_offset + vbo_size - 1); - OUT_BATCH(0); - } - ADVANCE_BATCH(); -} - -void -gen6_blorp_emit_vertices(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - uint32_t vertex_offset; - - /* Setup VBO for the rectangle primitive.. - * - * A rectangle primitive (3DPRIM_RECTLIST) consists of only three - * vertices. The vertices reside in screen space with DirectX coordinates - * (that is, (0, 0) is the upper left corner). - * - * v2 ------ implied - * | | - * | | - * v0 ----- v1 - * - * Since the VS is disabled, the clipper loads each VUE directly from - * the URB. This is controlled by the 3DSTATE_VERTEX_BUFFERS and - * 3DSTATE_VERTEX_ELEMENTS packets below. The VUE contents are as follows: - * dw0: Reserved, MBZ. - * dw1: Render Target Array Index. The HiZ op does not use indexed - * vertices, so set the dword to 0. - * dw2: Viewport Index. The HiZ op disables viewport mapping and - * scissoring, so set the dword to 0. - * dw3: Point Width: The HiZ op does not emit the POINTLIST primitive, so - * set the dword to 0. - * dw4: Vertex Position X. - * dw5: Vertex Position Y. - * dw6: Vertex Position Z. - * dw7: Vertex Position W. - * - * For details, see the Sandybridge PRM, Volume 2, Part 1, Section 1.5.1 - * "Vertex URB Entry (VUE) Formats". - * - * Only vertex position X and Y are going to be variable, Z is fixed to - * zero and W to one. Header words dw0-3 are all zero. There is no need to - * include the fixed values in the vertex buffer. Vertex fetcher can be - * instructed to fill vertex elements with constant values of one and zero - * instead of reading them from the buffer. See the vertex element setup - * below. - */ - { - float *vertex_data; - - const float vertices[] = { - /* v0 */ (float)params->x0, (float)params->y1, - /* v1 */ (float)params->x1, (float)params->y1, - /* v2 */ (float)params->x0, (float)params->y0, - }; - - vertex_data = (float *) brw_state_batch(brw, AUB_TRACE_VERTEX_BUFFER, - sizeof(vertices), 32, - &vertex_offset); - memcpy(vertex_data, vertices, sizeof(vertices)); - - const unsigned blorp_num_vue_elems = 2; - gen6_blorp_emit_vertex_buffer_state(brw, blorp_num_vue_elems, - sizeof(vertices), vertex_offset); - } - - /* 3DSTATE_VERTEX_ELEMENTS - * - * Fetch dwords 0 - 7 from each VUE. See the comments above where - * the vertex_bo is filled with data. - */ - { - const int num_elements = 2; - const int batch_length = 1 + 2 * num_elements; - - BEGIN_BATCH(batch_length); - OUT_BATCH((_3DSTATE_VERTEX_ELEMENTS << 16) | (batch_length - 2)); - /* Element 0 */ - OUT_BATCH(GEN6_VE0_VALID | - BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_VE0_FORMAT_SHIFT | - 0 << BRW_VE0_SRC_OFFSET_SHIFT); - OUT_BATCH(BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_0_SHIFT | - BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT | - BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT | - BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_3_SHIFT); - /* Element 1 */ - OUT_BATCH(GEN6_VE0_VALID | - BRW_SURFACEFORMAT_R32G32_FLOAT << BRW_VE0_FORMAT_SHIFT | - 0 << BRW_VE0_SRC_OFFSET_SHIFT); - OUT_BATCH(BRW_VE1_COMPONENT_STORE_SRC << BRW_VE1_COMPONENT_0_SHIFT | - BRW_VE1_COMPONENT_STORE_SRC << BRW_VE1_COMPONENT_1_SHIFT | - BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT | - BRW_VE1_COMPONENT_STORE_1_FLT << BRW_VE1_COMPONENT_3_SHIFT); - ADVANCE_BATCH(); - } -} - - -/* 3DSTATE_URB - * - * Assign the entire URB to the VS. Even though the VS disabled, URB space - * is still needed because the clipper loads the VUE's from the URB. From - * the Sandybridge PRM, Volume 2, Part 1, Section 3DSTATE, - * Dword 1.15:0 "VS Number of URB Entries": - * This field is always used (even if VS Function Enable is DISABLED). - * - * The warning below appears in the PRM (Section 3DSTATE_URB), but we can - * safely ignore it because this batch contains only one draw call. - * Because of URB corruption caused by allocating a previous GS unit - * URB entry to the VS unit, software is required to send a “GS NULL - * Fence” (Send URB fence with VS URB size == 1 and GS URB size == 0) - * plus a dummy DRAW call before any case where VS will be taking over - * GS URB space. - */ -static void -gen6_blorp_emit_urb_config(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - BEGIN_BATCH(3); - OUT_BATCH(_3DSTATE_URB << 16 | (3 - 2)); - OUT_BATCH(brw->urb.max_vs_entries << GEN6_URB_VS_ENTRIES_SHIFT); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - - -/* BLEND_STATE */ -uint32_t -gen6_blorp_emit_blend_state(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - uint32_t cc_blend_state_offset; - - assume(params->num_draw_buffers); - - const unsigned size = params->num_draw_buffers * - sizeof(struct gen6_blend_state); - struct gen6_blend_state *blend = (struct gen6_blend_state *) - brw_state_batch(brw, AUB_TRACE_BLEND_STATE, size, 64, - &cc_blend_state_offset); - - memset(blend, 0, size); - - for (unsigned i = 0; i < params->num_draw_buffers; ++i) { - blend[i].blend1.pre_blend_clamp_enable = 1; - blend[i].blend1.post_blend_clamp_enable = 1; - blend[i].blend1.clamp_range = BRW_RENDERTARGET_CLAMPRANGE_FORMAT; - - blend[i].blend1.write_disable_r = params->color_write_disable[0]; - blend[i].blend1.write_disable_g = params->color_write_disable[1]; - blend[i].blend1.write_disable_b = params->color_write_disable[2]; - blend[i].blend1.write_disable_a = params->color_write_disable[3]; - } - - return cc_blend_state_offset; -} - - -/* CC_STATE */ -uint32_t -gen6_blorp_emit_cc_state(struct brw_context *brw) -{ - uint32_t cc_state_offset; - - struct gen6_color_calc_state *cc = (struct gen6_color_calc_state *) - brw_state_batch(brw, AUB_TRACE_CC_STATE, - sizeof(gen6_color_calc_state), 64, - &cc_state_offset); - memset(cc, 0, sizeof(*cc)); - - return cc_state_offset; -} - - -/** - * \param out_offset is relative to - * CMD_STATE_BASE_ADDRESS.DynamicStateBaseAddress. - */ -uint32_t -gen6_blorp_emit_depth_stencil_state(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - uint32_t depthstencil_offset; - - struct gen6_depth_stencil_state *state; - state = (struct gen6_depth_stencil_state *) - brw_state_batch(brw, AUB_TRACE_DEPTH_STENCIL_STATE, - sizeof(*state), 64, - &depthstencil_offset); - memset(state, 0, sizeof(*state)); - - /* See the following sections of the Sandy Bridge PRM, Volume 1, Part2: - * - 7.5.3.1 Depth Buffer Clear - * - 7.5.3.2 Depth Buffer Resolve - * - 7.5.3.3 Hierarchical Depth Buffer Resolve - */ - state->ds2.depth_write_enable = 1; - if (params->hiz_op == GEN6_HIZ_OP_DEPTH_RESOLVE) { - state->ds2.depth_test_enable = 1; - state->ds2.depth_test_func = BRW_COMPAREFUNCTION_NEVER; - } - - return depthstencil_offset; -} - - -/* 3DSTATE_CC_STATE_POINTERS - * - * The pointer offsets are relative to - * CMD_STATE_BASE_ADDRESS.DynamicStateBaseAddress. - * - * The HiZ op doesn't use BLEND_STATE or COLOR_CALC_STATE. - */ -static void -gen6_blorp_emit_cc_state_pointers(struct brw_context *brw, - const struct brw_blorp_params *params, - uint32_t cc_blend_state_offset, - uint32_t depthstencil_offset, - uint32_t cc_state_offset) -{ - BEGIN_BATCH(4); - OUT_BATCH(_3DSTATE_CC_STATE_POINTERS << 16 | (4 - 2)); - OUT_BATCH(cc_blend_state_offset | 1); /* BLEND_STATE offset */ - OUT_BATCH(depthstencil_offset | 1); /* DEPTH_STENCIL_STATE offset */ - OUT_BATCH(cc_state_offset | 1); /* COLOR_CALC_STATE offset */ - ADVANCE_BATCH(); -} - - -/* WM push constants */ -uint32_t -gen6_blorp_emit_wm_constants(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - uint32_t wm_push_const_offset; - - uint32_t *constants = brw_state_batch(brw, AUB_TRACE_WM_CONSTANTS, - sizeof(params->wm_push_consts), - 32, &wm_push_const_offset); - - const uint32_t *push_consts = (const uint32_t *)¶ms->wm_push_consts; - for (unsigned i = 0; i < params->wm_prog_data->nr_params; i++) - constants[i] = push_consts[params->wm_prog_data->param[i]]; - - return wm_push_const_offset; -} - - -/* SURFACE_STATE for renderbuffer or texture surface (see - * brw_update_renderbuffer_surface and brw_update_texture_surface) - */ -static uint32_t -gen6_blorp_emit_surface_state(struct brw_context *brw, - const struct brw_blorp_params *params, - const struct brw_blorp_surface_info *surface, - uint32_t read_domains, uint32_t write_domain) -{ - uint32_t wm_surf_offset; - uint32_t width = surface->width; - uint32_t height = surface->height; - if (surface->num_samples > 1) { - /* Since gen6 uses INTEL_MSAA_LAYOUT_IMS, width and height are measured - * in samples. But SURFACE_STATE wants them in pixels, so we need to - * divide them each by 2. - */ - width /= 2; - height /= 2; - } - struct intel_mipmap_tree *mt = surface->mt; - uint32_t tile_x, tile_y; - - uint32_t *surf = (uint32_t *) - brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, 6 * 4, 32, - &wm_surf_offset); - - surf[0] = (BRW_SURFACE_2D << BRW_SURFACE_TYPE_SHIFT | - BRW_SURFACE_MIPMAPLAYOUT_BELOW << BRW_SURFACE_MIPLAYOUT_SHIFT | - BRW_SURFACE_CUBEFACE_ENABLES | - surface->brw_surfaceformat << BRW_SURFACE_FORMAT_SHIFT); - - /* reloc */ - surf[1] = (brw_blorp_compute_tile_offsets(surface, &tile_x, &tile_y) + - mt->bo->offset64); - - surf[2] = (0 << BRW_SURFACE_LOD_SHIFT | - (width - 1) << BRW_SURFACE_WIDTH_SHIFT | - (height - 1) << BRW_SURFACE_HEIGHT_SHIFT); - - uint32_t tiling = surface->map_stencil_as_y_tiled - ? BRW_SURFACE_TILED | BRW_SURFACE_TILED_Y - : brw_get_surface_tiling_bits(mt->tiling); - uint32_t pitch_bytes = mt->pitch; - if (surface->map_stencil_as_y_tiled) - pitch_bytes *= 2; - surf[3] = (tiling | - 0 << BRW_SURFACE_DEPTH_SHIFT | - (pitch_bytes - 1) << BRW_SURFACE_PITCH_SHIFT); - - surf[4] = brw_get_surface_num_multisamples(surface->num_samples); - - /* Note that the low bits of these fields are missing, so - * there's the possibility of getting in trouble. - */ - assert(tile_x % 4 == 0); - assert(tile_y % 2 == 0); - surf[5] = ((tile_x / 4) << BRW_SURFACE_X_OFFSET_SHIFT | - (tile_y / 2) << BRW_SURFACE_Y_OFFSET_SHIFT | - (surface->mt->valign == 4 ? - BRW_SURFACE_VERTICAL_ALIGN_ENABLE : 0)); - - /* Emit relocation to surface contents */ - drm_intel_bo_emit_reloc(brw->batch.bo, - wm_surf_offset + 4, - mt->bo, - surf[1] - mt->bo->offset64, - read_domains, write_domain); - - return wm_surf_offset; -} - - -/* BINDING_TABLE. See brw_wm_binding_table(). */ -uint32_t -gen6_blorp_emit_binding_table(struct brw_context *brw, - uint32_t wm_surf_offset_renderbuffer, - uint32_t wm_surf_offset_texture) -{ - uint32_t wm_bind_bo_offset; - uint32_t *bind = (uint32_t *) - brw_state_batch(brw, AUB_TRACE_BINDING_TABLE, - sizeof(uint32_t) * - BRW_BLORP_NUM_BINDING_TABLE_ENTRIES, - 32, /* alignment */ - &wm_bind_bo_offset); - bind[BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX] = - wm_surf_offset_renderbuffer; - bind[BRW_BLORP_TEXTURE_BINDING_TABLE_INDEX] = wm_surf_offset_texture; - - return wm_bind_bo_offset; -} - - -/** - * SAMPLER_STATE. See brw_update_sampler_state(). - */ -uint32_t -gen6_blorp_emit_sampler_state(struct brw_context *brw, - unsigned tex_filter, unsigned max_lod, - bool non_normalized_coords) -{ - uint32_t sampler_offset; - uint32_t *sampler_state = (uint32_t *) - brw_state_batch(brw, AUB_TRACE_SAMPLER_STATE, 16, 32, &sampler_offset); - - unsigned address_rounding = BRW_ADDRESS_ROUNDING_ENABLE_U_MIN | - BRW_ADDRESS_ROUNDING_ENABLE_V_MIN | - BRW_ADDRESS_ROUNDING_ENABLE_R_MIN | - BRW_ADDRESS_ROUNDING_ENABLE_U_MAG | - BRW_ADDRESS_ROUNDING_ENABLE_V_MAG | - BRW_ADDRESS_ROUNDING_ENABLE_R_MAG; - - /* XXX: I don't think that using firstLevel, lastLevel works, - * because we always setup the surface state as if firstLevel == - * level zero. Probably have to subtract firstLevel from each of - * these: - */ - brw_emit_sampler_state(brw, - sampler_state, - sampler_offset, - tex_filter, /* min filter */ - tex_filter, /* mag filter */ - BRW_MIPFILTER_NONE, - BRW_ANISORATIO_2, - address_rounding, - BRW_TEXCOORDMODE_CLAMP, - BRW_TEXCOORDMODE_CLAMP, - BRW_TEXCOORDMODE_CLAMP, - 0, /* min LOD */ - max_lod, - 0, /* LOD bias */ - 0, /* shadow function */ - non_normalized_coords, - 0); /* border color offset - unused */ - - return sampler_offset; -} - - -/** - * 3DSTATE_SAMPLER_STATE_POINTERS. See upload_sampler_state_pointers(). - */ -static void -gen6_blorp_emit_sampler_state_pointers(struct brw_context *brw, - uint32_t sampler_offset) -{ - BEGIN_BATCH(4); - OUT_BATCH(_3DSTATE_SAMPLER_STATE_POINTERS << 16 | - VS_SAMPLER_STATE_CHANGE | - GS_SAMPLER_STATE_CHANGE | - PS_SAMPLER_STATE_CHANGE | - (4 - 2)); - OUT_BATCH(0); /* VS */ - OUT_BATCH(0); /* GS */ - OUT_BATCH(sampler_offset); - ADVANCE_BATCH(); -} - - -/* 3DSTATE_VS - * - * Disable vertex shader. - */ -void -gen6_blorp_emit_vs_disable(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - /* From the BSpec, 3D Pipeline > Geometry > Vertex Shader > State, - * 3DSTATE_VS, Dword 5.0 "VS Function Enable": - * - * [DevSNB] A pipeline flush must be programmed prior to a - * 3DSTATE_VS command that causes the VS Function Enable to - * toggle. Pipeline flush can be executed by sending a PIPE_CONTROL - * command with CS stall bit set and a post sync operation. - * - * We've already done one at the start of the BLORP operation. - */ - - /* Disable the push constant buffers. */ - BEGIN_BATCH(5); - OUT_BATCH(_3DSTATE_CONSTANT_VS << 16 | (5 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); - - BEGIN_BATCH(6); - OUT_BATCH(_3DSTATE_VS << 16 | (6 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - - -/* 3DSTATE_GS - * - * Disable the geometry shader. - */ -void -gen6_blorp_emit_gs_disable(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - /* Disable all the constant buffers. */ - BEGIN_BATCH(5); - OUT_BATCH(_3DSTATE_CONSTANT_GS << 16 | (5 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); - - BEGIN_BATCH(7); - OUT_BATCH(_3DSTATE_GS << 16 | (7 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); - brw->gs.enabled = false; -} - - -/* 3DSTATE_CLIP - * - * Disable the clipper. - * - * The BLORP op emits a rectangle primitive, which requires clipping to - * be disabled. From page 10 of the Sandy Bridge PRM Volume 2 Part 1 - * Section 1.3 "3D Primitives Overview": - * RECTLIST: - * Either the CLIP unit should be DISABLED, or the CLIP unit's Clip - * Mode should be set to a value other than CLIPMODE_NORMAL. - * - * Also disable perspective divide. This doesn't change the clipper's - * output, but does spare a few electrons. - */ -void -gen6_blorp_emit_clip_disable(struct brw_context *brw) -{ - BEGIN_BATCH(4); - OUT_BATCH(_3DSTATE_CLIP << 16 | (4 - 2)); - OUT_BATCH(0); - OUT_BATCH(GEN6_CLIP_PERSPECTIVE_DIVIDE_DISABLE); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - - -/* 3DSTATE_SF - * - * Disable ViewportTransformEnable (dw2.1) - * - * From the SandyBridge PRM, Volume 2, Part 1, Section 1.3, "3D - * Primitives Overview": - * RECTLIST: Viewport Mapping must be DISABLED (as is typical with the - * use of screen- space coordinates). - * - * A solid rectangle must be rendered, so set FrontFaceFillMode (dw2.4:3) - * and BackFaceFillMode (dw2.5:6) to SOLID(0). - * - * From the Sandy Bridge PRM, Volume 2, Part 1, Section - * 6.4.1.1 3DSTATE_SF, Field FrontFaceFillMode: - * SOLID: Any triangle or rectangle object found to be front-facing - * is rendered as a solid object. This setting is required when - * (rendering rectangle (RECTLIST) objects. - */ -static void -gen6_blorp_emit_sf_config(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - BEGIN_BATCH(20); - OUT_BATCH(_3DSTATE_SF << 16 | (20 - 2)); - OUT_BATCH(params->num_varyings << GEN6_SF_NUM_OUTPUTS_SHIFT | - 1 << GEN6_SF_URB_ENTRY_READ_LENGTH_SHIFT | - BRW_SF_URB_ENTRY_READ_OFFSET << - GEN6_SF_URB_ENTRY_READ_OFFSET_SHIFT); - OUT_BATCH(0); /* dw2 */ - OUT_BATCH(params->dst.num_samples > 1 ? GEN6_SF_MSRAST_ON_PATTERN : 0); - for (int i = 0; i < 16; ++i) - OUT_BATCH(0); - ADVANCE_BATCH(); -} - - -/** - * Enable or disable thread dispatch and set the HiZ op appropriately. - */ -static void -gen6_blorp_emit_wm_config(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - const struct brw_blorp_prog_data *prog_data = params->wm_prog_data; - uint32_t dw2, dw4, dw5, dw6, ksp0, ksp2; - - /* Even when thread dispatch is disabled, max threads (dw5.25:31) must be - * nonzero to prevent the GPU from hanging. While the documentation doesn't - * mention this explicitly, it notes that the valid range for the field is - * [1,39] = [2,40] threads, which excludes zero. - * - * To be safe (and to minimize extraneous code) we go ahead and fully - * configure the WM state whether or not there is a WM program. - */ - - dw2 = dw4 = dw5 = dw6 = ksp0 = ksp2 = 0; - switch (params->hiz_op) { - case GEN6_HIZ_OP_DEPTH_CLEAR: - dw4 |= GEN6_WM_DEPTH_CLEAR; - break; - case GEN6_HIZ_OP_DEPTH_RESOLVE: - dw4 |= GEN6_WM_DEPTH_RESOLVE; - break; - case GEN6_HIZ_OP_HIZ_RESOLVE: - dw4 |= GEN6_WM_HIERARCHICAL_DEPTH_RESOLVE; - break; - case GEN6_HIZ_OP_NONE: - break; - default: - unreachable("not reached"); - } - dw5 |= GEN6_WM_LINE_AA_WIDTH_1_0; - dw5 |= GEN6_WM_LINE_END_CAP_AA_WIDTH_0_5; - dw5 |= (brw->max_wm_threads - 1) << GEN6_WM_MAX_THREADS_SHIFT; - dw6 |= 0 << GEN6_WM_BARYCENTRIC_INTERPOLATION_MODE_SHIFT; /* No interp */ - dw6 |= 0 << GEN6_WM_NUM_SF_OUTPUTS_SHIFT; /* No inputs from SF */ - if (params->wm_prog_data) { - dw5 |= GEN6_WM_DISPATCH_ENABLE; /* We are rendering */ - - dw4 |= prog_data->first_curbe_grf_0 << GEN6_WM_DISPATCH_START_GRF_SHIFT_0; - dw4 |= prog_data->first_curbe_grf_2 << GEN6_WM_DISPATCH_START_GRF_SHIFT_2; - - ksp0 = params->wm_prog_kernel; - ksp2 = params->wm_prog_kernel + params->wm_prog_data->ksp_offset_2; - - if (params->wm_prog_data->dispatch_8) - dw5 |= GEN6_WM_8_DISPATCH_ENABLE; - if (params->wm_prog_data->dispatch_16) - dw5 |= GEN6_WM_16_DISPATCH_ENABLE; - } - - if (params->src.mt) { - dw5 |= GEN6_WM_KILL_ENABLE; /* TODO: temporarily smash on */ - dw2 |= 1 << GEN6_WM_SAMPLER_COUNT_SHIFT; /* Up to 4 samplers */ - } - - if (params->dst.num_samples > 1) { - dw6 |= GEN6_WM_MSRAST_ON_PATTERN; - if (prog_data && prog_data->persample_msaa_dispatch) - dw6 |= GEN6_WM_MSDISPMODE_PERSAMPLE; - else - dw6 |= GEN6_WM_MSDISPMODE_PERPIXEL; - } else { - dw6 |= GEN6_WM_MSRAST_OFF_PIXEL; - dw6 |= GEN6_WM_MSDISPMODE_PERSAMPLE; - } - - BEGIN_BATCH(9); - OUT_BATCH(_3DSTATE_WM << 16 | (9 - 2)); - OUT_BATCH(ksp0); - OUT_BATCH(dw2); - OUT_BATCH(0); /* No scratch needed */ - OUT_BATCH(dw4); - OUT_BATCH(dw5); - OUT_BATCH(dw6); - OUT_BATCH(0); /* kernel 1 pointer */ - OUT_BATCH(ksp2); - ADVANCE_BATCH(); -} - - -static void -gen6_blorp_emit_constant_ps(struct brw_context *brw, - const struct brw_blorp_params *params, - uint32_t wm_push_const_offset) -{ - /* Make sure the push constants fill an exact integer number of - * registers. - */ - assert(sizeof(struct brw_blorp_wm_push_constants) % 32 == 0); - - /* There must be at least one register worth of push constant data. */ - assert(BRW_BLORP_NUM_PUSH_CONST_REGS > 0); - - /* Enable push constant buffer 0. */ - BEGIN_BATCH(5); - OUT_BATCH(_3DSTATE_CONSTANT_PS << 16 | - GEN6_CONSTANT_BUFFER_0_ENABLE | - (5 - 2)); - OUT_BATCH(wm_push_const_offset + (BRW_BLORP_NUM_PUSH_CONST_REGS - 1)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - -static void -gen6_blorp_emit_constant_ps_disable(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - /* Disable the push constant buffers. */ - BEGIN_BATCH(5); - OUT_BATCH(_3DSTATE_CONSTANT_PS << 16 | (5 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - -/** - * 3DSTATE_BINDING_TABLE_POINTERS - */ -static void -gen6_blorp_emit_binding_table_pointers(struct brw_context *brw, - uint32_t wm_bind_bo_offset) -{ - BEGIN_BATCH(4); - OUT_BATCH(_3DSTATE_BINDING_TABLE_POINTERS << 16 | - GEN6_BINDING_TABLE_MODIFY_PS | - (4 - 2)); - OUT_BATCH(0); /* vs -- ignored */ - OUT_BATCH(0); /* gs -- ignored */ - OUT_BATCH(wm_bind_bo_offset); /* wm/ps */ - ADVANCE_BATCH(); -} - - -static void -gen6_blorp_emit_depth_stencil_config(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - uint32_t surfwidth, surfheight; - uint32_t surftype; - unsigned int depth = MAX2(params->depth.mt->logical_depth0, 1); - GLenum gl_target = params->depth.mt->target; - unsigned int lod; - - switch (gl_target) { - case GL_TEXTURE_CUBE_MAP_ARRAY: - case GL_TEXTURE_CUBE_MAP: - /* The PRM claims that we should use BRW_SURFACE_CUBE for this - * situation, but experiments show that gl_Layer doesn't work when we do - * this. So we use BRW_SURFACE_2D, since for rendering purposes this is - * equivalent. - */ - surftype = BRW_SURFACE_2D; - depth *= 6; - break; - default: - surftype = translate_tex_target(gl_target); - break; - } - - const unsigned min_array_element = params->depth.layer; - - lod = params->depth.level - params->depth.mt->first_level; - - if (params->hiz_op != GEN6_HIZ_OP_NONE && lod == 0) { - /* HIZ ops for lod 0 may set the width & height a little - * larger to allow the fast depth clear to fit the hardware - * alignment requirements. (8x4) - */ - surfwidth = params->depth.width; - surfheight = params->depth.height; - } else { - surfwidth = params->depth.mt->logical_width0; - surfheight = params->depth.mt->logical_height0; - } - - /* 3DSTATE_DEPTH_BUFFER */ - { - brw_emit_depth_stall_flushes(brw); - - BEGIN_BATCH(7); - /* 3DSTATE_DEPTH_BUFFER dw0 */ - OUT_BATCH(_3DSTATE_DEPTH_BUFFER << 16 | (7 - 2)); - - /* 3DSTATE_DEPTH_BUFFER dw1 */ - OUT_BATCH((params->depth.mt->pitch - 1) | - params->depth_format << 18 | - 1 << 21 | /* separate stencil enable */ - 1 << 22 | /* hiz enable */ - BRW_TILEWALK_YMAJOR << 26 | - 1 << 27 | /* y-tiled */ - surftype << 29); - - /* 3DSTATE_DEPTH_BUFFER dw2 */ - OUT_RELOC(params->depth.mt->bo, - I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, - 0); - - /* 3DSTATE_DEPTH_BUFFER dw3 */ - OUT_BATCH(BRW_SURFACE_MIPMAPLAYOUT_BELOW << 1 | - (surfwidth - 1) << 6 | - (surfheight - 1) << 19 | - lod << 2); - - /* 3DSTATE_DEPTH_BUFFER dw4 */ - OUT_BATCH((depth - 1) << 21 | - min_array_element << 10 | - (depth - 1) << 1); - - /* 3DSTATE_DEPTH_BUFFER dw5 */ - OUT_BATCH(0); - - /* 3DSTATE_DEPTH_BUFFER dw6 */ - OUT_BATCH(0); - ADVANCE_BATCH(); - } - - /* 3DSTATE_HIER_DEPTH_BUFFER */ - { - struct intel_mipmap_tree *hiz_mt = params->depth.mt->hiz_buf->mt; - uint32_t offset = 0; - - if (hiz_mt->array_layout == ALL_SLICES_AT_EACH_LOD) { - offset = intel_miptree_get_aligned_offset(hiz_mt, - hiz_mt->level[lod].level_x, - hiz_mt->level[lod].level_y, - false); - } - - BEGIN_BATCH(3); - OUT_BATCH((_3DSTATE_HIER_DEPTH_BUFFER << 16) | (3 - 2)); - OUT_BATCH(hiz_mt->pitch - 1); - OUT_RELOC(hiz_mt->bo, - I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, - offset); - ADVANCE_BATCH(); - } - - /* 3DSTATE_STENCIL_BUFFER */ - { - BEGIN_BATCH(3); - OUT_BATCH((_3DSTATE_STENCIL_BUFFER << 16) | (3 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); - } -} - - -static void -gen6_blorp_emit_depth_disable(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - brw_emit_depth_stall_flushes(brw); - - BEGIN_BATCH(7); - OUT_BATCH(_3DSTATE_DEPTH_BUFFER << 16 | (7 - 2)); - OUT_BATCH((BRW_DEPTHFORMAT_D32_FLOAT << 18) | - (BRW_SURFACE_NULL << 29)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); - - BEGIN_BATCH(3); - OUT_BATCH(_3DSTATE_HIER_DEPTH_BUFFER << 16 | (3 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); - - BEGIN_BATCH(3); - OUT_BATCH(_3DSTATE_STENCIL_BUFFER << 16 | (3 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - - -/* 3DSTATE_CLEAR_PARAMS - * - * From the Sandybridge PRM, Volume 2, Part 1, Section 3DSTATE_CLEAR_PARAMS: - * [DevSNB] 3DSTATE_CLEAR_PARAMS packet must follow the DEPTH_BUFFER_STATE - * packet when HiZ is enabled and the DEPTH_BUFFER_STATE changes. - */ -static void -gen6_blorp_emit_clear_params(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - BEGIN_BATCH(2); - OUT_BATCH(_3DSTATE_CLEAR_PARAMS << 16 | - GEN5_DEPTH_CLEAR_VALID | - (2 - 2)); - OUT_BATCH(params->depth.mt ? params->depth.mt->depth_clear_value : 0); - ADVANCE_BATCH(); -} - - -/* 3DSTATE_DRAWING_RECTANGLE */ -void -gen6_blorp_emit_drawing_rectangle(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - BEGIN_BATCH(4); - OUT_BATCH(_3DSTATE_DRAWING_RECTANGLE << 16 | (4 - 2)); - OUT_BATCH(0); - OUT_BATCH(((MAX2(params->x1, params->x0) - 1) & 0xffff) | - ((MAX2(params->y1, params->y0) - 1) << 16)); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - -/* 3DSTATE_VIEWPORT_STATE_POINTERS */ -static void -gen6_blorp_emit_viewport_state(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - struct brw_cc_viewport *ccv; - uint32_t cc_vp_offset; - - ccv = (struct brw_cc_viewport *)brw_state_batch(brw, AUB_TRACE_CC_VP_STATE, - sizeof(*ccv), 32, - &cc_vp_offset); - - ccv->min_depth = 0.0; - ccv->max_depth = 1.0; - - BEGIN_BATCH(4); - OUT_BATCH(_3DSTATE_VIEWPORT_STATE_POINTERS << 16 | (4 - 2) | - GEN6_CC_VIEWPORT_MODIFY); - OUT_BATCH(0); /* clip VP */ - OUT_BATCH(0); /* SF VP */ - OUT_BATCH(cc_vp_offset); - ADVANCE_BATCH(); -} - - -/* 3DPRIMITIVE */ -static void -gen6_blorp_emit_primitive(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - BEGIN_BATCH(6); - OUT_BATCH(CMD_3D_PRIM << 16 | (6 - 2) | - _3DPRIM_RECTLIST << GEN4_3DPRIM_TOPOLOGY_TYPE_SHIFT | - GEN4_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL); - OUT_BATCH(3); /* vertex count per instance */ - OUT_BATCH(0); - OUT_BATCH(params->num_layers); /* instance count */ - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - -/** - * \brief Execute a blit or render pass operation. - * - * To execute the operation, this function manually constructs and emits a - * batch to draw a rectangle primitive. The batchbuffer is flushed before - * constructing and after emitting the batch. - * - * This function alters no GL state. - */ -void -gen6_blorp_exec(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - uint32_t cc_blend_state_offset = 0; - uint32_t cc_state_offset = 0; - uint32_t depthstencil_offset; - uint32_t wm_push_const_offset = 0; - uint32_t wm_bind_bo_offset = 0; - - /* Emit workaround flushes when we switch from drawing to blorping. */ - brw_emit_post_sync_nonzero_flush(brw); - - brw_upload_state_base_address(brw); - - gen6_emit_3dstate_multisample(brw, params->dst.num_samples); - gen6_emit_3dstate_sample_mask(brw, - params->dst.num_samples > 1 ? - (1 << params->dst.num_samples) - 1 : 1); - gen6_blorp_emit_vertices(brw, params); - gen6_blorp_emit_urb_config(brw, params); - if (params->wm_prog_data) { - cc_blend_state_offset = gen6_blorp_emit_blend_state(brw, params); - cc_state_offset = gen6_blorp_emit_cc_state(brw); - } - depthstencil_offset = gen6_blorp_emit_depth_stencil_state(brw, params); - gen6_blorp_emit_cc_state_pointers(brw, params, cc_blend_state_offset, - depthstencil_offset, cc_state_offset); - if (params->wm_prog_data) { - uint32_t wm_surf_offset_renderbuffer; - uint32_t wm_surf_offset_texture = 0; - wm_push_const_offset = gen6_blorp_emit_wm_constants(brw, params); - intel_miptree_used_for_rendering(params->dst.mt); - wm_surf_offset_renderbuffer = - gen6_blorp_emit_surface_state(brw, params, ¶ms->dst, - I915_GEM_DOMAIN_RENDER, - I915_GEM_DOMAIN_RENDER); - if (params->src.mt) { - wm_surf_offset_texture = - gen6_blorp_emit_surface_state(brw, params, ¶ms->src, - I915_GEM_DOMAIN_SAMPLER, 0); - } - wm_bind_bo_offset = - gen6_blorp_emit_binding_table(brw, - wm_surf_offset_renderbuffer, - wm_surf_offset_texture); - } - - if (params->src.mt) { - const uint32_t sampler_offset = - gen6_blorp_emit_sampler_state(brw, BRW_MAPFILTER_LINEAR, 0, true); - gen6_blorp_emit_sampler_state_pointers(brw, sampler_offset); - } - gen6_blorp_emit_vs_disable(brw, params); - gen6_blorp_emit_gs_disable(brw, params); - gen6_blorp_emit_clip_disable(brw); - gen6_blorp_emit_sf_config(brw, params); - if (params->wm_prog_data) - gen6_blorp_emit_constant_ps(brw, params, wm_push_const_offset); - else - gen6_blorp_emit_constant_ps_disable(brw, params); - gen6_blorp_emit_wm_config(brw, params); - if (params->wm_prog_data) - gen6_blorp_emit_binding_table_pointers(brw, wm_bind_bo_offset); - gen6_blorp_emit_viewport_state(brw, params); - - if (params->depth.mt) - gen6_blorp_emit_depth_stencil_config(brw, params); - else - gen6_blorp_emit_depth_disable(brw, params); - gen6_blorp_emit_clear_params(brw, params); - gen6_blorp_emit_drawing_rectangle(brw, params); - gen6_blorp_emit_primitive(brw, params); -} diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_cc.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_cc.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_cc.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_cc.c 2017-06-01 10:37:10.000000000 +0000 @@ -104,7 +104,8 @@ blend[b].blend1.logic_op_func = intel_translate_logic_op(ctx->Color.LogicOp); } - } else if (ctx->Color.BlendEnabled & (1 << b) && !integer) { + } else if (ctx->Color.BlendEnabled & (1 << b) && !integer && + !ctx->Color._AdvancedBlendMode) { GLenum eqRGB = ctx->Color.Blend[b].EquationRGB; GLenum eqA = ctx->Color.Blend[b].EquationA; GLenum srcRGB = ctx->Color.Blend[b].SrcRGB; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_clip_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_clip_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_clip_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_clip_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -33,6 +33,60 @@ #include "main/fbobject.h" #include "main/framebuffer.h" +bool +brw_is_drawing_points(const struct brw_context *brw) +{ + /* Determine if the primitives *reaching the SF* are points */ + /* _NEW_POLYGON */ + if (brw->ctx.Polygon.FrontMode == GL_POINT || + brw->ctx.Polygon.BackMode == GL_POINT) { + return true; + } + + if (brw->gs.base.prog_data) { + /* BRW_NEW_GS_PROG_DATA */ + return brw_gs_prog_data(brw->gs.base.prog_data)->output_topology == + _3DPRIM_POINTLIST; + } else if (brw->tes.base.prog_data) { + /* BRW_NEW_TES_PROG_DATA */ + return brw_tes_prog_data(brw->tes.base.prog_data)->output_topology == + BRW_TESS_OUTPUT_TOPOLOGY_POINT; + } else { + /* BRW_NEW_PRIMITIVE */ + return brw->primitive == _3DPRIM_POINTLIST; + } +} + +bool +brw_is_drawing_lines(const struct brw_context *brw) +{ + /* Determine if the primitives *reaching the SF* are points */ + /* _NEW_POLYGON */ + if (brw->ctx.Polygon.FrontMode == GL_LINE || + brw->ctx.Polygon.BackMode == GL_LINE) { + return true; + } + + if (brw->gs.base.prog_data) { + /* BRW_NEW_GS_PROG_DATA */ + return brw_gs_prog_data(brw->gs.base.prog_data)->output_topology == + _3DPRIM_LINESTRIP; + } else if (brw->tes.base.prog_data) { + /* BRW_NEW_TES_PROG_DATA */ + return brw_tes_prog_data(brw->tes.base.prog_data)->output_topology == + BRW_TESS_OUTPUT_TOPOLOGY_LINE; + } else { + /* BRW_NEW_PRIMITIVE */ + switch (brw->primitive) { + case _3DPRIM_LINELIST: + case _3DPRIM_LINESTRIP: + case _3DPRIM_LINELOOP: + return true; + } + } + return false; +} + static void upload_clip_state(struct brw_context *brw) { @@ -45,13 +99,13 @@ struct gl_framebuffer *fb = ctx->DrawBuffer; /* BRW_NEW_FS_PROG_DATA */ - if (brw->wm.prog_data->barycentric_interp_modes & - BRW_WM_NONPERSPECTIVE_BARYCENTRIC_BITS) { + if (brw_wm_prog_data(brw->wm.base.prog_data)->barycentric_interp_modes & + BRW_BARYCENTRIC_NONPERSPECTIVE_BITS) { dw2 |= GEN6_CLIP_NON_PERSPECTIVE_BARYCENTRIC_ENABLE; } /* BRW_NEW_VS_PROG_DATA */ - dw1 |= brw->vs.prog_data->base.cull_distance_mask; + dw1 |= brw_vue_prog_data(brw->vs.base.prog_data)->cull_distance_mask; if (brw->gen >= 7) dw1 |= GEN7_CLIP_EARLY_CULL; @@ -99,6 +153,15 @@ /* _NEW_TRANSFORM */ dw2 |= (ctx->Transform.ClipPlanesEnabled << GEN6_USER_CLIP_CLIP_DISTANCES_SHIFT); + + /* Have the hardware use the user clip distance clip test enable bitmask + * specified here in 3DSTATE_CLIP rather than the one in 3DSTATE_VS/DS/GS. + * We already listen to _NEW_TRANSFORM here, but the other atoms don't + * need to other than this. + */ + if (brw->gen >= 8) + dw1 |= GEN8_CLIP_FORCE_USER_CLIP_DISTANCE_BITMASK; + if (ctx->Transform.ClipDepthMode == GL_ZERO_TO_ONE) dw2 |= GEN6_CLIP_API_D3D; else @@ -106,69 +169,17 @@ dw2 |= GEN6_CLIP_GB_TEST; - /* We need to disable guardband clipping if the guardband (which we always - * program to the maximum screen-space bounding box of 8K x 8K) will be - * smaller than the viewport. - * - * Closely examining the clip determination formulas in the documentation - * reveals that objects will be discarded entirely if they're outside the - * (small) guardband, even if they're within the (large) viewport: - * - * TR = TR_GB || TR_VPXY || TR_VPZ || TR_UC || TR_NEGW - * TA = !TR && TA_GB && TA_VPZ && TA_NEGW - * MC = !(TA || TR) - * - * (TA is "Trivial Accept", TR is "Trivial Reject", MC is "Must Clip".) - * - * Disabling guardband clipping removes the TR_GB condition, which means - * they'll be considered MC ("Must Clip") unless they're rejected for - * some other reason. - * - * Note that there is no TA_VPXY condition. If there were, objects entirely - * inside a 16384x16384 viewport would be trivially accepted, breaking the - * "objects must have a screenspace bounding box not exceeding 8K in the X - * or Y direction" restriction. Instead, they're clipped. - */ - for (unsigned i = 0; i < ctx->Const.MaxViewports; i++) { - if (ctx->ViewportArray[i].Width > 8192 || - ctx->ViewportArray[i].Height > 8192) { - dw2 &= ~GEN6_CLIP_GB_TEST; - break; - } - } - - /* If the viewport dimensions are smaller than the drawable dimensions, - * we have to disable guardband clipping prior to Gen8. We always program - * the guardband to a fixed size, which is almost always larger than the - * viewport. Any geometry which intersects the viewport but lies within - * the guardband would bypass the 3D clipping stage, so it wouldn't be - * clipped to the viewport. Rendering would happen beyond the viewport, - * but still inside the drawable. - * - * Gen8+ introduces a viewport extents test which restricts rendering to - * the viewport, so we can ignore this restriction. - */ - if (brw->gen < 8) { - const float fb_width = (float)_mesa_geometric_width(fb); - const float fb_height = (float)_mesa_geometric_height(fb); - - for (unsigned i = 0; i < ctx->Const.MaxViewports; i++) { - if (ctx->ViewportArray[i].X != 0 || - ctx->ViewportArray[i].Y != 0 || - ctx->ViewportArray[i].Width != fb_width || - ctx->ViewportArray[i].Height != fb_height) { - dw2 &= ~GEN6_CLIP_GB_TEST; - break; - } - } - } + /* BRW_NEW_VIEWPORT_COUNT */ + const unsigned viewport_count = brw->clip.viewport_count; /* BRW_NEW_RASTERIZER_DISCARD */ if (ctx->RasterDiscard) { dw2 |= GEN6_CLIP_MODE_REJECT_ALL; - perf_debug("Rasterizer discard is currently implemented via the clipper; " - "%s be faster.\n", brw->gen >= 7 ? "using the SOL unit may" : - "having the GS not write primitives would likely"); + if (brw->gen == 6) { + perf_debug("Rasterizer discard is currently implemented via the " + "clipper; having the GS not write primitives would " + "likely be faster.\n"); + } } uint32_t enable; @@ -177,14 +188,12 @@ else enable = GEN6_CLIP_ENABLE; - if (!is_drawing_points(brw) && !is_drawing_lines(brw)) + /* _NEW_POLYGON, + * BRW_NEW_GEOMETRY_PROGRAM | BRW_NEW_TES_PROG_DATA | BRW_NEW_PRIMITIVE + */ + if (!brw_is_drawing_points(brw) && !brw_is_drawing_lines(brw)) dw2 |= GEN6_CLIP_XY_TEST; - /* BRW_NEW_VUE_MAP_GEOM_OUT */ - const int max_vp_index = - (brw->vue_map_geom_out.slots_valid & VARYING_BIT_VIEWPORT) != 0 ? - ctx->Const.MaxViewports : 1; - BEGIN_BATCH(4); OUT_BATCH(_3DSTATE_CLIP << 16 | (4 - 2)); OUT_BATCH(dw1); @@ -194,7 +203,7 @@ OUT_BATCH(U_FIXED(0.125, 3) << GEN6_CLIP_MIN_POINT_WIDTH_SHIFT | U_FIXED(255.875, 3) << GEN6_CLIP_MAX_POINT_WIDTH_SHIFT | (_mesa_geometric_layers(fb) > 0 ? 0 : GEN6_CLIP_FORCE_ZERO_RTAINDEX) | - ((max_vp_index - 1) & GEN6_CLIP_MAX_VP_INDEX_MASK)); + ((viewport_count - 1) & GEN6_CLIP_MAX_VP_INDEX_MASK)); ADVANCE_BATCH(); } @@ -202,34 +211,18 @@ .dirty = { .mesa = _NEW_BUFFERS | _NEW_LIGHT | - _NEW_TRANSFORM, - .brw = BRW_NEW_BLORP | - BRW_NEW_CONTEXT | - BRW_NEW_FS_PROG_DATA | - BRW_NEW_GEOMETRY_PROGRAM | - BRW_NEW_META_IN_PROGRESS | - BRW_NEW_PRIMITIVE | - BRW_NEW_RASTERIZER_DISCARD | - BRW_NEW_VUE_MAP_GEOM_OUT, - }, - .emit = upload_clip_state, -}; - -const struct brw_tracked_state gen7_clip_state = { - .dirty = { - .mesa = _NEW_BUFFERS | - _NEW_LIGHT | _NEW_POLYGON | _NEW_TRANSFORM, .brw = BRW_NEW_BLORP | BRW_NEW_CONTEXT | BRW_NEW_FS_PROG_DATA | - BRW_NEW_GEOMETRY_PROGRAM | + BRW_NEW_GS_PROG_DATA | BRW_NEW_VS_PROG_DATA | BRW_NEW_META_IN_PROGRESS | BRW_NEW_PRIMITIVE | BRW_NEW_RASTERIZER_DISCARD | - BRW_NEW_VUE_MAP_GEOM_OUT, + BRW_NEW_TES_PROG_DATA | + BRW_NEW_VIEWPORT_COUNT, }, .emit = upload_clip_state, }; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_depth_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_depth_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_depth_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_depth_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -168,8 +168,7 @@ offset = intel_miptree_get_aligned_offset( hiz_mt, hiz_mt->level[lod].level_x, - hiz_mt->level[lod].level_y, - false); + hiz_mt->level[lod].level_y); } BEGIN_BATCH(3); @@ -204,8 +203,7 @@ offset = intel_miptree_get_aligned_offset( stencil_mt, stencil_mt->level[lod].level_x, - stencil_mt->level[lod].level_y, - false); + stencil_mt->level[lod].level_y); } } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_depthstencil.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_depthstencil.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_depthstencil.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_depthstencil.c 2017-06-01 10:37:10.000000000 +0000 @@ -83,7 +83,7 @@ if (ctx->Depth.Test && depth_irb) { ds->ds2.depth_test_enable = ctx->Depth.Test; ds->ds2.depth_test_func = intel_translate_compare_func(ctx->Depth.Func); - ds->ds2.depth_write_enable = ctx->Depth.Mask; + ds->ds2.depth_write_enable = brw_depth_writes_enabled(brw); } /* Point the GPU at the new indirect state. */ diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_gs_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_gs_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_gs_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_gs_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -29,6 +29,7 @@ #include "brw_state.h" #include "brw_defines.h" #include "intel_batchbuffer.h" +#include "main/shaderapi.h" static void gen6_upload_gs_push_constants(struct brw_context *brw) @@ -36,15 +37,15 @@ struct brw_stage_state *stage_state = &brw->gs.base; /* BRW_NEW_GEOMETRY_PROGRAM */ - const struct brw_geometry_program *gp = - (struct brw_geometry_program *) brw->geometry_program; + const struct brw_program *gp = brw_program_const(brw->geometry_program); if (gp) { /* BRW_NEW_GS_PROG_DATA */ - struct brw_stage_prog_data *prog_data = &brw->gs.prog_data->base.base; + struct brw_stage_prog_data *prog_data = brw->gs.base.prog_data; - gen6_upload_push_constants(brw, &gp->program.Base, prog_data, - stage_state, AUB_TRACE_VS_CONSTANTS); + _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_GEOMETRY); + gen6_upload_push_constants(brw, &gp->program, prog_data, stage_state, + AUB_TRACE_VS_CONSTANTS); } if (brw->gen >= 7) @@ -67,6 +68,8 @@ static void upload_gs_state_for_tf(struct brw_context *brw) { + const struct gen_device_info *devinfo = &brw->screen->devinfo; + BEGIN_BATCH(7); OUT_BATCH(_3DSTATE_GS << 16 | (7 - 2)); OUT_BATCH(brw->ff_gs.prog_offset); @@ -74,7 +77,7 @@ OUT_BATCH(0); /* no scratch space */ OUT_BATCH((2 << GEN6_GS_DISPATCH_START_GRF_SHIFT) | (brw->ff_gs.prog_data->urb_read_length << GEN6_GS_URB_READ_LENGTH_SHIFT)); - OUT_BATCH(((brw->max_gs_threads - 1) << GEN6_GS_MAX_THREADS_SHIFT) | + OUT_BATCH(((devinfo->max_gs_threads - 1) << GEN6_GS_MAX_THREADS_SHIFT) | GEN6_GS_STATISTICS_ENABLE | GEN6_GS_SO_STATISTICS_ENABLE | GEN6_GS_RENDERING_ENABLE); @@ -89,11 +92,14 @@ static void upload_gs_state(struct brw_context *brw) { + const struct gen_device_info *devinfo = &brw->screen->devinfo; /* BRW_NEW_GEOMETRY_PROGRAM */ bool active = brw->geometry_program; /* BRW_NEW_GS_PROG_DATA */ - const struct brw_vue_prog_data *prog_data = &brw->gs.prog_data->base; const struct brw_stage_state *stage_state = &brw->gs.base; + const struct brw_stage_prog_data *prog_data = stage_state->prog_data; + const struct brw_vue_prog_data *vue_prog_data = + brw_vue_prog_data(stage_state->prog_data); if (!active || stage_state->push_const_size == 0) { /* Disable the push constant buffers. */ @@ -134,10 +140,10 @@ OUT_BATCH(GEN6_GS_SPF_MODE | GEN6_GS_VECTOR_MASK_ENABLE | ((ALIGN(stage_state->sampler_count, 4)/4) << GEN6_GS_SAMPLER_COUNT_SHIFT) | - ((prog_data->base.binding_table.size_bytes / 4) << + ((prog_data->binding_table.size_bytes / 4) << GEN6_GS_BINDING_TABLE_ENTRY_COUNT_SHIFT)); - if (prog_data->base.total_scratch) { + if (prog_data->total_scratch) { OUT_RELOC(stage_state->scratch_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, ffs(stage_state->per_thread_scratch) - 11); @@ -145,18 +151,18 @@ OUT_BATCH(0); /* no scratch space */ } - OUT_BATCH((prog_data->urb_read_length << + OUT_BATCH((vue_prog_data->urb_read_length << GEN6_GS_URB_READ_LENGTH_SHIFT) | (0 << GEN6_GS_URB_ENTRY_READ_OFFSET_SHIFT) | - (prog_data->base.dispatch_grf_start_reg << + (prog_data->dispatch_grf_start_reg << GEN6_GS_DISPATCH_START_GRF_SHIFT)); - OUT_BATCH(((brw->max_gs_threads - 1) << GEN6_GS_MAX_THREADS_SHIFT) | + OUT_BATCH(((devinfo->max_gs_threads - 1) << GEN6_GS_MAX_THREADS_SHIFT) | GEN6_GS_STATISTICS_ENABLE | GEN6_GS_SO_STATISTICS_ENABLE | GEN6_GS_RENDERING_ENABLE); - if (brw->gs.prog_data->gen6_xfb_enabled) { + if (brw->geometry_program->info.has_transform_feedback_varyings) { /* GEN6_GS_REORDER is equivalent to GEN7_GS_REORDER_TRAILING * in gen7. SNB and IVB specs are the same regarding the reordering of * TRISTRIP/TRISTRIP_REV vertices and triangle orientation, so we do diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_gs_visitor.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_gs_visitor.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_gs_visitor.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_gs_visitor.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -64,7 +64,7 @@ this->vertex_output = src_reg(this, glsl_type::uint_type, (prog_data->vue_map.num_slots + 1) * - nir->info.gs.vertices_out); + nir->info->gs.vertices_out); this->vertex_output_offset = src_reg(this, glsl_type::uint_type); emit(MOV(dst_reg(this->vertex_output_offset), brw_imm_ud(0u))); @@ -96,7 +96,7 @@ this->prim_count = src_reg(this, glsl_type::uint_type); emit(MOV(dst_reg(this->prim_count), brw_imm_ud(0u))); - if (gs_prog_data->gen6_xfb_enabled) { + if (prog->info.has_transform_feedback_varyings) { /* Create a virtual register to hold destination indices in SOL */ this->destination_indices = src_reg(this, glsl_type::uvec4_type); /* Create a virtual register to hold number of written primitives */ @@ -178,7 +178,7 @@ dst_reg dst(this->vertex_output); dst.reladdr = ralloc(mem_ctx, src_reg); memcpy(dst.reladdr, &this->vertex_output_offset, sizeof(src_reg)); - if (nir->info.gs.output_primitive == GL_POINTS) { + if (nir->info->gs.output_primitive == GL_POINTS) { /* If we are outputting points, then every vertex has PrimStart and * PrimEnd set. */ @@ -207,7 +207,7 @@ /* Calling EndPrimitive() is optional for point output. In this case we set * the PrimEnd flag when we process EmitVertex(). */ - if (nir->info.gs.output_primitive == GL_POINTS) + if (nir->info->gs.output_primitive == GL_POINTS) return; /* Otherwise we know that the last vertex we have processed was the last @@ -219,7 +219,7 @@ * comparison below (hence the num_output_vertices + 1 in the comparison * below). */ - unsigned num_output_vertices = nir->info.gs.vertices_out; + unsigned num_output_vertices = nir->info->gs.vertices_out; emit(CMP(dst_null_ud(), this->vertex_count, brw_imm_ud(num_output_vertices + 1), BRW_CONDITIONAL_L)); vec4_instruction *inst = emit(CMP(dst_null_ud(), @@ -323,7 +323,7 @@ * first_vertex is not zero. This is only relevant for outputs other than * points because in the point case we set PrimEnd on all vertices. */ - if (nir->info.gs.output_primitive != GL_POINTS) { + if (nir->info->gs.output_primitive != GL_POINTS) { emit(CMP(dst_null_ud(), this->first_vertex, brw_imm_ud(0u), BRW_CONDITIONAL_Z)); emit(IF(BRW_PREDICATE_NORMAL)); gs_end_primitive(); @@ -356,7 +356,7 @@ this->current_annotation = "gen6 thread end: ff_sync"; vec4_instruction *inst; - if (gs_prog_data->gen6_xfb_enabled) { + if (prog->info.has_transform_feedback_varyings) { src_reg sol_temp(this, glsl_type::uvec4_type); emit(GS_OPCODE_FF_SYNC_SET_PRIMITIVES, dst_reg(this->svbi), @@ -412,7 +412,7 @@ /* Copy this slot to the appropriate message register */ dst_reg reg = dst_reg(MRF, mrf); - reg.type = output_reg[varying].type; + reg.type = output_reg[varying][0].type; data.type = reg.type; vec4_instruction *inst = emit(MOV(reg, data)); inst->force_writemask_all = true; @@ -446,7 +446,7 @@ } emit(BRW_OPCODE_WHILE); - if (gs_prog_data->gen6_xfb_enabled) + if (prog->info.has_transform_feedback_varyings) xfb_write(); } emit(BRW_OPCODE_ENDIF); @@ -468,7 +468,7 @@ */ this->current_annotation = "gen6 thread end: EOT"; - if (gs_prog_data->gen6_xfb_enabled) { + if (prog->info.has_transform_feedback_varyings) { /* When emitting EOT, set SONumPrimsWritten Increment Value. */ src_reg data(this, glsl_type::uint_type); emit(AND(dst_reg(data), this->sol_prim_written, brw_imm_ud(0xffffu))); @@ -534,7 +534,7 @@ }; const struct gl_transform_feedback_info *linked_xfb_info = - &this->shader_prog->LinkedTransformFeedback; + this->prog->sh.LinkedTransformFeedback; int i; /* Make sure that the VUE slots won't overflow the unsigned chars in @@ -625,7 +625,7 @@ emit(BRW_OPCODE_ENDIF); /* Write transform feedback data for all processed vertices. */ - for (int i = 0; i < (int)nir->info.gs.vertices_out; i++) { + for (int i = 0; i < (int)nir->info->gs.vertices_out; i++) { emit(MOV(dst_reg(sol_temp), brw_imm_d(i))); emit(CMP(dst_null_d(), sol_temp, this->vertex_count, BRW_CONDITIONAL_L)); @@ -688,7 +688,7 @@ int offset = get_vertex_output_offset_for_varying(vertex, varying); emit(MOV(dst_reg(this->vertex_output_offset), brw_imm_d(offset))); memcpy(data.reladdr, &this->vertex_output_offset, sizeof(src_reg)); - data.type = output_reg[varying].type; + data.type = output_reg[varying][0].type; /* PSIZ, LAYER and VIEWPORT are packed in different channels of the * same slot, so make sure we write the appropriate channel diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_gs_visitor.h mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_gs_visitor.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_gs_visitor.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_gs_visitor.h 2017-06-01 10:37:10.000000000 +0000 @@ -39,14 +39,14 @@ void *log_data, struct brw_gs_compile *c, struct brw_gs_prog_data *prog_data, - struct gl_shader_program *prog, + struct gl_program *prog, const nir_shader *shader, void *mem_ctx, bool no_spills, int shader_time_index) : vec4_gs_visitor(comp, log_data, c, prog_data, shader, mem_ctx, no_spills, shader_time_index), - shader_prog(prog) + prog(prog) { } @@ -68,7 +68,7 @@ void xfb_setup(); int get_vertex_output_offset_for_varying(int vertex, int varying); - const struct gl_shader_program *shader_prog; + const struct gl_program *prog; src_reg vertex_output; src_reg vertex_output_offset; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_multisample_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_multisample_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_multisample_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_multisample_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -109,7 +109,7 @@ { uint8_t map_2x[2] = {0, 1}; uint8_t map_4x[4] = {0, 1, 2, 3}; - uint8_t map_8x[8] = {5, 2, 4, 6, 0, 3, 7, 1}; + uint8_t map_8x[8] = {3, 7, 5, 0, 1, 2, 4, 6}; uint8_t map_16x[16] = { 15, 10, 9, 7, 4, 1, 3, 13, 12, 2, 0, 6, 11, 8, 5, 14 }; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_queryobj.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_queryobj.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_queryobj.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_queryobj.c 2017-06-01 10:37:10.000000000 +0000 @@ -38,7 +38,6 @@ #include "brw_state.h" #include "intel_batchbuffer.h" #include "intel_buffer_objects.h" -#include "intel_reg.h" static inline void set_query_availability(struct brw_context *brw, struct brw_query_object *query, @@ -99,7 +98,7 @@ } } -static inline const int +static inline int pipeline_target_to_index(int target) { if (target == GL_GEOMETRY_SHADER_INVOCATIONS) diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_scissor_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_scissor_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_scissor_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_scissor_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -42,8 +42,11 @@ const unsigned int fb_width= _mesa_geometric_width(ctx->DrawBuffer); const unsigned int fb_height = _mesa_geometric_height(ctx->DrawBuffer); + /* BRW_NEW_VIEWPORT_COUNT */ + const unsigned viewport_count = brw->clip.viewport_count; + scissor = brw_state_batch(brw, AUB_TRACE_SCISSOR_STATE, - sizeof(*scissor) * ctx->Const.MaxViewports, 32, + sizeof(*scissor) * viewport_count, 32, &scissor_state_offset); /* _NEW_SCISSOR | _NEW_BUFFERS | _NEW_VIEWPORT */ @@ -55,7 +58,7 @@ * Note that the hardware's coordinates are inclusive, while Mesa's min is * inclusive but max is exclusive. */ - for (unsigned i = 0; i < ctx->Const.MaxViewports; i++) { + for (unsigned i = 0; i < viewport_count; i++) { int bbox[4]; bbox[0] = MAX2(ctx->ViewportArray[i].X, 0); @@ -102,7 +105,8 @@ _NEW_SCISSOR | _NEW_VIEWPORT, .brw = BRW_NEW_BATCH | - BRW_NEW_BLORP, + BRW_NEW_BLORP | + BRW_NEW_VIEWPORT_COUNT, }, .emit = gen6_upload_scissor_state, }; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_sf_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_sf_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_sf_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_sf_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -29,6 +29,7 @@ #include "brw_state.h" #include "brw_defines.h" #include "brw_util.h" +#include "compiler/nir/nir.h" #include "main/macros.h" #include "main/fbobject.h" #include "main/framebuffer.h" @@ -158,6 +159,9 @@ uint32_t *urb_entry_read_length, uint32_t *urb_entry_read_offset) { + /* BRW_NEW_FS_PROG_DATA */ + const struct brw_wm_prog_data *wm_prog_data = + brw_wm_prog_data(brw->wm.base.prog_data); uint32_t max_source_attr = 0; *point_sprite_enables = 0; @@ -173,7 +177,7 @@ * - VARYING_SLOT_{PSIZ,LAYER} and VARYING_SLOT_POS on gen6+ */ - bool fs_needs_vue_header = brw->fragment_program->Base.InputsRead & + bool fs_needs_vue_header = brw->fragment_program->info.inputs_read & (VARYING_BIT_LAYER | VARYING_BIT_VIEWPORT); *urb_entry_read_offset = fs_needs_vue_header ? 0 : 1; @@ -193,9 +197,9 @@ * correctly set the attr overrides. * * _NEW_POLYGON - * BRW_NEW_PRIMITIVE | BRW_NEW_GEOMETRY_PROGRAM | BRW_NEW_TES_PROG_DATA + * BRW_NEW_PRIMITIVE | BRW_NEW_GS_PROG_DATA | BRW_NEW_TES_PROG_DATA */ - bool drawing_points = is_drawing_points(brw); + bool drawing_points = brw_is_drawing_points(brw); /* Initialize all the attr_overrides to 0. In the loop below we'll modify * just the ones that correspond to inputs used by the fs. @@ -203,8 +207,7 @@ memset(attr_overrides, 0, 16*sizeof(*attr_overrides)); for (int attr = 0; attr < VARYING_SLOT_MAX; attr++) { - /* BRW_NEW_FS_PROG_DATA */ - int input_index = brw->wm.prog_data->urb_setup[attr]; + int input_index = wm_prog_data->urb_setup[attr]; if (input_index < 0) continue; @@ -214,7 +217,7 @@ if (drawing_points) { if (brw->ctx.Point.PointSprite && (attr >= VARYING_SLOT_TEX0 && attr <= VARYING_SLOT_TEX7) && - brw->ctx.Point.CoordReplace[attr - VARYING_SLOT_TEX0]) { + (brw->ctx.Point.CoordReplace & (1u << (attr - VARYING_SLOT_TEX0)))) { point_sprite = true; } @@ -267,7 +270,9 @@ { struct gl_context *ctx = &brw->ctx; /* BRW_NEW_FS_PROG_DATA */ - uint32_t num_outputs = brw->wm.prog_data->num_varying_inputs; + const struct brw_wm_prog_data *wm_prog_data = + brw_wm_prog_data(brw->wm.base.prog_data); + uint32_t num_outputs = wm_prog_data->num_varying_inputs; uint32_t dw1, dw2, dw3, dw4; uint32_t point_sprite_enables; int i; @@ -281,13 +286,12 @@ dw1 = GEN6_SF_SWIZZLE_ENABLE | num_outputs << GEN6_SF_NUM_OUTPUTS_SHIFT; dw2 = GEN6_SF_STATISTICS_ENABLE; + dw3 = GEN6_SF_SCISSOR_ENABLE; + dw4 = 0; if (brw->sf.viewport_transform_enable) dw2 |= GEN6_SF_VIEWPORT_TRANSFORM_ENABLE; - dw3 = 0; - dw4 = 0; - /* _NEW_POLYGON */ if (ctx->Polygon._FrontBit == render_to_fbo) dw2 |= GEN6_SF_WINDING_CCW; @@ -335,11 +339,6 @@ unreachable("not reached"); } - /* _NEW_SCISSOR _NEW_POLYGON BRW_NEW_GEOMETRY_PROGRAM BRW_NEW_PRIMITIVE */ - if (ctx->Scissor.EnableFlags || - is_drawing_points(brw) || is_drawing_lines(brw)) - dw3 |= GEN6_SF_SCISSOR_ENABLE; - /* _NEW_POLYGON */ if (ctx->Polygon.CullFlag) { switch (ctx->Polygon.CullFaceMode) { @@ -373,12 +372,11 @@ if (multisampled_fbo && ctx->Multisample.Enabled) dw3 |= GEN6_SF_MSRAST_ON_PATTERN; - /* _NEW_PROGRAM | _NEW_POINT */ - if (!(ctx->VertexProgram.PointSizeEnabled || - ctx->Point._Attenuated)) + /* _NEW_PROGRAM | _NEW_POINT, BRW_NEW_VUE_MAP_GEOM_OUT */ + if (use_state_point_size(brw)) dw4 |= GEN6_SF_USE_STATE_POINT_WIDTH; - /* Clamp to ARB_point_parameters user limits */ + /* _NEW_POINT - Clamp to ARB_point_parameters user limits */ point_size = CLAMP(ctx->Point.Size, ctx->Point.MinSize, ctx->Point.MaxSize); /* Clamp to the hardware limits and convert to fixed point */ @@ -429,7 +427,7 @@ OUT_BATCH(attr_overrides[i * 2] | attr_overrides[i * 2 + 1] << 16); } OUT_BATCH(point_sprite_enables); /* dw16 */ - OUT_BATCH(brw->wm.prog_data->flat_inputs); + OUT_BATCH(wm_prog_data->flat_inputs); OUT_BATCH(0); /* wrapshortest enables 0-7 */ OUT_BATCH(0); /* wrapshortest enables 8-15 */ ADVANCE_BATCH(); @@ -443,13 +441,12 @@ _NEW_MULTISAMPLE | _NEW_POINT | _NEW_POLYGON | - _NEW_PROGRAM | - _NEW_SCISSOR, + _NEW_PROGRAM, .brw = BRW_NEW_BLORP | BRW_NEW_CONTEXT | BRW_NEW_FRAGMENT_PROGRAM | BRW_NEW_FS_PROG_DATA | - BRW_NEW_GEOMETRY_PROGRAM | + BRW_NEW_GS_PROG_DATA | BRW_NEW_PRIMITIVE | BRW_NEW_TES_PROG_DATA | BRW_NEW_VUE_MAP_GEOM_OUT, diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_sol.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_sol.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_sol.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_sol.c 2017-06-01 10:37:10.000000000 +0000 @@ -38,28 +38,19 @@ gen6_update_sol_surfaces(struct brw_context *brw) { struct gl_context *ctx = &brw->ctx; - /* BRW_NEW_TRANSFORM_FEEDBACK */ - struct gl_transform_feedback_object *xfb_obj = - ctx->TransformFeedback.CurrentObject; - const struct gl_shader_program *shaderprog; - const struct gl_transform_feedback_info *linked_xfb_info; - int i; - - if (brw->geometry_program) { - /* BRW_NEW_GEOMETRY_PROGRAM */ - shaderprog = - ctx->_Shader->CurrentProgram[MESA_SHADER_GEOMETRY]; - } else { - /* BRW_NEW_VERTEX_PROGRAM */ - shaderprog = - ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX]; + bool xfb_active = _mesa_is_xfb_active_and_unpaused(ctx); + struct gl_transform_feedback_object *xfb_obj; + const struct gl_transform_feedback_info *linked_xfb_info = NULL; + + if (xfb_active) { + /* BRW_NEW_TRANSFORM_FEEDBACK */ + xfb_obj = ctx->TransformFeedback.CurrentObject; + linked_xfb_info = xfb_obj->program->sh.LinkedTransformFeedback; } - linked_xfb_info = &shaderprog->LinkedTransformFeedback; - for (i = 0; i < BRW_MAX_SOL_BINDINGS; ++i) { + for (int i = 0; i < BRW_MAX_SOL_BINDINGS; ++i) { const int surf_index = SURF_INDEX_GEN6_SOL_BINDING(i); - if (_mesa_is_xfb_active_and_unpaused(ctx) && - i < linked_xfb_info->NumOutputs) { + if (xfb_active && i < linked_xfb_info->NumOutputs) { unsigned buffer = linked_xfb_info->Outputs[i].OutputBuffer; unsigned buffer_offset = xfb_obj->Offset[buffer] / 4 + @@ -93,8 +84,6 @@ .mesa = 0, .brw = BRW_NEW_BATCH | BRW_NEW_BLORP | - BRW_NEW_GEOMETRY_PROGRAM | - BRW_NEW_VERTEX_PROGRAM | BRW_NEW_TRANSFORM_FEEDBACK, }, .emit = gen6_update_sol_surfaces, @@ -127,7 +116,7 @@ if (shaderprog) { /* Skip making a binding table if we don't have anything to put in it */ const struct gl_transform_feedback_info *linked_xfb_info = - &shaderprog->LinkedTransformFeedback; + shaderprog->xfb_program->sh.LinkedTransformFeedback; need_binding_table = linked_xfb_info->NumOutputs > 0; } if (!need_binding_table) { @@ -156,7 +145,7 @@ /* Skip making a binding table if we don't have anything to put in it */ struct brw_stage_prog_data *prog_data = brw->gs.base.prog_data; const struct gl_transform_feedback_info *linked_xfb_info = - &shaderprog->LinkedTransformFeedback; + shaderprog->xfb_program->sh.LinkedTransformFeedback; need_binding_table = linked_xfb_info->NumOutputs > 0 || prog_data->binding_table.size_bytes > 0; } @@ -252,7 +241,7 @@ shaderprog = ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX]; } - linked_xfb_info = &shaderprog->LinkedTransformFeedback; + linked_xfb_info = shaderprog->xfb_program->sh.LinkedTransformFeedback; /* Compute the maximum number of vertices that we can write without * overflowing any of the buffers currently being used for feedback. diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_surface_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_surface_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_surface_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_surface_state.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,146 +0,0 @@ -/* - * Copyright (c) 2014 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - - -#include "main/context.h" -#include "main/blend.h" -#include "main/mtypes.h" -#include "main/samplerobj.h" -#include "main/texformat.h" -#include "program/prog_parameter.h" - -#include "intel_mipmap_tree.h" -#include "intel_batchbuffer.h" -#include "intel_tex.h" -#include "intel_fbo.h" -#include "intel_buffer_objects.h" - -#include "brw_context.h" -#include "brw_state.h" -#include "brw_defines.h" -#include "brw_wm.h" - -/** - * Sets up a surface state structure to point at the given region. - * While it is only used for the front/back buffer currently, it should be - * usable for further buffers when doing ARB_draw_buffer support. - */ -static uint32_t -gen6_update_renderbuffer_surface(struct brw_context *brw, - struct gl_renderbuffer *rb, - bool layered, unsigned unit /* unused */, - uint32_t surf_index) -{ - struct gl_context *ctx = &brw->ctx; - struct intel_renderbuffer *irb = intel_renderbuffer(rb); - struct intel_mipmap_tree *mt = irb->mt; - uint32_t *surf; - uint32_t format = 0; - uint32_t offset; - /* _NEW_BUFFERS */ - mesa_format rb_format = _mesa_get_render_format(ctx, intel_rb_format(irb)); - uint32_t surftype; - int depth = MAX2(irb->layer_count, 1); - const GLenum gl_target = - rb->TexImage ? rb->TexImage->TexObject->Target : GL_TEXTURE_2D; - - intel_miptree_used_for_rendering(irb->mt); - - surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, 6 * 4, 32, &offset); - - format = brw->render_target_format[rb_format]; - if (unlikely(!brw->format_supported_as_render_target[rb_format])) { - _mesa_problem(ctx, "%s: renderbuffer format %s unsupported\n", - __func__, _mesa_get_format_name(rb_format)); - } - - switch (gl_target) { - case GL_TEXTURE_CUBE_MAP_ARRAY: - case GL_TEXTURE_CUBE_MAP: - surftype = BRW_SURFACE_2D; - depth *= 6; - break; - case GL_TEXTURE_3D: - depth = MAX2(irb->mt->logical_depth0, 1); - /* fallthrough */ - default: - surftype = translate_tex_target(gl_target); - break; - } - - const int min_array_element = irb->mt_layer; - assert(!layered || irb->mt_layer == 0); - - surf[0] = SET_FIELD(surftype, BRW_SURFACE_TYPE) | - SET_FIELD(format, BRW_SURFACE_FORMAT); - - /* reloc */ - assert(mt->offset % mt->cpp == 0); - surf[1] = mt->bo->offset64 + mt->offset; - - /* In the gen6 PRM Volume 1 Part 1: Graphics Core, Section 7.18.3.7.1 - * (Surface Arrays For all surfaces other than separate stencil buffer): - * - * "[DevSNB] Errata: Sampler MSAA Qpitch will be 4 greater than the value - * calculated in the equation above , for every other odd Surface Height - * starting from 1 i.e. 1,5,9,13" - * - * Since this Qpitch errata only impacts the sampler, we have to adjust the - * input for the rendering surface to achieve the same qpitch. For the - * affected heights, we increment the height by 1 for the rendering - * surface. - */ - int height0 = irb->mt->logical_height0; - if (brw->gen == 6 && irb->mt->num_samples > 1 && (height0 % 4) == 1) - height0++; - - surf[2] = SET_FIELD(mt->logical_width0 - 1, BRW_SURFACE_WIDTH) | - SET_FIELD(height0 - 1, BRW_SURFACE_HEIGHT) | - SET_FIELD(irb->mt_level - irb->mt->first_level, BRW_SURFACE_LOD); - - surf[3] = brw_get_surface_tiling_bits(mt->tiling) | - SET_FIELD(depth - 1, BRW_SURFACE_DEPTH) | - SET_FIELD(mt->pitch - 1, BRW_SURFACE_PITCH); - - surf[4] = brw_get_surface_num_multisamples(mt->num_samples) | - SET_FIELD(min_array_element, BRW_SURFACE_MIN_ARRAY_ELEMENT) | - SET_FIELD(depth - 1, BRW_SURFACE_RENDER_TARGET_VIEW_EXTENT); - - surf[5] = (mt->valign == 4 ? BRW_SURFACE_VERTICAL_ALIGN_ENABLE : 0); - - drm_intel_bo_emit_reloc(brw->batch.bo, - offset + 4, - mt->bo, - surf[1] - mt->bo->offset64, - I915_GEM_DOMAIN_RENDER, - I915_GEM_DOMAIN_RENDER); - - return offset; -} - -void -gen6_init_vtable_surface_functions(struct brw_context *brw) -{ - gen4_init_vtable_surface_functions(brw); - brw->vtbl.update_renderbuffer_surface = gen6_update_renderbuffer_surface; -} diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_urb.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_urb.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_urb.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_urb.c 2017-06-01 10:37:10.000000000 +0000 @@ -46,32 +46,13 @@ * Sandybridge GT1 has 32kB of URB space, while GT2 has 64kB. * (See the Sandybridge PRM, Volume 2, Part 1, Section 1.4.7: 3DSTATE_URB.) */ -static void -gen6_upload_urb( struct brw_context *brw ) +void +gen6_upload_urb(struct brw_context *brw, unsigned vs_size, + bool gs_present, unsigned gs_size) { int nr_vs_entries, nr_gs_entries; int total_urb_size = brw->urb.size * 1024; /* in bytes */ - - bool gs_present = brw->ff_gs.prog_active || brw->geometry_program; - - /* BRW_NEW_VS_PROG_DATA */ - unsigned vs_size = MAX2(brw->vs.prog_data->base.urb_entry_size, 1); - - /* Whe using GS to do transform feedback only we use the same VUE layout for - * VS outputs and GS outputs (as it's what the SF and Clipper expect), so we - * can simply make the GS URB entry size the same as for the VS. This may - * technically be too large in cases where we have few vertex attributes and - * a lot of varyings, since the VS size is determined by the larger of the - * two. For now, it's safe. - * - * For user-provided GS the assumption above does not hold since the GS - * outputs can be different from the VS outputs. - */ - unsigned gs_size = vs_size; - if (brw->geometry_program) { - gs_size = brw->gs.prog_data->base.urb_entry_size; - assert(gs_size >= 1); - } + const struct gen_device_info *devinfo = &brw->screen->devinfo; /* Calculate how many entries fit in each stage's section of the URB */ if (gs_present) { @@ -83,17 +64,18 @@ } /* Then clamp to the maximum allowed by the hardware */ - if (nr_vs_entries > brw->urb.max_vs_entries) - nr_vs_entries = brw->urb.max_vs_entries; + if (nr_vs_entries > devinfo->urb.max_entries[MESA_SHADER_VERTEX]) + nr_vs_entries = devinfo->urb.max_entries[MESA_SHADER_VERTEX]; - if (nr_gs_entries > brw->urb.max_gs_entries) - nr_gs_entries = brw->urb.max_gs_entries; + if (nr_gs_entries > devinfo->urb.max_entries[MESA_SHADER_GEOMETRY]) + nr_gs_entries = devinfo->urb.max_entries[MESA_SHADER_GEOMETRY]; /* Finally, both must be a multiple of 4 (see 3DSTATE_URB in the PRM). */ brw->urb.nr_vs_entries = ROUND_DOWN_TO(nr_vs_entries, 4); brw->urb.nr_gs_entries = ROUND_DOWN_TO(nr_gs_entries, 4); - assert(brw->urb.nr_vs_entries >= brw->urb.min_vs_entries); + assert(brw->urb.nr_vs_entries >= + devinfo->urb.min_entries[MESA_SHADER_VERTEX]); assert(brw->urb.nr_vs_entries % 4 == 0); assert(brw->urb.nr_gs_entries % 4 == 0); assert(vs_size <= 5); @@ -124,6 +106,38 @@ brw->urb.gs_present = gs_present; } +static void +upload_urb(struct brw_context *brw) +{ + /* BRW_NEW_VS_PROG_DATA */ + const struct brw_vue_prog_data *vs_vue_prog_data = + brw_vue_prog_data(brw->vs.base.prog_data); + const unsigned vs_size = MAX2(vs_vue_prog_data->urb_entry_size, 1); + + /* BRW_NEW_GEOMETRY_PROGRAM, BRW_NEW_GS_PROG_DATA */ + const bool gs_present = brw->ff_gs.prog_active || brw->geometry_program; + + /* Whe using GS to do transform feedback only we use the same VUE layout for + * VS outputs and GS outputs (as it's what the SF and Clipper expect), so we + * can simply make the GS URB entry size the same as for the VS. This may + * technically be too large in cases where we have few vertex attributes and + * a lot of varyings, since the VS size is determined by the larger of the + * two. For now, it's safe. + * + * For user-provided GS the assumption above does not hold since the GS + * outputs can be different from the VS outputs. + */ + unsigned gs_size = vs_size; + if (brw->geometry_program) { + const struct brw_vue_prog_data *gs_vue_prog_data = + brw_vue_prog_data(brw->gs.base.prog_data); + gs_size = gs_vue_prog_data->urb_entry_size; + assert(gs_size >= 1); + } + + gen6_upload_urb(brw, vs_size, gs_present, gs_size); +} + const struct brw_tracked_state gen6_urb = { .dirty = { .mesa = 0, @@ -134,5 +148,5 @@ BRW_NEW_GS_PROG_DATA | BRW_NEW_VS_PROG_DATA, }, - .emit = gen6_upload_urb, + .emit = upload_urb, }; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_viewport_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_viewport_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_viewport_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_viewport_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -33,75 +33,123 @@ #include "main/framebuffer.h" #include "main/viewport.h" -/* The clip VP defines the guardband region where expensive clipping is skipped - * and fragments are allowed to be generated and clipped out cheaply by the SF. - */ -static void -gen6_upload_clip_vp(struct brw_context *brw) +void +brw_calculate_guardband_size(const struct gen_device_info *devinfo, + uint32_t fb_width, uint32_t fb_height, + float m00, float m11, float m30, float m31, + float *xmin, float *xmax, + float *ymin, float *ymax) { - struct gl_context *ctx = &brw->ctx; - struct brw_clipper_viewport *vp; + /* According to the "Vertex X,Y Clamping and Quantization" section of the + * Strips and Fans documentation: + * + * "The vertex X and Y screen-space coordinates are also /clamped/ to the + * fixed-point "guardband" range supported by the rasterization hardware" + * + * and + * + * "In almost all circumstances, if an object’s vertices are actually + * modified by this clamping (i.e., had X or Y coordinates outside of + * the guardband extent the rendered object will not match the intended + * result. Therefore software should take steps to ensure that this does + * not happen - e.g., by clipping objects such that they do not exceed + * these limits after the Drawing Rectangle is applied." + * + * I believe the fundamental restriction is that the rasterizer (in + * the SF/WM stages) have a limit on the number of pixels that can be + * rasterized. We need to ensure any coordinates beyond the rasterizer + * limit are handled by the clipper. So effectively that limit becomes + * the clipper's guardband size. + * + * It goes on to say: + * + * "In addition, in order to be correctly rendered, objects must have a + * screenspace bounding box not exceeding 8K in the X or Y direction. + * This additional restriction must also be comprehended by software, + * i.e., enforced by use of clipping." + * + * This makes no sense. Gen7+ hardware supports 16K render targets, + * and you definitely need to be able to draw polygons that fill the + * surface. Our assumption is that the rasterizer was limited to 8K + * on Sandybridge, which only supports 8K surfaces, and it was actually + * increased to 16K on Ivybridge and later. + * + * So, limit the guardband to 16K on Gen7+ and 8K on Sandybridge. + */ + const float gb_size = devinfo->gen >= 7 ? 16384.0f : 8192.0f; + + if (m00 != 0 && m11 != 0) { + /* First, we compute the screen-space render area */ + const float ss_ra_xmin = MIN3( 0, m30 + m00, m30 - m00); + const float ss_ra_xmax = MAX3( fb_width, m30 + m00, m30 - m00); + const float ss_ra_ymin = MIN3( 0, m31 + m11, m31 - m11); + const float ss_ra_ymax = MAX3(fb_height, m31 + m11, m31 - m11); + + /* We want the guardband to be centered on that */ + const float ss_gb_xmin = (ss_ra_xmin + ss_ra_xmax) / 2 - gb_size; + const float ss_gb_xmax = (ss_ra_xmin + ss_ra_xmax) / 2 + gb_size; + const float ss_gb_ymin = (ss_ra_ymin + ss_ra_ymax) / 2 - gb_size; + const float ss_gb_ymax = (ss_ra_ymin + ss_ra_ymax) / 2 + gb_size; + + /* Now we need it in native device coordinates */ + const float ndc_gb_xmin = (ss_gb_xmin - m30) / m00; + const float ndc_gb_xmax = (ss_gb_xmax - m30) / m00; + const float ndc_gb_ymin = (ss_gb_ymin - m31) / m11; + const float ndc_gb_ymax = (ss_gb_ymax - m31) / m11; - vp = brw_state_batch(brw, AUB_TRACE_CLIP_VP_STATE, - sizeof(*vp) * ctx->Const.MaxViewports, 32, &brw->clip.vp_offset); - - for (unsigned i = 0; i < ctx->Const.MaxViewports; i++) { - /* According to the "Vertex X,Y Clamping and Quantization" section of the - * Strips and Fans documentation, objects must not have a screen-space - * extents of over 8192 pixels, or they may be mis-rasterized. The maximum - * screen space coordinates of a small object may larger, but we have no - * way to enforce the object size other than through clipping. - * - * If you're surprised that we set clip to -gbx to +gbx and it seems like - * we'll end up with 16384 wide, note that for a 8192-wide render target, - * we'll end up with a normal (-1, 1) clip volume that just covers the - * drawable. + /* Thanks to Y-flipping and ORIGIN_UPPER_LEFT, the Y coordinates may be + * flipped upside-down. X should be fine though. */ - const float maximum_post_clamp_delta = 8192; - float gbx = maximum_post_clamp_delta / ctx->ViewportArray[i].Width; - float gby = maximum_post_clamp_delta / ctx->ViewportArray[i].Height; - - vp[i].xmin = -gbx; - vp[i].xmax = gbx; - vp[i].ymin = -gby; - vp[i].ymax = gby; + assert(ndc_gb_xmin <= ndc_gb_xmax); + *xmin = ndc_gb_xmin; + *xmax = ndc_gb_xmax; + *ymin = MIN2(ndc_gb_ymin, ndc_gb_ymax); + *ymax = MAX2(ndc_gb_ymin, ndc_gb_ymax); + } else { + /* The viewport scales to 0, so nothing will be rendered. */ + *xmin = 0.0f; + *xmax = 0.0f; + *ymin = 0.0f; + *ymax = 0.0f; } - - brw->ctx.NewDriverState |= BRW_NEW_CLIP_VP; } -const struct brw_tracked_state gen6_clip_vp = { - .dirty = { - .mesa = _NEW_VIEWPORT, - .brw = BRW_NEW_BATCH | - BRW_NEW_BLORP, - }, - .emit = gen6_upload_clip_vp, -}; - static void -gen6_upload_sf_vp(struct brw_context *brw) +gen6_upload_sf_and_clip_viewports(struct brw_context *brw) { struct gl_context *ctx = &brw->ctx; + const struct gen_device_info *devinfo = &brw->screen->devinfo; struct gen6_sf_viewport *sfv; + struct brw_clipper_viewport *clv; GLfloat y_scale, y_bias; - const bool render_to_fbo = _mesa_is_user_fbo(ctx->DrawBuffer); + + /* BRW_NEW_VIEWPORT_COUNT */ + const unsigned viewport_count = brw->clip.viewport_count; + + /* _NEW_BUFFERS */ + struct gl_framebuffer *fb = ctx->DrawBuffer; + const bool render_to_fbo = _mesa_is_user_fbo(fb); + const uint32_t fb_width = _mesa_geometric_width(ctx->DrawBuffer); + const uint32_t fb_height = _mesa_geometric_height(ctx->DrawBuffer); sfv = brw_state_batch(brw, AUB_TRACE_SF_VP_STATE, - sizeof(*sfv) * ctx->Const.MaxViewports, + sizeof(*sfv) * viewport_count, 32, &brw->sf.vp_offset); - memset(sfv, 0, sizeof(*sfv) * ctx->Const.MaxViewports); + memset(sfv, 0, sizeof(*sfv) * viewport_count); + + clv = brw_state_batch(brw, AUB_TRACE_CLIP_VP_STATE, + sizeof(*clv) * viewport_count, + 32, &brw->clip.vp_offset); - /* _NEW_BUFFERS */ if (render_to_fbo) { y_scale = 1.0; y_bias = 0.0; } else { y_scale = -1.0; - y_bias = (float)_mesa_geometric_height(ctx->DrawBuffer); + y_bias = (float)fb_height; } - for (unsigned i = 0; i < ctx->Const.MaxViewports; i++) { + for (unsigned i = 0; i < viewport_count; i++) { float scale[3], translate[3]; /* _NEW_VIEWPORT */ @@ -113,19 +161,25 @@ sfv[i].m31 = translate[1] * y_scale + y_bias; sfv[i].m32 = translate[2]; + brw_calculate_guardband_size(devinfo, fb_width, fb_height, + sfv[i].m00, sfv[i].m11, + sfv[i].m30, sfv[i].m31, + &clv[i].xmin, &clv[i].xmax, + &clv[i].ymin, &clv[i].ymax); } - brw->ctx.NewDriverState |= BRW_NEW_SF_VP; + brw->ctx.NewDriverState |= BRW_NEW_SF_VP | BRW_NEW_CLIP_VP; } -const struct brw_tracked_state gen6_sf_vp = { +const struct brw_tracked_state gen6_sf_and_clip_viewports = { .dirty = { .mesa = _NEW_BUFFERS | _NEW_VIEWPORT, .brw = BRW_NEW_BATCH | - BRW_NEW_BLORP, + BRW_NEW_BLORP | + BRW_NEW_VIEWPORT_COUNT, }, - .emit = gen6_upload_sf_vp, + .emit = gen6_upload_sf_and_clip_viewports, }; static void upload_viewport_state_pointers(struct brw_context *brw) diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_vs_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_vs_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_vs_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_vs_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -31,6 +31,7 @@ #include "brw_util.h" #include "program/prog_parameter.h" #include "program/prog_statevars.h" +#include "main/shaderapi.h" #include "intel_batchbuffer.h" static void @@ -39,13 +40,13 @@ struct brw_stage_state *stage_state = &brw->vs.base; /* _BRW_NEW_VERTEX_PROGRAM */ - const struct brw_vertex_program *vp = - brw_vertex_program_const(brw->vertex_program); + const struct brw_program *vp = brw_program_const(brw->vertex_program); /* BRW_NEW_VS_PROG_DATA */ - const struct brw_stage_prog_data *prog_data = &brw->vs.prog_data->base.base; + const struct brw_stage_prog_data *prog_data = brw->vs.base.prog_data; - gen6_upload_push_constants(brw, &vp->program.Base, prog_data, - stage_state, AUB_TRACE_VS_CONSTANTS); + _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_VERTEX); + gen6_upload_push_constants(brw, &vp->program, prog_data, stage_state, + AUB_TRACE_VS_CONSTANTS); if (brw->gen >= 7) { if (brw->gen == 7 && !brw->is_haswell && !brw->is_baytrail) @@ -72,7 +73,11 @@ static void upload_vs_state(struct brw_context *brw) { + const struct gen_device_info *devinfo = &brw->screen->devinfo; const struct brw_stage_state *stage_state = &brw->vs.base; + const struct brw_stage_prog_data *prog_data = stage_state->prog_data; + const struct brw_vue_prog_data *vue_prog_data = + brw_vue_prog_data(stage_state->prog_data); uint32_t floating_point_mode = 0; /* From the BSpec, 3D Pipeline > Geometry > Vertex Shader > State, @@ -112,7 +117,7 @@ ADVANCE_BATCH(); } - if (brw->vs.prog_data->base.base.use_alt_mode) + if (prog_data->use_alt_mode) floating_point_mode = GEN6_VS_FLOATING_POINT_MODE_ALT; BEGIN_BATCH(6); @@ -120,10 +125,10 @@ OUT_BATCH(stage_state->prog_offset); OUT_BATCH(floating_point_mode | ((ALIGN(stage_state->sampler_count, 4)/4) << GEN6_VS_SAMPLER_COUNT_SHIFT) | - ((brw->vs.prog_data->base.base.binding_table.size_bytes / 4) << + ((prog_data->binding_table.size_bytes / 4) << GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT)); - if (brw->vs.prog_data->base.base.total_scratch) { + if (prog_data->total_scratch) { OUT_RELOC(stage_state->scratch_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, ffs(stage_state->per_thread_scratch) - 11); @@ -131,12 +136,12 @@ OUT_BATCH(0); } - OUT_BATCH((brw->vs.prog_data->base.base.dispatch_grf_start_reg << + OUT_BATCH((prog_data->dispatch_grf_start_reg << GEN6_VS_DISPATCH_START_GRF_SHIFT) | - (brw->vs.prog_data->base.urb_read_length << GEN6_VS_URB_READ_LENGTH_SHIFT) | + (vue_prog_data->urb_read_length << GEN6_VS_URB_READ_LENGTH_SHIFT) | (0 << GEN6_VS_URB_ENTRY_READ_OFFSET_SHIFT)); - OUT_BATCH(((brw->max_vs_threads - 1) << GEN6_VS_MAX_THREADS_SHIFT) | + OUT_BATCH(((devinfo->max_vs_threads - 1) << GEN6_VS_MAX_THREADS_SHIFT) | GEN6_VS_STATISTICS_ENABLE | GEN6_VS_ENABLE); ADVANCE_BATCH(); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_wm_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_wm_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen6_wm_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen6_wm_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -33,6 +33,7 @@ #include "program/program.h" #include "program/prog_parameter.h" #include "program/prog_statevars.h" +#include "main/shaderapi.h" #include "main/framebuffer.h" #include "intel_batchbuffer.h" @@ -41,12 +42,13 @@ { struct brw_stage_state *stage_state = &brw->wm.base; /* BRW_NEW_FRAGMENT_PROGRAM */ - const struct brw_fragment_program *fp = - brw_fragment_program_const(brw->fragment_program); + const struct brw_program *fp = brw_program_const(brw->fragment_program); /* BRW_NEW_FS_PROG_DATA */ - const struct brw_wm_prog_data *prog_data = brw->wm.prog_data; + const struct brw_stage_prog_data *prog_data = brw->wm.base.prog_data; - gen6_upload_push_constants(brw, &fp->program.Base, &prog_data->base, + _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_FRAGMENT); + + gen6_upload_push_constants(brw, &fp->program, prog_data, stage_state, AUB_TRACE_WM_CONSTANTS); if (brw->gen >= 7) { @@ -77,6 +79,7 @@ bool line_stipple_enable, bool polygon_stipple_enable, bool statistic_enable) { + const struct gen_device_info *devinfo = &brw->screen->devinfo; uint32_t dw2, dw4, dw5, dw6, ksp0, ksp2; /* We can't fold this into gen6_upload_wm_push_constants(), because @@ -127,7 +130,7 @@ dw2 |= ((prog_data->base.binding_table.size_bytes / 4) << GEN6_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT); - dw5 |= (brw->max_wm_threads - 1) << GEN6_WM_MAX_THREADS_SHIFT; + dw5 |= (devinfo->max_wm_threads - 1) << GEN6_WM_MAX_THREADS_SHIFT; if (prog_data->dispatch_8) dw5 |= GEN6_WM_8_DISPATCH_ENABLE; @@ -237,7 +240,8 @@ { struct gl_context *ctx = &brw->ctx; /* BRW_NEW_FS_PROG_DATA */ - const struct brw_wm_prog_data *prog_data = brw->wm.prog_data; + const struct brw_wm_prog_data *prog_data = + brw_wm_prog_data(brw->wm.base.prog_data); /* _NEW_BUFFERS */ const bool multisampled_fbo = _mesa_geometric_samples(ctx->DrawBuffer) > 1; @@ -247,9 +251,10 @@ (ctx->Color.BlendEnabled & 1) && ctx->Color.Blend[0]._UsesDualSrc; - /* _NEW_COLOR, _NEW_MULTISAMPLE */ - const bool kill_enable = prog_data->uses_kill || ctx->Color.AlphaEnabled || - ctx->Multisample.SampleAlphaToCoverage || + /* _NEW_COLOR, _NEW_MULTISAMPLE _NEW_BUFFERS */ + const bool kill_enable = prog_data->uses_kill || + _mesa_is_alpha_test_enabled(ctx) || + _mesa_is_alpha_to_coverage_enabled(ctx) || prog_data->uses_omask; /* Rendering against the gl-context is always taken into account. */ diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_blorp.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_blorp.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_blorp.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_blorp.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,892 +0,0 @@ -/* - * Copyright © 2011 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - -#include - -#include "intel_batchbuffer.h" -#include "intel_mipmap_tree.h" - -#include "brw_context.h" -#include "brw_state.h" - -#include "brw_blorp.h" - -static bool -gen7_blorp_skip_urb_config(const struct brw_context *brw) -{ - if (brw->ctx.NewDriverState & (BRW_NEW_CONTEXT | BRW_NEW_URB_SIZE)) - return false; - - /* Vertex buffer takes 24 bytes. As the size is expressed in 64 bytes, - * one will suffice, otherwise the setup can be any valid configuration. - */ - return brw->urb.vsize > 0; -} - -/* 3DSTATE_URB_VS - * 3DSTATE_URB_HS - * 3DSTATE_URB_DS - * 3DSTATE_URB_GS - * - * If the 3DSTATE_URB_VS is emitted, than the others must be also. - * From the Ivybridge PRM, Volume 2 Part 1, section 1.7.1 3DSTATE_URB_VS: - * - * 3DSTATE_URB_HS, 3DSTATE_URB_DS, and 3DSTATE_URB_GS must also be - * programmed in order for the programming of this state to be - * valid. - */ -void -gen7_blorp_emit_urb_config(struct brw_context *brw) -{ - /* URB allocations must be done in 8k chunks. */ - const unsigned chunk_size_bytes = 8192; - const unsigned urb_size = - (brw->gen >= 8 || (brw->is_haswell && brw->gt == 3)) ? 32 : 16; - const unsigned push_constant_bytes = 1024 * urb_size; - const unsigned push_constant_chunks = - push_constant_bytes / chunk_size_bytes; - const unsigned vs_size = 1; - const unsigned vs_start = push_constant_chunks; - const unsigned min_vs_entries = ALIGN(brw->urb.min_vs_entries, 8); - const unsigned vs_chunks = - DIV_ROUND_UP(min_vs_entries * vs_size * 64, chunk_size_bytes); - - if (gen7_blorp_skip_urb_config(brw)) - return; - - brw->ctx.NewDriverState |= BRW_NEW_URB_SIZE; - - gen7_emit_push_constant_state(brw, - urb_size / 2 /* vs_size */, - 0 /* hs_size */, - 0 /* ds_size */, - 0 /* gs_size */, - urb_size / 2 /* fs_size */); - - gen7_emit_urb_state(brw, - min_vs_entries /* num_vs_entries */, - vs_size, - vs_start, - 0 /* num_hs_entries */, - 1 /* hs_size */, - vs_start + vs_chunks /* hs_start */, - 0 /* num_ds_entries */, - 1 /* ds_size */, - vs_start + vs_chunks /* ds_start */, - 0 /* num_gs_entries */, - 1 /* gs_size */, - vs_start + vs_chunks /* gs_start */); -} - - -/* 3DSTATE_BLEND_STATE_POINTERS */ -void -gen7_blorp_emit_blend_state_pointer(struct brw_context *brw, - uint32_t cc_blend_state_offset) -{ - BEGIN_BATCH(2); - OUT_BATCH(_3DSTATE_BLEND_STATE_POINTERS << 16 | (2 - 2)); - OUT_BATCH(cc_blend_state_offset | 1); - ADVANCE_BATCH(); -} - - -/* 3DSTATE_CC_STATE_POINTERS */ -void -gen7_blorp_emit_cc_state_pointer(struct brw_context *brw, - uint32_t cc_state_offset) -{ - BEGIN_BATCH(2); - OUT_BATCH(_3DSTATE_CC_STATE_POINTERS << 16 | (2 - 2)); - OUT_BATCH(cc_state_offset | 1); - ADVANCE_BATCH(); -} - -void -gen7_blorp_emit_cc_viewport(struct brw_context *brw) -{ - struct brw_cc_viewport *ccv; - uint32_t cc_vp_offset; - - ccv = (struct brw_cc_viewport *)brw_state_batch(brw, AUB_TRACE_CC_VP_STATE, - sizeof(*ccv), 32, - &cc_vp_offset); - ccv->min_depth = 0.0; - ccv->max_depth = 1.0; - - BEGIN_BATCH(2); - OUT_BATCH(_3DSTATE_VIEWPORT_STATE_POINTERS_CC << 16 | (2 - 2)); - OUT_BATCH(cc_vp_offset); - ADVANCE_BATCH(); -} - - -/* 3DSTATE_DEPTH_STENCIL_STATE_POINTERS - * - * The offset is relative to CMD_STATE_BASE_ADDRESS.DynamicStateBaseAddress. - */ -static void -gen7_blorp_emit_depth_stencil_state_pointers(struct brw_context *brw, - uint32_t depthstencil_offset) -{ - BEGIN_BATCH(2); - OUT_BATCH(_3DSTATE_DEPTH_STENCIL_STATE_POINTERS << 16 | (2 - 2)); - OUT_BATCH(depthstencil_offset | 1); - ADVANCE_BATCH(); -} - - -/* SURFACE_STATE for renderbuffer or texture surface (see - * brw_update_renderbuffer_surface and brw_update_texture_surface) - */ -static uint32_t -gen7_blorp_emit_surface_state(struct brw_context *brw, - const struct brw_blorp_surface_info *surface, - uint32_t read_domains, uint32_t write_domain, - bool is_render_target) -{ - uint32_t wm_surf_offset; - uint32_t width = surface->width; - uint32_t height = surface->height; - /* Note: since gen7 uses INTEL_MSAA_LAYOUT_CMS or INTEL_MSAA_LAYOUT_UMS for - * color surfaces, width and height are measured in pixels; we don't need - * to divide them by 2 as we do for Gen6 (see - * gen6_blorp_emit_surface_state). - */ - struct intel_mipmap_tree *mt = surface->mt; - uint32_t tile_x, tile_y; - const uint8_t mocs = GEN7_MOCS_L3; - - uint32_t tiling = surface->map_stencil_as_y_tiled - ? I915_TILING_Y : mt->tiling; - - uint32_t *surf = (uint32_t *) - brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, 8 * 4, 32, &wm_surf_offset); - memset(surf, 0, 8 * 4); - - surf[0] = BRW_SURFACE_2D << BRW_SURFACE_TYPE_SHIFT | - surface->brw_surfaceformat << BRW_SURFACE_FORMAT_SHIFT | - gen7_surface_tiling_mode(tiling); - - if (surface->mt->valign == 4) - surf[0] |= GEN7_SURFACE_VALIGN_4; - if (surface->mt->halign == 8) - surf[0] |= GEN7_SURFACE_HALIGN_8; - - if (surface->array_layout == ALL_SLICES_AT_EACH_LOD) - surf[0] |= GEN7_SURFACE_ARYSPC_LOD0; - else - surf[0] |= GEN7_SURFACE_ARYSPC_FULL; - - /* reloc */ - surf[1] = brw_blorp_compute_tile_offsets(surface, &tile_x, &tile_y) + - mt->bo->offset64; - - /* Note that the low bits of these fields are missing, so - * there's the possibility of getting in trouble. - */ - assert(tile_x % 4 == 0); - assert(tile_y % 2 == 0); - surf[5] = SET_FIELD(tile_x / 4, BRW_SURFACE_X_OFFSET) | - SET_FIELD(tile_y / 2, BRW_SURFACE_Y_OFFSET) | - SET_FIELD(mocs, GEN7_SURFACE_MOCS); - - surf[2] = SET_FIELD(width - 1, GEN7_SURFACE_WIDTH) | - SET_FIELD(height - 1, GEN7_SURFACE_HEIGHT); - - uint32_t pitch_bytes = mt->pitch; - if (surface->map_stencil_as_y_tiled) - pitch_bytes *= 2; - surf[3] = pitch_bytes - 1; - - surf[4] = gen7_surface_msaa_bits(surface->num_samples, surface->msaa_layout); - if (surface->mt->mcs_mt) { - gen7_set_surface_mcs_info(brw, surf, wm_surf_offset, surface->mt->mcs_mt, - is_render_target); - } - - surf[7] = surface->mt->fast_clear_color_value; - - if (brw->is_haswell) { - surf[7] |= (SET_FIELD(HSW_SCS_RED, GEN7_SURFACE_SCS_R) | - SET_FIELD(HSW_SCS_GREEN, GEN7_SURFACE_SCS_G) | - SET_FIELD(HSW_SCS_BLUE, GEN7_SURFACE_SCS_B) | - SET_FIELD(HSW_SCS_ALPHA, GEN7_SURFACE_SCS_A)); - } - - /* Emit relocation to surface contents */ - drm_intel_bo_emit_reloc(brw->batch.bo, - wm_surf_offset + 4, - mt->bo, - surf[1] - mt->bo->offset64, - read_domains, write_domain); - - gen7_check_surface_setup(surf, is_render_target); - - return wm_surf_offset; -} - - -/* 3DSTATE_VS - * - * Disable vertex shader. - */ -static void -gen7_blorp_emit_vs_disable(struct brw_context *brw) -{ - BEGIN_BATCH(7); - OUT_BATCH(_3DSTATE_CONSTANT_VS << 16 | (7 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); - - BEGIN_BATCH(6); - OUT_BATCH(_3DSTATE_VS << 16 | (6 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - - -/* 3DSTATE_HS - * - * Disable the hull shader. - */ -static void -gen7_blorp_emit_hs_disable(struct brw_context *brw) -{ - BEGIN_BATCH(7); - OUT_BATCH(_3DSTATE_CONSTANT_HS << 16 | (7 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); - - BEGIN_BATCH(7); - OUT_BATCH(_3DSTATE_HS << 16 | (7 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - - -/* 3DSTATE_TE - * - * Disable the tesselation engine. - */ -void -gen7_blorp_emit_te_disable(struct brw_context *brw) -{ - BEGIN_BATCH(4); - OUT_BATCH(_3DSTATE_TE << 16 | (4 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - - -/* 3DSTATE_DS - * - * Disable the domain shader. - */ -static void -gen7_blorp_emit_ds_disable(struct brw_context *brw) -{ - BEGIN_BATCH(7); - OUT_BATCH(_3DSTATE_CONSTANT_DS << 16 | (7 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); - - BEGIN_BATCH(6); - OUT_BATCH(_3DSTATE_DS << 16 | (6 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - -/* 3DSTATE_GS - * - * Disable the geometry shader. - */ -static void -gen7_blorp_emit_gs_disable(struct brw_context *brw) -{ - BEGIN_BATCH(7); - OUT_BATCH(_3DSTATE_CONSTANT_GS << 16 | (7 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); - - /** - * From Graphics BSpec: 3D-Media-GPGPU Engine > 3D Pipeline Stages > - * Geometry > Geometry Shader > State: - * - * "Note: Because of corruption in IVB:GT2, software needs to flush the - * whole fixed function pipeline when the GS enable changes value in - * the 3DSTATE_GS." - * - * The hardware architects have clarified that in this context "flush the - * whole fixed function pipeline" means to emit a PIPE_CONTROL with the "CS - * Stall" bit set. - */ - if (brw->gen < 8 && !brw->is_haswell && brw->gt == 2 && brw->gs.enabled) - gen7_emit_cs_stall_flush(brw); - - BEGIN_BATCH(7); - OUT_BATCH(_3DSTATE_GS << 16 | (7 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); - brw->gs.enabled = false; -} - -/* 3DSTATE_STREAMOUT - * - * Disable streamout. - */ -static void -gen7_blorp_emit_streamout_disable(struct brw_context *brw) -{ - BEGIN_BATCH(3); - OUT_BATCH(_3DSTATE_STREAMOUT << 16 | (3 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - - -static void -gen7_blorp_emit_sf_config(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - /* 3DSTATE_SF - * - * Disable ViewportTransformEnable (dw1.1) - * - * From the SandyBridge PRM, Volume 2, Part 1, Section 1.3, "3D - * Primitives Overview": - * RECTLIST: Viewport Mapping must be DISABLED (as is typical with the - * use of screen- space coordinates). - * - * A solid rectangle must be rendered, so set FrontFaceFillMode (dw1.6:5) - * and BackFaceFillMode (dw1.4:3) to SOLID(0). - * - * From the Sandy Bridge PRM, Volume 2, Part 1, Section - * 6.4.1.1 3DSTATE_SF, Field FrontFaceFillMode: - * SOLID: Any triangle or rectangle object found to be front-facing - * is rendered as a solid object. This setting is required when - * (rendering rectangle (RECTLIST) objects. - */ - { - BEGIN_BATCH(7); - OUT_BATCH(_3DSTATE_SF << 16 | (7 - 2)); - OUT_BATCH(params->depth_format << - GEN7_SF_DEPTH_BUFFER_SURFACE_FORMAT_SHIFT); - OUT_BATCH(params->dst.num_samples > 1 ? GEN6_SF_MSRAST_ON_PATTERN : 0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); - } - - /* 3DSTATE_SBE */ - { - BEGIN_BATCH(14); - OUT_BATCH(_3DSTATE_SBE << 16 | (14 - 2)); - OUT_BATCH(GEN7_SBE_SWIZZLE_ENABLE | - params->num_varyings << GEN7_SBE_NUM_OUTPUTS_SHIFT | - 1 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT | - BRW_SF_URB_ENTRY_READ_OFFSET << - GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT); - for (int i = 0; i < 12; ++i) - OUT_BATCH(0); - ADVANCE_BATCH(); - } -} - - -/** - * Disable thread dispatch (dw5.19) and enable the HiZ op. - */ -static void -gen7_blorp_emit_wm_config(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - const struct brw_blorp_prog_data *prog_data = params->wm_prog_data; - uint32_t dw1 = 0, dw2 = 0; - - switch (params->hiz_op) { - case GEN6_HIZ_OP_DEPTH_CLEAR: - dw1 |= GEN7_WM_DEPTH_CLEAR; - break; - case GEN6_HIZ_OP_DEPTH_RESOLVE: - dw1 |= GEN7_WM_DEPTH_RESOLVE; - break; - case GEN6_HIZ_OP_HIZ_RESOLVE: - dw1 |= GEN7_WM_HIERARCHICAL_DEPTH_RESOLVE; - break; - case GEN6_HIZ_OP_NONE: - break; - default: - unreachable("not reached"); - } - dw1 |= GEN7_WM_LINE_AA_WIDTH_1_0; - dw1 |= GEN7_WM_LINE_END_CAP_AA_WIDTH_0_5; - dw1 |= 0 << GEN7_WM_BARYCENTRIC_INTERPOLATION_MODE_SHIFT; /* No interp */ - - if (params->wm_prog_data) - dw1 |= GEN7_WM_DISPATCH_ENABLE; /* We are rendering */ - - if (params->src.mt) - dw1 |= GEN7_WM_KILL_ENABLE; /* TODO: temporarily smash on */ - - if (params->dst.num_samples > 1) { - dw1 |= GEN7_WM_MSRAST_ON_PATTERN; - if (prog_data && prog_data->persample_msaa_dispatch) - dw2 |= GEN7_WM_MSDISPMODE_PERSAMPLE; - else - dw2 |= GEN7_WM_MSDISPMODE_PERPIXEL; - } else { - dw1 |= GEN7_WM_MSRAST_OFF_PIXEL; - dw2 |= GEN7_WM_MSDISPMODE_PERSAMPLE; - } - - BEGIN_BATCH(3); - OUT_BATCH(_3DSTATE_WM << 16 | (3 - 2)); - OUT_BATCH(dw1); - OUT_BATCH(dw2); - ADVANCE_BATCH(); -} - - -/** - * 3DSTATE_PS - * - * Pixel shader dispatch is disabled above in 3DSTATE_WM, dw1.29. Despite - * that, thread dispatch info must still be specified. - * - Maximum Number of Threads (dw4.24:31) must be nonzero, as the - * valid range for this field is [0x3, 0x2f]. - * - A dispatch mode must be given; that is, at least one of the - * "N Pixel Dispatch Enable" (N=8,16,32) fields must be set. This was - * discovered through simulator error messages. - */ -static void -gen7_blorp_emit_ps_config(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - const struct brw_blorp_prog_data *prog_data = params->wm_prog_data; - uint32_t dw2, dw4, dw5, ksp0, ksp2; - const int max_threads_shift = brw->is_haswell ? - HSW_PS_MAX_THREADS_SHIFT : IVB_PS_MAX_THREADS_SHIFT; - - dw2 = dw4 = dw5 = ksp0 = ksp2 = 0; - dw4 |= (brw->max_wm_threads - 1) << max_threads_shift; - - if (brw->is_haswell) - dw4 |= SET_FIELD(1, HSW_PS_SAMPLE_MASK); /* 1 sample for now */ - if (params->wm_prog_data) { - dw4 |= GEN7_PS_PUSH_CONSTANT_ENABLE; - - dw5 |= prog_data->first_curbe_grf_0 << GEN7_PS_DISPATCH_START_GRF_SHIFT_0; - dw5 |= prog_data->first_curbe_grf_2 << GEN7_PS_DISPATCH_START_GRF_SHIFT_2; - - ksp0 = params->wm_prog_kernel; - ksp2 = params->wm_prog_kernel + params->wm_prog_data->ksp_offset_2; - - if (params->wm_prog_data->dispatch_8) - dw4 |= GEN7_PS_8_DISPATCH_ENABLE; - if (params->wm_prog_data->dispatch_16) - dw4 |= GEN7_PS_16_DISPATCH_ENABLE; - } else { - /* The hardware gets angry if we don't enable at least one dispatch - * mode, so just enable 16-pixel dispatch if we don't have a program. - */ - dw4 |= GEN7_PS_16_DISPATCH_ENABLE; - } - - if (params->src.mt) - dw2 |= 1 << GEN7_PS_SAMPLER_COUNT_SHIFT; /* Up to 4 samplers */ - - dw4 |= params->fast_clear_op; - - BEGIN_BATCH(8); - OUT_BATCH(_3DSTATE_PS << 16 | (8 - 2)); - OUT_BATCH(ksp0); - OUT_BATCH(dw2); - OUT_BATCH(0); - OUT_BATCH(dw4); - OUT_BATCH(dw5); - OUT_BATCH(0); /* kernel 1 pointer */ - OUT_BATCH(ksp2); - ADVANCE_BATCH(); -} - - -void -gen7_blorp_emit_binding_table_pointers_ps(struct brw_context *brw, - uint32_t wm_bind_bo_offset) -{ - BEGIN_BATCH(2); - OUT_BATCH(_3DSTATE_BINDING_TABLE_POINTERS_PS << 16 | (2 - 2)); - OUT_BATCH(wm_bind_bo_offset); - ADVANCE_BATCH(); -} - - -void -gen7_blorp_emit_sampler_state_pointers_ps(struct brw_context *brw, - uint32_t sampler_offset) -{ - BEGIN_BATCH(2); - OUT_BATCH(_3DSTATE_SAMPLER_STATE_POINTERS_PS << 16 | (2 - 2)); - OUT_BATCH(sampler_offset); - ADVANCE_BATCH(); -} - - -void -gen7_blorp_emit_constant_ps(struct brw_context *brw, - uint32_t wm_push_const_offset) -{ - const uint8_t mocs = GEN7_MOCS_L3; - - /* Make sure the push constants fill an exact integer number of - * registers. - */ - assert(sizeof(struct brw_blorp_wm_push_constants) % 32 == 0); - - /* There must be at least one register worth of push constant data. */ - assert(BRW_BLORP_NUM_PUSH_CONST_REGS > 0); - - /* Enable push constant buffer 0. */ - BEGIN_BATCH(7); - OUT_BATCH(_3DSTATE_CONSTANT_PS << 16 | - (7 - 2)); - OUT_BATCH(BRW_BLORP_NUM_PUSH_CONST_REGS); - OUT_BATCH(0); - OUT_BATCH(wm_push_const_offset | mocs); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - -void -gen7_blorp_emit_constant_ps_disable(struct brw_context *brw) -{ - BEGIN_BATCH(7); - OUT_BATCH(_3DSTATE_CONSTANT_PS << 16 | (7 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - -static void -gen7_blorp_emit_depth_stencil_config(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - const uint8_t mocs = GEN7_MOCS_L3; - uint32_t surfwidth, surfheight; - uint32_t surftype; - unsigned int depth = MAX2(params->depth.mt->logical_depth0, 1); - unsigned int min_array_element; - GLenum gl_target = params->depth.mt->target; - unsigned int lod; - - switch (gl_target) { - case GL_TEXTURE_CUBE_MAP_ARRAY: - case GL_TEXTURE_CUBE_MAP: - /* The PRM claims that we should use BRW_SURFACE_CUBE for this - * situation, but experiments show that gl_Layer doesn't work when we do - * this. So we use BRW_SURFACE_2D, since for rendering purposes this is - * equivalent. - */ - surftype = BRW_SURFACE_2D; - depth *= 6; - break; - default: - surftype = translate_tex_target(gl_target); - break; - } - - min_array_element = params->depth.layer; - if (params->depth.mt->num_samples > 1) { - /* Convert physical layer to logical layer. */ - min_array_element /= params->depth.mt->num_samples; - } - - lod = params->depth.level - params->depth.mt->first_level; - - if (params->hiz_op != GEN6_HIZ_OP_NONE && lod == 0) { - /* HIZ ops for lod 0 may set the width & height a little - * larger to allow the fast depth clear to fit the hardware - * alignment requirements. (8x4) - */ - surfwidth = params->depth.width; - surfheight = params->depth.height; - } else { - surfwidth = params->depth.mt->logical_width0; - surfheight = params->depth.mt->logical_height0; - } - - /* 3DSTATE_DEPTH_BUFFER */ - { - brw_emit_depth_stall_flushes(brw); - - BEGIN_BATCH(7); - OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER << 16 | (7 - 2)); - OUT_BATCH((params->depth.mt->pitch - 1) | - params->depth_format << 18 | - 1 << 22 | /* hiz enable */ - 1 << 28 | /* depth write */ - surftype << 29); - OUT_RELOC(params->depth.mt->bo, - I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, - 0); - OUT_BATCH((surfwidth - 1) << 4 | - (surfheight - 1) << 18 | - lod); - OUT_BATCH(((depth - 1) << 21) | - (min_array_element << 10) | - mocs); - OUT_BATCH(0); - OUT_BATCH((depth - 1) << 21); - ADVANCE_BATCH(); - } - - /* 3DSTATE_HIER_DEPTH_BUFFER */ - { - struct intel_miptree_aux_buffer *hiz_buf = params->depth.mt->hiz_buf; - - BEGIN_BATCH(3); - OUT_BATCH((GEN7_3DSTATE_HIER_DEPTH_BUFFER << 16) | (3 - 2)); - OUT_BATCH((mocs << 25) | - (hiz_buf->pitch - 1)); - OUT_RELOC(hiz_buf->bo, - I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, - 0); - ADVANCE_BATCH(); - } - - /* 3DSTATE_STENCIL_BUFFER */ - { - BEGIN_BATCH(3); - OUT_BATCH((GEN7_3DSTATE_STENCIL_BUFFER << 16) | (3 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); - } -} - - -static void -gen7_blorp_emit_depth_disable(struct brw_context *brw) -{ - brw_emit_depth_stall_flushes(brw); - - BEGIN_BATCH(7); - OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER << 16 | (7 - 2)); - OUT_BATCH(BRW_DEPTHFORMAT_D32_FLOAT << 18 | (BRW_SURFACE_NULL << 29)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); - - BEGIN_BATCH(3); - OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER << 16 | (3 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); - - BEGIN_BATCH(3); - OUT_BATCH(GEN7_3DSTATE_STENCIL_BUFFER << 16 | (3 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - - -/* 3DSTATE_CLEAR_PARAMS - * - * From the Ivybridge PRM, Volume 2 Part 1, Section 11.5.5.4 - * 3DSTATE_CLEAR_PARAMS: - * 3DSTATE_CLEAR_PARAMS must always be programmed in the along - * with the other Depth/Stencil state commands(i.e. 3DSTATE_DEPTH_BUFFER, - * 3DSTATE_STENCIL_BUFFER, or 3DSTATE_HIER_DEPTH_BUFFER). - */ -void -gen7_blorp_emit_clear_params(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - BEGIN_BATCH(3); - OUT_BATCH(GEN7_3DSTATE_CLEAR_PARAMS << 16 | (3 - 2)); - OUT_BATCH(params->depth.mt ? params->depth.mt->depth_clear_value : 0); - OUT_BATCH(GEN7_DEPTH_CLEAR_VALID); - ADVANCE_BATCH(); -} - - -/* 3DPRIMITIVE */ -void -gen7_blorp_emit_primitive(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - BEGIN_BATCH(7); - OUT_BATCH(CMD_3D_PRIM << 16 | (7 - 2)); - OUT_BATCH(GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL | - _3DPRIM_RECTLIST); - OUT_BATCH(3); /* vertex count per instance */ - OUT_BATCH(0); - OUT_BATCH(params->num_layers); /* instance count */ - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - - -/** - * \copydoc gen6_blorp_exec() - */ -void -gen7_blorp_exec(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - if (brw->gen >= 8) - return; - - uint32_t cc_blend_state_offset = 0; - uint32_t cc_state_offset = 0; - uint32_t depthstencil_offset; - uint32_t wm_push_const_offset = 0; - uint32_t wm_bind_bo_offset = 0; - - brw_upload_state_base_address(brw); - - gen6_emit_3dstate_multisample(brw, params->dst.num_samples); - gen6_emit_3dstate_sample_mask(brw, - params->dst.num_samples > 1 ? - (1 << params->dst.num_samples) - 1 : 1); - gen6_blorp_emit_vertices(brw, params); - gen7_blorp_emit_urb_config(brw); - if (params->wm_prog_data) { - cc_blend_state_offset = gen6_blorp_emit_blend_state(brw, params); - cc_state_offset = gen6_blorp_emit_cc_state(brw); - gen7_blorp_emit_blend_state_pointer(brw, cc_blend_state_offset); - gen7_blorp_emit_cc_state_pointer(brw, cc_state_offset); - } - depthstencil_offset = gen6_blorp_emit_depth_stencil_state(brw, params); - gen7_blorp_emit_depth_stencil_state_pointers(brw, depthstencil_offset); - if (brw->use_resource_streamer) - gen7_disable_hw_binding_tables(brw); - if (params->wm_prog_data) { - uint32_t wm_surf_offset_renderbuffer; - uint32_t wm_surf_offset_texture = 0; - wm_push_const_offset = gen6_blorp_emit_wm_constants(brw, params); - intel_miptree_used_for_rendering(params->dst.mt); - wm_surf_offset_renderbuffer = - gen7_blorp_emit_surface_state(brw, ¶ms->dst, - I915_GEM_DOMAIN_RENDER, - I915_GEM_DOMAIN_RENDER, - true /* is_render_target */); - if (params->src.mt) { - wm_surf_offset_texture = - gen7_blorp_emit_surface_state(brw, ¶ms->src, - I915_GEM_DOMAIN_SAMPLER, 0, - false /* is_render_target */); - } - wm_bind_bo_offset = - gen6_blorp_emit_binding_table(brw, - wm_surf_offset_renderbuffer, - wm_surf_offset_texture); - } - gen7_blorp_emit_vs_disable(brw); - gen7_blorp_emit_hs_disable(brw); - gen7_blorp_emit_te_disable(brw); - gen7_blorp_emit_ds_disable(brw); - gen7_blorp_emit_gs_disable(brw); - gen7_blorp_emit_streamout_disable(brw); - gen6_blorp_emit_clip_disable(brw); - gen7_blorp_emit_sf_config(brw, params); - gen7_blorp_emit_wm_config(brw, params); - if (params->wm_prog_data) { - gen7_blorp_emit_binding_table_pointers_ps(brw, wm_bind_bo_offset); - gen7_blorp_emit_constant_ps(brw, wm_push_const_offset); - } else { - gen7_blorp_emit_constant_ps_disable(brw); - } - - if (params->src.mt) { - const uint32_t sampler_offset = - gen6_blorp_emit_sampler_state(brw, BRW_MAPFILTER_LINEAR, 0, true); - gen7_blorp_emit_sampler_state_pointers_ps(brw, sampler_offset); - } - - gen7_blorp_emit_ps_config(brw, params); - gen7_blorp_emit_cc_viewport(brw); - - if (params->depth.mt) - gen7_blorp_emit_depth_stencil_config(brw, params); - else - gen7_blorp_emit_depth_disable(brw); - gen7_blorp_emit_clear_params(brw, params); - gen6_blorp_emit_drawing_rectangle(brw, params); - gen7_blorp_emit_primitive(brw, params); -} diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_cs_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_cs_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_cs_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_cs_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -32,23 +32,24 @@ #include "brw_state.h" #include "program/prog_statevars.h" #include "compiler/glsl/ir_uniform.h" +#include "main/shaderapi.h" static void brw_upload_cs_state(struct brw_context *brw) { - if (!brw->cs.prog_data) + if (!brw->cs.base.prog_data) return; uint32_t offset; uint32_t *desc = (uint32_t*) brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, 8 * 4, 64, &offset); struct brw_stage_state *stage_state = &brw->cs.base; - struct brw_cs_prog_data *cs_prog_data = brw->cs.prog_data; - struct brw_stage_prog_data *prog_data = &cs_prog_data->base; - const struct brw_device_info *devinfo = brw->intelScreen->devinfo; + struct brw_stage_prog_data *prog_data = stage_state->prog_data; + struct brw_cs_prog_data *cs_prog_data = brw_cs_prog_data(prog_data); + const struct gen_device_info *devinfo = &brw->screen->devinfo; if (INTEL_DEBUG & DEBUG_SHADER_TIME) { - brw->vtbl.emit_buffer_surface_state( + brw_emit_buffer_surface_state( brw, &stage_state->surf_offset[ prog_data->binding_table.shader_time_start], brw->shader_time.bo, 0, BRW_SURFACEFORMAT_RAW, @@ -66,7 +67,7 @@ if (prog_data->total_scratch) { if (brw->gen >= 8) { /* Broadwell's Per Thread Scratch Space is in the range [0, 11] - * where 0 = 1k, 1 = 4k, 2 = 8k, ..., 11 = 2M. + * where 0 = 1k, 1 = 2k, 2 = 4k, ..., 11 = 2M. */ OUT_RELOC64(stage_state->scratch_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, @@ -95,8 +96,8 @@ const uint32_t vfe_num_urb_entries = brw->gen >= 8 ? 2 : 0; const uint32_t vfe_gpgpu_mode = brw->gen == 7 ? SET_FIELD(1, GEN7_MEDIA_VFE_STATE_GPGPU_MODE) : 0; - const uint32_t subslices = MAX2(brw->intelScreen->subslice_total, 1); - OUT_BATCH(SET_FIELD(brw->max_cs_threads * subslices - 1, + const uint32_t subslices = MAX2(brw->screen->subslice_total, 1); + OUT_BATCH(SET_FIELD(devinfo->max_cs_threads * subslices - 1, MEDIA_VFE_STATE_MAX_THREADS) | SET_FIELD(vfe_num_urb_entries, MEDIA_VFE_STATE_URB_ENTRIES) | SET_FIELD(1, MEDIA_VFE_STATE_RESET_GTW_TIMER) | @@ -162,7 +163,7 @@ brw->gen >= 8 ? SET_FIELD(cs_prog_data->threads, GEN8_MEDIA_GPGPU_THREAD_COUNT) : SET_FIELD(cs_prog_data->threads, MEDIA_GPGPU_THREAD_COUNT); - assert(cs_prog_data->threads <= brw->max_cs_threads); + assert(cs_prog_data->threads <= devinfo->max_cs_threads); const uint32_t slm_size = encode_slm_size(devinfo->gen, prog_data->total_shared); @@ -279,14 +280,15 @@ struct brw_stage_state *stage_state = &brw->cs.base; /* BRW_NEW_COMPUTE_PROGRAM */ - const struct brw_compute_program *cp = - (struct brw_compute_program *) brw->compute_program; + const struct brw_program *cp = (struct brw_program *) brw->compute_program; if (cp) { /* BRW_NEW_CS_PROG_DATA */ - struct brw_cs_prog_data *cs_prog_data = brw->cs.prog_data; + struct brw_cs_prog_data *cs_prog_data = + brw_cs_prog_data(brw->cs.base.prog_data); - brw_upload_cs_push_constants(brw, &cp->program.Base, cs_prog_data, + _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_COMPUTE); + brw_upload_cs_push_constants(brw, &cp->program, cs_prog_data, stage_state, AUB_TRACE_WM_CONSTANTS); } } @@ -313,14 +315,14 @@ struct brw_stage_state *stage_state = &brw->cs.base; /* BRW_NEW_COMPUTE_PROGRAM */ - struct brw_compute_program *cp = - (struct brw_compute_program *) brw->compute_program; + struct brw_program *cp = (struct brw_program *) brw->compute_program; /* BRW_NEW_CS_PROG_DATA */ - const struct brw_stage_prog_data *prog_data = &brw->cs.prog_data->base; + const struct brw_stage_prog_data *prog_data = brw->cs.base.prog_data; + _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_COMPUTE); /* _NEW_PROGRAM_CONSTANTS */ - brw_upload_pull_constants(brw, BRW_NEW_SURFACES, &cp->program.Base, + brw_upload_pull_constants(brw, BRW_NEW_SURFACES, &cp->program, stage_state, prog_data); } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_ds_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_ds_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_ds_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_ds_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,20 +25,21 @@ #include "brw_state.h" #include "brw_defines.h" #include "intel_batchbuffer.h" +#include "main/shaderapi.h" static void gen7_upload_tes_push_constants(struct brw_context *brw) { struct brw_stage_state *stage_state = &brw->tes.base; /* BRW_NEW_TESS_PROGRAMS */ - const struct brw_tess_eval_program *tep = - (struct brw_tess_eval_program *) brw->tess_eval_program; + const struct brw_program *tep = brw_program_const(brw->tess_eval_program); if (tep) { /* BRW_NEW_TES_PROG_DATA */ - const struct brw_stage_prog_data *prog_data = &brw->tes.prog_data->base.base; - gen6_upload_push_constants(brw, &tep->program.Base, prog_data, - stage_state, AUB_TRACE_VS_CONSTANTS); + const struct brw_stage_prog_data *prog_data = brw->tes.base.prog_data; + _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_TESS_EVAL); + gen6_upload_push_constants(brw, &tep->program, prog_data, stage_state, + AUB_TRACE_VS_CONSTANTS); } gen7_upload_constant_state(brw, stage_state, tep, _3DSTATE_CONSTANT_DS); @@ -59,16 +60,19 @@ static void gen7_upload_ds_state(struct brw_context *brw) { + const struct gen_device_info *devinfo = &brw->screen->devinfo; const struct brw_stage_state *stage_state = &brw->tes.base; /* BRW_NEW_TESS_PROGRAMS */ bool active = brw->tess_eval_program; /* BRW_NEW_TES_PROG_DATA */ - const struct brw_tes_prog_data *tes_prog_data = brw->tes.prog_data; - const struct brw_vue_prog_data *vue_prog_data = &tes_prog_data->base; - const struct brw_stage_prog_data *prog_data = &vue_prog_data->base; + const struct brw_stage_prog_data *prog_data = stage_state->prog_data; + const struct brw_vue_prog_data *vue_prog_data = + brw_vue_prog_data(stage_state->prog_data); + const struct brw_tes_prog_data *tes_prog_data = + brw_tes_prog_data(stage_state->prog_data); - const unsigned thread_count = (brw->max_ds_threads - 1) << + const unsigned thread_count = (devinfo->max_tes_threads - 1) << (brw->is_haswell ? HSW_DS_MAX_THREADS_SHIFT : GEN7_DS_MAX_THREADS_SHIFT); if (active) { diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_gs_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_gs_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_gs_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_gs_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -29,13 +29,18 @@ static void upload_gs_state(struct brw_context *brw) { + const struct gen_device_info *devinfo = &brw->screen->devinfo; const struct brw_stage_state *stage_state = &brw->gs.base; const int max_threads_shift = brw->is_haswell ? HSW_GS_MAX_THREADS_SHIFT : GEN6_GS_MAX_THREADS_SHIFT; /* BRW_NEW_GEOMETRY_PROGRAM */ bool active = brw->geometry_program; /* BRW_NEW_GS_PROG_DATA */ - const struct brw_vue_prog_data *prog_data = &brw->gs.prog_data->base; + const struct brw_stage_prog_data *prog_data = stage_state->prog_data; + const struct brw_vue_prog_data *vue_prog_data = + brw_vue_prog_data(stage_state->prog_data); + const struct brw_gs_prog_data *gs_prog_data = + brw_gs_prog_data(stage_state->prog_data); /** * From Graphics BSpec: 3D-Media-GPGPU Engine > 3D Pipeline Stages > @@ -58,10 +63,10 @@ OUT_BATCH(stage_state->prog_offset); OUT_BATCH(((ALIGN(stage_state->sampler_count, 4)/4) << GEN6_GS_SAMPLER_COUNT_SHIFT) | - ((brw->gs.prog_data->base.base.binding_table.size_bytes / 4) << + ((prog_data->binding_table.size_bytes / 4) << GEN6_GS_BINDING_TABLE_ENTRY_COUNT_SHIFT)); - if (brw->gs.prog_data->base.base.total_scratch) { + if (prog_data->total_scratch) { OUT_RELOC(stage_state->scratch_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, ffs(stage_state->per_thread_scratch) - 11); @@ -70,14 +75,13 @@ } uint32_t dw4 = - ((brw->gs.prog_data->output_vertex_size_hwords * 2 - 1) << + ((gs_prog_data->output_vertex_size_hwords * 2 - 1) << GEN7_GS_OUTPUT_VERTEX_SIZE_SHIFT) | - (brw->gs.prog_data->output_topology << - GEN7_GS_OUTPUT_TOPOLOGY_SHIFT) | - (prog_data->urb_read_length << + (gs_prog_data->output_topology << GEN7_GS_OUTPUT_TOPOLOGY_SHIFT) | + (vue_prog_data->urb_read_length << GEN6_GS_URB_READ_LENGTH_SHIFT) | (0 << GEN6_GS_URB_ENTRY_READ_OFFSET_SHIFT) | - (prog_data->base.dispatch_grf_start_reg << + (prog_data->dispatch_grf_start_reg << GEN6_GS_DISPATCH_START_GRF_SHIFT); /* Note: the meaning of the GEN7_GS_REORDER_TRAILING bit changes between @@ -107,24 +111,24 @@ * Bridge this will get the order close to correct but not perfect. */ uint32_t dw5 = - ((brw->max_gs_threads - 1) << max_threads_shift) | - (brw->gs.prog_data->control_data_header_size_hwords << + ((devinfo->max_gs_threads - 1) << max_threads_shift) | + (gs_prog_data->control_data_header_size_hwords << GEN7_GS_CONTROL_DATA_HEADER_SIZE_SHIFT) | - ((brw->gs.prog_data->invocations - 1) << + ((gs_prog_data->invocations - 1) << GEN7_GS_INSTANCE_CONTROL_SHIFT) | - SET_FIELD(prog_data->dispatch_mode, GEN7_GS_DISPATCH_MODE) | + SET_FIELD(vue_prog_data->dispatch_mode, GEN7_GS_DISPATCH_MODE) | GEN6_GS_STATISTICS_ENABLE | - (brw->gs.prog_data->include_primitive_id ? + (gs_prog_data->include_primitive_id ? GEN7_GS_INCLUDE_PRIMITIVE_ID : 0) | GEN7_GS_REORDER_TRAILING | GEN7_GS_ENABLE; uint32_t dw6 = 0; if (brw->is_haswell) { - dw6 |= brw->gs.prog_data->control_data_format << + dw6 |= gs_prog_data->control_data_format << HSW_GS_CONTROL_DATA_FORMAT_SHIFT; } else { - dw5 |= brw->gs.prog_data->control_data_format << + dw5 |= gs_prog_data->control_data_format << IVB_GS_CONTROL_DATA_FORMAT_SHIFT; } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_hs_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_hs_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_hs_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_hs_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,21 +25,23 @@ #include "brw_state.h" #include "brw_defines.h" #include "intel_batchbuffer.h" +#include "main/shaderapi.h" static void gen7_upload_tcs_push_constants(struct brw_context *brw) { struct brw_stage_state *stage_state = &brw->tcs.base; /* BRW_NEW_TESS_PROGRAMS */ - const struct brw_tess_ctrl_program *tcp = - (struct brw_tess_ctrl_program *) brw->tess_ctrl_program; + const struct brw_program *tcp = brw_program_const(brw->tess_ctrl_program); bool active = brw->tess_eval_program; if (active) { /* BRW_NEW_TCS_PROG_DATA */ - const struct brw_stage_prog_data *prog_data = &brw->tcs.prog_data->base.base; - gen6_upload_push_constants(brw, &tcp->program.Base, prog_data, - stage_state, AUB_TRACE_VS_CONSTANTS); + const struct brw_stage_prog_data *prog_data = brw->tcs.base.prog_data; + + _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_TESS_CTRL); + gen6_upload_push_constants(brw, &tcp->program, prog_data, stage_state, + AUB_TRACE_VS_CONSTANTS); } gen7_upload_constant_state(brw, stage_state, active, _3DSTATE_CONSTANT_HS); @@ -61,26 +63,29 @@ static void gen7_upload_hs_state(struct brw_context *brw) { + const struct gen_device_info *devinfo = &brw->screen->devinfo; const struct brw_stage_state *stage_state = &brw->tcs.base; /* BRW_NEW_TESS_PROGRAMS */ bool active = brw->tess_eval_program; /* BRW_NEW_TCS_PROG_DATA */ - const struct brw_vue_prog_data *prog_data = &brw->tcs.prog_data->base; + const struct brw_stage_prog_data *prog_data = stage_state->prog_data; + const struct brw_tcs_prog_data *tcs_prog_data = + brw_tcs_prog_data(stage_state->prog_data); if (active) { BEGIN_BATCH(7); OUT_BATCH(_3DSTATE_HS << 16 | (7 - 2)); OUT_BATCH(SET_FIELD(DIV_ROUND_UP(stage_state->sampler_count, 4), GEN7_HS_SAMPLER_COUNT) | - SET_FIELD(prog_data->base.binding_table.size_bytes / 4, + SET_FIELD(prog_data->binding_table.size_bytes / 4, GEN7_HS_BINDING_TABLE_ENTRY_COUNT) | - (brw->max_hs_threads - 1)); + (devinfo->max_tcs_threads - 1)); OUT_BATCH(GEN7_HS_ENABLE | GEN7_HS_STATISTICS_ENABLE | - SET_FIELD(brw->tcs.prog_data->instances - 1, + SET_FIELD(tcs_prog_data->instances - 1, GEN7_HS_INSTANCE_COUNT)); OUT_BATCH(stage_state->prog_offset); - if (prog_data->base.total_scratch) { + if (prog_data->total_scratch) { OUT_RELOC(stage_state->scratch_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, ffs(stage_state->per_thread_scratch) - 11); @@ -88,7 +93,7 @@ OUT_BATCH(0); } OUT_BATCH(GEN7_HS_INCLUDE_VERTEX_HANDLES | - SET_FIELD(prog_data->base.dispatch_grf_start_reg, + SET_FIELD(prog_data->dispatch_grf_start_reg, GEN7_HS_DISPATCH_START_GRF)); /* Ignore URB semaphores */ OUT_BATCH(0); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_l3_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_l3_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_l3_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_l3_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -21,280 +21,21 @@ * IN THE SOFTWARE. */ +#include "common/gen_l3_config.h" + #include "brw_context.h" #include "brw_defines.h" #include "brw_state.h" #include "intel_batchbuffer.h" /** - * Chunk of L3 cache reserved for some specific purpose. - */ -enum brw_l3_partition { - /** Shared local memory. */ - L3P_SLM = 0, - /** Unified return buffer. */ - L3P_URB, - /** Union of DC and RO. */ - L3P_ALL, - /** Data cluster RW partition. */ - L3P_DC, - /** Union of IS, C and T. */ - L3P_RO, - /** Instruction and state cache. */ - L3P_IS, - /** Constant cache. */ - L3P_C, - /** Texture cache. */ - L3P_T, - /** Number of supported L3 partitions. */ - NUM_L3P -}; - -/** - * L3 configuration represented as the number of ways allocated for each - * partition. \sa get_l3_way_size(). - */ -struct brw_l3_config { - unsigned n[NUM_L3P]; -}; - -/** - * IVB/HSW validated L3 configurations. The first entry will be used as - * default by gen7_restore_default_l3_config(), otherwise the ordering is - * unimportant. - */ -static const struct brw_l3_config ivb_l3_configs[] = { - /* SLM URB ALL DC RO IS C T */ - {{ 0, 32, 0, 0, 32, 0, 0, 0 }}, - {{ 0, 32, 0, 16, 16, 0, 0, 0 }}, - {{ 0, 32, 0, 4, 0, 8, 4, 16 }}, - {{ 0, 28, 0, 8, 0, 8, 4, 16 }}, - {{ 0, 28, 0, 16, 0, 8, 4, 8 }}, - {{ 0, 28, 0, 8, 0, 16, 4, 8 }}, - {{ 0, 28, 0, 0, 0, 16, 4, 16 }}, - {{ 0, 32, 0, 0, 0, 16, 0, 16 }}, - {{ 0, 28, 0, 4, 32, 0, 0, 0 }}, - {{ 16, 16, 0, 16, 16, 0, 0, 0 }}, - {{ 16, 16, 0, 8, 0, 8, 8, 8 }}, - {{ 16, 16, 0, 4, 0, 8, 4, 16 }}, - {{ 16, 16, 0, 4, 0, 16, 4, 8 }}, - {{ 16, 16, 0, 0, 32, 0, 0, 0 }}, - {{ 0 }} -}; - -/** - * VLV validated L3 configurations. \sa ivb_l3_configs. - */ -static const struct brw_l3_config vlv_l3_configs[] = { - /* SLM URB ALL DC RO IS C T */ - {{ 0, 64, 0, 0, 32, 0, 0, 0 }}, - {{ 0, 80, 0, 0, 16, 0, 0, 0 }}, - {{ 0, 80, 0, 8, 8, 0, 0, 0 }}, - {{ 0, 64, 0, 16, 16, 0, 0, 0 }}, - {{ 0, 60, 0, 4, 32, 0, 0, 0 }}, - {{ 32, 32, 0, 16, 16, 0, 0, 0 }}, - {{ 32, 40, 0, 8, 16, 0, 0, 0 }}, - {{ 32, 40, 0, 16, 8, 0, 0, 0 }}, - {{ 0 }} -}; - -/** - * BDW validated L3 configurations. \sa ivb_l3_configs. - */ -static const struct brw_l3_config bdw_l3_configs[] = { - /* SLM URB ALL DC RO IS C T */ - {{ 0, 48, 48, 0, 0, 0, 0, 0 }}, - {{ 0, 48, 0, 16, 32, 0, 0, 0 }}, - {{ 0, 32, 0, 16, 48, 0, 0, 0 }}, - {{ 0, 32, 0, 0, 64, 0, 0, 0 }}, - {{ 0, 32, 64, 0, 0, 0, 0, 0 }}, - {{ 24, 16, 48, 0, 0, 0, 0, 0 }}, - {{ 24, 16, 0, 16, 32, 0, 0, 0 }}, - {{ 24, 16, 0, 32, 16, 0, 0, 0 }}, - {{ 0 }} -}; - -/** - * CHV/SKL validated L3 configurations. \sa ivb_l3_configs. - */ -static const struct brw_l3_config chv_l3_configs[] = { - /* SLM URB ALL DC RO IS C T */ - {{ 0, 48, 48, 0, 0, 0, 0, 0 }}, - {{ 0, 48, 0, 16, 32, 0, 0, 0 }}, - {{ 0, 32, 0, 16, 48, 0, 0, 0 }}, - {{ 0, 32, 0, 0, 64, 0, 0, 0 }}, - {{ 0, 32, 64, 0, 0, 0, 0, 0 }}, - {{ 32, 16, 48, 0, 0, 0, 0, 0 }}, - {{ 32, 16, 0, 16, 32, 0, 0, 0 }}, - {{ 32, 16, 0, 32, 16, 0, 0, 0 }}, - {{ 0 }} -}; - -/** - * Return a zero-terminated array of validated L3 configurations for the - * specified device. - */ -static const struct brw_l3_config * -get_l3_configs(const struct brw_device_info *devinfo) -{ - switch (devinfo->gen) { - case 7: - return (devinfo->is_baytrail ? vlv_l3_configs : ivb_l3_configs); - - case 8: - return (devinfo->is_cherryview ? chv_l3_configs : bdw_l3_configs); - - case 9: - return chv_l3_configs; - - default: - unreachable("Not implemented"); - } -} - -/** - * Return the size of an L3 way in KB. - */ -static unsigned -get_l3_way_size(const struct brw_device_info *devinfo) -{ - if (devinfo->is_baytrail) - return 2; - - else if (devinfo->is_cherryview || devinfo->gt == 1) - return 4; - - else - return 8 * devinfo->num_slices; -} - -/** - * L3 configuration represented as a vector of weights giving the desired - * relative size of each partition. The scale is arbitrary, only the ratios - * between weights will have an influence on the selection of the closest L3 - * configuration. - */ -struct brw_l3_weights { - float w[NUM_L3P]; -}; - -/** - * L1-normalize a vector of L3 partition weights. - */ -static struct brw_l3_weights -norm_l3_weights(struct brw_l3_weights w) -{ - float sz = 0; - - for (unsigned i = 0; i < NUM_L3P; i++) - sz += w.w[i]; - - for (unsigned i = 0; i < NUM_L3P; i++) - w.w[i] /= sz; - - return w; -} - -/** - * Get the relative partition weights of the specified L3 configuration. - */ -static struct brw_l3_weights -get_config_l3_weights(const struct brw_l3_config *cfg) -{ - if (cfg) { - struct brw_l3_weights w; - - for (unsigned i = 0; i < NUM_L3P; i++) - w.w[i] = cfg->n[i]; - - return norm_l3_weights(w); - } else { - const struct brw_l3_weights w = { { 0 } }; - return w; - } -} - -/** - * Distance between two L3 configurations represented as vectors of weights. - * Usually just the L1 metric except when the two configurations are - * considered incompatible in which case the distance will be infinite. Note - * that the compatibility condition is asymmetric -- They will be considered - * incompatible whenever the reference configuration \p w0 requires SLM, DC, - * or URB but \p w1 doesn't provide it. - */ -static float -diff_l3_weights(struct brw_l3_weights w0, struct brw_l3_weights w1) -{ - if ((w0.w[L3P_SLM] && !w1.w[L3P_SLM]) || - (w0.w[L3P_DC] && !w1.w[L3P_DC] && !w1.w[L3P_ALL]) || - (w0.w[L3P_URB] && !w1.w[L3P_URB])) { - return HUGE_VALF; - - } else { - float dw = 0; - - for (unsigned i = 0; i < NUM_L3P; i++) - dw += fabs(w0.w[i] - w1.w[i]); - - return dw; - } -} - -/** - * Return the closest validated L3 configuration for the specified device and - * weight vector. - */ -static const struct brw_l3_config * -get_l3_config(const struct brw_device_info *devinfo, struct brw_l3_weights w0) -{ - const struct brw_l3_config *const cfgs = get_l3_configs(devinfo); - const struct brw_l3_config *cfg_best = NULL; - float dw_best = HUGE_VALF; - - for (const struct brw_l3_config *cfg = cfgs; cfg->n[L3P_URB]; cfg++) { - const float dw = diff_l3_weights(w0, get_config_l3_weights(cfg)); - - if (dw < dw_best) { - cfg_best = cfg; - dw_best = dw; - } - } - - return cfg_best; -} - -/** - * Return a reasonable default L3 configuration for the specified device based - * on whether SLM and DC are required. In the non-SLM non-DC case the result - * is intended to approximately resemble the hardware defaults. - */ -static struct brw_l3_weights -get_default_l3_weights(const struct brw_device_info *devinfo, - bool needs_dc, bool needs_slm) -{ - struct brw_l3_weights w = {{ 0 }}; - - w.w[L3P_SLM] = needs_slm; - w.w[L3P_URB] = 1.0; - - if (devinfo->gen >= 8) { - w.w[L3P_ALL] = 1.0; - } else { - w.w[L3P_DC] = needs_dc ? 0.1 : 0; - w.w[L3P_RO] = devinfo->is_baytrail ? 0.5 : 1.0; - } - - return norm_l3_weights(w); -} - -/** * Calculate the desired L3 partitioning based on the current state of the * pipeline. For now this simply returns the conservative defaults calculated * by get_default_l3_weights(), but we could probably do better by gathering * more statistics from the pipeline state (e.g. guess of expected URB usage * and bound surfaces), or by using feed-back from performance counters. */ -static struct brw_l3_weights +static struct gen_l3_weights get_pipeline_state_l3_weights(const struct brw_context *brw) { const struct brw_stage_state *stage_states[] = { @@ -312,26 +53,30 @@ brw->ctx._Shader->CurrentProgram[stage_states[i]->stage]; const struct brw_stage_prog_data *prog_data = stage_states[i]->prog_data; - needs_dc |= (prog && prog->NumAtomicBuffers) || + needs_dc |= (prog && (prog->data->NumAtomicBuffers || + prog->data->NumShaderStorageBlocks)) || (prog_data && (prog_data->total_scratch || prog_data->nr_image_params)); needs_slm |= prog_data && prog_data->total_shared; } - return get_default_l3_weights(brw->intelScreen->devinfo, - needs_dc, needs_slm); + return gen_get_default_l3_weights(&brw->screen->devinfo, + needs_dc, needs_slm); } /** * Program the hardware to use the specified L3 configuration. */ static void -setup_l3_config(struct brw_context *brw, const struct brw_l3_config *cfg) +setup_l3_config(struct brw_context *brw, const struct gen_l3_config *cfg) { - const bool has_dc = cfg->n[L3P_DC] || cfg->n[L3P_ALL]; - const bool has_is = cfg->n[L3P_IS] || cfg->n[L3P_RO] || cfg->n[L3P_ALL]; - const bool has_c = cfg->n[L3P_C] || cfg->n[L3P_RO] || cfg->n[L3P_ALL]; - const bool has_t = cfg->n[L3P_T] || cfg->n[L3P_RO] || cfg->n[L3P_ALL]; - const bool has_slm = cfg->n[L3P_SLM]; + const bool has_dc = cfg->n[GEN_L3P_DC] || cfg->n[GEN_L3P_ALL]; + const bool has_is = cfg->n[GEN_L3P_IS] || cfg->n[GEN_L3P_RO] || + cfg->n[GEN_L3P_ALL]; + const bool has_c = cfg->n[GEN_L3P_C] || cfg->n[GEN_L3P_RO] || + cfg->n[GEN_L3P_ALL]; + const bool has_t = cfg->n[GEN_L3P_T] || cfg->n[GEN_L3P_RO] || + cfg->n[GEN_L3P_ALL]; + const bool has_slm = cfg->n[GEN_L3P_SLM]; /* According to the hardware docs, the L3 partitioning can only be changed * while the pipeline is completely drained and the caches are flushed, @@ -372,7 +117,7 @@ PIPE_CONTROL_CS_STALL); if (brw->gen >= 8) { - assert(!cfg->n[L3P_IS] && !cfg->n[L3P_C] && !cfg->n[L3P_T]); + assert(!cfg->n[GEN_L3P_IS] && !cfg->n[GEN_L3P_C] && !cfg->n[GEN_L3P_T]); BEGIN_BATCH(3); OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2)); @@ -380,15 +125,15 @@ /* Set up the L3 partitioning. */ OUT_BATCH(GEN8_L3CNTLREG); OUT_BATCH((has_slm ? GEN8_L3CNTLREG_SLM_ENABLE : 0) | - SET_FIELD(cfg->n[L3P_URB], GEN8_L3CNTLREG_URB_ALLOC) | - SET_FIELD(cfg->n[L3P_RO], GEN8_L3CNTLREG_RO_ALLOC) | - SET_FIELD(cfg->n[L3P_DC], GEN8_L3CNTLREG_DC_ALLOC) | - SET_FIELD(cfg->n[L3P_ALL], GEN8_L3CNTLREG_ALL_ALLOC)); + SET_FIELD(cfg->n[GEN_L3P_URB], GEN8_L3CNTLREG_URB_ALLOC) | + SET_FIELD(cfg->n[GEN_L3P_RO], GEN8_L3CNTLREG_RO_ALLOC) | + SET_FIELD(cfg->n[GEN_L3P_DC], GEN8_L3CNTLREG_DC_ALLOC) | + SET_FIELD(cfg->n[GEN_L3P_ALL], GEN8_L3CNTLREG_ALL_ALLOC)); ADVANCE_BATCH(); } else { - assert(!cfg->n[L3P_ALL]); + assert(!cfg->n[GEN_L3P_ALL]); /* When enabled SLM only uses a portion of the L3 on half of the banks, * the matching space on the remaining banks has to be allocated to a @@ -396,11 +141,11 @@ * lower-bandwidth 2-bank address hashing mode. */ const bool urb_low_bw = has_slm && !brw->is_baytrail; - assert(!urb_low_bw || cfg->n[L3P_URB] == cfg->n[L3P_SLM]); + assert(!urb_low_bw || cfg->n[GEN_L3P_URB] == cfg->n[GEN_L3P_SLM]); /* Minimum number of ways that can be allocated to the URB. */ const unsigned n0_urb = (brw->is_baytrail ? 32 : 0); - assert(cfg->n[L3P_URB] >= n0_urb); + assert(cfg->n[GEN_L3P_URB] >= n0_urb); BEGIN_BATCH(7); OUT_BATCH(MI_LOAD_REGISTER_IMM | (7 - 2)); @@ -418,19 +163,19 @@ /* Set up the L3 partitioning. */ OUT_BATCH(GEN7_L3CNTLREG2); OUT_BATCH((has_slm ? GEN7_L3CNTLREG2_SLM_ENABLE : 0) | - SET_FIELD(cfg->n[L3P_URB] - n0_urb, GEN7_L3CNTLREG2_URB_ALLOC) | + SET_FIELD(cfg->n[GEN_L3P_URB] - n0_urb, GEN7_L3CNTLREG2_URB_ALLOC) | (urb_low_bw ? GEN7_L3CNTLREG2_URB_LOW_BW : 0) | - SET_FIELD(cfg->n[L3P_ALL], GEN7_L3CNTLREG2_ALL_ALLOC) | - SET_FIELD(cfg->n[L3P_RO], GEN7_L3CNTLREG2_RO_ALLOC) | - SET_FIELD(cfg->n[L3P_DC], GEN7_L3CNTLREG2_DC_ALLOC)); + SET_FIELD(cfg->n[GEN_L3P_ALL], GEN7_L3CNTLREG2_ALL_ALLOC) | + SET_FIELD(cfg->n[GEN_L3P_RO], GEN7_L3CNTLREG2_RO_ALLOC) | + SET_FIELD(cfg->n[GEN_L3P_DC], GEN7_L3CNTLREG2_DC_ALLOC)); OUT_BATCH(GEN7_L3CNTLREG3); - OUT_BATCH(SET_FIELD(cfg->n[L3P_IS], GEN7_L3CNTLREG3_IS_ALLOC) | - SET_FIELD(cfg->n[L3P_C], GEN7_L3CNTLREG3_C_ALLOC) | - SET_FIELD(cfg->n[L3P_T], GEN7_L3CNTLREG3_T_ALLOC)); + OUT_BATCH(SET_FIELD(cfg->n[GEN_L3P_IS], GEN7_L3CNTLREG3_IS_ALLOC) | + SET_FIELD(cfg->n[GEN_L3P_C], GEN7_L3CNTLREG3_C_ALLOC) | + SET_FIELD(cfg->n[GEN_L3P_T], GEN7_L3CNTLREG3_T_ALLOC)); ADVANCE_BATCH(); - if (brw->is_haswell && brw->intelScreen->cmd_parser_version >= 4) { + if (can_do_hsw_l3_atomics(brw->screen)) { /* Enable L3 atomics on HSW if we have a DC partition, otherwise keep * them disabled to avoid crashing the system hard. */ @@ -447,35 +192,14 @@ } /** - * Return the unit brw_context::urb::size is expressed in, in KB. \sa - * brw_device_info::urb::size. - */ -static unsigned -get_urb_size_scale(const struct brw_device_info *devinfo) -{ - return (devinfo->gen >= 8 ? devinfo->num_slices : 1); -} - -/** * Update the URB size in the context state for the specified L3 * configuration. */ static void -update_urb_size(struct brw_context *brw, const struct brw_l3_config *cfg) +update_urb_size(struct brw_context *brw, const struct gen_l3_config *cfg) { - const struct brw_device_info *devinfo = brw->intelScreen->devinfo; - /* From the SKL "L3 Allocation and Programming" documentation: - * - * "URB is limited to 1008KB due to programming restrictions. This is not - * a restriction of the L3 implementation, but of the FF and other clients. - * Therefore, in a GT4 implementation it is possible for the programmed - * allocation of the L3 data array to provide 3*384KB=1152KB for URB, but - * only 1008KB of this will be used." - */ - const unsigned max = (devinfo->gen == 9 ? 1008 : ~0); - const unsigned sz = - MIN2(max, cfg->n[L3P_URB] * get_l3_way_size(devinfo)) / - get_urb_size_scale(devinfo); + const struct gen_device_info *devinfo = &brw->screen->devinfo; + const unsigned sz = gen_get_l3_config_urb_size(devinfo, cfg); if (brw->urb.size != sz) { brw->urb.size = sz; @@ -483,23 +207,11 @@ } } -/** - * Print out the specified L3 configuration. - */ -static void -dump_l3_config(const struct brw_l3_config *cfg) -{ - fprintf(stderr, "SLM=%d URB=%d ALL=%d DC=%d RO=%d IS=%d C=%d T=%d\n", - cfg->n[L3P_SLM], cfg->n[L3P_URB], cfg->n[L3P_ALL], - cfg->n[L3P_DC], cfg->n[L3P_RO], - cfg->n[L3P_IS], cfg->n[L3P_C], cfg->n[L3P_T]); -} - static void emit_l3_state(struct brw_context *brw) { - const struct brw_l3_weights w = get_pipeline_state_l3_weights(brw); - const float dw = diff_l3_weights(w, get_config_l3_weights(brw->l3.config)); + const struct gen_l3_weights w = get_pipeline_state_l3_weights(brw); + const float dw = gen_diff_l3_weights(w, gen_get_l3_config_weights(brw->l3.config)); /* The distance between any two compatible weight vectors cannot exceed two * due to the triangle inequality. */ @@ -517,9 +229,9 @@ const float dw_threshold = (brw->ctx.NewDriverState & BRW_NEW_BATCH ? small_dw_threshold : large_dw_threshold); - if (dw > dw_threshold && brw->can_do_pipelined_register_writes) { - const struct brw_l3_config *const cfg = - get_l3_config(brw->intelScreen->devinfo, w); + if (dw > dw_threshold && can_do_pipelined_register_writes(brw->screen)) { + const struct gen_l3_config *const cfg = + gen_get_l3_config(&brw->screen->devinfo, w); setup_l3_config(brw, cfg); update_urb_size(brw, cfg); @@ -527,7 +239,7 @@ if (unlikely(INTEL_DEBUG & DEBUG_L3)) { fprintf(stderr, "L3 config transition (%f > %f): ", dw, dw_threshold); - dump_l3_config(cfg); + gen_dump_l3_config(cfg, stderr); } } } @@ -581,15 +293,11 @@ void gen7_restore_default_l3_config(struct brw_context *brw) { - const struct brw_device_info *devinfo = brw->intelScreen->devinfo; - /* For efficiency assume that the first entry of the array matches the - * default configuration. - */ - const struct brw_l3_config *const cfg = get_l3_configs(devinfo); - assert(cfg == get_l3_config(devinfo, - get_default_l3_weights(devinfo, false, false))); + const struct gen_device_info *devinfo = &brw->screen->devinfo; + const struct gen_l3_config *const cfg = gen_get_default_l3_config(devinfo); - if (cfg != brw->l3.config && brw->can_do_pipelined_register_writes) { + if (cfg != brw->l3.config && + can_do_pipelined_register_writes(brw->screen)) { setup_l3_config(brw, cfg); update_urb_size(brw, cfg); brw->l3.config = cfg; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_misc_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_misc_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_misc_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_misc_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -109,7 +109,7 @@ (depthbuffer_format << 18) | ((hiz ? 1 : 0) << 22) | ((stencil_mt != NULL && ctx->Stencil._WriteEnabled) << 27) | - ((ctx->Depth.Mask != 0) << 28) | + (brw_depth_writes_enabled(brw) << 28) | (surftype << 29)); /* 3DSTATE_DEPTH_BUFFER dw2 */ @@ -146,13 +146,13 @@ ADVANCE_BATCH(); } else { assert(depth_mt); - struct intel_miptree_aux_buffer *hiz_buf = depth_mt->hiz_buf; + struct intel_miptree_hiz_buffer *hiz_buf = depth_mt->hiz_buf; BEGIN_BATCH(3); OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER << 16 | (3 - 2)); OUT_BATCH((mocs << 25) | - (hiz_buf->pitch - 1)); - OUT_RELOC(hiz_buf->bo, + (hiz_buf->aux_base.pitch - 1)); + OUT_RELOC(hiz_buf->aux_base.bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); @@ -166,6 +166,7 @@ OUT_BATCH(0); ADVANCE_BATCH(); } else { + stencil_mt->r8stencil_needs_update = true; const int enabled = brw->is_haswell ? HSW_STENCIL_ENABLED : 0; BEGIN_BATCH(3); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_sf_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_sf_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_sf_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_sf_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -35,7 +35,9 @@ { struct gl_context *ctx = &brw->ctx; /* BRW_NEW_FS_PROG_DATA */ - uint32_t num_outputs = brw->wm.prog_data->num_varying_inputs; + const struct brw_wm_prog_data *wm_prog_data = + brw_wm_prog_data(brw->wm.base.prog_data); + uint32_t num_outputs = wm_prog_data->num_varying_inputs; uint32_t dw1; uint32_t point_sprite_enables; int i; @@ -59,8 +61,10 @@ } dw1 |= point_sprite_origin; - /* BRW_NEW_VUE_MAP_GEOM_OUT | BRW_NEW_FRAGMENT_PROGRAM - * _NEW_POINT | _NEW_LIGHT | _NEW_PROGRAM | BRW_NEW_FS_PROG_DATA + /* _NEW_POINT | _NEW_LIGHT | _NEW_PROGRAM, + * BRW_NEW_FS_PROG_DATA | BRW_NEW_FRAGMENT_PROGRAM | + * BRW_NEW_GS_PROG_DATA | BRW_NEW_PRIMITIVE | BRW_NEW_TES_PROG_DATA | + * BRW_NEW_VUE_MAP_GEOM_OUT */ uint32_t urb_entry_read_length; uint32_t urb_entry_read_offset; @@ -79,7 +83,7 @@ } OUT_BATCH(point_sprite_enables); /* dw10 */ - OUT_BATCH(brw->wm.prog_data->flat_inputs); + OUT_BATCH(wm_prog_data->flat_inputs); OUT_BATCH(0); /* wrapshortest enables 0-7 */ OUT_BATCH(0); /* wrapshortest enables 8-15 */ ADVANCE_BATCH(); @@ -90,12 +94,14 @@ .mesa = _NEW_BUFFERS | _NEW_LIGHT | _NEW_POINT | + _NEW_POLYGON | _NEW_PROGRAM, .brw = BRW_NEW_BLORP | BRW_NEW_CONTEXT | BRW_NEW_FRAGMENT_PROGRAM | BRW_NEW_FS_PROG_DATA | - BRW_NEW_GEOMETRY_PROGRAM | + BRW_NEW_GS_PROG_DATA | + BRW_NEW_TES_PROG_DATA | BRW_NEW_PRIMITIVE | BRW_NEW_VUE_MAP_GEOM_OUT, }, @@ -167,7 +173,7 @@ unreachable("not reached"); } - dw2 = 0; + dw2 = GEN6_SF_SCISSOR_ENABLE; if (ctx->Polygon.CullFlag) { switch (ctx->Polygon.CullFaceMode) { @@ -187,11 +193,6 @@ dw2 |= GEN6_SF_CULL_NONE; } - /* _NEW_SCISSOR _NEW_POLYGON BRW_NEW_GEOMETRY_PROGRAM BRW_NEW_PRIMITIVE */ - if (ctx->Scissor.EnableFlags || - is_drawing_points(brw) || is_drawing_lines(brw)) - dw2 |= GEN6_SF_SCISSOR_ENABLE; - /* _NEW_LINE */ { uint32_t line_width_u3_7 = brw_get_line_width(brw); @@ -213,11 +214,11 @@ dw3 = GEN6_SF_LINE_AA_MODE_TRUE; - /* _NEW_PROGRAM | _NEW_POINT */ - if (!(ctx->VertexProgram.PointSizeEnabled || ctx->Point._Attenuated)) + /* _NEW_PROGRAM | _NEW_POINT, BRW_NEW_VUE_MAP_GEOM_OUT */ + if (use_state_point_size(brw)) dw3 |= GEN6_SF_USE_STATE_POINT_WIDTH; - /* Clamp to ARB_point_parameters user limits */ + /* _NEW_POINT - Clamp to ARB_point_parameters user limits */ point_size = CLAMP(ctx->Point.Size, ctx->Point.MinSize, ctx->Point.MaxSize); /* Clamp to the hardware limits and convert to fixed point */ @@ -252,11 +253,13 @@ _NEW_MULTISAMPLE | _NEW_POINT | _NEW_POLYGON | - _NEW_PROGRAM | - _NEW_SCISSOR, + _NEW_PROGRAM, .brw = BRW_NEW_BLORP | BRW_NEW_CONTEXT | - BRW_NEW_PRIMITIVE, + BRW_NEW_GS_PROG_DATA | + BRW_NEW_PRIMITIVE | + BRW_NEW_TES_PROG_DATA | + BRW_NEW_VUE_MAP_GEOM_OUT, }, .emit = upload_sf_state, }; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_sol_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_sol_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_sol_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_sol_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -43,7 +43,7 @@ struct gl_transform_feedback_object *xfb_obj = ctx->TransformFeedback.CurrentObject; const struct gl_transform_feedback_info *linked_xfb_info = - &xfb_obj->shader_program->LinkedTransformFeedback; + xfb_obj->program->sh.LinkedTransformFeedback; int i; /* Set up the up to 4 output buffers. These are the ranges defined in the @@ -103,7 +103,7 @@ struct gl_transform_feedback_object *xfb_obj = ctx->TransformFeedback.CurrentObject; const struct gl_transform_feedback_info *linked_xfb_info = - &xfb_obj->shader_program->LinkedTransformFeedback; + xfb_obj->program->sh.LinkedTransformFeedback; uint16_t so_decl[MAX_VERTEX_STREAMS][128]; int buffer_mask[MAX_VERTEX_STREAMS] = {0, 0, 0, 0}; int next_offset[MAX_VERTEX_STREAMS] = {0, 0, 0, 0}; @@ -228,12 +228,12 @@ /* BRW_NEW_TRANSFORM_FEEDBACK */ struct gl_transform_feedback_object *xfb_obj = ctx->TransformFeedback.CurrentObject; - const struct gl_transform_feedback_info *linked_xfb_info = - &xfb_obj->shader_program->LinkedTransformFeedback; uint32_t dw1 = 0, dw2 = 0, dw3 = 0, dw4 = 0; int i; if (active) { + const struct gl_transform_feedback_info *linked_xfb_info = + xfb_obj->program->sh.LinkedTransformFeedback; int urb_entry_read_offset = 0; int urb_entry_read_length = (vue_map->num_slots + 1) / 2 - urb_entry_read_offset; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_te_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_te_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_te_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_te_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -32,7 +32,8 @@ /* BRW_NEW_TESS_PROGRAMS */ bool active = brw->tess_eval_program; - const struct brw_tes_prog_data *tes_prog_data = brw->tes.prog_data; + const struct brw_tes_prog_data *tes_prog_data = + brw_tes_prog_data(brw->tes.base.prog_data); if (active) { BEGIN_BATCH(4); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_urb.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_urb.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_urb.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_urb.c 2017-06-01 10:37:10.000000000 +0000 @@ -27,6 +27,8 @@ #include "brw_state.h" #include "brw_defines.h" +#include "common/gen_l3_config.h" + /** * The following diagram shows how we partition the URB: * @@ -144,8 +146,7 @@ const struct brw_tracked_state gen7_push_constant_space = { .dirty = { .mesa = 0, - .brw = BRW_NEW_BLORP | - BRW_NEW_CONTEXT | + .brw = BRW_NEW_CONTEXT | BRW_NEW_GEOMETRY_PROGRAM | BRW_NEW_TESS_PROGRAMS, }, @@ -153,271 +154,81 @@ }; static void -gen7_upload_urb(struct brw_context *brw) +upload_urb(struct brw_context *brw) { - const struct brw_device_info *devinfo = brw->intelScreen->devinfo; + /* BRW_NEW_VS_PROG_DATA */ + const struct brw_vue_prog_data *vs_vue_prog_data = + brw_vue_prog_data(brw->vs.base.prog_data); + const unsigned vs_size = MAX2(vs_vue_prog_data->urb_entry_size, 1); + /* BRW_NEW_GS_PROG_DATA */ + const bool gs_present = brw->gs.base.prog_data; + /* BRW_NEW_TES_PROG_DATA */ + const bool tess_present = brw->tes.base.prog_data; + + gen7_upload_urb(brw, vs_size, gs_present, tess_present); +} + +void +gen7_upload_urb(struct brw_context *brw, unsigned vs_size, + bool gs_present, bool tess_present) +{ + const struct gen_device_info *devinfo = &brw->screen->devinfo; const int push_size_kB = (brw->gen >= 8 || (brw->is_haswell && brw->gt == 3)) ? 32 : 16; - /* BRW_NEW_VS_PROG_DATA */ - unsigned vs_size = MAX2(brw->vs.prog_data->base.urb_entry_size, 1); - unsigned vs_entry_size_bytes = vs_size * 64; - /* BRW_NEW_GEOMETRY_PROGRAM, BRW_NEW_GS_PROG_DATA */ - bool gs_present = brw->geometry_program; - unsigned gs_size = gs_present ? brw->gs.prog_data->base.urb_entry_size : 1; - unsigned gs_entry_size_bytes = gs_size * 64; - - /* BRW_NEW_TESS_PROGRAMS */ - const bool tess_present = brw->tess_eval_program; - /* BRW_NEW_TCS_PROG_DATA */ - unsigned hs_size = tess_present ? brw->tcs.prog_data->base.urb_entry_size : 1; - unsigned hs_entry_size_bytes = hs_size * 64; - /* BRW_NEW_TES_PROG_DATA */ - unsigned ds_size = tess_present ? brw->tes.prog_data->base.urb_entry_size : 1; - unsigned ds_entry_size_bytes = ds_size * 64; + /* BRW_NEW_{VS,TCS,TES,GS}_PROG_DATA */ + struct brw_vue_prog_data *prog_data[4] = { + [MESA_SHADER_VERTEX] = + brw_vue_prog_data(brw->vs.base.prog_data), + [MESA_SHADER_TESS_CTRL] = + tess_present ? brw_vue_prog_data(brw->tcs.base.prog_data) : NULL, + [MESA_SHADER_TESS_EVAL] = + tess_present ? brw_vue_prog_data(brw->tes.base.prog_data) : NULL, + [MESA_SHADER_GEOMETRY] = + gs_present ? brw_vue_prog_data(brw->gs.base.prog_data) : NULL, + }; + + unsigned entry_size[4]; + entry_size[MESA_SHADER_VERTEX] = vs_size; + for (int i = MESA_SHADER_TESS_CTRL; i <= MESA_SHADER_GEOMETRY; i++) { + entry_size[i] = prog_data[i] ? prog_data[i]->urb_entry_size : 1; + } /* If we're just switching between programs with the same URB requirements, * skip the rest of the logic. */ if (!(brw->ctx.NewDriverState & BRW_NEW_CONTEXT) && !(brw->ctx.NewDriverState & BRW_NEW_URB_SIZE) && - brw->urb.vsize == vs_size && + brw->urb.vsize == entry_size[MESA_SHADER_VERTEX] && brw->urb.gs_present == gs_present && - brw->urb.gsize == gs_size && + brw->urb.gsize == entry_size[MESA_SHADER_GEOMETRY] && brw->urb.tess_present == tess_present && - brw->urb.hsize == hs_size && - brw->urb.dsize == ds_size) { + brw->urb.hsize == entry_size[MESA_SHADER_TESS_CTRL] && + brw->urb.dsize == entry_size[MESA_SHADER_TESS_EVAL]) { return; } - brw->urb.vsize = vs_size; + brw->urb.vsize = entry_size[MESA_SHADER_VERTEX]; brw->urb.gs_present = gs_present; - brw->urb.gsize = gs_size; + brw->urb.gsize = entry_size[MESA_SHADER_GEOMETRY]; brw->urb.tess_present = tess_present; - brw->urb.hsize = hs_size; - brw->urb.dsize = ds_size; - - /* From p35 of the Ivy Bridge PRM (section 1.7.1: 3DSTATE_URB_GS): - * - * VS Number of URB Entries must be divisible by 8 if the VS URB Entry - * Allocation Size is less than 9 512-bit URB entries. - * - * Similar text exists for HS, DS and GS. - */ - unsigned vs_granularity = (vs_size < 9) ? 8 : 1; - unsigned hs_granularity = (hs_size < 9) ? 8 : 1; - unsigned ds_granularity = (ds_size < 9) ? 8 : 1; - unsigned gs_granularity = (gs_size < 9) ? 8 : 1; + brw->urb.hsize = entry_size[MESA_SHADER_TESS_CTRL]; + brw->urb.dsize = entry_size[MESA_SHADER_TESS_EVAL]; - /* URB allocations must be done in 8k chunks. */ - unsigned chunk_size_bytes = 8192; - - /* Determine the size of the URB in chunks. - * BRW_NEW_URB_SIZE - */ - unsigned urb_chunks = brw->urb.size * 1024 / chunk_size_bytes; - - /* Reserve space for push constants */ - unsigned push_constant_bytes = 1024 * push_size_kB; - unsigned push_constant_chunks = - push_constant_bytes / chunk_size_bytes; - - /* Initially, assign each stage the minimum amount of URB space it needs, - * and make a note of how much additional space it "wants" (the amount of - * additional space it could actually make use of). - */ - - /* VS has a lower limit on the number of URB entries. - * - * From the Broadwell PRM, 3DSTATE_URB_VS instruction: - * "When tessellation is enabled, the VS Number of URB Entries must be - * greater than or equal to 192." - */ - unsigned vs_min_entries = - tess_present && brw->gen == 8 ? 192 : brw->urb.min_vs_entries; - /* Min VS Entries isn't a multiple of 8 on Cherryview/Broxton; round up */ - vs_min_entries = ALIGN(vs_min_entries, vs_granularity); - - unsigned vs_chunks = - DIV_ROUND_UP(vs_min_entries * vs_entry_size_bytes, chunk_size_bytes); - unsigned vs_wants = - DIV_ROUND_UP(brw->urb.max_vs_entries * vs_entry_size_bytes, - chunk_size_bytes) - vs_chunks; - - unsigned gs_chunks = 0; - unsigned gs_wants = 0; - if (gs_present) { - /* There are two constraints on the minimum amount of URB space we can - * allocate: - * - * (1) We need room for at least 2 URB entries, since we always operate - * the GS in DUAL_OBJECT mode. - * - * (2) We can't allocate less than nr_gs_entries_granularity. - */ - gs_chunks = DIV_ROUND_UP(MAX2(gs_granularity, 2) * gs_entry_size_bytes, - chunk_size_bytes); - gs_wants = DIV_ROUND_UP(brw->urb.max_gs_entries * gs_entry_size_bytes, - chunk_size_bytes) - gs_chunks; - } - - unsigned hs_chunks = 0; - unsigned hs_wants = 0; - unsigned ds_chunks = 0; - unsigned ds_wants = 0; - - if (tess_present) { - hs_chunks = - DIV_ROUND_UP(hs_granularity * hs_entry_size_bytes, - chunk_size_bytes); - hs_wants = - DIV_ROUND_UP(devinfo->urb.max_hs_entries * hs_entry_size_bytes, - chunk_size_bytes) - hs_chunks; - - ds_chunks = - DIV_ROUND_UP(devinfo->urb.min_ds_entries * ds_entry_size_bytes, - chunk_size_bytes); - ds_wants = - DIV_ROUND_UP(brw->urb.max_ds_entries * ds_entry_size_bytes, - chunk_size_bytes) - ds_chunks; - } - - /* There should always be enough URB space to satisfy the minimum - * requirements of each stage. - */ - unsigned total_needs = push_constant_chunks + - vs_chunks + hs_chunks + ds_chunks + gs_chunks; - assert(total_needs <= urb_chunks); - - /* Mete out remaining space (if any) in proportion to "wants". */ - unsigned total_wants = vs_wants + hs_wants + ds_wants + gs_wants; - unsigned remaining_space = urb_chunks - total_needs; - if (remaining_space > total_wants) - remaining_space = total_wants; - if (remaining_space > 0) { - unsigned vs_additional = (unsigned) - roundf(vs_wants * (((float) remaining_space) / total_wants)); - vs_chunks += vs_additional; - remaining_space -= vs_additional; - total_wants -= vs_wants; - - if (total_wants > 0) { - unsigned hs_additional = (unsigned) - round(hs_wants * (((double) remaining_space) / total_wants)); - hs_chunks += hs_additional; - remaining_space -= hs_additional; - total_wants -= hs_wants; - } - - if (total_wants > 0) { - unsigned ds_additional = (unsigned) - round(ds_wants * (((double) remaining_space) / total_wants)); - ds_chunks += ds_additional; - remaining_space -= ds_additional; - total_wants -= ds_wants; - } - - gs_chunks += remaining_space; - } - - /* Sanity check that we haven't over-allocated. */ - assert(push_constant_chunks + - vs_chunks + hs_chunks + ds_chunks + gs_chunks <= urb_chunks); - - /* Finally, compute the number of entries that can fit in the space - * allocated to each stage. - */ - unsigned nr_vs_entries = vs_chunks * chunk_size_bytes / vs_entry_size_bytes; - unsigned nr_hs_entries = hs_chunks * chunk_size_bytes / hs_entry_size_bytes; - unsigned nr_ds_entries = ds_chunks * chunk_size_bytes / ds_entry_size_bytes; - unsigned nr_gs_entries = gs_chunks * chunk_size_bytes / gs_entry_size_bytes; - - /* Since we rounded up when computing *_wants, this may be slightly more - * than the maximum allowed amount, so correct for that. - */ - nr_vs_entries = MIN2(nr_vs_entries, brw->urb.max_vs_entries); - nr_hs_entries = MIN2(nr_hs_entries, brw->urb.max_hs_entries); - nr_ds_entries = MIN2(nr_ds_entries, brw->urb.max_ds_entries); - nr_gs_entries = MIN2(nr_gs_entries, brw->urb.max_gs_entries); - - /* Ensure that we program a multiple of the granularity. */ - nr_vs_entries = ROUND_DOWN_TO(nr_vs_entries, vs_granularity); - nr_hs_entries = ROUND_DOWN_TO(nr_hs_entries, hs_granularity); - nr_ds_entries = ROUND_DOWN_TO(nr_ds_entries, ds_granularity); - nr_gs_entries = ROUND_DOWN_TO(nr_gs_entries, gs_granularity); - - /* Finally, sanity check to make sure we have at least the minimum number - * of entries needed for each stage. - */ - assert(nr_vs_entries >= vs_min_entries); - if (gs_present) - assert(nr_gs_entries >= 2); - if (tess_present) { - assert(nr_hs_entries >= 1); - assert(nr_ds_entries >= devinfo->urb.min_ds_entries); - } - - /* Gen7 doesn't actually use brw->urb.nr_{vs,gs}_entries, but it seems - * better to put reasonable data in there rather than leave them - * uninitialized. - */ - brw->urb.nr_vs_entries = nr_vs_entries; - brw->urb.nr_hs_entries = nr_hs_entries; - brw->urb.nr_ds_entries = nr_ds_entries; - brw->urb.nr_gs_entries = nr_gs_entries; - - /* Lay out the URB in the following order: - * - push constants - * - VS - * - HS - * - DS - * - GS - */ - brw->urb.vs_start = push_constant_chunks; - brw->urb.hs_start = push_constant_chunks + vs_chunks; - brw->urb.ds_start = push_constant_chunks + vs_chunks + hs_chunks; - brw->urb.gs_start = push_constant_chunks + vs_chunks + hs_chunks + - ds_chunks; + unsigned entries[4]; + unsigned start[4]; + gen_get_urb_config(devinfo, 1024 * push_size_kB, 1024 * brw->urb.size, + tess_present, gs_present, entry_size, entries, start); if (brw->gen == 7 && !brw->is_haswell && !brw->is_baytrail) gen7_emit_vs_workaround_flush(brw); - gen7_emit_urb_state(brw, - brw->urb.nr_vs_entries, vs_size, brw->urb.vs_start, - brw->urb.nr_hs_entries, hs_size, brw->urb.hs_start, - brw->urb.nr_ds_entries, ds_size, brw->urb.ds_start, - brw->urb.nr_gs_entries, gs_size, brw->urb.gs_start); -} -void -gen7_emit_urb_state(struct brw_context *brw, - unsigned nr_vs_entries, - unsigned vs_size, unsigned vs_start, - unsigned nr_hs_entries, - unsigned hs_size, unsigned hs_start, - unsigned nr_ds_entries, - unsigned ds_size, unsigned ds_start, - unsigned nr_gs_entries, - unsigned gs_size, unsigned gs_start) -{ BEGIN_BATCH(8); - OUT_BATCH(_3DSTATE_URB_VS << 16 | (2 - 2)); - OUT_BATCH(nr_vs_entries | - ((vs_size - 1) << GEN7_URB_ENTRY_SIZE_SHIFT) | - (vs_start << GEN7_URB_STARTING_ADDRESS_SHIFT)); - - OUT_BATCH(_3DSTATE_URB_GS << 16 | (2 - 2)); - OUT_BATCH(nr_gs_entries | - ((gs_size - 1) << GEN7_URB_ENTRY_SIZE_SHIFT) | - (gs_start << GEN7_URB_STARTING_ADDRESS_SHIFT)); - - OUT_BATCH(_3DSTATE_URB_HS << 16 | (2 - 2)); - OUT_BATCH(nr_hs_entries | - ((hs_size - 1) << GEN7_URB_ENTRY_SIZE_SHIFT) | - (hs_start << GEN7_URB_STARTING_ADDRESS_SHIFT)); - - OUT_BATCH(_3DSTATE_URB_DS << 16 | (2 - 2)); - OUT_BATCH(nr_ds_entries | - ((ds_size - 1) << GEN7_URB_ENTRY_SIZE_SHIFT) | - (ds_start << GEN7_URB_STARTING_ADDRESS_SHIFT)); + for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) { + OUT_BATCH((_3DSTATE_URB_VS + i) << 16 | (2 - 2)); + OUT_BATCH(entries[i] | + ((entry_size[i] - 1) << GEN7_URB_ENTRY_SIZE_SHIFT) | + (start[i] << GEN7_URB_STARTING_ADDRESS_SHIFT)); + } ADVANCE_BATCH(); } @@ -426,12 +237,10 @@ .mesa = 0, .brw = BRW_NEW_CONTEXT | BRW_NEW_URB_SIZE | - BRW_NEW_GEOMETRY_PROGRAM | - BRW_NEW_TESS_PROGRAMS | BRW_NEW_GS_PROG_DATA | BRW_NEW_TCS_PROG_DATA | BRW_NEW_TES_PROG_DATA | BRW_NEW_VS_PROG_DATA, }, - .emit = gen7_upload_urb, + .emit = upload_urb, }; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_viewport_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_viewport_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_viewport_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_viewport_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -33,12 +33,21 @@ gen7_upload_sf_clip_viewport(struct brw_context *brw) { struct gl_context *ctx = &brw->ctx; + const struct gen_device_info *devinfo = &brw->screen->devinfo; GLfloat y_scale, y_bias; - const bool render_to_fbo = _mesa_is_user_fbo(ctx->DrawBuffer); struct gen7_sf_clip_viewport *vp; + /* BRW_NEW_VIEWPORT_COUNT */ + const unsigned viewport_count = brw->clip.viewport_count; + + /* _NEW_BUFFERS */ + struct gl_framebuffer *fb = ctx->DrawBuffer; + const bool render_to_fbo = _mesa_is_user_fbo(fb); + const uint32_t fb_width = _mesa_geometric_width(ctx->DrawBuffer); + const uint32_t fb_height = _mesa_geometric_height(ctx->DrawBuffer); + vp = brw_state_batch(brw, AUB_TRACE_SF_VP_STATE, - sizeof(*vp) * ctx->Const.MaxViewports, 64, + sizeof(*vp) * viewport_count, 64, &brw->sf.vp_offset); /* Also assign to clip.vp_offset in case something uses it. */ brw->clip.vp_offset = brw->sf.vp_offset; @@ -49,34 +58,13 @@ y_bias = 0.0; } else { y_scale = -1.0; - y_bias = (float)_mesa_geometric_height(ctx->DrawBuffer); + y_bias = (float)fb_height; } - for (unsigned i = 0; i < ctx->Const.MaxViewports; i++) { + for (unsigned i = 0; i < viewport_count; i++) { float scale[3], translate[3]; _mesa_get_viewport_xform(ctx, i, scale, translate); - /* According to the "Vertex X,Y Clamping and Quantization" section of - * the Strips and Fans documentation, objects must not have a - * screen-space extents of over 8192 pixels, or they may be - * mis-rasterized. The maximum screen space coordinates of a small - * object may larger, but we have no way to enforce the object size - * other than through clipping. - * - * If you're surprised that we set clip to -gbx to +gbx and it seems - * like we'll end up with 16384 wide, note that for a 8192-wide render - * target, we'll end up with a normal (-1, 1) clip volume that just - * covers the drawable. - */ - const float maximum_guardband_extent = 8192; - const float gbx = maximum_guardband_extent / ctx->ViewportArray[i].Width; - const float gby = maximum_guardband_extent / ctx->ViewportArray[i].Height; - - vp[i].guardband.xmin = -gbx; - vp[i].guardband.xmax = gbx; - vp[i].guardband.ymin = -gby; - vp[i].guardband.ymax = gby; - /* _NEW_VIEWPORT */ vp[i].viewport.m00 = scale[0]; vp[i].viewport.m11 = scale[1] * y_scale; @@ -84,6 +72,14 @@ vp[i].viewport.m30 = translate[0]; vp[i].viewport.m31 = translate[1] * y_scale + y_bias; vp[i].viewport.m32 = translate[2]; + + brw_calculate_guardband_size(devinfo, fb_width, fb_height, + vp[i].viewport.m00, vp[i].viewport.m11, + vp[i].viewport.m30, vp[i].viewport.m31, + &vp[i].guardband.xmin, + &vp[i].guardband.xmax, + &vp[i].guardband.ymin, + &vp[i].guardband.ymax); } BEGIN_BATCH(2); @@ -97,7 +93,8 @@ .mesa = _NEW_BUFFERS | _NEW_VIEWPORT, .brw = BRW_NEW_BATCH | - BRW_NEW_BLORP, + BRW_NEW_BLORP | + BRW_NEW_VIEWPORT_COUNT, }, .emit = gen7_upload_sf_clip_viewport, }; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_vs_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_vs_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_vs_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_vs_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -32,16 +32,19 @@ static void upload_vs_state(struct brw_context *brw) { + const struct gen_device_info *devinfo = &brw->screen->devinfo; const struct brw_stage_state *stage_state = &brw->vs.base; + const struct brw_stage_prog_data *prog_data = stage_state->prog_data; + const struct brw_vue_prog_data *vue_prog_data = + brw_vue_prog_data(stage_state->prog_data); uint32_t floating_point_mode = 0; const int max_threads_shift = brw->is_haswell ? HSW_VS_MAX_THREADS_SHIFT : GEN6_VS_MAX_THREADS_SHIFT; - const struct brw_vue_prog_data *prog_data = &brw->vs.prog_data->base; if (!brw->is_haswell && !brw->is_baytrail) gen7_emit_vs_workaround_flush(brw); - if (brw->vs.prog_data->base.base.use_alt_mode) + if (prog_data->use_alt_mode) floating_point_mode = GEN6_VS_FLOATING_POINT_MODE_ALT; BEGIN_BATCH(6); @@ -50,10 +53,10 @@ OUT_BATCH(floating_point_mode | ((ALIGN(stage_state->sampler_count, 4)/4) << GEN6_VS_SAMPLER_COUNT_SHIFT) | - ((brw->vs.prog_data->base.base.binding_table.size_bytes / 4) << + ((prog_data->binding_table.size_bytes / 4) << GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT)); - if (prog_data->base.total_scratch) { + if (prog_data->total_scratch) { OUT_RELOC(stage_state->scratch_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, ffs(stage_state->per_thread_scratch) - 11); @@ -61,12 +64,12 @@ OUT_BATCH(0); } - OUT_BATCH((prog_data->base.dispatch_grf_start_reg << + OUT_BATCH((prog_data->dispatch_grf_start_reg << GEN6_VS_DISPATCH_START_GRF_SHIFT) | - (prog_data->urb_read_length << GEN6_VS_URB_READ_LENGTH_SHIFT) | + (vue_prog_data->urb_read_length << GEN6_VS_URB_READ_LENGTH_SHIFT) | (0 << GEN6_VS_URB_ENTRY_READ_OFFSET_SHIFT)); - OUT_BATCH(((brw->max_vs_threads - 1) << max_threads_shift) | + OUT_BATCH(((devinfo->max_vs_threads - 1) << max_threads_shift) | GEN6_VS_STATISTICS_ENABLE | GEN6_VS_ENABLE); ADVANCE_BATCH(); @@ -74,7 +77,7 @@ const struct brw_tracked_state gen7_vs_state = { .dirty = { - .mesa = _NEW_TRANSFORM, + .mesa = 0, .brw = BRW_NEW_BATCH | BRW_NEW_BLORP | BRW_NEW_CONTEXT | diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_wm_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_wm_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_wm_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_wm_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -38,7 +38,8 @@ { struct gl_context *ctx = &brw->ctx; /* BRW_NEW_FS_PROG_DATA */ - const struct brw_wm_prog_data *prog_data = brw->wm.prog_data; + const struct brw_wm_prog_data *prog_data = + brw_wm_prog_data(brw->wm.base.prog_data); bool writes_depth = prog_data->computed_depth_mode != BRW_PSCDEPTH_OFF; uint32_t dw1, dw2; @@ -68,20 +69,19 @@ dw1 |= prog_data->barycentric_interp_modes << GEN7_WM_BARYCENTRIC_INTERPOLATION_MODE_SHIFT; - /* _NEW_COLOR, _NEW_MULTISAMPLE */ + /* _NEW_COLOR, _NEW_MULTISAMPLE _NEW_BUFFERS */ /* Enable if the pixel shader kernel generates and outputs oMask. */ - if (prog_data->uses_kill || ctx->Color.AlphaEnabled || - ctx->Multisample.SampleAlphaToCoverage || + if (prog_data->uses_kill || + _mesa_is_alpha_test_enabled(ctx) || + _mesa_is_alpha_to_coverage_enabled(ctx) || prog_data->uses_omask) { dw1 |= GEN7_WM_KILL_ENABLE; } /* _NEW_BUFFERS | _NEW_COLOR */ - const bool active_fs_has_side_effects = - _mesa_active_fragment_shader_has_side_effects(&brw->ctx); if (brw_color_buffer_write_enabled(brw) || writes_depth || - active_fs_has_side_effects || dw1 & GEN7_WM_KILL_ENABLE) { + prog_data->has_side_effects || dw1 & GEN7_WM_KILL_ENABLE) { dw1 |= GEN7_WM_DISPATCH_ENABLE; } if (multisampled_fbo) { @@ -107,7 +107,7 @@ /* BRW_NEW_FS_PROG_DATA */ if (prog_data->early_fragment_tests) dw1 |= GEN7_WM_EARLY_DS_CONTROL_PREPS; - else if (active_fs_has_side_effects) + else if (prog_data->has_side_effects) dw1 |= GEN7_WM_EARLY_DS_CONTROL_PSEXEC; /* The "UAV access enable" bits are unnecessary on HSW because they only @@ -120,7 +120,7 @@ */ if (brw->is_haswell && !(brw_color_buffer_write_enabled(brw) || writes_depth) && - active_fs_has_side_effects) + prog_data->has_side_effects) dw2 |= HSW_WM_UAV_ONLY; BEGIN_BATCH(3); @@ -151,6 +151,7 @@ bool enable_dual_src_blend, unsigned sample_mask, unsigned fast_clear_op) { + const struct gen_device_info *devinfo = &brw->screen->devinfo; uint32_t dw2, dw4, dw5, ksp0, ksp2; const int max_threads_shift = brw->is_haswell ? HSW_PS_MAX_THREADS_SHIFT : IVB_PS_MAX_THREADS_SHIFT; @@ -173,7 +174,7 @@ if (brw->is_haswell) dw4 |= SET_FIELD(sample_mask, HSW_PS_SAMPLE_MASK); - dw4 |= (brw->max_wm_threads - 1) << max_threads_shift; + dw4 |= (devinfo->max_wm_threads - 1) << max_threads_shift; if (prog_data->base.nr_params > 0) dw4 |= GEN7_PS_PUSH_CONSTANT_ENABLE; @@ -252,7 +253,8 @@ upload_ps_state(struct brw_context *brw) { /* BRW_NEW_FS_PROG_DATA */ - const struct brw_wm_prog_data *prog_data = brw->wm.prog_data; + const struct brw_wm_prog_data *prog_data = + brw_wm_prog_data(brw->wm.base.prog_data); const struct gl_context *ctx = &brw->ctx; /* BRW_NEW_FS_PROG_DATA | _NEW_COLOR */ const bool enable_dual_src_blend = prog_data->dual_src_blend && diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -39,100 +39,6 @@ #include "brw_defines.h" #include "brw_wm.h" -/** - * Convert an swizzle enumeration (i.e. SWIZZLE_X) to one of the Gen7.5+ - * "Shader Channel Select" enumerations (i.e. HSW_SCS_RED). The mappings are - * - * SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W, SWIZZLE_ZERO, SWIZZLE_ONE - * 0 1 2 3 4 5 - * 4 5 6 7 0 1 - * SCS_RED, SCS_GREEN, SCS_BLUE, SCS_ALPHA, SCS_ZERO, SCS_ONE - * - * which is simply adding 4 then modding by 8 (or anding with 7). - * - * We then may need to apply workarounds for textureGather hardware bugs. - */ -static unsigned -swizzle_to_scs(GLenum swizzle, bool need_green_to_blue) -{ - unsigned scs = (swizzle + 4) & 7; - - return (need_green_to_blue && scs == HSW_SCS_GREEN) ? HSW_SCS_BLUE : scs; -} - -uint32_t -gen7_surface_tiling_mode(uint32_t tiling) -{ - switch (tiling) { - case I915_TILING_X: - return GEN7_SURFACE_TILING_X; - case I915_TILING_Y: - return GEN7_SURFACE_TILING_Y; - default: - return GEN7_SURFACE_TILING_NONE; - } -} - - -uint32_t -gen7_surface_msaa_bits(unsigned num_samples, enum intel_msaa_layout layout) -{ - uint32_t ss4 = 0; - - assert(num_samples <= 16); - - /* The SURFACE_MULTISAMPLECOUNT_X enums are simply log2(num_samples) << 3. */ - ss4 |= (ffs(MAX2(num_samples, 1)) - 1) << 3; - - if (layout == INTEL_MSAA_LAYOUT_IMS) - ss4 |= GEN7_SURFACE_MSFMT_DEPTH_STENCIL; - else - ss4 |= GEN7_SURFACE_MSFMT_MSS; - - return ss4; -} - - -void -gen7_set_surface_mcs_info(struct brw_context *brw, - uint32_t *surf, - uint32_t surf_offset, - const struct intel_mipmap_tree *mcs_mt, - bool is_render_target) -{ - /* From the Ivy Bridge PRM, Vol4 Part1 p76, "MCS Base Address": - * - * "The MCS surface must be stored as Tile Y." - */ - assert(mcs_mt->tiling == I915_TILING_Y); - - /* Compute the pitch in units of tiles. To do this we need to divide the - * pitch in bytes by 128, since a single Y-tile is 128 bytes wide. - */ - unsigned pitch_tiles = mcs_mt->pitch / 128; - - /* The upper 20 bits of surface state DWORD 6 are the upper 20 bits of the - * GPU address of the MCS buffer; the lower 12 bits contain other control - * information. Since buffer addresses are always on 4k boundaries (and - * thus have their lower 12 bits zero), we can use an ordinary reloc to do - * the necessary address translation. - */ - assert ((mcs_mt->bo->offset64 & 0xfff) == 0); - - surf[6] = GEN7_SURFACE_MCS_ENABLE | - SET_FIELD(pitch_tiles - 1, GEN7_SURFACE_MCS_PITCH) | - mcs_mt->bo->offset64; - - drm_intel_bo_emit_reloc(brw->batch.bo, - surf_offset + 6 * 4, - mcs_mt->bo, - surf[6] & 0xfff, - is_render_target ? I915_GEM_DOMAIN_RENDER - : I915_GEM_DOMAIN_SAMPLER, - is_render_target ? I915_GEM_DOMAIN_RENDER : 0); -} - - void gen7_check_surface_setup(uint32_t *surf, bool is_render_target) { @@ -219,195 +125,6 @@ } } -static void -gen7_emit_buffer_surface_state(struct brw_context *brw, - uint32_t *out_offset, - drm_intel_bo *bo, - unsigned buffer_offset, - unsigned surface_format, - unsigned buffer_size, - unsigned pitch, - bool rw) -{ - uint32_t *surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, - 8 * 4, 32, out_offset); - memset(surf, 0, 8 * 4); - - surf[0] = BRW_SURFACE_BUFFER << BRW_SURFACE_TYPE_SHIFT | - surface_format << BRW_SURFACE_FORMAT_SHIFT | - BRW_SURFACE_RC_READ_WRITE; - surf[1] = (bo ? bo->offset64 : 0) + buffer_offset; /* reloc */ - surf[2] = SET_FIELD((buffer_size - 1) & 0x7f, GEN7_SURFACE_WIDTH) | - SET_FIELD(((buffer_size - 1) >> 7) & 0x3fff, GEN7_SURFACE_HEIGHT); - if (surface_format == BRW_SURFACEFORMAT_RAW) - surf[3] = SET_FIELD(((buffer_size - 1) >> 21) & 0x3ff, BRW_SURFACE_DEPTH); - else - surf[3] = SET_FIELD(((buffer_size - 1) >> 21) & 0x3f, BRW_SURFACE_DEPTH); - surf[3] |= (pitch - 1); - - surf[5] = SET_FIELD(GEN7_MOCS_L3, GEN7_SURFACE_MOCS); - - if (brw->is_haswell) { - surf[7] |= (SET_FIELD(HSW_SCS_RED, GEN7_SURFACE_SCS_R) | - SET_FIELD(HSW_SCS_GREEN, GEN7_SURFACE_SCS_G) | - SET_FIELD(HSW_SCS_BLUE, GEN7_SURFACE_SCS_B) | - SET_FIELD(HSW_SCS_ALPHA, GEN7_SURFACE_SCS_A)); - } - - /* Emit relocation to surface contents */ - if (bo) { - drm_intel_bo_emit_reloc(brw->batch.bo, *out_offset + 4, - bo, buffer_offset, I915_GEM_DOMAIN_SAMPLER, - (rw ? I915_GEM_DOMAIN_SAMPLER : 0)); - } - - gen7_check_surface_setup(surf, false /* is_render_target */); -} - -static void -gen7_emit_texture_surface_state(struct brw_context *brw, - struct intel_mipmap_tree *mt, - GLenum target, - unsigned min_layer, unsigned max_layer, - unsigned min_level, unsigned max_level, - unsigned format, - unsigned swizzle, - uint32_t *surf_offset, - int surf_index /* unused */, - bool rw, bool for_gather) -{ - const unsigned depth = max_layer - min_layer; - uint32_t *surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, - 8 * 4, 32, surf_offset); - - memset(surf, 0, 8 * 4); - - surf[0] = translate_tex_target(target) << BRW_SURFACE_TYPE_SHIFT | - format << BRW_SURFACE_FORMAT_SHIFT | - gen7_surface_tiling_mode(mt->tiling); - - /* mask of faces present in cube map; for other surfaces MBZ. */ - if (target == GL_TEXTURE_CUBE_MAP || target == GL_TEXTURE_CUBE_MAP_ARRAY) - surf[0] |= BRW_SURFACE_CUBEFACE_ENABLES; - - if (mt->valign == 4) - surf[0] |= GEN7_SURFACE_VALIGN_4; - if (mt->halign == 8) - surf[0] |= GEN7_SURFACE_HALIGN_8; - - if (_mesa_is_array_texture(target) || target == GL_TEXTURE_CUBE_MAP) - surf[0] |= GEN7_SURFACE_IS_ARRAY; - - if (mt->array_layout == ALL_SLICES_AT_EACH_LOD) - surf[0] |= GEN7_SURFACE_ARYSPC_LOD0; - - surf[1] = mt->bo->offset64 + mt->offset; /* reloc */ - - surf[2] = SET_FIELD(mt->logical_width0 - 1, GEN7_SURFACE_WIDTH) | - SET_FIELD(mt->logical_height0 - 1, GEN7_SURFACE_HEIGHT); - - surf[3] = SET_FIELD(depth - 1, BRW_SURFACE_DEPTH) | - (mt->pitch - 1); - - if (brw->is_haswell && _mesa_is_format_integer(mt->format)) - surf[3] |= HSW_SURFACE_IS_INTEGER_FORMAT; - - surf[4] = gen7_surface_msaa_bits(mt->num_samples, mt->msaa_layout) | - SET_FIELD(min_layer, GEN7_SURFACE_MIN_ARRAY_ELEMENT) | - SET_FIELD(depth - 1, GEN7_SURFACE_RENDER_TARGET_VIEW_EXTENT); - - surf[5] = (SET_FIELD(GEN7_MOCS_L3, GEN7_SURFACE_MOCS) | - SET_FIELD(min_level - mt->first_level, GEN7_SURFACE_MIN_LOD) | - /* mip count */ - (max_level - min_level - 1)); - - surf[7] = mt->fast_clear_color_value; - - if (brw->is_haswell) { - const bool need_scs_green_to_blue = for_gather && format == BRW_SURFACEFORMAT_R32G32_FLOAT_LD; - - surf[7] |= - SET_FIELD(swizzle_to_scs(GET_SWZ(swizzle, 0), need_scs_green_to_blue), GEN7_SURFACE_SCS_R) | - SET_FIELD(swizzle_to_scs(GET_SWZ(swizzle, 1), need_scs_green_to_blue), GEN7_SURFACE_SCS_G) | - SET_FIELD(swizzle_to_scs(GET_SWZ(swizzle, 2), need_scs_green_to_blue), GEN7_SURFACE_SCS_B) | - SET_FIELD(swizzle_to_scs(GET_SWZ(swizzle, 3), need_scs_green_to_blue), GEN7_SURFACE_SCS_A); - } - - if (mt->mcs_mt) { - gen7_set_surface_mcs_info(brw, surf, *surf_offset, - mt->mcs_mt, false /* is RT */); - } - - /* Emit relocation to surface contents */ - drm_intel_bo_emit_reloc(brw->batch.bo, - *surf_offset + 4, - mt->bo, - surf[1] - mt->bo->offset64, - I915_GEM_DOMAIN_SAMPLER, - (rw ? I915_GEM_DOMAIN_SAMPLER : 0)); - - gen7_check_surface_setup(surf, false /* is_render_target */); -} - -static void -gen7_update_texture_surface(struct gl_context *ctx, - unsigned unit, - uint32_t *surf_offset, - bool for_gather, - uint32_t plane) -{ - struct brw_context *brw = brw_context(ctx); - struct gl_texture_object *obj = ctx->Texture.Unit[unit]._Current; - - if (obj->Target == GL_TEXTURE_BUFFER) { - brw_update_buffer_texture_surface(ctx, unit, surf_offset); - - } else { - struct intel_texture_object *intel_obj = intel_texture_object(obj); - struct intel_mipmap_tree *mt = intel_obj->mt; - - if (plane > 0) { - if (mt->plane[plane - 1] == NULL) - return; - mt = mt->plane[plane - 1]; - } - - struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit); - /* If this is a view with restricted NumLayers, then our effective depth - * is not just the miptree depth. - */ - const unsigned depth = (obj->Immutable && obj->Target != GL_TEXTURE_3D ? - obj->NumLayers : mt->logical_depth0); - - /* Handling GL_ALPHA as a surface format override breaks 1.30+ style - * texturing functions that return a float, as our code generation always - * selects the .x channel (which would always be 0). - */ - struct gl_texture_image *firstImage = obj->Image[0][obj->BaseLevel]; - const bool alpha_depth = obj->DepthMode == GL_ALPHA && - (firstImage->_BaseFormat == GL_DEPTH_COMPONENT || - firstImage->_BaseFormat == GL_DEPTH_STENCIL); - const unsigned swizzle = (unlikely(alpha_depth) ? SWIZZLE_XYZW : - brw_get_texture_swizzle(&brw->ctx, obj)); - - mesa_format mesa_fmt = plane == 0 ? intel_obj->_Format : mt->format; - unsigned format = translate_tex_format(brw, mesa_fmt, - sampler->sRGBDecode); - - if (for_gather && format == BRW_SURFACEFORMAT_R32G32_FLOAT) - format = BRW_SURFACEFORMAT_R32G32_FLOAT_LD; - - const int surf_index = surf_offset - &brw->wm.base.surf_offset[0]; - - gen7_emit_texture_surface_state(brw, mt, obj->Target, - obj->MinLayer, obj->MinLayer + depth, - obj->MinLevel + obj->BaseLevel, - obj->MinLevel + intel_obj->_MaxLevel + 1, - format, swizzle, surf_offset, - surf_index, false, for_gather); - } -} - /** * Creates a null surface. * @@ -456,131 +173,9 @@ gen7_check_surface_setup(surf, true /* is_render_target */); } -/** - * Sets up a surface state structure to point at the given region. - * While it is only used for the front/back buffer currently, it should be - * usable for further buffers when doing ARB_draw_buffer support. - */ -static uint32_t -gen7_update_renderbuffer_surface(struct brw_context *brw, - struct gl_renderbuffer *rb, - bool layered, unsigned unit /* unused */, - uint32_t surf_index) -{ - struct gl_context *ctx = &brw->ctx; - struct intel_renderbuffer *irb = intel_renderbuffer(rb); - struct intel_mipmap_tree *mt = irb->mt; - uint32_t format; - /* _NEW_BUFFERS */ - mesa_format rb_format = _mesa_get_render_format(ctx, intel_rb_format(irb)); - uint32_t surftype; - bool is_array = false; - int depth = MAX2(irb->layer_count, 1); - const uint8_t mocs = GEN7_MOCS_L3; - uint32_t offset; - - int min_array_element = irb->mt_layer / MAX2(mt->num_samples, 1); - - GLenum gl_target = rb->TexImage ? - rb->TexImage->TexObject->Target : GL_TEXTURE_2D; - - uint32_t *surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, 8 * 4, 32, - &offset); - memset(surf, 0, 8 * 4); - - intel_miptree_used_for_rendering(irb->mt); - - /* Render targets can't use IMS layout */ - assert(irb->mt->msaa_layout != INTEL_MSAA_LAYOUT_IMS); - - assert(brw_render_target_supported(brw, rb)); - format = brw->render_target_format[rb_format]; - if (unlikely(!brw->format_supported_as_render_target[rb_format])) { - _mesa_problem(ctx, "%s: renderbuffer format %s unsupported\n", - __func__, _mesa_get_format_name(rb_format)); - } - - switch (gl_target) { - case GL_TEXTURE_CUBE_MAP_ARRAY: - case GL_TEXTURE_CUBE_MAP: - surftype = BRW_SURFACE_2D; - is_array = true; - depth *= 6; - break; - case GL_TEXTURE_3D: - depth = MAX2(irb->mt->logical_depth0, 1); - /* fallthrough */ - default: - surftype = translate_tex_target(gl_target); - is_array = _mesa_is_array_texture(gl_target); - break; - } - - surf[0] = surftype << BRW_SURFACE_TYPE_SHIFT | - format << BRW_SURFACE_FORMAT_SHIFT | - (irb->mt->array_layout == ALL_SLICES_AT_EACH_LOD ? - GEN7_SURFACE_ARYSPC_LOD0 : GEN7_SURFACE_ARYSPC_FULL) | - gen7_surface_tiling_mode(mt->tiling); - - if (irb->mt->valign == 4) - surf[0] |= GEN7_SURFACE_VALIGN_4; - if (irb->mt->halign == 8) - surf[0] |= GEN7_SURFACE_HALIGN_8; - - if (is_array) { - surf[0] |= GEN7_SURFACE_IS_ARRAY; - } - - assert(mt->offset % mt->cpp == 0); - surf[1] = mt->bo->offset64 + mt->offset; - - assert(brw->has_surface_tile_offset); - - surf[5] = SET_FIELD(mocs, GEN7_SURFACE_MOCS) | - (irb->mt_level - irb->mt->first_level); - - surf[2] = SET_FIELD(irb->mt->logical_width0 - 1, GEN7_SURFACE_WIDTH) | - SET_FIELD(irb->mt->logical_height0 - 1, GEN7_SURFACE_HEIGHT); - - surf[3] = ((depth - 1) << BRW_SURFACE_DEPTH_SHIFT) | - (mt->pitch - 1); - - surf[4] = gen7_surface_msaa_bits(irb->mt->num_samples, irb->mt->msaa_layout) | - min_array_element << GEN7_SURFACE_MIN_ARRAY_ELEMENT_SHIFT | - (depth - 1) << GEN7_SURFACE_RENDER_TARGET_VIEW_EXTENT_SHIFT; - - if (irb->mt->mcs_mt) { - gen7_set_surface_mcs_info(brw, surf, offset, - irb->mt->mcs_mt, true /* is RT */); - } - - surf[7] = irb->mt->fast_clear_color_value; - - if (brw->is_haswell) { - surf[7] |= (SET_FIELD(HSW_SCS_RED, GEN7_SURFACE_SCS_R) | - SET_FIELD(HSW_SCS_GREEN, GEN7_SURFACE_SCS_G) | - SET_FIELD(HSW_SCS_BLUE, GEN7_SURFACE_SCS_B) | - SET_FIELD(HSW_SCS_ALPHA, GEN7_SURFACE_SCS_A)); - } - - drm_intel_bo_emit_reloc(brw->batch.bo, - offset + 4, - mt->bo, - surf[1] - mt->bo->offset64, - I915_GEM_DOMAIN_RENDER, - I915_GEM_DOMAIN_RENDER); - - gen7_check_surface_setup(surf, true /* is_render_target */); - - return offset; -} - void gen7_init_vtable_surface_functions(struct brw_context *brw) { - brw->vtbl.update_texture_surface = gen7_update_texture_surface; - brw->vtbl.update_renderbuffer_surface = gen7_update_renderbuffer_surface; + brw->vtbl.update_renderbuffer_surface = brw_update_renderbuffer_surface; brw->vtbl.emit_null_surface_state = gen7_emit_null_surface_state; - brw->vtbl.emit_texture_surface_state = gen7_emit_texture_surface_state; - brw->vtbl.emit_buffer_surface_state = gen7_emit_buffer_surface_state; } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_blend_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_blend_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_blend_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_blend_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -59,11 +59,7 @@ * integer format, the SAMPLE_ALPHA_TO_COVERAGE and SAMPLE_ALPHA_TO_ONE * operations are skipped." */ - struct gl_renderbuffer *rb0 = ctx->DrawBuffer->_ColorDrawBuffers[0]; - GLenum rb_zero_type = - rb0 ? _mesa_get_format_datatype(rb0->Format) : GL_UNSIGNED_NORMALIZED; - - if (rb_zero_type != GL_INT && rb_zero_type != GL_UNSIGNED_INT) { + if (!(ctx->DrawBuffer->_IntegerBuffers & 0x1)) { /* _NEW_MULTISAMPLE */ if (_mesa_is_multisample_enabled(ctx)) { if (ctx->Multisample.SampleAlphaToCoverage) { @@ -90,8 +86,6 @@ for (int i = 0; i < nr_draw_buffers; i++) { /* _NEW_BUFFERS */ struct gl_renderbuffer *rb = ctx->DrawBuffer->_ColorDrawBuffers[i]; - GLenum rb_type = - rb ? _mesa_get_format_datatype(rb->Format) : GL_UNSIGNED_NORMALIZED; /* Used for implementing the following bit of GL_EXT_texture_integer: * "Per-fragment operations that require floating-point color @@ -99,7 +93,7 @@ * blending, and dithering, have no effect when the corresponding * colors are written to an integer color buffer." */ - bool integer = rb_type == GL_INT || rb_type == GL_UNSIGNED_INT; + bool integer = ctx->DrawBuffer->_IntegerBuffers & (0x1 << i); /* _NEW_COLOR */ if (ctx->Color.ColorLogicOpEnabled) { @@ -107,7 +101,8 @@ GEN8_BLEND_LOGIC_OP_ENABLE | SET_FIELD(intel_translate_logic_op(ctx->Color.LogicOp), GEN8_BLEND_LOGIC_OP_FUNCTION); - } else if (ctx->Color.BlendEnabled & (1 << i) && !integer) { + } else if (ctx->Color.BlendEnabled & (1 << i) && !integer && + !ctx->Color._AdvancedBlendMode) { GLenum eqRGB = ctx->Color.Blend[i].EquationRGB; GLenum eqA = ctx->Color.Blend[i].EquationA; GLenum srcRGB = ctx->Color.Blend[i].SrcRGB; @@ -217,18 +212,22 @@ /* _NEW_BUFFERS */ struct gl_renderbuffer *rb = ctx->DrawBuffer->_ColorDrawBuffers[0]; + const bool buffer0_is_integer = ctx->DrawBuffer->_IntegerBuffers & 0x1; /* BRW_NEW_FRAGMENT_PROGRAM | _NEW_BUFFERS | _NEW_COLOR */ if (brw_color_buffer_write_enabled(brw)) dw1 |= GEN8_PS_BLEND_HAS_WRITEABLE_RT; - /* _NEW_COLOR */ - if (ctx->Color.AlphaEnabled) - dw1 |= GEN8_PS_BLEND_ALPHA_TEST_ENABLE; - - /* _NEW_MULTISAMPLE */ - if (_mesa_is_multisample_enabled(ctx) && ctx->Multisample.SampleAlphaToCoverage) - dw1 |= GEN8_PS_BLEND_ALPHA_TO_COVERAGE_ENABLE; + if (!buffer0_is_integer) { + /* _NEW_COLOR */ + if (ctx->Color.AlphaEnabled) + dw1 |= GEN8_PS_BLEND_ALPHA_TEST_ENABLE; + + /* _NEW_MULTISAMPLE */ + if (_mesa_is_multisample_enabled(ctx) && + ctx->Multisample.SampleAlphaToCoverage) + dw1 |= GEN8_PS_BLEND_ALPHA_TO_COVERAGE_ENABLE; + } /* Used for implementing the following bit of GL_EXT_texture_integer: * "Per-fragment operations that require floating-point color @@ -241,11 +240,7 @@ * integer format, the SAMPLE_ALPHA_TO_COVERAGE and SAMPLE_ALPHA_TO_ONE * operations are skipped." */ - GLenum rb_type = - rb ? _mesa_get_format_datatype(rb->Format) : GL_UNSIGNED_NORMALIZED; - - if (rb && rb_type != GL_INT && rb_type != GL_UNSIGNED_INT && - (ctx->Color.BlendEnabled & 1)) { + if (rb && !buffer0_is_integer && (ctx->Color.BlendEnabled & 1)) { GLenum eqRGB = ctx->Color.Blend[0].EquationRGB; GLenum eqA = ctx->Color.Blend[0].EquationA; GLenum srcRGB = ctx->Color.Blend[0].SrcRGB; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_blorp.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_blorp.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_blorp.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_blorp.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,734 +0,0 @@ -/* - * Copyright © 2016 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - -#include - -#include "intel_batchbuffer.h" -#include "intel_fbo.h" -#include "intel_mipmap_tree.h" - -#include "brw_context.h" -#include "brw_defines.h" -#include "brw_state.h" - -#include "brw_blorp.h" - - -/* SURFACE_STATE for renderbuffer or texture surface (see - * brw_update_renderbuffer_surface and brw_update_texture_surface) - */ -static uint32_t -gen8_blorp_emit_surface_state(struct brw_context *brw, - const struct brw_blorp_surface_info *surface, - uint32_t read_domains, uint32_t write_domain, - bool is_render_target) -{ - uint32_t wm_surf_offset; - const struct intel_mipmap_tree *mt = surface->mt; - const uint32_t mocs_wb = is_render_target ? - (brw->gen >= 9 ? SKL_MOCS_PTE : BDW_MOCS_PTE) : - (brw->gen >= 9 ? SKL_MOCS_WB : BDW_MOCS_WB); - const uint32_t tiling = surface->map_stencil_as_y_tiled - ? I915_TILING_Y : mt->tiling; - uint32_t tile_x, tile_y; - - uint32_t *surf = gen8_allocate_surface_state(brw, &wm_surf_offset, -1); - - surf[0] = BRW_SURFACE_2D << BRW_SURFACE_TYPE_SHIFT | - surface->brw_surfaceformat << BRW_SURFACE_FORMAT_SHIFT | - gen8_vertical_alignment(brw, mt, BRW_SURFACE_2D) | - gen8_horizontal_alignment(brw, mt, BRW_SURFACE_2D) | - gen8_surface_tiling_mode(tiling); - - surf[1] = SET_FIELD(mocs_wb, GEN8_SURFACE_MOCS) | mt->qpitch >> 2; - - surf[2] = SET_FIELD(surface->width - 1, GEN7_SURFACE_WIDTH) | - SET_FIELD(surface->height - 1, GEN7_SURFACE_HEIGHT); - - uint32_t pitch_bytes = mt->pitch; - if (surface->map_stencil_as_y_tiled) - pitch_bytes *= 2; - surf[3] = pitch_bytes - 1; - - surf[4] = gen7_surface_msaa_bits(surface->num_samples, - surface->msaa_layout); - - if (surface->mt->mcs_mt) { - surf[6] = SET_FIELD(surface->mt->qpitch / 4, GEN8_SURFACE_AUX_QPITCH) | - SET_FIELD((surface->mt->mcs_mt->pitch / 128) - 1, - GEN8_SURFACE_AUX_PITCH) | - gen8_get_aux_mode(brw, mt); - } else { - surf[6] = 0; - } - - gen8_emit_fast_clear_color(brw, mt, surf); - surf[7] |= SET_FIELD(HSW_SCS_RED, GEN7_SURFACE_SCS_R) | - SET_FIELD(HSW_SCS_GREEN, GEN7_SURFACE_SCS_G) | - SET_FIELD(HSW_SCS_BLUE, GEN7_SURFACE_SCS_B) | - SET_FIELD(HSW_SCS_ALPHA, GEN7_SURFACE_SCS_A); - - /* reloc */ - *((uint64_t *)&surf[8]) = - brw_blorp_compute_tile_offsets(surface, &tile_x, &tile_y) + - mt->bo->offset64; - - /* Note that the low bits of these fields are missing, so there's the - * possibility of getting in trouble. - */ - assert(tile_x % 4 == 0); - assert(tile_y % 4 == 0); - surf[5] = SET_FIELD(tile_x / 4, BRW_SURFACE_X_OFFSET) | - SET_FIELD(tile_y / 4, GEN8_SURFACE_Y_OFFSET); - - if (brw->gen >= 9) { - /* Disable Mip Tail by setting a large value. */ - surf[5] |= SET_FIELD(15, GEN9_SURFACE_MIP_TAIL_START_LOD); - } - - if (surface->mt->mcs_mt) { - *((uint64_t *) &surf[10]) = surface->mt->mcs_mt->bo->offset64; - drm_intel_bo_emit_reloc(brw->batch.bo, - wm_surf_offset + 10 * 4, - surface->mt->mcs_mt->bo, 0, - read_domains, write_domain); - } - - /* Emit relocation to surface contents */ - drm_intel_bo_emit_reloc(brw->batch.bo, - wm_surf_offset + 8 * 4, - mt->bo, - surf[8] - mt->bo->offset64, - read_domains, write_domain); - - return wm_surf_offset; -} - -static uint32_t -gen8_blorp_emit_blend_state(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - uint32_t blend_state_offset; - - assume(params->num_draw_buffers); - - const unsigned size = 4 + 8 * params->num_draw_buffers; - uint32_t *blend = (uint32_t *)brw_state_batch(brw, AUB_TRACE_BLEND_STATE, - size, 64, - &blend_state_offset); - memset(blend, 0, size); - - for (unsigned i = 0; i < params->num_draw_buffers; ++i) { - if (params->color_write_disable[0]) - blend[1 + 2 * i] |= GEN8_BLEND_WRITE_DISABLE_RED; - if (params->color_write_disable[1]) - blend[1 + 2 * i] |= GEN8_BLEND_WRITE_DISABLE_GREEN; - if (params->color_write_disable[2]) - blend[1 + 2 * i] |= GEN8_BLEND_WRITE_DISABLE_BLUE; - if (params->color_write_disable[3]) - blend[1 + 2 * i] |= GEN8_BLEND_WRITE_DISABLE_ALPHA; - - blend[1 + 2 * i + 1] = GEN8_BLEND_PRE_BLEND_COLOR_CLAMP_ENABLE | - GEN8_BLEND_POST_BLEND_COLOR_CLAMP_ENABLE | - GEN8_BLEND_COLOR_CLAMP_RANGE_RTFORMAT; - } - - return blend_state_offset; -} - -static void -gen8_blorp_emit_disable_constant_state(struct brw_context *brw, - unsigned opcode) -{ - BEGIN_BATCH(11); - OUT_BATCH(opcode << 16 | (11 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - -static void -gen8_blorp_emit_disable_binding_table(struct brw_context *brw, - unsigned opcode) -{ - - BEGIN_BATCH(2); - OUT_BATCH(opcode << 16 | (2 - 2)); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - -/* 3DSTATE_VS - * - * Disable vertex shader. - */ -static void -gen8_blorp_emit_vs_disable(struct brw_context *brw) -{ - BEGIN_BATCH(9); - OUT_BATCH(_3DSTATE_VS << 16 | (9 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - -/* 3DSTATE_HS - * - * Disable the hull shader. - */ -static void -gen8_blorp_emit_hs_disable(struct brw_context *brw) -{ - BEGIN_BATCH(9); - OUT_BATCH(_3DSTATE_HS << 16 | (9 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - -/* 3DSTATE_DS - * - * Disable the domain shader. - */ -static void -gen8_blorp_emit_ds_disable(struct brw_context *brw) -{ - const int ds_pkt_len = brw->gen >= 9 ? 11 : 9; - BEGIN_BATCH(ds_pkt_len); - OUT_BATCH(_3DSTATE_DS << 16 | (ds_pkt_len - 2)); - for (int i = 0; i < ds_pkt_len - 1; i++) - OUT_BATCH(0); - ADVANCE_BATCH(); -} - -/* 3DSTATE_GS - * - * Disable the geometry shader. - */ -static void -gen8_blorp_emit_gs_disable(struct brw_context *brw) -{ - BEGIN_BATCH(10); - OUT_BATCH(_3DSTATE_GS << 16 | (10 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - -/* 3DSTATE_STREAMOUT - * - * Disable streamout. - */ -static void -gen8_blorp_emit_streamout_disable(struct brw_context *brw) -{ - BEGIN_BATCH(5); - OUT_BATCH(_3DSTATE_STREAMOUT << 16 | (5 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - -static void -gen8_blorp_emit_raster_state(struct brw_context *brw) -{ - BEGIN_BATCH(5); - OUT_BATCH(_3DSTATE_RASTER << 16 | (5 - 2)); - OUT_BATCH(GEN8_RASTER_CULL_NONE); - OUT_BATCH_F(0); - OUT_BATCH_F(0); - OUT_BATCH_F(0); - ADVANCE_BATCH(); -} - -static void -gen8_blorp_emit_sbe_state(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - /* 3DSTATE_SBE */ - { - const unsigned sbe_cmd_length = brw->gen == 8 ? 4 : 6; - BEGIN_BATCH(sbe_cmd_length); - OUT_BATCH(_3DSTATE_SBE << 16 | (sbe_cmd_length - 2)); - OUT_BATCH(GEN7_SBE_SWIZZLE_ENABLE | - params->num_varyings << GEN7_SBE_NUM_OUTPUTS_SHIFT | - 1 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT | - BRW_SF_URB_ENTRY_READ_OFFSET << - GEN8_SBE_URB_ENTRY_READ_OFFSET_SHIFT | - GEN8_SBE_FORCE_URB_ENTRY_READ_LENGTH | - GEN8_SBE_FORCE_URB_ENTRY_READ_OFFSET); - OUT_BATCH(0); - OUT_BATCH(0); - if (sbe_cmd_length >= 6) { - OUT_BATCH(GEN9_SBE_ACTIVE_COMPONENT_XYZW << (0 << 1)); - OUT_BATCH(0); - } - ADVANCE_BATCH(); - } - - { - BEGIN_BATCH(11); - OUT_BATCH(_3DSTATE_SBE_SWIZ << 16 | (11 - 2)); - - /* Output DWords 1 through 8: */ - for (int i = 0; i < 8; i++) { - OUT_BATCH(0); - } - - OUT_BATCH(0); /* wrapshortest enables 0-7 */ - OUT_BATCH(0); /* wrapshortest enables 8-15 */ - ADVANCE_BATCH(); - } -} - -static void -gen8_blorp_emit_sf_config(struct brw_context *brw) -{ - /* See gen6_blorp_emit_sf_config() */ - BEGIN_BATCH(4); - OUT_BATCH(_3DSTATE_SF << 16 | (4 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(GEN6_SF_LINE_AA_MODE_TRUE); - ADVANCE_BATCH(); -} - -/** - * Disable thread dispatch (dw5.19) and enable the HiZ op. - */ -static void -gen8_blorp_emit_wm_state(struct brw_context *brw) -{ - BEGIN_BATCH(2); - OUT_BATCH(_3DSTATE_WM << 16 | (2 - 2)); - OUT_BATCH(GEN7_WM_LINE_AA_WIDTH_1_0 | - GEN7_WM_LINE_END_CAP_AA_WIDTH_0_5 | - GEN7_WM_POINT_RASTRULE_UPPER_RIGHT); - ADVANCE_BATCH(); -} - -/** - * 3DSTATE_PS - * - * Pixel shader dispatch is disabled above in 3DSTATE_WM, dw1.29. Despite - * that, thread dispatch info must still be specified. - * - Maximum Number of Threads (dw4.24:31) must be nonzero, as the - * valid range for this field is [0x3, 0x2f]. - * - A dispatch mode must be given; that is, at least one of the - * "N Pixel Dispatch Enable" (N=8,16,32) fields must be set. This was - * discovered through simulator error messages. - */ -static void -gen8_blorp_emit_ps_config(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - const struct brw_blorp_prog_data *prog_data = params->wm_prog_data; - uint32_t dw3, dw5, dw6, dw7, ksp0, ksp2; - - dw3 = dw5 = dw6 = dw7 = ksp0 = ksp2 = 0; - dw3 |= GEN7_PS_VECTOR_MASK_ENABLE; - - if (params->src.mt) { - dw3 |= 1 << GEN7_PS_SAMPLER_COUNT_SHIFT; /* Up to 4 samplers */ - dw3 |= 2 << GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT; /* Two surfaces */ - } else { - dw3 |= 1 << GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT; /* One surface */ - } - - dw6 |= GEN7_PS_PUSH_CONSTANT_ENABLE; - dw7 |= prog_data->first_curbe_grf_0 << GEN7_PS_DISPATCH_START_GRF_SHIFT_0; - dw7 |= prog_data->first_curbe_grf_2 << GEN7_PS_DISPATCH_START_GRF_SHIFT_2; - - if (params->wm_prog_data->dispatch_8) - dw6 |= GEN7_PS_8_DISPATCH_ENABLE; - if (params->wm_prog_data->dispatch_16) - dw6 |= GEN7_PS_16_DISPATCH_ENABLE; - - ksp0 = params->wm_prog_kernel; - ksp2 = params->wm_prog_kernel + params->wm_prog_data->ksp_offset_2; - - /* 3DSTATE_PS expects the number of threads per PSD, which is always 64; - * it implicitly scales for different GT levels (which have some # of PSDs). - * - * In Gen8 the format is U8-2 whereas in Gen9 it is U8-1. - */ - if (brw->gen >= 9) - dw6 |= (64 - 1) << HSW_PS_MAX_THREADS_SHIFT; - else - dw6 |= (64 - 2) << HSW_PS_MAX_THREADS_SHIFT; - - dw6 |= GEN7_PS_POSOFFSET_NONE; - dw6 |= params->fast_clear_op; - - BEGIN_BATCH(12); - OUT_BATCH(_3DSTATE_PS << 16 | (12 - 2)); - OUT_BATCH(ksp0); - OUT_BATCH(0); - OUT_BATCH(dw3); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(dw6); - OUT_BATCH(dw7); - OUT_BATCH(0); /* kernel 1 pointer */ - OUT_BATCH(0); - OUT_BATCH(ksp2); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - -static void -gen8_blorp_emit_ps_blend(struct brw_context *brw) -{ - BEGIN_BATCH(2); - OUT_BATCH(_3DSTATE_PS_BLEND << 16 | (2 - 2)); - OUT_BATCH(GEN8_PS_BLEND_HAS_WRITEABLE_RT); - ADVANCE_BATCH(); -} - -static void -gen8_blorp_emit_ps_extra(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - const struct brw_blorp_prog_data *prog_data = params->wm_prog_data; - uint32_t dw1 = 0; - - dw1 |= GEN8_PSX_PIXEL_SHADER_VALID; - - if (params->src.mt) { - dw1 |= GEN8_PSX_KILL_ENABLE; - dw1 |= GEN8_PSX_ATTRIBUTE_ENABLE; - } - - if (params->dst.num_samples > 1 && prog_data && - prog_data->persample_msaa_dispatch) - dw1 |= GEN8_PSX_SHADER_IS_PER_SAMPLE; - - BEGIN_BATCH(2); - OUT_BATCH(_3DSTATE_PS_EXTRA << 16 | (2 - 2)); - OUT_BATCH(dw1); - ADVANCE_BATCH(); -} - -static void -gen8_blorp_emit_depth_disable(struct brw_context *brw) -{ - /* Skip repeated NULL depth/stencil emits (think 2D rendering). */ - if (brw->no_depth_or_stencil) - return; - - brw_emit_depth_stall_flushes(brw); - - BEGIN_BATCH(8); - OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER << 16 | (8 - 2)); - OUT_BATCH((BRW_DEPTHFORMAT_D32_FLOAT << 18) | (BRW_SURFACE_NULL << 29)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); - - BEGIN_BATCH(5); - OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER << 16 | (5 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); - - BEGIN_BATCH(5); - OUT_BATCH(GEN7_3DSTATE_STENCIL_BUFFER << 16 | (5 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - -static void -gen8_blorp_emit_vf_topology(struct brw_context *brw) -{ - BEGIN_BATCH(2); - OUT_BATCH(_3DSTATE_VF_TOPOLOGY << 16 | (2 - 2)); - OUT_BATCH(_3DPRIM_RECTLIST); - ADVANCE_BATCH(); -} - -static void -gen8_blorp_emit_vf_sys_gen_vals_state(struct brw_context *brw) -{ - BEGIN_BATCH(2); - OUT_BATCH(_3DSTATE_VF_SGVS << 16 | (2 - 2)); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - -static void -gen8_blorp_emit_vf_instancing_state(struct brw_context *brw, - unsigned num_elems) -{ - for (unsigned i = 0; i < num_elems; ++i) { - BEGIN_BATCH(3); - OUT_BATCH(_3DSTATE_VF_INSTANCING << 16 | (3 - 2)); - OUT_BATCH(i); - OUT_BATCH(0); - ADVANCE_BATCH(); - } -} - -static void -gen8_blorp_emit_vf_state(struct brw_context *brw) -{ - BEGIN_BATCH(2); - OUT_BATCH(_3DSTATE_VF << 16 | (2 - 2)); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - -static void -gen8_blorp_emit_depth_stencil_state(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - const unsigned pkt_len = brw->gen >= 9 ? 4 : 3; - - BEGIN_BATCH(pkt_len); - OUT_BATCH(_3DSTATE_WM_DEPTH_STENCIL << 16 | (pkt_len - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - if (pkt_len > 3) { - OUT_BATCH(0); - } - ADVANCE_BATCH(); -} - -static void -gen8_blorp_emit_constant_ps(struct brw_context *brw, - uint32_t wm_push_const_offset) -{ - const int dwords = brw->gen >= 8 ? 11 : 7; - BEGIN_BATCH(dwords); - OUT_BATCH(_3DSTATE_CONSTANT_PS << 16 | (dwords - 2)); - - if (brw->gen >= 9) { - OUT_BATCH(0); - OUT_BATCH(BRW_BLORP_NUM_PUSH_CONST_REGS); - } else { - OUT_BATCH(BRW_BLORP_NUM_PUSH_CONST_REGS); - OUT_BATCH(0); - } - - if (brw->gen >= 9) { - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_RELOC64(brw->batch.bo, I915_GEM_DOMAIN_RENDER, 0, - wm_push_const_offset); - OUT_BATCH(0); - OUT_BATCH(0); - } else { - OUT_BATCH(wm_push_const_offset); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - } - - ADVANCE_BATCH(); -} - -static uint32_t -gen8_blorp_emit_surface_states(struct brw_context *brw, - const struct brw_blorp_params *params) -{ - uint32_t wm_surf_offset_renderbuffer; - uint32_t wm_surf_offset_texture = 0; - - intel_miptree_used_for_rendering(params->dst.mt); - - wm_surf_offset_renderbuffer = - gen8_blorp_emit_surface_state(brw, ¶ms->dst, - I915_GEM_DOMAIN_RENDER, - I915_GEM_DOMAIN_RENDER, - true /* is_render_target */); - if (params->src.mt) { - const struct brw_blorp_surface_info *surface = ¶ms->src; - struct intel_mipmap_tree *mt = surface->mt; - - /* If src is a 2D multisample array texture on Gen7+ using - * INTEL_MSAA_LAYOUT_UMS or INTEL_MSAA_LAYOUT_CMS, src layer is the - * physical layer holding sample 0. So, for example, if mt->num_samples - * == 4, then logical layer n corresponds to layer == 4*n. - * - * Multisampled depth and stencil surfaces have the samples interleaved - * (INTEL_MSAA_LAYOUT_IMS) and therefore the layer doesn't need - * adjustment. - */ - const unsigned layer_divider = - (mt->msaa_layout == INTEL_MSAA_LAYOUT_UMS || - mt->msaa_layout == INTEL_MSAA_LAYOUT_CMS) ? - MAX2(mt->num_samples, 1) : 1; - - /* Cube textures are sampled as 2D array. */ - const bool is_cube = mt->target == GL_TEXTURE_CUBE_MAP_ARRAY || - mt->target == GL_TEXTURE_CUBE_MAP; - const unsigned depth = (is_cube ? 6 : 1) * mt->logical_depth0; - const GLenum target = is_cube ? GL_TEXTURE_2D_ARRAY : mt->target; - const unsigned layer = mt->target != GL_TEXTURE_3D ? - surface->layer / layer_divider : 0; - - brw->vtbl.emit_texture_surface_state(brw, mt, target, - layer, depth, - surface->level, mt->last_level + 1, - surface->brw_surfaceformat, - surface->swizzle, - &wm_surf_offset_texture, - -1, false, false); - } - - return gen6_blorp_emit_binding_table(brw, - wm_surf_offset_renderbuffer, - wm_surf_offset_texture); -} - -/** - * \copydoc gen6_blorp_exec() - */ -void -gen8_blorp_exec(struct brw_context *brw, const struct brw_blorp_params *params) -{ - uint32_t wm_bind_bo_offset = 0; - - brw_upload_state_base_address(brw); - - gen7_blorp_emit_cc_viewport(brw); - gen7_l3_state.emit(brw); - - gen7_blorp_emit_urb_config(brw); - - const uint32_t cc_blend_state_offset = - gen8_blorp_emit_blend_state(brw, params); - gen7_blorp_emit_blend_state_pointer(brw, cc_blend_state_offset); - - const uint32_t cc_state_offset = gen6_blorp_emit_cc_state(brw); - gen7_blorp_emit_cc_state_pointer(brw, cc_state_offset); - - gen8_blorp_emit_disable_constant_state(brw, _3DSTATE_CONSTANT_VS); - gen8_blorp_emit_disable_constant_state(brw, _3DSTATE_CONSTANT_HS); - gen8_blorp_emit_disable_constant_state(brw, _3DSTATE_CONSTANT_DS); - gen8_blorp_emit_disable_constant_state(brw, _3DSTATE_CONSTANT_GS); - - const uint32_t wm_push_const_offset = - gen6_blorp_emit_wm_constants(brw, params); - gen8_blorp_emit_constant_ps(brw, wm_push_const_offset); - wm_bind_bo_offset = gen8_blorp_emit_surface_states(brw, params); - - gen8_blorp_emit_disable_binding_table(brw, - _3DSTATE_BINDING_TABLE_POINTERS_VS); - gen8_blorp_emit_disable_binding_table(brw, - _3DSTATE_BINDING_TABLE_POINTERS_HS); - gen8_blorp_emit_disable_binding_table(brw, - _3DSTATE_BINDING_TABLE_POINTERS_DS); - gen8_blorp_emit_disable_binding_table(brw, - _3DSTATE_BINDING_TABLE_POINTERS_GS); - - gen7_blorp_emit_binding_table_pointers_ps(brw, wm_bind_bo_offset); - - if (params->src.mt) { - const uint32_t sampler_offset = - gen6_blorp_emit_sampler_state(brw, BRW_MAPFILTER_LINEAR, 0, true); - gen7_blorp_emit_sampler_state_pointers_ps(brw, sampler_offset); - } - - gen8_emit_3dstate_multisample(brw, params->dst.num_samples); - gen6_emit_3dstate_sample_mask(brw, - params->dst.num_samples > 1 ? - (1 << params->dst.num_samples) - 1 : 1); - - gen8_disable_stages.emit(brw); - gen8_blorp_emit_vs_disable(brw); - gen8_blorp_emit_hs_disable(brw); - gen7_blorp_emit_te_disable(brw); - gen8_blorp_emit_ds_disable(brw); - gen8_blorp_emit_gs_disable(brw); - - gen8_blorp_emit_streamout_disable(brw); - gen6_blorp_emit_clip_disable(brw); - gen8_blorp_emit_raster_state(brw); - gen8_blorp_emit_sbe_state(brw, params); - gen8_blorp_emit_sf_config(brw); - - gen8_blorp_emit_ps_blend(brw); - gen8_blorp_emit_ps_extra(brw, params); - - gen8_blorp_emit_ps_config(brw, params); - - gen8_blorp_emit_depth_stencil_state(brw, params); - gen8_blorp_emit_wm_state(brw); - - gen8_blorp_emit_depth_disable(brw); - gen7_blorp_emit_clear_params(brw, params); - gen6_blorp_emit_drawing_rectangle(brw, params); - gen8_blorp_emit_vf_topology(brw); - gen8_blorp_emit_vf_sys_gen_vals_state(brw); - gen6_blorp_emit_vertices(brw, params); - gen8_blorp_emit_vf_instancing_state(brw, 2); - gen8_blorp_emit_vf_state(brw); - gen7_blorp_emit_primitive(brw, params); - - if (brw->gen < 9) - gen8_write_pma_stall_bits(brw, 0); -} diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_depth_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_depth_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_depth_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_depth_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -93,10 +93,10 @@ assert(depth_mt); BEGIN_BATCH(5); OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER << 16 | (5 - 2)); - OUT_BATCH((depth_mt->hiz_buf->pitch - 1) | mocs_wb << 25); - OUT_RELOC64(depth_mt->hiz_buf->bo, + OUT_BATCH((depth_mt->hiz_buf->aux_base.pitch - 1) | mocs_wb << 25); + OUT_RELOC64(depth_mt->hiz_buf->aux_base.bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); - OUT_BATCH(depth_mt->hiz_buf->qpitch >> 2); + OUT_BATCH(depth_mt->hiz_buf->aux_base.qpitch >> 2); ADVANCE_BATCH(); } @@ -218,7 +218,7 @@ } emit_depth_packets(brw, depth_mt, brw_depthbuffer_format(brw), surftype, - ctx->Depth.Mask != 0, + brw_depth_writes_enabled(brw), stencil_mt, ctx->Stencil._WriteEnabled, hiz, width, height, depth, lod, min_array_element); } @@ -236,6 +236,9 @@ pma_fix_enable(const struct brw_context *brw) { const struct gl_context *ctx = &brw->ctx; + /* BRW_NEW_FS_PROG_DATA */ + const struct brw_wm_prog_data *wm_prog_data = + brw_wm_prog_data(brw->wm.base.prog_data); /* _NEW_BUFFERS */ struct intel_renderbuffer *depth_irb = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH); @@ -252,10 +255,8 @@ */ const bool hiz_enabled = depth_irb && intel_renderbuffer_has_hiz(depth_irb); - /* BRW_NEW_FS_PROG_DATA: - * 3DSTATE_WM::Early Depth/Stencil Control != EDSC_PREPS (2). - */ - const bool edsc_not_preps = !brw->wm.prog_data->early_fragment_tests; + /* 3DSTATE_WM::Early Depth/Stencil Control != EDSC_PREPS (2). */ + const bool edsc_not_preps = !wm_prog_data->early_fragment_tests; /* 3DSTATE_PS_EXTRA::PixelShaderValid is always true. */ const bool pixel_shader_valid = true; @@ -279,7 +280,7 @@ * 3DSTATE_WM_DEPTH_STENCIL::DepthWriteEnable && * 3DSTATE_DEPTH_BUFFER::DEPTH_WRITE_ENABLE. */ - const bool depth_writes_enabled = ctx->Depth.Mask; + const bool depth_writes_enabled = brw_depth_writes_enabled(brw); /* _NEW_STENCIL: * !DEPTH_STENCIL_STATE::Stencil Buffer Write Enable || @@ -288,25 +289,25 @@ */ const bool stencil_writes_enabled = ctx->Stencil._WriteEnabled; - /* BRW_NEW_FS_PROG_DATA: - * 3DSTATE_PS_EXTRA::Pixel Shader Computed Depth Mode != PSCDEPTH_OFF - */ + /* 3DSTATE_PS_EXTRA::Pixel Shader Computed Depth Mode != PSCDEPTH_OFF */ const bool ps_computes_depth = - brw->wm.prog_data->computed_depth_mode != BRW_PSCDEPTH_OFF; + wm_prog_data->computed_depth_mode != BRW_PSCDEPTH_OFF; - /* BRW_NEW_FS_PROG_DATA: 3DSTATE_PS_EXTRA::PixelShaderKillsPixels - * BRW_NEW_FS_PROG_DATA: 3DSTATE_PS_EXTRA::oMask Present to RenderTarget + /* BRW_NEW_FS_PROG_DATA: 3DSTATE_PS_EXTRA::PixelShaderKillsPixels + * BRW_NEW_FS_PROG_DATA: 3DSTATE_PS_EXTRA::oMask Present to RenderTarget * _NEW_MULTISAMPLE: 3DSTATE_PS_BLEND::AlphaToCoverageEnable * _NEW_COLOR: 3DSTATE_PS_BLEND::AlphaTestEnable + * _NEW_BUFFERS: 3DSTATE_PS_BLEND::AlphaTestEnable + * 3DSTATE_PS_BLEND::AlphaToCoverageEnable * * 3DSTATE_WM_CHROMAKEY::ChromaKeyKillEnable is always false. * 3DSTATE_WM::ForceKillPix != ForceOff is always true. */ const bool kill_pixel = - brw->wm.prog_data->uses_kill || - brw->wm.prog_data->uses_omask || - (_mesa_is_multisample_enabled(ctx) && ctx->Multisample.SampleAlphaToCoverage) || - ctx->Color.AlphaEnabled; + wm_prog_data->uses_kill || + wm_prog_data->uses_omask || + _mesa_is_alpha_test_enabled(ctx) || + _mesa_is_alpha_to_coverage_enabled(ctx); /* The big formula in CACHE_MODE_1::NP PMA FIX ENABLE. */ return !wm_force_thread_dispatch && @@ -398,9 +399,9 @@ */ void gen8_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt, - unsigned int level, unsigned int layer, enum gen6_hiz_op op) + unsigned int level, unsigned int layer, enum blorp_hiz_op op) { - if (op == GEN6_HIZ_OP_NONE) + if (op == BLORP_HIZ_OP_NONE) return; /* Disable the PMA stall fix since we're about to do a HiZ operation. */ @@ -468,16 +469,28 @@ uint32_t dw1 = 0; switch (op) { - case GEN6_HIZ_OP_DEPTH_RESOLVE: + case BLORP_HIZ_OP_DEPTH_RESOLVE: dw1 |= GEN8_WM_HZ_DEPTH_RESOLVE; break; - case GEN6_HIZ_OP_HIZ_RESOLVE: + case BLORP_HIZ_OP_HIZ_RESOLVE: dw1 |= GEN8_WM_HZ_HIZ_RESOLVE; break; - case GEN6_HIZ_OP_DEPTH_CLEAR: + case BLORP_HIZ_OP_DEPTH_CLEAR: dw1 |= GEN8_WM_HZ_DEPTH_CLEAR; + + /* The "Clear Rectangle X Max" (and Y Max) fields are exclusive, + * rather than inclusive, and limited to 16383. This means that + * for a 16384x16384 render target, we would miss the last row + * or column of pixels along the edge. + * + * To work around this, we have to set the "Full Surface Depth + * and Stencil Clear" bit. We can do this in all cases because + * we always clear the full rectangle anyway. We'll need to + * change this if we ever add scissored clear support. + */ + dw1 |= GEN8_WM_HZ_FULL_SURFACE_DEPTH_CLEAR; break; - case GEN6_HIZ_OP_NONE: + case BLORP_HIZ_OP_NONE: unreachable("Should not get here."); } @@ -510,6 +523,22 @@ OUT_BATCH(0); ADVANCE_BATCH(); + /* + * From the Broadwell PRM, volume 7, "Depth Buffer Clear": + * + * Depth buffer clear pass using any of the methods (WM_STATE, 3DSTATE_WM + * or 3DSTATE_WM_HZ_OP) must be followed by a PIPE_CONTROL command with + * DEPTH_STALL bit and Depth FLUSH bits "set" before starting to render. + * DepthStall and DepthFlush are not needed between consecutive depth + * clear passes nor is it required if th e depth clear pass was done with + * "full_surf_clear" bit set in the 3DSTATE_WM_HZ_OP. + * + * TODO: Such as the spec says, this could be conditional. + */ + brw_emit_pipe_control_flush(brw, + PIPE_CONTROL_DEPTH_CACHE_FLUSH | + PIPE_CONTROL_DEPTH_STALL); + /* Mark this buffer as needing a TC flush, as we've rendered to it. */ brw_render_cache_set_add_bo(brw, mt->bo); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_disable.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_disable.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_disable.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_disable.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,53 +0,0 @@ -/* - * Copyright © 2011 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - -#include "brw_context.h" -#include "brw_state.h" -#include "brw_defines.h" -#include "intel_batchbuffer.h" - -static void -disable_stages(struct brw_context *brw) -{ - BEGIN_BATCH(5); - OUT_BATCH(_3DSTATE_WM_HZ_OP << 16 | (5 - 2)); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - OUT_BATCH(0); - ADVANCE_BATCH(); - - BEGIN_BATCH(2); - OUT_BATCH(_3DSTATE_WM_CHROMAKEY << 16 | (2 - 2)); - OUT_BATCH(0); - ADVANCE_BATCH(); -} - -const struct brw_tracked_state gen8_disable_stages = { - .dirty = { - .mesa = 0, - .brw = BRW_NEW_BLORP | - BRW_NEW_CONTEXT, - }, - .emit = disable_stages, -}; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_draw_upload.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_draw_upload.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_draw_upload.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_draw_upload.c 2017-06-01 10:37:10.000000000 +0000 @@ -34,6 +34,7 @@ #include "intel_batchbuffer.h" #include "intel_buffer_objects.h" +#ifndef NDEBUG static bool is_passthru_format(uint32_t format) { @@ -47,12 +48,12 @@ return false; } } +#endif static void gen8_emit_vertices(struct brw_context *brw) { struct gl_context *ctx = &brw->ctx; - uint32_t mocs_wb = brw->gen >= 9 ? SKL_MOCS_WB : BDW_MOCS_WB; bool uses_edge_flag; brw_prepare_vertices(brw); @@ -61,7 +62,10 @@ uses_edge_flag = (ctx->Polygon.FrontMode != GL_FILL || ctx->Polygon.BackMode != GL_FILL); - if (brw->vs.prog_data->uses_vertexid || brw->vs.prog_data->uses_instanceid) { + const struct brw_vs_prog_data *vs_prog_data = + brw_vs_prog_data(brw->vs.base.prog_data); + + if (vs_prog_data->uses_vertexid || vs_prog_data->uses_instanceid) { unsigned vue = brw->vb.nr_enabled; /* The element for the edge flags must always be last, so we have to @@ -77,13 +81,13 @@ "need to reorder the vertex attrbutes."); unsigned dw1 = 0; - if (brw->vs.prog_data->uses_vertexid) { + if (vs_prog_data->uses_vertexid) { dw1 |= GEN8_SGVS_ENABLE_VERTEX_ID | (2 << GEN8_SGVS_VERTEX_ID_COMPONENT_SHIFT) | /* .z channel */ (vue << GEN8_SGVS_VERTEX_ID_ELEMENT_OFFSET_SHIFT); } - if (brw->vs.prog_data->uses_instanceid) { + if (vs_prog_data->uses_instanceid) { dw1 |= GEN8_SGVS_ENABLE_INSTANCE_ID | (3 << GEN8_SGVS_INSTANCE_ID_COMPONENT_SHIFT) | /* .w channel */ (vue << GEN8_SGVS_INSTANCE_ID_ELEMENT_OFFSET_SHIFT); @@ -106,6 +110,22 @@ ADVANCE_BATCH(); } + /* Normally we don't need an element for the SGVS attribute because the + * 3DSTATE_VF_SGVS instruction lets you store the generated attribute in an + * element that is past the list in 3DSTATE_VERTEX_ELEMENTS. However if + * we're using draw parameters then we need an element for the those + * values. Additionally if there is an edge flag element then the SGVS + * can't be inserted past that so we need a dummy element to ensure that + * the edge flag is the last one. + */ + const bool needs_sgvs_element = (vs_prog_data->uses_basevertex || + vs_prog_data->uses_baseinstance || + ((vs_prog_data->uses_instanceid || + vs_prog_data->uses_vertexid) && + uses_edge_flag)); + const unsigned nr_elements = + brw->vb.nr_enabled + needs_sgvs_element + vs_prog_data->uses_drawid; + /* If the VS doesn't read any inputs (calculating vertex position from * a state variable for some reason, for example), emit a single pad * VERTEX_ELEMENT struct and bail. @@ -113,7 +133,7 @@ * The stale VB state stays in place, but they don't do anything unless * a VE loads from them. */ - if (brw->vb.nr_enabled == 0) { + if (nr_elements == 0) { BEGIN_BATCH(3); OUT_BATCH((_3DSTATE_VERTEX_ELEMENTS << 16) | (3 - 2)); OUT_BATCH((0 << GEN6_VE0_INDEX_SHIFT) | @@ -130,10 +150,10 @@ /* Now emit 3DSTATE_VERTEX_BUFFERS and 3DSTATE_VERTEX_ELEMENTS packets. */ const bool uses_draw_params = - brw->vs.prog_data->uses_basevertex || - brw->vs.prog_data->uses_baseinstance; + vs_prog_data->uses_basevertex || + vs_prog_data->uses_baseinstance; const unsigned nr_buffers = brw->vb.nr_buffers + - uses_draw_params + brw->vs.prog_data->uses_drawid; + uses_draw_params + vs_prog_data->uses_drawid; if (nr_buffers) { assert(nr_buffers <= 33); @@ -141,55 +161,33 @@ BEGIN_BATCH(1 + 4 * nr_buffers); OUT_BATCH((_3DSTATE_VERTEX_BUFFERS << 16) | (4 * nr_buffers - 1)); for (unsigned i = 0; i < brw->vb.nr_buffers; i++) { - struct brw_vertex_buffer *buffer = &brw->vb.buffers[i]; - uint32_t dw0 = 0; - - dw0 |= i << GEN6_VB0_INDEX_SHIFT; - dw0 |= GEN7_VB0_ADDRESS_MODIFYENABLE; - dw0 |= buffer->stride << BRW_VB0_PITCH_SHIFT; - dw0 |= mocs_wb << 16; - - OUT_BATCH(dw0); - OUT_RELOC64(buffer->bo, I915_GEM_DOMAIN_VERTEX, 0, buffer->offset); - OUT_BATCH(buffer->size); + const struct brw_vertex_buffer *buffer = &brw->vb.buffers[i]; + EMIT_VERTEX_BUFFER_STATE(brw, i, buffer->bo, + buffer->offset, + buffer->offset + buffer->size, + buffer->stride, 0 /* unused */); } if (uses_draw_params) { - OUT_BATCH(brw->vb.nr_buffers << GEN6_VB0_INDEX_SHIFT | - GEN7_VB0_ADDRESS_MODIFYENABLE | - mocs_wb << 16); - OUT_RELOC64(brw->draw.draw_params_bo, I915_GEM_DOMAIN_VERTEX, 0, - brw->draw.draw_params_offset); - OUT_BATCH(brw->draw.draw_params_bo->size); + EMIT_VERTEX_BUFFER_STATE(brw, brw->vb.nr_buffers, + brw->draw.draw_params_bo, + brw->draw.draw_params_offset, + brw->draw.draw_params_bo->size, + 0 /* stride */, + 0 /* unused */); } - if (brw->vs.prog_data->uses_drawid) { - OUT_BATCH((brw->vb.nr_buffers + 1) << GEN6_VB0_INDEX_SHIFT | - GEN7_VB0_ADDRESS_MODIFYENABLE | - mocs_wb << 16); - OUT_RELOC64(brw->draw.draw_id_bo, I915_GEM_DOMAIN_VERTEX, 0, - brw->draw.draw_id_offset); - OUT_BATCH(brw->draw.draw_id_bo->size); + if (vs_prog_data->uses_drawid) { + EMIT_VERTEX_BUFFER_STATE(brw, brw->vb.nr_buffers + 1, + brw->draw.draw_id_bo, + brw->draw.draw_id_offset, + brw->draw.draw_id_bo->size, + 0 /* stride */, + 0 /* unused */); } ADVANCE_BATCH(); } - /* Normally we don't need an element for the SGVS attribute because the - * 3DSTATE_VF_SGVS instruction lets you store the generated attribute in an - * element that is past the list in 3DSTATE_VERTEX_ELEMENTS. However if - * we're using draw parameters then we need an element for the those - * values. Additionally if there is an edge flag element then the SGVS - * can't be inserted past that so we need a dummy element to ensure that - * the edge flag is the last one. - */ - const bool needs_sgvs_element = (brw->vs.prog_data->uses_basevertex || - brw->vs.prog_data->uses_baseinstance || - ((brw->vs.prog_data->uses_instanceid || - brw->vs.prog_data->uses_vertexid) && - uses_edge_flag)); - const unsigned nr_elements = - brw->vb.nr_enabled + needs_sgvs_element + brw->vs.prog_data->uses_drawid; - /* The hardware allows one more VERTEX_ELEMENTS than VERTEX_BUFFERS, * presumably for VertexID/InstanceID. */ @@ -232,8 +230,15 @@ case 0: comp0 = BRW_VE1_COMPONENT_STORE_0; case 1: comp1 = BRW_VE1_COMPONENT_STORE_0; case 2: comp2 = BRW_VE1_COMPONENT_STORE_0; - case 3: comp3 = input->glarray->Integer ? BRW_VE1_COMPONENT_STORE_1_INT - : BRW_VE1_COMPONENT_STORE_1_FLT; + case 3: + if (input->glarray->Doubles) { + comp3 = BRW_VE1_COMPONENT_STORE_0; + } else if (input->glarray->Integer) { + comp3 = BRW_VE1_COMPONENT_STORE_1_INT; + } else { + comp3 = BRW_VE1_COMPONENT_STORE_1_FLT; + } + break; } @@ -252,24 +257,12 @@ * to be specified as VFCOMP_STORE_0 in order to output a 256-bit vertex * element." */ - if (input->glarray->Doubles) { - switch (input->glarray->Size) { - case 0: - case 1: - case 2: - /* Use 128-bits instead of 256-bits to write double and dvec2 - * vertex elements. - */ - comp2 = BRW_VE1_COMPONENT_NOSTORE; - comp3 = BRW_VE1_COMPONENT_NOSTORE; - break; - case 3: - /* Pad the output using VFCOMP_STORE_0 as suggested - * by the BDW PRM. - */ - comp3 = BRW_VE1_COMPONENT_STORE_0; - break; - } + if (input->glarray->Doubles && !input->is_dual_slot) { + /* Store vertex elements which correspond to double and dvec2 vertex + * shader inputs as 128-bit vertex elements, instead of 256-bits. + */ + comp2 = BRW_VE1_COMPONENT_NOSTORE; + comp3 = BRW_VE1_COMPONENT_NOSTORE; } OUT_BATCH((input->buffer << GEN6_VE0_INDEX_SHIFT) | @@ -284,8 +277,8 @@ } if (needs_sgvs_element) { - if (brw->vs.prog_data->uses_basevertex || - brw->vs.prog_data->uses_baseinstance) { + if (vs_prog_data->uses_basevertex || + vs_prog_data->uses_baseinstance) { OUT_BATCH(GEN6_VE0_VALID | brw->vb.nr_buffers << GEN6_VE0_INDEX_SHIFT | BRW_SURFACEFORMAT_R32G32_UINT << BRW_VE0_FORMAT_SHIFT); @@ -302,7 +295,7 @@ } } - if (brw->vs.prog_data->uses_drawid) { + if (vs_prog_data->uses_drawid) { OUT_BATCH(GEN6_VE0_VALID | ((brw->vb.nr_buffers + 1) << GEN6_VE0_INDEX_SHIFT) | (BRW_SURFACEFORMAT_R32_UINT << BRW_VE0_FORMAT_SHIFT)); @@ -350,7 +343,7 @@ ADVANCE_BATCH(); } - if (brw->vs.prog_data->uses_drawid) { + if (vs_prog_data->uses_drawid) { const unsigned element = brw->vb.nr_enabled + needs_sgvs_element; BEGIN_BATCH(3); OUT_BATCH(_3DSTATE_VF_INSTANCING << 16 | (3 - 2)); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_ds_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_ds_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_ds_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_ds_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -29,15 +29,17 @@ static void gen8_upload_ds_state(struct brw_context *brw) { - struct gl_context *ctx = &brw->ctx; + const struct gen_device_info *devinfo = &brw->screen->devinfo; const struct brw_stage_state *stage_state = &brw->tes.base; /* BRW_NEW_TESS_PROGRAMS */ bool active = brw->tess_eval_program; /* BRW_NEW_TES_PROG_DATA */ - const struct brw_tes_prog_data *tes_prog_data = brw->tes.prog_data; - const struct brw_vue_prog_data *vue_prog_data = &tes_prog_data->base; - const struct brw_stage_prog_data *prog_data = &vue_prog_data->base; + const struct brw_stage_prog_data *prog_data = stage_state->prog_data; + const struct brw_vue_prog_data *vue_prog_data = + brw_vue_prog_data(stage_state->prog_data); + const struct brw_tes_prog_data *tes_prog_data = + brw_tes_prog_data(stage_state->prog_data); const int ds_pkt_len = brw->gen >= 9 ? 11 : 9; if (active) { @@ -64,15 +66,12 @@ OUT_BATCH(GEN7_DS_ENABLE | GEN7_DS_STATISTICS_ENABLE | - (brw->max_ds_threads - 1) << HSW_DS_MAX_THREADS_SHIFT | + (devinfo->max_tes_threads - 1) << HSW_DS_MAX_THREADS_SHIFT | (vue_prog_data->dispatch_mode == DISPATCH_MODE_SIMD8 ? GEN7_DS_SIMD8_DISPATCH_ENABLE : 0) | (tes_prog_data->domain == BRW_TESS_DOMAIN_TRI ? GEN7_DS_COMPUTE_W_COORDINATE_ENABLE : 0)); - /* _NEW_TRANSFORM */ - OUT_BATCH(SET_FIELD(ctx->Transform.ClipPlanesEnabled, - GEN8_DS_USER_CLIP_DISTANCE) | - SET_FIELD(vue_prog_data->cull_distance_mask, + OUT_BATCH(SET_FIELD(vue_prog_data->cull_distance_mask, GEN8_DS_USER_CULL_DISTANCE)); @@ -107,7 +106,7 @@ const struct brw_tracked_state gen8_ds_state = { .dirty = { - .mesa = _NEW_TRANSFORM, + .mesa = 0, .brw = BRW_NEW_BATCH | BRW_NEW_BLORP | BRW_NEW_TESS_PROGRAMS | diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_gs_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_gs_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_gs_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_gs_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -29,17 +29,21 @@ static void gen8_upload_gs_state(struct brw_context *brw) { - struct gl_context *ctx = &brw->ctx; + const struct gen_device_info *devinfo = &brw->screen->devinfo; const struct brw_stage_state *stage_state = &brw->gs.base; /* BRW_NEW_GEOMETRY_PROGRAM */ bool active = brw->geometry_program; /* BRW_NEW_GS_PROG_DATA */ - const struct brw_vue_prog_data *prog_data = &brw->gs.prog_data->base; + const struct brw_stage_prog_data *prog_data = stage_state->prog_data; + const struct brw_vue_prog_data *vue_prog_data = + brw_vue_prog_data(stage_state->prog_data); + const struct brw_gs_prog_data *gs_prog_data = + brw_gs_prog_data(stage_state->prog_data); if (active) { int urb_entry_write_offset = 1; uint32_t urb_entry_output_length = - ((prog_data->vue_map.num_slots + 1) / 2 - urb_entry_write_offset); + ((vue_prog_data->vue_map.num_slots + 1) / 2 - urb_entry_write_offset); if (urb_entry_output_length == 0) urb_entry_output_length = 1; @@ -48,13 +52,13 @@ OUT_BATCH(_3DSTATE_GS << 16 | (10 - 2)); OUT_BATCH(stage_state->prog_offset); OUT_BATCH(0); - OUT_BATCH(brw->gs.prog_data->vertices_in | + OUT_BATCH(gs_prog_data->vertices_in | ((ALIGN(stage_state->sampler_count, 4)/4) << GEN6_GS_SAMPLER_COUNT_SHIFT) | - ((prog_data->base.binding_table.size_bytes / 4) << + ((prog_data->binding_table.size_bytes / 4) << GEN6_GS_BINDING_TABLE_ENTRY_COUNT_SHIFT)); - if (brw->gs.prog_data->base.base.total_scratch) { + if (prog_data->total_scratch) { OUT_RELOC64(stage_state->scratch_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, ffs(stage_state->per_thread_scratch) - 11); @@ -64,42 +68,42 @@ } /* DW6 */ - OUT_BATCH(((brw->gs.prog_data->output_vertex_size_hwords * 2 - 1) << + OUT_BATCH(((gs_prog_data->output_vertex_size_hwords * 2 - 1) << GEN7_GS_OUTPUT_VERTEX_SIZE_SHIFT) | - (brw->gs.prog_data->output_topology << + (gs_prog_data->output_topology << GEN7_GS_OUTPUT_TOPOLOGY_SHIFT) | - (prog_data->include_vue_handles ? + (vue_prog_data->include_vue_handles ? GEN7_GS_INCLUDE_VERTEX_HANDLES : 0) | - (prog_data->urb_read_length << + (vue_prog_data->urb_read_length << GEN6_GS_URB_READ_LENGTH_SHIFT) | (0 << GEN6_GS_URB_ENTRY_READ_OFFSET_SHIFT) | - (prog_data->base.dispatch_grf_start_reg << + (prog_data->dispatch_grf_start_reg << GEN6_GS_DISPATCH_START_GRF_SHIFT)); - uint32_t dw7 = (brw->gs.prog_data->control_data_header_size_hwords << + uint32_t dw7 = (gs_prog_data->control_data_header_size_hwords << GEN7_GS_CONTROL_DATA_HEADER_SIZE_SHIFT) | - SET_FIELD(prog_data->dispatch_mode, + SET_FIELD(vue_prog_data->dispatch_mode, GEN7_GS_DISPATCH_MODE) | - ((brw->gs.prog_data->invocations - 1) << + ((gs_prog_data->invocations - 1) << GEN7_GS_INSTANCE_CONTROL_SHIFT) | GEN6_GS_STATISTICS_ENABLE | - (brw->gs.prog_data->include_primitive_id ? + (gs_prog_data->include_primitive_id ? GEN7_GS_INCLUDE_PRIMITIVE_ID : 0) | GEN7_GS_REORDER_TRAILING | GEN7_GS_ENABLE; - uint32_t dw8 = brw->gs.prog_data->control_data_format << + uint32_t dw8 = gs_prog_data->control_data_format << HSW_GS_CONTROL_DATA_FORMAT_SHIFT; - if (brw->gs.prog_data->static_vertex_count != -1) { + if (gs_prog_data->static_vertex_count != -1) { dw8 |= GEN8_GS_STATIC_OUTPUT | - SET_FIELD(brw->gs.prog_data->static_vertex_count, + SET_FIELD(gs_prog_data->static_vertex_count, GEN8_GS_STATIC_VERTEX_COUNT); } if (brw->gen < 9) - dw7 |= (brw->max_gs_threads / 2 - 1) << HSW_GS_MAX_THREADS_SHIFT; + dw7 |= (devinfo->max_gs_threads / 2 - 1) << HSW_GS_MAX_THREADS_SHIFT; else - dw8 |= brw->max_gs_threads - 1; + dw8 |= devinfo->max_gs_threads - 1; /* DW7 */ OUT_BATCH(dw7); @@ -107,10 +111,8 @@ /* DW8 */ OUT_BATCH(dw8); - /* DW9 / _NEW_TRANSFORM */ - OUT_BATCH((prog_data->cull_distance_mask | - ctx->Transform.ClipPlanesEnabled << - GEN8_GS_USER_CLIP_DISTANCE_SHIFT) | + /* DW9 */ + OUT_BATCH(vue_prog_data->cull_distance_mask | (urb_entry_output_length << GEN8_GS_URB_OUTPUT_LENGTH_SHIFT) | (urb_entry_write_offset << GEN8_GS_URB_ENTRY_OUTPUT_OFFSET_SHIFT)); @@ -133,7 +135,7 @@ const struct brw_tracked_state gen8_gs_state = { .dirty = { - .mesa = _NEW_TRANSFORM, + .mesa = 0, .brw = BRW_NEW_BATCH | BRW_NEW_BLORP | BRW_NEW_CONTEXT | diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_hs_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_hs_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_hs_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_hs_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -29,27 +29,30 @@ static void gen8_upload_hs_state(struct brw_context *brw) { + const struct gen_device_info *devinfo = &brw->screen->devinfo; const struct brw_stage_state *stage_state = &brw->tcs.base; /* BRW_NEW_TESS_PROGRAMS */ bool active = brw->tess_eval_program; - /* BRW_NEW_HS_PROG_DATA */ - const struct brw_vue_prog_data *prog_data = &brw->tcs.prog_data->base; + /* BRW_NEW_TCS_PROG_DATA */ + const struct brw_stage_prog_data *prog_data = stage_state->prog_data; + const struct brw_tcs_prog_data *tcs_prog_data = + brw_tcs_prog_data(stage_state->prog_data); if (active) { BEGIN_BATCH(9); OUT_BATCH(_3DSTATE_HS << 16 | (9 - 2)); OUT_BATCH(SET_FIELD(DIV_ROUND_UP(stage_state->sampler_count, 4), GEN7_HS_SAMPLER_COUNT) | - SET_FIELD(prog_data->base.binding_table.size_bytes / 4, + SET_FIELD(prog_data->binding_table.size_bytes / 4, GEN7_HS_BINDING_TABLE_ENTRY_COUNT)); OUT_BATCH(GEN7_HS_ENABLE | GEN7_HS_STATISTICS_ENABLE | - (brw->max_hs_threads - 1) << GEN8_HS_MAX_THREADS_SHIFT | - SET_FIELD(brw->tcs.prog_data->instances - 1, + (devinfo->max_tcs_threads - 1) << GEN8_HS_MAX_THREADS_SHIFT | + SET_FIELD(tcs_prog_data->instances - 1, GEN7_HS_INSTANCE_COUNT)); OUT_BATCH(stage_state->prog_offset); OUT_BATCH(0); - if (prog_data->base.total_scratch) { + if (prog_data->total_scratch) { OUT_RELOC64(stage_state->scratch_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, ffs(stage_state->per_thread_scratch) - 11); @@ -58,7 +61,7 @@ OUT_BATCH(0); } OUT_BATCH(GEN7_HS_INCLUDE_VERTEX_HANDLES | - SET_FIELD(prog_data->base.dispatch_grf_start_reg, + SET_FIELD(prog_data->dispatch_grf_start_reg, GEN7_HS_DISPATCH_START_GRF)); OUT_BATCH(0); /* MBZ */ ADVANCE_BATCH(); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_ps_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_ps_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_ps_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_ps_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -53,11 +53,19 @@ if (prog_data->persample_dispatch) dw1 |= GEN8_PSX_SHADER_IS_PER_SAMPLE; + /* _NEW_MULTISAMPLE | BRW_NEW_CONSERVATIVE_RASTERIZATION */ if (prog_data->uses_sample_mask) { - if (brw->gen >= 9) - dw1 |= BRW_PSICMS_INNER << GEN9_PSX_SHADER_NORMAL_COVERAGE_MASK_SHIFT; - else + if (brw->gen >= 9) { + if (prog_data->post_depth_coverage) + dw1 |= BRW_PCICMS_DEPTH << GEN9_PSX_SHADER_NORMAL_COVERAGE_MASK_SHIFT; + else if (prog_data->inner_coverage && ctx->IntelConservativeRasterization) + dw1 |= BRW_PSICMS_INNER << GEN9_PSX_SHADER_NORMAL_COVERAGE_MASK_SHIFT; + else + dw1 |= BRW_PSICMS_NORMAL << GEN9_PSX_SHADER_NORMAL_COVERAGE_MASK_SHIFT; + } + else { dw1 |= GEN8_PSX_SHADER_USES_INPUT_COVERAGE_MASK; + } } if (prog_data->uses_omask) @@ -95,8 +103,8 @@ * * BRW_NEW_FS_PROG_DATA | BRW_NEW_FRAGMENT_PROGRAM | _NEW_BUFFERS | _NEW_COLOR */ - if ((_mesa_active_fragment_shader_has_side_effects(ctx) || - prog_data->uses_kill) && !brw_color_buffer_write_enabled(brw)) + if ((prog_data->has_side_effects || prog_data->uses_kill) && + !brw_color_buffer_write_enabled(brw)) dw1 |= GEN8_PSX_SHADER_HAS_UAV; if (prog_data->computed_stencil) { @@ -114,9 +122,7 @@ upload_ps_extra(struct brw_context *brw) { /* BRW_NEW_FS_PROG_DATA */ - const struct brw_wm_prog_data *prog_data = brw->wm.prog_data; - - gen8_upload_ps_extra(brw, prog_data); + gen8_upload_ps_extra(brw, brw_wm_prog_data(brw->wm.base.prog_data)); } const struct brw_tracked_state gen8_ps_extra = { @@ -125,7 +131,8 @@ .brw = BRW_NEW_BLORP | BRW_NEW_CONTEXT | BRW_NEW_FRAGMENT_PROGRAM | - BRW_NEW_FS_PROG_DATA, + BRW_NEW_FS_PROG_DATA | + BRW_NEW_CONSERVATIVE_RASTERIZATION, }, .emit = upload_ps_extra, }; @@ -136,6 +143,10 @@ struct gl_context *ctx = &brw->ctx; uint32_t dw1 = 0; + /* BRW_NEW_FS_PROG_DATA */ + const struct brw_wm_prog_data *wm_prog_data = + brw_wm_prog_data(brw->wm.base.prog_data); + dw1 |= GEN7_WM_STATISTICS_ENABLE; dw1 |= GEN7_WM_LINE_AA_WIDTH_1_0; dw1 |= GEN7_WM_LINE_END_CAP_AA_WIDTH_0_5; @@ -149,14 +160,13 @@ if (ctx->Polygon.StippleFlag) dw1 |= GEN7_WM_POLYGON_STIPPLE_ENABLE; - /* BRW_NEW_FS_PROG_DATA */ - dw1 |= brw->wm.prog_data->barycentric_interp_modes << + dw1 |= wm_prog_data->barycentric_interp_modes << GEN7_WM_BARYCENTRIC_INTERPOLATION_MODE_SHIFT; /* BRW_NEW_FS_PROG_DATA */ - if (brw->wm.prog_data->early_fragment_tests) + if (wm_prog_data->early_fragment_tests) dw1 |= GEN7_WM_EARLY_DS_CONTROL_PREPS; - else if (_mesa_active_fragment_shader_has_side_effects(&brw->ctx)) + else if (wm_prog_data->has_side_effects) dw1 |= GEN7_WM_EARLY_DS_CONTROL_PSEXEC; BEGIN_BATCH(2); @@ -275,7 +285,8 @@ upload_ps_state(struct brw_context *brw) { /* BRW_NEW_FS_PROG_DATA */ - const struct brw_wm_prog_data *prog_data = brw->wm.prog_data; + const struct brw_wm_prog_data *prog_data = + brw_wm_prog_data(brw->wm.base.prog_data); gen8_upload_ps_state(brw, &brw->wm.base, prog_data, brw->wm.fast_clear_op); } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_sf_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_sf_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_sf_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_sf_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -21,6 +21,7 @@ * IN THE SOFTWARE. */ +#include "compiler/nir/nir.h" #include "brw_context.h" #include "brw_state.h" #include "brw_defines.h" @@ -34,7 +35,9 @@ { struct gl_context *ctx = &brw->ctx; /* BRW_NEW_FS_PROG_DATA */ - uint32_t num_outputs = brw->wm.prog_data->num_varying_inputs; + const struct brw_wm_prog_data *wm_prog_data = + brw_wm_prog_data(brw->wm.base.prog_data); + uint32_t num_outputs = wm_prog_data->num_varying_inputs; uint16_t attr_overrides[VARYING_SLOT_MAX]; uint32_t urb_entry_read_length; uint32_t urb_entry_read_offset; @@ -60,8 +63,10 @@ else dw1 |= GEN6_SF_POINT_SPRITE_UPPERLEFT; - /* BRW_NEW_VUE_MAP_GEOM_OUT | BRW_NEW_FRAGMENT_PROGRAM | - * _NEW_POINT | _NEW_LIGHT | _NEW_PROGRAM | BRW_NEW_FS_PROG_DATA + /* _NEW_POINT | _NEW_LIGHT | _NEW_PROGRAM, + * BRW_NEW_FS_PROG_DATA | BRW_NEW_FRAGMENT_PROGRAM | + * BRW_NEW_GS_PROG_DATA | BRW_NEW_PRIMITIVE | BRW_NEW_TES_PROG_DATA | + * BRW_NEW_VUE_MAP_GEOM_OUT */ calculate_attr_overrides(brw, attr_overrides, &point_sprite_enables, @@ -90,8 +95,10 @@ /* prepare the active component dwords */ int input_index = 0; for (int attr = 0; attr < VARYING_SLOT_MAX; attr++) { - if (!(brw->fragment_program->Base.InputsRead & BITFIELD64_BIT(attr))) + if (!(brw->fragment_program->info.inputs_read & + BITFIELD64_BIT(attr))) { continue; + } assert(input_index < 32); @@ -107,7 +114,7 @@ OUT_BATCH(_3DSTATE_SBE << 16 | (sbe_cmd_length - 2)); OUT_BATCH(dw1); OUT_BATCH(point_sprite_enables); - OUT_BATCH(brw->wm.prog_data->flat_inputs); + OUT_BATCH(wm_prog_data->flat_inputs); if (sbe_cmd_length >= 6) { OUT_BATCH(dw4); OUT_BATCH(dw5); @@ -132,11 +139,14 @@ .mesa = _NEW_BUFFERS | _NEW_LIGHT | _NEW_POINT | + _NEW_POLYGON | _NEW_PROGRAM, .brw = BRW_NEW_BLORP | BRW_NEW_CONTEXT | BRW_NEW_FRAGMENT_PROGRAM | BRW_NEW_FS_PROG_DATA | + BRW_NEW_GS_PROG_DATA | + BRW_NEW_TES_PROG_DATA | BRW_NEW_VUE_MAP_GEOM_OUT, }, .emit = upload_sbe, @@ -166,14 +176,14 @@ dw2 |= GEN6_SF_LINE_END_CAP_WIDTH_1_0; } - /* Clamp to ARB_point_parameters user limits */ + /* _NEW_POINT - Clamp to ARB_point_parameters user limits */ point_size = CLAMP(ctx->Point.Size, ctx->Point.MinSize, ctx->Point.MaxSize); /* Clamp to the hardware limits and convert to fixed point */ dw3 |= U_FIXED(CLAMP(point_size, 0.125f, 255.875f), 3); - /* _NEW_PROGRAM | _NEW_POINT */ - if (!(ctx->VertexProgram.PointSizeEnabled || ctx->Point._Attenuated)) + /* _NEW_PROGRAM | _NEW_POINT, BRW_NEW_VUE_MAP_GEOM_OUT */ + if (use_state_point_size(brw)) dw3 |= GEN6_SF_USE_STATE_POINT_WIDTH; /* _NEW_POINT | _NEW_MULTISAMPLE */ @@ -209,7 +219,8 @@ _NEW_MULTISAMPLE | _NEW_POINT, .brw = BRW_NEW_BLORP | - BRW_NEW_CONTEXT, + BRW_NEW_CONTEXT | + BRW_NEW_VUE_MAP_GEOM_OUT, }, .emit = upload_sf, }; @@ -308,6 +319,12 @@ } } + /* BRW_NEW_CONSERVATIVE_RASTERIZATION */ + if (ctx->IntelConservativeRasterization) { + if (brw->gen >= 9) + dw1 |= GEN9_RASTER_CONSERVATIVE_RASTERIZATION_ENABLE; + } + BEGIN_BATCH(5); OUT_BATCH(_3DSTATE_RASTER << 16 | (5 - 2)); OUT_BATCH(dw1); @@ -327,7 +344,8 @@ _NEW_SCISSOR | _NEW_TRANSFORM, .brw = BRW_NEW_BLORP | - BRW_NEW_CONTEXT, + BRW_NEW_CONTEXT | + BRW_NEW_CONSERVATIVE_RASTERIZATION, }, .emit = upload_raster, }; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_surface_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_surface_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_surface_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_surface_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -42,382 +42,16 @@ #include "brw_wm.h" #include "isl/isl.h" -/** - * Convert an swizzle enumeration (i.e. SWIZZLE_X) to one of the Gen7.5+ - * "Shader Channel Select" enumerations (i.e. HSW_SCS_RED). The mappings are - * - * SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W, SWIZZLE_ZERO, SWIZZLE_ONE - * 0 1 2 3 4 5 - * 4 5 6 7 0 1 - * SCS_RED, SCS_GREEN, SCS_BLUE, SCS_ALPHA, SCS_ZERO, SCS_ONE - * - * which is simply adding 4 then modding by 8 (or anding with 7). - */ -static unsigned -swizzle_to_scs(unsigned swizzle) -{ - return (swizzle + 4) & 7; -} - -static uint32_t -surface_tiling_resource_mode(uint32_t tr_mode) -{ - switch (tr_mode) { - case INTEL_MIPTREE_TRMODE_YF: - return GEN9_SURFACE_TRMODE_TILEYF; - case INTEL_MIPTREE_TRMODE_YS: - return GEN9_SURFACE_TRMODE_TILEYS; - default: - return GEN9_SURFACE_TRMODE_NONE; - } -} - -uint32_t -gen8_surface_tiling_mode(uint32_t tiling) -{ - switch (tiling) { - case I915_TILING_X: - return GEN8_SURFACE_TILING_X; - case I915_TILING_Y: - return GEN8_SURFACE_TILING_Y; - default: - return GEN8_SURFACE_TILING_NONE; - } -} - -unsigned -gen8_vertical_alignment(const struct brw_context *brw, - const struct intel_mipmap_tree *mt, - uint32_t surf_type) -{ - /* On Gen9+ vertical alignment is ignored for 1D surfaces and when - * tr_mode is not TRMODE_NONE. Set to an arbitrary non-reserved value. - */ - if (brw->gen > 8 && - (mt->tr_mode != INTEL_MIPTREE_TRMODE_NONE || - surf_type == BRW_SURFACE_1D)) - return GEN8_SURFACE_VALIGN_4; - - switch (mt->valign) { - case 4: - return GEN8_SURFACE_VALIGN_4; - case 8: - return GEN8_SURFACE_VALIGN_8; - case 16: - return GEN8_SURFACE_VALIGN_16; - default: - unreachable("Unsupported vertical surface alignment."); - } -} - -unsigned -gen8_horizontal_alignment(const struct brw_context *brw, - const struct intel_mipmap_tree *mt, - uint32_t surf_type) -{ - /* On Gen9+ horizontal alignment is ignored when tr_mode is not - * TRMODE_NONE. Set to an arbitrary non-reserved value. - */ - if (brw->gen > 8 && - (mt->tr_mode != INTEL_MIPTREE_TRMODE_NONE || - gen9_use_linear_1d_layout(brw, mt))) - return GEN8_SURFACE_HALIGN_4; - - switch (mt->halign) { - case 4: - return GEN8_SURFACE_HALIGN_4; - case 8: - return GEN8_SURFACE_HALIGN_8; - case 16: - return GEN8_SURFACE_HALIGN_16; - default: - unreachable("Unsupported horizontal surface alignment."); - } -} - -uint32_t * +static uint32_t * gen8_allocate_surface_state(struct brw_context *brw, uint32_t *out_offset, int index) { - int dwords = brw->gen >= 9 ? 16 : 13; uint32_t *surf = __brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, - dwords * 4, 64, index, out_offset); - memset(surf, 0, dwords * 4); + 64, 64, index, out_offset); + memset(surf, 0, 64); return surf; } -static void -gen8_emit_buffer_surface_state(struct brw_context *brw, - uint32_t *out_offset, - drm_intel_bo *bo, - unsigned buffer_offset, - unsigned surface_format, - unsigned buffer_size, - unsigned pitch, - bool rw) -{ - const unsigned mocs = brw->gen >= 9 ? SKL_MOCS_WB : BDW_MOCS_WB; - uint32_t *surf = gen8_allocate_surface_state(brw, out_offset, -1); - - surf[0] = BRW_SURFACE_BUFFER << BRW_SURFACE_TYPE_SHIFT | - surface_format << BRW_SURFACE_FORMAT_SHIFT | - BRW_SURFACE_RC_READ_WRITE; - surf[1] = SET_FIELD(mocs, GEN8_SURFACE_MOCS); - - surf[2] = SET_FIELD((buffer_size - 1) & 0x7f, GEN7_SURFACE_WIDTH) | - SET_FIELD(((buffer_size - 1) >> 7) & 0x3fff, GEN7_SURFACE_HEIGHT); - if (surface_format == BRW_SURFACEFORMAT_RAW) - surf[3] = SET_FIELD(((buffer_size - 1) >> 21) & 0x3ff, BRW_SURFACE_DEPTH); - else - surf[3] = SET_FIELD(((buffer_size - 1) >> 21) & 0x3f, BRW_SURFACE_DEPTH); - surf[3] |= (pitch - 1); - surf[7] = SET_FIELD(HSW_SCS_RED, GEN7_SURFACE_SCS_R) | - SET_FIELD(HSW_SCS_GREEN, GEN7_SURFACE_SCS_G) | - SET_FIELD(HSW_SCS_BLUE, GEN7_SURFACE_SCS_B) | - SET_FIELD(HSW_SCS_ALPHA, GEN7_SURFACE_SCS_A); - /* reloc */ - *((uint64_t *) &surf[8]) = (bo ? bo->offset64 : 0) + buffer_offset; - - /* Emit relocation to surface contents. */ - if (bo) { - drm_intel_bo_emit_reloc(brw->batch.bo, *out_offset + 8 * 4, - bo, buffer_offset, I915_GEM_DOMAIN_SAMPLER, - rw ? I915_GEM_DOMAIN_SAMPLER : 0); - } -} - -void -gen8_emit_fast_clear_color(const struct brw_context *brw, - const struct intel_mipmap_tree *mt, - uint32_t *surf) -{ - if (brw->gen >= 9) { - surf[12] = mt->gen9_fast_clear_color.ui[0]; - surf[13] = mt->gen9_fast_clear_color.ui[1]; - surf[14] = mt->gen9_fast_clear_color.ui[2]; - surf[15] = mt->gen9_fast_clear_color.ui[3]; - } else - surf[7] |= mt->fast_clear_color_value; -} - -uint32_t -gen8_get_aux_mode(const struct brw_context *brw, - const struct intel_mipmap_tree *mt) -{ - if (mt->mcs_mt == NULL) - return GEN8_SURFACE_AUX_MODE_NONE; - - /* - * From the BDW PRM, Volume 2d, page 260 (RENDER_SURFACE_STATE): - * "When MCS is enabled for non-MSRT, HALIGN_16 must be used" - * - * From the hardware spec for GEN9: - * "When Auxiliary Surface Mode is set to AUX_CCS_D or AUX_CCS_E, HALIGN - * 16 must be used." - */ - if (brw->gen >= 9 || mt->num_samples == 1) - assert(mt->halign == 16); - - if (intel_miptree_is_lossless_compressed(brw, mt)) - return GEN9_SURFACE_AUX_MODE_CCS_E; - - return GEN8_SURFACE_AUX_MODE_MCS; -} - -static void -gen8_emit_texture_surface_state(struct brw_context *brw, - struct intel_mipmap_tree *mt, - GLenum target, - unsigned min_layer, unsigned max_layer, - unsigned min_level, unsigned max_level, - unsigned format, - unsigned swizzle, - uint32_t *surf_offset, int surf_index, - bool rw, bool for_gather) -{ - const unsigned depth = max_layer - min_layer; - struct intel_mipmap_tree *aux_mt = mt->mcs_mt; - uint32_t mocs_wb = brw->gen >= 9 ? SKL_MOCS_WB : BDW_MOCS_WB; - unsigned tiling_mode, pitch; - const unsigned tr_mode = surface_tiling_resource_mode(mt->tr_mode); - const uint32_t surf_type = translate_tex_target(target); - uint32_t aux_mode = gen8_get_aux_mode(brw, mt); - - if (mt->format == MESA_FORMAT_S_UINT8) { - tiling_mode = GEN8_SURFACE_TILING_W; - pitch = 2 * mt->pitch; - } else { - tiling_mode = gen8_surface_tiling_mode(mt->tiling); - pitch = mt->pitch; - } - - /* Prior to Gen9, MCS is not uploaded for single-sampled surfaces because - * the color buffer should always have been resolved before it is used as - * a texture so there is no need for it. On Gen9 it will be uploaded when - * the surface is losslessly compressed (CCS_E). - * However, sampling engine is not capable of re-interpreting the - * underlying color buffer in non-compressible formats when the surface - * is configured as compressed. Therefore state upload has made sure the - * buffer is in resolved state allowing the surface to be configured as - * non-compressed. - */ - if (mt->num_samples <= 1 && - (aux_mode != GEN9_SURFACE_AUX_MODE_CCS_E || - !isl_format_supports_lossless_compression( - brw->intelScreen->devinfo, format))) { - assert(!mt->mcs_mt || - mt->fast_clear_state == INTEL_FAST_CLEAR_STATE_RESOLVED); - aux_mt = NULL; - aux_mode = GEN8_SURFACE_AUX_MODE_NONE; - } - - uint32_t *surf = gen8_allocate_surface_state(brw, surf_offset, surf_index); - - surf[0] = SET_FIELD(surf_type, BRW_SURFACE_TYPE) | - format << BRW_SURFACE_FORMAT_SHIFT | - gen8_vertical_alignment(brw, mt, surf_type) | - gen8_horizontal_alignment(brw, mt, surf_type) | - tiling_mode; - - if (surf_type == BRW_SURFACE_CUBE) { - surf[0] |= BRW_SURFACE_CUBEFACE_ENABLES; - } - - /* From the CHV PRM, Volume 2d, page 321 (RENDER_SURFACE_STATE dword 0 - * bit 9 "Sampler L2 Bypass Mode Disable" Programming Notes): - * - * This bit must be set for the following surface types: BC2_UNORM - * BC3_UNORM BC5_UNORM BC5_SNORM BC7_UNORM - */ - if ((brw->gen >= 9 || brw->is_cherryview) && - (format == BRW_SURFACEFORMAT_BC2_UNORM || - format == BRW_SURFACEFORMAT_BC3_UNORM || - format == BRW_SURFACEFORMAT_BC5_UNORM || - format == BRW_SURFACEFORMAT_BC5_SNORM || - format == BRW_SURFACEFORMAT_BC7_UNORM)) - surf[0] |= GEN8_SURFACE_SAMPLER_L2_BYPASS_DISABLE; - - if (_mesa_is_array_texture(mt->target) || mt->target == GL_TEXTURE_CUBE_MAP) - surf[0] |= GEN8_SURFACE_IS_ARRAY; - - surf[1] = SET_FIELD(mocs_wb, GEN8_SURFACE_MOCS) | mt->qpitch >> 2; - - surf[2] = SET_FIELD(mt->logical_width0 - 1, GEN7_SURFACE_WIDTH) | - SET_FIELD(mt->logical_height0 - 1, GEN7_SURFACE_HEIGHT); - - surf[3] = SET_FIELD(depth - 1, BRW_SURFACE_DEPTH) | (pitch - 1); - - surf[4] = gen7_surface_msaa_bits(mt->num_samples, mt->msaa_layout) | - SET_FIELD(min_layer, GEN7_SURFACE_MIN_ARRAY_ELEMENT) | - SET_FIELD(depth - 1, GEN7_SURFACE_RENDER_TARGET_VIEW_EXTENT); - - surf[5] = SET_FIELD(min_level - mt->first_level, GEN7_SURFACE_MIN_LOD) | - (max_level - min_level - 1); /* mip count */ - - if (brw->gen >= 9) { - surf[5] |= SET_FIELD(tr_mode, GEN9_SURFACE_TRMODE); - /* Disable Mip Tail by setting a large value. */ - surf[5] |= SET_FIELD(15, GEN9_SURFACE_MIP_TAIL_START_LOD); - } - - if (aux_mt) { - uint32_t tile_w, tile_h; - assert(aux_mt->tiling == I915_TILING_Y); - intel_get_tile_dims(aux_mt->tiling, aux_mt->tr_mode, - aux_mt->cpp, &tile_w, &tile_h); - surf[6] = SET_FIELD(aux_mt->qpitch / 4, GEN8_SURFACE_AUX_QPITCH) | - SET_FIELD((aux_mt->pitch / tile_w) - 1, - GEN8_SURFACE_AUX_PITCH) | - aux_mode; - } - - gen8_emit_fast_clear_color(brw, mt, surf); - surf[7] |= - SET_FIELD(swizzle_to_scs(GET_SWZ(swizzle, 0)), GEN7_SURFACE_SCS_R) | - SET_FIELD(swizzle_to_scs(GET_SWZ(swizzle, 1)), GEN7_SURFACE_SCS_G) | - SET_FIELD(swizzle_to_scs(GET_SWZ(swizzle, 2)), GEN7_SURFACE_SCS_B) | - SET_FIELD(swizzle_to_scs(GET_SWZ(swizzle, 3)), GEN7_SURFACE_SCS_A); - - *((uint64_t *) &surf[8]) = mt->bo->offset64 + mt->offset; /* reloc */ - - if (aux_mt) { - *((uint64_t *) &surf[10]) = aux_mt->bo->offset64; - drm_intel_bo_emit_reloc(brw->batch.bo, *surf_offset + 10 * 4, - aux_mt->bo, 0, - I915_GEM_DOMAIN_SAMPLER, - (rw ? I915_GEM_DOMAIN_SAMPLER : 0)); - } - - /* Emit relocation to surface contents */ - drm_intel_bo_emit_reloc(brw->batch.bo, - *surf_offset + 8 * 4, - mt->bo, - mt->offset, - I915_GEM_DOMAIN_SAMPLER, - (rw ? I915_GEM_DOMAIN_SAMPLER : 0)); -} - -static void -gen8_update_texture_surface(struct gl_context *ctx, - unsigned unit, - uint32_t *surf_offset, - bool for_gather, - uint32_t plane) -{ - struct brw_context *brw = brw_context(ctx); - struct gl_texture_object *obj = ctx->Texture.Unit[unit]._Current; - - if (obj->Target == GL_TEXTURE_BUFFER) { - brw_update_buffer_texture_surface(ctx, unit, surf_offset); - - } else { - struct gl_texture_image *firstImage = obj->Image[0][obj->BaseLevel]; - struct intel_texture_object *intel_obj = intel_texture_object(obj); - struct intel_mipmap_tree *mt = intel_obj->mt; - - if (plane > 0) { - if (mt->plane[plane - 1] == NULL) - return; - mt = mt->plane[plane - 1]; - } - - struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit); - /* If this is a view with restricted NumLayers, then our effective depth - * is not just the miptree depth. - */ - const unsigned depth = (obj->Immutable && obj->Target != GL_TEXTURE_3D ? - obj->NumLayers : mt->logical_depth0); - - /* Handling GL_ALPHA as a surface format override breaks 1.30+ style - * texturing functions that return a float, as our code generation always - * selects the .x channel (which would always be 0). - */ - const bool alpha_depth = obj->DepthMode == GL_ALPHA && - (firstImage->_BaseFormat == GL_DEPTH_COMPONENT || - firstImage->_BaseFormat == GL_DEPTH_STENCIL); - const unsigned swizzle = (unlikely(alpha_depth) ? SWIZZLE_XYZW : - brw_get_texture_swizzle(&brw->ctx, obj)); - - mesa_format mesa_fmt = plane == 0 ? intel_obj->_Format : mt->format; - unsigned format = translate_tex_format(brw, mesa_fmt, - sampler->sRGBDecode); - - if (obj->StencilSampling && firstImage->_BaseFormat == GL_DEPTH_STENCIL) { - mt = mt->stencil_mt; - format = BRW_SURFACEFORMAT_R8_UINT; - } - - const int surf_index = surf_offset - &brw->wm.base.surf_offset[0]; - - gen8_emit_texture_surface_state(brw, mt, obj->Target, - obj->MinLayer, obj->MinLayer + depth, - obj->MinLevel + obj->BaseLevel, - obj->MinLevel + intel_obj->_MaxLevel + 1, - format, swizzle, surf_offset, - surf_index, false, for_gather); - } -} - /** * Creates a null surface. * @@ -442,150 +76,9 @@ SET_FIELD(height - 1, GEN7_SURFACE_HEIGHT); } -/** - * Sets up a surface state structure to point at the given region. - * While it is only used for the front/back buffer currently, it should be - * usable for further buffers when doing ARB_draw_buffer support. - */ -static uint32_t -gen8_update_renderbuffer_surface(struct brw_context *brw, - struct gl_renderbuffer *rb, - bool layered, unsigned unit /* unused */, - uint32_t surf_index) -{ - struct gl_context *ctx = &brw->ctx; - struct intel_renderbuffer *irb = intel_renderbuffer(rb); - struct intel_mipmap_tree *mt = irb->mt; - unsigned width = mt->logical_width0; - unsigned height = mt->logical_height0; - unsigned pitch = mt->pitch; - uint32_t tiling = mt->tiling; - unsigned tr_mode = surface_tiling_resource_mode(mt->tr_mode); - uint32_t format = 0; - uint32_t surf_type; - uint32_t offset; - bool is_array = false; - int depth = MAX2(irb->layer_count, 1); - const int min_array_element = (mt->format == MESA_FORMAT_S_UINT8) ? - irb->mt_layer : (irb->mt_layer / MAX2(mt->num_samples, 1)); - GLenum gl_target = - rb->TexImage ? rb->TexImage->TexObject->Target : GL_TEXTURE_2D; - const uint32_t mocs = brw->gen >= 9 ? SKL_MOCS_PTE : BDW_MOCS_PTE; - - intel_miptree_used_for_rendering(mt); - - switch (gl_target) { - case GL_TEXTURE_CUBE_MAP_ARRAY: - case GL_TEXTURE_CUBE_MAP: - surf_type = BRW_SURFACE_2D; - is_array = true; - depth *= 6; - break; - case GL_TEXTURE_3D: - depth = MAX2(irb->mt->logical_depth0, 1); - /* fallthrough */ - default: - surf_type = translate_tex_target(gl_target); - is_array = _mesa_is_array_texture(mt->target); - break; - } - - /* _NEW_BUFFERS */ - /* Render targets can't use IMS layout. Stencil in turn gets configured as - * single sampled and indexed manually by the program. - */ - if (mt->format == MESA_FORMAT_S_UINT8) { - brw_configure_w_tiled(mt, true, &width, &height, &pitch, - &tiling, &format); - } else { - assert(mt->msaa_layout != INTEL_MSAA_LAYOUT_IMS); - assert(brw_render_target_supported(brw, rb)); - mesa_format rb_format = _mesa_get_render_format(ctx, - intel_rb_format(irb)); - format = brw->render_target_format[rb_format]; - if (unlikely(!brw->format_supported_as_render_target[rb_format])) - _mesa_problem(ctx, "%s: renderbuffer format %s unsupported\n", - __func__, _mesa_get_format_name(rb_format)); - } - - struct intel_mipmap_tree *aux_mt = mt->mcs_mt; - const uint32_t aux_mode = gen8_get_aux_mode(brw, mt); - - uint32_t *surf = gen8_allocate_surface_state(brw, &offset, surf_index); - - surf[0] = (surf_type << BRW_SURFACE_TYPE_SHIFT) | - (is_array ? GEN7_SURFACE_IS_ARRAY : 0) | - (format << BRW_SURFACE_FORMAT_SHIFT) | - gen8_vertical_alignment(brw, mt, surf_type) | - gen8_horizontal_alignment(brw, mt, surf_type) | - gen8_surface_tiling_mode(tiling); - - surf[1] = SET_FIELD(mocs, GEN8_SURFACE_MOCS) | mt->qpitch >> 2; - - surf[2] = SET_FIELD(width - 1, GEN7_SURFACE_WIDTH) | - SET_FIELD(height - 1, GEN7_SURFACE_HEIGHT); - - surf[3] = (depth - 1) << BRW_SURFACE_DEPTH_SHIFT | - (pitch - 1); /* Surface Pitch */ - - surf[4] = min_array_element << GEN7_SURFACE_MIN_ARRAY_ELEMENT_SHIFT | - (depth - 1) << GEN7_SURFACE_RENDER_TARGET_VIEW_EXTENT_SHIFT; - - if (mt->format != MESA_FORMAT_S_UINT8) - surf[4] |= gen7_surface_msaa_bits(mt->num_samples, mt->msaa_layout); - - surf[5] = irb->mt_level - irb->mt->first_level; - - if (brw->gen >= 9) { - surf[5] |= SET_FIELD(tr_mode, GEN9_SURFACE_TRMODE); - /* Disable Mip Tail by setting a large value. */ - surf[5] |= SET_FIELD(15, GEN9_SURFACE_MIP_TAIL_START_LOD); - } - - if (aux_mt) { - uint32_t tile_w, tile_h; - assert(aux_mt->tiling == I915_TILING_Y); - intel_get_tile_dims(aux_mt->tiling, aux_mt->tr_mode, - aux_mt->cpp, &tile_w, &tile_h); - surf[6] = SET_FIELD(aux_mt->qpitch / 4, GEN8_SURFACE_AUX_QPITCH) | - SET_FIELD((aux_mt->pitch / tile_w) - 1, - GEN8_SURFACE_AUX_PITCH) | - aux_mode; - } - - gen8_emit_fast_clear_color(brw, mt, surf); - surf[7] |= SET_FIELD(HSW_SCS_RED, GEN7_SURFACE_SCS_R) | - SET_FIELD(HSW_SCS_GREEN, GEN7_SURFACE_SCS_G) | - SET_FIELD(HSW_SCS_BLUE, GEN7_SURFACE_SCS_B) | - SET_FIELD(HSW_SCS_ALPHA, GEN7_SURFACE_SCS_A); - - assert(mt->offset % mt->cpp == 0); - *((uint64_t *) &surf[8]) = mt->bo->offset64 + mt->offset; /* reloc */ - - if (aux_mt) { - *((uint64_t *) &surf[10]) = aux_mt->bo->offset64; - drm_intel_bo_emit_reloc(brw->batch.bo, - offset + 10 * 4, - aux_mt->bo, 0, - I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER); - } - - drm_intel_bo_emit_reloc(brw->batch.bo, - offset + 8 * 4, - mt->bo, - mt->offset, - I915_GEM_DOMAIN_RENDER, - I915_GEM_DOMAIN_RENDER); - - return offset; -} - void gen8_init_vtable_surface_functions(struct brw_context *brw) { - brw->vtbl.update_texture_surface = gen8_update_texture_surface; - brw->vtbl.update_renderbuffer_surface = gen8_update_renderbuffer_surface; + brw->vtbl.update_renderbuffer_surface = brw_update_renderbuffer_surface; brw->vtbl.emit_null_surface_state = gen8_emit_null_surface_state; - brw->vtbl.emit_texture_surface_state = gen8_emit_texture_surface_state; - brw->vtbl.emit_buffer_surface_state = gen8_emit_buffer_surface_state; } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_viewport_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_viewport_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_viewport_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_viewport_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -33,12 +33,20 @@ gen8_upload_sf_clip_viewport(struct brw_context *brw) { struct gl_context *ctx = &brw->ctx; + const struct gen_device_info *devinfo = &brw->screen->devinfo; float y_scale, y_bias; - const float fb_height = (float)_mesa_geometric_height(ctx->DrawBuffer); - const bool render_to_fbo = _mesa_is_user_fbo(ctx->DrawBuffer); + + /* BRW_NEW_VIEWPORT_COUNT */ + const unsigned viewport_count = brw->clip.viewport_count; + + /* _NEW_BUFFERS */ + struct gl_framebuffer *fb = ctx->DrawBuffer; + const bool render_to_fbo = _mesa_is_user_fbo(fb); + const uint32_t fb_width = _mesa_geometric_width(ctx->DrawBuffer); + const uint32_t fb_height = _mesa_geometric_height(ctx->DrawBuffer); float *vp = brw_state_batch(brw, AUB_TRACE_SF_VP_STATE, - 16 * 4 * ctx->Const.MaxViewports, + 16 * 4 * viewport_count, 64, &brw->sf.vp_offset); /* Also assign to clip.vp_offset in case something uses it. */ brw->clip.vp_offset = brw->sf.vp_offset; @@ -49,10 +57,10 @@ y_bias = 0; } else { y_scale = -1.0; - y_bias = fb_height; + y_bias = (float)fb_height; } - for (unsigned i = 0; i < ctx->Const.MaxViewports; i++) { + for (unsigned i = 0; i < viewport_count; i++) { float scale[3], translate[3]; _mesa_get_viewport_xform(ctx, i, scale, translate); @@ -68,40 +76,9 @@ vp[6] = 0; vp[7] = 0; - /* According to the "Vertex X,Y Clamping and Quantization" section of the - * Strips and Fans documentation, objects must not have a screen-space - * extents of over 8192 pixels, or they may be mis-rasterized. The - * maximum screen space coordinates of a small object may larger, but we - * have no way to enforce the object size other than through clipping. - * - * The goal is to create the maximum sized guardband (8K x 8K) with the - * viewport rectangle in the center of the guardband. This looks weird - * because the hardware wants coordinates that are scaled to the viewport - * in NDC. In other words, an 8K x 8K viewport would have [-1,1] for X and Y. - * A 4K viewport would be [-2,2], 2K := [-4,4] etc. - * - * -------------------------------- - * |Guardband | - * | | - * | ------------ | - * | |viewport | | - * | | | | - * | | | | - * | |__________| | - * | | - * | | - * |______________________________| - * - */ - const float maximum_guardband_extent = 8192; - float gbx = maximum_guardband_extent / ctx->ViewportArray[i].Width; - float gby = maximum_guardband_extent / ctx->ViewportArray[i].Height; - - /* _NEW_VIEWPORT: Guardband Clipping */ - vp[8] = -gbx; /* x-min */ - vp[9] = gbx; /* x-max */ - vp[10] = -gby; /* y-min */ - vp[11] = gby; /* y-max */ + brw_calculate_guardband_size(devinfo, fb_width, fb_height, + vp[0], vp[1], vp[3], vp[4], + &vp[8], &vp[9], &vp[10], &vp[11]); /* _NEW_VIEWPORT | _NEW_BUFFERS: Screen Space Viewport * The hardware will take the intersection of the drawing rectangle, @@ -136,7 +113,8 @@ .mesa = _NEW_BUFFERS | _NEW_VIEWPORT, .brw = BRW_NEW_BATCH | - BRW_NEW_BLORP, + BRW_NEW_BLORP | + BRW_NEW_VIEWPORT_COUNT, }, .emit = gen8_upload_sf_clip_viewport, }; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_vs_state.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_vs_state.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_vs_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_vs_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -32,17 +32,19 @@ static void upload_vs_state(struct brw_context *brw) { - struct gl_context *ctx = &brw->ctx; + const struct gen_device_info *devinfo = &brw->screen->devinfo; const struct brw_stage_state *stage_state = &brw->vs.base; uint32_t floating_point_mode = 0; /* BRW_NEW_VS_PROG_DATA */ - const struct brw_vue_prog_data *prog_data = &brw->vs.prog_data->base; + const struct brw_stage_prog_data *prog_data = stage_state->prog_data; + const struct brw_vue_prog_data *vue_prog_data = + brw_vue_prog_data(stage_state->prog_data); - assert(prog_data->dispatch_mode == DISPATCH_MODE_SIMD8 || - prog_data->dispatch_mode == DISPATCH_MODE_4X2_DUAL_OBJECT); + assert(vue_prog_data->dispatch_mode == DISPATCH_MODE_SIMD8 || + vue_prog_data->dispatch_mode == DISPATCH_MODE_4X2_DUAL_OBJECT); - if (prog_data->base.use_alt_mode) + if (prog_data->use_alt_mode) floating_point_mode = GEN6_VS_FLOATING_POINT_MODE_ALT; BEGIN_BATCH(9); @@ -52,10 +54,10 @@ OUT_BATCH(floating_point_mode | ((ALIGN(stage_state->sampler_count, 4) / 4) << GEN6_VS_SAMPLER_COUNT_SHIFT) | - ((prog_data->base.binding_table.size_bytes / 4) << + ((prog_data->binding_table.size_bytes / 4) << GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT)); - if (prog_data->base.total_scratch) { + if (prog_data->total_scratch) { OUT_RELOC64(stage_state->scratch_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, ffs(stage_state->per_thread_scratch) - 11); @@ -64,28 +66,27 @@ OUT_BATCH(0); } - OUT_BATCH((prog_data->base.dispatch_grf_start_reg << + OUT_BATCH((prog_data->dispatch_grf_start_reg << GEN6_VS_DISPATCH_START_GRF_SHIFT) | - (prog_data->urb_read_length << GEN6_VS_URB_READ_LENGTH_SHIFT) | + (vue_prog_data->urb_read_length << + GEN6_VS_URB_READ_LENGTH_SHIFT) | (0 << GEN6_VS_URB_ENTRY_READ_OFFSET_SHIFT)); - uint32_t simd8_enable = prog_data->dispatch_mode == DISPATCH_MODE_SIMD8 ? + uint32_t simd8_enable = + vue_prog_data->dispatch_mode == DISPATCH_MODE_SIMD8 ? GEN8_VS_SIMD8_ENABLE : 0; - OUT_BATCH(((brw->max_vs_threads - 1) << HSW_VS_MAX_THREADS_SHIFT) | + OUT_BATCH(((devinfo->max_vs_threads - 1) << HSW_VS_MAX_THREADS_SHIFT) | GEN6_VS_STATISTICS_ENABLE | simd8_enable | GEN6_VS_ENABLE); - /* _NEW_TRANSFORM */ - OUT_BATCH(prog_data->cull_distance_mask | - (ctx->Transform.ClipPlanesEnabled << - GEN8_VS_USER_CLIP_DISTANCE_SHIFT)); + OUT_BATCH(vue_prog_data->cull_distance_mask); ADVANCE_BATCH(); } const struct brw_tracked_state gen8_vs_state = { .dirty = { - .mesa = _NEW_TRANSFORM, + .mesa = 0, .brw = BRW_NEW_BATCH | BRW_NEW_BLORP | BRW_NEW_CONTEXT | diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_wm_depth_stencil.c mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_wm_depth_stencil.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/gen8_wm_depth_stencil.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/gen8_wm_depth_stencil.c 2017-06-01 10:37:10.000000000 +0000 @@ -90,7 +90,7 @@ GEN8_WM_DS_DEPTH_TEST_ENABLE | FUNC(ctx->Depth.Func) << GEN8_WM_DS_DEPTH_FUNC_SHIFT; - if (ctx->Depth.Mask) + if (brw_depth_writes_enabled(brw)) dw1 |= GEN8_WM_DS_DEPTH_BUFFER_WRITE_ENABLE; } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/genX_blorp_exec.c mesa-17.0.7/src/mesa/drivers/dri/i965/genX_blorp_exec.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/genX_blorp_exec.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/genX_blorp_exec.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,288 @@ +/* + * Copyright © 2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include + +#include "intel_batchbuffer.h" +#include "intel_mipmap_tree.h" +#include "intel_fbo.h" + +#include "brw_context.h" +#include "brw_state.h" + +#include "blorp/blorp_genX_exec.h" + +#include "brw_blorp.h" + +static void * +blorp_emit_dwords(struct blorp_batch *batch, unsigned n) +{ + assert(batch->blorp->driver_ctx == batch->driver_batch); + struct brw_context *brw = batch->driver_batch; + + intel_batchbuffer_begin(brw, n, RENDER_RING); + uint32_t *map = brw->batch.map_next; + brw->batch.map_next += n; + intel_batchbuffer_advance(brw); + return map; +} + +static uint64_t +blorp_emit_reloc(struct blorp_batch *batch, + void *location, struct blorp_address address, uint32_t delta) +{ + assert(batch->blorp->driver_ctx == batch->driver_batch); + struct brw_context *brw = batch->driver_batch; + + uint32_t offset = (char *)location - (char *)brw->batch.map; + if (brw->gen >= 8) { + return intel_batchbuffer_reloc64(&brw->batch, address.buffer, offset, + address.read_domains, + address.write_domain, + address.offset + delta); + } else { + return intel_batchbuffer_reloc(&brw->batch, address.buffer, offset, + address.read_domains, + address.write_domain, + address.offset + delta); + } +} + +static void +blorp_surface_reloc(struct blorp_batch *batch, uint32_t ss_offset, + struct blorp_address address, uint32_t delta) +{ + assert(batch->blorp->driver_ctx == batch->driver_batch); + struct brw_context *brw = batch->driver_batch; + drm_intel_bo *bo = address.buffer; + + drm_intel_bo_emit_reloc(brw->batch.bo, ss_offset, + bo, address.offset + delta, + address.read_domains, address.write_domain); + + uint64_t reloc_val = bo->offset64 + address.offset + delta; + void *reloc_ptr = (void *)brw->batch.map + ss_offset; +#if GEN_GEN >= 8 + *(uint64_t *)reloc_ptr = reloc_val; +#else + *(uint32_t *)reloc_ptr = reloc_val; +#endif +} + +static void * +blorp_alloc_dynamic_state(struct blorp_batch *batch, + enum aub_state_struct_type type, + uint32_t size, + uint32_t alignment, + uint32_t *offset) +{ + assert(batch->blorp->driver_ctx == batch->driver_batch); + struct brw_context *brw = batch->driver_batch; + + return brw_state_batch(brw, type, size, alignment, offset); +} + +static void +blorp_alloc_binding_table(struct blorp_batch *batch, unsigned num_entries, + unsigned state_size, unsigned state_alignment, + uint32_t *bt_offset, uint32_t *surface_offsets, + void **surface_maps) +{ + assert(batch->blorp->driver_ctx == batch->driver_batch); + struct brw_context *brw = batch->driver_batch; + + uint32_t *bt_map = brw_state_batch(brw, AUB_TRACE_BINDING_TABLE, + num_entries * sizeof(uint32_t), 32, + bt_offset); + + for (unsigned i = 0; i < num_entries; i++) { + surface_maps[i] = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, + state_size, state_alignment, + &(surface_offsets)[i]); + bt_map[i] = surface_offsets[i]; + } +} + +static void * +blorp_alloc_vertex_buffer(struct blorp_batch *batch, uint32_t size, + struct blorp_address *addr) +{ + assert(batch->blorp->driver_ctx == batch->driver_batch); + struct brw_context *brw = batch->driver_batch; + + /* From the Skylake PRM, 3DSTATE_VERTEX_BUFFERS: + * + * "The VF cache needs to be invalidated before binding and then using + * Vertex Buffers that overlap with any previously bound Vertex Buffer + * (at a 64B granularity) since the last invalidation. A VF cache + * invalidate is performed by setting the "VF Cache Invalidation Enable" + * bit in PIPE_CONTROL." + * + * This restriction first appears in the Skylake PRM but the internal docs + * also list it as being an issue on Broadwell. In order to avoid this + * problem, we align all vertex buffer allocations to 64 bytes. + */ + uint32_t offset; + void *data = brw_state_batch(brw, AUB_TRACE_VERTEX_BUFFER, + size, 64, &offset); + + *addr = (struct blorp_address) { + .buffer = brw->batch.bo, + .read_domains = I915_GEM_DOMAIN_VERTEX, + .write_domain = 0, + .offset = offset, + }; + + return data; +} + +static void +blorp_flush_range(struct blorp_batch *batch, void *start, size_t size) +{ + /* All allocated states come from the batch which we will flush before we + * submit it. There's nothing for us to do here. + */ +} + +static void +blorp_emit_urb_config(struct blorp_batch *batch, unsigned vs_entry_size) +{ + assert(batch->blorp->driver_ctx == batch->driver_batch); + struct brw_context *brw = batch->driver_batch; + +#if GEN_GEN >= 7 + if (!(brw->ctx.NewDriverState & (BRW_NEW_CONTEXT | BRW_NEW_URB_SIZE)) && + brw->urb.vsize >= vs_entry_size) + return; + + brw->ctx.NewDriverState |= BRW_NEW_URB_SIZE; + + gen7_upload_urb(brw, vs_entry_size, false, false); +#else + gen6_upload_urb(brw, vs_entry_size, false, 0); +#endif +} + +void +genX(blorp_exec)(struct blorp_batch *batch, + const struct blorp_params *params) +{ + assert(batch->blorp->driver_ctx == batch->driver_batch); + struct brw_context *brw = batch->driver_batch; + struct gl_context *ctx = &brw->ctx; + const uint32_t estimated_max_batch_usage = GEN_GEN >= 8 ? 1920 : 1500; + bool check_aperture_failed_once = false; + + /* Flush the sampler and render caches. We definitely need to flush the + * sampler cache so that we get updated contents from the render cache for + * the glBlitFramebuffer() source. Also, we are sometimes warned in the + * docs to flush the cache between reinterpretations of the same surface + * data with different formats, which blorp does for stencil and depth + * data. + */ + if (params->src.enabled) + brw_render_cache_set_check_flush(brw, params->src.addr.buffer); + brw_render_cache_set_check_flush(brw, params->dst.addr.buffer); + + brw_select_pipeline(brw, BRW_RENDER_PIPELINE); + +retry: + intel_batchbuffer_require_space(brw, estimated_max_batch_usage, RENDER_RING); + intel_batchbuffer_save_state(brw); + drm_intel_bo *saved_bo = brw->batch.bo; + uint32_t saved_used = USED_BATCH(brw->batch); + uint32_t saved_state_batch_offset = brw->batch.state_batch_offset; + +#if GEN_GEN == 6 + /* Emit workaround flushes when we switch from drawing to blorping. */ + brw_emit_post_sync_nonzero_flush(brw); +#endif + + brw_upload_state_base_address(brw); + +#if GEN_GEN >= 8 + gen7_l3_state.emit(brw); +#endif + + if (brw->use_resource_streamer) + gen7_disable_hw_binding_tables(brw); + + brw_emit_depth_stall_flushes(brw); + +#if GEN_GEN == 8 + gen8_write_pma_stall_bits(brw, 0); +#endif + + blorp_emit(batch, GENX(3DSTATE_DRAWING_RECTANGLE), rect) { + rect.ClippedDrawingRectangleXMax = MAX2(params->x1, params->x0) - 1; + rect.ClippedDrawingRectangleYMax = MAX2(params->y1, params->y0) - 1; + } + + blorp_exec(batch, params); + + /* Make sure we didn't wrap the batch unintentionally, and make sure we + * reserved enough space that a wrap will never happen. + */ + assert(brw->batch.bo == saved_bo); + assert((USED_BATCH(brw->batch) - saved_used) * 4 + + (saved_state_batch_offset - brw->batch.state_batch_offset) < + estimated_max_batch_usage); + /* Shut up compiler warnings on release build */ + (void)saved_bo; + (void)saved_used; + (void)saved_state_batch_offset; + + /* Check if the blorp op we just did would make our batch likely to fail to + * map all the BOs into the GPU at batch exec time later. If so, flush the + * batch and try again with nothing else in the batch. + */ + if (dri_bufmgr_check_aperture_space(&brw->batch.bo, 1)) { + if (!check_aperture_failed_once) { + check_aperture_failed_once = true; + intel_batchbuffer_reset_to_saved(brw); + intel_batchbuffer_flush(brw); + goto retry; + } else { + int ret = intel_batchbuffer_flush(brw); + WARN_ONCE(ret == -ENOSPC, + "i965: blorp emit exceeded available aperture space\n"); + } + } + + if (unlikely(brw->always_flush_batch)) + intel_batchbuffer_flush(brw); + + /* We've smashed all state compared to what the normal 3D pipeline + * rendering tracks for GL. + */ + brw->ctx.NewDriverState |= BRW_NEW_BLORP; + brw->no_depth_or_stencil = false; + brw->ib.type = -1; + + if (params->dst.enabled) + brw_render_cache_set_add_bo(brw, params->dst.addr.buffer); + if (params->depth.enabled) + brw_render_cache_set_add_bo(brw, params->depth.addr.buffer); + if (params->stencil.enabled) + brw_render_cache_set_add_bo(brw, params->stencil.addr.buffer); +} diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/hsw_queryobj.c mesa-17.0.7/src/mesa/drivers/dri/i965/hsw_queryobj.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/hsw_queryobj.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/hsw_queryobj.c 2017-06-01 10:37:10.000000000 +0000 @@ -32,7 +32,6 @@ #include "brw_defines.h" #include "intel_batchbuffer.h" #include "intel_buffer_objects.h" -#include "intel_reg.h" /* * GPR0 = 80 * GPR0; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/intel_asm_annotation.c mesa-17.0.7/src/mesa/drivers/dri/i965/intel_asm_annotation.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/intel_asm_annotation.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/intel_asm_annotation.c 2017-06-01 10:37:10.000000000 +0000 @@ -29,7 +29,7 @@ void dump_assembly(void *assembly, int num_annotations, struct annotation *annotation, - const struct brw_device_info *devinfo) + const struct gen_device_info *devinfo) { const char *last_annotation_string = NULL; const void *last_annotation_ir = NULL; @@ -45,7 +45,7 @@ struct bblock_t *predecessor_block = predecessor_link->block; fprintf(stderr, " <-B%d", predecessor_block->num); } - fprintf(stderr, "\n"); + fprintf(stderr, " (%u cycles)\n", annotation[i].block_start->cycle_count); } if (last_annotation_ir != annotation[i].ir) { @@ -100,7 +100,7 @@ return true; } -void annotate(const struct brw_device_info *devinfo, +void annotate(const struct gen_device_info *devinfo, struct annotation_info *annotation, const struct cfg_t *cfg, struct backend_instruction *inst, unsigned offset) { diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/intel_asm_annotation.h mesa-17.0.7/src/mesa/drivers/dri/i965/intel_asm_annotation.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/intel_asm_annotation.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/intel_asm_annotation.h 2017-06-01 10:37:10.000000000 +0000 @@ -60,10 +60,10 @@ void dump_assembly(void *assembly, int num_annotations, struct annotation *annotation, - const struct brw_device_info *devinfo); + const struct gen_device_info *devinfo); void -annotate(const struct brw_device_info *devinfo, +annotate(const struct gen_device_info *devinfo, struct annotation_info *annotation, const struct cfg_t *cfg, struct backend_instruction *inst, unsigned offset); void diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/intel_batchbuffer.c mesa-17.0.7/src/mesa/drivers/dri/i965/intel_batchbuffer.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/intel_batchbuffer.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/intel_batchbuffer.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,7 +25,6 @@ #include "intel_batchbuffer.h" #include "intel_buffer_objects.h" -#include "intel_reg.h" #include "intel_bufmgr.h" #include "intel_buffers.h" #include "intel_fbo.h" @@ -37,48 +36,55 @@ #include static void -intel_batchbuffer_reset(struct brw_context *brw); +intel_batchbuffer_reset(struct intel_batchbuffer *batch, dri_bufmgr *bufmgr, + bool has_llc); void -intel_batchbuffer_init(struct brw_context *brw) +intel_batchbuffer_init(struct intel_batchbuffer *batch, dri_bufmgr *bufmgr, + bool has_llc) { - intel_batchbuffer_reset(brw); + intel_batchbuffer_reset(batch, bufmgr, has_llc); - if (!brw->has_llc) { - brw->batch.cpu_map = malloc(BATCH_SZ); - brw->batch.map = brw->batch.cpu_map; - brw->batch.map_next = brw->batch.cpu_map; + if (!has_llc) { + batch->cpu_map = malloc(BATCH_SZ); + batch->map = batch->cpu_map; + batch->map_next = batch->cpu_map; } } static void -intel_batchbuffer_reset(struct brw_context *brw) +intel_batchbuffer_reset(struct intel_batchbuffer *batch, dri_bufmgr *bufmgr, + bool has_llc) { - if (brw->batch.last_bo != NULL) { - drm_intel_bo_unreference(brw->batch.last_bo); - brw->batch.last_bo = NULL; - } - brw->batch.last_bo = brw->batch.bo; - - brw_render_cache_set_clear(brw); - - brw->batch.bo = drm_intel_bo_alloc(brw->bufmgr, "batchbuffer", - BATCH_SZ, 4096); - if (brw->has_llc) { - drm_intel_bo_map(brw->batch.bo, true); - brw->batch.map = brw->batch.bo->virtual; - } - brw->batch.map_next = brw->batch.map; - - brw->batch.reserved_space = BATCH_RESERVED; - brw->batch.state_batch_offset = brw->batch.bo->size; - brw->batch.needs_sol_reset = false; - brw->batch.state_base_address_emitted = false; + if (batch->last_bo != NULL) { + drm_intel_bo_unreference(batch->last_bo); + batch->last_bo = NULL; + } + batch->last_bo = batch->bo; + + batch->bo = drm_intel_bo_alloc(bufmgr, "batchbuffer", BATCH_SZ, 4096); + if (has_llc) { + drm_intel_bo_map(batch->bo, true); + batch->map = batch->bo->virtual; + } + batch->map_next = batch->map; + + batch->reserved_space = BATCH_RESERVED; + batch->state_batch_offset = batch->bo->size; + batch->needs_sol_reset = false; + batch->state_base_address_emitted = false; /* We don't know what ring the new batch will be sent to until we see the * first BEGIN_BATCH or BEGIN_BATCH_BLT. Mark it as unknown. */ - brw->batch.ring = UNKNOWN_RING; + batch->ring = UNKNOWN_RING; +} + +static void +intel_batchbuffer_reset_and_clear_render_cache(struct brw_context *brw) +{ + intel_batchbuffer_reset(&brw->batch, brw->bufmgr, brw->has_llc); + brw_render_cache_set_clear(brw); } void @@ -100,11 +106,11 @@ } void -intel_batchbuffer_free(struct brw_context *brw) +intel_batchbuffer_free(struct intel_batchbuffer *batch) { - free(brw->batch.cpu_map); - drm_intel_bo_unreference(brw->batch.last_bo); - drm_intel_bo_unreference(brw->batch.bo); + free(batch->cpu_map); + drm_intel_bo_unreference(batch->last_bo); + drm_intel_bo_unreference(batch->bo); } void @@ -120,7 +126,7 @@ #ifdef DEBUG assert(sz < BATCH_SZ - BATCH_RESERVED); #endif - if (intel_batchbuffer_space(brw) < sz) + if (intel_batchbuffer_space(&brw->batch) < sz) intel_batchbuffer_flush(brw); enum brw_gpu_ring prev_ring = brw->batch.ring; @@ -140,7 +146,7 @@ struct intel_batchbuffer *batch = &brw->batch; int ret; - decode = drm_intel_decode_context_alloc(brw->intelScreen->deviceID); + decode = drm_intel_decode_context_alloc(brw->screen->deviceID); if (!decode) return; @@ -176,8 +182,7 @@ void intel_batchbuffer_emit_render_ring_prelude(struct brw_context *brw) { - /* We may need to enable and snapshot OA counters. */ - brw_perf_monitor_new_batch(brw); + /* Un-used currently */ } /** @@ -188,7 +193,7 @@ { /* Create a new batchbuffer and reset the associated state: */ drm_intel_gem_bo_clear_relocs(brw->batch.bo, 0); - intel_batchbuffer_reset(brw); + intel_batchbuffer_reset_and_clear_render_cache(brw); /* If the kernel supports hardware contexts, then most hardware state is * preserved between batches; we only need to re-emit state that is required @@ -212,9 +217,6 @@ */ if (INTEL_DEBUG & DEBUG_SHADER_TIME) brw_collect_and_report_shader_time(brw); - - if (INTEL_DEBUG & DEBUG_PERFMON) - brw_dump_perf_monitors(brw); } /** @@ -242,9 +244,6 @@ if (brw->gen >= 7) gen7_restore_default_l3_config(brw); - /* We may also need to snapshot and disable OA counters. */ - brw_perf_monitor_finish_batch(brw); - if (brw->is_haswell) { /* From the Haswell PRM, Volume 2b, Command Reference: Instructions, * 3DSTATE_CC_STATE_POINTERS > "Note": @@ -306,8 +305,8 @@ } if (brw->need_flush_throttle) { - __DRIscreen *psp = brw->intelScreen->driScrnPriv; - drmCommandNone(psp->fd, DRM_I915_GEM_THROTTLE); + __DRIscreen *dri_screen = brw->screen->driScrnPriv; + drmCommandNone(dri_screen->fd, DRM_I915_GEM_THROTTLE); brw->need_flush_throttle = false; } } @@ -337,7 +336,7 @@ } } - if (!brw->intelScreen->no_hw) { + if (!brw->screen->no_hw) { int flags; if (brw->gen >= 6 && batch->ring == BLT_RING) { @@ -409,10 +408,10 @@ brw_finish_batch(brw); /* Mark the end of the buffer. */ - intel_batchbuffer_emit_dword(brw, MI_BATCH_BUFFER_END); + intel_batchbuffer_emit_dword(&brw->batch, MI_BATCH_BUFFER_END); if (USED_BATCH(brw->batch) & 1) { /* Round batchbuffer usage to 2 DWORDs. */ - intel_batchbuffer_emit_dword(brw, MI_NOOP); + intel_batchbuffer_emit_dword(&brw->batch, MI_NOOP); } intel_upload_finish(brw); @@ -440,14 +439,14 @@ /* This is the only way buffers get added to the validate list. */ uint32_t -intel_batchbuffer_reloc(struct brw_context *brw, +intel_batchbuffer_reloc(struct intel_batchbuffer *batch, drm_intel_bo *buffer, uint32_t offset, uint32_t read_domains, uint32_t write_domain, uint32_t delta) { int ret; - ret = drm_intel_bo_emit_reloc(brw->batch.bo, offset, + ret = drm_intel_bo_emit_reloc(batch->bo, offset, buffer, delta, read_domains, write_domain); assert(ret == 0); @@ -461,12 +460,12 @@ } uint64_t -intel_batchbuffer_reloc64(struct brw_context *brw, +intel_batchbuffer_reloc64(struct intel_batchbuffer *batch, drm_intel_bo *buffer, uint32_t offset, uint32_t read_domains, uint32_t write_domain, uint32_t delta) { - int ret = drm_intel_bo_emit_reloc(brw->batch.bo, offset, + int ret = drm_intel_bo_emit_reloc(batch->bo, offset, buffer, delta, read_domains, write_domain); assert(ret == 0); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/intel_batchbuffer.h mesa-17.0.7/src/mesa/drivers/dri/i965/intel_batchbuffer.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/intel_batchbuffer.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/intel_batchbuffer.h 2017-06-01 10:37:10.000000000 +0000 @@ -5,7 +5,6 @@ #include "brw_context.h" #include "intel_bufmgr.h" -#include "intel_reg.h" #ifdef __cplusplus extern "C" { @@ -40,8 +39,9 @@ struct intel_batchbuffer; void intel_batchbuffer_emit_render_ring_prelude(struct brw_context *brw); -void intel_batchbuffer_init(struct brw_context *brw); -void intel_batchbuffer_free(struct brw_context *brw); +void intel_batchbuffer_init(struct intel_batchbuffer *batch, dri_bufmgr *bufmgr, + bool has_llc); +void intel_batchbuffer_free(struct intel_batchbuffer *batch); void intel_batchbuffer_save_state(struct brw_context *brw); void intel_batchbuffer_reset_to_saved(struct brw_context *brw); void intel_batchbuffer_require_space(struct brw_context *brw, GLuint sz, @@ -63,13 +63,13 @@ const void *data, GLuint bytes, enum brw_gpu_ring ring); -uint32_t intel_batchbuffer_reloc(struct brw_context *brw, +uint32_t intel_batchbuffer_reloc(struct intel_batchbuffer *batch, drm_intel_bo *buffer, uint32_t offset, uint32_t read_domains, uint32_t write_domain, uint32_t delta); -uint64_t intel_batchbuffer_reloc64(struct brw_context *brw, +uint64_t intel_batchbuffer_reloc64(struct intel_batchbuffer *batch, drm_intel_bo *buffer, uint32_t offset, uint32_t read_domains, @@ -95,27 +95,27 @@ * work... */ static inline unsigned -intel_batchbuffer_space(struct brw_context *brw) +intel_batchbuffer_space(struct intel_batchbuffer *batch) { - return (brw->batch.state_batch_offset - brw->batch.reserved_space) - - USED_BATCH(brw->batch) * 4; + return (batch->state_batch_offset - batch->reserved_space) + - USED_BATCH(*batch) * 4; } static inline void -intel_batchbuffer_emit_dword(struct brw_context *brw, GLuint dword) +intel_batchbuffer_emit_dword(struct intel_batchbuffer *batch, GLuint dword) { #ifdef DEBUG - assert(intel_batchbuffer_space(brw) >= 4); + assert(intel_batchbuffer_space(batch) >= 4); #endif - *brw->batch.map_next++ = dword; - assert(brw->batch.ring != UNKNOWN_RING); + *batch->map_next++ = dword; + assert(batch->ring != UNKNOWN_RING); } static inline void -intel_batchbuffer_emit_float(struct brw_context *brw, float f) +intel_batchbuffer_emit_float(struct intel_batchbuffer *batch, float f) { - intel_batchbuffer_emit_dword(brw, float_as_int(f)); + intel_batchbuffer_emit_dword(batch, float_as_int(f)); } static inline void @@ -160,18 +160,18 @@ #define OUT_BATCH(d) *__map++ = (d) #define OUT_BATCH_F(f) OUT_BATCH(float_as_int((f))) -#define OUT_RELOC(buf, read_domains, write_domain, delta) do { \ - uint32_t __offset = (__map - brw->batch.map) * 4; \ - OUT_BATCH(intel_batchbuffer_reloc(brw, (buf), __offset, \ - (read_domains), \ - (write_domain), \ - (delta))); \ +#define OUT_RELOC(buf, read_domains, write_domain, delta) do { \ + uint32_t __offset = (__map - brw->batch.map) * 4; \ + OUT_BATCH(intel_batchbuffer_reloc(&brw->batch, (buf), __offset, \ + (read_domains), \ + (write_domain), \ + (delta))); \ } while (0) /* Handle 48-bit address relocations for Gen8+ */ #define OUT_RELOC64(buf, read_domains, write_domain, delta) do { \ uint32_t __offset = (__map - brw->batch.map) * 4; \ - uint64_t reloc64 = intel_batchbuffer_reloc64(brw, (buf), __offset, \ + uint64_t reloc64 = intel_batchbuffer_reloc64(&brw->batch, (buf), __offset, \ (read_domains), \ (write_domain), \ (delta)); \ diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/intel_blit.c mesa-17.0.7/src/mesa/drivers/dri/i965/intel_blit.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/intel_blit.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/intel_blit.c 2017-06-01 10:37:10.000000000 +0000 @@ -34,7 +34,6 @@ #include "intel_blit.h" #include "intel_buffers.h" #include "intel_fbo.h" -#include "intel_reg.h" #include "intel_batchbuffer.h" #include "intel_mipmap_tree.h" @@ -180,6 +179,118 @@ return false; } +static void +get_blit_intratile_offset_el(const struct brw_context *brw, + struct intel_mipmap_tree *mt, + uint32_t total_x_offset_el, + uint32_t total_y_offset_el, + uint32_t *base_address_offset, + uint32_t *x_offset_el, + uint32_t *y_offset_el) +{ + enum isl_tiling tiling = intel_miptree_get_isl_tiling(mt); + isl_tiling_get_intratile_offset_el(&brw->isl_dev, + tiling, mt->cpp, mt->pitch, + total_x_offset_el, total_y_offset_el, + base_address_offset, + x_offset_el, y_offset_el); + if (tiling == ISL_TILING_LINEAR) { + /* From the Broadwell PRM docs for XY_SRC_COPY_BLT::SourceBaseAddress: + * + * "Base address of the destination surface: X=0, Y=0. Lower 32bits + * of the 48bit addressing. When Src Tiling is enabled (Bit_15 + * enabled), this address must be 4KB-aligned. When Tiling is not + * enabled, this address should be CL (64byte) aligned." + * + * The offsets we get from ISL in the tiled case are already aligned. + * In the linear case, we need to do some of our own aligning. + */ + assert(mt->pitch % 64 == 0); + uint32_t delta = *base_address_offset & 63; + assert(delta % mt->cpp == 0); + *base_address_offset -= delta; + *x_offset_el += delta / mt->cpp; + } else { + assert(*base_address_offset % 4096 == 0); + } +} + +static bool +emit_miptree_blit(struct brw_context *brw, + struct intel_mipmap_tree *src_mt, + uint32_t src_x, uint32_t src_y, + struct intel_mipmap_tree *dst_mt, + uint32_t dst_x, uint32_t dst_y, + uint32_t width, uint32_t height, + bool reverse, GLenum logicop) +{ + /* According to the Ivy Bridge PRM, Vol1 Part4, section 1.2.1.2 (Graphics + * Data Size Limitations): + * + * The BLT engine is capable of transferring very large quantities of + * graphics data. Any graphics data read from and written to the + * destination is permitted to represent a number of pixels that + * occupies up to 65,536 scan lines and up to 32,768 bytes per scan line + * at the destination. The maximum number of pixels that may be + * represented per scan line’s worth of graphics data depends on the + * color depth. + * + * The blitter's pitch is a signed 16-bit integer, but measured in bytes + * for linear surfaces and DWords for tiled surfaces. So the maximum + * pitch is 32k linear and 128k tiled. + */ + if (blt_pitch(src_mt) >= 32768 || blt_pitch(dst_mt) >= 32768) { + perf_debug("Falling back due to >= 32k/128k pitch\n"); + return false; + } + + /* We need to split the blit into chunks that each fit within the blitter's + * restrictions. We can't use a chunk size of 32768 because we need to + * ensure that src_tile_x + chunk_size fits. We choose 16384 because it's + * a nice round power of two, big enough that performance won't suffer, and + * small enough to guarantee everything fits. + */ + const uint32_t max_chunk_size = 16384; + + for (uint32_t chunk_x = 0; chunk_x < width; chunk_x += max_chunk_size) { + for (uint32_t chunk_y = 0; chunk_y < height; chunk_y += max_chunk_size) { + const uint32_t chunk_w = MIN2(max_chunk_size, width - chunk_x); + const uint32_t chunk_h = MIN2(max_chunk_size, height - chunk_y); + + uint32_t src_offset, src_tile_x, src_tile_y; + get_blit_intratile_offset_el(brw, src_mt, + src_x + chunk_x, src_y + chunk_y, + &src_offset, &src_tile_x, &src_tile_y); + + uint32_t dst_offset, dst_tile_x, dst_tile_y; + get_blit_intratile_offset_el(brw, dst_mt, + dst_x + chunk_x, dst_y + chunk_y, + &dst_offset, &dst_tile_x, &dst_tile_y); + + if (!intelEmitCopyBlit(brw, + src_mt->cpp, + reverse ? -src_mt->pitch : src_mt->pitch, + src_mt->bo, src_mt->offset + src_offset, + src_mt->tiling, + src_mt->tr_mode, + dst_mt->pitch, + dst_mt->bo, dst_mt->offset + dst_offset, + dst_mt->tiling, + dst_mt->tr_mode, + src_tile_x, src_tile_y, + dst_tile_x, dst_tile_y, + chunk_w, chunk_h, + logicop)) { + /* If this is ever going to fail, it will fail on the first chunk */ + assert(chunk_x == 0 && chunk_y == 0); + return false; + } + } + } + + return true; +} + /** * Implements a rectangular block transfer (blit) of pixels between two * miptrees. @@ -211,8 +322,8 @@ return false; /* No sRGB decode or encode is done by the hardware blitter, which is - * consistent with what we want in the callers (glCopyTexSubImage(), - * glBlitFramebuffer(), texture validation, etc.). + * consistent with what we want in many callers (glCopyTexSubImage(), + * texture validation, etc.). */ mesa_format src_format = _mesa_get_srgb_format_linear(src_mt->format); mesa_format dst_format = _mesa_get_srgb_format_linear(dst_mt->format); @@ -230,37 +341,13 @@ return false; } - /* According to the Ivy Bridge PRM, Vol1 Part4, section 1.2.1.2 (Graphics - * Data Size Limitations): - * - * The BLT engine is capable of transferring very large quantities of - * graphics data. Any graphics data read from and written to the - * destination is permitted to represent a number of pixels that - * occupies up to 65,536 scan lines and up to 32,768 bytes per scan line - * at the destination. The maximum number of pixels that may be - * represented per scan line’s worth of graphics data depends on the - * color depth. - * - * Furthermore, intelEmitCopyBlit (which is called below) uses a signed - * 16-bit integer to represent buffer pitch, so it can only handle buffer - * pitches < 32k. However, the pitch is measured in bytes for linear buffers - * and dwords for tiled buffers. - * - * As a result of these two limitations, we can only use the blitter to do - * this copy when the miptree's pitch is less than 32k linear or 128k tiled. - */ - if (blt_pitch(src_mt) >= 32768 || blt_pitch(dst_mt) >= 32768) { - perf_debug("Falling back due to >= 32k/128k pitch\n"); - return false; - } - /* The blitter has no idea about HiZ or fast color clears, so we need to * resolve the miptrees before we do anything. */ intel_miptree_slice_resolve_depth(brw, src_mt, src_level, src_slice); intel_miptree_slice_resolve_depth(brw, dst_mt, dst_level, dst_slice); - intel_miptree_resolve_color(brw, src_mt, 0); - intel_miptree_resolve_color(brw, dst_mt, 0); + intel_miptree_resolve_color(brw, src_mt, src_level, src_slice, 1, 0); + intel_miptree_resolve_color(brw, dst_mt, dst_level, dst_slice, 1, 0); if (src_flip) src_y = minify(src_mt->physical_height0, src_level - src_mt->first_level) - src_y - height; @@ -278,30 +365,9 @@ dst_x += dst_image_x; dst_y += dst_image_y; - /* The blitter interprets the 16-bit destination x/y as a signed 16-bit - * value. The values we're working with are unsigned, so make sure we don't - * overflow. - */ - if (src_x >= 32768 || src_y >= 32768 || dst_x >= 32768 || dst_y >= 32768) { - perf_debug("Falling back due to >=32k offset [src(%d, %d) dst(%d, %d)]\n", - src_x, src_y, dst_x, dst_y); - return false; - } - - if (!intelEmitCopyBlit(brw, - src_mt->cpp, - src_flip == dst_flip ? src_mt->pitch : -src_mt->pitch, - src_mt->bo, src_mt->offset, - src_mt->tiling, - src_mt->tr_mode, - dst_mt->pitch, - dst_mt->bo, dst_mt->offset, - dst_mt->tiling, - dst_mt->tr_mode, - src_x, src_y, - dst_x, dst_y, - width, height, - logicop)) { + if (!emit_miptree_blit(brw, src_mt, src_x, src_y, + dst_mt, dst_x, dst_y, width, height, + src_flip != dst_flip, logicop)) { return false; } @@ -316,6 +382,82 @@ return true; } +bool +intel_miptree_copy(struct brw_context *brw, + struct intel_mipmap_tree *src_mt, + int src_level, int src_slice, + uint32_t src_x, uint32_t src_y, + struct intel_mipmap_tree *dst_mt, + int dst_level, int dst_slice, + uint32_t dst_x, uint32_t dst_y, + uint32_t src_width, uint32_t src_height) +{ + /* The blitter doesn't understand multisampling at all. */ + if (src_mt->num_samples > 0 || dst_mt->num_samples > 0) + return false; + + if (src_mt->format == MESA_FORMAT_S_UINT8) + return false; + + /* The blitter has no idea about HiZ or fast color clears, so we need to + * resolve the miptrees before we do anything. + */ + intel_miptree_slice_resolve_depth(brw, src_mt, src_level, src_slice); + intel_miptree_slice_resolve_depth(brw, dst_mt, dst_level, dst_slice); + intel_miptree_resolve_color(brw, src_mt, src_level, src_slice, 1, 0); + intel_miptree_resolve_color(brw, dst_mt, dst_level, dst_slice, 1, 0); + + uint32_t src_image_x, src_image_y; + intel_miptree_get_image_offset(src_mt, src_level, src_slice, + &src_image_x, &src_image_y); + + if (_mesa_is_format_compressed(src_mt->format)) { + GLuint bw, bh; + _mesa_get_format_block_size(src_mt->format, &bw, &bh); + + /* Compressed textures need not have dimensions that are a multiple of + * the block size. Rectangles in compressed textures do need to be a + * multiple of the block size. The one exception is that the right and + * bottom edges may be at the right or bottom edge of the miplevel even + * if it's not aligned. + */ + assert(src_x % bw == 0); + assert(src_y % bh == 0); + assert(src_width % bw == 0 || + src_x + src_width == minify(src_mt->logical_width0, src_level)); + assert(src_height % bh == 0 || + src_y + src_height == minify(src_mt->logical_height0, src_level)); + + src_x /= (int)bw; + src_y /= (int)bh; + src_width = DIV_ROUND_UP(src_width, (int)bw); + src_height = DIV_ROUND_UP(src_height, (int)bh); + } + src_x += src_image_x; + src_y += src_image_y; + + uint32_t dst_image_x, dst_image_y; + intel_miptree_get_image_offset(dst_mt, dst_level, dst_slice, + &dst_image_x, &dst_image_y); + + if (_mesa_is_format_compressed(dst_mt->format)) { + GLuint bw, bh; + _mesa_get_format_block_size(dst_mt->format, &bw, &bh); + + assert(dst_x % bw == 0); + assert(dst_y % bh == 0); + + dst_x /= (int)bw; + dst_y /= (int)bh; + } + dst_x += dst_image_x; + dst_y += dst_image_y; + + return emit_miptree_blit(brw, src_mt, src_x, src_y, + dst_mt, dst_x, dst_y, + src_width, src_height, false, GL_COPY); +} + static bool alignment_valid(struct brw_context *brw, unsigned offset, uint32_t tiling) { @@ -334,11 +476,11 @@ can_fast_copy_blit(struct brw_context *brw, drm_intel_bo *src_buffer, int16_t src_x, int16_t src_y, - uintptr_t src_offset, uint32_t src_pitch, + uintptr_t src_offset, int32_t src_pitch, uint32_t src_tiling, uint32_t src_tr_mode, drm_intel_bo *dst_buffer, int16_t dst_x, int16_t dst_y, - uintptr_t dst_offset, uint32_t dst_pitch, + uintptr_t dst_offset, int32_t dst_pitch, uint32_t dst_tiling, uint32_t dst_tr_mode, int16_t w, int16_t h, uint32_t cpp, GLenum logic_op) @@ -374,10 +516,8 @@ if (!_mesa_is_pow_two(cpp) || cpp > 16) return false; - /* For Fast Copy Blits the pitch cannot be a negative number. So, bit 15 - * of the destination pitch must be zero. - */ - if ((src_pitch >> 15 & 1) != 0 || (dst_pitch >> 15 & 1) != 0) + /* For Fast Copy Blits the pitch cannot be a negative number. */ + if (src_pitch < 0 || dst_pitch < 0) return false; /* For Linear surfaces, the pitch has to be an OWord (16byte) multiple. */ @@ -431,12 +571,12 @@ bool intelEmitCopyBlit(struct brw_context *brw, GLuint cpp, - GLshort src_pitch, + int32_t src_pitch, drm_intel_bo *src_buffer, GLuint src_offset, uint32_t src_tiling, uint32_t src_tr_mode, - GLshort dst_pitch, + int32_t dst_pitch, drm_intel_bo *dst_buffer, GLuint dst_offset, uint32_t dst_tiling, @@ -586,10 +726,6 @@ assert(dst_x < dst_x2); assert(dst_y < dst_y2); - assert(src_offset + (src_y + h - 1) * abs(src_pitch) + - (w * cpp) <= src_buffer->size); - assert(dst_offset + (dst_y + h - 1) * abs(dst_pitch) + - (w * cpp) <= dst_buffer->size); BEGIN_BATCH_BLT_TILED(length, dst_y_tiled, src_y_tiled); OUT_BATCH(CMD | (length - 2)); @@ -809,22 +945,44 @@ unsigned length = brw->gen >= 8 ? 7 : 6; bool dst_y_tiled = mt->tiling == I915_TILING_Y; - BEGIN_BATCH_BLT_TILED(length, dst_y_tiled, false); - OUT_BATCH(CMD | (length - 2)); - OUT_BATCH(BR13); - OUT_BATCH(SET_FIELD(y, BLT_Y) | SET_FIELD(x, BLT_X)); - OUT_BATCH(SET_FIELD(y + height, BLT_Y) | SET_FIELD(x + width, BLT_X)); - if (brw->gen >= 8) { - OUT_RELOC64(mt->bo, - I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, - 0); - } else { - OUT_RELOC(mt->bo, - I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, - 0); + /* We need to split the blit into chunks that each fit within the blitter's + * restrictions. We can't use a chunk size of 32768 because we need to + * ensure that src_tile_x + chunk_size fits. We choose 16384 because it's + * a nice round power of two, big enough that performance won't suffer, and + * small enough to guarantee everything fits. + */ + const uint32_t max_chunk_size = 16384; + + for (uint32_t chunk_x = 0; chunk_x < width; chunk_x += max_chunk_size) { + for (uint32_t chunk_y = 0; chunk_y < height; chunk_y += max_chunk_size) { + const uint32_t chunk_w = MIN2(max_chunk_size, width - chunk_x); + const uint32_t chunk_h = MIN2(max_chunk_size, height - chunk_y); + + uint32_t offset, tile_x, tile_y; + get_blit_intratile_offset_el(brw, mt, + x + chunk_x, y + chunk_y, + &offset, &tile_x, &tile_y); + + BEGIN_BATCH_BLT_TILED(length, dst_y_tiled, false); + OUT_BATCH(CMD | (length - 2)); + OUT_BATCH(BR13); + OUT_BATCH(SET_FIELD(y + chunk_y, BLT_Y) | + SET_FIELD(x + chunk_x, BLT_X)); + OUT_BATCH(SET_FIELD(y + chunk_y + chunk_h, BLT_Y) | + SET_FIELD(x + chunk_x + chunk_w, BLT_X)); + if (brw->gen >= 8) { + OUT_RELOC64(mt->bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + offset); + } else { + OUT_RELOC(mt->bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + offset); + } + OUT_BATCH(0xffffffff); /* white, but only alpha gets written */ + ADVANCE_BATCH_TILED(dst_y_tiled, false); + } } - OUT_BATCH(0xffffffff); /* white, but only alpha gets written */ - ADVANCE_BATCH_TILED(dst_y_tiled, false); brw_emit_mi_flush(brw); } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/intel_blit.h mesa-17.0.7/src/mesa/drivers/dri/i965/intel_blit.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/intel_blit.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/intel_blit.h 2017-06-01 10:37:10.000000000 +0000 @@ -31,12 +31,12 @@ bool intelEmitCopyBlit(struct brw_context *brw, GLuint cpp, - GLshort src_pitch, + int32_t src_pitch, drm_intel_bo *src_buffer, GLuint src_offset, uint32_t src_tiling, uint32_t src_tr_mode, - GLshort dst_pitch, + int32_t dst_pitch, drm_intel_bo *dst_buffer, GLuint dst_offset, uint32_t dst_tiling, @@ -58,6 +58,15 @@ uint32_t width, uint32_t height, GLenum logicop); +bool intel_miptree_copy(struct brw_context *brw, + struct intel_mipmap_tree *src_mt, + int src_level, int src_slice, + uint32_t src_x, uint32_t src_y, + struct intel_mipmap_tree *dst_mt, + int dst_level, int dst_slice, + uint32_t dst_x, uint32_t dst_y, + uint32_t src_width, uint32_t src_height); + bool intelEmitImmediateColorExpandBlit(struct brw_context *brw, GLuint cpp, diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/intel_copy_image.c mesa-17.0.7/src/mesa/drivers/dri/i965/intel_copy_image.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/intel_copy_image.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/intel_copy_image.c 2017-06-01 10:37:10.000000000 +0000 @@ -34,98 +34,6 @@ #include "main/teximage.h" #include "drivers/common/meta.h" -static bool -copy_image_with_blitter(struct brw_context *brw, - struct intel_mipmap_tree *src_mt, int src_level, - int src_x, int src_y, int src_z, - struct intel_mipmap_tree *dst_mt, int dst_level, - int dst_x, int dst_y, int dst_z, - int src_width, int src_height) -{ - GLuint bw, bh; - uint32_t src_image_x, src_image_y, dst_image_x, dst_image_y; - - /* The blitter doesn't understand multisampling at all. */ - if (src_mt->num_samples > 0 || dst_mt->num_samples > 0) - return false; - - if (src_mt->format == MESA_FORMAT_S_UINT8) - return false; - - /* According to the Ivy Bridge PRM, Vol1 Part4, section 1.2.1.2 (Graphics - * Data Size Limitations): - * - * The BLT engine is capable of transferring very large quantities of - * graphics data. Any graphics data read from and written to the - * destination is permitted to represent a number of pixels that - * occupies up to 65,536 scan lines and up to 32,768 bytes per scan line - * at the destination. The maximum number of pixels that may be - * represented per scan line’s worth of graphics data depends on the - * color depth. - * - * Furthermore, intelEmitCopyBlit (which is called below) uses a signed - * 16-bit integer to represent buffer pitch, so it can only handle buffer - * pitches < 32k. - * - * As a result of these two limitations, we can only use the blitter to do - * this copy when the miptree's pitch is less than 32k. - */ - if (src_mt->pitch >= 32768 || - dst_mt->pitch >= 32768) { - perf_debug("Falling back due to >=32k pitch\n"); - return false; - } - - intel_miptree_get_image_offset(src_mt, src_level, src_z, - &src_image_x, &src_image_y); - - if (_mesa_is_format_compressed(src_mt->format)) { - _mesa_get_format_block_size(src_mt->format, &bw, &bh); - - assert(src_x % bw == 0); - assert(src_y % bh == 0); - assert(src_width % bw == 0); - assert(src_height % bh == 0); - - src_x /= (int)bw; - src_y /= (int)bh; - src_width /= (int)bw; - src_height /= (int)bh; - } - src_x += src_image_x; - src_y += src_image_y; - - intel_miptree_get_image_offset(dst_mt, dst_level, dst_z, - &dst_image_x, &dst_image_y); - - if (_mesa_is_format_compressed(dst_mt->format)) { - _mesa_get_format_block_size(dst_mt->format, &bw, &bh); - - assert(dst_x % bw == 0); - assert(dst_y % bh == 0); - - dst_x /= (int)bw; - dst_y /= (int)bh; - } - dst_x += dst_image_x; - dst_y += dst_image_y; - - return intelEmitCopyBlit(brw, - src_mt->cpp, - src_mt->pitch, - src_mt->bo, src_mt->offset, - src_mt->tiling, - src_mt->tr_mode, - dst_mt->pitch, - dst_mt->bo, dst_mt->offset, - dst_mt->tiling, - dst_mt->tr_mode, - src_x, src_y, - dst_x, dst_y, - src_width, src_height, - GL_COPY); -} - static void copy_image_with_memcpy(struct brw_context *brw, struct intel_mipmap_tree *src_mt, int src_level, @@ -210,30 +118,14 @@ int dst_x, int dst_y, int dst_z, unsigned dst_level, int src_width, int src_height) { - struct gl_context *ctx = &brw->ctx; unsigned bw, bh; - if (brw->gen >= 6 && - brw->format_supported_as_render_target[dst_mt->format] && - !_mesa_is_format_compressed(src_mt->format)) { - - /* We'll use the destination format for both images */ - mesa_format format = dst_mt->format; - - brw_blorp_blit_miptrees(brw, - src_mt, src_level, src_z, format, SWIZZLE_XYZW, - dst_mt, dst_level, dst_z, format, - src_x, src_y, - src_x + src_width, src_y + src_height, - dst_x, dst_y, - dst_x + src_width, dst_y + src_height, - GL_NEAREST, false, false, /* mirror */ - false, false); - return; - } - - if (src_mt->num_samples > 0 || dst_mt->num_samples > 0) { - _mesa_problem(ctx, "Failed to copy multisampled texture with BLORP\n"); + if (brw->gen >= 6) { + brw_blorp_copy_miptrees(brw, + src_mt, src_level, src_z, + dst_mt, dst_level, dst_z, + src_x, src_y, dst_x, dst_y, + src_width, src_height); return; } @@ -243,11 +135,11 @@ */ intel_miptree_all_slices_resolve_hiz(brw, src_mt); intel_miptree_all_slices_resolve_depth(brw, src_mt); - intel_miptree_resolve_color(brw, src_mt, 0); + intel_miptree_all_slices_resolve_color(brw, src_mt, 0); intel_miptree_all_slices_resolve_hiz(brw, dst_mt); intel_miptree_all_slices_resolve_depth(brw, dst_mt); - intel_miptree_resolve_color(brw, dst_mt, 0); + intel_miptree_all_slices_resolve_color(brw, dst_mt, 0); _mesa_get_format_block_size(src_mt->format, &bw, &bh); @@ -262,11 +154,9 @@ if (src_height < bh) src_height = ALIGN_NPOT(src_height, bh); - if (copy_image_with_blitter(brw, src_mt, src_level, - src_x, src_y, src_z, - dst_mt, dst_level, - dst_x, dst_y, dst_z, - src_width, src_height)) + if (intel_miptree_copy(brw, src_mt, src_level, src_z, src_x, src_y, + dst_mt, dst_level, dst_z, dst_x, dst_y, + src_width, src_height)) return; /* This is a worst-case scenario software fallback that maps the two @@ -293,16 +183,6 @@ struct intel_mipmap_tree *src_mt, *dst_mt; unsigned src_level, dst_level; - if (brw->gen < 6 && - _mesa_meta_CopyImageSubData_uncompressed(ctx, - src_image, src_renderbuffer, - src_x, src_y, src_z, - dst_image, dst_renderbuffer, - dst_x, dst_y, dst_z, - src_width, src_height)) { - return; - } - if (src_image) { src_mt = intel_texture_image(src_image)->mt; src_level = src_image->Level + src_image->TexObject->MinLevel; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/intel_debug.h mesa-17.0.7/src/mesa/drivers/dri/i965/intel_debug.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/intel_debug.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/intel_debug.h 2017-06-01 10:37:10.000000000 +0000 @@ -58,22 +58,21 @@ #define DEBUG_SHADER_TIME (1ull << 22) #define DEBUG_BLORP (1ull << 23) #define DEBUG_NO16 (1ull << 24) -#define DEBUG_VUE (1ull << 25) -#define DEBUG_NO_DUAL_OBJECT_GS (1ull << 26) -#define DEBUG_OPTIMIZER (1ull << 27) -#define DEBUG_ANNOTATION (1ull << 28) -#define DEBUG_NO8 (1ull << 29) -#define DEBUG_VEC4VS (1ull << 30) -#define DEBUG_SPILL_FS (1ull << 31) -#define DEBUG_SPILL_VEC4 (1ull << 32) -#define DEBUG_CS (1ull << 33) -#define DEBUG_HEX (1ull << 34) -#define DEBUG_NO_COMPACTION (1ull << 35) -#define DEBUG_TCS (1ull << 36) -#define DEBUG_TES (1ull << 37) -#define DEBUG_L3 (1ull << 38) -#define DEBUG_DO32 (1ull << 39) -#define DEBUG_NO_RBC (1ull << 40) +#define DEBUG_NO_DUAL_OBJECT_GS (1ull << 25) +#define DEBUG_OPTIMIZER (1ull << 26) +#define DEBUG_ANNOTATION (1ull << 27) +#define DEBUG_NO8 (1ull << 28) +#define DEBUG_VEC4VS (1ull << 29) +#define DEBUG_SPILL_FS (1ull << 30) +#define DEBUG_SPILL_VEC4 (1ull << 31) +#define DEBUG_CS (1ull << 32) +#define DEBUG_HEX (1ull << 33) +#define DEBUG_NO_COMPACTION (1ull << 34) +#define DEBUG_TCS (1ull << 35) +#define DEBUG_TES (1ull << 36) +#define DEBUG_L3 (1ull << 37) +#define DEBUG_DO32 (1ull << 38) +#define DEBUG_NO_RBC (1ull << 39) #ifdef HAVE_ANDROID_PLATFORM #define LOG_TAG "INTEL-MESA" diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/intel_extensions.c mesa-17.0.7/src/mesa/drivers/dri/i965/intel_extensions.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/intel_extensions.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/intel_extensions.c 2017-06-01 10:37:10.000000000 +0000 @@ -26,145 +26,10 @@ #include "main/version.h" #include "brw_context.h" +#include "brw_defines.h" #include "intel_batchbuffer.h" /** - * Test if we can use MI_LOAD_REGISTER_MEM from an untrusted batchbuffer. - * - * Some combinations of hardware and kernel versions allow this feature, - * while others don't. Instead of trying to enumerate every case, just - * try and write a register and see if works. - */ -static bool -can_do_pipelined_register_writes(struct brw_context *brw) -{ - /** - * gen >= 8 specifically allows these writes. gen <= 6 also - * doesn't block them. - */ - if (brw->gen != 7) - return true; - - static int result = -1; - if (result != -1) - return result; - - /* We use SO_WRITE_OFFSET0 since you're supposed to write it (unlike the - * statistics registers), and we already reset it to zero before using it. - */ - const int reg = GEN7_SO_WRITE_OFFSET(0); - const int expected_value = 0x1337d0d0; - const int offset = 100; - - /* The register we picked only exists on Gen7+. */ - assert(brw->gen == 7); - - uint32_t *data; - /* Set a value in a BO to a known quantity. The workaround BO already - * exists and doesn't contain anything important, so we may as well use it. - */ - drm_intel_bo_map(brw->workaround_bo, true); - data = brw->workaround_bo->virtual; - data[offset] = 0xffffffff; - drm_intel_bo_unmap(brw->workaround_bo); - - /* Write the register. */ - BEGIN_BATCH(3); - OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2)); - OUT_BATCH(reg); - OUT_BATCH(expected_value); - ADVANCE_BATCH(); - - brw_emit_mi_flush(brw); - - /* Save the register's value back to the buffer. */ - BEGIN_BATCH(3); - OUT_BATCH(MI_STORE_REGISTER_MEM | (3 - 2)); - OUT_BATCH(reg); - OUT_RELOC(brw->workaround_bo, - I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, - offset * sizeof(uint32_t)); - ADVANCE_BATCH(); - - intel_batchbuffer_flush(brw); - - /* Check whether the value got written. */ - drm_intel_bo_map(brw->workaround_bo, false); - data = brw->workaround_bo->virtual; - bool success = data[offset] == expected_value; - drm_intel_bo_unmap(brw->workaround_bo); - - result = success; - - return success; -} - -static bool -can_write_oacontrol(struct brw_context *brw) -{ - if (brw->gen < 6 || brw->gen >= 8) - return false; - - static int result = -1; - if (result != -1) - return result; - - /* Set "Select Context ID" to a particular address (which is likely not a - * context), but leave all counting disabled. This should be harmless. - */ - const int expected_value = 0x31337000; - const int offset = 110; - - uint32_t *data; - /* Set a value in a BO to a known quantity. The workaround BO already - * exists and doesn't contain anything important, so we may as well use it. - */ - drm_intel_bo_map(brw->workaround_bo, true); - data = brw->workaround_bo->virtual; - data[offset] = 0xffffffff; - drm_intel_bo_unmap(brw->workaround_bo); - - /* Write OACONTROL. */ - BEGIN_BATCH(3); - OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2)); - OUT_BATCH(OACONTROL); - OUT_BATCH(expected_value); - ADVANCE_BATCH(); - - brw_emit_mi_flush(brw); - - /* Save the register's value back to the buffer. */ - BEGIN_BATCH(3); - OUT_BATCH(MI_STORE_REGISTER_MEM | (3 - 2)); - OUT_BATCH(OACONTROL); - OUT_RELOC(brw->workaround_bo, - I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, - offset * sizeof(uint32_t)); - ADVANCE_BATCH(); - - brw_emit_mi_flush(brw); - - /* Set OACONTROL back to zero (everything off). */ - BEGIN_BATCH(3); - OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2)); - OUT_BATCH(OACONTROL); - OUT_BATCH(0); - ADVANCE_BATCH(); - - intel_batchbuffer_flush(brw); - - /* Check whether the value got written. */ - drm_intel_bo_map(brw->workaround_bo, false); - data = brw->workaround_bo->virtual; - bool success = data[offset] == expected_value; - drm_intel_bo_unmap(brw->workaround_bo); - - result = success; - - return success; -} - -/** * Initializes potential list of extensions if ctx == NULL, or actually enables * extensions for a context. */ @@ -206,6 +71,7 @@ ctx->Extensions.ARB_shader_bit_encoding = true; ctx->Extensions.ARB_shader_draw_parameters = true; ctx->Extensions.ARB_shader_texture_lod = true; + ctx->Extensions.ARB_shading_language_packing = true; ctx->Extensions.ARB_shadow = true; ctx->Extensions.ARB_sync = true; ctx->Extensions.ARB_texture_border_clamp = true; @@ -269,23 +135,27 @@ ctx->Extensions.OES_texture_half_float_linear = true; if (brw->gen >= 8) - ctx->Const.GLSLVersion = 430; + ctx->Const.GLSLVersion = 450; + else if (brw->is_haswell && can_do_pipelined_register_writes(brw->screen)) + ctx->Const.GLSLVersion = 450; else if (brw->gen >= 6) ctx->Const.GLSLVersion = 330; else ctx->Const.GLSLVersion = 120; _mesa_override_glsl_version(&ctx->Const); + ctx->Extensions.EXT_shader_integer_mix = ctx->Const.GLSLVersion >= 130; + ctx->Extensions.MESA_shader_integer_functions = ctx->Const.GLSLVersion >= 130; + + if (brw->is_g4x || brw->gen >= 5) { + ctx->Extensions.MESA_shader_framebuffer_fetch_non_coherent = true; + ctx->Extensions.KHR_blend_equation_advanced = true; + } + if (brw->gen >= 5) { ctx->Extensions.ARB_texture_query_levels = ctx->Const.GLSLVersion >= 130; ctx->Extensions.ARB_texture_query_lod = true; - ctx->Extensions.EXT_shader_integer_mix = ctx->Const.GLSLVersion >= 130; ctx->Extensions.EXT_timer_query = true; - - if (brw->gen == 5 || can_write_oacontrol(brw)) { - ctx->Extensions.AMD_performance_monitor = true; - ctx->Extensions.INTEL_performance_query = true; - } } if (brw->gen >= 6) { @@ -294,11 +164,11 @@ ctx->Extensions.ARB_conditional_render_inverted = true; ctx->Extensions.ARB_cull_distance = true; ctx->Extensions.ARB_draw_buffers_blend = true; + ctx->Extensions.ARB_enhanced_layouts = true; ctx->Extensions.ARB_ES3_compatibility = true; ctx->Extensions.ARB_fragment_layer_viewport = true; ctx->Extensions.ARB_sample_shading = true; ctx->Extensions.ARB_shading_language_420pack = true; - ctx->Extensions.ARB_shading_language_packing = true; ctx->Extensions.ARB_texture_buffer_object = true; ctx->Extensions.ARB_texture_buffer_object_rgb32 = true; ctx->Extensions.ARB_texture_buffer_range = true; @@ -314,21 +184,20 @@ ctx->Extensions.OES_depth_texture_cube_map = true; ctx->Extensions.OES_sample_variables = true; - ctx->Extensions.ARB_timer_query = brw->intelScreen->hw_has_timestamp; + ctx->Extensions.ARB_timer_query = brw->screen->hw_has_timestamp; /* Only enable this in core profile because other parts of Mesa behave * slightly differently when the extension is enabled. */ if (ctx->API == API_OPENGL_CORE) { ctx->Extensions.ARB_shader_subroutine = true; + ctx->Extensions.ARB_shader_viewport_layer_array = true; ctx->Extensions.ARB_viewport_array = true; ctx->Extensions.AMD_vertex_shader_viewport_index = true; } } brw->predicate.supported = false; - brw->can_do_pipelined_register_writes = - can_do_pipelined_register_writes(brw); if (brw->gen >= 7) { ctx->Extensions.ARB_conservative_depth = true; @@ -336,6 +205,7 @@ ctx->Extensions.ARB_framebuffer_no_attachments = true; ctx->Extensions.ARB_gpu_shader5 = true; ctx->Extensions.ARB_shader_atomic_counters = true; + ctx->Extensions.ARB_shader_atomic_counter_ops = true; ctx->Extensions.ARB_shader_clock = true; ctx->Extensions.ARB_shader_image_load_store = true; ctx->Extensions.ARB_shader_image_size = true; @@ -345,37 +215,43 @@ ctx->Extensions.ARB_texture_view = true; ctx->Extensions.ARB_shader_storage_buffer_object = true; ctx->Extensions.EXT_shader_samples_identical = true; + ctx->Extensions.OES_primitive_bounding_box = true; ctx->Extensions.OES_texture_buffer = true; - if (brw->can_do_pipelined_register_writes) { + if (can_do_pipelined_register_writes(brw->screen)) { ctx->Extensions.ARB_draw_indirect = true; ctx->Extensions.ARB_transform_feedback2 = true; ctx->Extensions.ARB_transform_feedback3 = true; ctx->Extensions.ARB_transform_feedback_instanced = true; - if ((brw->gen >= 8 || brw->intelScreen->cmd_parser_version >= 5) && - ctx->Const.MaxComputeWorkGroupSize[0] >= 1024) + if (can_do_compute_dispatch(brw->screen) && + ctx->Const.MaxComputeWorkGroupSize[0] >= 1024) { ctx->Extensions.ARB_compute_shader = true; + ctx->Extensions.ARB_ES3_1_compatibility = + brw->gen >= 8 || brw->is_haswell; + } - if (brw->intelScreen->cmd_parser_version >= 2) + if (can_do_predicate_writes(brw->screen)) brw->predicate.supported = true; } + } - /* Only enable this in core profile because other parts of Mesa behave - * slightly differently when the extension is enabled. - */ - if (ctx->API == API_OPENGL_CORE) { - ctx->Extensions.ARB_viewport_array = true; - ctx->Extensions.AMD_vertex_shader_viewport_index = true; - ctx->Extensions.ARB_shader_subroutine = true; - } + if (brw->gen >= 8 || brw->is_haswell) { + ctx->Extensions.ARB_gpu_shader_fp64 = true; + ctx->Extensions.ARB_shader_precision = true; + ctx->Extensions.ARB_stencil_texturing = true; + ctx->Extensions.ARB_texture_stencil8 = true; + ctx->Extensions.ARB_vertex_attrib_64bit = true; + ctx->Extensions.OES_geometry_shader = true; + ctx->Extensions.OES_texture_cube_map_array = true; + ctx->Extensions.OES_viewport_array = true; } if (brw->gen >= 8 || brw->is_haswell || brw->is_baytrail) { ctx->Extensions.ARB_robust_buffer_access_behavior = true; } - if (brw->intelScreen->has_mi_math_and_lrr) { + if (can_do_mi_math_and_lrr(brw->screen)) { ctx->Extensions.ARB_query_buffer_object = true; } @@ -388,17 +264,18 @@ } if (brw->gen >= 8) { - ctx->Extensions.ARB_shader_precision = true; - ctx->Extensions.ARB_stencil_texturing = true; - ctx->Extensions.ARB_texture_stencil8 = true; - ctx->Extensions.ARB_gpu_shader_fp64 = true; - ctx->Extensions.ARB_vertex_attrib_64bit = true; - ctx->Extensions.OES_shader_io_blocks = true; + ctx->Extensions.ARB_ES3_2_compatibility = true; } if (brw->gen >= 9) { - ctx->Extensions.KHR_texture_compression_astc_ldr = true; + ctx->Extensions.ANDROID_extension_pack_es31a = true; ctx->Extensions.ARB_shader_stencil_export = true; + ctx->Extensions.KHR_blend_equation_advanced_coherent = true; + ctx->Extensions.KHR_texture_compression_astc_ldr = true; + ctx->Extensions.KHR_texture_compression_astc_sliced_3d = true; + ctx->Extensions.INTEL_conservative_rasterization = true; + ctx->Extensions.MESA_shader_framebuffer_fetch = true; + ctx->Extensions.ARB_post_depth_coverage = true; } if (ctx->API == API_OPENGL_CORE) diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/intel_fbo.c mesa-17.0.7/src/mesa/drivers/dri/i965/intel_fbo.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/intel_fbo.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/intel_fbo.c 2017-06-01 10:37:10.000000000 +0000 @@ -49,6 +49,7 @@ #include "intel_screen.h" #include "intel_tex.h" #include "brw_context.h" +#include "brw_defines.h" #define FILE_DEBUG_FLAG DEBUG_FBO @@ -281,7 +282,7 @@ GLuint width, GLuint height) { struct brw_context *brw = brw_context(ctx); - struct intel_screen *screen = brw->intelScreen; + struct intel_screen *screen = brw->screen; struct intel_renderbuffer *irb = intel_renderbuffer(rb); assert(rb->Format != MESA_FORMAT_NONE); @@ -331,12 +332,11 @@ { struct brw_context *brw = brw_context(ctx); struct intel_renderbuffer *irb; - __DRIscreen *screen; + __DRIscreen *dri_screen = brw->screen->driScrnPriv; __DRIimage *image; - screen = brw->intelScreen->driScrnPriv; - image = screen->dri2.image->lookupEGLImage(screen, image_handle, - screen->loaderPrivate); + image = dri_screen->dri2.image->lookupEGLImage(dri_screen, image_handle, + dri_screen->loaderPrivate); if (image == NULL) return; @@ -540,7 +540,7 @@ switch (mt->msaa_layout) { case INTEL_MSAA_LAYOUT_UMS: case INTEL_MSAA_LAYOUT_CMS: - layer_multiplier = mt->num_samples; + layer_multiplier = MAX2(mt->num_samples, 1); break; default: @@ -841,6 +841,14 @@ return mask; } + if (ctx->Color.sRGBEnabled && + _mesa_get_format_color_encoding(src_irb->mt->format) != + _mesa_get_format_color_encoding(dst_irb->mt->format)) { + perf_debug("glBlitFramebuffer() with sRGB conversion cannot be " + "handled by BLT path.\n"); + return mask; + } + if (!intel_miptree_blit(brw, src_irb->mt, src_irb->mt_level, src_irb->mt_layer, @@ -1074,14 +1082,6 @@ return; if (brw->gen >= 6) { - if (brw->gen == 6) { - /* [Dev-SNB{W/A}]: Before a PIPE_CONTROL with Write Cache - * Flush Enable = 1, a PIPE_CONTROL with any non-zero - * post-sync-op is required. - */ - brw_emit_post_sync_nonzero_flush(brw); - } - brw_emit_pipe_control_flush(brw, PIPE_CONTROL_DEPTH_CACHE_FLUSH | PIPE_CONTROL_RENDER_TARGET_FLUSH | diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/intel_fbo.h mesa-17.0.7/src/mesa/drivers/dri/i965/intel_fbo.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/intel_fbo.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/intel_fbo.h 2017-06-01 10:37:10.000000000 +0000 @@ -130,10 +130,8 @@ intel_renderbuffer(struct gl_renderbuffer *rb) { struct intel_renderbuffer *irb = (struct intel_renderbuffer *) rb; - if (irb && irb->Base.Base.ClassID == INTEL_RB_CLASS) { - /*_mesa_warning(NULL, "Returning non-intel Rb\n");*/ + if (irb && irb->Base.Base.ClassID == INTEL_RB_CLASS) return irb; - } else return NULL; } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/intel_mipmap_tree.c mesa-17.0.7/src/mesa/drivers/dri/i965/intel_mipmap_tree.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/intel_mipmap_tree.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/intel_mipmap_tree.c 2017-06-01 10:37:10.000000000 +0000 @@ -26,8 +26,6 @@ #include #include -#include "isl/isl.h" - #include "intel_batchbuffer.h" #include "intel_mipmap_tree.h" #include "intel_resolve_map.h" @@ -66,7 +64,7 @@ */ static enum intel_msaa_layout compute_msaa_layout(struct brw_context *brw, mesa_format format, - bool disable_aux_buffers) + enum intel_aux_disable aux_disable) { /* Prior to Gen7, all MSAA surfaces used IMS layout. */ if (brw->gen < 7) @@ -92,7 +90,7 @@ */ if (brw->gen == 7 && _mesa_get_format_datatype(format) == GL_INT) { return INTEL_MSAA_LAYOUT_UMS; - } else if (disable_aux_buffers) { + } else if (aux_disable & INTEL_AUX_DISABLE_MCS) { /* We can't use the CMS layout because it uses an aux buffer, the MCS * buffer. So fallback to UMS, which is identical to CMS without the * MCS. */ @@ -103,66 +101,6 @@ } } - -/** - * For single-sampled render targets ("non-MSRT"), the MCS buffer is a - * scaled-down bitfield representation of the color buffer which is capable of - * recording when blocks of the color buffer are equal to the clear value. - * This function returns the block size that will be used by the MCS buffer - * corresponding to a certain color miptree. - * - * From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render Target(s)", - * beneath the "Fast Color Clear" bullet (p327): - * - * The following table describes the RT alignment - * - * Pixels Lines - * TiledY RT CL - * bpp - * 32 8 4 - * 64 4 4 - * 128 2 4 - * TiledX RT CL - * bpp - * 32 16 2 - * 64 8 2 - * 128 4 2 - * - * This alignment has the following uses: - * - * - For figuring out the size of the MCS buffer. Each 4k tile in the MCS - * buffer contains 128 blocks horizontally and 256 blocks vertically. - * - * - For figuring out alignment restrictions for a fast clear operation. Fast - * clear operations must always clear aligned multiples of 16 blocks - * horizontally and 32 blocks vertically. - * - * - For scaling down the coordinates sent through the render pipeline during - * a fast clear. X coordinates must be scaled down by 8 times the block - * width, and Y coordinates by 16 times the block height. - * - * - For scaling down the coordinates sent through the render pipeline during - * a "Render Target Resolve" operation. X coordinates must be scaled down - * by half the block width, and Y coordinates by half the block height. - */ -void -intel_get_non_msrt_mcs_alignment(const struct intel_mipmap_tree *mt, - unsigned *width_px, unsigned *height) -{ - switch (mt->tiling) { - default: - unreachable("Non-MSRT MCS requires X or Y tiling"); - /* In release builds, fall through */ - case I915_TILING_Y: - *width_px = 32 / mt->cpp; - *height = 4; - break; - case I915_TILING_X: - *width_px = 64 / mt->cpp; - *height = 2; - } -} - bool intel_tiling_supports_non_msrt_mcs(const struct brw_context *brw, unsigned tiling) @@ -211,7 +149,7 @@ if (brw->gen < 7) return false; - if (mt->disable_aux_buffers) + if (mt->aux_disable & INTEL_AUX_DISABLE_MCS) return false; /* This function applies only to non-multisampled render targets. */ @@ -228,32 +166,40 @@ if (mt->cpp != 4 && mt->cpp != 8 && mt->cpp != 16) return false; - if (mt->first_level != 0 || mt->last_level != 0) { - if (brw->gen >= 8) { - perf_debug("Multi-LOD fast clear - giving up (%dx%dx%d).\n", - mt->logical_width0, mt->logical_height0, mt->last_level); - } - return false; - } + const bool mip_mapped = mt->first_level != 0 || mt->last_level != 0; + const bool arrayed = mt->physical_depth0 != 1; - /* Check for layered surfaces. */ - if (mt->physical_depth0 != 1) { + if (arrayed) { /* Multisample surfaces with the CMS layout are not layered surfaces, * yet still have physical_depth0 > 1. Assert that we don't * accidentally reject a multisampled surface here. We should have * rejected it earlier by explicitly checking the sample count. */ assert(mt->num_samples <= 1); + } - if (brw->gen >= 8) { - perf_debug("Layered fast clear - giving up. (%dx%d%d)\n", - mt->logical_width0, mt->logical_height0, - mt->physical_depth0); - } - + /* Handle the hardware restrictions... + * + * All GENs have the following restriction: "MCS buffer for non-MSRT is + * supported only for RT formats 32bpp, 64bpp, and 128bpp." + * + * From the HSW PRM Volume 7: 3D-Media-GPGPU, page 652: (Color Clear of + * Non-MultiSampler Render Target Restrictions) Support is for + * non-mip-mapped and non-array surface types only. + * + * From the BDW PRM Volume 7: 3D-Media-GPGPU, page 649: (Color Clear of + * Non-MultiSampler Render Target Restriction). Mip-mapped and arrayed + * surfaces are supported with MCS buffer layout with these alignments in + * the RT space: Horizontal Alignment = 256 and Vertical Alignment = 128. + * + * From the SKL PRM Volume 7: 3D-Media-GPGPU, page 632: (Color Clear of + * Non-MultiSampler Render Target Restriction). Mip-mapped and arrayed + * surfaces are supported with MCS buffer layout with these alignments in + * the RT space: Horizontal Alignment = 128 and Vertical Alignment = 64. + */ + if (brw->gen < 8 && (mip_mapped || arrayed)) return false; - } /* There's no point in using an MCS buffer if the surface isn't in a * renderable format. @@ -264,7 +210,7 @@ if (brw->gen >= 9) { mesa_format linear_format = _mesa_get_srgb_format_linear(mt->format); const uint32_t brw_format = brw_format_for_mesa_format(linear_format); - return isl_format_supports_lossless_compression(brw->intelScreen->devinfo, + return isl_format_supports_lossless_compression(&brw->screen->devinfo, brw_format); } else return true; @@ -284,7 +230,7 @@ return false; /* Compression always requires auxiliary buffer. */ - if (!mt->mcs_mt) + if (!mt->mcs_buf) return false; /* Single sample compression is represented re-using msaa compression @@ -376,20 +322,22 @@ mt->logical_width0 = width0; mt->logical_height0 = height0; mt->logical_depth0 = depth0; - mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_NO_MCS; - mt->disable_aux_buffers = (layout_flags & MIPTREE_LAYOUT_DISABLE_AUX) != 0; + mt->aux_disable = (layout_flags & MIPTREE_LAYOUT_DISABLE_AUX) != 0 ? + INTEL_AUX_DISABLE_ALL : INTEL_AUX_DISABLE_NONE; + mt->aux_disable |= INTEL_AUX_DISABLE_CCS; mt->is_scanout = (layout_flags & MIPTREE_LAYOUT_FOR_SCANOUT) != 0; exec_list_make_empty(&mt->hiz_map); + exec_list_make_empty(&mt->color_resolve_map); mt->cpp = _mesa_get_format_bytes(format); mt->num_samples = num_samples; mt->compressed = _mesa_is_format_compressed(format); mt->msaa_layout = INTEL_MSAA_LAYOUT_NONE; mt->refcount = 1; + int depth_multiply = 1; if (num_samples > 1) { /* Adjust width/height/depth for MSAA */ - mt->msaa_layout = compute_msaa_layout(brw, format, - mt->disable_aux_buffers); + mt->msaa_layout = compute_msaa_layout(brw, format, mt->aux_disable); if (mt->msaa_layout == INTEL_MSAA_LAYOUT_IMS) { /* From the Ivybridge PRM, Volume 1, Part 1, page 108: * "If the surface is multisampled and it is a depth or stencil @@ -472,7 +420,8 @@ } } else { /* Non-interleaved */ - depth0 *= num_samples; + depth_multiply = num_samples; + depth0 *= depth_multiply; } } @@ -501,10 +450,8 @@ } } - if (target == GL_TEXTURE_CUBE_MAP) { - assert(depth0 == 1); - depth0 = 6; - } + if (target == GL_TEXTURE_CUBE_MAP) + assert(depth0 == 6 * depth_multiply); mt->physical_width0 = width0; mt->physical_height0 = height0; @@ -536,6 +483,7 @@ intel_miptree_release(&mt); return NULL; } + mt->stencil_mt->r8stencil_needs_update = true; /* Fix up the Z miptree format for how we're splitting out separate * stencil. Gen7 expects there to be no stencil bits in its depth buffer. @@ -580,7 +528,7 @@ brw_miptree_layout(brw, mt, layout_flags); - if (mt->disable_aux_buffers) + if (mt->aux_disable & INTEL_AUX_DISABLE_MCS) assert(mt->msaa_layout != INTEL_MSAA_LAYOUT_CMS); return mt; @@ -675,7 +623,6 @@ etc_format = (format != tex_format) ? tex_format : MESA_FORMAT_NONE; - assert((layout_flags & MIPTREE_LAYOUT_DISABLE_AUX) == 0); assert((layout_flags & MIPTREE_LAYOUT_FOR_BO) == 0); mt = intel_miptree_create_layout(brw, target, format, first_level, last_level, width0, @@ -789,8 +736,22 @@ */ if (intel_tiling_supports_non_msrt_mcs(brw, mt->tiling) && intel_miptree_supports_non_msrt_fast_clear(brw, mt)) { - mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_RESOLVED; + mt->aux_disable &= ~INTEL_AUX_DISABLE_CCS; assert(brw->gen < 8 || mt->halign == 16 || num_samples <= 1); + + /* On Gen9+ clients are not currently capable of consuming compressed + * single-sampled buffers. Disabling compression allows us to skip + * resolves. + */ + const bool lossless_compression_disabled = INTEL_DEBUG & DEBUG_NO_RBC; + const bool is_lossless_compressed = + unlikely(!lossless_compression_disabled) && + brw->gen >= 9 && !mt->is_scanout && + intel_miptree_supports_lossless_compressed(brw, mt); + + if (is_lossless_compressed) { + intel_miptree_alloc_non_msrt_mcs(brw, mt, is_lossless_compressed); + } } return mt; @@ -897,7 +858,7 @@ */ if (intel_tiling_supports_non_msrt_mcs(intel, singlesample_mt->tiling) && intel_miptree_supports_non_msrt_fast_clear(intel, singlesample_mt)) { - singlesample_mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_RESOLVED; + singlesample_mt->aux_disable &= ~INTEL_AUX_DISABLE_CCS; } if (num_samples == 0) { @@ -985,7 +946,7 @@ } static void -intel_miptree_hiz_buffer_free(struct intel_miptree_aux_buffer *hiz_buf) +intel_miptree_hiz_buffer_free(struct intel_miptree_hiz_buffer *hiz_buf) { if (hiz_buf == NULL) return; @@ -993,7 +954,7 @@ if (hiz_buf->mt) intel_miptree_release(&hiz_buf->mt); else - drm_intel_bo_unreference(hiz_buf->bo); + drm_intel_bo_unreference(hiz_buf->aux_base.bo); free(hiz_buf); } @@ -1012,9 +973,14 @@ drm_intel_bo_unreference((*mt)->bo); intel_miptree_release(&(*mt)->stencil_mt); + intel_miptree_release(&(*mt)->r8stencil_mt); intel_miptree_hiz_buffer_free((*mt)->hiz_buf); - intel_miptree_release(&(*mt)->mcs_mt); + if ((*mt)->mcs_buf) { + drm_intel_bo_unreference((*mt)->mcs_buf->bo); + free((*mt)->mcs_buf); + } intel_resolve_map_clear(&(*mt)->hiz_map); + intel_resolve_map_clear(&(*mt)->color_resolve_map); intel_miptree_release(&(*mt)->plane[0]); intel_miptree_release(&(*mt)->plane[1]); @@ -1045,6 +1011,15 @@ *height = 1; *depth = image->Height; break; + case GL_TEXTURE_CUBE_MAP: + /* For Cube maps, the mesa/main api layer gives us a depth of 1 even + * though we really have 6 slices. + */ + assert(image->Depth == 1); + *width = image->Width; + *height = image->Height; + *depth = 6; + break; default: *width = image->Width; *height = image->Height; @@ -1234,12 +1209,9 @@ */ void intel_get_tile_masks(uint32_t tiling, uint32_t tr_mode, uint32_t cpp, - bool map_stencil_as_y_tiled, uint32_t *mask_x, uint32_t *mask_y) { uint32_t tile_w_bytes, tile_h; - if (map_stencil_as_y_tiled) - tiling = I915_TILING_Y; intel_get_tile_dims(tiling, tr_mode, cpp, &tile_w_bytes, &tile_h); @@ -1254,26 +1226,12 @@ */ uint32_t intel_miptree_get_aligned_offset(const struct intel_mipmap_tree *mt, - uint32_t x, uint32_t y, - bool map_stencil_as_y_tiled) + uint32_t x, uint32_t y) { int cpp = mt->cpp; uint32_t pitch = mt->pitch; uint32_t tiling = mt->tiling; - if (map_stencil_as_y_tiled) { - tiling = I915_TILING_Y; - - /* When mapping a W-tiled stencil buffer as Y-tiled, each 64-high W-tile - * gets transformed into a 32-high Y-tile. Accordingly, the pitch of - * the resulting surface is twice the pitch of the original miptree, - * since each row in the Y-tiled view corresponds to two rows in the - * actual W-tiled surface. So we need to correct the pitch before - * computing the offsets. - */ - pitch *= 2; - } - switch (tiling) { default: unreachable("not reached"); @@ -1309,13 +1267,13 @@ uint32_t x, y; uint32_t mask_x, mask_y; - intel_get_tile_masks(mt->tiling, mt->tr_mode, mt->cpp, false, &mask_x, &mask_y); + intel_get_tile_masks(mt->tiling, mt->tr_mode, mt->cpp, &mask_x, &mask_y); intel_miptree_get_image_offset(mt, level, slice, &x, &y); *tile_x = x & mask_x; *tile_y = y & mask_y; - return intel_miptree_get_aligned_offset(mt, x & ~mask_x, y & ~mask_y, false); + return intel_miptree_get_aligned_offset(mt, x & ~mask_x, y & ~mask_y); } static void @@ -1485,6 +1443,8 @@ struct intel_mipmap_tree *mt, int init_value) { + assert(mt->mcs_buf != NULL); + /* From the Ivy Bridge PRM, Vol 2 Part 1 p326: * * When MCS buffer is enabled and bound to MSRT, it is required that it @@ -1495,10 +1455,66 @@ * * Note: the clear value for MCS buffers is all 1's, so we memset to 0xff. */ - void *data = intel_miptree_map_raw(brw, mt->mcs_mt); - memset(data, init_value, mt->mcs_mt->total_height * mt->mcs_mt->pitch); - intel_miptree_unmap_raw(mt->mcs_mt); - mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_CLEAR; + const int ret = brw_bo_map_gtt(brw, mt->mcs_buf->bo, "miptree"); + if (unlikely(ret)) { + fprintf(stderr, "Failed to map mcs buffer into GTT\n"); + drm_intel_bo_unreference(mt->mcs_buf->bo); + free(mt->mcs_buf); + return; + } + void *data = mt->mcs_buf->bo->virtual; + memset(data, init_value, mt->mcs_buf->size); + drm_intel_bo_unmap(mt->mcs_buf->bo); +} + +static struct intel_miptree_aux_buffer * +intel_mcs_miptree_buf_create(struct brw_context *brw, + struct intel_mipmap_tree *mt, + mesa_format format, + unsigned mcs_width, + unsigned mcs_height, + uint32_t layout_flags) +{ + struct intel_miptree_aux_buffer *buf = calloc(sizeof(*buf), 1); + struct intel_mipmap_tree *temp_mt; + + if (!buf) + return NULL; + + /* From the Ivy Bridge PRM, Vol4 Part1 p76, "MCS Base Address": + * + * "The MCS surface must be stored as Tile Y." + */ + layout_flags |= MIPTREE_LAYOUT_TILING_Y; + temp_mt = miptree_create(brw, + mt->target, + format, + mt->first_level, + mt->last_level, + mcs_width, + mcs_height, + mt->logical_depth0, + 0 /* num_samples */, + layout_flags); + if (!temp_mt) { + free(buf); + return NULL; + } + + buf->bo = temp_mt->bo; + buf->offset = temp_mt->offset; + buf->size = temp_mt->total_height * temp_mt->pitch; + buf->pitch = temp_mt->pitch; + buf->qpitch = temp_mt->qpitch; + + /* Just hang on to the BO which backs the AUX buffer; the rest of the miptree + * structure should go away. We use miptree create simply as a means to make + * sure all the constraints for the buffer are satisfied. + */ + drm_intel_bo_reference(temp_mt->bo); + intel_miptree_release(&temp_mt); + + return buf; } static bool @@ -1507,8 +1523,8 @@ GLuint num_samples) { assert(brw->gen >= 7); /* MCS only used on Gen7+ */ - assert(mt->mcs_mt == NULL); - assert(!mt->disable_aux_buffers); + assert(mt->mcs_buf == NULL); + assert((mt->aux_disable & INTEL_AUX_DISABLE_MCS) == 0); /* Choose the correct format for the MCS buffer. All that really matters * is that we allocate the right buffer size, since we'll always be @@ -1540,101 +1556,82 @@ unreachable("Unrecognized sample count in intel_miptree_alloc_mcs"); }; - /* From the Ivy Bridge PRM, Vol4 Part1 p76, "MCS Base Address": - * - * "The MCS surface must be stored as Tile Y." - */ - const uint32_t mcs_flags = MIPTREE_LAYOUT_ACCELERATED_UPLOAD | - MIPTREE_LAYOUT_TILING_Y; - mt->mcs_mt = miptree_create(brw, - mt->target, - format, - mt->first_level, - mt->last_level, - mt->logical_width0, - mt->logical_height0, - mt->logical_depth0, - 0 /* num_samples */, - mcs_flags); + mt->mcs_buf = + intel_mcs_miptree_buf_create(brw, mt, + format, + mt->logical_width0, + mt->logical_height0, + MIPTREE_LAYOUT_ACCELERATED_UPLOAD); + if (!mt->mcs_buf) + return false; intel_miptree_init_mcs(brw, mt, 0xFF); - return mt->mcs_mt; + /* Multisampled miptrees are only supported for single level. */ + assert(mt->first_level == 0); + intel_miptree_set_fast_clear_state(brw, mt, mt->first_level, 0, + mt->logical_depth0, + INTEL_FAST_CLEAR_STATE_CLEAR); + + return true; } bool intel_miptree_alloc_non_msrt_mcs(struct brw_context *brw, - struct intel_mipmap_tree *mt) + struct intel_mipmap_tree *mt, + bool is_lossless_compressed) { - assert(mt->mcs_mt == NULL); - assert(!mt->disable_aux_buffers); + assert(mt->mcs_buf == NULL); + assert(!(mt->aux_disable & (INTEL_AUX_DISABLE_MCS | INTEL_AUX_DISABLE_CCS))); - /* The format of the MCS buffer is opaque to the driver; all that matters - * is that we get its size and pitch right. We'll pretend that the format - * is R32. Since an MCS tile covers 128 blocks horizontally, and a Y-tiled - * R32 buffer is 32 pixels across, we'll need to scale the width down by - * the block width and then a further factor of 4. Since an MCS tile - * covers 256 blocks vertically, and a Y-tiled R32 buffer is 32 rows high, - * we'll need to scale the height down by the block height and then a - * further factor of 8. - */ - const mesa_format format = MESA_FORMAT_R_UINT32; - unsigned block_width_px; - unsigned block_height; - intel_get_non_msrt_mcs_alignment(mt, &block_width_px, &block_height); - unsigned width_divisor = block_width_px * 4; - unsigned height_divisor = block_height * 8; + struct isl_surf temp_main_surf; + struct isl_surf temp_ccs_surf; - /* The Skylake MCS is twice as tall as the Broadwell MCS. - * - * In pre-Skylake, each bit in the MCS contained the state of 2 cachelines - * in the main surface. In Skylake, it's two bits. The extra bit - * doubles the MCS height, not width, because in Skylake the MCS is always - * Y-tiled. + /* Create first an ISL presentation for the main color surface and let ISL + * calculate equivalent CCS surface against it. */ - if (brw->gen >= 9) - height_divisor /= 2; + intel_miptree_get_isl_surf(brw, mt, &temp_main_surf); + if (!isl_surf_get_ccs_surf(&brw->isl_dev, &temp_main_surf, &temp_ccs_surf)) + return false; - unsigned mcs_width = - ALIGN(mt->logical_width0, width_divisor) / width_divisor; - unsigned mcs_height = - ALIGN(mt->logical_height0, height_divisor) / height_divisor; - assert(mt->logical_depth0 == 1); - uint32_t layout_flags = MIPTREE_LAYOUT_TILING_Y; + assert(temp_ccs_surf.size && + (temp_ccs_surf.size % temp_ccs_surf.row_pitch == 0)); - if (brw->gen >= 8) { - layout_flags |= MIPTREE_LAYOUT_FORCE_HALIGN16; - } + struct intel_miptree_aux_buffer *buf = calloc(sizeof(*buf), 1); + if (!buf) + return false; - /* On Gen9+ clients are not currently capable of consuming compressed - * single-sampled buffers. Disabling compression allows us to skip - * resolves. - */ - const bool lossless_compression_disabled = INTEL_DEBUG & DEBUG_NO_RBC; - const bool is_lossless_compressed = - unlikely(!lossless_compression_disabled) && - brw->gen >= 9 && !mt->is_scanout && - intel_miptree_supports_lossless_compressed(brw, mt); + buf->size = temp_ccs_surf.size; + buf->pitch = temp_ccs_surf.row_pitch; + buf->qpitch = isl_surf_get_array_pitch_sa_rows(&temp_ccs_surf); /* In case of compression mcs buffer needs to be initialised requiring the * buffer to be immediately mapped to cpu space for writing. Therefore do * not use the gpu access flag which can cause an unnecessary delay if the * backing pages happened to be just used by the GPU. */ - if (!is_lossless_compressed) - layout_flags |= MIPTREE_LAYOUT_ACCELERATED_UPLOAD; + const uint32_t alloc_flags = + is_lossless_compressed ? 0 : BO_ALLOC_FOR_RENDER; + uint32_t tiling = I915_TILING_Y; + unsigned long pitch; - mt->mcs_mt = miptree_create(brw, - mt->target, - format, - mt->first_level, - mt->last_level, - mcs_width, - mcs_height, - mt->logical_depth0, - 0 /* num_samples */, - layout_flags); + /* ISL has stricter set of alignment rules then the drm allocator. + * Therefore one can pass the ISL dimensions in terms of bytes instead of + * trying to recalculate based on different format block sizes. + */ + buf->bo = drm_intel_bo_alloc_tiled(brw->bufmgr, "ccs-miptree", + buf->pitch, buf->size / buf->pitch, + 1, &tiling, &pitch, alloc_flags); + if (buf->bo) { + assert(pitch == buf->pitch); + assert(tiling == I915_TILING_Y); + } else { + free(buf); + return false; + } + + mt->mcs_buf = buf; /* From Gen9 onwards single-sampled (non-msrt) auxiliary buffers are * used for lossless compression which requires similar initialisation @@ -1651,52 +1648,10 @@ * Software needs to initialize MCS with zeros." */ intel_miptree_init_mcs(brw, mt, 0); - mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_RESOLVED; mt->msaa_layout = INTEL_MSAA_LAYOUT_CMS; } - return mt->mcs_mt; -} - -void -intel_miptree_prepare_mcs(struct brw_context *brw, - struct intel_mipmap_tree *mt) -{ - if (mt->mcs_mt) - return; - - if (brw->gen < 9) - return; - - /* Single sample compression is represented re-using msaa compression - * layout type: "Compressed Multisampled Surfaces". - */ - if (mt->msaa_layout != INTEL_MSAA_LAYOUT_CMS || mt->num_samples > 1) - return; - - /* Clients are not currently capable of consuming compressed - * single-sampled buffers. - */ - if (mt->is_scanout) - return; - - assert(intel_tiling_supports_non_msrt_mcs(brw, mt->tiling) || - intel_miptree_supports_lossless_compressed(brw, mt)); - - /* Consider if lossless compression is supported but the needed - * auxiliary buffer doesn't exist yet. - * - * Failing to allocate the auxiliary buffer means running out of - * memory. The pointer to the aux miptree is left NULL which should - * signal non-compressed behavior. - */ - if (!intel_miptree_alloc_non_msrt_mcs(brw, mt)) { - _mesa_warning(NULL, - "Failed to allocated aux buffer for lossless" - " compressed %p %u:%u %s\n", - mt, mt->logical_width0, mt->logical_height0, - _mesa_get_format_name(mt->format)); - } + return true; } /** @@ -1737,7 +1692,7 @@ * Helper for intel_miptree_alloc_hiz() that determines the required hiz * buffer dimensions and allocates a bo for the hiz buffer. */ -static struct intel_miptree_aux_buffer * +static struct intel_miptree_hiz_buffer * intel_gen7_hiz_buf_create(struct brw_context *brw, struct intel_mipmap_tree *mt) { @@ -1745,7 +1700,7 @@ unsigned z_height = mt->logical_height0; const unsigned z_depth = MAX2(mt->logical_depth0, 1); unsigned hz_width, hz_height; - struct intel_miptree_aux_buffer *buf = calloc(sizeof(*buf), 1); + struct intel_miptree_hiz_buffer *buf = calloc(sizeof(*buf), 1); if (!buf) return NULL; @@ -1796,32 +1751,27 @@ hz_height = DIV_ROUND_UP(hz_height, 2); } else { const unsigned hz_qpitch = h0 + h1 + (12 * vertical_align); - if (mt->target == GL_TEXTURE_CUBE_MAP_ARRAY || - mt->target == GL_TEXTURE_CUBE_MAP) { - /* HZ_Height (rows) = Ceiling ( ( Q_pitch * Z_depth * 6/2) /8 ) * 8 */ - hz_height = DIV_ROUND_UP(hz_qpitch * Z0 * 6, 2 * 8) * 8; - } else { - /* HZ_Height (rows) = Ceiling ( ( Q_pitch * Z_depth/2) /8 ) * 8 */ - hz_height = DIV_ROUND_UP(hz_qpitch * Z0, 2 * 8) * 8; - } + /* HZ_Height (rows) = Ceiling ( ( Q_pitch * Z_depth/2) /8 ) * 8 */ + hz_height = DIV_ROUND_UP(hz_qpitch * Z0, 2 * 8) * 8; } unsigned long pitch; uint32_t tiling = I915_TILING_Y; - buf->bo = drm_intel_bo_alloc_tiled(brw->bufmgr, "hiz", - hz_width, hz_height, 1, - &tiling, &pitch, - BO_ALLOC_FOR_RENDER); - if (!buf->bo) { + buf->aux_base.bo = drm_intel_bo_alloc_tiled(brw->bufmgr, "hiz", + hz_width, hz_height, 1, + &tiling, &pitch, + BO_ALLOC_FOR_RENDER); + if (!buf->aux_base.bo) { free(buf); return NULL; } else if (tiling != I915_TILING_Y) { - drm_intel_bo_unreference(buf->bo); + drm_intel_bo_unreference(buf->aux_base.bo); free(buf); return NULL; } - buf->pitch = pitch; + buf->aux_base.size = hz_width * hz_height; + buf->aux_base.pitch = pitch; return buf; } @@ -1831,7 +1781,7 @@ * Helper for intel_miptree_alloc_hiz() that determines the required hiz * buffer dimensions and allocates a bo for the hiz buffer. */ -static struct intel_miptree_aux_buffer * +static struct intel_miptree_hiz_buffer * intel_gen8_hiz_buf_create(struct brw_context *brw, struct intel_mipmap_tree *mt) { @@ -1839,7 +1789,7 @@ unsigned z_height = mt->logical_height0; const unsigned z_depth = MAX2(mt->logical_depth0, 1); unsigned hz_width, hz_height; - struct intel_miptree_aux_buffer *buf = calloc(sizeof(*buf), 1); + struct intel_miptree_hiz_buffer *buf = calloc(sizeof(*buf), 1); if (!buf) return NULL; @@ -1892,51 +1842,43 @@ Z_i = minify(Z_i, 1); } /* HZ_QPitch = h0 + max(h1, sum(i=2 to m; h_i)) */ - buf->qpitch = h0 + MAX2(h1, sum_h_i); + buf->aux_base.qpitch = h0 + MAX2(h1, sum_h_i); if (mt->target == GL_TEXTURE_3D) { /* (1/2) * sum(i=0 to m; h_i * max(1, floor(Z_Depth/2**i))) */ hz_height = DIV_ROUND_UP(hz_height_3d_sum, 2); } else { /* HZ_Height (rows) = ceiling( (HZ_QPitch/2)/8) *8 * Z_Depth */ - hz_height = DIV_ROUND_UP(buf->qpitch, 2 * 8) * 8 * Z0; - if (mt->target == GL_TEXTURE_CUBE_MAP_ARRAY || - mt->target == GL_TEXTURE_CUBE_MAP) { - /* HZ_Height (rows) = ceiling( (HZ_QPitch/2)/8) *8 * 6 * Z_Depth - * - * We can can just take our hz_height calculation from above, and - * multiply by 6 for the cube map and cube map array types. - */ - hz_height *= 6; - } + hz_height = DIV_ROUND_UP(buf->aux_base.qpitch, 2 * 8) * 8 * Z0; } unsigned long pitch; uint32_t tiling = I915_TILING_Y; - buf->bo = drm_intel_bo_alloc_tiled(brw->bufmgr, "hiz", - hz_width, hz_height, 1, - &tiling, &pitch, - BO_ALLOC_FOR_RENDER); - if (!buf->bo) { + buf->aux_base.bo = drm_intel_bo_alloc_tiled(brw->bufmgr, "hiz", + hz_width, hz_height, 1, + &tiling, &pitch, + BO_ALLOC_FOR_RENDER); + if (!buf->aux_base.bo) { free(buf); return NULL; } else if (tiling != I915_TILING_Y) { - drm_intel_bo_unreference(buf->bo); + drm_intel_bo_unreference(buf->aux_base.bo); free(buf); return NULL; } - buf->pitch = pitch; + buf->aux_base.size = hz_width * hz_height; + buf->aux_base.pitch = pitch; return buf; } -static struct intel_miptree_aux_buffer * +static struct intel_miptree_hiz_buffer * intel_hiz_miptree_buf_create(struct brw_context *brw, struct intel_mipmap_tree *mt) { - struct intel_miptree_aux_buffer *buf = calloc(sizeof(*buf), 1); + struct intel_miptree_hiz_buffer *buf = calloc(sizeof(*buf), 1); uint32_t layout_flags = MIPTREE_LAYOUT_ACCELERATED_UPLOAD; if (brw->gen == 6) @@ -1961,9 +1903,10 @@ return NULL; } - buf->bo = buf->mt->bo; - buf->pitch = buf->mt->pitch; - buf->qpitch = buf->mt->qpitch; + buf->aux_base.bo = buf->mt->bo; + buf->aux_base.size = buf->mt->total_height * buf->mt->pitch; + buf->aux_base.pitch = buf->mt->pitch; + buf->aux_base.qpitch = buf->mt->qpitch; return buf; } @@ -1978,7 +1921,7 @@ if (mt->hiz_buf != NULL) return false; - if (mt->disable_aux_buffers) + if (mt->aux_disable & INTEL_AUX_DISABLE_HIZ) return false; switch (mt->format) { @@ -1998,7 +1941,7 @@ struct intel_mipmap_tree *mt) { assert(mt->hiz_buf == NULL); - assert(!mt->disable_aux_buffers); + assert((mt->aux_disable & INTEL_AUX_DISABLE_HIZ) == 0); if (brw->gen == 7) { mt->hiz_buf = intel_gen7_hiz_buf_create(brw, mt); @@ -2021,7 +1964,7 @@ exec_node_init(&m->link); m->level = level; m->layer = layer; - m->need = GEN6_HIZ_OP_HIZ_RESOLVE; + m->need = BLORP_HIZ_OP_HIZ_RESOLVE; exec_list_push_tail(&mt->hiz_map, &m->link); } @@ -2031,6 +1974,50 @@ } /** + * Can the miptree sample using the hiz buffer? + */ +bool +intel_miptree_sample_with_hiz(struct brw_context *brw, + struct intel_mipmap_tree *mt) +{ + /* It's unclear how well supported sampling from the hiz buffer is on GEN8, + * so keep things conservative for now and never enable it unless we're SKL+. + */ + if (brw->gen < 9) { + return false; + } + + if (!mt->hiz_buf) { + return false; + } + + /* It seems the hardware won't fallback to the depth buffer if some of the + * mipmap levels aren't available in the HiZ buffer. So we need all levels + * of the texture to be HiZ enabled. + */ + for (unsigned level = mt->first_level; level <= mt->last_level; ++level) { + if (!intel_miptree_level_has_hiz(mt, level)) + return false; + } + + /* If compressed multisampling is enabled, then we use it for the auxiliary + * buffer instead. + * + * From the BDW PRM (Volume 2d: Command Reference: Structures + * RENDER_SURFACE_STATE.AuxiliarySurfaceMode): + * + * "If this field is set to AUX_HIZ, Number of Multisamples must be + * MULTISAMPLECOUNT_1, and Surface Type cannot be SURFTYPE_3D. + * + * There is no such blurb for 1D textures, but there is sufficient evidence + * that this is broken on SKL+. + */ + return (mt->num_samples <= 1 && + mt->target != GL_TEXTURE_3D && + mt->target != GL_TEXTURE_1D /* gen9+ restriction */); +} + +/** * Does the miptree slice have hiz enabled? */ bool @@ -2049,7 +2036,7 @@ return; intel_resolve_map_set(&mt->hiz_map, - level, layer, GEN6_HIZ_OP_HIZ_RESOLVE); + level, layer, BLORP_HIZ_OP_HIZ_RESOLVE); } @@ -2062,7 +2049,7 @@ return; intel_resolve_map_set(&mt->hiz_map, - level, layer, GEN6_HIZ_OP_DEPTH_RESOLVE); + level, layer, BLORP_HIZ_OP_DEPTH_RESOLVE); } void @@ -2082,7 +2069,7 @@ struct intel_mipmap_tree *mt, uint32_t level, uint32_t layer, - enum gen6_hiz_op need) + enum blorp_hiz_op need) { intel_miptree_check_level_layer(mt, level, layer); @@ -2104,7 +2091,7 @@ uint32_t layer) { return intel_miptree_slice_resolve(brw, mt, level, layer, - GEN6_HIZ_OP_HIZ_RESOLVE); + BLORP_HIZ_OP_HIZ_RESOLVE); } bool @@ -2114,13 +2101,13 @@ uint32_t layer) { return intel_miptree_slice_resolve(brw, mt, level, layer, - GEN6_HIZ_OP_DEPTH_RESOLVE); + BLORP_HIZ_OP_DEPTH_RESOLVE); } static bool intel_miptree_all_slices_resolve(struct brw_context *brw, struct intel_mipmap_tree *mt, - enum gen6_hiz_op need) + enum blorp_hiz_op need) { bool did_resolve = false; @@ -2141,7 +2128,7 @@ struct intel_mipmap_tree *mt) { return intel_miptree_all_slices_resolve(brw, mt, - GEN6_HIZ_OP_HIZ_RESOLVE); + BLORP_HIZ_OP_HIZ_RESOLVE); } bool @@ -2149,48 +2136,188 @@ struct intel_mipmap_tree *mt) { return intel_miptree_all_slices_resolve(brw, mt, - GEN6_HIZ_OP_DEPTH_RESOLVE); + BLORP_HIZ_OP_DEPTH_RESOLVE); } +enum intel_fast_clear_state +intel_miptree_get_fast_clear_state(const struct intel_mipmap_tree *mt, + unsigned level, unsigned layer) +{ + intel_miptree_check_level_layer(mt, level, layer); + + const struct intel_resolve_map *item = + intel_resolve_map_const_get(&mt->color_resolve_map, level, layer); + + if (!item) + return INTEL_FAST_CLEAR_STATE_RESOLVED; + + return item->fast_clear_state; +} + +static void +intel_miptree_check_color_resolve(const struct brw_context *brw, + const struct intel_mipmap_tree *mt, + unsigned level, unsigned layer) +{ + + if ((mt->aux_disable & INTEL_AUX_DISABLE_CCS) || !mt->mcs_buf) + return; + + /* Fast color clear is supported for mipmapped surfaces only on Gen8+. */ + assert(brw->gen >= 8 || + (level == 0 && mt->first_level == 0 && mt->last_level == 0)); + + /* Compression of arrayed msaa surfaces is supported. */ + if (mt->num_samples > 1) + return; + + /* Fast color clear is supported for non-msaa arrays only on Gen8+. */ + assert(brw->gen >= 8 || (layer == 0 && mt->logical_depth0 == 1)); + + (void)level; + (void)layer; +} void -intel_miptree_resolve_color(struct brw_context *brw, - struct intel_mipmap_tree *mt, - int flags) +intel_miptree_set_fast_clear_state(const struct brw_context *brw, + struct intel_mipmap_tree *mt, + unsigned level, + unsigned first_layer, + unsigned num_layers, + enum intel_fast_clear_state new_state) { + /* Setting the state to resolved means removing the item from the list + * altogether. + */ + assert(new_state != INTEL_FAST_CLEAR_STATE_RESOLVED); + + intel_miptree_check_color_resolve(brw, mt, level, first_layer); + + assert(first_layer + num_layers <= mt->physical_depth0); + + for (unsigned i = 0; i < num_layers; i++) + intel_resolve_map_set(&mt->color_resolve_map, level, + first_layer + i, new_state); +} + +bool +intel_miptree_has_color_unresolved(const struct intel_mipmap_tree *mt, + unsigned start_level, unsigned num_levels, + unsigned start_layer, unsigned num_layers) +{ + return intel_resolve_map_find_any(&mt->color_resolve_map, + start_level, num_levels, + start_layer, num_layers) != NULL; +} + +void +intel_miptree_used_for_rendering(const struct brw_context *brw, + struct intel_mipmap_tree *mt, unsigned level, + unsigned start_layer, unsigned num_layers) +{ + const bool is_lossless_compressed = + intel_miptree_is_lossless_compressed(brw, mt); + + for (unsigned i = 0; i < num_layers; ++i) { + const enum intel_fast_clear_state fast_clear_state = + intel_miptree_get_fast_clear_state(mt, level, start_layer + i); + + /* If the buffer was previously in fast clear state, change it to + * unresolved state, since it won't be guaranteed to be clear after + * rendering occurs. + */ + if (is_lossless_compressed || + fast_clear_state == INTEL_FAST_CLEAR_STATE_CLEAR) { + intel_miptree_set_fast_clear_state( + brw, mt, level, start_layer + i, 1, + INTEL_FAST_CLEAR_STATE_UNRESOLVED); + } + } +} + +static bool +intel_miptree_needs_color_resolve(const struct brw_context *brw, + const struct intel_mipmap_tree *mt, + int flags) +{ + if (mt->aux_disable & INTEL_AUX_DISABLE_CCS) + return false; + + const bool is_lossless_compressed = + intel_miptree_is_lossless_compressed(brw, mt); + /* From gen9 onwards there is new compression scheme for single sampled * surfaces called "lossless compressed". These don't need to be always * resolved. */ - if ((flags & INTEL_MIPTREE_IGNORE_CCS_E) && - intel_miptree_is_lossless_compressed(brw, mt)) - return; + if ((flags & INTEL_MIPTREE_IGNORE_CCS_E) && is_lossless_compressed) + return false; - switch (mt->fast_clear_state) { - case INTEL_FAST_CLEAR_STATE_NO_MCS: - case INTEL_FAST_CLEAR_STATE_RESOLVED: - /* No resolve needed */ - break; - case INTEL_FAST_CLEAR_STATE_UNRESOLVED: - case INTEL_FAST_CLEAR_STATE_CLEAR: - /* Fast color clear resolves only make sense for non-MSAA buffers. */ - if (mt->msaa_layout == INTEL_MSAA_LAYOUT_NONE || - intel_miptree_is_lossless_compressed(brw, mt)) { - brw_blorp_resolve_color(brw, mt); + /* Fast color clear resolves only make sense for non-MSAA buffers. */ + if (mt->msaa_layout != INTEL_MSAA_LAYOUT_NONE && !is_lossless_compressed) + return false; + + return true; +} + +bool +intel_miptree_resolve_color(struct brw_context *brw, + struct intel_mipmap_tree *mt, unsigned level, + unsigned start_layer, unsigned num_layers, + int flags) +{ + intel_miptree_check_color_resolve(brw, mt, level, start_layer); + + if (!intel_miptree_needs_color_resolve(brw, mt, flags)) + return false; + + /* Arrayed fast clear is only supported for gen8+. */ + assert(brw->gen >= 8 || num_layers == 1); + + bool resolved = false; + for (unsigned i = 0; i < num_layers; ++i) { + intel_miptree_check_level_layer(mt, level, start_layer + i); + + struct intel_resolve_map *item = + intel_resolve_map_get(&mt->color_resolve_map, level, + start_layer + i); + + if (item) { + assert(item->fast_clear_state != INTEL_FAST_CLEAR_STATE_RESOLVED); + + brw_blorp_resolve_color(brw, mt, level, start_layer); + intel_resolve_map_remove(item); + resolved = true; } - break; } + + return resolved; } +void +intel_miptree_all_slices_resolve_color(struct brw_context *brw, + struct intel_mipmap_tree *mt, + int flags) +{ + if (!intel_miptree_needs_color_resolve(brw, mt, flags)) + return; + + foreach_list_typed_safe(struct intel_resolve_map, map, link, + &mt->color_resolve_map) { + assert(map->fast_clear_state != INTEL_FAST_CLEAR_STATE_RESOLVED); + + brw_blorp_resolve_color(brw, mt, map->level, map->layer); + intel_resolve_map_remove(map); + } +} /** * Make it possible to share the BO backing the given miptree with another * process or another miptree. * * Fast color clears are unsafe with shared buffers, so we need to resolve and - * then discard the MCS buffer, if present. We also set the fast_clear_state - * to INTEL_FAST_CLEAR_STATE_NO_MCS to ensure that no MCS buffer gets - * allocated in the future. + * then discard the MCS buffer, if present. We also set the no_ccs flag to + * ensure that no MCS buffer gets allocated in the future. * * HiZ is similarly unsafe with shared buffers. */ @@ -2203,21 +2330,22 @@ * pixel data is stored. Fortunately this code path should never be * reached for multisample buffers. */ - assert(mt->msaa_layout == INTEL_MSAA_LAYOUT_NONE); + assert(mt->msaa_layout == INTEL_MSAA_LAYOUT_NONE || mt->num_samples <= 1); - if (mt->mcs_mt) { - intel_miptree_resolve_color(brw, mt, 0); - intel_miptree_release(&mt->mcs_mt); - mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_NO_MCS; + if (mt->mcs_buf) { + intel_miptree_all_slices_resolve_color(brw, mt, 0); + mt->aux_disable |= (INTEL_AUX_DISABLE_CCS | INTEL_AUX_DISABLE_MCS); + drm_intel_bo_unreference(mt->mcs_buf->bo); + free(mt->mcs_buf); + mt->mcs_buf = NULL; } if (mt->hiz_buf) { + mt->aux_disable |= INTEL_AUX_DISABLE_HIZ; intel_miptree_all_slices_resolve_depth(brw, mt); intel_miptree_hiz_buffer_free(mt->hiz_buf); mt->hiz_buf = NULL; } - - mt->disable_aux_buffers = true; } @@ -2308,13 +2436,71 @@ } } +void +intel_update_r8stencil(struct brw_context *brw, + struct intel_mipmap_tree *mt) +{ + assert(brw->gen >= 7); + struct intel_mipmap_tree *src = + mt->format == MESA_FORMAT_S_UINT8 ? mt : mt->stencil_mt; + if (!src || brw->gen >= 8 || !src->r8stencil_needs_update) + return; + + if (!mt->r8stencil_mt) { + const uint32_t r8stencil_flags = + MIPTREE_LAYOUT_ACCELERATED_UPLOAD | MIPTREE_LAYOUT_TILING_Y | + MIPTREE_LAYOUT_DISABLE_AUX; + assert(brw->gen > 6); /* Handle MIPTREE_LAYOUT_FORCE_ALL_SLICE_AT_LOD */ + mt->r8stencil_mt = intel_miptree_create(brw, + src->target, + MESA_FORMAT_R_UINT8, + src->first_level, + src->last_level, + src->logical_width0, + src->logical_height0, + src->logical_depth0, + src->num_samples, + r8stencil_flags); + assert(mt->r8stencil_mt); + } + + struct intel_mipmap_tree *dst = mt->r8stencil_mt; + + for (int level = src->first_level; level <= src->last_level; level++) { + const unsigned depth = src->level[level].depth; + const int layers_per_blit = + (dst->msaa_layout == INTEL_MSAA_LAYOUT_UMS || + dst->msaa_layout == INTEL_MSAA_LAYOUT_CMS) ? + dst->num_samples : 1; + + for (unsigned layer = 0; layer < depth; layer++) { + brw_blorp_blit_miptrees(brw, + src, level, layer, + src->format, SWIZZLE_X, + dst, level, layers_per_blit * layer, + MESA_FORMAT_R_UNORM8, + 0, 0, + minify(src->logical_width0, level), + minify(src->logical_height0, level), + 0, 0, + minify(dst->logical_width0, level), + minify(dst->logical_height0, level), + GL_NEAREST, false, false /*mirror x, y*/, + false, false /* decode/encode srgb */); + } + } + + brw_render_cache_set_check_flush(brw, dst->bo); + src->r8stencil_needs_update = false; +} + static void * intel_miptree_map_raw(struct brw_context *brw, struct intel_mipmap_tree *mt) { /* CPU accesses to color buffers don't understand fast color clears, so * resolve any pending fast color clears before we map. */ - intel_miptree_resolve_color(brw, mt, 0); + intel_miptree_all_slices_resolve_color(brw, mt, 0); drm_intel_bo *bo = mt->bo; @@ -2411,12 +2597,10 @@ * temporary buffer back out. */ if (!(map->mode & GL_MAP_INVALIDATE_RANGE_BIT)) { - if (!intel_miptree_blit(brw, - mt, level, slice, - map->x, map->y, false, - map->linear_mt, 0, 0, - 0, 0, false, - map->w, map->h, GL_COPY)) { + if (!intel_miptree_copy(brw, + mt, level, slice, map->x, map->y, + map->linear_mt, 0, 0, 0, 0, + map->w, map->h)) { fprintf(stderr, "Failed to blit\n"); goto fail; } @@ -2449,12 +2633,10 @@ intel_miptree_unmap_raw(map->linear_mt); if (map->mode & GL_MAP_WRITE_BIT) { - bool ok = intel_miptree_blit(brw, - map->linear_mt, 0, 0, - 0, 0, false, - mt, level, slice, - map->x, map->y, false, - map->w, map->h, GL_COPY); + bool ok = intel_miptree_copy(brw, + map->linear_mt, 0, 0, 0, 0, + mt, level, slice, map->x, map->y, + map->w, map->h); WARN_ONCE(!ok, "Failed to blit from linear temporary mapping"); } @@ -2489,6 +2671,9 @@ void *src = intel_miptree_map_raw(brw, mt); if (!src) return; + + src += mt->offset; + src += image_y * mt->pitch; src += image_x * mt->cpp; @@ -2852,12 +3037,6 @@ can_blit_slice(struct intel_mipmap_tree *mt, unsigned int level, unsigned int slice) { - uint32_t image_x; - uint32_t image_y; - intel_miptree_get_image_offset(mt, level, slice, &image_x, &image_y); - if (image_x >= 32768 || image_y >= 32768) - return false; - /* See intel_miptree_blit() for details on the 32k pitch limit. */ if (mt->pitch >= 32768) return false; @@ -3000,3 +3179,352 @@ intel_miptree_release_map(mt, level, slice); } + +enum isl_surf_dim +get_isl_surf_dim(GLenum target) +{ + switch (target) { + case GL_TEXTURE_1D: + case GL_TEXTURE_1D_ARRAY: + return ISL_SURF_DIM_1D; + + case GL_TEXTURE_2D: + case GL_TEXTURE_2D_ARRAY: + case GL_TEXTURE_RECTANGLE: + case GL_TEXTURE_CUBE_MAP: + case GL_TEXTURE_CUBE_MAP_ARRAY: + case GL_TEXTURE_2D_MULTISAMPLE: + case GL_TEXTURE_2D_MULTISAMPLE_ARRAY: + case GL_TEXTURE_EXTERNAL_OES: + return ISL_SURF_DIM_2D; + + case GL_TEXTURE_3D: + return ISL_SURF_DIM_3D; + } + + unreachable("Invalid texture target"); +} + +enum isl_dim_layout +get_isl_dim_layout(const struct gen_device_info *devinfo, uint32_t tiling, + GLenum target) +{ + switch (target) { + case GL_TEXTURE_1D: + case GL_TEXTURE_1D_ARRAY: + return (devinfo->gen >= 9 && tiling == I915_TILING_NONE ? + ISL_DIM_LAYOUT_GEN9_1D : ISL_DIM_LAYOUT_GEN4_2D); + + case GL_TEXTURE_2D: + case GL_TEXTURE_2D_ARRAY: + case GL_TEXTURE_RECTANGLE: + case GL_TEXTURE_2D_MULTISAMPLE: + case GL_TEXTURE_2D_MULTISAMPLE_ARRAY: + case GL_TEXTURE_EXTERNAL_OES: + return ISL_DIM_LAYOUT_GEN4_2D; + + case GL_TEXTURE_CUBE_MAP: + case GL_TEXTURE_CUBE_MAP_ARRAY: + return (devinfo->gen == 4 ? ISL_DIM_LAYOUT_GEN4_3D : + ISL_DIM_LAYOUT_GEN4_2D); + + case GL_TEXTURE_3D: + return (devinfo->gen >= 9 ? + ISL_DIM_LAYOUT_GEN4_2D : ISL_DIM_LAYOUT_GEN4_3D); + } + + unreachable("Invalid texture target"); +} + +enum isl_tiling +intel_miptree_get_isl_tiling(const struct intel_mipmap_tree *mt) +{ + if (mt->format == MESA_FORMAT_S_UINT8) { + return ISL_TILING_W; + } else { + switch (mt->tiling) { + case I915_TILING_NONE: + return ISL_TILING_LINEAR; + case I915_TILING_X: + return ISL_TILING_X; + case I915_TILING_Y: + switch (mt->tr_mode) { + case INTEL_MIPTREE_TRMODE_NONE: + return ISL_TILING_Y0; + case INTEL_MIPTREE_TRMODE_YF: + return ISL_TILING_Yf; + case INTEL_MIPTREE_TRMODE_YS: + return ISL_TILING_Ys; + default: + unreachable("Invalid tiled resource mode"); + } + default: + unreachable("Invalid tiling mode"); + } + } +} + +void +intel_miptree_get_isl_surf(struct brw_context *brw, + const struct intel_mipmap_tree *mt, + struct isl_surf *surf) +{ + surf->dim = get_isl_surf_dim(mt->target); + surf->dim_layout = get_isl_dim_layout(&brw->screen->devinfo, + mt->tiling, mt->target); + + if (mt->num_samples > 1) { + switch (mt->msaa_layout) { + case INTEL_MSAA_LAYOUT_IMS: + surf->msaa_layout = ISL_MSAA_LAYOUT_INTERLEAVED; + break; + case INTEL_MSAA_LAYOUT_UMS: + case INTEL_MSAA_LAYOUT_CMS: + surf->msaa_layout = ISL_MSAA_LAYOUT_ARRAY; + break; + default: + unreachable("Invalid MSAA layout"); + } + } else { + surf->msaa_layout = ISL_MSAA_LAYOUT_NONE; + } + + surf->tiling = intel_miptree_get_isl_tiling(mt); + + if (mt->format == MESA_FORMAT_S_UINT8) { + /* The ISL definition of row_pitch matches the surface state pitch field + * a bit better than intel_mipmap_tree. In particular, ISL incorporates + * the factor of 2 for W-tiling in row_pitch. + */ + surf->row_pitch = 2 * mt->pitch; + } else { + surf->row_pitch = mt->pitch; + } + + surf->format = translate_tex_format(brw, mt->format, false); + + if (brw->gen >= 9) { + if (surf->dim == ISL_SURF_DIM_1D && surf->tiling == ISL_TILING_LINEAR) { + /* For gen9 1-D surfaces, intel_mipmap_tree has a bogus alignment. */ + surf->image_alignment_el = isl_extent3d(64, 1, 1); + } else { + /* On gen9+, intel_mipmap_tree stores the horizontal and vertical + * alignment in terms of surface elements like we want. + */ + surf->image_alignment_el = isl_extent3d(mt->halign, mt->valign, 1); + } + } else { + /* On earlier gens it's stored in pixels. */ + unsigned bw, bh; + _mesa_get_format_block_size(mt->format, &bw, &bh); + surf->image_alignment_el = + isl_extent3d(mt->halign / bw, mt->valign / bh, 1); + } + + surf->logical_level0_px.width = mt->logical_width0; + surf->logical_level0_px.height = mt->logical_height0; + if (surf->dim == ISL_SURF_DIM_3D) { + surf->logical_level0_px.depth = mt->logical_depth0; + surf->logical_level0_px.array_len = 1; + } else { + surf->logical_level0_px.depth = 1; + surf->logical_level0_px.array_len = mt->logical_depth0; + } + + surf->phys_level0_sa.width = mt->physical_width0; + surf->phys_level0_sa.height = mt->physical_height0; + if (surf->dim == ISL_SURF_DIM_3D) { + surf->phys_level0_sa.depth = mt->physical_depth0; + surf->phys_level0_sa.array_len = 1; + } else { + surf->phys_level0_sa.depth = 1; + surf->phys_level0_sa.array_len = mt->physical_depth0; + } + + surf->levels = mt->last_level + 1; + surf->samples = MAX2(mt->num_samples, 1); + + surf->size = 0; /* TODO */ + surf->alignment = 0; /* TODO */ + + switch (surf->dim_layout) { + case ISL_DIM_LAYOUT_GEN4_2D: + case ISL_DIM_LAYOUT_GEN4_3D: + if (brw->gen >= 9) { + surf->array_pitch_el_rows = mt->qpitch; + } else { + unsigned bw, bh; + _mesa_get_format_block_size(mt->format, &bw, &bh); + assert(mt->qpitch % bh == 0); + surf->array_pitch_el_rows = mt->qpitch / bh; + } + break; + case ISL_DIM_LAYOUT_GEN9_1D: + surf->array_pitch_el_rows = 1; + break; + } + + switch (mt->array_layout) { + case ALL_LOD_IN_EACH_SLICE: + surf->array_pitch_span = ISL_ARRAY_PITCH_SPAN_FULL; + break; + case ALL_SLICES_AT_EACH_LOD: + surf->array_pitch_span = ISL_ARRAY_PITCH_SPAN_COMPACT; + break; + default: + unreachable("Invalid array layout"); + } + + GLenum base_format = _mesa_get_format_base_format(mt->format); + switch (base_format) { + case GL_DEPTH_COMPONENT: + surf->usage = ISL_SURF_USAGE_DEPTH_BIT | ISL_SURF_USAGE_TEXTURE_BIT; + break; + case GL_STENCIL_INDEX: + surf->usage = ISL_SURF_USAGE_STENCIL_BIT; + if (brw->gen >= 8) + surf->usage |= ISL_SURF_USAGE_TEXTURE_BIT; + break; + case GL_DEPTH_STENCIL: + /* In this case we only texture from the depth part */ + surf->usage = ISL_SURF_USAGE_DEPTH_BIT | ISL_SURF_USAGE_STENCIL_BIT | + ISL_SURF_USAGE_TEXTURE_BIT; + break; + default: + surf->usage = ISL_SURF_USAGE_TEXTURE_BIT; + if (brw->format_supported_as_render_target[mt->format]) + surf->usage = ISL_SURF_USAGE_RENDER_TARGET_BIT; + break; + } + + if (_mesa_is_cube_map_texture(mt->target)) + surf->usage |= ISL_SURF_USAGE_CUBE_BIT; +} + +/* WARNING: THE SURFACE CREATED BY THIS FUNCTION IS NOT COMPLETE AND CANNOT BE + * USED FOR ANY REAL CALCULATIONS. THE ONLY VALID USE OF SUCH A SURFACE IS TO + * PASS IT INTO isl_surf_fill_state. + */ +void +intel_miptree_get_aux_isl_surf(struct brw_context *brw, + const struct intel_mipmap_tree *mt, + struct isl_surf *surf, + enum isl_aux_usage *usage) +{ + uint32_t aux_pitch, aux_qpitch; + if (mt->mcs_buf) { + aux_pitch = mt->mcs_buf->pitch; + aux_qpitch = mt->mcs_buf->qpitch; + + if (mt->num_samples > 1) { + assert(mt->msaa_layout == INTEL_MSAA_LAYOUT_CMS); + *usage = ISL_AUX_USAGE_MCS; + } else if (intel_miptree_is_lossless_compressed(brw, mt)) { + assert(brw->gen >= 9); + *usage = ISL_AUX_USAGE_CCS_E; + } else if ((mt->aux_disable & INTEL_AUX_DISABLE_CCS) == 0) { + *usage = ISL_AUX_USAGE_CCS_D; + } else { + unreachable("Invalid MCS miptree"); + } + } else if (mt->hiz_buf) { + if (mt->hiz_buf->mt) { + aux_pitch = mt->hiz_buf->mt->pitch; + aux_qpitch = mt->hiz_buf->mt->qpitch; + } else { + aux_pitch = mt->hiz_buf->aux_base.pitch; + aux_qpitch = mt->hiz_buf->aux_base.qpitch; + } + + *usage = ISL_AUX_USAGE_HIZ; + } else { + *usage = ISL_AUX_USAGE_NONE; + return; + } + + /* Start with a copy of the original surface. */ + intel_miptree_get_isl_surf(brw, mt, surf); + + /* Figure out the format and tiling of the auxiliary surface */ + switch (*usage) { + case ISL_AUX_USAGE_NONE: + unreachable("Invalid auxiliary usage"); + + case ISL_AUX_USAGE_HIZ: + isl_surf_get_hiz_surf(&brw->isl_dev, surf, surf); + break; + + case ISL_AUX_USAGE_MCS: + /* + * From the SKL PRM: + * "When Auxiliary Surface Mode is set to AUX_CCS_D or AUX_CCS_E, + * HALIGN 16 must be used." + */ + if (brw->gen >= 9) + assert(mt->halign == 16); + + isl_surf_get_mcs_surf(&brw->isl_dev, surf, surf); + break; + + case ISL_AUX_USAGE_CCS_D: + case ISL_AUX_USAGE_CCS_E: + /* + * From the BDW PRM, Volume 2d, page 260 (RENDER_SURFACE_STATE): + * + * "When MCS is enabled for non-MSRT, HALIGN_16 must be used" + * + * From the hardware spec for GEN9: + * + * "When Auxiliary Surface Mode is set to AUX_CCS_D or AUX_CCS_E, + * HALIGN 16 must be used." + */ + assert(mt->num_samples <= 1); + if (brw->gen >= 8) + assert(mt->halign == 16); + + isl_surf_get_ccs_surf(&brw->isl_dev, surf, surf); + break; + } + + /* We want the pitch of the actual aux buffer. */ + surf->row_pitch = aux_pitch; + + /* Auxiliary surfaces in ISL have compressed formats and array_pitch_el_rows + * is in elements. This doesn't match intel_mipmap_tree::qpitch which is + * in elements of the primary color surface so we have to divide by the + * compression block height. + */ + surf->array_pitch_el_rows = + aux_qpitch / isl_format_get_layout(surf->format)->bh; +} + +union isl_color_value +intel_miptree_get_isl_clear_color(struct brw_context *brw, + const struct intel_mipmap_tree *mt) +{ + union isl_color_value clear_color; + + if (_mesa_get_format_base_format(mt->format) == GL_DEPTH_COMPONENT) { + clear_color.i32[0] = mt->depth_clear_value; + clear_color.i32[1] = 0; + clear_color.i32[2] = 0; + clear_color.i32[3] = 0; + } else if (brw->gen >= 9) { + clear_color.i32[0] = mt->gen9_fast_clear_color.i[0]; + clear_color.i32[1] = mt->gen9_fast_clear_color.i[1]; + clear_color.i32[2] = mt->gen9_fast_clear_color.i[2]; + clear_color.i32[3] = mt->gen9_fast_clear_color.i[3]; + } else if (_mesa_is_format_integer(mt->format)) { + clear_color.i32[0] = (mt->fast_clear_color_value & (1u << 31)) != 0; + clear_color.i32[1] = (mt->fast_clear_color_value & (1u << 30)) != 0; + clear_color.i32[2] = (mt->fast_clear_color_value & (1u << 29)) != 0; + clear_color.i32[3] = (mt->fast_clear_color_value & (1u << 28)) != 0; + } else { + clear_color.f32[0] = (mt->fast_clear_color_value & (1u << 31)) != 0; + clear_color.f32[1] = (mt->fast_clear_color_value & (1u << 30)) != 0; + clear_color.f32[2] = (mt->fast_clear_color_value & (1u << 29)) != 0; + clear_color.f32[3] = (mt->fast_clear_color_value & (1u << 28)) != 0; + } + + return clear_color; +} diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/intel_mipmap_tree.h mesa-17.0.7/src/mesa/drivers/dri/i965/intel_mipmap_tree.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/intel_mipmap_tree.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/intel_mipmap_tree.h 2017-06-01 10:37:10.000000000 +0000 @@ -47,6 +47,7 @@ #include #include "main/mtypes.h" +#include "isl/isl.h" #include "intel_bufmgr.h" #include "intel_resolve_map.h" #include @@ -200,70 +201,6 @@ INTEL_MSAA_LAYOUT_CMS, }; - -/** - * Enum for keeping track of the fast clear state of a buffer associated with - * a miptree. - * - * Fast clear works by deferring the memory writes that would be used to clear - * the buffer, so that instead of performing them at the time of the clear - * operation, the hardware automatically performs them at the time that the - * buffer is later accessed for rendering. The MCS buffer keeps track of - * which regions of the buffer still have pending clear writes. - * - * This enum keeps track of the driver's knowledge of pending fast clears in - * the MCS buffer. - * - * MCS buffers only exist on Gen7+. - */ -enum intel_fast_clear_state -{ - /** - * There is no MCS buffer for this miptree, and one should never be - * allocated. - */ - INTEL_FAST_CLEAR_STATE_NO_MCS, - - /** - * No deferred clears are pending for this miptree, and the contents of the - * color buffer are entirely correct. An MCS buffer may or may not exist - * for this miptree. If it does exist, it is entirely in the "no deferred - * clears pending" state. If it does not exist, it will be created the - * first time a fast color clear is executed. - * - * In this state, the color buffer can be used for purposes other than - * rendering without needing a render target resolve. - * - * Since there is no such thing as a "fast color clear resolve" for MSAA - * buffers, an MSAA buffer will never be in this state. - */ - INTEL_FAST_CLEAR_STATE_RESOLVED, - - /** - * An MCS buffer exists for this miptree, and deferred clears are pending - * for some regions of the color buffer, as indicated by the MCS buffer. - * The contents of the color buffer are only correct for the regions where - * the MCS buffer doesn't indicate a deferred clear. - * - * If a single-sample buffer is in this state, a render target resolve must - * be performed before it can be used for purposes other than rendering. - */ - INTEL_FAST_CLEAR_STATE_UNRESOLVED, - - /** - * An MCS buffer exists for this miptree, and deferred clears are pending - * for the entire color buffer, and the contents of the MCS buffer reflect - * this. The contents of the color buffer are undefined. - * - * If a single-sample buffer is in this state, a render target resolve must - * be performed before it can be used for purposes other than rendering. - * - * If the client attempts to clear a buffer which is already in this state, - * the clear can be safely skipped, since the buffer is already clear. - */ - INTEL_FAST_CLEAR_STATE_CLEAR, -}; - enum miptree_array_layout { /* Each array slice contains all miplevels packed together. * @@ -316,6 +253,16 @@ ALL_SLICES_AT_EACH_LOD, }; +enum intel_aux_disable { + INTEL_AUX_DISABLE_NONE = 0, + INTEL_AUX_DISABLE_HIZ = 1 << 1, + INTEL_AUX_DISABLE_MCS = 1 << 2, + INTEL_AUX_DISABLE_CCS = 1 << 3, + INTEL_AUX_DISABLE_ALL = INTEL_AUX_DISABLE_HIZ | + INTEL_AUX_DISABLE_MCS | + INTEL_AUX_DISABLE_CCS +}; + /** * Miptree aux buffer. These buffers are associated with a miptree, but the * format is managed by the hardware. @@ -323,9 +270,6 @@ * For Gen7+, we always give the hardware the start of the buffer, and let it * handle all accesses to the buffer. Therefore we don't need the full miptree * layout structure for this buffer. - * - * For Gen6, we need a hiz miptree structure for this buffer so we can program - * offsets to slices & miplevels. */ struct intel_miptree_aux_buffer { @@ -338,6 +282,27 @@ drm_intel_bo *bo; /** + * Offset into bo where the surface starts. + * + * @see intel_mipmap_aux_buffer::bo + * + * @see RENDER_SURFACE_STATE.AuxiliarySurfaceBaseAddress + * @see 3DSTATE_DEPTH_BUFFER.SurfaceBaseAddress + * @see 3DSTATE_HIER_DEPTH_BUFFER.SurfaceBaseAddress + * @see 3DSTATE_STENCIL_BUFFER.SurfaceBaseAddress + */ + uint32_t offset; + + /* + * Size of the MCS surface. + * + * This is needed when doing any gtt mapped operations on the buffer (which + * will be Y-tiled). It is possible that it will not be the same as bo->size + * when the drm allocator rounds up the requested size. + */ + size_t size; + + /** * Pitch in bytes. * * @see RENDER_SURFACE_STATE.AuxiliarySurfacePitch @@ -352,6 +317,15 @@ * @see 3DSTATE_HIER_DEPTH_BUFFER.SurfaceQPitch */ uint32_t qpitch; +}; +/** + * The HiZ buffer requires extra attributes on earlier GENs. This is easily + * contained within an intel_mipmap_tree. To make sure we do not abuse this, we + * keep the hiz datastructure separate. + */ +struct intel_miptree_hiz_buffer +{ + struct intel_miptree_aux_buffer aux_base; /** * Hiz miptree. Used only by Gen6. @@ -587,18 +561,25 @@ * To determine if hiz is enabled, do not check this pointer. Instead, use * intel_miptree_slice_has_hiz(). */ - struct intel_miptree_aux_buffer *hiz_buf; + struct intel_miptree_hiz_buffer *hiz_buf; /** - * \brief Map of miptree slices to needed resolves. + * \brief Maps of miptree slices to needed resolves. * - * This is used only when the miptree has a child HiZ miptree. + * hiz_map is used only when the miptree has a child HiZ miptree. * * Let \c mt be a depth miptree with HiZ enabled. Then the resolve map is * \c mt->hiz_map. The resolve map of the child HiZ miptree, \c * mt->hiz_mt->hiz_map, is unused. + * + * + * color_resolve_map is used only when the miptree uses fast clear (Gen7+) + * lossless compression (Gen9+). It should be noted that absence in the + * map means implicitly RESOLVED state. If item is found it always + * indicates state other than RESOLVED. */ struct exec_list hiz_map; /* List of intel_resolve_map. */ + struct exec_list color_resolve_map; /* List of intel_resolve_map. */ /** * \brief Stencil miptree for depthstencil textures. @@ -614,15 +595,27 @@ struct intel_mipmap_tree *stencil_mt; /** - * \brief MCS miptree. + * \brief Stencil texturing miptree for sampling from a stencil texture + * + * Some hardware doesn't support sampling from the stencil texture as + * required by the GL_ARB_stencil_texturing extenion. To workaround this we + * blit the texture into a new texture that can be sampled. * - * This miptree contains the "multisample control surface", which stores + * \see intel_update_r8stencil() + */ + struct intel_mipmap_tree *r8stencil_mt; + bool r8stencil_needs_update; + + /** + * \brief MCS auxiliary buffer. + * + * This buffer contains the "multisample control surface", which stores * the necessary information to implement compressed MSAA * (INTEL_MSAA_FORMAT_CMS) and "fast color clear" behaviour on Gen7+. * - * NULL if no MCS miptree is in use for this surface. + * NULL if no MCS buffer is in use for this surface. */ - struct intel_mipmap_tree *mcs_mt; + struct intel_miptree_aux_buffer *mcs_buf; /** * Planes 1 and 2 in case this is a planar surface. @@ -630,11 +623,6 @@ struct intel_mipmap_tree *plane[2]; /** - * Fast clear state for this buffer. - */ - enum intel_fast_clear_state fast_clear_state; - - /** * The SURFACE_STATE bits associated with the last fast color clear to this * color mipmap tree, if any. * @@ -660,7 +648,7 @@ * buffer. This is useful for sharing the miptree bo with an external client * that doesn't understand auxiliary buffers. */ - bool disable_aux_buffers; + enum intel_aux_disable aux_disable; /** * Tells if the underlying buffer is to be also consumed by entities other @@ -674,10 +662,6 @@ GLuint refcount; }; -void -intel_get_non_msrt_mcs_alignment(const struct intel_mipmap_tree *mt, - unsigned *width_px, unsigned *height); - bool intel_miptree_is_lossless_compressed(const struct brw_context *brw, const struct intel_mipmap_tree *mt); @@ -696,11 +680,8 @@ bool intel_miptree_alloc_non_msrt_mcs(struct brw_context *brw, - struct intel_mipmap_tree *mt); - -void -intel_miptree_prepare_mcs(struct brw_context *brw, - struct intel_mipmap_tree *mt); + struct intel_mipmap_tree *mt, + bool is_lossless_compressed); enum { MIPTREE_LAYOUT_ACCELERATED_UPLOAD = 1 << 0, @@ -768,7 +749,7 @@ /** \brief Assert that the level and layer are valid for the miptree. */ static inline void -intel_miptree_check_level_layer(struct intel_mipmap_tree *mt, +intel_miptree_check_level_layer(const struct intel_mipmap_tree *mt, uint32_t level, uint32_t layer) { @@ -796,13 +777,36 @@ GLuint level, GLuint slice, GLuint *x, GLuint *y); +enum isl_surf_dim +get_isl_surf_dim(GLenum target); + +enum isl_dim_layout +get_isl_dim_layout(const struct gen_device_info *devinfo, uint32_t tiling, + GLenum target); + +enum isl_tiling +intel_miptree_get_isl_tiling(const struct intel_mipmap_tree *mt); + +void +intel_miptree_get_isl_surf(struct brw_context *brw, + const struct intel_mipmap_tree *mt, + struct isl_surf *surf); +void +intel_miptree_get_aux_isl_surf(struct brw_context *brw, + const struct intel_mipmap_tree *mt, + struct isl_surf *surf, + enum isl_aux_usage *usage); + +union isl_color_value +intel_miptree_get_isl_clear_color(struct brw_context *brw, + const struct intel_mipmap_tree *mt); + void intel_get_image_dims(struct gl_texture_image *image, int *width, int *height, int *depth); void intel_get_tile_masks(uint32_t tiling, uint32_t tr_mode, uint32_t cpp, - bool map_stencil_as_y_tiled, uint32_t *mask_x, uint32_t *mask_y); void @@ -816,8 +820,7 @@ uint32_t *tile_y); uint32_t intel_miptree_get_aligned_offset(const struct intel_mipmap_tree *mt, - uint32_t x, uint32_t y, - bool map_stencil_as_y_tiled); + uint32_t x, uint32_t y); void intel_miptree_set_level_info(struct intel_mipmap_tree *mt, GLuint level, @@ -903,20 +906,31 @@ /**\}*/ +enum intel_fast_clear_state +intel_miptree_get_fast_clear_state(const struct intel_mipmap_tree *mt, + unsigned level, unsigned layer); + +void +intel_miptree_set_fast_clear_state(const struct brw_context *brw, + struct intel_mipmap_tree *mt, + unsigned level, + unsigned first_layer, + unsigned num_layers, + enum intel_fast_clear_state new_state); + +bool +intel_miptree_has_color_unresolved(const struct intel_mipmap_tree *mt, + unsigned start_level, unsigned num_levels, + unsigned start_layer, unsigned num_layers); + /** * Update the fast clear state for a miptree to indicate that it has been used * for rendering. */ -static inline void -intel_miptree_used_for_rendering(struct intel_mipmap_tree *mt) -{ - /* If the buffer was previously in fast clear state, change it to - * unresolved state, since it won't be guaranteed to be clear after - * rendering occurs. - */ - if (mt->fast_clear_state == INTEL_FAST_CLEAR_STATE_CLEAR) - mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_UNRESOLVED; -} +void +intel_miptree_used_for_rendering(const struct brw_context *brw, + struct intel_mipmap_tree *mt, unsigned level, + unsigned start_layer, unsigned num_layers); /** * Flag values telling color resolve pass which special types of buffers @@ -927,12 +941,18 @@ */ #define INTEL_MIPTREE_IGNORE_CCS_E (1 << 0) -void +bool intel_miptree_resolve_color(struct brw_context *brw, - struct intel_mipmap_tree *mt, + struct intel_mipmap_tree *mt, unsigned level, + unsigned start_layer, unsigned num_layers, int flags); void +intel_miptree_all_slices_resolve_color(struct brw_context *brw, + struct intel_mipmap_tree *mt, + int flags); + +void intel_miptree_make_shareable(struct brw_context *brw, struct intel_mipmap_tree *mt); @@ -941,6 +961,10 @@ struct intel_mipmap_tree *src, struct intel_mipmap_tree *dst); +void +intel_update_r8stencil(struct brw_context *brw, + struct intel_mipmap_tree *mt); + /** * Horizontal distance from one slice to the next in the two-dimensional * miptree layout. @@ -985,7 +1009,11 @@ void intel_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt, - unsigned int level, unsigned int layer, enum gen6_hiz_op op); + unsigned int level, unsigned int layer, enum blorp_hiz_op op); + +bool +intel_miptree_sample_with_hiz(struct brw_context *brw, + struct intel_mipmap_tree *mt); #ifdef __cplusplus } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c mesa-17.0.7/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c 2017-06-01 10:37:10.000000000 +0000 @@ -47,7 +47,6 @@ #include "intel_image.h" #include "intel_buffers.h" #include "intel_pixel.h" -#include "intel_reg.h" #define FILE_DEBUG_FLAG DEBUG_PIXEL @@ -257,7 +256,7 @@ /* The blitter has no idea about fast color clears, so we need to resolve * the miptree before we do anything. */ - intel_miptree_resolve_color(brw, irb->mt, 0); + intel_miptree_all_slices_resolve_color(brw, irb->mt, 0); /* Chop it all into chunks that can be digested by hardware: */ for (py = 0; py < height; py += DY) { diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/intel_pixel_read.c mesa-17.0.7/src/mesa/drivers/dri/i965/intel_pixel_read.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/intel_pixel_read.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/intel_pixel_read.c 2017-06-01 10:37:10.000000000 +0000 @@ -138,7 +138,7 @@ /* Since we are going to read raw data to the miptree, we need to resolve * any pending fast color clears before we start. */ - intel_miptree_resolve_color(brw, irb->mt, 0); + intel_miptree_all_slices_resolve_color(brw, irb->mt, 0); bo = irb->mt->bo; @@ -242,17 +242,17 @@ perf_debug("%s: fallback to CPU mapping in PBO case\n", __func__); } - ok = intel_readpixels_tiled_memcpy(ctx, x, y, width, height, - format, type, pixels, pack); - if(ok) - return; - - /* glReadPixels() wont dirty the front buffer, so reset the dirty + /* Reading pixels wont dirty the front buffer, so reset the dirty * flag after calling intel_prepare_render(). */ dirty = brw->front_buffer_dirty; intel_prepare_render(brw); brw->front_buffer_dirty = dirty; + ok = intel_readpixels_tiled_memcpy(ctx, x, y, width, height, + format, type, pixels, pack); + if(ok) + return; + /* Update Mesa state before calling _mesa_readpixels(). * XXX this may not be needed since ReadPixels no longer uses the * span code. diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/intel_reg.h mesa-17.0.7/src/mesa/drivers/dri/i965/intel_reg.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/intel_reg.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/intel_reg.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,297 +0,0 @@ -/* - * Copyright 2003 VMware, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE - * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - */ - -#define CMD_MI (0x0 << 29) -#define CMD_2D (0x2 << 29) -#define CMD_3D (0x3 << 29) - -#define MI_NOOP (CMD_MI | 0) - -#define MI_BATCH_BUFFER_END (CMD_MI | 0xA << 23) - -#define MI_FLUSH (CMD_MI | (4 << 23)) -#define FLUSH_MAP_CACHE (1 << 0) -#define INHIBIT_FLUSH_RENDER_CACHE (1 << 2) - -#define MI_STORE_DATA_IMM (CMD_MI | (0x20 << 23)) -#define MI_LOAD_REGISTER_IMM (CMD_MI | (0x22 << 23)) -#define MI_LOAD_REGISTER_REG (CMD_MI | (0x2A << 23)) - -#define MI_FLUSH_DW (CMD_MI | (0x26 << 23) | 2) - -#define MI_STORE_REGISTER_MEM (CMD_MI | (0x24 << 23)) -# define MI_STORE_REGISTER_MEM_USE_GGTT (1 << 22) -# define MI_STORE_REGISTER_MEM_PREDICATE (1 << 21) - -/* Load a value from memory into a register. Only available on Gen7+. */ -#define GEN7_MI_LOAD_REGISTER_MEM (CMD_MI | (0x29 << 23)) -# define MI_LOAD_REGISTER_MEM_USE_GGTT (1 << 22) -/* Haswell RS control */ -#define MI_RS_CONTROL (CMD_MI | (0x6 << 23)) -#define MI_RS_STORE_DATA_IMM (CMD_MI | (0x2b << 23)) - -/* Manipulate the predicate bit based on some register values. Only on Gen7+ */ -#define GEN7_MI_PREDICATE (CMD_MI | (0xC << 23)) -# define MI_PREDICATE_LOADOP_KEEP (0 << 6) -# define MI_PREDICATE_LOADOP_LOAD (2 << 6) -# define MI_PREDICATE_LOADOP_LOADINV (3 << 6) -# define MI_PREDICATE_COMBINEOP_SET (0 << 3) -# define MI_PREDICATE_COMBINEOP_AND (1 << 3) -# define MI_PREDICATE_COMBINEOP_OR (2 << 3) -# define MI_PREDICATE_COMBINEOP_XOR (3 << 3) -# define MI_PREDICATE_COMPAREOP_TRUE (0 << 0) -# define MI_PREDICATE_COMPAREOP_FALSE (1 << 0) -# define MI_PREDICATE_COMPAREOP_SRCS_EQUAL (2 << 0) -# define MI_PREDICATE_COMPAREOP_DELTAS_EQUAL (3 << 0) - -#define HSW_MI_MATH (CMD_MI | (0x1a << 23)) - -#define MI_MATH_ALU2(opcode, operand1, operand2) \ - ( ((MI_MATH_OPCODE_##opcode) << 20) | ((MI_MATH_OPERAND_##operand1) << 10) | \ - ((MI_MATH_OPERAND_##operand2) << 0) ) - -#define MI_MATH_ALU1(opcode, operand1) \ - ( ((MI_MATH_OPCODE_##opcode) << 20) | ((MI_MATH_OPERAND_##operand1) << 10) ) - -#define MI_MATH_ALU0(opcode) \ - ( ((MI_MATH_OPCODE_##opcode) << 20) ) - -#define MI_MATH_OPCODE_NOOP 0x000 -#define MI_MATH_OPCODE_LOAD 0x080 -#define MI_MATH_OPCODE_LOADINV 0x480 -#define MI_MATH_OPCODE_LOAD0 0x081 -#define MI_MATH_OPCODE_LOAD1 0x481 -#define MI_MATH_OPCODE_ADD 0x100 -#define MI_MATH_OPCODE_SUB 0x101 -#define MI_MATH_OPCODE_AND 0x102 -#define MI_MATH_OPCODE_OR 0x103 -#define MI_MATH_OPCODE_XOR 0x104 -#define MI_MATH_OPCODE_STORE 0x180 -#define MI_MATH_OPCODE_STOREINV 0x580 - -#define MI_MATH_OPERAND_R0 0x00 -#define MI_MATH_OPERAND_R1 0x01 -#define MI_MATH_OPERAND_R2 0x02 -#define MI_MATH_OPERAND_R3 0x03 -#define MI_MATH_OPERAND_R4 0x04 -#define MI_MATH_OPERAND_SRCA 0x20 -#define MI_MATH_OPERAND_SRCB 0x21 -#define MI_MATH_OPERAND_ACCU 0x31 -#define MI_MATH_OPERAND_ZF 0x32 -#define MI_MATH_OPERAND_CF 0x33 - -/** @{ - * - * PIPE_CONTROL operation, a combination MI_FLUSH and register write with - * additional flushing control. - */ -#define _3DSTATE_PIPE_CONTROL (CMD_3D | (3 << 27) | (2 << 24)) -#define PIPE_CONTROL_CS_STALL (1 << 20) -#define PIPE_CONTROL_GLOBAL_SNAPSHOT_COUNT_RESET (1 << 19) -#define PIPE_CONTROL_TLB_INVALIDATE (1 << 18) -#define PIPE_CONTROL_SYNC_GFDT (1 << 17) -#define PIPE_CONTROL_MEDIA_STATE_CLEAR (1 << 16) -#define PIPE_CONTROL_NO_WRITE (0 << 14) -#define PIPE_CONTROL_WRITE_IMMEDIATE (1 << 14) -#define PIPE_CONTROL_WRITE_DEPTH_COUNT (2 << 14) -#define PIPE_CONTROL_WRITE_TIMESTAMP (3 << 14) -#define PIPE_CONTROL_DEPTH_STALL (1 << 13) -#define PIPE_CONTROL_RENDER_TARGET_FLUSH (1 << 12) -#define PIPE_CONTROL_INSTRUCTION_INVALIDATE (1 << 11) -#define PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE (1 << 10) /* GM45+ only */ -#define PIPE_CONTROL_ISP_DIS (1 << 9) -#define PIPE_CONTROL_INTERRUPT_ENABLE (1 << 8) -#define PIPE_CONTROL_FLUSH_ENABLE (1 << 7) /* Gen7+ only */ -/* GT */ -#define PIPE_CONTROL_DATA_CACHE_FLUSH (1 << 5) -#define PIPE_CONTROL_VF_CACHE_INVALIDATE (1 << 4) -#define PIPE_CONTROL_CONST_CACHE_INVALIDATE (1 << 3) -#define PIPE_CONTROL_STATE_CACHE_INVALIDATE (1 << 2) -#define PIPE_CONTROL_STALL_AT_SCOREBOARD (1 << 1) -#define PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0) -#define PIPE_CONTROL_PPGTT_WRITE (0 << 2) -#define PIPE_CONTROL_GLOBAL_GTT_WRITE (1 << 2) - -#define PIPE_CONTROL_CACHE_FLUSH_BITS \ - (PIPE_CONTROL_DEPTH_CACHE_FLUSH | PIPE_CONTROL_DATA_CACHE_FLUSH | \ - PIPE_CONTROL_RENDER_TARGET_FLUSH) - -#define PIPE_CONTROL_CACHE_INVALIDATE_BITS \ - (PIPE_CONTROL_STATE_CACHE_INVALIDATE | PIPE_CONTROL_CONST_CACHE_INVALIDATE | \ - PIPE_CONTROL_VF_CACHE_INVALIDATE | PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | \ - PIPE_CONTROL_INSTRUCTION_INVALIDATE) - -/** @} */ - -#define XY_SETUP_BLT_CMD (CMD_2D | (0x01 << 22)) - -#define XY_COLOR_BLT_CMD (CMD_2D | (0x50 << 22)) - -#define XY_SRC_COPY_BLT_CMD (CMD_2D | (0x53 << 22)) - -#define XY_FAST_COPY_BLT_CMD (CMD_2D | (0x42 << 22)) - -#define XY_TEXT_IMMEDIATE_BLIT_CMD (CMD_2D | (0x31 << 22)) -# define XY_TEXT_BYTE_PACKED (1 << 16) - -/* BR00 */ -#define XY_BLT_WRITE_ALPHA (1 << 21) -#define XY_BLT_WRITE_RGB (1 << 20) -#define XY_SRC_TILED (1 << 15) -#define XY_DST_TILED (1 << 11) - -/* BR00 */ -#define XY_FAST_SRC_TILED_64K (3 << 20) -#define XY_FAST_SRC_TILED_Y (2 << 20) -#define XY_FAST_SRC_TILED_X (1 << 20) - -#define XY_FAST_DST_TILED_64K (3 << 13) -#define XY_FAST_DST_TILED_Y (2 << 13) -#define XY_FAST_DST_TILED_X (1 << 13) - -/* BR13 */ -#define BR13_8 (0x0 << 24) -#define BR13_565 (0x1 << 24) -#define BR13_8888 (0x3 << 24) -#define BR13_16161616 (0x4 << 24) -#define BR13_32323232 (0x5 << 24) - -#define XY_FAST_SRC_TRMODE_YF (1 << 31) -#define XY_FAST_DST_TRMODE_YF (1 << 30) - -/* Pipeline Statistics Counter Registers */ -#define IA_VERTICES_COUNT 0x2310 -#define IA_PRIMITIVES_COUNT 0x2318 -#define VS_INVOCATION_COUNT 0x2320 -#define HS_INVOCATION_COUNT 0x2300 -#define DS_INVOCATION_COUNT 0x2308 -#define GS_INVOCATION_COUNT 0x2328 -#define GS_PRIMITIVES_COUNT 0x2330 -#define CL_INVOCATION_COUNT 0x2338 -#define CL_PRIMITIVES_COUNT 0x2340 -#define PS_INVOCATION_COUNT 0x2348 -#define CS_INVOCATION_COUNT 0x2290 -#define PS_DEPTH_COUNT 0x2350 - -#define GEN6_SO_PRIM_STORAGE_NEEDED 0x2280 -#define GEN7_SO_PRIM_STORAGE_NEEDED(n) (0x5240 + (n) * 8) - -#define GEN6_SO_NUM_PRIMS_WRITTEN 0x2288 -#define GEN7_SO_NUM_PRIMS_WRITTEN(n) (0x5200 + (n) * 8) - -#define GEN7_SO_WRITE_OFFSET(n) (0x5280 + (n) * 4) - -#define TIMESTAMP 0x2358 - -#define BCS_SWCTRL 0x22200 -# define BCS_SWCTRL_SRC_Y (1 << 0) -# define BCS_SWCTRL_DST_Y (1 << 1) - -#define OACONTROL 0x2360 -# define OACONTROL_COUNTER_SELECT_SHIFT 2 -# define OACONTROL_ENABLE_COUNTERS (1 << 0) - -/* Auto-Draw / Indirect Registers */ -#define GEN7_3DPRIM_END_OFFSET 0x2420 -#define GEN7_3DPRIM_START_VERTEX 0x2430 -#define GEN7_3DPRIM_VERTEX_COUNT 0x2434 -#define GEN7_3DPRIM_INSTANCE_COUNT 0x2438 -#define GEN7_3DPRIM_START_INSTANCE 0x243C -#define GEN7_3DPRIM_BASE_VERTEX 0x2440 - -/* Auto-Compute / Indirect Registers */ -#define GEN7_GPGPU_DISPATCHDIMX 0x2500 -#define GEN7_GPGPU_DISPATCHDIMY 0x2504 -#define GEN7_GPGPU_DISPATCHDIMZ 0x2508 - -#define GEN7_CACHE_MODE_1 0x7004 -# define GEN8_HIZ_NP_PMA_FIX_ENABLE (1 << 11) -# define GEN8_HIZ_NP_EARLY_Z_FAILS_DISABLE (1 << 13) -# define GEN9_PARTIAL_RESOLVE_DISABLE_IN_VC (1 << 1) -# define GEN8_HIZ_PMA_MASK_BITS \ - REG_MASK(GEN8_HIZ_NP_PMA_FIX_ENABLE | GEN8_HIZ_NP_EARLY_Z_FAILS_DISABLE) - -/* Predicate registers */ -#define MI_PREDICATE_SRC0 0x2400 -#define MI_PREDICATE_SRC1 0x2408 -#define MI_PREDICATE_DATA 0x2410 -#define MI_PREDICATE_RESULT 0x2418 -#define MI_PREDICATE_RESULT_1 0x241C -#define MI_PREDICATE_RESULT_2 0x2214 - -#define HSW_CS_GPR(n) (0x2600 + (n) * 8) - -/* L3 cache control registers. */ -#define GEN7_L3SQCREG1 0xb010 -/* L3SQ general and high priority credit initialization. */ -# define IVB_L3SQCREG1_SQGHPCI_DEFAULT 0x00730000 -# define VLV_L3SQCREG1_SQGHPCI_DEFAULT 0x00d30000 -# define HSW_L3SQCREG1_SQGHPCI_DEFAULT 0x00610000 -# define GEN7_L3SQCREG1_CONV_DC_UC (1 << 24) -# define GEN7_L3SQCREG1_CONV_IS_UC (1 << 25) -# define GEN7_L3SQCREG1_CONV_C_UC (1 << 26) -# define GEN7_L3SQCREG1_CONV_T_UC (1 << 27) - -#define GEN7_L3CNTLREG2 0xb020 -# define GEN7_L3CNTLREG2_SLM_ENABLE (1 << 0) -# define GEN7_L3CNTLREG2_URB_ALLOC_SHIFT 1 -# define GEN7_L3CNTLREG2_URB_ALLOC_MASK INTEL_MASK(6, 1) -# define GEN7_L3CNTLREG2_URB_LOW_BW (1 << 7) -# define GEN7_L3CNTLREG2_ALL_ALLOC_SHIFT 8 -# define GEN7_L3CNTLREG2_ALL_ALLOC_MASK INTEL_MASK(13, 8) -# define GEN7_L3CNTLREG2_RO_ALLOC_SHIFT 14 -# define GEN7_L3CNTLREG2_RO_ALLOC_MASK INTEL_MASK(19, 14) -# define GEN7_L3CNTLREG2_RO_LOW_BW (1 << 20) -# define GEN7_L3CNTLREG2_DC_ALLOC_SHIFT 21 -# define GEN7_L3CNTLREG2_DC_ALLOC_MASK INTEL_MASK(26, 21) -# define GEN7_L3CNTLREG2_DC_LOW_BW (1 << 27) - -#define GEN7_L3CNTLREG3 0xb024 -# define GEN7_L3CNTLREG3_IS_ALLOC_SHIFT 1 -# define GEN7_L3CNTLREG3_IS_ALLOC_MASK INTEL_MASK(6, 1) -# define GEN7_L3CNTLREG3_IS_LOW_BW (1 << 7) -# define GEN7_L3CNTLREG3_C_ALLOC_SHIFT 8 -# define GEN7_L3CNTLREG3_C_ALLOC_MASK INTEL_MASK(13, 8) -# define GEN7_L3CNTLREG3_C_LOW_BW (1 << 14) -# define GEN7_L3CNTLREG3_T_ALLOC_SHIFT 15 -# define GEN7_L3CNTLREG3_T_ALLOC_MASK INTEL_MASK(20, 15) -# define GEN7_L3CNTLREG3_T_LOW_BW (1 << 21) - -#define HSW_SCRATCH1 0xb038 -#define HSW_SCRATCH1_L3_ATOMIC_DISABLE (1 << 27) - -#define HSW_ROW_CHICKEN3 0xe49c -#define HSW_ROW_CHICKEN3_L3_ATOMIC_DISABLE (1 << 6) - -#define GEN8_L3CNTLREG 0x7034 -# define GEN8_L3CNTLREG_SLM_ENABLE (1 << 0) -# define GEN8_L3CNTLREG_URB_ALLOC_SHIFT 1 -# define GEN8_L3CNTLREG_URB_ALLOC_MASK INTEL_MASK(7, 1) -# define GEN8_L3CNTLREG_RO_ALLOC_SHIFT 11 -# define GEN8_L3CNTLREG_RO_ALLOC_MASK INTEL_MASK(17, 11) -# define GEN8_L3CNTLREG_DC_ALLOC_SHIFT 18 -# define GEN8_L3CNTLREG_DC_ALLOC_MASK INTEL_MASK(24, 18) -# define GEN8_L3CNTLREG_ALL_ALLOC_SHIFT 25 -# define GEN8_L3CNTLREG_ALL_ALLOC_MASK INTEL_MASK(31, 25) diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/intel_resolve_map.c mesa-17.0.7/src/mesa/drivers/dri/i965/intel_resolve_map.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/intel_resolve_map.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/intel_resolve_map.c 2017-06-01 10:37:10.000000000 +0000 @@ -33,9 +33,9 @@ */ void intel_resolve_map_set(struct exec_list *resolve_map, - uint32_t level, - uint32_t layer, - enum gen6_hiz_op need) + uint32_t level, + uint32_t layer, + unsigned need) { foreach_list_typed(struct intel_resolve_map, map, link, resolve_map) { if (map->level == level && map->layer == layer) { @@ -57,13 +57,16 @@ * \brief Get an element from the map. * \return null if element is not contained in map. */ -struct intel_resolve_map * -intel_resolve_map_get(struct exec_list *resolve_map, - uint32_t level, - uint32_t layer) +const struct intel_resolve_map * +intel_resolve_map_find_any(const struct exec_list *resolve_map, + uint32_t start_level, uint32_t num_levels, + uint32_t start_layer, uint32_t num_layers) { foreach_list_typed(struct intel_resolve_map, map, link, resolve_map) { - if (map->level == level && map->layer == layer) + if (map->level >= start_level && + map->level < (start_level + num_levels) && + map->layer >= start_layer && + map->layer < (start_layer + num_layers)) return map; } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/intel_resolve_map.h mesa-17.0.7/src/mesa/drivers/dri/i965/intel_resolve_map.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/intel_resolve_map.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/intel_resolve_map.h 2017-06-01 10:37:10.000000000 +0000 @@ -24,6 +24,7 @@ #pragma once #include +#include "blorp/blorp.h" #include "compiler/glsl/list.h" #ifdef __cplusplus @@ -31,20 +32,60 @@ #endif /** - * For an overview of the HiZ operations, see the following sections of the - * Sandy Bridge PRM, Volume 1, Part2: - * - 7.5.3.1 Depth Buffer Clear - * - 7.5.3.2 Depth Buffer Resolve - * - 7.5.3.3 Hierarchical Depth Buffer Resolve + * Enum for keeping track of the fast clear state of a buffer associated with + * a miptree. * - * Of these, two get entered in the resolve map as needing to be done to the - * buffer: depth resolve and hiz resolve. + * Fast clear works by deferring the memory writes that would be used to clear + * the buffer, so that instead of performing them at the time of the clear + * operation, the hardware automatically performs them at the time that the + * buffer is later accessed for rendering. The MCS buffer keeps track of + * which regions of the buffer still have pending clear writes. + * + * This enum keeps track of the driver's knowledge of pending fast clears in + * the MCS buffer. + * + * MCS buffers only exist on Gen7+. */ -enum gen6_hiz_op { - GEN6_HIZ_OP_DEPTH_CLEAR, - GEN6_HIZ_OP_DEPTH_RESOLVE, - GEN6_HIZ_OP_HIZ_RESOLVE, - GEN6_HIZ_OP_NONE, +enum intel_fast_clear_state +{ + /** + * No deferred clears are pending for this miptree, and the contents of the + * color buffer are entirely correct. An MCS buffer may or may not exist + * for this miptree. If it does exist, it is entirely in the "no deferred + * clears pending" state. If it does not exist, it will be created the + * first time a fast color clear is executed. + * + * In this state, the color buffer can be used for purposes other than + * rendering without needing a render target resolve. + * + * Since there is no such thing as a "fast color clear resolve" for MSAA + * buffers, an MSAA buffer will never be in this state. + */ + INTEL_FAST_CLEAR_STATE_RESOLVED, + + /** + * An MCS buffer exists for this miptree, and deferred clears are pending + * for some regions of the color buffer, as indicated by the MCS buffer. + * The contents of the color buffer are only correct for the regions where + * the MCS buffer doesn't indicate a deferred clear. + * + * If a single-sample buffer is in this state, a render target resolve must + * be performed before it can be used for purposes other than rendering. + */ + INTEL_FAST_CLEAR_STATE_UNRESOLVED, + + /** + * An MCS buffer exists for this miptree, and deferred clears are pending + * for the entire color buffer, and the contents of the MCS buffer reflect + * this. The contents of the color buffer are undefined. + * + * If a single-sample buffer is in this state, a render target resolve must + * be performed before it can be used for purposes other than rendering. + * + * If the client attempts to clear a buffer which is already in this state, + * the clear can be safely skipped, since the buffer is already clear. + */ + INTEL_FAST_CLEAR_STATE_CLEAR, }; /** @@ -78,19 +119,40 @@ uint32_t level; uint32_t layer; - enum gen6_hiz_op need; + + union { + enum blorp_hiz_op need; + enum intel_fast_clear_state fast_clear_state; + }; }; void intel_resolve_map_set(struct exec_list *resolve_map, - uint32_t level, - uint32_t layer, - enum gen6_hiz_op need); + uint32_t level, + uint32_t layer, + unsigned new_state); + +const struct intel_resolve_map * +intel_resolve_map_find_any(const struct exec_list *resolve_map, + uint32_t start_level, uint32_t num_levels, + uint32_t start_layer, uint32_t num_layers); + +static inline const struct intel_resolve_map * +intel_resolve_map_const_get(const struct exec_list *resolve_map, + uint32_t level, + uint32_t layer) +{ + return intel_resolve_map_find_any(resolve_map, level, 1, layer, 1); +} -struct intel_resolve_map * +static inline struct intel_resolve_map * intel_resolve_map_get(struct exec_list *resolve_map, uint32_t level, - uint32_t layer); + uint32_t layer) +{ + return (struct intel_resolve_map *)intel_resolve_map_find_any( + resolve_map, level, 1, layer, 1); +} void intel_resolve_map_remove(struct intel_resolve_map *resolve_map); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/intel_screen.c mesa-17.0.7/src/mesa/drivers/dri/i965/intel_screen.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/intel_screen.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/intel_screen.c 2017-06-01 10:37:10.000000000 +0000 @@ -65,6 +65,8 @@ DRI_CONF_SECTION_QUALITY DRI_CONF_FORCE_S3TC_ENABLE("false") + DRI_CONF_PRECISE_TRIG("false") + DRI_CONF_OPT_BEGIN(clamp_max_samples, int, -1) DRI_CONF_DESC(en, "Clamp the value of GL_MAX_SAMPLES to the " "given integer. If negative, then do not clamp.") @@ -77,6 +79,7 @@ DRI_CONF_ALWAYS_FLUSH_CACHE("false") DRI_CONF_DISABLE_THROTTLING("false") DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN("false") + DRI_CONF_FORCE_GLSL_VERSION(0) DRI_CONF_DISABLE_GLSL_LINE_CONTINUATIONS("false") DRI_CONF_DISABLE_BLEND_FUNC_EXTENDED("false") DRI_CONF_DUAL_COLOR_BLEND_BY_LOCATION("false") @@ -228,6 +231,9 @@ { __DRI_IMAGE_FOURCC_XBGR8888, __DRI_IMAGE_COMPONENTS_RGB, 1, { { 0, 0, 0, __DRI_IMAGE_FORMAT_XBGR8888, 4 }, } }, + { __DRI_IMAGE_FOURCC_ARGB1555, __DRI_IMAGE_COMPONENTS_RGBA, 1, + { { 0, 0, 0, __DRI_IMAGE_FORMAT_ARGB1555, 2 } } }, + { __DRI_IMAGE_FOURCC_RGB565, __DRI_IMAGE_COMPONENTS_RGB, 1, { { 0, 0, 0, __DRI_IMAGE_FORMAT_RGB565, 2 } } }, @@ -397,11 +403,11 @@ } static __DRIimage * -intel_create_image_from_name(__DRIscreen *screen, +intel_create_image_from_name(__DRIscreen *dri_screen, int width, int height, int format, int name, int pitch, void *loaderPrivate) { - struct intel_screen *intelScreen = screen->driverPrivate; + struct intel_screen *screen = dri_screen->driverPrivate; __DRIimage *image; int cpp; @@ -417,7 +423,7 @@ image->width = width; image->height = height; image->pitch = pitch * cpp; - image->bo = drm_intel_bo_gem_create_from_name(intelScreen->bufmgr, "image", + image->bo = drm_intel_bo_gem_create_from_name(screen->bufmgr, "image", name); if (!image->bo) { free(image); @@ -534,13 +540,13 @@ } static __DRIimage * -intel_create_image(__DRIscreen *screen, +intel_create_image(__DRIscreen *dri_screen, int width, int height, int format, unsigned int use, void *loaderPrivate) { __DRIimage *image; - struct intel_screen *intelScreen = screen->driverPrivate; + struct intel_screen *screen = dri_screen->driverPrivate; uint32_t tiling; int cpp; unsigned long pitch; @@ -560,7 +566,7 @@ return NULL; cpp = _mesa_get_format_bytes(image->format); - image->bo = drm_intel_bo_alloc_tiled(intelScreen->bufmgr, "image", + image->bo = drm_intel_bo_alloc_tiled(screen->bufmgr, "image", width, height, cpp, &tiling, &pitch, 0); if (image->bo == NULL) { @@ -601,16 +607,15 @@ *value = image->planar_format->components; return true; case __DRI_IMAGE_ATTRIB_FD: - if (drm_intel_bo_gem_export_to_prime(image->bo, value) == 0) - return true; - return false; + return !drm_intel_bo_gem_export_to_prime(image->bo, value); case __DRI_IMAGE_ATTRIB_FOURCC: - if (intel_lookup_fourcc(image->dri_format, value)) - return true; - return false; + return intel_lookup_fourcc(image->dri_format, value); case __DRI_IMAGE_ATTRIB_NUM_PLANES: *value = 1; return true; + case __DRI_IMAGE_ATTRIB_OFFSET: + *value = image->offset; + return true; default: return false; @@ -659,7 +664,7 @@ } static __DRIimage * -intel_create_image_from_names(__DRIscreen *screen, +intel_create_image_from_names(__DRIscreen *dri_screen, int width, int height, int fourcc, int *names, int num_names, int *strides, int *offsets, @@ -669,14 +674,14 @@ __DRIimage *image; int i, index; - if (screen == NULL || names == NULL || num_names != 1) + if (dri_screen == NULL || names == NULL || num_names != 1) return NULL; f = intel_image_format_lookup(fourcc); if (f == NULL) return NULL; - image = intel_create_image_from_name(screen, width, height, + image = intel_create_image_from_name(dri_screen, width, height, __DRI_IMAGE_FORMAT_NONE, names[0], strides[0], loaderPrivate); @@ -695,12 +700,12 @@ } static __DRIimage * -intel_create_image_from_fds(__DRIscreen *screen, +intel_create_image_from_fds(__DRIscreen *dri_screen, int width, int height, int fourcc, int *fds, int num_fds, int *strides, int *offsets, void *loaderPrivate) { - struct intel_screen *intelScreen = screen->driverPrivate; + struct intel_screen *screen = dri_screen->driverPrivate; struct intel_image_format *f; __DRIimage *image; int i, index; @@ -742,7 +747,7 @@ size = end; } - image->bo = drm_intel_bo_gem_create_from_prime(intelScreen->bufmgr, + image->bo = drm_intel_bo_gem_create_from_prime(screen->bufmgr, fds[0], size); if (image->bo == NULL) { free(image); @@ -758,7 +763,7 @@ } static __DRIimage * -intel_create_image_from_dma_bufs(__DRIscreen *screen, +intel_create_image_from_dma_bufs(__DRIscreen *dri_screen, int width, int height, int fourcc, int *fds, int num_fds, int *strides, int *offsets, @@ -777,7 +782,7 @@ return NULL; } - image = intel_create_image_from_fds(screen, width, height, fourcc, fds, + image = intel_create_image_from_fds(dri_screen, width, height, fourcc, fds, num_fds, strides, offsets, loaderPrivate); @@ -847,7 +852,7 @@ } static const __DRIimageExtension intelImageExtension = { - .base = { __DRI_IMAGE, 11 }, + .base = { __DRI_IMAGE, 13 }, .createImageFromName = intel_create_image_from_name, .createImageFromRenderbuffer = intel_create_image_from_renderbuffer, @@ -862,21 +867,24 @@ .createImageFromFds = intel_create_image_from_fds, .createImageFromDmaBufs = intel_create_image_from_dma_bufs, .blitImage = NULL, - .getCapabilities = NULL + .getCapabilities = NULL, + .mapImage = NULL, + .unmapImage = NULL, }; static int -brw_query_renderer_integer(__DRIscreen *psp, int param, unsigned int *value) +brw_query_renderer_integer(__DRIscreen *dri_screen, + int param, unsigned int *value) { - const struct intel_screen *const intelScreen = - (struct intel_screen *) psp->driverPrivate; + const struct intel_screen *const screen = + (struct intel_screen *) dri_screen->driverPrivate; switch (param) { case __DRI2_RENDERER_VENDOR_ID: value[0] = 0x8086; return 0; case __DRI2_RENDERER_DEVICE_ID: - value[0] = intelScreen->deviceID; + value[0] = screen->deviceID; return 0; case __DRI2_RENDERER_ACCELERATED: value[0] = 1; @@ -889,7 +897,7 @@ size_t aper_size; size_t mappable_size; - drm_intel_get_aperture_sizes(psp->fd, &mappable_size, &aper_size); + drm_intel_get_aperture_sizes(dri_screen->fd, &mappable_size, &aper_size); const unsigned gpu_mappable_megabytes = (aper_size / (1024 * 1024)) * 3 / 4; @@ -912,25 +920,29 @@ case __DRI2_RENDERER_UNIFIED_MEMORY_ARCHITECTURE: value[0] = 1; return 0; + case __DRI2_RENDERER_HAS_TEXTURE_3D: + value[0] = 1; + return 0; default: - return driQueryRendererIntegerCommon(psp, param, value); + return driQueryRendererIntegerCommon(dri_screen, param, value); } return -1; } static int -brw_query_renderer_string(__DRIscreen *psp, int param, const char **value) +brw_query_renderer_string(__DRIscreen *dri_screen, + int param, const char **value) { - const struct intel_screen *intelScreen = - (struct intel_screen *) psp->driverPrivate; + const struct intel_screen *screen = + (struct intel_screen *) dri_screen->driverPrivate; switch (param) { case __DRI2_RENDERER_VENDOR_ID: value[0] = brw_vendor_string; return 0; case __DRI2_RENDERER_DEVICE_ID: - value[0] = brw_get_renderer_string(intelScreen); + value[0] = brw_get_renderer_string(screen); return 0; default: break; @@ -950,7 +962,7 @@ .base = { __DRI2_ROBUSTNESS, 1 } }; -static const __DRIextension *intelScreenExtensions[] = { +static const __DRIextension *screenExtensions[] = { &intelTexBufferExtension.base, &intelFenceExtension.base, &intelFlushExtension.base, @@ -972,38 +984,51 @@ }; static int -intel_get_param(__DRIscreen *psp, int param, int *value) +intel_get_param(struct intel_screen *screen, int param, int *value) { - int ret; + int ret = 0; struct drm_i915_getparam gp; memset(&gp, 0, sizeof(gp)); gp.param = param; gp.value = value; - ret = drmCommandWriteRead(psp->fd, DRM_I915_GETPARAM, &gp, sizeof(gp)); - if (ret < 0 && ret != -EINVAL) - _mesa_warning(NULL, "drm_i915_getparam: %d", ret); + if (drmIoctl(screen->driScrnPriv->fd, DRM_IOCTL_I915_GETPARAM, &gp) == -1) { + ret = -errno; + if (ret != -EINVAL) + _mesa_warning(NULL, "drm_i915_getparam: %d", ret); + } return ret; } static bool -intel_get_boolean(__DRIscreen *psp, int param) +intel_get_boolean(struct intel_screen *screen, int param) { int value = 0; - return (intel_get_param(psp, param, &value) == 0) && value; + return (intel_get_param(screen, param, &value) == 0) && value; +} + +static int +intel_get_integer(struct intel_screen *screen, int param) +{ + int value = -1; + + if (intel_get_param(screen, param, &value) == 0) + return value; + + return -1; } static void intelDestroyScreen(__DRIscreen * sPriv) { - struct intel_screen *intelScreen = sPriv->driverPrivate; + struct intel_screen *screen = sPriv->driverPrivate; - dri_bufmgr_destroy(intelScreen->bufmgr); - driDestroyOptionInfo(&intelScreen->optionCache); + dri_bufmgr_destroy(screen->bufmgr); + driDestroyOptionInfo(&screen->optionCache); - ralloc_free(intelScreen); + ralloc_free(screen); sPriv->driverPrivate = NULL; } @@ -1012,14 +1037,16 @@ * This is called when we need to set up GL rendering to a new X window. */ static GLboolean -intelCreateBuffer(__DRIscreen * driScrnPriv, +intelCreateBuffer(__DRIscreen *dri_screen, __DRIdrawable * driDrawPriv, const struct gl_config * mesaVis, GLboolean isPixmap) { struct intel_renderbuffer *rb; - struct intel_screen *screen = (struct intel_screen*) driScrnPriv->driverPrivate; + struct intel_screen *screen = (struct intel_screen *) + dri_screen->driverPrivate; mesa_format rgbFormat; - unsigned num_samples = intel_quantize_num_samples(screen, mesaVis->samples); + unsigned num_samples = + intel_quantize_num_samples(screen, mesaVis->samples); struct gl_framebuffer *fb; if (isPixmap) @@ -1068,7 +1095,7 @@ if (mesaVis->depthBits == 24) { assert(mesaVis->stencilBits == 8); - if (screen->devinfo->has_hiz_and_separate_stencil) { + if (screen->devinfo.has_hiz_and_separate_stencil) { rb = intel_create_private_renderbuffer(MESA_FORMAT_Z24_UNORM_X8_UINT, num_samples); _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base); @@ -1119,21 +1146,21 @@ } static void -intel_detect_sseu(struct intel_screen *intelScreen) +intel_detect_sseu(struct intel_screen *screen) { - assert(intelScreen->devinfo->gen >= 8); + assert(screen->devinfo.gen >= 8); int ret; - intelScreen->subslice_total = -1; - intelScreen->eu_total = -1; + screen->subslice_total = -1; + screen->eu_total = -1; - ret = intel_get_param(intelScreen->driScrnPriv, I915_PARAM_SUBSLICE_TOTAL, - &intelScreen->subslice_total); + ret = intel_get_param(screen, I915_PARAM_SUBSLICE_TOTAL, + &screen->subslice_total); if (ret < 0 && ret != -EINVAL) goto err_out; - ret = intel_get_param(intelScreen->driScrnPriv, - I915_PARAM_EU_TOTAL, &intelScreen->eu_total); + ret = intel_get_param(screen, + I915_PARAM_EU_TOTAL, &screen->eu_total); if (ret < 0 && ret != -EINVAL) goto err_out; @@ -1141,35 +1168,35 @@ * and we have to use conservative numbers for GPGPU on many platforms, but * otherwise, things will just work. */ - if (intelScreen->subslice_total < 1 || intelScreen->eu_total < 1) + if (screen->subslice_total < 1 || screen->eu_total < 1) _mesa_warning(NULL, "Kernel 4.1 required to properly query GPU properties.\n"); return; err_out: - intelScreen->subslice_total = -1; - intelScreen->eu_total = -1; + screen->subslice_total = -1; + screen->eu_total = -1; _mesa_warning(NULL, "Failed to query GPU properties (%s).\n", strerror(-ret)); } static bool -intel_init_bufmgr(struct intel_screen *intelScreen) +intel_init_bufmgr(struct intel_screen *screen) { - __DRIscreen *spriv = intelScreen->driScrnPriv; + __DRIscreen *dri_screen = screen->driScrnPriv; - intelScreen->no_hw = getenv("INTEL_NO_HW") != NULL; + screen->no_hw = getenv("INTEL_NO_HW") != NULL; - intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ); - if (intelScreen->bufmgr == NULL) { + screen->bufmgr = intel_bufmgr_gem_init(dri_screen->fd, BATCH_SZ); + if (screen->bufmgr == NULL) { fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n", __func__, __LINE__); return false; } - drm_intel_bufmgr_gem_enable_fenced_relocs(intelScreen->bufmgr); + drm_intel_bufmgr_gem_enable_fenced_relocs(screen->bufmgr); - if (!intel_get_boolean(spriv, I915_PARAM_HAS_RELAXED_DELTA)) { + if (!intel_get_boolean(screen, I915_PARAM_HAS_RELAXED_DELTA)) { fprintf(stderr, "[%s: %u] Kernel 2.6.39 required.\n", __func__, __LINE__); return false; } @@ -1245,6 +1272,102 @@ return 0; } + /** + * Test if we can use MI_LOAD_REGISTER_MEM from an untrusted batchbuffer. + * + * Some combinations of hardware and kernel versions allow this feature, + * while others don't. Instead of trying to enumerate every case, just + * try and write a register and see if works. + */ +static bool +intel_detect_pipelined_register(struct intel_screen *screen, + int reg, uint32_t expected_value, bool reset) +{ + drm_intel_bo *results, *bo; + uint32_t *batch; + uint32_t offset = 0; + bool success = false; + + /* Create a zero'ed temporary buffer for reading our results */ + results = drm_intel_bo_alloc(screen->bufmgr, "registers", 4096, 0); + if (results == NULL) + goto err; + + bo = drm_intel_bo_alloc(screen->bufmgr, "batchbuffer", 4096, 0); + if (bo == NULL) + goto err_results; + + if (drm_intel_bo_map(bo, 1)) + goto err_batch; + + batch = bo->virtual; + + /* Write the register. */ + *batch++ = MI_LOAD_REGISTER_IMM | (3 - 2); + *batch++ = reg; + *batch++ = expected_value; + + /* Save the register's value back to the buffer. */ + *batch++ = MI_STORE_REGISTER_MEM | (3 - 2); + *batch++ = reg; + drm_intel_bo_emit_reloc(bo, (char *)batch -(char *)bo->virtual, + results, offset*sizeof(uint32_t), + I915_GEM_DOMAIN_INSTRUCTION, + I915_GEM_DOMAIN_INSTRUCTION); + *batch++ = results->offset + offset*sizeof(uint32_t); + + /* And afterwards clear the register */ + if (reset) { + *batch++ = MI_LOAD_REGISTER_IMM | (3 - 2); + *batch++ = reg; + *batch++ = 0; + } + + *batch++ = MI_BATCH_BUFFER_END; + + drm_intel_bo_mrb_exec(bo, ALIGN((char *)batch - (char *)bo->virtual, 8), + NULL, 0, 0, + I915_EXEC_RENDER); + + /* Check whether the value got written. */ + if (drm_intel_bo_map(results, false) == 0) { + success = *((uint32_t *)results->virtual + offset) == expected_value; + drm_intel_bo_unmap(results); + } + +err_batch: + drm_intel_bo_unreference(bo); +err_results: + drm_intel_bo_unreference(results); +err: + return success; +} + +static bool +intel_detect_pipelined_so(struct intel_screen *screen) +{ + const struct gen_device_info *devinfo = &screen->devinfo; + + /* Supposedly, Broadwell just works. */ + if (devinfo->gen >= 8) + return true; + + if (devinfo->gen <= 6) + return false; + + /* See the big explanation about command parser versions below */ + if (screen->cmd_parser_version >= (devinfo->is_haswell ? 7 : 2)) + return true; + + /* We use SO_WRITE_OFFSET0 since you're supposed to write it (unlike the + * statistics registers), and we already reset it to zero before using it. + */ + return intel_detect_pipelined_register(screen, + GEN7_SO_WRITE_OFFSET(0), + 0x1337d0d0, + false); +} + /** * Return array of MSAA modes supported by the hardware. The array is * zero-terminated and sorted in decreasing order. @@ -1258,13 +1381,13 @@ static const int gen6_modes[] = {4, 0, -1}; static const int gen4_modes[] = {0, -1}; - if (screen->devinfo->gen >= 9) { + if (screen->devinfo.gen >= 9) { return gen9_modes; - } else if (screen->devinfo->gen >= 8) { + } else if (screen->devinfo.gen >= 8) { return gen8_modes; - } else if (screen->devinfo->gen >= 7) { + } else if (screen->devinfo.gen >= 7) { return gen7_modes; - } else if (screen->devinfo->gen == 6) { + } else if (screen->devinfo.gen == 6) { return gen6_modes; } else { return gen4_modes; @@ -1289,7 +1412,7 @@ static const uint8_t multisample_samples[2] = {4, 8}; struct intel_screen *screen = dri_screen->driverPrivate; - const struct brw_device_info *devinfo = screen->devinfo; + const struct gen_device_info *devinfo = &screen->devinfo; uint8_t depth_bits[4], stencil_bits[4]; __DRIconfig **configs = NULL; @@ -1324,7 +1447,7 @@ num_depth_stencil_bits, back_buffer_modes, 2, singlesample_samples, 1, - false); + false, false); configs = driConcatConfigs(configs, new_configs); } @@ -1346,7 +1469,7 @@ depth_bits, stencil_bits, 1, back_buffer_modes, 1, singlesample_samples, 1, - true); + true, false); configs = driConcatConfigs(configs, new_configs); } @@ -1394,7 +1517,7 @@ back_buffer_modes, 1, multisample_samples, num_msaa_modes, - false); + false, false); configs = driConcatConfigs(configs, new_configs); } @@ -1410,29 +1533,43 @@ static void set_max_gl_versions(struct intel_screen *screen) { - __DRIscreen *psp = screen->driScrnPriv; + __DRIscreen *dri_screen = screen->driScrnPriv; + const bool has_astc = screen->devinfo.gen >= 9; - switch (screen->devinfo->gen) { + switch (screen->devinfo.gen) { case 9: case 8: - psp->max_gl_core_version = 43; - psp->max_gl_compat_version = 30; - psp->max_gl_es1_version = 11; - psp->max_gl_es2_version = 31; + dri_screen->max_gl_core_version = 45; + dri_screen->max_gl_compat_version = 30; + dri_screen->max_gl_es1_version = 11; + dri_screen->max_gl_es2_version = has_astc ? 32 : 31; break; case 7: + dri_screen->max_gl_core_version = 33; + if (screen->devinfo.is_haswell && + can_do_pipelined_register_writes(screen)) { + dri_screen->max_gl_core_version = 42; + if (can_do_compute_dispatch(screen)) + dri_screen->max_gl_core_version = 43; + if (can_do_mi_math_and_lrr(screen)) + dri_screen->max_gl_core_version = 45; + } + dri_screen->max_gl_compat_version = 30; + dri_screen->max_gl_es1_version = 11; + dri_screen->max_gl_es2_version = screen->devinfo.is_haswell ? 31 : 30; + break; case 6: - psp->max_gl_core_version = 33; - psp->max_gl_compat_version = 30; - psp->max_gl_es1_version = 11; - psp->max_gl_es2_version = 30; + dri_screen->max_gl_core_version = 33; + dri_screen->max_gl_compat_version = 30; + dri_screen->max_gl_es1_version = 11; + dri_screen->max_gl_es2_version = 30; break; case 5: case 4: - psp->max_gl_core_version = 0; - psp->max_gl_compat_version = 21; - psp->max_gl_es1_version = 11; - psp->max_gl_es2_version = 20; + dri_screen->max_gl_core_version = 0; + dri_screen->max_gl_compat_version = 21; + dri_screen->max_gl_es1_version = 11; + dri_screen->max_gl_es2_version = 20; break; default: unreachable("unrecognized intel_screen::gen"); @@ -1518,13 +1655,13 @@ * \return the struct gl_config supported by this driver */ static const -__DRIconfig **intelInitScreen2(__DRIscreen *psp) +__DRIconfig **intelInitScreen2(__DRIscreen *dri_screen) { - struct intel_screen *intelScreen; + struct intel_screen *screen; - if (psp->image.loader) { - } else if (psp->dri2.loader->base.version <= 2 || - psp->dri2.loader->getBuffersWithFormat == NULL) { + if (dri_screen->image.loader) { + } else if (dri_screen->dri2.loader->base.version <= 2 || + dri_screen->dri2.loader->getBuffersWithFormat == NULL) { fprintf(stderr, "\nERROR! DRI2 loader with getBuffersWithFormat() " "support required\n"); @@ -1532,60 +1669,230 @@ } /* Allocate the private area */ - intelScreen = rzalloc(NULL, struct intel_screen); - if (!intelScreen) { + screen = rzalloc(NULL, struct intel_screen); + if (!screen) { fprintf(stderr, "\nERROR! Allocating private area failed\n"); return false; } /* parse information in __driConfigOptions */ - driParseOptionInfo(&intelScreen->optionCache, brw_config_options.xml); + driParseOptionInfo(&screen->optionCache, brw_config_options.xml); - intelScreen->driScrnPriv = psp; - psp->driverPrivate = (void *) intelScreen; + screen->driScrnPriv = dri_screen; + dri_screen->driverPrivate = (void *) screen; - if (!intel_init_bufmgr(intelScreen)) + if (!intel_init_bufmgr(screen)) return false; - intelScreen->deviceID = drm_intel_bufmgr_gem_get_devid(intelScreen->bufmgr); - intelScreen->devinfo = brw_get_device_info(intelScreen->deviceID); - if (!intelScreen->devinfo) + screen->deviceID = drm_intel_bufmgr_gem_get_devid(screen->bufmgr); + if (!gen_get_device_info(screen->deviceID, &screen->devinfo)) return false; brw_process_intel_debug_variable(); if (INTEL_DEBUG & DEBUG_BUFMGR) - dri_bufmgr_set_debug(intelScreen->bufmgr, true); + dri_bufmgr_set_debug(screen->bufmgr, true); - if ((INTEL_DEBUG & DEBUG_SHADER_TIME) && intelScreen->devinfo->gen < 7) { + if ((INTEL_DEBUG & DEBUG_SHADER_TIME) && screen->devinfo.gen < 7) { fprintf(stderr, "shader_time debugging requires gen7 (Ivybridge) or better.\n"); INTEL_DEBUG &= ~DEBUG_SHADER_TIME; } if (INTEL_DEBUG & DEBUG_AUB) - drm_intel_bufmgr_gem_set_aub_dump(intelScreen->bufmgr, true); + drm_intel_bufmgr_gem_set_aub_dump(screen->bufmgr, true); + +#ifndef I915_PARAM_MMAP_GTT_VERSION +#define I915_PARAM_MMAP_GTT_VERSION 40 /* XXX delete me with new libdrm */ +#endif + if (intel_get_integer(screen, I915_PARAM_MMAP_GTT_VERSION) >= 1) { + /* Theorectically unlimited! At least for individual objects... + * + * Currently the entire (global) address space for all GTT maps is + * limited to 64bits. That is all objects on the system that are + * setup for GTT mmapping must fit within 64bits. An attempt to use + * one that exceeds the limit with fail in drm_intel_bo_map_gtt(). + * + * Long before we hit that limit, we will be practically limited by + * that any single object must fit in physical memory (RAM). The upper + * limit on the CPU's address space is currently 48bits (Skylake), of + * which only 39bits can be physical memory. (The GPU itself also has + * a 48bit addressable virtual space.) We can fit over 32 million + * objects of the current maximum allocable size before running out + * of mmap space. + */ + screen->max_gtt_map_object_size = UINT64_MAX; + } else { + /* Estimate the size of the mappable aperture into the GTT. There's an + * ioctl to get the whole GTT size, but not one to get the mappable subset. + * It turns out it's basically always 256MB, though some ancient hardware + * was smaller. + */ + uint32_t gtt_size = 256 * 1024 * 1024; - intelScreen->hw_has_swizzling = intel_detect_swizzling(intelScreen); - intelScreen->hw_has_timestamp = intel_detect_timestamp(intelScreen); + /* We don't want to map two objects such that a memcpy between them would + * just fault one mapping in and then the other over and over forever. So + * we would need to divide the GTT size by 2. Additionally, some GTT is + * taken up by things like the framebuffer and the ringbuffer and such, so + * be more conservative. + */ + screen->max_gtt_map_object_size = gtt_size / 4; + } + + screen->hw_has_swizzling = intel_detect_swizzling(screen); + screen->hw_has_timestamp = intel_detect_timestamp(screen); /* GENs prior to 8 do not support EU/Subslice info */ - if (intelScreen->devinfo->gen >= 8) { - intel_detect_sseu(intelScreen); - } else if (intelScreen->devinfo->gen == 7) { - intelScreen->subslice_total = 1 << (intelScreen->devinfo->gt - 1); + if (screen->devinfo.gen >= 8) { + intel_detect_sseu(screen); + } else if (screen->devinfo.gen == 7) { + screen->subslice_total = 1 << (screen->devinfo.gt - 1); } + /* Gen7-7.5 kernel requirements / command parser saga: + * + * - pre-v3.16: + * Haswell and Baytrail cannot use any privileged batchbuffer features. + * + * Ivybridge has aliasing PPGTT on by default, which accidentally marks + * all batches secure, allowing them to use any feature with no checking. + * This is effectively equivalent to a command parser version of + * \infinity - everything is possible. + * + * The command parser does not exist, and querying the version will + * return -EINVAL. + * + * - v3.16: + * The kernel enables the command parser by default, for systems with + * aliasing PPGTT enabled (Ivybridge and Haswell). However, the + * hardware checker is still enabled, so Haswell and Baytrail cannot + * do anything. + * + * Ivybridge goes from "everything is possible" to "only what the + * command parser allows" (if the user boots with i915.cmd_parser=0, + * then everything is possible again). We can only safely use features + * allowed by the supported command parser version. + * + * Annoyingly, I915_PARAM_CMD_PARSER_VERSION reports the static version + * implemented by the kernel, even if it's turned off. So, checking + * for version > 0 does not mean that you can write registers. We have + * to try it and see. The version does, however, indicate the age of + * the kernel. + * + * Instead of matching the hardware checker's behavior of converting + * privileged commands to MI_NOOP, it makes execbuf2 start returning + * -EINVAL, making it dangerous to try and use privileged features. + * + * Effective command parser versions: + * - Haswell: 0 (reporting 1, writes don't work) + * - Baytrail: 0 (reporting 1, writes don't work) + * - Ivybridge: 1 (enabled) or infinite (disabled) + * + * - v3.17: + * Baytrail aliasing PPGTT is enabled, making it like Ivybridge: + * effectively version 1 (enabled) or infinite (disabled). + * + * - v3.19: f1f55cc0556031c8ee3fe99dae7251e78b9b653b + * Command parser v2 supports predicate writes. + * + * - Haswell: 0 (reporting 1, writes don't work) + * - Baytrail: 2 (enabled) or infinite (disabled) + * - Ivybridge: 2 (enabled) or infinite (disabled) + * + * So version >= 2 is enough to know that Ivybridge and Baytrail + * will work. Haswell still can't do anything. + * + * - v4.0: Version 3 happened. Largely not relevant. + * + * - v4.1: 6702cf16e0ba8b0129f5aa1b6609d4e9c70bc13b + * L3 config registers are properly saved and restored as part + * of the hardware context. We can approximately detect this point + * in time by checking if I915_PARAM_REVISION is recognized - it + * landed in a later commit, but in the same release cycle. + * + * - v4.2: 245054a1fe33c06ad233e0d58a27ec7b64db9284 + * Command parser finally gains secure batch promotion. On Haswell, + * the hardware checker gets disabled, which finally allows it to do + * privileged commands. + * + * I915_PARAM_CMD_PARSER_VERSION reports 3. Effective versions: + * - Haswell: 3 (enabled) or 0 (disabled) + * - Baytrail: 3 (enabled) or infinite (disabled) + * - Ivybridge: 3 (enabled) or infinite (disabled) + * + * Unfortunately, detecting this point in time is tricky, because + * no version bump happened when this important change occurred. + * On Haswell, if we can write any register, then the kernel is at + * least this new, and we can start trusting the version number. + * + * - v4.4: 2bbe6bbb0dc94fd4ce287bdac9e1bd184e23057b and + * Command parser reaches version 4, allowing access to Haswell + * atomic scratch and chicken3 registers. If version >= 4, we know + * the kernel is new enough to support privileged features on all + * hardware. However, the user might have disabled it...and the + * kernel will still report version 4. So we still have to guess + * and check. + * + * - v4.4: 7b9748cb513a6bef4af87b79f0da3ff7e8b56cd8 + * Command parser v5 whitelists indirect compute shader dispatch + * registers, needed for OpenGL 4.3 and later. + * + * - v4.8: + * Command parser v7 lets us use MI_MATH on Haswell. + * + * Additionally, the kernel begins reporting version 0 when + * the command parser is disabled, allowing us to skip the + * guess-and-check step on Haswell. Unfortunately, this also + * means that we can no longer use it as an indicator of the + * age of the kernel. + */ + if (intel_get_param(screen, I915_PARAM_CMD_PARSER_VERSION, + &screen->cmd_parser_version) < 0) { + /* Command parser does not exist - getparam is unrecognized */ + screen->cmd_parser_version = 0; + } + + if (!intel_detect_pipelined_so(screen)) { + /* We can't do anything, so the effective version is 0. */ + screen->cmd_parser_version = 0; + } else { + screen->kernel_features |= KERNEL_ALLOWS_SOL_OFFSET_WRITES; + } + + if (screen->devinfo.gen >= 8 || screen->cmd_parser_version >= 2) + screen->kernel_features |= KERNEL_ALLOWS_PREDICATE_WRITES; + + /* Haswell requires command parser version 4 in order to have L3 + * atomic scratch1 and chicken3 bits + */ + if (screen->devinfo.is_haswell && screen->cmd_parser_version >= 4) { + screen->kernel_features |= + KERNEL_ALLOWS_HSW_SCRATCH1_AND_ROW_CHICKEN3; + } + + /* Haswell requires command parser version 6 in order to write to the + * MI_MATH GPR registers, and version 7 in order to use + * MI_LOAD_REGISTER_REG (which all users of MI_MATH use). + */ + if (screen->devinfo.gen >= 8 || + (screen->devinfo.is_haswell && screen->cmd_parser_version >= 7)) { + screen->kernel_features |= KERNEL_ALLOWS_MI_MATH_AND_LRR; + } + + /* Gen7 needs at least command parser version 5 to support compute */ + if (screen->devinfo.gen >= 8 || screen->cmd_parser_version >= 5) + screen->kernel_features |= KERNEL_ALLOWS_COMPUTE_DISPATCH; + const char *force_msaa = getenv("INTEL_FORCE_MSAA"); if (force_msaa) { - intelScreen->winsys_msaa_samples_override = - intel_quantize_num_samples(intelScreen, atoi(force_msaa)); + screen->winsys_msaa_samples_override = + intel_quantize_num_samples(screen, atoi(force_msaa)); printf("Forcing winsys sample count to %d\n", - intelScreen->winsys_msaa_samples_override); + screen->winsys_msaa_samples_override); } else { - intelScreen->winsys_msaa_samples_override = -1; + screen->winsys_msaa_samples_override = -1; } - set_max_gl_versions(intelScreen); + set_max_gl_versions(screen); /* Notification of GPU resets requires hardware contexts and a kernel new * enough to support DRM_IOCTL_I915_GET_RESET_STATS. If the ioctl is @@ -1596,50 +1903,31 @@ * * Don't even try on pre-Gen6, since we don't attempt to use contexts there. */ - if (intelScreen->devinfo->gen >= 6) { + if (screen->devinfo.gen >= 6) { struct drm_i915_reset_stats stats; memset(&stats, 0, sizeof(stats)); - const int ret = drmIoctl(psp->fd, DRM_IOCTL_I915_GET_RESET_STATS, &stats); + const int ret = drmIoctl(dri_screen->fd, DRM_IOCTL_I915_GET_RESET_STATS, &stats); - intelScreen->has_context_reset_notification = + screen->has_context_reset_notification = (ret != -1 || errno != EINVAL); } - struct drm_i915_getparam getparam; - getparam.param = I915_PARAM_CMD_PARSER_VERSION; - getparam.value = &intelScreen->cmd_parser_version; - const int ret = drmIoctl(psp->fd, DRM_IOCTL_I915_GETPARAM, &getparam); - if (ret == -1) - intelScreen->cmd_parser_version = 0; + dri_screen->extensions = !screen->has_context_reset_notification + ? screenExtensions : intelRobustScreenExtensions; - /* Haswell requires command parser version 6 in order to write to the - * MI_MATH GPR registers, and version 7 in order to use - * MI_LOAD_REGISTER_REG (which all users of MI_MATH use). - */ - intelScreen->has_mi_math_and_lrr = intelScreen->devinfo->gen >= 8 || - (intelScreen->devinfo->is_haswell && - intelScreen->cmd_parser_version >= 7); - - psp->extensions = !intelScreen->has_context_reset_notification - ? intelScreenExtensions : intelRobustScreenExtensions; - - intelScreen->compiler = brw_compiler_create(intelScreen, - intelScreen->devinfo); - intelScreen->compiler->shader_debug_log = shader_debug_log_mesa; - intelScreen->compiler->shader_perf_log = shader_perf_log_mesa; - intelScreen->program_id = 1; + screen->compiler = brw_compiler_create(screen, + &screen->devinfo); + screen->compiler->shader_debug_log = shader_debug_log_mesa; + screen->compiler->shader_perf_log = shader_perf_log_mesa; + screen->program_id = 1; - if (intelScreen->devinfo->has_resource_streamer) { - int val = -1; - getparam.param = I915_PARAM_HAS_RESOURCE_STREAMER; - getparam.value = &val; - - drmIoctl(psp->fd, DRM_IOCTL_I915_GETPARAM, &getparam); - intelScreen->has_resource_streamer = val > 0; + if (screen->devinfo.has_resource_streamer) { + screen->has_resource_streamer = + intel_get_boolean(screen, I915_PARAM_HAS_RESOURCE_STREAMER); } - return (const __DRIconfig**) intel_screen_make_configs(psp); + return (const __DRIconfig**) intel_screen_make_configs(dri_screen); } struct intel_buffer { @@ -1648,12 +1936,12 @@ }; static __DRIbuffer * -intelAllocateBuffer(__DRIscreen *screen, +intelAllocateBuffer(__DRIscreen *dri_screen, unsigned attachment, unsigned format, int width, int height) { struct intel_buffer *intelBuffer; - struct intel_screen *intelScreen = screen->driverPrivate; + struct intel_screen *screen = dri_screen->driverPrivate; assert(attachment == __DRI_BUFFER_FRONT_LEFT || attachment == __DRI_BUFFER_BACK_LEFT); @@ -1666,7 +1954,7 @@ uint32_t tiling = I915_TILING_X; unsigned long pitch; int cpp = format / 8; - intelBuffer->bo = drm_intel_bo_alloc_tiled(intelScreen->bufmgr, + intelBuffer->bo = drm_intel_bo_alloc_tiled(screen->bufmgr, "intelAllocateBuffer", width, height, @@ -1689,7 +1977,7 @@ } static void -intelReleaseBuffer(__DRIscreen *screen, __DRIbuffer *buffer) +intelReleaseBuffer(__DRIscreen *dri_screen, __DRIbuffer *buffer) { struct intel_buffer *intelBuffer = (struct intel_buffer *) buffer; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/intel_screen.h mesa-17.0.7/src/mesa/drivers/dri/i965/intel_screen.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/intel_screen.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/intel_screen.h 2017-06-01 10:37:10.000000000 +0000 @@ -33,17 +33,19 @@ #include "dri_util.h" #include "intel_bufmgr.h" -#include "brw_device_info.h" +#include "common/gen_device_info.h" #include "i915_drm.h" #include "xmlconfig.h" struct intel_screen { int deviceID; - const struct brw_device_info *devinfo; + struct gen_device_info devinfo; __DRIscreen *driScrnPriv; + uint64_t max_gtt_map_object_size; + bool no_hw; bool hw_has_swizzling; @@ -56,15 +58,20 @@ bool has_resource_streamer; /** - * Does the current hardware and kernel support MI_MATH and - * MI_LOAD_REGISTER_REG? + * Does the kernel support context reset notifications? */ - bool has_mi_math_and_lrr; + bool has_context_reset_notification; /** - * Does the kernel support context reset notifications? + * Does the kernel support features such as pipelined register access to + * specific registers? */ - bool has_context_reset_notification; + unsigned kernel_features; +#define KERNEL_ALLOWS_SOL_OFFSET_WRITES (1<<0) +#define KERNEL_ALLOWS_PREDICATE_WRITES (1<<1) +#define KERNEL_ALLOWS_MI_MATH_AND_LRR (1<<2) +#define KERNEL_ALLOWS_HSW_SCRATCH1_AND_ROW_CHICKEN3 (1<<3) +#define KERNEL_ALLOWS_COMPUTE_DISPATCH (1<<4) dri_bufmgr *bufmgr; @@ -117,4 +124,34 @@ const int* intel_supported_msaa_modes(const struct intel_screen *screen); +static inline bool +can_do_pipelined_register_writes(const struct intel_screen *screen) +{ + return screen->kernel_features & KERNEL_ALLOWS_SOL_OFFSET_WRITES; +} + +static inline bool +can_do_hsw_l3_atomics(const struct intel_screen *screen) +{ + return screen->kernel_features & KERNEL_ALLOWS_HSW_SCRATCH1_AND_ROW_CHICKEN3; +} + +static inline bool +can_do_mi_math_and_lrr(const struct intel_screen *screen) +{ + return screen->kernel_features & KERNEL_ALLOWS_MI_MATH_AND_LRR; +} + +static inline bool +can_do_compute_dispatch(const struct intel_screen *screen) +{ + return screen->kernel_features & KERNEL_ALLOWS_COMPUTE_DISPATCH; +} + +static inline bool +can_do_predicate_writes(const struct intel_screen *screen) +{ + return screen->kernel_features & KERNEL_ALLOWS_PREDICATE_WRITES; +} + #endif diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/intel_syncobj.c mesa-17.0.7/src/mesa/drivers/dri/i965/intel_syncobj.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/intel_syncobj.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/intel_syncobj.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,301 +0,0 @@ -/* - * Copyright © 2008 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * Authors: - * Eric Anholt - * - */ - -/** - * \file - * \brief Support for GL_ARB_sync and EGL_KHR_fence_sync. - * - * GL_ARB_sync is implemented by flushing the current batchbuffer and keeping a - * reference on it. We can then check for completion or wait for completion - * using the normal buffer object mechanisms. This does mean that if an - * application is using many sync objects, it will emit small batchbuffers - * which may end up being a significant overhead. In other tests of removing - * gratuitous batchbuffer syncs in Mesa, it hasn't appeared to be a significant - * performance bottleneck, though. - */ - -#include "main/imports.h" - -#include "brw_context.h" -#include "intel_batchbuffer.h" -#include "intel_reg.h" - -struct brw_fence { - struct brw_context *brw; - /** The fence waits for completion of this batch. */ - drm_intel_bo *batch_bo; - - mtx_t mutex; - bool signalled; -}; - -struct intel_gl_sync_object { - struct gl_sync_object Base; - struct brw_fence fence; -}; - -static void -brw_fence_init(struct brw_context *brw, struct brw_fence *fence) -{ - fence->brw = brw; - fence->batch_bo = NULL; - mtx_init(&fence->mutex, mtx_plain); -} - -static void -brw_fence_finish(struct brw_fence *fence) -{ - if (fence->batch_bo) - drm_intel_bo_unreference(fence->batch_bo); - - mtx_destroy(&fence->mutex); -} - -static void -brw_fence_insert(struct brw_context *brw, struct brw_fence *fence) -{ - assert(!fence->batch_bo); - assert(!fence->signalled); - - brw_emit_mi_flush(brw); - fence->batch_bo = brw->batch.bo; - drm_intel_bo_reference(fence->batch_bo); - intel_batchbuffer_flush(brw); -} - -static bool -brw_fence_has_completed_locked(struct brw_fence *fence) -{ - if (fence->signalled) - return true; - - if (fence->batch_bo && !drm_intel_bo_busy(fence->batch_bo)) { - drm_intel_bo_unreference(fence->batch_bo); - fence->batch_bo = NULL; - fence->signalled = true; - return true; - } - - return false; -} - -static bool -brw_fence_has_completed(struct brw_fence *fence) -{ - bool ret; - - mtx_lock(&fence->mutex); - ret = brw_fence_has_completed_locked(fence); - mtx_unlock(&fence->mutex); - - return ret; -} - -static bool -brw_fence_client_wait_locked(struct brw_context *brw, struct brw_fence *fence, - uint64_t timeout) -{ - if (fence->signalled) - return true; - - assert(fence->batch_bo); - - /* DRM_IOCTL_I915_GEM_WAIT uses a signed 64 bit timeout and returns - * immediately for timeouts <= 0. The best we can do is to clamp the - * timeout to INT64_MAX. This limits the maximum timeout from 584 years to - * 292 years - likely not a big deal. - */ - if (timeout > INT64_MAX) - timeout = INT64_MAX; - - if (drm_intel_gem_bo_wait(fence->batch_bo, timeout) != 0) - return false; - - fence->signalled = true; - drm_intel_bo_unreference(fence->batch_bo); - fence->batch_bo = NULL; - - return true; -} - -/** - * Return true if the function successfully signals or has already signalled. - * (This matches the behavior expected from __DRI2fence::client_wait_sync). - */ -static bool -brw_fence_client_wait(struct brw_context *brw, struct brw_fence *fence, - uint64_t timeout) -{ - bool ret; - - mtx_lock(&fence->mutex); - ret = brw_fence_client_wait_locked(brw, fence, timeout); - mtx_unlock(&fence->mutex); - - return ret; -} - -static void -brw_fence_server_wait(struct brw_context *brw, struct brw_fence *fence) -{ - /* We have nothing to do for WaitSync. Our GL command stream is sequential, - * so given that the sync object has already flushed the batchbuffer, any - * batchbuffers coming after this waitsync will naturally not occur until - * the previous one is done. - */ -} - -static struct gl_sync_object * -intel_gl_new_sync_object(struct gl_context *ctx, GLuint id) -{ - struct intel_gl_sync_object *sync; - - sync = calloc(1, sizeof(*sync)); - if (!sync) - return NULL; - - return &sync->Base; -} - -static void -intel_gl_delete_sync_object(struct gl_context *ctx, struct gl_sync_object *s) -{ - struct intel_gl_sync_object *sync = (struct intel_gl_sync_object *)s; - - brw_fence_finish(&sync->fence); - free(sync); -} - -static void -intel_gl_fence_sync(struct gl_context *ctx, struct gl_sync_object *s, - GLenum condition, GLbitfield flags) -{ - struct brw_context *brw = brw_context(ctx); - struct intel_gl_sync_object *sync = (struct intel_gl_sync_object *)s; - - brw_fence_init(brw, &sync->fence); - brw_fence_insert(brw, &sync->fence); -} - -static void -intel_gl_client_wait_sync(struct gl_context *ctx, struct gl_sync_object *s, - GLbitfield flags, GLuint64 timeout) -{ - struct brw_context *brw = brw_context(ctx); - struct intel_gl_sync_object *sync = (struct intel_gl_sync_object *)s; - - if (brw_fence_client_wait(brw, &sync->fence, timeout)) - s->StatusFlag = 1; -} - -static void -intel_gl_server_wait_sync(struct gl_context *ctx, struct gl_sync_object *s, - GLbitfield flags, GLuint64 timeout) -{ - struct brw_context *brw = brw_context(ctx); - struct intel_gl_sync_object *sync = (struct intel_gl_sync_object *)s; - - brw_fence_server_wait(brw, &sync->fence); -} - -static void -intel_gl_check_sync(struct gl_context *ctx, struct gl_sync_object *s) -{ - struct intel_gl_sync_object *sync = (struct intel_gl_sync_object *)s; - - if (brw_fence_has_completed(&sync->fence)) - s->StatusFlag = 1; -} - -void -intel_init_syncobj_functions(struct dd_function_table *functions) -{ - functions->NewSyncObject = intel_gl_new_sync_object; - functions->DeleteSyncObject = intel_gl_delete_sync_object; - functions->FenceSync = intel_gl_fence_sync; - functions->CheckSync = intel_gl_check_sync; - functions->ClientWaitSync = intel_gl_client_wait_sync; - functions->ServerWaitSync = intel_gl_server_wait_sync; -} - -static void * -intel_dri_create_fence(__DRIcontext *ctx) -{ - struct brw_context *brw = ctx->driverPrivate; - struct brw_fence *fence; - - fence = calloc(1, sizeof(*fence)); - if (!fence) - return NULL; - - brw_fence_init(brw, fence); - brw_fence_insert(brw, fence); - - return fence; -} - -static void -intel_dri_destroy_fence(__DRIscreen *screen, void *driver_fence) -{ - struct brw_fence *fence = driver_fence; - - brw_fence_finish(fence); - free(fence); -} - -static GLboolean -intel_dri_client_wait_sync(__DRIcontext *ctx, void *driver_fence, unsigned flags, - uint64_t timeout) -{ - struct brw_fence *fence = driver_fence; - - return brw_fence_client_wait(fence->brw, fence, timeout); -} - -static void -intel_dri_server_wait_sync(__DRIcontext *ctx, void *driver_fence, unsigned flags) -{ - struct brw_fence *fence = driver_fence; - - /* We might be called here with a NULL fence as a result of WaitSyncKHR - * on a EGL_KHR_reusable_sync fence. Nothing to do here in such case. - */ - if (!fence) - return; - - brw_fence_server_wait(fence->brw, fence); -} - -const __DRI2fenceExtension intelFenceExtension = { - .base = { __DRI2_FENCE, 1 }, - - .create_fence = intel_dri_create_fence, - .destroy_fence = intel_dri_destroy_fence, - .client_wait_sync = intel_dri_client_wait_sync, - .server_wait_sync = intel_dri_server_wait_sync, - .get_fence_from_cl_event = NULL, -}; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/intel_tex.c mesa-17.0.7/src/mesa/drivers/dri/i965/intel_tex.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/intel_tex.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/intel_tex.c 2017-06-01 10:37:10.000000000 +0000 @@ -5,6 +5,7 @@ #include "main/mipmap.h" #include "drivers/common/meta.h" #include "brw_context.h" +#include "brw_defines.h" #include "intel_buffer_objects.h" #include "intel_mipmap_tree.h" #include "intel_tex.h" @@ -70,7 +71,7 @@ /* Quantize sample count */ if (image->NumSamples) { - image->NumSamples = intel_quantize_num_samples(brw->intelScreen, image->NumSamples); + image->NumSamples = intel_quantize_num_samples(brw->screen, image->NumSamples); if (!image->NumSamples) return false; } @@ -127,7 +128,7 @@ struct brw_context *brw = brw_context(ctx); struct intel_texture_object *intel_texobj = intel_texture_object(texobj); struct gl_texture_image *first_image = texobj->Image[0][0]; - int num_samples = intel_quantize_num_samples(brw->intelScreen, + int num_samples = intel_quantize_num_samples(brw->screen, first_image->NumSamples); const int numFaces = _mesa_num_tex_faces(texobj->Target); int face; @@ -364,7 +365,17 @@ { struct brw_context *brw = brw_context(ctx); - brw_emit_mi_flush(brw); + if (brw->gen >= 6) { + brw_emit_pipe_control_flush(brw, + PIPE_CONTROL_DEPTH_CACHE_FLUSH | + PIPE_CONTROL_RENDER_TARGET_FLUSH | + PIPE_CONTROL_CS_STALL); + + brw_emit_pipe_control_flush(brw, + PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE); + } else { + brw_emit_mi_flush(brw); + } } void diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/intel_tex.h mesa-17.0.7/src/mesa/drivers/dri/i965/intel_tex.h --- mesa-12.0.6/src/mesa/drivers/dri/i965/intel_tex.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/intel_tex.h 2017-06-01 10:37:10.000000000 +0000 @@ -51,7 +51,7 @@ struct intel_texture_image *intelImage, uint32_t layout_flags); -GLuint intel_finalize_mipmap_tree(struct brw_context *brw, GLuint unit); +void intel_finalize_mipmap_tree(struct brw_context *brw, GLuint unit); bool intel_texsubimage_tiled_memcpy(struct gl_context *ctx, diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/intel_tex_image.c mesa-17.0.7/src/mesa/drivers/dri/i965/intel_tex_image.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/intel_tex_image.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/intel_tex_image.c 2017-06-01 10:37:10.000000000 +0000 @@ -29,6 +29,22 @@ #define FILE_DEBUG_FLAG DEBUG_TEXTURE +/* Make sure one doesn't end up shrinking base level zero unnecessarily. + * Determining the base level dimension by shifting higher level dimension + * ends up in off-by-one value in case base level has NPOT size (for example, + * 293 != 146 << 1). + * Choose the original base level dimension when shifted dimensions agree. + * Otherwise assume real resize is intended and use the new shifted value. + */ +static unsigned +get_base_dim(unsigned old_base_dim, unsigned new_level_dim, unsigned level) +{ + const unsigned old_level_dim = old_base_dim >> level; + const unsigned new_base_dim = new_level_dim << level; + + return old_level_dim == new_level_dim ? old_base_dim : new_base_dim; +} + /* Work back from the specified level of the image to the baselevel and create a * miptree of that size. */ @@ -40,19 +56,39 @@ { GLuint lastLevel; int width, height, depth; - GLuint i; + const struct intel_mipmap_tree *old_mt = intelObj->mt; + const unsigned level = intelImage->base.Base.Level; intel_get_image_dims(&intelImage->base.Base, &width, &height, &depth); DBG("%s\n", __func__); /* Figure out image dimensions at start level. */ - for (i = intelImage->base.Base.Level; i > 0; i--) { - width <<= 1; - if (height != 1) - height <<= 1; - if (intelObj->base.Target == GL_TEXTURE_3D) - depth <<= 1; + switch(intelObj->base.Target) { + case GL_TEXTURE_2D_MULTISAMPLE: + case GL_TEXTURE_2D_MULTISAMPLE_ARRAY: + case GL_TEXTURE_RECTANGLE: + case GL_TEXTURE_EXTERNAL_OES: + assert(level == 0); + break; + case GL_TEXTURE_3D: + depth = old_mt ? get_base_dim(old_mt->logical_depth0, depth, level) : + depth << level; + /* Fall through */ + case GL_TEXTURE_2D: + case GL_TEXTURE_2D_ARRAY: + case GL_TEXTURE_CUBE_MAP: + case GL_TEXTURE_CUBE_MAP_ARRAY: + height = old_mt ? get_base_dim(old_mt->logical_height0, height, level) : + height << level; + /* Fall through */ + case GL_TEXTURE_1D: + case GL_TEXTURE_1D_ARRAY: + width = old_mt ? get_base_dim(old_mt->logical_width0, width, level) : + width << level; + break; + default: + unreachable("Unexpected target"); } /* Guess a reasonable value for lastLevel. This is probably going @@ -108,6 +144,9 @@ assert(intelImage->mt); + if (intelImage->mt->format == MESA_FORMAT_S_UINT8) + intelImage->mt->r8stencil_needs_update = true; + ok = _mesa_meta_pbo_TexSubImage(ctx, dims, texImage, 0, 0, 0, texImage->Width, texImage->Height, texImage->Depth, @@ -366,12 +405,11 @@ { struct brw_context *brw = brw_context(ctx); struct intel_mipmap_tree *mt; - __DRIscreen *screen; + __DRIscreen *dri_screen = brw->screen->driScrnPriv; __DRIimage *image; - screen = brw->intelScreen->driScrnPriv; - image = screen->dri2.image->lookupEGLImage(screen, image_handle, - screen->loaderPrivate); + image = dri_screen->dri2.image->lookupEGLImage(dri_screen, image_handle, + dri_screen->loaderPrivate); if (image == NULL) return; @@ -485,7 +523,7 @@ /* Since we are going to write raw data to the miptree, we need to resolve * any pending fast color clears before we start. */ - intel_miptree_resolve_color(brw, image->mt, 0); + intel_miptree_all_slices_resolve_color(brw, image->mt, 0); bo = image->mt->bo; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/intel_tex_subimage.c mesa-17.0.7/src/mesa/drivers/dri/i965/intel_tex_subimage.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/intel_tex_subimage.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/intel_tex_subimage.c 2017-06-01 10:37:10.000000000 +0000 @@ -139,7 +139,7 @@ /* Since we are going to write raw data to the miptree, we need to resolve * any pending fast color clears before we start. */ - intel_miptree_resolve_color(brw, image->mt, 0); + intel_miptree_all_slices_resolve_color(brw, image->mt, 0); bo = image->mt->bo; @@ -199,10 +199,13 @@ const GLvoid * pixels, const struct gl_pixelstore_attrib *packing) { - struct intel_texture_image *intelImage = intel_texture_image(texImage); + struct intel_mipmap_tree *mt = intel_texture_image(texImage)->mt; bool ok; - bool tex_busy = intelImage->mt && drm_intel_bo_busy(intelImage->mt->bo); + bool tex_busy = mt && drm_intel_bo_busy(mt->bo); + + if (mt && mt->format == MESA_FORMAT_S_UINT8) + mt->r8stencil_needs_update = true; DBG("%s mesa_format %s target %s format %s type %s level %d %dx%dx%d\n", __func__, _mesa_get_format_name(texImage->TexFormat), diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/intel_tex_validate.c mesa-17.0.7/src/mesa/drivers/dri/i965/intel_tex_validate.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/intel_tex_validate.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/intel_tex_validate.c 2017-06-01 10:37:10.000000000 +0000 @@ -64,7 +64,7 @@ * BaseLevel/MaxLevel/filtering, and copy in any texture images that are * stored in other miptrees. */ -GLuint +void intel_finalize_mipmap_tree(struct brw_context *brw, GLuint unit) { struct gl_context *ctx = &brw->ctx; @@ -78,7 +78,7 @@ /* TBOs require no validation -- they always just point to their BO. */ if (tObj->Target == GL_TEXTURE_BUFFER) - return true; + return; /* We know that this is true by now, and if it wasn't, we might have * mismatched level sizes and the copies would fail. @@ -98,7 +98,7 @@ if (!intelObj->needs_validate && validate_first_level >= intelObj->validated_first_level && validate_last_level <= intelObj->validated_last_level) { - return true; + return; } /* On recent generations, immutable textures should not get this far @@ -149,7 +149,7 @@ 0 /* num_samples */, layout_flags); if (!intelObj->mt) - return false; + return; } /* Pull in any images not in the object's tree: @@ -180,6 +180,23 @@ intelObj->validated_last_level = validate_last_level; intelObj->_Format = intelObj->mt->format; intelObj->needs_validate = false; +} + +/** + * Finalizes all textures, completing any rendering that needs to be done + * to prepare them. + */ +void +brw_validate_textures(struct brw_context *brw) +{ + struct gl_context *ctx = &brw->ctx; + const int max_enabled_unit = ctx->Texture._MaxEnabledTexImageUnit; + + for (int unit = 0; unit <= max_enabled_unit; unit++) { + struct gl_texture_unit *tex_unit = &ctx->Texture.Unit[unit]; - return true; + if (tex_unit->_Current) { + intel_finalize_mipmap_tree(brw, unit); + } + } } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/Makefile.am mesa-17.0.7/src/mesa/drivers/dri/i965/Makefile.am --- mesa-12.0.6/src/mesa/drivers/dri/i965/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -30,28 +30,60 @@ -I$(top_srcdir)/src/mesa/ \ -I$(top_srcdir)/src/gallium/include \ -I$(top_srcdir)/src/gallium/auxiliary \ + -I$(top_builddir)/src/mesa/drivers/dri/common \ -I$(top_srcdir)/src/mesa/drivers/dri/common \ -I$(top_srcdir)/src/mesa/drivers/dri/intel/server \ -I$(top_srcdir)/src/gtest/include \ + -I$(top_builddir)/src/compiler/glsl \ + -I$(top_builddir)/src/compiler/nir \ -I$(top_srcdir)/src/compiler/nir \ + -I$(top_builddir)/src/intel \ -I$(top_srcdir)/src/intel \ - -I$(top_builddir)/src/compiler/nir \ - -I$(top_builddir)/src/mesa/drivers/dri/common \ $(DEFINES) \ $(VISIBILITY_CFLAGS) \ $(INTEL_CFLAGS) AM_CXXFLAGS = $(AM_CFLAGS) +MKDIR_GEN = $(AM_V_at)$(MKDIR_P) $(@D) brw_nir_trig_workarounds.c: brw_nir_trig_workarounds.py $(top_srcdir)/src/compiler/nir/nir_algebraic.py $(MKDIR_GEN) $(AM_V_GEN) PYTHONPATH=$(top_srcdir)/src/compiler/nir $(PYTHON2) $(PYTHON_FLAGS) $(srcdir)/brw_nir_trig_workarounds.py > $@ || ($(RM) $@; false) -noinst_LTLIBRARIES = libi965_dri.la libi965_compiler.la +I965_PERGEN_LIBS = \ + libi965_gen6.la \ + libi965_gen7.la \ + libi965_gen75.la \ + libi965_gen8.la \ + libi965_gen9.la + +libi965_gen6_la_SOURCES = $(i965_gen6_FILES) +libi965_gen6_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=60 + +libi965_gen7_la_SOURCES = $(i965_gen7_FILES) +libi965_gen7_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=70 + +libi965_gen75_la_SOURCES = $(i965_gen75_FILES) +libi965_gen75_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=75 + +libi965_gen8_la_SOURCES = $(i965_gen8_FILES) +libi965_gen8_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=80 + +libi965_gen9_la_SOURCES = $(i965_gen9_FILES) +libi965_gen9_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=90 + +noinst_LTLIBRARIES = \ + libi965_dri.la \ + libi965_compiler.la \ + $(I965_PERGEN_LIBS) + libi965_dri_la_SOURCES = $(i965_FILES) libi965_dri_la_LIBADD = \ + $(top_builddir)/src/intel/common/libintel_common.la \ $(top_builddir)/src/intel/isl/libisl.la \ libi965_compiler.la \ + $(top_builddir)/src/intel/blorp/libblorp.la \ + $(I965_PERGEN_LIBS) \ $(INTEL_LIBS) libi965_compiler_la_SOURCES = \ @@ -66,6 +98,7 @@ TEST_LIBS = \ libi965_compiler.la \ + $(I965_PERGEN_LIBS) \ $(top_builddir)/src/compiler/nir/libnir.la \ $(top_builddir)/src/util/libmesautil.la \ $(top_builddir)/src/intel/isl/libisl.la \ diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/Makefile.in mesa-17.0.7/src/mesa/drivers/dri/i965/Makefile.in --- mesa-12.0.6/src/mesa/drivers/dri/i965/Makefile.in 2017-01-24 01:41:56.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/Makefile.in 2017-06-01 10:37:24.000000000 +0000 @@ -139,17 +139,17 @@ LTLIBRARIES = $(noinst_LTLIBRARIES) libi965_compiler_la_LIBADD = am__objects_1 = brw_cfg.lo brw_compiler.lo brw_dead_control_flow.lo \ - brw_device_info.lo brw_disasm.lo brw_eu.lo brw_eu_compact.lo \ - brw_eu_emit.lo brw_eu_util.lo brw_eu_validate.lo \ - brw_fs_cmod_propagation.lo brw_fs_combine_constants.lo \ - brw_fs_copy_propagation.lo brw_fs.lo brw_fs_cse.lo \ - brw_fs_dead_code_eliminate.lo brw_fs_generator.lo \ - brw_fs_live_variables.lo brw_fs_lower_d2x.lo \ - brw_fs_lower_pack.lo brw_fs_nir.lo brw_fs_reg_allocate.lo \ - brw_fs_register_coalesce.lo brw_fs_saturate_propagation.lo \ - brw_fs_sel_peephole.lo brw_fs_surface_builder.lo \ - brw_fs_validate.lo brw_fs_visitor.lo brw_interpolation_map.lo \ - brw_nir.lo brw_nir_analyze_boolean_resolves.lo \ + brw_disasm.lo brw_eu.lo brw_eu_compact.lo brw_eu_emit.lo \ + brw_eu_util.lo brw_eu_validate.lo brw_fs_cmod_propagation.lo \ + brw_fs_combine_constants.lo brw_fs_copy_propagation.lo \ + brw_fs.lo brw_fs_cse.lo brw_fs_dead_code_eliminate.lo \ + brw_fs_generator.lo brw_fs_live_variables.lo \ + brw_fs_lower_d2x.lo brw_fs_lower_pack.lo brw_fs_nir.lo \ + brw_fs_reg_allocate.lo brw_fs_register_coalesce.lo \ + brw_fs_saturate_propagation.lo brw_fs_sel_peephole.lo \ + brw_fs_surface_builder.lo brw_fs_validate.lo brw_fs_visitor.lo \ + brw_interpolation_map.lo brw_nir.lo \ + brw_nir_analyze_boolean_resolves.lo \ brw_nir_attribute_workarounds.lo brw_nir_intrinsics.lo \ brw_nir_opt_peephole_ffma.lo brw_nir_tcs_workarounds.lo \ brw_packed_float.lo brw_predicated_break.lo \ @@ -171,42 +171,42 @@ am__v_lt_0 = --silent am__v_lt_1 = am__DEPENDENCIES_1 = -libi965_dri_la_DEPENDENCIES = $(top_builddir)/src/intel/isl/libisl.la \ - libi965_compiler.la $(am__DEPENDENCIES_1) -am__objects_3 = brw_binding_tables.lo brw_blorp_blit.lo \ - brw_blorp_clear.lo brw_blorp.lo brw_cc.lo brw_clear.lo \ - brw_clip.lo brw_clip_line.lo brw_clip_point.lo \ +libi965_dri_la_DEPENDENCIES = \ + $(top_builddir)/src/intel/common/libintel_common.la \ + $(top_builddir)/src/intel/isl/libisl.la libi965_compiler.la \ + $(top_builddir)/src/intel/blorp/libblorp.la \ + $(I965_PERGEN_LIBS) $(am__DEPENDENCIES_1) +am__objects_3 = brw_binding_tables.lo brw_blorp.lo brw_cc.lo \ + brw_clear.lo brw_clip.lo brw_clip_line.lo brw_clip_point.lo \ brw_clip_state.lo brw_clip_tri.lo brw_clip_unfilled.lo \ brw_clip_util.lo brw_compute.lo brw_conditional_render.lo \ brw_context.lo brw_cs.lo brw_cubemap_normalize.lo brw_curbe.lo \ brw_draw.lo brw_draw_upload.lo brw_ff_gs.lo brw_ff_gs_emit.lo \ brw_fs_channel_expressions.lo brw_fs_vector_splitting.lo \ brw_formatquery.lo brw_gs.lo brw_gs_state.lo \ - brw_gs_surface_state.lo brw_link.lo \ - brw_lower_texture_gradients.lo brw_meta_util.lo \ + brw_gs_surface_state.lo brw_link.lo brw_meta_util.lo \ brw_misc_state.lo brw_nir_uniforms.lo brw_object_purgeable.lo \ - brw_performance_monitor.lo brw_pipe_control.lo brw_program.lo \ + brw_pipe_control.lo brw_program.lo brw_program_cache.lo \ brw_primitive_restart.lo brw_queryobj.lo brw_reset.lo \ brw_sampler_state.lo brw_sf.lo brw_sf_emit.lo brw_sf_state.lo \ - brw_state_batch.lo brw_state_cache.lo brw_state_dump.lo \ - brw_state_upload.lo brw_surface_formats.lo brw_tcs.lo \ + brw_state_batch.lo brw_state_dump.lo brw_state_upload.lo \ + brw_surface_formats.lo brw_sync.lo brw_tcs.lo \ brw_tcs_surface_state.lo brw_tes.lo brw_tes_surface_state.lo \ - brw_tex.lo brw_tex_layout.lo brw_urb.lo brw_vs.lo \ - brw_vs_state.lo brw_vs_surface_state.lo brw_wm.lo \ - brw_wm_state.lo brw_wm_surface_state.lo gen6_blorp.lo \ - gen6_cc.lo gen6_clip_state.lo gen6_constant_state.lo \ - gen6_depth_state.lo gen6_depthstencil.lo gen6_gs_state.lo \ + brw_tex_layout.lo brw_urb.lo brw_vs.lo brw_vs_state.lo \ + brw_vs_surface_state.lo brw_wm.lo brw_wm_state.lo \ + brw_wm_surface_state.lo gen6_cc.lo gen6_clip_state.lo \ + gen6_constant_state.lo gen6_depth_state.lo \ + gen6_depthstencil.lo gen6_gs_state.lo \ gen6_multisample_state.lo gen6_queryobj.lo \ gen6_sampler_state.lo gen6_scissor_state.lo gen6_sf_state.lo \ - gen6_sol.lo gen6_surface_state.lo gen6_urb.lo \ - gen6_viewport_state.lo gen6_vs_state.lo gen6_wm_state.lo \ - gen7_blorp.lo gen7_cs_state.lo gen7_ds_state.lo \ - gen7_gs_state.lo gen7_hs_state.lo gen7_l3_state.lo \ - gen7_misc_state.lo gen7_sf_state.lo gen7_sol_state.lo \ - gen7_te_state.lo gen7_urb.lo gen7_viewport_state.lo \ - gen7_vs_state.lo gen7_wm_state.lo gen7_wm_surface_state.lo \ - gen8_blend_state.lo gen8_blorp.lo gen8_depth_state.lo \ - gen8_disable.lo gen8_draw_upload.lo gen8_ds_state.lo \ + gen6_sol.lo gen6_urb.lo gen6_viewport_state.lo \ + gen6_vs_state.lo gen6_wm_state.lo gen7_cs_state.lo \ + gen7_ds_state.lo gen7_gs_state.lo gen7_hs_state.lo \ + gen7_l3_state.lo gen7_misc_state.lo gen7_sf_state.lo \ + gen7_sol_state.lo gen7_te_state.lo gen7_urb.lo \ + gen7_viewport_state.lo gen7_vs_state.lo gen7_wm_state.lo \ + gen7_wm_surface_state.lo gen8_blend_state.lo \ + gen8_depth_state.lo gen8_draw_upload.lo gen8_ds_state.lo \ gen8_gs_state.lo gen8_hs_state.lo gen8_multisample_state.lo \ gen8_ps_state.lo gen8_sf_state.lo gen8_sol_state.lo \ gen8_surface_state.lo gen8_viewport_state.lo gen8_vs_state.lo \ @@ -216,11 +216,51 @@ intel_fbo.lo intel_mipmap_tree.lo intel_pixel_bitmap.lo \ intel_pixel.lo intel_pixel_copy.lo intel_pixel_draw.lo \ intel_pixel_read.lo intel_screen.lo intel_state.lo \ - intel_syncobj.lo intel_tex.lo intel_tex_copy.lo \ - intel_tex_image.lo intel_tex_subimage.lo intel_tex_validate.lo \ + intel_tex.lo intel_tex_copy.lo intel_tex_image.lo \ + intel_tex_subimage.lo intel_tex_validate.lo \ intel_tiled_memcpy.lo intel_upload.lo am_libi965_dri_la_OBJECTS = $(am__objects_3) libi965_dri_la_OBJECTS = $(am_libi965_dri_la_OBJECTS) +libi965_gen6_la_LIBADD = +am__objects_4 = libi965_gen6_la-genX_blorp_exec.lo +am_libi965_gen6_la_OBJECTS = $(am__objects_4) +libi965_gen6_la_OBJECTS = $(am_libi965_gen6_la_OBJECTS) +libi965_gen6_la_LINK = $(LIBTOOL) $(AM_V_lt) --tag=CC \ + $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=link $(CCLD) \ + $(libi965_gen6_la_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) $(LDFLAGS) \ + -o $@ +libi965_gen7_la_LIBADD = +am__objects_5 = libi965_gen7_la-genX_blorp_exec.lo +am_libi965_gen7_la_OBJECTS = $(am__objects_5) +libi965_gen7_la_OBJECTS = $(am_libi965_gen7_la_OBJECTS) +libi965_gen7_la_LINK = $(LIBTOOL) $(AM_V_lt) --tag=CC \ + $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=link $(CCLD) \ + $(libi965_gen7_la_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) $(LDFLAGS) \ + -o $@ +libi965_gen75_la_LIBADD = +am__objects_6 = libi965_gen75_la-genX_blorp_exec.lo +am_libi965_gen75_la_OBJECTS = $(am__objects_6) +libi965_gen75_la_OBJECTS = $(am_libi965_gen75_la_OBJECTS) +libi965_gen75_la_LINK = $(LIBTOOL) $(AM_V_lt) --tag=CC \ + $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=link $(CCLD) \ + $(libi965_gen75_la_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) $(LDFLAGS) \ + -o $@ +libi965_gen8_la_LIBADD = +am__objects_7 = libi965_gen8_la-genX_blorp_exec.lo +am_libi965_gen8_la_OBJECTS = $(am__objects_7) +libi965_gen8_la_OBJECTS = $(am_libi965_gen8_la_OBJECTS) +libi965_gen8_la_LINK = $(LIBTOOL) $(AM_V_lt) --tag=CC \ + $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=link $(CCLD) \ + $(libi965_gen8_la_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) $(LDFLAGS) \ + -o $@ +libi965_gen9_la_LIBADD = +am__objects_8 = libi965_gen9_la-genX_blorp_exec.lo +am_libi965_gen9_la_OBJECTS = $(am__objects_8) +libi965_gen9_la_OBJECTS = $(am_libi965_gen9_la_OBJECTS) +libi965_gen9_la_LINK = $(LIBTOOL) $(AM_V_lt) --tag=CC \ + $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=link $(CCLD) \ + $(libi965_gen9_la_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) $(LDFLAGS) \ + -o $@ am__EXEEXT_1 = test_fs_cmod_propagation$(EXEEXT) \ test_fs_copy_propagation$(EXEEXT) \ test_fs_saturate_propagation$(EXEEXT) test_eu_compact$(EXEEXT) \ @@ -230,7 +270,7 @@ test_vec4_register_coalesce$(EXEEXT) am_test_eu_compact_OBJECTS = test_eu_compact.$(OBJEXT) test_eu_compact_OBJECTS = $(am_test_eu_compact_OBJECTS) -am__DEPENDENCIES_2 = libi965_compiler.la \ +am__DEPENDENCIES_2 = libi965_compiler.la $(I965_PERGEN_LIBS) \ $(top_builddir)/src/compiler/nir/libnir.la \ $(top_builddir)/src/util/libmesautil.la \ $(top_builddir)/src/intel/isl/libisl.la $(am__DEPENDENCIES_1) \ @@ -331,7 +371,9 @@ am__v_CXXLD_0 = @echo " CXXLD " $@; am__v_CXXLD_1 = SOURCES = $(libi965_compiler_la_SOURCES) $(libi965_dri_la_SOURCES) \ - $(test_eu_compact_SOURCES) \ + $(libi965_gen6_la_SOURCES) $(libi965_gen7_la_SOURCES) \ + $(libi965_gen75_la_SOURCES) $(libi965_gen8_la_SOURCES) \ + $(libi965_gen9_la_SOURCES) $(test_eu_compact_SOURCES) \ $(nodist_EXTRA_test_eu_compact_SOURCES) \ $(test_fs_cmod_propagation_SOURCES) \ $(test_fs_copy_propagation_SOURCES) \ @@ -341,8 +383,10 @@ $(test_vec4_register_coalesce_SOURCES) \ $(test_vf_float_conversions_SOURCES) DIST_SOURCES = $(libi965_compiler_la_SOURCES) \ - $(libi965_dri_la_SOURCES) $(test_eu_compact_SOURCES) \ - $(test_fs_cmod_propagation_SOURCES) \ + $(libi965_dri_la_SOURCES) $(libi965_gen6_la_SOURCES) \ + $(libi965_gen7_la_SOURCES) $(libi965_gen75_la_SOURCES) \ + $(libi965_gen8_la_SOURCES) $(libi965_gen9_la_SOURCES) \ + $(test_eu_compact_SOURCES) $(test_fs_cmod_propagation_SOURCES) \ $(test_fs_copy_propagation_SOURCES) \ $(test_fs_saturate_propagation_SOURCES) \ $(test_vec4_cmod_propagation_SOURCES) \ @@ -585,6 +629,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -599,6 +645,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -628,10 +675,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -681,11 +729,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -725,8 +770,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -763,8 +806,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -773,7 +814,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -781,13 +821,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -816,6 +857,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -886,8 +928,6 @@ brw_dead_control_flow.cpp \ brw_dead_control_flow.h \ brw_defines.h \ - brw_device_info.c \ - brw_device_info.h \ brw_disasm.c \ brw_eu.c \ brw_eu_compact.c \ @@ -968,7 +1008,6 @@ intel_asm_annotation.h \ intel_debug.c \ intel_debug.h \ - intel_reg.h \ intel_resolve_map.c \ intel_resolve_map.h @@ -977,8 +1016,6 @@ i965_FILES = \ brw_binding_tables.c \ - brw_blorp_blit.cpp \ - brw_blorp_clear.cpp \ brw_blorp.c \ brw_blorp.h \ brw_cc.c \ @@ -1013,17 +1050,16 @@ brw_gs_state.c \ brw_gs_surface_state.c \ brw_link.cpp \ - brw_lower_texture_gradients.cpp \ brw_meta_util.c \ brw_meta_util.h \ brw_misc_state.c \ brw_multisample_state.h \ brw_nir_uniforms.cpp \ brw_object_purgeable.c \ - brw_performance_monitor.c \ brw_pipe_control.c \ brw_program.c \ brw_program.h \ + brw_program_cache.c \ brw_primitive_restart.c \ brw_queryobj.c \ brw_reset.c \ @@ -1033,17 +1069,16 @@ brw_sf.h \ brw_sf_state.c \ brw_state_batch.c \ - brw_state_cache.c \ brw_state_dump.c \ brw_state.h \ brw_state_upload.c \ brw_structs.h \ brw_surface_formats.c \ + brw_sync.c \ brw_tcs.c \ brw_tcs_surface_state.c \ brw_tes.c \ brw_tes_surface_state.c \ - brw_tex.c \ brw_tex_layout.c \ brw_urb.c \ brw_vs.c \ @@ -1054,7 +1089,6 @@ brw_wm.h \ brw_wm_state.c \ brw_wm_surface_state.c \ - gen6_blorp.c \ gen6_cc.c \ gen6_clip_state.c \ gen6_constant_state.c \ @@ -1067,12 +1101,10 @@ gen6_scissor_state.c \ gen6_sf_state.c \ gen6_sol.c \ - gen6_surface_state.c \ gen6_urb.c \ gen6_viewport_state.c \ gen6_vs_state.c \ gen6_wm_state.c \ - gen7_blorp.c \ gen7_cs_state.c \ gen7_ds_state.c \ gen7_gs_state.c \ @@ -1088,9 +1120,7 @@ gen7_wm_state.c \ gen7_wm_surface_state.c \ gen8_blend_state.c \ - gen8_blorp.c \ gen8_depth_state.c \ - gen8_disable.c \ gen8_draw_upload.c \ gen8_ds_state.c \ gen8_gs_state.c \ @@ -1129,7 +1159,6 @@ intel_screen.c \ intel_screen.h \ intel_state.c \ - intel_syncobj.c \ intel_tex.c \ intel_tex_copy.c \ intel_tex.h \ @@ -1141,6 +1170,21 @@ intel_tiled_memcpy.h \ intel_upload.c +i965_gen6_FILES = \ + genX_blorp_exec.c + +i965_gen7_FILES = \ + genX_blorp_exec.c + +i965_gen75_FILES = \ + genX_blorp_exec.c + +i965_gen8_FILES = \ + genX_blorp_exec.c + +i965_gen9_FILES = \ + genX_blorp_exec.c + AM_CFLAGS = \ -I$(top_srcdir)/include \ -I$(top_srcdir)/src/ \ @@ -1148,23 +1192,50 @@ -I$(top_srcdir)/src/mesa/ \ -I$(top_srcdir)/src/gallium/include \ -I$(top_srcdir)/src/gallium/auxiliary \ + -I$(top_builddir)/src/mesa/drivers/dri/common \ -I$(top_srcdir)/src/mesa/drivers/dri/common \ -I$(top_srcdir)/src/mesa/drivers/dri/intel/server \ -I$(top_srcdir)/src/gtest/include \ + -I$(top_builddir)/src/compiler/glsl \ + -I$(top_builddir)/src/compiler/nir \ -I$(top_srcdir)/src/compiler/nir \ + -I$(top_builddir)/src/intel \ -I$(top_srcdir)/src/intel \ - -I$(top_builddir)/src/compiler/nir \ - -I$(top_builddir)/src/mesa/drivers/dri/common \ $(DEFINES) \ $(VISIBILITY_CFLAGS) \ $(INTEL_CFLAGS) AM_CXXFLAGS = $(AM_CFLAGS) -noinst_LTLIBRARIES = libi965_dri.la libi965_compiler.la +MKDIR_GEN = $(AM_V_at)$(MKDIR_P) $(@D) +I965_PERGEN_LIBS = \ + libi965_gen6.la \ + libi965_gen7.la \ + libi965_gen75.la \ + libi965_gen8.la \ + libi965_gen9.la + +libi965_gen6_la_SOURCES = $(i965_gen6_FILES) +libi965_gen6_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=60 +libi965_gen7_la_SOURCES = $(i965_gen7_FILES) +libi965_gen7_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=70 +libi965_gen75_la_SOURCES = $(i965_gen75_FILES) +libi965_gen75_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=75 +libi965_gen8_la_SOURCES = $(i965_gen8_FILES) +libi965_gen8_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=80 +libi965_gen9_la_SOURCES = $(i965_gen9_FILES) +libi965_gen9_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=90 +noinst_LTLIBRARIES = \ + libi965_dri.la \ + libi965_compiler.la \ + $(I965_PERGEN_LIBS) + libi965_dri_la_SOURCES = $(i965_FILES) libi965_dri_la_LIBADD = \ + $(top_builddir)/src/intel/common/libintel_common.la \ $(top_builddir)/src/intel/isl/libisl.la \ libi965_compiler.la \ + $(top_builddir)/src/intel/blorp/libblorp.la \ + $(I965_PERGEN_LIBS) \ $(INTEL_LIBS) libi965_compiler_la_SOURCES = \ @@ -1178,6 +1249,7 @@ TEST_LIBS = \ libi965_compiler.la \ + $(I965_PERGEN_LIBS) \ $(top_builddir)/src/compiler/nir/libnir.la \ $(top_builddir)/src/util/libmesautil.la \ $(top_builddir)/src/intel/isl/libisl.la \ @@ -1291,6 +1363,21 @@ libi965_dri.la: $(libi965_dri_la_OBJECTS) $(libi965_dri_la_DEPENDENCIES) $(EXTRA_libi965_dri_la_DEPENDENCIES) $(AM_V_CXXLD)$(CXXLINK) $(libi965_dri_la_OBJECTS) $(libi965_dri_la_LIBADD) $(LIBS) +libi965_gen6.la: $(libi965_gen6_la_OBJECTS) $(libi965_gen6_la_DEPENDENCIES) $(EXTRA_libi965_gen6_la_DEPENDENCIES) + $(AM_V_CCLD)$(libi965_gen6_la_LINK) $(libi965_gen6_la_OBJECTS) $(libi965_gen6_la_LIBADD) $(LIBS) + +libi965_gen7.la: $(libi965_gen7_la_OBJECTS) $(libi965_gen7_la_DEPENDENCIES) $(EXTRA_libi965_gen7_la_DEPENDENCIES) + $(AM_V_CCLD)$(libi965_gen7_la_LINK) $(libi965_gen7_la_OBJECTS) $(libi965_gen7_la_LIBADD) $(LIBS) + +libi965_gen75.la: $(libi965_gen75_la_OBJECTS) $(libi965_gen75_la_DEPENDENCIES) $(EXTRA_libi965_gen75_la_DEPENDENCIES) + $(AM_V_CCLD)$(libi965_gen75_la_LINK) $(libi965_gen75_la_OBJECTS) $(libi965_gen75_la_LIBADD) $(LIBS) + +libi965_gen8.la: $(libi965_gen8_la_OBJECTS) $(libi965_gen8_la_DEPENDENCIES) $(EXTRA_libi965_gen8_la_DEPENDENCIES) + $(AM_V_CCLD)$(libi965_gen8_la_LINK) $(libi965_gen8_la_OBJECTS) $(libi965_gen8_la_LIBADD) $(LIBS) + +libi965_gen9.la: $(libi965_gen9_la_OBJECTS) $(libi965_gen9_la_DEPENDENCIES) $(EXTRA_libi965_gen9_la_DEPENDENCIES) + $(AM_V_CCLD)$(libi965_gen9_la_LINK) $(libi965_gen9_la_OBJECTS) $(libi965_gen9_la_LIBADD) $(LIBS) + clean-checkPROGRAMS: @list='$(check_PROGRAMS)'; test -n "$$list" || exit 0; \ echo " rm -f" $$list; \ @@ -1340,8 +1427,6 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_binding_tables.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_blorp.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_blorp_blit.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_blorp_clear.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_cc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_cfg.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_clear.Plo@am__quote@ @@ -1360,7 +1445,6 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_cubemap_normalize.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_curbe.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_dead_control_flow.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_device_info.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_disasm.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_draw.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_draw_upload.Plo@am__quote@ @@ -1397,7 +1481,6 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_gs_surface_state.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_interpolation_map.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_link.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_lower_texture_gradients.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_meta_util.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_misc_state.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_nir.Plo@am__quote@ @@ -1410,11 +1493,11 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_nir_uniforms.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_object_purgeable.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_packed_float.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_performance_monitor.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_pipe_control.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_predicated_break.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_primitive_restart.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_program.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_program_cache.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_queryobj.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_reset.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_sampler_state.Plo@am__quote@ @@ -1424,15 +1507,14 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_sf_state.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_shader.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_state_batch.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_state_cache.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_state_dump.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_state_upload.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_surface_formats.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_sync.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_tcs.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_tcs_surface_state.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_tes.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_tes_surface_state.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_tex.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_tex_layout.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_urb.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_util.Plo@am__quote@ @@ -1461,7 +1543,6 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_wm_state.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/brw_wm_surface_state.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/dummy.Po@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen6_blorp.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen6_cc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen6_clip_state.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen6_constant_state.Plo@am__quote@ @@ -1475,12 +1556,10 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen6_scissor_state.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen6_sf_state.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen6_sol.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen6_surface_state.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen6_urb.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen6_viewport_state.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen6_vs_state.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen6_wm_state.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen7_blorp.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen7_cs_state.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen7_ds_state.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen7_gs_state.Plo@am__quote@ @@ -1496,9 +1575,7 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen7_wm_state.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen7_wm_surface_state.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen8_blend_state.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen8_blorp.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen8_depth_state.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen8_disable.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen8_draw_upload.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen8_ds_state.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen8_gs_state.Plo@am__quote@ @@ -1531,7 +1608,6 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/intel_resolve_map.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/intel_screen.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/intel_state.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/intel_syncobj.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/intel_tex.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/intel_tex_copy.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/intel_tex_image.Plo@am__quote@ @@ -1539,6 +1615,11 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/intel_tex_validate.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/intel_tiled_memcpy.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/intel_upload.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libi965_gen6_la-genX_blorp_exec.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libi965_gen75_la-genX_blorp_exec.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libi965_gen7_la-genX_blorp_exec.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libi965_gen8_la-genX_blorp_exec.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libi965_gen9_la-genX_blorp_exec.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/test_eu_compact.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/test_fs_cmod_propagation.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/test_fs_copy_propagation.Po@am__quote@ @@ -1572,6 +1653,41 @@ @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(LTCOMPILE) -c -o $@ $< +libi965_gen6_la-genX_blorp_exec.lo: genX_blorp_exec.c +@am__fastdepCC_TRUE@ $(AM_V_CC)$(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libi965_gen6_la_CFLAGS) $(CFLAGS) -MT libi965_gen6_la-genX_blorp_exec.lo -MD -MP -MF $(DEPDIR)/libi965_gen6_la-genX_blorp_exec.Tpo -c -o libi965_gen6_la-genX_blorp_exec.lo `test -f 'genX_blorp_exec.c' || echo '$(srcdir)/'`genX_blorp_exec.c +@am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) $(DEPDIR)/libi965_gen6_la-genX_blorp_exec.Tpo $(DEPDIR)/libi965_gen6_la-genX_blorp_exec.Plo +@AMDEP_TRUE@@am__fastdepCC_FALSE@ $(AM_V_CC)source='genX_blorp_exec.c' object='libi965_gen6_la-genX_blorp_exec.lo' libtool=yes @AMDEPBACKSLASH@ +@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libi965_gen6_la_CFLAGS) $(CFLAGS) -c -o libi965_gen6_la-genX_blorp_exec.lo `test -f 'genX_blorp_exec.c' || echo '$(srcdir)/'`genX_blorp_exec.c + +libi965_gen7_la-genX_blorp_exec.lo: genX_blorp_exec.c +@am__fastdepCC_TRUE@ $(AM_V_CC)$(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libi965_gen7_la_CFLAGS) $(CFLAGS) -MT libi965_gen7_la-genX_blorp_exec.lo -MD -MP -MF $(DEPDIR)/libi965_gen7_la-genX_blorp_exec.Tpo -c -o libi965_gen7_la-genX_blorp_exec.lo `test -f 'genX_blorp_exec.c' || echo '$(srcdir)/'`genX_blorp_exec.c +@am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) $(DEPDIR)/libi965_gen7_la-genX_blorp_exec.Tpo $(DEPDIR)/libi965_gen7_la-genX_blorp_exec.Plo +@AMDEP_TRUE@@am__fastdepCC_FALSE@ $(AM_V_CC)source='genX_blorp_exec.c' object='libi965_gen7_la-genX_blorp_exec.lo' libtool=yes @AMDEPBACKSLASH@ +@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libi965_gen7_la_CFLAGS) $(CFLAGS) -c -o libi965_gen7_la-genX_blorp_exec.lo `test -f 'genX_blorp_exec.c' || echo '$(srcdir)/'`genX_blorp_exec.c + +libi965_gen75_la-genX_blorp_exec.lo: genX_blorp_exec.c +@am__fastdepCC_TRUE@ $(AM_V_CC)$(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libi965_gen75_la_CFLAGS) $(CFLAGS) -MT libi965_gen75_la-genX_blorp_exec.lo -MD -MP -MF $(DEPDIR)/libi965_gen75_la-genX_blorp_exec.Tpo -c -o libi965_gen75_la-genX_blorp_exec.lo `test -f 'genX_blorp_exec.c' || echo '$(srcdir)/'`genX_blorp_exec.c +@am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) $(DEPDIR)/libi965_gen75_la-genX_blorp_exec.Tpo $(DEPDIR)/libi965_gen75_la-genX_blorp_exec.Plo +@AMDEP_TRUE@@am__fastdepCC_FALSE@ $(AM_V_CC)source='genX_blorp_exec.c' object='libi965_gen75_la-genX_blorp_exec.lo' libtool=yes @AMDEPBACKSLASH@ +@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libi965_gen75_la_CFLAGS) $(CFLAGS) -c -o libi965_gen75_la-genX_blorp_exec.lo `test -f 'genX_blorp_exec.c' || echo '$(srcdir)/'`genX_blorp_exec.c + +libi965_gen8_la-genX_blorp_exec.lo: genX_blorp_exec.c +@am__fastdepCC_TRUE@ $(AM_V_CC)$(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libi965_gen8_la_CFLAGS) $(CFLAGS) -MT libi965_gen8_la-genX_blorp_exec.lo -MD -MP -MF $(DEPDIR)/libi965_gen8_la-genX_blorp_exec.Tpo -c -o libi965_gen8_la-genX_blorp_exec.lo `test -f 'genX_blorp_exec.c' || echo '$(srcdir)/'`genX_blorp_exec.c +@am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) $(DEPDIR)/libi965_gen8_la-genX_blorp_exec.Tpo $(DEPDIR)/libi965_gen8_la-genX_blorp_exec.Plo +@AMDEP_TRUE@@am__fastdepCC_FALSE@ $(AM_V_CC)source='genX_blorp_exec.c' object='libi965_gen8_la-genX_blorp_exec.lo' libtool=yes @AMDEPBACKSLASH@ +@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libi965_gen8_la_CFLAGS) $(CFLAGS) -c -o libi965_gen8_la-genX_blorp_exec.lo `test -f 'genX_blorp_exec.c' || echo '$(srcdir)/'`genX_blorp_exec.c + +libi965_gen9_la-genX_blorp_exec.lo: genX_blorp_exec.c +@am__fastdepCC_TRUE@ $(AM_V_CC)$(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libi965_gen9_la_CFLAGS) $(CFLAGS) -MT libi965_gen9_la-genX_blorp_exec.lo -MD -MP -MF $(DEPDIR)/libi965_gen9_la-genX_blorp_exec.Tpo -c -o libi965_gen9_la-genX_blorp_exec.lo `test -f 'genX_blorp_exec.c' || echo '$(srcdir)/'`genX_blorp_exec.c +@am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) $(DEPDIR)/libi965_gen9_la-genX_blorp_exec.Tpo $(DEPDIR)/libi965_gen9_la-genX_blorp_exec.Plo +@AMDEP_TRUE@@am__fastdepCC_FALSE@ $(AM_V_CC)source='genX_blorp_exec.c' object='libi965_gen9_la-genX_blorp_exec.lo' libtool=yes @AMDEPBACKSLASH@ +@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(libi965_gen9_la_CFLAGS) $(CFLAGS) -c -o libi965_gen9_la-genX_blorp_exec.lo `test -f 'genX_blorp_exec.c' || echo '$(srcdir)/'`genX_blorp_exec.c + .cpp.o: @am__fastdepCXX_TRUE@ $(AM_V_CXX)depbase=`echo $@ | sed 's|[^/]*$$|$(DEPDIR)/&|;s|\.o$$||'`;\ @am__fastdepCXX_TRUE@ $(CXXCOMPILE) -MT $@ -MD -MP -MF $$depbase.Tpo -c -o $@ $< &&\ @@ -2029,7 +2145,6 @@ .PRECIOUS: Makefile - brw_nir_trig_workarounds.c: brw_nir_trig_workarounds.py $(top_srcdir)/src/compiler/nir/nir_algebraic.py $(MKDIR_GEN) $(AM_V_GEN) PYTHONPATH=$(top_srcdir)/src/compiler/nir $(PYTHON2) $(PYTHON_FLAGS) $(srcdir)/brw_nir_trig_workarounds.py > $@ || ($(RM) $@; false) diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/Makefile.sources mesa-17.0.7/src/mesa/drivers/dri/i965/Makefile.sources --- mesa-12.0.6/src/mesa/drivers/dri/i965/Makefile.sources 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/Makefile.sources 2017-06-01 10:37:10.000000000 +0000 @@ -6,8 +6,6 @@ brw_dead_control_flow.cpp \ brw_dead_control_flow.h \ brw_defines.h \ - brw_device_info.c \ - brw_device_info.h \ brw_disasm.c \ brw_eu.c \ brw_eu_compact.c \ @@ -88,7 +86,6 @@ intel_asm_annotation.h \ intel_debug.c \ intel_debug.h \ - intel_reg.h \ intel_resolve_map.c \ intel_resolve_map.h @@ -97,8 +94,6 @@ i965_FILES = \ brw_binding_tables.c \ - brw_blorp_blit.cpp \ - brw_blorp_clear.cpp \ brw_blorp.c \ brw_blorp.h \ brw_cc.c \ @@ -133,17 +128,16 @@ brw_gs_state.c \ brw_gs_surface_state.c \ brw_link.cpp \ - brw_lower_texture_gradients.cpp \ brw_meta_util.c \ brw_meta_util.h \ brw_misc_state.c \ brw_multisample_state.h \ brw_nir_uniforms.cpp \ brw_object_purgeable.c \ - brw_performance_monitor.c \ brw_pipe_control.c \ brw_program.c \ brw_program.h \ + brw_program_cache.c \ brw_primitive_restart.c \ brw_queryobj.c \ brw_reset.c \ @@ -153,17 +147,16 @@ brw_sf.h \ brw_sf_state.c \ brw_state_batch.c \ - brw_state_cache.c \ brw_state_dump.c \ brw_state.h \ brw_state_upload.c \ brw_structs.h \ brw_surface_formats.c \ + brw_sync.c \ brw_tcs.c \ brw_tcs_surface_state.c \ brw_tes.c \ brw_tes_surface_state.c \ - brw_tex.c \ brw_tex_layout.c \ brw_urb.c \ brw_vs.c \ @@ -174,7 +167,6 @@ brw_wm.h \ brw_wm_state.c \ brw_wm_surface_state.c \ - gen6_blorp.c \ gen6_cc.c \ gen6_clip_state.c \ gen6_constant_state.c \ @@ -187,12 +179,10 @@ gen6_scissor_state.c \ gen6_sf_state.c \ gen6_sol.c \ - gen6_surface_state.c \ gen6_urb.c \ gen6_viewport_state.c \ gen6_vs_state.c \ gen6_wm_state.c \ - gen7_blorp.c \ gen7_cs_state.c \ gen7_ds_state.c \ gen7_gs_state.c \ @@ -208,9 +198,7 @@ gen7_wm_state.c \ gen7_wm_surface_state.c \ gen8_blend_state.c \ - gen8_blorp.c \ gen8_depth_state.c \ - gen8_disable.c \ gen8_draw_upload.c \ gen8_ds_state.c \ gen8_gs_state.c \ @@ -249,7 +237,6 @@ intel_screen.c \ intel_screen.h \ intel_state.c \ - intel_syncobj.c \ intel_tex.c \ intel_tex_copy.c \ intel_tex.h \ @@ -260,3 +247,18 @@ intel_tiled_memcpy.c \ intel_tiled_memcpy.h \ intel_upload.c + +i965_gen6_FILES = \ + genX_blorp_exec.c + +i965_gen7_FILES = \ + genX_blorp_exec.c + +i965_gen75_FILES = \ + genX_blorp_exec.c + +i965_gen8_FILES = \ + genX_blorp_exec.c + +i965_gen9_FILES = \ + genX_blorp_exec.c diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/test_eu_compact.c mesa-17.0.7/src/mesa/drivers/dri/i965/test_eu_compact.c --- mesa-12.0.6/src/mesa/drivers/dri/i965/test_eu_compact.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/test_eu_compact.c 2017-06-01 10:37:10.000000000 +0000 @@ -65,7 +65,7 @@ * become meaningless once fuzzing twiddles a related bit. */ static void -clear_pad_bits(const struct brw_device_info *devinfo, brw_inst *inst) +clear_pad_bits(const struct gen_device_info *devinfo, brw_inst *inst) { if (brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SEND && brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SENDC && @@ -78,7 +78,7 @@ } static bool -skip_bit(const struct brw_device_info *devinfo, brw_inst *src, int bit) +skip_bit(const struct gen_device_info *devinfo, brw_inst *src, int bit) { /* pad bit */ if (bit == 7) @@ -250,7 +250,7 @@ }; static bool -run_tests(const struct brw_device_info *devinfo) +run_tests(const struct gen_device_info *devinfo) { bool fail = false; @@ -288,7 +288,7 @@ int main(int argc, char **argv) { - struct brw_device_info *devinfo = calloc(1, sizeof(*devinfo)); + struct gen_device_info *devinfo = calloc(1, sizeof(*devinfo)); devinfo->gen = 6; bool fail = false; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/test_fs_cmod_propagation.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/test_fs_cmod_propagation.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/test_fs_cmod_propagation.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/test_fs_cmod_propagation.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -33,7 +33,7 @@ public: struct brw_compiler *compiler; - struct brw_device_info *devinfo; + struct gen_device_info *devinfo; struct gl_context *ctx; struct brw_wm_prog_data *prog_data; struct gl_shader_program *shader_prog; @@ -56,11 +56,12 @@ { ctx = (struct gl_context *)calloc(1, sizeof(*ctx)); compiler = (struct brw_compiler *)calloc(1, sizeof(*compiler)); - devinfo = (struct brw_device_info *)calloc(1, sizeof(*devinfo)); + devinfo = (struct gen_device_info *)calloc(1, sizeof(*devinfo)); compiler->devinfo = devinfo; prog_data = ralloc(NULL, struct brw_wm_prog_data); - nir_shader *shader = nir_shader_create(NULL, MESA_SHADER_FRAGMENT, NULL); + nir_shader *shader = + nir_shader_create(NULL, MESA_SHADER_FRAGMENT, NULL, NULL); v = new cmod_propagation_fs_visitor(compiler, prog_data, shader); @@ -281,7 +282,7 @@ fs_reg zero(brw_imm_f(0.0f)); bld.ADD(offset(dest, bld, 2), src0, src1); bld.emit(SHADER_OPCODE_TEX, dest, src2) - ->regs_written = 4; + ->size_written = 4 * REG_SIZE; bld.CMP(bld.null_reg_f(), offset(dest, bld, 2), zero, BRW_CONDITIONAL_GE); /* = Before = diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/test_fs_copy_propagation.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/test_fs_copy_propagation.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/test_fs_copy_propagation.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/test_fs_copy_propagation.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -33,7 +33,7 @@ public: struct brw_compiler *compiler; - struct brw_device_info *devinfo; + struct gen_device_info *devinfo; struct gl_context *ctx; struct brw_wm_prog_data *prog_data; struct gl_shader_program *shader_prog; @@ -56,12 +56,12 @@ { ctx = (struct gl_context *)calloc(1, sizeof(*ctx)); compiler = (struct brw_compiler *)calloc(1, sizeof(*compiler)); - devinfo = (struct brw_device_info *)calloc(1, sizeof(*devinfo)); + devinfo = (struct gen_device_info *)calloc(1, sizeof(*devinfo)); compiler->devinfo = devinfo; prog_data = ralloc(NULL, struct brw_wm_prog_data); nir_shader *shader = - nir_shader_create(NULL, MESA_SHADER_FRAGMENT, NULL); + nir_shader_create(NULL, MESA_SHADER_FRAGMENT, NULL, NULL); v = new copy_propagation_fs_visitor(compiler, prog_data, shader); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/test_fs_saturate_propagation.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/test_fs_saturate_propagation.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/test_fs_saturate_propagation.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/test_fs_saturate_propagation.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -33,7 +33,7 @@ public: struct brw_compiler *compiler; - struct brw_device_info *devinfo; + struct gen_device_info *devinfo; struct gl_context *ctx; struct brw_wm_prog_data *prog_data; struct gl_shader_program *shader_prog; @@ -56,11 +56,12 @@ { ctx = (struct gl_context *)calloc(1, sizeof(*ctx)); compiler = (struct brw_compiler *)calloc(1, sizeof(*compiler)); - devinfo = (struct brw_device_info *)calloc(1, sizeof(*devinfo)); + devinfo = (struct gen_device_info *)calloc(1, sizeof(*devinfo)); compiler->devinfo = devinfo; prog_data = ralloc(NULL, struct brw_wm_prog_data); - nir_shader *shader = nir_shader_create(NULL, MESA_SHADER_FRAGMENT, NULL); + nir_shader *shader = + nir_shader_create(NULL, MESA_SHADER_FRAGMENT, NULL, NULL); v = new saturate_propagation_fs_visitor(compiler, prog_data, shader); @@ -525,7 +526,7 @@ fs_reg src2 = v->vgrf(glsl_type::vec2_type); bld.ADD(offset(dst0, bld, 2), src0, src1); bld.emit(SHADER_OPCODE_TEX, dst0, src2) - ->regs_written = 4; + ->size_written = 4 * REG_SIZE; set_saturate(true, bld.MOV(dst1, offset(dst0, bld, 2))); /* = Before = diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/test_vec4_cmod_propagation.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/test_vec4_cmod_propagation.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/test_vec4_cmod_propagation.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/test_vec4_cmod_propagation.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -36,7 +36,7 @@ public: struct brw_compiler *compiler; - struct brw_device_info *devinfo; + struct gen_device_info *devinfo; struct gl_context *ctx; struct gl_shader_program *shader_prog; struct brw_vue_prog_data *prog_data; @@ -98,11 +98,12 @@ { ctx = (struct gl_context *)calloc(1, sizeof(*ctx)); compiler = (struct brw_compiler *)calloc(1, sizeof(*compiler)); - devinfo = (struct brw_device_info *)calloc(1, sizeof(*devinfo)); + devinfo = (struct gen_device_info *)calloc(1, sizeof(*devinfo)); prog_data = (struct brw_vue_prog_data *)calloc(1, sizeof(*prog_data)); compiler->devinfo = devinfo; - nir_shader *shader = nir_shader_create(NULL, MESA_SHADER_VERTEX, NULL); + nir_shader *shader = + nir_shader_create(NULL, MESA_SHADER_VERTEX, NULL, NULL); v = new cmod_propagation_vec4_visitor(compiler, shader, prog_data); @@ -368,10 +369,10 @@ src_reg src1 = src_reg(v, glsl_type::float_type); src_reg src2 = src_reg(v, glsl_type::vec2_type); src_reg zero(brw_imm_f(0.0f)); - bld.ADD(offset(dest, 2), src0, src1); + bld.ADD(offset(dest, 8, 2), src0, src1); bld.emit(SHADER_OPCODE_TEX, dest, src2) - ->regs_written = 4; - bld.CMP(bld.null_reg_f(), offset(src_reg(dest), 2), zero, BRW_CONDITIONAL_GE); + ->size_written = 4 * REG_SIZE; + bld.CMP(bld.null_reg_f(), offset(src_reg(dest), 8, 2), zero, BRW_CONDITIONAL_GE); /* = Before = * diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/test_vec4_copy_propagation.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/test_vec4_copy_propagation.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/test_vec4_copy_propagation.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/test_vec4_copy_propagation.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -35,7 +35,7 @@ public: struct brw_compiler *compiler; - struct brw_device_info *devinfo; + struct gen_device_info *devinfo; struct gl_context *ctx; struct gl_shader_program *shader_prog; struct brw_vue_prog_data *prog_data; @@ -91,11 +91,12 @@ { ctx = (struct gl_context *)calloc(1, sizeof(*ctx)); compiler = (struct brw_compiler *)calloc(1, sizeof(*compiler)); - devinfo = (struct brw_device_info *)calloc(1, sizeof(*devinfo)); + devinfo = (struct gen_device_info *)calloc(1, sizeof(*devinfo)); prog_data = (struct brw_vue_prog_data *)calloc(1, sizeof(*prog_data)); compiler->devinfo = devinfo; - nir_shader *shader = nir_shader_create(NULL, MESA_SHADER_VERTEX, NULL); + nir_shader *shader = + nir_shader_create(NULL, MESA_SHADER_VERTEX, NULL, NULL); v = new copy_propagation_vec4_visitor(compiler, shader, prog_data); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp mesa-17.0.7/src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp --- mesa-12.0.6/src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -37,7 +37,7 @@ public: struct brw_compiler *compiler; - struct brw_device_info *devinfo; + struct gen_device_info *devinfo; struct gl_context *ctx; struct gl_shader_program *shader_prog; struct brw_vue_prog_data *prog_data; @@ -94,11 +94,12 @@ { ctx = (struct gl_context *)calloc(1, sizeof(*ctx)); compiler = (struct brw_compiler *)calloc(1, sizeof(*compiler)); - devinfo = (struct brw_device_info *)calloc(1, sizeof(*devinfo)); + devinfo = (struct gen_device_info *)calloc(1, sizeof(*devinfo)); prog_data = (struct brw_vue_prog_data *)calloc(1, sizeof(*prog_data)); compiler->devinfo = devinfo; - nir_shader *shader = nir_shader_create(NULL, MESA_SHADER_VERTEX, NULL); + nir_shader *shader = + nir_shader_create(NULL, MESA_SHADER_VERTEX, NULL, NULL); v = new register_coalesce_vec4_visitor(compiler, shader, prog_data); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/Makefile.am mesa-17.0.7/src/mesa/drivers/dri/Makefile.am --- mesa-12.0.6/src/mesa/drivers/dri/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -6,12 +6,9 @@ SUBDIRS+=common -# On Android, we need to explicitly link to libglapi.so. -if HAVE_ANDROID if HAVE_SHARED_GLAPI SHARED_GLAPI_LIB = $(top_builddir)/src/mapi/shared-glapi/libglapi.la endif -endif if HAVE_I915_DRI SUBDIRS += i915 @@ -59,10 +56,15 @@ nodist_EXTRA_mesa_dri_drivers_la_SOURCES = dummy.cpp mesa_dri_drivers_la_SOURCES = mesa_dri_drivers_la_LDFLAGS = \ - -module -avoid-version -shared -shrext .so \ - $(BSYMBOLIC) \ - $(GC_SECTIONS) \ - $() + -shared \ + -shrext .so \ + -module \ + -no-undefined \ + -avoid-version \ + $(BSYMBOLIC) \ + $(GC_SECTIONS) \ + $(LD_NO_UNDEFINED) + mesa_dri_drivers_la_LIBADD = \ ../../libmesa.la \ common/libmegadriver_stub.la \ diff -Nru mesa-12.0.6/src/mesa/drivers/dri/Makefile.in mesa-17.0.7/src/mesa/drivers/dri/Makefile.in --- mesa-12.0.6/src/mesa/drivers/dri/Makefile.in 2017-01-24 01:41:55.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/Makefile.in 2017-06-01 10:37:24.000000000 +0000 @@ -287,6 +287,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -301,6 +303,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -330,10 +333,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -383,11 +387,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -427,8 +428,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -465,8 +464,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -475,7 +472,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -483,13 +479,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -518,6 +515,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -587,9 +585,7 @@ $(am__append_12) $(am__append_15) $(am__append_18) MEGADRIVERS_DEPS = $(am__append_2) $(am__append_5) $(am__append_8) \ $(am__append_11) $(am__append_14) $(am__append_17) - -# On Android, we need to explicitly link to libglapi.so. -@HAVE_ANDROID_TRUE@@HAVE_SHARED_GLAPI_TRUE@SHARED_GLAPI_LIB = $(top_builddir)/src/mapi/shared-glapi/libglapi.la +@HAVE_SHARED_GLAPI_TRUE@SHARED_GLAPI_LIB = $(top_builddir)/src/mapi/shared-glapi/libglapi.la pkgconfigdir = $(libdir)/pkgconfig pkgconfig_DATA = dri.pc driincludedir = $(includedir)/GL/internal @@ -599,10 +595,14 @@ nodist_EXTRA_mesa_dri_drivers_la_SOURCES = dummy.cpp mesa_dri_drivers_la_SOURCES = mesa_dri_drivers_la_LDFLAGS = \ - -module -avoid-version -shared -shrext .so \ - $(BSYMBOLIC) \ - $(GC_SECTIONS) \ - $() + -shared \ + -shrext .so \ + -module \ + -no-undefined \ + -avoid-version \ + $(BSYMBOLIC) \ + $(GC_SECTIONS) \ + $(LD_NO_UNDEFINED) mesa_dri_drivers_la_LIBADD = \ ../../libmesa.la \ diff -Nru mesa-12.0.6/src/mesa/drivers/dri/nouveau/Makefile.in mesa-17.0.7/src/mesa/drivers/dri/nouveau/Makefile.in --- mesa-12.0.6/src/mesa/drivers/dri/nouveau/Makefile.in 2017-01-24 01:41:56.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/nouveau/Makefile.in 2017-06-01 10:37:24.000000000 +0000 @@ -218,6 +218,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -232,6 +234,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -261,10 +264,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -314,11 +318,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -358,8 +359,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -396,8 +395,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -406,7 +403,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -414,13 +410,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -449,6 +446,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ diff -Nru mesa-12.0.6/src/mesa/drivers/dri/nouveau/nouveau_context.c mesa-17.0.7/src/mesa/drivers/dri/nouveau/nouveau_context.c --- mesa-12.0.6/src/mesa/drivers/dri/nouveau/nouveau_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/nouveau/nouveau_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -259,9 +259,9 @@ else if (fb->Visual.haveStencilBuffer) attachments[i++] = __DRI_BUFFER_STENCIL; - buffers = (*screen->dri2.loader->getBuffers)(draw, &draw->w, &draw->h, - attachments, i, &count, - draw->loaderPrivate); + buffers = screen->dri2.loader->getBuffers(draw, &draw->w, &draw->h, + attachments, i, &count, + draw->loaderPrivate); if (buffers == NULL) return; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/nouveau/nouveau_screen.c mesa-17.0.7/src/mesa/drivers/dri/nouveau/nouveau_screen.c --- mesa-12.0.6/src/mesa/drivers/dri/nouveau/nouveau_screen.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/nouveau/nouveau_screen.c 2017-06-01 10:37:10.000000000 +0000 @@ -49,7 +49,7 @@ nouveau_destroy_screen(__DRIscreen *dri_screen); static const __DRIconfig ** -nouveau_get_configs(void) +nouveau_get_configs(uint32_t chipset) { __DRIconfig **configs = NULL; int i; @@ -78,7 +78,7 @@ ARRAY_SIZE(back_buffer_modes), msaa_samples, ARRAY_SIZE(msaa_samples), - GL_TRUE); + GL_TRUE, chipset < 0x10); assert(config); configs = driConcatConfigs(configs, config); @@ -130,6 +130,7 @@ dri_screen->max_gl_es1_version = 10; break; case 0x20: + case 0x30: screen->driver = &nv20_driver; dri_screen->max_gl_compat_version = 13; dri_screen->max_gl_es1_version = 10; @@ -143,7 +144,7 @@ dri_screen->extensions = nouveau_screen_extensions; screen->dri_screen = dri_screen; - configs = nouveau_get_configs(); + configs = nouveau_get_configs(screen->device->chipset); if (!configs) goto fail; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/nouveau/nouveau_state.c mesa-17.0.7/src/mesa/drivers/dri/nouveau/nouveau_state.c --- mesa-12.0.6/src/mesa/drivers/dri/nouveau/nouveau_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/nouveau/nouveau_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -31,6 +31,7 @@ #include "swrast/swrast.h" #include "tnl/tnl.h" +#include "util/bitscan.h" static void nouveau_alpha_func(struct gl_context *ctx, GLenum func, GLfloat ref) @@ -122,7 +123,7 @@ static void nouveau_enable(struct gl_context *ctx, GLenum cap, GLboolean state) { - int i; + GLbitfield mask; switch (cap) { case GL_ALPHA_TEST: @@ -187,9 +188,10 @@ context_dirty(ctx, LIGHT_MODEL); context_dirty(ctx, LIGHT_ENABLE); - for (i = 0; i < MAX_LIGHTS; i++) { - if (ctx->Light.Light[i].Enabled) - context_dirty_i(ctx, LIGHT_SOURCE, i); + mask = ctx->Light._EnabledLights; + while (mask) { + const int i = u_bit_scan(&mask); + context_dirty_i(ctx, LIGHT_SOURCE, i); } context_dirty(ctx, MATERIAL_FRONT_AMBIENT); @@ -393,8 +395,7 @@ static void nouveau_tex_parameter(struct gl_context *ctx, - struct gl_texture_object *t, GLenum pname, - const GLfloat *params) + struct gl_texture_object *t, GLenum pname) { switch (pname) { case GL_TEXTURE_MAG_FILTER: diff -Nru mesa-12.0.6/src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c mesa-17.0.7/src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c --- mesa-12.0.6/src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c 2017-06-01 10:37:10.000000000 +0000 @@ -40,7 +40,7 @@ * structures. */ static int -get_array_stride(struct gl_context *ctx, const struct gl_client_array *a) +get_array_stride(struct gl_context *ctx, const struct gl_vertex_array *a) { struct nouveau_render_state *render = to_render_state(ctx); @@ -53,7 +53,7 @@ static void vbo_init_arrays(struct gl_context *ctx, const struct _mesa_index_buffer *ib, - const struct gl_client_array **arrays) + const struct gl_vertex_array **arrays) { struct nouveau_render_state *render = to_render_state(ctx); GLboolean imm = (render->mode == IMM); @@ -64,7 +64,7 @@ ib->obj, ib->ptr, GL_TRUE, ctx); FOR_EACH_BOUND_ATTR(render, i, attr) { - const struct gl_client_array *array = arrays[attr]; + const struct gl_vertex_array *array = arrays[attr]; nouveau_init_array(&render->attrs[attr], attr, get_array_stride(ctx, array), @@ -76,7 +76,7 @@ static void vbo_deinit_arrays(struct gl_context *ctx, const struct _mesa_index_buffer *ib, - const struct gl_client_array **arrays) + const struct gl_vertex_array **arrays) { struct nouveau_render_state *render = to_render_state(ctx); int i, attr; @@ -100,7 +100,7 @@ /* Make some rendering decisions from the GL context. */ static void -vbo_choose_render_mode(struct gl_context *ctx, const struct gl_client_array **arrays) +vbo_choose_render_mode(struct gl_context *ctx, const struct gl_vertex_array **arrays) { struct nouveau_render_state *render = to_render_state(ctx); int i; @@ -118,12 +118,12 @@ } static void -vbo_emit_attr(struct gl_context *ctx, const struct gl_client_array **arrays, +vbo_emit_attr(struct gl_context *ctx, const struct gl_vertex_array **arrays, int attr) { struct nouveau_pushbuf *push = context_push(ctx); struct nouveau_render_state *render = to_render_state(ctx); - const struct gl_client_array *array = arrays[attr]; + const struct gl_vertex_array *array = arrays[attr]; struct nouveau_array *a = &render->attrs[attr]; RENDER_LOCALS(ctx); @@ -158,7 +158,7 @@ #define MAT(a) (VERT_ATTRIB_GENERIC0 + MAT_ATTRIB_##a) static void -vbo_choose_attrs(struct gl_context *ctx, const struct gl_client_array **arrays) +vbo_choose_attrs(struct gl_context *ctx, const struct gl_vertex_array **arrays) { struct nouveau_render_state *render = to_render_state(ctx); int i; @@ -201,13 +201,13 @@ } static int -get_max_client_stride(struct gl_context *ctx, const struct gl_client_array **arrays) +get_max_client_stride(struct gl_context *ctx, const struct gl_vertex_array **arrays) { struct nouveau_render_state *render = to_render_state(ctx); int i, attr, s = 0; FOR_EACH_BOUND_ATTR(render, i, attr) { - const struct gl_client_array *a = arrays[attr]; + const struct gl_vertex_array *a = arrays[attr]; if (!_mesa_is_bufferobj(a->BufferObj)) s = MAX2(s, get_array_stride(ctx, a)); @@ -227,7 +227,7 @@ struct gl_buffer_object *indirect); static GLboolean -vbo_maybe_split(struct gl_context *ctx, const struct gl_client_array **arrays, +vbo_maybe_split(struct gl_context *ctx, const struct gl_vertex_array **arrays, const struct _mesa_prim *prims, GLuint nr_prims, const struct _mesa_index_buffer *ib, GLuint min_index, GLuint max_index) @@ -287,7 +287,7 @@ } static void -vbo_bind_vertices(struct gl_context *ctx, const struct gl_client_array **arrays, +vbo_bind_vertices(struct gl_context *ctx, const struct gl_vertex_array **arrays, int base, unsigned min_index, unsigned max_index, int *pdelta) { struct nouveau_render_state *render = to_render_state(ctx); @@ -301,7 +301,7 @@ *pdelta = -1; FOR_EACH_BOUND_ATTR(render, i, attr) { - const struct gl_client_array *array = arrays[attr]; + const struct gl_vertex_array *array = arrays[attr]; struct gl_buffer_object *obj = array->BufferObj; struct nouveau_array *a = &render->attrs[attr]; unsigned delta = (base + min_index) * array->StrideB; @@ -355,7 +355,7 @@ } static void -vbo_draw_vbo(struct gl_context *ctx, const struct gl_client_array **arrays, +vbo_draw_vbo(struct gl_context *ctx, const struct gl_vertex_array **arrays, const struct _mesa_prim *prims, GLuint nr_prims, const struct _mesa_index_buffer *ib, GLuint min_index, GLuint max_index) @@ -405,7 +405,7 @@ } static void -vbo_draw_imm(struct gl_context *ctx, const struct gl_client_array **arrays, +vbo_draw_imm(struct gl_context *ctx, const struct gl_vertex_array **arrays, const struct _mesa_prim *prims, GLuint nr_prims, const struct _mesa_index_buffer *ib, GLuint min_index, GLuint max_index) @@ -460,7 +460,7 @@ struct gl_buffer_object *indirect) { struct nouveau_render_state *render = to_render_state(ctx); - const struct gl_client_array **arrays = ctx->Array._DrawArrays; + const struct gl_vertex_array **arrays = ctx->Array._DrawArrays; if (!index_bounds_valid) vbo_get_minmax_indices(ctx, prims, ib, &min_index, &max_index, diff -Nru mesa-12.0.6/src/mesa/drivers/dri/nouveau/nv04_surface.c mesa-17.0.7/src/mesa/drivers/dri/nouveau/nv04_surface.c --- mesa-12.0.6/src/mesa/drivers/dri/nouveau/nv04_surface.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/nouveau/nv04_surface.c 2017-06-01 10:37:10.000000000 +0000 @@ -577,8 +577,10 @@ /* Swizzled surface. */ if (context_chipset(ctx) < 0x20) class = NV04_SURFACE_SWZ_CLASS; - else + else if (context_chipset (ctx) < 0x30) class = NV20_SURFACE_SWZ_CLASS; + else + class = NV30_SURFACE_SWZ_CLASS; ret = nouveau_object_new(chan, handle++, class, NULL, 0, &hw->swzsurf); if (ret) diff -Nru mesa-12.0.6/src/mesa/drivers/dri/nouveau/nv10_context.c mesa-17.0.7/src/mesa/drivers/dri/nouveau/nv10_context.c --- mesa-12.0.6/src/mesa/drivers/dri/nouveau/nv10_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/nouveau/nv10_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -448,6 +448,7 @@ ctx->Extensions.ARB_texture_env_crossbar = true; ctx->Extensions.ARB_texture_env_combine = true; ctx->Extensions.ARB_texture_env_dot3 = true; + ctx->Extensions.EXT_texture_env_dot3 = true; ctx->Extensions.NV_fog_distance = true; ctx->Extensions.NV_texture_rectangle = true; if (ctx->Mesa_DXTn) { diff -Nru mesa-12.0.6/src/mesa/drivers/dri/nouveau/nv10_state_frag.c mesa-17.0.7/src/mesa/drivers/dri/nouveau/nv10_state_frag.c --- mesa-12.0.6/src/mesa/drivers/dri/nouveau/nv10_state_frag.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/nouveau/nv10_state_frag.c 2017-06-01 10:37:10.000000000 +0000 @@ -135,7 +135,7 @@ /* Get the RC input mapping for the specified texture_env_combine * operand, possibly inverted or biased. */ #define INVERT 0x1 -#define HALF_BIAS 0x2 +#define NORMALIZE 0x2 static uint32_t get_input_mapping(struct combiner_state *rc, int operand, int flags) @@ -148,12 +148,12 @@ map |= RC_IN_USAGE(ALPHA); if (is_negative_operand(operand) == !(flags & INVERT)) - map |= flags & HALF_BIAS ? - RC_IN_MAPPING(HALF_BIAS_NEGATE) : + map |= flags & NORMALIZE ? + RC_IN_MAPPING(EXPAND_NEGATE) : RC_IN_MAPPING(UNSIGNED_INVERT); else - map |= flags & HALF_BIAS ? - RC_IN_MAPPING(HALF_BIAS_NORMAL) : + map |= flags & NORMALIZE ? + RC_IN_MAPPING(EXPAND_NORMAL) : RC_IN_MAPPING(UNSIGNED_IDENTITY); return map; @@ -270,12 +270,24 @@ case GL_DOT3_RGB: case GL_DOT3_RGBA: - INPUT_ARG(rc, A, 0, HALF_BIAS); - INPUT_ARG(rc, B, 1, HALF_BIAS); + INPUT_ARG(rc, A, 0, NORMALIZE); + INPUT_ARG(rc, B, 1, NORMALIZE); - rc->out = RC_OUT_DOT_AB | RC_OUT_SCALE_4; + rc->out = RC_OUT_DOT_AB; + break; + + case GL_DOT3_RGB_EXT: + case GL_DOT3_RGBA_EXT: + INPUT_ARG(rc, A, 0, NORMALIZE); + INPUT_ARG(rc, B, 1, NORMALIZE); + + rc->out = RC_OUT_DOT_AB; - assert(!rc->logscale); + /* The EXT version of the DOT3 extension does not support the + * scale factor, but the ARB version (and the version in + * OpenGL 1.3) does. + */ + rc->logscale = 0; break; default: @@ -307,7 +319,7 @@ if (ctx->Texture.Unit[i]._Current) { INIT_COMBINER(RGB, ctx, &rc_c, i); - if (rc_c.mode == GL_DOT3_RGBA) + if (rc_c.mode == GL_DOT3_RGBA || rc_c.mode == GL_DOT3_RGBA_EXT) rc_a = rc_c; else INIT_COMBINER(A, ctx, &rc_a, i); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/nouveau/nv10_state_tnl.c mesa-17.0.7/src/mesa/drivers/dri/nouveau/nv10_state_tnl.c --- mesa-12.0.6/src/mesa/drivers/dri/nouveau/nv10_state_tnl.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/nouveau/nv10_state_tnl.c 2017-06-01 10:37:10.000000000 +0000 @@ -30,8 +30,7 @@ #include "nouveau_util.h" #include "nv10_3d.xml.h" #include "nv10_driver.h" - -#include "util/simple_list.h" +#include "util/bitscan.h" void nv10_emit_clip_plane(struct gl_context *ctx, int emit) @@ -323,7 +322,7 @@ struct nouveau_pushbuf *push = context_push(ctx); float (*mat)[4] = ctx->Light.Material.Attrib; float c_scene[3], c_factor[3]; - struct gl_light *l; + GLbitfield mask; if (USE_COLOR_MATERIAL(AMBIENT)) { COPY_3V(c_scene, ctx->Light.Model.Ambient); @@ -347,8 +346,10 @@ PUSH_DATAp(push, c_factor, 3); } - foreach(l, &ctx->Light.EnabledList) { - const int i = l - ctx->Light.Light; + mask = ctx->Light._EnabledLights; + while (mask) { + const int i = u_bit_scan(&mask); + struct gl_light *l = &ctx->Light.Light[i]; float *c_light = (USE_COLOR_MATERIAL(AMBIENT) ? l->Ambient : l->_MatAmbient[0]); @@ -363,13 +364,15 @@ { struct nouveau_pushbuf *push = context_push(ctx); GLfloat (*mat)[4] = ctx->Light.Material.Attrib; - struct gl_light *l; + GLbitfield mask; BEGIN_NV04(push, NV10_3D(MATERIAL_FACTOR_A), 1); PUSH_DATAf(push, mat[MAT_ATTRIB_FRONT_DIFFUSE][3]); - foreach(l, &ctx->Light.EnabledList) { - const int i = l - ctx->Light.Light; + mask = ctx->Light._EnabledLights; + while (mask) { + const int i = u_bit_scan(&mask); + struct gl_light *l = &ctx->Light.Light[i]; float *c_light = (USE_COLOR_MATERIAL(DIFFUSE) ? l->Diffuse : l->_MatDiffuse[0]); @@ -383,10 +386,12 @@ nv10_emit_material_specular(struct gl_context *ctx, int emit) { struct nouveau_pushbuf *push = context_push(ctx); - struct gl_light *l; + GLbitfield mask; - foreach(l, &ctx->Light.EnabledList) { - const int i = l - ctx->Light.Light; + mask = ctx->Light._EnabledLights; + while (mask) { + const int i = u_bit_scan(&mask); + struct gl_light *l = &ctx->Light.Light[i]; float *c_light = (USE_COLOR_MATERIAL(SPECULAR) ? l->Specular : l->_MatSpecular[0]); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/nouveau/nv20_context.c mesa-17.0.7/src/mesa/drivers/dri/nouveau/nv20_context.c --- mesa-12.0.6/src/mesa/drivers/dri/nouveau/nv20_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/nouveau/nv20_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -459,6 +459,7 @@ ctx->Extensions.ARB_texture_env_crossbar = true; ctx->Extensions.ARB_texture_env_combine = true; ctx->Extensions.ARB_texture_env_dot3 = true; + ctx->Extensions.EXT_texture_env_dot3 = true; ctx->Extensions.NV_fog_distance = true; ctx->Extensions.NV_texture_rectangle = true; if (ctx->Mesa_DXTn) { diff -Nru mesa-12.0.6/src/mesa/drivers/dri/nouveau/nv20_state_tnl.c mesa-17.0.7/src/mesa/drivers/dri/nouveau/nv20_state_tnl.c --- mesa-12.0.6/src/mesa/drivers/dri/nouveau/nv20_state_tnl.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/nouveau/nv20_state_tnl.c 2017-06-01 10:37:10.000000000 +0000 @@ -31,8 +31,7 @@ #include "nv20_3d.xml.h" #include "nv10_driver.h" #include "nv20_driver.h" - -#include "util/simple_list.h" +#include "util/bitscan.h" #define LIGHT_MODEL_AMBIENT_R(side) \ ((side) ? NV20_3D_LIGHT_MODEL_BACK_AMBIENT_R : \ @@ -240,7 +239,7 @@ struct nouveau_pushbuf *push = context_push(ctx); float (*mat)[4] = ctx->Light.Material.Attrib; float c_scene[3], c_factor[3]; - struct gl_light *l; + GLbitfield mask; if (USE_COLOR_MATERIAL(AMBIENT, side)) { COPY_3V(c_scene, mat[MAT_ATTRIB_EMISSION(side)]); @@ -264,8 +263,10 @@ PUSH_DATAp(push, c_factor, 3); } - foreach(l, &ctx->Light.EnabledList) { - const int i = l - ctx->Light.Light; + mask = ctx->Light._EnabledLights; + while (mask) { + const int i = u_bit_scan(&mask); + struct gl_light *l = &ctx->Light.Light[i]; float *c_light = (USE_COLOR_MATERIAL(AMBIENT, side) ? l->Ambient : l->_MatAmbient[side]); @@ -281,13 +282,15 @@ const int side = emit - NOUVEAU_STATE_MATERIAL_FRONT_DIFFUSE; struct nouveau_pushbuf *push = context_push(ctx); GLfloat (*mat)[4] = ctx->Light.Material.Attrib; - struct gl_light *l; + GLbitfield mask; BEGIN_NV04(push, SUBC_3D(MATERIAL_FACTOR_A(side)), 1); PUSH_DATAf(push, mat[MAT_ATTRIB_DIFFUSE(side)][3]); - foreach(l, &ctx->Light.EnabledList) { - const int i = l - ctx->Light.Light; + mask = ctx->Light._EnabledLights; + while (mask) { + const int i = u_bit_scan(&mask); + struct gl_light *l = &ctx->Light.Light[i]; float *c_light = (USE_COLOR_MATERIAL(DIFFUSE, side) ? l->Diffuse : l->_MatDiffuse[side]); @@ -302,10 +305,12 @@ { const int side = emit - NOUVEAU_STATE_MATERIAL_FRONT_SPECULAR; struct nouveau_pushbuf *push = context_push(ctx); - struct gl_light *l; + GLbitfield mask; - foreach(l, &ctx->Light.EnabledList) { - const int i = l - ctx->Light.Light; + mask = ctx->Light._EnabledLights; + while (mask) { + const int i = u_bit_scan(&mask); + struct gl_light *l = &ctx->Light.Light[i]; float *c_light = (USE_COLOR_MATERIAL(SPECULAR, side) ? l->Specular : l->_MatSpecular[side]); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/r200/Makefile.am mesa-17.0.7/src/mesa/drivers/dri/r200/Makefile.am --- mesa-12.0.6/src/mesa/drivers/dri/r200/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/r200/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -34,9 +34,9 @@ -I$(top_srcdir)/src/mesa/ \ -I$(top_srcdir)/src/gallium/include \ -I$(top_srcdir)/src/gallium/auxiliary \ + -I$(top_builddir)/src/mesa/drivers/dri/common \ -I$(top_srcdir)/src/mesa/drivers/dri/common \ -I$(top_srcdir)/src/mesa/drivers/dri/r200/server \ - -I$(top_builddir)/src/mesa/drivers/dri/common \ $(DEFINES) \ $(VISIBILITY_CFLAGS) \ $(RADEON_CFLAGS) diff -Nru mesa-12.0.6/src/mesa/drivers/dri/r200/Makefile.in mesa-17.0.7/src/mesa/drivers/dri/r200/Makefile.in --- mesa-12.0.6/src/mesa/drivers/dri/r200/Makefile.in 2017-01-24 01:41:56.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/r200/Makefile.in 2017-06-01 10:37:24.000000000 +0000 @@ -215,6 +215,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -229,6 +231,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -258,10 +261,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -311,11 +315,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -355,8 +356,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -393,8 +392,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -403,7 +400,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -411,13 +407,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -446,6 +443,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -579,9 +577,9 @@ -I$(top_srcdir)/src/mesa/ \ -I$(top_srcdir)/src/gallium/include \ -I$(top_srcdir)/src/gallium/auxiliary \ + -I$(top_builddir)/src/mesa/drivers/dri/common \ -I$(top_srcdir)/src/mesa/drivers/dri/common \ -I$(top_srcdir)/src/mesa/drivers/dri/r200/server \ - -I$(top_builddir)/src/mesa/drivers/dri/common \ $(DEFINES) \ $(VISIBILITY_CFLAGS) \ $(RADEON_CFLAGS) diff -Nru mesa-12.0.6/src/mesa/drivers/dri/r200/r200_context.c mesa-17.0.7/src/mesa/drivers/dri/r200/r200_context.c --- mesa-12.0.6/src/mesa/drivers/dri/r200/r200_context.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/r200/r200_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -37,7 +37,6 @@ #include "main/api_arrayelt.h" #include "main/api_exec.h" #include "main/context.h" -#include "util/simple_list.h" #include "main/imports.h" #include "main/extensions.h" #include "main/version.h" diff -Nru mesa-12.0.6/src/mesa/drivers/dri/r200/r200_context.h mesa-17.0.7/src/mesa/drivers/dri/r200/r200_context.h --- mesa-12.0.6/src/mesa/drivers/dri/r200/r200_context.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/r200/r200_context.h 2017-06-01 10:37:10.000000000 +0000 @@ -59,7 +59,7 @@ #include "main/mm.h" struct r200_vertex_program { - struct gl_vertex_program mesa_program; /* Must be first */ + struct gl_program mesa_program; /* Must be first */ int translated; /* need excess instr: 1 for late loop checking, 2 for additional instr due to instr/attr, 3 for fog */ diff -Nru mesa-12.0.6/src/mesa/drivers/dri/r200/r200_ioctl.h mesa-17.0.7/src/mesa/drivers/dri/r200/r200_ioctl.h --- mesa-12.0.6/src/mesa/drivers/dri/r200/r200_ioctl.h 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/r200/r200_ioctl.h 2017-06-01 10:37:10.000000000 +0000 @@ -35,8 +35,6 @@ #ifndef __R200_IOCTL_H__ #define __R200_IOCTL_H__ -#include "util/simple_list.h" - #include "radeon_bo_gem.h" #include "radeon_cs_gem.h" diff -Nru mesa-12.0.6/src/mesa/drivers/dri/r200/r200_state.c mesa-17.0.7/src/mesa/drivers/dri/r200/r200_state.c --- mesa-12.0.6/src/mesa/drivers/dri/r200/r200_state.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/r200/r200_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -49,6 +49,7 @@ #include "tnl/t_pipeline.h" #include "swrast_setup/swrast_setup.h" #include "drivers/common/meta.h" +#include "util/bitscan.h" #include "radeon_common.h" #include "radeon_mipmap_tree.h" @@ -60,6 +61,7 @@ #include "r200_swtcl.h" #include "r200_vertprog.h" +#include "util/simple_list.h" /* ============================================================= * Alpha blending @@ -1112,27 +1114,26 @@ if (ctx->Light.Enabled) { - GLint p; - for (p = 0 ; p < MAX_LIGHTS; p++) { - if (ctx->Light.Light[p].Enabled) { - struct gl_light *l = &ctx->Light.Light[p]; - GLfloat *fcmd = (GLfloat *)R200_DB_STATE( lit[p] ); - - if (l->EyePosition[3] == 0.0) { - COPY_3FV( &fcmd[LIT_POSITION_X], l->_VP_inf_norm ); - COPY_3FV( &fcmd[LIT_DIRECTION_X], l->_h_inf_norm ); - fcmd[LIT_POSITION_W] = 0; - fcmd[LIT_DIRECTION_W] = 0; - } else { - COPY_4V( &fcmd[LIT_POSITION_X], l->_Position ); - fcmd[LIT_DIRECTION_X] = -l->_NormSpotDirection[0]; - fcmd[LIT_DIRECTION_Y] = -l->_NormSpotDirection[1]; - fcmd[LIT_DIRECTION_Z] = -l->_NormSpotDirection[2]; - fcmd[LIT_DIRECTION_W] = 0; - } + GLbitfield mask = ctx->Light._EnabledLights; + while (mask) { + const int p = u_bit_scan(&mask); + struct gl_light *l = &ctx->Light.Light[p]; + GLfloat *fcmd = (GLfloat *)R200_DB_STATE( lit[p] ); + + if (l->EyePosition[3] == 0.0) { + COPY_3FV( &fcmd[LIT_POSITION_X], l->_VP_inf_norm ); + COPY_3FV( &fcmd[LIT_DIRECTION_X], l->_h_inf_norm ); + fcmd[LIT_POSITION_W] = 0; + fcmd[LIT_DIRECTION_W] = 0; + } else { + COPY_4V( &fcmd[LIT_POSITION_X], l->_Position ); + fcmd[LIT_DIRECTION_X] = -l->_NormSpotDirection[0]; + fcmd[LIT_DIRECTION_Y] = -l->_NormSpotDirection[1]; + fcmd[LIT_DIRECTION_Z] = -l->_NormSpotDirection[2]; + fcmd[LIT_DIRECTION_W] = 0; + } - R200_DB_STATECHANGE( rmesa, &rmesa->hw.lit[p] ); - } + R200_DB_STATECHANGE( rmesa, &rmesa->hw.lit[p] ); } } } @@ -1360,18 +1361,17 @@ static void r200UpdateClipPlanes( struct gl_context *ctx ) { r200ContextPtr rmesa = R200_CONTEXT(ctx); - GLuint p; + GLbitfield mask = ctx->Transform.ClipPlanesEnabled; - for (p = 0; p < ctx->Const.MaxClipPlanes; p++) { - if (ctx->Transform.ClipPlanesEnabled & (1 << p)) { - GLint *ip = (GLint *)ctx->Transform._ClipUserPlane[p]; - - R200_STATECHANGE( rmesa, ucp[p] ); - rmesa->hw.ucp[p].cmd[UCP_X] = ip[0]; - rmesa->hw.ucp[p].cmd[UCP_Y] = ip[1]; - rmesa->hw.ucp[p].cmd[UCP_Z] = ip[2]; - rmesa->hw.ucp[p].cmd[UCP_W] = ip[3]; - } + while (mask) { + const int p = u_bit_scan(&mask); + GLint *ip = (GLint *)ctx->Transform._ClipUserPlane[p]; + + R200_STATECHANGE( rmesa, ucp[p] ); + rmesa->hw.ucp[p].cmd[UCP_X] = ip[0]; + rmesa->hw.ucp[p].cmd[UCP_Y] = ip[1]; + rmesa->hw.ucp[p].cmd[UCP_Z] = ip[2]; + rmesa->hw.ucp[p].cmd[UCP_W] = ip[3]; } } @@ -1851,11 +1851,8 @@ case GL_POINT_SPRITE_ARB: R200_STATECHANGE( rmesa, spr ); if ( state ) { - int i; - for (i = 0; i < 6; i++) { - rmesa->hw.spr.cmd[SPR_POINT_SPRITE_CNTL] |= - ctx->Point.CoordReplace[i] << (R200_PS_GEN_TEX_0_SHIFT + i); - } + rmesa->hw.spr.cmd[SPR_POINT_SPRITE_CNTL] |= R200_PS_GEN_TEX_MASK & + (ctx->Point.CoordReplace << R200_PS_GEN_TEX_0_SHIFT); } else { rmesa->hw.spr.cmd[SPR_POINT_SPRITE_CNTL] &= ~R200_PS_GEN_TEX_MASK; } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/r200/r200_state_init.c mesa-17.0.7/src/mesa/drivers/dri/r200/r200_state_init.c --- mesa-12.0.6/src/mesa/drivers/dri/r200/r200_state_init.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/r200/r200_state_init.c 2017-06-01 10:37:10.000000000 +0000 @@ -271,8 +271,8 @@ TCL_OR_VP_CHECK( tcl_or_vp_add2, GL_TRUE, 2 ) VP_CHECK( tcl_vp, GL_TRUE, 0 ) VP_CHECK( tcl_vp_add4, GL_TRUE, 4 ) -VP_CHECK( tcl_vp_size_add4, ctx->VertexProgram.Current->Base.NumNativeInstructions > 64, 4 ) -VP_CHECK( tcl_vpp_size_add4, ctx->VertexProgram.Current->Base.NumNativeParameters > 96, 4 ) +VP_CHECK( tcl_vp_size_add4, ctx->VertexProgram.Current->arb.NumNativeInstructions > 64, 4 ) +VP_CHECK( tcl_vpp_size_add4, ctx->VertexProgram.Current->arb.NumNativeParameters > 96, 4 ) #define OUT_VEC(hdr, data) do { \ drm_radeon_cmd_header_t h; \ diff -Nru mesa-12.0.6/src/mesa/drivers/dri/r200/r200_swtcl.c mesa-17.0.7/src/mesa/drivers/dri/r200/r200_swtcl.c --- mesa-12.0.6/src/mesa/drivers/dri/r200/r200_swtcl.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/r200/r200_swtcl.c 2017-06-01 10:37:10.000000000 +0000 @@ -38,7 +38,6 @@ #include "main/image.h" #include "main/imports.h" #include "main/macros.h" -#include "util/simple_list.h" #include "swrast/s_context.h" #include "swrast/s_fog.h" diff -Nru mesa-12.0.6/src/mesa/drivers/dri/r200/r200_tcl.c mesa-17.0.7/src/mesa/drivers/dri/r200/r200_tcl.c --- mesa-12.0.6/src/mesa/drivers/dri/r200/r200_tcl.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/r200/r200_tcl.c 2017-06-01 10:37:10.000000000 +0000 @@ -427,7 +427,7 @@ We only need to change compsel. */ GLuint out_compsel = 0; const GLbitfield64 vp_out = - rmesa->curr_vp_hw->mesa_program.Base.OutputsWritten; + rmesa->curr_vp_hw->mesa_program.info.outputs_written; vimap_rev = &rmesa->curr_vp_hw->inputmap_rev[0]; assert(vp_out & BITFIELD64_BIT(VARYING_SLOT_POS)); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/r200/r200_tex.c mesa-17.0.7/src/mesa/drivers/dri/r200/r200_tex.c --- mesa-12.0.6/src/mesa/drivers/dri/r200/r200_tex.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/r200/r200_tex.c 2017-06-01 10:37:10.000000000 +0000 @@ -36,7 +36,6 @@ #include "main/context.h" #include "main/enums.h" #include "main/image.h" -#include "util/simple_list.h" #include "main/teximage.h" #include "main/texobj.h" #include "main/samplerobj.h" @@ -374,9 +373,9 @@ * Changes variables and flags for a state update, which will happen at the * next UpdateTextureState */ -static void r200TexParameter( struct gl_context *ctx, - struct gl_texture_object *texObj, - GLenum pname, const GLfloat *params ) +static void r200TexParameter(struct gl_context *ctx, + struct gl_texture_object *texObj, + GLenum pname) { radeonTexObj* t = radeon_tex_obj(texObj); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/r200/r200_vertprog.c mesa-17.0.7/src/mesa/drivers/dri/r200/r200_vertprog.c --- mesa-12.0.6/src/mesa/drivers/dri/r200/r200_vertprog.c 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/r200/r200_vertprog.c 2017-06-01 10:37:10.000000000 +0000 @@ -104,15 +104,15 @@ r200ContextPtr rmesa = R200_CONTEXT( ctx ); GLfloat *fcmd = (GLfloat *)&rmesa->hw.vpp[0].cmd[VPP_CMD_0 + 1]; int pi; - struct gl_vertex_program *mesa_vp = &vp->mesa_program; + struct gl_program *mesa_vp = &vp->mesa_program; struct gl_program_parameter_list *paramList; drm_radeon_cmd_header_t tmp; R200_STATECHANGE( rmesa, vpp[0] ); R200_STATECHANGE( rmesa, vpp[1] ); - assert(mesa_vp->Base.Parameters); - _mesa_load_state_parameters(ctx, mesa_vp->Base.Parameters); - paramList = mesa_vp->Base.Parameters; + assert(mesa_vp->Parameters); + _mesa_load_state_parameters(ctx, mesa_vp->Parameters); + paramList = mesa_vp->Parameters; if(paramList->NumParameters > R200_VSF_MAX_PARAM){ fprintf(stderr, "%s:Params exhausted\n", __func__); @@ -392,7 +392,7 @@ */ static GLboolean r200_translate_vertex_program(struct gl_context *ctx, struct r200_vertex_program *vp) { - struct gl_vertex_program *mesa_vp = &vp->mesa_program; + struct gl_program *mesa_vp = &vp->mesa_program; struct prog_instruction *vpi; int i; VERTEX_SHADER_INSTRUCTION *o_inst; @@ -409,30 +409,30 @@ vp->translated = GL_TRUE; vp->fogmode = ctx->Fog.Mode; - if (mesa_vp->Base.NumInstructions == 0) + if (mesa_vp->arb.NumInstructions == 0) return GL_FALSE; #if 0 - if ((mesa_vp->Base.InputsRead & + if ((mesa_vp->info.inputs_read & ~(VERT_BIT_POS | VERT_BIT_NORMAL | VERT_BIT_COLOR0 | VERT_BIT_COLOR1 | VERT_BIT_FOG | VERT_BIT_TEX0 | VERT_BIT_TEX1 | VERT_BIT_TEX2 | VERT_BIT_TEX3 | VERT_BIT_TEX4 | VERT_BIT_TEX5)) != 0) { if (R200_DEBUG & RADEON_FALLBACKS) { fprintf(stderr, "can't handle vert prog inputs 0x%x\n", - mesa_vp->Base.InputsRead); + mesa_vp->info.inputs_read); } return GL_FALSE; } #endif - if ((mesa_vp->Base.OutputsWritten & + if ((mesa_vp->info.outputs_written & ~((1 << VARYING_SLOT_POS) | (1 << VARYING_SLOT_COL0) | (1 << VARYING_SLOT_COL1) | (1 << VARYING_SLOT_FOGC) | (1 << VARYING_SLOT_TEX0) | (1 << VARYING_SLOT_TEX1) | (1 << VARYING_SLOT_TEX2) | (1 << VARYING_SLOT_TEX3) | (1 << VARYING_SLOT_TEX4) | (1 << VARYING_SLOT_TEX5) | (1 << VARYING_SLOT_PSIZ))) != 0) { if (R200_DEBUG & RADEON_FALLBACKS) { fprintf(stderr, "can't handle vert prog outputs 0x%llx\n", - (unsigned long long) mesa_vp->Base.OutputsWritten); + (unsigned long long) mesa_vp->info.outputs_written); } return GL_FALSE; } @@ -445,27 +445,28 @@ struct prog_dst_register dst; /* FIXME: is changing the prog safe to do here? */ - if (mesa_vp->IsPositionInvariant && + if (mesa_vp->arb.IsPositionInvariant && /* make sure we only do this once */ - !(mesa_vp->Base.OutputsWritten & (1 << VARYING_SLOT_POS))) { + !(mesa_vp->info.outputs_written & (1 << VARYING_SLOT_POS))) { _mesa_insert_mvp_code(ctx, mesa_vp); } /* for fogc, can't change mesa_vp, as it would hose swtnl, and exp with base e isn't directly available neither. */ - if ((mesa_vp->Base.OutputsWritten & (1 << VARYING_SLOT_FOGC)) && !vp->fogpidx) { + if ((mesa_vp->info.outputs_written & (1 << VARYING_SLOT_FOGC)) && + !vp->fogpidx) { struct gl_program_parameter_list *paramList; gl_state_index tokens[STATE_LENGTH] = { STATE_FOG_PARAMS, 0, 0, 0, 0 }; - paramList = mesa_vp->Base.Parameters; + paramList = mesa_vp->Parameters; vp->fogpidx = _mesa_add_state_reference(paramList, tokens); } vp->pos_end = 0; - mesa_vp->Base.NumNativeInstructions = 0; - if (mesa_vp->Base.Parameters) - mesa_vp->Base.NumNativeParameters = mesa_vp->Base.Parameters->NumParameters; + mesa_vp->arb.NumNativeInstructions = 0; + if (mesa_vp->Parameters) + mesa_vp->arb.NumNativeParameters = mesa_vp->Parameters->NumParameters; else - mesa_vp->Base.NumNativeParameters = 0; + mesa_vp->arb.NumNativeParameters = 0; for(i = 0; i < VERT_ATTRIB_MAX; i++) vp->inputs[i] = -1; @@ -491,42 +492,42 @@ Haven't seen attr 14 used, maybe that's for the hw pointsize vec1 (which is not possibe to use with vertex progs as it is lacking in vert prog specification) */ /* may look different when using idx buf / input_route instead of se_vtx_fmt? */ - if (mesa_vp->Base.InputsRead & VERT_BIT_POS) { + if (mesa_vp->info.inputs_read & VERT_BIT_POS) { vp->inputs[VERT_ATTRIB_POS] = 0; vp->inputmap_rev[0] = VERT_ATTRIB_POS; free_inputs &= ~(1 << 0); array_count++; } - if (mesa_vp->Base.InputsRead & VERT_BIT_WEIGHT) { + if (mesa_vp->info.inputs_read & VERT_BIT_WEIGHT) { vp->inputs[VERT_ATTRIB_WEIGHT] = 12; vp->inputmap_rev[1] = VERT_ATTRIB_WEIGHT; array_count++; } - if (mesa_vp->Base.InputsRead & VERT_BIT_NORMAL) { + if (mesa_vp->info.inputs_read & VERT_BIT_NORMAL) { vp->inputs[VERT_ATTRIB_NORMAL] = 1; vp->inputmap_rev[2] = VERT_ATTRIB_NORMAL; array_count++; } - if (mesa_vp->Base.InputsRead & VERT_BIT_COLOR0) { + if (mesa_vp->info.inputs_read & VERT_BIT_COLOR0) { vp->inputs[VERT_ATTRIB_COLOR0] = 2; vp->inputmap_rev[4] = VERT_ATTRIB_COLOR0; free_inputs &= ~(1 << 2); array_count++; } - if (mesa_vp->Base.InputsRead & VERT_BIT_COLOR1) { + if (mesa_vp->info.inputs_read & VERT_BIT_COLOR1) { vp->inputs[VERT_ATTRIB_COLOR1] = 3; vp->inputmap_rev[5] = VERT_ATTRIB_COLOR1; free_inputs &= ~(1 << 3); array_count++; } - if (mesa_vp->Base.InputsRead & VERT_BIT_FOG) { + if (mesa_vp->info.inputs_read & VERT_BIT_FOG) { vp->inputs[VERT_ATTRIB_FOG] = 15; array_count++; vp->inputmap_rev[3] = VERT_ATTRIB_FOG; array_count++; } /* VERT_ATTRIB_TEX0-5 */ for (i = 0; i <= 5; i++) { - if (mesa_vp->Base.InputsRead & VERT_BIT_TEX(i)) { + if (mesa_vp->info.inputs_read & VERT_BIT_TEX(i)) { vp->inputs[VERT_ATTRIB_TEX(i)] = i + 6; vp->inputmap_rev[8 + i] = VERT_ATTRIB_TEX(i); free_inputs &= ~(1 << (i + 6)); @@ -535,7 +536,7 @@ } /* using VERT_ATTRIB_TEX6/7 would be illegal */ for (; i < VERT_ATTRIB_TEX_MAX; i++) { - if (mesa_vp->Base.InputsRead & VERT_BIT_TEX(i)) { + if (mesa_vp->info.inputs_read & VERT_BIT_TEX(i)) { if (R200_DEBUG & RADEON_FALLBACKS) { fprintf(stderr, "texture attribute %d in vert prog\n", i); } @@ -546,7 +547,7 @@ for (i = 0; i < VERT_ATTRIB_GENERIC_MAX; i++) { int j; /* completely ignore aliasing? */ - if (mesa_vp->Base.InputsRead & VERT_BIT_GENERIC(i)) { + if (mesa_vp->info.inputs_read & VERT_BIT_GENERIC(i)) { array_count++; if (array_count > 12) { if (R200_DEBUG & RADEON_FALLBACKS) { @@ -575,7 +576,7 @@ } } - if (!(mesa_vp->Base.OutputsWritten & (1 << VARYING_SLOT_POS))) { + if (!(mesa_vp->info.outputs_written & (1 << VARYING_SLOT_POS))) { if (R200_DEBUG & RADEON_FALLBACKS) { fprintf(stderr, "can't handle vert prog without position output\n"); } @@ -589,7 +590,7 @@ } o_inst = vp->instr; - for (vpi = mesa_vp->Base.Instructions; vpi->Opcode != OPCODE_END; vpi++, o_inst++){ + for (vpi = mesa_vp->arb.Instructions; vpi->Opcode != OPCODE_END; vpi++, o_inst++){ operands = op_operands(vpi->Opcode); are_srcs_scalar = operands & SCALAR_FLAG; operands &= OP_MASK; @@ -1069,20 +1070,20 @@ } u_temp_used = (R200_VSF_MAX_TEMPS - 1) - u_temp_i; - if (mesa_vp->Base.NumNativeTemporaries < - (mesa_vp->Base.NumTemporaries + u_temp_used)) { - mesa_vp->Base.NumNativeTemporaries = - mesa_vp->Base.NumTemporaries + u_temp_used; + if (mesa_vp->arb.NumNativeTemporaries < + (mesa_vp->arb.NumTemporaries + u_temp_used)) { + mesa_vp->arb.NumNativeTemporaries = + mesa_vp->arb.NumTemporaries + u_temp_used; } - if ((mesa_vp->Base.NumTemporaries + u_temp_used) > R200_VSF_MAX_TEMPS) { + if ((mesa_vp->arb.NumTemporaries + u_temp_used) > R200_VSF_MAX_TEMPS) { if (R200_DEBUG & RADEON_FALLBACKS) { - fprintf(stderr, "Ran out of temps, num temps %d, us %d\n", mesa_vp->Base.NumTemporaries, u_temp_used); + fprintf(stderr, "Ran out of temps, num temps %d, us %d\n", mesa_vp->arb.NumTemporaries, u_temp_used); } return GL_FALSE; } u_temp_i = R200_VSF_MAX_TEMPS - 1; if(o_inst - vp->instr >= R200_VSF_MAX_INST) { - mesa_vp->Base.NumNativeInstructions = 129; + mesa_vp->arb.NumNativeInstructions = 129; if (R200_DEBUG & RADEON_FALLBACKS) { fprintf(stderr, "more than 128 native instructions\n"); } @@ -1094,7 +1095,7 @@ } vp->native = GL_TRUE; - mesa_vp->Base.NumNativeInstructions = (o_inst - vp->instr); + mesa_vp->arb.NumNativeInstructions = (o_inst - vp->instr); #if 0 fprintf(stderr, "hw program:\n"); for(i=0; i < vp->program.length; i++) @@ -1126,15 +1127,15 @@ R200_STATECHANGE( rmesa, pvs ); rmesa->hw.pvs.cmd[PVS_CNTL_1] = (0 << R200_PVS_CNTL_1_PROGRAM_START_SHIFT) | - ((vp->mesa_program.Base.NumNativeInstructions - 1) << R200_PVS_CNTL_1_PROGRAM_END_SHIFT) | + ((vp->mesa_program.arb.NumNativeInstructions - 1) << R200_PVS_CNTL_1_PROGRAM_END_SHIFT) | (vp->pos_end << R200_PVS_CNTL_1_POS_END_SHIFT); rmesa->hw.pvs.cmd[PVS_CNTL_2] = (0 << R200_PVS_CNTL_2_PARAM_OFFSET_SHIFT) | - (vp->mesa_program.Base.NumNativeParameters << R200_PVS_CNTL_2_PARAM_COUNT_SHIFT); + (vp->mesa_program.arb.NumNativeParameters << R200_PVS_CNTL_2_PARAM_COUNT_SHIFT); /* maybe user clip planes just work with vertex progs... untested */ if (ctx->Transform.ClipPlanesEnabled) { R200_STATECHANGE( rmesa, tcl ); - if (vp->mesa_program.IsPositionInvariant) { + if (vp->mesa_program.arb.IsPositionInvariant) { rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] |= (ctx->Transform.ClipPlanesEnabled << 2); } else { @@ -1143,7 +1144,7 @@ } if (vp != rmesa->curr_vp_hw) { - GLuint count = vp->mesa_program.Base.NumNativeInstructions; + GLuint count = vp->mesa_program.arb.NumNativeInstructions; drm_radeon_cmd_header_t tmp; R200_STATECHANGE( rmesa, vpi[0] ); @@ -1198,16 +1199,18 @@ } static struct gl_program * -r200NewProgram(struct gl_context *ctx, GLenum target, GLuint id) +r200NewProgram(struct gl_context *ctx, GLenum target, GLuint id, + bool is_arb_asm) { switch(target){ case GL_VERTEX_PROGRAM_ARB: { - struct r200_vertex_program *vp = CALLOC_STRUCT(r200_vertex_program); - return _mesa_init_gl_program(&vp->mesa_program.Base, target, id); + struct r200_vertex_program *vp = rzalloc(NULL, + struct r200_vertex_program); + return _mesa_init_gl_program(&vp->mesa_program, target, id, is_arb_asm); } case GL_FRAGMENT_PROGRAM_ARB: { - struct gl_fragment_program *prog = CALLOC_STRUCT(gl_fragment_program); - return _mesa_init_gl_program(&prog->Base, target, id); + struct gl_program *prog = rzalloc(NULL, struct gl_program); + return _mesa_init_gl_program(prog, target, id, is_arb_asm); } default: _mesa_problem(ctx, "Bad target in r200NewProgram"); @@ -1232,7 +1235,7 @@ case GL_VERTEX_PROGRAM_ARB: vp->translated = GL_FALSE; vp->fogpidx = 0; -/* memset(&vp->translated, 0, sizeof(struct r200_vertex_program) - sizeof(struct gl_vertex_program));*/ +/* memset(&vp->translated, 0, sizeof(struct r200_vertex_program) - sizeof(struct gl_program));*/ r200_translate_vertex_program(ctx, vp); rmesa->curr_vp_hw = NULL; break; diff -Nru mesa-12.0.6/src/mesa/drivers/dri/r200/radeon_common.c mesa-17.0.7/src/mesa/drivers/dri/r200/radeon_common.c --- mesa-12.0.6/src/mesa/drivers/dri/r200/radeon_common.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/r200/radeon_common.c 2017-06-01 10:37:10.000000000 +0000 @@ -426,7 +426,7 @@ if (!radeon_is_debug_enabled(RADEON_STATE, RADEON_VERBOSE) ) return; - dwords = (*state->check) (&radeon->glCtx, state); + dwords = state->check(&radeon->glCtx, state); fprintf(stderr, " emit %s %d/%d\n", state->name, dwords, state->cmd_size); @@ -491,13 +491,13 @@ BATCH_LOCALS(radeon); int dwords; - dwords = (*atom->check) (&radeon->glCtx, atom); + dwords = atom->check(&radeon->glCtx, atom); if (dwords) { radeon_print_state_atom(radeon, atom); if (atom->emit) { - (*atom->emit)(&radeon->glCtx, atom); + atom->emit(&radeon->glCtx, atom); } else { BEGIN_BATCH(dwords); OUT_BATCH_TABLE(atom->cmd, dwords); @@ -591,7 +591,7 @@ */ radeon->front_buffer_dirty = GL_FALSE; - (*screen->dri2.loader->flushFrontBuffer)(drawable, drawable->loaderPrivate); + screen->dri2.loader->flushFrontBuffer(drawable, drawable->loaderPrivate); } } } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/r200/radeon_common_context.c mesa-17.0.7/src/mesa/drivers/dri/r200/radeon_common_context.c --- mesa-12.0.6/src/mesa/drivers/dri/r200/radeon_common_context.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/r200/radeon_common_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -418,12 +418,12 @@ } } - buffers = (*screen->dri2.loader->getBuffersWithFormat)(drawable, - &drawable->w, - &drawable->h, - attachments, i / 2, - &count, - drawable->loaderPrivate); + buffers = screen->dri2.loader->getBuffersWithFormat(drawable, + &drawable->w, + &drawable->h, + attachments, i / 2, + &count, + drawable->loaderPrivate); } else if (screen->dri2.loader) { i = 0; if (draw->color_rb[0]) @@ -437,12 +437,12 @@ attachments[i++] = __DRI_BUFFER_STENCIL; } - buffers = (*screen->dri2.loader->getBuffers)(drawable, - &drawable->w, - &drawable->h, - attachments, i, - &count, - drawable->loaderPrivate); + buffers = screen->dri2.loader->getBuffers(drawable, + &drawable->w, + &drawable->h, + attachments, i, + &count, + drawable->loaderPrivate); } if (buffers == NULL) diff -Nru mesa-12.0.6/src/mesa/drivers/dri/r200/radeon_mipmap_tree.c mesa-17.0.7/src/mesa/drivers/dri/r200/radeon_mipmap_tree.c --- mesa-12.0.6/src/mesa/drivers/dri/r200/radeon_mipmap_tree.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/r200/radeon_mipmap_tree.c 2017-06-01 10:37:10.000000000 +0000 @@ -31,7 +31,6 @@ #include #include -#include "util/simple_list.h" #include "main/teximage.h" #include "main/texobj.h" #include "main/enums.h" diff -Nru mesa-12.0.6/src/mesa/drivers/dri/r200/radeon_queryobj.c mesa-17.0.7/src/mesa/drivers/dri/r200/radeon_queryobj.c --- mesa-12.0.6/src/mesa/drivers/dri/r200/radeon_queryobj.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/r200/radeon_queryobj.c 2017-06-01 10:37:10.000000000 +0000 @@ -29,7 +29,6 @@ #include "radeon_debug.h" #include "main/imports.h" -#include "util/simple_list.h" #include @@ -207,7 +206,7 @@ BATCH_LOCALS(radeon); int dwords; - dwords = (*atom->check) (ctx, atom); + dwords = atom->check(ctx, atom); BEGIN_BATCH(dwords); OUT_BATCH_TABLE(atom->cmd, dwords); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/r200/radeon_screen.c mesa-17.0.7/src/mesa/drivers/dri/r200/radeon_screen.c --- mesa-12.0.6/src/mesa/drivers/dri/r200/radeon_screen.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/r200/radeon_screen.c 2017-06-01 10:37:10.000000000 +0000 @@ -813,7 +813,7 @@ ARRAY_SIZE(back_buffer_modes), msaa_samples_array, ARRAY_SIZE(msaa_samples_array), - GL_TRUE); + GL_TRUE, GL_FALSE); configs = driConcatConfigs(configs, new_configs); } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/radeon/Makefile.am mesa-17.0.7/src/mesa/drivers/dri/radeon/Makefile.am --- mesa-12.0.6/src/mesa/drivers/dri/radeon/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/radeon/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -35,9 +35,9 @@ -I$(top_srcdir)/src/mesa/ \ -I$(top_srcdir)/src/gallium/include \ -I$(top_srcdir)/src/gallium/auxiliary \ + -I$(top_builddir)/src/mesa/drivers/dri/common \ -I$(top_srcdir)/src/mesa/drivers/dri/common \ -I$(top_srcdir)/src/mesa/drivers/dri/radeon/server \ - -I$(top_builddir)/src/mesa/drivers/dri/common \ $(DEFINES) \ $(VISIBILITY_CFLAGS) \ $(RADEON_CFLAGS) diff -Nru mesa-12.0.6/src/mesa/drivers/dri/radeon/Makefile.in mesa-17.0.7/src/mesa/drivers/dri/radeon/Makefile.in --- mesa-12.0.6/src/mesa/drivers/dri/radeon/Makefile.in 2017-01-24 01:41:56.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/radeon/Makefile.in 2017-06-01 10:37:24.000000000 +0000 @@ -215,6 +215,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -229,6 +231,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -258,10 +261,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -311,11 +315,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -355,8 +356,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -393,8 +392,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -403,7 +400,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -411,13 +407,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -446,6 +443,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -579,9 +577,9 @@ -I$(top_srcdir)/src/mesa/ \ -I$(top_srcdir)/src/gallium/include \ -I$(top_srcdir)/src/gallium/auxiliary \ + -I$(top_builddir)/src/mesa/drivers/dri/common \ -I$(top_srcdir)/src/mesa/drivers/dri/common \ -I$(top_srcdir)/src/mesa/drivers/dri/radeon/server \ - -I$(top_builddir)/src/mesa/drivers/dri/common \ $(DEFINES) \ $(VISIBILITY_CFLAGS) \ $(RADEON_CFLAGS) diff -Nru mesa-12.0.6/src/mesa/drivers/dri/radeon/radeon_common.c mesa-17.0.7/src/mesa/drivers/dri/radeon/radeon_common.c --- mesa-12.0.6/src/mesa/drivers/dri/radeon/radeon_common.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/radeon/radeon_common.c 2017-06-01 10:37:10.000000000 +0000 @@ -426,7 +426,7 @@ if (!radeon_is_debug_enabled(RADEON_STATE, RADEON_VERBOSE) ) return; - dwords = (*state->check) (&radeon->glCtx, state); + dwords = state->check(&radeon->glCtx, state); fprintf(stderr, " emit %s %d/%d\n", state->name, dwords, state->cmd_size); @@ -491,13 +491,13 @@ BATCH_LOCALS(radeon); int dwords; - dwords = (*atom->check) (&radeon->glCtx, atom); + dwords = atom->check(&radeon->glCtx, atom); if (dwords) { radeon_print_state_atom(radeon, atom); if (atom->emit) { - (*atom->emit)(&radeon->glCtx, atom); + atom->emit(&radeon->glCtx, atom); } else { BEGIN_BATCH(dwords); OUT_BATCH_TABLE(atom->cmd, dwords); @@ -591,7 +591,7 @@ */ radeon->front_buffer_dirty = GL_FALSE; - (*screen->dri2.loader->flushFrontBuffer)(drawable, drawable->loaderPrivate); + screen->dri2.loader->flushFrontBuffer(drawable, drawable->loaderPrivate); } } } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/radeon/radeon_common_context.c mesa-17.0.7/src/mesa/drivers/dri/radeon/radeon_common_context.c --- mesa-12.0.6/src/mesa/drivers/dri/radeon/radeon_common_context.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/radeon/radeon_common_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -418,12 +418,12 @@ } } - buffers = (*screen->dri2.loader->getBuffersWithFormat)(drawable, - &drawable->w, - &drawable->h, - attachments, i / 2, - &count, - drawable->loaderPrivate); + buffers = screen->dri2.loader->getBuffersWithFormat(drawable, + &drawable->w, + &drawable->h, + attachments, i / 2, + &count, + drawable->loaderPrivate); } else if (screen->dri2.loader) { i = 0; if (draw->color_rb[0]) @@ -437,12 +437,12 @@ attachments[i++] = __DRI_BUFFER_STENCIL; } - buffers = (*screen->dri2.loader->getBuffers)(drawable, - &drawable->w, - &drawable->h, - attachments, i, - &count, - drawable->loaderPrivate); + buffers = screen->dri2.loader->getBuffers(drawable, + &drawable->w, + &drawable->h, + attachments, i, + &count, + drawable->loaderPrivate); } if (buffers == NULL) diff -Nru mesa-12.0.6/src/mesa/drivers/dri/radeon/radeon_ioctl.h mesa-17.0.7/src/mesa/drivers/dri/radeon/radeon_ioctl.h --- mesa-12.0.6/src/mesa/drivers/dri/radeon/radeon_ioctl.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/radeon/radeon_ioctl.h 2017-06-01 10:37:10.000000000 +0000 @@ -36,7 +36,6 @@ #ifndef __RADEON_IOCTL_H__ #define __RADEON_IOCTL_H__ -#include "util/simple_list.h" #include "radeon_bo_gem.h" #include "radeon_cs_gem.h" diff -Nru mesa-12.0.6/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c mesa-17.0.7/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c --- mesa-12.0.6/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c 2017-06-01 10:37:10.000000000 +0000 @@ -31,7 +31,6 @@ #include #include -#include "util/simple_list.h" #include "main/teximage.h" #include "main/texobj.h" #include "main/enums.h" diff -Nru mesa-12.0.6/src/mesa/drivers/dri/radeon/radeon_queryobj.c mesa-17.0.7/src/mesa/drivers/dri/radeon/radeon_queryobj.c --- mesa-12.0.6/src/mesa/drivers/dri/radeon/radeon_queryobj.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/radeon/radeon_queryobj.c 2017-06-01 10:37:10.000000000 +0000 @@ -29,7 +29,6 @@ #include "radeon_debug.h" #include "main/imports.h" -#include "util/simple_list.h" #include @@ -207,7 +206,7 @@ BATCH_LOCALS(radeon); int dwords; - dwords = (*atom->check) (ctx, atom); + dwords = atom->check(ctx, atom); BEGIN_BATCH(dwords); OUT_BATCH_TABLE(atom->cmd, dwords); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/radeon/radeon_screen.c mesa-17.0.7/src/mesa/drivers/dri/radeon/radeon_screen.c --- mesa-12.0.6/src/mesa/drivers/dri/radeon/radeon_screen.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/radeon/radeon_screen.c 2017-06-01 10:37:10.000000000 +0000 @@ -813,7 +813,7 @@ ARRAY_SIZE(back_buffer_modes), msaa_samples_array, ARRAY_SIZE(msaa_samples_array), - GL_TRUE); + GL_TRUE, GL_FALSE); configs = driConcatConfigs(configs, new_configs); } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/radeon/radeon_state.c mesa-17.0.7/src/mesa/drivers/dri/radeon/radeon_state.c --- mesa-12.0.6/src/mesa/drivers/dri/radeon/radeon_state.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/radeon/radeon_state.c 2017-06-01 10:37:10.000000000 +0000 @@ -51,6 +51,7 @@ #include "tnl/t_pipeline.h" #include "swrast_setup/swrast_setup.h" #include "drivers/common/meta.h" +#include "util/bitscan.h" #include "radeon_context.h" #include "radeon_mipmap_tree.h" @@ -892,27 +893,26 @@ if (ctx->Light.Enabled) { - GLint p; - for (p = 0 ; p < MAX_LIGHTS; p++) { - if (ctx->Light.Light[p].Enabled) { - struct gl_light *l = &ctx->Light.Light[p]; - GLfloat *fcmd = (GLfloat *)RADEON_DB_STATE( lit[p] ); - - if (l->EyePosition[3] == 0.0) { - COPY_3FV( &fcmd[LIT_POSITION_X], l->_VP_inf_norm ); - COPY_3FV( &fcmd[LIT_DIRECTION_X], l->_h_inf_norm ); - fcmd[LIT_POSITION_W] = 0; - fcmd[LIT_DIRECTION_W] = 0; - } else { - COPY_4V( &fcmd[LIT_POSITION_X], l->_Position ); - fcmd[LIT_DIRECTION_X] = -l->_NormSpotDirection[0]; - fcmd[LIT_DIRECTION_Y] = -l->_NormSpotDirection[1]; - fcmd[LIT_DIRECTION_Z] = -l->_NormSpotDirection[2]; - fcmd[LIT_DIRECTION_W] = 0; - } + GLbitfield mask = ctx->Light._EnabledLights; + while (mask) { + const int p = u_bit_scan(&mask); + struct gl_light *l = &ctx->Light.Light[p]; + GLfloat *fcmd = (GLfloat *)RADEON_DB_STATE( lit[p] ); + + if (l->EyePosition[3] == 0.0) { + COPY_3FV( &fcmd[LIT_POSITION_X], l->_VP_inf_norm ); + COPY_3FV( &fcmd[LIT_DIRECTION_X], l->_h_inf_norm ); + fcmd[LIT_POSITION_W] = 0; + fcmd[LIT_DIRECTION_W] = 0; + } else { + COPY_4V( &fcmd[LIT_POSITION_X], l->_Position ); + fcmd[LIT_DIRECTION_X] = -l->_NormSpotDirection[0]; + fcmd[LIT_DIRECTION_Y] = -l->_NormSpotDirection[1]; + fcmd[LIT_DIRECTION_Z] = -l->_NormSpotDirection[2]; + fcmd[LIT_DIRECTION_W] = 0; + } - RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.lit[p] ); - } + RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.lit[p] ); } } } @@ -1134,18 +1134,17 @@ static void radeonUpdateClipPlanes( struct gl_context *ctx ) { r100ContextPtr rmesa = R100_CONTEXT(ctx); - GLuint p; + GLbitfield mask = ctx->Transform.ClipPlanesEnabled; - for (p = 0; p < ctx->Const.MaxClipPlanes; p++) { - if (ctx->Transform.ClipPlanesEnabled & (1 << p)) { - GLint *ip = (GLint *)ctx->Transform._ClipUserPlane[p]; - - RADEON_STATECHANGE( rmesa, ucp[p] ); - rmesa->hw.ucp[p].cmd[UCP_X] = ip[0]; - rmesa->hw.ucp[p].cmd[UCP_Y] = ip[1]; - rmesa->hw.ucp[p].cmd[UCP_Z] = ip[2]; - rmesa->hw.ucp[p].cmd[UCP_W] = ip[3]; - } + while (mask) { + const int p = u_bit_scan(&mask); + GLint *ip = (GLint *)ctx->Transform._ClipUserPlane[p]; + + RADEON_STATECHANGE( rmesa, ucp[p] ); + rmesa->hw.ucp[p].cmd[UCP_X] = ip[0]; + rmesa->hw.ucp[p].cmd[UCP_Y] = ip[1]; + rmesa->hw.ucp[p].cmd[UCP_Z] = ip[2]; + rmesa->hw.ucp[p].cmd[UCP_W] = ip[3]; } } diff -Nru mesa-12.0.6/src/mesa/drivers/dri/radeon/radeon_swtcl.c mesa-17.0.7/src/mesa/drivers/dri/radeon/radeon_swtcl.c --- mesa-12.0.6/src/mesa/drivers/dri/radeon/radeon_swtcl.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/radeon/radeon_swtcl.c 2017-06-01 10:37:10.000000000 +0000 @@ -37,7 +37,6 @@ #include "main/enums.h" #include "main/imports.h" #include "main/macros.h" -#include "util/simple_list.h" #include "math/m_xform.h" diff -Nru mesa-12.0.6/src/mesa/drivers/dri/radeon/radeon_tex.c mesa-17.0.7/src/mesa/drivers/dri/radeon/radeon_tex.c --- mesa-12.0.6/src/mesa/drivers/dri/radeon/radeon_tex.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/radeon/radeon_tex.c 2017-06-01 10:37:10.000000000 +0000 @@ -36,7 +36,6 @@ #include "main/context.h" #include "main/enums.h" #include "main/image.h" -#include "util/simple_list.h" #include "main/teximage.h" #include "main/texobj.h" @@ -329,7 +328,7 @@ static void radeonTexParameter( struct gl_context *ctx, struct gl_texture_object *texObj, - GLenum pname, const GLfloat *params ) + GLenum pname ) { radeonTexObj* t = radeon_tex_obj(texObj); diff -Nru mesa-12.0.6/src/mesa/drivers/dri/swrast/Makefile.am mesa-17.0.7/src/mesa/drivers/dri/swrast/Makefile.am --- mesa-12.0.6/src/mesa/drivers/dri/swrast/Makefile.am 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/swrast/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -30,8 +30,8 @@ -I$(top_srcdir)/src/mesa/ \ -I$(top_srcdir)/src/gallium/include \ -I$(top_srcdir)/src/gallium/auxiliary \ - -I$(top_srcdir)/src/mesa/drivers/dri/common \ -I$(top_builddir)/src/mesa/drivers/dri/common \ + -I$(top_srcdir)/src/mesa/drivers/dri/common \ $(LIBDRM_CFLAGS) \ $(DEFINES) \ $(VISIBILITY_CFLAGS) diff -Nru mesa-12.0.6/src/mesa/drivers/dri/swrast/Makefile.in mesa-17.0.7/src/mesa/drivers/dri/swrast/Makefile.in --- mesa-12.0.6/src/mesa/drivers/dri/swrast/Makefile.in 2017-01-24 01:41:56.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/swrast/Makefile.in 2017-06-01 10:37:24.000000000 +0000 @@ -206,6 +206,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -220,6 +222,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -249,10 +252,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -302,11 +306,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -346,8 +347,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -384,8 +383,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -394,7 +391,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -402,13 +398,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -437,6 +434,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -513,8 +511,8 @@ -I$(top_srcdir)/src/mesa/ \ -I$(top_srcdir)/src/gallium/include \ -I$(top_srcdir)/src/gallium/auxiliary \ - -I$(top_srcdir)/src/mesa/drivers/dri/common \ -I$(top_builddir)/src/mesa/drivers/dri/common \ + -I$(top_srcdir)/src/mesa/drivers/dri/common \ $(LIBDRM_CFLAGS) \ $(DEFINES) \ $(VISIBILITY_CFLAGS) diff -Nru mesa-12.0.6/src/mesa/drivers/dri/swrast/swrast.c mesa-17.0.7/src/mesa/drivers/dri/swrast/swrast.c --- mesa-12.0.6/src/mesa/drivers/dri/swrast/swrast.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/dri/swrast/swrast.c 2017-06-01 10:37:10.000000000 +0000 @@ -273,7 +273,7 @@ depth_bits_array, stencil_bits_array, depth_buffer_factor, back_buffer_modes, back_buffer_factor, msaa_samples_array, 1, - GL_TRUE); + GL_TRUE, GL_FALSE); if (configs == NULL) { fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__, __LINE__); diff -Nru mesa-12.0.6/src/mesa/drivers/osmesa/Makefile.am mesa-17.0.7/src/mesa/drivers/osmesa/Makefile.am --- mesa-12.0.6/src/mesa/drivers/osmesa/Makefile.am 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/osmesa/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -28,8 +28,8 @@ -I$(top_srcdir)/src \ -I$(top_srcdir)/src/gallium/include \ -I$(top_srcdir)/src/gallium/auxiliary \ - -I$(top_srcdir)/src/mapi \ -I$(top_builddir)/src/mapi \ + -I$(top_srcdir)/src/mapi \ -I$(top_srcdir)/src/mesa/ \ $(DEFINES) AM_CFLAGS = $(PTHREAD_CFLAGS) \ diff -Nru mesa-12.0.6/src/mesa/drivers/osmesa/Makefile.in mesa-17.0.7/src/mesa/drivers/osmesa/Makefile.in --- mesa-12.0.6/src/mesa/drivers/osmesa/Makefile.in 2017-01-24 01:41:56.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/osmesa/Makefile.in 2017-06-01 10:37:24.000000000 +0000 @@ -245,6 +245,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -259,6 +261,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -288,10 +291,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -341,11 +345,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -385,8 +386,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -423,8 +422,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -433,7 +430,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -441,13 +437,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -476,6 +473,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -544,8 +542,8 @@ -I$(top_srcdir)/src \ -I$(top_srcdir)/src/gallium/include \ -I$(top_srcdir)/src/gallium/auxiliary \ - -I$(top_srcdir)/src/mapi \ -I$(top_builddir)/src/mapi \ + -I$(top_srcdir)/src/mapi \ -I$(top_srcdir)/src/mesa/ \ $(DEFINES) diff -Nru mesa-12.0.6/src/mesa/drivers/osmesa/osmesa.c mesa-17.0.7/src/mesa/drivers/osmesa/osmesa.c --- mesa-12.0.6/src/mesa/drivers/osmesa/osmesa.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/osmesa/osmesa.c 2017-06-01 10:37:10.000000000 +0000 @@ -966,6 +966,9 @@ * If the context's viewport hasn't been initialized yet, it will now be * initialized to (0,0,width,height). * + * If both the context and the buffer are null, the current context will be + * unbound. + * * Input: osmesa - the rendering context * buffer - the image buffer memory * type - data type for pixel components @@ -983,6 +986,10 @@ OSMesaMakeCurrent( OSMesaContext osmesa, void *buffer, GLenum type, GLsizei width, GLsizei height ) { + if (!osmesa && !buffer) { + return _mesa_make_current(NULL, NULL, NULL); + } + if (!osmesa || !buffer || width < 1 || height < 1 || width > SWRAST_MAX_WIDTH || height > SWRAST_MAX_HEIGHT) { diff -Nru mesa-12.0.6/src/mesa/drivers/x11/glxapi.c mesa-17.0.7/src/mesa/drivers/x11/glxapi.c --- mesa-12.0.6/src/mesa/drivers/x11/glxapi.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/x11/glxapi.c 2017-06-01 10:37:10.000000000 +0000 @@ -159,7 +159,7 @@ GET_DISPATCH(dpy, t); if (!t) return NULL; - return (t->ChooseVisual)(dpy, screen, list); + return t->ChooseVisual(dpy, screen, list); } @@ -170,7 +170,7 @@ GET_DISPATCH(dpy, t); if (!t) return; - (t->CopyContext)(dpy, src, dst, mask); + t->CopyContext(dpy, src, dst, mask); } @@ -181,7 +181,7 @@ GET_DISPATCH(dpy, t); if (!t) return 0; - return (t->CreateContext)(dpy, visinfo, shareList, direct); + return t->CreateContext(dpy, visinfo, shareList, direct); } @@ -192,7 +192,7 @@ GET_DISPATCH(dpy, t); if (!t) return 0; - return (t->CreateGLXPixmap)(dpy, visinfo, pixmap); + return t->CreateGLXPixmap(dpy, visinfo, pixmap); } @@ -203,7 +203,7 @@ GET_DISPATCH(dpy, t); if (!t) return; - (t->DestroyContext)(dpy, ctx); + t->DestroyContext(dpy, ctx); } @@ -214,7 +214,7 @@ GET_DISPATCH(dpy, t); if (!t) return; - (t->DestroyGLXPixmap)(dpy, pixmap); + t->DestroyGLXPixmap(dpy, pixmap); } @@ -225,7 +225,7 @@ GET_DISPATCH(dpy, t); if (!t) return GLX_NO_EXTENSION; - return (t->GetConfig)(dpy, visinfo, attrib, value); + return t->GetConfig(dpy, visinfo, attrib, value); } @@ -254,7 +254,7 @@ GET_DISPATCH(dpy, t); if (!t) return False; - return (t->IsDirect)(dpy, ctx); + return t->IsDirect(dpy, ctx); } @@ -267,7 +267,7 @@ if (!t) { return False; } - b = (*t->MakeCurrent)(dpy, drawable, ctx); + b = t->MakeCurrent(dpy, drawable, ctx); return b; } @@ -279,7 +279,7 @@ GET_DISPATCH(dpy, t); if (!t) return False; - return (t->QueryExtension)(dpy, errorb, event); + return t->QueryExtension(dpy, errorb, event); } @@ -290,7 +290,7 @@ GET_DISPATCH(dpy, t); if (!t) return False; - return (t->QueryVersion)(dpy, maj, min); + return t->QueryVersion(dpy, maj, min); } @@ -301,7 +301,7 @@ GET_DISPATCH(dpy, t); if (!t) return; - (t->SwapBuffers)(dpy, drawable); + t->SwapBuffers(dpy, drawable); } @@ -313,7 +313,7 @@ GET_DISPATCH(dpy, t); if (!t) return; - (t->UseXFont)(font, first, count, listBase); + t->UseXFont(font, first, count, listBase); } @@ -325,7 +325,7 @@ GET_DISPATCH(dpy, t); if (!t) return; - (t->WaitGL)(); + t->WaitGL(); } @@ -337,7 +337,7 @@ GET_DISPATCH(dpy, t); if (!t) return; - (t->WaitX)(); + t->WaitX(); } @@ -351,7 +351,7 @@ GET_DISPATCH(dpy, t); if (!t) return NULL; - return (t->GetClientString)(dpy, name); + return t->GetClientString(dpy, name); } @@ -362,7 +362,7 @@ GET_DISPATCH(dpy, t); if (!t) return NULL; - return (t->QueryExtensionsString)(dpy, screen); + return t->QueryExtensionsString(dpy, screen); } @@ -373,7 +373,7 @@ GET_DISPATCH(dpy, t); if (!t) return NULL; - return (t->QueryServerString)(dpy, screen, name); + return t->QueryServerString(dpy, screen, name); } @@ -399,7 +399,7 @@ GET_DISPATCH(dpy, t); if (!t) return 0; - return (t->ChooseFBConfig)(dpy, screen, attribList, nitems); + return t->ChooseFBConfig(dpy, screen, attribList, nitems); } @@ -410,7 +410,7 @@ GET_DISPATCH(dpy, t); if (!t) return 0; - return (t->CreateNewContext)(dpy, config, renderType, shareList, direct); + return t->CreateNewContext(dpy, config, renderType, shareList, direct); } @@ -421,7 +421,7 @@ GET_DISPATCH(dpy, t); if (!t) return 0; - return (t->CreatePbuffer)(dpy, config, attribList); + return t->CreatePbuffer(dpy, config, attribList); } @@ -432,7 +432,7 @@ GET_DISPATCH(dpy, t); if (!t) return 0; - return (t->CreatePixmap)(dpy, config, pixmap, attribList); + return t->CreatePixmap(dpy, config, pixmap, attribList); } @@ -443,7 +443,7 @@ GET_DISPATCH(dpy, t); if (!t) return 0; - return (t->CreateWindow)(dpy, config, win, attribList); + return t->CreateWindow(dpy, config, win, attribList); } @@ -454,7 +454,7 @@ GET_DISPATCH(dpy, t); if (!t) return; - (t->DestroyPbuffer)(dpy, pbuf); + t->DestroyPbuffer(dpy, pbuf); } @@ -465,7 +465,7 @@ GET_DISPATCH(dpy, t); if (!t) return; - (t->DestroyPixmap)(dpy, pixmap); + t->DestroyPixmap(dpy, pixmap); } @@ -476,7 +476,7 @@ GET_DISPATCH(dpy, t); if (!t) return; - (t->DestroyWindow)(dpy, window); + t->DestroyWindow(dpy, window); } @@ -495,7 +495,7 @@ GET_DISPATCH(dpy, t); if (!t) return GLX_NO_EXTENSION; - return (t->GetFBConfigAttrib)(dpy, config, attribute, value); + return t->GetFBConfigAttrib(dpy, config, attribute, value); } @@ -506,7 +506,7 @@ GET_DISPATCH(dpy, t); if (!t) return 0; - return (t->GetFBConfigs)(dpy, screen, nelements); + return t->GetFBConfigs(dpy, screen, nelements); } void PUBLIC @@ -516,7 +516,7 @@ GET_DISPATCH(dpy, t); if (!t) return; - (t->GetSelectedEvent)(dpy, drawable, mask); + t->GetSelectedEvent(dpy, drawable, mask); } @@ -527,7 +527,7 @@ GET_DISPATCH(dpy, t); if (!t) return NULL; - return (t->GetVisualFromFBConfig)(dpy, config); + return t->GetVisualFromFBConfig(dpy, config); } @@ -539,7 +539,7 @@ GET_DISPATCH(dpy, t); if (!t) return False; - b = (t->MakeContextCurrent)(dpy, draw, read, ctx); + b = t->MakeContextCurrent(dpy, draw, read, ctx); return b; } @@ -552,7 +552,7 @@ assert(t); if (!t) return 0; /* XXX correct? */ - return (t->QueryContext)(dpy, ctx, attribute, value); + return t->QueryContext(dpy, ctx, attribute, value); } @@ -563,7 +563,7 @@ GET_DISPATCH(dpy, t); if (!t) return; - (t->QueryDrawable)(dpy, draw, attribute, value); + t->QueryDrawable(dpy, draw, attribute, value); } @@ -574,7 +574,7 @@ GET_DISPATCH(dpy, t); if (!t) return; - (t->SelectEvent)(dpy, drawable, mask); + t->SelectEvent(dpy, drawable, mask); } @@ -589,7 +589,7 @@ GET_DISPATCH(dpy, t); if (!t) return 0; - return (t->SwapIntervalSGI)(interval); + return t->SwapIntervalSGI(interval); } @@ -604,7 +604,7 @@ GET_DISPATCH(dpy, t); if (!t || !glXGetCurrentContext()) return GLX_BAD_CONTEXT; - return (t->GetVideoSyncSGI)(count); + return t->GetVideoSyncSGI(count); } int PUBLIC @@ -615,7 +615,7 @@ GET_DISPATCH(dpy, t); if (!t || !glXGetCurrentContext()) return GLX_BAD_CONTEXT; - return (t->WaitVideoSyncSGI)(divisor, remainder, count); + return t->WaitVideoSyncSGI(divisor, remainder, count); } @@ -629,7 +629,7 @@ GET_DISPATCH(dpy, t); if (!t) return False; - return (t->MakeCurrentReadSGI)(dpy, draw, read, ctx); + return t->MakeCurrentReadSGI(dpy, draw, read, ctx); } GLXDrawable PUBLIC @@ -648,7 +648,7 @@ GET_DISPATCH(dpy, t); if (!t) return 0; - return (t->CreateGLXVideoSourceSGIX)(dpy, screen, server, path, nodeClass, drainNode); + return t->CreateGLXVideoSourceSGIX(dpy, screen, server, path, nodeClass, drainNode); } void PUBLIC @@ -658,7 +658,7 @@ GET_DISPATCH(dpy, t); if (!t) return 0; - return (t->DestroyGLXVideoSourceSGIX)(dpy, src); + return t->DestroyGLXVideoSourceSGIX(dpy, src); } #endif @@ -673,7 +673,7 @@ GET_DISPATCH(dpy, t); if (!t) return; - (t->FreeContextEXT)(dpy, context); + t->FreeContextEXT(dpy, context); } GLXContextID PUBLIC @@ -695,7 +695,7 @@ GET_DISPATCH(dpy, t); if (!t) return 0; - return (t->ImportContextEXT)(dpy, contextID); + return t->ImportContextEXT(dpy, contextID); } int PUBLIC @@ -705,7 +705,7 @@ GET_DISPATCH(dpy, t); if (!t) return 0; /* XXX ok? */ - return (t->QueryContextInfoEXT)(dpy, context, attribute, value); + return t->QueryContextInfoEXT(dpy, context, attribute, value); } @@ -719,7 +719,7 @@ GET_DISPATCH(dpy, t); if (!t) return 0; - return (t->GetFBConfigAttribSGIX)(dpy, config, attribute, value); + return t->GetFBConfigAttribSGIX(dpy, config, attribute, value); } GLXFBConfigSGIX PUBLIC * @@ -729,7 +729,7 @@ GET_DISPATCH(dpy, t); if (!t) return 0; - return (t->ChooseFBConfigSGIX)(dpy, screen, attrib_list, nelements); + return t->ChooseFBConfigSGIX(dpy, screen, attrib_list, nelements); } GLXPixmap PUBLIC @@ -739,7 +739,7 @@ GET_DISPATCH(dpy, t); if (!t) return 0; - return (t->CreateGLXPixmapWithConfigSGIX)(dpy, config, pixmap); + return t->CreateGLXPixmapWithConfigSGIX(dpy, config, pixmap); } GLXContext PUBLIC @@ -749,7 +749,7 @@ GET_DISPATCH(dpy, t); if (!t) return 0; - return (t->CreateContextWithConfigSGIX)(dpy, config, render_type, share_list, direct); + return t->CreateContextWithConfigSGIX(dpy, config, render_type, share_list, direct); } XVisualInfo PUBLIC * @@ -759,7 +759,7 @@ GET_DISPATCH(dpy, t); if (!t) return 0; - return (t->GetVisualFromFBConfigSGIX)(dpy, config); + return t->GetVisualFromFBConfigSGIX(dpy, config); } GLXFBConfigSGIX PUBLIC @@ -769,7 +769,7 @@ GET_DISPATCH(dpy, t); if (!t) return 0; - return (t->GetFBConfigFromVisualSGIX)(dpy, vis); + return t->GetFBConfigFromVisualSGIX(dpy, vis); } @@ -783,7 +783,7 @@ GET_DISPATCH(dpy, t); if (!t) return 0; - return (t->CreateGLXPbufferSGIX)(dpy, config, width, height, attrib_list); + return t->CreateGLXPbufferSGIX(dpy, config, width, height, attrib_list); } void PUBLIC @@ -793,7 +793,7 @@ GET_DISPATCH(dpy, t); if (!t) return; - (t->DestroyGLXPbufferSGIX)(dpy, pbuf); + t->DestroyGLXPbufferSGIX(dpy, pbuf); } int PUBLIC @@ -803,7 +803,7 @@ GET_DISPATCH(dpy, t); if (!t) return 0; - return (t->QueryGLXPbufferSGIX)(dpy, pbuf, attribute, value); + return t->QueryGLXPbufferSGIX(dpy, pbuf, attribute, value); } void PUBLIC @@ -813,7 +813,7 @@ GET_DISPATCH(dpy, t); if (!t) return; - (t->SelectEventSGIX)(dpy, drawable, mask); + t->SelectEventSGIX(dpy, drawable, mask); } void PUBLIC @@ -823,7 +823,7 @@ GET_DISPATCH(dpy, t); if (!t) return; - (t->GetSelectedEventSGIX)(dpy, drawable, mask); + t->GetSelectedEventSGIX(dpy, drawable, mask); } @@ -837,7 +837,7 @@ GET_DISPATCH(dpy, t); if (!t) return; - (t->CushionSGI)(dpy, win, cushion); + t->CushionSGI(dpy, win, cushion); } @@ -851,7 +851,7 @@ GET_DISPATCH(dpy, t); if (!t) return 0; - return (t->BindChannelToWindowSGIX)(dpy, screen, channel, window); + return t->BindChannelToWindowSGIX(dpy, screen, channel, window); } int PUBLIC @@ -861,7 +861,7 @@ GET_DISPATCH(dpy, t); if (!t) return 0; - return (t->ChannelRectSGIX)(dpy, screen, channel, x, y, w, h); + return t->ChannelRectSGIX(dpy, screen, channel, x, y, w, h); } int PUBLIC @@ -871,7 +871,7 @@ GET_DISPATCH(dpy, t); if (!t) return 0; - return (t->QueryChannelRectSGIX)(dpy, screen, channel, x, y, w, h); + return t->QueryChannelRectSGIX(dpy, screen, channel, x, y, w, h); } int PUBLIC @@ -881,7 +881,7 @@ GET_DISPATCH(dpy, t); if (!t) return 0; - return (t->QueryChannelDeltasSGIX)(dpy, screen, channel, dx, dy, dw, dh); + return t->QueryChannelDeltasSGIX(dpy, screen, channel, dx, dy, dw, dh); } int PUBLIC @@ -891,7 +891,7 @@ GET_DISPATCH(dpy, t); if (!t) return 0; - return (t->ChannelRectSyncSGIX)(dpy, screen, channel, synctype); + return t->ChannelRectSyncSGIX(dpy, screen, channel, synctype); } @@ -905,7 +905,7 @@ GET_DISPATCH(dpy, t); if (!t) return False; - return (t->AssociateDMPbufferSGIX)(dpy, pbuffer, params, dmbuffer); + return t->AssociateDMPbufferSGIX(dpy, pbuffer, params, dmbuffer); } #endif @@ -920,7 +920,7 @@ GET_DISPATCH(dpy, t); if (!t) return; - (*t->JoinSwapGroupSGIX)(dpy, drawable, member); + t->JoinSwapGroupSGIX(dpy, drawable, member); } @@ -933,7 +933,7 @@ GET_DISPATCH(dpy, t); if (!t) return; - (*t->BindSwapBarrierSGIX)(dpy, drawable, barrier); + t->BindSwapBarrierSGIX(dpy, drawable, barrier); } Bool PUBLIC @@ -943,7 +943,7 @@ GET_DISPATCH(dpy, t); if (!t) return False; - return (*t->QueryMaxSwapBarriersSGIX)(dpy, screen, max); + return t->QueryMaxSwapBarriersSGIX(dpy, screen, max); } @@ -957,7 +957,7 @@ GET_DISPATCH(dpy, t); if (!t) return False; - return (*t->GetTransparentIndexSUN)(dpy, overlay, underlay, pTransparent); + return t->GetTransparentIndexSUN(dpy, overlay, underlay, pTransparent); } @@ -971,7 +971,7 @@ GET_DISPATCH(dpy, t); if (!t) return; - (t->CopySubBufferMESA)(dpy, drawable, x, y, width, height); + t->CopySubBufferMESA(dpy, drawable, x, y, width, height); } @@ -985,7 +985,7 @@ GET_DISPATCH(dpy, t); if (!t) return False; - return (t->ReleaseBuffersMESA)(dpy, w); + return t->ReleaseBuffersMESA(dpy, w); } @@ -999,7 +999,7 @@ GET_DISPATCH(dpy, t); if (!t) return 0; - return (t->CreateGLXPixmapMESA)(dpy, visinfo, pixmap, cmap); + return t->CreateGLXPixmapMESA(dpy, visinfo, pixmap, cmap); } @@ -1014,7 +1014,7 @@ GET_DISPATCH(dpy, t); if (!t) return False; - return (t->Set3DfxModeMESA)(mode); + return t->Set3DfxModeMESA(mode); } @@ -1032,7 +1032,7 @@ GET_DISPATCH(dpy, t); if (!t) return NULL; - return (t->AllocateMemoryNV)(size, readFrequency, writeFrequency, priority); + return t->AllocateMemoryNV(size, readFrequency, writeFrequency, priority); } @@ -1044,7 +1044,7 @@ GET_DISPATCH(dpy, t); if (!t) return; - (t->FreeMemoryNV)(pointer); + t->FreeMemoryNV(pointer); } @@ -1060,7 +1060,7 @@ GET_DISPATCH(dpy, t); if (!t) return ~0; - return (t->GetAGPOffsetMESA)(pointer); + return t->GetAGPOffsetMESA(pointer); } @@ -1387,6 +1387,6 @@ GET_DISPATCH(dpy, t); if (!t) return 0; - return (t->CreateContextAttribs)(dpy, config, share_context, direct, - attrib_list); + return t->CreateContextAttribs(dpy, config, share_context, direct, + attrib_list); } diff -Nru mesa-12.0.6/src/mesa/drivers/x11/Makefile.in mesa-17.0.7/src/mesa/drivers/x11/Makefile.in --- mesa-12.0.6/src/mesa/drivers/x11/Makefile.in 2017-01-24 01:41:56.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/x11/Makefile.in 2017-06-01 10:37:24.000000000 +0000 @@ -248,6 +248,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -262,6 +264,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -291,10 +294,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -344,11 +348,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -388,8 +389,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -426,8 +425,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -436,7 +433,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -444,13 +440,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -479,6 +476,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ diff -Nru mesa-12.0.6/src/mesa/drivers/x11/xm_buffer.c mesa-17.0.7/src/mesa/drivers/x11/xm_buffer.c --- mesa-12.0.6/src/mesa/drivers/x11/xm_buffer.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/drivers/x11/xm_buffer.c 2017-06-01 10:37:10.000000000 +0000 @@ -451,7 +451,7 @@ assert(xrb->pixmap); - /* Install error handler for XGetImage() in case the the window + /* Install error handler for XGetImage() in case the window * isn't mapped. If we fail we'll create a temporary XImage. */ mesaXErrorFlag = 0; diff -Nru mesa-12.0.6/src/mesa/main/api_arrayelt.c mesa-17.0.7/src/mesa/main/api_arrayelt.c --- mesa-12.0.6/src/mesa/main/api_arrayelt.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/api_arrayelt.c 2017-06-01 10:37:10.000000000 +0000 @@ -48,7 +48,7 @@ typedef void (GLAPIENTRY *array_func)( const void * ); typedef struct { - const struct gl_vertex_attrib_array *array; + const struct gl_array_attributes *array; const struct gl_vertex_buffer_binding *binding; int offset; } AEarray; @@ -56,7 +56,7 @@ typedef void (GLAPIENTRY *attrib_func)( GLuint indx, const void *data ); typedef struct { - const struct gl_vertex_attrib_array *array; + const struct gl_array_attributes *array; const struct gl_vertex_buffer_binding *binding; attrib_func func; GLuint index; @@ -1288,7 +1288,7 @@ * Array [unnormalized/normalized/integer][size][type] of VertexAttrib * functions */ -static attrib_func AttribFuncsARB[4][4][NUM_TYPES] = { +static const attrib_func AttribFuncsARB[4][4][NUM_TYPES] = { { /* non-normalized */ { @@ -1566,7 +1566,7 @@ /* conventional vertex arrays */ if (vao->VertexAttrib[VERT_ATTRIB_COLOR_INDEX].Enabled) { aa->array = &vao->VertexAttrib[VERT_ATTRIB_COLOR_INDEX]; - aa->binding = &vao->VertexBinding[aa->array->VertexBinding]; + aa->binding = &vao->BufferBinding[aa->array->BufferBindingIndex]; aa->offset = IndexFuncs[TYPE_IDX(aa->array->Type)]; check_vbo(actx, aa->binding->BufferObj); aa++; @@ -1574,7 +1574,7 @@ if (vao->VertexAttrib[VERT_ATTRIB_EDGEFLAG].Enabled) { aa->array = &vao->VertexAttrib[VERT_ATTRIB_EDGEFLAG]; - aa->binding = &vao->VertexBinding[aa->array->VertexBinding]; + aa->binding = &vao->BufferBinding[aa->array->BufferBindingIndex]; aa->offset = _gloffset_EdgeFlagv; check_vbo(actx, aa->binding->BufferObj); aa++; @@ -1582,7 +1582,7 @@ if (vao->VertexAttrib[VERT_ATTRIB_NORMAL].Enabled) { aa->array = &vao->VertexAttrib[VERT_ATTRIB_NORMAL]; - aa->binding = &vao->VertexBinding[aa->array->VertexBinding]; + aa->binding = &vao->BufferBinding[aa->array->BufferBindingIndex]; aa->offset = NormalFuncs[TYPE_IDX(aa->array->Type)]; check_vbo(actx, aa->binding->BufferObj); aa++; @@ -1590,7 +1590,7 @@ if (vao->VertexAttrib[VERT_ATTRIB_COLOR0].Enabled) { aa->array = &vao->VertexAttrib[VERT_ATTRIB_COLOR0]; - aa->binding = &vao->VertexBinding[aa->array->VertexBinding]; + aa->binding = &vao->BufferBinding[aa->array->BufferBindingIndex]; aa->offset = ColorFuncs[aa->array->Size-3][TYPE_IDX(aa->array->Type)]; check_vbo(actx, aa->binding->BufferObj); aa++; @@ -1598,7 +1598,7 @@ if (vao->VertexAttrib[VERT_ATTRIB_COLOR1].Enabled) { aa->array = &vao->VertexAttrib[VERT_ATTRIB_COLOR1]; - aa->binding = &vao->VertexBinding[aa->array->VertexBinding]; + aa->binding = &vao->BufferBinding[aa->array->BufferBindingIndex]; aa->offset = SecondaryColorFuncs[TYPE_IDX(aa->array->Type)]; check_vbo(actx, aa->binding->BufferObj); aa++; @@ -1606,21 +1606,21 @@ if (vao->VertexAttrib[VERT_ATTRIB_FOG].Enabled) { aa->array = &vao->VertexAttrib[VERT_ATTRIB_FOG]; - aa->binding = &vao->VertexBinding[aa->array->VertexBinding]; + aa->binding = &vao->BufferBinding[aa->array->BufferBindingIndex]; aa->offset = FogCoordFuncs[TYPE_IDX(aa->array->Type)]; check_vbo(actx, aa->binding->BufferObj); aa++; } for (i = 0; i < ctx->Const.MaxTextureCoordUnits; i++) { - struct gl_vertex_attrib_array *attribArray = + struct gl_array_attributes *attribArray = &vao->VertexAttrib[VERT_ATTRIB_TEX(i)]; if (attribArray->Enabled) { /* NOTE: we use generic glVertexAttribNV functions here. * If we ever remove GL_NV_vertex_program this will have to change. */ at->array = attribArray; - at->binding = &vao->VertexBinding[attribArray->VertexBinding]; + at->binding = &vao->BufferBinding[attribArray->BufferBindingIndex]; assert(!at->array->Normalized); at->func = AttribFuncsNV[at->array->Normalized] [at->array->Size-1] @@ -1633,12 +1633,12 @@ /* generic vertex attribute arrays */ for (i = 1; i < VERT_ATTRIB_GENERIC_MAX; i++) { /* skip zero! */ - struct gl_vertex_attrib_array *attribArray = + struct gl_array_attributes *attribArray = &vao->VertexAttrib[VERT_ATTRIB_GENERIC(i)]; if (attribArray->Enabled) { GLint intOrNorm; at->array = attribArray; - at->binding = &vao->VertexBinding[attribArray->VertexBinding]; + at->binding = &vao->BufferBinding[attribArray->BufferBindingIndex]; /* Note: we can't grab the _glapi_Dispatch->VertexAttrib1fvNV * function pointer here (for float arrays) since the pointer may * change from one execution of _ae_ArrayElement() to @@ -1669,7 +1669,7 @@ * issued as the last (provoking) attribute). */ aa->array = &vao->VertexAttrib[VERT_ATTRIB_GENERIC0]; - aa->binding = &vao->VertexBinding[aa->array->VertexBinding]; + aa->binding = &vao->BufferBinding[aa->array->BufferBindingIndex]; assert(aa->array->Size >= 2); /* XXX fix someday? */ aa->offset = VertexFuncs[aa->array->Size-2][TYPE_IDX(aa->array->Type)]; check_vbo(actx, aa->binding->BufferObj); @@ -1677,7 +1677,7 @@ } else if (vao->VertexAttrib[VERT_ATTRIB_POS].Enabled) { aa->array = &vao->VertexAttrib[VERT_ATTRIB_POS]; - aa->binding = &vao->VertexBinding[aa->array->VertexBinding]; + aa->binding = &vao->BufferBinding[aa->array->BufferBindingIndex]; aa->offset = VertexFuncs[aa->array->Size-2][TYPE_IDX(aa->array->Type)]; check_vbo(actx, aa->binding->BufferObj); aa++; diff -Nru mesa-12.0.6/src/mesa/main/api_exec.c mesa-17.0.7/src/mesa/main/api_exec.c --- mesa-12.0.6/src/mesa/main/api_exec.c 2017-01-24 01:42:45.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/api_exec.c 2017-06-01 10:37:45.000000000 +0000 @@ -41,6 +41,7 @@ #include "main/blit.h" #include "main/bufferobj.h" #include "main/arrayobj.h" +#include "main/bbox.h" #include "main/buffers.h" #include "main/clear.h" #include "main/clip.h" @@ -96,7 +97,7 @@ #include "main/texparam.h" #include "main/texstate.h" #include "main/texstorage.h" -#include "main/texturebarrier.h" +#include "main/barrier.h" #include "main/textureview.h" #include "main/transformfeedback.h" #include "main/mtypes.h" @@ -132,6 +133,11 @@ vbo_initialize_exec_dispatch(ctx, exec); + if ((ctx->API == API_OPENGLES2 && ctx->Version >= 31)) { + SET_DepthRangeArrayfvOES(exec, _mesa_DepthRangeArrayfvOES); + SET_DepthRangeIndexedfOES(exec, _mesa_DepthRangeIndexedfOES); + SET_PrimitiveBoundingBox(exec, _mesa_PrimitiveBoundingBox); + } if (_mesa_is_desktop_gl(ctx)) { SET_AttachObjectARB(exec, _mesa_AttachObjectARB); SET_BeginConditionalRender(exec, _mesa_BeginConditionalRender); @@ -164,6 +170,7 @@ SET_DepthBoundsEXT(exec, _mesa_DepthBoundsEXT); SET_DepthRange(exec, _mesa_DepthRange); SET_DetachObjectARB(exec, _mesa_DetachObjectARB); + SET_DispatchComputeGroupSizeARB(exec, _mesa_DispatchComputeGroupSizeARB); SET_DrawBuffer(exec, _mesa_DrawBuffer); SET_EndConditionalRender(exec, _mesa_EndConditionalRender); SET_EndPerfMonitorAMD(exec, _mesa_EndPerfMonitorAMD); @@ -178,7 +185,6 @@ SET_GetCompressedTextureSubImage(exec, _mesa_GetCompressedTextureSubImage); SET_GetDoublei_v(exec, _mesa_GetDoublei_v); SET_GetDoublev(exec, _mesa_GetDoublev); - SET_GetFloati_v(exec, _mesa_GetFloati_v); SET_GetHandleARB(exec, _mesa_GetHandleARB); SET_GetInfoLogARB(exec, _mesa_GetInfoLogARB); SET_GetObjectParameterfvARB(exec, _mesa_GetObjectParameterfvARB); @@ -403,6 +409,7 @@ SET_VertexAttribDivisor(exec, _mesa_VertexAttribDivisor); SET_VertexAttribIPointer(exec, _mesa_VertexAttribIPointer); SET_WaitSync(exec, _mesa_WaitSync); + SET_WindowRectanglesEXT(exec, _mesa_WindowRectanglesEXT); } if (_mesa_is_desktop_gl(ctx) || (ctx->API == API_OPENGLES2 && ctx->Version >= 31)) { SET_BindImageTexture(exec, _mesa_BindImageTexture); @@ -411,6 +418,7 @@ SET_DispatchCompute(exec, _mesa_DispatchCompute); SET_DispatchComputeIndirect(exec, _mesa_DispatchComputeIndirect); SET_GetBooleani_v(exec, _mesa_GetBooleani_v); + SET_GetFloati_v(exec, _mesa_GetFloati_v); SET_GetFramebufferParameteriv(exec, _mesa_GetFramebufferParameteriv); SET_GetMultisamplefv(exec, _mesa_GetMultisamplefv); SET_GetProgramInterfaceiv(exec, _mesa_GetProgramInterfaceiv); @@ -423,6 +431,7 @@ SET_GetTexLevelParameteriv(exec, _mesa_GetTexLevelParameteriv); SET_MemoryBarrier(exec, _mesa_MemoryBarrier); SET_MemoryBarrierByRegion(exec, _mesa_MemoryBarrierByRegion); + SET_PatchParameteri(exec, _mesa_PatchParameteri); SET_SampleMaski(exec, _mesa_SampleMaski); SET_TexStorage2DMultisample(exec, _mesa_TexStorage2DMultisample); SET_TexStorage3DMultisample(exec, _mesa_TexStorage3DMultisample); @@ -431,9 +440,6 @@ SET_VertexAttribIFormat(exec, _mesa_VertexAttribIFormat); SET_VertexBindingDivisor(exec, _mesa_VertexBindingDivisor); } - if (_mesa_is_desktop_gl(ctx) || (ctx->API == API_OPENGLES2 && ctx->Version >= 32)) { - SET_PatchParameteri(exec, _mesa_PatchParameteri); - } if (_mesa_is_desktop_gl(ctx) || ctx->API == API_OPENGLES) { SET_LogicOp(exec, _mesa_LogicOp); SET_PointParameterf(exec, _mesa_PointParameterf); @@ -512,7 +518,6 @@ SET_LineWidth(exec, _mesa_LineWidth); SET_MapBuffer(exec, _mesa_MapBuffer); SET_MapBufferRange(exec, _mesa_MapBufferRange); - SET_MultiDrawArrays(exec, _mesa_MultiDrawArrays); SET_ObjectLabel(exec, _mesa_ObjectLabel); SET_ObjectPtrLabel(exec, _mesa_ObjectPtrLabel); SET_PixelStorei(exec, _mesa_PixelStorei); @@ -543,6 +548,7 @@ SET_BindAttribLocation(exec, _mesa_BindAttribLocation); SET_BindProgramPipeline(exec, _mesa_BindProgramPipeline); SET_BindVertexArray(exec, _mesa_BindVertexArray); + SET_BlendBarrier(exec, _mesa_BlendBarrier); SET_BlendColor(exec, _mesa_BlendColor); SET_CompileShader(exec, _mesa_CompileShader); SET_CompressedTexImage3D(exec, _mesa_CompressedTexImage3D); @@ -1246,9 +1252,6 @@ SET_NamedFramebufferTextureLayer(exec, _mesa_NamedFramebufferTextureLayer); SET_NamedRenderbufferStorage(exec, _mesa_NamedRenderbufferStorage); SET_NamedRenderbufferStorageMultisample(exec, _mesa_NamedRenderbufferStorageMultisample); - SET_ScissorArrayv(exec, _mesa_ScissorArrayv); - SET_ScissorIndexed(exec, _mesa_ScissorIndexed); - SET_ScissorIndexedv(exec, _mesa_ScissorIndexedv); SET_TextureBuffer(exec, _mesa_TextureBuffer); SET_TextureBufferRange(exec, _mesa_TextureBufferRange); SET_TextureParameterIiv(exec, _mesa_TextureParameterIiv); @@ -1303,14 +1306,17 @@ SET_VertexAttribL4d(exec, _mesa_VertexAttribL4d); SET_VertexAttribL4dv(exec, _mesa_VertexAttribL4dv); SET_VertexAttribLPointer(exec, _mesa_VertexAttribLPointer); - SET_ViewportArrayv(exec, _mesa_ViewportArrayv); - SET_ViewportIndexedf(exec, _mesa_ViewportIndexedf); - SET_ViewportIndexedfv(exec, _mesa_ViewportIndexedfv); } if (ctx->API == API_OPENGL_CORE || (ctx->API == API_OPENGLES2 && ctx->Version >= 31)) { SET_FramebufferTexture(exec, _mesa_FramebufferTexture); + SET_ScissorArrayv(exec, _mesa_ScissorArrayv); + SET_ScissorIndexed(exec, _mesa_ScissorIndexed); + SET_ScissorIndexedv(exec, _mesa_ScissorIndexedv); SET_TexBuffer(exec, _mesa_TexBuffer); SET_TexBufferRange(exec, _mesa_TexBufferRange); + SET_ViewportArrayv(exec, _mesa_ViewportArrayv); + SET_ViewportIndexedf(exec, _mesa_ViewportIndexedf); + SET_ViewportIndexedfv(exec, _mesa_ViewportIndexedfv); } } diff -Nru mesa-12.0.6/src/mesa/main/api_validate.c mesa-17.0.7/src/mesa/main/api_validate.c --- mesa-12.0.6/src/mesa/main/api_validate.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/api_validate.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,14 +25,201 @@ #include #include "glheader.h" #include "api_validate.h" +#include "arrayobj.h" #include "bufferobj.h" #include "context.h" #include "imports.h" #include "mtypes.h" +#include "pipelineobj.h" #include "enums.h" -#include "vbo/vbo.h" +#include "state.h" #include "transformfeedback.h" -#include +#include "uniforms.h" +#include "vbo/vbo.h" +#include "program/prog_print.h" + + +static bool +check_blend_func_error(struct gl_context *ctx) +{ + /* The ARB_blend_func_extended spec's ERRORS section says: + * + * "The error INVALID_OPERATION is generated by Begin or any procedure + * that implicitly calls Begin if any draw buffer has a blend function + * requiring the second color input (SRC1_COLOR, ONE_MINUS_SRC1_COLOR, + * SRC1_ALPHA or ONE_MINUS_SRC1_ALPHA), and a framebuffer is bound that + * has more than the value of MAX_DUAL_SOURCE_DRAW_BUFFERS-1 active + * color attachements." + */ + for (unsigned i = ctx->Const.MaxDualSourceDrawBuffers; + i < ctx->DrawBuffer->_NumColorDrawBuffers; + i++) { + if (ctx->Color.Blend[i]._UsesDualSrc) { + _mesa_error(ctx, GL_INVALID_OPERATION, + "dual source blend on illegal attachment"); + return false; + } + } + + if (ctx->Color.BlendEnabled && ctx->Color._AdvancedBlendMode) { + /* The KHR_blend_equation_advanced spec says: + * + * "If any non-NONE draw buffer uses a blend equation found in table + * X.1 or X.2, the error INVALID_OPERATION is generated by Begin or + * any operation that implicitly calls Begin (such as DrawElements) + * if: + * + * * the draw buffer for color output zero selects multiple color + * buffers (e.g., FRONT_AND_BACK in the default framebuffer); or + * + * * the draw buffer for any other color output is not NONE." + */ + if (ctx->DrawBuffer->ColorDrawBuffer[0] == GL_FRONT_AND_BACK) { + _mesa_error(ctx, GL_INVALID_OPERATION, + "advanced blending is active and draw buffer for color " + "output zero selects multiple color buffers"); + return false; + } + + for (unsigned i = 1; i < ctx->DrawBuffer->_NumColorDrawBuffers; i++) { + if (ctx->DrawBuffer->ColorDrawBuffer[i] != GL_NONE) { + _mesa_error(ctx, GL_INVALID_OPERATION, + "advanced blending is active with multiple color " + "draw buffers"); + return false; + } + } + + /* The KHR_blend_equation_advanced spec says: + * + * "Advanced blending equations require the use of a fragment shader + * with a matching "blend_support" layout qualifier. If the current + * blend equation is found in table X.1 or X.2, and the active + * fragment shader does not include the layout qualifier matching + * the blend equation or "blend_support_all_equations", the error + * INVALID_OPERATION is generated [...]" + */ + const struct gl_program *prog = ctx->_Shader->_CurrentFragmentProgram; + const GLbitfield blend_support = !prog ? 0 : prog->sh.fs.BlendSupport; + + if ((blend_support & ctx->Color._AdvancedBlendMode) == 0) { + _mesa_error(ctx, GL_INVALID_OPERATION, + "fragment shader does not allow advanced blending mode " + "(%s)", + _mesa_enum_to_string(ctx->Color.Blend[0].EquationRGB)); + } + } + + return true; +} + + +/** + * Prior to drawing anything with glBegin, glDrawArrays, etc. this function + * is called to see if it's valid to render. This involves checking that + * the current shader is valid and the framebuffer is complete. + * It also check the current pipeline object is valid if any. + * If an error is detected it'll be recorded here. + * \return GL_TRUE if OK to render, GL_FALSE if not + */ +GLboolean +_mesa_valid_to_render(struct gl_context *ctx, const char *where) +{ + /* This depends on having up to date derived state (shaders) */ + if (ctx->NewState) + _mesa_update_state(ctx); + + if (ctx->API == API_OPENGL_COMPAT) { + /* Any shader stages that are not supplied by the GLSL shader and have + * assembly shaders enabled must now be validated. + */ + if (!ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX] + && ctx->VertexProgram.Enabled && !ctx->VertexProgram._Enabled) { + _mesa_error(ctx, GL_INVALID_OPERATION, + "%s(vertex program not valid)", where); + return GL_FALSE; + } + + if (!ctx->_Shader->CurrentProgram[MESA_SHADER_FRAGMENT]) { + if (ctx->FragmentProgram.Enabled && !ctx->FragmentProgram._Enabled) { + _mesa_error(ctx, GL_INVALID_OPERATION, + "%s(fragment program not valid)", where); + return GL_FALSE; + } + + /* If drawing to integer-valued color buffers, there must be an + * active fragment shader (GL_EXT_texture_integer). + */ + if (ctx->DrawBuffer && ctx->DrawBuffer->_IntegerBuffers) { + _mesa_error(ctx, GL_INVALID_OPERATION, + "%s(integer format but no fragment shader)", where); + return GL_FALSE; + } + } + } + + /* A pipeline object is bound */ + if (ctx->_Shader->Name && !ctx->_Shader->Validated) { + if (!_mesa_validate_program_pipeline(ctx, ctx->_Shader)) { + _mesa_error(ctx, GL_INVALID_OPERATION, + "glValidateProgramPipeline failed to validate the " + "pipeline"); + return GL_FALSE; + } + } + + /* If a program is active and SSO not in use, check if validation of + * samplers succeeded for the active program. */ + if (ctx->_Shader->ActiveProgram && ctx->_Shader != ctx->Pipeline.Current) { + char errMsg[100]; + if (!_mesa_sampler_uniforms_are_valid(ctx->_Shader->ActiveProgram, + errMsg, 100)) { + _mesa_error(ctx, GL_INVALID_OPERATION, "%s", errMsg); + return GL_FALSE; + } + } + + if (ctx->DrawBuffer->_Status != GL_FRAMEBUFFER_COMPLETE_EXT) { + _mesa_error(ctx, GL_INVALID_FRAMEBUFFER_OPERATION_EXT, + "%s(incomplete framebuffer)", where); + return GL_FALSE; + } + + if (!check_blend_func_error(ctx)) { + return GL_FALSE; + } + +#ifdef DEBUG + if (ctx->_Shader->Flags & GLSL_LOG) { + struct gl_shader_program **shProg = ctx->_Shader->CurrentProgram; + gl_shader_stage i; + + for (i = 0; i < MESA_SHADER_STAGES; i++) { + if (shProg[i] == NULL || shProg[i]->_LinkedShaders[i] == NULL || + shProg[i]->_LinkedShaders[i]->Program->_Used) + continue; + + /* This is the first time this shader is being used. + * Append shader's constants/uniforms to log file. + * + * Only log data for the program target that matches the shader + * target. It's possible to have a program bound to the vertex + * shader target that also supplied a fragment shader. If that + * program isn't also bound to the fragment shader target we don't + * want to log its fragment data. + */ + _mesa_append_uniforms_to_file(shProg[i]->_LinkedShaders[i]->Program); + } + + for (i = 0; i < MESA_SHADER_STAGES; i++) { + if (shProg[i] != NULL && shProg[i]->_LinkedShaders[i] != NULL) + shProg[i]->_LinkedShaders[i]->Program->_Used = GL_TRUE; + } + } +#endif + + return GL_TRUE; +} /** @@ -45,6 +232,38 @@ return false; } + if (!_mesa_all_buffers_are_unmapped(ctx->Array.VAO)) { + _mesa_error(ctx, GL_INVALID_OPERATION, + "%s(vertex buffers are mapped)", function); + return false; + } + + /* Section 11.2 (Tessellation) of the ES 3.2 spec says: + * + * "An INVALID_OPERATION error is generated by any command that + * transfers vertices to the GL if the current program state has + * one but not both of a tessellation control shader and tessellation + * evaluation shader." + * + * The OpenGL spec argues that this is allowed because a tess ctrl shader + * without a tess eval shader can be used with transform feedback. + * However, glBeginTransformFeedback doesn't allow GL_PATCHES and + * therefore doesn't allow tessellation. + * + * Further investigation showed that this is indeed a spec bug and + * a tess ctrl shader without a tess eval shader shouldn't have been + * allowed, because there is no API in GL 4.0 that can make use this + * to produce something useful. + * + * Also, all vendors except one don't support a tess ctrl shader without + * a tess eval shader anyway. + */ + if (ctx->TessCtrlProgram._Current && !ctx->TessEvalProgram._Current) { + _mesa_error(ctx, GL_INVALID_OPERATION, + "%s(tess eval shader is missing)", function); + return false; + } + switch (ctx->API) { case API_OPENGLES2: /* For ES2, we can draw if we have a vertex program/shader). */ @@ -54,7 +273,7 @@ /* For OpenGL ES, only draw if we have vertex positions */ if (!ctx->Array.VAO->VertexAttrib[VERT_ATTRIB_POS].Enabled) - return false; + return false; break; case API_OPENGL_CORE: @@ -69,25 +288,6 @@ return false; } - /* The spec argues that this is allowed because a tess ctrl shader - * without a tess eval shader can be used with transform feedback. - * However, glBeginTransformFeedback doesn't allow GL_PATCHES and - * therefore doesn't allow tessellation. - * - * Further investigation showed that this is indeed a spec bug and - * a tess ctrl shader without a tess eval shader shouldn't have been - * allowed, because there is no API in GL 4.0 that can make use this - * to produce something useful. - * - * Also, all vendors except one don't support a tess ctrl shader without - * a tess eval shader anyway. - */ - if (ctx->TessCtrlProgram._Current && !ctx->TessEvalProgram._Current) { - _mesa_error(ctx, GL_INVALID_OPERATION, - "%s(tess eval shader is missing)", function); - return false; - } - /* Section 7.3 (Program Objects) of the OpenGL 4.5 Core Profile spec * says: * @@ -200,15 +400,18 @@ */ if (ctx->_Shader->CurrentProgram[MESA_SHADER_GEOMETRY]) { const GLenum geom_mode = - ctx->_Shader->CurrentProgram[MESA_SHADER_GEOMETRY]->Geom.InputType; + ctx->_Shader->CurrentProgram[MESA_SHADER_GEOMETRY]-> + _LinkedShaders[MESA_SHADER_GEOMETRY]->info.Geom.InputType; struct gl_shader_program *tes = ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_EVAL]; GLenum mode_before_gs = mode; if (tes) { - if (tes->TessEval.PointMode) + struct gl_linked_shader *tes_sh = + tes->_LinkedShaders[MESA_SHADER_TESS_EVAL]; + if (tes_sh->info.TessEval.PointMode) mode_before_gs = GL_POINTS; - else if (tes->TessEval.PrimitiveMode == GL_ISOLINES) + else if (tes_sh->info.TessEval.PrimitiveMode == GL_ISOLINES) mode_before_gs = GL_LINES; else /* the GL_QUADS mode generates triangles too */ @@ -304,7 +507,9 @@ GLboolean pass = GL_TRUE; if(ctx->_Shader->CurrentProgram[MESA_SHADER_GEOMETRY]) { - switch (ctx->_Shader->CurrentProgram[MESA_SHADER_GEOMETRY]->Geom.OutputType) { + switch (ctx->_Shader->CurrentProgram[MESA_SHADER_GEOMETRY]-> + _LinkedShaders[MESA_SHADER_GEOMETRY]-> + info.Geom.OutputType) { case GL_POINTS: pass = ctx->TransformFeedback.Mode == GL_POINTS; break; @@ -321,10 +526,11 @@ else if (ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_EVAL]) { struct gl_shader_program *tes = ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_EVAL]; - - if (tes->TessEval.PointMode) + struct gl_linked_shader *tes_sh = + tes->_LinkedShaders[MESA_SHADER_TESS_EVAL]; + if (tes_sh->info.TessEval.PointMode) pass = ctx->TransformFeedback.Mode == GL_POINTS; - else if (tes->TessEval.PrimitiveMode == GL_ISOLINES) + else if (tes_sh->info.TessEval.PrimitiveMode == GL_ISOLINES) pass = ctx->TransformFeedback.Mode == GL_LINES; else pass = ctx->TransformFeedback.Mode == GL_TRIANGLES; @@ -346,10 +552,52 @@ } if (!pass) { _mesa_error(ctx, GL_INVALID_OPERATION, - "%s(mode=%s vs transform feedback %s)", - name, - _mesa_lookup_prim_by_nr(mode), - _mesa_lookup_prim_by_nr(ctx->TransformFeedback.Mode)); + "%s(mode=%s vs transform feedback %s)", + name, + _mesa_lookup_prim_by_nr(mode), + _mesa_lookup_prim_by_nr(ctx->TransformFeedback.Mode)); + return GL_FALSE; + } + } + + /* From GL_INTEL_conservative_rasterization spec: + * + * The conservative rasterization option applies only to polygons with + * PolygonMode state set to FILL. Draw requests for polygons with different + * PolygonMode setting or for other primitive types (points/lines) generate + * INVALID_OPERATION error. + */ + if (ctx->IntelConservativeRasterization) { + GLboolean pass = GL_TRUE; + + switch (mode) { + case GL_POINTS: + case GL_LINES: + case GL_LINE_LOOP: + case GL_LINE_STRIP: + case GL_LINES_ADJACENCY: + case GL_LINE_STRIP_ADJACENCY: + pass = GL_FALSE; + break; + case GL_TRIANGLES: + case GL_TRIANGLE_STRIP: + case GL_TRIANGLE_FAN: + case GL_QUADS: + case GL_QUAD_STRIP: + case GL_POLYGON: + case GL_TRIANGLES_ADJACENCY: + case GL_TRIANGLE_STRIP_ADJACENCY: + if (ctx->Polygon.FrontMode != GL_FILL || + ctx->Polygon.BackMode != GL_FILL) + pass = GL_FALSE; + break; + default: + pass = GL_FALSE; + } + if (!pass) { + _mesa_error(ctx, GL_INVALID_OPERATION, + "mode=%s invalid with GL_INTEL_conservative_rasterization", + _mesa_lookup_prim_by_nr(mode)); return GL_FALSE; } } @@ -384,12 +632,30 @@ const GLvoid *indices, const char *caller) { - /* From the GLES3 specification, section 2.14.2 (Transform Feedback - * Primitive Capture): + /* Section 2.14.2 (Transform Feedback Primitive Capture) of the OpenGL ES + * 3.1 spec says: * * The error INVALID_OPERATION is also generated by DrawElements, * DrawElementsInstanced, and DrawRangeElements while transform feedback * is active and not paused, regardless of mode. + * + * The OES_geometry_shader_spec says: + * + * Issues: + * + * ... + * + * (13) Does this extension change how transform feedback operates + * compared to unextended OpenGL ES 3.0 or 3.1? + * + * RESOLVED: Yes... Since we no longer require being able to predict how + * much geometry will be generated, we also lift the restriction that + * only DrawArray* commands are supported and also support the + * DrawElements* commands for transform feedback. + * + * This should also be reflected in the body of the spec, but that appears + * to have been overlooked. The body of the spec only explicitly allows + * the indirect versions. */ if (_mesa_is_gles3(ctx) && !ctx->Extensions.OES_geometry_shader && _mesa_is_xfb_active_and_unpaused(ctx)) { @@ -431,8 +697,8 @@ */ GLboolean _mesa_validate_DrawElements(struct gl_context *ctx, - GLenum mode, GLsizei count, GLenum type, - const GLvoid *indices) + GLenum mode, GLsizei count, GLenum type, + const GLvoid *indices) { FLUSH_CURRENT(ctx, 0); @@ -450,12 +716,32 @@ _mesa_validate_MultiDrawElements(struct gl_context *ctx, GLenum mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, - GLuint primcount) + GLsizei primcount) { - unsigned i; + GLsizei i; FLUSH_CURRENT(ctx, 0); + /* + * Section 2.3.1 (Errors) of the OpenGL 4.5 (Core Profile) spec says: + * + * "If a negative number is provided where an argument of type sizei or + * sizeiptr is specified, an INVALID_VALUE error is generated." + * + * and in the same section: + * + * "In other cases, there are no side effects unless otherwise noted; + * the command which generates the error is ignored so that it has no + * effect on GL state or framebuffer contents." + * + * Hence, check both primcount and all the count[i]. + */ + if (primcount < 0) { + _mesa_error(ctx, GL_INVALID_VALUE, + "glMultiDrawElements(primcount=%d)", primcount); + return GL_FALSE; + } + for (i = 0; i < primcount; i++) { if (count[i] < 0) { _mesa_error(ctx, GL_INVALID_VALUE, @@ -494,9 +780,9 @@ */ GLboolean _mesa_validate_DrawRangeElements(struct gl_context *ctx, GLenum mode, - GLuint start, GLuint end, - GLsizei count, GLenum type, - const GLvoid *indices) + GLuint start, GLuint end, + GLsizei count, GLenum type, + const GLvoid *indices) { FLUSH_CURRENT(ctx, 0); @@ -510,30 +796,9 @@ } -/** - * Called from the tnl module to error check the function parameters and - * verify that we really can draw something. - * \return GL_TRUE if OK to render, GL_FALSE if error found - */ -GLboolean -_mesa_validate_DrawArrays(struct gl_context *ctx, GLenum mode, GLsizei count) +static bool +need_xfb_remaining_prims_check(const struct gl_context *ctx) { - struct gl_transform_feedback_object *xfb_obj - = ctx->TransformFeedback.CurrentObject; - FLUSH_CURRENT(ctx, 0); - - if (count < 0) { - _mesa_error(ctx, GL_INVALID_VALUE, "glDrawArrays(count)" ); - return GL_FALSE; - } - - if (!_mesa_valid_prim_mode(ctx, mode, "glDrawArrays")) { - return GL_FALSE; - } - - if (!check_valid_to_render(ctx, "glDrawArrays")) - return GL_FALSE; - /* From the GLES3 specification, section 2.14.2 (Transform Feedback * Primitive Capture): * @@ -546,21 +811,71 @@ * * This is in contrast to the behaviour of desktop GL, where the extra * primitives are silently dropped from the transform feedback buffer. - */ - if (_mesa_is_gles3(ctx) && _mesa_is_xfb_active_and_unpaused(ctx)) { - size_t prim_count = vbo_count_tessellated_primitives(mode, count, 1); + * + * This text is removed in ES 3.2, presumably because it's not really + * implementable with geometry and tessellation shaders. In fact, + * the OES_geometry_shader spec says: + * + * "(13) Does this extension change how transform feedback operates + * compared to unextended OpenGL ES 3.0 or 3.1? + * + * RESOLVED: Yes. Because dynamic geometry amplification in a geometry + * shader can make it difficult if not impossible to predict the amount + * of geometry that may be generated in advance of executing the shader, + * the draw-time error for transform feedback buffer overflow conditions + * is removed and replaced with the GL behavior (primitives are not + * written and the corresponding counter is not updated)..." + */ + return _mesa_is_gles3(ctx) && _mesa_is_xfb_active_and_unpaused(ctx) && + !_mesa_has_OES_geometry_shader(ctx) && + !_mesa_has_OES_tessellation_shader(ctx); +} + + +static bool +validate_draw_arrays(struct gl_context *ctx, const char *func, + GLenum mode, GLsizei count, GLsizei numInstances) +{ + FLUSH_CURRENT(ctx, 0); + + if (count < 0) { + _mesa_error(ctx, GL_INVALID_VALUE, "%s(count)", func); + return false; + } + + if (!_mesa_valid_prim_mode(ctx, mode, func)) + return false; + + if (!check_valid_to_render(ctx, func)) + return false; + + if (need_xfb_remaining_prims_check(ctx)) { + struct gl_transform_feedback_object *xfb_obj + = ctx->TransformFeedback.CurrentObject; + size_t prim_count = vbo_count_tessellated_primitives(mode, count, numInstances); if (xfb_obj->GlesRemainingPrims < prim_count) { _mesa_error(ctx, GL_INVALID_OPERATION, - "glDrawArrays(exceeds transform feedback size)"); - return GL_FALSE; + "%s(exceeds transform feedback size)", func); + return false; } xfb_obj->GlesRemainingPrims -= prim_count; } if (count == 0) - return GL_FALSE; + return false; - return GL_TRUE; + return true; +} + +/** + * Called from the tnl module to error check the function parameters and + * verify that we really can draw something. + * \return GL_TRUE if OK to render, GL_FALSE if error found + */ +GLboolean +_mesa_validate_DrawArrays(struct gl_context *ctx, GLenum mode, GLsizei count) +{ + return validate_draw_arrays(ctx, "glDrawArrays", mode, count, 1); } @@ -568,23 +883,9 @@ _mesa_validate_DrawArraysInstanced(struct gl_context *ctx, GLenum mode, GLint first, GLsizei count, GLsizei numInstances) { - struct gl_transform_feedback_object *xfb_obj - = ctx->TransformFeedback.CurrentObject; - FLUSH_CURRENT(ctx, 0); - - if (count < 0) { - _mesa_error(ctx, GL_INVALID_VALUE, - "glDrawArraysInstanced(count=%d)", count); - return GL_FALSE; - } - if (first < 0) { _mesa_error(ctx, GL_INVALID_VALUE, - "glDrawArraysInstanced(start=%d)", first); - return GL_FALSE; - } - - if (!_mesa_valid_prim_mode(ctx, mode, "glDrawArraysInstanced")) { + "glDrawArraysInstanced(start=%d)", first); return GL_FALSE; } @@ -595,37 +896,61 @@ return GL_FALSE; } - if (!check_valid_to_render(ctx, "glDrawArraysInstanced(invalid to render)")) - return GL_FALSE; + return validate_draw_arrays(ctx, "glDrawArraysInstanced", mode, count, 1); +} - /* From the GLES3 specification, section 2.14.2 (Transform Feedback - * Primitive Capture): - * - * The error INVALID_OPERATION is generated by DrawArrays and - * DrawArraysInstanced if recording the vertices of a primitive to the - * buffer objects being used for transform feedback purposes would result - * in either exceeding the limits of any buffer object’s size, or in - * exceeding the end position offset + size − 1, as set by - * BindBufferRange. - * - * This is in contrast to the behaviour of desktop GL, where the extra - * primitives are silently dropped from the transform feedback buffer. - */ - if (_mesa_is_gles3(ctx) && _mesa_is_xfb_active_and_unpaused(ctx)) { - size_t prim_count - = vbo_count_tessellated_primitives(mode, count, numInstances); - if (xfb_obj->GlesRemainingPrims < prim_count) { - _mesa_error(ctx, GL_INVALID_OPERATION, - "glDrawArraysInstanced(exceeds transform feedback size)"); - return GL_FALSE; + +/** + * Called to error check the function parameters. + * + * Note that glMultiDrawArrays is not part of GLES, so there's limited scope + * for sharing code with the validation of glDrawArrays. + */ +bool +_mesa_validate_MultiDrawArrays(struct gl_context *ctx, GLenum mode, + const GLsizei *count, GLsizei primcount) +{ + int i; + + FLUSH_CURRENT(ctx, 0); + + if (!_mesa_valid_prim_mode(ctx, mode, "glMultiDrawArrays")) + return false; + + if (!check_valid_to_render(ctx, "glMultiDrawArrays")) + return false; + + if (primcount < 0) { + _mesa_error(ctx, GL_INVALID_VALUE, "glMultiDrawArrays(primcount=%d)", + primcount); + return false; + } + + for (i = 0; i < primcount; ++i) { + if (count[i] < 0) { + _mesa_error(ctx, GL_INVALID_VALUE, "glMultiDrawArrays(count[%d]=%d)", + i, count[i]); + return false; } - xfb_obj->GlesRemainingPrims -= prim_count; } - if (count == 0) - return GL_FALSE; + if (need_xfb_remaining_prims_check(ctx)) { + struct gl_transform_feedback_object *xfb_obj + = ctx->TransformFeedback.CurrentObject; + size_t xfb_prim_count = 0; - return GL_TRUE; + for (i = 0; i < primcount; ++i) + xfb_prim_count += vbo_count_tessellated_primitives(mode, count[i], 1); + + if (xfb_obj->GlesRemainingPrims < xfb_prim_count) { + _mesa_error(ctx, GL_INVALID_OPERATION, + "glMultiDrawArrays(exceeds transform feedback size)"); + return false; + } + xfb_obj->GlesRemainingPrims -= xfb_prim_count; + } + + return true; } @@ -729,7 +1054,7 @@ * buffer bound. */ if (_mesa_is_gles31(ctx) && - ctx->Array.VAO->_Enabled != ctx->Array.VAO->VertexAttribBufferMask) { + ctx->Array.VAO->_Enabled & ~ctx->Array.VAO->VertexAttribBufferMask) { _mesa_error(ctx, GL_INVALID_OPERATION, "%s(No VBO bound)", name); return GL_FALSE; } @@ -741,6 +1066,17 @@ * * "An INVALID_OPERATION error is generated if * transform feedback is active and not paused." + * + * The OES_geometry_shader spec says: + * + * On p. 250 in the errors section for the DrawArraysIndirect command, + * and on p. 254 in the errors section for the DrawElementsIndirect + * command, delete the errors which state: + * + * "An INVALID_OPERATION error is generated if transform feedback is + * active and not paused." + * + * (thus allowing transform feedback to work with indirect draw commands). */ if (_mesa_is_gles31(ctx) && !ctx->Extensions.OES_geometry_shader && _mesa_is_xfb_active_and_unpaused(ctx)) { @@ -1078,6 +1414,7 @@ _mesa_validate_DispatchCompute(struct gl_context *ctx, const GLuint *num_groups) { + struct gl_shader_program *prog; int i; FLUSH_CURRENT(ctx, 0); @@ -1110,6 +1447,101 @@ } } + /* The ARB_compute_variable_group_size spec says: + * + * "An INVALID_OPERATION error is generated by DispatchCompute if the active + * program for the compute shader stage has a variable work group size." + */ + prog = ctx->_Shader->CurrentProgram[MESA_SHADER_COMPUTE]; + if (prog->Comp.LocalSizeVariable) { + _mesa_error(ctx, GL_INVALID_OPERATION, + "glDispatchCompute(variable work group size forbidden)"); + return GL_FALSE; + } + + return GL_TRUE; +} + +GLboolean +_mesa_validate_DispatchComputeGroupSizeARB(struct gl_context *ctx, + const GLuint *num_groups, + const GLuint *group_size) +{ + struct gl_shader_program *prog; + GLuint total_invocations = 1; + int i; + + FLUSH_CURRENT(ctx, 0); + + if (!check_valid_to_compute(ctx, "glDispatchComputeGroupSizeARB")) + return GL_FALSE; + + /* The ARB_compute_variable_group_size spec says: + * + * "An INVALID_OPERATION error is generated by + * DispatchComputeGroupSizeARB if the active program for the compute + * shader stage has a fixed work group size." + */ + prog = ctx->_Shader->CurrentProgram[MESA_SHADER_COMPUTE]; + if (!prog->Comp.LocalSizeVariable) { + _mesa_error(ctx, GL_INVALID_OPERATION, + "glDispatchComputeGroupSizeARB(fixed work group size " + "forbidden)"); + return GL_FALSE; + } + + for (i = 0; i < 3; i++) { + /* The ARB_compute_variable_group_size spec says: + * + * "An INVALID_VALUE error is generated if any of num_groups_x, + * num_groups_y and num_groups_z are greater than or equal to the + * maximum work group count for the corresponding dimension." + */ + if (num_groups[i] > ctx->Const.MaxComputeWorkGroupCount[i]) { + _mesa_error(ctx, GL_INVALID_VALUE, + "glDispatchComputeGroupSizeARB(num_groups_%c)", 'x' + i); + return GL_FALSE; + } + + /* The ARB_compute_variable_group_size spec says: + * + * "An INVALID_VALUE error is generated by DispatchComputeGroupSizeARB if + * any of , , or is less than + * or equal to zero or greater than the maximum local work group size + * for compute shaders with variable group size + * (MAX_COMPUTE_VARIABLE_GROUP_SIZE_ARB) in the corresponding + * dimension." + * + * However, the "less than" is a spec bug because they are declared as + * unsigned integers. + */ + if (group_size[i] == 0 || + group_size[i] > ctx->Const.MaxComputeVariableGroupSize[i]) { + _mesa_error(ctx, GL_INVALID_VALUE, + "glDispatchComputeGroupSizeARB(group_size_%c)", 'x' + i); + return GL_FALSE; + } + + total_invocations *= group_size[i]; + } + + /* The ARB_compute_variable_group_size spec says: + * + * "An INVALID_VALUE error is generated by DispatchComputeGroupSizeARB if + * the product of , , and exceeds + * the implementation-dependent maximum local work group invocation count + * for compute shaders with variable group size + * (MAX_COMPUTE_VARIABLE_GROUP_INVOCATIONS_ARB)." + */ + if (total_invocations > ctx->Const.MaxComputeVariableGroupInvocations) { + _mesa_error(ctx, GL_INVALID_VALUE, + "glDispatchComputeGroupSizeARB(product of local_sizes " + "exceeds MAX_COMPUTE_VARIABLE_GROUP_INVOCATIONS_ARB " + "(%d > %d))", total_invocations, + ctx->Const.MaxComputeVariableGroupInvocations); + return GL_FALSE; + } + return GL_TRUE; } @@ -1119,6 +1551,7 @@ GLsizei size, const char *name) { const uint64_t end = (uint64_t) indirect + size; + struct gl_shader_program *prog; if (!check_valid_to_compute(ctx, name)) return GL_FALSE; @@ -1164,6 +1597,18 @@ return GL_FALSE; } + /* The ARB_compute_variable_group_size spec says: + * + * "An INVALID_OPERATION error is generated if the active program for the + * compute shader stage has a variable work group size." + */ + prog = ctx->_Shader->CurrentProgram[MESA_SHADER_COMPUTE]; + if (prog->Comp.LocalSizeVariable) { + _mesa_error(ctx, GL_INVALID_OPERATION, + "%s(variable work group size forbidden)", name); + return GL_FALSE; + } + return GL_TRUE; } diff -Nru mesa-12.0.6/src/mesa/main/api_validate.h mesa-17.0.7/src/mesa/main/api_validate.h --- mesa-12.0.6/src/mesa/main/api_validate.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/api_validate.h 2017-06-01 10:37:10.000000000 +0000 @@ -35,6 +35,9 @@ struct gl_transform_feedback_object; +extern GLboolean +_mesa_valid_to_render(struct gl_context *ctx, const char *where); + extern bool _mesa_is_valid_prim_mode(struct gl_context *ctx, GLenum mode); @@ -45,6 +48,10 @@ extern GLboolean _mesa_validate_DrawArrays(struct gl_context *ctx, GLenum mode, GLsizei count); +extern bool +_mesa_validate_MultiDrawArrays(struct gl_context *ctx, GLenum mode, + const GLsizei *count, GLsizei primcount); + extern GLboolean _mesa_validate_DrawElements(struct gl_context *ctx, GLenum mode, GLsizei count, GLenum type, @@ -54,7 +61,7 @@ _mesa_validate_MultiDrawElements(struct gl_context *ctx, GLenum mode, const GLsizei *count, GLenum type, const GLvoid * const *indices, - GLuint primcount); + GLsizei primcount); extern GLboolean _mesa_validate_DrawRangeElements(struct gl_context *ctx, GLenum mode, @@ -129,5 +136,9 @@ _mesa_validate_DispatchComputeIndirect(struct gl_context *ctx, GLintptr indirect); +extern GLboolean +_mesa_validate_DispatchComputeGroupSizeARB(struct gl_context *ctx, + const GLuint *num_groups, + const GLuint *group_size); #endif diff -Nru mesa-12.0.6/src/mesa/main/arbprogram.c mesa-17.0.7/src/mesa/main/arbprogram.c --- mesa-12.0.6/src/mesa/main/arbprogram.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/arbprogram.c 2017-06-01 10:37:10.000000000 +0000 @@ -36,11 +36,11 @@ #include "main/macros.h" #include "main/mtypes.h" #include "main/arbprogram.h" +#include "main/shaderapi.h" #include "program/arbprogparse.h" #include "program/program.h" #include "program/prog_print.h" - /** * Bind a program (make it current) * \note Called from the GL API dispatcher by both glBindProgramNV @@ -54,11 +54,11 @@ /* Error-check target and get curProg */ if (target == GL_VERTEX_PROGRAM_ARB && ctx->Extensions.ARB_vertex_program) { - curProg = &ctx->VertexProgram.Current->Base; + curProg = ctx->VertexProgram.Current; } else if (target == GL_FRAGMENT_PROGRAM_ARB && ctx->Extensions.ARB_fragment_program) { - curProg = &ctx->FragmentProgram.Current->Base; + curProg = ctx->FragmentProgram.Current; } else { _mesa_error(ctx, GL_INVALID_ENUM, "glBindProgramARB(target)"); @@ -74,16 +74,16 @@ /* Bind a default program */ newProg = NULL; if (target == GL_VERTEX_PROGRAM_ARB) - newProg = &ctx->Shared->DefaultVertexProgram->Base; + newProg = ctx->Shared->DefaultVertexProgram; else - newProg = &ctx->Shared->DefaultFragmentProgram->Base; + newProg = ctx->Shared->DefaultFragmentProgram; } else { /* Bind a user program */ newProg = _mesa_lookup_program(ctx, id); if (!newProg || newProg == &_mesa_DummyProgram) { /* allocate a new program now */ - newProg = ctx->Driver.NewProgram(ctx, target, id); + newProg = ctx->Driver.NewProgram(ctx, target, id, true); if (!newProg) { _mesa_error(ctx, GL_OUT_OF_MEMORY, "glBindProgramARB"); return; @@ -109,12 +109,10 @@ /* bind newProg */ if (target == GL_VERTEX_PROGRAM_ARB) { - _mesa_reference_vertprog(ctx, &ctx->VertexProgram.Current, - gl_vertex_program(newProg)); + _mesa_reference_program(ctx, &ctx->VertexProgram.Current, newProg); } else if (target == GL_FRAGMENT_PROGRAM_ARB) { - _mesa_reference_fragprog(ctx, &ctx->FragmentProgram.Current, - gl_fragment_program(newProg)); + _mesa_reference_program(ctx, &ctx->FragmentProgram.Current, newProg); } /* Never null pointers */ @@ -155,14 +153,14 @@ switch (prog->Target) { case GL_VERTEX_PROGRAM_ARB: if (ctx->VertexProgram.Current && - ctx->VertexProgram.Current->Base.Id == ids[i]) { + ctx->VertexProgram.Current->Id == ids[i]) { /* unbind this currently bound program */ _mesa_BindProgramARB(prog->Target, 0); } break; case GL_FRAGMENT_PROGRAM_ARB: if (ctx->FragmentProgram.Current && - ctx->FragmentProgram.Current->Base.Id == ids[i]) { + ctx->FragmentProgram.Current->Id == ids[i]) { /* unbind this currently bound program */ _mesa_BindProgramARB(prog->Target, 0); } @@ -252,12 +250,12 @@ if (target == GL_VERTEX_PROGRAM_ARB && ctx->Extensions.ARB_vertex_program) { - prog = &(ctx->VertexProgram.Current->Base); + prog = ctx->VertexProgram.Current; maxParams = ctx->Const.Program[MESA_SHADER_VERTEX].MaxLocalParams; } else if (target == GL_FRAGMENT_PROGRAM_ARB && ctx->Extensions.ARB_fragment_program) { - prog = &(ctx->FragmentProgram.Current->Base); + prog = ctx->FragmentProgram.Current; maxParams = ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxLocalParams; } else { @@ -271,13 +269,14 @@ return GL_FALSE; } - if (!prog->LocalParams) { - prog->LocalParams = calloc(maxParams, sizeof(float[4])); - if (!prog->LocalParams) + if (!prog->arb.LocalParams) { + prog->arb.LocalParams = rzalloc_array_size(prog, sizeof(float[4]), + maxParams); + if (!prog->arb.LocalParams) return GL_FALSE; } - *param = prog->LocalParams[index]; + *param = prog->arb.LocalParams[index]; return GL_TRUE; } @@ -313,7 +312,7 @@ _mesa_ProgramStringARB(GLenum target, GLenum format, GLsizei len, const GLvoid *string) { - struct gl_program *base; + struct gl_program *prog; bool failed; GET_CURRENT_CONTEXT(ctx); @@ -331,17 +330,13 @@ } if (target == GL_VERTEX_PROGRAM_ARB && ctx->Extensions.ARB_vertex_program) { - struct gl_vertex_program *prog = ctx->VertexProgram.Current; + prog = ctx->VertexProgram.Current; _mesa_parse_arb_vertex_program(ctx, target, string, len, prog); - - base = & prog->Base; } else if (target == GL_FRAGMENT_PROGRAM_ARB && ctx->Extensions.ARB_fragment_program) { - struct gl_fragment_program *prog = ctx->FragmentProgram.Current; + prog = ctx->FragmentProgram.Current; _mesa_parse_arb_fragment_program(ctx, target, string, len, prog); - - base = & prog->Base; } else { _mesa_error(ctx, GL_INVALID_ENUM, "glProgramStringARB(target)"); @@ -352,7 +347,7 @@ if (!failed) { /* finally, give the program to the driver for translation/checking */ - if (!ctx->Driver.ProgramStringNotify(ctx, target, base)) { + if (!ctx->Driver.ProgramStringNotify(ctx, target, prog)) { failed = true; _mesa_error(ctx, GL_INVALID_OPERATION, "glProgramStringARB(rejected by driver"); @@ -364,20 +359,42 @@ target == GL_FRAGMENT_PROGRAM_ARB ? "fragment" : "vertex"; fprintf(stderr, "ARB_%s_program source for program %d:\n", - shader_type, base->Id); + shader_type, prog->Id); fprintf(stderr, "%s\n", (const char *) string); if (failed) { fprintf(stderr, "ARB_%s_program %d failed to compile.\n", - shader_type, base->Id); + shader_type, prog->Id); } else { fprintf(stderr, "Mesa IR for ARB_%s_program %d:\n", - shader_type, base->Id); - _mesa_print_program(base); + shader_type, prog->Id); + _mesa_print_program(prog); fprintf(stderr, "\n"); } fflush(stderr); } + + /* Capture vp-*.shader_test/fp-*.shader_test files. */ + const char *capture_path = _mesa_get_shader_capture_path(); + if (capture_path != NULL) { + FILE *file; + const char *shader_type = + target == GL_FRAGMENT_PROGRAM_ARB ? "fragment" : "vertex"; + char *filename = + ralloc_asprintf(NULL, "%s/%cp-%u.shader_test", + capture_path, shader_type[0], prog->Id); + + file = fopen(filename, "w"); + if (file) { + fprintf(file, + "[require]\nGL_ARB_%s_program\n\n[%s program]\n%s\n", + shader_type, shader_type, (const char *) string); + fclose(file); + } else { + _mesa_warning(ctx, "Failed to open %s", filename); + } + ralloc_free(filename); + } } @@ -631,12 +648,12 @@ if (target == GL_VERTEX_PROGRAM_ARB && ctx->Extensions.ARB_vertex_program) { - prog = &(ctx->VertexProgram.Current->Base); + prog = ctx->VertexProgram.Current; limits = &ctx->Const.Program[MESA_SHADER_VERTEX]; } else if (target == GL_FRAGMENT_PROGRAM_ARB && ctx->Extensions.ARB_fragment_program) { - prog = &(ctx->FragmentProgram.Current->Base); + prog = ctx->FragmentProgram.Current; limits = &ctx->Const.Program[MESA_SHADER_FRAGMENT]; } else { @@ -660,61 +677,61 @@ *params = prog->Id; return; case GL_PROGRAM_INSTRUCTIONS_ARB: - *params = prog->NumInstructions; + *params = prog->arb.NumInstructions; return; case GL_MAX_PROGRAM_INSTRUCTIONS_ARB: *params = limits->MaxInstructions; return; case GL_PROGRAM_NATIVE_INSTRUCTIONS_ARB: - *params = prog->NumNativeInstructions; + *params = prog->arb.NumNativeInstructions; return; case GL_MAX_PROGRAM_NATIVE_INSTRUCTIONS_ARB: *params = limits->MaxNativeInstructions; return; case GL_PROGRAM_TEMPORARIES_ARB: - *params = prog->NumTemporaries; + *params = prog->arb.NumTemporaries; return; case GL_MAX_PROGRAM_TEMPORARIES_ARB: *params = limits->MaxTemps; return; case GL_PROGRAM_NATIVE_TEMPORARIES_ARB: - *params = prog->NumNativeTemporaries; + *params = prog->arb.NumNativeTemporaries; return; case GL_MAX_PROGRAM_NATIVE_TEMPORARIES_ARB: *params = limits->MaxNativeTemps; return; case GL_PROGRAM_PARAMETERS_ARB: - *params = prog->NumParameters; + *params = prog->arb.NumParameters; return; case GL_MAX_PROGRAM_PARAMETERS_ARB: *params = limits->MaxParameters; return; case GL_PROGRAM_NATIVE_PARAMETERS_ARB: - *params = prog->NumNativeParameters; + *params = prog->arb.NumNativeParameters; return; case GL_MAX_PROGRAM_NATIVE_PARAMETERS_ARB: *params = limits->MaxNativeParameters; return; case GL_PROGRAM_ATTRIBS_ARB: - *params = prog->NumAttributes; + *params = prog->arb.NumAttributes; return; case GL_MAX_PROGRAM_ATTRIBS_ARB: *params = limits->MaxAttribs; return; case GL_PROGRAM_NATIVE_ATTRIBS_ARB: - *params = prog->NumNativeAttributes; + *params = prog->arb.NumNativeAttributes; return; case GL_MAX_PROGRAM_NATIVE_ATTRIBS_ARB: *params = limits->MaxNativeAttribs; return; case GL_PROGRAM_ADDRESS_REGISTERS_ARB: - *params = prog->NumAddressRegs; + *params = prog->arb.NumAddressRegs; return; case GL_MAX_PROGRAM_ADDRESS_REGISTERS_ARB: *params = limits->MaxAddressRegs; return; case GL_PROGRAM_NATIVE_ADDRESS_REGISTERS_ARB: - *params = prog->NumNativeAddressRegs; + *params = prog->arb.NumNativeAddressRegs; return; case GL_MAX_PROGRAM_NATIVE_ADDRESS_REGISTERS_ARB: *params = limits->MaxNativeAddressRegs; @@ -755,25 +772,25 @@ * The following apply to fragment programs only (at this time) */ if (target == GL_FRAGMENT_PROGRAM_ARB) { - const struct gl_fragment_program *fp = ctx->FragmentProgram.Current; + const struct gl_program *fp = ctx->FragmentProgram.Current; switch (pname) { case GL_PROGRAM_ALU_INSTRUCTIONS_ARB: - *params = fp->Base.NumNativeAluInstructions; + *params = fp->arb.NumNativeAluInstructions; return; case GL_PROGRAM_NATIVE_ALU_INSTRUCTIONS_ARB: - *params = fp->Base.NumAluInstructions; + *params = fp->arb.NumAluInstructions; return; case GL_PROGRAM_TEX_INSTRUCTIONS_ARB: - *params = fp->Base.NumTexInstructions; + *params = fp->arb.NumTexInstructions; return; case GL_PROGRAM_NATIVE_TEX_INSTRUCTIONS_ARB: - *params = fp->Base.NumNativeTexInstructions; + *params = fp->arb.NumNativeTexInstructions; return; case GL_PROGRAM_TEX_INDIRECTIONS_ARB: - *params = fp->Base.NumTexIndirections; + *params = fp->arb.NumTexIndirections; return; case GL_PROGRAM_NATIVE_TEX_INDIRECTIONS_ARB: - *params = fp->Base.NumNativeTexIndirections; + *params = fp->arb.NumNativeTexIndirections; return; case GL_MAX_PROGRAM_ALU_INSTRUCTIONS_ARB: *params = limits->MaxAluInstructions; @@ -812,10 +829,10 @@ GET_CURRENT_CONTEXT(ctx); if (target == GL_VERTEX_PROGRAM_ARB) { - prog = &(ctx->VertexProgram.Current->Base); + prog = ctx->VertexProgram.Current; } else if (target == GL_FRAGMENT_PROGRAM_ARB) { - prog = &(ctx->FragmentProgram.Current->Base); + prog = ctx->FragmentProgram.Current; } else { _mesa_error(ctx, GL_INVALID_ENUM, "glGetProgramStringARB(target)"); diff -Nru mesa-12.0.6/src/mesa/main/arrayobj.c mesa-17.0.7/src/mesa/main/arrayobj.c --- mesa-12.0.6/src/mesa/main/arrayobj.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/arrayobj.c 2017-06-01 10:37:10.000000000 +0000 @@ -52,6 +52,7 @@ #include "mtypes.h" #include "varray.h" #include "main/dispatch.h" +#include "util/bitscan.h" /** @@ -139,8 +140,8 @@ { GLuint i; - for (i = 0; i < ARRAY_SIZE(obj->VertexBinding); i++) - _mesa_reference_buffer_object(ctx, &obj->VertexBinding[i].BufferObj, NULL); + for (i = 0; i < ARRAY_SIZE(obj->BufferBinding); i++) + _mesa_reference_buffer_object(ctx, &obj->BufferBinding[i].BufferObj, NULL); for (i = 0; i < ARRAY_SIZE(obj->_VertexAttrib); i++) _mesa_reference_buffer_object(ctx, &obj->_VertexAttrib[i].BufferObj, NULL); @@ -222,13 +223,20 @@ } - +/** + * Initialize attribtes of a vertex array within a vertex array object. + * \param vao the container vertex array object + * \param index which array in the VAO to initialize + * \param size number of components (1, 2, 3 or 4) per attribute + * \param type datatype of the attribute (GL_FLOAT, GL_INT, etc). + */ static void init_array(struct gl_context *ctx, - struct gl_vertex_array_object *obj, GLuint index, GLint size, GLint type) + struct gl_vertex_array_object *vao, + GLuint index, GLint size, GLint type) { - struct gl_vertex_attrib_array *array = &obj->VertexAttrib[index]; - struct gl_vertex_buffer_binding *binding = &obj->VertexBinding[index]; + struct gl_array_attributes *array = &vao->VertexAttrib[index]; + struct gl_vertex_buffer_binding *binding = &vao->BufferBinding[index]; array->Size = size; array->Type = type; @@ -241,7 +249,7 @@ array->Integer = GL_FALSE; array->Doubles = GL_FALSE; array->_ElementSize = size * _mesa_sizeof_type(type); - array->VertexBinding = index; + array->BufferBindingIndex = index; binding->Offset = 0; binding->Stride = array->_ElementSize; @@ -259,47 +267,47 @@ */ void _mesa_initialize_vao(struct gl_context *ctx, - struct gl_vertex_array_object *obj, + struct gl_vertex_array_object *vao, GLuint name) { GLuint i; - obj->Name = name; + vao->Name = name; - mtx_init(&obj->Mutex, mtx_plain); - obj->RefCount = 1; + mtx_init(&vao->Mutex, mtx_plain); + vao->RefCount = 1; /* Init the individual arrays */ - for (i = 0; i < ARRAY_SIZE(obj->VertexAttrib); i++) { + for (i = 0; i < ARRAY_SIZE(vao->VertexAttrib); i++) { switch (i) { case VERT_ATTRIB_WEIGHT: - init_array(ctx, obj, VERT_ATTRIB_WEIGHT, 1, GL_FLOAT); + init_array(ctx, vao, VERT_ATTRIB_WEIGHT, 1, GL_FLOAT); break; case VERT_ATTRIB_NORMAL: - init_array(ctx, obj, VERT_ATTRIB_NORMAL, 3, GL_FLOAT); + init_array(ctx, vao, VERT_ATTRIB_NORMAL, 3, GL_FLOAT); break; case VERT_ATTRIB_COLOR1: - init_array(ctx, obj, VERT_ATTRIB_COLOR1, 3, GL_FLOAT); + init_array(ctx, vao, VERT_ATTRIB_COLOR1, 3, GL_FLOAT); break; case VERT_ATTRIB_FOG: - init_array(ctx, obj, VERT_ATTRIB_FOG, 1, GL_FLOAT); + init_array(ctx, vao, VERT_ATTRIB_FOG, 1, GL_FLOAT); break; case VERT_ATTRIB_COLOR_INDEX: - init_array(ctx, obj, VERT_ATTRIB_COLOR_INDEX, 1, GL_FLOAT); + init_array(ctx, vao, VERT_ATTRIB_COLOR_INDEX, 1, GL_FLOAT); break; case VERT_ATTRIB_EDGEFLAG: - init_array(ctx, obj, VERT_ATTRIB_EDGEFLAG, 1, GL_BOOL); + init_array(ctx, vao, VERT_ATTRIB_EDGEFLAG, 1, GL_BOOL); break; case VERT_ATTRIB_POINT_SIZE: - init_array(ctx, obj, VERT_ATTRIB_POINT_SIZE, 1, GL_FLOAT); + init_array(ctx, vao, VERT_ATTRIB_POINT_SIZE, 1, GL_FLOAT); break; default: - init_array(ctx, obj, i, 4, GL_FLOAT); + init_array(ctx, vao, i, 4, GL_FLOAT); break; } } - _mesa_reference_buffer_object(ctx, &obj->IndexBufferObj, + _mesa_reference_buffer_object(ctx, &vao->IndexBufferObj, ctx->Shared->NullBufferObj); } @@ -308,11 +316,11 @@ * Add the given array object to the array object pool. */ static void -save_array_object( struct gl_context *ctx, struct gl_vertex_array_object *obj ) +save_array_object(struct gl_context *ctx, struct gl_vertex_array_object *vao) { - if (obj->Name > 0) { + if (vao->Name > 0) { /* insert into hash table */ - _mesa_HashInsert(ctx->Array.Objects, obj->Name, obj); + _mesa_HashInsert(ctx->Array.Objects, vao->Name, vao); } } @@ -322,17 +330,17 @@ * Do not deallocate the array object though. */ static void -remove_array_object( struct gl_context *ctx, struct gl_vertex_array_object *obj ) +remove_array_object(struct gl_context *ctx, struct gl_vertex_array_object *vao) { - if (obj->Name > 0) { + if (vao->Name > 0) { /* remove from hash table */ - _mesa_HashRemove(ctx->Array.Objects, obj->Name); + _mesa_HashRemove(ctx->Array.Objects, vao->Name); } } /** - * Updates the derived gl_client_arrays when a gl_vertex_attrib_array + * Updates the derived gl_vertex_arrays when a gl_vertex_attrib_array * or a gl_vertex_buffer_binding has changed. */ void @@ -342,16 +350,12 @@ GLbitfield64 arrays = vao->NewArrays; while (arrays) { - struct gl_client_array *client_array; - struct gl_vertex_attrib_array *attrib_array; - struct gl_vertex_buffer_binding *buffer_binding; - - GLint attrib = ffsll(arrays) - 1; - arrays ^= BITFIELD64_BIT(attrib); - - attrib_array = &vao->VertexAttrib[attrib]; - buffer_binding = &vao->VertexBinding[attrib_array->VertexBinding]; - client_array = &vao->_VertexAttrib[attrib]; + const int attrib = u_bit_scan64(&arrays); + struct gl_vertex_array *client_array = &vao->_VertexAttrib[attrib]; + const struct gl_array_attributes *attrib_array = + &vao->VertexAttrib[attrib]; + const struct gl_vertex_buffer_binding *buffer_binding = + &vao->BufferBinding[attrib_array->BufferBindingIndex]; _mesa_update_client_array(ctx, client_array, attrib_array, buffer_binding); @@ -359,6 +363,69 @@ } +bool +_mesa_all_varyings_in_vbos(const struct gl_vertex_array_object *vao) +{ + /* Walk those enabled arrays that have the default vbo attached */ + GLbitfield64 mask = vao->_Enabled & ~vao->VertexAttribBufferMask; + + while (mask) { + /* Do not use u_bit_scan64 as we can walk multiple + * attrib arrays at once + */ + const int i = ffsll(mask) - 1; + const struct gl_array_attributes *attrib_array = + &vao->VertexAttrib[i]; + const struct gl_vertex_buffer_binding *buffer_binding = + &vao->BufferBinding[attrib_array->BufferBindingIndex]; + + /* Only enabled arrays shall appear in the _Enabled bitmask */ + assert(attrib_array->Enabled); + /* We have already masked out vao->VertexAttribBufferMask */ + assert(!_mesa_is_bufferobj(buffer_binding->BufferObj)); + + /* Bail out once we find the first non vbo with a non zero stride */ + if (buffer_binding->Stride != 0) + return false; + + /* Note that we cannot use the xor variant since the _BoundArray mask + * may contain array attributes that are bound but not enabled. + */ + mask &= ~buffer_binding->_BoundArrays; + } + + return true; +} + +bool +_mesa_all_buffers_are_unmapped(const struct gl_vertex_array_object *vao) +{ + /* Walk the enabled arrays that have a vbo attached */ + GLbitfield64 mask = vao->_Enabled & vao->VertexAttribBufferMask; + + while (mask) { + const int i = ffsll(mask) - 1; + const struct gl_array_attributes *attrib_array = + &vao->VertexAttrib[i]; + const struct gl_vertex_buffer_binding *buffer_binding = + &vao->BufferBinding[attrib_array->BufferBindingIndex]; + + /* Only enabled arrays shall appear in the _Enabled bitmask */ + assert(attrib_array->Enabled); + /* We have already masked with vao->VertexAttribBufferMask */ + assert(_mesa_is_bufferobj(buffer_binding->BufferObj)); + + /* Bail out once we find the first disallowed mapping */ + if (_mesa_check_disallowed_mapping(buffer_binding->BufferObj)) + return false; + + /* We have handled everything that is bound to this buffer_binding. */ + mask &= ~buffer_binding->_BoundArrays; + } + + return true; +} + /**********************************************************************/ /* API Functions */ /**********************************************************************/ diff -Nru mesa-12.0.6/src/mesa/main/arrayobj.h mesa-17.0.7/src/mesa/main/arrayobj.h --- mesa-12.0.6/src/mesa/main/arrayobj.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/arrayobj.h 2017-06-01 10:37:10.000000000 +0000 @@ -81,6 +81,14 @@ _mesa_update_vao_client_arrays(struct gl_context *ctx, struct gl_vertex_array_object *vao); +/* Returns true if all varying arrays reside in vbos */ +extern bool +_mesa_all_varyings_in_vbos(const struct gl_vertex_array_object *vao); + +/* Returns true if all vbos are unmapped */ +extern bool +_mesa_all_buffers_are_unmapped(const struct gl_vertex_array_object *vao); + /* * API functions */ diff -Nru mesa-12.0.6/src/mesa/main/attrib.c mesa-17.0.7/src/mesa/main/attrib.c --- mesa-12.0.6/src/mesa/main/attrib.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/attrib.c 2017-06-01 10:37:10.000000000 +0000 @@ -1071,7 +1071,8 @@ if (ctx->Extensions.ARB_color_buffer_float) _mesa_ClampColor(GL_CLAMP_FRAGMENT_COLOR_ARB, color->ClampFragmentColor); - _mesa_ClampColor(GL_CLAMP_READ_COLOR_ARB, color->ClampReadColor); + if (ctx->Extensions.ARB_color_buffer_float || ctx->Version >= 30) + _mesa_ClampColor(GL_CLAMP_READ_COLOR_ARB, color->ClampReadColor); /* GL_ARB_framebuffer_sRGB / GL_EXT_framebuffer_sRGB */ if (ctx->Extensions.EXT_framebuffer_sRGB) @@ -1247,7 +1248,7 @@ GLuint u; for (u = 0; u < ctx->Const.MaxTextureUnits; u++) { _mesa_TexEnvi(GL_POINT_SPRITE_NV, GL_COORD_REPLACE_NV, - (GLint) point->CoordReplace[u]); + !!(point->CoordReplace & (1u << u))); } _mesa_set_enable(ctx, GL_POINT_SPRITE_NV,point->PointSprite); if (ctx->Extensions.NV_point_sprite) @@ -1305,6 +1306,13 @@ _mesa_set_enablei(ctx, GL_SCISSOR_TEST, i, (scissor->EnableFlags >> i) & 1); } + if (ctx->Extensions.EXT_window_rectangles) { + STATIC_ASSERT(sizeof(struct gl_scissor_rect) == + 4 * sizeof(GLint)); + _mesa_WindowRectanglesEXT( + scissor->WindowRectMode, scissor->NumWindowRects, + (const GLint *)scissor->WindowRects); + } } break; case GL_STENCIL_BUFFER_BIT: @@ -1477,11 +1485,13 @@ for (i = 0; i < ARRAY_SIZE(src->VertexAttrib); i++) { _mesa_copy_client_array(ctx, &dest->_VertexAttrib[i], &src->_VertexAttrib[i]); _mesa_copy_vertex_attrib_array(ctx, &dest->VertexAttrib[i], &src->VertexAttrib[i]); - _mesa_copy_vertex_buffer_binding(ctx, &dest->VertexBinding[i], &src->VertexBinding[i]); + _mesa_copy_vertex_buffer_binding(ctx, &dest->BufferBinding[i], &src->BufferBinding[i]); } /* _Enabled must be the same than on push */ dest->_Enabled = src->_Enabled; + /* The bitmask of bound VBOs needs to match the VertexBinding array */ + dest->VertexAttribBufferMask = src->VertexAttribBufferMask; dest->NewArrays = src->NewArrays; } diff -Nru mesa-12.0.6/src/mesa/main/barrier.c mesa-17.0.7/src/mesa/main/barrier.c --- mesa-12.0.6/src/mesa/main/barrier.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/barrier.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,125 @@ +/* + * Copyright © 2011 Marek Olšák + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/** + * \file barrier.c + * Implementation of various pipeline barrier entry points. + * + * \author Marek Olšák + */ + +#include "context.h" +#include "barrier.h" + + +static void +_mesa_texture_barrier(struct gl_context *ctx) +{ + /* no-op */ +} + +void +_mesa_init_barrier_functions(struct dd_function_table *driver) +{ + driver->TextureBarrier = _mesa_texture_barrier; +} + +void GLAPIENTRY +_mesa_TextureBarrierNV(void) +{ + GET_CURRENT_CONTEXT(ctx); + + if (!ctx->Extensions.NV_texture_barrier) { + _mesa_error(ctx, GL_INVALID_OPERATION, + "glTextureBarrier(not supported)"); + return; + } + + ctx->Driver.TextureBarrier(ctx); +} + +void GLAPIENTRY +_mesa_MemoryBarrier(GLbitfield barriers) +{ + GET_CURRENT_CONTEXT(ctx); + + if (ctx->Driver.MemoryBarrier) + ctx->Driver.MemoryBarrier(ctx, barriers); +} + +void GLAPIENTRY +_mesa_MemoryBarrierByRegion(GLbitfield barriers) +{ + GET_CURRENT_CONTEXT(ctx); + + GLbitfield all_allowed_bits = GL_ATOMIC_COUNTER_BARRIER_BIT | + GL_FRAMEBUFFER_BARRIER_BIT | + GL_SHADER_IMAGE_ACCESS_BARRIER_BIT | + GL_SHADER_STORAGE_BARRIER_BIT | + GL_TEXTURE_FETCH_BARRIER_BIT | + GL_UNIFORM_BARRIER_BIT; + + if (ctx->Driver.MemoryBarrier) { + /* From section 7.11.2 of the OpenGL ES 3.1 specification: + * + * "When barriers is ALL_BARRIER_BITS, shader memory accesses will be + * synchronized relative to all these barrier bits, but not to other + * barrier bits specific to MemoryBarrier." + * + * That is, if barriers is the special value GL_ALL_BARRIER_BITS, then all + * barriers allowed by glMemoryBarrierByRegion should be activated." + */ + if (barriers == GL_ALL_BARRIER_BITS) { + ctx->Driver.MemoryBarrier(ctx, all_allowed_bits); + return; + } + + /* From section 7.11.2 of the OpenGL ES 3.1 specification: + * + * "An INVALID_VALUE error is generated if barriers is not the special + * value ALL_BARRIER_BITS, and has any bits set other than those + * described above." + */ + if ((barriers & ~all_allowed_bits) != 0) { + _mesa_error(ctx, GL_INVALID_VALUE, + "glMemoryBarrierByRegion(unsupported barrier bit"); + } + + ctx->Driver.MemoryBarrier(ctx, barriers); + } +} + +void GLAPIENTRY +_mesa_BlendBarrier(void) +{ + GET_CURRENT_CONTEXT(ctx); + + if (!ctx->Extensions.MESA_shader_framebuffer_fetch_non_coherent && + !ctx->Extensions.KHR_blend_equation_advanced) { + _mesa_error(ctx, GL_INVALID_OPERATION, + "glBlendBarrier(not supported)"); + return; + } + + ctx->Driver.BlendBarrier(ctx); +} diff -Nru mesa-12.0.6/src/mesa/main/barrier.h mesa-17.0.7/src/mesa/main/barrier.h --- mesa-12.0.6/src/mesa/main/barrier.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/barrier.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,53 @@ +/* + * Copyright © 2011 Marek Olšák + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/** + * \file barrier.h + * GL_NV_texture_barrier and friends. + * + * \author Marek Olšák + */ + +#ifndef BARRIER_H +#define BARRIER_H + +#include "glheader.h" + +struct dd_function_table; + +extern void +_mesa_init_barrier_functions(struct dd_function_table *driver); + +extern void GLAPIENTRY +_mesa_TextureBarrierNV(void); + +void GLAPIENTRY +_mesa_MemoryBarrier(GLbitfield barriers); + +void GLAPIENTRY +_mesa_MemoryBarrierByRegion(GLbitfield barriers); + +void GLAPIENTRY +_mesa_BlendBarrier(void); + +#endif /* BARRIER_H */ diff -Nru mesa-12.0.6/src/mesa/main/bbox.c mesa-17.0.7/src/mesa/main/bbox.c --- mesa-12.0.6/src/mesa/main/bbox.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/bbox.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,63 @@ +/* + * Mesa 3-D graphics library + * + * Copyright (C) 2016 Ilia Mirkin. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + + +/** + * \file bbox.c + * glPrimitiveBoundingBox function + */ + +#include "bbox.h" +#include "context.h" + +void GLAPIENTRY +_mesa_PrimitiveBoundingBox( + GLfloat minX, GLfloat minY, GLfloat minZ, GLfloat minW, + GLfloat maxX, GLfloat maxY, GLfloat maxZ, GLfloat maxW) +{ + GET_CURRENT_CONTEXT(ctx); + + ctx->PrimitiveBoundingBox[0] = minX; + ctx->PrimitiveBoundingBox[1] = minY; + ctx->PrimitiveBoundingBox[2] = minZ; + ctx->PrimitiveBoundingBox[3] = minW; + ctx->PrimitiveBoundingBox[4] = maxX; + ctx->PrimitiveBoundingBox[5] = maxY; + ctx->PrimitiveBoundingBox[6] = maxZ; + ctx->PrimitiveBoundingBox[7] = maxW; +} + +void +_mesa_init_bbox(struct gl_context *ctx) +{ + ctx->PrimitiveBoundingBox[0] = + ctx->PrimitiveBoundingBox[1] = + ctx->PrimitiveBoundingBox[2] = -1.0f; + + ctx->PrimitiveBoundingBox[3] = + ctx->PrimitiveBoundingBox[4] = + ctx->PrimitiveBoundingBox[5] = + ctx->PrimitiveBoundingBox[6] = + ctx->PrimitiveBoundingBox[7] = 1.0f; +} diff -Nru mesa-12.0.6/src/mesa/main/bbox.h mesa-17.0.7/src/mesa/main/bbox.h --- mesa-12.0.6/src/mesa/main/bbox.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/bbox.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,42 @@ +/* + * Mesa 3-D graphics library + * + * Copyright (C) 1999-2008 Brian Paul All Rights Reserved. + * Copyright (C) 2009 VMware, Inc. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + + +#ifndef BBOX_H +#define BBOX_H + +#include "glheader.h" + +struct gl_context; + +extern void GLAPIENTRY +_mesa_PrimitiveBoundingBox( + GLfloat minX, GLfloat minY, GLfloat minZ, GLfloat minW, + GLfloat maxX, GLfloat maxY, GLfloat maxZ, GLfloat maxW); + +extern void +_mesa_init_bbox(struct gl_context *ctx); + +#endif diff -Nru mesa-12.0.6/src/mesa/main/blend.c mesa-17.0.7/src/mesa/main/blend.c --- mesa-12.0.6/src/mesa/main/blend.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/blend.c 2017-06-01 10:37:10.000000000 +0000 @@ -336,11 +336,11 @@ /** - * Check if given blend equation is legal. - * \return GL_TRUE if legal, GL_FALSE otherwise. + * Return true if \p mode is a legal blending equation, excluding + * GL_KHR_blend_equation_advanced modes. */ -static GLboolean -legal_blend_equation(const struct gl_context *ctx, GLenum mode) +static bool +legal_simple_blend_equation(const struct gl_context *ctx, GLenum mode) { switch (mode) { case GL_FUNC_ADD: @@ -355,6 +355,57 @@ } } +static enum gl_advanced_blend_mode +advanced_blend_mode_from_gl_enum(GLenum mode) +{ + switch (mode) { + case GL_MULTIPLY_KHR: + return BLEND_MULTIPLY; + case GL_SCREEN_KHR: + return BLEND_SCREEN; + case GL_OVERLAY_KHR: + return BLEND_OVERLAY; + case GL_DARKEN_KHR: + return BLEND_DARKEN; + case GL_LIGHTEN_KHR: + return BLEND_LIGHTEN; + case GL_COLORDODGE_KHR: + return BLEND_COLORDODGE; + case GL_COLORBURN_KHR: + return BLEND_COLORBURN; + case GL_HARDLIGHT_KHR: + return BLEND_HARDLIGHT; + case GL_SOFTLIGHT_KHR: + return BLEND_SOFTLIGHT; + case GL_DIFFERENCE_KHR: + return BLEND_DIFFERENCE; + case GL_EXCLUSION_KHR: + return BLEND_EXCLUSION; + case GL_HSL_HUE_KHR: + return BLEND_HSL_HUE; + case GL_HSL_SATURATION_KHR: + return BLEND_HSL_SATURATION; + case GL_HSL_COLOR_KHR: + return BLEND_HSL_COLOR; + case GL_HSL_LUMINOSITY_KHR: + return BLEND_HSL_LUMINOSITY; + default: + return BLEND_NONE; + } +} + +/** + * If \p mode is one of the advanced blending equations defined by + * GL_KHR_blend_equation_advanced (and the extension is supported), + * return the corresponding BLEND_* enum. Otherwise, return BLEND_NONE + * (which can also be treated as false). + */ +static enum gl_advanced_blend_mode +advanced_blend_mode(const struct gl_context *ctx, GLenum mode) +{ + return _mesa_has_KHR_blend_equation_advanced(ctx) ? + advanced_blend_mode_from_gl_enum(mode) : BLEND_NONE; +} /* This is really an extension function! */ void GLAPIENTRY @@ -364,6 +415,7 @@ const unsigned numBuffers = num_buffers(ctx); unsigned buf; bool changed = false; + enum gl_advanced_blend_mode advanced_mode = advanced_blend_mode(ctx, mode); if (MESA_VERBOSE & VERBOSE_API) _mesa_debug(ctx, "glBlendEquation(%s)\n", @@ -390,7 +442,8 @@ if (!changed) return; - if (!legal_blend_equation(ctx, mode)) { + + if (!legal_simple_blend_equation(ctx, mode) && !advanced_mode) { _mesa_error(ctx, GL_INVALID_ENUM, "glBlendEquation"); return; } @@ -402,6 +455,7 @@ ctx->Color.Blend[buf].EquationA = mode; } ctx->Color._BlendEquationPerBuffer = GL_FALSE; + ctx->Color._AdvancedBlendMode = advanced_mode; if (ctx->Driver.BlendEquationSeparate) ctx->Driver.BlendEquationSeparate(ctx, mode, mode); @@ -415,6 +469,7 @@ _mesa_BlendEquationiARB(GLuint buf, GLenum mode) { GET_CURRENT_CONTEXT(ctx); + enum gl_advanced_blend_mode advanced_mode = advanced_blend_mode(ctx, mode); if (MESA_VERBOSE & VERBOSE_API) _mesa_debug(ctx, "glBlendEquationi(%u, %s)\n", @@ -426,7 +481,7 @@ return; } - if (!legal_blend_equation(ctx, mode)) { + if (!legal_simple_blend_equation(ctx, mode) && !advanced_mode) { _mesa_error(ctx, GL_INVALID_ENUM, "glBlendEquationi"); return; } @@ -439,6 +494,9 @@ ctx->Color.Blend[buf].EquationRGB = mode; ctx->Color.Blend[buf].EquationA = mode; ctx->Color._BlendEquationPerBuffer = GL_TRUE; + + if (buf == 0) + ctx->Color._AdvancedBlendMode = advanced_mode; } @@ -482,12 +540,18 @@ return; } - if (!legal_blend_equation(ctx, modeRGB)) { + /* Only allow simple blending equations. + * The GL_KHR_blend_equation_advanced spec says: + * + * "NOTE: These enums are not accepted by the or + * parameters of BlendEquationSeparate or BlendEquationSeparatei." + */ + if (!legal_simple_blend_equation(ctx, modeRGB)) { _mesa_error(ctx, GL_INVALID_ENUM, "glBlendEquationSeparateEXT(modeRGB)"); return; } - if (!legal_blend_equation(ctx, modeA)) { + if (!legal_simple_blend_equation(ctx, modeA)) { _mesa_error(ctx, GL_INVALID_ENUM, "glBlendEquationSeparateEXT(modeA)"); return; } @@ -499,6 +563,7 @@ ctx->Color.Blend[buf].EquationA = modeA; } ctx->Color._BlendEquationPerBuffer = GL_FALSE; + ctx->Color._AdvancedBlendMode = BLEND_NONE; if (ctx->Driver.BlendEquationSeparate) ctx->Driver.BlendEquationSeparate(ctx, modeRGB, modeA); @@ -524,12 +589,18 @@ return; } - if (!legal_blend_equation(ctx, modeRGB)) { + /* Only allow simple blending equations. + * The GL_KHR_blend_equation_advanced spec says: + * + * "NOTE: These enums are not accepted by the or + * parameters of BlendEquationSeparate or BlendEquationSeparatei." + */ + if (!legal_simple_blend_equation(ctx, modeRGB)) { _mesa_error(ctx, GL_INVALID_ENUM, "glBlendEquationSeparatei(modeRGB)"); return; } - if (!legal_blend_equation(ctx, modeA)) { + if (!legal_simple_blend_equation(ctx, modeA)) { _mesa_error(ctx, GL_INVALID_ENUM, "glBlendEquationSeparatei(modeA)"); return; } @@ -542,6 +613,7 @@ ctx->Color.Blend[buf].EquationRGB = modeRGB; ctx->Color.Blend[buf].EquationA = modeA; ctx->Color._BlendEquationPerBuffer = GL_TRUE; + ctx->Color._AdvancedBlendMode = BLEND_NONE; } @@ -789,6 +861,14 @@ { GET_CURRENT_CONTEXT(ctx); + /* Check for both the extension and the GL version, since the Intel driver + * does not advertise the extension in core profiles. + */ + if (ctx->Version <= 30 && !ctx->Extensions.ARB_color_buffer_float) { + _mesa_error(ctx, GL_INVALID_OPERATION, "glClampColor()"); + return; + } + if (clamp != GL_TRUE && clamp != GL_FALSE && clamp != GL_FIXED_ONLY_ARB) { _mesa_error(ctx, GL_INVALID_ENUM, "glClampColorARB(clamp)"); return; @@ -796,19 +876,15 @@ switch (target) { case GL_CLAMP_VERTEX_COLOR_ARB: - if (ctx->API == API_OPENGL_CORE && - !ctx->Extensions.ARB_color_buffer_float) { + if (ctx->API == API_OPENGL_CORE) goto invalid_enum; - } FLUSH_VERTICES(ctx, _NEW_LIGHT); ctx->Light.ClampVertexColor = clamp; _mesa_update_clamp_vertex_color(ctx, ctx->DrawBuffer); break; case GL_CLAMP_FRAGMENT_COLOR_ARB: - if (ctx->API == API_OPENGL_CORE && - !ctx->Extensions.ARB_color_buffer_float) { + if (ctx->API == API_OPENGL_CORE) goto invalid_enum; - } FLUSH_VERTICES(ctx, _NEW_FRAG_CLAMP); ctx->Color.ClampFragmentColor = clamp; _mesa_update_clamp_fragment_color(ctx, ctx->DrawBuffer); @@ -873,7 +949,7 @@ * - there is an integer colorbuffer */ if (!drawFb || !drawFb->_HasSNormOrFloatColorBuffer || - drawFb->_IntegerColor) + drawFb->_IntegerBuffers) ctx->Color._ClampFragmentColor = GL_FALSE; else ctx->Color._ClampFragmentColor = @@ -967,6 +1043,8 @@ * if EGL_KHR_gl_colorspace has been used to request sRGB. */ ctx->Color.sRGBEnabled = _mesa_is_gles(ctx); + + ctx->Color.BlendCoherent = true; } /*@}*/ diff -Nru mesa-12.0.6/src/mesa/main/bufferobj.c mesa-17.0.7/src/mesa/main/bufferobj.c --- mesa-12.0.6/src/mesa/main/bufferobj.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/bufferobj.c 2017-06-01 10:37:10.000000000 +0000 @@ -44,6 +44,7 @@ #include "glformats.h" #include "texstore.h" #include "transformfeedback.h" +#include "varray.h" /* Debug flags */ @@ -1199,11 +1200,13 @@ */ static void unbind(struct gl_context *ctx, - struct gl_buffer_object **ptr, + struct gl_vertex_array_object *vao, unsigned index, struct gl_buffer_object *obj) { - if (*ptr == obj) { - _mesa_reference_buffer_object(ctx, ptr, ctx->Shared->NullBufferObj); + if (vao->BufferBinding[index].BufferObj == obj) { + _mesa_bind_vertex_buffer(ctx, vao, index, ctx->Shared->NullBufferObj, + vao->BufferBinding[index].Offset, + vao->BufferBinding[index].Stride); } } @@ -1301,8 +1304,8 @@ _mesa_buffer_unmap_all_mappings(ctx, bufObj); /* unbind any vertex pointers bound to this buffer */ - for (j = 0; j < ARRAY_SIZE(vao->VertexBinding); j++) { - unbind(ctx, &vao->VertexBinding[j].BufferObj, bufObj); + for (j = 0; j < ARRAY_SIZE(vao->BufferBinding); j++) { + unbind(ctx, vao, j, bufObj); } if (ctx->Array.ArrayBufferObj == bufObj) { @@ -3072,11 +3075,11 @@ const GLsizeiptr *sizes) { if (offsets[index] < 0) { - /* The ARB_multi_bind spec says: - * - * "An INVALID_VALUE error is generated by BindBuffersRange if any - * value in is less than zero (per binding)." - */ + /* The ARB_multi_bind spec says: + * + * "An INVALID_VALUE error is generated by BindBuffersRange if any + * value in is less than zero (per binding)." + */ _mesa_error(ctx, GL_INVALID_VALUE, "glBindBuffersRange(offsets[%u]=%" PRId64 " < 0)", index, (int64_t) offsets[index]); @@ -3084,11 +3087,11 @@ } if (sizes[index] <= 0) { - /* The ARB_multi_bind spec says: - * - * "An INVALID_VALUE error is generated by BindBuffersRange if any - * value in is less than or equal to zero (per binding)." - */ + /* The ARB_multi_bind spec says: + * + * "An INVALID_VALUE error is generated by BindBuffersRange if any + * value in is less than or equal to zero (per binding)." + */ _mesa_error(ctx, GL_INVALID_VALUE, "glBindBuffersRange(sizes[%u]=%" PRId64 " <= 0)", index, (int64_t) sizes[index]); diff -Nru mesa-12.0.6/src/mesa/main/buffers.c mesa-17.0.7/src/mesa/main/buffers.c --- mesa-12.0.6/src/mesa/main/buffers.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/buffers.c 2017-06-01 10:37:10.000000000 +0000 @@ -36,6 +36,7 @@ #include "enums.h" #include "fbobject.h" #include "mtypes.h" +#include "util/bitscan.h" #define BAD_MASK ~0u @@ -172,12 +173,22 @@ * return -1 for an invalid buffer. */ static gl_buffer_index -read_buffer_enum_to_index(GLenum buffer) +read_buffer_enum_to_index(const struct gl_context *ctx, GLenum buffer) { switch (buffer) { case GL_FRONT: return BUFFER_FRONT_LEFT; case GL_BACK: + if (_mesa_is_gles(ctx)) { + /* In draw_buffer_enum_to_bitmask, when GLES contexts draw to + * GL_BACK with a single-buffered configuration, we actually end + * up drawing to the sole front buffer in our internal + * representation. For consistency, we must read from that + * front left buffer too. + */ + if (!ctx->DrawBuffer->Visual.doubleBufferMode) + return BUFFER_FRONT_LEFT; + } return BUFFER_BACK_LEFT; case GL_RIGHT: return BUFFER_FRONT_RIGHT; @@ -193,6 +204,8 @@ return BUFFER_FRONT_LEFT; case GL_AUX0: return BUFFER_AUX0; + case GL_FRONT_AND_BACK: + return BUFFER_FRONT_LEFT; case GL_AUX1: case GL_AUX2: case GL_AUX3: @@ -332,7 +345,9 @@ * \param n number of outputs * \param buffers array [n] of renderbuffer names. Unlike glDrawBuffer, the * names cannot specify more than one buffer. For example, - * GL_FRONT_AND_BACK is illegal. + * GL_FRONT_AND_BACK is illegal. The only exception is GL_BACK + * that is considered special and allowed as far as n is one + * since 4.5. */ static void draw_buffers(struct gl_context *ctx, struct gl_framebuffer *fb, @@ -390,20 +405,38 @@ return; } - /* From the OpenGL 4.0 specification, page 256: - * "For both the default framebuffer and framebuffer objects, the - * constants FRONT, BACK, LEFT, RIGHT, and FRONT_AND_BACK are not - * valid in the bufs array passed to DrawBuffers, and will result in - * the error INVALID_ENUM. This restriction is because these - * constants may themselves refer to multiple buffers, as shown in - * table 4.4." - * Previous versions of the OpenGL specification say INVALID_OPERATION, - * but the Khronos conformance tests expect INVALID_ENUM. + /* From the OpenGL 4.5 specification, page 493 (page 515 of the PDF) + * "An INVALID_ENUM error is generated if any value in bufs is FRONT, + * LEFT, RIGHT, or FRONT_AND_BACK . This restriction applies to both + * the default framebuffer and framebuffer objects, and exists because + * these constants may themselves refer to multiple buffers, as shown + * in table 17.4." + * + * And on page 492 (page 514 of the PDF): + * "If the default framebuffer is affected, then each of the constants + * must be one of the values listed in table 17.6 or the special value + * BACK. When BACK is used, n must be 1 and color values are written + * into the left buffer for single-buffered contexts, or into the back + * left buffer for double-buffered contexts." + * + * Note "special value BACK". GL_BACK also refers to multiple buffers, + * but it is consider a special case here. This is a change on 4.5. For + * OpenGL 4.x we check that behaviour. For any previous version we keep + * considering it wrong (as INVALID_ENUM). */ if (_mesa_bitcount(destMask[output]) > 1) { - _mesa_error(ctx, GL_INVALID_ENUM, "%s(invalid buffer %s)", - caller, _mesa_enum_to_string(buffers[output])); - return; + if (_mesa_is_winsys_fbo(fb) && ctx->Version >= 40 && + buffers[output] == GL_BACK) { + if (n != 1) { + _mesa_error(ctx, GL_INVALID_OPERATION, "%s(with GL_BACK n must be 1)", + caller); + return; + } + } else { + _mesa_error(ctx, GL_INVALID_ENUM, "%s(invalid buffer %s)", + caller, _mesa_enum_to_string(buffers[output])); + return; + } } /* Section 4.2 (Whole Framebuffer Operations) of the OpenGL ES 3.0 @@ -598,13 +631,12 @@ if (n > 0 && _mesa_bitcount(destMask[0]) > 1) { GLuint count = 0, destMask0 = destMask[0]; while (destMask0) { - GLint bufIndex = ffs(destMask0) - 1; + const int bufIndex = u_bit_scan(&destMask0); if (fb->_ColorDrawBufferIndexes[count] != bufIndex) { updated_drawbuffers(ctx, fb); fb->_ColorDrawBufferIndexes[count] = bufIndex; } count++; - destMask0 &= ~(1 << bufIndex); } fb->ColorDrawBuffer[0] = buffers[0]; fb->_NumColorDrawBuffers = count; @@ -727,7 +759,7 @@ if (_mesa_is_gles3(ctx) && !is_legal_es3_readbuffer_enum(buffer)) srcBuffer = -1; else - srcBuffer = read_buffer_enum_to_index(buffer); + srcBuffer = read_buffer_enum_to_index(ctx, buffer); if (srcBuffer == -1) { _mesa_error(ctx, GL_INVALID_ENUM, diff -Nru mesa-12.0.6/src/mesa/main/clear.c mesa-17.0.7/src/mesa/main/clear.c --- mesa-12.0.6/src/mesa/main/clear.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/clear.c 2017-06-01 10:37:10.000000000 +0000 @@ -267,6 +267,14 @@ mask |= BUFFER_BIT_FRONT_RIGHT; break; case GL_BACK: + /* For GLES contexts with a single buffered configuration, we actually + * only have a front renderbuffer, so any clear calls to GL_BACK should + * affect that buffer. See draw_buffer_enum_to_bitmask for details. + */ + if (_mesa_is_gles(ctx)) + if (!ctx->DrawBuffer->Visual.doubleBufferMode) + if (att[BUFFER_FRONT_LEFT].Renderbuffer) + mask |= BUFFER_BIT_FRONT_LEFT; if (att[BUFFER_BACK_LEFT].Renderbuffer) mask |= BUFFER_BIT_BACK_LEFT; if (att[BUFFER_BACK_RIGHT].Renderbuffer) diff -Nru mesa-12.0.6/src/mesa/main/compute.c mesa-17.0.7/src/mesa/main/compute.c --- mesa-12.0.6/src/mesa/main/compute.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/compute.c 2017-06-01 10:37:10.000000000 +0000 @@ -60,3 +60,28 @@ ctx->Driver.DispatchComputeIndirect(ctx, indirect); } + +void GLAPIENTRY +_mesa_DispatchComputeGroupSizeARB(GLuint num_groups_x, GLuint num_groups_y, + GLuint num_groups_z, GLuint group_size_x, + GLuint group_size_y, GLuint group_size_z) +{ + GET_CURRENT_CONTEXT(ctx); + const GLuint num_groups[3] = { num_groups_x, num_groups_y, num_groups_z }; + const GLuint group_size[3] = { group_size_x, group_size_y, group_size_z }; + + if (MESA_VERBOSE & VERBOSE_API) + _mesa_debug(ctx, + "glDispatchComputeGroupSizeARB(%d, %d, %d, %d, %d, %d)\n", + num_groups_x, num_groups_y, num_groups_z, + group_size_x, group_size_y, group_size_z); + + if (!_mesa_validate_DispatchComputeGroupSizeARB(ctx, num_groups, + group_size)) + return; + + if (num_groups_x == 0u || num_groups_y == 0u || num_groups_z == 0u) + return; + + ctx->Driver.DispatchComputeGroupSize(ctx, num_groups, group_size); +} diff -Nru mesa-12.0.6/src/mesa/main/compute.h mesa-17.0.7/src/mesa/main/compute.h --- mesa-12.0.6/src/mesa/main/compute.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/compute.h 2017-06-01 10:37:10.000000000 +0000 @@ -35,4 +35,9 @@ extern void GLAPIENTRY _mesa_DispatchComputeIndirect(GLintptr indirect); +extern void GLAPIENTRY +_mesa_DispatchComputeGroupSizeARB(GLuint num_groups_x, GLuint num_groups_y, + GLuint num_groups_z, GLuint group_size_x, + GLuint group_size_y, GLuint group_size_z); + #endif diff -Nru mesa-12.0.6/src/mesa/main/config.h mesa-17.0.7/src/mesa/main/config.h --- mesa-12.0.6/src/mesa/main/config.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/config.h 2017-06-01 10:37:10.000000000 +0000 @@ -132,10 +132,13 @@ */ #define MAX_TEXTURE_UNITS ((MAX_TEXTURE_COORD_UNITS > MAX_TEXTURE_IMAGE_UNITS) ? MAX_TEXTURE_COORD_UNITS : MAX_TEXTURE_IMAGE_UNITS) -/** Maximun number of viewports supported with ARB_viewport_array */ +/** Maximum number of viewports supported with ARB_viewport_array */ #define MAX_VIEWPORTS 16 -/** Maxmimum size for CVA. May be overridden by the drivers. */ +/** Maximum number of window rectangles supported with EXT_window_rectangles */ +#define MAX_WINDOW_RECTANGLES 8 + +/** Maximum size for CVA. May be overridden by the drivers. */ #define MAX_ARRAY_LOCK_SIZE 3000 /** Subpixel precision for antialiasing, window coordinate snapping */ @@ -195,7 +198,6 @@ #define MAX_PROGRAM_CALL_DEPTH 8 #define MAX_PROGRAM_TEMPS 256 #define MAX_PROGRAM_ADDRESS_REGS 1 -#define MAX_VARYING 32 /**< number of float[4] vectors */ #define MAX_SAMPLERS MAX_TEXTURE_IMAGE_UNITS #define MAX_PROGRAM_INPUTS 32 #define MAX_PROGRAM_OUTPUTS 64 diff -Nru mesa-12.0.6/src/mesa/main/context.c mesa-17.0.7/src/mesa/main/context.c --- mesa-12.0.6/src/mesa/main/context.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/context.c 2017-06-01 10:37:10.000000000 +0000 @@ -83,6 +83,7 @@ #include "api_loopback.h" #include "arrayobj.h" #include "attrib.h" +#include "bbox.h" #include "blend.h" #include "buffers.h" #include "bufferobj.h" @@ -120,9 +121,7 @@ #include "shared.h" #include "shaderobj.h" #include "shaderimage.h" -#include "util/simple_list.h" #include "util/strtod.h" -#include "state.h" #include "stencil.h" #include "texcompress_s3tc.h" #include "texstate.h" @@ -131,18 +130,16 @@ #include "varray.h" #include "version.h" #include "viewport.h" -#include "vtxfmt.h" #include "program/program.h" -#include "program/prog_print.h" #include "math/m_matrix.h" #include "main/dispatch.h" /* for _gloffset_COUNT */ -#include "uniforms.h" #include "macros.h" #ifdef USE_SPARC_ASM #include "sparc/sparc.h" #endif +#include "compiler/glsl_types.h" #include "compiler/glsl/glsl_parser_extras.h" #include @@ -407,8 +404,6 @@ /* per-API one-time init */ if (!(api_init_mask & (1 << ctx->API))) { - _mesa_init_get_hash(ctx); - _mesa_init_remap_table(); } @@ -683,6 +678,9 @@ /* GL_ARB_robustness */ consts->ResetStrategy = GL_NO_RESET_NOTIFICATION_ARB; + /* GL_KHR_robustness */ + consts->RobustAccess = GL_FALSE; + /* ES 3.0 or ARB_ES3_compatibility */ consts->MaxElementIndex = 0xffffffffu; @@ -726,6 +724,12 @@ consts->MaxTessPatchComponents = MAX_TESS_PATCH_COMPONENTS; consts->MaxTessControlTotalOutputComponents = MAX_TESS_CONTROL_TOTAL_OUTPUT_COMPONENTS; consts->PrimitiveRestartForPatches = false; + + /** GL_ARB_compute_variable_group_size */ + consts->MaxComputeVariableGroupSize[0] = 512; + consts->MaxComputeVariableGroupSize[1] = 512; + consts->MaxComputeVariableGroupSize[2] = 64; + consts->MaxComputeVariableGroupInvocations = 512; } @@ -740,9 +744,9 @@ /* check that we don't exceed the size of various bitfields */ assert(VARYING_SLOT_MAX <= - (8 * sizeof(ctx->VertexProgram._Current->Base.OutputsWritten))); + (8 * sizeof(ctx->VertexProgram._Current->info.outputs_written))); assert(VARYING_SLOT_MAX <= - (8 * sizeof(ctx->FragmentProgram._Current->Base.InputsRead))); + (8 * sizeof(ctx->FragmentProgram._Current->info.inputs_read))); /* shader-related checks */ assert(ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxLocalParams <= MAX_PROGRAM_LOCAL_PARAMS); @@ -812,6 +816,7 @@ /* Attribute Groups */ _mesa_init_accum( ctx ); _mesa_init_attrib( ctx ); + _mesa_init_bbox( ctx ); _mesa_init_buffer_objects( ctx ); _mesa_init_color( ctx ); _mesa_init_current( ctx ); @@ -1269,44 +1274,6 @@ /** - * Allocate and initialize a struct gl_context structure. - * Note that the driver needs to pass in its dd_function_table here since - * we need to at least call driverFunctions->NewTextureObject to initialize - * the rendering context. - * - * \param api the GL API type to create the context for - * \param visual a struct gl_config pointer (we copy the struct contents) or - * NULL to create a configless context - * \param share_list another context to share display lists with or NULL - * \param driverFunctions points to the dd_function_table into which the - * driver has plugged in all its special functions. - * - * \return pointer to a new __struct gl_contextRec or NULL if error. - */ -struct gl_context * -_mesa_create_context(gl_api api, - const struct gl_config *visual, - struct gl_context *share_list, - const struct dd_function_table *driverFunctions) -{ - struct gl_context *ctx; - - ctx = calloc(1, sizeof(struct gl_context)); - if (!ctx) - return NULL; - - if (_mesa_initialize_context(ctx, api, visual, share_list, - driverFunctions)) { - return ctx; - } - else { - free(ctx); - return NULL; - } -} - - -/** * Free the data associated with the given context. * * But doesn't free the struct gl_context struct itself. @@ -1329,17 +1296,17 @@ _mesa_reference_framebuffer(&ctx->DrawBuffer, NULL); _mesa_reference_framebuffer(&ctx->ReadBuffer, NULL); - _mesa_reference_vertprog(ctx, &ctx->VertexProgram.Current, NULL); - _mesa_reference_vertprog(ctx, &ctx->VertexProgram._Current, NULL); - _mesa_reference_vertprog(ctx, &ctx->VertexProgram._TnlProgram, NULL); - - _mesa_reference_tesscprog(ctx, &ctx->TessCtrlProgram._Current, NULL); - _mesa_reference_tesseprog(ctx, &ctx->TessEvalProgram._Current, NULL); - _mesa_reference_geomprog(ctx, &ctx->GeometryProgram._Current, NULL); - - _mesa_reference_fragprog(ctx, &ctx->FragmentProgram.Current, NULL); - _mesa_reference_fragprog(ctx, &ctx->FragmentProgram._Current, NULL); - _mesa_reference_fragprog(ctx, &ctx->FragmentProgram._TexEnvProgram, NULL); + _mesa_reference_program(ctx, &ctx->VertexProgram.Current, NULL); + _mesa_reference_program(ctx, &ctx->VertexProgram._Current, NULL); + _mesa_reference_program(ctx, &ctx->VertexProgram._TnlProgram, NULL); + + _mesa_reference_program(ctx, &ctx->TessCtrlProgram._Current, NULL); + _mesa_reference_program(ctx, &ctx->TessEvalProgram._Current, NULL); + _mesa_reference_program(ctx, &ctx->GeometryProgram._Current, NULL); + + _mesa_reference_program(ctx, &ctx->FragmentProgram.Current, NULL); + _mesa_reference_program(ctx, &ctx->FragmentProgram._Current, NULL); + _mesa_reference_program(ctx, &ctx->FragmentProgram._TexEnvProgram, NULL); _mesa_reference_vao(ctx, &ctx->Array.VAO, NULL); _mesa_reference_vao(ctx, &ctx->Array.DefaultVAO, NULL); @@ -1453,16 +1420,8 @@ dst->Hint = src->Hint; } if (mask & GL_LIGHTING_BIT) { - GLuint i; - /* begin with memcpy */ + /* OK to memcpy */ dst->Light = src->Light; - /* fixup linked lists to prevent pointer insanity */ - make_empty_list( &(dst->Light.EnabledList) ); - for (i = 0; i < MAX_LIGHTS; i++) { - if (dst->Light.Light[i].Enabled) { - insert_at_tail(&(dst->Light.EnabledList), &(dst->Light.Light[i])); - } - } } if (mask & GL_LINE_BIT) { /* OK to memcpy */ @@ -1687,13 +1646,23 @@ _mesa_flush(curCtx); /* We used to call _glapi_check_multithread() here. Now do it in drivers */ - _glapi_set_context((void *) newCtx); - assert(_mesa_get_current_context() == newCtx); if (!newCtx) { _glapi_set_dispatch(NULL); /* none current */ + /* We need old ctx to correctly release Draw/ReadBuffer + * and avoid a surface leak in st_renderbuffer_delete. + * Therefore, first drop buffers then set new ctx to NULL. + */ + if (curCtx) { + _mesa_reference_framebuffer(&curCtx->WinSysDrawBuffer, NULL); + _mesa_reference_framebuffer(&curCtx->WinSysReadBuffer, NULL); + } + _glapi_set_context(NULL); + assert(_mesa_get_current_context() == NULL); } else { + _glapi_set_context((void *) newCtx); + assert(_mesa_get_current_context() == newCtx); _glapi_set_dispatch(newCtx->CurrentDispatch); if (drawBuffer && readBuffer) { @@ -1716,6 +1685,16 @@ } if (!newCtx->ReadBuffer || _mesa_is_winsys_fbo(newCtx->ReadBuffer)) { _mesa_reference_framebuffer(&newCtx->ReadBuffer, readBuffer); + /* In _mesa_initialize_window_framebuffer, for single-buffered + * visuals, the ColorReadBuffer is set to be GL_FRONT, even with + * GLES contexts. When calling read_buffer, we verify we are reading + * from GL_BACK in is_legal_es3_readbuffer_enum. But the default is + * incorrect, and certain dEQP tests check this. So fix it here. + */ + if (_mesa_is_gles(newCtx) && + !newCtx->ReadBuffer->Visual.doubleBufferMode) + if (newCtx->ReadBuffer->ColorReadBuffer == GL_FRONT) + newCtx->ReadBuffer->ColorReadBuffer = GL_BACK; } /* XXX only set this flag if we're really changing the draw/read @@ -1723,10 +1702,8 @@ */ newCtx->NewState |= _NEW_BUFFERS; - if (drawBuffer) { - _mesa_check_init_viewport(newCtx, - drawBuffer->Width, drawBuffer->Height); - } + _mesa_check_init_viewport(newCtx, + drawBuffer->Width, drawBuffer->Height); } if (newCtx->FirstTimeCurrent) { @@ -1894,137 +1871,6 @@ } -/* - * ARB_blend_func_extended - ERRORS section - * "The error INVALID_OPERATION is generated by Begin or any procedure that - * implicitly calls Begin if any draw buffer has a blend function requiring the - * second color input (SRC1_COLOR, ONE_MINUS_SRC1_COLOR, SRC1_ALPHA or - * ONE_MINUS_SRC1_ALPHA), and a framebuffer is bound that has more than - * the value of MAX_DUAL_SOURCE_DRAW_BUFFERS-1 active color attachements." - */ -static GLboolean -_mesa_check_blend_func_error(struct gl_context *ctx) -{ - GLuint i; - for (i = ctx->Const.MaxDualSourceDrawBuffers; - i < ctx->DrawBuffer->_NumColorDrawBuffers; - i++) { - if (ctx->Color.Blend[i]._UsesDualSrc) { - _mesa_error(ctx, GL_INVALID_OPERATION, - "dual source blend on illegal attachment"); - return GL_FALSE; - } - } - return GL_TRUE; -} - - -/** - * Prior to drawing anything with glBegin, glDrawArrays, etc. this function - * is called to see if it's valid to render. This involves checking that - * the current shader is valid and the framebuffer is complete. - * It also check the current pipeline object is valid if any. - * If an error is detected it'll be recorded here. - * \return GL_TRUE if OK to render, GL_FALSE if not - */ -GLboolean -_mesa_valid_to_render(struct gl_context *ctx, const char *where) -{ - /* This depends on having up to date derived state (shaders) */ - if (ctx->NewState) - _mesa_update_state(ctx); - - if (ctx->API == API_OPENGL_COMPAT) { - /* Any shader stages that are not supplied by the GLSL shader and have - * assembly shaders enabled must now be validated. - */ - if (!ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX] - && ctx->VertexProgram.Enabled && !ctx->VertexProgram._Enabled) { - _mesa_error(ctx, GL_INVALID_OPERATION, - "%s(vertex program not valid)", where); - return GL_FALSE; - } - - if (!ctx->_Shader->CurrentProgram[MESA_SHADER_FRAGMENT]) { - if (ctx->FragmentProgram.Enabled && !ctx->FragmentProgram._Enabled) { - _mesa_error(ctx, GL_INVALID_OPERATION, - "%s(fragment program not valid)", where); - return GL_FALSE; - } - - /* If drawing to integer-valued color buffers, there must be an - * active fragment shader (GL_EXT_texture_integer). - */ - if (ctx->DrawBuffer && ctx->DrawBuffer->_IntegerColor) { - _mesa_error(ctx, GL_INVALID_OPERATION, - "%s(integer format but no fragment shader)", where); - return GL_FALSE; - } - } - } - - /* A pipeline object is bound */ - if (ctx->_Shader->Name && !ctx->_Shader->Validated) { - if (!_mesa_validate_program_pipeline(ctx, ctx->_Shader)) { - _mesa_error(ctx, GL_INVALID_OPERATION, - "glValidateProgramPipeline failed to validate the " - "pipeline"); - return GL_FALSE; - } - } - - /* If a program is active and SSO not in use, check if validation of - * samplers succeeded for the active program. */ - if (ctx->_Shader->ActiveProgram && ctx->_Shader != ctx->Pipeline.Current) { - char errMsg[100]; - if (!_mesa_sampler_uniforms_are_valid(ctx->_Shader->ActiveProgram, - errMsg, 100)) { - _mesa_error(ctx, GL_INVALID_OPERATION, "%s", errMsg); - return GL_FALSE; - } - } - - if (ctx->DrawBuffer->_Status != GL_FRAMEBUFFER_COMPLETE_EXT) { - _mesa_error(ctx, GL_INVALID_FRAMEBUFFER_OPERATION_EXT, - "%s(incomplete framebuffer)", where); - return GL_FALSE; - } - - if (_mesa_check_blend_func_error(ctx) == GL_FALSE) { - return GL_FALSE; - } - -#ifdef DEBUG - if (ctx->_Shader->Flags & GLSL_LOG) { - struct gl_shader_program **shProg = ctx->_Shader->CurrentProgram; - gl_shader_stage i; - - for (i = 0; i < MESA_SHADER_STAGES; i++) { - if (shProg[i] == NULL || shProg[i]->_Used - || shProg[i]->_LinkedShaders[i] == NULL) - continue; - - /* This is the first time this shader is being used. - * Append shader's constants/uniforms to log file. - * - * Only log data for the program target that matches the shader - * target. It's possible to have a program bound to the vertex - * shader target that also supplied a fragment shader. If that - * program isn't also bound to the fragment shader target we don't - * want to log its fragment data. - */ - _mesa_append_uniforms_to_file(shProg[i]->_LinkedShaders[i]); - } - - for (i = 0; i < MESA_SHADER_STAGES; i++) { - if (shProg[i] != NULL) - shProg[i]->_Used = GL_TRUE; - } - } -#endif - - return GL_TRUE; -} /*@}*/ diff -Nru mesa-12.0.6/src/mesa/main/context.h mesa-17.0.7/src/mesa/main/context.h --- mesa-12.0.6/src/mesa/main/context.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/context.h 2017-06-01 10:37:10.000000000 +0000 @@ -113,12 +113,6 @@ struct gl_context *share_list, const struct dd_function_table *driverFunctions); -extern struct gl_context * -_mesa_create_context(gl_api api, - const struct gl_config *visual, - struct gl_context *share_list, - const struct dd_function_table *driverFunctions); - extern void _mesa_free_context_data( struct gl_context *ctx ); @@ -149,9 +143,6 @@ _mesa_init_constants(struct gl_constants *consts, gl_api api); extern void -_mesa_init_get_hash(struct gl_context *ctx); - -extern void _mesa_notifySwapBuffers(struct gl_context *gc); @@ -161,9 +152,6 @@ extern void _mesa_set_context_lost_dispatch(struct gl_context *ctx); -extern GLboolean -_mesa_valid_to_render(struct gl_context *ctx, const char *where); - /** \name Miscellaneous */ @@ -327,6 +315,16 @@ /** + * Checks if the context is for GLES 3.2 or later + */ +static inline bool +_mesa_is_gles32(const struct gl_context *ctx) +{ + return ctx->API == API_OPENGLES2 && ctx->Version >= 32; +} + + +/** * Checks if the context supports geometry shaders. */ static inline bool @@ -343,30 +341,29 @@ static inline bool _mesa_has_compute_shaders(const struct gl_context *ctx) { - return (ctx->API == API_OPENGL_CORE && ctx->Extensions.ARB_compute_shader) || + return _mesa_has_ARB_compute_shader(ctx) || (ctx->API == API_OPENGLES2 && ctx->Version >= 31); } /** - * Checks if the context supports shader subroutines. - */ -static inline bool -_mesa_has_shader_subroutine(const struct gl_context *ctx) -{ - return ctx->API == API_OPENGL_CORE && - (ctx->Version >= 40 || ctx->Extensions.ARB_shader_subroutine); -} - -/** * Checks if the context supports tessellation. */ static inline GLboolean _mesa_has_tessellation(const struct gl_context *ctx) { - return ctx->API == API_OPENGL_CORE && - ctx->Extensions.ARB_tessellation_shader; + /* _mesa_has_EXT_tessellation_shader(ctx) is redundant with the OES + * check, so don't bother calling it. + */ + return _mesa_has_OES_tessellation_shader(ctx) || + _mesa_has_ARB_tessellation_shader(ctx); } +static inline bool +_mesa_has_texture_cube_map_array(const struct gl_context *ctx) +{ + return _mesa_has_ARB_texture_cube_map_array(ctx) || + _mesa_has_OES_texture_cube_map_array(ctx); +} #ifdef __cplusplus } diff -Nru mesa-12.0.6/src/mesa/main/copyimage.c mesa-17.0.7/src/mesa/main/copyimage.c --- mesa-12.0.6/src/mesa/main/copyimage.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/copyimage.c 2017-06-01 10:37:10.000000000 +0000 @@ -138,6 +138,12 @@ struct gl_texture_object *texObj = _mesa_lookup_texture(ctx, name); if (!texObj) { + /* + * From GL_ARB_copy_image specification: + * "INVALID_VALUE is generated if either or does + * not correspond to a valid renderbuffer or texture object according + * to the corresponding target parameter." + */ _mesa_error(ctx, GL_INVALID_VALUE, "glCopyImageSubData(%sName = %u)", dbg_prefix, name); return false; @@ -154,12 +160,11 @@ /* Note that target will not be a cube face name */ if (texObj->Target != target) { /* - * From GL_ARB_copy_image specification: - * "INVALID_VALUE is generated if either or does - * not correspond to a valid renderbuffer or texture object according - * to the corresponding target parameter." + * From GL_ARB_copy_image_specification: + * "INVALID_ENUM is generated if the target does not match the type + * of the object." */ - _mesa_error(ctx, GL_INVALID_VALUE, + _mesa_error(ctx, GL_INVALID_ENUM, "glCopyImageSubData(%sTarget = %s)", dbg_prefix, _mesa_enum_to_string(target)); return false; diff -Nru mesa-12.0.6/src/mesa/main/dd.h mesa-17.0.7/src/mesa/main/dd.h --- mesa-12.0.6/src/mesa/main/dd.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/dd.h 2017-06-01 10:37:10.000000000 +0000 @@ -308,9 +308,10 @@ * \return GL_TRUE if the image is OK, GL_FALSE if too large */ GLboolean (*TestProxyTexImage)(struct gl_context *ctx, GLenum target, - GLint level, mesa_format format, + GLuint numLevels, GLint level, + mesa_format format, GLuint numSamples, GLint width, GLint height, - GLint depth, GLint border); + GLint depth); /*@}*/ @@ -473,7 +474,7 @@ struct gl_program *prog); /** Allocate a new program */ struct gl_program * (*NewProgram)(struct gl_context *ctx, GLenum target, - GLuint id); + GLuint id, bool is_arb_asm); /** Delete a program */ void (*DeleteProgram)(struct gl_context *ctx, struct gl_program *prog); /** @@ -609,10 +610,9 @@ /** Set texture environment parameters */ void (*TexEnv)(struct gl_context *ctx, GLenum target, GLenum pname, const GLfloat *param); - /** Set texture parameters */ + /** Set texture parameter (callee gets param value from the texObj) */ void (*TexParameter)(struct gl_context *ctx, - struct gl_texture_object *texObj, - GLenum pname, const GLfloat *params); + struct gl_texture_object *texObj, GLenum pname); /** Set the viewport */ void (*Viewport)(struct gl_context *ctx); /*@}*/ @@ -780,15 +780,6 @@ /*@}*/ /** - * \name GLSL-related functions (ARB extensions and OpenGL 2.x) - */ - /*@{*/ - struct gl_shader *(*NewShader)(struct gl_context *ctx, - GLuint name, GLenum type); - void (*UseProgram)(struct gl_context *ctx, struct gl_shader_program *shProg); - /*@}*/ - - /** * \name GREMEDY debug/marker functions */ /*@{*/ @@ -959,6 +950,18 @@ /** @} */ /** + * GL_MESA_shader_framebuffer_fetch_non_coherent rendering barrier. + * + * On return from this function any framebuffer contents written by + * previous draw commands are guaranteed to be visible from subsequent + * fragment shader invocations using the + * MESA_shader_framebuffer_fetch_non_coherent interface. + */ + /** @{ */ + void (*BlendBarrier)(struct gl_context *ctx); + /** @} */ + + /** * \name GL_ARB_compute_shader interface */ /*@{*/ @@ -967,6 +970,15 @@ /*@}*/ /** + * \name GL_ARB_compute_variable_group_size interface + */ + /*@{*/ + void (*DispatchComputeGroupSize)(struct gl_context *ctx, + const GLuint *num_groups, + const GLuint *group_size); + /*@}*/ + + /** * Query information about memory. Device memory is e.g. VRAM. Staging * memory is e.g. GART. All sizes are in kilobytes. */ diff -Nru mesa-12.0.6/src/mesa/main/debug.c mesa-17.0.7/src/mesa/main/debug.c --- mesa-12.0.6/src/mesa/main/debug.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/debug.c 2017-06-01 10:37:10.000000000 +0000 @@ -189,7 +189,8 @@ { "silent", DEBUG_SILENT }, /* turn off debug messages */ { "flush", DEBUG_ALWAYS_FLUSH }, /* flush after each drawing command */ { "incomplete_tex", DEBUG_INCOMPLETE_TEXTURE }, - { "incomplete_fbo", DEBUG_INCOMPLETE_FBO } + { "incomplete_fbo", DEBUG_INCOMPLETE_FBO }, + { "context", DEBUG_CONTEXT } /* force set GL_CONTEXT_FLAG_DEBUG_BIT flag */ }; GLuint i; diff -Nru mesa-12.0.6/src/mesa/main/debug_output.c mesa-17.0.7/src/mesa/main/debug_output.c --- mesa-12.0.6/src/mesa/main/debug_output.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/debug_output.c 2017-06-01 10:37:10.000000000 +0000 @@ -99,6 +99,7 @@ const void *CallbackData; GLboolean SyncOutput; GLboolean DebugOutput; + GLboolean LogToStderr; struct gl_debug_group *Groups[MAX_DEBUG_GROUP_STACK_DEPTH]; struct gl_debug_message GroupMessages[MAX_DEBUG_GROUP_STACK_DEPTH]; @@ -617,6 +618,10 @@ GLint nextEmpty; struct gl_debug_message *emptySlot; + if (debug->LogToStderr) { + _mesa_log("Mesa debug output: %.*s\n", len, buf); + } + assert(len < MAX_DEBUG_MESSAGE_LENGTH); if (log->NumMessages == MAX_DEBUG_LOGGED_MESSAGES) @@ -845,6 +850,7 @@ } if (ctx->Debug->Callback) { + /* Call the user's callback function */ GLenum gl_source = debug_source_enums[source]; GLenum gl_type = debug_type_enums[type]; GLenum gl_severity = debug_severity_enums[severity]; @@ -860,6 +866,7 @@ callback(gl_source, gl_type, id, gl_severity, len, buf, data); } else { + /* add debug message to queue */ debug_log_message(ctx->Debug, source, type, id, severity, len, buf); _mesa_unlock_debug_state(ctx); } @@ -1267,6 +1274,21 @@ _mesa_init_debug_output(struct gl_context *ctx) { mtx_init(&ctx->DebugMutex, mtx_plain); + + if (MESA_DEBUG_FLAGS & DEBUG_CONTEXT) { + /* If the MESA_DEBUG env is set to "context", we'll turn on the + * GL_CONTEXT_FLAG_DEBUG_BIT context flag and log debug output + * messages to stderr (or whatever MESA_LOG_FILE points at). + */ + struct gl_debug_state *debug = _mesa_lock_debug_state(ctx); + if (!debug) { + return; + } + debug->DebugOutput = GL_TRUE; + debug->LogToStderr = GL_TRUE; + ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_DEBUG_BIT; + _mesa_unlock_debug_state(ctx); + } } diff -Nru mesa-12.0.6/src/mesa/main/dispatch.h mesa-17.0.7/src/mesa/main/dispatch.h --- mesa-12.0.6/src/mesa/main/dispatch.h 2017-01-24 01:42:47.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/dispatch.h 2017-06-01 10:37:46.000000000 +0000 @@ -57,7 +57,7 @@ } while(0) /* total number of offsets below */ -#define _gloffset_COUNT 1324 +#define _gloffset_COUNT 1330 #define _gloffset_NewList 0 #define _gloffset_EndList 1 @@ -467,7 +467,7 @@ #define _gloffset_MultiTexCoord4iv 405 #define _gloffset_MultiTexCoord4s 406 #define _gloffset_MultiTexCoord4sv 407 -#define driDispatchRemapTable_size 916 +#define driDispatchRemapTable_size 922 extern int driDispatchRemapTable[ driDispatchRemapTable_size ]; #define CompressedTexImage1D_remap_index 0 @@ -974,418 +974,424 @@ #define BindSamplers_remap_index 501 #define BindTextures_remap_index 502 #define BindVertexBuffers_remap_index 503 -#define MultiDrawArraysIndirectCountARB_remap_index 504 -#define MultiDrawElementsIndirectCountARB_remap_index 505 -#define ClipControl_remap_index 506 -#define BindTextureUnit_remap_index 507 -#define BlitNamedFramebuffer_remap_index 508 -#define CheckNamedFramebufferStatus_remap_index 509 -#define ClearNamedBufferData_remap_index 510 -#define ClearNamedBufferSubData_remap_index 511 -#define ClearNamedFramebufferfi_remap_index 512 -#define ClearNamedFramebufferfv_remap_index 513 -#define ClearNamedFramebufferiv_remap_index 514 -#define ClearNamedFramebufferuiv_remap_index 515 -#define CompressedTextureSubImage1D_remap_index 516 -#define CompressedTextureSubImage2D_remap_index 517 -#define CompressedTextureSubImage3D_remap_index 518 -#define CopyNamedBufferSubData_remap_index 519 -#define CopyTextureSubImage1D_remap_index 520 -#define CopyTextureSubImage2D_remap_index 521 -#define CopyTextureSubImage3D_remap_index 522 -#define CreateBuffers_remap_index 523 -#define CreateFramebuffers_remap_index 524 -#define CreateProgramPipelines_remap_index 525 -#define CreateQueries_remap_index 526 -#define CreateRenderbuffers_remap_index 527 -#define CreateSamplers_remap_index 528 -#define CreateTextures_remap_index 529 -#define CreateTransformFeedbacks_remap_index 530 -#define CreateVertexArrays_remap_index 531 -#define DisableVertexArrayAttrib_remap_index 532 -#define EnableVertexArrayAttrib_remap_index 533 -#define FlushMappedNamedBufferRange_remap_index 534 -#define GenerateTextureMipmap_remap_index 535 -#define GetCompressedTextureImage_remap_index 536 -#define GetNamedBufferParameteri64v_remap_index 537 -#define GetNamedBufferParameteriv_remap_index 538 -#define GetNamedBufferPointerv_remap_index 539 -#define GetNamedBufferSubData_remap_index 540 -#define GetNamedFramebufferAttachmentParameteriv_remap_index 541 -#define GetNamedFramebufferParameteriv_remap_index 542 -#define GetNamedRenderbufferParameteriv_remap_index 543 -#define GetQueryBufferObjecti64v_remap_index 544 -#define GetQueryBufferObjectiv_remap_index 545 -#define GetQueryBufferObjectui64v_remap_index 546 -#define GetQueryBufferObjectuiv_remap_index 547 -#define GetTextureImage_remap_index 548 -#define GetTextureLevelParameterfv_remap_index 549 -#define GetTextureLevelParameteriv_remap_index 550 -#define GetTextureParameterIiv_remap_index 551 -#define GetTextureParameterIuiv_remap_index 552 -#define GetTextureParameterfv_remap_index 553 -#define GetTextureParameteriv_remap_index 554 -#define GetTransformFeedbacki64_v_remap_index 555 -#define GetTransformFeedbacki_v_remap_index 556 -#define GetTransformFeedbackiv_remap_index 557 -#define GetVertexArrayIndexed64iv_remap_index 558 -#define GetVertexArrayIndexediv_remap_index 559 -#define GetVertexArrayiv_remap_index 560 -#define InvalidateNamedFramebufferData_remap_index 561 -#define InvalidateNamedFramebufferSubData_remap_index 562 -#define MapNamedBuffer_remap_index 563 -#define MapNamedBufferRange_remap_index 564 -#define NamedBufferData_remap_index 565 -#define NamedBufferStorage_remap_index 566 -#define NamedBufferSubData_remap_index 567 -#define NamedFramebufferDrawBuffer_remap_index 568 -#define NamedFramebufferDrawBuffers_remap_index 569 -#define NamedFramebufferParameteri_remap_index 570 -#define NamedFramebufferReadBuffer_remap_index 571 -#define NamedFramebufferRenderbuffer_remap_index 572 -#define NamedFramebufferTexture_remap_index 573 -#define NamedFramebufferTextureLayer_remap_index 574 -#define NamedRenderbufferStorage_remap_index 575 -#define NamedRenderbufferStorageMultisample_remap_index 576 -#define TextureBuffer_remap_index 577 -#define TextureBufferRange_remap_index 578 -#define TextureParameterIiv_remap_index 579 -#define TextureParameterIuiv_remap_index 580 -#define TextureParameterf_remap_index 581 -#define TextureParameterfv_remap_index 582 -#define TextureParameteri_remap_index 583 -#define TextureParameteriv_remap_index 584 -#define TextureStorage1D_remap_index 585 -#define TextureStorage2D_remap_index 586 -#define TextureStorage2DMultisample_remap_index 587 -#define TextureStorage3D_remap_index 588 -#define TextureStorage3DMultisample_remap_index 589 -#define TextureSubImage1D_remap_index 590 -#define TextureSubImage2D_remap_index 591 -#define TextureSubImage3D_remap_index 592 -#define TransformFeedbackBufferBase_remap_index 593 -#define TransformFeedbackBufferRange_remap_index 594 -#define UnmapNamedBuffer_remap_index 595 -#define VertexArrayAttribBinding_remap_index 596 -#define VertexArrayAttribFormat_remap_index 597 -#define VertexArrayAttribIFormat_remap_index 598 -#define VertexArrayAttribLFormat_remap_index 599 -#define VertexArrayBindingDivisor_remap_index 600 -#define VertexArrayElementBuffer_remap_index 601 -#define VertexArrayVertexBuffer_remap_index 602 -#define VertexArrayVertexBuffers_remap_index 603 -#define GetCompressedTextureSubImage_remap_index 604 -#define GetTextureSubImage_remap_index 605 -#define InvalidateBufferData_remap_index 606 -#define InvalidateBufferSubData_remap_index 607 -#define InvalidateFramebuffer_remap_index 608 -#define InvalidateSubFramebuffer_remap_index 609 -#define InvalidateTexImage_remap_index 610 -#define InvalidateTexSubImage_remap_index 611 -#define PolygonOffsetEXT_remap_index 612 -#define DrawTexfOES_remap_index 613 -#define DrawTexfvOES_remap_index 614 -#define DrawTexiOES_remap_index 615 -#define DrawTexivOES_remap_index 616 -#define DrawTexsOES_remap_index 617 -#define DrawTexsvOES_remap_index 618 -#define DrawTexxOES_remap_index 619 -#define DrawTexxvOES_remap_index 620 -#define PointSizePointerOES_remap_index 621 -#define QueryMatrixxOES_remap_index 622 -#define SampleMaskSGIS_remap_index 623 -#define SamplePatternSGIS_remap_index 624 -#define ColorPointerEXT_remap_index 625 -#define EdgeFlagPointerEXT_remap_index 626 -#define IndexPointerEXT_remap_index 627 -#define NormalPointerEXT_remap_index 628 -#define TexCoordPointerEXT_remap_index 629 -#define VertexPointerEXT_remap_index 630 -#define DiscardFramebufferEXT_remap_index 631 -#define ActiveShaderProgram_remap_index 632 -#define BindProgramPipeline_remap_index 633 -#define CreateShaderProgramv_remap_index 634 -#define DeleteProgramPipelines_remap_index 635 -#define GenProgramPipelines_remap_index 636 -#define GetProgramPipelineInfoLog_remap_index 637 -#define GetProgramPipelineiv_remap_index 638 -#define IsProgramPipeline_remap_index 639 -#define LockArraysEXT_remap_index 640 -#define ProgramUniform1d_remap_index 641 -#define ProgramUniform1dv_remap_index 642 -#define ProgramUniform1f_remap_index 643 -#define ProgramUniform1fv_remap_index 644 -#define ProgramUniform1i_remap_index 645 -#define ProgramUniform1iv_remap_index 646 -#define ProgramUniform1ui_remap_index 647 -#define ProgramUniform1uiv_remap_index 648 -#define ProgramUniform2d_remap_index 649 -#define ProgramUniform2dv_remap_index 650 -#define ProgramUniform2f_remap_index 651 -#define ProgramUniform2fv_remap_index 652 -#define ProgramUniform2i_remap_index 653 -#define ProgramUniform2iv_remap_index 654 -#define ProgramUniform2ui_remap_index 655 -#define ProgramUniform2uiv_remap_index 656 -#define ProgramUniform3d_remap_index 657 -#define ProgramUniform3dv_remap_index 658 -#define ProgramUniform3f_remap_index 659 -#define ProgramUniform3fv_remap_index 660 -#define ProgramUniform3i_remap_index 661 -#define ProgramUniform3iv_remap_index 662 -#define ProgramUniform3ui_remap_index 663 -#define ProgramUniform3uiv_remap_index 664 -#define ProgramUniform4d_remap_index 665 -#define ProgramUniform4dv_remap_index 666 -#define ProgramUniform4f_remap_index 667 -#define ProgramUniform4fv_remap_index 668 -#define ProgramUniform4i_remap_index 669 -#define ProgramUniform4iv_remap_index 670 -#define ProgramUniform4ui_remap_index 671 -#define ProgramUniform4uiv_remap_index 672 -#define ProgramUniformMatrix2dv_remap_index 673 -#define ProgramUniformMatrix2fv_remap_index 674 -#define ProgramUniformMatrix2x3dv_remap_index 675 -#define ProgramUniformMatrix2x3fv_remap_index 676 -#define ProgramUniformMatrix2x4dv_remap_index 677 -#define ProgramUniformMatrix2x4fv_remap_index 678 -#define ProgramUniformMatrix3dv_remap_index 679 -#define ProgramUniformMatrix3fv_remap_index 680 -#define ProgramUniformMatrix3x2dv_remap_index 681 -#define ProgramUniformMatrix3x2fv_remap_index 682 -#define ProgramUniformMatrix3x4dv_remap_index 683 -#define ProgramUniformMatrix3x4fv_remap_index 684 -#define ProgramUniformMatrix4dv_remap_index 685 -#define ProgramUniformMatrix4fv_remap_index 686 -#define ProgramUniformMatrix4x2dv_remap_index 687 -#define ProgramUniformMatrix4x2fv_remap_index 688 -#define ProgramUniformMatrix4x3dv_remap_index 689 -#define ProgramUniformMatrix4x3fv_remap_index 690 -#define UnlockArraysEXT_remap_index 691 -#define UseProgramStages_remap_index 692 -#define ValidateProgramPipeline_remap_index 693 -#define DebugMessageCallback_remap_index 694 -#define DebugMessageControl_remap_index 695 -#define DebugMessageInsert_remap_index 696 -#define GetDebugMessageLog_remap_index 697 -#define GetObjectLabel_remap_index 698 -#define GetObjectPtrLabel_remap_index 699 -#define ObjectLabel_remap_index 700 -#define ObjectPtrLabel_remap_index 701 -#define PopDebugGroup_remap_index 702 -#define PushDebugGroup_remap_index 703 -#define SecondaryColor3fEXT_remap_index 704 -#define SecondaryColor3fvEXT_remap_index 705 -#define MultiDrawElementsEXT_remap_index 706 -#define FogCoordfEXT_remap_index 707 -#define FogCoordfvEXT_remap_index 708 -#define ResizeBuffersMESA_remap_index 709 -#define WindowPos4dMESA_remap_index 710 -#define WindowPos4dvMESA_remap_index 711 -#define WindowPos4fMESA_remap_index 712 -#define WindowPos4fvMESA_remap_index 713 -#define WindowPos4iMESA_remap_index 714 -#define WindowPos4ivMESA_remap_index 715 -#define WindowPos4sMESA_remap_index 716 -#define WindowPos4svMESA_remap_index 717 -#define MultiModeDrawArraysIBM_remap_index 718 -#define MultiModeDrawElementsIBM_remap_index 719 -#define AreProgramsResidentNV_remap_index 720 -#define ExecuteProgramNV_remap_index 721 -#define GetProgramParameterdvNV_remap_index 722 -#define GetProgramParameterfvNV_remap_index 723 -#define GetProgramStringNV_remap_index 724 -#define GetProgramivNV_remap_index 725 -#define GetTrackMatrixivNV_remap_index 726 -#define GetVertexAttribdvNV_remap_index 727 -#define GetVertexAttribfvNV_remap_index 728 -#define GetVertexAttribivNV_remap_index 729 -#define LoadProgramNV_remap_index 730 -#define ProgramParameters4dvNV_remap_index 731 -#define ProgramParameters4fvNV_remap_index 732 -#define RequestResidentProgramsNV_remap_index 733 -#define TrackMatrixNV_remap_index 734 -#define VertexAttrib1dNV_remap_index 735 -#define VertexAttrib1dvNV_remap_index 736 -#define VertexAttrib1fNV_remap_index 737 -#define VertexAttrib1fvNV_remap_index 738 -#define VertexAttrib1sNV_remap_index 739 -#define VertexAttrib1svNV_remap_index 740 -#define VertexAttrib2dNV_remap_index 741 -#define VertexAttrib2dvNV_remap_index 742 -#define VertexAttrib2fNV_remap_index 743 -#define VertexAttrib2fvNV_remap_index 744 -#define VertexAttrib2sNV_remap_index 745 -#define VertexAttrib2svNV_remap_index 746 -#define VertexAttrib3dNV_remap_index 747 -#define VertexAttrib3dvNV_remap_index 748 -#define VertexAttrib3fNV_remap_index 749 -#define VertexAttrib3fvNV_remap_index 750 -#define VertexAttrib3sNV_remap_index 751 -#define VertexAttrib3svNV_remap_index 752 -#define VertexAttrib4dNV_remap_index 753 -#define VertexAttrib4dvNV_remap_index 754 -#define VertexAttrib4fNV_remap_index 755 -#define VertexAttrib4fvNV_remap_index 756 -#define VertexAttrib4sNV_remap_index 757 -#define VertexAttrib4svNV_remap_index 758 -#define VertexAttrib4ubNV_remap_index 759 -#define VertexAttrib4ubvNV_remap_index 760 -#define VertexAttribPointerNV_remap_index 761 -#define VertexAttribs1dvNV_remap_index 762 -#define VertexAttribs1fvNV_remap_index 763 -#define VertexAttribs1svNV_remap_index 764 -#define VertexAttribs2dvNV_remap_index 765 -#define VertexAttribs2fvNV_remap_index 766 -#define VertexAttribs2svNV_remap_index 767 -#define VertexAttribs3dvNV_remap_index 768 -#define VertexAttribs3fvNV_remap_index 769 -#define VertexAttribs3svNV_remap_index 770 -#define VertexAttribs4dvNV_remap_index 771 -#define VertexAttribs4fvNV_remap_index 772 -#define VertexAttribs4svNV_remap_index 773 -#define VertexAttribs4ubvNV_remap_index 774 -#define GetTexBumpParameterfvATI_remap_index 775 -#define GetTexBumpParameterivATI_remap_index 776 -#define TexBumpParameterfvATI_remap_index 777 -#define TexBumpParameterivATI_remap_index 778 -#define AlphaFragmentOp1ATI_remap_index 779 -#define AlphaFragmentOp2ATI_remap_index 780 -#define AlphaFragmentOp3ATI_remap_index 781 -#define BeginFragmentShaderATI_remap_index 782 -#define BindFragmentShaderATI_remap_index 783 -#define ColorFragmentOp1ATI_remap_index 784 -#define ColorFragmentOp2ATI_remap_index 785 -#define ColorFragmentOp3ATI_remap_index 786 -#define DeleteFragmentShaderATI_remap_index 787 -#define EndFragmentShaderATI_remap_index 788 -#define GenFragmentShadersATI_remap_index 789 -#define PassTexCoordATI_remap_index 790 -#define SampleMapATI_remap_index 791 -#define SetFragmentShaderConstantATI_remap_index 792 -#define ActiveStencilFaceEXT_remap_index 793 -#define BindVertexArrayAPPLE_remap_index 794 -#define GenVertexArraysAPPLE_remap_index 795 -#define GetProgramNamedParameterdvNV_remap_index 796 -#define GetProgramNamedParameterfvNV_remap_index 797 -#define ProgramNamedParameter4dNV_remap_index 798 -#define ProgramNamedParameter4dvNV_remap_index 799 -#define ProgramNamedParameter4fNV_remap_index 800 -#define ProgramNamedParameter4fvNV_remap_index 801 -#define PrimitiveRestartNV_remap_index 802 -#define GetTexGenxvOES_remap_index 803 -#define TexGenxOES_remap_index 804 -#define TexGenxvOES_remap_index 805 -#define DepthBoundsEXT_remap_index 806 -#define BindFramebufferEXT_remap_index 807 -#define BindRenderbufferEXT_remap_index 808 -#define StringMarkerGREMEDY_remap_index 809 -#define BufferParameteriAPPLE_remap_index 810 -#define FlushMappedBufferRangeAPPLE_remap_index 811 -#define VertexAttribI1iEXT_remap_index 812 -#define VertexAttribI1uiEXT_remap_index 813 -#define VertexAttribI2iEXT_remap_index 814 -#define VertexAttribI2ivEXT_remap_index 815 -#define VertexAttribI2uiEXT_remap_index 816 -#define VertexAttribI2uivEXT_remap_index 817 -#define VertexAttribI3iEXT_remap_index 818 -#define VertexAttribI3ivEXT_remap_index 819 -#define VertexAttribI3uiEXT_remap_index 820 -#define VertexAttribI3uivEXT_remap_index 821 -#define VertexAttribI4iEXT_remap_index 822 -#define VertexAttribI4ivEXT_remap_index 823 -#define VertexAttribI4uiEXT_remap_index 824 -#define VertexAttribI4uivEXT_remap_index 825 -#define ClearColorIiEXT_remap_index 826 -#define ClearColorIuiEXT_remap_index 827 -#define BindBufferOffsetEXT_remap_index 828 -#define BeginPerfMonitorAMD_remap_index 829 -#define DeletePerfMonitorsAMD_remap_index 830 -#define EndPerfMonitorAMD_remap_index 831 -#define GenPerfMonitorsAMD_remap_index 832 -#define GetPerfMonitorCounterDataAMD_remap_index 833 -#define GetPerfMonitorCounterInfoAMD_remap_index 834 -#define GetPerfMonitorCounterStringAMD_remap_index 835 -#define GetPerfMonitorCountersAMD_remap_index 836 -#define GetPerfMonitorGroupStringAMD_remap_index 837 -#define GetPerfMonitorGroupsAMD_remap_index 838 -#define SelectPerfMonitorCountersAMD_remap_index 839 -#define GetObjectParameterivAPPLE_remap_index 840 -#define ObjectPurgeableAPPLE_remap_index 841 -#define ObjectUnpurgeableAPPLE_remap_index 842 -#define ActiveProgramEXT_remap_index 843 -#define CreateShaderProgramEXT_remap_index 844 -#define UseShaderProgramEXT_remap_index 845 -#define TextureBarrierNV_remap_index 846 -#define VDPAUFiniNV_remap_index 847 -#define VDPAUGetSurfaceivNV_remap_index 848 -#define VDPAUInitNV_remap_index 849 -#define VDPAUIsSurfaceNV_remap_index 850 -#define VDPAUMapSurfacesNV_remap_index 851 -#define VDPAURegisterOutputSurfaceNV_remap_index 852 -#define VDPAURegisterVideoSurfaceNV_remap_index 853 -#define VDPAUSurfaceAccessNV_remap_index 854 -#define VDPAUUnmapSurfacesNV_remap_index 855 -#define VDPAUUnregisterSurfaceNV_remap_index 856 -#define BeginPerfQueryINTEL_remap_index 857 -#define CreatePerfQueryINTEL_remap_index 858 -#define DeletePerfQueryINTEL_remap_index 859 -#define EndPerfQueryINTEL_remap_index 860 -#define GetFirstPerfQueryIdINTEL_remap_index 861 -#define GetNextPerfQueryIdINTEL_remap_index 862 -#define GetPerfCounterInfoINTEL_remap_index 863 -#define GetPerfQueryDataINTEL_remap_index 864 -#define GetPerfQueryIdByNameINTEL_remap_index 865 -#define GetPerfQueryInfoINTEL_remap_index 866 -#define PolygonOffsetClampEXT_remap_index 867 -#define StencilFuncSeparateATI_remap_index 868 -#define ProgramEnvParameters4fvEXT_remap_index 869 -#define ProgramLocalParameters4fvEXT_remap_index 870 -#define EGLImageTargetRenderbufferStorageOES_remap_index 871 -#define EGLImageTargetTexture2DOES_remap_index 872 -#define AlphaFuncx_remap_index 873 -#define ClearColorx_remap_index 874 -#define ClearDepthx_remap_index 875 -#define Color4x_remap_index 876 -#define DepthRangex_remap_index 877 -#define Fogx_remap_index 878 -#define Fogxv_remap_index 879 -#define Frustumf_remap_index 880 -#define Frustumx_remap_index 881 -#define LightModelx_remap_index 882 -#define LightModelxv_remap_index 883 -#define Lightx_remap_index 884 -#define Lightxv_remap_index 885 -#define LineWidthx_remap_index 886 -#define LoadMatrixx_remap_index 887 -#define Materialx_remap_index 888 -#define Materialxv_remap_index 889 -#define MultMatrixx_remap_index 890 -#define MultiTexCoord4x_remap_index 891 -#define Normal3x_remap_index 892 -#define Orthof_remap_index 893 -#define Orthox_remap_index 894 -#define PointSizex_remap_index 895 -#define PolygonOffsetx_remap_index 896 -#define Rotatex_remap_index 897 -#define SampleCoveragex_remap_index 898 -#define Scalex_remap_index 899 -#define TexEnvx_remap_index 900 -#define TexEnvxv_remap_index 901 -#define TexParameterx_remap_index 902 -#define Translatex_remap_index 903 -#define ClipPlanef_remap_index 904 -#define ClipPlanex_remap_index 905 -#define GetClipPlanef_remap_index 906 -#define GetClipPlanex_remap_index 907 -#define GetFixedv_remap_index 908 -#define GetLightxv_remap_index 909 -#define GetMaterialxv_remap_index 910 -#define GetTexEnvxv_remap_index 911 -#define GetTexParameterxv_remap_index 912 -#define PointParameterx_remap_index 913 -#define PointParameterxv_remap_index 914 -#define TexParameterxv_remap_index 915 +#define DispatchComputeGroupSizeARB_remap_index 504 +#define MultiDrawArraysIndirectCountARB_remap_index 505 +#define MultiDrawElementsIndirectCountARB_remap_index 506 +#define ClipControl_remap_index 507 +#define BindTextureUnit_remap_index 508 +#define BlitNamedFramebuffer_remap_index 509 +#define CheckNamedFramebufferStatus_remap_index 510 +#define ClearNamedBufferData_remap_index 511 +#define ClearNamedBufferSubData_remap_index 512 +#define ClearNamedFramebufferfi_remap_index 513 +#define ClearNamedFramebufferfv_remap_index 514 +#define ClearNamedFramebufferiv_remap_index 515 +#define ClearNamedFramebufferuiv_remap_index 516 +#define CompressedTextureSubImage1D_remap_index 517 +#define CompressedTextureSubImage2D_remap_index 518 +#define CompressedTextureSubImage3D_remap_index 519 +#define CopyNamedBufferSubData_remap_index 520 +#define CopyTextureSubImage1D_remap_index 521 +#define CopyTextureSubImage2D_remap_index 522 +#define CopyTextureSubImage3D_remap_index 523 +#define CreateBuffers_remap_index 524 +#define CreateFramebuffers_remap_index 525 +#define CreateProgramPipelines_remap_index 526 +#define CreateQueries_remap_index 527 +#define CreateRenderbuffers_remap_index 528 +#define CreateSamplers_remap_index 529 +#define CreateTextures_remap_index 530 +#define CreateTransformFeedbacks_remap_index 531 +#define CreateVertexArrays_remap_index 532 +#define DisableVertexArrayAttrib_remap_index 533 +#define EnableVertexArrayAttrib_remap_index 534 +#define FlushMappedNamedBufferRange_remap_index 535 +#define GenerateTextureMipmap_remap_index 536 +#define GetCompressedTextureImage_remap_index 537 +#define GetNamedBufferParameteri64v_remap_index 538 +#define GetNamedBufferParameteriv_remap_index 539 +#define GetNamedBufferPointerv_remap_index 540 +#define GetNamedBufferSubData_remap_index 541 +#define GetNamedFramebufferAttachmentParameteriv_remap_index 542 +#define GetNamedFramebufferParameteriv_remap_index 543 +#define GetNamedRenderbufferParameteriv_remap_index 544 +#define GetQueryBufferObjecti64v_remap_index 545 +#define GetQueryBufferObjectiv_remap_index 546 +#define GetQueryBufferObjectui64v_remap_index 547 +#define GetQueryBufferObjectuiv_remap_index 548 +#define GetTextureImage_remap_index 549 +#define GetTextureLevelParameterfv_remap_index 550 +#define GetTextureLevelParameteriv_remap_index 551 +#define GetTextureParameterIiv_remap_index 552 +#define GetTextureParameterIuiv_remap_index 553 +#define GetTextureParameterfv_remap_index 554 +#define GetTextureParameteriv_remap_index 555 +#define GetTransformFeedbacki64_v_remap_index 556 +#define GetTransformFeedbacki_v_remap_index 557 +#define GetTransformFeedbackiv_remap_index 558 +#define GetVertexArrayIndexed64iv_remap_index 559 +#define GetVertexArrayIndexediv_remap_index 560 +#define GetVertexArrayiv_remap_index 561 +#define InvalidateNamedFramebufferData_remap_index 562 +#define InvalidateNamedFramebufferSubData_remap_index 563 +#define MapNamedBuffer_remap_index 564 +#define MapNamedBufferRange_remap_index 565 +#define NamedBufferData_remap_index 566 +#define NamedBufferStorage_remap_index 567 +#define NamedBufferSubData_remap_index 568 +#define NamedFramebufferDrawBuffer_remap_index 569 +#define NamedFramebufferDrawBuffers_remap_index 570 +#define NamedFramebufferParameteri_remap_index 571 +#define NamedFramebufferReadBuffer_remap_index 572 +#define NamedFramebufferRenderbuffer_remap_index 573 +#define NamedFramebufferTexture_remap_index 574 +#define NamedFramebufferTextureLayer_remap_index 575 +#define NamedRenderbufferStorage_remap_index 576 +#define NamedRenderbufferStorageMultisample_remap_index 577 +#define TextureBuffer_remap_index 578 +#define TextureBufferRange_remap_index 579 +#define TextureParameterIiv_remap_index 580 +#define TextureParameterIuiv_remap_index 581 +#define TextureParameterf_remap_index 582 +#define TextureParameterfv_remap_index 583 +#define TextureParameteri_remap_index 584 +#define TextureParameteriv_remap_index 585 +#define TextureStorage1D_remap_index 586 +#define TextureStorage2D_remap_index 587 +#define TextureStorage2DMultisample_remap_index 588 +#define TextureStorage3D_remap_index 589 +#define TextureStorage3DMultisample_remap_index 590 +#define TextureSubImage1D_remap_index 591 +#define TextureSubImage2D_remap_index 592 +#define TextureSubImage3D_remap_index 593 +#define TransformFeedbackBufferBase_remap_index 594 +#define TransformFeedbackBufferRange_remap_index 595 +#define UnmapNamedBuffer_remap_index 596 +#define VertexArrayAttribBinding_remap_index 597 +#define VertexArrayAttribFormat_remap_index 598 +#define VertexArrayAttribIFormat_remap_index 599 +#define VertexArrayAttribLFormat_remap_index 600 +#define VertexArrayBindingDivisor_remap_index 601 +#define VertexArrayElementBuffer_remap_index 602 +#define VertexArrayVertexBuffer_remap_index 603 +#define VertexArrayVertexBuffers_remap_index 604 +#define GetCompressedTextureSubImage_remap_index 605 +#define GetTextureSubImage_remap_index 606 +#define InvalidateBufferData_remap_index 607 +#define InvalidateBufferSubData_remap_index 608 +#define InvalidateFramebuffer_remap_index 609 +#define InvalidateSubFramebuffer_remap_index 610 +#define InvalidateTexImage_remap_index 611 +#define InvalidateTexSubImage_remap_index 612 +#define PolygonOffsetEXT_remap_index 613 +#define DrawTexfOES_remap_index 614 +#define DrawTexfvOES_remap_index 615 +#define DrawTexiOES_remap_index 616 +#define DrawTexivOES_remap_index 617 +#define DrawTexsOES_remap_index 618 +#define DrawTexsvOES_remap_index 619 +#define DrawTexxOES_remap_index 620 +#define DrawTexxvOES_remap_index 621 +#define PointSizePointerOES_remap_index 622 +#define QueryMatrixxOES_remap_index 623 +#define SampleMaskSGIS_remap_index 624 +#define SamplePatternSGIS_remap_index 625 +#define ColorPointerEXT_remap_index 626 +#define EdgeFlagPointerEXT_remap_index 627 +#define IndexPointerEXT_remap_index 628 +#define NormalPointerEXT_remap_index 629 +#define TexCoordPointerEXT_remap_index 630 +#define VertexPointerEXT_remap_index 631 +#define DiscardFramebufferEXT_remap_index 632 +#define ActiveShaderProgram_remap_index 633 +#define BindProgramPipeline_remap_index 634 +#define CreateShaderProgramv_remap_index 635 +#define DeleteProgramPipelines_remap_index 636 +#define GenProgramPipelines_remap_index 637 +#define GetProgramPipelineInfoLog_remap_index 638 +#define GetProgramPipelineiv_remap_index 639 +#define IsProgramPipeline_remap_index 640 +#define LockArraysEXT_remap_index 641 +#define ProgramUniform1d_remap_index 642 +#define ProgramUniform1dv_remap_index 643 +#define ProgramUniform1f_remap_index 644 +#define ProgramUniform1fv_remap_index 645 +#define ProgramUniform1i_remap_index 646 +#define ProgramUniform1iv_remap_index 647 +#define ProgramUniform1ui_remap_index 648 +#define ProgramUniform1uiv_remap_index 649 +#define ProgramUniform2d_remap_index 650 +#define ProgramUniform2dv_remap_index 651 +#define ProgramUniform2f_remap_index 652 +#define ProgramUniform2fv_remap_index 653 +#define ProgramUniform2i_remap_index 654 +#define ProgramUniform2iv_remap_index 655 +#define ProgramUniform2ui_remap_index 656 +#define ProgramUniform2uiv_remap_index 657 +#define ProgramUniform3d_remap_index 658 +#define ProgramUniform3dv_remap_index 659 +#define ProgramUniform3f_remap_index 660 +#define ProgramUniform3fv_remap_index 661 +#define ProgramUniform3i_remap_index 662 +#define ProgramUniform3iv_remap_index 663 +#define ProgramUniform3ui_remap_index 664 +#define ProgramUniform3uiv_remap_index 665 +#define ProgramUniform4d_remap_index 666 +#define ProgramUniform4dv_remap_index 667 +#define ProgramUniform4f_remap_index 668 +#define ProgramUniform4fv_remap_index 669 +#define ProgramUniform4i_remap_index 670 +#define ProgramUniform4iv_remap_index 671 +#define ProgramUniform4ui_remap_index 672 +#define ProgramUniform4uiv_remap_index 673 +#define ProgramUniformMatrix2dv_remap_index 674 +#define ProgramUniformMatrix2fv_remap_index 675 +#define ProgramUniformMatrix2x3dv_remap_index 676 +#define ProgramUniformMatrix2x3fv_remap_index 677 +#define ProgramUniformMatrix2x4dv_remap_index 678 +#define ProgramUniformMatrix2x4fv_remap_index 679 +#define ProgramUniformMatrix3dv_remap_index 680 +#define ProgramUniformMatrix3fv_remap_index 681 +#define ProgramUniformMatrix3x2dv_remap_index 682 +#define ProgramUniformMatrix3x2fv_remap_index 683 +#define ProgramUniformMatrix3x4dv_remap_index 684 +#define ProgramUniformMatrix3x4fv_remap_index 685 +#define ProgramUniformMatrix4dv_remap_index 686 +#define ProgramUniformMatrix4fv_remap_index 687 +#define ProgramUniformMatrix4x2dv_remap_index 688 +#define ProgramUniformMatrix4x2fv_remap_index 689 +#define ProgramUniformMatrix4x3dv_remap_index 690 +#define ProgramUniformMatrix4x3fv_remap_index 691 +#define UnlockArraysEXT_remap_index 692 +#define UseProgramStages_remap_index 693 +#define ValidateProgramPipeline_remap_index 694 +#define DebugMessageCallback_remap_index 695 +#define DebugMessageControl_remap_index 696 +#define DebugMessageInsert_remap_index 697 +#define GetDebugMessageLog_remap_index 698 +#define GetObjectLabel_remap_index 699 +#define GetObjectPtrLabel_remap_index 700 +#define ObjectLabel_remap_index 701 +#define ObjectPtrLabel_remap_index 702 +#define PopDebugGroup_remap_index 703 +#define PushDebugGroup_remap_index 704 +#define SecondaryColor3fEXT_remap_index 705 +#define SecondaryColor3fvEXT_remap_index 706 +#define MultiDrawElementsEXT_remap_index 707 +#define FogCoordfEXT_remap_index 708 +#define FogCoordfvEXT_remap_index 709 +#define ResizeBuffersMESA_remap_index 710 +#define WindowPos4dMESA_remap_index 711 +#define WindowPos4dvMESA_remap_index 712 +#define WindowPos4fMESA_remap_index 713 +#define WindowPos4fvMESA_remap_index 714 +#define WindowPos4iMESA_remap_index 715 +#define WindowPos4ivMESA_remap_index 716 +#define WindowPos4sMESA_remap_index 717 +#define WindowPos4svMESA_remap_index 718 +#define MultiModeDrawArraysIBM_remap_index 719 +#define MultiModeDrawElementsIBM_remap_index 720 +#define AreProgramsResidentNV_remap_index 721 +#define ExecuteProgramNV_remap_index 722 +#define GetProgramParameterdvNV_remap_index 723 +#define GetProgramParameterfvNV_remap_index 724 +#define GetProgramStringNV_remap_index 725 +#define GetProgramivNV_remap_index 726 +#define GetTrackMatrixivNV_remap_index 727 +#define GetVertexAttribdvNV_remap_index 728 +#define GetVertexAttribfvNV_remap_index 729 +#define GetVertexAttribivNV_remap_index 730 +#define LoadProgramNV_remap_index 731 +#define ProgramParameters4dvNV_remap_index 732 +#define ProgramParameters4fvNV_remap_index 733 +#define RequestResidentProgramsNV_remap_index 734 +#define TrackMatrixNV_remap_index 735 +#define VertexAttrib1dNV_remap_index 736 +#define VertexAttrib1dvNV_remap_index 737 +#define VertexAttrib1fNV_remap_index 738 +#define VertexAttrib1fvNV_remap_index 739 +#define VertexAttrib1sNV_remap_index 740 +#define VertexAttrib1svNV_remap_index 741 +#define VertexAttrib2dNV_remap_index 742 +#define VertexAttrib2dvNV_remap_index 743 +#define VertexAttrib2fNV_remap_index 744 +#define VertexAttrib2fvNV_remap_index 745 +#define VertexAttrib2sNV_remap_index 746 +#define VertexAttrib2svNV_remap_index 747 +#define VertexAttrib3dNV_remap_index 748 +#define VertexAttrib3dvNV_remap_index 749 +#define VertexAttrib3fNV_remap_index 750 +#define VertexAttrib3fvNV_remap_index 751 +#define VertexAttrib3sNV_remap_index 752 +#define VertexAttrib3svNV_remap_index 753 +#define VertexAttrib4dNV_remap_index 754 +#define VertexAttrib4dvNV_remap_index 755 +#define VertexAttrib4fNV_remap_index 756 +#define VertexAttrib4fvNV_remap_index 757 +#define VertexAttrib4sNV_remap_index 758 +#define VertexAttrib4svNV_remap_index 759 +#define VertexAttrib4ubNV_remap_index 760 +#define VertexAttrib4ubvNV_remap_index 761 +#define VertexAttribPointerNV_remap_index 762 +#define VertexAttribs1dvNV_remap_index 763 +#define VertexAttribs1fvNV_remap_index 764 +#define VertexAttribs1svNV_remap_index 765 +#define VertexAttribs2dvNV_remap_index 766 +#define VertexAttribs2fvNV_remap_index 767 +#define VertexAttribs2svNV_remap_index 768 +#define VertexAttribs3dvNV_remap_index 769 +#define VertexAttribs3fvNV_remap_index 770 +#define VertexAttribs3svNV_remap_index 771 +#define VertexAttribs4dvNV_remap_index 772 +#define VertexAttribs4fvNV_remap_index 773 +#define VertexAttribs4svNV_remap_index 774 +#define VertexAttribs4ubvNV_remap_index 775 +#define GetTexBumpParameterfvATI_remap_index 776 +#define GetTexBumpParameterivATI_remap_index 777 +#define TexBumpParameterfvATI_remap_index 778 +#define TexBumpParameterivATI_remap_index 779 +#define AlphaFragmentOp1ATI_remap_index 780 +#define AlphaFragmentOp2ATI_remap_index 781 +#define AlphaFragmentOp3ATI_remap_index 782 +#define BeginFragmentShaderATI_remap_index 783 +#define BindFragmentShaderATI_remap_index 784 +#define ColorFragmentOp1ATI_remap_index 785 +#define ColorFragmentOp2ATI_remap_index 786 +#define ColorFragmentOp3ATI_remap_index 787 +#define DeleteFragmentShaderATI_remap_index 788 +#define EndFragmentShaderATI_remap_index 789 +#define GenFragmentShadersATI_remap_index 790 +#define PassTexCoordATI_remap_index 791 +#define SampleMapATI_remap_index 792 +#define SetFragmentShaderConstantATI_remap_index 793 +#define DepthRangeArrayfvOES_remap_index 794 +#define DepthRangeIndexedfOES_remap_index 795 +#define ActiveStencilFaceEXT_remap_index 796 +#define BindVertexArrayAPPLE_remap_index 797 +#define GenVertexArraysAPPLE_remap_index 798 +#define GetProgramNamedParameterdvNV_remap_index 799 +#define GetProgramNamedParameterfvNV_remap_index 800 +#define ProgramNamedParameter4dNV_remap_index 801 +#define ProgramNamedParameter4dvNV_remap_index 802 +#define ProgramNamedParameter4fNV_remap_index 803 +#define ProgramNamedParameter4fvNV_remap_index 804 +#define PrimitiveRestartNV_remap_index 805 +#define GetTexGenxvOES_remap_index 806 +#define TexGenxOES_remap_index 807 +#define TexGenxvOES_remap_index 808 +#define DepthBoundsEXT_remap_index 809 +#define BindFramebufferEXT_remap_index 810 +#define BindRenderbufferEXT_remap_index 811 +#define StringMarkerGREMEDY_remap_index 812 +#define BufferParameteriAPPLE_remap_index 813 +#define FlushMappedBufferRangeAPPLE_remap_index 814 +#define VertexAttribI1iEXT_remap_index 815 +#define VertexAttribI1uiEXT_remap_index 816 +#define VertexAttribI2iEXT_remap_index 817 +#define VertexAttribI2ivEXT_remap_index 818 +#define VertexAttribI2uiEXT_remap_index 819 +#define VertexAttribI2uivEXT_remap_index 820 +#define VertexAttribI3iEXT_remap_index 821 +#define VertexAttribI3ivEXT_remap_index 822 +#define VertexAttribI3uiEXT_remap_index 823 +#define VertexAttribI3uivEXT_remap_index 824 +#define VertexAttribI4iEXT_remap_index 825 +#define VertexAttribI4ivEXT_remap_index 826 +#define VertexAttribI4uiEXT_remap_index 827 +#define VertexAttribI4uivEXT_remap_index 828 +#define ClearColorIiEXT_remap_index 829 +#define ClearColorIuiEXT_remap_index 830 +#define BindBufferOffsetEXT_remap_index 831 +#define BeginPerfMonitorAMD_remap_index 832 +#define DeletePerfMonitorsAMD_remap_index 833 +#define EndPerfMonitorAMD_remap_index 834 +#define GenPerfMonitorsAMD_remap_index 835 +#define GetPerfMonitorCounterDataAMD_remap_index 836 +#define GetPerfMonitorCounterInfoAMD_remap_index 837 +#define GetPerfMonitorCounterStringAMD_remap_index 838 +#define GetPerfMonitorCountersAMD_remap_index 839 +#define GetPerfMonitorGroupStringAMD_remap_index 840 +#define GetPerfMonitorGroupsAMD_remap_index 841 +#define SelectPerfMonitorCountersAMD_remap_index 842 +#define GetObjectParameterivAPPLE_remap_index 843 +#define ObjectPurgeableAPPLE_remap_index 844 +#define ObjectUnpurgeableAPPLE_remap_index 845 +#define ActiveProgramEXT_remap_index 846 +#define CreateShaderProgramEXT_remap_index 847 +#define UseShaderProgramEXT_remap_index 848 +#define TextureBarrierNV_remap_index 849 +#define VDPAUFiniNV_remap_index 850 +#define VDPAUGetSurfaceivNV_remap_index 851 +#define VDPAUInitNV_remap_index 852 +#define VDPAUIsSurfaceNV_remap_index 853 +#define VDPAUMapSurfacesNV_remap_index 854 +#define VDPAURegisterOutputSurfaceNV_remap_index 855 +#define VDPAURegisterVideoSurfaceNV_remap_index 856 +#define VDPAUSurfaceAccessNV_remap_index 857 +#define VDPAUUnmapSurfacesNV_remap_index 858 +#define VDPAUUnregisterSurfaceNV_remap_index 859 +#define BeginPerfQueryINTEL_remap_index 860 +#define CreatePerfQueryINTEL_remap_index 861 +#define DeletePerfQueryINTEL_remap_index 862 +#define EndPerfQueryINTEL_remap_index 863 +#define GetFirstPerfQueryIdINTEL_remap_index 864 +#define GetNextPerfQueryIdINTEL_remap_index 865 +#define GetPerfCounterInfoINTEL_remap_index 866 +#define GetPerfQueryDataINTEL_remap_index 867 +#define GetPerfQueryIdByNameINTEL_remap_index 868 +#define GetPerfQueryInfoINTEL_remap_index 869 +#define PolygonOffsetClampEXT_remap_index 870 +#define WindowRectanglesEXT_remap_index 871 +#define StencilFuncSeparateATI_remap_index 872 +#define ProgramEnvParameters4fvEXT_remap_index 873 +#define ProgramLocalParameters4fvEXT_remap_index 874 +#define EGLImageTargetRenderbufferStorageOES_remap_index 875 +#define EGLImageTargetTexture2DOES_remap_index 876 +#define AlphaFuncx_remap_index 877 +#define ClearColorx_remap_index 878 +#define ClearDepthx_remap_index 879 +#define Color4x_remap_index 880 +#define DepthRangex_remap_index 881 +#define Fogx_remap_index 882 +#define Fogxv_remap_index 883 +#define Frustumf_remap_index 884 +#define Frustumx_remap_index 885 +#define LightModelx_remap_index 886 +#define LightModelxv_remap_index 887 +#define Lightx_remap_index 888 +#define Lightxv_remap_index 889 +#define LineWidthx_remap_index 890 +#define LoadMatrixx_remap_index 891 +#define Materialx_remap_index 892 +#define Materialxv_remap_index 893 +#define MultMatrixx_remap_index 894 +#define MultiTexCoord4x_remap_index 895 +#define Normal3x_remap_index 896 +#define Orthof_remap_index 897 +#define Orthox_remap_index 898 +#define PointSizex_remap_index 899 +#define PolygonOffsetx_remap_index 900 +#define Rotatex_remap_index 901 +#define SampleCoveragex_remap_index 902 +#define Scalex_remap_index 903 +#define TexEnvx_remap_index 904 +#define TexEnvxv_remap_index 905 +#define TexParameterx_remap_index 906 +#define Translatex_remap_index 907 +#define ClipPlanef_remap_index 908 +#define ClipPlanex_remap_index 909 +#define GetClipPlanef_remap_index 910 +#define GetClipPlanex_remap_index 911 +#define GetFixedv_remap_index 912 +#define GetLightxv_remap_index 913 +#define GetMaterialxv_remap_index 914 +#define GetTexEnvxv_remap_index 915 +#define GetTexParameterxv_remap_index 916 +#define PointParameterx_remap_index 917 +#define PointParameterxv_remap_index 918 +#define TexParameterxv_remap_index 919 +#define BlendBarrier_remap_index 920 +#define PrimitiveBoundingBox_remap_index 921 #define _gloffset_CompressedTexImage1D driDispatchRemapTable[CompressedTexImage1D_remap_index] #define _gloffset_CompressedTexImage2D driDispatchRemapTable[CompressedTexImage2D_remap_index] @@ -1891,6 +1897,7 @@ #define _gloffset_BindSamplers driDispatchRemapTable[BindSamplers_remap_index] #define _gloffset_BindTextures driDispatchRemapTable[BindTextures_remap_index] #define _gloffset_BindVertexBuffers driDispatchRemapTable[BindVertexBuffers_remap_index] +#define _gloffset_DispatchComputeGroupSizeARB driDispatchRemapTable[DispatchComputeGroupSizeARB_remap_index] #define _gloffset_MultiDrawArraysIndirectCountARB driDispatchRemapTable[MultiDrawArraysIndirectCountARB_remap_index] #define _gloffset_MultiDrawElementsIndirectCountARB driDispatchRemapTable[MultiDrawElementsIndirectCountARB_remap_index] #define _gloffset_ClipControl driDispatchRemapTable[ClipControl_remap_index] @@ -2180,6 +2187,8 @@ #define _gloffset_PassTexCoordATI driDispatchRemapTable[PassTexCoordATI_remap_index] #define _gloffset_SampleMapATI driDispatchRemapTable[SampleMapATI_remap_index] #define _gloffset_SetFragmentShaderConstantATI driDispatchRemapTable[SetFragmentShaderConstantATI_remap_index] +#define _gloffset_DepthRangeArrayfvOES driDispatchRemapTable[DepthRangeArrayfvOES_remap_index] +#define _gloffset_DepthRangeIndexedfOES driDispatchRemapTable[DepthRangeIndexedfOES_remap_index] #define _gloffset_ActiveStencilFaceEXT driDispatchRemapTable[ActiveStencilFaceEXT_remap_index] #define _gloffset_BindVertexArrayAPPLE driDispatchRemapTable[BindVertexArrayAPPLE_remap_index] #define _gloffset_GenVertexArraysAPPLE driDispatchRemapTable[GenVertexArraysAPPLE_remap_index] @@ -2255,6 +2264,7 @@ #define _gloffset_GetPerfQueryIdByNameINTEL driDispatchRemapTable[GetPerfQueryIdByNameINTEL_remap_index] #define _gloffset_GetPerfQueryInfoINTEL driDispatchRemapTable[GetPerfQueryInfoINTEL_remap_index] #define _gloffset_PolygonOffsetClampEXT driDispatchRemapTable[PolygonOffsetClampEXT_remap_index] +#define _gloffset_WindowRectanglesEXT driDispatchRemapTable[WindowRectanglesEXT_remap_index] #define _gloffset_StencilFuncSeparateATI driDispatchRemapTable[StencilFuncSeparateATI_remap_index] #define _gloffset_ProgramEnvParameters4fvEXT driDispatchRemapTable[ProgramEnvParameters4fvEXT_remap_index] #define _gloffset_ProgramLocalParameters4fvEXT driDispatchRemapTable[ProgramLocalParameters4fvEXT_remap_index] @@ -2303,6 +2313,8 @@ #define _gloffset_PointParameterx driDispatchRemapTable[PointParameterx_remap_index] #define _gloffset_PointParameterxv driDispatchRemapTable[PointParameterxv_remap_index] #define _gloffset_TexParameterxv driDispatchRemapTable[TexParameterxv_remap_index] +#define _gloffset_BlendBarrier driDispatchRemapTable[BlendBarrier_remap_index] +#define _gloffset_PrimitiveBoundingBox driDispatchRemapTable[PrimitiveBoundingBox_remap_index] typedef void (GLAPIENTRYP _glptr_NewList)(GLuint, GLenum); #define CALL_NewList(disp, parameters) \ @@ -12336,6 +12348,17 @@ SET_by_offset(disp, _gloffset_BindVertexBuffers, fn); } +typedef void (GLAPIENTRYP _glptr_DispatchComputeGroupSizeARB)(GLuint, GLuint, GLuint, GLuint, GLuint, GLuint); +#define CALL_DispatchComputeGroupSizeARB(disp, parameters) \ + (* GET_DispatchComputeGroupSizeARB(disp)) parameters +static inline _glptr_DispatchComputeGroupSizeARB GET_DispatchComputeGroupSizeARB(struct _glapi_table *disp) { + return (_glptr_DispatchComputeGroupSizeARB) (GET_by_offset(disp, _gloffset_DispatchComputeGroupSizeARB)); +} + +static inline void SET_DispatchComputeGroupSizeARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLuint, GLuint, GLuint, GLuint)) { + SET_by_offset(disp, _gloffset_DispatchComputeGroupSizeARB, fn); +} + typedef void (GLAPIENTRYP _glptr_MultiDrawArraysIndirectCountARB)(GLenum, GLintptr, GLintptr, GLsizei, GLsizei); #define CALL_MultiDrawArraysIndirectCountARB(disp, parameters) \ (* GET_MultiDrawArraysIndirectCountARB(disp)) parameters @@ -15515,6 +15538,28 @@ SET_by_offset(disp, _gloffset_SetFragmentShaderConstantATI, fn); } +typedef void (GLAPIENTRYP _glptr_DepthRangeArrayfvOES)(GLuint, GLsizei, const GLfloat *); +#define CALL_DepthRangeArrayfvOES(disp, parameters) \ + (* GET_DepthRangeArrayfvOES(disp)) parameters +static inline _glptr_DepthRangeArrayfvOES GET_DepthRangeArrayfvOES(struct _glapi_table *disp) { + return (_glptr_DepthRangeArrayfvOES) (GET_by_offset(disp, _gloffset_DepthRangeArrayfvOES)); +} + +static inline void SET_DepthRangeArrayfvOES(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLfloat *)) { + SET_by_offset(disp, _gloffset_DepthRangeArrayfvOES, fn); +} + +typedef void (GLAPIENTRYP _glptr_DepthRangeIndexedfOES)(GLuint, GLfloat, GLfloat); +#define CALL_DepthRangeIndexedfOES(disp, parameters) \ + (* GET_DepthRangeIndexedfOES(disp)) parameters +static inline _glptr_DepthRangeIndexedfOES GET_DepthRangeIndexedfOES(struct _glapi_table *disp) { + return (_glptr_DepthRangeIndexedfOES) (GET_by_offset(disp, _gloffset_DepthRangeIndexedfOES)); +} + +static inline void SET_DepthRangeIndexedfOES(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLfloat, GLfloat)) { + SET_by_offset(disp, _gloffset_DepthRangeIndexedfOES, fn); +} + typedef void (GLAPIENTRYP _glptr_ActiveStencilFaceEXT)(GLenum); #define CALL_ActiveStencilFaceEXT(disp, parameters) \ (* GET_ActiveStencilFaceEXT(disp)) parameters @@ -16340,6 +16385,17 @@ SET_by_offset(disp, _gloffset_PolygonOffsetClampEXT, fn); } +typedef void (GLAPIENTRYP _glptr_WindowRectanglesEXT)(GLenum, GLsizei, const GLint *); +#define CALL_WindowRectanglesEXT(disp, parameters) \ + (* GET_WindowRectanglesEXT(disp)) parameters +static inline _glptr_WindowRectanglesEXT GET_WindowRectanglesEXT(struct _glapi_table *disp) { + return (_glptr_WindowRectanglesEXT) (GET_by_offset(disp, _gloffset_WindowRectanglesEXT)); +} + +static inline void SET_WindowRectanglesEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, const GLint *)) { + SET_by_offset(disp, _gloffset_WindowRectanglesEXT, fn); +} + typedef void (GLAPIENTRYP _glptr_StencilFuncSeparateATI)(GLenum, GLenum, GLint, GLuint); #define CALL_StencilFuncSeparateATI(disp, parameters) \ (* GET_StencilFuncSeparateATI(disp)) parameters @@ -16868,5 +16924,27 @@ SET_by_offset(disp, _gloffset_TexParameterxv, fn); } +typedef void (GLAPIENTRYP _glptr_BlendBarrier)(void); +#define CALL_BlendBarrier(disp, parameters) \ + (* GET_BlendBarrier(disp)) parameters +static inline _glptr_BlendBarrier GET_BlendBarrier(struct _glapi_table *disp) { + return (_glptr_BlendBarrier) (GET_by_offset(disp, _gloffset_BlendBarrier)); +} + +static inline void SET_BlendBarrier(struct _glapi_table *disp, void (GLAPIENTRYP fn)(void)) { + SET_by_offset(disp, _gloffset_BlendBarrier, fn); +} + +typedef void (GLAPIENTRYP _glptr_PrimitiveBoundingBox)(GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat); +#define CALL_PrimitiveBoundingBox(disp, parameters) \ + (* GET_PrimitiveBoundingBox(disp)) parameters +static inline _glptr_PrimitiveBoundingBox GET_PrimitiveBoundingBox(struct _glapi_table *disp) { + return (_glptr_PrimitiveBoundingBox) (GET_by_offset(disp, _gloffset_PrimitiveBoundingBox)); +} + +static inline void SET_PrimitiveBoundingBox(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat)) { + SET_by_offset(disp, _gloffset_PrimitiveBoundingBox, fn); +} + #endif /* !defined( _DISPATCH_H_ ) */ diff -Nru mesa-12.0.6/src/mesa/main/dlist.c mesa-17.0.7/src/mesa/main/dlist.c --- mesa-12.0.6/src/mesa/main/dlist.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/dlist.c 2017-06-01 10:37:10.000000000 +0000 @@ -110,67 +110,66 @@ * Checks if dd_function_table::SaveNeedFlush is marked to flush * stored (save) vertices, and calls vbo_save_SaveFlushVertices if so. */ -#define SAVE_FLUSH_VERTICES(ctx) \ -do { \ - if (ctx->Driver.SaveNeedFlush) \ - vbo_save_SaveFlushVertices(ctx); \ -} while (0) +#define SAVE_FLUSH_VERTICES(ctx) \ + do { \ + if (ctx->Driver.SaveNeedFlush) \ + vbo_save_SaveFlushVertices(ctx); \ + } while (0) /** * Macro to assert that the API call was made outside the * glBegin()/glEnd() pair, with return value. - * + * * \param ctx GL context. * \param retval value to return value in case the assertion fails. */ -#define ASSERT_OUTSIDE_SAVE_BEGIN_END_WITH_RETVAL(ctx, retval) \ -do { \ - if (ctx->Driver.CurrentSavePrimitive <= PRIM_MAX) { \ - _mesa_compile_error( ctx, GL_INVALID_OPERATION, "glBegin/End" ); \ - return retval; \ - } \ -} while (0) +#define ASSERT_OUTSIDE_SAVE_BEGIN_END_WITH_RETVAL(ctx, retval) \ + do { \ + if (ctx->Driver.CurrentSavePrimitive <= PRIM_MAX) { \ + _mesa_compile_error( ctx, GL_INVALID_OPERATION, "glBegin/End" ); \ + return retval; \ + } \ + } while (0) /** * Macro to assert that the API call was made outside the * glBegin()/glEnd() pair. - * + * * \param ctx GL context. */ -#define ASSERT_OUTSIDE_SAVE_BEGIN_END(ctx) \ -do { \ - if (ctx->Driver.CurrentSavePrimitive <= PRIM_MAX) { \ - _mesa_compile_error( ctx, GL_INVALID_OPERATION, "glBegin/End" ); \ - return; \ - } \ -} while (0) +#define ASSERT_OUTSIDE_SAVE_BEGIN_END(ctx) \ + do { \ + if (ctx->Driver.CurrentSavePrimitive <= PRIM_MAX) { \ + _mesa_compile_error( ctx, GL_INVALID_OPERATION, "glBegin/End" ); \ + return; \ + } \ + } while (0) /** * Macro to assert that the API call was made outside the * glBegin()/glEnd() pair and flush the vertices. - * + * * \param ctx GL context. */ -#define ASSERT_OUTSIDE_SAVE_BEGIN_END_AND_FLUSH(ctx) \ -do { \ - ASSERT_OUTSIDE_SAVE_BEGIN_END(ctx); \ - SAVE_FLUSH_VERTICES(ctx); \ -} while (0) +#define ASSERT_OUTSIDE_SAVE_BEGIN_END_AND_FLUSH(ctx) \ + do { \ + ASSERT_OUTSIDE_SAVE_BEGIN_END(ctx); \ + SAVE_FLUSH_VERTICES(ctx); \ + } while (0) /** * Macro to assert that the API call was made outside the * glBegin()/glEnd() pair and flush the vertices, with return value. - * + * * \param ctx GL context. * \param retval value to return value in case the assertion fails. */ -#define ASSERT_OUTSIDE_SAVE_BEGIN_END_AND_FLUSH_WITH_RETVAL(ctx, retval)\ -do { \ - ASSERT_OUTSIDE_SAVE_BEGIN_END_WITH_RETVAL(ctx, retval); \ - SAVE_FLUSH_VERTICES(ctx); \ -} while (0) - +#define ASSERT_OUTSIDE_SAVE_BEGIN_END_AND_FLUSH_WITH_RETVAL(ctx, retval) \ + do { \ + ASSERT_OUTSIDE_SAVE_BEGIN_END_WITH_RETVAL(ctx, retval); \ + SAVE_FLUSH_VERTICES(ctx); \ + } while (0) /** @@ -485,6 +484,9 @@ /* EXT_polygon_offset_clamp */ OPCODE_POLYGON_OFFSET_CLAMP, + /* EXT_window_rectangles */ + OPCODE_WINDOW_RECTANGLES, + /* The following three are meta instructions */ OPCODE_ERROR, /* raise compiled-in error */ OPCODE_CONTINUE, @@ -1090,7 +1092,10 @@ free(get_pointer(&n[3])); n += InstSize[n[0].opcode]; break; - + case OPCODE_WINDOW_RECTANGLES: + free(get_pointer(&n[3])); + n += InstSize[n[0].opcode]; + break; case OPCODE_CONTINUE: n = (Node *) get_pointer(&n[1]); free(block); @@ -1266,7 +1271,7 @@ map = (GLubyte *) ctx->Driver.MapBufferRange(ctx, 0, unpack->BufferObj->Size, - GL_MAP_READ_BIT, unpack->BufferObj, + GL_MAP_READ_BIT, unpack->BufferObj, MAP_INTERNAL); if (!map) { /* unable to map src buffer! */ @@ -1740,79 +1745,79 @@ /* GL_ARB_draw_instanced. */ static void GLAPIENTRY -save_DrawArraysInstancedARB(GLenum mode, - GLint first, - GLsizei count, - GLsizei primcount) +save_DrawArraysInstancedARB(UNUSED GLenum mode, + UNUSED GLint first, + UNUSED GLsizei count, + UNUSED GLsizei primcount) { GET_CURRENT_CONTEXT(ctx); _mesa_error(ctx, GL_INVALID_OPERATION, - "glDrawArraysInstanced() during display list compile"); + "glDrawArraysInstanced() during display list compile"); } static void GLAPIENTRY -save_DrawElementsInstancedARB(GLenum mode, - GLsizei count, - GLenum type, - const GLvoid *indices, - GLsizei primcount) +save_DrawElementsInstancedARB(UNUSED GLenum mode, + UNUSED GLsizei count, + UNUSED GLenum type, + UNUSED const GLvoid *indices, + UNUSED GLsizei primcount) { GET_CURRENT_CONTEXT(ctx); _mesa_error(ctx, GL_INVALID_OPERATION, - "glDrawElementsInstanced() during display list compile"); + "glDrawElementsInstanced() during display list compile"); } static void GLAPIENTRY -save_DrawElementsInstancedBaseVertexARB(GLenum mode, - GLsizei count, - GLenum type, - const GLvoid *indices, - GLsizei primcount, - GLint basevertex) +save_DrawElementsInstancedBaseVertexARB(UNUSED GLenum mode, + UNUSED GLsizei count, + UNUSED GLenum type, + UNUSED const GLvoid *indices, + UNUSED GLsizei primcount, + UNUSED GLint basevertex) { GET_CURRENT_CONTEXT(ctx); _mesa_error(ctx, GL_INVALID_OPERATION, - "glDrawElementsInstancedBaseVertex() during display list compile"); + "glDrawElementsInstancedBaseVertex() during display list compile"); } /* GL_ARB_base_instance. */ static void GLAPIENTRY -save_DrawArraysInstancedBaseInstance(GLenum mode, - GLint first, - GLsizei count, - GLsizei primcount, - GLuint baseinstance) +save_DrawArraysInstancedBaseInstance(UNUSED GLenum mode, + UNUSED GLint first, + UNUSED GLsizei count, + UNUSED GLsizei primcount, + UNUSED GLuint baseinstance) { GET_CURRENT_CONTEXT(ctx); _mesa_error(ctx, GL_INVALID_OPERATION, - "glDrawArraysInstancedBaseInstance() during display list compile"); + "glDrawArraysInstancedBaseInstance() during display list compile"); } static void APIENTRY -save_DrawElementsInstancedBaseInstance(GLenum mode, - GLsizei count, - GLenum type, - const void *indices, - GLsizei primcount, - GLuint baseinstance) +save_DrawElementsInstancedBaseInstance(UNUSED GLenum mode, + UNUSED GLsizei count, + UNUSED GLenum type, + UNUSED const void *indices, + UNUSED GLsizei primcount, + UNUSED GLuint baseinstance) { GET_CURRENT_CONTEXT(ctx); _mesa_error(ctx, GL_INVALID_OPERATION, - "glDrawElementsInstancedBaseInstance() during display list compile"); + "glDrawElementsInstancedBaseInstance() during display list compile"); } static void APIENTRY -save_DrawElementsInstancedBaseVertexBaseInstance(GLenum mode, - GLsizei count, - GLenum type, - const void *indices, - GLsizei primcount, - GLint basevertex, - GLuint baseinstance) +save_DrawElementsInstancedBaseVertexBaseInstance(UNUSED GLenum mode, + UNUSED GLsizei count, + UNUSED GLenum type, + UNUSED const void *indices, + UNUSED GLsizei primcount, + UNUSED GLint basevertex, + UNUSED GLuint baseinstance) { GET_CURRENT_CONTEXT(ctx); _mesa_error(ctx, GL_INVALID_OPERATION, - "glDrawElementsInstancedBaseVertexBaseInstance() during display list compile"); + "glDrawElementsInstancedBaseVertexBaseInstance() during display list compile"); } @@ -5008,7 +5013,7 @@ static void GLAPIENTRY save_ProgramEnvParameters4fvEXT(GLenum target, GLuint index, GLsizei count, - const GLfloat * params) + const GLfloat * params) { GET_CURRENT_CONTEXT(ctx); Node *n; @@ -5019,16 +5024,16 @@ const GLfloat * p = params; for (i = 0 ; i < count ; i++) { - n = alloc_instruction(ctx, OPCODE_PROGRAM_ENV_PARAMETER_ARB, 6); - if (n) { - n[1].e = target; - n[2].ui = index; - n[3].f = p[0]; - n[4].f = p[1]; - n[5].f = p[2]; - n[6].f = p[3]; - p += 4; - } + n = alloc_instruction(ctx, OPCODE_PROGRAM_ENV_PARAMETER_ARB, 6); + if (n) { + n[1].e = target; + n[2].ui = index; + n[3].f = p[0]; + n[4].f = p[1]; + n[5].f = p[2]; + n[6].f = p[3]; + p += 4; + } } } @@ -5105,7 +5110,7 @@ static void GLAPIENTRY save_ProgramLocalParameters4fvEXT(GLenum target, GLuint index, GLsizei count, - const GLfloat *params) + const GLfloat *params) { GET_CURRENT_CONTEXT(ctx); Node *n; @@ -5116,16 +5121,16 @@ const GLfloat * p = params; for (i = 0 ; i < count ; i++) { - n = alloc_instruction(ctx, OPCODE_PROGRAM_LOCAL_PARAMETER_ARB, 6); - if (n) { - n[1].e = target; - n[2].ui = index; - n[3].f = p[0]; - n[4].f = p[1]; - n[5].f = p[2]; - n[6].f = p[3]; - p += 4; - } + n = alloc_instruction(ctx, OPCODE_PROGRAM_LOCAL_PARAMETER_ARB, 6); + if (n) { + n[1].e = target; + n[2].ui = index; + n[3].f = p[0]; + n[4].f = p[1]; + n[5].f = p[2]; + n[6].f = p[3]; + p += 4; + } } } @@ -5707,7 +5712,7 @@ _mesa_compile_error(ctx, GL_INVALID_ENUM, "glMaterial(pname)"); return; } - + if (ctx->ExecuteFlag) { CALL_Materialfv(ctx->Exec, (face, pname, param)); } @@ -6020,7 +6025,7 @@ /** - * Record a GL_INVALID_VALUE error when a invalid vertex attribute + * Record a GL_INVALID_VALUE error when an invalid vertex attribute * index is found. */ static void @@ -7922,6 +7927,27 @@ } } +/** GL_EXT_window_rectangles */ +static void GLAPIENTRY +save_WindowRectanglesEXT(GLenum mode, GLsizei count, const GLint *box) +{ + GET_CURRENT_CONTEXT(ctx); + Node *n; + ASSERT_OUTSIDE_SAVE_BEGIN_END_AND_FLUSH(ctx); + n = alloc_instruction(ctx, OPCODE_WINDOW_RECTANGLES, 2 + POINTER_DWORDS); + if (n) { + GLint *box_copy = NULL; + + if (count > 0) + box_copy = memdup(box, sizeof(GLint) * 4 * count); + n[1].e = mode; + n[2].si = count; + save_pointer(&n[3], box_copy); + } + if (ctx->ExecuteFlag) { + CALL_WindowRectanglesEXT(ctx->Exec, (mode, count, box)); + } +} /** * Save an error-generating command into display list. @@ -8655,134 +8681,134 @@ CALL_DrawBuffers(ctx->Exec, (n[1].i, buffers)); } break; - case OPCODE_BLIT_FRAMEBUFFER: - CALL_BlitFramebuffer(ctx->Exec, (n[1].i, n[2].i, n[3].i, n[4].i, + case OPCODE_BLIT_FRAMEBUFFER: + CALL_BlitFramebuffer(ctx->Exec, (n[1].i, n[2].i, n[3].i, n[4].i, n[5].i, n[6].i, n[7].i, n[8].i, n[9].i, n[10].e)); - break; - case OPCODE_USE_PROGRAM: - CALL_UseProgram(ctx->Exec, (n[1].ui)); - break; - case OPCODE_UNIFORM_1F: - CALL_Uniform1f(ctx->Exec, (n[1].i, n[2].f)); - break; - case OPCODE_UNIFORM_2F: - CALL_Uniform2f(ctx->Exec, (n[1].i, n[2].f, n[3].f)); - break; - case OPCODE_UNIFORM_3F: - CALL_Uniform3f(ctx->Exec, (n[1].i, n[2].f, n[3].f, n[4].f)); - break; - case OPCODE_UNIFORM_4F: - CALL_Uniform4f(ctx->Exec, + break; + case OPCODE_USE_PROGRAM: + CALL_UseProgram(ctx->Exec, (n[1].ui)); + break; + case OPCODE_UNIFORM_1F: + CALL_Uniform1f(ctx->Exec, (n[1].i, n[2].f)); + break; + case OPCODE_UNIFORM_2F: + CALL_Uniform2f(ctx->Exec, (n[1].i, n[2].f, n[3].f)); + break; + case OPCODE_UNIFORM_3F: + CALL_Uniform3f(ctx->Exec, (n[1].i, n[2].f, n[3].f, n[4].f)); + break; + case OPCODE_UNIFORM_4F: + CALL_Uniform4f(ctx->Exec, (n[1].i, n[2].f, n[3].f, n[4].f, n[5].f)); - break; - case OPCODE_UNIFORM_1FV: - CALL_Uniform1fv(ctx->Exec, (n[1].i, n[2].i, get_pointer(&n[3]))); - break; - case OPCODE_UNIFORM_2FV: - CALL_Uniform2fv(ctx->Exec, (n[1].i, n[2].i, get_pointer(&n[3]))); - break; - case OPCODE_UNIFORM_3FV: - CALL_Uniform3fv(ctx->Exec, (n[1].i, n[2].i, get_pointer(&n[3]))); - break; - case OPCODE_UNIFORM_4FV: - CALL_Uniform4fv(ctx->Exec, (n[1].i, n[2].i, get_pointer(&n[3]))); - break; - case OPCODE_UNIFORM_1I: - CALL_Uniform1i(ctx->Exec, (n[1].i, n[2].i)); - break; - case OPCODE_UNIFORM_2I: - CALL_Uniform2i(ctx->Exec, (n[1].i, n[2].i, n[3].i)); - break; - case OPCODE_UNIFORM_3I: - CALL_Uniform3i(ctx->Exec, (n[1].i, n[2].i, n[3].i, n[4].i)); - break; - case OPCODE_UNIFORM_4I: - CALL_Uniform4i(ctx->Exec, + break; + case OPCODE_UNIFORM_1FV: + CALL_Uniform1fv(ctx->Exec, (n[1].i, n[2].i, get_pointer(&n[3]))); + break; + case OPCODE_UNIFORM_2FV: + CALL_Uniform2fv(ctx->Exec, (n[1].i, n[2].i, get_pointer(&n[3]))); + break; + case OPCODE_UNIFORM_3FV: + CALL_Uniform3fv(ctx->Exec, (n[1].i, n[2].i, get_pointer(&n[3]))); + break; + case OPCODE_UNIFORM_4FV: + CALL_Uniform4fv(ctx->Exec, (n[1].i, n[2].i, get_pointer(&n[3]))); + break; + case OPCODE_UNIFORM_1I: + CALL_Uniform1i(ctx->Exec, (n[1].i, n[2].i)); + break; + case OPCODE_UNIFORM_2I: + CALL_Uniform2i(ctx->Exec, (n[1].i, n[2].i, n[3].i)); + break; + case OPCODE_UNIFORM_3I: + CALL_Uniform3i(ctx->Exec, (n[1].i, n[2].i, n[3].i, n[4].i)); + break; + case OPCODE_UNIFORM_4I: + CALL_Uniform4i(ctx->Exec, (n[1].i, n[2].i, n[3].i, n[4].i, n[5].i)); - break; - case OPCODE_UNIFORM_1IV: - CALL_Uniform1iv(ctx->Exec, (n[1].i, n[2].i, get_pointer(&n[3]))); - break; - case OPCODE_UNIFORM_2IV: - CALL_Uniform2iv(ctx->Exec, (n[1].i, n[2].i, get_pointer(&n[3]))); - break; - case OPCODE_UNIFORM_3IV: - CALL_Uniform3iv(ctx->Exec, (n[1].i, n[2].i, get_pointer(&n[3]))); - break; - case OPCODE_UNIFORM_4IV: - CALL_Uniform4iv(ctx->Exec, (n[1].i, n[2].i, get_pointer(&n[3]))); - break; - case OPCODE_UNIFORM_1UI: - /*CALL_Uniform1uiARB(ctx->Exec, (n[1].i, n[2].i));*/ - break; - case OPCODE_UNIFORM_2UI: - /*CALL_Uniform2uiARB(ctx->Exec, (n[1].i, n[2].i, n[3].i));*/ - break; - case OPCODE_UNIFORM_3UI: - /*CALL_Uniform3uiARB(ctx->Exec, (n[1].i, n[2].i, n[3].i, n[4].i));*/ - break; - case OPCODE_UNIFORM_4UI: - /*CALL_Uniform4uiARB(ctx->Exec, + break; + case OPCODE_UNIFORM_1IV: + CALL_Uniform1iv(ctx->Exec, (n[1].i, n[2].i, get_pointer(&n[3]))); + break; + case OPCODE_UNIFORM_2IV: + CALL_Uniform2iv(ctx->Exec, (n[1].i, n[2].i, get_pointer(&n[3]))); + break; + case OPCODE_UNIFORM_3IV: + CALL_Uniform3iv(ctx->Exec, (n[1].i, n[2].i, get_pointer(&n[3]))); + break; + case OPCODE_UNIFORM_4IV: + CALL_Uniform4iv(ctx->Exec, (n[1].i, n[2].i, get_pointer(&n[3]))); + break; + case OPCODE_UNIFORM_1UI: + /*CALL_Uniform1uiARB(ctx->Exec, (n[1].i, n[2].i));*/ + break; + case OPCODE_UNIFORM_2UI: + /*CALL_Uniform2uiARB(ctx->Exec, (n[1].i, n[2].i, n[3].i));*/ + break; + case OPCODE_UNIFORM_3UI: + /*CALL_Uniform3uiARB(ctx->Exec, (n[1].i, n[2].i, n[3].i, n[4].i));*/ + break; + case OPCODE_UNIFORM_4UI: + /*CALL_Uniform4uiARB(ctx->Exec, (n[1].i, n[2].i, n[3].i, n[4].i, n[5].i)); */ - break; - case OPCODE_UNIFORM_1UIV: - /*CALL_Uniform1uivARB(ctx->Exec, (n[1].i, n[2].i, + break; + case OPCODE_UNIFORM_1UIV: + /*CALL_Uniform1uivARB(ctx->Exec, (n[1].i, n[2].i, get_pointer(&n[3])));*/ - break; - case OPCODE_UNIFORM_2UIV: - /*CALL_Uniform2uivARB(ctx->Exec, (n[1].i, n[2].i, + break; + case OPCODE_UNIFORM_2UIV: + /*CALL_Uniform2uivARB(ctx->Exec, (n[1].i, n[2].i, get_pointer(&n[3])));*/ - break; - case OPCODE_UNIFORM_3UIV: - /*CALL_Uniform3uivARB(ctx->Exec, (n[1].i, n[2].i, + break; + case OPCODE_UNIFORM_3UIV: + /*CALL_Uniform3uivARB(ctx->Exec, (n[1].i, n[2].i, get_pointer(&n[3])));*/ - break; - case OPCODE_UNIFORM_4UIV: - /*CALL_Uniform4uivARB(ctx->Exec, (n[1].i, n[2].i, + break; + case OPCODE_UNIFORM_4UIV: + /*CALL_Uniform4uivARB(ctx->Exec, (n[1].i, n[2].i, get_pointer(&n[3])));*/ - break; - case OPCODE_UNIFORM_MATRIX22: - CALL_UniformMatrix2fv(ctx->Exec, + break; + case OPCODE_UNIFORM_MATRIX22: + CALL_UniformMatrix2fv(ctx->Exec, (n[1].i, n[2].i, n[3].b, get_pointer(&n[4]))); - break; - case OPCODE_UNIFORM_MATRIX33: - CALL_UniformMatrix3fv(ctx->Exec, + break; + case OPCODE_UNIFORM_MATRIX33: + CALL_UniformMatrix3fv(ctx->Exec, (n[1].i, n[2].i, n[3].b, get_pointer(&n[4]))); - break; - case OPCODE_UNIFORM_MATRIX44: - CALL_UniformMatrix4fv(ctx->Exec, + break; + case OPCODE_UNIFORM_MATRIX44: + CALL_UniformMatrix4fv(ctx->Exec, (n[1].i, n[2].i, n[3].b, get_pointer(&n[4]))); - break; - case OPCODE_UNIFORM_MATRIX23: - CALL_UniformMatrix2x3fv(ctx->Exec, + break; + case OPCODE_UNIFORM_MATRIX23: + CALL_UniformMatrix2x3fv(ctx->Exec, (n[1].i, n[2].i, n[3].b, get_pointer(&n[4]))); - break; - case OPCODE_UNIFORM_MATRIX32: - CALL_UniformMatrix3x2fv(ctx->Exec, + break; + case OPCODE_UNIFORM_MATRIX32: + CALL_UniformMatrix3x2fv(ctx->Exec, (n[1].i, n[2].i, n[3].b, get_pointer(&n[4]))); - break; - case OPCODE_UNIFORM_MATRIX24: - CALL_UniformMatrix2x4fv(ctx->Exec, + break; + case OPCODE_UNIFORM_MATRIX24: + CALL_UniformMatrix2x4fv(ctx->Exec, (n[1].i, n[2].i, n[3].b, get_pointer(&n[4]))); - break; - case OPCODE_UNIFORM_MATRIX42: - CALL_UniformMatrix4x2fv(ctx->Exec, + break; + case OPCODE_UNIFORM_MATRIX42: + CALL_UniformMatrix4x2fv(ctx->Exec, (n[1].i, n[2].i, n[3].b, get_pointer(&n[4]))); - break; - case OPCODE_UNIFORM_MATRIX34: - CALL_UniformMatrix3x4fv(ctx->Exec, + break; + case OPCODE_UNIFORM_MATRIX34: + CALL_UniformMatrix3x4fv(ctx->Exec, (n[1].i, n[2].i, n[3].b, get_pointer(&n[4]))); - break; - case OPCODE_UNIFORM_MATRIX43: - CALL_UniformMatrix4x3fv(ctx->Exec, + break; + case OPCODE_UNIFORM_MATRIX43: + CALL_UniformMatrix4x3fv(ctx->Exec, (n[1].i, n[2].i, n[3].b, get_pointer(&n[4]))); - break; + break; - case OPCODE_USE_PROGRAM_STAGES: - CALL_UseProgramStages(ctx->Exec, (n[1].ui, n[2].ui, n[3].ui)); - break; + case OPCODE_USE_PROGRAM_STAGES: + CALL_UseProgramStages(ctx->Exec, (n[1].ui, n[2].ui, n[3].ui)); + break; case OPCODE_PROGRAM_UNIFORM_1F: CALL_ProgramUniform1f(ctx->Exec, (n[1].ui, n[2].i, n[3].f)); break; @@ -9122,6 +9148,12 @@ CALL_UniformBlockBinding(ctx->Exec, (n[1].ui, n[2].ui, n[3].ui)); break; + /* GL_EXT_window_rectangles */ + case OPCODE_WINDOW_RECTANGLES: + CALL_WindowRectanglesEXT( + ctx->Exec, (n[1].e, n[2].si, get_pointer(&n[3]))); + break; + case OPCODE_CONTINUE: n = (Node *) get_pointer(&n[1]); break; @@ -9314,7 +9346,7 @@ /** - * End definition of current display list. + * End definition of current display list. */ void GLAPIENTRY _mesa_EndList(void) @@ -9336,7 +9368,7 @@ _mesa_error(ctx, GL_INVALID_OPERATION, "glEndList"); return; } - + /* Call before emitting END_OF_LIST, in case the driver wants to * emit opcodes itself. */ @@ -9726,7 +9758,7 @@ SET_StencilMaskSeparate(table, save_StencilMaskSeparate); SET_StencilOpSeparate(table, save_StencilOpSeparate); - /* ATI_separate_stencil */ + /* ATI_separate_stencil */ SET_StencilFuncSeparateATI(table, save_StencilFuncSeparateATI); /* GL_ARB_imaging */ @@ -10018,6 +10050,9 @@ /* GL_EXT_polygon_offset_clamp */ SET_PolygonOffsetClampEXT(table, save_PolygonOffsetClampEXT); + + /* GL_EXT_window_rectangles */ + SET_WindowRectanglesEXT(table, save_WindowRectanglesEXT); } @@ -10050,15 +10085,12 @@ if (!islist(ctx, list)) { fprintf(f, "%u is not a display list ID\n", list); - return; + goto out; } dlist = _mesa_lookup_list(ctx, list); if (!dlist) { - if (fname) { - fclose(f); - } - return; + goto out; } n = dlist->Head; @@ -10330,7 +10362,7 @@ printf ("ERROR IN DISPLAY LIST: opcode = %d, address = %p\n", opcode, (void *) n); - return; + goto out; } else { fprintf(f, "command %d, %u operands\n", opcode, @@ -10344,6 +10376,7 @@ } } + out: fflush(f); if (fname) fclose(f); diff -Nru mesa-12.0.6/src/mesa/main/drawpix.c mesa-17.0.7/src/mesa/main/drawpix.c --- mesa-12.0.6/src/mesa/main/drawpix.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/drawpix.c 2017-06-01 10:37:10.000000000 +0000 @@ -24,6 +24,7 @@ #include "glheader.h" #include "imports.h" +#include "api_validate.h" #include "bufferobj.h" #include "context.h" #include "drawpix.h" diff -Nru mesa-12.0.6/src/mesa/main/enable.c mesa-17.0.7/src/mesa/main/enable.c --- mesa-12.0.6/src/mesa/main/enable.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/enable.c 2017-06-01 10:37:10.000000000 +0000 @@ -35,7 +35,6 @@ #include "enable.h" #include "errors.h" #include "light.h" -#include "util/simple_list.h" #include "mtypes.h" #include "enums.h" #include "api_arrayelt.h" @@ -402,11 +401,10 @@ FLUSH_VERTICES(ctx, _NEW_LIGHT); ctx->Light.Light[cap-GL_LIGHT0].Enabled = state; if (state) { - insert_at_tail(&ctx->Light.EnabledList, - &ctx->Light.Light[cap-GL_LIGHT0]); + ctx->Light._EnabledLights |= 1u << (cap - GL_LIGHT0); } else { - remove_from_list(&ctx->Light.Light[cap-GL_LIGHT0]); + ctx->Light._EnabledLights &= ~(1u << (cap - GL_LIGHT0)); } break; case GL_LIGHTING: @@ -441,6 +439,16 @@ FLUSH_VERTICES(ctx, _NEW_COLOR); ctx->Color.IndexLogicOpEnabled = state; break; + case GL_CONSERVATIVE_RASTERIZATION_INTEL: + if (!_mesa_has_INTEL_conservative_rasterization(ctx)) + goto invalid_enum_error; + if (ctx->IntelConservativeRasterization == state) + return; + FLUSH_VERTICES(ctx, 0); + ctx->NewDriverState |= + ctx->DriverFlags.NewIntelConservativeRasterization; + ctx->IntelConservativeRasterization = state; + break; case GL_COLOR_LOGIC_OP: if (!_mesa_is_desktop_gl(ctx) && ctx->API != API_OPENGLES) goto invalid_enum_error; @@ -1019,6 +1027,14 @@ ctx->Multisample.SampleMask = state; break; + case GL_BLEND_ADVANCED_COHERENT_KHR: + CHECK_EXTENSION(KHR_blend_equation_advanced_coherent, cap); + if (ctx->Color.BlendCoherent == state) + return; + FLUSH_VERTICES(ctx, _NEW_COLOR); + ctx->Color.BlendCoherent = state; + break; + default: goto invalid_enum_error; } @@ -1621,6 +1637,14 @@ CHECK_EXTENSION(ARB_sample_shading); return ctx->Multisample.SampleShading; + case GL_BLEND_ADVANCED_COHERENT_KHR: + CHECK_EXTENSION(KHR_blend_equation_advanced_coherent); + return ctx->Color.BlendCoherent; + + case GL_CONSERVATIVE_RASTERIZATION_INTEL: + CHECK_EXTENSION(INTEL_conservative_rasterization); + return ctx->IntelConservativeRasterization; + default: goto invalid_enum_error; } diff -Nru mesa-12.0.6/src/mesa/main/enums.c mesa-17.0.7/src/mesa/main/enums.c --- mesa-12.0.6/src/mesa/main/enums.c 2017-01-24 01:42:44.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/enums.c 2017-06-01 10:37:44.000000000 +0000 @@ -395,7 +395,7 @@ 'G', 'L', '_', 'D', 'O', 'U', 'B', 'L', 'E', '\0', 'G', 'L', '_', 'H', 'A', 'L', 'F', '_', 'F', 'L', 'O', 'A', 'T', '\0', 'G', 'L', '_', 'F', 'I', 'X', 'E', 'D', '\0', - 'G', 'L', '_', 'I', 'N', 'T', '6', '4', '_', 'N', 'V', '\0', + 'G', 'L', '_', 'I', 'N', 'T', '6', '4', '_', 'A', 'R', 'B', '\0', 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '6', '4', '_', 'A', 'R', 'B', '\0', 'G', 'L', '_', 'C', 'L', 'E', 'A', 'R', '\0', 'G', 'L', '_', 'A', 'N', 'D', '\0', @@ -1214,6 +1214,7 @@ 'G', 'L', '_', 'P', 'E', 'R', 'F', 'Q', 'U', 'E', 'R', 'Y', '_', 'D', 'O', 'N', 'O', 'T', '_', 'F', 'L', 'U', 'S', 'H', '_', 'I', 'N', 'T', 'E', 'L', '\0', 'G', 'L', '_', 'P', 'E', 'R', 'F', 'Q', 'U', 'E', 'R', 'Y', '_', 'F', 'L', 'U', 'S', 'H', '_', 'I', 'N', 'T', 'E', 'L', '\0', 'G', 'L', '_', 'P', 'E', 'R', 'F', 'Q', 'U', 'E', 'R', 'Y', '_', 'W', 'A', 'I', 'T', '_', 'I', 'N', 'T', 'E', 'L', '\0', + 'G', 'L', '_', 'C', 'O', 'N', 'S', 'E', 'R', 'V', 'A', 'T', 'I', 'V', 'E', '_', 'R', 'A', 'S', 'T', 'E', 'R', 'I', 'Z', 'A', 'T', 'I', 'O', 'N', '_', 'I', 'N', 'T', 'E', 'L', '\0', 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'M', 'E', 'M', 'O', 'R', 'Y', '_', 'L', 'A', 'Y', 'O', 'U', 'T', '_', 'I', 'N', 'T', 'E', 'L', '\0', 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'L', 'I', 'G', 'H', 'T', 'I', 'N', 'G', '_', 'S', 'G', 'I', 'X', '\0', 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'C', 'O', 'L', 'O', 'R', '_', 'M', 'A', 'T', 'E', 'R', 'I', 'A', 'L', '_', 'S', 'G', 'I', 'X', '\0', @@ -2440,6 +2441,7 @@ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'O', 'B', 'J', 'E', 'C', 'T', '_', 'V', 'A', 'L', 'I', 'D', '_', 'Q', 'C', 'O', 'M', '\0', 'G', 'L', '_', 'S', 'T', 'A', 'T', 'E', '_', 'R', 'E', 'S', 'T', 'O', 'R', 'E', '\0', 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', 'E', 'X', 'T', 'E', 'R', 'N', 'A', 'L', '_', '2', 'D', '_', 'Y', '2', 'Y', '_', 'E', 'X', 'T', '\0', + 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'P', 'R', 'O', 'T', 'E', 'C', 'T', 'E', 'D', '_', 'E', 'X', 'T', '\0', 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', '_', 'P', 'V', 'R', 'T', 'C', '_', '4', 'B', 'P', 'P', 'V', '1', '_', 'I', 'M', 'G', '\0', 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', '_', 'P', 'V', 'R', 'T', 'C', '_', '2', 'B', 'P', 'P', 'V', '1', '_', 'I', 'M', 'G', '\0', 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'P', 'V', 'R', 'T', 'C', '_', '4', 'B', 'P', 'P', 'V', '1', '_', 'I', 'M', 'G', '\0', @@ -2852,6 +2854,12 @@ 'G', 'L', '_', 'C', 'O', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'A', 'L', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', 'S', '_', 'N', 'V', '\0', 'G', 'L', '_', 'C', 'O', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'E', 'D', 'G', 'E', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', 'S', '_', 'N', 'V', '\0', 'G', 'L', '_', 'C', 'O', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'A', 'U', 'T', 'O', 'M', 'A', 'T', 'I', 'C', '_', 'N', 'V', '\0', + 'G', 'L', '_', 'I', 'N', 'C', 'L', 'U', 'S', 'I', 'V', 'E', '_', 'E', 'X', 'T', '\0', + 'G', 'L', '_', 'E', 'X', 'C', 'L', 'U', 'S', 'I', 'V', 'E', '_', 'E', 'X', 'T', '\0', + 'G', 'L', '_', 'W', 'I', 'N', 'D', 'O', 'W', '_', 'R', 'E', 'C', 'T', 'A', 'N', 'G', 'L', 'E', '_', 'E', 'X', 'T', '\0', + 'G', 'L', '_', 'W', 'I', 'N', 'D', 'O', 'W', '_', 'R', 'E', 'C', 'T', 'A', 'N', 'G', 'L', 'E', '_', 'M', 'O', 'D', 'E', '_', 'E', 'X', 'T', '\0', + 'G', 'L', '_', 'M', 'A', 'X', '_', 'W', 'I', 'N', 'D', 'O', 'W', '_', 'R', 'E', 'C', 'T', 'A', 'N', 'G', 'L', 'E', 'S', '_', 'E', 'X', 'T', '\0', + 'G', 'L', '_', 'N', 'U', 'M', '_', 'W', 'I', 'N', 'D', 'O', 'W', '_', 'R', 'E', 'C', 'T', 'A', 'N', 'G', 'L', 'E', 'S', '_', 'E', 'X', 'T', '\0', 'G', 'L', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'G', 'P', 'U', '_', 'A', 'D', 'D', 'R', 'E', 'S', 'S', '_', 'N', 'V', '\0', 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'U', 'N', 'I', 'F', 'I', 'E', 'D', '_', 'N', 'V', '\0', 'G', 'L', '_', 'E', 'L', 'E', 'M', 'E', 'N', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'U', 'N', 'I', 'F', 'I', 'E', 'D', '_', 'N', 'V', '\0', @@ -2943,9 +2951,9 @@ 'G', 'L', '_', 'I', 'N', 'T', '1', '6', '_', 'V', 'E', 'C', '2', '_', 'N', 'V', '\0', 'G', 'L', '_', 'I', 'N', 'T', '1', '6', '_', 'V', 'E', 'C', '3', '_', 'N', 'V', '\0', 'G', 'L', '_', 'I', 'N', 'T', '1', '6', '_', 'V', 'E', 'C', '4', '_', 'N', 'V', '\0', - 'G', 'L', '_', 'I', 'N', 'T', '6', '4', '_', 'V', 'E', 'C', '2', '_', 'N', 'V', '\0', - 'G', 'L', '_', 'I', 'N', 'T', '6', '4', '_', 'V', 'E', 'C', '3', '_', 'N', 'V', '\0', - 'G', 'L', '_', 'I', 'N', 'T', '6', '4', '_', 'V', 'E', 'C', '4', '_', 'N', 'V', '\0', + 'G', 'L', '_', 'I', 'N', 'T', '6', '4', '_', 'V', 'E', 'C', '2', '_', 'A', 'R', 'B', '\0', + 'G', 'L', '_', 'I', 'N', 'T', '6', '4', '_', 'V', 'E', 'C', '3', '_', 'A', 'R', 'B', '\0', + 'G', 'L', '_', 'I', 'N', 'T', '6', '4', '_', 'V', 'E', 'C', '4', '_', 'A', 'R', 'B', '\0', 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '8', '_', 'N', 'V', '\0', 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '8', '_', 'V', 'E', 'C', '2', '_', 'N', 'V', '\0', 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '8', '_', 'V', 'E', 'C', '3', '_', 'N', 'V', '\0', @@ -2954,9 +2962,9 @@ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '1', '6', '_', 'V', 'E', 'C', '2', '_', 'N', 'V', '\0', 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '1', '6', '_', 'V', 'E', 'C', '3', '_', 'N', 'V', '\0', 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '1', '6', '_', 'V', 'E', 'C', '4', '_', 'N', 'V', '\0', - 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '6', '4', '_', 'V', 'E', 'C', '2', '_', 'N', 'V', '\0', - 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '6', '4', '_', 'V', 'E', 'C', '3', '_', 'N', 'V', '\0', - 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '6', '4', '_', 'V', 'E', 'C', '4', '_', 'N', 'V', '\0', + 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '6', '4', '_', 'V', 'E', 'C', '2', '_', 'A', 'R', 'B', '\0', + 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '6', '4', '_', 'V', 'E', 'C', '3', '_', 'A', 'R', 'B', '\0', + 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '6', '4', '_', 'V', 'E', 'C', '4', '_', 'A', 'R', 'B', '\0', 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '1', '6', '_', 'N', 'V', '\0', 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '1', '6', '_', 'V', 'E', 'C', '2', '_', 'N', 'V', '\0', 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '1', '6', '_', 'V', 'E', 'C', '3', '_', 'N', 'V', '\0', @@ -3173,7 +3181,7 @@ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '_', 'E', 'X', 'T', '\0', 'G', 'L', '_', 'M', 'U', 'L', 'T', 'I', 'V', 'I', 'E', 'W', '_', 'E', 'X', 'T', '\0', 'G', 'L', '_', 'M', 'A', 'X', '_', 'M', 'U', 'L', 'T', 'I', 'V', 'I', 'E', 'W', '_', 'B', 'U', 'F', 'F', 'E', 'R', 'S', '_', 'E', 'X', 'T', '\0', - 'G', 'L', '_', 'C', 'O', 'N', 'T', 'E', 'X', 'T', '_', 'R', 'O', 'B', 'U', 'S', 'T', '_', 'A', 'C', 'C', 'E', 'S', 'S', '_', 'E', 'X', 'T', '\0', + 'G', 'L', '_', 'C', 'O', 'N', 'T', 'E', 'X', 'T', '_', 'R', 'O', 'B', 'U', 'S', 'T', '_', 'A', 'C', 'C', 'E', 'S', 'S', '\0', 'G', 'L', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'N', 'V', '\0', 'G', 'L', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'P', 'A', 'R', 'A', 'M', 'E', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'N', 'V', '\0', 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '2', 'D', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '\0', @@ -3230,6 +3238,13 @@ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '_', 'I', 'M', 'G', '\0', 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'P', 'V', 'R', 'T', 'C', '_', '2', 'B', 'P', 'P', 'V', '2', '_', 'I', 'M', 'G', '\0', 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'P', 'V', 'R', 'T', 'C', '_', '4', 'B', 'P', 'P', 'V', '2', '_', 'I', 'M', 'G', '\0', + 'G', 'L', '_', 'C', 'U', 'B', 'I', 'C', '_', 'I', 'M', 'G', '\0', + 'G', 'L', '_', 'C', 'U', 'B', 'I', 'C', '_', 'M', 'I', 'P', 'M', 'A', 'P', '_', 'N', 'E', 'A', 'R', 'E', 'S', 'T', '_', 'I', 'M', 'G', '\0', + 'G', 'L', '_', 'C', 'U', 'B', 'I', 'C', '_', 'M', 'I', 'P', 'M', 'A', 'P', '_', 'L', 'I', 'N', 'E', 'A', 'R', '_', 'I', 'M', 'G', '\0', + 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'I', 'N', 'C', 'O', 'M', 'P', 'L', 'E', 'T', 'E', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'A', 'N', 'D', '_', 'D', 'O', 'W', 'N', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'I', 'M', 'G', '\0', + 'G', 'L', '_', 'N', 'U', 'M', '_', 'D', 'O', 'W', 'N', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'S', 'C', 'A', 'L', 'E', 'S', '_', 'I', 'M', 'G', '\0', + 'G', 'L', '_', 'D', 'O', 'W', 'N', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'S', 'C', 'A', 'L', 'E', 'S', '_', 'I', 'M', 'G', '\0', + 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'C', 'A', 'L', 'E', '_', 'I', 'M', 'G', '\0', 'G', 'L', '_', 'M', 'A', 'X', '_', 'D', 'E', 'B', 'U', 'G', '_', 'M', 'E', 'S', 'S', 'A', 'G', 'E', '_', 'L', 'E', 'N', 'G', 'T', 'H', '\0', 'G', 'L', '_', 'M', 'A', 'X', '_', 'D', 'E', 'B', 'U', 'G', '_', 'L', 'O', 'G', 'G', 'E', 'D', '_', 'M', 'E', 'S', 'S', 'A', 'G', 'E', 'S', '\0', 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'L', 'O', 'G', 'G', 'E', 'D', '_', 'M', 'E', 'S', 'S', 'A', 'G', 'E', 'S', '\0', @@ -3272,6 +3287,8 @@ 'G', 'L', '_', 'N', 'U', 'M', '_', 'V', 'I', 'R', 'T', 'U', 'A', 'L', '_', 'P', 'A', 'G', 'E', '_', 'S', 'I', 'Z', 'E', 'S', '_', 'A', 'R', 'B', '\0', 'G', 'L', '_', 'S', 'P', 'A', 'R', 'S', 'E', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'F', 'U', 'L', 'L', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'C', 'U', 'B', 'E', '_', 'M', 'I', 'P', 'M', 'A', 'P', 'S', '_', 'A', 'R', 'B', '\0', 'G', 'L', '_', 'N', 'U', 'M', '_', 'S', 'P', 'A', 'R', 'S', 'E', '_', 'L', 'E', 'V', 'E', 'L', 'S', '_', 'A', 'R', 'B', '\0', + 'G', 'L', '_', 'M', 'A', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'C', 'O', 'M', 'P', 'I', 'L', 'E', 'R', '_', 'T', 'H', 'R', 'E', 'A', 'D', 'S', '_', 'A', 'R', 'B', '\0', + 'G', 'L', '_', 'C', 'O', 'M', 'P', 'L', 'E', 'T', 'I', 'O', 'N', '_', 'S', 'T', 'A', 'T', 'U', 'S', '_', 'A', 'R', 'B', '\0', 'G', 'L', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'S', 'H', 'A', 'D', 'E', 'R', '\0', 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'L', 'O', 'C', 'K', 'S', '\0', 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'I', 'M', 'A', 'G', 'E', '_', 'U', 'N', 'I', 'T', 'S', '\0', @@ -3311,18 +3328,18 @@ 'G', 'L', '_', 'D', 'S', 'T', '_', 'A', 'T', 'O', 'P', '_', 'N', 'V', '\0', 'G', 'L', '_', 'P', 'L', 'U', 'S', '_', 'N', 'V', '\0', 'G', 'L', '_', 'P', 'L', 'U', 'S', '_', 'D', 'A', 'R', 'K', 'E', 'R', '_', 'N', 'V', '\0', - 'G', 'L', '_', 'M', 'U', 'L', 'T', 'I', 'P', 'L', 'Y', '_', 'K', 'H', 'R', '\0', - 'G', 'L', '_', 'S', 'C', 'R', 'E', 'E', 'N', '_', 'K', 'H', 'R', '\0', - 'G', 'L', '_', 'O', 'V', 'E', 'R', 'L', 'A', 'Y', '_', 'K', 'H', 'R', '\0', - 'G', 'L', '_', 'D', 'A', 'R', 'K', 'E', 'N', '_', 'K', 'H', 'R', '\0', - 'G', 'L', '_', 'L', 'I', 'G', 'H', 'T', 'E', 'N', '_', 'K', 'H', 'R', '\0', - 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', 'D', 'O', 'D', 'G', 'E', '_', 'K', 'H', 'R', '\0', - 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', 'B', 'U', 'R', 'N', '_', 'K', 'H', 'R', '\0', - 'G', 'L', '_', 'H', 'A', 'R', 'D', 'L', 'I', 'G', 'H', 'T', '_', 'K', 'H', 'R', '\0', - 'G', 'L', '_', 'S', 'O', 'F', 'T', 'L', 'I', 'G', 'H', 'T', '_', 'K', 'H', 'R', '\0', - 'G', 'L', '_', 'D', 'I', 'F', 'F', 'E', 'R', 'E', 'N', 'C', 'E', '_', 'K', 'H', 'R', '\0', + 'G', 'L', '_', 'M', 'U', 'L', 'T', 'I', 'P', 'L', 'Y', '\0', + 'G', 'L', '_', 'S', 'C', 'R', 'E', 'E', 'N', '\0', + 'G', 'L', '_', 'O', 'V', 'E', 'R', 'L', 'A', 'Y', '\0', + 'G', 'L', '_', 'D', 'A', 'R', 'K', 'E', 'N', '\0', + 'G', 'L', '_', 'L', 'I', 'G', 'H', 'T', 'E', 'N', '\0', + 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', 'D', 'O', 'D', 'G', 'E', '\0', + 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', 'B', 'U', 'R', 'N', '\0', + 'G', 'L', '_', 'H', 'A', 'R', 'D', 'L', 'I', 'G', 'H', 'T', '\0', + 'G', 'L', '_', 'S', 'O', 'F', 'T', 'L', 'I', 'G', 'H', 'T', '\0', + 'G', 'L', '_', 'D', 'I', 'F', 'F', 'E', 'R', 'E', 'N', 'C', 'E', '\0', 'G', 'L', '_', 'M', 'I', 'N', 'U', 'S', '_', 'N', 'V', '\0', - 'G', 'L', '_', 'E', 'X', 'C', 'L', 'U', 'S', 'I', 'O', 'N', '_', 'K', 'H', 'R', '\0', + 'G', 'L', '_', 'E', 'X', 'C', 'L', 'U', 'S', 'I', 'O', 'N', '\0', 'G', 'L', '_', 'C', 'O', 'N', 'T', 'R', 'A', 'S', 'T', '_', 'N', 'V', '\0', 'G', 'L', '_', 'I', 'N', 'V', 'E', 'R', 'T', '_', 'R', 'G', 'B', '_', 'N', 'V', '\0', 'G', 'L', '_', 'L', 'I', 'N', 'E', 'A', 'R', 'D', 'O', 'D', 'G', 'E', '_', 'N', 'V', '\0', @@ -3331,15 +3348,16 @@ 'G', 'L', '_', 'L', 'I', 'N', 'E', 'A', 'R', 'L', 'I', 'G', 'H', 'T', '_', 'N', 'V', '\0', 'G', 'L', '_', 'P', 'I', 'N', 'L', 'I', 'G', 'H', 'T', '_', 'N', 'V', '\0', 'G', 'L', '_', 'H', 'A', 'R', 'D', 'M', 'I', 'X', '_', 'N', 'V', '\0', - 'G', 'L', '_', 'H', 'S', 'L', '_', 'H', 'U', 'E', '_', 'K', 'H', 'R', '\0', - 'G', 'L', '_', 'H', 'S', 'L', '_', 'S', 'A', 'T', 'U', 'R', 'A', 'T', 'I', 'O', 'N', '_', 'K', 'H', 'R', '\0', - 'G', 'L', '_', 'H', 'S', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'K', 'H', 'R', '\0', - 'G', 'L', '_', 'H', 'S', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'O', 'S', 'I', 'T', 'Y', '_', 'K', 'H', 'R', '\0', + 'G', 'L', '_', 'H', 'S', 'L', '_', 'H', 'U', 'E', '\0', + 'G', 'L', '_', 'H', 'S', 'L', '_', 'S', 'A', 'T', 'U', 'R', 'A', 'T', 'I', 'O', 'N', '\0', + 'G', 'L', '_', 'H', 'S', 'L', '_', 'C', 'O', 'L', 'O', 'R', '\0', + 'G', 'L', '_', 'H', 'S', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'O', 'S', 'I', 'T', 'Y', '\0', 'G', 'L', '_', 'P', 'L', 'U', 'S', '_', 'C', 'L', 'A', 'M', 'P', 'E', 'D', '_', 'N', 'V', '\0', 'G', 'L', '_', 'P', 'L', 'U', 'S', '_', 'C', 'L', 'A', 'M', 'P', 'E', 'D', '_', 'A', 'L', 'P', 'H', 'A', '_', 'N', 'V', '\0', 'G', 'L', '_', 'M', 'I', 'N', 'U', 'S', '_', 'C', 'L', 'A', 'M', 'P', 'E', 'D', '_', 'N', 'V', '\0', 'G', 'L', '_', 'I', 'N', 'V', 'E', 'R', 'T', '_', 'O', 'V', 'G', '_', 'N', 'V', '\0', - 'G', 'L', '_', 'P', 'R', 'I', 'M', 'I', 'T', 'I', 'V', 'E', '_', 'B', 'O', 'U', 'N', 'D', 'I', 'N', 'G', '_', 'B', 'O', 'X', '_', 'E', 'X', 'T', '\0', + 'G', 'L', '_', 'P', 'U', 'R', 'G', 'E', 'D', '_', 'C', 'O', 'N', 'T', 'E', 'X', 'T', '_', 'R', 'E', 'S', 'E', 'T', '_', 'N', 'V', '\0', + 'G', 'L', '_', 'P', 'R', 'I', 'M', 'I', 'T', 'I', 'V', 'E', '_', 'B', 'O', 'U', 'N', 'D', 'I', 'N', 'G', '_', 'B', 'O', 'X', '\0', 'G', 'L', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '\0', 'G', 'L', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0', 'G', 'L', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'T', 'A', 'R', 'T', '\0', @@ -3445,13 +3463,13 @@ 'G', 'L', '_', 'W', 'A', 'R', 'P', 'S', '_', 'P', 'E', 'R', '_', 'S', 'M', '_', 'N', 'V', '\0', 'G', 'L', '_', 'S', 'M', '_', 'C', 'O', 'U', 'N', 'T', '_', 'N', 'V', '\0', 'G', 'L', '_', 'F', 'I', 'L', 'L', '_', 'R', 'E', 'C', 'T', 'A', 'N', 'G', 'L', 'E', '_', 'N', 'V', '\0', - 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', '_', 'S', 'U', 'B', 'P', 'I', 'X', 'E', 'L', '_', 'B', 'I', 'T', 'S', '_', 'N', 'V', '\0', - 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', '_', 'P', 'I', 'X', 'E', 'L', '_', 'G', 'R', 'I', 'D', '_', 'W', 'I', 'D', 'T', 'H', '_', 'N', 'V', '\0', - 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', '_', 'P', 'I', 'X', 'E', 'L', '_', 'G', 'R', 'I', 'D', '_', 'H', 'E', 'I', 'G', 'H', 'T', '_', 'N', 'V', '\0', - 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', 'M', 'A', 'B', 'L', 'E', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', '_', 'T', 'A', 'B', 'L', 'E', '_', 'S', 'I', 'Z', 'E', '_', 'N', 'V', '\0', - 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', 'M', 'A', 'B', 'L', 'E', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', '_', 'N', 'V', '\0', - 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', 'M', 'A', 'B', 'L', 'E', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', 'S', '_', 'N', 'V', '\0', - 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', '_', 'P', 'I', 'X', 'E', 'L', '_', 'G', 'R', 'I', 'D', '_', 'N', 'V', '\0', + 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', '_', 'S', 'U', 'B', 'P', 'I', 'X', 'E', 'L', '_', 'B', 'I', 'T', 'S', '_', 'A', 'R', 'B', '\0', + 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', '_', 'P', 'I', 'X', 'E', 'L', '_', 'G', 'R', 'I', 'D', '_', 'W', 'I', 'D', 'T', 'H', '_', 'A', 'R', 'B', '\0', + 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', '_', 'P', 'I', 'X', 'E', 'L', '_', 'G', 'R', 'I', 'D', '_', 'H', 'E', 'I', 'G', 'H', 'T', '_', 'A', 'R', 'B', '\0', + 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', 'M', 'A', 'B', 'L', 'E', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', '_', 'T', 'A', 'B', 'L', 'E', '_', 'S', 'I', 'Z', 'E', '_', 'A', 'R', 'B', '\0', + 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', 'M', 'A', 'B', 'L', 'E', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', '_', 'A', 'R', 'B', '\0', + 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', 'M', 'A', 'B', 'L', 'E', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', 'S', '_', 'A', 'R', 'B', '\0', + 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', '_', 'P', 'I', 'X', 'E', 'L', '_', 'G', 'R', 'I', 'D', '_', 'A', 'R', 'B', '\0', 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'V', 'A', 'R', 'I', 'A', 'B', 'L', 'E', '_', 'G', 'R', 'O', 'U', 'P', '_', 'I', 'N', 'V', 'O', 'C', 'A', 'T', 'I', 'O', 'N', 'S', '_', 'A', 'R', 'B', '\0', 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'V', 'A', 'R', 'I', 'A', 'B', 'L', 'E', '_', 'G', 'R', 'O', 'U', 'P', '_', 'S', 'I', 'Z', 'E', '_', 'A', 'R', 'B', '\0', 'G', 'L', '_', 'C', 'O', 'N', 'S', 'E', 'R', 'V', 'A', 'T', 'I', 'V', 'E', '_', 'R', 'A', 'S', 'T', 'E', 'R', 'I', 'Z', 'A', 'T', 'I', 'O', 'N', '_', 'N', 'V', '\0', @@ -3461,11 +3479,25 @@ 'G', 'L', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', '\0', 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'F', 'E', 'E', 'D', 'B', 'A', 'C', 'K', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'I', 'N', 'D', 'E', 'X', '\0', 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'F', 'E', 'E', 'D', 'B', 'A', 'C', 'K', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'T', 'R', 'I', 'D', 'E', '\0', + 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'P', 'O', 'S', 'I', 'T', 'I', 'V', 'E', '_', 'X', '_', 'N', 'V', '\0', + 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'N', 'E', 'G', 'A', 'T', 'I', 'V', 'E', '_', 'X', '_', 'N', 'V', '\0', + 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'P', 'O', 'S', 'I', 'T', 'I', 'V', 'E', '_', 'Y', '_', 'N', 'V', '\0', + 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'N', 'E', 'G', 'A', 'T', 'I', 'V', 'E', '_', 'Y', '_', 'N', 'V', '\0', + 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'P', 'O', 'S', 'I', 'T', 'I', 'V', 'E', '_', 'Z', '_', 'N', 'V', '\0', + 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'N', 'E', 'G', 'A', 'T', 'I', 'V', 'E', '_', 'Z', '_', 'N', 'V', '\0', + 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'P', 'O', 'S', 'I', 'T', 'I', 'V', 'E', '_', 'W', '_', 'N', 'V', '\0', + 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'N', 'E', 'G', 'A', 'T', 'I', 'V', 'E', '_', 'W', '_', 'N', 'V', '\0', + 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'X', '_', 'N', 'V', '\0', + 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'Y', '_', 'N', 'V', '\0', + 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'Z', '_', 'N', 'V', '\0', + 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'W', '_', 'N', 'V', '\0', 'G', 'L', '_', 'C', 'L', 'I', 'P', '_', 'O', 'R', 'I', 'G', 'I', 'N', '\0', 'G', 'L', '_', 'C', 'L', 'I', 'P', '_', 'D', 'E', 'P', 'T', 'H', '_', 'M', 'O', 'D', 'E', '\0', 'G', 'L', '_', 'N', 'E', 'G', 'A', 'T', 'I', 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'_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '1', '0', 'x', '8', '\0', + 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '1', '0', 'x', '1', '0', '\0', + 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '1', '2', 'x', '1', '0', '\0', + 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '1', '2', 'x', '1', '2', '\0', 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '3', 'x', '3', 'x', '3', '_', 'O', 'E', 'S', '\0', 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '4', 'x', '3', 'x', '3', '_', 'O', 'E', 'S', '\0', 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '4', 'x', '4', 'x', '3', '_', 'O', 'E', 'S', '\0', @@ -3551,9 +3591,15 @@ 'G', 'L', '_', 'P', 'E', 'R', 'F', 'Q', 'U', 'E', 'R', 'Y', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'N', 'A', 'M', 'E', '_', 'L', 'E', 'N', 'G', 'T', 'H', '_', 'M', 'A', 'X', '_', 'I', 'N', 'T', 'E', 'L', '\0', 'G', 'L', '_', 'P', 'E', 'R', 'F', 'Q', 'U', 'E', 'R', 'Y', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'D', 'E', 'S', 'C', '_', 'L', 'E', 'N', 'G', 'T', 'H', '_', 'M', 'A', 'X', '_', 'I', 'N', 'T', 'E', 'L', '\0', 'G', 'L', '_', 'P', 'E', 'R', 'F', 'Q', 'U', 'E', 'R', 'Y', '_', 'G', 'P', 'A', '_', 'E', 'X', 'T', 'E', 'N', 'D', 'E', 'D', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', 'S', '_', 'I', 'N', 'T', 'E', 'L', '\0', + 'G', 'L', '_', 'C', 'O', 'N', 'S', 'E', 'R', 'V', 'A', 'T', 'I', 'V', 'E', '_', 'R', 'A', 'S', 'T', 'E', 'R', '_', 'M', 'O', 'D', 'E', '_', 'N', 'V', '\0', + 'G', 'L', '_', 'C', 'O', 'N', 'S', 'E', 'R', 'V', 'A', 'T', 'I', 'V', 'E', '_', 'R', 'A', 'S', 'T', 'E', 'R', '_', 'M', 'O', 'D', 'E', '_', 'P', 'O', 'S', 'T', '_', 'S', 'N', 'A', 'P', '_', 'N', 'V', '\0', + 'G', 'L', '_', 'C', 'O', 'N', 'S', 'E', 'R', 'V', 'A', 'T', 'I', 'V', 'E', '_', 'R', 'A', 'S', 'T', 'E', 'R', '_', 'M', 'O', 'D', 'E', '_', 'P', 'R', 'E', '_', 'S', 'N', 'A', 'P', '_', 'T', 'R', 'I', 'A', 'N', 'G', 'L', 'E', 'S', '_', 'N', 'V', '\0', 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'N', 'U', 'M', '_', 'V', 'I', 'E', 'W', 'S', '_', 'O', 'V', 'R', '\0', 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'I', 'E', 'W', 'S', '_', 'O', 'V', 'R', '\0', 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'B', 'A', 'S', 'E', '_', 'V', 'I', 'E', 'W', '_', 'I', 'N', 'D', 'E', 'X', '_', 'O', 'V', 'R', '\0', + 'G', 'L', '_', 'M', 'A', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'D', '_', 'L', 'O', 'C', 'A', 'L', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'F', 'A', 'S', 'T', '_', 'S', 'I', 'Z', 'E', '_', 'E', 'X', 'T', '\0', + 'G', 'L', '_', 'M', 'A', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'D', '_', 'L', 'O', 'C', 'A', 'L', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'S', 'I', 'Z', 'E', '_', 'E', 'X', 'T', '\0', + 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'I', 'N', 'C', 'O', 'M', 'P', 'L', 'E', 'T', 'E', '_', 'I', 'N', 'S', 'U', 'F', 'F', 'I', 'C', 'I', 'E', 'N', 'T', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'D', '_', 'L', 'O', 'C', 'A', 'L', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'E', 'X', 'T', '\0', 'G', 'L', '_', 'R', 'A', 'S', 'T', 'E', 'R', '_', 'P', 'O', 'S', 'I', 'T', 'I', 'O', 'N', '_', 'U', 'N', 'C', 'L', 'I', 'P', 'P', 'E', 'D', '_', 'I', 'B', 'M', '\0', 'G', 'L', '_', 'P', 'R', 'E', 'F', 'E', 'R', '_', 'D', 'O', 'U', 'B', 'L', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'H', 'I', 'N', 'T', '_', 'P', 'G', 'I', '\0', 'G', 'L', '_', 'C', 'O', 'N', 'S', 'E', 'R', 'V', 'E', '_', 'M', 'E', 'M', 'O', 'R', 'Y', '_', 'H', 'I', 'N', 'T', '_', 'P', 'G', 'I', '\0', @@ -3600,7 +3646,7 @@ 'G', 'L', '_', 'S', 'E', 'C', 'O', 'N', 'D', 'A', 'R', 'Y', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'I', 'S', 'T', '_', 'S', 'T', 'R', 'I', 'D', 'E', '_', 'I', 'B', 'M', '\0', }; -static const enum_elt enum_string_table_offsets[3556] = +static const enum_elt enum_string_table_offsets[3602] = { { 0, 0x00000000 }, /* GL_NO_ERROR */ { 12, 0x00000001 }, /* GL_TRUE */ @@ -3955,3209 +4001,3255 @@ { 6312, 0x0000140A }, /* GL_DOUBLE */ { 6322, 0x0000140B }, /* GL_HALF_FLOAT */ { 6336, 0x0000140C }, /* GL_FIXED */ - { 6345, 0x0000140E }, /* GL_INT64_NV */ - { 6357, 0x0000140F }, /* GL_UNSIGNED_INT64_ARB */ - { 6379, 0x00001500 }, /* GL_CLEAR */ - { 6388, 0x00001501 }, /* GL_AND */ - { 6395, 0x00001502 }, /* GL_AND_REVERSE */ - { 6410, 0x00001503 }, /* GL_COPY */ - { 6418, 0x00001504 }, /* GL_AND_INVERTED */ - { 6434, 0x00001505 }, /* GL_NOOP */ - { 6442, 0x00001506 }, /* GL_XOR */ - { 6449, 0x00001507 }, /* GL_OR */ - { 6455, 0x00001508 }, /* GL_NOR */ - { 6462, 0x00001509 }, /* GL_EQUIV */ - { 6471, 0x0000150A }, /* GL_INVERT */ - { 6481, 0x0000150B }, /* GL_OR_REVERSE */ - { 6495, 0x0000150C }, /* GL_COPY_INVERTED */ - { 6512, 0x0000150D }, /* GL_OR_INVERTED */ - { 6527, 0x0000150E }, /* GL_NAND */ - { 6535, 0x0000150F }, /* GL_SET */ - { 6542, 0x00001600 }, /* GL_EMISSION */ - { 6554, 0x00001601 }, /* GL_SHININESS */ - { 6567, 0x00001602 }, /* GL_AMBIENT_AND_DIFFUSE */ - { 6590, 0x00001603 }, /* GL_COLOR_INDEXES */ - { 6607, 0x00001700 }, /* GL_MODELVIEW */ - { 6620, 0x00001701 }, /* GL_PROJECTION */ - { 6634, 0x00001702 }, /* GL_TEXTURE */ - { 6645, 0x00001800 }, /* GL_COLOR */ - { 6654, 0x00001801 }, /* GL_DEPTH */ - { 6663, 0x00001802 }, /* GL_STENCIL */ - { 6674, 0x00001900 }, /* GL_COLOR_INDEX */ - { 6689, 0x00001901 }, /* GL_STENCIL_INDEX */ - { 6706, 0x00001902 }, /* GL_DEPTH_COMPONENT */ - { 6725, 0x00001903 }, /* GL_RED */ - { 6732, 0x00001904 }, /* GL_GREEN */ - { 6741, 0x00001905 }, /* GL_BLUE */ - { 6749, 0x00001906 }, /* GL_ALPHA */ - { 6758, 0x00001907 }, /* GL_RGB */ - { 6765, 0x00001908 }, /* GL_RGBA */ - { 6773, 0x00001909 }, /* GL_LUMINANCE */ - { 6786, 0x0000190A }, /* GL_LUMINANCE_ALPHA */ - { 6805, 0x00001A00 }, /* GL_BITMAP */ - { 6815, 0x00001B00 }, /* GL_POINT */ - { 6824, 0x00001B01 }, /* GL_LINE */ - { 6832, 0x00001B02 }, /* GL_FILL */ - { 6840, 0x00001C00 }, /* GL_RENDER */ - { 6850, 0x00001C01 }, /* GL_FEEDBACK */ - { 6862, 0x00001C02 }, /* GL_SELECT */ - { 6872, 0x00001D00 }, /* GL_FLAT */ - { 6880, 0x00001D01 }, /* GL_SMOOTH */ - { 6890, 0x00001E00 }, /* GL_KEEP */ - { 6898, 0x00001E01 }, /* GL_REPLACE */ - { 6909, 0x00001E02 }, /* GL_INCR */ - { 6917, 0x00001E03 }, /* GL_DECR */ - { 6925, 0x00001F00 }, /* GL_VENDOR */ - { 6935, 0x00001F01 }, /* GL_RENDERER */ - { 6947, 0x00001F02 }, /* GL_VERSION */ - { 6958, 0x00001F03 }, /* GL_EXTENSIONS */ - { 6972, 0x00002000 }, /* GL_S */ - { 6977, 0x00002001 }, /* GL_T */ - { 6982, 0x00002002 }, /* GL_R */ - { 6987, 0x00002003 }, /* GL_Q */ - { 6992, 0x00002100 }, /* GL_MODULATE */ - { 7004, 0x00002101 }, /* GL_DECAL */ - { 7013, 0x00002200 }, /* GL_TEXTURE_ENV_MODE */ - { 7033, 0x00002201 }, /* GL_TEXTURE_ENV_COLOR */ - { 7054, 0x00002300 }, /* GL_TEXTURE_ENV */ - { 7069, 0x00002400 }, /* GL_EYE_LINEAR */ - { 7083, 0x00002401 }, /* GL_OBJECT_LINEAR */ - { 7100, 0x00002402 }, /* GL_SPHERE_MAP */ - { 7114, 0x00002500 }, /* GL_TEXTURE_GEN_MODE */ - { 7134, 0x00002501 }, /* GL_OBJECT_PLANE */ - { 7150, 0x00002502 }, /* GL_EYE_PLANE */ - { 7163, 0x00002600 }, /* GL_NEAREST */ - { 7174, 0x00002601 }, /* GL_LINEAR */ - { 7184, 0x00002700 }, /* GL_NEAREST_MIPMAP_NEAREST */ - { 7210, 0x00002701 }, /* GL_LINEAR_MIPMAP_NEAREST */ - { 7235, 0x00002702 }, /* GL_NEAREST_MIPMAP_LINEAR */ - { 7260, 0x00002703 }, /* GL_LINEAR_MIPMAP_LINEAR */ - { 7284, 0x00002800 }, /* GL_TEXTURE_MAG_FILTER */ - { 7306, 0x00002801 }, /* GL_TEXTURE_MIN_FILTER */ - { 7328, 0x00002802 }, /* GL_TEXTURE_WRAP_S */ - { 7346, 0x00002803 }, /* GL_TEXTURE_WRAP_T */ - { 7364, 0x00002900 }, /* GL_CLAMP */ - { 7373, 0x00002901 }, /* GL_REPEAT */ - { 7383, 0x00002A00 }, /* GL_POLYGON_OFFSET_UNITS */ - { 7407, 0x00002A01 }, /* GL_POLYGON_OFFSET_POINT */ - { 7431, 0x00002A02 }, /* GL_POLYGON_OFFSET_LINE */ - { 7454, 0x00002A10 }, /* GL_R3_G3_B2 */ - { 7466, 0x00002A20 }, /* GL_V2F */ - { 7473, 0x00002A21 }, /* GL_V3F */ - { 7480, 0x00002A22 }, /* GL_C4UB_V2F */ - { 7492, 0x00002A23 }, /* GL_C4UB_V3F */ - { 7504, 0x00002A24 }, /* GL_C3F_V3F */ - { 7515, 0x00002A25 }, /* GL_N3F_V3F */ - { 7526, 0x00002A26 }, /* GL_C4F_N3F_V3F */ - { 7541, 0x00002A27 }, /* GL_T2F_V3F */ - { 7552, 0x00002A28 }, /* GL_T4F_V4F */ - { 7563, 0x00002A29 }, /* GL_T2F_C4UB_V3F */ - { 7579, 0x00002A2A }, /* GL_T2F_C3F_V3F */ - { 7594, 0x00002A2B }, /* GL_T2F_N3F_V3F */ - { 7609, 0x00002A2C }, /* GL_T2F_C4F_N3F_V3F */ - { 7628, 0x00002A2D }, /* GL_T4F_C4F_N3F_V4F */ - { 7647, 0x00003000 }, /* GL_CLIP_DISTANCE0 */ - { 7665, 0x00003001 }, /* GL_CLIP_DISTANCE1 */ - { 7683, 0x00003002 }, /* GL_CLIP_DISTANCE2 */ - { 7701, 0x00003003 }, /* GL_CLIP_DISTANCE3 */ - { 7719, 0x00003004 }, /* GL_CLIP_DISTANCE4 */ - { 7737, 0x00003005 }, /* GL_CLIP_DISTANCE5 */ - { 7755, 0x00003006 }, /* GL_CLIP_DISTANCE6 */ - { 7773, 0x00003007 }, /* GL_CLIP_DISTANCE7 */ - { 7791, 0x00004000 }, /* GL_LIGHT0 */ - { 7801, 0x00004001 }, /* GL_LIGHT1 */ - { 7811, 0x00004002 }, /* GL_LIGHT2 */ - { 7821, 0x00004003 }, /* GL_LIGHT3 */ - { 7831, 0x00004004 }, /* GL_LIGHT4 */ - { 7841, 0x00004005 }, /* GL_LIGHT5 */ - { 7851, 0x00004006 }, /* GL_LIGHT6 */ - { 7861, 0x00004007 }, /* GL_LIGHT7 */ - { 7871, 0x00008000 }, /* GL_ABGR_EXT */ - { 7883, 0x00008001 }, /* GL_CONSTANT_COLOR */ - { 7901, 0x00008002 }, /* GL_ONE_MINUS_CONSTANT_COLOR */ - { 7929, 0x00008003 }, /* GL_CONSTANT_ALPHA */ - { 7947, 0x00008004 }, /* GL_ONE_MINUS_CONSTANT_ALPHA */ - { 7975, 0x00008005 }, /* GL_BLEND_COLOR */ - { 7990, 0x00008006 }, /* GL_FUNC_ADD */ - { 8002, 0x00008007 }, /* GL_MIN */ - { 8009, 0x00008008 }, /* GL_MAX */ - { 8016, 0x00008009 }, /* GL_BLEND_EQUATION_RGB */ - { 8038, 0x0000800A }, /* GL_FUNC_SUBTRACT */ - { 8055, 0x0000800B }, /* GL_FUNC_REVERSE_SUBTRACT */ - { 8080, 0x0000800C }, /* GL_CMYK_EXT */ - { 8092, 0x0000800D }, /* GL_CMYKA_EXT */ - { 8105, 0x0000800E }, /* GL_PACK_CMYK_HINT_EXT */ - { 8127, 0x0000800F }, /* GL_UNPACK_CMYK_HINT_EXT */ - { 8151, 0x00008010 }, /* GL_CONVOLUTION_1D */ - { 8169, 0x00008011 }, /* GL_CONVOLUTION_2D */ - { 8187, 0x00008012 }, /* GL_SEPARABLE_2D */ - { 8203, 0x00008013 }, /* GL_CONVOLUTION_BORDER_MODE */ - { 8230, 0x00008014 }, /* GL_CONVOLUTION_FILTER_SCALE */ - { 8258, 0x00008015 }, /* GL_CONVOLUTION_FILTER_BIAS */ - { 8285, 0x00008016 }, /* GL_REDUCE */ - { 8295, 0x00008017 }, /* GL_CONVOLUTION_FORMAT */ - { 8317, 0x00008018 }, /* GL_CONVOLUTION_WIDTH */ - { 8338, 0x00008019 }, /* GL_CONVOLUTION_HEIGHT */ - { 8360, 0x0000801A }, /* GL_MAX_CONVOLUTION_WIDTH */ - { 8385, 0x0000801B }, /* GL_MAX_CONVOLUTION_HEIGHT */ - { 8411, 0x0000801C }, /* GL_POST_CONVOLUTION_RED_SCALE */ - { 8441, 0x0000801D }, /* GL_POST_CONVOLUTION_GREEN_SCALE */ - { 8473, 0x0000801E }, /* GL_POST_CONVOLUTION_BLUE_SCALE */ - { 8504, 0x0000801F }, /* GL_POST_CONVOLUTION_ALPHA_SCALE */ - { 8536, 0x00008020 }, /* GL_POST_CONVOLUTION_RED_BIAS */ - { 8565, 0x00008021 }, /* GL_POST_CONVOLUTION_GREEN_BIAS */ - { 8596, 0x00008022 }, /* GL_POST_CONVOLUTION_BLUE_BIAS */ - { 8626, 0x00008023 }, /* GL_POST_CONVOLUTION_ALPHA_BIAS */ - { 8657, 0x00008024 }, /* GL_HISTOGRAM */ - { 8670, 0x00008025 }, /* GL_PROXY_HISTOGRAM */ - { 8689, 0x00008026 }, /* GL_HISTOGRAM_WIDTH */ - { 8708, 0x00008027 }, /* GL_HISTOGRAM_FORMAT */ - { 8728, 0x00008028 }, /* GL_HISTOGRAM_RED_SIZE */ - { 8750, 0x00008029 }, /* GL_HISTOGRAM_GREEN_SIZE */ - { 8774, 0x0000802A }, /* GL_HISTOGRAM_BLUE_SIZE */ - { 8797, 0x0000802B }, /* GL_HISTOGRAM_ALPHA_SIZE */ - { 8821, 0x0000802C }, /* GL_HISTOGRAM_LUMINANCE_SIZE */ - { 8849, 0x0000802D }, /* GL_HISTOGRAM_SINK */ - { 8867, 0x0000802E }, /* GL_MINMAX */ - { 8877, 0x0000802F }, /* GL_MINMAX_FORMAT */ - { 8894, 0x00008030 }, /* GL_MINMAX_SINK */ - { 8909, 0x00008031 }, /* GL_TABLE_TOO_LARGE */ - { 8928, 0x00008032 }, /* GL_UNSIGNED_BYTE_3_3_2 */ - { 8951, 0x00008033 }, /* GL_UNSIGNED_SHORT_4_4_4_4 */ - { 8977, 0x00008034 }, /* GL_UNSIGNED_SHORT_5_5_5_1 */ - { 9003, 0x00008035 }, /* GL_UNSIGNED_INT_8_8_8_8 */ - { 9027, 0x00008036 }, /* GL_UNSIGNED_INT_10_10_10_2 */ - { 9054, 0x00008037 }, /* GL_POLYGON_OFFSET_FILL */ - { 9077, 0x00008038 }, /* GL_POLYGON_OFFSET_FACTOR */ - { 9102, 0x00008039 }, /* GL_POLYGON_OFFSET_BIAS_EXT */ - { 9129, 0x0000803A }, /* GL_RESCALE_NORMAL */ - { 9147, 0x0000803B }, /* GL_ALPHA4 */ - { 9157, 0x0000803C }, /* GL_ALPHA8 */ - { 9167, 0x0000803D }, /* GL_ALPHA12 */ - { 9178, 0x0000803E }, /* GL_ALPHA16 */ - { 9189, 0x0000803F }, /* GL_LUMINANCE4 */ - { 9203, 0x00008040 }, /* GL_LUMINANCE8 */ - { 9217, 0x00008041 }, /* GL_LUMINANCE12 */ - { 9232, 0x00008042 }, /* GL_LUMINANCE16 */ - { 9247, 0x00008043 }, /* GL_LUMINANCE4_ALPHA4 */ - { 9268, 0x00008044 }, /* GL_LUMINANCE6_ALPHA2 */ - { 9289, 0x00008045 }, /* GL_LUMINANCE8_ALPHA8 */ - { 9310, 0x00008046 }, /* GL_LUMINANCE12_ALPHA4 */ - { 9332, 0x00008047 }, /* GL_LUMINANCE12_ALPHA12 */ - { 9355, 0x00008048 }, /* GL_LUMINANCE16_ALPHA16 */ - { 9378, 0x00008049 }, /* GL_INTENSITY */ - { 9391, 0x0000804A }, /* GL_INTENSITY4 */ - { 9405, 0x0000804B }, /* GL_INTENSITY8 */ - { 9419, 0x0000804C }, /* GL_INTENSITY12 */ - { 9434, 0x0000804D }, /* GL_INTENSITY16 */ - { 9449, 0x0000804E }, /* GL_RGB2_EXT */ - { 9461, 0x0000804F }, /* GL_RGB4 */ - { 9469, 0x00008050 }, /* GL_RGB5 */ - { 9477, 0x00008051 }, /* GL_RGB8 */ - { 9485, 0x00008052 }, /* GL_RGB10 */ - { 9494, 0x00008053 }, /* GL_RGB12 */ - { 9503, 0x00008054 }, /* GL_RGB16 */ - { 9512, 0x00008055 }, /* GL_RGBA2 */ - { 9521, 0x00008056 }, /* GL_RGBA4 */ - { 9530, 0x00008057 }, /* GL_RGB5_A1 */ - { 9541, 0x00008058 }, /* GL_RGBA8 */ - { 9550, 0x00008059 }, /* GL_RGB10_A2 */ - { 9562, 0x0000805A }, /* GL_RGBA12 */ - { 9572, 0x0000805B }, /* GL_RGBA16 */ - { 9582, 0x0000805C }, /* GL_TEXTURE_RED_SIZE */ - { 9602, 0x0000805D }, /* GL_TEXTURE_GREEN_SIZE */ - { 9624, 0x0000805E }, /* GL_TEXTURE_BLUE_SIZE */ - { 9645, 0x0000805F }, /* GL_TEXTURE_ALPHA_SIZE */ - { 9667, 0x00008060 }, /* GL_TEXTURE_LUMINANCE_SIZE */ - { 9693, 0x00008061 }, /* GL_TEXTURE_INTENSITY_SIZE */ - { 9719, 0x00008062 }, /* GL_REPLACE_EXT */ - { 9734, 0x00008063 }, /* GL_PROXY_TEXTURE_1D */ - { 9754, 0x00008064 }, /* GL_PROXY_TEXTURE_2D */ - { 9774, 0x00008065 }, /* GL_TEXTURE_TOO_LARGE_EXT */ - { 9799, 0x00008066 }, /* GL_TEXTURE_PRIORITY */ - { 9819, 0x00008067 }, /* GL_TEXTURE_RESIDENT */ - { 9839, 0x00008068 }, /* GL_TEXTURE_BINDING_1D */ - { 9861, 0x00008069 }, /* GL_TEXTURE_BINDING_2D */ - { 9883, 0x0000806A }, /* GL_TEXTURE_BINDING_3D */ - { 9905, 0x0000806B }, /* GL_PACK_SKIP_IMAGES */ - { 9925, 0x0000806C }, /* GL_PACK_IMAGE_HEIGHT */ - { 9946, 0x0000806D }, /* GL_UNPACK_SKIP_IMAGES */ - { 9968, 0x0000806E }, /* GL_UNPACK_IMAGE_HEIGHT */ - { 9991, 0x0000806F }, /* GL_TEXTURE_3D */ - { 10005, 0x00008070 }, /* GL_PROXY_TEXTURE_3D */ - { 10025, 0x00008071 }, /* GL_TEXTURE_DEPTH */ - { 10042, 0x00008072 }, /* GL_TEXTURE_WRAP_R */ - { 10060, 0x00008073 }, /* GL_MAX_3D_TEXTURE_SIZE */ - { 10083, 0x00008074 }, /* GL_VERTEX_ARRAY */ - { 10099, 0x00008075 }, /* GL_NORMAL_ARRAY */ - { 10115, 0x00008076 }, /* GL_COLOR_ARRAY */ - { 10130, 0x00008077 }, /* GL_INDEX_ARRAY */ - { 10145, 0x00008078 }, /* GL_TEXTURE_COORD_ARRAY */ - { 10168, 0x00008079 }, /* GL_EDGE_FLAG_ARRAY */ - { 10187, 0x0000807A }, /* GL_VERTEX_ARRAY_SIZE */ - { 10208, 0x0000807B }, /* GL_VERTEX_ARRAY_TYPE */ - { 10229, 0x0000807C }, /* GL_VERTEX_ARRAY_STRIDE */ - { 10252, 0x0000807D }, /* GL_VERTEX_ARRAY_COUNT_EXT */ - { 10278, 0x0000807E }, /* GL_NORMAL_ARRAY_TYPE */ - { 10299, 0x0000807F }, /* GL_NORMAL_ARRAY_STRIDE */ - { 10322, 0x00008080 }, /* GL_NORMAL_ARRAY_COUNT_EXT */ - { 10348, 0x00008081 }, /* GL_COLOR_ARRAY_SIZE */ - { 10368, 0x00008082 }, /* GL_COLOR_ARRAY_TYPE */ - { 10388, 0x00008083 }, /* GL_COLOR_ARRAY_STRIDE */ - { 10410, 0x00008084 }, /* GL_COLOR_ARRAY_COUNT_EXT */ - { 10435, 0x00008085 }, /* GL_INDEX_ARRAY_TYPE */ - { 10455, 0x00008086 }, /* GL_INDEX_ARRAY_STRIDE */ - { 10477, 0x00008087 }, /* GL_INDEX_ARRAY_COUNT_EXT */ - { 10502, 0x00008088 }, /* GL_TEXTURE_COORD_ARRAY_SIZE */ - { 10530, 0x00008089 }, /* GL_TEXTURE_COORD_ARRAY_TYPE */ - { 10558, 0x0000808A }, /* GL_TEXTURE_COORD_ARRAY_STRIDE */ - { 10588, 0x0000808B }, /* GL_TEXTURE_COORD_ARRAY_COUNT_EXT */ - { 10621, 0x0000808C }, /* GL_EDGE_FLAG_ARRAY_STRIDE */ - { 10647, 0x0000808D }, /* GL_EDGE_FLAG_ARRAY_COUNT_EXT */ - { 10676, 0x0000808E }, /* GL_VERTEX_ARRAY_POINTER */ - { 10700, 0x0000808F }, /* GL_NORMAL_ARRAY_POINTER */ - { 10724, 0x00008090 }, /* GL_COLOR_ARRAY_POINTER */ - { 10747, 0x00008091 }, /* GL_INDEX_ARRAY_POINTER */ - { 10770, 0x00008092 }, /* GL_TEXTURE_COORD_ARRAY_POINTER */ - { 10801, 0x00008093 }, /* GL_EDGE_FLAG_ARRAY_POINTER */ - { 10828, 0x00008094 }, /* GL_INTERLACE_SGIX */ - { 10846, 0x00008095 }, /* GL_DETAIL_TEXTURE_2D_SGIS */ - { 10872, 0x00008096 }, /* GL_DETAIL_TEXTURE_2D_BINDING_SGIS */ - { 10906, 0x00008097 }, /* GL_LINEAR_DETAIL_SGIS */ - { 10928, 0x00008098 }, /* GL_LINEAR_DETAIL_ALPHA_SGIS */ - { 10956, 0x00008099 }, /* GL_LINEAR_DETAIL_COLOR_SGIS */ - { 10984, 0x0000809A }, /* GL_DETAIL_TEXTURE_LEVEL_SGIS */ - { 11013, 0x0000809B }, /* GL_DETAIL_TEXTURE_MODE_SGIS */ - { 11041, 0x0000809C }, /* GL_DETAIL_TEXTURE_FUNC_POINTS_SGIS */ - { 11076, 0x0000809D }, /* GL_MULTISAMPLE */ - { 11091, 0x0000809E }, /* GL_SAMPLE_ALPHA_TO_COVERAGE */ - { 11119, 0x0000809F }, /* GL_SAMPLE_ALPHA_TO_ONE */ - { 11142, 0x000080A0 }, /* GL_SAMPLE_COVERAGE */ - { 11161, 0x000080A1 }, /* GL_1PASS_EXT */ - { 11174, 0x000080A2 }, /* GL_2PASS_0_EXT */ - { 11189, 0x000080A3 }, /* GL_2PASS_1_EXT */ - { 11204, 0x000080A4 }, /* GL_4PASS_0_EXT */ - { 11219, 0x000080A5 }, /* GL_4PASS_1_EXT */ - { 11234, 0x000080A6 }, /* GL_4PASS_2_EXT */ - { 11249, 0x000080A7 }, /* GL_4PASS_3_EXT */ - { 11264, 0x000080A8 }, /* GL_SAMPLE_BUFFERS */ - { 11282, 0x000080A9 }, /* GL_SAMPLES */ - { 11293, 0x000080AA }, /* GL_SAMPLE_COVERAGE_VALUE */ - { 11318, 0x000080AB }, /* GL_SAMPLE_COVERAGE_INVERT */ - { 11344, 0x000080AC }, /* GL_SAMPLE_PATTERN_EXT */ - { 11366, 0x000080AD }, /* GL_LINEAR_SHARPEN_SGIS */ - { 11389, 0x000080AE }, /* GL_LINEAR_SHARPEN_ALPHA_SGIS */ - { 11418, 0x000080AF }, /* GL_LINEAR_SHARPEN_COLOR_SGIS */ - { 11447, 0x000080B0 }, /* GL_SHARPEN_TEXTURE_FUNC_POINTS_SGIS */ - { 11483, 0x000080B1 }, /* GL_COLOR_MATRIX */ - { 11499, 0x000080B2 }, /* GL_COLOR_MATRIX_STACK_DEPTH */ - { 11527, 0x000080B3 }, /* GL_MAX_COLOR_MATRIX_STACK_DEPTH */ - { 11559, 0x000080B4 }, /* GL_POST_COLOR_MATRIX_RED_SCALE */ - { 11590, 0x000080B5 }, /* GL_POST_COLOR_MATRIX_GREEN_SCALE */ - { 11623, 0x000080B6 }, /* GL_POST_COLOR_MATRIX_BLUE_SCALE */ - { 11655, 0x000080B7 }, /* GL_POST_COLOR_MATRIX_ALPHA_SCALE */ - { 11688, 0x000080B8 }, /* GL_POST_COLOR_MATRIX_RED_BIAS */ - { 11718, 0x000080B9 }, /* GL_POST_COLOR_MATRIX_GREEN_BIAS */ - { 11750, 0x000080BA }, /* GL_POST_COLOR_MATRIX_BLUE_BIAS */ - { 11781, 0x000080BB }, /* GL_POST_COLOR_MATRIX_ALPHA_BIAS */ - { 11813, 0x000080BC }, /* GL_TEXTURE_COLOR_TABLE_SGI */ - { 11840, 0x000080BD }, /* GL_PROXY_TEXTURE_COLOR_TABLE_SGI */ - { 11873, 0x000080BE }, /* GL_TEXTURE_ENV_BIAS_SGIX */ - { 11898, 0x000080BF }, /* GL_TEXTURE_COMPARE_FAIL_VALUE_ARB */ - { 11932, 0x000080C8 }, /* GL_BLEND_DST_RGB */ - { 11949, 0x000080C9 }, /* GL_BLEND_SRC_RGB */ - { 11966, 0x000080CA }, /* GL_BLEND_DST_ALPHA */ - { 11985, 0x000080CB }, /* GL_BLEND_SRC_ALPHA */ - { 12004, 0x000080CC }, /* GL_422_EXT */ - { 12015, 0x000080CD }, /* GL_422_REV_EXT */ - { 12030, 0x000080CE }, /* GL_422_AVERAGE_EXT */ - { 12049, 0x000080CF }, /* GL_422_REV_AVERAGE_EXT */ - { 12072, 0x000080D0 }, /* GL_COLOR_TABLE */ - { 12087, 0x000080D1 }, /* GL_POST_CONVOLUTION_COLOR_TABLE */ - { 12119, 0x000080D2 }, /* GL_POST_COLOR_MATRIX_COLOR_TABLE */ - { 12152, 0x000080D3 }, /* GL_PROXY_COLOR_TABLE */ - { 12173, 0x000080D4 }, /* GL_PROXY_POST_CONVOLUTION_COLOR_TABLE */ - { 12211, 0x000080D5 }, /* GL_PROXY_POST_COLOR_MATRIX_COLOR_TABLE */ - { 12250, 0x000080D6 }, /* GL_COLOR_TABLE_SCALE */ - { 12271, 0x000080D7 }, /* GL_COLOR_TABLE_BIAS */ - { 12291, 0x000080D8 }, /* GL_COLOR_TABLE_FORMAT */ - { 12313, 0x000080D9 }, /* GL_COLOR_TABLE_WIDTH */ - { 12334, 0x000080DA }, /* GL_COLOR_TABLE_RED_SIZE */ - { 12358, 0x000080DB }, /* GL_COLOR_TABLE_GREEN_SIZE */ - { 12384, 0x000080DC }, /* GL_COLOR_TABLE_BLUE_SIZE */ - { 12409, 0x000080DD }, /* GL_COLOR_TABLE_ALPHA_SIZE */ - { 12435, 0x000080DE }, /* GL_COLOR_TABLE_LUMINANCE_SIZE */ - { 12465, 0x000080DF }, /* GL_COLOR_TABLE_INTENSITY_SIZE */ - { 12495, 0x000080E0 }, /* GL_BGR */ - { 12502, 0x000080E1 }, /* GL_BGRA */ - { 12510, 0x000080E2 }, /* GL_COLOR_INDEX1_EXT */ - { 12530, 0x000080E3 }, /* GL_COLOR_INDEX2_EXT */ - { 12550, 0x000080E4 }, /* GL_COLOR_INDEX4_EXT */ - { 12570, 0x000080E5 }, /* GL_COLOR_INDEX8_EXT */ - { 12590, 0x000080E6 }, /* GL_COLOR_INDEX12_EXT */ - { 12611, 0x000080E7 }, /* GL_COLOR_INDEX16_EXT */ - { 12632, 0x000080E8 }, /* GL_MAX_ELEMENTS_VERTICES */ - { 12657, 0x000080E9 }, /* GL_MAX_ELEMENTS_INDICES */ - { 12681, 0x000080EA }, /* GL_PHONG_WIN */ - { 12694, 0x000080EB }, /* GL_PHONG_HINT_WIN */ - { 12712, 0x000080EC }, /* GL_FOG_SPECULAR_TEXTURE_WIN */ - { 12740, 0x000080ED }, /* GL_TEXTURE_INDEX_SIZE_EXT */ - { 12766, 0x000080EE }, /* GL_PARAMETER_BUFFER_ARB */ - { 12790, 0x000080EF }, /* GL_PARAMETER_BUFFER_BINDING_ARB */ - { 12822, 0x000080F0 }, /* GL_CLIP_VOLUME_CLIPPING_HINT_EXT */ - { 12855, 0x00008110 }, /* GL_DUAL_ALPHA4_SGIS */ - { 12875, 0x00008111 }, /* GL_DUAL_ALPHA8_SGIS */ - { 12895, 0x00008112 }, /* GL_DUAL_ALPHA12_SGIS */ - { 12916, 0x00008113 }, /* GL_DUAL_ALPHA16_SGIS */ - { 12937, 0x00008114 }, /* GL_DUAL_LUMINANCE4_SGIS */ - { 12961, 0x00008115 }, /* GL_DUAL_LUMINANCE8_SGIS */ - { 12985, 0x00008116 }, /* GL_DUAL_LUMINANCE12_SGIS */ - { 13010, 0x00008117 }, /* GL_DUAL_LUMINANCE16_SGIS */ - { 13035, 0x00008118 }, /* GL_DUAL_INTENSITY4_SGIS */ - { 13059, 0x00008119 }, /* GL_DUAL_INTENSITY8_SGIS */ - { 13083, 0x0000811A }, /* GL_DUAL_INTENSITY12_SGIS */ - { 13108, 0x0000811B }, /* GL_DUAL_INTENSITY16_SGIS */ - { 13133, 0x0000811C }, /* GL_DUAL_LUMINANCE_ALPHA4_SGIS */ - { 13163, 0x0000811D }, /* GL_DUAL_LUMINANCE_ALPHA8_SGIS */ - { 13193, 0x0000811E }, /* GL_QUAD_ALPHA4_SGIS */ - { 13213, 0x0000811F }, /* GL_QUAD_ALPHA8_SGIS */ - { 13233, 0x00008120 }, /* GL_QUAD_LUMINANCE4_SGIS */ - { 13257, 0x00008121 }, /* GL_QUAD_LUMINANCE8_SGIS */ - { 13281, 0x00008122 }, /* GL_QUAD_INTENSITY4_SGIS */ - { 13305, 0x00008123 }, /* GL_QUAD_INTENSITY8_SGIS */ - { 13329, 0x00008124 }, /* GL_DUAL_TEXTURE_SELECT_SGIS */ - { 13357, 0x00008125 }, /* GL_QUAD_TEXTURE_SELECT_SGIS */ - { 13385, 0x00008126 }, /* GL_POINT_SIZE_MIN */ - { 13403, 0x00008127 }, /* GL_POINT_SIZE_MAX */ - { 13421, 0x00008128 }, /* GL_POINT_FADE_THRESHOLD_SIZE */ - { 13450, 0x00008129 }, /* GL_POINT_DISTANCE_ATTENUATION */ - { 13480, 0x0000812A }, /* GL_FOG_FUNC_SGIS */ - { 13497, 0x0000812B }, /* GL_FOG_FUNC_POINTS_SGIS */ - { 13521, 0x0000812C }, /* GL_MAX_FOG_FUNC_POINTS_SGIS */ - { 13549, 0x0000812D }, /* GL_CLAMP_TO_BORDER */ - { 13568, 0x0000812E }, /* GL_TEXTURE_MULTI_BUFFER_HINT_SGIX */ - { 13602, 0x0000812F }, /* GL_CLAMP_TO_EDGE */ - { 13619, 0x00008130 }, /* GL_PACK_SKIP_VOLUMES_SGIS */ - { 13645, 0x00008131 }, /* GL_PACK_IMAGE_DEPTH_SGIS */ - { 13670, 0x00008132 }, /* GL_UNPACK_SKIP_VOLUMES_SGIS */ - { 13698, 0x00008133 }, /* GL_UNPACK_IMAGE_DEPTH_SGIS */ - { 13725, 0x00008134 }, /* GL_TEXTURE_4D_SGIS */ - { 13744, 0x00008135 }, /* GL_PROXY_TEXTURE_4D_SGIS */ - { 13769, 0x00008136 }, /* GL_TEXTURE_4DSIZE_SGIS */ - { 13792, 0x00008137 }, /* GL_TEXTURE_WRAP_Q_SGIS */ - { 13815, 0x00008138 }, /* GL_MAX_4D_TEXTURE_SIZE_SGIS */ - { 13843, 0x00008139 }, /* GL_PIXEL_TEX_GEN_SGIX */ - { 13865, 0x0000813A }, /* GL_TEXTURE_MIN_LOD */ - { 13884, 0x0000813B }, /* GL_TEXTURE_MAX_LOD */ - { 13903, 0x0000813C }, /* GL_TEXTURE_BASE_LEVEL */ - { 13925, 0x0000813D }, /* GL_TEXTURE_MAX_LEVEL */ - { 13946, 0x0000813E }, /* GL_PIXEL_TILE_BEST_ALIGNMENT_SGIX */ - { 13980, 0x0000813F }, /* GL_PIXEL_TILE_CACHE_INCREMENT_SGIX */ - { 14015, 0x00008140 }, /* GL_PIXEL_TILE_WIDTH_SGIX */ - { 14040, 0x00008141 }, /* GL_PIXEL_TILE_HEIGHT_SGIX */ - { 14066, 0x00008142 }, /* GL_PIXEL_TILE_GRID_WIDTH_SGIX */ - { 14096, 0x00008143 }, /* GL_PIXEL_TILE_GRID_HEIGHT_SGIX */ - { 14127, 0x00008144 }, /* GL_PIXEL_TILE_GRID_DEPTH_SGIX */ - { 14157, 0x00008145 }, /* GL_PIXEL_TILE_CACHE_SIZE_SGIX */ - { 14187, 0x00008146 }, /* GL_FILTER4_SGIS */ - { 14203, 0x00008147 }, /* GL_TEXTURE_FILTER4_SIZE_SGIS */ - { 14232, 0x00008148 }, /* GL_SPRITE_SGIX */ - { 14247, 0x00008149 }, /* GL_SPRITE_MODE_SGIX */ - { 14267, 0x0000814A }, /* GL_SPRITE_AXIS_SGIX */ - { 14287, 0x0000814B }, /* GL_SPRITE_TRANSLATION_SGIX */ - { 14314, 0x0000814C }, /* GL_SPRITE_AXIAL_SGIX */ - { 14335, 0x0000814D }, /* GL_SPRITE_OBJECT_ALIGNED_SGIX */ - { 14365, 0x0000814E }, /* GL_SPRITE_EYE_ALIGNED_SGIX */ - { 14392, 0x0000814F }, /* GL_TEXTURE_4D_BINDING_SGIS */ - { 14419, 0x00008150 }, /* GL_IGNORE_BORDER_HP */ - { 14439, 0x00008151 }, /* GL_CONSTANT_BORDER */ - { 14458, 0x00008153 }, /* GL_REPLICATE_BORDER */ - { 14478, 0x00008154 }, /* GL_CONVOLUTION_BORDER_COLOR */ - { 14506, 0x00008155 }, /* GL_IMAGE_SCALE_X_HP */ - { 14526, 0x00008156 }, /* GL_IMAGE_SCALE_Y_HP */ - { 14546, 0x00008157 }, /* GL_IMAGE_TRANSLATE_X_HP */ - { 14570, 0x00008158 }, /* GL_IMAGE_TRANSLATE_Y_HP */ - { 14594, 0x00008159 }, /* GL_IMAGE_ROTATE_ANGLE_HP */ - { 14619, 0x0000815A }, /* GL_IMAGE_ROTATE_ORIGIN_X_HP */ - { 14647, 0x0000815B }, /* GL_IMAGE_ROTATE_ORIGIN_Y_HP */ - { 14675, 0x0000815C }, /* GL_IMAGE_MAG_FILTER_HP */ - { 14698, 0x0000815D }, /* GL_IMAGE_MIN_FILTER_HP */ - { 14721, 0x0000815E }, /* GL_IMAGE_CUBIC_WEIGHT_HP */ - { 14746, 0x0000815F }, /* GL_CUBIC_HP */ - { 14758, 0x00008160 }, /* GL_AVERAGE_HP */ - { 14772, 0x00008161 }, /* GL_IMAGE_TRANSFORM_2D_HP */ - { 14797, 0x00008162 }, /* GL_POST_IMAGE_TRANSFORM_COLOR_TABLE_HP */ - { 14836, 0x00008163 }, /* GL_PROXY_POST_IMAGE_TRANSFORM_COLOR_TABLE_HP */ - { 14881, 0x00008165 }, /* GL_OCCLUSION_TEST_HP */ - { 14902, 0x00008166 }, /* GL_OCCLUSION_TEST_RESULT_HP */ - { 14930, 0x00008167 }, /* GL_TEXTURE_LIGHTING_MODE_HP */ - { 14958, 0x00008168 }, /* GL_TEXTURE_POST_SPECULAR_HP */ - { 14986, 0x00008169 }, /* GL_TEXTURE_PRE_SPECULAR_HP */ - { 15013, 0x00008170 }, /* GL_LINEAR_CLIPMAP_LINEAR_SGIX */ - { 15043, 0x00008171 }, /* GL_TEXTURE_CLIPMAP_CENTER_SGIX */ - { 15074, 0x00008172 }, /* GL_TEXTURE_CLIPMAP_FRAME_SGIX */ - { 15104, 0x00008173 }, /* GL_TEXTURE_CLIPMAP_OFFSET_SGIX */ - { 15135, 0x00008174 }, /* GL_TEXTURE_CLIPMAP_VIRTUAL_DEPTH_SGIX */ - { 15173, 0x00008175 }, /* GL_TEXTURE_CLIPMAP_LOD_OFFSET_SGIX */ - { 15208, 0x00008176 }, /* GL_TEXTURE_CLIPMAP_DEPTH_SGIX */ - { 15238, 0x00008177 }, /* GL_MAX_CLIPMAP_DEPTH_SGIX */ - { 15264, 0x00008178 }, /* GL_MAX_CLIPMAP_VIRTUAL_DEPTH_SGIX */ - { 15298, 0x00008179 }, /* GL_POST_TEXTURE_FILTER_BIAS_SGIX */ - { 15331, 0x0000817A }, /* GL_POST_TEXTURE_FILTER_SCALE_SGIX */ - { 15365, 0x0000817B }, /* GL_POST_TEXTURE_FILTER_BIAS_RANGE_SGIX */ - { 15404, 0x0000817C }, /* GL_POST_TEXTURE_FILTER_SCALE_RANGE_SGIX */ - { 15444, 0x0000817D }, /* GL_REFERENCE_PLANE_SGIX */ - { 15468, 0x0000817E }, /* GL_REFERENCE_PLANE_EQUATION_SGIX */ - { 15501, 0x0000817F }, /* GL_IR_INSTRUMENT1_SGIX */ - { 15524, 0x00008180 }, /* GL_INSTRUMENT_BUFFER_POINTER_SGIX */ - { 15558, 0x00008181 }, /* GL_INSTRUMENT_MEASUREMENTS_SGIX */ - { 15590, 0x00008182 }, /* GL_LIST_PRIORITY_SGIX */ - { 15612, 0x00008183 }, /* GL_CALLIGRAPHIC_FRAGMENT_SGIX */ - { 15642, 0x0000818B }, /* GL_FRAMEZOOM_SGIX */ - { 15660, 0x0000818C }, /* GL_FRAMEZOOM_FACTOR_SGIX */ - { 15685, 0x0000818D }, /* GL_MAX_FRAMEZOOM_FACTOR_SGIX */ - { 15714, 0x0000818E }, /* GL_TEXTURE_LOD_BIAS_S_SGIX */ - { 15741, 0x0000818F }, /* GL_TEXTURE_LOD_BIAS_T_SGIX */ - { 15768, 0x00008190 }, /* GL_TEXTURE_LOD_BIAS_R_SGIX */ - { 15795, 0x00008191 }, /* GL_GENERATE_MIPMAP */ - { 15814, 0x00008192 }, /* GL_GENERATE_MIPMAP_HINT */ - { 15838, 0x00008194 }, /* GL_GEOMETRY_DEFORMATION_SGIX */ - { 15867, 0x00008195 }, /* GL_TEXTURE_DEFORMATION_SGIX */ - { 15895, 0x00008196 }, /* GL_DEFORMATIONS_MASK_SGIX */ - { 15921, 0x00008197 }, /* GL_MAX_DEFORMATION_ORDER_SGIX */ - { 15951, 0x00008198 }, /* GL_FOG_OFFSET_SGIX */ - { 15970, 0x00008199 }, /* GL_FOG_OFFSET_VALUE_SGIX */ - { 15995, 0x0000819A }, /* GL_TEXTURE_COMPARE_SGIX */ - { 16019, 0x0000819B }, /* GL_TEXTURE_COMPARE_OPERATOR_SGIX */ - { 16052, 0x0000819C }, /* GL_TEXTURE_LEQUAL_R_SGIX */ - { 16077, 0x0000819D }, /* GL_TEXTURE_GEQUAL_R_SGIX */ - { 16102, 0x000081A5 }, /* GL_DEPTH_COMPONENT16 */ - { 16123, 0x000081A6 }, /* GL_DEPTH_COMPONENT24 */ - { 16144, 0x000081A7 }, /* GL_DEPTH_COMPONENT32 */ - { 16165, 0x000081A8 }, /* GL_ARRAY_ELEMENT_LOCK_FIRST_EXT */ - { 16197, 0x000081A9 }, /* GL_ARRAY_ELEMENT_LOCK_COUNT_EXT */ - { 16229, 0x000081AA }, /* GL_CULL_VERTEX_EXT */ - { 16248, 0x000081AB }, /* GL_CULL_VERTEX_EYE_POSITION_EXT */ - { 16280, 0x000081AC }, /* GL_CULL_VERTEX_OBJECT_POSITION_EXT */ - { 16315, 0x000081AD }, /* GL_IUI_V2F_EXT */ - { 16330, 0x000081AE }, /* GL_IUI_V3F_EXT */ - { 16345, 0x000081AF }, /* GL_IUI_N3F_V2F_EXT */ - { 16364, 0x000081B0 }, /* GL_IUI_N3F_V3F_EXT */ - { 16383, 0x000081B1 }, /* GL_T2F_IUI_V2F_EXT */ - { 16402, 0x000081B2 }, /* GL_T2F_IUI_V3F_EXT */ - { 16421, 0x000081B3 }, /* GL_T2F_IUI_N3F_V2F_EXT */ - { 16444, 0x000081B4 }, /* GL_T2F_IUI_N3F_V3F_EXT */ - { 16467, 0x000081B5 }, /* GL_INDEX_TEST_EXT */ - { 16485, 0x000081B6 }, /* GL_INDEX_TEST_FUNC_EXT */ - { 16508, 0x000081B7 }, /* GL_INDEX_TEST_REF_EXT */ - { 16530, 0x000081B8 }, /* GL_INDEX_MATERIAL_EXT */ - { 16552, 0x000081B9 }, /* GL_INDEX_MATERIAL_PARAMETER_EXT */ - { 16584, 0x000081BA }, /* GL_INDEX_MATERIAL_FACE_EXT */ - { 16611, 0x000081BB }, /* GL_YCRCB_422_SGIX */ - { 16629, 0x000081BC }, /* GL_YCRCB_444_SGIX */ - { 16647, 0x000081D4 }, /* GL_WRAP_BORDER_SUN */ - { 16666, 0x000081D5 }, /* GL_UNPACK_CONSTANT_DATA_SUNX */ - { 16695, 0x000081D6 }, /* GL_TEXTURE_CONSTANT_DATA_SUNX */ - { 16725, 0x000081D7 }, /* GL_TRIANGLE_LIST_SUN */ - { 16746, 0x000081D8 }, /* GL_REPLACEMENT_CODE_SUN */ - { 16770, 0x000081D9 }, /* GL_GLOBAL_ALPHA_SUN */ - { 16790, 0x000081DA }, /* GL_GLOBAL_ALPHA_FACTOR_SUN */ - { 16817, 0x000081EF }, /* GL_TEXTURE_COLOR_WRITEMASK_SGIS */ - { 16849, 0x000081F0 }, /* GL_EYE_DISTANCE_TO_POINT_SGIS */ - { 16879, 0x000081F1 }, /* GL_OBJECT_DISTANCE_TO_POINT_SGIS */ - { 16912, 0x000081F2 }, /* GL_EYE_DISTANCE_TO_LINE_SGIS */ - { 16941, 0x000081F3 }, /* GL_OBJECT_DISTANCE_TO_LINE_SGIS */ - { 16973, 0x000081F4 }, /* GL_EYE_POINT_SGIS */ - { 16991, 0x000081F5 }, /* GL_OBJECT_POINT_SGIS */ - { 17012, 0x000081F6 }, /* GL_EYE_LINE_SGIS */ - { 17029, 0x000081F7 }, /* GL_OBJECT_LINE_SGIS */ - { 17049, 0x000081F8 }, /* GL_LIGHT_MODEL_COLOR_CONTROL */ - { 17078, 0x000081F9 }, /* GL_SINGLE_COLOR */ - { 17094, 0x000081FA }, /* GL_SEPARATE_SPECULAR_COLOR */ - { 17121, 0x000081FB }, /* GL_SHARED_TEXTURE_PALETTE_EXT */ - { 17151, 0x00008200 }, /* GL_TEXT_FRAGMENT_SHADER_ATI */ - { 17179, 0x00008210 }, /* GL_FRAMEBUFFER_ATTACHMENT_COLOR_ENCODING */ - { 17220, 0x00008211 }, /* GL_FRAMEBUFFER_ATTACHMENT_COMPONENT_TYPE */ - { 17261, 0x00008212 }, /* GL_FRAMEBUFFER_ATTACHMENT_RED_SIZE */ - { 17296, 0x00008213 }, /* GL_FRAMEBUFFER_ATTACHMENT_GREEN_SIZE */ - { 17333, 0x00008214 }, /* GL_FRAMEBUFFER_ATTACHMENT_BLUE_SIZE */ - { 17369, 0x00008215 }, /* GL_FRAMEBUFFER_ATTACHMENT_ALPHA_SIZE */ - { 17406, 0x00008216 }, /* GL_FRAMEBUFFER_ATTACHMENT_DEPTH_SIZE */ - { 17443, 0x00008217 }, /* GL_FRAMEBUFFER_ATTACHMENT_STENCIL_SIZE */ - { 17482, 0x00008218 }, /* GL_FRAMEBUFFER_DEFAULT */ - { 17505, 0x00008219 }, /* GL_FRAMEBUFFER_UNDEFINED */ - { 17530, 0x0000821A }, /* GL_DEPTH_STENCIL_ATTACHMENT */ - { 17558, 0x0000821B }, /* GL_MAJOR_VERSION */ - { 17575, 0x0000821C }, /* GL_MINOR_VERSION */ - { 17592, 0x0000821D }, /* GL_NUM_EXTENSIONS */ - { 17610, 0x0000821E }, /* GL_CONTEXT_FLAGS */ - { 17627, 0x0000821F }, /* GL_BUFFER_IMMUTABLE_STORAGE */ - { 17655, 0x00008220 }, /* GL_BUFFER_STORAGE_FLAGS */ - { 17679, 0x00008221 }, /* GL_PRIMITIVE_RESTART_FOR_PATCHES_SUPPORTED */ - { 17722, 0x00008222 }, /* GL_INDEX */ - { 17731, 0x00008225 }, /* GL_COMPRESSED_RED */ - { 17749, 0x00008226 }, /* GL_COMPRESSED_RG */ - { 17766, 0x00008227 }, /* GL_RG */ - { 17772, 0x00008228 }, /* GL_RG_INTEGER */ - { 17786, 0x00008229 }, /* GL_R8 */ - { 17792, 0x0000822A }, /* GL_R16 */ - { 17799, 0x0000822B }, /* GL_RG8 */ - { 17806, 0x0000822C }, /* GL_RG16 */ - { 17814, 0x0000822D }, /* GL_R16F */ - { 17822, 0x0000822E }, /* GL_R32F */ - { 17830, 0x0000822F }, /* GL_RG16F */ - { 17839, 0x00008230 }, /* GL_RG32F */ - { 17848, 0x00008231 }, /* GL_R8I */ - { 17855, 0x00008232 }, /* GL_R8UI */ - { 17863, 0x00008233 }, /* GL_R16I */ - { 17871, 0x00008234 }, /* GL_R16UI */ - { 17880, 0x00008235 }, /* GL_R32I */ - { 17888, 0x00008236 }, /* GL_R32UI */ - { 17897, 0x00008237 }, /* GL_RG8I */ - { 17905, 0x00008238 }, /* GL_RG8UI */ - { 17914, 0x00008239 }, /* GL_RG16I */ - { 17923, 0x0000823A }, /* GL_RG16UI */ - { 17933, 0x0000823B }, /* GL_RG32I */ - { 17942, 0x0000823C }, /* GL_RG32UI */ - { 17952, 0x00008240 }, /* GL_SYNC_CL_EVENT_ARB */ - { 17973, 0x00008241 }, /* GL_SYNC_CL_EVENT_COMPLETE_ARB */ - { 18003, 0x00008242 }, /* GL_DEBUG_OUTPUT_SYNCHRONOUS */ - { 18031, 0x00008243 }, /* GL_DEBUG_NEXT_LOGGED_MESSAGE_LENGTH */ - { 18067, 0x00008244 }, /* GL_DEBUG_CALLBACK_FUNCTION */ - { 18094, 0x00008245 }, /* GL_DEBUG_CALLBACK_USER_PARAM */ - { 18123, 0x00008246 }, /* GL_DEBUG_SOURCE_API */ - { 18143, 0x00008247 }, /* GL_DEBUG_SOURCE_WINDOW_SYSTEM */ - { 18173, 0x00008248 }, /* GL_DEBUG_SOURCE_SHADER_COMPILER */ - { 18205, 0x00008249 }, /* GL_DEBUG_SOURCE_THIRD_PARTY */ - { 18233, 0x0000824A }, /* GL_DEBUG_SOURCE_APPLICATION */ - { 18261, 0x0000824B }, /* GL_DEBUG_SOURCE_OTHER */ - { 18283, 0x0000824C }, /* GL_DEBUG_TYPE_ERROR */ - { 18303, 0x0000824D }, /* GL_DEBUG_TYPE_DEPRECATED_BEHAVIOR */ - { 18337, 0x0000824E }, /* GL_DEBUG_TYPE_UNDEFINED_BEHAVIOR */ - { 18370, 0x0000824F }, /* GL_DEBUG_TYPE_PORTABILITY */ - { 18396, 0x00008250 }, /* GL_DEBUG_TYPE_PERFORMANCE */ - { 18422, 0x00008251 }, /* GL_DEBUG_TYPE_OTHER */ - { 18442, 0x00008252 }, /* GL_LOSE_CONTEXT_ON_RESET */ - { 18467, 0x00008253 }, /* GL_GUILTY_CONTEXT_RESET */ - { 18491, 0x00008254 }, /* GL_INNOCENT_CONTEXT_RESET */ - { 18517, 0x00008255 }, /* GL_UNKNOWN_CONTEXT_RESET */ - { 18542, 0x00008256 }, /* GL_RESET_NOTIFICATION_STRATEGY */ - { 18573, 0x00008257 }, /* GL_PROGRAM_BINARY_RETRIEVABLE_HINT */ - { 18608, 0x00008258 }, /* GL_PROGRAM_SEPARABLE */ - { 18629, 0x00008259 }, /* GL_ACTIVE_PROGRAM */ - { 18647, 0x0000825A }, /* GL_PROGRAM_PIPELINE_BINDING */ - { 18675, 0x0000825B }, /* GL_MAX_VIEWPORTS */ - { 18692, 0x0000825C }, /* GL_VIEWPORT_SUBPIXEL_BITS */ - { 18718, 0x0000825D }, /* GL_VIEWPORT_BOUNDS_RANGE */ - { 18743, 0x0000825E }, /* GL_LAYER_PROVOKING_VERTEX */ - { 18769, 0x0000825F }, /* GL_VIEWPORT_INDEX_PROVOKING_VERTEX */ - { 18804, 0x00008260 }, /* GL_UNDEFINED_VERTEX */ - { 18824, 0x00008261 }, /* GL_NO_RESET_NOTIFICATION */ - { 18849, 0x00008262 }, /* GL_MAX_COMPUTE_SHARED_MEMORY_SIZE */ - { 18883, 0x00008263 }, /* GL_MAX_COMPUTE_UNIFORM_COMPONENTS */ - { 18917, 0x00008264 }, /* GL_MAX_COMPUTE_ATOMIC_COUNTER_BUFFERS */ - { 18955, 0x00008265 }, /* GL_MAX_COMPUTE_ATOMIC_COUNTERS */ - { 18986, 0x00008266 }, /* GL_MAX_COMBINED_COMPUTE_UNIFORM_COMPONENTS */ - { 19029, 0x00008267 }, /* GL_COMPUTE_WORK_GROUP_SIZE */ - { 19056, 0x00008268 }, /* GL_DEBUG_TYPE_MARKER */ - { 19077, 0x00008269 }, /* GL_DEBUG_TYPE_PUSH_GROUP */ - { 19102, 0x0000826A }, /* GL_DEBUG_TYPE_POP_GROUP */ - { 19126, 0x0000826B }, /* GL_DEBUG_SEVERITY_NOTIFICATION */ - { 19157, 0x0000826C }, /* GL_MAX_DEBUG_GROUP_STACK_DEPTH */ - { 19188, 0x0000826D }, /* GL_DEBUG_GROUP_STACK_DEPTH */ - { 19215, 0x0000826E }, /* GL_MAX_UNIFORM_LOCATIONS */ - { 19240, 0x0000826F }, /* GL_INTERNALFORMAT_SUPPORTED */ - { 19268, 0x00008270 }, /* GL_INTERNALFORMAT_PREFERRED */ - { 19296, 0x00008271 }, /* GL_INTERNALFORMAT_RED_SIZE */ - { 19323, 0x00008272 }, /* GL_INTERNALFORMAT_GREEN_SIZE */ - { 19352, 0x00008273 }, /* GL_INTERNALFORMAT_BLUE_SIZE */ - { 19380, 0x00008274 }, /* GL_INTERNALFORMAT_ALPHA_SIZE */ - { 19409, 0x00008275 }, /* GL_INTERNALFORMAT_DEPTH_SIZE */ - { 19438, 0x00008276 }, /* GL_INTERNALFORMAT_STENCIL_SIZE */ - { 19469, 0x00008277 }, /* GL_INTERNALFORMAT_SHARED_SIZE */ - { 19499, 0x00008278 }, /* GL_INTERNALFORMAT_RED_TYPE */ - { 19526, 0x00008279 }, /* GL_INTERNALFORMAT_GREEN_TYPE */ - { 19555, 0x0000827A }, /* GL_INTERNALFORMAT_BLUE_TYPE */ - { 19583, 0x0000827B }, /* GL_INTERNALFORMAT_ALPHA_TYPE */ - { 19612, 0x0000827C }, /* GL_INTERNALFORMAT_DEPTH_TYPE */ - { 19641, 0x0000827D }, /* GL_INTERNALFORMAT_STENCIL_TYPE */ - { 19672, 0x0000827E }, /* GL_MAX_WIDTH */ - { 19685, 0x0000827F }, /* GL_MAX_HEIGHT */ - { 19699, 0x00008280 }, /* GL_MAX_DEPTH */ - { 19712, 0x00008281 }, /* GL_MAX_LAYERS */ - { 19726, 0x00008282 }, /* GL_MAX_COMBINED_DIMENSIONS */ - { 19753, 0x00008283 }, /* GL_COLOR_COMPONENTS */ - { 19773, 0x00008284 }, /* GL_DEPTH_COMPONENTS */ - { 19793, 0x00008285 }, /* GL_STENCIL_COMPONENTS */ - { 19815, 0x00008286 }, /* GL_COLOR_RENDERABLE */ - { 19835, 0x00008287 }, /* GL_DEPTH_RENDERABLE */ - { 19855, 0x00008288 }, /* GL_STENCIL_RENDERABLE */ - { 19877, 0x00008289 }, /* GL_FRAMEBUFFER_RENDERABLE */ - { 19903, 0x0000828A }, /* GL_FRAMEBUFFER_RENDERABLE_LAYERED */ - { 19937, 0x0000828B }, /* GL_FRAMEBUFFER_BLEND */ - { 19958, 0x0000828C }, /* GL_READ_PIXELS */ - { 19973, 0x0000828D }, /* GL_READ_PIXELS_FORMAT */ - { 19995, 0x0000828E }, /* GL_READ_PIXELS_TYPE */ - { 20015, 0x0000828F }, /* GL_TEXTURE_IMAGE_FORMAT */ - { 20039, 0x00008290 }, /* GL_TEXTURE_IMAGE_TYPE */ - { 20061, 0x00008291 }, /* GL_GET_TEXTURE_IMAGE_FORMAT */ - { 20089, 0x00008292 }, /* GL_GET_TEXTURE_IMAGE_TYPE */ - { 20115, 0x00008293 }, /* GL_MIPMAP */ - { 20125, 0x00008294 }, /* GL_MANUAL_GENERATE_MIPMAP */ - { 20151, 0x00008295 }, /* GL_AUTO_GENERATE_MIPMAP */ - { 20175, 0x00008296 }, /* GL_COLOR_ENCODING */ - { 20193, 0x00008297 }, /* GL_SRGB_READ */ - { 20206, 0x00008298 }, /* GL_SRGB_WRITE */ - { 20220, 0x00008299 }, /* GL_SRGB_DECODE_ARB */ - { 20239, 0x0000829A }, /* GL_FILTER */ - { 20249, 0x0000829B }, /* GL_VERTEX_TEXTURE */ - { 20267, 0x0000829C }, /* GL_TESS_CONTROL_TEXTURE */ - { 20291, 0x0000829D }, /* GL_TESS_EVALUATION_TEXTURE */ - { 20318, 0x0000829E }, /* GL_GEOMETRY_TEXTURE */ - { 20338, 0x0000829F }, /* GL_FRAGMENT_TEXTURE */ - { 20358, 0x000082A0 }, /* GL_COMPUTE_TEXTURE */ - { 20377, 0x000082A1 }, /* GL_TEXTURE_SHADOW */ - { 20395, 0x000082A2 }, /* GL_TEXTURE_GATHER */ - { 20413, 0x000082A3 }, /* GL_TEXTURE_GATHER_SHADOW */ - { 20438, 0x000082A4 }, /* GL_SHADER_IMAGE_LOAD */ - { 20459, 0x000082A5 }, /* GL_SHADER_IMAGE_STORE */ - { 20481, 0x000082A6 }, /* GL_SHADER_IMAGE_ATOMIC */ - { 20504, 0x000082A7 }, /* GL_IMAGE_TEXEL_SIZE */ - { 20524, 0x000082A8 }, /* GL_IMAGE_COMPATIBILITY_CLASS */ - { 20553, 0x000082A9 }, /* GL_IMAGE_PIXEL_FORMAT */ - { 20575, 0x000082AA }, /* GL_IMAGE_PIXEL_TYPE */ - { 20595, 0x000082AC }, /* GL_SIMULTANEOUS_TEXTURE_AND_DEPTH_TEST */ - { 20634, 0x000082AD }, /* GL_SIMULTANEOUS_TEXTURE_AND_STENCIL_TEST */ - { 20675, 0x000082AE }, /* GL_SIMULTANEOUS_TEXTURE_AND_DEPTH_WRITE */ - { 20715, 0x000082AF }, /* GL_SIMULTANEOUS_TEXTURE_AND_STENCIL_WRITE */ - { 20757, 0x000082B1 }, /* GL_TEXTURE_COMPRESSED_BLOCK_WIDTH */ - { 20791, 0x000082B2 }, /* GL_TEXTURE_COMPRESSED_BLOCK_HEIGHT */ - { 20826, 0x000082B3 }, /* GL_TEXTURE_COMPRESSED_BLOCK_SIZE */ - { 20859, 0x000082B4 }, /* GL_CLEAR_BUFFER */ - { 20875, 0x000082B5 }, /* GL_TEXTURE_VIEW */ - { 20891, 0x000082B6 }, /* GL_VIEW_COMPATIBILITY_CLASS */ - { 20919, 0x000082B7 }, /* GL_FULL_SUPPORT */ - { 20935, 0x000082B8 }, /* GL_CAVEAT_SUPPORT */ - { 20953, 0x000082B9 }, /* GL_IMAGE_CLASS_4_X_32 */ - { 20975, 0x000082BA }, /* GL_IMAGE_CLASS_2_X_32 */ - { 20997, 0x000082BB }, /* GL_IMAGE_CLASS_1_X_32 */ - { 21019, 0x000082BC }, /* GL_IMAGE_CLASS_4_X_16 */ - { 21041, 0x000082BD }, /* GL_IMAGE_CLASS_2_X_16 */ - { 21063, 0x000082BE }, /* GL_IMAGE_CLASS_1_X_16 */ - { 21085, 0x000082BF }, /* GL_IMAGE_CLASS_4_X_8 */ - { 21106, 0x000082C0 }, /* GL_IMAGE_CLASS_2_X_8 */ - { 21127, 0x000082C1 }, /* GL_IMAGE_CLASS_1_X_8 */ - { 21148, 0x000082C2 }, /* GL_IMAGE_CLASS_11_11_10 */ - { 21172, 0x000082C3 }, /* GL_IMAGE_CLASS_10_10_10_2 */ - { 21198, 0x000082C4 }, /* GL_VIEW_CLASS_128_BITS */ - { 21221, 0x000082C5 }, /* GL_VIEW_CLASS_96_BITS */ - { 21243, 0x000082C6 }, /* GL_VIEW_CLASS_64_BITS */ - { 21265, 0x000082C7 }, /* GL_VIEW_CLASS_48_BITS */ - { 21287, 0x000082C8 }, /* GL_VIEW_CLASS_32_BITS */ - { 21309, 0x000082C9 }, /* GL_VIEW_CLASS_24_BITS */ - { 21331, 0x000082CA }, /* GL_VIEW_CLASS_16_BITS */ - { 21353, 0x000082CB }, /* GL_VIEW_CLASS_8_BITS */ - { 21374, 0x000082CC }, /* GL_VIEW_CLASS_S3TC_DXT1_RGB */ - { 21402, 0x000082CD }, /* GL_VIEW_CLASS_S3TC_DXT1_RGBA */ - { 21431, 0x000082CE }, /* GL_VIEW_CLASS_S3TC_DXT3_RGBA */ - { 21460, 0x000082CF }, /* GL_VIEW_CLASS_S3TC_DXT5_RGBA */ - { 21489, 0x000082D0 }, /* GL_VIEW_CLASS_RGTC1_RED */ - { 21513, 0x000082D1 }, /* GL_VIEW_CLASS_RGTC2_RG */ - { 21536, 0x000082D2 }, /* GL_VIEW_CLASS_BPTC_UNORM */ - { 21561, 0x000082D3 }, /* GL_VIEW_CLASS_BPTC_FLOAT */ - { 21586, 0x000082D4 }, /* GL_VERTEX_ATTRIB_BINDING */ - { 21611, 0x000082D5 }, /* GL_VERTEX_ATTRIB_RELATIVE_OFFSET */ - { 21644, 0x000082D6 }, /* GL_VERTEX_BINDING_DIVISOR */ - { 21670, 0x000082D7 }, /* GL_VERTEX_BINDING_OFFSET */ - { 21695, 0x000082D8 }, /* GL_VERTEX_BINDING_STRIDE */ - { 21720, 0x000082D9 }, /* GL_MAX_VERTEX_ATTRIB_RELATIVE_OFFSET */ - { 21757, 0x000082DA }, /* GL_MAX_VERTEX_ATTRIB_BINDINGS */ - { 21787, 0x000082DB }, /* GL_TEXTURE_VIEW_MIN_LEVEL */ - { 21813, 0x000082DC }, /* GL_TEXTURE_VIEW_NUM_LEVELS */ - { 21840, 0x000082DD }, /* GL_TEXTURE_VIEW_MIN_LAYER */ - { 21866, 0x000082DE }, /* GL_TEXTURE_VIEW_NUM_LAYERS */ - { 21893, 0x000082DF }, /* GL_TEXTURE_IMMUTABLE_LEVELS */ - { 21921, 0x000082E0 }, /* GL_BUFFER */ - { 21931, 0x000082E1 }, /* GL_SHADER */ - { 21941, 0x000082E2 }, /* GL_PROGRAM */ - { 21952, 0x000082E3 }, /* GL_QUERY */ - { 21961, 0x000082E4 }, /* GL_PROGRAM_PIPELINE */ - { 21981, 0x000082E5 }, /* GL_MAX_VERTEX_ATTRIB_STRIDE */ - { 22009, 0x000082E6 }, /* GL_SAMPLER */ - { 22020, 0x000082E7 }, /* GL_DISPLAY_LIST */ - { 22036, 0x000082E8 }, /* GL_MAX_LABEL_LENGTH */ - { 22056, 0x000082E9 }, /* GL_NUM_SHADING_LANGUAGE_VERSIONS */ - { 22089, 0x000082EA }, /* GL_QUERY_TARGET */ - { 22105, 0x000082EC }, /* GL_TRANSFORM_FEEDBACK_OVERFLOW_ARB */ - { 22140, 0x000082ED }, /* GL_TRANSFORM_FEEDBACK_STREAM_OVERFLOW_ARB */ - { 22182, 0x000082EE }, /* GL_VERTICES_SUBMITTED_ARB */ - { 22208, 0x000082EF }, /* GL_PRIMITIVES_SUBMITTED_ARB */ - { 22236, 0x000082F0 }, /* GL_VERTEX_SHADER_INVOCATIONS_ARB */ - { 22269, 0x000082F1 }, /* GL_TESS_CONTROL_SHADER_PATCHES_ARB */ - { 22304, 0x000082F2 }, /* GL_TESS_EVALUATION_SHADER_INVOCATIONS_ARB */ - { 22346, 0x000082F3 }, /* GL_GEOMETRY_SHADER_PRIMITIVES_EMITTED_ARB */ - { 22388, 0x000082F4 }, /* GL_FRAGMENT_SHADER_INVOCATIONS_ARB */ - { 22423, 0x000082F5 }, /* GL_COMPUTE_SHADER_INVOCATIONS_ARB */ - { 22457, 0x000082F6 }, /* GL_CLIPPING_INPUT_PRIMITIVES_ARB */ - { 22490, 0x000082F7 }, /* GL_CLIPPING_OUTPUT_PRIMITIVES_ARB */ - { 22524, 0x000082F8 }, /* GL_SPARSE_BUFFER_PAGE_SIZE_ARB */ - { 22555, 0x000082F9 }, /* GL_MAX_CULL_DISTANCES */ - { 22577, 0x000082FA }, /* GL_MAX_COMBINED_CLIP_AND_CULL_DISTANCES */ - { 22617, 0x000082FB }, /* GL_CONTEXT_RELEASE_BEHAVIOR */ - { 22645, 0x000082FC }, /* GL_CONTEXT_RELEASE_BEHAVIOR_FLUSH */ - { 22679, 0x00008316 }, /* GL_CONVOLUTION_HINT_SGIX */ - { 22704, 0x00008318 }, /* GL_YCRCB_SGIX */ - { 22718, 0x00008319 }, /* GL_YCRCBA_SGIX */ - { 22733, 0x00008320 }, /* GL_ALPHA_MIN_SGIX */ - { 22751, 0x00008321 }, /* GL_ALPHA_MAX_SGIX */ - { 22769, 0x00008322 }, /* GL_SCALEBIAS_HINT_SGIX */ - { 22792, 0x00008329 }, /* GL_ASYNC_MARKER_SGIX */ - { 22813, 0x0000832B }, /* GL_PIXEL_TEX_GEN_MODE_SGIX */ - { 22840, 0x0000832C }, /* GL_ASYNC_HISTOGRAM_SGIX */ - { 22864, 0x0000832D }, /* GL_MAX_ASYNC_HISTOGRAM_SGIX */ - { 22892, 0x00008330 }, /* GL_PIXEL_TRANSFORM_2D_EXT */ - { 22918, 0x00008331 }, /* GL_PIXEL_MAG_FILTER_EXT */ - { 22942, 0x00008332 }, /* GL_PIXEL_MIN_FILTER_EXT */ - { 22966, 0x00008333 }, /* GL_PIXEL_CUBIC_WEIGHT_EXT */ - { 22992, 0x00008334 }, /* GL_CUBIC_EXT */ - { 23005, 0x00008335 }, /* GL_AVERAGE_EXT */ - { 23020, 0x00008336 }, /* GL_PIXEL_TRANSFORM_2D_STACK_DEPTH_EXT */ - { 23058, 0x00008337 }, /* GL_MAX_PIXEL_TRANSFORM_2D_STACK_DEPTH_EXT */ - { 23100, 0x00008338 }, /* GL_PIXEL_TRANSFORM_2D_MATRIX_EXT */ - { 23133, 0x00008349 }, /* GL_FRAGMENT_MATERIAL_EXT */ - { 23158, 0x0000834A }, /* GL_FRAGMENT_NORMAL_EXT */ - { 23181, 0x0000834C }, /* GL_FRAGMENT_COLOR_EXT */ - { 23203, 0x0000834D }, /* GL_ATTENUATION_EXT */ - { 23222, 0x0000834E }, /* GL_SHADOW_ATTENUATION_EXT */ - { 23248, 0x0000834F }, /* GL_TEXTURE_APPLICATION_MODE_EXT */ - { 23280, 0x00008350 }, /* GL_TEXTURE_LIGHT_EXT */ - { 23301, 0x00008351 }, /* GL_TEXTURE_MATERIAL_FACE_EXT */ - { 23330, 0x00008352 }, /* GL_TEXTURE_MATERIAL_PARAMETER_EXT */ - { 23364, 0x00008353 }, /* GL_PIXEL_TEXTURE_SGIS */ - { 23386, 0x00008354 }, /* GL_PIXEL_FRAGMENT_RGB_SOURCE_SGIS */ - { 23420, 0x00008355 }, /* GL_PIXEL_FRAGMENT_ALPHA_SOURCE_SGIS */ - { 23456, 0x00008356 }, /* GL_PIXEL_GROUP_COLOR_SGIS */ - { 23482, 0x0000835C }, /* GL_ASYNC_TEX_IMAGE_SGIX */ - { 23506, 0x0000835D }, /* GL_ASYNC_DRAW_PIXELS_SGIX */ - { 23532, 0x0000835E }, /* GL_ASYNC_READ_PIXELS_SGIX */ - { 23558, 0x0000835F }, /* GL_MAX_ASYNC_TEX_IMAGE_SGIX */ - { 23586, 0x00008360 }, /* GL_MAX_ASYNC_DRAW_PIXELS_SGIX */ - { 23616, 0x00008361 }, /* GL_MAX_ASYNC_READ_PIXELS_SGIX */ - { 23646, 0x00008362 }, /* GL_UNSIGNED_BYTE_2_3_3_REV */ - { 23673, 0x00008363 }, /* GL_UNSIGNED_SHORT_5_6_5 */ - { 23697, 0x00008364 }, /* GL_UNSIGNED_SHORT_5_6_5_REV */ - { 23725, 0x00008365 }, /* GL_UNSIGNED_SHORT_4_4_4_4_REV */ - { 23755, 0x00008366 }, /* GL_UNSIGNED_SHORT_1_5_5_5_REV */ - { 23785, 0x00008367 }, /* GL_UNSIGNED_INT_8_8_8_8_REV */ - { 23813, 0x00008368 }, /* GL_UNSIGNED_INT_2_10_10_10_REV */ - { 23844, 0x00008369 }, /* GL_TEXTURE_MAX_CLAMP_S_SGIX */ - { 23872, 0x0000836A }, /* GL_TEXTURE_MAX_CLAMP_T_SGIX */ - { 23900, 0x0000836B }, /* GL_TEXTURE_MAX_CLAMP_R_SGIX */ - { 23928, 0x00008370 }, /* GL_MIRRORED_REPEAT */ - { 23947, 0x000083A0 }, /* GL_RGB_S3TC */ - { 23959, 0x000083A1 }, /* GL_RGB4_S3TC */ - { 23972, 0x000083A2 }, /* GL_RGBA_S3TC */ - { 23985, 0x000083A3 }, /* GL_RGBA4_S3TC */ - { 23999, 0x000083A4 }, /* GL_RGBA_DXT5_S3TC */ - { 24017, 0x000083A5 }, /* GL_RGBA4_DXT5_S3TC */ - { 24036, 0x000083EE }, /* GL_VERTEX_PRECLIP_SGIX */ - { 24059, 0x000083EF }, /* GL_VERTEX_PRECLIP_HINT_SGIX */ - { 24087, 0x000083F0 }, /* GL_COMPRESSED_RGB_S3TC_DXT1_EXT */ - { 24119, 0x000083F1 }, /* GL_COMPRESSED_RGBA_S3TC_DXT1_EXT */ - { 24152, 0x000083F2 }, /* GL_COMPRESSED_RGBA_S3TC_DXT3_EXT */ - { 24185, 0x000083F3 }, /* GL_COMPRESSED_RGBA_S3TC_DXT5_EXT */ - { 24218, 0x000083F4 }, /* GL_PARALLEL_ARRAYS_INTEL */ - { 24243, 0x000083F5 }, /* GL_VERTEX_ARRAY_PARALLEL_POINTERS_INTEL */ - { 24283, 0x000083F6 }, /* GL_NORMAL_ARRAY_PARALLEL_POINTERS_INTEL */ - { 24323, 0x000083F7 }, /* GL_COLOR_ARRAY_PARALLEL_POINTERS_INTEL */ - { 24362, 0x000083F8 }, /* GL_TEXTURE_COORD_ARRAY_PARALLEL_POINTERS_INTEL */ - { 24409, 0x000083F9 }, /* GL_PERFQUERY_DONOT_FLUSH_INTEL */ - { 24440, 0x000083FA }, /* GL_PERFQUERY_FLUSH_INTEL */ - { 24465, 0x000083FB }, /* GL_PERFQUERY_WAIT_INTEL */ - { 24489, 0x000083FF }, /* GL_TEXTURE_MEMORY_LAYOUT_INTEL */ - { 24520, 0x00008400 }, /* GL_FRAGMENT_LIGHTING_SGIX */ - { 24546, 0x00008401 }, /* GL_FRAGMENT_COLOR_MATERIAL_SGIX */ - { 24578, 0x00008402 }, /* GL_FRAGMENT_COLOR_MATERIAL_FACE_SGIX */ - { 24615, 0x00008403 }, /* GL_FRAGMENT_COLOR_MATERIAL_PARAMETER_SGIX */ - { 24657, 0x00008404 }, /* GL_MAX_FRAGMENT_LIGHTS_SGIX */ - { 24685, 0x00008405 }, /* GL_MAX_ACTIVE_LIGHTS_SGIX */ - { 24711, 0x00008406 }, /* GL_CURRENT_RASTER_NORMAL_SGIX */ - { 24741, 0x00008407 }, /* GL_LIGHT_ENV_MODE_SGIX */ - { 24764, 0x00008408 }, /* GL_FRAGMENT_LIGHT_MODEL_LOCAL_VIEWER_SGIX */ - { 24806, 0x00008409 }, /* GL_FRAGMENT_LIGHT_MODEL_TWO_SIDE_SGIX */ - { 24844, 0x0000840A }, /* GL_FRAGMENT_LIGHT_MODEL_AMBIENT_SGIX */ - { 24881, 0x0000840B }, /* GL_FRAGMENT_LIGHT_MODEL_NORMAL_INTERPOLATION_SGIX */ - { 24931, 0x0000840C }, /* GL_FRAGMENT_LIGHT0_SGIX */ - { 24955, 0x0000840D }, /* GL_FRAGMENT_LIGHT1_SGIX */ - { 24979, 0x0000840E }, /* GL_FRAGMENT_LIGHT2_SGIX */ - { 25003, 0x0000840F }, /* GL_FRAGMENT_LIGHT3_SGIX */ - { 25027, 0x00008410 }, /* GL_FRAGMENT_LIGHT4_SGIX */ - { 25051, 0x00008411 }, /* GL_FRAGMENT_LIGHT5_SGIX */ - { 25075, 0x00008412 }, /* GL_FRAGMENT_LIGHT6_SGIX */ - { 25099, 0x00008413 }, /* GL_FRAGMENT_LIGHT7_SGIX */ - { 25123, 0x0000842E }, /* GL_PACK_RESAMPLE_SGIX */ - { 25145, 0x0000842F }, /* GL_UNPACK_RESAMPLE_SGIX */ - { 25169, 0x00008430 }, /* GL_RESAMPLE_DECIMATE_SGIX */ - { 25195, 0x00008433 }, /* GL_RESAMPLE_REPLICATE_SGIX */ - { 25222, 0x00008434 }, /* GL_RESAMPLE_ZERO_FILL_SGIX */ - { 25249, 0x00008439 }, /* GL_TANGENT_ARRAY_EXT */ - { 25270, 0x0000843A }, /* GL_BINORMAL_ARRAY_EXT */ - { 25292, 0x0000843B }, /* GL_CURRENT_TANGENT_EXT */ - { 25315, 0x0000843C }, /* GL_CURRENT_BINORMAL_EXT */ - { 25339, 0x0000843E }, /* GL_TANGENT_ARRAY_TYPE_EXT */ - { 25365, 0x0000843F }, /* GL_TANGENT_ARRAY_STRIDE_EXT */ - { 25393, 0x00008440 }, /* GL_BINORMAL_ARRAY_TYPE_EXT */ - { 25420, 0x00008441 }, /* GL_BINORMAL_ARRAY_STRIDE_EXT */ - { 25449, 0x00008442 }, /* GL_TANGENT_ARRAY_POINTER_EXT */ - { 25478, 0x00008443 }, /* GL_BINORMAL_ARRAY_POINTER_EXT */ - { 25508, 0x00008444 }, /* GL_MAP1_TANGENT_EXT */ - { 25528, 0x00008445 }, /* GL_MAP2_TANGENT_EXT */ - { 25548, 0x00008446 }, /* GL_MAP1_BINORMAL_EXT */ - { 25569, 0x00008447 }, /* GL_MAP2_BINORMAL_EXT */ - { 25590, 0x0000844D }, /* GL_NEAREST_CLIPMAP_NEAREST_SGIX */ - { 25622, 0x0000844E }, /* GL_NEAREST_CLIPMAP_LINEAR_SGIX */ - { 25653, 0x0000844F }, /* GL_LINEAR_CLIPMAP_NEAREST_SGIX */ - { 25684, 0x00008450 }, /* GL_FOG_COORD_SRC */ - { 25701, 0x00008451 }, /* GL_FOG_COORD */ - { 25714, 0x00008452 }, /* GL_FRAGMENT_DEPTH */ - { 25732, 0x00008453 }, /* GL_CURRENT_FOG_COORD */ - { 25753, 0x00008454 }, /* GL_FOG_COORD_ARRAY_TYPE */ - { 25777, 0x00008455 }, /* GL_FOG_COORD_ARRAY_STRIDE */ - { 25803, 0x00008456 }, /* GL_FOG_COORD_ARRAY_POINTER */ - { 25830, 0x00008457 }, /* GL_FOG_COORD_ARRAY */ - { 25849, 0x00008458 }, /* GL_COLOR_SUM */ - { 25862, 0x00008459 }, /* GL_CURRENT_SECONDARY_COLOR */ - { 25889, 0x0000845A }, /* GL_SECONDARY_COLOR_ARRAY_SIZE */ - { 25919, 0x0000845B }, /* GL_SECONDARY_COLOR_ARRAY_TYPE */ - { 25949, 0x0000845C }, /* GL_SECONDARY_COLOR_ARRAY_STRIDE */ - { 25981, 0x0000845D }, /* GL_SECONDARY_COLOR_ARRAY_POINTER */ - { 26014, 0x0000845E }, /* GL_SECONDARY_COLOR_ARRAY */ - { 26039, 0x0000845F }, /* GL_CURRENT_RASTER_SECONDARY_COLOR */ - { 26073, 0x0000846D }, /* GL_ALIASED_POINT_SIZE_RANGE */ - { 26101, 0x0000846E }, /* GL_ALIASED_LINE_WIDTH_RANGE */ - { 26129, 0x00008490 }, /* GL_SCREEN_COORDINATES_REND */ - { 26156, 0x00008491 }, /* GL_INVERTED_SCREEN_W_REND */ - { 26182, 0x000084C0 }, /* GL_TEXTURE0 */ - { 26194, 0x000084C1 }, /* GL_TEXTURE1 */ - { 26206, 0x000084C2 }, /* GL_TEXTURE2 */ - { 26218, 0x000084C3 }, /* GL_TEXTURE3 */ - { 26230, 0x000084C4 }, /* GL_TEXTURE4 */ - { 26242, 0x000084C5 }, /* GL_TEXTURE5 */ - { 26254, 0x000084C6 }, /* GL_TEXTURE6 */ - { 26266, 0x000084C7 }, /* GL_TEXTURE7 */ - { 26278, 0x000084C8 }, /* GL_TEXTURE8 */ - { 26290, 0x000084C9 }, /* GL_TEXTURE9 */ - { 26302, 0x000084CA }, /* GL_TEXTURE10 */ - { 26315, 0x000084CB }, /* GL_TEXTURE11 */ - { 26328, 0x000084CC }, /* GL_TEXTURE12 */ - { 26341, 0x000084CD }, /* GL_TEXTURE13 */ - { 26354, 0x000084CE }, /* GL_TEXTURE14 */ - { 26367, 0x000084CF }, /* GL_TEXTURE15 */ - { 26380, 0x000084D0 }, /* GL_TEXTURE16 */ - { 26393, 0x000084D1 }, /* GL_TEXTURE17 */ - { 26406, 0x000084D2 }, /* GL_TEXTURE18 */ - { 26419, 0x000084D3 }, /* GL_TEXTURE19 */ - { 26432, 0x000084D4 }, /* GL_TEXTURE20 */ - { 26445, 0x000084D5 }, /* GL_TEXTURE21 */ - { 26458, 0x000084D6 }, /* GL_TEXTURE22 */ - { 26471, 0x000084D7 }, /* GL_TEXTURE23 */ - { 26484, 0x000084D8 }, /* GL_TEXTURE24 */ - { 26497, 0x000084D9 }, /* GL_TEXTURE25 */ - { 26510, 0x000084DA }, /* GL_TEXTURE26 */ - { 26523, 0x000084DB }, /* GL_TEXTURE27 */ - { 26536, 0x000084DC }, /* GL_TEXTURE28 */ - { 26549, 0x000084DD }, /* GL_TEXTURE29 */ - { 26562, 0x000084DE }, /* GL_TEXTURE30 */ - { 26575, 0x000084DF }, /* GL_TEXTURE31 */ - { 26588, 0x000084E0 }, /* GL_ACTIVE_TEXTURE */ - { 26606, 0x000084E1 }, /* GL_CLIENT_ACTIVE_TEXTURE */ - { 26631, 0x000084E2 }, /* GL_MAX_TEXTURE_UNITS */ - { 26652, 0x000084E3 }, /* GL_TRANSPOSE_MODELVIEW_MATRIX */ - { 26682, 0x000084E4 }, /* GL_TRANSPOSE_PROJECTION_MATRIX */ - { 26713, 0x000084E5 }, /* GL_TRANSPOSE_TEXTURE_MATRIX */ - { 26741, 0x000084E6 }, /* GL_TRANSPOSE_COLOR_MATRIX */ - { 26767, 0x000084E7 }, /* GL_SUBTRACT */ - { 26779, 0x000084E8 }, /* GL_MAX_RENDERBUFFER_SIZE */ - { 26804, 0x000084E9 }, /* GL_COMPRESSED_ALPHA */ - { 26824, 0x000084EA }, /* GL_COMPRESSED_LUMINANCE */ - { 26848, 0x000084EB }, /* GL_COMPRESSED_LUMINANCE_ALPHA */ - { 26878, 0x000084EC }, /* GL_COMPRESSED_INTENSITY */ - { 26902, 0x000084ED }, /* GL_COMPRESSED_RGB */ - { 26920, 0x000084EE }, /* GL_COMPRESSED_RGBA */ - { 26939, 0x000084EF }, /* GL_TEXTURE_COMPRESSION_HINT */ - { 26967, 0x000084F0 }, /* GL_UNIFORM_BLOCK_REFERENCED_BY_TESS_CONTROL_SHADER */ - { 27018, 0x000084F1 }, /* GL_UNIFORM_BLOCK_REFERENCED_BY_TESS_EVALUATION_SHADER */ - { 27072, 0x000084F2 }, /* GL_ALL_COMPLETED_NV */ - { 27092, 0x000084F3 }, /* GL_FENCE_STATUS_NV */ - { 27111, 0x000084F4 }, /* GL_FENCE_CONDITION_NV */ - { 27133, 0x000084F5 }, /* GL_TEXTURE_RECTANGLE */ - { 27154, 0x000084F6 }, /* GL_TEXTURE_BINDING_RECTANGLE */ - { 27183, 0x000084F7 }, /* GL_PROXY_TEXTURE_RECTANGLE */ - { 27210, 0x000084F8 }, /* GL_MAX_RECTANGLE_TEXTURE_SIZE */ - { 27240, 0x000084F9 }, /* GL_DEPTH_STENCIL */ - { 27257, 0x000084FA }, /* GL_UNSIGNED_INT_24_8 */ - { 27278, 0x000084FD }, /* GL_MAX_TEXTURE_LOD_BIAS */ - { 27302, 0x000084FE }, /* GL_TEXTURE_MAX_ANISOTROPY_EXT */ - { 27332, 0x000084FF }, /* GL_MAX_TEXTURE_MAX_ANISOTROPY_EXT */ - { 27366, 0x00008500 }, /* GL_TEXTURE_FILTER_CONTROL */ - { 27392, 0x00008501 }, /* GL_TEXTURE_LOD_BIAS */ - { 27412, 0x00008502 }, /* GL_MODELVIEW1_STACK_DEPTH_EXT */ - { 27442, 0x00008503 }, /* GL_COMBINE4_NV */ - { 27457, 0x00008504 }, /* GL_MAX_SHININESS_NV */ - { 27477, 0x00008505 }, /* GL_MAX_SPOT_EXPONENT_NV */ - { 27501, 0x00008506 }, /* GL_MODELVIEW1_MATRIX_EXT */ - { 27526, 0x00008507 }, /* GL_INCR_WRAP */ - { 27539, 0x00008508 }, /* GL_DECR_WRAP */ - { 27552, 0x00008509 }, /* GL_VERTEX_WEIGHTING_EXT */ - { 27576, 0x0000850A }, /* GL_MODELVIEW1_ARB */ - { 27594, 0x0000850B }, /* GL_CURRENT_VERTEX_WEIGHT_EXT */ - { 27623, 0x0000850C }, /* GL_VERTEX_WEIGHT_ARRAY_EXT */ - { 27650, 0x0000850D }, /* GL_VERTEX_WEIGHT_ARRAY_SIZE_EXT */ - { 27682, 0x0000850E }, /* GL_VERTEX_WEIGHT_ARRAY_TYPE_EXT */ - { 27714, 0x0000850F }, /* GL_VERTEX_WEIGHT_ARRAY_STRIDE_EXT */ - { 27748, 0x00008510 }, /* GL_VERTEX_WEIGHT_ARRAY_POINTER_EXT */ - { 27783, 0x00008511 }, /* GL_NORMAL_MAP */ - { 27797, 0x00008512 }, /* GL_REFLECTION_MAP */ - { 27815, 0x00008513 }, /* GL_TEXTURE_CUBE_MAP */ - { 27835, 0x00008514 }, /* GL_TEXTURE_BINDING_CUBE_MAP */ - { 27863, 0x00008515 }, /* GL_TEXTURE_CUBE_MAP_POSITIVE_X */ - { 27894, 0x00008516 }, /* GL_TEXTURE_CUBE_MAP_NEGATIVE_X */ - { 27925, 0x00008517 }, /* GL_TEXTURE_CUBE_MAP_POSITIVE_Y */ - { 27956, 0x00008518 }, /* GL_TEXTURE_CUBE_MAP_NEGATIVE_Y */ - { 27987, 0x00008519 }, /* GL_TEXTURE_CUBE_MAP_POSITIVE_Z */ - { 28018, 0x0000851A }, /* GL_TEXTURE_CUBE_MAP_NEGATIVE_Z */ - { 28049, 0x0000851B }, /* GL_PROXY_TEXTURE_CUBE_MAP */ - { 28075, 0x0000851C }, /* GL_MAX_CUBE_MAP_TEXTURE_SIZE */ - { 28104, 0x0000851D }, /* GL_VERTEX_ARRAY_RANGE_APPLE */ - { 28132, 0x0000851E }, /* GL_VERTEX_ARRAY_RANGE_LENGTH_APPLE */ - { 28167, 0x0000851F }, /* GL_VERTEX_ARRAY_STORAGE_HINT_APPLE */ - { 28202, 0x00008520 }, /* GL_MAX_VERTEX_ARRAY_RANGE_ELEMENT_NV */ - { 28239, 0x00008521 }, /* GL_VERTEX_ARRAY_RANGE_POINTER_APPLE */ - { 28275, 0x00008522 }, /* GL_REGISTER_COMBINERS_NV */ - { 28300, 0x00008523 }, /* GL_VARIABLE_A_NV */ - { 28317, 0x00008524 }, /* GL_VARIABLE_B_NV */ - { 28334, 0x00008525 }, /* GL_VARIABLE_C_NV */ - { 28351, 0x00008526 }, /* GL_VARIABLE_D_NV */ - { 28368, 0x00008527 }, /* GL_VARIABLE_E_NV */ - { 28385, 0x00008528 }, /* GL_VARIABLE_F_NV */ - { 28402, 0x00008529 }, /* GL_VARIABLE_G_NV */ - { 28419, 0x0000852A }, /* GL_CONSTANT_COLOR0_NV */ - { 28441, 0x0000852B }, /* GL_CONSTANT_COLOR1_NV */ - { 28463, 0x0000852C }, /* GL_PRIMARY_COLOR_NV */ - { 28483, 0x0000852D }, /* GL_SECONDARY_COLOR_NV */ - { 28505, 0x0000852E }, /* GL_SPARE0_NV */ - { 28518, 0x0000852F }, /* GL_SPARE1_NV */ - { 28531, 0x00008530 }, /* GL_DISCARD_NV */ - { 28545, 0x00008531 }, /* GL_E_TIMES_F_NV */ - { 28561, 0x00008532 }, /* GL_SPARE0_PLUS_SECONDARY_COLOR_NV */ - { 28595, 0x00008533 }, /* GL_VERTEX_ARRAY_RANGE_WITHOUT_FLUSH_NV */ - { 28634, 0x00008534 }, /* GL_MULTISAMPLE_FILTER_HINT_NV */ - { 28664, 0x00008535 }, /* GL_PER_STAGE_CONSTANTS_NV */ - { 28690, 0x00008536 }, /* GL_UNSIGNED_IDENTITY_NV */ - { 28714, 0x00008537 }, /* GL_UNSIGNED_INVERT_NV */ - { 28736, 0x00008538 }, /* GL_EXPAND_NORMAL_NV */ - { 28756, 0x00008539 }, /* GL_EXPAND_NEGATE_NV */ - { 28776, 0x0000853A }, /* GL_HALF_BIAS_NORMAL_NV */ - { 28799, 0x0000853B }, /* GL_HALF_BIAS_NEGATE_NV */ - { 28822, 0x0000853C }, /* GL_SIGNED_IDENTITY_NV */ - { 28844, 0x0000853D }, /* GL_SIGNED_NEGATE_NV */ - { 28864, 0x0000853E }, /* GL_SCALE_BY_TWO_NV */ - { 28883, 0x0000853F }, /* GL_SCALE_BY_FOUR_NV */ - { 28903, 0x00008540 }, /* GL_SCALE_BY_ONE_HALF_NV */ - { 28927, 0x00008541 }, /* GL_BIAS_BY_NEGATIVE_ONE_HALF_NV */ - { 28959, 0x00008542 }, /* GL_COMBINER_INPUT_NV */ - { 28980, 0x00008543 }, /* GL_COMBINER_MAPPING_NV */ - { 29003, 0x00008544 }, /* GL_COMBINER_COMPONENT_USAGE_NV */ - { 29034, 0x00008545 }, /* GL_COMBINER_AB_DOT_PRODUCT_NV */ - { 29064, 0x00008546 }, /* GL_COMBINER_CD_DOT_PRODUCT_NV */ - { 29094, 0x00008547 }, /* GL_COMBINER_MUX_SUM_NV */ - { 29117, 0x00008548 }, /* GL_COMBINER_SCALE_NV */ - { 29138, 0x00008549 }, /* GL_COMBINER_BIAS_NV */ - { 29158, 0x0000854A }, /* GL_COMBINER_AB_OUTPUT_NV */ - { 29183, 0x0000854B }, /* GL_COMBINER_CD_OUTPUT_NV */ - { 29208, 0x0000854C }, /* GL_COMBINER_SUM_OUTPUT_NV */ - { 29234, 0x0000854D }, /* GL_MAX_GENERAL_COMBINERS_NV */ - { 29262, 0x0000854E }, /* GL_NUM_GENERAL_COMBINERS_NV */ - { 29290, 0x0000854F }, /* GL_COLOR_SUM_CLAMP_NV */ - { 29312, 0x00008550 }, /* GL_COMBINER0_NV */ - { 29328, 0x00008551 }, /* GL_COMBINER1_NV */ - { 29344, 0x00008552 }, /* GL_COMBINER2_NV */ - { 29360, 0x00008553 }, /* GL_COMBINER3_NV */ - { 29376, 0x00008554 }, /* GL_COMBINER4_NV */ - { 29392, 0x00008555 }, /* GL_COMBINER5_NV */ - { 29408, 0x00008556 }, /* GL_COMBINER6_NV */ - { 29424, 0x00008557 }, /* GL_COMBINER7_NV */ - { 29440, 0x00008558 }, /* GL_PRIMITIVE_RESTART_NV */ - { 29464, 0x00008559 }, /* GL_PRIMITIVE_RESTART_INDEX_NV */ - { 29494, 0x0000855A }, /* GL_FOG_DISTANCE_MODE_NV */ - { 29518, 0x0000855B }, /* GL_EYE_RADIAL_NV */ - { 29535, 0x0000855C }, /* GL_EYE_PLANE_ABSOLUTE_NV */ - { 29560, 0x0000855D }, /* GL_EMBOSS_LIGHT_NV */ - { 29579, 0x0000855E }, /* GL_EMBOSS_CONSTANT_NV */ - { 29601, 0x0000855F }, /* GL_EMBOSS_MAP_NV */ - { 29618, 0x00008560 }, /* GL_RED_MIN_CLAMP_INGR */ - { 29640, 0x00008561 }, /* GL_GREEN_MIN_CLAMP_INGR */ - { 29664, 0x00008562 }, /* GL_BLUE_MIN_CLAMP_INGR */ - { 29687, 0x00008563 }, /* GL_ALPHA_MIN_CLAMP_INGR */ - { 29711, 0x00008564 }, /* GL_RED_MAX_CLAMP_INGR */ - { 29733, 0x00008565 }, /* GL_GREEN_MAX_CLAMP_INGR */ - { 29757, 0x00008566 }, /* GL_BLUE_MAX_CLAMP_INGR */ - { 29780, 0x00008567 }, /* GL_ALPHA_MAX_CLAMP_INGR */ - { 29804, 0x00008568 }, /* GL_INTERLACE_READ_INGR */ - { 29827, 0x00008570 }, /* GL_COMBINE */ - { 29838, 0x00008571 }, /* GL_COMBINE_RGB */ - { 29853, 0x00008572 }, /* GL_COMBINE_ALPHA */ - { 29870, 0x00008573 }, /* GL_RGB_SCALE */ - { 29883, 0x00008574 }, /* GL_ADD_SIGNED */ - { 29897, 0x00008575 }, /* GL_INTERPOLATE */ - { 29912, 0x00008576 }, /* GL_CONSTANT */ - { 29924, 0x00008577 }, /* GL_PRIMARY_COLOR */ - { 29941, 0x00008578 }, /* GL_PREVIOUS */ - { 29953, 0x00008580 }, /* GL_SRC0_RGB */ - { 29965, 0x00008581 }, /* GL_SRC1_RGB */ - { 29977, 0x00008582 }, /* GL_SRC2_RGB */ - { 29989, 0x00008583 }, /* GL_SOURCE3_RGB_NV */ - { 30007, 0x00008588 }, /* GL_SRC0_ALPHA */ - { 30021, 0x00008589 }, /* GL_SRC1_ALPHA */ - { 30035, 0x0000858A }, /* GL_SRC2_ALPHA */ - { 30049, 0x0000858B }, /* GL_SOURCE3_ALPHA_NV */ - { 30069, 0x00008590 }, /* GL_OPERAND0_RGB */ - { 30085, 0x00008591 }, /* GL_OPERAND1_RGB */ - { 30101, 0x00008592 }, /* GL_OPERAND2_RGB */ - { 30117, 0x00008593 }, /* GL_OPERAND3_RGB_NV */ - { 30136, 0x00008598 }, /* GL_OPERAND0_ALPHA */ - { 30154, 0x00008599 }, /* GL_OPERAND1_ALPHA */ - { 30172, 0x0000859A }, /* GL_OPERAND2_ALPHA */ - { 30190, 0x0000859B }, /* GL_OPERAND3_ALPHA_NV */ - { 30211, 0x000085A0 }, /* GL_PACK_SUBSAMPLE_RATE_SGIX */ - { 30239, 0x000085A1 }, /* GL_UNPACK_SUBSAMPLE_RATE_SGIX */ - { 30269, 0x000085A2 }, /* GL_PIXEL_SUBSAMPLE_4444_SGIX */ - { 30298, 0x000085A3 }, /* GL_PIXEL_SUBSAMPLE_2424_SGIX */ - { 30327, 0x000085A4 }, /* GL_PIXEL_SUBSAMPLE_4242_SGIX */ - { 30356, 0x000085AE }, /* GL_PERTURB_EXT */ - { 30371, 0x000085AF }, /* GL_TEXTURE_NORMAL_EXT */ - { 30393, 0x000085B0 }, /* GL_LIGHT_MODEL_SPECULAR_VECTOR_APPLE */ - { 30430, 0x000085B1 }, /* GL_TRANSFORM_HINT_APPLE */ - { 30454, 0x000085B2 }, /* GL_UNPACK_CLIENT_STORAGE_APPLE */ - { 30485, 0x000085B3 }, /* GL_BUFFER_OBJECT_APPLE */ - { 30508, 0x000085B4 }, /* GL_STORAGE_CLIENT_APPLE */ - { 30532, 0x000085B5 }, /* GL_VERTEX_ARRAY_BINDING */ - { 30556, 0x000085B7 }, /* GL_TEXTURE_RANGE_LENGTH_APPLE */ - { 30586, 0x000085B8 }, /* GL_TEXTURE_RANGE_POINTER_APPLE */ - { 30617, 0x000085B9 }, /* GL_YCBCR_422_APPLE */ - { 30636, 0x000085BA }, /* GL_UNSIGNED_SHORT_8_8_APPLE */ - { 30664, 0x000085BB }, /* GL_UNSIGNED_SHORT_8_8_REV_APPLE */ - { 30696, 0x000085BC }, /* GL_TEXTURE_STORAGE_HINT_APPLE */ - { 30726, 0x000085BD }, /* GL_STORAGE_PRIVATE_APPLE */ - { 30751, 0x000085BE }, /* GL_STORAGE_CACHED_APPLE */ - { 30775, 0x000085BF }, /* GL_STORAGE_SHARED_APPLE */ - { 30799, 0x000085C0 }, /* GL_REPLACEMENT_CODE_ARRAY_SUN */ - { 30829, 0x000085C1 }, /* GL_REPLACEMENT_CODE_ARRAY_TYPE_SUN */ - { 30864, 0x000085C2 }, /* GL_REPLACEMENT_CODE_ARRAY_STRIDE_SUN */ - { 30901, 0x000085C3 }, /* GL_REPLACEMENT_CODE_ARRAY_POINTER_SUN */ - { 30939, 0x000085C4 }, /* GL_R1UI_V3F_SUN */ - { 30955, 0x000085C5 }, /* GL_R1UI_C4UB_V3F_SUN */ - { 30976, 0x000085C6 }, /* GL_R1UI_C3F_V3F_SUN */ - { 30996, 0x000085C7 }, /* GL_R1UI_N3F_V3F_SUN */ - { 31016, 0x000085C8 }, /* GL_R1UI_C4F_N3F_V3F_SUN */ - { 31040, 0x000085C9 }, /* GL_R1UI_T2F_V3F_SUN */ - { 31060, 0x000085CA }, /* GL_R1UI_T2F_N3F_V3F_SUN */ - { 31084, 0x000085CB }, /* GL_R1UI_T2F_C4F_N3F_V3F_SUN */ - { 31112, 0x000085CC }, /* GL_SLICE_ACCUM_SUN */ - { 31131, 0x00008614 }, /* GL_QUAD_MESH_SUN */ - { 31148, 0x00008615 }, /* GL_TRIANGLE_MESH_SUN */ - { 31169, 0x00008620 }, /* GL_VERTEX_PROGRAM_ARB */ - { 31191, 0x00008621 }, /* GL_VERTEX_STATE_PROGRAM_NV */ - { 31218, 0x00008622 }, /* GL_VERTEX_ATTRIB_ARRAY_ENABLED */ - { 31249, 0x00008623 }, /* GL_VERTEX_ATTRIB_ARRAY_SIZE */ - { 31277, 0x00008624 }, /* GL_VERTEX_ATTRIB_ARRAY_STRIDE */ - { 31307, 0x00008625 }, /* GL_VERTEX_ATTRIB_ARRAY_TYPE */ - { 31335, 0x00008626 }, /* GL_CURRENT_VERTEX_ATTRIB */ - { 31360, 0x00008627 }, /* GL_PROGRAM_LENGTH_ARB */ - { 31382, 0x00008628 }, /* GL_PROGRAM_STRING_ARB */ - { 31404, 0x00008629 }, /* GL_MODELVIEW_PROJECTION_NV */ - { 31431, 0x0000862A }, /* GL_IDENTITY_NV */ - { 31446, 0x0000862B }, /* GL_INVERSE_NV */ - { 31460, 0x0000862C }, /* GL_TRANSPOSE_NV */ - { 31476, 0x0000862D }, /* GL_INVERSE_TRANSPOSE_NV */ - { 31500, 0x0000862E }, /* GL_MAX_PROGRAM_MATRIX_STACK_DEPTH_ARB */ - { 31538, 0x0000862F }, /* GL_MAX_PROGRAM_MATRICES_ARB */ - { 31566, 0x00008630 }, /* GL_MATRIX0_NV */ - { 31580, 0x00008631 }, /* GL_MATRIX1_NV */ - { 31594, 0x00008632 }, /* GL_MATRIX2_NV */ - { 31608, 0x00008633 }, /* GL_MATRIX3_NV */ - { 31622, 0x00008634 }, /* GL_MATRIX4_NV */ - { 31636, 0x00008635 }, /* GL_MATRIX5_NV */ - { 31650, 0x00008636 }, /* GL_MATRIX6_NV */ - { 31664, 0x00008637 }, /* GL_MATRIX7_NV */ - { 31678, 0x00008640 }, /* GL_CURRENT_MATRIX_STACK_DEPTH_ARB */ - { 31712, 0x00008641 }, /* GL_CURRENT_MATRIX_ARB */ - { 31734, 0x00008642 }, /* GL_PROGRAM_POINT_SIZE */ - { 31756, 0x00008643 }, /* GL_VERTEX_PROGRAM_TWO_SIDE */ - { 31783, 0x00008644 }, /* GL_PROGRAM_PARAMETER_NV */ - { 31807, 0x00008645 }, /* GL_VERTEX_ATTRIB_ARRAY_POINTER */ - { 31838, 0x00008646 }, /* GL_PROGRAM_TARGET_NV */ - { 31859, 0x00008647 }, /* GL_PROGRAM_RESIDENT_NV */ - { 31882, 0x00008648 }, /* GL_TRACK_MATRIX_NV */ - { 31901, 0x00008649 }, /* GL_TRACK_MATRIX_TRANSFORM_NV */ - { 31930, 0x0000864A }, /* GL_VERTEX_PROGRAM_BINDING_NV */ - { 31959, 0x0000864B }, /* GL_PROGRAM_ERROR_POSITION_ARB */ - { 31989, 0x0000864C }, /* GL_OFFSET_TEXTURE_RECTANGLE_NV */ - { 32020, 0x0000864D }, /* GL_OFFSET_TEXTURE_RECTANGLE_SCALE_NV */ - { 32057, 0x0000864E }, /* GL_DOT_PRODUCT_TEXTURE_RECTANGLE_NV */ - { 32093, 0x0000864F }, /* GL_DEPTH_CLAMP */ - { 32108, 0x00008650 }, /* GL_VERTEX_ATTRIB_ARRAY0_NV */ - { 32135, 0x00008651 }, /* GL_VERTEX_ATTRIB_ARRAY1_NV */ - { 32162, 0x00008652 }, /* GL_VERTEX_ATTRIB_ARRAY2_NV */ - { 32189, 0x00008653 }, /* GL_VERTEX_ATTRIB_ARRAY3_NV */ - { 32216, 0x00008654 }, /* GL_VERTEX_ATTRIB_ARRAY4_NV */ - { 32243, 0x00008655 }, /* GL_VERTEX_ATTRIB_ARRAY5_NV */ - { 32270, 0x00008656 }, /* GL_VERTEX_ATTRIB_ARRAY6_NV */ - { 32297, 0x00008657 }, /* GL_VERTEX_ATTRIB_ARRAY7_NV */ - { 32324, 0x00008658 }, /* GL_VERTEX_ATTRIB_ARRAY8_NV */ - { 32351, 0x00008659 }, /* GL_VERTEX_ATTRIB_ARRAY9_NV */ - { 32378, 0x0000865A }, /* GL_VERTEX_ATTRIB_ARRAY10_NV */ - { 32406, 0x0000865B }, /* GL_VERTEX_ATTRIB_ARRAY11_NV */ - { 32434, 0x0000865C }, /* GL_VERTEX_ATTRIB_ARRAY12_NV */ - { 32462, 0x0000865D }, /* GL_VERTEX_ATTRIB_ARRAY13_NV */ - { 32490, 0x0000865E }, /* GL_VERTEX_ATTRIB_ARRAY14_NV */ - { 32518, 0x0000865F }, /* GL_VERTEX_ATTRIB_ARRAY15_NV */ - { 32546, 0x00008660 }, /* GL_MAP1_VERTEX_ATTRIB0_4_NV */ - { 32574, 0x00008661 }, /* GL_MAP1_VERTEX_ATTRIB1_4_NV */ - { 32602, 0x00008662 }, /* GL_MAP1_VERTEX_ATTRIB2_4_NV */ - { 32630, 0x00008663 }, /* GL_MAP1_VERTEX_ATTRIB3_4_NV */ - { 32658, 0x00008664 }, /* GL_MAP1_VERTEX_ATTRIB4_4_NV */ - { 32686, 0x00008665 }, /* GL_MAP1_VERTEX_ATTRIB5_4_NV */ - { 32714, 0x00008666 }, /* GL_MAP1_VERTEX_ATTRIB6_4_NV */ - { 32742, 0x00008667 }, /* GL_MAP1_VERTEX_ATTRIB7_4_NV */ - { 32770, 0x00008668 }, /* GL_MAP1_VERTEX_ATTRIB8_4_NV */ - { 32798, 0x00008669 }, /* GL_MAP1_VERTEX_ATTRIB9_4_NV */ - { 32826, 0x0000866A }, /* GL_MAP1_VERTEX_ATTRIB10_4_NV */ - { 32855, 0x0000866B }, /* GL_MAP1_VERTEX_ATTRIB11_4_NV */ - { 32884, 0x0000866C }, /* GL_MAP1_VERTEX_ATTRIB12_4_NV */ - { 32913, 0x0000866D }, /* GL_MAP1_VERTEX_ATTRIB13_4_NV */ - { 32942, 0x0000866E }, /* GL_MAP1_VERTEX_ATTRIB14_4_NV */ - { 32971, 0x0000866F }, /* GL_MAP1_VERTEX_ATTRIB15_4_NV */ - { 33000, 0x00008670 }, /* GL_MAP2_VERTEX_ATTRIB0_4_NV */ - { 33028, 0x00008671 }, /* GL_MAP2_VERTEX_ATTRIB1_4_NV */ - { 33056, 0x00008672 }, /* GL_MAP2_VERTEX_ATTRIB2_4_NV */ - { 33084, 0x00008673 }, /* GL_MAP2_VERTEX_ATTRIB3_4_NV */ - { 33112, 0x00008674 }, /* GL_MAP2_VERTEX_ATTRIB4_4_NV */ - { 33140, 0x00008675 }, /* GL_MAP2_VERTEX_ATTRIB5_4_NV */ - { 33168, 0x00008676 }, /* GL_MAP2_VERTEX_ATTRIB6_4_NV */ - { 33196, 0x00008677 }, /* GL_PROGRAM_BINDING_ARB */ - { 33219, 0x00008678 }, /* GL_MAP2_VERTEX_ATTRIB8_4_NV */ - { 33247, 0x00008679 }, /* GL_MAP2_VERTEX_ATTRIB9_4_NV */ - { 33275, 0x0000867A }, /* GL_MAP2_VERTEX_ATTRIB10_4_NV */ - { 33304, 0x0000867B }, /* GL_MAP2_VERTEX_ATTRIB11_4_NV */ - { 33333, 0x0000867C }, /* GL_MAP2_VERTEX_ATTRIB12_4_NV */ - { 33362, 0x0000867D }, /* GL_MAP2_VERTEX_ATTRIB13_4_NV */ - { 33391, 0x0000867E }, /* GL_MAP2_VERTEX_ATTRIB14_4_NV */ - { 33420, 0x0000867F }, /* GL_MAP2_VERTEX_ATTRIB15_4_NV */ - { 33449, 0x000086A0 }, /* GL_TEXTURE_COMPRESSED_IMAGE_SIZE */ - { 33482, 0x000086A1 }, /* GL_TEXTURE_COMPRESSED */ - { 33504, 0x000086A2 }, /* GL_NUM_COMPRESSED_TEXTURE_FORMATS */ - { 33538, 0x000086A3 }, /* GL_COMPRESSED_TEXTURE_FORMATS */ - { 33568, 0x000086A4 }, /* GL_MAX_VERTEX_UNITS_ARB */ - { 33592, 0x000086A5 }, /* GL_ACTIVE_VERTEX_UNITS_ARB */ - { 33619, 0x000086A6 }, /* GL_WEIGHT_SUM_UNITY_ARB */ - { 33643, 0x000086A7 }, /* GL_VERTEX_BLEND_ARB */ - { 33663, 0x000086A8 }, /* GL_CURRENT_WEIGHT_ARB */ - { 33685, 0x000086A9 }, /* GL_WEIGHT_ARRAY_TYPE_ARB */ - { 33710, 0x000086AA }, /* GL_WEIGHT_ARRAY_STRIDE_ARB */ - { 33737, 0x000086AB }, /* GL_WEIGHT_ARRAY_SIZE_ARB */ - { 33762, 0x000086AC }, /* GL_WEIGHT_ARRAY_POINTER_ARB */ - { 33790, 0x000086AD }, /* GL_WEIGHT_ARRAY_ARB */ - { 33810, 0x000086AE }, /* GL_DOT3_RGB */ - { 33822, 0x000086AF }, /* GL_DOT3_RGBA */ - { 33835, 0x000086B0 }, /* GL_COMPRESSED_RGB_FXT1_3DFX */ - { 33863, 0x000086B1 }, /* GL_COMPRESSED_RGBA_FXT1_3DFX */ - { 33892, 0x000086B2 }, /* GL_MULTISAMPLE_3DFX */ - { 33912, 0x000086B3 }, /* GL_SAMPLE_BUFFERS_3DFX */ - { 33935, 0x000086B4 }, /* GL_SAMPLES_3DFX */ - { 33951, 0x000086C0 }, /* GL_EVAL_2D_NV */ - { 33965, 0x000086C1 }, /* GL_EVAL_TRIANGULAR_2D_NV */ - { 33990, 0x000086C2 }, /* GL_MAP_TESSELLATION_NV */ - { 34013, 0x000086C3 }, /* GL_MAP_ATTRIB_U_ORDER_NV */ - { 34038, 0x000086C4 }, /* GL_MAP_ATTRIB_V_ORDER_NV */ - { 34063, 0x000086C5 }, /* GL_EVAL_FRACTIONAL_TESSELLATION_NV */ - { 34098, 0x000086C6 }, /* GL_EVAL_VERTEX_ATTRIB0_NV */ - { 34124, 0x000086C7 }, /* GL_EVAL_VERTEX_ATTRIB1_NV */ - { 34150, 0x000086C8 }, /* GL_EVAL_VERTEX_ATTRIB2_NV */ - { 34176, 0x000086C9 }, /* GL_EVAL_VERTEX_ATTRIB3_NV */ - { 34202, 0x000086CA }, /* GL_EVAL_VERTEX_ATTRIB4_NV */ - { 34228, 0x000086CB }, /* GL_EVAL_VERTEX_ATTRIB5_NV */ - { 34254, 0x000086CC }, /* GL_EVAL_VERTEX_ATTRIB6_NV */ - { 34280, 0x000086CD }, /* GL_EVAL_VERTEX_ATTRIB7_NV */ - { 34306, 0x000086CE }, /* GL_EVAL_VERTEX_ATTRIB8_NV */ - { 34332, 0x000086CF }, /* GL_EVAL_VERTEX_ATTRIB9_NV */ - { 34358, 0x000086D0 }, /* GL_EVAL_VERTEX_ATTRIB10_NV */ - { 34385, 0x000086D1 }, /* GL_EVAL_VERTEX_ATTRIB11_NV */ - { 34412, 0x000086D2 }, /* GL_EVAL_VERTEX_ATTRIB12_NV */ - { 34439, 0x000086D3 }, /* GL_EVAL_VERTEX_ATTRIB13_NV */ - { 34466, 0x000086D4 }, /* GL_EVAL_VERTEX_ATTRIB14_NV */ - { 34493, 0x000086D5 }, /* GL_EVAL_VERTEX_ATTRIB15_NV */ - { 34520, 0x000086D6 }, /* GL_MAX_MAP_TESSELLATION_NV */ - { 34547, 0x000086D7 }, /* GL_MAX_RATIONAL_EVAL_ORDER_NV */ - { 34577, 0x000086D8 }, /* GL_MAX_PROGRAM_PATCH_ATTRIBS_NV */ - { 34609, 0x000086D9 }, /* GL_RGBA_UNSIGNED_DOT_PRODUCT_MAPPING_NV */ - { 34649, 0x000086DA }, /* GL_UNSIGNED_INT_S8_S8_8_8_NV */ - { 34678, 0x000086DB }, /* GL_UNSIGNED_INT_8_8_S8_S8_REV_NV */ - { 34711, 0x000086DC }, /* GL_DSDT_MAG_INTENSITY_NV */ - { 34736, 0x000086DD }, /* GL_SHADER_CONSISTENT_NV */ - { 34760, 0x000086DE }, /* GL_TEXTURE_SHADER_NV */ - { 34781, 0x000086DF }, /* GL_SHADER_OPERATION_NV */ - { 34804, 0x000086E0 }, /* GL_CULL_MODES_NV */ - { 34821, 0x000086E1 }, /* GL_OFFSET_TEXTURE_MATRIX_NV */ - { 34849, 0x000086E2 }, /* GL_OFFSET_TEXTURE_SCALE_NV */ - { 34876, 0x000086E3 }, /* GL_OFFSET_TEXTURE_BIAS_NV */ - { 34902, 0x000086E4 }, /* GL_PREVIOUS_TEXTURE_INPUT_NV */ - { 34931, 0x000086E5 }, /* GL_CONST_EYE_NV */ - { 34947, 0x000086E6 }, /* GL_PASS_THROUGH_NV */ - { 34966, 0x000086E7 }, /* GL_CULL_FRAGMENT_NV */ - { 34986, 0x000086E8 }, /* GL_OFFSET_TEXTURE_2D_NV */ - { 35010, 0x000086E9 }, /* GL_DEPENDENT_AR_TEXTURE_2D_NV */ - { 35040, 0x000086EA }, /* GL_DEPENDENT_GB_TEXTURE_2D_NV */ - { 35070, 0x000086EB }, /* GL_SURFACE_STATE_NV */ - { 35090, 0x000086EC }, /* GL_DOT_PRODUCT_NV */ - { 35108, 0x000086ED }, /* GL_DOT_PRODUCT_DEPTH_REPLACE_NV */ - { 35140, 0x000086EE }, /* GL_DOT_PRODUCT_TEXTURE_2D_NV */ - { 35169, 0x000086EF }, /* GL_DOT_PRODUCT_TEXTURE_3D_NV */ - { 35198, 0x000086F0 }, /* GL_DOT_PRODUCT_TEXTURE_CUBE_MAP_NV */ - { 35233, 0x000086F1 }, /* GL_DOT_PRODUCT_DIFFUSE_CUBE_MAP_NV */ - { 35268, 0x000086F2 }, /* GL_DOT_PRODUCT_REFLECT_CUBE_MAP_NV */ - { 35303, 0x000086F3 }, /* GL_DOT_PRODUCT_CONST_EYE_REFLECT_CUBE_MAP_NV */ - { 35348, 0x000086F4 }, /* GL_HILO_NV */ - { 35359, 0x000086F5 }, /* GL_DSDT_NV */ - { 35370, 0x000086F6 }, /* GL_DSDT_MAG_NV */ - { 35385, 0x000086F7 }, /* GL_DSDT_MAG_VIB_NV */ - { 35404, 0x000086F8 }, /* GL_HILO16_NV */ - { 35417, 0x000086F9 }, /* GL_SIGNED_HILO_NV */ - { 35435, 0x000086FA }, /* GL_SIGNED_HILO16_NV */ - { 35455, 0x000086FB }, /* GL_SIGNED_RGBA_NV */ - { 35473, 0x000086FC }, /* GL_SIGNED_RGBA8_NV */ - { 35492, 0x000086FD }, /* GL_SURFACE_REGISTERED_NV */ - { 35517, 0x000086FE }, /* GL_SIGNED_RGB_NV */ - { 35534, 0x000086FF }, /* GL_SIGNED_RGB8_NV */ - { 35552, 0x00008700 }, /* GL_SURFACE_MAPPED_NV */ - { 35573, 0x00008701 }, /* GL_SIGNED_LUMINANCE_NV */ - { 35596, 0x00008702 }, /* GL_SIGNED_LUMINANCE8_NV */ - { 35620, 0x00008703 }, /* GL_SIGNED_LUMINANCE_ALPHA_NV */ - { 35649, 0x00008704 }, /* GL_SIGNED_LUMINANCE8_ALPHA8_NV */ - { 35680, 0x00008705 }, /* GL_SIGNED_ALPHA_NV */ - { 35699, 0x00008706 }, /* GL_SIGNED_ALPHA8_NV */ - { 35719, 0x00008707 }, /* GL_SIGNED_INTENSITY_NV */ - { 35742, 0x00008708 }, /* GL_SIGNED_INTENSITY8_NV */ - { 35766, 0x00008709 }, /* GL_DSDT8_NV */ - { 35778, 0x0000870A }, /* GL_DSDT8_MAG8_NV */ - { 35795, 0x0000870B }, /* GL_DSDT8_MAG8_INTENSITY8_NV */ - { 35823, 0x0000870C }, /* GL_SIGNED_RGB_UNSIGNED_ALPHA_NV */ - { 35855, 0x0000870D }, /* GL_SIGNED_RGB8_UNSIGNED_ALPHA8_NV */ - { 35889, 0x0000870E }, /* GL_HI_SCALE_NV */ - { 35904, 0x0000870F }, /* GL_LO_SCALE_NV */ - { 35919, 0x00008710 }, /* GL_DS_SCALE_NV */ - { 35934, 0x00008711 }, /* GL_DT_SCALE_NV */ - { 35949, 0x00008712 }, /* GL_MAGNITUDE_SCALE_NV */ - { 35971, 0x00008713 }, /* GL_VIBRANCE_SCALE_NV */ - { 35992, 0x00008714 }, /* GL_HI_BIAS_NV */ - { 36006, 0x00008715 }, /* GL_LO_BIAS_NV */ - { 36020, 0x00008716 }, /* GL_DS_BIAS_NV */ - { 36034, 0x00008717 }, /* GL_DT_BIAS_NV */ - { 36048, 0x00008718 }, /* GL_MAGNITUDE_BIAS_NV */ - { 36069, 0x00008719 }, /* GL_VIBRANCE_BIAS_NV */ - { 36089, 0x0000871A }, /* GL_TEXTURE_BORDER_VALUES_NV */ - { 36117, 0x0000871B }, /* GL_TEXTURE_HI_SIZE_NV */ - { 36139, 0x0000871C }, /* GL_TEXTURE_LO_SIZE_NV */ - { 36161, 0x0000871D }, /* GL_TEXTURE_DS_SIZE_NV */ - { 36183, 0x0000871E }, /* GL_TEXTURE_DT_SIZE_NV */ - { 36205, 0x0000871F }, /* GL_TEXTURE_MAG_SIZE_NV */ - { 36228, 0x00008722 }, /* GL_MODELVIEW2_ARB */ - { 36246, 0x00008723 }, /* GL_MODELVIEW3_ARB */ - { 36264, 0x00008724 }, /* GL_MODELVIEW4_ARB */ - { 36282, 0x00008725 }, /* GL_MODELVIEW5_ARB */ - { 36300, 0x00008726 }, /* GL_MODELVIEW6_ARB */ - { 36318, 0x00008727 }, /* GL_MODELVIEW7_ARB */ - { 36336, 0x00008728 }, /* GL_MODELVIEW8_ARB */ - { 36354, 0x00008729 }, /* GL_MODELVIEW9_ARB */ - { 36372, 0x0000872A }, /* GL_MODELVIEW10_ARB */ - { 36391, 0x0000872B }, /* GL_MODELVIEW11_ARB */ - { 36410, 0x0000872C }, /* GL_MODELVIEW12_ARB */ - { 36429, 0x0000872D }, /* GL_MODELVIEW13_ARB */ - { 36448, 0x0000872E }, /* GL_MODELVIEW14_ARB */ - { 36467, 0x0000872F }, /* GL_MODELVIEW15_ARB */ - { 36486, 0x00008730 }, /* GL_MODELVIEW16_ARB */ - { 36505, 0x00008731 }, /* GL_MODELVIEW17_ARB */ - { 36524, 0x00008732 }, /* GL_MODELVIEW18_ARB */ - { 36543, 0x00008733 }, /* GL_MODELVIEW19_ARB */ - { 36562, 0x00008734 }, /* GL_MODELVIEW20_ARB */ - { 36581, 0x00008735 }, /* GL_MODELVIEW21_ARB */ - { 36600, 0x00008736 }, /* GL_MODELVIEW22_ARB */ - { 36619, 0x00008737 }, /* GL_MODELVIEW23_ARB */ - { 36638, 0x00008738 }, /* GL_MODELVIEW24_ARB */ - { 36657, 0x00008739 }, /* GL_MODELVIEW25_ARB */ - { 36676, 0x0000873A }, /* GL_MODELVIEW26_ARB */ - { 36695, 0x0000873B }, /* GL_MODELVIEW27_ARB */ - { 36714, 0x0000873C }, /* GL_MODELVIEW28_ARB */ - { 36733, 0x0000873D }, /* GL_MODELVIEW29_ARB */ - { 36752, 0x0000873E }, /* GL_MODELVIEW30_ARB */ - { 36771, 0x0000873F }, /* GL_MODELVIEW31_ARB */ - { 36790, 0x00008740 }, /* GL_DOT3_RGB_EXT */ - { 36806, 0x00008741 }, /* GL_PROGRAM_BINARY_LENGTH */ - { 36831, 0x00008742 }, /* GL_MIRROR_CLAMP_EXT */ - { 36851, 0x00008743 }, /* GL_MIRROR_CLAMP_TO_EDGE */ - { 36875, 0x00008744 }, /* GL_MODULATE_ADD_ATI */ - { 36895, 0x00008745 }, /* GL_MODULATE_SIGNED_ADD_ATI */ - { 36922, 0x00008746 }, /* GL_MODULATE_SUBTRACT_ATI */ - { 36947, 0x0000874A }, /* GL_SET_AMD */ - { 36958, 0x0000874B }, /* GL_REPLACE_VALUE_AMD */ - { 36979, 0x0000874C }, /* GL_STENCIL_OP_VALUE_AMD */ - { 37003, 0x0000874D }, /* GL_STENCIL_BACK_OP_VALUE_AMD */ - { 37032, 0x0000874E }, /* GL_VERTEX_ATTRIB_ARRAY_LONG */ - { 37060, 0x0000874F }, /* GL_OCCLUSION_QUERY_EVENT_MASK_AMD */ - { 37094, 0x00008757 }, /* GL_YCBCR_MESA */ - { 37108, 0x00008758 }, /* GL_PACK_INVERT_MESA */ - { 37128, 0x00008759 }, /* GL_TEXTURE_1D_STACK_MESAX */ - { 37154, 0x0000875A }, /* GL_TEXTURE_2D_STACK_MESAX */ - { 37180, 0x0000875B }, /* GL_PROXY_TEXTURE_1D_STACK_MESAX */ - { 37212, 0x0000875C }, /* GL_PROXY_TEXTURE_2D_STACK_MESAX */ - { 37244, 0x0000875D }, /* GL_TEXTURE_1D_STACK_BINDING_MESAX */ - { 37278, 0x0000875E }, /* GL_TEXTURE_2D_STACK_BINDING_MESAX */ - { 37312, 0x00008760 }, /* GL_STATIC_ATI */ - { 37326, 0x00008761 }, /* GL_DYNAMIC_ATI */ - { 37341, 0x00008762 }, /* GL_PRESERVE_ATI */ - { 37357, 0x00008763 }, /* GL_DISCARD_ATI */ - { 37372, 0x00008764 }, /* GL_BUFFER_SIZE */ - { 37387, 0x00008765 }, /* GL_BUFFER_USAGE */ - { 37403, 0x00008766 }, /* GL_ARRAY_OBJECT_BUFFER_ATI */ - { 37430, 0x00008767 }, /* GL_ARRAY_OBJECT_OFFSET_ATI */ - { 37457, 0x00008768 }, /* GL_ELEMENT_ARRAY_ATI */ - { 37478, 0x00008769 }, /* GL_ELEMENT_ARRAY_TYPE_ATI */ - { 37504, 0x0000876A }, /* GL_ELEMENT_ARRAY_POINTER_ATI */ - { 37533, 0x0000876B }, /* GL_MAX_VERTEX_STREAMS_ATI */ - { 37559, 0x0000876C }, /* GL_VERTEX_STREAM0_ATI */ - { 37581, 0x0000876D }, /* GL_VERTEX_STREAM1_ATI */ - { 37603, 0x0000876E }, /* GL_VERTEX_STREAM2_ATI */ - { 37625, 0x0000876F }, /* GL_VERTEX_STREAM3_ATI */ - { 37647, 0x00008770 }, /* GL_VERTEX_STREAM4_ATI */ - { 37669, 0x00008771 }, /* GL_VERTEX_STREAM5_ATI */ - { 37691, 0x00008772 }, /* GL_VERTEX_STREAM6_ATI */ - { 37713, 0x00008773 }, /* GL_VERTEX_STREAM7_ATI */ - { 37735, 0x00008774 }, /* GL_VERTEX_SOURCE_ATI */ - { 37756, 0x00008775 }, /* GL_BUMP_ROT_MATRIX_ATI */ - { 37779, 0x00008776 }, /* GL_BUMP_ROT_MATRIX_SIZE_ATI */ - { 37807, 0x00008777 }, /* GL_BUMP_NUM_TEX_UNITS_ATI */ - { 37833, 0x00008778 }, /* GL_BUMP_TEX_UNITS_ATI */ - { 37855, 0x00008779 }, /* GL_DUDV_ATI */ - { 37867, 0x0000877A }, /* GL_DU8DV8_ATI */ - { 37881, 0x0000877B }, /* GL_BUMP_ENVMAP_ATI */ - { 37900, 0x0000877C }, /* GL_BUMP_TARGET_ATI */ - { 37919, 0x00008780 }, /* GL_VERTEX_SHADER_EXT */ - { 37940, 0x00008781 }, /* GL_VERTEX_SHADER_BINDING_EXT */ - { 37969, 0x00008782 }, /* GL_OP_INDEX_EXT */ - { 37985, 0x00008783 }, /* GL_OP_NEGATE_EXT */ - { 38002, 0x00008784 }, /* GL_OP_DOT3_EXT */ - { 38017, 0x00008785 }, /* GL_OP_DOT4_EXT */ - { 38032, 0x00008786 }, /* GL_OP_MUL_EXT */ - { 38046, 0x00008787 }, /* GL_OP_ADD_EXT */ - { 38060, 0x00008788 }, /* GL_OP_MADD_EXT */ - { 38075, 0x00008789 }, /* GL_OP_FRAC_EXT */ - { 38090, 0x0000878A }, /* GL_OP_MAX_EXT */ - { 38104, 0x0000878B }, /* GL_OP_MIN_EXT */ - { 38118, 0x0000878C }, /* GL_OP_SET_GE_EXT */ - { 38135, 0x0000878D }, /* GL_OP_SET_LT_EXT */ - { 38152, 0x0000878E }, /* GL_OP_CLAMP_EXT */ - { 38168, 0x0000878F }, /* GL_OP_FLOOR_EXT */ - { 38184, 0x00008790 }, /* GL_OP_ROUND_EXT */ - { 38200, 0x00008791 }, /* GL_OP_EXP_BASE_2_EXT */ - { 38221, 0x00008792 }, /* GL_OP_LOG_BASE_2_EXT */ - { 38242, 0x00008793 }, /* GL_OP_POWER_EXT */ - { 38258, 0x00008794 }, /* GL_OP_RECIP_EXT */ - { 38274, 0x00008795 }, /* GL_OP_RECIP_SQRT_EXT */ - { 38295, 0x00008796 }, /* GL_OP_SUB_EXT */ - { 38309, 0x00008797 }, /* GL_OP_CROSS_PRODUCT_EXT */ - { 38333, 0x00008798 }, /* GL_OP_MULTIPLY_MATRIX_EXT */ - { 38359, 0x00008799 }, /* GL_OP_MOV_EXT */ - { 38373, 0x0000879A }, /* GL_OUTPUT_VERTEX_EXT */ - { 38394, 0x0000879B }, /* GL_OUTPUT_COLOR0_EXT */ - { 38415, 0x0000879C }, /* GL_OUTPUT_COLOR1_EXT */ - { 38436, 0x0000879D }, /* GL_OUTPUT_TEXTURE_COORD0_EXT */ - { 38465, 0x0000879E }, /* GL_OUTPUT_TEXTURE_COORD1_EXT */ - { 38494, 0x0000879F }, /* GL_OUTPUT_TEXTURE_COORD2_EXT */ - { 38523, 0x000087A0 }, /* GL_OUTPUT_TEXTURE_COORD3_EXT */ - { 38552, 0x000087A1 }, /* GL_OUTPUT_TEXTURE_COORD4_EXT */ - { 38581, 0x000087A2 }, /* GL_OUTPUT_TEXTURE_COORD5_EXT */ - { 38610, 0x000087A3 }, /* GL_OUTPUT_TEXTURE_COORD6_EXT */ - { 38639, 0x000087A4 }, /* GL_OUTPUT_TEXTURE_COORD7_EXT */ - { 38668, 0x000087A5 }, /* GL_OUTPUT_TEXTURE_COORD8_EXT */ - { 38697, 0x000087A6 }, /* GL_OUTPUT_TEXTURE_COORD9_EXT */ - { 38726, 0x000087A7 }, /* GL_OUTPUT_TEXTURE_COORD10_EXT */ - { 38756, 0x000087A8 }, /* GL_OUTPUT_TEXTURE_COORD11_EXT */ - { 38786, 0x000087A9 }, /* GL_OUTPUT_TEXTURE_COORD12_EXT */ - { 38816, 0x000087AA }, /* GL_OUTPUT_TEXTURE_COORD13_EXT */ - { 38846, 0x000087AB }, /* GL_OUTPUT_TEXTURE_COORD14_EXT */ - { 38876, 0x000087AC }, /* GL_OUTPUT_TEXTURE_COORD15_EXT */ - { 38906, 0x000087AD }, /* GL_OUTPUT_TEXTURE_COORD16_EXT */ - { 38936, 0x000087AE }, /* GL_OUTPUT_TEXTURE_COORD17_EXT */ - { 38966, 0x000087AF }, /* GL_OUTPUT_TEXTURE_COORD18_EXT */ - { 38996, 0x000087B0 }, /* GL_OUTPUT_TEXTURE_COORD19_EXT */ - { 39026, 0x000087B1 }, /* GL_OUTPUT_TEXTURE_COORD20_EXT */ - { 39056, 0x000087B2 }, /* GL_OUTPUT_TEXTURE_COORD21_EXT */ - { 39086, 0x000087B3 }, /* GL_OUTPUT_TEXTURE_COORD22_EXT */ - { 39116, 0x000087B4 }, /* GL_OUTPUT_TEXTURE_COORD23_EXT */ - { 39146, 0x000087B5 }, /* GL_OUTPUT_TEXTURE_COORD24_EXT */ - { 39176, 0x000087B6 }, /* GL_OUTPUT_TEXTURE_COORD25_EXT */ - { 39206, 0x000087B7 }, /* GL_OUTPUT_TEXTURE_COORD26_EXT */ - { 39236, 0x000087B8 }, /* GL_OUTPUT_TEXTURE_COORD27_EXT */ - { 39266, 0x000087B9 }, /* GL_OUTPUT_TEXTURE_COORD28_EXT */ - { 39296, 0x000087BA }, /* GL_OUTPUT_TEXTURE_COORD29_EXT */ - { 39326, 0x000087BB }, /* GL_OUTPUT_TEXTURE_COORD30_EXT */ - { 39356, 0x000087BC }, /* GL_OUTPUT_TEXTURE_COORD31_EXT */ - { 39386, 0x000087BD }, /* GL_OUTPUT_FOG_EXT */ - { 39404, 0x000087BE }, /* GL_SCALAR_EXT */ - { 39418, 0x000087BF }, /* GL_VECTOR_EXT */ - { 39432, 0x000087C0 }, /* GL_MATRIX_EXT */ - { 39446, 0x000087C1 }, /* GL_VARIANT_EXT */ - { 39461, 0x000087C2 }, /* GL_INVARIANT_EXT */ - { 39478, 0x000087C3 }, /* GL_LOCAL_CONSTANT_EXT */ - { 39500, 0x000087C4 }, /* GL_LOCAL_EXT */ - { 39513, 0x000087C5 }, /* GL_MAX_VERTEX_SHADER_INSTRUCTIONS_EXT */ - { 39551, 0x000087C6 }, /* GL_MAX_VERTEX_SHADER_VARIANTS_EXT */ - { 39585, 0x000087C7 }, /* GL_MAX_VERTEX_SHADER_INVARIANTS_EXT */ - { 39621, 0x000087C8 }, /* GL_MAX_VERTEX_SHADER_LOCAL_CONSTANTS_EXT */ - { 39662, 0x000087C9 }, /* GL_MAX_VERTEX_SHADER_LOCALS_EXT */ - { 39694, 0x000087CA }, /* GL_MAX_OPTIMIZED_VERTEX_SHADER_INSTRUCTIONS_EXT */ - { 39742, 0x000087CB }, /* GL_MAX_OPTIMIZED_VERTEX_SHADER_VARIANTS_EXT */ - { 39786, 0x000087CC }, /* GL_MAX_OPTIMIZED_VERTEX_SHADER_LOCAL_CONSTANTS_EXT */ - { 39837, 0x000087CD }, /* GL_MAX_OPTIMIZED_VERTEX_SHADER_INVARIANTS_EXT */ - { 39883, 0x000087CE }, /* GL_MAX_OPTIMIZED_VERTEX_SHADER_LOCALS_EXT */ - { 39925, 0x000087CF }, /* GL_VERTEX_SHADER_INSTRUCTIONS_EXT */ - { 39959, 0x000087D0 }, /* GL_VERTEX_SHADER_VARIANTS_EXT */ - { 39989, 0x000087D1 }, /* GL_VERTEX_SHADER_INVARIANTS_EXT */ - { 40021, 0x000087D2 }, /* GL_VERTEX_SHADER_LOCAL_CONSTANTS_EXT */ - { 40058, 0x000087D3 }, /* GL_VERTEX_SHADER_LOCALS_EXT */ - { 40086, 0x000087D4 }, /* GL_VERTEX_SHADER_OPTIMIZED_EXT */ - { 40117, 0x000087D5 }, /* GL_X_EXT */ - { 40126, 0x000087D6 }, /* GL_Y_EXT */ - { 40135, 0x000087D7 }, /* GL_Z_EXT */ - { 40144, 0x000087D8 }, /* GL_W_EXT */ - { 40153, 0x000087D9 }, /* GL_NEGATIVE_X_EXT */ - { 40171, 0x000087DA }, /* GL_NEGATIVE_Y_EXT */ - { 40189, 0x000087DB }, /* GL_NEGATIVE_Z_EXT */ - { 40207, 0x000087DC }, /* GL_NEGATIVE_W_EXT */ - { 40225, 0x000087DD }, /* GL_ZERO_EXT */ - { 40237, 0x000087DE }, /* GL_ONE_EXT */ - { 40248, 0x000087DF }, /* GL_NEGATIVE_ONE_EXT */ - { 40268, 0x000087E0 }, /* GL_NORMALIZED_RANGE_EXT */ - { 40292, 0x000087E1 }, /* GL_FULL_RANGE_EXT */ - { 40310, 0x000087E2 }, /* GL_CURRENT_VERTEX_EXT */ - { 40332, 0x000087E3 }, /* GL_MVP_MATRIX_EXT */ - { 40350, 0x000087E4 }, /* GL_VARIANT_VALUE_EXT */ - { 40371, 0x000087E5 }, /* GL_VARIANT_DATATYPE_EXT */ - { 40395, 0x000087E6 }, /* GL_VARIANT_ARRAY_STRIDE_EXT */ - { 40423, 0x000087E7 }, /* GL_VARIANT_ARRAY_TYPE_EXT */ - { 40449, 0x000087E8 }, /* GL_VARIANT_ARRAY_EXT */ - { 40470, 0x000087E9 }, /* GL_VARIANT_ARRAY_POINTER_EXT */ - { 40499, 0x000087EA }, /* GL_INVARIANT_VALUE_EXT */ - { 40522, 0x000087EB }, /* GL_INVARIANT_DATATYPE_EXT */ - { 40548, 0x000087EC }, /* GL_LOCAL_CONSTANT_VALUE_EXT */ - { 40576, 0x000087ED }, /* GL_LOCAL_CONSTANT_DATATYPE_EXT */ - { 40607, 0x000087EE }, /* GL_ATC_RGBA_INTERPOLATED_ALPHA_AMD */ - { 40642, 0x000087F0 }, /* GL_PN_TRIANGLES_ATI */ - { 40662, 0x000087F1 }, /* GL_MAX_PN_TRIANGLES_TESSELATION_LEVEL_ATI */ - { 40704, 0x000087F2 }, /* GL_PN_TRIANGLES_POINT_MODE_ATI */ - { 40735, 0x000087F3 }, /* GL_PN_TRIANGLES_NORMAL_MODE_ATI */ - { 40767, 0x000087F4 }, /* GL_PN_TRIANGLES_TESSELATION_LEVEL_ATI */ - { 40805, 0x000087F5 }, /* GL_PN_TRIANGLES_POINT_MODE_LINEAR_ATI */ - { 40843, 0x000087F6 }, /* GL_PN_TRIANGLES_POINT_MODE_CUBIC_ATI */ - { 40880, 0x000087F7 }, /* GL_PN_TRIANGLES_NORMAL_MODE_LINEAR_ATI */ - { 40919, 0x000087F8 }, /* GL_PN_TRIANGLES_NORMAL_MODE_QUADRATIC_ATI */ - { 40961, 0x000087F9 }, /* GL_3DC_X_AMD */ - { 40974, 0x000087FA }, /* GL_3DC_XY_AMD */ - { 40988, 0x000087FB }, /* GL_VBO_FREE_MEMORY_ATI */ - { 41011, 0x000087FC }, /* GL_TEXTURE_FREE_MEMORY_ATI */ - { 41038, 0x000087FD }, /* GL_RENDERBUFFER_FREE_MEMORY_ATI */ - { 41070, 0x000087FE }, /* GL_NUM_PROGRAM_BINARY_FORMATS */ - { 41100, 0x000087FF }, /* GL_PROGRAM_BINARY_FORMATS */ - { 41126, 0x00008800 }, /* GL_STENCIL_BACK_FUNC */ - { 41147, 0x00008801 }, /* GL_STENCIL_BACK_FAIL */ - { 41168, 0x00008802 }, /* GL_STENCIL_BACK_PASS_DEPTH_FAIL */ - { 41200, 0x00008803 }, /* GL_STENCIL_BACK_PASS_DEPTH_PASS */ - { 41232, 0x00008804 }, /* GL_FRAGMENT_PROGRAM_ARB */ - { 41256, 0x00008805 }, /* GL_PROGRAM_ALU_INSTRUCTIONS_ARB */ - { 41288, 0x00008806 }, /* GL_PROGRAM_TEX_INSTRUCTIONS_ARB */ - { 41320, 0x00008807 }, /* GL_PROGRAM_TEX_INDIRECTIONS_ARB */ - { 41352, 0x00008808 }, /* GL_PROGRAM_NATIVE_ALU_INSTRUCTIONS_ARB */ - { 41391, 0x00008809 }, /* GL_PROGRAM_NATIVE_TEX_INSTRUCTIONS_ARB */ - { 41430, 0x0000880A }, /* GL_PROGRAM_NATIVE_TEX_INDIRECTIONS_ARB */ - { 41469, 0x0000880B }, /* GL_MAX_PROGRAM_ALU_INSTRUCTIONS_ARB */ - { 41505, 0x0000880C }, /* GL_MAX_PROGRAM_TEX_INSTRUCTIONS_ARB */ - { 41541, 0x0000880D }, /* GL_MAX_PROGRAM_TEX_INDIRECTIONS_ARB */ - { 41577, 0x0000880E }, /* GL_MAX_PROGRAM_NATIVE_ALU_INSTRUCTIONS_ARB */ - { 41620, 0x0000880F }, /* GL_MAX_PROGRAM_NATIVE_TEX_INSTRUCTIONS_ARB */ - { 41663, 0x00008810 }, /* GL_MAX_PROGRAM_NATIVE_TEX_INDIRECTIONS_ARB */ - { 41706, 0x00008814 }, /* GL_RGBA32F */ - { 41717, 0x00008815 }, /* GL_RGB32F */ - { 41727, 0x00008816 }, /* GL_ALPHA32F_ARB */ - { 41743, 0x00008817 }, /* GL_INTENSITY32F_ARB */ - { 41763, 0x00008818 }, /* GL_LUMINANCE32F_ARB */ - { 41783, 0x00008819 }, /* GL_LUMINANCE_ALPHA32F_ARB */ - { 41809, 0x0000881A }, /* GL_RGBA16F */ - { 41820, 0x0000881B }, /* GL_RGB16F */ - { 41830, 0x0000881C }, /* GL_ALPHA16F_ARB */ - { 41846, 0x0000881D }, /* GL_INTENSITY16F_ARB */ - { 41866, 0x0000881E }, /* GL_LUMINANCE16F_ARB */ - { 41886, 0x0000881F }, /* GL_LUMINANCE_ALPHA16F_ARB */ - { 41912, 0x00008820 }, /* GL_RGBA_FLOAT_MODE_ARB */ - { 41935, 0x00008823 }, /* GL_WRITEONLY_RENDERING_QCOM */ - { 41963, 0x00008824 }, /* GL_MAX_DRAW_BUFFERS */ - { 41983, 0x00008825 }, /* GL_DRAW_BUFFER0 */ - { 41999, 0x00008826 }, /* GL_DRAW_BUFFER1 */ - { 42015, 0x00008827 }, /* GL_DRAW_BUFFER2 */ - { 42031, 0x00008828 }, /* GL_DRAW_BUFFER3 */ - { 42047, 0x00008829 }, /* GL_DRAW_BUFFER4 */ - { 42063, 0x0000882A }, /* GL_DRAW_BUFFER5 */ - { 42079, 0x0000882B }, /* GL_DRAW_BUFFER6 */ - { 42095, 0x0000882C }, /* GL_DRAW_BUFFER7 */ - { 42111, 0x0000882D }, /* GL_DRAW_BUFFER8 */ - { 42127, 0x0000882E }, /* GL_DRAW_BUFFER9 */ - { 42143, 0x0000882F }, /* GL_DRAW_BUFFER10 */ - { 42160, 0x00008830 }, /* GL_DRAW_BUFFER11 */ - { 42177, 0x00008831 }, /* GL_DRAW_BUFFER12 */ - { 42194, 0x00008832 }, /* GL_DRAW_BUFFER13 */ - { 42211, 0x00008833 }, /* GL_DRAW_BUFFER14 */ - { 42228, 0x00008834 }, /* GL_DRAW_BUFFER15 */ - { 42245, 0x00008835 }, /* GL_COLOR_CLEAR_UNCLAMPED_VALUE_ATI */ - { 42280, 0x0000883D }, /* GL_BLEND_EQUATION_ALPHA */ - { 42304, 0x0000883F }, /* GL_SUBSAMPLE_DISTANCE_AMD */ - { 42330, 0x00008840 }, /* GL_MATRIX_PALETTE_ARB */ - { 42352, 0x00008841 }, /* GL_MAX_MATRIX_PALETTE_STACK_DEPTH_ARB */ - { 42390, 0x00008842 }, /* GL_MAX_PALETTE_MATRICES_ARB */ - { 42418, 0x00008843 }, /* GL_CURRENT_PALETTE_MATRIX_ARB */ - { 42448, 0x00008844 }, /* GL_MATRIX_INDEX_ARRAY_ARB */ - { 42474, 0x00008845 }, /* GL_CURRENT_MATRIX_INDEX_ARB */ - { 42502, 0x00008846 }, /* GL_MATRIX_INDEX_ARRAY_SIZE_ARB */ - { 42533, 0x00008847 }, /* GL_MATRIX_INDEX_ARRAY_TYPE_ARB */ - { 42564, 0x00008848 }, /* GL_MATRIX_INDEX_ARRAY_STRIDE_ARB */ - { 42597, 0x00008849 }, /* GL_MATRIX_INDEX_ARRAY_POINTER_ARB */ - { 42631, 0x0000884A }, /* GL_TEXTURE_DEPTH_SIZE */ - { 42653, 0x0000884B }, /* GL_DEPTH_TEXTURE_MODE */ - { 42675, 0x0000884C }, /* GL_TEXTURE_COMPARE_MODE */ - { 42699, 0x0000884D }, /* GL_TEXTURE_COMPARE_FUNC */ - { 42723, 0x0000884E }, /* GL_COMPARE_REF_TO_TEXTURE */ - { 42749, 0x0000884F }, /* GL_TEXTURE_CUBE_MAP_SEAMLESS */ - { 42778, 0x00008850 }, /* GL_OFFSET_PROJECTIVE_TEXTURE_2D_NV */ - { 42813, 0x00008851 }, /* GL_OFFSET_PROJECTIVE_TEXTURE_2D_SCALE_NV */ - { 42854, 0x00008852 }, /* GL_OFFSET_PROJECTIVE_TEXTURE_RECTANGLE_NV */ - { 42896, 0x00008853 }, /* GL_OFFSET_PROJECTIVE_TEXTURE_RECTANGLE_SCALE_NV */ - { 42944, 0x00008854 }, /* GL_OFFSET_HILO_TEXTURE_2D_NV */ - { 42973, 0x00008855 }, /* GL_OFFSET_HILO_TEXTURE_RECTANGLE_NV */ - { 43009, 0x00008856 }, /* GL_OFFSET_HILO_PROJECTIVE_TEXTURE_2D_NV */ - { 43049, 0x00008857 }, /* GL_OFFSET_HILO_PROJECTIVE_TEXTURE_RECTANGLE_NV */ - { 43096, 0x00008858 }, /* GL_DEPENDENT_HILO_TEXTURE_2D_NV */ - { 43128, 0x00008859 }, /* GL_DEPENDENT_RGB_TEXTURE_3D_NV */ - { 43159, 0x0000885A }, /* GL_DEPENDENT_RGB_TEXTURE_CUBE_MAP_NV */ - { 43196, 0x0000885B }, /* GL_DOT_PRODUCT_PASS_THROUGH_NV */ - { 43227, 0x0000885C }, /* GL_DOT_PRODUCT_TEXTURE_1D_NV */ - { 43256, 0x0000885D }, /* GL_DOT_PRODUCT_AFFINE_DEPTH_REPLACE_NV */ - { 43295, 0x0000885E }, /* GL_HILO8_NV */ - { 43307, 0x0000885F }, /* GL_SIGNED_HILO8_NV */ - { 43326, 0x00008860 }, /* GL_FORCE_BLUE_TO_ONE_NV */ - { 43350, 0x00008861 }, /* GL_POINT_SPRITE */ - { 43366, 0x00008862 }, /* GL_COORD_REPLACE */ - { 43383, 0x00008863 }, /* GL_POINT_SPRITE_R_MODE_NV */ - { 43409, 0x00008864 }, /* GL_QUERY_COUNTER_BITS */ - { 43431, 0x00008865 }, /* GL_CURRENT_QUERY */ - { 43448, 0x00008866 }, /* GL_QUERY_RESULT */ - { 43464, 0x00008867 }, /* GL_QUERY_RESULT_AVAILABLE */ - { 43490, 0x00008868 }, /* GL_MAX_FRAGMENT_PROGRAM_LOCAL_PARAMETERS_NV */ - { 43534, 0x00008869 }, /* GL_MAX_VERTEX_ATTRIBS */ - { 43556, 0x0000886A }, /* GL_VERTEX_ATTRIB_ARRAY_NORMALIZED */ - { 43590, 0x0000886C }, /* GL_MAX_TESS_CONTROL_INPUT_COMPONENTS */ - { 43627, 0x0000886D }, /* GL_MAX_TESS_EVALUATION_INPUT_COMPONENTS */ - { 43667, 0x0000886E }, /* GL_DEPTH_STENCIL_TO_RGBA_NV */ - { 43695, 0x0000886F }, /* GL_DEPTH_STENCIL_TO_BGRA_NV */ - { 43723, 0x00008870 }, /* GL_FRAGMENT_PROGRAM_NV */ - { 43746, 0x00008871 }, /* GL_MAX_TEXTURE_COORDS */ - { 43768, 0x00008872 }, /* GL_MAX_TEXTURE_IMAGE_UNITS */ - { 43795, 0x00008873 }, /* GL_FRAGMENT_PROGRAM_BINDING_NV */ - { 43826, 0x00008874 }, /* GL_PROGRAM_ERROR_STRING_ARB */ - { 43854, 0x00008875 }, /* GL_PROGRAM_FORMAT_ASCII_ARB */ - { 43882, 0x00008876 }, /* GL_PROGRAM_FORMAT_ARB */ - { 43904, 0x00008878 }, /* GL_WRITE_PIXEL_DATA_RANGE_NV */ - { 43933, 0x00008879 }, /* GL_READ_PIXEL_DATA_RANGE_NV */ - { 43961, 0x0000887A }, /* GL_WRITE_PIXEL_DATA_RANGE_LENGTH_NV */ - { 43997, 0x0000887B }, /* GL_READ_PIXEL_DATA_RANGE_LENGTH_NV */ - { 44032, 0x0000887C }, /* GL_WRITE_PIXEL_DATA_RANGE_POINTER_NV */ - { 44069, 0x0000887D }, /* GL_READ_PIXEL_DATA_RANGE_POINTER_NV */ - { 44105, 0x0000887F }, /* GL_GEOMETRY_SHADER_INVOCATIONS */ - { 44136, 0x00008880 }, /* GL_FLOAT_R_NV */ - { 44150, 0x00008881 }, /* GL_FLOAT_RG_NV */ - { 44165, 0x00008882 }, /* GL_FLOAT_RGB_NV */ - { 44181, 0x00008883 }, /* GL_FLOAT_RGBA_NV */ - { 44198, 0x00008884 }, /* GL_FLOAT_R16_NV */ - { 44214, 0x00008885 }, /* GL_FLOAT_R32_NV */ - { 44230, 0x00008886 }, /* GL_FLOAT_RG16_NV */ - { 44247, 0x00008887 }, /* GL_FLOAT_RG32_NV */ - { 44264, 0x00008888 }, /* GL_FLOAT_RGB16_NV */ - { 44282, 0x00008889 }, /* GL_FLOAT_RGB32_NV */ - { 44300, 0x0000888A }, /* GL_FLOAT_RGBA16_NV */ - { 44319, 0x0000888B }, /* GL_FLOAT_RGBA32_NV */ - { 44338, 0x0000888C }, /* GL_TEXTURE_FLOAT_COMPONENTS_NV */ - { 44369, 0x0000888D }, /* GL_FLOAT_CLEAR_COLOR_VALUE_NV */ - { 44399, 0x0000888E }, /* GL_FLOAT_RGBA_MODE_NV */ - { 44421, 0x0000888F }, /* GL_TEXTURE_UNSIGNED_REMAP_MODE_NV */ - { 44455, 0x00008890 }, /* GL_DEPTH_BOUNDS_TEST_EXT */ - { 44480, 0x00008891 }, /* GL_DEPTH_BOUNDS_EXT */ - { 44500, 0x00008892 }, /* GL_ARRAY_BUFFER */ - { 44516, 0x00008893 }, /* GL_ELEMENT_ARRAY_BUFFER */ - { 44540, 0x00008894 }, /* GL_ARRAY_BUFFER_BINDING */ - { 44564, 0x00008895 }, /* GL_ELEMENT_ARRAY_BUFFER_BINDING */ - { 44596, 0x00008896 }, /* GL_VERTEX_ARRAY_BUFFER_BINDING */ - { 44627, 0x00008897 }, /* GL_NORMAL_ARRAY_BUFFER_BINDING */ - { 44658, 0x00008898 }, /* GL_COLOR_ARRAY_BUFFER_BINDING */ - { 44688, 0x00008899 }, /* GL_INDEX_ARRAY_BUFFER_BINDING */ - { 44718, 0x0000889A }, /* GL_TEXTURE_COORD_ARRAY_BUFFER_BINDING */ - { 44756, 0x0000889B }, /* GL_EDGE_FLAG_ARRAY_BUFFER_BINDING */ - { 44790, 0x0000889C }, /* GL_SECONDARY_COLOR_ARRAY_BUFFER_BINDING */ - { 44830, 0x0000889D }, /* GL_FOG_COORDINATE_ARRAY_BUFFER_BINDING */ - { 44869, 0x0000889E }, /* GL_WEIGHT_ARRAY_BUFFER_BINDING */ - { 44900, 0x0000889F }, /* GL_VERTEX_ATTRIB_ARRAY_BUFFER_BINDING */ - { 44938, 0x000088A0 }, /* GL_PROGRAM_INSTRUCTIONS_ARB */ - { 44966, 0x000088A1 }, /* GL_MAX_PROGRAM_INSTRUCTIONS_ARB */ - { 44998, 0x000088A2 }, /* GL_PROGRAM_NATIVE_INSTRUCTIONS_ARB */ - { 45033, 0x000088A3 }, /* GL_MAX_PROGRAM_NATIVE_INSTRUCTIONS_ARB */ - { 45072, 0x000088A4 }, /* GL_PROGRAM_TEMPORARIES_ARB */ - { 45099, 0x000088A5 }, /* GL_MAX_PROGRAM_TEMPORARIES_ARB */ - { 45130, 0x000088A6 }, /* GL_PROGRAM_NATIVE_TEMPORARIES_ARB */ - { 45164, 0x000088A7 }, /* GL_MAX_PROGRAM_NATIVE_TEMPORARIES_ARB */ - { 45202, 0x000088A8 }, /* GL_PROGRAM_PARAMETERS_ARB */ - { 45228, 0x000088A9 }, /* GL_MAX_PROGRAM_PARAMETERS_ARB */ - { 45258, 0x000088AA }, /* GL_PROGRAM_NATIVE_PARAMETERS_ARB */ - { 45291, 0x000088AB }, /* GL_MAX_PROGRAM_NATIVE_PARAMETERS_ARB */ - { 45328, 0x000088AC }, /* GL_PROGRAM_ATTRIBS_ARB */ - { 45351, 0x000088AD }, /* GL_MAX_PROGRAM_ATTRIBS_ARB */ - { 45378, 0x000088AE }, /* GL_PROGRAM_NATIVE_ATTRIBS_ARB */ - { 45408, 0x000088AF }, /* GL_MAX_PROGRAM_NATIVE_ATTRIBS_ARB */ - { 45442, 0x000088B0 }, /* GL_PROGRAM_ADDRESS_REGISTERS_ARB */ - { 45475, 0x000088B1 }, /* GL_MAX_PROGRAM_ADDRESS_REGISTERS_ARB */ - { 45512, 0x000088B2 }, /* GL_PROGRAM_NATIVE_ADDRESS_REGISTERS_ARB */ - { 45552, 0x000088B3 }, /* GL_MAX_PROGRAM_NATIVE_ADDRESS_REGISTERS_ARB */ - { 45596, 0x000088B4 }, /* GL_MAX_PROGRAM_LOCAL_PARAMETERS_ARB */ - { 45632, 0x000088B5 }, /* GL_MAX_PROGRAM_ENV_PARAMETERS_ARB */ - { 45666, 0x000088B6 }, /* GL_PROGRAM_UNDER_NATIVE_LIMITS_ARB */ - { 45701, 0x000088B7 }, /* GL_TRANSPOSE_CURRENT_MATRIX_ARB */ - { 45733, 0x000088B8 }, /* GL_READ_ONLY */ - { 45746, 0x000088B9 }, /* GL_WRITE_ONLY */ - { 45760, 0x000088BA }, /* GL_READ_WRITE */ - { 45774, 0x000088BB }, /* GL_BUFFER_ACCESS */ - { 45791, 0x000088BC }, /* GL_BUFFER_MAPPED */ - { 45808, 0x000088BD }, /* GL_BUFFER_MAP_POINTER */ - { 45830, 0x000088BE }, /* GL_WRITE_DISCARD_NV */ - { 45850, 0x000088BF }, /* GL_TIME_ELAPSED */ - { 45866, 0x000088C0 }, /* GL_MATRIX0_ARB */ - { 45881, 0x000088C1 }, /* GL_MATRIX1_ARB */ - { 45896, 0x000088C2 }, /* GL_MATRIX2_ARB */ - { 45911, 0x000088C3 }, /* GL_MATRIX3_ARB */ - { 45926, 0x000088C4 }, /* GL_MATRIX4_ARB */ - { 45941, 0x000088C5 }, /* GL_MATRIX5_ARB */ - { 45956, 0x000088C6 }, /* GL_MATRIX6_ARB */ - { 45971, 0x000088C7 }, /* GL_MATRIX7_ARB */ - { 45986, 0x000088C8 }, /* GL_MATRIX8_ARB */ - { 46001, 0x000088C9 }, /* GL_MATRIX9_ARB */ - { 46016, 0x000088CA }, /* GL_MATRIX10_ARB */ - { 46032, 0x000088CB }, /* GL_MATRIX11_ARB */ - { 46048, 0x000088CC }, /* GL_MATRIX12_ARB */ - { 46064, 0x000088CD }, /* GL_MATRIX13_ARB */ - { 46080, 0x000088CE }, /* GL_MATRIX14_ARB */ - { 46096, 0x000088CF }, /* GL_MATRIX15_ARB */ - { 46112, 0x000088D0 }, /* GL_MATRIX16_ARB */ - { 46128, 0x000088D1 }, /* GL_MATRIX17_ARB */ - { 46144, 0x000088D2 }, /* GL_MATRIX18_ARB */ - { 46160, 0x000088D3 }, /* GL_MATRIX19_ARB */ - { 46176, 0x000088D4 }, /* GL_MATRIX20_ARB */ - { 46192, 0x000088D5 }, /* GL_MATRIX21_ARB */ - { 46208, 0x000088D6 }, /* GL_MATRIX22_ARB */ - { 46224, 0x000088D7 }, /* GL_MATRIX23_ARB */ - { 46240, 0x000088D8 }, /* GL_MATRIX24_ARB */ - { 46256, 0x000088D9 }, /* GL_MATRIX25_ARB */ - { 46272, 0x000088DA }, /* GL_MATRIX26_ARB */ - { 46288, 0x000088DB }, /* GL_MATRIX27_ARB */ - { 46304, 0x000088DC }, /* GL_MATRIX28_ARB */ - { 46320, 0x000088DD }, /* GL_MATRIX29_ARB */ - { 46336, 0x000088DE }, /* GL_MATRIX30_ARB */ - { 46352, 0x000088DF }, /* GL_MATRIX31_ARB */ - { 46368, 0x000088E0 }, /* GL_STREAM_DRAW */ - { 46383, 0x000088E1 }, /* GL_STREAM_READ */ - { 46398, 0x000088E2 }, /* GL_STREAM_COPY */ - { 46413, 0x000088E4 }, /* GL_STATIC_DRAW */ - { 46428, 0x000088E5 }, /* GL_STATIC_READ */ - { 46443, 0x000088E6 }, /* GL_STATIC_COPY */ - { 46458, 0x000088E8 }, /* GL_DYNAMIC_DRAW */ - { 46474, 0x000088E9 }, /* GL_DYNAMIC_READ */ - { 46490, 0x000088EA }, /* GL_DYNAMIC_COPY */ - { 46506, 0x000088EB }, /* GL_PIXEL_PACK_BUFFER */ - { 46527, 0x000088EC }, /* GL_PIXEL_UNPACK_BUFFER */ - { 46550, 0x000088ED }, /* GL_PIXEL_PACK_BUFFER_BINDING */ - { 46579, 0x000088EE }, /* GL_ETC1_SRGB8_NV */ - { 46596, 0x000088EF }, /* GL_PIXEL_UNPACK_BUFFER_BINDING */ - { 46627, 0x000088F0 }, /* GL_DEPTH24_STENCIL8 */ - { 46647, 0x000088F1 }, /* GL_TEXTURE_STENCIL_SIZE */ - { 46671, 0x000088F2 }, /* GL_STENCIL_TAG_BITS_EXT */ - { 46695, 0x000088F3 }, /* GL_STENCIL_CLEAR_TAG_VALUE_EXT */ - { 46726, 0x000088F4 }, /* GL_MAX_PROGRAM_EXEC_INSTRUCTIONS_NV */ - { 46762, 0x000088F5 }, /* GL_MAX_PROGRAM_CALL_DEPTH_NV */ - { 46791, 0x000088F6 }, /* GL_MAX_PROGRAM_IF_DEPTH_NV */ - { 46818, 0x000088F7 }, /* GL_MAX_PROGRAM_LOOP_DEPTH_NV */ - { 46847, 0x000088F8 }, /* GL_MAX_PROGRAM_LOOP_COUNT_NV */ - { 46876, 0x000088F9 }, /* GL_SRC1_COLOR */ - { 46890, 0x000088FA }, /* GL_ONE_MINUS_SRC1_COLOR */ - { 46914, 0x000088FB }, /* GL_ONE_MINUS_SRC1_ALPHA */ - { 46938, 0x000088FC }, /* GL_MAX_DUAL_SOURCE_DRAW_BUFFERS */ - { 46970, 0x000088FD }, /* GL_VERTEX_ATTRIB_ARRAY_INTEGER */ - { 47001, 0x000088FE }, /* GL_VERTEX_ATTRIB_ARRAY_DIVISOR */ - { 47032, 0x000088FF }, /* GL_MAX_ARRAY_TEXTURE_LAYERS */ - { 47060, 0x00008904 }, /* GL_MIN_PROGRAM_TEXEL_OFFSET */ - { 47088, 0x00008905 }, /* GL_MAX_PROGRAM_TEXEL_OFFSET */ - { 47116, 0x00008906 }, /* GL_PROGRAM_ATTRIB_COMPONENTS_NV */ - { 47148, 0x00008907 }, /* GL_PROGRAM_RESULT_COMPONENTS_NV */ - { 47180, 0x00008908 }, /* GL_MAX_PROGRAM_ATTRIB_COMPONENTS_NV */ - { 47216, 0x00008909 }, /* GL_MAX_PROGRAM_RESULT_COMPONENTS_NV */ - { 47252, 0x00008910 }, /* GL_STENCIL_TEST_TWO_SIDE_EXT */ - { 47281, 0x00008911 }, /* GL_ACTIVE_STENCIL_FACE_EXT */ - { 47308, 0x00008912 }, /* GL_MIRROR_CLAMP_TO_BORDER_EXT */ - { 47338, 0x00008914 }, /* GL_SAMPLES_PASSED */ - { 47356, 0x00008916 }, /* GL_GEOMETRY_VERTICES_OUT */ - { 47381, 0x00008917 }, /* GL_GEOMETRY_INPUT_TYPE */ - { 47404, 0x00008918 }, /* GL_GEOMETRY_OUTPUT_TYPE */ - { 47428, 0x00008919 }, /* GL_SAMPLER_BINDING */ - { 47447, 0x0000891A }, /* GL_CLAMP_VERTEX_COLOR */ - { 47469, 0x0000891B }, /* GL_CLAMP_FRAGMENT_COLOR */ - { 47493, 0x0000891C }, /* GL_CLAMP_READ_COLOR */ - { 47513, 0x0000891D }, /* GL_FIXED_ONLY */ - { 47527, 0x0000891E }, /* GL_TESS_CONTROL_PROGRAM_NV */ - { 47554, 0x0000891F }, /* GL_TESS_EVALUATION_PROGRAM_NV */ - { 47584, 0x00008920 }, /* GL_FRAGMENT_SHADER_ATI */ - { 47607, 0x00008921 }, /* GL_REG_0_ATI */ - { 47620, 0x00008922 }, /* GL_REG_1_ATI */ - { 47633, 0x00008923 }, /* GL_REG_2_ATI */ - { 47646, 0x00008924 }, /* GL_REG_3_ATI */ - { 47659, 0x00008925 }, /* GL_REG_4_ATI */ - { 47672, 0x00008926 }, /* GL_REG_5_ATI */ - { 47685, 0x00008927 }, /* GL_REG_6_ATI */ - { 47698, 0x00008928 }, /* GL_REG_7_ATI */ - { 47711, 0x00008929 }, /* GL_REG_8_ATI */ - { 47724, 0x0000892A }, /* GL_REG_9_ATI */ - { 47737, 0x0000892B }, /* GL_REG_10_ATI */ - { 47751, 0x0000892C }, /* GL_REG_11_ATI */ - { 47765, 0x0000892D }, /* GL_REG_12_ATI */ - { 47779, 0x0000892E }, /* GL_REG_13_ATI */ - { 47793, 0x0000892F }, /* GL_REG_14_ATI */ - { 47807, 0x00008930 }, /* GL_REG_15_ATI */ - { 47821, 0x00008931 }, /* GL_REG_16_ATI */ - { 47835, 0x00008932 }, /* GL_REG_17_ATI */ - { 47849, 0x00008933 }, /* GL_REG_18_ATI */ - { 47863, 0x00008934 }, /* GL_REG_19_ATI */ - { 47877, 0x00008935 }, /* GL_REG_20_ATI */ - { 47891, 0x00008936 }, /* GL_REG_21_ATI */ - { 47905, 0x00008937 }, /* GL_REG_22_ATI */ - { 47919, 0x00008938 }, /* GL_REG_23_ATI */ - { 47933, 0x00008939 }, /* GL_REG_24_ATI */ - { 47947, 0x0000893A }, /* GL_REG_25_ATI */ - { 47961, 0x0000893B }, /* GL_REG_26_ATI */ - { 47975, 0x0000893C }, /* GL_REG_27_ATI */ - { 47989, 0x0000893D }, /* GL_REG_28_ATI */ - { 48003, 0x0000893E }, /* GL_REG_29_ATI */ - { 48017, 0x0000893F }, /* GL_REG_30_ATI */ - { 48031, 0x00008940 }, /* GL_REG_31_ATI */ - { 48045, 0x00008941 }, /* GL_CON_0_ATI */ - { 48058, 0x00008942 }, /* GL_CON_1_ATI */ - { 48071, 0x00008943 }, /* GL_CON_2_ATI */ - { 48084, 0x00008944 }, /* GL_CON_3_ATI */ - { 48097, 0x00008945 }, /* GL_CON_4_ATI */ - { 48110, 0x00008946 }, /* GL_CON_5_ATI */ - { 48123, 0x00008947 }, /* GL_CON_6_ATI */ - { 48136, 0x00008948 }, /* GL_CON_7_ATI */ - { 48149, 0x00008949 }, /* GL_CON_8_ATI */ - { 48162, 0x0000894A }, /* GL_CON_9_ATI */ - { 48175, 0x0000894B }, /* GL_CON_10_ATI */ - { 48189, 0x0000894C }, /* GL_CON_11_ATI */ - { 48203, 0x0000894D }, /* GL_CON_12_ATI */ - { 48217, 0x0000894E }, /* GL_CON_13_ATI */ - { 48231, 0x0000894F }, /* GL_CON_14_ATI */ - { 48245, 0x00008950 }, /* GL_CON_15_ATI */ - { 48259, 0x00008951 }, /* GL_CON_16_ATI */ - { 48273, 0x00008952 }, /* GL_CON_17_ATI */ - { 48287, 0x00008953 }, /* GL_CON_18_ATI */ - { 48301, 0x00008954 }, /* GL_CON_19_ATI */ - { 48315, 0x00008955 }, /* GL_CON_20_ATI */ - { 48329, 0x00008956 }, /* GL_CON_21_ATI */ - { 48343, 0x00008957 }, /* GL_CON_22_ATI */ - { 48357, 0x00008958 }, /* GL_CON_23_ATI */ - { 48371, 0x00008959 }, /* GL_CON_24_ATI */ - { 48385, 0x0000895A }, /* GL_CON_25_ATI */ - { 48399, 0x0000895B }, /* GL_CON_26_ATI */ - { 48413, 0x0000895C }, /* GL_CON_27_ATI */ - { 48427, 0x0000895D }, /* GL_CON_28_ATI */ - { 48441, 0x0000895E }, /* GL_CON_29_ATI */ - { 48455, 0x0000895F }, /* GL_CON_30_ATI */ - { 48469, 0x00008960 }, /* GL_CON_31_ATI */ - { 48483, 0x00008961 }, /* GL_MOV_ATI */ - { 48494, 0x00008963 }, /* GL_ADD_ATI */ - { 48505, 0x00008964 }, /* GL_MUL_ATI */ - { 48516, 0x00008965 }, /* GL_SUB_ATI */ - { 48527, 0x00008966 }, /* GL_DOT3_ATI */ - { 48539, 0x00008967 }, /* GL_DOT4_ATI */ - { 48551, 0x00008968 }, /* GL_MAD_ATI */ - { 48562, 0x00008969 }, /* GL_LERP_ATI */ - { 48574, 0x0000896A }, /* GL_CND_ATI */ - { 48585, 0x0000896B }, /* GL_CND0_ATI */ - { 48597, 0x0000896C }, /* GL_DOT2_ADD_ATI */ - { 48613, 0x0000896D }, /* GL_SECONDARY_INTERPOLATOR_ATI */ - { 48643, 0x0000896E }, /* GL_NUM_FRAGMENT_REGISTERS_ATI */ - { 48673, 0x0000896F }, /* GL_NUM_FRAGMENT_CONSTANTS_ATI */ - { 48703, 0x00008970 }, /* GL_NUM_PASSES_ATI */ - { 48721, 0x00008971 }, /* GL_NUM_INSTRUCTIONS_PER_PASS_ATI */ - { 48754, 0x00008972 }, /* GL_NUM_INSTRUCTIONS_TOTAL_ATI */ - { 48784, 0x00008973 }, /* GL_NUM_INPUT_INTERPOLATOR_COMPONENTS_ATI */ - { 48825, 0x00008974 }, /* GL_NUM_LOOPBACK_COMPONENTS_ATI */ - { 48856, 0x00008975 }, /* GL_COLOR_ALPHA_PAIRING_ATI */ - { 48883, 0x00008976 }, /* GL_SWIZZLE_STR_ATI */ - { 48902, 0x00008977 }, /* GL_SWIZZLE_STQ_ATI */ - { 48921, 0x00008978 }, /* GL_SWIZZLE_STR_DR_ATI */ - { 48943, 0x00008979 }, /* GL_SWIZZLE_STQ_DQ_ATI */ - { 48965, 0x0000897A }, /* GL_SWIZZLE_STRQ_ATI */ - { 48985, 0x0000897B }, /* GL_SWIZZLE_STRQ_DQ_ATI */ - { 49008, 0x00008980 }, /* GL_INTERLACE_OML */ - { 49025, 0x00008981 }, /* GL_INTERLACE_READ_OML */ - { 49047, 0x00008982 }, /* GL_FORMAT_SUBSAMPLE_24_24_OML */ - { 49077, 0x00008983 }, /* GL_FORMAT_SUBSAMPLE_244_244_OML */ - { 49109, 0x00008984 }, /* GL_PACK_RESAMPLE_OML */ - { 49130, 0x00008985 }, /* GL_UNPACK_RESAMPLE_OML */ - { 49153, 0x00008986 }, /* GL_RESAMPLE_REPLICATE_OML */ - { 49179, 0x00008987 }, /* GL_RESAMPLE_ZERO_FILL_OML */ - { 49205, 0x00008988 }, /* GL_RESAMPLE_AVERAGE_OML */ - { 49229, 0x00008989 }, /* GL_RESAMPLE_DECIMATE_OML */ - { 49254, 0x0000898A }, /* GL_POINT_SIZE_ARRAY_TYPE_OES */ - { 49283, 0x0000898B }, /* GL_POINT_SIZE_ARRAY_STRIDE_OES */ - { 49314, 0x0000898C }, /* GL_POINT_SIZE_ARRAY_POINTER_OES */ - { 49346, 0x0000898D }, /* GL_MODELVIEW_MATRIX_FLOAT_AS_INT_BITS_OES */ - { 49388, 0x0000898E }, /* GL_PROJECTION_MATRIX_FLOAT_AS_INT_BITS_OES */ - { 49431, 0x0000898F }, /* GL_TEXTURE_MATRIX_FLOAT_AS_INT_BITS_OES */ - { 49471, 0x00008A00 }, /* GL_VERTEX_ATTRIB_MAP1_APPLE */ - { 49499, 0x00008A01 }, /* GL_VERTEX_ATTRIB_MAP2_APPLE */ - { 49527, 0x00008A02 }, /* GL_VERTEX_ATTRIB_MAP1_SIZE_APPLE */ - { 49560, 0x00008A03 }, /* GL_VERTEX_ATTRIB_MAP1_COEFF_APPLE */ - { 49594, 0x00008A04 }, /* GL_VERTEX_ATTRIB_MAP1_ORDER_APPLE */ - { 49628, 0x00008A05 }, /* GL_VERTEX_ATTRIB_MAP1_DOMAIN_APPLE */ - { 49663, 0x00008A06 }, /* GL_VERTEX_ATTRIB_MAP2_SIZE_APPLE */ - { 49696, 0x00008A07 }, /* GL_VERTEX_ATTRIB_MAP2_COEFF_APPLE */ - { 49730, 0x00008A08 }, /* GL_VERTEX_ATTRIB_MAP2_ORDER_APPLE */ - { 49764, 0x00008A09 }, /* GL_VERTEX_ATTRIB_MAP2_DOMAIN_APPLE */ - { 49799, 0x00008A0A }, /* GL_DRAW_PIXELS_APPLE */ - { 49820, 0x00008A0B }, /* GL_FENCE_APPLE */ - { 49835, 0x00008A0C }, /* GL_ELEMENT_ARRAY_APPLE */ - { 49858, 0x00008A0D }, /* GL_ELEMENT_ARRAY_TYPE_APPLE */ - { 49886, 0x00008A0E }, /* GL_ELEMENT_ARRAY_POINTER_APPLE */ - { 49917, 0x00008A0F }, /* GL_COLOR_FLOAT_APPLE */ - { 49938, 0x00008A11 }, /* GL_UNIFORM_BUFFER */ - { 49956, 0x00008A12 }, /* GL_BUFFER_SERIALIZED_MODIFY_APPLE */ - { 49990, 0x00008A13 }, /* GL_BUFFER_FLUSHING_UNMAP_APPLE */ - { 50021, 0x00008A14 }, /* GL_AUX_DEPTH_STENCIL_APPLE */ - { 50048, 0x00008A15 }, /* GL_PACK_ROW_BYTES_APPLE */ - { 50072, 0x00008A16 }, /* GL_UNPACK_ROW_BYTES_APPLE */ - { 50098, 0x00008A19 }, /* GL_RELEASED_APPLE */ - { 50116, 0x00008A1A }, /* GL_VOLATILE_APPLE */ - { 50134, 0x00008A1B }, /* GL_RETAINED_APPLE */ - { 50152, 0x00008A1C }, /* GL_UNDEFINED_APPLE */ - { 50171, 0x00008A1D }, /* GL_PURGEABLE_APPLE */ - { 50190, 0x00008A1F }, /* GL_RGB_422_APPLE */ - { 50207, 0x00008A28 }, /* GL_UNIFORM_BUFFER_BINDING */ - { 50233, 0x00008A29 }, /* GL_UNIFORM_BUFFER_START */ - { 50257, 0x00008A2A }, /* GL_UNIFORM_BUFFER_SIZE */ - { 50280, 0x00008A2B }, /* GL_MAX_VERTEX_UNIFORM_BLOCKS */ - { 50309, 0x00008A2C }, /* GL_MAX_GEOMETRY_UNIFORM_BLOCKS */ - { 50340, 0x00008A2D }, /* GL_MAX_FRAGMENT_UNIFORM_BLOCKS */ - { 50371, 0x00008A2E }, /* GL_MAX_COMBINED_UNIFORM_BLOCKS */ - { 50402, 0x00008A2F }, /* GL_MAX_UNIFORM_BUFFER_BINDINGS */ - { 50433, 0x00008A30 }, /* GL_MAX_UNIFORM_BLOCK_SIZE */ - { 50459, 0x00008A31 }, /* GL_MAX_COMBINED_VERTEX_UNIFORM_COMPONENTS */ - { 50501, 0x00008A32 }, /* GL_MAX_COMBINED_GEOMETRY_UNIFORM_COMPONENTS */ - { 50545, 0x00008A33 }, /* GL_MAX_COMBINED_FRAGMENT_UNIFORM_COMPONENTS */ - { 50589, 0x00008A34 }, /* GL_UNIFORM_BUFFER_OFFSET_ALIGNMENT */ - { 50624, 0x00008A35 }, /* GL_ACTIVE_UNIFORM_BLOCK_MAX_NAME_LENGTH */ - { 50664, 0x00008A36 }, /* GL_ACTIVE_UNIFORM_BLOCKS */ - { 50689, 0x00008A37 }, /* GL_UNIFORM_TYPE */ - { 50705, 0x00008A38 }, /* GL_UNIFORM_SIZE */ - { 50721, 0x00008A39 }, /* GL_UNIFORM_NAME_LENGTH */ - { 50744, 0x00008A3A }, /* GL_UNIFORM_BLOCK_INDEX */ - { 50767, 0x00008A3B }, /* GL_UNIFORM_OFFSET */ - { 50785, 0x00008A3C }, /* GL_UNIFORM_ARRAY_STRIDE */ - { 50809, 0x00008A3D }, /* GL_UNIFORM_MATRIX_STRIDE */ - { 50834, 0x00008A3E }, /* GL_UNIFORM_IS_ROW_MAJOR */ - { 50858, 0x00008A3F }, /* GL_UNIFORM_BLOCK_BINDING */ - { 50883, 0x00008A40 }, /* GL_UNIFORM_BLOCK_DATA_SIZE */ - { 50910, 0x00008A41 }, /* GL_UNIFORM_BLOCK_NAME_LENGTH */ - { 50939, 0x00008A42 }, /* GL_UNIFORM_BLOCK_ACTIVE_UNIFORMS */ - { 50972, 0x00008A43 }, /* GL_UNIFORM_BLOCK_ACTIVE_UNIFORM_INDICES */ - { 51012, 0x00008A44 }, /* GL_UNIFORM_BLOCK_REFERENCED_BY_VERTEX_SHADER */ - { 51057, 0x00008A45 }, /* GL_UNIFORM_BLOCK_REFERENCED_BY_GEOMETRY_SHADER */ - { 51104, 0x00008A46 }, /* GL_UNIFORM_BLOCK_REFERENCED_BY_FRAGMENT_SHADER */ - { 51151, 0x00008A48 }, /* GL_TEXTURE_SRGB_DECODE_EXT */ - { 51178, 0x00008A49 }, /* GL_DECODE_EXT */ - { 51192, 0x00008A4A }, /* GL_SKIP_DECODE_EXT */ - { 51211, 0x00008A4F }, /* GL_PROGRAM_PIPELINE_OBJECT_EXT */ - { 51242, 0x00008A51 }, /* GL_RGB_RAW_422_APPLE */ - { 51263, 0x00008A52 }, /* GL_FRAGMENT_SHADER_DISCARDS_SAMPLES_EXT */ - { 51303, 0x00008A53 }, /* GL_SYNC_OBJECT_APPLE */ - { 51324, 0x00008A54 }, /* GL_COMPRESSED_SRGB_PVRTC_2BPPV1_EXT */ - { 51360, 0x00008A55 }, /* GL_COMPRESSED_SRGB_PVRTC_4BPPV1_EXT */ - { 51396, 0x00008A56 }, /* GL_COMPRESSED_SRGB_ALPHA_PVRTC_2BPPV1_EXT */ - { 51438, 0x00008A57 }, /* GL_COMPRESSED_SRGB_ALPHA_PVRTC_4BPPV1_EXT */ - { 51480, 0x00008B30 }, /* GL_FRAGMENT_SHADER */ - { 51499, 0x00008B31 }, /* GL_VERTEX_SHADER */ - { 51516, 0x00008B40 }, /* GL_PROGRAM_OBJECT_ARB */ - { 51538, 0x00008B48 }, /* GL_SHADER_OBJECT_ARB */ - { 51559, 0x00008B49 }, /* GL_MAX_FRAGMENT_UNIFORM_COMPONENTS */ - { 51594, 0x00008B4A }, /* GL_MAX_VERTEX_UNIFORM_COMPONENTS */ - { 51627, 0x00008B4B }, /* GL_MAX_VARYING_COMPONENTS */ - { 51653, 0x00008B4C }, /* GL_MAX_VERTEX_TEXTURE_IMAGE_UNITS */ - { 51687, 0x00008B4D }, /* GL_MAX_COMBINED_TEXTURE_IMAGE_UNITS */ - { 51723, 0x00008B4E }, /* GL_OBJECT_TYPE_ARB */ - { 51742, 0x00008B4F }, /* GL_SHADER_TYPE */ - { 51757, 0x00008B50 }, /* GL_FLOAT_VEC2 */ - { 51771, 0x00008B51 }, /* GL_FLOAT_VEC3 */ - { 51785, 0x00008B52 }, /* GL_FLOAT_VEC4 */ - { 51799, 0x00008B53 }, /* GL_INT_VEC2 */ - { 51811, 0x00008B54 }, /* GL_INT_VEC3 */ - { 51823, 0x00008B55 }, /* GL_INT_VEC4 */ - { 51835, 0x00008B56 }, /* GL_BOOL */ - { 51843, 0x00008B57 }, /* GL_BOOL_VEC2 */ - { 51856, 0x00008B58 }, /* GL_BOOL_VEC3 */ - { 51869, 0x00008B59 }, /* GL_BOOL_VEC4 */ - { 51882, 0x00008B5A }, /* GL_FLOAT_MAT2 */ - { 51896, 0x00008B5B }, /* GL_FLOAT_MAT3 */ - { 51910, 0x00008B5C }, /* GL_FLOAT_MAT4 */ - { 51924, 0x00008B5D }, /* GL_SAMPLER_1D */ - { 51938, 0x00008B5E }, /* GL_SAMPLER_2D */ - { 51952, 0x00008B5F }, /* GL_SAMPLER_3D */ - { 51966, 0x00008B60 }, /* GL_SAMPLER_CUBE */ - { 51982, 0x00008B61 }, /* GL_SAMPLER_1D_SHADOW */ - { 52003, 0x00008B62 }, /* GL_SAMPLER_2D_SHADOW */ - { 52024, 0x00008B63 }, /* GL_SAMPLER_2D_RECT */ - { 52043, 0x00008B64 }, /* GL_SAMPLER_2D_RECT_SHADOW */ - { 52069, 0x00008B65 }, /* GL_FLOAT_MAT2x3 */ - { 52085, 0x00008B66 }, /* GL_FLOAT_MAT2x4 */ - { 52101, 0x00008B67 }, /* GL_FLOAT_MAT3x2 */ - { 52117, 0x00008B68 }, /* GL_FLOAT_MAT3x4 */ - { 52133, 0x00008B69 }, /* GL_FLOAT_MAT4x2 */ - { 52149, 0x00008B6A }, /* GL_FLOAT_MAT4x3 */ - { 52165, 0x00008B80 }, /* GL_DELETE_STATUS */ - { 52182, 0x00008B81 }, /* GL_COMPILE_STATUS */ - { 52200, 0x00008B82 }, /* GL_LINK_STATUS */ - { 52215, 0x00008B83 }, /* GL_VALIDATE_STATUS */ - { 52234, 0x00008B84 }, /* GL_INFO_LOG_LENGTH */ - { 52253, 0x00008B85 }, /* GL_ATTACHED_SHADERS */ - { 52273, 0x00008B86 }, /* GL_ACTIVE_UNIFORMS */ - { 52292, 0x00008B87 }, /* GL_ACTIVE_UNIFORM_MAX_LENGTH */ - { 52321, 0x00008B88 }, /* GL_SHADER_SOURCE_LENGTH */ - { 52345, 0x00008B89 }, /* GL_ACTIVE_ATTRIBUTES */ - { 52366, 0x00008B8A }, /* GL_ACTIVE_ATTRIBUTE_MAX_LENGTH */ - { 52397, 0x00008B8B }, /* GL_FRAGMENT_SHADER_DERIVATIVE_HINT */ - { 52432, 0x00008B8C }, /* GL_SHADING_LANGUAGE_VERSION */ - { 52460, 0x00008B8D }, /* GL_CURRENT_PROGRAM */ - { 52479, 0x00008B90 }, /* GL_PALETTE4_RGB8_OES */ - { 52500, 0x00008B91 }, /* GL_PALETTE4_RGBA8_OES */ - { 52522, 0x00008B92 }, /* GL_PALETTE4_R5_G6_B5_OES */ - { 52547, 0x00008B93 }, /* GL_PALETTE4_RGBA4_OES */ - { 52569, 0x00008B94 }, /* GL_PALETTE4_RGB5_A1_OES */ - { 52593, 0x00008B95 }, /* GL_PALETTE8_RGB8_OES */ - { 52614, 0x00008B96 }, /* GL_PALETTE8_RGBA8_OES */ - { 52636, 0x00008B97 }, /* GL_PALETTE8_R5_G6_B5_OES */ - { 52661, 0x00008B98 }, /* GL_PALETTE8_RGBA4_OES */ - { 52683, 0x00008B99 }, /* GL_PALETTE8_RGB5_A1_OES */ - { 52707, 0x00008B9A }, /* GL_IMPLEMENTATION_COLOR_READ_TYPE */ - { 52741, 0x00008B9B }, /* GL_IMPLEMENTATION_COLOR_READ_FORMAT */ - { 52777, 0x00008B9C }, /* GL_POINT_SIZE_ARRAY_OES */ - { 52801, 0x00008B9D }, /* GL_TEXTURE_CROP_RECT_OES */ - { 52826, 0x00008B9E }, /* GL_MATRIX_INDEX_ARRAY_BUFFER_BINDING_OES */ - { 52867, 0x00008B9F }, /* GL_POINT_SIZE_ARRAY_BUFFER_BINDING_OES */ - { 52906, 0x00008BC0 }, /* GL_COUNTER_TYPE_AMD */ - { 52926, 0x00008BC1 }, /* GL_COUNTER_RANGE_AMD */ - { 52947, 0x00008BC2 }, /* GL_UNSIGNED_INT64_AMD */ - { 52969, 0x00008BC3 }, /* GL_PERCENTAGE_AMD */ - { 52987, 0x00008BC4 }, /* GL_PERFMON_RESULT_AVAILABLE_AMD */ - { 53019, 0x00008BC5 }, /* GL_PERFMON_RESULT_SIZE_AMD */ - { 53046, 0x00008BC6 }, /* GL_PERFMON_RESULT_AMD */ - { 53068, 0x00008BD2 }, /* GL_TEXTURE_WIDTH_QCOM */ - { 53090, 0x00008BD3 }, /* GL_TEXTURE_HEIGHT_QCOM */ - { 53113, 0x00008BD4 }, /* GL_TEXTURE_DEPTH_QCOM */ - { 53135, 0x00008BD5 }, /* GL_TEXTURE_INTERNAL_FORMAT_QCOM */ - { 53167, 0x00008BD6 }, /* GL_TEXTURE_FORMAT_QCOM */ - { 53190, 0x00008BD7 }, /* GL_TEXTURE_TYPE_QCOM */ - { 53211, 0x00008BD8 }, /* GL_TEXTURE_IMAGE_VALID_QCOM */ - { 53239, 0x00008BD9 }, /* GL_TEXTURE_NUM_LEVELS_QCOM */ - { 53266, 0x00008BDA }, /* GL_TEXTURE_TARGET_QCOM */ - { 53289, 0x00008BDB }, /* GL_TEXTURE_OBJECT_VALID_QCOM */ - { 53318, 0x00008BDC }, /* GL_STATE_RESTORE */ - { 53335, 0x00008BE7 }, /* GL_SAMPLER_EXTERNAL_2D_Y2Y_EXT */ - { 53366, 0x00008C00 }, /* GL_COMPRESSED_RGB_PVRTC_4BPPV1_IMG */ - { 53401, 0x00008C01 }, /* GL_COMPRESSED_RGB_PVRTC_2BPPV1_IMG */ - { 53436, 0x00008C02 }, /* GL_COMPRESSED_RGBA_PVRTC_4BPPV1_IMG */ - { 53472, 0x00008C03 }, /* GL_COMPRESSED_RGBA_PVRTC_2BPPV1_IMG */ - { 53508, 0x00008C04 }, /* GL_MODULATE_COLOR_IMG */ - { 53530, 0x00008C05 }, /* GL_RECIP_ADD_SIGNED_ALPHA_IMG */ - { 53560, 0x00008C06 }, /* GL_TEXTURE_ALPHA_MODULATE_IMG */ - { 53590, 0x00008C07 }, /* GL_FACTOR_ALPHA_MODULATE_IMG */ - { 53619, 0x00008C08 }, /* GL_FRAGMENT_ALPHA_MODULATE_IMG */ - { 53650, 0x00008C09 }, /* GL_ADD_BLEND_IMG */ - { 53667, 0x00008C0A }, /* GL_SGX_BINARY_IMG */ - { 53685, 0x00008C10 }, /* GL_TEXTURE_RED_TYPE */ - { 53705, 0x00008C11 }, /* GL_TEXTURE_GREEN_TYPE */ - { 53727, 0x00008C12 }, /* GL_TEXTURE_BLUE_TYPE */ - { 53748, 0x00008C13 }, /* GL_TEXTURE_ALPHA_TYPE */ - { 53770, 0x00008C14 }, /* GL_TEXTURE_LUMINANCE_TYPE */ - { 53796, 0x00008C15 }, /* GL_TEXTURE_INTENSITY_TYPE */ - { 53822, 0x00008C16 }, /* GL_TEXTURE_DEPTH_TYPE */ - { 53844, 0x00008C17 }, /* GL_UNSIGNED_NORMALIZED */ - { 53867, 0x00008C18 }, /* GL_TEXTURE_1D_ARRAY */ - { 53887, 0x00008C19 }, /* GL_PROXY_TEXTURE_1D_ARRAY */ - { 53913, 0x00008C1A }, /* GL_TEXTURE_2D_ARRAY */ - { 53933, 0x00008C1B }, /* GL_PROXY_TEXTURE_2D_ARRAY */ - { 53959, 0x00008C1C }, /* GL_TEXTURE_BINDING_1D_ARRAY */ - { 53987, 0x00008C1D }, /* GL_TEXTURE_BINDING_2D_ARRAY */ - { 54015, 0x00008C26 }, /* GL_GEOMETRY_PROGRAM_NV */ - { 54038, 0x00008C27 }, /* GL_MAX_PROGRAM_OUTPUT_VERTICES_NV */ - { 54072, 0x00008C28 }, /* GL_MAX_PROGRAM_TOTAL_OUTPUT_COMPONENTS_NV */ - { 54114, 0x00008C29 }, /* GL_MAX_GEOMETRY_TEXTURE_IMAGE_UNITS */ - { 54150, 0x00008C2A }, /* GL_TEXTURE_BUFFER_BINDING */ - { 54176, 0x00008C2B }, /* GL_MAX_TEXTURE_BUFFER_SIZE */ - { 54203, 0x00008C2C }, /* GL_TEXTURE_BINDING_BUFFER */ - { 54229, 0x00008C2D }, /* GL_TEXTURE_BUFFER_DATA_STORE_BINDING */ - { 54266, 0x00008C2E }, /* GL_TEXTURE_BUFFER_FORMAT_ARB */ - { 54295, 0x00008C2F }, /* GL_ANY_SAMPLES_PASSED */ - { 54317, 0x00008C36 }, /* GL_SAMPLE_SHADING */ - { 54335, 0x00008C37 }, /* GL_MIN_SAMPLE_SHADING_VALUE */ - { 54363, 0x00008C3A }, /* GL_R11F_G11F_B10F */ - { 54381, 0x00008C3B }, /* GL_UNSIGNED_INT_10F_11F_11F_REV */ - { 54413, 0x00008C3C }, /* GL_RGBA_SIGNED_COMPONENTS_EXT */ - { 54443, 0x00008C3D }, /* GL_RGB9_E5 */ - { 54454, 0x00008C3E }, /* GL_UNSIGNED_INT_5_9_9_9_REV */ - { 54482, 0x00008C3F }, /* GL_TEXTURE_SHARED_SIZE */ - { 54505, 0x00008C40 }, /* GL_SRGB */ - { 54513, 0x00008C41 }, /* GL_SRGB8 */ - { 54522, 0x00008C42 }, /* GL_SRGB_ALPHA */ - { 54536, 0x00008C43 }, /* GL_SRGB8_ALPHA8 */ - { 54552, 0x00008C44 }, /* GL_SLUMINANCE_ALPHA */ - { 54572, 0x00008C45 }, /* GL_SLUMINANCE8_ALPHA8 */ - { 54594, 0x00008C46 }, /* GL_SLUMINANCE */ - { 54608, 0x00008C47 }, /* GL_SLUMINANCE8 */ - { 54623, 0x00008C48 }, /* GL_COMPRESSED_SRGB */ - { 54642, 0x00008C49 }, /* GL_COMPRESSED_SRGB_ALPHA */ - { 54667, 0x00008C4A }, /* GL_COMPRESSED_SLUMINANCE */ - { 54692, 0x00008C4B }, /* GL_COMPRESSED_SLUMINANCE_ALPHA */ - { 54723, 0x00008C4C }, /* GL_COMPRESSED_SRGB_S3TC_DXT1_EXT */ - { 54756, 0x00008C4D }, /* GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT1_EXT */ - { 54795, 0x00008C4E }, /* GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT3_EXT */ - { 54834, 0x00008C4F }, /* GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT5_EXT */ - { 54873, 0x00008C70 }, /* GL_COMPRESSED_LUMINANCE_LATC1_EXT */ - { 54907, 0x00008C71 }, /* GL_COMPRESSED_SIGNED_LUMINANCE_LATC1_EXT */ - { 54948, 0x00008C72 }, /* GL_COMPRESSED_LUMINANCE_ALPHA_LATC2_EXT */ - { 54988, 0x00008C73 }, /* GL_COMPRESSED_SIGNED_LUMINANCE_ALPHA_LATC2_EXT */ - { 55035, 0x00008C74 }, /* GL_TESS_CONTROL_PROGRAM_PARAMETER_BUFFER_NV */ - { 55079, 0x00008C75 }, /* GL_TESS_EVALUATION_PROGRAM_PARAMETER_BUFFER_NV */ - { 55126, 0x00008C76 }, /* GL_TRANSFORM_FEEDBACK_VARYING_MAX_LENGTH */ - { 55167, 0x00008C77 }, /* GL_BACK_PRIMARY_COLOR_NV */ - { 55192, 0x00008C78 }, /* GL_BACK_SECONDARY_COLOR_NV */ - { 55219, 0x00008C79 }, /* GL_TEXTURE_COORD_NV */ - { 55239, 0x00008C7A }, /* GL_CLIP_DISTANCE_NV */ - { 55259, 0x00008C7B }, /* GL_VERTEX_ID_NV */ - { 55275, 0x00008C7C }, /* GL_PRIMITIVE_ID_NV */ - { 55294, 0x00008C7D }, /* GL_GENERIC_ATTRIB_NV */ - { 55315, 0x00008C7E }, /* GL_TRANSFORM_FEEDBACK_ATTRIBS_NV */ - { 55348, 0x00008C7F }, /* GL_TRANSFORM_FEEDBACK_BUFFER_MODE */ - { 55382, 0x00008C80 }, /* GL_MAX_TRANSFORM_FEEDBACK_SEPARATE_COMPONENTS */ - { 55428, 0x00008C81 }, /* GL_ACTIVE_VARYINGS_NV */ - { 55450, 0x00008C82 }, /* GL_ACTIVE_VARYING_MAX_LENGTH_NV */ - { 55482, 0x00008C83 }, /* GL_TRANSFORM_FEEDBACK_VARYINGS */ - { 55513, 0x00008C84 }, /* GL_TRANSFORM_FEEDBACK_BUFFER_START */ - { 55548, 0x00008C85 }, /* GL_TRANSFORM_FEEDBACK_BUFFER_SIZE */ - { 55582, 0x00008C86 }, /* GL_TRANSFORM_FEEDBACK_RECORD_NV */ - { 55614, 0x00008C87 }, /* GL_PRIMITIVES_GENERATED */ - { 55638, 0x00008C88 }, /* GL_TRANSFORM_FEEDBACK_PRIMITIVES_WRITTEN */ - { 55679, 0x00008C89 }, /* GL_RASTERIZER_DISCARD */ - { 55701, 0x00008C8A }, /* GL_MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS */ - { 55750, 0x00008C8B }, /* GL_MAX_TRANSFORM_FEEDBACK_SEPARATE_ATTRIBS */ - { 55793, 0x00008C8C }, /* GL_INTERLEAVED_ATTRIBS */ - { 55816, 0x00008C8D }, /* GL_SEPARATE_ATTRIBS */ - { 55836, 0x00008C8E }, /* GL_TRANSFORM_FEEDBACK_BUFFER */ - { 55865, 0x00008C8F }, /* GL_TRANSFORM_FEEDBACK_BUFFER_BINDING */ - { 55902, 0x00008C92 }, /* GL_ATC_RGB_AMD */ - { 55917, 0x00008C93 }, /* GL_ATC_RGBA_EXPLICIT_ALPHA_AMD */ - { 55948, 0x00008CA0 }, /* GL_POINT_SPRITE_COORD_ORIGIN */ - { 55977, 0x00008CA1 }, /* GL_LOWER_LEFT */ - { 55991, 0x00008CA2 }, /* GL_UPPER_LEFT */ - { 56005, 0x00008CA3 }, /* GL_STENCIL_BACK_REF */ - { 56025, 0x00008CA4 }, /* GL_STENCIL_BACK_VALUE_MASK */ - { 56052, 0x00008CA5 }, /* GL_STENCIL_BACK_WRITEMASK */ - { 56078, 0x00008CA6 }, /* GL_FRAMEBUFFER_BINDING */ - { 56101, 0x00008CA7 }, /* GL_RENDERBUFFER_BINDING */ - { 56125, 0x00008CA8 }, /* GL_READ_FRAMEBUFFER */ - { 56145, 0x00008CA9 }, /* GL_DRAW_FRAMEBUFFER */ - { 56165, 0x00008CAA }, /* GL_READ_FRAMEBUFFER_BINDING */ - { 56193, 0x00008CAB }, /* GL_RENDERBUFFER_SAMPLES */ - { 56217, 0x00008CAC }, /* GL_DEPTH_COMPONENT32F */ - { 56239, 0x00008CAD }, /* GL_DEPTH32F_STENCIL8 */ - { 56260, 0x00008CD0 }, /* GL_FRAMEBUFFER_ATTACHMENT_OBJECT_TYPE */ - { 56298, 0x00008CD1 }, /* GL_FRAMEBUFFER_ATTACHMENT_OBJECT_NAME */ - { 56336, 0x00008CD2 }, /* GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_LEVEL */ - { 56376, 0x00008CD3 }, /* GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_CUBE_MAP_FACE */ - { 56424, 0x00008CD4 }, /* GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_LAYER */ - { 56464, 0x00008CD5 }, /* GL_FRAMEBUFFER_COMPLETE */ - { 56488, 0x00008CD6 }, /* GL_FRAMEBUFFER_INCOMPLETE_ATTACHMENT */ - { 56525, 0x00008CD7 }, /* GL_FRAMEBUFFER_INCOMPLETE_MISSING_ATTACHMENT */ - { 56570, 0x00008CD9 }, /* GL_FRAMEBUFFER_INCOMPLETE_DIMENSIONS */ - { 56607, 0x00008CDA }, /* GL_FRAMEBUFFER_INCOMPLETE_FORMATS_EXT */ - { 56645, 0x00008CDB }, /* GL_FRAMEBUFFER_INCOMPLETE_DRAW_BUFFER */ - { 56683, 0x00008CDC }, /* GL_FRAMEBUFFER_INCOMPLETE_READ_BUFFER */ - { 56721, 0x00008CDD }, /* GL_FRAMEBUFFER_UNSUPPORTED */ - { 56748, 0x00008CDF }, /* GL_MAX_COLOR_ATTACHMENTS */ - { 56773, 0x00008CE0 }, /* GL_COLOR_ATTACHMENT0 */ - { 56794, 0x00008CE1 }, /* GL_COLOR_ATTACHMENT1 */ - { 56815, 0x00008CE2 }, /* GL_COLOR_ATTACHMENT2 */ - { 56836, 0x00008CE3 }, /* GL_COLOR_ATTACHMENT3 */ - { 56857, 0x00008CE4 }, /* GL_COLOR_ATTACHMENT4 */ - { 56878, 0x00008CE5 }, /* GL_COLOR_ATTACHMENT5 */ - { 56899, 0x00008CE6 }, /* GL_COLOR_ATTACHMENT6 */ - { 56920, 0x00008CE7 }, /* GL_COLOR_ATTACHMENT7 */ - { 56941, 0x00008CE8 }, /* GL_COLOR_ATTACHMENT8 */ - { 56962, 0x00008CE9 }, /* GL_COLOR_ATTACHMENT9 */ - { 56983, 0x00008CEA }, /* GL_COLOR_ATTACHMENT10 */ - { 57005, 0x00008CEB }, /* GL_COLOR_ATTACHMENT11 */ - { 57027, 0x00008CEC }, /* GL_COLOR_ATTACHMENT12 */ - { 57049, 0x00008CED }, /* GL_COLOR_ATTACHMENT13 */ - { 57071, 0x00008CEE }, /* GL_COLOR_ATTACHMENT14 */ - { 57093, 0x00008CEF }, /* GL_COLOR_ATTACHMENT15 */ - { 57115, 0x00008CF0 }, /* GL_COLOR_ATTACHMENT16 */ - { 57137, 0x00008CF1 }, /* GL_COLOR_ATTACHMENT17 */ - { 57159, 0x00008CF2 }, /* GL_COLOR_ATTACHMENT18 */ - { 57181, 0x00008CF3 }, /* GL_COLOR_ATTACHMENT19 */ - { 57203, 0x00008CF4 }, /* GL_COLOR_ATTACHMENT20 */ - { 57225, 0x00008CF5 }, /* GL_COLOR_ATTACHMENT21 */ - { 57247, 0x00008CF6 }, /* GL_COLOR_ATTACHMENT22 */ - { 57269, 0x00008CF7 }, /* GL_COLOR_ATTACHMENT23 */ - { 57291, 0x00008CF8 }, /* GL_COLOR_ATTACHMENT24 */ - { 57313, 0x00008CF9 }, /* GL_COLOR_ATTACHMENT25 */ - { 57335, 0x00008CFA }, /* GL_COLOR_ATTACHMENT26 */ - { 57357, 0x00008CFB }, /* GL_COLOR_ATTACHMENT27 */ - { 57379, 0x00008CFC }, /* GL_COLOR_ATTACHMENT28 */ - { 57401, 0x00008CFD }, /* GL_COLOR_ATTACHMENT29 */ - { 57423, 0x00008CFE }, /* GL_COLOR_ATTACHMENT30 */ - { 57445, 0x00008CFF }, /* GL_COLOR_ATTACHMENT31 */ - { 57467, 0x00008D00 }, /* GL_DEPTH_ATTACHMENT */ - { 57487, 0x00008D20 }, /* GL_STENCIL_ATTACHMENT */ - { 57509, 0x00008D40 }, /* GL_FRAMEBUFFER */ - { 57524, 0x00008D41 }, /* GL_RENDERBUFFER */ - { 57540, 0x00008D42 }, /* GL_RENDERBUFFER_WIDTH */ - { 57562, 0x00008D43 }, /* GL_RENDERBUFFER_HEIGHT */ - { 57585, 0x00008D44 }, /* GL_RENDERBUFFER_INTERNAL_FORMAT */ - { 57617, 0x00008D46 }, /* GL_STENCIL_INDEX1 */ - { 57635, 0x00008D47 }, /* GL_STENCIL_INDEX4 */ - { 57653, 0x00008D48 }, /* GL_STENCIL_INDEX8 */ - { 57671, 0x00008D49 }, /* GL_STENCIL_INDEX16 */ - { 57690, 0x00008D50 }, /* GL_RENDERBUFFER_RED_SIZE */ - { 57715, 0x00008D51 }, /* GL_RENDERBUFFER_GREEN_SIZE */ - { 57742, 0x00008D52 }, /* GL_RENDERBUFFER_BLUE_SIZE */ - { 57768, 0x00008D53 }, /* GL_RENDERBUFFER_ALPHA_SIZE */ - { 57795, 0x00008D54 }, /* GL_RENDERBUFFER_DEPTH_SIZE */ - { 57822, 0x00008D55 }, /* GL_RENDERBUFFER_STENCIL_SIZE */ - { 57851, 0x00008D56 }, /* GL_FRAMEBUFFER_INCOMPLETE_MULTISAMPLE */ - { 57889, 0x00008D57 }, /* GL_MAX_SAMPLES */ - { 57904, 0x00008D60 }, /* GL_TEXTURE_GEN_STR_OES */ - { 57927, 0x00008D61 }, /* GL_HALF_FLOAT_OES */ - { 57945, 0x00008D62 }, /* GL_RGB565 */ - { 57955, 0x00008D64 }, /* GL_ETC1_RGB8_OES */ - { 57972, 0x00008D65 }, /* GL_TEXTURE_EXTERNAL_OES */ - { 57996, 0x00008D66 }, /* GL_SAMPLER_EXTERNAL_OES */ - { 58020, 0x00008D67 }, /* GL_TEXTURE_BINDING_EXTERNAL_OES */ - { 58052, 0x00008D68 }, /* GL_REQUIRED_TEXTURE_IMAGE_UNITS_OES */ - { 58088, 0x00008D69 }, /* GL_PRIMITIVE_RESTART_FIXED_INDEX */ - { 58121, 0x00008D6A }, /* GL_ANY_SAMPLES_PASSED_CONSERVATIVE */ - { 58156, 0x00008D6B }, /* GL_MAX_ELEMENT_INDEX */ - { 58177, 0x00008D6C }, /* GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_SAMPLES_EXT */ - { 58223, 0x00008D70 }, /* GL_RGBA32UI */ - { 58235, 0x00008D71 }, /* GL_RGB32UI */ - { 58246, 0x00008D72 }, /* GL_ALPHA32UI_EXT */ - { 58263, 0x00008D73 }, /* GL_INTENSITY32UI_EXT */ - { 58284, 0x00008D74 }, /* GL_LUMINANCE32UI_EXT */ - { 58305, 0x00008D75 }, /* GL_LUMINANCE_ALPHA32UI_EXT */ - { 58332, 0x00008D76 }, /* GL_RGBA16UI */ - { 58344, 0x00008D77 }, /* GL_RGB16UI */ - { 58355, 0x00008D78 }, /* GL_ALPHA16UI_EXT */ - { 58372, 0x00008D79 }, /* GL_INTENSITY16UI_EXT */ - { 58393, 0x00008D7A }, /* GL_LUMINANCE16UI_EXT */ - { 58414, 0x00008D7B }, /* GL_LUMINANCE_ALPHA16UI_EXT */ - { 58441, 0x00008D7C }, /* GL_RGBA8UI */ - { 58452, 0x00008D7D }, /* GL_RGB8UI */ - { 58462, 0x00008D7E }, /* GL_ALPHA8UI_EXT */ - { 58478, 0x00008D7F }, /* GL_INTENSITY8UI_EXT */ - { 58498, 0x00008D80 }, /* GL_LUMINANCE8UI_EXT */ - { 58518, 0x00008D81 }, /* GL_LUMINANCE_ALPHA8UI_EXT */ - { 58544, 0x00008D82 }, /* GL_RGBA32I */ - { 58555, 0x00008D83 }, /* GL_RGB32I */ - { 58565, 0x00008D84 }, /* GL_ALPHA32I_EXT */ - { 58581, 0x00008D85 }, /* GL_INTENSITY32I_EXT */ - { 58601, 0x00008D86 }, /* GL_LUMINANCE32I_EXT */ - { 58621, 0x00008D87 }, /* GL_LUMINANCE_ALPHA32I_EXT */ - { 58647, 0x00008D88 }, /* GL_RGBA16I */ - { 58658, 0x00008D89 }, /* GL_RGB16I */ - { 58668, 0x00008D8A }, /* GL_ALPHA16I_EXT */ - { 58684, 0x00008D8B }, /* GL_INTENSITY16I_EXT */ - { 58704, 0x00008D8C }, /* GL_LUMINANCE16I_EXT */ - { 58724, 0x00008D8D }, /* GL_LUMINANCE_ALPHA16I_EXT */ - { 58750, 0x00008D8E }, /* GL_RGBA8I */ - { 58760, 0x00008D8F }, /* GL_RGB8I */ - { 58769, 0x00008D90 }, /* GL_ALPHA8I_EXT */ - { 58784, 0x00008D91 }, /* GL_INTENSITY8I_EXT */ - { 58803, 0x00008D92 }, /* GL_LUMINANCE8I_EXT */ - { 58822, 0x00008D93 }, /* GL_LUMINANCE_ALPHA8I_EXT */ - { 58847, 0x00008D94 }, /* GL_RED_INTEGER */ - { 58862, 0x00008D95 }, /* GL_GREEN_INTEGER */ - { 58879, 0x00008D96 }, /* GL_BLUE_INTEGER */ - { 58895, 0x00008D97 }, /* GL_ALPHA_INTEGER */ - { 58912, 0x00008D98 }, /* GL_RGB_INTEGER */ - { 58927, 0x00008D99 }, /* GL_RGBA_INTEGER */ - { 58943, 0x00008D9A }, /* GL_BGR_INTEGER */ - { 58958, 0x00008D9B }, /* GL_BGRA_INTEGER */ - { 58974, 0x00008D9C }, /* GL_LUMINANCE_INTEGER_EXT */ - { 58999, 0x00008D9D }, /* GL_LUMINANCE_ALPHA_INTEGER_EXT */ - { 59030, 0x00008D9E }, /* GL_RGBA_INTEGER_MODE_EXT */ - { 59055, 0x00008D9F }, /* GL_INT_2_10_10_10_REV */ - { 59077, 0x00008DA0 }, /* GL_MAX_PROGRAM_PARAMETER_BUFFER_BINDINGS_NV */ - { 59121, 0x00008DA1 }, /* GL_MAX_PROGRAM_PARAMETER_BUFFER_SIZE_NV */ - { 59161, 0x00008DA2 }, /* GL_VERTEX_PROGRAM_PARAMETER_BUFFER_NV */ - { 59199, 0x00008DA3 }, /* GL_GEOMETRY_PROGRAM_PARAMETER_BUFFER_NV */ - { 59239, 0x00008DA4 }, /* GL_FRAGMENT_PROGRAM_PARAMETER_BUFFER_NV */ - { 59279, 0x00008DA5 }, /* GL_MAX_PROGRAM_GENERIC_ATTRIBS_NV */ - { 59313, 0x00008DA6 }, /* GL_MAX_PROGRAM_GENERIC_RESULTS_NV */ - { 59347, 0x00008DA7 }, /* GL_FRAMEBUFFER_ATTACHMENT_LAYERED */ - { 59381, 0x00008DA8 }, /* GL_FRAMEBUFFER_INCOMPLETE_LAYER_TARGETS */ - { 59421, 0x00008DA9 }, /* GL_FRAMEBUFFER_INCOMPLETE_LAYER_COUNT_ARB */ - { 59463, 0x00008DAA }, /* GL_LAYER_NV */ - { 59475, 0x00008DAB }, /* GL_DEPTH_COMPONENT32F_NV */ - { 59500, 0x00008DAC }, /* GL_DEPTH32F_STENCIL8_NV */ - { 59524, 0x00008DAD }, /* GL_FLOAT_32_UNSIGNED_INT_24_8_REV */ - { 59558, 0x00008DAE }, /* GL_SHADER_INCLUDE_ARB */ - { 59580, 0x00008DAF }, /* GL_DEPTH_BUFFER_FLOAT_MODE_NV */ - { 59610, 0x00008DB9 }, /* GL_FRAMEBUFFER_SRGB */ - { 59630, 0x00008DBA }, /* GL_FRAMEBUFFER_SRGB_CAPABLE_EXT */ - { 59662, 0x00008DBB }, /* GL_COMPRESSED_RED_RGTC1 */ - { 59686, 0x00008DBC }, /* GL_COMPRESSED_SIGNED_RED_RGTC1 */ - { 59717, 0x00008DBD }, /* GL_COMPRESSED_RG_RGTC2 */ - { 59740, 0x00008DBE }, /* GL_COMPRESSED_SIGNED_RG_RGTC2 */ - { 59770, 0x00008DC0 }, /* GL_SAMPLER_1D_ARRAY */ - { 59790, 0x00008DC1 }, /* GL_SAMPLER_2D_ARRAY */ - { 59810, 0x00008DC2 }, /* GL_SAMPLER_BUFFER */ - { 59828, 0x00008DC3 }, /* GL_SAMPLER_1D_ARRAY_SHADOW */ - { 59855, 0x00008DC4 }, /* GL_SAMPLER_2D_ARRAY_SHADOW */ - { 59882, 0x00008DC5 }, /* GL_SAMPLER_CUBE_SHADOW */ - { 59905, 0x00008DC6 }, /* GL_UNSIGNED_INT_VEC2 */ - { 59926, 0x00008DC7 }, /* GL_UNSIGNED_INT_VEC3 */ - { 59947, 0x00008DC8 }, /* GL_UNSIGNED_INT_VEC4 */ - { 59968, 0x00008DC9 }, /* GL_INT_SAMPLER_1D */ - { 59986, 0x00008DCA }, /* GL_INT_SAMPLER_2D */ - { 60004, 0x00008DCB }, /* GL_INT_SAMPLER_3D */ - { 60022, 0x00008DCC }, /* GL_INT_SAMPLER_CUBE */ - { 60042, 0x00008DCD }, /* GL_INT_SAMPLER_2D_RECT */ - { 60065, 0x00008DCE }, /* GL_INT_SAMPLER_1D_ARRAY */ - { 60089, 0x00008DCF }, /* GL_INT_SAMPLER_2D_ARRAY */ - { 60113, 0x00008DD0 }, /* GL_INT_SAMPLER_BUFFER */ - { 60135, 0x00008DD1 }, /* GL_UNSIGNED_INT_SAMPLER_1D */ - { 60162, 0x00008DD2 }, /* GL_UNSIGNED_INT_SAMPLER_2D */ - { 60189, 0x00008DD3 }, /* GL_UNSIGNED_INT_SAMPLER_3D */ - { 60216, 0x00008DD4 }, /* GL_UNSIGNED_INT_SAMPLER_CUBE */ - { 60245, 0x00008DD5 }, /* GL_UNSIGNED_INT_SAMPLER_2D_RECT */ - { 60277, 0x00008DD6 }, /* GL_UNSIGNED_INT_SAMPLER_1D_ARRAY */ - { 60310, 0x00008DD7 }, /* GL_UNSIGNED_INT_SAMPLER_2D_ARRAY */ - { 60343, 0x00008DD8 }, /* GL_UNSIGNED_INT_SAMPLER_BUFFER */ - { 60374, 0x00008DD9 }, /* GL_GEOMETRY_SHADER */ - { 60393, 0x00008DDA }, /* GL_GEOMETRY_VERTICES_OUT_ARB */ - { 60422, 0x00008DDB }, /* GL_GEOMETRY_INPUT_TYPE_ARB */ - { 60449, 0x00008DDC }, /* GL_GEOMETRY_OUTPUT_TYPE_ARB */ - { 60477, 0x00008DDD }, /* GL_MAX_GEOMETRY_VARYING_COMPONENTS_ARB */ - { 60516, 0x00008DDE }, /* GL_MAX_VERTEX_VARYING_COMPONENTS_ARB */ - { 60553, 0x00008DDF }, /* GL_MAX_GEOMETRY_UNIFORM_COMPONENTS */ - { 60588, 0x00008DE0 }, /* GL_MAX_GEOMETRY_OUTPUT_VERTICES */ - { 60620, 0x00008DE1 }, /* GL_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS */ - { 60660, 0x00008DE2 }, /* GL_MAX_VERTEX_BINDABLE_UNIFORMS_EXT */ - { 60696, 0x00008DE3 }, /* GL_MAX_FRAGMENT_BINDABLE_UNIFORMS_EXT */ - { 60734, 0x00008DE4 }, /* GL_MAX_GEOMETRY_BINDABLE_UNIFORMS_EXT */ - { 60772, 0x00008DE5 }, /* GL_ACTIVE_SUBROUTINES */ - { 60794, 0x00008DE6 }, /* GL_ACTIVE_SUBROUTINE_UNIFORMS */ - { 60824, 0x00008DE7 }, /* GL_MAX_SUBROUTINES */ - { 60843, 0x00008DE8 }, /* GL_MAX_SUBROUTINE_UNIFORM_LOCATIONS */ - { 60879, 0x00008DE9 }, /* GL_NAMED_STRING_LENGTH_ARB */ - { 60906, 0x00008DEA }, /* GL_NAMED_STRING_TYPE_ARB */ - { 60931, 0x00008DED }, /* GL_MAX_BINDABLE_UNIFORM_SIZE_EXT */ - { 60964, 0x00008DEE }, /* GL_UNIFORM_BUFFER_EXT */ - { 60986, 0x00008DEF }, /* GL_UNIFORM_BUFFER_BINDING_EXT */ - { 61016, 0x00008DF0 }, /* GL_LOW_FLOAT */ - { 61029, 0x00008DF1 }, /* GL_MEDIUM_FLOAT */ - { 61045, 0x00008DF2 }, /* GL_HIGH_FLOAT */ - { 61059, 0x00008DF3 }, /* GL_LOW_INT */ - { 61070, 0x00008DF4 }, /* GL_MEDIUM_INT */ - { 61084, 0x00008DF5 }, /* GL_HIGH_INT */ - { 61096, 0x00008DF6 }, /* GL_UNSIGNED_INT_10_10_10_2_OES */ - { 61127, 0x00008DF7 }, /* GL_INT_10_10_10_2_OES */ - { 61149, 0x00008DF8 }, /* GL_SHADER_BINARY_FORMATS */ - { 61174, 0x00008DF9 }, /* GL_NUM_SHADER_BINARY_FORMATS */ - { 61203, 0x00008DFA }, /* GL_SHADER_COMPILER */ - { 61222, 0x00008DFB }, /* GL_MAX_VERTEX_UNIFORM_VECTORS */ - { 61252, 0x00008DFC }, /* GL_MAX_VARYING_VECTORS */ - { 61275, 0x00008DFD }, /* GL_MAX_FRAGMENT_UNIFORM_VECTORS */ - { 61307, 0x00008E10 }, /* GL_RENDERBUFFER_COLOR_SAMPLES_NV */ - { 61340, 0x00008E11 }, /* GL_MAX_MULTISAMPLE_COVERAGE_MODES_NV */ - { 61377, 0x00008E12 }, /* GL_MULTISAMPLE_COVERAGE_MODES_NV */ - { 61410, 0x00008E13 }, /* GL_QUERY_WAIT */ - { 61424, 0x00008E14 }, /* GL_QUERY_NO_WAIT */ - { 61441, 0x00008E15 }, /* GL_QUERY_BY_REGION_WAIT */ - { 61465, 0x00008E16 }, /* GL_QUERY_BY_REGION_NO_WAIT */ - { 61492, 0x00008E17 }, /* GL_QUERY_WAIT_INVERTED */ - { 61515, 0x00008E18 }, /* GL_QUERY_NO_WAIT_INVERTED */ - { 61541, 0x00008E19 }, /* GL_QUERY_BY_REGION_WAIT_INVERTED */ - { 61574, 0x00008E1A }, /* GL_QUERY_BY_REGION_NO_WAIT_INVERTED */ - { 61610, 0x00008E1B }, /* GL_POLYGON_OFFSET_CLAMP_EXT */ - { 61638, 0x00008E1E }, /* GL_MAX_COMBINED_TESS_CONTROL_UNIFORM_COMPONENTS */ - { 61686, 0x00008E1F }, /* GL_MAX_COMBINED_TESS_EVALUATION_UNIFORM_COMPONENTS */ - { 61737, 0x00008E20 }, /* GL_COLOR_SAMPLES_NV */ - { 61757, 0x00008E22 }, /* GL_TRANSFORM_FEEDBACK */ - { 61779, 0x00008E23 }, /* GL_TRANSFORM_FEEDBACK_PAUSED */ - { 61808, 0x00008E24 }, /* GL_TRANSFORM_FEEDBACK_ACTIVE */ - { 61837, 0x00008E25 }, /* GL_TRANSFORM_FEEDBACK_BINDING */ - { 61867, 0x00008E26 }, /* GL_FRAME_NV */ - { 61879, 0x00008E27 }, /* GL_FIELDS_NV */ - { 61892, 0x00008E28 }, /* GL_TIMESTAMP */ - { 61905, 0x00008E29 }, /* GL_NUM_FILL_STREAMS_NV */ - { 61928, 0x00008E2A }, /* GL_PRESENT_TIME_NV */ - { 61947, 0x00008E2B }, /* GL_PRESENT_DURATION_NV */ - { 61970, 0x00008E2C }, /* GL_DEPTH_COMPONENT16_NONLINEAR_NV */ - { 62004, 0x00008E2D }, /* GL_PROGRAM_MATRIX_EXT */ - { 62026, 0x00008E2E }, /* GL_TRANSPOSE_PROGRAM_MATRIX_EXT */ - { 62058, 0x00008E2F }, /* GL_PROGRAM_MATRIX_STACK_DEPTH_EXT */ - { 62092, 0x00008E42 }, /* GL_TEXTURE_SWIZZLE_R */ - { 62113, 0x00008E43 }, /* GL_TEXTURE_SWIZZLE_G */ - { 62134, 0x00008E44 }, /* GL_TEXTURE_SWIZZLE_B */ - { 62155, 0x00008E45 }, /* GL_TEXTURE_SWIZZLE_A */ - { 62176, 0x00008E46 }, /* GL_TEXTURE_SWIZZLE_RGBA */ - { 62200, 0x00008E47 }, /* GL_ACTIVE_SUBROUTINE_UNIFORM_LOCATIONS */ - { 62239, 0x00008E48 }, /* GL_ACTIVE_SUBROUTINE_MAX_LENGTH */ - { 62271, 0x00008E49 }, /* GL_ACTIVE_SUBROUTINE_UNIFORM_MAX_LENGTH */ - { 62311, 0x00008E4A }, /* GL_NUM_COMPATIBLE_SUBROUTINES */ - { 62341, 0x00008E4B }, /* GL_COMPATIBLE_SUBROUTINES */ - { 62367, 0x00008E4C }, /* GL_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION */ - { 62411, 0x00008E4D }, /* GL_FIRST_VERTEX_CONVENTION */ - { 62438, 0x00008E4E }, /* GL_LAST_VERTEX_CONVENTION */ - { 62464, 0x00008E4F }, /* GL_PROVOKING_VERTEX */ - { 62484, 0x00008E50 }, /* GL_SAMPLE_POSITION */ - { 62503, 0x00008E51 }, /* GL_SAMPLE_MASK */ - { 62518, 0x00008E52 }, /* GL_SAMPLE_MASK_VALUE */ - { 62539, 0x00008E53 }, /* GL_TEXTURE_BINDING_RENDERBUFFER_NV */ - { 62574, 0x00008E54 }, /* GL_TEXTURE_RENDERBUFFER_DATA_STORE_BINDING_NV */ - { 62620, 0x00008E55 }, /* GL_TEXTURE_RENDERBUFFER_NV */ - { 62647, 0x00008E56 }, /* GL_SAMPLER_RENDERBUFFER_NV */ - { 62674, 0x00008E57 }, /* GL_INT_SAMPLER_RENDERBUFFER_NV */ - { 62705, 0x00008E58 }, /* GL_UNSIGNED_INT_SAMPLER_RENDERBUFFER_NV */ - { 62745, 0x00008E59 }, /* GL_MAX_SAMPLE_MASK_WORDS */ - { 62770, 0x00008E5A }, /* GL_MAX_GEOMETRY_SHADER_INVOCATIONS */ - { 62805, 0x00008E5B }, /* GL_MIN_FRAGMENT_INTERPOLATION_OFFSET */ - { 62842, 0x00008E5C }, /* GL_MAX_FRAGMENT_INTERPOLATION_OFFSET */ - { 62879, 0x00008E5D }, /* GL_FRAGMENT_INTERPOLATION_OFFSET_BITS */ - { 62917, 0x00008E5E }, /* GL_MIN_PROGRAM_TEXTURE_GATHER_OFFSET */ - { 62954, 0x00008E5F }, /* GL_MAX_PROGRAM_TEXTURE_GATHER_OFFSET */ - { 62991, 0x00008E70 }, /* GL_MAX_TRANSFORM_FEEDBACK_BUFFERS */ - { 63025, 0x00008E71 }, /* GL_MAX_VERTEX_STREAMS */ - { 63047, 0x00008E72 }, /* GL_PATCH_VERTICES */ - { 63065, 0x00008E73 }, /* GL_PATCH_DEFAULT_INNER_LEVEL */ - { 63094, 0x00008E74 }, /* GL_PATCH_DEFAULT_OUTER_LEVEL */ - { 63123, 0x00008E75 }, /* GL_TESS_CONTROL_OUTPUT_VERTICES */ - { 63155, 0x00008E76 }, /* GL_TESS_GEN_MODE */ - { 63172, 0x00008E77 }, /* GL_TESS_GEN_SPACING */ - { 63192, 0x00008E78 }, /* GL_TESS_GEN_VERTEX_ORDER */ - { 63217, 0x00008E79 }, /* GL_TESS_GEN_POINT_MODE */ - { 63240, 0x00008E7A }, /* GL_ISOLINES */ - { 63252, 0x00008E7B }, /* GL_FRACTIONAL_ODD */ - { 63270, 0x00008E7C }, /* GL_FRACTIONAL_EVEN */ - { 63289, 0x00008E7D }, /* GL_MAX_PATCH_VERTICES */ - { 63311, 0x00008E7E }, /* GL_MAX_TESS_GEN_LEVEL */ - { 63333, 0x00008E7F }, /* GL_MAX_TESS_CONTROL_UNIFORM_COMPONENTS */ - { 63372, 0x00008E80 }, /* GL_MAX_TESS_EVALUATION_UNIFORM_COMPONENTS */ - { 63414, 0x00008E81 }, /* GL_MAX_TESS_CONTROL_TEXTURE_IMAGE_UNITS */ - { 63454, 0x00008E82 }, /* GL_MAX_TESS_EVALUATION_TEXTURE_IMAGE_UNITS */ - { 63497, 0x00008E83 }, /* GL_MAX_TESS_CONTROL_OUTPUT_COMPONENTS */ - { 63535, 0x00008E84 }, /* GL_MAX_TESS_PATCH_COMPONENTS */ - { 63564, 0x00008E85 }, /* GL_MAX_TESS_CONTROL_TOTAL_OUTPUT_COMPONENTS */ - { 63608, 0x00008E86 }, /* GL_MAX_TESS_EVALUATION_OUTPUT_COMPONENTS */ - { 63649, 0x00008E87 }, /* GL_TESS_EVALUATION_SHADER */ - { 63675, 0x00008E88 }, /* GL_TESS_CONTROL_SHADER */ - { 63698, 0x00008E89 }, /* GL_MAX_TESS_CONTROL_UNIFORM_BLOCKS */ - { 63733, 0x00008E8A }, /* GL_MAX_TESS_EVALUATION_UNIFORM_BLOCKS */ - { 63771, 0x00008E8C }, /* GL_COMPRESSED_RGBA_BPTC_UNORM */ - { 63801, 0x00008E8D }, /* GL_COMPRESSED_SRGB_ALPHA_BPTC_UNORM */ - { 63837, 0x00008E8E }, /* GL_COMPRESSED_RGB_BPTC_SIGNED_FLOAT */ - { 63873, 0x00008E8F }, /* GL_COMPRESSED_RGB_BPTC_UNSIGNED_FLOAT */ - { 63911, 0x00008ED0 }, /* GL_COVERAGE_COMPONENT_NV */ - { 63936, 0x00008ED1 }, /* GL_COVERAGE_COMPONENT4_NV */ - { 63962, 0x00008ED2 }, /* GL_COVERAGE_ATTACHMENT_NV */ - { 63988, 0x00008ED3 }, /* GL_COVERAGE_BUFFERS_NV */ - { 64011, 0x00008ED4 }, /* GL_COVERAGE_SAMPLES_NV */ - { 64034, 0x00008ED5 }, /* GL_COVERAGE_ALL_FRAGMENTS_NV */ - { 64063, 0x00008ED6 }, /* GL_COVERAGE_EDGE_FRAGMENTS_NV */ - { 64093, 0x00008ED7 }, /* GL_COVERAGE_AUTOMATIC_NV */ - { 64118, 0x00008F1D }, /* GL_BUFFER_GPU_ADDRESS_NV */ - { 64143, 0x00008F1E }, /* GL_VERTEX_ATTRIB_ARRAY_UNIFIED_NV */ - { 64177, 0x00008F1F }, /* GL_ELEMENT_ARRAY_UNIFIED_NV */ - { 64205, 0x00008F20 }, /* GL_VERTEX_ATTRIB_ARRAY_ADDRESS_NV */ - { 64239, 0x00008F21 }, /* GL_VERTEX_ARRAY_ADDRESS_NV */ - { 64266, 0x00008F22 }, /* GL_NORMAL_ARRAY_ADDRESS_NV */ - { 64293, 0x00008F23 }, /* GL_COLOR_ARRAY_ADDRESS_NV */ - { 64319, 0x00008F24 }, /* GL_INDEX_ARRAY_ADDRESS_NV */ - { 64345, 0x00008F25 }, /* GL_TEXTURE_COORD_ARRAY_ADDRESS_NV */ - { 64379, 0x00008F26 }, /* GL_EDGE_FLAG_ARRAY_ADDRESS_NV */ - { 64409, 0x00008F27 }, /* GL_SECONDARY_COLOR_ARRAY_ADDRESS_NV */ - { 64445, 0x00008F28 }, /* GL_FOG_COORD_ARRAY_ADDRESS_NV */ - { 64475, 0x00008F29 }, /* GL_ELEMENT_ARRAY_ADDRESS_NV */ - { 64503, 0x00008F2A }, /* GL_VERTEX_ATTRIB_ARRAY_LENGTH_NV */ - { 64536, 0x00008F2B }, /* GL_VERTEX_ARRAY_LENGTH_NV */ - { 64562, 0x00008F2C }, /* GL_NORMAL_ARRAY_LENGTH_NV */ - { 64588, 0x00008F2D }, /* GL_COLOR_ARRAY_LENGTH_NV */ - { 64613, 0x00008F2E }, /* GL_INDEX_ARRAY_LENGTH_NV */ - { 64638, 0x00008F2F }, /* GL_TEXTURE_COORD_ARRAY_LENGTH_NV */ - { 64671, 0x00008F30 }, /* GL_EDGE_FLAG_ARRAY_LENGTH_NV */ - { 64700, 0x00008F31 }, /* GL_SECONDARY_COLOR_ARRAY_LENGTH_NV */ - { 64735, 0x00008F32 }, /* GL_FOG_COORD_ARRAY_LENGTH_NV */ - { 64764, 0x00008F33 }, /* GL_ELEMENT_ARRAY_LENGTH_NV */ - { 64791, 0x00008F34 }, /* GL_GPU_ADDRESS_NV */ - { 64809, 0x00008F35 }, /* GL_MAX_SHADER_BUFFER_ADDRESS_NV */ - { 64841, 0x00008F36 }, /* GL_COPY_READ_BUFFER_BINDING */ - { 64869, 0x00008F37 }, /* GL_COPY_WRITE_BUFFER_BINDING */ - { 64898, 0x00008F38 }, /* GL_MAX_IMAGE_UNITS */ - { 64917, 0x00008F39 }, /* GL_MAX_COMBINED_SHADER_OUTPUT_RESOURCES */ - { 64957, 0x00008F3A }, /* GL_IMAGE_BINDING_NAME */ - { 64979, 0x00008F3B }, /* GL_IMAGE_BINDING_LEVEL */ - { 65002, 0x00008F3C }, /* GL_IMAGE_BINDING_LAYERED */ - { 65027, 0x00008F3D }, /* GL_IMAGE_BINDING_LAYER */ - { 65050, 0x00008F3E }, /* GL_IMAGE_BINDING_ACCESS */ - { 65074, 0x00008F3F }, /* GL_DRAW_INDIRECT_BUFFER */ - { 65098, 0x00008F40 }, /* GL_DRAW_INDIRECT_UNIFIED_NV */ - { 65126, 0x00008F41 }, /* GL_DRAW_INDIRECT_ADDRESS_NV */ - { 65154, 0x00008F42 }, /* GL_DRAW_INDIRECT_LENGTH_NV */ - { 65181, 0x00008F43 }, /* GL_DRAW_INDIRECT_BUFFER_BINDING */ - { 65213, 0x00008F44 }, /* GL_MAX_PROGRAM_SUBROUTINE_PARAMETERS_NV */ - { 65253, 0x00008F45 }, /* GL_MAX_PROGRAM_SUBROUTINE_NUM_NV */ - { 65286, 0x00008F46 }, /* GL_DOUBLE_MAT2 */ - { 65301, 0x00008F47 }, /* GL_DOUBLE_MAT3 */ - { 65316, 0x00008F48 }, /* GL_DOUBLE_MAT4 */ - { 65331, 0x00008F49 }, /* GL_DOUBLE_MAT2x3 */ - { 65348, 0x00008F4A }, /* GL_DOUBLE_MAT2x4 */ - { 65365, 0x00008F4B }, /* GL_DOUBLE_MAT3x2 */ - { 65382, 0x00008F4C }, /* GL_DOUBLE_MAT3x4 */ - { 65399, 0x00008F4D }, /* GL_DOUBLE_MAT4x2 */ - { 65416, 0x00008F4E }, /* GL_DOUBLE_MAT4x3 */ - { 65433, 0x00008F4F }, /* GL_VERTEX_BINDING_BUFFER */ - { 65458, 0x00008F60 }, /* GL_MALI_SHADER_BINARY_ARM */ - { 65484, 0x00008F61 }, /* GL_MALI_PROGRAM_BINARY_ARM */ - { 65511, 0x00008F63 }, /* GL_MAX_SHADER_PIXEL_LOCAL_STORAGE_FAST_SIZE_EXT */ - { 65559, 0x00008F64 }, /* GL_SHADER_PIXEL_LOCAL_STORAGE_EXT */ - { 65593, 0x00008F65 }, /* GL_FETCH_PER_SAMPLE_ARM */ - { 65617, 0x00008F66 }, /* GL_FRAGMENT_SHADER_FRAMEBUFFER_FETCH_MRT_ARM */ - { 65662, 0x00008F67 }, /* GL_MAX_SHADER_PIXEL_LOCAL_STORAGE_SIZE_EXT */ - { 65705, 0x00008F90 }, /* GL_RED_SNORM */ - { 65718, 0x00008F91 }, /* GL_RG_SNORM */ - { 65730, 0x00008F92 }, /* GL_RGB_SNORM */ - { 65743, 0x00008F93 }, /* GL_RGBA_SNORM */ - { 65757, 0x00008F94 }, /* GL_R8_SNORM */ - { 65769, 0x00008F95 }, /* GL_RG8_SNORM */ - { 65782, 0x00008F96 }, /* GL_RGB8_SNORM */ - { 65796, 0x00008F97 }, /* GL_RGBA8_SNORM */ - { 65811, 0x00008F98 }, /* GL_R16_SNORM */ - { 65824, 0x00008F99 }, /* GL_RG16_SNORM */ - { 65838, 0x00008F9A }, /* GL_RGB16_SNORM */ - { 65853, 0x00008F9B }, /* GL_RGBA16_SNORM */ - { 65869, 0x00008F9C }, /* GL_SIGNED_NORMALIZED */ - { 65890, 0x00008F9D }, /* GL_PRIMITIVE_RESTART */ - { 65911, 0x00008F9E }, /* GL_PRIMITIVE_RESTART_INDEX */ - { 65938, 0x00008F9F }, /* GL_MAX_PROGRAM_TEXTURE_GATHER_COMPONENTS_ARB */ - { 65983, 0x00008FA0 }, /* GL_PERFMON_GLOBAL_MODE_QCOM */ - { 66011, 0x00008FB0 }, /* GL_BINNING_CONTROL_HINT_QCOM */ - { 66040, 0x00008FB1 }, /* GL_CPU_OPTIMIZED_QCOM */ - { 66062, 0x00008FB2 }, /* GL_GPU_OPTIMIZED_QCOM */ - { 66084, 0x00008FB3 }, /* GL_RENDER_DIRECT_TO_FRAMEBUFFER_QCOM */ - { 66121, 0x00008FBB }, /* GL_GPU_DISJOINT_EXT */ - { 66141, 0x00008FBD }, /* GL_SR8_EXT */ - { 66152, 0x00008FBE }, /* GL_SRG8_EXT */ - { 66164, 0x00008FC4 }, /* GL_SHADER_BINARY_VIV */ - { 66185, 0x00008FE0 }, /* GL_INT8_NV */ - { 66196, 0x00008FE1 }, /* GL_INT8_VEC2_NV */ - { 66212, 0x00008FE2 }, /* GL_INT8_VEC3_NV */ - { 66228, 0x00008FE3 }, /* GL_INT8_VEC4_NV */ - { 66244, 0x00008FE4 }, /* GL_INT16_NV */ - { 66256, 0x00008FE5 }, /* GL_INT16_VEC2_NV */ - { 66273, 0x00008FE6 }, /* GL_INT16_VEC3_NV */ - { 66290, 0x00008FE7 }, /* GL_INT16_VEC4_NV */ - { 66307, 0x00008FE9 }, /* GL_INT64_VEC2_NV */ - { 66324, 0x00008FEA }, /* GL_INT64_VEC3_NV */ - { 66341, 0x00008FEB }, /* GL_INT64_VEC4_NV */ - { 66358, 0x00008FEC }, /* GL_UNSIGNED_INT8_NV */ - { 66378, 0x00008FED }, /* GL_UNSIGNED_INT8_VEC2_NV */ - { 66403, 0x00008FEE }, /* GL_UNSIGNED_INT8_VEC3_NV */ - { 66428, 0x00008FEF }, /* GL_UNSIGNED_INT8_VEC4_NV */ - { 66453, 0x00008FF0 }, /* GL_UNSIGNED_INT16_NV */ - { 66474, 0x00008FF1 }, /* GL_UNSIGNED_INT16_VEC2_NV */ - { 66500, 0x00008FF2 }, /* GL_UNSIGNED_INT16_VEC3_NV */ - { 66526, 0x00008FF3 }, /* GL_UNSIGNED_INT16_VEC4_NV */ - { 66552, 0x00008FF5 }, /* GL_UNSIGNED_INT64_VEC2_NV */ - { 66578, 0x00008FF6 }, /* GL_UNSIGNED_INT64_VEC3_NV */ - { 66604, 0x00008FF7 }, /* GL_UNSIGNED_INT64_VEC4_NV */ - { 66630, 0x00008FF8 }, /* GL_FLOAT16_NV */ - { 66644, 0x00008FF9 }, /* GL_FLOAT16_VEC2_NV */ - { 66663, 0x00008FFA }, /* GL_FLOAT16_VEC3_NV */ - { 66682, 0x00008FFB }, /* GL_FLOAT16_VEC4_NV */ - { 66701, 0x00008FFC }, /* GL_DOUBLE_VEC2 */ - { 66716, 0x00008FFD }, /* GL_DOUBLE_VEC3 */ - { 66731, 0x00008FFE }, /* GL_DOUBLE_VEC4 */ - { 66746, 0x00009001 }, /* GL_SAMPLER_BUFFER_AMD */ - { 66768, 0x00009002 }, /* GL_INT_SAMPLER_BUFFER_AMD */ - { 66794, 0x00009003 }, /* GL_UNSIGNED_INT_SAMPLER_BUFFER_AMD */ - { 66829, 0x00009004 }, /* GL_TESSELLATION_MODE_AMD */ - { 66854, 0x00009005 }, /* GL_TESSELLATION_FACTOR_AMD */ - { 66881, 0x00009006 }, /* GL_DISCRETE_AMD */ - { 66897, 0x00009007 }, /* GL_CONTINUOUS_AMD */ - { 66915, 0x00009009 }, /* GL_TEXTURE_CUBE_MAP_ARRAY */ - { 66941, 0x0000900A }, /* GL_TEXTURE_BINDING_CUBE_MAP_ARRAY */ - { 66975, 0x0000900B }, /* GL_PROXY_TEXTURE_CUBE_MAP_ARRAY */ - { 67007, 0x0000900C }, /* GL_SAMPLER_CUBE_MAP_ARRAY */ - { 67033, 0x0000900D }, /* GL_SAMPLER_CUBE_MAP_ARRAY_SHADOW */ - { 67066, 0x0000900E }, /* GL_INT_SAMPLER_CUBE_MAP_ARRAY */ - { 67096, 0x0000900F }, /* GL_UNSIGNED_INT_SAMPLER_CUBE_MAP_ARRAY */ - { 67135, 0x00009010 }, /* GL_ALPHA_SNORM */ - { 67150, 0x00009011 }, /* GL_LUMINANCE_SNORM */ - { 67169, 0x00009012 }, /* GL_LUMINANCE_ALPHA_SNORM */ - { 67194, 0x00009013 }, /* GL_INTENSITY_SNORM */ - { 67213, 0x00009014 }, /* GL_ALPHA8_SNORM */ - { 67229, 0x00009015 }, /* GL_LUMINANCE8_SNORM */ - { 67249, 0x00009016 }, /* GL_LUMINANCE8_ALPHA8_SNORM */ - { 67276, 0x00009017 }, /* GL_INTENSITY8_SNORM */ - { 67296, 0x00009018 }, /* GL_ALPHA16_SNORM */ - { 67313, 0x00009019 }, /* GL_LUMINANCE16_SNORM */ - { 67334, 0x0000901A }, /* GL_LUMINANCE16_ALPHA16_SNORM */ - { 67363, 0x0000901B }, /* GL_INTENSITY16_SNORM */ - { 67384, 0x0000901C }, /* GL_FACTOR_MIN_AMD */ - { 67402, 0x0000901D }, /* GL_FACTOR_MAX_AMD */ - { 67420, 0x0000901E }, /* GL_DEPTH_CLAMP_NEAR_AMD */ - { 67444, 0x0000901F }, /* GL_DEPTH_CLAMP_FAR_AMD */ - { 67467, 0x00009020 }, /* GL_VIDEO_BUFFER_NV */ - { 67486, 0x00009021 }, /* GL_VIDEO_BUFFER_BINDING_NV */ - { 67513, 0x00009022 }, /* GL_FIELD_UPPER_NV */ - { 67531, 0x00009023 }, /* GL_FIELD_LOWER_NV */ - { 67549, 0x00009024 }, /* GL_NUM_VIDEO_CAPTURE_STREAMS_NV */ - { 67581, 0x00009025 }, /* GL_NEXT_VIDEO_CAPTURE_BUFFER_STATUS_NV */ - { 67620, 0x00009026 }, /* GL_VIDEO_CAPTURE_TO_422_SUPPORTED_NV */ - { 67657, 0x00009027 }, /* GL_LAST_VIDEO_CAPTURE_STATUS_NV */ - { 67689, 0x00009028 }, /* GL_VIDEO_BUFFER_PITCH_NV */ - { 67714, 0x00009029 }, /* GL_VIDEO_COLOR_CONVERSION_MATRIX_NV */ - { 67750, 0x0000902A }, /* GL_VIDEO_COLOR_CONVERSION_MAX_NV */ - { 67783, 0x0000902B }, /* GL_VIDEO_COLOR_CONVERSION_MIN_NV */ - { 67816, 0x0000902C }, /* GL_VIDEO_COLOR_CONVERSION_OFFSET_NV */ - { 67852, 0x0000902D }, /* GL_VIDEO_BUFFER_INTERNAL_FORMAT_NV */ - { 67887, 0x0000902E }, /* GL_PARTIAL_SUCCESS_NV */ - { 67909, 0x0000902F }, /* GL_SUCCESS_NV */ - { 67923, 0x00009030 }, /* GL_FAILURE_NV */ - { 67937, 0x00009031 }, /* GL_YCBYCR8_422_NV */ - { 67955, 0x00009032 }, /* GL_YCBAYCR8A_4224_NV */ - { 67976, 0x00009033 }, /* GL_Z6Y10Z6CB10Z6Y10Z6CR10_422_NV */ - { 68009, 0x00009034 }, /* GL_Z6Y10Z6CB10Z6A10Z6Y10Z6CR10Z6A10_4224_NV */ - { 68053, 0x00009035 }, /* GL_Z4Y12Z4CB12Z4Y12Z4CR12_422_NV */ - { 68086, 0x00009036 }, /* GL_Z4Y12Z4CB12Z4A12Z4Y12Z4CR12Z4A12_4224_NV */ - { 68130, 0x00009037 }, /* GL_Z4Y12Z4CB12Z4CR12_444_NV */ - { 68158, 0x00009038 }, /* GL_VIDEO_CAPTURE_FRAME_WIDTH_NV */ - { 68190, 0x00009039 }, /* GL_VIDEO_CAPTURE_FRAME_HEIGHT_NV */ - { 68223, 0x0000903A }, /* GL_VIDEO_CAPTURE_FIELD_UPPER_HEIGHT_NV */ - { 68262, 0x0000903B }, /* GL_VIDEO_CAPTURE_FIELD_LOWER_HEIGHT_NV */ - { 68301, 0x0000903C }, /* GL_VIDEO_CAPTURE_SURFACE_ORIGIN_NV */ - { 68336, 0x00009045 }, /* GL_TEXTURE_COVERAGE_SAMPLES_NV */ - { 68367, 0x00009046 }, /* GL_TEXTURE_COLOR_SAMPLES_NV */ - { 68395, 0x00009047 }, /* GL_GPU_MEMORY_INFO_DEDICATED_VIDMEM_NVX */ - { 68435, 0x00009048 }, /* GL_GPU_MEMORY_INFO_TOTAL_AVAILABLE_MEMORY_NVX */ - { 68481, 0x00009049 }, /* GL_GPU_MEMORY_INFO_CURRENT_AVAILABLE_VIDMEM_NVX */ - { 68529, 0x0000904A }, /* GL_GPU_MEMORY_INFO_EVICTION_COUNT_NVX */ - { 68567, 0x0000904B }, /* GL_GPU_MEMORY_INFO_EVICTED_MEMORY_NVX */ - { 68605, 0x0000904C }, /* GL_IMAGE_1D */ - { 68617, 0x0000904D }, /* GL_IMAGE_2D */ - { 68629, 0x0000904E }, /* GL_IMAGE_3D */ - { 68641, 0x0000904F }, /* GL_IMAGE_2D_RECT */ - { 68658, 0x00009050 }, /* GL_IMAGE_CUBE */ - { 68672, 0x00009051 }, /* GL_IMAGE_BUFFER */ - { 68688, 0x00009052 }, /* GL_IMAGE_1D_ARRAY */ - { 68706, 0x00009053 }, /* GL_IMAGE_2D_ARRAY */ - { 68724, 0x00009054 }, /* GL_IMAGE_CUBE_MAP_ARRAY */ - { 68748, 0x00009055 }, /* GL_IMAGE_2D_MULTISAMPLE */ - { 68772, 0x00009056 }, /* GL_IMAGE_2D_MULTISAMPLE_ARRAY */ - { 68802, 0x00009057 }, /* GL_INT_IMAGE_1D */ - { 68818, 0x00009058 }, /* GL_INT_IMAGE_2D */ - { 68834, 0x00009059 }, /* GL_INT_IMAGE_3D */ - { 68850, 0x0000905A }, /* GL_INT_IMAGE_2D_RECT */ - { 68871, 0x0000905B }, /* GL_INT_IMAGE_CUBE */ - { 68889, 0x0000905C }, /* GL_INT_IMAGE_BUFFER */ - { 68909, 0x0000905D }, /* GL_INT_IMAGE_1D_ARRAY */ - { 68931, 0x0000905E }, /* GL_INT_IMAGE_2D_ARRAY */ - { 68953, 0x0000905F }, /* GL_INT_IMAGE_CUBE_MAP_ARRAY */ - { 68981, 0x00009060 }, /* GL_INT_IMAGE_2D_MULTISAMPLE */ - { 69009, 0x00009061 }, /* GL_INT_IMAGE_2D_MULTISAMPLE_ARRAY */ - { 69043, 0x00009062 }, /* GL_UNSIGNED_INT_IMAGE_1D */ - { 69068, 0x00009063 }, /* GL_UNSIGNED_INT_IMAGE_2D */ - { 69093, 0x00009064 }, /* GL_UNSIGNED_INT_IMAGE_3D */ - { 69118, 0x00009065 }, /* GL_UNSIGNED_INT_IMAGE_2D_RECT */ - { 69148, 0x00009066 }, /* GL_UNSIGNED_INT_IMAGE_CUBE */ - { 69175, 0x00009067 }, /* GL_UNSIGNED_INT_IMAGE_BUFFER */ - { 69204, 0x00009068 }, /* GL_UNSIGNED_INT_IMAGE_1D_ARRAY */ - { 69235, 0x00009069 }, /* GL_UNSIGNED_INT_IMAGE_2D_ARRAY */ - { 69266, 0x0000906A }, /* GL_UNSIGNED_INT_IMAGE_CUBE_MAP_ARRAY */ - { 69303, 0x0000906B }, /* GL_UNSIGNED_INT_IMAGE_2D_MULTISAMPLE */ - { 69340, 0x0000906C }, /* GL_UNSIGNED_INT_IMAGE_2D_MULTISAMPLE_ARRAY */ - { 69383, 0x0000906D }, /* GL_MAX_IMAGE_SAMPLES */ - { 69404, 0x0000906E }, /* GL_IMAGE_BINDING_FORMAT */ - { 69428, 0x0000906F }, /* GL_RGB10_A2UI */ - { 69442, 0x00009070 }, /* GL_PATH_FORMAT_SVG_NV */ - { 69464, 0x00009071 }, /* GL_PATH_FORMAT_PS_NV */ - { 69485, 0x00009072 }, /* GL_STANDARD_FONT_NAME_NV */ - { 69510, 0x00009073 }, /* GL_SYSTEM_FONT_NAME_NV */ - { 69533, 0x00009074 }, /* GL_FILE_NAME_NV */ - { 69549, 0x00009075 }, /* GL_PATH_STROKE_WIDTH_NV */ - { 69573, 0x00009076 }, /* GL_PATH_END_CAPS_NV */ - { 69593, 0x00009077 }, /* GL_PATH_INITIAL_END_CAP_NV */ - { 69620, 0x00009078 }, /* GL_PATH_TERMINAL_END_CAP_NV */ - { 69648, 0x00009079 }, /* GL_PATH_JOIN_STYLE_NV */ - { 69670, 0x0000907A }, /* GL_PATH_MITER_LIMIT_NV */ - { 69693, 0x0000907B }, /* GL_PATH_DASH_CAPS_NV */ - { 69714, 0x0000907C }, /* GL_PATH_INITIAL_DASH_CAP_NV */ - { 69742, 0x0000907D }, /* GL_PATH_TERMINAL_DASH_CAP_NV */ - { 69771, 0x0000907E }, /* GL_PATH_DASH_OFFSET_NV */ - { 69794, 0x0000907F }, /* GL_PATH_CLIENT_LENGTH_NV */ - { 69819, 0x00009080 }, /* GL_PATH_FILL_MODE_NV */ - { 69840, 0x00009081 }, /* GL_PATH_FILL_MASK_NV */ - { 69861, 0x00009082 }, /* GL_PATH_FILL_COVER_MODE_NV */ - { 69888, 0x00009083 }, /* GL_PATH_STROKE_COVER_MODE_NV */ - { 69917, 0x00009084 }, /* GL_PATH_STROKE_MASK_NV */ - { 69940, 0x00009088 }, /* GL_COUNT_UP_NV */ - { 69955, 0x00009089 }, /* GL_COUNT_DOWN_NV */ - { 69972, 0x0000908A }, /* GL_PATH_OBJECT_BOUNDING_BOX_NV */ - { 70003, 0x0000908B }, /* GL_CONVEX_HULL_NV */ - { 70021, 0x0000908D }, /* GL_BOUNDING_BOX_NV */ - { 70040, 0x0000908E }, /* GL_TRANSLATE_X_NV */ - { 70058, 0x0000908F }, /* GL_TRANSLATE_Y_NV */ - { 70076, 0x00009090 }, /* GL_TRANSLATE_2D_NV */ - { 70095, 0x00009091 }, /* GL_TRANSLATE_3D_NV */ - { 70114, 0x00009092 }, /* GL_AFFINE_2D_NV */ - { 70130, 0x00009094 }, /* GL_AFFINE_3D_NV */ - { 70146, 0x00009096 }, /* GL_TRANSPOSE_AFFINE_2D_NV */ - { 70172, 0x00009098 }, /* GL_TRANSPOSE_AFFINE_3D_NV */ - { 70198, 0x0000909A }, /* GL_UTF8_NV */ - { 70209, 0x0000909B }, /* GL_UTF16_NV */ - { 70221, 0x0000909C }, /* GL_BOUNDING_BOX_OF_BOUNDING_BOXES_NV */ - { 70258, 0x0000909D }, /* GL_PATH_COMMAND_COUNT_NV */ - { 70283, 0x0000909E }, /* GL_PATH_COORD_COUNT_NV */ - { 70306, 0x0000909F }, /* GL_PATH_DASH_ARRAY_COUNT_NV */ - { 70334, 0x000090A0 }, /* GL_PATH_COMPUTED_LENGTH_NV */ - { 70361, 0x000090A1 }, /* GL_PATH_FILL_BOUNDING_BOX_NV */ - { 70390, 0x000090A2 }, /* GL_PATH_STROKE_BOUNDING_BOX_NV */ - { 70421, 0x000090A3 }, /* GL_SQUARE_NV */ - { 70434, 0x000090A4 }, /* GL_ROUND_NV */ - { 70446, 0x000090A5 }, /* GL_TRIANGULAR_NV */ - { 70463, 0x000090A6 }, /* GL_BEVEL_NV */ - { 70475, 0x000090A7 }, /* GL_MITER_REVERT_NV */ - { 70494, 0x000090A8 }, /* GL_MITER_TRUNCATE_NV */ - { 70515, 0x000090A9 }, /* GL_SKIP_MISSING_GLYPH_NV */ - { 70540, 0x000090AA }, /* GL_USE_MISSING_GLYPH_NV */ - { 70564, 0x000090AB }, /* GL_PATH_ERROR_POSITION_NV */ - { 70590, 0x000090AC }, /* GL_PATH_FOG_GEN_MODE_NV */ - { 70614, 0x000090AD }, /* GL_ACCUM_ADJACENT_PAIRS_NV */ - { 70641, 0x000090AE }, /* GL_ADJACENT_PAIRS_NV */ - { 70662, 0x000090AF }, /* GL_FIRST_TO_REST_NV */ - { 70682, 0x000090B0 }, /* GL_PATH_GEN_MODE_NV */ - { 70702, 0x000090B1 }, /* GL_PATH_GEN_COEFF_NV */ - { 70723, 0x000090B2 }, /* GL_PATH_GEN_COLOR_FORMAT_NV */ - { 70751, 0x000090B3 }, /* GL_PATH_GEN_COMPONENTS_NV */ - { 70777, 0x000090B4 }, /* GL_PATH_DASH_OFFSET_RESET_NV */ - { 70806, 0x000090B5 }, /* GL_MOVE_TO_RESETS_NV */ - { 70827, 0x000090B6 }, /* GL_MOVE_TO_CONTINUES_NV */ - { 70851, 0x000090B7 }, /* GL_PATH_STENCIL_FUNC_NV */ - { 70875, 0x000090B8 }, /* GL_PATH_STENCIL_REF_NV */ - { 70898, 0x000090B9 }, /* GL_PATH_STENCIL_VALUE_MASK_NV */ - { 70928, 0x000090BA }, /* GL_SCALED_RESOLVE_FASTEST_EXT */ - { 70958, 0x000090BB }, /* GL_SCALED_RESOLVE_NICEST_EXT */ - { 70987, 0x000090BC }, /* GL_MIN_MAP_BUFFER_ALIGNMENT */ - { 71015, 0x000090BD }, /* GL_PATH_STENCIL_DEPTH_OFFSET_FACTOR_NV */ - { 71054, 0x000090BE }, /* GL_PATH_STENCIL_DEPTH_OFFSET_UNITS_NV */ - { 71092, 0x000090BF }, /* GL_PATH_COVER_DEPTH_FUNC_NV */ - { 71120, 0x000090C7 }, /* GL_IMAGE_FORMAT_COMPATIBILITY_TYPE */ - { 71155, 0x000090C8 }, /* GL_IMAGE_FORMAT_COMPATIBILITY_BY_SIZE */ - { 71193, 0x000090C9 }, /* GL_IMAGE_FORMAT_COMPATIBILITY_BY_CLASS */ - { 71232, 0x000090CA }, /* GL_MAX_VERTEX_IMAGE_UNIFORMS */ - { 71261, 0x000090CB }, /* GL_MAX_TESS_CONTROL_IMAGE_UNIFORMS */ - { 71296, 0x000090CC }, /* GL_MAX_TESS_EVALUATION_IMAGE_UNIFORMS */ - { 71334, 0x000090CD }, /* GL_MAX_GEOMETRY_IMAGE_UNIFORMS */ - { 71365, 0x000090CE }, /* GL_MAX_FRAGMENT_IMAGE_UNIFORMS */ - { 71396, 0x000090CF }, /* GL_MAX_COMBINED_IMAGE_UNIFORMS */ - { 71427, 0x000090D0 }, /* GL_MAX_DEEP_3D_TEXTURE_WIDTH_HEIGHT_NV */ - { 71466, 0x000090D1 }, /* GL_MAX_DEEP_3D_TEXTURE_DEPTH_NV */ - { 71498, 0x000090D2 }, /* GL_SHADER_STORAGE_BUFFER */ - { 71523, 0x000090D3 }, /* GL_SHADER_STORAGE_BUFFER_BINDING */ - { 71556, 0x000090D4 }, /* GL_SHADER_STORAGE_BUFFER_START */ - { 71587, 0x000090D5 }, /* GL_SHADER_STORAGE_BUFFER_SIZE */ - { 71617, 0x000090D6 }, /* GL_MAX_VERTEX_SHADER_STORAGE_BLOCKS */ - { 71653, 0x000090D7 }, /* GL_MAX_GEOMETRY_SHADER_STORAGE_BLOCKS */ - { 71691, 0x000090D8 }, /* GL_MAX_TESS_CONTROL_SHADER_STORAGE_BLOCKS */ - { 71733, 0x000090D9 }, /* GL_MAX_TESS_EVALUATION_SHADER_STORAGE_BLOCKS */ - { 71778, 0x000090DA }, /* GL_MAX_FRAGMENT_SHADER_STORAGE_BLOCKS */ - { 71816, 0x000090DB }, /* GL_MAX_COMPUTE_SHADER_STORAGE_BLOCKS */ - { 71853, 0x000090DC }, /* GL_MAX_COMBINED_SHADER_STORAGE_BLOCKS */ - { 71891, 0x000090DD }, /* GL_MAX_SHADER_STORAGE_BUFFER_BINDINGS */ - { 71929, 0x000090DE }, /* GL_MAX_SHADER_STORAGE_BLOCK_SIZE */ - { 71962, 0x000090DF }, /* GL_SHADER_STORAGE_BUFFER_OFFSET_ALIGNMENT */ - { 72004, 0x000090E1 }, /* GL_SYNC_X11_FENCE_EXT */ - { 72026, 0x000090EA }, /* GL_DEPTH_STENCIL_TEXTURE_MODE */ - { 72056, 0x000090EB }, /* GL_MAX_COMPUTE_WORK_GROUP_INVOCATIONS */ - { 72094, 0x000090EC }, /* GL_UNIFORM_BLOCK_REFERENCED_BY_COMPUTE_SHADER */ - { 72140, 0x000090ED }, /* GL_ATOMIC_COUNTER_BUFFER_REFERENCED_BY_COMPUTE_SHADER */ - { 72194, 0x000090EE }, /* GL_DISPATCH_INDIRECT_BUFFER */ - { 72222, 0x000090EF }, /* GL_DISPATCH_INDIRECT_BUFFER_BINDING */ - { 72258, 0x000090F0 }, /* GL_COLOR_ATTACHMENT_EXT */ - { 72282, 0x000090F1 }, /* GL_MULTIVIEW_EXT */ - { 72299, 0x000090F2 }, /* GL_MAX_MULTIVIEW_BUFFERS_EXT */ - { 72328, 0x000090F3 }, /* GL_CONTEXT_ROBUST_ACCESS_EXT */ - { 72357, 0x000090FB }, /* GL_COMPUTE_PROGRAM_NV */ - { 72379, 0x000090FC }, /* GL_COMPUTE_PROGRAM_PARAMETER_BUFFER_NV */ - { 72418, 0x00009100 }, /* GL_TEXTURE_2D_MULTISAMPLE */ - { 72444, 0x00009101 }, /* GL_PROXY_TEXTURE_2D_MULTISAMPLE */ - { 72476, 0x00009102 }, /* GL_TEXTURE_2D_MULTISAMPLE_ARRAY */ - { 72508, 0x00009103 }, /* GL_PROXY_TEXTURE_2D_MULTISAMPLE_ARRAY */ - { 72546, 0x00009104 }, /* GL_TEXTURE_BINDING_2D_MULTISAMPLE */ - { 72580, 0x00009105 }, /* GL_TEXTURE_BINDING_2D_MULTISAMPLE_ARRAY */ - { 72620, 0x00009106 }, /* GL_TEXTURE_SAMPLES */ - { 72639, 0x00009107 }, /* GL_TEXTURE_FIXED_SAMPLE_LOCATIONS */ - { 72673, 0x00009108 }, /* GL_SAMPLER_2D_MULTISAMPLE */ - { 72699, 0x00009109 }, /* GL_INT_SAMPLER_2D_MULTISAMPLE */ - { 72729, 0x0000910A }, /* GL_UNSIGNED_INT_SAMPLER_2D_MULTISAMPLE */ - { 72768, 0x0000910B }, /* GL_SAMPLER_2D_MULTISAMPLE_ARRAY */ - { 72800, 0x0000910C }, /* GL_INT_SAMPLER_2D_MULTISAMPLE_ARRAY */ - { 72836, 0x0000910D }, /* GL_UNSIGNED_INT_SAMPLER_2D_MULTISAMPLE_ARRAY */ - { 72881, 0x0000910E }, /* GL_MAX_COLOR_TEXTURE_SAMPLES */ - { 72910, 0x0000910F }, /* GL_MAX_DEPTH_TEXTURE_SAMPLES */ - { 72939, 0x00009110 }, /* GL_MAX_INTEGER_SAMPLES */ - { 72962, 0x00009111 }, /* GL_MAX_SERVER_WAIT_TIMEOUT */ - { 72989, 0x00009112 }, /* GL_OBJECT_TYPE */ - { 73004, 0x00009113 }, /* GL_SYNC_CONDITION */ - { 73022, 0x00009114 }, /* GL_SYNC_STATUS */ - { 73037, 0x00009115 }, /* GL_SYNC_FLAGS */ - { 73051, 0x00009116 }, /* GL_SYNC_FENCE */ - { 73065, 0x00009117 }, /* GL_SYNC_GPU_COMMANDS_COMPLETE */ - { 73095, 0x00009118 }, /* GL_UNSIGNALED */ - { 73109, 0x00009119 }, /* GL_SIGNALED */ - { 73121, 0x0000911A }, /* GL_ALREADY_SIGNALED */ - { 73141, 0x0000911B }, /* GL_TIMEOUT_EXPIRED */ - { 73160, 0x0000911C }, /* GL_CONDITION_SATISFIED */ - { 73183, 0x0000911D }, /* GL_WAIT_FAILED */ - { 73198, 0x0000911F }, /* GL_BUFFER_ACCESS_FLAGS */ - { 73221, 0x00009120 }, /* GL_BUFFER_MAP_LENGTH */ - { 73242, 0x00009121 }, /* GL_BUFFER_MAP_OFFSET */ - { 73263, 0x00009122 }, /* GL_MAX_VERTEX_OUTPUT_COMPONENTS */ - { 73295, 0x00009123 }, /* GL_MAX_GEOMETRY_INPUT_COMPONENTS */ - { 73328, 0x00009124 }, /* GL_MAX_GEOMETRY_OUTPUT_COMPONENTS */ - { 73362, 0x00009125 }, /* GL_MAX_FRAGMENT_INPUT_COMPONENTS */ - { 73395, 0x00009126 }, /* GL_CONTEXT_PROFILE_MASK */ - { 73419, 0x00009127 }, /* GL_UNPACK_COMPRESSED_BLOCK_WIDTH */ - { 73452, 0x00009128 }, /* GL_UNPACK_COMPRESSED_BLOCK_HEIGHT */ - { 73486, 0x00009129 }, /* GL_UNPACK_COMPRESSED_BLOCK_DEPTH */ - { 73519, 0x0000912A }, /* GL_UNPACK_COMPRESSED_BLOCK_SIZE */ - { 73551, 0x0000912B }, /* GL_PACK_COMPRESSED_BLOCK_WIDTH */ - { 73582, 0x0000912C }, /* GL_PACK_COMPRESSED_BLOCK_HEIGHT */ - { 73614, 0x0000912D }, /* GL_PACK_COMPRESSED_BLOCK_DEPTH */ - { 73645, 0x0000912E }, /* GL_PACK_COMPRESSED_BLOCK_SIZE */ - { 73675, 0x0000912F }, /* GL_TEXTURE_IMMUTABLE_FORMAT */ - { 73703, 0x00009130 }, /* GL_SGX_PROGRAM_BINARY_IMG */ - { 73729, 0x00009133 }, /* GL_RENDERBUFFER_SAMPLES_IMG */ - { 73757, 0x00009134 }, /* GL_FRAMEBUFFER_INCOMPLETE_MULTISAMPLE_IMG */ - { 73799, 0x00009135 }, /* GL_MAX_SAMPLES_IMG */ - { 73818, 0x00009136 }, /* GL_TEXTURE_SAMPLES_IMG */ - { 73841, 0x00009137 }, /* GL_COMPRESSED_RGBA_PVRTC_2BPPV2_IMG */ - { 73877, 0x00009138 }, /* GL_COMPRESSED_RGBA_PVRTC_4BPPV2_IMG */ - { 73913, 0x00009143 }, /* GL_MAX_DEBUG_MESSAGE_LENGTH */ - { 73941, 0x00009144 }, /* GL_MAX_DEBUG_LOGGED_MESSAGES */ - { 73970, 0x00009145 }, /* GL_DEBUG_LOGGED_MESSAGES */ - { 73995, 0x00009146 }, /* GL_DEBUG_SEVERITY_HIGH */ - { 74018, 0x00009147 }, /* GL_DEBUG_SEVERITY_MEDIUM */ - { 74043, 0x00009148 }, /* GL_DEBUG_SEVERITY_LOW */ - { 74065, 0x00009149 }, /* GL_DEBUG_CATEGORY_API_ERROR_AMD */ - { 74097, 0x0000914A }, /* GL_DEBUG_CATEGORY_WINDOW_SYSTEM_AMD */ - { 74133, 0x0000914B }, /* GL_DEBUG_CATEGORY_DEPRECATION_AMD */ - { 74167, 0x0000914C }, /* GL_DEBUG_CATEGORY_UNDEFINED_BEHAVIOR_AMD */ - { 74208, 0x0000914D }, /* GL_DEBUG_CATEGORY_PERFORMANCE_AMD */ - { 74242, 0x0000914E }, /* GL_DEBUG_CATEGORY_SHADER_COMPILER_AMD */ - { 74280, 0x0000914F }, /* GL_DEBUG_CATEGORY_APPLICATION_AMD */ - { 74314, 0x00009150 }, /* GL_DEBUG_CATEGORY_OTHER_AMD */ - { 74342, 0x00009151 }, /* GL_BUFFER_OBJECT_EXT */ - { 74363, 0x00009152 }, /* GL_PERFORMANCE_MONITOR_AMD */ - { 74390, 0x00009153 }, /* GL_QUERY_OBJECT_EXT */ - { 74410, 0x00009154 }, /* GL_VERTEX_ARRAY_OBJECT_EXT */ - { 74437, 0x00009155 }, /* GL_SAMPLER_OBJECT_AMD */ - { 74459, 0x00009160 }, /* GL_EXTERNAL_VIRTUAL_MEMORY_BUFFER_AMD */ - { 74497, 0x00009192 }, /* GL_QUERY_BUFFER */ - { 74513, 0x00009193 }, /* GL_QUERY_BUFFER_BINDING */ - { 74537, 0x00009194 }, /* GL_QUERY_RESULT_NO_WAIT */ - { 74561, 0x00009195 }, /* GL_VIRTUAL_PAGE_SIZE_X_ARB */ - { 74588, 0x00009196 }, /* GL_VIRTUAL_PAGE_SIZE_Y_ARB */ - { 74615, 0x00009197 }, /* GL_VIRTUAL_PAGE_SIZE_Z_ARB */ - { 74642, 0x00009198 }, /* GL_MAX_SPARSE_TEXTURE_SIZE_ARB */ - { 74673, 0x00009199 }, /* GL_MAX_SPARSE_3D_TEXTURE_SIZE_ARB */ - { 74707, 0x0000919A }, /* GL_MAX_SPARSE_ARRAY_TEXTURE_LAYERS_ARB */ - { 74746, 0x0000919B }, /* GL_MIN_SPARSE_LEVEL_AMD */ - { 74770, 0x0000919C }, /* GL_MIN_LOD_WARNING_AMD */ - { 74793, 0x0000919D }, /* GL_TEXTURE_BUFFER_OFFSET */ - { 74818, 0x0000919E }, /* GL_TEXTURE_BUFFER_SIZE */ - { 74841, 0x0000919F }, /* GL_TEXTURE_BUFFER_OFFSET_ALIGNMENT */ - { 74876, 0x000091A0 }, /* GL_STREAM_RASTERIZATION_AMD */ - { 74904, 0x000091A4 }, /* GL_VERTEX_ELEMENT_SWIZZLE_AMD */ - { 74934, 0x000091A5 }, /* GL_VERTEX_ID_SWIZZLE_AMD */ - { 74959, 0x000091A6 }, /* GL_TEXTURE_SPARSE_ARB */ - { 74981, 0x000091A7 }, /* GL_VIRTUAL_PAGE_SIZE_INDEX_ARB */ - { 75012, 0x000091A8 }, /* GL_NUM_VIRTUAL_PAGE_SIZES_ARB */ - { 75042, 0x000091A9 }, /* GL_SPARSE_TEXTURE_FULL_ARRAY_CUBE_MIPMAPS_ARB */ - { 75088, 0x000091AA }, /* GL_NUM_SPARSE_LEVELS_ARB */ - { 75113, 0x000091B9 }, /* GL_COMPUTE_SHADER */ - { 75131, 0x000091BB }, /* GL_MAX_COMPUTE_UNIFORM_BLOCKS */ - { 75161, 0x000091BC }, /* GL_MAX_COMPUTE_TEXTURE_IMAGE_UNITS */ - { 75196, 0x000091BD }, /* GL_MAX_COMPUTE_IMAGE_UNIFORMS */ - { 75226, 0x000091BE }, /* GL_MAX_COMPUTE_WORK_GROUP_COUNT */ - { 75258, 0x000091BF }, /* GL_MAX_COMPUTE_WORK_GROUP_SIZE */ - { 75289, 0x00009250 }, /* GL_SHADER_BINARY_DMP */ - { 75310, 0x00009251 }, /* GL_SMAPHS30_PROGRAM_BINARY_DMP */ - { 75341, 0x00009252 }, /* GL_SMAPHS_PROGRAM_BINARY_DMP */ - { 75370, 0x00009253 }, /* GL_DMP_PROGRAM_BINARY_DMP */ - { 75396, 0x00009260 }, /* GL_GCCSO_SHADER_BINARY_FJ */ - { 75422, 0x00009270 }, /* GL_COMPRESSED_R11_EAC */ - { 75444, 0x00009271 }, /* GL_COMPRESSED_SIGNED_R11_EAC */ - { 75473, 0x00009272 }, /* GL_COMPRESSED_RG11_EAC */ - { 75496, 0x00009273 }, /* GL_COMPRESSED_SIGNED_RG11_EAC */ - { 75526, 0x00009274 }, /* GL_COMPRESSED_RGB8_ETC2 */ - { 75550, 0x00009275 }, /* GL_COMPRESSED_SRGB8_ETC2 */ - { 75575, 0x00009276 }, /* GL_COMPRESSED_RGB8_PUNCHTHROUGH_ALPHA1_ETC2 */ - { 75619, 0x00009277 }, /* GL_COMPRESSED_SRGB8_PUNCHTHROUGH_ALPHA1_ETC2 */ - { 75664, 0x00009278 }, /* GL_COMPRESSED_RGBA8_ETC2_EAC */ - { 75693, 0x00009279 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ETC2_EAC */ - { 75729, 0x00009280 }, /* GL_BLEND_PREMULTIPLIED_SRC_NV */ - { 75759, 0x00009281 }, /* GL_BLEND_OVERLAP_NV */ - { 75779, 0x00009282 }, /* GL_UNCORRELATED_NV */ - { 75798, 0x00009283 }, /* GL_DISJOINT_NV */ - { 75813, 0x00009284 }, /* GL_CONJOINT_NV */ - { 75828, 0x00009285 }, /* GL_BLEND_ADVANCED_COHERENT_KHR */ - { 75859, 0x00009286 }, /* GL_SRC_NV */ - { 75869, 0x00009287 }, /* GL_DST_NV */ - { 75879, 0x00009288 }, /* GL_SRC_OVER_NV */ - { 75894, 0x00009289 }, /* GL_DST_OVER_NV */ - { 75909, 0x0000928A }, /* GL_SRC_IN_NV */ - { 75922, 0x0000928B }, /* GL_DST_IN_NV */ - { 75935, 0x0000928C }, /* GL_SRC_OUT_NV */ - { 75949, 0x0000928D }, /* GL_DST_OUT_NV */ - { 75963, 0x0000928E }, /* GL_SRC_ATOP_NV */ - { 75978, 0x0000928F }, /* GL_DST_ATOP_NV */ - { 75993, 0x00009291 }, /* GL_PLUS_NV */ - { 76004, 0x00009292 }, /* GL_PLUS_DARKER_NV */ - { 76022, 0x00009294 }, /* GL_MULTIPLY_KHR */ - { 76038, 0x00009295 }, /* GL_SCREEN_KHR */ - { 76052, 0x00009296 }, /* GL_OVERLAY_KHR */ - { 76067, 0x00009297 }, /* GL_DARKEN_KHR */ - { 76081, 0x00009298 }, /* GL_LIGHTEN_KHR */ - { 76096, 0x00009299 }, /* GL_COLORDODGE_KHR */ - { 76114, 0x0000929A }, /* GL_COLORBURN_KHR */ - { 76131, 0x0000929B }, /* GL_HARDLIGHT_KHR */ - { 76148, 0x0000929C }, /* GL_SOFTLIGHT_KHR */ - { 76165, 0x0000929E }, /* GL_DIFFERENCE_KHR */ - { 76183, 0x0000929F }, /* GL_MINUS_NV */ - { 76195, 0x000092A0 }, /* GL_EXCLUSION_KHR */ - { 76212, 0x000092A1 }, /* GL_CONTRAST_NV */ - { 76227, 0x000092A3 }, /* GL_INVERT_RGB_NV */ - { 76244, 0x000092A4 }, /* GL_LINEARDODGE_NV */ - { 76262, 0x000092A5 }, /* GL_LINEARBURN_NV */ - { 76279, 0x000092A6 }, /* GL_VIVIDLIGHT_NV */ - { 76296, 0x000092A7 }, /* GL_LINEARLIGHT_NV */ - { 76314, 0x000092A8 }, /* GL_PINLIGHT_NV */ - { 76329, 0x000092A9 }, /* GL_HARDMIX_NV */ - { 76343, 0x000092AD }, /* GL_HSL_HUE_KHR */ - { 76358, 0x000092AE }, /* GL_HSL_SATURATION_KHR */ - { 76380, 0x000092AF }, /* GL_HSL_COLOR_KHR */ - { 76397, 0x000092B0 }, /* GL_HSL_LUMINOSITY_KHR */ - { 76419, 0x000092B1 }, /* GL_PLUS_CLAMPED_NV */ - { 76438, 0x000092B2 }, /* GL_PLUS_CLAMPED_ALPHA_NV */ - { 76463, 0x000092B3 }, /* GL_MINUS_CLAMPED_NV */ - { 76483, 0x000092B4 }, /* GL_INVERT_OVG_NV */ - { 76500, 0x000092BE }, /* GL_PRIMITIVE_BOUNDING_BOX_EXT */ - { 76530, 0x000092C0 }, /* GL_ATOMIC_COUNTER_BUFFER */ - { 76555, 0x000092C1 }, /* GL_ATOMIC_COUNTER_BUFFER_BINDING */ - { 76588, 0x000092C2 }, /* GL_ATOMIC_COUNTER_BUFFER_START */ - { 76619, 0x000092C3 }, /* GL_ATOMIC_COUNTER_BUFFER_SIZE */ - { 76649, 0x000092C4 }, /* GL_ATOMIC_COUNTER_BUFFER_DATA_SIZE */ - { 76684, 0x000092C5 }, /* GL_ATOMIC_COUNTER_BUFFER_ACTIVE_ATOMIC_COUNTERS */ - { 76732, 0x000092C6 }, /* GL_ATOMIC_COUNTER_BUFFER_ACTIVE_ATOMIC_COUNTER_INDICES */ - { 76787, 0x000092C7 }, /* GL_ATOMIC_COUNTER_BUFFER_REFERENCED_BY_VERTEX_SHADER */ - { 76840, 0x000092C8 }, /* GL_ATOMIC_COUNTER_BUFFER_REFERENCED_BY_TESS_CONTROL_SHADER */ - { 76899, 0x000092C9 }, /* GL_ATOMIC_COUNTER_BUFFER_REFERENCED_BY_TESS_EVALUATION_SHADER */ - { 76961, 0x000092CA }, /* GL_ATOMIC_COUNTER_BUFFER_REFERENCED_BY_GEOMETRY_SHADER */ - { 77016, 0x000092CB }, /* GL_ATOMIC_COUNTER_BUFFER_REFERENCED_BY_FRAGMENT_SHADER */ - { 77071, 0x000092CC }, /* GL_MAX_VERTEX_ATOMIC_COUNTER_BUFFERS */ - { 77108, 0x000092CD }, /* GL_MAX_TESS_CONTROL_ATOMIC_COUNTER_BUFFERS */ - { 77151, 0x000092CE }, /* GL_MAX_TESS_EVALUATION_ATOMIC_COUNTER_BUFFERS */ - { 77197, 0x000092CF }, /* GL_MAX_GEOMETRY_ATOMIC_COUNTER_BUFFERS */ - { 77236, 0x000092D0 }, /* GL_MAX_FRAGMENT_ATOMIC_COUNTER_BUFFERS */ - { 77275, 0x000092D1 }, /* GL_MAX_COMBINED_ATOMIC_COUNTER_BUFFERS */ - { 77314, 0x000092D2 }, /* GL_MAX_VERTEX_ATOMIC_COUNTERS */ - { 77344, 0x000092D3 }, /* GL_MAX_TESS_CONTROL_ATOMIC_COUNTERS */ - { 77380, 0x000092D4 }, /* GL_MAX_TESS_EVALUATION_ATOMIC_COUNTERS */ - { 77419, 0x000092D5 }, /* GL_MAX_GEOMETRY_ATOMIC_COUNTERS */ - { 77451, 0x000092D6 }, /* GL_MAX_FRAGMENT_ATOMIC_COUNTERS */ - { 77483, 0x000092D7 }, /* GL_MAX_COMBINED_ATOMIC_COUNTERS */ - { 77515, 0x000092D8 }, /* GL_MAX_ATOMIC_COUNTER_BUFFER_SIZE */ - { 77549, 0x000092D9 }, /* GL_ACTIVE_ATOMIC_COUNTER_BUFFERS */ - { 77582, 0x000092DA }, /* GL_UNIFORM_ATOMIC_COUNTER_BUFFER_INDEX */ - { 77621, 0x000092DB }, /* GL_UNSIGNED_INT_ATOMIC_COUNTER */ - { 77652, 0x000092DC }, /* GL_MAX_ATOMIC_COUNTER_BUFFER_BINDINGS */ - { 77690, 0x000092DD }, /* GL_FRAGMENT_COVERAGE_TO_COLOR_NV */ - { 77723, 0x000092DE }, /* GL_FRAGMENT_COVERAGE_COLOR_NV */ - { 77753, 0x000092E0 }, /* GL_DEBUG_OUTPUT */ - { 77769, 0x000092E1 }, /* GL_UNIFORM */ - { 77780, 0x000092E2 }, /* GL_UNIFORM_BLOCK */ - { 77797, 0x000092E3 }, /* GL_PROGRAM_INPUT */ - { 77814, 0x000092E4 }, /* GL_PROGRAM_OUTPUT */ - { 77832, 0x000092E5 }, /* GL_BUFFER_VARIABLE */ - { 77851, 0x000092E6 }, /* GL_SHADER_STORAGE_BLOCK */ - { 77875, 0x000092E7 }, /* GL_IS_PER_PATCH */ - { 77891, 0x000092E8 }, /* GL_VERTEX_SUBROUTINE */ - { 77912, 0x000092E9 }, /* GL_TESS_CONTROL_SUBROUTINE */ - { 77939, 0x000092EA }, /* GL_TESS_EVALUATION_SUBROUTINE */ - { 77969, 0x000092EB }, /* GL_GEOMETRY_SUBROUTINE */ - { 77992, 0x000092EC }, /* GL_FRAGMENT_SUBROUTINE */ - { 78015, 0x000092ED }, /* GL_COMPUTE_SUBROUTINE */ - { 78037, 0x000092EE }, /* GL_VERTEX_SUBROUTINE_UNIFORM */ - { 78066, 0x000092EF }, /* GL_TESS_CONTROL_SUBROUTINE_UNIFORM */ - { 78101, 0x000092F0 }, /* GL_TESS_EVALUATION_SUBROUTINE_UNIFORM */ - { 78139, 0x000092F1 }, /* GL_GEOMETRY_SUBROUTINE_UNIFORM */ - { 78170, 0x000092F2 }, /* GL_FRAGMENT_SUBROUTINE_UNIFORM */ - { 78201, 0x000092F3 }, /* GL_COMPUTE_SUBROUTINE_UNIFORM */ - { 78231, 0x000092F4 }, /* GL_TRANSFORM_FEEDBACK_VARYING */ - { 78261, 0x000092F5 }, /* GL_ACTIVE_RESOURCES */ - { 78281, 0x000092F6 }, /* GL_MAX_NAME_LENGTH */ - { 78300, 0x000092F7 }, /* GL_MAX_NUM_ACTIVE_VARIABLES */ - { 78328, 0x000092F8 }, /* GL_MAX_NUM_COMPATIBLE_SUBROUTINES */ - { 78362, 0x000092F9 }, /* GL_NAME_LENGTH */ - { 78377, 0x000092FA }, /* GL_TYPE */ - { 78385, 0x000092FB }, /* GL_ARRAY_SIZE */ - { 78399, 0x000092FC }, /* GL_OFFSET */ - { 78409, 0x000092FD }, /* GL_BLOCK_INDEX */ - { 78424, 0x000092FE }, /* GL_ARRAY_STRIDE */ - { 78440, 0x000092FF }, /* GL_MATRIX_STRIDE */ - { 78457, 0x00009300 }, /* GL_IS_ROW_MAJOR */ - { 78473, 0x00009301 }, /* GL_ATOMIC_COUNTER_BUFFER_INDEX */ - { 78504, 0x00009302 }, /* GL_BUFFER_BINDING */ - { 78522, 0x00009303 }, /* GL_BUFFER_DATA_SIZE */ - { 78542, 0x00009304 }, /* GL_NUM_ACTIVE_VARIABLES */ - { 78566, 0x00009305 }, /* GL_ACTIVE_VARIABLES */ - { 78586, 0x00009306 }, /* GL_REFERENCED_BY_VERTEX_SHADER */ - { 78617, 0x00009307 }, /* GL_REFERENCED_BY_TESS_CONTROL_SHADER */ - { 78654, 0x00009308 }, /* GL_REFERENCED_BY_TESS_EVALUATION_SHADER */ - { 78694, 0x00009309 }, /* GL_REFERENCED_BY_GEOMETRY_SHADER */ - { 78727, 0x0000930A }, /* GL_REFERENCED_BY_FRAGMENT_SHADER */ - { 78760, 0x0000930B }, /* GL_REFERENCED_BY_COMPUTE_SHADER */ - { 78792, 0x0000930C }, /* GL_TOP_LEVEL_ARRAY_SIZE */ - { 78816, 0x0000930D }, /* GL_TOP_LEVEL_ARRAY_STRIDE */ - { 78842, 0x0000930E }, /* GL_LOCATION */ - { 78854, 0x0000930F }, /* GL_LOCATION_INDEX */ - { 78872, 0x00009310 }, /* GL_FRAMEBUFFER_DEFAULT_WIDTH */ - { 78901, 0x00009311 }, /* GL_FRAMEBUFFER_DEFAULT_HEIGHT */ - { 78931, 0x00009312 }, /* GL_FRAMEBUFFER_DEFAULT_LAYERS */ - { 78961, 0x00009313 }, /* GL_FRAMEBUFFER_DEFAULT_SAMPLES */ - { 78992, 0x00009314 }, /* GL_FRAMEBUFFER_DEFAULT_FIXED_SAMPLE_LOCATIONS */ - { 79038, 0x00009315 }, /* GL_MAX_FRAMEBUFFER_WIDTH */ - { 79063, 0x00009316 }, /* GL_MAX_FRAMEBUFFER_HEIGHT */ - { 79089, 0x00009317 }, /* GL_MAX_FRAMEBUFFER_LAYERS */ - { 79115, 0x00009318 }, /* GL_MAX_FRAMEBUFFER_SAMPLES */ - { 79142, 0x00009327 }, /* GL_RASTER_MULTISAMPLE_EXT */ - { 79168, 0x00009328 }, /* GL_RASTER_SAMPLES_EXT */ - { 79190, 0x00009329 }, /* GL_MAX_RASTER_SAMPLES_EXT */ - { 79216, 0x0000932A }, /* GL_RASTER_FIXED_SAMPLE_LOCATIONS_EXT */ - { 79253, 0x0000932B }, /* GL_MULTISAMPLE_RASTERIZATION_ALLOWED_EXT */ - { 79294, 0x0000932C }, /* GL_EFFECTIVE_RASTER_SAMPLES_EXT */ - { 79326, 0x0000932D }, /* GL_DEPTH_SAMPLES_NV */ - { 79346, 0x0000932E }, /* GL_STENCIL_SAMPLES_NV */ - { 79368, 0x0000932F }, /* GL_MIXED_DEPTH_SAMPLES_SUPPORTED_NV */ - { 79404, 0x00009330 }, /* GL_MIXED_STENCIL_SAMPLES_SUPPORTED_NV */ - { 79442, 0x00009331 }, /* GL_COVERAGE_MODULATION_TABLE_NV */ - { 79474, 0x00009332 }, /* GL_COVERAGE_MODULATION_NV */ - { 79500, 0x00009333 }, /* GL_COVERAGE_MODULATION_TABLE_SIZE_NV */ - { 79537, 0x00009339 }, /* GL_WARP_SIZE_NV */ - { 79553, 0x0000933A }, /* GL_WARPS_PER_SM_NV */ - { 79572, 0x0000933B }, /* GL_SM_COUNT_NV */ - { 79587, 0x0000933C }, /* GL_FILL_RECTANGLE_NV */ - { 79608, 0x0000933D }, /* GL_SAMPLE_LOCATION_SUBPIXEL_BITS_NV */ - { 79644, 0x0000933E }, /* GL_SAMPLE_LOCATION_PIXEL_GRID_WIDTH_NV */ - { 79683, 0x0000933F }, /* GL_SAMPLE_LOCATION_PIXEL_GRID_HEIGHT_NV */ - { 79723, 0x00009340 }, /* GL_PROGRAMMABLE_SAMPLE_LOCATION_TABLE_SIZE_NV */ - { 79769, 0x00009341 }, /* GL_PROGRAMMABLE_SAMPLE_LOCATION_NV */ - { 79804, 0x00009342 }, /* GL_FRAMEBUFFER_PROGRAMMABLE_SAMPLE_LOCATIONS_NV */ - { 79852, 0x00009343 }, /* GL_FRAMEBUFFER_SAMPLE_LOCATION_PIXEL_GRID_NV */ - { 79897, 0x00009344 }, /* GL_MAX_COMPUTE_VARIABLE_GROUP_INVOCATIONS_ARB */ - { 79943, 0x00009345 }, /* GL_MAX_COMPUTE_VARIABLE_GROUP_SIZE_ARB */ - { 79982, 0x00009346 }, /* GL_CONSERVATIVE_RASTERIZATION_NV */ - { 80015, 0x00009347 }, /* GL_SUBPIXEL_PRECISION_BIAS_X_BITS_NV */ - { 80052, 0x00009348 }, /* GL_SUBPIXEL_PRECISION_BIAS_Y_BITS_NV */ - { 80089, 0x00009349 }, /* GL_MAX_SUBPIXEL_PRECISION_BIAS_BITS_NV */ - { 80128, 0x0000934A }, /* GL_LOCATION_COMPONENT */ - { 80150, 0x0000934B }, /* GL_TRANSFORM_FEEDBACK_BUFFER_INDEX */ - { 80185, 0x0000934C }, /* GL_TRANSFORM_FEEDBACK_BUFFER_STRIDE */ - { 80221, 0x0000935C }, /* GL_CLIP_ORIGIN */ - { 80236, 0x0000935D }, /* GL_CLIP_DEPTH_MODE */ - { 80255, 0x0000935E }, /* GL_NEGATIVE_ONE_TO_ONE */ - { 80278, 0x0000935F }, /* GL_ZERO_TO_ONE */ - { 80293, 0x00009365 }, /* GL_CLEAR_TEXTURE */ - { 80310, 0x00009368 }, /* GL_FONT_GLYPHS_AVAILABLE_NV */ - { 80338, 0x00009369 }, /* GL_FONT_TARGET_UNAVAILABLE_NV */ - { 80368, 0x0000936A }, /* GL_FONT_UNAVAILABLE_NV */ - { 80391, 0x0000936B }, /* GL_FONT_UNINTELLIGIBLE_NV */ - { 80417, 0x0000936C }, /* GL_STANDARD_FONT_FORMAT_NV */ - { 80444, 0x0000936D }, /* GL_FRAGMENT_INPUT_NV */ - { 80465, 0x0000936E }, /* GL_UNIFORM_BUFFER_UNIFIED_NV */ - { 80494, 0x0000936F }, /* GL_UNIFORM_BUFFER_ADDRESS_NV */ - { 80523, 0x00009370 }, /* GL_UNIFORM_BUFFER_LENGTH_NV */ - { 80551, 0x00009371 }, /* GL_MULTISAMPLES_NV */ - { 80570, 0x00009372 }, /* GL_SUPERSAMPLE_SCALE_X_NV */ - { 80596, 0x00009373 }, /* GL_SUPERSAMPLE_SCALE_Y_NV */ - { 80622, 0x00009374 }, /* GL_CONFORMANT_NV */ - { 80639, 0x00009380 }, /* GL_NUM_SAMPLE_COUNTS */ - { 80660, 0x000093A0 }, /* GL_TRANSLATED_SHADER_SOURCE_LENGTH_ANGLE */ - { 80701, 0x000093A1 }, /* GL_BGRA8_EXT */ - { 80714, 0x000093A2 }, /* GL_TEXTURE_USAGE_ANGLE */ - { 80737, 0x000093A3 }, /* GL_FRAMEBUFFER_ATTACHMENT_ANGLE */ - { 80769, 0x000093A4 }, /* GL_PACK_REVERSE_ROW_ORDER_ANGLE */ - { 80801, 0x000093A6 }, /* GL_PROGRAM_BINARY_ANGLE */ - { 80825, 0x000093B0 }, /* GL_COMPRESSED_RGBA_ASTC_4x4_KHR */ - { 80857, 0x000093B1 }, /* GL_COMPRESSED_RGBA_ASTC_5x4_KHR */ - { 80889, 0x000093B2 }, /* GL_COMPRESSED_RGBA_ASTC_5x5_KHR */ - { 80921, 0x000093B3 }, /* GL_COMPRESSED_RGBA_ASTC_6x5_KHR */ - { 80953, 0x000093B4 }, /* GL_COMPRESSED_RGBA_ASTC_6x6_KHR */ - { 80985, 0x000093B5 }, /* GL_COMPRESSED_RGBA_ASTC_8x5_KHR */ - { 81017, 0x000093B6 }, /* GL_COMPRESSED_RGBA_ASTC_8x6_KHR */ - { 81049, 0x000093B7 }, /* GL_COMPRESSED_RGBA_ASTC_8x8_KHR */ - { 81081, 0x000093B8 }, /* GL_COMPRESSED_RGBA_ASTC_10x5_KHR */ - { 81114, 0x000093B9 }, /* GL_COMPRESSED_RGBA_ASTC_10x6_KHR */ - { 81147, 0x000093BA }, /* GL_COMPRESSED_RGBA_ASTC_10x8_KHR */ - { 81180, 0x000093BB }, /* GL_COMPRESSED_RGBA_ASTC_10x10_KHR */ - { 81214, 0x000093BC }, /* GL_COMPRESSED_RGBA_ASTC_12x10_KHR */ - { 81248, 0x000093BD }, /* GL_COMPRESSED_RGBA_ASTC_12x12_KHR */ - { 81282, 0x000093C0 }, /* GL_COMPRESSED_RGBA_ASTC_3x3x3_OES */ - { 81316, 0x000093C1 }, /* GL_COMPRESSED_RGBA_ASTC_4x3x3_OES */ - { 81350, 0x000093C2 }, /* GL_COMPRESSED_RGBA_ASTC_4x4x3_OES */ - { 81384, 0x000093C3 }, /* GL_COMPRESSED_RGBA_ASTC_4x4x4_OES */ - { 81418, 0x000093C4 }, /* GL_COMPRESSED_RGBA_ASTC_5x4x4_OES */ - { 81452, 0x000093C5 }, /* GL_COMPRESSED_RGBA_ASTC_5x5x4_OES */ - { 81486, 0x000093C6 }, /* GL_COMPRESSED_RGBA_ASTC_5x5x5_OES */ - { 81520, 0x000093C7 }, /* GL_COMPRESSED_RGBA_ASTC_6x5x5_OES */ - { 81554, 0x000093C8 }, /* GL_COMPRESSED_RGBA_ASTC_6x6x5_OES */ - { 81588, 0x000093C9 }, /* GL_COMPRESSED_RGBA_ASTC_6x6x6_OES */ - { 81622, 0x000093D0 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR */ - { 81662, 0x000093D1 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR */ - { 81702, 0x000093D2 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR */ - { 81742, 0x000093D3 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR */ - { 81782, 0x000093D4 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR */ - { 81822, 0x000093D5 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR */ - { 81862, 0x000093D6 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR */ - { 81902, 0x000093D7 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR */ - { 81942, 0x000093D8 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR */ - { 81983, 0x000093D9 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR */ - { 82024, 0x000093DA }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR */ - { 82065, 0x000093DB }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR */ - { 82107, 0x000093DC }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR */ - { 82149, 0x000093DD }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR */ - { 82191, 0x000093E0 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_3x3x3_OES */ - { 82233, 0x000093E1 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_4x3x3_OES */ - { 82275, 0x000093E2 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4x3_OES */ - { 82317, 0x000093E3 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4x4_OES */ - { 82359, 0x000093E4 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4x4_OES */ - { 82401, 0x000093E5 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5x4_OES */ - { 82443, 0x000093E6 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5x5_OES */ - { 82485, 0x000093E7 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5x5_OES */ - { 82527, 0x000093E8 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6x5_OES */ - { 82569, 0x000093E9 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6x6_OES */ - { 82611, 0x000093F0 }, /* GL_COMPRESSED_SRGB_ALPHA_PVRTC_2BPPV2_IMG */ - { 82653, 0x000093F1 }, /* GL_COMPRESSED_SRGB_ALPHA_PVRTC_4BPPV2_IMG */ - { 82695, 0x000094F0 }, /* GL_PERFQUERY_COUNTER_EVENT_INTEL */ - { 82728, 0x000094F1 }, /* GL_PERFQUERY_COUNTER_DURATION_NORM_INTEL */ - { 82769, 0x000094F2 }, /* GL_PERFQUERY_COUNTER_DURATION_RAW_INTEL */ - { 82809, 0x000094F3 }, /* GL_PERFQUERY_COUNTER_THROUGHPUT_INTEL */ - { 82847, 0x000094F4 }, /* GL_PERFQUERY_COUNTER_RAW_INTEL */ - { 82878, 0x000094F5 }, /* GL_PERFQUERY_COUNTER_TIMESTAMP_INTEL */ - { 82915, 0x000094F8 }, /* GL_PERFQUERY_COUNTER_DATA_UINT32_INTEL */ - { 82954, 0x000094F9 }, /* GL_PERFQUERY_COUNTER_DATA_UINT64_INTEL */ - { 82993, 0x000094FA }, /* GL_PERFQUERY_COUNTER_DATA_FLOAT_INTEL */ - { 83031, 0x000094FB }, /* GL_PERFQUERY_COUNTER_DATA_DOUBLE_INTEL */ - { 83070, 0x000094FC }, /* GL_PERFQUERY_COUNTER_DATA_BOOL32_INTEL */ - { 83109, 0x000094FD }, /* GL_PERFQUERY_QUERY_NAME_LENGTH_MAX_INTEL */ - { 83150, 0x000094FE }, /* GL_PERFQUERY_COUNTER_NAME_LENGTH_MAX_INTEL */ - { 83193, 0x000094FF }, /* GL_PERFQUERY_COUNTER_DESC_LENGTH_MAX_INTEL */ - { 83236, 0x00009500 }, /* GL_PERFQUERY_GPA_EXTENDED_COUNTERS_INTEL */ - { 83277, 0x00009630 }, /* GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_NUM_VIEWS_OVR */ - { 83325, 0x00009631 }, /* GL_MAX_VIEWS_OVR */ - { 83342, 0x00009632 }, /* GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_BASE_VIEW_INDEX_OVR */ - { 83396, 0x00019262 }, /* GL_RASTER_POSITION_UNCLIPPED_IBM */ - { 83429, 0x0001A1F8 }, /* GL_PREFER_DOUBLEBUFFER_HINT_PGI */ - { 83461, 0x0001A1FD }, /* GL_CONSERVE_MEMORY_HINT_PGI */ - { 83489, 0x0001A1FE }, /* GL_RECLAIM_MEMORY_HINT_PGI */ - { 83516, 0x0001A202 }, /* GL_NATIVE_GRAPHICS_HANDLE_PGI */ - { 83546, 0x0001A203 }, /* GL_NATIVE_GRAPHICS_BEGIN_HINT_PGI */ - { 83580, 0x0001A204 }, /* GL_NATIVE_GRAPHICS_END_HINT_PGI */ - { 83612, 0x0001A20C }, /* GL_ALWAYS_FAST_HINT_PGI */ - { 83636, 0x0001A20D }, /* GL_ALWAYS_SOFT_HINT_PGI */ - { 83660, 0x0001A20E }, /* GL_ALLOW_DRAW_OBJ_HINT_PGI */ - { 83687, 0x0001A20F }, /* GL_ALLOW_DRAW_WIN_HINT_PGI */ - { 83714, 0x0001A210 }, /* GL_ALLOW_DRAW_FRG_HINT_PGI */ - { 83741, 0x0001A211 }, /* GL_ALLOW_DRAW_MEM_HINT_PGI */ - { 83768, 0x0001A216 }, /* GL_STRICT_DEPTHFUNC_HINT_PGI */ - { 83797, 0x0001A217 }, /* GL_STRICT_LIGHTING_HINT_PGI */ - { 83825, 0x0001A218 }, /* GL_STRICT_SCISSOR_HINT_PGI */ - { 83852, 0x0001A219 }, /* GL_FULL_STIPPLE_HINT_PGI */ - { 83877, 0x0001A220 }, /* GL_CLIP_NEAR_HINT_PGI */ - { 83899, 0x0001A221 }, /* GL_CLIP_FAR_HINT_PGI */ - { 83920, 0x0001A222 }, /* GL_WIDE_LINE_HINT_PGI */ - { 83942, 0x0001A223 }, /* GL_BACK_NORMALS_HINT_PGI */ - { 83967, 0x0001A22A }, /* GL_VERTEX_DATA_HINT_PGI */ - { 83991, 0x0001A22B }, /* GL_VERTEX_CONSISTENT_HINT_PGI */ - { 84021, 0x0001A22C }, /* GL_MATERIAL_SIDE_HINT_PGI */ - { 84047, 0x0001A22D }, /* GL_MAX_VERTEX_HINT_PGI */ - { 84070, 0x00103050 }, /* GL_CULL_VERTEX_IBM */ - { 84089, 0x00103060 }, /* GL_ALL_STATIC_DATA_IBM */ - { 84112, 0x00103061 }, /* GL_STATIC_VERTEX_ARRAY_IBM */ - { 84139, 0x00103070 }, /* GL_VERTEX_ARRAY_LIST_IBM */ - { 84164, 0x00103071 }, /* GL_NORMAL_ARRAY_LIST_IBM */ - { 84189, 0x00103072 }, /* GL_COLOR_ARRAY_LIST_IBM */ - { 84213, 0x00103073 }, /* GL_INDEX_ARRAY_LIST_IBM */ - { 84237, 0x00103074 }, /* GL_TEXTURE_COORD_ARRAY_LIST_IBM */ - { 84269, 0x00103075 }, /* GL_EDGE_FLAG_ARRAY_LIST_IBM */ - { 84297, 0x00103076 }, /* GL_FOG_COORDINATE_ARRAY_LIST_IBM */ - { 84330, 0x00103077 }, /* GL_SECONDARY_COLOR_ARRAY_LIST_IBM */ - { 84364, 0x00103080 }, /* GL_VERTEX_ARRAY_LIST_STRIDE_IBM */ - { 84396, 0x00103081 }, /* GL_NORMAL_ARRAY_LIST_STRIDE_IBM */ - { 84428, 0x00103082 }, /* GL_COLOR_ARRAY_LIST_STRIDE_IBM */ - { 84459, 0x00103083 }, /* GL_INDEX_ARRAY_LIST_STRIDE_IBM */ - { 84490, 0x00103084 }, /* GL_TEXTURE_COORD_ARRAY_LIST_STRIDE_IBM */ - { 84529, 0x00103085 }, /* GL_EDGE_FLAG_ARRAY_LIST_STRIDE_IBM */ - { 84564, 0x00103086 }, /* GL_FOG_COORDINATE_ARRAY_LIST_STRIDE_IBM */ - { 84604, 0x00103087 }, /* GL_SECONDARY_COLOR_ARRAY_LIST_STRIDE_IBM */ + { 6345, 0x0000140E }, /* GL_INT64_ARB */ + { 6358, 0x0000140F }, /* GL_UNSIGNED_INT64_ARB */ + { 6380, 0x00001500 }, /* GL_CLEAR */ + { 6389, 0x00001501 }, /* GL_AND */ + { 6396, 0x00001502 }, /* GL_AND_REVERSE */ + { 6411, 0x00001503 }, /* GL_COPY */ + { 6419, 0x00001504 }, /* GL_AND_INVERTED */ + { 6435, 0x00001505 }, /* GL_NOOP */ + { 6443, 0x00001506 }, /* GL_XOR */ + { 6450, 0x00001507 }, /* GL_OR */ + { 6456, 0x00001508 }, /* GL_NOR */ + { 6463, 0x00001509 }, /* GL_EQUIV */ + { 6472, 0x0000150A }, /* GL_INVERT */ + { 6482, 0x0000150B }, /* GL_OR_REVERSE */ + { 6496, 0x0000150C }, /* GL_COPY_INVERTED */ + { 6513, 0x0000150D }, /* GL_OR_INVERTED */ + { 6528, 0x0000150E }, /* GL_NAND */ + { 6536, 0x0000150F }, /* GL_SET */ + { 6543, 0x00001600 }, /* GL_EMISSION */ + { 6555, 0x00001601 }, /* GL_SHININESS */ + { 6568, 0x00001602 }, /* GL_AMBIENT_AND_DIFFUSE */ + { 6591, 0x00001603 }, /* GL_COLOR_INDEXES */ + { 6608, 0x00001700 }, /* GL_MODELVIEW */ + { 6621, 0x00001701 }, /* GL_PROJECTION */ + { 6635, 0x00001702 }, /* GL_TEXTURE */ + { 6646, 0x00001800 }, /* GL_COLOR */ + { 6655, 0x00001801 }, /* GL_DEPTH */ + { 6664, 0x00001802 }, /* GL_STENCIL */ + { 6675, 0x00001900 }, /* GL_COLOR_INDEX */ + { 6690, 0x00001901 }, /* GL_STENCIL_INDEX */ + { 6707, 0x00001902 }, /* GL_DEPTH_COMPONENT */ + { 6726, 0x00001903 }, /* GL_RED */ + { 6733, 0x00001904 }, /* GL_GREEN */ + { 6742, 0x00001905 }, /* GL_BLUE */ + { 6750, 0x00001906 }, /* GL_ALPHA */ + { 6759, 0x00001907 }, /* GL_RGB */ + { 6766, 0x00001908 }, /* GL_RGBA */ + { 6774, 0x00001909 }, /* GL_LUMINANCE */ + { 6787, 0x0000190A }, /* GL_LUMINANCE_ALPHA */ + { 6806, 0x00001A00 }, /* GL_BITMAP */ + { 6816, 0x00001B00 }, /* GL_POINT */ + { 6825, 0x00001B01 }, /* GL_LINE */ + { 6833, 0x00001B02 }, /* GL_FILL */ + { 6841, 0x00001C00 }, /* GL_RENDER */ + { 6851, 0x00001C01 }, /* GL_FEEDBACK */ + { 6863, 0x00001C02 }, /* GL_SELECT */ + { 6873, 0x00001D00 }, /* GL_FLAT */ + { 6881, 0x00001D01 }, /* GL_SMOOTH */ + { 6891, 0x00001E00 }, /* GL_KEEP */ + { 6899, 0x00001E01 }, /* GL_REPLACE */ + { 6910, 0x00001E02 }, /* GL_INCR */ + { 6918, 0x00001E03 }, /* GL_DECR */ + { 6926, 0x00001F00 }, /* GL_VENDOR */ + { 6936, 0x00001F01 }, /* GL_RENDERER */ + { 6948, 0x00001F02 }, /* GL_VERSION */ + { 6959, 0x00001F03 }, /* GL_EXTENSIONS */ + { 6973, 0x00002000 }, /* GL_S */ + { 6978, 0x00002001 }, /* GL_T */ + { 6983, 0x00002002 }, /* GL_R */ + { 6988, 0x00002003 }, /* GL_Q */ + { 6993, 0x00002100 }, /* GL_MODULATE */ + { 7005, 0x00002101 }, /* GL_DECAL */ + { 7014, 0x00002200 }, /* GL_TEXTURE_ENV_MODE */ + { 7034, 0x00002201 }, /* GL_TEXTURE_ENV_COLOR */ + { 7055, 0x00002300 }, /* GL_TEXTURE_ENV */ + { 7070, 0x00002400 }, /* GL_EYE_LINEAR */ + { 7084, 0x00002401 }, /* GL_OBJECT_LINEAR */ + { 7101, 0x00002402 }, /* GL_SPHERE_MAP */ + { 7115, 0x00002500 }, /* GL_TEXTURE_GEN_MODE */ + { 7135, 0x00002501 }, /* GL_OBJECT_PLANE */ + { 7151, 0x00002502 }, /* GL_EYE_PLANE */ + { 7164, 0x00002600 }, /* GL_NEAREST */ + { 7175, 0x00002601 }, /* GL_LINEAR */ + { 7185, 0x00002700 }, /* GL_NEAREST_MIPMAP_NEAREST */ + { 7211, 0x00002701 }, /* GL_LINEAR_MIPMAP_NEAREST */ + { 7236, 0x00002702 }, /* GL_NEAREST_MIPMAP_LINEAR */ + { 7261, 0x00002703 }, /* GL_LINEAR_MIPMAP_LINEAR */ + { 7285, 0x00002800 }, /* GL_TEXTURE_MAG_FILTER */ + { 7307, 0x00002801 }, /* GL_TEXTURE_MIN_FILTER */ + { 7329, 0x00002802 }, /* GL_TEXTURE_WRAP_S */ + { 7347, 0x00002803 }, /* GL_TEXTURE_WRAP_T */ + { 7365, 0x00002900 }, /* GL_CLAMP */ + { 7374, 0x00002901 }, /* GL_REPEAT */ + { 7384, 0x00002A00 }, /* GL_POLYGON_OFFSET_UNITS */ + { 7408, 0x00002A01 }, /* GL_POLYGON_OFFSET_POINT */ + { 7432, 0x00002A02 }, /* GL_POLYGON_OFFSET_LINE */ + { 7455, 0x00002A10 }, /* GL_R3_G3_B2 */ + { 7467, 0x00002A20 }, /* GL_V2F */ + { 7474, 0x00002A21 }, /* GL_V3F */ + { 7481, 0x00002A22 }, /* GL_C4UB_V2F */ + { 7493, 0x00002A23 }, /* GL_C4UB_V3F */ + { 7505, 0x00002A24 }, /* GL_C3F_V3F */ + { 7516, 0x00002A25 }, /* GL_N3F_V3F */ + { 7527, 0x00002A26 }, /* GL_C4F_N3F_V3F */ + { 7542, 0x00002A27 }, /* GL_T2F_V3F */ + { 7553, 0x00002A28 }, /* GL_T4F_V4F */ + { 7564, 0x00002A29 }, /* GL_T2F_C4UB_V3F */ + { 7580, 0x00002A2A }, /* GL_T2F_C3F_V3F */ + { 7595, 0x00002A2B }, /* GL_T2F_N3F_V3F */ + { 7610, 0x00002A2C }, /* GL_T2F_C4F_N3F_V3F */ + { 7629, 0x00002A2D }, /* GL_T4F_C4F_N3F_V4F */ + { 7648, 0x00003000 }, /* GL_CLIP_DISTANCE0 */ + { 7666, 0x00003001 }, /* GL_CLIP_DISTANCE1 */ + { 7684, 0x00003002 }, /* GL_CLIP_DISTANCE2 */ + { 7702, 0x00003003 }, /* GL_CLIP_DISTANCE3 */ + { 7720, 0x00003004 }, /* GL_CLIP_DISTANCE4 */ + { 7738, 0x00003005 }, /* GL_CLIP_DISTANCE5 */ + { 7756, 0x00003006 }, /* GL_CLIP_DISTANCE6 */ + { 7774, 0x00003007 }, /* GL_CLIP_DISTANCE7 */ + { 7792, 0x00004000 }, /* GL_LIGHT0 */ + { 7802, 0x00004001 }, /* GL_LIGHT1 */ + { 7812, 0x00004002 }, /* GL_LIGHT2 */ + { 7822, 0x00004003 }, /* GL_LIGHT3 */ + { 7832, 0x00004004 }, /* GL_LIGHT4 */ + { 7842, 0x00004005 }, /* GL_LIGHT5 */ + { 7852, 0x00004006 }, /* GL_LIGHT6 */ + { 7862, 0x00004007 }, /* GL_LIGHT7 */ + { 7872, 0x00008000 }, /* GL_ABGR_EXT */ + { 7884, 0x00008001 }, /* GL_CONSTANT_COLOR */ + { 7902, 0x00008002 }, /* GL_ONE_MINUS_CONSTANT_COLOR */ + { 7930, 0x00008003 }, /* GL_CONSTANT_ALPHA */ + { 7948, 0x00008004 }, /* GL_ONE_MINUS_CONSTANT_ALPHA */ + { 7976, 0x00008005 }, /* GL_BLEND_COLOR */ + { 7991, 0x00008006 }, /* GL_FUNC_ADD */ + { 8003, 0x00008007 }, /* GL_MIN */ + { 8010, 0x00008008 }, /* GL_MAX */ + { 8017, 0x00008009 }, /* GL_BLEND_EQUATION_RGB */ + { 8039, 0x0000800A }, /* GL_FUNC_SUBTRACT */ + { 8056, 0x0000800B }, /* GL_FUNC_REVERSE_SUBTRACT */ + { 8081, 0x0000800C }, /* GL_CMYK_EXT */ + { 8093, 0x0000800D }, /* GL_CMYKA_EXT */ + { 8106, 0x0000800E }, /* GL_PACK_CMYK_HINT_EXT */ + { 8128, 0x0000800F }, /* GL_UNPACK_CMYK_HINT_EXT */ + { 8152, 0x00008010 }, /* GL_CONVOLUTION_1D */ + { 8170, 0x00008011 }, /* GL_CONVOLUTION_2D */ + { 8188, 0x00008012 }, /* GL_SEPARABLE_2D */ + { 8204, 0x00008013 }, /* GL_CONVOLUTION_BORDER_MODE */ + { 8231, 0x00008014 }, /* GL_CONVOLUTION_FILTER_SCALE */ + { 8259, 0x00008015 }, /* GL_CONVOLUTION_FILTER_BIAS */ + { 8286, 0x00008016 }, /* GL_REDUCE */ + { 8296, 0x00008017 }, /* GL_CONVOLUTION_FORMAT */ + { 8318, 0x00008018 }, /* GL_CONVOLUTION_WIDTH */ + { 8339, 0x00008019 }, /* GL_CONVOLUTION_HEIGHT */ + { 8361, 0x0000801A }, /* GL_MAX_CONVOLUTION_WIDTH */ + { 8386, 0x0000801B }, /* GL_MAX_CONVOLUTION_HEIGHT */ + { 8412, 0x0000801C }, /* GL_POST_CONVOLUTION_RED_SCALE */ + { 8442, 0x0000801D }, /* GL_POST_CONVOLUTION_GREEN_SCALE */ + { 8474, 0x0000801E }, /* GL_POST_CONVOLUTION_BLUE_SCALE */ + { 8505, 0x0000801F }, /* GL_POST_CONVOLUTION_ALPHA_SCALE */ + { 8537, 0x00008020 }, /* GL_POST_CONVOLUTION_RED_BIAS */ + { 8566, 0x00008021 }, /* GL_POST_CONVOLUTION_GREEN_BIAS */ + { 8597, 0x00008022 }, /* GL_POST_CONVOLUTION_BLUE_BIAS */ + { 8627, 0x00008023 }, /* GL_POST_CONVOLUTION_ALPHA_BIAS */ + { 8658, 0x00008024 }, /* GL_HISTOGRAM */ + { 8671, 0x00008025 }, /* GL_PROXY_HISTOGRAM */ + { 8690, 0x00008026 }, /* GL_HISTOGRAM_WIDTH */ + { 8709, 0x00008027 }, /* GL_HISTOGRAM_FORMAT */ + { 8729, 0x00008028 }, /* GL_HISTOGRAM_RED_SIZE */ + { 8751, 0x00008029 }, /* GL_HISTOGRAM_GREEN_SIZE */ + { 8775, 0x0000802A }, /* GL_HISTOGRAM_BLUE_SIZE */ + { 8798, 0x0000802B }, /* GL_HISTOGRAM_ALPHA_SIZE */ + { 8822, 0x0000802C }, /* GL_HISTOGRAM_LUMINANCE_SIZE */ + { 8850, 0x0000802D }, /* GL_HISTOGRAM_SINK */ + { 8868, 0x0000802E }, /* GL_MINMAX */ + { 8878, 0x0000802F }, /* GL_MINMAX_FORMAT */ + { 8895, 0x00008030 }, /* GL_MINMAX_SINK */ + { 8910, 0x00008031 }, /* GL_TABLE_TOO_LARGE */ + { 8929, 0x00008032 }, /* GL_UNSIGNED_BYTE_3_3_2 */ + { 8952, 0x00008033 }, /* GL_UNSIGNED_SHORT_4_4_4_4 */ + { 8978, 0x00008034 }, /* GL_UNSIGNED_SHORT_5_5_5_1 */ + { 9004, 0x00008035 }, /* GL_UNSIGNED_INT_8_8_8_8 */ + { 9028, 0x00008036 }, /* GL_UNSIGNED_INT_10_10_10_2 */ + { 9055, 0x00008037 }, /* GL_POLYGON_OFFSET_FILL */ + { 9078, 0x00008038 }, /* GL_POLYGON_OFFSET_FACTOR */ + { 9103, 0x00008039 }, /* GL_POLYGON_OFFSET_BIAS_EXT */ + { 9130, 0x0000803A }, /* GL_RESCALE_NORMAL */ + { 9148, 0x0000803B }, /* GL_ALPHA4 */ + { 9158, 0x0000803C }, /* GL_ALPHA8 */ + { 9168, 0x0000803D }, /* GL_ALPHA12 */ + { 9179, 0x0000803E }, /* GL_ALPHA16 */ + { 9190, 0x0000803F }, /* GL_LUMINANCE4 */ + { 9204, 0x00008040 }, /* GL_LUMINANCE8 */ + { 9218, 0x00008041 }, /* GL_LUMINANCE12 */ + { 9233, 0x00008042 }, /* GL_LUMINANCE16 */ + { 9248, 0x00008043 }, /* GL_LUMINANCE4_ALPHA4 */ + { 9269, 0x00008044 }, /* GL_LUMINANCE6_ALPHA2 */ + { 9290, 0x00008045 }, /* GL_LUMINANCE8_ALPHA8 */ + { 9311, 0x00008046 }, /* GL_LUMINANCE12_ALPHA4 */ + { 9333, 0x00008047 }, /* GL_LUMINANCE12_ALPHA12 */ + { 9356, 0x00008048 }, /* GL_LUMINANCE16_ALPHA16 */ + { 9379, 0x00008049 }, /* GL_INTENSITY */ + { 9392, 0x0000804A }, /* GL_INTENSITY4 */ + { 9406, 0x0000804B }, /* GL_INTENSITY8 */ + { 9420, 0x0000804C }, /* GL_INTENSITY12 */ + { 9435, 0x0000804D }, /* GL_INTENSITY16 */ + { 9450, 0x0000804E }, /* GL_RGB2_EXT */ + { 9462, 0x0000804F }, /* GL_RGB4 */ + { 9470, 0x00008050 }, /* GL_RGB5 */ + { 9478, 0x00008051 }, /* GL_RGB8 */ + { 9486, 0x00008052 }, /* GL_RGB10 */ + { 9495, 0x00008053 }, /* GL_RGB12 */ + { 9504, 0x00008054 }, /* GL_RGB16 */ + { 9513, 0x00008055 }, /* GL_RGBA2 */ + { 9522, 0x00008056 }, /* GL_RGBA4 */ + { 9531, 0x00008057 }, /* GL_RGB5_A1 */ + { 9542, 0x00008058 }, /* GL_RGBA8 */ + { 9551, 0x00008059 }, /* GL_RGB10_A2 */ + { 9563, 0x0000805A }, /* GL_RGBA12 */ + { 9573, 0x0000805B }, /* GL_RGBA16 */ + { 9583, 0x0000805C }, /* GL_TEXTURE_RED_SIZE */ + { 9603, 0x0000805D }, /* GL_TEXTURE_GREEN_SIZE */ + { 9625, 0x0000805E }, /* GL_TEXTURE_BLUE_SIZE */ + { 9646, 0x0000805F }, /* GL_TEXTURE_ALPHA_SIZE */ + { 9668, 0x00008060 }, /* GL_TEXTURE_LUMINANCE_SIZE */ + { 9694, 0x00008061 }, /* GL_TEXTURE_INTENSITY_SIZE */ + { 9720, 0x00008062 }, /* GL_REPLACE_EXT */ + { 9735, 0x00008063 }, /* GL_PROXY_TEXTURE_1D */ + { 9755, 0x00008064 }, /* GL_PROXY_TEXTURE_2D */ + { 9775, 0x00008065 }, /* GL_TEXTURE_TOO_LARGE_EXT */ + { 9800, 0x00008066 }, /* GL_TEXTURE_PRIORITY */ + { 9820, 0x00008067 }, /* GL_TEXTURE_RESIDENT */ + { 9840, 0x00008068 }, /* GL_TEXTURE_BINDING_1D */ + { 9862, 0x00008069 }, /* GL_TEXTURE_BINDING_2D */ + { 9884, 0x0000806A }, /* GL_TEXTURE_BINDING_3D */ + { 9906, 0x0000806B }, /* GL_PACK_SKIP_IMAGES */ + { 9926, 0x0000806C }, /* GL_PACK_IMAGE_HEIGHT */ + { 9947, 0x0000806D }, /* GL_UNPACK_SKIP_IMAGES */ + { 9969, 0x0000806E }, /* GL_UNPACK_IMAGE_HEIGHT */ + { 9992, 0x0000806F }, /* GL_TEXTURE_3D */ + { 10006, 0x00008070 }, /* GL_PROXY_TEXTURE_3D */ + { 10026, 0x00008071 }, /* GL_TEXTURE_DEPTH */ + { 10043, 0x00008072 }, /* GL_TEXTURE_WRAP_R */ + { 10061, 0x00008073 }, /* GL_MAX_3D_TEXTURE_SIZE */ + { 10084, 0x00008074 }, /* GL_VERTEX_ARRAY */ + { 10100, 0x00008075 }, /* GL_NORMAL_ARRAY */ + { 10116, 0x00008076 }, /* GL_COLOR_ARRAY */ + { 10131, 0x00008077 }, /* GL_INDEX_ARRAY */ + { 10146, 0x00008078 }, /* GL_TEXTURE_COORD_ARRAY */ + { 10169, 0x00008079 }, /* GL_EDGE_FLAG_ARRAY */ + { 10188, 0x0000807A }, /* GL_VERTEX_ARRAY_SIZE */ + { 10209, 0x0000807B }, /* GL_VERTEX_ARRAY_TYPE */ + { 10230, 0x0000807C }, /* GL_VERTEX_ARRAY_STRIDE */ + { 10253, 0x0000807D }, /* GL_VERTEX_ARRAY_COUNT_EXT */ + { 10279, 0x0000807E }, /* GL_NORMAL_ARRAY_TYPE */ + { 10300, 0x0000807F }, /* GL_NORMAL_ARRAY_STRIDE */ + { 10323, 0x00008080 }, /* GL_NORMAL_ARRAY_COUNT_EXT */ + { 10349, 0x00008081 }, /* GL_COLOR_ARRAY_SIZE */ + { 10369, 0x00008082 }, /* GL_COLOR_ARRAY_TYPE */ + { 10389, 0x00008083 }, /* GL_COLOR_ARRAY_STRIDE */ + { 10411, 0x00008084 }, /* GL_COLOR_ARRAY_COUNT_EXT */ + { 10436, 0x00008085 }, /* GL_INDEX_ARRAY_TYPE */ + { 10456, 0x00008086 }, /* GL_INDEX_ARRAY_STRIDE */ + { 10478, 0x00008087 }, /* GL_INDEX_ARRAY_COUNT_EXT */ + { 10503, 0x00008088 }, /* GL_TEXTURE_COORD_ARRAY_SIZE */ + { 10531, 0x00008089 }, /* GL_TEXTURE_COORD_ARRAY_TYPE */ + { 10559, 0x0000808A }, /* GL_TEXTURE_COORD_ARRAY_STRIDE */ + { 10589, 0x0000808B }, /* GL_TEXTURE_COORD_ARRAY_COUNT_EXT */ + { 10622, 0x0000808C }, /* GL_EDGE_FLAG_ARRAY_STRIDE */ + { 10648, 0x0000808D }, /* GL_EDGE_FLAG_ARRAY_COUNT_EXT */ + { 10677, 0x0000808E }, /* GL_VERTEX_ARRAY_POINTER */ + { 10701, 0x0000808F }, /* GL_NORMAL_ARRAY_POINTER */ + { 10725, 0x00008090 }, /* GL_COLOR_ARRAY_POINTER */ + { 10748, 0x00008091 }, /* GL_INDEX_ARRAY_POINTER */ + { 10771, 0x00008092 }, /* GL_TEXTURE_COORD_ARRAY_POINTER */ + { 10802, 0x00008093 }, /* GL_EDGE_FLAG_ARRAY_POINTER */ + { 10829, 0x00008094 }, /* GL_INTERLACE_SGIX */ + { 10847, 0x00008095 }, /* GL_DETAIL_TEXTURE_2D_SGIS */ + { 10873, 0x00008096 }, /* GL_DETAIL_TEXTURE_2D_BINDING_SGIS */ + { 10907, 0x00008097 }, /* GL_LINEAR_DETAIL_SGIS */ + { 10929, 0x00008098 }, /* GL_LINEAR_DETAIL_ALPHA_SGIS */ + { 10957, 0x00008099 }, /* GL_LINEAR_DETAIL_COLOR_SGIS */ + { 10985, 0x0000809A }, /* GL_DETAIL_TEXTURE_LEVEL_SGIS */ + { 11014, 0x0000809B }, /* GL_DETAIL_TEXTURE_MODE_SGIS */ + { 11042, 0x0000809C }, /* GL_DETAIL_TEXTURE_FUNC_POINTS_SGIS */ + { 11077, 0x0000809D }, /* GL_MULTISAMPLE */ + { 11092, 0x0000809E }, /* GL_SAMPLE_ALPHA_TO_COVERAGE */ + { 11120, 0x0000809F }, /* GL_SAMPLE_ALPHA_TO_ONE */ + { 11143, 0x000080A0 }, /* GL_SAMPLE_COVERAGE */ + { 11162, 0x000080A1 }, /* GL_1PASS_EXT */ + { 11175, 0x000080A2 }, /* GL_2PASS_0_EXT */ + { 11190, 0x000080A3 }, /* GL_2PASS_1_EXT */ + { 11205, 0x000080A4 }, /* GL_4PASS_0_EXT */ + { 11220, 0x000080A5 }, /* GL_4PASS_1_EXT */ + { 11235, 0x000080A6 }, /* GL_4PASS_2_EXT */ + { 11250, 0x000080A7 }, /* GL_4PASS_3_EXT */ + { 11265, 0x000080A8 }, /* GL_SAMPLE_BUFFERS */ + { 11283, 0x000080A9 }, /* GL_SAMPLES */ + { 11294, 0x000080AA }, /* GL_SAMPLE_COVERAGE_VALUE */ + { 11319, 0x000080AB }, /* GL_SAMPLE_COVERAGE_INVERT */ + { 11345, 0x000080AC }, /* GL_SAMPLE_PATTERN_EXT */ + { 11367, 0x000080AD }, /* GL_LINEAR_SHARPEN_SGIS */ + { 11390, 0x000080AE }, /* GL_LINEAR_SHARPEN_ALPHA_SGIS */ + { 11419, 0x000080AF }, /* GL_LINEAR_SHARPEN_COLOR_SGIS */ + { 11448, 0x000080B0 }, /* GL_SHARPEN_TEXTURE_FUNC_POINTS_SGIS */ + { 11484, 0x000080B1 }, /* GL_COLOR_MATRIX */ + { 11500, 0x000080B2 }, /* GL_COLOR_MATRIX_STACK_DEPTH */ + { 11528, 0x000080B3 }, /* GL_MAX_COLOR_MATRIX_STACK_DEPTH */ + { 11560, 0x000080B4 }, /* GL_POST_COLOR_MATRIX_RED_SCALE */ + { 11591, 0x000080B5 }, /* GL_POST_COLOR_MATRIX_GREEN_SCALE */ + { 11624, 0x000080B6 }, /* GL_POST_COLOR_MATRIX_BLUE_SCALE */ + { 11656, 0x000080B7 }, /* GL_POST_COLOR_MATRIX_ALPHA_SCALE */ + { 11689, 0x000080B8 }, /* GL_POST_COLOR_MATRIX_RED_BIAS */ + { 11719, 0x000080B9 }, /* GL_POST_COLOR_MATRIX_GREEN_BIAS */ + { 11751, 0x000080BA }, /* GL_POST_COLOR_MATRIX_BLUE_BIAS */ + { 11782, 0x000080BB }, /* GL_POST_COLOR_MATRIX_ALPHA_BIAS */ + { 11814, 0x000080BC }, /* GL_TEXTURE_COLOR_TABLE_SGI */ + { 11841, 0x000080BD }, /* GL_PROXY_TEXTURE_COLOR_TABLE_SGI */ + { 11874, 0x000080BE }, /* GL_TEXTURE_ENV_BIAS_SGIX */ + { 11899, 0x000080BF }, /* GL_TEXTURE_COMPARE_FAIL_VALUE_ARB */ + { 11933, 0x000080C8 }, /* GL_BLEND_DST_RGB */ + { 11950, 0x000080C9 }, /* GL_BLEND_SRC_RGB */ + { 11967, 0x000080CA }, /* GL_BLEND_DST_ALPHA */ + { 11986, 0x000080CB }, /* GL_BLEND_SRC_ALPHA */ + { 12005, 0x000080CC }, /* GL_422_EXT */ + { 12016, 0x000080CD }, /* GL_422_REV_EXT */ + { 12031, 0x000080CE }, /* GL_422_AVERAGE_EXT */ + { 12050, 0x000080CF }, /* GL_422_REV_AVERAGE_EXT */ + { 12073, 0x000080D0 }, /* GL_COLOR_TABLE */ + { 12088, 0x000080D1 }, /* GL_POST_CONVOLUTION_COLOR_TABLE */ + { 12120, 0x000080D2 }, /* GL_POST_COLOR_MATRIX_COLOR_TABLE */ + { 12153, 0x000080D3 }, /* GL_PROXY_COLOR_TABLE */ + { 12174, 0x000080D4 }, /* GL_PROXY_POST_CONVOLUTION_COLOR_TABLE */ + { 12212, 0x000080D5 }, /* GL_PROXY_POST_COLOR_MATRIX_COLOR_TABLE */ + { 12251, 0x000080D6 }, /* GL_COLOR_TABLE_SCALE */ + { 12272, 0x000080D7 }, /* GL_COLOR_TABLE_BIAS */ + { 12292, 0x000080D8 }, /* GL_COLOR_TABLE_FORMAT */ + { 12314, 0x000080D9 }, /* GL_COLOR_TABLE_WIDTH */ + { 12335, 0x000080DA }, /* GL_COLOR_TABLE_RED_SIZE */ + { 12359, 0x000080DB }, /* GL_COLOR_TABLE_GREEN_SIZE */ + { 12385, 0x000080DC }, /* GL_COLOR_TABLE_BLUE_SIZE */ + { 12410, 0x000080DD }, /* GL_COLOR_TABLE_ALPHA_SIZE */ + { 12436, 0x000080DE }, /* GL_COLOR_TABLE_LUMINANCE_SIZE */ + { 12466, 0x000080DF }, /* GL_COLOR_TABLE_INTENSITY_SIZE */ + { 12496, 0x000080E0 }, /* GL_BGR */ + { 12503, 0x000080E1 }, /* GL_BGRA */ + { 12511, 0x000080E2 }, /* GL_COLOR_INDEX1_EXT */ + { 12531, 0x000080E3 }, /* GL_COLOR_INDEX2_EXT */ + { 12551, 0x000080E4 }, /* GL_COLOR_INDEX4_EXT */ + { 12571, 0x000080E5 }, /* GL_COLOR_INDEX8_EXT */ + { 12591, 0x000080E6 }, /* GL_COLOR_INDEX12_EXT */ + { 12612, 0x000080E7 }, /* GL_COLOR_INDEX16_EXT */ + { 12633, 0x000080E8 }, /* GL_MAX_ELEMENTS_VERTICES */ + { 12658, 0x000080E9 }, /* GL_MAX_ELEMENTS_INDICES */ + { 12682, 0x000080EA }, /* GL_PHONG_WIN */ + { 12695, 0x000080EB }, /* GL_PHONG_HINT_WIN */ + { 12713, 0x000080EC }, /* GL_FOG_SPECULAR_TEXTURE_WIN */ + { 12741, 0x000080ED }, /* GL_TEXTURE_INDEX_SIZE_EXT */ + { 12767, 0x000080EE }, /* GL_PARAMETER_BUFFER_ARB */ + { 12791, 0x000080EF }, /* GL_PARAMETER_BUFFER_BINDING_ARB */ + { 12823, 0x000080F0 }, /* GL_CLIP_VOLUME_CLIPPING_HINT_EXT */ + { 12856, 0x00008110 }, /* GL_DUAL_ALPHA4_SGIS */ + { 12876, 0x00008111 }, /* GL_DUAL_ALPHA8_SGIS */ + { 12896, 0x00008112 }, /* GL_DUAL_ALPHA12_SGIS */ + { 12917, 0x00008113 }, /* GL_DUAL_ALPHA16_SGIS */ + { 12938, 0x00008114 }, /* GL_DUAL_LUMINANCE4_SGIS */ + { 12962, 0x00008115 }, /* GL_DUAL_LUMINANCE8_SGIS */ + { 12986, 0x00008116 }, /* GL_DUAL_LUMINANCE12_SGIS */ + { 13011, 0x00008117 }, /* GL_DUAL_LUMINANCE16_SGIS */ + { 13036, 0x00008118 }, /* GL_DUAL_INTENSITY4_SGIS */ + { 13060, 0x00008119 }, /* GL_DUAL_INTENSITY8_SGIS */ + { 13084, 0x0000811A }, /* GL_DUAL_INTENSITY12_SGIS */ + { 13109, 0x0000811B }, /* GL_DUAL_INTENSITY16_SGIS */ + { 13134, 0x0000811C }, /* GL_DUAL_LUMINANCE_ALPHA4_SGIS */ + { 13164, 0x0000811D }, /* GL_DUAL_LUMINANCE_ALPHA8_SGIS */ + { 13194, 0x0000811E }, /* GL_QUAD_ALPHA4_SGIS */ + { 13214, 0x0000811F }, /* GL_QUAD_ALPHA8_SGIS */ + { 13234, 0x00008120 }, /* GL_QUAD_LUMINANCE4_SGIS */ + { 13258, 0x00008121 }, /* GL_QUAD_LUMINANCE8_SGIS */ + { 13282, 0x00008122 }, /* GL_QUAD_INTENSITY4_SGIS */ + { 13306, 0x00008123 }, /* GL_QUAD_INTENSITY8_SGIS */ + { 13330, 0x00008124 }, /* GL_DUAL_TEXTURE_SELECT_SGIS */ + { 13358, 0x00008125 }, /* GL_QUAD_TEXTURE_SELECT_SGIS */ + { 13386, 0x00008126 }, /* GL_POINT_SIZE_MIN */ + { 13404, 0x00008127 }, /* GL_POINT_SIZE_MAX */ + { 13422, 0x00008128 }, /* GL_POINT_FADE_THRESHOLD_SIZE */ + { 13451, 0x00008129 }, /* GL_POINT_DISTANCE_ATTENUATION */ + { 13481, 0x0000812A }, /* GL_FOG_FUNC_SGIS */ + { 13498, 0x0000812B }, /* GL_FOG_FUNC_POINTS_SGIS */ + { 13522, 0x0000812C }, /* GL_MAX_FOG_FUNC_POINTS_SGIS */ + { 13550, 0x0000812D }, /* GL_CLAMP_TO_BORDER */ + { 13569, 0x0000812E }, /* GL_TEXTURE_MULTI_BUFFER_HINT_SGIX */ + { 13603, 0x0000812F }, /* GL_CLAMP_TO_EDGE */ + { 13620, 0x00008130 }, /* GL_PACK_SKIP_VOLUMES_SGIS */ + { 13646, 0x00008131 }, /* GL_PACK_IMAGE_DEPTH_SGIS */ + { 13671, 0x00008132 }, /* GL_UNPACK_SKIP_VOLUMES_SGIS */ + { 13699, 0x00008133 }, /* GL_UNPACK_IMAGE_DEPTH_SGIS */ + { 13726, 0x00008134 }, /* GL_TEXTURE_4D_SGIS */ + { 13745, 0x00008135 }, /* GL_PROXY_TEXTURE_4D_SGIS */ + { 13770, 0x00008136 }, /* GL_TEXTURE_4DSIZE_SGIS */ + { 13793, 0x00008137 }, /* GL_TEXTURE_WRAP_Q_SGIS */ + { 13816, 0x00008138 }, /* GL_MAX_4D_TEXTURE_SIZE_SGIS */ + { 13844, 0x00008139 }, /* GL_PIXEL_TEX_GEN_SGIX */ + { 13866, 0x0000813A }, /* GL_TEXTURE_MIN_LOD */ + { 13885, 0x0000813B }, /* GL_TEXTURE_MAX_LOD */ + { 13904, 0x0000813C }, /* GL_TEXTURE_BASE_LEVEL */ + { 13926, 0x0000813D }, /* GL_TEXTURE_MAX_LEVEL */ + { 13947, 0x0000813E }, /* GL_PIXEL_TILE_BEST_ALIGNMENT_SGIX */ + { 13981, 0x0000813F }, /* GL_PIXEL_TILE_CACHE_INCREMENT_SGIX */ + { 14016, 0x00008140 }, /* GL_PIXEL_TILE_WIDTH_SGIX */ + { 14041, 0x00008141 }, /* GL_PIXEL_TILE_HEIGHT_SGIX */ + { 14067, 0x00008142 }, /* GL_PIXEL_TILE_GRID_WIDTH_SGIX */ + { 14097, 0x00008143 }, /* GL_PIXEL_TILE_GRID_HEIGHT_SGIX */ + { 14128, 0x00008144 }, /* GL_PIXEL_TILE_GRID_DEPTH_SGIX */ + { 14158, 0x00008145 }, /* GL_PIXEL_TILE_CACHE_SIZE_SGIX */ + { 14188, 0x00008146 }, /* GL_FILTER4_SGIS */ + { 14204, 0x00008147 }, /* GL_TEXTURE_FILTER4_SIZE_SGIS */ + { 14233, 0x00008148 }, /* GL_SPRITE_SGIX */ + { 14248, 0x00008149 }, /* GL_SPRITE_MODE_SGIX */ + { 14268, 0x0000814A }, /* GL_SPRITE_AXIS_SGIX */ + { 14288, 0x0000814B }, /* GL_SPRITE_TRANSLATION_SGIX */ + { 14315, 0x0000814C }, /* GL_SPRITE_AXIAL_SGIX */ + { 14336, 0x0000814D }, /* GL_SPRITE_OBJECT_ALIGNED_SGIX */ + { 14366, 0x0000814E }, /* GL_SPRITE_EYE_ALIGNED_SGIX */ + { 14393, 0x0000814F }, /* GL_TEXTURE_4D_BINDING_SGIS */ + { 14420, 0x00008150 }, /* GL_IGNORE_BORDER_HP */ + { 14440, 0x00008151 }, /* GL_CONSTANT_BORDER */ + { 14459, 0x00008153 }, /* GL_REPLICATE_BORDER */ + { 14479, 0x00008154 }, /* GL_CONVOLUTION_BORDER_COLOR */ + { 14507, 0x00008155 }, /* GL_IMAGE_SCALE_X_HP */ + { 14527, 0x00008156 }, /* GL_IMAGE_SCALE_Y_HP */ + { 14547, 0x00008157 }, /* GL_IMAGE_TRANSLATE_X_HP */ + { 14571, 0x00008158 }, /* GL_IMAGE_TRANSLATE_Y_HP */ + { 14595, 0x00008159 }, /* GL_IMAGE_ROTATE_ANGLE_HP */ + { 14620, 0x0000815A }, /* GL_IMAGE_ROTATE_ORIGIN_X_HP */ + { 14648, 0x0000815B }, /* GL_IMAGE_ROTATE_ORIGIN_Y_HP */ + { 14676, 0x0000815C }, /* GL_IMAGE_MAG_FILTER_HP */ + { 14699, 0x0000815D }, /* GL_IMAGE_MIN_FILTER_HP */ + { 14722, 0x0000815E }, /* GL_IMAGE_CUBIC_WEIGHT_HP */ + { 14747, 0x0000815F }, /* GL_CUBIC_HP */ + { 14759, 0x00008160 }, /* GL_AVERAGE_HP */ + { 14773, 0x00008161 }, /* GL_IMAGE_TRANSFORM_2D_HP */ + { 14798, 0x00008162 }, /* GL_POST_IMAGE_TRANSFORM_COLOR_TABLE_HP */ + { 14837, 0x00008163 }, /* GL_PROXY_POST_IMAGE_TRANSFORM_COLOR_TABLE_HP */ + { 14882, 0x00008165 }, /* GL_OCCLUSION_TEST_HP */ + { 14903, 0x00008166 }, /* GL_OCCLUSION_TEST_RESULT_HP */ + { 14931, 0x00008167 }, /* GL_TEXTURE_LIGHTING_MODE_HP */ + { 14959, 0x00008168 }, /* GL_TEXTURE_POST_SPECULAR_HP */ + { 14987, 0x00008169 }, /* GL_TEXTURE_PRE_SPECULAR_HP */ + { 15014, 0x00008170 }, /* GL_LINEAR_CLIPMAP_LINEAR_SGIX */ + { 15044, 0x00008171 }, /* GL_TEXTURE_CLIPMAP_CENTER_SGIX */ + { 15075, 0x00008172 }, /* GL_TEXTURE_CLIPMAP_FRAME_SGIX */ + { 15105, 0x00008173 }, /* GL_TEXTURE_CLIPMAP_OFFSET_SGIX */ + { 15136, 0x00008174 }, /* GL_TEXTURE_CLIPMAP_VIRTUAL_DEPTH_SGIX */ + { 15174, 0x00008175 }, /* GL_TEXTURE_CLIPMAP_LOD_OFFSET_SGIX */ + { 15209, 0x00008176 }, /* GL_TEXTURE_CLIPMAP_DEPTH_SGIX */ + { 15239, 0x00008177 }, /* GL_MAX_CLIPMAP_DEPTH_SGIX */ + { 15265, 0x00008178 }, /* GL_MAX_CLIPMAP_VIRTUAL_DEPTH_SGIX */ + { 15299, 0x00008179 }, /* GL_POST_TEXTURE_FILTER_BIAS_SGIX */ + { 15332, 0x0000817A }, /* GL_POST_TEXTURE_FILTER_SCALE_SGIX */ + { 15366, 0x0000817B }, /* GL_POST_TEXTURE_FILTER_BIAS_RANGE_SGIX */ + { 15405, 0x0000817C }, /* GL_POST_TEXTURE_FILTER_SCALE_RANGE_SGIX */ + { 15445, 0x0000817D }, /* GL_REFERENCE_PLANE_SGIX */ + { 15469, 0x0000817E }, /* GL_REFERENCE_PLANE_EQUATION_SGIX */ + { 15502, 0x0000817F }, /* GL_IR_INSTRUMENT1_SGIX */ + { 15525, 0x00008180 }, /* GL_INSTRUMENT_BUFFER_POINTER_SGIX */ + { 15559, 0x00008181 }, /* GL_INSTRUMENT_MEASUREMENTS_SGIX */ + { 15591, 0x00008182 }, /* GL_LIST_PRIORITY_SGIX */ + { 15613, 0x00008183 }, /* GL_CALLIGRAPHIC_FRAGMENT_SGIX */ + { 15643, 0x0000818B }, /* GL_FRAMEZOOM_SGIX */ + { 15661, 0x0000818C }, /* GL_FRAMEZOOM_FACTOR_SGIX */ + { 15686, 0x0000818D }, /* GL_MAX_FRAMEZOOM_FACTOR_SGIX */ + { 15715, 0x0000818E }, /* GL_TEXTURE_LOD_BIAS_S_SGIX */ + { 15742, 0x0000818F }, /* GL_TEXTURE_LOD_BIAS_T_SGIX */ + { 15769, 0x00008190 }, /* GL_TEXTURE_LOD_BIAS_R_SGIX */ + { 15796, 0x00008191 }, /* GL_GENERATE_MIPMAP */ + { 15815, 0x00008192 }, /* GL_GENERATE_MIPMAP_HINT */ + { 15839, 0x00008194 }, /* GL_GEOMETRY_DEFORMATION_SGIX */ + { 15868, 0x00008195 }, /* GL_TEXTURE_DEFORMATION_SGIX */ + { 15896, 0x00008196 }, /* GL_DEFORMATIONS_MASK_SGIX */ + { 15922, 0x00008197 }, /* GL_MAX_DEFORMATION_ORDER_SGIX */ + { 15952, 0x00008198 }, /* GL_FOG_OFFSET_SGIX */ + { 15971, 0x00008199 }, /* GL_FOG_OFFSET_VALUE_SGIX */ + { 15996, 0x0000819A }, /* GL_TEXTURE_COMPARE_SGIX */ + { 16020, 0x0000819B }, /* GL_TEXTURE_COMPARE_OPERATOR_SGIX */ + { 16053, 0x0000819C }, /* GL_TEXTURE_LEQUAL_R_SGIX */ + { 16078, 0x0000819D }, /* GL_TEXTURE_GEQUAL_R_SGIX */ + { 16103, 0x000081A5 }, /* GL_DEPTH_COMPONENT16 */ + { 16124, 0x000081A6 }, /* GL_DEPTH_COMPONENT24 */ + { 16145, 0x000081A7 }, /* GL_DEPTH_COMPONENT32 */ + { 16166, 0x000081A8 }, /* GL_ARRAY_ELEMENT_LOCK_FIRST_EXT */ + { 16198, 0x000081A9 }, /* GL_ARRAY_ELEMENT_LOCK_COUNT_EXT */ + { 16230, 0x000081AA }, /* GL_CULL_VERTEX_EXT */ + { 16249, 0x000081AB }, /* GL_CULL_VERTEX_EYE_POSITION_EXT */ + { 16281, 0x000081AC }, /* GL_CULL_VERTEX_OBJECT_POSITION_EXT */ + { 16316, 0x000081AD }, /* GL_IUI_V2F_EXT */ + { 16331, 0x000081AE }, /* GL_IUI_V3F_EXT */ + { 16346, 0x000081AF }, /* GL_IUI_N3F_V2F_EXT */ + { 16365, 0x000081B0 }, /* GL_IUI_N3F_V3F_EXT */ + { 16384, 0x000081B1 }, /* GL_T2F_IUI_V2F_EXT */ + { 16403, 0x000081B2 }, /* GL_T2F_IUI_V3F_EXT */ + { 16422, 0x000081B3 }, /* GL_T2F_IUI_N3F_V2F_EXT */ + { 16445, 0x000081B4 }, /* GL_T2F_IUI_N3F_V3F_EXT */ + { 16468, 0x000081B5 }, /* GL_INDEX_TEST_EXT */ + { 16486, 0x000081B6 }, /* GL_INDEX_TEST_FUNC_EXT */ + { 16509, 0x000081B7 }, /* GL_INDEX_TEST_REF_EXT */ + { 16531, 0x000081B8 }, /* GL_INDEX_MATERIAL_EXT */ + { 16553, 0x000081B9 }, /* GL_INDEX_MATERIAL_PARAMETER_EXT */ + { 16585, 0x000081BA }, /* GL_INDEX_MATERIAL_FACE_EXT */ + { 16612, 0x000081BB }, /* GL_YCRCB_422_SGIX */ + { 16630, 0x000081BC }, /* GL_YCRCB_444_SGIX */ + { 16648, 0x000081D4 }, /* GL_WRAP_BORDER_SUN */ + { 16667, 0x000081D5 }, /* GL_UNPACK_CONSTANT_DATA_SUNX */ + { 16696, 0x000081D6 }, /* GL_TEXTURE_CONSTANT_DATA_SUNX */ + { 16726, 0x000081D7 }, /* GL_TRIANGLE_LIST_SUN */ + { 16747, 0x000081D8 }, /* GL_REPLACEMENT_CODE_SUN */ + { 16771, 0x000081D9 }, /* GL_GLOBAL_ALPHA_SUN */ + { 16791, 0x000081DA }, /* GL_GLOBAL_ALPHA_FACTOR_SUN */ + { 16818, 0x000081EF }, /* GL_TEXTURE_COLOR_WRITEMASK_SGIS */ + { 16850, 0x000081F0 }, /* GL_EYE_DISTANCE_TO_POINT_SGIS */ + { 16880, 0x000081F1 }, /* GL_OBJECT_DISTANCE_TO_POINT_SGIS */ + { 16913, 0x000081F2 }, /* GL_EYE_DISTANCE_TO_LINE_SGIS */ + { 16942, 0x000081F3 }, /* GL_OBJECT_DISTANCE_TO_LINE_SGIS */ + { 16974, 0x000081F4 }, /* GL_EYE_POINT_SGIS */ + { 16992, 0x000081F5 }, /* GL_OBJECT_POINT_SGIS */ + { 17013, 0x000081F6 }, /* GL_EYE_LINE_SGIS */ + { 17030, 0x000081F7 }, /* GL_OBJECT_LINE_SGIS */ + { 17050, 0x000081F8 }, /* GL_LIGHT_MODEL_COLOR_CONTROL */ + { 17079, 0x000081F9 }, /* GL_SINGLE_COLOR */ + { 17095, 0x000081FA }, /* GL_SEPARATE_SPECULAR_COLOR */ + { 17122, 0x000081FB }, /* GL_SHARED_TEXTURE_PALETTE_EXT */ + { 17152, 0x00008200 }, /* GL_TEXT_FRAGMENT_SHADER_ATI */ + { 17180, 0x00008210 }, /* GL_FRAMEBUFFER_ATTACHMENT_COLOR_ENCODING */ + { 17221, 0x00008211 }, /* GL_FRAMEBUFFER_ATTACHMENT_COMPONENT_TYPE */ + { 17262, 0x00008212 }, /* GL_FRAMEBUFFER_ATTACHMENT_RED_SIZE */ + { 17297, 0x00008213 }, /* GL_FRAMEBUFFER_ATTACHMENT_GREEN_SIZE */ + { 17334, 0x00008214 }, /* GL_FRAMEBUFFER_ATTACHMENT_BLUE_SIZE */ + { 17370, 0x00008215 }, /* GL_FRAMEBUFFER_ATTACHMENT_ALPHA_SIZE */ + { 17407, 0x00008216 }, /* GL_FRAMEBUFFER_ATTACHMENT_DEPTH_SIZE */ + { 17444, 0x00008217 }, /* GL_FRAMEBUFFER_ATTACHMENT_STENCIL_SIZE */ + { 17483, 0x00008218 }, /* GL_FRAMEBUFFER_DEFAULT */ + { 17506, 0x00008219 }, /* GL_FRAMEBUFFER_UNDEFINED */ + { 17531, 0x0000821A }, /* GL_DEPTH_STENCIL_ATTACHMENT */ + { 17559, 0x0000821B }, /* GL_MAJOR_VERSION */ + { 17576, 0x0000821C }, /* GL_MINOR_VERSION */ + { 17593, 0x0000821D }, /* GL_NUM_EXTENSIONS */ + { 17611, 0x0000821E }, /* GL_CONTEXT_FLAGS */ + { 17628, 0x0000821F }, /* GL_BUFFER_IMMUTABLE_STORAGE */ + { 17656, 0x00008220 }, /* GL_BUFFER_STORAGE_FLAGS */ + { 17680, 0x00008221 }, /* GL_PRIMITIVE_RESTART_FOR_PATCHES_SUPPORTED */ + { 17723, 0x00008222 }, /* GL_INDEX */ + { 17732, 0x00008225 }, /* GL_COMPRESSED_RED */ + { 17750, 0x00008226 }, /* GL_COMPRESSED_RG */ + { 17767, 0x00008227 }, /* GL_RG */ + { 17773, 0x00008228 }, /* GL_RG_INTEGER */ + { 17787, 0x00008229 }, /* GL_R8 */ + { 17793, 0x0000822A }, /* GL_R16 */ + { 17800, 0x0000822B }, /* GL_RG8 */ + { 17807, 0x0000822C }, /* GL_RG16 */ + { 17815, 0x0000822D }, /* GL_R16F */ + { 17823, 0x0000822E }, /* GL_R32F */ + { 17831, 0x0000822F }, /* GL_RG16F */ + { 17840, 0x00008230 }, /* GL_RG32F */ + { 17849, 0x00008231 }, /* GL_R8I */ + { 17856, 0x00008232 }, /* GL_R8UI */ + { 17864, 0x00008233 }, /* GL_R16I */ + { 17872, 0x00008234 }, /* GL_R16UI */ + { 17881, 0x00008235 }, /* GL_R32I */ + { 17889, 0x00008236 }, /* GL_R32UI */ + { 17898, 0x00008237 }, /* GL_RG8I */ + { 17906, 0x00008238 }, /* GL_RG8UI */ + { 17915, 0x00008239 }, /* GL_RG16I */ + { 17924, 0x0000823A }, /* GL_RG16UI */ + { 17934, 0x0000823B }, /* GL_RG32I */ + { 17943, 0x0000823C }, /* GL_RG32UI */ + { 17953, 0x00008240 }, /* GL_SYNC_CL_EVENT_ARB */ + { 17974, 0x00008241 }, /* GL_SYNC_CL_EVENT_COMPLETE_ARB */ + { 18004, 0x00008242 }, /* GL_DEBUG_OUTPUT_SYNCHRONOUS */ + { 18032, 0x00008243 }, /* GL_DEBUG_NEXT_LOGGED_MESSAGE_LENGTH */ + { 18068, 0x00008244 }, /* GL_DEBUG_CALLBACK_FUNCTION */ + { 18095, 0x00008245 }, /* GL_DEBUG_CALLBACK_USER_PARAM */ + { 18124, 0x00008246 }, /* GL_DEBUG_SOURCE_API */ + { 18144, 0x00008247 }, /* GL_DEBUG_SOURCE_WINDOW_SYSTEM */ + { 18174, 0x00008248 }, /* GL_DEBUG_SOURCE_SHADER_COMPILER */ + { 18206, 0x00008249 }, /* GL_DEBUG_SOURCE_THIRD_PARTY */ + { 18234, 0x0000824A }, /* GL_DEBUG_SOURCE_APPLICATION */ + { 18262, 0x0000824B }, /* GL_DEBUG_SOURCE_OTHER */ + { 18284, 0x0000824C }, /* GL_DEBUG_TYPE_ERROR */ + { 18304, 0x0000824D }, /* GL_DEBUG_TYPE_DEPRECATED_BEHAVIOR */ + { 18338, 0x0000824E }, /* GL_DEBUG_TYPE_UNDEFINED_BEHAVIOR */ + { 18371, 0x0000824F }, /* GL_DEBUG_TYPE_PORTABILITY */ + { 18397, 0x00008250 }, /* GL_DEBUG_TYPE_PERFORMANCE */ + { 18423, 0x00008251 }, /* GL_DEBUG_TYPE_OTHER */ + { 18443, 0x00008252 }, /* GL_LOSE_CONTEXT_ON_RESET */ + { 18468, 0x00008253 }, /* GL_GUILTY_CONTEXT_RESET */ + { 18492, 0x00008254 }, /* GL_INNOCENT_CONTEXT_RESET */ + { 18518, 0x00008255 }, /* GL_UNKNOWN_CONTEXT_RESET */ + { 18543, 0x00008256 }, /* GL_RESET_NOTIFICATION_STRATEGY */ + { 18574, 0x00008257 }, /* GL_PROGRAM_BINARY_RETRIEVABLE_HINT */ + { 18609, 0x00008258 }, /* GL_PROGRAM_SEPARABLE */ + { 18630, 0x00008259 }, /* GL_ACTIVE_PROGRAM */ + { 18648, 0x0000825A }, /* GL_PROGRAM_PIPELINE_BINDING */ + { 18676, 0x0000825B }, /* GL_MAX_VIEWPORTS */ + { 18693, 0x0000825C }, /* GL_VIEWPORT_SUBPIXEL_BITS */ + { 18719, 0x0000825D }, /* GL_VIEWPORT_BOUNDS_RANGE */ + { 18744, 0x0000825E }, /* GL_LAYER_PROVOKING_VERTEX */ + { 18770, 0x0000825F }, /* GL_VIEWPORT_INDEX_PROVOKING_VERTEX */ + { 18805, 0x00008260 }, /* GL_UNDEFINED_VERTEX */ + { 18825, 0x00008261 }, /* GL_NO_RESET_NOTIFICATION */ + { 18850, 0x00008262 }, /* GL_MAX_COMPUTE_SHARED_MEMORY_SIZE */ + { 18884, 0x00008263 }, /* GL_MAX_COMPUTE_UNIFORM_COMPONENTS */ + { 18918, 0x00008264 }, /* GL_MAX_COMPUTE_ATOMIC_COUNTER_BUFFERS */ + { 18956, 0x00008265 }, /* GL_MAX_COMPUTE_ATOMIC_COUNTERS */ + { 18987, 0x00008266 }, /* GL_MAX_COMBINED_COMPUTE_UNIFORM_COMPONENTS */ + { 19030, 0x00008267 }, /* GL_COMPUTE_WORK_GROUP_SIZE */ + { 19057, 0x00008268 }, /* GL_DEBUG_TYPE_MARKER */ + { 19078, 0x00008269 }, /* GL_DEBUG_TYPE_PUSH_GROUP */ + { 19103, 0x0000826A }, /* GL_DEBUG_TYPE_POP_GROUP */ + { 19127, 0x0000826B }, /* GL_DEBUG_SEVERITY_NOTIFICATION */ + { 19158, 0x0000826C }, /* GL_MAX_DEBUG_GROUP_STACK_DEPTH */ + { 19189, 0x0000826D }, /* GL_DEBUG_GROUP_STACK_DEPTH */ + { 19216, 0x0000826E }, /* GL_MAX_UNIFORM_LOCATIONS */ + { 19241, 0x0000826F }, /* GL_INTERNALFORMAT_SUPPORTED */ + { 19269, 0x00008270 }, /* GL_INTERNALFORMAT_PREFERRED */ + { 19297, 0x00008271 }, /* GL_INTERNALFORMAT_RED_SIZE */ + { 19324, 0x00008272 }, /* GL_INTERNALFORMAT_GREEN_SIZE */ + { 19353, 0x00008273 }, /* GL_INTERNALFORMAT_BLUE_SIZE */ + { 19381, 0x00008274 }, /* GL_INTERNALFORMAT_ALPHA_SIZE */ + { 19410, 0x00008275 }, /* GL_INTERNALFORMAT_DEPTH_SIZE */ + { 19439, 0x00008276 }, /* GL_INTERNALFORMAT_STENCIL_SIZE */ + { 19470, 0x00008277 }, /* GL_INTERNALFORMAT_SHARED_SIZE */ + { 19500, 0x00008278 }, /* GL_INTERNALFORMAT_RED_TYPE */ + { 19527, 0x00008279 }, /* GL_INTERNALFORMAT_GREEN_TYPE */ + { 19556, 0x0000827A }, /* GL_INTERNALFORMAT_BLUE_TYPE */ + { 19584, 0x0000827B }, /* GL_INTERNALFORMAT_ALPHA_TYPE */ + { 19613, 0x0000827C }, /* GL_INTERNALFORMAT_DEPTH_TYPE */ + { 19642, 0x0000827D }, /* GL_INTERNALFORMAT_STENCIL_TYPE */ + { 19673, 0x0000827E }, /* GL_MAX_WIDTH */ + { 19686, 0x0000827F }, /* GL_MAX_HEIGHT */ + { 19700, 0x00008280 }, /* GL_MAX_DEPTH */ + { 19713, 0x00008281 }, /* GL_MAX_LAYERS */ + { 19727, 0x00008282 }, /* GL_MAX_COMBINED_DIMENSIONS */ + { 19754, 0x00008283 }, /* GL_COLOR_COMPONENTS */ + { 19774, 0x00008284 }, /* GL_DEPTH_COMPONENTS */ + { 19794, 0x00008285 }, /* GL_STENCIL_COMPONENTS */ + { 19816, 0x00008286 }, /* GL_COLOR_RENDERABLE */ + { 19836, 0x00008287 }, /* GL_DEPTH_RENDERABLE */ + { 19856, 0x00008288 }, /* GL_STENCIL_RENDERABLE */ + { 19878, 0x00008289 }, /* GL_FRAMEBUFFER_RENDERABLE */ + { 19904, 0x0000828A }, /* GL_FRAMEBUFFER_RENDERABLE_LAYERED */ + { 19938, 0x0000828B }, /* GL_FRAMEBUFFER_BLEND */ + { 19959, 0x0000828C }, /* GL_READ_PIXELS */ + { 19974, 0x0000828D }, /* GL_READ_PIXELS_FORMAT */ + { 19996, 0x0000828E }, /* GL_READ_PIXELS_TYPE */ + { 20016, 0x0000828F }, /* GL_TEXTURE_IMAGE_FORMAT */ + { 20040, 0x00008290 }, /* GL_TEXTURE_IMAGE_TYPE */ + { 20062, 0x00008291 }, /* GL_GET_TEXTURE_IMAGE_FORMAT */ + { 20090, 0x00008292 }, /* GL_GET_TEXTURE_IMAGE_TYPE */ + { 20116, 0x00008293 }, /* GL_MIPMAP */ + { 20126, 0x00008294 }, /* GL_MANUAL_GENERATE_MIPMAP */ + { 20152, 0x00008295 }, /* GL_AUTO_GENERATE_MIPMAP */ + { 20176, 0x00008296 }, /* GL_COLOR_ENCODING */ + { 20194, 0x00008297 }, /* GL_SRGB_READ */ + { 20207, 0x00008298 }, /* GL_SRGB_WRITE */ + { 20221, 0x00008299 }, /* GL_SRGB_DECODE_ARB */ + { 20240, 0x0000829A }, /* GL_FILTER */ + { 20250, 0x0000829B }, /* GL_VERTEX_TEXTURE */ + { 20268, 0x0000829C }, /* GL_TESS_CONTROL_TEXTURE */ + { 20292, 0x0000829D }, /* GL_TESS_EVALUATION_TEXTURE */ + { 20319, 0x0000829E }, /* GL_GEOMETRY_TEXTURE */ + { 20339, 0x0000829F }, /* GL_FRAGMENT_TEXTURE */ + { 20359, 0x000082A0 }, /* GL_COMPUTE_TEXTURE */ + { 20378, 0x000082A1 }, /* GL_TEXTURE_SHADOW */ + { 20396, 0x000082A2 }, /* GL_TEXTURE_GATHER */ + { 20414, 0x000082A3 }, /* GL_TEXTURE_GATHER_SHADOW */ + { 20439, 0x000082A4 }, /* GL_SHADER_IMAGE_LOAD */ + { 20460, 0x000082A5 }, /* GL_SHADER_IMAGE_STORE */ + { 20482, 0x000082A6 }, /* GL_SHADER_IMAGE_ATOMIC */ + { 20505, 0x000082A7 }, /* GL_IMAGE_TEXEL_SIZE */ + { 20525, 0x000082A8 }, /* GL_IMAGE_COMPATIBILITY_CLASS */ + { 20554, 0x000082A9 }, /* GL_IMAGE_PIXEL_FORMAT */ + { 20576, 0x000082AA }, /* GL_IMAGE_PIXEL_TYPE */ + { 20596, 0x000082AC }, /* GL_SIMULTANEOUS_TEXTURE_AND_DEPTH_TEST */ + { 20635, 0x000082AD }, /* GL_SIMULTANEOUS_TEXTURE_AND_STENCIL_TEST */ + { 20676, 0x000082AE }, /* GL_SIMULTANEOUS_TEXTURE_AND_DEPTH_WRITE */ + { 20716, 0x000082AF }, /* GL_SIMULTANEOUS_TEXTURE_AND_STENCIL_WRITE */ + { 20758, 0x000082B1 }, /* GL_TEXTURE_COMPRESSED_BLOCK_WIDTH */ + { 20792, 0x000082B2 }, /* GL_TEXTURE_COMPRESSED_BLOCK_HEIGHT */ + { 20827, 0x000082B3 }, /* GL_TEXTURE_COMPRESSED_BLOCK_SIZE */ + { 20860, 0x000082B4 }, /* GL_CLEAR_BUFFER */ + { 20876, 0x000082B5 }, /* GL_TEXTURE_VIEW */ + { 20892, 0x000082B6 }, /* GL_VIEW_COMPATIBILITY_CLASS */ + { 20920, 0x000082B7 }, /* GL_FULL_SUPPORT */ + { 20936, 0x000082B8 }, /* GL_CAVEAT_SUPPORT */ + { 20954, 0x000082B9 }, /* GL_IMAGE_CLASS_4_X_32 */ + { 20976, 0x000082BA }, /* GL_IMAGE_CLASS_2_X_32 */ + { 20998, 0x000082BB }, /* GL_IMAGE_CLASS_1_X_32 */ + { 21020, 0x000082BC }, /* GL_IMAGE_CLASS_4_X_16 */ + { 21042, 0x000082BD }, /* GL_IMAGE_CLASS_2_X_16 */ + { 21064, 0x000082BE }, /* GL_IMAGE_CLASS_1_X_16 */ + { 21086, 0x000082BF }, /* GL_IMAGE_CLASS_4_X_8 */ + { 21107, 0x000082C0 }, /* GL_IMAGE_CLASS_2_X_8 */ + { 21128, 0x000082C1 }, /* GL_IMAGE_CLASS_1_X_8 */ + { 21149, 0x000082C2 }, /* GL_IMAGE_CLASS_11_11_10 */ + { 21173, 0x000082C3 }, /* GL_IMAGE_CLASS_10_10_10_2 */ + { 21199, 0x000082C4 }, /* GL_VIEW_CLASS_128_BITS */ + { 21222, 0x000082C5 }, /* GL_VIEW_CLASS_96_BITS */ + { 21244, 0x000082C6 }, /* GL_VIEW_CLASS_64_BITS */ + { 21266, 0x000082C7 }, /* GL_VIEW_CLASS_48_BITS */ + { 21288, 0x000082C8 }, /* GL_VIEW_CLASS_32_BITS */ + { 21310, 0x000082C9 }, /* GL_VIEW_CLASS_24_BITS */ + { 21332, 0x000082CA }, /* GL_VIEW_CLASS_16_BITS */ + { 21354, 0x000082CB }, /* GL_VIEW_CLASS_8_BITS */ + { 21375, 0x000082CC }, /* GL_VIEW_CLASS_S3TC_DXT1_RGB */ + { 21403, 0x000082CD }, /* GL_VIEW_CLASS_S3TC_DXT1_RGBA */ + { 21432, 0x000082CE }, /* GL_VIEW_CLASS_S3TC_DXT3_RGBA */ + { 21461, 0x000082CF }, /* GL_VIEW_CLASS_S3TC_DXT5_RGBA */ + { 21490, 0x000082D0 }, /* GL_VIEW_CLASS_RGTC1_RED */ + { 21514, 0x000082D1 }, /* GL_VIEW_CLASS_RGTC2_RG */ + { 21537, 0x000082D2 }, /* GL_VIEW_CLASS_BPTC_UNORM */ + { 21562, 0x000082D3 }, /* GL_VIEW_CLASS_BPTC_FLOAT */ + { 21587, 0x000082D4 }, /* GL_VERTEX_ATTRIB_BINDING */ + { 21612, 0x000082D5 }, /* GL_VERTEX_ATTRIB_RELATIVE_OFFSET */ + { 21645, 0x000082D6 }, /* GL_VERTEX_BINDING_DIVISOR */ + { 21671, 0x000082D7 }, /* GL_VERTEX_BINDING_OFFSET */ + { 21696, 0x000082D8 }, /* GL_VERTEX_BINDING_STRIDE */ + { 21721, 0x000082D9 }, /* GL_MAX_VERTEX_ATTRIB_RELATIVE_OFFSET */ + { 21758, 0x000082DA }, /* GL_MAX_VERTEX_ATTRIB_BINDINGS */ + { 21788, 0x000082DB }, /* GL_TEXTURE_VIEW_MIN_LEVEL */ + { 21814, 0x000082DC }, /* GL_TEXTURE_VIEW_NUM_LEVELS */ + { 21841, 0x000082DD }, /* GL_TEXTURE_VIEW_MIN_LAYER */ + { 21867, 0x000082DE }, /* GL_TEXTURE_VIEW_NUM_LAYERS */ + { 21894, 0x000082DF }, /* GL_TEXTURE_IMMUTABLE_LEVELS */ + { 21922, 0x000082E0 }, /* GL_BUFFER */ + { 21932, 0x000082E1 }, /* GL_SHADER */ + { 21942, 0x000082E2 }, /* GL_PROGRAM */ + { 21953, 0x000082E3 }, /* GL_QUERY */ + { 21962, 0x000082E4 }, /* GL_PROGRAM_PIPELINE */ + { 21982, 0x000082E5 }, /* GL_MAX_VERTEX_ATTRIB_STRIDE */ + { 22010, 0x000082E6 }, /* GL_SAMPLER */ + { 22021, 0x000082E7 }, /* GL_DISPLAY_LIST */ + { 22037, 0x000082E8 }, /* GL_MAX_LABEL_LENGTH */ + { 22057, 0x000082E9 }, /* GL_NUM_SHADING_LANGUAGE_VERSIONS */ + { 22090, 0x000082EA }, /* GL_QUERY_TARGET */ + { 22106, 0x000082EC }, /* GL_TRANSFORM_FEEDBACK_OVERFLOW_ARB */ + { 22141, 0x000082ED }, /* GL_TRANSFORM_FEEDBACK_STREAM_OVERFLOW_ARB */ + { 22183, 0x000082EE }, /* GL_VERTICES_SUBMITTED_ARB */ + { 22209, 0x000082EF }, /* GL_PRIMITIVES_SUBMITTED_ARB */ + { 22237, 0x000082F0 }, /* GL_VERTEX_SHADER_INVOCATIONS_ARB */ + { 22270, 0x000082F1 }, /* GL_TESS_CONTROL_SHADER_PATCHES_ARB */ + { 22305, 0x000082F2 }, /* GL_TESS_EVALUATION_SHADER_INVOCATIONS_ARB */ + { 22347, 0x000082F3 }, /* GL_GEOMETRY_SHADER_PRIMITIVES_EMITTED_ARB */ + { 22389, 0x000082F4 }, /* GL_FRAGMENT_SHADER_INVOCATIONS_ARB */ + { 22424, 0x000082F5 }, /* GL_COMPUTE_SHADER_INVOCATIONS_ARB */ + { 22458, 0x000082F6 }, /* GL_CLIPPING_INPUT_PRIMITIVES_ARB */ + { 22491, 0x000082F7 }, /* GL_CLIPPING_OUTPUT_PRIMITIVES_ARB */ + { 22525, 0x000082F8 }, /* GL_SPARSE_BUFFER_PAGE_SIZE_ARB */ + { 22556, 0x000082F9 }, /* GL_MAX_CULL_DISTANCES */ + { 22578, 0x000082FA }, /* GL_MAX_COMBINED_CLIP_AND_CULL_DISTANCES */ + { 22618, 0x000082FB }, /* GL_CONTEXT_RELEASE_BEHAVIOR */ + { 22646, 0x000082FC }, /* GL_CONTEXT_RELEASE_BEHAVIOR_FLUSH */ + { 22680, 0x00008316 }, /* GL_CONVOLUTION_HINT_SGIX */ + { 22705, 0x00008318 }, /* GL_YCRCB_SGIX */ + { 22719, 0x00008319 }, /* GL_YCRCBA_SGIX */ + { 22734, 0x00008320 }, /* GL_ALPHA_MIN_SGIX */ + { 22752, 0x00008321 }, /* GL_ALPHA_MAX_SGIX */ + { 22770, 0x00008322 }, /* GL_SCALEBIAS_HINT_SGIX */ + { 22793, 0x00008329 }, /* GL_ASYNC_MARKER_SGIX */ + { 22814, 0x0000832B }, /* GL_PIXEL_TEX_GEN_MODE_SGIX */ + { 22841, 0x0000832C }, /* GL_ASYNC_HISTOGRAM_SGIX */ + { 22865, 0x0000832D }, /* GL_MAX_ASYNC_HISTOGRAM_SGIX */ + { 22893, 0x00008330 }, /* GL_PIXEL_TRANSFORM_2D_EXT */ + { 22919, 0x00008331 }, /* GL_PIXEL_MAG_FILTER_EXT */ + { 22943, 0x00008332 }, /* GL_PIXEL_MIN_FILTER_EXT */ + { 22967, 0x00008333 }, /* GL_PIXEL_CUBIC_WEIGHT_EXT */ + { 22993, 0x00008334 }, /* GL_CUBIC_EXT */ + { 23006, 0x00008335 }, /* GL_AVERAGE_EXT */ + { 23021, 0x00008336 }, /* GL_PIXEL_TRANSFORM_2D_STACK_DEPTH_EXT */ + { 23059, 0x00008337 }, /* GL_MAX_PIXEL_TRANSFORM_2D_STACK_DEPTH_EXT */ + { 23101, 0x00008338 }, /* GL_PIXEL_TRANSFORM_2D_MATRIX_EXT */ + { 23134, 0x00008349 }, /* GL_FRAGMENT_MATERIAL_EXT */ + { 23159, 0x0000834A }, /* GL_FRAGMENT_NORMAL_EXT */ + { 23182, 0x0000834C }, /* GL_FRAGMENT_COLOR_EXT */ + { 23204, 0x0000834D }, /* GL_ATTENUATION_EXT */ + { 23223, 0x0000834E }, /* GL_SHADOW_ATTENUATION_EXT */ + { 23249, 0x0000834F }, /* GL_TEXTURE_APPLICATION_MODE_EXT */ + { 23281, 0x00008350 }, /* GL_TEXTURE_LIGHT_EXT */ + { 23302, 0x00008351 }, /* GL_TEXTURE_MATERIAL_FACE_EXT */ + { 23331, 0x00008352 }, /* GL_TEXTURE_MATERIAL_PARAMETER_EXT */ + { 23365, 0x00008353 }, /* GL_PIXEL_TEXTURE_SGIS */ + { 23387, 0x00008354 }, /* GL_PIXEL_FRAGMENT_RGB_SOURCE_SGIS */ + { 23421, 0x00008355 }, /* GL_PIXEL_FRAGMENT_ALPHA_SOURCE_SGIS */ + { 23457, 0x00008356 }, /* GL_PIXEL_GROUP_COLOR_SGIS */ + { 23483, 0x0000835C }, /* GL_ASYNC_TEX_IMAGE_SGIX */ + { 23507, 0x0000835D }, /* GL_ASYNC_DRAW_PIXELS_SGIX */ + { 23533, 0x0000835E }, /* GL_ASYNC_READ_PIXELS_SGIX */ + { 23559, 0x0000835F }, /* GL_MAX_ASYNC_TEX_IMAGE_SGIX */ + { 23587, 0x00008360 }, /* GL_MAX_ASYNC_DRAW_PIXELS_SGIX */ + { 23617, 0x00008361 }, /* GL_MAX_ASYNC_READ_PIXELS_SGIX */ + { 23647, 0x00008362 }, /* GL_UNSIGNED_BYTE_2_3_3_REV */ + { 23674, 0x00008363 }, /* GL_UNSIGNED_SHORT_5_6_5 */ + { 23698, 0x00008364 }, /* GL_UNSIGNED_SHORT_5_6_5_REV */ + { 23726, 0x00008365 }, /* GL_UNSIGNED_SHORT_4_4_4_4_REV */ + { 23756, 0x00008366 }, /* GL_UNSIGNED_SHORT_1_5_5_5_REV */ + { 23786, 0x00008367 }, /* GL_UNSIGNED_INT_8_8_8_8_REV */ + { 23814, 0x00008368 }, /* GL_UNSIGNED_INT_2_10_10_10_REV */ + { 23845, 0x00008369 }, /* GL_TEXTURE_MAX_CLAMP_S_SGIX */ + { 23873, 0x0000836A }, /* GL_TEXTURE_MAX_CLAMP_T_SGIX */ + { 23901, 0x0000836B }, /* GL_TEXTURE_MAX_CLAMP_R_SGIX */ + { 23929, 0x00008370 }, /* GL_MIRRORED_REPEAT */ + { 23948, 0x000083A0 }, /* GL_RGB_S3TC */ + { 23960, 0x000083A1 }, /* GL_RGB4_S3TC */ + { 23973, 0x000083A2 }, /* GL_RGBA_S3TC */ + { 23986, 0x000083A3 }, /* GL_RGBA4_S3TC */ + { 24000, 0x000083A4 }, /* GL_RGBA_DXT5_S3TC */ + { 24018, 0x000083A5 }, /* GL_RGBA4_DXT5_S3TC */ + { 24037, 0x000083EE }, /* GL_VERTEX_PRECLIP_SGIX */ + { 24060, 0x000083EF }, /* GL_VERTEX_PRECLIP_HINT_SGIX */ + { 24088, 0x000083F0 }, /* GL_COMPRESSED_RGB_S3TC_DXT1_EXT */ + { 24120, 0x000083F1 }, /* GL_COMPRESSED_RGBA_S3TC_DXT1_EXT */ + { 24153, 0x000083F2 }, /* GL_COMPRESSED_RGBA_S3TC_DXT3_EXT */ + { 24186, 0x000083F3 }, /* GL_COMPRESSED_RGBA_S3TC_DXT5_EXT */ + { 24219, 0x000083F4 }, /* GL_PARALLEL_ARRAYS_INTEL */ + { 24244, 0x000083F5 }, /* GL_VERTEX_ARRAY_PARALLEL_POINTERS_INTEL */ + { 24284, 0x000083F6 }, /* GL_NORMAL_ARRAY_PARALLEL_POINTERS_INTEL */ + { 24324, 0x000083F7 }, /* GL_COLOR_ARRAY_PARALLEL_POINTERS_INTEL */ + { 24363, 0x000083F8 }, /* GL_TEXTURE_COORD_ARRAY_PARALLEL_POINTERS_INTEL */ + { 24410, 0x000083F9 }, /* GL_PERFQUERY_DONOT_FLUSH_INTEL */ + { 24441, 0x000083FA }, /* GL_PERFQUERY_FLUSH_INTEL */ + { 24466, 0x000083FB }, /* GL_PERFQUERY_WAIT_INTEL */ + { 24490, 0x000083FE }, /* GL_CONSERVATIVE_RASTERIZATION_INTEL */ + { 24526, 0x000083FF }, /* GL_TEXTURE_MEMORY_LAYOUT_INTEL */ + { 24557, 0x00008400 }, /* GL_FRAGMENT_LIGHTING_SGIX */ + { 24583, 0x00008401 }, /* GL_FRAGMENT_COLOR_MATERIAL_SGIX */ + { 24615, 0x00008402 }, /* GL_FRAGMENT_COLOR_MATERIAL_FACE_SGIX */ + { 24652, 0x00008403 }, /* GL_FRAGMENT_COLOR_MATERIAL_PARAMETER_SGIX */ + { 24694, 0x00008404 }, /* GL_MAX_FRAGMENT_LIGHTS_SGIX */ + { 24722, 0x00008405 }, /* GL_MAX_ACTIVE_LIGHTS_SGIX */ + { 24748, 0x00008406 }, /* GL_CURRENT_RASTER_NORMAL_SGIX */ + { 24778, 0x00008407 }, /* GL_LIGHT_ENV_MODE_SGIX */ + { 24801, 0x00008408 }, /* GL_FRAGMENT_LIGHT_MODEL_LOCAL_VIEWER_SGIX */ + { 24843, 0x00008409 }, /* GL_FRAGMENT_LIGHT_MODEL_TWO_SIDE_SGIX */ + { 24881, 0x0000840A }, /* GL_FRAGMENT_LIGHT_MODEL_AMBIENT_SGIX */ + { 24918, 0x0000840B }, /* GL_FRAGMENT_LIGHT_MODEL_NORMAL_INTERPOLATION_SGIX */ + { 24968, 0x0000840C }, /* GL_FRAGMENT_LIGHT0_SGIX */ + { 24992, 0x0000840D }, /* GL_FRAGMENT_LIGHT1_SGIX */ + { 25016, 0x0000840E }, /* GL_FRAGMENT_LIGHT2_SGIX */ + { 25040, 0x0000840F }, /* GL_FRAGMENT_LIGHT3_SGIX */ + { 25064, 0x00008410 }, /* GL_FRAGMENT_LIGHT4_SGIX */ + { 25088, 0x00008411 }, /* GL_FRAGMENT_LIGHT5_SGIX */ + { 25112, 0x00008412 }, /* GL_FRAGMENT_LIGHT6_SGIX */ + { 25136, 0x00008413 }, /* GL_FRAGMENT_LIGHT7_SGIX */ + { 25160, 0x0000842E }, /* GL_PACK_RESAMPLE_SGIX */ + { 25182, 0x0000842F }, /* GL_UNPACK_RESAMPLE_SGIX */ + { 25206, 0x00008430 }, /* GL_RESAMPLE_DECIMATE_SGIX */ + { 25232, 0x00008433 }, /* GL_RESAMPLE_REPLICATE_SGIX */ + { 25259, 0x00008434 }, /* GL_RESAMPLE_ZERO_FILL_SGIX */ + { 25286, 0x00008439 }, /* GL_TANGENT_ARRAY_EXT */ + { 25307, 0x0000843A }, /* GL_BINORMAL_ARRAY_EXT */ + { 25329, 0x0000843B }, /* GL_CURRENT_TANGENT_EXT */ + { 25352, 0x0000843C }, /* GL_CURRENT_BINORMAL_EXT */ + { 25376, 0x0000843E }, /* GL_TANGENT_ARRAY_TYPE_EXT */ + { 25402, 0x0000843F }, /* GL_TANGENT_ARRAY_STRIDE_EXT */ + { 25430, 0x00008440 }, /* GL_BINORMAL_ARRAY_TYPE_EXT */ + { 25457, 0x00008441 }, /* GL_BINORMAL_ARRAY_STRIDE_EXT */ + { 25486, 0x00008442 }, /* GL_TANGENT_ARRAY_POINTER_EXT */ + { 25515, 0x00008443 }, /* GL_BINORMAL_ARRAY_POINTER_EXT */ + { 25545, 0x00008444 }, /* GL_MAP1_TANGENT_EXT */ + { 25565, 0x00008445 }, /* GL_MAP2_TANGENT_EXT */ + { 25585, 0x00008446 }, /* GL_MAP1_BINORMAL_EXT */ + { 25606, 0x00008447 }, /* GL_MAP2_BINORMAL_EXT */ + { 25627, 0x0000844D }, /* GL_NEAREST_CLIPMAP_NEAREST_SGIX */ + { 25659, 0x0000844E }, /* GL_NEAREST_CLIPMAP_LINEAR_SGIX */ + { 25690, 0x0000844F }, /* GL_LINEAR_CLIPMAP_NEAREST_SGIX */ + { 25721, 0x00008450 }, /* GL_FOG_COORD_SRC */ + { 25738, 0x00008451 }, /* GL_FOG_COORD */ + { 25751, 0x00008452 }, /* GL_FRAGMENT_DEPTH */ + { 25769, 0x00008453 }, /* GL_CURRENT_FOG_COORD */ + { 25790, 0x00008454 }, /* GL_FOG_COORD_ARRAY_TYPE */ + { 25814, 0x00008455 }, /* GL_FOG_COORD_ARRAY_STRIDE */ + { 25840, 0x00008456 }, /* GL_FOG_COORD_ARRAY_POINTER */ + { 25867, 0x00008457 }, /* GL_FOG_COORD_ARRAY */ + { 25886, 0x00008458 }, /* GL_COLOR_SUM */ + { 25899, 0x00008459 }, /* GL_CURRENT_SECONDARY_COLOR */ + { 25926, 0x0000845A }, /* GL_SECONDARY_COLOR_ARRAY_SIZE */ + { 25956, 0x0000845B }, /* GL_SECONDARY_COLOR_ARRAY_TYPE */ + { 25986, 0x0000845C }, /* GL_SECONDARY_COLOR_ARRAY_STRIDE */ + { 26018, 0x0000845D }, /* GL_SECONDARY_COLOR_ARRAY_POINTER */ + { 26051, 0x0000845E }, /* GL_SECONDARY_COLOR_ARRAY */ + { 26076, 0x0000845F }, /* GL_CURRENT_RASTER_SECONDARY_COLOR */ + { 26110, 0x0000846D }, /* GL_ALIASED_POINT_SIZE_RANGE */ + { 26138, 0x0000846E }, /* GL_ALIASED_LINE_WIDTH_RANGE */ + { 26166, 0x00008490 }, /* GL_SCREEN_COORDINATES_REND */ + { 26193, 0x00008491 }, /* GL_INVERTED_SCREEN_W_REND */ + { 26219, 0x000084C0 }, /* GL_TEXTURE0 */ + { 26231, 0x000084C1 }, /* GL_TEXTURE1 */ + { 26243, 0x000084C2 }, /* GL_TEXTURE2 */ + { 26255, 0x000084C3 }, /* GL_TEXTURE3 */ + { 26267, 0x000084C4 }, /* GL_TEXTURE4 */ + { 26279, 0x000084C5 }, /* GL_TEXTURE5 */ + { 26291, 0x000084C6 }, /* GL_TEXTURE6 */ + { 26303, 0x000084C7 }, /* GL_TEXTURE7 */ + { 26315, 0x000084C8 }, /* GL_TEXTURE8 */ + { 26327, 0x000084C9 }, /* GL_TEXTURE9 */ + { 26339, 0x000084CA }, /* GL_TEXTURE10 */ + { 26352, 0x000084CB }, /* GL_TEXTURE11 */ + { 26365, 0x000084CC }, /* GL_TEXTURE12 */ + { 26378, 0x000084CD }, /* GL_TEXTURE13 */ + { 26391, 0x000084CE }, /* GL_TEXTURE14 */ + { 26404, 0x000084CF }, /* GL_TEXTURE15 */ + { 26417, 0x000084D0 }, /* GL_TEXTURE16 */ + { 26430, 0x000084D1 }, /* GL_TEXTURE17 */ + { 26443, 0x000084D2 }, /* GL_TEXTURE18 */ + { 26456, 0x000084D3 }, /* GL_TEXTURE19 */ + { 26469, 0x000084D4 }, /* GL_TEXTURE20 */ + { 26482, 0x000084D5 }, /* GL_TEXTURE21 */ + { 26495, 0x000084D6 }, /* GL_TEXTURE22 */ + { 26508, 0x000084D7 }, /* GL_TEXTURE23 */ + { 26521, 0x000084D8 }, /* GL_TEXTURE24 */ + { 26534, 0x000084D9 }, /* GL_TEXTURE25 */ + { 26547, 0x000084DA }, /* GL_TEXTURE26 */ + { 26560, 0x000084DB }, /* GL_TEXTURE27 */ + { 26573, 0x000084DC }, /* GL_TEXTURE28 */ + { 26586, 0x000084DD }, /* GL_TEXTURE29 */ + { 26599, 0x000084DE }, /* GL_TEXTURE30 */ + { 26612, 0x000084DF }, /* GL_TEXTURE31 */ + { 26625, 0x000084E0 }, /* GL_ACTIVE_TEXTURE */ + { 26643, 0x000084E1 }, /* GL_CLIENT_ACTIVE_TEXTURE */ + { 26668, 0x000084E2 }, /* GL_MAX_TEXTURE_UNITS */ + { 26689, 0x000084E3 }, /* GL_TRANSPOSE_MODELVIEW_MATRIX */ + { 26719, 0x000084E4 }, /* GL_TRANSPOSE_PROJECTION_MATRIX */ + { 26750, 0x000084E5 }, /* GL_TRANSPOSE_TEXTURE_MATRIX */ + { 26778, 0x000084E6 }, /* GL_TRANSPOSE_COLOR_MATRIX */ + { 26804, 0x000084E7 }, /* GL_SUBTRACT */ + { 26816, 0x000084E8 }, /* GL_MAX_RENDERBUFFER_SIZE */ + { 26841, 0x000084E9 }, /* GL_COMPRESSED_ALPHA */ + { 26861, 0x000084EA }, /* GL_COMPRESSED_LUMINANCE */ + { 26885, 0x000084EB }, /* GL_COMPRESSED_LUMINANCE_ALPHA */ + { 26915, 0x000084EC }, /* GL_COMPRESSED_INTENSITY */ + { 26939, 0x000084ED }, /* GL_COMPRESSED_RGB */ + { 26957, 0x000084EE }, /* GL_COMPRESSED_RGBA */ + { 26976, 0x000084EF }, /* GL_TEXTURE_COMPRESSION_HINT */ + { 27004, 0x000084F0 }, /* GL_UNIFORM_BLOCK_REFERENCED_BY_TESS_CONTROL_SHADER */ + { 27055, 0x000084F1 }, /* GL_UNIFORM_BLOCK_REFERENCED_BY_TESS_EVALUATION_SHADER */ + { 27109, 0x000084F2 }, /* GL_ALL_COMPLETED_NV */ + { 27129, 0x000084F3 }, /* GL_FENCE_STATUS_NV */ + { 27148, 0x000084F4 }, /* GL_FENCE_CONDITION_NV */ + { 27170, 0x000084F5 }, /* GL_TEXTURE_RECTANGLE */ + { 27191, 0x000084F6 }, /* GL_TEXTURE_BINDING_RECTANGLE */ + { 27220, 0x000084F7 }, /* GL_PROXY_TEXTURE_RECTANGLE */ + { 27247, 0x000084F8 }, /* GL_MAX_RECTANGLE_TEXTURE_SIZE */ + { 27277, 0x000084F9 }, /* GL_DEPTH_STENCIL */ + { 27294, 0x000084FA }, /* GL_UNSIGNED_INT_24_8 */ + { 27315, 0x000084FD }, /* GL_MAX_TEXTURE_LOD_BIAS */ + { 27339, 0x000084FE }, /* GL_TEXTURE_MAX_ANISOTROPY_EXT */ + { 27369, 0x000084FF }, /* GL_MAX_TEXTURE_MAX_ANISOTROPY_EXT */ + { 27403, 0x00008500 }, /* GL_TEXTURE_FILTER_CONTROL */ + { 27429, 0x00008501 }, /* GL_TEXTURE_LOD_BIAS */ + { 27449, 0x00008502 }, /* GL_MODELVIEW1_STACK_DEPTH_EXT */ + { 27479, 0x00008503 }, /* GL_COMBINE4_NV */ + { 27494, 0x00008504 }, /* GL_MAX_SHININESS_NV */ + { 27514, 0x00008505 }, /* GL_MAX_SPOT_EXPONENT_NV */ + { 27538, 0x00008506 }, /* GL_MODELVIEW1_MATRIX_EXT */ + { 27563, 0x00008507 }, /* GL_INCR_WRAP */ + { 27576, 0x00008508 }, /* GL_DECR_WRAP */ + { 27589, 0x00008509 }, /* GL_VERTEX_WEIGHTING_EXT */ + { 27613, 0x0000850A }, /* GL_MODELVIEW1_ARB */ + { 27631, 0x0000850B }, /* GL_CURRENT_VERTEX_WEIGHT_EXT */ + { 27660, 0x0000850C }, /* GL_VERTEX_WEIGHT_ARRAY_EXT */ + { 27687, 0x0000850D }, /* GL_VERTEX_WEIGHT_ARRAY_SIZE_EXT */ + { 27719, 0x0000850E }, /* GL_VERTEX_WEIGHT_ARRAY_TYPE_EXT */ + { 27751, 0x0000850F }, /* GL_VERTEX_WEIGHT_ARRAY_STRIDE_EXT */ + { 27785, 0x00008510 }, /* GL_VERTEX_WEIGHT_ARRAY_POINTER_EXT */ + { 27820, 0x00008511 }, /* GL_NORMAL_MAP */ + { 27834, 0x00008512 }, /* GL_REFLECTION_MAP */ + { 27852, 0x00008513 }, /* GL_TEXTURE_CUBE_MAP */ + { 27872, 0x00008514 }, /* GL_TEXTURE_BINDING_CUBE_MAP */ + { 27900, 0x00008515 }, /* GL_TEXTURE_CUBE_MAP_POSITIVE_X */ + { 27931, 0x00008516 }, /* GL_TEXTURE_CUBE_MAP_NEGATIVE_X */ + { 27962, 0x00008517 }, /* GL_TEXTURE_CUBE_MAP_POSITIVE_Y */ + { 27993, 0x00008518 }, /* GL_TEXTURE_CUBE_MAP_NEGATIVE_Y */ + { 28024, 0x00008519 }, /* GL_TEXTURE_CUBE_MAP_POSITIVE_Z */ + { 28055, 0x0000851A }, /* GL_TEXTURE_CUBE_MAP_NEGATIVE_Z */ + { 28086, 0x0000851B }, /* GL_PROXY_TEXTURE_CUBE_MAP */ + { 28112, 0x0000851C }, /* GL_MAX_CUBE_MAP_TEXTURE_SIZE */ + { 28141, 0x0000851D }, /* GL_VERTEX_ARRAY_RANGE_APPLE */ + { 28169, 0x0000851E }, /* GL_VERTEX_ARRAY_RANGE_LENGTH_APPLE */ + { 28204, 0x0000851F }, /* GL_VERTEX_ARRAY_STORAGE_HINT_APPLE */ + { 28239, 0x00008520 }, /* GL_MAX_VERTEX_ARRAY_RANGE_ELEMENT_NV */ + { 28276, 0x00008521 }, /* GL_VERTEX_ARRAY_RANGE_POINTER_APPLE */ + { 28312, 0x00008522 }, /* GL_REGISTER_COMBINERS_NV */ + { 28337, 0x00008523 }, /* GL_VARIABLE_A_NV */ + { 28354, 0x00008524 }, /* GL_VARIABLE_B_NV */ + { 28371, 0x00008525 }, /* GL_VARIABLE_C_NV */ + { 28388, 0x00008526 }, /* GL_VARIABLE_D_NV */ + { 28405, 0x00008527 }, /* GL_VARIABLE_E_NV */ + { 28422, 0x00008528 }, /* GL_VARIABLE_F_NV */ + { 28439, 0x00008529 }, /* GL_VARIABLE_G_NV */ + { 28456, 0x0000852A }, /* GL_CONSTANT_COLOR0_NV */ + { 28478, 0x0000852B }, /* GL_CONSTANT_COLOR1_NV */ + { 28500, 0x0000852C }, /* GL_PRIMARY_COLOR_NV */ + { 28520, 0x0000852D }, /* GL_SECONDARY_COLOR_NV */ + { 28542, 0x0000852E }, /* GL_SPARE0_NV */ + { 28555, 0x0000852F }, /* GL_SPARE1_NV */ + { 28568, 0x00008530 }, /* GL_DISCARD_NV */ + { 28582, 0x00008531 }, /* GL_E_TIMES_F_NV */ + { 28598, 0x00008532 }, /* GL_SPARE0_PLUS_SECONDARY_COLOR_NV */ + { 28632, 0x00008533 }, /* GL_VERTEX_ARRAY_RANGE_WITHOUT_FLUSH_NV */ + { 28671, 0x00008534 }, /* GL_MULTISAMPLE_FILTER_HINT_NV */ + { 28701, 0x00008535 }, /* GL_PER_STAGE_CONSTANTS_NV */ + { 28727, 0x00008536 }, /* GL_UNSIGNED_IDENTITY_NV */ + { 28751, 0x00008537 }, /* GL_UNSIGNED_INVERT_NV */ + { 28773, 0x00008538 }, /* GL_EXPAND_NORMAL_NV */ + { 28793, 0x00008539 }, /* GL_EXPAND_NEGATE_NV */ + { 28813, 0x0000853A }, /* GL_HALF_BIAS_NORMAL_NV */ + { 28836, 0x0000853B }, /* GL_HALF_BIAS_NEGATE_NV */ + { 28859, 0x0000853C }, /* GL_SIGNED_IDENTITY_NV */ + { 28881, 0x0000853D }, /* GL_SIGNED_NEGATE_NV */ + { 28901, 0x0000853E }, /* GL_SCALE_BY_TWO_NV */ + { 28920, 0x0000853F }, /* GL_SCALE_BY_FOUR_NV */ + { 28940, 0x00008540 }, /* GL_SCALE_BY_ONE_HALF_NV */ + { 28964, 0x00008541 }, /* GL_BIAS_BY_NEGATIVE_ONE_HALF_NV */ + { 28996, 0x00008542 }, /* GL_COMBINER_INPUT_NV */ + { 29017, 0x00008543 }, /* GL_COMBINER_MAPPING_NV */ + { 29040, 0x00008544 }, /* GL_COMBINER_COMPONENT_USAGE_NV */ + { 29071, 0x00008545 }, /* GL_COMBINER_AB_DOT_PRODUCT_NV */ + { 29101, 0x00008546 }, /* GL_COMBINER_CD_DOT_PRODUCT_NV */ + { 29131, 0x00008547 }, /* GL_COMBINER_MUX_SUM_NV */ + { 29154, 0x00008548 }, /* GL_COMBINER_SCALE_NV */ + { 29175, 0x00008549 }, /* GL_COMBINER_BIAS_NV */ + { 29195, 0x0000854A }, /* GL_COMBINER_AB_OUTPUT_NV */ + { 29220, 0x0000854B }, /* GL_COMBINER_CD_OUTPUT_NV */ + { 29245, 0x0000854C }, /* GL_COMBINER_SUM_OUTPUT_NV */ + { 29271, 0x0000854D }, /* GL_MAX_GENERAL_COMBINERS_NV */ + { 29299, 0x0000854E }, /* GL_NUM_GENERAL_COMBINERS_NV */ + { 29327, 0x0000854F }, /* GL_COLOR_SUM_CLAMP_NV */ + { 29349, 0x00008550 }, /* GL_COMBINER0_NV */ + { 29365, 0x00008551 }, /* GL_COMBINER1_NV */ + { 29381, 0x00008552 }, /* GL_COMBINER2_NV */ + { 29397, 0x00008553 }, /* GL_COMBINER3_NV */ + { 29413, 0x00008554 }, /* GL_COMBINER4_NV */ + { 29429, 0x00008555 }, /* GL_COMBINER5_NV */ + { 29445, 0x00008556 }, /* GL_COMBINER6_NV */ + { 29461, 0x00008557 }, /* GL_COMBINER7_NV */ + { 29477, 0x00008558 }, /* GL_PRIMITIVE_RESTART_NV */ + { 29501, 0x00008559 }, /* GL_PRIMITIVE_RESTART_INDEX_NV */ + { 29531, 0x0000855A }, /* GL_FOG_DISTANCE_MODE_NV */ + { 29555, 0x0000855B }, /* GL_EYE_RADIAL_NV */ + { 29572, 0x0000855C }, /* GL_EYE_PLANE_ABSOLUTE_NV */ + { 29597, 0x0000855D }, /* GL_EMBOSS_LIGHT_NV */ + { 29616, 0x0000855E }, /* GL_EMBOSS_CONSTANT_NV */ + { 29638, 0x0000855F }, /* GL_EMBOSS_MAP_NV */ + { 29655, 0x00008560 }, /* GL_RED_MIN_CLAMP_INGR */ + { 29677, 0x00008561 }, /* GL_GREEN_MIN_CLAMP_INGR */ + { 29701, 0x00008562 }, /* GL_BLUE_MIN_CLAMP_INGR */ + { 29724, 0x00008563 }, /* GL_ALPHA_MIN_CLAMP_INGR */ + { 29748, 0x00008564 }, /* GL_RED_MAX_CLAMP_INGR */ + { 29770, 0x00008565 }, /* GL_GREEN_MAX_CLAMP_INGR */ + { 29794, 0x00008566 }, /* GL_BLUE_MAX_CLAMP_INGR */ + { 29817, 0x00008567 }, /* GL_ALPHA_MAX_CLAMP_INGR */ + { 29841, 0x00008568 }, /* GL_INTERLACE_READ_INGR */ + { 29864, 0x00008570 }, /* GL_COMBINE */ + { 29875, 0x00008571 }, /* GL_COMBINE_RGB */ + { 29890, 0x00008572 }, /* GL_COMBINE_ALPHA */ + { 29907, 0x00008573 }, /* GL_RGB_SCALE */ + { 29920, 0x00008574 }, /* GL_ADD_SIGNED */ + { 29934, 0x00008575 }, /* GL_INTERPOLATE */ + { 29949, 0x00008576 }, /* GL_CONSTANT */ + { 29961, 0x00008577 }, /* GL_PRIMARY_COLOR */ + { 29978, 0x00008578 }, /* GL_PREVIOUS */ + { 29990, 0x00008580 }, /* GL_SRC0_RGB */ + { 30002, 0x00008581 }, /* GL_SRC1_RGB */ + { 30014, 0x00008582 }, /* GL_SRC2_RGB */ + { 30026, 0x00008583 }, /* GL_SOURCE3_RGB_NV */ + { 30044, 0x00008588 }, /* GL_SRC0_ALPHA */ + { 30058, 0x00008589 }, /* GL_SRC1_ALPHA */ + { 30072, 0x0000858A }, /* GL_SRC2_ALPHA */ + { 30086, 0x0000858B }, /* GL_SOURCE3_ALPHA_NV */ + { 30106, 0x00008590 }, /* GL_OPERAND0_RGB */ + { 30122, 0x00008591 }, /* GL_OPERAND1_RGB */ + { 30138, 0x00008592 }, /* GL_OPERAND2_RGB */ + { 30154, 0x00008593 }, /* GL_OPERAND3_RGB_NV */ + { 30173, 0x00008598 }, /* GL_OPERAND0_ALPHA */ + { 30191, 0x00008599 }, /* GL_OPERAND1_ALPHA */ + { 30209, 0x0000859A }, /* GL_OPERAND2_ALPHA */ + { 30227, 0x0000859B }, /* GL_OPERAND3_ALPHA_NV */ + { 30248, 0x000085A0 }, /* GL_PACK_SUBSAMPLE_RATE_SGIX */ + { 30276, 0x000085A1 }, /* GL_UNPACK_SUBSAMPLE_RATE_SGIX */ + { 30306, 0x000085A2 }, /* GL_PIXEL_SUBSAMPLE_4444_SGIX */ + { 30335, 0x000085A3 }, /* GL_PIXEL_SUBSAMPLE_2424_SGIX */ + { 30364, 0x000085A4 }, /* GL_PIXEL_SUBSAMPLE_4242_SGIX */ + { 30393, 0x000085AE }, /* GL_PERTURB_EXT */ + { 30408, 0x000085AF }, /* GL_TEXTURE_NORMAL_EXT */ + { 30430, 0x000085B0 }, /* GL_LIGHT_MODEL_SPECULAR_VECTOR_APPLE */ + { 30467, 0x000085B1 }, /* GL_TRANSFORM_HINT_APPLE */ + { 30491, 0x000085B2 }, /* GL_UNPACK_CLIENT_STORAGE_APPLE */ + { 30522, 0x000085B3 }, /* GL_BUFFER_OBJECT_APPLE */ + { 30545, 0x000085B4 }, /* GL_STORAGE_CLIENT_APPLE */ + { 30569, 0x000085B5 }, /* GL_VERTEX_ARRAY_BINDING */ + { 30593, 0x000085B7 }, /* GL_TEXTURE_RANGE_LENGTH_APPLE */ + { 30623, 0x000085B8 }, /* GL_TEXTURE_RANGE_POINTER_APPLE */ + { 30654, 0x000085B9 }, /* GL_YCBCR_422_APPLE */ + { 30673, 0x000085BA }, /* GL_UNSIGNED_SHORT_8_8_APPLE */ + { 30701, 0x000085BB }, /* GL_UNSIGNED_SHORT_8_8_REV_APPLE */ + { 30733, 0x000085BC }, /* GL_TEXTURE_STORAGE_HINT_APPLE */ + { 30763, 0x000085BD }, /* GL_STORAGE_PRIVATE_APPLE */ + { 30788, 0x000085BE }, /* GL_STORAGE_CACHED_APPLE */ + { 30812, 0x000085BF }, /* GL_STORAGE_SHARED_APPLE */ + { 30836, 0x000085C0 }, /* GL_REPLACEMENT_CODE_ARRAY_SUN */ + { 30866, 0x000085C1 }, /* GL_REPLACEMENT_CODE_ARRAY_TYPE_SUN */ + { 30901, 0x000085C2 }, /* GL_REPLACEMENT_CODE_ARRAY_STRIDE_SUN */ + { 30938, 0x000085C3 }, /* GL_REPLACEMENT_CODE_ARRAY_POINTER_SUN */ + { 30976, 0x000085C4 }, /* GL_R1UI_V3F_SUN */ + { 30992, 0x000085C5 }, /* GL_R1UI_C4UB_V3F_SUN */ + { 31013, 0x000085C6 }, /* GL_R1UI_C3F_V3F_SUN */ + { 31033, 0x000085C7 }, /* GL_R1UI_N3F_V3F_SUN */ + { 31053, 0x000085C8 }, /* GL_R1UI_C4F_N3F_V3F_SUN */ + { 31077, 0x000085C9 }, /* GL_R1UI_T2F_V3F_SUN */ + { 31097, 0x000085CA }, /* GL_R1UI_T2F_N3F_V3F_SUN */ + { 31121, 0x000085CB }, /* GL_R1UI_T2F_C4F_N3F_V3F_SUN */ + { 31149, 0x000085CC }, /* GL_SLICE_ACCUM_SUN */ + { 31168, 0x00008614 }, /* GL_QUAD_MESH_SUN */ + { 31185, 0x00008615 }, /* GL_TRIANGLE_MESH_SUN */ + { 31206, 0x00008620 }, /* GL_VERTEX_PROGRAM_ARB */ + { 31228, 0x00008621 }, /* GL_VERTEX_STATE_PROGRAM_NV */ + { 31255, 0x00008622 }, /* GL_VERTEX_ATTRIB_ARRAY_ENABLED */ + { 31286, 0x00008623 }, /* GL_VERTEX_ATTRIB_ARRAY_SIZE */ + { 31314, 0x00008624 }, /* GL_VERTEX_ATTRIB_ARRAY_STRIDE */ + { 31344, 0x00008625 }, /* GL_VERTEX_ATTRIB_ARRAY_TYPE */ + { 31372, 0x00008626 }, /* GL_CURRENT_VERTEX_ATTRIB */ + { 31397, 0x00008627 }, /* GL_PROGRAM_LENGTH_ARB */ + { 31419, 0x00008628 }, /* GL_PROGRAM_STRING_ARB */ + { 31441, 0x00008629 }, /* GL_MODELVIEW_PROJECTION_NV */ + { 31468, 0x0000862A }, /* GL_IDENTITY_NV */ + { 31483, 0x0000862B }, /* GL_INVERSE_NV */ + { 31497, 0x0000862C }, /* GL_TRANSPOSE_NV */ + { 31513, 0x0000862D }, /* GL_INVERSE_TRANSPOSE_NV */ + { 31537, 0x0000862E }, /* GL_MAX_PROGRAM_MATRIX_STACK_DEPTH_ARB */ + { 31575, 0x0000862F }, /* GL_MAX_PROGRAM_MATRICES_ARB */ + { 31603, 0x00008630 }, /* GL_MATRIX0_NV */ + { 31617, 0x00008631 }, /* GL_MATRIX1_NV */ + { 31631, 0x00008632 }, /* GL_MATRIX2_NV */ + { 31645, 0x00008633 }, /* GL_MATRIX3_NV */ + { 31659, 0x00008634 }, /* GL_MATRIX4_NV */ + { 31673, 0x00008635 }, /* GL_MATRIX5_NV */ + { 31687, 0x00008636 }, /* GL_MATRIX6_NV */ + { 31701, 0x00008637 }, /* GL_MATRIX7_NV */ + { 31715, 0x00008640 }, /* GL_CURRENT_MATRIX_STACK_DEPTH_ARB */ + { 31749, 0x00008641 }, /* GL_CURRENT_MATRIX_ARB */ + { 31771, 0x00008642 }, /* GL_PROGRAM_POINT_SIZE */ + { 31793, 0x00008643 }, /* GL_VERTEX_PROGRAM_TWO_SIDE */ + { 31820, 0x00008644 }, /* GL_PROGRAM_PARAMETER_NV */ + { 31844, 0x00008645 }, /* GL_VERTEX_ATTRIB_ARRAY_POINTER */ + { 31875, 0x00008646 }, /* GL_PROGRAM_TARGET_NV */ + { 31896, 0x00008647 }, /* GL_PROGRAM_RESIDENT_NV */ + { 31919, 0x00008648 }, /* GL_TRACK_MATRIX_NV */ + { 31938, 0x00008649 }, /* GL_TRACK_MATRIX_TRANSFORM_NV */ + { 31967, 0x0000864A }, /* GL_VERTEX_PROGRAM_BINDING_NV */ + { 31996, 0x0000864B }, /* GL_PROGRAM_ERROR_POSITION_ARB */ + { 32026, 0x0000864C }, /* GL_OFFSET_TEXTURE_RECTANGLE_NV */ + { 32057, 0x0000864D }, /* GL_OFFSET_TEXTURE_RECTANGLE_SCALE_NV */ + { 32094, 0x0000864E }, /* GL_DOT_PRODUCT_TEXTURE_RECTANGLE_NV */ + { 32130, 0x0000864F }, /* GL_DEPTH_CLAMP */ + { 32145, 0x00008650 }, /* GL_VERTEX_ATTRIB_ARRAY0_NV */ + { 32172, 0x00008651 }, /* GL_VERTEX_ATTRIB_ARRAY1_NV */ + { 32199, 0x00008652 }, /* GL_VERTEX_ATTRIB_ARRAY2_NV */ + { 32226, 0x00008653 }, /* GL_VERTEX_ATTRIB_ARRAY3_NV */ + { 32253, 0x00008654 }, /* GL_VERTEX_ATTRIB_ARRAY4_NV */ + { 32280, 0x00008655 }, /* GL_VERTEX_ATTRIB_ARRAY5_NV */ + { 32307, 0x00008656 }, /* GL_VERTEX_ATTRIB_ARRAY6_NV */ + { 32334, 0x00008657 }, /* GL_VERTEX_ATTRIB_ARRAY7_NV */ + { 32361, 0x00008658 }, /* GL_VERTEX_ATTRIB_ARRAY8_NV */ + { 32388, 0x00008659 }, /* GL_VERTEX_ATTRIB_ARRAY9_NV */ + { 32415, 0x0000865A }, /* GL_VERTEX_ATTRIB_ARRAY10_NV */ + { 32443, 0x0000865B }, /* GL_VERTEX_ATTRIB_ARRAY11_NV */ + { 32471, 0x0000865C }, /* GL_VERTEX_ATTRIB_ARRAY12_NV */ + { 32499, 0x0000865D }, /* GL_VERTEX_ATTRIB_ARRAY13_NV */ + { 32527, 0x0000865E }, /* GL_VERTEX_ATTRIB_ARRAY14_NV */ + { 32555, 0x0000865F }, /* GL_VERTEX_ATTRIB_ARRAY15_NV */ + { 32583, 0x00008660 }, /* GL_MAP1_VERTEX_ATTRIB0_4_NV */ + { 32611, 0x00008661 }, /* GL_MAP1_VERTEX_ATTRIB1_4_NV */ + { 32639, 0x00008662 }, /* GL_MAP1_VERTEX_ATTRIB2_4_NV */ + { 32667, 0x00008663 }, /* GL_MAP1_VERTEX_ATTRIB3_4_NV */ + { 32695, 0x00008664 }, /* GL_MAP1_VERTEX_ATTRIB4_4_NV */ + { 32723, 0x00008665 }, /* GL_MAP1_VERTEX_ATTRIB5_4_NV */ + { 32751, 0x00008666 }, /* GL_MAP1_VERTEX_ATTRIB6_4_NV */ + { 32779, 0x00008667 }, /* GL_MAP1_VERTEX_ATTRIB7_4_NV */ + { 32807, 0x00008668 }, /* GL_MAP1_VERTEX_ATTRIB8_4_NV */ + { 32835, 0x00008669 }, /* GL_MAP1_VERTEX_ATTRIB9_4_NV */ + { 32863, 0x0000866A }, /* GL_MAP1_VERTEX_ATTRIB10_4_NV */ + { 32892, 0x0000866B }, /* GL_MAP1_VERTEX_ATTRIB11_4_NV */ + { 32921, 0x0000866C }, /* GL_MAP1_VERTEX_ATTRIB12_4_NV */ + { 32950, 0x0000866D }, /* GL_MAP1_VERTEX_ATTRIB13_4_NV */ + { 32979, 0x0000866E }, /* GL_MAP1_VERTEX_ATTRIB14_4_NV */ + { 33008, 0x0000866F }, /* GL_MAP1_VERTEX_ATTRIB15_4_NV */ + { 33037, 0x00008670 }, /* GL_MAP2_VERTEX_ATTRIB0_4_NV */ + { 33065, 0x00008671 }, /* GL_MAP2_VERTEX_ATTRIB1_4_NV */ + { 33093, 0x00008672 }, /* GL_MAP2_VERTEX_ATTRIB2_4_NV */ + { 33121, 0x00008673 }, /* GL_MAP2_VERTEX_ATTRIB3_4_NV */ + { 33149, 0x00008674 }, /* GL_MAP2_VERTEX_ATTRIB4_4_NV */ + { 33177, 0x00008675 }, /* GL_MAP2_VERTEX_ATTRIB5_4_NV */ + { 33205, 0x00008676 }, /* GL_MAP2_VERTEX_ATTRIB6_4_NV */ + { 33233, 0x00008677 }, /* GL_PROGRAM_BINDING_ARB */ + { 33256, 0x00008678 }, /* GL_MAP2_VERTEX_ATTRIB8_4_NV */ + { 33284, 0x00008679 }, /* GL_MAP2_VERTEX_ATTRIB9_4_NV */ + { 33312, 0x0000867A }, /* GL_MAP2_VERTEX_ATTRIB10_4_NV */ + { 33341, 0x0000867B }, /* GL_MAP2_VERTEX_ATTRIB11_4_NV */ + { 33370, 0x0000867C }, /* GL_MAP2_VERTEX_ATTRIB12_4_NV */ + { 33399, 0x0000867D }, /* GL_MAP2_VERTEX_ATTRIB13_4_NV */ + { 33428, 0x0000867E }, /* GL_MAP2_VERTEX_ATTRIB14_4_NV */ + { 33457, 0x0000867F }, /* GL_MAP2_VERTEX_ATTRIB15_4_NV */ + { 33486, 0x000086A0 }, /* GL_TEXTURE_COMPRESSED_IMAGE_SIZE */ + { 33519, 0x000086A1 }, /* GL_TEXTURE_COMPRESSED */ + { 33541, 0x000086A2 }, /* GL_NUM_COMPRESSED_TEXTURE_FORMATS */ + { 33575, 0x000086A3 }, /* GL_COMPRESSED_TEXTURE_FORMATS */ + { 33605, 0x000086A4 }, /* GL_MAX_VERTEX_UNITS_ARB */ + { 33629, 0x000086A5 }, /* GL_ACTIVE_VERTEX_UNITS_ARB */ + { 33656, 0x000086A6 }, /* GL_WEIGHT_SUM_UNITY_ARB */ + { 33680, 0x000086A7 }, /* GL_VERTEX_BLEND_ARB */ + { 33700, 0x000086A8 }, /* GL_CURRENT_WEIGHT_ARB */ + { 33722, 0x000086A9 }, /* GL_WEIGHT_ARRAY_TYPE_ARB */ + { 33747, 0x000086AA }, /* GL_WEIGHT_ARRAY_STRIDE_ARB */ + { 33774, 0x000086AB }, /* GL_WEIGHT_ARRAY_SIZE_ARB */ + { 33799, 0x000086AC }, /* GL_WEIGHT_ARRAY_POINTER_ARB */ + { 33827, 0x000086AD }, /* GL_WEIGHT_ARRAY_ARB */ + { 33847, 0x000086AE }, /* GL_DOT3_RGB */ + { 33859, 0x000086AF }, /* GL_DOT3_RGBA */ + { 33872, 0x000086B0 }, /* GL_COMPRESSED_RGB_FXT1_3DFX */ + { 33900, 0x000086B1 }, /* GL_COMPRESSED_RGBA_FXT1_3DFX */ + { 33929, 0x000086B2 }, /* GL_MULTISAMPLE_3DFX */ + { 33949, 0x000086B3 }, /* GL_SAMPLE_BUFFERS_3DFX */ + { 33972, 0x000086B4 }, /* GL_SAMPLES_3DFX */ + { 33988, 0x000086C0 }, /* GL_EVAL_2D_NV */ + { 34002, 0x000086C1 }, /* GL_EVAL_TRIANGULAR_2D_NV */ + { 34027, 0x000086C2 }, /* GL_MAP_TESSELLATION_NV */ + { 34050, 0x000086C3 }, /* GL_MAP_ATTRIB_U_ORDER_NV */ + { 34075, 0x000086C4 }, /* GL_MAP_ATTRIB_V_ORDER_NV */ + { 34100, 0x000086C5 }, /* GL_EVAL_FRACTIONAL_TESSELLATION_NV */ + { 34135, 0x000086C6 }, /* GL_EVAL_VERTEX_ATTRIB0_NV */ + { 34161, 0x000086C7 }, /* GL_EVAL_VERTEX_ATTRIB1_NV */ + { 34187, 0x000086C8 }, /* GL_EVAL_VERTEX_ATTRIB2_NV */ + { 34213, 0x000086C9 }, /* GL_EVAL_VERTEX_ATTRIB3_NV */ + { 34239, 0x000086CA }, /* GL_EVAL_VERTEX_ATTRIB4_NV */ + { 34265, 0x000086CB }, /* GL_EVAL_VERTEX_ATTRIB5_NV */ + { 34291, 0x000086CC }, /* GL_EVAL_VERTEX_ATTRIB6_NV */ + { 34317, 0x000086CD }, /* GL_EVAL_VERTEX_ATTRIB7_NV */ + { 34343, 0x000086CE }, /* GL_EVAL_VERTEX_ATTRIB8_NV */ + { 34369, 0x000086CF }, /* GL_EVAL_VERTEX_ATTRIB9_NV */ + { 34395, 0x000086D0 }, /* GL_EVAL_VERTEX_ATTRIB10_NV */ + { 34422, 0x000086D1 }, /* GL_EVAL_VERTEX_ATTRIB11_NV */ + { 34449, 0x000086D2 }, /* GL_EVAL_VERTEX_ATTRIB12_NV */ + { 34476, 0x000086D3 }, /* GL_EVAL_VERTEX_ATTRIB13_NV */ + { 34503, 0x000086D4 }, /* GL_EVAL_VERTEX_ATTRIB14_NV */ + { 34530, 0x000086D5 }, /* GL_EVAL_VERTEX_ATTRIB15_NV */ + { 34557, 0x000086D6 }, /* GL_MAX_MAP_TESSELLATION_NV */ + { 34584, 0x000086D7 }, /* GL_MAX_RATIONAL_EVAL_ORDER_NV */ + { 34614, 0x000086D8 }, /* GL_MAX_PROGRAM_PATCH_ATTRIBS_NV */ + { 34646, 0x000086D9 }, /* GL_RGBA_UNSIGNED_DOT_PRODUCT_MAPPING_NV */ + { 34686, 0x000086DA }, /* GL_UNSIGNED_INT_S8_S8_8_8_NV */ + { 34715, 0x000086DB }, /* GL_UNSIGNED_INT_8_8_S8_S8_REV_NV */ + { 34748, 0x000086DC }, /* GL_DSDT_MAG_INTENSITY_NV */ + { 34773, 0x000086DD }, /* GL_SHADER_CONSISTENT_NV */ + { 34797, 0x000086DE }, /* GL_TEXTURE_SHADER_NV */ + { 34818, 0x000086DF }, /* GL_SHADER_OPERATION_NV */ + { 34841, 0x000086E0 }, /* GL_CULL_MODES_NV */ + { 34858, 0x000086E1 }, /* GL_OFFSET_TEXTURE_MATRIX_NV */ + { 34886, 0x000086E2 }, /* GL_OFFSET_TEXTURE_SCALE_NV */ + { 34913, 0x000086E3 }, /* GL_OFFSET_TEXTURE_BIAS_NV */ + { 34939, 0x000086E4 }, /* GL_PREVIOUS_TEXTURE_INPUT_NV */ + { 34968, 0x000086E5 }, /* GL_CONST_EYE_NV */ + { 34984, 0x000086E6 }, /* GL_PASS_THROUGH_NV */ + { 35003, 0x000086E7 }, /* GL_CULL_FRAGMENT_NV */ + { 35023, 0x000086E8 }, /* GL_OFFSET_TEXTURE_2D_NV */ + { 35047, 0x000086E9 }, /* GL_DEPENDENT_AR_TEXTURE_2D_NV */ + { 35077, 0x000086EA }, /* GL_DEPENDENT_GB_TEXTURE_2D_NV */ + { 35107, 0x000086EB }, /* GL_SURFACE_STATE_NV */ + { 35127, 0x000086EC }, /* GL_DOT_PRODUCT_NV */ + { 35145, 0x000086ED }, /* GL_DOT_PRODUCT_DEPTH_REPLACE_NV */ + { 35177, 0x000086EE }, /* GL_DOT_PRODUCT_TEXTURE_2D_NV */ + { 35206, 0x000086EF }, /* GL_DOT_PRODUCT_TEXTURE_3D_NV */ + { 35235, 0x000086F0 }, /* GL_DOT_PRODUCT_TEXTURE_CUBE_MAP_NV */ + { 35270, 0x000086F1 }, /* GL_DOT_PRODUCT_DIFFUSE_CUBE_MAP_NV */ + { 35305, 0x000086F2 }, /* GL_DOT_PRODUCT_REFLECT_CUBE_MAP_NV */ + { 35340, 0x000086F3 }, /* GL_DOT_PRODUCT_CONST_EYE_REFLECT_CUBE_MAP_NV */ + { 35385, 0x000086F4 }, /* GL_HILO_NV */ + { 35396, 0x000086F5 }, /* GL_DSDT_NV */ + { 35407, 0x000086F6 }, /* GL_DSDT_MAG_NV */ + { 35422, 0x000086F7 }, /* GL_DSDT_MAG_VIB_NV */ + { 35441, 0x000086F8 }, /* GL_HILO16_NV */ + { 35454, 0x000086F9 }, /* GL_SIGNED_HILO_NV */ + { 35472, 0x000086FA }, /* GL_SIGNED_HILO16_NV */ + { 35492, 0x000086FB }, /* GL_SIGNED_RGBA_NV */ + { 35510, 0x000086FC }, /* GL_SIGNED_RGBA8_NV */ + { 35529, 0x000086FD }, /* GL_SURFACE_REGISTERED_NV */ + { 35554, 0x000086FE }, /* GL_SIGNED_RGB_NV */ + { 35571, 0x000086FF }, /* GL_SIGNED_RGB8_NV */ + { 35589, 0x00008700 }, /* GL_SURFACE_MAPPED_NV */ + { 35610, 0x00008701 }, /* GL_SIGNED_LUMINANCE_NV */ + { 35633, 0x00008702 }, /* GL_SIGNED_LUMINANCE8_NV */ + { 35657, 0x00008703 }, /* GL_SIGNED_LUMINANCE_ALPHA_NV */ + { 35686, 0x00008704 }, /* GL_SIGNED_LUMINANCE8_ALPHA8_NV */ + { 35717, 0x00008705 }, /* GL_SIGNED_ALPHA_NV */ + { 35736, 0x00008706 }, /* GL_SIGNED_ALPHA8_NV */ + { 35756, 0x00008707 }, /* GL_SIGNED_INTENSITY_NV */ + { 35779, 0x00008708 }, /* GL_SIGNED_INTENSITY8_NV */ + { 35803, 0x00008709 }, /* GL_DSDT8_NV */ + { 35815, 0x0000870A }, /* GL_DSDT8_MAG8_NV */ + { 35832, 0x0000870B }, /* GL_DSDT8_MAG8_INTENSITY8_NV */ + { 35860, 0x0000870C }, /* GL_SIGNED_RGB_UNSIGNED_ALPHA_NV */ + { 35892, 0x0000870D }, /* GL_SIGNED_RGB8_UNSIGNED_ALPHA8_NV */ + { 35926, 0x0000870E }, /* GL_HI_SCALE_NV */ + { 35941, 0x0000870F }, /* GL_LO_SCALE_NV */ + { 35956, 0x00008710 }, /* GL_DS_SCALE_NV */ + { 35971, 0x00008711 }, /* GL_DT_SCALE_NV */ + { 35986, 0x00008712 }, /* GL_MAGNITUDE_SCALE_NV */ + { 36008, 0x00008713 }, /* GL_VIBRANCE_SCALE_NV */ + { 36029, 0x00008714 }, /* GL_HI_BIAS_NV */ + { 36043, 0x00008715 }, /* GL_LO_BIAS_NV */ + { 36057, 0x00008716 }, /* GL_DS_BIAS_NV */ + { 36071, 0x00008717 }, /* GL_DT_BIAS_NV */ + { 36085, 0x00008718 }, /* GL_MAGNITUDE_BIAS_NV */ + { 36106, 0x00008719 }, /* GL_VIBRANCE_BIAS_NV */ + { 36126, 0x0000871A }, /* GL_TEXTURE_BORDER_VALUES_NV */ + { 36154, 0x0000871B }, /* GL_TEXTURE_HI_SIZE_NV */ + { 36176, 0x0000871C }, /* GL_TEXTURE_LO_SIZE_NV */ + { 36198, 0x0000871D }, /* GL_TEXTURE_DS_SIZE_NV */ + { 36220, 0x0000871E }, /* GL_TEXTURE_DT_SIZE_NV */ + { 36242, 0x0000871F }, /* GL_TEXTURE_MAG_SIZE_NV */ + { 36265, 0x00008722 }, /* GL_MODELVIEW2_ARB */ + { 36283, 0x00008723 }, /* GL_MODELVIEW3_ARB */ + { 36301, 0x00008724 }, /* GL_MODELVIEW4_ARB */ + { 36319, 0x00008725 }, /* GL_MODELVIEW5_ARB */ + { 36337, 0x00008726 }, /* GL_MODELVIEW6_ARB */ + { 36355, 0x00008727 }, /* GL_MODELVIEW7_ARB */ + { 36373, 0x00008728 }, /* GL_MODELVIEW8_ARB */ + { 36391, 0x00008729 }, /* GL_MODELVIEW9_ARB */ + { 36409, 0x0000872A }, /* GL_MODELVIEW10_ARB */ + { 36428, 0x0000872B }, /* GL_MODELVIEW11_ARB */ + { 36447, 0x0000872C }, /* GL_MODELVIEW12_ARB */ + { 36466, 0x0000872D }, /* GL_MODELVIEW13_ARB */ + { 36485, 0x0000872E }, /* GL_MODELVIEW14_ARB */ + { 36504, 0x0000872F }, /* GL_MODELVIEW15_ARB */ + { 36523, 0x00008730 }, /* GL_MODELVIEW16_ARB */ + { 36542, 0x00008731 }, /* GL_MODELVIEW17_ARB */ + { 36561, 0x00008732 }, /* GL_MODELVIEW18_ARB */ + { 36580, 0x00008733 }, /* GL_MODELVIEW19_ARB */ + { 36599, 0x00008734 }, /* GL_MODELVIEW20_ARB */ + { 36618, 0x00008735 }, /* GL_MODELVIEW21_ARB */ + { 36637, 0x00008736 }, /* GL_MODELVIEW22_ARB */ + { 36656, 0x00008737 }, /* GL_MODELVIEW23_ARB */ + { 36675, 0x00008738 }, /* GL_MODELVIEW24_ARB */ + { 36694, 0x00008739 }, /* GL_MODELVIEW25_ARB */ + { 36713, 0x0000873A }, /* GL_MODELVIEW26_ARB */ + { 36732, 0x0000873B }, /* GL_MODELVIEW27_ARB */ + { 36751, 0x0000873C }, /* GL_MODELVIEW28_ARB */ + { 36770, 0x0000873D }, /* GL_MODELVIEW29_ARB */ + { 36789, 0x0000873E }, /* GL_MODELVIEW30_ARB */ + { 36808, 0x0000873F }, /* GL_MODELVIEW31_ARB */ + { 36827, 0x00008740 }, /* GL_DOT3_RGB_EXT */ + { 36843, 0x00008741 }, /* GL_PROGRAM_BINARY_LENGTH */ + { 36868, 0x00008742 }, /* GL_MIRROR_CLAMP_EXT */ + { 36888, 0x00008743 }, /* GL_MIRROR_CLAMP_TO_EDGE */ + { 36912, 0x00008744 }, /* GL_MODULATE_ADD_ATI */ + { 36932, 0x00008745 }, /* GL_MODULATE_SIGNED_ADD_ATI */ + { 36959, 0x00008746 }, /* GL_MODULATE_SUBTRACT_ATI */ + { 36984, 0x0000874A }, /* GL_SET_AMD */ + { 36995, 0x0000874B }, /* GL_REPLACE_VALUE_AMD */ + { 37016, 0x0000874C }, /* GL_STENCIL_OP_VALUE_AMD */ + { 37040, 0x0000874D }, /* GL_STENCIL_BACK_OP_VALUE_AMD */ + { 37069, 0x0000874E }, /* GL_VERTEX_ATTRIB_ARRAY_LONG */ + { 37097, 0x0000874F }, /* GL_OCCLUSION_QUERY_EVENT_MASK_AMD */ + { 37131, 0x00008757 }, /* GL_YCBCR_MESA */ + { 37145, 0x00008758 }, /* GL_PACK_INVERT_MESA */ + { 37165, 0x00008759 }, /* GL_TEXTURE_1D_STACK_MESAX */ + { 37191, 0x0000875A }, /* GL_TEXTURE_2D_STACK_MESAX */ + { 37217, 0x0000875B }, /* GL_PROXY_TEXTURE_1D_STACK_MESAX */ + { 37249, 0x0000875C }, /* GL_PROXY_TEXTURE_2D_STACK_MESAX */ + { 37281, 0x0000875D }, /* GL_TEXTURE_1D_STACK_BINDING_MESAX */ + { 37315, 0x0000875E }, /* GL_TEXTURE_2D_STACK_BINDING_MESAX */ + { 37349, 0x00008760 }, /* GL_STATIC_ATI */ + { 37363, 0x00008761 }, /* GL_DYNAMIC_ATI */ + { 37378, 0x00008762 }, /* GL_PRESERVE_ATI */ + { 37394, 0x00008763 }, /* GL_DISCARD_ATI */ + { 37409, 0x00008764 }, /* GL_BUFFER_SIZE */ + { 37424, 0x00008765 }, /* GL_BUFFER_USAGE */ + { 37440, 0x00008766 }, /* GL_ARRAY_OBJECT_BUFFER_ATI */ + { 37467, 0x00008767 }, /* GL_ARRAY_OBJECT_OFFSET_ATI */ + { 37494, 0x00008768 }, /* GL_ELEMENT_ARRAY_ATI */ + { 37515, 0x00008769 }, /* GL_ELEMENT_ARRAY_TYPE_ATI */ + { 37541, 0x0000876A }, /* GL_ELEMENT_ARRAY_POINTER_ATI */ + { 37570, 0x0000876B }, /* GL_MAX_VERTEX_STREAMS_ATI */ + { 37596, 0x0000876C }, /* GL_VERTEX_STREAM0_ATI */ + { 37618, 0x0000876D }, /* GL_VERTEX_STREAM1_ATI */ + { 37640, 0x0000876E }, /* GL_VERTEX_STREAM2_ATI */ + { 37662, 0x0000876F }, /* GL_VERTEX_STREAM3_ATI */ + { 37684, 0x00008770 }, /* GL_VERTEX_STREAM4_ATI */ + { 37706, 0x00008771 }, /* GL_VERTEX_STREAM5_ATI */ + { 37728, 0x00008772 }, /* GL_VERTEX_STREAM6_ATI */ + { 37750, 0x00008773 }, /* GL_VERTEX_STREAM7_ATI */ + { 37772, 0x00008774 }, /* GL_VERTEX_SOURCE_ATI */ + { 37793, 0x00008775 }, /* GL_BUMP_ROT_MATRIX_ATI */ + { 37816, 0x00008776 }, /* GL_BUMP_ROT_MATRIX_SIZE_ATI */ + { 37844, 0x00008777 }, /* GL_BUMP_NUM_TEX_UNITS_ATI */ + { 37870, 0x00008778 }, /* GL_BUMP_TEX_UNITS_ATI */ + { 37892, 0x00008779 }, /* GL_DUDV_ATI */ + { 37904, 0x0000877A }, /* GL_DU8DV8_ATI */ + { 37918, 0x0000877B }, /* GL_BUMP_ENVMAP_ATI */ + { 37937, 0x0000877C }, /* GL_BUMP_TARGET_ATI */ + { 37956, 0x00008780 }, /* GL_VERTEX_SHADER_EXT */ + { 37977, 0x00008781 }, /* GL_VERTEX_SHADER_BINDING_EXT */ + { 38006, 0x00008782 }, /* GL_OP_INDEX_EXT */ + { 38022, 0x00008783 }, /* GL_OP_NEGATE_EXT */ + { 38039, 0x00008784 }, /* GL_OP_DOT3_EXT */ + { 38054, 0x00008785 }, /* GL_OP_DOT4_EXT */ + { 38069, 0x00008786 }, /* GL_OP_MUL_EXT */ + { 38083, 0x00008787 }, /* GL_OP_ADD_EXT */ + { 38097, 0x00008788 }, /* GL_OP_MADD_EXT */ + { 38112, 0x00008789 }, /* GL_OP_FRAC_EXT */ + { 38127, 0x0000878A }, /* GL_OP_MAX_EXT */ + { 38141, 0x0000878B }, /* GL_OP_MIN_EXT */ + { 38155, 0x0000878C }, /* GL_OP_SET_GE_EXT */ + { 38172, 0x0000878D }, /* GL_OP_SET_LT_EXT */ + { 38189, 0x0000878E }, /* GL_OP_CLAMP_EXT */ + { 38205, 0x0000878F }, /* GL_OP_FLOOR_EXT */ + { 38221, 0x00008790 }, /* GL_OP_ROUND_EXT */ + { 38237, 0x00008791 }, /* GL_OP_EXP_BASE_2_EXT */ + { 38258, 0x00008792 }, /* GL_OP_LOG_BASE_2_EXT */ + { 38279, 0x00008793 }, /* GL_OP_POWER_EXT */ + { 38295, 0x00008794 }, /* GL_OP_RECIP_EXT */ + { 38311, 0x00008795 }, /* GL_OP_RECIP_SQRT_EXT */ + { 38332, 0x00008796 }, /* GL_OP_SUB_EXT */ + { 38346, 0x00008797 }, /* GL_OP_CROSS_PRODUCT_EXT */ + { 38370, 0x00008798 }, /* GL_OP_MULTIPLY_MATRIX_EXT */ + { 38396, 0x00008799 }, /* GL_OP_MOV_EXT */ + { 38410, 0x0000879A }, /* GL_OUTPUT_VERTEX_EXT */ + { 38431, 0x0000879B }, /* GL_OUTPUT_COLOR0_EXT */ + { 38452, 0x0000879C }, /* GL_OUTPUT_COLOR1_EXT */ + { 38473, 0x0000879D }, /* GL_OUTPUT_TEXTURE_COORD0_EXT */ + { 38502, 0x0000879E }, /* GL_OUTPUT_TEXTURE_COORD1_EXT */ + { 38531, 0x0000879F }, /* GL_OUTPUT_TEXTURE_COORD2_EXT */ + { 38560, 0x000087A0 }, /* GL_OUTPUT_TEXTURE_COORD3_EXT */ + { 38589, 0x000087A1 }, /* GL_OUTPUT_TEXTURE_COORD4_EXT */ + { 38618, 0x000087A2 }, /* GL_OUTPUT_TEXTURE_COORD5_EXT */ + { 38647, 0x000087A3 }, /* GL_OUTPUT_TEXTURE_COORD6_EXT */ + { 38676, 0x000087A4 }, /* GL_OUTPUT_TEXTURE_COORD7_EXT */ + { 38705, 0x000087A5 }, /* GL_OUTPUT_TEXTURE_COORD8_EXT */ + { 38734, 0x000087A6 }, /* GL_OUTPUT_TEXTURE_COORD9_EXT */ + { 38763, 0x000087A7 }, /* GL_OUTPUT_TEXTURE_COORD10_EXT */ + { 38793, 0x000087A8 }, /* GL_OUTPUT_TEXTURE_COORD11_EXT */ + { 38823, 0x000087A9 }, /* GL_OUTPUT_TEXTURE_COORD12_EXT */ + { 38853, 0x000087AA }, /* GL_OUTPUT_TEXTURE_COORD13_EXT */ + { 38883, 0x000087AB }, /* GL_OUTPUT_TEXTURE_COORD14_EXT */ + { 38913, 0x000087AC }, /* GL_OUTPUT_TEXTURE_COORD15_EXT */ + { 38943, 0x000087AD }, /* GL_OUTPUT_TEXTURE_COORD16_EXT */ + { 38973, 0x000087AE }, /* GL_OUTPUT_TEXTURE_COORD17_EXT */ + { 39003, 0x000087AF }, /* GL_OUTPUT_TEXTURE_COORD18_EXT */ + { 39033, 0x000087B0 }, /* GL_OUTPUT_TEXTURE_COORD19_EXT */ + { 39063, 0x000087B1 }, /* GL_OUTPUT_TEXTURE_COORD20_EXT */ + { 39093, 0x000087B2 }, /* GL_OUTPUT_TEXTURE_COORD21_EXT */ + { 39123, 0x000087B3 }, /* GL_OUTPUT_TEXTURE_COORD22_EXT */ + { 39153, 0x000087B4 }, /* GL_OUTPUT_TEXTURE_COORD23_EXT */ + { 39183, 0x000087B5 }, /* GL_OUTPUT_TEXTURE_COORD24_EXT */ + { 39213, 0x000087B6 }, /* GL_OUTPUT_TEXTURE_COORD25_EXT */ + { 39243, 0x000087B7 }, /* GL_OUTPUT_TEXTURE_COORD26_EXT */ + { 39273, 0x000087B8 }, /* GL_OUTPUT_TEXTURE_COORD27_EXT */ + { 39303, 0x000087B9 }, /* GL_OUTPUT_TEXTURE_COORD28_EXT */ + { 39333, 0x000087BA }, /* GL_OUTPUT_TEXTURE_COORD29_EXT */ + { 39363, 0x000087BB }, /* GL_OUTPUT_TEXTURE_COORD30_EXT */ + { 39393, 0x000087BC }, /* GL_OUTPUT_TEXTURE_COORD31_EXT */ + { 39423, 0x000087BD }, /* GL_OUTPUT_FOG_EXT */ + { 39441, 0x000087BE }, /* GL_SCALAR_EXT */ + { 39455, 0x000087BF }, /* GL_VECTOR_EXT */ + { 39469, 0x000087C0 }, /* GL_MATRIX_EXT */ + { 39483, 0x000087C1 }, /* GL_VARIANT_EXT */ + { 39498, 0x000087C2 }, /* GL_INVARIANT_EXT */ + { 39515, 0x000087C3 }, /* GL_LOCAL_CONSTANT_EXT */ + { 39537, 0x000087C4 }, /* GL_LOCAL_EXT */ + { 39550, 0x000087C5 }, /* GL_MAX_VERTEX_SHADER_INSTRUCTIONS_EXT */ + { 39588, 0x000087C6 }, /* GL_MAX_VERTEX_SHADER_VARIANTS_EXT */ + { 39622, 0x000087C7 }, /* GL_MAX_VERTEX_SHADER_INVARIANTS_EXT */ + { 39658, 0x000087C8 }, /* GL_MAX_VERTEX_SHADER_LOCAL_CONSTANTS_EXT */ + { 39699, 0x000087C9 }, /* GL_MAX_VERTEX_SHADER_LOCALS_EXT */ + { 39731, 0x000087CA }, /* GL_MAX_OPTIMIZED_VERTEX_SHADER_INSTRUCTIONS_EXT */ + { 39779, 0x000087CB }, /* GL_MAX_OPTIMIZED_VERTEX_SHADER_VARIANTS_EXT */ + { 39823, 0x000087CC }, /* GL_MAX_OPTIMIZED_VERTEX_SHADER_LOCAL_CONSTANTS_EXT */ + { 39874, 0x000087CD }, /* GL_MAX_OPTIMIZED_VERTEX_SHADER_INVARIANTS_EXT */ + { 39920, 0x000087CE }, /* GL_MAX_OPTIMIZED_VERTEX_SHADER_LOCALS_EXT */ + { 39962, 0x000087CF }, /* GL_VERTEX_SHADER_INSTRUCTIONS_EXT */ + { 39996, 0x000087D0 }, /* GL_VERTEX_SHADER_VARIANTS_EXT */ + { 40026, 0x000087D1 }, /* GL_VERTEX_SHADER_INVARIANTS_EXT */ + { 40058, 0x000087D2 }, /* GL_VERTEX_SHADER_LOCAL_CONSTANTS_EXT */ + { 40095, 0x000087D3 }, /* GL_VERTEX_SHADER_LOCALS_EXT */ + { 40123, 0x000087D4 }, /* GL_VERTEX_SHADER_OPTIMIZED_EXT */ + { 40154, 0x000087D5 }, /* GL_X_EXT */ + { 40163, 0x000087D6 }, /* GL_Y_EXT */ + { 40172, 0x000087D7 }, /* GL_Z_EXT */ + { 40181, 0x000087D8 }, /* GL_W_EXT */ + { 40190, 0x000087D9 }, /* GL_NEGATIVE_X_EXT */ + { 40208, 0x000087DA }, /* GL_NEGATIVE_Y_EXT */ + { 40226, 0x000087DB }, /* GL_NEGATIVE_Z_EXT */ + { 40244, 0x000087DC }, /* GL_NEGATIVE_W_EXT */ + { 40262, 0x000087DD }, /* GL_ZERO_EXT */ + { 40274, 0x000087DE }, /* GL_ONE_EXT */ + { 40285, 0x000087DF }, /* GL_NEGATIVE_ONE_EXT */ + { 40305, 0x000087E0 }, /* GL_NORMALIZED_RANGE_EXT */ + { 40329, 0x000087E1 }, /* GL_FULL_RANGE_EXT */ + { 40347, 0x000087E2 }, /* GL_CURRENT_VERTEX_EXT */ + { 40369, 0x000087E3 }, /* GL_MVP_MATRIX_EXT */ + { 40387, 0x000087E4 }, /* GL_VARIANT_VALUE_EXT */ + { 40408, 0x000087E5 }, /* GL_VARIANT_DATATYPE_EXT */ + { 40432, 0x000087E6 }, /* GL_VARIANT_ARRAY_STRIDE_EXT */ + { 40460, 0x000087E7 }, /* GL_VARIANT_ARRAY_TYPE_EXT */ + { 40486, 0x000087E8 }, /* GL_VARIANT_ARRAY_EXT */ + { 40507, 0x000087E9 }, /* GL_VARIANT_ARRAY_POINTER_EXT */ + { 40536, 0x000087EA }, /* GL_INVARIANT_VALUE_EXT */ + { 40559, 0x000087EB }, /* GL_INVARIANT_DATATYPE_EXT */ + { 40585, 0x000087EC }, /* GL_LOCAL_CONSTANT_VALUE_EXT */ + { 40613, 0x000087ED }, /* GL_LOCAL_CONSTANT_DATATYPE_EXT */ + { 40644, 0x000087EE }, /* GL_ATC_RGBA_INTERPOLATED_ALPHA_AMD */ + { 40679, 0x000087F0 }, /* GL_PN_TRIANGLES_ATI */ + { 40699, 0x000087F1 }, /* GL_MAX_PN_TRIANGLES_TESSELATION_LEVEL_ATI */ + { 40741, 0x000087F2 }, /* GL_PN_TRIANGLES_POINT_MODE_ATI */ + { 40772, 0x000087F3 }, /* GL_PN_TRIANGLES_NORMAL_MODE_ATI */ + { 40804, 0x000087F4 }, /* GL_PN_TRIANGLES_TESSELATION_LEVEL_ATI */ + { 40842, 0x000087F5 }, /* GL_PN_TRIANGLES_POINT_MODE_LINEAR_ATI */ + { 40880, 0x000087F6 }, /* GL_PN_TRIANGLES_POINT_MODE_CUBIC_ATI */ + { 40917, 0x000087F7 }, /* GL_PN_TRIANGLES_NORMAL_MODE_LINEAR_ATI */ + { 40956, 0x000087F8 }, /* GL_PN_TRIANGLES_NORMAL_MODE_QUADRATIC_ATI */ + { 40998, 0x000087F9 }, /* GL_3DC_X_AMD */ + { 41011, 0x000087FA }, /* GL_3DC_XY_AMD */ + { 41025, 0x000087FB }, /* GL_VBO_FREE_MEMORY_ATI */ + { 41048, 0x000087FC }, /* GL_TEXTURE_FREE_MEMORY_ATI */ + { 41075, 0x000087FD }, /* GL_RENDERBUFFER_FREE_MEMORY_ATI */ + { 41107, 0x000087FE }, /* GL_NUM_PROGRAM_BINARY_FORMATS */ + { 41137, 0x000087FF }, /* GL_PROGRAM_BINARY_FORMATS */ + { 41163, 0x00008800 }, /* GL_STENCIL_BACK_FUNC */ + { 41184, 0x00008801 }, /* GL_STENCIL_BACK_FAIL */ + { 41205, 0x00008802 }, /* GL_STENCIL_BACK_PASS_DEPTH_FAIL */ + { 41237, 0x00008803 }, /* GL_STENCIL_BACK_PASS_DEPTH_PASS */ + { 41269, 0x00008804 }, /* GL_FRAGMENT_PROGRAM_ARB */ + { 41293, 0x00008805 }, /* GL_PROGRAM_ALU_INSTRUCTIONS_ARB */ + { 41325, 0x00008806 }, /* GL_PROGRAM_TEX_INSTRUCTIONS_ARB */ + { 41357, 0x00008807 }, /* GL_PROGRAM_TEX_INDIRECTIONS_ARB */ + { 41389, 0x00008808 }, /* GL_PROGRAM_NATIVE_ALU_INSTRUCTIONS_ARB */ + { 41428, 0x00008809 }, /* GL_PROGRAM_NATIVE_TEX_INSTRUCTIONS_ARB */ + { 41467, 0x0000880A }, /* GL_PROGRAM_NATIVE_TEX_INDIRECTIONS_ARB */ + { 41506, 0x0000880B }, /* GL_MAX_PROGRAM_ALU_INSTRUCTIONS_ARB */ + { 41542, 0x0000880C }, /* GL_MAX_PROGRAM_TEX_INSTRUCTIONS_ARB */ + { 41578, 0x0000880D }, /* GL_MAX_PROGRAM_TEX_INDIRECTIONS_ARB */ + { 41614, 0x0000880E }, /* GL_MAX_PROGRAM_NATIVE_ALU_INSTRUCTIONS_ARB */ + { 41657, 0x0000880F }, /* GL_MAX_PROGRAM_NATIVE_TEX_INSTRUCTIONS_ARB */ + { 41700, 0x00008810 }, /* GL_MAX_PROGRAM_NATIVE_TEX_INDIRECTIONS_ARB */ + { 41743, 0x00008814 }, /* GL_RGBA32F */ + { 41754, 0x00008815 }, /* GL_RGB32F */ + { 41764, 0x00008816 }, /* GL_ALPHA32F_ARB */ + { 41780, 0x00008817 }, /* GL_INTENSITY32F_ARB */ + { 41800, 0x00008818 }, /* GL_LUMINANCE32F_ARB */ + { 41820, 0x00008819 }, /* GL_LUMINANCE_ALPHA32F_ARB */ + { 41846, 0x0000881A }, /* GL_RGBA16F */ + { 41857, 0x0000881B }, /* GL_RGB16F */ + { 41867, 0x0000881C }, /* GL_ALPHA16F_ARB */ + { 41883, 0x0000881D }, /* GL_INTENSITY16F_ARB */ + { 41903, 0x0000881E }, /* GL_LUMINANCE16F_ARB */ + { 41923, 0x0000881F }, /* GL_LUMINANCE_ALPHA16F_ARB */ + { 41949, 0x00008820 }, /* GL_RGBA_FLOAT_MODE_ARB */ + { 41972, 0x00008823 }, /* GL_WRITEONLY_RENDERING_QCOM */ + { 42000, 0x00008824 }, /* GL_MAX_DRAW_BUFFERS */ + { 42020, 0x00008825 }, /* GL_DRAW_BUFFER0 */ + { 42036, 0x00008826 }, /* GL_DRAW_BUFFER1 */ + { 42052, 0x00008827 }, /* GL_DRAW_BUFFER2 */ + { 42068, 0x00008828 }, /* GL_DRAW_BUFFER3 */ + { 42084, 0x00008829 }, /* GL_DRAW_BUFFER4 */ + { 42100, 0x0000882A }, /* GL_DRAW_BUFFER5 */ + { 42116, 0x0000882B }, /* GL_DRAW_BUFFER6 */ + { 42132, 0x0000882C }, /* GL_DRAW_BUFFER7 */ + { 42148, 0x0000882D }, /* GL_DRAW_BUFFER8 */ + { 42164, 0x0000882E }, /* GL_DRAW_BUFFER9 */ + { 42180, 0x0000882F }, /* GL_DRAW_BUFFER10 */ + { 42197, 0x00008830 }, /* GL_DRAW_BUFFER11 */ + { 42214, 0x00008831 }, /* GL_DRAW_BUFFER12 */ + { 42231, 0x00008832 }, /* GL_DRAW_BUFFER13 */ + { 42248, 0x00008833 }, /* GL_DRAW_BUFFER14 */ + { 42265, 0x00008834 }, /* GL_DRAW_BUFFER15 */ + { 42282, 0x00008835 }, /* GL_COLOR_CLEAR_UNCLAMPED_VALUE_ATI */ + { 42317, 0x0000883D }, /* GL_BLEND_EQUATION_ALPHA */ + { 42341, 0x0000883F }, /* GL_SUBSAMPLE_DISTANCE_AMD */ + { 42367, 0x00008840 }, /* GL_MATRIX_PALETTE_ARB */ + { 42389, 0x00008841 }, /* GL_MAX_MATRIX_PALETTE_STACK_DEPTH_ARB */ + { 42427, 0x00008842 }, /* GL_MAX_PALETTE_MATRICES_ARB */ + { 42455, 0x00008843 }, /* GL_CURRENT_PALETTE_MATRIX_ARB */ + { 42485, 0x00008844 }, /* GL_MATRIX_INDEX_ARRAY_ARB */ + { 42511, 0x00008845 }, /* GL_CURRENT_MATRIX_INDEX_ARB */ + { 42539, 0x00008846 }, /* GL_MATRIX_INDEX_ARRAY_SIZE_ARB */ + { 42570, 0x00008847 }, /* GL_MATRIX_INDEX_ARRAY_TYPE_ARB */ + { 42601, 0x00008848 }, /* GL_MATRIX_INDEX_ARRAY_STRIDE_ARB */ + { 42634, 0x00008849 }, /* GL_MATRIX_INDEX_ARRAY_POINTER_ARB */ + { 42668, 0x0000884A }, /* GL_TEXTURE_DEPTH_SIZE */ + { 42690, 0x0000884B }, /* GL_DEPTH_TEXTURE_MODE */ + { 42712, 0x0000884C }, /* GL_TEXTURE_COMPARE_MODE */ + { 42736, 0x0000884D }, /* GL_TEXTURE_COMPARE_FUNC */ + { 42760, 0x0000884E }, /* GL_COMPARE_REF_TO_TEXTURE */ + { 42786, 0x0000884F }, /* GL_TEXTURE_CUBE_MAP_SEAMLESS */ + { 42815, 0x00008850 }, /* GL_OFFSET_PROJECTIVE_TEXTURE_2D_NV */ + { 42850, 0x00008851 }, /* GL_OFFSET_PROJECTIVE_TEXTURE_2D_SCALE_NV */ + { 42891, 0x00008852 }, /* GL_OFFSET_PROJECTIVE_TEXTURE_RECTANGLE_NV */ + { 42933, 0x00008853 }, /* GL_OFFSET_PROJECTIVE_TEXTURE_RECTANGLE_SCALE_NV */ + { 42981, 0x00008854 }, /* GL_OFFSET_HILO_TEXTURE_2D_NV */ + { 43010, 0x00008855 }, /* GL_OFFSET_HILO_TEXTURE_RECTANGLE_NV */ + { 43046, 0x00008856 }, /* GL_OFFSET_HILO_PROJECTIVE_TEXTURE_2D_NV */ + { 43086, 0x00008857 }, /* GL_OFFSET_HILO_PROJECTIVE_TEXTURE_RECTANGLE_NV */ + { 43133, 0x00008858 }, /* GL_DEPENDENT_HILO_TEXTURE_2D_NV */ + { 43165, 0x00008859 }, /* GL_DEPENDENT_RGB_TEXTURE_3D_NV */ + { 43196, 0x0000885A }, /* GL_DEPENDENT_RGB_TEXTURE_CUBE_MAP_NV */ + { 43233, 0x0000885B }, /* GL_DOT_PRODUCT_PASS_THROUGH_NV */ + { 43264, 0x0000885C }, /* GL_DOT_PRODUCT_TEXTURE_1D_NV */ + { 43293, 0x0000885D }, /* GL_DOT_PRODUCT_AFFINE_DEPTH_REPLACE_NV */ + { 43332, 0x0000885E }, /* GL_HILO8_NV */ + { 43344, 0x0000885F }, /* GL_SIGNED_HILO8_NV */ + { 43363, 0x00008860 }, /* GL_FORCE_BLUE_TO_ONE_NV */ + { 43387, 0x00008861 }, /* GL_POINT_SPRITE */ + { 43403, 0x00008862 }, /* GL_COORD_REPLACE */ + { 43420, 0x00008863 }, /* GL_POINT_SPRITE_R_MODE_NV */ + { 43446, 0x00008864 }, /* GL_QUERY_COUNTER_BITS */ + { 43468, 0x00008865 }, /* GL_CURRENT_QUERY */ + { 43485, 0x00008866 }, /* GL_QUERY_RESULT */ + { 43501, 0x00008867 }, /* GL_QUERY_RESULT_AVAILABLE */ + { 43527, 0x00008868 }, /* GL_MAX_FRAGMENT_PROGRAM_LOCAL_PARAMETERS_NV */ + { 43571, 0x00008869 }, /* GL_MAX_VERTEX_ATTRIBS */ + { 43593, 0x0000886A }, /* GL_VERTEX_ATTRIB_ARRAY_NORMALIZED */ + { 43627, 0x0000886C }, /* GL_MAX_TESS_CONTROL_INPUT_COMPONENTS */ + { 43664, 0x0000886D }, /* GL_MAX_TESS_EVALUATION_INPUT_COMPONENTS */ + { 43704, 0x0000886E }, /* GL_DEPTH_STENCIL_TO_RGBA_NV */ + { 43732, 0x0000886F }, /* GL_DEPTH_STENCIL_TO_BGRA_NV */ + { 43760, 0x00008870 }, /* GL_FRAGMENT_PROGRAM_NV */ + { 43783, 0x00008871 }, /* GL_MAX_TEXTURE_COORDS */ + { 43805, 0x00008872 }, /* GL_MAX_TEXTURE_IMAGE_UNITS */ + { 43832, 0x00008873 }, /* GL_FRAGMENT_PROGRAM_BINDING_NV */ + { 43863, 0x00008874 }, /* GL_PROGRAM_ERROR_STRING_ARB */ + { 43891, 0x00008875 }, /* GL_PROGRAM_FORMAT_ASCII_ARB */ + { 43919, 0x00008876 }, /* GL_PROGRAM_FORMAT_ARB */ + { 43941, 0x00008878 }, /* GL_WRITE_PIXEL_DATA_RANGE_NV */ + { 43970, 0x00008879 }, /* GL_READ_PIXEL_DATA_RANGE_NV */ + { 43998, 0x0000887A }, /* GL_WRITE_PIXEL_DATA_RANGE_LENGTH_NV */ + { 44034, 0x0000887B }, /* GL_READ_PIXEL_DATA_RANGE_LENGTH_NV */ + { 44069, 0x0000887C }, /* GL_WRITE_PIXEL_DATA_RANGE_POINTER_NV */ + { 44106, 0x0000887D }, /* GL_READ_PIXEL_DATA_RANGE_POINTER_NV */ + { 44142, 0x0000887F }, /* GL_GEOMETRY_SHADER_INVOCATIONS */ + { 44173, 0x00008880 }, /* GL_FLOAT_R_NV */ + { 44187, 0x00008881 }, /* GL_FLOAT_RG_NV */ + { 44202, 0x00008882 }, /* GL_FLOAT_RGB_NV */ + { 44218, 0x00008883 }, /* GL_FLOAT_RGBA_NV */ + { 44235, 0x00008884 }, /* GL_FLOAT_R16_NV */ + { 44251, 0x00008885 }, /* GL_FLOAT_R32_NV */ + { 44267, 0x00008886 }, /* GL_FLOAT_RG16_NV */ + { 44284, 0x00008887 }, /* GL_FLOAT_RG32_NV */ + { 44301, 0x00008888 }, /* GL_FLOAT_RGB16_NV */ + { 44319, 0x00008889 }, /* GL_FLOAT_RGB32_NV */ + { 44337, 0x0000888A }, /* GL_FLOAT_RGBA16_NV */ + { 44356, 0x0000888B }, /* GL_FLOAT_RGBA32_NV */ + { 44375, 0x0000888C }, /* GL_TEXTURE_FLOAT_COMPONENTS_NV */ + { 44406, 0x0000888D }, /* GL_FLOAT_CLEAR_COLOR_VALUE_NV */ + { 44436, 0x0000888E }, /* GL_FLOAT_RGBA_MODE_NV */ + { 44458, 0x0000888F }, /* GL_TEXTURE_UNSIGNED_REMAP_MODE_NV */ + { 44492, 0x00008890 }, /* GL_DEPTH_BOUNDS_TEST_EXT */ + { 44517, 0x00008891 }, /* GL_DEPTH_BOUNDS_EXT */ + { 44537, 0x00008892 }, /* GL_ARRAY_BUFFER */ + { 44553, 0x00008893 }, /* GL_ELEMENT_ARRAY_BUFFER */ + { 44577, 0x00008894 }, /* GL_ARRAY_BUFFER_BINDING */ + { 44601, 0x00008895 }, /* GL_ELEMENT_ARRAY_BUFFER_BINDING */ + { 44633, 0x00008896 }, /* GL_VERTEX_ARRAY_BUFFER_BINDING */ + { 44664, 0x00008897 }, /* GL_NORMAL_ARRAY_BUFFER_BINDING */ + { 44695, 0x00008898 }, /* GL_COLOR_ARRAY_BUFFER_BINDING */ + { 44725, 0x00008899 }, /* GL_INDEX_ARRAY_BUFFER_BINDING */ + { 44755, 0x0000889A }, /* GL_TEXTURE_COORD_ARRAY_BUFFER_BINDING */ + { 44793, 0x0000889B }, /* GL_EDGE_FLAG_ARRAY_BUFFER_BINDING */ + { 44827, 0x0000889C }, /* GL_SECONDARY_COLOR_ARRAY_BUFFER_BINDING */ + { 44867, 0x0000889D }, /* GL_FOG_COORDINATE_ARRAY_BUFFER_BINDING */ + { 44906, 0x0000889E }, /* GL_WEIGHT_ARRAY_BUFFER_BINDING */ + { 44937, 0x0000889F }, /* GL_VERTEX_ATTRIB_ARRAY_BUFFER_BINDING */ + { 44975, 0x000088A0 }, /* GL_PROGRAM_INSTRUCTIONS_ARB */ + { 45003, 0x000088A1 }, /* GL_MAX_PROGRAM_INSTRUCTIONS_ARB */ + { 45035, 0x000088A2 }, /* GL_PROGRAM_NATIVE_INSTRUCTIONS_ARB */ + { 45070, 0x000088A3 }, /* GL_MAX_PROGRAM_NATIVE_INSTRUCTIONS_ARB */ + { 45109, 0x000088A4 }, /* GL_PROGRAM_TEMPORARIES_ARB */ + { 45136, 0x000088A5 }, /* GL_MAX_PROGRAM_TEMPORARIES_ARB */ + { 45167, 0x000088A6 }, /* GL_PROGRAM_NATIVE_TEMPORARIES_ARB */ + { 45201, 0x000088A7 }, /* GL_MAX_PROGRAM_NATIVE_TEMPORARIES_ARB */ + { 45239, 0x000088A8 }, /* GL_PROGRAM_PARAMETERS_ARB */ + { 45265, 0x000088A9 }, /* GL_MAX_PROGRAM_PARAMETERS_ARB */ + { 45295, 0x000088AA }, /* GL_PROGRAM_NATIVE_PARAMETERS_ARB */ + { 45328, 0x000088AB }, /* GL_MAX_PROGRAM_NATIVE_PARAMETERS_ARB */ + { 45365, 0x000088AC }, /* GL_PROGRAM_ATTRIBS_ARB */ + { 45388, 0x000088AD }, /* GL_MAX_PROGRAM_ATTRIBS_ARB */ + { 45415, 0x000088AE }, /* GL_PROGRAM_NATIVE_ATTRIBS_ARB */ + { 45445, 0x000088AF }, /* GL_MAX_PROGRAM_NATIVE_ATTRIBS_ARB */ + { 45479, 0x000088B0 }, /* GL_PROGRAM_ADDRESS_REGISTERS_ARB */ + { 45512, 0x000088B1 }, /* GL_MAX_PROGRAM_ADDRESS_REGISTERS_ARB */ + { 45549, 0x000088B2 }, /* GL_PROGRAM_NATIVE_ADDRESS_REGISTERS_ARB */ + { 45589, 0x000088B3 }, /* GL_MAX_PROGRAM_NATIVE_ADDRESS_REGISTERS_ARB */ + { 45633, 0x000088B4 }, /* GL_MAX_PROGRAM_LOCAL_PARAMETERS_ARB */ + { 45669, 0x000088B5 }, /* GL_MAX_PROGRAM_ENV_PARAMETERS_ARB */ + { 45703, 0x000088B6 }, /* GL_PROGRAM_UNDER_NATIVE_LIMITS_ARB */ + { 45738, 0x000088B7 }, /* GL_TRANSPOSE_CURRENT_MATRIX_ARB */ + { 45770, 0x000088B8 }, /* GL_READ_ONLY */ + { 45783, 0x000088B9 }, /* GL_WRITE_ONLY */ + { 45797, 0x000088BA }, /* GL_READ_WRITE */ + { 45811, 0x000088BB }, /* GL_BUFFER_ACCESS */ + { 45828, 0x000088BC }, /* GL_BUFFER_MAPPED */ + { 45845, 0x000088BD }, /* GL_BUFFER_MAP_POINTER */ + { 45867, 0x000088BE }, /* GL_WRITE_DISCARD_NV */ + { 45887, 0x000088BF }, /* GL_TIME_ELAPSED */ + { 45903, 0x000088C0 }, /* GL_MATRIX0_ARB */ + { 45918, 0x000088C1 }, /* GL_MATRIX1_ARB */ + { 45933, 0x000088C2 }, /* GL_MATRIX2_ARB */ + { 45948, 0x000088C3 }, /* GL_MATRIX3_ARB */ + { 45963, 0x000088C4 }, /* GL_MATRIX4_ARB */ + { 45978, 0x000088C5 }, /* GL_MATRIX5_ARB */ + { 45993, 0x000088C6 }, /* GL_MATRIX6_ARB */ + { 46008, 0x000088C7 }, /* GL_MATRIX7_ARB */ + { 46023, 0x000088C8 }, /* GL_MATRIX8_ARB */ + { 46038, 0x000088C9 }, /* GL_MATRIX9_ARB */ + { 46053, 0x000088CA }, /* GL_MATRIX10_ARB */ + { 46069, 0x000088CB }, /* GL_MATRIX11_ARB */ + { 46085, 0x000088CC }, /* GL_MATRIX12_ARB */ + { 46101, 0x000088CD }, /* GL_MATRIX13_ARB */ + { 46117, 0x000088CE }, /* GL_MATRIX14_ARB */ + { 46133, 0x000088CF }, /* GL_MATRIX15_ARB */ + { 46149, 0x000088D0 }, /* GL_MATRIX16_ARB */ + { 46165, 0x000088D1 }, /* GL_MATRIX17_ARB */ + { 46181, 0x000088D2 }, /* GL_MATRIX18_ARB */ + { 46197, 0x000088D3 }, /* GL_MATRIX19_ARB */ + { 46213, 0x000088D4 }, /* GL_MATRIX20_ARB */ + { 46229, 0x000088D5 }, /* GL_MATRIX21_ARB */ + { 46245, 0x000088D6 }, /* GL_MATRIX22_ARB */ + { 46261, 0x000088D7 }, /* GL_MATRIX23_ARB */ + { 46277, 0x000088D8 }, /* GL_MATRIX24_ARB */ + { 46293, 0x000088D9 }, /* GL_MATRIX25_ARB */ + { 46309, 0x000088DA }, /* GL_MATRIX26_ARB */ + { 46325, 0x000088DB }, /* GL_MATRIX27_ARB */ + { 46341, 0x000088DC }, /* GL_MATRIX28_ARB */ + { 46357, 0x000088DD }, /* GL_MATRIX29_ARB */ + { 46373, 0x000088DE }, /* GL_MATRIX30_ARB */ + { 46389, 0x000088DF }, /* GL_MATRIX31_ARB */ + { 46405, 0x000088E0 }, /* GL_STREAM_DRAW */ + { 46420, 0x000088E1 }, /* GL_STREAM_READ */ + { 46435, 0x000088E2 }, /* GL_STREAM_COPY */ + { 46450, 0x000088E4 }, /* GL_STATIC_DRAW */ + { 46465, 0x000088E5 }, /* GL_STATIC_READ */ + { 46480, 0x000088E6 }, /* GL_STATIC_COPY */ + { 46495, 0x000088E8 }, /* GL_DYNAMIC_DRAW */ + { 46511, 0x000088E9 }, /* GL_DYNAMIC_READ */ + { 46527, 0x000088EA }, /* GL_DYNAMIC_COPY */ + { 46543, 0x000088EB }, /* GL_PIXEL_PACK_BUFFER */ + { 46564, 0x000088EC }, /* GL_PIXEL_UNPACK_BUFFER */ + { 46587, 0x000088ED }, /* GL_PIXEL_PACK_BUFFER_BINDING */ + { 46616, 0x000088EE }, /* GL_ETC1_SRGB8_NV */ + { 46633, 0x000088EF }, /* GL_PIXEL_UNPACK_BUFFER_BINDING */ + { 46664, 0x000088F0 }, /* GL_DEPTH24_STENCIL8 */ + { 46684, 0x000088F1 }, /* GL_TEXTURE_STENCIL_SIZE */ + { 46708, 0x000088F2 }, /* GL_STENCIL_TAG_BITS_EXT */ + { 46732, 0x000088F3 }, /* GL_STENCIL_CLEAR_TAG_VALUE_EXT */ + { 46763, 0x000088F4 }, /* GL_MAX_PROGRAM_EXEC_INSTRUCTIONS_NV */ + { 46799, 0x000088F5 }, /* GL_MAX_PROGRAM_CALL_DEPTH_NV */ + { 46828, 0x000088F6 }, /* GL_MAX_PROGRAM_IF_DEPTH_NV */ + { 46855, 0x000088F7 }, /* GL_MAX_PROGRAM_LOOP_DEPTH_NV */ + { 46884, 0x000088F8 }, /* GL_MAX_PROGRAM_LOOP_COUNT_NV */ + { 46913, 0x000088F9 }, /* GL_SRC1_COLOR */ + { 46927, 0x000088FA }, /* GL_ONE_MINUS_SRC1_COLOR */ + { 46951, 0x000088FB }, /* GL_ONE_MINUS_SRC1_ALPHA */ + { 46975, 0x000088FC }, /* GL_MAX_DUAL_SOURCE_DRAW_BUFFERS */ + { 47007, 0x000088FD }, /* GL_VERTEX_ATTRIB_ARRAY_INTEGER */ + { 47038, 0x000088FE }, /* GL_VERTEX_ATTRIB_ARRAY_DIVISOR */ + { 47069, 0x000088FF }, /* GL_MAX_ARRAY_TEXTURE_LAYERS */ + { 47097, 0x00008904 }, /* GL_MIN_PROGRAM_TEXEL_OFFSET */ + { 47125, 0x00008905 }, /* GL_MAX_PROGRAM_TEXEL_OFFSET */ + { 47153, 0x00008906 }, /* GL_PROGRAM_ATTRIB_COMPONENTS_NV */ + { 47185, 0x00008907 }, /* GL_PROGRAM_RESULT_COMPONENTS_NV */ + { 47217, 0x00008908 }, /* GL_MAX_PROGRAM_ATTRIB_COMPONENTS_NV */ + { 47253, 0x00008909 }, /* GL_MAX_PROGRAM_RESULT_COMPONENTS_NV */ + { 47289, 0x00008910 }, /* GL_STENCIL_TEST_TWO_SIDE_EXT */ + { 47318, 0x00008911 }, /* GL_ACTIVE_STENCIL_FACE_EXT */ + { 47345, 0x00008912 }, /* GL_MIRROR_CLAMP_TO_BORDER_EXT */ + { 47375, 0x00008914 }, /* GL_SAMPLES_PASSED */ + { 47393, 0x00008916 }, /* GL_GEOMETRY_VERTICES_OUT */ + { 47418, 0x00008917 }, /* GL_GEOMETRY_INPUT_TYPE */ + { 47441, 0x00008918 }, /* GL_GEOMETRY_OUTPUT_TYPE */ + { 47465, 0x00008919 }, /* GL_SAMPLER_BINDING */ + { 47484, 0x0000891A }, /* GL_CLAMP_VERTEX_COLOR */ + { 47506, 0x0000891B }, /* GL_CLAMP_FRAGMENT_COLOR */ + { 47530, 0x0000891C }, /* GL_CLAMP_READ_COLOR */ + { 47550, 0x0000891D }, /* GL_FIXED_ONLY */ + { 47564, 0x0000891E }, /* GL_TESS_CONTROL_PROGRAM_NV */ + { 47591, 0x0000891F }, /* GL_TESS_EVALUATION_PROGRAM_NV */ + { 47621, 0x00008920 }, /* GL_FRAGMENT_SHADER_ATI */ + { 47644, 0x00008921 }, /* GL_REG_0_ATI */ + { 47657, 0x00008922 }, /* GL_REG_1_ATI */ + { 47670, 0x00008923 }, /* GL_REG_2_ATI */ + { 47683, 0x00008924 }, /* GL_REG_3_ATI */ + { 47696, 0x00008925 }, /* GL_REG_4_ATI */ + { 47709, 0x00008926 }, /* GL_REG_5_ATI */ + { 47722, 0x00008927 }, /* GL_REG_6_ATI */ + { 47735, 0x00008928 }, /* GL_REG_7_ATI */ + { 47748, 0x00008929 }, /* GL_REG_8_ATI */ + { 47761, 0x0000892A }, /* GL_REG_9_ATI */ + { 47774, 0x0000892B }, /* GL_REG_10_ATI */ + { 47788, 0x0000892C }, /* GL_REG_11_ATI */ + { 47802, 0x0000892D }, /* GL_REG_12_ATI */ + { 47816, 0x0000892E }, /* GL_REG_13_ATI */ + { 47830, 0x0000892F }, /* GL_REG_14_ATI */ + { 47844, 0x00008930 }, /* GL_REG_15_ATI */ + { 47858, 0x00008931 }, /* GL_REG_16_ATI */ + { 47872, 0x00008932 }, /* GL_REG_17_ATI */ + { 47886, 0x00008933 }, /* GL_REG_18_ATI */ + { 47900, 0x00008934 }, /* GL_REG_19_ATI */ + { 47914, 0x00008935 }, /* GL_REG_20_ATI */ + { 47928, 0x00008936 }, /* GL_REG_21_ATI */ + { 47942, 0x00008937 }, /* GL_REG_22_ATI */ + { 47956, 0x00008938 }, /* GL_REG_23_ATI */ + { 47970, 0x00008939 }, /* GL_REG_24_ATI */ + { 47984, 0x0000893A }, /* GL_REG_25_ATI */ + { 47998, 0x0000893B }, /* GL_REG_26_ATI */ + { 48012, 0x0000893C }, /* GL_REG_27_ATI */ + { 48026, 0x0000893D }, /* GL_REG_28_ATI */ + { 48040, 0x0000893E }, /* GL_REG_29_ATI */ + { 48054, 0x0000893F }, /* GL_REG_30_ATI */ + { 48068, 0x00008940 }, /* GL_REG_31_ATI */ + { 48082, 0x00008941 }, /* GL_CON_0_ATI */ + { 48095, 0x00008942 }, /* GL_CON_1_ATI */ + { 48108, 0x00008943 }, /* GL_CON_2_ATI */ + { 48121, 0x00008944 }, /* GL_CON_3_ATI */ + { 48134, 0x00008945 }, /* GL_CON_4_ATI */ + { 48147, 0x00008946 }, /* GL_CON_5_ATI */ + { 48160, 0x00008947 }, /* GL_CON_6_ATI */ + { 48173, 0x00008948 }, /* GL_CON_7_ATI */ + { 48186, 0x00008949 }, /* GL_CON_8_ATI */ + { 48199, 0x0000894A }, /* GL_CON_9_ATI */ + { 48212, 0x0000894B }, /* GL_CON_10_ATI */ + { 48226, 0x0000894C }, /* GL_CON_11_ATI */ + { 48240, 0x0000894D }, /* GL_CON_12_ATI */ + { 48254, 0x0000894E }, /* GL_CON_13_ATI */ + { 48268, 0x0000894F }, /* GL_CON_14_ATI */ + { 48282, 0x00008950 }, /* GL_CON_15_ATI */ + { 48296, 0x00008951 }, /* GL_CON_16_ATI */ + { 48310, 0x00008952 }, /* GL_CON_17_ATI */ + { 48324, 0x00008953 }, /* GL_CON_18_ATI */ + { 48338, 0x00008954 }, /* GL_CON_19_ATI */ + { 48352, 0x00008955 }, /* GL_CON_20_ATI */ + { 48366, 0x00008956 }, /* GL_CON_21_ATI */ + { 48380, 0x00008957 }, /* GL_CON_22_ATI */ + { 48394, 0x00008958 }, /* GL_CON_23_ATI */ + { 48408, 0x00008959 }, /* GL_CON_24_ATI */ + { 48422, 0x0000895A }, /* GL_CON_25_ATI */ + { 48436, 0x0000895B }, /* GL_CON_26_ATI */ + { 48450, 0x0000895C }, /* GL_CON_27_ATI */ + { 48464, 0x0000895D }, /* GL_CON_28_ATI */ + { 48478, 0x0000895E }, /* GL_CON_29_ATI */ + { 48492, 0x0000895F }, /* GL_CON_30_ATI */ + { 48506, 0x00008960 }, /* GL_CON_31_ATI */ + { 48520, 0x00008961 }, /* GL_MOV_ATI */ + { 48531, 0x00008963 }, /* GL_ADD_ATI */ + { 48542, 0x00008964 }, /* GL_MUL_ATI */ + { 48553, 0x00008965 }, /* GL_SUB_ATI */ + { 48564, 0x00008966 }, /* GL_DOT3_ATI */ + { 48576, 0x00008967 }, /* GL_DOT4_ATI */ + { 48588, 0x00008968 }, /* GL_MAD_ATI */ + { 48599, 0x00008969 }, /* GL_LERP_ATI */ + { 48611, 0x0000896A }, /* GL_CND_ATI */ + { 48622, 0x0000896B }, /* GL_CND0_ATI */ + { 48634, 0x0000896C }, /* GL_DOT2_ADD_ATI */ + { 48650, 0x0000896D }, /* GL_SECONDARY_INTERPOLATOR_ATI */ + { 48680, 0x0000896E }, /* GL_NUM_FRAGMENT_REGISTERS_ATI */ + { 48710, 0x0000896F }, /* GL_NUM_FRAGMENT_CONSTANTS_ATI */ + { 48740, 0x00008970 }, /* GL_NUM_PASSES_ATI */ + { 48758, 0x00008971 }, /* GL_NUM_INSTRUCTIONS_PER_PASS_ATI */ + { 48791, 0x00008972 }, /* GL_NUM_INSTRUCTIONS_TOTAL_ATI */ + { 48821, 0x00008973 }, /* GL_NUM_INPUT_INTERPOLATOR_COMPONENTS_ATI */ + { 48862, 0x00008974 }, /* GL_NUM_LOOPBACK_COMPONENTS_ATI */ + { 48893, 0x00008975 }, /* GL_COLOR_ALPHA_PAIRING_ATI */ + { 48920, 0x00008976 }, /* GL_SWIZZLE_STR_ATI */ + { 48939, 0x00008977 }, /* GL_SWIZZLE_STQ_ATI */ + { 48958, 0x00008978 }, /* GL_SWIZZLE_STR_DR_ATI */ + { 48980, 0x00008979 }, /* GL_SWIZZLE_STQ_DQ_ATI */ + { 49002, 0x0000897A }, /* GL_SWIZZLE_STRQ_ATI */ + { 49022, 0x0000897B }, /* GL_SWIZZLE_STRQ_DQ_ATI */ + { 49045, 0x00008980 }, /* GL_INTERLACE_OML */ + { 49062, 0x00008981 }, /* GL_INTERLACE_READ_OML */ + { 49084, 0x00008982 }, /* GL_FORMAT_SUBSAMPLE_24_24_OML */ + { 49114, 0x00008983 }, /* GL_FORMAT_SUBSAMPLE_244_244_OML */ + { 49146, 0x00008984 }, /* GL_PACK_RESAMPLE_OML */ + { 49167, 0x00008985 }, /* GL_UNPACK_RESAMPLE_OML */ + { 49190, 0x00008986 }, /* GL_RESAMPLE_REPLICATE_OML */ + { 49216, 0x00008987 }, /* GL_RESAMPLE_ZERO_FILL_OML */ + { 49242, 0x00008988 }, /* GL_RESAMPLE_AVERAGE_OML */ + { 49266, 0x00008989 }, /* GL_RESAMPLE_DECIMATE_OML */ + { 49291, 0x0000898A }, /* GL_POINT_SIZE_ARRAY_TYPE_OES */ + { 49320, 0x0000898B }, /* GL_POINT_SIZE_ARRAY_STRIDE_OES */ + { 49351, 0x0000898C }, /* GL_POINT_SIZE_ARRAY_POINTER_OES */ + { 49383, 0x0000898D }, /* GL_MODELVIEW_MATRIX_FLOAT_AS_INT_BITS_OES */ + { 49425, 0x0000898E }, /* GL_PROJECTION_MATRIX_FLOAT_AS_INT_BITS_OES */ + { 49468, 0x0000898F }, /* GL_TEXTURE_MATRIX_FLOAT_AS_INT_BITS_OES */ + { 49508, 0x00008A00 }, /* GL_VERTEX_ATTRIB_MAP1_APPLE */ + { 49536, 0x00008A01 }, /* GL_VERTEX_ATTRIB_MAP2_APPLE */ + { 49564, 0x00008A02 }, /* GL_VERTEX_ATTRIB_MAP1_SIZE_APPLE */ + { 49597, 0x00008A03 }, /* GL_VERTEX_ATTRIB_MAP1_COEFF_APPLE */ + { 49631, 0x00008A04 }, /* GL_VERTEX_ATTRIB_MAP1_ORDER_APPLE */ + { 49665, 0x00008A05 }, /* GL_VERTEX_ATTRIB_MAP1_DOMAIN_APPLE */ + { 49700, 0x00008A06 }, /* GL_VERTEX_ATTRIB_MAP2_SIZE_APPLE */ + { 49733, 0x00008A07 }, /* GL_VERTEX_ATTRIB_MAP2_COEFF_APPLE */ + { 49767, 0x00008A08 }, /* GL_VERTEX_ATTRIB_MAP2_ORDER_APPLE */ + { 49801, 0x00008A09 }, /* GL_VERTEX_ATTRIB_MAP2_DOMAIN_APPLE */ + { 49836, 0x00008A0A }, /* GL_DRAW_PIXELS_APPLE */ + { 49857, 0x00008A0B }, /* GL_FENCE_APPLE */ + { 49872, 0x00008A0C }, /* GL_ELEMENT_ARRAY_APPLE */ + { 49895, 0x00008A0D }, /* GL_ELEMENT_ARRAY_TYPE_APPLE */ + { 49923, 0x00008A0E }, /* GL_ELEMENT_ARRAY_POINTER_APPLE */ + { 49954, 0x00008A0F }, /* GL_COLOR_FLOAT_APPLE */ + { 49975, 0x00008A11 }, /* GL_UNIFORM_BUFFER */ + { 49993, 0x00008A12 }, /* GL_BUFFER_SERIALIZED_MODIFY_APPLE */ + { 50027, 0x00008A13 }, /* GL_BUFFER_FLUSHING_UNMAP_APPLE */ + { 50058, 0x00008A14 }, /* GL_AUX_DEPTH_STENCIL_APPLE */ + { 50085, 0x00008A15 }, /* GL_PACK_ROW_BYTES_APPLE */ + { 50109, 0x00008A16 }, /* GL_UNPACK_ROW_BYTES_APPLE */ + { 50135, 0x00008A19 }, /* GL_RELEASED_APPLE */ + { 50153, 0x00008A1A }, /* GL_VOLATILE_APPLE */ + { 50171, 0x00008A1B }, /* GL_RETAINED_APPLE */ + { 50189, 0x00008A1C }, /* GL_UNDEFINED_APPLE */ + { 50208, 0x00008A1D }, /* GL_PURGEABLE_APPLE */ + { 50227, 0x00008A1F }, /* GL_RGB_422_APPLE */ + { 50244, 0x00008A28 }, /* GL_UNIFORM_BUFFER_BINDING */ + { 50270, 0x00008A29 }, /* GL_UNIFORM_BUFFER_START */ + { 50294, 0x00008A2A }, /* GL_UNIFORM_BUFFER_SIZE */ + { 50317, 0x00008A2B }, /* GL_MAX_VERTEX_UNIFORM_BLOCKS */ + { 50346, 0x00008A2C }, /* GL_MAX_GEOMETRY_UNIFORM_BLOCKS */ + { 50377, 0x00008A2D }, /* GL_MAX_FRAGMENT_UNIFORM_BLOCKS */ + { 50408, 0x00008A2E }, /* GL_MAX_COMBINED_UNIFORM_BLOCKS */ + { 50439, 0x00008A2F }, /* GL_MAX_UNIFORM_BUFFER_BINDINGS */ + { 50470, 0x00008A30 }, /* GL_MAX_UNIFORM_BLOCK_SIZE */ + { 50496, 0x00008A31 }, /* GL_MAX_COMBINED_VERTEX_UNIFORM_COMPONENTS */ + { 50538, 0x00008A32 }, /* GL_MAX_COMBINED_GEOMETRY_UNIFORM_COMPONENTS */ + { 50582, 0x00008A33 }, /* GL_MAX_COMBINED_FRAGMENT_UNIFORM_COMPONENTS */ + { 50626, 0x00008A34 }, /* GL_UNIFORM_BUFFER_OFFSET_ALIGNMENT */ + { 50661, 0x00008A35 }, /* GL_ACTIVE_UNIFORM_BLOCK_MAX_NAME_LENGTH */ + { 50701, 0x00008A36 }, /* GL_ACTIVE_UNIFORM_BLOCKS */ + { 50726, 0x00008A37 }, /* GL_UNIFORM_TYPE */ + { 50742, 0x00008A38 }, /* GL_UNIFORM_SIZE */ + { 50758, 0x00008A39 }, /* GL_UNIFORM_NAME_LENGTH */ + { 50781, 0x00008A3A }, /* GL_UNIFORM_BLOCK_INDEX */ + { 50804, 0x00008A3B }, /* GL_UNIFORM_OFFSET */ + { 50822, 0x00008A3C }, /* GL_UNIFORM_ARRAY_STRIDE */ + { 50846, 0x00008A3D }, /* GL_UNIFORM_MATRIX_STRIDE */ + { 50871, 0x00008A3E }, /* GL_UNIFORM_IS_ROW_MAJOR */ + { 50895, 0x00008A3F }, /* GL_UNIFORM_BLOCK_BINDING */ + { 50920, 0x00008A40 }, /* GL_UNIFORM_BLOCK_DATA_SIZE */ + { 50947, 0x00008A41 }, /* GL_UNIFORM_BLOCK_NAME_LENGTH */ + { 50976, 0x00008A42 }, /* GL_UNIFORM_BLOCK_ACTIVE_UNIFORMS */ + { 51009, 0x00008A43 }, /* GL_UNIFORM_BLOCK_ACTIVE_UNIFORM_INDICES */ + { 51049, 0x00008A44 }, /* GL_UNIFORM_BLOCK_REFERENCED_BY_VERTEX_SHADER */ + { 51094, 0x00008A45 }, /* GL_UNIFORM_BLOCK_REFERENCED_BY_GEOMETRY_SHADER */ + { 51141, 0x00008A46 }, /* GL_UNIFORM_BLOCK_REFERENCED_BY_FRAGMENT_SHADER */ + { 51188, 0x00008A48 }, /* GL_TEXTURE_SRGB_DECODE_EXT */ + { 51215, 0x00008A49 }, /* GL_DECODE_EXT */ + { 51229, 0x00008A4A }, /* GL_SKIP_DECODE_EXT */ + { 51248, 0x00008A4F }, /* GL_PROGRAM_PIPELINE_OBJECT_EXT */ + { 51279, 0x00008A51 }, /* GL_RGB_RAW_422_APPLE */ + { 51300, 0x00008A52 }, /* GL_FRAGMENT_SHADER_DISCARDS_SAMPLES_EXT */ + { 51340, 0x00008A53 }, /* GL_SYNC_OBJECT_APPLE */ + { 51361, 0x00008A54 }, /* GL_COMPRESSED_SRGB_PVRTC_2BPPV1_EXT */ + { 51397, 0x00008A55 }, /* GL_COMPRESSED_SRGB_PVRTC_4BPPV1_EXT */ + { 51433, 0x00008A56 }, /* GL_COMPRESSED_SRGB_ALPHA_PVRTC_2BPPV1_EXT */ + { 51475, 0x00008A57 }, /* GL_COMPRESSED_SRGB_ALPHA_PVRTC_4BPPV1_EXT */ + { 51517, 0x00008B30 }, /* GL_FRAGMENT_SHADER */ + { 51536, 0x00008B31 }, /* GL_VERTEX_SHADER */ + { 51553, 0x00008B40 }, /* GL_PROGRAM_OBJECT_ARB */ + { 51575, 0x00008B48 }, /* GL_SHADER_OBJECT_ARB */ + { 51596, 0x00008B49 }, /* GL_MAX_FRAGMENT_UNIFORM_COMPONENTS */ + { 51631, 0x00008B4A }, /* GL_MAX_VERTEX_UNIFORM_COMPONENTS */ + { 51664, 0x00008B4B }, /* GL_MAX_VARYING_COMPONENTS */ + { 51690, 0x00008B4C }, /* GL_MAX_VERTEX_TEXTURE_IMAGE_UNITS */ + { 51724, 0x00008B4D }, /* GL_MAX_COMBINED_TEXTURE_IMAGE_UNITS */ + { 51760, 0x00008B4E }, /* GL_OBJECT_TYPE_ARB */ + { 51779, 0x00008B4F }, /* GL_SHADER_TYPE */ + { 51794, 0x00008B50 }, /* GL_FLOAT_VEC2 */ + { 51808, 0x00008B51 }, /* GL_FLOAT_VEC3 */ + { 51822, 0x00008B52 }, /* GL_FLOAT_VEC4 */ + { 51836, 0x00008B53 }, /* GL_INT_VEC2 */ + { 51848, 0x00008B54 }, /* GL_INT_VEC3 */ + { 51860, 0x00008B55 }, /* GL_INT_VEC4 */ + { 51872, 0x00008B56 }, /* GL_BOOL */ + { 51880, 0x00008B57 }, /* GL_BOOL_VEC2 */ + { 51893, 0x00008B58 }, /* GL_BOOL_VEC3 */ + { 51906, 0x00008B59 }, /* GL_BOOL_VEC4 */ + { 51919, 0x00008B5A }, /* GL_FLOAT_MAT2 */ + { 51933, 0x00008B5B }, /* GL_FLOAT_MAT3 */ + { 51947, 0x00008B5C }, /* GL_FLOAT_MAT4 */ + { 51961, 0x00008B5D }, /* GL_SAMPLER_1D */ + { 51975, 0x00008B5E }, /* GL_SAMPLER_2D */ + { 51989, 0x00008B5F }, /* GL_SAMPLER_3D */ + { 52003, 0x00008B60 }, /* GL_SAMPLER_CUBE */ + { 52019, 0x00008B61 }, /* GL_SAMPLER_1D_SHADOW */ + { 52040, 0x00008B62 }, /* GL_SAMPLER_2D_SHADOW */ + { 52061, 0x00008B63 }, /* GL_SAMPLER_2D_RECT */ + { 52080, 0x00008B64 }, /* GL_SAMPLER_2D_RECT_SHADOW */ + { 52106, 0x00008B65 }, /* GL_FLOAT_MAT2x3 */ + { 52122, 0x00008B66 }, /* GL_FLOAT_MAT2x4 */ + { 52138, 0x00008B67 }, /* GL_FLOAT_MAT3x2 */ + { 52154, 0x00008B68 }, /* GL_FLOAT_MAT3x4 */ + { 52170, 0x00008B69 }, /* GL_FLOAT_MAT4x2 */ + { 52186, 0x00008B6A }, /* GL_FLOAT_MAT4x3 */ + { 52202, 0x00008B80 }, /* GL_DELETE_STATUS */ + { 52219, 0x00008B81 }, /* GL_COMPILE_STATUS */ + { 52237, 0x00008B82 }, /* GL_LINK_STATUS */ + { 52252, 0x00008B83 }, /* GL_VALIDATE_STATUS */ + { 52271, 0x00008B84 }, /* GL_INFO_LOG_LENGTH */ + { 52290, 0x00008B85 }, /* GL_ATTACHED_SHADERS */ + { 52310, 0x00008B86 }, /* GL_ACTIVE_UNIFORMS */ + { 52329, 0x00008B87 }, /* GL_ACTIVE_UNIFORM_MAX_LENGTH */ + { 52358, 0x00008B88 }, /* GL_SHADER_SOURCE_LENGTH */ + { 52382, 0x00008B89 }, /* GL_ACTIVE_ATTRIBUTES */ + { 52403, 0x00008B8A }, /* GL_ACTIVE_ATTRIBUTE_MAX_LENGTH */ + { 52434, 0x00008B8B }, /* GL_FRAGMENT_SHADER_DERIVATIVE_HINT */ + { 52469, 0x00008B8C }, /* GL_SHADING_LANGUAGE_VERSION */ + { 52497, 0x00008B8D }, /* GL_CURRENT_PROGRAM */ + { 52516, 0x00008B90 }, /* GL_PALETTE4_RGB8_OES */ + { 52537, 0x00008B91 }, /* GL_PALETTE4_RGBA8_OES */ + { 52559, 0x00008B92 }, /* GL_PALETTE4_R5_G6_B5_OES */ + { 52584, 0x00008B93 }, /* GL_PALETTE4_RGBA4_OES */ + { 52606, 0x00008B94 }, /* GL_PALETTE4_RGB5_A1_OES */ + { 52630, 0x00008B95 }, /* GL_PALETTE8_RGB8_OES */ + { 52651, 0x00008B96 }, /* GL_PALETTE8_RGBA8_OES */ + { 52673, 0x00008B97 }, /* GL_PALETTE8_R5_G6_B5_OES */ + { 52698, 0x00008B98 }, /* GL_PALETTE8_RGBA4_OES */ + { 52720, 0x00008B99 }, /* GL_PALETTE8_RGB5_A1_OES */ + { 52744, 0x00008B9A }, /* GL_IMPLEMENTATION_COLOR_READ_TYPE */ + { 52778, 0x00008B9B }, /* GL_IMPLEMENTATION_COLOR_READ_FORMAT */ + { 52814, 0x00008B9C }, /* GL_POINT_SIZE_ARRAY_OES */ + { 52838, 0x00008B9D }, /* GL_TEXTURE_CROP_RECT_OES */ + { 52863, 0x00008B9E }, /* GL_MATRIX_INDEX_ARRAY_BUFFER_BINDING_OES */ + { 52904, 0x00008B9F }, /* GL_POINT_SIZE_ARRAY_BUFFER_BINDING_OES */ + { 52943, 0x00008BC0 }, /* GL_COUNTER_TYPE_AMD */ + { 52963, 0x00008BC1 }, /* GL_COUNTER_RANGE_AMD */ + { 52984, 0x00008BC2 }, /* GL_UNSIGNED_INT64_AMD */ + { 53006, 0x00008BC3 }, /* GL_PERCENTAGE_AMD */ + { 53024, 0x00008BC4 }, /* GL_PERFMON_RESULT_AVAILABLE_AMD */ + { 53056, 0x00008BC5 }, /* GL_PERFMON_RESULT_SIZE_AMD */ + { 53083, 0x00008BC6 }, /* GL_PERFMON_RESULT_AMD */ + { 53105, 0x00008BD2 }, /* GL_TEXTURE_WIDTH_QCOM */ + { 53127, 0x00008BD3 }, /* GL_TEXTURE_HEIGHT_QCOM */ + { 53150, 0x00008BD4 }, /* GL_TEXTURE_DEPTH_QCOM */ + { 53172, 0x00008BD5 }, /* GL_TEXTURE_INTERNAL_FORMAT_QCOM */ + { 53204, 0x00008BD6 }, /* GL_TEXTURE_FORMAT_QCOM */ + { 53227, 0x00008BD7 }, /* GL_TEXTURE_TYPE_QCOM */ + { 53248, 0x00008BD8 }, /* GL_TEXTURE_IMAGE_VALID_QCOM */ + { 53276, 0x00008BD9 }, /* GL_TEXTURE_NUM_LEVELS_QCOM */ + { 53303, 0x00008BDA }, /* GL_TEXTURE_TARGET_QCOM */ + { 53326, 0x00008BDB }, /* GL_TEXTURE_OBJECT_VALID_QCOM */ + { 53355, 0x00008BDC }, /* GL_STATE_RESTORE */ + { 53372, 0x00008BE7 }, /* GL_SAMPLER_EXTERNAL_2D_Y2Y_EXT */ + { 53403, 0x00008BFA }, /* GL_TEXTURE_PROTECTED_EXT */ + { 53428, 0x00008C00 }, /* GL_COMPRESSED_RGB_PVRTC_4BPPV1_IMG */ + { 53463, 0x00008C01 }, /* GL_COMPRESSED_RGB_PVRTC_2BPPV1_IMG */ + { 53498, 0x00008C02 }, /* GL_COMPRESSED_RGBA_PVRTC_4BPPV1_IMG */ + { 53534, 0x00008C03 }, /* GL_COMPRESSED_RGBA_PVRTC_2BPPV1_IMG */ + { 53570, 0x00008C04 }, /* GL_MODULATE_COLOR_IMG */ + { 53592, 0x00008C05 }, /* GL_RECIP_ADD_SIGNED_ALPHA_IMG */ + { 53622, 0x00008C06 }, /* GL_TEXTURE_ALPHA_MODULATE_IMG */ + { 53652, 0x00008C07 }, /* GL_FACTOR_ALPHA_MODULATE_IMG */ + { 53681, 0x00008C08 }, /* GL_FRAGMENT_ALPHA_MODULATE_IMG */ + { 53712, 0x00008C09 }, /* GL_ADD_BLEND_IMG */ + { 53729, 0x00008C0A }, /* GL_SGX_BINARY_IMG */ + { 53747, 0x00008C10 }, /* GL_TEXTURE_RED_TYPE */ + { 53767, 0x00008C11 }, /* GL_TEXTURE_GREEN_TYPE */ + { 53789, 0x00008C12 }, /* GL_TEXTURE_BLUE_TYPE */ + { 53810, 0x00008C13 }, /* GL_TEXTURE_ALPHA_TYPE */ + { 53832, 0x00008C14 }, /* GL_TEXTURE_LUMINANCE_TYPE */ + { 53858, 0x00008C15 }, /* GL_TEXTURE_INTENSITY_TYPE */ + { 53884, 0x00008C16 }, /* GL_TEXTURE_DEPTH_TYPE */ + { 53906, 0x00008C17 }, /* GL_UNSIGNED_NORMALIZED */ + { 53929, 0x00008C18 }, /* GL_TEXTURE_1D_ARRAY */ + { 53949, 0x00008C19 }, /* GL_PROXY_TEXTURE_1D_ARRAY */ + { 53975, 0x00008C1A }, /* GL_TEXTURE_2D_ARRAY */ + { 53995, 0x00008C1B }, /* GL_PROXY_TEXTURE_2D_ARRAY */ + { 54021, 0x00008C1C }, /* GL_TEXTURE_BINDING_1D_ARRAY */ + { 54049, 0x00008C1D }, /* GL_TEXTURE_BINDING_2D_ARRAY */ + { 54077, 0x00008C26 }, /* GL_GEOMETRY_PROGRAM_NV */ + { 54100, 0x00008C27 }, /* GL_MAX_PROGRAM_OUTPUT_VERTICES_NV */ + { 54134, 0x00008C28 }, /* GL_MAX_PROGRAM_TOTAL_OUTPUT_COMPONENTS_NV */ + { 54176, 0x00008C29 }, /* GL_MAX_GEOMETRY_TEXTURE_IMAGE_UNITS */ + { 54212, 0x00008C2A }, /* GL_TEXTURE_BUFFER_BINDING */ + { 54238, 0x00008C2B }, /* GL_MAX_TEXTURE_BUFFER_SIZE */ + { 54265, 0x00008C2C }, /* GL_TEXTURE_BINDING_BUFFER */ + { 54291, 0x00008C2D }, /* GL_TEXTURE_BUFFER_DATA_STORE_BINDING */ + { 54328, 0x00008C2E }, /* GL_TEXTURE_BUFFER_FORMAT_ARB */ + { 54357, 0x00008C2F }, /* GL_ANY_SAMPLES_PASSED */ + { 54379, 0x00008C36 }, /* GL_SAMPLE_SHADING */ + { 54397, 0x00008C37 }, /* GL_MIN_SAMPLE_SHADING_VALUE */ + { 54425, 0x00008C3A }, /* GL_R11F_G11F_B10F */ + { 54443, 0x00008C3B }, /* GL_UNSIGNED_INT_10F_11F_11F_REV */ + { 54475, 0x00008C3C }, /* GL_RGBA_SIGNED_COMPONENTS_EXT */ + { 54505, 0x00008C3D }, /* GL_RGB9_E5 */ + { 54516, 0x00008C3E }, /* GL_UNSIGNED_INT_5_9_9_9_REV */ + { 54544, 0x00008C3F }, /* GL_TEXTURE_SHARED_SIZE */ + { 54567, 0x00008C40 }, /* GL_SRGB */ + { 54575, 0x00008C41 }, /* GL_SRGB8 */ + { 54584, 0x00008C42 }, /* GL_SRGB_ALPHA */ + { 54598, 0x00008C43 }, /* GL_SRGB8_ALPHA8 */ + { 54614, 0x00008C44 }, /* GL_SLUMINANCE_ALPHA */ + { 54634, 0x00008C45 }, /* GL_SLUMINANCE8_ALPHA8 */ + { 54656, 0x00008C46 }, /* GL_SLUMINANCE */ + { 54670, 0x00008C47 }, /* GL_SLUMINANCE8 */ + { 54685, 0x00008C48 }, /* GL_COMPRESSED_SRGB */ + { 54704, 0x00008C49 }, /* GL_COMPRESSED_SRGB_ALPHA */ + { 54729, 0x00008C4A }, /* GL_COMPRESSED_SLUMINANCE */ + { 54754, 0x00008C4B }, /* GL_COMPRESSED_SLUMINANCE_ALPHA */ + { 54785, 0x00008C4C }, /* GL_COMPRESSED_SRGB_S3TC_DXT1_EXT */ + { 54818, 0x00008C4D }, /* GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT1_EXT */ + { 54857, 0x00008C4E }, /* GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT3_EXT */ + { 54896, 0x00008C4F }, /* GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT5_EXT */ + { 54935, 0x00008C70 }, /* GL_COMPRESSED_LUMINANCE_LATC1_EXT */ + { 54969, 0x00008C71 }, /* GL_COMPRESSED_SIGNED_LUMINANCE_LATC1_EXT */ + { 55010, 0x00008C72 }, /* GL_COMPRESSED_LUMINANCE_ALPHA_LATC2_EXT */ + { 55050, 0x00008C73 }, /* GL_COMPRESSED_SIGNED_LUMINANCE_ALPHA_LATC2_EXT */ + { 55097, 0x00008C74 }, /* GL_TESS_CONTROL_PROGRAM_PARAMETER_BUFFER_NV */ + { 55141, 0x00008C75 }, /* GL_TESS_EVALUATION_PROGRAM_PARAMETER_BUFFER_NV */ + { 55188, 0x00008C76 }, /* GL_TRANSFORM_FEEDBACK_VARYING_MAX_LENGTH */ + { 55229, 0x00008C77 }, /* GL_BACK_PRIMARY_COLOR_NV */ + { 55254, 0x00008C78 }, /* GL_BACK_SECONDARY_COLOR_NV */ + { 55281, 0x00008C79 }, /* GL_TEXTURE_COORD_NV */ + { 55301, 0x00008C7A }, /* GL_CLIP_DISTANCE_NV */ + { 55321, 0x00008C7B }, /* GL_VERTEX_ID_NV */ + { 55337, 0x00008C7C }, /* GL_PRIMITIVE_ID_NV */ + { 55356, 0x00008C7D }, /* GL_GENERIC_ATTRIB_NV */ + { 55377, 0x00008C7E }, /* GL_TRANSFORM_FEEDBACK_ATTRIBS_NV */ + { 55410, 0x00008C7F }, /* GL_TRANSFORM_FEEDBACK_BUFFER_MODE */ + { 55444, 0x00008C80 }, /* GL_MAX_TRANSFORM_FEEDBACK_SEPARATE_COMPONENTS */ + { 55490, 0x00008C81 }, /* GL_ACTIVE_VARYINGS_NV */ + { 55512, 0x00008C82 }, /* GL_ACTIVE_VARYING_MAX_LENGTH_NV */ + { 55544, 0x00008C83 }, /* GL_TRANSFORM_FEEDBACK_VARYINGS */ + { 55575, 0x00008C84 }, /* GL_TRANSFORM_FEEDBACK_BUFFER_START */ + { 55610, 0x00008C85 }, /* GL_TRANSFORM_FEEDBACK_BUFFER_SIZE */ + { 55644, 0x00008C86 }, /* GL_TRANSFORM_FEEDBACK_RECORD_NV */ + { 55676, 0x00008C87 }, /* GL_PRIMITIVES_GENERATED */ + { 55700, 0x00008C88 }, /* GL_TRANSFORM_FEEDBACK_PRIMITIVES_WRITTEN */ + { 55741, 0x00008C89 }, /* GL_RASTERIZER_DISCARD */ + { 55763, 0x00008C8A }, /* GL_MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS */ + { 55812, 0x00008C8B }, /* GL_MAX_TRANSFORM_FEEDBACK_SEPARATE_ATTRIBS */ + { 55855, 0x00008C8C }, /* GL_INTERLEAVED_ATTRIBS */ + { 55878, 0x00008C8D }, /* GL_SEPARATE_ATTRIBS */ + { 55898, 0x00008C8E }, /* GL_TRANSFORM_FEEDBACK_BUFFER */ + { 55927, 0x00008C8F }, /* GL_TRANSFORM_FEEDBACK_BUFFER_BINDING */ + { 55964, 0x00008C92 }, /* GL_ATC_RGB_AMD */ + { 55979, 0x00008C93 }, /* GL_ATC_RGBA_EXPLICIT_ALPHA_AMD */ + { 56010, 0x00008CA0 }, /* GL_POINT_SPRITE_COORD_ORIGIN */ + { 56039, 0x00008CA1 }, /* GL_LOWER_LEFT */ + { 56053, 0x00008CA2 }, /* GL_UPPER_LEFT */ + { 56067, 0x00008CA3 }, /* GL_STENCIL_BACK_REF */ + { 56087, 0x00008CA4 }, /* GL_STENCIL_BACK_VALUE_MASK */ + { 56114, 0x00008CA5 }, /* GL_STENCIL_BACK_WRITEMASK */ + { 56140, 0x00008CA6 }, /* GL_FRAMEBUFFER_BINDING */ + { 56163, 0x00008CA7 }, /* GL_RENDERBUFFER_BINDING */ + { 56187, 0x00008CA8 }, /* GL_READ_FRAMEBUFFER */ + { 56207, 0x00008CA9 }, /* GL_DRAW_FRAMEBUFFER */ + { 56227, 0x00008CAA }, /* GL_READ_FRAMEBUFFER_BINDING */ + { 56255, 0x00008CAB }, /* GL_RENDERBUFFER_SAMPLES */ + { 56279, 0x00008CAC }, /* GL_DEPTH_COMPONENT32F */ + { 56301, 0x00008CAD }, /* GL_DEPTH32F_STENCIL8 */ + { 56322, 0x00008CD0 }, /* GL_FRAMEBUFFER_ATTACHMENT_OBJECT_TYPE */ + { 56360, 0x00008CD1 }, /* GL_FRAMEBUFFER_ATTACHMENT_OBJECT_NAME */ + { 56398, 0x00008CD2 }, /* GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_LEVEL */ + { 56438, 0x00008CD3 }, /* GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_CUBE_MAP_FACE */ + { 56486, 0x00008CD4 }, /* GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_LAYER */ + { 56526, 0x00008CD5 }, /* GL_FRAMEBUFFER_COMPLETE */ + { 56550, 0x00008CD6 }, /* GL_FRAMEBUFFER_INCOMPLETE_ATTACHMENT */ + { 56587, 0x00008CD7 }, /* GL_FRAMEBUFFER_INCOMPLETE_MISSING_ATTACHMENT */ + { 56632, 0x00008CD9 }, /* GL_FRAMEBUFFER_INCOMPLETE_DIMENSIONS */ + { 56669, 0x00008CDA }, /* GL_FRAMEBUFFER_INCOMPLETE_FORMATS_EXT */ + { 56707, 0x00008CDB }, /* GL_FRAMEBUFFER_INCOMPLETE_DRAW_BUFFER */ + { 56745, 0x00008CDC }, /* GL_FRAMEBUFFER_INCOMPLETE_READ_BUFFER */ + { 56783, 0x00008CDD }, /* GL_FRAMEBUFFER_UNSUPPORTED */ + { 56810, 0x00008CDF }, /* GL_MAX_COLOR_ATTACHMENTS */ + { 56835, 0x00008CE0 }, /* GL_COLOR_ATTACHMENT0 */ + { 56856, 0x00008CE1 }, /* GL_COLOR_ATTACHMENT1 */ + { 56877, 0x00008CE2 }, /* GL_COLOR_ATTACHMENT2 */ + { 56898, 0x00008CE3 }, /* GL_COLOR_ATTACHMENT3 */ + { 56919, 0x00008CE4 }, /* GL_COLOR_ATTACHMENT4 */ + { 56940, 0x00008CE5 }, /* GL_COLOR_ATTACHMENT5 */ + { 56961, 0x00008CE6 }, /* GL_COLOR_ATTACHMENT6 */ + { 56982, 0x00008CE7 }, /* GL_COLOR_ATTACHMENT7 */ + { 57003, 0x00008CE8 }, /* GL_COLOR_ATTACHMENT8 */ + { 57024, 0x00008CE9 }, /* GL_COLOR_ATTACHMENT9 */ + { 57045, 0x00008CEA }, /* GL_COLOR_ATTACHMENT10 */ + { 57067, 0x00008CEB }, /* GL_COLOR_ATTACHMENT11 */ + { 57089, 0x00008CEC }, /* GL_COLOR_ATTACHMENT12 */ + { 57111, 0x00008CED }, /* GL_COLOR_ATTACHMENT13 */ + { 57133, 0x00008CEE }, /* GL_COLOR_ATTACHMENT14 */ + { 57155, 0x00008CEF }, /* GL_COLOR_ATTACHMENT15 */ + { 57177, 0x00008CF0 }, /* GL_COLOR_ATTACHMENT16 */ + { 57199, 0x00008CF1 }, /* GL_COLOR_ATTACHMENT17 */ + { 57221, 0x00008CF2 }, /* GL_COLOR_ATTACHMENT18 */ + { 57243, 0x00008CF3 }, /* GL_COLOR_ATTACHMENT19 */ + { 57265, 0x00008CF4 }, /* GL_COLOR_ATTACHMENT20 */ + { 57287, 0x00008CF5 }, /* GL_COLOR_ATTACHMENT21 */ + { 57309, 0x00008CF6 }, /* GL_COLOR_ATTACHMENT22 */ + { 57331, 0x00008CF7 }, /* GL_COLOR_ATTACHMENT23 */ + { 57353, 0x00008CF8 }, /* GL_COLOR_ATTACHMENT24 */ + { 57375, 0x00008CF9 }, /* GL_COLOR_ATTACHMENT25 */ + { 57397, 0x00008CFA }, /* GL_COLOR_ATTACHMENT26 */ + { 57419, 0x00008CFB }, /* GL_COLOR_ATTACHMENT27 */ + { 57441, 0x00008CFC }, /* GL_COLOR_ATTACHMENT28 */ + { 57463, 0x00008CFD }, /* GL_COLOR_ATTACHMENT29 */ + { 57485, 0x00008CFE }, /* GL_COLOR_ATTACHMENT30 */ + { 57507, 0x00008CFF }, /* GL_COLOR_ATTACHMENT31 */ + { 57529, 0x00008D00 }, /* GL_DEPTH_ATTACHMENT */ + { 57549, 0x00008D20 }, /* GL_STENCIL_ATTACHMENT */ + { 57571, 0x00008D40 }, /* GL_FRAMEBUFFER */ + { 57586, 0x00008D41 }, /* GL_RENDERBUFFER */ + { 57602, 0x00008D42 }, /* GL_RENDERBUFFER_WIDTH */ + { 57624, 0x00008D43 }, /* GL_RENDERBUFFER_HEIGHT */ + { 57647, 0x00008D44 }, /* GL_RENDERBUFFER_INTERNAL_FORMAT */ + { 57679, 0x00008D46 }, /* GL_STENCIL_INDEX1 */ + { 57697, 0x00008D47 }, /* GL_STENCIL_INDEX4 */ + { 57715, 0x00008D48 }, /* GL_STENCIL_INDEX8 */ + { 57733, 0x00008D49 }, /* GL_STENCIL_INDEX16 */ + { 57752, 0x00008D50 }, /* GL_RENDERBUFFER_RED_SIZE */ + { 57777, 0x00008D51 }, /* GL_RENDERBUFFER_GREEN_SIZE */ + { 57804, 0x00008D52 }, /* GL_RENDERBUFFER_BLUE_SIZE */ + { 57830, 0x00008D53 }, /* GL_RENDERBUFFER_ALPHA_SIZE */ + { 57857, 0x00008D54 }, /* GL_RENDERBUFFER_DEPTH_SIZE */ + { 57884, 0x00008D55 }, /* GL_RENDERBUFFER_STENCIL_SIZE */ + { 57913, 0x00008D56 }, /* GL_FRAMEBUFFER_INCOMPLETE_MULTISAMPLE */ + { 57951, 0x00008D57 }, /* GL_MAX_SAMPLES */ + { 57966, 0x00008D60 }, /* GL_TEXTURE_GEN_STR_OES */ + { 57989, 0x00008D61 }, /* GL_HALF_FLOAT_OES */ + { 58007, 0x00008D62 }, /* GL_RGB565 */ + { 58017, 0x00008D64 }, /* GL_ETC1_RGB8_OES */ + { 58034, 0x00008D65 }, /* GL_TEXTURE_EXTERNAL_OES */ + { 58058, 0x00008D66 }, /* GL_SAMPLER_EXTERNAL_OES */ + { 58082, 0x00008D67 }, /* GL_TEXTURE_BINDING_EXTERNAL_OES */ + { 58114, 0x00008D68 }, /* GL_REQUIRED_TEXTURE_IMAGE_UNITS_OES */ + { 58150, 0x00008D69 }, /* GL_PRIMITIVE_RESTART_FIXED_INDEX */ + { 58183, 0x00008D6A }, /* GL_ANY_SAMPLES_PASSED_CONSERVATIVE */ + { 58218, 0x00008D6B }, /* GL_MAX_ELEMENT_INDEX */ + { 58239, 0x00008D6C }, /* GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_SAMPLES_EXT */ + { 58285, 0x00008D70 }, /* GL_RGBA32UI */ + { 58297, 0x00008D71 }, /* GL_RGB32UI */ + { 58308, 0x00008D72 }, /* GL_ALPHA32UI_EXT */ + { 58325, 0x00008D73 }, /* GL_INTENSITY32UI_EXT */ + { 58346, 0x00008D74 }, /* GL_LUMINANCE32UI_EXT */ + { 58367, 0x00008D75 }, /* GL_LUMINANCE_ALPHA32UI_EXT */ + { 58394, 0x00008D76 }, /* GL_RGBA16UI */ + { 58406, 0x00008D77 }, /* GL_RGB16UI */ + { 58417, 0x00008D78 }, /* GL_ALPHA16UI_EXT */ + { 58434, 0x00008D79 }, /* GL_INTENSITY16UI_EXT */ + { 58455, 0x00008D7A }, /* GL_LUMINANCE16UI_EXT */ + { 58476, 0x00008D7B }, /* GL_LUMINANCE_ALPHA16UI_EXT */ + { 58503, 0x00008D7C }, /* GL_RGBA8UI */ + { 58514, 0x00008D7D }, /* GL_RGB8UI */ + { 58524, 0x00008D7E }, /* GL_ALPHA8UI_EXT */ + { 58540, 0x00008D7F }, /* GL_INTENSITY8UI_EXT */ + { 58560, 0x00008D80 }, /* GL_LUMINANCE8UI_EXT */ + { 58580, 0x00008D81 }, /* GL_LUMINANCE_ALPHA8UI_EXT */ + { 58606, 0x00008D82 }, /* GL_RGBA32I */ + { 58617, 0x00008D83 }, /* GL_RGB32I */ + { 58627, 0x00008D84 }, /* GL_ALPHA32I_EXT */ + { 58643, 0x00008D85 }, /* GL_INTENSITY32I_EXT */ + { 58663, 0x00008D86 }, /* GL_LUMINANCE32I_EXT */ + { 58683, 0x00008D87 }, /* GL_LUMINANCE_ALPHA32I_EXT */ + { 58709, 0x00008D88 }, /* GL_RGBA16I */ + { 58720, 0x00008D89 }, /* GL_RGB16I */ + { 58730, 0x00008D8A }, /* GL_ALPHA16I_EXT */ + { 58746, 0x00008D8B }, /* GL_INTENSITY16I_EXT */ + { 58766, 0x00008D8C }, /* GL_LUMINANCE16I_EXT */ + { 58786, 0x00008D8D }, /* GL_LUMINANCE_ALPHA16I_EXT */ + { 58812, 0x00008D8E }, /* GL_RGBA8I */ + { 58822, 0x00008D8F }, /* GL_RGB8I */ + { 58831, 0x00008D90 }, /* GL_ALPHA8I_EXT */ + { 58846, 0x00008D91 }, /* GL_INTENSITY8I_EXT */ + { 58865, 0x00008D92 }, /* GL_LUMINANCE8I_EXT */ + { 58884, 0x00008D93 }, /* GL_LUMINANCE_ALPHA8I_EXT */ + { 58909, 0x00008D94 }, /* GL_RED_INTEGER */ + { 58924, 0x00008D95 }, /* GL_GREEN_INTEGER */ + { 58941, 0x00008D96 }, /* GL_BLUE_INTEGER */ + { 58957, 0x00008D97 }, /* GL_ALPHA_INTEGER */ + { 58974, 0x00008D98 }, /* GL_RGB_INTEGER */ + { 58989, 0x00008D99 }, /* GL_RGBA_INTEGER */ + { 59005, 0x00008D9A }, /* GL_BGR_INTEGER */ + { 59020, 0x00008D9B }, /* GL_BGRA_INTEGER */ + { 59036, 0x00008D9C }, /* GL_LUMINANCE_INTEGER_EXT */ + { 59061, 0x00008D9D }, /* GL_LUMINANCE_ALPHA_INTEGER_EXT */ + { 59092, 0x00008D9E }, /* GL_RGBA_INTEGER_MODE_EXT */ + { 59117, 0x00008D9F }, /* GL_INT_2_10_10_10_REV */ + { 59139, 0x00008DA0 }, /* GL_MAX_PROGRAM_PARAMETER_BUFFER_BINDINGS_NV */ + { 59183, 0x00008DA1 }, /* GL_MAX_PROGRAM_PARAMETER_BUFFER_SIZE_NV */ + { 59223, 0x00008DA2 }, /* GL_VERTEX_PROGRAM_PARAMETER_BUFFER_NV */ + { 59261, 0x00008DA3 }, /* GL_GEOMETRY_PROGRAM_PARAMETER_BUFFER_NV */ + { 59301, 0x00008DA4 }, /* GL_FRAGMENT_PROGRAM_PARAMETER_BUFFER_NV */ + { 59341, 0x00008DA5 }, /* GL_MAX_PROGRAM_GENERIC_ATTRIBS_NV */ + { 59375, 0x00008DA6 }, /* GL_MAX_PROGRAM_GENERIC_RESULTS_NV */ + { 59409, 0x00008DA7 }, /* GL_FRAMEBUFFER_ATTACHMENT_LAYERED */ + { 59443, 0x00008DA8 }, /* GL_FRAMEBUFFER_INCOMPLETE_LAYER_TARGETS */ + { 59483, 0x00008DA9 }, /* GL_FRAMEBUFFER_INCOMPLETE_LAYER_COUNT_ARB */ + { 59525, 0x00008DAA }, /* GL_LAYER_NV */ + { 59537, 0x00008DAB }, /* GL_DEPTH_COMPONENT32F_NV */ + { 59562, 0x00008DAC }, /* GL_DEPTH32F_STENCIL8_NV */ + { 59586, 0x00008DAD }, /* GL_FLOAT_32_UNSIGNED_INT_24_8_REV */ + { 59620, 0x00008DAE }, /* GL_SHADER_INCLUDE_ARB */ + { 59642, 0x00008DAF }, /* GL_DEPTH_BUFFER_FLOAT_MODE_NV */ + { 59672, 0x00008DB9 }, /* GL_FRAMEBUFFER_SRGB */ + { 59692, 0x00008DBA }, /* GL_FRAMEBUFFER_SRGB_CAPABLE_EXT */ + { 59724, 0x00008DBB }, /* GL_COMPRESSED_RED_RGTC1 */ + { 59748, 0x00008DBC }, /* GL_COMPRESSED_SIGNED_RED_RGTC1 */ + { 59779, 0x00008DBD }, /* GL_COMPRESSED_RG_RGTC2 */ + { 59802, 0x00008DBE }, /* GL_COMPRESSED_SIGNED_RG_RGTC2 */ + { 59832, 0x00008DC0 }, /* GL_SAMPLER_1D_ARRAY */ + { 59852, 0x00008DC1 }, /* GL_SAMPLER_2D_ARRAY */ + { 59872, 0x00008DC2 }, /* GL_SAMPLER_BUFFER */ + { 59890, 0x00008DC3 }, /* GL_SAMPLER_1D_ARRAY_SHADOW */ + { 59917, 0x00008DC4 }, /* GL_SAMPLER_2D_ARRAY_SHADOW */ + { 59944, 0x00008DC5 }, /* GL_SAMPLER_CUBE_SHADOW */ + { 59967, 0x00008DC6 }, /* GL_UNSIGNED_INT_VEC2 */ + { 59988, 0x00008DC7 }, /* GL_UNSIGNED_INT_VEC3 */ + { 60009, 0x00008DC8 }, /* GL_UNSIGNED_INT_VEC4 */ + { 60030, 0x00008DC9 }, /* GL_INT_SAMPLER_1D */ + { 60048, 0x00008DCA }, /* GL_INT_SAMPLER_2D */ + { 60066, 0x00008DCB }, /* GL_INT_SAMPLER_3D */ + { 60084, 0x00008DCC }, /* GL_INT_SAMPLER_CUBE */ + { 60104, 0x00008DCD }, /* GL_INT_SAMPLER_2D_RECT */ + { 60127, 0x00008DCE }, /* GL_INT_SAMPLER_1D_ARRAY */ + { 60151, 0x00008DCF }, /* GL_INT_SAMPLER_2D_ARRAY */ + { 60175, 0x00008DD0 }, /* GL_INT_SAMPLER_BUFFER */ + { 60197, 0x00008DD1 }, /* GL_UNSIGNED_INT_SAMPLER_1D */ + { 60224, 0x00008DD2 }, /* GL_UNSIGNED_INT_SAMPLER_2D */ + { 60251, 0x00008DD3 }, /* GL_UNSIGNED_INT_SAMPLER_3D */ + { 60278, 0x00008DD4 }, /* GL_UNSIGNED_INT_SAMPLER_CUBE */ + { 60307, 0x00008DD5 }, /* GL_UNSIGNED_INT_SAMPLER_2D_RECT */ + { 60339, 0x00008DD6 }, /* GL_UNSIGNED_INT_SAMPLER_1D_ARRAY */ + { 60372, 0x00008DD7 }, /* GL_UNSIGNED_INT_SAMPLER_2D_ARRAY */ + { 60405, 0x00008DD8 }, /* GL_UNSIGNED_INT_SAMPLER_BUFFER */ + { 60436, 0x00008DD9 }, /* GL_GEOMETRY_SHADER */ + { 60455, 0x00008DDA }, /* GL_GEOMETRY_VERTICES_OUT_ARB */ + { 60484, 0x00008DDB }, /* GL_GEOMETRY_INPUT_TYPE_ARB */ + { 60511, 0x00008DDC }, /* GL_GEOMETRY_OUTPUT_TYPE_ARB */ + { 60539, 0x00008DDD }, /* GL_MAX_GEOMETRY_VARYING_COMPONENTS_ARB */ + { 60578, 0x00008DDE }, /* GL_MAX_VERTEX_VARYING_COMPONENTS_ARB */ + { 60615, 0x00008DDF }, /* GL_MAX_GEOMETRY_UNIFORM_COMPONENTS */ + { 60650, 0x00008DE0 }, /* GL_MAX_GEOMETRY_OUTPUT_VERTICES */ + { 60682, 0x00008DE1 }, /* GL_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS */ + { 60722, 0x00008DE2 }, /* GL_MAX_VERTEX_BINDABLE_UNIFORMS_EXT */ + { 60758, 0x00008DE3 }, /* GL_MAX_FRAGMENT_BINDABLE_UNIFORMS_EXT */ + { 60796, 0x00008DE4 }, /* GL_MAX_GEOMETRY_BINDABLE_UNIFORMS_EXT */ + { 60834, 0x00008DE5 }, /* GL_ACTIVE_SUBROUTINES */ + { 60856, 0x00008DE6 }, /* GL_ACTIVE_SUBROUTINE_UNIFORMS */ + { 60886, 0x00008DE7 }, /* GL_MAX_SUBROUTINES */ + { 60905, 0x00008DE8 }, /* GL_MAX_SUBROUTINE_UNIFORM_LOCATIONS */ + { 60941, 0x00008DE9 }, /* GL_NAMED_STRING_LENGTH_ARB */ + { 60968, 0x00008DEA }, /* GL_NAMED_STRING_TYPE_ARB */ + { 60993, 0x00008DED }, /* GL_MAX_BINDABLE_UNIFORM_SIZE_EXT */ + { 61026, 0x00008DEE }, /* GL_UNIFORM_BUFFER_EXT */ + { 61048, 0x00008DEF }, /* GL_UNIFORM_BUFFER_BINDING_EXT */ + { 61078, 0x00008DF0 }, /* GL_LOW_FLOAT */ + { 61091, 0x00008DF1 }, /* GL_MEDIUM_FLOAT */ + { 61107, 0x00008DF2 }, /* GL_HIGH_FLOAT */ + { 61121, 0x00008DF3 }, /* GL_LOW_INT */ + { 61132, 0x00008DF4 }, /* GL_MEDIUM_INT */ + { 61146, 0x00008DF5 }, /* GL_HIGH_INT */ + { 61158, 0x00008DF6 }, /* GL_UNSIGNED_INT_10_10_10_2_OES */ + { 61189, 0x00008DF7 }, /* GL_INT_10_10_10_2_OES */ + { 61211, 0x00008DF8 }, /* GL_SHADER_BINARY_FORMATS */ + { 61236, 0x00008DF9 }, /* GL_NUM_SHADER_BINARY_FORMATS */ + { 61265, 0x00008DFA }, /* GL_SHADER_COMPILER */ + { 61284, 0x00008DFB }, /* GL_MAX_VERTEX_UNIFORM_VECTORS */ + { 61314, 0x00008DFC }, /* GL_MAX_VARYING_VECTORS */ + { 61337, 0x00008DFD }, /* GL_MAX_FRAGMENT_UNIFORM_VECTORS */ + { 61369, 0x00008E10 }, /* GL_RENDERBUFFER_COLOR_SAMPLES_NV */ + { 61402, 0x00008E11 }, /* GL_MAX_MULTISAMPLE_COVERAGE_MODES_NV */ + { 61439, 0x00008E12 }, /* GL_MULTISAMPLE_COVERAGE_MODES_NV */ + { 61472, 0x00008E13 }, /* GL_QUERY_WAIT */ + { 61486, 0x00008E14 }, /* GL_QUERY_NO_WAIT */ + { 61503, 0x00008E15 }, /* GL_QUERY_BY_REGION_WAIT */ + { 61527, 0x00008E16 }, /* GL_QUERY_BY_REGION_NO_WAIT */ + { 61554, 0x00008E17 }, /* GL_QUERY_WAIT_INVERTED */ + { 61577, 0x00008E18 }, /* GL_QUERY_NO_WAIT_INVERTED */ + { 61603, 0x00008E19 }, /* GL_QUERY_BY_REGION_WAIT_INVERTED */ + { 61636, 0x00008E1A }, /* GL_QUERY_BY_REGION_NO_WAIT_INVERTED */ + { 61672, 0x00008E1B }, /* GL_POLYGON_OFFSET_CLAMP_EXT */ + { 61700, 0x00008E1E }, /* GL_MAX_COMBINED_TESS_CONTROL_UNIFORM_COMPONENTS */ + { 61748, 0x00008E1F }, /* GL_MAX_COMBINED_TESS_EVALUATION_UNIFORM_COMPONENTS */ + { 61799, 0x00008E20 }, /* GL_COLOR_SAMPLES_NV */ + { 61819, 0x00008E22 }, /* GL_TRANSFORM_FEEDBACK */ + { 61841, 0x00008E23 }, /* GL_TRANSFORM_FEEDBACK_PAUSED */ + { 61870, 0x00008E24 }, /* GL_TRANSFORM_FEEDBACK_ACTIVE */ + { 61899, 0x00008E25 }, /* GL_TRANSFORM_FEEDBACK_BINDING */ + { 61929, 0x00008E26 }, /* GL_FRAME_NV */ + { 61941, 0x00008E27 }, /* GL_FIELDS_NV */ + { 61954, 0x00008E28 }, /* GL_TIMESTAMP */ + { 61967, 0x00008E29 }, /* GL_NUM_FILL_STREAMS_NV */ + { 61990, 0x00008E2A }, /* GL_PRESENT_TIME_NV */ + { 62009, 0x00008E2B }, /* GL_PRESENT_DURATION_NV */ + { 62032, 0x00008E2C }, /* GL_DEPTH_COMPONENT16_NONLINEAR_NV */ + { 62066, 0x00008E2D }, /* GL_PROGRAM_MATRIX_EXT */ + { 62088, 0x00008E2E }, /* GL_TRANSPOSE_PROGRAM_MATRIX_EXT */ + { 62120, 0x00008E2F }, /* GL_PROGRAM_MATRIX_STACK_DEPTH_EXT */ + { 62154, 0x00008E42 }, /* GL_TEXTURE_SWIZZLE_R */ + { 62175, 0x00008E43 }, /* GL_TEXTURE_SWIZZLE_G */ + { 62196, 0x00008E44 }, /* GL_TEXTURE_SWIZZLE_B */ + { 62217, 0x00008E45 }, /* GL_TEXTURE_SWIZZLE_A */ + { 62238, 0x00008E46 }, /* GL_TEXTURE_SWIZZLE_RGBA */ + { 62262, 0x00008E47 }, /* GL_ACTIVE_SUBROUTINE_UNIFORM_LOCATIONS */ + { 62301, 0x00008E48 }, /* GL_ACTIVE_SUBROUTINE_MAX_LENGTH */ + { 62333, 0x00008E49 }, /* GL_ACTIVE_SUBROUTINE_UNIFORM_MAX_LENGTH */ + { 62373, 0x00008E4A }, /* GL_NUM_COMPATIBLE_SUBROUTINES */ + { 62403, 0x00008E4B }, /* GL_COMPATIBLE_SUBROUTINES */ + { 62429, 0x00008E4C }, /* GL_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION */ + { 62473, 0x00008E4D }, /* GL_FIRST_VERTEX_CONVENTION */ + { 62500, 0x00008E4E }, /* GL_LAST_VERTEX_CONVENTION */ + { 62526, 0x00008E4F }, /* GL_PROVOKING_VERTEX */ + { 62546, 0x00008E50 }, /* GL_SAMPLE_POSITION */ + { 62565, 0x00008E51 }, /* GL_SAMPLE_MASK */ + { 62580, 0x00008E52 }, /* GL_SAMPLE_MASK_VALUE */ + { 62601, 0x00008E53 }, /* GL_TEXTURE_BINDING_RENDERBUFFER_NV */ + { 62636, 0x00008E54 }, /* GL_TEXTURE_RENDERBUFFER_DATA_STORE_BINDING_NV */ + { 62682, 0x00008E55 }, /* GL_TEXTURE_RENDERBUFFER_NV */ + { 62709, 0x00008E56 }, /* GL_SAMPLER_RENDERBUFFER_NV */ + { 62736, 0x00008E57 }, /* GL_INT_SAMPLER_RENDERBUFFER_NV */ + { 62767, 0x00008E58 }, /* GL_UNSIGNED_INT_SAMPLER_RENDERBUFFER_NV */ + { 62807, 0x00008E59 }, /* GL_MAX_SAMPLE_MASK_WORDS */ + { 62832, 0x00008E5A }, /* GL_MAX_GEOMETRY_SHADER_INVOCATIONS */ + { 62867, 0x00008E5B }, /* GL_MIN_FRAGMENT_INTERPOLATION_OFFSET */ + { 62904, 0x00008E5C }, /* GL_MAX_FRAGMENT_INTERPOLATION_OFFSET */ + { 62941, 0x00008E5D }, /* GL_FRAGMENT_INTERPOLATION_OFFSET_BITS */ + { 62979, 0x00008E5E }, /* GL_MIN_PROGRAM_TEXTURE_GATHER_OFFSET */ + { 63016, 0x00008E5F }, /* GL_MAX_PROGRAM_TEXTURE_GATHER_OFFSET */ + { 63053, 0x00008E70 }, /* GL_MAX_TRANSFORM_FEEDBACK_BUFFERS */ + { 63087, 0x00008E71 }, /* GL_MAX_VERTEX_STREAMS */ + { 63109, 0x00008E72 }, /* GL_PATCH_VERTICES */ + { 63127, 0x00008E73 }, /* GL_PATCH_DEFAULT_INNER_LEVEL */ + { 63156, 0x00008E74 }, /* GL_PATCH_DEFAULT_OUTER_LEVEL */ + { 63185, 0x00008E75 }, /* GL_TESS_CONTROL_OUTPUT_VERTICES */ + { 63217, 0x00008E76 }, /* GL_TESS_GEN_MODE */ + { 63234, 0x00008E77 }, /* GL_TESS_GEN_SPACING */ + { 63254, 0x00008E78 }, /* GL_TESS_GEN_VERTEX_ORDER */ + { 63279, 0x00008E79 }, /* GL_TESS_GEN_POINT_MODE */ + { 63302, 0x00008E7A }, /* GL_ISOLINES */ + { 63314, 0x00008E7B }, /* GL_FRACTIONAL_ODD */ + { 63332, 0x00008E7C }, /* GL_FRACTIONAL_EVEN */ + { 63351, 0x00008E7D }, /* GL_MAX_PATCH_VERTICES */ + { 63373, 0x00008E7E }, /* GL_MAX_TESS_GEN_LEVEL */ + { 63395, 0x00008E7F }, /* GL_MAX_TESS_CONTROL_UNIFORM_COMPONENTS */ + { 63434, 0x00008E80 }, /* GL_MAX_TESS_EVALUATION_UNIFORM_COMPONENTS */ + { 63476, 0x00008E81 }, /* GL_MAX_TESS_CONTROL_TEXTURE_IMAGE_UNITS */ + { 63516, 0x00008E82 }, /* GL_MAX_TESS_EVALUATION_TEXTURE_IMAGE_UNITS */ + { 63559, 0x00008E83 }, /* GL_MAX_TESS_CONTROL_OUTPUT_COMPONENTS */ + { 63597, 0x00008E84 }, /* GL_MAX_TESS_PATCH_COMPONENTS */ + { 63626, 0x00008E85 }, /* GL_MAX_TESS_CONTROL_TOTAL_OUTPUT_COMPONENTS */ + { 63670, 0x00008E86 }, /* GL_MAX_TESS_EVALUATION_OUTPUT_COMPONENTS */ + { 63711, 0x00008E87 }, /* GL_TESS_EVALUATION_SHADER */ + { 63737, 0x00008E88 }, /* GL_TESS_CONTROL_SHADER */ + { 63760, 0x00008E89 }, /* GL_MAX_TESS_CONTROL_UNIFORM_BLOCKS */ + { 63795, 0x00008E8A }, /* GL_MAX_TESS_EVALUATION_UNIFORM_BLOCKS */ + { 63833, 0x00008E8C }, /* GL_COMPRESSED_RGBA_BPTC_UNORM */ + { 63863, 0x00008E8D }, /* GL_COMPRESSED_SRGB_ALPHA_BPTC_UNORM */ + { 63899, 0x00008E8E }, /* GL_COMPRESSED_RGB_BPTC_SIGNED_FLOAT */ + { 63935, 0x00008E8F }, /* GL_COMPRESSED_RGB_BPTC_UNSIGNED_FLOAT */ + { 63973, 0x00008ED0 }, /* GL_COVERAGE_COMPONENT_NV */ + { 63998, 0x00008ED1 }, /* GL_COVERAGE_COMPONENT4_NV */ + { 64024, 0x00008ED2 }, /* GL_COVERAGE_ATTACHMENT_NV */ + { 64050, 0x00008ED3 }, /* GL_COVERAGE_BUFFERS_NV */ + { 64073, 0x00008ED4 }, /* GL_COVERAGE_SAMPLES_NV */ + { 64096, 0x00008ED5 }, /* GL_COVERAGE_ALL_FRAGMENTS_NV */ + { 64125, 0x00008ED6 }, /* GL_COVERAGE_EDGE_FRAGMENTS_NV */ + { 64155, 0x00008ED7 }, /* GL_COVERAGE_AUTOMATIC_NV */ + { 64180, 0x00008F10 }, /* GL_INCLUSIVE_EXT */ + { 64197, 0x00008F11 }, /* GL_EXCLUSIVE_EXT */ + { 64214, 0x00008F12 }, /* GL_WINDOW_RECTANGLE_EXT */ + { 64238, 0x00008F13 }, /* GL_WINDOW_RECTANGLE_MODE_EXT */ + { 64267, 0x00008F14 }, /* GL_MAX_WINDOW_RECTANGLES_EXT */ + { 64296, 0x00008F15 }, /* GL_NUM_WINDOW_RECTANGLES_EXT */ + { 64325, 0x00008F1D }, /* GL_BUFFER_GPU_ADDRESS_NV */ + { 64350, 0x00008F1E }, /* GL_VERTEX_ATTRIB_ARRAY_UNIFIED_NV */ + { 64384, 0x00008F1F }, /* GL_ELEMENT_ARRAY_UNIFIED_NV */ + { 64412, 0x00008F20 }, /* GL_VERTEX_ATTRIB_ARRAY_ADDRESS_NV */ + { 64446, 0x00008F21 }, /* GL_VERTEX_ARRAY_ADDRESS_NV */ + { 64473, 0x00008F22 }, /* GL_NORMAL_ARRAY_ADDRESS_NV */ + { 64500, 0x00008F23 }, /* GL_COLOR_ARRAY_ADDRESS_NV */ + { 64526, 0x00008F24 }, /* GL_INDEX_ARRAY_ADDRESS_NV */ + { 64552, 0x00008F25 }, /* GL_TEXTURE_COORD_ARRAY_ADDRESS_NV */ + { 64586, 0x00008F26 }, /* GL_EDGE_FLAG_ARRAY_ADDRESS_NV */ + { 64616, 0x00008F27 }, /* GL_SECONDARY_COLOR_ARRAY_ADDRESS_NV */ + { 64652, 0x00008F28 }, /* GL_FOG_COORD_ARRAY_ADDRESS_NV */ + { 64682, 0x00008F29 }, /* GL_ELEMENT_ARRAY_ADDRESS_NV */ + { 64710, 0x00008F2A }, /* GL_VERTEX_ATTRIB_ARRAY_LENGTH_NV */ + { 64743, 0x00008F2B }, /* GL_VERTEX_ARRAY_LENGTH_NV */ + { 64769, 0x00008F2C }, /* GL_NORMAL_ARRAY_LENGTH_NV */ + { 64795, 0x00008F2D }, /* GL_COLOR_ARRAY_LENGTH_NV */ + { 64820, 0x00008F2E }, /* GL_INDEX_ARRAY_LENGTH_NV */ + { 64845, 0x00008F2F }, /* GL_TEXTURE_COORD_ARRAY_LENGTH_NV */ + { 64878, 0x00008F30 }, /* GL_EDGE_FLAG_ARRAY_LENGTH_NV */ + { 64907, 0x00008F31 }, /* GL_SECONDARY_COLOR_ARRAY_LENGTH_NV */ + { 64942, 0x00008F32 }, /* GL_FOG_COORD_ARRAY_LENGTH_NV */ + { 64971, 0x00008F33 }, /* GL_ELEMENT_ARRAY_LENGTH_NV */ + { 64998, 0x00008F34 }, /* GL_GPU_ADDRESS_NV */ + { 65016, 0x00008F35 }, /* GL_MAX_SHADER_BUFFER_ADDRESS_NV */ + { 65048, 0x00008F36 }, /* GL_COPY_READ_BUFFER_BINDING */ + { 65076, 0x00008F37 }, /* GL_COPY_WRITE_BUFFER_BINDING */ + { 65105, 0x00008F38 }, /* GL_MAX_IMAGE_UNITS */ + { 65124, 0x00008F39 }, /* GL_MAX_COMBINED_SHADER_OUTPUT_RESOURCES */ + { 65164, 0x00008F3A }, /* GL_IMAGE_BINDING_NAME */ + { 65186, 0x00008F3B }, /* GL_IMAGE_BINDING_LEVEL */ + { 65209, 0x00008F3C }, /* GL_IMAGE_BINDING_LAYERED */ + { 65234, 0x00008F3D }, /* GL_IMAGE_BINDING_LAYER */ + { 65257, 0x00008F3E }, /* GL_IMAGE_BINDING_ACCESS */ + { 65281, 0x00008F3F }, /* GL_DRAW_INDIRECT_BUFFER */ + { 65305, 0x00008F40 }, /* GL_DRAW_INDIRECT_UNIFIED_NV */ + { 65333, 0x00008F41 }, /* GL_DRAW_INDIRECT_ADDRESS_NV */ + { 65361, 0x00008F42 }, /* GL_DRAW_INDIRECT_LENGTH_NV */ + { 65388, 0x00008F43 }, /* GL_DRAW_INDIRECT_BUFFER_BINDING */ + { 65420, 0x00008F44 }, /* GL_MAX_PROGRAM_SUBROUTINE_PARAMETERS_NV */ + { 65460, 0x00008F45 }, /* GL_MAX_PROGRAM_SUBROUTINE_NUM_NV */ + { 65493, 0x00008F46 }, /* GL_DOUBLE_MAT2 */ + { 65508, 0x00008F47 }, /* GL_DOUBLE_MAT3 */ + { 65523, 0x00008F48 }, /* GL_DOUBLE_MAT4 */ + { 65538, 0x00008F49 }, /* GL_DOUBLE_MAT2x3 */ + { 65555, 0x00008F4A }, /* GL_DOUBLE_MAT2x4 */ + { 65572, 0x00008F4B }, /* GL_DOUBLE_MAT3x2 */ + { 65589, 0x00008F4C }, /* GL_DOUBLE_MAT3x4 */ + { 65606, 0x00008F4D }, /* GL_DOUBLE_MAT4x2 */ + { 65623, 0x00008F4E }, /* GL_DOUBLE_MAT4x3 */ + { 65640, 0x00008F4F }, /* GL_VERTEX_BINDING_BUFFER */ + { 65665, 0x00008F60 }, /* GL_MALI_SHADER_BINARY_ARM */ + { 65691, 0x00008F61 }, /* GL_MALI_PROGRAM_BINARY_ARM */ + { 65718, 0x00008F63 }, /* GL_MAX_SHADER_PIXEL_LOCAL_STORAGE_FAST_SIZE_EXT */ + { 65766, 0x00008F64 }, /* GL_SHADER_PIXEL_LOCAL_STORAGE_EXT */ + { 65800, 0x00008F65 }, /* GL_FETCH_PER_SAMPLE_ARM */ + { 65824, 0x00008F66 }, /* GL_FRAGMENT_SHADER_FRAMEBUFFER_FETCH_MRT_ARM */ + { 65869, 0x00008F67 }, /* GL_MAX_SHADER_PIXEL_LOCAL_STORAGE_SIZE_EXT */ + { 65912, 0x00008F90 }, /* GL_RED_SNORM */ + { 65925, 0x00008F91 }, /* GL_RG_SNORM */ + { 65937, 0x00008F92 }, /* GL_RGB_SNORM */ + { 65950, 0x00008F93 }, /* GL_RGBA_SNORM */ + { 65964, 0x00008F94 }, /* GL_R8_SNORM */ + { 65976, 0x00008F95 }, /* GL_RG8_SNORM */ + { 65989, 0x00008F96 }, /* GL_RGB8_SNORM */ + { 66003, 0x00008F97 }, /* GL_RGBA8_SNORM */ + { 66018, 0x00008F98 }, /* GL_R16_SNORM */ + { 66031, 0x00008F99 }, /* GL_RG16_SNORM */ + { 66045, 0x00008F9A }, /* GL_RGB16_SNORM */ + { 66060, 0x00008F9B }, /* GL_RGBA16_SNORM */ + { 66076, 0x00008F9C }, /* GL_SIGNED_NORMALIZED */ + { 66097, 0x00008F9D }, /* GL_PRIMITIVE_RESTART */ + { 66118, 0x00008F9E }, /* GL_PRIMITIVE_RESTART_INDEX */ + { 66145, 0x00008F9F }, /* GL_MAX_PROGRAM_TEXTURE_GATHER_COMPONENTS_ARB */ + { 66190, 0x00008FA0 }, /* GL_PERFMON_GLOBAL_MODE_QCOM */ + { 66218, 0x00008FB0 }, /* GL_BINNING_CONTROL_HINT_QCOM */ + { 66247, 0x00008FB1 }, /* GL_CPU_OPTIMIZED_QCOM */ + { 66269, 0x00008FB2 }, /* GL_GPU_OPTIMIZED_QCOM */ + { 66291, 0x00008FB3 }, /* GL_RENDER_DIRECT_TO_FRAMEBUFFER_QCOM */ + { 66328, 0x00008FBB }, /* GL_GPU_DISJOINT_EXT */ + { 66348, 0x00008FBD }, /* GL_SR8_EXT */ + { 66359, 0x00008FBE }, /* GL_SRG8_EXT */ + { 66371, 0x00008FC4 }, /* GL_SHADER_BINARY_VIV */ + { 66392, 0x00008FE0 }, /* GL_INT8_NV */ + { 66403, 0x00008FE1 }, /* GL_INT8_VEC2_NV */ + { 66419, 0x00008FE2 }, /* GL_INT8_VEC3_NV */ + { 66435, 0x00008FE3 }, /* GL_INT8_VEC4_NV */ + { 66451, 0x00008FE4 }, /* GL_INT16_NV */ + { 66463, 0x00008FE5 }, /* GL_INT16_VEC2_NV */ + { 66480, 0x00008FE6 }, /* GL_INT16_VEC3_NV */ + { 66497, 0x00008FE7 }, /* GL_INT16_VEC4_NV */ + { 66514, 0x00008FE9 }, /* GL_INT64_VEC2_ARB */ + { 66532, 0x00008FEA }, /* GL_INT64_VEC3_ARB */ + { 66550, 0x00008FEB }, /* GL_INT64_VEC4_ARB */ + { 66568, 0x00008FEC }, /* GL_UNSIGNED_INT8_NV */ + { 66588, 0x00008FED }, /* GL_UNSIGNED_INT8_VEC2_NV */ + { 66613, 0x00008FEE }, /* GL_UNSIGNED_INT8_VEC3_NV */ + { 66638, 0x00008FEF }, /* GL_UNSIGNED_INT8_VEC4_NV */ + { 66663, 0x00008FF0 }, /* GL_UNSIGNED_INT16_NV */ + { 66684, 0x00008FF1 }, /* GL_UNSIGNED_INT16_VEC2_NV */ + { 66710, 0x00008FF2 }, /* GL_UNSIGNED_INT16_VEC3_NV */ + { 66736, 0x00008FF3 }, /* GL_UNSIGNED_INT16_VEC4_NV */ + { 66762, 0x00008FF5 }, /* GL_UNSIGNED_INT64_VEC2_ARB */ + { 66789, 0x00008FF6 }, /* GL_UNSIGNED_INT64_VEC3_ARB */ + { 66816, 0x00008FF7 }, /* GL_UNSIGNED_INT64_VEC4_ARB */ + { 66843, 0x00008FF8 }, /* GL_FLOAT16_NV */ + { 66857, 0x00008FF9 }, /* GL_FLOAT16_VEC2_NV */ + { 66876, 0x00008FFA }, /* GL_FLOAT16_VEC3_NV */ + { 66895, 0x00008FFB }, /* GL_FLOAT16_VEC4_NV */ + { 66914, 0x00008FFC }, /* GL_DOUBLE_VEC2 */ + { 66929, 0x00008FFD }, /* GL_DOUBLE_VEC3 */ + { 66944, 0x00008FFE }, /* GL_DOUBLE_VEC4 */ + { 66959, 0x00009001 }, /* GL_SAMPLER_BUFFER_AMD */ + { 66981, 0x00009002 }, /* GL_INT_SAMPLER_BUFFER_AMD */ + { 67007, 0x00009003 }, /* GL_UNSIGNED_INT_SAMPLER_BUFFER_AMD */ + { 67042, 0x00009004 }, /* GL_TESSELLATION_MODE_AMD */ + { 67067, 0x00009005 }, /* GL_TESSELLATION_FACTOR_AMD */ + { 67094, 0x00009006 }, /* GL_DISCRETE_AMD */ + { 67110, 0x00009007 }, /* GL_CONTINUOUS_AMD */ + { 67128, 0x00009009 }, /* GL_TEXTURE_CUBE_MAP_ARRAY */ + { 67154, 0x0000900A }, /* GL_TEXTURE_BINDING_CUBE_MAP_ARRAY */ + { 67188, 0x0000900B }, /* GL_PROXY_TEXTURE_CUBE_MAP_ARRAY */ + { 67220, 0x0000900C }, /* GL_SAMPLER_CUBE_MAP_ARRAY */ + { 67246, 0x0000900D }, /* GL_SAMPLER_CUBE_MAP_ARRAY_SHADOW */ + { 67279, 0x0000900E }, /* GL_INT_SAMPLER_CUBE_MAP_ARRAY */ + { 67309, 0x0000900F }, /* GL_UNSIGNED_INT_SAMPLER_CUBE_MAP_ARRAY */ + { 67348, 0x00009010 }, /* GL_ALPHA_SNORM */ + { 67363, 0x00009011 }, /* GL_LUMINANCE_SNORM */ + { 67382, 0x00009012 }, /* GL_LUMINANCE_ALPHA_SNORM */ + { 67407, 0x00009013 }, /* GL_INTENSITY_SNORM */ + { 67426, 0x00009014 }, /* GL_ALPHA8_SNORM */ + { 67442, 0x00009015 }, /* GL_LUMINANCE8_SNORM */ + { 67462, 0x00009016 }, /* GL_LUMINANCE8_ALPHA8_SNORM */ + { 67489, 0x00009017 }, /* GL_INTENSITY8_SNORM */ + { 67509, 0x00009018 }, /* GL_ALPHA16_SNORM */ + { 67526, 0x00009019 }, /* GL_LUMINANCE16_SNORM */ + { 67547, 0x0000901A }, /* GL_LUMINANCE16_ALPHA16_SNORM */ + { 67576, 0x0000901B }, /* GL_INTENSITY16_SNORM */ + { 67597, 0x0000901C }, /* GL_FACTOR_MIN_AMD */ + { 67615, 0x0000901D }, /* GL_FACTOR_MAX_AMD */ + { 67633, 0x0000901E }, /* GL_DEPTH_CLAMP_NEAR_AMD */ + { 67657, 0x0000901F }, /* GL_DEPTH_CLAMP_FAR_AMD */ + { 67680, 0x00009020 }, /* GL_VIDEO_BUFFER_NV */ + { 67699, 0x00009021 }, /* GL_VIDEO_BUFFER_BINDING_NV */ + { 67726, 0x00009022 }, /* GL_FIELD_UPPER_NV */ + { 67744, 0x00009023 }, /* GL_FIELD_LOWER_NV */ + { 67762, 0x00009024 }, /* GL_NUM_VIDEO_CAPTURE_STREAMS_NV */ + { 67794, 0x00009025 }, /* GL_NEXT_VIDEO_CAPTURE_BUFFER_STATUS_NV */ + { 67833, 0x00009026 }, /* GL_VIDEO_CAPTURE_TO_422_SUPPORTED_NV */ + { 67870, 0x00009027 }, /* GL_LAST_VIDEO_CAPTURE_STATUS_NV */ + { 67902, 0x00009028 }, /* GL_VIDEO_BUFFER_PITCH_NV */ + { 67927, 0x00009029 }, /* GL_VIDEO_COLOR_CONVERSION_MATRIX_NV */ + { 67963, 0x0000902A }, /* GL_VIDEO_COLOR_CONVERSION_MAX_NV */ + { 67996, 0x0000902B }, /* GL_VIDEO_COLOR_CONVERSION_MIN_NV */ + { 68029, 0x0000902C }, /* GL_VIDEO_COLOR_CONVERSION_OFFSET_NV */ + { 68065, 0x0000902D }, /* GL_VIDEO_BUFFER_INTERNAL_FORMAT_NV */ + { 68100, 0x0000902E }, /* GL_PARTIAL_SUCCESS_NV */ + { 68122, 0x0000902F }, /* GL_SUCCESS_NV */ + { 68136, 0x00009030 }, /* GL_FAILURE_NV */ + { 68150, 0x00009031 }, /* GL_YCBYCR8_422_NV */ + { 68168, 0x00009032 }, /* GL_YCBAYCR8A_4224_NV */ + { 68189, 0x00009033 }, /* GL_Z6Y10Z6CB10Z6Y10Z6CR10_422_NV */ + { 68222, 0x00009034 }, /* GL_Z6Y10Z6CB10Z6A10Z6Y10Z6CR10Z6A10_4224_NV */ + { 68266, 0x00009035 }, /* GL_Z4Y12Z4CB12Z4Y12Z4CR12_422_NV */ + { 68299, 0x00009036 }, /* GL_Z4Y12Z4CB12Z4A12Z4Y12Z4CR12Z4A12_4224_NV */ + { 68343, 0x00009037 }, /* GL_Z4Y12Z4CB12Z4CR12_444_NV */ + { 68371, 0x00009038 }, /* GL_VIDEO_CAPTURE_FRAME_WIDTH_NV */ + { 68403, 0x00009039 }, /* GL_VIDEO_CAPTURE_FRAME_HEIGHT_NV */ + { 68436, 0x0000903A }, /* GL_VIDEO_CAPTURE_FIELD_UPPER_HEIGHT_NV */ + { 68475, 0x0000903B }, /* GL_VIDEO_CAPTURE_FIELD_LOWER_HEIGHT_NV */ + { 68514, 0x0000903C }, /* GL_VIDEO_CAPTURE_SURFACE_ORIGIN_NV */ + { 68549, 0x00009045 }, /* GL_TEXTURE_COVERAGE_SAMPLES_NV */ + { 68580, 0x00009046 }, /* GL_TEXTURE_COLOR_SAMPLES_NV */ + { 68608, 0x00009047 }, /* GL_GPU_MEMORY_INFO_DEDICATED_VIDMEM_NVX */ + { 68648, 0x00009048 }, /* GL_GPU_MEMORY_INFO_TOTAL_AVAILABLE_MEMORY_NVX */ + { 68694, 0x00009049 }, /* GL_GPU_MEMORY_INFO_CURRENT_AVAILABLE_VIDMEM_NVX */ + { 68742, 0x0000904A }, /* GL_GPU_MEMORY_INFO_EVICTION_COUNT_NVX */ + { 68780, 0x0000904B }, /* GL_GPU_MEMORY_INFO_EVICTED_MEMORY_NVX */ + { 68818, 0x0000904C }, /* GL_IMAGE_1D */ + { 68830, 0x0000904D }, /* GL_IMAGE_2D */ + { 68842, 0x0000904E }, /* GL_IMAGE_3D */ + { 68854, 0x0000904F }, /* GL_IMAGE_2D_RECT */ + { 68871, 0x00009050 }, /* GL_IMAGE_CUBE */ + { 68885, 0x00009051 }, /* GL_IMAGE_BUFFER */ + { 68901, 0x00009052 }, /* GL_IMAGE_1D_ARRAY */ + { 68919, 0x00009053 }, /* GL_IMAGE_2D_ARRAY */ + { 68937, 0x00009054 }, /* GL_IMAGE_CUBE_MAP_ARRAY */ + { 68961, 0x00009055 }, /* GL_IMAGE_2D_MULTISAMPLE */ + { 68985, 0x00009056 }, /* GL_IMAGE_2D_MULTISAMPLE_ARRAY */ + { 69015, 0x00009057 }, /* GL_INT_IMAGE_1D */ + { 69031, 0x00009058 }, /* GL_INT_IMAGE_2D */ + { 69047, 0x00009059 }, /* GL_INT_IMAGE_3D */ + { 69063, 0x0000905A }, /* GL_INT_IMAGE_2D_RECT */ + { 69084, 0x0000905B }, /* GL_INT_IMAGE_CUBE */ + { 69102, 0x0000905C }, /* GL_INT_IMAGE_BUFFER */ + { 69122, 0x0000905D }, /* GL_INT_IMAGE_1D_ARRAY */ + { 69144, 0x0000905E }, /* GL_INT_IMAGE_2D_ARRAY */ + { 69166, 0x0000905F }, /* GL_INT_IMAGE_CUBE_MAP_ARRAY */ + { 69194, 0x00009060 }, /* GL_INT_IMAGE_2D_MULTISAMPLE */ + { 69222, 0x00009061 }, /* GL_INT_IMAGE_2D_MULTISAMPLE_ARRAY */ + { 69256, 0x00009062 }, /* GL_UNSIGNED_INT_IMAGE_1D */ + { 69281, 0x00009063 }, /* GL_UNSIGNED_INT_IMAGE_2D */ + { 69306, 0x00009064 }, /* GL_UNSIGNED_INT_IMAGE_3D */ + { 69331, 0x00009065 }, /* GL_UNSIGNED_INT_IMAGE_2D_RECT */ + { 69361, 0x00009066 }, /* GL_UNSIGNED_INT_IMAGE_CUBE */ + { 69388, 0x00009067 }, /* GL_UNSIGNED_INT_IMAGE_BUFFER */ + { 69417, 0x00009068 }, /* GL_UNSIGNED_INT_IMAGE_1D_ARRAY */ + { 69448, 0x00009069 }, /* GL_UNSIGNED_INT_IMAGE_2D_ARRAY */ + { 69479, 0x0000906A }, /* GL_UNSIGNED_INT_IMAGE_CUBE_MAP_ARRAY */ + { 69516, 0x0000906B }, /* GL_UNSIGNED_INT_IMAGE_2D_MULTISAMPLE */ + { 69553, 0x0000906C }, /* GL_UNSIGNED_INT_IMAGE_2D_MULTISAMPLE_ARRAY */ + { 69596, 0x0000906D }, /* GL_MAX_IMAGE_SAMPLES */ + { 69617, 0x0000906E }, /* GL_IMAGE_BINDING_FORMAT */ + { 69641, 0x0000906F }, /* GL_RGB10_A2UI */ + { 69655, 0x00009070 }, /* GL_PATH_FORMAT_SVG_NV */ + { 69677, 0x00009071 }, /* GL_PATH_FORMAT_PS_NV */ + { 69698, 0x00009072 }, /* GL_STANDARD_FONT_NAME_NV */ + { 69723, 0x00009073 }, /* GL_SYSTEM_FONT_NAME_NV */ + { 69746, 0x00009074 }, /* GL_FILE_NAME_NV */ + { 69762, 0x00009075 }, /* GL_PATH_STROKE_WIDTH_NV */ + { 69786, 0x00009076 }, /* GL_PATH_END_CAPS_NV */ + { 69806, 0x00009077 }, /* GL_PATH_INITIAL_END_CAP_NV */ + { 69833, 0x00009078 }, /* GL_PATH_TERMINAL_END_CAP_NV */ + { 69861, 0x00009079 }, /* GL_PATH_JOIN_STYLE_NV */ + { 69883, 0x0000907A }, /* GL_PATH_MITER_LIMIT_NV */ + { 69906, 0x0000907B }, /* GL_PATH_DASH_CAPS_NV */ + { 69927, 0x0000907C }, /* GL_PATH_INITIAL_DASH_CAP_NV */ + { 69955, 0x0000907D }, /* GL_PATH_TERMINAL_DASH_CAP_NV */ + { 69984, 0x0000907E }, /* GL_PATH_DASH_OFFSET_NV */ + { 70007, 0x0000907F }, /* GL_PATH_CLIENT_LENGTH_NV */ + { 70032, 0x00009080 }, /* GL_PATH_FILL_MODE_NV */ + { 70053, 0x00009081 }, /* GL_PATH_FILL_MASK_NV */ + { 70074, 0x00009082 }, /* GL_PATH_FILL_COVER_MODE_NV */ + { 70101, 0x00009083 }, /* GL_PATH_STROKE_COVER_MODE_NV */ + { 70130, 0x00009084 }, /* GL_PATH_STROKE_MASK_NV */ + { 70153, 0x00009088 }, /* GL_COUNT_UP_NV */ + { 70168, 0x00009089 }, /* GL_COUNT_DOWN_NV */ + { 70185, 0x0000908A }, /* GL_PATH_OBJECT_BOUNDING_BOX_NV */ + { 70216, 0x0000908B }, /* GL_CONVEX_HULL_NV */ + { 70234, 0x0000908D }, /* GL_BOUNDING_BOX_NV */ + { 70253, 0x0000908E }, /* GL_TRANSLATE_X_NV */ + { 70271, 0x0000908F }, /* GL_TRANSLATE_Y_NV */ + { 70289, 0x00009090 }, /* GL_TRANSLATE_2D_NV */ + { 70308, 0x00009091 }, /* GL_TRANSLATE_3D_NV */ + { 70327, 0x00009092 }, /* GL_AFFINE_2D_NV */ + { 70343, 0x00009094 }, /* GL_AFFINE_3D_NV */ + { 70359, 0x00009096 }, /* GL_TRANSPOSE_AFFINE_2D_NV */ + { 70385, 0x00009098 }, /* GL_TRANSPOSE_AFFINE_3D_NV */ + { 70411, 0x0000909A }, /* GL_UTF8_NV */ + { 70422, 0x0000909B }, /* GL_UTF16_NV */ + { 70434, 0x0000909C }, /* GL_BOUNDING_BOX_OF_BOUNDING_BOXES_NV */ + { 70471, 0x0000909D }, /* GL_PATH_COMMAND_COUNT_NV */ + { 70496, 0x0000909E }, /* GL_PATH_COORD_COUNT_NV */ + { 70519, 0x0000909F }, /* GL_PATH_DASH_ARRAY_COUNT_NV */ + { 70547, 0x000090A0 }, /* GL_PATH_COMPUTED_LENGTH_NV */ + { 70574, 0x000090A1 }, /* GL_PATH_FILL_BOUNDING_BOX_NV */ + { 70603, 0x000090A2 }, /* GL_PATH_STROKE_BOUNDING_BOX_NV */ + { 70634, 0x000090A3 }, /* GL_SQUARE_NV */ + { 70647, 0x000090A4 }, /* GL_ROUND_NV */ + { 70659, 0x000090A5 }, /* GL_TRIANGULAR_NV */ + { 70676, 0x000090A6 }, /* GL_BEVEL_NV */ + { 70688, 0x000090A7 }, /* GL_MITER_REVERT_NV */ + { 70707, 0x000090A8 }, /* GL_MITER_TRUNCATE_NV */ + { 70728, 0x000090A9 }, /* GL_SKIP_MISSING_GLYPH_NV */ + { 70753, 0x000090AA }, /* GL_USE_MISSING_GLYPH_NV */ + { 70777, 0x000090AB }, /* GL_PATH_ERROR_POSITION_NV */ + { 70803, 0x000090AC }, /* GL_PATH_FOG_GEN_MODE_NV */ + { 70827, 0x000090AD }, /* GL_ACCUM_ADJACENT_PAIRS_NV */ + { 70854, 0x000090AE }, /* GL_ADJACENT_PAIRS_NV */ + { 70875, 0x000090AF }, /* GL_FIRST_TO_REST_NV */ + { 70895, 0x000090B0 }, /* GL_PATH_GEN_MODE_NV */ + { 70915, 0x000090B1 }, /* GL_PATH_GEN_COEFF_NV */ + { 70936, 0x000090B2 }, /* GL_PATH_GEN_COLOR_FORMAT_NV */ + { 70964, 0x000090B3 }, /* GL_PATH_GEN_COMPONENTS_NV */ + { 70990, 0x000090B4 }, /* GL_PATH_DASH_OFFSET_RESET_NV */ + { 71019, 0x000090B5 }, /* GL_MOVE_TO_RESETS_NV */ + { 71040, 0x000090B6 }, /* GL_MOVE_TO_CONTINUES_NV */ + { 71064, 0x000090B7 }, /* GL_PATH_STENCIL_FUNC_NV */ + { 71088, 0x000090B8 }, /* GL_PATH_STENCIL_REF_NV */ + { 71111, 0x000090B9 }, /* GL_PATH_STENCIL_VALUE_MASK_NV */ + { 71141, 0x000090BA }, /* GL_SCALED_RESOLVE_FASTEST_EXT */ + { 71171, 0x000090BB }, /* GL_SCALED_RESOLVE_NICEST_EXT */ + { 71200, 0x000090BC }, /* GL_MIN_MAP_BUFFER_ALIGNMENT */ + { 71228, 0x000090BD }, /* GL_PATH_STENCIL_DEPTH_OFFSET_FACTOR_NV */ + { 71267, 0x000090BE }, /* GL_PATH_STENCIL_DEPTH_OFFSET_UNITS_NV */ + { 71305, 0x000090BF }, /* GL_PATH_COVER_DEPTH_FUNC_NV */ + { 71333, 0x000090C7 }, /* GL_IMAGE_FORMAT_COMPATIBILITY_TYPE */ + { 71368, 0x000090C8 }, /* GL_IMAGE_FORMAT_COMPATIBILITY_BY_SIZE */ + { 71406, 0x000090C9 }, /* GL_IMAGE_FORMAT_COMPATIBILITY_BY_CLASS */ + { 71445, 0x000090CA }, /* GL_MAX_VERTEX_IMAGE_UNIFORMS */ + { 71474, 0x000090CB }, /* GL_MAX_TESS_CONTROL_IMAGE_UNIFORMS */ + { 71509, 0x000090CC }, /* GL_MAX_TESS_EVALUATION_IMAGE_UNIFORMS */ + { 71547, 0x000090CD }, /* GL_MAX_GEOMETRY_IMAGE_UNIFORMS */ + { 71578, 0x000090CE }, /* GL_MAX_FRAGMENT_IMAGE_UNIFORMS */ + { 71609, 0x000090CF }, /* GL_MAX_COMBINED_IMAGE_UNIFORMS */ + { 71640, 0x000090D0 }, /* GL_MAX_DEEP_3D_TEXTURE_WIDTH_HEIGHT_NV */ + { 71679, 0x000090D1 }, /* GL_MAX_DEEP_3D_TEXTURE_DEPTH_NV */ + { 71711, 0x000090D2 }, /* GL_SHADER_STORAGE_BUFFER */ + { 71736, 0x000090D3 }, /* GL_SHADER_STORAGE_BUFFER_BINDING */ + { 71769, 0x000090D4 }, /* GL_SHADER_STORAGE_BUFFER_START */ + { 71800, 0x000090D5 }, /* GL_SHADER_STORAGE_BUFFER_SIZE */ + { 71830, 0x000090D6 }, /* GL_MAX_VERTEX_SHADER_STORAGE_BLOCKS */ + { 71866, 0x000090D7 }, /* GL_MAX_GEOMETRY_SHADER_STORAGE_BLOCKS */ + { 71904, 0x000090D8 }, /* GL_MAX_TESS_CONTROL_SHADER_STORAGE_BLOCKS */ + { 71946, 0x000090D9 }, /* GL_MAX_TESS_EVALUATION_SHADER_STORAGE_BLOCKS */ + { 71991, 0x000090DA }, /* GL_MAX_FRAGMENT_SHADER_STORAGE_BLOCKS */ + { 72029, 0x000090DB }, /* GL_MAX_COMPUTE_SHADER_STORAGE_BLOCKS */ + { 72066, 0x000090DC }, /* GL_MAX_COMBINED_SHADER_STORAGE_BLOCKS */ + { 72104, 0x000090DD }, /* GL_MAX_SHADER_STORAGE_BUFFER_BINDINGS */ + { 72142, 0x000090DE }, /* GL_MAX_SHADER_STORAGE_BLOCK_SIZE */ + { 72175, 0x000090DF }, /* GL_SHADER_STORAGE_BUFFER_OFFSET_ALIGNMENT */ + { 72217, 0x000090E1 }, /* GL_SYNC_X11_FENCE_EXT */ + { 72239, 0x000090EA }, /* GL_DEPTH_STENCIL_TEXTURE_MODE */ + { 72269, 0x000090EB }, /* GL_MAX_COMPUTE_WORK_GROUP_INVOCATIONS */ + { 72307, 0x000090EC }, /* GL_UNIFORM_BLOCK_REFERENCED_BY_COMPUTE_SHADER */ + { 72353, 0x000090ED }, /* GL_ATOMIC_COUNTER_BUFFER_REFERENCED_BY_COMPUTE_SHADER */ + { 72407, 0x000090EE }, /* GL_DISPATCH_INDIRECT_BUFFER */ + { 72435, 0x000090EF }, /* GL_DISPATCH_INDIRECT_BUFFER_BINDING */ + { 72471, 0x000090F0 }, /* GL_COLOR_ATTACHMENT_EXT */ + { 72495, 0x000090F1 }, /* GL_MULTIVIEW_EXT */ + { 72512, 0x000090F2 }, /* GL_MAX_MULTIVIEW_BUFFERS_EXT */ + { 72541, 0x000090F3 }, /* GL_CONTEXT_ROBUST_ACCESS */ + { 72566, 0x000090FB }, /* GL_COMPUTE_PROGRAM_NV */ + { 72588, 0x000090FC }, /* GL_COMPUTE_PROGRAM_PARAMETER_BUFFER_NV */ + { 72627, 0x00009100 }, /* GL_TEXTURE_2D_MULTISAMPLE */ + { 72653, 0x00009101 }, /* GL_PROXY_TEXTURE_2D_MULTISAMPLE */ + { 72685, 0x00009102 }, /* GL_TEXTURE_2D_MULTISAMPLE_ARRAY */ + { 72717, 0x00009103 }, /* GL_PROXY_TEXTURE_2D_MULTISAMPLE_ARRAY */ + { 72755, 0x00009104 }, /* GL_TEXTURE_BINDING_2D_MULTISAMPLE */ + { 72789, 0x00009105 }, /* GL_TEXTURE_BINDING_2D_MULTISAMPLE_ARRAY */ + { 72829, 0x00009106 }, /* GL_TEXTURE_SAMPLES */ + { 72848, 0x00009107 }, /* GL_TEXTURE_FIXED_SAMPLE_LOCATIONS */ + { 72882, 0x00009108 }, /* GL_SAMPLER_2D_MULTISAMPLE */ + { 72908, 0x00009109 }, /* GL_INT_SAMPLER_2D_MULTISAMPLE */ + { 72938, 0x0000910A }, /* GL_UNSIGNED_INT_SAMPLER_2D_MULTISAMPLE */ + { 72977, 0x0000910B }, /* GL_SAMPLER_2D_MULTISAMPLE_ARRAY */ + { 73009, 0x0000910C }, /* GL_INT_SAMPLER_2D_MULTISAMPLE_ARRAY */ + { 73045, 0x0000910D }, /* GL_UNSIGNED_INT_SAMPLER_2D_MULTISAMPLE_ARRAY */ + { 73090, 0x0000910E }, /* GL_MAX_COLOR_TEXTURE_SAMPLES */ + { 73119, 0x0000910F }, /* GL_MAX_DEPTH_TEXTURE_SAMPLES */ + { 73148, 0x00009110 }, /* GL_MAX_INTEGER_SAMPLES */ + { 73171, 0x00009111 }, /* GL_MAX_SERVER_WAIT_TIMEOUT */ + { 73198, 0x00009112 }, /* GL_OBJECT_TYPE */ + { 73213, 0x00009113 }, /* GL_SYNC_CONDITION */ + { 73231, 0x00009114 }, /* GL_SYNC_STATUS */ + { 73246, 0x00009115 }, /* GL_SYNC_FLAGS */ + { 73260, 0x00009116 }, /* GL_SYNC_FENCE */ + { 73274, 0x00009117 }, /* GL_SYNC_GPU_COMMANDS_COMPLETE */ + { 73304, 0x00009118 }, /* GL_UNSIGNALED */ + { 73318, 0x00009119 }, /* GL_SIGNALED */ + { 73330, 0x0000911A }, /* GL_ALREADY_SIGNALED */ + { 73350, 0x0000911B }, /* GL_TIMEOUT_EXPIRED */ + { 73369, 0x0000911C }, /* GL_CONDITION_SATISFIED */ + { 73392, 0x0000911D }, /* GL_WAIT_FAILED */ + { 73407, 0x0000911F }, /* GL_BUFFER_ACCESS_FLAGS */ + { 73430, 0x00009120 }, /* GL_BUFFER_MAP_LENGTH */ + { 73451, 0x00009121 }, /* GL_BUFFER_MAP_OFFSET */ + { 73472, 0x00009122 }, /* GL_MAX_VERTEX_OUTPUT_COMPONENTS */ + { 73504, 0x00009123 }, /* GL_MAX_GEOMETRY_INPUT_COMPONENTS */ + { 73537, 0x00009124 }, /* GL_MAX_GEOMETRY_OUTPUT_COMPONENTS */ + { 73571, 0x00009125 }, /* GL_MAX_FRAGMENT_INPUT_COMPONENTS */ + { 73604, 0x00009126 }, /* GL_CONTEXT_PROFILE_MASK */ + { 73628, 0x00009127 }, /* GL_UNPACK_COMPRESSED_BLOCK_WIDTH */ + { 73661, 0x00009128 }, /* GL_UNPACK_COMPRESSED_BLOCK_HEIGHT */ + { 73695, 0x00009129 }, /* GL_UNPACK_COMPRESSED_BLOCK_DEPTH */ + { 73728, 0x0000912A }, /* GL_UNPACK_COMPRESSED_BLOCK_SIZE */ + { 73760, 0x0000912B }, /* GL_PACK_COMPRESSED_BLOCK_WIDTH */ + { 73791, 0x0000912C }, /* GL_PACK_COMPRESSED_BLOCK_HEIGHT */ + { 73823, 0x0000912D }, /* GL_PACK_COMPRESSED_BLOCK_DEPTH */ + { 73854, 0x0000912E }, /* GL_PACK_COMPRESSED_BLOCK_SIZE */ + { 73884, 0x0000912F }, /* GL_TEXTURE_IMMUTABLE_FORMAT */ + { 73912, 0x00009130 }, /* GL_SGX_PROGRAM_BINARY_IMG */ + { 73938, 0x00009133 }, /* GL_RENDERBUFFER_SAMPLES_IMG */ + { 73966, 0x00009134 }, /* GL_FRAMEBUFFER_INCOMPLETE_MULTISAMPLE_IMG */ + { 74008, 0x00009135 }, /* GL_MAX_SAMPLES_IMG */ + { 74027, 0x00009136 }, /* GL_TEXTURE_SAMPLES_IMG */ + { 74050, 0x00009137 }, /* GL_COMPRESSED_RGBA_PVRTC_2BPPV2_IMG */ + { 74086, 0x00009138 }, /* GL_COMPRESSED_RGBA_PVRTC_4BPPV2_IMG */ + { 74122, 0x00009139 }, /* GL_CUBIC_IMG */ + { 74135, 0x0000913A }, /* GL_CUBIC_MIPMAP_NEAREST_IMG */ + { 74163, 0x0000913B }, /* GL_CUBIC_MIPMAP_LINEAR_IMG */ + { 74190, 0x0000913C }, /* GL_FRAMEBUFFER_INCOMPLETE_MULTISAMPLE_AND_DOWNSAMPLE_IMG */ + { 74247, 0x0000913D }, /* GL_NUM_DOWNSAMPLE_SCALES_IMG */ + { 74276, 0x0000913E }, /* GL_DOWNSAMPLE_SCALES_IMG */ + { 74301, 0x0000913F }, /* GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_SCALE_IMG */ + { 74345, 0x00009143 }, /* GL_MAX_DEBUG_MESSAGE_LENGTH */ + { 74373, 0x00009144 }, /* GL_MAX_DEBUG_LOGGED_MESSAGES */ + { 74402, 0x00009145 }, /* GL_DEBUG_LOGGED_MESSAGES */ + { 74427, 0x00009146 }, /* GL_DEBUG_SEVERITY_HIGH */ + { 74450, 0x00009147 }, /* GL_DEBUG_SEVERITY_MEDIUM */ + { 74475, 0x00009148 }, /* GL_DEBUG_SEVERITY_LOW */ + { 74497, 0x00009149 }, /* GL_DEBUG_CATEGORY_API_ERROR_AMD */ + { 74529, 0x0000914A }, /* GL_DEBUG_CATEGORY_WINDOW_SYSTEM_AMD */ + { 74565, 0x0000914B }, /* GL_DEBUG_CATEGORY_DEPRECATION_AMD */ + { 74599, 0x0000914C }, /* GL_DEBUG_CATEGORY_UNDEFINED_BEHAVIOR_AMD */ + { 74640, 0x0000914D }, /* GL_DEBUG_CATEGORY_PERFORMANCE_AMD */ + { 74674, 0x0000914E }, /* GL_DEBUG_CATEGORY_SHADER_COMPILER_AMD */ + { 74712, 0x0000914F }, /* GL_DEBUG_CATEGORY_APPLICATION_AMD */ + { 74746, 0x00009150 }, /* GL_DEBUG_CATEGORY_OTHER_AMD */ + { 74774, 0x00009151 }, /* GL_BUFFER_OBJECT_EXT */ + { 74795, 0x00009152 }, /* GL_PERFORMANCE_MONITOR_AMD */ + { 74822, 0x00009153 }, /* GL_QUERY_OBJECT_EXT */ + { 74842, 0x00009154 }, /* GL_VERTEX_ARRAY_OBJECT_EXT */ + { 74869, 0x00009155 }, /* GL_SAMPLER_OBJECT_AMD */ + { 74891, 0x00009160 }, /* GL_EXTERNAL_VIRTUAL_MEMORY_BUFFER_AMD */ + { 74929, 0x00009192 }, /* GL_QUERY_BUFFER */ + { 74945, 0x00009193 }, /* GL_QUERY_BUFFER_BINDING */ + { 74969, 0x00009194 }, /* GL_QUERY_RESULT_NO_WAIT */ + { 74993, 0x00009195 }, /* GL_VIRTUAL_PAGE_SIZE_X_ARB */ + { 75020, 0x00009196 }, /* GL_VIRTUAL_PAGE_SIZE_Y_ARB */ + { 75047, 0x00009197 }, /* GL_VIRTUAL_PAGE_SIZE_Z_ARB */ + { 75074, 0x00009198 }, /* GL_MAX_SPARSE_TEXTURE_SIZE_ARB */ + { 75105, 0x00009199 }, /* GL_MAX_SPARSE_3D_TEXTURE_SIZE_ARB */ + { 75139, 0x0000919A }, /* GL_MAX_SPARSE_ARRAY_TEXTURE_LAYERS_ARB */ + { 75178, 0x0000919B }, /* GL_MIN_SPARSE_LEVEL_AMD */ + { 75202, 0x0000919C }, /* GL_MIN_LOD_WARNING_AMD */ + { 75225, 0x0000919D }, /* GL_TEXTURE_BUFFER_OFFSET */ + { 75250, 0x0000919E }, /* GL_TEXTURE_BUFFER_SIZE */ + { 75273, 0x0000919F }, /* GL_TEXTURE_BUFFER_OFFSET_ALIGNMENT */ + { 75308, 0x000091A0 }, /* GL_STREAM_RASTERIZATION_AMD */ + { 75336, 0x000091A4 }, /* GL_VERTEX_ELEMENT_SWIZZLE_AMD */ + { 75366, 0x000091A5 }, /* GL_VERTEX_ID_SWIZZLE_AMD */ + { 75391, 0x000091A6 }, /* GL_TEXTURE_SPARSE_ARB */ + { 75413, 0x000091A7 }, /* GL_VIRTUAL_PAGE_SIZE_INDEX_ARB */ + { 75444, 0x000091A8 }, /* GL_NUM_VIRTUAL_PAGE_SIZES_ARB */ + { 75474, 0x000091A9 }, /* GL_SPARSE_TEXTURE_FULL_ARRAY_CUBE_MIPMAPS_ARB */ + { 75520, 0x000091AA }, /* GL_NUM_SPARSE_LEVELS_ARB */ + { 75545, 0x000091B0 }, /* GL_MAX_SHADER_COMPILER_THREADS_ARB */ + { 75580, 0x000091B1 }, /* GL_COMPLETION_STATUS_ARB */ + { 75605, 0x000091B9 }, /* GL_COMPUTE_SHADER */ + { 75623, 0x000091BB }, /* GL_MAX_COMPUTE_UNIFORM_BLOCKS */ + { 75653, 0x000091BC }, /* GL_MAX_COMPUTE_TEXTURE_IMAGE_UNITS */ + { 75688, 0x000091BD }, /* GL_MAX_COMPUTE_IMAGE_UNIFORMS */ + { 75718, 0x000091BE }, /* GL_MAX_COMPUTE_WORK_GROUP_COUNT */ + { 75750, 0x000091BF }, /* GL_MAX_COMPUTE_WORK_GROUP_SIZE */ + { 75781, 0x00009250 }, /* GL_SHADER_BINARY_DMP */ + { 75802, 0x00009251 }, /* GL_SMAPHS30_PROGRAM_BINARY_DMP */ + { 75833, 0x00009252 }, /* GL_SMAPHS_PROGRAM_BINARY_DMP */ + { 75862, 0x00009253 }, /* GL_DMP_PROGRAM_BINARY_DMP */ + { 75888, 0x00009260 }, /* GL_GCCSO_SHADER_BINARY_FJ */ + { 75914, 0x00009270 }, /* GL_COMPRESSED_R11_EAC */ + { 75936, 0x00009271 }, /* GL_COMPRESSED_SIGNED_R11_EAC */ + { 75965, 0x00009272 }, /* GL_COMPRESSED_RG11_EAC */ + { 75988, 0x00009273 }, /* GL_COMPRESSED_SIGNED_RG11_EAC */ + { 76018, 0x00009274 }, /* GL_COMPRESSED_RGB8_ETC2 */ + { 76042, 0x00009275 }, /* GL_COMPRESSED_SRGB8_ETC2 */ + { 76067, 0x00009276 }, /* GL_COMPRESSED_RGB8_PUNCHTHROUGH_ALPHA1_ETC2 */ + { 76111, 0x00009277 }, /* GL_COMPRESSED_SRGB8_PUNCHTHROUGH_ALPHA1_ETC2 */ + { 76156, 0x00009278 }, /* GL_COMPRESSED_RGBA8_ETC2_EAC */ + { 76185, 0x00009279 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ETC2_EAC */ + { 76221, 0x00009280 }, /* GL_BLEND_PREMULTIPLIED_SRC_NV */ + { 76251, 0x00009281 }, /* GL_BLEND_OVERLAP_NV */ + { 76271, 0x00009282 }, /* GL_UNCORRELATED_NV */ + { 76290, 0x00009283 }, /* GL_DISJOINT_NV */ + { 76305, 0x00009284 }, /* GL_CONJOINT_NV */ + { 76320, 0x00009285 }, /* GL_BLEND_ADVANCED_COHERENT_KHR */ + { 76351, 0x00009286 }, /* GL_SRC_NV */ + { 76361, 0x00009287 }, /* GL_DST_NV */ + { 76371, 0x00009288 }, /* GL_SRC_OVER_NV */ + { 76386, 0x00009289 }, /* GL_DST_OVER_NV */ + { 76401, 0x0000928A }, /* GL_SRC_IN_NV */ + { 76414, 0x0000928B }, /* GL_DST_IN_NV */ + { 76427, 0x0000928C }, /* GL_SRC_OUT_NV */ + { 76441, 0x0000928D }, /* GL_DST_OUT_NV */ + { 76455, 0x0000928E }, /* GL_SRC_ATOP_NV */ + { 76470, 0x0000928F }, /* GL_DST_ATOP_NV */ + { 76485, 0x00009291 }, /* GL_PLUS_NV */ + { 76496, 0x00009292 }, /* GL_PLUS_DARKER_NV */ + { 76514, 0x00009294 }, /* GL_MULTIPLY */ + { 76526, 0x00009295 }, /* GL_SCREEN */ + { 76536, 0x00009296 }, /* GL_OVERLAY */ + { 76547, 0x00009297 }, /* GL_DARKEN */ + { 76557, 0x00009298 }, /* GL_LIGHTEN */ + { 76568, 0x00009299 }, /* GL_COLORDODGE */ + { 76582, 0x0000929A }, /* GL_COLORBURN */ + { 76595, 0x0000929B }, /* GL_HARDLIGHT */ + { 76608, 0x0000929C }, /* GL_SOFTLIGHT */ + { 76621, 0x0000929E }, /* GL_DIFFERENCE */ + { 76635, 0x0000929F }, /* GL_MINUS_NV */ + { 76647, 0x000092A0 }, /* GL_EXCLUSION */ + { 76660, 0x000092A1 }, /* GL_CONTRAST_NV */ + { 76675, 0x000092A3 }, /* GL_INVERT_RGB_NV */ + { 76692, 0x000092A4 }, /* GL_LINEARDODGE_NV */ + { 76710, 0x000092A5 }, /* GL_LINEARBURN_NV */ + { 76727, 0x000092A6 }, /* GL_VIVIDLIGHT_NV */ + { 76744, 0x000092A7 }, /* GL_LINEARLIGHT_NV */ + { 76762, 0x000092A8 }, /* GL_PINLIGHT_NV */ + { 76777, 0x000092A9 }, /* GL_HARDMIX_NV */ + { 76791, 0x000092AD }, /* GL_HSL_HUE */ + { 76802, 0x000092AE }, /* GL_HSL_SATURATION */ + { 76820, 0x000092AF }, /* GL_HSL_COLOR */ + { 76833, 0x000092B0 }, /* GL_HSL_LUMINOSITY */ + { 76851, 0x000092B1 }, /* GL_PLUS_CLAMPED_NV */ + { 76870, 0x000092B2 }, /* GL_PLUS_CLAMPED_ALPHA_NV */ + { 76895, 0x000092B3 }, /* GL_MINUS_CLAMPED_NV */ + { 76915, 0x000092B4 }, /* GL_INVERT_OVG_NV */ + { 76932, 0x000092BB }, /* GL_PURGED_CONTEXT_RESET_NV */ + { 76959, 0x000092BE }, /* GL_PRIMITIVE_BOUNDING_BOX */ + { 76985, 0x000092C0 }, /* GL_ATOMIC_COUNTER_BUFFER */ + { 77010, 0x000092C1 }, /* GL_ATOMIC_COUNTER_BUFFER_BINDING */ + { 77043, 0x000092C2 }, /* GL_ATOMIC_COUNTER_BUFFER_START */ + { 77074, 0x000092C3 }, /* GL_ATOMIC_COUNTER_BUFFER_SIZE */ + { 77104, 0x000092C4 }, /* GL_ATOMIC_COUNTER_BUFFER_DATA_SIZE */ + { 77139, 0x000092C5 }, /* GL_ATOMIC_COUNTER_BUFFER_ACTIVE_ATOMIC_COUNTERS */ + { 77187, 0x000092C6 }, /* GL_ATOMIC_COUNTER_BUFFER_ACTIVE_ATOMIC_COUNTER_INDICES */ + { 77242, 0x000092C7 }, /* GL_ATOMIC_COUNTER_BUFFER_REFERENCED_BY_VERTEX_SHADER */ + { 77295, 0x000092C8 }, /* GL_ATOMIC_COUNTER_BUFFER_REFERENCED_BY_TESS_CONTROL_SHADER */ + { 77354, 0x000092C9 }, /* GL_ATOMIC_COUNTER_BUFFER_REFERENCED_BY_TESS_EVALUATION_SHADER */ + { 77416, 0x000092CA }, /* GL_ATOMIC_COUNTER_BUFFER_REFERENCED_BY_GEOMETRY_SHADER */ + { 77471, 0x000092CB }, /* GL_ATOMIC_COUNTER_BUFFER_REFERENCED_BY_FRAGMENT_SHADER */ + { 77526, 0x000092CC }, /* GL_MAX_VERTEX_ATOMIC_COUNTER_BUFFERS */ + { 77563, 0x000092CD }, /* GL_MAX_TESS_CONTROL_ATOMIC_COUNTER_BUFFERS */ + { 77606, 0x000092CE }, /* GL_MAX_TESS_EVALUATION_ATOMIC_COUNTER_BUFFERS */ + { 77652, 0x000092CF }, /* GL_MAX_GEOMETRY_ATOMIC_COUNTER_BUFFERS */ + { 77691, 0x000092D0 }, /* GL_MAX_FRAGMENT_ATOMIC_COUNTER_BUFFERS */ + { 77730, 0x000092D1 }, /* GL_MAX_COMBINED_ATOMIC_COUNTER_BUFFERS */ + { 77769, 0x000092D2 }, /* GL_MAX_VERTEX_ATOMIC_COUNTERS */ + { 77799, 0x000092D3 }, /* GL_MAX_TESS_CONTROL_ATOMIC_COUNTERS */ + { 77835, 0x000092D4 }, /* GL_MAX_TESS_EVALUATION_ATOMIC_COUNTERS */ + { 77874, 0x000092D5 }, /* GL_MAX_GEOMETRY_ATOMIC_COUNTERS */ + { 77906, 0x000092D6 }, /* GL_MAX_FRAGMENT_ATOMIC_COUNTERS */ + { 77938, 0x000092D7 }, /* GL_MAX_COMBINED_ATOMIC_COUNTERS */ + { 77970, 0x000092D8 }, /* GL_MAX_ATOMIC_COUNTER_BUFFER_SIZE */ + { 78004, 0x000092D9 }, /* GL_ACTIVE_ATOMIC_COUNTER_BUFFERS */ + { 78037, 0x000092DA }, /* GL_UNIFORM_ATOMIC_COUNTER_BUFFER_INDEX */ + { 78076, 0x000092DB }, /* GL_UNSIGNED_INT_ATOMIC_COUNTER */ + { 78107, 0x000092DC }, /* GL_MAX_ATOMIC_COUNTER_BUFFER_BINDINGS */ + { 78145, 0x000092DD }, /* GL_FRAGMENT_COVERAGE_TO_COLOR_NV */ + { 78178, 0x000092DE }, /* GL_FRAGMENT_COVERAGE_COLOR_NV */ + { 78208, 0x000092E0 }, /* GL_DEBUG_OUTPUT */ + { 78224, 0x000092E1 }, /* GL_UNIFORM */ + { 78235, 0x000092E2 }, /* GL_UNIFORM_BLOCK */ + { 78252, 0x000092E3 }, /* GL_PROGRAM_INPUT */ + { 78269, 0x000092E4 }, /* GL_PROGRAM_OUTPUT */ + { 78287, 0x000092E5 }, /* GL_BUFFER_VARIABLE */ + { 78306, 0x000092E6 }, /* GL_SHADER_STORAGE_BLOCK */ + { 78330, 0x000092E7 }, /* GL_IS_PER_PATCH */ + { 78346, 0x000092E8 }, /* GL_VERTEX_SUBROUTINE */ + { 78367, 0x000092E9 }, /* GL_TESS_CONTROL_SUBROUTINE */ + { 78394, 0x000092EA }, /* GL_TESS_EVALUATION_SUBROUTINE */ + { 78424, 0x000092EB }, /* GL_GEOMETRY_SUBROUTINE */ + { 78447, 0x000092EC }, /* GL_FRAGMENT_SUBROUTINE */ + { 78470, 0x000092ED }, /* GL_COMPUTE_SUBROUTINE */ + { 78492, 0x000092EE }, /* GL_VERTEX_SUBROUTINE_UNIFORM */ + { 78521, 0x000092EF }, /* GL_TESS_CONTROL_SUBROUTINE_UNIFORM */ + { 78556, 0x000092F0 }, /* GL_TESS_EVALUATION_SUBROUTINE_UNIFORM */ + { 78594, 0x000092F1 }, /* GL_GEOMETRY_SUBROUTINE_UNIFORM */ + { 78625, 0x000092F2 }, /* GL_FRAGMENT_SUBROUTINE_UNIFORM */ + { 78656, 0x000092F3 }, /* GL_COMPUTE_SUBROUTINE_UNIFORM */ + { 78686, 0x000092F4 }, /* GL_TRANSFORM_FEEDBACK_VARYING */ + { 78716, 0x000092F5 }, /* GL_ACTIVE_RESOURCES */ + { 78736, 0x000092F6 }, /* GL_MAX_NAME_LENGTH */ + { 78755, 0x000092F7 }, /* GL_MAX_NUM_ACTIVE_VARIABLES */ + { 78783, 0x000092F8 }, /* GL_MAX_NUM_COMPATIBLE_SUBROUTINES */ + { 78817, 0x000092F9 }, /* GL_NAME_LENGTH */ + { 78832, 0x000092FA }, /* GL_TYPE */ + { 78840, 0x000092FB }, /* GL_ARRAY_SIZE */ + { 78854, 0x000092FC }, /* GL_OFFSET */ + { 78864, 0x000092FD }, /* GL_BLOCK_INDEX */ + { 78879, 0x000092FE }, /* GL_ARRAY_STRIDE */ + { 78895, 0x000092FF }, /* GL_MATRIX_STRIDE */ + { 78912, 0x00009300 }, /* GL_IS_ROW_MAJOR */ + { 78928, 0x00009301 }, /* GL_ATOMIC_COUNTER_BUFFER_INDEX */ + { 78959, 0x00009302 }, /* GL_BUFFER_BINDING */ + { 78977, 0x00009303 }, /* GL_BUFFER_DATA_SIZE */ + { 78997, 0x00009304 }, /* GL_NUM_ACTIVE_VARIABLES */ + { 79021, 0x00009305 }, /* GL_ACTIVE_VARIABLES */ + { 79041, 0x00009306 }, /* GL_REFERENCED_BY_VERTEX_SHADER */ + { 79072, 0x00009307 }, /* GL_REFERENCED_BY_TESS_CONTROL_SHADER */ + { 79109, 0x00009308 }, /* GL_REFERENCED_BY_TESS_EVALUATION_SHADER */ + { 79149, 0x00009309 }, /* GL_REFERENCED_BY_GEOMETRY_SHADER */ + { 79182, 0x0000930A }, /* GL_REFERENCED_BY_FRAGMENT_SHADER */ + { 79215, 0x0000930B }, /* GL_REFERENCED_BY_COMPUTE_SHADER */ + { 79247, 0x0000930C }, /* GL_TOP_LEVEL_ARRAY_SIZE */ + { 79271, 0x0000930D }, /* GL_TOP_LEVEL_ARRAY_STRIDE */ + { 79297, 0x0000930E }, /* GL_LOCATION */ + { 79309, 0x0000930F }, /* GL_LOCATION_INDEX */ + { 79327, 0x00009310 }, /* GL_FRAMEBUFFER_DEFAULT_WIDTH */ + { 79356, 0x00009311 }, /* GL_FRAMEBUFFER_DEFAULT_HEIGHT */ + { 79386, 0x00009312 }, /* GL_FRAMEBUFFER_DEFAULT_LAYERS */ + { 79416, 0x00009313 }, /* GL_FRAMEBUFFER_DEFAULT_SAMPLES */ + { 79447, 0x00009314 }, /* GL_FRAMEBUFFER_DEFAULT_FIXED_SAMPLE_LOCATIONS */ + { 79493, 0x00009315 }, /* GL_MAX_FRAMEBUFFER_WIDTH */ + { 79518, 0x00009316 }, /* GL_MAX_FRAMEBUFFER_HEIGHT */ + { 79544, 0x00009317 }, /* GL_MAX_FRAMEBUFFER_LAYERS */ + { 79570, 0x00009318 }, /* GL_MAX_FRAMEBUFFER_SAMPLES */ + { 79597, 0x00009327 }, /* GL_RASTER_MULTISAMPLE_EXT */ + { 79623, 0x00009328 }, /* GL_RASTER_SAMPLES_EXT */ + { 79645, 0x00009329 }, /* GL_MAX_RASTER_SAMPLES_EXT */ + { 79671, 0x0000932A }, /* GL_RASTER_FIXED_SAMPLE_LOCATIONS_EXT */ + { 79708, 0x0000932B }, /* GL_MULTISAMPLE_RASTERIZATION_ALLOWED_EXT */ + { 79749, 0x0000932C }, /* GL_EFFECTIVE_RASTER_SAMPLES_EXT */ + { 79781, 0x0000932D }, /* GL_DEPTH_SAMPLES_NV */ + { 79801, 0x0000932E }, /* GL_STENCIL_SAMPLES_NV */ + { 79823, 0x0000932F }, /* GL_MIXED_DEPTH_SAMPLES_SUPPORTED_NV */ + { 79859, 0x00009330 }, /* GL_MIXED_STENCIL_SAMPLES_SUPPORTED_NV */ + { 79897, 0x00009331 }, /* GL_COVERAGE_MODULATION_TABLE_NV */ + { 79929, 0x00009332 }, /* GL_COVERAGE_MODULATION_NV */ + { 79955, 0x00009333 }, /* GL_COVERAGE_MODULATION_TABLE_SIZE_NV */ + { 79992, 0x00009339 }, /* GL_WARP_SIZE_NV */ + { 80008, 0x0000933A }, /* GL_WARPS_PER_SM_NV */ + { 80027, 0x0000933B }, /* GL_SM_COUNT_NV */ + { 80042, 0x0000933C }, /* GL_FILL_RECTANGLE_NV */ + { 80063, 0x0000933D }, /* GL_SAMPLE_LOCATION_SUBPIXEL_BITS_ARB */ + { 80100, 0x0000933E }, /* GL_SAMPLE_LOCATION_PIXEL_GRID_WIDTH_ARB */ + { 80140, 0x0000933F }, /* GL_SAMPLE_LOCATION_PIXEL_GRID_HEIGHT_ARB */ + { 80181, 0x00009340 }, /* GL_PROGRAMMABLE_SAMPLE_LOCATION_TABLE_SIZE_ARB */ + { 80228, 0x00009341 }, /* GL_PROGRAMMABLE_SAMPLE_LOCATION_ARB */ + { 80264, 0x00009342 }, /* GL_FRAMEBUFFER_PROGRAMMABLE_SAMPLE_LOCATIONS_ARB */ + { 80313, 0x00009343 }, /* GL_FRAMEBUFFER_SAMPLE_LOCATION_PIXEL_GRID_ARB */ + { 80359, 0x00009344 }, /* GL_MAX_COMPUTE_VARIABLE_GROUP_INVOCATIONS_ARB */ + { 80405, 0x00009345 }, /* GL_MAX_COMPUTE_VARIABLE_GROUP_SIZE_ARB */ + { 80444, 0x00009346 }, /* GL_CONSERVATIVE_RASTERIZATION_NV */ + { 80477, 0x00009347 }, /* GL_SUBPIXEL_PRECISION_BIAS_X_BITS_NV */ + { 80514, 0x00009348 }, /* GL_SUBPIXEL_PRECISION_BIAS_Y_BITS_NV */ + { 80551, 0x00009349 }, /* GL_MAX_SUBPIXEL_PRECISION_BIAS_BITS_NV */ + { 80590, 0x0000934A }, /* GL_LOCATION_COMPONENT */ + { 80612, 0x0000934B }, /* GL_TRANSFORM_FEEDBACK_BUFFER_INDEX */ + { 80647, 0x0000934C }, /* GL_TRANSFORM_FEEDBACK_BUFFER_STRIDE */ + { 80683, 0x00009350 }, /* GL_VIEWPORT_SWIZZLE_POSITIVE_X_NV */ + { 80717, 0x00009351 }, /* GL_VIEWPORT_SWIZZLE_NEGATIVE_X_NV */ + { 80751, 0x00009352 }, /* GL_VIEWPORT_SWIZZLE_POSITIVE_Y_NV */ + { 80785, 0x00009353 }, /* GL_VIEWPORT_SWIZZLE_NEGATIVE_Y_NV */ + { 80819, 0x00009354 }, /* GL_VIEWPORT_SWIZZLE_POSITIVE_Z_NV */ + { 80853, 0x00009355 }, /* GL_VIEWPORT_SWIZZLE_NEGATIVE_Z_NV */ + { 80887, 0x00009356 }, /* GL_VIEWPORT_SWIZZLE_POSITIVE_W_NV */ + { 80921, 0x00009357 }, /* GL_VIEWPORT_SWIZZLE_NEGATIVE_W_NV */ + { 80955, 0x00009358 }, /* GL_VIEWPORT_SWIZZLE_X_NV */ + { 80980, 0x00009359 }, /* GL_VIEWPORT_SWIZZLE_Y_NV */ + { 81005, 0x0000935A }, /* GL_VIEWPORT_SWIZZLE_Z_NV */ + { 81030, 0x0000935B }, /* GL_VIEWPORT_SWIZZLE_W_NV */ + { 81055, 0x0000935C }, /* GL_CLIP_ORIGIN */ + { 81070, 0x0000935D }, /* GL_CLIP_DEPTH_MODE */ + { 81089, 0x0000935E }, /* GL_NEGATIVE_ONE_TO_ONE */ + { 81112, 0x0000935F }, /* GL_ZERO_TO_ONE */ + { 81127, 0x00009365 }, /* GL_CLEAR_TEXTURE */ + { 81144, 0x00009366 }, /* GL_TEXTURE_REDUCTION_MODE_ARB */ + { 81174, 0x00009367 }, /* GL_WEIGHTED_AVERAGE_ARB */ + { 81198, 0x00009368 }, /* GL_FONT_GLYPHS_AVAILABLE_NV */ + { 81226, 0x00009369 }, /* GL_FONT_TARGET_UNAVAILABLE_NV */ + { 81256, 0x0000936A }, /* GL_FONT_UNAVAILABLE_NV */ + { 81279, 0x0000936B }, /* GL_FONT_UNINTELLIGIBLE_NV */ + { 81305, 0x0000936C }, /* GL_STANDARD_FONT_FORMAT_NV */ + { 81332, 0x0000936D }, /* GL_FRAGMENT_INPUT_NV */ + { 81353, 0x0000936E }, /* GL_UNIFORM_BUFFER_UNIFIED_NV */ + { 81382, 0x0000936F }, /* GL_UNIFORM_BUFFER_ADDRESS_NV */ + { 81411, 0x00009370 }, /* GL_UNIFORM_BUFFER_LENGTH_NV */ + { 81439, 0x00009371 }, /* GL_MULTISAMPLES_NV */ + { 81458, 0x00009372 }, /* GL_SUPERSAMPLE_SCALE_X_NV */ + { 81484, 0x00009373 }, /* GL_SUPERSAMPLE_SCALE_Y_NV */ + { 81510, 0x00009374 }, /* GL_CONFORMANT_NV */ + { 81527, 0x00009379 }, /* GL_CONSERVATIVE_RASTER_DILATE_NV */ + { 81560, 0x0000937A }, /* GL_CONSERVATIVE_RASTER_DILATE_RANGE_NV */ + { 81599, 0x0000937B }, /* GL_CONSERVATIVE_RASTER_DILATE_GRANULARITY_NV */ + { 81644, 0x0000937C }, /* GL_VIEWPORT_POSITION_W_SCALE_NV */ + { 81676, 0x0000937D }, /* GL_VIEWPORT_POSITION_W_SCALE_X_COEFF_NV */ + { 81716, 0x0000937E }, /* GL_VIEWPORT_POSITION_W_SCALE_Y_COEFF_NV */ + { 81756, 0x00009380 }, /* GL_NUM_SAMPLE_COUNTS */ + { 81777, 0x00009381 }, /* GL_MULTISAMPLE_LINE_WIDTH_RANGE */ + { 81809, 0x00009382 }, /* GL_MULTISAMPLE_LINE_WIDTH_GRANULARITY */ + { 81847, 0x000093A0 }, /* GL_TRANSLATED_SHADER_SOURCE_LENGTH_ANGLE */ + { 81888, 0x000093A1 }, /* GL_BGRA8_EXT */ + { 81901, 0x000093A2 }, /* GL_TEXTURE_USAGE_ANGLE */ + { 81924, 0x000093A3 }, /* GL_FRAMEBUFFER_ATTACHMENT_ANGLE */ + { 81956, 0x000093A4 }, /* GL_PACK_REVERSE_ROW_ORDER_ANGLE */ + { 81988, 0x000093A6 }, /* GL_PROGRAM_BINARY_ANGLE */ + { 82012, 0x000093B0 }, /* GL_COMPRESSED_RGBA_ASTC_4x4 */ + { 82040, 0x000093B1 }, /* GL_COMPRESSED_RGBA_ASTC_5x4 */ + { 82068, 0x000093B2 }, /* GL_COMPRESSED_RGBA_ASTC_5x5 */ + { 82096, 0x000093B3 }, /* GL_COMPRESSED_RGBA_ASTC_6x5 */ + { 82124, 0x000093B4 }, /* GL_COMPRESSED_RGBA_ASTC_6x6 */ + { 82152, 0x000093B5 }, /* GL_COMPRESSED_RGBA_ASTC_8x5 */ + { 82180, 0x000093B6 }, /* GL_COMPRESSED_RGBA_ASTC_8x6 */ + { 82208, 0x000093B7 }, /* GL_COMPRESSED_RGBA_ASTC_8x8 */ + { 82236, 0x000093B8 }, /* GL_COMPRESSED_RGBA_ASTC_10x5 */ + { 82265, 0x000093B9 }, /* GL_COMPRESSED_RGBA_ASTC_10x6 */ + { 82294, 0x000093BA }, /* GL_COMPRESSED_RGBA_ASTC_10x8 */ + { 82323, 0x000093BB }, /* GL_COMPRESSED_RGBA_ASTC_10x10 */ + { 82353, 0x000093BC }, /* GL_COMPRESSED_RGBA_ASTC_12x10 */ + { 82383, 0x000093BD }, /* GL_COMPRESSED_RGBA_ASTC_12x12 */ + { 82413, 0x000093C0 }, /* GL_COMPRESSED_RGBA_ASTC_3x3x3_OES */ + { 82447, 0x000093C1 }, /* GL_COMPRESSED_RGBA_ASTC_4x3x3_OES */ + { 82481, 0x000093C2 }, /* GL_COMPRESSED_RGBA_ASTC_4x4x3_OES */ + { 82515, 0x000093C3 }, /* GL_COMPRESSED_RGBA_ASTC_4x4x4_OES */ + { 82549, 0x000093C4 }, /* GL_COMPRESSED_RGBA_ASTC_5x4x4_OES */ + { 82583, 0x000093C5 }, /* GL_COMPRESSED_RGBA_ASTC_5x5x4_OES */ + { 82617, 0x000093C6 }, /* GL_COMPRESSED_RGBA_ASTC_5x5x5_OES */ + { 82651, 0x000093C7 }, /* GL_COMPRESSED_RGBA_ASTC_6x5x5_OES */ + { 82685, 0x000093C8 }, /* GL_COMPRESSED_RGBA_ASTC_6x6x5_OES */ + { 82719, 0x000093C9 }, /* GL_COMPRESSED_RGBA_ASTC_6x6x6_OES */ + { 82753, 0x000093D0 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4 */ + { 82789, 0x000093D1 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4 */ + { 82825, 0x000093D2 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5 */ + { 82861, 0x000093D3 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5 */ + { 82897, 0x000093D4 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6 */ + { 82933, 0x000093D5 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5 */ + { 82969, 0x000093D6 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6 */ + { 83005, 0x000093D7 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8 */ + { 83041, 0x000093D8 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5 */ + { 83078, 0x000093D9 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6 */ + { 83115, 0x000093DA }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8 */ + { 83152, 0x000093DB }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10 */ + { 83190, 0x000093DC }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10 */ + { 83228, 0x000093DD }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12 */ + { 83266, 0x000093E0 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_3x3x3_OES */ + { 83308, 0x000093E1 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_4x3x3_OES */ + { 83350, 0x000093E2 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4x3_OES */ + { 83392, 0x000093E3 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4x4_OES */ + { 83434, 0x000093E4 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4x4_OES */ + { 83476, 0x000093E5 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5x4_OES */ + { 83518, 0x000093E6 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5x5_OES */ + { 83560, 0x000093E7 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5x5_OES */ + { 83602, 0x000093E8 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6x5_OES */ + { 83644, 0x000093E9 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6x6_OES */ + { 83686, 0x000093F0 }, /* GL_COMPRESSED_SRGB_ALPHA_PVRTC_2BPPV2_IMG */ + { 83728, 0x000093F1 }, /* GL_COMPRESSED_SRGB_ALPHA_PVRTC_4BPPV2_IMG */ + { 83770, 0x000094F0 }, /* GL_PERFQUERY_COUNTER_EVENT_INTEL */ + { 83803, 0x000094F1 }, /* GL_PERFQUERY_COUNTER_DURATION_NORM_INTEL */ + { 83844, 0x000094F2 }, /* GL_PERFQUERY_COUNTER_DURATION_RAW_INTEL */ + { 83884, 0x000094F3 }, /* GL_PERFQUERY_COUNTER_THROUGHPUT_INTEL */ + { 83922, 0x000094F4 }, /* GL_PERFQUERY_COUNTER_RAW_INTEL */ + { 83953, 0x000094F5 }, /* GL_PERFQUERY_COUNTER_TIMESTAMP_INTEL */ + { 83990, 0x000094F8 }, /* GL_PERFQUERY_COUNTER_DATA_UINT32_INTEL */ + { 84029, 0x000094F9 }, /* GL_PERFQUERY_COUNTER_DATA_UINT64_INTEL */ + { 84068, 0x000094FA }, /* GL_PERFQUERY_COUNTER_DATA_FLOAT_INTEL */ + { 84106, 0x000094FB }, /* GL_PERFQUERY_COUNTER_DATA_DOUBLE_INTEL */ + { 84145, 0x000094FC }, /* GL_PERFQUERY_COUNTER_DATA_BOOL32_INTEL */ + { 84184, 0x000094FD }, /* GL_PERFQUERY_QUERY_NAME_LENGTH_MAX_INTEL */ + { 84225, 0x000094FE }, /* GL_PERFQUERY_COUNTER_NAME_LENGTH_MAX_INTEL */ + { 84268, 0x000094FF }, /* GL_PERFQUERY_COUNTER_DESC_LENGTH_MAX_INTEL */ + { 84311, 0x00009500 }, /* GL_PERFQUERY_GPA_EXTENDED_COUNTERS_INTEL */ + { 84352, 0x0000954D }, /* GL_CONSERVATIVE_RASTER_MODE_NV */ + { 84383, 0x0000954E }, /* GL_CONSERVATIVE_RASTER_MODE_POST_SNAP_NV */ + { 84424, 0x0000954F }, /* GL_CONSERVATIVE_RASTER_MODE_PRE_SNAP_TRIANGLES_NV */ + { 84474, 0x00009630 }, /* GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_NUM_VIEWS_OVR */ + { 84522, 0x00009631 }, /* GL_MAX_VIEWS_OVR */ + { 84539, 0x00009632 }, /* GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_BASE_VIEW_INDEX_OVR */ + { 84593, 0x00009650 }, /* GL_MAX_SHADER_COMBINED_LOCAL_STORAGE_FAST_SIZE_EXT */ + { 84644, 0x00009651 }, /* GL_MAX_SHADER_COMBINED_LOCAL_STORAGE_SIZE_EXT */ + { 84690, 0x00009652 }, /* GL_FRAMEBUFFER_INCOMPLETE_INSUFFICIENT_SHADER_COMBINED_LOCAL_STORAGE_EXT */ + { 84763, 0x00019262 }, /* GL_RASTER_POSITION_UNCLIPPED_IBM */ + { 84796, 0x0001A1F8 }, /* GL_PREFER_DOUBLEBUFFER_HINT_PGI */ + { 84828, 0x0001A1FD }, /* GL_CONSERVE_MEMORY_HINT_PGI */ + { 84856, 0x0001A1FE }, /* GL_RECLAIM_MEMORY_HINT_PGI */ + { 84883, 0x0001A202 }, /* GL_NATIVE_GRAPHICS_HANDLE_PGI */ + { 84913, 0x0001A203 }, /* GL_NATIVE_GRAPHICS_BEGIN_HINT_PGI */ + { 84947, 0x0001A204 }, /* GL_NATIVE_GRAPHICS_END_HINT_PGI */ + { 84979, 0x0001A20C }, /* GL_ALWAYS_FAST_HINT_PGI */ + { 85003, 0x0001A20D }, /* GL_ALWAYS_SOFT_HINT_PGI */ + { 85027, 0x0001A20E }, /* GL_ALLOW_DRAW_OBJ_HINT_PGI */ + { 85054, 0x0001A20F }, /* GL_ALLOW_DRAW_WIN_HINT_PGI */ + { 85081, 0x0001A210 }, /* GL_ALLOW_DRAW_FRG_HINT_PGI */ + { 85108, 0x0001A211 }, /* GL_ALLOW_DRAW_MEM_HINT_PGI */ + { 85135, 0x0001A216 }, /* GL_STRICT_DEPTHFUNC_HINT_PGI */ + { 85164, 0x0001A217 }, /* GL_STRICT_LIGHTING_HINT_PGI */ + { 85192, 0x0001A218 }, /* GL_STRICT_SCISSOR_HINT_PGI */ + { 85219, 0x0001A219 }, /* GL_FULL_STIPPLE_HINT_PGI */ + { 85244, 0x0001A220 }, /* GL_CLIP_NEAR_HINT_PGI */ + { 85266, 0x0001A221 }, /* GL_CLIP_FAR_HINT_PGI */ + { 85287, 0x0001A222 }, /* GL_WIDE_LINE_HINT_PGI */ + { 85309, 0x0001A223 }, /* GL_BACK_NORMALS_HINT_PGI */ + { 85334, 0x0001A22A }, /* GL_VERTEX_DATA_HINT_PGI */ + { 85358, 0x0001A22B }, /* GL_VERTEX_CONSISTENT_HINT_PGI */ + { 85388, 0x0001A22C }, /* GL_MATERIAL_SIDE_HINT_PGI */ + { 85414, 0x0001A22D }, /* GL_MAX_VERTEX_HINT_PGI */ + { 85437, 0x00103050 }, /* GL_CULL_VERTEX_IBM */ + { 85456, 0x00103060 }, /* GL_ALL_STATIC_DATA_IBM */ + { 85479, 0x00103061 }, /* GL_STATIC_VERTEX_ARRAY_IBM */ + { 85506, 0x00103070 }, /* GL_VERTEX_ARRAY_LIST_IBM */ + { 85531, 0x00103071 }, /* GL_NORMAL_ARRAY_LIST_IBM */ + { 85556, 0x00103072 }, /* GL_COLOR_ARRAY_LIST_IBM */ + { 85580, 0x00103073 }, /* GL_INDEX_ARRAY_LIST_IBM */ + { 85604, 0x00103074 }, /* GL_TEXTURE_COORD_ARRAY_LIST_IBM */ + { 85636, 0x00103075 }, /* GL_EDGE_FLAG_ARRAY_LIST_IBM */ + { 85664, 0x00103076 }, /* GL_FOG_COORDINATE_ARRAY_LIST_IBM */ + { 85697, 0x00103077 }, /* GL_SECONDARY_COLOR_ARRAY_LIST_IBM */ + { 85731, 0x00103080 }, /* GL_VERTEX_ARRAY_LIST_STRIDE_IBM */ + { 85763, 0x00103081 }, /* GL_NORMAL_ARRAY_LIST_STRIDE_IBM */ + { 85795, 0x00103082 }, /* GL_COLOR_ARRAY_LIST_STRIDE_IBM */ + { 85826, 0x00103083 }, /* GL_INDEX_ARRAY_LIST_STRIDE_IBM */ + { 85857, 0x00103084 }, /* GL_TEXTURE_COORD_ARRAY_LIST_STRIDE_IBM */ + { 85896, 0x00103085 }, /* GL_EDGE_FLAG_ARRAY_LIST_STRIDE_IBM */ + { 85931, 0x00103086 }, /* GL_FOG_COORDINATE_ARRAY_LIST_STRIDE_IBM */ + { 85971, 0x00103087 }, /* GL_SECONDARY_COLOR_ARRAY_LIST_STRIDE_IBM */ }; @@ -7181,7 +7273,12 @@ static char token_tmp[20]; -const char *_mesa_enum_to_string( int nr ) +/** + * This function always returns a string. If the number is a valid enum, it + * returns the enum name. Otherwise, it returns a numeric string. + */ +const char * +_mesa_enum_to_string(int nr) { enum_elt *elt; diff -Nru mesa-12.0.6/src/mesa/main/errors.c mesa-17.0.7/src/mesa/main/errors.c --- mesa-12.0.6/src/mesa/main/errors.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/errors.c 2017-06-01 10:37:10.000000000 +0000 @@ -35,12 +35,6 @@ #include "imports.h" #include "context.h" #include "debug_output.h" -#include "dispatch.h" -#include "hash.h" -#include "mtypes.h" -#include "version.h" -#include "util/hash_table.h" -#include "util/simple_list.h" static FILE *LogFile = NULL; @@ -122,7 +116,7 @@ char s[MAX_DEBUG_MESSAGE_LENGTH]; if (ctx->ErrorDebugCount) { - _mesa_snprintf(s, MAX_DEBUG_MESSAGE_LENGTH, "%d similar %s errors", + _mesa_snprintf(s, MAX_DEBUG_MESSAGE_LENGTH, "%d similar %s errors", ctx->ErrorDebugCount, _mesa_enum_to_string(ctx->ErrorValue)); @@ -145,10 +139,10 @@ { char str[MAX_DEBUG_MESSAGE_LENGTH]; va_list args; - va_start( args, fmtString ); + va_start( args, fmtString ); (void) _mesa_vsnprintf( str, MAX_DEBUG_MESSAGE_LENGTH, fmtString, args ); va_end( args ); - + if (ctx) flush_delayed_errors( ctx ); @@ -175,7 +169,7 @@ if (numCalls < 50) { numCalls++; - va_start( args, fmtString ); + va_start( args, fmtString ); _mesa_vsnprintf( str, MAX_DEBUG_MESSAGE_LENGTH, fmtString, args ); va_end( args ); fprintf(stderr, "Mesa %s implementation error: %s\n", @@ -264,7 +258,7 @@ * If debugging is enabled (either at compile-time via the DEBUG macro, or * run-time via the MESA_DEBUG environment variable), report the error with * _mesa_debug(). - * + * * \param ctx the GL context. * \param error the error value. * \param fmtString printf() style format string, followed by optional args @@ -346,7 +340,7 @@ /** * Report debug information. Print error message to stderr via fprintf(). * No-op if DEBUG mode not enabled. - * + * * \param ctx GL context. * \param fmtString printf()-style format string, followed by optional args. */ diff -Nru mesa-12.0.6/src/mesa/main/extensions.c mesa-17.0.7/src/mesa/main/extensions.c --- mesa-12.0.6/src/mesa/main/extensions.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/extensions.c 2017-06-01 10:37:10.000000000 +0000 @@ -48,26 +48,7 @@ */ #define o(x) offsetof(struct gl_extensions, x) - -/** - * \brief Table of supported OpenGL extensions for all API's. - */ -const struct mesa_extension _mesa_extension_table[] = { -#define EXT(name_str, driver_cap, gll_ver, glc_ver, gles_ver, gles2_ver, yyyy) \ - { .name = "GL_" #name_str, .offset = o(driver_cap), \ - .version = { \ - [API_OPENGL_COMPAT] = gll_ver, \ - [API_OPENGL_CORE] = glc_ver, \ - [API_OPENGLES] = gles_ver, \ - [API_OPENGLES2] = gles2_ver, \ - }, \ - .year = yyyy \ - }, -#include "extensions_table.h" -#undef EXT -}; - -static bool disabled_extensions[ARRAY_SIZE(_mesa_extension_table)]; +static bool disabled_extensions[MESA_EXTENSION_COUNT]; /** * Given an extension name, lookup up the corresponding member of struct @@ -85,7 +66,7 @@ if (name == 0) return -1; - for (i = 0; i < ARRAY_SIZE(_mesa_extension_table); ++i) { + for (i = 0; i < MESA_EXTENSION_COUNT; ++i) { if (strcmp(name, _mesa_extension_table[i].name) == 0) return i; } @@ -107,7 +88,7 @@ (GLboolean*) &_mesa_extension_override_disables; GLboolean *ctx_ext = (GLboolean*)&ctx->Extensions; - for (i = 0; i < ARRAY_SIZE(_mesa_extension_table); ++i) { + for (i = 0; i < MESA_EXTENSION_COUNT; ++i) { size_t offset = _mesa_extension_table[i].offset; assert(!enables[offset] || !disables[offset]); @@ -447,7 +428,7 @@ /* Compute length of the extension string. */ count = 0; - for (k = 0; k < ARRAY_SIZE(_mesa_extension_table); ++k) { + for (k = 0; k < MESA_EXTENSION_COUNT; ++k) { const struct mesa_extension *i = _mesa_extension_table + k; if (i->year <= maxYear && @@ -478,7 +459,7 @@ * expect will fit into that buffer. */ j = 0; - for (k = 0; k < ARRAY_SIZE(_mesa_extension_table); ++k) { + for (k = 0; k < MESA_EXTENSION_COUNT; ++k) { if (_mesa_extension_table[k].year <= maxYear && _mesa_extension_supported(ctx, k)) { extension_indices[j++] = k; @@ -516,7 +497,7 @@ if (ctx->Extensions.Count != 0) return ctx->Extensions.Count; - for (k = 0; k < ARRAY_SIZE(_mesa_extension_table); ++k) { + for (k = 0; k < MESA_EXTENSION_COUNT; ++k) { if (_mesa_extension_supported(ctx, k)) ctx->Extensions.Count++; } @@ -532,7 +513,7 @@ size_t n = 0; unsigned i; - for (i = 0; i < ARRAY_SIZE(_mesa_extension_table); ++i) { + for (i = 0; i < MESA_EXTENSION_COUNT; ++i) { if (_mesa_extension_supported(ctx, i)) { if (n == index) return (const GLubyte*) _mesa_extension_table[i].name; diff -Nru mesa-12.0.6/src/mesa/main/extensions.h mesa-17.0.7/src/mesa/main/extensions.h --- mesa-12.0.6/src/mesa/main/extensions.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/extensions.h 2017-06-01 10:37:10.000000000 +0000 @@ -38,6 +38,10 @@ #include "glheader.h" +#ifdef __cplusplus +extern "C" { +#endif + struct gl_context; struct gl_extensions; @@ -85,6 +89,7 @@ #define EXT(name_str, ...) MESA_EXTENSION_##name_str, #include "extensions_table.h" #undef EXT +MESA_EXTENSION_COUNT }; @@ -102,4 +107,8 @@ extern struct gl_extensions _mesa_extension_override_enables; extern struct gl_extensions _mesa_extension_override_disables; +#ifdef __cplusplus +} +#endif + #endif diff -Nru mesa-12.0.6/src/mesa/main/extensions_table.c mesa-17.0.7/src/mesa/main/extensions_table.c --- mesa-12.0.6/src/mesa/main/extensions_table.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/extensions_table.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,51 @@ +/* + * Mesa 3-D graphics library + * + * Copyright (C) 1999-2008 Brian Paul All Rights Reserved. + * Copyright (C) 2009 VMware, Inc. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "main/mtypes.h" +#include "main/extensions.h" + +/** + * Given a member \c x of struct gl_extensions, return offset of + * \c x in bytes. + */ +#define o(x) offsetof(struct gl_extensions, x) + +/** + * \brief Table of supported OpenGL extensions for all API's. + */ +const struct mesa_extension _mesa_extension_table[] = { +#define EXT(name_str, driver_cap, gll_ver, glc_ver, gles_ver, gles2_ver, yyyy) \ + { .name = "GL_" #name_str, .offset = o(driver_cap), \ + .version = { \ + [API_OPENGL_COMPAT] = gll_ver, \ + [API_OPENGL_CORE] = glc_ver, \ + [API_OPENGLES] = gles_ver, \ + [API_OPENGLES2] = gles2_ver, \ + }, \ + .year = yyyy \ + }, +#include "extensions_table.h" +#undef EXT +}; diff -Nru mesa-12.0.6/src/mesa/main/extensions_table.h mesa-17.0.7/src/mesa/main/extensions_table.h --- mesa-12.0.6/src/mesa/main/extensions_table.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/extensions_table.h 2017-06-01 10:37:10.000000000 +0000 @@ -18,6 +18,8 @@ EXT(AMD_vertex_shader_layer , AMD_vertex_shader_layer , x , GLC, x , x , 2012) EXT(AMD_vertex_shader_viewport_index , AMD_vertex_shader_viewport_index , x , GLC, x , x , 2012) +EXT(ANDROID_extension_pack_es31a , ANDROID_extension_pack_es31a , x , x , x , 31, 2014) + EXT(ANGLE_texture_compression_dxt3 , ANGLE_texture_compression_dxt , GLL, GLC, ES1, ES2, 2011) EXT(ANGLE_texture_compression_dxt5 , ANGLE_texture_compression_dxt , GLL, GLC, ES1, ES2, 2011) @@ -40,6 +42,7 @@ EXT(ARB_color_buffer_float , ARB_color_buffer_float , GLL, GLC, x , x , 2004) EXT(ARB_compressed_texture_pixel_storage , dummy_true , GLL, GLC, x , x , 2011) EXT(ARB_compute_shader , ARB_compute_shader , GLL, GLC, x , x , 2012) +EXT(ARB_compute_variable_group_size , ARB_compute_variable_group_size , GLL, GLC, x , x , 2013) EXT(ARB_conditional_render_inverted , ARB_conditional_render_inverted , GLL, GLC, x , x , 2014) EXT(ARB_conservative_depth , ARB_conservative_depth , GLL, GLC, x , x , 2011) EXT(ARB_copy_buffer , dummy_true , GLL, GLC, x , x , 2008) @@ -90,6 +93,7 @@ EXT(ARB_pixel_buffer_object , EXT_pixel_buffer_object , GLL, GLC, x , x , 2004) EXT(ARB_point_parameters , EXT_point_parameters , GLL, x , x , x , 1997) EXT(ARB_point_sprite , ARB_point_sprite , GLL, GLC, x , x , 2003) +EXT(ARB_post_depth_coverage , ARB_post_depth_coverage , x , GLC, x , x, 2015) EXT(ARB_program_interface_query , dummy_true , GLL, GLC, x , x , 2012) EXT(ARB_provoking_vertex , EXT_provoking_vertex , GLL, GLC, x , x , 2009) EXT(ARB_query_buffer_object , ARB_query_buffer_object , GLL, GLC, x , x , 2013) @@ -105,6 +109,7 @@ EXT(ARB_shader_bit_encoding , ARB_shader_bit_encoding , GLL, GLC, x , x , 2010) EXT(ARB_shader_clock , ARB_shader_clock , GLL, GLC, x , x , 2015) EXT(ARB_shader_draw_parameters , ARB_shader_draw_parameters , GLL, GLC, x , x , 2013) +EXT(ARB_shader_group_vote , ARB_shader_group_vote , GLL, GLC, x , x , 2013) EXT(ARB_shader_image_load_store , ARB_shader_image_load_store , GLL, GLC, x , x , 2011) EXT(ARB_shader_image_size , ARB_shader_image_size , GLL, GLC, x , x , 2012) EXT(ARB_shader_objects , dummy_true , GLL, GLC, x , x , 2002) @@ -114,6 +119,7 @@ EXT(ARB_shader_subroutine , ARB_shader_subroutine , x , GLC, x , x , 2010) EXT(ARB_shader_texture_image_samples , ARB_shader_texture_image_samples , GLL, GLC, x , x , 2014) EXT(ARB_shader_texture_lod , ARB_shader_texture_lod , GLL, GLC, x , x , 2009) +EXT(ARB_shader_viewport_layer_array , ARB_shader_viewport_layer_array , x , GLC, x , x , 2015) EXT(ARB_shading_language_100 , dummy_true , GLL, x , x , x , 2003) EXT(ARB_shading_language_420pack , ARB_shading_language_420pack , GLL, GLC, x , x , 2011) EXT(ARB_shading_language_packing , ARB_shading_language_packing , GLL, GLC, x , x , 2011) @@ -208,6 +214,8 @@ EXT(EXT_framebuffer_multisample_blit_scaled , EXT_framebuffer_multisample_blit_scaled, GLL, GLC, x , x , 2011) EXT(EXT_framebuffer_object , dummy_true , GLL, x , x , x , 2000) EXT(EXT_framebuffer_sRGB , EXT_framebuffer_sRGB , GLL, GLC, x , x , 1998) +EXT(EXT_geometry_point_size , OES_geometry_shader , x , x , x , 31, 2015) +EXT(EXT_geometry_shader , OES_geometry_shader , x , x , x , 31, 2015) EXT(EXT_gpu_program_parameters , EXT_gpu_program_parameters , GLL, x , x , x , 2006) EXT(EXT_gpu_shader4 , EXT_gpu_shader4 , GLL, GLC, x , x , 2006) EXT(EXT_gpu_shader5 , ARB_gpu_shader5 , x , x , x , 31, 2014) @@ -220,19 +228,24 @@ EXT(EXT_point_parameters , EXT_point_parameters , GLL, x , x , x , 1997) EXT(EXT_polygon_offset , dummy_true , GLL, x , x , x , 1995) EXT(EXT_polygon_offset_clamp , EXT_polygon_offset_clamp , GLL, GLC, ES1, ES2, 2014) +EXT(EXT_primitive_bounding_box , OES_primitive_bounding_box , x , x , x , 31, 2014) EXT(EXT_provoking_vertex , EXT_provoking_vertex , GLL, GLC, x , x , 2009) EXT(EXT_read_format_bgra , dummy_true , x , x , ES1, ES2, 2009) EXT(EXT_rescale_normal , dummy_true , GLL, x , x , x , 1997) +EXT(EXT_robustness , KHR_robustness , x, x, x , ES2, 2011) EXT(EXT_secondary_color , dummy_true , GLL, x , x , x , 1999) EXT(EXT_separate_shader_objects , dummy_true , x , x , x , ES2, 2013) EXT(EXT_separate_specular_color , dummy_true , GLL, x , x , x , 1997) +EXT(EXT_shader_framebuffer_fetch , MESA_shader_framebuffer_fetch , x , x , x , ES2, 2013) EXT(EXT_shader_integer_mix , EXT_shader_integer_mix , GLL, GLC, x , 30, 2013) -EXT(EXT_shader_io_blocks , OES_shader_io_blocks , x , x , x , 31, 2014) +EXT(EXT_shader_io_blocks , dummy_true , x , x , x , 31, 2014) EXT(EXT_shader_samples_identical , EXT_shader_samples_identical , GLL, GLC, x , 31, 2015) EXT(EXT_shadow_funcs , ARB_shadow , GLL, x , x , x , 2002) EXT(EXT_stencil_two_side , EXT_stencil_two_side , GLL, x , x , x , 2001) EXT(EXT_stencil_wrap , dummy_true , GLL, x , x , x , 2002) EXT(EXT_subtexture , dummy_true , GLL, x , x , x , 1995) +EXT(EXT_tessellation_point_size , ARB_tessellation_shader , x , x , x , 31, 2013) +EXT(EXT_tessellation_shader , ARB_tessellation_shader , x , x , x , 31, 2013) EXT(EXT_texture , dummy_true , GLL, x , x , x , 1996) EXT(EXT_texture3D , dummy_true , GLL, x , x , x , 1996) EXT(EXT_texture_array , EXT_texture_array , GLL, GLC, x , x , 2006) @@ -243,6 +256,7 @@ EXT(EXT_texture_compression_rgtc , ARB_texture_compression_rgtc , GLL, GLC, x , x , 2004) EXT(EXT_texture_compression_s3tc , EXT_texture_compression_s3tc , GLL, GLC, x , x , 2000) EXT(EXT_texture_cube_map , ARB_texture_cube_map , GLL, x , x , x , 2001) +EXT(EXT_texture_cube_map_array , OES_texture_cube_map_array , x , x , x , 31, 2014) EXT(EXT_texture_edge_clamp , dummy_true , GLL, x , x , x , 1997) EXT(EXT_texture_env_add , dummy_true , GLL, x , x , x , 1999) EXT(EXT_texture_env_combine , dummy_true , GLL, x , x , x , 2000) @@ -266,6 +280,7 @@ EXT(EXT_unpack_subimage , dummy_true , x , x , x , ES2, 2011) EXT(EXT_vertex_array , dummy_true , GLL, x , x , x , 1995) EXT(EXT_vertex_array_bgra , EXT_vertex_array_bgra , GLL, GLC, x , x , 2008) +EXT(EXT_window_rectangles , EXT_window_rectangles , GLL, GLC, x , 30, 2016) EXT(GREMEDY_string_marker , GREMEDY_string_marker , GLL, GLC, x , x , 2007) @@ -275,16 +290,21 @@ EXT(INGR_blend_func_separate , EXT_blend_func_separate , GLL, x , x , x , 1999) +EXT(INTEL_conservative_rasterization , INTEL_conservative_rasterization , x , GLC, x , 31, 2013) EXT(INTEL_performance_query , INTEL_performance_query , GLL, GLC, x , ES2, 2013) +EXT(KHR_blend_equation_advanced , KHR_blend_equation_advanced , GLL, GLC, x , ES2, 2014) +EXT(KHR_blend_equation_advanced_coherent , KHR_blend_equation_advanced_coherent , GLL, GLC, x , ES2, 2014) EXT(KHR_context_flush_control , dummy_true , GLL, GLC, x , ES2, 2014) EXT(KHR_debug , dummy_true , GLL, GLC, 11, ES2, 2012) EXT(KHR_robust_buffer_access_behavior , ARB_robust_buffer_access_behavior , GLL, GLC, x , ES2, 2014) EXT(KHR_robustness , KHR_robustness , GLL, GLC, x , ES2, 2012) EXT(KHR_texture_compression_astc_hdr , KHR_texture_compression_astc_hdr , GLL, GLC, x , ES2, 2012) EXT(KHR_texture_compression_astc_ldr , KHR_texture_compression_astc_ldr , GLL, GLC, x , ES2, 2012) +EXT(KHR_texture_compression_astc_sliced_3d , KHR_texture_compression_astc_sliced_3d , GLL, GLC, x , ES2, 2015) EXT(MESA_pack_invert , MESA_pack_invert , GLL, GLC, x , x , 2002) +EXT(MESA_shader_integer_functions , MESA_shader_integer_functions , GLL, GLC, x , 30, 2016) EXT(MESA_texture_signed_rgba , EXT_texture_snorm , GLL, GLC, x , x , 2009) EXT(MESA_window_pos , dummy_true , GLL, x , x , x , 2000) EXT(MESA_ycbcr_texture , MESA_ycbcr_texture , GLL, GLC, x , x , 2002) @@ -297,6 +317,7 @@ EXT(NV_draw_buffers , dummy_true , x , x , x , ES2, 2011) EXT(NV_fbo_color_attachments , dummy_true , x , x , x , ES2, 2010) EXT(NV_fog_distance , NV_fog_distance , GLL, x , x , x , 2001) +EXT(NV_image_formats , ARB_shader_image_load_store , x , x , x , 31, 2014) EXT(NV_light_max_exponent , dummy_true , GLL, x , x , x , 1999) EXT(NV_packed_depth_stencil , dummy_true , GLL, GLC, x , x , 2000) EXT(NV_point_sprite , NV_point_sprite , GLL, GLC, x , x , 2001) @@ -340,13 +361,14 @@ EXT(OES_packed_depth_stencil , dummy_true , x , x , ES1, ES2, 2007) EXT(OES_point_size_array , dummy_true , x , x , ES1, x , 2004) EXT(OES_point_sprite , ARB_point_sprite , x , x , ES1, x , 2004) +EXT(OES_primitive_bounding_box , OES_primitive_bounding_box , x , x , x , 31, 2014) EXT(OES_query_matrix , dummy_true , x , x , ES1, x , 2003) -EXT(OES_read_format , dummy_true , GLL, GLC, ES1, x , 2003) +EXT(OES_read_format , dummy_true , GLL, x , ES1, x , 2003) EXT(OES_rgb8_rgba8 , dummy_true , x , x , ES1, ES2, 2005) EXT(OES_sample_shading , OES_sample_variables , x , x , x , 30, 2014) EXT(OES_sample_variables , OES_sample_variables , x , x , x , 30, 2014) EXT(OES_shader_image_atomic , ARB_shader_image_load_store , x , x , x , 31, 2015) -EXT(OES_shader_io_blocks , OES_shader_io_blocks , x , x , x , 31, 2014) +EXT(OES_shader_io_blocks , dummy_true , x , x , x , 31, 2014) EXT(OES_shader_multisample_interpolation , OES_sample_variables , x , x , x , 30, 2014) EXT(OES_single_precision , dummy_true , x , x , ES1, x , 2003) EXT(OES_standard_derivatives , OES_standard_derivatives , x , x , x , ES2, 2005) @@ -355,11 +377,14 @@ EXT(OES_stencil8 , dummy_true , x , x , ES1, ES2, 2005) EXT(OES_stencil_wrap , dummy_true , x , x , ES1, x , 2002) EXT(OES_surfaceless_context , dummy_true , x , x , ES1, ES2, 2012) +EXT(OES_tessellation_point_size , ARB_tessellation_shader , x , x , x , 31, 2014) +EXT(OES_tessellation_shader , ARB_tessellation_shader , x , x , x , 31, 2014) EXT(OES_texture_3D , dummy_true , x , x , x , ES2, 2005) EXT(OES_texture_border_clamp , ARB_texture_border_clamp , x , x , x , ES2, 2014) EXT(OES_texture_buffer , OES_texture_buffer , x , x , x , 31, 2014) EXT(OES_texture_compression_astc , OES_texture_compression_astc , x , x , ES1, ES2, 2015) EXT(OES_texture_cube_map , ARB_texture_cube_map , x , x , ES1, x , 2007) +EXT(OES_texture_cube_map_array , OES_texture_cube_map_array , x , x , x , 31, 2014) EXT(OES_texture_env_crossbar , ARB_texture_env_crossbar , x , x , ES1, x , 2005) EXT(OES_texture_float , OES_texture_float , x , x , x , ES2, 2005) EXT(OES_texture_float_linear , OES_texture_float_linear , x , x , x , ES2, 2005) @@ -370,6 +395,8 @@ EXT(OES_texture_stencil8 , ARB_texture_stencil8 , x , x , x , 30, 2014) EXT(OES_texture_storage_multisample_2d_array, ARB_texture_multisample , x , x , x , 31, 2014) EXT(OES_vertex_array_object , dummy_true , x , x , ES1, ES2, 2010) +EXT(OES_vertex_half_float , ARB_half_float_vertex , x , x , x , ES2, 2005) +EXT(OES_viewport_array , OES_viewport_array , x , x , x , 31, 2010) EXT(S3_s3tc , ANGLE_texture_compression_dxt , GLL, GLC, x , x , 1999) diff -Nru mesa-12.0.6/src/mesa/main/fbobject.c mesa-17.0.7/src/mesa/main/fbobject.c --- mesa-12.0.6/src/mesa/main/fbobject.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/fbobject.c 2017-06-01 10:37:10.000000000 +0000 @@ -222,15 +222,21 @@ * default / window-system FB object. * If \p attachment is GL_DEPTH_STENCIL_ATTACHMENT, return a pointer to * the depth buffer attachment point. + * Returns if the attachment is a GL_COLOR_ATTACHMENTm_EXT on + * is_color_attachment, because several callers would return different errors + * if they don't find the attachment. */ static struct gl_renderbuffer_attachment * get_attachment(struct gl_context *ctx, struct gl_framebuffer *fb, - GLenum attachment) + GLenum attachment, bool *is_color_attachment) { GLuint i; assert(_mesa_is_user_fbo(fb)); + if (is_color_attachment) + *is_color_attachment = false; + switch (attachment) { case GL_COLOR_ATTACHMENT0_EXT: case GL_COLOR_ATTACHMENT1_EXT: @@ -248,6 +254,8 @@ case GL_COLOR_ATTACHMENT13_EXT: case GL_COLOR_ATTACHMENT14_EXT: case GL_COLOR_ATTACHMENT15_EXT: + if (is_color_attachment) + *is_color_attachment = true; /* Only OpenGL ES 1.x forbids color attachments other than * GL_COLOR_ATTACHMENT0. For all other APIs the limit set by the * hardware is used. @@ -543,13 +551,13 @@ mtx_lock(&fb->Mutex); - att = get_attachment(ctx, fb, attachment); + att = get_attachment(ctx, fb, attachment, NULL); assert(att); if (rb) { set_renderbuffer_attachment(ctx, att, rb); if (attachment == GL_DEPTH_STENCIL_ATTACHMENT) { /* do stencil attachment here (depth already done above) */ - att = get_attachment(ctx, fb, GL_STENCIL_ATTACHMENT_EXT); + att = get_attachment(ctx, fb, GL_STENCIL_ATTACHMENT_EXT, NULL); assert(att); set_renderbuffer_attachment(ctx, att, rb); } @@ -559,7 +567,7 @@ remove_attachment(ctx, att); if (attachment == GL_DEPTH_STENCIL_ATTACHMENT) { /* detach stencil (depth was detached above) */ - att = get_attachment(ctx, fb, GL_STENCIL_ATTACHMENT_EXT); + att = get_attachment(ctx, fb, GL_STENCIL_ATTACHMENT_EXT, NULL); assert(att); remove_attachment(ctx, att); } @@ -970,6 +978,7 @@ fb->_AllColorBuffersFixedPoint = GL_TRUE; fb->_HasSNormOrFloatColorBuffer = GL_FALSE; fb->_HasAttachments = true; + fb->_IntegerBuffers = 0; /* Start at -2 to more easily loop over all attachment points. * -2: depth buffer @@ -1090,13 +1099,14 @@ continue; } - /* check if integer color */ - fb->_IntegerColor = _mesa_is_format_integer_color(attFormat); - - /* Update _AllColorBuffersFixedPoint and _HasSNormOrFloatColorBuffer. */ + /* Update flags describing color buffer datatypes */ if (i >= 0) { GLenum type = _mesa_get_format_datatype(attFormat); + /* check if integer color */ + if (_mesa_is_format_integer_color(attFormat)) + fb->_IntegerBuffers |= (1 << i); + fb->_AllColorBuffersFixedPoint = fb->_AllColorBuffersFixedPoint && (type == GL_UNSIGNED_NORMALIZED || type == GL_SIGNED_NORMALIZED); @@ -1217,7 +1227,7 @@ for (j = 0; j < ctx->Const.MaxDrawBuffers; j++) { if (fb->ColorDrawBuffer[j] != GL_NONE) { const struct gl_renderbuffer_attachment *att - = get_attachment(ctx, fb, fb->ColorDrawBuffer[j]); + = get_attachment(ctx, fb, fb->ColorDrawBuffer[j], NULL); assert(att); if (att->Type == GL_NONE) { fb->_Status = GL_FRAMEBUFFER_INCOMPLETE_DRAW_BUFFER_EXT; @@ -1230,7 +1240,7 @@ /* Check that the ReadBuffer is present */ if (fb->ColorReadBuffer != GL_NONE) { const struct gl_renderbuffer_attachment *att - = get_attachment(ctx, fb, fb->ColorReadBuffer); + = get_attachment(ctx, fb, fb->ColorReadBuffer, NULL); assert(att); if (att->Type == GL_NONE) { fb->_Status = GL_FRAMEBUFFER_INCOMPLETE_READ_BUFFER_EXT; @@ -2140,7 +2150,7 @@ } if (sample_count_error != GL_NO_ERROR) { - _mesa_error(ctx, sample_count_error, "%s(samples)", func); + _mesa_error(ctx, sample_count_error, "%s(samples=%d)", func, samples); return; } } @@ -2992,54 +3002,49 @@ { bool err = false; - switch (dims) { - case 1: - switch (textarget) { - case GL_TEXTURE_1D: - break; - case GL_TEXTURE_1D_ARRAY: - err = !ctx->Extensions.EXT_texture_array; - break; - default: - err = true; - } + switch (textarget) { + case GL_TEXTURE_1D: + err = dims != 1; break; - case 2: - switch (textarget) { - case GL_TEXTURE_2D: - break; - case GL_TEXTURE_RECTANGLE: - err = _mesa_is_gles(ctx) - || !ctx->Extensions.NV_texture_rectangle; - break; - case GL_TEXTURE_CUBE_MAP_POSITIVE_X: - case GL_TEXTURE_CUBE_MAP_NEGATIVE_X: - case GL_TEXTURE_CUBE_MAP_POSITIVE_Y: - case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y: - case GL_TEXTURE_CUBE_MAP_POSITIVE_Z: - case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z: - err = !ctx->Extensions.ARB_texture_cube_map; - break; - case GL_TEXTURE_2D_ARRAY: - err = (_mesa_is_gles(ctx) && ctx->Version < 30) - || !ctx->Extensions.EXT_texture_array; - break; - case GL_TEXTURE_2D_MULTISAMPLE: - case GL_TEXTURE_2D_MULTISAMPLE_ARRAY: - err = (_mesa_is_gles(ctx) || - !ctx->Extensions.ARB_texture_multisample) && - !_mesa_is_gles31(ctx); - break; - default: - err = true; - } + case GL_TEXTURE_1D_ARRAY: + err = dims != 1 || !ctx->Extensions.EXT_texture_array; break; - case 3: - if (textarget != GL_TEXTURE_3D) - err = true; + case GL_TEXTURE_2D: + err = dims != 2; break; - default: + case GL_TEXTURE_2D_ARRAY: + err = dims != 2 || !ctx->Extensions.EXT_texture_array || + (_mesa_is_gles(ctx) && ctx->Version < 30); + break; + case GL_TEXTURE_2D_MULTISAMPLE: + case GL_TEXTURE_2D_MULTISAMPLE_ARRAY: + err = dims != 2 || + !ctx->Extensions.ARB_texture_multisample || + (_mesa_is_gles(ctx) && ctx->Version < 31); + break; + case GL_TEXTURE_RECTANGLE: + err = dims != 2 || _mesa_is_gles(ctx) || + !ctx->Extensions.NV_texture_rectangle; + break; + case GL_TEXTURE_CUBE_MAP: + case GL_TEXTURE_CUBE_MAP_ARRAY: err = true; + break; + case GL_TEXTURE_CUBE_MAP_POSITIVE_X: + case GL_TEXTURE_CUBE_MAP_NEGATIVE_X: + case GL_TEXTURE_CUBE_MAP_POSITIVE_Y: + case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y: + case GL_TEXTURE_CUBE_MAP_POSITIVE_Z: + case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z: + err = dims != 2 || !ctx->Extensions.ARB_texture_cube_map; + break; + case GL_TEXTURE_3D: + err = dims != 3; + break; + default: + _mesa_error(ctx, GL_INVALID_ENUM, + "%s(unknown textarget 0x%x)", caller, textarget); + return false; } if (err) { @@ -3154,7 +3159,7 @@ } /* Not a hash lookup, so we can afford to get the attachment here. */ - att = get_attachment(ctx, fb, attachment); + att = get_attachment(ctx, fb, attachment, NULL); if (att == NULL) { _mesa_error(ctx, GL_INVALID_ENUM, "%s(invalid attachment %s)", caller, _mesa_enum_to_string(attachment)); @@ -3490,6 +3495,7 @@ const char *func) { struct gl_renderbuffer_attachment *att; + bool is_color_attachment; if (_mesa_is_winsys_fbo(fb)) { /* Can't attach new renderbuffers to a window system framebuffer */ @@ -3498,11 +3504,29 @@ return; } - att = get_attachment(ctx, fb, attachment); + att = get_attachment(ctx, fb, attachment, &is_color_attachment); if (att == NULL) { - _mesa_error(ctx, GL_INVALID_ENUM, - "%s(invalid attachment %s)", func, - _mesa_enum_to_string(attachment)); + /* + * From OpenGL 4.5 spec, section 9.2.7 "Attaching Renderbuffer Images to + * a Framebuffer": + * + * "An INVALID_OPERATION error is generated if attachment is COLOR_- + * ATTACHMENTm where m is greater than or equal to the value of + * MAX_COLOR_- ATTACHMENTS ." + * + * If we are at this point, is because the attachment is not valid, so + * if is_color_attachment is true, is because of the previous reason. + */ + if (is_color_attachment) { + _mesa_error(ctx, GL_INVALID_OPERATION, + "%s(invalid color attachment %s)", func, + _mesa_enum_to_string(attachment)); + } else { + _mesa_error(ctx, GL_INVALID_ENUM, + "%s(invalid attachment %s)", func, + _mesa_enum_to_string(attachment)); + } + return; } @@ -3604,6 +3628,7 @@ GLint *params, const char *caller) { const struct gl_renderbuffer_attachment *att; + bool is_color_attachment = false; GLenum err; /* The error code for an attachment type of GL_NONE differs between APIs. @@ -3671,12 +3696,27 @@ } else { /* user-created framebuffer FBO */ - att = get_attachment(ctx, buffer, attachment); + att = get_attachment(ctx, buffer, attachment, &is_color_attachment); } if (att == NULL) { - _mesa_error(ctx, GL_INVALID_ENUM, "%s(invalid attachment %s)", caller, - _mesa_enum_to_string(attachment)); + /* + * From OpenGL 4.5 spec, section 9.2.3 "Framebuffer Object Queries": + * + * "An INVALID_OPERATION error is generated if a framebuffer object + * is bound to target and attachment is COLOR_ATTACHMENTm where m is + * greater than or equal to the value of MAX_COLOR_ATTACHMENTS." + * + * If we are at this point, is because the attachment is not valid, so + * if is_color_attachment is true, is because of the previous reason. + */ + if (is_color_attachment) { + _mesa_error(ctx, GL_INVALID_OPERATION, "%s(invalid color attachment %s)", + caller, _mesa_enum_to_string(attachment)); + } else { + _mesa_error(ctx, GL_INVALID_ENUM, "%s(invalid attachment %s)", caller, + _mesa_enum_to_string(attachment)); + } return; } @@ -3695,8 +3735,8 @@ return; } /* the depth and stencil attachments must point to the same buffer */ - depthAtt = get_attachment(ctx, buffer, GL_DEPTH_ATTACHMENT); - stencilAtt = get_attachment(ctx, buffer, GL_STENCIL_ATTACHMENT); + depthAtt = get_attachment(ctx, buffer, GL_DEPTH_ATTACHMENT, NULL); + stencilAtt = get_attachment(ctx, buffer, GL_STENCIL_ATTACHMENT, NULL); if (depthAtt->Renderbuffer != stencilAtt->Renderbuffer) { _mesa_error(ctx, GL_INVALID_OPERATION, "%s(DEPTH/STENCIL attachments differ)", caller); @@ -3791,8 +3831,13 @@ goto invalid_pname_enum; } else if (att->Type == GL_NONE) { - _mesa_error(ctx, err, "%s(invalid pname %s)", caller, - _mesa_enum_to_string(pname)); + if (_mesa_is_winsys_fbo(buffer) && + (attachment == GL_DEPTH || attachment == GL_STENCIL)) { + *params = GL_LINEAR; + } else { + _mesa_error(ctx, err, "%s(invalid pname %s)", caller, + _mesa_enum_to_string(pname)); + } } else { if (ctx->Extensions.EXT_framebuffer_sRGB) { diff -Nru mesa-12.0.6/src/mesa/main/ff_fragment_shader.cpp mesa-17.0.7/src/mesa/main/ff_fragment_shader.cpp --- mesa-12.0.6/src/mesa/main/ff_fragment_shader.cpp 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/ff_fragment_shader.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -49,6 +49,7 @@ #include "program/prog_parameter.h" #include "program/prog_print.h" #include "program/prog_statevars.h" +#include "util/bitscan.h" using namespace ir_builder; @@ -102,7 +103,6 @@ GLuint nr_enabled_units:8; GLuint enabled_units:8; GLuint separate_specular:1; - GLuint fog_enabled:1; GLuint fog_mode:2; /**< FOG_x */ GLuint inputs_available:12; GLuint num_draw_buffers:4; @@ -126,10 +126,10 @@ } unit[MAX_TEXTURE_UNITS]; }; -#define FOG_LINEAR 0 -#define FOG_EXP 1 -#define FOG_EXP2 2 -#define FOG_UNKNOWN 3 +#define FOG_NONE 0 +#define FOG_LINEAR 1 +#define FOG_EXP 2 +#define FOG_EXP2 3 static GLuint translate_fog_mode( GLenum mode ) { @@ -137,7 +137,7 @@ case GL_LINEAR: return FOG_LINEAR; case GL_EXP: return FOG_EXP; case GL_EXP2: return FOG_EXP2; - default: return FOG_UNKNOWN; + default: return FOG_NONE; } } @@ -301,7 +301,7 @@ /* _NEW_PROGRAM */ const GLboolean vertexShader = (ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX] && - ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX]->LinkStatus && + ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX]->data->LinkStatus && ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX]->_LinkedShaders[MESA_SHADER_VERTEX]); const GLboolean vertexProgram = ctx->VertexProgram._Enabled; GLbitfield fp_inputs = 0x0; @@ -368,9 +368,9 @@ if (vertexShader) vprog = ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX]->_LinkedShaders[MESA_SHADER_VERTEX]->Program; else - vprog = &ctx->VertexProgram.Current->Base; + vprog = ctx->VertexProgram.Current; - vp_outputs = vprog->OutputsWritten; + vp_outputs = vprog->info.outputs_written; /* These get generated in the setup routine regardless of the * vertex program: @@ -398,22 +398,25 @@ */ static GLuint make_state_key( struct gl_context *ctx, struct state_key *key ) { - GLuint i, j; + GLuint j; GLbitfield inputs_referenced = VARYING_BIT_COL0; const GLbitfield inputs_available = get_fp_input_mask( ctx ); + GLbitfield mask; GLuint keySize; memset(key, 0, sizeof(*key)); /* _NEW_TEXTURE */ - for (i = 0; i < ctx->Const.MaxTextureUnits; i++) { + mask = ctx->Texture._EnabledCoordUnits; + while (mask) { + const int i = u_bit_scan(&mask); const struct gl_texture_unit *texUnit = &ctx->Texture.Unit[i]; const struct gl_texture_object *texObj = texUnit->_Current; const struct gl_tex_env_combine_state *comb = texUnit->_CurrentCombine; const struct gl_sampler_object *samp; GLenum format; - if (!texUnit->_Current || !texUnit->Enabled) + if (!texObj) continue; samp = _mesa_get_samplerobj(ctx, i); @@ -459,7 +462,6 @@ /* _NEW_FOG */ if (ctx->Fog.Enabled) { - key->fog_enabled = 1; key->fog_mode = translate_fog_mode(ctx->Fog.Mode); inputs_referenced |= VARYING_BIT_FOGC; /* maybe */ } @@ -988,7 +990,7 @@ if (p->state->unit[unit].shadow) { texcoord = texcoord->clone(p->mem_ctx, NULL); - tex->shadow_comparitor = new(p->mem_ctx) ir_swizzle(texcoord, + tex->shadow_comparator = new(p->mem_ctx) ir_swizzle(texcoord, coords, 0, 0, 0, 1); coords++; @@ -1178,7 +1180,7 @@ cf = new(p->mem_ctx) ir_dereference_variable(spec_result); } - if (key->fog_enabled) { + if (key->fog_mode) { cf = emit_fog_instructions(p, cf); } @@ -1199,7 +1201,10 @@ _mesa_glsl_parse_state *state; p.mem_ctx = ralloc_context(NULL); - p.shader = ctx->Driver.NewShader(ctx, 0, GL_FRAGMENT_SHADER); + p.shader = _mesa_new_shader(0, MESA_SHADER_FRAGMENT); +#ifdef DEBUG + p.shader->SourceChecksum = 0xf18ed; /* fixed */ +#endif p.shader->ir = new(p.shader) exec_list; state = new(p.shader) _mesa_glsl_parse_state(ctx, MESA_SHADER_FRAGMENT, p.shader); @@ -1217,7 +1222,19 @@ */ p.shader_program->SeparateShader = GL_TRUE; - state->language_version = 130; + /* The legacy GLSL shadow functions follow the depth texture + * mode and return vec4. The GLSL 1.30 shadow functions return float and + * ignore the depth texture mode. That's a shader and state dependency + * that's difficult to deal with. st/mesa uses a simple but not + * completely correct solution: if the shader declares GLSL >= 1.30 and + * the depth texture mode is GL_ALPHA (000X), it sets the XXXX swizzle + * instead. Thus, the GLSL 1.30 shadow function will get the result in .x + * and legacy shadow functions will get it in .w as expected. + * For the fixed-function fragment shader, use 120 to get correct behavior + * for GL_ALPHA. + */ + state->language_version = 120; + state->es_shader = false; if (_mesa_is_gles(ctx) && ctx->Extensions.OES_EGL_image_external) state->OES_EGL_image_external_enable = true; @@ -1249,14 +1266,17 @@ const struct gl_shader_compiler_options *options = &ctx->Const.ShaderCompilerOptions[MESA_SHADER_FRAGMENT]; - while (do_common_optimization(p.shader->ir, false, false, options, - ctx->Const.NativeIntegers)) - ; + /* Conservative approach: Don't optimize here, the linker does it too. */ + if (!ctx->Const.GLSLOptimizeConservatively) { + while (do_common_optimization(p.shader->ir, false, false, options, + ctx->Const.NativeIntegers)) + ; + } + reparent_ir(p.shader->ir, p.shader->ir); p.shader->CompileStatus = true; p.shader->Version = state->language_version; - p.shader->uses_builtin_functions = state->uses_builtin_functions; p.shader_program->Shaders = (gl_shader **)malloc(sizeof(*p.shader_program->Shaders)); p.shader_program->Shaders[0] = p.shader; @@ -1264,9 +1284,9 @@ _mesa_glsl_link_shader(ctx, p.shader_program); - if (!p.shader_program->LinkStatus) + if (!p.shader_program->data->LinkStatus) _mesa_problem(ctx, "Failed to link fixed function fragment shader: %s\n", - p.shader_program->InfoLog); + p.shader_program->data->InfoLog); ralloc_free(p.mem_ctx); return p.shader_program; diff -Nru mesa-12.0.6/src/mesa/main/ffvertex_prog.c mesa-17.0.7/src/mesa/main/ffvertex_prog.c --- mesa-12.0.6/src/mesa/main/ffvertex_prog.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/ffvertex_prog.c 2017-06-01 10:37:10.000000000 +0000 @@ -44,6 +44,7 @@ #include "program/prog_parameter.h" #include "program/prog_print.h" #include "program/prog_statevars.h" +#include "util/bitscan.h" /** Max of number of lights and texture coord units */ @@ -147,11 +148,10 @@ static void make_state_key( struct gl_context *ctx, struct state_key *key ) { - const struct gl_fragment_program *fp; - GLuint i; + const struct gl_program *fp = ctx->FragmentProgram._Current; + GLbitfield mask; memset(key, 0, sizeof(struct state_key)); - fp = ctx->FragmentProgram._Current; /* This now relies on texenvprogram.c being active: */ @@ -159,7 +159,7 @@ key->need_eye_coords = ctx->_NeedEyeCoords; - key->fragprog_inputs_read = fp->Base.InputsRead; + key->fragprog_inputs_read = fp->info.inputs_read; key->varying_vp_inputs = ctx->varying_vp_inputs; if (ctx->RenderMode == GL_FEEDBACK) { @@ -183,23 +183,23 @@ key->light_color_material_mask = ctx->Light._ColorMaterialBitmask; } - for (i = 0; i < MAX_LIGHTS; i++) { - struct gl_light *light = &ctx->Light.Light[i]; - - if (light->Enabled) { - key->unit[i].light_enabled = 1; - - if (light->EyePosition[3] == 0.0F) - key->unit[i].light_eyepos3_is_zero = 1; - - if (light->SpotCutoff == 180.0F) - key->unit[i].light_spotcutoff_is_180 = 1; - - if (light->ConstantAttenuation != 1.0F || - light->LinearAttenuation != 0.0F || - light->QuadraticAttenuation != 0.0F) - key->unit[i].light_attenuated = 1; - } + mask = ctx->Light._EnabledLights; + while (mask) { + const int i = u_bit_scan(&mask); + struct gl_light *light = &ctx->Light.Light[i]; + + key->unit[i].light_enabled = 1; + + if (light->EyePosition[3] == 0.0F) + key->unit[i].light_eyepos3_is_zero = 1; + + if (light->SpotCutoff == 180.0F) + key->unit[i].light_spotcutoff_is_180 = 1; + + if (light->ConstantAttenuation != 1.0F || + light->LinearAttenuation != 0.0F || + light->QuadraticAttenuation != 0.0F) + key->unit[i].light_attenuated = 1; } if (check_active_shininess(ctx, key, 0)) { @@ -236,14 +236,17 @@ ctx->Texture._MaxEnabledTexImageUnit != -1) key->texture_enabled_global = 1; - for (i = 0; i < MAX_TEXTURE_COORD_UNITS; i++) { + mask = ctx->Texture._EnabledCoordUnits | ctx->Texture._TexGenEnabled + | ctx->Texture._TexMatEnabled | ctx->Point.CoordReplace; + while (mask) { + const int i = u_bit_scan(&mask); struct gl_texture_unit *texUnit = &ctx->Texture.Unit[i]; if (texUnit->_Current) key->unit[i].texunit_really_enabled = 1; if (ctx->Point.PointSprite) - if (ctx->Point.CoordReplace[i]) + if (ctx->Point.CoordReplace & (1u << i)) key->unit[i].coord_replace = 1; if (ctx->Texture._TexMatEnabled & ENABLE_TEXMAT(i)) @@ -301,7 +304,7 @@ struct tnl_program { const struct state_key *state; - struct gl_vertex_program *program; + struct gl_program *program; GLuint max_inst; /** number of instructions allocated for program */ GLboolean mvp_with_dp4; @@ -380,8 +383,8 @@ exit(1); } - if ((GLuint) bit > p->program->Base.NumTemporaries) - p->program->Base.NumTemporaries = bit; + if ((GLuint) bit > p->program->arb.NumTemporaries) + p->program->arb.NumTemporaries = bit; p->temp_in_use |= 1<<(bit-1); return make_ureg(PROGRAM_TEMPORARY, bit-1); @@ -424,7 +427,7 @@ tokens[2] = s2; tokens[3] = s3; tokens[4] = s4; - idx = _mesa_add_state_reference( p->program->Base.Parameters, tokens ); + idx = _mesa_add_state_reference(p->program->Parameters, tokens ); return make_ureg(PROGRAM_STATE_VAR, idx); } @@ -444,7 +447,7 @@ assert(input < VERT_ATTRIB_MAX); if (p->state->varying_vp_inputs & VERT_BIT(input)) { - p->program->Base.InputsRead |= VERT_BIT(input); + p->program->info.inputs_read |= VERT_BIT(input); return make_ureg(PROGRAM_INPUT, input); } else { @@ -458,7 +461,7 @@ */ static struct ureg register_output( struct tnl_program *p, GLuint output ) { - p->program->Base.OutputsWritten |= BITFIELD64_BIT(output); + p->program->info.outputs_written |= BITFIELD64_BIT(output); return make_ureg(PROGRAM_OUTPUT, output); } @@ -476,8 +479,8 @@ values[1].f = s1; values[2].f = s2; values[3].f = s3; - idx = _mesa_add_unnamed_constant( p->program->Base.Parameters, values, 4, - &swizzle ); + idx = _mesa_add_unnamed_constant(p->program->Parameters, values, 4, + &swizzle ); assert(swizzle == SWIZZLE_NOOP); return make_ureg(PROGRAM_CONSTANT, idx); } @@ -574,34 +577,33 @@ GLuint nr; struct prog_instruction *inst; - assert(p->program->Base.NumInstructions <= p->max_inst); + assert(p->program->arb.NumInstructions <= p->max_inst); - if (p->program->Base.NumInstructions == p->max_inst) { + if (p->program->arb.NumInstructions == p->max_inst) { /* need to extend the program's instruction array */ struct prog_instruction *newInst; /* double the size */ p->max_inst *= 2; - newInst = _mesa_alloc_instructions(p->max_inst); + newInst = + rzalloc_array(p->program, struct prog_instruction, p->max_inst); if (!newInst) { _mesa_error(NULL, GL_OUT_OF_MEMORY, "vertex program build"); return; } - _mesa_copy_instructions(newInst, - p->program->Base.Instructions, - p->program->Base.NumInstructions); + _mesa_copy_instructions(newInst, p->program->arb.Instructions, + p->program->arb.NumInstructions); - _mesa_free_instructions(p->program->Base.Instructions, - p->program->Base.NumInstructions); + ralloc_free(p->program->arb.Instructions); - p->program->Base.Instructions = newInst; + p->program->arb.Instructions = newInst; } - nr = p->program->Base.NumInstructions++; + nr = p->program->arb.NumInstructions++; - inst = &p->program->Base.Instructions[nr]; + inst = &p->program->arb.Instructions[nr]; inst->Opcode = (enum prog_opcode) op; emit_arg( &inst->SrcReg[0], src0 ); @@ -1604,7 +1606,7 @@ static void create_new_program( const struct state_key *key, - struct gl_vertex_program *program, + struct gl_program *program, GLboolean mvp_with_dp4, GLuint max_temps) { @@ -1630,15 +1632,16 @@ * If we need more, we'll grow the instruction array as needed. */ p.max_inst = 32; - p.program->Base.Instructions = _mesa_alloc_instructions(p.max_inst); - p.program->Base.String = NULL; - p.program->Base.NumInstructions = - p.program->Base.NumTemporaries = - p.program->Base.NumParameters = - p.program->Base.NumAttributes = p.program->Base.NumAddressRegs = 0; - p.program->Base.Parameters = _mesa_new_parameter_list(); - p.program->Base.InputsRead = 0; - p.program->Base.OutputsWritten = 0; + p.program->arb.Instructions = + rzalloc_array(program, struct prog_instruction, p.max_inst); + p.program->String = NULL; + p.program->arb.NumInstructions = + p.program->arb.NumTemporaries = + p.program->arb.NumParameters = + p.program->arb.NumAttributes = p.program->arb.NumAddressRegs = 0; + p.program->Parameters = _mesa_new_parameter_list(); + p.program->info.inputs_read = 0; + p.program->info.outputs_written = 0; build_tnl_program( &p ); } @@ -1648,10 +1651,10 @@ * Return a vertex program which implements the current fixed-function * transform/lighting/texgen operations. */ -struct gl_vertex_program * +struct gl_program * _mesa_get_fixed_func_vertex_program(struct gl_context *ctx) { - struct gl_vertex_program *prog; + struct gl_program *prog; struct state_key key; /* Grab all the relevant state and put it in a single structure: @@ -1660,15 +1663,15 @@ /* Look for an already-prepared program for this state: */ - prog = gl_vertex_program( - _mesa_search_program_cache(ctx->VertexProgram.Cache, &key, sizeof(key))); + prog = _mesa_search_program_cache(ctx->VertexProgram.Cache, &key, + sizeof(key)); if (!prog) { /* OK, we'll have to build a new one */ if (0) printf("Build new TNL program\n"); - prog = gl_vertex_program(ctx->Driver.NewProgram(ctx, GL_VERTEX_PROGRAM_ARB, 0)); + prog = ctx->Driver.NewProgram(ctx, GL_VERTEX_PROGRAM_ARB, 0, true); if (!prog) return NULL; @@ -1677,11 +1680,10 @@ ctx->Const.Program[MESA_SHADER_VERTEX].MaxTemps ); if (ctx->Driver.ProgramStringNotify) - ctx->Driver.ProgramStringNotify( ctx, GL_VERTEX_PROGRAM_ARB, - &prog->Base ); + ctx->Driver.ProgramStringNotify(ctx, GL_VERTEX_PROGRAM_ARB, prog); - _mesa_program_cache_insert(ctx, ctx->VertexProgram.Cache, - &key, sizeof(key), &prog->Base); + _mesa_program_cache_insert(ctx, ctx->VertexProgram.Cache, &key, + sizeof(key), prog); } return prog; diff -Nru mesa-12.0.6/src/mesa/main/ffvertex_prog.h mesa-17.0.7/src/mesa/main/ffvertex_prog.h --- mesa-12.0.6/src/mesa/main/ffvertex_prog.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/ffvertex_prog.h 2017-06-01 10:37:10.000000000 +0000 @@ -32,7 +32,7 @@ struct gl_context; -struct gl_vertex_program * +struct gl_program * _mesa_get_fixed_func_vertex_program(struct gl_context *ctx); diff -Nru mesa-12.0.6/src/mesa/main/format_pack.c mesa-17.0.7/src/mesa/main/format_pack.c --- mesa-12.0.6/src/mesa/main/format_pack.c 2017-01-24 01:43:20.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/format_pack.c 2017-06-01 10:38:03.000000000 +0000 @@ -41,8 +41,8 @@ #include "format_pack.h" #include "format_utils.h" #include "macros.h" -#include "../../gallium/auxiliary/util/u_format_rgb9e5.h" -#include "../../gallium/auxiliary/util/u_format_r11g11b10f.h" +#include "util/format_rgb9e5.h" +#include "util/format_r11g11b10f.h" #include "util/format_srgb.h" #define UNPACK(SRC, OFFSET, BITS) (((SRC) >> (OFFSET)) & MAX_UINT(BITS)) diff -Nru mesa-12.0.6/src/mesa/main/format_pack.py mesa-17.0.7/src/mesa/main/format_pack.py --- mesa-12.0.6/src/mesa/main/format_pack.py 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/format_pack.py 2017-06-01 10:37:10.000000000 +0000 @@ -46,8 +46,8 @@ #include "format_pack.h" #include "format_utils.h" #include "macros.h" -#include "../../gallium/auxiliary/util/u_format_rgb9e5.h" -#include "../../gallium/auxiliary/util/u_format_r11g11b10f.h" +#include "util/format_rgb9e5.h" +#include "util/format_r11g11b10f.h" #include "util/format_srgb.h" #define UNPACK(SRC, OFFSET, BITS) (((SRC) >> (OFFSET)) & MAX_UINT(BITS)) diff -Nru mesa-12.0.6/src/mesa/main/formatquery.c mesa-17.0.7/src/mesa/main/formatquery.c --- mesa-12.0.6/src/mesa/main/formatquery.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/formatquery.c 2017-06-01 10:37:10.000000000 +0000 @@ -559,7 +559,7 @@ */ GLint buffer[1]; - /* At this point a internalformat is valid if it is valid as a texture or + /* At this point an internalformat is valid if it is valid as a texture or * as a renderbuffer format. The checks are different because those methods * return different values when passing non supported internalformats */ if (_mesa_base_tex_format(ctx, internalformat) < 0 && @@ -877,6 +877,9 @@ * "Since multisampling is not supported for signed and unsigned * integer internal formats, the value of NUM_SAMPLE_COUNTS will be * zero for such formats. + * + * Since OpenGL ES 3.1 adds support for multisampled integer formats, we + * have to check the version for 30 exactly. */ if (pname == GL_NUM_SAMPLE_COUNTS && ctx->API == API_OPENGLES2 && ctx->Version == 30 && _mesa_is_enum_format_integer(internalformat)) { @@ -902,7 +905,10 @@ * format for representing resources of the specified is * returned in . * - * Therefore, we let the driver answer. + * Therefore, we let the driver answer. Note that if we reach this + * point, it means that the internalformat is supported, so the driver + * is called just to try to get a preferred format. If not supported, + * GL_NONE was already returned and the driver is not called. */ ctx->Driver.QueryInternalFormat(ctx, target, internalformat, pname, buffer); diff -Nru mesa-12.0.6/src/mesa/main/format_unpack.c mesa-17.0.7/src/mesa/main/format_unpack.c --- mesa-12.0.6/src/mesa/main/format_unpack.c 2017-01-24 01:43:20.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/format_unpack.c 2017-06-01 10:38:03.000000000 +0000 @@ -41,8 +41,8 @@ #include "format_unpack.h" #include "format_utils.h" #include "macros.h" -#include "../../gallium/auxiliary/util/u_format_rgb9e5.h" -#include "../../gallium/auxiliary/util/u_format_r11g11b10f.h" +#include "util/format_rgb9e5.h" +#include "util/format_r11g11b10f.h" #include "util/format_srgb.h" #define UNPACK(SRC, OFFSET, BITS) (((SRC) >> (OFFSET)) & MAX_UINT(BITS)) diff -Nru mesa-12.0.6/src/mesa/main/format_unpack.py mesa-17.0.7/src/mesa/main/format_unpack.py --- mesa-12.0.6/src/mesa/main/format_unpack.py 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/format_unpack.py 2017-06-01 10:37:10.000000000 +0000 @@ -46,8 +46,8 @@ #include "format_unpack.h" #include "format_utils.h" #include "macros.h" -#include "../../gallium/auxiliary/util/u_format_rgb9e5.h" -#include "../../gallium/auxiliary/util/u_format_r11g11b10f.h" +#include "util/format_rgb9e5.h" +#include "util/format_r11g11b10f.h" #include "util/format_srgb.h" #define UNPACK(SRC, OFFSET, BITS) (((SRC) >> (OFFSET)) & MAX_UINT(BITS)) diff -Nru mesa-12.0.6/src/mesa/main/framebuffer.c mesa-17.0.7/src/mesa/main/framebuffer.c --- mesa-12.0.6/src/mesa/main/framebuffer.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/framebuffer.c 2017-06-01 10:37:10.000000000 +0000 @@ -256,7 +256,6 @@ *ptr = NULL; } - assert(!*ptr); if (fb) { mtx_lock(&fb->Mutex); @@ -851,7 +850,7 @@ return GL_NONE; } else { - const GLenum format = ctx->ReadBuffer->_ColorReadBuffer->Format; + const mesa_format format = ctx->ReadBuffer->_ColorReadBuffer->Format; const GLenum data_type = _mesa_get_format_datatype(format); if (format == MESA_FORMAT_B8G8R8A8_UNORM) @@ -994,7 +993,8 @@ buffer->DefaultGeometry.NumSamples; } -bool _mesa_is_multisample_enabled(const struct gl_context *ctx) +bool +_mesa_is_multisample_enabled(const struct gl_context *ctx) { /* The sample count may not be validated by the driver, but when it is set, * we know that is in a valid range and no driver should ever validate a @@ -1002,5 +1002,29 @@ */ return ctx->Multisample.Enabled && ctx->DrawBuffer && - _mesa_geometric_nonvalidated_samples(ctx->DrawBuffer) > 1; + _mesa_geometric_nonvalidated_samples(ctx->DrawBuffer) >= 1; +} + +/** + * Is alpha testing enabled and applicable to the currently bound + * framebuffer? + */ +bool +_mesa_is_alpha_test_enabled(const struct gl_context *ctx) +{ + bool buffer0_is_integer = ctx->DrawBuffer->_IntegerBuffers & 0x1; + return (ctx->Color.AlphaEnabled && !buffer0_is_integer); +} + +/** + * Is alpha to coverage enabled and applicable to the currently bound + * framebuffer? + */ +bool +_mesa_is_alpha_to_coverage_enabled(const struct gl_context *ctx) +{ + bool buffer0_is_integer = ctx->DrawBuffer->_IntegerBuffers & 0x1; + return (ctx->Multisample.SampleAlphaToCoverage && + _mesa_is_multisample_enabled(ctx) && + !buffer0_is_integer); } diff -Nru mesa-12.0.6/src/mesa/main/framebuffer.h mesa-17.0.7/src/mesa/main/framebuffer.h --- mesa-12.0.6/src/mesa/main/framebuffer.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/framebuffer.h 2017-06-01 10:37:10.000000000 +0000 @@ -149,4 +149,10 @@ extern bool _mesa_is_multisample_enabled(const struct gl_context *ctx); +extern bool +_mesa_is_alpha_test_enabled(const struct gl_context *ctx); + +extern bool +_mesa_is_alpha_to_coverage_enabled(const struct gl_context *ctx); + #endif /* FRAMEBUFFER_H */ diff -Nru mesa-12.0.6/src/mesa/main/genmipmap.c mesa-17.0.7/src/mesa/main/genmipmap.c --- mesa-12.0.6/src/mesa/main/genmipmap.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/genmipmap.c 2017-06-01 10:37:10.000000000 +0000 @@ -65,8 +65,7 @@ || !ctx->Extensions.EXT_texture_array; break; case GL_TEXTURE_CUBE_MAP_ARRAY: - error = _mesa_is_gles(ctx) || - !ctx->Extensions.ARB_texture_cube_map_array; + error = !_mesa_has_texture_cube_map_array(ctx); break; default: error = true; @@ -95,7 +94,7 @@ internalformat == GL_LUMINANCE || internalformat == GL_ALPHA || internalformat == GL_BGRA_EXT || (_mesa_is_es3_color_renderable(internalformat) && - _mesa_is_es3_texture_filterable(internalformat)); + _mesa_is_es3_texture_filterable(ctx, internalformat)); } return (!_mesa_is_enum_format_integer(internalformat) && diff -Nru mesa-12.0.6/src/mesa/main/get.c mesa-17.0.7/src/mesa/main/get.c --- mesa-12.0.6/src/mesa/main/get.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/get.c 2017-06-01 10:37:10.000000000 +0000 @@ -95,6 +95,10 @@ TYPE_INT_3, TYPE_INT_4, TYPE_INT_N, + TYPE_UINT, + TYPE_UINT_2, + TYPE_UINT_3, + TYPE_UINT_4, TYPE_INT64, TYPE_ENUM, TYPE_ENUM_2, @@ -111,6 +115,7 @@ TYPE_FLOAT_2, TYPE_FLOAT_3, TYPE_FLOAT_4, + TYPE_FLOAT_8, TYPE_FLOATN, TYPE_FLOATN_2, TYPE_FLOATN_3, @@ -141,6 +146,7 @@ EXTRA_API_ES2, EXTRA_API_ES3, EXTRA_API_ES31, + EXTRA_API_ES32, EXTRA_NEW_BUFFERS, EXTRA_NEW_FRAG_CLAMP, EXTRA_VALID_DRAW_BUFFER, @@ -203,6 +209,7 @@ #define CONTEXT_INT(field) CONTEXT_FIELD(field, TYPE_INT) #define CONTEXT_INT2(field) CONTEXT_FIELD(field, TYPE_INT_2) #define CONTEXT_INT64(field) CONTEXT_FIELD(field, TYPE_INT64) +#define CONTEXT_UINT(field) CONTEXT_FIELD(field, TYPE_UINT) #define CONTEXT_ENUM(field) CONTEXT_FIELD(field, TYPE_ENUM) #define CONTEXT_ENUM2(field) CONTEXT_FIELD(field, TYPE_ENUM_2) #define CONTEXT_BOOL(field) CONTEXT_FIELD(field, TYPE_BOOLEAN) @@ -218,6 +225,7 @@ #define CONTEXT_FLOAT2(field) CONTEXT_FIELD(field, TYPE_FLOAT_2) #define CONTEXT_FLOAT3(field) CONTEXT_FIELD(field, TYPE_FLOAT_3) #define CONTEXT_FLOAT4(field) CONTEXT_FIELD(field, TYPE_FLOAT_4) +#define CONTEXT_FLOAT8(field) CONTEXT_FIELD(field, TYPE_FLOAT_8) #define CONTEXT_MATRIX(field) CONTEXT_FIELD(field, TYPE_MATRIX) #define CONTEXT_MATRIX_T(field) CONTEXT_FIELD(field, TYPE_MATRIX_T) @@ -402,6 +410,12 @@ EXTRA_END }; +static const int extra_ARB_viewport_array_or_oes_viewport_array[] = { + EXT(ARB_viewport_array), + EXT(OES_viewport_array), + EXTRA_END +}; + static const int extra_ARB_gpu_shader5_or_oes_geometry_shader[] = { EXT(ARB_gpu_shader5), EXTRA_EXT_ES_GS, @@ -414,6 +428,12 @@ EXTRA_END }; +static const int extra_ES32[] = { + EXT(ARB_ES3_2_compatibility), + EXTRA_API_ES32, + EXTRA_END +}; + static const int extra_KHR_robustness_or_GL[] = { EXT(KHR_robustness), EXTRA_API_GL, @@ -421,6 +441,11 @@ EXTRA_END }; +static const int extra_INTEL_conservative_rasterization[] = { + EXT(INTEL_conservative_rasterization), + EXTRA_END +}; + EXTRA_EXT(ARB_texture_cube_map); EXTRA_EXT(EXT_texture_array); EXTRA_EXT(NV_fog_distance); @@ -450,14 +475,13 @@ EXTRA_EXT(ARB_blend_func_extended); EXTRA_EXT(ARB_uniform_buffer_object); EXTRA_EXT(ARB_timer_query); -EXTRA_EXT(ARB_texture_cube_map_array); +EXTRA_EXT2(ARB_texture_cube_map_array, OES_texture_cube_map_array); EXTRA_EXT(ARB_texture_buffer_range); EXTRA_EXT(ARB_texture_multisample); EXTRA_EXT(ARB_texture_gather); EXTRA_EXT(ARB_shader_atomic_counters); EXTRA_EXT(ARB_draw_indirect); EXTRA_EXT(ARB_shader_image_load_store); -EXTRA_EXT(ARB_viewport_array); EXTRA_EXT(ARB_query_buffer_object); EXTRA_EXT2(ARB_transform_feedback3, ARB_gpu_shader5); EXTRA_EXT(INTEL_performance_query); @@ -472,6 +496,11 @@ EXTRA_EXT(ATI_meminfo); EXTRA_EXT(NVX_gpu_memory_info); EXTRA_EXT(ARB_cull_distance); +EXTRA_EXT(EXT_window_rectangles); +EXTRA_EXT(KHR_blend_equation_advanced_coherent); +EXTRA_EXT(OES_primitive_bounding_box); +EXTRA_EXT(ARB_compute_variable_group_size); +EXTRA_EXT(KHR_robustness); static const int extra_ARB_color_buffer_float_or_glcore[] = { @@ -537,6 +566,13 @@ EXTRA_END }; +static const int extra_EXT_shader_framebuffer_fetch[] = { + EXTRA_API_ES2, + EXTRA_API_ES3, + EXT(MESA_shader_framebuffer_fetch), + EXTRA_END +}; + /* This is the big table describing all the enums we accept in * glGet*v(). The table is partitioned into six parts: enums * understood by all GL APIs (OpenGL, GLES and GLES2), enums shared @@ -561,71 +597,6 @@ * collisions for any enum (typical numbers). And the code is very * simple, even though it feels a little magic. */ -#ifdef GET_DEBUG -static void -print_table_stats(int api) -{ - int i, j, collisions[11], count, hash, mask; - const struct value_desc *d; - const char *api_names[] = { - [API_OPENGL_COMPAT] = "GL", - [API_OPENGL_CORE] = "GL_CORE", - [API_OPENGLES] = "GLES", - [API_OPENGLES2] = "GLES2", - }; - const char *api_name; - - api_name = api < ARRAY_SIZE(api_names) ? api_names[api] : "N/A"; - count = 0; - mask = ARRAY_SIZE(table(api)) - 1; - memset(collisions, 0, sizeof collisions); - - for (i = 0; i < ARRAY_SIZE(table(api)); i++) { - if (!table(api)[i]) - continue; - count++; - d = &values[table(api)[i]]; - hash = (d->pname * prime_factor); - j = 0; - while (1) { - if (values[table(api)[hash & mask]].pname == d->pname) - break; - hash += prime_step; - j++; - } - - if (j < 10) - collisions[j]++; - else - collisions[10]++; - } - - printf("number of enums for %s: %d (total %ld)\n", - api_name, count, ARRAY_SIZE(values)); - for (i = 0; i < ARRAY_SIZE(collisions) - 1; i++) - if (collisions[i] > 0) - printf(" %d enums with %d %scollisions\n", - collisions[i], i, i == 10 ? "or more " : ""); -} -#endif - -/** - * Initialize the enum hash for a given API - * - * This is called from one_time_init() to insert the enum values that - * are valid for the API in question into the enum hash table. - * - * \param the current context, for determining the API in question - */ -void _mesa_init_get_hash(struct gl_context *ctx) -{ -#ifdef GET_DEBUG - print_table_stats(ctx->API); -#else - (void) ctx; -#endif -} - /** * Handle irregular enums * @@ -646,7 +617,7 @@ find_custom_value(struct gl_context *ctx, const struct value_desc *d, union value *v) { struct gl_buffer_object **buffer_obj; - struct gl_vertex_attrib_array *array; + struct gl_array_attributes *array; GLuint unit, *p; switch (d->pname) { @@ -917,7 +888,7 @@ break; case GL_TEXTURE_COORD_ARRAY_BUFFER_BINDING_ARB: v->value_int = - ctx->Array.VAO->VertexBinding[VERT_ATTRIB_TEX(ctx->Array.ActiveTexture)].BufferObj->Name; + ctx->Array.VAO->BufferBinding[VERT_ATTRIB_TEX(ctx->Array.ActiveTexture)].BufferObj->Name; break; case GL_ELEMENT_ARRAY_BUFFER_BINDING_ARB: v->value_int = ctx->Array.VAO->IndexBufferObj->Name; @@ -983,7 +954,7 @@ ctx->CurrentRenderbuffer ? ctx->CurrentRenderbuffer->Name : 0; break; case GL_POINT_SIZE_ARRAY_BUFFER_BINDING_OES: - v->value_int = ctx->Array.VAO->VertexBinding[VERT_ATTRIB_POINT_SIZE].BufferObj->Name; + v->value_int = ctx->Array.VAO->BufferBinding[VERT_ATTRIB_POINT_SIZE].BufferObj->Name; break; case GL_FOG_COLOR: @@ -1115,6 +1086,10 @@ case GL_SAMPLE_BUFFERS: v->value_int = _mesa_geometric_samples(ctx->DrawBuffer) > 0; break; + /* GL_EXT_textrue_integer */ + case GL_RGBA_INTEGER_MODE_EXT: + v->value_int = (ctx->DrawBuffer->_IntegerBuffers != 0); + break; /* GL_ATI_meminfo & GL_NVX_gpu_memory_info */ case GL_VBO_FREE_MEMORY_ATI: case GL_TEXTURE_FREE_MEMORY_ATI: @@ -1224,6 +1199,11 @@ if (_mesa_is_gles31(ctx)) api_found = GL_TRUE; break; + case EXTRA_API_ES32: + api_check = GL_TRUE; + if (_mesa_is_gles32(ctx)) + api_found = GL_TRUE; + break; case EXTRA_API_GL: api_check = GL_TRUE; if (_mesa_is_desktop_gl(ctx)) @@ -1372,12 +1352,14 @@ * value since it's compatible with GLES2 its entry in table_set[] is at the * end. */ - STATIC_ASSERT(ARRAY_SIZE(table_set) == API_OPENGL_LAST + 3); - if (_mesa_is_gles3(ctx)) { - api = API_OPENGL_LAST + 1; - } - if (_mesa_is_gles31(ctx)) { - api = API_OPENGL_LAST + 2; + STATIC_ASSERT(ARRAY_SIZE(table_set) == API_OPENGL_LAST + 4); + if (ctx->API == API_OPENGLES2) { + if (ctx->Version >= 32) + api = API_OPENGL_LAST + 3; + else if (ctx->Version >= 31) + api = API_OPENGL_LAST + 2; + else if (ctx->Version >= 30) + api = API_OPENGL_LAST + 1; } mask = ARRAY_SIZE(table(api)) - 1; hash = (pname * prime_factor); @@ -1454,6 +1436,11 @@ params[0] = INT_TO_BOOLEAN(d->offset); break; + case TYPE_FLOAT_8: + params[7] = FLOAT_TO_BOOLEAN(((GLfloat *) p)[7]); + params[6] = FLOAT_TO_BOOLEAN(((GLfloat *) p)[6]); + params[5] = FLOAT_TO_BOOLEAN(((GLfloat *) p)[5]); + params[4] = FLOAT_TO_BOOLEAN(((GLfloat *) p)[4]); case TYPE_FLOAT_4: case TYPE_FLOATN_4: params[3] = FLOAT_TO_BOOLEAN(((GLfloat *) p)[3]); @@ -1475,13 +1462,17 @@ break; case TYPE_INT_4: + case TYPE_UINT_4: params[3] = INT_TO_BOOLEAN(((GLint *) p)[3]); case TYPE_INT_3: + case TYPE_UINT_3: params[2] = INT_TO_BOOLEAN(((GLint *) p)[2]); case TYPE_INT_2: + case TYPE_UINT_2: case TYPE_ENUM_2: params[1] = INT_TO_BOOLEAN(((GLint *) p)[1]); case TYPE_INT: + case TYPE_UINT: case TYPE_ENUM: params[0] = INT_TO_BOOLEAN(((GLint *) p)[0]); break; @@ -1542,6 +1533,11 @@ params[0] = (GLfloat) d->offset; break; + case TYPE_FLOAT_8: + params[7] = ((GLfloat *) p)[7]; + params[6] = ((GLfloat *) p)[6]; + params[5] = ((GLfloat *) p)[5]; + params[4] = ((GLfloat *) p)[4]; case TYPE_FLOAT_4: case TYPE_FLOATN_4: params[3] = ((GLfloat *) p)[3]; @@ -1576,7 +1572,17 @@ case TYPE_INT_N: for (i = 0; i < v.value_int_n.n; i++) - params[i] = INT_TO_FLOAT(v.value_int_n.ints[i]); + params[i] = (GLfloat) v.value_int_n.ints[i]; + break; + + case TYPE_UINT_4: + params[3] = (GLfloat) (((GLuint *) p)[3]); + case TYPE_UINT_3: + params[2] = (GLfloat) (((GLuint *) p)[2]); + case TYPE_UINT_2: + params[1] = (GLfloat) (((GLuint *) p)[1]); + case TYPE_UINT: + params[0] = (GLfloat) (((GLuint *) p)[0]); break; case TYPE_INT64: @@ -1630,6 +1636,11 @@ params[0] = d->offset; break; + case TYPE_FLOAT_8: + params[7] = IROUND(((GLfloat *) p)[7]); + params[6] = IROUND(((GLfloat *) p)[6]); + params[5] = IROUND(((GLfloat *) p)[5]); + params[4] = IROUND(((GLfloat *) p)[4]); case TYPE_FLOAT_4: params[3] = IROUND(((GLfloat *) p)[3]); case TYPE_FLOAT_3: @@ -1657,13 +1668,17 @@ break; case TYPE_INT_4: + case TYPE_UINT_4: params[3] = ((GLint *) p)[3]; case TYPE_INT_3: + case TYPE_UINT_3: params[2] = ((GLint *) p)[2]; case TYPE_INT_2: + case TYPE_UINT_2: case TYPE_ENUM_2: params[1] = ((GLint *) p)[1]; case TYPE_INT: + case TYPE_UINT: case TYPE_ENUM: params[0] = ((GLint *) p)[0]; break; @@ -1724,6 +1739,11 @@ params[0] = d->offset; break; + case TYPE_FLOAT_8: + params[7] = IROUND64(((GLfloat *) p)[7]); + params[6] = IROUND64(((GLfloat *) p)[6]); + params[5] = IROUND64(((GLfloat *) p)[5]); + params[4] = IROUND64(((GLfloat *) p)[4]); case TYPE_FLOAT_4: params[3] = IROUND64(((GLfloat *) p)[3]); case TYPE_FLOAT_3: @@ -1767,6 +1787,16 @@ params[i] = INT_TO_BOOLEAN(v.value_int_n.ints[i]); break; + case TYPE_UINT_4: + params[3] = ((GLuint *) p)[3]; + case TYPE_UINT_3: + params[2] = ((GLuint *) p)[2]; + case TYPE_UINT_2: + params[1] = ((GLuint *) p)[1]; + case TYPE_UINT: + params[0] = ((GLuint *) p)[0]; + break; + case TYPE_INT64: params[0] = ((GLint64 *) p)[0]; break; @@ -1818,6 +1848,11 @@ params[0] = d->offset; break; + case TYPE_FLOAT_8: + params[7] = ((GLfloat *) p)[7]; + params[6] = ((GLfloat *) p)[6]; + params[5] = ((GLfloat *) p)[5]; + params[4] = ((GLfloat *) p)[4]; case TYPE_FLOAT_4: case TYPE_FLOATN_4: params[3] = ((GLfloat *) p)[3]; @@ -1855,6 +1890,16 @@ params[i] = v.value_int_n.ints[i]; break; + case TYPE_UINT_4: + params[3] = ((GLuint *) p)[3]; + case TYPE_UINT_3: + params[2] = ((GLuint *) p)[2]; + case TYPE_UINT_2: + params[1] = ((GLuint *) p)[1]; + case TYPE_UINT: + params[0] = ((GLuint *) p)[0]; + break; + case TYPE_INT64: params[0] = (GLdouble) (((GLint64 *) p)[0]); break; @@ -1922,7 +1967,7 @@ _mesa_has_OES_texture_buffer(ctx)) ? TEXTURE_BUFFER_INDEX : -1; case GL_TEXTURE_BINDING_CUBE_MAP_ARRAY: - return _mesa_is_desktop_gl(ctx) && ctx->Extensions.ARB_texture_cube_map_array + return _mesa_has_texture_cube_map_array(ctx) ? TEXTURE_CUBE_ARRAY_INDEX : -1; case GL_TEXTURE_BINDING_2D_MULTISAMPLE: return _mesa_is_desktop_gl(ctx) && ctx->Extensions.ARB_texture_multisample @@ -2017,6 +2062,17 @@ v->value_int_4[3] = ctx->Scissor.ScissorArray[index].Height; return TYPE_INT_4; + case GL_WINDOW_RECTANGLE_EXT: + if (!ctx->Extensions.EXT_window_rectangles) + goto invalid_enum; + if (index >= ctx->Const.MaxWindowRectangles) + goto invalid_value; + v->value_int_4[0] = ctx->Scissor.WindowRects[index].X; + v->value_int_4[1] = ctx->Scissor.WindowRects[index].Y; + v->value_int_4[2] = ctx->Scissor.WindowRects[index].Width; + v->value_int_4[3] = ctx->Scissor.WindowRects[index].Height; + return TYPE_INT_4; + case GL_VIEWPORT: if (index >= ctx->Const.MaxViewports) goto invalid_value; @@ -2150,7 +2206,7 @@ goto invalid_enum; if (index >= ctx->Const.Program[MESA_SHADER_VERTEX].MaxAttribs) goto invalid_value; - v->value_int = ctx->Array.VAO->VertexBinding[VERT_ATTRIB_GENERIC(index)].InstanceDivisor; + v->value_int = ctx->Array.VAO->BufferBinding[VERT_ATTRIB_GENERIC(index)].InstanceDivisor; return TYPE_INT; case GL_VERTEX_BINDING_OFFSET: @@ -2158,7 +2214,7 @@ goto invalid_enum; if (index >= ctx->Const.Program[MESA_SHADER_VERTEX].MaxAttribs) goto invalid_value; - v->value_int = ctx->Array.VAO->VertexBinding[VERT_ATTRIB_GENERIC(index)].Offset; + v->value_int = ctx->Array.VAO->BufferBinding[VERT_ATTRIB_GENERIC(index)].Offset; return TYPE_INT; case GL_VERTEX_BINDING_STRIDE: @@ -2166,7 +2222,7 @@ goto invalid_enum; if (index >= ctx->Const.Program[MESA_SHADER_VERTEX].MaxAttribs) goto invalid_value; - v->value_int = ctx->Array.VAO->VertexBinding[VERT_ATTRIB_GENERIC(index)].Stride; + v->value_int = ctx->Array.VAO->BufferBinding[VERT_ATTRIB_GENERIC(index)].Stride; return TYPE_INT; case GL_VERTEX_BINDING_BUFFER: @@ -2174,7 +2230,7 @@ goto invalid_enum; if (index >= ctx->Const.Program[MESA_SHADER_VERTEX].MaxAttribs) goto invalid_value; - v->value_int = ctx->Array.VAO->VertexBinding[VERT_ATTRIB_GENERIC(index)].BufferObj->Name; + v->value_int = ctx->Array.VAO->BufferBinding[VERT_ATTRIB_GENERIC(index)].BufferObj->Name; return TYPE_INT; /* ARB_shader_image_load_store */ @@ -2290,6 +2346,15 @@ goto invalid_value; v->value_int = ctx->Const.MaxComputeWorkGroupSize[index]; return TYPE_INT; + + /* ARB_compute_variable_group_size */ + case GL_MAX_COMPUTE_VARIABLE_GROUP_SIZE_ARB: + if (!ctx->Extensions.ARB_compute_variable_group_size) + goto invalid_enum; + if (index >= 3) + goto invalid_value; + v->value_int = ctx->Const.MaxComputeVariableGroupSize[index]; + return TYPE_INT; } invalid_enum: @@ -2311,9 +2376,11 @@ switch (type) { case TYPE_INT: + case TYPE_UINT: params[0] = INT_TO_BOOLEAN(v.value_int); break; case TYPE_INT_4: + case TYPE_UINT_4: params[0] = INT_TO_BOOLEAN(v.value_int_4[0]); params[1] = INT_TO_BOOLEAN(v.value_int_4[1]); params[2] = INT_TO_BOOLEAN(v.value_int_4[2]); @@ -2356,9 +2423,11 @@ break; case TYPE_INT: + case TYPE_UINT: params[0] = v.value_int; break; case TYPE_INT_4: + case TYPE_UINT_4: params[0] = v.value_int_4[0]; params[1] = v.value_int_4[1]; params[2] = v.value_int_4[2]; @@ -2389,6 +2458,15 @@ params[2] = v.value_int_4[2]; params[3] = v.value_int_4[3]; break; + case TYPE_UINT: + params[0] = (GLuint) v.value_int; + break; + case TYPE_UINT_4: + params[0] = (GLuint) v.value_int_4[0]; + params[1] = (GLuint) v.value_int_4[1]; + params[2] = (GLuint) v.value_int_4[2]; + params[3] = (GLuint) v.value_int_4[3]; + break; case TYPE_INT64: params[0] = v.value_int64; break; @@ -2441,7 +2519,17 @@ case TYPE_INT_N: for (i = 0; i < v.value_int_n.n; i++) - params[i] = INT_TO_FLOAT(v.value_int_n.ints[i]); + params[i] = (GLfloat) v.value_int_n.ints[i]; + break; + + case TYPE_UINT_4: + params[3] = (GLfloat) ((GLuint) v.value_int_4[3]); + case TYPE_UINT_3: + params[2] = (GLfloat) ((GLuint) v.value_int_4[2]); + case TYPE_UINT_2: + params[1] = (GLfloat) ((GLuint) v.value_int_4[1]); + case TYPE_UINT: + params[0] = (GLfloat) ((GLuint) v.value_int_4[0]); break; case TYPE_INT64: @@ -2513,7 +2601,17 @@ case TYPE_INT_N: for (i = 0; i < v.value_int_n.n; i++) - params[i] = (GLdouble) INT_TO_FLOAT(v.value_int_n.ints[i]); + params[i] = (GLdouble) v.value_int_n.ints[i]; + break; + + case TYPE_UINT_4: + params[3] = (GLdouble) ((GLuint) v.value_int_4[3]); + case TYPE_UINT_3: + params[2] = (GLdouble) ((GLuint) v.value_int_4[2]); + case TYPE_UINT_2: + params[1] = (GLdouble) ((GLuint) v.value_int_4[1]); + case TYPE_UINT: + params[0] = (GLdouble) ((GLuint) v.value_int_4[0]); break; case TYPE_INT64: @@ -2579,13 +2677,17 @@ break; case TYPE_INT_4: + case TYPE_UINT_4: params[3] = INT_TO_FIXED(((GLint *) p)[3]); case TYPE_INT_3: + case TYPE_UINT_3: params[2] = INT_TO_FIXED(((GLint *) p)[2]); case TYPE_INT_2: + case TYPE_UINT_2: case TYPE_ENUM_2: params[1] = INT_TO_FIXED(((GLint *) p)[1]); case TYPE_INT: + case TYPE_UINT: case TYPE_ENUM: params[0] = INT_TO_FIXED(((GLint *) p)[0]); break; diff -Nru mesa-12.0.6/src/mesa/main/get_hash_generator.py mesa-17.0.7/src/mesa/main/get_hash_generator.py --- mesa-12.0.6/src/mesa/main/get_hash_generator.py 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/get_hash_generator.py 2017-06-01 10:37:10.000000000 +0000 @@ -44,7 +44,7 @@ prime_step = 281 hash_table_size = 1024 -gl_apis=set(["GL", "GL_CORE", "GLES", "GLES2", "GLES3", "GLES31"]) +gl_apis=set(["GL", "GL_CORE", "GLES", "GLES2", "GLES3", "GLES31", "GLES32"]) def print_header(): print "typedef const unsigned short table_t[%d];\n" % (hash_table_size) @@ -69,6 +69,7 @@ 'GL_CORE', 'GLES3', # Not in gl_api enum in mtypes.h 'GLES31', # Not in gl_api enum in mtypes.h + 'GLES32', # Not in gl_api enum in mtypes.h ] def api_index(api): @@ -168,13 +169,18 @@ for api in valid_apis: add_to_hash_table(tables[api], hash_val, len(params)) - # Also add GLES2 items to the GLES3 and GLES31 hash table + # Also add GLES2 items to the GLES3+ hash tables if api == "GLES2": add_to_hash_table(tables["GLES3"], hash_val, len(params)) add_to_hash_table(tables["GLES31"], hash_val, len(params)) - # Also add GLES3 items to the GLES31 hash table + add_to_hash_table(tables["GLES32"], hash_val, len(params)) + # Also add GLES3 items to the GLES31+ hash tables if api == "GLES3": add_to_hash_table(tables["GLES31"], hash_val, len(params)) + add_to_hash_table(tables["GLES32"], hash_val, len(params)) + # Also add GLES31 items to the GLES32+ hash tables + if api == "GLES31": + add_to_hash_table(tables["GLES32"], hash_val, len(params)) params.append(["GL_" + enum_name, param[1]]) sorted_tables={} @@ -210,7 +216,8 @@ die("missing descriptor file (-f)\n") # generate the code for all APIs - enabled_apis = set(["GLES", "GLES2", "GLES3", "GLES31", "GL", "GL_CORE"]) + enabled_apis = set(["GLES", "GLES2", "GLES3", "GLES31", "GLES32", + "GL", "GL_CORE"]) try: api_desc = gl_XML.parse_GL_API(api_desc_file) diff -Nru mesa-12.0.6/src/mesa/main/get_hash.h mesa-17.0.7/src/mesa/main/get_hash.h --- mesa-12.0.6/src/mesa/main/get_hash.h 2017-01-24 01:43:22.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/get_hash.h 2017-06-01 10:38:04.000000000 +0000 @@ -41,10 +41,10 @@ { GL_STENCIL_FUNC, LOC_CUSTOM, TYPE_ENUM, NO_OFFSET, NO_EXTRA }, { GL_STENCIL_PASS_DEPTH_FAIL, LOC_CUSTOM, TYPE_ENUM, NO_OFFSET, NO_EXTRA }, { GL_STENCIL_PASS_DEPTH_PASS, LOC_CUSTOM, TYPE_ENUM, NO_OFFSET, NO_EXTRA }, - { GL_STENCIL_REF, LOC_CUSTOM, TYPE_INT, NO_OFFSET, NO_EXTRA }, + { GL_STENCIL_REF, LOC_CUSTOM, TYPE_UINT, NO_OFFSET, NO_EXTRA }, { GL_STENCIL_TEST, CONTEXT_BOOL(Stencil.Enabled), NO_EXTRA }, - { GL_STENCIL_VALUE_MASK, LOC_CUSTOM, TYPE_INT, NO_OFFSET, NO_EXTRA }, - { GL_STENCIL_WRITEMASK, LOC_CUSTOM, TYPE_INT, NO_OFFSET, NO_EXTRA }, + { GL_STENCIL_VALUE_MASK, LOC_CUSTOM, TYPE_UINT, NO_OFFSET, NO_EXTRA }, + { GL_STENCIL_WRITEMASK, LOC_CUSTOM, TYPE_UINT, NO_OFFSET, NO_EXTRA }, { GL_SUBPIXEL_BITS, CONTEXT_INT(Const.SubPixelBits), NO_EXTRA }, { GL_TEXTURE_BINDING_2D, LOC_CUSTOM, TYPE_INT, TEXTURE_2D_INDEX, NO_EXTRA }, { GL_UNPACK_ALIGNMENT, CONTEXT_INT(Unpack.Alignment), NO_EXTRA }, @@ -169,19 +169,19 @@ { GL_COLOR_ARRAY_SIZE, LOC_CUSTOM, TYPE_INT, 0, NO_EXTRA }, { GL_COLOR_ARRAY_TYPE, ARRAY_ENUM(VertexAttrib[VERT_ATTRIB_COLOR0].Type), NO_EXTRA }, { GL_COLOR_ARRAY_STRIDE, ARRAY_INT(VertexAttrib[VERT_ATTRIB_COLOR0].Stride), NO_EXTRA }, - { GL_TEXTURE_COORD_ARRAY, LOC_CUSTOM, TYPE_BOOLEAN, offsetof(struct gl_vertex_attrib_array, Enabled), NO_EXTRA }, - { GL_TEXTURE_COORD_ARRAY_SIZE, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_attrib_array, Size), NO_EXTRA }, - { GL_TEXTURE_COORD_ARRAY_TYPE, LOC_CUSTOM, TYPE_ENUM, offsetof(struct gl_vertex_attrib_array, Type), NO_EXTRA }, - { GL_TEXTURE_COORD_ARRAY_STRIDE, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_attrib_array, Stride), NO_EXTRA }, + { GL_TEXTURE_COORD_ARRAY, LOC_CUSTOM, TYPE_BOOLEAN, offsetof(struct gl_array_attributes, Enabled), NO_EXTRA }, + { GL_TEXTURE_COORD_ARRAY_SIZE, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_array_attributes, Size), NO_EXTRA }, + { GL_TEXTURE_COORD_ARRAY_TYPE, LOC_CUSTOM, TYPE_ENUM, offsetof(struct gl_array_attributes, Type), NO_EXTRA }, + { GL_TEXTURE_COORD_ARRAY_STRIDE, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_array_attributes, Stride), NO_EXTRA }, { GL_MAX_TEXTURE_UNITS, CONTEXT_INT(Const.MaxTextureUnits), NO_EXTRA }, { GL_CLIENT_ACTIVE_TEXTURE, LOC_CUSTOM, TYPE_INT, 0, NO_EXTRA }, { GL_TEXTURE_CUBE_MAP_ARB, LOC_CUSTOM, TYPE_BOOLEAN, 0, NO_EXTRA }, { GL_TEXTURE_GEN_STR_OES, LOC_TEXUNIT, TYPE_BIT_0, offsetof(struct gl_texture_unit, TexGenEnabled), NO_EXTRA }, { GL_MULTISAMPLE_ARB, CONTEXT_BOOL(Multisample.Enabled), NO_EXTRA }, { GL_SAMPLE_ALPHA_TO_ONE_ARB, CONTEXT_BOOL(Multisample.SampleAlphaToOne), NO_EXTRA }, - { GL_VERTEX_ARRAY_BUFFER_BINDING_ARB, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, VertexBinding[VERT_ATTRIB_POS].BufferObj), NO_EXTRA }, - { GL_NORMAL_ARRAY_BUFFER_BINDING_ARB, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, VertexBinding[VERT_ATTRIB_NORMAL].BufferObj), NO_EXTRA }, - { GL_COLOR_ARRAY_BUFFER_BINDING_ARB, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, VertexBinding[VERT_ATTRIB_COLOR0].BufferObj), NO_EXTRA }, + { GL_VERTEX_ARRAY_BUFFER_BINDING_ARB, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, BufferBinding[VERT_ATTRIB_POS].BufferObj), NO_EXTRA }, + { GL_NORMAL_ARRAY_BUFFER_BINDING_ARB, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, BufferBinding[VERT_ATTRIB_NORMAL].BufferObj), NO_EXTRA }, + { GL_COLOR_ARRAY_BUFFER_BINDING_ARB, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, BufferBinding[VERT_ATTRIB_COLOR0].BufferObj), NO_EXTRA }, { GL_TEXTURE_COORD_ARRAY_BUFFER_BINDING_ARB, LOC_CUSTOM, TYPE_INT, NO_OFFSET, NO_EXTRA }, { GL_POINT_SPRITE_NV, CONTEXT_BOOL(Point.PointSprite), extra_NV_point_sprite_ARB_point_sprite }, { GL_POINT_SIZE_ARRAY_OES, ARRAY_FIELD(VertexAttrib[VERT_ATTRIB_POINT_SIZE].Enabled, TYPE_BOOLEAN), NO_EXTRA }, @@ -214,9 +214,9 @@ { GL_MAX_COMBINED_TEXTURE_IMAGE_UNITS_ARB, CONTEXT_INT(Const.MaxCombinedTextureImageUnits), extra_ARB_vertex_shader }, { GL_CURRENT_PROGRAM, LOC_CUSTOM, TYPE_INT, 0, NO_EXTRA }, { GL_STENCIL_BACK_FUNC, CONTEXT_ENUM(Stencil.Function[1]), NO_EXTRA }, - { GL_STENCIL_BACK_VALUE_MASK, CONTEXT_INT(Stencil.ValueMask[1]), NO_EXTRA }, - { GL_STENCIL_BACK_WRITEMASK, CONTEXT_INT(Stencil.WriteMask[1]), NO_EXTRA }, - { GL_STENCIL_BACK_REF, LOC_CUSTOM, TYPE_INT, NO_OFFSET, NO_EXTRA }, + { GL_STENCIL_BACK_VALUE_MASK, CONTEXT_UINT(Stencil.ValueMask[1]), NO_EXTRA }, + { GL_STENCIL_BACK_WRITEMASK, CONTEXT_UINT(Stencil.WriteMask[1]), NO_EXTRA }, + { GL_STENCIL_BACK_REF, LOC_CUSTOM, TYPE_UINT, NO_OFFSET, NO_EXTRA }, { GL_STENCIL_BACK_FAIL, CONTEXT_ENUM(Stencil.FailFunc[1]), NO_EXTRA }, { GL_STENCIL_BACK_PASS_DEPTH_FAIL, CONTEXT_ENUM(Stencil.ZFailFunc[1]), NO_EXTRA }, { GL_STENCIL_BACK_PASS_DEPTH_PASS, CONTEXT_ENUM(Stencil.ZPassFunc[1]), NO_EXTRA }, @@ -239,6 +239,8 @@ { GL_PERFQUERY_GPA_EXTENDED_COUNTERS_INTEL, CONST(PERFQUERY_HAVE_GPA_EXTENDED_COUNTERS), extra_INTEL_performance_query }, { GL_CONTEXT_RELEASE_BEHAVIOR, CONTEXT_ENUM(Const.ContextReleaseBehavior), NO_EXTRA }, { GL_MAX_DUAL_SOURCE_DRAW_BUFFERS, CONTEXT_INT(Const.MaxDualSourceDrawBuffers), extra_ARB_blend_func_extended }, + { GL_BLEND_ADVANCED_COHERENT_KHR, CONTEXT_BOOL(Color.BlendCoherent), extra_KHR_blend_equation_advanced_coherent }, + { GL_CONTEXT_ROBUST_ACCESS, CONTEXT_ENUM(Const.RobustAccess), extra_KHR_robustness }, { GL_RESET_NOTIFICATION_STRATEGY_ARB, CONTEXT_ENUM(Const.ResetStrategy), extra_KHR_robustness_or_GL }, { GL_MAX_TEXTURE_LOD_BIAS_EXT, CONTEXT_FLOAT(Const.MaxTextureLodBias), NO_EXTRA }, { GL_NUM_EXTENSIONS, LOC_CUSTOM, TYPE_INT, 0, extra_gl30_es3 }, @@ -278,6 +280,10 @@ { GL_MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS, CONTEXT_INT(Const.MaxTransformFeedbackInterleavedComponents), extra_EXT_transform_feedback }, { GL_MAX_TRANSFORM_FEEDBACK_SEPARATE_ATTRIBS, CONTEXT_INT(Const.MaxTransformFeedbackBuffers), extra_EXT_transform_feedback }, { GL_MAX_TRANSFORM_FEEDBACK_SEPARATE_COMPONENTS, CONTEXT_INT(Const.MaxTransformFeedbackSeparateComponents), extra_EXT_transform_feedback }, + { GL_MAX_WINDOW_RECTANGLES_EXT, CONTEXT_INT(Const.MaxWindowRectangles), extra_EXT_window_rectangles }, + { GL_NUM_WINDOW_RECTANGLES_EXT, CONTEXT_INT(Scissor.NumWindowRects), extra_EXT_window_rectangles }, + { GL_WINDOW_RECTANGLE_MODE_EXT, CONTEXT_ENUM(Scissor.WindowRectMode), extra_EXT_window_rectangles }, + { GL_FRAGMENT_SHADER_DISCARDS_SAMPLES_EXT, CONTEXT_BOOL(Extensions.MESA_shader_framebuffer_fetch), extra_EXT_shader_framebuffer_fetch }, { GL_TEXTURE_BINDING_EXTERNAL_OES, LOC_CUSTOM, TYPE_INT, TEXTURE_EXTERNAL_INDEX, extra_OES_EGL_image_external }, { GL_TEXTURE_EXTERNAL_OES, LOC_CUSTOM, TYPE_BOOLEAN, 0, extra_OES_EGL_image_external }, { GL_MAX_IMAGE_UNITS, CONTEXT_INT(Const.MaxImageUnits), extra_ARB_shader_image_load_store }, @@ -330,6 +336,7 @@ { GL_SHADER_STORAGE_BUFFER_OFFSET_ALIGNMENT, CONTEXT_INT(Const.ShaderStorageBufferOffsetAlignment), extra_ARB_shader_storage_buffer_object_es31 }, { GL_SHADER_STORAGE_BUFFER_BINDING, LOC_CUSTOM, TYPE_INT, 0, extra_ARB_shader_storage_buffer_object_es31 }, { GL_MAX_COMBINED_SHADER_OUTPUT_RESOURCES, CONTEXT_INT(Const.MaxCombinedShaderOutputResources), extra_ARB_shader_image_load_store_shader_storage_buffer_object_es31 }, + { GL_TEXTURE_BINDING_CUBE_MAP_ARRAY_ARB, LOC_CUSTOM, TYPE_INT, TEXTURE_CUBE_ARRAY_INDEX, extra_ARB_texture_cube_map_array_OES_texture_cube_map_array }, { GL_MIN_FRAGMENT_INTERPOLATION_OFFSET, CONTEXT_FLOAT(Const.MinFragmentInterpolationOffset), extra_ARB_gpu_shader5_or_OES_sample_variables }, { GL_MAX_FRAGMENT_INTERPOLATION_OFFSET, CONTEXT_FLOAT(Const.MaxFragmentInterpolationOffset), extra_ARB_gpu_shader5_or_OES_sample_variables }, { GL_FRAGMENT_INTERPOLATION_OFFSET_BITS, CONST(FRAGMENT_INTERPOLATION_OFFSET_BITS), extra_ARB_gpu_shader5_or_OES_sample_variables }, @@ -340,10 +347,38 @@ { GL_MAX_GEOMETRY_OUTPUT_VERTICES, CONTEXT_INT(Const.MaxGeometryOutputVertices), extra_version_32_OES_geometry_shader }, { GL_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS, CONTEXT_INT(Const.MaxGeometryTotalOutputComponents), extra_version_32_OES_geometry_shader }, { GL_MAX_GEOMETRY_UNIFORM_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxUniformComponents), extra_version_32_OES_geometry_shader }, + { GL_PATCH_VERTICES, CONTEXT_INT(TessCtrlProgram.patch_vertices), extra_ARB_tessellation_shader }, + { GL_PATCH_DEFAULT_OUTER_LEVEL, CONTEXT_FLOAT4(TessCtrlProgram.patch_default_outer_level), extra_ARB_tessellation_shader }, + { GL_PATCH_DEFAULT_INNER_LEVEL, CONTEXT_FLOAT2(TessCtrlProgram.patch_default_inner_level), extra_ARB_tessellation_shader }, + { GL_MAX_TESS_GEN_LEVEL, CONTEXT_INT(Const.MaxTessGenLevel), extra_ARB_tessellation_shader }, + { GL_MAX_PATCH_VERTICES, CONTEXT_INT(Const.MaxPatchVertices), extra_ARB_tessellation_shader }, + { GL_MAX_TESS_CONTROL_UNIFORM_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxUniformComponents), extra_ARB_tessellation_shader }, + { GL_MAX_TESS_EVALUATION_UNIFORM_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxUniformComponents), extra_ARB_tessellation_shader }, + { GL_MAX_TESS_CONTROL_TEXTURE_IMAGE_UNITS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxTextureImageUnits), extra_ARB_tessellation_shader }, + { GL_MAX_TESS_EVALUATION_TEXTURE_IMAGE_UNITS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxTextureImageUnits), extra_ARB_tessellation_shader }, + { GL_MAX_TESS_CONTROL_OUTPUT_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxOutputComponents), extra_ARB_tessellation_shader }, + { GL_MAX_TESS_PATCH_COMPONENTS, CONTEXT_INT(Const.MaxTessPatchComponents), extra_ARB_tessellation_shader }, + { GL_MAX_TESS_CONTROL_TOTAL_OUTPUT_COMPONENTS, CONTEXT_INT(Const.MaxTessControlTotalOutputComponents), extra_ARB_tessellation_shader }, + { GL_MAX_TESS_EVALUATION_OUTPUT_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxOutputComponents), extra_ARB_tessellation_shader }, + { GL_MAX_TESS_CONTROL_INPUT_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxInputComponents), extra_ARB_tessellation_shader }, + { GL_MAX_TESS_EVALUATION_INPUT_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxInputComponents), extra_ARB_tessellation_shader }, + { GL_MAX_TESS_CONTROL_UNIFORM_BLOCKS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxUniformBlocks), extra_ARB_tessellation_shader }, + { GL_MAX_TESS_EVALUATION_UNIFORM_BLOCKS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxUniformBlocks), extra_ARB_tessellation_shader }, + { GL_MAX_COMBINED_TESS_CONTROL_UNIFORM_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxCombinedUniformComponents), extra_ARB_tessellation_shader }, + { GL_MAX_COMBINED_TESS_EVALUATION_UNIFORM_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxCombinedUniformComponents), extra_ARB_tessellation_shader }, + { GL_PRIMITIVE_RESTART_FOR_PATCHES_SUPPORTED, CONTEXT_BOOL(Const.PrimitiveRestartForPatches), extra_ARB_tessellation_shader }, { GL_MAX_GEOMETRY_IMAGE_UNIFORMS, CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxImageUniforms), extra_ARB_shader_image_load_store_and_geometry_shader }, + { GL_MAX_TESS_CONTROL_IMAGE_UNIFORMS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxImageUniforms), extra_ARB_shader_image_load_store_and_tessellation }, + { GL_MAX_TESS_EVALUATION_IMAGE_UNIFORMS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxImageUniforms), extra_ARB_shader_image_load_store_and_tessellation }, { GL_MAX_GEOMETRY_ATOMIC_COUNTER_BUFFERS, CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxAtomicBuffers), extra_ARB_shader_atomic_counters_and_geometry_shader }, { GL_MAX_GEOMETRY_ATOMIC_COUNTERS, CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxAtomicCounters), extra_ARB_shader_atomic_counters_and_geometry_shader }, + { GL_MAX_TESS_CONTROL_ATOMIC_COUNTER_BUFFERS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxAtomicBuffers), extra_ARB_shader_atomic_counters_and_tessellation }, + { GL_MAX_TESS_CONTROL_ATOMIC_COUNTERS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxAtomicCounters), extra_ARB_shader_atomic_counters_and_tessellation }, + { GL_MAX_TESS_EVALUATION_ATOMIC_COUNTER_BUFFERS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxAtomicBuffers), extra_ARB_shader_atomic_counters_and_tessellation }, + { GL_MAX_TESS_EVALUATION_ATOMIC_COUNTERS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxAtomicCounters), extra_ARB_shader_atomic_counters_and_tessellation }, { GL_MAX_GEOMETRY_SHADER_STORAGE_BLOCKS, CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxShaderStorageBlocks), extra_ARB_shader_storage_buffer_object_and_geometry_shader }, + { GL_MAX_TESS_CONTROL_SHADER_STORAGE_BLOCKS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxShaderStorageBlocks), extra_ARB_shader_storage_buffer_object }, + { GL_MAX_TESS_EVALUATION_SHADER_STORAGE_BLOCKS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxShaderStorageBlocks), extra_ARB_shader_storage_buffer_object }, { GL_MAX_GEOMETRY_UNIFORM_BLOCKS, CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxUniformBlocks), extra_ARB_uniform_buffer_object_and_geometry_shader }, { GL_MAX_COMBINED_GEOMETRY_UNIFORM_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxCombinedUniformComponents), extra_ARB_uniform_buffer_object_and_geometry_shader }, { GL_LAYER_PROVOKING_VERTEX, CONTEXT_ENUM(Const.LayerAndVPIndexProvokingVertex), extra_ARB_viewport_array_or_oes_geometry_shader }, @@ -354,6 +389,15 @@ { GL_TEXTURE_BUFFER_FORMAT_ARB, LOC_CUSTOM, TYPE_INT, 0, extra_texture_buffer_object }, { GL_TEXTURE_BUFFER_ARB, LOC_CUSTOM, TYPE_INT, 0, extra_texture_buffer_object }, { GL_TEXTURE_BUFFER_OFFSET_ALIGNMENT, CONTEXT_INT(Const.TextureBufferOffsetAlignment), extra_ARB_texture_buffer_range }, + { GL_PRIMITIVE_BOUNDING_BOX_ARB, CONTEXT_FLOAT8(PrimitiveBoundingBox), extra_OES_primitive_bounding_box }, + { GL_MAX_VIEWPORTS, CONTEXT_INT(Const.MaxViewports), extra_ARB_viewport_array_or_oes_viewport_array }, + { GL_VIEWPORT_SUBPIXEL_BITS, CONTEXT_INT(Const.ViewportSubpixelBits), extra_ARB_viewport_array_or_oes_viewport_array }, + { GL_VIEWPORT_BOUNDS_RANGE, CONTEXT_FLOAT2(Const.ViewportBounds), extra_ARB_viewport_array_or_oes_viewport_array }, + { GL_VIEWPORT_INDEX_PROVOKING_VERTEX, CONTEXT_ENUM(Const.LayerAndVPIndexProvokingVertex), extra_ARB_viewport_array_or_oes_viewport_array }, + { GL_CONSERVATIVE_RASTERIZATION_INTEL, CONTEXT_BOOL(IntelConservativeRasterization), extra_INTEL_conservative_rasterization }, + { GL_MULTISAMPLE_LINE_WIDTH_RANGE_ARB, CONTEXT_FLOAT2(Const.MinLineWidthAA), extra_ES32 }, + { GL_MULTISAMPLE_LINE_WIDTH_GRANULARITY_ARB, CONTEXT_FLOAT(Const.LineWidthGranularity), extra_ES32 }, + { GL_CONTEXT_FLAGS, CONTEXT_INT(Const.ContextFlags), extra_version_30 }, { GL_ACCUM_RED_BITS, BUFFER_INT(Visual.accumRedBits), NO_EXTRA }, { GL_ACCUM_GREEN_BITS, BUFFER_INT(Visual.accumGreenBits), NO_EXTRA }, { GL_ACCUM_BLUE_BITS, BUFFER_INT(Visual.accumBlueBits), NO_EXTRA }, @@ -524,10 +568,10 @@ { GL_MAX_SPOT_EXPONENT_NV, CONTEXT_FLOAT(Const.MaxSpotExponent), NO_EXTRA }, { GL_PRIMITIVE_RESTART_NV, CONTEXT_BOOL(Array.PrimitiveRestart), extra_NV_primitive_restart }, { GL_PRIMITIVE_RESTART_INDEX_NV, CONTEXT_INT(Array.RestartIndex), extra_NV_primitive_restart }, - { GL_INDEX_ARRAY_BUFFER_BINDING_ARB, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, VertexBinding[VERT_ATTRIB_COLOR_INDEX].BufferObj), NO_EXTRA }, - { GL_EDGE_FLAG_ARRAY_BUFFER_BINDING_ARB, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, VertexBinding[VERT_ATTRIB_EDGEFLAG].BufferObj), NO_EXTRA }, - { GL_SECONDARY_COLOR_ARRAY_BUFFER_BINDING_ARB, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, VertexBinding[VERT_ATTRIB_COLOR1].BufferObj), NO_EXTRA }, - { GL_FOG_COORDINATE_ARRAY_BUFFER_BINDING_ARB, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, VertexBinding[VERT_ATTRIB_FOG].BufferObj), NO_EXTRA }, + { GL_INDEX_ARRAY_BUFFER_BINDING_ARB, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, BufferBinding[VERT_ATTRIB_COLOR_INDEX].BufferObj), NO_EXTRA }, + { GL_EDGE_FLAG_ARRAY_BUFFER_BINDING_ARB, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, BufferBinding[VERT_ATTRIB_EDGEFLAG].BufferObj), NO_EXTRA }, + { GL_SECONDARY_COLOR_ARRAY_BUFFER_BINDING_ARB, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, BufferBinding[VERT_ATTRIB_COLOR1].BufferObj), NO_EXTRA }, + { GL_FOG_COORDINATE_ARRAY_BUFFER_BINDING_ARB, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, BufferBinding[VERT_ATTRIB_FOG].BufferObj), NO_EXTRA }, { GL_VERTEX_PROGRAM_ARB, CONTEXT_BOOL(VertexProgram.Enabled), extra_ARB_vertex_program }, { GL_VERTEX_PROGRAM_POINT_SIZE_ARB, CONTEXT_BOOL(VertexProgram.PointSizeEnabled), extra_ARB_vertex_program }, { GL_VERTEX_PROGRAM_TWO_SIDE_ARB, CONTEXT_BOOL(VertexProgram.TwoSideEnabled), extra_ARB_vertex_program }, @@ -554,11 +598,10 @@ { GL_PROVOKING_VERTEX_EXT, CONTEXT_ENUM(Light.ProvokingVertex), extra_EXT_provoking_vertex }, { GL_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION_EXT, CONTEXT_BOOL(Const.QuadsFollowProvokingVertexConvention), extra_EXT_provoking_vertex }, { GL_TEXTURE_CUBE_MAP_SEAMLESS, CONTEXT_BOOL(Texture.CubeMapSeamless), extra_ARB_seamless_cube_map }, - { GL_RGBA_INTEGER_MODE_EXT, BUFFER_BOOL(_IntegerColor), extra_EXT_texture_integer_and_new_buffers }, + { GL_RGBA_INTEGER_MODE_EXT, LOC_CUSTOM, TYPE_INT, 0, extra_EXT_texture_integer_and_new_buffers }, { GL_MAX_TRANSFORM_FEEDBACK_BUFFERS, CONTEXT_INT(Const.MaxTransformFeedbackBuffers), extra_ARB_transform_feedback3 }, { GL_MAX_VERTEX_STREAMS, CONTEXT_INT(Const.MaxVertexStreams), extra_ARB_transform_feedback3_ARB_gpu_shader5 }, { GL_RGBA_FLOAT_MODE_ARB, BUFFER_FIELD(Visual.floatMode, TYPE_BOOLEAN), extra_core_ARB_color_buffer_float_and_new_buffers }, - { GL_CONTEXT_FLAGS, CONTEXT_INT(Const.ContextFlags), extra_version_30 }, { GL_FRAMEBUFFER_SRGB_EXT, CONTEXT_BOOL(Color.sRGBEnabled), extra_EXT_framebuffer_sRGB }, { GL_FRAMEBUFFER_SRGB_CAPABLE_EXT, BUFFER_INT(Visual.sRGBCapable), extra_EXT_framebuffer_sRGB_and_new_buffers }, { GL_PRIMITIVE_RESTART, CONTEXT_BOOL(Array.PrimitiveRestart), extra_version_31 }, @@ -566,11 +609,8 @@ { GL_CONTEXT_PROFILE_MASK, CONTEXT_INT(Const.ProfileMask), extra_version_32 }, { GL_TIMESTAMP, LOC_CUSTOM, TYPE_INT64, 0, extra_ARB_timer_query }, { GL_MIN_MAP_BUFFER_ALIGNMENT, CONTEXT_INT(Const.MinMapBufferAlignment), NO_EXTRA }, - { GL_TEXTURE_BINDING_CUBE_MAP_ARRAY_ARB, LOC_CUSTOM, TYPE_INT, TEXTURE_CUBE_ARRAY_INDEX, extra_ARB_texture_cube_map_array }, { GL_MAX_PROGRAM_TEXTURE_GATHER_COMPONENTS_ARB, CONTEXT_INT(Const.MaxProgramTextureGatherComponents), extra_ARB_texture_gather }, { GL_MAX_IMAGE_SAMPLES, CONTEXT_INT(Const.MaxImageSamples), extra_ARB_shader_image_load_store }, - { GL_MAX_TESS_CONTROL_SHADER_STORAGE_BLOCKS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxShaderStorageBlocks), extra_ARB_shader_storage_buffer_object }, - { GL_MAX_TESS_EVALUATION_SHADER_STORAGE_BLOCKS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxShaderStorageBlocks), extra_ARB_shader_storage_buffer_object }, { GL_QUERY_BUFFER_BINDING, LOC_CUSTOM, TYPE_INT, 0, extra_ARB_query_buffer_object }, { GL_VBO_FREE_MEMORY_ATI, LOC_CUSTOM, TYPE_INT_4, NO_OFFSET, extra_ATI_meminfo }, { GL_TEXTURE_FREE_MEMORY_ATI, LOC_CUSTOM, TYPE_INT_4, NO_OFFSET, extra_ATI_meminfo }, @@ -582,298 +622,269 @@ { GL_GPU_MEMORY_INFO_EVICTED_MEMORY_NVX, LOC_CUSTOM, TYPE_INT, NO_OFFSET, extra_NVX_gpu_memory_info }, { GL_MAX_CULL_DISTANCES, CONTEXT_INT(Const.MaxClipPlanes), extra_ARB_cull_distance }, { GL_MAX_COMBINED_CLIP_AND_CULL_DISTANCES, CONTEXT_INT(Const.MaxClipPlanes), extra_ARB_cull_distance }, - { GL_MAX_VIEWPORTS, CONTEXT_INT(Const.MaxViewports), extra_ARB_viewport_array }, - { GL_VIEWPORT_SUBPIXEL_BITS, CONTEXT_INT(Const.ViewportSubpixelBits), extra_ARB_viewport_array }, - { GL_VIEWPORT_BOUNDS_RANGE, CONTEXT_FLOAT2(Const.ViewportBounds), extra_ARB_viewport_array }, - { GL_VIEWPORT_INDEX_PROVOKING_VERTEX, CONTEXT_ENUM(Const.LayerAndVPIndexProvokingVertex), extra_ARB_viewport_array }, - { GL_PATCH_VERTICES, CONTEXT_INT(TessCtrlProgram.patch_vertices), extra_ARB_tessellation_shader }, - { GL_PATCH_DEFAULT_OUTER_LEVEL, CONTEXT_FLOAT4(TessCtrlProgram.patch_default_outer_level), extra_ARB_tessellation_shader }, - { GL_PATCH_DEFAULT_INNER_LEVEL, CONTEXT_FLOAT2(TessCtrlProgram.patch_default_inner_level), extra_ARB_tessellation_shader }, - { GL_MAX_TESS_GEN_LEVEL, CONTEXT_INT(Const.MaxTessGenLevel), extra_ARB_tessellation_shader }, - { GL_MAX_PATCH_VERTICES, CONTEXT_INT(Const.MaxPatchVertices), extra_ARB_tessellation_shader }, - { GL_MAX_TESS_CONTROL_UNIFORM_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxUniformComponents), extra_ARB_tessellation_shader }, - { GL_MAX_TESS_EVALUATION_UNIFORM_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxUniformComponents), extra_ARB_tessellation_shader }, - { GL_MAX_TESS_CONTROL_TEXTURE_IMAGE_UNITS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxTextureImageUnits), extra_ARB_tessellation_shader }, - { GL_MAX_TESS_EVALUATION_TEXTURE_IMAGE_UNITS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxTextureImageUnits), extra_ARB_tessellation_shader }, - { GL_MAX_TESS_CONTROL_OUTPUT_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxOutputComponents), extra_ARB_tessellation_shader }, - { GL_MAX_TESS_PATCH_COMPONENTS, CONTEXT_INT(Const.MaxTessPatchComponents), extra_ARB_tessellation_shader }, - { GL_MAX_TESS_CONTROL_TOTAL_OUTPUT_COMPONENTS, CONTEXT_INT(Const.MaxTessControlTotalOutputComponents), extra_ARB_tessellation_shader }, - { GL_MAX_TESS_EVALUATION_OUTPUT_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxOutputComponents), extra_ARB_tessellation_shader }, - { GL_MAX_TESS_CONTROL_INPUT_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxInputComponents), extra_ARB_tessellation_shader }, - { GL_MAX_TESS_EVALUATION_INPUT_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxInputComponents), extra_ARB_tessellation_shader }, - { GL_MAX_TESS_CONTROL_UNIFORM_BLOCKS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxUniformBlocks), extra_ARB_tessellation_shader }, - { GL_MAX_TESS_EVALUATION_UNIFORM_BLOCKS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxUniformBlocks), extra_ARB_tessellation_shader }, - { GL_MAX_COMBINED_TESS_CONTROL_UNIFORM_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxCombinedUniformComponents), extra_ARB_tessellation_shader }, - { GL_MAX_COMBINED_TESS_EVALUATION_UNIFORM_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxCombinedUniformComponents), extra_ARB_tessellation_shader }, - { GL_PRIMITIVE_RESTART_FOR_PATCHES_SUPPORTED, CONTEXT_BOOL(Const.PrimitiveRestartForPatches), extra_ARB_tessellation_shader }, - { GL_MAX_TESS_CONTROL_ATOMIC_COUNTER_BUFFERS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxAtomicBuffers), extra_ARB_shader_atomic_counters_and_tessellation }, - { GL_MAX_TESS_CONTROL_ATOMIC_COUNTERS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxAtomicCounters), extra_ARB_shader_atomic_counters_and_tessellation }, - { GL_MAX_TESS_EVALUATION_ATOMIC_COUNTER_BUFFERS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxAtomicBuffers), extra_ARB_shader_atomic_counters_and_tessellation }, - { GL_MAX_TESS_EVALUATION_ATOMIC_COUNTERS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxAtomicCounters), extra_ARB_shader_atomic_counters_and_tessellation }, - { GL_MAX_TESS_CONTROL_IMAGE_UNIFORMS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxImageUniforms), extra_ARB_shader_image_load_store_and_tessellation }, - { GL_MAX_TESS_EVALUATION_IMAGE_UNIFORMS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxImageUniforms), extra_ARB_shader_image_load_store_and_tessellation }, + { GL_MAX_COMPUTE_VARIABLE_GROUP_INVOCATIONS_ARB, CONTEXT_INT(Const.MaxComputeVariableGroupInvocations), extra_ARB_compute_variable_group_size }, { GL_MAX_SUBROUTINES, CONST(MAX_SUBROUTINES), extra_ARB_shader_subroutine }, { GL_MAX_SUBROUTINE_UNIFORM_LOCATIONS, CONST(MAX_SUBROUTINE_UNIFORM_LOCATIONS), extra_ARB_shader_subroutine }, { GL_PARAMETER_BUFFER_BINDING_ARB, LOC_CUSTOM, TYPE_INT, 0, extra_ARB_indirect_parameters }, }; static table_t table_API_OPENGL = { - 92, 487, 425, 0, + 92, 531, 469, 0, 149, 209, 0, 0, - 0, 429, 0, 118, + 0, 473, 0, 118, 0, 0, 0, 0, - 0, 0, 304, 533, - 259, 238, 0, 565, - 0, 0, 0, 407, - 0, 0, 0, 430, - 539, 0, 190, 320, + 0, 0, 310, 577, + 261, 240, 0, 607, + 0, 0, 0, 451, + 0, 0, 0, 474, + 583, 0, 190, 326, 0, 0, 176, 161, - 462, 144, 150, 6, + 506, 144, 150, 6, 0, 0, 0, 0, - 307, 0, 0, 263, - 151, 0, 396, 0, - 64, 554, 0, 0, - 0, 0, 313, 0, - 530, 0, 0, 224, - 0, 0, 421, 0, - 0, 543, 353, 86, - 491, 454, 231, 0, - 0, 392, 0, 273, + 313, 0, 0, 265, + 151, 0, 440, 0, + 64, 598, 0, 0, + 0, 236, 319, 0, + 574, 0, 0, 224, + 0, 0, 465, 0, + 0, 587, 397, 86, + 535, 498, 231, 0, + 0, 436, 0, 275, 155, 0, 0, 0, - 246, 93, 488, 0, + 248, 93, 532, 0, 0, 154, 0, 0, - 120, 245, 398, 0, - 360, 0, 287, 0, - 0, 0, 0, 305, - 278, 0, 555, 0, + 120, 247, 442, 0, + 404, 0, 293, 0, + 0, 0, 0, 311, + 284, 0, 394, 0, 0, 0, 0, 0, - 408, 0, 0, 0, + 452, 0, 0, 0, 134, 0, 0, 192, - 239, 0, 0, 177, - 274, 43, 128, 0, + 241, 0, 0, 177, + 276, 43, 128, 0, 195, 0, 0, 0, - 0, 365, 73, 0, - 0, 366, 0, 0, - 143, 577, 0, 0, - 528, 0, 290, 0, - 0, 531, 0, 0, - 223, 510, 0, 422, - 0, 0, 544, 354, - 85, 492, 470, 80, + 0, 409, 73, 0, + 0, 410, 0, 0, + 143, 617, 0, 0, + 572, 0, 296, 0, + 0, 575, 0, 0, + 223, 554, 0, 466, + 0, 0, 588, 398, + 85, 536, 514, 80, 20, 0, 0, 213, - 481, 159, 499, 572, - 388, 519, 94, 0, - 389, 0, 136, 0, - 532, 383, 261, 399, - 0, 371, 0, 289, - 0, 0, 515, 0, - 302, 0, 0, 0, - 0, 381, 0, 0, - 0, 409, 0, 0, - 42, 135, 241, 0, - 191, 323, 0, 0, - 178, 163, 218, 406, - 535, 197, 0, 0, + 525, 159, 543, 612, + 432, 563, 94, 0, + 433, 0, 136, 0, + 576, 427, 263, 443, + 0, 415, 0, 295, + 0, 0, 559, 0, + 308, 0, 0, 0, + 0, 425, 0, 0, + 0, 453, 0, 0, + 42, 135, 243, 0, + 191, 329, 0, 0, + 178, 163, 218, 450, + 579, 197, 0, 0, 106, 0, 0, 74, - 0, 0, 367, 0, - 0, 141, 578, 0, - 284, 0, 357, 296, - 552, 295, 82, 252, + 0, 0, 411, 0, + 0, 141, 618, 0, + 290, 0, 401, 302, + 596, 301, 82, 254, 0, 225, 0, 0, - 423, 0, 0, 547, - 0, 83, 493, 471, + 467, 0, 0, 591, + 0, 83, 537, 515, 233, 21, 0, 0, - 211, 482, 162, 373, - 573, 457, 520, 95, - 0, 455, 237, 148, - 39, 0, 122, 262, - 0, 0, 374, 0, - 283, 107, 0, 516, - 0, 303, 0, 0, - 525, 0, 382, 0, - 0, 0, 410, 0, - 0, 386, 23, 509, - 0, 44, 322, 0, - 442, 521, 164, 139, + 211, 526, 162, 417, + 613, 501, 564, 95, + 0, 499, 239, 148, + 39, 0, 122, 264, + 0, 0, 418, 0, + 289, 107, 0, 560, + 0, 309, 0, 0, + 569, 0, 426, 0, + 0, 0, 454, 0, + 0, 430, 23, 553, + 0, 44, 328, 0, + 486, 565, 164, 139, 124, 54, 198, 0, 0, 3, 0, 0, 0, 0, 0, 115, - 447, 0, 142, 234, + 491, 0, 142, 234, 0, 0, 0, 0, - 0, 358, 314, 84, + 0, 402, 320, 84, 0, 0, 0, 0, - 403, 556, 0, 0, - 546, 0, 0, 0, - 385, 433, 0, 325, - 562, 212, 0, 475, - 464, 574, 378, 508, + 447, 599, 0, 0, + 590, 0, 0, 0, + 429, 477, 0, 331, + 605, 212, 0, 519, + 508, 614, 422, 552, 96, 0, 0, 0, - 153, 33, 420, 126, - 207, 0, 0, 372, - 0, 315, 108, 0, - 0, 0, 308, 538, - 0, 0, 0, 0, - 0, 369, 0, 411, - 359, 244, 29, 427, - 0, 549, 513, 196, - 50, 445, 179, 165, - 186, 506, 0, 199, + 153, 33, 464, 126, + 207, 0, 0, 416, + 0, 321, 108, 0, + 0, 0, 314, 582, + 0, 0, 0, 0, + 0, 413, 0, 455, + 403, 246, 29, 471, + 0, 593, 557, 196, + 50, 489, 179, 165, + 186, 550, 0, 199, 30, 0, 2, 0, - 0, 321, 0, 0, - 435, 451, 217, 446, - 0, 317, 0, 0, - 0, 0, 529, 0, - 0, 253, 0, 0, - 0, 404, 557, 0, - 0, 545, 0, 517, - 428, 247, 187, 299, - 0, 0, 75, 270, - 166, 180, 575, 459, - 463, 97, 0, 0, + 237, 327, 0, 0, + 479, 495, 217, 279, + 0, 323, 0, 0, + 0, 0, 573, 0, + 0, 255, 0, 0, + 0, 448, 600, 0, + 0, 589, 0, 561, + 472, 249, 187, 305, + 0, 0, 75, 272, + 166, 180, 615, 503, + 507, 97, 0, 0, 103, 77, 35, 0, 123, 208, 71, 0, - 375, 0, 316, 109, + 419, 0, 322, 109, 0, 0, 0, 0, - 0, 0, 511, 271, - 458, 0, 0, 0, - 412, 0, 0, 17, - 0, 242, 291, 0, - 46, 49, 443, 522, - 474, 25, 0, 0, + 0, 0, 555, 273, + 502, 0, 0, 0, + 456, 0, 0, 17, + 0, 244, 297, 0, + 46, 49, 487, 566, + 518, 25, 0, 0, 200, 31, 0, 0, - 0, 0, 559, 0, - 12, 0, 453, 0, - 452, 0, 0, 0, - 0, 558, 0, 0, - 0, 0, 254, 0, - 27, 0, 414, 300, + 0, 0, 602, 0, + 12, 0, 497, 0, + 277, 0, 0, 0, + 0, 601, 0, 0, + 608, 0, 256, 0, + 27, 0, 458, 306, 0, 0, 0, 0, - 518, 91, 68, 189, + 562, 91, 68, 189, 0, 0, 0, 76, - 536, 480, 466, 576, - 0, 268, 98, 0, - 0, 104, 561, 40, + 580, 524, 510, 616, + 0, 270, 98, 0, + 0, 104, 604, 40, 0, 125, 0, 72, - 127, 370, 542, 0, + 127, 414, 586, 0, 110, 0, 0, 0, - 0, 294, 0, 249, - 272, 0, 0, 0, - 413, 0, 210, 243, - 4, 0, 145, 292, - 514, 171, 52, 441, - 523, 476, 19, 504, - 456, 201, 0, 569, - 0, 0, 512, 564, - 0, 13, 0, 380, - 0, 309, 0, 0, - 286, 0, 55, 0, - 0, 0, 0, 256, - 0, 449, 0, 415, - 301, 0, 0, 0, + 0, 300, 0, 251, + 274, 0, 0, 0, + 457, 0, 210, 245, + 4, 0, 145, 298, + 558, 171, 52, 485, + 567, 520, 19, 548, + 500, 201, 0, 609, + 0, 0, 556, 606, + 0, 13, 0, 424, + 0, 278, 0, 0, + 292, 0, 55, 0, + 0, 0, 0, 258, + 547, 493, 0, 459, + 307, 0, 0, 0, 173, 0, 78, 69, - 188, 266, 318, 0, - 61, 537, 156, 467, + 188, 268, 324, 0, + 61, 581, 156, 511, 0, 0, 0, 99, 131, 0, 105, 0, 34, 0, 121, 0, - 277, 18, 0, 0, - 282, 111, 0, 0, - 0, 0, 0, 436, - 250, 479, 0, 0, - 0, 416, 0, 214, + 283, 18, 0, 0, + 288, 111, 0, 0, + 0, 0, 0, 480, + 252, 523, 0, 0, + 0, 460, 0, 214, 0, 1, 0, 146, - 293, 0, 170, 51, - 440, 174, 477, 461, - 497, 0, 202, 0, - 570, 0, 0, 0, + 299, 0, 170, 51, + 484, 174, 521, 505, + 541, 0, 202, 0, + 610, 0, 0, 0, 132, 0, 14, 0, - 7, 0, 310, 0, - 87, 288, 0, 56, - 0, 0, 297, 0, - 255, 568, 450, 0, - 0, 306, 0, 0, + 7, 0, 316, 0, + 87, 294, 0, 56, + 0, 0, 303, 0, + 257, 549, 494, 0, + 490, 312, 0, 0, 0, 0, 0, 22, 48, 24, 0, 0, 0, 62, 0, 157, 0, 0, 63, 0, - 527, 401, 384, 0, + 571, 445, 428, 0, 0, 36, 0, 0, - 100, 326, 129, 0, + 100, 332, 129, 0, 0, 0, 112, 0, 0, 232, 0, 0, - 0, 251, 0, 0, - 460, 0, 417, 0, + 0, 253, 0, 0, + 504, 0, 461, 0, 215, 0, 9, 0, - 147, 248, 0, 494, - 0, 439, 57, 478, - 0, 498, 0, 203, - 548, 571, 0, 0, + 147, 250, 0, 538, + 0, 483, 57, 522, + 0, 542, 0, 203, + 592, 611, 0, 0, 0, 138, 0, 10, - 364, 8, 193, 312, - 116, 0, 285, 0, - 0, 0, 0, 298, - 0, 257, 0, 0, - 0, 503, 0, 0, - 402, 0, 0, 0, - 431, 356, 0, 267, - 566, 0, 59, 507, + 408, 8, 193, 318, + 116, 0, 291, 0, + 0, 0, 0, 304, + 0, 259, 0, 0, + 0, 496, 0, 0, + 446, 0, 0, 0, + 475, 400, 0, 269, + 0, 0, 59, 551, 158, 0, 0, 28, - 387, 53, 130, 362, - 526, 0, 37, 0, - 0, 393, 0, 397, + 431, 53, 130, 406, + 570, 0, 37, 0, + 0, 437, 0, 441, 0, 0, 0, 113, - 0, 0, 434, 0, + 0, 0, 478, 0, 0, 0, 0, 0, - 227, 152, 0, 418, - 0, 216, 540, 32, - 0, 119, 390, 0, - 495, 0, 444, 175, - 167, 185, 502, 281, - 204, 0, 228, 560, + 227, 152, 0, 462, + 0, 216, 584, 32, + 0, 119, 434, 0, + 539, 0, 488, 175, + 167, 185, 546, 287, + 204, 0, 228, 603, 15, 0, 45, 220, - 11, 363, 16, 194, - 311, 368, 0, 0, + 11, 407, 16, 194, + 317, 412, 0, 0, 0, 0, 0, 0, 0, 0, 0, 90, - 0, 0, 505, 0, - 484, 405, 0, 0, - 0, 426, 377, 0, - 469, 567, 0, 60, - 66, 472, 0, 550, - 26, 391, 563, 483, - 361, 264, 0, 38, - 355, 0, 102, 0, - 394, 0, 0, 0, + 0, 0, 315, 0, + 528, 449, 0, 0, + 0, 470, 421, 0, + 513, 0, 0, 60, + 66, 516, 0, 594, + 26, 435, 333, 527, + 405, 266, 0, 38, + 399, 0, 102, 0, + 438, 0, 0, 0, 114, 0, 0, 0, 88, 0, 0, 0, 0, 226, 0, 0, - 419, 0, 534, 541, - 351, 0, 489, 172, - 235, 496, 279, 438, - 58, 168, 206, 500, - 379, 0, 0, 229, - 486, 424, 0, 137, - 0, 0, 524, 0, - 400, 0, 117, 0, - 0, 0, 0, 0, - 0, 324, 0, 258, - 240, 0, 0, 0, - 0, 485, 65, 0, - 0, 0, 133, 376, - 0, 468, 319, 473, + 463, 0, 578, 585, + 395, 0, 533, 172, + 235, 540, 285, 482, + 58, 168, 206, 544, + 423, 0, 0, 229, + 530, 468, 0, 137, + 0, 0, 568, 0, + 444, 0, 117, 0, + 0, 0, 0, 0, + 0, 330, 0, 260, + 242, 619, 0, 0, + 0, 529, 65, 0, + 0, 0, 133, 420, + 0, 512, 325, 517, 0, 67, 160, 0, - 140, 448, 5, 0, - 0, 70, 265, 0, + 140, 492, 5, 0, + 0, 70, 267, 0, 41, 0, 0, 101, - 0, 395, 0, 553, + 0, 439, 0, 597, 81, 0, 0, 0, - 0, 89, 236, 0, - 260, 0, 222, 465, - 0, 79, 551, 205, - 432, 352, 269, 490, - 47, 230, 0, 280, - 437, 0, 169, 219, - 501, 221, 0, 0, + 0, 89, 238, 0, + 262, 0, 222, 509, + 0, 79, 595, 205, + 476, 396, 271, 534, + 47, 230, 0, 286, + 481, 0, 169, 219, + 545, 221, 0, 0, }; static table_t table_API_OPENGLES = { @@ -884,7 +895,7 @@ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 276, 0, 0, + 0, 282, 0, 0, 0, 0, 0, 0, 0, 0, 176, 161, 0, 144, 150, 6, @@ -928,7 +939,7 @@ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 275, + 0, 0, 0, 281, 42, 135, 0, 0, 0, 0, 0, 0, 178, 163, 0, 0, @@ -1037,7 +1048,7 @@ 34, 0, 121, 0, 0, 18, 0, 0, 0, 111, 0, 0, - 0, 0, 0, 0, + 0, 0, 280, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 146, @@ -1130,7 +1141,7 @@ 0, 0, 0, 0, 0, 79, 0, 0, 0, 0, 0, 0, - 47, 237, 0, 0, + 47, 239, 0, 0, 0, 0, 169, 0, 0, 0, 0, 0, }; @@ -1143,7 +1154,7 @@ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 276, 0, 0, + 0, 282, 0, 0, 0, 0, 190, 0, 0, 0, 0, 0, 0, 0, 0, 6, @@ -1151,7 +1162,7 @@ 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, - 0, 0, 0, 0, + 0, 236, 0, 0, 0, 0, 0, 224, 0, 0, 0, 0, 0, 0, 0, 86, @@ -1187,7 +1198,7 @@ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 275, + 0, 0, 0, 281, 42, 0, 0, 0, 191, 0, 0, 0, 0, 0, 218, 0, @@ -1237,7 +1248,7 @@ 50, 0, 0, 0, 186, 0, 0, 199, 30, 0, 2, 0, - 0, 0, 0, 0, + 237, 0, 0, 0, 0, 0, 217, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -1296,7 +1307,7 @@ 34, 0, 0, 0, 0, 18, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, + 0, 0, 280, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, @@ -1385,7 +1396,7 @@ 41, 0, 0, 0, 0, 0, 0, 0, 81, 0, 0, 0, - 0, 89, 236, 0, + 0, 89, 238, 0, 0, 0, 222, 0, 0, 79, 0, 0, 0, 0, 0, 0, @@ -1400,34 +1411,34 @@ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 259, 238, 0, 0, + 261, 240, 0, 0, 0, 0, 0, 0, - 0, 276, 0, 0, + 0, 282, 0, 0, 0, 0, 190, 0, 0, 0, 0, 0, 0, 0, 0, 6, 0, 0, 0, 0, - 0, 0, 0, 263, + 0, 0, 0, 265, 0, 0, 0, 0, 64, 0, 0, 0, - 0, 0, 0, 0, + 0, 236, 0, 0, 0, 0, 0, 224, 0, 0, 0, 0, 0, 0, 0, 86, 0, 0, 231, 0, - 0, 0, 0, 273, + 0, 0, 0, 275, 0, 0, 0, 0, - 246, 214, 0, 0, + 248, 214, 0, 0, 0, 0, 0, 0, - 0, 245, 0, 0, + 0, 247, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 192, - 239, 0, 0, 0, - 274, 43, 0, 0, + 241, 0, 0, 0, + 276, 43, 0, 0, 195, 0, 0, 0, 0, 0, 73, 0, 0, 0, 0, 0, @@ -1441,13 +1452,13 @@ 0, 0, 0, 0, 0, 0, 215, 0, 0, 0, 0, 0, - 0, 0, 261, 0, + 0, 0, 263, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 275, - 42, 0, 241, 0, + 0, 0, 0, 281, + 42, 0, 243, 0, 191, 0, 0, 0, 0, 0, 218, 0, 0, 197, 0, 0, @@ -1455,15 +1466,15 @@ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 82, 252, + 0, 0, 82, 254, 0, 225, 0, 0, 0, 0, 0, 0, 0, 83, 0, 0, 233, 21, 0, 0, 211, 0, 0, 0, 0, 0, 0, 216, - 0, 0, 237, 0, - 39, 0, 0, 262, + 0, 0, 239, 0, + 39, 0, 0, 264, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -1491,20 +1502,20 @@ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 244, 29, 0, + 0, 246, 29, 0, 0, 0, 0, 196, 50, 0, 0, 0, 186, 0, 0, 199, 30, 0, 2, 0, + 237, 0, 0, 0, + 0, 0, 217, 279, 0, 0, 0, 0, - 0, 0, 217, 0, - 0, 0, 0, 0, - 0, 0, 0, 327, - 0, 253, 0, 0, + 0, 0, 0, 334, + 0, 255, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 247, 187, 0, - 0, 0, 75, 270, + 0, 249, 187, 0, + 0, 0, 75, 272, 0, 0, 0, 0, 0, 205, 0, 0, 232, 77, 35, 0, @@ -1514,49 +1525,49 @@ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 17, - 0, 242, 0, 0, + 0, 244, 0, 0, 46, 49, 0, 0, 0, 25, 0, 0, 200, 31, 0, 0, 0, 0, 0, 0, 12, 0, 0, 0, + 277, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, - 328, 0, 254, 0, + 335, 0, 256, 0, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 68, 189, 0, 0, 0, 76, 0, 0, 0, 0, - 0, 268, 0, 0, + 0, 270, 0, 0, 0, 0, 0, 40, 0, 0, 0, 72, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 249, + 0, 0, 0, 251, 0, 0, 0, 0, - 0, 0, 0, 243, + 0, 0, 0, 245, 4, 0, 0, 0, 0, 0, 52, 0, 0, 0, 19, 0, 0, 201, 0, 0, 0, 0, 0, 0, 0, 13, 0, 0, - 0, 0, 0, 0, + 0, 278, 0, 0, 0, 0, 55, 0, - 0, 329, 0, 256, + 0, 336, 0, 258, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 78, 69, - 188, 266, 0, 0, + 188, 268, 0, 0, 61, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 34, 0, 0, 0, 0, 18, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, - 250, 0, 0, 0, + 0, 0, 280, 0, + 252, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 51, @@ -1567,7 +1578,7 @@ 7, 0, 0, 0, 87, 0, 0, 56, 0, 0, 0, 0, - 255, 0, 0, 0, + 257, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 22, 48, 24, 0, 0, @@ -1577,11 +1588,11 @@ 0, 36, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 269, 0, 0, - 0, 251, 0, 0, + 0, 271, 0, 0, + 0, 253, 0, 0, 0, 0, 0, 0, 0, 0, 9, 0, - 0, 248, 0, 0, + 0, 250, 0, 0, 0, 0, 57, 0, 0, 0, 0, 203, 0, 0, 0, 0, @@ -1589,10 +1600,10 @@ 0, 8, 193, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 257, 0, 0, + 0, 259, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 267, + 0, 0, 0, 269, 0, 0, 59, 0, 0, 0, 0, 28, 0, 53, 0, 0, @@ -1618,7 +1629,7 @@ 0, 0, 0, 60, 66, 0, 0, 0, 26, 0, 0, 0, - 0, 264, 0, 38, + 0, 266, 0, 38, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -1627,29 +1638,29 @@ 0, 0, 0, 0, 0, 0, 0, 0, 235, 0, 0, 0, - 58, 271, 206, 0, + 58, 273, 206, 0, 0, 0, 0, 229, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 258, - 240, 0, 0, 0, + 0, 0, 0, 260, + 242, 0, 0, 0, 0, 0, 65, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 67, 0, 0, 0, 0, 5, 0, - 0, 70, 265, 0, + 0, 70, 267, 0, 41, 0, 0, 0, 0, 0, 0, 0, 81, 0, 0, 0, - 0, 89, 236, 0, - 260, 0, 222, 0, + 0, 89, 238, 0, + 262, 0, 222, 0, 0, 79, 0, 0, 0, 0, 0, 0, 47, 230, 0, 0, - 0, 0, 272, 219, + 0, 0, 274, 219, 0, 0, 0, 0, }; @@ -1657,41 +1668,41 @@ 210, 0, 0, 0, 0, 209, 0, 0, 0, 0, 0, 0, - 345, 339, 0, 0, - 0, 0, 304, 0, - 259, 238, 0, 0, + 380, 368, 386, 0, + 0, 0, 310, 0, + 261, 240, 0, 358, 0, 0, 0, 0, - 0, 276, 0, 0, - 0, 0, 190, 320, + 0, 282, 0, 0, + 390, 0, 190, 326, 0, 0, 0, 0, 0, 0, 0, 6, 0, 0, 0, 0, - 307, 0, 0, 263, + 313, 0, 0, 265, 0, 0, 0, 0, 64, 0, 0, 0, - 0, 0, 313, 0, + 0, 236, 319, 0, 0, 0, 0, 224, - 0, 0, 0, 350, + 0, 0, 0, 385, 0, 0, 0, 86, 0, 0, 231, 0, - 0, 0, 0, 273, + 0, 0, 0, 275, 0, 0, 0, 0, - 246, 214, 0, 0, + 248, 214, 0, 0, 0, 0, 0, 0, - 0, 245, 0, 0, - 0, 346, 287, 0, - 0, 0, 0, 305, - 278, 0, 0, 0, + 0, 247, 0, 0, + 0, 381, 293, 391, + 0, 0, 0, 311, + 284, 0, 361, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 192, - 239, 0, 0, 0, - 274, 43, 0, 0, + 241, 0, 0, 0, + 276, 43, 0, 0, 195, 0, 0, 0, 0, 0, 73, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 290, 0, + 0, 0, 296, 0, 0, 0, 0, 0, 223, 0, 0, 0, 0, 0, 0, 0, @@ -1700,475 +1711,734 @@ 0, 0, 0, 0, 0, 0, 215, 0, 0, 0, 0, 0, - 0, 0, 261, 0, - 0, 0, 0, 289, + 0, 0, 263, 0, + 0, 0, 0, 295, 0, 0, 0, 0, - 302, 0, 0, 0, + 308, 0, 0, 362, 0, 0, 0, 0, - 0, 0, 0, 275, - 42, 0, 241, 0, - 191, 323, 0, 0, + 0, 0, 0, 281, + 42, 0, 243, 0, + 191, 329, 0, 0, 0, 0, 218, 0, 0, 197, 0, 0, 0, 0, 0, 74, 0, 0, 0, 0, 0, 0, 0, 0, - 284, 0, 0, 296, - 0, 295, 82, 252, + 290, 0, 387, 302, + 0, 301, 82, 254, 0, 225, 0, 0, 0, 0, 0, 0, 0, 83, 0, 0, 233, 21, 0, 0, 211, 0, 0, 0, 0, 0, 0, 216, - 0, 0, 237, 0, - 39, 0, 0, 262, + 0, 0, 239, 0, + 39, 0, 0, 264, 0, 0, 0, 0, - 283, 281, 0, 0, - 0, 303, 0, 0, + 289, 287, 0, 0, + 0, 309, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 23, 331, - 0, 44, 322, 0, + 0, 0, 23, 338, + 0, 44, 328, 0, 0, 0, 0, 0, 0, 54, 198, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 234, + 0, 369, 0, 0, + 0, 0, 320, 84, + 376, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 314, 84, - 341, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 325, + 0, 0, 355, 0, + 0, 0, 0, 331, 0, 212, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 33, 0, 0, 207, 0, 0, 0, - 0, 315, 0, 0, - 0, 0, 308, 0, - 0, 0, 0, 0, + 0, 321, 0, 0, + 0, 348, 314, 0, + 0, 363, 0, 0, 0, 0, 0, 0, - 0, 244, 29, 0, - 332, 0, 0, 196, + 0, 246, 29, 0, + 339, 0, 0, 196, 50, 0, 0, 0, 186, 0, 0, 199, 30, 0, 2, 0, - 0, 321, 0, 0, - 0, 0, 217, 0, - 0, 317, 0, 0, - 0, 0, 0, 327, - 0, 253, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 247, 187, 299, - 0, 0, 75, 270, + 237, 327, 0, 0, + 0, 0, 217, 279, + 0, 323, 371, 0, + 0, 359, 344, 334, + 0, 255, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 356, + 0, 249, 187, 305, + 0, 0, 75, 272, 0, 0, 0, 0, 0, 205, 0, 0, 232, 77, 35, 0, 0, 208, 71, 0, - 0, 0, 316, 221, - 0, 0, 0, 0, + 0, 0, 322, 221, + 0, 0, 347, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 17, - 0, 242, 291, 0, + 0, 244, 297, 0, 46, 49, 0, 0, 0, 25, 0, 0, 200, 31, 0, 0, 0, 0, 0, 0, 12, 0, 0, 0, - 0, 0, 0, 338, - 0, 0, 0, 0, - 328, 0, 254, 0, - 27, 0, 0, 300, + 277, 0, 0, 367, + 0, 0, 360, 346, + 335, 0, 256, 0, + 27, 0, 0, 306, 0, 0, 0, 0, 0, 0, 68, 189, 0, 0, 0, 76, 0, 0, 0, 0, - 0, 268, 0, 0, + 0, 270, 0, 0, 0, 0, 0, 40, 0, 0, 0, 72, 0, 0, 0, 0, + 0, 0, 0, 349, + 0, 300, 0, 251, 0, 0, 0, 0, - 0, 294, 0, 249, - 0, 0, 0, 0, - 0, 0, 0, 243, - 4, 0, 0, 292, + 0, 0, 0, 245, + 4, 0, 0, 298, 0, 0, 52, 0, 0, 0, 19, 0, 0, 201, 0, 0, 0, 0, 0, 0, - 0, 13, 0, 330, - 0, 309, 0, 0, - 286, 0, 55, 0, - 0, 329, 0, 256, + 0, 13, 0, 337, + 0, 278, 0, 0, + 292, 0, 55, 0, + 345, 336, 0, 258, 0, 0, 0, 0, - 301, 0, 0, 0, + 307, 0, 0, 0, 0, 0, 78, 69, - 188, 266, 318, 0, + 188, 268, 324, 0, 61, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 34, 0, 0, 0, - 277, 18, 0, 0, - 282, 0, 0, 0, - 0, 0, 0, 0, - 250, 0, 0, 336, + 283, 18, 0, 0, + 288, 0, 0, 0, + 350, 0, 280, 0, + 252, 0, 0, 343, 0, 0, 0, 0, 0, 1, 0, 0, - 293, 0, 0, 51, + 299, 0, 0, 51, 0, 0, 0, 0, 0, 0, 202, 0, 0, 0, 0, 0, - 324, 0, 14, 0, - 7, 0, 310, 0, - 87, 288, 0, 56, - 0, 0, 297, 0, - 255, 0, 0, 0, - 0, 306, 0, 0, + 330, 0, 14, 0, + 7, 357, 316, 0, + 87, 294, 0, 56, + 0, 0, 303, 0, + 257, 0, 0, 0, + 0, 312, 0, 0, 0, 0, 0, 22, - 48, 24, 0, 340, + 48, 24, 0, 373, 0, 62, 0, 0, 0, 0, 63, 0, 0, 0, 0, 0, 0, 36, 0, 0, - 0, 326, 0, 0, + 0, 332, 0, 0, 0, 0, 0, 0, - 0, 269, 0, 0, - 0, 251, 0, 0, - 334, 0, 0, 0, + 0, 271, 0, 0, + 0, 253, 0, 0, + 341, 0, 0, 0, 0, 0, 9, 0, - 0, 248, 0, 0, - 0, 0, 57, 0, + 0, 250, 0, 0, + 366, 0, 57, 0, 0, 0, 0, 203, 0, 0, 0, 0, 0, 0, 0, 10, - 0, 8, 193, 312, - 0, 0, 285, 0, - 0, 0, 0, 298, - 0, 257, 0, 0, + 0, 8, 193, 318, + 0, 0, 291, 0, + 0, 0, 0, 304, + 0, 259, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 267, - 0, 0, 59, 0, + 0, 388, 0, 269, + 374, 0, 59, 0, 0, 0, 0, 28, 0, 53, 0, 0, 0, 0, 37, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 352, 0, 0, 0, 0, 0, - 0, 0, 0, 0, - 227, 335, 0, 0, + 227, 342, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0, - 0, 337, 0, 0, + 0, 364, 0, 0, 0, 185, 0, 0, 204, 0, 228, 0, 15, 0, 45, 220, 11, 0, 16, 194, - 311, 0, 333, 0, - 0, 0, 0, 0, - 0, 0, 342, 90, + 317, 0, 340, 370, 0, 0, 0, 0, + 0, 0, 377, 90, + 0, 0, 315, 0, 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 60, + 0, 0, 389, 0, + 0, 375, 0, 60, 66, 0, 0, 0, - 26, 0, 0, 0, - 344, 264, 0, 38, - 0, 0, 0, 0, + 26, 0, 333, 0, + 379, 266, 0, 38, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 353, 88, 0, 0, 0, 0, 226, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 235, 0, 279, 0, - 58, 271, 206, 0, - 0, 347, 0, 229, + 235, 0, 285, 0, + 58, 273, 206, 0, + 0, 382, 0, 229, + 0, 0, 0, 0, + 365, 0, 0, 0, + 0, 0, 0, 384, + 372, 0, 0, 0, + 0, 0, 0, 260, + 242, 0, 0, 0, + 0, 0, 65, 0, + 0, 0, 0, 378, + 0, 0, 325, 0, + 0, 67, 0, 0, + 0, 0, 5, 0, + 0, 70, 267, 0, + 41, 0, 0, 0, + 0, 0, 0, 0, + 81, 0, 0, 0, + 354, 89, 238, 0, + 262, 0, 222, 0, + 0, 79, 0, 0, + 0, 0, 351, 0, + 47, 230, 0, 286, + 0, 0, 274, 219, + 0, 0, 383, 0, +}; + +static table_t table_API_OPENGLES32 = { + 210, 0, 0, 0, + 0, 209, 0, 0, + 0, 0, 0, 0, + 380, 368, 386, 0, + 0, 0, 310, 0, + 261, 240, 0, 358, + 0, 0, 0, 0, + 0, 282, 0, 0, + 390, 0, 190, 326, + 0, 0, 0, 0, + 0, 0, 0, 6, + 0, 0, 0, 0, + 313, 0, 393, 265, + 0, 0, 0, 0, + 64, 0, 0, 0, + 0, 236, 319, 0, + 0, 0, 0, 224, + 0, 0, 0, 385, + 0, 0, 0, 86, + 0, 0, 231, 0, + 0, 0, 0, 275, + 0, 0, 0, 0, + 248, 214, 0, 0, + 0, 0, 0, 0, + 0, 247, 0, 0, + 0, 381, 293, 391, + 0, 0, 0, 311, + 284, 0, 361, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 192, + 241, 0, 0, 0, + 276, 43, 0, 0, + 195, 0, 0, 0, + 0, 0, 73, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 296, 0, + 0, 0, 0, 0, + 223, 0, 0, 0, + 0, 0, 0, 0, + 85, 0, 0, 80, + 20, 0, 0, 213, + 0, 0, 0, 0, + 0, 0, 215, 0, + 0, 0, 0, 0, + 0, 0, 263, 0, + 0, 0, 0, 295, + 0, 0, 0, 0, + 308, 0, 0, 362, + 0, 0, 0, 0, + 0, 0, 0, 281, + 42, 0, 243, 0, + 191, 329, 0, 0, + 0, 0, 218, 0, + 0, 197, 0, 0, + 0, 0, 0, 74, + 0, 0, 0, 0, + 0, 0, 0, 0, + 290, 0, 387, 302, + 0, 301, 82, 254, + 0, 225, 0, 0, + 0, 0, 0, 0, + 0, 83, 0, 0, + 233, 21, 0, 0, + 211, 0, 0, 0, + 0, 0, 0, 216, + 0, 0, 239, 0, + 39, 0, 0, 264, + 0, 0, 0, 0, + 289, 287, 0, 0, + 0, 309, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 23, 338, + 0, 44, 328, 0, + 0, 0, 0, 0, + 0, 54, 198, 0, + 0, 3, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 234, + 0, 369, 0, 0, + 0, 0, 320, 84, + 376, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 355, 0, + 0, 0, 0, 331, + 0, 212, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 33, 0, 0, + 207, 0, 0, 0, + 0, 321, 0, 0, + 0, 348, 314, 0, + 0, 363, 0, 0, + 0, 0, 0, 0, + 0, 246, 29, 0, + 339, 0, 0, 196, + 50, 0, 0, 0, + 186, 0, 0, 199, + 30, 0, 2, 0, + 237, 327, 0, 0, + 0, 0, 217, 279, + 0, 323, 371, 0, + 0, 359, 344, 334, + 0, 255, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 356, + 0, 249, 187, 305, + 0, 0, 75, 272, + 0, 0, 0, 0, + 0, 205, 0, 0, + 232, 77, 35, 0, + 0, 208, 71, 0, + 0, 0, 322, 221, + 0, 0, 347, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 17, + 0, 244, 297, 0, + 46, 49, 0, 0, + 0, 25, 0, 0, + 200, 31, 0, 0, + 0, 0, 0, 0, + 12, 0, 0, 0, + 277, 0, 0, 367, + 0, 0, 360, 346, + 335, 0, 256, 0, + 27, 0, 0, 306, + 0, 0, 0, 0, + 0, 0, 68, 189, + 0, 0, 0, 76, 0, 0, 0, 0, + 0, 270, 0, 0, + 0, 0, 0, 40, + 0, 0, 0, 72, 0, 0, 0, 0, 0, 0, 0, 349, + 0, 300, 0, 251, 0, 0, 0, 0, - 0, 0, 0, 258, - 240, 0, 0, 0, + 0, 0, 0, 245, + 4, 0, 0, 298, + 0, 0, 52, 0, + 0, 0, 19, 0, + 0, 201, 0, 0, + 0, 0, 0, 0, + 0, 13, 0, 337, + 0, 278, 0, 0, + 292, 0, 55, 0, + 345, 336, 0, 258, + 0, 0, 0, 0, + 307, 0, 0, 0, + 0, 0, 78, 69, + 188, 268, 324, 0, + 61, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 34, 0, 0, 0, + 283, 18, 0, 0, + 288, 0, 0, 0, + 350, 0, 280, 0, + 252, 0, 0, 343, + 0, 0, 0, 0, + 0, 1, 0, 0, + 299, 0, 0, 51, + 0, 0, 0, 0, + 0, 0, 202, 0, + 0, 0, 0, 0, + 330, 0, 14, 0, + 7, 357, 316, 0, + 87, 294, 0, 56, + 0, 0, 303, 0, + 257, 0, 0, 0, + 0, 312, 0, 0, + 0, 0, 0, 22, + 48, 24, 0, 373, + 0, 62, 0, 0, + 0, 0, 63, 0, + 0, 0, 0, 0, + 0, 36, 0, 0, + 0, 332, 0, 0, + 0, 0, 0, 0, + 0, 271, 0, 0, + 0, 253, 0, 0, + 341, 0, 0, 0, + 0, 0, 9, 0, + 0, 250, 0, 0, + 366, 0, 57, 0, + 0, 0, 0, 203, + 0, 0, 0, 0, + 0, 0, 0, 10, + 0, 8, 193, 318, + 0, 0, 291, 0, + 0, 0, 0, 304, + 0, 259, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 388, 0, 269, + 374, 0, 59, 0, + 0, 0, 0, 28, + 0, 53, 0, 0, + 0, 0, 37, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 352, 0, + 0, 0, 0, 0, + 227, 342, 0, 0, + 0, 0, 0, 32, + 0, 0, 0, 0, + 0, 364, 0, 0, + 0, 185, 0, 0, + 204, 0, 228, 0, + 15, 0, 45, 220, + 11, 0, 16, 194, + 317, 0, 340, 370, + 0, 0, 0, 0, + 0, 0, 377, 90, + 0, 0, 315, 0, + 0, 0, 0, 0, + 0, 0, 389, 0, + 0, 375, 0, 60, + 66, 0, 0, 0, + 26, 0, 333, 0, + 379, 266, 0, 38, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 353, + 88, 0, 0, 0, + 0, 226, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 235, 0, 285, 0, + 58, 273, 206, 0, + 0, 382, 0, 229, + 0, 0, 0, 0, + 365, 0, 0, 0, + 0, 0, 0, 384, + 372, 0, 0, 0, + 0, 394, 0, 260, + 242, 0, 0, 0, 0, 0, 65, 0, - 0, 0, 0, 343, - 0, 0, 319, 0, + 0, 0, 0, 378, + 0, 0, 325, 0, 0, 67, 0, 0, 0, 0, 5, 0, - 0, 70, 265, 0, - 41, 0, 0, 0, + 0, 70, 267, 0, + 41, 392, 0, 0, 0, 0, 0, 0, 81, 0, 0, 0, - 0, 89, 236, 0, - 260, 0, 222, 0, + 354, 89, 238, 0, + 262, 0, 222, 0, 0, 79, 0, 0, - 0, 0, 0, 0, - 47, 230, 0, 280, - 0, 0, 272, 219, - 0, 0, 348, 0, + 0, 0, 351, 0, + 47, 230, 0, 286, + 0, 0, 274, 219, + 0, 0, 383, 0, }; static table_t table_API_OPENGL_CORE = { - 92, 487, 425, 0, + 92, 531, 469, 0, 149, 209, 0, 0, - 0, 429, 0, 118, - 345, 339, 0, 0, - 0, 0, 304, 533, - 259, 238, 0, 565, - 0, 0, 0, 407, - 0, 0, 0, 430, - 539, 0, 190, 320, + 0, 473, 0, 118, + 380, 368, 386, 0, + 0, 0, 310, 577, + 261, 240, 0, 358, + 0, 0, 0, 451, + 0, 0, 0, 474, + 390, 0, 190, 326, 0, 0, 176, 161, - 462, 144, 150, 6, - 0, 0, 580, 0, - 307, 0, 0, 263, - 151, 0, 396, 0, - 64, 554, 0, 0, - 0, 594, 313, 0, - 530, 0, 0, 224, - 0, 0, 421, 350, - 0, 543, 353, 86, - 491, 454, 231, 0, - 0, 392, 335, 273, - 155, 0, 590, 0, - 246, 93, 488, 0, + 506, 144, 150, 6, + 0, 0, 400, 0, + 313, 0, 393, 265, + 151, 0, 440, 0, + 64, 598, 0, 0, + 0, 236, 319, 0, + 574, 0, 0, 224, + 0, 0, 465, 385, + 0, 587, 397, 86, + 535, 498, 231, 0, + 0, 436, 342, 275, + 155, 0, 351, 0, + 248, 93, 532, 0, 0, 154, 0, 0, - 120, 245, 398, 0, - 360, 346, 287, 0, - 0, 0, 0, 305, - 278, 0, 555, 0, + 120, 247, 442, 0, + 404, 381, 293, 391, + 0, 0, 0, 311, + 284, 0, 361, 0, 0, 0, 0, 0, - 408, 0, 0, 0, + 452, 0, 0, 0, 134, 0, 0, 192, - 239, 0, 0, 177, - 274, 43, 128, 0, - 195, 0, 0, 581, - 0, 365, 73, 0, - 0, 366, 0, 0, - 143, 577, 0, 0, - 528, 361, 290, 0, - 0, 531, 0, 0, - 223, 510, 0, 422, - 0, 0, 544, 354, - 85, 492, 470, 80, + 241, 0, 0, 177, + 276, 43, 128, 0, + 195, 0, 0, 421, + 0, 409, 73, 0, + 0, 410, 0, 0, + 143, 617, 0, 0, + 572, 405, 296, 0, + 0, 575, 0, 0, + 223, 554, 0, 466, + 0, 0, 588, 398, + 85, 536, 514, 80, 20, 0, 0, 213, - 481, 159, 499, 572, - 388, 519, 94, 0, - 389, 0, 136, 0, - 532, 383, 261, 399, - 0, 371, 0, 289, - 0, 0, 515, 0, - 302, 0, 0, 601, - 0, 381, 0, 0, - 0, 409, 0, 0, - 42, 135, 241, 0, - 191, 323, 0, 0, - 178, 163, 218, 406, - 535, 197, 0, 0, + 525, 159, 543, 578, + 432, 563, 94, 0, + 433, 0, 136, 0, + 576, 427, 263, 443, + 0, 415, 0, 295, + 0, 0, 559, 0, + 308, 0, 0, 362, + 0, 425, 0, 0, + 0, 453, 0, 0, + 42, 135, 243, 0, + 191, 329, 0, 0, + 178, 163, 218, 450, + 579, 197, 0, 0, 106, 0, 0, 74, - 0, 0, 367, 0, - 0, 141, 578, 0, - 284, 0, 357, 296, - 552, 295, 82, 252, + 0, 0, 411, 0, + 0, 141, 618, 0, + 290, 0, 387, 302, + 596, 301, 82, 254, 0, 225, 0, 0, - 423, 0, 0, 547, - 0, 83, 493, 471, + 467, 0, 0, 591, + 0, 83, 537, 515, 233, 21, 0, 0, - 211, 482, 162, 373, - 573, 457, 520, 95, - 0, 455, 237, 148, - 39, 0, 122, 262, - 0, 0, 374, 0, - 283, 107, 0, 516, - 0, 303, 0, 0, - 525, 0, 382, 0, - 0, 0, 410, 0, - 0, 386, 23, 331, - 0, 44, 322, 0, - 442, 521, 164, 139, + 211, 526, 162, 417, + 613, 501, 564, 95, + 0, 499, 239, 148, + 39, 0, 122, 264, + 0, 0, 418, 0, + 289, 107, 0, 560, + 0, 309, 0, 0, + 569, 0, 426, 0, + 0, 0, 454, 0, + 0, 430, 23, 338, + 0, 44, 328, 0, + 486, 565, 164, 139, 124, 54, 198, 0, 0, 3, 0, 0, 0, 0, 0, 115, - 447, 0, 142, 234, - 0, 603, 0, 0, - 0, 358, 314, 84, - 341, 0, 0, 609, - 403, 556, 0, 0, - 546, 0, 0, 0, - 385, 433, 0, 325, - 562, 212, 0, 475, - 464, 574, 378, 508, + 491, 0, 142, 234, + 0, 369, 0, 608, + 0, 402, 320, 84, + 376, 0, 0, 620, + 447, 599, 0, 0, + 590, 0, 355, 0, + 429, 477, 0, 331, + 605, 212, 0, 519, + 508, 614, 422, 552, 96, 0, 0, 0, - 153, 33, 420, 126, - 207, 0, 0, 372, - 0, 315, 108, 0, - 0, 587, 308, 538, - 0, 602, 0, 0, - 0, 369, 0, 411, - 359, 244, 29, 427, - 332, 549, 513, 196, - 50, 445, 179, 165, - 186, 506, 0, 199, + 153, 33, 464, 126, + 207, 0, 0, 416, + 0, 321, 108, 0, + 0, 348, 314, 582, + 0, 363, 0, 0, + 0, 413, 0, 455, + 403, 246, 29, 471, + 339, 593, 557, 196, + 50, 489, 179, 165, + 186, 550, 0, 199, 30, 0, 2, 0, - 597, 321, 0, 0, - 435, 451, 217, 446, - 0, 317, 605, 0, - 0, 598, 529, 327, - 0, 253, 0, 0, - 610, 404, 557, 0, - 0, 545, 0, 517, - 428, 247, 187, 299, - 0, 0, 75, 270, - 166, 180, 575, 459, - 463, 97, 0, 0, + 237, 327, 0, 0, + 479, 495, 217, 279, + 0, 323, 371, 0, + 0, 359, 344, 334, + 0, 255, 0, 0, + 621, 448, 600, 0, + 0, 589, 0, 356, + 472, 249, 187, 305, + 0, 0, 75, 272, + 166, 180, 615, 503, + 507, 97, 0, 0, 103, 77, 35, 0, 123, 208, 71, 0, - 375, 0, 316, 109, - 0, 0, 586, 0, - 0, 0, 511, 271, - 458, 0, 0, 0, - 412, 0, 0, 17, - 0, 242, 291, 0, - 46, 49, 443, 522, - 474, 25, 0, 0, - 200, 31, 0, 600, - 0, 0, 559, 0, - 12, 0, 453, 0, - 452, 0, 0, 338, - 0, 376, 599, 585, - 328, 0, 254, 0, - 27, 0, 414, 300, - 0, 0, 0, 579, - 518, 91, 68, 189, + 419, 0, 322, 109, + 0, 0, 347, 0, + 0, 0, 555, 273, + 502, 0, 0, 0, + 456, 0, 0, 17, + 0, 244, 297, 0, + 46, 49, 487, 566, + 518, 25, 0, 0, + 200, 31, 0, 394, + 0, 0, 602, 0, + 12, 0, 497, 0, + 277, 0, 0, 367, + 0, 420, 360, 346, + 335, 0, 256, 0, + 27, 0, 458, 306, + 0, 0, 0, 401, + 562, 91, 68, 189, 0, 0, 0, 76, - 536, 480, 466, 576, - 0, 268, 98, 0, - 0, 104, 561, 40, + 580, 524, 510, 616, + 0, 270, 98, 0, + 0, 104, 604, 40, 0, 125, 0, 72, - 127, 370, 542, 0, - 110, 0, 0, 588, - 0, 294, 0, 249, - 272, 0, 0, 0, - 413, 0, 210, 243, - 4, 0, 145, 292, - 514, 171, 52, 441, - 523, 476, 19, 504, - 456, 201, 0, 569, - 509, 0, 512, 564, - 0, 13, 0, 330, - 0, 309, 0, 0, - 286, 0, 55, 0, - 584, 329, 0, 256, - 0, 449, 0, 415, - 301, 0, 0, 0, + 127, 414, 586, 0, + 110, 0, 0, 349, + 0, 300, 0, 251, + 274, 0, 0, 0, + 457, 0, 210, 245, + 4, 0, 145, 298, + 558, 171, 52, 485, + 567, 520, 19, 548, + 500, 201, 0, 609, + 553, 0, 556, 606, + 0, 13, 0, 337, + 0, 278, 0, 0, + 292, 0, 55, 0, + 345, 336, 0, 258, + 547, 493, 0, 459, + 307, 0, 0, 0, 173, 0, 78, 69, - 188, 266, 318, 0, - 61, 537, 156, 467, + 188, 268, 324, 0, + 61, 581, 156, 511, 0, 0, 0, 99, 131, 0, 105, 0, 34, 0, 121, 0, - 277, 18, 0, 0, - 282, 111, 0, 0, - 589, 0, 0, 436, - 250, 479, 0, 336, - 0, 416, 0, 214, + 283, 18, 0, 0, + 288, 111, 0, 0, + 350, 0, 0, 480, + 252, 523, 0, 343, + 0, 460, 0, 214, 0, 1, 0, 146, - 293, 0, 170, 51, - 440, 174, 477, 461, - 497, 0, 202, 0, - 570, 0, 0, 0, + 299, 0, 170, 51, + 484, 174, 521, 505, + 541, 0, 202, 0, + 610, 0, 0, 0, 132, 0, 14, 0, - 7, 596, 310, 0, - 87, 288, 0, 56, - 0, 0, 297, 0, - 255, 568, 450, 0, - 0, 306, 0, 0, + 7, 357, 316, 0, + 87, 294, 0, 56, + 0, 607, 303, 0, + 257, 549, 494, 0, + 490, 312, 0, 0, 0, 0, 0, 22, - 48, 24, 0, 340, + 48, 24, 0, 373, 0, 62, 0, 157, 0, 0, 63, 0, - 527, 401, 384, 0, + 561, 445, 428, 0, 0, 36, 0, 0, - 100, 326, 129, 0, + 100, 332, 129, 0, 0, 0, 112, 0, 0, 232, 0, 0, - 0, 251, 0, 0, - 334, 591, 417, 0, + 0, 253, 0, 0, + 341, 612, 461, 0, 215, 0, 9, 0, - 147, 248, 0, 494, - 608, 439, 57, 478, - 0, 498, 0, 203, - 548, 571, 0, 0, + 147, 250, 0, 538, + 366, 483, 57, 522, + 0, 542, 0, 203, + 592, 611, 0, 0, 0, 138, 0, 10, - 364, 8, 193, 312, - 116, 0, 285, 0, - 0, 0, 0, 298, - 0, 257, 0, 0, - 0, 503, 0, 0, - 402, 0, 558, 0, - 431, 356, 0, 267, - 566, 0, 59, 507, + 408, 8, 193, 318, + 116, 0, 291, 0, + 0, 0, 0, 304, + 0, 259, 0, 0, + 0, 496, 0, 0, + 446, 0, 601, 0, + 475, 388, 0, 269, + 374, 0, 59, 551, 158, 0, 0, 28, - 387, 53, 130, 362, - 526, 0, 37, 0, - 0, 393, 611, 397, + 431, 53, 130, 406, + 570, 0, 37, 0, + 0, 437, 622, 441, 0, 0, 0, 113, - 0, 0, 434, 0, + 0, 0, 352, 0, 0, 0, 0, 0, - 227, 152, 0, 418, - 0, 216, 540, 32, - 0, 119, 390, 0, - 495, 337, 444, 175, - 167, 185, 502, 281, - 204, 0, 228, 560, + 227, 152, 0, 462, + 0, 216, 584, 32, + 0, 119, 434, 0, + 539, 364, 488, 175, + 167, 185, 546, 287, + 204, 0, 228, 603, 15, 0, 45, 220, - 11, 363, 16, 194, - 311, 368, 333, 604, + 11, 407, 16, 194, + 317, 412, 340, 370, 0, 0, 0, 0, - 0, 0, 342, 90, - 380, 0, 505, 0, - 484, 405, 0, 582, - 0, 426, 377, 0, - 469, 567, 0, 60, - 66, 472, 0, 550, - 26, 391, 563, 483, - 344, 264, 0, 38, - 355, 0, 102, 0, - 394, 0, 0, 0, - 114, 0, 0, 592, + 0, 0, 377, 90, + 424, 0, 315, 0, + 528, 449, 0, 583, + 0, 470, 389, 0, + 513, 375, 0, 60, + 66, 516, 0, 594, + 26, 435, 333, 527, + 379, 266, 0, 38, + 399, 0, 102, 0, + 438, 0, 0, 0, + 114, 0, 0, 353, 88, 0, 0, 0, 0, 226, 0, 0, - 419, 0, 534, 541, - 351, 0, 489, 172, - 235, 496, 279, 438, - 58, 168, 206, 500, - 379, 347, 0, 229, - 486, 424, 0, 137, - 607, 0, 524, 0, - 400, 0, 117, 349, - 606, 0, 0, 0, - 0, 324, 0, 258, - 240, 0, 0, 0, - 0, 485, 65, 0, - 0, 0, 133, 343, - 0, 468, 319, 473, + 463, 0, 478, 585, + 395, 0, 533, 172, + 235, 540, 285, 482, + 58, 168, 206, 544, + 423, 382, 0, 229, + 530, 468, 0, 137, + 365, 0, 568, 0, + 444, 0, 117, 384, + 372, 0, 0, 0, + 0, 330, 0, 260, + 242, 619, 0, 0, + 0, 529, 65, 0, + 0, 0, 133, 378, + 0, 512, 325, 517, 0, 67, 160, 0, - 140, 448, 5, 0, - 583, 70, 265, 0, - 41, 0, 0, 101, - 0, 395, 0, 553, - 81, 595, 0, 0, - 593, 89, 236, 0, - 260, 0, 222, 465, - 0, 79, 551, 205, - 432, 352, 269, 490, - 47, 230, 0, 280, - 437, 460, 169, 219, - 501, 221, 348, 0, + 140, 492, 5, 0, + 573, 70, 267, 0, + 41, 392, 0, 101, + 0, 439, 0, 597, + 81, 571, 0, 0, + 354, 89, 238, 0, + 262, 0, 222, 509, + 0, 79, 595, 205, + 476, 396, 271, 534, + 47, 230, 0, 286, + 481, 504, 169, 219, + 545, 221, 383, 0, }; static table_t *table_set[] = { @@ -2178,6 +2448,7 @@ &table_API_OPENGL_CORE, &table_API_OPENGLES3, &table_API_OPENGLES31, + &table_API_OPENGLES32, }; #define table(api) (*table_set[api]) diff -Nru mesa-12.0.6/src/mesa/main/get_hash_params.py mesa-17.0.7/src/mesa/main/get_hash_params.py --- mesa-12.0.6/src/mesa/main/get_hash_params.py 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/get_hash_params.py 2017-06-01 10:37:10.000000000 +0000 @@ -37,10 +37,10 @@ [ "STENCIL_FUNC", "LOC_CUSTOM, TYPE_ENUM, NO_OFFSET, NO_EXTRA" ], [ "STENCIL_PASS_DEPTH_FAIL", "LOC_CUSTOM, TYPE_ENUM, NO_OFFSET, NO_EXTRA" ], [ "STENCIL_PASS_DEPTH_PASS", "LOC_CUSTOM, TYPE_ENUM, NO_OFFSET, NO_EXTRA" ], - [ "STENCIL_REF", "LOC_CUSTOM, TYPE_INT, NO_OFFSET, NO_EXTRA" ], + [ "STENCIL_REF", "LOC_CUSTOM, TYPE_UINT, NO_OFFSET, NO_EXTRA" ], [ "STENCIL_TEST", "CONTEXT_BOOL(Stencil.Enabled), NO_EXTRA" ], - [ "STENCIL_VALUE_MASK", "LOC_CUSTOM, TYPE_INT, NO_OFFSET, NO_EXTRA" ], - [ "STENCIL_WRITEMASK", "LOC_CUSTOM, TYPE_INT, NO_OFFSET, NO_EXTRA" ], + [ "STENCIL_VALUE_MASK", "LOC_CUSTOM, TYPE_UINT, NO_OFFSET, NO_EXTRA" ], + [ "STENCIL_WRITEMASK", "LOC_CUSTOM, TYPE_UINT, NO_OFFSET, NO_EXTRA" ], [ "SUBPIXEL_BITS", "CONTEXT_INT(Const.SubPixelBits), NO_EXTRA" ], [ "TEXTURE_BINDING_2D", "LOC_CUSTOM, TYPE_INT, TEXTURE_2D_INDEX, NO_EXTRA" ], [ "UNPACK_ALIGNMENT", "CONTEXT_INT(Unpack.Alignment), NO_EXTRA" ], @@ -217,10 +217,10 @@ [ "COLOR_ARRAY_SIZE", "LOC_CUSTOM, TYPE_INT, 0, NO_EXTRA" ], [ "COLOR_ARRAY_TYPE", "ARRAY_ENUM(VertexAttrib[VERT_ATTRIB_COLOR0].Type), NO_EXTRA" ], [ "COLOR_ARRAY_STRIDE", "ARRAY_INT(VertexAttrib[VERT_ATTRIB_COLOR0].Stride), NO_EXTRA" ], - [ "TEXTURE_COORD_ARRAY", "LOC_CUSTOM, TYPE_BOOLEAN, offsetof(struct gl_vertex_attrib_array, Enabled), NO_EXTRA" ], - [ "TEXTURE_COORD_ARRAY_SIZE", "LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_attrib_array, Size), NO_EXTRA" ], - [ "TEXTURE_COORD_ARRAY_TYPE", "LOC_CUSTOM, TYPE_ENUM, offsetof(struct gl_vertex_attrib_array, Type), NO_EXTRA" ], - [ "TEXTURE_COORD_ARRAY_STRIDE", "LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_attrib_array, Stride), NO_EXTRA" ], + [ "TEXTURE_COORD_ARRAY", "LOC_CUSTOM, TYPE_BOOLEAN, offsetof(struct gl_array_attributes, Enabled), NO_EXTRA" ], + [ "TEXTURE_COORD_ARRAY_SIZE", "LOC_CUSTOM, TYPE_INT, offsetof(struct gl_array_attributes, Size), NO_EXTRA" ], + [ "TEXTURE_COORD_ARRAY_TYPE", "LOC_CUSTOM, TYPE_ENUM, offsetof(struct gl_array_attributes, Type), NO_EXTRA" ], + [ "TEXTURE_COORD_ARRAY_STRIDE", "LOC_CUSTOM, TYPE_INT, offsetof(struct gl_array_attributes, Stride), NO_EXTRA" ], # GL_ARB_multitexture [ "MAX_TEXTURE_UNITS", "CONTEXT_INT(Const.MaxTextureUnits), NO_EXTRA" ], @@ -236,9 +236,9 @@ [ "SAMPLE_ALPHA_TO_ONE_ARB", "CONTEXT_BOOL(Multisample.SampleAlphaToOne), NO_EXTRA" ], # GL_ARB_vertex_buffer_object - [ "VERTEX_ARRAY_BUFFER_BINDING_ARB", "LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, VertexBinding[VERT_ATTRIB_POS].BufferObj), NO_EXTRA" ], - [ "NORMAL_ARRAY_BUFFER_BINDING_ARB", "LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, VertexBinding[VERT_ATTRIB_NORMAL].BufferObj), NO_EXTRA" ], - [ "COLOR_ARRAY_BUFFER_BINDING_ARB", "LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, VertexBinding[VERT_ATTRIB_COLOR0].BufferObj), NO_EXTRA" ], + [ "VERTEX_ARRAY_BUFFER_BINDING_ARB", "LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, BufferBinding[VERT_ATTRIB_POS].BufferObj), NO_EXTRA" ], + [ "NORMAL_ARRAY_BUFFER_BINDING_ARB", "LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, BufferBinding[VERT_ATTRIB_NORMAL].BufferObj), NO_EXTRA" ], + [ "COLOR_ARRAY_BUFFER_BINDING_ARB", "LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, BufferBinding[VERT_ATTRIB_COLOR0].BufferObj), NO_EXTRA" ], [ "TEXTURE_COORD_ARRAY_BUFFER_BINDING_ARB", "LOC_CUSTOM, TYPE_INT, NO_OFFSET, NO_EXTRA" ], # GL_OES_point_sprite @@ -297,9 +297,9 @@ # OpenGL 2.0 [ "STENCIL_BACK_FUNC", "CONTEXT_ENUM(Stencil.Function[1]), NO_EXTRA" ], - [ "STENCIL_BACK_VALUE_MASK", "CONTEXT_INT(Stencil.ValueMask[1]), NO_EXTRA" ], - [ "STENCIL_BACK_WRITEMASK", "CONTEXT_INT(Stencil.WriteMask[1]), NO_EXTRA" ], - [ "STENCIL_BACK_REF", "LOC_CUSTOM, TYPE_INT, NO_OFFSET, NO_EXTRA" ], + [ "STENCIL_BACK_VALUE_MASK", "CONTEXT_UINT(Stencil.ValueMask[1]), NO_EXTRA" ], + [ "STENCIL_BACK_WRITEMASK", "CONTEXT_UINT(Stencil.WriteMask[1]), NO_EXTRA" ], + [ "STENCIL_BACK_REF", "LOC_CUSTOM, TYPE_UINT, NO_OFFSET, NO_EXTRA" ], [ "STENCIL_BACK_FAIL", "CONTEXT_ENUM(Stencil.FailFunc[1]), NO_EXTRA" ], [ "STENCIL_BACK_PASS_DEPTH_FAIL", "CONTEXT_ENUM(Stencil.ZFailFunc[1]), NO_EXTRA" ], [ "STENCIL_BACK_PASS_DEPTH_PASS", "CONTEXT_ENUM(Stencil.ZPassFunc[1]), NO_EXTRA" ], @@ -339,7 +339,11 @@ # blend_func_extended [ "MAX_DUAL_SOURCE_DRAW_BUFFERS", "CONTEXT_INT(Const.MaxDualSourceDrawBuffers), extra_ARB_blend_func_extended" ], +# GL_KHR_blend_equation_advanced_coherent + [ "BLEND_ADVANCED_COHERENT_KHR", "CONTEXT_BOOL(Color.BlendCoherent), extra_KHR_blend_equation_advanced_coherent" ], + # GL_ARB_robustness / GL_KHR_robustness + [ "CONTEXT_ROBUST_ACCESS", "CONTEXT_ENUM(Const.RobustAccess), extra_KHR_robustness" ], [ "RESET_NOTIFICATION_STRATEGY_ARB", "CONTEXT_ENUM(Const.ResetStrategy), extra_KHR_robustness_or_GL" ], ]}, @@ -419,9 +423,18 @@ [ "MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS", "CONTEXT_INT(Const.MaxTransformFeedbackInterleavedComponents), extra_EXT_transform_feedback" ], [ "MAX_TRANSFORM_FEEDBACK_SEPARATE_ATTRIBS", "CONTEXT_INT(Const.MaxTransformFeedbackBuffers), extra_EXT_transform_feedback" ], [ "MAX_TRANSFORM_FEEDBACK_SEPARATE_COMPONENTS", "CONTEXT_INT(Const.MaxTransformFeedbackSeparateComponents), extra_EXT_transform_feedback" ], + +# GL_EXT_window_rectangles + [ "MAX_WINDOW_RECTANGLES_EXT", "CONTEXT_INT(Const.MaxWindowRectangles), extra_EXT_window_rectangles" ], + [ "NUM_WINDOW_RECTANGLES_EXT", "CONTEXT_INT(Scissor.NumWindowRects), extra_EXT_window_rectangles" ], + [ "WINDOW_RECTANGLE_MODE_EXT", "CONTEXT_ENUM(Scissor.WindowRectMode), extra_EXT_window_rectangles" ], ]}, { "apis": ["GLES", "GLES2"], "params": [ +# GL_EXT_shader_framebuffer_fetch. Should be true if the MESA framebuffer +# fetch extension is supported since the latter imposes no restrictions on +# non-uniform per-sample discard. + [ "FRAGMENT_SHADER_DISCARDS_SAMPLES_EXT", "CONTEXT_BOOL(Extensions.MESA_shader_framebuffer_fetch), extra_EXT_shader_framebuffer_fetch" ], # GL_OES_EGL_image_external [ "TEXTURE_BINDING_EXTERNAL_OES", "LOC_CUSTOM, TYPE_INT, TEXTURE_EXTERNAL_INDEX, extra_OES_EGL_image_external" ], [ "TEXTURE_EXTERNAL_OES", "LOC_CUSTOM, TYPE_BOOLEAN, 0, extra_OES_EGL_image_external" ], @@ -507,6 +520,9 @@ # GL_ARB_shader_image_load_store / GL_ARB_shader_storage_buffer_object / GLES 3.1 # (MAX_COMBINED_IMAGE_UNITS_AND_FRAGMENT_OUTPUTS in GL_ARB_shader_image_load_store) [ "MAX_COMBINED_SHADER_OUTPUT_RESOURCES", "CONTEXT_INT(Const.MaxCombinedShaderOutputResources), extra_ARB_shader_image_load_store_shader_storage_buffer_object_es31" ], + + # GL_ARB_texture_cube_map_array + [ "TEXTURE_BINDING_CUBE_MAP_ARRAY_ARB", "LOC_CUSTOM, TYPE_INT, TEXTURE_CUBE_ARRAY_INDEX, extra_ARB_texture_cube_map_array_OES_texture_cube_map_array" ], ]}, # Enums in OpenGL Core profile and ES 3.0 @@ -530,16 +546,52 @@ [ "MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS", "CONTEXT_INT(Const.MaxGeometryTotalOutputComponents), extra_version_32_OES_geometry_shader" ], [ "MAX_GEOMETRY_UNIFORM_COMPONENTS", "CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxUniformComponents), extra_version_32_OES_geometry_shader" ], +# GL_ARB_tessellation_shader / also OES and EXT + [ "PATCH_VERTICES", "CONTEXT_INT(TessCtrlProgram.patch_vertices), extra_ARB_tessellation_shader" ], + [ "PATCH_DEFAULT_OUTER_LEVEL", "CONTEXT_FLOAT4(TessCtrlProgram.patch_default_outer_level), extra_ARB_tessellation_shader" ], + [ "PATCH_DEFAULT_INNER_LEVEL", "CONTEXT_FLOAT2(TessCtrlProgram.patch_default_inner_level), extra_ARB_tessellation_shader" ], + [ "MAX_TESS_GEN_LEVEL", "CONTEXT_INT(Const.MaxTessGenLevel), extra_ARB_tessellation_shader" ], + [ "MAX_PATCH_VERTICES", "CONTEXT_INT(Const.MaxPatchVertices), extra_ARB_tessellation_shader" ], + [ "MAX_TESS_CONTROL_UNIFORM_COMPONENTS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxUniformComponents), extra_ARB_tessellation_shader" ], + [ "MAX_TESS_EVALUATION_UNIFORM_COMPONENTS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxUniformComponents), extra_ARB_tessellation_shader" ], + [ "MAX_TESS_CONTROL_TEXTURE_IMAGE_UNITS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxTextureImageUnits), extra_ARB_tessellation_shader" ], + [ "MAX_TESS_EVALUATION_TEXTURE_IMAGE_UNITS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxTextureImageUnits), extra_ARB_tessellation_shader" ], + [ "MAX_TESS_CONTROL_OUTPUT_COMPONENTS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxOutputComponents), extra_ARB_tessellation_shader" ], + [ "MAX_TESS_PATCH_COMPONENTS", "CONTEXT_INT(Const.MaxTessPatchComponents), extra_ARB_tessellation_shader" ], + [ "MAX_TESS_CONTROL_TOTAL_OUTPUT_COMPONENTS", "CONTEXT_INT(Const.MaxTessControlTotalOutputComponents), extra_ARB_tessellation_shader" ], + [ "MAX_TESS_EVALUATION_OUTPUT_COMPONENTS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxOutputComponents), extra_ARB_tessellation_shader" ], + [ "MAX_TESS_CONTROL_INPUT_COMPONENTS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxInputComponents), extra_ARB_tessellation_shader" ], + [ "MAX_TESS_EVALUATION_INPUT_COMPONENTS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxInputComponents), extra_ARB_tessellation_shader" ], + [ "MAX_TESS_CONTROL_UNIFORM_BLOCKS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxUniformBlocks), extra_ARB_tessellation_shader" ], + [ "MAX_TESS_EVALUATION_UNIFORM_BLOCKS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxUniformBlocks), extra_ARB_tessellation_shader" ], + [ "MAX_COMBINED_TESS_CONTROL_UNIFORM_COMPONENTS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxCombinedUniformComponents), extra_ARB_tessellation_shader" ], + [ "MAX_COMBINED_TESS_EVALUATION_UNIFORM_COMPONENTS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxCombinedUniformComponents), extra_ARB_tessellation_shader" ], + [ "PRIMITIVE_RESTART_FOR_PATCHES_SUPPORTED", "CONTEXT_BOOL(Const.PrimitiveRestartForPatches), extra_ARB_tessellation_shader" ], + # GL_ARB_shader_image_load_store / geometry shader [ "MAX_GEOMETRY_IMAGE_UNIFORMS", "CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxImageUniforms), extra_ARB_shader_image_load_store_and_geometry_shader" ], +# GL_ARB_shader_image_load_store / tessellation shader + [ "MAX_TESS_CONTROL_IMAGE_UNIFORMS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxImageUniforms), extra_ARB_shader_image_load_store_and_tessellation"], + [ "MAX_TESS_EVALUATION_IMAGE_UNIFORMS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxImageUniforms), extra_ARB_shader_image_load_store_and_tessellation"], + # GL_ARB_shader_atomic_counters / geometry shader [ "MAX_GEOMETRY_ATOMIC_COUNTER_BUFFERS", "CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxAtomicBuffers), extra_ARB_shader_atomic_counters_and_geometry_shader " ], [ "MAX_GEOMETRY_ATOMIC_COUNTERS", "CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxAtomicCounters), extra_ARB_shader_atomic_counters_and_geometry_shader" ], +# GL_ARB_shader_atomic_counters / tessellation shader + [ "MAX_TESS_CONTROL_ATOMIC_COUNTER_BUFFERS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxAtomicBuffers), extra_ARB_shader_atomic_counters_and_tessellation" ], + [ "MAX_TESS_CONTROL_ATOMIC_COUNTERS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxAtomicCounters), extra_ARB_shader_atomic_counters_and_tessellation" ], + [ "MAX_TESS_EVALUATION_ATOMIC_COUNTER_BUFFERS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxAtomicBuffers), extra_ARB_shader_atomic_counters_and_tessellation" ], + [ "MAX_TESS_EVALUATION_ATOMIC_COUNTERS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxAtomicCounters), extra_ARB_shader_atomic_counters_and_tessellation" ], + # GL_ARB_shader_storage_buffer_object / geometry shader [ "MAX_GEOMETRY_SHADER_STORAGE_BLOCKS", "CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxShaderStorageBlocks), extra_ARB_shader_storage_buffer_object_and_geometry_shader" ], +# GL_ARB_shader_storage_buffer_object / tessellation shader + [ "MAX_TESS_CONTROL_SHADER_STORAGE_BLOCKS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxShaderStorageBlocks), extra_ARB_shader_storage_buffer_object" ], + [ "MAX_TESS_EVALUATION_SHADER_STORAGE_BLOCKS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxShaderStorageBlocks), extra_ARB_shader_storage_buffer_object" ], + # GL_ARB_uniform_buffer_object / geometry shader [ "MAX_GEOMETRY_UNIFORM_BLOCKS", "CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxUniformBlocks), extra_ARB_uniform_buffer_object_and_geometry_shader" ], [ "MAX_COMBINED_GEOMETRY_UNIFORM_COMPONENTS", "CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxCombinedUniformComponents), extra_ARB_uniform_buffer_object_and_geometry_shader" ], @@ -559,6 +611,28 @@ # GL_ARB_texture_buffer_range [ "TEXTURE_BUFFER_OFFSET_ALIGNMENT", "CONTEXT_INT(Const.TextureBufferOffsetAlignment), extra_ARB_texture_buffer_range" ], + +# GL_OES_primitive_bounding_box + [ "PRIMITIVE_BOUNDING_BOX_ARB", "CONTEXT_FLOAT8(PrimitiveBoundingBox), extra_OES_primitive_bounding_box" ], + +# GL_ARB_viewport_array / GL_OES_viewport_array + [ "MAX_VIEWPORTS", "CONTEXT_INT(Const.MaxViewports), extra_ARB_viewport_array_or_oes_viewport_array" ], + [ "VIEWPORT_SUBPIXEL_BITS", "CONTEXT_INT(Const.ViewportSubpixelBits), extra_ARB_viewport_array_or_oes_viewport_array" ], + [ "VIEWPORT_BOUNDS_RANGE", "CONTEXT_FLOAT2(Const.ViewportBounds), extra_ARB_viewport_array_or_oes_viewport_array" ], + [ "VIEWPORT_INDEX_PROVOKING_VERTEX", "CONTEXT_ENUM(Const.LayerAndVPIndexProvokingVertex), extra_ARB_viewport_array_or_oes_viewport_array" ], + +# INTEL_conservative_rasterization + [ "CONSERVATIVE_RASTERIZATION_INTEL", "CONTEXT_BOOL(IntelConservativeRasterization), extra_INTEL_conservative_rasterization" ], +]}, + +{ "apis": ["GL_CORE", "GLES32"], "params": [ + [ "MULTISAMPLE_LINE_WIDTH_RANGE_ARB", "CONTEXT_FLOAT2(Const.MinLineWidthAA), extra_ES32" ], + [ "MULTISAMPLE_LINE_WIDTH_GRANULARITY_ARB", "CONTEXT_FLOAT(Const.LineWidthGranularity), extra_ES32" ], +]}, + +{ "apis": ["GL", "GL_CORE", "GLES32"], "params": [ +# GL 3.0 or ES 3.2 + [ "CONTEXT_FLAGS", "CONTEXT_INT(Const.ContextFlags), extra_version_30" ], ]}, # Remaining enums are only in OpenGL @@ -763,10 +837,10 @@ [ "PRIMITIVE_RESTART_INDEX_NV", "CONTEXT_INT(Array.RestartIndex), extra_NV_primitive_restart" ], # GL_ARB_vertex_buffer_object - [ "INDEX_ARRAY_BUFFER_BINDING_ARB", "LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, VertexBinding[VERT_ATTRIB_COLOR_INDEX].BufferObj), NO_EXTRA" ], - [ "EDGE_FLAG_ARRAY_BUFFER_BINDING_ARB", "LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, VertexBinding[VERT_ATTRIB_EDGEFLAG].BufferObj), NO_EXTRA" ], - [ "SECONDARY_COLOR_ARRAY_BUFFER_BINDING_ARB", "LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, VertexBinding[VERT_ATTRIB_COLOR1].BufferObj), NO_EXTRA" ], - [ "FOG_COORDINATE_ARRAY_BUFFER_BINDING_ARB", "LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, VertexBinding[VERT_ATTRIB_FOG].BufferObj), NO_EXTRA" ], + [ "INDEX_ARRAY_BUFFER_BINDING_ARB", "LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, BufferBinding[VERT_ATTRIB_COLOR_INDEX].BufferObj), NO_EXTRA" ], + [ "EDGE_FLAG_ARRAY_BUFFER_BINDING_ARB", "LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, BufferBinding[VERT_ATTRIB_EDGEFLAG].BufferObj), NO_EXTRA" ], + [ "SECONDARY_COLOR_ARRAY_BUFFER_BINDING_ARB", "LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, BufferBinding[VERT_ATTRIB_COLOR1].BufferObj), NO_EXTRA" ], + [ "FOG_COORDINATE_ARRAY_BUFFER_BINDING_ARB", "LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, BufferBinding[VERT_ATTRIB_FOG].BufferObj), NO_EXTRA" ], # GL_ARB_vertex_program # == GL_VERTEX_PROGRAM_NV @@ -820,7 +894,7 @@ [ "TEXTURE_CUBE_MAP_SEAMLESS", "CONTEXT_BOOL(Texture.CubeMapSeamless), extra_ARB_seamless_cube_map" ], # GL_EXT_texture_integer - [ "RGBA_INTEGER_MODE_EXT", "BUFFER_BOOL(_IntegerColor), extra_EXT_texture_integer_and_new_buffers" ], + [ "RGBA_INTEGER_MODE_EXT", "LOC_CUSTOM, TYPE_INT, 0, extra_EXT_texture_integer_and_new_buffers" ], # GL_ARB_transform_feedback3 [ "MAX_TRANSFORM_FEEDBACK_BUFFERS", "CONTEXT_INT(Const.MaxTransformFeedbackBuffers), extra_ARB_transform_feedback3" ], @@ -829,9 +903,6 @@ # GL_ARB_color_buffer_float [ "RGBA_FLOAT_MODE_ARB", "BUFFER_FIELD(Visual.floatMode, TYPE_BOOLEAN), extra_core_ARB_color_buffer_float_and_new_buffers" ], -# GL 3.0 - [ "CONTEXT_FLAGS", "CONTEXT_INT(Const.ContextFlags), extra_version_30" ], - # GL3.0 / GL_EXT_framebuffer_sRGB [ "FRAMEBUFFER_SRGB_EXT", "CONTEXT_BOOL(Color.sRGBEnabled), extra_EXT_framebuffer_sRGB" ], [ "FRAMEBUFFER_SRGB_CAPABLE_EXT", "BUFFER_INT(Visual.sRGBCapable), extra_EXT_framebuffer_sRGB_and_new_buffers" ], @@ -851,19 +922,12 @@ # GL_ARB_map_buffer_alignment [ "MIN_MAP_BUFFER_ALIGNMENT", "CONTEXT_INT(Const.MinMapBufferAlignment), NO_EXTRA" ], -# GL_ARB_texture_cube_map_array - [ "TEXTURE_BINDING_CUBE_MAP_ARRAY_ARB", "LOC_CUSTOM, TYPE_INT, TEXTURE_CUBE_ARRAY_INDEX, extra_ARB_texture_cube_map_array" ], - # GL_ARB_texture_gather [ "MAX_PROGRAM_TEXTURE_GATHER_COMPONENTS_ARB", "CONTEXT_INT(Const.MaxProgramTextureGatherComponents), extra_ARB_texture_gather"], # GL_ARB_shader_image_load_store [ "MAX_IMAGE_SAMPLES", "CONTEXT_INT(Const.MaxImageSamples), extra_ARB_shader_image_load_store" ], -# GL_ARB_shader_storage_buffer_object - [ "MAX_TESS_CONTROL_SHADER_STORAGE_BLOCKS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxShaderStorageBlocks), extra_ARB_shader_storage_buffer_object" ], - [ "MAX_TESS_EVALUATION_SHADER_STORAGE_BLOCKS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxShaderStorageBlocks), extra_ARB_shader_storage_buffer_object" ], - # GL_ARB_query_buffer_object [ "QUERY_BUFFER_BINDING", "LOC_CUSTOM, TYPE_INT, 0, extra_ARB_query_buffer_object" ], @@ -882,45 +946,13 @@ # GL_ARB_cull_distance [ "MAX_CULL_DISTANCES", "CONTEXT_INT(Const.MaxClipPlanes), extra_ARB_cull_distance" ], [ "MAX_COMBINED_CLIP_AND_CULL_DISTANCES", "CONTEXT_INT(Const.MaxClipPlanes), extra_ARB_cull_distance" ], + +# GL_ARB_compute_variable_group_size + [ "MAX_COMPUTE_VARIABLE_GROUP_INVOCATIONS_ARB", "CONTEXT_INT(Const.MaxComputeVariableGroupInvocations), extra_ARB_compute_variable_group_size" ], ]}, # Enums restricted to OpenGL Core profile { "apis": ["GL_CORE"], "params": [ -# GL_ARB_viewport_array - [ "MAX_VIEWPORTS", "CONTEXT_INT(Const.MaxViewports), extra_ARB_viewport_array" ], - [ "VIEWPORT_SUBPIXEL_BITS", "CONTEXT_INT(Const.ViewportSubpixelBits), extra_ARB_viewport_array" ], - [ "VIEWPORT_BOUNDS_RANGE", "CONTEXT_FLOAT2(Const.ViewportBounds), extra_ARB_viewport_array" ], - [ "VIEWPORT_INDEX_PROVOKING_VERTEX", "CONTEXT_ENUM(Const.LayerAndVPIndexProvokingVertex), extra_ARB_viewport_array" ], - -# GL_ARB_tessellation_shader - [ "PATCH_VERTICES", "CONTEXT_INT(TessCtrlProgram.patch_vertices), extra_ARB_tessellation_shader" ], - [ "PATCH_DEFAULT_OUTER_LEVEL", "CONTEXT_FLOAT4(TessCtrlProgram.patch_default_outer_level), extra_ARB_tessellation_shader" ], - [ "PATCH_DEFAULT_INNER_LEVEL", "CONTEXT_FLOAT2(TessCtrlProgram.patch_default_inner_level), extra_ARB_tessellation_shader" ], - [ "MAX_TESS_GEN_LEVEL", "CONTEXT_INT(Const.MaxTessGenLevel), extra_ARB_tessellation_shader" ], - [ "MAX_PATCH_VERTICES", "CONTEXT_INT(Const.MaxPatchVertices), extra_ARB_tessellation_shader" ], - [ "MAX_TESS_CONTROL_UNIFORM_COMPONENTS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxUniformComponents), extra_ARB_tessellation_shader" ], - [ "MAX_TESS_EVALUATION_UNIFORM_COMPONENTS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxUniformComponents), extra_ARB_tessellation_shader" ], - [ "MAX_TESS_CONTROL_TEXTURE_IMAGE_UNITS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxTextureImageUnits), extra_ARB_tessellation_shader" ], - [ "MAX_TESS_EVALUATION_TEXTURE_IMAGE_UNITS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxTextureImageUnits), extra_ARB_tessellation_shader" ], - [ "MAX_TESS_CONTROL_OUTPUT_COMPONENTS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxOutputComponents), extra_ARB_tessellation_shader" ], - [ "MAX_TESS_PATCH_COMPONENTS", "CONTEXT_INT(Const.MaxTessPatchComponents), extra_ARB_tessellation_shader" ], - [ "MAX_TESS_CONTROL_TOTAL_OUTPUT_COMPONENTS", "CONTEXT_INT(Const.MaxTessControlTotalOutputComponents), extra_ARB_tessellation_shader" ], - [ "MAX_TESS_EVALUATION_OUTPUT_COMPONENTS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxOutputComponents), extra_ARB_tessellation_shader" ], - [ "MAX_TESS_CONTROL_INPUT_COMPONENTS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxInputComponents), extra_ARB_tessellation_shader" ], - [ "MAX_TESS_EVALUATION_INPUT_COMPONENTS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxInputComponents), extra_ARB_tessellation_shader" ], - [ "MAX_TESS_CONTROL_UNIFORM_BLOCKS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxUniformBlocks), extra_ARB_tessellation_shader" ], - [ "MAX_TESS_EVALUATION_UNIFORM_BLOCKS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxUniformBlocks), extra_ARB_tessellation_shader" ], - [ "MAX_COMBINED_TESS_CONTROL_UNIFORM_COMPONENTS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxCombinedUniformComponents), extra_ARB_tessellation_shader" ], - [ "MAX_COMBINED_TESS_EVALUATION_UNIFORM_COMPONENTS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxCombinedUniformComponents), extra_ARB_tessellation_shader" ], - [ "PRIMITIVE_RESTART_FOR_PATCHES_SUPPORTED", "CONTEXT_BOOL(Const.PrimitiveRestartForPatches), extra_ARB_tessellation_shader" ], -# Dependencies on GL_ARB_tessellation_shader - [ "MAX_TESS_CONTROL_ATOMIC_COUNTER_BUFFERS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxAtomicBuffers), extra_ARB_shader_atomic_counters_and_tessellation" ], - [ "MAX_TESS_CONTROL_ATOMIC_COUNTERS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxAtomicCounters), extra_ARB_shader_atomic_counters_and_tessellation" ], - [ "MAX_TESS_EVALUATION_ATOMIC_COUNTER_BUFFERS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxAtomicBuffers), extra_ARB_shader_atomic_counters_and_tessellation" ], - [ "MAX_TESS_EVALUATION_ATOMIC_COUNTERS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxAtomicCounters), extra_ARB_shader_atomic_counters_and_tessellation" ], - [ "MAX_TESS_CONTROL_IMAGE_UNIFORMS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxImageUniforms), extra_ARB_shader_image_load_store_and_tessellation"], - [ "MAX_TESS_EVALUATION_IMAGE_UNIFORMS", "CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxImageUniforms), extra_ARB_shader_image_load_store_and_tessellation"], - # GL_ARB_shader_subroutine [ "MAX_SUBROUTINES", "CONST(MAX_SUBROUTINES), extra_ARB_shader_subroutine" ], [ "MAX_SUBROUTINE_UNIFORM_LOCATIONS", "CONST(MAX_SUBROUTINE_UNIFORM_LOCATIONS), extra_ARB_shader_subroutine" ], diff -Nru mesa-12.0.6/src/mesa/main/glformats.c mesa-17.0.7/src/mesa/main/glformats.c --- mesa-12.0.6/src/mesa/main/glformats.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/glformats.c 2017-06-01 10:37:10.000000000 +0000 @@ -546,6 +546,7 @@ case GL_FLOAT: return comps * sizeof(GLfloat); case GL_HALF_FLOAT_ARB: + case GL_HALF_FLOAT_OES: return comps * sizeof(GLhalfARB); case GL_DOUBLE: return comps * sizeof(GLdouble); @@ -3685,7 +3686,8 @@ * is marked "Texture Filterable" in Table 8.10 of the ES 3.2 specification. */ bool -_mesa_is_es3_texture_filterable(GLenum internal_format) +_mesa_is_es3_texture_filterable(const struct gl_context *ctx, + GLenum internal_format) { switch (internal_format) { case GL_R8: @@ -3709,6 +3711,20 @@ case GL_R11F_G11F_B10F: case GL_RGB9_E5: return true; + case GL_R32F: + case GL_RG32F: + case GL_RGB32F: + case GL_RGBA32F: + /* The OES_texture_float_linear spec says: + * + * "When implemented against OpenGL ES 3.0 or later versions, sized + * 32-bit floating-point formats become texture-filterable. This + * should be noted by, for example, checking the ``TF'' column of + * table 8.13 in the ES 3.1 Specification (``Correspondence of sized + * internal formats to base internal formats ... and use cases ...'') + * for the R32F, RG32F, RGB32F, and RGBA32F formats." + */ + return ctx->Extensions.OES_texture_float_linear; default: return false; } diff -Nru mesa-12.0.6/src/mesa/main/glformats.h mesa-17.0.7/src/mesa/main/glformats.h --- mesa-12.0.6/src/mesa/main/glformats.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/glformats.h 2017-06-01 10:37:10.000000000 +0000 @@ -152,7 +152,8 @@ _mesa_is_es3_color_renderable(GLenum internal_format); extern bool -_mesa_is_es3_texture_filterable(GLenum internal_format); +_mesa_is_es3_texture_filterable(const struct gl_context *ctx, + GLenum internal_format); #ifdef __cplusplus } diff -Nru mesa-12.0.6/src/mesa/main/glheader.h mesa-17.0.7/src/mesa/main/glheader.h --- mesa-12.0.6/src/mesa/main/glheader.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/glheader.h 2017-06-01 10:37:10.000000000 +0000 @@ -140,6 +140,9 @@ #define GL_ETC1_RGB8_OES 0x8D64 #endif +#ifndef GL_EXT_shader_framebuffer_fetch +#define GL_FRAGMENT_SHADER_DISCARDS_SAMPLES_EXT 0x8A52 +#endif /* Inexplicably, GL_HALF_FLOAT_OES has a different value than GL_HALF_FLOAT. */ diff -Nru mesa-12.0.6/src/mesa/main/imports.c mesa-17.0.7/src/mesa/main/imports.c --- mesa-12.0.6/src/mesa/main/imports.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/imports.c 2017-06-01 10:37:10.000000000 +0000 @@ -219,64 +219,6 @@ /*@{*/ -#ifndef HAVE___BUILTIN_FFS -/** - * Find the first bit set in a word. - */ -int -ffs(int i) -{ - register int bit = 0; - if (i != 0) { - if ((i & 0xffff) == 0) { - bit += 16; - i >>= 16; - } - if ((i & 0xff) == 0) { - bit += 8; - i >>= 8; - } - if ((i & 0xf) == 0) { - bit += 4; - i >>= 4; - } - while ((i & 1) == 0) { - bit++; - i >>= 1; - } - bit++; - } - return bit; -} -#endif - -#ifndef HAVE___BUILTIN_FFSLL -/** - * Find position of first bit set in given value. - * XXX Warning: this function can only be used on 64-bit systems! - * \return position of least-significant bit set, starting at 1, return zero - * if no bits set. - */ -int -ffsll(long long int val) -{ - int bit; - - STATIC_ASSERT(sizeof(val) == 8); - - bit = ffs((int) val); - if (bit != 0) - return bit; - - bit = ffs((int) (val >> 32)); - if (bit != 0) - return 32 + bit; - - return 0; -} -#endif - - #ifndef HAVE___BUILTIN_POPCOUNT /** * Return number of bits set in given GLuint. @@ -309,28 +251,6 @@ /*@}*/ - -/**********************************************************************/ -/** \name String */ -/*@{*/ - - -/** Compute simple checksum/hash for a string */ -unsigned int -_mesa_str_checksum(const char *str) -{ - /* This could probably be much better */ - unsigned int sum, i; - const char *c; - sum = i = 1; - for (c = str; *c; c++, i++) - sum += *c * (i % 100); - return sum + i; -} - - -/*@}*/ - /** Needed due to #ifdef's, above. */ int diff -Nru mesa-12.0.6/src/mesa/main/imports.h mesa-17.0.7/src/mesa/main/imports.h --- mesa-12.0.6/src/mesa/main/imports.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/imports.h 2017-06-01 10:37:10.000000000 +0000 @@ -42,6 +42,7 @@ #include "compiler.h" #include "glheader.h" #include "errors.h" +#include "util/bitscan.h" #ifdef __cplusplus extern "C" { @@ -72,7 +73,7 @@ /** * Sometimes we treat GLfloats as GLints. On x86 systems, moving a float - * as a int (thereby using integer registers instead of FP registers) is + * as an int (thereby using integer registers instead of FP registers) is * a performance win. Typically, this can be done with ordinary casts. * But with gcc's -fstrict-aliasing flag (which defaults to on in gcc 3.0) * these casts generate warnings. @@ -324,22 +325,6 @@ _mesa_exec_free( void *addr ); -#ifndef FFS_DEFINED -#define FFS_DEFINED 1 -#ifdef HAVE___BUILTIN_FFS -#define ffs __builtin_ffs -#else -extern int ffs(int i); -#endif - -#ifdef HAVE___BUILTIN_FFSLL -#define ffsll __builtin_ffsll -#else -extern int ffsll(long long int i); -#endif -#endif /* FFS_DEFINED */ - - #ifdef HAVE___BUILTIN_POPCOUNT #define _mesa_bitcount(i) __builtin_popcount(i) #else @@ -354,51 +339,6 @@ _mesa_bitcount_64(uint64_t n); #endif -/** - * Find the last (most significant) bit set in a word. - * - * Essentially ffs() in the reverse direction. - */ -static inline unsigned int -_mesa_fls(unsigned int n) -{ -#ifdef HAVE___BUILTIN_CLZ - return n == 0 ? 0 : 32 - __builtin_clz(n); -#else - unsigned int v = 1; - - if (n == 0) - return 0; - - while (n >>= 1) - v++; - - return v; -#endif -} - -/** - * Find the last (most significant) bit set in a uint64_t value. - * - * Essentially ffsll() in the reverse direction. - */ -static inline unsigned int -_mesa_flsll(uint64_t n) -{ -#ifdef HAVE___BUILTIN_CLZLL - return n == 0 ? 0 : 64 - __builtin_clzll(n); -#else - unsigned int v = 1; - - if (n == 0) - return 0; - - while (n >>= 1) - v++; - - return v; -#endif -} static inline bool _mesa_half_is_negative(GLhalfARB h) @@ -406,9 +346,6 @@ return h & 0x8000; } -extern unsigned int -_mesa_str_checksum(const char *str); - extern int _mesa_snprintf( char *str, size_t size, const char *fmt, ... ) PRINTFLIKE(3, 4); diff -Nru mesa-12.0.6/src/mesa/main/light.c mesa-17.0.7/src/mesa/main/light.c --- mesa-12.0.6/src/mesa/main/light.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/light.c 2017-06-01 10:37:10.000000000 +0000 @@ -31,9 +31,9 @@ #include "enums.h" #include "light.h" #include "macros.h" -#include "util/simple_list.h" #include "mtypes.h" #include "math/m_matrix.h" +#include "util/bitscan.h" void GLAPIENTRY @@ -612,7 +612,6 @@ void _mesa_update_material( struct gl_context *ctx, GLuint bitmask ) { - struct gl_light *light, *list = &ctx->Light.EnabledList; GLfloat (*mat)[4] = ctx->Light.Material.Attrib; if (MESA_VERBOSE & VERBOSE_MATERIAL) @@ -623,14 +622,20 @@ /* update material ambience */ if (bitmask & MAT_BIT_FRONT_AMBIENT) { - foreach (light, list) { + GLbitfield mask = ctx->Light._EnabledLights; + while (mask) { + const int i = u_bit_scan(&mask); + struct gl_light *light = &ctx->Light.Light[i]; SCALE_3V( light->_MatAmbient[0], light->Ambient, mat[MAT_ATTRIB_FRONT_AMBIENT]); } } if (bitmask & MAT_BIT_BACK_AMBIENT) { - foreach (light, list) { + GLbitfield mask = ctx->Light._EnabledLights; + while (mask) { + const int i = u_bit_scan(&mask); + struct gl_light *light = &ctx->Light.Light[i]; SCALE_3V( light->_MatAmbient[1], light->Ambient, mat[MAT_ATTRIB_BACK_AMBIENT]); } @@ -651,14 +656,20 @@ /* update material diffuse values */ if (bitmask & MAT_BIT_FRONT_DIFFUSE) { - foreach (light, list) { + GLbitfield mask = ctx->Light._EnabledLights; + while (mask) { + const int i = u_bit_scan(&mask); + struct gl_light *light = &ctx->Light.Light[i]; SCALE_3V( light->_MatDiffuse[0], light->Diffuse, mat[MAT_ATTRIB_FRONT_DIFFUSE] ); } } if (bitmask & MAT_BIT_BACK_DIFFUSE) { - foreach (light, list) { + GLbitfield mask = ctx->Light._EnabledLights; + while (mask) { + const int i = u_bit_scan(&mask); + struct gl_light *light = &ctx->Light.Light[i]; SCALE_3V( light->_MatDiffuse[1], light->Diffuse, mat[MAT_ATTRIB_BACK_DIFFUSE] ); } @@ -666,14 +677,20 @@ /* update material specular values */ if (bitmask & MAT_BIT_FRONT_SPECULAR) { - foreach (light, list) { + GLbitfield mask = ctx->Light._EnabledLights; + while (mask) { + const int i = u_bit_scan(&mask); + struct gl_light *light = &ctx->Light.Light[i]; SCALE_3V( light->_MatSpecular[0], light->Specular, mat[MAT_ATTRIB_FRONT_SPECULAR]); } } if (bitmask & MAT_BIT_BACK_SPECULAR) { - foreach (light, list) { + GLbitfield mask = ctx->Light._EnabledLights; + while (mask) { + const int i = u_bit_scan(&mask); + struct gl_light *light = &ctx->Light.Light[i]; SCALE_3V( light->_MatSpecular[1], light->Specular, mat[MAT_ATTRIB_BACK_SPECULAR]); } @@ -689,13 +706,14 @@ void _mesa_update_color_material( struct gl_context *ctx, const GLfloat color[4] ) { - const GLbitfield bitmask = ctx->Light._ColorMaterialBitmask; + GLbitfield bitmask = ctx->Light._ColorMaterialBitmask; struct gl_material *mat = &ctx->Light.Material; - int i; - for (i = 0 ; i < MAT_ATTRIB_MAX ; i++) - if (bitmask & (1<Attrib[i], color ); + while (bitmask) { + const int i = u_bit_scan(&bitmask); + + COPY_4FV( mat->Attrib[i], color ); + } _mesa_update_material( ctx, bitmask ); } @@ -864,13 +882,15 @@ _mesa_update_lighting( struct gl_context *ctx ) { GLbitfield flags = 0; - struct gl_light *light; ctx->Light._NeedEyeCoords = GL_FALSE; if (!ctx->Light.Enabled) return; - foreach(light, &ctx->Light.EnabledList) { + GLbitfield mask = ctx->Light._EnabledLights; + while (mask) { + const int i = u_bit_scan(&mask); + struct gl_light *light = &ctx->Light.Light[i]; flags |= light->_Flags; } @@ -926,7 +946,6 @@ static void compute_light_positions( struct gl_context *ctx ) { - struct gl_light *light; static const GLfloat eye_z[3] = { 0, 0, 1 }; if (!ctx->Light.Enabled) @@ -939,7 +958,10 @@ TRANSFORM_NORMAL( ctx->_EyeZDir, eye_z, ctx->ModelviewMatrixStack.Top->m ); } - foreach (light, &ctx->Light.EnabledList) { + GLbitfield mask = ctx->Light._EnabledLights; + while (mask) { + const int i = u_bit_scan(&mask); + struct gl_light *light = &ctx->Light.Light[i]; if (ctx->_NeedEyeCoords) { /* _Position is in eye coordinate space */ @@ -1100,8 +1122,6 @@ static void init_light( struct gl_light *l, GLuint n ) { - make_empty_list( l ); - ASSIGN_4V( l->Ambient, 0.0, 0.0, 0.0, 1.0 ); if (n==0) { ASSIGN_4V( l->Diffuse, 1.0, 1.0, 1.0, 1.0 ); @@ -1171,10 +1191,10 @@ GLuint i; /* Lighting group */ + ctx->Light._EnabledLights = 0; for (i = 0; i < MAX_LIGHTS; i++) { init_light( &ctx->Light.Light[i], i ); } - make_empty_list( &ctx->Light.EnabledList ); init_lightmodel( &ctx->Light.Model ); init_material( &ctx->Light.Material ); diff -Nru mesa-12.0.6/src/mesa/main/macros.h mesa-17.0.7/src/mesa/main/macros.h --- mesa-12.0.6/src/mesa/main/macros.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/macros.h 2017-06-01 10:37:10.000000000 +0000 @@ -660,19 +660,6 @@ -/** Clamp X to [MIN,MAX] */ -#define CLAMP( X, MIN, MAX ) ( (X)<(MIN) ? (MIN) : ((X)>(MAX) ? (MAX) : (X)) ) - -/** Minimum of two values: */ -#define MIN2( A, B ) ( (A)<(B) ? (A) : (B) ) - -/** Maximum of two values: */ -#define MAX2( A, B ) ( (A)>(B) ? (A) : (B) ) - -/** Minimum and maximum of three values: */ -#define MIN3( A, B, C ) ((A) < (B) ? MIN2(A, C) : MIN2(B, C)) -#define MAX3( A, B, C ) ((A) > (B) ? MAX2(A, C) : MAX2(B, C)) - static inline unsigned minify(unsigned value, unsigned levels) { diff -Nru mesa-12.0.6/src/mesa/main/matrix.c mesa-17.0.7/src/mesa/main/matrix.c --- mesa-12.0.6/src/mesa/main/matrix.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/matrix.c 2017-06-01 10:37:10.000000000 +0000 @@ -43,6 +43,7 @@ #include "matrix.h" #include "mtypes.h" #include "math/m_matrix.h" +#include "util/bitscan.h" /** @@ -242,6 +243,24 @@ } return; } + if (stack->Depth + 1 >= stack->StackSize) { + unsigned new_stack_size = stack->StackSize * 2; + unsigned i; + GLmatrix *new_stack = realloc(stack->Stack, + sizeof(*new_stack) * new_stack_size); + + if (!new_stack) { + _mesa_error(ctx, GL_OUT_OF_MEMORY, "glPushMatrix()"); + return; + } + + for (i = stack->StackSize; i < new_stack_size; i++) + _math_matrix_ctr(&new_stack[i]); + + stack->Stack = new_stack; + stack->StackSize = new_stack_size; + } + _math_matrix_copy( &stack->Stack[stack->Depth + 1], &stack->Stack[stack->Depth] ); stack->Depth++; @@ -337,9 +356,11 @@ m[2], m[6], m[10], m[14], m[3], m[7], m[11], m[15]); - FLUSH_VERTICES(ctx, 0); - _math_matrix_loadf( ctx->CurrentStack->Top, m ); - ctx->NewState |= ctx->CurrentStack->DirtyFlag; + if (memcmp(m, ctx->CurrentStack->Top->m, 16 * sizeof(GLfloat)) != 0) { + FLUSH_VERTICES(ctx, 0); + _math_matrix_loadf( ctx->CurrentStack->Top, m ); + ctx->NewState |= ctx->CurrentStack->DirtyFlag; + } } @@ -554,20 +575,20 @@ static void update_projection( struct gl_context *ctx ) { + GLbitfield mask; + _math_matrix_analyse( ctx->ProjectionMatrixStack.Top ); /* Recompute clip plane positions in clipspace. This is also done * in _mesa_ClipPlane(). */ - if (ctx->Transform.ClipPlanesEnabled) { - GLuint p; - for (p = 0; p < ctx->Const.MaxClipPlanes; p++) { - if (ctx->Transform.ClipPlanesEnabled & (1 << p)) { - _mesa_transform_vector( ctx->Transform._ClipUserPlane[p], - ctx->Transform.EyeUserPlane[p], - ctx->ProjectionMatrixStack.Top->inv ); - } - } + mask = ctx->Transform.ClipPlanesEnabled; + while (mask) { + const int p = u_bit_scan(&mask); + + _mesa_transform_vector( ctx->Transform._ClipUserPlane[p], + ctx->Transform.EyeUserPlane[p], + ctx->ProjectionMatrixStack.Top->inv ); } } @@ -644,9 +665,10 @@ stack->Depth = 0; stack->MaxDepth = maxDepth; stack->DirtyFlag = dirtyFlag; - /* The stack */ - stack->Stack = calloc(maxDepth, sizeof(GLmatrix)); - for (i = 0; i < maxDepth; i++) { + /* The stack will be dynamically resized at glPushMatrix() time */ + stack->Stack = calloc(1, sizeof(GLmatrix)); + stack->StackSize = 1; + for (i = 0; i < stack->StackSize; i++) { _math_matrix_ctr(&stack->Stack[i]); } stack->Top = stack->Stack; @@ -664,11 +686,12 @@ free_matrix_stack( struct gl_matrix_stack *stack ) { GLuint i; - for (i = 0; i < stack->MaxDepth; i++) { + for (i = 0; i < stack->StackSize; i++) { _math_matrix_dtr(&stack->Stack[i]); } free(stack->Stack); stack->Stack = stack->Top = NULL; + stack->StackSize = 0; } /*@}*/ diff -Nru mesa-12.0.6/src/mesa/main/mipmap.c mesa-17.0.7/src/mesa/main/mipmap.c --- mesa-12.0.6/src/mesa/main/mipmap.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/mipmap.c 2017-06-01 10:37:10.000000000 +0000 @@ -38,8 +38,8 @@ #include "image.h" #include "macros.h" #include "util/half_float.h" -#include "../../gallium/auxiliary/util/u_format_rgb9e5.h" -#include "../../gallium/auxiliary/util/u_format_r11g11b10f.h" +#include "util/format_rgb9e5.h" +#include "util/format_r11g11b10f.h" @@ -1777,7 +1777,8 @@ } if ((srcHeight - 2 * border > 1) && - (target != GL_TEXTURE_1D_ARRAY_EXT)) { + target != GL_TEXTURE_1D_ARRAY_EXT && + target != GL_PROXY_TEXTURE_1D_ARRAY_EXT) { *dstHeight = (srcHeight - 2 * border) / 2 + 2 * border; } else { @@ -1785,8 +1786,10 @@ } if ((srcDepth - 2 * border > 1) && - (target != GL_TEXTURE_2D_ARRAY_EXT && - target != GL_TEXTURE_CUBE_MAP_ARRAY)) { + target != GL_TEXTURE_2D_ARRAY_EXT && + target != GL_PROXY_TEXTURE_2D_ARRAY_EXT && + target != GL_TEXTURE_CUBE_MAP_ARRAY && + target != GL_PROXY_TEXTURE_CUBE_MAP_ARRAY) { *dstDepth = (srcDepth - 2 * border) / 2 + 2 * border; } else { diff -Nru mesa-12.0.6/src/mesa/main/mtypes.h mesa-17.0.7/src/mesa/main/mtypes.h --- mesa-12.0.6/src/mesa/main/mtypes.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/mtypes.h 2017-06-01 10:37:10.000000000 +0000 @@ -43,8 +43,10 @@ #include "glapi/glapi.h" #include "math/m_matrix.h" /* GLmatrix */ #include "compiler/shader_enums.h" +#include "compiler/shader_info.h" #include "main/formats.h" /* MESA_FORMAT_COUNT */ #include "compiler/glsl/list.h" +#include "util/bitscan.h" #ifdef __cplusplus @@ -110,6 +112,8 @@ case VARYING_SLOT_LAYER: case VARYING_SLOT_TESS_LEVEL_OUTER: case VARYING_SLOT_TESS_LEVEL_INNER: + case VARYING_SLOT_BOUNDING_BOX0: + case VARYING_SLOT_BOUNDING_BOX1: return GL_FALSE; default: return GL_TRUE; @@ -333,9 +337,6 @@ */ struct gl_light { - struct gl_light *next; /**< double linked list with sentinel */ - struct gl_light *prev; - GLfloat Ambient[4]; /**< ambient color */ GLfloat Diffuse[4]; /**< diffuse color */ GLfloat Specular[4]; /**< specular color */ @@ -455,6 +456,18 @@ GLboolean _BlendFuncPerBuffer; /** Are the blend equations currently different for each buffer/target? */ GLboolean _BlendEquationPerBuffer; + + /** + * Which advanced blending mode is in use (or BLEND_NONE). + * + * KHR_blend_equation_advanced only allows advanced blending with a single + * draw buffer, and NVX_blend_equation_advanced_multi_draw_buffer still + * requires all draw buffers to match, so we only need a single value. + */ + enum gl_advanced_blend_mode _AdvancedBlendMode; + + /** Coherency requested via glEnable(GL_BLEND_ADVANCED_COHERENT_KHR)? */ + bool BlendCoherent; /*@}*/ /** @@ -630,9 +643,10 @@ * Derived state for optimizations: */ /*@{*/ + GLbitfield _EnabledLights; /**< bitmask containing enabled lights */ + GLboolean _NeedEyeCoords; GLboolean _NeedVertices; /**< Use fast shader? */ - struct gl_light EnabledList; /**< List sentinel */ GLfloat _BaseColor[2][3]; /*@}*/ @@ -756,7 +770,7 @@ GLboolean SmoothFlag; /**< True if GL_POINT_SMOOTH is enabled */ GLboolean _Attenuated; /**< True if Params != [1, 0, 0] */ GLboolean PointSprite; /**< GL_NV/ARB_point_sprite */ - GLboolean CoordReplace[MAX_TEXTURE_COORD_UNITS]; /**< GL_ARB_point_sprite*/ + GLbitfield CoordReplace; /**< GL_ARB_point_sprite*/ GLenum SpriteRMode; /**< GL_NV_point_sprite (only!) */ GLenum SpriteOrigin; /**< GL_ARB_point_sprite */ }; @@ -796,6 +810,9 @@ { GLbitfield EnableFlags; /**< Scissor test enabled? */ struct gl_scissor_rect ScissorArray[MAX_VIEWPORTS]; + GLint NumWindowRects; /**< Count of enabled window rectangles */ + GLenum WindowRectMode; /**< Whether to include or exclude the rects */ + struct gl_scissor_rect WindowRects[MAX_WINDOW_RECTANGLES]; }; @@ -1315,18 +1332,18 @@ /** - * Client vertex array attributes + * Vertex array information which is derived from gl_array_attributes + * and gl_vertex_buffer_binding information. Used by the VBO module and + * device drivers. */ -struct gl_client_array +struct gl_vertex_array { GLint Size; /**< components per element (1,2,3,4) */ GLenum Type; /**< datatype: GL_FLOAT, GL_INT, etc */ GLenum Format; /**< default: GL_RGBA, but may be GL_BGRA */ - GLsizei Stride; /**< user-specified stride */ GLsizei StrideB; /**< actual stride in bytes */ GLuint _ElementSize; /**< size of each element in bytes */ const GLubyte *Ptr; /**< Points to array data */ - GLboolean Enabled; /**< Enabled flag is a boolean */ GLboolean Normalized; /**< GL_ARB_vertex_program */ GLboolean Integer; /**< Integer-valued? */ GLboolean Doubles; /**< double precision values are not converted to floats */ @@ -1337,7 +1354,7 @@ /** - * Vertex attribute array as seen by the client. + * Attributes to describe a vertex array. * * Contains the size, type, format and normalization flag, * along with the index of a vertex buffer binding point. @@ -1349,7 +1366,7 @@ * and VERTEX_BINDING_STRIDE to the same value, while * glBindVertexBuffer() will only set VERTEX_BINDING_STRIDE. */ -struct gl_vertex_attrib_array +struct gl_array_attributes { GLint Size; /**< Components per element (1,2,3,4) */ GLenum Type; /**< Datatype: GL_FLOAT, GL_INT, etc */ @@ -1362,7 +1379,7 @@ GLboolean Integer; /**< Fixed-point values are not converted to floats */ GLboolean Doubles; /**< double precision values are not converted to floats */ GLuint _ElementSize; /**< Size of each element in bytes */ - GLuint VertexBinding; /**< Vertex buffer binding */ + GLuint BufferBindingIndex; /**< Vertex buffer binding */ }; @@ -1424,13 +1441,13 @@ * This is a legacy data structure created from gl_vertex_attrib_array and * gl_vertex_buffer_binding, for compatibility with existing driver code. */ - struct gl_client_array _VertexAttrib[VERT_ATTRIB_MAX]; + struct gl_vertex_array _VertexAttrib[VERT_ATTRIB_MAX]; /** Vertex attribute arrays */ - struct gl_vertex_attrib_array VertexAttrib[VERT_ATTRIB_MAX]; + struct gl_array_attributes VertexAttrib[VERT_ATTRIB_MAX]; /** Vertex buffer bindings */ - struct gl_vertex_buffer_binding VertexBinding[VERT_ATTRIB_MAX]; + struct gl_vertex_buffer_binding BufferBinding[VERT_ATTRIB_MAX]; /** Mask indicating which vertex arrays have vertex buffer associated. */ GLbitfield64 VertexAttribBufferMask; @@ -1515,7 +1532,7 @@ * Vertex arrays as consumed by a driver. * The array pointer is set up only by the VBO module. */ - const struct gl_client_array **_DrawArrays; /**< 0..VERT_ATTRIB_MAX-1 */ + const struct gl_vertex_array **_DrawArrays; /**< 0..VERT_ATTRIB_MAX-1 */ /** Legal array datatypes and the API for which they have been computed */ GLbitfield LegalTypesMask; @@ -1629,40 +1646,40 @@ */ struct gl_transform_feedback_output { - unsigned OutputRegister; - unsigned OutputBuffer; - unsigned NumComponents; - unsigned StreamId; + uint32_t OutputRegister; + uint32_t OutputBuffer; + uint32_t NumComponents; + uint32_t StreamId; /** offset (in DWORDs) of this output within the interleaved structure */ - unsigned DstOffset; + uint32_t DstOffset; /** * Offset into the output register of the data to output. For example, * if NumComponents is 2 and ComponentOffset is 1, then the data to * offset is in the y and z components of the output register. */ - unsigned ComponentOffset; + uint32_t ComponentOffset; }; struct gl_transform_feedback_buffer { - unsigned Binding; + uint32_t Binding; - unsigned NumVaryings; + uint32_t NumVaryings; /** * Total number of components stored in each buffer. This may be used by * hardware back-ends to determine the correct stride when interleaving * multiple transform feedback outputs in the same buffer. */ - unsigned Stride; + uint32_t Stride; /** * Which transform feedback stream this buffer binding is associated with. */ - unsigned Stream; + uint32_t Stream; }; @@ -1713,12 +1730,12 @@ unsigned GlesRemainingPrims; /** - * The shader program active when BeginTransformFeedback() was called. + * The program active when BeginTransformFeedback() was called. * When active and unpaused, this equals ctx->Shader.CurrentProgram[stage], * where stage is the pipeline stage that is the source of data for * transform feedback. */ - struct gl_shader_program *shader_program; + struct gl_program *program; /** The feedback buffers */ GLuint BufferNames[MAX_FEEDBACK_BUFFERS]; @@ -1893,6 +1910,9 @@ */ struct gl_program { + /** FIXME: This must be first until we split shader_info from nir_shader */ + struct shader_info info; + mtx_t Mutex; GLuint Id; GLint RefCount; @@ -1901,167 +1921,151 @@ GLenum Target; /**< GL_VERTEX/FRAGMENT_PROGRAM_ARB, GL_GEOMETRY_PROGRAM_NV */ GLenum Format; /**< String encoding format */ - struct prog_instruction *Instructions; + GLboolean _Used; /**< Ever used for drawing? Used for debugging */ struct nir_shader *nir; - GLbitfield64 InputsRead; /**< Bitmask of which input regs are read */ - GLbitfield64 DoubleInputsRead; /**< Bitmask of which input regs are read and are doubles */ - GLbitfield64 OutputsWritten; /**< Bitmask of which output regs are written */ - GLbitfield PatchInputsRead; /**< VAR[0..31] usage for patch inputs (user-defined only) */ - GLbitfield PatchOutputsWritten; /**< VAR[0..31] usage for patch outputs (user-defined only) */ - GLbitfield SystemValuesRead; /**< Bitmask of SYSTEM_VALUE_x inputs used */ + bool is_arb_asm; /** Is this an ARB assembly-style program */ + + GLbitfield64 SecondaryOutputsWritten; /**< Subset of OutputsWritten outputs written with non-zero index. */ GLbitfield TexturesUsed[MAX_COMBINED_TEXTURE_IMAGE_UNITS]; /**< TEXTURE_x_BIT bitmask */ GLbitfield SamplersUsed; /**< Bitfield of which samplers are used */ GLbitfield ShadowSamplers; /**< Texture units used for shadow sampling. */ + GLbitfield ExternalSamplersUsed; /**< Texture units used for samplerExternalOES */ - GLboolean UsesGather; /**< Does this program use gather4 at all? */ - - /** - * For vertex and geometry shaders, true if the program uses the - * gl_ClipDistance output. Ignored for fragment shaders. - */ + /* Vertex and geometry shaders fields */ unsigned ClipDistanceArraySize; unsigned CullDistanceArraySize; + /* Fragement shader only fields */ + GLboolean OriginUpperLeft; + GLboolean PixelCenterInteger; /** Named parameters, constants, etc. from program text */ struct gl_program_parameter_list *Parameters; - /** - * Local parameters used by the program. - * - * It's dynamically allocated because it is rarely used (just - * assembly-style programs), and MAX_PROGRAM_LOCAL_PARAMS entries once it's - * allocated. - */ - GLfloat (*LocalParams)[4]; - /** Map from sampler unit to texture unit (set by glUniform1i()) */ GLubyte SamplerUnits[MAX_SAMPLERS]; - /** Bitmask of which register files are read/written with indirect - * addressing. Mask of (1 << PROGRAM_x) bits. + /* FIXME: We should be able to make this struct a union. However some + * drivers (i915/fragment_programs, swrast/prog_execute) mix the use of + * these fields, we should fix this. */ - GLbitfield IndirectRegisterFiles; - - /** Logical counts */ - /*@{*/ - GLuint NumInstructions; - GLuint NumTemporaries; - GLuint NumParameters; - GLuint NumAttributes; - GLuint NumAddressRegs; - GLuint NumAluInstructions; - GLuint NumTexInstructions; - GLuint NumTexIndirections; - /*@}*/ - /** Native, actual h/w counts */ - /*@{*/ - GLuint NumNativeInstructions; - GLuint NumNativeTemporaries; - GLuint NumNativeParameters; - GLuint NumNativeAttributes; - GLuint NumNativeAddressRegs; - GLuint NumNativeAluInstructions; - GLuint NumNativeTexInstructions; - GLuint NumNativeTexIndirections; - /*@}*/ -}; - - -/** Vertex program object */ -struct gl_vertex_program -{ - struct gl_program Base; /**< base class */ - GLboolean IsPositionInvariant; -}; - - -/** Tessellation control program object */ -struct gl_tess_ctrl_program -{ - struct gl_program Base; /**< base class */ - - /* output layout */ - GLint VerticesOut; -}; - - -/** Tessellation evaluation program object */ -struct gl_tess_eval_program -{ - struct gl_program Base; /**< base class */ - - /* input layout */ - GLenum PrimitiveMode; /* GL_TRIANGLES, GL_QUADS or GL_ISOLINES */ - GLenum Spacing; /* GL_EQUAL, GL_FRACTIONAL_EVEN, GL_FRACTIONAL_ODD */ - GLenum VertexOrder; /* GL_CW or GL_CCW */ - bool PointMode; -}; - - -/** Geometry program object */ -struct gl_geometry_program -{ - struct gl_program Base; /**< base class */ - - GLint VerticesIn; - GLint VerticesOut; - GLint Invocations; - GLenum InputType; /**< GL_POINTS, GL_LINES, GL_LINES_ADJACENCY_ARB, - GL_TRIANGLES, or GL_TRIANGLES_ADJACENCY_ARB */ - GLenum OutputType; /**< GL_POINTS, GL_LINE_STRIP or GL_TRIANGLE_STRIP */ - bool UsesEndPrimitive; - bool UsesStreams; -}; - - -/** Fragment program object */ -struct gl_fragment_program -{ - struct gl_program Base; /**< base class */ - GLboolean UsesKill; /**< shader uses KIL instruction */ - GLboolean UsesDFdy; /**< shader uses DDY instruction */ - GLboolean OriginUpperLeft; - GLboolean PixelCenterInteger; - enum gl_frag_depth_layout FragDepthLayout; - - /** - * GLSL interpolation qualifier associated with each fragment shader input. - * For inputs that do not have an interpolation qualifier specified in - * GLSL, the value is INTERP_QUALIFIER_NONE. - */ - enum glsl_interp_qualifier InterpQualifier[VARYING_SLOT_MAX]; - - /** - * Bitfield indicating, for each fragment shader input, 1 if that input - * uses centroid interpolation, 0 otherwise. Unused inputs are 0. - */ - GLbitfield64 IsCentroid; - - /** - * Bitfield indicating, for each fragment shader input, 1 if that input - * uses sample interpolation, 0 otherwise. Unused inputs are 0. - */ - GLbitfield64 IsSample; -}; - - -/** Compute program object */ -struct gl_compute_program -{ - struct gl_program Base; /**< base class */ - - /** - * Size specified using local_size_{x,y,z}. - */ - unsigned LocalSize[3]; - - /** - * Size of shared variables accessed by the compute shader. - */ - unsigned SharedSize; + struct { + /** Fields used by GLSL programs */ + struct { + /** Data shared by gl_program and gl_shader_program */ + struct gl_shader_program_data *data; + + struct gl_active_atomic_buffer **AtomicBuffers; + + /** Post-link transform feedback info. */ + struct gl_transform_feedback_info *LinkedTransformFeedback; + + /** + * Number of types for subroutine uniforms. + */ + GLuint NumSubroutineUniformTypes; + + /** + * Subroutine uniform remap table + * based on the program level uniform remap table. + */ + GLuint NumSubroutineUniforms; /* non-sparse total */ + GLuint NumSubroutineUniformRemapTable; + struct gl_uniform_storage **SubroutineUniformRemapTable; + + /** + * Num of subroutine functions for this stage and storage for them. + */ + GLuint NumSubroutineFunctions; + GLuint MaxSubroutineFunctionIndex; + struct gl_subroutine_function *SubroutineFunctions; + + /** + * Map from image uniform index to image unit (set by glUniform1i()) + * + * An image uniform index is associated with each image uniform by + * the linker. The image index associated with each uniform is + * stored in the \c gl_uniform_storage::image field. + */ + GLubyte ImageUnits[MAX_IMAGE_UNIFORMS]; + + /** + * Access qualifier specified in the shader for each image uniform + * index. Either \c GL_READ_ONLY, \c GL_WRITE_ONLY or \c + * GL_READ_WRITE. + * + * It may be different, though only more strict than the value of + * \c gl_image_unit::Access for the corresponding image unit. + */ + GLenum ImageAccess[MAX_IMAGE_UNIFORMS]; + + struct gl_uniform_block **UniformBlocks; + struct gl_uniform_block **ShaderStorageBlocks; + + /** Which texture target is being sampled + * (TEXTURE_1D/2D/3D/etc_INDEX) + */ + gl_texture_index SamplerTargets[MAX_SAMPLERS]; + + union { + struct { + /** + * A bitmask of gl_advanced_blend_mode values + */ + GLbitfield BlendSupport; + } fs; + }; + } sh; + + /** ARB assembly-style program fields */ + struct { + struct prog_instruction *Instructions; + + /** + * Local parameters used by the program. + * + * It's dynamically allocated because it is rarely used (just + * assembly-style programs), and MAX_PROGRAM_LOCAL_PARAMS entries + * once it's allocated. + */ + GLfloat (*LocalParams)[4]; + + /** Bitmask of which register files are read/written with indirect + * addressing. Mask of (1 << PROGRAM_x) bits. + */ + GLbitfield IndirectRegisterFiles; + + /** Logical counts */ + /*@{*/ + GLuint NumInstructions; + GLuint NumTemporaries; + GLuint NumParameters; + GLuint NumAttributes; + GLuint NumAddressRegs; + GLuint NumAluInstructions; + GLuint NumTexInstructions; + GLuint NumTexIndirections; + /*@}*/ + /** Native, actual h/w counts */ + /*@{*/ + GLuint NumNativeInstructions; + GLuint NumNativeTemporaries; + GLuint NumNativeParameters; + GLuint NumNativeAttributes; + GLuint NumNativeAddressRegs; + GLuint NumNativeAluInstructions; + GLuint NumNativeTexInstructions; + GLuint NumNativeTexIndirections; + /*@}*/ + + /** Used by ARB assembly-style programs. Can only be true for vertex + * programs. + */ + GLboolean IsPositionInvariant; + } arb; + }; }; @@ -2086,13 +2090,13 @@ GLboolean TwoSideEnabled; /**< GL_VERTEX_PROGRAM_TWO_SIDE_ARB/NV */ /** Computed two sided lighting for fixed function/programs. */ GLboolean _TwoSideEnabled; - struct gl_vertex_program *Current; /**< User-bound vertex program */ + struct gl_program *Current; /**< User-bound vertex program */ /** Currently enabled and valid vertex program (including internal * programs, user-defined vertex programs and GLSL vertex shaders). * This is the program we must use when rendering. */ - struct gl_vertex_program *_Current; + struct gl_program *_Current; GLfloat Parameters[MAX_PROGRAM_ENV_PARAMS][4]; /**< Env params */ @@ -2100,7 +2104,7 @@ GLboolean _MaintainTnlProgram; /** Program to emulate fixed-function T&L (see above) */ - struct gl_vertex_program *_TnlProgram; + struct gl_program *_TnlProgram; /** Cache of fixed-function programs */ struct gl_program_cache *Cache; @@ -2114,7 +2118,7 @@ struct gl_tess_ctrl_program_state { /** Currently bound and valid shader. */ - struct gl_tess_ctrl_program *_Current; + struct gl_program *_Current; GLint patch_vertices; GLfloat patch_default_outer_level[4]; @@ -2127,7 +2131,7 @@ struct gl_tess_eval_program_state { /** Currently bound and valid shader. */ - struct gl_tess_eval_program *_Current; + struct gl_program *_Current; }; /** @@ -2138,7 +2142,7 @@ /** Currently enabled and valid program (including internal programs * and compiled shader programs). */ - struct gl_geometry_program *_Current; + struct gl_program *_Current; }; /** @@ -2148,13 +2152,13 @@ { GLboolean Enabled; /**< User-set fragment program enable flag */ GLboolean _Enabled; /**< Enabled and _valid_ user program? */ - struct gl_fragment_program *Current; /**< User-bound fragment program */ + struct gl_program *Current; /**< User-bound fragment program */ /** Currently enabled and valid fragment program (including internal * programs, user-defined fragment programs and GLSL fragment shaders). * This is the program we must use when rendering. */ - struct gl_fragment_program *_Current; + struct gl_program *_Current; GLfloat Parameters[MAX_PROGRAM_ENV_PARAMS][4]; /**< Env params */ @@ -2162,7 +2166,7 @@ GLboolean _MaintainTexEnvProgram; /** Program to emulate fixed-function texture env/combine (see above) */ - struct gl_fragment_program *_TexEnvProgram; + struct gl_program *_TexEnvProgram; /** Cache of fixed-function programs */ struct gl_program_cache *Cache; @@ -2177,7 +2181,7 @@ /** Currently enabled and valid program (including internal programs * and compiled shader programs). */ - struct gl_compute_program *_Current; + struct gl_program *_Current; }; @@ -2234,82 +2238,14 @@ }; /** - * A GLSL vertex or fragment shader object. + * Shader information needed by both gl_shader and gl_linked shader. */ -struct gl_shader +struct gl_shader_info { - /** GL_FRAGMENT_SHADER || GL_VERTEX_SHADER || GL_GEOMETRY_SHADER_ARB || - * GL_TESS_CONTROL_SHADER || GL_TESS_EVALUATION_SHADER. - * Must be the first field. - */ - GLenum Type; - gl_shader_stage Stage; - GLuint Name; /**< AKA the handle */ - GLint RefCount; /**< Reference count */ - GLchar *Label; /**< GL_KHR_debug */ - GLboolean DeletePending; - GLboolean CompileStatus; - bool IsES; /**< True if this shader uses GLSL ES */ - - GLuint SourceChecksum; /**< for debug/logging purposes */ - const GLchar *Source; /**< Source code string */ - - struct gl_program *Program; /**< Post-compile assembly code */ - GLchar *InfoLog; - - unsigned Version; /**< GLSL version used for linking */ - - /** - * \name Sampler tracking - * - * \note Each of these fields is only set post-linking. - */ - /*@{*/ - unsigned num_samplers; /**< Number of samplers used by this shader. */ - GLbitfield active_samplers; /**< Bitfield of which samplers are used */ - GLbitfield shadow_samplers; /**< Samplers used for shadow sampling. */ - /*@}*/ - - /** - * Map from sampler unit to texture unit (set by glUniform1i()) - * - * A sampler unit is associated with each sampler uniform by the linker. - * The sampler unit associated with each uniform is stored in the - * \c gl_uniform_storage::sampler field. - */ - GLubyte SamplerUnits[MAX_SAMPLERS]; - /** Which texture target is being sampled (TEXTURE_1D/2D/3D/etc_INDEX) */ - gl_texture_index SamplerTargets[MAX_SAMPLERS]; - - /** - * Number of default uniform block components used by this shader. - * - * This field is only set post-linking. - */ - unsigned num_uniform_components; - - /** - * Number of combined uniform components used by this shader. - * - * This field is only set post-linking. It is the sum of the uniform block - * sizes divided by sizeof(float), and num_uniform_compoennts. - */ - unsigned num_combined_uniform_components; - - unsigned NumUniformBlocks; - struct gl_uniform_block **UniformBlocks; - - unsigned NumShaderStorageBlocks; - struct gl_uniform_block **ShaderStorageBlocks; - - struct exec_list *ir; - struct exec_list *packed_varyings; - struct exec_list *fragdata_arrays; - struct glsl_symbol_table *symbols; - - bool uses_builtin_functions; bool uses_gl_fragcoord; bool redeclares_gl_fragcoord; + bool PostDepthCoverage; + bool InnerCoverage; bool ARB_fragment_coord_conventions_enable; /** @@ -2343,11 +2279,9 @@ * in this shader. */ GLenum PrimitiveMode; - /** - * GL_EQUAL, GL_FRACTIONAL_ODD, GL_FRACTIONAL_EVEN, or 0 if it's not set - * in this shader. - */ - GLenum Spacing; + + enum gl_tess_spacing Spacing; + /** * GL_CW, GL_CCW, or 0 if it's not set in this shader. */ @@ -2382,42 +2316,14 @@ } Geom; /** - * Map from image uniform index to image unit (set by glUniform1i()) - * - * An image uniform index is associated with each image uniform by - * the linker. The image index associated with each uniform is - * stored in the \c gl_uniform_storage::image field. - */ - GLubyte ImageUnits[MAX_IMAGE_UNIFORMS]; - - /** - * Access qualifier specified in the shader for each image uniform - * index. Either \c GL_READ_ONLY, \c GL_WRITE_ONLY or \c - * GL_READ_WRITE. - * - * It may be different, though only more strict than the value of - * \c gl_image_unit::Access for the corresponding image unit. - */ - GLenum ImageAccess[MAX_IMAGE_UNIFORMS]; - - /** - * Number of image uniforms defined in the shader. It specifies - * the number of valid elements in the \c ImageUnits and \c - * ImageAccess arrays above. - */ - GLuint NumImages; - - struct gl_active_atomic_buffer **AtomicBuffers; - unsigned NumAtomicBuffers; - - /** * Whether early fragment tests are enabled as defined by * ARB_shader_image_load_store. */ bool EarlyFragmentTests; /** - * Compute shader state from ARB_compute_shader layout qualifiers. + * Compute shader state from ARB_compute_shader and + * ARB_compute_variable_group_size layout qualifiers. */ struct { /** @@ -2425,28 +2331,110 @@ * it's not set in this shader. */ unsigned LocalSize[3]; + + /** + * Whether a variable work group size has been specified as defined by + * ARB_compute_variable_group_size. + */ + bool LocalSizeVariable; } Comp; +}; + +/** + * A linked GLSL shader object. + */ +struct gl_linked_shader +{ + gl_shader_stage Stage; + +#ifdef DEBUG + unsigned SourceChecksum; +#endif + + struct gl_program *Program; /**< Post-compile assembly code */ /** - * Number of types for subroutine uniforms. - */ - GLuint NumSubroutineUniformTypes; + * \name Sampler tracking + * + * \note Each of these fields is only set post-linking. + */ + /*@{*/ + GLbitfield shadow_samplers; /**< Samplers used for shadow sampling. */ + /*@}*/ + + /** + * Number of default uniform block components used by this shader. + * + * This field is only set post-linking. + */ + unsigned num_uniform_components; /** - * Subroutine uniform remap table - * based on the program level uniform remap table. - */ - GLuint NumSubroutineUniforms; /* non-sparse total */ - GLuint NumSubroutineUniformRemapTable; - struct gl_uniform_storage **SubroutineUniformRemapTable; + * Number of combined uniform components used by this shader. + * + * This field is only set post-linking. It is the sum of the uniform block + * sizes divided by sizeof(float), and num_uniform_compoennts. + */ + unsigned num_combined_uniform_components; + + struct exec_list *ir; + struct exec_list *packed_varyings; + struct exec_list *fragdata_arrays; + struct glsl_symbol_table *symbols; + + struct gl_shader_info info; +}; + +static inline GLbitfield gl_external_samplers(struct gl_program *prog) +{ + GLbitfield external_samplers = 0; + GLbitfield mask = prog->SamplersUsed; + + while (mask) { + int idx = u_bit_scan(&mask); + if (prog->sh.SamplerTargets[idx] == TEXTURE_EXTERNAL_INDEX) + external_samplers |= (1 << idx); + } + + return external_samplers; +} + +/** + * A GLSL shader object. + */ +struct gl_shader +{ + /** GL_FRAGMENT_SHADER || GL_VERTEX_SHADER || GL_GEOMETRY_SHADER_ARB || + * GL_TESS_CONTROL_SHADER || GL_TESS_EVALUATION_SHADER. + * Must be the first field. + */ + GLenum Type; + gl_shader_stage Stage; + GLuint Name; /**< AKA the handle */ + GLint RefCount; /**< Reference count */ + GLchar *Label; /**< GL_KHR_debug */ + GLboolean DeletePending; + GLboolean CompileStatus; + bool IsES; /**< True if this shader uses GLSL ES */ + +#ifdef DEBUG + unsigned SourceChecksum; /**< for debug/logging purposes */ +#endif + const GLchar *Source; /**< Source code string */ + + GLchar *InfoLog; + + unsigned Version; /**< GLSL version used for linking */ + + struct exec_list *ir; + struct glsl_symbol_table *symbols; /** - * Num of subroutine functions for this stage - * and storage for them. + * A bitmask of gl_advanced_blend_mode values */ - GLuint NumSubroutineFunctions; - GLuint MaxSubroutineFunctionIndex; - struct gl_subroutine_function *SubroutineFunctions; + GLbitfield BlendSupport; + + struct gl_shader_info info; }; @@ -2507,12 +2495,28 @@ uint8_t stageref; /** + * Linearized array index for uniform block instance arrays + * + * Given a uniform block instance array declared with size + * blk[s_0][s_1]..[s_m], the block referenced by blk[i_0][i_1]..[i_m] will + * have the linearized array index + * + * m-1 m + * i_m + ∑ i_j * ∏ s_k + * j=0 k=j+1 + * + * For a uniform block instance that is not an array, this is always 0. + */ + uint8_t linearized_array_index; + + /** * Layout specified in the shader * * This isn't accessible through the API, but it is used while * cross-validating uniform blocks. */ enum gl_uniform_block_packing _Packing; + GLboolean _RowMajor; }; /** @@ -2615,7 +2619,7 @@ /** * Interpolation mode for shader inputs / outputs * - * \sa ir_variable_interpolation + * \sa glsl_interp_mode */ unsigned interpolation:2; @@ -2645,6 +2649,36 @@ }; /** + * A data structure to be shared by gl_shader_program and gl_program. + */ +struct gl_shader_program_data +{ + GLint RefCount; /**< Reference count */ + + unsigned NumUniformStorage; + unsigned NumHiddenUniforms; + struct gl_uniform_storage *UniformStorage; + + unsigned NumUniformBlocks; + struct gl_uniform_block *UniformBlocks; + + unsigned NumShaderStorageBlocks; + struct gl_uniform_block *ShaderStorageBlocks; + + struct gl_active_atomic_buffer *AtomicBuffers; + unsigned NumAtomicBuffers; + + GLboolean LinkStatus; /**< GL_LINK_STATUS */ + GLboolean Validated; + GLchar *InfoLog; + + unsigned Version; /**< GLSL version used for linking */ + + /* Mask of stages this program was linked against */ + unsigned linked_stages; +}; + +/** * A GLSL program object. * Basically a linked collection of vertex and fragment shaders. */ @@ -2704,37 +2738,18 @@ GLchar **VaryingNames; /**< Array [NumVarying] of char * */ } TransformFeedback; - /** Post-link transform feedback info. */ - struct gl_transform_feedback_info LinkedTransformFeedback; + struct gl_program *xfb_program; /** Post-link gl_FragDepth layout for ARB_conservative_depth. */ enum gl_frag_depth_layout FragDepthLayout; /** - * Tessellation Control shader state from layout qualifiers. - */ - struct { - /** - * 0 - vertices not declared in shader, or - * 1 .. GL_MAX_PATCH_VERTICES - */ - GLint VerticesOut; - } TessCtrl; - - /** * Tessellation Evaluation shader state from layout qualifiers. */ struct { - /** GL_TRIANGLES, GL_QUADS or GL_ISOLINES */ - GLenum PrimitiveMode; - /** GL_EQUAL, GL_FRACTIONAL_ODD or GL_FRACTIONAL_EVEN */ - GLenum Spacing; - /** GL_CW or GL_CCW */ - GLenum VertexOrder; - bool PointMode; /** * True if gl_ClipDistance is written to. Copied into - * gl_tess_eval_program by _mesa_copy_linked_program_data(). + * gl_program by _mesa_copy_linked_program_data(). */ GLuint ClipDistanceArraySize; /**< Size of the gl_ClipDistance array, or 0 if not present. */ @@ -2743,22 +2758,15 @@ } TessEval; /** - * Geometry shader state - copied into gl_geometry_program by + * Geometry shader state - copied into gl_program by * _mesa_copy_linked_program_data(). */ struct { GLint VerticesIn; - GLint VerticesOut; - /** - * 1 .. MAX_GEOMETRY_SHADER_INVOCATIONS - */ - GLint Invocations; - GLenum InputType; /**< GL_POINTS, GL_LINES, GL_LINES_ADJACENCY_ARB, - GL_TRIANGLES, or GL_TRIANGLES_ADJACENCY_ARB */ - GLenum OutputType; /**< GL_POINTS, GL_LINE_STRIP or GL_TRIANGLE_STRIP */ + /** * True if gl_ClipDistance is written to. Copied into - * gl_geometry_program by _mesa_copy_linked_program_data(). + * gl_program by _mesa_copy_linked_program_data(). */ GLuint ClipDistanceArraySize; /**< Size of the gl_ClipDistance array, or 0 if not present. */ @@ -2771,7 +2779,7 @@ /** Vertex shader state */ struct { /** - * True if gl_ClipDistance is written to. Copied into gl_vertex_program + * True if gl_ClipDistance is written to. Copied into gl_program * by _mesa_copy_linked_program_data(). */ GLuint ClipDistanceArraySize; /**< Size of the gl_ClipDistance array, or @@ -2781,7 +2789,7 @@ } Vert; /** - * Compute shader state - copied into gl_compute_program by + * Compute shader state - copied into gl_program by * _mesa_copy_linked_program_data(). */ struct { @@ -2794,12 +2802,15 @@ * Size of shared variables accessed by the compute shader. */ unsigned SharedSize; + + /** + * Whether a variable work group size has been specified. + */ + bool LocalSizeVariable; } Comp; - /* post-link info: */ - unsigned NumUniformStorage; - unsigned NumHiddenUniforms; - struct gl_uniform_storage *UniformStorage; + /** Data shared by gl_program and gl_shader_program */ + struct gl_shader_program_data *data; /** * Mapping from GL uniform locations returned by \c glUniformLocation to @@ -2823,12 +2834,6 @@ unsigned LastClipDistanceArraySize; unsigned LastCullDistanceArraySize; - unsigned NumUniformBlocks; - struct gl_uniform_block *UniformBlocks; - - unsigned NumShaderStorageBlocks; - struct gl_uniform_block *ShaderStorageBlocks; - /** * Map of active uniform names to locations * @@ -2839,16 +2844,8 @@ */ struct string_to_uint_map *UniformHash; - struct gl_active_atomic_buffer *AtomicBuffers; - unsigned NumAtomicBuffers; - - GLboolean LinkStatus; /**< GL_LINK_STATUS */ - GLboolean Validated; - GLboolean _Used; /**< Ever used for drawing? */ GLboolean SamplersValidated; /**< Samplers validated against texture units? */ - GLchar *InfoLog; - unsigned Version; /**< GLSL version used for linking */ bool IsES; /**< True if this program uses GLSL ES */ /** @@ -2858,7 +2855,7 @@ * \c MESA_SHADER_* defines. Entries for non-existent stages will be * \c NULL. */ - struct gl_shader *_LinkedShaders[MESA_SHADER_STAGES]; + struct gl_linked_shader *_LinkedShaders[MESA_SHADER_STAGES]; /** List of all active resources after linking. */ struct gl_program_resource *ProgramResourceList; @@ -2907,7 +2904,7 @@ */ struct gl_shader_program *CurrentProgram[MESA_SHADER_STAGES]; - struct gl_shader_program *_CurrentFragmentProgram; + struct gl_program *_CurrentFragmentProgram; /** * Program used by glUniform calls. @@ -2950,7 +2947,6 @@ GLboolean EmitNoFunctions; GLboolean EmitNoCont; /**< Emit CONT opcode? */ GLboolean EmitNoMainReturn; /**< Emit CONT/RET opcodes? */ - GLboolean EmitNoNoise; /**< Emit NOISE opcodes? */ GLboolean EmitNoPow; /**< Emit POW opcodes? */ GLboolean EmitNoSat; /**< Emit SAT opcodes? */ GLboolean LowerCombinedClipCullDistance; /** Lower gl_ClipDistance and @@ -2986,9 +2982,6 @@ /** Clamp UBO and SSBO block indices so they don't go out-of-bounds. */ GLboolean ClampBlockIndicesToArrayBounds; - GLboolean LowerShaderSharedVariables; /**< Lower compute shader shared - * variable access to intrinsics. */ - const struct nir_shader_compiler_options *NirOptions; }; @@ -3087,8 +3080,8 @@ */ /*@{*/ struct _mesa_HashTable *Programs; /**< All vertex/fragment programs */ - struct gl_vertex_program *DefaultVertexProgram; - struct gl_fragment_program *DefaultFragmentProgram; + struct gl_program *DefaultVertexProgram; + struct gl_program *DefaultFragmentProgram; /*@}*/ /* GL_ATI_fragment_shader */ @@ -3285,8 +3278,7 @@ */ bool _HasAttachments; - /** Integer color values */ - GLboolean _IntegerColor; + GLbitfield _IntegerBuffers; /**< Which color buffers are integer valued */ /* ARB_color_buffer_float */ GLboolean _AllColorBuffersFixedPoint; /* no integer, no float */ @@ -3449,6 +3441,7 @@ GLfloat Min; GLfloat Max; } ViewportBounds; /**< GL_ARB_viewport_array */ + GLuint MaxWindowRectangles; /**< GL_EXT_window_rectangles */ struct gl_program_constants Program[MESA_SHADER_STAGES]; GLuint MaxProgramMatrices; @@ -3599,6 +3592,9 @@ /* GL_ARB_robustness */ GLenum ResetStrategy; + /* GL_KHR_robustness */ + GLboolean RobustAccess; + /* GL_ARB_blend_func_extended */ GLuint MaxDualSourceDrawBuffers; @@ -3629,6 +3625,19 @@ bool GLSLFrontFacingIsSysVal; /** + * Run the minimum amount of GLSL optimizations to be able to link + * shaders optimally (eliminate dead varyings and uniforms) and just do + * all the necessary lowering. + */ + bool GLSLOptimizeConservatively; + + /** + * True if gl_TessLevelInner/Outer[] in the TES should be inputs + * (otherwise, they're system values). + */ + bool GLSLTessLevelsAsInputs; + + /** * Always use the GetTransformFeedbackVertexCount() driver hook, rather * than passing the transform feedback object to the drawing function. */ @@ -3750,6 +3759,10 @@ GLuint MaxComputeWorkGroupInvocations; GLuint MaxComputeSharedMemorySize; + /** GL_ARB_compute_variable_group_size */ + GLuint MaxComputeVariableGroupSize[3]; /* Array of x, y, z dimensions */ + GLuint MaxComputeVariableGroupInvocations; + /** GL_ARB_gpu_shader5 */ GLfloat MinFragmentInterpolationOffset; GLfloat MaxFragmentInterpolationOffset; @@ -3773,6 +3786,9 @@ bool LowerCsDerivedVariables; /**< Lower gl_GlobalInvocationID and * gl_LocalInvocationIndex based on * other builtin variables. */ + + /** GL_OES_primitive_bounding_box */ + bool NoPrimitiveBoundingBoxOutput; }; @@ -3798,6 +3814,7 @@ GLboolean ARB_clip_control; GLboolean ARB_color_buffer_float; GLboolean ARB_compute_shader; + GLboolean ARB_compute_variable_group_size; GLboolean ARB_conditional_render_inverted; GLboolean ARB_conservative_depth; GLboolean ARB_copy_image; @@ -3832,6 +3849,7 @@ GLboolean ARB_occlusion_query2; GLboolean ARB_pipeline_statistics_query; GLboolean ARB_point_sprite; + GLboolean ARB_post_depth_coverage; GLboolean ARB_query_buffer_object; GLboolean ARB_robust_buffer_access_behavior; GLboolean ARB_sample_shading; @@ -3841,6 +3859,7 @@ GLboolean ARB_shader_bit_encoding; GLboolean ARB_shader_clock; GLboolean ARB_shader_draw_parameters; + GLboolean ARB_shader_group_vote; GLboolean ARB_shader_image_load_store; GLboolean ARB_shader_image_size; GLboolean ARB_shader_precision; @@ -3849,6 +3868,7 @@ GLboolean ARB_shader_subroutine; GLboolean ARB_shader_texture_image_samples; GLboolean ARB_shader_texture_lod; + GLboolean ARB_shader_viewport_layer_array; GLboolean ARB_shading_language_packing; GLboolean ARB_shading_language_420pack; GLboolean ARB_shadow; @@ -3922,17 +3942,21 @@ GLboolean EXT_transform_feedback; GLboolean EXT_timer_query; GLboolean EXT_vertex_array_bgra; + GLboolean EXT_window_rectangles; GLboolean OES_copy_image; + GLboolean OES_primitive_bounding_box; GLboolean OES_sample_variables; - GLboolean OES_shader_io_blocks; GLboolean OES_standard_derivatives; GLboolean OES_texture_buffer; + GLboolean OES_texture_cube_map_array; + GLboolean OES_viewport_array; /* vendor extensions */ GLboolean AMD_performance_monitor; GLboolean AMD_pinned_memory; GLboolean AMD_seamless_cubemap_per_texture; GLboolean AMD_vertex_shader_layer; GLboolean AMD_vertex_shader_viewport_index; + GLboolean ANDROID_extension_pack_es31a; GLboolean APPLE_object_purgeable; GLboolean ATI_meminfo; GLboolean ATI_texture_compression_3dc; @@ -3941,11 +3965,18 @@ GLboolean ATI_fragment_shader; GLboolean ATI_separate_stencil; GLboolean GREMEDY_string_marker; + GLboolean INTEL_conservative_rasterization; GLboolean INTEL_performance_query; + GLboolean KHR_blend_equation_advanced; + GLboolean KHR_blend_equation_advanced_coherent; GLboolean KHR_robustness; GLboolean KHR_texture_compression_astc_hdr; GLboolean KHR_texture_compression_astc_ldr; + GLboolean KHR_texture_compression_astc_sliced_3d; GLboolean MESA_pack_invert; + GLboolean MESA_shader_framebuffer_fetch; + GLboolean MESA_shader_framebuffer_fetch_non_coherent; + GLboolean MESA_shader_integer_functions; GLboolean MESA_ycbcr_texture; GLboolean NV_conditional_render; GLboolean NV_fog_distance; @@ -3989,6 +4020,7 @@ { GLmatrix *Top; /**< points into Stack */ GLmatrix *Stack; /**< array [MaxDepth] of GLmatrix */ + unsigned StackSize; /**< Number of elements in Stack */ GLuint Depth; /**< 0 <= Depth < MaxDepth */ GLuint MaxDepth; /**< size of Stack[] array */ GLuint DirtyFlag; /**< _NEW_MODELVIEW or _NEW_PROJECTION, for example */ @@ -4218,6 +4250,11 @@ * gl_context::TessCtrlProgram::patch_default_* */ uint64_t NewDefaultTessLevels; + + /** + * gl_context::IntelConservativeRasterization + */ + uint64_t NewIntelConservativeRasterization; }; struct gl_uniform_buffer_binding @@ -4313,6 +4350,15 @@ }; /** + * Shader subroutines storage + */ +struct gl_subroutine_index_binding +{ + GLuint NumIndex; + GLuint *IndexPtr; +}; + +/** * Mesa rendering context. * * This is the central context data structure for Mesa. Almost all @@ -4550,6 +4596,7 @@ */ struct gl_image_unit ImageUnits[MAX_IMAGE_UNITS]; + struct gl_subroutine_index_binding SubroutineIndex[MESA_SHADER_STAGES]; /*@}*/ struct gl_meta_state *Meta; /**< for "meta" operations */ @@ -4607,6 +4654,7 @@ GLboolean TextureFormatSupported[MESA_FORMAT_COUNT]; GLboolean RasterDiscard; /**< GL_RASTERIZER_DISCARD */ + GLboolean IntelConservativeRasterization; /**< GL_INTEL_CONSERVATIVE_RASTERIZATION */ /** * \name Hooks for module contexts. @@ -4637,6 +4685,13 @@ * Once this field becomes true, it is never reset to false. */ GLboolean ShareGroupReset; + + /** + * \name OES_primitive_bounding_box + * + * Stores the arguments to glPrimitiveBoundingBox + */ + GLfloat PrimitiveBoundingBox[8]; }; /** @@ -4689,27 +4744,10 @@ DEBUG_SILENT = (1 << 0), DEBUG_ALWAYS_FLUSH = (1 << 1), DEBUG_INCOMPLETE_TEXTURE = (1 << 2), - DEBUG_INCOMPLETE_FBO = (1 << 3) + DEBUG_INCOMPLETE_FBO = (1 << 3), + DEBUG_CONTEXT = (1 << 4) }; -/** - * Checks if the active fragment shader program can have side effects due - * to use of things like atomic buffers or images - */ -static inline bool -_mesa_active_fragment_shader_has_side_effects(const struct gl_context *ctx) -{ - const struct gl_shader *sh; - - if (!ctx->_Shader->_CurrentFragmentProgram) - return false; - - sh = ctx->_Shader->_CurrentFragmentProgram->_LinkedShaders[MESA_SHADER_FRAGMENT]; - return sh->NumAtomicBuffers > 0 || - sh->NumImages > 0 || - sh->NumShaderStorageBlocks > 0; -} - #ifdef __cplusplus } #endif diff -Nru mesa-12.0.6/src/mesa/main/pipelineobj.c mesa-17.0.7/src/mesa/main/pipelineobj.c --- mesa-12.0.6/src/mesa/main/pipelineobj.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/pipelineobj.c 2017-06-01 10:37:10.000000000 +0000 @@ -58,7 +58,7 @@ { unsigned i; - _mesa_reference_shader_program(ctx, &obj->_CurrentFragmentProgram, NULL); + _mesa_reference_program(ctx, &obj->_CurrentFragmentProgram, NULL); for (i = 0; i < MESA_SHADER_STAGES; i++) _mesa_reference_shader_program(ctx, &obj->CurrentProgram[i], NULL); @@ -107,7 +107,7 @@ * Callback for deleting a pipeline object. Called by _mesa_HashDeleteAll(). */ static void -delete_pipelineobj_cb(GLuint id, void *data, void *userData) +delete_pipelineobj_cb(UNUSED GLuint id, void *data, void *userData) { struct gl_pipeline_object *obj = (struct gl_pipeline_object *) data; struct gl_context *ctx = (struct gl_context *) userData; @@ -297,7 +297,7 @@ * shader stages in the pipeline program pipeline object are not * modified." */ - if (!shProg->LinkStatus) { + if (!shProg->data->LinkStatus) { _mesa_error(ctx, GL_INVALID_OPERATION, "glUseProgramStages(program not linked)"); return; @@ -376,7 +376,7 @@ */ pipe->EverBound = GL_TRUE; - if ((shProg != NULL) && !shProg->LinkStatus) { + if ((shProg != NULL) && !shProg->data->LinkStatus) { _mesa_error(ctx, GL_INVALID_OPERATION, "glActiveShaderProgram(program %u not linked)", shProg->Name); return; @@ -469,10 +469,7 @@ FLUSH_VERTICES(ctx, _NEW_PROGRAM | _NEW_PROGRAM_CONSTANTS); for (i = 0; i < MESA_SHADER_STAGES; i++) - _mesa_shader_program_init_subroutine_defaults(ctx->_Shader->CurrentProgram[i]); - - if (ctx->Driver.UseProgram) - ctx->Driver.UseProgram(ctx, NULL); + _mesa_shader_program_init_subroutine_defaults(ctx, ctx->_Shader->CurrentProgram[i]); } } @@ -648,7 +645,8 @@ *params = pipe->ActiveProgram ? pipe->ActiveProgram->Name : 0; return; case GL_INFO_LOG_LENGTH: - *params = pipe->InfoLog ? strlen(pipe->InfoLog) + 1 : 0; + *params = (pipe->InfoLog && pipe->InfoLog[0] != '\0') ? + strlen(pipe->InfoLog) + 1 : 0; return; case GL_VALIDATE_STATUS: *params = pipe->Validated; @@ -732,30 +730,33 @@ static bool program_stages_interleaved_illegally(const struct gl_pipeline_object *pipe) { - struct gl_shader_program *prev = NULL; - unsigned i, j; + unsigned prev_linked_stages = 0; /* Look for programs bound to stages: A -> B -> A, with any intervening * sequence of unrelated programs or empty stages. */ - for (i = 0; i < MESA_SHADER_STAGES; i++) { + for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { struct gl_shader_program *cur = pipe->CurrentProgram[i]; - /* Empty stages anywhere in the pipe are OK */ - if (!cur || cur == prev) + /* Empty stages anywhere in the pipe are OK. Also we can be confident + * that if the linked_stages mask matches we are looking at the same + * linked program because a previous validation call to + * program_stages_all_active() will have already failed if two different + * programs with the sames stages linked are not active for all linked + * stages. + */ + if (!cur || cur->data->linked_stages == prev_linked_stages) continue; - if (prev) { + if (prev_linked_stages) { /* We've seen an A -> B transition; look at the rest of the pipe * to see if we ever see A again. */ - for (j = i + 1; j < MESA_SHADER_STAGES; j++) { - if (pipe->CurrentProgram[j] == prev) - return true; - } + if (prev_linked_stages >> (i + 1)) + return true; } - prev = cur; + prev_linked_stages = cur->data->linked_stages; } return false; diff -Nru mesa-12.0.6/src/mesa/main/points.c mesa-17.0.7/src/mesa/main/points.c --- mesa-12.0.6/src/mesa/main/points.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/points.c 2017-06-01 10:37:10.000000000 +0000 @@ -225,8 +225,6 @@ void _mesa_init_point(struct gl_context *ctx) { - GLuint i; - ctx->Point.SmoothFlag = GL_FALSE; ctx->Point.Size = 1.0; ctx->Point.Params[0] = 1.0; @@ -253,7 +251,5 @@ ctx->Point.SpriteRMode = GL_ZERO; /* GL_NV_point_sprite (only!) */ ctx->Point.SpriteOrigin = GL_UPPER_LEFT; /* GL_ARB_point_sprite */ - for (i = 0; i < ARRAY_SIZE(ctx->Point.CoordReplace); i++) { - ctx->Point.CoordReplace[i] = GL_FALSE; /* GL_ARB/NV_point_sprite */ - } + ctx->Point.CoordReplace = 0; /* GL_ARB/NV_point_sprite */ } diff -Nru mesa-12.0.6/src/mesa/main/program_resource.c mesa-17.0.7/src/mesa/main/program_resource.c --- mesa-12.0.6/src/mesa/main/program_resource.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/program_resource.c 2017-06-01 10:37:10.000000000 +0000 @@ -49,23 +49,41 @@ case GL_FRAGMENT_SUBROUTINE: case GL_VERTEX_SUBROUTINE_UNIFORM: case GL_FRAGMENT_SUBROUTINE_UNIFORM: - return _mesa_has_shader_subroutine(ctx); + return _mesa_has_ARB_shader_subroutine(ctx); case GL_GEOMETRY_SUBROUTINE: case GL_GEOMETRY_SUBROUTINE_UNIFORM: - return _mesa_has_geometry_shaders(ctx) && _mesa_has_shader_subroutine(ctx); + return _mesa_has_geometry_shaders(ctx) && _mesa_has_ARB_shader_subroutine(ctx); case GL_COMPUTE_SUBROUTINE: case GL_COMPUTE_SUBROUTINE_UNIFORM: - return _mesa_has_compute_shaders(ctx) && _mesa_has_shader_subroutine(ctx); + return _mesa_has_compute_shaders(ctx) && _mesa_has_ARB_shader_subroutine(ctx); case GL_TESS_CONTROL_SUBROUTINE: case GL_TESS_EVALUATION_SUBROUTINE: case GL_TESS_CONTROL_SUBROUTINE_UNIFORM: case GL_TESS_EVALUATION_SUBROUTINE_UNIFORM: - return _mesa_has_tessellation(ctx) && _mesa_has_shader_subroutine(ctx); + return _mesa_has_tessellation(ctx) && _mesa_has_ARB_shader_subroutine(ctx); default: return false; } } +static struct gl_shader_program * +lookup_linked_program(GLuint program, const char *caller) +{ + GET_CURRENT_CONTEXT(ctx); + struct gl_shader_program *prog = + _mesa_lookup_shader_program_err(ctx, program, caller); + + if (!prog) + return NULL; + + if (prog->data->LinkStatus == GL_FALSE) { + _mesa_error(ctx, GL_INVALID_OPERATION, "%s(program not linked)", + caller); + return NULL; + } + return prog; +} + void GLAPIENTRY _mesa_GetProgramInterfaceiv(GLuint program, GLenum programInterface, GLenum pname, GLint *params) @@ -375,24 +393,6 @@ propCount, props, bufSize, length, params); } -static struct gl_shader_program * -lookup_linked_program(GLuint program, const char *caller) -{ - GET_CURRENT_CONTEXT(ctx); - struct gl_shader_program *prog = - _mesa_lookup_shader_program_err(ctx, program, caller); - - if (!prog) - return NULL; - - if (prog->LinkStatus == GL_FALSE) { - _mesa_error(ctx, GL_INVALID_OPERATION, "%s(program not linked)", - caller); - return NULL; - } - return prog; -} - GLint GLAPIENTRY _mesa_GetProgramResourceLocation(GLuint program, GLenum programInterface, const GLchar *name) @@ -419,20 +419,20 @@ case GL_VERTEX_SUBROUTINE_UNIFORM: case GL_FRAGMENT_SUBROUTINE_UNIFORM: - if (!_mesa_has_shader_subroutine(ctx)) + if (!_mesa_has_ARB_shader_subroutine(ctx)) goto fail; break; case GL_GEOMETRY_SUBROUTINE_UNIFORM: - if (!_mesa_has_geometry_shaders(ctx) || !_mesa_has_shader_subroutine(ctx)) + if (!_mesa_has_geometry_shaders(ctx) || !_mesa_has_ARB_shader_subroutine(ctx)) goto fail; break; case GL_COMPUTE_SUBROUTINE_UNIFORM: - if (!_mesa_has_compute_shaders(ctx) || !_mesa_has_shader_subroutine(ctx)) + if (!_mesa_has_compute_shaders(ctx) || !_mesa_has_ARB_shader_subroutine(ctx)) goto fail; break; case GL_TESS_CONTROL_SUBROUTINE_UNIFORM: case GL_TESS_EVALUATION_SUBROUTINE_UNIFORM: - if (!_mesa_has_tessellation(ctx) || !_mesa_has_shader_subroutine(ctx)) + if (!_mesa_has_tessellation(ctx) || !_mesa_has_ARB_shader_subroutine(ctx)) goto fail; break; default: diff -Nru mesa-12.0.6/src/mesa/main/rastpos.c mesa-17.0.7/src/mesa/main/rastpos.c --- mesa-12.0.6/src/mesa/main/rastpos.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/rastpos.c 2017-06-01 10:37:10.000000000 +0000 @@ -37,7 +37,7 @@ #include "state.h" #include "main/dispatch.h" #include "main/viewport.h" -#include "util/simple_list.h" +#include "util/bitscan.h" @@ -91,17 +91,16 @@ static GLuint userclip_point( struct gl_context *ctx, const GLfloat v[] ) { - GLuint p; + GLbitfield mask = ctx->Transform.ClipPlanesEnabled; + while (mask) { + const int p = u_bit_scan(&mask); + GLfloat dot = v[0] * ctx->Transform._ClipUserPlane[p][0] + + v[1] * ctx->Transform._ClipUserPlane[p][1] + + v[2] * ctx->Transform._ClipUserPlane[p][2] + + v[3] * ctx->Transform._ClipUserPlane[p][3]; - for (p = 0; p < ctx->Const.MaxClipPlanes; p++) { - if (ctx->Transform.ClipPlanesEnabled & (1 << p)) { - GLfloat dot = v[0] * ctx->Transform._ClipUserPlane[p][0] - + v[1] * ctx->Transform._ClipUserPlane[p][1] - + v[2] * ctx->Transform._ClipUserPlane[p][2] - + v[3] * ctx->Transform._ClipUserPlane[p][3]; - if (dot < 0.0F) { - return 0; - } + if (dot < 0.0F) { + return 0; } } @@ -125,7 +124,7 @@ GLfloat Rspec[4]) { /*const*/ GLfloat (*base)[3] = ctx->Light._BaseColor; - const struct gl_light *light; + GLbitfield mask; GLfloat diffuseColor[4], specularColor[4]; /* for RGB mode only */ COPY_3V(diffuseColor, base[0]); @@ -133,7 +132,10 @@ ctx->Light.Material.Attrib[MAT_ATTRIB_FRONT_DIFFUSE][3], 0.0F, 1.0F ); ASSIGN_4V(specularColor, 0.0, 0.0, 0.0, 1.0); - foreach (light, &ctx->Light.EnabledList) { + mask = ctx->Light._EnabledLights; + while (mask) { + const int i = u_bit_scan(&mask); + struct gl_light *light = &ctx->Light.Light[i]; GLfloat attenuation = 1.0; GLfloat VP[3]; /* vector from vertex to light pos */ GLfloat n_dot_VP; diff -Nru mesa-12.0.6/src/mesa/main/remap.c mesa-17.0.7/src/mesa/main/remap.c --- mesa-12.0.6/src/mesa/main/remap.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/remap.c 2017-06-01 10:37:10.000000000 +0000 @@ -35,6 +35,7 @@ * a dynamic entry, or the corresponding static entry, in glapi. */ +#include #include "remap.h" #include "imports.h" #include "glapi/glapi.h" @@ -50,24 +51,6 @@ /** - * Return the spec string associated with the given function index. - * The index is available from including remap_helper.h. - * - * \param func_index an opaque function index. - * - * \return the spec string associated with the function index, or NULL. - */ -const char * -_mesa_get_function_spec(GLint func_index) -{ - if (func_index < ARRAY_SIZE(_mesa_function_pool)) - return _mesa_function_pool + func_index; - else - return NULL; -} - - -/** * Map a function by its spec. The function will be added to glapi, * and the dispatch offset will be returned. * @@ -79,12 +62,12 @@ * \return the offset of the (re-)mapped function in the dispatch * table, or -1. */ -GLint -_mesa_map_function_spec(const char *spec) +static int +map_function_spec(const char *spec) { const char *signature; const char *names[MAX_ENTRY_POINTS + 1]; - GLint num_names = 0; + int num_names = 0; if (!spec) return -1; @@ -111,97 +94,31 @@ /** - * Map an array of functions. This is a convenient function for - * use with arrays available from including remap_helper.h. - * - * Note that the dispatch offsets of the functions are not returned. - * If they are needed, _mesa_map_function_spec() should be used. - * - * \param func_array an array of function remaps. - */ -void -_mesa_map_function_array(const struct gl_function_remap *func_array) -{ - GLint i; - - if (!func_array) - return; - - for (i = 0; func_array[i].func_index != -1; i++) { - const char *spec; - GLint offset; - - spec = _mesa_get_function_spec(func_array[i].func_index); - if (!spec) { - _mesa_problem(NULL, "invalid function index %d", - func_array[i].func_index); - continue; - } - - offset = _mesa_map_function_spec(spec); - /* error checks */ - if (offset < 0) { - const char *name = spec + strlen(spec) + 1; - _mesa_warning(NULL, "failed to remap %s", name); - } - else if (func_array[i].dispatch_offset >= 0 && - offset != func_array[i].dispatch_offset) { - const char *name = spec + strlen(spec) + 1; - _mesa_problem(NULL, "%s should be mapped to %d, not %d", - name, func_array[i].dispatch_offset, offset); - } - } -} - - -/** - * Map the functions which are already static. - * - * When a extension function are incorporated into the ABI, the - * extension suffix is usually stripped. Mapping such functions - * makes sure the alternative names are available. - * - * Note that functions mapped by _mesa_init_remap_table() are - * excluded. - */ -void -_mesa_map_static_functions(void) -{ - /* Remap static functions which have alternative names and are in the ABI. - * This is to be on the safe side. glapi should have defined those names. - */ - _mesa_map_function_array(MESA_alt_functions); -} - - -/** * Initialize the remap table. This is called in one_time_init(). * The remap table needs to be initialized before calling the * CALL/GET/SET macros defined in main/dispatch.h. */ -static void -_mesa_do_init_remap_table(const char *pool, - int size, - const struct gl_function_pool_remap *remap) +void +_mesa_init_remap_table(void) { - static GLboolean initialized = GL_FALSE; + static bool initialized = false; GLint i; if (initialized) return; - initialized = GL_TRUE; + initialized = true; - /* initialize the remap table */ - for (i = 0; i < size; i++) { - GLint offset; + /* initialize the MESA_remap_table_functions table */ + for (i = 0; i < driDispatchRemapTable_size; i++) { + int offset; const char *spec; /* sanity check */ - assert(i == remap[i].remap_index); - spec = _mesa_function_pool + remap[i].pool_index; + assert(i == MESA_remap_table_functions[i].remap_index); + spec = _mesa_function_pool + MESA_remap_table_functions[i].pool_index; - offset = _mesa_map_function_spec(spec); - /* store the dispatch offset in the remap table */ + offset = map_function_spec(spec); + /* store the dispatch offset in the MESA_remap_table_functions table */ driDispatchRemapTable[i] = offset; if (offset < 0) { const char *name = spec + strlen(spec) + 1; @@ -209,12 +126,3 @@ } } } - - -void -_mesa_init_remap_table(void) -{ - _mesa_do_init_remap_table(_mesa_function_pool, - driDispatchRemapTable_size, - MESA_remap_table_functions); -} diff -Nru mesa-12.0.6/src/mesa/main/remap.h mesa-17.0.7/src/mesa/main/remap.h --- mesa-12.0.6/src/mesa/main/remap.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/remap.h 2017-06-01 10:37:10.000000000 +0000 @@ -32,27 +32,9 @@ int remap_index; }; -struct gl_function_remap { - int func_index; - int dispatch_offset; /* for sanity check */ -}; - - extern int driDispatchRemapTable[]; -extern const char * -_mesa_get_function_spec(int func_index); - -extern int -_mesa_map_function_spec(const char *spec); - -extern void -_mesa_map_function_array(const struct gl_function_remap *func_array); - -extern void -_mesa_map_static_functions(void); - extern void _mesa_init_remap_table(void); diff -Nru mesa-12.0.6/src/mesa/main/remap_helper.h mesa-17.0.7/src/mesa/main/remap_helper.h --- mesa-12.0.6/src/mesa/main/remap_helper.h 2017-01-24 01:42:49.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/remap_helper.h 2017-06-01 10:37:47.000000000 +0000 @@ -226,407 +226,412 @@ "glGetConvolutionParameteriv\0" "glGetConvolutionParameterivEXT\0" "\0" - /* _mesa_function_pool[1430]: GetProgramResourceLocation (will be remapped) */ + /* _mesa_function_pool[1430]: DepthRangeIndexedfOES (will be remapped) */ + "iff\0" + "glDepthRangeIndexedfOES\0" + "\0" + /* _mesa_function_pool[1459]: GetProgramResourceLocation (will be remapped) */ "iip\0" "glGetProgramResourceLocation\0" "\0" - /* _mesa_function_pool[1464]: GetSubroutineUniformLocation (will be remapped) */ + /* _mesa_function_pool[1493]: GetSubroutineUniformLocation (will be remapped) */ "iip\0" "glGetSubroutineUniformLocation\0" "\0" - /* _mesa_function_pool[1500]: VertexAttrib4usv (will be remapped) */ + /* _mesa_function_pool[1529]: VertexAttrib4usv (will be remapped) */ "ip\0" "glVertexAttrib4usv\0" "glVertexAttrib4usvARB\0" "\0" - /* _mesa_function_pool[1545]: TextureStorage1DEXT (will be remapped) */ + /* _mesa_function_pool[1574]: TextureStorage1DEXT (will be remapped) */ "iiiii\0" "glTextureStorage1DEXT\0" "\0" - /* _mesa_function_pool[1574]: VertexAttrib4Nub (will be remapped) */ + /* _mesa_function_pool[1603]: VertexAttrib4Nub (will be remapped) */ "iiiii\0" "glVertexAttrib4Nub\0" "glVertexAttrib4NubARB\0" "\0" - /* _mesa_function_pool[1622]: VertexAttribP3ui (will be remapped) */ + /* _mesa_function_pool[1651]: VertexAttribP3ui (will be remapped) */ "iiii\0" "glVertexAttribP3ui\0" "\0" - /* _mesa_function_pool[1647]: Color4ubVertex3fSUN (dynamic) */ + /* _mesa_function_pool[1676]: Color4ubVertex3fSUN (dynamic) */ "iiiifff\0" "glColor4ubVertex3fSUN\0" "\0" - /* _mesa_function_pool[1678]: PointSize (offset 173) */ + /* _mesa_function_pool[1707]: PointSize (offset 173) */ "f\0" "glPointSize\0" "\0" - /* _mesa_function_pool[1693]: TexCoord2fVertex3fSUN (dynamic) */ + /* _mesa_function_pool[1722]: TexCoord2fVertex3fSUN (dynamic) */ "fffff\0" "glTexCoord2fVertex3fSUN\0" "\0" - /* _mesa_function_pool[1724]: PopName (offset 200) */ + /* _mesa_function_pool[1753]: PopName (offset 200) */ "\0" "glPopName\0" "\0" - /* _mesa_function_pool[1736]: FramebufferTexture (will be remapped) */ + /* _mesa_function_pool[1765]: FramebufferTexture (will be remapped) */ "iiii\0" "glFramebufferTexture\0" + "glFramebufferTextureEXT\0" "glFramebufferTextureOES\0" "\0" - /* _mesa_function_pool[1787]: CreateTransformFeedbacks (will be remapped) */ + /* _mesa_function_pool[1840]: CreateTransformFeedbacks (will be remapped) */ "ip\0" "glCreateTransformFeedbacks\0" "\0" - /* _mesa_function_pool[1818]: VertexAttrib4ubNV (will be remapped) */ + /* _mesa_function_pool[1871]: VertexAttrib4ubNV (will be remapped) */ "iiiii\0" "glVertexAttrib4ubNV\0" "\0" - /* _mesa_function_pool[1845]: ValidateProgramPipeline (will be remapped) */ + /* _mesa_function_pool[1898]: ValidateProgramPipeline (will be remapped) */ "i\0" "glValidateProgramPipeline\0" "glValidateProgramPipelineEXT\0" "\0" - /* _mesa_function_pool[1903]: BindFragDataLocationIndexed (will be remapped) */ + /* _mesa_function_pool[1956]: BindFragDataLocationIndexed (will be remapped) */ "iiip\0" "glBindFragDataLocationIndexed\0" "glBindFragDataLocationIndexedEXT\0" "\0" - /* _mesa_function_pool[1972]: GetClipPlane (offset 259) */ + /* _mesa_function_pool[2025]: GetClipPlane (offset 259) */ "ip\0" "glGetClipPlane\0" "\0" - /* _mesa_function_pool[1991]: CombinerParameterfvNV (dynamic) */ + /* _mesa_function_pool[2044]: CombinerParameterfvNV (dynamic) */ "ip\0" "glCombinerParameterfvNV\0" "\0" - /* _mesa_function_pool[2019]: TexCoordP4uiv (will be remapped) */ + /* _mesa_function_pool[2072]: TexCoordP4uiv (will be remapped) */ "ip\0" "glTexCoordP4uiv\0" "\0" - /* _mesa_function_pool[2039]: VertexAttribs3dvNV (will be remapped) */ + /* _mesa_function_pool[2092]: VertexAttribs3dvNV (will be remapped) */ "iip\0" "glVertexAttribs3dvNV\0" "\0" - /* _mesa_function_pool[2065]: ProgramUniformMatrix2x4dv (will be remapped) */ + /* _mesa_function_pool[2118]: ProgramUniformMatrix2x4dv (will be remapped) */ "iiiip\0" "glProgramUniformMatrix2x4dv\0" "\0" - /* _mesa_function_pool[2100]: GenQueries (will be remapped) */ + /* _mesa_function_pool[2153]: GenQueries (will be remapped) */ "ip\0" "glGenQueries\0" "glGenQueriesARB\0" "\0" - /* _mesa_function_pool[2133]: ProgramUniform4iv (will be remapped) */ + /* _mesa_function_pool[2186]: ProgramUniform4iv (will be remapped) */ "iiip\0" "glProgramUniform4iv\0" "glProgramUniform4ivEXT\0" "\0" - /* _mesa_function_pool[2182]: ObjectUnpurgeableAPPLE (will be remapped) */ + /* _mesa_function_pool[2235]: ObjectUnpurgeableAPPLE (will be remapped) */ "iii\0" "glObjectUnpurgeableAPPLE\0" "\0" - /* _mesa_function_pool[2212]: GetCompressedTextureSubImage (will be remapped) */ + /* _mesa_function_pool[2265]: GetCompressedTextureSubImage (will be remapped) */ "iiiiiiiiip\0" "glGetCompressedTextureSubImage\0" "\0" - /* _mesa_function_pool[2255]: TexCoord2iv (offset 107) */ + /* _mesa_function_pool[2308]: TexCoord2iv (offset 107) */ "p\0" "glTexCoord2iv\0" "\0" - /* _mesa_function_pool[2272]: TexImage2DMultisample (will be remapped) */ + /* _mesa_function_pool[2325]: TexImage2DMultisample (will be remapped) */ "iiiiii\0" "glTexImage2DMultisample\0" "\0" - /* _mesa_function_pool[2304]: TexParameterx (will be remapped) */ + /* _mesa_function_pool[2357]: TexParameterx (will be remapped) */ "iii\0" "glTexParameterxOES\0" "glTexParameterx\0" "\0" - /* _mesa_function_pool[2344]: Rotatef (offset 300) */ + /* _mesa_function_pool[2397]: Rotatef (offset 300) */ "ffff\0" "glRotatef\0" "\0" - /* _mesa_function_pool[2360]: TexParameterf (offset 178) */ + /* _mesa_function_pool[2413]: TexParameterf (offset 178) */ "iif\0" "glTexParameterf\0" "\0" - /* _mesa_function_pool[2381]: TexParameteri (offset 180) */ + /* _mesa_function_pool[2434]: TexParameteri (offset 180) */ "iii\0" "glTexParameteri\0" "\0" - /* _mesa_function_pool[2402]: GetUniformiv (will be remapped) */ + /* _mesa_function_pool[2455]: GetUniformiv (will be remapped) */ "iip\0" "glGetUniformiv\0" "glGetUniformivARB\0" "\0" - /* _mesa_function_pool[2440]: ClearBufferSubData (will be remapped) */ + /* _mesa_function_pool[2493]: ClearBufferSubData (will be remapped) */ "iiiiiip\0" "glClearBufferSubData\0" "\0" - /* _mesa_function_pool[2470]: TextureParameterfv (will be remapped) */ + /* _mesa_function_pool[2523]: TextureParameterfv (will be remapped) */ "iip\0" "glTextureParameterfv\0" "\0" - /* _mesa_function_pool[2496]: VDPAUFiniNV (will be remapped) */ + /* _mesa_function_pool[2549]: VDPAUFiniNV (will be remapped) */ "\0" "glVDPAUFiniNV\0" "\0" - /* _mesa_function_pool[2512]: GlobalAlphaFactordSUN (dynamic) */ + /* _mesa_function_pool[2565]: GlobalAlphaFactordSUN (dynamic) */ "d\0" "glGlobalAlphaFactordSUN\0" "\0" - /* _mesa_function_pool[2539]: ProgramUniformMatrix4x2fv (will be remapped) */ + /* _mesa_function_pool[2592]: ProgramUniformMatrix4x2fv (will be remapped) */ "iiiip\0" "glProgramUniformMatrix4x2fv\0" "glProgramUniformMatrix4x2fvEXT\0" "\0" - /* _mesa_function_pool[2605]: ProgramUniform2f (will be remapped) */ + /* _mesa_function_pool[2658]: ProgramUniform2f (will be remapped) */ "iiff\0" "glProgramUniform2f\0" "glProgramUniform2fEXT\0" "\0" - /* _mesa_function_pool[2652]: ProgramUniform2d (will be remapped) */ + /* _mesa_function_pool[2705]: ProgramUniform2d (will be remapped) */ "iidd\0" "glProgramUniform2d\0" "\0" - /* _mesa_function_pool[2677]: ProgramUniform2i (will be remapped) */ + /* _mesa_function_pool[2730]: ProgramUniform2i (will be remapped) */ "iiii\0" "glProgramUniform2i\0" "glProgramUniform2iEXT\0" "\0" - /* _mesa_function_pool[2724]: Fogx (will be remapped) */ + /* _mesa_function_pool[2777]: Fogx (will be remapped) */ "ii\0" "glFogxOES\0" "glFogx\0" "\0" - /* _mesa_function_pool[2745]: Fogf (offset 153) */ + /* _mesa_function_pool[2798]: Fogf (offset 153) */ "if\0" "glFogf\0" "\0" - /* _mesa_function_pool[2756]: TexSubImage1D (offset 332) */ + /* _mesa_function_pool[2809]: TexSubImage1D (offset 332) */ "iiiiiip\0" "glTexSubImage1D\0" "glTexSubImage1DEXT\0" "\0" - /* _mesa_function_pool[2800]: Color4usv (offset 40) */ + /* _mesa_function_pool[2853]: Color4usv (offset 40) */ "p\0" "glColor4usv\0" "\0" - /* _mesa_function_pool[2815]: Fogi (offset 155) */ + /* _mesa_function_pool[2868]: Fogi (offset 155) */ "ii\0" "glFogi\0" "\0" - /* _mesa_function_pool[2826]: FinalCombinerInputNV (dynamic) */ + /* _mesa_function_pool[2879]: FinalCombinerInputNV (dynamic) */ "iiii\0" "glFinalCombinerInputNV\0" "\0" - /* _mesa_function_pool[2855]: DepthFunc (offset 245) */ + /* _mesa_function_pool[2908]: DepthFunc (offset 245) */ "i\0" "glDepthFunc\0" "\0" - /* _mesa_function_pool[2870]: GetSamplerParameterIiv (will be remapped) */ + /* _mesa_function_pool[2923]: GetSamplerParameterIiv (will be remapped) */ "iip\0" "glGetSamplerParameterIiv\0" "glGetSamplerParameterIivEXT\0" "glGetSamplerParameterIivOES\0" "\0" - /* _mesa_function_pool[2956]: VertexArrayAttribLFormat (will be remapped) */ + /* _mesa_function_pool[3009]: VertexArrayAttribLFormat (will be remapped) */ "iiiii\0" "glVertexArrayAttribLFormat\0" "\0" - /* _mesa_function_pool[2990]: VertexAttribI4uiEXT (will be remapped) */ + /* _mesa_function_pool[3043]: VertexAttribI4uiEXT (will be remapped) */ "iiiii\0" "glVertexAttribI4uiEXT\0" "glVertexAttribI4ui\0" "\0" - /* _mesa_function_pool[3038]: DrawElementsInstancedBaseVertexBaseInstance (will be remapped) */ + /* _mesa_function_pool[3091]: DrawElementsInstancedBaseVertexBaseInstance (will be remapped) */ "iiipiii\0" "glDrawElementsInstancedBaseVertexBaseInstance\0" "glDrawElementsInstancedBaseVertexBaseInstanceEXT\0" "\0" - /* _mesa_function_pool[3142]: ProgramEnvParameter4dvARB (will be remapped) */ + /* _mesa_function_pool[3195]: ProgramEnvParameter4dvARB (will be remapped) */ "iip\0" "glProgramEnvParameter4dvARB\0" "glProgramParameter4dvNV\0" "\0" - /* _mesa_function_pool[3199]: ColorTableParameteriv (offset 341) */ + /* _mesa_function_pool[3252]: ColorTableParameteriv (offset 341) */ "iip\0" "glColorTableParameteriv\0" "glColorTableParameterivSGI\0" "\0" - /* _mesa_function_pool[3255]: BindSamplers (will be remapped) */ + /* _mesa_function_pool[3308]: BindSamplers (will be remapped) */ "iip\0" "glBindSamplers\0" "\0" - /* _mesa_function_pool[3275]: GetnCompressedTexImageARB (will be remapped) */ + /* _mesa_function_pool[3328]: GetnCompressedTexImageARB (will be remapped) */ "iiip\0" "glGetnCompressedTexImageARB\0" "\0" - /* _mesa_function_pool[3309]: CopyNamedBufferSubData (will be remapped) */ + /* _mesa_function_pool[3362]: CopyNamedBufferSubData (will be remapped) */ "iiiii\0" "glCopyNamedBufferSubData\0" "\0" - /* _mesa_function_pool[3341]: BindSampler (will be remapped) */ + /* _mesa_function_pool[3394]: BindSampler (will be remapped) */ "ii\0" "glBindSampler\0" "\0" - /* _mesa_function_pool[3359]: GetUniformuiv (will be remapped) */ + /* _mesa_function_pool[3412]: GetUniformuiv (will be remapped) */ "iip\0" "glGetUniformuivEXT\0" "glGetUniformuiv\0" "\0" - /* _mesa_function_pool[3399]: GetQueryBufferObjectuiv (will be remapped) */ + /* _mesa_function_pool[3452]: GetQueryBufferObjectuiv (will be remapped) */ "iiii\0" "glGetQueryBufferObjectuiv\0" "\0" - /* _mesa_function_pool[3431]: MultiTexCoord2fARB (offset 386) */ + /* _mesa_function_pool[3484]: MultiTexCoord2fARB (offset 386) */ "iff\0" "glMultiTexCoord2f\0" "glMultiTexCoord2fARB\0" "\0" - /* _mesa_function_pool[3475]: GetTextureImage (will be remapped) */ + /* _mesa_function_pool[3528]: GetTextureImage (will be remapped) */ "iiiiip\0" "glGetTextureImage\0" "\0" - /* _mesa_function_pool[3501]: MultiTexCoord3iv (offset 397) */ + /* _mesa_function_pool[3554]: MultiTexCoord3iv (offset 397) */ "ip\0" "glMultiTexCoord3iv\0" "glMultiTexCoord3ivARB\0" "\0" - /* _mesa_function_pool[3546]: Finish (offset 216) */ + /* _mesa_function_pool[3599]: Finish (offset 216) */ "\0" "glFinish\0" "\0" - /* _mesa_function_pool[3557]: ClearStencil (offset 207) */ + /* _mesa_function_pool[3610]: ClearStencil (offset 207) */ "i\0" "glClearStencil\0" "\0" - /* _mesa_function_pool[3575]: ClearColorIiEXT (will be remapped) */ + /* _mesa_function_pool[3628]: ClearColorIiEXT (will be remapped) */ "iiii\0" "glClearColorIiEXT\0" "\0" - /* _mesa_function_pool[3599]: LoadMatrixd (offset 292) */ + /* _mesa_function_pool[3652]: LoadMatrixd (offset 292) */ "p\0" "glLoadMatrixd\0" "\0" - /* _mesa_function_pool[3616]: VDPAURegisterOutputSurfaceNV (will be remapped) */ + /* _mesa_function_pool[3669]: VDPAURegisterOutputSurfaceNV (will be remapped) */ "piip\0" "glVDPAURegisterOutputSurfaceNV\0" "\0" - /* _mesa_function_pool[3653]: VertexP4ui (will be remapped) */ + /* _mesa_function_pool[3706]: VertexP4ui (will be remapped) */ "ii\0" "glVertexP4ui\0" "\0" - /* _mesa_function_pool[3670]: GetProgramResourceIndex (will be remapped) */ + /* _mesa_function_pool[3723]: GetProgramResourceIndex (will be remapped) */ "iip\0" "glGetProgramResourceIndex\0" "\0" - /* _mesa_function_pool[3701]: SpriteParameterfvSGIX (dynamic) */ + /* _mesa_function_pool[3754]: SpriteParameterfvSGIX (dynamic) */ "ip\0" "glSpriteParameterfvSGIX\0" "\0" - /* _mesa_function_pool[3729]: TextureStorage3DMultisample (will be remapped) */ + /* _mesa_function_pool[3782]: TextureStorage3DMultisample (will be remapped) */ "iiiiiii\0" "glTextureStorage3DMultisample\0" "\0" - /* _mesa_function_pool[3768]: GetnUniformivARB (will be remapped) */ + /* _mesa_function_pool[3821]: GetnUniformivARB (will be remapped) */ "iiip\0" "glGetnUniformivARB\0" "glGetnUniformiv\0" "glGetnUniformivKHR\0" "\0" - /* _mesa_function_pool[3828]: ReleaseShaderCompiler (will be remapped) */ + /* _mesa_function_pool[3881]: ReleaseShaderCompiler (will be remapped) */ "\0" "glReleaseShaderCompiler\0" "\0" - /* _mesa_function_pool[3854]: BlendFuncSeparate (will be remapped) */ + /* _mesa_function_pool[3907]: BlendFuncSeparate (will be remapped) */ "iiii\0" "glBlendFuncSeparate\0" "glBlendFuncSeparateEXT\0" "glBlendFuncSeparateINGR\0" "glBlendFuncSeparateOES\0" "\0" - /* _mesa_function_pool[3950]: Color3us (offset 23) */ + /* _mesa_function_pool[4003]: Color3us (offset 23) */ "iii\0" "glColor3us\0" "\0" - /* _mesa_function_pool[3966]: LoadMatrixx (will be remapped) */ + /* _mesa_function_pool[4019]: LoadMatrixx (will be remapped) */ "p\0" "glLoadMatrixxOES\0" "glLoadMatrixx\0" "\0" - /* _mesa_function_pool[4000]: BufferStorage (will be remapped) */ + /* _mesa_function_pool[4053]: BufferStorage (will be remapped) */ "iipi\0" "glBufferStorage\0" "glBufferStorageEXT\0" "\0" - /* _mesa_function_pool[4041]: Color3ub (offset 19) */ + /* _mesa_function_pool[4094]: Color3ub (offset 19) */ "iii\0" "glColor3ub\0" "\0" - /* _mesa_function_pool[4057]: GetInstrumentsSGIX (dynamic) */ + /* _mesa_function_pool[4110]: GetInstrumentsSGIX (dynamic) */ "\0" "glGetInstrumentsSGIX\0" "\0" - /* _mesa_function_pool[4080]: Color3ui (offset 21) */ + /* _mesa_function_pool[4133]: Color3ui (offset 21) */ "iii\0" "glColor3ui\0" "\0" - /* _mesa_function_pool[4096]: VertexAttrib4dvNV (will be remapped) */ + /* _mesa_function_pool[4149]: VertexAttrib4dvNV (will be remapped) */ "ip\0" "glVertexAttrib4dvNV\0" "\0" - /* _mesa_function_pool[4120]: AlphaFragmentOp2ATI (will be remapped) */ + /* _mesa_function_pool[4173]: AlphaFragmentOp2ATI (will be remapped) */ "iiiiiiiii\0" "glAlphaFragmentOp2ATI\0" "\0" - /* _mesa_function_pool[4153]: RasterPos4dv (offset 79) */ + /* _mesa_function_pool[4206]: RasterPos4dv (offset 79) */ "p\0" "glRasterPos4dv\0" "\0" - /* _mesa_function_pool[4171]: DeleteProgramPipelines (will be remapped) */ + /* _mesa_function_pool[4224]: DeleteProgramPipelines (will be remapped) */ "ip\0" "glDeleteProgramPipelines\0" "glDeleteProgramPipelinesEXT\0" "\0" - /* _mesa_function_pool[4228]: LineWidthx (will be remapped) */ + /* _mesa_function_pool[4281]: LineWidthx (will be remapped) */ "i\0" "glLineWidthxOES\0" "glLineWidthx\0" "\0" - /* _mesa_function_pool[4260]: GetTransformFeedbacki_v (will be remapped) */ + /* _mesa_function_pool[4313]: GetTransformFeedbacki_v (will be remapped) */ "iiip\0" "glGetTransformFeedbacki_v\0" "\0" - /* _mesa_function_pool[4292]: Indexdv (offset 45) */ + /* _mesa_function_pool[4345]: Indexdv (offset 45) */ "p\0" "glIndexdv\0" "\0" - /* _mesa_function_pool[4305]: GetnPixelMapfvARB (will be remapped) */ + /* _mesa_function_pool[4358]: GetnPixelMapfvARB (will be remapped) */ "iip\0" "glGetnPixelMapfvARB\0" "\0" - /* _mesa_function_pool[4330]: EGLImageTargetTexture2DOES (will be remapped) */ + /* _mesa_function_pool[4383]: EGLImageTargetTexture2DOES (will be remapped) */ "ip\0" "glEGLImageTargetTexture2DOES\0" "\0" - /* _mesa_function_pool[4363]: DepthMask (offset 211) */ + /* _mesa_function_pool[4416]: DepthMask (offset 211) */ "i\0" "glDepthMask\0" "\0" - /* _mesa_function_pool[4378]: WindowPos4ivMESA (will be remapped) */ + /* _mesa_function_pool[4431]: WindowPos4ivMESA (will be remapped) */ "p\0" "glWindowPos4ivMESA\0" "\0" - /* _mesa_function_pool[4400]: GetShaderInfoLog (will be remapped) */ + /* _mesa_function_pool[4453]: GetShaderInfoLog (will be remapped) */ "iipp\0" "glGetShaderInfoLog\0" "\0" - /* _mesa_function_pool[4425]: BindFragmentShaderATI (will be remapped) */ + /* _mesa_function_pool[4478]: BindFragmentShaderATI (will be remapped) */ "i\0" "glBindFragmentShaderATI\0" "\0" - /* _mesa_function_pool[4452]: BlendFuncSeparateiARB (will be remapped) */ + /* _mesa_function_pool[4505]: BlendFuncSeparateiARB (will be remapped) */ "iiiii\0" "glBlendFuncSeparateiARB\0" "glBlendFuncSeparateIndexedAMD\0" @@ -634,2767 +639,2780 @@ "glBlendFuncSeparateiEXT\0" "glBlendFuncSeparateiOES\0" "\0" - /* _mesa_function_pool[4582]: PixelTexGenParameteriSGIS (dynamic) */ + /* _mesa_function_pool[4635]: PixelTexGenParameteriSGIS (dynamic) */ "ii\0" "glPixelTexGenParameteriSGIS\0" "\0" - /* _mesa_function_pool[4614]: EGLImageTargetRenderbufferStorageOES (will be remapped) */ + /* _mesa_function_pool[4667]: EGLImageTargetRenderbufferStorageOES (will be remapped) */ "ip\0" "glEGLImageTargetRenderbufferStorageOES\0" "\0" - /* _mesa_function_pool[4657]: GenTransformFeedbacks (will be remapped) */ + /* _mesa_function_pool[4710]: GenTransformFeedbacks (will be remapped) */ "ip\0" "glGenTransformFeedbacks\0" "\0" - /* _mesa_function_pool[4685]: VertexPointer (offset 321) */ + /* _mesa_function_pool[4738]: VertexPointer (offset 321) */ "iiip\0" "glVertexPointer\0" "\0" - /* _mesa_function_pool[4707]: GetCompressedTexImage (will be remapped) */ + /* _mesa_function_pool[4760]: GetCompressedTexImage (will be remapped) */ "iip\0" "glGetCompressedTexImage\0" "glGetCompressedTexImageARB\0" "\0" - /* _mesa_function_pool[4763]: ProgramLocalParameter4dvARB (will be remapped) */ + /* _mesa_function_pool[4816]: ProgramLocalParameter4dvARB (will be remapped) */ "iip\0" "glProgramLocalParameter4dvARB\0" "\0" - /* _mesa_function_pool[4798]: UniformMatrix2dv (will be remapped) */ + /* _mesa_function_pool[4851]: UniformMatrix2dv (will be remapped) */ "iiip\0" "glUniformMatrix2dv\0" "\0" - /* _mesa_function_pool[4823]: GetQueryObjectui64v (will be remapped) */ + /* _mesa_function_pool[4876]: GetQueryObjectui64v (will be remapped) */ "iip\0" "glGetQueryObjectui64v\0" "glGetQueryObjectui64vEXT\0" "\0" - /* _mesa_function_pool[4875]: VertexAttribP1uiv (will be remapped) */ + /* _mesa_function_pool[4928]: VertexAttribP1uiv (will be remapped) */ "iiip\0" "glVertexAttribP1uiv\0" "\0" - /* _mesa_function_pool[4901]: IsProgram (will be remapped) */ + /* _mesa_function_pool[4954]: IsProgram (will be remapped) */ "i\0" "glIsProgram\0" "\0" - /* _mesa_function_pool[4916]: TexCoordPointerListIBM (dynamic) */ + /* _mesa_function_pool[4969]: TexCoordPointerListIBM (dynamic) */ "iiipi\0" "glTexCoordPointerListIBM\0" "\0" - /* _mesa_function_pool[4948]: ResizeBuffersMESA (will be remapped) */ + /* _mesa_function_pool[5001]: ResizeBuffersMESA (will be remapped) */ "\0" "glResizeBuffersMESA\0" "\0" - /* _mesa_function_pool[4970]: BindBuffersBase (will be remapped) */ + /* _mesa_function_pool[5023]: BindBuffersBase (will be remapped) */ "iiip\0" "glBindBuffersBase\0" "\0" - /* _mesa_function_pool[4994]: GenTextures (offset 328) */ + /* _mesa_function_pool[5047]: GenTextures (offset 328) */ "ip\0" "glGenTextures\0" "glGenTexturesEXT\0" "\0" - /* _mesa_function_pool[5029]: IndexPointerListIBM (dynamic) */ + /* _mesa_function_pool[5082]: IndexPointerListIBM (dynamic) */ "iipi\0" "glIndexPointerListIBM\0" "\0" - /* _mesa_function_pool[5057]: UnmapNamedBuffer (will be remapped) */ + /* _mesa_function_pool[5110]: UnmapNamedBuffer (will be remapped) */ "i\0" "glUnmapNamedBuffer\0" "\0" - /* _mesa_function_pool[5079]: UniformMatrix3x2dv (will be remapped) */ + /* _mesa_function_pool[5132]: UniformMatrix3x2dv (will be remapped) */ "iiip\0" "glUniformMatrix3x2dv\0" "\0" - /* _mesa_function_pool[5106]: WindowPos4fMESA (will be remapped) */ + /* _mesa_function_pool[5159]: WindowPos4fMESA (will be remapped) */ "ffff\0" "glWindowPos4fMESA\0" "\0" - /* _mesa_function_pool[5130]: GenerateMipmap (will be remapped) */ + /* _mesa_function_pool[5183]: GenerateMipmap (will be remapped) */ "i\0" "glGenerateMipmap\0" "glGenerateMipmapEXT\0" "glGenerateMipmapOES\0" "\0" - /* _mesa_function_pool[5190]: VertexAttribP4ui (will be remapped) */ + /* _mesa_function_pool[5243]: VertexAttribP4ui (will be remapped) */ "iiii\0" "glVertexAttribP4ui\0" "\0" - /* _mesa_function_pool[5215]: StringMarkerGREMEDY (will be remapped) */ + /* _mesa_function_pool[5268]: StringMarkerGREMEDY (will be remapped) */ "ip\0" "glStringMarkerGREMEDY\0" "\0" - /* _mesa_function_pool[5241]: Uniform4i (will be remapped) */ + /* _mesa_function_pool[5294]: Uniform4i (will be remapped) */ "iiiii\0" "glUniform4i\0" "glUniform4iARB\0" "\0" - /* _mesa_function_pool[5275]: Uniform4d (will be remapped) */ + /* _mesa_function_pool[5328]: Uniform4d (will be remapped) */ "idddd\0" "glUniform4d\0" "\0" - /* _mesa_function_pool[5294]: Uniform4f (will be remapped) */ + /* _mesa_function_pool[5347]: Uniform4f (will be remapped) */ "iffff\0" "glUniform4f\0" "glUniform4fARB\0" "\0" - /* _mesa_function_pool[5328]: ProgramUniform3dv (will be remapped) */ + /* _mesa_function_pool[5381]: ProgramUniform3dv (will be remapped) */ "iiip\0" "glProgramUniform3dv\0" "\0" - /* _mesa_function_pool[5354]: GetNamedBufferParameteri64v (will be remapped) */ + /* _mesa_function_pool[5407]: GetNamedBufferParameteri64v (will be remapped) */ "iip\0" "glGetNamedBufferParameteri64v\0" "\0" - /* _mesa_function_pool[5389]: NamedFramebufferTexture (will be remapped) */ + /* _mesa_function_pool[5442]: NamedFramebufferTexture (will be remapped) */ "iiii\0" "glNamedFramebufferTexture\0" "\0" - /* _mesa_function_pool[5421]: ProgramUniform3d (will be remapped) */ + /* _mesa_function_pool[5474]: ProgramUniform3d (will be remapped) */ "iiddd\0" "glProgramUniform3d\0" "\0" - /* _mesa_function_pool[5447]: ProgramUniform3f (will be remapped) */ + /* _mesa_function_pool[5500]: ProgramUniform3f (will be remapped) */ "iifff\0" "glProgramUniform3f\0" "glProgramUniform3fEXT\0" "\0" - /* _mesa_function_pool[5495]: ProgramUniform3i (will be remapped) */ + /* _mesa_function_pool[5548]: ProgramUniform3i (will be remapped) */ "iiiii\0" "glProgramUniform3i\0" "glProgramUniform3iEXT\0" "\0" - /* _mesa_function_pool[5543]: PointParameterfv (will be remapped) */ + /* _mesa_function_pool[5596]: PointParameterfv (will be remapped) */ "ip\0" "glPointParameterfv\0" "glPointParameterfvARB\0" "glPointParameterfvEXT\0" "glPointParameterfvSGIS\0" "\0" - /* _mesa_function_pool[5633]: GetHistogramParameterfv (offset 362) */ + /* _mesa_function_pool[5686]: GetHistogramParameterfv (offset 362) */ "iip\0" "glGetHistogramParameterfv\0" "glGetHistogramParameterfvEXT\0" "\0" - /* _mesa_function_pool[5693]: GetString (offset 275) */ + /* _mesa_function_pool[5746]: GetString (offset 275) */ "i\0" "glGetString\0" "\0" - /* _mesa_function_pool[5708]: ColorPointervINTEL (dynamic) */ + /* _mesa_function_pool[5761]: ColorPointervINTEL (dynamic) */ "iip\0" "glColorPointervINTEL\0" "\0" - /* _mesa_function_pool[5734]: VDPAUUnmapSurfacesNV (will be remapped) */ + /* _mesa_function_pool[5787]: VDPAUUnmapSurfacesNV (will be remapped) */ "ip\0" "glVDPAUUnmapSurfacesNV\0" "\0" - /* _mesa_function_pool[5761]: GetnHistogramARB (will be remapped) */ + /* _mesa_function_pool[5814]: GetnHistogramARB (will be remapped) */ "iiiiip\0" "glGetnHistogramARB\0" "\0" - /* _mesa_function_pool[5788]: ReplacementCodeuiColor4fNormal3fVertex3fvSUN (dynamic) */ + /* _mesa_function_pool[5841]: ReplacementCodeuiColor4fNormal3fVertex3fvSUN (dynamic) */ "pppp\0" "glReplacementCodeuiColor4fNormal3fVertex3fvSUN\0" "\0" - /* _mesa_function_pool[5841]: SecondaryColor3s (will be remapped) */ + /* _mesa_function_pool[5894]: SecondaryColor3s (will be remapped) */ "iii\0" "glSecondaryColor3s\0" "glSecondaryColor3sEXT\0" "\0" - /* _mesa_function_pool[5887]: VertexAttribP2uiv (will be remapped) */ + /* _mesa_function_pool[5940]: VertexAttribP2uiv (will be remapped) */ "iiip\0" "glVertexAttribP2uiv\0" "\0" - /* _mesa_function_pool[5913]: UniformMatrix3x4dv (will be remapped) */ + /* _mesa_function_pool[5966]: UniformMatrix3x4dv (will be remapped) */ "iiip\0" "glUniformMatrix3x4dv\0" "\0" - /* _mesa_function_pool[5940]: VertexAttrib3fNV (will be remapped) */ + /* _mesa_function_pool[5993]: VertexAttrib3fNV (will be remapped) */ "ifff\0" "glVertexAttrib3fNV\0" "\0" - /* _mesa_function_pool[5965]: SecondaryColor3b (will be remapped) */ + /* _mesa_function_pool[6018]: SecondaryColor3b (will be remapped) */ "iii\0" "glSecondaryColor3b\0" "glSecondaryColor3bEXT\0" "\0" - /* _mesa_function_pool[6011]: EnableClientState (offset 313) */ + /* _mesa_function_pool[6064]: EnableClientState (offset 313) */ "i\0" "glEnableClientState\0" "\0" - /* _mesa_function_pool[6034]: Color4ubVertex2fvSUN (dynamic) */ + /* _mesa_function_pool[6087]: Color4ubVertex2fvSUN (dynamic) */ "pp\0" "glColor4ubVertex2fvSUN\0" "\0" - /* _mesa_function_pool[6061]: GetActiveSubroutineName (will be remapped) */ + /* _mesa_function_pool[6114]: GetActiveSubroutineName (will be remapped) */ "iiiipp\0" "glGetActiveSubroutineName\0" "\0" - /* _mesa_function_pool[6095]: SecondaryColor3i (will be remapped) */ + /* _mesa_function_pool[6148]: SecondaryColor3i (will be remapped) */ "iii\0" "glSecondaryColor3i\0" "glSecondaryColor3iEXT\0" "\0" - /* _mesa_function_pool[6141]: TexFilterFuncSGIS (dynamic) */ + /* _mesa_function_pool[6194]: TexFilterFuncSGIS (dynamic) */ "iiip\0" "glTexFilterFuncSGIS\0" "\0" - /* _mesa_function_pool[6167]: GetFragmentMaterialfvSGIX (dynamic) */ + /* _mesa_function_pool[6220]: GetFragmentMaterialfvSGIX (dynamic) */ "iip\0" "glGetFragmentMaterialfvSGIX\0" "\0" - /* _mesa_function_pool[6200]: DetailTexFuncSGIS (dynamic) */ + /* _mesa_function_pool[6253]: DetailTexFuncSGIS (dynamic) */ "iip\0" "glDetailTexFuncSGIS\0" "\0" - /* _mesa_function_pool[6225]: FlushMappedBufferRange (will be remapped) */ + /* _mesa_function_pool[6278]: FlushMappedBufferRange (will be remapped) */ "iii\0" "glFlushMappedBufferRange\0" "glFlushMappedBufferRangeEXT\0" "\0" - /* _mesa_function_pool[6283]: Lightfv (offset 160) */ + /* _mesa_function_pool[6336]: Lightfv (offset 160) */ "iip\0" "glLightfv\0" "\0" - /* _mesa_function_pool[6298]: GetFramebufferAttachmentParameteriv (will be remapped) */ + /* _mesa_function_pool[6351]: GetFramebufferAttachmentParameteriv (will be remapped) */ "iiip\0" "glGetFramebufferAttachmentParameteriv\0" "glGetFramebufferAttachmentParameterivEXT\0" "glGetFramebufferAttachmentParameterivOES\0" "\0" - /* _mesa_function_pool[6424]: ColorSubTable (offset 346) */ + /* _mesa_function_pool[6477]: ColorSubTable (offset 346) */ "iiiiip\0" "glColorSubTable\0" "glColorSubTableEXT\0" "\0" - /* _mesa_function_pool[6467]: GetVertexArrayIndexed64iv (will be remapped) */ + /* _mesa_function_pool[6520]: GetVertexArrayIndexed64iv (will be remapped) */ "iiip\0" "glGetVertexArrayIndexed64iv\0" "\0" - /* _mesa_function_pool[6501]: EndPerfMonitorAMD (will be remapped) */ + /* _mesa_function_pool[6554]: EndPerfMonitorAMD (will be remapped) */ "i\0" "glEndPerfMonitorAMD\0" "\0" - /* _mesa_function_pool[6524]: ReadInstrumentsSGIX (dynamic) */ + /* _mesa_function_pool[6577]: ReadInstrumentsSGIX (dynamic) */ "i\0" "glReadInstrumentsSGIX\0" "\0" - /* _mesa_function_pool[6549]: CreateBuffers (will be remapped) */ + /* _mesa_function_pool[6602]: CreateBuffers (will be remapped) */ "ip\0" "glCreateBuffers\0" "\0" - /* _mesa_function_pool[6569]: MapParameterivNV (dynamic) */ + /* _mesa_function_pool[6622]: MapParameterivNV (dynamic) */ "iip\0" "glMapParameterivNV\0" "\0" - /* _mesa_function_pool[6593]: GetMultisamplefv (will be remapped) */ + /* _mesa_function_pool[6646]: GetMultisamplefv (will be remapped) */ "iip\0" "glGetMultisamplefv\0" "\0" - /* _mesa_function_pool[6617]: WeightbvARB (dynamic) */ + /* _mesa_function_pool[6670]: WeightbvARB (dynamic) */ "ip\0" "glWeightbvARB\0" "\0" - /* _mesa_function_pool[6635]: GetActiveSubroutineUniformName (will be remapped) */ + /* _mesa_function_pool[6688]: GetActiveSubroutineUniformName (will be remapped) */ "iiiipp\0" "glGetActiveSubroutineUniformName\0" "\0" - /* _mesa_function_pool[6676]: Rectdv (offset 87) */ + /* _mesa_function_pool[6729]: Rectdv (offset 87) */ "pp\0" "glRectdv\0" "\0" - /* _mesa_function_pool[6689]: DrawArraysInstancedARB (will be remapped) */ + /* _mesa_function_pool[6742]: DrawArraysInstancedARB (will be remapped) */ "iiii\0" "glDrawArraysInstancedARB\0" "glDrawArraysInstancedEXT\0" "glDrawArraysInstanced\0" "\0" - /* _mesa_function_pool[6767]: ProgramEnvParameters4fvEXT (will be remapped) */ + /* _mesa_function_pool[6820]: ProgramEnvParameters4fvEXT (will be remapped) */ "iiip\0" "glProgramEnvParameters4fvEXT\0" "\0" - /* _mesa_function_pool[6802]: VertexAttrib2svNV (will be remapped) */ + /* _mesa_function_pool[6855]: BlendBarrier (will be remapped) */ + "\0" + "glBlendBarrier\0" + "glBlendBarrierKHR\0" + "\0" + /* _mesa_function_pool[6890]: VertexAttrib2svNV (will be remapped) */ "ip\0" "glVertexAttrib2svNV\0" "\0" - /* _mesa_function_pool[6826]: SecondaryColorP3uiv (will be remapped) */ + /* _mesa_function_pool[6914]: SecondaryColorP3uiv (will be remapped) */ "ip\0" "glSecondaryColorP3uiv\0" "\0" - /* _mesa_function_pool[6852]: GetnPixelMapuivARB (will be remapped) */ + /* _mesa_function_pool[6940]: GetnPixelMapuivARB (will be remapped) */ "iip\0" "glGetnPixelMapuivARB\0" "\0" - /* _mesa_function_pool[6878]: GetSamplerParameterIuiv (will be remapped) */ + /* _mesa_function_pool[6966]: GetSamplerParameterIuiv (will be remapped) */ "iip\0" "glGetSamplerParameterIuiv\0" "glGetSamplerParameterIuivEXT\0" "glGetSamplerParameterIuivOES\0" "\0" - /* _mesa_function_pool[6967]: Disablei (will be remapped) */ + /* _mesa_function_pool[7055]: Disablei (will be remapped) */ "ii\0" "glDisableIndexedEXT\0" "glDisablei\0" "glDisableiEXT\0" "glDisableiOES\0" "\0" - /* _mesa_function_pool[7030]: CompressedTexSubImage3D (will be remapped) */ + /* _mesa_function_pool[7118]: CompressedTexSubImage3D (will be remapped) */ "iiiiiiiiiip\0" "glCompressedTexSubImage3D\0" "glCompressedTexSubImage3DARB\0" "glCompressedTexSubImage3DOES\0" "\0" - /* _mesa_function_pool[7127]: WindowPos4svMESA (will be remapped) */ + /* _mesa_function_pool[7215]: WindowPos4svMESA (will be remapped) */ "p\0" "glWindowPos4svMESA\0" "\0" - /* _mesa_function_pool[7149]: ObjectLabel (will be remapped) */ + /* _mesa_function_pool[7237]: ObjectLabel (will be remapped) */ "iiip\0" "glObjectLabel\0" "glObjectLabelKHR\0" "\0" - /* _mesa_function_pool[7186]: Color3dv (offset 12) */ + /* _mesa_function_pool[7274]: Color3dv (offset 12) */ "p\0" "glColor3dv\0" "\0" - /* _mesa_function_pool[7200]: BeginQuery (will be remapped) */ + /* _mesa_function_pool[7288]: BeginQuery (will be remapped) */ "ii\0" "glBeginQuery\0" "glBeginQueryARB\0" "\0" - /* _mesa_function_pool[7233]: VertexP3uiv (will be remapped) */ + /* _mesa_function_pool[7321]: VertexP3uiv (will be remapped) */ "ip\0" "glVertexP3uiv\0" "\0" - /* _mesa_function_pool[7251]: GetUniformLocation (will be remapped) */ + /* _mesa_function_pool[7339]: GetUniformLocation (will be remapped) */ "ip\0" "glGetUniformLocation\0" "glGetUniformLocationARB\0" "\0" - /* _mesa_function_pool[7300]: PixelStoref (offset 249) */ + /* _mesa_function_pool[7388]: PixelStoref (offset 249) */ "if\0" "glPixelStoref\0" "\0" - /* _mesa_function_pool[7318]: WindowPos2iv (will be remapped) */ + /* _mesa_function_pool[7406]: WindowPos2iv (will be remapped) */ "p\0" "glWindowPos2iv\0" "glWindowPos2ivARB\0" "glWindowPos2ivMESA\0" "\0" - /* _mesa_function_pool[7373]: PixelStorei (offset 250) */ + /* _mesa_function_pool[7461]: PixelStorei (offset 250) */ "ii\0" "glPixelStorei\0" "\0" - /* _mesa_function_pool[7391]: GetNamedFramebufferAttachmentParameteriv (will be remapped) */ + /* _mesa_function_pool[7479]: GetNamedFramebufferAttachmentParameteriv (will be remapped) */ "iiip\0" "glGetNamedFramebufferAttachmentParameteriv\0" "\0" - /* _mesa_function_pool[7440]: VertexAttribs1svNV (will be remapped) */ + /* _mesa_function_pool[7528]: VertexAttribs1svNV (will be remapped) */ "iip\0" "glVertexAttribs1svNV\0" "\0" - /* _mesa_function_pool[7466]: CheckNamedFramebufferStatus (will be remapped) */ + /* _mesa_function_pool[7554]: CheckNamedFramebufferStatus (will be remapped) */ "ii\0" "glCheckNamedFramebufferStatus\0" "\0" - /* _mesa_function_pool[7500]: RequestResidentProgramsNV (will be remapped) */ + /* _mesa_function_pool[7588]: RequestResidentProgramsNV (will be remapped) */ "ip\0" "glRequestResidentProgramsNV\0" "\0" - /* _mesa_function_pool[7532]: UniformSubroutinesuiv (will be remapped) */ + /* _mesa_function_pool[7620]: UniformSubroutinesuiv (will be remapped) */ "iip\0" "glUniformSubroutinesuiv\0" "\0" - /* _mesa_function_pool[7561]: ListParameterivSGIX (dynamic) */ + /* _mesa_function_pool[7649]: ListParameterivSGIX (dynamic) */ "iip\0" "glListParameterivSGIX\0" "\0" - /* _mesa_function_pool[7588]: TexCoord2fColor4fNormal3fVertex3fvSUN (dynamic) */ + /* _mesa_function_pool[7676]: TexCoord2fColor4fNormal3fVertex3fvSUN (dynamic) */ "pppp\0" "glTexCoord2fColor4fNormal3fVertex3fvSUN\0" "\0" - /* _mesa_function_pool[7634]: CheckFramebufferStatus (will be remapped) */ + /* _mesa_function_pool[7722]: CheckFramebufferStatus (will be remapped) */ "i\0" "glCheckFramebufferStatus\0" "glCheckFramebufferStatusEXT\0" "glCheckFramebufferStatusOES\0" "\0" - /* _mesa_function_pool[7718]: DispatchComputeIndirect (will be remapped) */ + /* _mesa_function_pool[7806]: DispatchComputeIndirect (will be remapped) */ "i\0" "glDispatchComputeIndirect\0" "\0" - /* _mesa_function_pool[7747]: InvalidateBufferData (will be remapped) */ + /* _mesa_function_pool[7835]: InvalidateBufferData (will be remapped) */ "i\0" "glInvalidateBufferData\0" "\0" - /* _mesa_function_pool[7773]: GetUniformdv (will be remapped) */ + /* _mesa_function_pool[7861]: GetUniformdv (will be remapped) */ "iip\0" "glGetUniformdv\0" "\0" - /* _mesa_function_pool[7793]: ProgramLocalParameters4fvEXT (will be remapped) */ + /* _mesa_function_pool[7881]: ProgramLocalParameters4fvEXT (will be remapped) */ "iiip\0" "glProgramLocalParameters4fvEXT\0" "\0" - /* _mesa_function_pool[7830]: VertexAttribL1dv (will be remapped) */ + /* _mesa_function_pool[7918]: VertexAttribL1dv (will be remapped) */ "ip\0" "glVertexAttribL1dv\0" "\0" - /* _mesa_function_pool[7853]: IsFramebuffer (will be remapped) */ + /* _mesa_function_pool[7941]: IsFramebuffer (will be remapped) */ "i\0" "glIsFramebuffer\0" "glIsFramebufferEXT\0" "glIsFramebufferOES\0" "\0" - /* _mesa_function_pool[7910]: GetPixelTexGenParameterfvSGIS (dynamic) */ + /* _mesa_function_pool[7998]: GetPixelTexGenParameterfvSGIS (dynamic) */ "ip\0" "glGetPixelTexGenParameterfvSGIS\0" "\0" - /* _mesa_function_pool[7946]: GetDoublev (offset 260) */ + /* _mesa_function_pool[8034]: GetDoublev (offset 260) */ "ip\0" "glGetDoublev\0" "\0" - /* _mesa_function_pool[7963]: GetObjectLabel (will be remapped) */ + /* _mesa_function_pool[8051]: GetObjectLabel (will be remapped) */ "iiipp\0" "glGetObjectLabel\0" "glGetObjectLabelKHR\0" "\0" - /* _mesa_function_pool[8007]: ColorP3uiv (will be remapped) */ + /* _mesa_function_pool[8095]: ColorP3uiv (will be remapped) */ "ip\0" "glColorP3uiv\0" "\0" - /* _mesa_function_pool[8024]: CombinerParameteriNV (dynamic) */ + /* _mesa_function_pool[8112]: CombinerParameteriNV (dynamic) */ "ii\0" "glCombinerParameteriNV\0" "\0" - /* _mesa_function_pool[8051]: GetTextureSubImage (will be remapped) */ + /* _mesa_function_pool[8139]: GetTextureSubImage (will be remapped) */ "iiiiiiiiiiip\0" "glGetTextureSubImage\0" "\0" - /* _mesa_function_pool[8086]: Normal3fVertex3fvSUN (dynamic) */ + /* _mesa_function_pool[8174]: Normal3fVertex3fvSUN (dynamic) */ "pp\0" "glNormal3fVertex3fvSUN\0" "\0" - /* _mesa_function_pool[8113]: VertexAttribI4ivEXT (will be remapped) */ + /* _mesa_function_pool[8201]: VertexAttribI4ivEXT (will be remapped) */ "ip\0" "glVertexAttribI4ivEXT\0" "glVertexAttribI4iv\0" "\0" - /* _mesa_function_pool[8158]: SecondaryColor3ubv (will be remapped) */ + /* _mesa_function_pool[8246]: SecondaryColor3ubv (will be remapped) */ "p\0" "glSecondaryColor3ubv\0" "glSecondaryColor3ubvEXT\0" "\0" - /* _mesa_function_pool[8206]: GetDebugMessageLog (will be remapped) */ + /* _mesa_function_pool[8294]: GetDebugMessageLog (will be remapped) */ "iipppppp\0" "glGetDebugMessageLogARB\0" "glGetDebugMessageLog\0" "glGetDebugMessageLogKHR\0" "\0" - /* _mesa_function_pool[8285]: DeformationMap3fSGIX (dynamic) */ + /* _mesa_function_pool[8373]: DeformationMap3fSGIX (dynamic) */ "iffiiffiiffiip\0" "glDeformationMap3fSGIX\0" "\0" - /* _mesa_function_pool[8324]: MatrixIndexubvARB (dynamic) */ + /* _mesa_function_pool[8412]: MatrixIndexubvARB (dynamic) */ "ip\0" "glMatrixIndexubvARB\0" "\0" - /* _mesa_function_pool[8348]: Color4fNormal3fVertex3fSUN (dynamic) */ + /* _mesa_function_pool[8436]: Color4fNormal3fVertex3fSUN (dynamic) */ "ffffffffff\0" "glColor4fNormal3fVertex3fSUN\0" "\0" - /* _mesa_function_pool[8389]: PixelTexGenParameterfSGIS (dynamic) */ + /* _mesa_function_pool[8477]: PixelTexGenParameterfSGIS (dynamic) */ "if\0" "glPixelTexGenParameterfSGIS\0" "\0" - /* _mesa_function_pool[8421]: ProgramUniform2ui (will be remapped) */ + /* _mesa_function_pool[8509]: ProgramUniform2ui (will be remapped) */ "iiii\0" "glProgramUniform2ui\0" "glProgramUniform2uiEXT\0" "\0" - /* _mesa_function_pool[8470]: TexCoord2fVertex3fvSUN (dynamic) */ + /* _mesa_function_pool[8558]: TexCoord2fVertex3fvSUN (dynamic) */ "pp\0" "glTexCoord2fVertex3fvSUN\0" "\0" - /* _mesa_function_pool[8499]: Color4ubVertex3fvSUN (dynamic) */ + /* _mesa_function_pool[8587]: Color4ubVertex3fvSUN (dynamic) */ "pp\0" "glColor4ubVertex3fvSUN\0" "\0" - /* _mesa_function_pool[8526]: GetShaderSource (will be remapped) */ + /* _mesa_function_pool[8614]: GetShaderSource (will be remapped) */ "iipp\0" "glGetShaderSource\0" "glGetShaderSourceARB\0" "\0" - /* _mesa_function_pool[8571]: BindProgramARB (will be remapped) */ + /* _mesa_function_pool[8659]: BindProgramARB (will be remapped) */ "ii\0" "glBindProgramARB\0" "glBindProgramNV\0" "\0" - /* _mesa_function_pool[8608]: VertexAttrib3sNV (will be remapped) */ + /* _mesa_function_pool[8696]: VertexAttrib3sNV (will be remapped) */ "iiii\0" "glVertexAttrib3sNV\0" "\0" - /* _mesa_function_pool[8633]: ColorFragmentOp1ATI (will be remapped) */ + /* _mesa_function_pool[8721]: ColorFragmentOp1ATI (will be remapped) */ "iiiiiii\0" "glColorFragmentOp1ATI\0" "\0" - /* _mesa_function_pool[8664]: ProgramUniformMatrix4x3fv (will be remapped) */ + /* _mesa_function_pool[8752]: ProgramUniformMatrix4x3fv (will be remapped) */ "iiiip\0" "glProgramUniformMatrix4x3fv\0" "glProgramUniformMatrix4x3fvEXT\0" "\0" - /* _mesa_function_pool[8730]: PopClientAttrib (offset 334) */ + /* _mesa_function_pool[8818]: PopClientAttrib (offset 334) */ "\0" "glPopClientAttrib\0" "\0" - /* _mesa_function_pool[8750]: DrawElementsInstancedARB (will be remapped) */ + /* _mesa_function_pool[8838]: DrawElementsInstancedARB (will be remapped) */ "iiipi\0" "glDrawElementsInstancedARB\0" "glDrawElementsInstancedEXT\0" "glDrawElementsInstanced\0" "\0" - /* _mesa_function_pool[8835]: GetQueryObjectuiv (will be remapped) */ + /* _mesa_function_pool[8923]: GetQueryObjectuiv (will be remapped) */ "iip\0" "glGetQueryObjectuiv\0" "glGetQueryObjectuivARB\0" "\0" - /* _mesa_function_pool[8883]: VertexAttribI4bv (will be remapped) */ + /* _mesa_function_pool[8971]: VertexAttribI4bv (will be remapped) */ "ip\0" "glVertexAttribI4bvEXT\0" "glVertexAttribI4bv\0" "\0" - /* _mesa_function_pool[8928]: FogCoordPointerListIBM (dynamic) */ + /* _mesa_function_pool[9016]: FogCoordPointerListIBM (dynamic) */ "iipi\0" "glFogCoordPointerListIBM\0" "\0" - /* _mesa_function_pool[8959]: DisableVertexArrayAttrib (will be remapped) */ + /* _mesa_function_pool[9047]: DisableVertexArrayAttrib (will be remapped) */ "ii\0" "glDisableVertexArrayAttrib\0" "\0" - /* _mesa_function_pool[8990]: VertexAttribL4d (will be remapped) */ + /* _mesa_function_pool[9078]: VertexAttribL4d (will be remapped) */ "idddd\0" "glVertexAttribL4d\0" "\0" - /* _mesa_function_pool[9015]: Binormal3sEXT (dynamic) */ + /* _mesa_function_pool[9103]: Binormal3sEXT (dynamic) */ "iii\0" "glBinormal3sEXT\0" "\0" - /* _mesa_function_pool[9036]: ListBase (offset 6) */ + /* _mesa_function_pool[9124]: ListBase (offset 6) */ "i\0" "glListBase\0" "\0" - /* _mesa_function_pool[9050]: VertexAttribs2fvNV (will be remapped) */ + /* _mesa_function_pool[9138]: VertexAttribs2fvNV (will be remapped) */ "iip\0" "glVertexAttribs2fvNV\0" "\0" - /* _mesa_function_pool[9076]: BindBufferRange (will be remapped) */ + /* _mesa_function_pool[9164]: BindBufferRange (will be remapped) */ "iiiii\0" "glBindBufferRange\0" "glBindBufferRangeEXT\0" "\0" - /* _mesa_function_pool[9122]: ProgramUniformMatrix2x4fv (will be remapped) */ + /* _mesa_function_pool[9210]: ProgramUniformMatrix2x4fv (will be remapped) */ "iiiip\0" "glProgramUniformMatrix2x4fv\0" "glProgramUniformMatrix2x4fvEXT\0" "\0" - /* _mesa_function_pool[9188]: BindBufferBase (will be remapped) */ + /* _mesa_function_pool[9276]: BindBufferBase (will be remapped) */ "iii\0" "glBindBufferBase\0" "glBindBufferBaseEXT\0" "\0" - /* _mesa_function_pool[9230]: GetQueryObjectiv (will be remapped) */ + /* _mesa_function_pool[9318]: GetQueryObjectiv (will be remapped) */ "iip\0" "glGetQueryObjectiv\0" "glGetQueryObjectivARB\0" "\0" - /* _mesa_function_pool[9276]: VertexAttrib2s (will be remapped) */ + /* _mesa_function_pool[9364]: VertexAttrib2s (will be remapped) */ "iii\0" "glVertexAttrib2s\0" "glVertexAttrib2sARB\0" "\0" - /* _mesa_function_pool[9318]: SecondaryColor3fvEXT (will be remapped) */ + /* _mesa_function_pool[9406]: SecondaryColor3fvEXT (will be remapped) */ "p\0" "glSecondaryColor3fv\0" "glSecondaryColor3fvEXT\0" "\0" - /* _mesa_function_pool[9364]: VertexAttrib2d (will be remapped) */ + /* _mesa_function_pool[9452]: VertexAttrib2d (will be remapped) */ "idd\0" "glVertexAttrib2d\0" "glVertexAttrib2dARB\0" "\0" - /* _mesa_function_pool[9406]: ClearNamedFramebufferiv (will be remapped) */ + /* _mesa_function_pool[9494]: ClearNamedFramebufferiv (will be remapped) */ "iiip\0" "glClearNamedFramebufferiv\0" "\0" - /* _mesa_function_pool[9438]: Uniform1fv (will be remapped) */ + /* _mesa_function_pool[9526]: Uniform1fv (will be remapped) */ "iip\0" "glUniform1fv\0" "glUniform1fvARB\0" "\0" - /* _mesa_function_pool[9472]: GetProgramPipelineInfoLog (will be remapped) */ + /* _mesa_function_pool[9560]: GetProgramPipelineInfoLog (will be remapped) */ "iipp\0" "glGetProgramPipelineInfoLog\0" "glGetProgramPipelineInfoLogEXT\0" "\0" - /* _mesa_function_pool[9537]: TextureMaterialEXT (dynamic) */ + /* _mesa_function_pool[9625]: TextureMaterialEXT (dynamic) */ "ii\0" "glTextureMaterialEXT\0" "\0" - /* _mesa_function_pool[9562]: DepthBoundsEXT (will be remapped) */ + /* _mesa_function_pool[9650]: DepthBoundsEXT (will be remapped) */ "dd\0" "glDepthBoundsEXT\0" "\0" - /* _mesa_function_pool[9583]: WindowPos3fv (will be remapped) */ + /* _mesa_function_pool[9671]: WindowPos3fv (will be remapped) */ "p\0" "glWindowPos3fv\0" "glWindowPos3fvARB\0" "glWindowPos3fvMESA\0" "\0" - /* _mesa_function_pool[9638]: BindVertexArrayAPPLE (will be remapped) */ + /* _mesa_function_pool[9726]: BindVertexArrayAPPLE (will be remapped) */ "i\0" "glBindVertexArrayAPPLE\0" "\0" - /* _mesa_function_pool[9664]: GetHistogramParameteriv (offset 363) */ + /* _mesa_function_pool[9752]: GetHistogramParameteriv (offset 363) */ "iip\0" "glGetHistogramParameteriv\0" "glGetHistogramParameterivEXT\0" "\0" - /* _mesa_function_pool[9724]: PointParameteriv (will be remapped) */ + /* _mesa_function_pool[9812]: PointParameteriv (will be remapped) */ "ip\0" "glPointParameteriv\0" "glPointParameterivNV\0" "\0" - /* _mesa_function_pool[9768]: NamedRenderbufferStorage (will be remapped) */ + /* _mesa_function_pool[9856]: NamedRenderbufferStorage (will be remapped) */ "iiii\0" "glNamedRenderbufferStorage\0" "\0" - /* _mesa_function_pool[9801]: GetProgramivARB (will be remapped) */ + /* _mesa_function_pool[9889]: GetProgramivARB (will be remapped) */ "iip\0" "glGetProgramivARB\0" "\0" - /* _mesa_function_pool[9824]: BindRenderbuffer (will be remapped) */ + /* _mesa_function_pool[9912]: BindRenderbuffer (will be remapped) */ "ii\0" "glBindRenderbuffer\0" "glBindRenderbufferOES\0" "\0" - /* _mesa_function_pool[9869]: SecondaryColor3fEXT (will be remapped) */ + /* _mesa_function_pool[9957]: SecondaryColor3fEXT (will be remapped) */ "fff\0" "glSecondaryColor3f\0" "glSecondaryColor3fEXT\0" "\0" - /* _mesa_function_pool[9915]: PrimitiveRestartIndex (will be remapped) */ + /* _mesa_function_pool[10003]: PrimitiveRestartIndex (will be remapped) */ "i\0" "glPrimitiveRestartIndex\0" "glPrimitiveRestartIndexNV\0" "\0" - /* _mesa_function_pool[9968]: VertexAttribI4ubv (will be remapped) */ + /* _mesa_function_pool[10056]: VertexAttribI4ubv (will be remapped) */ "ip\0" "glVertexAttribI4ubvEXT\0" "glVertexAttribI4ubv\0" "\0" - /* _mesa_function_pool[10015]: GetGraphicsResetStatusARB (will be remapped) */ + /* _mesa_function_pool[10103]: GetGraphicsResetStatusARB (will be remapped) */ "\0" "glGetGraphicsResetStatusARB\0" "glGetGraphicsResetStatus\0" "glGetGraphicsResetStatusKHR\0" "\0" - /* _mesa_function_pool[10098]: CreateRenderbuffers (will be remapped) */ + /* _mesa_function_pool[10186]: CreateRenderbuffers (will be remapped) */ "ip\0" "glCreateRenderbuffers\0" "\0" - /* _mesa_function_pool[10124]: ActiveStencilFaceEXT (will be remapped) */ + /* _mesa_function_pool[10212]: ActiveStencilFaceEXT (will be remapped) */ "i\0" "glActiveStencilFaceEXT\0" "\0" - /* _mesa_function_pool[10150]: VertexAttrib4dNV (will be remapped) */ + /* _mesa_function_pool[10238]: VertexAttrib4dNV (will be remapped) */ "idddd\0" "glVertexAttrib4dNV\0" "\0" - /* _mesa_function_pool[10176]: DepthRange (offset 288) */ + /* _mesa_function_pool[10264]: DepthRange (offset 288) */ "dd\0" "glDepthRange\0" "\0" - /* _mesa_function_pool[10193]: TexBumpParameterivATI (will be remapped) */ + /* _mesa_function_pool[10281]: TexBumpParameterivATI (will be remapped) */ "ip\0" "glTexBumpParameterivATI\0" "\0" - /* _mesa_function_pool[10221]: VertexAttrib4fNV (will be remapped) */ + /* _mesa_function_pool[10309]: VertexAttrib4fNV (will be remapped) */ "iffff\0" "glVertexAttrib4fNV\0" "\0" - /* _mesa_function_pool[10247]: Uniform4fv (will be remapped) */ + /* _mesa_function_pool[10335]: Uniform4fv (will be remapped) */ "iip\0" "glUniform4fv\0" "glUniform4fvARB\0" "\0" - /* _mesa_function_pool[10281]: DrawMeshArraysSUN (dynamic) */ + /* _mesa_function_pool[10369]: DrawMeshArraysSUN (dynamic) */ "iiii\0" "glDrawMeshArraysSUN\0" "\0" - /* _mesa_function_pool[10307]: SamplerParameterIiv (will be remapped) */ + /* _mesa_function_pool[10395]: SamplerParameterIiv (will be remapped) */ "iip\0" "glSamplerParameterIiv\0" "glSamplerParameterIivEXT\0" "glSamplerParameterIivOES\0" "\0" - /* _mesa_function_pool[10384]: GetMapControlPointsNV (dynamic) */ + /* _mesa_function_pool[10472]: GetMapControlPointsNV (dynamic) */ "iiiiiip\0" "glGetMapControlPointsNV\0" "\0" - /* _mesa_function_pool[10417]: SpriteParameterivSGIX (dynamic) */ + /* _mesa_function_pool[10505]: SpriteParameterivSGIX (dynamic) */ "ip\0" "glSpriteParameterivSGIX\0" "\0" - /* _mesa_function_pool[10445]: Frustumf (will be remapped) */ + /* _mesa_function_pool[10533]: Frustumf (will be remapped) */ "ffffff\0" "glFrustumfOES\0" "glFrustumf\0" "\0" - /* _mesa_function_pool[10478]: GetQueryBufferObjectui64v (will be remapped) */ + /* _mesa_function_pool[10566]: GetQueryBufferObjectui64v (will be remapped) */ "iiii\0" "glGetQueryBufferObjectui64v\0" "\0" - /* _mesa_function_pool[10512]: ProgramUniform2uiv (will be remapped) */ + /* _mesa_function_pool[10600]: ProgramUniform2uiv (will be remapped) */ "iiip\0" "glProgramUniform2uiv\0" "glProgramUniform2uivEXT\0" "\0" - /* _mesa_function_pool[10563]: Rectsv (offset 93) */ + /* _mesa_function_pool[10651]: Rectsv (offset 93) */ "pp\0" "glRectsv\0" "\0" - /* _mesa_function_pool[10576]: Frustumx (will be remapped) */ + /* _mesa_function_pool[10664]: Frustumx (will be remapped) */ "iiiiii\0" "glFrustumxOES\0" "glFrustumx\0" "\0" - /* _mesa_function_pool[10609]: CullFace (offset 152) */ + /* _mesa_function_pool[10697]: CullFace (offset 152) */ "i\0" "glCullFace\0" "\0" - /* _mesa_function_pool[10623]: BindTexture (offset 307) */ + /* _mesa_function_pool[10711]: BindTexture (offset 307) */ "ii\0" "glBindTexture\0" "glBindTextureEXT\0" "\0" - /* _mesa_function_pool[10658]: MultiTexCoord4fARB (offset 402) */ + /* _mesa_function_pool[10746]: MultiTexCoord4fARB (offset 402) */ "iffff\0" "glMultiTexCoord4f\0" "glMultiTexCoord4fARB\0" "\0" - /* _mesa_function_pool[10704]: MultiTexCoordP2uiv (will be remapped) */ + /* _mesa_function_pool[10792]: MultiTexCoordP2uiv (will be remapped) */ "iip\0" "glMultiTexCoordP2uiv\0" "\0" - /* _mesa_function_pool[10730]: BeginPerfQueryINTEL (will be remapped) */ + /* _mesa_function_pool[10818]: BeginPerfQueryINTEL (will be remapped) */ "i\0" "glBeginPerfQueryINTEL\0" "\0" - /* _mesa_function_pool[10755]: NormalPointer (offset 318) */ + /* _mesa_function_pool[10843]: NormalPointer (offset 318) */ "iip\0" "glNormalPointer\0" "\0" - /* _mesa_function_pool[10776]: TangentPointerEXT (dynamic) */ + /* _mesa_function_pool[10864]: TangentPointerEXT (dynamic) */ "iip\0" "glTangentPointerEXT\0" "\0" - /* _mesa_function_pool[10801]: WindowPos4iMESA (will be remapped) */ + /* _mesa_function_pool[10889]: WindowPos4iMESA (will be remapped) */ "iiii\0" "glWindowPos4iMESA\0" "\0" - /* _mesa_function_pool[10825]: ReferencePlaneSGIX (dynamic) */ + /* _mesa_function_pool[10913]: ReferencePlaneSGIX (dynamic) */ "p\0" "glReferencePlaneSGIX\0" "\0" - /* _mesa_function_pool[10849]: VertexAttrib4bv (will be remapped) */ + /* _mesa_function_pool[10937]: VertexAttrib4bv (will be remapped) */ "ip\0" "glVertexAttrib4bv\0" "glVertexAttrib4bvARB\0" "\0" - /* _mesa_function_pool[10892]: ReplacementCodeuivSUN (dynamic) */ + /* _mesa_function_pool[10980]: ReplacementCodeuivSUN (dynamic) */ "p\0" "glReplacementCodeuivSUN\0" "\0" - /* _mesa_function_pool[10919]: SecondaryColor3usv (will be remapped) */ + /* _mesa_function_pool[11007]: SecondaryColor3usv (will be remapped) */ "p\0" "glSecondaryColor3usv\0" "glSecondaryColor3usvEXT\0" "\0" - /* _mesa_function_pool[10967]: GetPixelMapuiv (offset 272) */ + /* _mesa_function_pool[11055]: GetPixelMapuiv (offset 272) */ "ip\0" "glGetPixelMapuiv\0" "\0" - /* _mesa_function_pool[10988]: MapNamedBuffer (will be remapped) */ + /* _mesa_function_pool[11076]: MapNamedBuffer (will be remapped) */ "ii\0" "glMapNamedBuffer\0" "\0" - /* _mesa_function_pool[11009]: Indexfv (offset 47) */ + /* _mesa_function_pool[11097]: Indexfv (offset 47) */ "p\0" "glIndexfv\0" "\0" - /* _mesa_function_pool[11022]: AlphaFragmentOp1ATI (will be remapped) */ + /* _mesa_function_pool[11110]: AlphaFragmentOp1ATI (will be remapped) */ "iiiiii\0" "glAlphaFragmentOp1ATI\0" "\0" - /* _mesa_function_pool[11052]: ListParameteriSGIX (dynamic) */ + /* _mesa_function_pool[11140]: ListParameteriSGIX (dynamic) */ "iii\0" "glListParameteriSGIX\0" "\0" - /* _mesa_function_pool[11078]: GetFloatv (offset 262) */ + /* _mesa_function_pool[11166]: GetFloatv (offset 262) */ "ip\0" "glGetFloatv\0" "\0" - /* _mesa_function_pool[11094]: ProgramUniform2dv (will be remapped) */ + /* _mesa_function_pool[11182]: ProgramUniform2dv (will be remapped) */ "iiip\0" "glProgramUniform2dv\0" "\0" - /* _mesa_function_pool[11120]: MultiTexCoord3i (offset 396) */ + /* _mesa_function_pool[11208]: MultiTexCoord3i (offset 396) */ "iiii\0" "glMultiTexCoord3i\0" "glMultiTexCoord3iARB\0" "\0" - /* _mesa_function_pool[11165]: ProgramUniform1fv (will be remapped) */ + /* _mesa_function_pool[11253]: ProgramUniform1fv (will be remapped) */ "iiip\0" "glProgramUniform1fv\0" "glProgramUniform1fvEXT\0" "\0" - /* _mesa_function_pool[11214]: MultiTexCoord3d (offset 392) */ + /* _mesa_function_pool[11302]: MultiTexCoord3d (offset 392) */ "iddd\0" "glMultiTexCoord3d\0" "glMultiTexCoord3dARB\0" "\0" - /* _mesa_function_pool[11259]: TexCoord3sv (offset 117) */ + /* _mesa_function_pool[11347]: TexCoord3sv (offset 117) */ "p\0" "glTexCoord3sv\0" "\0" - /* _mesa_function_pool[11276]: Fogfv (offset 154) */ + /* _mesa_function_pool[11364]: Fogfv (offset 154) */ "ip\0" "glFogfv\0" "\0" - /* _mesa_function_pool[11288]: Minmax (offset 368) */ + /* _mesa_function_pool[11376]: Minmax (offset 368) */ "iii\0" "glMinmax\0" "glMinmaxEXT\0" "\0" - /* _mesa_function_pool[11314]: MultiTexCoord3s (offset 398) */ + /* _mesa_function_pool[11402]: MultiTexCoord3s (offset 398) */ "iiii\0" "glMultiTexCoord3s\0" "glMultiTexCoord3sARB\0" "\0" - /* _mesa_function_pool[11359]: FinishTextureSUNX (dynamic) */ + /* _mesa_function_pool[11447]: FinishTextureSUNX (dynamic) */ "\0" "glFinishTextureSUNX\0" "\0" - /* _mesa_function_pool[11381]: GetFinalCombinerInputParameterfvNV (dynamic) */ + /* _mesa_function_pool[11469]: GetFinalCombinerInputParameterfvNV (dynamic) */ "iip\0" "glGetFinalCombinerInputParameterfvNV\0" "\0" - /* _mesa_function_pool[11423]: PollInstrumentsSGIX (dynamic) */ + /* _mesa_function_pool[11511]: PollInstrumentsSGIX (dynamic) */ "p\0" "glPollInstrumentsSGIX\0" "\0" - /* _mesa_function_pool[11448]: Vertex4iv (offset 147) */ + /* _mesa_function_pool[11536]: Vertex4iv (offset 147) */ "p\0" "glVertex4iv\0" "\0" - /* _mesa_function_pool[11463]: BufferSubData (will be remapped) */ + /* _mesa_function_pool[11551]: BufferSubData (will be remapped) */ "iiip\0" "glBufferSubData\0" "glBufferSubDataARB\0" "\0" - /* _mesa_function_pool[11504]: AlphaFragmentOp3ATI (will be remapped) */ + /* _mesa_function_pool[11592]: AlphaFragmentOp3ATI (will be remapped) */ "iiiiiiiiiiii\0" "glAlphaFragmentOp3ATI\0" "\0" - /* _mesa_function_pool[11540]: Normal3fVertex3fSUN (dynamic) */ + /* _mesa_function_pool[11628]: Normal3fVertex3fSUN (dynamic) */ "ffffff\0" "glNormal3fVertex3fSUN\0" "\0" - /* _mesa_function_pool[11570]: Begin (offset 7) */ + /* _mesa_function_pool[11658]: Begin (offset 7) */ "i\0" "glBegin\0" "\0" - /* _mesa_function_pool[11581]: LightModeli (offset 165) */ + /* _mesa_function_pool[11669]: LightModeli (offset 165) */ "ii\0" "glLightModeli\0" "\0" - /* _mesa_function_pool[11599]: UniformMatrix2fv (will be remapped) */ + /* _mesa_function_pool[11687]: UniformMatrix2fv (will be remapped) */ "iiip\0" "glUniformMatrix2fv\0" "glUniformMatrix2fvARB\0" "\0" - /* _mesa_function_pool[11646]: LightModelf (offset 163) */ + /* _mesa_function_pool[11734]: LightModelf (offset 163) */ "if\0" "glLightModelf\0" "\0" - /* _mesa_function_pool[11664]: GetTexParameterfv (offset 282) */ + /* _mesa_function_pool[11752]: GetTexParameterfv (offset 282) */ "iip\0" "glGetTexParameterfv\0" "\0" - /* _mesa_function_pool[11689]: TextureStorage1D (will be remapped) */ + /* _mesa_function_pool[11777]: TextureStorage1D (will be remapped) */ "iiii\0" "glTextureStorage1D\0" "\0" - /* _mesa_function_pool[11714]: BinormalPointerEXT (dynamic) */ + /* _mesa_function_pool[11802]: BinormalPointerEXT (dynamic) */ "iip\0" "glBinormalPointerEXT\0" "\0" - /* _mesa_function_pool[11740]: GetCombinerInputParameterivNV (dynamic) */ + /* _mesa_function_pool[11828]: GetCombinerInputParameterivNV (dynamic) */ "iiiip\0" "glGetCombinerInputParameterivNV\0" "\0" - /* _mesa_function_pool[11779]: DeleteAsyncMarkersSGIX (dynamic) */ + /* _mesa_function_pool[11867]: DeleteAsyncMarkersSGIX (dynamic) */ "ii\0" "glDeleteAsyncMarkersSGIX\0" "\0" - /* _mesa_function_pool[11808]: MultiTexCoord2fvARB (offset 387) */ + /* _mesa_function_pool[11896]: MultiTexCoord2fvARB (offset 387) */ "ip\0" "glMultiTexCoord2fv\0" "glMultiTexCoord2fvARB\0" "\0" - /* _mesa_function_pool[11853]: VertexAttrib4ubv (will be remapped) */ + /* _mesa_function_pool[11941]: VertexAttrib4ubv (will be remapped) */ "ip\0" "glVertexAttrib4ubv\0" "glVertexAttrib4ubvARB\0" "\0" - /* _mesa_function_pool[11898]: GetnTexImageARB (will be remapped) */ + /* _mesa_function_pool[11986]: GetnTexImageARB (will be remapped) */ "iiiiip\0" "glGetnTexImageARB\0" "\0" - /* _mesa_function_pool[11924]: ColorMask (offset 210) */ + /* _mesa_function_pool[12012]: ColorMask (offset 210) */ "iiii\0" "glColorMask\0" "\0" - /* _mesa_function_pool[11942]: GenAsyncMarkersSGIX (dynamic) */ + /* _mesa_function_pool[12030]: GenAsyncMarkersSGIX (dynamic) */ "i\0" "glGenAsyncMarkersSGIX\0" "\0" - /* _mesa_function_pool[11967]: MultiTexCoord4x (will be remapped) */ + /* _mesa_function_pool[12055]: MultiTexCoord4x (will be remapped) */ "iiiii\0" "glMultiTexCoord4xOES\0" "glMultiTexCoord4x\0" "\0" - /* _mesa_function_pool[12013]: ReplacementCodeuiVertex3fSUN (dynamic) */ + /* _mesa_function_pool[12101]: ReplacementCodeuiVertex3fSUN (dynamic) */ "ifff\0" "glReplacementCodeuiVertex3fSUN\0" "\0" - /* _mesa_function_pool[12050]: VertexAttribs4svNV (will be remapped) */ + /* _mesa_function_pool[12138]: VertexAttribs4svNV (will be remapped) */ "iip\0" "glVertexAttribs4svNV\0" "\0" - /* _mesa_function_pool[12076]: DrawElementsInstancedBaseInstance (will be remapped) */ + /* _mesa_function_pool[12164]: DrawElementsInstancedBaseInstance (will be remapped) */ "iiipii\0" "glDrawElementsInstancedBaseInstance\0" "glDrawElementsInstancedBaseInstanceEXT\0" "\0" - /* _mesa_function_pool[12159]: UniformMatrix4fv (will be remapped) */ + /* _mesa_function_pool[12247]: UniformMatrix4fv (will be remapped) */ "iiip\0" "glUniformMatrix4fv\0" "glUniformMatrix4fvARB\0" "\0" - /* _mesa_function_pool[12206]: UniformMatrix3x2fv (will be remapped) */ + /* _mesa_function_pool[12294]: UniformMatrix3x2fv (will be remapped) */ "iiip\0" "glUniformMatrix3x2fv\0" "\0" - /* _mesa_function_pool[12233]: VertexAttrib4Nuiv (will be remapped) */ + /* _mesa_function_pool[12321]: VertexAttrib4Nuiv (will be remapped) */ "ip\0" "glVertexAttrib4Nuiv\0" "glVertexAttrib4NuivARB\0" "\0" - /* _mesa_function_pool[12280]: ClientActiveTexture (offset 375) */ + /* _mesa_function_pool[12368]: ClientActiveTexture (offset 375) */ "i\0" "glClientActiveTexture\0" "glClientActiveTextureARB\0" "\0" - /* _mesa_function_pool[12330]: GetUniformIndices (will be remapped) */ + /* _mesa_function_pool[12418]: GetUniformIndices (will be remapped) */ "iipp\0" "glGetUniformIndices\0" "\0" - /* _mesa_function_pool[12356]: GetTexBumpParameterivATI (will be remapped) */ + /* _mesa_function_pool[12444]: GetTexBumpParameterivATI (will be remapped) */ "ip\0" "glGetTexBumpParameterivATI\0" "\0" - /* _mesa_function_pool[12387]: Binormal3bEXT (dynamic) */ + /* _mesa_function_pool[12475]: Binormal3bEXT (dynamic) */ "iii\0" "glBinormal3bEXT\0" "\0" - /* _mesa_function_pool[12408]: CombinerParameterivNV (dynamic) */ + /* _mesa_function_pool[12496]: CombinerParameterivNV (dynamic) */ "ip\0" "glCombinerParameterivNV\0" "\0" - /* _mesa_function_pool[12436]: MultiTexCoord2sv (offset 391) */ + /* _mesa_function_pool[12524]: MultiTexCoord2sv (offset 391) */ "ip\0" "glMultiTexCoord2sv\0" "glMultiTexCoord2svARB\0" "\0" - /* _mesa_function_pool[12481]: NamedBufferStorage (will be remapped) */ + /* _mesa_function_pool[12569]: NamedBufferStorage (will be remapped) */ "iipi\0" "glNamedBufferStorage\0" "\0" - /* _mesa_function_pool[12508]: NamedFramebufferDrawBuffer (will be remapped) */ + /* _mesa_function_pool[12596]: NamedFramebufferDrawBuffer (will be remapped) */ "ii\0" "glNamedFramebufferDrawBuffer\0" "\0" - /* _mesa_function_pool[12541]: NamedFramebufferTextureLayer (will be remapped) */ + /* _mesa_function_pool[12629]: NamedFramebufferTextureLayer (will be remapped) */ "iiiii\0" "glNamedFramebufferTextureLayer\0" "\0" - /* _mesa_function_pool[12579]: LoadIdentity (offset 290) */ + /* _mesa_function_pool[12667]: LoadIdentity (offset 290) */ "\0" "glLoadIdentity\0" "\0" - /* _mesa_function_pool[12596]: ActiveShaderProgram (will be remapped) */ + /* _mesa_function_pool[12684]: ActiveShaderProgram (will be remapped) */ "ii\0" "glActiveShaderProgram\0" "glActiveShaderProgramEXT\0" "\0" - /* _mesa_function_pool[12647]: BindImageTextures (will be remapped) */ + /* _mesa_function_pool[12735]: BindImageTextures (will be remapped) */ "iip\0" "glBindImageTextures\0" "\0" - /* _mesa_function_pool[12672]: DeleteTransformFeedbacks (will be remapped) */ + /* _mesa_function_pool[12760]: DeleteTransformFeedbacks (will be remapped) */ "ip\0" "glDeleteTransformFeedbacks\0" "\0" - /* _mesa_function_pool[12703]: VertexAttrib4ubvNV (will be remapped) */ + /* _mesa_function_pool[12791]: VertexAttrib4ubvNV (will be remapped) */ "ip\0" "glVertexAttrib4ubvNV\0" "\0" - /* _mesa_function_pool[12728]: FogCoordfEXT (will be remapped) */ + /* _mesa_function_pool[12816]: FogCoordfEXT (will be remapped) */ "f\0" "glFogCoordf\0" "glFogCoordfEXT\0" "\0" - /* _mesa_function_pool[12758]: GetMapfv (offset 267) */ + /* _mesa_function_pool[12846]: GetMapfv (offset 267) */ "iip\0" "glGetMapfv\0" "\0" - /* _mesa_function_pool[12774]: GetProgramInfoLog (will be remapped) */ + /* _mesa_function_pool[12862]: GetProgramInfoLog (will be remapped) */ "iipp\0" "glGetProgramInfoLog\0" "\0" - /* _mesa_function_pool[12800]: BindTransformFeedback (will be remapped) */ + /* _mesa_function_pool[12888]: BindTransformFeedback (will be remapped) */ "ii\0" "glBindTransformFeedback\0" "\0" - /* _mesa_function_pool[12828]: TexCoord4fColor4fNormal3fVertex4fvSUN (dynamic) */ + /* _mesa_function_pool[12916]: TexCoord4fColor4fNormal3fVertex4fvSUN (dynamic) */ "pppp\0" "glTexCoord4fColor4fNormal3fVertex4fvSUN\0" "\0" - /* _mesa_function_pool[12874]: GetPixelMapfv (offset 271) */ + /* _mesa_function_pool[12962]: GetPixelMapfv (offset 271) */ "ip\0" "glGetPixelMapfv\0" "\0" - /* _mesa_function_pool[12894]: TextureBufferRange (will be remapped) */ + /* _mesa_function_pool[12982]: TextureBufferRange (will be remapped) */ "iiiii\0" "glTextureBufferRange\0" "\0" - /* _mesa_function_pool[12922]: WeightivARB (dynamic) */ + /* _mesa_function_pool[13010]: WeightivARB (dynamic) */ "ip\0" "glWeightivARB\0" "\0" - /* _mesa_function_pool[12940]: VertexAttrib4svNV (will be remapped) */ + /* _mesa_function_pool[13028]: VertexAttrib4svNV (will be remapped) */ "ip\0" "glVertexAttrib4svNV\0" "\0" - /* _mesa_function_pool[12964]: PatchParameteri (will be remapped) */ + /* _mesa_function_pool[13052]: PatchParameteri (will be remapped) */ "ii\0" "glPatchParameteri\0" + "glPatchParameteriEXT\0" + "glPatchParameteriOES\0" "\0" - /* _mesa_function_pool[12986]: ReplacementCodeuiTexCoord2fVertex3fSUN (dynamic) */ + /* _mesa_function_pool[13116]: ReplacementCodeuiTexCoord2fVertex3fSUN (dynamic) */ "ifffff\0" "glReplacementCodeuiTexCoord2fVertex3fSUN\0" "\0" - /* _mesa_function_pool[13035]: GetNamedBufferSubData (will be remapped) */ + /* _mesa_function_pool[13165]: GetNamedBufferSubData (will be remapped) */ "iiip\0" "glGetNamedBufferSubData\0" "\0" - /* _mesa_function_pool[13065]: VDPAUSurfaceAccessNV (will be remapped) */ + /* _mesa_function_pool[13195]: VDPAUSurfaceAccessNV (will be remapped) */ "ii\0" "glVDPAUSurfaceAccessNV\0" "\0" - /* _mesa_function_pool[13092]: EdgeFlagPointer (offset 312) */ + /* _mesa_function_pool[13222]: EdgeFlagPointer (offset 312) */ "ip\0" "glEdgeFlagPointer\0" "\0" - /* _mesa_function_pool[13114]: WindowPos2f (will be remapped) */ + /* _mesa_function_pool[13244]: WindowPos2f (will be remapped) */ "ff\0" "glWindowPos2f\0" "glWindowPos2fARB\0" "glWindowPos2fMESA\0" "\0" - /* _mesa_function_pool[13167]: WindowPos2d (will be remapped) */ + /* _mesa_function_pool[13297]: WindowPos2d (will be remapped) */ "dd\0" "glWindowPos2d\0" "glWindowPos2dARB\0" "glWindowPos2dMESA\0" "\0" - /* _mesa_function_pool[13220]: GetVertexAttribLdv (will be remapped) */ + /* _mesa_function_pool[13350]: GetVertexAttribLdv (will be remapped) */ "iip\0" "glGetVertexAttribLdv\0" "\0" - /* _mesa_function_pool[13246]: WindowPos2i (will be remapped) */ + /* _mesa_function_pool[13376]: WindowPos2i (will be remapped) */ "ii\0" "glWindowPos2i\0" "glWindowPos2iARB\0" "glWindowPos2iMESA\0" "\0" - /* _mesa_function_pool[13299]: WindowPos2s (will be remapped) */ + /* _mesa_function_pool[13429]: WindowPos2s (will be remapped) */ "ii\0" "glWindowPos2s\0" "glWindowPos2sARB\0" "glWindowPos2sMESA\0" "\0" - /* _mesa_function_pool[13352]: VertexAttribI1uiEXT (will be remapped) */ + /* _mesa_function_pool[13482]: VertexAttribI1uiEXT (will be remapped) */ "ii\0" "glVertexAttribI1uiEXT\0" "glVertexAttribI1ui\0" "\0" - /* _mesa_function_pool[13397]: DeleteSync (will be remapped) */ + /* _mesa_function_pool[13527]: DeleteSync (will be remapped) */ "i\0" "glDeleteSync\0" "\0" - /* _mesa_function_pool[13413]: WindowPos4fvMESA (will be remapped) */ + /* _mesa_function_pool[13543]: WindowPos4fvMESA (will be remapped) */ "p\0" "glWindowPos4fvMESA\0" "\0" - /* _mesa_function_pool[13435]: CompressedTexImage3D (will be remapped) */ + /* _mesa_function_pool[13565]: CompressedTexImage3D (will be remapped) */ "iiiiiiiip\0" "glCompressedTexImage3D\0" "glCompressedTexImage3DARB\0" "glCompressedTexImage3DOES\0" "\0" - /* _mesa_function_pool[13521]: VertexAttribI1uiv (will be remapped) */ + /* _mesa_function_pool[13651]: VertexAttribI1uiv (will be remapped) */ "ip\0" "glVertexAttribI1uivEXT\0" "glVertexAttribI1uiv\0" "\0" - /* _mesa_function_pool[13568]: SecondaryColor3dv (will be remapped) */ + /* _mesa_function_pool[13698]: SecondaryColor3dv (will be remapped) */ "p\0" "glSecondaryColor3dv\0" "glSecondaryColor3dvEXT\0" "\0" - /* _mesa_function_pool[13614]: GetListParameterivSGIX (dynamic) */ + /* _mesa_function_pool[13744]: GetListParameterivSGIX (dynamic) */ "iip\0" "glGetListParameterivSGIX\0" "\0" - /* _mesa_function_pool[13644]: GetnPixelMapusvARB (will be remapped) */ + /* _mesa_function_pool[13774]: GetnPixelMapusvARB (will be remapped) */ "iip\0" "glGetnPixelMapusvARB\0" "\0" - /* _mesa_function_pool[13670]: VertexAttrib3s (will be remapped) */ + /* _mesa_function_pool[13800]: VertexAttrib3s (will be remapped) */ "iiii\0" "glVertexAttrib3s\0" "glVertexAttrib3sARB\0" "\0" - /* _mesa_function_pool[13713]: UniformMatrix4x3fv (will be remapped) */ + /* _mesa_function_pool[13843]: UniformMatrix4x3fv (will be remapped) */ "iiip\0" "glUniformMatrix4x3fv\0" "\0" - /* _mesa_function_pool[13740]: Binormal3dEXT (dynamic) */ + /* _mesa_function_pool[13870]: Binormal3dEXT (dynamic) */ "ddd\0" "glBinormal3dEXT\0" "\0" - /* _mesa_function_pool[13761]: GetQueryiv (will be remapped) */ + /* _mesa_function_pool[13891]: GetQueryiv (will be remapped) */ "iip\0" "glGetQueryiv\0" "glGetQueryivARB\0" "\0" - /* _mesa_function_pool[13795]: VertexAttrib3d (will be remapped) */ + /* _mesa_function_pool[13925]: VertexAttrib3d (will be remapped) */ "iddd\0" "glVertexAttrib3d\0" "glVertexAttrib3dARB\0" "\0" - /* _mesa_function_pool[13838]: ImageTransformParameterfHP (dynamic) */ + /* _mesa_function_pool[13968]: ImageTransformParameterfHP (dynamic) */ "iif\0" "glImageTransformParameterfHP\0" "\0" - /* _mesa_function_pool[13872]: MapNamedBufferRange (will be remapped) */ + /* _mesa_function_pool[14002]: MapNamedBufferRange (will be remapped) */ "iiii\0" "glMapNamedBufferRange\0" "\0" - /* _mesa_function_pool[13900]: MapBuffer (will be remapped) */ + /* _mesa_function_pool[14030]: MapBuffer (will be remapped) */ "ii\0" "glMapBuffer\0" "glMapBufferARB\0" "glMapBufferOES\0" "\0" - /* _mesa_function_pool[13946]: GetProgramStageiv (will be remapped) */ + /* _mesa_function_pool[14076]: GetProgramStageiv (will be remapped) */ "iiip\0" "glGetProgramStageiv\0" "\0" - /* _mesa_function_pool[13972]: VertexAttrib4Nbv (will be remapped) */ + /* _mesa_function_pool[14102]: VertexAttrib4Nbv (will be remapped) */ "ip\0" "glVertexAttrib4Nbv\0" "glVertexAttrib4NbvARB\0" "\0" - /* _mesa_function_pool[14017]: ProgramBinary (will be remapped) */ + /* _mesa_function_pool[14147]: ProgramBinary (will be remapped) */ "iipi\0" "glProgramBinary\0" "glProgramBinaryOES\0" "\0" - /* _mesa_function_pool[14058]: InvalidateTexImage (will be remapped) */ + /* _mesa_function_pool[14188]: InvalidateTexImage (will be remapped) */ "ii\0" "glInvalidateTexImage\0" "\0" - /* _mesa_function_pool[14083]: Uniform4ui (will be remapped) */ + /* _mesa_function_pool[14213]: Uniform4ui (will be remapped) */ "iiiii\0" "glUniform4uiEXT\0" "glUniform4ui\0" "\0" - /* _mesa_function_pool[14119]: VertexArrayAttribFormat (will be remapped) */ + /* _mesa_function_pool[14249]: VertexArrayAttribFormat (will be remapped) */ "iiiiii\0" "glVertexArrayAttribFormat\0" "\0" - /* _mesa_function_pool[14153]: VertexAttrib1fARB (will be remapped) */ + /* _mesa_function_pool[14283]: VertexAttrib1fARB (will be remapped) */ "if\0" "glVertexAttrib1f\0" "glVertexAttrib1fARB\0" "\0" - /* _mesa_function_pool[14194]: GetBooleani_v (will be remapped) */ + /* _mesa_function_pool[14324]: GetBooleani_v (will be remapped) */ "iip\0" "glGetBooleanIndexedvEXT\0" "glGetBooleani_v\0" "\0" - /* _mesa_function_pool[14239]: DrawTexsOES (will be remapped) */ + /* _mesa_function_pool[14369]: DrawTexsOES (will be remapped) */ "iiiii\0" "glDrawTexsOES\0" "\0" - /* _mesa_function_pool[14260]: GetObjectPtrLabel (will be remapped) */ + /* _mesa_function_pool[14390]: GetObjectPtrLabel (will be remapped) */ "pipp\0" "glGetObjectPtrLabel\0" "glGetObjectPtrLabelKHR\0" "\0" - /* _mesa_function_pool[14309]: ProgramParameteri (will be remapped) */ + /* _mesa_function_pool[14439]: ProgramParameteri (will be remapped) */ "iii\0" "glProgramParameteri\0" "glProgramParameteriEXT\0" "\0" - /* _mesa_function_pool[14357]: SecondaryColorPointerListIBM (dynamic) */ + /* _mesa_function_pool[14487]: SecondaryColorPointerListIBM (dynamic) */ "iiipi\0" "glSecondaryColorPointerListIBM\0" "\0" - /* _mesa_function_pool[14395]: Color3fv (offset 14) */ + /* _mesa_function_pool[14525]: Color3fv (offset 14) */ "p\0" "glColor3fv\0" "\0" - /* _mesa_function_pool[14409]: ReplacementCodeubSUN (dynamic) */ + /* _mesa_function_pool[14539]: ReplacementCodeubSUN (dynamic) */ "i\0" "glReplacementCodeubSUN\0" "\0" - /* _mesa_function_pool[14435]: GetnMapfvARB (will be remapped) */ + /* _mesa_function_pool[14565]: GetnMapfvARB (will be remapped) */ "iiip\0" "glGetnMapfvARB\0" "\0" - /* _mesa_function_pool[14456]: MultiTexCoord2i (offset 388) */ + /* _mesa_function_pool[14586]: MultiTexCoord2i (offset 388) */ "iii\0" "glMultiTexCoord2i\0" "glMultiTexCoord2iARB\0" "\0" - /* _mesa_function_pool[14500]: MultiTexCoord2d (offset 384) */ + /* _mesa_function_pool[14630]: MultiTexCoord2d (offset 384) */ "idd\0" "glMultiTexCoord2d\0" "glMultiTexCoord2dARB\0" "\0" - /* _mesa_function_pool[14544]: SamplerParameterIuiv (will be remapped) */ + /* _mesa_function_pool[14674]: SamplerParameterIuiv (will be remapped) */ "iip\0" "glSamplerParameterIuiv\0" "glSamplerParameterIuivEXT\0" "glSamplerParameterIuivOES\0" "\0" - /* _mesa_function_pool[14624]: MultiTexCoord2s (offset 390) */ + /* _mesa_function_pool[14754]: MultiTexCoord2s (offset 390) */ "iii\0" "glMultiTexCoord2s\0" "glMultiTexCoord2sARB\0" "\0" - /* _mesa_function_pool[14668]: GetInternalformati64v (will be remapped) */ + /* _mesa_function_pool[14798]: GetInternalformati64v (will be remapped) */ "iiiip\0" "glGetInternalformati64v\0" "\0" - /* _mesa_function_pool[14699]: VDPAURegisterVideoSurfaceNV (will be remapped) */ + /* _mesa_function_pool[14829]: VDPAURegisterVideoSurfaceNV (will be remapped) */ "piip\0" "glVDPAURegisterVideoSurfaceNV\0" "\0" - /* _mesa_function_pool[14735]: TexCoord2fColor4fNormal3fVertex3fSUN (dynamic) */ + /* _mesa_function_pool[14865]: TexCoord2fColor4fNormal3fVertex3fSUN (dynamic) */ "ffffffffffff\0" "glTexCoord2fColor4fNormal3fVertex3fSUN\0" "\0" - /* _mesa_function_pool[14788]: Indexub (offset 315) */ + /* _mesa_function_pool[14918]: Indexub (offset 315) */ "i\0" "glIndexub\0" "\0" - /* _mesa_function_pool[14801]: GetPerfMonitorCounterDataAMD (will be remapped) */ + /* _mesa_function_pool[14931]: GetPerfMonitorCounterDataAMD (will be remapped) */ "iiipp\0" "glGetPerfMonitorCounterDataAMD\0" "\0" - /* _mesa_function_pool[14839]: MultTransposeMatrixf (will be remapped) */ + /* _mesa_function_pool[14969]: MultTransposeMatrixf (will be remapped) */ "p\0" "glMultTransposeMatrixf\0" "glMultTransposeMatrixfARB\0" "\0" - /* _mesa_function_pool[14891]: PolygonOffsetEXT (will be remapped) */ + /* _mesa_function_pool[15021]: PolygonOffsetEXT (will be remapped) */ "ff\0" "glPolygonOffsetEXT\0" "\0" - /* _mesa_function_pool[14914]: Scalex (will be remapped) */ + /* _mesa_function_pool[15044]: Scalex (will be remapped) */ "iii\0" "glScalexOES\0" "glScalex\0" "\0" - /* _mesa_function_pool[14940]: Scaled (offset 301) */ + /* _mesa_function_pool[15070]: Scaled (offset 301) */ "ddd\0" "glScaled\0" "\0" - /* _mesa_function_pool[14954]: Scalef (offset 302) */ + /* _mesa_function_pool[15084]: Scalef (offset 302) */ "fff\0" "glScalef\0" "\0" - /* _mesa_function_pool[14968]: IndexPointerEXT (will be remapped) */ + /* _mesa_function_pool[15098]: IndexPointerEXT (will be remapped) */ "iiip\0" "glIndexPointerEXT\0" "\0" - /* _mesa_function_pool[14992]: GetUniformfv (will be remapped) */ + /* _mesa_function_pool[15122]: GetUniformfv (will be remapped) */ "iip\0" "glGetUniformfv\0" "glGetUniformfvARB\0" "\0" - /* _mesa_function_pool[15030]: ColorFragmentOp2ATI (will be remapped) */ + /* _mesa_function_pool[15160]: ColorFragmentOp2ATI (will be remapped) */ "iiiiiiiiii\0" "glColorFragmentOp2ATI\0" "\0" - /* _mesa_function_pool[15064]: VertexAttrib2sNV (will be remapped) */ + /* _mesa_function_pool[15194]: VertexAttrib2sNV (will be remapped) */ "iii\0" "glVertexAttrib2sNV\0" "\0" - /* _mesa_function_pool[15088]: ReadPixels (offset 256) */ + /* _mesa_function_pool[15218]: ReadPixels (offset 256) */ "iiiiiip\0" "glReadPixels\0" "\0" - /* _mesa_function_pool[15110]: NormalPointerListIBM (dynamic) */ + /* _mesa_function_pool[15240]: NormalPointerListIBM (dynamic) */ "iipi\0" "glNormalPointerListIBM\0" "\0" - /* _mesa_function_pool[15139]: QueryCounter (will be remapped) */ + /* _mesa_function_pool[15269]: QueryCounter (will be remapped) */ "ii\0" "glQueryCounter\0" "\0" - /* _mesa_function_pool[15158]: NormalPointerEXT (will be remapped) */ + /* _mesa_function_pool[15288]: NormalPointerEXT (will be remapped) */ "iiip\0" "glNormalPointerEXT\0" "\0" - /* _mesa_function_pool[15183]: GetSubroutineIndex (will be remapped) */ + /* _mesa_function_pool[15313]: GetSubroutineIndex (will be remapped) */ "iip\0" "glGetSubroutineIndex\0" "\0" - /* _mesa_function_pool[15209]: ProgramUniform3iv (will be remapped) */ + /* _mesa_function_pool[15339]: ProgramUniform3iv (will be remapped) */ "iiip\0" "glProgramUniform3iv\0" "glProgramUniform3ivEXT\0" "\0" - /* _mesa_function_pool[15258]: ProgramUniformMatrix2dv (will be remapped) */ + /* _mesa_function_pool[15388]: ProgramUniformMatrix2dv (will be remapped) */ "iiiip\0" "glProgramUniformMatrix2dv\0" "\0" - /* _mesa_function_pool[15291]: ClearTexSubImage (will be remapped) */ + /* _mesa_function_pool[15421]: ClearTexSubImage (will be remapped) */ "iiiiiiiiiip\0" "glClearTexSubImage\0" "\0" - /* _mesa_function_pool[15323]: GetActiveUniformBlockName (will be remapped) */ + /* _mesa_function_pool[15453]: GetActiveUniformBlockName (will be remapped) */ "iiipp\0" "glGetActiveUniformBlockName\0" "\0" - /* _mesa_function_pool[15358]: DrawElementsBaseVertex (will be remapped) */ + /* _mesa_function_pool[15488]: DrawElementsBaseVertex (will be remapped) */ "iiipi\0" "glDrawElementsBaseVertex\0" "glDrawElementsBaseVertexEXT\0" "glDrawElementsBaseVertexOES\0" "\0" - /* _mesa_function_pool[15446]: RasterPos3iv (offset 75) */ + /* _mesa_function_pool[15576]: RasterPos3iv (offset 75) */ "p\0" "glRasterPos3iv\0" "\0" - /* _mesa_function_pool[15464]: ColorMaski (will be remapped) */ + /* _mesa_function_pool[15594]: ColorMaski (will be remapped) */ "iiiii\0" "glColorMaskIndexedEXT\0" "glColorMaski\0" "glColorMaskiEXT\0" "glColorMaskiOES\0" "\0" - /* _mesa_function_pool[15538]: Uniform2uiv (will be remapped) */ + /* _mesa_function_pool[15668]: Uniform2uiv (will be remapped) */ "iip\0" "glUniform2uivEXT\0" "glUniform2uiv\0" "\0" - /* _mesa_function_pool[15574]: RasterPos3s (offset 76) */ + /* _mesa_function_pool[15704]: RasterPos3s (offset 76) */ "iii\0" "glRasterPos3s\0" "\0" - /* _mesa_function_pool[15593]: RasterPos3d (offset 70) */ + /* _mesa_function_pool[15723]: RasterPos3d (offset 70) */ "ddd\0" "glRasterPos3d\0" "\0" - /* _mesa_function_pool[15612]: RasterPos3f (offset 72) */ + /* _mesa_function_pool[15742]: RasterPos3f (offset 72) */ "fff\0" "glRasterPos3f\0" "\0" - /* _mesa_function_pool[15631]: BindVertexArray (will be remapped) */ + /* _mesa_function_pool[15761]: BindVertexArray (will be remapped) */ "i\0" "glBindVertexArray\0" "glBindVertexArrayOES\0" "\0" - /* _mesa_function_pool[15673]: RasterPos3i (offset 74) */ + /* _mesa_function_pool[15803]: RasterPos3i (offset 74) */ "iii\0" "glRasterPos3i\0" "\0" - /* _mesa_function_pool[15692]: VertexAttribL3dv (will be remapped) */ + /* _mesa_function_pool[15822]: VertexAttribL3dv (will be remapped) */ "ip\0" "glVertexAttribL3dv\0" "\0" - /* _mesa_function_pool[15715]: GetTexParameteriv (offset 283) */ + /* _mesa_function_pool[15845]: GetTexParameteriv (offset 283) */ "iip\0" "glGetTexParameteriv\0" "\0" - /* _mesa_function_pool[15740]: DrawTransformFeedbackStreamInstanced (will be remapped) */ + /* _mesa_function_pool[15870]: DrawTransformFeedbackStreamInstanced (will be remapped) */ "iiii\0" "glDrawTransformFeedbackStreamInstanced\0" "\0" - /* _mesa_function_pool[15785]: VertexAttrib2fvARB (will be remapped) */ + /* _mesa_function_pool[15915]: VertexAttrib2fvARB (will be remapped) */ "ip\0" "glVertexAttrib2fv\0" "glVertexAttrib2fvARB\0" "\0" - /* _mesa_function_pool[15828]: VertexPointerListIBM (dynamic) */ + /* _mesa_function_pool[15958]: VertexPointerListIBM (dynamic) */ "iiipi\0" "glVertexPointerListIBM\0" "\0" - /* _mesa_function_pool[15858]: GetProgramResourceName (will be remapped) */ + /* _mesa_function_pool[15988]: GetProgramResourceName (will be remapped) */ "iiiipp\0" "glGetProgramResourceName\0" "\0" - /* _mesa_function_pool[15891]: TexCoord2fNormal3fVertex3fSUN (dynamic) */ + /* _mesa_function_pool[16021]: TexCoord2fNormal3fVertex3fSUN (dynamic) */ "ffffffff\0" "glTexCoord2fNormal3fVertex3fSUN\0" "\0" - /* _mesa_function_pool[15933]: ProgramUniformMatrix4x3dv (will be remapped) */ + /* _mesa_function_pool[16063]: ProgramUniformMatrix4x3dv (will be remapped) */ "iiiip\0" "glProgramUniformMatrix4x3dv\0" "\0" - /* _mesa_function_pool[15968]: IsFenceNV (dynamic) */ + /* _mesa_function_pool[16098]: IsFenceNV (dynamic) */ "i\0" "glIsFenceNV\0" "\0" - /* _mesa_function_pool[15983]: ColorTable (offset 339) */ + /* _mesa_function_pool[16113]: ColorTable (offset 339) */ "iiiiip\0" "glColorTable\0" "glColorTableSGI\0" "glColorTableEXT\0" "\0" - /* _mesa_function_pool[16036]: LoadName (offset 198) */ + /* _mesa_function_pool[16166]: LoadName (offset 198) */ "i\0" "glLoadName\0" "\0" - /* _mesa_function_pool[16050]: Color3fVertex3fSUN (dynamic) */ + /* _mesa_function_pool[16180]: Color3fVertex3fSUN (dynamic) */ "ffffff\0" "glColor3fVertex3fSUN\0" "\0" - /* _mesa_function_pool[16079]: GetnUniformuivARB (will be remapped) */ + /* _mesa_function_pool[16209]: GetnUniformuivARB (will be remapped) */ "iiip\0" "glGetnUniformuivARB\0" "glGetnUniformuiv\0" "glGetnUniformuivKHR\0" "\0" - /* _mesa_function_pool[16142]: ClearIndex (offset 205) */ + /* _mesa_function_pool[16272]: ClearIndex (offset 205) */ "f\0" "glClearIndex\0" "\0" - /* _mesa_function_pool[16158]: ConvolutionParameterfv (offset 351) */ + /* _mesa_function_pool[16288]: ConvolutionParameterfv (offset 351) */ "iip\0" "glConvolutionParameterfv\0" "glConvolutionParameterfvEXT\0" "\0" - /* _mesa_function_pool[16216]: TbufferMask3DFX (dynamic) */ + /* _mesa_function_pool[16346]: TbufferMask3DFX (dynamic) */ "i\0" "glTbufferMask3DFX\0" "\0" - /* _mesa_function_pool[16237]: GetTexGendv (offset 278) */ + /* _mesa_function_pool[16367]: GetTexGendv (offset 278) */ "iip\0" "glGetTexGendv\0" "\0" - /* _mesa_function_pool[16256]: FlushMappedNamedBufferRange (will be remapped) */ + /* _mesa_function_pool[16386]: FlushMappedNamedBufferRange (will be remapped) */ "iii\0" "glFlushMappedNamedBufferRange\0" "\0" - /* _mesa_function_pool[16291]: MultiTexCoordP1ui (will be remapped) */ + /* _mesa_function_pool[16421]: MultiTexCoordP1ui (will be remapped) */ "iii\0" "glMultiTexCoordP1ui\0" "\0" - /* _mesa_function_pool[16316]: EvalMesh2 (offset 238) */ + /* _mesa_function_pool[16446]: EvalMesh2 (offset 238) */ "iiiii\0" "glEvalMesh2\0" "\0" - /* _mesa_function_pool[16335]: Vertex4fv (offset 145) */ + /* _mesa_function_pool[16465]: Vertex4fv (offset 145) */ "p\0" "glVertex4fv\0" "\0" - /* _mesa_function_pool[16350]: SelectPerfMonitorCountersAMD (will be remapped) */ + /* _mesa_function_pool[16480]: SelectPerfMonitorCountersAMD (will be remapped) */ "iiiip\0" "glSelectPerfMonitorCountersAMD\0" "\0" - /* _mesa_function_pool[16388]: TextureStorage2D (will be remapped) */ + /* _mesa_function_pool[16518]: TextureStorage2D (will be remapped) */ "iiiii\0" "glTextureStorage2D\0" "\0" - /* _mesa_function_pool[16414]: GetTextureParameterIiv (will be remapped) */ + /* _mesa_function_pool[16544]: GetTextureParameterIiv (will be remapped) */ "iip\0" "glGetTextureParameterIiv\0" "\0" - /* _mesa_function_pool[16444]: BindFramebuffer (will be remapped) */ + /* _mesa_function_pool[16574]: BindFramebuffer (will be remapped) */ "ii\0" "glBindFramebuffer\0" "glBindFramebufferOES\0" "\0" - /* _mesa_function_pool[16487]: ReplacementCodeuiNormal3fVertex3fvSUN (dynamic) */ + /* _mesa_function_pool[16617]: ReplacementCodeuiNormal3fVertex3fvSUN (dynamic) */ "ppp\0" "glReplacementCodeuiNormal3fVertex3fvSUN\0" "\0" - /* _mesa_function_pool[16532]: GetMinmax (offset 364) */ + /* _mesa_function_pool[16662]: GetMinmax (offset 364) */ "iiiip\0" "glGetMinmax\0" "glGetMinmaxEXT\0" "\0" - /* _mesa_function_pool[16566]: Color3fVertex3fvSUN (dynamic) */ + /* _mesa_function_pool[16696]: Color3fVertex3fvSUN (dynamic) */ "pp\0" "glColor3fVertex3fvSUN\0" "\0" - /* _mesa_function_pool[16592]: VertexAttribs3svNV (will be remapped) */ + /* _mesa_function_pool[16722]: VertexAttribs3svNV (will be remapped) */ "iip\0" "glVertexAttribs3svNV\0" "\0" - /* _mesa_function_pool[16618]: GetActiveUniformsiv (will be remapped) */ + /* _mesa_function_pool[16748]: GetActiveUniformsiv (will be remapped) */ "iipip\0" "glGetActiveUniformsiv\0" "\0" - /* _mesa_function_pool[16647]: VertexAttrib2sv (will be remapped) */ + /* _mesa_function_pool[16777]: VertexAttrib2sv (will be remapped) */ "ip\0" "glVertexAttrib2sv\0" "glVertexAttrib2svARB\0" "\0" - /* _mesa_function_pool[16690]: GetProgramEnvParameterdvARB (will be remapped) */ + /* _mesa_function_pool[16820]: GetProgramEnvParameterdvARB (will be remapped) */ "iip\0" "glGetProgramEnvParameterdvARB\0" "\0" - /* _mesa_function_pool[16725]: GetSharpenTexFuncSGIS (dynamic) */ + /* _mesa_function_pool[16855]: GetSharpenTexFuncSGIS (dynamic) */ "ip\0" "glGetSharpenTexFuncSGIS\0" "\0" - /* _mesa_function_pool[16753]: Uniform1dv (will be remapped) */ + /* _mesa_function_pool[16883]: Uniform1dv (will be remapped) */ "iip\0" "glUniform1dv\0" "\0" - /* _mesa_function_pool[16771]: PixelTransformParameterfvEXT (dynamic) */ + /* _mesa_function_pool[16901]: PixelTransformParameterfvEXT (dynamic) */ "iip\0" "glPixelTransformParameterfvEXT\0" "\0" - /* _mesa_function_pool[16807]: TransformFeedbackBufferRange (will be remapped) */ + /* _mesa_function_pool[16937]: TransformFeedbackBufferRange (will be remapped) */ "iiiii\0" "glTransformFeedbackBufferRange\0" "\0" - /* _mesa_function_pool[16845]: PushDebugGroup (will be remapped) */ + /* _mesa_function_pool[16975]: PushDebugGroup (will be remapped) */ "iiip\0" "glPushDebugGroup\0" "glPushDebugGroupKHR\0" "\0" - /* _mesa_function_pool[16888]: ReplacementCodeuiNormal3fVertex3fSUN (dynamic) */ + /* _mesa_function_pool[17018]: ReplacementCodeuiNormal3fVertex3fSUN (dynamic) */ "iffffff\0" "glReplacementCodeuiNormal3fVertex3fSUN\0" "\0" - /* _mesa_function_pool[16936]: GetPerfMonitorGroupStringAMD (will be remapped) */ + /* _mesa_function_pool[17066]: GetPerfMonitorGroupStringAMD (will be remapped) */ "iipp\0" "glGetPerfMonitorGroupStringAMD\0" "\0" - /* _mesa_function_pool[16973]: GetError (offset 261) */ + /* _mesa_function_pool[17103]: GetError (offset 261) */ "\0" "glGetError\0" "\0" - /* _mesa_function_pool[16986]: PassThrough (offset 199) */ + /* _mesa_function_pool[17116]: PassThrough (offset 199) */ "f\0" "glPassThrough\0" "\0" - /* _mesa_function_pool[17003]: GetListParameterfvSGIX (dynamic) */ + /* _mesa_function_pool[17133]: GetListParameterfvSGIX (dynamic) */ "iip\0" "glGetListParameterfvSGIX\0" "\0" - /* _mesa_function_pool[17033]: PatchParameterfv (will be remapped) */ + /* _mesa_function_pool[17163]: PatchParameterfv (will be remapped) */ "ip\0" "glPatchParameterfv\0" "\0" - /* _mesa_function_pool[17056]: GetObjectParameterivAPPLE (will be remapped) */ + /* _mesa_function_pool[17186]: GetObjectParameterivAPPLE (will be remapped) */ "iiip\0" "glGetObjectParameterivAPPLE\0" "\0" - /* _mesa_function_pool[17090]: GlobalAlphaFactorubSUN (dynamic) */ + /* _mesa_function_pool[17220]: GlobalAlphaFactorubSUN (dynamic) */ "i\0" "glGlobalAlphaFactorubSUN\0" "\0" - /* _mesa_function_pool[17118]: BindBuffersRange (will be remapped) */ + /* _mesa_function_pool[17248]: BindBuffersRange (will be remapped) */ "iiippp\0" "glBindBuffersRange\0" "\0" - /* _mesa_function_pool[17145]: VertexAttrib4fvARB (will be remapped) */ + /* _mesa_function_pool[17275]: VertexAttrib4fvARB (will be remapped) */ "ip\0" "glVertexAttrib4fv\0" "glVertexAttrib4fvARB\0" "\0" - /* _mesa_function_pool[17188]: WindowPos3dv (will be remapped) */ + /* _mesa_function_pool[17318]: WindowPos3dv (will be remapped) */ "p\0" "glWindowPos3dv\0" "glWindowPos3dvARB\0" "glWindowPos3dvMESA\0" "\0" - /* _mesa_function_pool[17243]: TexGenxOES (will be remapped) */ + /* _mesa_function_pool[17373]: TexGenxOES (will be remapped) */ "iii\0" "glTexGenxOES\0" "\0" - /* _mesa_function_pool[17261]: VertexArrayAttribIFormat (will be remapped) */ + /* _mesa_function_pool[17391]: VertexArrayAttribIFormat (will be remapped) */ "iiiii\0" "glVertexArrayAttribIFormat\0" "\0" - /* _mesa_function_pool[17295]: DeleteFencesNV (dynamic) */ + /* _mesa_function_pool[17425]: DeleteFencesNV (dynamic) */ "ip\0" "glDeleteFencesNV\0" "\0" - /* _mesa_function_pool[17316]: GetImageTransformParameterivHP (dynamic) */ + /* _mesa_function_pool[17446]: GetImageTransformParameterivHP (dynamic) */ "iip\0" "glGetImageTransformParameterivHP\0" "\0" - /* _mesa_function_pool[17354]: StencilOp (offset 244) */ + /* _mesa_function_pool[17484]: StencilOp (offset 244) */ "iii\0" "glStencilOp\0" "\0" - /* _mesa_function_pool[17371]: Binormal3fEXT (dynamic) */ + /* _mesa_function_pool[17501]: Binormal3fEXT (dynamic) */ "fff\0" "glBinormal3fEXT\0" "\0" - /* _mesa_function_pool[17392]: ProgramUniform1iv (will be remapped) */ + /* _mesa_function_pool[17522]: ProgramUniform1iv (will be remapped) */ "iiip\0" "glProgramUniform1iv\0" "glProgramUniform1ivEXT\0" "\0" - /* _mesa_function_pool[17441]: ProgramUniform3ui (will be remapped) */ + /* _mesa_function_pool[17571]: ProgramUniform3ui (will be remapped) */ "iiiii\0" "glProgramUniform3ui\0" "glProgramUniform3uiEXT\0" "\0" - /* _mesa_function_pool[17491]: SecondaryColor3sv (will be remapped) */ + /* _mesa_function_pool[17621]: SecondaryColor3sv (will be remapped) */ "p\0" "glSecondaryColor3sv\0" "glSecondaryColor3svEXT\0" "\0" - /* _mesa_function_pool[17537]: TexCoordP3ui (will be remapped) */ + /* _mesa_function_pool[17667]: TexCoordP3ui (will be remapped) */ "ii\0" "glTexCoordP3ui\0" "\0" - /* _mesa_function_pool[17556]: VertexArrayElementBuffer (will be remapped) */ + /* _mesa_function_pool[17686]: VertexArrayElementBuffer (will be remapped) */ "ii\0" "glVertexArrayElementBuffer\0" "\0" - /* _mesa_function_pool[17587]: Fogxv (will be remapped) */ + /* _mesa_function_pool[17717]: Fogxv (will be remapped) */ "ip\0" "glFogxvOES\0" "glFogxv\0" "\0" - /* _mesa_function_pool[17610]: VertexPointervINTEL (dynamic) */ + /* _mesa_function_pool[17740]: VertexPointervINTEL (dynamic) */ "iip\0" "glVertexPointervINTEL\0" "\0" - /* _mesa_function_pool[17637]: VertexAttribP1ui (will be remapped) */ + /* _mesa_function_pool[17767]: VertexAttribP1ui (will be remapped) */ "iiii\0" "glVertexAttribP1ui\0" "\0" - /* _mesa_function_pool[17662]: DeleteLists (offset 4) */ + /* _mesa_function_pool[17792]: DeleteLists (offset 4) */ "ii\0" "glDeleteLists\0" "\0" - /* _mesa_function_pool[17680]: LogicOp (offset 242) */ + /* _mesa_function_pool[17810]: LogicOp (offset 242) */ "i\0" "glLogicOp\0" "\0" - /* _mesa_function_pool[17693]: RenderbufferStorageMultisample (will be remapped) */ + /* _mesa_function_pool[17823]: RenderbufferStorageMultisample (will be remapped) */ "iiiii\0" "glRenderbufferStorageMultisample\0" "glRenderbufferStorageMultisampleEXT\0" "\0" - /* _mesa_function_pool[17769]: GetTransformFeedbacki64_v (will be remapped) */ + /* _mesa_function_pool[17899]: GetTransformFeedbacki64_v (will be remapped) */ "iiip\0" "glGetTransformFeedbacki64_v\0" "\0" - /* _mesa_function_pool[17803]: WindowPos3d (will be remapped) */ + /* _mesa_function_pool[17933]: WindowPos3d (will be remapped) */ "ddd\0" "glWindowPos3d\0" "glWindowPos3dARB\0" "glWindowPos3dMESA\0" "\0" - /* _mesa_function_pool[17857]: Enablei (will be remapped) */ + /* _mesa_function_pool[17987]: Enablei (will be remapped) */ "ii\0" "glEnableIndexedEXT\0" "glEnablei\0" "glEnableiEXT\0" "glEnableiOES\0" "\0" - /* _mesa_function_pool[17916]: WindowPos3f (will be remapped) */ + /* _mesa_function_pool[18046]: WindowPos3f (will be remapped) */ "fff\0" "glWindowPos3f\0" "glWindowPos3fARB\0" "glWindowPos3fMESA\0" "\0" - /* _mesa_function_pool[17970]: GenProgramsARB (will be remapped) */ + /* _mesa_function_pool[18100]: GenProgramsARB (will be remapped) */ "ip\0" "glGenProgramsARB\0" "glGenProgramsNV\0" "\0" - /* _mesa_function_pool[18007]: RasterPos2sv (offset 69) */ + /* _mesa_function_pool[18137]: RasterPos2sv (offset 69) */ "p\0" "glRasterPos2sv\0" "\0" - /* _mesa_function_pool[18025]: WindowPos3i (will be remapped) */ + /* _mesa_function_pool[18155]: WindowPos3i (will be remapped) */ "iii\0" "glWindowPos3i\0" "glWindowPos3iARB\0" "glWindowPos3iMESA\0" "\0" - /* _mesa_function_pool[18079]: MultiTexCoord4iv (offset 405) */ + /* _mesa_function_pool[18209]: MultiTexCoord4iv (offset 405) */ "ip\0" "glMultiTexCoord4iv\0" "glMultiTexCoord4ivARB\0" "\0" - /* _mesa_function_pool[18124]: TexCoord1sv (offset 101) */ + /* _mesa_function_pool[18254]: TexCoord1sv (offset 101) */ "p\0" "glTexCoord1sv\0" "\0" - /* _mesa_function_pool[18141]: WindowPos3s (will be remapped) */ + /* _mesa_function_pool[18271]: WindowPos3s (will be remapped) */ "iii\0" "glWindowPos3s\0" "glWindowPos3sARB\0" "glWindowPos3sMESA\0" "\0" - /* _mesa_function_pool[18195]: PixelMapusv (offset 253) */ + /* _mesa_function_pool[18325]: PixelMapusv (offset 253) */ "iip\0" "glPixelMapusv\0" "\0" - /* _mesa_function_pool[18214]: DebugMessageInsert (will be remapped) */ + /* _mesa_function_pool[18344]: DebugMessageInsert (will be remapped) */ "iiiiip\0" "glDebugMessageInsertARB\0" "glDebugMessageInsert\0" "glDebugMessageInsertKHR\0" "\0" - /* _mesa_function_pool[18291]: Orthof (will be remapped) */ + /* _mesa_function_pool[18421]: Orthof (will be remapped) */ "ffffff\0" "glOrthofOES\0" "glOrthof\0" "\0" - /* _mesa_function_pool[18320]: CompressedTexImage2D (will be remapped) */ + /* _mesa_function_pool[18450]: CompressedTexImage2D (will be remapped) */ "iiiiiiip\0" "glCompressedTexImage2D\0" "glCompressedTexImage2DARB\0" "\0" - /* _mesa_function_pool[18379]: DeleteObjectARB (will be remapped) */ + /* _mesa_function_pool[18509]: DeleteObjectARB (will be remapped) */ "i\0" "glDeleteObjectARB\0" "\0" - /* _mesa_function_pool[18400]: ProgramUniformMatrix2x3dv (will be remapped) */ + /* _mesa_function_pool[18530]: ProgramUniformMatrix2x3dv (will be remapped) */ "iiiip\0" "glProgramUniformMatrix2x3dv\0" "\0" - /* _mesa_function_pool[18435]: GetVertexArrayiv (will be remapped) */ + /* _mesa_function_pool[18565]: GetVertexArrayiv (will be remapped) */ "iip\0" "glGetVertexArrayiv\0" "\0" - /* _mesa_function_pool[18459]: IsSync (will be remapped) */ + /* _mesa_function_pool[18589]: IsSync (will be remapped) */ "i\0" "glIsSync\0" "\0" - /* _mesa_function_pool[18471]: Color4uiv (offset 38) */ + /* _mesa_function_pool[18601]: Color4uiv (offset 38) */ "p\0" "glColor4uiv\0" "\0" - /* _mesa_function_pool[18486]: MultiTexCoord1sv (offset 383) */ + /* _mesa_function_pool[18616]: MultiTexCoord1sv (offset 383) */ "ip\0" "glMultiTexCoord1sv\0" "glMultiTexCoord1svARB\0" "\0" - /* _mesa_function_pool[18531]: Orthox (will be remapped) */ + /* _mesa_function_pool[18661]: Orthox (will be remapped) */ "iiiiii\0" "glOrthoxOES\0" "glOrthox\0" "\0" - /* _mesa_function_pool[18560]: PushAttrib (offset 219) */ + /* _mesa_function_pool[18690]: PushAttrib (offset 219) */ "i\0" "glPushAttrib\0" "\0" - /* _mesa_function_pool[18576]: RasterPos2i (offset 66) */ + /* _mesa_function_pool[18706]: RasterPos2i (offset 66) */ "ii\0" "glRasterPos2i\0" "\0" - /* _mesa_function_pool[18594]: ClipPlane (offset 150) */ + /* _mesa_function_pool[18724]: ClipPlane (offset 150) */ "ip\0" "glClipPlane\0" "\0" - /* _mesa_function_pool[18610]: TexCoord2fColor3fVertex3fSUN (dynamic) */ + /* _mesa_function_pool[18740]: TexCoord2fColor3fVertex3fSUN (dynamic) */ "ffffffff\0" "glTexCoord2fColor3fVertex3fSUN\0" "\0" - /* _mesa_function_pool[18651]: GetProgramivNV (will be remapped) */ + /* _mesa_function_pool[18781]: GetProgramivNV (will be remapped) */ "iip\0" "glGetProgramivNV\0" "\0" - /* _mesa_function_pool[18673]: RasterPos2f (offset 64) */ + /* _mesa_function_pool[18803]: RasterPos2f (offset 64) */ "ff\0" "glRasterPos2f\0" "\0" - /* _mesa_function_pool[18691]: GetActiveSubroutineUniformiv (will be remapped) */ + /* _mesa_function_pool[18821]: GetActiveSubroutineUniformiv (will be remapped) */ "iiiip\0" "glGetActiveSubroutineUniformiv\0" "\0" - /* _mesa_function_pool[18729]: RasterPos2d (offset 62) */ + /* _mesa_function_pool[18859]: RasterPos2d (offset 62) */ "dd\0" "glRasterPos2d\0" "\0" - /* _mesa_function_pool[18747]: RasterPos3fv (offset 73) */ + /* _mesa_function_pool[18877]: RasterPos3fv (offset 73) */ "p\0" "glRasterPos3fv\0" "\0" - /* _mesa_function_pool[18765]: InvalidateSubFramebuffer (will be remapped) */ + /* _mesa_function_pool[18895]: InvalidateSubFramebuffer (will be remapped) */ "iipiiii\0" "glInvalidateSubFramebuffer\0" "\0" - /* _mesa_function_pool[18801]: Color4ub (offset 35) */ + /* _mesa_function_pool[18931]: Color4ub (offset 35) */ "iiii\0" "glColor4ub\0" "\0" - /* _mesa_function_pool[18818]: UniformMatrix2x4dv (will be remapped) */ + /* _mesa_function_pool[18948]: UniformMatrix2x4dv (will be remapped) */ "iiip\0" "glUniformMatrix2x4dv\0" "\0" - /* _mesa_function_pool[18845]: RasterPos2s (offset 68) */ + /* _mesa_function_pool[18975]: RasterPos2s (offset 68) */ "ii\0" "glRasterPos2s\0" "\0" - /* _mesa_function_pool[18863]: VertexP2uiv (will be remapped) */ + /* _mesa_function_pool[18993]: DispatchComputeGroupSizeARB (will be remapped) */ + "iiiiii\0" + "glDispatchComputeGroupSizeARB\0" + "\0" + /* _mesa_function_pool[19031]: VertexP2uiv (will be remapped) */ "ip\0" "glVertexP2uiv\0" "\0" - /* _mesa_function_pool[18881]: Color4fNormal3fVertex3fvSUN (dynamic) */ + /* _mesa_function_pool[19049]: Color4fNormal3fVertex3fvSUN (dynamic) */ "ppp\0" "glColor4fNormal3fVertex3fvSUN\0" "\0" - /* _mesa_function_pool[18916]: VertexArrayBindingDivisor (will be remapped) */ + /* _mesa_function_pool[19084]: VertexArrayBindingDivisor (will be remapped) */ "iii\0" "glVertexArrayBindingDivisor\0" "\0" - /* _mesa_function_pool[18949]: GetVertexAttribivNV (will be remapped) */ + /* _mesa_function_pool[19117]: GetVertexAttribivNV (will be remapped) */ "iip\0" "glGetVertexAttribivNV\0" "\0" - /* _mesa_function_pool[18976]: TexSubImage4DSGIS (dynamic) */ + /* _mesa_function_pool[19144]: TexSubImage4DSGIS (dynamic) */ "iiiiiiiiiiiip\0" "glTexSubImage4DSGIS\0" "\0" - /* _mesa_function_pool[19011]: MultiTexCoord3dv (offset 393) */ + /* _mesa_function_pool[19179]: MultiTexCoord3dv (offset 393) */ "ip\0" "glMultiTexCoord3dv\0" "glMultiTexCoord3dvARB\0" "\0" - /* _mesa_function_pool[19056]: BindProgramPipeline (will be remapped) */ + /* _mesa_function_pool[19224]: BindProgramPipeline (will be remapped) */ "i\0" "glBindProgramPipeline\0" "glBindProgramPipelineEXT\0" "\0" - /* _mesa_function_pool[19106]: VertexAttribP4uiv (will be remapped) */ + /* _mesa_function_pool[19274]: VertexAttribP4uiv (will be remapped) */ "iiip\0" "glVertexAttribP4uiv\0" "\0" - /* _mesa_function_pool[19132]: DebugMessageCallback (will be remapped) */ + /* _mesa_function_pool[19300]: DebugMessageCallback (will be remapped) */ "pp\0" "glDebugMessageCallbackARB\0" "glDebugMessageCallback\0" "glDebugMessageCallbackKHR\0" "\0" - /* _mesa_function_pool[19211]: MultiTexCoord1i (offset 380) */ + /* _mesa_function_pool[19379]: MultiTexCoord1i (offset 380) */ "ii\0" "glMultiTexCoord1i\0" "glMultiTexCoord1iARB\0" "\0" - /* _mesa_function_pool[19254]: WindowPos2dv (will be remapped) */ + /* _mesa_function_pool[19422]: WindowPos2dv (will be remapped) */ "p\0" "glWindowPos2dv\0" "glWindowPos2dvARB\0" "glWindowPos2dvMESA\0" "\0" - /* _mesa_function_pool[19309]: TexParameterIuiv (will be remapped) */ + /* _mesa_function_pool[19477]: TexParameterIuiv (will be remapped) */ "iip\0" "glTexParameterIuivEXT\0" "glTexParameterIuiv\0" "glTexParameterIuivOES\0" "\0" - /* _mesa_function_pool[19377]: DeletePerfQueryINTEL (will be remapped) */ + /* _mesa_function_pool[19545]: DeletePerfQueryINTEL (will be remapped) */ "i\0" "glDeletePerfQueryINTEL\0" "\0" - /* _mesa_function_pool[19403]: MultiTexCoord1d (offset 376) */ + /* _mesa_function_pool[19571]: MultiTexCoord1d (offset 376) */ "id\0" "glMultiTexCoord1d\0" "glMultiTexCoord1dARB\0" "\0" - /* _mesa_function_pool[19446]: GenVertexArraysAPPLE (will be remapped) */ + /* _mesa_function_pool[19614]: GenVertexArraysAPPLE (will be remapped) */ "ip\0" "glGenVertexArraysAPPLE\0" "\0" - /* _mesa_function_pool[19473]: MultiTexCoord1s (offset 382) */ + /* _mesa_function_pool[19641]: MultiTexCoord1s (offset 382) */ "ii\0" "glMultiTexCoord1s\0" "glMultiTexCoord1sARB\0" "\0" - /* _mesa_function_pool[19516]: BeginConditionalRender (will be remapped) */ + /* _mesa_function_pool[19684]: BeginConditionalRender (will be remapped) */ "ii\0" "glBeginConditionalRender\0" "glBeginConditionalRenderNV\0" "\0" - /* _mesa_function_pool[19572]: LoadPaletteFromModelViewMatrixOES (dynamic) */ + /* _mesa_function_pool[19740]: LoadPaletteFromModelViewMatrixOES (dynamic) */ "\0" "glLoadPaletteFromModelViewMatrixOES\0" "\0" - /* _mesa_function_pool[19610]: GetShaderiv (will be remapped) */ + /* _mesa_function_pool[19778]: GetShaderiv (will be remapped) */ "iip\0" "glGetShaderiv\0" "\0" - /* _mesa_function_pool[19629]: GetMapAttribParameterfvNV (dynamic) */ + /* _mesa_function_pool[19797]: GetMapAttribParameterfvNV (dynamic) */ "iiip\0" "glGetMapAttribParameterfvNV\0" "\0" - /* _mesa_function_pool[19663]: CopyConvolutionFilter1D (offset 354) */ + /* _mesa_function_pool[19831]: CopyConvolutionFilter1D (offset 354) */ "iiiii\0" "glCopyConvolutionFilter1D\0" "glCopyConvolutionFilter1DEXT\0" "\0" - /* _mesa_function_pool[19725]: ClearBufferfv (will be remapped) */ + /* _mesa_function_pool[19893]: ClearBufferfv (will be remapped) */ "iip\0" "glClearBufferfv\0" "\0" - /* _mesa_function_pool[19746]: UniformMatrix4dv (will be remapped) */ + /* _mesa_function_pool[19914]: UniformMatrix4dv (will be remapped) */ "iiip\0" "glUniformMatrix4dv\0" "\0" - /* _mesa_function_pool[19771]: InstrumentsBufferSGIX (dynamic) */ + /* _mesa_function_pool[19939]: InstrumentsBufferSGIX (dynamic) */ "ip\0" "glInstrumentsBufferSGIX\0" "\0" - /* _mesa_function_pool[19799]: CreateShaderObjectARB (will be remapped) */ + /* _mesa_function_pool[19967]: CreateShaderObjectARB (will be remapped) */ "i\0" "glCreateShaderObjectARB\0" "\0" - /* _mesa_function_pool[19826]: GetTexParameterxv (will be remapped) */ + /* _mesa_function_pool[19994]: GetTexParameterxv (will be remapped) */ "iip\0" "glGetTexParameterxvOES\0" "glGetTexParameterxv\0" "\0" - /* _mesa_function_pool[19874]: GetAttachedShaders (will be remapped) */ + /* _mesa_function_pool[20042]: GetAttachedShaders (will be remapped) */ "iipp\0" "glGetAttachedShaders\0" "\0" - /* _mesa_function_pool[19901]: ClearBufferfi (will be remapped) */ + /* _mesa_function_pool[20069]: ClearBufferfi (will be remapped) */ "iifi\0" "glClearBufferfi\0" "\0" - /* _mesa_function_pool[19923]: Materialiv (offset 172) */ + /* _mesa_function_pool[20091]: Materialiv (offset 172) */ "iip\0" "glMaterialiv\0" "\0" - /* _mesa_function_pool[19941]: DeleteFragmentShaderATI (will be remapped) */ + /* _mesa_function_pool[20109]: DeleteFragmentShaderATI (will be remapped) */ "i\0" "glDeleteFragmentShaderATI\0" "\0" - /* _mesa_function_pool[19970]: VertexArrayVertexBuffers (will be remapped) */ + /* _mesa_function_pool[20138]: VertexArrayVertexBuffers (will be remapped) */ "iiippp\0" "glVertexArrayVertexBuffers\0" "\0" - /* _mesa_function_pool[20005]: DrawElementsInstancedBaseVertex (will be remapped) */ + /* _mesa_function_pool[20173]: DrawElementsInstancedBaseVertex (will be remapped) */ "iiipii\0" "glDrawElementsInstancedBaseVertex\0" "glDrawElementsInstancedBaseVertexEXT\0" "glDrawElementsInstancedBaseVertexOES\0" "\0" - /* _mesa_function_pool[20121]: DisableClientState (offset 309) */ + /* _mesa_function_pool[20289]: DisableClientState (offset 309) */ "i\0" "glDisableClientState\0" "\0" - /* _mesa_function_pool[20145]: TexGeni (offset 192) */ + /* _mesa_function_pool[20313]: TexGeni (offset 192) */ "iii\0" "glTexGeni\0" "glTexGeniOES\0" "\0" - /* _mesa_function_pool[20173]: TexGenf (offset 190) */ + /* _mesa_function_pool[20341]: TexGenf (offset 190) */ "iif\0" "glTexGenf\0" "glTexGenfOES\0" "\0" - /* _mesa_function_pool[20201]: TexGend (offset 188) */ + /* _mesa_function_pool[20369]: TexGend (offset 188) */ "iid\0" "glTexGend\0" "\0" - /* _mesa_function_pool[20216]: GetVertexAttribfvNV (will be remapped) */ + /* _mesa_function_pool[20384]: GetVertexAttribfvNV (will be remapped) */ "iip\0" "glGetVertexAttribfvNV\0" "\0" - /* _mesa_function_pool[20243]: ColorPointerListIBM (dynamic) */ + /* _mesa_function_pool[20411]: ColorPointerListIBM (dynamic) */ "iiipi\0" "glColorPointerListIBM\0" "\0" - /* _mesa_function_pool[20272]: Color4sv (offset 34) */ + /* _mesa_function_pool[20440]: Color4sv (offset 34) */ "p\0" "glColor4sv\0" "\0" - /* _mesa_function_pool[20286]: GetCombinerInputParameterfvNV (dynamic) */ + /* _mesa_function_pool[20454]: GetCombinerInputParameterfvNV (dynamic) */ "iiiip\0" "glGetCombinerInputParameterfvNV\0" "\0" - /* _mesa_function_pool[20325]: LoadTransposeMatrixf (will be remapped) */ + /* _mesa_function_pool[20493]: LoadTransposeMatrixf (will be remapped) */ "p\0" "glLoadTransposeMatrixf\0" "glLoadTransposeMatrixfARB\0" "\0" - /* _mesa_function_pool[20377]: LoadTransposeMatrixd (will be remapped) */ + /* _mesa_function_pool[20545]: LoadTransposeMatrixd (will be remapped) */ "p\0" "glLoadTransposeMatrixd\0" "glLoadTransposeMatrixdARB\0" "\0" - /* _mesa_function_pool[20429]: PixelZoom (offset 246) */ + /* _mesa_function_pool[20597]: PixelZoom (offset 246) */ "ff\0" "glPixelZoom\0" "\0" - /* _mesa_function_pool[20445]: ProgramEnvParameter4dARB (will be remapped) */ + /* _mesa_function_pool[20613]: ProgramEnvParameter4dARB (will be remapped) */ "iidddd\0" "glProgramEnvParameter4dARB\0" "glProgramParameter4dNV\0" "\0" - /* _mesa_function_pool[20503]: ColorTableParameterfv (offset 340) */ + /* _mesa_function_pool[20671]: ColorTableParameterfv (offset 340) */ "iip\0" "glColorTableParameterfv\0" "glColorTableParameterfvSGI\0" "\0" - /* _mesa_function_pool[20559]: IsTexture (offset 330) */ + /* _mesa_function_pool[20727]: IsTexture (offset 330) */ "i\0" "glIsTexture\0" "glIsTextureEXT\0" "\0" - /* _mesa_function_pool[20589]: ProgramUniform3uiv (will be remapped) */ + /* _mesa_function_pool[20757]: ProgramUniform3uiv (will be remapped) */ "iiip\0" "glProgramUniform3uiv\0" "glProgramUniform3uivEXT\0" "\0" - /* _mesa_function_pool[20640]: IndexPointer (offset 314) */ + /* _mesa_function_pool[20808]: IndexPointer (offset 314) */ "iip\0" "glIndexPointer\0" "\0" - /* _mesa_function_pool[20660]: ImageTransformParameterivHP (dynamic) */ + /* _mesa_function_pool[20828]: ImageTransformParameterivHP (dynamic) */ "iip\0" "glImageTransformParameterivHP\0" "\0" - /* _mesa_function_pool[20695]: VertexAttrib4sNV (will be remapped) */ + /* _mesa_function_pool[20863]: VertexAttrib4sNV (will be remapped) */ "iiiii\0" "glVertexAttrib4sNV\0" "\0" - /* _mesa_function_pool[20721]: GetMapdv (offset 266) */ + /* _mesa_function_pool[20889]: GetMapdv (offset 266) */ "iip\0" "glGetMapdv\0" "\0" - /* _mesa_function_pool[20737]: GetInteger64i_v (will be remapped) */ + /* _mesa_function_pool[20905]: GetInteger64i_v (will be remapped) */ "iip\0" "glGetInteger64i_v\0" "\0" - /* _mesa_function_pool[20760]: ReplacementCodeuiColor4ubVertex3fSUN (dynamic) */ + /* _mesa_function_pool[20928]: ReplacementCodeuiColor4ubVertex3fSUN (dynamic) */ "iiiiifff\0" "glReplacementCodeuiColor4ubVertex3fSUN\0" "\0" - /* _mesa_function_pool[20809]: IsBuffer (will be remapped) */ + /* _mesa_function_pool[20977]: IsBuffer (will be remapped) */ "i\0" "glIsBuffer\0" "glIsBufferARB\0" "\0" - /* _mesa_function_pool[20837]: ColorP4ui (will be remapped) */ + /* _mesa_function_pool[21005]: ColorP4ui (will be remapped) */ "ii\0" "glColorP4ui\0" "\0" - /* _mesa_function_pool[20853]: TextureStorage3D (will be remapped) */ + /* _mesa_function_pool[21021]: TextureStorage3D (will be remapped) */ "iiiiii\0" "glTextureStorage3D\0" "\0" - /* _mesa_function_pool[20880]: SpriteParameteriSGIX (dynamic) */ + /* _mesa_function_pool[21048]: SpriteParameteriSGIX (dynamic) */ "ii\0" "glSpriteParameteriSGIX\0" "\0" - /* _mesa_function_pool[20907]: TexCoordP3uiv (will be remapped) */ + /* _mesa_function_pool[21075]: TexCoordP3uiv (will be remapped) */ "ip\0" "glTexCoordP3uiv\0" "\0" - /* _mesa_function_pool[20927]: WeightusvARB (dynamic) */ + /* _mesa_function_pool[21095]: WeightusvARB (dynamic) */ "ip\0" "glWeightusvARB\0" "\0" - /* _mesa_function_pool[20946]: EvalMapsNV (dynamic) */ + /* _mesa_function_pool[21114]: EvalMapsNV (dynamic) */ "ii\0" "glEvalMapsNV\0" "\0" - /* _mesa_function_pool[20963]: ReplacementCodeuiSUN (dynamic) */ + /* _mesa_function_pool[21131]: ReplacementCodeuiSUN (dynamic) */ "i\0" "glReplacementCodeuiSUN\0" "\0" - /* _mesa_function_pool[20989]: GlobalAlphaFactoruiSUN (dynamic) */ + /* _mesa_function_pool[21157]: GlobalAlphaFactoruiSUN (dynamic) */ "i\0" "glGlobalAlphaFactoruiSUN\0" "\0" - /* _mesa_function_pool[21017]: Uniform1iv (will be remapped) */ + /* _mesa_function_pool[21185]: Uniform1iv (will be remapped) */ "iip\0" "glUniform1iv\0" "glUniform1ivARB\0" "\0" - /* _mesa_function_pool[21051]: Uniform4uiv (will be remapped) */ + /* _mesa_function_pool[21219]: Uniform4uiv (will be remapped) */ "iip\0" "glUniform4uivEXT\0" "glUniform4uiv\0" "\0" - /* _mesa_function_pool[21087]: PopDebugGroup (will be remapped) */ + /* _mesa_function_pool[21255]: PopDebugGroup (will be remapped) */ "\0" "glPopDebugGroup\0" "glPopDebugGroupKHR\0" "\0" - /* _mesa_function_pool[21124]: VertexAttrib1d (will be remapped) */ + /* _mesa_function_pool[21292]: VertexAttrib1d (will be remapped) */ "id\0" "glVertexAttrib1d\0" "glVertexAttrib1dARB\0" "\0" - /* _mesa_function_pool[21165]: CompressedTexImage1D (will be remapped) */ + /* _mesa_function_pool[21333]: CompressedTexImage1D (will be remapped) */ "iiiiiip\0" "glCompressedTexImage1D\0" "glCompressedTexImage1DARB\0" "\0" - /* _mesa_function_pool[21223]: NamedBufferSubData (will be remapped) */ + /* _mesa_function_pool[21391]: NamedBufferSubData (will be remapped) */ "iiip\0" "glNamedBufferSubData\0" "\0" - /* _mesa_function_pool[21250]: TexBufferRange (will be remapped) */ + /* _mesa_function_pool[21418]: TexBufferRange (will be remapped) */ "iiiii\0" "glTexBufferRange\0" "glTexBufferRangeEXT\0" "glTexBufferRangeOES\0" "\0" - /* _mesa_function_pool[21314]: VertexAttrib1s (will be remapped) */ + /* _mesa_function_pool[21482]: VertexAttrib1s (will be remapped) */ "ii\0" "glVertexAttrib1s\0" "glVertexAttrib1sARB\0" "\0" - /* _mesa_function_pool[21355]: MultiDrawElementsIndirect (will be remapped) */ + /* _mesa_function_pool[21523]: MultiDrawElementsIndirect (will be remapped) */ "iipii\0" "glMultiDrawElementsIndirect\0" "\0" - /* _mesa_function_pool[21390]: UniformMatrix4x3dv (will be remapped) */ + /* _mesa_function_pool[21558]: UniformMatrix4x3dv (will be remapped) */ "iiip\0" "glUniformMatrix4x3dv\0" "\0" - /* _mesa_function_pool[21417]: TransformFeedbackBufferBase (will be remapped) */ + /* _mesa_function_pool[21585]: TransformFeedbackBufferBase (will be remapped) */ "iii\0" "glTransformFeedbackBufferBase\0" "\0" - /* _mesa_function_pool[21452]: FogCoordfvEXT (will be remapped) */ + /* _mesa_function_pool[21620]: FogCoordfvEXT (will be remapped) */ "p\0" "glFogCoordfv\0" "glFogCoordfvEXT\0" "\0" - /* _mesa_function_pool[21484]: BeginPerfMonitorAMD (will be remapped) */ + /* _mesa_function_pool[21652]: BeginPerfMonitorAMD (will be remapped) */ "i\0" "glBeginPerfMonitorAMD\0" "\0" - /* _mesa_function_pool[21509]: GetColorTableParameterfv (offset 344) */ + /* _mesa_function_pool[21677]: GetColorTableParameterfv (offset 344) */ "iip\0" "glGetColorTableParameterfv\0" "glGetColorTableParameterfvSGI\0" "glGetColorTableParameterfvEXT\0" "\0" - /* _mesa_function_pool[21601]: MultiTexCoord3fARB (offset 394) */ + /* _mesa_function_pool[21769]: MultiTexCoord3fARB (offset 394) */ "ifff\0" "glMultiTexCoord3f\0" "glMultiTexCoord3fARB\0" "\0" - /* _mesa_function_pool[21646]: GetTexLevelParameterfv (offset 284) */ + /* _mesa_function_pool[21814]: GetTexLevelParameterfv (offset 284) */ "iiip\0" "glGetTexLevelParameterfv\0" "\0" - /* _mesa_function_pool[21677]: Vertex2sv (offset 133) */ + /* _mesa_function_pool[21845]: Vertex2sv (offset 133) */ "p\0" "glVertex2sv\0" "\0" - /* _mesa_function_pool[21692]: GetnMapdvARB (will be remapped) */ + /* _mesa_function_pool[21860]: GetnMapdvARB (will be remapped) */ "iiip\0" "glGetnMapdvARB\0" "\0" - /* _mesa_function_pool[21713]: VertexAttrib2dNV (will be remapped) */ + /* _mesa_function_pool[21881]: VertexAttrib2dNV (will be remapped) */ "idd\0" "glVertexAttrib2dNV\0" "\0" - /* _mesa_function_pool[21737]: GetTrackMatrixivNV (will be remapped) */ + /* _mesa_function_pool[21905]: GetTrackMatrixivNV (will be remapped) */ "iiip\0" "glGetTrackMatrixivNV\0" "\0" - /* _mesa_function_pool[21764]: VertexAttrib3svNV (will be remapped) */ + /* _mesa_function_pool[21932]: VertexAttrib3svNV (will be remapped) */ "ip\0" "glVertexAttrib3svNV\0" "\0" - /* _mesa_function_pool[21788]: GetTexEnviv (offset 277) */ + /* _mesa_function_pool[21956]: GetTexEnviv (offset 277) */ "iip\0" "glGetTexEnviv\0" "\0" - /* _mesa_function_pool[21807]: ViewportArrayv (will be remapped) */ + /* _mesa_function_pool[21975]: ViewportArrayv (will be remapped) */ "iip\0" "glViewportArrayv\0" + "glViewportArrayvOES\0" "\0" - /* _mesa_function_pool[21829]: ReplacementCodeuiTexCoord2fColor4fNormal3fVertex3fSUN (dynamic) */ + /* _mesa_function_pool[22017]: ReplacementCodeuiTexCoord2fColor4fNormal3fVertex3fSUN (dynamic) */ "iffffffffffff\0" "glReplacementCodeuiTexCoord2fColor4fNormal3fVertex3fSUN\0" "\0" - /* _mesa_function_pool[21900]: SeparableFilter2D (offset 360) */ + /* _mesa_function_pool[22088]: SeparableFilter2D (offset 360) */ "iiiiiipp\0" "glSeparableFilter2D\0" "glSeparableFilter2DEXT\0" "\0" - /* _mesa_function_pool[21953]: ReplacementCodeuiColor4ubVertex3fvSUN (dynamic) */ + /* _mesa_function_pool[22141]: ReplacementCodeuiColor4ubVertex3fvSUN (dynamic) */ "ppp\0" "glReplacementCodeuiColor4ubVertex3fvSUN\0" "\0" - /* _mesa_function_pool[21998]: ArrayElement (offset 306) */ + /* _mesa_function_pool[22186]: ArrayElement (offset 306) */ "i\0" "glArrayElement\0" "glArrayElementEXT\0" "\0" - /* _mesa_function_pool[22034]: TexImage2D (offset 183) */ + /* _mesa_function_pool[22222]: TexImage2D (offset 183) */ "iiiiiiiip\0" "glTexImage2D\0" "\0" - /* _mesa_function_pool[22058]: FragmentMaterialiSGIX (dynamic) */ + /* _mesa_function_pool[22246]: FragmentMaterialiSGIX (dynamic) */ "iii\0" "glFragmentMaterialiSGIX\0" "\0" - /* _mesa_function_pool[22087]: RasterPos2dv (offset 63) */ + /* _mesa_function_pool[22275]: RasterPos2dv (offset 63) */ "p\0" "glRasterPos2dv\0" "\0" - /* _mesa_function_pool[22105]: Fogiv (offset 156) */ + /* _mesa_function_pool[22293]: Fogiv (offset 156) */ "ip\0" "glFogiv\0" "\0" - /* _mesa_function_pool[22117]: EndQuery (will be remapped) */ + /* _mesa_function_pool[22305]: EndQuery (will be remapped) */ "i\0" "glEndQuery\0" "glEndQueryARB\0" "\0" - /* _mesa_function_pool[22145]: TexCoord1dv (offset 95) */ + /* _mesa_function_pool[22333]: TexCoord1dv (offset 95) */ "p\0" "glTexCoord1dv\0" "\0" - /* _mesa_function_pool[22162]: TexCoord4dv (offset 119) */ + /* _mesa_function_pool[22350]: TexCoord4dv (offset 119) */ "p\0" "glTexCoord4dv\0" "\0" - /* _mesa_function_pool[22179]: GetVertexAttribdvNV (will be remapped) */ + /* _mesa_function_pool[22367]: GetVertexAttribdvNV (will be remapped) */ "iip\0" "glGetVertexAttribdvNV\0" "\0" - /* _mesa_function_pool[22206]: Clear (offset 203) */ + /* _mesa_function_pool[22394]: Clear (offset 203) */ "i\0" "glClear\0" "\0" - /* _mesa_function_pool[22217]: VertexAttrib4sv (will be remapped) */ + /* _mesa_function_pool[22405]: VertexAttrib4sv (will be remapped) */ "ip\0" "glVertexAttrib4sv\0" "glVertexAttrib4svARB\0" "\0" - /* _mesa_function_pool[22260]: Ortho (offset 296) */ + /* _mesa_function_pool[22448]: Ortho (offset 296) */ "dddddd\0" "glOrtho\0" "\0" - /* _mesa_function_pool[22276]: Uniform3uiv (will be remapped) */ + /* _mesa_function_pool[22464]: Uniform3uiv (will be remapped) */ "iip\0" "glUniform3uivEXT\0" "glUniform3uiv\0" "\0" - /* _mesa_function_pool[22312]: MatrixIndexPointerARB (dynamic) */ + /* _mesa_function_pool[22500]: MatrixIndexPointerARB (dynamic) */ "iiip\0" "glMatrixIndexPointerARB\0" "glMatrixIndexPointerOES\0" "\0" - /* _mesa_function_pool[22366]: EndQueryIndexed (will be remapped) */ + /* _mesa_function_pool[22554]: EndQueryIndexed (will be remapped) */ "ii\0" "glEndQueryIndexed\0" "\0" - /* _mesa_function_pool[22388]: TexParameterxv (will be remapped) */ + /* _mesa_function_pool[22576]: TexParameterxv (will be remapped) */ "iip\0" "glTexParameterxvOES\0" "glTexParameterxv\0" "\0" - /* _mesa_function_pool[22430]: SampleMaskSGIS (will be remapped) */ + /* _mesa_function_pool[22618]: SampleMaskSGIS (will be remapped) */ "fi\0" "glSampleMaskSGIS\0" "glSampleMaskEXT\0" "\0" - /* _mesa_function_pool[22467]: MultiDrawArraysIndirectCountARB (will be remapped) */ + /* _mesa_function_pool[22655]: MultiDrawArraysIndirectCountARB (will be remapped) */ "iiiii\0" "glMultiDrawArraysIndirectCountARB\0" "\0" - /* _mesa_function_pool[22508]: ProgramUniformMatrix2fv (will be remapped) */ + /* _mesa_function_pool[22696]: ProgramUniformMatrix2fv (will be remapped) */ "iiiip\0" "glProgramUniformMatrix2fv\0" "glProgramUniformMatrix2fvEXT\0" "\0" - /* _mesa_function_pool[22570]: ProgramLocalParameter4fvARB (will be remapped) */ + /* _mesa_function_pool[22758]: ProgramLocalParameter4fvARB (will be remapped) */ "iip\0" "glProgramLocalParameter4fvARB\0" "\0" - /* _mesa_function_pool[22605]: GetProgramStringNV (will be remapped) */ + /* _mesa_function_pool[22793]: GetProgramStringNV (will be remapped) */ "iip\0" "glGetProgramStringNV\0" "\0" - /* _mesa_function_pool[22631]: Binormal3svEXT (dynamic) */ + /* _mesa_function_pool[22819]: Binormal3svEXT (dynamic) */ "p\0" "glBinormal3svEXT\0" "\0" - /* _mesa_function_pool[22651]: Uniform4dv (will be remapped) */ + /* _mesa_function_pool[22839]: Uniform4dv (will be remapped) */ "iip\0" "glUniform4dv\0" "\0" - /* _mesa_function_pool[22669]: LightModelx (will be remapped) */ + /* _mesa_function_pool[22857]: LightModelx (will be remapped) */ "ii\0" "glLightModelxOES\0" "glLightModelx\0" "\0" - /* _mesa_function_pool[22704]: VertexAttribI3iEXT (will be remapped) */ + /* _mesa_function_pool[22892]: VertexAttribI3iEXT (will be remapped) */ "iiii\0" "glVertexAttribI3iEXT\0" "glVertexAttribI3i\0" "\0" - /* _mesa_function_pool[22749]: ClearColorx (will be remapped) */ + /* _mesa_function_pool[22937]: ClearColorx (will be remapped) */ "iiii\0" "glClearColorxOES\0" "glClearColorx\0" "\0" - /* _mesa_function_pool[22786]: EndTransformFeedback (will be remapped) */ + /* _mesa_function_pool[22974]: EndTransformFeedback (will be remapped) */ "\0" "glEndTransformFeedback\0" "glEndTransformFeedbackEXT\0" "\0" - /* _mesa_function_pool[22837]: VertexAttribL2dv (will be remapped) */ + /* _mesa_function_pool[23025]: VertexAttribL2dv (will be remapped) */ "ip\0" "glVertexAttribL2dv\0" "\0" - /* _mesa_function_pool[22860]: GetHandleARB (will be remapped) */ + /* _mesa_function_pool[23048]: GetHandleARB (will be remapped) */ "i\0" "glGetHandleARB\0" "\0" - /* _mesa_function_pool[22878]: GetProgramBinary (will be remapped) */ + /* _mesa_function_pool[23066]: GetProgramBinary (will be remapped) */ "iippp\0" "glGetProgramBinary\0" "glGetProgramBinaryOES\0" "\0" - /* _mesa_function_pool[22926]: ViewportIndexedfv (will be remapped) */ + /* _mesa_function_pool[23114]: ViewportIndexedfv (will be remapped) */ "ip\0" "glViewportIndexedfv\0" + "glViewportIndexedfvOES\0" "\0" - /* _mesa_function_pool[22950]: BindTextureUnit (will be remapped) */ + /* _mesa_function_pool[23161]: BindTextureUnit (will be remapped) */ "ii\0" "glBindTextureUnit\0" "\0" - /* _mesa_function_pool[22972]: CallList (offset 2) */ + /* _mesa_function_pool[23183]: CallList (offset 2) */ "i\0" "glCallList\0" "\0" - /* _mesa_function_pool[22986]: Materialfv (offset 170) */ + /* _mesa_function_pool[23197]: Materialfv (offset 170) */ "iip\0" "glMaterialfv\0" "\0" - /* _mesa_function_pool[23004]: DeleteProgram (will be remapped) */ + /* _mesa_function_pool[23215]: DeleteProgram (will be remapped) */ "i\0" "glDeleteProgram\0" "\0" - /* _mesa_function_pool[23023]: GetActiveAtomicCounterBufferiv (will be remapped) */ + /* _mesa_function_pool[23234]: GetActiveAtomicCounterBufferiv (will be remapped) */ "iiip\0" "glGetActiveAtomicCounterBufferiv\0" "\0" - /* _mesa_function_pool[23062]: ClearDepthf (will be remapped) */ + /* _mesa_function_pool[23273]: ClearDepthf (will be remapped) */ "f\0" "glClearDepthf\0" "glClearDepthfOES\0" "\0" - /* _mesa_function_pool[23096]: VertexWeightfEXT (dynamic) */ + /* _mesa_function_pool[23307]: VertexWeightfEXT (dynamic) */ "f\0" "glVertexWeightfEXT\0" "\0" - /* _mesa_function_pool[23118]: FlushVertexArrayRangeNV (dynamic) */ + /* _mesa_function_pool[23329]: FlushVertexArrayRangeNV (dynamic) */ "\0" "glFlushVertexArrayRangeNV\0" "\0" - /* _mesa_function_pool[23146]: GetConvolutionFilter (offset 356) */ + /* _mesa_function_pool[23357]: GetConvolutionFilter (offset 356) */ "iiip\0" "glGetConvolutionFilter\0" "glGetConvolutionFilterEXT\0" "\0" - /* _mesa_function_pool[23201]: MultiModeDrawElementsIBM (will be remapped) */ + /* _mesa_function_pool[23412]: MultiModeDrawElementsIBM (will be remapped) */ "ppipii\0" "glMultiModeDrawElementsIBM\0" "\0" - /* _mesa_function_pool[23236]: Uniform2iv (will be remapped) */ + /* _mesa_function_pool[23447]: Uniform2iv (will be remapped) */ "iip\0" "glUniform2iv\0" "glUniform2ivARB\0" "\0" - /* _mesa_function_pool[23270]: GetFixedv (will be remapped) */ + /* _mesa_function_pool[23481]: GetFixedv (will be remapped) */ "ip\0" "glGetFixedvOES\0" "glGetFixedv\0" "\0" - /* _mesa_function_pool[23301]: ProgramParameters4dvNV (will be remapped) */ + /* _mesa_function_pool[23512]: ProgramParameters4dvNV (will be remapped) */ "iiip\0" "glProgramParameters4dvNV\0" "\0" - /* _mesa_function_pool[23332]: Binormal3dvEXT (dynamic) */ + /* _mesa_function_pool[23543]: Binormal3dvEXT (dynamic) */ "p\0" "glBinormal3dvEXT\0" "\0" - /* _mesa_function_pool[23352]: SampleCoveragex (will be remapped) */ + /* _mesa_function_pool[23563]: SampleCoveragex (will be remapped) */ "ii\0" "glSampleCoveragexOES\0" "glSampleCoveragex\0" "\0" - /* _mesa_function_pool[23395]: GetPerfQueryInfoINTEL (will be remapped) */ + /* _mesa_function_pool[23606]: GetPerfQueryInfoINTEL (will be remapped) */ "iippppp\0" "glGetPerfQueryInfoINTEL\0" "\0" - /* _mesa_function_pool[23428]: DeleteFramebuffers (will be remapped) */ + /* _mesa_function_pool[23639]: DeleteFramebuffers (will be remapped) */ "ip\0" "glDeleteFramebuffers\0" "glDeleteFramebuffersEXT\0" "glDeleteFramebuffersOES\0" "\0" - /* _mesa_function_pool[23501]: CombinerInputNV (dynamic) */ + /* _mesa_function_pool[23712]: CombinerInputNV (dynamic) */ "iiiiii\0" "glCombinerInputNV\0" "\0" - /* _mesa_function_pool[23527]: VertexAttrib4uiv (will be remapped) */ + /* _mesa_function_pool[23738]: VertexAttrib4uiv (will be remapped) */ "ip\0" "glVertexAttrib4uiv\0" "glVertexAttrib4uivARB\0" "\0" - /* _mesa_function_pool[23572]: VertexAttrib4Nsv (will be remapped) */ + /* _mesa_function_pool[23783]: VertexAttrib4Nsv (will be remapped) */ "ip\0" "glVertexAttrib4Nsv\0" "glVertexAttrib4NsvARB\0" "\0" - /* _mesa_function_pool[23617]: Vertex4s (offset 148) */ + /* _mesa_function_pool[23828]: Vertex4s (offset 148) */ "iiii\0" "glVertex4s\0" "\0" - /* _mesa_function_pool[23634]: VertexAttribI2iEXT (will be remapped) */ + /* _mesa_function_pool[23845]: VertexAttribI2iEXT (will be remapped) */ "iii\0" "glVertexAttribI2iEXT\0" "glVertexAttribI2i\0" "\0" - /* _mesa_function_pool[23678]: Vertex4f (offset 144) */ + /* _mesa_function_pool[23889]: Vertex4f (offset 144) */ "ffff\0" "glVertex4f\0" "\0" - /* _mesa_function_pool[23695]: Vertex4d (offset 142) */ + /* _mesa_function_pool[23906]: Vertex4d (offset 142) */ "dddd\0" "glVertex4d\0" "\0" - /* _mesa_function_pool[23712]: VertexAttribL4dv (will be remapped) */ + /* _mesa_function_pool[23923]: VertexAttribL4dv (will be remapped) */ "ip\0" "glVertexAttribL4dv\0" "\0" - /* _mesa_function_pool[23735]: GetTexGenfv (offset 279) */ + /* _mesa_function_pool[23946]: GetTexGenfv (offset 279) */ "iip\0" "glGetTexGenfv\0" "glGetTexGenfvOES\0" "\0" - /* _mesa_function_pool[23771]: Vertex4i (offset 146) */ + /* _mesa_function_pool[23982]: Vertex4i (offset 146) */ "iiii\0" "glVertex4i\0" "\0" - /* _mesa_function_pool[23788]: VertexWeightPointerEXT (dynamic) */ + /* _mesa_function_pool[23999]: VertexWeightPointerEXT (dynamic) */ "iiip\0" "glVertexWeightPointerEXT\0" "\0" - /* _mesa_function_pool[23819]: MemoryBarrierByRegion (will be remapped) */ + /* _mesa_function_pool[24030]: MemoryBarrierByRegion (will be remapped) */ "i\0" "glMemoryBarrierByRegion\0" "\0" - /* _mesa_function_pool[23846]: StencilFuncSeparateATI (will be remapped) */ + /* _mesa_function_pool[24057]: StencilFuncSeparateATI (will be remapped) */ "iiii\0" "glStencilFuncSeparateATI\0" "\0" - /* _mesa_function_pool[23877]: GetVertexAttribIuiv (will be remapped) */ + /* _mesa_function_pool[24088]: GetVertexAttribIuiv (will be remapped) */ "iip\0" "glGetVertexAttribIuivEXT\0" "glGetVertexAttribIuiv\0" "\0" - /* _mesa_function_pool[23929]: LightModelfv (offset 164) */ + /* _mesa_function_pool[24140]: LightModelfv (offset 164) */ "ip\0" "glLightModelfv\0" "\0" - /* _mesa_function_pool[23948]: Vertex4dv (offset 143) */ + /* _mesa_function_pool[24159]: Vertex4dv (offset 143) */ "p\0" "glVertex4dv\0" "\0" - /* _mesa_function_pool[23963]: ProgramParameters4fvNV (will be remapped) */ + /* _mesa_function_pool[24174]: ProgramParameters4fvNV (will be remapped) */ "iiip\0" "glProgramParameters4fvNV\0" "\0" - /* _mesa_function_pool[23994]: GetInfoLogARB (will be remapped) */ + /* _mesa_function_pool[24205]: GetInfoLogARB (will be remapped) */ "iipp\0" "glGetInfoLogARB\0" "\0" - /* _mesa_function_pool[24016]: StencilMask (offset 209) */ + /* _mesa_function_pool[24227]: StencilMask (offset 209) */ "i\0" "glStencilMask\0" "\0" - /* _mesa_function_pool[24033]: NamedFramebufferReadBuffer (will be remapped) */ + /* _mesa_function_pool[24244]: NamedFramebufferReadBuffer (will be remapped) */ "ii\0" "glNamedFramebufferReadBuffer\0" "\0" - /* _mesa_function_pool[24066]: IsList (offset 287) */ + /* _mesa_function_pool[24277]: IsList (offset 287) */ "i\0" "glIsList\0" "\0" - /* _mesa_function_pool[24078]: ClearBufferiv (will be remapped) */ + /* _mesa_function_pool[24289]: ClearBufferiv (will be remapped) */ "iip\0" "glClearBufferiv\0" "\0" - /* _mesa_function_pool[24099]: GetIntegeri_v (will be remapped) */ + /* _mesa_function_pool[24310]: GetIntegeri_v (will be remapped) */ "iip\0" "glGetIntegerIndexedvEXT\0" "glGetIntegeri_v\0" "\0" - /* _mesa_function_pool[24144]: ProgramUniform2iv (will be remapped) */ + /* _mesa_function_pool[24355]: ProgramUniform2iv (will be remapped) */ "iiip\0" "glProgramUniform2iv\0" "glProgramUniform2ivEXT\0" "\0" - /* _mesa_function_pool[24193]: CreateVertexArrays (will be remapped) */ + /* _mesa_function_pool[24404]: CreateVertexArrays (will be remapped) */ "ip\0" "glCreateVertexArrays\0" "\0" - /* _mesa_function_pool[24218]: FogCoordPointer (will be remapped) */ + /* _mesa_function_pool[24429]: FogCoordPointer (will be remapped) */ "iip\0" "glFogCoordPointer\0" "glFogCoordPointerEXT\0" "\0" - /* _mesa_function_pool[24262]: SecondaryColor3us (will be remapped) */ + /* _mesa_function_pool[24473]: SecondaryColor3us (will be remapped) */ "iii\0" "glSecondaryColor3us\0" "glSecondaryColor3usEXT\0" "\0" - /* _mesa_function_pool[24310]: DeformationMap3dSGIX (dynamic) */ + /* _mesa_function_pool[24521]: DeformationMap3dSGIX (dynamic) */ "iddiiddiiddiip\0" "glDeformationMap3dSGIX\0" "\0" - /* _mesa_function_pool[24349]: TextureNormalEXT (dynamic) */ + /* _mesa_function_pool[24560]: TextureNormalEXT (dynamic) */ "i\0" "glTextureNormalEXT\0" "\0" - /* _mesa_function_pool[24371]: SecondaryColor3ub (will be remapped) */ + /* _mesa_function_pool[24582]: SecondaryColor3ub (will be remapped) */ "iii\0" "glSecondaryColor3ub\0" "glSecondaryColor3ubEXT\0" "\0" - /* _mesa_function_pool[24419]: GetActiveUniformName (will be remapped) */ + /* _mesa_function_pool[24630]: GetActiveUniformName (will be remapped) */ "iiipp\0" "glGetActiveUniformName\0" "\0" - /* _mesa_function_pool[24449]: SecondaryColor3ui (will be remapped) */ + /* _mesa_function_pool[24660]: SecondaryColor3ui (will be remapped) */ "iii\0" "glSecondaryColor3ui\0" "glSecondaryColor3uiEXT\0" "\0" - /* _mesa_function_pool[24497]: VertexAttribI3uivEXT (will be remapped) */ + /* _mesa_function_pool[24708]: VertexAttribI3uivEXT (will be remapped) */ "ip\0" "glVertexAttribI3uivEXT\0" "glVertexAttribI3uiv\0" "\0" - /* _mesa_function_pool[24544]: Binormal3fvEXT (dynamic) */ + /* _mesa_function_pool[24755]: Binormal3fvEXT (dynamic) */ "p\0" "glBinormal3fvEXT\0" "\0" - /* _mesa_function_pool[24564]: TexCoordPointervINTEL (dynamic) */ + /* _mesa_function_pool[24775]: TexCoordPointervINTEL (dynamic) */ "iip\0" "glTexCoordPointervINTEL\0" "\0" - /* _mesa_function_pool[24593]: VertexAttrib1sNV (will be remapped) */ + /* _mesa_function_pool[24804]: VertexAttrib1sNV (will be remapped) */ "ii\0" "glVertexAttrib1sNV\0" "\0" - /* _mesa_function_pool[24616]: Tangent3bEXT (dynamic) */ + /* _mesa_function_pool[24827]: Tangent3bEXT (dynamic) */ "iii\0" "glTangent3bEXT\0" "\0" - /* _mesa_function_pool[24636]: TextureBuffer (will be remapped) */ + /* _mesa_function_pool[24847]: TextureBuffer (will be remapped) */ "iii\0" "glTextureBuffer\0" "\0" - /* _mesa_function_pool[24657]: FragmentLightModelfSGIX (dynamic) */ + /* _mesa_function_pool[24868]: FragmentLightModelfSGIX (dynamic) */ "if\0" "glFragmentLightModelfSGIX\0" "\0" - /* _mesa_function_pool[24687]: InitNames (offset 197) */ + /* _mesa_function_pool[24898]: InitNames (offset 197) */ "\0" "glInitNames\0" "\0" - /* _mesa_function_pool[24701]: Normal3sv (offset 61) */ + /* _mesa_function_pool[24912]: Normal3sv (offset 61) */ "p\0" "glNormal3sv\0" "\0" - /* _mesa_function_pool[24716]: DeleteQueries (will be remapped) */ + /* _mesa_function_pool[24927]: DeleteQueries (will be remapped) */ "ip\0" "glDeleteQueries\0" "glDeleteQueriesARB\0" "\0" - /* _mesa_function_pool[24755]: InvalidateFramebuffer (will be remapped) */ + /* _mesa_function_pool[24966]: InvalidateFramebuffer (will be remapped) */ "iip\0" "glInvalidateFramebuffer\0" "\0" - /* _mesa_function_pool[24784]: Hint (offset 158) */ + /* _mesa_function_pool[24995]: Hint (offset 158) */ "ii\0" "glHint\0" "\0" - /* _mesa_function_pool[24795]: MemoryBarrier (will be remapped) */ + /* _mesa_function_pool[25006]: MemoryBarrier (will be remapped) */ "i\0" "glMemoryBarrier\0" "\0" - /* _mesa_function_pool[24814]: CopyColorSubTable (offset 347) */ + /* _mesa_function_pool[25025]: CopyColorSubTable (offset 347) */ "iiiii\0" "glCopyColorSubTable\0" "glCopyColorSubTableEXT\0" "\0" - /* _mesa_function_pool[24864]: WeightdvARB (dynamic) */ + /* _mesa_function_pool[25075]: WeightdvARB (dynamic) */ "ip\0" "glWeightdvARB\0" "\0" - /* _mesa_function_pool[24882]: GetObjectParameterfvARB (will be remapped) */ + /* _mesa_function_pool[25093]: GetObjectParameterfvARB (will be remapped) */ "iip\0" "glGetObjectParameterfvARB\0" "\0" - /* _mesa_function_pool[24913]: GetTexEnvxv (will be remapped) */ + /* _mesa_function_pool[25124]: GetTexEnvxv (will be remapped) */ "iip\0" "glGetTexEnvxvOES\0" "glGetTexEnvxv\0" "\0" - /* _mesa_function_pool[24949]: DrawTexsvOES (will be remapped) */ + /* _mesa_function_pool[25160]: DrawTexsvOES (will be remapped) */ "p\0" "glDrawTexsvOES\0" "\0" - /* _mesa_function_pool[24967]: Disable (offset 214) */ + /* _mesa_function_pool[25178]: Disable (offset 214) */ "i\0" "glDisable\0" "\0" - /* _mesa_function_pool[24980]: ClearColor (offset 206) */ + /* _mesa_function_pool[25191]: ClearColor (offset 206) */ "ffff\0" "glClearColor\0" "\0" - /* _mesa_function_pool[24999]: WeightuivARB (dynamic) */ + /* _mesa_function_pool[25210]: WeightuivARB (dynamic) */ "ip\0" "glWeightuivARB\0" "\0" - /* _mesa_function_pool[25018]: GetTextureParameterIuiv (will be remapped) */ + /* _mesa_function_pool[25229]: GetTextureParameterIuiv (will be remapped) */ "iip\0" "glGetTextureParameterIuiv\0" "\0" - /* _mesa_function_pool[25049]: RasterPos4iv (offset 83) */ + /* _mesa_function_pool[25260]: RasterPos4iv (offset 83) */ "p\0" "glRasterPos4iv\0" "\0" - /* _mesa_function_pool[25067]: VDPAUIsSurfaceNV (will be remapped) */ + /* _mesa_function_pool[25278]: VDPAUIsSurfaceNV (will be remapped) */ "i\0" "glVDPAUIsSurfaceNV\0" "\0" - /* _mesa_function_pool[25089]: ProgramUniformMatrix2x3fv (will be remapped) */ + /* _mesa_function_pool[25300]: ProgramUniformMatrix2x3fv (will be remapped) */ "iiiip\0" "glProgramUniformMatrix2x3fv\0" "glProgramUniformMatrix2x3fvEXT\0" "\0" - /* _mesa_function_pool[25155]: BindVertexBuffer (will be remapped) */ + /* _mesa_function_pool[25366]: BindVertexBuffer (will be remapped) */ "iiii\0" "glBindVertexBuffer\0" "\0" - /* _mesa_function_pool[25180]: Binormal3iEXT (dynamic) */ + /* _mesa_function_pool[25391]: Binormal3iEXT (dynamic) */ "iii\0" "glBinormal3iEXT\0" "\0" - /* _mesa_function_pool[25201]: RasterPos4i (offset 82) */ + /* _mesa_function_pool[25412]: RasterPos4i (offset 82) */ "iiii\0" "glRasterPos4i\0" "\0" - /* _mesa_function_pool[25221]: RasterPos4d (offset 78) */ + /* _mesa_function_pool[25432]: RasterPos4d (offset 78) */ "dddd\0" "glRasterPos4d\0" "\0" - /* _mesa_function_pool[25241]: RasterPos4f (offset 80) */ + /* _mesa_function_pool[25452]: RasterPos4f (offset 80) */ "ffff\0" "glRasterPos4f\0" "\0" - /* _mesa_function_pool[25261]: VDPAUMapSurfacesNV (will be remapped) */ + /* _mesa_function_pool[25472]: VDPAUMapSurfacesNV (will be remapped) */ "ip\0" "glVDPAUMapSurfacesNV\0" "\0" - /* _mesa_function_pool[25286]: GetQueryIndexediv (will be remapped) */ + /* _mesa_function_pool[25497]: GetQueryIndexediv (will be remapped) */ "iiip\0" "glGetQueryIndexediv\0" "\0" - /* _mesa_function_pool[25312]: RasterPos3dv (offset 71) */ + /* _mesa_function_pool[25523]: RasterPos3dv (offset 71) */ "p\0" "glRasterPos3dv\0" "\0" - /* _mesa_function_pool[25330]: GetProgramiv (will be remapped) */ + /* _mesa_function_pool[25541]: GetProgramiv (will be remapped) */ "iip\0" "glGetProgramiv\0" "\0" - /* _mesa_function_pool[25350]: TexCoord1iv (offset 99) */ + /* _mesa_function_pool[25561]: TexCoord1iv (offset 99) */ "p\0" "glTexCoord1iv\0" "\0" - /* _mesa_function_pool[25367]: RasterPos4s (offset 84) */ + /* _mesa_function_pool[25578]: RasterPos4s (offset 84) */ "iiii\0" "glRasterPos4s\0" "\0" - /* _mesa_function_pool[25387]: PixelTexGenParameterfvSGIS (dynamic) */ + /* _mesa_function_pool[25598]: PixelTexGenParameterfvSGIS (dynamic) */ "ip\0" "glPixelTexGenParameterfvSGIS\0" "\0" - /* _mesa_function_pool[25420]: VertexAttrib3dv (will be remapped) */ + /* _mesa_function_pool[25631]: VertexAttrib3dv (will be remapped) */ "ip\0" "glVertexAttrib3dv\0" "glVertexAttrib3dvARB\0" "\0" - /* _mesa_function_pool[25463]: Histogram (offset 367) */ + /* _mesa_function_pool[25674]: Histogram (offset 367) */ "iiii\0" "glHistogram\0" "glHistogramEXT\0" "\0" - /* _mesa_function_pool[25496]: Uniform2fv (will be remapped) */ + /* _mesa_function_pool[25707]: Uniform2fv (will be remapped) */ "iip\0" "glUniform2fv\0" "glUniform2fvARB\0" "\0" - /* _mesa_function_pool[25530]: TexImage4DSGIS (dynamic) */ + /* _mesa_function_pool[25741]: TexImage4DSGIS (dynamic) */ "iiiiiiiiiip\0" "glTexImage4DSGIS\0" "\0" - /* _mesa_function_pool[25560]: ProgramUniformMatrix3x4dv (will be remapped) */ + /* _mesa_function_pool[25771]: ProgramUniformMatrix3x4dv (will be remapped) */ "iiiip\0" "glProgramUniformMatrix3x4dv\0" "\0" - /* _mesa_function_pool[25595]: DrawBuffers (will be remapped) */ + /* _mesa_function_pool[25806]: DrawBuffers (will be remapped) */ "ip\0" "glDrawBuffers\0" "glDrawBuffersARB\0" @@ -3402,151 +3420,151 @@ "glDrawBuffersNV\0" "glDrawBuffersEXT\0" "\0" - /* _mesa_function_pool[25680]: GetnPolygonStippleARB (will be remapped) */ + /* _mesa_function_pool[25891]: GetnPolygonStippleARB (will be remapped) */ "ip\0" "glGetnPolygonStippleARB\0" "\0" - /* _mesa_function_pool[25708]: Color3uiv (offset 22) */ + /* _mesa_function_pool[25919]: Color3uiv (offset 22) */ "p\0" "glColor3uiv\0" "\0" - /* _mesa_function_pool[25723]: EvalCoord2fv (offset 235) */ + /* _mesa_function_pool[25934]: EvalCoord2fv (offset 235) */ "p\0" "glEvalCoord2fv\0" "\0" - /* _mesa_function_pool[25741]: TextureStorage3DEXT (will be remapped) */ + /* _mesa_function_pool[25952]: TextureStorage3DEXT (will be remapped) */ "iiiiiii\0" "glTextureStorage3DEXT\0" "\0" - /* _mesa_function_pool[25772]: VertexAttrib2fARB (will be remapped) */ + /* _mesa_function_pool[25983]: VertexAttrib2fARB (will be remapped) */ "iff\0" "glVertexAttrib2f\0" "glVertexAttrib2fARB\0" "\0" - /* _mesa_function_pool[25814]: WindowPos2fv (will be remapped) */ + /* _mesa_function_pool[26025]: WindowPos2fv (will be remapped) */ "p\0" "glWindowPos2fv\0" "glWindowPos2fvARB\0" "glWindowPos2fvMESA\0" "\0" - /* _mesa_function_pool[25869]: Tangent3fEXT (dynamic) */ + /* _mesa_function_pool[26080]: Tangent3fEXT (dynamic) */ "fff\0" "glTangent3fEXT\0" "\0" - /* _mesa_function_pool[25889]: TexImage3D (offset 371) */ + /* _mesa_function_pool[26100]: TexImage3D (offset 371) */ "iiiiiiiiip\0" "glTexImage3D\0" "glTexImage3DEXT\0" "glTexImage3DOES\0" "\0" - /* _mesa_function_pool[25946]: GetPerfQueryIdByNameINTEL (will be remapped) */ + /* _mesa_function_pool[26157]: GetPerfQueryIdByNameINTEL (will be remapped) */ "pp\0" "glGetPerfQueryIdByNameINTEL\0" "\0" - /* _mesa_function_pool[25978]: BindFragDataLocation (will be remapped) */ + /* _mesa_function_pool[26189]: BindFragDataLocation (will be remapped) */ "iip\0" "glBindFragDataLocationEXT\0" "glBindFragDataLocation\0" "\0" - /* _mesa_function_pool[26032]: LightModeliv (offset 166) */ + /* _mesa_function_pool[26243]: LightModeliv (offset 166) */ "ip\0" "glLightModeliv\0" "\0" - /* _mesa_function_pool[26051]: Normal3bv (offset 53) */ + /* _mesa_function_pool[26262]: Normal3bv (offset 53) */ "p\0" "glNormal3bv\0" "\0" - /* _mesa_function_pool[26066]: BeginQueryIndexed (will be remapped) */ + /* _mesa_function_pool[26277]: BeginQueryIndexed (will be remapped) */ "iii\0" "glBeginQueryIndexed\0" "\0" - /* _mesa_function_pool[26091]: ClearNamedBufferData (will be remapped) */ + /* _mesa_function_pool[26302]: ClearNamedBufferData (will be remapped) */ "iiiip\0" "glClearNamedBufferData\0" "\0" - /* _mesa_function_pool[26121]: Vertex3iv (offset 139) */ + /* _mesa_function_pool[26332]: Vertex3iv (offset 139) */ "p\0" "glVertex3iv\0" "\0" - /* _mesa_function_pool[26136]: UniformMatrix2x3dv (will be remapped) */ + /* _mesa_function_pool[26347]: UniformMatrix2x3dv (will be remapped) */ "iiip\0" "glUniformMatrix2x3dv\0" "\0" - /* _mesa_function_pool[26163]: TexCoord3dv (offset 111) */ + /* _mesa_function_pool[26374]: TexCoord3dv (offset 111) */ "p\0" "glTexCoord3dv\0" "\0" - /* _mesa_function_pool[26180]: GetProgramStringARB (will be remapped) */ + /* _mesa_function_pool[26391]: GetProgramStringARB (will be remapped) */ "iip\0" "glGetProgramStringARB\0" "\0" - /* _mesa_function_pool[26207]: VertexP3ui (will be remapped) */ + /* _mesa_function_pool[26418]: VertexP3ui (will be remapped) */ "ii\0" "glVertexP3ui\0" "\0" - /* _mesa_function_pool[26224]: CreateProgramObjectARB (will be remapped) */ + /* _mesa_function_pool[26435]: CreateProgramObjectARB (will be remapped) */ "\0" "glCreateProgramObjectARB\0" "\0" - /* _mesa_function_pool[26251]: UniformMatrix3fv (will be remapped) */ + /* _mesa_function_pool[26462]: UniformMatrix3fv (will be remapped) */ "iiip\0" "glUniformMatrix3fv\0" "glUniformMatrix3fvARB\0" "\0" - /* _mesa_function_pool[26298]: PrioritizeTextures (offset 331) */ + /* _mesa_function_pool[26509]: PrioritizeTextures (offset 331) */ "ipp\0" "glPrioritizeTextures\0" "glPrioritizeTexturesEXT\0" "\0" - /* _mesa_function_pool[26348]: VertexAttribI3uiEXT (will be remapped) */ + /* _mesa_function_pool[26559]: VertexAttribI3uiEXT (will be remapped) */ "iiii\0" "glVertexAttribI3uiEXT\0" "glVertexAttribI3ui\0" "\0" - /* _mesa_function_pool[26395]: AsyncMarkerSGIX (dynamic) */ + /* _mesa_function_pool[26606]: AsyncMarkerSGIX (dynamic) */ "i\0" "glAsyncMarkerSGIX\0" "\0" - /* _mesa_function_pool[26416]: GetProgramNamedParameterfvNV (will be remapped) */ + /* _mesa_function_pool[26627]: GetProgramNamedParameterfvNV (will be remapped) */ "iipp\0" "glGetProgramNamedParameterfvNV\0" "\0" - /* _mesa_function_pool[26453]: GetMaterialxv (will be remapped) */ + /* _mesa_function_pool[26664]: GetMaterialxv (will be remapped) */ "iip\0" "glGetMaterialxvOES\0" "glGetMaterialxv\0" "\0" - /* _mesa_function_pool[26493]: MatrixIndexusvARB (dynamic) */ + /* _mesa_function_pool[26704]: MatrixIndexusvARB (dynamic) */ "ip\0" "glMatrixIndexusvARB\0" "\0" - /* _mesa_function_pool[26517]: SecondaryColor3uiv (will be remapped) */ + /* _mesa_function_pool[26728]: SecondaryColor3uiv (will be remapped) */ "p\0" "glSecondaryColor3uiv\0" "glSecondaryColor3uivEXT\0" "\0" - /* _mesa_function_pool[26565]: EndConditionalRender (will be remapped) */ + /* _mesa_function_pool[26776]: EndConditionalRender (will be remapped) */ "\0" "glEndConditionalRender\0" "glEndConditionalRenderNV\0" "\0" - /* _mesa_function_pool[26615]: ProgramLocalParameter4dARB (will be remapped) */ + /* _mesa_function_pool[26826]: ProgramLocalParameter4dARB (will be remapped) */ "iidddd\0" "glProgramLocalParameter4dARB\0" "\0" - /* _mesa_function_pool[26652]: Color3sv (offset 18) */ + /* _mesa_function_pool[26863]: Color3sv (offset 18) */ "p\0" "glColor3sv\0" "\0" - /* _mesa_function_pool[26666]: GenFragmentShadersATI (will be remapped) */ + /* _mesa_function_pool[26877]: GenFragmentShadersATI (will be remapped) */ "i\0" "glGenFragmentShadersATI\0" "\0" - /* _mesa_function_pool[26693]: GetNamedBufferParameteriv (will be remapped) */ + /* _mesa_function_pool[26904]: GetNamedBufferParameteriv (will be remapped) */ "iip\0" "glGetNamedBufferParameteriv\0" "\0" - /* _mesa_function_pool[26726]: BlendEquationSeparateiARB (will be remapped) */ + /* _mesa_function_pool[26937]: BlendEquationSeparateiARB (will be remapped) */ "iii\0" "glBlendEquationSeparateiARB\0" "glBlendEquationSeparateIndexedAMD\0" @@ -3554,289 +3572,293 @@ "glBlendEquationSeparateiEXT\0" "glBlendEquationSeparateiOES\0" "\0" - /* _mesa_function_pool[26874]: TestFenceNV (dynamic) */ + /* _mesa_function_pool[27085]: TestFenceNV (dynamic) */ "i\0" "glTestFenceNV\0" "\0" - /* _mesa_function_pool[26891]: MultiTexCoord1fvARB (offset 379) */ + /* _mesa_function_pool[27102]: MultiTexCoord1fvARB (offset 379) */ "ip\0" "glMultiTexCoord1fv\0" "glMultiTexCoord1fvARB\0" "\0" - /* _mesa_function_pool[26936]: TexStorage2D (will be remapped) */ + /* _mesa_function_pool[27147]: TexStorage2D (will be remapped) */ "iiiii\0" "glTexStorage2D\0" "\0" - /* _mesa_function_pool[26958]: GetPixelTexGenParameterivSGIS (dynamic) */ + /* _mesa_function_pool[27169]: GetPixelTexGenParameterivSGIS (dynamic) */ "ip\0" "glGetPixelTexGenParameterivSGIS\0" "\0" - /* _mesa_function_pool[26994]: FramebufferTexture2D (will be remapped) */ + /* _mesa_function_pool[27205]: FramebufferTexture2D (will be remapped) */ "iiiii\0" "glFramebufferTexture2D\0" "glFramebufferTexture2DEXT\0" "glFramebufferTexture2DOES\0" "\0" - /* _mesa_function_pool[27076]: GetSamplerParameterfv (will be remapped) */ + /* _mesa_function_pool[27287]: GetSamplerParameterfv (will be remapped) */ "iip\0" "glGetSamplerParameterfv\0" "\0" - /* _mesa_function_pool[27105]: VertexAttrib2dv (will be remapped) */ + /* _mesa_function_pool[27316]: VertexAttrib2dv (will be remapped) */ "ip\0" "glVertexAttrib2dv\0" "glVertexAttrib2dvARB\0" "\0" - /* _mesa_function_pool[27148]: Vertex4sv (offset 149) */ + /* _mesa_function_pool[27359]: Vertex4sv (offset 149) */ "p\0" "glVertex4sv\0" "\0" - /* _mesa_function_pool[27163]: GetQueryObjecti64v (will be remapped) */ + /* _mesa_function_pool[27374]: GetQueryObjecti64v (will be remapped) */ "iip\0" "glGetQueryObjecti64v\0" "glGetQueryObjecti64vEXT\0" "\0" - /* _mesa_function_pool[27213]: ClampColor (will be remapped) */ + /* _mesa_function_pool[27424]: ClampColor (will be remapped) */ "ii\0" "glClampColorARB\0" "glClampColor\0" "\0" - /* _mesa_function_pool[27246]: TextureRangeAPPLE (dynamic) */ + /* _mesa_function_pool[27457]: TextureRangeAPPLE (dynamic) */ "iip\0" "glTextureRangeAPPLE\0" "\0" - /* _mesa_function_pool[27271]: ConvolutionFilter1D (offset 348) */ + /* _mesa_function_pool[27482]: DepthRangeArrayfvOES (will be remapped) */ + "iip\0" + "glDepthRangeArrayfvOES\0" + "\0" + /* _mesa_function_pool[27510]: ConvolutionFilter1D (offset 348) */ "iiiiip\0" "glConvolutionFilter1D\0" "glConvolutionFilter1DEXT\0" "\0" - /* _mesa_function_pool[27326]: DrawElementsIndirect (will be remapped) */ + /* _mesa_function_pool[27565]: DrawElementsIndirect (will be remapped) */ "iip\0" "glDrawElementsIndirect\0" "\0" - /* _mesa_function_pool[27354]: WindowPos3sv (will be remapped) */ + /* _mesa_function_pool[27593]: WindowPos3sv (will be remapped) */ "p\0" "glWindowPos3sv\0" "glWindowPos3svARB\0" "glWindowPos3svMESA\0" "\0" - /* _mesa_function_pool[27409]: FragmentMaterialfvSGIX (dynamic) */ + /* _mesa_function_pool[27648]: FragmentMaterialfvSGIX (dynamic) */ "iip\0" "glFragmentMaterialfvSGIX\0" "\0" - /* _mesa_function_pool[27439]: CallLists (offset 3) */ + /* _mesa_function_pool[27678]: CallLists (offset 3) */ "iip\0" "glCallLists\0" "\0" - /* _mesa_function_pool[27456]: AlphaFunc (offset 240) */ + /* _mesa_function_pool[27695]: AlphaFunc (offset 240) */ "if\0" "glAlphaFunc\0" "\0" - /* _mesa_function_pool[27472]: GetTextureParameterfv (will be remapped) */ + /* _mesa_function_pool[27711]: GetTextureParameterfv (will be remapped) */ "iip\0" "glGetTextureParameterfv\0" "\0" - /* _mesa_function_pool[27501]: EdgeFlag (offset 41) */ + /* _mesa_function_pool[27740]: EdgeFlag (offset 41) */ "i\0" "glEdgeFlag\0" "\0" - /* _mesa_function_pool[27515]: TexCoord2fNormal3fVertex3fvSUN (dynamic) */ + /* _mesa_function_pool[27754]: TexCoord2fNormal3fVertex3fvSUN (dynamic) */ "ppp\0" "glTexCoord2fNormal3fVertex3fvSUN\0" "\0" - /* _mesa_function_pool[27553]: EdgeFlagv (offset 42) */ + /* _mesa_function_pool[27792]: EdgeFlagv (offset 42) */ "p\0" "glEdgeFlagv\0" "\0" - /* _mesa_function_pool[27568]: DepthRangex (will be remapped) */ + /* _mesa_function_pool[27807]: DepthRangex (will be remapped) */ "ii\0" "glDepthRangexOES\0" "glDepthRangex\0" "\0" - /* _mesa_function_pool[27603]: ReplacementCodeubvSUN (dynamic) */ + /* _mesa_function_pool[27842]: ReplacementCodeubvSUN (dynamic) */ "p\0" "glReplacementCodeubvSUN\0" "\0" - /* _mesa_function_pool[27630]: VDPAUInitNV (will be remapped) */ + /* _mesa_function_pool[27869]: VDPAUInitNV (will be remapped) */ "pp\0" "glVDPAUInitNV\0" "\0" - /* _mesa_function_pool[27648]: GetBufferParameteri64v (will be remapped) */ + /* _mesa_function_pool[27887]: GetBufferParameteri64v (will be remapped) */ "iip\0" "glGetBufferParameteri64v\0" "\0" - /* _mesa_function_pool[27678]: CreateProgram (will be remapped) */ + /* _mesa_function_pool[27917]: CreateProgram (will be remapped) */ "\0" "glCreateProgram\0" "\0" - /* _mesa_function_pool[27696]: DepthRangef (will be remapped) */ + /* _mesa_function_pool[27935]: DepthRangef (will be remapped) */ "ff\0" "glDepthRangef\0" "glDepthRangefOES\0" "\0" - /* _mesa_function_pool[27731]: TextureParameteriv (will be remapped) */ + /* _mesa_function_pool[27970]: TextureParameteriv (will be remapped) */ "iip\0" "glTextureParameteriv\0" "\0" - /* _mesa_function_pool[27757]: ColorFragmentOp3ATI (will be remapped) */ + /* _mesa_function_pool[27996]: ColorFragmentOp3ATI (will be remapped) */ "iiiiiiiiiiiii\0" "glColorFragmentOp3ATI\0" "\0" - /* _mesa_function_pool[27794]: ValidateProgram (will be remapped) */ + /* _mesa_function_pool[28033]: ValidateProgram (will be remapped) */ "i\0" "glValidateProgram\0" "glValidateProgramARB\0" "\0" - /* _mesa_function_pool[27836]: VertexPointerEXT (will be remapped) */ + /* _mesa_function_pool[28075]: VertexPointerEXT (will be remapped) */ "iiiip\0" "glVertexPointerEXT\0" "\0" - /* _mesa_function_pool[27862]: VertexAttribI4sv (will be remapped) */ + /* _mesa_function_pool[28101]: VertexAttribI4sv (will be remapped) */ "ip\0" "glVertexAttribI4svEXT\0" "glVertexAttribI4sv\0" "\0" - /* _mesa_function_pool[27907]: Scissor (offset 176) */ + /* _mesa_function_pool[28146]: Scissor (offset 176) */ "iiii\0" "glScissor\0" "\0" - /* _mesa_function_pool[27923]: BeginTransformFeedback (will be remapped) */ + /* _mesa_function_pool[28162]: BeginTransformFeedback (will be remapped) */ "i\0" "glBeginTransformFeedback\0" "glBeginTransformFeedbackEXT\0" "\0" - /* _mesa_function_pool[27979]: TexCoord2i (offset 106) */ + /* _mesa_function_pool[28218]: TexCoord2i (offset 106) */ "ii\0" "glTexCoord2i\0" "\0" - /* _mesa_function_pool[27996]: VertexArrayAttribBinding (will be remapped) */ + /* _mesa_function_pool[28235]: VertexArrayAttribBinding (will be remapped) */ "iii\0" "glVertexArrayAttribBinding\0" "\0" - /* _mesa_function_pool[28028]: Color4ui (offset 37) */ + /* _mesa_function_pool[28267]: Color4ui (offset 37) */ "iiii\0" "glColor4ui\0" "\0" - /* _mesa_function_pool[28045]: TexCoord2f (offset 104) */ + /* _mesa_function_pool[28284]: TexCoord2f (offset 104) */ "ff\0" "glTexCoord2f\0" "\0" - /* _mesa_function_pool[28062]: TexCoord2d (offset 102) */ + /* _mesa_function_pool[28301]: TexCoord2d (offset 102) */ "dd\0" "glTexCoord2d\0" "\0" - /* _mesa_function_pool[28079]: GetTransformFeedbackiv (will be remapped) */ + /* _mesa_function_pool[28318]: GetTransformFeedbackiv (will be remapped) */ "iip\0" "glGetTransformFeedbackiv\0" "\0" - /* _mesa_function_pool[28109]: TexCoord2s (offset 108) */ + /* _mesa_function_pool[28348]: TexCoord2s (offset 108) */ "ii\0" "glTexCoord2s\0" "\0" - /* _mesa_function_pool[28126]: PointSizePointerOES (will be remapped) */ + /* _mesa_function_pool[28365]: PointSizePointerOES (will be remapped) */ "iip\0" "glPointSizePointerOES\0" "\0" - /* _mesa_function_pool[28153]: Color4us (offset 39) */ + /* _mesa_function_pool[28392]: Color4us (offset 39) */ "iiii\0" "glColor4us\0" "\0" - /* _mesa_function_pool[28170]: Color3bv (offset 10) */ + /* _mesa_function_pool[28409]: Color3bv (offset 10) */ "p\0" "glColor3bv\0" "\0" - /* _mesa_function_pool[28184]: PrimitiveRestartNV (will be remapped) */ + /* _mesa_function_pool[28423]: PrimitiveRestartNV (will be remapped) */ "\0" "glPrimitiveRestartNV\0" "\0" - /* _mesa_function_pool[28207]: BindBufferOffsetEXT (will be remapped) */ + /* _mesa_function_pool[28446]: BindBufferOffsetEXT (will be remapped) */ "iiii\0" "glBindBufferOffsetEXT\0" "\0" - /* _mesa_function_pool[28235]: ProvokingVertex (will be remapped) */ + /* _mesa_function_pool[28474]: ProvokingVertex (will be remapped) */ "i\0" "glProvokingVertexEXT\0" "glProvokingVertex\0" "\0" - /* _mesa_function_pool[28277]: VertexAttribs4fvNV (will be remapped) */ + /* _mesa_function_pool[28516]: VertexAttribs4fvNV (will be remapped) */ "iip\0" "glVertexAttribs4fvNV\0" "\0" - /* _mesa_function_pool[28303]: MapControlPointsNV (dynamic) */ + /* _mesa_function_pool[28542]: MapControlPointsNV (dynamic) */ "iiiiiiiip\0" "glMapControlPointsNV\0" "\0" - /* _mesa_function_pool[28335]: Vertex2i (offset 130) */ + /* _mesa_function_pool[28574]: Vertex2i (offset 130) */ "ii\0" "glVertex2i\0" "\0" - /* _mesa_function_pool[28350]: HintPGI (dynamic) */ + /* _mesa_function_pool[28589]: HintPGI (dynamic) */ "ii\0" "glHintPGI\0" "\0" - /* _mesa_function_pool[28364]: GetQueryBufferObjecti64v (will be remapped) */ + /* _mesa_function_pool[28603]: GetQueryBufferObjecti64v (will be remapped) */ "iiii\0" "glGetQueryBufferObjecti64v\0" "\0" - /* _mesa_function_pool[28397]: InterleavedArrays (offset 317) */ + /* _mesa_function_pool[28636]: InterleavedArrays (offset 317) */ "iip\0" "glInterleavedArrays\0" "\0" - /* _mesa_function_pool[28422]: RasterPos2fv (offset 65) */ + /* _mesa_function_pool[28661]: RasterPos2fv (offset 65) */ "p\0" "glRasterPos2fv\0" "\0" - /* _mesa_function_pool[28440]: TexCoord1fv (offset 97) */ + /* _mesa_function_pool[28679]: TexCoord1fv (offset 97) */ "p\0" "glTexCoord1fv\0" "\0" - /* _mesa_function_pool[28457]: ProgramNamedParameter4fNV (will be remapped) */ + /* _mesa_function_pool[28696]: ProgramNamedParameter4fNV (will be remapped) */ "iipffff\0" "glProgramNamedParameter4fNV\0" "\0" - /* _mesa_function_pool[28494]: MultiTexCoord4dv (offset 401) */ + /* _mesa_function_pool[28733]: MultiTexCoord4dv (offset 401) */ "ip\0" "glMultiTexCoord4dv\0" "glMultiTexCoord4dvARB\0" "\0" - /* _mesa_function_pool[28539]: ProgramEnvParameter4fvARB (will be remapped) */ + /* _mesa_function_pool[28778]: ProgramEnvParameter4fvARB (will be remapped) */ "iip\0" "glProgramEnvParameter4fvARB\0" "glProgramParameter4fvNV\0" "\0" - /* _mesa_function_pool[28596]: RasterPos4fv (offset 81) */ + /* _mesa_function_pool[28835]: RasterPos4fv (offset 81) */ "p\0" "glRasterPos4fv\0" "\0" - /* _mesa_function_pool[28614]: FragmentLightModeliSGIX (dynamic) */ + /* _mesa_function_pool[28853]: FragmentLightModeliSGIX (dynamic) */ "ii\0" "glFragmentLightModeliSGIX\0" "\0" - /* _mesa_function_pool[28644]: PushMatrix (offset 298) */ + /* _mesa_function_pool[28883]: PushMatrix (offset 298) */ "\0" "glPushMatrix\0" "\0" - /* _mesa_function_pool[28659]: EndList (offset 1) */ + /* _mesa_function_pool[28898]: EndList (offset 1) */ "\0" "glEndList\0" "\0" - /* _mesa_function_pool[28671]: DrawRangeElements (offset 338) */ + /* _mesa_function_pool[28910]: DrawRangeElements (offset 338) */ "iiiiip\0" "glDrawRangeElements\0" "glDrawRangeElementsEXT\0" "\0" - /* _mesa_function_pool[28722]: GetTexGenxvOES (will be remapped) */ + /* _mesa_function_pool[28961]: GetTexGenxvOES (will be remapped) */ "iip\0" "glGetTexGenxvOES\0" "\0" - /* _mesa_function_pool[28744]: VertexAttribs4dvNV (will be remapped) */ + /* _mesa_function_pool[28983]: VertexAttribs4dvNV (will be remapped) */ "iip\0" "glVertexAttribs4dvNV\0" "\0" - /* _mesa_function_pool[28770]: DrawTexfvOES (will be remapped) */ + /* _mesa_function_pool[29009]: DrawTexfvOES (will be remapped) */ "p\0" "glDrawTexfvOES\0" "\0" - /* _mesa_function_pool[28788]: BlendFunciARB (will be remapped) */ + /* _mesa_function_pool[29027]: BlendFunciARB (will be remapped) */ "iii\0" "glBlendFunciARB\0" "glBlendFuncIndexedAMD\0" @@ -3844,444 +3866,445 @@ "glBlendFunciEXT\0" "glBlendFunciOES\0" "\0" - /* _mesa_function_pool[28876]: ClearNamedFramebufferfi (will be remapped) */ + /* _mesa_function_pool[29115]: ClearNamedFramebufferfi (will be remapped) */ "iiifi\0" "glClearNamedFramebufferfi\0" "\0" - /* _mesa_function_pool[28909]: ClearNamedFramebufferfv (will be remapped) */ + /* _mesa_function_pool[29148]: ClearNamedFramebufferfv (will be remapped) */ "iiip\0" "glClearNamedFramebufferfv\0" "\0" - /* _mesa_function_pool[28941]: GlobalAlphaFactorbSUN (dynamic) */ + /* _mesa_function_pool[29180]: GlobalAlphaFactorbSUN (dynamic) */ "i\0" "glGlobalAlphaFactorbSUN\0" "\0" - /* _mesa_function_pool[28968]: Uniform2ui (will be remapped) */ + /* _mesa_function_pool[29207]: Uniform2ui (will be remapped) */ "iii\0" "glUniform2uiEXT\0" "glUniform2ui\0" "\0" - /* _mesa_function_pool[29002]: ScissorIndexed (will be remapped) */ + /* _mesa_function_pool[29241]: ScissorIndexed (will be remapped) */ "iiiii\0" "glScissorIndexed\0" + "glScissorIndexedOES\0" "\0" - /* _mesa_function_pool[29026]: End (offset 43) */ + /* _mesa_function_pool[29285]: End (offset 43) */ "\0" "glEnd\0" "\0" - /* _mesa_function_pool[29034]: NamedFramebufferParameteri (will be remapped) */ + /* _mesa_function_pool[29293]: NamedFramebufferParameteri (will be remapped) */ "iii\0" "glNamedFramebufferParameteri\0" "\0" - /* _mesa_function_pool[29068]: BindVertexBuffers (will be remapped) */ + /* _mesa_function_pool[29327]: BindVertexBuffers (will be remapped) */ "iippp\0" "glBindVertexBuffers\0" "\0" - /* _mesa_function_pool[29095]: GetSamplerParameteriv (will be remapped) */ + /* _mesa_function_pool[29354]: GetSamplerParameteriv (will be remapped) */ "iip\0" "glGetSamplerParameteriv\0" "\0" - /* _mesa_function_pool[29124]: GenProgramPipelines (will be remapped) */ + /* _mesa_function_pool[29383]: GenProgramPipelines (will be remapped) */ "ip\0" "glGenProgramPipelines\0" "glGenProgramPipelinesEXT\0" "\0" - /* _mesa_function_pool[29175]: Enable (offset 215) */ + /* _mesa_function_pool[29434]: Enable (offset 215) */ "i\0" "glEnable\0" "\0" - /* _mesa_function_pool[29187]: IsProgramPipeline (will be remapped) */ + /* _mesa_function_pool[29446]: IsProgramPipeline (will be remapped) */ "i\0" "glIsProgramPipeline\0" "glIsProgramPipelineEXT\0" "\0" - /* _mesa_function_pool[29233]: ShaderBinary (will be remapped) */ + /* _mesa_function_pool[29492]: ShaderBinary (will be remapped) */ "ipipi\0" "glShaderBinary\0" "\0" - /* _mesa_function_pool[29255]: GetFragmentMaterialivSGIX (dynamic) */ + /* _mesa_function_pool[29514]: GetFragmentMaterialivSGIX (dynamic) */ "iip\0" "glGetFragmentMaterialivSGIX\0" "\0" - /* _mesa_function_pool[29288]: WeightPointerARB (dynamic) */ + /* _mesa_function_pool[29547]: WeightPointerARB (dynamic) */ "iiip\0" "glWeightPointerARB\0" "glWeightPointerOES\0" "\0" - /* _mesa_function_pool[29332]: TextureSubImage1D (will be remapped) */ + /* _mesa_function_pool[29591]: TextureSubImage1D (will be remapped) */ "iiiiiip\0" "glTextureSubImage1D\0" "\0" - /* _mesa_function_pool[29361]: Normal3x (will be remapped) */ + /* _mesa_function_pool[29620]: Normal3x (will be remapped) */ "iii\0" "glNormal3xOES\0" "glNormal3x\0" "\0" - /* _mesa_function_pool[29391]: VertexAttrib4fARB (will be remapped) */ + /* _mesa_function_pool[29650]: VertexAttrib4fARB (will be remapped) */ "iffff\0" "glVertexAttrib4f\0" "glVertexAttrib4fARB\0" "\0" - /* _mesa_function_pool[29435]: TexCoord4fv (offset 121) */ + /* _mesa_function_pool[29694]: TexCoord4fv (offset 121) */ "p\0" "glTexCoord4fv\0" "\0" - /* _mesa_function_pool[29452]: ReadnPixelsARB (will be remapped) */ + /* _mesa_function_pool[29711]: ReadnPixelsARB (will be remapped) */ "iiiiiiip\0" "glReadnPixelsARB\0" "glReadnPixels\0" "glReadnPixelsKHR\0" "\0" - /* _mesa_function_pool[29510]: InvalidateTexSubImage (will be remapped) */ + /* _mesa_function_pool[29769]: InvalidateTexSubImage (will be remapped) */ "iiiiiiii\0" "glInvalidateTexSubImage\0" "\0" - /* _mesa_function_pool[29544]: Normal3s (offset 60) */ + /* _mesa_function_pool[29803]: Normal3s (offset 60) */ "iii\0" "glNormal3s\0" "\0" - /* _mesa_function_pool[29560]: Materialxv (will be remapped) */ + /* _mesa_function_pool[29819]: Materialxv (will be remapped) */ "iip\0" "glMaterialxvOES\0" "glMaterialxv\0" "\0" - /* _mesa_function_pool[29594]: Normal3i (offset 58) */ + /* _mesa_function_pool[29853]: Normal3i (offset 58) */ "iii\0" "glNormal3i\0" "\0" - /* _mesa_function_pool[29610]: ProgramNamedParameter4fvNV (will be remapped) */ + /* _mesa_function_pool[29869]: ProgramNamedParameter4fvNV (will be remapped) */ "iipp\0" "glProgramNamedParameter4fvNV\0" "\0" - /* _mesa_function_pool[29645]: Normal3b (offset 52) */ + /* _mesa_function_pool[29904]: Normal3b (offset 52) */ "iii\0" "glNormal3b\0" "\0" - /* _mesa_function_pool[29661]: Normal3d (offset 54) */ + /* _mesa_function_pool[29920]: Normal3d (offset 54) */ "ddd\0" "glNormal3d\0" "\0" - /* _mesa_function_pool[29677]: Normal3f (offset 56) */ + /* _mesa_function_pool[29936]: Normal3f (offset 56) */ "fff\0" "glNormal3f\0" "\0" - /* _mesa_function_pool[29693]: Indexi (offset 48) */ + /* _mesa_function_pool[29952]: Indexi (offset 48) */ "i\0" "glIndexi\0" "\0" - /* _mesa_function_pool[29705]: Uniform1uiv (will be remapped) */ + /* _mesa_function_pool[29964]: Uniform1uiv (will be remapped) */ "iip\0" "glUniform1uivEXT\0" "glUniform1uiv\0" "\0" - /* _mesa_function_pool[29741]: VertexAttribI2uiEXT (will be remapped) */ + /* _mesa_function_pool[30000]: VertexAttribI2uiEXT (will be remapped) */ "iii\0" "glVertexAttribI2uiEXT\0" "glVertexAttribI2ui\0" "\0" - /* _mesa_function_pool[29787]: IsRenderbuffer (will be remapped) */ + /* _mesa_function_pool[30046]: IsRenderbuffer (will be remapped) */ "i\0" "glIsRenderbuffer\0" "glIsRenderbufferEXT\0" "glIsRenderbufferOES\0" "\0" - /* _mesa_function_pool[29847]: NormalP3uiv (will be remapped) */ + /* _mesa_function_pool[30106]: NormalP3uiv (will be remapped) */ "ip\0" "glNormalP3uiv\0" "\0" - /* _mesa_function_pool[29865]: Indexf (offset 46) */ + /* _mesa_function_pool[30124]: Indexf (offset 46) */ "f\0" "glIndexf\0" "\0" - /* _mesa_function_pool[29877]: Indexd (offset 44) */ + /* _mesa_function_pool[30136]: Indexd (offset 44) */ "d\0" "glIndexd\0" "\0" - /* _mesa_function_pool[29889]: GetMaterialiv (offset 270) */ + /* _mesa_function_pool[30148]: GetMaterialiv (offset 270) */ "iip\0" "glGetMaterialiv\0" "\0" - /* _mesa_function_pool[29910]: Indexs (offset 50) */ + /* _mesa_function_pool[30169]: Indexs (offset 50) */ "i\0" "glIndexs\0" "\0" - /* _mesa_function_pool[29922]: MultiTexCoordP1uiv (will be remapped) */ + /* _mesa_function_pool[30181]: MultiTexCoordP1uiv (will be remapped) */ "iip\0" "glMultiTexCoordP1uiv\0" "\0" - /* _mesa_function_pool[29948]: ConvolutionFilter2D (offset 349) */ + /* _mesa_function_pool[30207]: ConvolutionFilter2D (offset 349) */ "iiiiiip\0" "glConvolutionFilter2D\0" "glConvolutionFilter2DEXT\0" "\0" - /* _mesa_function_pool[30004]: Vertex2d (offset 126) */ + /* _mesa_function_pool[30263]: Vertex2d (offset 126) */ "dd\0" "glVertex2d\0" "\0" - /* _mesa_function_pool[30019]: Vertex2f (offset 128) */ + /* _mesa_function_pool[30278]: Vertex2f (offset 128) */ "ff\0" "glVertex2f\0" "\0" - /* _mesa_function_pool[30034]: Color4bv (offset 26) */ + /* _mesa_function_pool[30293]: Color4bv (offset 26) */ "p\0" "glColor4bv\0" "\0" - /* _mesa_function_pool[30048]: ProgramUniformMatrix3x2dv (will be remapped) */ + /* _mesa_function_pool[30307]: ProgramUniformMatrix3x2dv (will be remapped) */ "iiiip\0" "glProgramUniformMatrix3x2dv\0" "\0" - /* _mesa_function_pool[30083]: VertexAttrib2fvNV (will be remapped) */ + /* _mesa_function_pool[30342]: VertexAttrib2fvNV (will be remapped) */ "ip\0" "glVertexAttrib2fvNV\0" "\0" - /* _mesa_function_pool[30107]: Vertex2s (offset 132) */ + /* _mesa_function_pool[30366]: Vertex2s (offset 132) */ "ii\0" "glVertex2s\0" "\0" - /* _mesa_function_pool[30122]: ActiveTexture (offset 374) */ + /* _mesa_function_pool[30381]: ActiveTexture (offset 374) */ "i\0" "glActiveTexture\0" "glActiveTextureARB\0" "\0" - /* _mesa_function_pool[30160]: GlobalAlphaFactorfSUN (dynamic) */ + /* _mesa_function_pool[30419]: GlobalAlphaFactorfSUN (dynamic) */ "f\0" "glGlobalAlphaFactorfSUN\0" "\0" - /* _mesa_function_pool[30187]: InvalidateNamedFramebufferSubData (will be remapped) */ + /* _mesa_function_pool[30446]: InvalidateNamedFramebufferSubData (will be remapped) */ "iipiiii\0" "glInvalidateNamedFramebufferSubData\0" "\0" - /* _mesa_function_pool[30232]: ColorP4uiv (will be remapped) */ + /* _mesa_function_pool[30491]: ColorP4uiv (will be remapped) */ "ip\0" "glColorP4uiv\0" "\0" - /* _mesa_function_pool[30249]: DrawTexxOES (will be remapped) */ + /* _mesa_function_pool[30508]: DrawTexxOES (will be remapped) */ "iiiii\0" "glDrawTexxOES\0" "\0" - /* _mesa_function_pool[30270]: SetFenceNV (dynamic) */ + /* _mesa_function_pool[30529]: SetFenceNV (dynamic) */ "ii\0" "glSetFenceNV\0" "\0" - /* _mesa_function_pool[30287]: PixelTexGenParameterivSGIS (dynamic) */ + /* _mesa_function_pool[30546]: PixelTexGenParameterivSGIS (dynamic) */ "ip\0" "glPixelTexGenParameterivSGIS\0" "\0" - /* _mesa_function_pool[30320]: MultiTexCoordP3ui (will be remapped) */ + /* _mesa_function_pool[30579]: MultiTexCoordP3ui (will be remapped) */ "iii\0" "glMultiTexCoordP3ui\0" "\0" - /* _mesa_function_pool[30345]: GetAttribLocation (will be remapped) */ + /* _mesa_function_pool[30604]: GetAttribLocation (will be remapped) */ "ip\0" "glGetAttribLocation\0" "glGetAttribLocationARB\0" "\0" - /* _mesa_function_pool[30392]: GetCombinerStageParameterfvNV (dynamic) */ + /* _mesa_function_pool[30651]: GetCombinerStageParameterfvNV (dynamic) */ "iip\0" "glGetCombinerStageParameterfvNV\0" "\0" - /* _mesa_function_pool[30429]: DrawBuffer (offset 202) */ + /* _mesa_function_pool[30688]: DrawBuffer (offset 202) */ "i\0" "glDrawBuffer\0" "\0" - /* _mesa_function_pool[30445]: MultiTexCoord2dv (offset 385) */ + /* _mesa_function_pool[30704]: MultiTexCoord2dv (offset 385) */ "ip\0" "glMultiTexCoord2dv\0" "glMultiTexCoord2dvARB\0" "\0" - /* _mesa_function_pool[30490]: IsSampler (will be remapped) */ + /* _mesa_function_pool[30749]: IsSampler (will be remapped) */ "i\0" "glIsSampler\0" "\0" - /* _mesa_function_pool[30505]: BlendFunc (offset 241) */ + /* _mesa_function_pool[30764]: BlendFunc (offset 241) */ "ii\0" "glBlendFunc\0" "\0" - /* _mesa_function_pool[30521]: NamedRenderbufferStorageMultisample (will be remapped) */ + /* _mesa_function_pool[30780]: NamedRenderbufferStorageMultisample (will be remapped) */ "iiiii\0" "glNamedRenderbufferStorageMultisample\0" "\0" - /* _mesa_function_pool[30566]: Tangent3fvEXT (dynamic) */ + /* _mesa_function_pool[30825]: Tangent3fvEXT (dynamic) */ "p\0" "glTangent3fvEXT\0" "\0" - /* _mesa_function_pool[30585]: ColorMaterial (offset 151) */ + /* _mesa_function_pool[30844]: ColorMaterial (offset 151) */ "ii\0" "glColorMaterial\0" "\0" - /* _mesa_function_pool[30605]: RasterPos3sv (offset 77) */ + /* _mesa_function_pool[30864]: RasterPos3sv (offset 77) */ "p\0" "glRasterPos3sv\0" "\0" - /* _mesa_function_pool[30623]: TexCoordP2ui (will be remapped) */ + /* _mesa_function_pool[30882]: TexCoordP2ui (will be remapped) */ "ii\0" "glTexCoordP2ui\0" "\0" - /* _mesa_function_pool[30642]: TexParameteriv (offset 181) */ + /* _mesa_function_pool[30901]: TexParameteriv (offset 181) */ "iip\0" "glTexParameteriv\0" "\0" - /* _mesa_function_pool[30664]: VertexAttrib3fvARB (will be remapped) */ + /* _mesa_function_pool[30923]: VertexAttrib3fvARB (will be remapped) */ "ip\0" "glVertexAttrib3fv\0" "glVertexAttrib3fvARB\0" "\0" - /* _mesa_function_pool[30707]: ProgramUniformMatrix3x4fv (will be remapped) */ + /* _mesa_function_pool[30966]: ProgramUniformMatrix3x4fv (will be remapped) */ "iiiip\0" "glProgramUniformMatrix3x4fv\0" "glProgramUniformMatrix3x4fvEXT\0" "\0" - /* _mesa_function_pool[30773]: PixelTransformParameterfEXT (dynamic) */ + /* _mesa_function_pool[31032]: PixelTransformParameterfEXT (dynamic) */ "iif\0" "glPixelTransformParameterfEXT\0" "\0" - /* _mesa_function_pool[30808]: TextureColorMaskSGIS (dynamic) */ + /* _mesa_function_pool[31067]: TextureColorMaskSGIS (dynamic) */ "iiii\0" "glTextureColorMaskSGIS\0" "\0" - /* _mesa_function_pool[30837]: GetColorTable (offset 343) */ + /* _mesa_function_pool[31096]: GetColorTable (offset 343) */ "iiip\0" "glGetColorTable\0" "glGetColorTableSGI\0" "glGetColorTableEXT\0" "\0" - /* _mesa_function_pool[30897]: TexCoord3i (offset 114) */ + /* _mesa_function_pool[31156]: TexCoord3i (offset 114) */ "iii\0" "glTexCoord3i\0" "\0" - /* _mesa_function_pool[30915]: CopyColorTable (offset 342) */ + /* _mesa_function_pool[31174]: CopyColorTable (offset 342) */ "iiiii\0" "glCopyColorTable\0" "glCopyColorTableSGI\0" "\0" - /* _mesa_function_pool[30959]: Frustum (offset 289) */ + /* _mesa_function_pool[31218]: Frustum (offset 289) */ "dddddd\0" "glFrustum\0" "\0" - /* _mesa_function_pool[30977]: TexCoord3d (offset 110) */ + /* _mesa_function_pool[31236]: TexCoord3d (offset 110) */ "ddd\0" "glTexCoord3d\0" "\0" - /* _mesa_function_pool[30995]: GetTextureParameteriv (will be remapped) */ + /* _mesa_function_pool[31254]: GetTextureParameteriv (will be remapped) */ "iip\0" "glGetTextureParameteriv\0" "\0" - /* _mesa_function_pool[31024]: TexCoord3f (offset 112) */ + /* _mesa_function_pool[31283]: TexCoord3f (offset 112) */ "fff\0" "glTexCoord3f\0" "\0" - /* _mesa_function_pool[31042]: DepthRangeArrayv (will be remapped) */ + /* _mesa_function_pool[31301]: DepthRangeArrayv (will be remapped) */ "iip\0" "glDepthRangeArrayv\0" "\0" - /* _mesa_function_pool[31066]: DeleteTextures (offset 327) */ + /* _mesa_function_pool[31325]: DeleteTextures (offset 327) */ "ip\0" "glDeleteTextures\0" "glDeleteTexturesEXT\0" "\0" - /* _mesa_function_pool[31107]: TexCoordPointerEXT (will be remapped) */ + /* _mesa_function_pool[31366]: TexCoordPointerEXT (will be remapped) */ "iiiip\0" "glTexCoordPointerEXT\0" "\0" - /* _mesa_function_pool[31135]: TexCoord3s (offset 116) */ + /* _mesa_function_pool[31394]: TexCoord3s (offset 116) */ "iii\0" "glTexCoord3s\0" "\0" - /* _mesa_function_pool[31153]: GetTexLevelParameteriv (offset 285) */ + /* _mesa_function_pool[31412]: GetTexLevelParameteriv (offset 285) */ "iiip\0" "glGetTexLevelParameteriv\0" "\0" - /* _mesa_function_pool[31184]: TextureParameterIuiv (will be remapped) */ + /* _mesa_function_pool[31443]: TextureParameterIuiv (will be remapped) */ "iip\0" "glTextureParameterIuiv\0" "\0" - /* _mesa_function_pool[31212]: CombinerStageParameterfvNV (dynamic) */ + /* _mesa_function_pool[31471]: CombinerStageParameterfvNV (dynamic) */ "iip\0" "glCombinerStageParameterfvNV\0" "\0" - /* _mesa_function_pool[31246]: GenPerfMonitorsAMD (will be remapped) */ + /* _mesa_function_pool[31505]: GenPerfMonitorsAMD (will be remapped) */ "ip\0" "glGenPerfMonitorsAMD\0" "\0" - /* _mesa_function_pool[31271]: ClearAccum (offset 204) */ + /* _mesa_function_pool[31530]: ClearAccum (offset 204) */ "ffff\0" "glClearAccum\0" "\0" - /* _mesa_function_pool[31290]: DeformSGIX (dynamic) */ + /* _mesa_function_pool[31549]: DeformSGIX (dynamic) */ "i\0" "glDeformSGIX\0" "\0" - /* _mesa_function_pool[31306]: TexCoord4iv (offset 123) */ + /* _mesa_function_pool[31565]: TexCoord4iv (offset 123) */ "p\0" "glTexCoord4iv\0" "\0" - /* _mesa_function_pool[31323]: TexStorage3D (will be remapped) */ + /* _mesa_function_pool[31582]: TexStorage3D (will be remapped) */ "iiiiii\0" "glTexStorage3D\0" "\0" - /* _mesa_function_pool[31346]: FramebufferTexture3D (will be remapped) */ + /* _mesa_function_pool[31605]: FramebufferTexture3D (will be remapped) */ "iiiiii\0" "glFramebufferTexture3D\0" "glFramebufferTexture3DEXT\0" "glFramebufferTexture3DOES\0" "\0" - /* _mesa_function_pool[31429]: FragmentLightModelfvSGIX (dynamic) */ + /* _mesa_function_pool[31688]: FragmentLightModelfvSGIX (dynamic) */ "ip\0" "glFragmentLightModelfvSGIX\0" "\0" - /* _mesa_function_pool[31460]: GetBufferParameteriv (will be remapped) */ + /* _mesa_function_pool[31719]: GetBufferParameteriv (will be remapped) */ "iip\0" "glGetBufferParameteriv\0" "glGetBufferParameterivARB\0" "\0" - /* _mesa_function_pool[31514]: VertexAttrib2fNV (will be remapped) */ + /* _mesa_function_pool[31773]: VertexAttrib2fNV (will be remapped) */ "iff\0" "glVertexAttrib2fNV\0" "\0" - /* _mesa_function_pool[31538]: GetFragmentLightfvSGIX (dynamic) */ + /* _mesa_function_pool[31797]: GetFragmentLightfvSGIX (dynamic) */ "iip\0" "glGetFragmentLightfvSGIX\0" "\0" - /* _mesa_function_pool[31568]: CopyTexImage2D (offset 324) */ + /* _mesa_function_pool[31827]: CopyTexImage2D (offset 324) */ "iiiiiiii\0" "glCopyTexImage2D\0" "glCopyTexImage2DEXT\0" "\0" - /* _mesa_function_pool[31615]: Vertex3fv (offset 137) */ + /* _mesa_function_pool[31874]: Vertex3fv (offset 137) */ "p\0" "glVertex3fv\0" "\0" - /* _mesa_function_pool[31630]: WindowPos4dvMESA (will be remapped) */ + /* _mesa_function_pool[31889]: WindowPos4dvMESA (will be remapped) */ "p\0" "glWindowPos4dvMESA\0" "\0" - /* _mesa_function_pool[31652]: MultiTexCoordP2ui (will be remapped) */ + /* _mesa_function_pool[31911]: MultiTexCoordP2ui (will be remapped) */ "iii\0" "glMultiTexCoordP2ui\0" "\0" - /* _mesa_function_pool[31677]: VertexAttribs1dvNV (will be remapped) */ + /* _mesa_function_pool[31936]: VertexAttribs1dvNV (will be remapped) */ "iip\0" "glVertexAttribs1dvNV\0" "\0" - /* _mesa_function_pool[31703]: IsQuery (will be remapped) */ + /* _mesa_function_pool[31962]: IsQuery (will be remapped) */ "i\0" "glIsQuery\0" "glIsQueryARB\0" "\0" - /* _mesa_function_pool[31729]: EdgeFlagPointerEXT (will be remapped) */ + /* _mesa_function_pool[31988]: EdgeFlagPointerEXT (will be remapped) */ "iip\0" "glEdgeFlagPointerEXT\0" "\0" - /* _mesa_function_pool[31755]: VertexAttribs2svNV (will be remapped) */ + /* _mesa_function_pool[32014]: VertexAttribs2svNV (will be remapped) */ "iip\0" "glVertexAttribs2svNV\0" "\0" - /* _mesa_function_pool[31781]: CreateShaderProgramv (will be remapped) */ + /* _mesa_function_pool[32040]: CreateShaderProgramv (will be remapped) */ "iip\0" "glCreateShaderProgramv\0" "glCreateShaderProgramvEXT\0" "\0" - /* _mesa_function_pool[31835]: BlendEquationiARB (will be remapped) */ + /* _mesa_function_pool[32094]: BlendEquationiARB (will be remapped) */ "ii\0" "glBlendEquationiARB\0" "glBlendEquationIndexedAMD\0" @@ -4289,2557 +4312,2572 @@ "glBlendEquationiEXT\0" "glBlendEquationiOES\0" "\0" - /* _mesa_function_pool[31942]: VertexAttribI4uivEXT (will be remapped) */ + /* _mesa_function_pool[32201]: VertexAttribI4uivEXT (will be remapped) */ "ip\0" "glVertexAttribI4uivEXT\0" "glVertexAttribI4uiv\0" "\0" - /* _mesa_function_pool[31989]: PointSizex (will be remapped) */ + /* _mesa_function_pool[32248]: PointSizex (will be remapped) */ "i\0" "glPointSizexOES\0" "glPointSizex\0" "\0" - /* _mesa_function_pool[32021]: PolygonMode (offset 174) */ + /* _mesa_function_pool[32280]: PolygonMode (offset 174) */ "ii\0" "glPolygonMode\0" "\0" - /* _mesa_function_pool[32039]: CreateFramebuffers (will be remapped) */ + /* _mesa_function_pool[32298]: CreateFramebuffers (will be remapped) */ "ip\0" "glCreateFramebuffers\0" "\0" - /* _mesa_function_pool[32064]: VertexAttribI1iEXT (will be remapped) */ + /* _mesa_function_pool[32323]: VertexAttribI1iEXT (will be remapped) */ "ii\0" "glVertexAttribI1iEXT\0" "glVertexAttribI1i\0" "\0" - /* _mesa_function_pool[32107]: VertexAttrib4Niv (will be remapped) */ + /* _mesa_function_pool[32366]: VertexAttrib4Niv (will be remapped) */ "ip\0" "glVertexAttrib4Niv\0" "glVertexAttrib4NivARB\0" "\0" - /* _mesa_function_pool[32152]: GetMapAttribParameterivNV (dynamic) */ + /* _mesa_function_pool[32411]: GetMapAttribParameterivNV (dynamic) */ "iiip\0" "glGetMapAttribParameterivNV\0" "\0" - /* _mesa_function_pool[32186]: GetnUniformdvARB (will be remapped) */ + /* _mesa_function_pool[32445]: GetnUniformdvARB (will be remapped) */ "iiip\0" "glGetnUniformdvARB\0" "\0" - /* _mesa_function_pool[32211]: LinkProgram (will be remapped) */ + /* _mesa_function_pool[32470]: LinkProgram (will be remapped) */ "i\0" "glLinkProgram\0" "glLinkProgramARB\0" "\0" - /* _mesa_function_pool[32245]: ProgramUniform4d (will be remapped) */ + /* _mesa_function_pool[32504]: ProgramUniform4d (will be remapped) */ "iidddd\0" "glProgramUniform4d\0" "\0" - /* _mesa_function_pool[32272]: ProgramUniform4f (will be remapped) */ + /* _mesa_function_pool[32531]: ProgramUniform4f (will be remapped) */ "iiffff\0" "glProgramUniform4f\0" "glProgramUniform4fEXT\0" "\0" - /* _mesa_function_pool[32321]: ProgramUniform4i (will be remapped) */ + /* _mesa_function_pool[32580]: ProgramUniform4i (will be remapped) */ "iiiiii\0" "glProgramUniform4i\0" "glProgramUniform4iEXT\0" "\0" - /* _mesa_function_pool[32370]: GetFramebufferParameteriv (will be remapped) */ + /* _mesa_function_pool[32629]: GetFramebufferParameteriv (will be remapped) */ "iip\0" "glGetFramebufferParameteriv\0" "\0" - /* _mesa_function_pool[32403]: ListParameterfvSGIX (dynamic) */ + /* _mesa_function_pool[32662]: ListParameterfvSGIX (dynamic) */ "iip\0" "glListParameterfvSGIX\0" "\0" - /* _mesa_function_pool[32430]: GetNamedBufferPointerv (will be remapped) */ + /* _mesa_function_pool[32689]: GetNamedBufferPointerv (will be remapped) */ "iip\0" "glGetNamedBufferPointerv\0" "\0" - /* _mesa_function_pool[32460]: VertexAttrib4d (will be remapped) */ + /* _mesa_function_pool[32719]: VertexAttrib4d (will be remapped) */ "idddd\0" "glVertexAttrib4d\0" "glVertexAttrib4dARB\0" "\0" - /* _mesa_function_pool[32504]: WindowPos4sMESA (will be remapped) */ + /* _mesa_function_pool[32763]: WindowPos4sMESA (will be remapped) */ "iiii\0" "glWindowPos4sMESA\0" "\0" - /* _mesa_function_pool[32528]: VertexAttrib4s (will be remapped) */ + /* _mesa_function_pool[32787]: VertexAttrib4s (will be remapped) */ "iiiii\0" "glVertexAttrib4s\0" "glVertexAttrib4sARB\0" "\0" - /* _mesa_function_pool[32572]: VertexAttrib1dvNV (will be remapped) */ + /* _mesa_function_pool[32831]: VertexAttrib1dvNV (will be remapped) */ "ip\0" "glVertexAttrib1dvNV\0" "\0" - /* _mesa_function_pool[32596]: ReplacementCodePointerSUN (dynamic) */ + /* _mesa_function_pool[32855]: ReplacementCodePointerSUN (dynamic) */ "iip\0" "glReplacementCodePointerSUN\0" "\0" - /* _mesa_function_pool[32629]: TexStorage3DMultisample (will be remapped) */ + /* _mesa_function_pool[32888]: TexStorage3DMultisample (will be remapped) */ "iiiiiii\0" "glTexStorage3DMultisample\0" "glTexStorage3DMultisampleOES\0" "\0" - /* _mesa_function_pool[32693]: Binormal3bvEXT (dynamic) */ + /* _mesa_function_pool[32952]: Binormal3bvEXT (dynamic) */ "p\0" "glBinormal3bvEXT\0" "\0" - /* _mesa_function_pool[32713]: SamplerParameteriv (will be remapped) */ + /* _mesa_function_pool[32972]: SamplerParameteriv (will be remapped) */ "iip\0" "glSamplerParameteriv\0" "\0" - /* _mesa_function_pool[32739]: VertexAttribP3uiv (will be remapped) */ + /* _mesa_function_pool[32998]: VertexAttribP3uiv (will be remapped) */ "iiip\0" "glVertexAttribP3uiv\0" "\0" - /* _mesa_function_pool[32765]: ScissorIndexedv (will be remapped) */ + /* _mesa_function_pool[33024]: ScissorIndexedv (will be remapped) */ "ip\0" "glScissorIndexedv\0" + "glScissorIndexedvOES\0" "\0" - /* _mesa_function_pool[32787]: Color4ubVertex2fSUN (dynamic) */ + /* _mesa_function_pool[33067]: Color4ubVertex2fSUN (dynamic) */ "iiiiff\0" "glColor4ubVertex2fSUN\0" "\0" - /* _mesa_function_pool[32817]: FragmentColorMaterialSGIX (dynamic) */ + /* _mesa_function_pool[33097]: FragmentColorMaterialSGIX (dynamic) */ "ii\0" "glFragmentColorMaterialSGIX\0" "\0" - /* _mesa_function_pool[32849]: GetStringi (will be remapped) */ + /* _mesa_function_pool[33129]: GetStringi (will be remapped) */ "ii\0" "glGetStringi\0" "\0" - /* _mesa_function_pool[32866]: Uniform2dv (will be remapped) */ + /* _mesa_function_pool[33146]: Uniform2dv (will be remapped) */ "iip\0" "glUniform2dv\0" "\0" - /* _mesa_function_pool[32884]: VertexAttrib4dv (will be remapped) */ + /* _mesa_function_pool[33164]: VertexAttrib4dv (will be remapped) */ "ip\0" "glVertexAttrib4dv\0" "glVertexAttrib4dvARB\0" "\0" - /* _mesa_function_pool[32927]: CreateTextures (will be remapped) */ + /* _mesa_function_pool[33207]: CreateTextures (will be remapped) */ "iip\0" "glCreateTextures\0" "\0" - /* _mesa_function_pool[32949]: EvalCoord2dv (offset 233) */ + /* _mesa_function_pool[33229]: EvalCoord2dv (offset 233) */ "p\0" "glEvalCoord2dv\0" "\0" - /* _mesa_function_pool[32967]: VertexAttrib1fNV (will be remapped) */ + /* _mesa_function_pool[33247]: VertexAttrib1fNV (will be remapped) */ "if\0" "glVertexAttrib1fNV\0" "\0" - /* _mesa_function_pool[32990]: CompressedTexSubImage1D (will be remapped) */ + /* _mesa_function_pool[33270]: CompressedTexSubImage1D (will be remapped) */ "iiiiiip\0" "glCompressedTexSubImage1D\0" "glCompressedTexSubImage1DARB\0" "\0" - /* _mesa_function_pool[33054]: GetSeparableFilter (offset 359) */ + /* _mesa_function_pool[33334]: GetSeparableFilter (offset 359) */ "iiippp\0" "glGetSeparableFilter\0" "glGetSeparableFilterEXT\0" "\0" - /* _mesa_function_pool[33107]: ReplacementCodeusSUN (dynamic) */ + /* _mesa_function_pool[33387]: ReplacementCodeusSUN (dynamic) */ "i\0" "glReplacementCodeusSUN\0" "\0" - /* _mesa_function_pool[33133]: FeedbackBuffer (offset 194) */ + /* _mesa_function_pool[33413]: FeedbackBuffer (offset 194) */ "iip\0" "glFeedbackBuffer\0" "\0" - /* _mesa_function_pool[33155]: RasterPos2iv (offset 67) */ + /* _mesa_function_pool[33435]: RasterPos2iv (offset 67) */ "p\0" "glRasterPos2iv\0" "\0" - /* _mesa_function_pool[33173]: TexImage1D (offset 182) */ + /* _mesa_function_pool[33453]: TexImage1D (offset 182) */ "iiiiiiip\0" "glTexImage1D\0" "\0" - /* _mesa_function_pool[33196]: MultiDrawElementsEXT (will be remapped) */ + /* _mesa_function_pool[33476]: MultiDrawElementsEXT (will be remapped) */ "ipipi\0" "glMultiDrawElements\0" "glMultiDrawElementsEXT\0" "\0" - /* _mesa_function_pool[33246]: GetnSeparableFilterARB (will be remapped) */ + /* _mesa_function_pool[33526]: GetnSeparableFilterARB (will be remapped) */ "iiiipipp\0" "glGetnSeparableFilterARB\0" "\0" - /* _mesa_function_pool[33281]: FrontFace (offset 157) */ + /* _mesa_function_pool[33561]: FrontFace (offset 157) */ "i\0" "glFrontFace\0" "\0" - /* _mesa_function_pool[33296]: MultiModeDrawArraysIBM (will be remapped) */ + /* _mesa_function_pool[33576]: MultiModeDrawArraysIBM (will be remapped) */ "pppii\0" "glMultiModeDrawArraysIBM\0" "\0" - /* _mesa_function_pool[33328]: Tangent3ivEXT (dynamic) */ + /* _mesa_function_pool[33608]: Tangent3ivEXT (dynamic) */ "p\0" "glTangent3ivEXT\0" "\0" - /* _mesa_function_pool[33347]: LightEnviSGIX (dynamic) */ + /* _mesa_function_pool[33627]: LightEnviSGIX (dynamic) */ "ii\0" "glLightEnviSGIX\0" "\0" - /* _mesa_function_pool[33367]: Normal3dv (offset 55) */ + /* _mesa_function_pool[33647]: Normal3dv (offset 55) */ "p\0" "glNormal3dv\0" "\0" - /* _mesa_function_pool[33382]: Lightf (offset 159) */ + /* _mesa_function_pool[33662]: Lightf (offset 159) */ "iif\0" "glLightf\0" "\0" - /* _mesa_function_pool[33396]: MatrixMode (offset 293) */ + /* _mesa_function_pool[33676]: MatrixMode (offset 293) */ "i\0" "glMatrixMode\0" "\0" - /* _mesa_function_pool[33412]: GetPixelMapusv (offset 273) */ + /* _mesa_function_pool[33692]: GetPixelMapusv (offset 273) */ "ip\0" "glGetPixelMapusv\0" "\0" - /* _mesa_function_pool[33433]: Lighti (offset 161) */ + /* _mesa_function_pool[33713]: Lighti (offset 161) */ "iii\0" "glLighti\0" "\0" - /* _mesa_function_pool[33447]: VertexAttribPointerNV (will be remapped) */ + /* _mesa_function_pool[33727]: VertexAttribPointerNV (will be remapped) */ "iiiip\0" "glVertexAttribPointerNV\0" "\0" - /* _mesa_function_pool[33478]: GetFragDataIndex (will be remapped) */ + /* _mesa_function_pool[33758]: GetFragDataIndex (will be remapped) */ "ip\0" "glGetFragDataIndex\0" "glGetFragDataIndexEXT\0" "\0" - /* _mesa_function_pool[33523]: Lightx (will be remapped) */ + /* _mesa_function_pool[33803]: Lightx (will be remapped) */ "iii\0" "glLightxOES\0" "glLightx\0" "\0" - /* _mesa_function_pool[33549]: ProgramUniform3fv (will be remapped) */ + /* _mesa_function_pool[33829]: ProgramUniform3fv (will be remapped) */ "iiip\0" "glProgramUniform3fv\0" "glProgramUniform3fvEXT\0" "\0" - /* _mesa_function_pool[33598]: MultMatrixd (offset 295) */ + /* _mesa_function_pool[33878]: MultMatrixd (offset 295) */ "p\0" "glMultMatrixd\0" "\0" - /* _mesa_function_pool[33615]: MultMatrixf (offset 294) */ + /* _mesa_function_pool[33895]: MultMatrixf (offset 294) */ "p\0" "glMultMatrixf\0" "\0" - /* _mesa_function_pool[33632]: MultiTexCoord4fvARB (offset 403) */ + /* _mesa_function_pool[33912]: MultiTexCoord4fvARB (offset 403) */ "ip\0" "glMultiTexCoord4fv\0" "glMultiTexCoord4fvARB\0" "\0" - /* _mesa_function_pool[33677]: UniformMatrix2x3fv (will be remapped) */ + /* _mesa_function_pool[33957]: UniformMatrix2x3fv (will be remapped) */ "iiip\0" "glUniformMatrix2x3fv\0" "\0" - /* _mesa_function_pool[33704]: TrackMatrixNV (will be remapped) */ + /* _mesa_function_pool[33984]: TrackMatrixNV (will be remapped) */ "iiii\0" "glTrackMatrixNV\0" "\0" - /* _mesa_function_pool[33726]: SamplerParameterf (will be remapped) */ + /* _mesa_function_pool[34006]: SamplerParameterf (will be remapped) */ "iif\0" "glSamplerParameterf\0" "\0" - /* _mesa_function_pool[33751]: UniformMatrix3dv (will be remapped) */ + /* _mesa_function_pool[34031]: UniformMatrix3dv (will be remapped) */ "iiip\0" "glUniformMatrix3dv\0" "\0" - /* _mesa_function_pool[33776]: PointParameterx (will be remapped) */ + /* _mesa_function_pool[34056]: PointParameterx (will be remapped) */ "ii\0" "glPointParameterxOES\0" "glPointParameterx\0" "\0" - /* _mesa_function_pool[33819]: DrawArrays (offset 310) */ + /* _mesa_function_pool[34099]: DrawArrays (offset 310) */ "iii\0" "glDrawArrays\0" "glDrawArraysEXT\0" "\0" - /* _mesa_function_pool[33853]: Uniform3dv (will be remapped) */ + /* _mesa_function_pool[34133]: Uniform3dv (will be remapped) */ "iip\0" "glUniform3dv\0" "\0" - /* _mesa_function_pool[33871]: PointParameteri (will be remapped) */ + /* _mesa_function_pool[34151]: PointParameteri (will be remapped) */ "ii\0" "glPointParameteri\0" "glPointParameteriNV\0" "\0" - /* _mesa_function_pool[33913]: PointParameterf (will be remapped) */ + /* _mesa_function_pool[34193]: PointParameterf (will be remapped) */ "if\0" "glPointParameterf\0" "glPointParameterfARB\0" "glPointParameterfEXT\0" "glPointParameterfSGIS\0" "\0" - /* _mesa_function_pool[33999]: GlobalAlphaFactorsSUN (dynamic) */ + /* _mesa_function_pool[34279]: GlobalAlphaFactorsSUN (dynamic) */ "i\0" "glGlobalAlphaFactorsSUN\0" "\0" - /* _mesa_function_pool[34026]: VertexAttribBinding (will be remapped) */ + /* _mesa_function_pool[34306]: VertexAttribBinding (will be remapped) */ "ii\0" "glVertexAttribBinding\0" "\0" - /* _mesa_function_pool[34052]: TextureSubImage2D (will be remapped) */ + /* _mesa_function_pool[34332]: TextureSubImage2D (will be remapped) */ "iiiiiiiip\0" "glTextureSubImage2D\0" "\0" - /* _mesa_function_pool[34083]: ReplacementCodeuiTexCoord2fVertex3fvSUN (dynamic) */ + /* _mesa_function_pool[34363]: ReplacementCodeuiTexCoord2fVertex3fvSUN (dynamic) */ "ppp\0" "glReplacementCodeuiTexCoord2fVertex3fvSUN\0" "\0" - /* _mesa_function_pool[34130]: CreateShader (will be remapped) */ + /* _mesa_function_pool[34410]: CreateShader (will be remapped) */ "i\0" "glCreateShader\0" "\0" - /* _mesa_function_pool[34148]: GetProgramParameterdvNV (will be remapped) */ + /* _mesa_function_pool[34428]: GetProgramParameterdvNV (will be remapped) */ "iiip\0" "glGetProgramParameterdvNV\0" "\0" - /* _mesa_function_pool[34180]: ProgramUniform1dv (will be remapped) */ + /* _mesa_function_pool[34460]: ProgramUniform1dv (will be remapped) */ "iiip\0" "glProgramUniform1dv\0" "\0" - /* _mesa_function_pool[34206]: GetProgramEnvParameterfvARB (will be remapped) */ + /* _mesa_function_pool[34486]: GetProgramEnvParameterfvARB (will be remapped) */ "iip\0" "glGetProgramEnvParameterfvARB\0" "\0" - /* _mesa_function_pool[34241]: DeleteBuffers (will be remapped) */ + /* _mesa_function_pool[34521]: DeleteBuffers (will be remapped) */ "ip\0" "glDeleteBuffers\0" "glDeleteBuffersARB\0" "\0" - /* _mesa_function_pool[34280]: GetBufferSubData (will be remapped) */ + /* _mesa_function_pool[34560]: GetBufferSubData (will be remapped) */ "iiip\0" "glGetBufferSubData\0" "glGetBufferSubDataARB\0" "\0" - /* _mesa_function_pool[34327]: GetNamedRenderbufferParameteriv (will be remapped) */ + /* _mesa_function_pool[34607]: GetNamedRenderbufferParameteriv (will be remapped) */ "iip\0" "glGetNamedRenderbufferParameteriv\0" "\0" - /* _mesa_function_pool[34366]: GetPerfMonitorGroupsAMD (will be remapped) */ + /* _mesa_function_pool[34646]: GetPerfMonitorGroupsAMD (will be remapped) */ "pip\0" "glGetPerfMonitorGroupsAMD\0" "\0" - /* _mesa_function_pool[34397]: FlushRasterSGIX (dynamic) */ + /* _mesa_function_pool[34677]: FlushRasterSGIX (dynamic) */ "\0" "glFlushRasterSGIX\0" "\0" - /* _mesa_function_pool[34417]: VertexAttribP2ui (will be remapped) */ + /* _mesa_function_pool[34697]: VertexAttribP2ui (will be remapped) */ "iiii\0" "glVertexAttribP2ui\0" "\0" - /* _mesa_function_pool[34442]: ProgramUniform4dv (will be remapped) */ + /* _mesa_function_pool[34722]: ProgramUniform4dv (will be remapped) */ "iiip\0" "glProgramUniform4dv\0" "\0" - /* _mesa_function_pool[34468]: GetMinmaxParameteriv (offset 366) */ + /* _mesa_function_pool[34748]: GetMinmaxParameteriv (offset 366) */ "iip\0" "glGetMinmaxParameteriv\0" "glGetMinmaxParameterivEXT\0" "\0" - /* _mesa_function_pool[34522]: DrawTexivOES (will be remapped) */ + /* _mesa_function_pool[34802]: DrawTexivOES (will be remapped) */ "p\0" "glDrawTexivOES\0" "\0" - /* _mesa_function_pool[34540]: CopyTexImage1D (offset 323) */ + /* _mesa_function_pool[34820]: CopyTexImage1D (offset 323) */ "iiiiiii\0" "glCopyTexImage1D\0" "glCopyTexImage1DEXT\0" "\0" - /* _mesa_function_pool[34586]: InvalidateNamedFramebufferData (will be remapped) */ + /* _mesa_function_pool[34866]: InvalidateNamedFramebufferData (will be remapped) */ "iip\0" "glInvalidateNamedFramebufferData\0" "\0" - /* _mesa_function_pool[34624]: GetnColorTableARB (will be remapped) */ + /* _mesa_function_pool[34904]: GetnColorTableARB (will be remapped) */ "iiiip\0" "glGetnColorTableARB\0" "\0" - /* _mesa_function_pool[34651]: VertexAttribFormat (will be remapped) */ + /* _mesa_function_pool[34931]: VertexAttribFormat (will be remapped) */ "iiiii\0" "glVertexAttribFormat\0" "\0" - /* _mesa_function_pool[34679]: Vertex3i (offset 138) */ + /* _mesa_function_pool[34959]: Vertex3i (offset 138) */ "iii\0" "glVertex3i\0" "\0" - /* _mesa_function_pool[34695]: Vertex3f (offset 136) */ + /* _mesa_function_pool[34975]: Vertex3f (offset 136) */ "fff\0" "glVertex3f\0" "\0" - /* _mesa_function_pool[34711]: Vertex3d (offset 134) */ + /* _mesa_function_pool[34991]: Vertex3d (offset 134) */ "ddd\0" "glVertex3d\0" "\0" - /* _mesa_function_pool[34727]: GetProgramPipelineiv (will be remapped) */ + /* _mesa_function_pool[35007]: GetProgramPipelineiv (will be remapped) */ "iip\0" "glGetProgramPipelineiv\0" "glGetProgramPipelineivEXT\0" "\0" - /* _mesa_function_pool[34781]: ReadBuffer (offset 254) */ + /* _mesa_function_pool[35061]: ReadBuffer (offset 254) */ "i\0" "glReadBuffer\0" "glReadBufferNV\0" "\0" - /* _mesa_function_pool[34812]: ConvolutionParameteri (offset 352) */ + /* _mesa_function_pool[35092]: ConvolutionParameteri (offset 352) */ "iii\0" "glConvolutionParameteri\0" "glConvolutionParameteriEXT\0" "\0" - /* _mesa_function_pool[34868]: GetTexParameterIiv (will be remapped) */ + /* _mesa_function_pool[35148]: GetTexParameterIiv (will be remapped) */ "iip\0" "glGetTexParameterIivEXT\0" "glGetTexParameterIiv\0" "glGetTexParameterIivOES\0" "\0" - /* _mesa_function_pool[34942]: Vertex3s (offset 140) */ + /* _mesa_function_pool[35222]: Vertex3s (offset 140) */ "iii\0" "glVertex3s\0" "\0" - /* _mesa_function_pool[34958]: ConvolutionParameterf (offset 350) */ + /* _mesa_function_pool[35238]: ConvolutionParameterf (offset 350) */ "iif\0" "glConvolutionParameterf\0" "glConvolutionParameterfEXT\0" "\0" - /* _mesa_function_pool[35014]: GetColorTableParameteriv (offset 345) */ + /* _mesa_function_pool[35294]: GetColorTableParameteriv (offset 345) */ "iip\0" "glGetColorTableParameteriv\0" "glGetColorTableParameterivSGI\0" "glGetColorTableParameterivEXT\0" "\0" - /* _mesa_function_pool[35106]: GetTransformFeedbackVarying (will be remapped) */ + /* _mesa_function_pool[35386]: GetTransformFeedbackVarying (will be remapped) */ "iiipppp\0" "glGetTransformFeedbackVarying\0" "glGetTransformFeedbackVaryingEXT\0" "\0" - /* _mesa_function_pool[35178]: GetNextPerfQueryIdINTEL (will be remapped) */ + /* _mesa_function_pool[35458]: GetNextPerfQueryIdINTEL (will be remapped) */ "ip\0" "glGetNextPerfQueryIdINTEL\0" "\0" - /* _mesa_function_pool[35208]: TexCoord3fv (offset 113) */ + /* _mesa_function_pool[35488]: TexCoord3fv (offset 113) */ "p\0" "glTexCoord3fv\0" "\0" - /* _mesa_function_pool[35225]: TextureBarrierNV (will be remapped) */ + /* _mesa_function_pool[35505]: TextureBarrierNV (will be remapped) */ "\0" "glTextureBarrier\0" "glTextureBarrierNV\0" "\0" - /* _mesa_function_pool[35263]: GetProgramInterfaceiv (will be remapped) */ + /* _mesa_function_pool[35543]: GetProgramInterfaceiv (will be remapped) */ "iiip\0" "glGetProgramInterfaceiv\0" "\0" - /* _mesa_function_pool[35293]: ReplacementCodeuiColor4fNormal3fVertex3fSUN (dynamic) */ + /* _mesa_function_pool[35573]: ReplacementCodeuiColor4fNormal3fVertex3fSUN (dynamic) */ "iffffffffff\0" "glReplacementCodeuiColor4fNormal3fVertex3fSUN\0" "\0" - /* _mesa_function_pool[35352]: ProgramLocalParameter4fARB (will be remapped) */ + /* _mesa_function_pool[35632]: ProgramLocalParameter4fARB (will be remapped) */ "iiffff\0" "glProgramLocalParameter4fARB\0" "\0" - /* _mesa_function_pool[35389]: PauseTransformFeedback (will be remapped) */ + /* _mesa_function_pool[35669]: PauseTransformFeedback (will be remapped) */ "\0" "glPauseTransformFeedback\0" "\0" - /* _mesa_function_pool[35416]: DeleteShader (will be remapped) */ + /* _mesa_function_pool[35696]: DeleteShader (will be remapped) */ "i\0" "glDeleteShader\0" "\0" - /* _mesa_function_pool[35434]: NamedFramebufferRenderbuffer (will be remapped) */ + /* _mesa_function_pool[35714]: NamedFramebufferRenderbuffer (will be remapped) */ "iiii\0" "glNamedFramebufferRenderbuffer\0" "\0" - /* _mesa_function_pool[35471]: CompileShader (will be remapped) */ + /* _mesa_function_pool[35751]: CompileShader (will be remapped) */ "i\0" "glCompileShader\0" "glCompileShaderARB\0" "\0" - /* _mesa_function_pool[35509]: Vertex2iv (offset 131) */ + /* _mesa_function_pool[35789]: Vertex2iv (offset 131) */ "p\0" "glVertex2iv\0" "\0" - /* _mesa_function_pool[35524]: GetVertexArrayIndexediv (will be remapped) */ + /* _mesa_function_pool[35804]: GetVertexArrayIndexediv (will be remapped) */ "iiip\0" "glGetVertexArrayIndexediv\0" "\0" - /* _mesa_function_pool[35556]: TexParameterIiv (will be remapped) */ + /* _mesa_function_pool[35836]: TexParameterIiv (will be remapped) */ "iip\0" "glTexParameterIivEXT\0" "glTexParameterIiv\0" "glTexParameterIivOES\0" "\0" - /* _mesa_function_pool[35621]: TexGendv (offset 189) */ + /* _mesa_function_pool[35901]: TexGendv (offset 189) */ "iip\0" "glTexGendv\0" "\0" - /* _mesa_function_pool[35637]: TextureLightEXT (dynamic) */ + /* _mesa_function_pool[35917]: TextureLightEXT (dynamic) */ "i\0" "glTextureLightEXT\0" "\0" - /* _mesa_function_pool[35658]: ResetMinmax (offset 370) */ + /* _mesa_function_pool[35938]: ResetMinmax (offset 370) */ "i\0" "glResetMinmax\0" "glResetMinmaxEXT\0" "\0" - /* _mesa_function_pool[35692]: SampleCoverage (will be remapped) */ + /* _mesa_function_pool[35972]: SampleCoverage (will be remapped) */ "fi\0" "glSampleCoverage\0" "glSampleCoverageARB\0" "\0" - /* _mesa_function_pool[35733]: SpriteParameterfSGIX (dynamic) */ + /* _mesa_function_pool[36013]: SpriteParameterfSGIX (dynamic) */ "if\0" "glSpriteParameterfSGIX\0" "\0" - /* _mesa_function_pool[35760]: GenerateTextureMipmap (will be remapped) */ + /* _mesa_function_pool[36040]: GenerateTextureMipmap (will be remapped) */ "i\0" "glGenerateTextureMipmap\0" "\0" - /* _mesa_function_pool[35787]: DeleteProgramsARB (will be remapped) */ + /* _mesa_function_pool[36067]: DeleteProgramsARB (will be remapped) */ "ip\0" "glDeleteProgramsARB\0" "glDeleteProgramsNV\0" "\0" - /* _mesa_function_pool[35830]: ShadeModel (offset 177) */ + /* _mesa_function_pool[36110]: ShadeModel (offset 177) */ "i\0" "glShadeModel\0" "\0" - /* _mesa_function_pool[35846]: CreateQueries (will be remapped) */ + /* _mesa_function_pool[36126]: CreateQueries (will be remapped) */ "iip\0" "glCreateQueries\0" "\0" - /* _mesa_function_pool[35867]: FogFuncSGIS (dynamic) */ + /* _mesa_function_pool[36147]: FogFuncSGIS (dynamic) */ "ip\0" "glFogFuncSGIS\0" "\0" - /* _mesa_function_pool[35885]: TexCoord4fVertex4fSUN (dynamic) */ + /* _mesa_function_pool[36165]: TexCoord4fVertex4fSUN (dynamic) */ "ffffffff\0" "glTexCoord4fVertex4fSUN\0" "\0" - /* _mesa_function_pool[35919]: MultiDrawArrays (will be remapped) */ + /* _mesa_function_pool[36199]: MultiDrawArrays (will be remapped) */ "ippi\0" "glMultiDrawArrays\0" "glMultiDrawArraysEXT\0" "\0" - /* _mesa_function_pool[35964]: GetProgramLocalParameterdvARB (will be remapped) */ + /* _mesa_function_pool[36244]: GetProgramLocalParameterdvARB (will be remapped) */ "iip\0" "glGetProgramLocalParameterdvARB\0" "\0" - /* _mesa_function_pool[36001]: BufferParameteriAPPLE (will be remapped) */ + /* _mesa_function_pool[36281]: BufferParameteriAPPLE (will be remapped) */ "iii\0" "glBufferParameteriAPPLE\0" "\0" - /* _mesa_function_pool[36030]: MapBufferRange (will be remapped) */ + /* _mesa_function_pool[36310]: MapBufferRange (will be remapped) */ "iiii\0" "glMapBufferRange\0" "glMapBufferRangeEXT\0" "\0" - /* _mesa_function_pool[36073]: DispatchCompute (will be remapped) */ + /* _mesa_function_pool[36353]: DispatchCompute (will be remapped) */ "iii\0" "glDispatchCompute\0" "\0" - /* _mesa_function_pool[36096]: UseProgramStages (will be remapped) */ + /* _mesa_function_pool[36376]: UseProgramStages (will be remapped) */ "iii\0" "glUseProgramStages\0" "glUseProgramStagesEXT\0" "\0" - /* _mesa_function_pool[36142]: ProgramUniformMatrix4fv (will be remapped) */ + /* _mesa_function_pool[36422]: ProgramUniformMatrix4fv (will be remapped) */ "iiiip\0" "glProgramUniformMatrix4fv\0" "glProgramUniformMatrix4fvEXT\0" "\0" - /* _mesa_function_pool[36204]: FinishAsyncSGIX (dynamic) */ + /* _mesa_function_pool[36484]: FinishAsyncSGIX (dynamic) */ "p\0" "glFinishAsyncSGIX\0" "\0" - /* _mesa_function_pool[36225]: FramebufferRenderbuffer (will be remapped) */ + /* _mesa_function_pool[36505]: FramebufferRenderbuffer (will be remapped) */ "iiii\0" "glFramebufferRenderbuffer\0" "glFramebufferRenderbufferEXT\0" "glFramebufferRenderbufferOES\0" "\0" - /* _mesa_function_pool[36315]: IsProgramARB (will be remapped) */ + /* _mesa_function_pool[36595]: IsProgramARB (will be remapped) */ "i\0" "glIsProgramARB\0" "glIsProgramNV\0" "\0" - /* _mesa_function_pool[36347]: Map2d (offset 222) */ + /* _mesa_function_pool[36627]: Map2d (offset 222) */ "iddiiddiip\0" "glMap2d\0" "\0" - /* _mesa_function_pool[36367]: Map2f (offset 223) */ + /* _mesa_function_pool[36647]: Map2f (offset 223) */ "iffiiffiip\0" "glMap2f\0" "\0" - /* _mesa_function_pool[36387]: ProgramStringARB (will be remapped) */ + /* _mesa_function_pool[36667]: ProgramStringARB (will be remapped) */ "iiip\0" "glProgramStringARB\0" "\0" - /* _mesa_function_pool[36412]: CopyTextureSubImage2D (will be remapped) */ + /* _mesa_function_pool[36692]: CopyTextureSubImage2D (will be remapped) */ "iiiiiiii\0" "glCopyTextureSubImage2D\0" "\0" - /* _mesa_function_pool[36446]: MultiTexCoord4s (offset 406) */ + /* _mesa_function_pool[36726]: MultiTexCoord4s (offset 406) */ "iiiii\0" "glMultiTexCoord4s\0" "glMultiTexCoord4sARB\0" "\0" - /* _mesa_function_pool[36492]: ViewportIndexedf (will be remapped) */ + /* _mesa_function_pool[36772]: ViewportIndexedf (will be remapped) */ "iffff\0" "glViewportIndexedf\0" + "glViewportIndexedfOES\0" "\0" - /* _mesa_function_pool[36518]: MultiTexCoord4i (offset 404) */ + /* _mesa_function_pool[36820]: MultiTexCoord4i (offset 404) */ "iiiii\0" "glMultiTexCoord4i\0" "glMultiTexCoord4iARB\0" "\0" - /* _mesa_function_pool[36564]: ApplyTextureEXT (dynamic) */ + /* _mesa_function_pool[36866]: ApplyTextureEXT (dynamic) */ "i\0" "glApplyTextureEXT\0" "\0" - /* _mesa_function_pool[36585]: DebugMessageControl (will be remapped) */ + /* _mesa_function_pool[36887]: DebugMessageControl (will be remapped) */ "iiiipi\0" "glDebugMessageControlARB\0" "glDebugMessageControl\0" "glDebugMessageControlKHR\0" "\0" - /* _mesa_function_pool[36665]: MultiTexCoord4d (offset 400) */ + /* _mesa_function_pool[36967]: MultiTexCoord4d (offset 400) */ "idddd\0" "glMultiTexCoord4d\0" "glMultiTexCoord4dARB\0" "\0" - /* _mesa_function_pool[36711]: GetHistogram (offset 361) */ + /* _mesa_function_pool[37013]: GetHistogram (offset 361) */ "iiiip\0" "glGetHistogram\0" "glGetHistogramEXT\0" "\0" - /* _mesa_function_pool[36751]: Translatex (will be remapped) */ + /* _mesa_function_pool[37053]: Translatex (will be remapped) */ "iii\0" "glTranslatexOES\0" "glTranslatex\0" "\0" - /* _mesa_function_pool[36785]: MultiDrawElementsIndirectCountARB (will be remapped) */ + /* _mesa_function_pool[37087]: MultiDrawElementsIndirectCountARB (will be remapped) */ "iiiiii\0" "glMultiDrawElementsIndirectCountARB\0" "\0" - /* _mesa_function_pool[36829]: IglooInterfaceSGIX (dynamic) */ + /* _mesa_function_pool[37131]: IglooInterfaceSGIX (dynamic) */ "ip\0" "glIglooInterfaceSGIX\0" "\0" - /* _mesa_function_pool[36854]: Indexsv (offset 51) */ + /* _mesa_function_pool[37156]: Indexsv (offset 51) */ "p\0" "glIndexsv\0" "\0" - /* _mesa_function_pool[36867]: VertexAttrib1fvARB (will be remapped) */ + /* _mesa_function_pool[37169]: VertexAttrib1fvARB (will be remapped) */ "ip\0" "glVertexAttrib1fv\0" "glVertexAttrib1fvARB\0" "\0" - /* _mesa_function_pool[36910]: TexCoord2dv (offset 103) */ + /* _mesa_function_pool[37212]: TexCoord2dv (offset 103) */ "p\0" "glTexCoord2dv\0" "\0" - /* _mesa_function_pool[36927]: GetDetailTexFuncSGIS (dynamic) */ + /* _mesa_function_pool[37229]: GetDetailTexFuncSGIS (dynamic) */ "ip\0" "glGetDetailTexFuncSGIS\0" "\0" - /* _mesa_function_pool[36954]: Translated (offset 303) */ + /* _mesa_function_pool[37256]: Translated (offset 303) */ "ddd\0" "glTranslated\0" "\0" - /* _mesa_function_pool[36972]: Translatef (offset 304) */ + /* _mesa_function_pool[37274]: Translatef (offset 304) */ "fff\0" "glTranslatef\0" "\0" - /* _mesa_function_pool[36990]: MultTransposeMatrixd (will be remapped) */ + /* _mesa_function_pool[37292]: MultTransposeMatrixd (will be remapped) */ "p\0" "glMultTransposeMatrixd\0" "glMultTransposeMatrixdARB\0" "\0" - /* _mesa_function_pool[37042]: ProgramUniform4uiv (will be remapped) */ + /* _mesa_function_pool[37344]: ProgramUniform4uiv (will be remapped) */ "iiip\0" "glProgramUniform4uiv\0" "glProgramUniform4uivEXT\0" "\0" - /* _mesa_function_pool[37093]: GetPerfCounterInfoINTEL (will be remapped) */ + /* _mesa_function_pool[37395]: GetPerfCounterInfoINTEL (will be remapped) */ "iiipipppppp\0" "glGetPerfCounterInfoINTEL\0" "\0" - /* _mesa_function_pool[37132]: RenderMode (offset 196) */ + /* _mesa_function_pool[37434]: RenderMode (offset 196) */ "i\0" "glRenderMode\0" "\0" - /* _mesa_function_pool[37148]: MultiTexCoord1fARB (offset 378) */ + /* _mesa_function_pool[37450]: MultiTexCoord1fARB (offset 378) */ "if\0" "glMultiTexCoord1f\0" "glMultiTexCoord1fARB\0" "\0" - /* _mesa_function_pool[37191]: SecondaryColor3d (will be remapped) */ + /* _mesa_function_pool[37493]: SecondaryColor3d (will be remapped) */ "ddd\0" "glSecondaryColor3d\0" "glSecondaryColor3dEXT\0" "\0" - /* _mesa_function_pool[37237]: FramebufferParameteri (will be remapped) */ + /* _mesa_function_pool[37539]: FramebufferParameteri (will be remapped) */ "iii\0" "glFramebufferParameteri\0" "\0" - /* _mesa_function_pool[37266]: VertexAttribs4ubvNV (will be remapped) */ + /* _mesa_function_pool[37568]: VertexAttribs4ubvNV (will be remapped) */ "iip\0" "glVertexAttribs4ubvNV\0" "\0" - /* _mesa_function_pool[37293]: WeightsvARB (dynamic) */ + /* _mesa_function_pool[37595]: WeightsvARB (dynamic) */ "ip\0" "glWeightsvARB\0" "\0" - /* _mesa_function_pool[37311]: LightModelxv (will be remapped) */ + /* _mesa_function_pool[37613]: LightModelxv (will be remapped) */ "ip\0" "glLightModelxvOES\0" "glLightModelxv\0" "\0" - /* _mesa_function_pool[37348]: CopyTexSubImage1D (offset 325) */ + /* _mesa_function_pool[37650]: CopyTexSubImage1D (offset 325) */ "iiiiii\0" "glCopyTexSubImage1D\0" "glCopyTexSubImage1DEXT\0" "\0" - /* _mesa_function_pool[37399]: TextureSubImage3D (will be remapped) */ + /* _mesa_function_pool[37701]: TextureSubImage3D (will be remapped) */ "iiiiiiiiiip\0" "glTextureSubImage3D\0" "\0" - /* _mesa_function_pool[37432]: StencilFunc (offset 243) */ + /* _mesa_function_pool[37734]: StencilFunc (offset 243) */ "iii\0" "glStencilFunc\0" "\0" - /* _mesa_function_pool[37451]: CopyPixels (offset 255) */ + /* _mesa_function_pool[37753]: CopyPixels (offset 255) */ "iiiii\0" "glCopyPixels\0" "\0" - /* _mesa_function_pool[37471]: TexGenxvOES (will be remapped) */ + /* _mesa_function_pool[37773]: TexGenxvOES (will be remapped) */ "iip\0" "glTexGenxvOES\0" "\0" - /* _mesa_function_pool[37490]: GetTextureLevelParameterfv (will be remapped) */ + /* _mesa_function_pool[37792]: GetTextureLevelParameterfv (will be remapped) */ "iiip\0" "glGetTextureLevelParameterfv\0" "\0" - /* _mesa_function_pool[37525]: VertexAttrib4Nubv (will be remapped) */ + /* _mesa_function_pool[37827]: VertexAttrib4Nubv (will be remapped) */ "ip\0" "glVertexAttrib4Nubv\0" "glVertexAttrib4NubvARB\0" "\0" - /* _mesa_function_pool[37572]: GetFogFuncSGIS (dynamic) */ + /* _mesa_function_pool[37874]: GetFogFuncSGIS (dynamic) */ "p\0" "glGetFogFuncSGIS\0" "\0" - /* _mesa_function_pool[37592]: UniformMatrix4x2dv (will be remapped) */ + /* _mesa_function_pool[37894]: UniformMatrix4x2dv (will be remapped) */ "iiip\0" "glUniformMatrix4x2dv\0" "\0" - /* _mesa_function_pool[37619]: VertexAttribPointer (will be remapped) */ + /* _mesa_function_pool[37921]: VertexAttribPointer (will be remapped) */ "iiiiip\0" "glVertexAttribPointer\0" "glVertexAttribPointerARB\0" "\0" - /* _mesa_function_pool[37674]: IndexMask (offset 212) */ + /* _mesa_function_pool[37976]: IndexMask (offset 212) */ "i\0" "glIndexMask\0" "\0" - /* _mesa_function_pool[37689]: SharpenTexFuncSGIS (dynamic) */ + /* _mesa_function_pool[37991]: SharpenTexFuncSGIS (dynamic) */ "iip\0" "glSharpenTexFuncSGIS\0" "\0" - /* _mesa_function_pool[37715]: VertexAttribIFormat (will be remapped) */ + /* _mesa_function_pool[38017]: VertexAttribIFormat (will be remapped) */ "iiii\0" "glVertexAttribIFormat\0" "\0" - /* _mesa_function_pool[37743]: CombinerOutputNV (dynamic) */ + /* _mesa_function_pool[38045]: CombinerOutputNV (dynamic) */ "iiiiiiiiii\0" "glCombinerOutputNV\0" "\0" - /* _mesa_function_pool[37774]: DrawArraysInstancedBaseInstance (will be remapped) */ + /* _mesa_function_pool[38076]: DrawArraysInstancedBaseInstance (will be remapped) */ "iiiii\0" "glDrawArraysInstancedBaseInstance\0" "glDrawArraysInstancedBaseInstanceEXT\0" "\0" - /* _mesa_function_pool[37852]: CompressedTextureSubImage3D (will be remapped) */ + /* _mesa_function_pool[38154]: CompressedTextureSubImage3D (will be remapped) */ "iiiiiiiiiip\0" "glCompressedTextureSubImage3D\0" "\0" - /* _mesa_function_pool[37895]: PopAttrib (offset 218) */ + /* _mesa_function_pool[38197]: PopAttrib (offset 218) */ "\0" "glPopAttrib\0" "\0" - /* _mesa_function_pool[37909]: SamplePatternSGIS (will be remapped) */ + /* _mesa_function_pool[38211]: SamplePatternSGIS (will be remapped) */ "i\0" "glSamplePatternSGIS\0" "glSamplePatternEXT\0" "\0" - /* _mesa_function_pool[37951]: Uniform3ui (will be remapped) */ + /* _mesa_function_pool[38253]: Uniform3ui (will be remapped) */ "iiii\0" "glUniform3uiEXT\0" "glUniform3ui\0" "\0" - /* _mesa_function_pool[37986]: DeletePerfMonitorsAMD (will be remapped) */ + /* _mesa_function_pool[38288]: DeletePerfMonitorsAMD (will be remapped) */ "ip\0" "glDeletePerfMonitorsAMD\0" "\0" - /* _mesa_function_pool[38014]: Color4dv (offset 28) */ + /* _mesa_function_pool[38316]: Color4dv (offset 28) */ "p\0" "glColor4dv\0" "\0" - /* _mesa_function_pool[38028]: AreProgramsResidentNV (will be remapped) */ + /* _mesa_function_pool[38330]: AreProgramsResidentNV (will be remapped) */ "ipp\0" "glAreProgramsResidentNV\0" "\0" - /* _mesa_function_pool[38057]: DisableVertexAttribArray (will be remapped) */ + /* _mesa_function_pool[38359]: DisableVertexAttribArray (will be remapped) */ "i\0" "glDisableVertexAttribArray\0" "glDisableVertexAttribArrayARB\0" "\0" - /* _mesa_function_pool[38117]: ProgramUniformMatrix3x2fv (will be remapped) */ + /* _mesa_function_pool[38419]: ProgramUniformMatrix3x2fv (will be remapped) */ "iiiip\0" "glProgramUniformMatrix3x2fv\0" "glProgramUniformMatrix3x2fvEXT\0" "\0" - /* _mesa_function_pool[38183]: GetDoublei_v (will be remapped) */ + /* _mesa_function_pool[38485]: GetDoublei_v (will be remapped) */ "iip\0" "glGetDoublei_v\0" "\0" - /* _mesa_function_pool[38203]: IsTransformFeedback (will be remapped) */ + /* _mesa_function_pool[38505]: IsTransformFeedback (will be remapped) */ "i\0" "glIsTransformFeedback\0" "\0" - /* _mesa_function_pool[38228]: ClipPlanex (will be remapped) */ + /* _mesa_function_pool[38530]: ClipPlanex (will be remapped) */ "ip\0" "glClipPlanexOES\0" "glClipPlanex\0" "\0" - /* _mesa_function_pool[38261]: ReplacementCodeuiColor3fVertex3fSUN (dynamic) */ + /* _mesa_function_pool[38563]: ReplacementCodeuiColor3fVertex3fSUN (dynamic) */ "iffffff\0" "glReplacementCodeuiColor3fVertex3fSUN\0" "\0" - /* _mesa_function_pool[38308]: GetLightfv (offset 264) */ + /* _mesa_function_pool[38610]: GetLightfv (offset 264) */ "iip\0" "glGetLightfv\0" "\0" - /* _mesa_function_pool[38326]: ClipPlanef (will be remapped) */ + /* _mesa_function_pool[38628]: ClipPlanef (will be remapped) */ "ip\0" "glClipPlanefOES\0" "glClipPlanef\0" "\0" - /* _mesa_function_pool[38359]: ProgramUniform1ui (will be remapped) */ + /* _mesa_function_pool[38661]: ProgramUniform1ui (will be remapped) */ "iii\0" "glProgramUniform1ui\0" "glProgramUniform1uiEXT\0" "\0" - /* _mesa_function_pool[38407]: SecondaryColorPointer (will be remapped) */ + /* _mesa_function_pool[38709]: SecondaryColorPointer (will be remapped) */ "iiip\0" "glSecondaryColorPointer\0" "glSecondaryColorPointerEXT\0" "\0" - /* _mesa_function_pool[38464]: Tangent3svEXT (dynamic) */ + /* _mesa_function_pool[38766]: Tangent3svEXT (dynamic) */ "p\0" "glTangent3svEXT\0" "\0" - /* _mesa_function_pool[38483]: Tangent3iEXT (dynamic) */ + /* _mesa_function_pool[38785]: Tangent3iEXT (dynamic) */ "iii\0" "glTangent3iEXT\0" "\0" - /* _mesa_function_pool[38503]: LineStipple (offset 167) */ + /* _mesa_function_pool[38805]: LineStipple (offset 167) */ "ii\0" "glLineStipple\0" "\0" - /* _mesa_function_pool[38521]: FragmentLightfSGIX (dynamic) */ + /* _mesa_function_pool[38823]: FragmentLightfSGIX (dynamic) */ "iif\0" "glFragmentLightfSGIX\0" "\0" - /* _mesa_function_pool[38547]: BeginFragmentShaderATI (will be remapped) */ + /* _mesa_function_pool[38849]: BeginFragmentShaderATI (will be remapped) */ "\0" "glBeginFragmentShaderATI\0" "\0" - /* _mesa_function_pool[38574]: GenRenderbuffers (will be remapped) */ + /* _mesa_function_pool[38876]: GenRenderbuffers (will be remapped) */ "ip\0" "glGenRenderbuffers\0" "glGenRenderbuffersEXT\0" "glGenRenderbuffersOES\0" "\0" - /* _mesa_function_pool[38641]: GetMinmaxParameterfv (offset 365) */ + /* _mesa_function_pool[38943]: GetMinmaxParameterfv (offset 365) */ "iip\0" "glGetMinmaxParameterfv\0" "glGetMinmaxParameterfvEXT\0" "\0" - /* _mesa_function_pool[38695]: IsEnabledi (will be remapped) */ + /* _mesa_function_pool[38997]: IsEnabledi (will be remapped) */ "ii\0" "glIsEnabledIndexedEXT\0" "glIsEnabledi\0" "glIsEnablediEXT\0" "glIsEnablediOES\0" "\0" - /* _mesa_function_pool[38766]: FragmentMaterialivSGIX (dynamic) */ + /* _mesa_function_pool[39068]: FragmentMaterialivSGIX (dynamic) */ "iip\0" "glFragmentMaterialivSGIX\0" "\0" - /* _mesa_function_pool[38796]: WaitSync (will be remapped) */ + /* _mesa_function_pool[39098]: WaitSync (will be remapped) */ "iii\0" "glWaitSync\0" "\0" - /* _mesa_function_pool[38812]: GetVertexAttribPointerv (will be remapped) */ + /* _mesa_function_pool[39114]: GetVertexAttribPointerv (will be remapped) */ "iip\0" "glGetVertexAttribPointerv\0" "glGetVertexAttribPointervARB\0" "glGetVertexAttribPointervNV\0" "\0" - /* _mesa_function_pool[38900]: CreatePerfQueryINTEL (will be remapped) */ + /* _mesa_function_pool[39202]: CreatePerfQueryINTEL (will be remapped) */ "ip\0" "glCreatePerfQueryINTEL\0" "\0" - /* _mesa_function_pool[38927]: NewList (dynamic) */ + /* _mesa_function_pool[39229]: NewList (dynamic) */ "ii\0" "glNewList\0" "\0" - /* _mesa_function_pool[38941]: TexBuffer (will be remapped) */ + /* _mesa_function_pool[39243]: TexBuffer (will be remapped) */ "iii\0" "glTexBufferARB\0" "glTexBuffer\0" "glTexBufferEXT\0" "glTexBufferOES\0" "\0" - /* _mesa_function_pool[39003]: TexCoord4sv (offset 125) */ + /* _mesa_function_pool[39305]: TexCoord4sv (offset 125) */ "p\0" "glTexCoord4sv\0" "\0" - /* _mesa_function_pool[39020]: TexCoord1f (offset 96) */ + /* _mesa_function_pool[39322]: TexCoord1f (offset 96) */ "f\0" "glTexCoord1f\0" "\0" - /* _mesa_function_pool[39036]: TexCoord1d (offset 94) */ + /* _mesa_function_pool[39338]: TexCoord1d (offset 94) */ "d\0" "glTexCoord1d\0" "\0" - /* _mesa_function_pool[39052]: TexCoord1i (offset 98) */ + /* _mesa_function_pool[39354]: TexCoord1i (offset 98) */ "i\0" "glTexCoord1i\0" "\0" - /* _mesa_function_pool[39068]: GetnUniformfvARB (will be remapped) */ + /* _mesa_function_pool[39370]: GetnUniformfvARB (will be remapped) */ "iiip\0" "glGetnUniformfvARB\0" "glGetnUniformfv\0" "glGetnUniformfvKHR\0" "\0" - /* _mesa_function_pool[39128]: TexCoord1s (offset 100) */ + /* _mesa_function_pool[39430]: TexCoord1s (offset 100) */ "i\0" "glTexCoord1s\0" "\0" - /* _mesa_function_pool[39144]: GlobalAlphaFactoriSUN (dynamic) */ + /* _mesa_function_pool[39446]: GlobalAlphaFactoriSUN (dynamic) */ "i\0" "glGlobalAlphaFactoriSUN\0" "\0" - /* _mesa_function_pool[39171]: Uniform1ui (will be remapped) */ + /* _mesa_function_pool[39473]: Uniform1ui (will be remapped) */ "ii\0" "glUniform1uiEXT\0" "glUniform1ui\0" "\0" - /* _mesa_function_pool[39204]: TexStorage1D (will be remapped) */ + /* _mesa_function_pool[39506]: TexStorage1D (will be remapped) */ "iiii\0" "glTexStorage1D\0" "\0" - /* _mesa_function_pool[39225]: BlitFramebuffer (will be remapped) */ + /* _mesa_function_pool[39527]: BlitFramebuffer (will be remapped) */ "iiiiiiiiii\0" "glBlitFramebuffer\0" "glBlitFramebufferEXT\0" "\0" - /* _mesa_function_pool[39276]: TextureParameterf (will be remapped) */ + /* _mesa_function_pool[39578]: TextureParameterf (will be remapped) */ "iif\0" "glTextureParameterf\0" "\0" - /* _mesa_function_pool[39301]: FramebufferTexture1D (will be remapped) */ + /* _mesa_function_pool[39603]: FramebufferTexture1D (will be remapped) */ "iiiii\0" "glFramebufferTexture1D\0" "glFramebufferTexture1DEXT\0" "\0" - /* _mesa_function_pool[39357]: TextureParameteri (will be remapped) */ + /* _mesa_function_pool[39659]: TextureParameteri (will be remapped) */ "iii\0" "glTextureParameteri\0" "\0" - /* _mesa_function_pool[39382]: GetMapiv (offset 268) */ + /* _mesa_function_pool[39684]: GetMapiv (offset 268) */ "iip\0" "glGetMapiv\0" "\0" - /* _mesa_function_pool[39398]: TexCoordP4ui (will be remapped) */ + /* _mesa_function_pool[39700]: TexCoordP4ui (will be remapped) */ "ii\0" "glTexCoordP4ui\0" "\0" - /* _mesa_function_pool[39417]: VertexAttrib1sv (will be remapped) */ + /* _mesa_function_pool[39719]: VertexAttrib1sv (will be remapped) */ "ip\0" "glVertexAttrib1sv\0" "glVertexAttrib1svARB\0" "\0" - /* _mesa_function_pool[39460]: WindowPos4dMESA (will be remapped) */ + /* _mesa_function_pool[39762]: WindowPos4dMESA (will be remapped) */ "dddd\0" "glWindowPos4dMESA\0" "\0" - /* _mesa_function_pool[39484]: Vertex3dv (offset 135) */ + /* _mesa_function_pool[39786]: Vertex3dv (offset 135) */ "p\0" "glVertex3dv\0" "\0" - /* _mesa_function_pool[39499]: CreateShaderProgramEXT (will be remapped) */ + /* _mesa_function_pool[39801]: CreateShaderProgramEXT (will be remapped) */ "ip\0" "glCreateShaderProgramEXT\0" "\0" - /* _mesa_function_pool[39528]: VertexAttribL2d (will be remapped) */ + /* _mesa_function_pool[39830]: VertexAttribL2d (will be remapped) */ "idd\0" "glVertexAttribL2d\0" "\0" - /* _mesa_function_pool[39551]: GetnMapivARB (will be remapped) */ + /* _mesa_function_pool[39853]: GetnMapivARB (will be remapped) */ "iiip\0" "glGetnMapivARB\0" "\0" - /* _mesa_function_pool[39572]: MapParameterfvNV (dynamic) */ + /* _mesa_function_pool[39874]: MapParameterfvNV (dynamic) */ "iip\0" "glMapParameterfvNV\0" "\0" - /* _mesa_function_pool[39596]: GetVertexAttribfv (will be remapped) */ + /* _mesa_function_pool[39898]: GetVertexAttribfv (will be remapped) */ "iip\0" "glGetVertexAttribfv\0" "glGetVertexAttribfvARB\0" "\0" - /* _mesa_function_pool[39644]: MultiTexCoordP4uiv (will be remapped) */ + /* _mesa_function_pool[39946]: MultiTexCoordP4uiv (will be remapped) */ "iip\0" "glMultiTexCoordP4uiv\0" "\0" - /* _mesa_function_pool[39670]: TexGeniv (offset 193) */ + /* _mesa_function_pool[39972]: TexGeniv (offset 193) */ "iip\0" "glTexGeniv\0" "glTexGenivOES\0" "\0" - /* _mesa_function_pool[39700]: WeightubvARB (dynamic) */ + /* _mesa_function_pool[40002]: WeightubvARB (dynamic) */ "ip\0" "glWeightubvARB\0" "\0" - /* _mesa_function_pool[39719]: BlendColor (offset 336) */ + /* _mesa_function_pool[40021]: BlendColor (offset 336) */ "ffff\0" "glBlendColor\0" "glBlendColorEXT\0" "\0" - /* _mesa_function_pool[39754]: Materiali (offset 171) */ + /* _mesa_function_pool[40056]: Materiali (offset 171) */ "iii\0" "glMateriali\0" "\0" - /* _mesa_function_pool[39771]: VertexAttrib2dvNV (will be remapped) */ + /* _mesa_function_pool[40073]: VertexAttrib2dvNV (will be remapped) */ "ip\0" "glVertexAttrib2dvNV\0" "\0" - /* _mesa_function_pool[39795]: NamedFramebufferDrawBuffers (will be remapped) */ + /* _mesa_function_pool[40097]: NamedFramebufferDrawBuffers (will be remapped) */ "iip\0" "glNamedFramebufferDrawBuffers\0" "\0" - /* _mesa_function_pool[39830]: ResetHistogram (offset 369) */ + /* _mesa_function_pool[40132]: ResetHistogram (offset 369) */ "i\0" "glResetHistogram\0" "glResetHistogramEXT\0" "\0" - /* _mesa_function_pool[39870]: CompressedTexSubImage2D (will be remapped) */ + /* _mesa_function_pool[40172]: CompressedTexSubImage2D (will be remapped) */ "iiiiiiiip\0" "glCompressedTexSubImage2D\0" "glCompressedTexSubImage2DARB\0" "\0" - /* _mesa_function_pool[39936]: TexCoord2sv (offset 109) */ + /* _mesa_function_pool[40238]: TexCoord2sv (offset 109) */ "p\0" "glTexCoord2sv\0" "\0" - /* _mesa_function_pool[39953]: StencilMaskSeparate (will be remapped) */ + /* _mesa_function_pool[40255]: StencilMaskSeparate (will be remapped) */ "ii\0" "glStencilMaskSeparate\0" "\0" - /* _mesa_function_pool[39979]: MultiTexCoord3sv (offset 399) */ + /* _mesa_function_pool[40281]: MultiTexCoord3sv (offset 399) */ "ip\0" "glMultiTexCoord3sv\0" "glMultiTexCoord3svARB\0" "\0" - /* _mesa_function_pool[40024]: GetMapParameterfvNV (dynamic) */ + /* _mesa_function_pool[40326]: GetMapParameterfvNV (dynamic) */ "iip\0" "glGetMapParameterfvNV\0" "\0" - /* _mesa_function_pool[40051]: TexCoord3iv (offset 115) */ + /* _mesa_function_pool[40353]: TexCoord3iv (offset 115) */ "p\0" "glTexCoord3iv\0" "\0" - /* _mesa_function_pool[40068]: MultiTexCoord4sv (offset 407) */ + /* _mesa_function_pool[40370]: MultiTexCoord4sv (offset 407) */ "ip\0" "glMultiTexCoord4sv\0" "glMultiTexCoord4svARB\0" "\0" - /* _mesa_function_pool[40113]: VertexBindingDivisor (will be remapped) */ + /* _mesa_function_pool[40415]: VertexBindingDivisor (will be remapped) */ "ii\0" "glVertexBindingDivisor\0" "\0" - /* _mesa_function_pool[40140]: GetPerfMonitorCounterInfoAMD (will be remapped) */ + /* _mesa_function_pool[40442]: PrimitiveBoundingBox (will be remapped) */ + "ffffffff\0" + "glPrimitiveBoundingBox\0" + "glPrimitiveBoundingBoxARB\0" + "glPrimitiveBoundingBoxEXT\0" + "glPrimitiveBoundingBoxOES\0" + "\0" + /* _mesa_function_pool[40553]: GetPerfMonitorCounterInfoAMD (will be remapped) */ "iiip\0" "glGetPerfMonitorCounterInfoAMD\0" "\0" - /* _mesa_function_pool[40177]: UniformBlockBinding (will be remapped) */ + /* _mesa_function_pool[40590]: UniformBlockBinding (will be remapped) */ "iii\0" "glUniformBlockBinding\0" "\0" - /* _mesa_function_pool[40204]: FenceSync (will be remapped) */ + /* _mesa_function_pool[40617]: FenceSync (will be remapped) */ "ii\0" "glFenceSync\0" "\0" - /* _mesa_function_pool[40220]: CompressedTextureSubImage2D (will be remapped) */ + /* _mesa_function_pool[40633]: CompressedTextureSubImage2D (will be remapped) */ "iiiiiiiip\0" "glCompressedTextureSubImage2D\0" "\0" - /* _mesa_function_pool[40261]: VertexAttrib4Nusv (will be remapped) */ + /* _mesa_function_pool[40674]: VertexAttrib4Nusv (will be remapped) */ "ip\0" "glVertexAttrib4Nusv\0" "glVertexAttrib4NusvARB\0" "\0" - /* _mesa_function_pool[40308]: SetFragmentShaderConstantATI (will be remapped) */ + /* _mesa_function_pool[40721]: SetFragmentShaderConstantATI (will be remapped) */ "ip\0" "glSetFragmentShaderConstantATI\0" "\0" - /* _mesa_function_pool[40343]: VertexP2ui (will be remapped) */ + /* _mesa_function_pool[40756]: VertexP2ui (will be remapped) */ "ii\0" "glVertexP2ui\0" "\0" - /* _mesa_function_pool[40360]: ProgramUniform2fv (will be remapped) */ + /* _mesa_function_pool[40773]: ProgramUniform2fv (will be remapped) */ "iiip\0" "glProgramUniform2fv\0" "glProgramUniform2fvEXT\0" "\0" - /* _mesa_function_pool[40409]: GetTextureLevelParameteriv (will be remapped) */ + /* _mesa_function_pool[40822]: GetTextureLevelParameteriv (will be remapped) */ "iiip\0" "glGetTextureLevelParameteriv\0" "\0" - /* _mesa_function_pool[40444]: GetTexEnvfv (offset 276) */ + /* _mesa_function_pool[40857]: GetTexEnvfv (offset 276) */ "iip\0" "glGetTexEnvfv\0" "\0" - /* _mesa_function_pool[40463]: BindAttribLocation (will be remapped) */ + /* _mesa_function_pool[40876]: BindAttribLocation (will be remapped) */ "iip\0" "glBindAttribLocation\0" "glBindAttribLocationARB\0" "\0" - /* _mesa_function_pool[40513]: TextureStorage2DEXT (will be remapped) */ + /* _mesa_function_pool[40926]: TextureStorage2DEXT (will be remapped) */ "iiiiii\0" "glTextureStorage2DEXT\0" "\0" - /* _mesa_function_pool[40543]: TextureParameterIiv (will be remapped) */ + /* _mesa_function_pool[40956]: TextureParameterIiv (will be remapped) */ "iip\0" "glTextureParameterIiv\0" "\0" - /* _mesa_function_pool[40570]: FragmentLightiSGIX (dynamic) */ + /* _mesa_function_pool[40983]: FragmentLightiSGIX (dynamic) */ "iii\0" "glFragmentLightiSGIX\0" "\0" - /* _mesa_function_pool[40596]: DrawTransformFeedbackInstanced (will be remapped) */ + /* _mesa_function_pool[41009]: DrawTransformFeedbackInstanced (will be remapped) */ "iii\0" "glDrawTransformFeedbackInstanced\0" "\0" - /* _mesa_function_pool[40634]: CopyTextureSubImage1D (will be remapped) */ + /* _mesa_function_pool[41047]: CopyTextureSubImage1D (will be remapped) */ "iiiiii\0" "glCopyTextureSubImage1D\0" "\0" - /* _mesa_function_pool[40666]: PollAsyncSGIX (dynamic) */ + /* _mesa_function_pool[41079]: PollAsyncSGIX (dynamic) */ "p\0" "glPollAsyncSGIX\0" "\0" - /* _mesa_function_pool[40685]: ResumeTransformFeedback (will be remapped) */ + /* _mesa_function_pool[41098]: ResumeTransformFeedback (will be remapped) */ "\0" "glResumeTransformFeedback\0" "\0" - /* _mesa_function_pool[40713]: GetProgramNamedParameterdvNV (will be remapped) */ + /* _mesa_function_pool[41126]: GetProgramNamedParameterdvNV (will be remapped) */ "iipp\0" "glGetProgramNamedParameterdvNV\0" "\0" - /* _mesa_function_pool[40750]: VertexAttribI1iv (will be remapped) */ + /* _mesa_function_pool[41163]: VertexAttribI1iv (will be remapped) */ "ip\0" "glVertexAttribI1ivEXT\0" "glVertexAttribI1iv\0" "\0" - /* _mesa_function_pool[40795]: Vertex2dv (offset 127) */ + /* _mesa_function_pool[41208]: Vertex2dv (offset 127) */ "p\0" "glVertex2dv\0" "\0" - /* _mesa_function_pool[40810]: VertexAttribI2uivEXT (will be remapped) */ + /* _mesa_function_pool[41223]: VertexAttribI2uivEXT (will be remapped) */ "ip\0" "glVertexAttribI2uivEXT\0" "glVertexAttribI2uiv\0" "\0" - /* _mesa_function_pool[40857]: SampleMaski (will be remapped) */ + /* _mesa_function_pool[41270]: SampleMaski (will be remapped) */ "ii\0" "glSampleMaski\0" "\0" - /* _mesa_function_pool[40875]: GetFloati_v (will be remapped) */ + /* _mesa_function_pool[41288]: GetFloati_v (will be remapped) */ "iip\0" "glGetFloati_v\0" + "glGetFloati_vOES\0" "\0" - /* _mesa_function_pool[40894]: MultiTexCoord2iv (offset 389) */ + /* _mesa_function_pool[41324]: MultiTexCoord2iv (offset 389) */ "ip\0" "glMultiTexCoord2iv\0" "glMultiTexCoord2ivARB\0" "\0" - /* _mesa_function_pool[40939]: DrawPixels (offset 257) */ + /* _mesa_function_pool[41369]: DrawPixels (offset 257) */ "iiiip\0" "glDrawPixels\0" "\0" - /* _mesa_function_pool[40959]: ReplacementCodeuiTexCoord2fNormal3fVertex3fSUN (dynamic) */ + /* _mesa_function_pool[41389]: ReplacementCodeuiTexCoord2fNormal3fVertex3fSUN (dynamic) */ "iffffffff\0" "glReplacementCodeuiTexCoord2fNormal3fVertex3fSUN\0" "\0" - /* _mesa_function_pool[41019]: SecondaryColor3iv (will be remapped) */ + /* _mesa_function_pool[41449]: SecondaryColor3iv (will be remapped) */ "p\0" "glSecondaryColor3iv\0" "glSecondaryColor3ivEXT\0" "\0" - /* _mesa_function_pool[41065]: DrawTransformFeedback (will be remapped) */ + /* _mesa_function_pool[41495]: DrawTransformFeedback (will be remapped) */ "ii\0" "glDrawTransformFeedback\0" "\0" - /* _mesa_function_pool[41093]: VertexAttribs3fvNV (will be remapped) */ + /* _mesa_function_pool[41523]: VertexAttribs3fvNV (will be remapped) */ "iip\0" "glVertexAttribs3fvNV\0" "\0" - /* _mesa_function_pool[41119]: GenLists (offset 5) */ + /* _mesa_function_pool[41549]: GenLists (offset 5) */ "i\0" "glGenLists\0" "\0" - /* _mesa_function_pool[41133]: MapGrid2d (offset 226) */ + /* _mesa_function_pool[41563]: MapGrid2d (offset 226) */ "iddidd\0" "glMapGrid2d\0" "\0" - /* _mesa_function_pool[41153]: MapGrid2f (offset 227) */ + /* _mesa_function_pool[41583]: MapGrid2f (offset 227) */ "iffiff\0" "glMapGrid2f\0" "\0" - /* _mesa_function_pool[41173]: SampleMapATI (will be remapped) */ + /* _mesa_function_pool[41603]: SampleMapATI (will be remapped) */ "iii\0" "glSampleMapATI\0" "\0" - /* _mesa_function_pool[41193]: TexBumpParameterfvATI (will be remapped) */ + /* _mesa_function_pool[41623]: TexBumpParameterfvATI (will be remapped) */ "ip\0" "glTexBumpParameterfvATI\0" "\0" - /* _mesa_function_pool[41221]: GetActiveAttrib (will be remapped) */ + /* _mesa_function_pool[41651]: GetActiveAttrib (will be remapped) */ "iiipppp\0" "glGetActiveAttrib\0" "glGetActiveAttribARB\0" "\0" - /* _mesa_function_pool[41269]: TexCoord2fColor4ubVertex3fvSUN (dynamic) */ + /* _mesa_function_pool[41699]: TexCoord2fColor4ubVertex3fvSUN (dynamic) */ "ppp\0" "glTexCoord2fColor4ubVertex3fvSUN\0" "\0" - /* _mesa_function_pool[41307]: PixelMapfv (offset 251) */ + /* _mesa_function_pool[41737]: PixelMapfv (offset 251) */ "iip\0" "glPixelMapfv\0" "\0" - /* _mesa_function_pool[41325]: ClearBufferData (will be remapped) */ + /* _mesa_function_pool[41755]: ClearBufferData (will be remapped) */ "iiiip\0" "glClearBufferData\0" "\0" - /* _mesa_function_pool[41350]: Color3usv (offset 24) */ + /* _mesa_function_pool[41780]: Color3usv (offset 24) */ "p\0" "glColor3usv\0" "\0" - /* _mesa_function_pool[41365]: CopyImageSubData (will be remapped) */ + /* _mesa_function_pool[41795]: CopyImageSubData (will be remapped) */ "iiiiiiiiiiiiiii\0" "glCopyImageSubData\0" "glCopyImageSubDataEXT\0" "glCopyImageSubDataOES\0" "\0" - /* _mesa_function_pool[41445]: StencilOpSeparate (will be remapped) */ + /* _mesa_function_pool[41875]: StencilOpSeparate (will be remapped) */ "iiii\0" "glStencilOpSeparate\0" "glStencilOpSeparateATI\0" "\0" - /* _mesa_function_pool[41494]: GenSamplers (will be remapped) */ + /* _mesa_function_pool[41924]: GenSamplers (will be remapped) */ "ip\0" "glGenSamplers\0" "\0" - /* _mesa_function_pool[41512]: ClipControl (will be remapped) */ + /* _mesa_function_pool[41942]: ClipControl (will be remapped) */ "ii\0" "glClipControl\0" "\0" - /* _mesa_function_pool[41530]: DrawTexfOES (will be remapped) */ + /* _mesa_function_pool[41960]: DrawTexfOES (will be remapped) */ "fffff\0" "glDrawTexfOES\0" "\0" - /* _mesa_function_pool[41551]: AttachObjectARB (will be remapped) */ + /* _mesa_function_pool[41981]: AttachObjectARB (will be remapped) */ "ii\0" "glAttachObjectARB\0" "\0" - /* _mesa_function_pool[41573]: GetFragmentLightivSGIX (dynamic) */ + /* _mesa_function_pool[42003]: GetFragmentLightivSGIX (dynamic) */ "iip\0" "glGetFragmentLightivSGIX\0" "\0" - /* _mesa_function_pool[41603]: Accum (offset 213) */ + /* _mesa_function_pool[42033]: Accum (offset 213) */ "if\0" "glAccum\0" "\0" - /* _mesa_function_pool[41615]: GetTexImage (offset 281) */ + /* _mesa_function_pool[42045]: GetTexImage (offset 281) */ "iiiip\0" "glGetTexImage\0" "\0" - /* _mesa_function_pool[41636]: Color4x (will be remapped) */ + /* _mesa_function_pool[42066]: Color4x (will be remapped) */ "iiii\0" "glColor4xOES\0" "glColor4x\0" "\0" - /* _mesa_function_pool[41665]: ConvolutionParameteriv (offset 353) */ + /* _mesa_function_pool[42095]: ConvolutionParameteriv (offset 353) */ "iip\0" "glConvolutionParameteriv\0" "glConvolutionParameterivEXT\0" "\0" - /* _mesa_function_pool[41723]: Color4s (offset 33) */ + /* _mesa_function_pool[42153]: Color4s (offset 33) */ "iiii\0" "glColor4s\0" "\0" - /* _mesa_function_pool[41739]: CullParameterdvEXT (dynamic) */ + /* _mesa_function_pool[42169]: CullParameterdvEXT (dynamic) */ "ip\0" "glCullParameterdvEXT\0" "\0" - /* _mesa_function_pool[41764]: EnableVertexAttribArray (will be remapped) */ + /* _mesa_function_pool[42194]: EnableVertexAttribArray (will be remapped) */ "i\0" "glEnableVertexAttribArray\0" "glEnableVertexAttribArrayARB\0" "\0" - /* _mesa_function_pool[41822]: Color4i (offset 31) */ + /* _mesa_function_pool[42252]: Color4i (offset 31) */ "iiii\0" "glColor4i\0" "\0" - /* _mesa_function_pool[41838]: Color4f (offset 29) */ + /* _mesa_function_pool[42268]: Color4f (offset 29) */ "ffff\0" "glColor4f\0" "\0" - /* _mesa_function_pool[41854]: ShaderStorageBlockBinding (will be remapped) */ + /* _mesa_function_pool[42284]: ShaderStorageBlockBinding (will be remapped) */ "iii\0" "glShaderStorageBlockBinding\0" "\0" - /* _mesa_function_pool[41887]: Color4d (offset 27) */ + /* _mesa_function_pool[42317]: Color4d (offset 27) */ "dddd\0" "glColor4d\0" "\0" - /* _mesa_function_pool[41903]: Color4b (offset 25) */ + /* _mesa_function_pool[42333]: Color4b (offset 25) */ "iiii\0" "glColor4b\0" "\0" - /* _mesa_function_pool[41919]: LoadProgramNV (will be remapped) */ + /* _mesa_function_pool[42349]: LoadProgramNV (will be remapped) */ "iiip\0" "glLoadProgramNV\0" "\0" - /* _mesa_function_pool[41941]: GetAttachedObjectsARB (will be remapped) */ + /* _mesa_function_pool[42371]: GetAttachedObjectsARB (will be remapped) */ "iipp\0" "glGetAttachedObjectsARB\0" "\0" - /* _mesa_function_pool[41971]: EvalCoord1fv (offset 231) */ + /* _mesa_function_pool[42401]: EvalCoord1fv (offset 231) */ "p\0" "glEvalCoord1fv\0" "\0" - /* _mesa_function_pool[41989]: VertexAttribLFormat (will be remapped) */ + /* _mesa_function_pool[42419]: VertexAttribLFormat (will be remapped) */ "iiii\0" "glVertexAttribLFormat\0" "\0" - /* _mesa_function_pool[42017]: VertexAttribL3d (will be remapped) */ + /* _mesa_function_pool[42447]: VertexAttribL3d (will be remapped) */ "iddd\0" "glVertexAttribL3d\0" "\0" - /* _mesa_function_pool[42041]: ClearNamedFramebufferuiv (will be remapped) */ + /* _mesa_function_pool[42471]: ClearNamedFramebufferuiv (will be remapped) */ "iiip\0" "glClearNamedFramebufferuiv\0" "\0" - /* _mesa_function_pool[42074]: StencilFuncSeparate (will be remapped) */ + /* _mesa_function_pool[42504]: StencilFuncSeparate (will be remapped) */ "iiii\0" "glStencilFuncSeparate\0" "\0" - /* _mesa_function_pool[42102]: ShaderSource (will be remapped) */ + /* _mesa_function_pool[42532]: ShaderSource (will be remapped) */ "iipp\0" "glShaderSource\0" "glShaderSourceARB\0" "\0" - /* _mesa_function_pool[42141]: Normal3fv (offset 57) */ + /* _mesa_function_pool[42571]: Normal3fv (offset 57) */ "p\0" "glNormal3fv\0" "\0" - /* _mesa_function_pool[42156]: ImageTransformParameterfvHP (dynamic) */ + /* _mesa_function_pool[42586]: ImageTransformParameterfvHP (dynamic) */ "iip\0" "glImageTransformParameterfvHP\0" "\0" - /* _mesa_function_pool[42191]: NormalP3ui (will be remapped) */ + /* _mesa_function_pool[42621]: NormalP3ui (will be remapped) */ "ii\0" "glNormalP3ui\0" "\0" - /* _mesa_function_pool[42208]: CreateSamplers (will be remapped) */ + /* _mesa_function_pool[42638]: CreateSamplers (will be remapped) */ "ip\0" "glCreateSamplers\0" "\0" - /* _mesa_function_pool[42229]: MultiTexCoord3fvARB (offset 395) */ + /* _mesa_function_pool[42659]: MultiTexCoord3fvARB (offset 395) */ "ip\0" "glMultiTexCoord3fv\0" "glMultiTexCoord3fvARB\0" "\0" - /* _mesa_function_pool[42274]: GetProgramParameterfvNV (will be remapped) */ + /* _mesa_function_pool[42704]: GetProgramParameterfvNV (will be remapped) */ "iiip\0" "glGetProgramParameterfvNV\0" "\0" - /* _mesa_function_pool[42306]: BufferData (will be remapped) */ + /* _mesa_function_pool[42736]: BufferData (will be remapped) */ "iipi\0" "glBufferData\0" "glBufferDataARB\0" "\0" - /* _mesa_function_pool[42341]: TexSubImage2D (offset 333) */ + /* _mesa_function_pool[42771]: TexSubImage2D (offset 333) */ "iiiiiiiip\0" "glTexSubImage2D\0" "glTexSubImage2DEXT\0" "\0" - /* _mesa_function_pool[42387]: FragmentLightivSGIX (dynamic) */ + /* _mesa_function_pool[42817]: FragmentLightivSGIX (dynamic) */ "iip\0" "glFragmentLightivSGIX\0" "\0" - /* _mesa_function_pool[42414]: GetTexParameterPointervAPPLE (dynamic) */ + /* _mesa_function_pool[42844]: GetTexParameterPointervAPPLE (dynamic) */ "iip\0" "glGetTexParameterPointervAPPLE\0" "\0" - /* _mesa_function_pool[42450]: TexGenfv (offset 191) */ + /* _mesa_function_pool[42880]: TexGenfv (offset 191) */ "iip\0" "glTexGenfv\0" "glTexGenfvOES\0" "\0" - /* _mesa_function_pool[42480]: GetVertexAttribiv (will be remapped) */ + /* _mesa_function_pool[42910]: GetVertexAttribiv (will be remapped) */ "iip\0" "glGetVertexAttribiv\0" "glGetVertexAttribivARB\0" "\0" - /* _mesa_function_pool[42528]: TexCoordP2uiv (will be remapped) */ + /* _mesa_function_pool[42958]: TexCoordP2uiv (will be remapped) */ "ip\0" "glTexCoordP2uiv\0" "\0" - /* _mesa_function_pool[42548]: ReplacementCodeuiColor3fVertex3fvSUN (dynamic) */ + /* _mesa_function_pool[42978]: ReplacementCodeuiColor3fVertex3fvSUN (dynamic) */ "ppp\0" "glReplacementCodeuiColor3fVertex3fvSUN\0" "\0" - /* _mesa_function_pool[42592]: Uniform3fv (will be remapped) */ + /* _mesa_function_pool[43022]: Uniform3fv (will be remapped) */ "iip\0" "glUniform3fv\0" "glUniform3fvARB\0" "\0" - /* _mesa_function_pool[42626]: BlendEquation (offset 337) */ + /* _mesa_function_pool[43056]: BlendEquation (offset 337) */ "i\0" "glBlendEquation\0" "glBlendEquationEXT\0" "glBlendEquationOES\0" "\0" - /* _mesa_function_pool[42683]: VertexAttrib3dNV (will be remapped) */ + /* _mesa_function_pool[43113]: VertexAttrib3dNV (will be remapped) */ "iddd\0" "glVertexAttrib3dNV\0" "\0" - /* _mesa_function_pool[42708]: ReplacementCodeuiTexCoord2fColor4fNormal3fVertex3fvSUN (dynamic) */ + /* _mesa_function_pool[43138]: ReplacementCodeuiTexCoord2fColor4fNormal3fVertex3fvSUN (dynamic) */ "ppppp\0" "glReplacementCodeuiTexCoord2fColor4fNormal3fVertex3fvSUN\0" "\0" - /* _mesa_function_pool[42772]: IndexFuncEXT (dynamic) */ + /* _mesa_function_pool[43202]: IndexFuncEXT (dynamic) */ "if\0" "glIndexFuncEXT\0" "\0" - /* _mesa_function_pool[42791]: UseShaderProgramEXT (will be remapped) */ + /* _mesa_function_pool[43221]: UseShaderProgramEXT (will be remapped) */ "ii\0" "glUseShaderProgramEXT\0" "\0" - /* _mesa_function_pool[42817]: PushName (offset 201) */ + /* _mesa_function_pool[43247]: PushName (offset 201) */ "i\0" "glPushName\0" "\0" - /* _mesa_function_pool[42831]: GenFencesNV (dynamic) */ + /* _mesa_function_pool[43261]: GenFencesNV (dynamic) */ "ip\0" "glGenFencesNV\0" "\0" - /* _mesa_function_pool[42849]: CullParameterfvEXT (dynamic) */ + /* _mesa_function_pool[43279]: CullParameterfvEXT (dynamic) */ "ip\0" "glCullParameterfvEXT\0" "\0" - /* _mesa_function_pool[42874]: DeleteRenderbuffers (will be remapped) */ + /* _mesa_function_pool[43304]: DeleteRenderbuffers (will be remapped) */ "ip\0" "glDeleteRenderbuffers\0" "glDeleteRenderbuffersEXT\0" "glDeleteRenderbuffersOES\0" "\0" - /* _mesa_function_pool[42950]: VertexAttrib1dv (will be remapped) */ + /* _mesa_function_pool[43380]: VertexAttrib1dv (will be remapped) */ "ip\0" "glVertexAttrib1dv\0" "glVertexAttrib1dvARB\0" "\0" - /* _mesa_function_pool[42993]: ImageTransformParameteriHP (dynamic) */ + /* _mesa_function_pool[43423]: ImageTransformParameteriHP (dynamic) */ "iii\0" "glImageTransformParameteriHP\0" "\0" - /* _mesa_function_pool[43027]: IsShader (will be remapped) */ + /* _mesa_function_pool[43457]: IsShader (will be remapped) */ "i\0" "glIsShader\0" "\0" - /* _mesa_function_pool[43041]: Rotated (offset 299) */ + /* _mesa_function_pool[43471]: Rotated (offset 299) */ "dddd\0" "glRotated\0" "\0" - /* _mesa_function_pool[43057]: Color4iv (offset 32) */ + /* _mesa_function_pool[43487]: Color4iv (offset 32) */ "p\0" "glColor4iv\0" "\0" - /* _mesa_function_pool[43071]: PointParameterxv (will be remapped) */ + /* _mesa_function_pool[43501]: PointParameterxv (will be remapped) */ "ip\0" "glPointParameterxvOES\0" "glPointParameterxv\0" "\0" - /* _mesa_function_pool[43116]: Rotatex (will be remapped) */ + /* _mesa_function_pool[43546]: Rotatex (will be remapped) */ "iiii\0" "glRotatexOES\0" "glRotatex\0" "\0" - /* _mesa_function_pool[43145]: FramebufferTextureLayer (will be remapped) */ + /* _mesa_function_pool[43575]: FramebufferTextureLayer (will be remapped) */ "iiiii\0" "glFramebufferTextureLayer\0" "glFramebufferTextureLayerEXT\0" "\0" - /* _mesa_function_pool[43207]: TexEnvfv (offset 185) */ + /* _mesa_function_pool[43637]: TexEnvfv (offset 185) */ "iip\0" "glTexEnvfv\0" "\0" - /* _mesa_function_pool[43223]: ProgramUniformMatrix3fv (will be remapped) */ + /* _mesa_function_pool[43653]: ProgramUniformMatrix3fv (will be remapped) */ "iiiip\0" "glProgramUniformMatrix3fv\0" "glProgramUniformMatrix3fvEXT\0" "\0" - /* _mesa_function_pool[43285]: LoadMatrixf (offset 291) */ + /* _mesa_function_pool[43715]: LoadMatrixf (offset 291) */ "p\0" "glLoadMatrixf\0" "\0" - /* _mesa_function_pool[43302]: GetProgramLocalParameterfvARB (will be remapped) */ + /* _mesa_function_pool[43732]: GetProgramLocalParameterfvARB (will be remapped) */ "iip\0" "glGetProgramLocalParameterfvARB\0" "\0" - /* _mesa_function_pool[43339]: MultiDrawArraysIndirect (will be remapped) */ + /* _mesa_function_pool[43769]: MultiDrawArraysIndirect (will be remapped) */ "ipii\0" "glMultiDrawArraysIndirect\0" "\0" - /* _mesa_function_pool[43371]: DrawRangeElementsBaseVertex (will be remapped) */ + /* _mesa_function_pool[43801]: DrawRangeElementsBaseVertex (will be remapped) */ "iiiiipi\0" "glDrawRangeElementsBaseVertex\0" "glDrawRangeElementsBaseVertexEXT\0" "glDrawRangeElementsBaseVertexOES\0" "\0" - /* _mesa_function_pool[43476]: ProgramUniformMatrix4dv (will be remapped) */ + /* _mesa_function_pool[43906]: ProgramUniformMatrix4dv (will be remapped) */ "iiiip\0" "glProgramUniformMatrix4dv\0" "\0" - /* _mesa_function_pool[43509]: MatrixIndexuivARB (dynamic) */ + /* _mesa_function_pool[43939]: MatrixIndexuivARB (dynamic) */ "ip\0" "glMatrixIndexuivARB\0" "\0" - /* _mesa_function_pool[43533]: Tangent3sEXT (dynamic) */ + /* _mesa_function_pool[43963]: Tangent3sEXT (dynamic) */ "iii\0" "glTangent3sEXT\0" "\0" - /* _mesa_function_pool[43553]: SecondaryColor3bv (will be remapped) */ + /* _mesa_function_pool[43983]: SecondaryColor3bv (will be remapped) */ "p\0" "glSecondaryColor3bv\0" "glSecondaryColor3bvEXT\0" "\0" - /* _mesa_function_pool[43599]: GlobalAlphaFactorusSUN (dynamic) */ + /* _mesa_function_pool[44029]: GlobalAlphaFactorusSUN (dynamic) */ "i\0" "glGlobalAlphaFactorusSUN\0" "\0" - /* _mesa_function_pool[43627]: GetCombinerOutputParameterivNV (dynamic) */ + /* _mesa_function_pool[44057]: GetCombinerOutputParameterivNV (dynamic) */ "iiip\0" "glGetCombinerOutputParameterivNV\0" "\0" - /* _mesa_function_pool[43666]: DrawTexxvOES (will be remapped) */ + /* _mesa_function_pool[44096]: DrawTexxvOES (will be remapped) */ "p\0" "glDrawTexxvOES\0" "\0" - /* _mesa_function_pool[43684]: TexParameterfv (offset 179) */ + /* _mesa_function_pool[44114]: TexParameterfv (offset 179) */ "iip\0" "glTexParameterfv\0" "\0" - /* _mesa_function_pool[43706]: Color4ubv (offset 36) */ + /* _mesa_function_pool[44136]: Color4ubv (offset 36) */ "p\0" "glColor4ubv\0" "\0" - /* _mesa_function_pool[43721]: TexCoord2fv (offset 105) */ + /* _mesa_function_pool[44151]: TexCoord2fv (offset 105) */ "p\0" "glTexCoord2fv\0" "\0" - /* _mesa_function_pool[43738]: FogCoorddv (will be remapped) */ + /* _mesa_function_pool[44168]: FogCoorddv (will be remapped) */ "p\0" "glFogCoorddv\0" "glFogCoorddvEXT\0" "\0" - /* _mesa_function_pool[43770]: VDPAUUnregisterSurfaceNV (will be remapped) */ + /* _mesa_function_pool[44200]: VDPAUUnregisterSurfaceNV (will be remapped) */ "i\0" "glVDPAUUnregisterSurfaceNV\0" "\0" - /* _mesa_function_pool[43800]: ColorP3ui (will be remapped) */ + /* _mesa_function_pool[44230]: ColorP3ui (will be remapped) */ "ii\0" "glColorP3ui\0" "\0" - /* _mesa_function_pool[43816]: ClearBufferuiv (will be remapped) */ + /* _mesa_function_pool[44246]: ClearBufferuiv (will be remapped) */ "iip\0" "glClearBufferuiv\0" "\0" - /* _mesa_function_pool[43838]: GetShaderPrecisionFormat (will be remapped) */ + /* _mesa_function_pool[44268]: GetShaderPrecisionFormat (will be remapped) */ "iipp\0" "glGetShaderPrecisionFormat\0" "\0" - /* _mesa_function_pool[43871]: ProgramNamedParameter4dvNV (will be remapped) */ + /* _mesa_function_pool[44301]: ProgramNamedParameter4dvNV (will be remapped) */ "iipp\0" "glProgramNamedParameter4dvNV\0" "\0" - /* _mesa_function_pool[43906]: Flush (offset 217) */ + /* _mesa_function_pool[44336]: Flush (offset 217) */ "\0" "glFlush\0" "\0" - /* _mesa_function_pool[43916]: VertexAttribI4iEXT (will be remapped) */ + /* _mesa_function_pool[44346]: VertexAttribI4iEXT (will be remapped) */ "iiiii\0" "glVertexAttribI4iEXT\0" "glVertexAttribI4i\0" "\0" - /* _mesa_function_pool[43962]: FogCoordd (will be remapped) */ + /* _mesa_function_pool[44392]: FogCoordd (will be remapped) */ "d\0" "glFogCoordd\0" "glFogCoorddEXT\0" "\0" - /* _mesa_function_pool[43992]: BindFramebufferEXT (will be remapped) */ + /* _mesa_function_pool[44422]: BindFramebufferEXT (will be remapped) */ "ii\0" "glBindFramebufferEXT\0" "\0" - /* _mesa_function_pool[44017]: Uniform3iv (will be remapped) */ + /* _mesa_function_pool[44447]: Uniform3iv (will be remapped) */ "iip\0" "glUniform3iv\0" "glUniform3ivARB\0" "\0" - /* _mesa_function_pool[44051]: TexStorage2DMultisample (will be remapped) */ + /* _mesa_function_pool[44481]: TexStorage2DMultisample (will be remapped) */ "iiiiii\0" "glTexStorage2DMultisample\0" "\0" - /* _mesa_function_pool[44085]: UnlockArraysEXT (will be remapped) */ + /* _mesa_function_pool[44515]: UnlockArraysEXT (will be remapped) */ "\0" "glUnlockArraysEXT\0" "\0" - /* _mesa_function_pool[44105]: VertexAttrib1svNV (will be remapped) */ + /* _mesa_function_pool[44535]: VertexAttrib1svNV (will be remapped) */ "ip\0" "glVertexAttrib1svNV\0" "\0" - /* _mesa_function_pool[44129]: VertexAttrib4iv (will be remapped) */ + /* _mesa_function_pool[44559]: VertexAttrib4iv (will be remapped) */ "ip\0" "glVertexAttrib4iv\0" "glVertexAttrib4ivARB\0" "\0" - /* _mesa_function_pool[44172]: CopyTexSubImage3D (offset 373) */ + /* _mesa_function_pool[44602]: CopyTexSubImage3D (offset 373) */ "iiiiiiiii\0" "glCopyTexSubImage3D\0" "glCopyTexSubImage3DEXT\0" "glCopyTexSubImage3DOES\0" "\0" - /* _mesa_function_pool[44249]: PolygonOffsetClampEXT (will be remapped) */ + /* _mesa_function_pool[44679]: PolygonOffsetClampEXT (will be remapped) */ "fff\0" "glPolygonOffsetClampEXT\0" "\0" - /* _mesa_function_pool[44278]: GetInteger64v (will be remapped) */ + /* _mesa_function_pool[44708]: GetInteger64v (will be remapped) */ "ip\0" "glGetInteger64v\0" "\0" - /* _mesa_function_pool[44298]: DetachObjectARB (will be remapped) */ + /* _mesa_function_pool[44728]: DetachObjectARB (will be remapped) */ "ii\0" "glDetachObjectARB\0" "\0" - /* _mesa_function_pool[44320]: Indexiv (offset 49) */ + /* _mesa_function_pool[44750]: Indexiv (offset 49) */ "p\0" "glIndexiv\0" "\0" - /* _mesa_function_pool[44333]: TexEnvi (offset 186) */ + /* _mesa_function_pool[44763]: TexEnvi (offset 186) */ "iii\0" "glTexEnvi\0" "\0" - /* _mesa_function_pool[44348]: TexEnvf (offset 184) */ + /* _mesa_function_pool[44778]: TexEnvf (offset 184) */ "iif\0" "glTexEnvf\0" "\0" - /* _mesa_function_pool[44363]: TexEnvx (will be remapped) */ + /* _mesa_function_pool[44793]: TexEnvx (will be remapped) */ "iii\0" "glTexEnvxOES\0" "glTexEnvx\0" "\0" - /* _mesa_function_pool[44391]: LoadIdentityDeformationMapSGIX (dynamic) */ + /* _mesa_function_pool[44821]: LoadIdentityDeformationMapSGIX (dynamic) */ "i\0" "glLoadIdentityDeformationMapSGIX\0" "\0" - /* _mesa_function_pool[44427]: StopInstrumentsSGIX (dynamic) */ + /* _mesa_function_pool[44857]: StopInstrumentsSGIX (dynamic) */ "i\0" "glStopInstrumentsSGIX\0" "\0" - /* _mesa_function_pool[44452]: TexCoord4fColor4fNormal3fVertex4fSUN (dynamic) */ + /* _mesa_function_pool[44882]: TexCoord4fColor4fNormal3fVertex4fSUN (dynamic) */ "fffffffffffffff\0" "glTexCoord4fColor4fNormal3fVertex4fSUN\0" "\0" - /* _mesa_function_pool[44508]: InvalidateBufferSubData (will be remapped) */ + /* _mesa_function_pool[44938]: InvalidateBufferSubData (will be remapped) */ "iii\0" "glInvalidateBufferSubData\0" "\0" - /* _mesa_function_pool[44539]: UniformMatrix4x2fv (will be remapped) */ + /* _mesa_function_pool[44969]: UniformMatrix4x2fv (will be remapped) */ "iiip\0" "glUniformMatrix4x2fv\0" "\0" - /* _mesa_function_pool[44566]: ClearTexImage (will be remapped) */ + /* _mesa_function_pool[44996]: ClearTexImage (will be remapped) */ "iiiip\0" "glClearTexImage\0" "\0" - /* _mesa_function_pool[44589]: PolygonOffset (offset 319) */ + /* _mesa_function_pool[45019]: PolygonOffset (offset 319) */ "ff\0" "glPolygonOffset\0" "\0" - /* _mesa_function_pool[44609]: NormalPointervINTEL (dynamic) */ + /* _mesa_function_pool[45039]: NormalPointervINTEL (dynamic) */ "ip\0" "glNormalPointervINTEL\0" "\0" - /* _mesa_function_pool[44635]: SamplerParameterfv (will be remapped) */ + /* _mesa_function_pool[45065]: SamplerParameterfv (will be remapped) */ "iip\0" "glSamplerParameterfv\0" "\0" - /* _mesa_function_pool[44661]: CompressedTextureSubImage1D (will be remapped) */ + /* _mesa_function_pool[45091]: CompressedTextureSubImage1D (will be remapped) */ "iiiiiip\0" "glCompressedTextureSubImage1D\0" "\0" - /* _mesa_function_pool[44700]: ProgramUniformMatrix4x2dv (will be remapped) */ + /* _mesa_function_pool[45130]: ProgramUniformMatrix4x2dv (will be remapped) */ "iiiip\0" "glProgramUniformMatrix4x2dv\0" "\0" - /* _mesa_function_pool[44735]: ProgramEnvParameter4fARB (will be remapped) */ + /* _mesa_function_pool[45165]: ProgramEnvParameter4fARB (will be remapped) */ "iiffff\0" "glProgramEnvParameter4fARB\0" "glProgramParameter4fNV\0" "\0" - /* _mesa_function_pool[44793]: ClearDepth (offset 208) */ + /* _mesa_function_pool[45223]: ClearDepth (offset 208) */ "d\0" "glClearDepth\0" "\0" - /* _mesa_function_pool[44809]: VertexAttrib3dvNV (will be remapped) */ + /* _mesa_function_pool[45239]: VertexAttrib3dvNV (will be remapped) */ "ip\0" "glVertexAttrib3dvNV\0" "\0" - /* _mesa_function_pool[44833]: Color4fv (offset 30) */ + /* _mesa_function_pool[45263]: Color4fv (offset 30) */ "p\0" "glColor4fv\0" "\0" - /* _mesa_function_pool[44847]: GetnMinmaxARB (will be remapped) */ + /* _mesa_function_pool[45277]: GetnMinmaxARB (will be remapped) */ "iiiiip\0" "glGetnMinmaxARB\0" "\0" - /* _mesa_function_pool[44871]: ColorPointer (offset 308) */ + /* _mesa_function_pool[45301]: ColorPointer (offset 308) */ "iiip\0" "glColorPointer\0" "\0" - /* _mesa_function_pool[44892]: GetPointerv (offset 329) */ + /* _mesa_function_pool[45322]: GetPointerv (offset 329) */ "ip\0" "glGetPointerv\0" "glGetPointervKHR\0" "glGetPointervEXT\0" "\0" - /* _mesa_function_pool[44944]: Lightiv (offset 162) */ + /* _mesa_function_pool[45374]: Lightiv (offset 162) */ "iip\0" "glLightiv\0" "\0" - /* _mesa_function_pool[44959]: GetTexParameterIuiv (will be remapped) */ + /* _mesa_function_pool[45389]: GetTexParameterIuiv (will be remapped) */ "iip\0" "glGetTexParameterIuivEXT\0" "glGetTexParameterIuiv\0" "glGetTexParameterIuivOES\0" "\0" - /* _mesa_function_pool[45036]: TransformFeedbackVaryings (will be remapped) */ + /* _mesa_function_pool[45466]: TransformFeedbackVaryings (will be remapped) */ "iipi\0" "glTransformFeedbackVaryings\0" "glTransformFeedbackVaryingsEXT\0" "\0" - /* _mesa_function_pool[45101]: VertexAttrib3sv (will be remapped) */ + /* _mesa_function_pool[45531]: VertexAttrib3sv (will be remapped) */ "ip\0" "glVertexAttrib3sv\0" "glVertexAttrib3svARB\0" "\0" - /* _mesa_function_pool[45144]: IsVertexArray (will be remapped) */ + /* _mesa_function_pool[45574]: IsVertexArray (will be remapped) */ "i\0" "glIsVertexArray\0" "glIsVertexArrayAPPLE\0" "glIsVertexArrayOES\0" "\0" - /* _mesa_function_pool[45203]: PushClientAttrib (offset 335) */ + /* _mesa_function_pool[45633]: PushClientAttrib (offset 335) */ "i\0" "glPushClientAttrib\0" "\0" - /* _mesa_function_pool[45225]: ProgramUniform4ui (will be remapped) */ + /* _mesa_function_pool[45655]: ProgramUniform4ui (will be remapped) */ "iiiiii\0" "glProgramUniform4ui\0" "glProgramUniform4uiEXT\0" "\0" - /* _mesa_function_pool[45276]: Uniform1f (will be remapped) */ + /* _mesa_function_pool[45706]: Uniform1f (will be remapped) */ "if\0" "glUniform1f\0" "glUniform1fARB\0" "\0" - /* _mesa_function_pool[45307]: Uniform1d (will be remapped) */ + /* _mesa_function_pool[45737]: Uniform1d (will be remapped) */ "id\0" "glUniform1d\0" "\0" - /* _mesa_function_pool[45323]: FragmentMaterialfSGIX (dynamic) */ + /* _mesa_function_pool[45753]: FragmentMaterialfSGIX (dynamic) */ "iif\0" "glFragmentMaterialfSGIX\0" "\0" - /* _mesa_function_pool[45352]: Uniform1i (will be remapped) */ + /* _mesa_function_pool[45782]: Uniform1i (will be remapped) */ "ii\0" "glUniform1i\0" "glUniform1iARB\0" "\0" - /* _mesa_function_pool[45383]: GetPolygonStipple (offset 274) */ + /* _mesa_function_pool[45813]: GetPolygonStipple (offset 274) */ "p\0" "glGetPolygonStipple\0" "\0" - /* _mesa_function_pool[45406]: Tangent3dvEXT (dynamic) */ + /* _mesa_function_pool[45836]: Tangent3dvEXT (dynamic) */ "p\0" "glTangent3dvEXT\0" "\0" - /* _mesa_function_pool[45425]: BlitNamedFramebuffer (will be remapped) */ + /* _mesa_function_pool[45855]: BlitNamedFramebuffer (will be remapped) */ "iiiiiiiiiiii\0" "glBlitNamedFramebuffer\0" "\0" - /* _mesa_function_pool[45462]: PixelTexGenSGIX (dynamic) */ + /* _mesa_function_pool[45892]: PixelTexGenSGIX (dynamic) */ "i\0" "glPixelTexGenSGIX\0" "\0" - /* _mesa_function_pool[45483]: ReplacementCodeusvSUN (dynamic) */ + /* _mesa_function_pool[45913]: ReplacementCodeusvSUN (dynamic) */ "p\0" "glReplacementCodeusvSUN\0" "\0" - /* _mesa_function_pool[45510]: UseProgram (will be remapped) */ + /* _mesa_function_pool[45940]: UseProgram (will be remapped) */ "i\0" "glUseProgram\0" "glUseProgramObjectARB\0" "\0" - /* _mesa_function_pool[45548]: StartInstrumentsSGIX (dynamic) */ + /* _mesa_function_pool[45978]: StartInstrumentsSGIX (dynamic) */ "\0" "glStartInstrumentsSGIX\0" "\0" - /* _mesa_function_pool[45573]: FlushMappedBufferRangeAPPLE (will be remapped) */ + /* _mesa_function_pool[46003]: FlushMappedBufferRangeAPPLE (will be remapped) */ "iii\0" "glFlushMappedBufferRangeAPPLE\0" "\0" - /* _mesa_function_pool[45608]: GetFragDataLocation (will be remapped) */ + /* _mesa_function_pool[46038]: GetFragDataLocation (will be remapped) */ "ip\0" "glGetFragDataLocationEXT\0" "glGetFragDataLocation\0" "\0" - /* _mesa_function_pool[45659]: PixelMapuiv (offset 252) */ + /* _mesa_function_pool[46089]: PixelMapuiv (offset 252) */ "iip\0" "glPixelMapuiv\0" "\0" - /* _mesa_function_pool[45678]: ClearNamedBufferSubData (will be remapped) */ + /* _mesa_function_pool[46108]: ClearNamedBufferSubData (will be remapped) */ "iiiiiip\0" "glClearNamedBufferSubData\0" "\0" - /* _mesa_function_pool[45713]: VertexWeightfvEXT (dynamic) */ + /* _mesa_function_pool[46143]: VertexWeightfvEXT (dynamic) */ "p\0" "glVertexWeightfvEXT\0" "\0" - /* _mesa_function_pool[45736]: GetFenceivNV (dynamic) */ + /* _mesa_function_pool[46166]: GetFenceivNV (dynamic) */ "iip\0" "glGetFenceivNV\0" "\0" - /* _mesa_function_pool[45756]: CurrentPaletteMatrixARB (dynamic) */ + /* _mesa_function_pool[46186]: CurrentPaletteMatrixARB (dynamic) */ "i\0" "glCurrentPaletteMatrixARB\0" "glCurrentPaletteMatrixOES\0" "\0" - /* _mesa_function_pool[45811]: GenVertexArrays (will be remapped) */ + /* _mesa_function_pool[46241]: GenVertexArrays (will be remapped) */ "ip\0" "glGenVertexArrays\0" "glGenVertexArraysOES\0" "\0" - /* _mesa_function_pool[45854]: TexCoord2fColor4ubVertex3fSUN (dynamic) */ + /* _mesa_function_pool[46284]: TexCoord2fColor4ubVertex3fSUN (dynamic) */ "ffiiiifff\0" "glTexCoord2fColor4ubVertex3fSUN\0" "\0" - /* _mesa_function_pool[45897]: TagSampleBufferSGIX (dynamic) */ + /* _mesa_function_pool[46327]: TagSampleBufferSGIX (dynamic) */ "\0" "glTagSampleBufferSGIX\0" "\0" - /* _mesa_function_pool[45921]: Color3s (offset 17) */ + /* _mesa_function_pool[46351]: Color3s (offset 17) */ "iii\0" "glColor3s\0" "\0" - /* _mesa_function_pool[45936]: TextureStorage2DMultisample (will be remapped) */ + /* _mesa_function_pool[46366]: TextureStorage2DMultisample (will be remapped) */ "iiiiii\0" "glTextureStorage2DMultisample\0" "\0" - /* _mesa_function_pool[45974]: TexCoordPointer (offset 320) */ + /* _mesa_function_pool[46404]: TexCoordPointer (offset 320) */ "iiip\0" "glTexCoordPointer\0" "\0" - /* _mesa_function_pool[45998]: Color3i (offset 15) */ + /* _mesa_function_pool[46428]: Color3i (offset 15) */ "iii\0" "glColor3i\0" "\0" - /* _mesa_function_pool[46013]: EvalCoord2d (offset 232) */ + /* _mesa_function_pool[46443]: EvalCoord2d (offset 232) */ "dd\0" "glEvalCoord2d\0" "\0" - /* _mesa_function_pool[46031]: EvalCoord2f (offset 234) */ + /* _mesa_function_pool[46461]: EvalCoord2f (offset 234) */ "ff\0" "glEvalCoord2f\0" "\0" - /* _mesa_function_pool[46049]: Color3b (offset 9) */ + /* _mesa_function_pool[46479]: Color3b (offset 9) */ "iii\0" "glColor3b\0" "\0" - /* _mesa_function_pool[46064]: ExecuteProgramNV (will be remapped) */ + /* _mesa_function_pool[46494]: ExecuteProgramNV (will be remapped) */ "iip\0" "glExecuteProgramNV\0" "\0" - /* _mesa_function_pool[46088]: Color3f (offset 13) */ + /* _mesa_function_pool[46518]: Color3f (offset 13) */ "fff\0" "glColor3f\0" "\0" - /* _mesa_function_pool[46103]: Color3d (offset 11) */ + /* _mesa_function_pool[46533]: Color3d (offset 11) */ "ddd\0" "glColor3d\0" "\0" - /* _mesa_function_pool[46118]: GetVertexAttribdv (will be remapped) */ + /* _mesa_function_pool[46548]: GetVertexAttribdv (will be remapped) */ "iip\0" "glGetVertexAttribdv\0" "glGetVertexAttribdvARB\0" "\0" - /* _mesa_function_pool[46166]: GetBufferPointerv (will be remapped) */ + /* _mesa_function_pool[46596]: GetBufferPointerv (will be remapped) */ "iip\0" "glGetBufferPointerv\0" "glGetBufferPointervARB\0" "glGetBufferPointervOES\0" "\0" - /* _mesa_function_pool[46237]: GenFramebuffers (will be remapped) */ + /* _mesa_function_pool[46667]: GenFramebuffers (will be remapped) */ "ip\0" "glGenFramebuffers\0" "glGenFramebuffersEXT\0" "glGenFramebuffersOES\0" "\0" - /* _mesa_function_pool[46301]: GenBuffers (will be remapped) */ + /* _mesa_function_pool[46731]: GenBuffers (will be remapped) */ "ip\0" "glGenBuffers\0" "glGenBuffersARB\0" "\0" - /* _mesa_function_pool[46334]: ClearDepthx (will be remapped) */ + /* _mesa_function_pool[46764]: ClearDepthx (will be remapped) */ "i\0" "glClearDepthxOES\0" "glClearDepthx\0" "\0" - /* _mesa_function_pool[46368]: EnableVertexArrayAttrib (will be remapped) */ + /* _mesa_function_pool[46798]: EnableVertexArrayAttrib (will be remapped) */ "ii\0" "glEnableVertexArrayAttrib\0" "\0" - /* _mesa_function_pool[46398]: BlendEquationSeparate (will be remapped) */ + /* _mesa_function_pool[46828]: BlendEquationSeparate (will be remapped) */ "ii\0" "glBlendEquationSeparate\0" "glBlendEquationSeparateEXT\0" "glBlendEquationSeparateATI\0" "glBlendEquationSeparateOES\0" "\0" - /* _mesa_function_pool[46507]: PixelTransformParameteriEXT (dynamic) */ + /* _mesa_function_pool[46937]: PixelTransformParameteriEXT (dynamic) */ "iii\0" "glPixelTransformParameteriEXT\0" "\0" - /* _mesa_function_pool[46542]: MultiTexCoordP4ui (will be remapped) */ + /* _mesa_function_pool[46972]: MultiTexCoordP4ui (will be remapped) */ "iii\0" "glMultiTexCoordP4ui\0" "\0" - /* _mesa_function_pool[46567]: VertexAttribs1fvNV (will be remapped) */ + /* _mesa_function_pool[46997]: VertexAttribs1fvNV (will be remapped) */ "iip\0" "glVertexAttribs1fvNV\0" "\0" - /* _mesa_function_pool[46593]: VertexAttribIPointer (will be remapped) */ + /* _mesa_function_pool[47023]: VertexAttribIPointer (will be remapped) */ "iiiip\0" "glVertexAttribIPointerEXT\0" "glVertexAttribIPointer\0" "\0" - /* _mesa_function_pool[46649]: ProgramUniform4fv (will be remapped) */ + /* _mesa_function_pool[47079]: ProgramUniform4fv (will be remapped) */ "iiip\0" "glProgramUniform4fv\0" "glProgramUniform4fvEXT\0" "\0" - /* _mesa_function_pool[46698]: FrameZoomSGIX (dynamic) */ + /* _mesa_function_pool[47128]: FrameZoomSGIX (dynamic) */ "i\0" "glFrameZoomSGIX\0" "\0" - /* _mesa_function_pool[46717]: RasterPos4sv (offset 85) */ + /* _mesa_function_pool[47147]: RasterPos4sv (offset 85) */ "p\0" "glRasterPos4sv\0" "\0" - /* _mesa_function_pool[46735]: CopyTextureSubImage3D (will be remapped) */ + /* _mesa_function_pool[47165]: CopyTextureSubImage3D (will be remapped) */ "iiiiiiiii\0" "glCopyTextureSubImage3D\0" "\0" - /* _mesa_function_pool[46770]: SelectBuffer (offset 195) */ + /* _mesa_function_pool[47200]: SelectBuffer (offset 195) */ "ip\0" "glSelectBuffer\0" "\0" - /* _mesa_function_pool[46789]: GetSynciv (will be remapped) */ + /* _mesa_function_pool[47219]: GetSynciv (will be remapped) */ "iiipp\0" "glGetSynciv\0" "\0" - /* _mesa_function_pool[46808]: TextureView (will be remapped) */ + /* _mesa_function_pool[47238]: TextureView (will be remapped) */ "iiiiiiii\0" "glTextureView\0" "\0" - /* _mesa_function_pool[46832]: TexEnviv (offset 187) */ + /* _mesa_function_pool[47262]: TexEnviv (offset 187) */ "iip\0" "glTexEnviv\0" "\0" - /* _mesa_function_pool[46848]: TexSubImage3D (offset 372) */ + /* _mesa_function_pool[47278]: TexSubImage3D (offset 372) */ "iiiiiiiiiip\0" "glTexSubImage3D\0" "glTexSubImage3DEXT\0" "glTexSubImage3DOES\0" "\0" - /* _mesa_function_pool[46915]: Bitmap (offset 8) */ + /* _mesa_function_pool[47345]: Bitmap (offset 8) */ "iiffffp\0" "glBitmap\0" "\0" - /* _mesa_function_pool[46933]: VertexAttribDivisor (will be remapped) */ + /* _mesa_function_pool[47363]: VertexAttribDivisor (will be remapped) */ "ii\0" "glVertexAttribDivisorARB\0" "glVertexAttribDivisor\0" "\0" - /* _mesa_function_pool[46984]: DrawTransformFeedbackStream (will be remapped) */ + /* _mesa_function_pool[47414]: DrawTransformFeedbackStream (will be remapped) */ "iii\0" "glDrawTransformFeedbackStream\0" "\0" - /* _mesa_function_pool[47019]: GetIntegerv (offset 263) */ + /* _mesa_function_pool[47449]: GetIntegerv (offset 263) */ "ip\0" "glGetIntegerv\0" "\0" - /* _mesa_function_pool[47037]: EndPerfQueryINTEL (will be remapped) */ + /* _mesa_function_pool[47467]: EndPerfQueryINTEL (will be remapped) */ "i\0" "glEndPerfQueryINTEL\0" "\0" - /* _mesa_function_pool[47060]: FragmentLightfvSGIX (dynamic) */ + /* _mesa_function_pool[47490]: FragmentLightfvSGIX (dynamic) */ "iip\0" "glFragmentLightfvSGIX\0" "\0" - /* _mesa_function_pool[47087]: TexCoord2fColor3fVertex3fvSUN (dynamic) */ + /* _mesa_function_pool[47517]: TexCoord2fColor3fVertex3fvSUN (dynamic) */ "ppp\0" "glTexCoord2fColor3fVertex3fvSUN\0" "\0" - /* _mesa_function_pool[47124]: GetActiveUniform (will be remapped) */ + /* _mesa_function_pool[47554]: GetActiveUniform (will be remapped) */ "iiipppp\0" "glGetActiveUniform\0" "glGetActiveUniformARB\0" "\0" - /* _mesa_function_pool[47174]: AlphaFuncx (will be remapped) */ + /* _mesa_function_pool[47604]: AlphaFuncx (will be remapped) */ "ii\0" "glAlphaFuncxOES\0" "glAlphaFuncx\0" "\0" - /* _mesa_function_pool[47207]: VertexAttribI2ivEXT (will be remapped) */ + /* _mesa_function_pool[47637]: VertexAttribI2ivEXT (will be remapped) */ "ip\0" "glVertexAttribI2ivEXT\0" "glVertexAttribI2iv\0" "\0" - /* _mesa_function_pool[47252]: VertexBlendARB (dynamic) */ + /* _mesa_function_pool[47682]: VertexBlendARB (dynamic) */ "i\0" "glVertexBlendARB\0" "\0" - /* _mesa_function_pool[47272]: Map1d (offset 220) */ + /* _mesa_function_pool[47702]: Map1d (offset 220) */ "iddiip\0" "glMap1d\0" "\0" - /* _mesa_function_pool[47288]: Map1f (offset 221) */ + /* _mesa_function_pool[47718]: Map1f (offset 221) */ "iffiip\0" "glMap1f\0" "\0" - /* _mesa_function_pool[47304]: AreTexturesResident (offset 322) */ + /* _mesa_function_pool[47734]: AreTexturesResident (offset 322) */ "ipp\0" "glAreTexturesResident\0" "glAreTexturesResidentEXT\0" "\0" - /* _mesa_function_pool[47356]: VertexArrayVertexBuffer (will be remapped) */ + /* _mesa_function_pool[47786]: VertexArrayVertexBuffer (will be remapped) */ "iiiii\0" "glVertexArrayVertexBuffer\0" "\0" - /* _mesa_function_pool[47389]: PixelTransferf (offset 247) */ + /* _mesa_function_pool[47819]: PixelTransferf (offset 247) */ "if\0" "glPixelTransferf\0" "\0" - /* _mesa_function_pool[47410]: PixelTransferi (offset 248) */ + /* _mesa_function_pool[47840]: PixelTransferi (offset 248) */ "ii\0" "glPixelTransferi\0" "\0" - /* _mesa_function_pool[47431]: GetProgramResourceiv (will be remapped) */ + /* _mesa_function_pool[47861]: GetProgramResourceiv (will be remapped) */ "iiiipipp\0" "glGetProgramResourceiv\0" "\0" - /* _mesa_function_pool[47464]: VertexAttrib3fvNV (will be remapped) */ + /* _mesa_function_pool[47894]: VertexAttrib3fvNV (will be remapped) */ "ip\0" "glVertexAttrib3fvNV\0" "\0" - /* _mesa_function_pool[47488]: GetFinalCombinerInputParameterivNV (dynamic) */ + /* _mesa_function_pool[47918]: GetFinalCombinerInputParameterivNV (dynamic) */ "iip\0" "glGetFinalCombinerInputParameterivNV\0" "\0" - /* _mesa_function_pool[47530]: SecondaryColorP3ui (will be remapped) */ + /* _mesa_function_pool[47960]: SecondaryColorP3ui (will be remapped) */ "ii\0" "glSecondaryColorP3ui\0" "\0" - /* _mesa_function_pool[47555]: BindTextures (will be remapped) */ + /* _mesa_function_pool[47985]: BindTextures (will be remapped) */ "iip\0" "glBindTextures\0" "\0" - /* _mesa_function_pool[47575]: GetMapParameterivNV (dynamic) */ + /* _mesa_function_pool[48005]: GetMapParameterivNV (dynamic) */ "iip\0" "glGetMapParameterivNV\0" "\0" - /* _mesa_function_pool[47602]: VertexAttrib4fvNV (will be remapped) */ + /* _mesa_function_pool[48032]: VertexAttrib4fvNV (will be remapped) */ "ip\0" "glVertexAttrib4fvNV\0" "\0" - /* _mesa_function_pool[47626]: Rectiv (offset 91) */ + /* _mesa_function_pool[48056]: Rectiv (offset 91) */ "pp\0" "glRectiv\0" "\0" - /* _mesa_function_pool[47639]: MultiTexCoord1iv (offset 381) */ + /* _mesa_function_pool[48069]: MultiTexCoord1iv (offset 381) */ "ip\0" "glMultiTexCoord1iv\0" "glMultiTexCoord1ivARB\0" "\0" - /* _mesa_function_pool[47684]: PassTexCoordATI (will be remapped) */ + /* _mesa_function_pool[48114]: PassTexCoordATI (will be remapped) */ "iii\0" "glPassTexCoordATI\0" "\0" - /* _mesa_function_pool[47707]: Tangent3dEXT (dynamic) */ + /* _mesa_function_pool[48137]: Tangent3dEXT (dynamic) */ "ddd\0" "glTangent3dEXT\0" "\0" - /* _mesa_function_pool[47727]: Vertex2fv (offset 129) */ + /* _mesa_function_pool[48157]: Vertex2fv (offset 129) */ "p\0" "glVertex2fv\0" "\0" - /* _mesa_function_pool[47742]: BindRenderbufferEXT (will be remapped) */ + /* _mesa_function_pool[48172]: BindRenderbufferEXT (will be remapped) */ "ii\0" "glBindRenderbufferEXT\0" "\0" - /* _mesa_function_pool[47768]: Vertex3sv (offset 141) */ + /* _mesa_function_pool[48198]: Vertex3sv (offset 141) */ "p\0" "glVertex3sv\0" "\0" - /* _mesa_function_pool[47783]: EvalMesh1 (offset 236) */ + /* _mesa_function_pool[48213]: EvalMesh1 (offset 236) */ "iii\0" "glEvalMesh1\0" "\0" - /* _mesa_function_pool[47800]: DiscardFramebufferEXT (will be remapped) */ + /* _mesa_function_pool[48230]: DiscardFramebufferEXT (will be remapped) */ "iip\0" "glDiscardFramebufferEXT\0" "\0" - /* _mesa_function_pool[47829]: Uniform2f (will be remapped) */ + /* _mesa_function_pool[48259]: Uniform2f (will be remapped) */ "iff\0" "glUniform2f\0" "glUniform2fARB\0" "\0" - /* _mesa_function_pool[47861]: Uniform2d (will be remapped) */ + /* _mesa_function_pool[48291]: Uniform2d (will be remapped) */ "idd\0" "glUniform2d\0" "\0" - /* _mesa_function_pool[47878]: ColorPointerEXT (will be remapped) */ + /* _mesa_function_pool[48308]: ColorPointerEXT (will be remapped) */ "iiiip\0" "glColorPointerEXT\0" "\0" - /* _mesa_function_pool[47903]: LineWidth (offset 168) */ + /* _mesa_function_pool[48333]: LineWidth (offset 168) */ "f\0" "glLineWidth\0" "\0" - /* _mesa_function_pool[47918]: Uniform2i (will be remapped) */ + /* _mesa_function_pool[48348]: Uniform2i (will be remapped) */ "iii\0" "glUniform2i\0" "glUniform2iARB\0" "\0" - /* _mesa_function_pool[47950]: MultiDrawElementsBaseVertex (will be remapped) */ + /* _mesa_function_pool[48380]: MultiDrawElementsBaseVertex (will be remapped) */ "ipipip\0" "glMultiDrawElementsBaseVertex\0" "glMultiDrawElementsBaseVertexEXT\0" "glMultiDrawElementsBaseVertexOES\0" "\0" - /* _mesa_function_pool[48054]: Lightxv (will be remapped) */ + /* _mesa_function_pool[48484]: Lightxv (will be remapped) */ "iip\0" "glLightxvOES\0" "glLightxv\0" "\0" - /* _mesa_function_pool[48082]: DepthRangeIndexed (will be remapped) */ + /* _mesa_function_pool[48512]: DepthRangeIndexed (will be remapped) */ "idd\0" "glDepthRangeIndexed\0" "\0" - /* _mesa_function_pool[48107]: GetConvolutionParameterfv (offset 357) */ + /* _mesa_function_pool[48537]: GetConvolutionParameterfv (offset 357) */ "iip\0" "glGetConvolutionParameterfv\0" "glGetConvolutionParameterfvEXT\0" "\0" - /* _mesa_function_pool[48171]: GetTexBumpParameterfvATI (will be remapped) */ + /* _mesa_function_pool[48601]: GetTexBumpParameterfvATI (will be remapped) */ "ip\0" "glGetTexBumpParameterfvATI\0" "\0" - /* _mesa_function_pool[48202]: ProgramNamedParameter4dNV (will be remapped) */ + /* _mesa_function_pool[48632]: ProgramNamedParameter4dNV (will be remapped) */ "iipdddd\0" "glProgramNamedParameter4dNV\0" "\0" - /* _mesa_function_pool[48239]: GetMaterialfv (offset 269) */ + /* _mesa_function_pool[48669]: GetMaterialfv (offset 269) */ "iip\0" "glGetMaterialfv\0" "\0" - /* _mesa_function_pool[48260]: TexImage3DMultisample (will be remapped) */ + /* _mesa_function_pool[48690]: TexImage3DMultisample (will be remapped) */ "iiiiiii\0" "glTexImage3DMultisample\0" "\0" - /* _mesa_function_pool[48293]: VertexAttrib1fvNV (will be remapped) */ + /* _mesa_function_pool[48723]: VertexAttrib1fvNV (will be remapped) */ "ip\0" "glVertexAttrib1fvNV\0" "\0" - /* _mesa_function_pool[48317]: GetUniformBlockIndex (will be remapped) */ + /* _mesa_function_pool[48747]: GetUniformBlockIndex (will be remapped) */ "ip\0" "glGetUniformBlockIndex\0" "\0" - /* _mesa_function_pool[48344]: DetachShader (will be remapped) */ + /* _mesa_function_pool[48774]: DetachShader (will be remapped) */ "ii\0" "glDetachShader\0" "\0" - /* _mesa_function_pool[48363]: CopyTexSubImage2D (offset 326) */ + /* _mesa_function_pool[48793]: CopyTexSubImage2D (offset 326) */ "iiiiiiii\0" "glCopyTexSubImage2D\0" "glCopyTexSubImage2DEXT\0" "\0" - /* _mesa_function_pool[48416]: GetNamedFramebufferParameteriv (will be remapped) */ + /* _mesa_function_pool[48846]: GetNamedFramebufferParameteriv (will be remapped) */ "iip\0" "glGetNamedFramebufferParameteriv\0" "\0" - /* _mesa_function_pool[48454]: GetObjectParameterivARB (will be remapped) */ + /* _mesa_function_pool[48884]: GetObjectParameterivARB (will be remapped) */ "iip\0" "glGetObjectParameterivARB\0" "\0" - /* _mesa_function_pool[48485]: Color3iv (offset 16) */ + /* _mesa_function_pool[48915]: Color3iv (offset 16) */ "p\0" "glColor3iv\0" "\0" - /* _mesa_function_pool[48499]: DrawElements (offset 311) */ + /* _mesa_function_pool[48929]: DrawElements (offset 311) */ "iiip\0" "glDrawElements\0" "\0" - /* _mesa_function_pool[48520]: ScissorArrayv (will be remapped) */ + /* _mesa_function_pool[48950]: ScissorArrayv (will be remapped) */ "iip\0" "glScissorArrayv\0" + "glScissorArrayvOES\0" "\0" - /* _mesa_function_pool[48541]: GetInternalformativ (will be remapped) */ + /* _mesa_function_pool[48990]: GetInternalformativ (will be remapped) */ "iiiip\0" "glGetInternalformativ\0" "\0" - /* _mesa_function_pool[48570]: EvalPoint2 (offset 239) */ + /* _mesa_function_pool[49019]: EvalPoint2 (offset 239) */ "ii\0" "glEvalPoint2\0" "\0" - /* _mesa_function_pool[48587]: EvalPoint1 (offset 237) */ + /* _mesa_function_pool[49036]: EvalPoint1 (offset 237) */ "i\0" "glEvalPoint1\0" "\0" - /* _mesa_function_pool[48603]: VertexAttribLPointer (will be remapped) */ + /* _mesa_function_pool[49052]: VertexAttribLPointer (will be remapped) */ "iiiip\0" "glVertexAttribLPointer\0" "\0" - /* _mesa_function_pool[48633]: PopMatrix (offset 297) */ + /* _mesa_function_pool[49082]: PopMatrix (offset 297) */ "\0" "glPopMatrix\0" "\0" - /* _mesa_function_pool[48647]: FinishFenceNV (dynamic) */ + /* _mesa_function_pool[49096]: FinishFenceNV (dynamic) */ "i\0" "glFinishFenceNV\0" "\0" - /* _mesa_function_pool[48666]: Tangent3bvEXT (dynamic) */ + /* _mesa_function_pool[49115]: Tangent3bvEXT (dynamic) */ "p\0" "glTangent3bvEXT\0" "\0" - /* _mesa_function_pool[48685]: NamedBufferData (will be remapped) */ + /* _mesa_function_pool[49134]: NamedBufferData (will be remapped) */ "iipi\0" "glNamedBufferData\0" "\0" - /* _mesa_function_pool[48709]: GetTexGeniv (offset 280) */ + /* _mesa_function_pool[49158]: GetTexGeniv (offset 280) */ "iip\0" "glGetTexGeniv\0" "glGetTexGenivOES\0" "\0" - /* _mesa_function_pool[48745]: GetFirstPerfQueryIdINTEL (will be remapped) */ + /* _mesa_function_pool[49194]: GetFirstPerfQueryIdINTEL (will be remapped) */ "p\0" "glGetFirstPerfQueryIdINTEL\0" "\0" - /* _mesa_function_pool[48775]: ActiveProgramEXT (will be remapped) */ + /* _mesa_function_pool[49224]: ActiveProgramEXT (will be remapped) */ "i\0" "glActiveProgramEXT\0" "\0" - /* _mesa_function_pool[48797]: PixelTransformParameterivEXT (dynamic) */ + /* _mesa_function_pool[49246]: PixelTransformParameterivEXT (dynamic) */ "iip\0" "glPixelTransformParameterivEXT\0" "\0" - /* _mesa_function_pool[48833]: TexCoord4fVertex4fvSUN (dynamic) */ + /* _mesa_function_pool[49282]: TexCoord4fVertex4fvSUN (dynamic) */ "pp\0" "glTexCoord4fVertex4fvSUN\0" "\0" - /* _mesa_function_pool[48862]: UnmapBuffer (will be remapped) */ + /* _mesa_function_pool[49311]: UnmapBuffer (will be remapped) */ "i\0" "glUnmapBuffer\0" "glUnmapBufferARB\0" "glUnmapBufferOES\0" "\0" - /* _mesa_function_pool[48913]: EvalCoord1d (offset 228) */ + /* _mesa_function_pool[49362]: EvalCoord1d (offset 228) */ "d\0" "glEvalCoord1d\0" "\0" - /* _mesa_function_pool[48930]: VertexAttribL1d (will be remapped) */ + /* _mesa_function_pool[49379]: VertexAttribL1d (will be remapped) */ "id\0" "glVertexAttribL1d\0" "\0" - /* _mesa_function_pool[48952]: EvalCoord1f (offset 230) */ + /* _mesa_function_pool[49401]: EvalCoord1f (offset 230) */ "f\0" "glEvalCoord1f\0" "\0" - /* _mesa_function_pool[48969]: IndexMaterialEXT (dynamic) */ + /* _mesa_function_pool[49418]: IndexMaterialEXT (dynamic) */ "ii\0" "glIndexMaterialEXT\0" "\0" - /* _mesa_function_pool[48992]: Materialf (offset 169) */ + /* _mesa_function_pool[49441]: Materialf (offset 169) */ "iif\0" "glMaterialf\0" "\0" - /* _mesa_function_pool[49009]: VertexAttribs2dvNV (will be remapped) */ + /* _mesa_function_pool[49458]: VertexAttribs2dvNV (will be remapped) */ "iip\0" "glVertexAttribs2dvNV\0" "\0" - /* _mesa_function_pool[49035]: ProgramUniform1uiv (will be remapped) */ + /* _mesa_function_pool[49484]: ProgramUniform1uiv (will be remapped) */ "iiip\0" "glProgramUniform1uiv\0" "glProgramUniform1uivEXT\0" "\0" - /* _mesa_function_pool[49086]: EvalCoord1dv (offset 229) */ + /* _mesa_function_pool[49535]: EvalCoord1dv (offset 229) */ "p\0" "glEvalCoord1dv\0" "\0" - /* _mesa_function_pool[49104]: Materialx (will be remapped) */ + /* _mesa_function_pool[49553]: Materialx (will be remapped) */ "iii\0" "glMaterialxOES\0" "glMaterialx\0" "\0" - /* _mesa_function_pool[49136]: GetQueryBufferObjectiv (will be remapped) */ + /* _mesa_function_pool[49585]: GetQueryBufferObjectiv (will be remapped) */ "iiii\0" "glGetQueryBufferObjectiv\0" "\0" - /* _mesa_function_pool[49167]: GetLightiv (offset 265) */ + /* _mesa_function_pool[49616]: GetLightiv (offset 265) */ "iip\0" "glGetLightiv\0" "\0" - /* _mesa_function_pool[49185]: BindBuffer (will be remapped) */ + /* _mesa_function_pool[49634]: BindBuffer (will be remapped) */ "ii\0" "glBindBuffer\0" "glBindBufferARB\0" "\0" - /* _mesa_function_pool[49218]: ProgramUniform1i (will be remapped) */ + /* _mesa_function_pool[49667]: ProgramUniform1i (will be remapped) */ "iii\0" "glProgramUniform1i\0" "glProgramUniform1iEXT\0" "\0" - /* _mesa_function_pool[49264]: ProgramUniform1f (will be remapped) */ + /* _mesa_function_pool[49713]: ProgramUniform1f (will be remapped) */ "iif\0" "glProgramUniform1f\0" "glProgramUniform1fEXT\0" "\0" - /* _mesa_function_pool[49310]: ProgramUniform1d (will be remapped) */ + /* _mesa_function_pool[49759]: ProgramUniform1d (will be remapped) */ "iid\0" "glProgramUniform1d\0" "\0" - /* _mesa_function_pool[49334]: WindowPos3iv (will be remapped) */ + /* _mesa_function_pool[49783]: WindowPos3iv (will be remapped) */ "p\0" "glWindowPos3iv\0" "glWindowPos3ivARB\0" "glWindowPos3ivMESA\0" "\0" - /* _mesa_function_pool[49389]: CopyConvolutionFilter2D (offset 355) */ + /* _mesa_function_pool[49838]: CopyConvolutionFilter2D (offset 355) */ "iiiiii\0" "glCopyConvolutionFilter2D\0" "glCopyConvolutionFilter2DEXT\0" "\0" - /* _mesa_function_pool[49452]: CopyBufferSubData (will be remapped) */ + /* _mesa_function_pool[49901]: CopyBufferSubData (will be remapped) */ "iiiii\0" "glCopyBufferSubData\0" "\0" - /* _mesa_function_pool[49479]: WeightfvARB (dynamic) */ + /* _mesa_function_pool[49928]: WeightfvARB (dynamic) */ "ip\0" "glWeightfvARB\0" "\0" - /* _mesa_function_pool[49497]: UniformMatrix3x4fv (will be remapped) */ + /* _mesa_function_pool[49946]: UniformMatrix3x4fv (will be remapped) */ "iiip\0" "glUniformMatrix3x4fv\0" "\0" - /* _mesa_function_pool[49524]: Recti (offset 90) */ + /* _mesa_function_pool[49973]: Recti (offset 90) */ "iiii\0" "glRecti\0" "\0" - /* _mesa_function_pool[49538]: VertexAttribI3ivEXT (will be remapped) */ + /* _mesa_function_pool[49987]: VertexAttribI3ivEXT (will be remapped) */ "ip\0" "glVertexAttribI3ivEXT\0" "glVertexAttribI3iv\0" "\0" - /* _mesa_function_pool[49583]: DeleteSamplers (will be remapped) */ + /* _mesa_function_pool[50032]: DeleteSamplers (will be remapped) */ "ip\0" "glDeleteSamplers\0" "\0" - /* _mesa_function_pool[49604]: SamplerParameteri (will be remapped) */ + /* _mesa_function_pool[50053]: SamplerParameteri (will be remapped) */ "iii\0" "glSamplerParameteri\0" "\0" - /* _mesa_function_pool[49629]: Rectf (offset 88) */ + /* _mesa_function_pool[50078]: WindowRectanglesEXT (will be remapped) */ + "iip\0" + "glWindowRectanglesEXT\0" + "\0" + /* _mesa_function_pool[50105]: Rectf (offset 88) */ "ffff\0" "glRectf\0" "\0" - /* _mesa_function_pool[49643]: Rectd (offset 86) */ + /* _mesa_function_pool[50119]: Rectd (offset 86) */ "dddd\0" "glRectd\0" "\0" - /* _mesa_function_pool[49657]: MultMatrixx (will be remapped) */ + /* _mesa_function_pool[50133]: MultMatrixx (will be remapped) */ "p\0" "glMultMatrixxOES\0" "glMultMatrixx\0" "\0" - /* _mesa_function_pool[49691]: Rects (offset 92) */ + /* _mesa_function_pool[50167]: Rects (offset 92) */ "iiii\0" "glRects\0" "\0" - /* _mesa_function_pool[49705]: CombinerParameterfNV (dynamic) */ + /* _mesa_function_pool[50181]: CombinerParameterfNV (dynamic) */ "if\0" "glCombinerParameterfNV\0" "\0" - /* _mesa_function_pool[49732]: GetVertexAttribIiv (will be remapped) */ + /* _mesa_function_pool[50208]: GetVertexAttribIiv (will be remapped) */ "iip\0" "glGetVertexAttribIivEXT\0" "glGetVertexAttribIiv\0" "\0" - /* _mesa_function_pool[49782]: ClientWaitSync (will be remapped) */ + /* _mesa_function_pool[50258]: ClientWaitSync (will be remapped) */ "iii\0" "glClientWaitSync\0" "\0" - /* _mesa_function_pool[49804]: TexCoord4s (offset 124) */ + /* _mesa_function_pool[50280]: TexCoord4s (offset 124) */ "iiii\0" "glTexCoord4s\0" "\0" - /* _mesa_function_pool[49823]: TexEnvxv (will be remapped) */ + /* _mesa_function_pool[50299]: TexEnvxv (will be remapped) */ "iip\0" "glTexEnvxvOES\0" "glTexEnvxv\0" "\0" - /* _mesa_function_pool[49853]: TexCoord4i (offset 122) */ + /* _mesa_function_pool[50329]: TexCoord4i (offset 122) */ "iiii\0" "glTexCoord4i\0" "\0" - /* _mesa_function_pool[49872]: ObjectPurgeableAPPLE (will be remapped) */ + /* _mesa_function_pool[50348]: ObjectPurgeableAPPLE (will be remapped) */ "iii\0" "glObjectPurgeableAPPLE\0" "\0" - /* _mesa_function_pool[49900]: TexCoord4d (offset 118) */ + /* _mesa_function_pool[50376]: TexCoord4d (offset 118) */ "dddd\0" "glTexCoord4d\0" "\0" - /* _mesa_function_pool[49919]: TexCoord4f (offset 120) */ + /* _mesa_function_pool[50395]: TexCoord4f (offset 120) */ "ffff\0" "glTexCoord4f\0" "\0" - /* _mesa_function_pool[49938]: GetBooleanv (offset 258) */ + /* _mesa_function_pool[50414]: GetBooleanv (offset 258) */ "ip\0" "glGetBooleanv\0" "\0" - /* _mesa_function_pool[49956]: IsAsyncMarkerSGIX (dynamic) */ + /* _mesa_function_pool[50432]: IsAsyncMarkerSGIX (dynamic) */ "i\0" "glIsAsyncMarkerSGIX\0" "\0" - /* _mesa_function_pool[49979]: ProgramUniformMatrix3dv (will be remapped) */ + /* _mesa_function_pool[50455]: ProgramUniformMatrix3dv (will be remapped) */ "iiiip\0" "glProgramUniformMatrix3dv\0" "\0" - /* _mesa_function_pool[50012]: LockArraysEXT (will be remapped) */ + /* _mesa_function_pool[50488]: LockArraysEXT (will be remapped) */ "ii\0" "glLockArraysEXT\0" "\0" - /* _mesa_function_pool[50032]: GetActiveUniformBlockiv (will be remapped) */ + /* _mesa_function_pool[50508]: GetActiveUniformBlockiv (will be remapped) */ "iiip\0" "glGetActiveUniformBlockiv\0" "\0" - /* _mesa_function_pool[50064]: GetPerfMonitorCountersAMD (will be remapped) */ + /* _mesa_function_pool[50540]: GetPerfMonitorCountersAMD (will be remapped) */ "ippip\0" "glGetPerfMonitorCountersAMD\0" "\0" - /* _mesa_function_pool[50099]: ObjectPtrLabel (will be remapped) */ + /* _mesa_function_pool[50575]: ObjectPtrLabel (will be remapped) */ "pip\0" "glObjectPtrLabel\0" "glObjectPtrLabelKHR\0" "\0" - /* _mesa_function_pool[50141]: Rectfv (offset 89) */ + /* _mesa_function_pool[50617]: Rectfv (offset 89) */ "pp\0" "glRectfv\0" "\0" - /* _mesa_function_pool[50154]: BindImageTexture (will be remapped) */ + /* _mesa_function_pool[50630]: BindImageTexture (will be remapped) */ "iiiiiii\0" "glBindImageTexture\0" "\0" - /* _mesa_function_pool[50182]: VertexP4uiv (will be remapped) */ + /* _mesa_function_pool[50658]: VertexP4uiv (will be remapped) */ "ip\0" "glVertexP4uiv\0" "\0" - /* _mesa_function_pool[50200]: GetUniformSubroutineuiv (will be remapped) */ + /* _mesa_function_pool[50676]: GetUniformSubroutineuiv (will be remapped) */ "iip\0" "glGetUniformSubroutineuiv\0" "\0" - /* _mesa_function_pool[50231]: MinSampleShading (will be remapped) */ + /* _mesa_function_pool[50707]: MinSampleShading (will be remapped) */ "f\0" "glMinSampleShadingARB\0" "glMinSampleShading\0" "glMinSampleShadingOES\0" "\0" - /* _mesa_function_pool[50297]: GetRenderbufferParameteriv (will be remapped) */ + /* _mesa_function_pool[50773]: GetRenderbufferParameteriv (will be remapped) */ "iip\0" "glGetRenderbufferParameteriv\0" "glGetRenderbufferParameterivEXT\0" "glGetRenderbufferParameterivOES\0" "\0" - /* _mesa_function_pool[50395]: EdgeFlagPointerListIBM (dynamic) */ + /* _mesa_function_pool[50871]: EdgeFlagPointerListIBM (dynamic) */ "ipi\0" "glEdgeFlagPointerListIBM\0" "\0" - /* _mesa_function_pool[50425]: VertexAttrib1dNV (will be remapped) */ + /* _mesa_function_pool[50901]: VertexAttrib1dNV (will be remapped) */ "id\0" "glVertexAttrib1dNV\0" "\0" - /* _mesa_function_pool[50448]: WindowPos2sv (will be remapped) */ + /* _mesa_function_pool[50924]: WindowPos2sv (will be remapped) */ "p\0" "glWindowPos2sv\0" "glWindowPos2svARB\0" "glWindowPos2svMESA\0" "\0" - /* _mesa_function_pool[50503]: VertexArrayRangeNV (dynamic) */ + /* _mesa_function_pool[50979]: VertexArrayRangeNV (dynamic) */ "ip\0" "glVertexArrayRangeNV\0" "\0" - /* _mesa_function_pool[50528]: GetPerfMonitorCounterStringAMD (will be remapped) */ + /* _mesa_function_pool[51004]: GetPerfMonitorCounterStringAMD (will be remapped) */ "iiipp\0" "glGetPerfMonitorCounterStringAMD\0" "\0" - /* _mesa_function_pool[50568]: EndFragmentShaderATI (will be remapped) */ + /* _mesa_function_pool[51044]: EndFragmentShaderATI (will be remapped) */ "\0" "glEndFragmentShaderATI\0" "\0" - /* _mesa_function_pool[50593]: Uniform4iv (will be remapped) */ + /* _mesa_function_pool[51069]: Uniform4iv (will be remapped) */ "iip\0" "glUniform4iv\0" "glUniform4ivARB\0" @@ -6848,1014 +6886,928 @@ /* these functions need to be remapped */ static const struct gl_function_pool_remap MESA_remap_table_functions[] = { - { 21165, CompressedTexImage1D_remap_index }, - { 18320, CompressedTexImage2D_remap_index }, - { 13435, CompressedTexImage3D_remap_index }, - { 32990, CompressedTexSubImage1D_remap_index }, - { 39870, CompressedTexSubImage2D_remap_index }, - { 7030, CompressedTexSubImage3D_remap_index }, - { 4707, GetCompressedTexImage_remap_index }, - { 20377, LoadTransposeMatrixd_remap_index }, - { 20325, LoadTransposeMatrixf_remap_index }, - { 36990, MultTransposeMatrixd_remap_index }, - { 14839, MultTransposeMatrixf_remap_index }, - { 35692, SampleCoverage_remap_index }, - { 3854, BlendFuncSeparate_remap_index }, - { 24218, FogCoordPointer_remap_index }, - { 43962, FogCoordd_remap_index }, - { 43738, FogCoorddv_remap_index }, - { 35919, MultiDrawArrays_remap_index }, - { 33913, PointParameterf_remap_index }, - { 5543, PointParameterfv_remap_index }, - { 33871, PointParameteri_remap_index }, - { 9724, PointParameteriv_remap_index }, - { 5965, SecondaryColor3b_remap_index }, - { 43553, SecondaryColor3bv_remap_index }, - { 37191, SecondaryColor3d_remap_index }, - { 13568, SecondaryColor3dv_remap_index }, - { 6095, SecondaryColor3i_remap_index }, - { 41019, SecondaryColor3iv_remap_index }, - { 5841, SecondaryColor3s_remap_index }, - { 17491, SecondaryColor3sv_remap_index }, - { 24371, SecondaryColor3ub_remap_index }, - { 8158, SecondaryColor3ubv_remap_index }, - { 24449, SecondaryColor3ui_remap_index }, - { 26517, SecondaryColor3uiv_remap_index }, - { 24262, SecondaryColor3us_remap_index }, - { 10919, SecondaryColor3usv_remap_index }, - { 38407, SecondaryColorPointer_remap_index }, - { 13167, WindowPos2d_remap_index }, - { 19254, WindowPos2dv_remap_index }, - { 13114, WindowPos2f_remap_index }, - { 25814, WindowPos2fv_remap_index }, - { 13246, WindowPos2i_remap_index }, - { 7318, WindowPos2iv_remap_index }, - { 13299, WindowPos2s_remap_index }, - { 50448, WindowPos2sv_remap_index }, - { 17803, WindowPos3d_remap_index }, - { 17188, WindowPos3dv_remap_index }, - { 17916, WindowPos3f_remap_index }, - { 9583, WindowPos3fv_remap_index }, - { 18025, WindowPos3i_remap_index }, - { 49334, WindowPos3iv_remap_index }, - { 18141, WindowPos3s_remap_index }, - { 27354, WindowPos3sv_remap_index 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BindFramebufferEXT_remap_index }, - { 47742, BindRenderbufferEXT_remap_index }, - { 5215, StringMarkerGREMEDY_remap_index }, - { 36001, BufferParameteriAPPLE_remap_index }, - { 45573, FlushMappedBufferRangeAPPLE_remap_index }, - { 32064, VertexAttribI1iEXT_remap_index }, - { 13352, VertexAttribI1uiEXT_remap_index }, - { 23634, VertexAttribI2iEXT_remap_index }, - { 47207, VertexAttribI2ivEXT_remap_index }, - { 29741, VertexAttribI2uiEXT_remap_index }, - { 40810, VertexAttribI2uivEXT_remap_index }, - { 22704, VertexAttribI3iEXT_remap_index }, - { 49538, VertexAttribI3ivEXT_remap_index }, - { 26348, VertexAttribI3uiEXT_remap_index }, - { 24497, VertexAttribI3uivEXT_remap_index }, - { 43916, VertexAttribI4iEXT_remap_index }, - { 8113, VertexAttribI4ivEXT_remap_index }, - { 2990, VertexAttribI4uiEXT_remap_index }, - { 31942, VertexAttribI4uivEXT_remap_index }, - { 3575, ClearColorIiEXT_remap_index }, + { 22618, SampleMaskSGIS_remap_index }, + { 38211, SamplePatternSGIS_remap_index }, + { 48308, ColorPointerEXT_remap_index }, + { 31988, EdgeFlagPointerEXT_remap_index }, + { 15098, IndexPointerEXT_remap_index }, + { 15288, NormalPointerEXT_remap_index }, + { 31366, TexCoordPointerEXT_remap_index }, + { 28075, VertexPointerEXT_remap_index }, + { 48230, DiscardFramebufferEXT_remap_index }, + { 12684, ActiveShaderProgram_remap_index }, + { 19224, BindProgramPipeline_remap_index }, + { 32040, CreateShaderProgramv_remap_index }, + { 4224, DeleteProgramPipelines_remap_index }, + { 29383, GenProgramPipelines_remap_index }, + { 9560, GetProgramPipelineInfoLog_remap_index }, + { 35007, GetProgramPipelineiv_remap_index }, + { 29446, IsProgramPipeline_remap_index }, + { 50488, LockArraysEXT_remap_index }, + { 49759, ProgramUniform1d_remap_index }, + { 34460, ProgramUniform1dv_remap_index }, + { 49713, ProgramUniform1f_remap_index }, + { 11253, ProgramUniform1fv_remap_index }, + { 49667, ProgramUniform1i_remap_index }, + { 17522, ProgramUniform1iv_remap_index }, + { 38661, ProgramUniform1ui_remap_index }, + { 49484, ProgramUniform1uiv_remap_index }, + { 2705, ProgramUniform2d_remap_index }, + { 11182, ProgramUniform2dv_remap_index }, + { 2658, ProgramUniform2f_remap_index }, + { 40773, ProgramUniform2fv_remap_index }, + { 2730, ProgramUniform2i_remap_index }, + { 24355, ProgramUniform2iv_remap_index }, + { 8509, ProgramUniform2ui_remap_index }, + { 10600, ProgramUniform2uiv_remap_index }, + { 5474, ProgramUniform3d_remap_index }, + { 5381, ProgramUniform3dv_remap_index }, + { 5500, ProgramUniform3f_remap_index }, + { 33829, ProgramUniform3fv_remap_index }, + { 5548, ProgramUniform3i_remap_index }, + { 15339, ProgramUniform3iv_remap_index }, + { 17571, ProgramUniform3ui_remap_index }, + { 20757, ProgramUniform3uiv_remap_index }, + { 32504, ProgramUniform4d_remap_index }, + { 34722, ProgramUniform4dv_remap_index }, + { 32531, ProgramUniform4f_remap_index }, + { 47079, ProgramUniform4fv_remap_index }, + { 32580, ProgramUniform4i_remap_index }, + { 2186, ProgramUniform4iv_remap_index }, + { 45655, ProgramUniform4ui_remap_index }, + { 37344, ProgramUniform4uiv_remap_index }, + { 15388, ProgramUniformMatrix2dv_remap_index }, + { 22696, ProgramUniformMatrix2fv_remap_index }, + { 18530, ProgramUniformMatrix2x3dv_remap_index }, + { 25300, ProgramUniformMatrix2x3fv_remap_index }, + { 2118, ProgramUniformMatrix2x4dv_remap_index }, + { 9210, ProgramUniformMatrix2x4fv_remap_index }, + { 50455, ProgramUniformMatrix3dv_remap_index }, + { 43653, ProgramUniformMatrix3fv_remap_index }, + { 30307, ProgramUniformMatrix3x2dv_remap_index }, + { 38419, ProgramUniformMatrix3x2fv_remap_index }, + { 25771, ProgramUniformMatrix3x4dv_remap_index }, + { 30966, ProgramUniformMatrix3x4fv_remap_index }, + { 43906, ProgramUniformMatrix4dv_remap_index }, + { 36422, ProgramUniformMatrix4fv_remap_index }, + { 45130, ProgramUniformMatrix4x2dv_remap_index }, + { 2592, ProgramUniformMatrix4x2fv_remap_index }, + { 16063, ProgramUniformMatrix4x3dv_remap_index }, + { 8752, ProgramUniformMatrix4x3fv_remap_index }, + { 44515, UnlockArraysEXT_remap_index }, + { 36376, UseProgramStages_remap_index }, + { 1898, ValidateProgramPipeline_remap_index }, + { 19300, DebugMessageCallback_remap_index }, + { 36887, DebugMessageControl_remap_index }, + { 18344, DebugMessageInsert_remap_index }, + { 8294, GetDebugMessageLog_remap_index }, + { 8051, GetObjectLabel_remap_index }, + { 14390, GetObjectPtrLabel_remap_index }, + { 7237, ObjectLabel_remap_index }, + { 50575, ObjectPtrLabel_remap_index }, + { 21255, PopDebugGroup_remap_index }, + { 16975, PushDebugGroup_remap_index }, + { 9957, SecondaryColor3fEXT_remap_index }, + { 9406, SecondaryColor3fvEXT_remap_index }, + { 33476, MultiDrawElementsEXT_remap_index }, + { 12816, FogCoordfEXT_remap_index }, + { 21620, FogCoordfvEXT_remap_index }, + { 5001, ResizeBuffersMESA_remap_index }, + { 39762, WindowPos4dMESA_remap_index }, + { 31889, WindowPos4dvMESA_remap_index }, + { 5159, WindowPos4fMESA_remap_index }, + { 13543, WindowPos4fvMESA_remap_index }, + { 10889, WindowPos4iMESA_remap_index }, + { 4431, WindowPos4ivMESA_remap_index }, + { 32763, WindowPos4sMESA_remap_index }, + { 7215, WindowPos4svMESA_remap_index }, + { 33576, MultiModeDrawArraysIBM_remap_index }, + { 23412, MultiModeDrawElementsIBM_remap_index }, + { 38330, AreProgramsResidentNV_remap_index }, + { 46494, ExecuteProgramNV_remap_index }, + { 34428, GetProgramParameterdvNV_remap_index }, + { 42704, GetProgramParameterfvNV_remap_index }, + { 22793, GetProgramStringNV_remap_index }, + { 18781, GetProgramivNV_remap_index }, + { 21905, GetTrackMatrixivNV_remap_index }, + { 22367, GetVertexAttribdvNV_remap_index }, + { 20384, GetVertexAttribfvNV_remap_index }, + { 19117, GetVertexAttribivNV_remap_index }, + { 42349, LoadProgramNV_remap_index }, + { 23512, ProgramParameters4dvNV_remap_index }, + { 24174, ProgramParameters4fvNV_remap_index }, + { 7588, RequestResidentProgramsNV_remap_index }, + { 33984, TrackMatrixNV_remap_index }, + { 50901, VertexAttrib1dNV_remap_index }, + { 32831, VertexAttrib1dvNV_remap_index }, + { 33247, VertexAttrib1fNV_remap_index }, + { 48723, VertexAttrib1fvNV_remap_index }, + { 24804, VertexAttrib1sNV_remap_index }, + { 44535, VertexAttrib1svNV_remap_index }, + { 21881, VertexAttrib2dNV_remap_index }, + { 40073, VertexAttrib2dvNV_remap_index }, + { 31773, VertexAttrib2fNV_remap_index }, + { 30342, VertexAttrib2fvNV_remap_index }, + { 15194, VertexAttrib2sNV_remap_index }, + { 6890, VertexAttrib2svNV_remap_index }, + { 43113, VertexAttrib3dNV_remap_index }, + { 45239, VertexAttrib3dvNV_remap_index }, + { 5993, VertexAttrib3fNV_remap_index }, + { 47894, VertexAttrib3fvNV_remap_index }, + { 8696, VertexAttrib3sNV_remap_index }, + { 21932, VertexAttrib3svNV_remap_index }, + { 10238, VertexAttrib4dNV_remap_index }, + { 4149, VertexAttrib4dvNV_remap_index }, + { 10309, VertexAttrib4fNV_remap_index }, + { 48032, VertexAttrib4fvNV_remap_index }, + { 20863, VertexAttrib4sNV_remap_index }, + { 13028, VertexAttrib4svNV_remap_index }, + { 1871, VertexAttrib4ubNV_remap_index }, + { 12791, VertexAttrib4ubvNV_remap_index }, + { 33727, VertexAttribPointerNV_remap_index }, + { 31936, VertexAttribs1dvNV_remap_index }, + { 46997, VertexAttribs1fvNV_remap_index }, + { 7528, VertexAttribs1svNV_remap_index }, + { 49458, VertexAttribs2dvNV_remap_index }, + { 9138, VertexAttribs2fvNV_remap_index }, + { 32014, VertexAttribs2svNV_remap_index }, + { 2092, VertexAttribs3dvNV_remap_index }, + { 41523, VertexAttribs3fvNV_remap_index }, + { 16722, VertexAttribs3svNV_remap_index }, + { 28983, VertexAttribs4dvNV_remap_index }, + { 28516, VertexAttribs4fvNV_remap_index }, + { 12138, VertexAttribs4svNV_remap_index }, + { 37568, VertexAttribs4ubvNV_remap_index }, + { 48601, GetTexBumpParameterfvATI_remap_index }, + { 12444, GetTexBumpParameterivATI_remap_index }, + { 41623, TexBumpParameterfvATI_remap_index }, + { 10281, TexBumpParameterivATI_remap_index }, + { 11110, AlphaFragmentOp1ATI_remap_index }, + { 4173, AlphaFragmentOp2ATI_remap_index }, + { 11592, AlphaFragmentOp3ATI_remap_index }, + { 38849, BeginFragmentShaderATI_remap_index }, + { 4478, BindFragmentShaderATI_remap_index }, + { 8721, ColorFragmentOp1ATI_remap_index }, + { 15160, ColorFragmentOp2ATI_remap_index }, + { 27996, ColorFragmentOp3ATI_remap_index }, + { 20109, DeleteFragmentShaderATI_remap_index }, + { 51044, EndFragmentShaderATI_remap_index }, + { 26877, GenFragmentShadersATI_remap_index }, + { 48114, PassTexCoordATI_remap_index }, + { 41603, SampleMapATI_remap_index }, + { 40721, SetFragmentShaderConstantATI_remap_index }, + { 27482, DepthRangeArrayfvOES_remap_index }, + { 1430, DepthRangeIndexedfOES_remap_index }, + { 10212, ActiveStencilFaceEXT_remap_index }, + { 9726, BindVertexArrayAPPLE_remap_index }, + { 19614, GenVertexArraysAPPLE_remap_index }, + { 41126, GetProgramNamedParameterdvNV_remap_index }, + { 26627, GetProgramNamedParameterfvNV_remap_index }, + { 48632, ProgramNamedParameter4dNV_remap_index }, + { 44301, ProgramNamedParameter4dvNV_remap_index }, + { 28696, ProgramNamedParameter4fNV_remap_index }, + { 29869, ProgramNamedParameter4fvNV_remap_index }, + { 28423, PrimitiveRestartNV_remap_index }, + { 28961, GetTexGenxvOES_remap_index }, + { 17373, TexGenxOES_remap_index }, + { 37773, TexGenxvOES_remap_index }, + { 9650, DepthBoundsEXT_remap_index }, + { 44422, BindFramebufferEXT_remap_index }, + { 48172, BindRenderbufferEXT_remap_index }, + { 5268, StringMarkerGREMEDY_remap_index }, + { 36281, BufferParameteriAPPLE_remap_index }, + { 46003, FlushMappedBufferRangeAPPLE_remap_index }, + { 32323, VertexAttribI1iEXT_remap_index }, + { 13482, VertexAttribI1uiEXT_remap_index }, + { 23845, VertexAttribI2iEXT_remap_index }, + { 47637, VertexAttribI2ivEXT_remap_index }, + { 30000, VertexAttribI2uiEXT_remap_index }, + { 41223, VertexAttribI2uivEXT_remap_index }, + { 22892, VertexAttribI3iEXT_remap_index }, + { 49987, VertexAttribI3ivEXT_remap_index }, + { 26559, VertexAttribI3uiEXT_remap_index }, + { 24708, VertexAttribI3uivEXT_remap_index }, + { 44346, VertexAttribI4iEXT_remap_index }, + { 8201, VertexAttribI4ivEXT_remap_index }, + { 3043, VertexAttribI4uiEXT_remap_index }, + { 32201, VertexAttribI4uivEXT_remap_index }, + { 3628, ClearColorIiEXT_remap_index }, { 1273, ClearColorIuiEXT_remap_index }, - { 28207, BindBufferOffsetEXT_remap_index }, - { 21484, BeginPerfMonitorAMD_remap_index }, - { 37986, DeletePerfMonitorsAMD_remap_index }, - { 6501, EndPerfMonitorAMD_remap_index }, - { 31246, GenPerfMonitorsAMD_remap_index }, - { 14801, GetPerfMonitorCounterDataAMD_remap_index }, - { 40140, GetPerfMonitorCounterInfoAMD_remap_index }, - { 50528, GetPerfMonitorCounterStringAMD_remap_index }, - { 50064, GetPerfMonitorCountersAMD_remap_index }, - { 16936, GetPerfMonitorGroupStringAMD_remap_index }, - { 34366, GetPerfMonitorGroupsAMD_remap_index }, - { 16350, SelectPerfMonitorCountersAMD_remap_index }, - { 17056, GetObjectParameterivAPPLE_remap_index }, - { 49872, ObjectPurgeableAPPLE_remap_index }, - { 2182, ObjectUnpurgeableAPPLE_remap_index }, - { 48775, ActiveProgramEXT_remap_index }, - { 39499, CreateShaderProgramEXT_remap_index }, - { 42791, UseShaderProgramEXT_remap_index }, - { 35225, TextureBarrierNV_remap_index }, - { 2496, VDPAUFiniNV_remap_index }, + { 28446, BindBufferOffsetEXT_remap_index }, + { 21652, BeginPerfMonitorAMD_remap_index }, + { 38288, DeletePerfMonitorsAMD_remap_index }, + { 6554, EndPerfMonitorAMD_remap_index }, + { 31505, GenPerfMonitorsAMD_remap_index }, + { 14931, GetPerfMonitorCounterDataAMD_remap_index }, + { 40553, GetPerfMonitorCounterInfoAMD_remap_index }, + { 51004, GetPerfMonitorCounterStringAMD_remap_index }, + { 50540, GetPerfMonitorCountersAMD_remap_index }, + { 17066, GetPerfMonitorGroupStringAMD_remap_index }, + { 34646, GetPerfMonitorGroupsAMD_remap_index }, + { 16480, SelectPerfMonitorCountersAMD_remap_index }, + { 17186, GetObjectParameterivAPPLE_remap_index }, + { 50348, ObjectPurgeableAPPLE_remap_index }, + { 2235, ObjectUnpurgeableAPPLE_remap_index }, + { 49224, ActiveProgramEXT_remap_index }, + { 39801, CreateShaderProgramEXT_remap_index }, + { 43221, UseShaderProgramEXT_remap_index }, + { 35505, TextureBarrierNV_remap_index }, + { 2549, VDPAUFiniNV_remap_index }, { 900, VDPAUGetSurfaceivNV_remap_index }, - { 27630, VDPAUInitNV_remap_index }, - { 25067, VDPAUIsSurfaceNV_remap_index }, - { 25261, VDPAUMapSurfacesNV_remap_index }, - { 3616, VDPAURegisterOutputSurfaceNV_remap_index }, - { 14699, VDPAURegisterVideoSurfaceNV_remap_index }, - { 13065, VDPAUSurfaceAccessNV_remap_index }, - { 5734, VDPAUUnmapSurfacesNV_remap_index }, - { 43770, VDPAUUnregisterSurfaceNV_remap_index }, - { 10730, BeginPerfQueryINTEL_remap_index }, - { 38900, CreatePerfQueryINTEL_remap_index }, - { 19377, DeletePerfQueryINTEL_remap_index }, - { 47037, EndPerfQueryINTEL_remap_index }, - { 48745, GetFirstPerfQueryIdINTEL_remap_index }, - { 35178, GetNextPerfQueryIdINTEL_remap_index }, - { 37093, GetPerfCounterInfoINTEL_remap_index }, + { 27869, VDPAUInitNV_remap_index }, + { 25278, VDPAUIsSurfaceNV_remap_index }, + { 25472, VDPAUMapSurfacesNV_remap_index }, + { 3669, VDPAURegisterOutputSurfaceNV_remap_index }, + { 14829, VDPAURegisterVideoSurfaceNV_remap_index }, + { 13195, VDPAUSurfaceAccessNV_remap_index }, + { 5787, VDPAUUnmapSurfacesNV_remap_index }, + { 44200, VDPAUUnregisterSurfaceNV_remap_index }, + { 10818, BeginPerfQueryINTEL_remap_index }, + { 39202, CreatePerfQueryINTEL_remap_index }, + { 19545, DeletePerfQueryINTEL_remap_index }, + { 47467, EndPerfQueryINTEL_remap_index }, + { 49194, GetFirstPerfQueryIdINTEL_remap_index }, + { 35458, GetNextPerfQueryIdINTEL_remap_index }, + { 37395, GetPerfCounterInfoINTEL_remap_index }, { 811, GetPerfQueryDataINTEL_remap_index }, - { 25946, GetPerfQueryIdByNameINTEL_remap_index }, - { 23395, GetPerfQueryInfoINTEL_remap_index }, - { 44249, PolygonOffsetClampEXT_remap_index }, - { 23846, StencilFuncSeparateATI_remap_index }, - { 6767, ProgramEnvParameters4fvEXT_remap_index }, - { 7793, ProgramLocalParameters4fvEXT_remap_index }, - { 4614, EGLImageTargetRenderbufferStorageOES_remap_index }, - { 4330, EGLImageTargetTexture2DOES_remap_index }, - { 47174, AlphaFuncx_remap_index }, - { 22749, ClearColorx_remap_index }, - { 46334, ClearDepthx_remap_index }, - { 41636, Color4x_remap_index }, - { 27568, DepthRangex_remap_index }, - { 2724, Fogx_remap_index }, - { 17587, Fogxv_remap_index }, - { 10445, Frustumf_remap_index }, - { 10576, Frustumx_remap_index }, - { 22669, LightModelx_remap_index }, - { 37311, LightModelxv_remap_index }, - { 33523, Lightx_remap_index }, - { 48054, Lightxv_remap_index }, - { 4228, LineWidthx_remap_index }, - { 3966, LoadMatrixx_remap_index }, - { 49104, Materialx_remap_index }, - { 29560, Materialxv_remap_index }, - { 49657, MultMatrixx_remap_index }, - { 11967, MultiTexCoord4x_remap_index }, - { 29361, Normal3x_remap_index }, - { 18291, Orthof_remap_index }, - { 18531, Orthox_remap_index }, - { 31989, PointSizex_remap_index }, + { 26157, GetPerfQueryIdByNameINTEL_remap_index }, + { 23606, GetPerfQueryInfoINTEL_remap_index }, + { 44679, PolygonOffsetClampEXT_remap_index }, + { 50078, WindowRectanglesEXT_remap_index }, + { 24057, StencilFuncSeparateATI_remap_index }, + { 6820, ProgramEnvParameters4fvEXT_remap_index }, + { 7881, ProgramLocalParameters4fvEXT_remap_index }, + { 4667, EGLImageTargetRenderbufferStorageOES_remap_index }, + { 4383, EGLImageTargetTexture2DOES_remap_index }, + { 47604, AlphaFuncx_remap_index }, + { 22937, ClearColorx_remap_index }, + { 46764, ClearDepthx_remap_index }, + { 42066, Color4x_remap_index }, + { 27807, DepthRangex_remap_index }, + { 2777, Fogx_remap_index }, + { 17717, Fogxv_remap_index }, + { 10533, Frustumf_remap_index }, + { 10664, Frustumx_remap_index }, + { 22857, LightModelx_remap_index }, + { 37613, LightModelxv_remap_index }, + { 33803, Lightx_remap_index }, + { 48484, Lightxv_remap_index }, + { 4281, LineWidthx_remap_index }, + { 4019, LoadMatrixx_remap_index }, + { 49553, Materialx_remap_index }, + { 29819, Materialxv_remap_index }, + { 50133, MultMatrixx_remap_index }, + { 12055, MultiTexCoord4x_remap_index }, + { 29620, Normal3x_remap_index }, + { 18421, Orthof_remap_index }, + { 18661, Orthox_remap_index }, + { 32248, PointSizex_remap_index }, { 70, PolygonOffsetx_remap_index }, - { 43116, Rotatex_remap_index }, - { 23352, SampleCoveragex_remap_index }, - { 14914, Scalex_remap_index }, - { 44363, TexEnvx_remap_index }, - { 49823, TexEnvxv_remap_index }, - { 2304, TexParameterx_remap_index }, - { 36751, Translatex_remap_index }, - { 38326, ClipPlanef_remap_index }, - { 38228, ClipPlanex_remap_index }, + { 43546, Rotatex_remap_index }, + { 23563, SampleCoveragex_remap_index }, + { 15044, Scalex_remap_index }, + { 44793, TexEnvx_remap_index }, + { 50299, TexEnvxv_remap_index }, + { 2357, TexParameterx_remap_index }, + { 37053, Translatex_remap_index }, + { 38628, ClipPlanef_remap_index }, + { 38530, ClipPlanex_remap_index }, { 772, GetClipPlanef_remap_index }, { 635, GetClipPlanex_remap_index }, - { 23270, GetFixedv_remap_index }, + { 23481, GetFixedv_remap_index }, { 1332, GetLightxv_remap_index }, - { 26453, GetMaterialxv_remap_index }, - { 24913, GetTexEnvxv_remap_index }, - { 19826, GetTexParameterxv_remap_index }, - { 33776, PointParameterx_remap_index }, - { 43071, PointParameterxv_remap_index }, - { 22388, TexParameterxv_remap_index }, - { -1, -1 } -}; - -/* these functions are in the ABI, but have alternative names */ -static const struct gl_function_remap MESA_alt_functions[] = { - /* from GL_EXT_blend_color */ - { 39719, _gloffset_BlendColor }, - /* from GL_EXT_blend_minmax */ - { 42626, _gloffset_BlendEquation }, - /* from GL_EXT_color_subtable */ - { 6424, _gloffset_ColorSubTable }, - { 24814, _gloffset_CopyColorSubTable }, - /* from GL_EXT_convolution */ - { 1366, _gloffset_GetConvolutionParameteriv }, - { 16158, _gloffset_ConvolutionParameterfv }, - { 19663, _gloffset_CopyConvolutionFilter1D }, - { 21900, _gloffset_SeparableFilter2D }, - { 23146, _gloffset_GetConvolutionFilter }, - { 27271, _gloffset_ConvolutionFilter1D }, - { 29948, _gloffset_ConvolutionFilter2D }, - { 33054, _gloffset_GetSeparableFilter }, - { 34812, _gloffset_ConvolutionParameteri }, - { 34958, _gloffset_ConvolutionParameterf }, - { 41665, _gloffset_ConvolutionParameteriv }, - { 48107, _gloffset_GetConvolutionParameterfv }, - { 49389, _gloffset_CopyConvolutionFilter2D }, - /* from GL_EXT_copy_texture */ - { 31568, _gloffset_CopyTexImage2D }, - { 34540, _gloffset_CopyTexImage1D }, - { 37348, _gloffset_CopyTexSubImage1D }, - { 44172, _gloffset_CopyTexSubImage3D }, - { 48363, _gloffset_CopyTexSubImage2D }, - /* from GL_EXT_draw_range_elements */ - { 28671, _gloffset_DrawRangeElements }, - /* from GL_EXT_histogram */ - { 5633, _gloffset_GetHistogramParameterfv }, - { 9664, _gloffset_GetHistogramParameteriv }, - { 11288, _gloffset_Minmax }, - { 16532, _gloffset_GetMinmax }, - { 25463, _gloffset_Histogram }, - { 34468, _gloffset_GetMinmaxParameteriv }, - { 35658, _gloffset_ResetMinmax }, - { 36711, _gloffset_GetHistogram }, - { 38641, _gloffset_GetMinmaxParameterfv }, - { 39830, _gloffset_ResetHistogram }, - /* from GL_EXT_paletted_texture */ - { 15983, _gloffset_ColorTable }, - { 21509, _gloffset_GetColorTableParameterfv }, - { 30837, _gloffset_GetColorTable }, - { 35014, _gloffset_GetColorTableParameteriv }, - /* from GL_EXT_subtexture */ - { 2756, _gloffset_TexSubImage1D }, - { 42341, _gloffset_TexSubImage2D }, - /* from GL_EXT_texture3D */ - { 25889, _gloffset_TexImage3D }, - { 46848, _gloffset_TexSubImage3D }, - /* from GL_EXT_texture_object */ - { 4994, _gloffset_GenTextures }, - { 10623, _gloffset_BindTexture }, - { 20559, _gloffset_IsTexture }, - { 26298, _gloffset_PrioritizeTextures }, - { 31066, _gloffset_DeleteTextures }, - { 47304, _gloffset_AreTexturesResident }, - /* from GL_EXT_vertex_array */ - { 21998, _gloffset_ArrayElement }, - { 33819, _gloffset_DrawArrays }, - { 44892, _gloffset_GetPointerv }, - /* from GL_KHR_debug */ - { 44892, _gloffset_GetPointerv }, - /* from GL_NV_read_buffer */ - { 34781, _gloffset_ReadBuffer }, - /* from GL_OES_blend_subtract */ - { 42626, _gloffset_BlendEquation }, - /* from GL_OES_texture_3D */ - { 25889, _gloffset_TexImage3D }, - { 44172, _gloffset_CopyTexSubImage3D }, - { 46848, _gloffset_TexSubImage3D }, - /* from GL_OES_texture_cube_map */ - { 20145, _gloffset_TexGeni }, - { 20173, _gloffset_TexGenf }, - { 23735, _gloffset_GetTexGenfv }, - { 39670, _gloffset_TexGeniv }, - { 42450, _gloffset_TexGenfv }, - { 48709, _gloffset_GetTexGeniv }, - /* from GL_SGI_color_table */ - { 3199, _gloffset_ColorTableParameteriv }, - { 15983, _gloffset_ColorTable }, - { 20503, _gloffset_ColorTableParameterfv }, - { 21509, _gloffset_GetColorTableParameterfv }, - { 30837, _gloffset_GetColorTable }, - { 30915, _gloffset_CopyColorTable }, - { 35014, _gloffset_GetColorTableParameteriv }, + { 26664, GetMaterialxv_remap_index }, + { 25124, GetTexEnvxv_remap_index }, + { 19994, GetTexParameterxv_remap_index }, + { 34056, PointParameterx_remap_index }, + { 43501, PointParameterxv_remap_index }, + { 22576, TexParameterxv_remap_index }, + { 6855, BlendBarrier_remap_index }, + { 40442, PrimitiveBoundingBox_remap_index }, { -1, -1 } }; diff -Nru mesa-12.0.6/src/mesa/main/scissor.c mesa-17.0.7/src/mesa/main/scissor.c --- mesa-12.0.6/src/mesa/main/scissor.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/scissor.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,6 +25,7 @@ #include "main/glheader.h" #include "main/context.h" +#include "main/enums.h" #include "main/mtypes.h" #include "main/scissor.h" @@ -210,6 +211,59 @@ ScissorIndexed(index, v[0], v[1], v[2], v[3], "glScissorIndexedv"); } +void GLAPIENTRY +_mesa_WindowRectanglesEXT(GLenum mode, GLsizei count, const GLint *box) +{ + int i; + struct gl_scissor_rect newval[MAX_WINDOW_RECTANGLES]; + GET_CURRENT_CONTEXT(ctx); + + if (MESA_VERBOSE & VERBOSE_API) + _mesa_debug(ctx, "glWindowRectanglesEXT(%s, %d, %p)\n", + _mesa_enum_to_string(mode), count, box); + + if (mode != GL_INCLUSIVE_EXT && mode != GL_EXCLUSIVE_EXT) { + _mesa_error(ctx, GL_INVALID_ENUM, + "glWindowRectanglesEXT(invalid mode 0x%x)", mode); + return; + } + + if (count < 0) { + _mesa_error(ctx, GL_INVALID_VALUE, "glWindowRectanglesEXT(count < 0)"); + return; + } + + if (count > ctx->Const.MaxWindowRectangles) { + _mesa_error(ctx, GL_INVALID_VALUE, + "glWindowRectanglesEXT(count >= MaxWindowRectangles (%d)", + ctx->Const.MaxWindowRectangles); + return; + } + + for (i = 0; i < count; i++) { + if (box[2] < 0 || box[3] < 0) { + _mesa_error(ctx, GL_INVALID_VALUE, + "glWindowRectanglesEXT(box %d: w < 0 || h < 0)", i); + return; + } + newval[i].X = box[0]; + newval[i].Y = box[1]; + newval[i].Width = box[2]; + newval[i].Height = box[3]; + box += 4; + } + + FLUSH_VERTICES(ctx, _NEW_SCISSOR); + memcpy(ctx->Scissor.WindowRects, newval, + sizeof(struct gl_scissor_rect) * count); + ctx->Scissor.NumWindowRects = count; + ctx->Scissor.WindowRectMode = mode; + + if (ctx->Driver.Scissor) + ctx->Driver.Scissor(ctx); +} + + /** * Initialize the context's scissor state. * \param ctx the GL context. @@ -221,6 +275,7 @@ /* Scissor group */ ctx->Scissor.EnableFlags = 0; + ctx->Scissor.WindowRectMode = GL_EXCLUSIVE_EXT; /* Note: ctx->Const.MaxViewports may not have been set by the driver yet, * so just initialize all of them. diff -Nru mesa-12.0.6/src/mesa/main/scissor.h mesa-17.0.7/src/mesa/main/scissor.h --- mesa-12.0.6/src/mesa/main/scissor.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/scissor.h 2017-06-01 10:37:10.000000000 +0000 @@ -43,6 +43,9 @@ extern void GLAPIENTRY _mesa_ScissorIndexedv(GLuint index, const GLint * v); +extern void GLAPIENTRY +_mesa_WindowRectanglesEXT(GLenum mode, GLsizei count, const GLint *box); + extern void _mesa_set_scissor(struct gl_context *ctx, unsigned idx, GLint x, GLint y, GLsizei width, GLsizei height); diff -Nru mesa-12.0.6/src/mesa/main/shaderapi.c mesa-17.0.7/src/mesa/main/shaderapi.c --- mesa-12.0.6/src/mesa/main/shaderapi.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/shaderapi.c 2017-06-01 10:37:10.000000000 +0000 @@ -59,7 +59,7 @@ #include "util/ralloc.h" #include "util/hash_table.h" #include "util/mesa-sha1.h" - +#include "util/crc32.h" /** * Return mask of GLSL_x flags by examining the MESA_GLSL env var. @@ -96,6 +96,22 @@ return flags; } +/** + * Memoized version of getenv("MESA_SHADER_CAPTURE_PATH"). + */ +const char * +_mesa_get_shader_capture_path(void) +{ + static bool read_env_var = false; + static const char *path = NULL; + + if (!read_env_var) { + path = getenv("MESA_SHADER_CAPTURE_PATH"); + read_env_var = true; + } + + return path; +} /** * Initialize context's shader state. @@ -145,8 +161,7 @@ _mesa_reference_shader_program(ctx, &ctx->Shader.CurrentProgram[i], NULL); } - _mesa_reference_shader_program(ctx, &ctx->Shader._CurrentFragmentProgram, - NULL); + _mesa_reference_program(ctx, &ctx->Shader._CurrentFragmentProgram, NULL); _mesa_reference_shader_program(ctx, &ctx->Shader.ActiveProgram, NULL); /* Extended for ARB_separate_shader_objects */ @@ -264,7 +279,7 @@ _mesa_error(ctx, GL_INVALID_OPERATION, "glAttachShader"); return; } else if (same_type_disallowed && - shProg->Shaders[i]->Type == sh->Type) { + shProg->Shaders[i]->Stage == sh->Stage) { /* Shader with the same type is already attached to this program, * OpenGL ES 2.0 and 3.0 specs say: * @@ -307,7 +322,8 @@ _mesa_HashLockMutex(ctx->Shared->ShaderObjects); name = _mesa_HashFindFreeKeyBlock(ctx->Shared->ShaderObjects, 1); - sh = ctx->Driver.NewShader(ctx, name, type); + sh = _mesa_new_shader(name, _mesa_shader_enum_to_shader_stage(type)); + sh->Type = type; _mesa_HashInsertLocked(ctx->Shared->ShaderObjects, name, sh); _mesa_HashUnlockMutex(ctx->Shared->ShaderObjects); @@ -429,11 +445,11 @@ #ifdef DEBUG /* sanity check - make sure the new list's entries are sensible */ for (j = 0; j < shProg->NumShaders; j++) { - assert(shProg->Shaders[j]->Type == GL_VERTEX_SHADER || - shProg->Shaders[j]->Type == GL_TESS_CONTROL_SHADER || - shProg->Shaders[j]->Type == GL_TESS_EVALUATION_SHADER || - shProg->Shaders[j]->Type == GL_GEOMETRY_SHADER || - shProg->Shaders[j]->Type == GL_FRAGMENT_SHADER); + assert(shProg->Shaders[j]->Stage == MESA_SHADER_VERTEX || + shProg->Shaders[j]->Stage == MESA_SHADER_TESS_CTRL || + shProg->Shaders[j]->Stage == MESA_SHADER_TESS_EVAL || + shProg->Shaders[j]->Stage == MESA_SHADER_GEOMETRY || + shProg->Shaders[j]->Stage == MESA_SHADER_FRAGMENT); assert(shProg->Shaders[j]->RefCount > 0); } #endif @@ -516,7 +532,7 @@ static bool check_gs_query(struct gl_context *ctx, const struct gl_shader_program *shProg) { - if (shProg->LinkStatus && + if (shProg->data->LinkStatus && shProg->_LinkedShaders[MESA_SHADER_GEOMETRY] != NULL) { return true; } @@ -541,7 +557,7 @@ static bool check_tcs_query(struct gl_context *ctx, const struct gl_shader_program *shProg) { - if (shProg->LinkStatus && + if (shProg->data->LinkStatus && shProg->_LinkedShaders[MESA_SHADER_TESS_CTRL] != NULL) { return true; } @@ -567,7 +583,7 @@ static bool check_tes_query(struct gl_context *ctx, const struct gl_shader_program *shProg) { - if (shProg->LinkStatus && + if (shProg->data->LinkStatus && shProg->_LinkedShaders[MESA_SHADER_TESS_EVAL] != NULL) { return true; } @@ -620,13 +636,14 @@ *params = shProg->DeletePending; return; case GL_LINK_STATUS: - *params = shProg->LinkStatus; + *params = shProg->data->LinkStatus; return; case GL_VALIDATE_STATUS: - *params = shProg->Validated; + *params = shProg->data->Validated; return; case GL_INFO_LOG_LENGTH: - *params = shProg->InfoLog ? strlen(shProg->InfoLog) + 1 : 0; + *params = (shProg->data->InfoLog && shProg->data->InfoLog[0] != '\0') ? + strlen(shProg->data->InfoLog) + 1 : 0; return; case GL_ATTACHED_SHADERS: *params = shProg->NumShaders; @@ -640,9 +657,9 @@ case GL_ACTIVE_UNIFORMS: { unsigned i; const unsigned num_uniforms = - shProg->NumUniformStorage - shProg->NumHiddenUniforms; + shProg->data->NumUniformStorage - shProg->data->NumHiddenUniforms; for (*params = 0, i = 0; i < num_uniforms; i++) { - if (!shProg->UniformStorage[i].is_shader_storage) + if (!shProg->data->UniformStorage[i].is_shader_storage) (*params)++; } return; @@ -651,17 +668,17 @@ unsigned i; GLint max_len = 0; const unsigned num_uniforms = - shProg->NumUniformStorage - shProg->NumHiddenUniforms; + shProg->data->NumUniformStorage - shProg->data->NumHiddenUniforms; for (i = 0; i < num_uniforms; i++) { - if (shProg->UniformStorage[i].is_shader_storage) + if (shProg->data->UniformStorage[i].is_shader_storage) continue; /* Add one for the terminating NUL character for a non-array, and * 4 for the "[0]" and the NUL for an array. */ - const GLint len = strlen(shProg->UniformStorage[i].name) + 1 + - ((shProg->UniformStorage[i].array_elements != 0) ? 3 : 0); + const GLint len = strlen(shProg->data->UniformStorage[i].name) + 1 + + ((shProg->data->UniformStorage[i].array_elements != 0) ? 3 : 0); if (len > max_len) max_len = len; @@ -702,26 +719,34 @@ case GL_GEOMETRY_VERTICES_OUT: if (!has_core_gs) break; - if (check_gs_query(ctx, shProg)) - *params = shProg->Geom.VerticesOut; + if (check_gs_query(ctx, shProg)) { + *params = shProg->_LinkedShaders[MESA_SHADER_GEOMETRY]-> + info.Geom.VerticesOut; + } return; case GL_GEOMETRY_SHADER_INVOCATIONS: if (!has_core_gs || !ctx->Extensions.ARB_gpu_shader5) break; - if (check_gs_query(ctx, shProg)) - *params = shProg->Geom.Invocations; + if (check_gs_query(ctx, shProg)) { + *params = shProg->_LinkedShaders[MESA_SHADER_GEOMETRY]-> + info.Geom.Invocations; + } return; case GL_GEOMETRY_INPUT_TYPE: if (!has_core_gs) break; - if (check_gs_query(ctx, shProg)) - *params = shProg->Geom.InputType; + if (check_gs_query(ctx, shProg)) { + *params = shProg->_LinkedShaders[MESA_SHADER_GEOMETRY]-> + info.Geom.InputType; + } return; case GL_GEOMETRY_OUTPUT_TYPE: if (!has_core_gs) break; - if (check_gs_query(ctx, shProg)) - *params = shProg->Geom.OutputType; + if (check_gs_query(ctx, shProg)) { + *params = shProg->_LinkedShaders[MESA_SHADER_GEOMETRY]-> + info.Geom.OutputType; + } return; case GL_ACTIVE_UNIFORM_BLOCK_MAX_NAME_LENGTH: { unsigned i; @@ -730,10 +755,10 @@ if (!has_ubo) break; - for (i = 0; i < shProg->NumUniformBlocks; i++) { + for (i = 0; i < shProg->data->NumUniformBlocks; i++) { /* Add one for the terminating NUL character. */ - const GLint len = strlen(shProg->UniformBlocks[i].Name) + 1; + const GLint len = strlen(shProg->data->UniformBlocks[i].Name) + 1; if (len > max_len) max_len = len; @@ -746,7 +771,7 @@ if (!has_ubo) break; - *params = shProg->NumUniformBlocks; + *params = shProg->data->NumUniformBlocks; return; case GL_PROGRAM_BINARY_RETRIEVABLE_HINT: /* This enum isn't part of the OES extension for OpenGL ES 2.0. It is @@ -767,13 +792,13 @@ if (!ctx->Extensions.ARB_shader_atomic_counters) break; - *params = shProg->NumAtomicBuffers; + *params = shProg->data->NumAtomicBuffers; return; case GL_COMPUTE_WORK_GROUP_SIZE: { int i; if (!_mesa_has_compute_shaders(ctx)) break; - if (!shProg->LinkStatus) { + if (!shProg->data->LinkStatus) { _mesa_error(ctx, GL_INVALID_OPERATION, "glGetProgramiv(program not " "linked)"); return; @@ -789,39 +814,63 @@ } case GL_PROGRAM_SEPARABLE: /* If the program has not been linked, return initial value 0. */ - *params = (shProg->LinkStatus == GL_FALSE) ? 0 : shProg->SeparateShader; + *params = (shProg->data->LinkStatus == GL_FALSE) ? 0 : shProg->SeparateShader; return; /* ARB_tessellation_shader */ case GL_TESS_CONTROL_OUTPUT_VERTICES: if (!has_tess) break; - if (check_tcs_query(ctx, shProg)) - *params = shProg->TessCtrl.VerticesOut; + if (check_tcs_query(ctx, shProg)) { + *params = shProg->_LinkedShaders[MESA_SHADER_TESS_CTRL]-> + info.TessCtrl.VerticesOut; + } return; case GL_TESS_GEN_MODE: if (!has_tess) break; - if (check_tes_query(ctx, shProg)) - *params = shProg->TessEval.PrimitiveMode; + if (check_tes_query(ctx, shProg)) { + *params = shProg->_LinkedShaders[MESA_SHADER_TESS_EVAL]-> + info.TessEval.PrimitiveMode; + } return; case GL_TESS_GEN_SPACING: if (!has_tess) break; - if (check_tes_query(ctx, shProg)) - *params = shProg->TessEval.Spacing; + if (check_tes_query(ctx, shProg)) { + const struct gl_linked_shader *tes = + shProg->_LinkedShaders[MESA_SHADER_TESS_EVAL]; + switch (tes->info.TessEval.Spacing) { + case TESS_SPACING_EQUAL: + *params = GL_EQUAL; + break; + case TESS_SPACING_FRACTIONAL_ODD: + *params = GL_FRACTIONAL_ODD; + break; + case TESS_SPACING_FRACTIONAL_EVEN: + *params = GL_FRACTIONAL_EVEN; + break; + case TESS_SPACING_UNSPECIFIED: + *params = 0; + break; + } + } return; case GL_TESS_GEN_VERTEX_ORDER: if (!has_tess) break; - if (check_tes_query(ctx, shProg)) - *params = shProg->TessEval.VertexOrder; + if (check_tes_query(ctx, shProg)) { + *params = shProg->_LinkedShaders[MESA_SHADER_TESS_EVAL]-> + info.TessEval.VertexOrder; + } return; case GL_TESS_GEN_POINT_MODE: if (!has_tess) break; - if (check_tes_query(ctx, shProg)) - *params = shProg->TessEval.PointMode; + if (check_tes_query(ctx, shProg)) { + *params = shProg->_LinkedShaders[MESA_SHADER_TESS_EVAL]-> + info.TessEval.PointMode; + } return; default: break; @@ -856,7 +905,8 @@ *params = shader->CompileStatus; break; case GL_INFO_LOG_LENGTH: - *params = shader->InfoLog ? strlen(shader->InfoLog) + 1 : 0; + *params = (shader->InfoLog && shader->InfoLog[0] != '\0') ? + strlen(shader->InfoLog) + 1 : 0; break; case GL_SHADER_SOURCE_LENGTH: *params = shader->Source ? strlen((char *) shader->Source) + 1 : 0; @@ -891,7 +941,7 @@ return; } - _mesa_copy_string(infoLog, bufSize, length, shProg->InfoLog); + _mesa_copy_string(infoLog, bufSize, length, shProg->data->InfoLog); } @@ -956,7 +1006,7 @@ free((void *)sh->Source); sh->Source = source; #ifdef DEBUG - sh->SourceChecksum = _mesa_str_checksum(sh->Source); + sh->SourceChecksum = util_hash_crc32(sh->Source, strlen(sh->Source)); #endif } @@ -993,8 +1043,13 @@ if (ctx->_Shader->Flags & GLSL_DUMP) { if (sh->CompileStatus) { - _mesa_log("GLSL IR for shader %d:\n", sh->Name); - _mesa_print_ir(_mesa_get_log_file(), sh->ir, NULL); + if (sh->ir) { + _mesa_log("GLSL IR for shader %d:\n", sh->Name); + _mesa_print_ir(_mesa_get_log_file(), sh->ir, NULL); + } else { + _mesa_log("No GLSL IR for shader %d (shader may be from " + "cache)\n", sh->Name); + } _mesa_log("\n\n"); } else { _mesa_log("GLSL shader %d failed to compile.\n", sh->Name); @@ -1046,10 +1101,38 @@ _mesa_glsl_link_shader(ctx, shProg); - if (shProg->LinkStatus == GL_FALSE && + /* Capture .shader_test files. */ + const char *capture_path = _mesa_get_shader_capture_path(); + if (shProg->Name != 0 && shProg->Name != ~0 && capture_path != NULL) { + FILE *file; + char *filename = ralloc_asprintf(NULL, "%s/%u.shader_test", + capture_path, shProg->Name); + file = fopen(filename, "w"); + if (file) { + fprintf(file, "[require]\nGLSL%s >= %u.%02u\n", + shProg->IsES ? " ES" : "", + shProg->data->Version / 100, shProg->data->Version % 100); + if (shProg->SeparateShader) + fprintf(file, "GL_ARB_separate_shader_objects\nSSO ENABLED\n"); + fprintf(file, "\n"); + + for (unsigned i = 0; i < shProg->NumShaders; i++) { + fprintf(file, "[%s shader]\n%s\n", + _mesa_shader_stage_to_string(shProg->Shaders[i]->Stage), + shProg->Shaders[i]->Source); + } + fclose(file); + } else { + _mesa_warning(ctx, "Failed to open %s", filename); + } + + ralloc_free(filename); + } + + if (shProg->data->LinkStatus == GL_FALSE && (ctx->_Shader->Flags & GLSL_REPORT_ERRORS)) { _mesa_debug(ctx, "Error linking program %u:\n%s\n", - shProg->Name, shProg->InfoLog); + shProg->Name, shProg->data->InfoLog); } /* debug code */ @@ -1058,12 +1141,12 @@ printf("Link %u shaders in program %u: %s\n", shProg->NumShaders, shProg->Name, - shProg->LinkStatus ? "Success" : "Failed"); + shProg->data->LinkStatus ? "Success" : "Failed"); for (i = 0; i < shProg->NumShaders; i++) { - printf(" shader %u, type 0x%x\n", + printf(" shader %u, stage %u\n", shProg->Shaders[i]->Name, - shProg->Shaders[i]->Type); + shProg->Shaders[i]->Stage); } } } @@ -1079,10 +1162,16 @@ printf("Mesa: glUseProgram(%u)\n", shProg->Name); for (i = 0; i < shProg->NumShaders; i++) { +#ifdef DEBUG printf(" %s shader %u, checksum %u\n", _mesa_shader_stage_to_string(shProg->Shaders[i]->Stage), shProg->Shaders[i]->Name, shProg->Shaders[i]->SourceChecksum); +#else + printf(" %s shader %u\n", + _mesa_shader_stage_to_string(shProg->Shaders[i]->Stage), + shProg->Shaders[i]->Name); +#endif } if (shProg->_LinkedShaders[MESA_SHADER_VERTEX]) printf(" vert prog %u\n", @@ -1109,7 +1198,7 @@ _mesa_active_program(struct gl_context *ctx, struct gl_shader_program *shProg, const char *caller) { - if ((shProg != NULL) && !shProg->LinkStatus) { + if ((shProg != NULL) && !shProg->data->LinkStatus) { _mesa_error(ctx, GL_INVALID_OPERATION, "%s(program %u not linked)", caller, shProg->Name); return; @@ -1133,7 +1222,7 @@ shProg = NULL; if (shProg) - _mesa_shader_program_init_subroutine_defaults(shProg); + _mesa_shader_program_init_subroutine_defaults(ctx, shProg); if (*target != shProg) { /* Program is current, flush it */ @@ -1154,10 +1243,13 @@ /* Empty for now. */ break; case MESA_SHADER_FRAGMENT: - if (*target == ctx->_Shader->_CurrentFragmentProgram) { - _mesa_reference_shader_program(ctx, - &ctx->_Shader->_CurrentFragmentProgram, - NULL); + if (*target != NULL && + ((*target)->_LinkedShaders[MESA_SHADER_FRAGMENT] && + (*target)->_LinkedShaders[MESA_SHADER_FRAGMENT]->Program == + ctx->_Shader->_CurrentFragmentProgram)) { + _mesa_reference_program(ctx, + &ctx->_Shader->_CurrentFragmentProgram, + NULL); } break; } @@ -1178,9 +1270,6 @@ for (i = 0; i < MESA_SHADER_STAGES; i++) use_shader_program(ctx, i, shProg, &ctx->Shader); _mesa_active_program(ctx, shProg, "glUseProgram"); - - if (ctx->Driver.UseProgram) - ctx->Driver.UseProgram(ctx, shProg); } @@ -1193,7 +1282,7 @@ validate_shader_program(const struct gl_shader_program *shProg, char *errMsg) { - if (!shProg->LinkStatus) { + if (!shProg->data->LinkStatus) { return GL_FALSE; } @@ -1237,13 +1326,13 @@ return; } - shProg->Validated = validate_shader_program(shProg, errMsg); - if (!shProg->Validated) { + shProg->data->Validated = validate_shader_program(shProg, errMsg); + if (!shProg->data->Validated) { /* update info log */ - if (shProg->InfoLog) { - ralloc_free(shProg->InfoLog); + if (shProg->data->InfoLog) { + ralloc_free(shProg->data->InfoLog); } - shProg->InfoLog = ralloc_strdup(shProg, errMsg); + shProg->data->InfoLog = ralloc_strdup(shProg->data, errMsg); } } @@ -1523,7 +1612,7 @@ "glLinkProgram")); } -#if defined(HAVE_SHA1) +#ifdef ENABLE_SHADER_CACHE /** * Generate a SHA-1 hash value string for given source string. */ @@ -1541,9 +1630,9 @@ * * /_.glsl */ -static void +static char * construct_name(const gl_shader_stage stage, const char *source, - const char *path, char *name, unsigned length) + const char *path) { char sha[64]; static const char *types[] = { @@ -1551,8 +1640,7 @@ }; generate_sha1(source, sha); - _mesa_snprintf(name, length, "%s/%s_%s.glsl", path, types[stage], - sha); + return ralloc_asprintf(NULL, "%s/%s_%s.glsl", path, types[stage], sha); } /** @@ -1561,7 +1649,6 @@ static void dump_shader(const gl_shader_stage stage, const char *source) { - char name[PATH_MAX]; static bool path_exists = true; char *dump_path; FILE *f; @@ -1575,7 +1662,7 @@ return; } - construct_name(stage, source, dump_path, name, PATH_MAX); + char *name = construct_name(stage, source, dump_path); f = fopen(name, "w"); if (f) { @@ -1586,6 +1673,7 @@ _mesa_warning(ctx, "could not open %s for dumping shader (%s)", name, strerror(errno)); } + ralloc_free(name); } /** @@ -1595,7 +1683,6 @@ static GLcharARB * read_shader(const gl_shader_stage stage, const char *source) { - char name[PATH_MAX]; char *read_path; static bool path_exists = true; int len, shader_size = 0; @@ -1611,9 +1698,9 @@ return NULL; } - construct_name(stage, source, read_path, name, PATH_MAX); - + char *name = construct_name(stage, source, read_path); f = fopen(name, "r"); + ralloc_free(name); if (!f) return NULL; @@ -1636,7 +1723,8 @@ return buffer; } -#endif /* HAVE_SHA1 */ + +#endif /* ENABLE_SHADER_CACHE */ /** * Called via glShaderSource() and glShaderSourceARB() API functions. @@ -1653,10 +1741,6 @@ GLcharARB *source; struct gl_shader *sh; -#if defined(HAVE_SHA1) - GLcharARB *replacement; -#endif /* HAVE_SHA1 */ - sh = _mesa_lookup_shader_err(ctx, shaderObj, "glShaderSourceARB"); if (!sh) return; @@ -1712,7 +1796,9 @@ source[totalLength - 1] = '\0'; source[totalLength - 2] = '\0'; -#if defined(HAVE_SHA1) +#ifdef ENABLE_SHADER_CACHE + GLcharARB *replacement; + /* Dump original shader source to MESA_SHADER_DUMP_PATH and replace * if corresponding entry found from MESA_SHADER_READ_PATH. */ @@ -1723,7 +1809,7 @@ free(source); source = replacement; } -#endif /* HAVE_SHA1 */ +#endif /* ENABLE_SHADER_CACHE */ shader_source(sh, source); @@ -1751,7 +1837,7 @@ if (!shProg) { return; } - if (!shProg->LinkStatus) { + if (!shProg->data->LinkStatus) { _mesa_error(ctx, GL_INVALID_OPERATION, "glUseProgram(program %u not linked)", program); return; @@ -1928,7 +2014,7 @@ * length is zero, and a call to GetProgramBinary will generate an * INVALID_OPERATION error. */ - if (!shProg->LinkStatus) { + if (!shProg->data->LinkStatus) { _mesa_error(ctx, GL_INVALID_OPERATION, "glGetProgramBinary(program %u not linked)", shProg->Name); @@ -1980,7 +2066,7 @@ * Since any value of binaryFormat passed "is not one of those specified as * allowable for [this] command, an INVALID_ENUM error is generated." */ - shProg->LinkStatus = GL_FALSE; + shProg->data->LinkStatus = GL_FALSE; _mesa_error(ctx, GL_INVALID_ENUM, "glProgramBinary"); } @@ -2070,67 +2156,68 @@ { gl_shader_stage stage = _mesa_shader_enum_to_shader_stage(type); use_shader_program(ctx, stage, shProg, shTarget); - - if (ctx->Driver.UseProgram) - ctx->Driver.UseProgram(ctx, shProg); } /** * Copy program-specific data generated by linking from the gl_shader_program - * object to a specific gl_program object. + * object to the gl_program object referred to by the gl_linked_shader. + * + * This function expects _mesa_reference_program() to have been previously + * called setting the gl_linked_shaders program reference. */ void -_mesa_copy_linked_program_data(gl_shader_stage type, - const struct gl_shader_program *src, - struct gl_program *dst) +_mesa_copy_linked_program_data(const struct gl_shader_program *src, + struct gl_linked_shader *dst_sh) { - switch (type) { + assert(dst_sh->Program); + + struct gl_program *dst = dst_sh->Program; + + dst->info.separate_shader = src->SeparateShader; + + switch (dst_sh->Stage) { case MESA_SHADER_VERTEX: dst->ClipDistanceArraySize = src->Vert.ClipDistanceArraySize; dst->CullDistanceArraySize = src->Vert.CullDistanceArraySize; break; case MESA_SHADER_TESS_CTRL: { - struct gl_tess_ctrl_program *dst_tcp = - (struct gl_tess_ctrl_program *) dst; - dst_tcp->VerticesOut = src->TessCtrl.VerticesOut; + dst->info.tess.tcs_vertices_out = dst_sh->info.TessCtrl.VerticesOut; break; } case MESA_SHADER_TESS_EVAL: { - struct gl_tess_eval_program *dst_tep = - (struct gl_tess_eval_program *) dst; - dst_tep->PrimitiveMode = src->TessEval.PrimitiveMode; - dst_tep->Spacing = src->TessEval.Spacing; - dst_tep->VertexOrder = src->TessEval.VertexOrder; - dst_tep->PointMode = src->TessEval.PointMode; + dst->info.tess.primitive_mode = dst_sh->info.TessEval.PrimitiveMode; + dst->info.tess.spacing = dst_sh->info.TessEval.Spacing; + dst->info.tess.ccw = dst_sh->info.TessEval.VertexOrder == GL_CCW; + dst->info.tess.point_mode = dst_sh->info.TessEval.PointMode; dst->ClipDistanceArraySize = src->TessEval.ClipDistanceArraySize; dst->CullDistanceArraySize = src->TessEval.CullDistanceArraySize; break; } case MESA_SHADER_GEOMETRY: { - struct gl_geometry_program *dst_gp = (struct gl_geometry_program *) dst; - dst_gp->VerticesIn = src->Geom.VerticesIn; - dst_gp->VerticesOut = src->Geom.VerticesOut; - dst_gp->Invocations = src->Geom.Invocations; - dst_gp->InputType = src->Geom.InputType; - dst_gp->OutputType = src->Geom.OutputType; + dst->info.gs.vertices_in = src->Geom.VerticesIn; + dst->info.gs.vertices_out = dst_sh->info.Geom.VerticesOut; + dst->info.gs.invocations = dst_sh->info.Geom.Invocations; + dst->info.gs.input_primitive = dst_sh->info.Geom.InputType; + dst->info.gs.output_primitive = dst_sh->info.Geom.OutputType; dst->ClipDistanceArraySize = src->Geom.ClipDistanceArraySize; dst->CullDistanceArraySize = src->Geom.CullDistanceArraySize; - dst_gp->UsesEndPrimitive = src->Geom.UsesEndPrimitive; - dst_gp->UsesStreams = src->Geom.UsesStreams; + dst->info.gs.uses_end_primitive = src->Geom.UsesEndPrimitive; + dst->info.gs.uses_streams = src->Geom.UsesStreams; break; } case MESA_SHADER_FRAGMENT: { - struct gl_fragment_program *dst_fp = (struct gl_fragment_program *) dst; - dst_fp->FragDepthLayout = src->FragDepthLayout; + dst->info.fs.depth_layout = src->FragDepthLayout; + dst->info.fs.early_fragment_tests = dst_sh->info.EarlyFragmentTests; + dst->info.fs.inner_coverage = dst_sh->info.InnerCoverage; + dst->info.fs.post_depth_coverage = dst_sh->info.PostDepthCoverage; break; } case MESA_SHADER_COMPUTE: { - struct gl_compute_program *dst_cp = (struct gl_compute_program *) dst; - int i; - for (i = 0; i < 3; i++) - dst_cp->LocalSize[i] = src->Comp.LocalSize[i]; - dst_cp->SharedSize = src->Comp.SharedSize; + for (int i = 0; i < 3; i++) + dst->info.cs.local_size[i] = src->Comp.LocalSize[i]; + dst->info.cs.shared_size = src->Comp.SharedSize; + dst->info.cs.local_size_variable = src->Comp.LocalSizeVariable; break; } default: @@ -2184,12 +2271,12 @@ /* Possibly... */ if (active-user-defined-varyings-in-linked-program) { append-error-to-info-log; - shProg->LinkStatus = GL_FALSE; + shProg->data->LinkStatus = GL_FALSE; } #endif } if (sh->InfoLog) - ralloc_strcat(&shProg->InfoLog, sh->InfoLog); + ralloc_strcat(&shProg->data->InfoLog, sh->InfoLog); } delete_shader(ctx, shader); @@ -2268,7 +2355,7 @@ GLenum resource_type; gl_shader_stage stage; - if (!_mesa_has_shader_subroutine(ctx)) { + if (!_mesa_has_ARB_shader_subroutine(ctx)) { _mesa_error(ctx, GL_INVALID_OPERATION, "%s", api_name); return -1; } @@ -2303,7 +2390,7 @@ GLenum resource_type; gl_shader_stage stage; - if (!_mesa_has_shader_subroutine(ctx)) { + if (!_mesa_has_ARB_shader_subroutine(ctx)) { _mesa_error(ctx, GL_INVALID_OPERATION, "%s", api_name); return -1; } @@ -2340,14 +2427,14 @@ GET_CURRENT_CONTEXT(ctx); const char *api_name = "glGetActiveSubroutineUniformiv"; struct gl_shader_program *shProg; - struct gl_shader *sh; + struct gl_linked_shader *sh; gl_shader_stage stage; struct gl_program_resource *res; const struct gl_uniform_storage *uni; GLenum resource_type; int count, i, j; - if (!_mesa_has_shader_subroutine(ctx)) { + if (!_mesa_has_ARB_shader_subroutine(ctx)) { _mesa_error(ctx, GL_INVALID_OPERATION, "%s", api_name); return; } @@ -2370,7 +2457,8 @@ return; } - if (index >= sh->NumSubroutineUniforms) { + struct gl_program *p = shProg->_LinkedShaders[stage]->Program; + if (index >= p->sh.NumSubroutineUniforms) { _mesa_error(ctx, GL_INVALID_VALUE, "%s: invalid index greater than GL_ACTIVE_SUBROUTINE_UNIFORMS", api_name); return; } @@ -2389,8 +2477,8 @@ if (res) { uni = res->Data; count = 0; - for (i = 0; i < sh->NumSubroutineFunctions; i++) { - struct gl_subroutine_function *fn = &sh->SubroutineFunctions[i]; + for (i = 0; i < p->sh.NumSubroutineFunctions; i++) { + struct gl_subroutine_function *fn = &p->sh.SubroutineFunctions[i]; for (j = 0; j < fn->num_compat_types; j++) { if (fn->types[j] == uni->type) { values[count++] = i; @@ -2433,7 +2521,7 @@ GLenum resource_type; gl_shader_stage stage; - if (!_mesa_has_shader_subroutine(ctx)) { + if (!_mesa_has_ARB_shader_subroutine(ctx)) { _mesa_error(ctx, GL_INVALID_OPERATION, "%s", api_name); return; } @@ -2472,7 +2560,7 @@ GLenum resource_type; gl_shader_stage stage; - if (!_mesa_has_shader_subroutine(ctx)) { + if (!_mesa_has_ARB_shader_subroutine(ctx)) { _mesa_error(ctx, GL_INVALID_OPERATION, "%s", api_name); return; } @@ -2497,7 +2585,6 @@ length, name, api_name); } - GLvoid GLAPIENTRY _mesa_UniformSubroutinesuiv(GLenum shadertype, GLsizei count, const GLuint *indices) @@ -2505,11 +2592,11 @@ GET_CURRENT_CONTEXT(ctx); const char *api_name = "glUniformSubroutinesuiv"; struct gl_shader_program *shProg; - struct gl_shader *sh; + struct gl_linked_shader *sh; gl_shader_stage stage; int i; - if (!_mesa_has_shader_subroutine(ctx)) { + if (!_mesa_has_ARB_shader_subroutine(ctx)) { _mesa_error(ctx, GL_INVALID_OPERATION, "%s", api_name); return; } @@ -2532,14 +2619,15 @@ return; } - if (count != sh->NumSubroutineUniformRemapTable) { + struct gl_program *p = shProg->_LinkedShaders[stage]->Program; + if (count != p->sh.NumSubroutineUniformRemapTable) { _mesa_error(ctx, GL_INVALID_VALUE, "%s", api_name); return; } i = 0; do { - struct gl_uniform_storage *uni = sh->SubroutineUniformRemapTable[i]; + struct gl_uniform_storage *uni = p->sh.SubroutineUniformRemapTable[i]; if (uni == NULL) { i++; continue; @@ -2550,14 +2638,14 @@ for (j = i; j < i + uni_count; j++) { struct gl_subroutine_function *subfn = NULL; - if (indices[j] > sh->MaxSubroutineFunctionIndex) { + if (indices[j] > p->sh.MaxSubroutineFunctionIndex) { _mesa_error(ctx, GL_INVALID_VALUE, "%s", api_name); return; } - for (f = 0; f < sh->NumSubroutineFunctions; f++) { - if (sh->SubroutineFunctions[f].index == indices[j]) - subfn = &sh->SubroutineFunctions[f]; + for (f = 0; f < p->sh.NumSubroutineFunctions; f++) { + if (p->sh.SubroutineFunctions[f].index == indices[j]) + subfn = &p->sh.SubroutineFunctions[f]; } if (!subfn) { @@ -2572,27 +2660,13 @@ _mesa_error(ctx, GL_INVALID_OPERATION, "%s", api_name); return; } + + ctx->SubroutineIndex[p->info.stage].IndexPtr[j] = indices[j]; } i += uni_count; } while(i < count); FLUSH_VERTICES(ctx, _NEW_PROGRAM_CONSTANTS); - i = 0; - do { - struct gl_uniform_storage *uni = sh->SubroutineUniformRemapTable[i]; - if (uni == NULL) { - i++; - continue; - } - - int uni_count = uni->array_elements ? uni->array_elements : 1; - - memcpy(&uni->storage[0], &indices[i], - sizeof(GLuint) * uni_count); - - _mesa_propagate_uniforms_to_driver_storage(uni, 0, uni_count); - i += uni_count; - } while(i < count); } @@ -2603,10 +2677,10 @@ GET_CURRENT_CONTEXT(ctx); const char *api_name = "glGetUniformSubroutineuiv"; struct gl_shader_program *shProg; - struct gl_shader *sh; + struct gl_linked_shader *sh; gl_shader_stage stage; - if (!_mesa_has_shader_subroutine(ctx)) { + if (!_mesa_has_ARB_shader_subroutine(ctx)) { _mesa_error(ctx, GL_INVALID_OPERATION, "%s", api_name); return; } @@ -2629,17 +2703,13 @@ return; } - if (location >= sh->NumSubroutineUniformRemapTable) { + struct gl_program *p = sh->Program; + if (location >= p->sh.NumSubroutineUniformRemapTable) { _mesa_error(ctx, GL_INVALID_VALUE, "%s", api_name); return; } - { - struct gl_uniform_storage *uni = sh->SubroutineUniformRemapTable[location]; - int offset = location - uni->opaque[stage].index; - memcpy(params, &uni->storage[offset], - sizeof(GLuint)); - } + *params = ctx->SubroutineIndex[p->info.stage].IndexPtr[location]; } @@ -2650,10 +2720,10 @@ GET_CURRENT_CONTEXT(ctx); const char *api_name = "glGetProgramStageiv"; struct gl_shader_program *shProg; - struct gl_shader *sh; + struct gl_linked_shader *sh; gl_shader_stage stage; - if (!_mesa_has_shader_subroutine(ctx)) { + if (!_mesa_has_ARB_shader_subroutine(ctx)) { _mesa_error(ctx, GL_INVALID_OPERATION, "%s", api_name); return; } @@ -2669,20 +2739,38 @@ stage = _mesa_shader_enum_to_shader_stage(shadertype); sh = shProg->_LinkedShaders[stage]; + + /* ARB_shader_subroutine doesn't ask the program to be linked, or list any + * INVALID_OPERATION in the case of not be linked. + * + * And for some pnames, like GL_ACTIVE_SUBROUTINE_UNIFORMS, you can ask the + * same info using other specs (ARB_program_interface_query), without the + * need of the program to be linked, being the value for that case 0. + * + * But at the same time, some other methods require the program to be + * linked for pname related to locations, so it would be inconsistent to + * not do the same here. So we are: + * * Return GL_INVALID_OPERATION if not linked only for locations. + * * Setting a default value of 0, to be returned if not linked. + */ if (!sh) { - _mesa_error(ctx, GL_INVALID_OPERATION, "%s", api_name); + values[0] = 0; + if (pname == GL_ACTIVE_SUBROUTINE_UNIFORM_LOCATIONS) { + _mesa_error(ctx, GL_INVALID_OPERATION, "%s", api_name); + } return; } + struct gl_program *p = sh->Program; switch (pname) { case GL_ACTIVE_SUBROUTINES: - values[0] = sh->NumSubroutineFunctions; + values[0] = p->sh.NumSubroutineFunctions; break; case GL_ACTIVE_SUBROUTINE_UNIFORM_LOCATIONS: - values[0] = sh->NumSubroutineUniformRemapTable; + values[0] = p->sh.NumSubroutineUniformRemapTable; break; case GL_ACTIVE_SUBROUTINE_UNIFORMS: - values[0] = sh->NumSubroutineUniforms; + values[0] = p->sh.NumSubroutineUniforms; break; case GL_ACTIVE_SUBROUTINE_MAX_LENGTH: { @@ -2692,7 +2780,7 @@ struct gl_program_resource *res; resource_type = _mesa_shader_stage_to_subroutine(stage); - for (i = 0; i < sh->NumSubroutineFunctions; i++) { + for (i = 0; i < p->sh.NumSubroutineFunctions; i++) { res = _mesa_program_resource_find_index(shProg, resource_type, i); if (res) { const GLint len = strlen(_mesa_program_resource_name(res)) + 1; @@ -2711,7 +2799,7 @@ struct gl_program_resource *res; resource_type = _mesa_shader_stage_to_subroutine_uniform(stage); - for (i = 0; i < sh->NumSubroutineUniformRemapTable; i++) { + for (i = 0; i < p->sh.NumSubroutineUniformRemapTable; i++) { res = _mesa_program_resource_find_index(shProg, resource_type, i); if (res) { const GLint len = strlen(_mesa_program_resource_name(res)) + 1 @@ -2732,12 +2820,12 @@ } static int -find_compat_subroutine(struct gl_shader *sh, const struct glsl_type *type) +find_compat_subroutine(struct gl_program *p, const struct glsl_type *type) { int i, j; - for (i = 0; i < sh->NumSubroutineFunctions; i++) { - struct gl_subroutine_function *fn = &sh->SubroutineFunctions[i]; + for (i = 0; i < p->sh.NumSubroutineFunctions; i++) { + struct gl_subroutine_function *fn = &p->sh.SubroutineFunctions[i]; for (j = 0; j < fn->num_compat_types; j++) { if (fn->types[j] == type) return i; @@ -2747,29 +2835,72 @@ } static void -_mesa_shader_init_subroutine_defaults(struct gl_shader *sh) +_mesa_shader_write_subroutine_index(struct gl_context *ctx, + struct gl_program *p) { int i, j; - for (i = 0; i < sh->NumSubroutineUniformRemapTable; i++) { - struct gl_uniform_storage *uni = sh->SubroutineUniformRemapTable[i]; + if (p->sh.NumSubroutineUniformRemapTable == 0) + return; + + i = 0; + do { + struct gl_uniform_storage *uni = p->sh.SubroutineUniformRemapTable[i]; int uni_count; int val; - if (!uni) + if (!uni) { + i++; continue; - uni_count = uni->array_elements ? uni->array_elements : 1; - val = find_compat_subroutine(sh, uni->type); + } - for (j = 0; j < uni_count; j++) + uni_count = uni->array_elements ? uni->array_elements : 1; + for (j = 0; j < uni_count; j++) { + val = ctx->SubroutineIndex[p->info.stage].IndexPtr[i + j]; memcpy(&uni->storage[j], &val, sizeof(int)); + } _mesa_propagate_uniforms_to_driver_storage(uni, 0, uni_count); + i += uni_count; + } while(i < p->sh.NumSubroutineUniformRemapTable); +} + +void +_mesa_shader_write_subroutine_indices(struct gl_context *ctx, + gl_shader_stage stage) +{ + if (ctx->_Shader->CurrentProgram[stage] && + ctx->_Shader->CurrentProgram[stage]->_LinkedShaders[stage]) + _mesa_shader_write_subroutine_index(ctx, + ctx->_Shader->CurrentProgram[stage]->_LinkedShaders[stage]->Program); +} + +static void +_mesa_program_init_subroutine_defaults(struct gl_context *ctx, + struct gl_program *p) +{ + assert(p); + + struct gl_subroutine_index_binding *binding = &ctx->SubroutineIndex[p->info.stage]; + if (binding->NumIndex != p->sh.NumSubroutineUniformRemapTable) { + binding->IndexPtr = realloc(binding->IndexPtr, + p->sh.NumSubroutineUniformRemapTable * (sizeof(GLuint))); + binding->NumIndex = p->sh.NumSubroutineUniformRemapTable; + } + + for (int i = 0; i < p->sh.NumSubroutineUniformRemapTable; i++) { + struct gl_uniform_storage *uni = p->sh.SubroutineUniformRemapTable[i]; + + if (!uni) + continue; + + binding->IndexPtr[i] = find_compat_subroutine(p, uni->type); } } void -_mesa_shader_program_init_subroutine_defaults(struct gl_shader_program *shProg) +_mesa_shader_program_init_subroutine_defaults(struct gl_context *ctx, + struct gl_shader_program *shProg) { int i; @@ -2780,6 +2911,6 @@ if (!shProg->_LinkedShaders[i]) continue; - _mesa_shader_init_subroutine_defaults(shProg->_LinkedShaders[i]); + _mesa_program_init_subroutine_defaults(ctx, shProg->_LinkedShaders[i]->Program); } } diff -Nru mesa-12.0.6/src/mesa/main/shaderapi.h mesa-17.0.7/src/mesa/main/shaderapi.h --- mesa-12.0.6/src/mesa/main/shaderapi.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/shaderapi.h 2017-06-01 10:37:10.000000000 +0000 @@ -43,6 +43,9 @@ extern GLbitfield _mesa_get_shader_flags(void); +extern const char * +_mesa_get_shader_capture_path(void); + extern void _mesa_copy_string(GLchar *dst, GLsizei maxLength, GLsizei *length, const GLchar *src); @@ -66,6 +69,9 @@ extern size_t _mesa_longest_attribute_name_length(struct gl_shader_program *shProg); +extern void +_mesa_shader_write_subroutine_indices(struct gl_context *ctx, + gl_shader_stage stage); extern void GLAPIENTRY _mesa_AttachObjectARB(GLhandleARB, GLhandleARB); @@ -212,9 +218,8 @@ struct gl_pipeline_object *shTarget); extern void -_mesa_copy_linked_program_data(gl_shader_stage type, - const struct gl_shader_program *src, - struct gl_program *dst); +_mesa_copy_linked_program_data(const struct gl_shader_program *src, + struct gl_linked_shader *dst_sh); extern bool _mesa_validate_shader_target(const struct gl_context *ctx, GLenum type); @@ -283,7 +288,8 @@ /* GL_ARB_shader_subroutine */ void -_mesa_shader_program_init_subroutine_defaults(struct gl_shader_program *shProg); +_mesa_shader_program_init_subroutine_defaults(struct gl_context *ctx, + struct gl_shader_program *shProg); extern GLint GLAPIENTRY _mesa_GetSubroutineUniformLocation(GLuint program, GLenum shadertype, diff -Nru mesa-12.0.6/src/mesa/main/shaderimage.c mesa-17.0.7/src/mesa/main/shaderimage.c --- mesa-12.0.6/src/mesa/main/shaderimage.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/shaderimage.c 2017-06-01 10:37:10.000000000 +0000 @@ -401,7 +401,7 @@ /* Formats supported on unextended desktop GL and the original * ARB_shader_image_load_store extension, c.f. table 3.21 of the OpenGL 4.2 - * specification. + * specification or by GLES 3.1 with GL_NV_image_formats extension. */ case GL_RG32F: case GL_RG16F: @@ -418,17 +418,27 @@ case GL_RG8I: case GL_R16I: case GL_R8I: - case GL_RGBA16: case GL_RGB10_A2: - case GL_RG16: case GL_RG8: - case GL_R16: case GL_R8: + case GL_RG8_SNORM: + case GL_R8_SNORM: + return true; + + /* Formats supported on unextended desktop GL and the original + * ARB_shader_image_load_store extension, c.f. table 3.21 of the OpenGL 4.2 + * specification. + * + * These can be supported by GLES 3.1 with GL_NV_image_formats & + * GL_EXT_texture_norm16 extensions but we don't have support for the + * latter in Mesa yet. + */ + case GL_RGBA16: case GL_RGBA16_SNORM: + case GL_RG16: case GL_RG16_SNORM: - case GL_RG8_SNORM: + case GL_R16: case GL_R16_SNORM: - case GL_R8_SNORM: return _mesa_is_desktop_gl(ctx); default: @@ -753,54 +763,3 @@ _mesa_end_texture_lookups(ctx); } - -void GLAPIENTRY -_mesa_MemoryBarrier(GLbitfield barriers) -{ - GET_CURRENT_CONTEXT(ctx); - - if (ctx->Driver.MemoryBarrier) - ctx->Driver.MemoryBarrier(ctx, barriers); -} - -void GLAPIENTRY -_mesa_MemoryBarrierByRegion(GLbitfield barriers) -{ - GET_CURRENT_CONTEXT(ctx); - - GLbitfield all_allowed_bits = GL_ATOMIC_COUNTER_BARRIER_BIT | - GL_FRAMEBUFFER_BARRIER_BIT | - GL_SHADER_IMAGE_ACCESS_BARRIER_BIT | - GL_SHADER_STORAGE_BARRIER_BIT | - GL_TEXTURE_FETCH_BARRIER_BIT | - GL_UNIFORM_BARRIER_BIT; - - if (ctx->Driver.MemoryBarrier) { - /* From section 7.11.2 of the OpenGL ES 3.1 specification: - * - * "When barriers is ALL_BARRIER_BITS, shader memory accesses will be - * synchronized relative to all these barrier bits, but not to other - * barrier bits specific to MemoryBarrier." - * - * That is, if barriers is the special value GL_ALL_BARRIER_BITS, then all - * barriers allowed by glMemoryBarrierByRegion should be activated." - */ - if (barriers == GL_ALL_BARRIER_BITS) { - ctx->Driver.MemoryBarrier(ctx, all_allowed_bits); - return; - } - - /* From section 7.11.2 of the OpenGL ES 3.1 specification: - * - * "An INVALID_VALUE error is generated if barriers is not the special - * value ALL_BARRIER_BITS, and has any bits set other than those - * described above." - */ - if ((barriers & ~all_allowed_bits) != 0) { - _mesa_error(ctx, GL_INVALID_VALUE, - "glMemoryBarrierByRegion(unsupported barrier bit"); - } - - ctx->Driver.MemoryBarrier(ctx, barriers); - } -} diff -Nru mesa-12.0.6/src/mesa/main/shaderimage.h mesa-17.0.7/src/mesa/main/shaderimage.h --- mesa-12.0.6/src/mesa/main/shaderimage.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/shaderimage.h 2017-06-01 10:37:10.000000000 +0000 @@ -87,12 +87,6 @@ void GLAPIENTRY _mesa_BindImageTextures(GLuint first, GLsizei count, const GLuint *textures); -void GLAPIENTRY -_mesa_MemoryBarrier(GLbitfield barriers); - -void GLAPIENTRY -_mesa_MemoryBarrierByRegion(GLbitfield barriers); - #ifdef __cplusplus } #endif diff -Nru mesa-12.0.6/src/mesa/main/shaderobj.c mesa-17.0.7/src/mesa/main/shaderobj.c --- mesa-12.0.6/src/mesa/main/shaderobj.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/shaderobj.c 2017-06-01 10:37:10.000000000 +0000 @@ -39,8 +39,9 @@ #include "main/uniforms.h" #include "program/program.h" #include "program/prog_parameter.h" -#include "program/hash_table.h" #include "util/ralloc.h" +#include "util/string_to_uint_map.h" +#include "util/u_atomic.h" /**********************************************************************/ /*** Shader object functions ***/ @@ -64,14 +65,11 @@ } if (*ptr) { /* Unreference the old shader */ - GLboolean deleteFlag = GL_FALSE; struct gl_shader *old = *ptr; assert(old->RefCount > 0); - old->RefCount--; - deleteFlag = (old->RefCount == 0); - if (deleteFlag) { + if (p_atomic_dec_zero(&old->RefCount)) { if (old->Name != 0) _mesa_HashRemove(ctx->Shared->ShaderObjects, old->Name); _mesa_delete_shader(ctx, old); @@ -83,32 +81,35 @@ if (sh) { /* reference new */ - sh->RefCount++; + p_atomic_inc(&sh->RefCount); *ptr = sh; } } -void -_mesa_init_shader(struct gl_context *ctx, struct gl_shader *shader) +static void +_mesa_init_shader(struct gl_shader *shader) { shader->RefCount = 1; + shader->info.Geom.VerticesOut = -1; + shader->info.Geom.InputType = GL_TRIANGLES; + shader->info.Geom.OutputType = GL_TRIANGLE_STRIP; } /** * Allocate a new gl_shader object, initialize it. - * Called via ctx->Driver.NewShader() */ struct gl_shader * -_mesa_new_shader(struct gl_context *ctx, GLuint name, GLenum type) +_mesa_new_shader(GLuint name, gl_shader_stage stage) { struct gl_shader *shader; - assert(_mesa_validate_shader_target(ctx, type)); shader = rzalloc(NULL, struct gl_shader); if (shader) { - shader->Type = type; - shader->Stage = _mesa_shader_enum_to_shader_stage(type); + shader->Stage = stage; shader->Name = name; - _mesa_init_shader(ctx, shader); +#ifdef DEBUG + shader->SourceChecksum = 0xa110c; /* alloc */ +#endif + _mesa_init_shader(shader); } return shader; } @@ -122,6 +123,17 @@ { free((void *)sh->Source); free(sh->Label); + ralloc_free(sh); +} + + +/** + * Delete a shader object. + */ +void +_mesa_delete_linked_shader(struct gl_context *ctx, + struct gl_linked_shader *sh) +{ _mesa_reference_program(ctx, &sh->Program, NULL); ralloc_free(sh); } @@ -181,6 +193,33 @@ /**********************************************************************/ +void +_mesa_reference_shader_program_data(struct gl_context *ctx, + struct gl_shader_program_data **ptr, + struct gl_shader_program_data *data) +{ + if (*ptr == data) + return; + + if (*ptr) { + struct gl_shader_program_data *oldData = *ptr; + + assert(oldData->RefCount > 0); + + if (p_atomic_dec_zero(&oldData->RefCount)) { + assert(ctx); + ralloc_free(oldData); + } + + *ptr = NULL; + } + + if (data) + p_atomic_inc(&data->RefCount); + + *ptr = data; +} + /** * Set ptr to point to shProg. * If ptr is pointing to another object, decrement its refcount (and delete @@ -199,14 +238,11 @@ } if (*ptr) { /* Unreference the old shader program */ - GLboolean deleteFlag = GL_FALSE; struct gl_shader_program *old = *ptr; assert(old->RefCount > 0); - old->RefCount--; - deleteFlag = (old->RefCount == 0); - if (deleteFlag) { + if (p_atomic_dec_zero(&old->RefCount)) { if (old->Name != 0) _mesa_HashRemove(ctx->Shared->ShaderObjects, old->Name); _mesa_delete_shader_program(ctx, old); @@ -217,11 +253,22 @@ assert(!*ptr); if (shProg) { - shProg->RefCount++; + p_atomic_inc(&shProg->RefCount); *ptr = shProg; } } +static struct gl_shader_program_data * +create_shader_program_data() +{ + struct gl_shader_program_data *data; + data = rzalloc(NULL, struct gl_shader_program_data); + if (data) + data->RefCount = 1; + + return data; +} + static void init_shader_program(struct gl_shader_program *prog) { @@ -232,17 +279,16 @@ prog->FragDataBindings = string_to_uint_map_ctor(); prog->FragDataIndexBindings = string_to_uint_map_ctor(); - prog->Geom.VerticesOut = -1; - prog->Geom.InputType = GL_TRIANGLES; - prog->Geom.OutputType = GL_TRIANGLE_STRIP; prog->Geom.UsesEndPrimitive = false; prog->Geom.UsesStreams = false; + prog->Comp.LocalSizeVariable = false; + prog->TransformFeedback.BufferMode = GL_INTERLEAVED_ATTRIBS; exec_list_make_empty(&prog->EmptyUniformLocations); - prog->InfoLog = ralloc_strdup(prog, ""); + prog->data->InfoLog = ralloc_strdup(prog->data, ""); } /** @@ -255,6 +301,11 @@ shProg = rzalloc(NULL, struct gl_shader_program); if (shProg) { shProg->Name = name; + shProg->data = create_shader_program_data(); + if (!shProg->data) { + ralloc_free(shProg); + return NULL; + } init_shader_program(shProg); } return shProg; @@ -265,16 +316,25 @@ * Clear (free) the shader program state that gets produced by linking. */ void -_mesa_clear_shader_program_data(struct gl_shader_program *shProg) +_mesa_clear_shader_program_data(struct gl_context *ctx, + struct gl_shader_program *shProg) { - unsigned i; + for (gl_shader_stage sh = 0; sh < MESA_SHADER_STAGES; sh++) { + if (shProg->_LinkedShaders[sh] != NULL) { + _mesa_delete_linked_shader(ctx, shProg->_LinkedShaders[sh]); + shProg->_LinkedShaders[sh] = NULL; + } + } + + shProg->data->linked_stages = 0; - if (shProg->UniformStorage) { - for (i = 0; i < shProg->NumUniformStorage; ++i) - _mesa_uniform_detach_all_driver_storage(&shProg->UniformStorage[i]); - ralloc_free(shProg->UniformStorage); - shProg->NumUniformStorage = 0; - shProg->UniformStorage = NULL; + if (shProg->data->UniformStorage) { + for (unsigned i = 0; i < shProg->data->NumUniformStorage; ++i) + _mesa_uniform_detach_all_driver_storage(&shProg->data-> + UniformStorage[i]); + ralloc_free(shProg->data->UniformStorage); + shProg->data->NumUniformStorage = 0; + shProg->data->UniformStorage = NULL; } if (shProg->UniformRemapTable) { @@ -288,21 +348,21 @@ shProg->UniformHash = NULL; } - assert(shProg->InfoLog != NULL); - ralloc_free(shProg->InfoLog); - shProg->InfoLog = ralloc_strdup(shProg, ""); - - ralloc_free(shProg->UniformBlocks); - shProg->UniformBlocks = NULL; - shProg->NumUniformBlocks = 0; - - ralloc_free(shProg->ShaderStorageBlocks); - shProg->ShaderStorageBlocks = NULL; - shProg->NumShaderStorageBlocks = 0; - - ralloc_free(shProg->AtomicBuffers); - shProg->AtomicBuffers = NULL; - shProg->NumAtomicBuffers = 0; + assert(shProg->data->InfoLog != NULL); + ralloc_free(shProg->data->InfoLog); + shProg->data->InfoLog = ralloc_strdup(shProg->data, ""); + + ralloc_free(shProg->data->UniformBlocks); + shProg->data->UniformBlocks = NULL; + shProg->data->NumUniformBlocks = 0; + + ralloc_free(shProg->data->ShaderStorageBlocks); + shProg->data->ShaderStorageBlocks = NULL; + shProg->data->NumShaderStorageBlocks = 0; + + ralloc_free(shProg->data->AtomicBuffers); + shProg->data->AtomicBuffers = NULL; + shProg->data->NumAtomicBuffers = 0; if (shProg->ProgramResourceList) { ralloc_free(shProg->ProgramResourceList); @@ -321,11 +381,10 @@ struct gl_shader_program *shProg) { GLuint i; - gl_shader_stage sh; assert(shProg->Type == GL_SHADER_PROGRAM_MESA); - _mesa_clear_shader_program_data(shProg); + _mesa_clear_shader_program_data(ctx, shProg); if (shProg->AttributeBindings) { string_to_uint_map_dtor(shProg->AttributeBindings); @@ -359,14 +418,6 @@ shProg->TransformFeedback.VaryingNames = NULL; shProg->TransformFeedback.NumVarying = 0; - - for (sh = 0; sh < MESA_SHADER_STAGES; sh++) { - if (shProg->_LinkedShaders[sh] != NULL) { - _mesa_delete_shader(ctx, shProg->_LinkedShaders[sh]); - shProg->_LinkedShaders[sh] = NULL; - } - } - free(shProg->Label); shProg->Label = NULL; } @@ -380,7 +431,7 @@ struct gl_shader_program *shProg) { _mesa_free_shader_program_data(ctx, shProg); - + _mesa_reference_shader_program_data(ctx, &shProg->data, NULL); ralloc_free(shProg); } @@ -438,6 +489,5 @@ void _mesa_init_shader_object_functions(struct dd_function_table *driver) { - driver->NewShader = _mesa_new_shader; driver->LinkShader = _mesa_ir_link_shader; } diff -Nru mesa-12.0.6/src/mesa/main/shaderobj.h mesa-17.0.7/src/mesa/main/shaderobj.h --- mesa-12.0.6/src/mesa/main/shaderobj.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/shaderobj.h 2017-06-01 10:37:10.000000000 +0000 @@ -66,6 +66,11 @@ struct gl_shader_program **ptr, struct gl_shader_program *shProg); +void +_mesa_reference_shader_program_data(struct gl_context *ctx, + struct gl_shader_program_data **ptr, + struct gl_shader_program_data *data); + static inline void _mesa_reference_shader_program(struct gl_context *ctx, struct gl_shader_program **ptr, @@ -75,16 +80,16 @@ _mesa_reference_shader_program_(ctx, ptr, shProg); } - -extern void -_mesa_init_shader(struct gl_context *ctx, struct gl_shader *shader); - extern struct gl_shader * -_mesa_new_shader(struct gl_context *ctx, GLuint name, GLenum type); +_mesa_new_shader(GLuint name, gl_shader_stage type); extern void _mesa_delete_shader(struct gl_context *ctx, struct gl_shader *sh); +extern void +_mesa_delete_linked_shader(struct gl_context *ctx, + struct gl_linked_shader *sh); + extern struct gl_shader_program * _mesa_lookup_shader_program(struct gl_context *ctx, GLuint name); @@ -96,7 +101,8 @@ _mesa_new_shader_program(GLuint name); extern void -_mesa_clear_shader_program_data(struct gl_shader_program *shProg); +_mesa_clear_shader_program_data(struct gl_context *ctx, + struct gl_shader_program *shProg); extern void _mesa_free_shader_program_data(struct gl_context *ctx, diff -Nru mesa-12.0.6/src/mesa/main/shader_query.cpp mesa-17.0.7/src/mesa/main/shader_query.cpp --- mesa-12.0.6/src/mesa/main/shader_query.cpp 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/shader_query.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -37,7 +37,7 @@ #include "compiler/glsl/glsl_symbol_table.h" #include "compiler/glsl/ir.h" #include "compiler/glsl/program.h" -#include "program/hash_table.h" +#include "util/string_to_uint_map.h" #include "util/strndup.h" @@ -84,7 +84,8 @@ } if (index >= ctx->Const.Program[MESA_SHADER_VERTEX].MaxAttribs) { - _mesa_error(ctx, GL_INVALID_VALUE, "glBindAttribLocation(index)"); + _mesa_error(ctx, GL_INVALID_VALUE, "glBindAttribLocation(%u >= %u)", + index, ctx->Const.Program[MESA_SHADER_VERTEX].MaxAttribs); return; } @@ -117,7 +118,7 @@ if (!shProg) return; - if (!shProg->LinkStatus) { + if (!shProg->data->LinkStatus) { _mesa_error(ctx, GL_INVALID_VALUE, "glGetActiveAttrib(program not linked)"); return; @@ -164,7 +165,7 @@ return -1; } - if (!shProg->LinkStatus) { + if (!shProg->data->LinkStatus) { _mesa_error(ctx, GL_INVALID_OPERATION, "glGetAttribLocation(program not linked)"); return -1; @@ -192,7 +193,7 @@ unsigned _mesa_count_active_attribs(struct gl_shader_program *shProg) { - if (!shProg->LinkStatus + if (!shProg->data->LinkStatus || shProg->_LinkedShaders[MESA_SHADER_VERTEX] == NULL) { return 0; } @@ -211,7 +212,7 @@ size_t _mesa_longest_attribute_name_length(struct gl_shader_program *shProg) { - if (!shProg->LinkStatus + if (!shProg->data->LinkStatus || shProg->_LinkedShaders[MESA_SHADER_VERTEX] == NULL) { return 0; } @@ -296,7 +297,7 @@ return -1; } - if (!shProg->LinkStatus) { + if (!shProg->data->LinkStatus) { _mesa_error(ctx, GL_INVALID_OPERATION, "glGetFragDataIndex(program not linked)"); return -1; @@ -331,7 +332,7 @@ return -1; } - if (!shProg->LinkStatus) { + if (!shProg->data->LinkStatus) { _mesa_error(ctx, GL_INVALID_OPERATION, "glGetFragDataLocation(program not linked)"); return -1; @@ -590,7 +591,7 @@ switch (res->Type) { case GL_ATOMIC_COUNTER_BUFFER: - return RESOURCE_ATC(res) - shProg->AtomicBuffers; + return RESOURCE_ATC(res) - shProg->data->AtomicBuffers; case GL_VERTEX_SUBROUTINE: case GL_GEOMETRY_SUBROUTINE: case GL_FRAGMENT_SUBROUTINE: @@ -685,31 +686,14 @@ * ambiguous in this regard. However, either name can later be passed * to glGetUniformLocation (and related APIs), so there shouldn't be any * harm in always appending "[0]" to uniform array names. - * - * Geometry shader stage has different naming convention where the 'normal' - * condition is an array, therefore for variables referenced in geometry - * stage we do not add '[0]'. - * - * Note, that TCS outputs and TES inputs should not have index appended - * either. */ static bool add_index_to_name(struct gl_program_resource *res) { - bool add_index = !((res->Type == GL_PROGRAM_INPUT && - res->StageReferences & (1 << MESA_SHADER_GEOMETRY | - 1 << MESA_SHADER_TESS_CTRL | - 1 << MESA_SHADER_TESS_EVAL)) || - (res->Type == GL_PROGRAM_OUTPUT && - res->StageReferences & 1 << MESA_SHADER_TESS_CTRL)); - /* Transform feedback varyings have array index already appended * in their names. */ - if (res->Type == GL_TRANSFORM_FEEDBACK_VARYING) - add_index = false; - - return add_index; + return res->Type != GL_TRANSFORM_FEEDBACK_VARYING; } /* Get name length of a program resource. This consists of @@ -930,10 +914,10 @@ return RESOURCE_ATC(res)->StageReferences[stage]; if (res->Type == GL_UNIFORM_BLOCK) - return shProg->UniformBlocks[index].stageref & (1 << stage); + return shProg->data->UniformBlocks[index].stageref & (1 << stage); if (res->Type == GL_SHADER_STORAGE_BLOCK) - return shProg->ShaderStorageBlocks[index].stageref & (1 << stage); + return shProg->data->ShaderStorageBlocks[index].stageref & (1 << stage); return res->StageReferences & (1 << stage); } @@ -1042,7 +1026,7 @@ unsigned idx = RESOURCE_ATC(res)->Uniforms[i]; struct gl_program_resource *uni = program_resource_find_data(shProg, - &shProg->UniformStorage[idx]); + &shProg->data->UniformStorage[idx]); assert(uni); *val++ = _mesa_program_resource_index(shProg, uni); } @@ -1057,10 +1041,10 @@ *val = RESOURCE_XFB(res)->NumVaryings; return 1; case GL_ACTIVE_VARIABLES: - int i = 0; - for ( ; i < shProg->LinkedTransformFeedback.NumVarying; i++) { - unsigned index = - shProg->LinkedTransformFeedback.Varyings[i].BufferIndex; + struct gl_transform_feedback_info *linked_xfb = + shProg->xfb_program->sh.LinkedTransformFeedback; + for (int i = 0; i < linked_xfb->NumVarying; i++) { + unsigned index = linked_xfb->Varyings[i].BufferIndex; struct gl_program_resource *buf_res = _mesa_program_resource_find_index(shProg, GL_TRANSFORM_FEEDBACK_BUFFER, @@ -1264,7 +1248,7 @@ return 1; case GL_COMPATIBLE_SUBROUTINES: { const struct gl_uniform_storage *uni; - struct gl_shader *sh; + struct gl_program *p; unsigned count, i; int j; @@ -1277,10 +1261,10 @@ goto invalid_operation; uni = RESOURCE_UNI(res); - sh = shProg->_LinkedShaders[_mesa_shader_stage_from_subroutine_uniform(res->Type)]; + p = shProg->_LinkedShaders[_mesa_shader_stage_from_subroutine_uniform(res->Type)]->Program; count = 0; - for (i = 0; i < sh->NumSubroutineFunctions; i++) { - struct gl_subroutine_function *fn = &sh->SubroutineFunctions[i]; + for (i = 0; i < p->sh.NumSubroutineFunctions; i++) { + struct gl_subroutine_function *fn = &p->sh.SubroutineFunctions[i]; for (j = 0; j < fn->num_compat_types; j++) { if (fn->types[j] == uni->type) { val[count++] = i; @@ -1400,9 +1384,6 @@ bool valid = true; - void *name_buffer = NULL; - size_t name_buffer_size = 0; - gl_shader_variable const **outputs = (gl_shader_variable const **) calloc(producer->NumProgramResourceList, sizeof(gl_shader_variable *)); @@ -1474,52 +1455,11 @@ } } } else { - char *consumer_name = consumer_var->name; - - if (nonarray_stage_to_array_stage && - consumer_var->interface_type != NULL && - consumer_var->interface_type->is_array() && - !is_gl_identifier(consumer_var->name)) { - const size_t name_len = strlen(consumer_var->name); - - if (name_len >= name_buffer_size) { - free(name_buffer); - - name_buffer_size = name_len + 1; - name_buffer = malloc(name_buffer_size); - if (name_buffer == NULL) { - valid = false; - goto out; - } - } - - consumer_name = (char *) name_buffer; - - char *s = strchr(consumer_var->name, '['); - if (s == NULL) { - valid = false; - goto out; - } - - char *t = strchr(s, ']'); - if (t == NULL) { - valid = false; - goto out; - } - - assert(t[1] == '.' || t[1] == '['); - - const ptrdiff_t base_name_len = s - consumer_var->name; - - memcpy(consumer_name, consumer_var->name, base_name_len); - strcpy(consumer_name + base_name_len, t + 1); - } - for (unsigned j = 0; j < num_outputs; j++) { const gl_shader_variable *const var = outputs[j]; if (!var->explicit_location && - strcmp(consumer_name, var->name) == 0) { + strcmp(consumer_var->name, var->name) == 0) { producer_var = var; match_index = j; break; @@ -1582,21 +1522,29 @@ * find the producer variable that goes with the consumer variable. */ if (nonarray_stage_to_array_stage) { - if (!consumer_var->type->is_array() || - consumer_var->type->fields.array != producer_var->type) { - valid = false; - goto out; - } - if (consumer_var->interface_type != NULL) { + /* the interface is the array; underlying types should match */ + if (producer_var->type != consumer_var->type) { + valid = false; + goto out; + } + if (!consumer_var->interface_type->is_array() || consumer_var->interface_type->fields.array != producer_var->interface_type) { valid = false; goto out; } - } else if (producer_var->interface_type != NULL) { - valid = false; - goto out; + } else { + if (producer_var->interface_type != NULL) { + valid = false; + goto out; + } + + if (!consumer_var->type->is_array() || + consumer_var->type->fields.array != producer_var->type) { + valid = false; + goto out; + } } } else { if (producer_var->type != consumer_var->type) { @@ -1627,7 +1575,6 @@ } out: - free(name_buffer); free(outputs); return valid && num_outputs == 0; } diff -Nru mesa-12.0.6/src/mesa/main/shared.c mesa-17.0.7/src/mesa/main/shared.c --- mesa-12.0.6/src/mesa/main/shared.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/shared.c 2017-06-01 10:37:10.000000000 +0000 @@ -70,11 +70,9 @@ shared->Programs = _mesa_NewHashTable(); shared->DefaultVertexProgram = - gl_vertex_program(ctx->Driver.NewProgram(ctx, - GL_VERTEX_PROGRAM_ARB, 0)); + ctx->Driver.NewProgram(ctx, GL_VERTEX_PROGRAM_ARB, 0, true); shared->DefaultFragmentProgram = - gl_fragment_program(ctx->Driver.NewProgram(ctx, - GL_FRAGMENT_PROGRAM_ARB, 0)); + ctx->Driver.NewProgram(ctx, GL_FRAGMENT_PROGRAM_ARB, 0, true); shared->ATIShaders = _mesa_NewHashTable(); shared->DefaultFragmentShader = _mesa_new_ati_fragment_shader(ctx, 0); @@ -332,8 +330,8 @@ _mesa_HashDeleteAll(shared->Programs, delete_program_cb, ctx); _mesa_DeleteHashTable(shared->Programs); - _mesa_reference_vertprog(ctx, &shared->DefaultVertexProgram, NULL); - _mesa_reference_fragprog(ctx, &shared->DefaultFragmentProgram, NULL); + _mesa_reference_program(ctx, &shared->DefaultVertexProgram, NULL); + _mesa_reference_program(ctx, &shared->DefaultFragmentProgram, NULL); _mesa_HashDeleteAll(shared->ATIShaders, delete_fragshader_cb, ctx); _mesa_DeleteHashTable(shared->ATIShaders); diff -Nru mesa-12.0.6/src/mesa/main/state.c mesa-17.0.7/src/mesa/main/state.c --- mesa-12.0.6/src/mesa/main/state.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/state.c 2017-06-01 10:37:10.000000000 +0000 @@ -70,9 +70,9 @@ * GLSL shaders not relevant here. */ ctx->VertexProgram._Enabled = ctx->VertexProgram.Enabled - && ctx->VertexProgram.Current->Base.Instructions; + && ctx->VertexProgram.Current->arb.Instructions; ctx->FragmentProgram._Enabled = ctx->FragmentProgram.Enabled - && ctx->FragmentProgram.Current->Base.Instructions; + && ctx->FragmentProgram.Current->arb.Instructions; ctx->ATIFragmentShader._Enabled = ctx->ATIFragmentShader.Enabled && ctx->ATIFragmentShader.Current->Instructions[0]; } @@ -107,12 +107,12 @@ ctx->_Shader->CurrentProgram[MESA_SHADER_FRAGMENT]; const struct gl_shader_program *csProg = ctx->_Shader->CurrentProgram[MESA_SHADER_COMPUTE]; - const struct gl_vertex_program *prevVP = ctx->VertexProgram._Current; - const struct gl_fragment_program *prevFP = ctx->FragmentProgram._Current; - const struct gl_geometry_program *prevGP = ctx->GeometryProgram._Current; - const struct gl_tess_ctrl_program *prevTCP = ctx->TessCtrlProgram._Current; - const struct gl_tess_eval_program *prevTEP = ctx->TessEvalProgram._Current; - const struct gl_compute_program *prevCP = ctx->ComputeProgram._Current; + const struct gl_program *prevVP = ctx->VertexProgram._Current; + const struct gl_program *prevFP = ctx->FragmentProgram._Current; + const struct gl_program *prevGP = ctx->GeometryProgram._Current; + const struct gl_program *prevTCP = ctx->TessCtrlProgram._Current; + const struct gl_program *prevTEP = ctx->TessEvalProgram._Current; + const struct gl_program *prevCP = ctx->ComputeProgram._Current; GLbitfield new_state = 0x0; /* @@ -132,126 +132,120 @@ * come up, or matter. */ - if (fsProg && fsProg->LinkStatus + if (fsProg && fsProg->data->LinkStatus && fsProg->_LinkedShaders[MESA_SHADER_FRAGMENT]) { /* Use GLSL fragment shader */ - _mesa_reference_shader_program(ctx, - &ctx->_Shader->_CurrentFragmentProgram, - fsProg); - _mesa_reference_fragprog(ctx, &ctx->FragmentProgram._Current, - gl_fragment_program(fsProg->_LinkedShaders[MESA_SHADER_FRAGMENT]->Program)); - _mesa_reference_fragprog(ctx, &ctx->FragmentProgram._TexEnvProgram, - NULL); + _mesa_reference_program(ctx, &ctx->_Shader->_CurrentFragmentProgram, + fsProg->_LinkedShaders[MESA_SHADER_FRAGMENT]->Program); + _mesa_reference_program(ctx, &ctx->FragmentProgram._Current, + fsProg->_LinkedShaders[MESA_SHADER_FRAGMENT]->Program); + _mesa_reference_program(ctx, &ctx->FragmentProgram._TexEnvProgram, + NULL); } else if (ctx->FragmentProgram._Enabled) { /* Use user-defined fragment program */ - _mesa_reference_shader_program(ctx, - &ctx->_Shader->_CurrentFragmentProgram, - NULL); - _mesa_reference_fragprog(ctx, &ctx->FragmentProgram._Current, - ctx->FragmentProgram.Current); - _mesa_reference_fragprog(ctx, &ctx->FragmentProgram._TexEnvProgram, - NULL); + _mesa_reference_program(ctx, &ctx->_Shader->_CurrentFragmentProgram, + NULL); + _mesa_reference_program(ctx, &ctx->FragmentProgram._Current, + ctx->FragmentProgram.Current); + _mesa_reference_program(ctx, &ctx->FragmentProgram._TexEnvProgram, + NULL); } else if (ctx->ATIFragmentShader._Enabled && ctx->ATIFragmentShader.Current->Program) { /* Use the enabled ATI fragment shader's associated program */ - _mesa_reference_shader_program(ctx, - &ctx->_Shader->_CurrentFragmentProgram, - NULL); - _mesa_reference_fragprog(ctx, &ctx->FragmentProgram._Current, - gl_fragment_program(ctx->ATIFragmentShader.Current->Program)); - _mesa_reference_fragprog(ctx, &ctx->FragmentProgram._TexEnvProgram, - NULL); + _mesa_reference_program(ctx, &ctx->_Shader->_CurrentFragmentProgram, + NULL); + _mesa_reference_program(ctx, &ctx->FragmentProgram._Current, + ctx->ATIFragmentShader.Current->Program); + _mesa_reference_program(ctx, &ctx->FragmentProgram._TexEnvProgram, + NULL); } else if (ctx->FragmentProgram._MaintainTexEnvProgram) { /* Use fragment program generated from fixed-function state */ struct gl_shader_program *f = _mesa_get_fixed_func_fragment_program(ctx); - _mesa_reference_shader_program(ctx, - &ctx->_Shader->_CurrentFragmentProgram, - f); - _mesa_reference_fragprog(ctx, &ctx->FragmentProgram._Current, - gl_fragment_program(f->_LinkedShaders[MESA_SHADER_FRAGMENT]->Program)); - _mesa_reference_fragprog(ctx, &ctx->FragmentProgram._TexEnvProgram, - gl_fragment_program(f->_LinkedShaders[MESA_SHADER_FRAGMENT]->Program)); + _mesa_reference_program(ctx, &ctx->_Shader->_CurrentFragmentProgram, + f->_LinkedShaders[MESA_SHADER_FRAGMENT]->Program); + _mesa_reference_program(ctx, &ctx->FragmentProgram._Current, + f->_LinkedShaders[MESA_SHADER_FRAGMENT]->Program); + _mesa_reference_program(ctx, &ctx->FragmentProgram._TexEnvProgram, + f->_LinkedShaders[MESA_SHADER_FRAGMENT]->Program); } else { /* No fragment program */ - _mesa_reference_fragprog(ctx, &ctx->FragmentProgram._Current, NULL); - _mesa_reference_fragprog(ctx, &ctx->FragmentProgram._TexEnvProgram, - NULL); + _mesa_reference_program(ctx, &ctx->FragmentProgram._Current, NULL); + _mesa_reference_program(ctx, &ctx->FragmentProgram._TexEnvProgram, + NULL); } - if (gsProg && gsProg->LinkStatus + if (gsProg && gsProg->data->LinkStatus && gsProg->_LinkedShaders[MESA_SHADER_GEOMETRY]) { /* Use GLSL geometry shader */ - _mesa_reference_geomprog(ctx, &ctx->GeometryProgram._Current, - gl_geometry_program(gsProg->_LinkedShaders[MESA_SHADER_GEOMETRY]->Program)); + _mesa_reference_program(ctx, &ctx->GeometryProgram._Current, + gsProg->_LinkedShaders[MESA_SHADER_GEOMETRY]->Program); } else { /* No geometry program */ - _mesa_reference_geomprog(ctx, &ctx->GeometryProgram._Current, NULL); + _mesa_reference_program(ctx, &ctx->GeometryProgram._Current, NULL); } - if (tesProg && tesProg->LinkStatus + if (tesProg && tesProg->data->LinkStatus && tesProg->_LinkedShaders[MESA_SHADER_TESS_EVAL]) { /* Use GLSL tessellation evaluation shader */ - _mesa_reference_tesseprog(ctx, &ctx->TessEvalProgram._Current, - gl_tess_eval_program( - tesProg->_LinkedShaders[MESA_SHADER_TESS_EVAL]->Program)); + _mesa_reference_program(ctx, &ctx->TessEvalProgram._Current, + tesProg->_LinkedShaders[MESA_SHADER_TESS_EVAL]->Program); } else { /* No tessellation evaluation program */ - _mesa_reference_tesseprog(ctx, &ctx->TessEvalProgram._Current, NULL); + _mesa_reference_program(ctx, &ctx->TessEvalProgram._Current, NULL); } - if (tcsProg && tcsProg->LinkStatus + if (tcsProg && tcsProg->data->LinkStatus && tcsProg->_LinkedShaders[MESA_SHADER_TESS_CTRL]) { /* Use GLSL tessellation control shader */ - _mesa_reference_tesscprog(ctx, &ctx->TessCtrlProgram._Current, - gl_tess_ctrl_program( - tcsProg->_LinkedShaders[MESA_SHADER_TESS_CTRL]->Program)); + _mesa_reference_program(ctx, &ctx->TessCtrlProgram._Current, + tcsProg->_LinkedShaders[MESA_SHADER_TESS_CTRL]->Program); } else { /* No tessellation control program */ - _mesa_reference_tesscprog(ctx, &ctx->TessCtrlProgram._Current, NULL); + _mesa_reference_program(ctx, &ctx->TessCtrlProgram._Current, NULL); } /* Examine vertex program after fragment program as * _mesa_get_fixed_func_vertex_program() needs to know active * fragprog inputs. */ - if (vsProg && vsProg->LinkStatus + if (vsProg && vsProg->data->LinkStatus && vsProg->_LinkedShaders[MESA_SHADER_VERTEX]) { /* Use GLSL vertex shader */ - _mesa_reference_vertprog(ctx, &ctx->VertexProgram._Current, - gl_vertex_program(vsProg->_LinkedShaders[MESA_SHADER_VERTEX]->Program)); + _mesa_reference_program(ctx, &ctx->VertexProgram._Current, + vsProg->_LinkedShaders[MESA_SHADER_VERTEX]->Program); } else if (ctx->VertexProgram._Enabled) { /* Use user-defined vertex program */ - _mesa_reference_vertprog(ctx, &ctx->VertexProgram._Current, - ctx->VertexProgram.Current); + _mesa_reference_program(ctx, &ctx->VertexProgram._Current, + ctx->VertexProgram.Current); } else if (ctx->VertexProgram._MaintainTnlProgram) { /* Use vertex program generated from fixed-function state */ - _mesa_reference_vertprog(ctx, &ctx->VertexProgram._Current, - _mesa_get_fixed_func_vertex_program(ctx)); - _mesa_reference_vertprog(ctx, &ctx->VertexProgram._TnlProgram, - ctx->VertexProgram._Current); + _mesa_reference_program(ctx, &ctx->VertexProgram._Current, + _mesa_get_fixed_func_vertex_program(ctx)); + _mesa_reference_program(ctx, &ctx->VertexProgram._TnlProgram, + ctx->VertexProgram._Current); } else { /* no vertex program */ - _mesa_reference_vertprog(ctx, &ctx->VertexProgram._Current, NULL); + _mesa_reference_program(ctx, &ctx->VertexProgram._Current, NULL); } - if (csProg && csProg->LinkStatus + if (csProg && csProg->data->LinkStatus && csProg->_LinkedShaders[MESA_SHADER_COMPUTE]) { /* Use GLSL compute shader */ - _mesa_reference_compprog(ctx, &ctx->ComputeProgram._Current, - gl_compute_program(csProg->_LinkedShaders[MESA_SHADER_COMPUTE]->Program)); + _mesa_reference_program(ctx, &ctx->ComputeProgram._Current, + csProg->_LinkedShaders[MESA_SHADER_COMPUTE]->Program); } else { /* no compute program */ - _mesa_reference_compprog(ctx, &ctx->ComputeProgram._Current, NULL); + _mesa_reference_program(ctx, &ctx->ComputeProgram._Current, NULL); } /* Let the driver know what's happening: @@ -260,7 +254,7 @@ new_state |= _NEW_PROGRAM; if (ctx->Driver.BindProgram) { ctx->Driver.BindProgram(ctx, GL_FRAGMENT_PROGRAM_ARB, - (struct gl_program *) ctx->FragmentProgram._Current); + ctx->FragmentProgram._Current); } } @@ -268,7 +262,7 @@ new_state |= _NEW_PROGRAM; if (ctx->Driver.BindProgram) { ctx->Driver.BindProgram(ctx, GL_GEOMETRY_PROGRAM_NV, - (struct gl_program *) ctx->GeometryProgram._Current); + ctx->GeometryProgram._Current); } } @@ -276,7 +270,7 @@ new_state |= _NEW_PROGRAM; if (ctx->Driver.BindProgram) { ctx->Driver.BindProgram(ctx, GL_TESS_EVALUATION_PROGRAM_NV, - (struct gl_program *) ctx->TessEvalProgram._Current); + ctx->TessEvalProgram._Current); } } @@ -284,7 +278,7 @@ new_state |= _NEW_PROGRAM; if (ctx->Driver.BindProgram) { ctx->Driver.BindProgram(ctx, GL_TESS_CONTROL_PROGRAM_NV, - (struct gl_program *) ctx->TessCtrlProgram._Current); + ctx->TessCtrlProgram._Current); } } @@ -292,7 +286,7 @@ new_state |= _NEW_PROGRAM; if (ctx->Driver.BindProgram) { ctx->Driver.BindProgram(ctx, GL_VERTEX_PROGRAM_ARB, - (struct gl_program *) ctx->VertexProgram._Current); + ctx->VertexProgram._Current); } } @@ -300,7 +294,7 @@ new_state |= _NEW_PROGRAM; if (ctx->Driver.BindProgram) { ctx->Driver.BindProgram(ctx, GL_COMPUTE_PROGRAM_NV, - (struct gl_program *) ctx->ComputeProgram._Current); + ctx->ComputeProgram._Current); } } @@ -318,7 +312,7 @@ if (ctx->FragmentProgram._Current) { const struct gl_program_parameter_list *params = - ctx->FragmentProgram._Current->Base.Parameters; + ctx->FragmentProgram._Current->Parameters; if (params && params->StateFlags & ctx->NewState) { new_state |= _NEW_PROGRAM_CONSTANTS; } @@ -330,7 +324,7 @@ if (ctx->VertexProgram._Current) { const struct gl_program_parameter_list *params = - ctx->VertexProgram._Current->Base.Parameters; + ctx->VertexProgram._Current->Parameters; if (params && params->StateFlags & ctx->NewState) { new_state |= _NEW_PROGRAM_CONSTANTS; } diff -Nru mesa-12.0.6/src/mesa/main/state.h mesa-17.0.7/src/mesa/main/state.h --- mesa-12.0.6/src/mesa/main/state.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/state.h 2017-06-01 10:37:10.000000000 +0000 @@ -61,12 +61,12 @@ if (ctx->VertexProgram._Current && (ctx->VertexProgram._Current != ctx->VertexProgram._TnlProgram) && - (ctx->VertexProgram._Current->Base.InputsRead & VERT_BIT_COLOR1)) + (ctx->VertexProgram._Current->info.inputs_read & VERT_BIT_COLOR1)) return GL_TRUE; if (ctx->FragmentProgram._Current && (ctx->FragmentProgram._Current != ctx->FragmentProgram._TexEnvProgram) && - (ctx->FragmentProgram._Current->Base.InputsRead & VARYING_BIT_COL1)) + (ctx->FragmentProgram._Current->info.inputs_read & VARYING_BIT_COL1)) return GL_TRUE; return GL_FALSE; diff -Nru mesa-12.0.6/src/mesa/main/stencil.c mesa-17.0.7/src/mesa/main/stencil.c --- mesa-12.0.6/src/mesa/main/stencil.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/stencil.c 2017-06-01 10:37:10.000000000 +0000 @@ -109,6 +109,9 @@ { GET_CURRENT_CONTEXT(ctx); + if (MESA_VERBOSE & VERBOSE_API) + _mesa_debug(ctx, "glClearStencil(%d)\n", s); + ctx->Stencil.Clear = (GLuint) s; } diff -Nru mesa-12.0.6/src/mesa/main/syncobj.c mesa-17.0.7/src/mesa/main/syncobj.c --- mesa-12.0.6/src/mesa/main/syncobj.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/syncobj.c 2017-06-01 10:37:10.000000000 +0000 @@ -425,6 +425,14 @@ return; } + /* Section 4.1.3 (Sync Object Queries) of the OpenGL ES 3.10 spec says: + * + * "An INVALID_VALUE error is generated if bufSize is negative." + */ + if (bufSize < 0) { + _mesa_error(ctx, GL_INVALID_VALUE, "glGetSynciv(pname=0x%x)\n", pname); + } + if (size > 0 && bufSize > 0) { const GLsizei copy_count = MIN2(size, bufSize); diff -Nru mesa-12.0.6/src/mesa/main/tests/dispatch_sanity.cpp mesa-17.0.7/src/mesa/main/tests/dispatch_sanity.cpp --- mesa-12.0.6/src/mesa/main/tests/dispatch_sanity.cpp 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/tests/dispatch_sanity.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -942,6 +942,9 @@ { "glDispatchCompute", 43, -1 }, { "glDispatchComputeIndirect", 43, -1 }, + /* GL_ARB_compute_variable_group_size */ + { "glDispatchComputeGroupSizeARB", 43, -1 }, + /* GL_EXT_polygon_offset_clamp */ { "glPolygonOffsetClampEXT", 11, -1 }, @@ -952,6 +955,12 @@ /* GL_GREMEDY_string_marker */ { "glStringMarkerGREMEDY", 15, -1 }, + /* GL_EXT_window_rectangles */ + { "glWindowRectanglesEXT", 30, -1 }, + + /* GL_KHR_blend_equation_advanced */ + { "glBlendBarrierKHR", 20, -1 }, + { NULL, 0, -1 } }; @@ -1860,6 +1869,9 @@ { "glMultiDrawArraysIndirectCountARB", 31, -1 }, { "glMultiDrawElementsIndirectCountARB", 31, -1 }, + /* GL_ARB_ES3_2_compatibility */ + { "glPrimitiveBoundingBoxARB", 45, -1 }, + { NULL, 0, -1 } }; @@ -2319,6 +2331,9 @@ { "glGetnUniformivKHR", 20, -1 }, { "glGetnUniformuivKHR", 20, -1 }, + /* GL_KHR_blend_equation_advanced */ + { "glBlendBarrierKHR", 20, -1 }, + { NULL, 0, -1 } }; @@ -2494,6 +2509,9 @@ { "glDrawElementsInstancedBaseInstanceEXT", 30, -1 }, { "glDrawElementsInstancedBaseVertexBaseInstanceEXT", 30, -1 }, + /* GL_EXT_window_rectangles */ + { "glWindowRectanglesEXT", 30, -1 }, + { NULL, 0, -1 } }; @@ -2588,5 +2606,26 @@ /* GL_OES_geometry_shader */ { "glFramebufferTextureOES", 31, -1}, + /* GL_EXT_geometry_shader */ + // We check for the aliased OES version above + // { "glFramebufferTextureEXT", 31, -1}, + + /* GL_OES_tessellation_shader */ + { "glPatchParameteriOES", 31, -1 }, + + /* GL_OES_primitive_bound_box */ + { "glPrimitiveBoundingBoxOES", 31, -1 }, + + /* GL_OES_viewport_array */ + { "glViewportArrayvOES", 31, -1 }, + { "glViewportIndexedfOES", 31, -1 }, + { "glViewportIndexedfvOES", 31, -1 }, + { "glScissorArrayvOES", 31, -1 }, + { "glScissorIndexedOES", 31, -1 }, + { "glScissorIndexedvOES", 31, -1 }, + { "glDepthRangeArrayfvOES", 31, -1 }, + { "glDepthRangeIndexedfOES", 31, -1 }, + { "glGetFloati_vOES", 31, -1 }, + { NULL, 0, -1 }, }; diff -Nru mesa-12.0.6/src/mesa/main/tests/Makefile.am mesa-17.0.7/src/mesa/main/tests/Makefile.am --- mesa-12.0.6/src/mesa/main/tests/Makefile.am 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/tests/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -4,8 +4,8 @@ -I$(top_srcdir)/src/gtest/include \ -I$(top_srcdir)/src \ -I$(top_srcdir)/src/mapi \ - -I$(top_srcdir)/src/mesa \ -I$(top_builddir)/src/mesa \ + -I$(top_srcdir)/src/mesa \ -I$(top_srcdir)/include \ $(DEFINES) $(INCLUDE_DIRS) diff -Nru mesa-12.0.6/src/mesa/main/tests/Makefile.in mesa-17.0.7/src/mesa/main/tests/Makefile.in --- mesa-12.0.6/src/mesa/main/tests/Makefile.in 2017-01-24 01:41:57.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/tests/Makefile.in 2017-06-01 10:37:24.000000000 +0000 @@ -412,6 +412,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -426,6 +428,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -455,10 +458,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -508,11 +512,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -552,8 +553,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -590,8 +589,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -600,7 +597,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -608,13 +604,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -643,6 +640,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -709,8 +707,8 @@ $(PTHREAD_CFLAGS) AM_CPPFLAGS = -I$(top_srcdir)/src/gtest/include -I$(top_srcdir)/src \ - -I$(top_srcdir)/src/mapi -I$(top_srcdir)/src/mesa \ - -I$(top_builddir)/src/mesa -I$(top_srcdir)/include $(DEFINES) \ + -I$(top_srcdir)/src/mapi -I$(top_builddir)/src/mesa \ + -I$(top_srcdir)/src/mesa -I$(top_srcdir)/include $(DEFINES) \ $(INCLUDE_DIRS) $(am__append_1) main_test_SOURCES = enum_strings.cpp $(am__append_2) $(am__append_4) main_test_LDADD = $(top_builddir)/src/mesa/libmesa.la \ diff -Nru mesa-12.0.6/src/mesa/main/texcompress.c mesa-17.0.7/src/mesa/main/texcompress.c --- mesa-12.0.6/src/mesa/main/texcompress.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/texcompress.c 2017-06-01 10:37:10.000000000 +0000 @@ -358,21 +358,27 @@ } } - if (_mesa_is_gles3(ctx)) { + if (_mesa_is_gles3(ctx) || ctx->Extensions.ARB_ES3_compatibility) { if (formats) { formats[n++] = GL_COMPRESSED_RGB8_ETC2; - formats[n++] = GL_COMPRESSED_SRGB8_ETC2; formats[n++] = GL_COMPRESSED_RGBA8_ETC2_EAC; - formats[n++] = GL_COMPRESSED_SRGB8_ALPHA8_ETC2_EAC; formats[n++] = GL_COMPRESSED_R11_EAC; formats[n++] = GL_COMPRESSED_RG11_EAC; formats[n++] = GL_COMPRESSED_SIGNED_R11_EAC; formats[n++] = GL_COMPRESSED_SIGNED_RG11_EAC; formats[n++] = GL_COMPRESSED_RGB8_PUNCHTHROUGH_ALPHA1_ETC2; - formats[n++] = GL_COMPRESSED_SRGB8_PUNCHTHROUGH_ALPHA1_ETC2; + } else { + n += 7; } - else { - n += 10; + } + + if (_mesa_is_gles3(ctx)) { + if (formats) { + formats[n++] = GL_COMPRESSED_SRGB8_ETC2; + formats[n++] = GL_COMPRESSED_SRGB8_ALPHA8_ETC2_EAC; + formats[n++] = GL_COMPRESSED_SRGB8_PUNCHTHROUGH_ALPHA1_ETC2; + } else { + n += 3; } } diff -Nru mesa-12.0.6/src/mesa/main/texcompress_etc.c mesa-17.0.7/src/mesa/main/texcompress_etc.c --- mesa-12.0.6/src/mesa/main/texcompress_etc.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/texcompress_etc.c 2017-06-01 10:37:10.000000000 +0000 @@ -458,10 +458,10 @@ /* Use same modifier tables as for etc1 textures if opaque bit is set * or if non punchthrough texture format */ - block->modifier_tables[0] = (block->opaque || !punchthrough_alpha) ? + block->modifier_tables[0] = (!punchthrough_alpha || block->opaque) ? etc1_modifier_tables[table1_idx] : etc2_modifier_tables_non_opaque[table1_idx]; - block->modifier_tables[1] = (block->opaque || !punchthrough_alpha) ? + block->modifier_tables[1] = (!punchthrough_alpha || block->opaque) ? etc1_modifier_tables[table2_idx] : etc2_modifier_tables_non_opaque[table2_idx]; diff -Nru mesa-12.0.6/src/mesa/main/texcompress_fxt1.c mesa-17.0.7/src/mesa/main/texcompress_fxt1.c --- mesa-12.0.6/src/mesa/main/texcompress_fxt1.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/texcompress_fxt1.c 2017-06-01 10:37:10.000000000 +0000 @@ -177,8 +177,8 @@ #define LL_RMS_D 10 /* fault tolerance (maximum delta) */ #define LL_RMS_E 255 /* fault tolerance (maximum error) */ #define ALPHA_TS 2 /* alpha threshold: (255 - ALPHA_TS) deemed opaque */ -#define ISTBLACK(v) (*((GLuint *)(v)) == 0) - +static const GLuint zero = 0; +#define ISTBLACK(v) (memcmp(&(v), &zero, sizeof(zero)) == 0) /* * Define a 64-bit unsigned integer type and macros diff -Nru mesa-12.0.6/src/mesa/main/texcompress_s3tc.c mesa-17.0.7/src/mesa/main/texcompress_s3tc.c --- mesa-12.0.6/src/mesa/main/texcompress_s3tc.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/texcompress_s3tc.c 2017-06-01 10:37:10.000000000 +0000 @@ -46,6 +46,8 @@ #define DXTN_LIBNAME "dxtn.dll" #define RTLD_LAZY 0 #define RTLD_GLOBAL 0 +#elif defined(__CYGWIN__) +#define DXTN_LIBNAME "cygtxc_dxtn.dll" #else #define DXTN_LIBNAME "libtxc_dxtn.so" #endif diff -Nru mesa-12.0.6/src/mesa/main/texenv.c mesa-17.0.7/src/mesa/main/texenv.c --- mesa-12.0.6/src/mesa/main/texenv.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/texenv.c 2017-06-01 10:37:10.000000000 +0000 @@ -460,20 +460,22 @@ return; } if (pname == GL_COORD_REPLACE_NV) { - if (iparam0 == GL_TRUE || iparam0 == GL_FALSE) { - /* It's kind of weird to set point state via glTexEnv, - * but that's what the spec calls for. - */ - const GLboolean state = (GLboolean) iparam0; - if (ctx->Point.CoordReplace[ctx->Texture.CurrentUnit] == state) + /* It's kind of weird to set point state via glTexEnv, + * but that's what the spec calls for. + */ + if (iparam0 == GL_TRUE) { + if (ctx->Point.CoordReplace & (1u << ctx->Texture.CurrentUnit)) return; - FLUSH_VERTICES(ctx, _NEW_POINT); - ctx->Point.CoordReplace[ctx->Texture.CurrentUnit] = state; - } - else { + ctx->Point.CoordReplace |= (1u << ctx->Texture.CurrentUnit); + } else if (iparam0 == GL_FALSE) { + if (~(ctx->Point.CoordReplace) & (1u << ctx->Texture.CurrentUnit)) + return; + ctx->Point.CoordReplace &= ~(1u << ctx->Texture.CurrentUnit); + } else { _mesa_error( ctx, GL_INVALID_VALUE, "glTexEnv(param=0x%x)", iparam0); return; } + FLUSH_VERTICES(ctx, _NEW_POINT); } else { _mesa_error( ctx, GL_INVALID_ENUM, "glTexEnv(pname=0x%x)", pname ); @@ -675,7 +677,10 @@ return; } if (pname == GL_COORD_REPLACE_NV) { - *params = (GLfloat) ctx->Point.CoordReplace[ctx->Texture.CurrentUnit]; + if (ctx->Point.CoordReplace & (1u << ctx->Texture.CurrentUnit)) + *params = 1.0f; + else + *params = 0.0f; } else { _mesa_error( ctx, GL_INVALID_ENUM, "glGetTexEnvfv(pname)" ); @@ -736,7 +741,10 @@ return; } if (pname == GL_COORD_REPLACE_NV) { - *params = (GLint) ctx->Point.CoordReplace[ctx->Texture.CurrentUnit]; + if (ctx->Point.CoordReplace & (1u << ctx->Texture.CurrentUnit)) + *params = GL_TRUE; + else + *params = GL_FALSE; } else { _mesa_error( ctx, GL_INVALID_ENUM, "glGetTexEnviv(pname)" ); diff -Nru mesa-12.0.6/src/mesa/main/texformat.c mesa-17.0.7/src/mesa/main/texformat.c --- mesa-12.0.6/src/mesa/main/texformat.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/texformat.c 2017-06-01 10:37:10.000000000 +0000 @@ -74,6 +74,8 @@ RETURN_IF_SUPPORTED(MESA_FORMAT_B4G4R4A4_UNORM); } else if (type == GL_UNSIGNED_SHORT_1_5_5_5_REV) { RETURN_IF_SUPPORTED(MESA_FORMAT_B5G5R5A1_UNORM); + } else if (type == GL_UNSIGNED_SHORT_5_5_5_1) { + RETURN_IF_SUPPORTED(MESA_FORMAT_B5G5R5A1_UNORM); } else if (type == GL_UNSIGNED_INT_2_10_10_10_REV) { RETURN_IF_SUPPORTED(MESA_FORMAT_B10G10R10A2_UNORM); } diff -Nru mesa-12.0.6/src/mesa/main/texgetimage.c mesa-17.0.7/src/mesa/main/texgetimage.c --- mesa-12.0.6/src/mesa/main/texgetimage.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/texgetimage.c 2017-06-01 10:37:10.000000000 +0000 @@ -265,6 +265,40 @@ } } +/** + * Depending on the base format involved we may need to apply a rebase + * transform (for example: if we download to a Luminance format we want + * G=0 and B=0). + */ +static bool +teximage_needs_rebase(mesa_format texFormat, GLenum baseFormat, + bool is_compressed, uint8_t *rebaseSwizzle) +{ + bool needsRebase = false; + + if (baseFormat == GL_LUMINANCE || + baseFormat == GL_INTENSITY) { + needsRebase = true; + rebaseSwizzle[0] = MESA_FORMAT_SWIZZLE_X; + rebaseSwizzle[1] = MESA_FORMAT_SWIZZLE_ZERO; + rebaseSwizzle[2] = MESA_FORMAT_SWIZZLE_ZERO; + rebaseSwizzle[3] = MESA_FORMAT_SWIZZLE_ONE; + } else if (baseFormat == GL_LUMINANCE_ALPHA) { + needsRebase = true; + rebaseSwizzle[0] = MESA_FORMAT_SWIZZLE_X; + rebaseSwizzle[1] = MESA_FORMAT_SWIZZLE_ZERO; + rebaseSwizzle[2] = MESA_FORMAT_SWIZZLE_ZERO; + rebaseSwizzle[3] = MESA_FORMAT_SWIZZLE_W; + } else if (!is_compressed && + (baseFormat != _mesa_get_format_base_format(texFormat))) { + needsRebase = + _mesa_compute_rgba2base2rgba_component_mapping(baseFormat, + rebaseSwizzle); + } + + return needsRebase; +} + /** * Get a color texture image with decompression. @@ -319,26 +353,8 @@ } } - /* Depending on the base format involved we may need to apply a rebase - * transform (for example: if we download to a Luminance format we want - * G=0 and B=0). - */ - if (baseFormat == GL_LUMINANCE || - baseFormat == GL_INTENSITY) { - needsRebase = true; - rebaseSwizzle[0] = MESA_FORMAT_SWIZZLE_X; - rebaseSwizzle[1] = MESA_FORMAT_SWIZZLE_ZERO; - rebaseSwizzle[2] = MESA_FORMAT_SWIZZLE_ZERO; - rebaseSwizzle[3] = MESA_FORMAT_SWIZZLE_ONE; - } else if (baseFormat == GL_LUMINANCE_ALPHA) { - needsRebase = true; - rebaseSwizzle[0] = MESA_FORMAT_SWIZZLE_X; - rebaseSwizzle[1] = MESA_FORMAT_SWIZZLE_ZERO; - rebaseSwizzle[2] = MESA_FORMAT_SWIZZLE_ZERO; - rebaseSwizzle[3] = MESA_FORMAT_SWIZZLE_W; - } else { - needsRebase = false; - } + needsRebase = teximage_needs_rebase(texFormat, baseFormat, true, + rebaseSwizzle); srcStride = 4 * width * sizeof(GLfloat); dstStride = _mesa_image_row_stride(&ctx->Pack, width, format, type); @@ -423,31 +439,8 @@ bool needsRebase; void *rgba = NULL; - /* Depending on the base format involved we may need to apply a rebase - * transform (for example: if we download to a Luminance format we want - * G=0 and B=0). - */ - if (texImage->_BaseFormat == GL_LUMINANCE || - texImage->_BaseFormat == GL_INTENSITY) { - needsRebase = true; - rebaseSwizzle[0] = MESA_FORMAT_SWIZZLE_X; - rebaseSwizzle[1] = MESA_FORMAT_SWIZZLE_ZERO; - rebaseSwizzle[2] = MESA_FORMAT_SWIZZLE_ZERO; - rebaseSwizzle[3] = MESA_FORMAT_SWIZZLE_ONE; - } else if (texImage->_BaseFormat == GL_LUMINANCE_ALPHA) { - needsRebase = true; - rebaseSwizzle[0] = MESA_FORMAT_SWIZZLE_X; - rebaseSwizzle[1] = MESA_FORMAT_SWIZZLE_ZERO; - rebaseSwizzle[2] = MESA_FORMAT_SWIZZLE_ZERO; - rebaseSwizzle[3] = MESA_FORMAT_SWIZZLE_W; - } else if (texImage->_BaseFormat != - _mesa_get_format_base_format(texFormat)) { - needsRebase = - _mesa_compute_rgba2base2rgba_component_mapping(texImage->_BaseFormat, - rebaseSwizzle); - } else { - needsRebase = false; - } + needsRebase = teximage_needs_rebase(texFormat, texImage->_BaseFormat, false, + rebaseSwizzle); /* Describe the dst format */ dst_is_integer = _mesa_is_enum_format_integer(format); @@ -661,7 +654,7 @@ if (src) { if (bytesPerRow == dstRowStride && bytesPerRow == srcRowStride) { - memcpy(dst, src, bytesPerRow * texImage->Height); + memcpy(dst, src, bytesPerRow * height); } else { GLuint row; @@ -1436,6 +1429,11 @@ return; } + if (!legal_getteximage_target(ctx, texObj->Target, true)) { + _mesa_error(ctx, GL_INVALID_ENUM, "%s", caller); + return; + } + get_texture_image_dims(texObj, texObj->Target, level, &width, &height, &depth); diff -Nru mesa-12.0.6/src/mesa/main/teximage.c mesa-17.0.7/src/mesa/main/teximage.c --- mesa-12.0.6/src/mesa/main/teximage.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/teximage.c 2017-06-01 10:37:10.000000000 +0000 @@ -40,6 +40,7 @@ #include "image.h" #include "imports.h" #include "macros.h" +#include "mipmap.h" #include "multisample.h" #include "pixelstore.h" #include "state.h" @@ -501,7 +502,7 @@ ? ctx->Const.MaxTextureLevels : 0; case GL_TEXTURE_CUBE_MAP_ARRAY: case GL_PROXY_TEXTURE_CUBE_MAP_ARRAY: - return ctx->Extensions.ARB_texture_cube_map_array + return _mesa_has_texture_cube_map_array(ctx) ? ctx->Const.MaxCubeTextureLevels : 0; case GL_TEXTURE_BUFFER: return (_mesa_has_ARB_texture_buffer_object(ctx) || @@ -1102,6 +1103,32 @@ } } +static bool +error_check_subtexture_negative_dimensions(struct gl_context *ctx, + GLuint dims, + GLsizei subWidth, + GLsizei subHeight, + GLsizei subDepth, + const char *func) +{ + /* Check size */ + if (subWidth < 0) { + _mesa_error(ctx, GL_INVALID_VALUE, "%s(width=%d)", func, subWidth); + return true; + } + + if (dims > 1 && subHeight < 0) { + _mesa_error(ctx, GL_INVALID_VALUE, "%s(height=%d)", func, subHeight); + return true; + } + + if (dims > 2 && subDepth < 0) { + _mesa_error(ctx, GL_INVALID_VALUE, "%s(depth=%d)", func, subDepth); + return true; + } + + return false; +} /** * Do error checking of xoffset, yoffset, zoffset, width, height and depth @@ -1119,25 +1146,6 @@ const GLenum target = destImage->TexObject->Target; GLuint bw, bh, bd; - /* Check size */ - if (subWidth < 0) { - _mesa_error(ctx, GL_INVALID_VALUE, - "%s(width=%d)", func, subWidth); - return GL_TRUE; - } - - if (dims > 1 && subHeight < 0) { - _mesa_error(ctx, GL_INVALID_VALUE, - "%s(height=%d)", func, subHeight); - return GL_TRUE; - } - - if (dims > 2 && subDepth < 0) { - _mesa_error(ctx, GL_INVALID_VALUE, - "%s(depth=%d)", func, subDepth); - return GL_TRUE; - } - /* check xoffset and width */ if (xoffset < - (GLint) destImage->Border) { _mesa_error(ctx, GL_INVALID_VALUE, "%s(xoffset)", func); @@ -1246,25 +1254,63 @@ * and texturing will effectively be disabled. * * \param target any texture target/type + * \param numLevels number of mipmap levels in the texture or 0 if not known * \param level as passed to glTexImage * \param format the MESA_FORMAT_x for the tex image + * \param numSamples number of samples per texel * \param width as passed to glTexImage * \param height as passed to glTexImage * \param depth as passed to glTexImage - * \param border as passed to glTexImage * \return GL_TRUE if the image is acceptable, GL_FALSE if not acceptable. */ GLboolean -_mesa_test_proxy_teximage(struct gl_context *ctx, GLenum target, GLint level, - mesa_format format, - GLint width, GLint height, GLint depth, GLint border) -{ +_mesa_test_proxy_teximage(struct gl_context *ctx, GLenum target, + GLuint numLevels, GLint level, + mesa_format format, GLuint numSamples, + GLint width, GLint height, GLint depth) +{ + uint64_t bytes, mbytes; + + if (numLevels > 0) { + /* Compute total memory for a whole mipmap. This is the path + * taken for glTexStorage(GL_PROXY_TEXTURE_x). + */ + unsigned l; + + assert(level == 0); + + bytes = 0; + + for (l = 0; l < numLevels; l++) { + GLint nextWidth, nextHeight, nextDepth; + + bytes += _mesa_format_image_size64(format, width, height, depth); + + if (_mesa_next_mipmap_level_size(target, 0, width, height, depth, + &nextWidth, &nextHeight, + &nextDepth)) { + width = nextWidth; + height = nextHeight; + depth = nextDepth; + } else { + break; + } + } + } else { + /* We just compute the size of one mipmap level. This is the path + * taken for glTexImage(GL_PROXY_TEXTURE_x). + */ + bytes = _mesa_format_image_size64(format, width, height, depth); + } + + bytes *= _mesa_num_tex_faces(target); + bytes *= MAX2(1, numSamples); + + mbytes = bytes / (1024 * 1024); /* convert to MB */ + /* We just check if the image size is less than MaxTextureMbytes. * Some drivers may do more specific checks. */ - uint64_t bytes = _mesa_format_image_size64(format, width, height, depth); - uint64_t mbytes = bytes / (1024 * 1024); /* convert to MB */ - mbytes *= _mesa_num_tex_faces(target); return mbytes <= (uint64_t) ctx->Const.MaxTextureMbytes; } @@ -1387,7 +1433,7 @@ */ if (layout == MESA_FORMAT_LAYOUT_ETC2 && _mesa_is_gles3(ctx)) return write_error(error, GL_INVALID_OPERATION); - target_can_be_compresed = ctx->Extensions.ARB_texture_cube_map_array; + target_can_be_compresed = _mesa_has_texture_cube_map_array(ctx); break; case GL_TEXTURE_3D: switch (layout) { @@ -1401,11 +1447,12 @@ break; case MESA_FORMAT_LAYOUT_ASTC: target_can_be_compresed = - ctx->Extensions.KHR_texture_compression_astc_hdr; + ctx->Extensions.KHR_texture_compression_astc_hdr || + ctx->Extensions.KHR_texture_compression_astc_sliced_3d; /* Throw an INVALID_OPERATION error if the target is TEXTURE_3D and - * and the hdr extension is not supported. - * See comment in switch case GL_TEXTURE_CUBE_MAP_ARRAY for more info. + * neither of the above extensions are supported. See comment in + * switch case GL_TEXTURE_CUBE_MAP_ARRAY for more info. */ if (!target_can_be_compresed) return write_error(error, GL_INVALID_OPERATION); @@ -1476,7 +1523,7 @@ return _mesa_is_desktop_gl(ctx) && ctx->Extensions.EXT_texture_array; case GL_TEXTURE_CUBE_MAP_ARRAY: case GL_PROXY_TEXTURE_CUBE_MAP_ARRAY: - return ctx->Extensions.ARB_texture_cube_map_array; + return _mesa_has_texture_cube_map_array(ctx); default: return GL_FALSE; } @@ -1528,7 +1575,7 @@ || _mesa_is_gles3(ctx); case GL_TEXTURE_CUBE_MAP_ARRAY: case GL_PROXY_TEXTURE_CUBE_MAP_ARRAY: - return ctx->Extensions.ARB_texture_cube_map_array; + return _mesa_has_texture_cube_map_array(ctx); /* Table 8.15 of the OpenGL 4.5 core profile spec * (20141030) says that TEXTURE_CUBE_MAP is valid for TextureSubImage3D @@ -1626,7 +1673,7 @@ || (ctx->API == API_OPENGLES2 && ctx->Extensions.OES_depth_texture_cube_map))) && !((target == GL_TEXTURE_CUBE_MAP_ARRAY || target == GL_PROXY_TEXTURE_CUBE_MAP_ARRAY) && - ctx->Extensions.ARB_texture_cube_map_array)) { + _mesa_has_texture_cube_map_array(ctx))) { return false; } } @@ -2105,6 +2152,12 @@ return GL_TRUE; } + if (error_check_subtexture_negative_dimensions(ctx, dimensions, + width, height, depth, + callerName)) { + return GL_TRUE; + } + texImage = _mesa_select_tex_image(texObj, target, level); if (!texImage) { /* non-existant texture level */ @@ -2498,6 +2551,11 @@ return GL_TRUE; } + if (error_check_subtexture_negative_dimensions(ctx, dimensions, + width, height, 1, caller)) { + return GL_TRUE; + } + if (error_check_subtexture_dimensions(ctx, dimensions, texImage, xoffset, yoffset, zoffset, width, height, 1, caller)) { @@ -2931,8 +2989,8 @@ /* check that the texture won't take too much memory, etc */ sizeOK = ctx->Driver.TestProxyTexImage(ctx, proxy_target(target), - level, texFormat, - width, height, depth, border); + 0, level, texFormat, 1, + width, height, depth); if (_mesa_is_proxy_texture(target)) { /* Proxy texture: just clear or set state depending on error checking */ @@ -3513,8 +3571,15 @@ return GL_FALSE; } + +/** + * Check if the given texture format and size arguments match those + * of the texture image. + * \param return true if arguments match, false otherwise. + */ static bool -can_avoid_reallocation(struct gl_texture_image *texImage, GLenum internalFormat, +can_avoid_reallocation(const struct gl_texture_image *texImage, + GLenum internalFormat, mesa_format texFormat, GLint x, GLint y, GLsizei width, GLsizei height, GLint border) { @@ -3628,8 +3693,8 @@ assert(texFormat != MESA_FORMAT_NONE); if (!ctx->Driver.TestProxyTexImage(ctx, proxy_target(target), - level, texFormat, - width, height, 1, border)) { + 0, level, texFormat, 1, + width, height, 1)) { _mesa_error(ctx, GL_OUT_OF_MEMORY, "glCopyTexImage%uD(image too large)", dims); return; @@ -4259,7 +4324,7 @@ (_mesa_is_desktop_gl(ctx) && ctx->Extensions.EXT_texture_array); break; case GL_TEXTURE_CUBE_MAP_ARRAY: - targetOK = ctx->Extensions.ARB_texture_cube_map_array; + targetOK = _mesa_has_texture_cube_map_array(ctx); break; case GL_TEXTURE_3D: targetOK = GL_TRUE; @@ -4394,6 +4459,12 @@ return GL_TRUE; } + if (error_check_subtexture_negative_dimensions(ctx, dims, + width, height, depth, + callerName)) { + return GL_TRUE; + } + if (error_check_subtexture_dimensions(ctx, dims, texImage, xoffset, yoffset, zoffset, width, height, depth, @@ -4963,14 +5034,20 @@ } -void -_mesa_texture_buffer_range(struct gl_context *ctx, - struct gl_texture_object *texObj, - GLenum internalFormat, - struct gl_buffer_object *bufObj, - GLintptr offset, GLsizeiptr size, - const char *caller) +/** + * Do work common to glTexBuffer, glTexBufferRange, glTextureBuffer + * and glTextureBufferRange, including some error checking. + */ +static void +texture_buffer_range(struct gl_context *ctx, + struct gl_texture_object *texObj, + GLenum internalFormat, + struct gl_buffer_object *bufObj, + GLintptr offset, GLsizeiptr size, + const char *caller) { + GLintptr oldOffset = texObj->BufferOffset; + GLsizeiptr oldSize = texObj->BufferSize; mesa_format format; /* NOTE: ARB_texture_buffer_object has interactions with @@ -5003,6 +5080,15 @@ } _mesa_unlock_texture(ctx, texObj); + if (ctx->Driver.TexParameter) { + if (offset != oldOffset) { + ctx->Driver.TexParameter(ctx, texObj, GL_TEXTURE_BUFFER_OFFSET); + } + if (size != oldSize) { + ctx->Driver.TexParameter(ctx, texObj, GL_TEXTURE_BUFFER_SIZE); + } + } + ctx->NewDriverState |= ctx->DriverFlags.NewTextureBuffer; if (bufObj) { @@ -5106,8 +5192,8 @@ if (!texObj) return; - _mesa_texture_buffer_range(ctx, texObj, internalFormat, bufObj, 0, - buffer ? -1 : 0, "glTexBuffer"); + texture_buffer_range(ctx, texObj, internalFormat, bufObj, 0, + buffer ? -1 : 0, "glTexBuffer"); } @@ -5153,8 +5239,8 @@ if (!texObj) return; - _mesa_texture_buffer_range(ctx, texObj, internalFormat, bufObj, - offset, size, "glTexBufferRange"); + texture_buffer_range(ctx, texObj, internalFormat, bufObj, + offset, size, "glTexBufferRange"); } void GLAPIENTRY @@ -5180,8 +5266,8 @@ if (!check_texture_buffer_target(ctx, texObj->Target, "glTextureBuffer")) return; - _mesa_texture_buffer_range(ctx, texObj, internalFormat, - bufObj, 0, buffer ? -1 : 0, "glTextureBuffer"); + texture_buffer_range(ctx, texObj, internalFormat, + bufObj, 0, buffer ? -1 : 0, "glTextureBuffer"); } void GLAPIENTRY @@ -5225,8 +5311,8 @@ "glTextureBufferRange")) return; - _mesa_texture_buffer_range(ctx, texObj, internalFormat, - bufObj, offset, size, "glTextureBufferRange"); + texture_buffer_range(ctx, texObj, internalFormat, + bufObj, offset, size, "glTextureBufferRange"); } GLboolean @@ -5277,6 +5363,11 @@ GLenum sample_count_error; bool dsa = strstr(func, "ture") ? true : false; + if (MESA_VERBOSE & (VERBOSE_API|VERBOSE_TEXTURE)) { + _mesa_debug(ctx, "%s(target=%s, samples=%d)\n", func, + _mesa_enum_to_string(target), samples); + } + if (!((ctx->Extensions.ARB_texture_multisample && _mesa_is_desktop_gl(ctx))) && !_mesa_is_gles31(ctx)) { _mesa_error(ctx, GL_INVALID_OPERATION, "%s(unsupported)", func); @@ -5362,8 +5453,8 @@ dimensionsOK = _mesa_legal_texture_dimensions(ctx, target, 0, width, height, depth, 0); - sizeOK = ctx->Driver.TestProxyTexImage(ctx, target, 0, texFormat, - width, height, depth, 0); + sizeOK = ctx->Driver.TestProxyTexImage(ctx, target, 0, 0, texFormat, + samples, width, height, depth); if (_mesa_is_proxy_texture(target)) { if (samplesOK && dimensionsOK && sizeOK) { diff -Nru mesa-12.0.6/src/mesa/main/teximage.h mesa-17.0.7/src/mesa/main/teximage.h --- mesa-12.0.6/src/mesa/main/teximage.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/teximage.h 2017-06-01 10:37:10.000000000 +0000 @@ -176,9 +176,10 @@ extern GLboolean -_mesa_test_proxy_teximage(struct gl_context *ctx, GLenum target, GLint level, - mesa_format format, - GLint width, GLint height, GLint depth, GLint border); +_mesa_test_proxy_teximage(struct gl_context *ctx, GLenum target, + GLuint numLevels, GLint level, + mesa_format format, GLuint numSamples, + GLint width, GLint height, GLint depth); extern GLboolean _mesa_target_can_be_compressed(const struct gl_context *ctx, GLenum target, @@ -249,14 +250,6 @@ GLsizei width, GLsizei height, const char *caller); -extern void -_mesa_texture_buffer_range(struct gl_context *ctx, - struct gl_texture_object *texObj, - GLenum internalFormat, - struct gl_buffer_object *bufObj, - GLintptr offset, GLsizeiptr size, - const char *caller); - bool _mesa_is_cube_map_texture(GLenum target); diff -Nru mesa-12.0.6/src/mesa/main/texobj.c mesa-17.0.7/src/mesa/main/texobj.c --- mesa-12.0.6/src/mesa/main/texobj.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/texobj.c 2017-06-01 10:37:10.000000000 +0000 @@ -116,9 +116,10 @@ struct gl_texture_object * _mesa_lookup_texture_err(struct gl_context *ctx, GLuint id, const char* func) { - struct gl_texture_object *texObj; + struct gl_texture_object *texObj = NULL; - texObj = _mesa_lookup_texture(ctx, id); /* Returns NULL if not found. */ + if (id > 0) + texObj = _mesa_lookup_texture(ctx, id); /* Returns NULL if not found. */ if (!texObj) _mesa_error(ctx, GL_INVALID_OPERATION, "%s(texture)", func); @@ -184,10 +185,10 @@ return ctx->Extensions.ARB_texture_cube_map ? ctx->Texture.ProxyTex[TEXTURE_CUBE_INDEX] : NULL; case GL_TEXTURE_CUBE_MAP_ARRAY: - return ctx->Extensions.ARB_texture_cube_map_array + return _mesa_has_texture_cube_map_array(ctx) ? texUnit->CurrentTex[TEXTURE_CUBE_ARRAY_INDEX] : NULL; case GL_PROXY_TEXTURE_CUBE_MAP_ARRAY: - return ctx->Extensions.ARB_texture_cube_map_array + return _mesa_has_texture_cube_map_array(ctx) ? ctx->Texture.ProxyTex[TEXTURE_CUBE_ARRAY_INDEX] : NULL; case GL_TEXTURE_RECTANGLE_NV: return ctx->Extensions.NV_texture_rectangle @@ -365,15 +366,12 @@ obj->Sampler.MinFilter = filter; obj->Sampler.MagFilter = filter; if (ctx->Driver.TexParameter) { - static const GLfloat fparam_wrap[1] = {(GLfloat) GL_CLAMP_TO_EDGE}; - const GLfloat fparam_filter[1] = {(GLfloat) filter}; - ctx->Driver.TexParameter(ctx, obj, GL_TEXTURE_WRAP_S, fparam_wrap); - ctx->Driver.TexParameter(ctx, obj, GL_TEXTURE_WRAP_T, fparam_wrap); - ctx->Driver.TexParameter(ctx, obj, GL_TEXTURE_WRAP_R, fparam_wrap); - ctx->Driver.TexParameter(ctx, obj, - GL_TEXTURE_MIN_FILTER, fparam_filter); - ctx->Driver.TexParameter(ctx, obj, - GL_TEXTURE_MAG_FILTER, fparam_filter); + /* XXX we probably don't need to make all these calls */ + ctx->Driver.TexParameter(ctx, obj, GL_TEXTURE_WRAP_S); + ctx->Driver.TexParameter(ctx, obj, GL_TEXTURE_WRAP_T); + ctx->Driver.TexParameter(ctx, obj, GL_TEXTURE_WRAP_R); + ctx->Driver.TexParameter(ctx, obj, GL_TEXTURE_MIN_FILTER); + ctx->Driver.TexParameter(ctx, obj, GL_TEXTURE_MAG_FILTER); } break; @@ -1196,7 +1194,7 @@ * glCreateTextures should throw errors if target = 0. This is not exposed to * the rest of Mesa to encourage Mesa internals to use nameless textures, * which do not require expensive hash lookups. - * \param target either 0 or a a valid / error-checked texture target enum + * \param target either 0 or a valid / error-checked texture target enum */ static void create_textures(struct gl_context *ctx, GLenum target, @@ -1579,7 +1577,7 @@ return _mesa_is_gles(ctx) && ctx->Extensions.OES_EGL_image_external ? TEXTURE_EXTERNAL_INDEX : -1; case GL_TEXTURE_CUBE_MAP_ARRAY: - return _mesa_is_desktop_gl(ctx) && ctx->Extensions.ARB_texture_cube_map_array + return _mesa_has_texture_cube_map_array(ctx) ? TEXTURE_CUBE_ARRAY_INDEX : -1; case GL_TEXTURE_2D_MULTISAMPLE: return ((_mesa_is_desktop_gl(ctx) && ctx->Extensions.ARB_texture_multisample) || diff -Nru mesa-12.0.6/src/mesa/main/texobj.h mesa-17.0.7/src/mesa/main/texobj.h --- mesa-12.0.6/src/mesa/main/texobj.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/texobj.h 2017-06-01 10:37:10.000000000 +0000 @@ -125,7 +125,14 @@ _mesa_is_texture_complete(const struct gl_texture_object *texObj, const struct gl_sampler_object *sampler) { - if (texObj->_IsIntegerFormat && + /* + * According to ARB_stencil_texturing, NEAREST_MIPMAP_NEAREST would + * be forbidden, however it is allowed per GL 4.5 rules, allow it + * even without GL 4.5 since it was a spec mistake. + */ + if ((texObj->_IsIntegerFormat || + (texObj->StencilSampling && + texObj->Image[0][texObj->BaseLevel]->_BaseFormat == GL_DEPTH_STENCIL)) && (sampler->MagFilter != GL_NEAREST || (sampler->MinFilter != GL_NEAREST && sampler->MinFilter != GL_NEAREST_MIPMAP_NEAREST))) { @@ -133,20 +140,6 @@ return GL_FALSE; } - /* From the ARB_stencil_texturing specification: - * "Add a new bullet point for the conditions that cause the texture - * to not be complete: - * - * * The internal format of the texture is DEPTH_STENCIL, the - * DEPTH_STENCIL_TEXTURE_MODE for the texture is STENCIL_INDEX and either - * the magnification filter or the minification filter is not NEAREST." - */ - if (texObj->StencilSampling && - texObj->Image[0][texObj->BaseLevel]->_BaseFormat == GL_DEPTH_STENCIL && - (sampler->MagFilter != GL_NEAREST || sampler->MinFilter != GL_NEAREST)) { - return GL_FALSE; - } - if (_mesa_is_mipmap_filter(sampler)) return texObj->_MipmapComplete; else diff -Nru mesa-12.0.6/src/mesa/main/texparam.c mesa-17.0.7/src/mesa/main/texparam.c --- mesa-12.0.6/src/mesa/main/texparam.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/texparam.c 2017-06-01 10:37:10.000000000 +0000 @@ -807,7 +807,7 @@ } if (ctx->Driver.TexParameter && need_update) { - ctx->Driver.TexParameter(ctx, texObj, pname, ¶m); + ctx->Driver.TexParameter(ctx, texObj, pname); } } @@ -874,7 +874,7 @@ } if (ctx->Driver.TexParameter && need_update) { - ctx->Driver.TexParameter(ctx, texObj, pname, params); + ctx->Driver.TexParameter(ctx, texObj, pname); } } @@ -919,8 +919,7 @@ } if (ctx->Driver.TexParameter && need_update) { - GLfloat fparam = (GLfloat) param; - ctx->Driver.TexParameter(ctx, texObj, pname, &fparam); + ctx->Driver.TexParameter(ctx, texObj, pname); } } @@ -935,6 +934,10 @@ switch (pname) { case GL_TEXTURE_BORDER_COLOR: { + if (!_mesa_target_allows_setting_sampler_parameters(texObj->Target)) { + _mesa_error(ctx, GL_INVALID_ENUM, "glTextureParameteriv(texture)"); + return; + } /* convert int params to float */ GLfloat fparams[4]; fparams[0] = INT_TO_FLOAT(params[0]); @@ -964,15 +967,7 @@ } if (ctx->Driver.TexParameter && need_update) { - GLfloat fparams[4]; - fparams[0] = INT_TO_FLOAT(params[0]); - if (pname == GL_TEXTURE_BORDER_COLOR || - pname == GL_TEXTURE_CROP_RECT_OES) { - fparams[1] = INT_TO_FLOAT(params[1]); - fparams[2] = INT_TO_FLOAT(params[2]); - fparams[3] = INT_TO_FLOAT(params[3]); - } - ctx->Driver.TexParameter(ctx, texObj, pname, fparams); + ctx->Driver.TexParameter(ctx, texObj, pname); } } @@ -983,6 +978,10 @@ { switch (pname) { case GL_TEXTURE_BORDER_COLOR: + if (!_mesa_target_allows_setting_sampler_parameters(texObj->Target)) { + _mesa_error(ctx, GL_INVALID_ENUM, "glTextureParameterIiv(texture)"); + return; + } FLUSH_VERTICES(ctx, _NEW_TEXTURE); /* set the integer-valued border color */ COPY_4V(texObj->Sampler.BorderColor.i, params); @@ -1001,6 +1000,10 @@ { switch (pname) { case GL_TEXTURE_BORDER_COLOR: + if (!_mesa_target_allows_setting_sampler_parameters(texObj->Target)) { + _mesa_error(ctx, GL_INVALID_ENUM, "glTextureParameterIuiv(texture)"); + return; + } FLUSH_VERTICES(ctx, _NEW_TEXTURE); /* set the unsigned integer-valued border color */ COPY_4V(texObj->Sampler.BorderColor.ui, params); @@ -1243,6 +1246,8 @@ */ return (ctx->API == API_OPENGL_CORE && ctx->Version >= 31) || _mesa_has_OES_texture_buffer(ctx); + case GL_TEXTURE_CUBE_MAP_ARRAY: + return _mesa_has_texture_cube_map_array(ctx); } if (!_mesa_is_desktop_gl(ctx)) @@ -1257,8 +1262,7 @@ return GL_TRUE; case GL_PROXY_TEXTURE_CUBE_MAP: return ctx->Extensions.ARB_texture_cube_map; - case GL_TEXTURE_CUBE_MAP_ARRAY_ARB: - case GL_PROXY_TEXTURE_CUBE_MAP_ARRAY_ARB: + case GL_PROXY_TEXTURE_CUBE_MAP_ARRAY: return ctx->Extensions.ARB_texture_cube_map_array; case GL_TEXTURE_RECTANGLE_NV: case GL_PROXY_TEXTURE_RECTANGLE_NV: @@ -1485,6 +1489,9 @@ } +/** + * Handle a glGetTexLevelParamteriv() call for a texture buffer. + */ static void get_tex_level_parameter_buffer(struct gl_context *ctx, const struct gl_texture_object *texObj, @@ -1497,6 +1504,8 @@ GLenum baseFormat = _mesa_get_format_base_format(texFormat); const char *suffix = dsa ? "ture" : ""; + assert(texObj->Target == GL_TEXTURE_BUFFER); + if (!bo) { /* undefined texture buffer object */ switch (pname) { diff -Nru mesa-12.0.6/src/mesa/main/texstate.c mesa-17.0.7/src/mesa/main/texstate.c --- mesa-12.0.6/src/mesa/main/texstate.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/texstate.c 2017-06-01 10:37:10.000000000 +0000 @@ -38,6 +38,7 @@ #include "teximage.h" #include "texstate.h" #include "mtypes.h" +#include "util/bitscan.h" #include "util/bitset.h" @@ -598,7 +599,7 @@ if (prog[MESA_SHADER_FRAGMENT]) { const GLuint coordMask = (1 << MAX_TEXTURE_COORD_UNITS) - 1; ctx->Texture._EnabledCoordUnits |= - (prog[MESA_SHADER_FRAGMENT]->InputsRead >> VARYING_SLOT_TEX0) & + (prog[MESA_SHADER_FRAGMENT]->info.inputs_read >> VARYING_SLOT_TEX0) & coordMask; } } @@ -611,7 +612,8 @@ for (unit = 0; unit < ctx->Const.MaxTextureUnits; unit++) { struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit]; - GLuint texIndex; + GLbitfield mask; + bool complete; if (texUnit->Enabled == 0x0) continue; @@ -649,23 +651,25 @@ * another unit, then the results of texture blending are * undefined." */ - for (texIndex = 0; texIndex < NUM_TEXTURE_TARGETS; texIndex++) { - if (texUnit->Enabled & (1 << texIndex)) { - struct gl_texture_object *texObj = texUnit->CurrentTex[texIndex]; - struct gl_sampler_object *sampler = texUnit->Sampler ? - texUnit->Sampler : &texObj->Sampler; + complete = false; + mask = texUnit->Enabled; + while (mask) { + const int texIndex = u_bit_scan(&mask); + struct gl_texture_object *texObj = texUnit->CurrentTex[texIndex]; + struct gl_sampler_object *sampler = texUnit->Sampler ? + texUnit->Sampler : &texObj->Sampler; - if (!_mesa_is_texture_complete(texObj, sampler)) { - _mesa_test_texobj_completeness(ctx, texObj); - } - if (_mesa_is_texture_complete(texObj, sampler)) { - _mesa_reference_texobj(&texUnit->_Current, texObj); - break; - } + if (!_mesa_is_texture_complete(texObj, sampler)) { + _mesa_test_texobj_completeness(ctx, texObj); + } + if (_mesa_is_texture_complete(texObj, sampler)) { + _mesa_reference_texobj(&texUnit->_Current, texObj); + complete = true; + break; } } - if (texIndex == NUM_TEXTURE_TARGETS) + if (!complete) continue; /* if we get here, we know this texture unit is enabled */ @@ -697,11 +701,11 @@ for (i = 0; i < MESA_SHADER_STAGES; i++) { if (ctx->_Shader->CurrentProgram[i] && - ctx->_Shader->CurrentProgram[i]->LinkStatus) { + ctx->_Shader->CurrentProgram[i]->data->LinkStatus) { prog[i] = ctx->_Shader->CurrentProgram[i]->_LinkedShaders[i]->Program; } else { if (i == MESA_SHADER_FRAGMENT && ctx->FragmentProgram._Enabled) - prog[i] = &ctx->FragmentProgram.Current->Base; + prog[i] = ctx->FragmentProgram.Current; else prog[i] = NULL; } diff -Nru mesa-12.0.6/src/mesa/main/texstorage.c mesa-17.0.7/src/mesa/main/texstorage.c --- mesa-12.0.6/src/mesa/main/texstorage.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/texstorage.c 2017-06-01 10:37:10.000000000 +0000 @@ -48,31 +48,51 @@ * This is a bit different than legal_teximage_target() when it comes * to cube maps. */ -static GLboolean -legal_texobj_target(struct gl_context *ctx, GLuint dims, GLenum target) +static bool +legal_texobj_target(const struct gl_context *ctx, GLuint dims, GLenum target) { - if (_mesa_is_gles3(ctx) - && target != GL_TEXTURE_2D - && target != GL_TEXTURE_CUBE_MAP - && target != GL_TEXTURE_3D - && target != GL_TEXTURE_2D_ARRAY) - return GL_FALSE; + if (dims < 1 || dims > 3) { + _mesa_problem(ctx, "invalid dims=%u in legal_texobj_target()", dims); + return false; + } + + switch (dims) { + case 2: + switch (target) { + case GL_TEXTURE_2D: + return true; + case GL_TEXTURE_CUBE_MAP: + return ctx->Extensions.ARB_texture_cube_map; + } + break; + case 3: + switch (target) { + case GL_TEXTURE_3D: + return true; + case GL_TEXTURE_2D_ARRAY: + return ctx->Extensions.EXT_texture_array; + case GL_TEXTURE_CUBE_MAP_ARRAY: + return _mesa_has_texture_cube_map_array(ctx); + } + break; + } + + if (!_mesa_is_desktop_gl(ctx)) + return false; switch (dims) { case 1: switch (target) { case GL_TEXTURE_1D: case GL_PROXY_TEXTURE_1D: - return GL_TRUE; + return true; default: - return GL_FALSE; + return false; } case 2: switch (target) { - case GL_TEXTURE_2D: case GL_PROXY_TEXTURE_2D: - return GL_TRUE; - case GL_TEXTURE_CUBE_MAP: + return true; case GL_PROXY_TEXTURE_CUBE_MAP: return ctx->Extensions.ARB_texture_cube_map; case GL_TEXTURE_RECTANGLE: @@ -82,25 +102,21 @@ case GL_PROXY_TEXTURE_1D_ARRAY: return ctx->Extensions.EXT_texture_array; default: - return GL_FALSE; + return false; } case 3: switch (target) { - case GL_TEXTURE_3D: case GL_PROXY_TEXTURE_3D: - return GL_TRUE; - case GL_TEXTURE_2D_ARRAY: + return true; case GL_PROXY_TEXTURE_2D_ARRAY: return ctx->Extensions.EXT_texture_array; - case GL_TEXTURE_CUBE_MAP_ARRAY: case GL_PROXY_TEXTURE_CUBE_MAP_ARRAY: return ctx->Extensions.ARB_texture_cube_map_array; default: - return GL_FALSE; + return false; } default: - _mesa_problem(ctx, "invalid dims=%u in legal_texobj_target()", dims); - return GL_FALSE; + unreachable("impossible dimensions"); } } @@ -396,8 +412,8 @@ dimensionsOK = _mesa_legal_texture_dimensions(ctx, target, 0, width, height, depth, 0); - sizeOK = ctx->Driver.TestProxyTexImage(ctx, target, 0, texFormat, - width, height, depth, 0); + sizeOK = ctx->Driver.TestProxyTexImage(ctx, target, levels, 0, texFormat, + 1, width, height, depth); if (_mesa_is_proxy_texture(target)) { if (dimensionsOK && sizeOK) { diff -Nru mesa-12.0.6/src/mesa/main/texstore.c mesa-17.0.7/src/mesa/main/texstore.c --- mesa-12.0.6/src/mesa/main/texstore.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/texstore.c 2017-06-01 10:37:10.000000000 +0000 @@ -73,8 +73,8 @@ #include "enums.h" #include "glformats.h" #include "pixeltransfer.h" -#include "../../gallium/auxiliary/util/u_format_rgb9e5.h" -#include "../../gallium/auxiliary/util/u_format_r11g11b10f.h" +#include "util/format_rgb9e5.h" +#include "util/format_r11g11b10f.h" enum { diff -Nru mesa-12.0.6/src/mesa/main/texturebarrier.c mesa-17.0.7/src/mesa/main/texturebarrier.c --- mesa-12.0.6/src/mesa/main/texturebarrier.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/texturebarrier.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,59 +0,0 @@ -/* - * Copyright © 2011 Marek Olšák - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -/** - * \file texturebarrier.c - * Implementation of glTextureBarrierNV. - * - * \author Marek Olšák - */ - -#include "context.h" -#include "texturebarrier.h" - - -static void -_mesa_texture_barrier(struct gl_context *ctx) -{ - /* no-op */ -} - -void -_mesa_init_texture_barrier_functions(struct dd_function_table *driver) -{ - driver->TextureBarrier = _mesa_texture_barrier; -} - -void GLAPIENTRY -_mesa_TextureBarrierNV(void) -{ - GET_CURRENT_CONTEXT(ctx); - - if (!ctx->Extensions.NV_texture_barrier) { - _mesa_error(ctx, GL_INVALID_OPERATION, - "glTextureBarrier(not supported)"); - return; - } - - ctx->Driver.TextureBarrier(ctx); -} diff -Nru mesa-12.0.6/src/mesa/main/texturebarrier.h mesa-17.0.7/src/mesa/main/texturebarrier.h --- mesa-12.0.6/src/mesa/main/texturebarrier.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/texturebarrier.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,44 +0,0 @@ -/* - * Copyright © 2011 Marek Olšák - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -/** - * \file texturebarrier.h - * GL_NV_texture_barrier - * - * \author Marek Olšák - */ - -#ifndef TEXTUREBARRIER_H -#define TEXTUREBARRIER_H - -#include "glheader.h" - -struct dd_function_table; - -extern void -_mesa_init_texture_barrier_functions(struct dd_function_table *driver); - -extern void GLAPIENTRY -_mesa_TextureBarrierNV(void); - -#endif /* TEXTUREBARRIER_H */ diff -Nru mesa-12.0.6/src/mesa/main/textureview.c mesa-17.0.7/src/mesa/main/textureview.c --- mesa-12.0.6/src/mesa/main/textureview.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/textureview.c 2017-06-01 10:37:10.000000000 +0000 @@ -714,8 +714,9 @@ return; } - sizeOK = ctx->Driver.TestProxyTexImage(ctx, target, 0, texFormat, - width, height, depth, 0); + sizeOK = ctx->Driver.TestProxyTexImage(ctx, target, 1, 0, texFormat, + origTexImage->NumSamples, + width, height, depth); if (!sizeOK) { _mesa_error(ctx, GL_INVALID_OPERATION, "glTextureView(invalid texture size)"); diff -Nru mesa-12.0.6/src/mesa/main/transformfeedback.c mesa-17.0.7/src/mesa/main/transformfeedback.c --- mesa-12.0.6/src/mesa/main/transformfeedback.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/transformfeedback.c 2017-06-01 10:37:10.000000000 +0000 @@ -45,7 +45,7 @@ struct using_program_tuple { - struct gl_shader_program *shProg; + struct gl_program *prog; bool found; }; @@ -54,7 +54,7 @@ { struct using_program_tuple *callback_data = user_data; struct gl_transform_feedback_object *obj = data; - if (obj->Active && obj->shader_program == callback_data->shProg) + if (obj->Active && obj->program == callback_data->prog) callback_data->found = true; } @@ -66,8 +66,8 @@ struct gl_shader_program *shProg) { struct using_program_tuple callback_data; - callback_data.shProg = shProg; callback_data.found = false; + callback_data.prog = shProg->xfb_program; _mesa_HashWalk(ctx->TransformFeedback.Objects, active_xfb_object_references_program, &callback_data); @@ -379,18 +379,18 @@ /** * Figure out which stage of the pipeline is the source of transform feedback - * data given the current context state, and return its gl_shader_program. + * data given the current context state, and return its gl_program. * * If no active program can generate transform feedback data (i.e. no vertex * shader is active), returns NULL. */ -static struct gl_shader_program * +static struct gl_program * get_xfb_source(struct gl_context *ctx) { int i; for (i = MESA_SHADER_GEOMETRY; i >= MESA_SHADER_VERTEX; i--) { if (ctx->_Shader->CurrentProgram[i] != NULL) - return ctx->_Shader->CurrentProgram[i]; + return ctx->_Shader->CurrentProgram[i]->_LinkedShaders[i]->Program; } return NULL; } @@ -401,7 +401,6 @@ { struct gl_transform_feedback_object *obj; struct gl_transform_feedback_info *info = NULL; - struct gl_shader_program *source; GLuint i; unsigned vertices_per_prim; GET_CURRENT_CONTEXT(ctx); @@ -411,14 +410,14 @@ /* Figure out what pipeline stage is the source of data for transform * feedback. */ - source = get_xfb_source(ctx); + struct gl_program *source = get_xfb_source(ctx); if (source == NULL) { _mesa_error(ctx, GL_INVALID_OPERATION, "glBeginTransformFeedback(no program active)"); return; } - info = &source->LinkedTransformFeedback; + info = source->sh.LinkedTransformFeedback; if (info->NumOutputs == 0) { _mesa_error(ctx, GL_INVALID_OPERATION, @@ -478,9 +477,9 @@ obj->GlesRemainingPrims = max_vertices / vertices_per_prim; } - if (obj->shader_program != source) { + if (obj->program != source) { ctx->NewDriverState |= ctx->DriverFlags.NewTransformFeedbackProg; - obj->shader_program = source; + obj->program = source; } assert(ctx->Driver.BeginTransformFeedback); @@ -846,12 +845,10 @@ return; } - shProg = _mesa_lookup_shader_program(ctx, program); - if (!shProg) { - _mesa_error(ctx, GL_INVALID_VALUE, - "glTransformFeedbackVaryings(program=%u)", program); + shProg = _mesa_lookup_shader_program_err(ctx, program, + "glTransformFeedbackVaryings"); + if (!shProg) return; - } if (ctx->Extensions.ARB_transform_feedback3) { if (bufferMode == GL_INTERLEAVED_ATTRIBS) { @@ -927,12 +924,10 @@ struct gl_program_resource *res; GET_CURRENT_CONTEXT(ctx); - shProg = _mesa_lookup_shader_program(ctx, program); - if (!shProg) { - _mesa_error(ctx, GL_INVALID_VALUE, - "glGetTransformFeedbackVarying(program=%u)", program); + shProg = _mesa_lookup_shader_program_err(ctx, program, + "glGetTransformFeedbackVarying"); + if (!shProg) return; - } res = _mesa_program_resource_find_index((struct gl_shader_program *) shProg, GL_TRANSFORM_FEEDBACK_VARYING, @@ -1203,7 +1198,7 @@ * the program object being used by the current transform feedback object * is not active." */ - if (obj->shader_program != get_xfb_source(ctx)) { + if (obj->program != get_xfb_source(ctx)) { _mesa_error(ctx, GL_INVALID_OPERATION, "glResumeTransformFeedback(wrong program bound)"); return; diff -Nru mesa-12.0.6/src/mesa/main/uniform_query.cpp mesa-17.0.7/src/mesa/main/uniform_query.cpp --- mesa-12.0.6/src/mesa/main/uniform_query.cpp 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/uniform_query.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -35,7 +35,7 @@ #include "compiler/glsl/ir_uniform.h" #include "compiler/glsl/glsl_parser_extras.h" #include "compiler/glsl/program.h" -#include "program/hash_table.h" +#include "util/bitscan.h" extern "C" void GLAPIENTRY @@ -179,10 +179,10 @@ /* Check that the given location is in bounds of uniform remap table. * Unlinked programs will have NumUniformRemapTable == 0, so we can take - * the shProg->LinkStatus check out of the main path. + * the shProg->data->LinkStatus check out of the main path. */ if (unlikely(location >= (GLint) shProg->NumUniformRemapTable)) { - if (!shProg->LinkStatus) + if (!shProg->data->LinkStatus) _mesa_error(ctx, GL_INVALID_OPERATION, "%s(program not linked)", caller); else @@ -193,7 +193,7 @@ } if (location == -1) { - if (!shProg->LinkStatus) + if (!shProg->data->LinkStatus) _mesa_error(ctx, GL_INVALID_OPERATION, "%s(program not linked)", caller); @@ -322,8 +322,8 @@ { unsigned elements = (uni->type->is_sampler()) ? 1 : uni->type->components(); - const int dmul = uni->type->base_type == GLSL_TYPE_DOUBLE ? 2 : 1; - const int rmul = returnType == GLSL_TYPE_DOUBLE ? 2 : 1; + const int dmul = uni->type->is_64bit() ? 2 : 1; + const int rmul = glsl_base_type_is_64bit(returnType) ? 2 : 1; /* Calculate the source base address *BEFORE* modifying elements to * account for the size of the user's buffer. @@ -381,9 +381,12 @@ case GLSL_TYPE_BOOL: dst[didx].f = src[sidx].i ? 1.0f : 0.0f; break; - case GLSL_TYPE_DOUBLE: - dst[didx].f = *(double *)&src[sidx].f; + case GLSL_TYPE_DOUBLE: { + double tmp; + memcpy(&tmp, &src[sidx].f, sizeof(tmp)); + dst[didx].f = tmp; break; + } default: assert(!"Should not get here."); break; @@ -391,20 +394,28 @@ break; case GLSL_TYPE_DOUBLE: switch (uni->type->base_type) { - case GLSL_TYPE_UINT: - *(double *)&dst[didx].f = (double) src[sidx].u; + case GLSL_TYPE_UINT: { + double tmp = src[sidx].u; + memcpy(&dst[didx].f, &tmp, sizeof(tmp)); break; + } case GLSL_TYPE_INT: case GLSL_TYPE_SAMPLER: - case GLSL_TYPE_IMAGE: - *(double *)&dst[didx].f = (double) src[sidx].i; + case GLSL_TYPE_IMAGE: { + double tmp = src[sidx].i; + memcpy(&dst[didx].f, &tmp, sizeof(tmp)); break; - case GLSL_TYPE_BOOL: - *(double *)&dst[didx].f = src[sidx].i ? 1.0f : 0.0f; + } + case GLSL_TYPE_BOOL: { + double tmp = src[sidx].i ? 1.0 : 0.0; + memcpy(&dst[didx].f, &tmp, sizeof(tmp)); break; - case GLSL_TYPE_FLOAT: - *(double *)&dst[didx].f = (double) src[sidx].f; + } + case GLSL_TYPE_FLOAT: { + double tmp = src[sidx].f; + memcpy(&dst[didx].f, &tmp, sizeof(tmp)); break; + } default: assert(!"Should not get here."); break; @@ -436,9 +447,12 @@ case GLSL_TYPE_BOOL: dst[didx].i = src[sidx].i ? 1 : 0; break; - case GLSL_TYPE_DOUBLE: - dst[didx].i = IROUNDD(*(double *)&src[sidx].f); + case GLSL_TYPE_DOUBLE: { + double tmp; + memcpy(&tmp, &src[sidx].f, sizeof(tmp)); + dst[didx].i = IROUNDD(tmp); break; + } default: assert(!"Should not get here."); break; @@ -485,9 +499,12 @@ case GLSL_TYPE_FLOAT: printf("%g ", v[i].f); break; - case GLSL_TYPE_DOUBLE: - printf("%g ", *(double* )&v[i * 2].f); + case GLSL_TYPE_DOUBLE: { + double tmp; + memcpy(&tmp, &v[i * 2].f, sizeof(tmp)); + printf("%g ", tmp); break; + } default: assert(!"Should not get here."); break; @@ -548,7 +565,7 @@ */ const unsigned components = MAX2(1, uni->type->vector_elements); const unsigned vectors = MAX2(1, uni->type->matrix_columns); - const int dmul = uni->type->base_type == GLSL_TYPE_DOUBLE ? 2 : 1; + const int dmul = uni->type->is_64bit() ? 2 : 1; /* Store the data in the driver's requested type in the driver's storage * areas. @@ -577,14 +594,31 @@ unsigned j; unsigned v; - for (j = 0; j < count; j++) { - for (v = 0; v < vectors; v++) { - memcpy(dst, src, src_vector_byte_stride); - src += src_vector_byte_stride; - dst += store->vector_stride; + if (src_vector_byte_stride == store->vector_stride) { + if (extra_stride) { + for (j = 0; j < count; j++) { + memcpy(dst, src, src_vector_byte_stride * vectors); + src += src_vector_byte_stride * vectors; + dst += store->vector_stride * vectors; + + dst += extra_stride; + } + } else { + /* Unigine Heaven benchmark gets here */ + memcpy(dst, src, src_vector_byte_stride * vectors * count); + src += src_vector_byte_stride * vectors * count; + dst += store->vector_stride * vectors * count; } + } else { + for (j = 0; j < count; j++) { + for (v = 0; v < vectors; v++) { + memcpy(dst, src, src_vector_byte_stride); + src += src_vector_byte_stride; + dst += store->vector_stride; + } - dst += extra_stride; + dst += extra_stride; + } } break; } @@ -668,7 +702,7 @@ unsigned src_components) { unsigned offset; - int size_mul = basicType == GLSL_TYPE_DOUBLE ? 2 : 1; + int size_mul = glsl_base_type_is_64bit(basicType) ? 2 : 1; struct gl_uniform_storage *const uni = validate_uniform_parameters(ctx, shProg, location, count, @@ -822,45 +856,31 @@ */ if (uni->type->is_sampler()) { bool flushed = false; + shProg->SamplersValidated = GL_TRUE; + for (int i = 0; i < MESA_SHADER_STAGES; i++) { - struct gl_shader *const sh = shProg->_LinkedShaders[i]; + struct gl_linked_shader *const sh = shProg->_LinkedShaders[i]; - /* If the shader stage doesn't use the sampler uniform, skip this. - */ - if (sh == NULL || !uni->opaque[i].active) + /* If the shader stage doesn't use the sampler uniform, skip this. */ + if (!uni->opaque[i].active) continue; + bool changed = false; for (int j = 0; j < count; j++) { - sh->SamplerUnits[uni->opaque[i].index + offset + j] = - ((unsigned *) values)[j]; + unsigned unit = uni->opaque[i].index + offset + j; + if (sh->Program->SamplerUnits[unit] != ((unsigned *) values)[j]) { + sh->Program->SamplerUnits[unit] = ((unsigned *) values)[j]; + changed = true; + } } - struct gl_program *const prog = sh->Program; - - assert(sizeof(prog->SamplerUnits) == sizeof(sh->SamplerUnits)); - - /* Determine if any of the samplers used by this shader stage have - * been modified. - */ - bool changed = false; - for (unsigned j = 0; j < ARRAY_SIZE(prog->SamplerUnits); j++) { - if ((sh->active_samplers & (1U << j)) != 0 - && (prog->SamplerUnits[j] != sh->SamplerUnits[j])) { - changed = true; - break; - } - } - if (changed) { if (!flushed) { FLUSH_VERTICES(ctx, _NEW_TEXTURE | _NEW_PROGRAM); flushed = true; } - memcpy(prog->SamplerUnits, - sh->SamplerUnits, - sizeof(sh->SamplerUnits)); - + struct gl_program *const prog = sh->Program; _mesa_update_shader_textures_used(shProg, prog); if (ctx->Driver.SamplerUniformChange) ctx->Driver.SamplerUniformChange(ctx, prog->Target, prog); @@ -874,10 +894,10 @@ if (uni->type->is_image()) { for (int i = 0; i < MESA_SHADER_STAGES; i++) { if (uni->opaque[i].active) { - struct gl_shader *sh = shProg->_LinkedShaders[i]; + struct gl_linked_shader *sh = shProg->_LinkedShaders[i]; for (int j = 0; j < count; j++) - sh->ImageUnits[uni->opaque[i].index + offset + j] = + sh->Program->sh.ImageUnits[uni->opaque[i].index + offset + j] = ((GLint *) values)[j]; } } @@ -1037,7 +1057,7 @@ char *errMsg, size_t errMsgLength) { /* Shader does not have samplers. */ - if (shProg->NumUniformStorage == 0) + if (shProg->data->NumUniformStorage == 0) return true; if (!shProg->SamplersValidated) { @@ -1066,58 +1086,51 @@ * - The number of active samplers in the program exceeds the * maximum number of texture image units allowed." */ + + GLbitfield mask; + GLbitfield TexturesUsed[MAX_COMBINED_TEXTURE_IMAGE_UNITS]; + struct gl_linked_shader *shader; unsigned active_samplers = 0; const struct gl_shader_program **shProg = (const struct gl_shader_program **) pipeline->CurrentProgram; - const glsl_type *unit_types[MAX_COMBINED_TEXTURE_IMAGE_UNITS]; - memset(unit_types, 0, sizeof(unit_types)); + + memset(TexturesUsed, 0, sizeof(TexturesUsed)); for (unsigned idx = 0; idx < ARRAY_SIZE(pipeline->CurrentProgram); idx++) { if (!shProg[idx]) continue; - for (unsigned i = 0; i < shProg[idx]->NumUniformStorage; i++) { - const struct gl_uniform_storage *const storage = - &shProg[idx]->UniformStorage[i]; + shader = shProg[idx]->_LinkedShaders[idx]; + if (!shader || !shader->Program) + continue; - if (!storage->type->is_sampler()) + mask = shader->Program->SamplersUsed; + while (mask) { + const int s = u_bit_scan(&mask); + GLuint unit = shader->Program->SamplerUnits[s]; + GLuint tgt = shader->Program->sh.SamplerTargets[s]; + + /* FIXME: Samplers are initialized to 0 and Mesa doesn't do a + * great job of eliminating unused uniforms currently so for now + * don't throw an error if two sampler types both point to 0. + */ + if (unit == 0) continue; - active_samplers++; - - const unsigned count = MAX2(1, storage->array_elements); - for (unsigned j = 0; j < count; j++) { - const unsigned unit = storage->storage[j].i; - - /* FIXME: Samplers are initialized to 0 and Mesa doesn't do a - * great job of eliminating unused uniforms currently so for now - * don't throw an error if two sampler types both point to 0. - */ - if (unit == 0) - continue; - - /* The types of the samplers associated with a particular texture - * unit must be an exact match. Page 74 (page 89 of the PDF) of - * the OpenGL 3.3 core spec says: - * - * "It is not allowed to have variables of different sampler - * types pointing to the same texture image unit within a - * program object." - */ - if (unit_types[unit] == NULL) { - unit_types[unit] = storage->type; - } else if (unit_types[unit] != storage->type) { - pipeline->InfoLog = - ralloc_asprintf(pipeline, - "Texture unit %d is accessed both as %s " - "and %s", - unit, unit_types[unit]->name, - storage->type->name); - return false; - } + if (TexturesUsed[unit] & ~(1 << tgt)) { + pipeline->InfoLog = + ralloc_asprintf(pipeline, + "Program %d: " + "Texture unit %d is accessed with 2 different types", + shProg[idx]->Name, unit); + return false; } + + TexturesUsed[unit] |= (1 << tgt); } + + active_samplers += shader->Program->info.num_textures; } if (active_samplers > MAX_COMBINED_TEXTURE_IMAGE_UNITS) { diff -Nru mesa-12.0.6/src/mesa/main/uniforms.c mesa-17.0.7/src/mesa/main/uniforms.c --- mesa-12.0.6/src/mesa/main/uniforms.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/uniforms.c 2017-06-01 10:37:10.000000000 +0000 @@ -46,6 +46,7 @@ #include "compiler/glsl/ir_uniform.h" #include "compiler/glsl_types.h" #include "program/program.h" +#include "util/bitscan.h" /** * Update the vertex/fragment program's TexturesUsed array. @@ -66,37 +67,46 @@ _mesa_update_shader_textures_used(struct gl_shader_program *shProg, struct gl_program *prog) { - GLuint s; - struct gl_shader *shader = - shProg->_LinkedShaders[_mesa_program_enum_to_shader_stage(prog->Target)]; + GLbitfield mask = prog->SamplersUsed; + gl_shader_stage prog_stage = + _mesa_program_enum_to_shader_stage(prog->Target); + struct gl_linked_shader *shader = shProg->_LinkedShaders[prog_stage]; assert(shader); - memcpy(prog->SamplerUnits, shader->SamplerUnits, sizeof(prog->SamplerUnits)); memset(prog->TexturesUsed, 0, sizeof(prog->TexturesUsed)); - shProg->SamplersValidated = GL_TRUE; + while (mask) { + const int s = u_bit_scan(&mask); + GLuint unit = prog->SamplerUnits[s]; + GLuint tgt = prog->sh.SamplerTargets[s]; + assert(unit < ARRAY_SIZE(prog->TexturesUsed)); + assert(tgt < NUM_TEXTURE_TARGETS); + + /* The types of the samplers associated with a particular texture + * unit must be an exact match. Page 74 (page 89 of the PDF) of the + * OpenGL 3.3 core spec says: + * + * "It is not allowed to have variables of different sampler + * types pointing to the same texture image unit within a program + * object." + */ + unsigned stages_mask = shProg->data->linked_stages; + while (stages_mask) { + const int stage = u_bit_scan(&stages_mask); - for (s = 0; s < MAX_SAMPLERS; s++) { - if (prog->SamplersUsed & (1u << s)) { - GLuint unit = shader->SamplerUnits[s]; - GLuint tgt = shader->SamplerTargets[s]; - assert(unit < ARRAY_SIZE(prog->TexturesUsed)); - assert(tgt < NUM_TEXTURE_TARGETS); - - /* The types of the samplers associated with a particular texture - * unit must be an exact match. Page 74 (page 89 of the PDF) of the - * OpenGL 3.3 core spec says: - * - * "It is not allowed to have variables of different sampler - * types pointing to the same texture image unit within a program - * object." + /* Skip validation if we are yet to update textures used in this + * stage. */ - if (prog->TexturesUsed[unit] & ~(1 << tgt)) - shProg->SamplersValidated = GL_FALSE; + if (prog_stage < stage) + break; - prog->TexturesUsed[unit] |= (1 << tgt); + struct gl_program *glprog = shProg->_LinkedShaders[stage]->Program; + if (glprog->TexturesUsed[unit] & ~(1 << tgt)) + shProg->SamplersValidated = GL_FALSE; } + + prog->TexturesUsed[unit] |= (1 << tgt); } } @@ -915,7 +925,7 @@ * "If program has not been successfully linked, the error * INVALID_OPERATION is generated." */ - if (shProg->LinkStatus == GL_FALSE) { + if (shProg->data->LinkStatus == GL_FALSE) { _mesa_error(ctx, GL_INVALID_OPERATION, "glGetUniformLocation(program not linked)"); return -1; @@ -1002,10 +1012,10 @@ if (!shProg) return; - if (uniformBlockIndex >= shProg->NumUniformBlocks) { + if (uniformBlockIndex >= shProg->data->NumUniformBlocks) { _mesa_error(ctx, GL_INVALID_VALUE, "glUniformBlockBinding(block index %u >= %u)", - uniformBlockIndex, shProg->NumUniformBlocks); + uniformBlockIndex, shProg->data->NumUniformBlocks); return; } @@ -1016,13 +1026,14 @@ return; } - if (shProg->UniformBlocks[uniformBlockIndex].Binding != + if (shProg->data->UniformBlocks[uniformBlockIndex].Binding != uniformBlockBinding) { FLUSH_VERTICES(ctx, 0); ctx->NewDriverState |= ctx->DriverFlags.NewUniformBuffer; - shProg->UniformBlocks[uniformBlockIndex].Binding = uniformBlockBinding; + shProg->data->UniformBlocks[uniformBlockIndex].Binding = + uniformBlockBinding; } } @@ -1044,10 +1055,11 @@ if (!shProg) return; - if (shaderStorageBlockIndex >= shProg->NumShaderStorageBlocks) { + if (shaderStorageBlockIndex >= shProg->data->NumShaderStorageBlocks) { _mesa_error(ctx, GL_INVALID_VALUE, "glShaderStorageBlockBinding(block index %u >= %u)", - shaderStorageBlockIndex, shProg->NumShaderStorageBlocks); + shaderStorageBlockIndex, + shProg->data->NumShaderStorageBlocks); return; } @@ -1059,13 +1071,13 @@ return; } - if (shProg->ShaderStorageBlocks[shaderStorageBlockIndex].Binding != + if (shProg->data->ShaderStorageBlocks[shaderStorageBlockIndex].Binding != shaderStorageBlockBinding) { FLUSH_VERTICES(ctx, 0); ctx->NewDriverState |= ctx->DriverFlags.NewShaderStorageBuffer; - shProg->ShaderStorageBlocks[shaderStorageBlockIndex].Binding = + shProg->data->ShaderStorageBlocks[shaderStorageBlockIndex].Binding = shaderStorageBlockBinding; } } diff -Nru mesa-12.0.6/src/mesa/main/varray.c mesa-17.0.7/src/mesa/main/varray.c --- mesa-12.0.6/src/mesa/main/varray.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/varray.c 2017-06-01 10:37:10.000000000 +0000 @@ -102,6 +102,7 @@ case GL_UNSIGNED_INT: return UNSIGNED_INT_BIT; case GL_HALF_FLOAT: + case GL_HALF_FLOAT_OES: if (ctx->Extensions.ARB_half_float_vertex) return HALF_BIT; else @@ -125,7 +126,8 @@ /** - * Sets the VertexBinding field in the vertex attribute given by attribIndex. + * Sets the BufferBindingIndex field for the vertex attribute given by + * attribIndex. */ static void vertex_attrib_binding(struct gl_context *ctx, @@ -133,22 +135,22 @@ GLuint attribIndex, GLuint bindingIndex) { - struct gl_vertex_attrib_array *array = &vao->VertexAttrib[attribIndex]; + struct gl_array_attributes *array = &vao->VertexAttrib[attribIndex]; - if (!_mesa_is_bufferobj(vao->VertexBinding[bindingIndex].BufferObj)) - vao->VertexAttribBufferMask &= ~VERT_BIT(attribIndex); + if (!_mesa_is_bufferobj(vao->BufferBinding[bindingIndex].BufferObj)) + vao->VertexAttribBufferMask &= ~VERT_BIT(attribIndex); else - vao->VertexAttribBufferMask |= VERT_BIT(attribIndex); + vao->VertexAttribBufferMask |= VERT_BIT(attribIndex); - if (array->VertexBinding != bindingIndex) { + if (array->BufferBindingIndex != bindingIndex) { const GLbitfield64 array_bit = VERT_BIT(attribIndex); FLUSH_VERTICES(ctx, _NEW_ARRAY); - vao->VertexBinding[array->VertexBinding]._BoundArrays &= ~array_bit; - vao->VertexBinding[bindingIndex]._BoundArrays |= array_bit; + vao->BufferBinding[array->BufferBindingIndex]._BoundArrays &= ~array_bit; + vao->BufferBinding[bindingIndex]._BoundArrays |= array_bit; - array->VertexBinding = bindingIndex; + array->BufferBindingIndex = bindingIndex; vao->NewArrays |= array_bit; } @@ -166,7 +168,7 @@ struct gl_buffer_object *vbo, GLintptr offset, GLsizei stride) { - struct gl_vertex_buffer_binding *binding = &vao->VertexBinding[index]; + struct gl_vertex_buffer_binding *binding = &vao->BufferBinding[index]; if (binding->BufferObj != vbo || binding->Offset != offset || @@ -200,7 +202,7 @@ GLuint divisor) { struct gl_vertex_buffer_binding *binding = - &vao->VertexBinding[bindingIndex]; + &vao->BufferBinding[bindingIndex]; if (binding->InstanceDivisor != divisor) { FLUSH_VERTICES(ctx, _NEW_ARRAY); @@ -235,8 +237,10 @@ legalTypesMask &= ~(UNSIGNED_INT_BIT | INT_BIT | UNSIGNED_INT_2_10_10_10_REV_BIT | - INT_2_10_10_10_REV_BIT | - HALF_BIT); + INT_2_10_10_10_REV_BIT); + + if (!_mesa_has_OES_vertex_half_float(ctx)) + legalTypesMask &= ~HALF_BIT; } } else { @@ -278,7 +282,7 @@ GLboolean integer, GLboolean doubles, GLuint relativeOffset, bool flush_vertices) { - struct gl_vertex_attrib_array *const array = &vao->VertexAttrib[attrib]; + struct gl_array_attributes *const array = &vao->VertexAttrib[attrib]; GLint elementSize; assert(size <= 4); @@ -333,6 +337,9 @@ GLbitfield typeBit; GLenum format = GL_RGBA; + /* at most, one of these bools can be true */ + assert((int) normalized + (int) integer + (int) doubles <= 1); + if (ctx->Array.LegalTypesMask == 0 || ctx->Array.LegalTypesMaskAPI != ctx->API) { /* Compute the LegalTypesMask only once, unless the context API has * changed, in which case we want to compute it again. We can't do this @@ -465,7 +472,8 @@ GLboolean normalized, GLboolean integer, GLboolean doubles, const GLvoid *ptr) { - struct gl_vertex_attrib_array *array; + struct gl_vertex_array_object *vao = ctx->Array.VAO; + struct gl_array_attributes *array; GLsizei effectiveStride; /* Page 407 (page 423 of the PDF) of the OpenGL 3.0 spec says: @@ -478,8 +486,7 @@ * * The check for VBOs is handled below. */ - if (ctx->API == API_OPENGL_CORE - && (ctx->Array.VAO == ctx->Array.DefaultVAO)) { + if (ctx->API == API_OPENGL_CORE && (vao == ctx->Array.DefaultVAO)) { _mesa_error(ctx, GL_INVALID_OPERATION, "%s(no array object bound)", func); return; @@ -509,29 +516,29 @@ * to the ARRAY_BUFFER buffer object binding point (see section * 2.9.6), and the pointer argument is not NULL." */ - if (ptr != NULL && ctx->Array.VAO->ARBsemantics && + if (ptr != NULL && vao->ARBsemantics && !_mesa_is_bufferobj(ctx->Array.ArrayBufferObj)) { _mesa_error(ctx, GL_INVALID_OPERATION, "%s(non-VBO array)", func); return; } - if (!update_array_format(ctx, func, ctx->Array.VAO, attrib, + if (!update_array_format(ctx, func, vao, attrib, legalTypesMask, sizeMin, sizeMax, size, type, normalized, integer, doubles, 0)) { return; } /* Reset the vertex attrib binding */ - vertex_attrib_binding(ctx, ctx->Array.VAO, attrib, attrib); + vertex_attrib_binding(ctx, vao, attrib, attrib); /* The Stride and Ptr fields are not set by update_array_format() */ - array = &ctx->Array.VAO->VertexAttrib[attrib]; + array = &vao->VertexAttrib[attrib]; array->Stride = stride; - array->Ptr = (const GLvoid *) ptr; + array->Ptr = ptr; /* Update the vertex buffer binding */ effectiveStride = stride != 0 ? stride : array->_ElementSize; - _mesa_bind_vertex_buffer(ctx, ctx->Array.VAO, attrib, + _mesa_bind_vertex_buffer(ctx, vao, attrib, ctx->Array.ArrayBufferObj, (GLintptr) ptr, effectiveStride); } @@ -905,7 +912,7 @@ GLuint index, GLenum pname, const char *caller) { - const struct gl_vertex_attrib_array *array; + const struct gl_array_attributes *array; if (index >= ctx->Const.Program[MESA_SHADER_VERTEX].MaxAttribs) { _mesa_error(ctx, GL_INVALID_VALUE, "%s(index=%u)", caller, index); @@ -928,7 +935,7 @@ case GL_VERTEX_ATTRIB_ARRAY_NORMALIZED_ARB: return array->Normalized; case GL_VERTEX_ATTRIB_ARRAY_BUFFER_BINDING_ARB: - return vao->VertexBinding[array->VertexBinding].BufferObj->Name; + return vao->BufferBinding[array->BufferBindingIndex].BufferObj->Name; case GL_VERTEX_ATTRIB_ARRAY_INTEGER: if ((_mesa_is_desktop_gl(ctx) && (ctx->Version >= 30 || ctx->Extensions.EXT_gpu_shader4)) @@ -944,12 +951,12 @@ case GL_VERTEX_ATTRIB_ARRAY_DIVISOR_ARB: if ((_mesa_is_desktop_gl(ctx) && ctx->Extensions.ARB_instanced_arrays) || _mesa_is_gles3(ctx)) { - return vao->VertexBinding[array->VertexBinding].InstanceDivisor; + return vao->BufferBinding[array->BufferBindingIndex].InstanceDivisor; } goto error; case GL_VERTEX_ATTRIB_BINDING: if (_mesa_is_desktop_gl(ctx) || _mesa_is_gles31(ctx)) { - return array->VertexBinding - VERT_ATTRIB_GENERIC0; + return array->BufferBindingIndex - VERT_ATTRIB_GENERIC0; } goto error; case GL_VERTEX_ATTRIB_RELATIVE_OFFSET: @@ -1185,16 +1192,16 @@ */ switch (pname) { case GL_VERTEX_BINDING_OFFSET: - params[0] = vao->VertexBinding[VERT_ATTRIB_GENERIC(index)].Offset; + params[0] = vao->BufferBinding[VERT_ATTRIB_GENERIC(index)].Offset; break; case GL_VERTEX_BINDING_STRIDE: - params[0] = vao->VertexBinding[VERT_ATTRIB_GENERIC(index)].Stride; + params[0] = vao->BufferBinding[VERT_ATTRIB_GENERIC(index)].Stride; break; case GL_VERTEX_BINDING_DIVISOR: - params[0] = vao->VertexBinding[VERT_ATTRIB_GENERIC(index)].InstanceDivisor; + params[0] = vao->BufferBinding[VERT_ATTRIB_GENERIC(index)].InstanceDivisor; break; case GL_VERTEX_BINDING_BUFFER: - params[0] = vao->VertexBinding[VERT_ATTRIB_GENERIC(index)].BufferObj->Name; + params[0] = vao->BufferBinding[VERT_ATTRIB_GENERIC(index)].BufferObj->Name; break; default: params[0] = get_vertex_array_attrib(ctx, vao, index, pname, @@ -1253,7 +1260,7 @@ return; } - params[0] = vao->VertexBinding[VERT_ATTRIB_GENERIC(index)].Offset; + params[0] = vao->BufferBinding[VERT_ATTRIB_GENERIC(index)].Offset; } @@ -1539,24 +1546,6 @@ } -/* GL_EXT_multi_draw_arrays */ -void GLAPIENTRY -_mesa_MultiDrawArrays( GLenum mode, const GLint *first, - const GLsizei *count, GLsizei primcount ) -{ - GET_CURRENT_CONTEXT(ctx); - GLint i; - - FLUSH_VERTICES(ctx, 0); - - for (i = 0; i < primcount; i++) { - if (count[i] > 0) { - CALL_DrawArrays(ctx->CurrentDispatch, (mode, first[i], count[i])); - } - } -} - - /* GL_IBM_multimode_draw_arrays */ void GLAPIENTRY _mesa_MultiModeDrawArraysIBM( const GLenum * mode, const GLint * first, @@ -1739,8 +1728,8 @@ } if (buffer == - vao->VertexBinding[VERT_ATTRIB_GENERIC(bindingIndex)].BufferObj->Name) { - vbo = vao->VertexBinding[VERT_ATTRIB_GENERIC(bindingIndex)].BufferObj; + vao->BufferBinding[VERT_ATTRIB_GENERIC(bindingIndex)].BufferObj->Name) { + vbo = vao->BufferBinding[VERT_ATTRIB_GENERIC(bindingIndex)].BufferObj; } else if (buffer != 0) { vbo = _mesa_lookup_bufferobj(ctx, buffer); @@ -1916,7 +1905,7 @@ if (buffers[i]) { struct gl_vertex_buffer_binding *binding = - &vao->VertexBinding[VERT_ATTRIB_GENERIC(first + i)]; + &vao->BufferBinding[VERT_ATTRIB_GENERIC(first + i)]; if (buffers[i] == binding->BufferObj->Name) vbo = binding->BufferObj; @@ -2309,16 +2298,14 @@ */ void _mesa_copy_client_array(struct gl_context *ctx, - struct gl_client_array *dst, - struct gl_client_array *src) + struct gl_vertex_array *dst, + struct gl_vertex_array *src) { dst->Size = src->Size; dst->Type = src->Type; dst->Format = src->Format; - dst->Stride = src->Stride; dst->StrideB = src->StrideB; dst->Ptr = src->Ptr; - dst->Enabled = src->Enabled; dst->Normalized = src->Normalized; dst->Integer = src->Integer; dst->Doubles = src->Doubles; @@ -2329,13 +2316,13 @@ void _mesa_copy_vertex_attrib_array(struct gl_context *ctx, - struct gl_vertex_attrib_array *dst, - const struct gl_vertex_attrib_array *src) + struct gl_array_attributes *dst, + const struct gl_array_attributes *src) { dst->Size = src->Size; dst->Type = src->Type; dst->Format = src->Format; - dst->VertexBinding = src->VertexBinding; + dst->BufferBindingIndex = src->BufferBindingIndex; dst->RelativeOffset = src->RelativeOffset; dst->Format = src->Format; dst->Integer = src->Integer; @@ -2360,44 +2347,32 @@ } /** - * Print vertex array's fields. - */ -static void -print_array(const char *name, GLint index, const struct gl_client_array *array) -{ - if (index >= 0) - fprintf(stderr, " %s[%d]: ", name, index); - else - fprintf(stderr, " %s: ", name); - fprintf(stderr, "Ptr=%p, Type=%s, Size=%d, ElemSize=%u, Stride=%d, Buffer=%u(Size %lu)\n", - array->Ptr, _mesa_enum_to_string(array->Type), array->Size, - array->_ElementSize, array->StrideB, array->BufferObj->Name, - (unsigned long) array->BufferObj->Size); -} - - -/** * Print current vertex object/array info. For debug. */ void _mesa_print_arrays(struct gl_context *ctx) { - struct gl_vertex_array_object *vao = ctx->Array.VAO; - GLuint i; + const struct gl_vertex_array_object *vao = ctx->Array.VAO; + + fprintf(stderr, "Array Object %u\n", vao->Name); - printf("Array Object %u\n", vao->Name); - if (vao->_VertexAttrib[VERT_ATTRIB_POS].Enabled) - print_array("Vertex", -1, &vao->_VertexAttrib[VERT_ATTRIB_POS]); - if (vao->_VertexAttrib[VERT_ATTRIB_NORMAL].Enabled) - print_array("Normal", -1, &vao->_VertexAttrib[VERT_ATTRIB_NORMAL]); - if (vao->_VertexAttrib[VERT_ATTRIB_COLOR0].Enabled) - print_array("Color", -1, &vao->_VertexAttrib[VERT_ATTRIB_COLOR0]); - for (i = 0; i < ctx->Const.MaxTextureCoordUnits; i++) - if (vao->_VertexAttrib[VERT_ATTRIB_TEX(i)].Enabled) - print_array("TexCoord", i, &vao->_VertexAttrib[VERT_ATTRIB_TEX(i)]); - for (i = 0; i < VERT_ATTRIB_GENERIC_MAX; i++) - if (vao->_VertexAttrib[VERT_ATTRIB_GENERIC(i)].Enabled) - print_array("Attrib", i, &vao->_VertexAttrib[VERT_ATTRIB_GENERIC(i)]); + unsigned i; + for (i = 0; i < VERT_ATTRIB_MAX; ++i) { + const struct gl_array_attributes *array = &vao->VertexAttrib[i]; + if (!array->Enabled) + continue; + + const struct gl_vertex_buffer_binding *binding = + &vao->BufferBinding[array->BufferBindingIndex]; + const struct gl_buffer_object *bo = binding->BufferObj; + + fprintf(stderr, " %s: Ptr=%p, Type=%s, Size=%d, ElemSize=%u, " + "Stride=%d, Buffer=%u(Size %lu)\n", + gl_vert_attrib_name((gl_vert_attrib)i), + array->Ptr, _mesa_enum_to_string(array->Type), array->Size, + array->_ElementSize, binding->Stride, bo->Name, + (unsigned long) bo->Size); + } } diff -Nru mesa-12.0.6/src/mesa/main/varray.h mesa-17.0.7/src/mesa/main/varray.h --- mesa-12.0.6/src/mesa/main/varray.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/varray.h 2017-06-01 10:37:10.000000000 +0000 @@ -31,7 +31,7 @@ #include "glheader.h" #include "bufferobj.h" -struct gl_client_array; +struct gl_vertex_array; struct gl_context; /** @@ -40,7 +40,7 @@ * a vertex buffer. */ static inline const GLubyte * -_mesa_vertex_attrib_address(const struct gl_vertex_attrib_array *array, +_mesa_vertex_attrib_address(const struct gl_array_attributes *array, const struct gl_vertex_buffer_binding *binding) { if (_mesa_is_bufferobj(binding->BufferObj)) @@ -50,22 +50,20 @@ } /** - * Sets the fields in a gl_client_array to values derived from a + * Sets the fields in a gl_vertex_array to values derived from a * gl_vertex_attrib_array and a gl_vertex_buffer_binding. */ static inline void _mesa_update_client_array(struct gl_context *ctx, - struct gl_client_array *dst, - const struct gl_vertex_attrib_array *src, + struct gl_vertex_array *dst, + const struct gl_array_attributes *src, const struct gl_vertex_buffer_binding *binding) { dst->Size = src->Size; dst->Type = src->Type; dst->Format = src->Format; - dst->Stride = src->Stride; dst->StrideB = binding->Stride; dst->Ptr = _mesa_vertex_attrib_address(src, binding); - dst->Enabled = src->Enabled; dst->Normalized = src->Normalized; dst->Integer = src->Integer; dst->Doubles = src->Doubles; @@ -375,13 +373,13 @@ extern void _mesa_copy_client_array(struct gl_context *ctx, - struct gl_client_array *dst, - struct gl_client_array *src); + struct gl_vertex_array *dst, + struct gl_vertex_array *src); extern void _mesa_copy_vertex_attrib_array(struct gl_context *ctx, - struct gl_vertex_attrib_array *dst, - const struct gl_vertex_attrib_array *src); + struct gl_array_attributes *dst, + const struct gl_array_attributes *src); extern void _mesa_copy_vertex_buffer_binding(struct gl_context *ctx, diff -Nru mesa-12.0.6/src/mesa/main/version.c mesa-17.0.7/src/mesa/main/version.c --- mesa-12.0.6/src/mesa/main/version.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/version.c 2017-06-01 10:37:10.000000000 +0000 @@ -111,7 +111,7 @@ } /** - * Builds the MESA version string. + * Builds the Mesa version string. */ static void create_version_string(struct gl_context *ctx, const char *prefix) @@ -530,18 +530,19 @@ extensions->ARB_gpu_shader5 && extensions->EXT_shader_integer_mix); const bool ver_3_2 = (ver_3_1 && - /*extensions->KHR_blend_equation_advanced*/ false && + extensions->KHR_blend_equation_advanced && + extensions->KHR_robustness && extensions->KHR_texture_compression_astc_ldr && extensions->OES_copy_image && extensions->ARB_draw_buffers_blend && extensions->ARB_draw_elements_base_vertex && extensions->OES_geometry_shader && - /*extensions->OES_primitive_bounding_box*/ false && + extensions->OES_primitive_bounding_box && extensions->OES_sample_variables && extensions->ARB_tessellation_shader && extensions->ARB_texture_border_clamp && extensions->OES_texture_buffer && - extensions->ARB_texture_cube_map_array && + extensions->OES_texture_cube_map_array && extensions->ARB_texture_stencil8); if (ver_3_2) { diff -Nru mesa-12.0.6/src/mesa/main/viewport.c mesa-17.0.7/src/mesa/main/viewport.c --- mesa-12.0.6/src/mesa/main/viewport.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/viewport.c 2017-06-01 10:37:10.000000000 +0000 @@ -52,7 +52,9 @@ * determined by calling GetFloatv with the symbolic constant * VIEWPORT_BOUNDS_RANGE (see section 6.1)." */ - if (ctx->Extensions.ARB_viewport_array) { + if (ctx->Extensions.ARB_viewport_array || + (ctx->Extensions.OES_viewport_array && + _mesa_is_gles31(ctx))) { x = CLAMP(x, ctx->Const.ViewportBounds.Min, ctx->Const.ViewportBounds.Max); y = CLAMP(y, @@ -330,6 +332,29 @@ ctx->Driver.DepthRange(ctx); } +void GLAPIENTRY +_mesa_DepthRangeArrayfvOES(GLuint first, GLsizei count, const GLfloat *v) +{ + int i; + GET_CURRENT_CONTEXT(ctx); + + if (MESA_VERBOSE & VERBOSE_API) + _mesa_debug(ctx, "glDepthRangeArrayfv %d %d\n", first, count); + + if ((first + count) > ctx->Const.MaxViewports) { + _mesa_error(ctx, GL_INVALID_VALUE, + "glDepthRangeArrayfv: first (%d) + count (%d) >= MaxViewports (%d)", + first, count, ctx->Const.MaxViewports); + return; + } + + for (i = 0; i < count; i++) + set_depth_range_no_notify(ctx, i + first, v[i * 2], v[i * 2 + 1]); + + if (ctx->Driver.DepthRange) + ctx->Driver.DepthRange(ctx); +} + /** * Update a single DepthRange * @@ -358,6 +383,12 @@ _mesa_set_depth_range(ctx, index, nearval, farval); } +void GLAPIENTRY +_mesa_DepthRangeIndexedfOES(GLuint index, GLfloat nearval, GLfloat farval) +{ + _mesa_DepthRangeIndexed(index, nearval, farval); +} + /** * Initialize the context viewport attribute group. * \param ctx the GL context. diff -Nru mesa-12.0.6/src/mesa/main/viewport.h mesa-17.0.7/src/mesa/main/viewport.h --- mesa-12.0.6/src/mesa/main/viewport.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/main/viewport.h 2017-06-01 10:37:10.000000000 +0000 @@ -58,8 +58,14 @@ _mesa_DepthRangeArrayv(GLuint first, GLsizei count, const GLclampd * v); extern void GLAPIENTRY +_mesa_DepthRangeArrayfvOES(GLuint first, GLsizei count, const GLfloat * v); + +extern void GLAPIENTRY _mesa_DepthRangeIndexed(GLuint index, GLclampd n, GLclampd f); +extern void GLAPIENTRY +_mesa_DepthRangeIndexedfOES(GLuint index, GLfloat n, GLfloat f); + extern void _mesa_set_depth_range(struct gl_context *ctx, unsigned idx, GLclampd nearval, GLclampd farval); diff -Nru mesa-12.0.6/src/mesa/Makefile.am mesa-17.0.7/src/mesa/Makefile.am --- mesa-12.0.6/src/mesa/Makefile.am 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -96,6 +96,7 @@ AM_CPPFLAGS = $(DEFINES) $(INCLUDE_DIRS) AM_CFLAGS = \ + $(VDPAU_CFLAGS) \ $(LLVM_CFLAGS) \ $(VISIBILITY_CFLAGS) \ $(MSVC2013_COMPAT_CFLAGS) diff -Nru mesa-12.0.6/src/mesa/Makefile.in mesa-17.0.7/src/mesa/Makefile.in --- mesa-12.0.6/src/mesa/Makefile.in 2017-01-24 01:41:55.000000000 +0000 +++ mesa-17.0.7/src/mesa/Makefile.in 2017-06-01 10:37:24.000000000 +0000 @@ -154,8 +154,9 @@ main/api_validate.c main/api_validate.h main/arbprogram.c \ main/arbprogram.h main/arrayobj.c main/arrayobj.h \ main/atifragshader.c main/atifragshader.h main/attrib.c \ - main/attrib.h main/blend.c main/blend.h main/blit.c \ - main/blit.h main/bufferobj.c main/bufferobj.h main/buffers.c \ + main/attrib.h main/barrier.c main/barrier.h main/bbox.c \ + main/bbox.h main/blend.c main/blend.h main/blit.c main/blit.h \ + main/bufferobj.c main/bufferobj.h main/buffers.c \ main/buffers.h main/clear.c main/clear.h main/clip.c \ main/clip.h main/colormac.h main/colortab.c main/colortab.h \ main/compute.c main/compute.h main/compiler.h \ @@ -169,8 +170,9 @@ main/enable.c main/enable.h main/enums.c main/enums.h \ main/errors.c main/errors.h main/eval.c main/eval.h \ main/execmem.c main/extensions.c main/extensions.h \ - main/extensions_table.h main/fbobject.c main/fbobject.h \ - main/feedback.c main/feedback.h main/ff_fragment_shader.cpp \ + main/extensions_table.c main/extensions_table.h \ + main/fbobject.c main/fbobject.h main/feedback.c \ + main/feedback.h main/ff_fragment_shader.cpp \ main/ffvertex_prog.c main/ffvertex_prog.h main/fog.c \ main/fog.h main/format_info.h main/format_pack.h \ main/format_pack.c main/format_unpack.h main/format_unpack.c \ @@ -216,8 +218,7 @@ main/texobj.c main/texobj.h main/texparam.c main/texparam.h \ main/texstate.c main/texstate.h main/texstorage.c \ main/texstorage.h main/texstore.c main/texstore.h \ - main/textureview.c main/textureview.h main/texturebarrier.c \ - main/texturebarrier.h main/transformfeedback.c \ + main/textureview.c main/textureview.h main/transformfeedback.c \ main/transformfeedback.h main/uniform_query.cpp \ main/uniforms.c main/uniforms.h main/varray.c main/varray.h \ main/vdpau.c main/vdpau.h main/version.c main/version.h \ @@ -271,17 +272,16 @@ swrast_setup/ss_context.c swrast_setup/ss_context.h \ swrast_setup/ss_triangle.c swrast_setup/ss_triangle.h \ drivers/common/driverfuncs.c drivers/common/driverfuncs.h \ - drivers/common/meta_blit.c drivers/common/meta_copy_image.c \ + drivers/common/meta_blit.c \ drivers/common/meta_generate_mipmap.c \ drivers/common/meta_tex_subimage.c drivers/common/meta.c \ drivers/common/meta.h x86/common_x86.c x86/x86_xform.c \ x86/3dnow.c x86/sse.c x86/rtasm/x86sse.c x86/rtasm/x86sse.h \ sparc/sparc.c x86-64/x86-64.c program/arbprogparse.c \ - program/arbprogparse.h program/hash_table.h \ - program/ir_to_mesa.cpp program/ir_to_mesa.h program/lex.yy.c \ - program/prog_cache.c program/prog_cache.h \ - program/prog_execute.c program/prog_execute.h \ - program/prog_hash_table.c program/prog_instruction.c \ + program/arbprogparse.h program/ir_to_mesa.cpp \ + program/ir_to_mesa.h program/lex.yy.c program/prog_cache.c \ + program/prog_cache.h program/prog_execute.c \ + program/prog_execute.h program/prog_instruction.c \ program/prog_instruction.h program/prog_noise.c \ program/prog_noise.h program/prog_opt_constant_fold.c \ program/prog_optimize.c program/prog_optimize.h \ @@ -293,10 +293,9 @@ program/program_parse_extra.c program/program_parse.tab.c \ program/program_parse.tab.h program/program_parser.h \ program/prog_statevars.c program/prog_statevars.h \ - program/string_to_uint_map.cpp program/symbol_table.c \ - program/symbol_table.h program/prog_to_nir.c \ - program/prog_to_nir.h x86-64/x86-64.h x86-64/xform4.S \ - x86/assyntax.h x86/clip_args.h x86/norm_args.h \ + program/symbol_table.c program/symbol_table.h \ + program/prog_to_nir.c program/prog_to_nir.h x86-64/x86-64.h \ + x86-64/xform4.S x86/assyntax.h x86/clip_args.h x86/norm_args.h \ x86/xform_args.h x86/common_x86_asm.S x86/common_x86_asm.h \ x86/common_x86_features.h x86/x86_xform.h x86/x86_xform2.S \ x86/x86_xform3.S x86/x86_xform4.S x86/x86_cliptest.S x86/mmx.h \ @@ -311,13 +310,14 @@ am__objects_2 = main/accum.lo main/api_arrayelt.lo main/api_exec.lo \ main/api_loopback.lo main/api_validate.lo main/arbprogram.lo \ main/arrayobj.lo main/atifragshader.lo main/attrib.lo \ - main/blend.lo main/blit.lo main/bufferobj.lo main/buffers.lo \ - main/clear.lo main/clip.lo main/colortab.lo main/compute.lo \ - main/condrender.lo main/context.lo main/convolve.lo \ - main/copyimage.lo main/cpuinfo.lo main/debug.lo \ - main/debug_output.lo main/depth.lo main/dlist.lo \ - main/drawpix.lo main/drawtex.lo main/enable.lo main/enums.lo \ - main/errors.lo main/eval.lo main/execmem.lo main/extensions.lo \ + main/barrier.lo main/bbox.lo main/blend.lo main/blit.lo \ + main/bufferobj.lo main/buffers.lo main/clear.lo main/clip.lo \ + main/colortab.lo main/compute.lo main/condrender.lo \ + main/context.lo main/convolve.lo main/copyimage.lo \ + main/cpuinfo.lo main/debug.lo main/debug_output.lo \ + main/depth.lo main/dlist.lo main/drawpix.lo main/drawtex.lo \ + main/enable.lo main/enums.lo main/errors.lo main/eval.lo \ + main/execmem.lo main/extensions.lo main/extensions_table.lo \ main/fbobject.lo main/feedback.lo main/ff_fragment_shader.lo \ main/ffvertex_prog.lo main/fog.lo main/format_pack.lo \ main/format_unpack.lo main/formatquery.lo main/formats.lo \ @@ -342,10 +342,10 @@ main/texenv.lo main/texformat.lo main/texgen.lo \ main/texgetimage.lo main/teximage.lo main/texobj.lo \ main/texparam.lo main/texstate.lo main/texstorage.lo \ - main/texstore.lo main/textureview.lo main/texturebarrier.lo \ - main/transformfeedback.lo main/uniform_query.lo \ - main/uniforms.lo main/varray.lo main/vdpau.lo main/version.lo \ - main/viewport.lo main/vtxfmt.lo $(am__objects_1) + main/texstore.lo main/textureview.lo main/transformfeedback.lo \ + main/uniform_query.lo main/uniforms.lo main/varray.lo \ + main/vdpau.lo main/version.lo main/viewport.lo main/vtxfmt.lo \ + $(am__objects_1) am__objects_3 = math/m_debug_clip.lo math/m_debug_norm.lo \ math/m_debug_xform.lo math/m_eval.lo math/m_matrix.lo \ math/m_translate.lo math/m_vector.lo @@ -376,7 +376,7 @@ swrast/s_texture.lo swrast/s_triangle.lo swrast/s_zoom.lo am__objects_8 = swrast_setup/ss_context.lo swrast_setup/ss_triangle.lo am__objects_9 = drivers/common/driverfuncs.lo \ - drivers/common/meta_blit.lo drivers/common/meta_copy_image.lo \ + drivers/common/meta_blit.lo \ drivers/common/meta_generate_mipmap.lo \ drivers/common/meta_tex_subimage.lo drivers/common/meta.lo am__objects_10 = x86/common_x86.lo x86/x86_xform.lo x86/3dnow.lo \ @@ -386,14 +386,13 @@ $(am__objects_8) $(am__objects_9) $(am__objects_10) am__objects_12 = program/arbprogparse.lo program/ir_to_mesa.lo \ program/lex.yy.lo program/prog_cache.lo \ - program/prog_execute.lo program/prog_hash_table.lo \ - program/prog_instruction.lo program/prog_noise.lo \ - program/prog_opt_constant_fold.lo program/prog_optimize.lo \ - program/prog_parameter.lo program/prog_parameter_layout.lo \ - program/prog_print.lo program/program.lo program/programopt.lo \ + program/prog_execute.lo program/prog_instruction.lo \ + program/prog_noise.lo program/prog_opt_constant_fold.lo \ + program/prog_optimize.lo program/prog_parameter.lo \ + program/prog_parameter_layout.lo program/prog_print.lo \ + program/program.lo program/programopt.lo \ program/program_parse_extra.lo program/program_parse.tab.lo \ - program/prog_statevars.lo program/string_to_uint_map.lo \ - program/symbol_table.lo + program/prog_statevars.lo program/symbol_table.lo am__objects_13 = program/prog_to_nir.lo am__objects_14 = x86-64/xform4.lo @HAVE_X86_64_ASM_TRUE@@HAVE_X86_ASM_TRUE@am__objects_15 = \ @@ -436,8 +435,9 @@ main/api_validate.c main/api_validate.h main/arbprogram.c \ main/arbprogram.h main/arrayobj.c main/arrayobj.h \ main/atifragshader.c main/atifragshader.h main/attrib.c \ - main/attrib.h main/blend.c main/blend.h main/blit.c \ - main/blit.h main/bufferobj.c main/bufferobj.h main/buffers.c \ + main/attrib.h main/barrier.c main/barrier.h main/bbox.c \ + main/bbox.h main/blend.c main/blend.h main/blit.c main/blit.h \ + main/bufferobj.c main/bufferobj.h main/buffers.c \ main/buffers.h main/clear.c main/clear.h main/clip.c \ main/clip.h main/colormac.h main/colortab.c main/colortab.h \ main/compute.c main/compute.h main/compiler.h \ @@ -451,8 +451,9 @@ main/enable.c main/enable.h main/enums.c main/enums.h \ main/errors.c main/errors.h main/eval.c main/eval.h \ main/execmem.c main/extensions.c main/extensions.h \ - main/extensions_table.h main/fbobject.c main/fbobject.h \ - main/feedback.c main/feedback.h main/ff_fragment_shader.cpp \ + main/extensions_table.c main/extensions_table.h \ + main/fbobject.c main/fbobject.h main/feedback.c \ + main/feedback.h main/ff_fragment_shader.cpp \ main/ffvertex_prog.c main/ffvertex_prog.h main/fog.c \ main/fog.h main/format_info.h main/format_pack.h \ main/format_pack.c main/format_unpack.h main/format_unpack.c \ @@ -498,8 +499,7 @@ main/texobj.c main/texobj.h main/texparam.c main/texparam.h \ main/texstate.c main/texstate.h main/texstorage.c \ main/texstorage.h main/texstore.c main/texstore.h \ - main/textureview.c main/textureview.h main/texturebarrier.c \ - main/texturebarrier.h main/transformfeedback.c \ + main/textureview.c main/textureview.h main/transformfeedback.c \ main/transformfeedback.h main/uniform_query.cpp \ main/uniforms.c main/uniforms.h main/varray.c main/varray.h \ main/vdpau.c main/vdpau.h main/version.c main/version.h \ @@ -525,7 +525,8 @@ state_tracker/st_atom_clip.c state_tracker/st_atom_constbuf.c \ state_tracker/st_atom_constbuf.h state_tracker/st_atom_depth.c \ state_tracker/st_atom_framebuffer.c state_tracker/st_atom.h \ - state_tracker/st_atom_image.c state_tracker/st_atom_msaa.c \ + state_tracker/st_atom_list.h state_tracker/st_atom_image.c \ + state_tracker/st_atom_msaa.c \ state_tracker/st_atom_pixeltransfer.c \ state_tracker/st_atom_rasterizer.c \ state_tracker/st_atom_sampler.c \ @@ -583,14 +584,19 @@ state_tracker/st_mesa_to_tgsi.c \ state_tracker/st_mesa_to_tgsi.h state_tracker/st_nir.h \ state_tracker/st_nir_lower_builtin.c \ + state_tracker/st_nir_lower_tex_src_plane.c \ + state_tracker/st_pbo.c state_tracker/st_pbo.h \ state_tracker/st_program.c state_tracker/st_program.h \ - state_tracker/st_texture.c state_tracker/st_texture.h \ - state_tracker/st_vdpau.c state_tracker/st_vdpau.h \ - x86/common_x86.c program/arbprogparse.c program/arbprogparse.h \ - program/hash_table.h program/ir_to_mesa.cpp \ - program/ir_to_mesa.h program/lex.yy.c program/prog_cache.c \ - program/prog_cache.h program/prog_execute.c \ - program/prog_execute.h program/prog_hash_table.c \ + state_tracker/st_sampler_view.c \ + state_tracker/st_sampler_view.h state_tracker/st_scissor.c \ + state_tracker/st_scissor.h state_tracker/st_texture.c \ + state_tracker/st_texture.h state_tracker/st_tgsi_lower_yuv.c \ + state_tracker/st_tgsi_lower_yuv.h state_tracker/st_vdpau.c \ + state_tracker/st_vdpau.h x86/common_x86.c \ + program/arbprogparse.c program/arbprogparse.h \ + program/ir_to_mesa.cpp program/ir_to_mesa.h program/lex.yy.c \ + program/prog_cache.c program/prog_cache.h \ + program/prog_execute.c program/prog_execute.h \ program/prog_instruction.c program/prog_instruction.h \ program/prog_noise.c program/prog_noise.h \ program/prog_opt_constant_fold.c program/prog_optimize.c \ @@ -602,10 +608,9 @@ program/program_parse_extra.c program/program_parse.tab.c \ program/program_parse.tab.h program/program_parser.h \ program/prog_statevars.c program/prog_statevars.h \ - program/string_to_uint_map.cpp program/symbol_table.c \ - program/symbol_table.h program/prog_to_nir.c \ - program/prog_to_nir.h x86-64/x86-64.h x86-64/xform4.S \ - x86/assyntax.h x86/clip_args.h x86/norm_args.h \ + program/symbol_table.c program/symbol_table.h \ + program/prog_to_nir.c program/prog_to_nir.h x86-64/x86-64.h \ + x86-64/xform4.S x86/assyntax.h x86/clip_args.h x86/norm_args.h \ x86/xform_args.h x86/common_x86_asm.S x86/common_x86_asm.h \ x86/common_x86_features.h x86/x86_xform.h x86/x86_xform2.S \ x86/x86_xform3.S x86/x86_xform4.S x86/x86_cliptest.S x86/mmx.h \ @@ -661,7 +666,10 @@ state_tracker/st_glsl_types.lo state_tracker/st_manager.lo \ state_tracker/st_mesa_to_tgsi.lo \ state_tracker/st_nir_lower_builtin.lo \ - state_tracker/st_program.lo state_tracker/st_texture.lo \ + state_tracker/st_nir_lower_tex_src_plane.lo \ + state_tracker/st_pbo.lo state_tracker/st_program.lo \ + state_tracker/st_sampler_view.lo state_tracker/st_scissor.lo \ + state_tracker/st_texture.lo state_tracker/st_tgsi_lower_yuv.lo \ state_tracker/st_vdpau.lo am__objects_23 = $(am__objects_2) $(am__objects_3) $(am__objects_5) \ $(am__objects_22) x86/common_x86.lo @@ -816,6 +824,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -830,6 +840,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -859,10 +870,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -912,11 +924,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -956,8 +965,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -994,8 +1001,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -1004,7 +1009,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -1012,13 +1016,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -1047,6 +1052,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -1135,6 +1141,10 @@ main/atifragshader.h \ main/attrib.c \ main/attrib.h \ + main/barrier.c \ + main/barrier.h \ + main/bbox.c \ + main/bbox.h \ main/blend.c \ main/blend.h \ main/blit.c \ @@ -1190,6 +1200,7 @@ main/execmem.c \ main/extensions.c \ main/extensions.h \ + main/extensions_table.c \ main/extensions_table.h \ main/fbobject.c \ main/fbobject.h \ @@ -1340,8 +1351,6 @@ main/texstore.h \ main/textureview.c \ main/textureview.h \ - main/texturebarrier.c \ - main/texturebarrier.h \ main/transformfeedback.c \ main/transformfeedback.h \ main/uniform_query.cpp \ @@ -1519,6 +1528,7 @@ state_tracker/st_atom_depth.c \ state_tracker/st_atom_framebuffer.c \ state_tracker/st_atom.h \ + state_tracker/st_atom_list.h \ state_tracker/st_atom_image.c \ state_tracker/st_atom_msaa.c \ state_tracker/st_atom_pixeltransfer.c \ @@ -1612,17 +1622,25 @@ state_tracker/st_mesa_to_tgsi.h \ state_tracker/st_nir.h \ state_tracker/st_nir_lower_builtin.c \ + state_tracker/st_nir_lower_tex_src_plane.c \ + state_tracker/st_pbo.c \ + state_tracker/st_pbo.h \ state_tracker/st_program.c \ state_tracker/st_program.h \ + state_tracker/st_sampler_view.c \ + state_tracker/st_sampler_view.h \ + state_tracker/st_scissor.c \ + state_tracker/st_scissor.h \ state_tracker/st_texture.c \ state_tracker/st_texture.h \ + state_tracker/st_tgsi_lower_yuv.c \ + state_tracker/st_tgsi_lower_yuv.h \ state_tracker/st_vdpau.c \ state_tracker/st_vdpau.h PROGRAM_FILES = \ program/arbprogparse.c \ program/arbprogparse.h \ - program/hash_table.h \ program/ir_to_mesa.cpp \ program/ir_to_mesa.h \ program/lex.yy.c \ @@ -1630,7 +1648,6 @@ program/prog_cache.h \ program/prog_execute.c \ program/prog_execute.h \ - program/prog_hash_table.c \ program/prog_instruction.c \ program/prog_instruction.h \ program/prog_noise.c \ @@ -1654,7 +1671,6 @@ program/program_parser.h \ program/prog_statevars.c \ program/prog_statevars.h \ - program/string_to_uint_map.cpp \ program/symbol_table.c \ program/symbol_table.h @@ -1722,7 +1738,6 @@ drivers/common/driverfuncs.c \ drivers/common/driverfuncs.h \ drivers/common/meta_blit.c \ - drivers/common/meta_copy_image.c \ drivers/common/meta_generate_mipmap.c \ drivers/common/meta_tex_subimage.c \ drivers/common/meta.c \ @@ -1756,6 +1771,7 @@ -I$(top_srcdir)/include \ -I$(top_builddir)/src \ -I$(top_srcdir)/src \ + -I$(top_builddir)/src/compiler/glsl \ -I$(top_builddir)/src/compiler/nir \ -I$(top_builddir)/src/mesa \ -I$(top_srcdir)/src/mesa \ @@ -1796,6 +1812,7 @@ AM_CPPFLAGS = $(DEFINES) $(INCLUDE_DIRS) $(am__append_9) \ $(am__append_11) $(am__append_13) AM_CFLAGS = \ + $(VDPAU_CFLAGS) \ $(LLVM_CFLAGS) \ $(VISIBILITY_CFLAGS) \ $(MSVC2013_COMPAT_CFLAGS) @@ -1915,6 +1932,8 @@ main/atifragshader.lo: main/$(am__dirstamp) \ main/$(DEPDIR)/$(am__dirstamp) main/attrib.lo: main/$(am__dirstamp) main/$(DEPDIR)/$(am__dirstamp) +main/barrier.lo: main/$(am__dirstamp) main/$(DEPDIR)/$(am__dirstamp) +main/bbox.lo: main/$(am__dirstamp) main/$(DEPDIR)/$(am__dirstamp) main/blend.lo: main/$(am__dirstamp) main/$(DEPDIR)/$(am__dirstamp) main/blit.lo: main/$(am__dirstamp) main/$(DEPDIR)/$(am__dirstamp) main/bufferobj.lo: main/$(am__dirstamp) main/$(DEPDIR)/$(am__dirstamp) @@ -1943,6 +1962,8 @@ main/execmem.lo: main/$(am__dirstamp) main/$(DEPDIR)/$(am__dirstamp) main/extensions.lo: main/$(am__dirstamp) \ main/$(DEPDIR)/$(am__dirstamp) +main/extensions_table.lo: main/$(am__dirstamp) \ + main/$(DEPDIR)/$(am__dirstamp) main/fbobject.lo: main/$(am__dirstamp) main/$(DEPDIR)/$(am__dirstamp) main/feedback.lo: main/$(am__dirstamp) main/$(DEPDIR)/$(am__dirstamp) main/ff_fragment_shader.lo: main/$(am__dirstamp) \ @@ -2047,8 +2068,6 @@ main/texstore.lo: main/$(am__dirstamp) main/$(DEPDIR)/$(am__dirstamp) main/textureview.lo: main/$(am__dirstamp) \ main/$(DEPDIR)/$(am__dirstamp) -main/texturebarrier.lo: main/$(am__dirstamp) \ - main/$(DEPDIR)/$(am__dirstamp) main/transformfeedback.lo: main/$(am__dirstamp) \ main/$(DEPDIR)/$(am__dirstamp) main/uniform_query.lo: main/$(am__dirstamp) \ @@ -2218,8 +2237,6 @@ drivers/common/$(DEPDIR)/$(am__dirstamp) drivers/common/meta_blit.lo: drivers/common/$(am__dirstamp) \ drivers/common/$(DEPDIR)/$(am__dirstamp) -drivers/common/meta_copy_image.lo: drivers/common/$(am__dirstamp) \ - drivers/common/$(DEPDIR)/$(am__dirstamp) drivers/common/meta_generate_mipmap.lo: \ drivers/common/$(am__dirstamp) \ drivers/common/$(DEPDIR)/$(am__dirstamp) @@ -2276,8 +2293,6 @@ program/$(DEPDIR)/$(am__dirstamp) program/prog_execute.lo: program/$(am__dirstamp) \ program/$(DEPDIR)/$(am__dirstamp) -program/prog_hash_table.lo: program/$(am__dirstamp) \ - program/$(DEPDIR)/$(am__dirstamp) program/prog_instruction.lo: program/$(am__dirstamp) \ program/$(DEPDIR)/$(am__dirstamp) program/prog_noise.lo: program/$(am__dirstamp) \ @@ -2302,8 +2317,6 @@ program/$(DEPDIR)/$(am__dirstamp) program/prog_statevars.lo: program/$(am__dirstamp) \ program/$(DEPDIR)/$(am__dirstamp) -program/string_to_uint_map.lo: program/$(am__dirstamp) \ - program/$(DEPDIR)/$(am__dirstamp) program/symbol_table.lo: program/$(am__dirstamp) \ program/$(DEPDIR)/$(am__dirstamp) program/prog_to_nir.lo: program/$(am__dirstamp) \ @@ -2473,10 +2486,21 @@ state_tracker/$(DEPDIR)/$(am__dirstamp) state_tracker/st_nir_lower_builtin.lo: state_tracker/$(am__dirstamp) \ state_tracker/$(DEPDIR)/$(am__dirstamp) +state_tracker/st_nir_lower_tex_src_plane.lo: \ + state_tracker/$(am__dirstamp) \ + state_tracker/$(DEPDIR)/$(am__dirstamp) +state_tracker/st_pbo.lo: state_tracker/$(am__dirstamp) \ + state_tracker/$(DEPDIR)/$(am__dirstamp) state_tracker/st_program.lo: state_tracker/$(am__dirstamp) \ state_tracker/$(DEPDIR)/$(am__dirstamp) +state_tracker/st_sampler_view.lo: state_tracker/$(am__dirstamp) \ + state_tracker/$(DEPDIR)/$(am__dirstamp) +state_tracker/st_scissor.lo: state_tracker/$(am__dirstamp) \ + state_tracker/$(DEPDIR)/$(am__dirstamp) state_tracker/st_texture.lo: state_tracker/$(am__dirstamp) \ state_tracker/$(DEPDIR)/$(am__dirstamp) +state_tracker/st_tgsi_lower_yuv.lo: state_tracker/$(am__dirstamp) \ + state_tracker/$(DEPDIR)/$(am__dirstamp) state_tracker/st_vdpau.lo: state_tracker/$(am__dirstamp) \ state_tracker/$(DEPDIR)/$(am__dirstamp) @@ -2533,7 +2557,6 @@ @AMDEP_TRUE@@am__include@ @am__quote@drivers/common/$(DEPDIR)/driverfuncs.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@drivers/common/$(DEPDIR)/meta.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@drivers/common/$(DEPDIR)/meta_blit.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@drivers/common/$(DEPDIR)/meta_copy_image.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@drivers/common/$(DEPDIR)/meta_generate_mipmap.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@drivers/common/$(DEPDIR)/meta_tex_subimage.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@main/$(DEPDIR)/accum.Plo@am__quote@ @@ -2545,6 +2568,8 @@ @AMDEP_TRUE@@am__include@ @am__quote@main/$(DEPDIR)/arrayobj.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@main/$(DEPDIR)/atifragshader.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@main/$(DEPDIR)/attrib.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@main/$(DEPDIR)/barrier.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@main/$(DEPDIR)/bbox.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@main/$(DEPDIR)/blend.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@main/$(DEPDIR)/blit.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@main/$(DEPDIR)/bufferobj.Plo@am__quote@ @@ -2571,6 +2596,7 @@ @AMDEP_TRUE@@am__include@ @am__quote@main/$(DEPDIR)/eval.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@main/$(DEPDIR)/execmem.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@main/$(DEPDIR)/extensions.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@main/$(DEPDIR)/extensions_table.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@main/$(DEPDIR)/fbobject.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@main/$(DEPDIR)/feedback.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@main/$(DEPDIR)/ff_fragment_shader.Plo@am__quote@ @@ -2645,7 +2671,6 @@ @AMDEP_TRUE@@am__include@ @am__quote@main/$(DEPDIR)/texstate.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@main/$(DEPDIR)/texstorage.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@main/$(DEPDIR)/texstore.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@main/$(DEPDIR)/texturebarrier.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@main/$(DEPDIR)/textureview.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@main/$(DEPDIR)/transformfeedback.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@main/$(DEPDIR)/uniform_query.Plo@am__quote@ @@ -2668,7 +2693,6 @@ @AMDEP_TRUE@@am__include@ @am__quote@program/$(DEPDIR)/lex.yy.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@program/$(DEPDIR)/prog_cache.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@program/$(DEPDIR)/prog_execute.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@program/$(DEPDIR)/prog_hash_table.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@program/$(DEPDIR)/prog_instruction.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@program/$(DEPDIR)/prog_noise.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@program/$(DEPDIR)/prog_opt_constant_fold.Plo@am__quote@ @@ -2682,7 +2706,6 @@ @AMDEP_TRUE@@am__include@ @am__quote@program/$(DEPDIR)/program_parse.tab.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@program/$(DEPDIR)/program_parse_extra.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@program/$(DEPDIR)/programopt.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@program/$(DEPDIR)/string_to_uint_map.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@program/$(DEPDIR)/symbol_table.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@sparc/$(DEPDIR)/norm.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@sparc/$(DEPDIR)/sparc.Plo@am__quote@ @@ -2750,8 +2773,13 @@ @AMDEP_TRUE@@am__include@ @am__quote@state_tracker/$(DEPDIR)/st_manager.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@state_tracker/$(DEPDIR)/st_mesa_to_tgsi.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@state_tracker/$(DEPDIR)/st_nir_lower_builtin.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@state_tracker/$(DEPDIR)/st_nir_lower_tex_src_plane.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@state_tracker/$(DEPDIR)/st_pbo.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@state_tracker/$(DEPDIR)/st_program.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@state_tracker/$(DEPDIR)/st_sampler_view.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@state_tracker/$(DEPDIR)/st_scissor.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@state_tracker/$(DEPDIR)/st_texture.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@state_tracker/$(DEPDIR)/st_tgsi_lower_yuv.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@state_tracker/$(DEPDIR)/st_vdpau.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@swrast/$(DEPDIR)/s_aaline.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@swrast/$(DEPDIR)/s_aatriangle.Plo@am__quote@ diff -Nru mesa-12.0.6/src/mesa/Makefile.sources mesa-17.0.7/src/mesa/Makefile.sources --- mesa-12.0.6/src/mesa/Makefile.sources 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/Makefile.sources 2017-06-01 10:37:10.000000000 +0000 @@ -24,6 +24,10 @@ main/atifragshader.h \ main/attrib.c \ main/attrib.h \ + main/barrier.c \ + main/barrier.h \ + main/bbox.c \ + main/bbox.h \ main/blend.c \ main/blend.h \ main/blit.c \ @@ -79,6 +83,7 @@ main/execmem.c \ main/extensions.c \ main/extensions.h \ + main/extensions_table.c \ main/extensions_table.h \ main/fbobject.c \ main/fbobject.h \ @@ -229,8 +234,6 @@ main/texstore.h \ main/textureview.c \ main/textureview.h \ - main/texturebarrier.c \ - main/texturebarrier.h \ main/transformfeedback.c \ main/transformfeedback.h \ main/uniform_query.cpp \ @@ -408,6 +411,7 @@ state_tracker/st_atom_depth.c \ state_tracker/st_atom_framebuffer.c \ state_tracker/st_atom.h \ + state_tracker/st_atom_list.h \ state_tracker/st_atom_image.c \ state_tracker/st_atom_msaa.c \ state_tracker/st_atom_pixeltransfer.c \ @@ -501,17 +505,25 @@ state_tracker/st_mesa_to_tgsi.h \ state_tracker/st_nir.h \ state_tracker/st_nir_lower_builtin.c \ + state_tracker/st_nir_lower_tex_src_plane.c \ + state_tracker/st_pbo.c \ + state_tracker/st_pbo.h \ state_tracker/st_program.c \ state_tracker/st_program.h \ + state_tracker/st_sampler_view.c \ + state_tracker/st_sampler_view.h \ + state_tracker/st_scissor.c \ + state_tracker/st_scissor.h \ state_tracker/st_texture.c \ state_tracker/st_texture.h \ + state_tracker/st_tgsi_lower_yuv.c \ + state_tracker/st_tgsi_lower_yuv.h \ state_tracker/st_vdpau.c \ state_tracker/st_vdpau.h PROGRAM_FILES = \ program/arbprogparse.c \ program/arbprogparse.h \ - program/hash_table.h \ program/ir_to_mesa.cpp \ program/ir_to_mesa.h \ program/lex.yy.c \ @@ -519,7 +531,6 @@ program/prog_cache.h \ program/prog_execute.c \ program/prog_execute.h \ - program/prog_hash_table.c \ program/prog_instruction.c \ program/prog_instruction.h \ program/prog_noise.c \ @@ -543,7 +554,6 @@ program/program_parser.h \ program/prog_statevars.c \ program/prog_statevars.h \ - program/string_to_uint_map.cpp \ program/symbol_table.c \ program/symbol_table.h @@ -611,7 +621,6 @@ drivers/common/driverfuncs.c \ drivers/common/driverfuncs.h \ drivers/common/meta_blit.c \ - drivers/common/meta_copy_image.c \ drivers/common/meta_generate_mipmap.c \ drivers/common/meta_tex_subimage.c \ drivers/common/meta.c \ @@ -644,6 +653,7 @@ -I$(top_srcdir)/include \ -I$(top_builddir)/src \ -I$(top_srcdir)/src \ + -I$(top_builddir)/src/compiler/glsl \ -I$(top_builddir)/src/compiler/nir \ -I$(top_builddir)/src/mesa \ -I$(top_srcdir)/src/mesa \ diff -Nru mesa-12.0.6/src/mesa/program/arbprogparse.c mesa-17.0.7/src/mesa/program/arbprogparse.c --- mesa-12.0.6/src/mesa/program/arbprogparse.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/arbprogparse.c 2017-06-01 10:37:10.000000000 +0000 @@ -67,7 +67,7 @@ void _mesa_parse_arb_fragment_program(struct gl_context* ctx, GLenum target, const GLvoid *str, GLsizei len, - struct gl_fragment_program *program) + struct gl_program *program) { struct gl_program prog; struct asm_parser_state state; @@ -85,49 +85,48 @@ return; } - free(program->Base.String); + ralloc_free(program->String); /* Copy the relevant contents of the arb_program struct into the * fragment_program struct. */ - program->Base.String = prog.String; - program->Base.NumInstructions = prog.NumInstructions; - program->Base.NumTemporaries = prog.NumTemporaries; - program->Base.NumParameters = prog.NumParameters; - program->Base.NumAttributes = prog.NumAttributes; - program->Base.NumAddressRegs = prog.NumAddressRegs; - program->Base.NumNativeInstructions = prog.NumNativeInstructions; - program->Base.NumNativeTemporaries = prog.NumNativeTemporaries; - program->Base.NumNativeParameters = prog.NumNativeParameters; - program->Base.NumNativeAttributes = prog.NumNativeAttributes; - program->Base.NumNativeAddressRegs = prog.NumNativeAddressRegs; - program->Base.NumAluInstructions = prog.NumAluInstructions; - program->Base.NumTexInstructions = prog.NumTexInstructions; - program->Base.NumTexIndirections = prog.NumTexIndirections; - program->Base.NumNativeAluInstructions = prog.NumAluInstructions; - program->Base.NumNativeTexInstructions = prog.NumTexInstructions; - program->Base.NumNativeTexIndirections = prog.NumTexIndirections; - program->Base.InputsRead = prog.InputsRead; - program->Base.OutputsWritten = prog.OutputsWritten; - program->Base.IndirectRegisterFiles = prog.IndirectRegisterFiles; + program->String = prog.String; + program->arb.NumInstructions = prog.arb.NumInstructions; + program->arb.NumTemporaries = prog.arb.NumTemporaries; + program->arb.NumParameters = prog.arb.NumParameters; + program->arb.NumAttributes = prog.arb.NumAttributes; + program->arb.NumAddressRegs = prog.arb.NumAddressRegs; + program->arb.NumNativeInstructions = prog.arb.NumNativeInstructions; + program->arb.NumNativeTemporaries = prog.arb.NumNativeTemporaries; + program->arb.NumNativeParameters = prog.arb.NumNativeParameters; + program->arb.NumNativeAttributes = prog.arb.NumNativeAttributes; + program->arb.NumNativeAddressRegs = prog.arb.NumNativeAddressRegs; + program->arb.NumAluInstructions = prog.arb.NumAluInstructions; + program->arb.NumTexInstructions = prog.arb.NumTexInstructions; + program->arb.NumTexIndirections = prog.arb.NumTexIndirections; + program->arb.NumNativeAluInstructions = prog.arb.NumAluInstructions; + program->arb.NumNativeTexInstructions = prog.arb.NumTexInstructions; + program->arb.NumNativeTexIndirections = prog.arb.NumTexIndirections; + program->info.inputs_read = prog.info.inputs_read; + program->info.outputs_written = prog.info.outputs_written; + program->arb.IndirectRegisterFiles = prog.arb.IndirectRegisterFiles; for (i = 0; i < MAX_TEXTURE_IMAGE_UNITS; i++) { - program->Base.TexturesUsed[i] = prog.TexturesUsed[i]; + program->TexturesUsed[i] = prog.TexturesUsed[i]; if (prog.TexturesUsed[i]) - program->Base.SamplersUsed |= (1 << i); + program->SamplersUsed |= (1 << i); } - program->Base.ShadowSamplers = prog.ShadowSamplers; + program->ShadowSamplers = prog.ShadowSamplers; program->OriginUpperLeft = state.option.OriginUpperLeft; program->PixelCenterInteger = state.option.PixelCenterInteger; - program->UsesKill = state.fragment.UsesKill; - program->UsesDFdy = state.fragment.UsesDFdy; + program->info.fs.uses_discard = state.fragment.UsesKill; - free(program->Base.Instructions); - program->Base.Instructions = prog.Instructions; + ralloc_free(program->arb.Instructions); + program->arb.Instructions = prog.arb.Instructions; - if (program->Base.Parameters) - _mesa_free_parameter_list(program->Base.Parameters); - program->Base.Parameters = prog.Parameters; + if (program->Parameters) + _mesa_free_parameter_list(program->Parameters); + program->Parameters = prog.Parameters; /* Append fog instructions now if the program has "OPTION ARB_fog_exp" * or similar. We used to leave this up to drivers, but it appears @@ -146,7 +145,7 @@ } #if DEBUG_FP - printf("____________Fragment program %u ________\n", program->Base.Id); + printf("____________Fragment program %u ________\n", program->Id); _mesa_print_program(&program->Base); #endif } @@ -161,7 +160,7 @@ void _mesa_parse_arb_vertex_program(struct gl_context *ctx, GLenum target, const GLvoid *str, GLsizei len, - struct gl_vertex_program *program) + struct gl_program *program) { struct gl_program prog; struct asm_parser_state state; @@ -171,47 +170,50 @@ memset(&prog, 0, sizeof(prog)); memset(&state, 0, sizeof(state)); state.prog = &prog; + state.mem_ctx = program; if (!_mesa_parse_arb_program(ctx, target, (const GLubyte*) str, len, &state)) { + ralloc_free(prog.arb.Instructions); + ralloc_free(prog.String); _mesa_error(ctx, GL_INVALID_OPERATION, "glProgramString(bad program)"); return; } if ((ctx->_Shader->Flags & GLSL_NO_OPT) == 0) - _mesa_optimize_program(ctx, &prog); + _mesa_optimize_program(ctx, &prog, program); - free(program->Base.String); + ralloc_free(program->String); /* Copy the relevant contents of the arb_program struct into the * vertex_program struct. */ - program->Base.String = prog.String; - program->Base.NumInstructions = prog.NumInstructions; - program->Base.NumTemporaries = prog.NumTemporaries; - program->Base.NumParameters = prog.NumParameters; - program->Base.NumAttributes = prog.NumAttributes; - program->Base.NumAddressRegs = prog.NumAddressRegs; - program->Base.NumNativeInstructions = prog.NumNativeInstructions; - program->Base.NumNativeTemporaries = prog.NumNativeTemporaries; - program->Base.NumNativeParameters = prog.NumNativeParameters; - program->Base.NumNativeAttributes = prog.NumNativeAttributes; - program->Base.NumNativeAddressRegs = prog.NumNativeAddressRegs; - program->Base.InputsRead = prog.InputsRead; - program->Base.OutputsWritten = prog.OutputsWritten; - program->Base.IndirectRegisterFiles = prog.IndirectRegisterFiles; - program->IsPositionInvariant = (state.option.PositionInvariant) + program->String = prog.String; + program->arb.NumInstructions = prog.arb.NumInstructions; + program->arb.NumTemporaries = prog.arb.NumTemporaries; + program->arb.NumParameters = prog.arb.NumParameters; + program->arb.NumAttributes = prog.arb.NumAttributes; + program->arb.NumAddressRegs = prog.arb.NumAddressRegs; + program->arb.NumNativeInstructions = prog.arb.NumNativeInstructions; + program->arb.NumNativeTemporaries = prog.arb.NumNativeTemporaries; + program->arb.NumNativeParameters = prog.arb.NumNativeParameters; + program->arb.NumNativeAttributes = prog.arb.NumNativeAttributes; + program->arb.NumNativeAddressRegs = prog.arb.NumNativeAddressRegs; + program->info.inputs_read = prog.info.inputs_read; + program->info.outputs_written = prog.info.outputs_written; + program->arb.IndirectRegisterFiles = prog.arb.IndirectRegisterFiles; + program->arb.IsPositionInvariant = (state.option.PositionInvariant) ? GL_TRUE : GL_FALSE; - free(program->Base.Instructions); - program->Base.Instructions = prog.Instructions; + ralloc_free(program->arb.Instructions); + program->arb.Instructions = prog.arb.Instructions; - if (program->Base.Parameters) - _mesa_free_parameter_list(program->Base.Parameters); - program->Base.Parameters = prog.Parameters; + if (program->Parameters) + _mesa_free_parameter_list(program->Parameters); + program->Parameters = prog.Parameters; #if DEBUG_VP - printf("____________Vertex program %u __________\n", program->Base.Id); - _mesa_print_program(&program->Base); + printf("____________Vertex program %u __________\n", program->Id); + _mesa_print_program(program); #endif } diff -Nru mesa-12.0.6/src/mesa/program/arbprogparse.h mesa-17.0.7/src/mesa/program/arbprogparse.h --- mesa-12.0.6/src/mesa/program/arbprogparse.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/arbprogparse.h 2017-06-01 10:37:10.000000000 +0000 @@ -29,17 +29,16 @@ #include "main/glheader.h" struct gl_context; -struct gl_fragment_program; -struct gl_vertex_program; +struct gl_program; extern void _mesa_parse_arb_vertex_program(struct gl_context *ctx, GLenum target, const GLvoid *str, GLsizei len, - struct gl_vertex_program *program); + struct gl_program *program); extern void _mesa_parse_arb_fragment_program(struct gl_context *ctx, GLenum target, const GLvoid *str, GLsizei len, - struct gl_fragment_program *program); + struct gl_program *program); #endif diff -Nru mesa-12.0.6/src/mesa/program/hash_table.h mesa-17.0.7/src/mesa/program/hash_table.h --- mesa-12.0.6/src/mesa/program/hash_table.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/hash_table.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,323 +0,0 @@ -/* - * Copyright © 2008 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -/** - * \file hash_table.h - * \brief Implementation of a generic, opaque hash table data type. - * - * \author Ian Romanick - */ - -#ifndef HASH_TABLE_H -#define HASH_TABLE_H - -#include -#include -#include -#include -#include -#include - -struct string_to_uint_map; - -#ifdef __cplusplus -extern "C" { -#endif - -struct hash_table; - -typedef unsigned (*hash_func_t)(const void *key); -typedef int (*hash_compare_func_t)(const void *key1, const void *key2); - -/** - * Hash table constructor - * - * Creates a hash table with the specified number of buckets. The supplied - * \c hash and \c compare routines are used when adding elements to the table - * and when searching for elements in the table. - * - * \param num_buckets Number of buckets (bins) in the hash table. - * \param hash Function used to compute hash value of input keys. - * \param compare Function used to compare keys. - */ -extern struct hash_table *hash_table_ctor(unsigned num_buckets, - hash_func_t hash, hash_compare_func_t compare); - - -/** - * Release all memory associated with a hash table - * - * \warning - * This function cannot release memory occupied either by keys or data. - */ -extern void hash_table_dtor(struct hash_table *ht); - - -/** - * Flush all entries from a hash table - * - * \param ht Table to be cleared of its entries. - */ -extern void hash_table_clear(struct hash_table *ht); - - -/** - * Search a hash table for a specific element - * - * \param ht Table to be searched - * \param key Key of the desired element - * - * \return - * The \c data value supplied to \c hash_table_insert when the element with - * the matching key was added. If no matching key exists in the table, - * \c NULL is returned. - */ -extern void *hash_table_find(struct hash_table *ht, const void *key); - - -/** - * Add an element to a hash table - * - * \warning - * If \c key is already in the hash table, it will be added again. Future - * calls to \c hash_table_find and \c hash_table_remove will return or remove, - * repsectively, the most recently added instance of \c key. - * - * \warning - * The value passed by \c key is kept in the hash table and is used by later - * calls to \c hash_table_find. - * - * \sa hash_table_replace - */ -extern void hash_table_insert(struct hash_table *ht, void *data, - const void *key); - -/** - * Add an element to a hash table with replacement - * - * \return - * 1 if it did replace the value (in which case the old key is kept), 0 if it - * did not replace the value (in which case the new key is kept). - * - * \warning - * If \c key is already in the hash table, \c data will \b replace the most - * recently inserted \c data (see the warning in \c hash_table_insert) for - * that key. - * - * \sa hash_table_insert - */ -extern bool hash_table_replace(struct hash_table *ht, void *data, - const void *key); - -/** - * Remove a specific element from a hash table. - */ -extern void hash_table_remove(struct hash_table *ht, const void *key); - -/** - * Compute hash value of a string - * - * Computes the hash value of a string using the DJB2 algorithm developed by - * Professor Daniel J. Bernstein. It was published on comp.lang.c once upon - * a time. I was unable to find the original posting in the archives. - * - * \param key Pointer to a NUL terminated string to be hashed. - * - * \sa hash_table_string_compare - */ -extern unsigned hash_table_string_hash(const void *key); - - -/** - * Compare two strings used as keys - * - * This is just a macro wrapper around \c strcmp. - * - * \sa hash_table_string_hash - */ -#define hash_table_string_compare ((hash_compare_func_t) strcmp) - - -/** - * Compute hash value of a pointer - * - * \param key Pointer to be used as a hash key - * - * \note - * The memory pointed to by \c key is \b never accessed. The value of \c key - * itself is used as the hash key - * - * \sa hash_table_pointer_compare - */ -unsigned -hash_table_pointer_hash(const void *key); - - -/** - * Compare two pointers used as keys - * - * \sa hash_table_pointer_hash - */ -int -hash_table_pointer_compare(const void *key1, const void *key2); - -void -hash_table_call_foreach(struct hash_table *ht, - void (*callback)(const void *key, - void *data, - void *closure), - void *closure); - -struct string_to_uint_map * -string_to_uint_map_ctor(); - -void -string_to_uint_map_dtor(struct string_to_uint_map *); - - -#ifdef __cplusplus -} - -struct string_map_iterate_wrapper_closure { - void (*callback)(const char *key, unsigned value, void *closure); - void *closure; -}; - -/** - * Map from a string (name) to an unsigned integer value - * - * \note - * Because of the way this class interacts with the \c hash_table - * implementation, values of \c UINT_MAX cannot be stored in the map. - */ -struct string_to_uint_map { -public: - string_to_uint_map() - { - this->ht = hash_table_ctor(0, hash_table_string_hash, - hash_table_string_compare); - } - - ~string_to_uint_map() - { - hash_table_call_foreach(this->ht, delete_key, NULL); - hash_table_dtor(this->ht); - } - - /** - * Remove all mappings from this map. - */ - void clear() - { - hash_table_call_foreach(this->ht, delete_key, NULL); - hash_table_clear(this->ht); - } - - /** - * Runs a passed callback for the hash - */ - void iterate(void (*func)(const char *, unsigned, void *), void *closure) - { - struct string_map_iterate_wrapper_closure *wrapper; - - wrapper = (struct string_map_iterate_wrapper_closure *) - malloc(sizeof(struct string_map_iterate_wrapper_closure)); - if (wrapper == NULL) - return; - - wrapper->callback = func; - wrapper->closure = closure; - - hash_table_call_foreach(this->ht, subtract_one_wrapper, wrapper); - free(wrapper); - } - - /** - * Get the value associated with a particular key - * - * \return - * If \c key is found in the map, \c true is returned. Otherwise \c false - * is returned. - * - * \note - * If \c key is not found in the table, \c value is not modified. - */ - bool get(unsigned &value, const char *key) - { - const intptr_t v = - (intptr_t) hash_table_find(this->ht, (const void *) key); - - if (v == 0) - return false; - - value = (unsigned)(v - 1); - return true; - } - - void put(unsigned value, const char *key) - { - /* The low-level hash table structure returns NULL if key is not in the - * hash table. However, users of this map might want to store zero as a - * valid value in the table. Bias the value by +1 so that a - * user-specified zero is stored as 1. This enables ::get to tell the - * difference between a user-specified zero (returned as 1 by - * hash_table_find) and the key not in the table (returned as 0 by - * hash_table_find). - * - * The net effect is that we can't store UINT_MAX in the table. This is - * because UINT_MAX+1 = 0. - */ - assert(value != UINT_MAX); - char *dup_key = strdup(key); - bool result = hash_table_replace(this->ht, - (void *) (intptr_t) (value + 1), - dup_key); - if (result) - free(dup_key); - } - -private: - static void delete_key(const void *key, void *data, void *closure) - { - (void) data; - (void) closure; - - free((char *)key); - } - - static void subtract_one_wrapper(const void *key, void *data, void *closure) - { - struct string_map_iterate_wrapper_closure *wrapper = - (struct string_map_iterate_wrapper_closure *) closure; - unsigned value = (intptr_t) data; - - value -= 1; - - wrapper->callback((const char *) key, value, wrapper->closure); - } - - struct hash_table *ht; -}; - -#endif /* __cplusplus */ -#endif /* HASH_TABLE_H */ diff -Nru mesa-12.0.6/src/mesa/program/ir_to_mesa.cpp mesa-17.0.7/src/mesa/program/ir_to_mesa.cpp --- mesa-12.0.6/src/mesa/program/ir_to_mesa.cpp 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/ir_to_mesa.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -46,12 +46,12 @@ #include "compiler/glsl_types.h" #include "compiler/glsl/linker.h" #include "compiler/glsl/program.h" -#include "program/hash_table.h" #include "program/prog_instruction.h" #include "program/prog_optimize.h" #include "program/prog_print.h" #include "program/program.h" #include "program/prog_parameter.h" +#include "util/string_to_uint_map.h" static int swizzle_for_size(int size); @@ -601,10 +601,8 @@ ir_to_mesa_visitor::visit(ir_variable *ir) { if (strcmp(ir->name, "gl_FragCoord") == 0) { - struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog; - - fp->OriginUpperLeft = ir->data.origin_upper_left; - fp->PixelCenterInteger = ir->data.pixel_center_integer; + this->prog->OriginUpperLeft = ir->data.origin_upper_left; + this->prog->PixelCenterInteger = ir->data.pixel_center_integer; } if (ir->data.mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) { @@ -1375,6 +1373,9 @@ case ir_unop_dFdy_fine: case ir_unop_subroutine_to_int: case ir_unop_get_buffer_size: + case ir_unop_vote_any: + case ir_unop_vote_all: + case ir_unop_vote_eq: assert(!"not supported"); break; @@ -1621,7 +1622,7 @@ * all that would work would be an unrolled loop counter that ends * up being constant above. */ - ralloc_strcat(&prog->InfoLog, + ralloc_strcat(&prog->data->InfoLog, "warning: Variable sampler array index unsupported.\n" "This feature of the language was removed in GLSL 1.20 " "and is unlikely to be supported for 1.10 in Mesa.\n"); @@ -1667,8 +1668,8 @@ calc_sampler_offsets(shader_program, sampler, &offset, &array_elements, &location); - assert(shader_program->UniformStorage[location].opaque[shader].active); - return shader_program->UniformStorage[location].opaque[shader].index + + assert(shader_program->data->UniformStorage[location].opaque[shader].active); + return shader_program->data->UniformStorage[location].opaque[shader].index + offset; } @@ -1972,7 +1973,7 @@ ir->coordinate->accept(this); /* Put our coords in a temp. We'll need to modify them for shadow, - * projection, or LOD, so the only case we'd use it as is is if + * projection, or LOD, so the only case we'd use it as-is is if * we're doing plain old texturing. Mesa IR optimization should * handle cleaning up our mess in that case. */ @@ -2054,14 +2055,14 @@ emit(ir, OPCODE_RCP, coord_dst, projector); /* In the case where we have to project the coordinates "by hand," - * the shadow comparitor value must also be projected. + * the shadow comparator value must also be projected. */ src_reg tmp_src = coord; - if (ir->shadow_comparitor) { + if (ir->shadow_comparator) { /* Slot the shadow value in as the second to last component of the * coord. */ - ir->shadow_comparitor->accept(this); + ir->shadow_comparator->accept(this); tmp_src = get_temp(glsl_type::vec4_type); dst_reg tmp_dst = dst_reg(tmp_src); @@ -2085,14 +2086,14 @@ } /* If projection is done and the opcode is not OPCODE_TXP, then the shadow - * comparitor was put in the correct place (and projected) by the code, + * comparator was put in the correct place (and projected) by the code, * above, that handles by-hand projection. */ - if (ir->shadow_comparitor && (!ir->projector || opcode == OPCODE_TXP)) { + if (ir->shadow_comparator && (!ir->projector || opcode == OPCODE_TXP)) { /* Slot the shadow value in as the second to last component of the * coord. */ - ir->shadow_comparitor->accept(this); + ir->shadow_comparator->accept(this); /* XXX This will need to be updated for cubemap array samplers. */ if (sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_2D && @@ -2118,7 +2119,7 @@ else inst = emit(ir, opcode, result_dst, coord); - if (ir->shadow_comparitor) + if (ir->shadow_comparator) inst->tex_shadow = GL_TRUE; inst->sampler = get_sampler_uniform_value(ir->sampler, shader_program, @@ -2380,7 +2381,9 @@ private: virtual void visit_field(const glsl_type *type, const char *name, - bool row_major); + bool row_major, const glsl_type *record_type, + const enum glsl_interface_packing packing, + bool last_field); struct gl_shader_program *shader_program; struct gl_program_parameter_list *params; @@ -2392,19 +2395,20 @@ void add_uniform_to_shader::visit_field(const glsl_type *type, const char *name, - bool row_major) + bool /* row_major */, + const glsl_type * /* record_type */, + const enum glsl_interface_packing, + bool /* last_field */) { unsigned int size; - (void) row_major; - /* atomics don't get real storage */ if (type->contains_atomic()) return; if (type->is_vector() || type->is_scalar()) { size = type->vector_elements; - if (type->is_double()) + if (type->is_64bit()) size *= 2; } else { size = type_size(type) * 4; @@ -2437,7 +2441,7 @@ return; struct gl_uniform_storage *storage = - &this->shader_program->UniformStorage[location]; + &this->shader_program->data->UniformStorage[location]; assert(storage->type->is_sampler() && storage->opaque[shader_type].active); @@ -2466,7 +2470,7 @@ void _mesa_generate_parameters_list_for_uniforms(struct gl_shader_program *shader_program, - struct gl_shader *sh, + struct gl_linked_shader *sh, struct gl_program_parameter_list *params) { @@ -2506,7 +2510,7 @@ continue; struct gl_uniform_storage *storage = - &shader_program->UniformStorage[location]; + &shader_program->data->UniformStorage[location]; /* Do not associate any uniform storage to built-in uniforms */ if (storage->builtin) @@ -2776,7 +2780,7 @@ static struct gl_program * get_mesa_program(struct gl_context *ctx, struct gl_shader_program *shader_program, - struct gl_shader *shader) + struct gl_linked_shader *shader) { ir_to_mesa_visitor v; struct prog_instruction *mesa_instructions, *mesa_inst; @@ -2790,9 +2794,7 @@ validate_ir_tree(shader->ir); - prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name); - if (!prog) - return NULL; + prog = shader->Program; prog->Parameters = _mesa_new_parameter_list(); v.ctx = ctx; v.prog = prog; @@ -2806,13 +2808,12 @@ visit_exec_list(shader->ir, &v); v.emit(NULL, OPCODE_END); - prog->NumTemporaries = v.next_temp; + prog->arb.NumTemporaries = v.next_temp; unsigned num_instructions = v.instructions.length(); - mesa_instructions = - (struct prog_instruction *)calloc(num_instructions, - sizeof(*mesa_instructions)); + mesa_instructions = rzalloc_array(prog, struct prog_instruction, + num_instructions); mesa_instruction_annotation = ralloc_array(v.mem_ctx, ir_instruction *, num_instructions); @@ -2840,12 +2841,12 @@ /* Set IndirectRegisterFiles. */ if (mesa_inst->DstReg.RelAddr) - prog->IndirectRegisterFiles |= 1 << mesa_inst->DstReg.File; + prog->arb.IndirectRegisterFiles |= 1 << mesa_inst->DstReg.File; /* Update program's bitmask of indirectly accessed register files */ for (unsigned src = 0; src < 3; src++) if (mesa_inst->SrcReg[src].RelAddr) - prog->IndirectRegisterFiles |= 1 << mesa_inst->SrcReg[src].File; + prog->arb.IndirectRegisterFiles |= 1 << mesa_inst->SrcReg[src].File; switch (mesa_inst->Opcode) { case OPCODE_IF: @@ -2873,7 +2874,7 @@ } break; case OPCODE_ARL: - prog->NumAddressRegs = 1; + prog->arb.NumAddressRegs = 1; break; default: break; @@ -2882,11 +2883,11 @@ mesa_inst++; i++; - if (!shader_program->LinkStatus) + if (!shader_program->data->LinkStatus) break; } - if (!shader_program->LinkStatus) { + if (!shader_program->data->LinkStatus) { goto fail_exit; } @@ -2906,8 +2907,8 @@ fflush(stderr); } - prog->Instructions = mesa_instructions; - prog->NumInstructions = num_instructions; + prog->arb.Instructions = mesa_instructions; + prog->arb.NumInstructions = num_instructions; /* Setting this to NULL prevents a possible double free in the fail_exit * path (far below). @@ -2916,20 +2917,17 @@ do_set_program_inouts(shader->ir, prog, shader->Stage); - prog->SamplersUsed = shader->active_samplers; prog->ShadowSamplers = shader->shadow_samplers; + prog->ExternalSamplersUsed = gl_external_samplers(prog); _mesa_update_shader_textures_used(shader_program, prog); /* Set the gl_FragDepth layout. */ if (target == GL_FRAGMENT_PROGRAM_ARB) { - struct gl_fragment_program *fp = (struct gl_fragment_program *)prog; - fp->FragDepthLayout = shader_program->FragDepthLayout; + prog->info.fs.depth_layout = shader_program->FragDepthLayout; } - _mesa_reference_program(ctx, &shader->Program, prog); - if ((ctx->_Shader->Flags & GLSL_NO_OPT) == 0) { - _mesa_optimize_program(ctx, prog); + _mesa_optimize_program(ctx, prog, prog); } /* This has to be done last. Any operation that can cause @@ -2937,14 +2935,14 @@ * program constant) has to happen before creating this linkage. */ _mesa_associate_uniform_storage(ctx, shader_program, prog->Parameters); - if (!shader_program->LinkStatus) { + if (!shader_program->data->LinkStatus) { goto fail_exit; } return prog; fail_exit: - free(mesa_instructions); + ralloc_free(mesa_instructions); _mesa_reference_program(ctx, &shader->Program, NULL); return NULL; } @@ -2960,7 +2958,7 @@ GLboolean _mesa_ir_link_shader(struct gl_context *ctx, struct gl_shader_program *prog) { - assert(prog->LinkStatus); + assert(prog->data->LinkStatus); for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { if (prog->_LinkedShaders[i] == NULL) @@ -2980,8 +2978,6 @@ | LOG_TO_LOG2 | INT_DIV_TO_MUL_RCP | ((options->EmitNoPow) ? POW_TO_EXP2 : 0))); - progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress; - progress = do_common_optimization(ir, true, true, options, ctx->Const.NativeIntegers) || progress; @@ -2991,10 +2987,10 @@ if (options->MaxIfDepth == 0) progress = lower_discard(ir) || progress; - progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress; + progress = lower_if_to_cond_assign((gl_shader_stage)i, ir, + options->MaxIfDepth) || progress; - if (options->EmitNoNoise) - progress = lower_noise(ir) || progress; + progress = lower_noise(ir) || progress; /* If there are forms of indirect addressing that the driver * cannot handle, perform the lowering pass. @@ -3025,20 +3021,20 @@ linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i]); if (linked_prog) { - _mesa_copy_linked_program_data((gl_shader_stage) i, prog, linked_prog); + _mesa_copy_linked_program_data(prog, prog->_LinkedShaders[i]); if (!ctx->Driver.ProgramStringNotify(ctx, _mesa_shader_stage_to_program(i), linked_prog)) { + _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program, + NULL); return GL_FALSE; } } - - _mesa_reference_program(ctx, &linked_prog, NULL); } build_program_resource_list(ctx, prog); - return prog->LinkStatus; + return prog->data->LinkStatus; } /** @@ -3049,9 +3045,9 @@ { unsigned int i; - _mesa_clear_shader_program_data(prog); + _mesa_clear_shader_program_data(ctx, prog); - prog->LinkStatus = GL_TRUE; + prog->data->LinkStatus = GL_TRUE; for (i = 0; i < prog->NumShaders; i++) { if (!prog->Shaders[i]->CompileStatus) { @@ -3059,24 +3055,29 @@ } } - if (prog->LinkStatus) { + if (prog->data->LinkStatus) { link_shaders(ctx, prog); } - if (prog->LinkStatus) { + if (prog->data->LinkStatus) { + /* Reset sampler validated to true, validation happens via the + * LinkShader call below. + */ + prog->SamplersValidated = GL_TRUE; + if (!ctx->Driver.LinkShader(ctx, prog)) { - prog->LinkStatus = GL_FALSE; + prog->data->LinkStatus = GL_FALSE; } } if (ctx->_Shader->Flags & GLSL_DUMP) { - if (!prog->LinkStatus) { + if (!prog->data->LinkStatus) { fprintf(stderr, "GLSL shader program %d failed to link\n", prog->Name); } - if (prog->InfoLog && prog->InfoLog[0] != 0) { + if (prog->data->InfoLog && prog->data->InfoLog[0] != 0) { fprintf(stderr, "GLSL shader program %d info log:\n", prog->Name); - fprintf(stderr, "%s\n", prog->InfoLog); + fprintf(stderr, "%s\n", prog->data->InfoLog); } } } diff -Nru mesa-12.0.6/src/mesa/program/ir_to_mesa.h mesa-17.0.7/src/mesa/program/ir_to_mesa.h --- mesa-12.0.6/src/mesa/program/ir_to_mesa.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/ir_to_mesa.h 2017-06-01 10:37:10.000000000 +0000 @@ -39,7 +39,7 @@ void _mesa_generate_parameters_list_for_uniforms(struct gl_shader_program *shader_program, - struct gl_shader *sh, + struct gl_linked_shader *sh, struct gl_program_parameter_list *params); void diff -Nru mesa-12.0.6/src/mesa/program/lex.yy.c mesa-17.0.7/src/mesa/program/lex.yy.c --- mesa-12.0.6/src/mesa/program/lex.yy.c 2017-01-24 01:43:22.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/lex.yy.c 2017-06-01 10:38:04.000000000 +0000 @@ -1,6 +1,6 @@ -#line 2 "program/lex.yy.c" +#line 1 "program/lex.yy.c" -#line 4 "program/lex.yy.c" +#line 3 "program/lex.yy.c" #define YY_INT_ALIGNED short int @@ -9,11 +9,89 @@ #define FLEX_SCANNER #define YY_FLEX_MAJOR_VERSION 2 #define YY_FLEX_MINOR_VERSION 6 -#define YY_FLEX_SUBMINOR_VERSION 1 +#define YY_FLEX_SUBMINOR_VERSION 3 #if YY_FLEX_SUBMINOR_VERSION > 0 #define FLEX_BETA #endif + #define yy_create_buffer _mesa_program_lexer__create_buffer + + #define yy_delete_buffer _mesa_program_lexer__delete_buffer + + #define yy_scan_buffer _mesa_program_lexer__scan_buffer + + #define yy_scan_string _mesa_program_lexer__scan_string + + #define yy_scan_bytes _mesa_program_lexer__scan_bytes + + #define yy_init_buffer _mesa_program_lexer__init_buffer + + #define yy_flush_buffer _mesa_program_lexer__flush_buffer + + #define yy_load_buffer_state _mesa_program_lexer__load_buffer_state + + #define yy_switch_to_buffer _mesa_program_lexer__switch_to_buffer + + #define yypush_buffer_state _mesa_program_lexer_push_buffer_state + + #define yypop_buffer_state _mesa_program_lexer_pop_buffer_state + + #define yyensure_buffer_stack _mesa_program_lexer_ensure_buffer_stack + + #define yylex _mesa_program_lexer_lex + + #define yyrestart _mesa_program_lexer_restart + + #define yylex_init _mesa_program_lexer_lex_init + + #define yylex_init_extra _mesa_program_lexer_lex_init_extra + + #define yylex_destroy _mesa_program_lexer_lex_destroy + + #define yyget_debug _mesa_program_lexer_get_debug + + #define yyset_debug _mesa_program_lexer_set_debug + + #define yyget_extra _mesa_program_lexer_get_extra + + #define yyset_extra _mesa_program_lexer_set_extra + + #define yyget_in _mesa_program_lexer_get_in + + #define yyset_in _mesa_program_lexer_set_in + + #define yyget_out _mesa_program_lexer_get_out + + #define yyset_out _mesa_program_lexer_set_out + + #define yyget_leng _mesa_program_lexer_get_leng + + #define yyget_text _mesa_program_lexer_get_text + + #define yyget_lineno _mesa_program_lexer_get_lineno + + #define yyset_lineno _mesa_program_lexer_set_lineno + + #define yyget_column _mesa_program_lexer_get_column + + #define yyset_column _mesa_program_lexer_set_column + + #define yywrap _mesa_program_lexer_wrap + + #define yyget_lval _mesa_program_lexer_get_lval + + #define yyset_lval _mesa_program_lexer_set_lval + + #define yyget_lloc _mesa_program_lexer_get_lloc + + #define yyset_lloc _mesa_program_lexer_set_lloc + + #define yyalloc _mesa_program_lexer_alloc + + #define yyrealloc _mesa_program_lexer_realloc + + #define yyfree _mesa_program_lexer_free + /* First, we deal with platform-specific or compiler-specific issues. */ /* begin standard C headers. */ @@ -100,12 +178,10 @@ /* Returned upon end-of-file. */ #define YY_NULL 0 -/* Promotes a possibly negative, possibly signed char to an unsigned - * integer for use as an array index. If the signed char is negative, - * we want to instead treat it as an 8-bit unsigned char, hence the - * double cast. +/* Promotes a possibly negative, possibly signed char to an + * integer in range [0..255] for use as an array index. */ -#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c) +#define YY_SC_TO_UI(c) ((YY_CHAR) (c)) /* An opaque pointer. */ #ifndef YY_TYPEDEF_YY_SCANNER_T @@ -129,20 +205,16 @@ * definition of BEGIN. */ #define BEGIN yyg->yy_start = 1 + 2 * - /* Translate the current start state into a value that can be later handed * to BEGIN to return to the state. The YYSTATE alias is for lex * compatibility. */ #define YY_START ((yyg->yy_start - 1) / 2) #define YYSTATE YY_START - /* Action number for EOF rule of a given start state. */ #define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1) - /* Special action meaning "start processing a new file". */ #define YY_NEW_FILE _mesa_program_lexer_restart(yyin ,yyscanner ) - #define YY_END_OF_BUFFER_CHAR 0 /* Size of default input buffer. */ @@ -175,7 +247,7 @@ #define EOB_ACT_CONTINUE_SCAN 0 #define EOB_ACT_END_OF_FILE 1 #define EOB_ACT_LAST_MATCH 2 - + #define YY_LESS_LINENO(n) #define YY_LINENO_REWIND_TO(ptr) @@ -192,7 +264,6 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ \ } \ while ( 0 ) - #define unput(c) yyunput( c, yyg->yytext_ptr , yyscanner ) #ifndef YY_STRUCT_YY_BUFFER_STATE @@ -235,7 +306,7 @@ int yy_bs_lineno; /**< The line count. */ int yy_bs_column; /**< The column count. */ - + /* Whether to try to fill the input buffer when we reach the * end of it. */ @@ -269,36 +340,33 @@ #define YY_CURRENT_BUFFER ( yyg->yy_buffer_stack \ ? yyg->yy_buffer_stack[yyg->yy_buffer_stack_top] \ : NULL) - /* Same as previous macro, but useful when we know that the buffer stack is not * NULL or when we need an lvalue. For internal use only. */ #define YY_CURRENT_BUFFER_LVALUE yyg->yy_buffer_stack[yyg->yy_buffer_stack_top] -void _mesa_program_lexer_restart (FILE *input_file ,yyscan_t yyscanner ); -void _mesa_program_lexer__switch_to_buffer (YY_BUFFER_STATE new_buffer ,yyscan_t yyscanner ); -YY_BUFFER_STATE _mesa_program_lexer__create_buffer (FILE *file,int size ,yyscan_t yyscanner ); -void _mesa_program_lexer__delete_buffer (YY_BUFFER_STATE b ,yyscan_t yyscanner ); -void _mesa_program_lexer__flush_buffer (YY_BUFFER_STATE b ,yyscan_t yyscanner ); -void _mesa_program_lexer_push_buffer_state (YY_BUFFER_STATE new_buffer ,yyscan_t yyscanner ); -void _mesa_program_lexer_pop_buffer_state (yyscan_t yyscanner ); - -static void _mesa_program_lexer_ensure_buffer_stack (yyscan_t yyscanner ); -static void _mesa_program_lexer__load_buffer_state (yyscan_t yyscanner ); -static void _mesa_program_lexer__init_buffer (YY_BUFFER_STATE b,FILE *file ,yyscan_t yyscanner ); - +void _mesa_program_lexer_restart ( FILE *input_file , yyscan_t yyscanner ); +void _mesa_program_lexer__switch_to_buffer ( YY_BUFFER_STATE new_buffer , yyscan_t yyscanner ); +YY_BUFFER_STATE _mesa_program_lexer__create_buffer ( FILE *file, int size , yyscan_t yyscanner ); +void _mesa_program_lexer__delete_buffer ( YY_BUFFER_STATE b , yyscan_t yyscanner ); +void _mesa_program_lexer__flush_buffer ( YY_BUFFER_STATE b , yyscan_t yyscanner ); +void _mesa_program_lexer_push_buffer_state ( YY_BUFFER_STATE new_buffer , yyscan_t yyscanner ); +void _mesa_program_lexer_pop_buffer_state ( yyscan_t yyscanner ); + +static void _mesa_program_lexer_ensure_buffer_stack ( yyscan_t yyscanner ); +static void _mesa_program_lexer__load_buffer_state ( yyscan_t yyscanner ); +static void _mesa_program_lexer__init_buffer ( YY_BUFFER_STATE b, FILE *file , yyscan_t yyscanner ); #define YY_FLUSH_BUFFER _mesa_program_lexer__flush_buffer(YY_CURRENT_BUFFER ,yyscanner) -YY_BUFFER_STATE _mesa_program_lexer__scan_buffer (char *base,yy_size_t size ,yyscan_t yyscanner ); -YY_BUFFER_STATE _mesa_program_lexer__scan_string (yyconst char *yy_str ,yyscan_t yyscanner ); -YY_BUFFER_STATE _mesa_program_lexer__scan_bytes (yyconst char *bytes,int len ,yyscan_t yyscanner ); - -void *_mesa_program_lexer_alloc (yy_size_t ,yyscan_t yyscanner ); -void *_mesa_program_lexer_realloc (void *,yy_size_t ,yyscan_t yyscanner ); -void _mesa_program_lexer_free (void * ,yyscan_t yyscanner ); +YY_BUFFER_STATE _mesa_program_lexer__scan_buffer ( char *base, yy_size_t size , yyscan_t yyscanner ); +YY_BUFFER_STATE _mesa_program_lexer__scan_string ( const char *yy_str , yyscan_t yyscanner ); +YY_BUFFER_STATE _mesa_program_lexer__scan_bytes ( const char *bytes, int len , yyscan_t yyscanner ); + +void *_mesa_program_lexer_alloc ( yy_size_t , yyscan_t yyscanner ); +void *_mesa_program_lexer_realloc ( void *, yy_size_t , yyscan_t yyscanner ); +void _mesa_program_lexer_free ( void * , yyscan_t yyscanner ); #define yy_new_buffer _mesa_program_lexer__create_buffer - #define yy_set_interactive(is_interactive) \ { \ if ( ! YY_CURRENT_BUFFER ){ \ @@ -308,7 +376,6 @@ } \ YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \ } - #define yy_set_bol(at_bol) \ { \ if ( ! YY_CURRENT_BUFFER ){\ @@ -318,24 +385,22 @@ } \ YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \ } - #define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol) /* Begin user sect3 */ #define _mesa_program_lexer_wrap(yyscanner) (/*CONSTCOND*/1) #define YY_SKIP_YYWRAP - -typedef unsigned char YY_CHAR; +typedef flex_uint8_t YY_CHAR; typedef int yy_state_type; #define yytext_ptr yytext_r -static yy_state_type yy_get_previous_state (yyscan_t yyscanner ); -static yy_state_type yy_try_NUL_trans (yy_state_type current_state ,yyscan_t yyscanner); -static int yy_get_next_buffer (yyscan_t yyscanner ); -static void yynoreturn yy_fatal_error (yyconst char* msg ,yyscan_t yyscanner ); +static yy_state_type yy_get_previous_state ( yyscan_t yyscanner ); +static yy_state_type yy_try_NUL_trans ( yy_state_type current_state , yyscan_t yyscanner); +static int yy_get_next_buffer ( yyscan_t yyscanner ); +static void yynoreturn yy_fatal_error ( const char* msg , yyscan_t yyscanner ); /* Done after the current pattern has been matched and before the * corresponding action - sets up yytext. @@ -346,7 +411,6 @@ yyg->yy_hold_char = *yy_cp; \ *yy_cp = '\0'; \ yyg->yy_c_buf_p = yy_cp; - #define YY_NUM_RULES 151 #define YY_END_OF_BUFFER 152 /* This struct is not used in this scanner, @@ -356,7 +420,7 @@ flex_int32_t yy_verify; flex_int32_t yy_nxt; }; -static yyconst flex_int16_t yy_accept[675] = +static const flex_int16_t yy_accept[675] = { 0, 0, 0, 152, 150, 148, 147, 150, 150, 120, 146, 122, 122, 122, 122, 120, 120, 120, 120, 120, 120, @@ -434,7 +498,7 @@ 120, 118, 119, 0 } ; -static yyconst YY_CHAR yy_ec[256] = +static const YY_CHAR yy_ec[256] = { 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 3, 1, 1, 4, 1, 1, 1, 1, 1, 1, 1, @@ -466,7 +530,7 @@ 1, 1, 1, 1, 1 } ; -static yyconst YY_CHAR yy_meta[68] = +static const YY_CHAR yy_meta[68] = { 0, 1, 1, 1, 1, 1, 1, 2, 1, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, @@ -477,7 +541,7 @@ 2, 2, 2, 2, 2, 2, 2 } ; -static yyconst flex_uint16_t yy_base[678] = +static const flex_int16_t yy_base[678] = { 0, 0, 0, 954, 955, 66, 955, 948, 949, 0, 69, 85, 128, 140, 152, 151, 58, 39, 48, 75, 927, @@ -555,7 +619,7 @@ 138, 0, 0, 955, 541, 108, 544 } ; -static yyconst flex_int16_t yy_def[678] = +static const flex_int16_t yy_def[678] = { 0, 674, 1, 674, 674, 674, 674, 674, 675, 676, 674, 674, 674, 674, 674, 676, 676, 676, 676, 676, 676, @@ -633,7 +697,7 @@ 676, 676, 676, 0, 674, 674, 674 } ; -static yyconst flex_uint16_t yy_nxt[1023] = +static const flex_int16_t yy_nxt[1023] = { 0, 4, 5, 6, 5, 7, 8, 9, 4, 10, 11, 12, 13, 14, 11, 11, 15, 9, 16, 17, 18, @@ -750,7 +814,7 @@ 674, 674 } ; -static yyconst flex_int16_t yy_chk[1023] = +static const flex_int16_t yy_chk[1023] = { 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, @@ -874,8 +938,8 @@ #define yymore() yymore_used_but_not_detected #define YY_MORE_ADJ 0 #define YY_RESTORE_YY_MORE_OFFSET -#line 1 "../../../src/mesa/program/program_lexer.l" -#line 2 "../../../src/mesa/program/program_lexer.l" +#line 1 "./program/program_lexer.l" +#line 2 "./program/program_lexer.l" /* * Copyright © 2009 Intel Corporation * @@ -1000,7 +1064,7 @@ { lval->string = strdup(text); - return (_mesa_symbol_table_find_symbol(state->st, 0, text) == NULL) + return (_mesa_symbol_table_find_symbol(state->st, text) == NULL) ? IDENTIFIER : USED_IDENTIFIER; } @@ -1027,10 +1091,11 @@ /* Flex defines a couple of functions with no declarations nor the static keyword. Declare them here to avoid a compiler warning. */ -int _mesa_program_lexer_get_column (yyscan_t yyscanner); -void _mesa_program_lexer_set_column (int column_no , yyscan_t yyscanner); +int yyget_column (yyscan_t yyscanner); +void yyset_column (int column_no , yyscan_t yyscanner); -#line 1034 "program/lex.yy.c" +#line 1097 "program/lex.yy.c" +#line 1098 "program/lex.yy.c" #define INITIAL 0 @@ -1084,7 +1149,7 @@ }; /* end struct yyguts_t */ -static int yy_init_globals (yyscan_t yyscanner ); +static int yy_init_globals ( yyscan_t yyscanner ); /* This must go here because YYSTYPE and YYLTYPE are included * from bison output in section 1.*/ @@ -1094,48 +1159,48 @@ int _mesa_program_lexer_lex_init (yyscan_t* scanner); -int _mesa_program_lexer_lex_init_extra (YY_EXTRA_TYPE user_defined,yyscan_t* scanner); +int _mesa_program_lexer_lex_init_extra ( YY_EXTRA_TYPE user_defined, yyscan_t* scanner); /* Accessor methods to globals. These are made visible to non-reentrant scanners for convenience. */ -int _mesa_program_lexer_lex_destroy (yyscan_t yyscanner ); +int _mesa_program_lexer_lex_destroy ( yyscan_t yyscanner ); -int _mesa_program_lexer_get_debug (yyscan_t yyscanner ); +int _mesa_program_lexer_get_debug ( yyscan_t yyscanner ); -void _mesa_program_lexer_set_debug (int debug_flag ,yyscan_t yyscanner ); +void _mesa_program_lexer_set_debug ( int debug_flag , yyscan_t yyscanner ); -YY_EXTRA_TYPE _mesa_program_lexer_get_extra (yyscan_t yyscanner ); +YY_EXTRA_TYPE _mesa_program_lexer_get_extra ( yyscan_t yyscanner ); -void _mesa_program_lexer_set_extra (YY_EXTRA_TYPE user_defined ,yyscan_t yyscanner ); +void _mesa_program_lexer_set_extra ( YY_EXTRA_TYPE user_defined , yyscan_t yyscanner ); -FILE *_mesa_program_lexer_get_in (yyscan_t yyscanner ); +FILE *_mesa_program_lexer_get_in ( yyscan_t yyscanner ); -void _mesa_program_lexer_set_in (FILE * _in_str ,yyscan_t yyscanner ); +void _mesa_program_lexer_set_in ( FILE * _in_str , yyscan_t yyscanner ); -FILE *_mesa_program_lexer_get_out (yyscan_t yyscanner ); +FILE *_mesa_program_lexer_get_out ( yyscan_t yyscanner ); -void _mesa_program_lexer_set_out (FILE * _out_str ,yyscan_t yyscanner ); +void _mesa_program_lexer_set_out ( FILE * _out_str , yyscan_t yyscanner ); - int _mesa_program_lexer_get_leng (yyscan_t yyscanner ); + int _mesa_program_lexer_get_leng ( yyscan_t yyscanner ); -char *_mesa_program_lexer_get_text (yyscan_t yyscanner ); +char *_mesa_program_lexer_get_text ( yyscan_t yyscanner ); -int _mesa_program_lexer_get_lineno (yyscan_t yyscanner ); +int _mesa_program_lexer_get_lineno ( yyscan_t yyscanner ); -void _mesa_program_lexer_set_lineno (int _line_number ,yyscan_t yyscanner ); +void _mesa_program_lexer_set_lineno ( int _line_number , yyscan_t yyscanner ); -int _mesa_program_lexer_get_column (yyscan_t yyscanner ); +int _mesa_program_lexer_get_column ( yyscan_t yyscanner ); -void _mesa_program_lexer_set_column (int _column_no ,yyscan_t yyscanner ); +void _mesa_program_lexer_set_column ( int _column_no , yyscan_t yyscanner ); -YYSTYPE * _mesa_program_lexer_get_lval (yyscan_t yyscanner ); +YYSTYPE * _mesa_program_lexer_get_lval ( yyscan_t yyscanner ); -void _mesa_program_lexer_set_lval (YYSTYPE * yylval_param ,yyscan_t yyscanner ); +void _mesa_program_lexer_set_lval ( YYSTYPE * yylval_param , yyscan_t yyscanner ); - YYLTYPE *_mesa_program_lexer_get_lloc (yyscan_t yyscanner ); + YYLTYPE *_mesa_program_lexer_get_lloc ( yyscan_t yyscanner ); - void _mesa_program_lexer_set_lloc (YYLTYPE * yylloc_param ,yyscan_t yyscanner ); + void _mesa_program_lexer_set_lloc ( YYLTYPE * yylloc_param , yyscan_t yyscanner ); /* Macros after this point can all be overridden by user definitions in * section 1. @@ -1143,32 +1208,31 @@ #ifndef YY_SKIP_YYWRAP #ifdef __cplusplus -extern "C" int _mesa_program_lexer_wrap (yyscan_t yyscanner ); +extern "C" int _mesa_program_lexer_wrap ( yyscan_t yyscanner ); #else -extern int _mesa_program_lexer_wrap (yyscan_t yyscanner ); +extern int _mesa_program_lexer_wrap ( yyscan_t yyscanner ); #endif #endif #ifndef YY_NO_UNPUT - static void yyunput (int c,char *buf_ptr ,yyscan_t yyscanner); + static void yyunput ( int c, char *buf_ptr , yyscan_t yyscanner); #endif #ifndef yytext_ptr -static void yy_flex_strncpy (char *,yyconst char *,int ,yyscan_t yyscanner); +static void yy_flex_strncpy ( char *, const char *, int , yyscan_t yyscanner); #endif #ifdef YY_NEED_STRLEN -static int yy_flex_strlen (yyconst char * ,yyscan_t yyscanner); +static int yy_flex_strlen ( const char * , yyscan_t yyscanner); #endif #ifndef YY_NO_INPUT - #ifdef __cplusplus -static int yyinput (yyscan_t yyscanner ); +static int yyinput ( yyscan_t yyscanner ); #else -static int input (yyscan_t yyscanner ); +static int input ( yyscan_t yyscanner ); #endif #endif @@ -1199,7 +1263,7 @@ if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \ { \ int c = '*'; \ - size_t n; \ + int n; \ for ( n = 0; n < max_size && \ (c = getc( yyin )) != EOF && c != '\n'; ++n ) \ buf[n] = (char) c; \ @@ -1212,7 +1276,7 @@ else \ { \ errno=0; \ - while ( (result = (int) fread(buf, 1, max_size, yyin))==0 && ferror(yyin)) \ + while ( (result = (int) fread(buf, 1, (yy_size_t) max_size, yyin)) == 0 && ferror(yyin)) \ { \ if( errno != EINTR) \ { \ @@ -1254,7 +1318,7 @@ #define YY_DECL_IS_OURS 1 extern int _mesa_program_lexer_lex \ - (YYSTYPE * yylval_param,YYLTYPE * yylloc_param ,yyscan_t yyscanner); + (YYSTYPE * yylval_param, YYLTYPE * yylloc_param , yyscan_t yyscanner); #define YY_DECL int _mesa_program_lexer_lex \ (YYSTYPE * yylval_param, YYLTYPE * yylloc_param , yyscan_t yyscanner) @@ -1315,10 +1379,10 @@ } { -#line 167 "../../../src/mesa/program/program_lexer.l" +#line 167 "./program/program_lexer.l" -#line 1322 "program/lex.yy.c" +#line 1385 "program/lex.yy.c" while ( /*CONSTCOND*/1 ) /* loops until end-of-file is reached */ { @@ -1346,9 +1410,9 @@ { yy_current_state = (int) yy_def[yy_current_state]; if ( yy_current_state >= 675 ) - yy_c = yy_meta[(unsigned int) yy_c]; + yy_c = yy_meta[yy_c]; } - yy_current_state = yy_nxt[yy_base[yy_current_state] + (flex_int16_t) yy_c]; + yy_current_state = yy_nxt[yy_base[yy_current_state] + yy_c]; ++yy_cp; } while ( yy_base[yy_current_state] != 955 ); @@ -1377,17 +1441,17 @@ case 1: YY_RULE_SETUP -#line 169 "../../../src/mesa/program/program_lexer.l" +#line 169 "./program/program_lexer.l" { return ARBvp_10; } YY_BREAK case 2: YY_RULE_SETUP -#line 170 "../../../src/mesa/program/program_lexer.l" +#line 170 "./program/program_lexer.l" { return ARBfp_10; } YY_BREAK case 3: YY_RULE_SETUP -#line 171 "../../../src/mesa/program/program_lexer.l" +#line 171 "./program/program_lexer.l" { yylval->integer = at_address; return_token_or_IDENTIFIER(require_ARB_vp, ADDRESS); @@ -1395,597 +1459,597 @@ YY_BREAK case 4: YY_RULE_SETUP -#line 175 "../../../src/mesa/program/program_lexer.l" +#line 175 "./program/program_lexer.l" { return ALIAS; } YY_BREAK case 5: YY_RULE_SETUP -#line 176 "../../../src/mesa/program/program_lexer.l" +#line 176 "./program/program_lexer.l" { return ATTRIB; } YY_BREAK case 6: YY_RULE_SETUP -#line 177 "../../../src/mesa/program/program_lexer.l" +#line 177 "./program/program_lexer.l" { return END; } YY_BREAK case 7: YY_RULE_SETUP -#line 178 "../../../src/mesa/program/program_lexer.l" +#line 178 "./program/program_lexer.l" { return OPTION; } YY_BREAK case 8: YY_RULE_SETUP -#line 179 "../../../src/mesa/program/program_lexer.l" +#line 179 "./program/program_lexer.l" { return OUTPUT; } YY_BREAK case 9: YY_RULE_SETUP -#line 180 "../../../src/mesa/program/program_lexer.l" +#line 180 "./program/program_lexer.l" { return PARAM; } YY_BREAK case 10: YY_RULE_SETUP -#line 181 "../../../src/mesa/program/program_lexer.l" +#line 181 "./program/program_lexer.l" { yylval->integer = at_temp; return TEMP; } YY_BREAK case 11: YY_RULE_SETUP -#line 183 "../../../src/mesa/program/program_lexer.l" +#line 183 "./program/program_lexer.l" { return_opcode( 1, VECTOR_OP, ABS, 3); } YY_BREAK case 12: YY_RULE_SETUP -#line 184 "../../../src/mesa/program/program_lexer.l" +#line 184 "./program/program_lexer.l" { return_opcode( 1, BIN_OP, ADD, 3); } YY_BREAK case 13: YY_RULE_SETUP -#line 185 "../../../src/mesa/program/program_lexer.l" +#line 185 "./program/program_lexer.l" { return_opcode(require_ARB_vp, ARL, ARL, 3); } YY_BREAK case 14: YY_RULE_SETUP -#line 187 "../../../src/mesa/program/program_lexer.l" +#line 187 "./program/program_lexer.l" { return_opcode(require_ARB_fp, TRI_OP, CMP, 3); } YY_BREAK case 15: YY_RULE_SETUP -#line 188 "../../../src/mesa/program/program_lexer.l" +#line 188 "./program/program_lexer.l" { return_opcode(require_ARB_fp, SCALAR_OP, COS, 3); } YY_BREAK case 16: YY_RULE_SETUP -#line 190 "../../../src/mesa/program/program_lexer.l" +#line 190 "./program/program_lexer.l" { return_opcode( 1, BIN_OP, DP3, 3); } YY_BREAK case 17: YY_RULE_SETUP -#line 191 "../../../src/mesa/program/program_lexer.l" +#line 191 "./program/program_lexer.l" { return_opcode( 1, BIN_OP, DP4, 3); } YY_BREAK case 18: YY_RULE_SETUP -#line 192 "../../../src/mesa/program/program_lexer.l" +#line 192 "./program/program_lexer.l" { return_opcode( 1, BIN_OP, DPH, 3); } YY_BREAK case 19: YY_RULE_SETUP -#line 193 "../../../src/mesa/program/program_lexer.l" +#line 193 "./program/program_lexer.l" { return_opcode( 1, BIN_OP, DST, 3); } YY_BREAK case 20: YY_RULE_SETUP -#line 195 "../../../src/mesa/program/program_lexer.l" +#line 195 "./program/program_lexer.l" { return_opcode( 1, SCALAR_OP, EX2, 3); } YY_BREAK case 21: YY_RULE_SETUP -#line 196 "../../../src/mesa/program/program_lexer.l" +#line 196 "./program/program_lexer.l" { return_opcode(require_ARB_vp, SCALAR_OP, EXP, 3); } YY_BREAK case 22: YY_RULE_SETUP -#line 198 "../../../src/mesa/program/program_lexer.l" +#line 198 "./program/program_lexer.l" { return_opcode( 1, VECTOR_OP, FLR, 3); } YY_BREAK case 23: YY_RULE_SETUP -#line 199 "../../../src/mesa/program/program_lexer.l" +#line 199 "./program/program_lexer.l" { return_opcode( 1, VECTOR_OP, FRC, 3); } YY_BREAK case 24: YY_RULE_SETUP -#line 201 "../../../src/mesa/program/program_lexer.l" +#line 201 "./program/program_lexer.l" { return_opcode(require_ARB_fp, KIL, KIL, 3); } YY_BREAK case 25: YY_RULE_SETUP -#line 203 "../../../src/mesa/program/program_lexer.l" +#line 203 "./program/program_lexer.l" { return_opcode( 1, VECTOR_OP, LIT, 3); } YY_BREAK case 26: YY_RULE_SETUP -#line 204 "../../../src/mesa/program/program_lexer.l" +#line 204 "./program/program_lexer.l" { return_opcode( 1, SCALAR_OP, LG2, 3); } YY_BREAK case 27: YY_RULE_SETUP -#line 205 "../../../src/mesa/program/program_lexer.l" +#line 205 "./program/program_lexer.l" { return_opcode(require_ARB_vp, SCALAR_OP, LOG, 3); } YY_BREAK case 28: YY_RULE_SETUP -#line 206 "../../../src/mesa/program/program_lexer.l" +#line 206 "./program/program_lexer.l" { return_opcode(require_ARB_fp, TRI_OP, LRP, 3); } YY_BREAK case 29: YY_RULE_SETUP -#line 208 "../../../src/mesa/program/program_lexer.l" +#line 208 "./program/program_lexer.l" { return_opcode( 1, TRI_OP, MAD, 3); } YY_BREAK case 30: YY_RULE_SETUP -#line 209 "../../../src/mesa/program/program_lexer.l" +#line 209 "./program/program_lexer.l" { return_opcode( 1, BIN_OP, MAX, 3); } YY_BREAK case 31: YY_RULE_SETUP -#line 210 "../../../src/mesa/program/program_lexer.l" +#line 210 "./program/program_lexer.l" { return_opcode( 1, BIN_OP, MIN, 3); } YY_BREAK case 32: YY_RULE_SETUP -#line 211 "../../../src/mesa/program/program_lexer.l" +#line 211 "./program/program_lexer.l" { return_opcode( 1, VECTOR_OP, MOV, 3); } YY_BREAK case 33: YY_RULE_SETUP -#line 212 "../../../src/mesa/program/program_lexer.l" +#line 212 "./program/program_lexer.l" { return_opcode( 1, BIN_OP, MUL, 3); } YY_BREAK case 34: YY_RULE_SETUP -#line 214 "../../../src/mesa/program/program_lexer.l" +#line 214 "./program/program_lexer.l" { return_opcode( 1, BINSC_OP, POW, 3); } YY_BREAK case 35: YY_RULE_SETUP -#line 216 "../../../src/mesa/program/program_lexer.l" +#line 216 "./program/program_lexer.l" { return_opcode( 1, SCALAR_OP, RCP, 3); } YY_BREAK case 36: YY_RULE_SETUP -#line 217 "../../../src/mesa/program/program_lexer.l" +#line 217 "./program/program_lexer.l" { return_opcode( 1, SCALAR_OP, RSQ, 3); } YY_BREAK case 37: YY_RULE_SETUP -#line 219 "../../../src/mesa/program/program_lexer.l" +#line 219 "./program/program_lexer.l" { return_opcode(require_ARB_fp, SCALAR_OP, SCS, 3); } YY_BREAK case 38: YY_RULE_SETUP -#line 220 "../../../src/mesa/program/program_lexer.l" +#line 220 "./program/program_lexer.l" { return_opcode( 1, BIN_OP, SGE, 3); } YY_BREAK case 39: YY_RULE_SETUP -#line 221 "../../../src/mesa/program/program_lexer.l" +#line 221 "./program/program_lexer.l" { return_opcode(require_ARB_fp, SCALAR_OP, SIN, 3); } YY_BREAK case 40: YY_RULE_SETUP -#line 222 "../../../src/mesa/program/program_lexer.l" +#line 222 "./program/program_lexer.l" { return_opcode( 1, BIN_OP, SLT, 3); } YY_BREAK case 41: YY_RULE_SETUP -#line 223 "../../../src/mesa/program/program_lexer.l" +#line 223 "./program/program_lexer.l" { return_opcode( 1, BIN_OP, SUB, 3); } YY_BREAK case 42: YY_RULE_SETUP -#line 224 "../../../src/mesa/program/program_lexer.l" +#line 224 "./program/program_lexer.l" { return_opcode( 1, SWZ, SWZ, 3); } YY_BREAK case 43: YY_RULE_SETUP -#line 226 "../../../src/mesa/program/program_lexer.l" +#line 226 "./program/program_lexer.l" { return_opcode(require_ARB_fp, SAMPLE_OP, TEX, 3); } YY_BREAK case 44: YY_RULE_SETUP -#line 227 "../../../src/mesa/program/program_lexer.l" +#line 227 "./program/program_lexer.l" { return_opcode(require_ARB_fp, SAMPLE_OP, TXB, 3); } YY_BREAK case 45: YY_RULE_SETUP -#line 228 "../../../src/mesa/program/program_lexer.l" +#line 228 "./program/program_lexer.l" { return_opcode(require_ARB_fp, SAMPLE_OP, TXP, 3); } YY_BREAK case 46: YY_RULE_SETUP -#line 230 "../../../src/mesa/program/program_lexer.l" +#line 230 "./program/program_lexer.l" { return_opcode( 1, BIN_OP, XPD, 3); } YY_BREAK case 47: YY_RULE_SETUP -#line 232 "../../../src/mesa/program/program_lexer.l" +#line 232 "./program/program_lexer.l" { return_token_or_IDENTIFIER(require_ARB_vp, VERTEX); } YY_BREAK case 48: YY_RULE_SETUP -#line 233 "../../../src/mesa/program/program_lexer.l" +#line 233 "./program/program_lexer.l" { return_token_or_IDENTIFIER(require_ARB_fp, FRAGMENT); } YY_BREAK case 49: YY_RULE_SETUP -#line 234 "../../../src/mesa/program/program_lexer.l" +#line 234 "./program/program_lexer.l" { return PROGRAM; } YY_BREAK case 50: YY_RULE_SETUP -#line 235 "../../../src/mesa/program/program_lexer.l" +#line 235 "./program/program_lexer.l" { return STATE; } YY_BREAK case 51: YY_RULE_SETUP -#line 236 "../../../src/mesa/program/program_lexer.l" +#line 236 "./program/program_lexer.l" { return RESULT; } YY_BREAK case 52: YY_RULE_SETUP -#line 238 "../../../src/mesa/program/program_lexer.l" +#line 238 "./program/program_lexer.l" { return AMBIENT; } YY_BREAK case 53: YY_RULE_SETUP -#line 239 "../../../src/mesa/program/program_lexer.l" +#line 239 "./program/program_lexer.l" { return ATTENUATION; } YY_BREAK case 54: YY_RULE_SETUP -#line 240 "../../../src/mesa/program/program_lexer.l" +#line 240 "./program/program_lexer.l" { return BACK; } YY_BREAK case 55: YY_RULE_SETUP -#line 241 "../../../src/mesa/program/program_lexer.l" +#line 241 "./program/program_lexer.l" { return_token_or_DOT(require_ARB_vp, CLIP); } YY_BREAK case 56: YY_RULE_SETUP -#line 242 "../../../src/mesa/program/program_lexer.l" +#line 242 "./program/program_lexer.l" { return COLOR; } YY_BREAK case 57: YY_RULE_SETUP -#line 243 "../../../src/mesa/program/program_lexer.l" +#line 243 "./program/program_lexer.l" { return_token_or_DOT(require_ARB_fp, DEPTH); } YY_BREAK case 58: YY_RULE_SETUP -#line 244 "../../../src/mesa/program/program_lexer.l" +#line 244 "./program/program_lexer.l" { return DIFFUSE; } YY_BREAK case 59: YY_RULE_SETUP -#line 245 "../../../src/mesa/program/program_lexer.l" +#line 245 "./program/program_lexer.l" { return DIRECTION; } YY_BREAK case 60: YY_RULE_SETUP -#line 246 "../../../src/mesa/program/program_lexer.l" +#line 246 "./program/program_lexer.l" { return EMISSION; } YY_BREAK case 61: YY_RULE_SETUP -#line 247 "../../../src/mesa/program/program_lexer.l" +#line 247 "./program/program_lexer.l" { return ENV; } YY_BREAK case 62: YY_RULE_SETUP -#line 248 "../../../src/mesa/program/program_lexer.l" +#line 248 "./program/program_lexer.l" { return EYE; } YY_BREAK case 63: YY_RULE_SETUP -#line 249 "../../../src/mesa/program/program_lexer.l" +#line 249 "./program/program_lexer.l" { return FOGCOORD; } YY_BREAK case 64: YY_RULE_SETUP -#line 250 "../../../src/mesa/program/program_lexer.l" +#line 250 "./program/program_lexer.l" { return FOG; } YY_BREAK case 65: YY_RULE_SETUP -#line 251 "../../../src/mesa/program/program_lexer.l" +#line 251 "./program/program_lexer.l" { return FRONT; } YY_BREAK case 66: YY_RULE_SETUP -#line 252 "../../../src/mesa/program/program_lexer.l" +#line 252 "./program/program_lexer.l" { return HALF; } YY_BREAK case 67: YY_RULE_SETUP -#line 253 "../../../src/mesa/program/program_lexer.l" +#line 253 "./program/program_lexer.l" { return INVERSE; } YY_BREAK case 68: YY_RULE_SETUP -#line 254 "../../../src/mesa/program/program_lexer.l" +#line 254 "./program/program_lexer.l" { return INVTRANS; } YY_BREAK case 69: YY_RULE_SETUP -#line 255 "../../../src/mesa/program/program_lexer.l" +#line 255 "./program/program_lexer.l" { return LIGHT; } YY_BREAK case 70: YY_RULE_SETUP -#line 256 "../../../src/mesa/program/program_lexer.l" +#line 256 "./program/program_lexer.l" { return LIGHTMODEL; } YY_BREAK case 71: YY_RULE_SETUP -#line 257 "../../../src/mesa/program/program_lexer.l" +#line 257 "./program/program_lexer.l" { return LIGHTPROD; } YY_BREAK case 72: YY_RULE_SETUP -#line 258 "../../../src/mesa/program/program_lexer.l" +#line 258 "./program/program_lexer.l" { return LOCAL; } YY_BREAK case 73: YY_RULE_SETUP -#line 259 "../../../src/mesa/program/program_lexer.l" +#line 259 "./program/program_lexer.l" { return MATERIAL; } YY_BREAK case 74: YY_RULE_SETUP -#line 260 "../../../src/mesa/program/program_lexer.l" +#line 260 "./program/program_lexer.l" { return MAT_PROGRAM; } YY_BREAK case 75: YY_RULE_SETUP -#line 261 "../../../src/mesa/program/program_lexer.l" +#line 261 "./program/program_lexer.l" { return MATRIX; } YY_BREAK case 76: YY_RULE_SETUP -#line 262 "../../../src/mesa/program/program_lexer.l" +#line 262 "./program/program_lexer.l" { return_token_or_DOT(require_ARB_vp, MATRIXINDEX); } YY_BREAK case 77: YY_RULE_SETUP -#line 263 "../../../src/mesa/program/program_lexer.l" +#line 263 "./program/program_lexer.l" { return MODELVIEW; } YY_BREAK case 78: YY_RULE_SETUP -#line 264 "../../../src/mesa/program/program_lexer.l" +#line 264 "./program/program_lexer.l" { return MVP; } YY_BREAK case 79: YY_RULE_SETUP -#line 265 "../../../src/mesa/program/program_lexer.l" +#line 265 "./program/program_lexer.l" { return_token_or_DOT(require_ARB_vp, NORMAL); } YY_BREAK case 80: YY_RULE_SETUP -#line 266 "../../../src/mesa/program/program_lexer.l" +#line 266 "./program/program_lexer.l" { return OBJECT; } YY_BREAK case 81: YY_RULE_SETUP -#line 267 "../../../src/mesa/program/program_lexer.l" +#line 267 "./program/program_lexer.l" { return PALETTE; } YY_BREAK case 82: YY_RULE_SETUP -#line 268 "../../../src/mesa/program/program_lexer.l" +#line 268 "./program/program_lexer.l" { return PARAMS; } YY_BREAK case 83: YY_RULE_SETUP -#line 269 "../../../src/mesa/program/program_lexer.l" +#line 269 "./program/program_lexer.l" { return PLANE; } YY_BREAK case 84: YY_RULE_SETUP -#line 270 "../../../src/mesa/program/program_lexer.l" +#line 270 "./program/program_lexer.l" { return_token_or_DOT(require_ARB_vp, POINT_TOK); } YY_BREAK case 85: YY_RULE_SETUP -#line 271 "../../../src/mesa/program/program_lexer.l" +#line 271 "./program/program_lexer.l" { return_token_or_DOT(require_ARB_vp, POINTSIZE); } YY_BREAK case 86: YY_RULE_SETUP -#line 272 "../../../src/mesa/program/program_lexer.l" +#line 272 "./program/program_lexer.l" { return POSITION; } YY_BREAK case 87: YY_RULE_SETUP -#line 273 "../../../src/mesa/program/program_lexer.l" +#line 273 "./program/program_lexer.l" { return PRIMARY; } YY_BREAK case 88: YY_RULE_SETUP -#line 274 "../../../src/mesa/program/program_lexer.l" +#line 274 "./program/program_lexer.l" { return PROJECTION; } YY_BREAK case 89: YY_RULE_SETUP -#line 275 "../../../src/mesa/program/program_lexer.l" +#line 275 "./program/program_lexer.l" { return_token_or_DOT(require_ARB_fp, RANGE); } YY_BREAK case 90: YY_RULE_SETUP -#line 276 "../../../src/mesa/program/program_lexer.l" +#line 276 "./program/program_lexer.l" { return ROW; } YY_BREAK case 91: YY_RULE_SETUP -#line 277 "../../../src/mesa/program/program_lexer.l" +#line 277 "./program/program_lexer.l" { return SCENECOLOR; } YY_BREAK case 92: YY_RULE_SETUP -#line 278 "../../../src/mesa/program/program_lexer.l" +#line 278 "./program/program_lexer.l" { return SECONDARY; } YY_BREAK case 93: YY_RULE_SETUP -#line 279 "../../../src/mesa/program/program_lexer.l" +#line 279 "./program/program_lexer.l" { return SHININESS; } YY_BREAK case 94: YY_RULE_SETUP -#line 280 "../../../src/mesa/program/program_lexer.l" +#line 280 "./program/program_lexer.l" { return_token_or_DOT(require_ARB_vp, SIZE_TOK); } YY_BREAK case 95: YY_RULE_SETUP -#line 281 "../../../src/mesa/program/program_lexer.l" +#line 281 "./program/program_lexer.l" { return SPECULAR; } YY_BREAK case 96: YY_RULE_SETUP -#line 282 "../../../src/mesa/program/program_lexer.l" +#line 282 "./program/program_lexer.l" { return SPOT; } YY_BREAK case 97: YY_RULE_SETUP -#line 283 "../../../src/mesa/program/program_lexer.l" +#line 283 "./program/program_lexer.l" { return TEXCOORD; } YY_BREAK case 98: YY_RULE_SETUP -#line 284 "../../../src/mesa/program/program_lexer.l" +#line 284 "./program/program_lexer.l" { return_token_or_DOT(require_ARB_fp, TEXENV); } YY_BREAK case 99: YY_RULE_SETUP -#line 285 "../../../src/mesa/program/program_lexer.l" +#line 285 "./program/program_lexer.l" { return_token_or_DOT(require_ARB_vp, TEXGEN); } YY_BREAK case 100: YY_RULE_SETUP -#line 286 "../../../src/mesa/program/program_lexer.l" +#line 286 "./program/program_lexer.l" { return_token_or_DOT(require_ARB_vp, TEXGEN_Q); } YY_BREAK case 101: YY_RULE_SETUP -#line 287 "../../../src/mesa/program/program_lexer.l" +#line 287 "./program/program_lexer.l" { return_token_or_DOT(require_ARB_vp, TEXGEN_S); } YY_BREAK case 102: YY_RULE_SETUP -#line 288 "../../../src/mesa/program/program_lexer.l" +#line 288 "./program/program_lexer.l" { return_token_or_DOT(require_ARB_vp, TEXGEN_T); } YY_BREAK case 103: YY_RULE_SETUP -#line 289 "../../../src/mesa/program/program_lexer.l" +#line 289 "./program/program_lexer.l" { return TEXTURE; } YY_BREAK case 104: YY_RULE_SETUP -#line 290 "../../../src/mesa/program/program_lexer.l" +#line 290 "./program/program_lexer.l" { return TRANSPOSE; } YY_BREAK case 105: YY_RULE_SETUP -#line 291 "../../../src/mesa/program/program_lexer.l" +#line 291 "./program/program_lexer.l" { return_token_or_DOT(require_ARB_vp, VTXATTRIB); } YY_BREAK case 106: YY_RULE_SETUP -#line 292 "../../../src/mesa/program/program_lexer.l" +#line 292 "./program/program_lexer.l" { return_token_or_DOT(require_ARB_vp, WEIGHT); } YY_BREAK case 107: YY_RULE_SETUP -#line 294 "../../../src/mesa/program/program_lexer.l" +#line 294 "./program/program_lexer.l" { return_token_or_IDENTIFIER(require_ARB_fp, TEXTURE_UNIT); } YY_BREAK case 108: YY_RULE_SETUP -#line 295 "../../../src/mesa/program/program_lexer.l" +#line 295 "./program/program_lexer.l" { return_token_or_IDENTIFIER(require_ARB_fp, TEX_1D); } YY_BREAK case 109: YY_RULE_SETUP -#line 296 "../../../src/mesa/program/program_lexer.l" +#line 296 "./program/program_lexer.l" { return_token_or_IDENTIFIER(require_ARB_fp, TEX_2D); } YY_BREAK case 110: YY_RULE_SETUP -#line 297 "../../../src/mesa/program/program_lexer.l" +#line 297 "./program/program_lexer.l" { return_token_or_IDENTIFIER(require_ARB_fp, TEX_3D); } YY_BREAK case 111: YY_RULE_SETUP -#line 298 "../../../src/mesa/program/program_lexer.l" +#line 298 "./program/program_lexer.l" { return_token_or_IDENTIFIER(require_ARB_fp, TEX_CUBE); } YY_BREAK case 112: YY_RULE_SETUP -#line 299 "../../../src/mesa/program/program_lexer.l" +#line 299 "./program/program_lexer.l" { return_token_or_IDENTIFIER(require_ARB_fp && require_rect, TEX_RECT); } YY_BREAK case 113: YY_RULE_SETUP -#line 300 "../../../src/mesa/program/program_lexer.l" +#line 300 "./program/program_lexer.l" { return_token_or_IDENTIFIER(require_ARB_fp && require_shadow, TEX_SHADOW1D); } YY_BREAK case 114: YY_RULE_SETUP -#line 301 "../../../src/mesa/program/program_lexer.l" +#line 301 "./program/program_lexer.l" { return_token_or_IDENTIFIER(require_ARB_fp && require_shadow, TEX_SHADOW2D); } YY_BREAK case 115: YY_RULE_SETUP -#line 302 "../../../src/mesa/program/program_lexer.l" +#line 302 "./program/program_lexer.l" { return_token_or_IDENTIFIER(require_ARB_fp && require_shadow && require_rect, TEX_SHADOWRECT); } YY_BREAK case 116: YY_RULE_SETUP -#line 303 "../../../src/mesa/program/program_lexer.l" +#line 303 "./program/program_lexer.l" { return_token_or_IDENTIFIER(require_ARB_fp && require_texarray, TEX_ARRAY1D); } YY_BREAK case 117: YY_RULE_SETUP -#line 304 "../../../src/mesa/program/program_lexer.l" +#line 304 "./program/program_lexer.l" { return_token_or_IDENTIFIER(require_ARB_fp && require_texarray, TEX_ARRAY2D); } YY_BREAK case 118: YY_RULE_SETUP -#line 305 "../../../src/mesa/program/program_lexer.l" +#line 305 "./program/program_lexer.l" { return_token_or_IDENTIFIER(require_ARB_fp && require_shadow && require_texarray, TEX_ARRAYSHADOW1D); } YY_BREAK case 119: YY_RULE_SETUP -#line 306 "../../../src/mesa/program/program_lexer.l" +#line 306 "./program/program_lexer.l" { return_token_or_IDENTIFIER(require_ARB_fp && require_shadow && require_texarray, TEX_ARRAYSHADOW2D); } YY_BREAK case 120: YY_RULE_SETUP -#line 308 "../../../src/mesa/program/program_lexer.l" +#line 308 "./program/program_lexer.l" { return handle_ident(yyextra, yytext, yylval); } YY_BREAK case 121: YY_RULE_SETUP -#line 310 "../../../src/mesa/program/program_lexer.l" +#line 310 "./program/program_lexer.l" { return DOT_DOT; } YY_BREAK case 122: YY_RULE_SETUP -#line 312 "../../../src/mesa/program/program_lexer.l" +#line 312 "./program/program_lexer.l" { yylval->integer = strtol(yytext, NULL, 10); return INTEGER; @@ -1993,7 +2057,7 @@ YY_BREAK case 123: YY_RULE_SETUP -#line 316 "../../../src/mesa/program/program_lexer.l" +#line 316 "./program/program_lexer.l" { yylval->real = _mesa_strtof(yytext, NULL); return REAL; @@ -2006,7 +2070,7 @@ yyg->yy_c_buf_p = yy_cp -= 1; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 320 "../../../src/mesa/program/program_lexer.l" +#line 320 "./program/program_lexer.l" { yylval->real = _mesa_strtof(yytext, NULL); return REAL; @@ -2014,7 +2078,7 @@ YY_BREAK case 125: YY_RULE_SETUP -#line 324 "../../../src/mesa/program/program_lexer.l" +#line 324 "./program/program_lexer.l" { yylval->real = _mesa_strtof(yytext, NULL); return REAL; @@ -2022,7 +2086,7 @@ YY_BREAK case 126: YY_RULE_SETUP -#line 328 "../../../src/mesa/program/program_lexer.l" +#line 328 "./program/program_lexer.l" { yylval->real = _mesa_strtof(yytext, NULL); return REAL; @@ -2030,7 +2094,7 @@ YY_BREAK case 127: YY_RULE_SETUP -#line 333 "../../../src/mesa/program/program_lexer.l" +#line 333 "./program/program_lexer.l" { yylval->swiz_mask.swizzle = SWIZZLE_NOOP; yylval->swiz_mask.mask = WRITEMASK_XYZW; @@ -2039,7 +2103,7 @@ YY_BREAK case 128: YY_RULE_SETUP -#line 339 "../../../src/mesa/program/program_lexer.l" +#line 339 "./program/program_lexer.l" { yylval->swiz_mask.swizzle = SWIZZLE_INVAL; yylval->swiz_mask.mask = WRITEMASK_XY @@ -2049,7 +2113,7 @@ YY_BREAK case 129: YY_RULE_SETUP -#line 345 "../../../src/mesa/program/program_lexer.l" +#line 345 "./program/program_lexer.l" { yylval->swiz_mask.swizzle = SWIZZLE_INVAL; yylval->swiz_mask.mask = WRITEMASK_XZW; @@ -2058,7 +2122,7 @@ YY_BREAK case 130: YY_RULE_SETUP -#line 350 "../../../src/mesa/program/program_lexer.l" +#line 350 "./program/program_lexer.l" { yylval->swiz_mask.swizzle = SWIZZLE_INVAL; yylval->swiz_mask.mask = WRITEMASK_YZW; @@ -2067,7 +2131,7 @@ YY_BREAK case 131: YY_RULE_SETUP -#line 356 "../../../src/mesa/program/program_lexer.l" +#line 356 "./program/program_lexer.l" { yylval->swiz_mask.swizzle = SWIZZLE_INVAL; yylval->swiz_mask.mask = WRITEMASK_X @@ -2077,7 +2141,7 @@ YY_BREAK case 132: YY_RULE_SETUP -#line 362 "../../../src/mesa/program/program_lexer.l" +#line 362 "./program/program_lexer.l" { yylval->swiz_mask.swizzle = SWIZZLE_INVAL; yylval->swiz_mask.mask = WRITEMASK_Y @@ -2087,7 +2151,7 @@ YY_BREAK case 133: YY_RULE_SETUP -#line 368 "../../../src/mesa/program/program_lexer.l" +#line 368 "./program/program_lexer.l" { yylval->swiz_mask.swizzle = SWIZZLE_INVAL; yylval->swiz_mask.mask = WRITEMASK_ZW; @@ -2096,7 +2160,7 @@ YY_BREAK case 134: YY_RULE_SETUP -#line 374 "../../../src/mesa/program/program_lexer.l" +#line 374 "./program/program_lexer.l" { const unsigned s = swiz_from_char(yytext[1]); yylval->swiz_mask.swizzle = MAKE_SWIZZLE4(s, s, s, s); @@ -2106,7 +2170,7 @@ YY_BREAK case 135: YY_RULE_SETUP -#line 381 "../../../src/mesa/program/program_lexer.l" +#line 381 "./program/program_lexer.l" { yylval->swiz_mask.swizzle = MAKE_SWIZZLE4(swiz_from_char(yytext[1]), swiz_from_char(yytext[2]), @@ -2118,7 +2182,7 @@ YY_BREAK case 136: YY_RULE_SETUP -#line 390 "../../../src/mesa/program/program_lexer.l" +#line 390 "./program/program_lexer.l" { yylval->swiz_mask.swizzle = SWIZZLE_NOOP; yylval->swiz_mask.mask = WRITEMASK_XYZW; @@ -2127,7 +2191,7 @@ YY_BREAK case 137: YY_RULE_SETUP -#line 396 "../../../src/mesa/program/program_lexer.l" +#line 396 "./program/program_lexer.l" { yylval->swiz_mask.swizzle = SWIZZLE_INVAL; yylval->swiz_mask.mask = WRITEMASK_XY @@ -2137,7 +2201,7 @@ YY_BREAK case 138: YY_RULE_SETUP -#line 402 "../../../src/mesa/program/program_lexer.l" +#line 402 "./program/program_lexer.l" { yylval->swiz_mask.swizzle = SWIZZLE_INVAL; yylval->swiz_mask.mask = WRITEMASK_XZW; @@ -2146,7 +2210,7 @@ YY_BREAK case 139: YY_RULE_SETUP -#line 407 "../../../src/mesa/program/program_lexer.l" +#line 407 "./program/program_lexer.l" { yylval->swiz_mask.swizzle = SWIZZLE_INVAL; yylval->swiz_mask.mask = WRITEMASK_YZW; @@ -2155,7 +2219,7 @@ YY_BREAK case 140: YY_RULE_SETUP -#line 413 "../../../src/mesa/program/program_lexer.l" +#line 413 "./program/program_lexer.l" { yylval->swiz_mask.swizzle = SWIZZLE_INVAL; yylval->swiz_mask.mask = WRITEMASK_X @@ -2165,7 +2229,7 @@ YY_BREAK case 141: YY_RULE_SETUP -#line 419 "../../../src/mesa/program/program_lexer.l" +#line 419 "./program/program_lexer.l" { yylval->swiz_mask.swizzle = SWIZZLE_INVAL; yylval->swiz_mask.mask = WRITEMASK_Y @@ -2175,7 +2239,7 @@ YY_BREAK case 142: YY_RULE_SETUP -#line 425 "../../../src/mesa/program/program_lexer.l" +#line 425 "./program/program_lexer.l" { yylval->swiz_mask.swizzle = SWIZZLE_INVAL; yylval->swiz_mask.mask = WRITEMASK_ZW; @@ -2184,7 +2248,7 @@ YY_BREAK case 143: YY_RULE_SETUP -#line 431 "../../../src/mesa/program/program_lexer.l" +#line 431 "./program/program_lexer.l" { const unsigned s = swiz_from_char(yytext[1]); yylval->swiz_mask.swizzle = MAKE_SWIZZLE4(s, s, s, s); @@ -2194,7 +2258,7 @@ YY_BREAK case 144: YY_RULE_SETUP -#line 439 "../../../src/mesa/program/program_lexer.l" +#line 439 "./program/program_lexer.l" { if (require_ARB_vp) { return TEXGEN_R; @@ -2208,7 +2272,7 @@ YY_BREAK case 145: YY_RULE_SETUP -#line 450 "../../../src/mesa/program/program_lexer.l" +#line 450 "./program/program_lexer.l" { yylval->swiz_mask.swizzle = MAKE_SWIZZLE4(swiz_from_char(yytext[1]), swiz_from_char(yytext[2]), @@ -2220,13 +2284,13 @@ YY_BREAK case 146: YY_RULE_SETUP -#line 459 "../../../src/mesa/program/program_lexer.l" +#line 459 "./program/program_lexer.l" { return DOT; } YY_BREAK case 147: /* rule 147 can match eol */ YY_RULE_SETUP -#line 461 "../../../src/mesa/program/program_lexer.l" +#line 461 "./program/program_lexer.l" { yylloc->first_line++; yylloc->first_column = 1; @@ -2237,7 +2301,7 @@ YY_BREAK case 148: YY_RULE_SETUP -#line 468 "../../../src/mesa/program/program_lexer.l" +#line 468 "./program/program_lexer.l" /* eat whitespace */ ; YY_BREAK case 149: @@ -2245,20 +2309,20 @@ yyg->yy_c_buf_p = yy_cp -= 1; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP -#line 469 "../../../src/mesa/program/program_lexer.l" +#line 469 "./program/program_lexer.l" /* eat comments */ ; YY_BREAK case 150: YY_RULE_SETUP -#line 470 "../../../src/mesa/program/program_lexer.l" +#line 470 "./program/program_lexer.l" { return yytext[0]; } YY_BREAK case 151: YY_RULE_SETUP -#line 471 "../../../src/mesa/program/program_lexer.l" +#line 471 "./program/program_lexer.l" ECHO; YY_BREAK -#line 2262 "program/lex.yy.c" +#line 2325 "program/lex.yy.c" case YY_STATE_EOF(INITIAL): yyterminate(); @@ -2404,7 +2468,7 @@ struct yyguts_t * yyg = (struct yyguts_t*)yyscanner; char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf; char *source = yyg->yytext_ptr; - yy_size_t number_to_move, i; + int number_to_move, i; int ret_val; if ( yyg->yy_c_buf_p > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[yyg->yy_n_chars + 1] ) @@ -2433,7 +2497,7 @@ /* Try to read more data. */ /* First move last chars to start of buffer. */ - number_to_move = (yy_size_t) (yyg->yy_c_buf_p - yyg->yytext_ptr) - 1; + number_to_move = (int) (yyg->yy_c_buf_p - yyg->yytext_ptr - 1); for ( i = 0; i < number_to_move; ++i ) *(dest++) = *(source++); @@ -2469,7 +2533,7 @@ b->yy_ch_buf = (char *) /* Include room in for 2 EOB chars. */ - _mesa_program_lexer_realloc((void *) b->yy_ch_buf,b->yy_buf_size + 2 ,yyscanner ); + _mesa_program_lexer_realloc((void *) b->yy_ch_buf,(yy_size_t) (b->yy_buf_size + 2) ,yyscanner ); } else /* Can't grow it, we don't own it. */ @@ -2515,10 +2579,10 @@ else ret_val = EOB_ACT_CONTINUE_SCAN; - if ((int) (yyg->yy_n_chars + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) { + if ((yyg->yy_n_chars + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) { /* Extend the array by 50%, plus the number we really need. */ int new_size = yyg->yy_n_chars + number_to_move + (yyg->yy_n_chars >> 1); - YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) _mesa_program_lexer_realloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size ,yyscanner ); + YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) _mesa_program_lexer_realloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,(yy_size_t) new_size ,yyscanner ); if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" ); } @@ -2554,9 +2618,9 @@ { yy_current_state = (int) yy_def[yy_current_state]; if ( yy_current_state >= 675 ) - yy_c = yy_meta[(unsigned int) yy_c]; + yy_c = yy_meta[yy_c]; } - yy_current_state = yy_nxt[yy_base[yy_current_state] + (flex_int16_t) yy_c]; + yy_current_state = yy_nxt[yy_base[yy_current_state] + yy_c]; } return yy_current_state; @@ -2583,9 +2647,9 @@ { yy_current_state = (int) yy_def[yy_current_state]; if ( yy_current_state >= 675 ) - yy_c = yy_meta[(unsigned int) yy_c]; + yy_c = yy_meta[yy_c]; } - yy_current_state = yy_nxt[yy_base[yy_current_state] + (flex_int16_t) yy_c]; + yy_current_state = yy_nxt[yy_base[yy_current_state] + yy_c]; yy_is_jam = (yy_current_state == 674); (void)yyg; @@ -2659,7 +2723,7 @@ else { /* need more input */ - int offset = yyg->yy_c_buf_p - yyg->yytext_ptr; + int offset = (int) (yyg->yy_c_buf_p - yyg->yytext_ptr); ++yyg->yy_c_buf_p; switch ( yy_get_next_buffer( yyscanner ) ) @@ -2787,12 +2851,12 @@ if ( ! b ) YY_FATAL_ERROR( "out of dynamic memory in _mesa_program_lexer__create_buffer()" ); - b->yy_buf_size = (yy_size_t)size; + b->yy_buf_size = size; /* yy_ch_buf has to be 2 characters longer than the size given because * we need to put in 2 end-of-buffer characters. */ - b->yy_ch_buf = (char *) _mesa_program_lexer_alloc(b->yy_buf_size + 2 ,yyscanner ); + b->yy_ch_buf = (char *) _mesa_program_lexer_alloc((yy_size_t) (b->yy_buf_size + 2) ,yyscanner ); if ( ! b->yy_ch_buf ) YY_FATAL_ERROR( "out of dynamic memory in _mesa_program_lexer__create_buffer()" ); @@ -2939,7 +3003,7 @@ */ static void _mesa_program_lexer_ensure_buffer_stack (yyscan_t yyscanner) { - int num_to_alloc; + yy_size_t num_to_alloc; struct yyguts_t * yyg = (struct yyguts_t*)yyscanner; if (!yyg->yy_buffer_stack) { @@ -2954,9 +3018,9 @@ , yyscanner); if ( ! yyg->yy_buffer_stack ) YY_FATAL_ERROR( "out of dynamic memory in _mesa_program_lexer_ensure_buffer_stack()" ); - + memset(yyg->yy_buffer_stack, 0, num_to_alloc * sizeof(struct yy_buffer_state*)); - + yyg->yy_buffer_stack_max = num_to_alloc; yyg->yy_buffer_stack_top = 0; return; @@ -2985,7 +3049,7 @@ * @param base the character buffer * @param size the size in bytes of the character buffer * @param yyscanner The scanner object. - * @return the newly allocated buffer state object. + * @return the newly allocated buffer state object. */ YY_BUFFER_STATE _mesa_program_lexer__scan_buffer (char * base, yy_size_t size , yyscan_t yyscanner) { @@ -3001,7 +3065,7 @@ if ( ! b ) YY_FATAL_ERROR( "out of dynamic memory in _mesa_program_lexer__scan_buffer()" ); - b->yy_buf_size = size - 2; /* "- 2" to take care of EOB's */ + b->yy_buf_size = (int) (size - 2); /* "- 2" to take care of EOB's */ b->yy_buf_pos = b->yy_ch_buf = base; b->yy_is_our_buffer = 0; b->yy_input_file = NULL; @@ -3024,7 +3088,7 @@ * @note If you want to scan bytes that may contain NUL values, then use * _mesa_program_lexer__scan_bytes() instead. */ -YY_BUFFER_STATE _mesa_program_lexer__scan_string (yyconst char * yystr , yyscan_t yyscanner) +YY_BUFFER_STATE _mesa_program_lexer__scan_string (const char * yystr , yyscan_t yyscanner) { return _mesa_program_lexer__scan_bytes(yystr,(int) strlen(yystr) ,yyscanner); @@ -3037,15 +3101,15 @@ * @param yyscanner The scanner object. * @return the newly allocated buffer state object. */ -YY_BUFFER_STATE _mesa_program_lexer__scan_bytes (yyconst char * yybytes, int _yybytes_len , yyscan_t yyscanner) +YY_BUFFER_STATE _mesa_program_lexer__scan_bytes (const char * yybytes, int _yybytes_len , yyscan_t yyscanner) { YY_BUFFER_STATE b; char *buf; yy_size_t n; - yy_size_t i; + int i; /* Get memory for full buffer, including space for trailing EOB's. */ - n = (yy_size_t) _yybytes_len + 2; + n = (yy_size_t) (_yybytes_len + 2); buf = (char *) _mesa_program_lexer_alloc(n ,yyscanner ); if ( ! buf ) YY_FATAL_ERROR( "out of dynamic memory in _mesa_program_lexer__scan_bytes()" ); @@ -3071,7 +3135,7 @@ #define YY_EXIT_FAILURE 2 #endif -static void yynoreturn yy_fatal_error (yyconst char* msg , yyscan_t yyscanner) +static void yynoreturn yy_fatal_error (const char* msg , yyscan_t yyscanner) { struct yyguts_t * yyg = (struct yyguts_t*)yyscanner; (void)yyg; @@ -3113,7 +3177,7 @@ int _mesa_program_lexer_get_lineno (yyscan_t yyscanner) { struct yyguts_t * yyg = (struct yyguts_t*)yyscanner; - + if (! YY_CURRENT_BUFFER) return 0; @@ -3126,7 +3190,7 @@ int _mesa_program_lexer_get_column (yyscan_t yyscanner) { struct yyguts_t * yyg = (struct yyguts_t*)yyscanner; - + if (! YY_CURRENT_BUFFER) return 0; @@ -3272,9 +3336,7 @@ * the ONLY reentrant function that doesn't take the scanner as the last argument. * That's why we explicitly handle the declaration, instead of using our macros. */ - int _mesa_program_lexer_lex_init(yyscan_t* ptr_yy_globals) - { if (ptr_yy_globals == NULL){ errno = EINVAL; @@ -3301,9 +3363,7 @@ * The user defined value in the first argument will be available to _mesa_program_lexer_alloc in * the yyextra field. */ - int _mesa_program_lexer_lex_init_extra(YY_EXTRA_TYPE yy_user_defined,yyscan_t* ptr_yy_globals ) - { struct yyguts_t dummy_yyguts; @@ -3313,20 +3373,20 @@ errno = EINVAL; return 1; } - + *ptr_yy_globals = (yyscan_t) _mesa_program_lexer_alloc ( sizeof( struct yyguts_t ), &dummy_yyguts ); - + if (*ptr_yy_globals == NULL){ errno = ENOMEM; return 1; } - + /* By setting to 0xAA, we expose bugs in yy_init_globals. Leave at 0x00 for releases. */ memset(*ptr_yy_globals,0x00,sizeof(struct yyguts_t)); - + _mesa_program_lexer_set_extra (yy_user_defined, *ptr_yy_globals); - + return yy_init_globals ( *ptr_yy_globals ); } @@ -3398,7 +3458,7 @@ */ #ifndef yytext_ptr -static void yy_flex_strncpy (char* s1, yyconst char * s2, int n , yyscan_t yyscanner) +static void yy_flex_strncpy (char* s1, const char * s2, int n , yyscan_t yyscanner) { struct yyguts_t * yyg = (struct yyguts_t*)yyscanner; (void)yyg; @@ -3410,7 +3470,7 @@ #endif #ifdef YY_NEED_STRLEN -static int yy_flex_strlen (yyconst char * s , yyscan_t yyscanner) +static int yy_flex_strlen (const char * s , yyscan_t yyscanner) { int n; for ( n = 0; s[n]; ++n ) @@ -3451,21 +3511,20 @@ #define YYTABLES_NAME "yytables" -#line 471 "../../../src/mesa/program/program_lexer.l" - +#line 471 "./program/program_lexer.l" void _mesa_program_lexer_ctor(void **scanner, struct asm_parser_state *state, const char *string, size_t len) { - _mesa_program_lexer_lex_init_extra(state,scanner); - _mesa_program_lexer__scan_bytes(string,len,*scanner); + yylex_init_extra(state, scanner); + yy_scan_bytes(string, len, *scanner); } void _mesa_program_lexer_dtor(void *scanner) { - _mesa_program_lexer_lex_destroy(scanner); + yylex_destroy(scanner); } diff -Nru mesa-12.0.6/src/mesa/program/prog_execute.c mesa-17.0.7/src/mesa/program/prog_execute.c --- mesa-12.0.6/src/mesa/program/prog_execute.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/prog_execute.c 2017-06-01 10:37:10.000000000 +0000 @@ -374,7 +374,7 @@ const struct gl_program *program, struct gl_program_machine *machine) { - const GLuint numInst = program->NumInstructions; + const GLuint numInst = program->arb.NumInstructions; const GLuint maxExec = 65536; GLuint pc, numExec = 0; @@ -392,7 +392,7 @@ } for (pc = 0; pc < numInst; pc++) { - const struct prog_instruction *inst = program->Instructions + pc; + const struct prog_instruction *inst = program->arb.Instructions + pc; if (DEBUG_PROG) { _mesa_print_instruction(inst); @@ -439,12 +439,12 @@ break; case OPCODE_BGNLOOP: /* no-op */ - assert(program->Instructions[inst->BranchTarget].Opcode + assert(program->arb.Instructions[inst->BranchTarget].Opcode == OPCODE_ENDLOOP); break; case OPCODE_ENDLOOP: /* subtract 1 here since pc is incremented by for(pc) loop */ - assert(program->Instructions[inst->BranchTarget].Opcode + assert(program->arb.Instructions[inst->BranchTarget].Opcode == OPCODE_BGNLOOP); pc = inst->BranchTarget - 1; /* go to matching BNGLOOP */ break; @@ -453,14 +453,14 @@ case OPCODE_ENDSUB: /* end subroutine */ break; case OPCODE_BRK: /* break out of loop (conditional) */ - assert(program->Instructions[inst->BranchTarget].Opcode + assert(program->arb.Instructions[inst->BranchTarget].Opcode == OPCODE_ENDLOOP); /* break out of loop */ /* pc++ at end of for-loop will put us after the ENDLOOP inst */ pc = inst->BranchTarget; break; case OPCODE_CONT: /* continue loop (conditional) */ - assert(program->Instructions[inst->BranchTarget].Opcode + assert(program->arb.Instructions[inst->BranchTarget].Opcode == OPCODE_ENDLOOP); /* continue at ENDLOOP */ /* Subtract 1 here since we'll do pc++ at end of for-loop */ @@ -645,9 +645,9 @@ case OPCODE_IF: { GLboolean cond; - assert(program->Instructions[inst->BranchTarget].Opcode + assert(program->arb.Instructions[inst->BranchTarget].Opcode == OPCODE_ELSE || - program->Instructions[inst->BranchTarget].Opcode + program->arb.Instructions[inst->BranchTarget].Opcode == OPCODE_ENDIF); /* eval condition */ GLfloat a[4]; @@ -669,7 +669,7 @@ break; case OPCODE_ELSE: /* goto ENDIF */ - assert(program->Instructions[inst->BranchTarget].Opcode + assert(program->arb.Instructions[inst->BranchTarget].Opcode == OPCODE_ENDIF); assert(inst->BranchTarget >= 0); pc = inst->BranchTarget; diff -Nru mesa-12.0.6/src/mesa/program/prog_hash_table.c mesa-17.0.7/src/mesa/program/prog_hash_table.c --- mesa-12.0.6/src/mesa/program/prog_hash_table.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/prog_hash_table.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,243 +0,0 @@ -/* - * Copyright © 2008 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -/** - * \file hash_table.c - * \brief Implementation of a generic, opaque hash table data type. - * - * \author Ian Romanick - */ - -#include "main/imports.h" -#include "util/simple_list.h" -#include "hash_table.h" - -struct node { - struct node *next; - struct node *prev; -}; - -struct hash_table { - hash_func_t hash; - hash_compare_func_t compare; - - unsigned num_buckets; - struct node buckets[1]; -}; - - -struct hash_node { - struct node link; - const void *key; - void *data; -}; - - -struct hash_table * -hash_table_ctor(unsigned num_buckets, hash_func_t hash, - hash_compare_func_t compare) -{ - struct hash_table *ht; - unsigned i; - - - if (num_buckets < 16) { - num_buckets = 16; - } - - ht = malloc(sizeof(*ht) + ((num_buckets - 1) - * sizeof(ht->buckets[0]))); - if (ht != NULL) { - ht->hash = hash; - ht->compare = compare; - ht->num_buckets = num_buckets; - - for (i = 0; i < num_buckets; i++) { - make_empty_list(& ht->buckets[i]); - } - } - - return ht; -} - - -void -hash_table_dtor(struct hash_table *ht) -{ - hash_table_clear(ht); - free(ht); -} - - -void -hash_table_clear(struct hash_table *ht) -{ - struct node *node; - struct node *temp; - unsigned i; - - - for (i = 0; i < ht->num_buckets; i++) { - foreach_s(node, temp, & ht->buckets[i]) { - remove_from_list(node); - free(node); - } - - assert(is_empty_list(& ht->buckets[i])); - } -} - - -static struct hash_node * -get_node(struct hash_table *ht, const void *key) -{ - const unsigned hash_value = (*ht->hash)(key); - const unsigned bucket = hash_value % ht->num_buckets; - struct node *node; - - foreach(node, & ht->buckets[bucket]) { - struct hash_node *hn = (struct hash_node *) node; - - if ((*ht->compare)(hn->key, key) == 0) { - return hn; - } - } - - return NULL; -} - -void * -hash_table_find(struct hash_table *ht, const void *key) -{ - struct hash_node *hn = get_node(ht, key); - - return (hn == NULL) ? NULL : hn->data; -} - -void -hash_table_insert(struct hash_table *ht, void *data, const void *key) -{ - const unsigned hash_value = (*ht->hash)(key); - const unsigned bucket = hash_value % ht->num_buckets; - struct hash_node *node; - - node = calloc(1, sizeof(*node)); - if (node == NULL) { - _mesa_error_no_memory(__func__); - return; - } - - node->data = data; - node->key = key; - - insert_at_head(& ht->buckets[bucket], & node->link); -} - -bool -hash_table_replace(struct hash_table *ht, void *data, const void *key) -{ - const unsigned hash_value = (*ht->hash)(key); - const unsigned bucket = hash_value % ht->num_buckets; - struct node *node; - struct hash_node *hn; - - foreach(node, & ht->buckets[bucket]) { - hn = (struct hash_node *) node; - - if ((*ht->compare)(hn->key, key) == 0) { - hn->data = data; - return true; - } - } - - hn = calloc(1, sizeof(*hn)); - if (hn == NULL) { - _mesa_error_no_memory(__func__); - return false; - } - - hn->data = data; - hn->key = key; - - insert_at_head(& ht->buckets[bucket], & hn->link); - return false; -} - -void -hash_table_remove(struct hash_table *ht, const void *key) -{ - struct node *node = (struct node *) get_node(ht, key); - if (node != NULL) { - remove_from_list(node); - free(node); - return; - } -} - -void -hash_table_call_foreach(struct hash_table *ht, - void (*callback)(const void *key, - void *data, - void *closure), - void *closure) -{ - unsigned bucket; - - for (bucket = 0; bucket < ht->num_buckets; bucket++) { - struct node *node, *temp; - foreach_s(node, temp, &ht->buckets[bucket]) { - struct hash_node *hn = (struct hash_node *) node; - - callback(hn->key, hn->data, closure); - } - } -} - -unsigned -hash_table_string_hash(const void *key) -{ - const char *str = (const char *) key; - unsigned hash = 5381; - - - while (*str != '\0') { - hash = (hash * 33) + *str; - str++; - } - - return hash; -} - - -unsigned -hash_table_pointer_hash(const void *key) -{ - return (unsigned)((uintptr_t) key / sizeof(void *)); -} - - -int -hash_table_pointer_compare(const void *key1, const void *key2) -{ - return key1 == key2 ? 0 : 1; -} diff -Nru mesa-12.0.6/src/mesa/program/prog_instruction.c mesa-17.0.7/src/mesa/program/prog_instruction.c --- mesa-12.0.6/src/mesa/program/prog_instruction.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/prog_instruction.c 2017-06-01 10:37:10.000000000 +0000 @@ -59,19 +59,6 @@ /** - * Allocate an array of program instructions. - * \param numInst number of instructions - * \return pointer to instruction memory - */ -struct prog_instruction * -_mesa_alloc_instructions(GLuint numInst) -{ - return - calloc(numInst, sizeof(struct prog_instruction)); -} - - -/** * Copy an array of program instructions. * \param dest pointer to destination. * \param src pointer to source. @@ -82,30 +69,11 @@ _mesa_copy_instructions(struct prog_instruction *dest, const struct prog_instruction *src, GLuint n) { - GLuint i; memcpy(dest, src, n * sizeof(struct prog_instruction)); - for (i = 0; i < n; i++) { - if (src[i].Comment) - dest[i].Comment = strdup(src[i].Comment); - } return dest; } -/** - * Free an array of instructions - */ -void -_mesa_free_instructions(struct prog_instruction *inst, GLuint count) -{ - GLuint i; - for (i = 0; i < count; i++) { - free((char *)inst[i].Comment); - } - free(inst); -} - - /** * Basic info about each instruction */ diff -Nru mesa-12.0.6/src/mesa/program/prog_instruction.h mesa-17.0.7/src/mesa/program/prog_instruction.h --- mesa-12.0.6/src/mesa/program/prog_instruction.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/prog_instruction.h 2017-06-01 10:37:10.000000000 +0000 @@ -254,9 +254,6 @@ * For ELSE, points to ENDIF. */ GLint BranchTarget; - - /** for debugging purposes */ - const char *Comment; }; @@ -264,19 +261,15 @@ extern "C" { #endif +struct gl_program; + extern void _mesa_init_instructions(struct prog_instruction *inst, GLuint count); extern struct prog_instruction * -_mesa_alloc_instructions(GLuint numInst); - -extern struct prog_instruction * _mesa_copy_instructions(struct prog_instruction *dest, const struct prog_instruction *src, GLuint n); -extern void -_mesa_free_instructions(struct prog_instruction *inst, GLuint count); - extern GLuint _mesa_num_inst_src_regs(enum prog_opcode opcode); diff -Nru mesa-12.0.6/src/mesa/program/prog_opt_constant_fold.c mesa-17.0.7/src/mesa/program/prog_opt_constant_fold.c --- mesa-12.0.6/src/mesa/program/prog_opt_constant_fold.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/prog_opt_constant_fold.c 2017-06-01 10:37:10.000000000 +0000 @@ -127,8 +127,8 @@ bool progress = false; unsigned i; - for (i = 0; i < prog->NumInstructions; i++) { - struct prog_instruction *const inst = &prog->Instructions[i]; + for (i = 0; i < prog->arb.NumInstructions; i++) { + struct prog_instruction *const inst = &prog->arb.Instructions[i]; switch (inst->Opcode) { case OPCODE_ADD: diff -Nru mesa-12.0.6/src/mesa/program/prog_optimize.c mesa-17.0.7/src/mesa/program/prog_optimize.c --- mesa-12.0.6/src/mesa/program/prog_optimize.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/prog_optimize.c 2017-06-01 10:37:10.000000000 +0000 @@ -159,13 +159,14 @@ * \return number of instructions removed */ static GLuint -remove_instructions(struct gl_program *prog, const GLboolean *removeFlags) +remove_instructions(struct gl_program *prog, const GLboolean *removeFlags, + void *mem_ctx) { GLint i, removeEnd = 0, removeCount = 0; GLuint totalRemoved = 0; /* go backward */ - for (i = prog->NumInstructions - 1; i >= 0; i--) { + for (i = prog->arb.NumInstructions - 1; i >= 0; i--) { if (removeFlags[i]) { totalRemoved++; if (removeCount == 0) { @@ -184,7 +185,7 @@ */ if (removeCount > 0) { GLint removeStart = removeEnd - removeCount + 1; - _mesa_delete_instructions(prog, removeStart, removeCount); + _mesa_delete_instructions(prog, removeStart, removeCount, mem_ctx); removeStart = removeCount = 0; /* reset removal info */ } } @@ -192,7 +193,7 @@ /* Finish removing if the first instruction was to be removed. */ if (removeCount > 0) { GLint removeStart = removeEnd - removeCount + 1; - _mesa_delete_instructions(prog, removeStart, removeCount); + _mesa_delete_instructions(prog, removeStart, removeCount, mem_ctx); } return totalRemoved; } @@ -209,8 +210,8 @@ { GLuint i; - for (i = 0; i < prog->NumInstructions; i++) { - struct prog_instruction *inst = prog->Instructions + i; + for (i = 0; i < prog->arb.NumInstructions; i++) { + struct prog_instruction *inst = prog->arb.Instructions + i; const GLuint numSrc = _mesa_num_inst_src_regs(inst->Opcode); GLuint j; for (j = 0; j < numSrc; j++) { @@ -236,7 +237,7 @@ * write to such registers. Be careful with condition code setters. */ static GLboolean -_mesa_remove_dead_code_global(struct gl_program *prog) +_mesa_remove_dead_code_global(struct gl_program *prog, void *mem_ctx) { GLboolean tempRead[REG_ALLOCATE_MAX_PROGRAM_TEMPS][4]; GLboolean *removeInst; /* per-instruction removal flag */ @@ -250,11 +251,11 @@ } removeInst = - calloc(prog->NumInstructions, sizeof(GLboolean)); + calloc(prog->arb.NumInstructions, sizeof(GLboolean)); /* Determine which temps are read and written */ - for (i = 0; i < prog->NumInstructions; i++) { - const struct prog_instruction *inst = prog->Instructions + i; + for (i = 0; i < prog->arb.NumInstructions; i++) { + const struct prog_instruction *inst = prog->arb.Instructions + i; const GLuint numSrc = _mesa_num_inst_src_regs(inst->Opcode); GLuint j; @@ -296,8 +297,8 @@ } /* find instructions that write to dead registers, flag for removal */ - for (i = 0; i < prog->NumInstructions; i++) { - struct prog_instruction *inst = prog->Instructions + i; + for (i = 0; i < prog->arb.NumInstructions; i++) { + struct prog_instruction *inst = prog->arb.Instructions + i; const GLuint numDst = _mesa_num_inst_dst_regs(inst->Opcode); if (numDst != 0 && inst->DstReg.File == PROGRAM_TEMPORARY) { @@ -325,7 +326,7 @@ } /* now remove the instructions which aren't needed */ - rem = remove_instructions(prog, removeInst); + rem = remove_instructions(prog, removeInst, mem_ctx); if (dbg) { printf("Optimize: End dead code removal.\n"); @@ -364,8 +365,8 @@ { GLuint i; - for (i = start; i < prog->NumInstructions; i++) { - const struct prog_instruction *inst = prog->Instructions + i; + for (i = start; i < prog->arb.NumInstructions; i++) { + const struct prog_instruction *inst = prog->arb.Instructions + i; switch (inst->Opcode) { case OPCODE_BGNLOOP: case OPCODE_BGNSUB: @@ -481,8 +482,8 @@ * FOO tmpY, arg0, arg1; */ - for (i = 0; i + 1 < prog->NumInstructions; i++) { - const struct prog_instruction *mov = prog->Instructions + i; + for (i = 0; i + 1 < prog->arb.NumInstructions; i++) { + const struct prog_instruction *mov = prog->arb.Instructions + i; GLuint dst_mask, src_mask; if (can_upward_mov_be_modifed(mov) == GL_FALSE) continue; @@ -497,8 +498,8 @@ * rewritten or we get into some flow-control, eliminating the use of * this MOV. */ - for (j = i + 1; j < prog->NumInstructions; j++) { - struct prog_instruction *inst2 = prog->Instructions + j; + for (j = i + 1; j < prog->arb.NumInstructions; j++) { + struct prog_instruction *inst2 = prog->arb.Instructions + j; GLuint arg; if (_mesa_is_flow_control_opcode(inst2->Opcode)) @@ -568,16 +569,16 @@ * with a proper control flow graph */ static GLboolean -_mesa_remove_dead_code_local(struct gl_program *prog) +_mesa_remove_dead_code_local(struct gl_program *prog, void *mem_ctx) { GLboolean *removeInst; GLuint i, arg, rem = 0; removeInst = - calloc(prog->NumInstructions, sizeof(GLboolean)); + calloc(prog->arb.NumInstructions, sizeof(GLboolean)); - for (i = 0; i < prog->NumInstructions; i++) { - const struct prog_instruction *inst = prog->Instructions + i; + for (i = 0; i < prog->arb.NumInstructions; i++) { + const struct prog_instruction *inst = prog->arb.Instructions + i; const GLuint index = inst->DstReg.Index; const GLuint mask = inst->DstReg.WriteMask; enum inst_use use; @@ -600,7 +601,7 @@ removeInst[i] = GL_TRUE; } - rem = remove_instructions(prog, removeInst); + rem = remove_instructions(prog, removeInst, mem_ctx); done: free(removeInst); @@ -704,7 +705,7 @@ * Try to remove extraneous MOV instructions from the given program. */ static GLboolean -_mesa_remove_extra_moves(struct gl_program *prog) +_mesa_remove_extra_moves(struct gl_program *prog, void *mem_ctx) { GLboolean *removeInst; /* per-instruction removal flag */ GLuint i, rem = 0, nesting = 0; @@ -715,7 +716,7 @@ } removeInst = - calloc(prog->NumInstructions, sizeof(GLboolean)); + calloc(prog->arb.NumInstructions, sizeof(GLboolean)); /* * Look for sequences such as this: @@ -725,8 +726,8 @@ * FOO tmpY, arg0, arg1; */ - for (i = 0; i < prog->NumInstructions; i++) { - const struct prog_instruction *mov = prog->Instructions + i; + for (i = 0; i < prog->arb.NumInstructions; i++) { + const struct prog_instruction *mov = prog->arb.Instructions + i; switch (mov->Opcode) { case OPCODE_BGNLOOP: @@ -755,7 +756,7 @@ prevI = i - 1; while (prevI > 0 && removeInst[prevI]) prevI--; - prevInst = prog->Instructions + prevI; + prevInst = prog->arb.Instructions + prevI; if (prevInst->DstReg.File == PROGRAM_TEMPORARY && prevInst->DstReg.Index == id && @@ -790,7 +791,7 @@ } /* now remove the instructions which aren't needed */ - rem = remove_instructions(prog, removeInst); + rem = remove_instructions(prog, removeInst, mem_ctx); free(removeInst); @@ -1033,7 +1034,8 @@ } /* build intermediate arrays */ - if (!_mesa_find_temp_intervals(prog->Instructions, prog->NumInstructions, + if (!_mesa_find_temp_intervals(prog->arb.Instructions, + prog->arb.NumInstructions, intBegin, intEnd)) return GL_FALSE; @@ -1193,7 +1195,7 @@ */ replace_regs(prog, PROGRAM_TEMPORARY, registerMap); - prog->NumTemporaries = maxTemp + 1; + prog->arb.NumTemporaries = maxTemp + 1; } if (dbg) { @@ -1208,7 +1210,7 @@ #if 0 static void print_it(struct gl_context *ctx, struct gl_program *program, const char *txt) { - fprintf(stderr, "%s (%u inst):\n", txt, program->NumInstructions); + fprintf(stderr, "%s (%u inst):\n", txt, program->arb.NumInstructions); _mesa_print_program(program); _mesa_print_program_parameters(ctx, program); fprintf(stderr, "\n\n"); @@ -1256,8 +1258,8 @@ outputWrites[i] = 0; } - for (i = 0; i < program->NumInstructions; i++) { - struct prog_instruction *inst = program->Instructions + i; + for (i = 0; i < program->arb.NumInstructions; i++) { + struct prog_instruction *inst = program->arb.Instructions + i; GLuint prevWriteMask; /* Give up if we encounter relative addressing or flow control. */ @@ -1310,7 +1312,8 @@ * instructions, temp regs, etc. */ void -_mesa_optimize_program(struct gl_context *ctx, struct gl_program *program) +_mesa_optimize_program(struct gl_context *ctx, struct gl_program *program, + void *mem_ctx) { GLboolean any_change; @@ -1319,11 +1322,11 @@ do { any_change = GL_FALSE; _mesa_remove_extra_move_use(program); - if (_mesa_remove_dead_code_global(program)) + if (_mesa_remove_dead_code_global(program, mem_ctx)) any_change = GL_TRUE; - if (_mesa_remove_extra_moves(program)) + if (_mesa_remove_extra_moves(program, mem_ctx)) any_change = GL_TRUE; - if (_mesa_remove_dead_code_local(program)) + if (_mesa_remove_dead_code_local(program, mem_ctx)) any_change = GL_TRUE; any_change = _mesa_constant_fold(program) || any_change; diff -Nru mesa-12.0.6/src/mesa/program/prog_optimize.h mesa-17.0.7/src/mesa/program/prog_optimize.h --- mesa-12.0.6/src/mesa/program/prog_optimize.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/prog_optimize.h 2017-06-01 10:37:10.000000000 +0000 @@ -46,7 +46,8 @@ GLint intEnd[MAX_PROGRAM_TEMPS]); extern void -_mesa_optimize_program(struct gl_context *ctx, struct gl_program *program); +_mesa_optimize_program(struct gl_context *ctx, struct gl_program *program, + void *mem_ctx); extern GLboolean _mesa_constant_fold(struct gl_program *prog); diff -Nru mesa-12.0.6/src/mesa/program/prog_print.c mesa-17.0.7/src/mesa/program/prog_print.c --- mesa-12.0.6/src/mesa/program/prog_print.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/prog_print.c 2017-06-01 10:37:10.000000000 +0000 @@ -151,6 +151,8 @@ "fragment.(twenty-five)", /* VARYING_SLOT_TESS_LEVEL_INNER */ "fragment.(twenty-six)", /* VARYING_SLOT_CULL_DIST0 */ "fragment.(twenty-seven)", /* VARYING_SLOT_CULL_DIST1 */ + "fragment.(twenty-eight)", /* VARYING_SLOT_BOUNDING_BOX0 */ + "fragment.(twenty-nine)", /* VARYING_SLOT_BOUNDING_BOX1 */ "fragment.varying[0]", "fragment.varying[1]", "fragment.varying[2]", @@ -206,7 +208,7 @@ /** - * Print a vertex program's InputsRead field in human-readable format. + * Print a vertex program's inputs_read field in human-readable format. * For debugging. */ void @@ -224,7 +226,7 @@ /** - * Print a fragment program's InputsRead field in human-readable format. + * Print a fragment program's inputs_read field in human-readable format. * For debugging. */ void @@ -280,6 +282,8 @@ "result.(twenty-five)", /* VARYING_SLOT_TESS_LEVEL_INNER */ "result.(twenty-six)", /* VARYING_SLOT_CULL_DIST0 */ "result.(twenty-seven)", /* VARYING_SLOT_CULL_DIST1 */ + "result.(twenty-eight)", /* VARYING_SLOT_BOUNDING_BOX0 */ + "result.(twenty-nine)", /* VARYING_SLOT_BOUNDING_BOX1 */ "result.varying[0]", "result.varying[1]", "result.varying[2]", @@ -547,16 +551,6 @@ } -static void -fprint_comment(FILE *f, const struct prog_instruction *inst) -{ - if (inst->Comment) - fprintf(f, "; # %s\n", inst->Comment); - else - fprintf(f, ";\n"); -} - - void _mesa_fprint_alu_instruction(FILE *f, const struct prog_instruction *inst, @@ -589,7 +583,7 @@ fprintf(f, ", "); } - fprint_comment(f, inst); + fprintf(f, ";\n"); } @@ -636,7 +630,7 @@ inst->SrcReg[0].Index, _mesa_swizzle_string(inst->SrcReg[0].Swizzle, inst->SrcReg[0].Negate, GL_TRUE)); - fprint_comment(f, inst); + fprintf(f, ";\n"); break; case OPCODE_TEX: case OPCODE_TXP: @@ -670,28 +664,28 @@ } if (inst->TexShadow) fprintf(f, " SHADOW"); - fprint_comment(f, inst); + fprintf(f, ";\n"); break; case OPCODE_KIL: fprintf(f, "%s", _mesa_opcode_string(inst->Opcode)); fprintf(f, " "); fprint_src_reg(f, &inst->SrcReg[0], mode, prog); - fprint_comment(f, inst); + fprintf(f, ";\n"); break; case OPCODE_ARL: fprintf(f, "ARL "); fprint_dst_reg(f, &inst->DstReg, mode, prog); fprintf(f, ", "); fprint_src_reg(f, &inst->SrcReg[0], mode, prog); - fprint_comment(f, inst); + fprintf(f, ";\n"); break; case OPCODE_IF: fprintf(f, "IF "); fprint_src_reg(f, &inst->SrcReg[0], mode, prog); fprintf(f, "; "); fprintf(f, " # (if false, goto %d)", inst->BranchTarget); - fprint_comment(f, inst); + fprintf(f, ";\n"); return indent + 3; case OPCODE_ELSE: fprintf(f, "ELSE; # (goto %d)\n", inst->BranchTarget); @@ -710,26 +704,26 @@ fprintf(f, "%s; # (goto %d)", _mesa_opcode_string(inst->Opcode), inst->BranchTarget); - fprint_comment(f, inst); + fprintf(f, ";\n"); break; case OPCODE_BGNSUB: fprintf(f, "BGNSUB"); - fprint_comment(f, inst); + fprintf(f, ";\n"); return indent + 3; case OPCODE_ENDSUB: if (mode == PROG_PRINT_DEBUG) { fprintf(f, "ENDSUB"); - fprint_comment(f, inst); + fprintf(f, ";\n"); } break; case OPCODE_CAL: fprintf(f, "CAL %u", inst->BranchTarget); - fprint_comment(f, inst); + fprintf(f, ";\n"); break; case OPCODE_RET: fprintf(f, "RET"); - fprint_comment(f, inst); + fprintf(f, ";\n"); break; case OPCODE_END: @@ -738,11 +732,7 @@ case OPCODE_NOP: if (mode == PROG_PRINT_DEBUG) { fprintf(f, "NOP"); - fprint_comment(f, inst); - } - else if (inst->Comment) { - /* ARB/NV extensions don't have NOP instruction */ - fprintf(f, "# %s\n", inst->Comment); + fprintf(f, ";\n"); } break; /* XXX may need other special-case instructions */ @@ -813,10 +803,10 @@ fprintf(f, "# Geometry Shader\n"); } - for (i = 0; i < prog->NumInstructions; i++) { + for (i = 0; i < prog->arb.NumInstructions; i++) { if (lineNumbers) fprintf(f, "%3d: ", i); - indent = _mesa_fprint_instruction_opt(f, prog->Instructions + i, + indent = _mesa_fprint_instruction_opt(f, prog->arb.Instructions + i, indent, mode, prog); } } @@ -868,16 +858,18 @@ GLuint i; fprintf(f, "InputsRead: %" PRIx64 " (0b%s)\n", - (uint64_t) prog->InputsRead, binary(prog->InputsRead)); + (uint64_t) prog->info.inputs_read, binary(prog->info.inputs_read)); fprintf(f, "OutputsWritten: %" PRIx64 " (0b%s)\n", - (uint64_t) prog->OutputsWritten, binary(prog->OutputsWritten)); - fprintf(f, "NumInstructions=%d\n", prog->NumInstructions); - fprintf(f, "NumTemporaries=%d\n", prog->NumTemporaries); - fprintf(f, "NumParameters=%d\n", prog->NumParameters); - fprintf(f, "NumAttributes=%d\n", prog->NumAttributes); - fprintf(f, "NumAddressRegs=%d\n", prog->NumAddressRegs); + (uint64_t) prog->info.outputs_written, + binary(prog->info.outputs_written)); + fprintf(f, "NumInstructions=%d\n", prog->arb.NumInstructions); + fprintf(f, "NumTemporaries=%d\n", prog->arb.NumTemporaries); + fprintf(f, "NumParameters=%d\n", prog->arb.NumParameters); + fprintf(f, "NumAttributes=%d\n", prog->arb.NumAttributes); + fprintf(f, "NumAddressRegs=%d\n", prog->arb.NumAddressRegs); fprintf(f, "IndirectRegisterFiles: 0x%x (0b%s)\n", - prog->IndirectRegisterFiles, binary(prog->IndirectRegisterFiles)); + prog->arb.IndirectRegisterFiles, + binary(prog->arb.IndirectRegisterFiles)); fprintf(f, "SamplersUsed: 0x%x (0b%s)\n", prog->SamplersUsed, binary(prog->SamplersUsed)); fprintf(f, "Samplers=[ "); @@ -984,7 +976,11 @@ return; } +#ifdef DEBUG fprintf(f, "/* Shader %u source, checksum %u */\n", shader->Name, shader->SourceChecksum); +#else + fprintf(f, "/* Shader %u source */\n", shader->Name); +#endif fputs(shader->Source, f); fprintf(f, "\n"); @@ -994,16 +990,6 @@ if (shader->InfoLog) { fputs(shader->InfoLog, f); } - if (shader->CompileStatus && shader->Program) { - fprintf(f, "/* GPU code */\n"); - fprintf(f, "/*\n"); - _mesa_fprint_program_opt(f, shader->Program, PROG_PRINT_DEBUG, GL_TRUE); - fprintf(f, "*/\n"); - fprintf(f, "/* Parameters / constants */\n"); - fprintf(f, "/*\n"); - _mesa_fprint_parameter_list(f, shader->Program->Parameters); - fprintf(f, "*/\n"); - } fclose(f); } @@ -1015,19 +1001,18 @@ * _mesa_write_shader_to_file function. */ void -_mesa_append_uniforms_to_file(const struct gl_shader *shader) +_mesa_append_uniforms_to_file(const struct gl_program *prog) { - const struct gl_program *const prog = shader->Program; const char *type; char filename[100]; FILE *f; - if (shader->Stage == MESA_SHADER_FRAGMENT) + if (prog->info.stage == MESA_SHADER_FRAGMENT) type = "frag"; else type = "vert"; - _mesa_snprintf(filename, sizeof(filename), "shader_%u.%s", shader->Name, type); + _mesa_snprintf(filename, sizeof(filename), "shader.%s", type); f = fopen(filename, "a"); /* append */ if (!f) { fprintf(stderr, "Unable to open %s for appending\n", filename); diff -Nru mesa-12.0.6/src/mesa/program/prog_print.h mesa-17.0.7/src/mesa/program/prog_print.h --- mesa-12.0.6/src/mesa/program/prog_print.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/prog_print.h 2017-06-01 10:37:10.000000000 +0000 @@ -118,7 +118,7 @@ _mesa_write_shader_to_file(const struct gl_shader *shader); extern void -_mesa_append_uniforms_to_file(const struct gl_shader *shader); +_mesa_append_uniforms_to_file(const struct gl_program *prog); #ifdef __cplusplus diff -Nru mesa-12.0.6/src/mesa/program/program.c mesa-17.0.7/src/mesa/program/program.c --- mesa-12.0.6/src/mesa/program/program.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/program.c 2017-06-01 10:37:10.000000000 +0000 @@ -34,6 +34,7 @@ #include "main/framebuffer.h" #include "main/hash.h" #include "main/macros.h" +#include "main/shaderobj.h" #include "program.h" #include "prog_cache.h" #include "prog_parameter.h" @@ -87,14 +88,14 @@ ctx->VertexProgram.PointSizeEnabled = (ctx->API == API_OPENGLES2) ? GL_TRUE : GL_FALSE; ctx->VertexProgram.TwoSideEnabled = GL_FALSE; - _mesa_reference_vertprog(ctx, &ctx->VertexProgram.Current, - ctx->Shared->DefaultVertexProgram); + _mesa_reference_program(ctx, &ctx->VertexProgram.Current, + ctx->Shared->DefaultVertexProgram); assert(ctx->VertexProgram.Current); ctx->VertexProgram.Cache = _mesa_new_program_cache(); ctx->FragmentProgram.Enabled = GL_FALSE; - _mesa_reference_fragprog(ctx, &ctx->FragmentProgram.Current, - ctx->Shared->DefaultFragmentProgram); + _mesa_reference_program(ctx, &ctx->FragmentProgram.Current, + ctx->Shared->DefaultFragmentProgram); assert(ctx->FragmentProgram.Current); ctx->FragmentProgram.Cache = _mesa_new_program_cache(); @@ -112,9 +113,9 @@ void _mesa_free_program_data(struct gl_context *ctx) { - _mesa_reference_vertprog(ctx, &ctx->VertexProgram.Current, NULL); + _mesa_reference_program(ctx, &ctx->VertexProgram.Current, NULL); _mesa_delete_program_cache(ctx, ctx->VertexProgram.Cache); - _mesa_reference_fragprog(ctx, &ctx->FragmentProgram.Current, NULL); + _mesa_reference_program(ctx, &ctx->FragmentProgram.Current, NULL); _mesa_delete_shader_cache(ctx, ctx->FragmentProgram.Cache); /* XXX probably move this stuff */ @@ -137,11 +138,11 @@ void _mesa_update_default_objects_program(struct gl_context *ctx) { - _mesa_reference_vertprog(ctx, &ctx->VertexProgram.Current, - ctx->Shared->DefaultVertexProgram); + _mesa_reference_program(ctx, &ctx->VertexProgram.Current, + ctx->Shared->DefaultVertexProgram); assert(ctx->VertexProgram.Current); - _mesa_reference_fragprog(ctx, &ctx->FragmentProgram.Current, + _mesa_reference_program(ctx, &ctx->FragmentProgram.Current, ctx->Shared->DefaultFragmentProgram); assert(ctx->FragmentProgram.Current); @@ -177,10 +178,9 @@ * Initialize a new gl_program object. */ struct gl_program * -_mesa_init_gl_program(struct gl_program *prog, GLenum target, GLuint id) +_mesa_init_gl_program(struct gl_program *prog, GLenum target, GLuint id, + bool is_arb_asm) { - GLuint i; - if (!prog) return NULL; @@ -190,10 +190,25 @@ prog->Target = target; prog->RefCount = 1; prog->Format = GL_PROGRAM_FORMAT_ASCII_ARB; + prog->info.stage = _mesa_program_enum_to_shader_stage(target); + prog->is_arb_asm = is_arb_asm; - /* default mapping from samplers to texture units */ - for (i = 0; i < MAX_SAMPLERS; i++) - prog->SamplerUnits[i] = i; + /* Uniforms that lack an initializer in the shader code have an initial + * value of zero. This includes sampler uniforms. + * + * Page 24 (page 30 of the PDF) of the GLSL 1.20 spec says: + * + * "The link time initial value is either the value of the variable's + * initializer, if present, or 0 if no initializer is present. Sampler + * types cannot have initializers." + * + * So we only initialise ARB assembly style programs. + */ + if (is_arb_asm) { + /* default mapping from samplers to texture units */ + for (unsigned i = 0; i < MAX_SAMPLERS; i++) + prog->SamplerUnits[i] = i; + } return prog; } @@ -212,32 +227,18 @@ * \return pointer to new program object */ struct gl_program * -_mesa_new_program(struct gl_context *ctx, GLenum target, GLuint id) +_mesa_new_program(struct gl_context *ctx, GLenum target, GLuint id, + bool is_arb_asm) { switch (target) { - case GL_VERTEX_PROGRAM_ARB: { /* == GL_VERTEX_PROGRAM_NV */ - struct gl_vertex_program *prog = CALLOC_STRUCT(gl_vertex_program); - return _mesa_init_gl_program(&prog->Base, target, id); - } - case GL_FRAGMENT_PROGRAM_ARB: { - struct gl_fragment_program *prog = CALLOC_STRUCT(gl_fragment_program); - return _mesa_init_gl_program(&prog->Base, target, id); - } - case GL_GEOMETRY_PROGRAM_NV: { - struct gl_geometry_program *prog = CALLOC_STRUCT(gl_geometry_program); - return _mesa_init_gl_program(&prog->Base, target, id); - } - case GL_TESS_CONTROL_PROGRAM_NV: { - struct gl_tess_ctrl_program *prog = CALLOC_STRUCT(gl_tess_ctrl_program); - return _mesa_init_gl_program(&prog->Base, target, id); - } - case GL_TESS_EVALUATION_PROGRAM_NV: { - struct gl_tess_eval_program *prog = CALLOC_STRUCT(gl_tess_eval_program); - return _mesa_init_gl_program(&prog->Base, target, id); - } + case GL_VERTEX_PROGRAM_ARB: /* == GL_VERTEX_PROGRAM_NV */ + case GL_GEOMETRY_PROGRAM_NV: + case GL_TESS_CONTROL_PROGRAM_NV: + case GL_TESS_EVALUATION_PROGRAM_NV: + case GL_FRAGMENT_PROGRAM_ARB: case GL_COMPUTE_PROGRAM_NV: { - struct gl_compute_program *prog = CALLOC_STRUCT(gl_compute_program); - return _mesa_init_gl_program(&prog->Base, target, id); + struct gl_program *prog = rzalloc(NULL, struct gl_program); + return _mesa_init_gl_program(prog, target, id, is_arb_asm); } default: _mesa_problem(ctx, "bad target in _mesa_new_program"); @@ -262,12 +263,6 @@ if (prog == &_mesa_DummyProgram) return; - free(prog->String); - free(prog->LocalParams); - - if (prog->Instructions) { - _mesa_free_instructions(prog->Instructions, prog->NumInstructions); - } if (prog->Parameters) { _mesa_free_parameter_list(prog->Parameters); } @@ -277,7 +272,7 @@ } mtx_destroy(&prog->Mutex); - free(prog); + ralloc_free(prog); } @@ -333,6 +328,7 @@ if (deleteFlag) { assert(ctx); + _mesa_reference_shader_program_data(ctx, &oldProg->sh.data, NULL); ctx->Driver.DeleteProgram(ctx, oldProg); } @@ -357,14 +353,14 @@ GLboolean _mesa_insert_instructions(struct gl_program *prog, GLuint start, GLuint count) { - const GLuint origLen = prog->NumInstructions; + const GLuint origLen = prog->arb.NumInstructions; const GLuint newLen = origLen + count; struct prog_instruction *newInst; GLuint i; /* adjust branches */ - for (i = 0; i < prog->NumInstructions; i++) { - struct prog_instruction *inst = prog->Instructions + i; + for (i = 0; i < prog->arb.NumInstructions; i++) { + struct prog_instruction *inst = prog->arb.Instructions + i; if (inst->BranchTarget > 0) { if ((GLuint)inst->BranchTarget >= start) { inst->BranchTarget += count; @@ -373,28 +369,28 @@ } /* Alloc storage for new instructions */ - newInst = _mesa_alloc_instructions(newLen); + newInst = rzalloc_array(prog, struct prog_instruction, newLen); if (!newInst) { return GL_FALSE; } /* Copy 'start' instructions into new instruction buffer */ - _mesa_copy_instructions(newInst, prog->Instructions, start); + _mesa_copy_instructions(newInst, prog->arb.Instructions, start); /* init the new instructions */ _mesa_init_instructions(newInst + start, count); /* Copy the remaining/tail instructions to new inst buffer */ _mesa_copy_instructions(newInst + start + count, - prog->Instructions + start, + prog->arb.Instructions + start, origLen - start); /* free old instructions */ - _mesa_free_instructions(prog->Instructions, origLen); + ralloc_free(prog->arb.Instructions); /* install new instructions */ - prog->Instructions = newInst; - prog->NumInstructions = newLen; + prog->arb.Instructions = newInst; + prog->arb.NumInstructions = newLen; return GL_TRUE; } @@ -404,16 +400,17 @@ * Adjust branch targets accordingly. */ GLboolean -_mesa_delete_instructions(struct gl_program *prog, GLuint start, GLuint count) +_mesa_delete_instructions(struct gl_program *prog, GLuint start, GLuint count, + void *mem_ctx) { - const GLuint origLen = prog->NumInstructions; + const GLuint origLen = prog->arb.NumInstructions; const GLuint newLen = origLen - count; struct prog_instruction *newInst; GLuint i; /* adjust branches */ - for (i = 0; i < prog->NumInstructions; i++) { - struct prog_instruction *inst = prog->Instructions + i; + for (i = 0; i < prog->arb.NumInstructions; i++) { + struct prog_instruction *inst = prog->arb.Instructions + i; if (inst->BranchTarget > 0) { if (inst->BranchTarget > (GLint) start) { inst->BranchTarget -= count; @@ -422,25 +419,25 @@ } /* Alloc storage for new instructions */ - newInst = _mesa_alloc_instructions(newLen); + newInst = rzalloc_array(mem_ctx, struct prog_instruction, newLen); if (!newInst) { return GL_FALSE; } /* Copy 'start' instructions into new instruction buffer */ - _mesa_copy_instructions(newInst, prog->Instructions, start); + _mesa_copy_instructions(newInst, prog->arb.Instructions, start); /* Copy the remaining/tail instructions to new inst buffer */ _mesa_copy_instructions(newInst + start, - prog->Instructions + start + count, + prog->arb.Instructions + start + count, newLen - start); /* free old instructions */ - _mesa_free_instructions(prog->Instructions, origLen); + ralloc_free(prog->arb.Instructions); /* install new instructions */ - prog->Instructions = newInst; - prog->NumInstructions = newLen; + prog->arb.Instructions = newInst; + prog->arb.NumInstructions = newLen; return GL_TRUE; } @@ -462,8 +459,8 @@ memset(used, 0, usedSize); - for (i = 0; i < prog->NumInstructions; i++) { - const struct prog_instruction *inst = prog->Instructions + i; + for (i = 0; i < prog->arb.NumInstructions; i++) { + const struct prog_instruction *inst = prog->arb.Instructions + i; const GLuint n = _mesa_num_inst_src_regs(inst->Opcode); if (inst->DstReg.File == file) { @@ -514,7 +511,7 @@ */ GLint _mesa_get_min_invocations_per_fragment(struct gl_context *ctx, - const struct gl_fragment_program *prog, + const struct gl_program *prog, bool ignore_sample_qualifier) { /* From ARB_sample_shading specification: @@ -533,11 +530,11 @@ * "Use of the "sample" qualifier on a fragment shader input * forces per-sample shading" */ - if (prog->IsSample && !ignore_sample_qualifier) + if (prog->info.fs.uses_sample_qualifier && !ignore_sample_qualifier) return MAX2(_mesa_geometric_samples(ctx->DrawBuffer), 1); - if (prog->Base.SystemValuesRead & (SYSTEM_BIT_SAMPLE_ID | - SYSTEM_BIT_SAMPLE_POS)) + if (prog->info.system_values_read & (SYSTEM_BIT_SAMPLE_ID | + SYSTEM_BIT_SAMPLE_POS)) return MAX2(_mesa_geometric_samples(ctx->DrawBuffer), 1); else if (ctx->Multisample.SampleShading) return MAX2(ceil(ctx->Multisample.MinSampleShadingValue * diff -Nru mesa-12.0.6/src/mesa/program/program.h mesa-17.0.7/src/mesa/program/program.h --- mesa-12.0.6/src/mesa/program/program.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/program.h 2017-06-01 10:37:10.000000000 +0000 @@ -64,10 +64,12 @@ _mesa_set_program_error(struct gl_context *ctx, GLint pos, const char *string); extern struct gl_program * -_mesa_init_gl_program(struct gl_program *prog, GLenum target, GLuint id); +_mesa_init_gl_program(struct gl_program *prog, GLenum target, GLuint id, + bool is_arb_asm); extern struct gl_program * -_mesa_new_program(struct gl_context *ctx, GLenum target, GLuint id); +_mesa_new_program(struct gl_context *ctx, GLenum target, GLuint id, + bool is_arb_asm); extern void _mesa_delete_program(struct gl_context *ctx, struct gl_program *prog); @@ -89,66 +91,12 @@ _mesa_reference_program_(ctx, ptr, prog); } -static inline void -_mesa_reference_vertprog(struct gl_context *ctx, - struct gl_vertex_program **ptr, - struct gl_vertex_program *prog) -{ - _mesa_reference_program(ctx, (struct gl_program **) ptr, - (struct gl_program *) prog); -} - -static inline void -_mesa_reference_fragprog(struct gl_context *ctx, - struct gl_fragment_program **ptr, - struct gl_fragment_program *prog) -{ - _mesa_reference_program(ctx, (struct gl_program **) ptr, - (struct gl_program *) prog); -} - -static inline void -_mesa_reference_geomprog(struct gl_context *ctx, - struct gl_geometry_program **ptr, - struct gl_geometry_program *prog) -{ - _mesa_reference_program(ctx, (struct gl_program **) ptr, - (struct gl_program *) prog); -} - -static inline void -_mesa_reference_compprog(struct gl_context *ctx, - struct gl_compute_program **ptr, - struct gl_compute_program *prog) -{ - _mesa_reference_program(ctx, (struct gl_program **) ptr, - (struct gl_program *) prog); -} - - -static inline void -_mesa_reference_tesscprog(struct gl_context *ctx, - struct gl_tess_ctrl_program **ptr, - struct gl_tess_ctrl_program *prog) -{ - _mesa_reference_program(ctx, (struct gl_program **) ptr, - (struct gl_program *) prog); -} - -static inline void -_mesa_reference_tesseprog(struct gl_context *ctx, - struct gl_tess_eval_program **ptr, - struct gl_tess_eval_program *prog) -{ - _mesa_reference_program(ctx, (struct gl_program **) ptr, - (struct gl_program *) prog); -} - extern GLboolean _mesa_insert_instructions(struct gl_program *prog, GLuint start, GLuint count); extern GLboolean -_mesa_delete_instructions(struct gl_program *prog, GLuint start, GLuint count); +_mesa_delete_instructions(struct gl_program *prog, GLuint start, GLuint count, + void *mem_ctx); extern void _mesa_find_used_registers(const struct gl_program *prog, @@ -161,7 +109,7 @@ extern GLint _mesa_get_min_invocations_per_fragment(struct gl_context *ctx, - const struct gl_fragment_program *prog, + const struct gl_program *prog, bool ignore_sample_qualifier); static inline GLuint @@ -211,88 +159,6 @@ return GL_VERTEX_PROGRAM_ARB; } - -/* Cast wrappers from gl_program to derived program types. - * (e.g. gl_vertex_program) - */ - -static inline struct gl_fragment_program * -gl_fragment_program(struct gl_program *prog) -{ - return (struct gl_fragment_program *) prog; -} - -static inline const struct gl_fragment_program * -gl_fragment_program_const(const struct gl_program *prog) -{ - return (const struct gl_fragment_program *) prog; -} - - -static inline struct gl_vertex_program * -gl_vertex_program(struct gl_program *prog) -{ - return (struct gl_vertex_program *) prog; -} - -static inline const struct gl_vertex_program * -gl_vertex_program_const(const struct gl_program *prog) -{ - return (const struct gl_vertex_program *) prog; -} - - -static inline struct gl_geometry_program * -gl_geometry_program(struct gl_program *prog) -{ - return (struct gl_geometry_program *) prog; -} - -static inline const struct gl_geometry_program * -gl_geometry_program_const(const struct gl_program *prog) -{ - return (const struct gl_geometry_program *) prog; -} - - -static inline struct gl_compute_program * -gl_compute_program(struct gl_program *prog) -{ - return (struct gl_compute_program *) prog; -} - -static inline const struct gl_compute_program * -gl_compute_program_const(const struct gl_program *prog) -{ - return (const struct gl_compute_program *) prog; -} - -static inline struct gl_tess_ctrl_program * -gl_tess_ctrl_program(struct gl_program *prog) -{ - return (struct gl_tess_ctrl_program *) prog; -} - -static inline const struct gl_tess_ctrl_program * -gl_tess_ctrl_program_const(const struct gl_program *prog) -{ - return (const struct gl_tess_ctrl_program *) prog; -} - - -static inline struct gl_tess_eval_program * -gl_tess_eval_program(struct gl_program *prog) -{ - return (struct gl_tess_eval_program *) prog; -} - -static inline const struct gl_tess_eval_program * -gl_tess_eval_program_const(const struct gl_program *prog) -{ - return (const struct gl_tess_eval_program *) prog; -} - - #ifdef __cplusplus } /* extern "C" */ #endif diff -Nru mesa-12.0.6/src/mesa/program/program_lexer.l mesa-17.0.7/src/mesa/program/program_lexer.l --- mesa-12.0.6/src/mesa/program/program_lexer.l 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/program_lexer.l 2017-06-01 10:37:10.000000000 +0000 @@ -123,7 +123,7 @@ { lval->string = strdup(text); - return (_mesa_symbol_table_find_symbol(state->st, 0, text) == NULL) + return (_mesa_symbol_table_find_symbol(state->st, text) == NULL) ? IDENTIFIER : USED_IDENTIFIER; } diff -Nru mesa-12.0.6/src/mesa/program/programopt.c mesa-17.0.7/src/mesa/program/programopt.c --- mesa-12.0.6/src/mesa/program/programopt.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/programopt.c 2017-06-01 10:37:10.000000000 +0000 @@ -46,10 +46,10 @@ * May be used to implement the position_invariant option. */ static void -_mesa_insert_mvp_dp4_code(struct gl_context *ctx, struct gl_vertex_program *vprog) +_mesa_insert_mvp_dp4_code(struct gl_context *ctx, struct gl_program *vprog) { struct prog_instruction *newInst; - const GLuint origLen = vprog->Base.NumInstructions; + const GLuint origLen = vprog->arb.NumInstructions; const GLuint newLen = origLen + 4; GLuint i; @@ -66,12 +66,11 @@ GLint mvpRef[4]; for (i = 0; i < 4; i++) { - mvpRef[i] = _mesa_add_state_reference(vprog->Base.Parameters, - mvpState[i]); + mvpRef[i] = _mesa_add_state_reference(vprog->Parameters, mvpState[i]); } /* Alloc storage for new instructions */ - newInst = _mesa_alloc_instructions(newLen); + newInst = rzalloc_array(vprog, struct prog_instruction, newLen); if (!newInst) { _mesa_error(ctx, GL_OUT_OF_MEMORY, "glProgramString(inserting position_invariant code)"); @@ -100,24 +99,24 @@ } /* Append original instructions after new instructions */ - _mesa_copy_instructions (newInst + 4, vprog->Base.Instructions, origLen); + _mesa_copy_instructions (newInst + 4, vprog->arb.Instructions, origLen); /* free old instructions */ - _mesa_free_instructions(vprog->Base.Instructions, origLen); + ralloc_free(vprog->arb.Instructions); /* install new instructions */ - vprog->Base.Instructions = newInst; - vprog->Base.NumInstructions = newLen; - vprog->Base.InputsRead |= VERT_BIT_POS; - vprog->Base.OutputsWritten |= BITFIELD64_BIT(VARYING_SLOT_POS); + vprog->arb.Instructions = newInst; + vprog->arb.NumInstructions = newLen; + vprog->info.inputs_read |= VERT_BIT_POS; + vprog->info.outputs_written |= BITFIELD64_BIT(VARYING_SLOT_POS); } static void -_mesa_insert_mvp_mad_code(struct gl_context *ctx, struct gl_vertex_program *vprog) +_mesa_insert_mvp_mad_code(struct gl_context *ctx, struct gl_program *vprog) { struct prog_instruction *newInst; - const GLuint origLen = vprog->Base.NumInstructions; + const GLuint origLen = vprog->arb.NumInstructions; const GLuint newLen = origLen + 4; GLuint hposTemp; GLuint i; @@ -135,12 +134,11 @@ GLint mvpRef[4]; for (i = 0; i < 4; i++) { - mvpRef[i] = _mesa_add_state_reference(vprog->Base.Parameters, - mvpState[i]); + mvpRef[i] = _mesa_add_state_reference(vprog->Parameters, mvpState[i]); } /* Alloc storage for new instructions */ - newInst = _mesa_alloc_instructions(newLen); + newInst = rzalloc_array(vprog, struct prog_instruction, newLen); if (!newInst) { _mesa_error(ctx, GL_OUT_OF_MEMORY, "glProgramString(inserting position_invariant code)"); @@ -148,7 +146,7 @@ } /* TEMP hposTemp; */ - hposTemp = vprog->Base.NumTemporaries++; + hposTemp = vprog->arb.NumTemporaries++; /* * Generated instructions: @@ -202,21 +200,21 @@ /* Append original instructions after new instructions */ - _mesa_copy_instructions (newInst + 4, vprog->Base.Instructions, origLen); + _mesa_copy_instructions (newInst + 4, vprog->arb.Instructions, origLen); /* free old instructions */ - _mesa_free_instructions(vprog->Base.Instructions, origLen); + ralloc_free(vprog->arb.Instructions); /* install new instructions */ - vprog->Base.Instructions = newInst; - vprog->Base.NumInstructions = newLen; - vprog->Base.InputsRead |= VERT_BIT_POS; - vprog->Base.OutputsWritten |= BITFIELD64_BIT(VARYING_SLOT_POS); + vprog->arb.Instructions = newInst; + vprog->arb.NumInstructions = newLen; + vprog->info.inputs_read |= VERT_BIT_POS; + vprog->info.outputs_written |= BITFIELD64_BIT(VARYING_SLOT_POS); } void -_mesa_insert_mvp_code(struct gl_context *ctx, struct gl_vertex_program *vprog) +_mesa_insert_mvp_code(struct gl_context *ctx, struct gl_program *vprog) { if (ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].OptimizeForAOS) _mesa_insert_mvp_dp4_code( ctx, vprog ); @@ -240,22 +238,21 @@ * \param saturate True if writes to color outputs should be clamped to [0, 1] * * \note - * This function sets \c VARYING_BIT_FOGC in \c fprog->Base.InputsRead. + * This function sets \c VARYING_BIT_FOGC in \c fprog->info.inputs_read. * * \todo With a little work, this function could be adapted to add fog code * to vertex programs too. */ void -_mesa_append_fog_code(struct gl_context *ctx, - struct gl_fragment_program *fprog, GLenum fog_mode, - GLboolean saturate) +_mesa_append_fog_code(struct gl_context *ctx, struct gl_program *fprog, + GLenum fog_mode, GLboolean saturate) { static const gl_state_index fogPStateOpt[STATE_LENGTH] = { STATE_INTERNAL, STATE_FOG_PARAMS_OPTIMIZED, 0, 0, 0 }; static const gl_state_index fogColorState[STATE_LENGTH] = { STATE_FOG_COLOR, 0, 0, 0, 0}; struct prog_instruction *newInst, *inst; - const GLuint origLen = fprog->Base.NumInstructions; + const GLuint origLen = fprog->arb.NumInstructions; const GLuint newLen = origLen + 5; GLuint i; GLint fogPRefOpt, fogColorRef; /* state references */ @@ -267,13 +264,13 @@ return; } - if (!(fprog->Base.OutputsWritten & (1 << FRAG_RESULT_COLOR))) { + if (!(fprog->info.outputs_written & (1 << FRAG_RESULT_COLOR))) { /* program doesn't output color, so nothing to do */ return; } /* Alloc storage for new instructions */ - newInst = _mesa_alloc_instructions(newLen); + newInst = rzalloc_array(fprog, struct prog_instruction, newLen); if (!newInst) { _mesa_error(ctx, GL_OUT_OF_MEMORY, "glProgramString(inserting fog_option code)"); @@ -281,23 +278,23 @@ } /* Copy orig instructions into new instruction buffer */ - _mesa_copy_instructions(newInst, fprog->Base.Instructions, origLen); + _mesa_copy_instructions(newInst, fprog->arb.Instructions, origLen); /* PARAM fogParamsRefOpt = internal optimized fog params; */ fogPRefOpt - = _mesa_add_state_reference(fprog->Base.Parameters, fogPStateOpt); + = _mesa_add_state_reference(fprog->Parameters, fogPStateOpt); /* PARAM fogColorRef = state.fog.color; */ fogColorRef - = _mesa_add_state_reference(fprog->Base.Parameters, fogColorState); + = _mesa_add_state_reference(fprog->Parameters, fogColorState); /* TEMP colorTemp; */ - colorTemp = fprog->Base.NumTemporaries++; + colorTemp = fprog->arb.NumTemporaries++; /* TEMP fogFactorTemp; */ - fogFactorTemp = fprog->Base.NumTemporaries++; + fogFactorTemp = fprog->arb.NumTemporaries++; /* Scan program to find where result.color is written */ inst = newInst; - for (i = 0; i < fprog->Base.NumInstructions; i++) { + for (i = 0; i < fprog->arb.NumInstructions; i++) { if (inst->Opcode == OPCODE_END) break; if (inst->DstReg.File == PROGRAM_OUTPUT && @@ -406,13 +403,13 @@ inst++; /* free old instructions */ - _mesa_free_instructions(fprog->Base.Instructions, origLen); + ralloc_free(fprog->arb.Instructions); /* install new instructions */ - fprog->Base.Instructions = newInst; - fprog->Base.NumInstructions = inst - newInst; - fprog->Base.InputsRead |= VARYING_BIT_FOGC; - assert(fprog->Base.OutputsWritten & (1 << FRAG_RESULT_COLOR)); + fprog->arb.Instructions = newInst; + fprog->arb.NumInstructions = inst - newInst; + fprog->info.inputs_read |= VARYING_BIT_FOGC; + assert(fprog->info.outputs_written & (1 << FRAG_RESULT_COLOR)); } @@ -448,8 +445,8 @@ GLbitfield aluTemps = 0x0; GLuint i; - for (i = 0; i < prog->NumInstructions; i++) { - const struct prog_instruction *inst = prog->Instructions + i; + for (i = 0; i < prog->arb.NumInstructions; i++) { + const struct prog_instruction *inst = prog->arb.Instructions + i; if (is_texture_instruction(inst)) { if (((inst->SrcReg[0].File == PROGRAM_TEMPORARY) && @@ -477,7 +474,7 @@ tempsOutput |= (1 << inst->DstReg.Index); } - prog->NumTexIndirections = indirections; + prog->arb.NumTexIndirections = indirections; } @@ -489,9 +486,10 @@ _mesa_count_texture_instructions(struct gl_program *prog) { GLuint i; - prog->NumTexInstructions = 0; - for (i = 0; i < prog->NumInstructions; i++) { - prog->NumTexInstructions += is_texture_instruction(prog->Instructions + i); + prog->arb.NumTexInstructions = 0; + for (i = 0; i < prog->arb.NumInstructions; i++) { + prog->arb.NumTexInstructions += + is_texture_instruction(prog->arb.Instructions + i); } } @@ -520,8 +518,8 @@ outputMap[i] = -1; /* look for instructions which read from varying vars */ - for (i = 0; i < prog->NumInstructions; i++) { - struct prog_instruction *inst = prog->Instructions + i; + for (i = 0; i < prog->arb.NumInstructions; i++) { + struct prog_instruction *inst = prog->arb.Instructions + i; const GLuint numSrc = _mesa_num_inst_src_regs(inst->Opcode); GLuint j; for (j = 0; j < numSrc; j++) { @@ -545,8 +543,8 @@ return; /* nothing to be done */ /* look for instructions which write to the varying vars identified above */ - for (i = 0; i < prog->NumInstructions; i++) { - struct prog_instruction *inst = prog->Instructions + i; + for (i = 0; i < prog->arb.NumInstructions; i++) { + struct prog_instruction *inst = prog->arb.Instructions + i; if (inst->DstReg.File == type && outputMap[inst->DstReg.Index] >= 0) { /* change inst to write to the temp reg, instead of the varying */ @@ -562,8 +560,8 @@ /* Look for END instruction and insert the new varying writes */ endPos = -1; - for (i = 0; i < prog->NumInstructions; i++) { - struct prog_instruction *inst = prog->Instructions + i; + for (i = 0; i < prog->arb.NumInstructions; i++) { + struct prog_instruction *inst = prog->arb.Instructions + i; if (inst->Opcode == OPCODE_END) { endPos = i; _mesa_insert_instructions(prog, i, numVaryingReads); @@ -574,7 +572,7 @@ assert(endPos >= 0); /* insert new MOV instructions here */ - inst = prog->Instructions + endPos; + inst = prog->arb.Instructions + endPos; for (var = 0; var < VARYING_SLOT_MAX; var++) { if (outputMap[var] >= 0) { /* MOV VAR[var], TEMP[tmp]; */ @@ -595,14 +593,14 @@ GLuint i; if (prog->Target != GL_FRAGMENT_PROGRAM_ARB || - !(prog->InputsRead & BITFIELD64_BIT(VARYING_SLOT_POS))) + !(prog->info.inputs_read & BITFIELD64_BIT(VARYING_SLOT_POS))) return; - prog->InputsRead &= ~BITFIELD64_BIT(VARYING_SLOT_POS); - prog->SystemValuesRead |= 1 << SYSTEM_VALUE_FRAG_COORD; + prog->info.inputs_read &= ~BITFIELD64_BIT(VARYING_SLOT_POS); + prog->info.system_values_read |= 1 << SYSTEM_VALUE_FRAG_COORD; - for (i = 0; i < prog->NumInstructions; i++) { - struct prog_instruction *inst = prog->Instructions + i; + for (i = 0; i < prog->arb.NumInstructions; i++) { + struct prog_instruction *inst = prog->arb.Instructions + i; const GLuint numSrc = _mesa_num_inst_src_regs(inst->Opcode); GLuint j; diff -Nru mesa-12.0.6/src/mesa/program/programopt.h mesa-17.0.7/src/mesa/program/programopt.h --- mesa-12.0.6/src/mesa/program/programopt.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/programopt.h 2017-06-01 10:37:10.000000000 +0000 @@ -35,12 +35,11 @@ extern void -_mesa_insert_mvp_code(struct gl_context *ctx, struct gl_vertex_program *vprog); +_mesa_insert_mvp_code(struct gl_context *ctx, struct gl_program *vprog); extern void -_mesa_append_fog_code(struct gl_context *ctx, - struct gl_fragment_program *fprog, GLenum fog_mode, - GLboolean saturate); +_mesa_append_fog_code(struct gl_context *ctx, struct gl_program *fprog, + GLenum fog_mode, GLboolean saturate); extern void _mesa_count_texture_indirections(struct gl_program *prog); diff -Nru mesa-12.0.6/src/mesa/program/program_parser.h mesa-17.0.7/src/mesa/program/program_parser.h --- mesa-12.0.6/src/mesa/program/program_parser.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/program_parser.h 2017-06-01 10:37:10.000000000 +0000 @@ -132,6 +132,9 @@ struct gl_context *ctx; struct gl_program *prog; + /** Memory context to attach instructions to. */ + void *mem_ctx; + /** * Per-program target limits */ @@ -213,7 +216,6 @@ struct { unsigned UsesKill:1; - unsigned UsesDFdy:1; } fragment; }; diff -Nru mesa-12.0.6/src/mesa/program/program_parse.tab.c mesa-17.0.7/src/mesa/program/program_parse.tab.c --- mesa-12.0.6/src/mesa/program/program_parse.tab.c 2017-01-24 01:43:22.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/program_parse.tab.c 2017-06-01 10:38:04.000000000 +0000 @@ -68,7 +68,7 @@ /* Copy the first part of user declarations. */ -#line 1 "../../../src/mesa/program/program_parse.y" /* yacc.c:339 */ +#line 1 "./program/program_parse.y" /* yacc.c:339 */ /* * Copyright © 2009 Intel Corporation @@ -335,7 +335,7 @@ union YYSTYPE { -#line 126 "../../../src/mesa/program/program_parse.y" /* yacc.c:355 */ +#line 126 "./program/program_parse.y" /* yacc.c:355 */ struct asm_instruction *inst; struct asm_symbol *sym; @@ -390,7 +390,7 @@ #endif /* !YY__MESA_PROGRAM_PROGRAM_PROGRAM_PARSE_TAB_H_INCLUDED */ /* Copy the second part of user declarations. */ -#line 269 "../../../src/mesa/program/program_parse.y" /* yacc.c:358 */ +#line 269 "./program/program_parse.y" /* yacc.c:358 */ extern int _mesa_program_lexer_lex(YYSTYPE *yylval_param, YYLTYPE *yylloc_param, @@ -715,32 +715,32 @@ { 0, 284, 284, 287, 295, 307, 308, 311, 335, 336, 339, 354, 357, 362, 369, 370, 371, 372, 373, 374, - 375, 378, 379, 380, 383, 389, 397, 403, 410, 416, - 423, 467, 474, 518, 524, 525, 526, 527, 528, 529, - 530, 531, 532, 533, 534, 535, 538, 550, 560, 569, - 582, 604, 611, 644, 651, 667, 726, 769, 778, 800, - 810, 814, 843, 862, 862, 864, 871, 883, 884, 885, - 888, 902, 916, 936, 947, 959, 961, 962, 963, 964, - 967, 967, 967, 967, 968, 971, 972, 973, 974, 975, - 976, 979, 998, 1002, 1008, 1012, 1016, 1020, 1024, 1028, - 1032, 1037, 1043, 1054, 1054, 1055, 1057, 1061, 1065, 1069, - 1075, 1075, 1077, 1095, 1121, 1124, 1139, 1145, 1151, 1152, - 1159, 1165, 1171, 1179, 1185, 1191, 1199, 1205, 1211, 1219, - 1220, 1223, 1224, 1225, 1226, 1227, 1228, 1229, 1230, 1231, - 1232, 1233, 1236, 1245, 1249, 1253, 1259, 1268, 1272, 1276, - 1285, 1289, 1295, 1301, 1308, 1313, 1321, 1331, 1333, 1341, - 1347, 1351, 1355, 1361, 1372, 1381, 1385, 1390, 1394, 1398, - 1402, 1408, 1415, 1419, 1425, 1433, 1444, 1451, 1455, 1461, - 1471, 1482, 1486, 1504, 1513, 1516, 1522, 1526, 1530, 1536, - 1547, 1552, 1557, 1562, 1567, 1572, 1580, 1583, 1588, 1601, - 1609, 1620, 1628, 1628, 1630, 1630, 1632, 1642, 1647, 1654, - 1664, 1673, 1678, 1685, 1695, 1705, 1717, 1717, 1718, 1718, - 1720, 1730, 1738, 1748, 1756, 1764, 1773, 1784, 1788, 1794, - 1795, 1796, 1799, 1799, 1802, 1802, 1805, 1812, 1821, 1835, - 1844, 1853, 1857, 1866, 1875, 1886, 1893, 1903, 1931, 1940, - 1952, 1955, 1964, 1975, 1976, 1977, 1980, 1981, 1982, 1985, - 1986, 1989, 1990, 1993, 1994, 1997, 2008, 2019, 2030, 2056, - 2057 + 375, 378, 379, 380, 383, 389, 395, 401, 408, 414, + 421, 465, 472, 516, 522, 523, 524, 525, 526, 527, + 528, 529, 530, 531, 532, 533, 536, 548, 558, 567, + 580, 602, 609, 642, 649, 665, 724, 767, 776, 798, + 808, 812, 841, 860, 860, 862, 869, 881, 882, 883, + 886, 900, 914, 934, 945, 957, 959, 960, 961, 962, + 965, 965, 965, 965, 966, 969, 970, 971, 972, 973, + 974, 977, 996, 1000, 1006, 1010, 1014, 1018, 1022, 1026, + 1030, 1035, 1041, 1052, 1052, 1053, 1055, 1059, 1063, 1067, + 1073, 1073, 1075, 1093, 1119, 1122, 1137, 1143, 1149, 1150, + 1157, 1163, 1169, 1177, 1183, 1189, 1197, 1203, 1209, 1217, + 1218, 1221, 1222, 1223, 1224, 1225, 1226, 1227, 1228, 1229, + 1230, 1231, 1234, 1243, 1247, 1251, 1257, 1266, 1270, 1274, + 1283, 1287, 1293, 1299, 1306, 1311, 1319, 1329, 1331, 1339, + 1345, 1349, 1353, 1359, 1370, 1379, 1383, 1388, 1392, 1396, + 1400, 1406, 1413, 1417, 1423, 1431, 1442, 1449, 1453, 1459, + 1469, 1480, 1484, 1502, 1511, 1514, 1520, 1524, 1528, 1534, + 1545, 1550, 1555, 1560, 1565, 1570, 1578, 1581, 1586, 1599, + 1607, 1618, 1626, 1626, 1628, 1628, 1630, 1640, 1645, 1652, + 1662, 1671, 1676, 1683, 1693, 1703, 1715, 1715, 1716, 1716, + 1718, 1728, 1736, 1746, 1754, 1762, 1771, 1782, 1786, 1792, + 1793, 1794, 1797, 1797, 1800, 1800, 1803, 1810, 1819, 1833, + 1842, 1851, 1855, 1864, 1873, 1884, 1891, 1901, 1929, 1938, + 1950, 1953, 1962, 1973, 1974, 1975, 1978, 1979, 1980, 1983, + 1984, 1987, 1988, 1991, 1992, 1995, 2006, 2017, 2028, 2054, + 2055 }; #endif @@ -1960,7 +1960,7 @@ switch (yyn) { case 3: -#line 288 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 288 "./program/program_parse.y" /* yacc.c:1646 */ { if (state->prog->Target != GL_VERTEX_PROGRAM_ARB) { yyerror(& (yylsp[0]), state, "invalid fragment program header"); @@ -1972,7 +1972,7 @@ break; case 4: -#line 296 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 296 "./program/program_parse.y" /* yacc.c:1646 */ { if (state->prog->Target != GL_FRAGMENT_PROGRAM_ARB) { yyerror(& (yylsp[0]), state, "invalid vertex program header"); @@ -1986,7 +1986,7 @@ break; case 7: -#line 312 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 312 "./program/program_parse.y" /* yacc.c:1646 */ { int valid = 0; @@ -2012,7 +2012,7 @@ break; case 10: -#line 340 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 340 "./program/program_parse.y" /* yacc.c:1646 */ { if ((yyvsp[-1].inst) != NULL) { if (state->inst_tail == NULL) { @@ -2024,32 +2024,32 @@ state->inst_tail = (yyvsp[-1].inst); (yyvsp[-1].inst)->next = NULL; - state->prog->NumInstructions++; + state->prog->arb.NumInstructions++; } } #line 2031 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 12: -#line 358 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 358 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.inst) = (yyvsp[0].inst); - state->prog->NumAluInstructions++; + state->prog->arb.NumAluInstructions++; } #line 2040 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 13: -#line 363 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 363 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.inst) = (yyvsp[0].inst); - state->prog->NumTexInstructions++; + state->prog->arb.NumTexInstructions++; } #line 2049 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 24: -#line 384 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 384 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.inst) = asm_instruction_ctor(OPCODE_ARL, & (yyvsp[-2].dst_reg), & (yyvsp[0].src_reg), NULL, NULL); } @@ -2057,49 +2057,47 @@ break; case 25: -#line 390 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 390 "./program/program_parse.y" /* yacc.c:1646 */ { - if ((yyvsp[-3].temp_inst).Opcode == OPCODE_DDY) - state->fragment.UsesDFdy = 1; (yyval.inst) = asm_instruction_copy_ctor(& (yyvsp[-3].temp_inst), & (yyvsp[-2].dst_reg), & (yyvsp[0].src_reg), NULL, NULL); } -#line 2067 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2065 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 26: -#line 398 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 396 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.inst) = asm_instruction_copy_ctor(& (yyvsp[-3].temp_inst), & (yyvsp[-2].dst_reg), & (yyvsp[0].src_reg), NULL, NULL); } -#line 2075 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2073 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 27: -#line 404 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 402 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.inst) = asm_instruction_copy_ctor(& (yyvsp[-5].temp_inst), & (yyvsp[-4].dst_reg), & (yyvsp[-2].src_reg), & (yyvsp[0].src_reg), NULL); } -#line 2083 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2081 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 28: -#line 411 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 409 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.inst) = asm_instruction_copy_ctor(& (yyvsp[-5].temp_inst), & (yyvsp[-4].dst_reg), & (yyvsp[-2].src_reg), & (yyvsp[0].src_reg), NULL); } -#line 2091 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2089 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 29: -#line 418 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 416 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.inst) = asm_instruction_copy_ctor(& (yyvsp[-7].temp_inst), & (yyvsp[-6].dst_reg), & (yyvsp[-4].src_reg), & (yyvsp[-2].src_reg), & (yyvsp[0].src_reg)); } -#line 2099 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2097 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 30: -#line 424 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 422 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.inst) = asm_instruction_copy_ctor(& (yyvsp[-7].temp_inst), & (yyvsp[-6].dst_reg), & (yyvsp[-4].src_reg), NULL, NULL); if ((yyval.inst) != NULL) { @@ -2141,20 +2139,20 @@ state->prog->ShadowSamplers |= shadow_tex; } } -#line 2145 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2143 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 31: -#line 468 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 466 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.inst) = asm_instruction_ctor(OPCODE_KIL, NULL, & (yyvsp[0].src_reg), NULL, NULL); state->fragment.UsesKill = 1; } -#line 2154 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2152 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 32: -#line 475 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 473 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.inst) = asm_instruction_copy_ctor(& (yyvsp[-11].temp_inst), & (yyvsp[-10].dst_reg), & (yyvsp[-8].src_reg), & (yyvsp[-6].src_reg), & (yyvsp[-4].src_reg)); if ((yyval.inst) != NULL) { @@ -2196,91 +2194,91 @@ state->prog->ShadowSamplers |= shadow_tex; } } -#line 2200 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2198 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 33: -#line 519 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 517 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = (yyvsp[0].integer); } -#line 2208 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2206 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 34: -#line 524 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 522 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = TEXTURE_1D_INDEX; } -#line 2214 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2212 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 35: -#line 525 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 523 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = TEXTURE_2D_INDEX; } -#line 2220 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2218 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 36: -#line 526 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 524 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = TEXTURE_3D_INDEX; } -#line 2226 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2224 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 37: -#line 527 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 525 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = TEXTURE_CUBE_INDEX; } -#line 2232 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2230 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 38: -#line 528 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 526 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = TEXTURE_RECT_INDEX; } -#line 2238 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2236 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 39: -#line 529 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 527 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = -TEXTURE_1D_INDEX; } -#line 2244 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2242 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 40: -#line 530 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 528 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = -TEXTURE_2D_INDEX; } -#line 2250 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2248 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 41: -#line 531 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 529 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = -TEXTURE_RECT_INDEX; } -#line 2256 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2254 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 42: -#line 532 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 530 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = TEXTURE_1D_ARRAY_INDEX; } -#line 2262 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2260 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 43: -#line 533 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 531 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = TEXTURE_2D_ARRAY_INDEX; } -#line 2268 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2266 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 44: -#line 534 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 532 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = -TEXTURE_1D_ARRAY_INDEX; } -#line 2274 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2272 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 45: -#line 535 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 533 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = -TEXTURE_2D_ARRAY_INDEX; } -#line 2280 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2278 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 46: -#line 539 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 537 "./program/program_parse.y" /* yacc.c:1646 */ { /* FIXME: Is this correct? Should the extenedSwizzle be applied * FIXME: to the existing swizzle? @@ -2290,11 +2288,11 @@ (yyval.inst) = asm_instruction_copy_ctor(& (yyvsp[-5].temp_inst), & (yyvsp[-4].dst_reg), & (yyvsp[-2].src_reg), NULL, NULL); } -#line 2294 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2292 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 47: -#line 551 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 549 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.src_reg) = (yyvsp[0].src_reg); @@ -2302,22 +2300,22 @@ (yyval.src_reg).Base.Negate = ~(yyval.src_reg).Base.Negate; } } -#line 2306 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2304 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 48: -#line 561 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 559 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.src_reg) = (yyvsp[-1].src_reg); (yyval.src_reg).Base.Swizzle = _mesa_combine_swizzles((yyval.src_reg).Base.Swizzle, (yyvsp[0].swiz_mask).swizzle); } -#line 2317 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2315 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 49: -#line 570 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 568 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.src_reg) = (yyvsp[-1].src_reg); @@ -2328,11 +2326,11 @@ (yyval.src_reg).Base.Swizzle = _mesa_combine_swizzles((yyval.src_reg).Base.Swizzle, (yyvsp[0].swiz_mask).swizzle); } -#line 2332 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2330 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 50: -#line 583 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 581 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.dst_reg) = (yyvsp[-1].dst_reg); (yyval.dst_reg).WriteMask = (yyvsp[0].swiz_mask).mask; @@ -2349,23 +2347,23 @@ YYERROR; } - state->prog->OutputsWritten |= BITFIELD64_BIT((yyval.dst_reg).Index); + state->prog->info.outputs_written |= BITFIELD64_BIT((yyval.dst_reg).Index); } } -#line 2356 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2354 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 51: -#line 605 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 603 "./program/program_parse.y" /* yacc.c:1646 */ { set_dst_reg(& (yyval.dst_reg), PROGRAM_ADDRESS, 0); (yyval.dst_reg).WriteMask = (yyvsp[0].swiz_mask).mask; } -#line 2365 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2363 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 52: -#line 612 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 610 "./program/program_parse.y" /* yacc.c:1646 */ { const unsigned xyzw_valid = ((yyvsp[-6].ext_swizzle).xyzw_valid << 0) @@ -2396,20 +2394,20 @@ (yyval.swiz_mask).mask = ((yyvsp[-6].ext_swizzle).negate) | ((yyvsp[-4].ext_swizzle).negate << 1) | ((yyvsp[-2].ext_swizzle).negate << 2) | ((yyvsp[0].ext_swizzle).negate << 3); } -#line 2400 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2398 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 53: -#line 645 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 643 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.ext_swizzle) = (yyvsp[0].ext_swizzle); (yyval.ext_swizzle).negate = ((yyvsp[-1].negate)) ? 1 : 0; } -#line 2409 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2407 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 54: -#line 652 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 650 "./program/program_parse.y" /* yacc.c:1646 */ { if (((yyvsp[0].integer) != 0) && ((yyvsp[0].integer) != 1)) { yyerror(& (yylsp[0]), state, "invalid extended swizzle selector"); @@ -2425,11 +2423,11 @@ (yyval.ext_swizzle).xyzw_valid = 1; (yyval.ext_swizzle).rgba_valid = 1; } -#line 2429 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2427 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 55: -#line 668 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 666 "./program/program_parse.y" /* yacc.c:1646 */ { char s; @@ -2486,14 +2484,14 @@ break; } } -#line 2490 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2488 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 56: -#line 727 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 725 "./program/program_parse.y" /* yacc.c:1646 */ { struct asm_symbol *const s = (struct asm_symbol *) - _mesa_symbol_table_find_symbol(state->st, 0, (yyvsp[0].string)); + _mesa_symbol_table_find_symbol(state->st, (yyvsp[0].string)); free((yyvsp[0].string)); @@ -2521,7 +2519,7 @@ break; case at_attrib: set_src_reg(& (yyval.src_reg), PROGRAM_INPUT, s->attrib_binding); - state->prog->InputsRead |= BITFIELD64_BIT((yyval.src_reg).Base.Index); + state->prog->info.inputs_read |= BITFIELD64_BIT((yyval.src_reg).Base.Index); if (!validate_inputs(& (yylsp[0]), state)) { YYERROR; @@ -2533,24 +2531,24 @@ break; } } -#line 2537 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2535 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 57: -#line 770 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 768 "./program/program_parse.y" /* yacc.c:1646 */ { set_src_reg(& (yyval.src_reg), PROGRAM_INPUT, (yyvsp[0].attrib)); - state->prog->InputsRead |= BITFIELD64_BIT((yyval.src_reg).Base.Index); + state->prog->info.inputs_read |= BITFIELD64_BIT((yyval.src_reg).Base.Index); if (!validate_inputs(& (yylsp[0]), state)) { YYERROR; } } -#line 2550 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2548 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 58: -#line 779 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 777 "./program/program_parse.y" /* yacc.c:1646 */ { if (! (yyvsp[-1].src_reg).Base.RelAddr && ((unsigned) (yyvsp[-1].src_reg).Base.Index >= (yyvsp[-3].sym)->param_binding_length)) { @@ -2562,7 +2560,7 @@ (yyval.src_reg).Base.File = (yyvsp[-3].sym)->param_binding_type; if ((yyvsp[-1].src_reg).Base.RelAddr) { - state->prog->IndirectRegisterFiles |= (1 << (yyval.src_reg).Base.File); + state->prog->arb.IndirectRegisterFiles |= (1 << (yyval.src_reg).Base.File); (yyvsp[-3].sym)->param_accessed_indirectly = 1; (yyval.src_reg).Base.RelAddr = 1; @@ -2572,11 +2570,11 @@ (yyval.src_reg).Base.Index = (yyvsp[-3].sym)->param_binding_begin + (yyvsp[-1].src_reg).Base.Index; } } -#line 2576 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2574 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 59: -#line 801 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 799 "./program/program_parse.y" /* yacc.c:1646 */ { gl_register_file file = ((yyvsp[0].temp_sym).name != NULL) ? (yyvsp[0].temp_sym).param_binding_type @@ -2584,22 +2582,22 @@ set_src_reg_swz(& (yyval.src_reg), file, (yyvsp[0].temp_sym).param_binding_begin, (yyvsp[0].temp_sym).param_binding_swizzle); } -#line 2588 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2586 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 60: -#line 811 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 809 "./program/program_parse.y" /* yacc.c:1646 */ { set_dst_reg(& (yyval.dst_reg), PROGRAM_OUTPUT, (yyvsp[0].result)); } -#line 2596 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2594 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 61: -#line 815 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 813 "./program/program_parse.y" /* yacc.c:1646 */ { struct asm_symbol *const s = (struct asm_symbol *) - _mesa_symbol_table_find_symbol(state->st, 0, (yyvsp[0].string)); + _mesa_symbol_table_find_symbol(state->st, (yyvsp[0].string)); free((yyvsp[0].string)); @@ -2623,14 +2621,14 @@ break; } } -#line 2627 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2625 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 62: -#line 844 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 842 "./program/program_parse.y" /* yacc.c:1646 */ { struct asm_symbol *const s = (struct asm_symbol *) - _mesa_symbol_table_find_symbol(state->st, 0, (yyvsp[0].string)); + _mesa_symbol_table_find_symbol(state->st, (yyvsp[0].string)); free((yyvsp[0].string)); @@ -2644,20 +2642,20 @@ (yyval.sym) = s; } } -#line 2648 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2646 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 65: -#line 865 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 863 "./program/program_parse.y" /* yacc.c:1646 */ { init_src_reg(& (yyval.src_reg)); (yyval.src_reg).Base.Index = (yyvsp[0].integer); } -#line 2657 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2655 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 66: -#line 872 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 870 "./program/program_parse.y" /* yacc.c:1646 */ { /* FINISHME: Add support for multiple address registers. */ @@ -2667,29 +2665,29 @@ (yyval.src_reg).Base.RelAddr = 1; (yyval.src_reg).Base.Index = (yyvsp[0].integer); } -#line 2671 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2669 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 67: -#line 883 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 881 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = 0; } -#line 2677 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2675 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 68: -#line 884 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 882 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = (yyvsp[0].integer); } -#line 2683 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2681 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 69: -#line 885 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 883 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = -(yyvsp[0].integer); } -#line 2689 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2687 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 70: -#line 889 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 887 "./program/program_parse.y" /* yacc.c:1646 */ { if (((yyvsp[0].integer) < 0) || ((yyvsp[0].integer) > (state->limits->MaxAddressOffset - 1))) { char s[100]; @@ -2701,11 +2699,11 @@ (yyval.integer) = (yyvsp[0].integer); } } -#line 2705 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2703 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 71: -#line 903 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 901 "./program/program_parse.y" /* yacc.c:1646 */ { if (((yyvsp[0].integer) < 0) || ((yyvsp[0].integer) > state->limits->MaxAddressOffset)) { char s[100]; @@ -2717,14 +2715,14 @@ (yyval.integer) = (yyvsp[0].integer); } } -#line 2721 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2719 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 72: -#line 917 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 915 "./program/program_parse.y" /* yacc.c:1646 */ { struct asm_symbol *const s = (struct asm_symbol *) - _mesa_symbol_table_find_symbol(state->st, 0, (yyvsp[0].string)); + _mesa_symbol_table_find_symbol(state->st, (yyvsp[0].string)); free((yyvsp[0].string)); @@ -2739,11 +2737,11 @@ (yyval.sym) = s; } } -#line 2743 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2741 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 73: -#line 937 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 935 "./program/program_parse.y" /* yacc.c:1646 */ { if ((yyvsp[0].swiz_mask).mask != WRITEMASK_X) { yyerror(& (yylsp[0]), state, "invalid address component selector"); @@ -2752,11 +2750,11 @@ (yyval.swiz_mask) = (yyvsp[0].swiz_mask); } } -#line 2756 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2754 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 74: -#line 948 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 946 "./program/program_parse.y" /* yacc.c:1646 */ { if ((yyvsp[0].swiz_mask).mask != WRITEMASK_X) { yyerror(& (yylsp[0]), state, @@ -2766,23 +2764,23 @@ (yyval.swiz_mask) = (yyvsp[0].swiz_mask); } } -#line 2770 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2768 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 79: -#line 964 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 962 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.swiz_mask).swizzle = SWIZZLE_NOOP; (yyval.swiz_mask).mask = WRITEMASK_XYZW; } -#line 2776 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2774 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 84: -#line 968 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 966 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.swiz_mask).swizzle = SWIZZLE_NOOP; (yyval.swiz_mask).mask = WRITEMASK_XYZW; } -#line 2782 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2780 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 91: -#line 980 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 978 "./program/program_parse.y" /* yacc.c:1646 */ { struct asm_symbol *const s = declare_variable(state, (yyvsp[-2].string), at_attrib, & (yylsp[-2])); @@ -2799,92 +2797,92 @@ } } } -#line 2803 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2801 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 92: -#line 999 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 997 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.attrib) = (yyvsp[0].attrib); } -#line 2811 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2809 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 93: -#line 1003 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1001 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.attrib) = (yyvsp[0].attrib); } -#line 2819 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2817 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 94: -#line 1009 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1007 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.attrib) = VERT_ATTRIB_POS; } -#line 2827 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2825 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 95: -#line 1013 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1011 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.attrib) = VERT_ATTRIB_WEIGHT; } -#line 2835 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2833 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 96: -#line 1017 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1015 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.attrib) = VERT_ATTRIB_NORMAL; } -#line 2843 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2841 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 97: -#line 1021 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1019 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.attrib) = VERT_ATTRIB_COLOR0 + (yyvsp[0].integer); } -#line 2851 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2849 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 98: -#line 1025 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1023 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.attrib) = VERT_ATTRIB_FOG; } -#line 2859 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2857 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 99: -#line 1029 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1027 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.attrib) = VERT_ATTRIB_TEX0 + (yyvsp[0].integer); } -#line 2867 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2865 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 100: -#line 1033 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1031 "./program/program_parse.y" /* yacc.c:1646 */ { yyerror(& (yylsp[-3]), state, "GL_ARB_matrix_palette not supported"); YYERROR; } -#line 2876 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2874 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 101: -#line 1038 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1036 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.attrib) = VERT_ATTRIB_GENERIC0 + (yyvsp[-1].integer); } -#line 2884 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2882 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 102: -#line 1044 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1042 "./program/program_parse.y" /* yacc.c:1646 */ { if ((unsigned) (yyvsp[0].integer) >= state->limits->MaxAttribs) { yyerror(& (yylsp[0]), state, "invalid vertex attribute reference"); @@ -2893,43 +2891,43 @@ (yyval.integer) = (yyvsp[0].integer); } -#line 2897 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2895 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 106: -#line 1058 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1056 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.attrib) = VARYING_SLOT_POS; } -#line 2905 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2903 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 107: -#line 1062 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1060 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.attrib) = VARYING_SLOT_COL0 + (yyvsp[0].integer); } -#line 2913 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2911 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 108: -#line 1066 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1064 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.attrib) = VARYING_SLOT_FOGC; } -#line 2921 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2919 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 109: -#line 1070 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1068 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.attrib) = VARYING_SLOT_TEX0 + (yyvsp[0].integer); } -#line 2929 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2927 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 112: -#line 1078 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1076 "./program/program_parse.y" /* yacc.c:1646 */ { struct asm_symbol *const s = declare_variable(state, (yyvsp[-1].string), at_param, & (yylsp[-1])); @@ -2945,11 +2943,11 @@ s->param_is_array = 0; } } -#line 2949 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2947 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 113: -#line 1096 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1094 "./program/program_parse.y" /* yacc.c:1646 */ { if (((yyvsp[-2].integer) != 0) && ((unsigned) (yyvsp[-2].integer) != (yyvsp[0].temp_sym).param_binding_length)) { free((yyvsp[-4].string)); @@ -2972,19 +2970,19 @@ } } } -#line 2976 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2974 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 114: -#line 1121 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1119 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = 0; } -#line 2984 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2982 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 115: -#line 1125 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1123 "./program/program_parse.y" /* yacc.c:1646 */ { if (((yyvsp[0].integer) < 1) || ((unsigned) (yyvsp[0].integer) > state->limits->MaxParameters)) { char msg[100]; @@ -2997,266 +2995,266 @@ (yyval.integer) = (yyvsp[0].integer); } } -#line 3001 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 2999 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 116: -#line 1140 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1138 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.temp_sym) = (yyvsp[0].temp_sym); } -#line 3009 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3007 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 117: -#line 1146 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1144 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.temp_sym) = (yyvsp[-1].temp_sym); } -#line 3017 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3015 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 119: -#line 1153 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1151 "./program/program_parse.y" /* yacc.c:1646 */ { (yyvsp[-2].temp_sym).param_binding_length += (yyvsp[0].temp_sym).param_binding_length; (yyval.temp_sym) = (yyvsp[-2].temp_sym); } -#line 3026 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3024 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 120: -#line 1160 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1158 "./program/program_parse.y" /* yacc.c:1646 */ { memset(& (yyval.temp_sym), 0, sizeof((yyval.temp_sym))); (yyval.temp_sym).param_binding_begin = ~0; initialize_symbol_from_state(state->prog, & (yyval.temp_sym), (yyvsp[0].state)); } -#line 3036 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3034 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 121: -#line 1166 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1164 "./program/program_parse.y" /* yacc.c:1646 */ { memset(& (yyval.temp_sym), 0, sizeof((yyval.temp_sym))); (yyval.temp_sym).param_binding_begin = ~0; initialize_symbol_from_param(state->prog, & (yyval.temp_sym), (yyvsp[0].state)); } -#line 3046 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3044 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 122: -#line 1172 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1170 "./program/program_parse.y" /* yacc.c:1646 */ { memset(& (yyval.temp_sym), 0, sizeof((yyval.temp_sym))); (yyval.temp_sym).param_binding_begin = ~0; initialize_symbol_from_const(state->prog, & (yyval.temp_sym), & (yyvsp[0].vector), GL_TRUE); } -#line 3056 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3054 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 123: -#line 1180 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1178 "./program/program_parse.y" /* yacc.c:1646 */ { memset(& (yyval.temp_sym), 0, sizeof((yyval.temp_sym))); (yyval.temp_sym).param_binding_begin = ~0; initialize_symbol_from_state(state->prog, & (yyval.temp_sym), (yyvsp[0].state)); } -#line 3066 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3064 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 124: -#line 1186 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1184 "./program/program_parse.y" /* yacc.c:1646 */ { memset(& (yyval.temp_sym), 0, sizeof((yyval.temp_sym))); (yyval.temp_sym).param_binding_begin = ~0; initialize_symbol_from_param(state->prog, & (yyval.temp_sym), (yyvsp[0].state)); } -#line 3076 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3074 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 125: -#line 1192 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1190 "./program/program_parse.y" /* yacc.c:1646 */ { memset(& (yyval.temp_sym), 0, sizeof((yyval.temp_sym))); (yyval.temp_sym).param_binding_begin = ~0; initialize_symbol_from_const(state->prog, & (yyval.temp_sym), & (yyvsp[0].vector), GL_TRUE); } -#line 3086 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3084 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 126: -#line 1200 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1198 "./program/program_parse.y" /* yacc.c:1646 */ { memset(& (yyval.temp_sym), 0, sizeof((yyval.temp_sym))); (yyval.temp_sym).param_binding_begin = ~0; initialize_symbol_from_state(state->prog, & (yyval.temp_sym), (yyvsp[0].state)); } -#line 3096 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3094 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 127: -#line 1206 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1204 "./program/program_parse.y" /* yacc.c:1646 */ { memset(& (yyval.temp_sym), 0, sizeof((yyval.temp_sym))); (yyval.temp_sym).param_binding_begin = ~0; initialize_symbol_from_param(state->prog, & (yyval.temp_sym), (yyvsp[0].state)); } -#line 3106 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3104 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 128: -#line 1212 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1210 "./program/program_parse.y" /* yacc.c:1646 */ { memset(& (yyval.temp_sym), 0, sizeof((yyval.temp_sym))); (yyval.temp_sym).param_binding_begin = ~0; initialize_symbol_from_const(state->prog, & (yyval.temp_sym), & (yyvsp[0].vector), GL_FALSE); } -#line 3116 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3114 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 129: -#line 1219 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1217 "./program/program_parse.y" /* yacc.c:1646 */ { memcpy((yyval.state), (yyvsp[0].state), sizeof((yyval.state))); } -#line 3122 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3120 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 130: -#line 1220 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1218 "./program/program_parse.y" /* yacc.c:1646 */ { memcpy((yyval.state), (yyvsp[0].state), sizeof((yyval.state))); } -#line 3128 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3126 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 131: -#line 1223 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1221 "./program/program_parse.y" /* yacc.c:1646 */ { memcpy((yyval.state), (yyvsp[0].state), sizeof((yyval.state))); } -#line 3134 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3132 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 132: -#line 1224 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1222 "./program/program_parse.y" /* yacc.c:1646 */ { memcpy((yyval.state), (yyvsp[0].state), sizeof((yyval.state))); } -#line 3140 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3138 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 133: -#line 1225 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1223 "./program/program_parse.y" /* yacc.c:1646 */ { memcpy((yyval.state), (yyvsp[0].state), sizeof((yyval.state))); } -#line 3146 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3144 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 134: -#line 1226 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1224 "./program/program_parse.y" /* yacc.c:1646 */ { memcpy((yyval.state), (yyvsp[0].state), sizeof((yyval.state))); } -#line 3152 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3150 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 135: -#line 1227 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1225 "./program/program_parse.y" /* yacc.c:1646 */ { memcpy((yyval.state), (yyvsp[0].state), sizeof((yyval.state))); } -#line 3158 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3156 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 136: -#line 1228 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1226 "./program/program_parse.y" /* yacc.c:1646 */ { memcpy((yyval.state), (yyvsp[0].state), sizeof((yyval.state))); } -#line 3164 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3162 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 137: -#line 1229 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1227 "./program/program_parse.y" /* yacc.c:1646 */ { memcpy((yyval.state), (yyvsp[0].state), sizeof((yyval.state))); } -#line 3170 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3168 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 138: -#line 1230 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1228 "./program/program_parse.y" /* yacc.c:1646 */ { memcpy((yyval.state), (yyvsp[0].state), sizeof((yyval.state))); } -#line 3176 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3174 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 139: -#line 1231 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1229 "./program/program_parse.y" /* yacc.c:1646 */ { memcpy((yyval.state), (yyvsp[0].state), sizeof((yyval.state))); } -#line 3182 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3180 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 140: -#line 1232 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1230 "./program/program_parse.y" /* yacc.c:1646 */ { memcpy((yyval.state), (yyvsp[0].state), sizeof((yyval.state))); } -#line 3188 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3186 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 141: -#line 1233 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1231 "./program/program_parse.y" /* yacc.c:1646 */ { memcpy((yyval.state), (yyvsp[0].state), sizeof((yyval.state))); } -#line 3194 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3192 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 142: -#line 1237 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1235 "./program/program_parse.y" /* yacc.c:1646 */ { memset((yyval.state), 0, sizeof((yyval.state))); (yyval.state)[0] = STATE_MATERIAL; (yyval.state)[1] = (yyvsp[-1].integer); (yyval.state)[2] = (yyvsp[0].integer); } -#line 3205 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3203 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 143: -#line 1246 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1244 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = (yyvsp[0].integer); } -#line 3213 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3211 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 144: -#line 1250 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1248 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = STATE_EMISSION; } -#line 3221 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3219 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 145: -#line 1254 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1252 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = STATE_SHININESS; } -#line 3229 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3227 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 146: -#line 1260 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1258 "./program/program_parse.y" /* yacc.c:1646 */ { memset((yyval.state), 0, sizeof((yyval.state))); (yyval.state)[0] = STATE_LIGHT; (yyval.state)[1] = (yyvsp[-2].integer); (yyval.state)[2] = (yyvsp[0].integer); } -#line 3240 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3238 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 147: -#line 1269 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1267 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = (yyvsp[0].integer); } -#line 3248 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3246 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 148: -#line 1273 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1271 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = STATE_POSITION; } -#line 3256 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3254 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 149: -#line 1277 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1275 "./program/program_parse.y" /* yacc.c:1646 */ { if (!state->ctx->Extensions.EXT_point_parameters) { yyerror(& (yylsp[0]), state, "GL_ARB_point_parameters not supported"); @@ -3265,63 +3263,63 @@ (yyval.integer) = STATE_ATTENUATION; } -#line 3269 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3267 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 150: -#line 1286 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1284 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = (yyvsp[0].integer); } -#line 3277 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3275 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 151: -#line 1290 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1288 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = STATE_HALF_VECTOR; } -#line 3285 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3283 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 152: -#line 1296 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1294 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = STATE_SPOT_DIRECTION; } -#line 3293 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3291 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 153: -#line 1302 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1300 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.state)[0] = (yyvsp[0].state)[0]; (yyval.state)[1] = (yyvsp[0].state)[1]; } -#line 3302 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3300 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 154: -#line 1309 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1307 "./program/program_parse.y" /* yacc.c:1646 */ { memset((yyval.state), 0, sizeof((yyval.state))); (yyval.state)[0] = STATE_LIGHTMODEL_AMBIENT; } -#line 3311 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3309 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 155: -#line 1314 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1312 "./program/program_parse.y" /* yacc.c:1646 */ { memset((yyval.state), 0, sizeof((yyval.state))); (yyval.state)[0] = STATE_LIGHTMODEL_SCENECOLOR; (yyval.state)[1] = (yyvsp[-1].integer); } -#line 3321 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3319 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 156: -#line 1322 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1320 "./program/program_parse.y" /* yacc.c:1646 */ { memset((yyval.state), 0, sizeof((yyval.state))); (yyval.state)[0] = STATE_LIGHTPROD; @@ -3329,53 +3327,53 @@ (yyval.state)[2] = (yyvsp[-1].integer); (yyval.state)[3] = (yyvsp[0].integer); } -#line 3333 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3331 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 158: -#line 1334 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1332 "./program/program_parse.y" /* yacc.c:1646 */ { memset((yyval.state), 0, sizeof((yyval.state))); (yyval.state)[0] = (yyvsp[0].integer); (yyval.state)[1] = (yyvsp[-1].integer); } -#line 3343 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3341 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 159: -#line 1342 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1340 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = STATE_TEXENV_COLOR; } -#line 3351 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3349 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 160: -#line 1348 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1346 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = STATE_AMBIENT; } -#line 3359 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3357 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 161: -#line 1352 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1350 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = STATE_DIFFUSE; } -#line 3367 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3365 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 162: -#line 1356 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1354 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = STATE_SPECULAR; } -#line 3375 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3373 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 163: -#line 1362 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1360 "./program/program_parse.y" /* yacc.c:1646 */ { if ((unsigned) (yyvsp[0].integer) >= state->MaxLights) { yyerror(& (yylsp[0]), state, "invalid light selector"); @@ -3384,105 +3382,105 @@ (yyval.integer) = (yyvsp[0].integer); } -#line 3388 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3386 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 164: -#line 1373 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1371 "./program/program_parse.y" /* yacc.c:1646 */ { memset((yyval.state), 0, sizeof((yyval.state))); (yyval.state)[0] = STATE_TEXGEN; (yyval.state)[1] = (yyvsp[-2].integer); (yyval.state)[2] = (yyvsp[-1].integer) + (yyvsp[0].integer); } -#line 3399 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3397 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 165: -#line 1382 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1380 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = STATE_TEXGEN_EYE_S; } -#line 3407 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3405 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 166: -#line 1386 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1384 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = STATE_TEXGEN_OBJECT_S; } -#line 3415 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3413 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 167: -#line 1391 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1389 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = STATE_TEXGEN_EYE_S - STATE_TEXGEN_EYE_S; } -#line 3423 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3421 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 168: -#line 1395 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1393 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = STATE_TEXGEN_EYE_T - STATE_TEXGEN_EYE_S; } -#line 3431 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3429 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 169: -#line 1399 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1397 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = STATE_TEXGEN_EYE_R - STATE_TEXGEN_EYE_S; } -#line 3439 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3437 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 170: -#line 1403 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1401 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = STATE_TEXGEN_EYE_Q - STATE_TEXGEN_EYE_S; } -#line 3447 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3445 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 171: -#line 1409 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1407 "./program/program_parse.y" /* yacc.c:1646 */ { memset((yyval.state), 0, sizeof((yyval.state))); (yyval.state)[0] = (yyvsp[0].integer); } -#line 3456 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3454 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 172: -#line 1416 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1414 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = STATE_FOG_COLOR; } -#line 3464 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3462 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 173: -#line 1420 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1418 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = STATE_FOG_PARAMS; } -#line 3472 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3470 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 174: -#line 1426 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1424 "./program/program_parse.y" /* yacc.c:1646 */ { memset((yyval.state), 0, sizeof((yyval.state))); (yyval.state)[0] = STATE_CLIPPLANE; (yyval.state)[1] = (yyvsp[-2].integer); } -#line 3482 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3480 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 175: -#line 1434 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1432 "./program/program_parse.y" /* yacc.c:1646 */ { if ((unsigned) (yyvsp[0].integer) >= state->MaxClipPlanes) { yyerror(& (yylsp[0]), state, "invalid clip plane selector"); @@ -3491,36 +3489,36 @@ (yyval.integer) = (yyvsp[0].integer); } -#line 3495 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3493 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 176: -#line 1445 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1443 "./program/program_parse.y" /* yacc.c:1646 */ { memset((yyval.state), 0, sizeof((yyval.state))); (yyval.state)[0] = (yyvsp[0].integer); } -#line 3504 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3502 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 177: -#line 1452 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1450 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = STATE_POINT_SIZE; } -#line 3512 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3510 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 178: -#line 1456 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1454 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = STATE_POINT_ATTENUATION; } -#line 3520 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3518 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 179: -#line 1462 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1460 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.state)[0] = (yyvsp[-4].state)[0]; (yyval.state)[1] = (yyvsp[-4].state)[1]; @@ -3528,11 +3526,11 @@ (yyval.state)[3] = (yyvsp[-1].integer); (yyval.state)[4] = (yyvsp[-4].state)[2]; } -#line 3532 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3530 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 180: -#line 1472 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1470 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.state)[0] = (yyvsp[-1].state)[0]; (yyval.state)[1] = (yyvsp[-1].state)[1]; @@ -3540,20 +3538,20 @@ (yyval.state)[3] = (yyvsp[0].state)[3]; (yyval.state)[4] = (yyvsp[-1].state)[2]; } -#line 3544 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3542 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 181: -#line 1482 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1480 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.state)[2] = 0; (yyval.state)[3] = 3; } -#line 3553 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3551 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 182: -#line 1487 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1485 "./program/program_parse.y" /* yacc.c:1646 */ { /* It seems logical that the matrix row range specifier would have * to specify a range or more than one row (i.e., $5 > $3). @@ -3569,61 +3567,61 @@ (yyval.state)[2] = (yyvsp[-3].integer); (yyval.state)[3] = (yyvsp[-1].integer); } -#line 3573 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3571 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 183: -#line 1505 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1503 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.state)[0] = (yyvsp[-1].state)[0]; (yyval.state)[1] = (yyvsp[-1].state)[1]; (yyval.state)[2] = (yyvsp[0].integer); } -#line 3583 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3581 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 184: -#line 1513 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1511 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = 0; } -#line 3591 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3589 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 185: -#line 1517 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1515 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = (yyvsp[0].integer); } -#line 3599 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3597 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 186: -#line 1523 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1521 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = STATE_MATRIX_INVERSE; } -#line 3607 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3605 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 187: -#line 1527 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1525 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = STATE_MATRIX_TRANSPOSE; } -#line 3615 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3613 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 188: -#line 1531 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1529 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = STATE_MATRIX_INVTRANS; } -#line 3623 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3621 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 189: -#line 1537 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1535 "./program/program_parse.y" /* yacc.c:1646 */ { if ((yyvsp[0].integer) > 3) { yyerror(& (yylsp[0]), state, "invalid matrix row reference"); @@ -3632,81 +3630,81 @@ (yyval.integer) = (yyvsp[0].integer); } -#line 3636 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3634 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 190: -#line 1548 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1546 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.state)[0] = STATE_MODELVIEW_MATRIX; (yyval.state)[1] = (yyvsp[0].integer); } -#line 3645 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3643 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 191: -#line 1553 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1551 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.state)[0] = STATE_PROJECTION_MATRIX; (yyval.state)[1] = 0; } -#line 3654 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3652 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 192: -#line 1558 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1556 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.state)[0] = STATE_MVP_MATRIX; (yyval.state)[1] = 0; } -#line 3663 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3661 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 193: -#line 1563 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1561 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.state)[0] = STATE_TEXTURE_MATRIX; (yyval.state)[1] = (yyvsp[0].integer); } -#line 3672 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3670 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 194: -#line 1568 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1566 "./program/program_parse.y" /* yacc.c:1646 */ { yyerror(& (yylsp[-3]), state, "GL_ARB_matrix_palette not supported"); YYERROR; } -#line 3681 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3679 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 195: -#line 1573 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1571 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.state)[0] = STATE_PROGRAM_MATRIX; (yyval.state)[1] = (yyvsp[-1].integer); } -#line 3690 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3688 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 196: -#line 1580 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1578 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = 0; } -#line 3698 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3696 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 197: -#line 1584 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1582 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = (yyvsp[-1].integer); } -#line 3706 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3704 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 198: -#line 1589 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1587 "./program/program_parse.y" /* yacc.c:1646 */ { /* Since GL_ARB_vertex_blend isn't supported, only modelview matrix * zero is valid. @@ -3718,22 +3716,22 @@ (yyval.integer) = (yyvsp[0].integer); } -#line 3722 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3720 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 199: -#line 1602 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1600 "./program/program_parse.y" /* yacc.c:1646 */ { /* Since GL_ARB_matrix_palette isn't supported, just let any value * through here. The error will be generated later. */ (yyval.integer) = (yyvsp[0].integer); } -#line 3733 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3731 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 200: -#line 1610 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1608 "./program/program_parse.y" /* yacc.c:1646 */ { if ((unsigned) (yyvsp[0].integer) >= state->MaxProgramMatrices) { yyerror(& (yylsp[0]), state, "invalid program matrix selector"); @@ -3742,20 +3740,20 @@ (yyval.integer) = (yyvsp[0].integer); } -#line 3746 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3744 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 201: -#line 1621 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1619 "./program/program_parse.y" /* yacc.c:1646 */ { memset((yyval.state), 0, sizeof((yyval.state))); (yyval.state)[0] = STATE_DEPTH_RANGE; } -#line 3755 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3753 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 206: -#line 1633 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1631 "./program/program_parse.y" /* yacc.c:1646 */ { memset((yyval.state), 0, sizeof((yyval.state))); (yyval.state)[0] = state->state_param_enum; @@ -3763,29 +3761,29 @@ (yyval.state)[2] = (yyvsp[-1].state)[0]; (yyval.state)[3] = (yyvsp[-1].state)[1]; } -#line 3767 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3765 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 207: -#line 1643 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1641 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.state)[0] = (yyvsp[0].integer); (yyval.state)[1] = (yyvsp[0].integer); } -#line 3776 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3774 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 208: -#line 1648 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1646 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.state)[0] = (yyvsp[-2].integer); (yyval.state)[1] = (yyvsp[0].integer); } -#line 3785 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3783 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 209: -#line 1655 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1653 "./program/program_parse.y" /* yacc.c:1646 */ { memset((yyval.state), 0, sizeof((yyval.state))); (yyval.state)[0] = state->state_param_enum; @@ -3793,11 +3791,11 @@ (yyval.state)[2] = (yyvsp[-1].integer); (yyval.state)[3] = (yyvsp[-1].integer); } -#line 3797 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3795 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 210: -#line 1665 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1663 "./program/program_parse.y" /* yacc.c:1646 */ { memset((yyval.state), 0, sizeof((yyval.state))); (yyval.state)[0] = state->state_param_enum; @@ -3805,29 +3803,29 @@ (yyval.state)[2] = (yyvsp[-1].state)[0]; (yyval.state)[3] = (yyvsp[-1].state)[1]; } -#line 3809 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3807 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 211: -#line 1674 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1672 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.state)[0] = (yyvsp[0].integer); (yyval.state)[1] = (yyvsp[0].integer); } -#line 3818 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3816 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 212: -#line 1679 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1677 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.state)[0] = (yyvsp[-2].integer); (yyval.state)[1] = (yyvsp[0].integer); } -#line 3827 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3825 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 213: -#line 1686 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1684 "./program/program_parse.y" /* yacc.c:1646 */ { memset((yyval.state), 0, sizeof((yyval.state))); (yyval.state)[0] = state->state_param_enum; @@ -3835,11 +3833,11 @@ (yyval.state)[2] = (yyvsp[-1].integer); (yyval.state)[3] = (yyvsp[-1].integer); } -#line 3839 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3837 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 214: -#line 1696 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1694 "./program/program_parse.y" /* yacc.c:1646 */ { if ((unsigned) (yyvsp[0].integer) >= state->limits->MaxEnvParams) { yyerror(& (yylsp[0]), state, "invalid environment parameter reference"); @@ -3847,11 +3845,11 @@ } (yyval.integer) = (yyvsp[0].integer); } -#line 3851 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3849 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 215: -#line 1706 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1704 "./program/program_parse.y" /* yacc.c:1646 */ { if ((unsigned) (yyvsp[0].integer) >= state->limits->MaxLocalParams) { yyerror(& (yylsp[0]), state, "invalid local parameter reference"); @@ -3859,11 +3857,11 @@ } (yyval.integer) = (yyvsp[0].integer); } -#line 3863 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3861 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 220: -#line 1721 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1719 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.vector).count = 4; (yyval.vector).data[0].f = (yyvsp[0].real); @@ -3871,11 +3869,11 @@ (yyval.vector).data[2].f = (yyvsp[0].real); (yyval.vector).data[3].f = (yyvsp[0].real); } -#line 3875 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3873 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 221: -#line 1731 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1729 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.vector).count = 1; (yyval.vector).data[0].f = (yyvsp[0].real); @@ -3883,11 +3881,11 @@ (yyval.vector).data[2].f = (yyvsp[0].real); (yyval.vector).data[3].f = (yyvsp[0].real); } -#line 3887 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3885 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 222: -#line 1739 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1737 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.vector).count = 1; (yyval.vector).data[0].f = (float) (yyvsp[0].integer); @@ -3895,11 +3893,11 @@ (yyval.vector).data[2].f = (float) (yyvsp[0].integer); (yyval.vector).data[3].f = (float) (yyvsp[0].integer); } -#line 3899 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3897 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 223: -#line 1749 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1747 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.vector).count = 4; (yyval.vector).data[0].f = (yyvsp[-1].real); @@ -3907,11 +3905,11 @@ (yyval.vector).data[2].f = 0.0f; (yyval.vector).data[3].f = 1.0f; } -#line 3911 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3909 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 224: -#line 1757 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1755 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.vector).count = 4; (yyval.vector).data[0].f = (yyvsp[-3].real); @@ -3919,11 +3917,11 @@ (yyval.vector).data[2].f = 0.0f; (yyval.vector).data[3].f = 1.0f; } -#line 3923 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3921 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 225: -#line 1766 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1764 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.vector).count = 4; (yyval.vector).data[0].f = (yyvsp[-5].real); @@ -3931,11 +3929,11 @@ (yyval.vector).data[2].f = (yyvsp[-1].real); (yyval.vector).data[3].f = 1.0f; } -#line 3935 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3933 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 226: -#line 1775 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1773 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.vector).count = 4; (yyval.vector).data[0].f = (yyvsp[-7].real); @@ -3943,79 +3941,79 @@ (yyval.vector).data[2].f = (yyvsp[-3].real); (yyval.vector).data[3].f = (yyvsp[-1].real); } -#line 3947 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3945 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 227: -#line 1785 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1783 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.real) = ((yyvsp[-1].negate)) ? -(yyvsp[0].real) : (yyvsp[0].real); } -#line 3955 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3953 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 228: -#line 1789 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1787 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.real) = (float)(((yyvsp[-1].negate)) ? -(yyvsp[0].integer) : (yyvsp[0].integer)); } -#line 3963 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3961 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 229: -#line 1794 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1792 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.negate) = FALSE; } -#line 3969 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3967 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 230: -#line 1795 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1793 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.negate) = TRUE; } -#line 3975 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3973 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 231: -#line 1796 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1794 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.negate) = FALSE; } -#line 3981 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3979 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 232: -#line 1799 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1797 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = (yyvsp[0].integer); } -#line 3987 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3985 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 234: -#line 1802 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1800 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = (yyvsp[0].integer); } -#line 3993 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 3991 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 236: -#line 1806 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1804 "./program/program_parse.y" /* yacc.c:1646 */ { if (!declare_variable(state, (yyvsp[0].string), (yyvsp[-3].integer), & (yylsp[0]))) { free((yyvsp[0].string)); YYERROR; } } -#line 4004 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4002 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 237: -#line 1813 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1811 "./program/program_parse.y" /* yacc.c:1646 */ { if (!declare_variable(state, (yyvsp[0].string), (yyvsp[-1].integer), & (yylsp[0]))) { free((yyvsp[0].string)); YYERROR; } } -#line 4015 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4013 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 238: -#line 1822 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1820 "./program/program_parse.y" /* yacc.c:1646 */ { struct asm_symbol *const s = declare_variable(state, (yyvsp[-2].string), at_output, & (yylsp[-2])); @@ -4027,11 +4025,11 @@ s->output_binding = (yyvsp[0].result); } } -#line 4031 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4029 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 239: -#line 1836 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1834 "./program/program_parse.y" /* yacc.c:1646 */ { if (state->mode == ARB_vertex) { (yyval.result) = VARYING_SLOT_POS; @@ -4040,11 +4038,11 @@ YYERROR; } } -#line 4044 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4042 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 240: -#line 1845 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1843 "./program/program_parse.y" /* yacc.c:1646 */ { if (state->mode == ARB_vertex) { (yyval.result) = VARYING_SLOT_FOGC; @@ -4053,19 +4051,19 @@ YYERROR; } } -#line 4057 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4055 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 241: -#line 1854 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1852 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.result) = (yyvsp[0].result); } -#line 4065 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4063 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 242: -#line 1858 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1856 "./program/program_parse.y" /* yacc.c:1646 */ { if (state->mode == ARB_vertex) { (yyval.result) = VARYING_SLOT_PSIZ; @@ -4074,11 +4072,11 @@ YYERROR; } } -#line 4078 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4076 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 243: -#line 1867 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1865 "./program/program_parse.y" /* yacc.c:1646 */ { if (state->mode == ARB_vertex) { (yyval.result) = VARYING_SLOT_TEX0 + (yyvsp[0].integer); @@ -4087,11 +4085,11 @@ YYERROR; } } -#line 4091 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4089 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 244: -#line 1876 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1874 "./program/program_parse.y" /* yacc.c:1646 */ { if (state->mode == ARB_fragment) { (yyval.result) = FRAG_RESULT_DEPTH; @@ -4100,19 +4098,19 @@ YYERROR; } } -#line 4104 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4102 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 245: -#line 1887 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1885 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.result) = (yyvsp[-1].integer) + (yyvsp[0].integer); } -#line 4112 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4110 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 246: -#line 1893 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1891 "./program/program_parse.y" /* yacc.c:1646 */ { if (state->mode == ARB_vertex) { (yyval.integer) = VARYING_SLOT_COL0; @@ -4123,11 +4121,11 @@ (yyval.integer) = FRAG_RESULT_COLOR; } } -#line 4127 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4125 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 247: -#line 1904 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1902 "./program/program_parse.y" /* yacc.c:1646 */ { if (state->mode == ARB_vertex) { yyerror(& (yylsp[-2]), state, "invalid program result name"); @@ -4155,11 +4153,11 @@ (yyval.integer) = FRAG_RESULT_DATA0 + (yyvsp[-1].integer); } } -#line 4159 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4157 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 248: -#line 1932 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1930 "./program/program_parse.y" /* yacc.c:1646 */ { if (state->mode == ARB_vertex) { (yyval.integer) = VARYING_SLOT_COL0; @@ -4168,11 +4166,11 @@ YYERROR; } } -#line 4172 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4170 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 249: -#line 1941 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1939 "./program/program_parse.y" /* yacc.c:1646 */ { if (state->mode == ARB_vertex) { (yyval.integer) = VARYING_SLOT_BFC0; @@ -4181,19 +4179,19 @@ YYERROR; } } -#line 4185 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4183 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 250: -#line 1952 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1950 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = 0; } -#line 4193 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4191 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 251: -#line 1956 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1954 "./program/program_parse.y" /* yacc.c:1646 */ { if (state->mode == ARB_vertex) { (yyval.integer) = 0; @@ -4202,11 +4200,11 @@ YYERROR; } } -#line 4206 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4204 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 252: -#line 1965 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1963 "./program/program_parse.y" /* yacc.c:1646 */ { if (state->mode == ARB_vertex) { (yyval.integer) = 1; @@ -4215,83 +4213,83 @@ YYERROR; } } -#line 4219 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4217 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 253: -#line 1975 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1973 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = 0; } -#line 4225 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4223 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 254: -#line 1976 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1974 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = 0; } -#line 4231 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4229 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 255: -#line 1977 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1975 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = 1; } -#line 4237 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4235 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 256: -#line 1980 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1978 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = 0; } -#line 4243 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4241 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 257: -#line 1981 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1979 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = 0; } -#line 4249 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4247 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 258: -#line 1982 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1980 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = 1; } -#line 4255 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4253 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 259: -#line 1985 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1983 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = 0; } -#line 4261 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4259 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 260: -#line 1986 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1984 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = (yyvsp[-1].integer); } -#line 4267 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4265 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 261: -#line 1989 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1987 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = 0; } -#line 4273 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4271 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 262: -#line 1990 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1988 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = (yyvsp[-1].integer); } -#line 4279 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4277 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 263: -#line 1993 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1991 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = 0; } -#line 4285 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4283 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 264: -#line 1994 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1992 "./program/program_parse.y" /* yacc.c:1646 */ { (yyval.integer) = (yyvsp[-1].integer); } -#line 4291 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4289 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 265: -#line 1998 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 1996 "./program/program_parse.y" /* yacc.c:1646 */ { if ((unsigned) (yyvsp[0].integer) >= state->MaxTextureCoordUnits) { yyerror(& (yylsp[0]), state, "invalid texture coordinate unit selector"); @@ -4300,11 +4298,11 @@ (yyval.integer) = (yyvsp[0].integer); } -#line 4304 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4302 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 266: -#line 2009 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 2007 "./program/program_parse.y" /* yacc.c:1646 */ { if ((unsigned) (yyvsp[0].integer) >= state->MaxTextureImageUnits) { yyerror(& (yylsp[0]), state, "invalid texture image unit selector"); @@ -4313,11 +4311,11 @@ (yyval.integer) = (yyvsp[0].integer); } -#line 4317 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4315 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 267: -#line 2020 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 2018 "./program/program_parse.y" /* yacc.c:1646 */ { if ((unsigned) (yyvsp[0].integer) >= state->MaxTextureUnits) { yyerror(& (yylsp[0]), state, "invalid texture unit selector"); @@ -4326,16 +4324,16 @@ (yyval.integer) = (yyvsp[0].integer); } -#line 4330 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4328 "program/program_parse.tab.c" /* yacc.c:1646 */ break; case 268: -#line 2031 "../../../src/mesa/program/program_parse.y" /* yacc.c:1646 */ +#line 2029 "./program/program_parse.y" /* yacc.c:1646 */ { struct asm_symbol *exist = (struct asm_symbol *) - _mesa_symbol_table_find_symbol(state->st, 0, (yyvsp[-2].string)); + _mesa_symbol_table_find_symbol(state->st, (yyvsp[-2].string)); struct asm_symbol *target = (struct asm_symbol *) - _mesa_symbol_table_find_symbol(state->st, 0, (yyvsp[0].string)); + _mesa_symbol_table_find_symbol(state->st, (yyvsp[0].string)); free((yyvsp[0].string)); @@ -4351,14 +4349,14 @@ "undefined variable binding in ALIAS statement"); YYERROR; } else { - _mesa_symbol_table_add_symbol(state->st, 0, (yyvsp[-2].string), target); + _mesa_symbol_table_add_symbol(state->st, (yyvsp[-2].string), target); } } -#line 4358 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4356 "program/program_parse.tab.c" /* yacc.c:1646 */ break; -#line 4362 "program/program_parse.tab.c" /* yacc.c:1646 */ +#line 4360 "program/program_parse.tab.c" /* yacc.c:1646 */ default: break; } /* User semantic actions sometimes alter yychar, and that requires @@ -4593,7 +4591,7 @@ #endif return yyresult; } -#line 2060 "../../../src/mesa/program/program_parse.y" /* yacc.c:1906 */ +#line 2058 "./program/program_parse.y" /* yacc.c:1906 */ void @@ -4757,7 +4755,7 @@ int validate_inputs(struct YYLTYPE *locp, struct asm_parser_state *state) { - const GLbitfield64 inputs = state->prog->InputsRead | state->InputsBound; + const GLbitfield64 inputs = state->prog->info.inputs_read | state->InputsBound; if (((inputs & VERT_BIT_FF_ALL) & (inputs >> VERT_ATTRIB_GENERIC0)) != 0) { yyerror(locp, state, "illegal use of generic attribute and name attribute"); @@ -4774,7 +4772,7 @@ { struct asm_symbol *s = NULL; struct asm_symbol *exist = (struct asm_symbol *) - _mesa_symbol_table_find_symbol(state->st, 0, name); + _mesa_symbol_table_find_symbol(state->st, name); if (exist != NULL) { @@ -4786,18 +4784,19 @@ switch (t) { case at_temp: - if (state->prog->NumTemporaries >= state->limits->MaxTemps) { + if (state->prog->arb.NumTemporaries >= state->limits->MaxTemps) { yyerror(locp, state, "too many temporaries declared"); free(s); return NULL; } - s->temp_binding = state->prog->NumTemporaries; - state->prog->NumTemporaries++; + s->temp_binding = state->prog->arb.NumTemporaries; + state->prog->arb.NumTemporaries++; break; case at_address: - if (state->prog->NumAddressRegs >= state->limits->MaxAddressRegs) { + if (state->prog->arb.NumAddressRegs >= + state->limits->MaxAddressRegs) { yyerror(locp, state, "too many address registers declared"); free(s); return NULL; @@ -4805,14 +4804,14 @@ /* FINISHME: Add support for multiple address registers. */ - state->prog->NumAddressRegs++; + state->prog->arb.NumAddressRegs++; break; default: break; } - _mesa_symbol_table_add_symbol(state->st, 0, s->name, s); + _mesa_symbol_table_add_symbol(state->st, s->name, s); s->next = state->sym; state->sym = s; } @@ -5050,7 +5049,7 @@ /* Make a copy of the program string and force it to be NUL-terminated. */ - strz = (GLubyte *) malloc(len + 1); + strz = (GLubyte *) ralloc_size(state->mem_ctx, len + 1); if (strz == NULL) { _mesa_error(ctx, GL_OUT_OF_MEMORY, "glProgramStringARB"); return GL_FALSE; @@ -5103,41 +5102,43 @@ /* Add one instruction to store the "END" instruction. */ - state->prog->Instructions = - _mesa_alloc_instructions(state->prog->NumInstructions + 1); + state->prog->arb.Instructions = + rzalloc_array(state->mem_ctx, struct prog_instruction, + state->prog->arb.NumInstructions + 1); - if (state->prog->Instructions == NULL) { + if (state->prog->arb.Instructions == NULL) { goto error; } inst = state->inst_head; - for (i = 0; i < state->prog->NumInstructions; i++) { + for (i = 0; i < state->prog->arb.NumInstructions; i++) { struct asm_instruction *const temp = inst->next; - state->prog->Instructions[i] = inst->Base; + state->prog->arb.Instructions[i] = inst->Base; inst = temp; } /* Finally, tag on an OPCODE_END instruction */ { - const GLuint numInst = state->prog->NumInstructions; - _mesa_init_instructions(state->prog->Instructions + numInst, 1); - state->prog->Instructions[numInst].Opcode = OPCODE_END; + const GLuint numInst = state->prog->arb.NumInstructions; + _mesa_init_instructions(state->prog->arb.Instructions + numInst, 1); + state->prog->arb.Instructions[numInst].Opcode = OPCODE_END; } - state->prog->NumInstructions++; + state->prog->arb.NumInstructions++; - state->prog->NumParameters = state->prog->Parameters->NumParameters; - state->prog->NumAttributes = _mesa_bitcount_64(state->prog->InputsRead); + state->prog->arb.NumParameters = state->prog->Parameters->NumParameters; + state->prog->arb.NumAttributes = + _mesa_bitcount_64(state->prog->info.inputs_read); /* * Initialize native counts to logical counts. The device driver may * change them if program is translated into a hardware program. */ - state->prog->NumNativeInstructions = state->prog->NumInstructions; - state->prog->NumNativeTemporaries = state->prog->NumTemporaries; - state->prog->NumNativeParameters = state->prog->NumParameters; - state->prog->NumNativeAttributes = state->prog->NumAttributes; - state->prog->NumNativeAddressRegs = state->prog->NumAddressRegs; + state->prog->arb.NumNativeInstructions = state->prog->arb.NumInstructions; + state->prog->arb.NumNativeTemporaries = state->prog->arb.NumTemporaries; + state->prog->arb.NumNativeParameters = state->prog->arb.NumParameters; + state->prog->arb.NumNativeAttributes = state->prog->arb.NumAttributes; + state->prog->arb.NumNativeAddressRegs = state->prog->arb.NumAddressRegs; result = GL_TRUE; diff -Nru mesa-12.0.6/src/mesa/program/program_parse.tab.h mesa-17.0.7/src/mesa/program/program_parse.tab.h --- mesa-12.0.6/src/mesa/program/program_parse.tab.h 2017-01-24 01:43:22.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/program_parse.tab.h 2017-06-01 10:38:04.000000000 +0000 @@ -158,7 +158,7 @@ union YYSTYPE { -#line 126 "../../../src/mesa/program/program_parse.y" /* yacc.c:1909 */ +#line 126 "./program/program_parse.y" /* yacc.c:1909 */ struct asm_instruction *inst; struct asm_symbol *sym; diff -Nru mesa-12.0.6/src/mesa/program/program_parse.y mesa-17.0.7/src/mesa/program/program_parse.y --- mesa-12.0.6/src/mesa/program/program_parse.y 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/program_parse.y 2017-06-01 10:37:10.000000000 +0000 @@ -348,7 +348,7 @@ state->inst_tail = $1; $1->next = NULL; - state->prog->NumInstructions++; + state->prog->arb.NumInstructions++; } } | namingStatement ';' @@ -357,12 +357,12 @@ instruction: ALU_instruction { $$ = $1; - state->prog->NumAluInstructions++; + state->prog->arb.NumAluInstructions++; } | TexInstruction { $$ = $1; - state->prog->NumTexInstructions++; + state->prog->arb.NumTexInstructions++; } ; @@ -388,8 +388,6 @@ VECTORop_instruction: VECTOR_OP maskedDstReg ',' swizzleSrcReg { - if ($1.Opcode == OPCODE_DDY) - state->fragment.UsesDFdy = 1; $$ = asm_instruction_copy_ctor(& $1, & $2, & $4, NULL, NULL); } ; @@ -596,7 +594,7 @@ YYERROR; } - state->prog->OutputsWritten |= BITFIELD64_BIT($$.Index); + state->prog->info.outputs_written |= BITFIELD64_BIT($$.Index); } } ; @@ -726,7 +724,7 @@ srcReg: USED_IDENTIFIER /* temporaryReg | progParamSingle */ { struct asm_symbol *const s = (struct asm_symbol *) - _mesa_symbol_table_find_symbol(state->st, 0, $1); + _mesa_symbol_table_find_symbol(state->st, $1); free($1); @@ -754,7 +752,7 @@ break; case at_attrib: set_src_reg(& $$, PROGRAM_INPUT, s->attrib_binding); - state->prog->InputsRead |= BITFIELD64_BIT($$.Base.Index); + state->prog->info.inputs_read |= BITFIELD64_BIT($$.Base.Index); if (!validate_inputs(& @1, state)) { YYERROR; @@ -769,7 +767,7 @@ | attribBinding { set_src_reg(& $$, PROGRAM_INPUT, $1); - state->prog->InputsRead |= BITFIELD64_BIT($$.Base.Index); + state->prog->info.inputs_read |= BITFIELD64_BIT($$.Base.Index); if (!validate_inputs(& @1, state)) { YYERROR; @@ -787,7 +785,7 @@ $$.Base.File = $1->param_binding_type; if ($3.Base.RelAddr) { - state->prog->IndirectRegisterFiles |= (1 << $$.Base.File); + state->prog->arb.IndirectRegisterFiles |= (1 << $$.Base.File); $1->param_accessed_indirectly = 1; $$.Base.RelAddr = 1; @@ -814,7 +812,7 @@ | USED_IDENTIFIER /* temporaryReg | vertexResultReg */ { struct asm_symbol *const s = (struct asm_symbol *) - _mesa_symbol_table_find_symbol(state->st, 0, $1); + _mesa_symbol_table_find_symbol(state->st, $1); free($1); @@ -843,7 +841,7 @@ progParamArray: USED_IDENTIFIER { struct asm_symbol *const s = (struct asm_symbol *) - _mesa_symbol_table_find_symbol(state->st, 0, $1); + _mesa_symbol_table_find_symbol(state->st, $1); free($1); @@ -916,7 +914,7 @@ addrReg: USED_IDENTIFIER { struct asm_symbol *const s = (struct asm_symbol *) - _mesa_symbol_table_find_symbol(state->st, 0, $1); + _mesa_symbol_table_find_symbol(state->st, $1); free($1); @@ -2030,9 +2028,9 @@ ALIAS_statement: ALIAS IDENTIFIER '=' USED_IDENTIFIER { struct asm_symbol *exist = (struct asm_symbol *) - _mesa_symbol_table_find_symbol(state->st, 0, $2); + _mesa_symbol_table_find_symbol(state->st, $2); struct asm_symbol *target = (struct asm_symbol *) - _mesa_symbol_table_find_symbol(state->st, 0, $4); + _mesa_symbol_table_find_symbol(state->st, $4); free($4); @@ -2048,7 +2046,7 @@ "undefined variable binding in ALIAS statement"); YYERROR; } else { - _mesa_symbol_table_add_symbol(state->st, 0, $2, target); + _mesa_symbol_table_add_symbol(state->st, $2, target); } } ; @@ -2220,7 +2218,7 @@ int validate_inputs(struct YYLTYPE *locp, struct asm_parser_state *state) { - const GLbitfield64 inputs = state->prog->InputsRead | state->InputsBound; + const GLbitfield64 inputs = state->prog->info.inputs_read | state->InputsBound; if (((inputs & VERT_BIT_FF_ALL) & (inputs >> VERT_ATTRIB_GENERIC0)) != 0) { yyerror(locp, state, "illegal use of generic attribute and name attribute"); @@ -2237,7 +2235,7 @@ { struct asm_symbol *s = NULL; struct asm_symbol *exist = (struct asm_symbol *) - _mesa_symbol_table_find_symbol(state->st, 0, name); + _mesa_symbol_table_find_symbol(state->st, name); if (exist != NULL) { @@ -2249,18 +2247,19 @@ switch (t) { case at_temp: - if (state->prog->NumTemporaries >= state->limits->MaxTemps) { + if (state->prog->arb.NumTemporaries >= state->limits->MaxTemps) { yyerror(locp, state, "too many temporaries declared"); free(s); return NULL; } - s->temp_binding = state->prog->NumTemporaries; - state->prog->NumTemporaries++; + s->temp_binding = state->prog->arb.NumTemporaries; + state->prog->arb.NumTemporaries++; break; case at_address: - if (state->prog->NumAddressRegs >= state->limits->MaxAddressRegs) { + if (state->prog->arb.NumAddressRegs >= + state->limits->MaxAddressRegs) { yyerror(locp, state, "too many address registers declared"); free(s); return NULL; @@ -2268,14 +2267,14 @@ /* FINISHME: Add support for multiple address registers. */ - state->prog->NumAddressRegs++; + state->prog->arb.NumAddressRegs++; break; default: break; } - _mesa_symbol_table_add_symbol(state->st, 0, s->name, s); + _mesa_symbol_table_add_symbol(state->st, s->name, s); s->next = state->sym; state->sym = s; } @@ -2513,7 +2512,7 @@ /* Make a copy of the program string and force it to be NUL-terminated. */ - strz = (GLubyte *) malloc(len + 1); + strz = (GLubyte *) ralloc_size(state->mem_ctx, len + 1); if (strz == NULL) { _mesa_error(ctx, GL_OUT_OF_MEMORY, "glProgramStringARB"); return GL_FALSE; @@ -2566,41 +2565,43 @@ /* Add one instruction to store the "END" instruction. */ - state->prog->Instructions = - _mesa_alloc_instructions(state->prog->NumInstructions + 1); + state->prog->arb.Instructions = + rzalloc_array(state->mem_ctx, struct prog_instruction, + state->prog->arb.NumInstructions + 1); - if (state->prog->Instructions == NULL) { + if (state->prog->arb.Instructions == NULL) { goto error; } inst = state->inst_head; - for (i = 0; i < state->prog->NumInstructions; i++) { + for (i = 0; i < state->prog->arb.NumInstructions; i++) { struct asm_instruction *const temp = inst->next; - state->prog->Instructions[i] = inst->Base; + state->prog->arb.Instructions[i] = inst->Base; inst = temp; } /* Finally, tag on an OPCODE_END instruction */ { - const GLuint numInst = state->prog->NumInstructions; - _mesa_init_instructions(state->prog->Instructions + numInst, 1); - state->prog->Instructions[numInst].Opcode = OPCODE_END; - } - state->prog->NumInstructions++; - - state->prog->NumParameters = state->prog->Parameters->NumParameters; - state->prog->NumAttributes = _mesa_bitcount_64(state->prog->InputsRead); + const GLuint numInst = state->prog->arb.NumInstructions; + _mesa_init_instructions(state->prog->arb.Instructions + numInst, 1); + state->prog->arb.Instructions[numInst].Opcode = OPCODE_END; + } + state->prog->arb.NumInstructions++; + + state->prog->arb.NumParameters = state->prog->Parameters->NumParameters; + state->prog->arb.NumAttributes = + _mesa_bitcount_64(state->prog->info.inputs_read); /* * Initialize native counts to logical counts. The device driver may * change them if program is translated into a hardware program. */ - state->prog->NumNativeInstructions = state->prog->NumInstructions; - state->prog->NumNativeTemporaries = state->prog->NumTemporaries; - state->prog->NumNativeParameters = state->prog->NumParameters; - state->prog->NumNativeAttributes = state->prog->NumAttributes; - state->prog->NumNativeAddressRegs = state->prog->NumAddressRegs; + state->prog->arb.NumNativeInstructions = state->prog->arb.NumInstructions; + state->prog->arb.NumNativeTemporaries = state->prog->arb.NumTemporaries; + state->prog->arb.NumNativeParameters = state->prog->arb.NumParameters; + state->prog->arb.NumNativeAttributes = state->prog->arb.NumAttributes; + state->prog->arb.NumNativeAddressRegs = state->prog->arb.NumAddressRegs; result = GL_TRUE; diff -Nru mesa-12.0.6/src/mesa/program/prog_statevars.c mesa-17.0.7/src/mesa/program/prog_statevars.c --- mesa-12.0.6/src/mesa/program/prog_statevars.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/prog_statevars.c 2017-06-01 10:37:10.000000000 +0000 @@ -373,14 +373,17 @@ COPY_4V(value, ctx->FragmentProgram.Parameters[idx]); return; case STATE_LOCAL: - if (!ctx->FragmentProgram.Current->Base.LocalParams) { - ctx->FragmentProgram.Current->Base.LocalParams = - calloc(MAX_PROGRAM_LOCAL_PARAMS, sizeof(float[4])); - if (!ctx->FragmentProgram.Current->Base.LocalParams) + if (!ctx->FragmentProgram.Current->arb.LocalParams) { + ctx->FragmentProgram.Current->arb.LocalParams = + rzalloc_array_size(ctx->FragmentProgram.Current, + sizeof(float[4]), + MAX_PROGRAM_LOCAL_PARAMS); + if (!ctx->FragmentProgram.Current->arb.LocalParams) return; } - COPY_4V(value, ctx->FragmentProgram.Current->Base.LocalParams[idx]); + COPY_4V(value, + ctx->FragmentProgram.Current->arb.LocalParams[idx]); return; default: _mesa_problem(ctx, "Bad state switch in _mesa_fetch_state()"); @@ -399,14 +402,17 @@ COPY_4V(value, ctx->VertexProgram.Parameters[idx]); return; case STATE_LOCAL: - if (!ctx->VertexProgram.Current->Base.LocalParams) { - ctx->VertexProgram.Current->Base.LocalParams = - calloc(MAX_PROGRAM_LOCAL_PARAMS, sizeof(float[4])); - if (!ctx->VertexProgram.Current->Base.LocalParams) + if (!ctx->VertexProgram.Current->arb.LocalParams) { + ctx->VertexProgram.Current->arb.LocalParams = + rzalloc_array_size(ctx->VertexProgram.Current, + sizeof(float[4]), + MAX_PROGRAM_LOCAL_PARAMS); + if (!ctx->VertexProgram.Current->arb.LocalParams) return; } - COPY_4V(value, ctx->VertexProgram.Current->Base.LocalParams[idx]); + COPY_4V(value, + ctx->VertexProgram.Current->arb.LocalParams[idx]); return; default: _mesa_problem(ctx, "Bad state switch in _mesa_fetch_state()"); @@ -604,11 +610,15 @@ case STATE_TES_PATCH_VERTICES_IN: if (ctx->TessCtrlProgram._Current) - val[0].i = ctx->TessCtrlProgram._Current->VerticesOut; + val[0].i = ctx->TessCtrlProgram._Current->info.tess.tcs_vertices_out; else val[0].i = ctx->TessCtrlProgram.patch_vertices; return; + case STATE_ADVANCED_BLENDING_MODE: + val[0].i = ctx->Color.BlendEnabled ? ctx->Color._AdvancedBlendMode : 0; + return; + /* XXX: make sure new tokens added here are also handled in the * _mesa_program_state_flags() switch, below. */ @@ -719,6 +729,9 @@ case STATE_FB_WPOS_Y_TRANSFORM: return _NEW_BUFFERS; + case STATE_ADVANCED_BLENDING_MODE: + return _NEW_COLOR; + default: /* unknown state indexes are silently ignored and * no flag set, since it is handled by the driver. @@ -925,6 +938,9 @@ case STATE_FB_WPOS_Y_TRANSFORM: append(dst, "FbWposYTransform"); break; + case STATE_ADVANCED_BLENDING_MODE: + append(dst, "AdvancedBlendingMode"); + break; default: /* probably STATE_INTERNAL_DRIVER+i (driver private state) */ append(dst, "driverState"); diff -Nru mesa-12.0.6/src/mesa/program/prog_statevars.h mesa-17.0.7/src/mesa/program/prog_statevars.h --- mesa-12.0.6/src/mesa/program/prog_statevars.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/prog_statevars.h 2017-06-01 10:37:10.000000000 +0000 @@ -130,6 +130,11 @@ STATE_FB_WPOS_Y_TRANSFORM, /**< (1, 0, -1, height) if a FBO is bound, (-1, height, 1, 0) otherwise */ STATE_TCS_PATCH_VERTICES_IN, /**< gl_PatchVerticesIn for TCS (integer) */ STATE_TES_PATCH_VERTICES_IN, /**< gl_PatchVerticesIn for TES (integer) */ + /** + * A single enum gl_blend_support_qualifier value representing the + * currently active advanced blending equation, or zero if disabled. + */ + STATE_ADVANCED_BLENDING_MODE, STATE_INTERNAL_DRIVER /* first available state index for drivers (must be last) */ } gl_state_index; diff -Nru mesa-12.0.6/src/mesa/program/prog_to_nir.c mesa-17.0.7/src/mesa/program/prog_to_nir.c --- mesa-12.0.6/src/mesa/program/prog_to_nir.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/prog_to_nir.c 2017-06-01 10:37:10.000000000 +0000 @@ -159,7 +159,8 @@ switch (file) { case PROGRAM_CONSTANT: - if ((c->prog->IndirectRegisterFiles & (1 << PROGRAM_CONSTANT)) == 0) { + if ((c->prog->arb.IndirectRegisterFiles & + (1 << PROGRAM_CONSTANT)) == 0) { float *v = (float *) plist->ParameterValues[prog_src->Index]; src.src = nir_src_for_ssa(nir_imm_vec4(b, v[0], v[1], v[2], v[3])); break; @@ -596,6 +597,9 @@ case GLSL_SAMPLER_DIM_CUBE: instr->coord_components = 3; break; + case GLSL_SAMPLER_DIM_SUBPASS: + case GLSL_SAMPLER_DIM_SUBPASS_MS: + unreachable("can't reach"); } unsigned src_number = 0; @@ -630,7 +634,7 @@ else instr->src[src_number].src = nir_src_for_ssa(ptn_channel(b, src[0], W)); - instr->src[src_number].src_type = nir_tex_src_comparitor; + instr->src[src_number].src_type = nir_tex_src_comparator; src_number++; } @@ -887,9 +891,9 @@ struct nir_shader *shader = b->shader; /* Create input variables. */ - const int num_inputs = _mesa_flsll(c->prog->InputsRead); + const int num_inputs = util_last_bit64(c->prog->info.inputs_read); for (int i = 0; i < num_inputs; i++) { - if (!(c->prog->InputsRead & BITFIELD64_BIT(i))) + if (!(c->prog->info.inputs_read & BITFIELD64_BIT(i))) continue; nir_variable *var = @@ -899,14 +903,9 @@ var->data.index = 0; if (c->prog->Target == GL_FRAGMENT_PROGRAM_ARB) { - struct gl_fragment_program *fp = - (struct gl_fragment_program *) c->prog; - - var->data.interpolation = fp->InterpQualifier[i]; - if (i == VARYING_SLOT_POS) { - var->data.origin_upper_left = fp->OriginUpperLeft; - var->data.pixel_center_integer = fp->PixelCenterInteger; + var->data.origin_upper_left = c->prog->OriginUpperLeft; + var->data.pixel_center_integer = c->prog->PixelCenterInteger; } else if (i == VARYING_SLOT_FOGC) { /* fogcoord is defined as . Make the actual * input variable a float, and create a local containing the @@ -948,11 +947,11 @@ } /* Create output registers and variables. */ - int max_outputs = _mesa_fls(c->prog->OutputsWritten); + int max_outputs = util_last_bit(c->prog->info.outputs_written); c->output_regs = rzalloc_array(c, nir_register *, max_outputs); for (int i = 0; i < max_outputs; i++) { - if (!(c->prog->OutputsWritten & BITFIELD64_BIT(i))) + if (!(c->prog->info.outputs_written & BITFIELD64_BIT(i))) continue; /* Since we can't load from outputs in the IR, we make temporaries @@ -980,10 +979,11 @@ } /* Create temporary registers. */ - c->temp_regs = rzalloc_array(c, nir_register *, c->prog->NumTemporaries); + c->temp_regs = rzalloc_array(c, nir_register *, + c->prog->arb.NumTemporaries); nir_register *reg; - for (unsigned i = 0; i < c->prog->NumTemporaries; i++) { + for (unsigned i = 0; i < c->prog->arb.NumTemporaries; i++) { reg = nir_local_reg_create(b->impl); if (!reg) { c->error = true; @@ -1017,6 +1017,12 @@ c->prog = prog; nir_builder_init_simple_shader(&c->build, NULL, stage, options); + + /* Use the shader_info from gl_program rather than the one nir_builder + * created for us. nir_sweep should clean up the other one for us. + */ + c->build.shader->info = (shader_info *) &prog->info; + s = c->build.shader; if (prog->Parameters->NumParameters > 0) { @@ -1033,8 +1039,8 @@ if (unlikely(c->error)) goto fail; - for (unsigned int i = 0; i < prog->NumInstructions; i++) { - ptn_emit_instruction(c, &prog->Instructions[i]); + for (unsigned int i = 0; i < prog->arb.NumInstructions; i++) { + ptn_emit_instruction(c, &prog->arb.Instructions[i]); if (unlikely(c->error)) break; @@ -1042,24 +1048,16 @@ ptn_add_output_stores(c); - s->info.name = ralloc_asprintf(s, "ARB%d", prog->Id); - s->info.num_textures = _mesa_fls(prog->SamplersUsed); - s->info.num_ubos = 0; - s->info.num_abos = 0; - s->info.num_ssbos = 0; - s->info.num_images = 0; - s->info.inputs_read = prog->InputsRead; - s->info.outputs_written = prog->OutputsWritten; - s->info.system_values_read = prog->SystemValuesRead; - s->info.uses_texture_gather = false; - s->info.uses_clip_distance_out = false; - s->info.separate_shader = false; - - if (stage == MESA_SHADER_FRAGMENT) { - struct gl_fragment_program *fp = (struct gl_fragment_program *)prog; - - s->info.fs.uses_discard = fp->UsesKill; - } + s->info->name = ralloc_asprintf(s, "ARB%d", prog->Id); + s->info->num_textures = util_last_bit(prog->SamplersUsed); + s->info->num_ubos = 0; + s->info->num_abos = 0; + s->info->num_ssbos = 0; + s->info->num_images = 0; + s->info->uses_texture_gather = false; + s->info->clip_distance_array_size = 0; + s->info->cull_distance_array_size = 0; + s->info->separate_shader = false; fail: if (c->error) { diff -Nru mesa-12.0.6/src/mesa/program/string_to_uint_map.cpp mesa-17.0.7/src/mesa/program/string_to_uint_map.cpp --- mesa-12.0.6/src/mesa/program/string_to_uint_map.cpp 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/string_to_uint_map.cpp 1970-01-01 00:00:00.000000000 +0000 @@ -1,42 +0,0 @@ -/* - * Copyright © 2011 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -/** - * \file string_to_uint_map.cpp - * \brief Dumb wrapprs so that C code can create and destroy maps. - * - * \author Ian Romanick - */ -#include "hash_table.h" - -extern "C" struct string_to_uint_map * -string_to_uint_map_ctor() -{ - return new string_to_uint_map; -} - -extern "C" void -string_to_uint_map_dtor(struct string_to_uint_map *map) -{ - delete map; -} diff -Nru mesa-12.0.6/src/mesa/program/symbol_table.c mesa-17.0.7/src/mesa/program/symbol_table.c --- mesa-12.0.6/src/mesa/program/symbol_table.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/symbol_table.c 2017-06-01 10:37:10.000000000 +0000 @@ -23,9 +23,12 @@ #include "main/imports.h" #include "symbol_table.h" -#include "hash_table.h" +#include "../../util/hash_table.h" struct symbol { + /** Symbol name. */ + char *name; + /** * Link to the next symbol in the table with the same name * @@ -34,7 +37,6 @@ */ struct symbol *next_with_same_name; - /** * Link to the next symbol in the table with the same scope * @@ -43,21 +45,6 @@ */ struct symbol *next_with_same_scope; - - /** - * Header information for the list of symbols with the same name. - */ - struct symbol_header *hdr; - - - /** - * Name space of the symbol - * - * Name space are arbitrary user assigned integers. No two symbols can - * exist in the same name space at the same scope level. - */ - int name_space; - /** Scope depth where this symbol was defined. */ unsigned depth; @@ -69,20 +56,6 @@ /** - */ -struct symbol_header { - /** Linkage in list of all headers in a given symbol table. */ - struct symbol_header *next; - - /** Symbol name. */ - char *name; - - /** Linked list of symbols with the same name. */ - struct symbol *symbols; -}; - - -/** * Element of the scope stack. */ struct scope_level { @@ -104,41 +77,10 @@ /** Top of scope stack. */ struct scope_level *current_scope; - /** List of all symbol headers in the table. */ - struct symbol_header *hdr; - /** Current scope depth. */ unsigned depth; }; - -static void -check_symbol_table(struct _mesa_symbol_table *table) -{ -#if !defined(NDEBUG) - struct scope_level *scope; - - for (scope = table->current_scope; scope != NULL; scope = scope->next) { - struct symbol *sym; - - for (sym = scope->symbols - ; sym != NULL - ; sym = sym->next_with_same_name) { - const struct symbol_header *const hdr = sym->hdr; - struct symbol *sym2; - - for (sym2 = hdr->symbols - ; sym2 != NULL - ; sym2 = sym2->next_with_same_name) { - assert(sym2->hdr == hdr); - } - } - } -#else - (void) table; -#endif /* !defined(NDEBUG) */ -} - void _mesa_symbol_table_pop_scope(struct _mesa_symbol_table *table) { @@ -152,18 +94,22 @@ while (sym != NULL) { struct symbol *const next = sym->next_with_same_scope; - struct symbol_header *const hdr = sym->hdr; - - assert(hdr->symbols == sym); - - hdr->symbols = sym->next_with_same_name; + struct hash_entry *hte = _mesa_hash_table_search(table->ht, + sym->name); + if (sym->next_with_same_name) { + /* If there is a symbol with this name in an outer scope update + * the hash table to point to it. + */ + hte->key = sym->next_with_same_name->name; + hte->data = sym->next_with_same_name; + } else { + _mesa_hash_table_remove(table->ht, hte); + free(sym->name); + } free(sym); - sym = next; } - - check_symbol_table(table); } @@ -171,7 +117,6 @@ _mesa_symbol_table_push_scope(struct _mesa_symbol_table *table) { struct scope_level *const scope = calloc(1, sizeof(*scope)); - if (scope == NULL) { _mesa_error_no_memory(__func__); return; @@ -183,10 +128,11 @@ } -static struct symbol_header * +static struct symbol * find_symbol(struct _mesa_symbol_table *table, const char *name) { - return (struct symbol_header *) hash_table_find(table->ht, name); + struct hash_entry *entry = _mesa_hash_table_search(table->ht, name); + return entry ? (struct symbol *) entry->data : NULL; } @@ -200,200 +146,140 @@ */ int _mesa_symbol_table_symbol_scope(struct _mesa_symbol_table *table, - int name_space, const char *name) + const char *name) { - struct symbol_header *const hdr = find_symbol(table, name); - struct symbol *sym; + struct symbol *const sym = find_symbol(table, name); - if (hdr != NULL) { - for (sym = hdr->symbols; sym != NULL; sym = sym->next_with_same_name) { - assert(sym->hdr == hdr); - - if ((name_space == -1) || (sym->name_space == name_space)) { - assert(sym->depth <= table->depth); - return sym->depth - table->depth; - } - } - } + if (sym) { + assert(sym->depth <= table->depth); + return sym->depth - table->depth; + } - return -1; + return -1; } void * _mesa_symbol_table_find_symbol(struct _mesa_symbol_table *table, - int name_space, const char *name) + const char *name) { - struct symbol_header *const hdr = find_symbol(table, name); - - if (hdr != NULL) { - struct symbol *sym; - - - for (sym = hdr->symbols; sym != NULL; sym = sym->next_with_same_name) { - assert(sym->hdr == hdr); - - if ((name_space == -1) || (sym->name_space == name_space)) { - return sym->data; - } - } - } + struct symbol *const sym = find_symbol(table, name); + if (sym) + return sym->data; - return NULL; + return NULL; } int _mesa_symbol_table_add_symbol(struct _mesa_symbol_table *table, - int name_space, const char *name, - void *declaration) + const char *name, void *declaration) { - struct symbol_header *hdr; - struct symbol *sym; + struct symbol *new_sym; + struct symbol *sym = find_symbol(table, name); - check_symbol_table(table); + if (sym && sym->depth == table->depth) + return -1; - hdr = find_symbol(table, name); + new_sym = calloc(1, sizeof(*sym)); + if (new_sym == NULL) { + _mesa_error_no_memory(__func__); + return -1; + } - check_symbol_table(table); + if (sym) { + /* Store link to symbol in outer scope with the same name */ + new_sym->next_with_same_name = sym; + new_sym->name = sym->name; + } else { + new_sym->name = strdup(name); + if (new_sym->name == NULL) { + free(new_sym); + _mesa_error_no_memory(__func__); + return -1; + } + } - if (hdr == NULL) { - hdr = calloc(1, sizeof(*hdr)); - if (hdr == NULL) { - _mesa_error_no_memory(__func__); - return -1; - } - - hdr->name = strdup(name); - if (hdr->name == NULL) { - free(hdr); - _mesa_error_no_memory(__func__); - return -1; - } - - hash_table_insert(table->ht, hdr, hdr->name); - hdr->next = table->hdr; - table->hdr = hdr; - } + new_sym->next_with_same_scope = table->current_scope->symbols; + new_sym->data = declaration; + new_sym->depth = table->depth; - check_symbol_table(table); + table->current_scope->symbols = new_sym; - /* If the symbol already exists in this namespace at this scope, it cannot - * be added to the table. - */ - for (sym = hdr->symbols - ; (sym != NULL) && (sym->name_space != name_space) - ; sym = sym->next_with_same_name) { - /* empty */ - } + _mesa_hash_table_insert(table->ht, new_sym->name, new_sym); - if (sym && (sym->depth == table->depth)) - return -1; + return 0; +} - sym = calloc(1, sizeof(*sym)); - if (sym == NULL) { - _mesa_error_no_memory(__func__); +int +_mesa_symbol_table_replace_symbol(struct _mesa_symbol_table *table, + const char *name, + void *declaration) +{ + struct symbol *sym = find_symbol(table, name); + + /* If the symbol doesn't exist, it cannot be replaced. */ + if (sym == NULL) return -1; - } - sym->next_with_same_name = hdr->symbols; - sym->next_with_same_scope = table->current_scope->symbols; - sym->hdr = hdr; - sym->name_space = name_space; sym->data = declaration; - sym->depth = table->depth; - - assert(sym->hdr == hdr); - - hdr->symbols = sym; - table->current_scope->symbols = sym; - - check_symbol_table(table); return 0; } - int _mesa_symbol_table_add_global_symbol(struct _mesa_symbol_table *table, - int name_space, const char *name, - void *declaration) + const char *name, void *declaration) { - struct symbol_header *hdr; - struct symbol *sym; - struct symbol *curr; - struct scope_level *top_scope; - - check_symbol_table(table); - - hdr = find_symbol(table, name); - - check_symbol_table(table); - - if (hdr == NULL) { - hdr = calloc(1, sizeof(*hdr)); - if (hdr == NULL) { - _mesa_error_no_memory(__func__); - return -1; - } - - hdr->name = strdup(name); + struct scope_level *top_scope; + struct symbol *inner_sym = NULL; + struct symbol *sym = find_symbol(table, name); + + while (sym) { + if (sym->depth == 0) + return -1; - hash_table_insert(table->ht, hdr, hdr->name); - hdr->next = table->hdr; - table->hdr = hdr; - } - - check_symbol_table(table); + inner_sym = sym; - /* If the symbol already exists in this namespace at this scope, it cannot - * be added to the table. - */ - for (sym = hdr->symbols - ; (sym != NULL) && (sym->name_space != name_space) - ; sym = sym->next_with_same_name) { - /* empty */ - } + /* Get symbol from the outer scope with the same name */ + sym = sym->next_with_same_name; + } - if (sym && sym->depth == 0) - return -1; + /* Find the top-level scope */ + for (top_scope = table->current_scope; top_scope->next != NULL; + top_scope = top_scope->next) { + /* empty */ + } - /* Find the top-level scope */ - for (top_scope = table->current_scope - ; top_scope->next != NULL - ; top_scope = top_scope->next) { - /* empty */ - } + sym = calloc(1, sizeof(*sym)); + if (sym == NULL) { + _mesa_error_no_memory(__func__); + return -1; + } - sym = calloc(1, sizeof(*sym)); - if (sym == NULL) { - _mesa_error_no_memory(__func__); - return -1; - } + if (inner_sym) { + /* In case we add the global out of order store a link to the global + * symbol in global. + */ + inner_sym->next_with_same_name = sym; + + sym->name = inner_sym->name; + } else { + sym->name = strdup(name); + if (sym->name == NULL) { + free(sym); + _mesa_error_no_memory(__func__); + return -1; + } + } - sym->next_with_same_scope = top_scope->symbols; - sym->hdr = hdr; - sym->name_space = name_space; - sym->data = declaration; + sym->next_with_same_scope = top_scope->symbols; + sym->data = declaration; - assert(sym->hdr == hdr); + top_scope->symbols = sym; - /* Since next_with_same_name is ordered by scope, we need to append the - * new symbol to the _end_ of the list. - */ - if (hdr->symbols == NULL) { - hdr->symbols = sym; - } else { - for (curr = hdr->symbols - ; curr->next_with_same_name != NULL - ; curr = curr->next_with_same_name) { - /* empty */ - } - curr->next_with_same_name = sym; - } - top_scope->symbols = sym; + _mesa_hash_table_insert(table->ht, sym->name, sym); - check_symbol_table(table); - return 0; + return 0; } @@ -404,8 +290,8 @@ struct _mesa_symbol_table *table = calloc(1, sizeof(*table)); if (table != NULL) { - table->ht = hash_table_ctor(32, hash_table_string_hash, - hash_table_string_compare); + table->ht = _mesa_hash_table_create(NULL, _mesa_key_hash_string, + _mesa_key_string_equal); _mesa_symbol_table_push_scope(table); } @@ -417,19 +303,10 @@ void _mesa_symbol_table_dtor(struct _mesa_symbol_table *table) { - struct symbol_header *hdr; - struct symbol_header *next; - while (table->current_scope != NULL) { _mesa_symbol_table_pop_scope(table); } - for (hdr = table->hdr; hdr != NULL; hdr = next) { - next = hdr->next; - free(hdr->name); - free(hdr); - } - - hash_table_dtor(table->ht); + _mesa_hash_table_destroy(table->ht, NULL); free(table); } diff -Nru mesa-12.0.6/src/mesa/program/symbol_table.h mesa-17.0.7/src/mesa/program/symbol_table.h --- mesa-12.0.6/src/mesa/program/symbol_table.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/program/symbol_table.h 2017-06-01 10:37:10.000000000 +0000 @@ -30,17 +30,22 @@ extern void _mesa_symbol_table_pop_scope(struct _mesa_symbol_table *table); extern int _mesa_symbol_table_add_symbol(struct _mesa_symbol_table *symtab, - int name_space, const char *name, void *declaration); + const char *name, void *declaration); -extern int _mesa_symbol_table_add_global_symbol( - struct _mesa_symbol_table *symtab, int name_space, const char *name, - void *declaration); +extern int _mesa_symbol_table_replace_symbol(struct _mesa_symbol_table *table, + const char *name, + void *declaration); + +extern int +_mesa_symbol_table_add_global_symbol(struct _mesa_symbol_table *symtab, + const char *name, + void *declaration); extern int _mesa_symbol_table_symbol_scope(struct _mesa_symbol_table *table, - int name_space, const char *name); + const char *name); -extern void *_mesa_symbol_table_find_symbol( - struct _mesa_symbol_table *symtab, int name_space, const char *name); +extern void *_mesa_symbol_table_find_symbol(struct _mesa_symbol_table *symtab, + const char *name); extern struct _mesa_symbol_table *_mesa_symbol_table_ctor(void); diff -Nru mesa-12.0.6/src/mesa/SConscript mesa-17.0.7/src/mesa/SConscript --- mesa-12.0.6/src/mesa/SConscript 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/mesa/SConscript 2017-06-01 10:37:10.000000000 +0000 @@ -3,9 +3,6 @@ Import('*') -import filecmp -import os -import subprocess from sys import executable as python_cmd env = env.Clone() @@ -14,12 +11,14 @@ env.Append(CPPPATH = [ '../compiler/nir', # for generated nir_opcodes.h, etc + '../compiler/glsl', # for generated headers '#/src', Dir('../mapi'), # src/mapi build path '#/src/mapi', - '#/src/glsl', Dir('.'), # src/mesa build path '#/src/mesa', + Dir('main'), # src/mesa/main/ build path + '#/src/mesa/main', '#/src/gallium/include', '#/src/gallium/auxiliary', ]) @@ -55,7 +54,7 @@ get_hash_header = env.CodeGenerate( target = 'main/get_hash.h', script = 'main/get_hash_generator.py', - source = GLAPI + 'gen/gl_and_es_API.xml', + source = [GLAPI + 'gen/gl_and_es_API.xml'] + env.Glob(GLAPI + 'gen/*.xml'), command = python_cmd + ' $SCRIPT ' + ' -f $SOURCE > $TARGET' ) @@ -119,46 +118,6 @@ env.Prepend(CPPPATH = [matypes[0].dir]) -def write_git_sha1_h_file(filename): - """Mesa looks for a git_sha1.h file at compile time in order to display - the current git hash id in the GL_VERSION string. This function tries - to retrieve the git hashid and write the header file. An empty file - will be created if anything goes wrong.""" - - args = [ 'git', 'log', '-n', '1', '--oneline' ] - try: - (commit, foo) = subprocess.Popen(args, stdout=subprocess.PIPE).communicate() - except: - # git log command didn't work - if not os.path.exists(filename): - dirname = os.path.dirname(filename) - if not os.path.exists(dirname): - os.makedirs(dirname) - # create an empty file if none already exists - f = open(filename, "w") - f.close() - return - - commit = '#define MESA_GIT_SHA1 "git-%s"\n' % commit[0:7] - tempfile = "git_sha1.h.tmp" - f = open(tempfile, "w") - f.write(commit) - f.close() - if not os.path.exists(filename) or not filecmp.cmp(tempfile, filename): - # The filename does not exist or it's different from the new file, - # so replace old file with new. - if os.path.exists(filename): - os.remove(filename) - os.rename(tempfile, filename) - return - - -# Create the git_sha1.h header file -write_git_sha1_h_file("main/git_sha1.h") -# and update CPPPATH so the git_sha1.h header can be found -env.Append(CPPPATH = ["#" + env['build_dir'] + "/mesa/main"]) - - # # Libraries # diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_atifs_to_tgsi.c mesa-17.0.7/src/mesa/state_tracker/st_atifs_to_tgsi.c --- mesa-12.0.6/src/mesa/state_tracker/st_atifs_to_tgsi.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_atifs_to_tgsi.c 2017-06-01 10:37:10.000000000 +0000 @@ -66,7 +66,7 @@ {TGSI_OPCODE_NOP, "UND", 0}, /* unused */ {TGSI_OPCODE_ADD, "ADD", 2}, {TGSI_OPCODE_MUL, "MUL", 2}, - {TGSI_OPCODE_SUB, "SUB", 2}, + {TGSI_OPCODE_NOP, "SUB", 2}, {TGSI_OPCODE_DP3, "DOT3", 2}, {TGSI_OPCODE_DP4, "DOT4", 2}, {TGSI_OPCODE_MAD, "MAD", 3}, @@ -175,16 +175,16 @@ if (srcReg->argMod & GL_COMP_BIT_ATI) { struct ureg_src modsrc[2]; modsrc[0] = ureg_imm1f(t->ureg, 1.0f); - modsrc[1] = ureg_src(arg); + modsrc[1] = ureg_negate(ureg_src(arg)); - ureg_insn(t->ureg, TGSI_OPCODE_SUB, &arg, 1, modsrc, 2); + ureg_insn(t->ureg, TGSI_OPCODE_ADD, &arg, 1, modsrc, 2); } if (srcReg->argMod & GL_BIAS_BIT_ATI) { struct ureg_src modsrc[2]; modsrc[0] = ureg_src(arg); - modsrc[1] = ureg_imm1f(t->ureg, 0.5f); + modsrc[1] = ureg_imm1f(t->ureg, -0.5f); - ureg_insn(t->ureg, TGSI_OPCODE_SUB, &arg, 1, modsrc, 2); + ureg_insn(t->ureg, TGSI_OPCODE_ADD, &arg, 1, modsrc, 2); } if (srcReg->argMod & GL_2X_BIT_ATI) { struct ureg_src modsrc[2]; @@ -211,11 +211,13 @@ struct ureg_dst tmp[1]; struct ureg_src src[3]; - if (!strcmp(desc->name, "CND")) { + if (!strcmp(desc->name, "SUB")) { + ureg_ADD(t->ureg, *dst, args[0], ureg_negate(args[1])); + } else if (!strcmp(desc->name, "CND")) { tmp[0] = get_temp(t, MAX_NUM_FRAGMENT_REGISTERS_ATI + 2); /* re-purpose a3 */ src[0] = ureg_imm1f(t->ureg, 0.5f); - src[1] = args[2]; - ureg_insn(t->ureg, TGSI_OPCODE_SUB, tmp, 1, src, 2); + src[1] = ureg_negate(args[2]); + ureg_insn(t->ureg, TGSI_OPCODE_ADD, tmp, 1, src, 2); src[0] = ureg_src(tmp[0]); src[1] = args[0]; src[2] = args[1]; @@ -547,12 +549,12 @@ static const gl_state_index fog_color[STATE_LENGTH] = {STATE_FOG_COLOR, 0, 0, 0, 0}; - prog->InputsRead = 0; - prog->OutputsWritten = BITFIELD64_BIT(FRAG_RESULT_COLOR); + prog->info.inputs_read = 0; + prog->info.outputs_written = BITFIELD64_BIT(FRAG_RESULT_COLOR); prog->SamplersUsed = 0; prog->Parameters = _mesa_new_parameter_list(); - /* fill in InputsRead, SamplersUsed, TexturesUsed */ + /* fill in inputs_read, SamplersUsed, TexturesUsed */ for (pass = 0; pass < atifs->NumPasses; pass++) { for (r = 0; r < MAX_NUM_FRAGMENT_REGISTERS_ATI; r++) { struct atifs_setupinst *texinst = &atifs->SetupInst[pass][r]; @@ -560,14 +562,14 @@ if (texinst->Opcode == ATI_FRAGMENT_SHADER_SAMPLE_OP) { /* mark which texcoords are used */ - prog->InputsRead |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + pass_tex - GL_TEXTURE0_ARB); + prog->info.inputs_read |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + pass_tex - GL_TEXTURE0_ARB); /* by default there is 1:1 mapping between samplers and textures */ prog->SamplersUsed |= (1 << r); /* the target is unknown here, it will be fixed in the draw call */ prog->TexturesUsed[r] = TEXTURE_2D_BIT; } else if (texinst->Opcode == ATI_FRAGMENT_SHADER_PASS_OP) { if (pass_tex >= GL_TEXTURE0_ARB && pass_tex <= GL_TEXTURE7_ARB) { - prog->InputsRead |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + pass_tex - GL_TEXTURE0_ARB); + prog->info.inputs_read |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + pass_tex - GL_TEXTURE0_ARB); } } } @@ -581,12 +583,12 @@ for (arg = 0; arg < inst->ArgCount[optype]; arg++) { GLint index = inst->SrcReg[optype][arg].Index; if (index == GL_PRIMARY_COLOR_EXT) { - prog->InputsRead |= BITFIELD64_BIT(VARYING_SLOT_COL0); + prog->info.inputs_read |= BITFIELD64_BIT(VARYING_SLOT_COL0); } else if (index == GL_SECONDARY_INTERPOLATOR_ATI) { /* note: ATI_fragment_shader.txt never specifies what * GL_SECONDARY_INTERPOLATOR_ATI is, swrast uses * VARYING_SLOT_COL1 for this input */ - prog->InputsRead |= BITFIELD64_BIT(VARYING_SLOT_COL1); + prog->info.inputs_read |= BITFIELD64_BIT(VARYING_SLOT_COL1); } } } @@ -594,7 +596,7 @@ } } /* we may need fog */ - prog->InputsRead |= BITFIELD64_BIT(VARYING_SLOT_FOGC); + prog->info.inputs_read |= BITFIELD64_BIT(VARYING_SLOT_FOGC); /* we always have the ATI_fs constants, and the fog params */ for (i = 0; i < MAX_NUM_FRAGMENT_CONSTANTS_ATI; i++) { @@ -604,9 +606,9 @@ _mesa_add_state_reference(prog->Parameters, fog_params_state); _mesa_add_state_reference(prog->Parameters, fog_color); - prog->NumInstructions = 0; - prog->NumTemporaries = MAX_NUM_FRAGMENT_REGISTERS_ATI + 3; /* 3 input temps for arith ops */ - prog->NumParameters = MAX_NUM_FRAGMENT_CONSTANTS_ATI + 2; /* 2 state variables for fog */ + prog->arb.NumInstructions = 0; + prog->arb.NumTemporaries = MAX_NUM_FRAGMENT_REGISTERS_ATI + 3; /* 3 input temps for arith ops */ + prog->arb.NumParameters = MAX_NUM_FRAGMENT_CONSTANTS_ATI + 2; /* 2 state variables for fog */ } @@ -691,6 +693,7 @@ struct tgsi_full_instruction inst; unsigned i; int fogc_index = -1; + int reg0_index = current_inst->Src[0].Register.Index; /* find FOGC input */ for (i = 0; i < ctx->info.num_inputs; i++) { @@ -804,11 +807,11 @@ inst.Instruction.Opcode = TGSI_OPCODE_LRP; inst.Instruction.NumDstRegs = 1; inst.Dst[0].Register.File = TGSI_FILE_TEMPORARY; - inst.Dst[0].Register.Index = 0; + inst.Dst[0].Register.Index = reg0_index; inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZW; inst.Instruction.NumSrcRegs = 3; SET_SRC(&inst, 0, TGSI_FILE_TEMPORARY, ctx->fog_factor_temp, X, X, X, Y); - SET_SRC(&inst, 1, TGSI_FILE_TEMPORARY, 0, X, Y, Z, W); + SET_SRC(&inst, 1, TGSI_FILE_TEMPORARY, reg0_index, X, Y, Z, W); SET_SRC(&inst, 2, TGSI_FILE_CONSTANT, MAX_NUM_FRAGMENT_CONSTANTS_ATI + 1, X, Y, Z, W); tctx->emit_instruction(tctx, &inst); } diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_atom_array.c mesa-17.0.7/src/mesa/state_tracker/st_atom_array.c --- mesa-12.0.6/src/mesa/state_tracker/st_atom_array.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_atom_array.c 2017-06-01 10:37:10.000000000 +0000 @@ -212,6 +212,7 @@ { assert((type >= GL_BYTE && type <= GL_DOUBLE) || type == GL_FIXED || type == GL_HALF_FLOAT || + type == GL_HALF_FLOAT_OES || type == GL_INT_2_10_10_10_REV || type == GL_UNSIGNED_INT_2_10_10_10_REV || type == GL_UNSIGNED_INT_10F_11F_11F_REV); @@ -281,7 +282,8 @@ switch (type) { case GL_DOUBLE: return double_types[size-1]; case GL_FLOAT: return float_types[size-1]; - case GL_HALF_FLOAT: return half_float_types[size-1]; + case GL_HALF_FLOAT: + case GL_HALF_FLOAT_OES: return half_float_types[size-1]; case GL_INT: return int_types_norm[size-1]; case GL_SHORT: return short_types_norm[size-1]; case GL_BYTE: return byte_types_norm[size-1]; @@ -296,7 +298,8 @@ switch (type) { case GL_DOUBLE: return double_types[size-1]; case GL_FLOAT: return float_types[size-1]; - case GL_HALF_FLOAT: return half_float_types[size-1]; + case GL_HALF_FLOAT: + case GL_HALF_FLOAT_OES: return half_float_types[size-1]; case GL_INT: return int_types_scale[size-1]; case GL_SHORT: return short_types_scale[size-1]; case GL_BYTE: return byte_types_scale[size-1]; @@ -310,9 +313,9 @@ return PIPE_FORMAT_NONE; /* silence compiler warning */ } -static const struct gl_client_array * +static const struct gl_vertex_array * get_client_array(const struct st_vertex_program *vp, - const struct gl_client_array **arrays, + const struct gl_vertex_array **arrays, int attr) { const GLuint mesaAttr = vp->index_to_input[attr]; @@ -329,7 +332,7 @@ static GLboolean is_interleaved_arrays(const struct st_vertex_program *vp, const struct st_vp_variant *vpv, - const struct gl_client_array **arrays) + const struct gl_vertex_array **arrays) { GLuint attr; const struct gl_buffer_object *firstBufObj = NULL; @@ -338,7 +341,7 @@ GLboolean userSpaceBuffer = GL_FALSE; for (attr = 0; attr < vpv->num_inputs; attr++) { - const struct gl_client_array *array; + const struct gl_vertex_array *array; const struct gl_buffer_object *bufObj; GLsizei stride; @@ -363,7 +366,7 @@ if (bufObj != firstBufObj) return GL_FALSE; /* arrays in different VBOs */ - if (abs(array->Ptr - firstPtr) > firstStride) + if (llabs(array->Ptr - firstPtr) > firstStride) return GL_FALSE; /* arrays start too far apart */ if ((!_mesa_is_bufferobj(bufObj)) != userSpaceBuffer) @@ -444,7 +447,7 @@ setup_interleaved_attribs(struct st_context *st, const struct st_vertex_program *vp, const struct st_vp_variant *vpv, - const struct gl_client_array **arrays, + const struct gl_vertex_array **arrays, struct pipe_vertex_buffer *vbuffer, struct pipe_vertex_element velements[]) { @@ -458,7 +461,7 @@ * Init bufobj and stride. */ if (vpv->num_inputs) { - const struct gl_client_array *array; + const struct gl_vertex_array *array; array = get_client_array(vp, arrays, 0); assert(array); @@ -492,7 +495,7 @@ usingVBO = _mesa_is_bufferobj(bufobj); for (attr = 0; attr < vpv->num_inputs;) { - const struct gl_client_array *array; + const struct gl_vertex_array *array; unsigned src_offset; unsigned src_format; @@ -557,7 +560,7 @@ setup_non_interleaved_attribs(struct st_context *st, const struct st_vertex_program *vp, const struct st_vp_variant *vpv, - const struct gl_client_array **arrays, + const struct gl_vertex_array **arrays, struct pipe_vertex_buffer vbuffer[], struct pipe_vertex_element velements[], unsigned *num_vbuffers) @@ -569,7 +572,7 @@ for (attr = 0; attr < vpv->num_inputs;) { const GLuint mesaAttr = vp->index_to_input[attr]; - const struct gl_client_array *array; + const struct gl_vertex_array *array; struct gl_buffer_object *bufobj; GLsizei stride; unsigned src_format; @@ -587,7 +590,7 @@ if (_mesa_is_bufferobj(bufobj)) { /* Attribute data is in a VBO. - * Recall that for VBOs, the gl_client_array->Ptr field is + * Recall that for VBOs, the gl_vertex_array->Ptr field is * really an offset from the start of the VBO, not a pointer. */ struct st_buffer_object *stobj = st_buffer_object(bufobj); @@ -640,7 +643,7 @@ static void update_array(struct st_context *st) { struct gl_context *ctx = st->ctx; - const struct gl_client_array **arrays = ctx->Array._DrawArrays; + const struct gl_vertex_array **arrays = ctx->Array._DrawArrays; const struct st_vertex_program *vp; const struct st_vp_variant *vpv; struct pipe_vertex_buffer vbuffer[PIPE_MAX_SHADER_INPUTS]; @@ -692,10 +695,5 @@ const struct st_tracked_state st_update_array = { - "st_update_array", /* name */ - { /* dirty */ - _NEW_CURRENT_ATTRIB, /* mesa */ - ST_NEW_VERTEX_ARRAYS | ST_NEW_VERTEX_PROGRAM, /* st */ - }, update_array /* update */ }; diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_atom_atomicbuf.c mesa-17.0.7/src/mesa/state_tracker/st_atom_atomicbuf.c --- mesa-12.0.6/src/mesa/state_tracker/st_atom_atomicbuf.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_atom_atomicbuf.c 2017-06-01 10:37:10.000000000 +0000 @@ -43,15 +43,15 @@ static void st_bind_atomics(struct st_context *st, struct gl_shader_program *prog, - unsigned shader_type) + enum pipe_shader_type shader_type) { unsigned i; if (!prog || !st->pipe->set_shader_buffers) return; - for (i = 0; i < prog->NumAtomicBuffers; i++) { - struct gl_active_atomic_buffer *atomic = &prog->AtomicBuffers[i]; + for (i = 0; i < prog->data->NumAtomicBuffers; i++) { + struct gl_active_atomic_buffer *atomic = &prog->data->AtomicBuffers[i]; struct gl_atomic_buffer_binding *binding = &st->ctx->AtomicBufferBindings[atomic->Binding]; struct st_buffer_object *st_obj = @@ -79,11 +79,6 @@ } const struct st_tracked_state st_bind_vs_atomics = { - "st_bind_vs_atomics", - { - 0, - ST_NEW_VERTEX_PROGRAM | ST_NEW_ATOMIC_BUFFER, - }, bind_vs_atomics }; @@ -97,11 +92,6 @@ } const struct st_tracked_state st_bind_fs_atomics = { - "st_bind_fs_atomics", - { - 0, - ST_NEW_FRAGMENT_PROGRAM | ST_NEW_ATOMIC_BUFFER, - }, bind_fs_atomics }; @@ -115,11 +105,6 @@ } const struct st_tracked_state st_bind_gs_atomics = { - "st_bind_gs_atomics", - { - 0, - ST_NEW_GEOMETRY_PROGRAM | ST_NEW_ATOMIC_BUFFER, - }, bind_gs_atomics }; @@ -133,11 +118,6 @@ } const struct st_tracked_state st_bind_tcs_atomics = { - "st_bind_tcs_atomics", - { - 0, - ST_NEW_TESSCTRL_PROGRAM | ST_NEW_ATOMIC_BUFFER, - }, bind_tcs_atomics }; @@ -151,11 +131,6 @@ } const struct st_tracked_state st_bind_tes_atomics = { - "st_bind_tes_atomics", - { - 0, - ST_NEW_TESSEVAL_PROGRAM | ST_NEW_ATOMIC_BUFFER, - }, bind_tes_atomics }; @@ -169,10 +144,5 @@ } const struct st_tracked_state st_bind_cs_atomics = { - "st_bind_cs_atomics", - { - 0, - ST_NEW_COMPUTE_PROGRAM | ST_NEW_ATOMIC_BUFFER, - }, bind_cs_atomics }; diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_atom_blend.c mesa-17.0.7/src/mesa/state_tracker/st_atom_blend.c --- mesa-12.0.6/src/mesa/state_tracker/st_atom_blend.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_atom_blend.c 2017-06-01 10:37:10.000000000 +0000 @@ -205,7 +205,7 @@ blend->logicop_enable = 1; blend->logicop_func = translate_logicop(ctx->Color.LogicOp); } - else if (ctx->Color.BlendEnabled) { + else if (ctx->Color.BlendEnabled && !ctx->Color._AdvancedBlendMode) { /* blending enabled */ for (i = 0, j = 0; i < num_state; i++) { @@ -265,9 +265,12 @@ blend->dither = ctx->Color.DitherFlag; - if (ctx->Multisample.Enabled) { - /* unlike in gallium/d3d10 these operations are only performed - if msaa is enabled */ + if (ctx->Multisample.Enabled && + ctx->DrawBuffer->Visual.sampleBuffers > 0 && + !(ctx->DrawBuffer->_IntegerBuffers & 0x1)) { + /* Unlike in gallium/d3d10 these operations are only performed + * if both msaa is enabled and we have a multisample buffer. + */ blend->alpha_to_coverage = ctx->Multisample.SampleAlphaToCoverage; blend->alpha_to_one = ctx->Multisample.SampleAlphaToOne; } @@ -283,10 +286,5 @@ const struct st_tracked_state st_update_blend = { - "st_update_blend", /* name */ - { /* dirty */ - (_NEW_COLOR | _NEW_MULTISAMPLE), /* XXX _NEW_BLEND someday? */ /* mesa */ - 0, /* st */ - }, update_blend, /* update */ }; diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_atom.c mesa-17.0.7/src/mesa/state_tracker/st_atom.c --- mesa-12.0.6/src/mesa/state_tracker/st_atom.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_atom.c 2017-06-01 10:37:10.000000000 +0000 @@ -37,86 +37,18 @@ #include "st_manager.h" -/** - * This is used to initialize st->render_atoms[]. - */ -static const struct st_tracked_state *render_atoms[] = +/* The list state update functions. */ +static const struct st_tracked_state *atoms[] = { - &st_update_depth_stencil_alpha, - &st_update_clip, - - &st_update_fp, - &st_update_gp, - &st_update_tep, - &st_update_tcp, - &st_update_vp, - - &st_update_rasterizer, - &st_update_polygon_stipple, - &st_update_viewport, - &st_update_scissor, - &st_update_blend, - &st_update_vertex_texture, - &st_update_fragment_texture, - &st_update_geometry_texture, - &st_update_tessctrl_texture, - &st_update_tesseval_texture, - &st_update_sampler, /* depends on update_*_texture for swizzle */ - &st_bind_vs_images, - &st_bind_tcs_images, - &st_bind_tes_images, - &st_bind_gs_images, - &st_bind_fs_images, - &st_update_framebuffer, /* depends on update_*_texture and bind_*_images */ - &st_update_msaa, - &st_update_sample_shading, - &st_update_vs_constants, - &st_update_tcs_constants, - &st_update_tes_constants, - &st_update_gs_constants, - &st_update_fs_constants, - &st_bind_vs_ubos, - &st_bind_tcs_ubos, - &st_bind_tes_ubos, - &st_bind_fs_ubos, - &st_bind_gs_ubos, - &st_bind_vs_atomics, - &st_bind_tcs_atomics, - &st_bind_tes_atomics, - &st_bind_fs_atomics, - &st_bind_gs_atomics, - &st_bind_vs_ssbos, - &st_bind_tcs_ssbos, - &st_bind_tes_ssbos, - &st_bind_fs_ssbos, - &st_bind_gs_ssbos, - &st_update_pixel_transfer, - &st_update_tess, - - /* this must be done after the vertex program update */ - &st_update_array -}; - - -/** - * This is used to initialize st->compute_atoms[]. - */ -static const struct st_tracked_state *compute_atoms[] = -{ - &st_update_cp, - &st_update_compute_texture, - &st_update_sampler, /* depends on update_compute_texture for swizzle */ - &st_update_cs_constants, - &st_bind_cs_ubos, - &st_bind_cs_atomics, - &st_bind_cs_ssbos, - &st_bind_cs_images, +#define ST_STATE(FLAG, st_update) &st_update, +#include "st_atom_list.h" +#undef ST_STATE }; void st_init_atoms( struct st_context *st ) { - /* no-op */ + STATIC_ASSERT(ARRAY_SIZE(atoms) <= 64); } @@ -126,52 +58,71 @@ } - -static bool -check_state(const struct st_state_flags *a, const struct st_state_flags *b) -{ - return (a->mesa & b->mesa) || (a->st & b->st); -} - - -static void -accumulate_state(struct st_state_flags *a, const struct st_state_flags *b) -{ - a->mesa |= b->mesa; - a->st |= b->st; -} - - -static void -xor_states(struct st_state_flags *result, - const struct st_state_flags *a, - const struct st_state_flags *b) -{ - result->mesa = a->mesa ^ b->mesa; - result->st = a->st ^ b->st; -} - - /* Too complex to figure out, just check every time: */ static void check_program_state( struct st_context *st ) { struct gl_context *ctx = st->ctx; + struct st_vertex_program *old_vp = st->vp; + struct st_tessctrl_program *old_tcp = st->tcp; + struct st_tesseval_program *old_tep = st->tep; + struct st_geometry_program *old_gp = st->gp; + struct st_fragment_program *old_fp = st->fp; + + struct gl_program *new_vp = ctx->VertexProgram._Current; + struct gl_program *new_tcp = ctx->TessCtrlProgram._Current; + struct gl_program *new_tep = ctx->TessEvalProgram._Current; + struct gl_program *new_gp = ctx->GeometryProgram._Current; + struct gl_program *new_fp = ctx->FragmentProgram._Current; + uint64_t dirty = 0; + + /* Flag states used by both new and old shaders to unbind shader resources + * properly when transitioning to shaders that don't use them. + */ + if (unlikely(new_vp != &old_vp->Base)) { + if (old_vp) + dirty |= old_vp->affected_states; + if (new_vp) + dirty |= ST_NEW_VERTEX_PROGRAM(st, st_vertex_program(new_vp)); + } + + if (unlikely(new_tcp != &old_tcp->Base)) { + if (old_tcp) + dirty |= old_tcp->affected_states; + if (new_tcp) + dirty |= st_tessctrl_program(new_tcp)->affected_states; + } + + if (unlikely(new_tep != &old_tep->Base)) { + if (old_tep) + dirty |= old_tep->affected_states; + if (new_tep) + dirty |= st_tesseval_program(new_tep)->affected_states; + } + + if (unlikely(new_gp != &old_gp->Base)) { + if (old_gp) + dirty |= old_gp->affected_states; + if (new_gp) + dirty |= st_geometry_program(new_gp)->affected_states; + } + + if (unlikely(new_fp != &old_fp->Base)) { + if (old_fp) + dirty |= old_fp->affected_states; + if (new_fp) + dirty |= st_fragment_program(new_fp)->affected_states; + } - if (ctx->VertexProgram._Current != &st->vp->Base) - st->dirty.st |= ST_NEW_VERTEX_PROGRAM; - - if (ctx->FragmentProgram._Current != &st->fp->Base) - st->dirty.st |= ST_NEW_FRAGMENT_PROGRAM; - - if (ctx->GeometryProgram._Current != &st->gp->Base) - st->dirty.st |= ST_NEW_GEOMETRY_PROGRAM; + st->dirty |= dirty; + st->gfx_shaders_may_be_dirty = false; } static void check_attrib_edgeflag(struct st_context *st) { - const struct gl_client_array **arrays = st->ctx->Array._DrawArrays; + const struct gl_vertex_array **arrays = st->ctx->Array._DrawArrays; GLboolean vertdata_edgeflags, edgeflag_culls_prims, edgeflags_enabled; + struct gl_program *vp = st->ctx->VertexProgram._Current; if (!arrays) return; @@ -183,14 +134,15 @@ arrays[VERT_ATTRIB_EDGEFLAG]->StrideB != 0; if (vertdata_edgeflags != st->vertdata_edgeflags) { st->vertdata_edgeflags = vertdata_edgeflags; - st->dirty.st |= ST_NEW_VERTEX_PROGRAM; + if (vp) + st->dirty |= ST_NEW_VERTEX_PROGRAM(st, st_vertex_program(vp)); } edgeflag_culls_prims = edgeflags_enabled && !vertdata_edgeflags && !st->ctx->Current.Attrib[VERT_ATTRIB_EDGEFLAG][0]; if (edgeflag_culls_prims != st->edgeflag_culls_prims) { st->edgeflag_culls_prims = edgeflag_culls_prims; - st->dirty.st |= ST_NEW_RASTERIZER; + st->dirty |= ST_NEW_RASTERIZER; } } @@ -201,94 +153,73 @@ void st_validate_state( struct st_context *st, enum st_pipeline pipeline ) { - const struct st_tracked_state **atoms; - struct st_state_flags *state; - GLuint num_atoms; - GLuint i; + struct gl_context *ctx = st->ctx; + uint64_t dirty, pipeline_mask; + uint32_t dirty_lo, dirty_hi; + + /* Get Mesa driver state. + * + * Inactive states are shader states not used by shaders at the moment. + */ + st->dirty |= ctx->NewDriverState & st->active_states & ST_ALL_STATES_MASK; + ctx->NewDriverState = 0; /* Get pipeline state. */ switch (pipeline) { - case ST_PIPELINE_RENDER: - atoms = render_atoms; - num_atoms = ARRAY_SIZE(render_atoms); - state = &st->dirty; - break; - case ST_PIPELINE_COMPUTE: - atoms = compute_atoms; - num_atoms = ARRAY_SIZE(compute_atoms); - state = &st->dirty_cp; + case ST_PIPELINE_RENDER: + if (st->ctx->API == API_OPENGL_COMPAT) + check_attrib_edgeflag(st); + + check_program_state(st); + st_manager_validate_framebuffers(st); + + pipeline_mask = ST_PIPELINE_RENDER_STATE_MASK; break; - default: - unreachable("Invalid pipeline specified"); - } - /* Get Mesa driver state. */ - st->dirty.st |= st->ctx->NewDriverState; - st->dirty_cp.st |= st->ctx->NewDriverState; - st->ctx->NewDriverState = 0; + case ST_PIPELINE_COMPUTE: { + struct st_compute_program *old_cp = st->cp; + struct gl_program *new_cp = ctx->ComputeProgram._Current; + + if (new_cp != &old_cp->Base) { + if (old_cp) + st->dirty |= old_cp->affected_states; + assert(new_cp); + st->dirty |= st_compute_program(new_cp)->affected_states; + } - if (pipeline == ST_PIPELINE_RENDER) { - check_attrib_edgeflag(st); + st->compute_shader_may_be_dirty = false; - check_program_state(st); + /* + * We add the ST_NEW_FB_STATE bit here as well, because glBindFramebuffer + * acts as a barrier that breaks feedback loops between the framebuffer + * and textures bound to the framebuffer, even when those textures are + * accessed by compute shaders; so we must inform the driver of new + * framebuffer state. + */ + pipeline_mask = ST_PIPELINE_COMPUTE_STATE_MASK | ST_NEW_FB_STATE; + break; + } - st_manager_validate_framebuffers(st); + default: + unreachable("Invalid pipeline specified"); } - if (state->st == 0 && state->mesa == 0) + dirty = st->dirty & pipeline_mask; + if (!dirty) return; - /*printf("%s %x/%x\n", __func__, state->mesa, state->st);*/ + dirty_lo = dirty; + dirty_hi = dirty >> 32; -#ifdef DEBUG - if (1) { -#else - if (0) { -#endif - /* Debug version which enforces various sanity checks on the - * state flags which are generated and checked to help ensure - * state atoms are ordered correctly in the list. - */ - struct st_state_flags examined, prev; - memset(&examined, 0, sizeof(examined)); - prev = *state; - - for (i = 0; i < num_atoms; i++) { - const struct st_tracked_state *atom = atoms[i]; - struct st_state_flags generated; - - /*printf("atom %s %x/%x\n", atom->name, atom->dirty.mesa, atom->dirty.st);*/ - - if (!(atom->dirty.mesa || atom->dirty.st) || - !atom->update) { - printf("malformed atom %s\n", atom->name); - assert(0); - } - - if (check_state(state, &atom->dirty)) { - atoms[i]->update( st ); - /*printf("after: %x\n", atom->dirty.mesa);*/ - } - - accumulate_state(&examined, &atom->dirty); - - /* generated = (prev ^ state) - * if (examined & generated) - * fail; - */ - xor_states(&generated, &prev, state); - assert(!check_state(&examined, &generated)); - prev = *state; - } - /*printf("\n");*/ - - } - else { - for (i = 0; i < num_atoms; i++) { - if (check_state(state, &atoms[i]->dirty)) - atoms[i]->update( st ); - } - } + /* Update states. + * + * Don't use u_bit_scan64, it may be slower on 32-bit. + */ + while (dirty_lo) + atoms[u_bit_scan(&dirty_lo)]->update(st); + while (dirty_hi) + atoms[32 + u_bit_scan(&dirty_hi)]->update(st); - memset(state, 0, sizeof(*state)); + /* Clear the render or compute state bits. */ + st->dirty &= ~pipeline_mask; } diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_atom_clip.c mesa-17.0.7/src/mesa/state_tracker/st_atom_clip.c --- mesa-12.0.6/src/mesa/state_tracker/st_atom_clip.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_atom_clip.c 2017-06-01 10:37:10.000000000 +0000 @@ -71,10 +71,5 @@ const struct st_tracked_state st_update_clip = { - "st_update_clip", /* name */ - { /* dirty */ - _NEW_TRANSFORM | _NEW_PROJECTION, /* mesa */ - ST_NEW_VERTEX_PROGRAM, /* st */ - }, update_clip /* update */ }; diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_atom_constbuf.c mesa-17.0.7/src/mesa/state_tracker/st_atom_constbuf.c --- mesa-12.0.6/src/mesa/state_tracker/st_atom_constbuf.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_atom_constbuf.c 2017-06-01 10:37:10.000000000 +0000 @@ -34,7 +34,7 @@ #include "main/imports.h" #include "program/prog_parameter.h" #include "program/prog_print.h" - +#include "main/shaderapi.h" #include "pipe/p_context.h" #include "pipe/p_defines.h" #include "util/u_inlines.h" @@ -55,8 +55,10 @@ */ void st_upload_constants( struct st_context *st, struct gl_program_parameter_list *params, - unsigned shader_type) + gl_shader_stage stage) { + enum pipe_shader_type shader_type = st_shader_stage_to_ptarget(stage); + assert(shader_type == PIPE_SHADER_VERTEX || shader_type == PIPE_SHADER_FRAGMENT || shader_type == PIPE_SHADER_GEOMETRY || @@ -92,6 +94,8 @@ if (params->StateFlags) _mesa_load_state_parameters(st->ctx, params); + _mesa_shader_write_subroutine_indices(st->ctx, stage); + /* We always need to get a new buffer, to keep the drivers simple and * avoid gratuitous rendering synchronization. * Let's use a user buffer to avoid an unnecessary copy. @@ -138,18 +142,13 @@ static void update_vs_constants(struct st_context *st ) { struct st_vertex_program *vp = st->vp; - struct gl_program_parameter_list *params = vp->Base.Base.Parameters; + struct gl_program_parameter_list *params = vp->Base.Parameters; - st_upload_constants( st, params, PIPE_SHADER_VERTEX ); + st_upload_constants( st, params, MESA_SHADER_VERTEX ); } const struct st_tracked_state st_update_vs_constants = { - "st_update_vs_constants", /* name */ - { /* dirty */ - _NEW_PROGRAM_CONSTANTS, /* mesa */ - ST_NEW_VERTEX_PROGRAM, /* st */ - }, update_vs_constants /* update */ }; @@ -161,18 +160,13 @@ static void update_fs_constants(struct st_context *st ) { struct st_fragment_program *fp = st->fp; - struct gl_program_parameter_list *params = fp->Base.Base.Parameters; + struct gl_program_parameter_list *params = fp->Base.Parameters; - st_upload_constants( st, params, PIPE_SHADER_FRAGMENT ); + st_upload_constants( st, params, MESA_SHADER_FRAGMENT ); } const struct st_tracked_state st_update_fs_constants = { - "st_update_fs_constants", /* name */ - { /* dirty */ - _NEW_PROGRAM_CONSTANTS, /* mesa */ - ST_NEW_FRAGMENT_PROGRAM, /* st */ - }, update_fs_constants /* update */ }; @@ -184,17 +178,12 @@ struct gl_program_parameter_list *params; if (gp) { - params = gp->Base.Base.Parameters; - st_upload_constants( st, params, PIPE_SHADER_GEOMETRY ); + params = gp->Base.Parameters; + st_upload_constants( st, params, MESA_SHADER_GEOMETRY ); } } const struct st_tracked_state st_update_gs_constants = { - "st_update_gs_constants", /* name */ - { /* dirty */ - _NEW_PROGRAM_CONSTANTS, /* mesa */ - ST_NEW_GEOMETRY_PROGRAM, /* st */ - }, update_gs_constants /* update */ }; @@ -206,17 +195,12 @@ struct gl_program_parameter_list *params; if (tcp) { - params = tcp->Base.Base.Parameters; - st_upload_constants( st, params, PIPE_SHADER_TESS_CTRL ); + params = tcp->Base.Parameters; + st_upload_constants( st, params, MESA_SHADER_TESS_CTRL ); } } const struct st_tracked_state st_update_tcs_constants = { - "st_update_tcs_constants", /* name */ - { /* dirty */ - _NEW_PROGRAM_CONSTANTS, /* mesa */ - ST_NEW_TESSCTRL_PROGRAM, /* st */ - }, update_tcs_constants /* update */ }; @@ -228,17 +212,12 @@ struct gl_program_parameter_list *params; if (tep) { - params = tep->Base.Base.Parameters; - st_upload_constants( st, params, PIPE_SHADER_TESS_EVAL ); + params = tep->Base.Parameters; + st_upload_constants( st, params, MESA_SHADER_TESS_EVAL ); } } const struct st_tracked_state st_update_tes_constants = { - "st_update_tes_constants", /* name */ - { /* dirty */ - _NEW_PROGRAM_CONSTANTS, /* mesa */ - ST_NEW_TESSEVAL_PROGRAM, /* st */ - }, update_tes_constants /* update */ }; @@ -250,35 +229,30 @@ struct gl_program_parameter_list *params; if (cp) { - params = cp->Base.Base.Parameters; - st_upload_constants( st, params, PIPE_SHADER_COMPUTE ); + params = cp->Base.Parameters; + st_upload_constants( st, params, MESA_SHADER_COMPUTE ); } } const struct st_tracked_state st_update_cs_constants = { - "st_update_cs_constants", /* name */ - { /* dirty */ - _NEW_PROGRAM_CONSTANTS, /* mesa */ - ST_NEW_COMPUTE_PROGRAM, /* st */ - }, update_cs_constants /* update */ }; -static void st_bind_ubos(struct st_context *st, - struct gl_shader *shader, - unsigned shader_type) +static void st_bind_ubos(struct st_context *st, struct gl_program *prog, + unsigned shader_type) { unsigned i; struct pipe_constant_buffer cb = { 0 }; - if (!shader) + if (!prog) return; - for (i = 0; i < shader->NumUniformBlocks; i++) { + for (i = 0; i < prog->info.num_ubos; i++) { struct gl_uniform_buffer_binding *binding; struct st_buffer_object *st_obj; - binding = &st->ctx->UniformBufferBindings[shader->UniformBlocks[i]->Binding]; + binding = + &st->ctx->UniformBufferBindings[prog->sh.UniformBlocks[i]->Binding]; st_obj = st_buffer_object(binding->BufferObject); cb.buffer = st_obj->buffer; @@ -307,18 +281,13 @@ struct gl_shader_program *prog = st->ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX]; - if (!prog) + if (!prog || !prog->_LinkedShaders[MESA_SHADER_VERTEX]) return; - st_bind_ubos(st, prog->_LinkedShaders[MESA_SHADER_VERTEX], PIPE_SHADER_VERTEX); + st_bind_ubos(st, prog->_LinkedShaders[MESA_SHADER_VERTEX]->Program, PIPE_SHADER_VERTEX); } const struct st_tracked_state st_bind_vs_ubos = { - "st_bind_vs_ubos", - { - 0, - ST_NEW_VERTEX_PROGRAM | ST_NEW_UNIFORM_BUFFER, - }, bind_vs_ubos }; @@ -327,18 +296,13 @@ struct gl_shader_program *prog = st->ctx->_Shader->CurrentProgram[MESA_SHADER_FRAGMENT]; - if (!prog) + if (!prog || !prog->_LinkedShaders[MESA_SHADER_FRAGMENT]) return; - st_bind_ubos(st, prog->_LinkedShaders[MESA_SHADER_FRAGMENT], PIPE_SHADER_FRAGMENT); + st_bind_ubos(st, prog->_LinkedShaders[MESA_SHADER_FRAGMENT]->Program, PIPE_SHADER_FRAGMENT); } const struct st_tracked_state st_bind_fs_ubos = { - "st_bind_fs_ubos", - { - 0, - ST_NEW_FRAGMENT_PROGRAM | ST_NEW_UNIFORM_BUFFER, - }, bind_fs_ubos }; @@ -347,18 +311,13 @@ struct gl_shader_program *prog = st->ctx->_Shader->CurrentProgram[MESA_SHADER_GEOMETRY]; - if (!prog) + if (!prog || !prog->_LinkedShaders[MESA_SHADER_GEOMETRY]) return; - st_bind_ubos(st, prog->_LinkedShaders[MESA_SHADER_GEOMETRY], PIPE_SHADER_GEOMETRY); + st_bind_ubos(st, prog->_LinkedShaders[MESA_SHADER_GEOMETRY]->Program, PIPE_SHADER_GEOMETRY); } const struct st_tracked_state st_bind_gs_ubos = { - "st_bind_gs_ubos", - { - 0, - ST_NEW_GEOMETRY_PROGRAM | ST_NEW_UNIFORM_BUFFER, - }, bind_gs_ubos }; @@ -367,18 +326,13 @@ struct gl_shader_program *prog = st->ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_CTRL]; - if (!prog) + if (!prog || !prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]) return; - st_bind_ubos(st, prog->_LinkedShaders[MESA_SHADER_TESS_CTRL], PIPE_SHADER_TESS_CTRL); + st_bind_ubos(st, prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]->Program, PIPE_SHADER_TESS_CTRL); } const struct st_tracked_state st_bind_tcs_ubos = { - "st_bind_tcs_ubos", - { - 0, - ST_NEW_TESSCTRL_PROGRAM | ST_NEW_UNIFORM_BUFFER, - }, bind_tcs_ubos }; @@ -387,18 +341,13 @@ struct gl_shader_program *prog = st->ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_EVAL]; - if (!prog) + if (!prog || !prog->_LinkedShaders[MESA_SHADER_TESS_EVAL]) return; - st_bind_ubos(st, prog->_LinkedShaders[MESA_SHADER_TESS_EVAL], PIPE_SHADER_TESS_EVAL); + st_bind_ubos(st, prog->_LinkedShaders[MESA_SHADER_TESS_EVAL]->Program, PIPE_SHADER_TESS_EVAL); } const struct st_tracked_state st_bind_tes_ubos = { - "st_bind_tes_ubos", - { - 0, - ST_NEW_TESSEVAL_PROGRAM | ST_NEW_UNIFORM_BUFFER, - }, bind_tes_ubos }; @@ -407,18 +356,13 @@ struct gl_shader_program *prog = st->ctx->_Shader->CurrentProgram[MESA_SHADER_COMPUTE]; - if (!prog) + if (!prog || !prog->_LinkedShaders[MESA_SHADER_COMPUTE]) return; - st_bind_ubos(st, prog->_LinkedShaders[MESA_SHADER_COMPUTE], + st_bind_ubos(st, prog->_LinkedShaders[MESA_SHADER_COMPUTE]->Program, PIPE_SHADER_COMPUTE); } const struct st_tracked_state st_bind_cs_ubos = { - "st_bind_cs_ubos", - { - 0, - ST_NEW_COMPUTE_PROGRAM | ST_NEW_UNIFORM_BUFFER, - }, bind_cs_ubos }; diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_atom_constbuf.h mesa-17.0.7/src/mesa/state_tracker/st_atom_constbuf.h --- mesa-12.0.6/src/mesa/state_tracker/st_atom_constbuf.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_atom_constbuf.h 2017-06-01 10:37:10.000000000 +0000 @@ -29,13 +29,15 @@ #ifndef ST_ATOM_CONSTBUF_H #define ST_ATOM_CONSTBUF_H +#include "compiler/shader_enums.h" + struct gl_program_parameter_list; struct st_context; void st_upload_constants( struct st_context *st, struct gl_program_parameter_list *params, - unsigned id); + gl_shader_stage stage); #endif /* ST_ATOM_CONSTBUF_H */ diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_atom_depth.c mesa-17.0.7/src/mesa/state_tracker/st_atom_depth.c --- mesa-12.0.6/src/mesa/state_tracker/st_atom_depth.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_atom_depth.c 2017-06-01 10:37:10.000000000 +0000 @@ -149,7 +149,8 @@ } } - if (ctx->Color.AlphaEnabled) { + if (ctx->Color.AlphaEnabled && + !(ctx->DrawBuffer->_IntegerBuffers & 0x1)) { dsa->alpha.enabled = 1; dsa->alpha.func = st_compare_func_to_pipe(ctx->Color.AlphaFunc); dsa->alpha.ref_value = ctx->Color.AlphaRefUnclamped; @@ -161,10 +162,5 @@ const struct st_tracked_state st_update_depth_stencil_alpha = { - "st_update_depth_stencil", /* name */ - { /* dirty */ - (_NEW_DEPTH|_NEW_STENCIL|_NEW_COLOR|_NEW_BUFFERS),/* mesa */ - 0, /* st */ - }, update_depth_stencil_alpha /* update */ }; diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_atom_framebuffer.c mesa-17.0.7/src/mesa/state_tracker/st_atom_framebuffer.c --- mesa-12.0.6/src/mesa/state_tracker/st_atom_framebuffer.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_atom_framebuffer.c 2017-06-01 10:37:10.000000000 +0000 @@ -113,6 +113,7 @@ GLuint i; st_flush_bitmap_cache(st); + st_invalidate_readpix_cache(st); st->state.fb_orientation = st_fb_orientation(fb); @@ -214,11 +215,6 @@ const struct st_tracked_state st_update_framebuffer = { - "st_update_framebuffer", /* name */ - { /* dirty */ - _NEW_BUFFERS, /* mesa */ - ST_NEW_FRAMEBUFFER, /* st */ - }, update_framebuffer_state /* update */ }; diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_atom.h mesa-17.0.7/src/mesa/state_tracker/st_atom.h --- mesa-12.0.6/src/mesa/state_tracker/st_atom.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_atom.h 2017-06-01 10:37:10.000000000 +0000 @@ -36,81 +36,117 @@ #include "main/glheader.h" -#include "state_tracker/st_api.h" -#include "state_tracker/st_context.h" - struct st_context; -struct st_tracked_state; -void st_init_atoms( struct st_context *st ); -void st_destroy_atoms( struct st_context *st ); +/** + * Enumeration of state tracker pipelines. + */ +enum st_pipeline { + ST_PIPELINE_RENDER, + ST_PIPELINE_COMPUTE, +}; + +struct st_tracked_state { + void (*update)( struct st_context *st ); +}; +void st_init_atoms( struct st_context *st ); +void st_destroy_atoms( struct st_context *st ); void st_validate_state( struct st_context *st, enum st_pipeline pipeline ); - - -extern const struct st_tracked_state st_update_array; -extern const struct st_tracked_state st_update_framebuffer; -extern const struct st_tracked_state st_update_clip; -extern const struct st_tracked_state st_update_depth_stencil_alpha; -extern const struct st_tracked_state st_update_fp; -extern const struct st_tracked_state st_update_gp; -extern const struct st_tracked_state st_update_tep; -extern const struct st_tracked_state st_update_tcp; -extern const struct st_tracked_state st_update_vp; -extern const struct st_tracked_state st_update_cp; -extern const struct st_tracked_state st_update_rasterizer; -extern const struct st_tracked_state st_update_polygon_stipple; -extern const struct st_tracked_state st_update_viewport; -extern const struct st_tracked_state st_update_scissor; -extern const struct st_tracked_state st_update_blend; -extern const struct st_tracked_state st_update_msaa; -extern const struct st_tracked_state st_update_sample_shading; -extern const struct st_tracked_state st_update_sampler; -extern const struct st_tracked_state st_update_fragment_texture; -extern const struct st_tracked_state st_update_vertex_texture; -extern const struct st_tracked_state st_update_geometry_texture; -extern const struct st_tracked_state st_update_tessctrl_texture; -extern const struct st_tracked_state st_update_tesseval_texture; -extern const struct st_tracked_state st_update_compute_texture; -extern const struct st_tracked_state st_update_fs_constants; -extern const struct st_tracked_state st_update_gs_constants; -extern const struct st_tracked_state st_update_tes_constants; -extern const struct st_tracked_state st_update_tcs_constants; -extern const struct st_tracked_state st_update_vs_constants; -extern const struct st_tracked_state st_update_cs_constants; -extern const struct st_tracked_state st_bind_fs_ubos; -extern const struct st_tracked_state st_bind_vs_ubos; -extern const struct st_tracked_state st_bind_gs_ubos; -extern const struct st_tracked_state st_bind_tcs_ubos; -extern const struct st_tracked_state st_bind_tes_ubos; -extern const struct st_tracked_state st_bind_cs_ubos; -extern const struct st_tracked_state st_bind_fs_atomics; -extern const struct st_tracked_state st_bind_vs_atomics; -extern const struct st_tracked_state st_bind_gs_atomics; -extern const struct st_tracked_state st_bind_tcs_atomics; -extern const struct st_tracked_state st_bind_tes_atomics; -extern const struct st_tracked_state st_bind_cs_atomics; -extern const struct st_tracked_state st_bind_fs_ssbos; -extern const struct st_tracked_state st_bind_vs_ssbos; -extern const struct st_tracked_state st_bind_gs_ssbos; -extern const struct st_tracked_state st_bind_tcs_ssbos; -extern const struct st_tracked_state st_bind_tes_ssbos; -extern const struct st_tracked_state st_bind_cs_ssbos; -extern const struct st_tracked_state st_bind_fs_images; -extern const struct st_tracked_state st_bind_vs_images; -extern const struct st_tracked_state st_bind_gs_images; -extern const struct st_tracked_state st_bind_tcs_images; -extern const struct st_tracked_state st_bind_tes_images; -extern const struct st_tracked_state st_bind_cs_images; -extern const struct st_tracked_state st_update_pixel_transfer; -extern const struct st_tracked_state st_update_tess; - - GLuint st_compare_func_to_pipe(GLenum func); enum pipe_format st_pipe_vertex_format(GLenum type, GLuint size, GLenum format, GLboolean normalized, GLboolean integer); + +/* Define ST_NEW_xxx_INDEX */ +enum { +#define ST_STATE(FLAG, st_update) FLAG##_INDEX, +#include "st_atom_list.h" +#undef ST_STATE +}; + +/* Define ST_NEW_xxx values as static const uint64_t values. + * We can't use an enum type because MSVC doesn't allow 64-bit enum values. + */ +#define ST_STATE(FLAG, st_update) static const uint64_t FLAG = 1llu << FLAG##_INDEX; +#include "st_atom_list.h" +#undef ST_STATE + +/* Add extern struct declarations. */ +#define ST_STATE(FLAG, st_update) extern const struct st_tracked_state st_update; +#include "st_atom_list.h" +#undef ST_STATE + +/* Combined state flags. */ +#define ST_NEW_SAMPLERS (ST_NEW_RENDER_SAMPLERS | \ + ST_NEW_CS_SAMPLERS) + +#define ST_NEW_FRAMEBUFFER (ST_NEW_FB_STATE | \ + ST_NEW_SAMPLE_MASK | \ + ST_NEW_SAMPLE_SHADING) + +#define ST_NEW_VERTEX_PROGRAM(st, p) (p->affected_states | \ + (st_user_clip_planes_enabled(st->ctx) ? \ + ST_NEW_CLIP_STATE : 0)) + +#define ST_NEW_CONSTANTS (ST_NEW_VS_CONSTANTS | \ + ST_NEW_TCS_CONSTANTS | \ + ST_NEW_TES_CONSTANTS | \ + ST_NEW_FS_CONSTANTS | \ + ST_NEW_GS_CONSTANTS | \ + ST_NEW_CS_CONSTANTS) + +#define ST_NEW_UNIFORM_BUFFER (ST_NEW_VS_UBOS | \ + ST_NEW_TCS_UBOS | \ + ST_NEW_TES_UBOS | \ + ST_NEW_FS_UBOS | \ + ST_NEW_GS_UBOS | \ + ST_NEW_CS_UBOS) + +#define ST_NEW_SAMPLER_VIEWS (ST_NEW_VS_SAMPLER_VIEWS | \ + ST_NEW_FS_SAMPLER_VIEWS | \ + ST_NEW_GS_SAMPLER_VIEWS | \ + ST_NEW_TCS_SAMPLER_VIEWS | \ + ST_NEW_TES_SAMPLER_VIEWS | \ + ST_NEW_CS_SAMPLER_VIEWS) + +#define ST_NEW_ATOMIC_BUFFER (ST_NEW_VS_ATOMICS | \ + ST_NEW_TCS_ATOMICS | \ + ST_NEW_TES_ATOMICS | \ + ST_NEW_FS_ATOMICS | \ + ST_NEW_GS_ATOMICS | \ + ST_NEW_CS_ATOMICS) + +#define ST_NEW_STORAGE_BUFFER (ST_NEW_VS_SSBOS | \ + ST_NEW_TCS_SSBOS | \ + ST_NEW_TES_SSBOS | \ + ST_NEW_FS_SSBOS | \ + ST_NEW_GS_SSBOS | \ + ST_NEW_CS_SSBOS) + +#define ST_NEW_IMAGE_UNITS (ST_NEW_VS_IMAGES | \ + ST_NEW_TCS_IMAGES | \ + ST_NEW_TES_IMAGES | \ + ST_NEW_GS_IMAGES | \ + ST_NEW_FS_IMAGES | \ + ST_NEW_CS_IMAGES) + +#define ST_ALL_SHADER_RESOURCES (ST_NEW_SAMPLER_VIEWS | \ + ST_NEW_SAMPLERS | \ + ST_NEW_CONSTANTS | \ + ST_NEW_UNIFORM_BUFFER | \ + ST_NEW_ATOMIC_BUFFER | \ + ST_NEW_STORAGE_BUFFER | \ + ST_NEW_IMAGE_UNITS) + +/* All state flags within each group: */ +#define ST_PIPELINE_RENDER_STATE_MASK (ST_NEW_CS_STATE - 1) +#define ST_PIPELINE_COMPUTE_STATE_MASK (0xffllu << ST_NEW_CS_STATE_INDEX) + +#define ST_ALL_STATES_MASK (ST_PIPELINE_RENDER_STATE_MASK | \ + ST_PIPELINE_COMPUTE_STATE_MASK) + #endif diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_atom_image.c mesa-17.0.7/src/mesa/state_tracker/st_atom_image.c --- mesa-12.0.6/src/mesa/state_tracker/st_atom_image.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_atom_image.c 2017-06-01 10:37:10.000000000 +0000 @@ -34,6 +34,7 @@ #include "pipe/p_defines.h" #include "util/u_inlines.h" #include "util/u_surface.h" +#include "cso_cache/cso_context.h" #include "st_cb_texture.h" #include "st_debug.h" @@ -44,25 +45,26 @@ #include "st_format.h" static void -st_bind_images(struct st_context *st, struct gl_shader *shader, - unsigned shader_type) +st_bind_images(struct st_context *st, struct gl_program *prog, + enum pipe_shader_type shader_type) { unsigned i; struct pipe_image_view images[MAX_IMAGE_UNIFORMS]; struct gl_program_constants *c; - if (!shader || !st->pipe->set_shader_images) + if (!prog || !st->pipe->set_shader_images) return; - c = &st->ctx->Const.Program[shader->Stage]; + c = &st->ctx->Const.Program[prog->info.stage]; - for (i = 0; i < shader->NumImages; i++) { - struct gl_image_unit *u = &st->ctx->ImageUnits[shader->ImageUnits[i]]; + for (i = 0; i < prog->info.num_images; i++) { + struct gl_image_unit *u = + &st->ctx->ImageUnits[prog->sh.ImageUnits[i]]; struct st_texture_object *stObj = st_texture_object(u->TexObj); struct pipe_image_view *img = &images[i]; if (!_mesa_is_image_unit_valid(st->ctx, u) || - !st_finalize_texture(st->ctx, st->pipe, u->TexObj) || + !st_finalize_texture(st->ctx, st->pipe, u->TexObj, 0) || !stObj->pt) { memset(img, 0, sizeof(*img)); continue; @@ -87,19 +89,13 @@ if (stObj->pt->target == PIPE_BUFFER) { unsigned base, size; - unsigned f, n; - const struct util_format_description *desc - = util_format_description(img->format); base = stObj->base.BufferOffset; assert(base < stObj->pt->width0); size = MIN2(stObj->pt->width0 - base, (unsigned)stObj->base.BufferSize); - f = (base / (desc->block.bits / 8)) * desc->block.width; - n = (size / (desc->block.bits / 8)) * desc->block.width; - assert(n > 0); - img->u.buf.first_element = f; - img->u.buf.last_element = f + (n - 1); + img->u.buf.offset = base; + img->u.buf.size = size; } else { img->u.tex.level = u->Level + stObj->base.MinLevel; if (stObj->pt->target == PIPE_TEXTURE_3D) { @@ -122,15 +118,13 @@ } } } - st->pipe->set_shader_images(st->pipe, shader_type, 0, shader->NumImages, - images); + cso_set_shader_images(st->cso_context, shader_type, 0, + prog->info.num_images, images); /* clear out any stale shader images */ - if (shader->NumImages < c->MaxImageUniforms) - st->pipe->set_shader_images( - st->pipe, shader_type, - shader->NumImages, - c->MaxImageUniforms - shader->NumImages, - NULL); + if (prog->info.num_images < c->MaxImageUniforms) + cso_set_shader_images( + st->cso_context, shader_type, prog->info.num_images, + c->MaxImageUniforms - prog->info.num_images, NULL); } static void bind_vs_images(struct st_context *st) @@ -138,18 +132,13 @@ struct gl_shader_program *prog = st->ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX]; - if (!prog) + if (!prog || !prog->_LinkedShaders[MESA_SHADER_VERTEX]) return; - st_bind_images(st, prog->_LinkedShaders[MESA_SHADER_VERTEX], PIPE_SHADER_VERTEX); + st_bind_images(st, prog->_LinkedShaders[MESA_SHADER_VERTEX]->Program, PIPE_SHADER_VERTEX); } const struct st_tracked_state st_bind_vs_images = { - "st_bind_vs_images", - { - _NEW_TEXTURE, - ST_NEW_VERTEX_PROGRAM | ST_NEW_IMAGE_UNITS, - }, bind_vs_images }; @@ -158,18 +147,13 @@ struct gl_shader_program *prog = st->ctx->_Shader->CurrentProgram[MESA_SHADER_FRAGMENT]; - if (!prog) + if (!prog || !prog->_LinkedShaders[MESA_SHADER_FRAGMENT]) return; - st_bind_images(st, prog->_LinkedShaders[MESA_SHADER_FRAGMENT], PIPE_SHADER_FRAGMENT); + st_bind_images(st, prog->_LinkedShaders[MESA_SHADER_FRAGMENT]->Program, PIPE_SHADER_FRAGMENT); } const struct st_tracked_state st_bind_fs_images = { - "st_bind_fs_images", - { - _NEW_TEXTURE, - ST_NEW_FRAGMENT_PROGRAM | ST_NEW_IMAGE_UNITS, - }, bind_fs_images }; @@ -178,18 +162,13 @@ struct gl_shader_program *prog = st->ctx->_Shader->CurrentProgram[MESA_SHADER_GEOMETRY]; - if (!prog) + if (!prog || !prog->_LinkedShaders[MESA_SHADER_GEOMETRY]) return; - st_bind_images(st, prog->_LinkedShaders[MESA_SHADER_GEOMETRY], PIPE_SHADER_GEOMETRY); + st_bind_images(st, prog->_LinkedShaders[MESA_SHADER_GEOMETRY]->Program, PIPE_SHADER_GEOMETRY); } const struct st_tracked_state st_bind_gs_images = { - "st_bind_gs_images", - { - _NEW_TEXTURE, - ST_NEW_GEOMETRY_PROGRAM | ST_NEW_IMAGE_UNITS, - }, bind_gs_images }; @@ -198,18 +177,13 @@ struct gl_shader_program *prog = st->ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_CTRL]; - if (!prog) + if (!prog || !prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]) return; - st_bind_images(st, prog->_LinkedShaders[MESA_SHADER_TESS_CTRL], PIPE_SHADER_TESS_CTRL); + st_bind_images(st, prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]->Program, PIPE_SHADER_TESS_CTRL); } const struct st_tracked_state st_bind_tcs_images = { - "st_bind_tcs_images", - { - _NEW_TEXTURE, - ST_NEW_TESSCTRL_PROGRAM | ST_NEW_IMAGE_UNITS, - }, bind_tcs_images }; @@ -218,18 +192,13 @@ struct gl_shader_program *prog = st->ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_EVAL]; - if (!prog) + if (!prog || !prog->_LinkedShaders[MESA_SHADER_TESS_EVAL]) return; - st_bind_images(st, prog->_LinkedShaders[MESA_SHADER_TESS_EVAL], PIPE_SHADER_TESS_EVAL); + st_bind_images(st, prog->_LinkedShaders[MESA_SHADER_TESS_EVAL]->Program, PIPE_SHADER_TESS_EVAL); } const struct st_tracked_state st_bind_tes_images = { - "st_bind_tes_images", - { - _NEW_TEXTURE, - ST_NEW_TESSEVAL_PROGRAM | ST_NEW_IMAGE_UNITS, - }, bind_tes_images }; @@ -238,17 +207,12 @@ struct gl_shader_program *prog = st->ctx->_Shader->CurrentProgram[MESA_SHADER_COMPUTE]; - if (!prog) + if (!prog || !prog->_LinkedShaders[MESA_SHADER_COMPUTE]) return; - st_bind_images(st, prog->_LinkedShaders[MESA_SHADER_COMPUTE], PIPE_SHADER_COMPUTE); + st_bind_images(st, prog->_LinkedShaders[MESA_SHADER_COMPUTE]->Program, PIPE_SHADER_COMPUTE); } const struct st_tracked_state st_bind_cs_images = { - "st_bind_cs_images", - { - _NEW_TEXTURE, - ST_NEW_COMPUTE_PROGRAM | ST_NEW_IMAGE_UNITS, - }, bind_cs_images }; diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_atom_list.h mesa-17.0.7/src/mesa/state_tracker/st_atom_list.h --- mesa-12.0.6/src/mesa/state_tracker/st_atom_list.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_atom_list.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,75 @@ +/* Render (non-compute) states must be first. */ +ST_STATE(ST_NEW_DSA, st_update_depth_stencil_alpha) +ST_STATE(ST_NEW_CLIP_STATE, st_update_clip) + +ST_STATE(ST_NEW_FS_STATE, st_update_fp) +ST_STATE(ST_NEW_GS_STATE, st_update_gp) +ST_STATE(ST_NEW_TES_STATE, st_update_tep) +ST_STATE(ST_NEW_TCS_STATE, st_update_tcp) +ST_STATE(ST_NEW_VS_STATE, st_update_vp) + +ST_STATE(ST_NEW_RASTERIZER, st_update_rasterizer) +ST_STATE(ST_NEW_POLY_STIPPLE, st_update_polygon_stipple) +ST_STATE(ST_NEW_VIEWPORT, st_update_viewport) +ST_STATE(ST_NEW_SCISSOR, st_update_scissor) +ST_STATE(ST_NEW_WINDOW_RECTANGLES, st_update_window_rectangles) +ST_STATE(ST_NEW_BLEND, st_update_blend) + +ST_STATE(ST_NEW_VS_SAMPLER_VIEWS, st_update_vertex_texture) +ST_STATE(ST_NEW_FS_SAMPLER_VIEWS, st_update_fragment_texture) +ST_STATE(ST_NEW_GS_SAMPLER_VIEWS, st_update_geometry_texture) +ST_STATE(ST_NEW_TCS_SAMPLER_VIEWS, st_update_tessctrl_texture) +ST_STATE(ST_NEW_TES_SAMPLER_VIEWS, st_update_tesseval_texture) + +/* Non-compute samplers. */ +ST_STATE(ST_NEW_RENDER_SAMPLERS, st_update_sampler) /* depends on update_*_texture for swizzle */ + +ST_STATE(ST_NEW_VS_IMAGES, st_bind_vs_images) +ST_STATE(ST_NEW_TCS_IMAGES, st_bind_tcs_images) +ST_STATE(ST_NEW_TES_IMAGES, st_bind_tes_images) +ST_STATE(ST_NEW_GS_IMAGES, st_bind_gs_images) +ST_STATE(ST_NEW_FS_IMAGES, st_bind_fs_images) + +ST_STATE(ST_NEW_FB_STATE, st_update_framebuffer) /* depends on update_*_texture and bind_*_images */ +ST_STATE(ST_NEW_SAMPLE_MASK, st_update_msaa) +ST_STATE(ST_NEW_SAMPLE_SHADING, st_update_sample_shading) + +ST_STATE(ST_NEW_VS_CONSTANTS, st_update_vs_constants) +ST_STATE(ST_NEW_TCS_CONSTANTS, st_update_tcs_constants) +ST_STATE(ST_NEW_TES_CONSTANTS, st_update_tes_constants) +ST_STATE(ST_NEW_GS_CONSTANTS, st_update_gs_constants) +ST_STATE(ST_NEW_FS_CONSTANTS, st_update_fs_constants) + +ST_STATE(ST_NEW_VS_UBOS, st_bind_vs_ubos) +ST_STATE(ST_NEW_TCS_UBOS, st_bind_tcs_ubos) +ST_STATE(ST_NEW_TES_UBOS, st_bind_tes_ubos) +ST_STATE(ST_NEW_FS_UBOS, st_bind_fs_ubos) +ST_STATE(ST_NEW_GS_UBOS, st_bind_gs_ubos) + +ST_STATE(ST_NEW_VS_ATOMICS, st_bind_vs_atomics) +ST_STATE(ST_NEW_TCS_ATOMICS, st_bind_tcs_atomics) +ST_STATE(ST_NEW_TES_ATOMICS, st_bind_tes_atomics) +ST_STATE(ST_NEW_FS_ATOMICS, st_bind_fs_atomics) +ST_STATE(ST_NEW_GS_ATOMICS, st_bind_gs_atomics) + +ST_STATE(ST_NEW_VS_SSBOS, st_bind_vs_ssbos) +ST_STATE(ST_NEW_TCS_SSBOS, st_bind_tcs_ssbos) +ST_STATE(ST_NEW_TES_SSBOS, st_bind_tes_ssbos) +ST_STATE(ST_NEW_FS_SSBOS, st_bind_fs_ssbos) +ST_STATE(ST_NEW_GS_SSBOS, st_bind_gs_ssbos) + +ST_STATE(ST_NEW_PIXEL_TRANSFER, st_update_pixel_transfer) +ST_STATE(ST_NEW_TESS_STATE, st_update_tess) + +/* this must be done after the vertex program update */ +ST_STATE(ST_NEW_VERTEX_ARRAYS, st_update_array) + +/* Compute states must be last. */ +ST_STATE(ST_NEW_CS_STATE, st_update_cp) +ST_STATE(ST_NEW_CS_SAMPLER_VIEWS, st_update_compute_texture) +ST_STATE(ST_NEW_CS_SAMPLERS, st_update_sampler) /* depends on update_compute_texture for swizzle */ +ST_STATE(ST_NEW_CS_CONSTANTS, st_update_cs_constants) +ST_STATE(ST_NEW_CS_UBOS, st_bind_cs_ubos) +ST_STATE(ST_NEW_CS_ATOMICS, st_bind_cs_atomics) +ST_STATE(ST_NEW_CS_SSBOS, st_bind_cs_ssbos) +ST_STATE(ST_NEW_CS_IMAGES, st_bind_cs_images) diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_atom_msaa.c mesa-17.0.7/src/mesa/state_tracker/st_atom_msaa.c --- mesa-12.0.6/src/mesa/state_tracker/st_atom_msaa.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_atom_msaa.c 2017-06-01 10:37:10.000000000 +0000 @@ -36,7 +36,7 @@ #include "util/u_framebuffer.h" -/* Second state atom for user clip planes: +/* Update the sample mask for MSAA. */ static void update_sample_mask( struct st_context *st ) { @@ -46,7 +46,7 @@ unsigned sample_count = util_framebuffer_get_num_samples(framebuffer); if (st->ctx->Multisample.Enabled && sample_count > 1) { - /* unlike in gallium/d3d10 the mask is only active if msaa is enabled */ + /* unlike in gallium/d3d10 the mask is only active if msaa is enabled */ if (st->ctx->Multisample.SampleCoverage) { unsigned nr_bits; nr_bits = (unsigned) @@ -54,7 +54,7 @@ /* there's lot of ways how to do this. We just use first few bits, since we have no knowledge of sample positions here. When app-supplied mask though is used too might need to be smarter. - Also, there's a interface restriction here in theory it is + Also, there's an interface restriction here in theory it is encouraged this mask not be the same at each pixel. */ sample_mask = (1 << nr_bits) - 1; if (st->ctx->Multisample.SampleCoverageInvert) @@ -86,19 +86,9 @@ } const struct st_tracked_state st_update_msaa = { - "st_update_msaa", /* name */ - { /* dirty */ - (_NEW_MULTISAMPLE | _NEW_BUFFERS), /* mesa */ - ST_NEW_FRAMEBUFFER, /* st */ - }, update_sample_mask /* update */ }; const struct st_tracked_state st_update_sample_shading = { - "st_update_sample_shading", /* name */ - { /* dirty */ - (_NEW_MULTISAMPLE | _NEW_PROGRAM | _NEW_BUFFERS), /* mesa */ - ST_NEW_FRAGMENT_PROGRAM | ST_NEW_FRAMEBUFFER, /* st */ - }, update_sample_shading /* update */ }; diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_atom_pixeltransfer.c mesa-17.0.7/src/mesa/state_tracker/st_atom_pixeltransfer.c --- mesa-12.0.6/src/mesa/state_tracker/st_atom_pixeltransfer.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_atom_pixeltransfer.c 2017-06-01 10:37:10.000000000 +0000 @@ -30,6 +30,7 @@ */ #include "st_context.h" +#include "st_sampler_view.h" #include "st_texture.h" #include "util/u_inlines.h" @@ -102,10 +103,5 @@ const struct st_tracked_state st_update_pixel_transfer = { - "st_update_pixel_transfer", /* name */ - { /* dirty */ - _NEW_PIXEL, /* mesa */ - 0, /* st */ - }, update_pixel_transfer /* update */ }; diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_atom_rasterizer.c mesa-17.0.7/src/mesa/state_tracker/st_atom_rasterizer.c --- mesa-12.0.6/src/mesa/state_tracker/st_atom_rasterizer.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_atom_rasterizer.c 2017-06-01 10:37:10.000000000 +0000 @@ -62,9 +62,8 @@ { struct gl_context *ctx = st->ctx; struct pipe_rasterizer_state *raster = &st->state.rasterizer; - const struct gl_vertex_program *vertProg = ctx->VertexProgram._Current; - const struct gl_fragment_program *fragProg = ctx->FragmentProgram._Current; - uint i; + const struct gl_program *vertProg = ctx->VertexProgram._Current; + const struct gl_program *fragProg = ctx->FragmentProgram._Current; memset(raster, 0, sizeof(*raster)); @@ -181,13 +180,10 @@ * that we need to replace GENERIC[k] attrib with an automatically * computed texture coord. */ - for (i = 0; i < MAX_TEXTURE_COORD_UNITS; i++) { - if (ctx->Point.CoordReplace[i]) { - raster->sprite_coord_enable |= 1 << i; - } - } + raster->sprite_coord_enable = ctx->Point.CoordReplace & + ((1u << MAX_TEXTURE_COORD_UNITS) - 1); if (!st->needs_texcoord_semantic && - fragProg->Base.InputsRead & VARYING_BIT_PNTC) { + fragProg->info.inputs_read & VARYING_BIT_PNTC) { raster->sprite_coord_enable |= 1 << st_get_generic_varying_index(st, VARYING_SLOT_PNTC); } @@ -198,8 +194,9 @@ /* ST_NEW_VERTEX_PROGRAM */ if (vertProg) { - if (vertProg->Base.Id == 0) { - if (vertProg->Base.OutputsWritten & BITFIELD64_BIT(VARYING_SLOT_PSIZ)) { + if (vertProg->Id == 0) { + if (vertProg->info.outputs_written & + BITFIELD64_BIT(VARYING_SLOT_PSIZ)) { /* generated program which emits point size */ raster->point_size_per_vertex = TRUE; } @@ -213,14 +210,15 @@ /* We have to check the last bound stage and see if it writes psize */ struct gl_program *last = NULL; if (ctx->GeometryProgram._Current) - last = &ctx->GeometryProgram._Current->Base; + last = ctx->GeometryProgram._Current; else if (ctx->TessEvalProgram._Current) - last = &ctx->TessEvalProgram._Current->Base; + last = ctx->TessEvalProgram._Current; else if (ctx->VertexProgram._Current) - last = &ctx->VertexProgram._Current->Base; + last = ctx->VertexProgram._Current; if (last) raster->point_size_per_vertex = - !!(last->OutputsWritten & BITFIELD64_BIT(VARYING_SLOT_PSIZ)); + !!(last->info.outputs_written & + BITFIELD64_BIT(VARYING_SLOT_PSIZ)); } } if (!raster->point_size_per_vertex) { @@ -255,7 +253,7 @@ /* _NEW_MULTISAMPLE | _NEW_BUFFERS */ raster->force_persample_interp = !st->force_persample_in_shader && - _mesa_is_multisample_enabled(ctx) && + raster->multisample && ctx->Multisample.SampleShading && ctx->Multisample.MinSampleShadingValue * _mesa_geometric_samples(ctx->DrawBuffer) > 1; @@ -294,22 +292,5 @@ } const struct st_tracked_state st_update_rasterizer = { - "st_update_rasterizer", /* name */ - { - (_NEW_BUFFERS | - _NEW_LIGHT | - _NEW_LINE | - _NEW_MULTISAMPLE | - _NEW_POINT | - _NEW_POLYGON | - _NEW_PROGRAM | - _NEW_SCISSOR | - _NEW_FRAG_CLAMP | - _NEW_TRANSFORM), /* mesa state dependencies*/ - (ST_NEW_VERTEX_PROGRAM | - ST_NEW_TESSEVAL_PROGRAM | - ST_NEW_GEOMETRY_PROGRAM | - ST_NEW_RASTERIZER), /* state tracker dependencies */ - }, update_raster_state /* update function */ }; diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_atom_sampler.c mesa-17.0.7/src/mesa/state_tracker/st_atom_sampler.c --- mesa-12.0.6/src/mesa/state_tracker/st_atom_sampler.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_atom_sampler.c 2017-06-01 10:37:10.000000000 +0000 @@ -159,6 +159,12 @@ sampler->normalized_coords = 1; sampler->lod_bias = ctx->Texture.Unit[texUnit].LodBias + msamp->LodBias; + /* Reduce the number of states by allowing only the values that AMD GCN + * can represent. Apps use lod_bias for smooth transitions to bigger mipmap + * levels. + */ + sampler->lod_bias = CLAMP(sampler->lod_bias, -16, 16); + sampler->lod_bias = floorf(sampler->lod_bias * 256) / 256; sampler->min_lod = MAX2(msamp->MinLod, 0.0f); sampler->max_lod = msamp->MaxLod; @@ -220,7 +226,7 @@ /* If sampling a depth texture and using shadow comparison */ if ((texBaseFormat == GL_DEPTH_COMPONENT || - texBaseFormat == GL_DEPTH_STENCIL) && + (texBaseFormat == GL_DEPTH_STENCIL && !texobj->StencilSampling)) && msamp->CompareMode == GL_COMPARE_R_TO_TEXTURE) { sampler->compare_mode = PIPE_TEX_COMPARE_R_TO_TEXTURE; sampler->compare_func = st_compare_func_to_pipe(msamp->CompareFunc); @@ -237,19 +243,19 @@ */ static void update_shader_samplers(struct st_context *st, - unsigned shader_stage, + enum pipe_shader_type shader_stage, const struct gl_program *prog, unsigned max_units, struct pipe_sampler_state *samplers, unsigned *num_samplers) { + GLbitfield samplers_used = prog->SamplersUsed; + GLbitfield free_slots = ~prog->SamplersUsed; + GLbitfield external_samplers_used = prog->ExternalSamplersUsed; GLuint unit; - GLbitfield samplers_used; const GLuint old_max = *num_samplers; const struct pipe_sampler_state *states[PIPE_MAX_SAMPLERS]; - samplers_used = prog->SamplersUsed; - if (*num_samplers == 0 && samplers_used == 0x0) return; @@ -275,6 +281,41 @@ } } + /* For any external samplers with multiplaner YUV, stuff the additional + * sampler states we need at the end. + * + * Just re-use the existing sampler-state from the primary slot. + */ + while (unlikely(external_samplers_used)) { + GLuint unit = u_bit_scan(&external_samplers_used); + GLuint extra = 0; + struct st_texture_object *stObj = + st_get_texture_object(st->ctx, prog, unit); + struct pipe_sampler_state *sampler = samplers + unit; + + if (!stObj) + continue; + + switch (st_get_view_format(stObj)) { + case PIPE_FORMAT_NV12: + /* we need one additional sampler: */ + extra = u_bit_scan(&free_slots); + states[extra] = sampler; + break; + case PIPE_FORMAT_IYUV: + /* we need two additional samplers: */ + extra = u_bit_scan(&free_slots); + states[extra] = sampler; + extra = u_bit_scan(&free_slots); + states[extra] = sampler; + break; + default: + break; + } + + *num_samplers = MAX2(*num_samplers, extra + 1); + } + cso_set_samplers(st->cso_context, shader_stage, *num_samplers, states); } @@ -286,14 +327,14 @@ update_shader_samplers(st, PIPE_SHADER_FRAGMENT, - &ctx->FragmentProgram._Current->Base, + ctx->FragmentProgram._Current, ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits, st->state.samplers[PIPE_SHADER_FRAGMENT], &st->state.num_samplers[PIPE_SHADER_FRAGMENT]); update_shader_samplers(st, PIPE_SHADER_VERTEX, - &ctx->VertexProgram._Current->Base, + ctx->VertexProgram._Current, ctx->Const.Program[MESA_SHADER_VERTEX].MaxTextureImageUnits, st->state.samplers[PIPE_SHADER_VERTEX], &st->state.num_samplers[PIPE_SHADER_VERTEX]); @@ -301,7 +342,7 @@ if (ctx->GeometryProgram._Current) { update_shader_samplers(st, PIPE_SHADER_GEOMETRY, - &ctx->GeometryProgram._Current->Base, + ctx->GeometryProgram._Current, ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxTextureImageUnits, st->state.samplers[PIPE_SHADER_GEOMETRY], &st->state.num_samplers[PIPE_SHADER_GEOMETRY]); @@ -309,7 +350,7 @@ if (ctx->TessCtrlProgram._Current) { update_shader_samplers(st, PIPE_SHADER_TESS_CTRL, - &ctx->TessCtrlProgram._Current->Base, + ctx->TessCtrlProgram._Current, ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxTextureImageUnits, st->state.samplers[PIPE_SHADER_TESS_CTRL], &st->state.num_samplers[PIPE_SHADER_TESS_CTRL]); @@ -317,7 +358,7 @@ if (ctx->TessEvalProgram._Current) { update_shader_samplers(st, PIPE_SHADER_TESS_EVAL, - &ctx->TessEvalProgram._Current->Base, + ctx->TessEvalProgram._Current, ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxTextureImageUnits, st->state.samplers[PIPE_SHADER_TESS_EVAL], &st->state.num_samplers[PIPE_SHADER_TESS_EVAL]); @@ -325,7 +366,7 @@ if (ctx->ComputeProgram._Current) { update_shader_samplers(st, PIPE_SHADER_COMPUTE, - &ctx->ComputeProgram._Current->Base, + ctx->ComputeProgram._Current, ctx->Const.Program[MESA_SHADER_COMPUTE].MaxTextureImageUnits, st->state.samplers[PIPE_SHADER_COMPUTE], &st->state.num_samplers[PIPE_SHADER_COMPUTE]); @@ -334,10 +375,5 @@ const struct st_tracked_state st_update_sampler = { - "st_update_sampler", /* name */ - { /* dirty */ - _NEW_TEXTURE, /* mesa */ - 0, /* st */ - }, update_samplers /* update */ }; diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_atom_scissor.c mesa-17.0.7/src/mesa/state_tracker/st_atom_scissor.c --- mesa-12.0.6/src/mesa/state_tracker/st_atom_scissor.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_atom_scissor.c 2017-06-01 10:37:10.000000000 +0000 @@ -99,12 +99,51 @@ st->pipe->set_scissor_states(st->pipe, 0, ctx->Const.MaxViewports, scissor); /* activate */ } +static void +update_window_rectangles(struct st_context *st) +{ + struct pipe_scissor_state new_rects[PIPE_MAX_WINDOW_RECTANGLES]; + const struct gl_context *ctx = st->ctx; + const struct gl_scissor_attrib *scissor = &ctx->Scissor; + unsigned i; + bool changed = false; + unsigned num_rects = scissor->NumWindowRects; + bool include = scissor->WindowRectMode == GL_INCLUSIVE_EXT; + + if (ctx->DrawBuffer == ctx->WinSysDrawBuffer) { + num_rects = 0; + include = false; + } + for (i = 0; i < num_rects; i++) { + const struct gl_scissor_rect *rect = &scissor->WindowRects[i]; + new_rects[i].minx = MAX2(rect->X, 0); + new_rects[i].miny = MAX2(rect->Y, 0); + new_rects[i].maxx = MAX2(rect->X + rect->Width, 0); + new_rects[i].maxy = MAX2(rect->Y + rect->Height, 0); + } + if (num_rects > 0 && memcmp(new_rects, st->state.window_rects.rects, + num_rects * sizeof(struct pipe_scissor_state))) { + memcpy(st->state.window_rects.rects, new_rects, + num_rects * sizeof(struct pipe_scissor_state)); + changed = true; + } + if (st->state.window_rects.num != num_rects) { + st->state.window_rects.num = num_rects; + changed = true; + } + if (st->state.window_rects.include != include) { + st->state.window_rects.include = include; + changed = true; + } + if (changed) + st->pipe->set_window_rectangles( + st->pipe, include, num_rects, new_rects); +} const struct st_tracked_state st_update_scissor = { - "st_update_scissor", /* name */ - { /* dirty */ - (_NEW_SCISSOR | _NEW_BUFFERS), /* mesa */ - 0, /* st */ - }, update_scissor /* update */ }; + +const struct st_tracked_state st_update_window_rectangles = { + update_window_rectangles /* update */ +}; diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_atom_shader.c mesa-17.0.7/src/mesa/state_tracker/st_atom_shader.c --- mesa-12.0.6/src/mesa/state_tracker/st_atom_shader.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_atom_shader.c 2017-06-01 10:37:10.000000000 +0000 @@ -51,6 +51,7 @@ #include "st_context.h" #include "st_atom.h" #include "st_program.h" +#include "st_texture.h" /** Compress the fog function enums into a 2-bit value */ @@ -113,7 +114,7 @@ assert(st->ctx->FragmentProgram._Current); stfp = st_fragment_program(st->ctx->FragmentProgram._Current); - assert(stfp->Base.Base.Target == GL_FRAGMENT_PROGRAM_ARB); + assert(stfp->Base.Target == GL_FRAGMENT_PROGRAM_ARB); memset(&key, 0, sizeof(key)); key.st = st->has_shareable_shaders ? NULL : st; @@ -142,6 +143,8 @@ } } + key.external = st_get_external_sampler_key(st, &stfp->Base); + st->fp_variant = st_get_fp_variant(st, stfp, &key); st_reference_fragprog(st, &st->fp, stfp); @@ -152,11 +155,6 @@ const struct st_tracked_state st_update_fp = { - "st_update_fp", /* name */ - { /* dirty */ - _NEW_BUFFERS | _NEW_MULTISAMPLE | _NEW_FOG, /* mesa */ - ST_NEW_FRAGMENT_PROGRAM /* st */ - }, update_fp /* update */ }; @@ -177,7 +175,7 @@ */ assert(st->ctx->VertexProgram._Current); stvp = st_vertex_program(st->ctx->VertexProgram._Current); - assert(stvp->Base.Base.Target == GL_VERTEX_PROGRAM_ARB); + assert(stvp->Base.Target == GL_VERTEX_PROGRAM_ARB); memset(&key, 0, sizeof key); key.st = st->has_shareable_shaders ? NULL : st; @@ -192,7 +190,7 @@ key.clamp_color = st->clamp_vert_color_in_shader && st->ctx->Light._ClampVertexColor && - (stvp->Base.Base.OutputsWritten & + (stvp->Base.info.outputs_written & (VARYING_SLOT_COL0 | VARYING_SLOT_COL1 | VARYING_SLOT_BFC0 | @@ -210,11 +208,6 @@ const struct st_tracked_state st_update_vp = { - "st_update_vp", /* name */ - { /* dirty */ - 0, /* mesa */ - ST_NEW_VERTEX_PROGRAM /* st */ - }, update_vp /* update */ }; @@ -227,11 +220,12 @@ if (!st->ctx->GeometryProgram._Current) { cso_set_geometry_shader_handle(st->cso_context, NULL); + st_reference_geomprog(st, &st->gp, NULL); return; } stgp = st_geometry_program(st->ctx->GeometryProgram._Current); - assert(stgp->Base.Base.Target == GL_GEOMETRY_PROGRAM_NV); + assert(stgp->Base.Target == GL_GEOMETRY_PROGRAM_NV); st->gp_variant = st_get_basic_variant(st, PIPE_SHADER_GEOMETRY, &stgp->tgsi, &stgp->variants); @@ -243,11 +237,6 @@ } const struct st_tracked_state st_update_gp = { - "st_update_gp", /* name */ - { /* dirty */ - 0, /* mesa */ - ST_NEW_GEOMETRY_PROGRAM /* st */ - }, update_gp /* update */ }; @@ -260,11 +249,12 @@ if (!st->ctx->TessCtrlProgram._Current) { cso_set_tessctrl_shader_handle(st->cso_context, NULL); + st_reference_tesscprog(st, &st->tcp, NULL); return; } sttcp = st_tessctrl_program(st->ctx->TessCtrlProgram._Current); - assert(sttcp->Base.Base.Target == GL_TESS_CONTROL_PROGRAM_NV); + assert(sttcp->Base.Target == GL_TESS_CONTROL_PROGRAM_NV); st->tcp_variant = st_get_basic_variant(st, PIPE_SHADER_TESS_CTRL, &sttcp->tgsi, &sttcp->variants); @@ -276,11 +266,6 @@ } const struct st_tracked_state st_update_tcp = { - "st_update_tcp", /* name */ - { /* dirty */ - 0, /* mesa */ - ST_NEW_TESSCTRL_PROGRAM /* st */ - }, update_tcp /* update */ }; @@ -293,11 +278,12 @@ if (!st->ctx->TessEvalProgram._Current) { cso_set_tesseval_shader_handle(st->cso_context, NULL); + st_reference_tesseprog(st, &st->tep, NULL); return; } sttep = st_tesseval_program(st->ctx->TessEvalProgram._Current); - assert(sttep->Base.Base.Target == GL_TESS_EVALUATION_PROGRAM_NV); + assert(sttep->Base.Target == GL_TESS_EVALUATION_PROGRAM_NV); st->tep_variant = st_get_basic_variant(st, PIPE_SHADER_TESS_EVAL, &sttep->tgsi, &sttep->variants); @@ -309,11 +295,6 @@ } const struct st_tracked_state st_update_tep = { - "st_update_tep", /* name */ - { /* dirty */ - 0, /* mesa */ - ST_NEW_TESSEVAL_PROGRAM /* st */ - }, update_tep /* update */ }; @@ -326,11 +307,12 @@ if (!st->ctx->ComputeProgram._Current) { cso_set_compute_shader_handle(st->cso_context, NULL); + st_reference_compprog(st, &st->cp, NULL); return; } stcp = st_compute_program(st->ctx->ComputeProgram._Current); - assert(stcp->Base.Base.Target == GL_COMPUTE_PROGRAM_NV); + assert(stcp->Base.Target == GL_COMPUTE_PROGRAM_NV); st->cp_variant = st_get_cp_variant(st, &stcp->tgsi, &stcp->variants); @@ -341,10 +323,5 @@ } const struct st_tracked_state st_update_cp = { - "st_update_cp", /* name */ - { /* dirty */ - 0, /* mesa */ - ST_NEW_COMPUTE_PROGRAM /* st */ - }, update_cp /* update */ }; diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_atom_stipple.c mesa-17.0.7/src/mesa/state_tracker/st_atom_stipple.c --- mesa-12.0.6/src/mesa/state_tracker/st_atom_stipple.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_atom_stipple.c 2017-06-01 10:37:10.000000000 +0000 @@ -61,7 +61,7 @@ -static void +static void update_stipple( struct st_context *st ) { const struct gl_context *ctx = st->ctx; @@ -74,8 +74,12 @@ memcpy(st->state.poly_stipple, ctx->PolygonStipple, sz); - invert_stipple(newStipple.stipple, ctx->PolygonStipple, - ctx->DrawBuffer->Height); + if (_mesa_is_user_fbo(ctx->DrawBuffer)) { + memcpy(newStipple.stipple, ctx->PolygonStipple, sizeof(newStipple.stipple)); + } else { + invert_stipple(newStipple.stipple, ctx->PolygonStipple, + ctx->DrawBuffer->Height); + } st->pipe->set_polygon_stipple(st->pipe, &newStipple); } @@ -84,11 +88,5 @@ /** Update the stipple when the pattern or window height changes */ const struct st_tracked_state st_update_polygon_stipple = { - "st_update_polygon_stipple", /* name */ - { /* dirty */ - (_NEW_POLYGONSTIPPLE | - _NEW_BUFFERS), /* mesa */ - 0, /* st */ - }, update_stipple /* update */ }; diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_atom_storagebuf.c mesa-17.0.7/src/mesa/state_tracker/st_atom_storagebuf.c --- mesa-12.0.6/src/mesa/state_tracker/st_atom_storagebuf.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_atom_storagebuf.c 2017-06-01 10:37:10.000000000 +0000 @@ -41,25 +41,25 @@ #include "st_program.h" static void -st_bind_ssbos(struct st_context *st, struct gl_shader *shader, - unsigned shader_type) +st_bind_ssbos(struct st_context *st, struct gl_program *prog, + enum pipe_shader_type shader_type) { unsigned i; struct pipe_shader_buffer buffers[MAX_SHADER_STORAGE_BUFFERS]; struct gl_program_constants *c; - if (!shader || !st->pipe->set_shader_buffers) + if (!prog || !st->pipe->set_shader_buffers) return; - c = &st->ctx->Const.Program[shader->Stage]; + c = &st->ctx->Const.Program[prog->info.stage]; - for (i = 0; i < shader->NumShaderStorageBlocks; i++) { + for (i = 0; i < prog->info.num_ssbos; i++) { struct gl_shader_storage_buffer_binding *binding; struct st_buffer_object *st_obj; struct pipe_shader_buffer *sb = &buffers[i]; binding = &st->ctx->ShaderStorageBufferBindings[ - shader->ShaderStorageBlocks[i]->Binding]; + prog->sh.ShaderStorageBlocks[i]->Binding]; st_obj = st_buffer_object(binding->BufferObject); sb->buffer = st_obj->buffer; @@ -80,13 +80,13 @@ } } st->pipe->set_shader_buffers(st->pipe, shader_type, c->MaxAtomicBuffers, - shader->NumShaderStorageBlocks, buffers); + prog->info.num_ssbos, buffers); /* clear out any stale shader buffers */ - if (shader->NumShaderStorageBlocks < c->MaxShaderStorageBlocks) + if (prog->info.num_ssbos < c->MaxShaderStorageBlocks) st->pipe->set_shader_buffers( st->pipe, shader_type, - c->MaxAtomicBuffers + shader->NumShaderStorageBlocks, - c->MaxShaderStorageBlocks - shader->NumShaderStorageBlocks, + c->MaxAtomicBuffers + prog->info.num_ssbos, + c->MaxShaderStorageBlocks - prog->info.num_ssbos, NULL); } @@ -95,19 +95,14 @@ struct gl_shader_program *prog = st->ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX]; - if (!prog) + if (!prog || !prog->_LinkedShaders[MESA_SHADER_VERTEX]) return; - st_bind_ssbos(st, prog->_LinkedShaders[MESA_SHADER_VERTEX], + st_bind_ssbos(st, prog->_LinkedShaders[MESA_SHADER_VERTEX]->Program, PIPE_SHADER_VERTEX); } const struct st_tracked_state st_bind_vs_ssbos = { - "st_bind_vs_ssbos", - { - 0, - ST_NEW_VERTEX_PROGRAM | ST_NEW_STORAGE_BUFFER, - }, bind_vs_ssbos }; @@ -116,19 +111,14 @@ struct gl_shader_program *prog = st->ctx->_Shader->CurrentProgram[MESA_SHADER_FRAGMENT]; - if (!prog) + if (!prog || !prog->_LinkedShaders[MESA_SHADER_FRAGMENT]) return; - st_bind_ssbos(st, prog->_LinkedShaders[MESA_SHADER_FRAGMENT], + st_bind_ssbos(st, prog->_LinkedShaders[MESA_SHADER_FRAGMENT]->Program, PIPE_SHADER_FRAGMENT); } const struct st_tracked_state st_bind_fs_ssbos = { - "st_bind_fs_ssbos", - { - 0, - ST_NEW_FRAGMENT_PROGRAM | ST_NEW_STORAGE_BUFFER, - }, bind_fs_ssbos }; @@ -137,19 +127,14 @@ struct gl_shader_program *prog = st->ctx->_Shader->CurrentProgram[MESA_SHADER_GEOMETRY]; - if (!prog) + if (!prog || !prog->_LinkedShaders[MESA_SHADER_GEOMETRY]) return; - st_bind_ssbos(st, prog->_LinkedShaders[MESA_SHADER_GEOMETRY], + st_bind_ssbos(st, prog->_LinkedShaders[MESA_SHADER_GEOMETRY]->Program, PIPE_SHADER_GEOMETRY); } const struct st_tracked_state st_bind_gs_ssbos = { - "st_bind_gs_ssbos", - { - 0, - ST_NEW_GEOMETRY_PROGRAM | ST_NEW_STORAGE_BUFFER, - }, bind_gs_ssbos }; @@ -158,19 +143,14 @@ struct gl_shader_program *prog = st->ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_CTRL]; - if (!prog) + if (!prog || !prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]) return; - st_bind_ssbos(st, prog->_LinkedShaders[MESA_SHADER_TESS_CTRL], + st_bind_ssbos(st, prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]->Program, PIPE_SHADER_TESS_CTRL); } const struct st_tracked_state st_bind_tcs_ssbos = { - "st_bind_tcs_ssbos", - { - 0, - ST_NEW_TESSCTRL_PROGRAM | ST_NEW_STORAGE_BUFFER, - }, bind_tcs_ssbos }; @@ -179,19 +159,14 @@ struct gl_shader_program *prog = st->ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_EVAL]; - if (!prog) + if (!prog || !prog->_LinkedShaders[MESA_SHADER_TESS_EVAL]) return; - st_bind_ssbos(st, prog->_LinkedShaders[MESA_SHADER_TESS_EVAL], + st_bind_ssbos(st, prog->_LinkedShaders[MESA_SHADER_TESS_EVAL]->Program, PIPE_SHADER_TESS_EVAL); } const struct st_tracked_state st_bind_tes_ssbos = { - "st_bind_tes_ssbos", - { - 0, - ST_NEW_TESSEVAL_PROGRAM | ST_NEW_STORAGE_BUFFER, - }, bind_tes_ssbos }; @@ -200,18 +175,13 @@ struct gl_shader_program *prog = st->ctx->_Shader->CurrentProgram[MESA_SHADER_COMPUTE]; - if (!prog) + if (!prog || !prog->_LinkedShaders[MESA_SHADER_COMPUTE]) return; - st_bind_ssbos(st, prog->_LinkedShaders[MESA_SHADER_COMPUTE], + st_bind_ssbos(st, prog->_LinkedShaders[MESA_SHADER_COMPUTE]->Program, PIPE_SHADER_COMPUTE); } const struct st_tracked_state st_bind_cs_ssbos = { - "st_bind_cs_ssbos", - { - 0, - ST_NEW_COMPUTE_PROGRAM | ST_NEW_STORAGE_BUFFER, - }, bind_cs_ssbos }; diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_atom_tess.c mesa-17.0.7/src/mesa/state_tracker/st_atom_tess.c --- mesa-12.0.6/src/mesa/state_tracker/st_atom_tess.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_atom_tess.c 2017-06-01 10:37:10.000000000 +0000 @@ -53,10 +53,5 @@ const struct st_tracked_state st_update_tess = { - "update_tess", /* name */ - { /* dirty */ - 0, /* mesa */ - ST_NEW_TESS_STATE, /* st */ - }, update_tess /* update */ }; diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_atom_texture.c mesa-17.0.7/src/mesa/state_tracker/st_atom_texture.c --- mesa-12.0.6/src/mesa/state_tracker/st_atom_texture.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_atom_texture.c 2017-06-01 10:37:10.000000000 +0000 @@ -42,6 +42,7 @@ #include "st_context.h" #include "st_atom.h" +#include "st_sampler_view.h" #include "st_texture.h" #include "st_format.h" #include "st_cb_texture.h" @@ -51,320 +52,6 @@ #include "cso_cache/cso_context.h" -/** - * Return swizzle1(swizzle2) - */ -static unsigned -swizzle_swizzle(unsigned swizzle1, unsigned swizzle2) -{ - unsigned i, swz[4]; - - for (i = 0; i < 4; i++) { - unsigned s = GET_SWZ(swizzle1, i); - switch (s) { - case SWIZZLE_X: - case SWIZZLE_Y: - case SWIZZLE_Z: - case SWIZZLE_W: - swz[i] = GET_SWZ(swizzle2, s); - break; - case SWIZZLE_ZERO: - swz[i] = SWIZZLE_ZERO; - break; - case SWIZZLE_ONE: - swz[i] = SWIZZLE_ONE; - break; - default: - assert(!"Bad swizzle term"); - swz[i] = SWIZZLE_X; - } - } - - return MAKE_SWIZZLE4(swz[0], swz[1], swz[2], swz[3]); -} - - -/** - * Given a user-specified texture base format, the actual gallium texture - * format and the current GL_DEPTH_MODE, return a texture swizzle. - * - * Consider the case where the user requests a GL_RGB internal texture - * format the driver actually uses an RGBA format. The A component should - * be ignored and sampling from the texture should always return (r,g,b,1). - * But if we rendered to the texture we might have written A values != 1. - * By sampling the texture with a ".xyz1" swizzle we'll get the expected A=1. - * This function computes the texture swizzle needed to get the expected - * values. - * - * In the case of depth textures, the GL_DEPTH_MODE state determines the - * texture swizzle. - * - * This result must be composed with the user-specified swizzle to get - * the final swizzle. - */ -static unsigned -compute_texture_format_swizzle(GLenum baseFormat, GLenum depthMode, - enum pipe_format actualFormat, - unsigned glsl_version) -{ - switch (baseFormat) { - case GL_RGBA: - return SWIZZLE_XYZW; - case GL_RGB: - if (util_format_has_alpha(actualFormat)) - return MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ONE); - else - return SWIZZLE_XYZW; - case GL_RG: - if (util_format_get_nr_components(actualFormat) > 2) - return MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_ZERO, SWIZZLE_ONE); - else - return SWIZZLE_XYZW; - case GL_RED: - if (util_format_get_nr_components(actualFormat) > 1) - return MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_ZERO, - SWIZZLE_ZERO, SWIZZLE_ONE); - else - return SWIZZLE_XYZW; - case GL_ALPHA: - if (util_format_get_nr_components(actualFormat) > 1) - return MAKE_SWIZZLE4(SWIZZLE_ZERO, SWIZZLE_ZERO, - SWIZZLE_ZERO, SWIZZLE_W); - else - return SWIZZLE_XYZW; - case GL_LUMINANCE: - if (util_format_get_nr_components(actualFormat) > 1) - return MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_ONE); - else - return SWIZZLE_XYZW; - case GL_LUMINANCE_ALPHA: - if (util_format_get_nr_components(actualFormat) > 2) - return MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_W); - else - return SWIZZLE_XYZW; - case GL_INTENSITY: - if (util_format_get_nr_components(actualFormat) > 1) - return SWIZZLE_XXXX; - else - return SWIZZLE_XYZW; - case GL_STENCIL_INDEX: - case GL_DEPTH_STENCIL: - case GL_DEPTH_COMPONENT: - /* Now examine the depth mode */ - switch (depthMode) { - case GL_LUMINANCE: - return MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_ONE); - case GL_INTENSITY: - return MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X); - case GL_ALPHA: - /* The texture(sampler*Shadow) functions from GLSL 1.30 ignore - * the depth mode and return float, while older shadow* functions - * and ARB_fp instructions return vec4 according to the depth mode. - * - * The problem with the GLSL 1.30 functions is that GL_ALPHA forces - * them to return 0, breaking them completely. - * - * A proper fix would increase code complexity and that's not worth - * it for a rarely used feature such as the GL_ALPHA depth mode - * in GL3. Therefore, change GL_ALPHA to GL_INTENSITY for all - * shaders that use GLSL 1.30 or later. - * - * BTW, it's required that sampler views are updated when - * shaders change (check_sampler_swizzle takes care of that). - */ - if (glsl_version && glsl_version >= 130) - return SWIZZLE_XXXX; - else - return MAKE_SWIZZLE4(SWIZZLE_ZERO, SWIZZLE_ZERO, - SWIZZLE_ZERO, SWIZZLE_X); - case GL_RED: - return MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_ZERO, - SWIZZLE_ZERO, SWIZZLE_ONE); - default: - assert(!"Unexpected depthMode"); - return SWIZZLE_XYZW; - } - default: - assert(!"Unexpected baseFormat"); - return SWIZZLE_XYZW; - } -} - - -static unsigned -get_texture_format_swizzle(const struct st_context *st, - const struct st_texture_object *stObj, - unsigned glsl_version) -{ - GLenum baseFormat = _mesa_texture_base_format(&stObj->base); - unsigned tex_swizzle; - - if (baseFormat != GL_NONE) { - GLenum depth_mode = stObj->base.DepthMode; - /* In ES 3.0, DEPTH_TEXTURE_MODE is expected to be GL_RED for textures - * with depth component data specified with a sized internal format. - */ - if (_mesa_is_gles3(st->ctx) && - util_format_is_depth_or_stencil(stObj->pt->format)) { - const struct st_texture_image *firstImage = - st_texture_image_const(_mesa_base_tex_image(&stObj->base)); - if (firstImage->base.InternalFormat != GL_DEPTH_COMPONENT && - firstImage->base.InternalFormat != GL_DEPTH_STENCIL && - firstImage->base.InternalFormat != GL_STENCIL_INDEX) - depth_mode = GL_RED; - } - tex_swizzle = compute_texture_format_swizzle(baseFormat, - depth_mode, - stObj->pt->format, - glsl_version); - } - else { - tex_swizzle = SWIZZLE_XYZW; - } - - /* Combine the texture format swizzle with user's swizzle */ - return swizzle_swizzle(stObj->base._Swizzle, tex_swizzle); -} - - -/** - * Return TRUE if the texture's sampler view swizzle is not equal to - * the texture's swizzle. - * - * \param stObj the st texture object, - */ -static boolean -check_sampler_swizzle(const struct st_context *st, - const struct st_texture_object *stObj, - struct pipe_sampler_view *sv, unsigned glsl_version) -{ - unsigned swizzle = get_texture_format_swizzle(st, stObj, glsl_version); - - return ((sv->swizzle_r != GET_SWZ(swizzle, 0)) || - (sv->swizzle_g != GET_SWZ(swizzle, 1)) || - (sv->swizzle_b != GET_SWZ(swizzle, 2)) || - (sv->swizzle_a != GET_SWZ(swizzle, 3))); -} - - -static unsigned last_level(struct st_texture_object *stObj) -{ - unsigned ret = MIN2(stObj->base.MinLevel + stObj->base._MaxLevel, - stObj->pt->last_level); - if (stObj->base.Immutable) - ret = MIN2(ret, stObj->base.MinLevel + stObj->base.NumLevels - 1); - return ret; -} - -static unsigned last_layer(struct st_texture_object *stObj) -{ - if (stObj->base.Immutable && stObj->pt->array_size > 1) - return MIN2(stObj->base.MinLayer + stObj->base.NumLayers - 1, - stObj->pt->array_size - 1); - return stObj->pt->array_size - 1; -} - -static struct pipe_sampler_view * -st_create_texture_sampler_view_from_stobj(struct st_context *st, - struct st_texture_object *stObj, - enum pipe_format format, - unsigned glsl_version) -{ - struct pipe_sampler_view templ; - unsigned swizzle = get_texture_format_swizzle(st, stObj, glsl_version); - - u_sampler_view_default_template(&templ, - stObj->pt, - format); - - if (stObj->pt->target == PIPE_BUFFER) { - unsigned base, size; - unsigned f, n; - const struct util_format_description *desc - = util_format_description(templ.format); - - base = stObj->base.BufferOffset; - if (base >= stObj->pt->width0) - return NULL; - size = MIN2(stObj->pt->width0 - base, (unsigned)stObj->base.BufferSize); - - f = (base / (desc->block.bits / 8)) * desc->block.width; - n = (size / (desc->block.bits / 8)) * desc->block.width; - if (!n) - return NULL; - templ.u.buf.first_element = f; - templ.u.buf.last_element = f + (n - 1); - } else { - templ.u.tex.first_level = stObj->base.MinLevel + stObj->base.BaseLevel; - templ.u.tex.last_level = last_level(stObj); - assert(templ.u.tex.first_level <= templ.u.tex.last_level); - templ.u.tex.first_layer = stObj->base.MinLayer; - templ.u.tex.last_layer = last_layer(stObj); - assert(templ.u.tex.first_layer <= templ.u.tex.last_layer); - templ.target = gl_target_to_pipe(stObj->base.Target); - } - - templ.swizzle_r = GET_SWZ(swizzle, 0); - templ.swizzle_g = GET_SWZ(swizzle, 1); - templ.swizzle_b = GET_SWZ(swizzle, 2); - templ.swizzle_a = GET_SWZ(swizzle, 3); - - return st->pipe->create_sampler_view(st->pipe, stObj->pt, &templ); -} - - -static struct pipe_sampler_view * -st_get_texture_sampler_view_from_stobj(struct st_context *st, - struct st_texture_object *stObj, - enum pipe_format format, - unsigned glsl_version) -{ - struct pipe_sampler_view **sv; - const struct st_texture_image *firstImage; - if (!stObj || !stObj->pt) { - return NULL; - } - - sv = st_texture_get_sampler_view(st, stObj); - - if (util_format_is_depth_and_stencil(format)) { - if (stObj->base.StencilSampling) - format = util_format_stencil_only(format); - else { - firstImage = st_texture_image_const(_mesa_base_tex_image(&stObj->base)); - if (firstImage->base._BaseFormat == GL_STENCIL_INDEX) - format = util_format_stencil_only(format); - } - } - - /* if sampler view has changed dereference it */ - if (*sv) { - if (check_sampler_swizzle(st, stObj, *sv, glsl_version) || - (format != (*sv)->format) || - gl_target_to_pipe(stObj->base.Target) != (*sv)->target || - stObj->base.MinLevel + stObj->base.BaseLevel != (*sv)->u.tex.first_level || - last_level(stObj) != (*sv)->u.tex.last_level || - stObj->base.MinLayer != (*sv)->u.tex.first_layer || - last_layer(stObj) != (*sv)->u.tex.last_layer) { - pipe_sampler_view_reference(sv, NULL); - } - } - - if (!*sv) { - *sv = st_create_texture_sampler_view_from_stobj(st, stObj, - format, glsl_version); - - } else if ((*sv)->context != st->pipe) { - /* Recreate view in correct context, use existing view as template */ - struct pipe_sampler_view *new_sv = - st->pipe->create_sampler_view(st->pipe, stObj->pt, *sv); - pipe_sampler_view_reference(sv, NULL); - *sv = new_sv; - } - - return *sv; -} - static GLboolean update_single_texture(struct st_context *st, struct pipe_sampler_view **sampler_view, @@ -374,7 +61,6 @@ const struct gl_sampler_object *samp; struct gl_texture_object *texObj; struct st_texture_object *stObj; - enum pipe_format view_format; GLboolean retval; samp = _mesa_get_samplerobj(ctx, texUnit); @@ -387,30 +73,26 @@ } stObj = st_texture_object(texObj); - retval = st_finalize_texture(ctx, st->pipe, texObj); + retval = st_finalize_texture(ctx, st->pipe, texObj, 0); if (!retval) { /* out of mem */ return GL_FALSE; } - /* Determine the format of the texture sampler view */ - if (texObj->Target == GL_TEXTURE_BUFFER) { - view_format = - st_mesa_format_to_pipe_format(st, stObj->base._BufferObjectFormat); - } - else { - view_format = - stObj->surface_based ? stObj->surface_format : stObj->pt->format; - - /* If sRGB decoding is off, use the linear format */ - if (samp->sRGBDecode == GL_SKIP_DECODE_EXT) { - view_format = util_format_linear(view_format); - } + /* Check a few pieces of state outside the texture object to see if we + * need to force revalidation. + */ + if (stObj->prev_glsl_version != glsl_version || + stObj->prev_sRGBDecode != samp->sRGBDecode) { + + st_texture_release_all_sampler_views(st, stObj); + + stObj->prev_glsl_version = glsl_version; + stObj->prev_sRGBDecode = samp->sRGBDecode; } *sampler_view = - st_get_texture_sampler_view_from_stobj(st, stObj, view_format, - glsl_version); + st_get_texture_sampler_view_from_stobj(st, stObj, samp, glsl_version); return GL_TRUE; } @@ -426,11 +108,10 @@ { const GLuint old_max = *num_textures; GLbitfield samplers_used = prog->SamplersUsed; + GLbitfield free_slots = ~prog->SamplersUsed; + GLbitfield external_samplers_used = prog->ExternalSamplersUsed; GLuint unit; - struct gl_shader_program *shader = - st->ctx->_Shader->CurrentProgram[mesa_shader]; - unsigned glsl_version = shader ? shader->Version : 0; - unsigned shader_stage = st_shader_stage_to_ptarget(mesa_shader); + enum pipe_shader_type shader_stage = st_shader_stage_to_ptarget(mesa_shader); if (samplers_used == 0x0 && old_max == 0) return; @@ -442,6 +123,8 @@ struct pipe_sampler_view *sampler_view = NULL; if (samplers_used & 1) { + /* prog->sh.data is NULL if it's ARB_fragment_program */ + unsigned glsl_version = prog->sh.data ? prog->sh.data->Version : 0; const GLuint texUnit = prog->SamplerUnits[unit]; GLboolean retval; @@ -460,6 +143,53 @@ pipe_sampler_view_reference(&(sampler_views[unit]), sampler_view); } + /* For any external samplers with multiplaner YUV, stuff the additional + * sampler views we need at the end. + * + * Trying to cache the sampler view in the stObj looks painful, so just + * re-create the sampler view for the extra planes each time. Main use + * case is video playback (ie. fps games wouldn't be using this) so I + * guess no point to try to optimize this feature. + */ + while (unlikely(external_samplers_used)) { + GLuint unit = u_bit_scan(&external_samplers_used); + GLuint extra = 0; + struct st_texture_object *stObj = + st_get_texture_object(st->ctx, prog, unit); + struct pipe_sampler_view tmpl; + + if (!stObj) + continue; + + /* use original view as template: */ + tmpl = *sampler_views[unit]; + + switch (st_get_view_format(stObj)) { + case PIPE_FORMAT_NV12: + /* we need one additional R8G8 view: */ + tmpl.format = PIPE_FORMAT_RG88_UNORM; + tmpl.swizzle_g = PIPE_SWIZZLE_Y; /* tmpl from Y plane is R8 */ + extra = u_bit_scan(&free_slots); + sampler_views[extra] = + st->pipe->create_sampler_view(st->pipe, stObj->pt->next, &tmpl); + break; + case PIPE_FORMAT_IYUV: + /* we need two additional R8 views: */ + tmpl.format = PIPE_FORMAT_R8_UNORM; + extra = u_bit_scan(&free_slots); + sampler_views[extra] = + st->pipe->create_sampler_view(st->pipe, stObj->pt->next, &tmpl); + extra = u_bit_scan(&free_slots); + sampler_views[extra] = + st->pipe->create_sampler_view(st->pipe, stObj->pt->next->next, &tmpl); + break; + default: + break; + } + + *num_textures = MAX2(*num_textures, extra + 1); + } + cso_set_sampler_views(st->cso_context, shader_stage, *num_textures, @@ -476,7 +206,7 @@ if (ctx->Const.Program[MESA_SHADER_VERTEX].MaxTextureImageUnits > 0) { update_textures(st, MESA_SHADER_VERTEX, - &ctx->VertexProgram._Current->Base, + ctx->VertexProgram._Current, ctx->Const.Program[MESA_SHADER_VERTEX].MaxTextureImageUnits, st->state.sampler_views[PIPE_SHADER_VERTEX], &st->state.num_sampler_views[PIPE_SHADER_VERTEX]); @@ -491,7 +221,7 @@ update_textures(st, MESA_SHADER_FRAGMENT, - &ctx->FragmentProgram._Current->Base, + ctx->FragmentProgram._Current, ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits, st->state.sampler_views[PIPE_SHADER_FRAGMENT], &st->state.num_sampler_views[PIPE_SHADER_FRAGMENT]); @@ -506,7 +236,7 @@ if (ctx->GeometryProgram._Current) { update_textures(st, MESA_SHADER_GEOMETRY, - &ctx->GeometryProgram._Current->Base, + ctx->GeometryProgram._Current, ctx->Const.Program[MESA_SHADER_GEOMETRY].MaxTextureImageUnits, st->state.sampler_views[PIPE_SHADER_GEOMETRY], &st->state.num_sampler_views[PIPE_SHADER_GEOMETRY]); @@ -522,7 +252,7 @@ if (ctx->TessCtrlProgram._Current) { update_textures(st, MESA_SHADER_TESS_CTRL, - &ctx->TessCtrlProgram._Current->Base, + ctx->TessCtrlProgram._Current, ctx->Const.Program[MESA_SHADER_TESS_CTRL].MaxTextureImageUnits, st->state.sampler_views[PIPE_SHADER_TESS_CTRL], &st->state.num_sampler_views[PIPE_SHADER_TESS_CTRL]); @@ -538,7 +268,7 @@ if (ctx->TessEvalProgram._Current) { update_textures(st, MESA_SHADER_TESS_EVAL, - &ctx->TessEvalProgram._Current->Base, + ctx->TessEvalProgram._Current, ctx->Const.Program[MESA_SHADER_TESS_EVAL].MaxTextureImageUnits, st->state.sampler_views[PIPE_SHADER_TESS_EVAL], &st->state.num_sampler_views[PIPE_SHADER_TESS_EVAL]); @@ -554,7 +284,7 @@ if (ctx->ComputeProgram._Current) { update_textures(st, MESA_SHADER_COMPUTE, - &ctx->ComputeProgram._Current->Base, + ctx->ComputeProgram._Current, ctx->Const.Program[MESA_SHADER_COMPUTE].MaxTextureImageUnits, st->state.sampler_views[PIPE_SHADER_COMPUTE], &st->state.num_sampler_views[PIPE_SHADER_COMPUTE]); @@ -563,60 +293,30 @@ const struct st_tracked_state st_update_fragment_texture = { - "st_update_texture", /* name */ - { /* dirty */ - _NEW_TEXTURE, /* mesa */ - ST_NEW_FRAGMENT_PROGRAM | ST_NEW_SAMPLER_VIEWS, /* st */ - }, update_fragment_textures /* update */ }; const struct st_tracked_state st_update_vertex_texture = { - "st_update_vertex_texture", /* name */ - { /* dirty */ - _NEW_TEXTURE, /* mesa */ - ST_NEW_VERTEX_PROGRAM | ST_NEW_SAMPLER_VIEWS, /* st */ - }, update_vertex_textures /* update */ }; const struct st_tracked_state st_update_geometry_texture = { - "st_update_geometry_texture", /* name */ - { /* dirty */ - _NEW_TEXTURE, /* mesa */ - ST_NEW_GEOMETRY_PROGRAM | ST_NEW_SAMPLER_VIEWS, /* st */ - }, update_geometry_textures /* update */ }; const struct st_tracked_state st_update_tessctrl_texture = { - "st_update_tessctrl_texture", /* name */ - { /* dirty */ - _NEW_TEXTURE, /* mesa */ - ST_NEW_TESSCTRL_PROGRAM | ST_NEW_SAMPLER_VIEWS, /* st */ - }, update_tessctrl_textures /* update */ }; const struct st_tracked_state st_update_tesseval_texture = { - "st_update_tesseval_texture", /* name */ - { /* dirty */ - _NEW_TEXTURE, /* mesa */ - ST_NEW_TESSEVAL_PROGRAM | ST_NEW_SAMPLER_VIEWS, /* st */ - }, update_tesseval_textures /* update */ }; const struct st_tracked_state st_update_compute_texture = { - "st_update_compute_texture", /* name */ - { /* dirty */ - _NEW_TEXTURE, /* mesa */ - ST_NEW_COMPUTE_PROGRAM | ST_NEW_SAMPLER_VIEWS, /* st */ - }, update_compute_textures /* update */ }; diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_atom_viewport.c mesa-17.0.7/src/mesa/state_tracker/st_atom_viewport.c --- mesa-12.0.6/src/mesa/state_tracker/st_atom_viewport.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_atom_viewport.c 2017-06-01 10:37:10.000000000 +0000 @@ -83,10 +83,5 @@ const struct st_tracked_state st_update_viewport = { - "st_update_viewport", /* name */ - { /* dirty */ - _NEW_BUFFERS | _NEW_VIEWPORT, /* mesa */ - 0, /* st */ - }, update_viewport /* update */ }; diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_cb_bitmap.c mesa-17.0.7/src/mesa/state_tracker/st_cb_bitmap.c --- mesa-12.0.6/src/mesa/state_tracker/st_cb_bitmap.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_cb_bitmap.c 2017-06-01 10:37:10.000000000 +0000 @@ -45,6 +45,7 @@ #include "st_draw.h" #include "st_program.h" #include "st_cb_bitmap.h" +#include "st_sampler_view.h" #include "st_texture.h" #include "pipe/p_context.h" @@ -211,8 +212,7 @@ GLfloat colorSave[4]; COPY_4V(colorSave, ctx->Current.Attrib[VERT_ATTRIB_COLOR0]); COPY_4V(ctx->Current.Attrib[VERT_ATTRIB_COLOR0], color); - st_upload_constants(st, st->fp->Base.Base.Parameters, - PIPE_SHADER_FRAGMENT); + st_upload_constants(st, st->fp->Base.Parameters, MESA_SHADER_FRAGMENT); COPY_4V(ctx->Current.Attrib[VERT_ATTRIB_COLOR0], colorSave); } @@ -347,7 +347,7 @@ restore_render_state(ctx); /* We uploaded modified constants, need to invalidate them. */ - st->dirty.mesa |= _NEW_PROGRAM_CONSTANTS; + st->dirty |= ST_NEW_FS_CONSTANTS; } @@ -636,16 +636,19 @@ assert(width > 0); assert(height > 0); + st_invalidate_readpix_cache(st); + if (!st->bitmap.cache) { init_bitmap_state(st); } - /* We only need to validate state of the st dirty flags are set or - * any non-_NEW_PROGRAM_CONSTANTS mesa flags are set. The VS we use + /* We only need to validate any non-ST_NEW_CONSTANTS state. The VS we use * for bitmap drawing uses no constants and the FS constants are * explicitly uploaded in the draw_bitmap_quad() function. */ - if ((st->dirty.mesa & ~_NEW_PROGRAM_CONSTANTS) || st->dirty.st) { + if ((st->dirty | ctx->NewDriverState) & ~ST_NEW_CONSTANTS & + ST_PIPELINE_RENDER_STATE_MASK || + st->gfx_shaders_may_be_dirty) { st_validate_state(st, ST_PIPELINE_RENDER); } @@ -702,6 +705,7 @@ st_flush_bitmap_cache(st); st_validate_state(st, ST_PIPELINE_RENDER); + st_invalidate_readpix_cache(st); sv = st_create_texture_sampler_view(pipe, stObj->pt); if (!sv) { @@ -800,7 +804,7 @@ pipe_sampler_view_reference(&sv, NULL); /* We uploaded modified constants, need to invalidate them. */ - st->dirty.mesa |= _NEW_PROGRAM_CONSTANTS; + st->dirty |= ST_NEW_FS_CONSTANTS; } diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_cb_bitmap.h mesa-17.0.7/src/mesa/state_tracker/st_cb_bitmap.h --- mesa-12.0.6/src/mesa/state_tracker/st_cb_bitmap.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_cb_bitmap.h 2017-06-01 10:37:10.000000000 +0000 @@ -35,7 +35,7 @@ struct dd_function_table; struct st_context; -struct gl_fragment_program; +struct gl_program; struct st_fragment_program; extern void diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_cb_blit.c mesa-17.0.7/src/mesa/state_tracker/st_cb_blit.c --- mesa-12.0.6/src/mesa/state_tracker/st_cb_blit.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_cb_blit.c 2017-06-01 10:37:10.000000000 +0000 @@ -40,38 +40,10 @@ #include "st_cb_blit.h" #include "st_cb_fbo.h" #include "st_manager.h" +#include "st_scissor.h" #include "util/u_format.h" - -static void -st_adjust_blit_for_msaa_resolve(struct pipe_blit_info *blit) -{ - /* Even though we do multisample resolves at the time of the blit, OpenGL - * specification defines them as if they happen at the time of rendering, - * which means that the type of averaging we do during the resolve should - * only depend on the source format; the destination format should be - * ignored. But, specification doesn't seem to be strict about it. - * - * It has been observed that mulitisample resolves produce slightly better - * looking images when averaging is done using destination format. NVIDIA's - * proprietary OpenGL driver also follows this approach. - * - * When multisampling, if the source and destination formats are equal - * (aside from the color space), we choose to blit in sRGB space to get - * this higher quality image. - */ - if (blit->src.resource->nr_samples > 1 && - blit->dst.resource->nr_samples <= 1) { - blit->dst.format = blit->dst.resource->format; - - if (util_format_is_srgb(blit->dst.resource->format)) - blit->src.format = util_format_srgb(blit->src.resource->format); - else - blit->src.format = util_format_linear(blit->src.resource->format); - } -} - static void st_BlitFramebuffer(struct gl_context *ctx, struct gl_framebuffer *readFB, @@ -96,6 +68,7 @@ /* Make sure bitmap rendering has landed in the framebuffers */ st_flush_bitmap_cache(st); + st_invalidate_readpix_cache(st); clip.srcX0 = srcX0; clip.srcY0 = srcY0; @@ -117,6 +90,7 @@ &clip.dstX0, &clip.dstY0, &clip.dstX1, &clip.dstY1)) { return; /* nothing to draw/blit */ } + memset(&blit, 0, sizeof(struct pipe_blit_info)); blit.scissor_enable = (dstX0 != clip.dstX0) || (dstY0 != clip.dstY0) || @@ -190,6 +164,9 @@ blit.src.box.height = srcY0 - srcY1; } + if (drawFB != ctx->WinSysDrawBuffer) + st_window_rectangles_to_blit(ctx, &blit); + blit.filter = pFilter; blit.render_condition_enable = TRUE; blit.alpha_blend = FALSE; @@ -213,20 +190,25 @@ st_renderbuffer(drawFB->_ColorDrawBuffers[i]); if (dstRb) { - struct pipe_surface *dstSurf = dstRb->surface; + struct pipe_surface *dstSurf; + + st_update_renderbuffer_surface(st, dstRb); + + dstSurf = dstRb->surface; if (dstSurf) { blit.dst.resource = dstSurf->texture; blit.dst.level = dstSurf->u.tex.level; blit.dst.box.z = dstSurf->u.tex.first_layer; - blit.dst.format = util_format_linear(dstSurf->format); + blit.dst.format = dstSurf->format; blit.src.resource = srcObj->pt; blit.src.level = srcAtt->TextureLevel; blit.src.box.z = srcAtt->Zoffset + srcAtt->CubeMapFace; - blit.src.format = util_format_linear(srcObj->pt->format); + blit.src.format = srcObj->pt->format; - st_adjust_blit_for_msaa_resolve(&blit); + if (!ctx->Color.sRGBEnabled) + blit.src.format = util_format_linear(blit.src.format); st->pipe->blit(st->pipe, &blit); dstRb->defined = true; /* front buffer tracking */ @@ -240,9 +222,13 @@ struct pipe_surface *srcSurf; GLuint i; - if (!srcRb || !srcRb->surface) { + if (!srcRb) + return; + + st_update_renderbuffer_surface(st, srcRb); + + if (!srcRb->surface) return; - } srcSurf = srcRb->surface; @@ -251,20 +237,22 @@ st_renderbuffer(drawFB->_ColorDrawBuffers[i]); if (dstRb) { - struct pipe_surface *dstSurf = dstRb->surface; + struct pipe_surface *dstSurf; + + st_update_renderbuffer_surface(st, dstRb); + + dstSurf = dstRb->surface; if (dstSurf) { blit.dst.resource = dstSurf->texture; blit.dst.level = dstSurf->u.tex.level; blit.dst.box.z = dstSurf->u.tex.first_layer; - blit.dst.format = util_format_linear(dstSurf->format); + blit.dst.format = dstSurf->format; blit.src.resource = srcSurf->texture; blit.src.level = srcSurf->u.tex.level; blit.src.box.z = srcSurf->u.tex.first_layer; - blit.src.format = util_format_linear(srcSurf->format); - - st_adjust_blit_for_msaa_resolve(&blit); + blit.src.format = srcSurf->format; st->pipe->blit(st->pipe, &blit); dstRb->defined = true; /* front buffer tracking */ diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_cb_bufferobjects.c mesa-17.0.7/src/mesa/state_tracker/st_cb_bufferobjects.c --- mesa-12.0.6/src/mesa/state_tracker/st_cb_bufferobjects.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_cb_bufferobjects.c 2017-06-01 10:37:10.000000000 +0000 @@ -196,12 +196,9 @@ * This should be the same as creating a new buffer, but we avoid * a lot of validation in Mesa. */ - struct pipe_box box; - - u_box_1d(0, size, &box); - pipe->transfer_inline_write(pipe, st_obj->buffer, 0, - PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE, - &box, data, 0, 0); + pipe->buffer_subdata(pipe, st_obj->buffer, + PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE, + 0, size, data); return GL_TRUE; } else if (screen->get_param(screen, PIPE_CAP_INVALIDATE_BUFFER)) { pipe->invalidate_resource(pipe, st_obj->buffer); @@ -251,10 +248,14 @@ /* Set usage. */ if (st_obj->Base.Immutable) { /* BufferStorage */ - if (storageFlags & GL_CLIENT_STORAGE_BIT) - pipe_usage = PIPE_USAGE_STAGING; - else + if (storageFlags & GL_CLIENT_STORAGE_BIT) { + if (storageFlags & GL_MAP_READ_BIT) + pipe_usage = PIPE_USAGE_STAGING; + else + pipe_usage = PIPE_USAGE_STREAM; + } else { pipe_usage = PIPE_USAGE_DEFAULT; + } } else { /* BufferData */ @@ -336,15 +337,15 @@ * might be using it. */ /* TODO: Add arrays to usage history */ - st->dirty.st |= ST_NEW_VERTEX_ARRAYS; + ctx->NewDriverState |= ST_NEW_VERTEX_ARRAYS; if (st_obj->Base.UsageHistory & USAGE_UNIFORM_BUFFER) - st->dirty.st |= ST_NEW_UNIFORM_BUFFER; + ctx->NewDriverState |= ST_NEW_UNIFORM_BUFFER; if (st_obj->Base.UsageHistory & USAGE_SHADER_STORAGE_BUFFER) - st->dirty.st |= ST_NEW_STORAGE_BUFFER; + ctx->NewDriverState |= ST_NEW_STORAGE_BUFFER; if (st_obj->Base.UsageHistory & USAGE_TEXTURE_BUFFER) - st->dirty.st |= ST_NEW_SAMPLER_VIEWS | ST_NEW_IMAGE_UNITS; + ctx->NewDriverState |= ST_NEW_SAMPLER_VIEWS | ST_NEW_IMAGE_UNITS; if (st_obj->Base.UsageHistory & USAGE_ATOMIC_COUNTER_BUFFER) - st->dirty.st |= ST_NEW_ATOMIC_BUFFER; + ctx->NewDriverState |= ST_NEW_ATOMIC_BUFFER; return GL_TRUE; } diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_cb_clear.c mesa-17.0.7/src/mesa/state_tracker/st_cb_clear.c --- mesa-12.0.6/src/mesa/state_tracker/st_cb_clear.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_cb_clear.c 2017-06-01 10:37:10.000000000 +0000 @@ -318,8 +318,20 @@ return (ctx->Scissor.EnableFlags & 1) && (scissor->X > 0 || scissor->Y > 0 || - scissor->X + scissor->Width < rb->Width || - scissor->Y + scissor->Height < rb->Height); + scissor->X + scissor->Width < (int)rb->Width || + scissor->Y + scissor->Height < (int)rb->Height); +} + +/** + * Return if window rectangles must be enabled during the clear. + */ +static inline bool +is_window_rectangle_enabled(struct gl_context *ctx) +{ + if (ctx->DrawBuffer == ctx->WinSysDrawBuffer) + return false; + return ctx->Scissor.NumWindowRects > 0 || + ctx->Scissor.WindowRectMode == GL_INCLUSIVE_EXT; } @@ -391,6 +403,7 @@ GLuint i; st_flush_bitmap_cache(st); + st_invalidate_readpix_cache(st); /* This makes sure the pipe has the latest scissor, etc values */ st_validate_state( st, ST_PIPELINE_RENDER ); @@ -412,6 +425,7 @@ continue; if (is_scissor_enabled(ctx, rb) || + is_window_rectangle_enabled(ctx) || is_color_masked(ctx, colormask_index)) quad_buffers |= PIPE_CLEAR_COLOR0 << i; else @@ -424,7 +438,8 @@ struct st_renderbuffer *strb = st_renderbuffer(depthRb); if (strb->surface && ctx->Depth.Mask) { - if (is_scissor_enabled(ctx, depthRb)) + if (is_scissor_enabled(ctx, depthRb) || + is_window_rectangle_enabled(ctx)) quad_buffers |= PIPE_CLEAR_DEPTH; else clear_buffers |= PIPE_CLEAR_DEPTH; @@ -435,6 +450,7 @@ if (strb->surface && !is_stencil_disabled(ctx, stencilRb)) { if (is_scissor_enabled(ctx, stencilRb) || + is_window_rectangle_enabled(ctx) || is_stencil_masked(ctx, stencilRb)) quad_buffers |= PIPE_CLEAR_STENCIL; else diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_cb_compute.c mesa-17.0.7/src/mesa/state_tracker/st_cb_compute.c --- mesa-12.0.6/src/mesa/state_tracker/st_cb_compute.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_cb_compute.c 2017-06-01 10:37:10.000000000 +0000 @@ -36,6 +36,7 @@ static void st_dispatch_compute_common(struct gl_context *ctx, const GLuint *num_groups, + const GLuint *group_size, struct pipe_resource *indirect, GLintptr indirect_offset) { @@ -46,15 +47,17 @@ struct pipe_grid_info info = { 0 }; st_flush_bitmap_cache(st); + st_invalidate_readpix_cache(st); if (ctx->NewState) _mesa_update_state(ctx); - if (st->dirty_cp.st || st->dirty_cp.mesa || ctx->NewDriverState) + if ((st->dirty | ctx->NewDriverState) & ST_PIPELINE_COMPUTE_STATE_MASK || + st->compute_shader_may_be_dirty) st_validate_state(st, ST_PIPELINE_COMPUTE); for (unsigned i = 0; i < 3; i++) { - info.block[i] = prog->Comp.LocalSize[i]; + info.block[i] = group_size ? group_size[i] : prog->Comp.LocalSize[i]; info.grid[i] = num_groups ? num_groups[i] : 0; } @@ -69,7 +72,7 @@ static void st_dispatch_compute(struct gl_context *ctx, const GLuint *num_groups) { - st_dispatch_compute_common(ctx, num_groups, NULL, 0); + st_dispatch_compute_common(ctx, num_groups, NULL, NULL, 0); } static void st_dispatch_compute_indirect(struct gl_context *ctx, @@ -78,11 +81,19 @@ struct gl_buffer_object *indirect_buffer = ctx->DispatchIndirectBuffer; struct pipe_resource *indirect = st_buffer_object(indirect_buffer)->buffer; - st_dispatch_compute_common(ctx, NULL, indirect, indirect_offset); + st_dispatch_compute_common(ctx, NULL, NULL, indirect, indirect_offset); +} + +static void st_dispatch_compute_group_size(struct gl_context *ctx, + const GLuint *num_groups, + const GLuint *group_size) +{ + st_dispatch_compute_common(ctx, num_groups, group_size, NULL, 0); } void st_init_compute_functions(struct dd_function_table *functions) { functions->DispatchCompute = st_dispatch_compute; functions->DispatchComputeIndirect = st_dispatch_compute_indirect; + functions->DispatchComputeGroupSize = st_dispatch_compute_group_size; } diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_cb_copyimage.c mesa-17.0.7/src/mesa/state_tracker/st_cb_copyimage.c --- mesa-12.0.6/src/mesa/state_tracker/st_cb_copyimage.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_cb_copyimage.c 2017-06-01 10:37:10.000000000 +0000 @@ -532,6 +532,90 @@ src_box); } +/* Note, the only allowable compressed format for this function is ETC */ +static void +fallback_copy_image(struct st_context *st, + struct gl_texture_image *dst_image, + struct pipe_resource *dst_res, + int dst_x, int dst_y, int dst_z, + struct gl_texture_image *src_image, + struct pipe_resource *src_res, + int src_x, int src_y, int src_z, + int src_w, int src_h) +{ + uint8_t *dst, *src; + int dst_stride, src_stride; + struct pipe_transfer *dst_transfer, *src_transfer; + unsigned line_bytes; + + bool dst_is_compressed = dst_image && _mesa_is_format_compressed(dst_image->TexFormat); + bool src_is_compressed = src_image && _mesa_is_format_compressed(src_image->TexFormat); + + unsigned dst_w = src_w; + unsigned dst_h = src_h; + unsigned lines = src_h; + + if (src_is_compressed && !dst_is_compressed) { + dst_w = DIV_ROUND_UP(dst_w, 4); + dst_h = DIV_ROUND_UP(dst_h, 4); + } else if (!src_is_compressed && dst_is_compressed) { + dst_w *= 4; + dst_h *= 4; + } + if (src_is_compressed) { + lines = DIV_ROUND_UP(lines, 4); + } + + if (src_image) + line_bytes = _mesa_format_row_stride(src_image->TexFormat, src_w); + else + line_bytes = _mesa_format_row_stride(dst_image->TexFormat, dst_w); + + if (dst_image) { + st->ctx->Driver.MapTextureImage( + st->ctx, dst_image, dst_z, + dst_x, dst_y, dst_w, dst_h, + GL_MAP_WRITE_BIT, &dst, &dst_stride); + } else { + dst = pipe_transfer_map(st->pipe, dst_res, 0, dst_z, + PIPE_TRANSFER_WRITE, + dst_x, dst_y, dst_w, dst_h, + &dst_transfer); + dst_stride = dst_transfer->stride; + } + + if (src_image) { + st->ctx->Driver.MapTextureImage( + st->ctx, src_image, src_z, + src_x, src_y, src_w, src_h, + GL_MAP_READ_BIT, &src, &src_stride); + } else { + src = pipe_transfer_map(st->pipe, src_res, 0, src_z, + PIPE_TRANSFER_READ, + src_x, src_y, src_w, src_h, + &src_transfer); + src_stride = src_transfer->stride; + } + + for (int y = 0; y < lines; y++) { + memcpy(dst, src, line_bytes); + dst += dst_stride; + src += src_stride; + } + + if (dst_image) { + st->ctx->Driver.UnmapTextureImage(st->ctx, dst_image, dst_z); + } else { + pipe_transfer_unmap(st->pipe, dst_transfer); + } + + if (src_image) { + st->ctx->Driver.UnmapTextureImage(st->ctx, src_image, src_z); + } else { + pipe_transfer_unmap(st->pipe, src_transfer); + } +} + static void st_CopyImageSubData(struct gl_context *ctx, struct gl_texture_image *src_image, @@ -547,8 +631,10 @@ struct pipe_resource *src_res, *dst_res; struct pipe_box box; int src_level, dst_level; + int orig_src_z = src_z, orig_dst_z = dst_z; st_flush_bitmap_cache(st); + st_invalidate_readpix_cache(st); if (src_image) { struct st_texture_image *src = st_texture_image(src_image); @@ -582,8 +668,15 @@ u_box_2d_zslice(src_x, src_y, src_z, src_width, src_height, &box); - copy_image(pipe, dst_res, dst_level, dst_x, dst_y, dst_z, - src_res, src_level, &box); + if ((src_image && st_etc_fallback(st, src_image)) || + (dst_image && st_etc_fallback(st, dst_image))) { + fallback_copy_image(st, dst_image, dst_res, dst_x, dst_y, orig_dst_z, + src_image, src_res, src_x, src_y, orig_src_z, + src_width, src_height); + } else { + copy_image(pipe, dst_res, dst_level, dst_x, dst_y, dst_z, + src_res, src_level, &box); + } } void diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_cb_drawpixels.c mesa-17.0.7/src/mesa/state_tracker/st_cb_drawpixels.c --- mesa-12.0.6/src/mesa/state_tracker/st_cb_drawpixels.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_cb_drawpixels.c 2017-06-01 10:37:10.000000000 +0000 @@ -60,6 +60,8 @@ #include "st_draw.h" #include "st_format.h" #include "st_program.h" +#include "st_sampler_view.h" +#include "st_scissor.h" #include "st_texture.h" #include "pipe/p_context.h" @@ -1071,6 +1073,7 @@ assert(ctx->NewState == 0x0); st_flush_bitmap_cache(st); + st_invalidate_readpix_cache(st); st_validate_state(st, ST_PIPELINE_RENDER); @@ -1120,8 +1123,7 @@ /* compiling a new fragment shader variant added new state constants * into the constant buffer, we need to update them */ - st_upload_constants(st, st->fp->Base.Base.Parameters, - PIPE_SHADER_FRAGMENT); + st_upload_constants(st, st->fp->Base.Parameters, MESA_SHADER_FRAGMENT); } /* Put glDrawPixels image into a texture */ @@ -1394,6 +1396,9 @@ blit.mask = PIPE_MASK_RGBA; blit.filter = PIPE_TEX_FILTER_NEAREST; + if (ctx->DrawBuffer != ctx->WinSysDrawBuffer) + st_window_rectangles_to_blit(ctx, &blit); + if (screen->is_format_supported(screen, blit.src.format, blit.src.resource->target, blit.src.resource->nr_samples, @@ -1433,6 +1438,7 @@ struct gl_pixelstore_attrib pack = ctx->DefaultPacking; st_flush_bitmap_cache(st); + st_invalidate_readpix_cache(st); st_validate_state(st, ST_PIPELINE_RENDER); @@ -1480,8 +1486,7 @@ /* compiling a new fragment shader variant added new state constants * into the constant buffer, we need to update them */ - st_upload_constants(st, st->fp->Base.Base.Parameters, - PIPE_SHADER_FRAGMENT); + st_upload_constants(st, st->fp->Base.Parameters, MESA_SHADER_FRAGMENT); } else { assert(type == GL_DEPTH); diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_cb_drawtex.c mesa-17.0.7/src/mesa/state_tracker/st_cb_drawtex.c --- mesa-12.0.6/src/mesa/state_tracker/st_cb_drawtex.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_cb_drawtex.c 2017-06-01 10:37:10.000000000 +0000 @@ -118,11 +118,12 @@ unsigned offset; st_flush_bitmap_cache(st); + st_invalidate_readpix_cache(st); st_validate_state(st, ST_PIPELINE_RENDER); /* determine if we need vertex color */ - if (ctx->FragmentProgram._Current->Base.InputsRead & VARYING_BIT_COL0) + if (ctx->FragmentProgram._Current->info.inputs_read & VARYING_BIT_COL0) emitColor = GL_TRUE; else emitColor = GL_FALSE; diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_cb_eglimage.c mesa-17.0.7/src/mesa/state_tracker/st_cb_eglimage.c --- mesa-12.0.6/src/mesa/state_tracker/st_cb_eglimage.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_cb_eglimage.c 2017-06-01 10:37:10.000000000 +0000 @@ -35,6 +35,8 @@ #include "st_texture.h" #include "st_format.h" #include "st_manager.h" +#include "st_sampler_view.h" + /** * Return the base format just like _mesa_base_fbo_format does. @@ -119,6 +121,24 @@ texFormat = st_pipe_format_to_mesa_format(ps->format); + /* TODO RequiredTextureImageUnits should probably be reset back + * to 1 somewhere if different texture is bound?? + */ + if (texFormat == MESA_FORMAT_NONE) { + switch (ps->format) { + case PIPE_FORMAT_NV12: + texFormat = MESA_FORMAT_R_UNORM8; + texObj->RequiredTextureImageUnits = 2; + break; + case PIPE_FORMAT_IYUV: + texFormat = MESA_FORMAT_R_UNORM8; + texObj->RequiredTextureImageUnits = 3; + break; + default: + unreachable("bad YUV format!"); + } + } + _mesa_init_teximage_fields(ctx, texImage, ps->width, ps->height, 1, 0, internalFormat, texFormat); diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_cb_fbo.c mesa-17.0.7/src/mesa/state_tracker/st_cb_fbo.c --- mesa-12.0.6/src/mesa/state_tracker/st_cb_fbo.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_cb_fbo.c 2017-06-01 10:37:10.000000000 +0000 @@ -266,7 +266,7 @@ /** - * Allocate a renderbuffer for a an on-screen window (not a user-created + * Allocate a renderbuffer for an on-screen window (not a user-created * renderbuffer). The window system code determines the format. */ struct gl_renderbuffer * @@ -488,7 +488,7 @@ struct st_renderbuffer *strb = st_renderbuffer(rb); struct pipe_resource *pt; - if (!st_finalize_texture(ctx, pipe, att->Texture)) + if (!st_finalize_texture(ctx, pipe, att->Texture, att->CubeMapFace)) return; pt = st_get_texobj_resource(att->Texture); @@ -704,7 +704,7 @@ /* add the renderbuffers on demand */ for (i = 0; i < fb->_NumColorDrawBuffers; i++) { - gl_buffer_index idx = fb->_ColorDrawBufferIndexes[i]; + GLint idx = fb->_ColorDrawBufferIndexes[i]; if (idx >= 0) { st_manager_add_color_renderbuffer(st, fb, idx); diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_cb_fbo.h mesa-17.0.7/src/mesa/state_tracker/st_cb_fbo.h --- mesa-12.0.6/src/mesa/state_tracker/st_cb_fbo.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_cb_fbo.h 2017-06-01 10:37:10.000000000 +0000 @@ -30,6 +30,7 @@ #define ST_CB_FBO_H #include "main/compiler.h" +#include "main/fbobject.h" #include "main/glheader.h" #include "main/mtypes.h" @@ -58,6 +59,8 @@ boolean software; void *data; + bool use_readpix_cache; + /* Inputs from Driver.RenderTexture, don't use directly. */ boolean is_rtt; /**< whether Driver.RenderTexture was called */ unsigned rtt_face, rtt_slice; @@ -72,6 +75,22 @@ } +/** + * Cast wrapper to convert a struct gl_framebuffer to an st_framebuffer. + * Return NULL if the struct gl_framebuffer is a user-created framebuffer. + * We'll only return non-null for window system framebuffers. + * Note that this function may fail. + */ +static inline struct st_framebuffer * +st_ws_framebuffer(struct gl_framebuffer *fb) +{ + /* FBO cannot be casted. See st_new_framebuffer */ + if (fb && _mesa_is_winsys_fbo(fb)) + return (struct st_framebuffer *) fb; + return NULL; +} + + extern struct gl_renderbuffer * st_new_renderbuffer_fb(enum pipe_format format, int samples, boolean sw); diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_cb_feedback.c mesa-17.0.7/src/mesa/state_tracker/st_cb_feedback.c --- mesa-12.0.6/src/mesa/state_tracker/st_cb_feedback.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_cb_feedback.c 2017-06-01 10:37:10.000000000 +0000 @@ -46,6 +46,7 @@ #include "st_context.h" #include "st_draw.h" #include "st_cb_feedback.h" +#include "st_program.h" #include "pipe/p_context.h" #include "pipe/p_defines.h" @@ -274,7 +275,10 @@ st_RenderMode(struct gl_context *ctx, GLenum newMode ) { struct st_context *st = st_context(ctx); - struct draw_context *draw = st->draw; + struct draw_context *draw = st_get_draw_context(st); + + if (!st->draw) + return; if (newMode == GL_RENDER) { /* restore normal VBO draw function */ @@ -288,13 +292,16 @@ vbo_set_draw_func(ctx, st_feedback_draw_vbo); } else { + struct gl_program *vp = st->ctx->VertexProgram._Current; + if (!st->feedback_stage) st->feedback_stage = draw_glfeedback_stage(ctx, draw); draw_set_rasterize_stage(draw, st->feedback_stage); /* Plug in new vbo draw function */ vbo_set_draw_func(ctx, st_feedback_draw_vbo); /* need to generate/use a vertex program that emits pos/color/tex */ - st->dirty.st |= ST_NEW_VERTEX_PROGRAM; + if (vp) + st->dirty |= ST_NEW_VERTEX_PROGRAM(st, st_vertex_program(vp)); } } diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_cb_flush.c mesa-17.0.7/src/mesa/state_tracker/st_cb_flush.c --- mesa-12.0.6/src/mesa/state_tracker/st_cb_flush.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_cb_flush.c 2017-06-01 10:37:10.000000000 +0000 @@ -98,7 +98,7 @@ st_flush(st, &fence, 0); if(fence) { - st->pipe->screen->fence_finish(st->pipe->screen, fence, + st->pipe->screen->fence_finish(st->pipe->screen, NULL, fence, PIPE_TIMEOUT_INFINITE); st->pipe->screen->fence_reference(st->pipe->screen, &fence, NULL); } @@ -141,19 +141,9 @@ } -/** - * Query information about GPU resets observed by this context - * - * Called via \c dd_function_table::GetGraphicsResetStatus. - */ static GLenum -st_get_graphics_reset_status(struct gl_context *ctx) +gl_reset_status_from_pipe_reset_status(enum pipe_reset_status status) { - struct st_context *st = st_context(ctx); - enum pipe_reset_status status; - - status = st->pipe->get_device_reset_status(st->pipe); - switch (status) { case PIPE_NO_RESET: return GL_NO_ERROR; @@ -169,6 +159,52 @@ } } + +/** + * Query information about GPU resets observed by this context + * + * Called via \c dd_function_table::GetGraphicsResetStatus. + */ +static GLenum +st_get_graphics_reset_status(struct gl_context *ctx) +{ + struct st_context *st = st_context(ctx); + enum pipe_reset_status status; + + if (st->reset_status != PIPE_NO_RESET) { + status = st->reset_status; + st->reset_status = PIPE_NO_RESET; + } else { + status = st->pipe->get_device_reset_status(st->pipe); + } + + return gl_reset_status_from_pipe_reset_status(status); +} + + +static void +st_device_reset_callback(void *data, enum pipe_reset_status status) +{ + struct st_context *st = data; + + assert(status != PIPE_NO_RESET); + + st->reset_status = status; + _mesa_set_context_lost_dispatch(st->ctx); +} + + +void +st_install_device_reset_callback(struct st_context *st) +{ + if (st->pipe->set_device_reset_callback) { + struct pipe_device_reset_callback cb; + cb.reset = st_device_reset_callback; + cb.data = st; + st->pipe->set_device_reset_callback(st->pipe, &cb); + } +} + void st_init_flush_functions(struct pipe_screen *screen, struct dd_function_table *functions) diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_cb_flush.h mesa-17.0.7/src/mesa/state_tracker/st_cb_flush.h --- mesa-12.0.6/src/mesa/state_tracker/st_cb_flush.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_cb_flush.h 2017-06-01 10:37:10.000000000 +0000 @@ -48,6 +48,9 @@ extern void st_finish(struct st_context *st); +extern void +st_install_device_reset_callback(struct st_context *st); + #endif /* ST_CB_FLUSH_H */ diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_cb_program.c mesa-17.0.7/src/mesa/state_tracker/st_cb_program.c --- mesa-12.0.6/src/mesa/state_tracker/st_cb_program.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_cb_program.c 2017-06-01 10:37:10.000000000 +0000 @@ -49,88 +49,44 @@ #include "st_atifs_to_tgsi.h" - -/** - * Called via ctx->Driver.BindProgram() to bind an ARB vertex or - * fragment program. - */ -static void -st_bind_program(struct gl_context *ctx, GLenum target, struct gl_program *prog) -{ - struct st_context *st = st_context(ctx); - - switch (target) { - case GL_VERTEX_PROGRAM_ARB: - st->dirty.st |= ST_NEW_VERTEX_PROGRAM; - break; - case GL_FRAGMENT_PROGRAM_ARB: - st->dirty.st |= ST_NEW_FRAGMENT_PROGRAM; - break; - case GL_GEOMETRY_PROGRAM_NV: - st->dirty.st |= ST_NEW_GEOMETRY_PROGRAM; - break; - case GL_TESS_CONTROL_PROGRAM_NV: - st->dirty.st |= ST_NEW_TESSCTRL_PROGRAM; - break; - case GL_TESS_EVALUATION_PROGRAM_NV: - st->dirty.st |= ST_NEW_TESSEVAL_PROGRAM; - break; - case GL_COMPUTE_PROGRAM_NV: - st->dirty_cp.st |= ST_NEW_COMPUTE_PROGRAM; - break; - } -} - - -/** - * Called via ctx->Driver.UseProgram() to bind a linked GLSL program - * (vertex shader + fragment shader). - */ -static void -st_use_program(struct gl_context *ctx, struct gl_shader_program *shProg) -{ - struct st_context *st = st_context(ctx); - - st->dirty.st |= ST_NEW_FRAGMENT_PROGRAM; - st->dirty.st |= ST_NEW_VERTEX_PROGRAM; - st->dirty.st |= ST_NEW_GEOMETRY_PROGRAM; - st->dirty.st |= ST_NEW_TESSCTRL_PROGRAM; - st->dirty.st |= ST_NEW_TESSEVAL_PROGRAM; - st->dirty_cp.st |= ST_NEW_COMPUTE_PROGRAM; -} - - /** * Called via ctx->Driver.NewProgram() to allocate a new vertex or * fragment program. */ static struct gl_program * -st_new_program(struct gl_context *ctx, GLenum target, GLuint id) +st_new_program(struct gl_context *ctx, GLenum target, GLuint id, + bool is_arb_asm) { switch (target) { case GL_VERTEX_PROGRAM_ARB: { - struct st_vertex_program *prog = ST_CALLOC_STRUCT(st_vertex_program); - return _mesa_init_gl_program(&prog->Base.Base, target, id); + struct st_vertex_program *prog = rzalloc(NULL, + struct st_vertex_program); + return _mesa_init_gl_program(&prog->Base, target, id, is_arb_asm); } case GL_FRAGMENT_PROGRAM_ARB: { - struct st_fragment_program *prog = ST_CALLOC_STRUCT(st_fragment_program); - return _mesa_init_gl_program(&prog->Base.Base, target, id); + struct st_fragment_program *prog = rzalloc(NULL, + struct st_fragment_program); + return _mesa_init_gl_program(&prog->Base, target, id, is_arb_asm); } case GL_GEOMETRY_PROGRAM_NV: { - struct st_geometry_program *prog = ST_CALLOC_STRUCT(st_geometry_program); - return _mesa_init_gl_program(&prog->Base.Base, target, id); + struct st_geometry_program *prog = rzalloc(NULL, + struct st_geometry_program); + return _mesa_init_gl_program(&prog->Base, target, id, is_arb_asm); } case GL_TESS_CONTROL_PROGRAM_NV: { - struct st_tessctrl_program *prog = ST_CALLOC_STRUCT(st_tessctrl_program); - return _mesa_init_gl_program(&prog->Base.Base, target, id); + struct st_tessctrl_program *prog = rzalloc(NULL, + struct st_tessctrl_program); + return _mesa_init_gl_program(&prog->Base, target, id, is_arb_asm); } case GL_TESS_EVALUATION_PROGRAM_NV: { - struct st_tesseval_program *prog = ST_CALLOC_STRUCT(st_tesseval_program); - return _mesa_init_gl_program(&prog->Base.Base, target, id); + struct st_tesseval_program *prog = rzalloc(NULL, + struct st_tesseval_program); + return _mesa_init_gl_program(&prog->Base, target, id, is_arb_asm); } case GL_COMPUTE_PROGRAM_NV: { - struct st_compute_program *prog = ST_CALLOC_STRUCT(st_compute_program); - return _mesa_init_gl_program(&prog->Base.Base, target, id); + struct st_compute_program *prog = rzalloc(NULL, + struct st_compute_program); + return _mesa_init_gl_program(&prog->Base, target, id, is_arb_asm); } default: assert(0); @@ -162,8 +118,8 @@ struct st_geometry_program *stgp = (struct st_geometry_program *) prog; - st_release_basic_variants(st, stgp->Base.Base.Target, - &stgp->variants, &stgp->tgsi); + st_release_basic_variants(st, stgp->Base.Target, &stgp->variants, + &stgp->tgsi); if (stgp->glsl_to_tgsi) free_glsl_to_tgsi_visitor(stgp->glsl_to_tgsi); @@ -185,8 +141,8 @@ struct st_tessctrl_program *sttcp = (struct st_tessctrl_program *) prog; - st_release_basic_variants(st, sttcp->Base.Base.Target, - &sttcp->variants, &sttcp->tgsi); + st_release_basic_variants(st, sttcp->Base.Target, &sttcp->variants, + &sttcp->tgsi); if (sttcp->glsl_to_tgsi) free_glsl_to_tgsi_visitor(sttcp->glsl_to_tgsi); @@ -197,7 +153,7 @@ struct st_tesseval_program *sttep = (struct st_tesseval_program *) prog; - st_release_basic_variants(st, sttep->Base.Base.Target, + st_release_basic_variants(st, sttep->Base.Target, &sttep->variants, &sttep->tgsi); if (sttep->glsl_to_tgsi) @@ -245,18 +201,18 @@ return false; if (st->fp == stfp) - st->dirty.st |= ST_NEW_FRAGMENT_PROGRAM; + st->dirty |= stfp->affected_states; } else if (target == GL_GEOMETRY_PROGRAM_NV) { struct st_geometry_program *stgp = (struct st_geometry_program *) prog; - st_release_basic_variants(st, stgp->Base.Base.Target, - &stgp->variants, &stgp->tgsi); + st_release_basic_variants(st, stgp->Base.Target, &stgp->variants, + &stgp->tgsi); if (!st_translate_geometry_program(st, stgp)) return false; if (st->gp == stgp) - st->dirty.st |= ST_NEW_GEOMETRY_PROGRAM; + st->dirty |= stgp->affected_states; } else if (target == GL_VERTEX_PROGRAM_ARB) { struct st_vertex_program *stvp = (struct st_vertex_program *) prog; @@ -266,31 +222,31 @@ return false; if (st->vp == stvp) - st->dirty.st |= ST_NEW_VERTEX_PROGRAM; + st->dirty |= ST_NEW_VERTEX_PROGRAM(st, stvp); } else if (target == GL_TESS_CONTROL_PROGRAM_NV) { struct st_tessctrl_program *sttcp = (struct st_tessctrl_program *) prog; - st_release_basic_variants(st, sttcp->Base.Base.Target, - &sttcp->variants, &sttcp->tgsi); + st_release_basic_variants(st, sttcp->Base.Target, &sttcp->variants, + &sttcp->tgsi); if (!st_translate_tessctrl_program(st, sttcp)) return false; if (st->tcp == sttcp) - st->dirty.st |= ST_NEW_TESSCTRL_PROGRAM; + st->dirty |= sttcp->affected_states; } else if (target == GL_TESS_EVALUATION_PROGRAM_NV) { struct st_tesseval_program *sttep = (struct st_tesseval_program *) prog; - st_release_basic_variants(st, sttep->Base.Base.Target, - &sttep->variants, &sttep->tgsi); + st_release_basic_variants(st, sttep->Base.Target, &sttep->variants, + &sttep->tgsi); if (!st_translate_tesseval_program(st, sttep)) return false; if (st->tep == sttep) - st->dirty.st |= ST_NEW_TESSEVAL_PROGRAM; + st->dirty |= sttep->affected_states; } else if (target == GL_COMPUTE_PROGRAM_NV) { struct st_compute_program *stcp = @@ -301,7 +257,7 @@ return false; if (st->cp == stcp) - st->dirty_cp.st |= ST_NEW_COMPUTE_PROGRAM; + st->dirty |= stcp->affected_states; } else if (target == GL_FRAGMENT_SHADER_ATI) { assert(prog); @@ -317,7 +273,7 @@ return false; if (st->fp == stfp) - st->dirty.st |= ST_NEW_FRAGMENT_PROGRAM; + st->dirty |= stfp->affected_states; } if (ST_DEBUG & DEBUG_PRECOMPILE || @@ -335,7 +291,7 @@ st_new_ati_fs(struct gl_context *ctx, struct ati_fragment_shader *curProg) { struct gl_program *prog = ctx->Driver.NewProgram(ctx, GL_FRAGMENT_PROGRAM_ARB, - curProg->Id); + curProg->Id, true); struct st_fragment_program *stfp = (struct st_fragment_program *)prog; stfp->ati_fs = curProg; return prog; @@ -347,8 +303,6 @@ void st_init_program_functions(struct dd_function_table *functions) { - functions->BindProgram = st_bind_program; - functions->UseProgram = st_use_program; functions->NewProgram = st_new_program; functions->DeleteProgram = st_delete_program; functions->ProgramStringNotify = st_program_string_notify; diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_cb_rasterpos.c mesa-17.0.7/src/mesa/state_tracker/st_cb_rasterpos.c --- mesa-12.0.6/src/mesa/state_tracker/st_cb_rasterpos.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_cb_rasterpos.c 2017-06-01 10:37:10.000000000 +0000 @@ -59,8 +59,8 @@ struct gl_context *ctx; /**< Rendering context */ /* vertex attrib info we can setup once and re-use */ - struct gl_client_array array[VERT_ATTRIB_MAX]; - const struct gl_client_array *arrays[VERT_ATTRIB_MAX]; + struct gl_vertex_array array[VERT_ATTRIB_MAX]; + const struct gl_vertex_array *arrays[VERT_ATTRIB_MAX]; struct _mesa_prim prim; }; @@ -196,10 +196,8 @@ rs->array[i].Size = 4; rs->array[i].Type = GL_FLOAT; rs->array[i].Format = GL_RGBA; - rs->array[i].Stride = 0; rs->array[i].StrideB = 0; rs->array[i].Ptr = (GLubyte *) ctx->Current.Attrib[i]; - rs->array[i].Enabled = GL_TRUE; rs->array[i].Normalized = GL_TRUE; rs->array[i].BufferObj = NULL; rs->arrays[i] = &rs->array[i]; @@ -221,9 +219,12 @@ st_RasterPos(struct gl_context *ctx, const GLfloat v[4]) { struct st_context *st = st_context(ctx); - struct draw_context *draw = st->draw; + struct draw_context *draw = st_get_draw_context(st); struct rastpos_stage *rs; - const struct gl_client_array **saved_arrays = ctx->Array._DrawArrays; + const struct gl_vertex_array **saved_arrays = ctx->Array._DrawArrays; + + if (!st->draw) + return; if (ctx->VertexProgram._Current == NULL || ctx->VertexProgram._Current == ctx->VertexProgram._TnlProgram) { diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_cb_readpixels.c mesa-17.0.7/src/mesa/state_tracker/st_cb_readpixels.c --- mesa-12.0.6/src/mesa/state_tracker/st_cb_readpixels.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_cb_readpixels.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,6 +25,7 @@ * **************************************************************************/ +#include "main/bufferobj.h" #include "main/image.h" #include "main/pbo.h" #include "main/imports.h" @@ -33,16 +34,38 @@ #include "main/framebuffer.h" #include "util/u_inlines.h" #include "util/u_format.h" +#include "cso_cache/cso_context.h" #include "st_cb_fbo.h" #include "st_atom.h" #include "st_context.h" #include "st_cb_bitmap.h" #include "st_cb_readpixels.h" +#include "st_debug.h" #include "state_tracker/st_cb_texture.h" #include "state_tracker/st_format.h" +#include "state_tracker/st_pbo.h" #include "state_tracker/st_texture.h" +/* The readpixels cache caches a blitted staging texture so that back-to-back + * calls to glReadPixels with user pointers require less CPU-GPU synchronization. + * + * Assumptions: + * + * (1) Blits have high synchronization overheads, and it is beneficial to + * use a single blit of the entire framebuffer instead of many smaller + * blits (because the smaller blits cannot be batched, and we have to wait + * for the GPU after each one). + * + * (2) transfer_map implicitly involves a blit as well (for de-tiling, copy + * from VRAM, etc.), so that it is beneficial to replace the + * _mesa_readpixels path as well when possible. + * + * Change this #define to true to fill and use the cache whenever possible + * (this is inefficient and only meant for testing / debugging). + */ +#define ALWAYS_READPIXELS_CACHE false + static boolean needs_integer_signed_unsigned_conversion(const struct gl_context *ctx, GLenum format, GLenum type) @@ -68,6 +91,302 @@ return FALSE; } +static bool +try_pbo_readpixels(struct st_context *st, struct st_renderbuffer *strb, + bool invert_y, + GLint x, GLint y, GLsizei width, GLsizei height, + enum pipe_format src_format, enum pipe_format dst_format, + const struct gl_pixelstore_attrib *pack, void *pixels) +{ + struct pipe_context *pipe = st->pipe; + struct pipe_screen *screen = pipe->screen; + struct cso_context *cso = st->cso_context; + struct pipe_surface *surface = strb->surface; + struct pipe_resource *texture = strb->texture; + const struct util_format_description *desc; + struct st_pbo_addresses addr; + struct pipe_framebuffer_state fb; + enum pipe_texture_target view_target; + bool success = false; + + if (texture->nr_samples > 1) + return false; + + if (!screen->is_format_supported(screen, dst_format, PIPE_BUFFER, 0, + PIPE_BIND_SHADER_IMAGE)) + return false; + + desc = util_format_description(dst_format); + + /* Compute PBO addresses */ + addr.bytes_per_pixel = desc->block.bits / 8; + addr.xoffset = x; + addr.yoffset = y; + addr.width = width; + addr.height = height; + addr.depth = 1; + if (!st_pbo_addresses_pixelstore(st, GL_TEXTURE_2D, false, pack, pixels, &addr)) + return false; + + cso_save_state(cso, (CSO_BIT_FRAGMENT_SAMPLER_VIEWS | + CSO_BIT_FRAGMENT_SAMPLERS | + CSO_BIT_FRAGMENT_IMAGE0 | + CSO_BIT_BLEND | + CSO_BIT_VERTEX_ELEMENTS | + CSO_BIT_AUX_VERTEX_BUFFER_SLOT | + CSO_BIT_FRAMEBUFFER | + CSO_BIT_VIEWPORT | + CSO_BIT_RASTERIZER | + CSO_BIT_DEPTH_STENCIL_ALPHA | + CSO_BIT_STREAM_OUTPUTS | + CSO_BIT_PAUSE_QUERIES | + CSO_BIT_SAMPLE_MASK | + CSO_BIT_MIN_SAMPLES | + CSO_BIT_RENDER_CONDITION | + CSO_BITS_ALL_SHADERS)); + cso_save_constant_buffer_slot0(cso, PIPE_SHADER_FRAGMENT); + + cso_set_sample_mask(cso, ~0); + cso_set_min_samples(cso, 1); + cso_set_render_condition(cso, NULL, FALSE, 0); + + /* Set up the sampler_view */ + { + struct pipe_sampler_view templ; + struct pipe_sampler_view *sampler_view; + struct pipe_sampler_state sampler = {0}; + const struct pipe_sampler_state *samplers[1] = {&sampler}; + + u_sampler_view_default_template(&templ, texture, src_format); + + switch (texture->target) { + case PIPE_TEXTURE_CUBE: + case PIPE_TEXTURE_CUBE_ARRAY: + view_target = PIPE_TEXTURE_2D_ARRAY; + break; + default: + view_target = texture->target; + break; + } + + templ.target = view_target; + templ.u.tex.first_level = surface->u.tex.level; + templ.u.tex.last_level = templ.u.tex.first_level; + + if (view_target != PIPE_TEXTURE_3D) { + templ.u.tex.first_layer = surface->u.tex.first_layer; + templ.u.tex.last_layer = templ.u.tex.last_layer; + } else { + addr.constants.layer_offset = surface->u.tex.first_layer; + } + + sampler_view = pipe->create_sampler_view(pipe, texture, &templ); + if (sampler_view == NULL) + goto fail; + + cso_set_sampler_views(cso, PIPE_SHADER_FRAGMENT, 1, &sampler_view); + + pipe_sampler_view_reference(&sampler_view, NULL); + + cso_set_samplers(cso, PIPE_SHADER_FRAGMENT, 1, samplers); + } + + /* Set up destination image */ + { + struct pipe_image_view image; + + memset(&image, 0, sizeof(image)); + image.resource = addr.buffer; + image.format = dst_format; + image.access = PIPE_IMAGE_ACCESS_WRITE; + image.u.buf.offset = addr.first_element * addr.bytes_per_pixel; + image.u.buf.size = (addr.last_element - addr.first_element + 1) * + addr.bytes_per_pixel; + + cso_set_shader_images(cso, PIPE_SHADER_FRAGMENT, 0, 1, &image); + } + + /* Set up no-attachment framebuffer */ + memset(&fb, 0, sizeof(fb)); + fb.width = surface->width; + fb.height = surface->height; + fb.samples = 1; + fb.layers = 1; + cso_set_framebuffer(cso, &fb); + + /* Any blend state would do. Set this just to prevent drivers having + * blend == NULL. + */ + cso_set_blend(cso, &st->pbo.upload_blend); + + cso_set_viewport_dims(cso, fb.width, fb.height, invert_y); + + if (invert_y) + st_pbo_addresses_invert_y(&addr, fb.height); + + { + struct pipe_depth_stencil_alpha_state dsa; + memset(&dsa, 0, sizeof(dsa)); + cso_set_depth_stencil_alpha(cso, &dsa); + } + + /* Set up the fragment shader */ + { + void *fs = st_pbo_get_download_fs(st, view_target, src_format, dst_format); + if (!fs) + goto fail; + + cso_set_fragment_shader_handle(cso, fs); + } + + success = st_pbo_draw(st, &addr, fb.width, fb.height); + + /* Buffer written via shader images needs explicit synchronization. */ + pipe->memory_barrier(pipe, PIPE_BARRIER_ALL); + +fail: + cso_restore_state(cso); + cso_restore_constant_buffer_slot0(cso, PIPE_SHADER_FRAGMENT); + + return success; +} + +/* Invalidate the readpixels cache to ensure we don't read stale data. + */ +void st_invalidate_readpix_cache(struct st_context *st) +{ + pipe_resource_reference(&st->readpix_cache.src, NULL); + pipe_resource_reference(&st->readpix_cache.cache, NULL); +} + +/** + * Create a staging texture and blit the requested region to it. + */ +static struct pipe_resource * +blit_to_staging(struct st_context *st, struct st_renderbuffer *strb, + bool invert_y, + GLint x, GLint y, GLsizei width, GLsizei height, + GLenum format, + enum pipe_format src_format, enum pipe_format dst_format) +{ + struct pipe_context *pipe = st->pipe; + struct pipe_screen *screen = pipe->screen; + struct pipe_resource dst_templ; + struct pipe_resource *dst; + struct pipe_blit_info blit; + + /* We are creating a texture of the size of the region being read back. + * Need to check for NPOT texture support. */ + if (!screen->get_param(screen, PIPE_CAP_NPOT_TEXTURES) && + (!util_is_power_of_two(width) || + !util_is_power_of_two(height))) + return NULL; + + /* create the destination texture */ + memset(&dst_templ, 0, sizeof(dst_templ)); + dst_templ.target = PIPE_TEXTURE_2D; + dst_templ.format = dst_format; + if (util_format_is_depth_or_stencil(dst_format)) + dst_templ.bind |= PIPE_BIND_DEPTH_STENCIL; + else + dst_templ.bind |= PIPE_BIND_RENDER_TARGET; + dst_templ.usage = PIPE_USAGE_STAGING; + + st_gl_texture_dims_to_pipe_dims(GL_TEXTURE_2D, width, height, 1, + &dst_templ.width0, &dst_templ.height0, + &dst_templ.depth0, &dst_templ.array_size); + + dst = screen->resource_create(screen, &dst_templ); + if (!dst) + return NULL; + + memset(&blit, 0, sizeof(blit)); + blit.src.resource = strb->texture; + blit.src.level = strb->surface->u.tex.level; + blit.src.format = src_format; + blit.dst.resource = dst; + blit.dst.level = 0; + blit.dst.format = dst->format; + blit.src.box.x = x; + blit.dst.box.x = 0; + blit.src.box.y = y; + blit.dst.box.y = 0; + blit.src.box.z = strb->surface->u.tex.first_layer; + blit.dst.box.z = 0; + blit.src.box.width = blit.dst.box.width = width; + blit.src.box.height = blit.dst.box.height = height; + blit.src.box.depth = blit.dst.box.depth = 1; + blit.mask = st_get_blit_mask(strb->Base._BaseFormat, format); + blit.filter = PIPE_TEX_FILTER_NEAREST; + blit.scissor_enable = FALSE; + + if (invert_y) { + blit.src.box.y = strb->Base.Height - blit.src.box.y; + blit.src.box.height = -blit.src.box.height; + } + + /* blit */ + st->pipe->blit(st->pipe, &blit); + + return dst; +} + +static struct pipe_resource * +try_cached_readpixels(struct st_context *st, struct st_renderbuffer *strb, + bool invert_y, + GLsizei width, GLsizei height, + GLenum format, + enum pipe_format src_format, enum pipe_format dst_format) +{ + struct pipe_resource *src = strb->texture; + struct pipe_resource *dst = NULL; + + if (ST_DEBUG & DEBUG_NOREADPIXCACHE) + return NULL; + + /* Reset cache after invalidation or switch of parameters. */ + if (st->readpix_cache.src != src || + st->readpix_cache.dst_format != dst_format || + st->readpix_cache.level != strb->surface->u.tex.level || + st->readpix_cache.layer != strb->surface->u.tex.first_layer) { + pipe_resource_reference(&st->readpix_cache.src, src); + pipe_resource_reference(&st->readpix_cache.cache, NULL); + st->readpix_cache.dst_format = dst_format; + st->readpix_cache.level = strb->surface->u.tex.level; + st->readpix_cache.layer = strb->surface->u.tex.first_layer; + st->readpix_cache.hits = 0; + } + + /* Decide whether to trigger the cache. */ + if (!st->readpix_cache.cache) { + if (!strb->use_readpix_cache && !ALWAYS_READPIXELS_CACHE) { + /* Heuristic: If previous successive calls read at least a fraction + * of the surface _and_ we read again, trigger the cache. + */ + unsigned threshold = MAX2(1, strb->Base.Width * strb->Base.Height / 8); + + if (st->readpix_cache.hits < threshold) { + st->readpix_cache.hits += width * height; + return NULL; + } + + strb->use_readpix_cache = true; + } + + /* Fill the cache */ + st->readpix_cache.cache = blit_to_staging(st, strb, invert_y, + 0, 0, + strb->Base.Width, + strb->Base.Height, format, + src_format, dst_format); + } + + /* Return an owning reference to stay consistent with the non-cached path */ + pipe_resource_reference(&dst, st->readpix_cache.cache); + + return dst; +} + /** * This uses a blit to copy the read buffer to a texture format which matches * the format and type combo and then a fast read-back is done using memcpy. @@ -95,12 +414,11 @@ struct pipe_screen *screen = pipe->screen; struct pipe_resource *src; struct pipe_resource *dst = NULL; - struct pipe_resource dst_templ; enum pipe_format dst_format, src_format; - struct pipe_blit_info blit; - unsigned bind = PIPE_BIND_TRANSFER_READ; + unsigned bind; struct pipe_transfer *tex_xfer; ubyte *map = NULL; + int dst_x, dst_y; /* Validate state (to be sure we have up-to-date framebuffer surfaces) * and flush the bitmap cache prior to reading. */ @@ -120,14 +438,6 @@ goto fallback; } - /* We are creating a texture of the size of the region being read back. - * Need to check for NPOT texture support. */ - if (!screen->get_param(screen, PIPE_CAP_NPOT_TEXTURES) && - (!util_is_power_of_two(width) || - !util_is_power_of_two(height))) { - goto fallback; - } - /* If the base internal format and the texture format don't match, we have * to use the slow path. */ if (rb->_BaseFormat != @@ -135,22 +445,10 @@ goto fallback; } - /* See if the texture format already matches the format and type, - * in which case the memcpy-based fast path will likely be used and - * we don't have to blit. */ - if (_mesa_format_matches_format_and_type(rb->Format, format, - type, pack->SwapBytes, NULL)) { - goto fallback; - } - if (_mesa_readpixels_needs_slow_path(ctx, format, type, GL_TRUE)) { goto fallback; } - if (needs_integer_signed_unsigned_conversion(ctx, format, type)) { - goto fallback; - } - /* Convert the source format to what is expected by ReadPixels * and see if it's supported. */ src_format = util_format_linear(src->format); @@ -165,9 +463,9 @@ } if (format == GL_DEPTH_COMPONENT || format == GL_DEPTH_STENCIL) - bind |= PIPE_BIND_DEPTH_STENCIL; + bind = PIPE_BIND_DEPTH_STENCIL; else - bind |= PIPE_BIND_RENDER_TARGET; + bind = PIPE_BIND_RENDER_TARGET; /* Choose the destination format by finding the best match * for the format+type combo. */ @@ -177,55 +475,53 @@ goto fallback; } - /* create the destination texture */ - memset(&dst_templ, 0, sizeof(dst_templ)); - dst_templ.target = PIPE_TEXTURE_2D; - dst_templ.format = dst_format; - dst_templ.bind = bind; - dst_templ.usage = PIPE_USAGE_STAGING; - - st_gl_texture_dims_to_pipe_dims(GL_TEXTURE_2D, width, height, 1, - &dst_templ.width0, &dst_templ.height0, - &dst_templ.depth0, &dst_templ.array_size); + if (st->pbo.download_enabled && _mesa_is_bufferobj(pack->BufferObj)) { + if (try_pbo_readpixels(st, strb, + st_fb_orientation(ctx->ReadBuffer) == Y_0_TOP, + x, y, width, height, + src_format, dst_format, + pack, pixels)) + return; + } - dst = screen->resource_create(screen, &dst_templ); - if (!dst) { + if (needs_integer_signed_unsigned_conversion(ctx, format, type)) { goto fallback; } - memset(&blit, 0, sizeof(blit)); - blit.src.resource = src; - blit.src.level = strb->surface->u.tex.level; - blit.src.format = src_format; - blit.dst.resource = dst; - blit.dst.level = 0; - blit.dst.format = dst->format; - blit.src.box.x = x; - blit.dst.box.x = 0; - blit.src.box.y = y; - blit.dst.box.y = 0; - blit.src.box.z = strb->surface->u.tex.first_layer; - blit.dst.box.z = 0; - blit.src.box.width = blit.dst.box.width = width; - blit.src.box.height = blit.dst.box.height = height; - blit.src.box.depth = blit.dst.box.depth = 1; - blit.mask = st_get_blit_mask(rb->_BaseFormat, format); - blit.filter = PIPE_TEX_FILTER_NEAREST; - blit.scissor_enable = FALSE; + /* Cache a staging texture for back-to-back ReadPixels, to avoid CPU-GPU + * synchronization overhead. + */ + dst = try_cached_readpixels(st, strb, + st_fb_orientation(ctx->ReadBuffer) == Y_0_TOP, + width, height, format, src_format, dst_format); + if (dst) { + dst_x = x; + dst_y = y; + } else { + /* See if the texture format already matches the format and type, + * in which case the memcpy-based fast path will likely be used and + * we don't have to blit. */ + if (_mesa_format_matches_format_and_type(rb->Format, format, + type, pack->SwapBytes, NULL)) { + goto fallback; + } - if (st_fb_orientation(ctx->ReadBuffer) == Y_0_TOP) { - blit.src.box.y = rb->Height - blit.src.box.y; - blit.src.box.height = -blit.src.box.height; - } + dst = blit_to_staging(st, strb, + st_fb_orientation(ctx->ReadBuffer) == Y_0_TOP, + x, y, width, height, format, + src_format, dst_format); + if (!dst) + goto fallback; - /* blit */ - st->pipe->blit(st->pipe, &blit); + dst_x = 0; + dst_y = 0; + } /* map resources */ pixels = _mesa_map_pbo_dest(ctx, pack, pixels); map = pipe_transfer_map_3d(pipe, dst, 0, PIPE_TRANSFER_READ, - 0, 0, 0, width, height, 1, &tex_xfer); + dst_x, dst_y, 0, width, height, 1, &tex_xfer); if (!map) { _mesa_unmap_pbo_dest(ctx, pack); pipe_resource_reference(&dst, NULL); @@ -235,14 +531,21 @@ /* memcpy data into a user buffer */ { const uint bytesPerRow = width * util_format_get_blocksize(dst_format); - GLuint row; - - for (row = 0; row < (unsigned) height; row++) { - void *dest = _mesa_image_address2d(pack, pixels, - width, height, format, - type, row, 0); - memcpy(dest, map, bytesPerRow); - map += tex_xfer->stride; + const int destStride = _mesa_image_row_stride(pack, width, format, type); + char *dest = _mesa_image_address2d(pack, pixels, + width, height, format, + type, 0, 0); + + if (tex_xfer->stride == bytesPerRow && destStride == bytesPerRow) { + memcpy(dest, map, bytesPerRow * height); + } else { + GLuint row; + + for (row = 0; row < (unsigned) height; row++) { + memcpy(dest, map, bytesPerRow); + map += tex_xfer->stride; + dest += destStride; + } } } diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_cb_syncobj.c mesa-17.0.7/src/mesa/state_tracker/st_cb_syncobj.c --- mesa-12.0.6/src/mesa/state_tracker/st_cb_syncobj.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_cb_syncobj.c 2017-06-01 10:37:10.000000000 +0000 @@ -41,16 +41,21 @@ struct gl_sync_object b; struct pipe_fence_handle *fence; + mtx_t mutex; /**< protects "fence" */ }; static struct gl_sync_object * st_new_sync_object(struct gl_context *ctx, GLenum type) { - if (type == GL_SYNC_FENCE) - return (struct gl_sync_object*)CALLOC_STRUCT(st_sync_object); - else + if (type == GL_SYNC_FENCE) { + struct st_sync_object *so = CALLOC_STRUCT(st_sync_object); + + mtx_init(&so->mutex, mtx_plain); + return &so->b; + } else { return NULL; + } } static void st_delete_sync_object(struct gl_context *ctx, @@ -60,6 +65,7 @@ struct st_sync_object *so = (struct st_sync_object*)obj; screen->fence_reference(screen, &so->fence, NULL); + mtx_destroy(&so->mutex); free(so->b.Label); free(so); } @@ -73,47 +79,56 @@ assert(condition == GL_SYNC_GPU_COMMANDS_COMPLETE && flags == 0); assert(so->fence == NULL); - pipe->flush(pipe, &so->fence, 0); -} - -static void st_check_sync(struct gl_context *ctx, struct gl_sync_object *obj) -{ - struct pipe_screen *screen = st_context(ctx)->pipe->screen; - struct st_sync_object *so = (struct st_sync_object*)obj; - - /* If the fence doesn't exist, assume it's signalled. */ - if (!so->fence) { - so->b.StatusFlag = GL_TRUE; - return; - } - - if (screen->fence_finish(screen, so->fence, 0)) { - screen->fence_reference(screen, &so->fence, NULL); - so->b.StatusFlag = GL_TRUE; - } + pipe->flush(pipe, &so->fence, PIPE_FLUSH_DEFERRED); } static void st_client_wait_sync(struct gl_context *ctx, struct gl_sync_object *obj, GLbitfield flags, GLuint64 timeout) { - struct pipe_screen *screen = st_context(ctx)->pipe->screen; + struct pipe_context *pipe = st_context(ctx)->pipe; + struct pipe_screen *screen = pipe->screen; struct st_sync_object *so = (struct st_sync_object*)obj; + struct pipe_fence_handle *fence = NULL; /* If the fence doesn't exist, assume it's signalled. */ + mtx_lock(&so->mutex); if (!so->fence) { + mtx_unlock(&so->mutex); so->b.StatusFlag = GL_TRUE; return; } - /* We don't care about GL_SYNC_FLUSH_COMMANDS_BIT, because flush is - * already called when creating a fence. */ - - if (so->fence && - screen->fence_finish(screen, so->fence, timeout)) { + /* We need a local copy of the fence pointer, so that we can call + * fence_finish unlocked. + */ + screen->fence_reference(screen, &fence, so->fence); + mtx_unlock(&so->mutex); + + /* Section 4.1.2 of OpenGL 4.5 (Compatibility Profile) says: + * [...] if ClientWaitSync is called and all of the following are true: + * - the SYNC_FLUSH_COMMANDS_BIT bit is set in flags, + * - sync is unsignaled when ClientWaitSync is called, + * - and the calls to ClientWaitSync and FenceSync were issued from + * the same context, + * then the GL will behave as if the equivalent of Flush were inserted + * immediately after the creation of sync. + * + * Assume GL_SYNC_FLUSH_COMMANDS_BIT is always set, because applications + * forget to set it. + */ + if (screen->fence_finish(screen, pipe, fence, timeout)) { + mtx_lock(&so->mutex); screen->fence_reference(screen, &so->fence, NULL); + mtx_unlock(&so->mutex); so->b.StatusFlag = GL_TRUE; } + screen->fence_reference(screen, &fence, NULL); +} + +static void st_check_sync(struct gl_context *ctx, struct gl_sync_object *obj) +{ + st_client_wait_sync(ctx, obj, 0, 0); } static void st_server_wait_sync(struct gl_context *ctx, diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_cb_texturebarrier.c mesa-17.0.7/src/mesa/state_tracker/st_cb_texturebarrier.c --- mesa-12.0.6/src/mesa/state_tracker/st_cb_texturebarrier.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_cb_texturebarrier.c 2017-06-01 10:37:10.000000000 +0000 @@ -50,7 +50,19 @@ { struct pipe_context *pipe = st_context(ctx)->pipe; - pipe->texture_barrier(pipe); + pipe->texture_barrier(pipe, PIPE_TEXTURE_BARRIER_SAMPLER); +} + + +/** + * Called via ctx->Driver.BlendBarrier() + */ +static void +st_BlendBarrier(struct gl_context *ctx) +{ + struct pipe_context *pipe = st_context(ctx)->pipe; + + pipe->texture_barrier(pipe, PIPE_TEXTURE_BARRIER_FRAMEBUFFER); } @@ -118,5 +130,6 @@ void st_init_texture_barrier_functions(struct dd_function_table *functions) { functions->TextureBarrier = st_TextureBarrier; + functions->BlendBarrier = st_BlendBarrier; functions->MemoryBarrier = st_MemoryBarrier; } diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_cb_texture.c mesa-17.0.7/src/mesa/state_tracker/st_cb_texture.c --- mesa-12.0.6/src/mesa/state_tracker/st_cb_texture.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_cb_texture.c 2017-06-01 10:37:10.000000000 +0000 @@ -54,9 +54,11 @@ #include "state_tracker/st_cb_texture.h" #include "state_tracker/st_cb_bufferobjects.h" #include "state_tracker/st_format.h" +#include "state_tracker/st_pbo.h" #include "state_tracker/st_texture.h" #include "state_tracker/st_gen_mipmap.h" #include "state_tracker/st_atom.h" +#include "state_tracker/st_sampler_view.h" #include "pipe/p_context.h" #include "pipe/p_defines.h" @@ -175,6 +177,8 @@ st_FreeTextureImageBuffer(struct gl_context *ctx, struct gl_texture_image *texImage) { + struct st_context *st = st_context(ctx); + struct st_texture_object *stObj = st_texture_object(texImage->TexObject); struct st_texture_image *stImage = st_texture_image(texImage); DBG("%s\n", __func__); @@ -186,8 +190,44 @@ free(stImage->transfer); stImage->transfer = NULL; stImage->num_transfers = 0; + + if (stImage->etc_data) { + free(stImage->etc_data); + stImage->etc_data = NULL; + } + + /* if the texture image is being deallocated, the structure of the + * texture is changing so we'll likely need a new sampler view. + */ + st_texture_release_all_sampler_views(st, stObj); +} + +bool +st_etc_fallback(struct st_context *st, struct gl_texture_image *texImage) +{ + return (_mesa_is_format_etc2(texImage->TexFormat) && !st->has_etc2) || + (texImage->TexFormat == MESA_FORMAT_ETC1_RGB8 && !st->has_etc1); } +static void +etc_fallback_allocate(struct st_context *st, struct st_texture_image *stImage) +{ + struct gl_texture_image *texImage = &stImage->base; + + if (!st_etc_fallback(st, texImage)) + return; + + if (stImage->etc_data) + free(stImage->etc_data); + + unsigned data_size = _mesa_format_image_size(texImage->TexFormat, + texImage->Width2, + texImage->Height2, + texImage->Depth2); + + stImage->etc_data = + malloc(data_size * _mesa_num_tex_faces(texImage->TexObject->Target)); +} /** called via ctx->Driver.MapTextureImage() */ static void @@ -214,26 +254,24 @@ map = st_texture_image_map(st, stImage, pipeMode, x, y, slice, w, h, 1, &transfer); if (map) { - if ((_mesa_is_format_etc2(texImage->TexFormat) && !st->has_etc2) || - (texImage->TexFormat == MESA_FORMAT_ETC1_RGB8 && !st->has_etc1)) { - /* ETC isn't supported by gallium and it's represented - * by uncompressed formats. Only write transfers with precompressed - * data are supported by ES3, which makes this really simple. + if (st_etc_fallback(st, texImage)) { + /* ETC isn't supported by all gallium drivers, where it's represented + * by uncompressed formats. We store the compressed data (as it's + * needed for image copies in OES_copy_image), and decompress as + * necessary in Unmap. * - * Just create a temporary storage where the ETC texture will - * be stored. It will be decompressed in the Unmap function. + * Note: all ETC1/ETC2 formats have 4x4 block sizes. */ unsigned z = transfer->box.z; struct st_texture_image_transfer *itransfer = &stImage->transfer[z]; - itransfer->temp_data = - malloc(_mesa_format_image_size(texImage->TexFormat, w, h, 1)); - itransfer->temp_stride = - _mesa_format_row_stride(texImage->TexFormat, w); + unsigned bytes = _mesa_get_format_bytes(texImage->TexFormat); + unsigned stride = *rowStrideOut = itransfer->temp_stride = + _mesa_format_row_stride(texImage->TexFormat, texImage->Width2); + *mapOut = itransfer->temp_data = + stImage->etc_data + ((x / 4) * bytes + (y / 4) * stride) + + z * stride * texImage->Height2 / 4; itransfer->map = map; - - *mapOut = itransfer->temp_data; - *rowStrideOut = itransfer->temp_stride; } else { /* supported mapping */ @@ -257,8 +295,7 @@ struct st_context *st = st_context(ctx); struct st_texture_image *stImage = st_texture_image(texImage); - if ((_mesa_is_format_etc2(texImage->TexFormat) && !st->has_etc2) || - (texImage->TexFormat == MESA_FORMAT_ETC1_RGB8 && !st->has_etc1)) { + if (st_etc_fallback(st, texImage)) { /* Decompress the ETC texture to the mapped one. */ unsigned z = slice + stImage->base.Face; struct st_texture_image_transfer *itransfer = &stImage->transfer[z]; @@ -266,20 +303,21 @@ assert(z == transfer->box.z); - if (texImage->TexFormat == MESA_FORMAT_ETC1_RGB8) { - _mesa_etc1_unpack_rgba8888(itransfer->map, transfer->stride, - itransfer->temp_data, - itransfer->temp_stride, - transfer->box.width, transfer->box.height); - } - else { - _mesa_unpack_etc2_format(itransfer->map, transfer->stride, - itransfer->temp_data, itransfer->temp_stride, - transfer->box.width, transfer->box.height, - texImage->TexFormat); + if (transfer->usage & PIPE_TRANSFER_WRITE) { + if (texImage->TexFormat == MESA_FORMAT_ETC1_RGB8) { + _mesa_etc1_unpack_rgba8888(itransfer->map, transfer->stride, + itransfer->temp_data, + itransfer->temp_stride, + transfer->box.width, transfer->box.height); + } + else { + _mesa_unpack_etc2_format(itransfer->map, transfer->stride, + itransfer->temp_data, itransfer->temp_stride, + transfer->box.width, transfer->box.height, + texImage->TexFormat); + } } - free(itransfer->temp_data); itransfer->temp_data = NULL; itransfer->temp_stride = 0; itransfer->map = 0; @@ -567,6 +605,8 @@ assert(!stImage->pt); /* xxx this might be wrong */ + etc_fallback_allocate(st, stImage); + /* Look if the parent texture object has space for this image */ if (stObj->pt && level <= stObj->pt->last_level && @@ -709,59 +749,6 @@ } } -void -st_init_pbo_upload(struct st_context *st) -{ - struct pipe_context *pipe = st->pipe; - struct pipe_screen *screen = pipe->screen; - - st->pbo_upload.enabled = - screen->get_param(screen, PIPE_CAP_TEXTURE_BUFFER_OBJECTS) && - screen->get_param(screen, PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT) >= 1 && - screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT, PIPE_SHADER_CAP_INTEGERS); - if (!st->pbo_upload.enabled) - return; - - st->pbo_upload.rgba_only = - screen->get_param(screen, PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY); - - if (screen->get_param(screen, PIPE_CAP_TGSI_INSTANCEID)) { - if (screen->get_param(screen, PIPE_CAP_TGSI_VS_LAYER_VIEWPORT)) { - st->pbo_upload.upload_layers = true; - } else if (screen->get_param(screen, PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES) >= 3) { - st->pbo_upload.upload_layers = true; - st->pbo_upload.use_gs = true; - } - } - - /* Blend state */ - memset(&st->pbo_upload.blend, 0, sizeof(struct pipe_blend_state)); - st->pbo_upload.blend.rt[0].colormask = PIPE_MASK_RGBA; - - /* Rasterizer state */ - memset(&st->pbo_upload.raster, 0, sizeof(struct pipe_rasterizer_state)); - st->pbo_upload.raster.half_pixel_center = 1; -} - -void -st_destroy_pbo_upload(struct st_context *st) -{ - if (st->pbo_upload.fs) { - cso_delete_fragment_shader(st->cso_context, st->pbo_upload.fs); - st->pbo_upload.fs = NULL; - } - - if (st->pbo_upload.gs) { - cso_delete_geometry_shader(st->cso_context, st->pbo_upload.gs); - st->pbo_upload.gs = NULL; - } - - if (st->pbo_upload.vs) { - cso_delete_vertex_shader(st->cso_context, st->pbo_upload.vs); - st->pbo_upload.vs = NULL; - } -} - /** * Converts format to a format with the same components, types * and sizes, but with the components in RGBA order. @@ -1141,218 +1128,21 @@ return true; } -static void * -create_pbo_upload_vs(struct st_context *st) -{ - struct ureg_program *ureg; - struct ureg_src in_pos; - struct ureg_src in_instanceid; - struct ureg_dst out_pos; - struct ureg_dst out_layer; - - ureg = ureg_create(PIPE_SHADER_VERTEX); - if (!ureg) - return NULL; - - in_pos = ureg_DECL_vs_input(ureg, TGSI_SEMANTIC_POSITION); - - out_pos = ureg_DECL_output(ureg, TGSI_SEMANTIC_POSITION, 0); - - if (st->pbo_upload.upload_layers) { - in_instanceid = ureg_DECL_system_value(ureg, TGSI_SEMANTIC_INSTANCEID, 0); - - if (!st->pbo_upload.use_gs) - out_layer = ureg_DECL_output(ureg, TGSI_SEMANTIC_LAYER, 0); - } - - /* out_pos = in_pos */ - ureg_MOV(ureg, out_pos, in_pos); - - if (st->pbo_upload.upload_layers) { - if (st->pbo_upload.use_gs) { - /* out_pos.z = i2f(gl_InstanceID) */ - ureg_I2F(ureg, ureg_writemask(out_pos, TGSI_WRITEMASK_Z), - ureg_scalar(in_instanceid, TGSI_SWIZZLE_X)); - } else { - /* out_layer = gl_InstanceID */ - ureg_MOV(ureg, out_layer, in_instanceid); - } - } - - ureg_END(ureg); - - return ureg_create_shader_and_destroy(ureg, st->pipe); -} - -static void * -create_pbo_upload_gs(struct st_context *st) -{ - static const int zero = 0; - struct ureg_program *ureg; - struct ureg_dst out_pos; - struct ureg_dst out_layer; - struct ureg_src in_pos; - struct ureg_src imm; - unsigned i; - - ureg = ureg_create(PIPE_SHADER_GEOMETRY); - if (!ureg) - return NULL; - - ureg_property(ureg, TGSI_PROPERTY_GS_INPUT_PRIM, PIPE_PRIM_TRIANGLES); - ureg_property(ureg, TGSI_PROPERTY_GS_OUTPUT_PRIM, PIPE_PRIM_TRIANGLE_STRIP); - ureg_property(ureg, TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES, 3); - - out_pos = ureg_DECL_output(ureg, TGSI_SEMANTIC_POSITION, 0); - out_layer = ureg_DECL_output(ureg, TGSI_SEMANTIC_LAYER, 0); - - in_pos = ureg_DECL_input(ureg, TGSI_SEMANTIC_POSITION, 0, 0, 1); - - imm = ureg_DECL_immediate_int(ureg, &zero, 1); - - for (i = 0; i < 3; ++i) { - struct ureg_src in_pos_vertex = ureg_src_dimension(in_pos, i); - - /* out_pos = in_pos[i] */ - ureg_MOV(ureg, out_pos, in_pos_vertex); - - /* out_layer.x = f2i(in_pos[i].z) */ - ureg_F2I(ureg, ureg_writemask(out_layer, TGSI_WRITEMASK_X), - ureg_scalar(in_pos_vertex, TGSI_SWIZZLE_Z)); - - ureg_EMIT(ureg, ureg_scalar(imm, TGSI_SWIZZLE_X)); - } - - ureg_END(ureg); - - return ureg_create_shader_and_destroy(ureg, st->pipe); -} - -static void * -create_pbo_upload_fs(struct st_context *st) -{ - struct pipe_context *pipe = st->pipe; - struct pipe_screen *screen = pipe->screen; - struct ureg_program *ureg; - struct ureg_dst out; - struct ureg_src sampler; - struct ureg_src pos; - struct ureg_src layer; - struct ureg_src const0; - struct ureg_dst temp0; - - ureg = ureg_create(PIPE_SHADER_FRAGMENT); - if (!ureg) - return NULL; - - out = ureg_DECL_output(ureg, TGSI_SEMANTIC_COLOR, 0); - sampler = ureg_DECL_sampler(ureg, 0); - if (screen->get_param(screen, PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL)) { - pos = ureg_DECL_system_value(ureg, TGSI_SEMANTIC_POSITION, 0); - } else { - pos = ureg_DECL_fs_input(ureg, TGSI_SEMANTIC_POSITION, 0, - TGSI_INTERPOLATE_LINEAR); - } - if (st->pbo_upload.upload_layers) { - layer = ureg_DECL_fs_input(ureg, TGSI_SEMANTIC_LAYER, 0, - TGSI_INTERPOLATE_CONSTANT); - } - const0 = ureg_DECL_constant(ureg, 0); - temp0 = ureg_DECL_temporary(ureg); - - /* Note: const0 = [ -xoffset + skip_pixels, -yoffset, stride, image_height ] */ - - /* temp0.xy = f2i(temp0.xy) */ - ureg_F2I(ureg, ureg_writemask(temp0, TGSI_WRITEMASK_XY), - ureg_swizzle(pos, - TGSI_SWIZZLE_X, TGSI_SWIZZLE_Y, - TGSI_SWIZZLE_Y, TGSI_SWIZZLE_Y)); - - /* temp0.xy = temp0.xy + const0.xy */ - ureg_UADD(ureg, ureg_writemask(temp0, TGSI_WRITEMASK_XY), - ureg_swizzle(ureg_src(temp0), - TGSI_SWIZZLE_X, TGSI_SWIZZLE_Y, - TGSI_SWIZZLE_Y, TGSI_SWIZZLE_Y), - ureg_swizzle(const0, - TGSI_SWIZZLE_X, TGSI_SWIZZLE_Y, - TGSI_SWIZZLE_Y, TGSI_SWIZZLE_Y)); - - /* temp0.x = const0.z * temp0.y + temp0.x */ - ureg_UMAD(ureg, ureg_writemask(temp0, TGSI_WRITEMASK_X), - ureg_scalar(const0, TGSI_SWIZZLE_Z), - ureg_scalar(ureg_src(temp0), TGSI_SWIZZLE_Y), - ureg_scalar(ureg_src(temp0), TGSI_SWIZZLE_X)); - - if (st->pbo_upload.upload_layers) { - /* temp0.x = const0.w * layer + temp0.x */ - ureg_UMAD(ureg, ureg_writemask(temp0, TGSI_WRITEMASK_X), - ureg_scalar(const0, TGSI_SWIZZLE_W), - ureg_scalar(layer, TGSI_SWIZZLE_X), - ureg_scalar(ureg_src(temp0), TGSI_SWIZZLE_X)); - } - - /* temp0.w = 0 */ - ureg_MOV(ureg, ureg_writemask(temp0, TGSI_WRITEMASK_W), ureg_imm1u(ureg, 0)); - - /* out = txf(sampler, temp0.x) */ - ureg_TXF(ureg, out, TGSI_TEXTURE_BUFFER, ureg_src(temp0), sampler); - - ureg_release_temporary(ureg, temp0); - - ureg_END(ureg); - - return ureg_create_shader_and_destroy(ureg, pipe); -} - static bool try_pbo_upload_common(struct gl_context *ctx, struct pipe_surface *surface, - int xoffset, int yoffset, - unsigned upload_width, unsigned upload_height, - struct pipe_resource *buffer, - enum pipe_format src_format, - intptr_t buf_offset, - unsigned bytes_per_pixel, - unsigned stride, - unsigned image_height) + const struct st_pbo_addresses *addr, + enum pipe_format src_format) { struct st_context *st = st_context(ctx); struct cso_context *cso = st->cso_context; struct pipe_context *pipe = st->pipe; - unsigned depth = surface->u.tex.last_layer - surface->u.tex.first_layer + 1; - unsigned skip_pixels = 0; bool success = false; + void *fs; - /* Check alignment. */ - { - unsigned ofs = (buf_offset * bytes_per_pixel) % ctx->Const.TextureBufferOffsetAlignment; - if (ofs != 0) { - if (ofs % bytes_per_pixel != 0) - return false; - - skip_pixels = ofs / bytes_per_pixel; - buf_offset -= skip_pixels; - } - } - - /* Create the shaders */ - if (!st->pbo_upload.vs) { - st->pbo_upload.vs = create_pbo_upload_vs(st); - if (!st->pbo_upload.vs) - return false; - } - - if (depth != 1 && st->pbo_upload.use_gs && !st->pbo_upload.gs) { - st->pbo_upload.gs = create_pbo_upload_gs(st); - if (!st->pbo_upload.gs) - return false; - } - - if (!st->pbo_upload.fs) { - st->pbo_upload.fs = create_pbo_upload_fs(st); - if (!st->pbo_upload.fs) - return false; - } + fs = st_pbo_get_upload_fs(st, src_format, surface->format); + if (!fs) + return false; cso_save_state(cso, (CSO_BIT_FRAGMENT_SAMPLER_VIEWS | CSO_BIT_FRAGMENT_SAMPLERS | @@ -1365,37 +1155,35 @@ CSO_BIT_RASTERIZER | CSO_BIT_STREAM_OUTPUTS | CSO_BIT_PAUSE_QUERIES | + CSO_BIT_SAMPLE_MASK | + CSO_BIT_MIN_SAMPLES | + CSO_BIT_RENDER_CONDITION | CSO_BITS_ALL_SHADERS)); cso_save_constant_buffer_slot0(cso, PIPE_SHADER_FRAGMENT); + cso_set_sample_mask(cso, ~0); + cso_set_min_samples(cso, 1); + cso_set_render_condition(cso, NULL, FALSE, 0); /* Set up the sampler_view */ { - unsigned first_element = buf_offset; - unsigned last_element = buf_offset + skip_pixels + upload_width - 1 - + (upload_height - 1 + (depth - 1) * image_height) * stride; struct pipe_sampler_view templ; struct pipe_sampler_view *sampler_view; struct pipe_sampler_state sampler = {0}; const struct pipe_sampler_state *samplers[1] = {&sampler}; - /* This should be ensured by Mesa before calling our callbacks */ - assert((last_element + 1) * bytes_per_pixel <= buffer->width0); - - if (last_element - first_element > ctx->Const.MaxTextureBufferSize - 1) - goto fail; - memset(&templ, 0, sizeof(templ)); templ.target = PIPE_BUFFER; templ.format = src_format; - templ.u.buf.first_element = first_element; - templ.u.buf.last_element = last_element; + templ.u.buf.offset = addr->first_element * addr->bytes_per_pixel; + templ.u.buf.size = (addr->last_element - addr->first_element + 1) * + addr->bytes_per_pixel; templ.swizzle_r = PIPE_SWIZZLE_X; templ.swizzle_g = PIPE_SWIZZLE_Y; templ.swizzle_b = PIPE_SWIZZLE_Z; templ.swizzle_a = PIPE_SWIZZLE_W; - sampler_view = pipe->create_sampler_view(pipe, buffer, &templ); + sampler_view = pipe->create_sampler_view(pipe, addr->buffer, &templ); if (sampler_view == NULL) goto fail; @@ -1406,89 +1194,6 @@ cso_set_samplers(cso, PIPE_SHADER_FRAGMENT, 1, samplers); } - /* Upload vertices */ - { - struct pipe_vertex_buffer vbo; - struct pipe_vertex_element velem; - - float x0 = (float) xoffset / surface->width * 2.0f - 1.0f; - float y0 = (float) yoffset / surface->height * 2.0f - 1.0f; - float x1 = (float) (xoffset + upload_width) / surface->width * 2.0f - 1.0f; - float y1 = (float) (yoffset + upload_height) / surface->height * 2.0f - 1.0f; - - float *verts = NULL; - - vbo.user_buffer = NULL; - vbo.buffer = NULL; - vbo.stride = 2 * sizeof(float); - - u_upload_alloc(st->uploader, 0, 8 * sizeof(float), 4, - &vbo.buffer_offset, &vbo.buffer, (void **) &verts); - if (!verts) - goto fail; - - verts[0] = x0; - verts[1] = y0; - verts[2] = x0; - verts[3] = y1; - verts[4] = x1; - verts[5] = y0; - verts[6] = x1; - verts[7] = y1; - - u_upload_unmap(st->uploader); - - velem.src_offset = 0; - velem.instance_divisor = 0; - velem.vertex_buffer_index = cso_get_aux_vertex_buffer_slot(cso); - velem.src_format = PIPE_FORMAT_R32G32_FLOAT; - - cso_set_vertex_elements(cso, 1, &velem); - - cso_set_vertex_buffers(cso, velem.vertex_buffer_index, 1, &vbo); - - pipe_resource_reference(&vbo.buffer, NULL); - } - - /* Upload constants */ - /* Note: the user buffer must be valid until draw time */ - struct { - int32_t xoffset; - int32_t yoffset; - int32_t stride; - int32_t image_size; - } constants; - - { - struct pipe_constant_buffer cb; - - constants.xoffset = -xoffset + skip_pixels; - constants.yoffset = -yoffset; - constants.stride = stride; - constants.image_size = stride * image_height; - - if (st->constbuf_uploader) { - cb.buffer = NULL; - cb.user_buffer = NULL; - u_upload_data(st->constbuf_uploader, 0, sizeof(constants), - ctx->Const.UniformBufferOffsetAlignment, - &constants, &cb.buffer_offset, &cb.buffer); - if (!cb.buffer) - goto fail; - - u_upload_unmap(st->constbuf_uploader); - } else { - cb.buffer = NULL; - cb.user_buffer = &constants; - cb.buffer_offset = 0; - } - cb.buffer_size = sizeof(constants); - - cso_set_constant_buffer(cso, PIPE_SHADER_FRAGMENT, 0, &cb); - - pipe_resource_reference(&cb.buffer, NULL); - } - /* Framebuffer_state */ { struct pipe_framebuffer_state fb; @@ -1506,7 +1211,7 @@ cso_set_viewport_dims(cso, surface->width, surface->height, FALSE); /* Blend state */ - cso_set_blend(cso, &st->pbo_upload.blend); + cso_set_blend(cso, &st->pbo.upload_blend); /* Depth/stencil/alpha state */ { @@ -1515,31 +1220,10 @@ cso_set_depth_stencil_alpha(cso, &dsa); } - /* Rasterizer state */ - cso_set_rasterizer(cso, &st->pbo_upload.raster); + /* Set up the fragment shader */ + cso_set_fragment_shader_handle(cso, fs); - /* Set up the shaders */ - cso_set_vertex_shader_handle(cso, st->pbo_upload.vs); - - cso_set_geometry_shader_handle(cso, depth != 1 ? st->pbo_upload.gs : NULL); - - cso_set_tessctrl_shader_handle(cso, NULL); - - cso_set_tesseval_shader_handle(cso, NULL); - - cso_set_fragment_shader_handle(cso, st->pbo_upload.fs); - - /* Disable stream output */ - cso_set_stream_outputs(cso, 0, NULL, 0); - - if (depth == 1) { - cso_draw_arrays(cso, PIPE_PRIM_TRIANGLE_STRIP, 0, 4); - } else { - cso_draw_arrays_instanced(cso, PIPE_PRIM_TRIANGLE_STRIP, - 0, 4, 0, depth); - } - - success = true; + success = st_pbo_draw(st, addr, surface->width, surface->height); fail: cso_restore_state(cso); @@ -1565,15 +1249,13 @@ struct pipe_context *pipe = st->pipe; struct pipe_screen *screen = pipe->screen; struct pipe_surface *surface = NULL; + struct st_pbo_addresses addr; enum pipe_format src_format; const struct util_format_description *desc; GLenum gl_target = texImage->TexObject->Target; - intptr_t buf_offset; - unsigned bytes_per_pixel; - unsigned stride, image_height; bool success; - if (!st->pbo_upload.enabled) + if (!st->pbo.upload_enabled) return false; /* From now on, we need the gallium representation of dimensions. */ @@ -1582,12 +1264,9 @@ height = 1; zoffset = yoffset; yoffset = 0; - image_height = 1; - } else { - image_height = unpack->ImageHeight > 0 ? unpack->ImageHeight : height; } - if (depth != 1 && !st->pbo_upload.upload_layers) + if (depth != 1 && !st->pbo.layers) return false; /* Choose the source format. Initially, we do so without checking driver @@ -1608,7 +1287,7 @@ if (desc->colorspace != UTIL_FORMAT_COLORSPACE_RGB) return false; - if (st->pbo_upload.rgba_only) { + if (st->pbo.rgba_only) { enum pipe_format orig_dst_format = dst_format; if (!reinterpret_formats(&src_format, &dst_format)) { @@ -1628,40 +1307,17 @@ return false; } - /* Check if the offset satisfies the alignment requirements */ - buf_offset = (intptr_t) pixels; - bytes_per_pixel = desc->block.bits / 8; + /* Compute buffer addresses */ + addr.xoffset = xoffset; + addr.yoffset = yoffset; + addr.width = width; + addr.height = height; + addr.depth = depth; + addr.bytes_per_pixel = desc->block.bits / 8; - if (buf_offset % bytes_per_pixel) { + if (!st_pbo_addresses_pixelstore(st, gl_target, dims == 3, unpack, pixels, + &addr)) return false; - } - - /* Convert to texels */ - buf_offset = buf_offset / bytes_per_pixel; - - /* Compute the stride, taking unpack->Alignment into account */ - { - unsigned pixels_per_row = unpack->RowLength > 0 ? - unpack->RowLength : width; - unsigned bytes_per_row = pixels_per_row * bytes_per_pixel; - unsigned remainder = bytes_per_row % unpack->Alignment; - unsigned offset_rows; - - if (remainder > 0) - bytes_per_row += (unpack->Alignment - remainder); - - if (bytes_per_row % bytes_per_pixel) { - return false; - } - - stride = bytes_per_row / bytes_per_pixel; - - offset_rows = unpack->SkipRows; - if (dims == 3) - offset_rows += image_height * unpack->SkipImages; - - buf_offset += unpack->SkipPixels + stride * offset_rows; - } /* Set up the surface */ { @@ -1682,12 +1338,7 @@ return false; } - success = try_pbo_upload_common(ctx, surface, - xoffset, yoffset, width, height, - st_buffer_object(unpack->BufferObj)->buffer, - src_format, - buf_offset, - bytes_per_pixel, stride, image_height); + success = try_pbo_upload_common(ctx, surface, &addr, src_format); pipe_surface_reference(&surface, NULL); @@ -1721,6 +1372,7 @@ unsigned dst_level = 0; st_flush_bitmap_cache(st); + st_invalidate_readpix_cache(st); if (stObj->pt == stImage->pt) dst_level = texImage->TexObject->MinLevel + texImage->Level; @@ -1731,7 +1383,7 @@ if (!dst) goto fallback; - /* Try transfer_inline_write, which should be the fastest memcpy path. */ + /* Try texture_subdata, which should be the fastest memcpy path. */ if (pixels && !_mesa_is_bufferobj(unpack->BufferObj) && _mesa_texstore_can_use_memcpy(ctx, texImage->_BaseFormat, @@ -1757,8 +1409,8 @@ } u_box_3d(xoffset, yoffset, zoffset + dstz, width, height, depth, &box); - pipe->transfer_inline_write(pipe, dst, dst_level, 0, - &box, data, stride, layer_stride); + pipe->texture_subdata(pipe, dst, dst_level, 0, + &box, data, stride, layer_stride); return; } @@ -1996,8 +1648,8 @@ struct pipe_resource *dst = stImage->pt; struct pipe_surface *surface = NULL; struct compressed_pixelstore store; + struct st_pbo_addresses addr; enum pipe_format copy_format; - unsigned bytes_per_block; unsigned bw, bh; intptr_t buf_offset; bool success = false; @@ -2010,8 +1662,7 @@ if (!_mesa_is_bufferobj(ctx->Unpack.BufferObj)) goto fallback; - if ((_mesa_is_format_etc2(texImage->TexFormat) && !st->has_etc2) || - (texImage->TexFormat == MESA_FORMAT_ETC1_RGB8 && !st->has_etc1)) { + if (st_etc_fallback(st, texImage)) { /* ETC isn't supported and is represented by uncompressed formats. */ goto fallback; } @@ -2020,17 +1671,17 @@ goto fallback; } - if (!st->pbo_upload.enabled || + if (!st->pbo.upload_enabled || !screen->get_param(screen, PIPE_CAP_SURFACE_REINTERPRET_BLOCKS)) { goto fallback; } /* Choose the pipe format for the upload. */ - bytes_per_block = util_format_get_blocksize(dst->format); + addr.bytes_per_pixel = util_format_get_blocksize(dst->format); bw = util_format_get_blockwidth(dst->format); bh = util_format_get_blockheight(dst->format); - switch (bytes_per_block) { + switch (addr.bytes_per_pixel) { case 8: copy_format = PIPE_FORMAT_R16G16B16A16_UINT; break; @@ -2054,17 +1705,29 @@ /* Interpret the pixelstore settings. */ _mesa_compute_compressed_pixelstore(dims, texImage->TexFormat, w, h, d, &ctx->Unpack, &store); - assert(store.CopyBytesPerRow % bytes_per_block == 0); - assert(store.SkipBytes % bytes_per_block == 0); + assert(store.CopyBytesPerRow % addr.bytes_per_pixel == 0); + assert(store.SkipBytes % addr.bytes_per_pixel == 0); /* Compute the offset into the buffer */ buf_offset = (intptr_t)data + store.SkipBytes; - if (buf_offset % bytes_per_block) { + if (buf_offset % addr.bytes_per_pixel) { goto fallback; } - buf_offset = buf_offset / bytes_per_block; + buf_offset = buf_offset / addr.bytes_per_pixel; + + addr.xoffset = x / bw; + addr.yoffset = y / bh; + addr.width = store.CopyBytesPerRow / addr.bytes_per_pixel; + addr.height = store.CopyRowsPerSlice; + addr.depth = d; + addr.pixels_per_row = store.TotalBytesPerRow / addr.bytes_per_pixel; + addr.image_height = store.TotalRowsPerSlice; + + if (!st_pbo_addresses_setup(st, st_buffer_object(ctx->Unpack.BufferObj)->buffer, + buf_offset, &addr)) + goto fallback; /* Set up the surface. */ { @@ -2085,16 +1748,7 @@ goto fallback; } - success = try_pbo_upload_common(ctx, surface, - x / bw, y / bh, - store.CopyBytesPerRow / bytes_per_block, - store.CopyRowsPerSlice, - st_buffer_object(ctx->Unpack.BufferObj)->buffer, - copy_format, - buf_offset, - bytes_per_block, - store.TotalBytesPerRow / bytes_per_block, - store.TotalRowsPerSlice); + success = try_pbo_upload_common(ctx, surface, &addr, copy_format); pipe_surface_reference(&surface, NULL); @@ -2178,8 +1832,9 @@ mesa_format mesa_format; GLenum gl_target = texImage->TexObject->Target; enum pipe_texture_target pipe_target; + unsigned dims; struct pipe_blit_info blit; - unsigned bind = PIPE_BIND_TRANSFER_READ; + unsigned bind; struct pipe_transfer *tex_xfer; ubyte *map = NULL; boolean done = FALSE; @@ -2243,9 +1898,9 @@ } if (format == GL_DEPTH_COMPONENT || format == GL_DEPTH_STENCIL) - bind |= PIPE_BIND_DEPTH_STENCIL; + bind = PIPE_BIND_DEPTH_STENCIL; else - bind |= PIPE_BIND_RENDER_TARGET; + bind = PIPE_BIND_RENDER_TARGET; /* GetTexImage only returns a single face for cubemaps. */ if (gl_target == GL_TEXTURE_CUBE_MAP) { @@ -2366,6 +2021,7 @@ } mesa_format = st_pipe_format_to_mesa_format(dst_format); + dims = _mesa_get_texture_dimensions(gl_target); /* copy/pack data into user buffer */ if (_mesa_format_matches_format_and_type(mesa_format, format, type, @@ -2375,39 +2031,31 @@ GLuint row, slice; for (slice = 0; slice < depth; slice++) { - if (gl_target == GL_TEXTURE_1D_ARRAY) { - /* 1D array textures. - * We need to convert gallium coords to GL coords. - */ - void *dest = _mesa_image_address3d(&ctx->Pack, pixels, - width, depth, format, - type, 0, slice, 0); - memcpy(dest, map, bytesPerRow); - } - else { - ubyte *slice_map = map; + ubyte *slice_map = map; - for (row = 0; row < height; row++) { - void *dest = _mesa_image_address3d(&ctx->Pack, pixels, - width, height, format, - type, slice, row, 0); - memcpy(dest, slice_map, bytesPerRow); - slice_map += tex_xfer->stride; - } + for (row = 0; row < height; row++) { + void *dest = _mesa_image_address(dims, &ctx->Pack, pixels, + width, height, format, type, + slice, row, 0); + + memcpy(dest, slice_map, bytesPerRow); + + slice_map += tex_xfer->stride; } + map += tex_xfer->layer_stride; } } else { /* format translation via floats */ - GLuint row, slice; + GLuint slice; GLfloat *rgba; uint32_t dstMesaFormat; int dstStride, srcStride; assert(util_format_is_compressed(src->format)); - rgba = malloc(width * 4 * sizeof(GLfloat)); + rgba = malloc(width * height * 4 * sizeof(GLfloat)); if (!rgba) { goto end; } @@ -2419,37 +2067,24 @@ dstStride = _mesa_image_row_stride(&ctx->Pack, width, format, type); srcStride = 4 * width * sizeof(GLfloat); for (slice = 0; slice < depth; slice++) { - if (gl_target == GL_TEXTURE_1D_ARRAY) { - /* 1D array textures. - * We need to convert gallium coords to GL coords. - */ - void *dest = _mesa_image_address3d(&ctx->Pack, pixels, - width, depth, format, - type, 0, slice, 0); - - /* get float[4] rgba row from surface */ - pipe_get_tile_rgba_format(tex_xfer, map, 0, 0, width, 1, - dst_format, rgba); - - _mesa_format_convert(dest, dstMesaFormat, dstStride, - rgba, RGBA32_FLOAT, srcStride, - width, 1, NULL); - } - else { - for (row = 0; row < height; row++) { - void *dest = _mesa_image_address3d(&ctx->Pack, pixels, - width, height, format, - type, slice, row, 0); - - /* get float[4] rgba row from surface */ - pipe_get_tile_rgba_format(tex_xfer, map, 0, row, width, 1, - dst_format, rgba); - - _mesa_format_convert(dest, dstMesaFormat, dstStride, - rgba, RGBA32_FLOAT, srcStride, - width, 1, NULL); - } + void *dest = _mesa_image_address(dims, &ctx->Pack, pixels, + width, height, format, type, + slice, 0, 0); + + /* get float[4] rgba row from surface */ + pipe_get_tile_rgba_format(tex_xfer, map, 0, 0, width, height, + dst_format, rgba); + + _mesa_format_convert(dest, dstMesaFormat, dstStride, + rgba, RGBA32_FLOAT, srcStride, + width, height, NULL); + + /* Handle byte swapping if required */ + if (ctx->Pack.SwapBytes) { + _mesa_swap_bytes_2d_image(format, type, &ctx->Pack, + width, height, dest, dest); } + map += tex_xfer->layer_stride; } @@ -2653,6 +2288,7 @@ GLint srcY0, srcY1; st_flush_bitmap_cache(st); + st_invalidate_readpix_cache(st); assert(!_mesa_is_format_etc2(texImage->TexFormat) && texImage->TexFormat != MESA_FORMAT_ETC1_RGB8); @@ -2798,7 +2434,8 @@ GLboolean st_finalize_texture(struct gl_context *ctx, struct pipe_context *pipe, - struct gl_texture_object *tObj) + struct gl_texture_object *tObj, + GLuint cubeMapFace) { struct st_context *st = st_context(ctx); struct st_texture_object *stObj = st_texture_object(tObj); @@ -2842,7 +2479,7 @@ } - firstImage = st_texture_image_const(_mesa_base_tex_image(&stObj->base)); + firstImage = st_texture_image_const(stObj->base.Image[cubeMapFace][stObj->base.BaseLevel]); assert(firstImage); /* If both firstImage and stObj point to a texture which can contain @@ -2928,7 +2565,7 @@ */ pipe_resource_reference(&stObj->pt, NULL); st_texture_release_all_sampler_views(st, stObj); - st->dirty.st |= ST_NEW_FRAMEBUFFER; + st->dirty |= ST_NEW_FRAMEBUFFER; } } @@ -3065,6 +2702,8 @@ struct st_texture_image *stImage = st_texture_image(texObj->Image[face][level]); pipe_resource_reference(&stImage->pt, stObj->pt); + + etc_fallback_allocate(st, stImage); } } @@ -3074,9 +2713,9 @@ static GLboolean st_TestProxyTexImage(struct gl_context *ctx, GLenum target, - GLint level, mesa_format format, - GLint width, GLint height, - GLint depth, GLint border) + GLuint numLevels, GLint level, + mesa_format format, GLuint numSamples, + GLint width, GLint height, GLint depth) { struct st_context *st = st_context(ctx); struct pipe_context *pipe = st->pipe; @@ -3098,14 +2737,19 @@ pt.target = gl_target_to_pipe(target); pt.format = st_mesa_format_to_pipe_format(st, format); + pt.nr_samples = numSamples; st_gl_texture_dims_to_pipe_dims(target, width, height, depth, &pt.width0, &pt.height0, &pt.depth0, &pt.array_size); - if (level == 0 && (texObj->Sampler.MinFilter == GL_LINEAR || - texObj->Sampler.MinFilter == GL_NEAREST)) { + if (numLevels > 0) { + /* For immutable textures we know the final number of mip levels */ + pt.last_level = numLevels - 1; + } + else if (level == 0 && (texObj->Sampler.MinFilter == GL_LINEAR || + texObj->Sampler.MinFilter == GL_NEAREST)) { /* assume just one mipmap level */ pt.last_level = 0; } @@ -3118,8 +2762,8 @@ } else { /* Use core Mesa fallback */ - return _mesa_test_proxy_teximage(ctx, target, level, format, - width, height, depth, border); + return _mesa_test_proxy_teximage(ctx, target, numLevels, level, format, + numSamples, width, height, depth); } } @@ -3128,6 +2772,7 @@ struct gl_texture_object *texObj, struct gl_texture_object *origTexObj) { + struct st_context *st = st_context(ctx); struct st_texture_object *orig = st_texture_object(origTexObj); struct st_texture_object *tex = st_texture_object(texObj); struct gl_texture_image *image = texObj->Image[0][0]; @@ -3155,6 +2800,11 @@ tex->lastLevel = numLevels - 1; + /* free texture sampler views. They need to be recreated when we + * change the texture view parameters. + */ + st_texture_release_all_sampler_views(st, tex); + return GL_TRUE; } @@ -3177,6 +2827,7 @@ return; st_flush_bitmap_cache(st); + st_invalidate_readpix_cache(st); u_box_3d(xoffset, yoffset, zoffset + texImage->Face, width, height, depth, &box); @@ -3188,6 +2839,42 @@ pipe->clear_texture(pipe, pt, level, &box, clearValue ? clearValue : zeros); } + +/** + * Called via the glTexParam*() function, but only when some texture object + * state has actually changed. + */ +static void +st_TexParameter(struct gl_context *ctx, + struct gl_texture_object *texObj, GLenum pname) +{ + struct st_context *st = st_context(ctx); + struct st_texture_object *stObj = st_texture_object(texObj); + + switch (pname) { + case GL_TEXTURE_BASE_LEVEL: + case GL_TEXTURE_MAX_LEVEL: + case GL_DEPTH_TEXTURE_MODE: + case GL_DEPTH_STENCIL_TEXTURE_MODE: + case GL_TEXTURE_SRGB_DECODE_EXT: + case GL_TEXTURE_SWIZZLE_R: + case GL_TEXTURE_SWIZZLE_G: + case GL_TEXTURE_SWIZZLE_B: + case GL_TEXTURE_SWIZZLE_A: + case GL_TEXTURE_SWIZZLE_RGBA: + case GL_TEXTURE_BUFFER_SIZE: + case GL_TEXTURE_BUFFER_OFFSET: + /* changing any of these texture parameters means we must create + * new sampler views. + */ + st_texture_release_all_sampler_views(st, stObj); + break; + default: + ; /* nothing */ + } +} + + void st_init_texture_functions(struct dd_function_table *functions) { @@ -3220,4 +2907,6 @@ functions->AllocTextureStorage = st_AllocTextureStorage; functions->TextureView = st_TextureView; functions->ClearTexSubImage = st_ClearTexSubImage; + + functions->TexParameter = st_TexParameter; } diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_cb_texture.h mesa-17.0.7/src/mesa/state_tracker/st_cb_texture.h --- mesa-12.0.6/src/mesa/state_tracker/st_cb_texture.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_cb_texture.h 2017-06-01 10:37:10.000000000 +0000 @@ -47,16 +47,11 @@ extern GLboolean st_finalize_texture(struct gl_context *ctx, struct pipe_context *pipe, - struct gl_texture_object *tObj); + struct gl_texture_object *tObj, + GLuint cubeMapFace); extern void st_init_texture_functions(struct dd_function_table *functions); -extern void -st_init_pbo_upload(struct st_context *st); - -extern void -st_destroy_pbo_upload(struct st_context *st); - #endif /* ST_CB_TEXTURE_H */ diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_cb_viewport.c mesa-17.0.7/src/mesa/state_tracker/st_cb_viewport.c --- mesa-12.0.6/src/mesa/state_tracker/st_cb_viewport.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_cb_viewport.c 2017-06-01 10:37:10.000000000 +0000 @@ -27,26 +27,13 @@ #include "main/glheader.h" #include "st_context.h" +#include "st_cb_fbo.h" #include "st_cb_viewport.h" #include "pipe/p_state.h" #include "pipe/p_defines.h" #include "util/u_atomic.h" -/** - * Cast wrapper to convert a struct gl_framebuffer to an st_framebuffer. - * Return NULL if the struct gl_framebuffer is a user-created framebuffer. - * We'll only return non-null for window system framebuffers. - * Note that this function may fail. - */ -static inline struct st_framebuffer * -st_ws_framebuffer(struct gl_framebuffer *fb) -{ - /* FBO cannot be casted. See st_new_framebuffer */ - if (fb && _mesa_is_winsys_fbo(fb)) - return (struct st_framebuffer *) fb; - return NULL; -} static void st_viewport(struct gl_context *ctx) { diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_cb_xformfb.c mesa-17.0.7/src/mesa/state_tracker/st_cb_xformfb.c --- mesa-12.0.6/src/mesa/state_tracker/st_cb_xformfb.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_cb_xformfb.c 2017-06-01 10:37:10.000000000 +0000 @@ -124,8 +124,8 @@ struct st_buffer_object *bo = st_buffer_object(sobj->base.Buffers[i]); if (bo && bo->buffer) { - unsigned stream = - obj->shader_program->LinkedTransformFeedback.Buffers[i].Stream; + unsigned stream = obj->program->sh.LinkedTransformFeedback-> + Buffers[i].Stream; /* Check whether we need to recreate the target. */ if (!sobj->targets[i] || @@ -203,8 +203,8 @@ pipe_so_target_reference(&sobj->draw_count[i], NULL); for (i = 0; i < ARRAY_SIZE(sobj->targets); i++) { - unsigned stream = - obj->shader_program->LinkedTransformFeedback.Buffers[i].Stream; + unsigned stream = obj->program->sh.LinkedTransformFeedback-> + Buffers[i].Stream; /* Is it not bound or already set for this stream? */ if (!sobj->targets[i] || sobj->draw_count[stream]) diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_context.c mesa-17.0.7/src/mesa/state_tracker/st_context.c --- mesa-12.0.6/src/mesa/state_tracker/st_context.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -68,7 +68,9 @@ #include "st_draw.h" #include "st_extensions.h" #include "st_gen_mipmap.h" +#include "st_pbo.h" #include "st_program.h" +#include "st_sampler_view.h" #include "st_vdpau.h" #include "st_texture.h" #include "pipe/p_context.h" @@ -89,7 +91,8 @@ switch (cap) { case GL_DEBUG_OUTPUT: - st_enable_debug_output(st, state); + case GL_DEBUG_OUTPUT_SYNCHRONOUS: + st_update_debug_callback(st); break; default: break; @@ -121,6 +124,41 @@ } +uint64_t +st_get_active_states(struct gl_context *ctx) +{ + struct st_vertex_program *vp = + st_vertex_program(ctx->VertexProgram._Current); + struct st_tessctrl_program *tcp = + st_tessctrl_program(ctx->TessCtrlProgram._Current); + struct st_tesseval_program *tep = + st_tesseval_program(ctx->TessEvalProgram._Current); + struct st_geometry_program *gp = + st_geometry_program(ctx->GeometryProgram._Current); + struct st_fragment_program *fp = + st_fragment_program(ctx->FragmentProgram._Current); + struct st_compute_program *cp = + st_compute_program(ctx->ComputeProgram._Current); + uint64_t active_shader_states = 0; + + if (vp) + active_shader_states |= vp->affected_states; + if (tcp) + active_shader_states |= tcp->affected_states; + if (tep) + active_shader_states |= tep->affected_states; + if (gp) + active_shader_states |= gp->affected_states; + if (fp) + active_shader_states |= fp->affected_states; + if (cp) + active_shader_states |= cp->affected_states; + + /* Mark non-shader-resource shader states as "always active". */ + return active_shader_states | ~ST_ALL_SHADER_RESOURCES; +} + + /** * Called via ctx->Driver.UpdateState() */ @@ -128,20 +166,109 @@ { struct st_context *st = st_context(ctx); - /* Replace _NEW_FRAG_CLAMP with ST_NEW_FRAGMENT_PROGRAM for the fallback. */ - if (st->clamp_frag_color_in_shader && (new_state & _NEW_FRAG_CLAMP)) { - new_state &= ~_NEW_FRAG_CLAMP; - st->dirty.st |= ST_NEW_FRAGMENT_PROGRAM; + if (new_state & _NEW_BUFFERS) { + st->dirty |= ST_NEW_BLEND | + ST_NEW_DSA | + ST_NEW_FB_STATE | + ST_NEW_SAMPLE_MASK | + ST_NEW_SAMPLE_SHADING | + ST_NEW_FS_STATE | + ST_NEW_POLY_STIPPLE | + ST_NEW_VIEWPORT | + ST_NEW_RASTERIZER | + ST_NEW_SCISSOR | + ST_NEW_WINDOW_RECTANGLES; + } else { + /* These set a subset of flags set by _NEW_BUFFERS, so we only have to + * check them when _NEW_BUFFERS isn't set. + */ + if (new_state & (_NEW_DEPTH | + _NEW_STENCIL)) + st->dirty |= ST_NEW_DSA; + + if (new_state & _NEW_PROGRAM) + st->dirty |= ST_NEW_RASTERIZER; + + if (new_state & _NEW_SCISSOR) + st->dirty |= ST_NEW_RASTERIZER | + ST_NEW_SCISSOR | + ST_NEW_WINDOW_RECTANGLES; + + if (new_state & _NEW_FOG) + st->dirty |= ST_NEW_FS_STATE; + + if (new_state & _NEW_POLYGONSTIPPLE) + st->dirty |= ST_NEW_POLY_STIPPLE; + + if (new_state & _NEW_VIEWPORT) + st->dirty |= ST_NEW_VIEWPORT; + + if (new_state & _NEW_FRAG_CLAMP) { + if (st->clamp_frag_color_in_shader) + st->dirty |= ST_NEW_FS_STATE; + else + st->dirty |= ST_NEW_RASTERIZER; + } } + if (new_state & _NEW_MULTISAMPLE) { + st->dirty |= ST_NEW_BLEND | + ST_NEW_SAMPLE_MASK | + ST_NEW_SAMPLE_SHADING | + ST_NEW_RASTERIZER | + ST_NEW_FS_STATE; + } else { + /* These set a subset of flags set by _NEW_MULTISAMPLE, so we only + * have to check them when _NEW_MULTISAMPLE isn't set. + */ + if (new_state & (_NEW_LIGHT | + _NEW_LINE | + _NEW_POINT | + _NEW_POLYGON | + _NEW_TRANSFORM)) + st->dirty |= ST_NEW_RASTERIZER; + } + + if (new_state & (_NEW_PROJECTION | + _NEW_TRANSFORM) && + st_user_clip_planes_enabled(ctx)) + st->dirty |= ST_NEW_CLIP_STATE; + + if (new_state & _NEW_COLOR) + st->dirty |= ST_NEW_BLEND | + ST_NEW_DSA; + + if (new_state & _NEW_PIXEL) + st->dirty |= ST_NEW_PIXEL_TRANSFER; + + if (new_state & _NEW_CURRENT_ATTRIB) + st->dirty |= ST_NEW_VERTEX_ARRAYS; + /* Update the vertex shader if ctx->Light._ClampVertexColor was changed. */ - if (st->clamp_vert_color_in_shader && (new_state & _NEW_LIGHT)) { - st->dirty.st |= ST_NEW_VERTEX_PROGRAM; + if (st->clamp_vert_color_in_shader && (new_state & _NEW_LIGHT)) + st->dirty |= ST_NEW_VS_STATE; + + /* Which shaders are dirty will be determined manually. */ + if (new_state & _NEW_PROGRAM) { + st->gfx_shaders_may_be_dirty = true; + st->compute_shader_may_be_dirty = true; + /* This will mask out unused shader resources. */ + st->active_states = st_get_active_states(ctx); + } + + if (new_state & _NEW_TEXTURE) { + st->dirty |= st->active_states & + (ST_NEW_SAMPLER_VIEWS | + ST_NEW_SAMPLERS | + ST_NEW_IMAGE_UNITS); + if (ctx->FragmentProgram._Current && + ctx->FragmentProgram._Current->ExternalSamplersUsed) { + st->dirty |= ST_NEW_FS_STATE; + } } - /* Invalidate render and compute pipelines. */ - st->dirty.mesa |= new_state; - st->dirty_cp.mesa |= new_state; + if (new_state & _NEW_PROGRAM_CONSTANTS) + st->dirty |= st->active_states & ST_NEW_CONSTANTS; /* This is the only core Mesa module we depend upon. * No longer use swrast, swsetup, tnl. @@ -151,7 +278,7 @@ static void -st_destroy_context_priv(struct st_context *st) +st_destroy_context_priv(struct st_context *st, bool destroy_pipe) { uint shader, i; @@ -162,7 +289,7 @@ st_destroy_drawpix(st); st_destroy_drawtex(st); st_destroy_perfmon(st); - st_destroy_pbo_upload(st); + st_destroy_pbo_helpers(st); for (shader = 0; shader < ARRAY_SIZE(st->state.sampler_views); shader++) { for (i = 0; i < ARRAY_SIZE(st->state.sampler_views[0]); i++) { @@ -183,7 +310,14 @@ free(st->drawpix_cache.image); pipe_resource_reference(&st->drawpix_cache.texture, NULL); + /* free glReadPixels cache data */ + st_invalidate_readpix_cache(st); + cso_destroy_context(st->cso_context); + + if (st->pipe && destroy_pipe) + st->pipe->destroy(st->pipe); + free( st ); } @@ -209,20 +343,16 @@ /* state tracker needs the VBO module */ _vbo_CreateContext(ctx); - /* Initialize render and compute pipelines flags */ - st->dirty.mesa = ~0; - st->dirty.st = ~0; - st->dirty_cp.mesa = ~0; - st->dirty_cp.st = ~0; + st->dirty = ST_ALL_STATES_MASK; /* Create upload manager for vertex data for glBitmap, glDrawPixels, * glClear, etc. */ - st->uploader = u_upload_create(st->pipe, 65536, PIPE_BIND_VERTEX_BUFFER, + st->uploader = u_upload_create(pipe, 65536, PIPE_BIND_VERTEX_BUFFER, PIPE_USAGE_STREAM); if (!screen->get_param(screen, PIPE_CAP_USER_INDEX_BUFFERS)) { - st->indexbuf_uploader = u_upload_create(st->pipe, 128 * 1024, + st->indexbuf_uploader = u_upload_create(pipe, 128 * 1024, PIPE_BIND_INDEX_BUFFER, PIPE_USAGE_STREAM); } @@ -237,7 +367,7 @@ st_init_atoms( st ); st_init_clear(st); st_init_draw( st ); - st_init_pbo_upload(st); + st_init_pbo_helpers(st); /* Choose texture target for glDrawPixels, glBitmap, renderbuffers */ if (pipe->screen->get_param(pipe->screen, PIPE_CAP_NPOT_TEXTURES)) @@ -314,8 +444,8 @@ screen->get_param(screen, PIPE_CAP_MULTI_DRAW_INDIRECT); /* GL limits and extensions */ - st_init_limits(st->pipe->screen, &ctx->Const, &ctx->Extensions); - st_init_extensions(st->pipe->screen, &ctx->Const, + st_init_limits(pipe->screen, &ctx->Const, &ctx->Extensions); + st_init_extensions(pipe->screen, &ctx->Const, &ctx->Extensions, &st->options, ctx->Mesa_DXTn); if (st_have_perfmon(st)) { @@ -369,6 +499,7 @@ st->shader_has_one_variant[MESA_SHADER_TESS_CTRL] = st->has_shareable_shaders; st->shader_has_one_variant[MESA_SHADER_TESS_EVAL] = st->has_shareable_shaders; st->shader_has_one_variant[MESA_SHADER_GEOMETRY] = st->has_shareable_shaders; + st->shader_has_one_variant[MESA_SHADER_COMPUTE] = st->has_shareable_shaders; _mesa_compute_version(ctx); @@ -376,7 +507,7 @@ /* This can happen when a core profile was requested, but the driver * does not support some features of GL 3.1 or later. */ - st_destroy_context_priv(st); + st_destroy_context_priv(st, false); return NULL; } @@ -411,8 +542,12 @@ memset(&funcs, 0, sizeof(funcs)); st_init_driver_functions(pipe->screen, &funcs); - ctx = _mesa_create_context(api, visual, shareCtx, &funcs); - if (!ctx) { + ctx = calloc(1, sizeof(struct gl_context)); + if (!ctx) + return NULL; + + if (!_mesa_initialize_context(ctx, api, visual, shareCtx, &funcs)) { + free(ctx); return NULL; } @@ -448,7 +583,6 @@ void st_destroy_context( struct st_context *st ) { - struct pipe_context *pipe = st->pipe; struct gl_context *ctx = st->ctx; GLuint i; @@ -477,11 +611,9 @@ /* This will free the st_context too, so 'st' must not be accessed * afterwards. */ - st_destroy_context_priv(st); + st_destroy_context_priv(st, true); st = NULL; - pipe->destroy( pipe ); - free(ctx); } diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_context.h mesa-17.0.7/src/mesa/state_tracker/st_context.h --- mesa-12.0.6/src/mesa/state_tracker/st_context.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_context.h 2017-06-01 10:37:10.000000000 +0000 @@ -32,6 +32,7 @@ #include "pipe/p_state.h" #include "state_tracker/st_api.h" #include "main/fbobject.h" +#include "state_tracker/st_atom.h" #ifdef __cplusplus @@ -50,45 +51,6 @@ struct u_upload_mgr; -/* gap */ -#define ST_NEW_FRAGMENT_PROGRAM (1 << 1) -#define ST_NEW_VERTEX_PROGRAM (1 << 2) -#define ST_NEW_FRAMEBUFFER (1 << 3) -#define ST_NEW_TESS_STATE (1 << 4) -#define ST_NEW_GEOMETRY_PROGRAM (1 << 5) -#define ST_NEW_VERTEX_ARRAYS (1 << 6) -#define ST_NEW_RASTERIZER (1 << 7) -#define ST_NEW_UNIFORM_BUFFER (1 << 8) -#define ST_NEW_TESSCTRL_PROGRAM (1 << 9) -#define ST_NEW_TESSEVAL_PROGRAM (1 << 10) -#define ST_NEW_SAMPLER_VIEWS (1 << 11) -#define ST_NEW_ATOMIC_BUFFER (1 << 12) -#define ST_NEW_STORAGE_BUFFER (1 << 13) -#define ST_NEW_COMPUTE_PROGRAM (1 << 14) -#define ST_NEW_IMAGE_UNITS (1 << 15) - - -struct st_state_flags { - GLbitfield mesa; /**< Mask of _NEW_x flags */ - uint64_t st; /**< Mask of ST_NEW_x flags */ -}; - -struct st_tracked_state { - const char *name; - struct st_state_flags dirty; - void (*update)( struct st_context *st ); -}; - - -/** - * Enumeration of state tracker pipelines. - */ -enum st_pipeline { - ST_PIPELINE_RENDER, - ST_PIPELINE_COMPUTE, -}; - - /** For drawing quads for glClear, glDraw/CopyPixels, glBitmap, etc. */ struct st_util_vertex { @@ -161,6 +123,11 @@ struct pipe_framebuffer_state framebuffer; struct pipe_scissor_state scissor[PIPE_MAX_VIEWPORTS]; struct pipe_viewport_state viewport[PIPE_MAX_VIEWPORTS]; + struct { + unsigned num; + boolean include; + struct pipe_scissor_state rects[PIPE_MAX_WINDOW_RECTANGLES]; + } window_rects; unsigned sample_mask; GLuint poly_stipple[32]; /**< In OpenGL's bottom-to-top order */ @@ -171,8 +138,16 @@ char vendor[100]; char renderer[100]; - struct st_state_flags dirty; - struct st_state_flags dirty_cp; + uint64_t dirty; /**< dirty states */ + + /** This masks out unused shader resources. Only valid in draw calls. */ + uint64_t active_states; + + /* If true, further analysis of states is required to know if something + * has changed. Used mainly for shaders. + */ + bool gfx_shaders_may_be_dirty; + bool compute_shader_may_be_dirty; GLboolean vertdata_edgeflags; GLboolean edgeflag_culls_prims; @@ -223,6 +198,16 @@ struct pipe_resource *texture; } drawpix_cache; + /** for glReadPixels */ + struct { + struct pipe_resource *src; + struct pipe_resource *cache; + enum pipe_format dst_format; + unsigned level; + unsigned layer; + unsigned hits; + } readpix_cache; + /** for glClear */ struct { struct pipe_rasterizer_state raster; @@ -236,15 +221,17 @@ /* For gl(Compressed)Tex(Sub)Image */ struct { struct pipe_rasterizer_state raster; - struct pipe_blend_state blend; + struct pipe_blend_state upload_blend; void *vs; void *gs; - void *fs; - bool enabled; + void *upload_fs[3]; + void *download_fs[3][PIPE_MAX_TEXTURE_TYPES]; + bool upload_enabled; + bool download_enabled; bool rgba_only; - bool upload_layers; + bool layers; bool use_gs; - } pbo_upload; + } pbo; /** for drawing with st_util_vertex */ struct pipe_vertex_element util_velems[3]; @@ -266,6 +253,8 @@ struct st_config_options options; struct st_perf_monitor_group *perfmon; + + enum pipe_reset_status reset_status; }; @@ -299,6 +288,7 @@ void st_invalidate_state(struct gl_context * ctx, GLbitfield new_state); +void st_invalidate_readpix_cache(struct st_context *st); #define Y_0_TOP 1 @@ -329,7 +319,7 @@ } -static inline unsigned +static inline enum pipe_shader_type st_shader_stage_to_ptarget(gl_shader_stage stage) { switch (stage) { @@ -351,6 +341,13 @@ return PIPE_SHADER_VERTEX; } +static inline bool +st_user_clip_planes_enabled(struct gl_context *ctx) +{ + return (ctx->API == API_OPENGL_COMPAT || + ctx->API == API_OPENGLES) && /* only ES 1.x */ + ctx->Transform.ClipPlanesEnabled; +} /** clear-alloc a struct-sized object, with casting */ #define ST_CALLOC_STRUCT(T) (struct T *) calloc(1, sizeof(struct T)) @@ -365,6 +362,9 @@ extern void st_destroy_context(struct st_context *st); +uint64_t +st_get_active_states(struct gl_context *ctx); + #ifdef __cplusplus } diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_debug.c mesa-17.0.7/src/mesa/state_tracker/st_debug.c --- mesa-12.0.6/src/mesa/state_tracker/st_debug.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_debug.c 2017-06-01 10:37:10.000000000 +0000 @@ -27,6 +27,7 @@ #include "main/context.h" +#include "main/debug_output.h" #include "program/prog_print.h" #include "pipe/p_state.h" @@ -58,6 +59,7 @@ { "wf", DEBUG_WIREFRAME, NULL }, { "precompile", DEBUG_PRECOMPILE, NULL }, { "gremedy", DEBUG_GREMEDY, "Enable GREMEDY debug extensions" }, + { "noreadpixcache", DEBUG_NOREADPIXCACHE, NULL }, DEBUG_NAMED_VALUE_END }; @@ -96,12 +98,12 @@ if (st->vp->variants) tgsi_dump( st->vp->variants[0].tgsi.tokens, 0 ); - if (st->vp->Base.Base.Parameters) - _mesa_print_parameter_list(st->vp->Base.Base.Parameters); + if (st->vp->Base.Parameters) + _mesa_print_parameter_list(st->vp->Base.Parameters); tgsi_dump(st->fp->tgsi.tokens, 0); - if (st->fp->Base.Base.Parameters) - _mesa_print_parameter_list(st->fp->Base.Base.Parameters); + if (st->fp->Base.Parameters) + _mesa_print_parameter_list(st->fp->Base.Parameters); } @@ -163,15 +165,19 @@ } void -st_enable_debug_output(struct st_context *st, boolean enable) +st_update_debug_callback(struct st_context *st) { struct pipe_context *pipe = st->pipe; if (!pipe->set_debug_callback) return; - if (enable) { - struct pipe_debug_callback cb = { st_debug_message, st }; + if (_mesa_get_debug_state_int(st->ctx, GL_DEBUG_OUTPUT)) { + struct pipe_debug_callback cb; + memset(&cb, 0, sizeof(cb)); + cb.async = !_mesa_get_debug_state_int(st->ctx, GL_DEBUG_OUTPUT_SYNCHRONOUS); + cb.debug_message = st_debug_message; + cb.data = st; pipe->set_debug_callback(pipe, &cb); } else { pipe->set_debug_callback(pipe, NULL); diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_debug.h mesa-17.0.7/src/mesa/state_tracker/st_debug.h --- mesa-12.0.6/src/mesa/state_tracker/st_debug.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_debug.h 2017-06-01 10:37:10.000000000 +0000 @@ -51,6 +51,7 @@ #define DEBUG_WIREFRAME 0x400 #define DEBUG_PRECOMPILE 0x800 #define DEBUG_GREMEDY 0x1000 +#define DEBUG_NOREADPIXCACHE 0x2000 #ifdef DEBUG extern int ST_DEBUG; @@ -62,7 +63,7 @@ void st_debug_init( void ); -void st_enable_debug_output(struct st_context *st, boolean enable); +void st_update_debug_callback(struct st_context *st); static inline void ST_DBG( unsigned flag, const char *fmt, ... ) diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_draw.c mesa-17.0.7/src/mesa/state_tracker/st_draw.c --- mesa-12.0.6/src/mesa/state_tracker/st_draw.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_draw.c 2017-06-01 10:37:10.000000000 +0000 @@ -71,7 +71,7 @@ * only interested in per-vertex data. See bug 38626. */ static GLboolean -all_varyings_in_vbos(const struct gl_client_array *arrays[]) +all_varyings_in_vbos(const struct gl_vertex_array *arrays[]) { GLuint i; @@ -127,6 +127,30 @@ /** + * Set the restart index. + */ +static void +setup_primitive_restart(struct gl_context *ctx, + const struct _mesa_index_buffer *ib, + struct pipe_draw_info *info) +{ + if (ctx->Array._PrimitiveRestart) { + info->restart_index = _mesa_primitive_restart_index(ctx, ib->type); + + /* Enable primitive restart only when the restart index can have an + * effect. This is required for correctness in radeonsi VI support. + * Other hardware may also benefit from taking a faster, non-restart path + * when possible. + */ + if ((ib->type == GL_UNSIGNED_INT) || + (ib->type == GL_UNSIGNED_SHORT && info->restart_index <= 0xffff) || + (ib->type == GL_UNSIGNED_BYTE && info->restart_index <= 0xff)) + info->primitive_restart = true; + } +} + + +/** * Translate OpenGL primtive type (GL_POINTS, GL_TRIANGLE_STRIP, etc) to * the corresponding Gallium type. */ @@ -163,16 +187,18 @@ struct st_context *st = st_context(ctx); struct pipe_index_buffer ibuffer = {0}; struct pipe_draw_info info; - const struct gl_client_array **arrays = ctx->Array._DrawArrays; + const struct gl_vertex_array **arrays = ctx->Array._DrawArrays; unsigned i; /* Mesa core state should have been validated already */ assert(ctx->NewState == 0x0); st_flush_bitmap_cache(st); + st_invalidate_readpix_cache(st); /* Validate state. */ - if (st->dirty.st || st->dirty.mesa || ctx->NewDriverState) { + if ((st->dirty | ctx->NewDriverState) & ST_PIPELINE_RENDER_STATE_MASK || + st->gfx_shaders_may_be_dirty) { st_validate_state(st, ST_PIPELINE_RENDER); } @@ -203,19 +229,7 @@ /* The VBO module handles restart for the non-indexed GLDrawArrays * so we only set these fields for indexed drawing: */ - if (ctx->Array._PrimitiveRestart) { - info.restart_index = _mesa_primitive_restart_index(ctx, ib->type); - - /* Enable primitive restart only when the restart index can have an - * effect. This is required for correctness in radeonsi VI support, - * though other hardware may also benefit from taking a faster, - * non-restart path when possible. - */ - if ((ibuffer.index_size >= 4) || - (ibuffer.index_size >= 2 && info.restart_index <= 0xffff) || - (info.restart_index <= 0xff)) - info.primitive_restart = true; - } + setup_primitive_restart(ctx, ib, &info); } else { /* Transform feedback drawing is always non-indexed. */ @@ -287,8 +301,11 @@ assert(ctx->NewState == 0x0); assert(stride); + st_invalidate_readpix_cache(st); + /* Validate state. */ - if (st->dirty.st || st->dirty.mesa || ctx->NewDriverState) { + if ((st->dirty | ctx->NewDriverState) & ST_PIPELINE_RENDER_STATE_MASK || + st->gfx_shaders_may_be_dirty) { st_validate_state(st, ST_PIPELINE_RENDER); } @@ -307,6 +324,9 @@ } info.indexed = TRUE; + + /* Primitive restart is not handled by the VBO module in this case. */ + setup_primitive_restart(ctx, ib, &info); } info.mode = translate_prim(ctx, mode); @@ -314,10 +334,6 @@ info.indirect = st_buffer_object(indirect_data)->buffer; info.indirect_offset = indirect_offset; - /* Primitive restart is not handled by the VBO module in this case. */ - info.primitive_restart = ctx->Array._PrimitiveRestart; - info.restart_index = ctx->Array.RestartIndex; - if (ST_DEBUG & DEBUG_DRAW) { debug_printf("st/draw indirect: mode %s drawcount %d indexed %d\n", u_prim_name(info.mode), @@ -354,8 +370,29 @@ vbo_set_draw_func(ctx, st_draw_vbo); vbo_set_indirect_draw_func(ctx, st_indirect_draw_vbo); +} - st->draw = draw_create(st->pipe); /* for selection/feedback */ + +void +st_destroy_draw(struct st_context *st) +{ + draw_destroy(st->draw); +} + +/** + * Getter for the draw_context, so that initialization of it can happen only + * when needed (the TGSI exec machines take up quite a bit of memory). + */ +struct draw_context * +st_get_draw_context(struct st_context *st) +{ + if (!st->draw) { + st->draw = draw_create(st->pipe); + if (!st->draw) { + _mesa_error(st->ctx, GL_OUT_OF_MEMORY, "feedback fallback allocation"); + return NULL; + } + } /* Disable draw options that might convert points/lines to tris, etc. * as that would foul-up feedback/selection mode. @@ -364,16 +401,10 @@ draw_wide_point_threshold(st->draw, 1000.0f); draw_enable_line_stipple(st->draw, FALSE); draw_enable_point_sprites(st->draw, FALSE); -} - -void -st_destroy_draw(struct st_context *st) -{ - draw_destroy(st->draw); + return st->draw; } - /** * Draw a quad with given position, texcoords and color. */ diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_draw_feedback.c mesa-17.0.7/src/mesa/state_tracker/st_draw_feedback.c --- mesa-12.0.6/src/mesa/state_tracker/st_draw_feedback.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_draw_feedback.c 2017-06-01 10:37:10.000000000 +0000 @@ -123,7 +123,7 @@ { struct st_context *st = st_context(ctx); struct pipe_context *pipe = st->pipe; - struct draw_context *draw = st->draw; + struct draw_context *draw = st_get_draw_context(st); const struct st_vertex_program *vp; const struct pipe_shader_state *vs; struct pipe_vertex_buffer vbuffers[PIPE_MAX_SHADER_INPUTS]; @@ -131,14 +131,16 @@ struct pipe_index_buffer ibuffer; struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS] = {NULL}; struct pipe_transfer *ib_transfer = NULL; - const struct gl_client_array **arrays = ctx->Array._DrawArrays; + const struct gl_vertex_array **arrays = ctx->Array._DrawArrays; GLuint attr, i; const GLubyte *low_addr = NULL; const void *mapped_indices = NULL; - assert(draw); + if (!draw) + return; st_flush_bitmap_cache(st); + st_invalidate_readpix_cache(st); st_validate_state(st, ST_PIPELINE_RENDER); @@ -186,7 +188,7 @@ if (bufobj && bufobj->Name) { /* Attribute data is in a VBO. - * Recall that for VBOs, the gl_client_array->Ptr field is + * Recall that for VBOs, the gl_vertex_array->Ptr field is * really an offset from the start of the VBO, not a pointer. */ struct st_buffer_object *stobj = st_buffer_object(bufobj); diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_draw.h mesa-17.0.7/src/mesa/state_tracker/st_draw.h --- mesa-12.0.6/src/mesa/state_tracker/st_draw.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_draw.h 2017-06-01 10:37:10.000000000 +0000 @@ -39,7 +39,7 @@ struct _mesa_index_buffer; struct _mesa_prim; -struct gl_client_array; +struct gl_vertex_array; struct gl_context; struct st_context; @@ -47,6 +47,8 @@ void st_destroy_draw( struct st_context *st ); +struct draw_context *st_get_draw_context(struct st_context *st); + extern void st_draw_vbo(struct gl_context *ctx, const struct _mesa_prim *prims, diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_extensions.c mesa-17.0.7/src/mesa/state_tracker/st_extensions.c --- mesa-12.0.6/src/mesa/state_tracker/st_extensions.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_extensions.c 2017-06-01 10:37:10.000000000 +0000 @@ -105,6 +105,9 @@ c->MaxViewportHeight = c->MaxRenderbufferSize = c->MaxTextureRectSize; + c->ViewportSubpixelBits = + screen->get_param(screen, PIPE_CAP_VIEWPORT_SUBPIXEL_BITS); + c->MaxDrawBuffers = c->MaxColorAttachments = _clamp(screen->get_param(screen, PIPE_CAP_MAX_RENDER_TARGETS), 1, MAX_DRAW_BUFFERS); @@ -260,8 +263,6 @@ pc->MediumInt = pc->HighInt = pc->LowInt; } - options->EmitNoNoise = TRUE; - /* TODO: make these more fine-grained if anyone needs it */ options->MaxIfDepth = screen->get_shader_param(screen, sh, @@ -269,8 +270,7 @@ options->EmitNoLoops = !screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH); - options->EmitNoFunctions = - !screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_SUBROUTINES); + options->EmitNoFunctions = true; options->EmitNoMainReturn = !screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_SUBROUTINES); @@ -308,11 +308,10 @@ options->LowerCombinedClipCullDistance = true; options->LowerBufferInterfaceBlocks = true; - - if (sh == PIPE_SHADER_COMPUTE) - options->LowerShaderSharedVariables = true; } + c->GLSLOptimizeConservatively = + screen->get_param(screen, PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY); c->LowerTessLevel = true; c->LowerCsDerivedVariables = true; c->PrimitiveRestartForPatches = @@ -349,7 +348,7 @@ c->MaxGeometryTotalOutputComponents = screen->get_param(screen, PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS); c->MaxTessPatchComponents = - MAX2(screen->get_param(screen, PIPE_CAP_MAX_SHADER_PATCH_VARYINGS), + MIN2(screen->get_param(screen, PIPE_CAP_MAX_SHADER_PATCH_VARYINGS), MAX_VARYING) * 4; c->MinProgramTexelOffset = @@ -443,7 +442,6 @@ c->Program[MESA_SHADER_COMPUTE].MaxImageUniforms; c->MaxCombinedShaderOutputResources += c->MaxCombinedImageUniforms; c->MaxImageUnits = MAX_IMAGE_UNITS; - c->MaxImageSamples = 0; /* XXX */ if (c->MaxCombinedImageUniforms) { extensions->ARB_shader_image_load_store = GL_TRUE; extensions->ARB_shader_image_size = GL_TRUE; @@ -460,6 +458,9 @@ */ c->MaxFramebufferLayers = screen->get_param(screen, PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS); + + c->MaxWindowRectangles = + screen->get_param(screen, PIPE_CAP_MAX_WINDOW_RECTANGLES); } @@ -577,6 +578,7 @@ { o(ARB_color_buffer_float), PIPE_CAP_VERTEX_COLOR_UNCLAMPED }, { o(ARB_conditional_render_inverted), PIPE_CAP_CONDITIONAL_RENDER_INVERTED }, { o(ARB_copy_image), PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS }, + { o(OES_copy_image), PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS }, { o(ARB_cull_distance), PIPE_CAP_CULL_DISTANCE }, { o(ARB_depth_clamp), PIPE_CAP_DEPTH_CLIP_DISABLE }, { o(ARB_depth_texture), PIPE_CAP_TEXTURE_SHADOW_MAP }, @@ -597,6 +599,7 @@ { o(ARB_sample_shading), PIPE_CAP_SAMPLE_SHADING }, { o(ARB_seamless_cube_map), PIPE_CAP_SEAMLESS_CUBE_MAP }, { o(ARB_shader_draw_parameters), PIPE_CAP_DRAW_PARAMETERS }, + { o(ARB_shader_group_vote), PIPE_CAP_TGSI_VOTE }, { o(ARB_shader_stencil_export), PIPE_CAP_SHADER_STENCIL_EXPORT }, { o(ARB_shader_texture_image_samples), PIPE_CAP_TGSI_TXQS }, { o(ARB_shader_texture_lod), PIPE_CAP_SM3 }, @@ -611,7 +614,9 @@ { o(ARB_texture_view), PIPE_CAP_SAMPLER_VIEW_TARGET }, { o(ARB_timer_query), PIPE_CAP_QUERY_TIMESTAMP }, { o(ARB_transform_feedback2), PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME }, - { o(ARB_transform_feedback3), PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME }, + { o(ARB_transform_feedback3), PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS }, + + { o(KHR_blend_equation_advanced), PIPE_CAP_TGSI_FS_FBFETCH }, { o(EXT_blend_equation_separate), PIPE_CAP_BLEND_EQUATION_SEPARATE }, { o(EXT_depth_bounds_test), PIPE_CAP_DEPTH_BOUNDS_TEST }, @@ -623,6 +628,7 @@ { o(EXT_texture_mirror_clamp), PIPE_CAP_TEXTURE_MIRROR_CLAMP }, { o(EXT_texture_swizzle), PIPE_CAP_TEXTURE_SWIZZLE }, { o(EXT_transform_feedback), PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS }, + { o(EXT_window_rectangles), PIPE_CAP_MAX_WINDOW_RECTANGLES }, { o(AMD_pinned_memory), PIPE_CAP_RESOURCE_FROM_USER_MEMORY }, { o(ATI_meminfo), PIPE_CAP_QUERY_MEMORY_INFO }, @@ -773,6 +779,8 @@ /* Required: vertex fetch support. */ static const struct st_extension_format_mapping vertex_mapping[] = { + { { o(EXT_vertex_array_bgra) }, + { PIPE_FORMAT_B8G8R8A8_UNORM } }, { { o(ARB_vertex_type_2_10_10_10_rev) }, { PIPE_FORMAT_R10G10B10A2_UNORM, PIPE_FORMAT_B10G10R10A2_UNORM, @@ -825,7 +833,6 @@ extensions->EXT_provoking_vertex = GL_TRUE; extensions->EXT_texture_env_dot3 = GL_TRUE; - extensions->EXT_vertex_array_bgra = GL_TRUE; extensions->ATI_fragment_shader = GL_TRUE; extensions->ATI_texture_env_combine3 = GL_TRUE; @@ -883,6 +890,13 @@ extensions->AMD_vertex_shader_layer = GL_TRUE; } + if (consts->GLSLVersion >= 140) { + if (screen->get_param(screen, PIPE_CAP_TGSI_ARRAY_COMPONENTS) && + screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT, + PIPE_SHADER_CAP_PREFERRED_IR) == PIPE_SHADER_IR_TGSI) + extensions->ARB_enhanced_layouts = GL_TRUE; + } + if (consts->GLSLVersion >= 130) { consts->NativeIntegers = GL_TRUE; consts->MaxClipPlanes = 8; @@ -905,6 +919,7 @@ extensions->EXT_shader_integer_mix = GL_TRUE; extensions->ARB_arrays_of_arrays = GL_TRUE; + extensions->MESA_shader_integer_functions = GL_TRUE; } else { /* Optional integer support for GLSL 1.2. */ if (screen->get_shader_param(screen, PIPE_SHADER_VERTEX, @@ -936,6 +951,16 @@ extensions->ARB_tessellation_shader = GL_TRUE; } + /* What this is really checking for is the ability to support multiple + * invocations of a geometry shader. There is no separate cap for that, so + * we check the GLSLVersion. + */ + if (consts->GLSLVersion >= 400 && + screen->get_shader_param(screen, PIPE_SHADER_GEOMETRY, + PIPE_SHADER_CAP_MAX_INSTRUCTIONS) > 0) { + extensions->OES_geometry_shader = GL_TRUE; + } + if (screen->fence_finish) { extensions->ARB_sync = GL_TRUE; } @@ -946,17 +971,6 @@ extensions->OES_sample_variables = extensions->ARB_sample_shading && extensions->ARB_gpu_shader5; - /* If we don't have native ETC2 support, we don't keep track of the - * original ETC2 data. This is necessary to be able to copy images between - * compatible view classes. - */ - if (extensions->ARB_copy_image && screen->is_format_supported( - screen, PIPE_FORMAT_ETC2_RGB8, - PIPE_TEXTURE_2D, 0, - PIPE_BIND_SAMPLER_VIEW)) { - extensions->OES_copy_image = GL_TRUE; - } - /* Maximum sample count. */ { enum pipe_format color_formats[] = { @@ -984,6 +998,11 @@ color_formats, 16, PIPE_BIND_RENDER_TARGET); + consts->MaxImageSamples = + get_max_samples_for_formats(screen, ARRAY_SIZE(color_formats), + color_formats, 16, + PIPE_BIND_SHADER_IMAGE); + consts->MaxColorTextureSamples = get_max_samples_for_formats(screen, ARRAY_SIZE(color_formats), color_formats, consts->MaxSamples, @@ -1182,9 +1201,33 @@ extensions->ARB_compute_shader = extensions->ARB_shader_image_load_store && extensions->ARB_shader_atomic_counters; + + if (extensions->ARB_compute_shader) { + uint64_t max_variable_threads_per_block = 0; + + screen->get_compute_param(screen, PIPE_SHADER_IR_TGSI, + PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK, + &max_variable_threads_per_block); + + for (i = 0; i < 3; i++) { + /* Clamp the values to avoid having a local work group size + * greater than the maximum number of invocations. + */ + consts->MaxComputeVariableGroupSize[i] = + MIN2(consts->MaxComputeWorkGroupSize[i], + max_variable_threads_per_block); + } + consts->MaxComputeVariableGroupInvocations = + max_variable_threads_per_block; + + extensions->ARB_compute_variable_group_size = + max_variable_threads_per_block > 0; + } } } + extensions->KHR_robustness = extensions->ARB_robust_buffer_access_behavior; + /* If we support ES 3.1, we support the ES3_1_compatibility ext. However * there's no clean way of telling whether we would support ES 3.1 from * here, so copy the condition from compute_version_es2 here. A lot of @@ -1207,9 +1250,54 @@ extensions->ARB_gpu_shader5 && extensions->EXT_shader_integer_mix; - /* And if we have enough for ES 3.1, we can also expose - * OES_shader_io_blocks, which is only hidden due to the compiler not being - * able to version-restrict things. + extensions->OES_texture_cube_map_array = + extensions->ARB_ES3_1_compatibility && + extensions->OES_geometry_shader && + extensions->ARB_texture_cube_map_array; + + extensions->OES_viewport_array = + extensions->ARB_ES3_1_compatibility && + extensions->OES_geometry_shader && + extensions->ARB_viewport_array; + + extensions->OES_primitive_bounding_box = extensions->ARB_ES3_1_compatibility; + consts->NoPrimitiveBoundingBoxOutput = true; + + extensions->ANDROID_extension_pack_es31a = + extensions->KHR_texture_compression_astc_ldr && + extensions->KHR_blend_equation_advanced && + extensions->OES_sample_variables && + extensions->ARB_shader_image_load_store && + extensions->ARB_texture_stencil8 && + extensions->ARB_texture_multisample && + extensions->OES_copy_image && + extensions->ARB_draw_buffers_blend && + extensions->OES_geometry_shader && + extensions->ARB_gpu_shader5 && + extensions->OES_primitive_bounding_box && + extensions->ARB_tessellation_shader && + extensions->ARB_texture_border_clamp && + extensions->OES_texture_buffer && + extensions->OES_texture_cube_map_array && + extensions->EXT_texture_sRGB_decode; + + /* Same deal as for ARB_ES3_1_compatibility - this has to be computed + * before overall versions are selected. Also it's actually a subset of ES + * 3.2, since it doesn't require ASTC or advanced blending. */ - extensions->OES_shader_io_blocks = extensions->ARB_ES3_1_compatibility; + extensions->ARB_ES3_2_compatibility = + extensions->ARB_ES3_1_compatibility && + extensions->KHR_robustness && + extensions->ARB_copy_image && + extensions->ARB_draw_buffers_blend && + extensions->ARB_draw_elements_base_vertex && + extensions->OES_geometry_shader && + extensions->ARB_gpu_shader5 && + extensions->ARB_sample_shading && + extensions->ARB_tessellation_shader && + extensions->ARB_texture_border_clamp && + extensions->OES_texture_buffer && + extensions->ARB_texture_cube_map_array && + extensions->ARB_texture_stencil8 && + extensions->ARB_texture_multisample; } diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_format.c mesa-17.0.7/src/mesa/state_tracker/st_format.c --- mesa-12.0.6/src/mesa/state_tracker/st_format.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_format.c 2017-06-01 10:37:10.000000000 +0000 @@ -1063,23 +1063,23 @@ #define DEFAULT_RGBA_FORMATS \ - PIPE_FORMAT_B8G8R8A8_UNORM, \ PIPE_FORMAT_R8G8B8A8_UNORM, \ + PIPE_FORMAT_B8G8R8A8_UNORM, \ PIPE_FORMAT_A8R8G8B8_UNORM, \ PIPE_FORMAT_A8B8G8R8_UNORM, \ 0 #define DEFAULT_RGB_FORMATS \ - PIPE_FORMAT_B8G8R8X8_UNORM, \ PIPE_FORMAT_R8G8B8X8_UNORM, \ + PIPE_FORMAT_B8G8R8X8_UNORM, \ PIPE_FORMAT_X8R8G8B8_UNORM, \ PIPE_FORMAT_X8B8G8R8_UNORM, \ PIPE_FORMAT_B5G6R5_UNORM, \ DEFAULT_RGBA_FORMATS #define DEFAULT_SRGBA_FORMATS \ - PIPE_FORMAT_B8G8R8A8_SRGB, \ PIPE_FORMAT_R8G8B8A8_SRGB, \ + PIPE_FORMAT_B8G8R8A8_SRGB, \ PIPE_FORMAT_A8R8G8B8_SRGB, \ PIPE_FORMAT_A8B8G8R8_SRGB, \ 0 @@ -1170,8 +1170,8 @@ /* basic Alpha formats */ { { GL_ALPHA12, GL_ALPHA16, 0 }, - { PIPE_FORMAT_A16_UNORM, PIPE_FORMAT_A8_UNORM, - DEFAULT_RGBA_FORMATS } + { PIPE_FORMAT_A16_UNORM, PIPE_FORMAT_R16G16B16A16_UNORM, + PIPE_FORMAT_A8_UNORM, DEFAULT_RGBA_FORMATS } }, { { GL_ALPHA, GL_ALPHA4, GL_ALPHA8, GL_COMPRESSED_ALPHA, 0 }, @@ -1181,7 +1181,8 @@ /* basic Luminance formats */ { { GL_LUMINANCE12, GL_LUMINANCE16, 0 }, - { PIPE_FORMAT_L16_UNORM, PIPE_FORMAT_L8_UNORM, DEFAULT_RGB_FORMATS } + { PIPE_FORMAT_L16_UNORM, PIPE_FORMAT_R16G16B16A16_UNORM, + PIPE_FORMAT_L8_UNORM, DEFAULT_RGB_FORMATS } }, { { 1, GL_LUMINANCE, GL_LUMINANCE4, GL_LUMINANCE8, 0 }, @@ -1192,8 +1193,8 @@ { { GL_LUMINANCE12_ALPHA4, GL_LUMINANCE12_ALPHA12, GL_LUMINANCE16_ALPHA16, 0}, - { PIPE_FORMAT_L16A16_UNORM, PIPE_FORMAT_L8A8_UNORM, - DEFAULT_RGBA_FORMATS } + { PIPE_FORMAT_L16A16_UNORM, PIPE_FORMAT_R16G16B16A16_UNORM, + PIPE_FORMAT_L8A8_UNORM, DEFAULT_RGBA_FORMATS } }, { { 2, GL_LUMINANCE_ALPHA, GL_LUMINANCE6_ALPHA2, GL_LUMINANCE8_ALPHA8, 0 }, @@ -1208,7 +1209,8 @@ /* basic Intensity formats */ { { GL_INTENSITY12, GL_INTENSITY16, 0 }, - { PIPE_FORMAT_I16_UNORM, PIPE_FORMAT_I8_UNORM, DEFAULT_RGBA_FORMATS } + { PIPE_FORMAT_I16_UNORM, PIPE_FORMAT_R16G16B16A16_UNORM, + PIPE_FORMAT_I8_UNORM, DEFAULT_RGBA_FORMATS } }, { { GL_INTENSITY, GL_INTENSITY4, GL_INTENSITY8, diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_gen_mipmap.c mesa-17.0.7/src/mesa/state_tracker/st_gen_mipmap.c --- mesa-12.0.6/src/mesa/state_tracker/st_gen_mipmap.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_gen_mipmap.c 2017-06-01 10:37:10.000000000 +0000 @@ -98,6 +98,7 @@ return; st_flush_bitmap_cache(st); + st_invalidate_readpix_cache(st); /* The texture isn't in a "complete" state yet so set the expected * lastLevel here, since it won't get done in st_finalize_texture(). @@ -124,7 +125,7 @@ * * After this, we'll have all mipmap levels in one resource. */ - st_finalize_texture(ctx, st->pipe, texObj); + st_finalize_texture(ctx, st->pipe, texObj, 0); } pt = stObj->pt; diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_glsl_to_nir.cpp mesa-17.0.7/src/mesa/state_tracker/st_glsl_to_nir.cpp --- mesa-12.0.6/src/mesa/state_tracker/st_glsl_to_nir.cpp 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_glsl_to_nir.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -31,11 +31,11 @@ #include "program/prog_statevars.h" #include "program/prog_parameter.h" #include "program/ir_to_mesa.h" -#include "program/hash_table.h" #include "main/mtypes.h" #include "main/errors.h" #include "main/shaderapi.h" #include "main/uniforms.h" +#include "util/string_to_uint_map.h" #include "st_context.h" #include "st_program.h" @@ -73,30 +73,43 @@ * on varying-slot w/ the VS outputs) */ static void -st_nir_assign_vs_in_locations(struct gl_program *prog, - struct exec_list *var_list, unsigned *size) +st_nir_assign_vs_in_locations(struct gl_program *prog, nir_shader *nir) { unsigned attr, num_inputs = 0; unsigned input_to_index[VERT_ATTRIB_MAX] = {0}; /* TODO de-duplicate w/ similar code in st_translate_vertex_program()? */ for (attr = 0; attr < VERT_ATTRIB_MAX; attr++) { - if ((prog->InputsRead & BITFIELD64_BIT(attr)) != 0) { + if ((prog->info.inputs_read & BITFIELD64_BIT(attr)) != 0) { input_to_index[attr] = num_inputs; num_inputs++; - if ((prog->DoubleInputsRead & BITFIELD64_BIT(attr)) != 0) { + if ((prog->info.double_inputs_read & BITFIELD64_BIT(attr)) != 0) { /* add placeholder for second part of a double attribute */ num_inputs++; } + } else { + input_to_index[attr] = ~0; } } - *size = 0; - nir_foreach_variable(var, var_list) { + nir->num_inputs = 0; + nir_foreach_variable_safe(var, &nir->inputs) { attr = var->data.location; assert(attr < ARRAY_SIZE(input_to_index)); - var->data.driver_location = input_to_index[attr]; - (*size)++; + + if (input_to_index[attr] != ~0u) { + var->data.driver_location = input_to_index[attr]; + nir->num_inputs++; + } else { + /* Move unused input variables to the globals list (with no + * initialization), to avoid confusing drivers looking through the + * inputs array and expecting to find inputs with a driver_location + * set. + */ + exec_node_remove(&var->node); + var->data.mode = nir_var_global; + exec_list_push_tail(&nir->globals, &var->node); + } } } @@ -205,7 +218,7 @@ gl_shader_stage stage) { struct pipe_screen *pscreen = st->pipe->screen; - unsigned ptarget = st_shader_stage_to_ptarget(stage); + enum pipe_shader_type ptarget = st_shader_stage_to_ptarget(stage); const nir_shader_compiler_options *options; nir_shader *nir; @@ -304,7 +317,10 @@ if (nir->stage == MESA_SHADER_VERTEX) { /* Needs special handling so drvloc matches the vbo state: */ - st_nir_assign_vs_in_locations(prog, &nir->inputs, &nir->num_inputs); + st_nir_assign_vs_in_locations(prog, nir); + /* Re-lower global vars, to deal with any dead VS inputs. */ + NIR_PASS_V(nir, nir_lower_global_vars_to_local); + sort_varyings(&nir->outputs); nir_assign_var_locations(&nir->outputs, &nir->num_outputs, @@ -340,27 +356,27 @@ &nir->uniforms, &nir->num_uniforms); NIR_PASS_V(nir, nir_lower_system_values); - NIR_PASS_V(nir, nir_lower_io, nir_var_all, st_glsl_type_size); + NIR_PASS_V(nir, nir_lower_io, nir_var_all, st_glsl_type_size, + (nir_lower_io_options)0); NIR_PASS_V(nir, nir_lower_samplers, shader_program); } struct gl_program * st_nir_get_mesa_program(struct gl_context *ctx, struct gl_shader_program *shader_program, - struct gl_shader *shader) + struct gl_linked_shader *shader) { struct gl_program *prog; - GLenum target = _mesa_shader_stage_to_program(shader->Stage); validate_ir_tree(shader->ir); - prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name); - if (!prog) - return NULL; + prog = shader->Program; prog->Parameters = _mesa_new_parameter_list(); - _mesa_copy_linked_program_data(shader->Stage, shader_program, prog); + do_set_program_inouts(shader->ir, prog, shader->Stage); + + _mesa_copy_linked_program_data(shader_program, shader); _mesa_generate_parameters_list_for_uniforms(shader_program, shader, prog->Parameters); @@ -396,17 +412,10 @@ _mesa_log("\n\n"); } - prog->Instructions = NULL; - prog->NumInstructions = 0; - - do_set_program_inouts(shader->ir, prog, shader->Stage); - - prog->SamplersUsed = shader->active_samplers; prog->ShadowSamplers = shader->shadow_samplers; + prog->ExternalSamplersUsed = gl_external_samplers(prog); _mesa_update_shader_textures_used(shader_program, prog); - _mesa_reference_program(ctx, &shader->Program, prog); - /* Avoid reallocation of the program parameter list, because the uniform * storage is only associated with the original parameter list. * This should be enough for Bitmap and DrawPixels constants. @@ -422,12 +431,12 @@ struct st_vertex_program *stvp; struct st_fragment_program *stfp; - switch (shader->Type) { - case GL_VERTEX_SHADER: + switch (shader->Stage) { + case MESA_SHADER_VERTEX: stvp = (struct st_vertex_program *)prog; stvp->shader_program = shader_program; break; - case GL_FRAGMENT_SHADER: + case MESA_SHADER_FRAGMENT: stfp = (struct st_fragment_program *)prog; stfp->shader_program = shader_program; break; diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_glsl_to_tgsi.cpp mesa-17.0.7/src/mesa/state_tracker/st_glsl_to_tgsi.cpp --- mesa-12.0.6/src/mesa/state_tracker/st_glsl_to_tgsi.cpp 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_glsl_to_tgsi.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -55,6 +55,7 @@ #include "st_glsl_types.h" #include "st_nir.h" +#include #define PROGRAM_ANY_CONST ((1 << PROGRAM_STATE_VAR) | \ (1 << PROGRAM_CONSTANT) | \ @@ -67,38 +68,57 @@ static int swizzle_for_size(int size); +static int swizzle_for_type(const glsl_type *type, int component = 0) +{ + unsigned num_elements = 4; + + if (type) { + type = type->without_array(); + if (type->is_scalar() || type->is_vector() || type->is_matrix()) + num_elements = type->vector_elements; + } + + int swizzle = swizzle_for_size(num_elements); + assert(num_elements + component <= 4); + + swizzle += component * MAKE_SWIZZLE4(1, 1, 1, 1); + return swizzle; +} + /** * This struct is a corresponding struct to TGSI ureg_src. */ class st_src_reg { public: - st_src_reg(gl_register_file file, int index, const glsl_type *type) + st_src_reg(gl_register_file file, int index, const glsl_type *type, + int component = 0, unsigned array_id = 0) { + assert(file != PROGRAM_ARRAY || array_id != 0); this->file = file; this->index = index; - if (type && (type->is_scalar() || type->is_vector() || type->is_matrix())) - this->swizzle = swizzle_for_size(type->vector_elements); - else - this->swizzle = SWIZZLE_XYZW; + this->swizzle = swizzle_for_type(type, component); this->negate = 0; + this->abs = 0; this->index2D = 0; this->type = type ? type->base_type : GLSL_TYPE_ERROR; this->reladdr = NULL; this->reladdr2 = NULL; this->has_index2 = false; this->double_reg2 = false; - this->array_id = 0; + this->array_id = array_id; this->is_double_vertex_input = false; } - st_src_reg(gl_register_file file, int index, int type) + st_src_reg(gl_register_file file, int index, enum glsl_base_type type) { + assert(file != PROGRAM_ARRAY); /* need array_id > 0 */ this->type = type; this->file = file; this->index = index; this->index2D = 0; this->swizzle = SWIZZLE_XYZW; this->negate = 0; + this->abs = 0; this->reladdr = NULL; this->reladdr2 = NULL; this->has_index2 = false; @@ -107,14 +127,16 @@ this->is_double_vertex_input = false; } - st_src_reg(gl_register_file file, int index, int type, int index2D) + st_src_reg(gl_register_file file, int index, enum glsl_base_type type, int index2D) { + assert(file != PROGRAM_ARRAY); /* need array_id > 0 */ this->type = type; this->file = file; this->index = index; this->index2D = index2D; this->swizzle = SWIZZLE_XYZW; this->negate = 0; + this->abs = 0; this->reladdr = NULL; this->reladdr2 = NULL; this->has_index2 = false; @@ -131,6 +153,7 @@ this->index2D = 0; this->swizzle = 0; this->negate = 0; + this->abs = 0; this->reladdr = NULL; this->reladdr2 = NULL; this->has_index2 = false; @@ -141,29 +164,40 @@ explicit st_src_reg(st_dst_reg reg); - gl_register_file file; /**< PROGRAM_* from Mesa */ - int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */ - int index2D; - GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */ - int negate; /**< NEGATE_XYZW mask from mesa */ - int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */ - /** Register index should be offset by the integer in this reg. */ - st_src_reg *reladdr; - st_src_reg *reladdr2; - bool has_index2; + int16_t index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */ + int16_t index2D; + uint16_t swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */ + int negate:4; /**< NEGATE_XYZW mask from mesa */ + unsigned abs:1; + enum glsl_base_type type:4; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */ + unsigned has_index2:1; + gl_register_file file:5; /**< PROGRAM_* from Mesa */ /* * Is this the second half of a double register pair? * currently used for input mapping only. */ - bool double_reg2; - unsigned array_id; - bool is_double_vertex_input; + unsigned double_reg2:1; + unsigned is_double_vertex_input:1; + unsigned array_id:10; + + /** Register index should be offset by the integer in this reg. */ + st_src_reg *reladdr; + st_src_reg *reladdr2; + + st_src_reg get_abs() + { + st_src_reg reg = *this; + reg.negate = 0; + reg.abs = 1; + return reg; + } }; class st_dst_reg { public: - st_dst_reg(gl_register_file file, int writemask, int type, int index) + st_dst_reg(gl_register_file file, int writemask, enum glsl_base_type type, int index) { + assert(file != PROGRAM_ARRAY); /* need array_id > 0 */ this->file = file; this->index = index; this->index2D = 0; @@ -175,8 +209,9 @@ this->array_id = 0; } - st_dst_reg(gl_register_file file, int writemask, int type) + st_dst_reg(gl_register_file file, int writemask, enum glsl_base_type type) { + assert(file != PROGRAM_ARRAY); /* need array_id > 0 */ this->file = file; this->index = 0; this->index2D = 0; @@ -203,16 +238,17 @@ explicit st_dst_reg(st_src_reg reg); - gl_register_file file; /**< PROGRAM_* from Mesa */ - int index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */ - int index2D; - int writemask; /**< Bitfield of WRITEMASK_[XYZW] */ - int type; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */ + int16_t index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */ + int16_t index2D; + gl_register_file file:5; /**< PROGRAM_* from Mesa */ + unsigned writemask:4; /**< Bitfield of WRITEMASK_[XYZW] */ + enum glsl_base_type type:4; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */ + unsigned has_index2:1; + unsigned array_id:10; + /** Register index should be offset by the integer in this reg. */ st_src_reg *reladdr; st_src_reg *reladdr2; - bool has_index2; - unsigned array_id; }; st_src_reg::st_src_reg(st_dst_reg reg) @@ -222,6 +258,7 @@ this->index = reg.index; this->swizzle = SWIZZLE_XYZW; this->negate = 0; + this->abs = 0; this->reladdr = reg.reladdr; this->index2D = reg.index2D; this->reladdr2 = reg.reladdr2; @@ -248,30 +285,27 @@ public: DECLARE_RALLOC_CXX_OPERATORS(glsl_to_tgsi_instruction) - unsigned op; st_dst_reg dst[2]; st_src_reg src[4]; + st_src_reg resource; /**< sampler or buffer register */ + st_src_reg *tex_offsets; + /** Pointer to the ir source this tree came from for debugging */ ir_instruction *ir; - GLboolean cond_update; - bool saturate; - bool is_64bit_expanded; - st_src_reg sampler; /**< sampler register */ - int sampler_base; - int sampler_array_size; /**< 1-based size of sampler array, 1 if not array */ - int tex_target; /**< One of TEXTURE_*_INDEX */ - glsl_base_type tex_type; - GLboolean tex_shadow; - unsigned image_format; - - st_src_reg tex_offsets[MAX_GLSL_TEXTURE_OFFSET]; - unsigned tex_offset_num_offset; - int dead_mask; /**< Used in dead code elimination */ - st_src_reg buffer; /**< buffer register */ - unsigned buffer_access; /**< buffer access type */ + unsigned op:8; /**< TGSI opcode */ + unsigned saturate:1; + unsigned is_64bit_expanded:1; + unsigned sampler_base:5; + unsigned sampler_array_size:6; /**< 1-based size of sampler array, 1 if not array */ + unsigned tex_target:4; /**< One of TEXTURE_*_INDEX */ + glsl_base_type tex_type:4; + unsigned tex_shadow:1; + unsigned image_format:9; + unsigned tex_offset_num_offset:3; + unsigned dead_mask:4; /**< Used in dead code elimination */ + unsigned buffer_access:3; /**< buffer access type */ - class function_entry *function; /* Set on TGSI_OPCODE_CAL or TGSI_OPCODE_BGNSUB */ const struct tgsi_opcode_info *info; }; @@ -279,13 +313,19 @@ public: variable_storage(ir_variable *var, gl_register_file file, int index, unsigned array_id = 0) - : file(file), index(index), var(var), array_id(array_id) + : file(file), index(index), component(0), var(var), array_id(array_id) { - /* empty */ + assert(file != PROGRAM_ARRAY || array_id != 0); } gl_register_file file; int index; + + /* Explicit component location. This is given in terms of the GLSL-style + * swizzles where each double is a single component, i.e. for 64-bit types + * it can only be 0 or 1. + */ + int component; ir_variable *var; /* variable that maps to this, if any */ unsigned array_id; }; @@ -305,60 +345,44 @@ int type; /**< GL_DOUBLE, GL_FLOAT, GL_INT, GL_BOOL, or GL_UNSIGNED_INT */ }; -class function_entry : public exec_node { -public: - ir_function_signature *sig; - - /** - * identifier of this function signature used by the program. - * - * At the point that TGSI instructions for function calls are - * generated, we don't know the address of the first instruction of - * the function body. So we make the BranchTarget that is called a - * small integer and rewrite them during set_branchtargets(). - */ - int sig_id; - - /** - * Pointer to first instruction of the function body. - * - * Set during function body emits after main() is processed. - */ - glsl_to_tgsi_instruction *bgn_inst; - - /** - * Index of the first instruction of the function body in actual TGSI. - * - * Set after conversion from glsl_to_tgsi_instruction to TGSI. - */ - int inst; - - /** Storage for the return value. */ - st_src_reg return_reg; -}; - static st_src_reg undef_src = st_src_reg(PROGRAM_UNDEFINED, 0, GLSL_TYPE_ERROR); static st_dst_reg undef_dst = st_dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP, GLSL_TYPE_ERROR); -struct array_decl { +struct inout_decl { unsigned mesa_index; - unsigned array_id; - unsigned array_size; - unsigned array_type; + unsigned array_id; /* TGSI ArrayID; 1-based: 0 means not an array */ + unsigned size; + unsigned interp_loc; + unsigned gs_out_streams; + enum glsl_interp_mode interp; + enum glsl_base_type base_type; + ubyte usage_mask; /* GLSL-style usage-mask, i.e. single bit per double */ }; -static unsigned -find_array_type(struct array_decl *arrays, unsigned count, unsigned array_id) +static struct inout_decl * +find_inout_array(struct inout_decl *decls, unsigned count, unsigned array_id) { - unsigned i; + assert(array_id != 0); - for (i = 0; i < count; i++) { - struct array_decl *decl = &arrays[i]; + for (unsigned i = 0; i < count; i++) { + struct inout_decl *decl = &decls[i]; if (array_id == decl->array_id) { - return decl->array_type; + return decl; } } + + return NULL; +} + +static enum glsl_base_type +find_array_type(struct inout_decl *decls, unsigned count, unsigned array_id) +{ + if (!array_id) + return GLSL_TYPE_ERROR; + struct inout_decl *decl = find_inout_array(decls, count, array_id); + if (decl) + return decl->base_type; return GLSL_TYPE_ERROR; } @@ -372,12 +396,10 @@ glsl_to_tgsi_visitor(); ~glsl_to_tgsi_visitor(); - function_entry *current_function; - struct gl_context *ctx; struct gl_program *prog; struct gl_shader_program *shader_program; - struct gl_shader *shader; + struct gl_linked_shader *shader; struct gl_shader_compiler_options *options; int next_temp; @@ -386,9 +408,11 @@ unsigned max_num_arrays; unsigned next_array; - struct array_decl input_arrays[PIPE_MAX_SHADER_INPUTS]; + struct inout_decl inputs[4 * PIPE_MAX_SHADER_INPUTS]; + unsigned num_inputs; unsigned num_input_arrays; - struct array_decl output_arrays[PIPE_MAX_SHADER_OUTPUTS]; + struct inout_decl outputs[4 * PIPE_MAX_SHADER_OUTPUTS]; + unsigned num_outputs; unsigned num_output_arrays; int num_address_regs; @@ -411,9 +435,7 @@ variable_storage *find_variable_storage(ir_variable *var); int add_constant(gl_register_file file, gl_constant_value values[8], - int size, int datatype, GLuint *swizzle_out); - - function_entry *get_function_signature(ir_function_signature *sig); + int size, int datatype, uint16_t *swizzle_out); st_src_reg get_temp(const glsl_type *type); void reladdr_to_temp(ir_instruction *ir, st_src_reg *reg, int *num_reladdr); @@ -421,7 +443,7 @@ st_src_reg st_src_reg_for_double(double val); st_src_reg st_src_reg_for_float(float val); st_src_reg st_src_reg_for_int(int val); - st_src_reg st_src_reg_for_type(int type, int val); + st_src_reg st_src_reg_for_type(enum glsl_base_type type, int val); /** * \name Visit methods @@ -470,10 +492,6 @@ exec_list immediates; unsigned num_immediates; - /** List of function_entry */ - exec_list function_signatures; - int next_signature_id; - /** List of glsl_to_tgsi_instruction */ exec_list instructions; @@ -491,7 +509,7 @@ st_src_reg src2 = undef_src, st_src_reg src3 = undef_src); - unsigned get_opcode(ir_instruction *ir, unsigned op, + unsigned get_opcode(unsigned op, st_dst_reg dst, st_src_reg src0, st_src_reg src1); @@ -515,14 +533,12 @@ void get_deref_offsets(ir_dereference *ir, unsigned *array_size, unsigned *base, - unsigned *index, + uint16_t *index, st_src_reg *reladdr, bool opaque); - void calc_deref_offsets(ir_dereference *head, - ir_dereference *tail, + void calc_deref_offsets(ir_dereference *tail, unsigned *array_elements, - unsigned *base, - unsigned *index, + uint16_t *index, st_src_reg *indirect, unsigned *location); st_src_reg canonicalize_gather_offset(st_src_reg offset); @@ -569,10 +585,10 @@ { va_list args; va_start(args, fmt); - ralloc_vasprintf_append(&prog->InfoLog, fmt, args); + ralloc_vasprintf_append(&prog->data->InfoLog, fmt, args); va_end(args); - prog->LinkStatus = GL_FALSE; + prog->data->LinkStatus = GL_FALSE; } static int @@ -632,9 +648,9 @@ { glsl_to_tgsi_instruction *inst = new(mem_ctx) glsl_to_tgsi_instruction(); int num_reladdr = 0, i, j; - bool dst_is_double[2]; + bool dst_is_64bit[2]; - op = get_opcode(ir, op, dst, src0, src1); + op = get_opcode(op, dst, src0, src1); /* If we have to do relative addressing, we want to load the ARL * reg directly for one of the regs, and preload the other reladdr @@ -665,6 +681,9 @@ } assert(num_reladdr == 0); + /* inst->op has only 8 bits. */ + STATIC_ASSERT(TGSI_OPCODE_LAST <= 255); + inst->op = op; inst->info = tgsi_get_opcode_info(op); inst->dst[0] = dst; @@ -676,13 +695,15 @@ inst->is_64bit_expanded = false; inst->ir = ir; inst->dead_mask = 0; + inst->tex_offsets = NULL; + inst->tex_offset_num_offset = 0; + inst->saturate = 0; + inst->tex_shadow = 0; /* default to float, for paths where this is not initialized * (since 0==UINT which is likely wrong): */ inst->tex_type = GLSL_TYPE_FLOAT; - inst->function = NULL; - /* Update indirect addressing status used by TGSI */ if (dst.reladdr || dst.reladdr2) { switch(dst.file) { @@ -736,18 +757,16 @@ * GLSL [0].w -> TGSI [1].zw */ for (j = 0; j < 2; j++) { - dst_is_double[j] = false; - if (inst->dst[j].type == GLSL_TYPE_DOUBLE) - dst_is_double[j] = true; - else if (inst->dst[j].file == PROGRAM_OUTPUT && inst->dst[j].type == GLSL_TYPE_ARRAY) { - unsigned type = find_array_type(this->output_arrays, this->num_output_arrays, inst->dst[j].array_id); - if (type == GLSL_TYPE_DOUBLE) - dst_is_double[j] = true; + dst_is_64bit[j] = glsl_base_type_is_64bit(inst->dst[j].type); + if (!dst_is_64bit[j] && inst->dst[j].file == PROGRAM_OUTPUT && inst->dst[j].type == GLSL_TYPE_ARRAY) { + enum glsl_base_type type = find_array_type(this->outputs, this->num_outputs, inst->dst[j].array_id); + if (glsl_base_type_is_64bit(type)) + dst_is_64bit[j] = true; } } - if (dst_is_double[0] || dst_is_double[1] || - inst->src[0].type == GLSL_TYPE_DOUBLE) { + if (dst_is_64bit[0] || dst_is_64bit[1] || + glsl_base_type_is_64bit(inst->src[0].type)) { glsl_to_tgsi_instruction *dinst = NULL; int initial_src_swz[4], initial_src_idx[4]; int initial_dst_idx[2], initial_dst_writemask[2]; @@ -774,9 +793,9 @@ int i = u_bit_scan(&writemask); - /* before emitting the instruction, see if we have to adjust store + /* before emitting the instruction, see if we have to adjust load / store * address */ - if (i > 1 && inst->op == TGSI_OPCODE_STORE && + if (i > 1 && (inst->op == TGSI_OPCODE_LOAD || inst->op == TGSI_OPCODE_STORE) && addr.file == PROGRAM_UNDEFINED) { /* We have to advance the buffer address by 16 */ addr = get_temp(glsl_type::uint_type); @@ -784,7 +803,6 @@ inst->src[0], st_src_reg_for_int(16)); } - /* first time use previous instruction */ if (dinst == NULL) { dinst = inst; @@ -800,15 +818,14 @@ /* modify the destination if we are splitting */ for (j = 0; j < 2; j++) { - if (dst_is_double[j]) { + if (dst_is_64bit[j]) { dinst->dst[j].writemask = (i & 1) ? WRITEMASK_ZW : WRITEMASK_XY; dinst->dst[j].index = initial_dst_idx[j]; if (i > 1) { - if (dinst->op == TGSI_OPCODE_STORE) { + if (dinst->op == TGSI_OPCODE_LOAD || dinst->op == TGSI_OPCODE_STORE) dinst->src[0] = addr; - } else { + if (dinst->op != TGSI_OPCODE_STORE) dinst->dst[j].index++; - } } } else { /* if we aren't writing to a double, just get the bit of the initial writemask @@ -821,7 +838,7 @@ for (j = 0; j < 4; j++) { int swz = GET_SWZ(initial_src_swz[j], i); - if (dinst->src[j].type == GLSL_TYPE_DOUBLE) { + if (glsl_base_type_is_64bit(dinst->src[j].type)) { dinst->src[j].index = initial_src_idx[j]; if (swz > 1) { dinst->src[j].double_reg2 = true; @@ -835,10 +852,11 @@ } else { /* some opcodes are special case in what they use as sources - - F2D is a float src0, DLDEXP is integer src1 */ - if (op == TGSI_OPCODE_F2D || + - [FUI]2D/[UI]2I64 is a float/[u]int src0, DLDEXP is integer src1 */ + if (op == TGSI_OPCODE_F2D || op == TGSI_OPCODE_U2D || op == TGSI_OPCODE_I2D || + op == TGSI_OPCODE_I2I64 || op == TGSI_OPCODE_U2I64 || op == TGSI_OPCODE_DLDEXP || - (op == TGSI_OPCODE_UCMP && dst_is_double[0])) { + (op == TGSI_OPCODE_UCMP && dst_is_64bit[0])) { dinst->src[j].swizzle = MAKE_SWIZZLE4(swz, swz, swz, swz); } } @@ -867,11 +885,11 @@ * based on the operands and input opcode, then emits the result. */ unsigned -glsl_to_tgsi_visitor::get_opcode(ir_instruction *ir, unsigned op, +glsl_to_tgsi_visitor::get_opcode(unsigned op, st_dst_reg dst, st_src_reg src0, st_src_reg src1) { - int type = GLSL_TYPE_FLOAT; + enum glsl_base_type type = GLSL_TYPE_FLOAT; if (op == TGSI_OPCODE_MOV) return op; @@ -937,7 +955,7 @@ case3fid(MUL, UMUL, DMUL); case3fid(MAD, UMAD, DMAD); case3fid(FMA, UMAD, DFMA); - case3(DIV, IDIV, UDIV); + case4d(DIV, IDIV, UDIV, DDIV); case4d(MAX, IMAX, UMAX, DMAX); case4d(MIN, IMIN, UMIN, DMIN); case2iu(MOD, UMOD); @@ -950,7 +968,6 @@ case2iu(ISHR, USHR); case3fid(SSG, ISSG, DSSG); - case3fid(ABS, IABS, DABS); case2iu(IBFE, UBFE); case2iu(IMSB, UMSB); @@ -1071,11 +1088,15 @@ int glsl_to_tgsi_visitor::add_constant(gl_register_file file, gl_constant_value values[8], int size, int datatype, - GLuint *swizzle_out) + uint16_t *swizzle_out) { if (file == PROGRAM_CONSTANT) { - return _mesa_add_typed_unnamed_constant(this->prog->Parameters, values, - size, datatype, swizzle_out); + GLuint swizzle = swizzle_out ? *swizzle_out : 0; + int result = _mesa_add_typed_unnamed_constant(this->prog->Parameters, values, + size, datatype, &swizzle); + if (swizzle_out) + *swizzle_out = swizzle; + return result; } assert(file == PROGRAM_IMMEDIATE); @@ -1138,8 +1159,7 @@ st_src_reg src(PROGRAM_IMMEDIATE, -1, GLSL_TYPE_DOUBLE); union gl_constant_value uval[2]; - uval[0].u = *(uint32_t *)&val; - uval[1].u = *(((uint32_t *)&val) + 1); + memcpy(uval, &val, sizeof(uval)); src.index = add_constant(src.file, uval, 1, GL_DOUBLE, &src.swizzle); src.swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_X, SWIZZLE_Y); return src; @@ -1160,7 +1180,7 @@ } st_src_reg -glsl_to_tgsi_visitor::st_src_reg_for_type(int type, int val) +glsl_to_tgsi_visitor::st_src_reg_for_type(enum glsl_base_type type, int val) { if (native_integers) return type == GLSL_TYPE_FLOAT ? st_src_reg_for_float(val) : @@ -1221,6 +1241,7 @@ src.type = native_integers ? type->base_type : GLSL_TYPE_FLOAT; src.reladdr = NULL; src.negate = 0; + src.abs = 0; if (!options->EmitNoIndirectTemp && type_has_array_or_matrix(type)) { if (next_array >= max_num_arrays) { @@ -1230,7 +1251,8 @@ } src.file = PROGRAM_ARRAY; - src.index = next_array << 16 | 0x8000; + src.index = 0; + src.array_id = next_array + 1; array_sizes[next_array] = type_size(type); ++next_array; @@ -1265,10 +1287,8 @@ glsl_to_tgsi_visitor::visit(ir_variable *ir) { if (strcmp(ir->name, "gl_FragCoord") == 0) { - struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog; - - fp->OriginUpperLeft = ir->data.origin_upper_left; - fp->PixelCenterInteger = ir->data.pixel_center_integer; + this->prog->OriginUpperLeft = ir->data.origin_upper_left; + this->prog->PixelCenterInteger = ir->data.pixel_center_integer; } if (ir->data.mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) { @@ -1305,7 +1325,8 @@ dst = st_dst_reg(get_temp(ir->type)); - storage = new(mem_ctx) variable_storage(ir, dst.file, dst.index); + storage = new(mem_ctx) variable_storage(ir, dst.file, dst.index, + dst.array_id); this->variables.push_tail(storage); } @@ -1586,7 +1607,12 @@ emit_asm(ir, TGSI_OPCODE_MOV, result_dst, op[0]); break; case ir_unop_abs: - emit_asm(ir, TGSI_OPCODE_ABS, result_dst, op[0]); + if (result_dst.type == GLSL_TYPE_FLOAT) + emit_asm(ir, TGSI_OPCODE_MOV, result_dst, op[0].get_abs()); + else if (result_dst.type == GLSL_TYPE_DOUBLE) + emit_asm(ir, TGSI_OPCODE_DABS, result_dst, op[0]); + else + emit_asm(ir, TGSI_OPCODE_IABS, result_dst, op[0]); break; case ir_unop_sign: emit_asm(ir, TGSI_OPCODE_SSG, result_dst, op[0]); @@ -1676,17 +1702,15 @@ emit_asm(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]); break; case ir_binop_sub: - emit_asm(ir, TGSI_OPCODE_SUB, result_dst, op[0], op[1]); + op[1].negate = ~op[1].negate; + emit_asm(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]); break; case ir_binop_mul: emit_asm(ir, TGSI_OPCODE_MUL, result_dst, op[0], op[1]); break; case ir_binop_div: - if (result_dst.type == GLSL_TYPE_FLOAT || result_dst.type == GLSL_TYPE_DOUBLE) - assert(!"not reached: should be handled by ir_div_to_mul_rcp"); - else - emit_asm(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]); + emit_asm(ir, TGSI_OPCODE_DIV, result_dst, op[0], op[1]); break; case ir_binop_mod: if (result_dst.type == GLSL_TYPE_FLOAT) @@ -1906,13 +1930,14 @@ if (have_sqrt) { emit_scalar(ir, TGSI_OPCODE_SQRT, result_dst, op[0]); } else { - /* sqrt(x) = x * rsq(x). */ - emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0]); - emit_asm(ir, TGSI_OPCODE_MUL, result_dst, result_src, op[0]); - /* For incoming channels <= 0, set the result to 0. */ - op[0].negate = ~op[0].negate; - emit_asm(ir, TGSI_OPCODE_CMP, result_dst, - op[0], result_src, st_src_reg_for_float(0.0)); + /* This is the only instruction sequence that makes the game "Risen" + * render correctly. ABS is not required for the game, but since GLSL + * declares negative values as "undefined", allowing us to do whatever + * we want, I choose to use ABS to match DX9 and pre-GLSL RSQ + * behavior. + */ + emit_scalar(ir, TGSI_OPCODE_RSQ, result_dst, op[0].get_abs()); + emit_scalar(ir, TGSI_OPCODE_RCP, result_dst, result_src); } break; case ir_unop_rsq: @@ -1965,7 +1990,7 @@ case ir_unop_bitcast_f2i: case ir_unop_bitcast_f2u: /* Make sure we don't propagate the negate modifier to integer opcodes. */ - if (op[0].negate) + if (op[0].negate || op[0].abs) emit_asm(ir, TGSI_OPCODE_MOV, result_dst, op[0]); else result_src = op[0]; @@ -2067,6 +2092,7 @@ cbuf.index = 0; cbuf.reladdr = NULL; cbuf.negate = 0; + cbuf.abs = 0; assert(ir->type->is_vector() || ir->type->is_scalar()); @@ -2076,8 +2102,35 @@ cbuf.index = const_offset / 16; } else { + ir_expression *offset_expr = ir->operands[1]->as_expression(); + st_src_reg offset = op[1]; + + /* The OpenGL spec is written in such a way that accesses with + * non-constant offset are almost always vec4-aligned. The only + * exception to this are members of structs in arrays of structs: + * each struct in an array of structs is at least vec4-aligned, + * but single-element and [ui]vec2 members of the struct may be at + * an offset that is not a multiple of 16 bytes. + * + * Here, we extract that offset, relying on previous passes to always + * generate offset expressions of the form (+ expr constant_offset). + * + * Note that the std430 layout, which allows more cases of alignment + * less than vec4 in arrays, is not supported for uniform blocks, so + * we do not have to deal with it here. + */ + if (offset_expr && offset_expr->operation == ir_binop_add) { + const_offset_ir = offset_expr->operands[1]->as_constant(); + if (const_offset_ir) { + const_offset = const_offset_ir->value.u[0]; + cbuf.index = const_offset / 16; + offset_expr->operands[0]->accept(this); + offset = this->result; + } + } + /* Relative/variable index into constant buffer */ - emit_asm(ir, TGSI_OPCODE_USHR, st_dst_reg(index_reg), op[1], + emit_asm(ir, TGSI_OPCODE_USHR, st_dst_reg(index_reg), offset, st_src_reg_for_int(4)); cbuf.reladdr = ralloc(mem_ctx, st_src_reg); memcpy(cbuf.reladdr, &index_reg, sizeof(index_reg)); @@ -2098,7 +2151,7 @@ } cbuf.swizzle = swizzle_for_size(ir->type->vector_elements); - if (cbuf.type == GLSL_TYPE_DOUBLE) + if (glsl_base_type_is_64bit(cbuf.type)) cbuf.swizzle += MAKE_SWIZZLE4(const_offset % 16 / 8, const_offset % 16 / 8, const_offset % 16 / 8, @@ -2233,13 +2286,23 @@ GLSL_TYPE_UINT); if (!const_offset) { buffer.reladdr = ralloc(mem_ctx, st_src_reg); - memcpy(buffer.reladdr, &sampler_reladdr, sizeof(sampler_reladdr)); + *buffer.reladdr = op[0]; emit_arl(ir, sampler_reladdr, op[0]); } - emit_asm(ir, TGSI_OPCODE_RESQ, result_dst)->buffer = buffer; + emit_asm(ir, TGSI_OPCODE_RESQ, result_dst)->resource = buffer; break; } + case ir_unop_vote_any: + emit_asm(ir, TGSI_OPCODE_VOTE_ANY, result_dst, op[0]); + break; + case ir_unop_vote_all: + emit_asm(ir, TGSI_OPCODE_VOTE_ALL, result_dst, op[0]); + break; + case ir_unop_vote_eq: + emit_asm(ir, TGSI_OPCODE_VOTE_EQ, result_dst, op[0]); + break; + case ir_unop_pack_snorm_2x16: case ir_unop_pack_unorm_2x16: case ir_unop_pack_snorm_4x8: @@ -2317,16 +2380,16 @@ * for patch inputs), so only the array element type is considered. */ static bool -is_inout_array(unsigned stage, ir_variable *var, bool *is_2d) +is_inout_array(unsigned stage, ir_variable *var, bool *remove_array) { const glsl_type *type = var->type; + *remove_array = false; + if ((stage == MESA_SHADER_VERTEX && var->data.mode == ir_var_shader_in) || (stage == MESA_SHADER_FRAGMENT && var->data.mode == ir_var_shader_out)) return false; - *is_2d = false; - if (((stage == MESA_SHADER_GEOMETRY && var->data.mode == ir_var_shader_in) || (stage == MESA_SHADER_TESS_EVAL && var->data.mode == ir_var_shader_in) || stage == MESA_SHADER_TESS_CTRL) && @@ -2335,18 +2398,29 @@ return false; /* a system value probably */ type = var->type->fields.array; - *is_2d = true; + *remove_array = true; } return type->is_array() || type->is_matrix(); } +static unsigned +st_translate_interp_loc(ir_variable *var) +{ + if (var->data.centroid) + return TGSI_INTERPOLATE_LOC_CENTROID; + else if (var->data.sample) + return TGSI_INTERPOLATE_LOC_SAMPLE; + else + return TGSI_INTERPOLATE_LOC_CENTER; +} + void glsl_to_tgsi_visitor::visit(ir_dereference_variable *ir) { variable_storage *entry = find_variable_storage(ir->var); ir_variable *var = ir->var; - bool is_2d; + bool remove_array; if (!entry) { switch (var->data.mode) { @@ -2355,7 +2429,7 @@ var->data.param_index); this->variables.push_tail(entry); break; - case ir_var_shader_in: + case ir_var_shader_in: { /* The linker assigns locations for varyings and attributes, * including deprecated builtins (like gl_Color), user-assign * generic attributes (glBindVertexLocation), and @@ -2363,62 +2437,104 @@ */ assert(var->data.location != -1); - if (is_inout_array(shader->Stage, var, &is_2d)) { - struct array_decl *decl = &input_arrays[num_input_arrays]; + const glsl_type *type_without_array = var->type->without_array(); + struct inout_decl *decl = &inputs[num_inputs]; + unsigned component = var->data.location_frac; + unsigned num_components; + num_inputs++; + + if (type_without_array->is_64bit()) + component = component / 2; + if (type_without_array->vector_elements) + num_components = type_without_array->vector_elements; + else + num_components = 4; + + decl->mesa_index = var->data.location; + decl->interp = (glsl_interp_mode) var->data.interpolation; + decl->interp_loc = st_translate_interp_loc(var); + decl->base_type = type_without_array->base_type; + decl->usage_mask = u_bit_consecutive(component, num_components); - decl->mesa_index = var->data.location; + if (is_inout_array(shader->Stage, var, &remove_array)) { decl->array_id = num_input_arrays + 1; - if (is_2d) { - decl->array_size = type_size(var->type->fields.array); - decl->array_type = var->type->fields.array->without_array()->base_type; - } else { - decl->array_size = type_size(var->type); - decl->array_type = var->type->without_array()->base_type; - } num_input_arrays++; - - entry = new(mem_ctx) variable_storage(var, - PROGRAM_INPUT, - var->data.location, - decl->array_id); - } - else { - entry = new(mem_ctx) variable_storage(var, - PROGRAM_INPUT, - var->data.location); + } else { + decl->array_id = 0; } + + if (remove_array) + decl->size = type_size(var->type->fields.array); + else + decl->size = type_size(var->type); + + entry = new(mem_ctx) variable_storage(var, + PROGRAM_INPUT, + decl->mesa_index, + decl->array_id); + entry->component = component; + this->variables.push_tail(entry); break; - case ir_var_shader_out: + } + case ir_var_shader_out: { assert(var->data.location != -1); - if (is_inout_array(shader->Stage, var, &is_2d)) { - struct array_decl *decl = &output_arrays[num_output_arrays]; + const glsl_type *type_without_array = var->type->without_array(); + struct inout_decl *decl = &outputs[num_outputs]; + unsigned component = var->data.location_frac; + unsigned num_components; + num_outputs++; + + if (type_without_array->is_64bit()) + component = component / 2; + if (type_without_array->vector_elements) + num_components = type_without_array->vector_elements; + else + num_components = 4; + + decl->mesa_index = var->data.location + FRAG_RESULT_MAX * var->data.index; + decl->base_type = type_without_array->base_type; + decl->usage_mask = u_bit_consecutive(component, num_components); + if (var->data.stream & (1u << 31)) { + decl->gs_out_streams = var->data.stream & ~(1u << 31); + } else { + assert(var->data.stream < 4); + decl->gs_out_streams = 0; + for (unsigned i = 0; i < num_components; ++i) + decl->gs_out_streams |= var->data.stream << (2 * (component + i)); + } - decl->mesa_index = var->data.location; + if (is_inout_array(shader->Stage, var, &remove_array)) { decl->array_id = num_output_arrays + 1; - if (is_2d) { - decl->array_size = type_size(var->type->fields.array); - decl->array_type = var->type->fields.array->without_array()->base_type; - } else { - decl->array_size = type_size(var->type); - decl->array_type = var->type->without_array()->base_type; - } num_output_arrays++; + } else { + decl->array_id = 0; + } + + if (remove_array) + decl->size = type_size(var->type->fields.array); + else + decl->size = type_size(var->type); + if (var->data.fb_fetch_output) { + st_dst_reg dst = st_dst_reg(get_temp(var->type)); + st_src_reg src = st_src_reg(PROGRAM_OUTPUT, decl->mesa_index, + var->type, component, decl->array_id); + emit_asm(NULL, TGSI_OPCODE_FBFETCH, dst, src); + entry = new(mem_ctx) variable_storage(var, dst.file, dst.index, + dst.array_id); + } else { entry = new(mem_ctx) variable_storage(var, PROGRAM_OUTPUT, - var->data.location, + decl->mesa_index, decl->array_id); } - else { - entry = new(mem_ctx) variable_storage(var, - PROGRAM_OUTPUT, - var->data.location - + var->data.index); - } + entry->component = component; + this->variables.push_tail(entry); break; + } case ir_var_system_value: entry = new(mem_ctx) variable_storage(var, PROGRAM_SYSTEM_VALUE, @@ -2428,7 +2544,8 @@ case ir_var_temporary: st_src_reg src = get_temp(var->type); - entry = new(mem_ctx) variable_storage(var, src.file, src.index); + entry = new(mem_ctx) variable_storage(var, src.file, src.index, + src.array_id); this->variables.push_tail(entry); break; @@ -2440,8 +2557,8 @@ } } - this->result = st_src_reg(entry->file, entry->index, var->type); - this->result.array_id = entry->array_id; + this->result = st_src_reg(entry->file, entry->index, var->type, + entry->component, entry->array_id); if (this->shader->Stage == MESA_SHADER_VERTEX && var->data.mode == ir_var_shader_in && var->type->is_double()) this->result.is_double_vertex_input = true; if (!native_integers) @@ -2449,53 +2566,72 @@ } static void -shrink_array_declarations(struct array_decl *arrays, unsigned count, - GLbitfield64 usage_mask, +shrink_array_declarations(struct inout_decl *decls, unsigned count, + GLbitfield64* usage_mask, GLbitfield64 double_usage_mask, - GLbitfield patch_usage_mask) + GLbitfield* patch_usage_mask) { - unsigned i, j; + unsigned i; + int j; /* Fix array declarations by removing unused array elements at both ends * of the arrays. For example, mat4[3] where only mat[1] is used. */ for (i = 0; i < count; i++) { - struct array_decl *decl = &arrays[i]; + struct inout_decl *decl = &decls[i]; + if (!decl->array_id) + continue; /* Shrink the beginning. */ - for (j = 0; j < decl->array_size; j++) { + for (j = 0; j < (int)decl->size; j++) { if (decl->mesa_index >= VARYING_SLOT_PATCH0) { - if (patch_usage_mask & + if (*patch_usage_mask & BITFIELD64_BIT(decl->mesa_index - VARYING_SLOT_PATCH0 + j)) break; } else { - if (usage_mask & BITFIELD64_BIT(decl->mesa_index+j)) + if (*usage_mask & BITFIELD64_BIT(decl->mesa_index+j)) break; if (double_usage_mask & BITFIELD64_BIT(decl->mesa_index+j-1)) break; } decl->mesa_index++; - decl->array_size--; + decl->size--; j--; } /* Shrink the end. */ - for (j = decl->array_size-1; j >= 0; j--) { + for (j = decl->size-1; j >= 0; j--) { if (decl->mesa_index >= VARYING_SLOT_PATCH0) { - if (patch_usage_mask & + if (*patch_usage_mask & BITFIELD64_BIT(decl->mesa_index - VARYING_SLOT_PATCH0 + j)) break; } else { - if (usage_mask & BITFIELD64_BIT(decl->mesa_index+j)) + if (*usage_mask & BITFIELD64_BIT(decl->mesa_index+j)) break; if (double_usage_mask & BITFIELD64_BIT(decl->mesa_index+j-1)) break; } - decl->array_size--; + decl->size--; + } + + /* When not all entries of an array are accessed, we mark them as used + * here anyway, to ensure that the input/output mapping logic doesn't get + * confused. + * + * TODO This happens when an array isn't used via indirect access, which + * some game ports do (at least eON-based). There is an optimization + * opportunity here by replacing the array declaration with non-array + * declarations of those slots that are actually used. + */ + for (j = 1; j < (int)decl->size; ++j) { + if (decl->mesa_index >= VARYING_SLOT_PATCH0) + *patch_usage_mask |= BITFIELD64_BIT(decl->mesa_index - VARYING_SLOT_PATCH0 + j); + else + *usage_mask |= BITFIELD64_BIT(decl->mesa_index + j); } } } @@ -2585,12 +2721,6 @@ } } - /* If the type is smaller than a vec4, replicate the last channel out. */ - if (ir->type->is_scalar() || ir->type->is_vector()) - src.swizzle = swizzle_for_size(ir->type->vector_elements); - else - src.swizzle = SWIZZLE_NOOP; - /* Change the register type to the element type of the array. */ src.type = ir->type->base_type; @@ -2628,7 +2758,7 @@ * ir_dereference handler. */ static st_dst_reg -get_assignment_lhs(ir_dereference *ir, glsl_to_tgsi_visitor *v) +get_assignment_lhs(ir_dereference *ir, glsl_to_tgsi_visitor *v, int *component) { /* The LHS must be a dereference. If the LHS is a variable indexed array * access of a vector, it must be separated into a series conditional moves @@ -2640,10 +2770,12 @@ assert(!deref_array->array->type->is_vector()); } - /* Use the rvalue deref handler for the most part. We'll ignore - * swizzles in it and write swizzles using writemask, though. + /* Use the rvalue deref handler for the most part. We write swizzles using + * the writemask, but we do extract the base component for enhanced layouts + * from the source swizzle. */ ir->accept(v); + *component = GET_SWZ(v->result.swizzle, 0); return st_dst_reg(v->result); } @@ -2819,7 +2951,7 @@ } l->index++; r->index++; - if (type->is_dual_slot_double()) { + if (type->is_dual_slot()) { l->index++; if (r->is_double_vertex_input == false) r->index++; @@ -2829,53 +2961,48 @@ void glsl_to_tgsi_visitor::visit(ir_assignment *ir) { + int dst_component; st_dst_reg l; st_src_reg r; ir->rhs->accept(this); r = this->result; - l = get_assignment_lhs(ir->lhs, this); - - /* FINISHME: This should really set to the correct maximal writemask for each - * FINISHME: component written (in the loops below). This case can only - * FINISHME: occur for matrices, arrays, and structures. - */ - if (ir->write_mask == 0) { - assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector()); + l = get_assignment_lhs(ir->lhs, this, &dst_component); - if (ir->lhs->type->is_array() || ir->lhs->type->without_array()->is_matrix()) { - if (ir->lhs->type->without_array()->is_double()) { - switch (ir->lhs->type->without_array()->vector_elements) { - case 1: - l.writemask = WRITEMASK_X; - break; - case 2: - l.writemask = WRITEMASK_XY; - break; - case 3: - l.writemask = WRITEMASK_XYZ; - break; - case 4: - l.writemask = WRITEMASK_XYZW; - break; - } - } else - l.writemask = WRITEMASK_XYZW; - } - } else if (ir->lhs->type->is_scalar() && - !ir->lhs->type->is_double() && - ir->lhs->variable_referenced()->data.mode == ir_var_shader_out) { - /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the - * FINISHME: W component of fragment shader output zero, work correctly. - */ - l.writemask = WRITEMASK_XYZW; - } else { + { int swizzles[4]; int first_enabled_chan = 0; int rhs_chan = 0; + ir_variable *variable = ir->lhs->variable_referenced(); - l.writemask = ir->write_mask; + if (shader->Stage == MESA_SHADER_FRAGMENT && + variable->data.mode == ir_var_shader_out && + (variable->data.location == FRAG_RESULT_DEPTH || + variable->data.location == FRAG_RESULT_STENCIL)) { + assert(ir->lhs->type->is_scalar()); + assert(ir->write_mask == WRITEMASK_X); + + if (variable->data.location == FRAG_RESULT_DEPTH) + l.writemask = WRITEMASK_Z; + else { + assert(variable->data.location == FRAG_RESULT_STENCIL); + l.writemask = WRITEMASK_Y; + } + } else if (ir->write_mask == 0) { + assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector()); + + unsigned num_elements = ir->lhs->type->without_array()->vector_elements; + + if (num_elements) { + l.writemask = u_bit_consecutive(0, num_elements); + } else { + /* The type is a struct or an array of (array of) structs. */ + l.writemask = WRITEMASK_XYZW; + } + } else { + l.writemask = ir->write_mask; + } for (int i = 0; i < 4; i++) { if (l.writemask & (1 << i)) { @@ -2884,6 +3011,8 @@ } } + l.writemask = l.writemask << dst_component; + /* Swizzle a small RHS vector into the channels being written. * * glsl ir treats write_mask as dictating how many channels are @@ -3062,8 +3191,7 @@ case GLSL_TYPE_DOUBLE: gl_type = GL_DOUBLE; for (i = 0; i < ir->type->vector_elements; i++) { - values[i * 2].i = *(uint32_t *)&ir->value.d[i]; - values[i * 2 + 1].i = *(((uint32_t *)&ir->value.d[i]) + 1); + memcpy(&values[i * 2], &ir->value.d[i], sizeof(double)); } break; case GLSL_TYPE_UINT: @@ -3102,46 +3230,9 @@ &this->result.swizzle); } -function_entry * -glsl_to_tgsi_visitor::get_function_signature(ir_function_signature *sig) -{ - foreach_in_list_use_after(function_entry, entry, &this->function_signatures) { - if (entry->sig == sig) - return entry; - } - - entry = ralloc(mem_ctx, function_entry); - entry->sig = sig; - entry->sig_id = this->next_signature_id++; - entry->bgn_inst = NULL; - - /* Allocate storage for all the parameters. */ - foreach_in_list(ir_variable, param, &sig->parameters) { - variable_storage *storage; - - storage = find_variable_storage(param); - assert(!storage); - - st_src_reg src = get_temp(param->type); - - storage = new(mem_ctx) variable_storage(param, src.file, src.index); - this->variables.push_tail(storage); - } - - if (!sig->return_type->is_void()) { - entry->return_reg = get_temp(sig->return_type); - } else { - entry->return_reg = undef_src; - } - - this->function_signatures.push_tail(entry); - return entry; -} - void glsl_to_tgsi_visitor::visit_atomic_counter_intrinsic(ir_call *ir) { - const char *callee = ir->callee->function_name(); exec_node *param = ir->actual_parameters.get_head(); ir_dereference *deref = static_cast(param); ir_variable *location = deref->variable_referenced(); @@ -3151,7 +3242,8 @@ /* Calculate the surface offset */ st_src_reg offset; - unsigned array_size = 0, base = 0, index = 0; + unsigned array_size = 0, base = 0; + uint16_t index = 0; get_deref_offsets(deref, &array_size, &base, &index, &offset, false); @@ -3170,12 +3262,12 @@ glsl_to_tgsi_instruction *inst; - if (!strcmp("__intrinsic_atomic_read", callee)) { + if (ir->callee->intrinsic_id == ir_intrinsic_atomic_counter_read) { inst = emit_asm(ir, TGSI_OPCODE_LOAD, dst, offset); - } else if (!strcmp("__intrinsic_atomic_increment", callee)) { + } else if (ir->callee->intrinsic_id == ir_intrinsic_atomic_counter_increment) { inst = emit_asm(ir, TGSI_OPCODE_ATOMUADD, dst, offset, st_src_reg_for_int(1)); - } else if (!strcmp("__intrinsic_atomic_predecrement", callee)) { + } else if (ir->callee->intrinsic_id == ir_intrinsic_atomic_counter_predecrement) { inst = emit_asm(ir, TGSI_OPCODE_ATOMUADD, dst, offset, st_src_reg_for_int(-1)); emit_asm(ir, TGSI_OPCODE_ADD, dst, this->result, st_src_reg_for_int(-1)); @@ -3186,34 +3278,37 @@ st_src_reg data = this->result, data2 = undef_src; unsigned opcode; - if (!strcmp("__intrinsic_atomic_add", callee)) + switch (ir->callee->intrinsic_id) { + case ir_intrinsic_atomic_counter_add: opcode = TGSI_OPCODE_ATOMUADD; - else if (!strcmp("__intrinsic_atomic_min", callee)) + break; + case ir_intrinsic_atomic_counter_min: opcode = TGSI_OPCODE_ATOMIMIN; - else if (!strcmp("__intrinsic_atomic_max", callee)) + break; + case ir_intrinsic_atomic_counter_max: opcode = TGSI_OPCODE_ATOMIMAX; - else if (!strcmp("__intrinsic_atomic_and", callee)) + break; + case ir_intrinsic_atomic_counter_and: opcode = TGSI_OPCODE_ATOMAND; - else if (!strcmp("__intrinsic_atomic_or", callee)) + break; + case ir_intrinsic_atomic_counter_or: opcode = TGSI_OPCODE_ATOMOR; - else if (!strcmp("__intrinsic_atomic_xor", callee)) + break; + case ir_intrinsic_atomic_counter_xor: opcode = TGSI_OPCODE_ATOMXOR; - else if (!strcmp("__intrinsic_atomic_exchange", callee)) + break; + case ir_intrinsic_atomic_counter_exchange: opcode = TGSI_OPCODE_ATOMXCHG; - else if (!strcmp("__intrinsic_atomic_comp_swap", callee)) { + break; + case ir_intrinsic_atomic_counter_comp_swap: { opcode = TGSI_OPCODE_ATOMCAS; param = param->get_next(); val = ((ir_instruction *)param)->as_rvalue(); val->accept(this); data2 = this->result; - } else if (!strcmp("__intrinsic_atomic_sub", callee)) { - opcode = TGSI_OPCODE_ATOMUADD; - st_src_reg res = get_temp(glsl_type::uvec4_type); - st_dst_reg dstres = st_dst_reg(res); - dstres.writemask = dst.writemask; - emit_asm(ir, TGSI_OPCODE_INEG, dstres, data); - data = res; - } else { + break; + } + default: assert(!"Unexpected intrinsic"); return; } @@ -3221,13 +3316,12 @@ inst = emit_asm(ir, opcode, dst, offset, data, data2); } - inst->buffer = buffer; + inst->resource = buffer; } void glsl_to_tgsi_visitor::visit_ssbo_intrinsic(ir_call *ir) { - const char *callee = ir->callee->function_name(); exec_node *param = ir->actual_parameters.get_head(); ir_rvalue *block = ((ir_instruction *)param)->as_rvalue(); @@ -3245,9 +3339,9 @@ if (!const_block) { block->accept(this); - emit_arl(ir, sampler_reladdr, this->result); buffer.reladdr = ralloc(mem_ctx, st_src_reg); - memcpy(buffer.reladdr, &sampler_reladdr, sizeof(sampler_reladdr)); + *buffer.reladdr = this->result; + emit_arl(ir, sampler_reladdr, this->result); } /* Calculate the surface offset */ @@ -3263,11 +3357,11 @@ glsl_to_tgsi_instruction *inst; - if (!strcmp("__intrinsic_load_ssbo", callee)) { + if (ir->callee->intrinsic_id == ir_intrinsic_ssbo_load) { inst = emit_asm(ir, TGSI_OPCODE_LOAD, dst, off); if (dst.type == GLSL_TYPE_BOOL) emit_asm(ir, TGSI_OPCODE_USNE, dst, st_src_reg(dst), st_src_reg_for_int(0)); - } else if (!strcmp("__intrinsic_store_ssbo", callee)) { + } else if (ir->callee->intrinsic_id == ir_intrinsic_ssbo_store) { param = param->get_next(); ir_rvalue *val = ((ir_instruction *)param)->as_rvalue(); val->accept(this); @@ -3286,27 +3380,36 @@ st_src_reg data = this->result, data2 = undef_src; unsigned opcode; - if (!strcmp("__intrinsic_atomic_add_ssbo", callee)) + switch (ir->callee->intrinsic_id) { + case ir_intrinsic_ssbo_atomic_add: opcode = TGSI_OPCODE_ATOMUADD; - else if (!strcmp("__intrinsic_atomic_min_ssbo", callee)) + break; + case ir_intrinsic_ssbo_atomic_min: opcode = TGSI_OPCODE_ATOMIMIN; - else if (!strcmp("__intrinsic_atomic_max_ssbo", callee)) + break; + case ir_intrinsic_ssbo_atomic_max: opcode = TGSI_OPCODE_ATOMIMAX; - else if (!strcmp("__intrinsic_atomic_and_ssbo", callee)) + break; + case ir_intrinsic_ssbo_atomic_and: opcode = TGSI_OPCODE_ATOMAND; - else if (!strcmp("__intrinsic_atomic_or_ssbo", callee)) + break; + case ir_intrinsic_ssbo_atomic_or: opcode = TGSI_OPCODE_ATOMOR; - else if (!strcmp("__intrinsic_atomic_xor_ssbo", callee)) + break; + case ir_intrinsic_ssbo_atomic_xor: opcode = TGSI_OPCODE_ATOMXOR; - else if (!strcmp("__intrinsic_atomic_exchange_ssbo", callee)) + break; + case ir_intrinsic_ssbo_atomic_exchange: opcode = TGSI_OPCODE_ATOMXCHG; - else if (!strcmp("__intrinsic_atomic_comp_swap_ssbo", callee)) { + break; + case ir_intrinsic_ssbo_atomic_comp_swap: opcode = TGSI_OPCODE_ATOMCAS; param = param->get_next(); val = ((ir_instruction *)param)->as_rvalue(); val->accept(this); data2 = this->result; - } else { + break; + default: assert(!"Unexpected intrinsic"); return; } @@ -3326,53 +3429,65 @@ */ unsigned op = inst->op; do { - inst->buffer = buffer; + inst->resource = buffer; if (access) inst->buffer_access = access->value.u[0]; + + if (inst == this->instructions.get_head_raw()) + break; inst = (glsl_to_tgsi_instruction *)inst->get_prev(); - if (inst->op == TGSI_OPCODE_UADD) + + if (inst->op == TGSI_OPCODE_UADD) { + if (inst == this->instructions.get_head_raw()) + break; inst = (glsl_to_tgsi_instruction *)inst->get_prev(); - } while (inst && inst->buffer.file == PROGRAM_UNDEFINED && inst->op == op); + } + } while (inst->op == op && inst->resource.file == PROGRAM_UNDEFINED); } void glsl_to_tgsi_visitor::visit_membar_intrinsic(ir_call *ir) { - const char *callee = ir->callee->function_name(); - - if (!strcmp("__intrinsic_memory_barrier", callee)) + switch (ir->callee->intrinsic_id) { + case ir_intrinsic_memory_barrier: emit_asm(ir, TGSI_OPCODE_MEMBAR, undef_dst, st_src_reg_for_int(TGSI_MEMBAR_SHADER_BUFFER | TGSI_MEMBAR_ATOMIC_BUFFER | TGSI_MEMBAR_SHADER_IMAGE | TGSI_MEMBAR_SHARED)); - else if (!strcmp("__intrinsic_memory_barrier_atomic_counter", callee)) + break; + case ir_intrinsic_memory_barrier_atomic_counter: emit_asm(ir, TGSI_OPCODE_MEMBAR, undef_dst, st_src_reg_for_int(TGSI_MEMBAR_ATOMIC_BUFFER)); - else if (!strcmp("__intrinsic_memory_barrier_buffer", callee)) + break; + case ir_intrinsic_memory_barrier_buffer: emit_asm(ir, TGSI_OPCODE_MEMBAR, undef_dst, st_src_reg_for_int(TGSI_MEMBAR_SHADER_BUFFER)); - else if (!strcmp("__intrinsic_memory_barrier_image", callee)) + break; + case ir_intrinsic_memory_barrier_image: emit_asm(ir, TGSI_OPCODE_MEMBAR, undef_dst, st_src_reg_for_int(TGSI_MEMBAR_SHADER_IMAGE)); - else if (!strcmp("__intrinsic_memory_barrier_shared", callee)) + break; + case ir_intrinsic_memory_barrier_shared: emit_asm(ir, TGSI_OPCODE_MEMBAR, undef_dst, st_src_reg_for_int(TGSI_MEMBAR_SHARED)); - else if (!strcmp("__intrinsic_group_memory_barrier", callee)) + break; + case ir_intrinsic_group_memory_barrier: emit_asm(ir, TGSI_OPCODE_MEMBAR, undef_dst, st_src_reg_for_int(TGSI_MEMBAR_SHADER_BUFFER | TGSI_MEMBAR_ATOMIC_BUFFER | TGSI_MEMBAR_SHADER_IMAGE | TGSI_MEMBAR_SHARED | TGSI_MEMBAR_THREAD_GROUP)); - else + break; + default: assert(!"Unexpected memory barrier intrinsic"); + } } void glsl_to_tgsi_visitor::visit_shared_intrinsic(ir_call *ir) { - const char *callee = ir->callee->function_name(); exec_node *param = ir->actual_parameters.get_head(); ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue(); @@ -3392,10 +3507,10 @@ glsl_to_tgsi_instruction *inst; - if (!strcmp("__intrinsic_load_shared", callee)) { + if (ir->callee->intrinsic_id == ir_intrinsic_shared_load) { inst = emit_asm(ir, TGSI_OPCODE_LOAD, dst, off); - inst->buffer = buffer; - } else if (!strcmp("__intrinsic_store_shared", callee)) { + inst->resource = buffer; + } else if (ir->callee->intrinsic_id == ir_intrinsic_shared_store) { param = param->get_next(); ir_rvalue *val = ((ir_instruction *)param)->as_rvalue(); val->accept(this); @@ -3407,7 +3522,7 @@ dst.type = this->result.type; inst = emit_asm(ir, TGSI_OPCODE_STORE, dst, off, this->result); - inst->buffer = buffer; + inst->resource = buffer; } else { param = param->get_next(); ir_rvalue *val = ((ir_instruction *)param)->as_rvalue(); @@ -3415,40 +3530,48 @@ st_src_reg data = this->result, data2 = undef_src; unsigned opcode; - if (!strcmp("__intrinsic_atomic_add_shared", callee)) + switch (ir->callee->intrinsic_id) { + case ir_intrinsic_shared_atomic_add: opcode = TGSI_OPCODE_ATOMUADD; - else if (!strcmp("__intrinsic_atomic_min_shared", callee)) + break; + case ir_intrinsic_shared_atomic_min: opcode = TGSI_OPCODE_ATOMIMIN; - else if (!strcmp("__intrinsic_atomic_max_shared", callee)) + break; + case ir_intrinsic_shared_atomic_max: opcode = TGSI_OPCODE_ATOMIMAX; - else if (!strcmp("__intrinsic_atomic_and_shared", callee)) + break; + case ir_intrinsic_shared_atomic_and: opcode = TGSI_OPCODE_ATOMAND; - else if (!strcmp("__intrinsic_atomic_or_shared", callee)) + break; + case ir_intrinsic_shared_atomic_or: opcode = TGSI_OPCODE_ATOMOR; - else if (!strcmp("__intrinsic_atomic_xor_shared", callee)) + break; + case ir_intrinsic_shared_atomic_xor: opcode = TGSI_OPCODE_ATOMXOR; - else if (!strcmp("__intrinsic_atomic_exchange_shared", callee)) + break; + case ir_intrinsic_shared_atomic_exchange: opcode = TGSI_OPCODE_ATOMXCHG; - else if (!strcmp("__intrinsic_atomic_comp_swap_shared", callee)) { + break; + case ir_intrinsic_shared_atomic_comp_swap: opcode = TGSI_OPCODE_ATOMCAS; param = param->get_next(); val = ((ir_instruction *)param)->as_rvalue(); val->accept(this); data2 = this->result; - } else { + break; + default: assert(!"Unexpected intrinsic"); return; } inst = emit_asm(ir, opcode, dst, off, data, data2); - inst->buffer = buffer; + inst->resource = buffer; } } void glsl_to_tgsi_visitor::visit_image_intrinsic(ir_call *ir) { - const char *callee = ir->callee->function_name(); exec_node *param = ir->actual_parameters.get_head(); ir_dereference *img = (ir_dereference *)param; @@ -3460,11 +3583,12 @@ st_src_reg image(PROGRAM_IMAGE, 0, GLSL_TYPE_UINT); get_deref_offsets(img, &sampler_array_size, &sampler_base, - (unsigned int *)&image.index, &reladdr, true); + (uint16_t*)&image.index, &reladdr, true); + if (reladdr.file != PROGRAM_UNDEFINED) { - emit_arl(ir, sampler_reladdr, reladdr); image.reladdr = ralloc(mem_ctx, st_src_reg); - memcpy(image.reladdr, &sampler_reladdr, sizeof(reladdr)); + *image.reladdr = reladdr; + emit_arl(ir, sampler_reladdr, reladdr); } st_dst_reg dst = undef_dst; @@ -3476,10 +3600,10 @@ glsl_to_tgsi_instruction *inst; - if (!strcmp("__intrinsic_image_size", callee)) { + if (ir->callee->intrinsic_id == ir_intrinsic_image_size) { dst.writemask = WRITEMASK_XYZ; inst = emit_asm(ir, TGSI_OPCODE_RESQ, dst); - } else if (!strcmp("__intrinsic_image_samples", callee)) { + } else if (ir->callee->intrinsic_id == ir_intrinsic_image_samples) { st_src_reg res = get_temp(glsl_type::ivec4_type); st_dst_reg dstres = st_dst_reg(res); dstres.writemask = WRITEMASK_W; @@ -3531,27 +3655,38 @@ assert(param->is_tail_sentinel()); unsigned opcode; - if (!strcmp("__intrinsic_image_load", callee)) + switch (ir->callee->intrinsic_id) { + case ir_intrinsic_image_load: opcode = TGSI_OPCODE_LOAD; - else if (!strcmp("__intrinsic_image_store", callee)) + break; + case ir_intrinsic_image_store: opcode = TGSI_OPCODE_STORE; - else if (!strcmp("__intrinsic_image_atomic_add", callee)) + break; + case ir_intrinsic_image_atomic_add: opcode = TGSI_OPCODE_ATOMUADD; - else if (!strcmp("__intrinsic_image_atomic_min", callee)) + break; + case ir_intrinsic_image_atomic_min: opcode = TGSI_OPCODE_ATOMIMIN; - else if (!strcmp("__intrinsic_image_atomic_max", callee)) + break; + case ir_intrinsic_image_atomic_max: opcode = TGSI_OPCODE_ATOMIMAX; - else if (!strcmp("__intrinsic_image_atomic_and", callee)) + break; + case ir_intrinsic_image_atomic_and: opcode = TGSI_OPCODE_ATOMAND; - else if (!strcmp("__intrinsic_image_atomic_or", callee)) + break; + case ir_intrinsic_image_atomic_or: opcode = TGSI_OPCODE_ATOMOR; - else if (!strcmp("__intrinsic_image_atomic_xor", callee)) + break; + case ir_intrinsic_image_atomic_xor: opcode = TGSI_OPCODE_ATOMXOR; - else if (!strcmp("__intrinsic_image_atomic_exchange", callee)) + break; + case ir_intrinsic_image_atomic_exchange: opcode = TGSI_OPCODE_ATOMXCHG; - else if (!strcmp("__intrinsic_image_atomic_comp_swap", callee)) + break; + case ir_intrinsic_image_atomic_comp_swap: opcode = TGSI_OPCODE_ATOMCAS; - else { + break; + default: assert(!"Unexpected intrinsic"); return; } @@ -3561,7 +3696,7 @@ inst->dst[0].writemask = WRITEMASK_XYZW; } - inst->buffer = image; + inst->resource = image; inst->sampler_array_size = sampler_array_size; inst->sampler_base = sampler_base; @@ -3612,155 +3747,94 @@ void glsl_to_tgsi_visitor::visit(ir_call *ir) { - glsl_to_tgsi_instruction *call_inst; ir_function_signature *sig = ir->callee; - const char *callee = sig->function_name(); - function_entry *entry; - int i; /* Filter out intrinsics */ - if (!strcmp("__intrinsic_atomic_read", callee) || - !strcmp("__intrinsic_atomic_increment", callee) || - !strcmp("__intrinsic_atomic_predecrement", callee) || - !strcmp("__intrinsic_atomic_add", callee) || - !strcmp("__intrinsic_atomic_sub", callee) || - !strcmp("__intrinsic_atomic_min", callee) || - !strcmp("__intrinsic_atomic_max", callee) || - !strcmp("__intrinsic_atomic_and", callee) || - !strcmp("__intrinsic_atomic_or", callee) || - !strcmp("__intrinsic_atomic_xor", callee) || - !strcmp("__intrinsic_atomic_exchange", callee) || - !strcmp("__intrinsic_atomic_comp_swap", callee)) { + switch (sig->intrinsic_id) { + case ir_intrinsic_atomic_counter_read: + case ir_intrinsic_atomic_counter_increment: + case ir_intrinsic_atomic_counter_predecrement: + case ir_intrinsic_atomic_counter_add: + case ir_intrinsic_atomic_counter_min: + case ir_intrinsic_atomic_counter_max: + case ir_intrinsic_atomic_counter_and: + case ir_intrinsic_atomic_counter_or: + case ir_intrinsic_atomic_counter_xor: + case ir_intrinsic_atomic_counter_exchange: + case ir_intrinsic_atomic_counter_comp_swap: visit_atomic_counter_intrinsic(ir); return; - } - if (!strcmp("__intrinsic_load_ssbo", callee) || - !strcmp("__intrinsic_store_ssbo", callee) || - !strcmp("__intrinsic_atomic_add_ssbo", callee) || - !strcmp("__intrinsic_atomic_min_ssbo", callee) || - !strcmp("__intrinsic_atomic_max_ssbo", callee) || - !strcmp("__intrinsic_atomic_and_ssbo", callee) || - !strcmp("__intrinsic_atomic_or_ssbo", callee) || - !strcmp("__intrinsic_atomic_xor_ssbo", callee) || - !strcmp("__intrinsic_atomic_exchange_ssbo", callee) || - !strcmp("__intrinsic_atomic_comp_swap_ssbo", callee)) { + case ir_intrinsic_ssbo_load: + case ir_intrinsic_ssbo_store: + case ir_intrinsic_ssbo_atomic_add: + case ir_intrinsic_ssbo_atomic_min: + case ir_intrinsic_ssbo_atomic_max: + case ir_intrinsic_ssbo_atomic_and: + case ir_intrinsic_ssbo_atomic_or: + case ir_intrinsic_ssbo_atomic_xor: + case ir_intrinsic_ssbo_atomic_exchange: + case ir_intrinsic_ssbo_atomic_comp_swap: visit_ssbo_intrinsic(ir); return; - } - if (!strcmp("__intrinsic_memory_barrier", callee) || - !strcmp("__intrinsic_memory_barrier_atomic_counter", callee) || - !strcmp("__intrinsic_memory_barrier_buffer", callee) || - !strcmp("__intrinsic_memory_barrier_image", callee) || - !strcmp("__intrinsic_memory_barrier_shared", callee) || - !strcmp("__intrinsic_group_memory_barrier", callee)) { + case ir_intrinsic_memory_barrier: + case ir_intrinsic_memory_barrier_atomic_counter: + case ir_intrinsic_memory_barrier_buffer: + case ir_intrinsic_memory_barrier_image: + case ir_intrinsic_memory_barrier_shared: + case ir_intrinsic_group_memory_barrier: visit_membar_intrinsic(ir); return; - } - if (!strcmp("__intrinsic_load_shared", callee) || - !strcmp("__intrinsic_store_shared", callee) || - !strcmp("__intrinsic_atomic_add_shared", callee) || - !strcmp("__intrinsic_atomic_min_shared", callee) || - !strcmp("__intrinsic_atomic_max_shared", callee) || - !strcmp("__intrinsic_atomic_and_shared", callee) || - !strcmp("__intrinsic_atomic_or_shared", callee) || - !strcmp("__intrinsic_atomic_xor_shared", callee) || - !strcmp("__intrinsic_atomic_exchange_shared", callee) || - !strcmp("__intrinsic_atomic_comp_swap_shared", callee)) { + case ir_intrinsic_shared_load: + case ir_intrinsic_shared_store: + case ir_intrinsic_shared_atomic_add: + case ir_intrinsic_shared_atomic_min: + case ir_intrinsic_shared_atomic_max: + case ir_intrinsic_shared_atomic_and: + case ir_intrinsic_shared_atomic_or: + case ir_intrinsic_shared_atomic_xor: + case ir_intrinsic_shared_atomic_exchange: + case ir_intrinsic_shared_atomic_comp_swap: visit_shared_intrinsic(ir); return; - } - if (!strcmp("__intrinsic_image_load", callee) || - !strcmp("__intrinsic_image_store", callee) || - !strcmp("__intrinsic_image_atomic_add", callee) || - !strcmp("__intrinsic_image_atomic_min", callee) || - !strcmp("__intrinsic_image_atomic_max", callee) || - !strcmp("__intrinsic_image_atomic_and", callee) || - !strcmp("__intrinsic_image_atomic_or", callee) || - !strcmp("__intrinsic_image_atomic_xor", callee) || - !strcmp("__intrinsic_image_atomic_exchange", callee) || - !strcmp("__intrinsic_image_atomic_comp_swap", callee) || - !strcmp("__intrinsic_image_size", callee) || - !strcmp("__intrinsic_image_samples", callee)) { + case ir_intrinsic_image_load: + case ir_intrinsic_image_store: + case ir_intrinsic_image_atomic_add: + case ir_intrinsic_image_atomic_min: + case ir_intrinsic_image_atomic_max: + case ir_intrinsic_image_atomic_and: + case ir_intrinsic_image_atomic_or: + case ir_intrinsic_image_atomic_xor: + case ir_intrinsic_image_atomic_exchange: + case ir_intrinsic_image_atomic_comp_swap: + case ir_intrinsic_image_size: + case ir_intrinsic_image_samples: visit_image_intrinsic(ir); return; - } - - entry = get_function_signature(sig); - /* Process in parameters. */ - foreach_two_lists(formal_node, &sig->parameters, - actual_node, &ir->actual_parameters) { - ir_rvalue *param_rval = (ir_rvalue *) actual_node; - ir_variable *param = (ir_variable *) formal_node; - - if (param->data.mode == ir_var_function_in || - param->data.mode == ir_var_function_inout) { - variable_storage *storage = find_variable_storage(param); - assert(storage); - - param_rval->accept(this); - st_src_reg r = this->result; - - st_dst_reg l; - l.file = storage->file; - l.index = storage->index; - l.reladdr = NULL; - l.writemask = WRITEMASK_XYZW; - - for (i = 0; i < type_size(param->type); i++) { - emit_asm(ir, TGSI_OPCODE_MOV, l, r); - l.index++; - r.index++; - } - } - } - - /* Emit call instruction */ - call_inst = emit_asm(ir, TGSI_OPCODE_CAL); - call_inst->function = entry; - - /* Process out parameters. */ - foreach_two_lists(formal_node, &sig->parameters, - actual_node, &ir->actual_parameters) { - ir_rvalue *param_rval = (ir_rvalue *) actual_node; - ir_variable *param = (ir_variable *) formal_node; - - if (param->data.mode == ir_var_function_out || - param->data.mode == ir_var_function_inout) { - variable_storage *storage = find_variable_storage(param); - assert(storage); - st_src_reg r; - r.file = storage->file; - r.index = storage->index; - r.reladdr = NULL; - r.swizzle = SWIZZLE_NOOP; - r.negate = 0; - - param_rval->accept(this); - st_dst_reg l = st_dst_reg(this->result); - - for (i = 0; i < type_size(param->type); i++) { - emit_asm(ir, TGSI_OPCODE_MOV, l, r); - l.index++; - r.index++; - } - } + case ir_intrinsic_invalid: + case ir_intrinsic_generic_load: + case ir_intrinsic_generic_store: + case ir_intrinsic_generic_atomic_add: + case ir_intrinsic_generic_atomic_and: + case ir_intrinsic_generic_atomic_or: + case ir_intrinsic_generic_atomic_xor: + case ir_intrinsic_generic_atomic_min: + case ir_intrinsic_generic_atomic_max: + case ir_intrinsic_generic_atomic_exchange: + case ir_intrinsic_generic_atomic_comp_swap: + case ir_intrinsic_shader_clock: + unreachable("Invalid intrinsic"); } - - /* Process return value. */ - this->result = entry->return_reg; } void -glsl_to_tgsi_visitor::calc_deref_offsets(ir_dereference *head, - ir_dereference *tail, +glsl_to_tgsi_visitor::calc_deref_offsets(ir_dereference *tail, unsigned *array_elements, - unsigned *base, - unsigned *index, + uint16_t *index, st_src_reg *indirect, unsigned *location) { @@ -3770,7 +3844,7 @@ const glsl_type *struct_type = deref_record->record->type; int field_index = deref_record->record->type->field_index(deref_record->field); - calc_deref_offsets(head, deref_record->record->as_dereference(), array_elements, base, index, indirect, location); + calc_deref_offsets(deref_record->record->as_dereference(), array_elements, index, indirect, location); assert(field_index >= 0); *location += struct_type->record_location_offset(field_index); @@ -3807,7 +3881,7 @@ *array_elements *= deref_arr->array->type->length; - calc_deref_offsets(head, deref_arr->array->as_dereference(), array_elements, base, index, indirect, location); + calc_deref_offsets(deref_arr->array->as_dereference(), array_elements, index, indirect, location); break; } default: @@ -3819,7 +3893,7 @@ glsl_to_tgsi_visitor::get_deref_offsets(ir_dereference *ir, unsigned *array_size, unsigned *base, - unsigned *index, + uint16_t *index, st_src_reg *reladdr, bool opaque) { @@ -3835,7 +3909,7 @@ assert(var); location = var->data.location; - calc_deref_offsets(ir, ir, array_size, base, index, reladdr, &location); + calc_deref_offsets(ir, array_size, index, reladdr, &location); /* * If we end up with no indirect then adjust the base to the index, @@ -3848,8 +3922,8 @@ if (opaque) { assert(location != 0xffffffff); - *base += this->shader_program->UniformStorage[location].opaque[shader].index; - *index += this->shader_program->UniformStorage[location].opaque[shader].index; + *base += this->shader_program->data->UniformStorage[location].opaque[shader].index; + *index += this->shader_program->data->UniformStorage[location].opaque[shader].index; } } @@ -3877,7 +3951,8 @@ glsl_to_tgsi_instruction *inst = NULL; unsigned opcode = TGSI_OPCODE_NOP; const glsl_type *sampler_type = ir->sampler->type; - unsigned sampler_array_size = 1, sampler_index = 0, sampler_base = 0; + unsigned sampler_array_size = 1, sampler_base = 0; + uint16_t sampler_index = 0; bool is_cube_array = false; unsigned i; @@ -3891,7 +3966,7 @@ ir->coordinate->accept(this); /* Put our coords in a temp. We'll need to modify them for shadow, - * projection, or LOD, so the only case we'd use it as is is if + * projection, or LOD, so the only case we'd use it as-is is if * we're doing plain old texturing. The optimization passes on * glsl_to_tgsi_visitor should handle cleaning up our mess in that case. */ @@ -3911,10 +3986,11 @@ */ result_src = get_temp(ir->type); result_dst = st_dst_reg(result_src); + result_dst.writemask = (1 << ir->type->vector_elements) - 1; switch (ir->op) { case ir_tex: - opcode = (is_cube_array && ir->shadow_comparitor) ? TGSI_OPCODE_TEX2 : TGSI_OPCODE_TEX; + opcode = (is_cube_array && ir->shadow_comparator) ? TGSI_OPCODE_TEX2 : TGSI_OPCODE_TEX; if (ir->offset) { ir->offset->accept(this); offset[0] = this->result; @@ -4031,11 +4107,11 @@ * the shadow comparator value must also be projected. */ st_src_reg tmp_src = coord; - if (ir->shadow_comparitor) { + if (ir->shadow_comparator) { /* Slot the shadow value in as the second to last component of the * coord. */ - ir->shadow_comparitor->accept(this); + ir->shadow_comparator->accept(this); tmp_src = get_temp(glsl_type::vec4_type); st_dst_reg tmp_dst = st_dst_reg(tmp_src); @@ -4062,11 +4138,11 @@ * comparator was put in the correct place (and projected) by the code, * above, that handles by-hand projection. */ - if (ir->shadow_comparitor && (!ir->projector || opcode == TGSI_OPCODE_TXP)) { + if (ir->shadow_comparator && (!ir->projector || opcode == TGSI_OPCODE_TXP)) { /* Slot the shadow value in as the second to last component of the * coord. */ - ir->shadow_comparitor->accept(this); + ir->shadow_comparator->accept(this); if (is_cube_array) { cube_sc = get_temp(glsl_type::float_type); @@ -4125,7 +4201,7 @@ } else if (opcode == TGSI_OPCODE_TEX2) { inst = emit_asm(ir, opcode, result_dst, coord, cube_sc); } else if (opcode == TGSI_OPCODE_TG4) { - if (is_cube_array && ir->shadow_comparitor) { + if (is_cube_array && ir->shadow_comparator) { inst = emit_asm(ir, opcode, result_dst, coord, cube_sc); } else { inst = emit_asm(ir, opcode, result_dst, coord, component); @@ -4133,19 +4209,22 @@ } else inst = emit_asm(ir, opcode, result_dst, coord); - if (ir->shadow_comparitor) + if (ir->shadow_comparator) inst->tex_shadow = GL_TRUE; - inst->sampler.index = sampler_index; + inst->resource.index = sampler_index; inst->sampler_array_size = sampler_array_size; inst->sampler_base = sampler_base; if (reladdr.file != PROGRAM_UNDEFINED) { - inst->sampler.reladdr = ralloc(mem_ctx, st_src_reg); - memcpy(inst->sampler.reladdr, &reladdr, sizeof(reladdr)); + inst->resource.reladdr = ralloc(mem_ctx, st_src_reg); + memcpy(inst->resource.reladdr, &reladdr, sizeof(reladdr)); } if (ir->offset) { + if (!inst->tex_offsets) + inst->tex_offsets = rzalloc_array(inst, st_src_reg, MAX_GLSL_TEXTURE_OFFSET); + for (i = 0; i < MAX_GLSL_TEXTURE_OFFSET && offset[i].file != PROGRAM_UNDEFINED; i++) inst->tex_offsets[i] = offset[i]; inst->tex_offset_num_offset = i; @@ -4192,23 +4271,7 @@ void glsl_to_tgsi_visitor::visit(ir_return *ir) { - if (ir->get_value()) { - st_dst_reg l; - int i; - - assert(current_function); - - ir->get_value()->accept(this); - st_src_reg r = this->result; - - l = st_dst_reg(current_function->return_reg); - - for (i = 0; i < type_size(current_function->sig->return_type); i++) { - emit_asm(ir, TGSI_OPCODE_MOV, l, r); - l.index++; - r.index++; - } - } + assert(!ir->get_value()); emit_asm(ir, TGSI_OPCODE_RET); } @@ -4298,11 +4361,11 @@ array_sizes = NULL; max_num_arrays = 0; next_array = 0; + num_inputs = 0; + num_outputs = 0; num_input_arrays = 0; num_output_arrays = 0; - next_signature_id = 1; num_immediates = 0; - current_function = NULL; num_address_regs = 0; samplers_used = 0; buffers_used = 0; @@ -4357,19 +4420,23 @@ st_translate_texture_target(inst->tex_target, inst->tex_shadow); if (inst->tex_shadow) { - prog->ShadowSamplers |= 1 << (inst->sampler.index + i); + prog->ShadowSamplers |= 1 << (inst->resource.index + i); } } } - if (inst->buffer.file != PROGRAM_UNDEFINED && ( + + if (inst->tex_target == TEXTURE_EXTERNAL_INDEX) + prog->ExternalSamplersUsed |= 1 << inst->resource.index; + + if (inst->resource.file != PROGRAM_UNDEFINED && ( is_resource_instruction(inst->op) || inst->op == TGSI_OPCODE_STORE)) { - if (inst->buffer.file == PROGRAM_BUFFER) { - v->buffers_used |= 1 << inst->buffer.index; - } else if (inst->buffer.file == PROGRAM_MEMORY) { + if (inst->resource.file == PROGRAM_BUFFER) { + v->buffers_used |= 1 << inst->resource.index; + } else if (inst->resource.file == PROGRAM_MEMORY) { v->use_shared_memory = true; } else { - assert(inst->buffer.file == PROGRAM_IMAGE); + assert(inst->resource.file == PROGRAM_IMAGE); for (int i = 0; i < inst->sampler_array_size; i++) { unsigned idx = inst->sampler_base + i; v->images_used |= 1 << idx; @@ -4445,10 +4512,8 @@ if (inst->dst[0].reladdr || inst->dst[0].reladdr2 || inst->dst[1].reladdr || inst->dst[1].reladdr2 || tgsi_get_opcode_info(inst->op)->is_branch || - inst->op == TGSI_OPCODE_BGNSUB || inst->op == TGSI_OPCODE_CONT || inst->op == TGSI_OPCODE_END || - inst->op == TGSI_OPCODE_ENDSUB || inst->op == TGSI_OPCODE_RET) { break; } @@ -4812,7 +4877,8 @@ inst->src[0].file != PROGRAM_ARRAY && !inst->src[0].reladdr && !inst->src[0].reladdr2 && - !inst->src[0].negate) { + !inst->src[0].negate && + !inst->src[0].abs) { for (int i = 0; i < 4; i++) { if (inst->dst[0].writemask & (1 << i)) { acp[4 * inst->dst[0].index + i] = inst; @@ -4986,7 +5052,7 @@ delete inst; removed++; } else { - if (inst->dst[0].type == GLSL_TYPE_DOUBLE) { + if (glsl_base_type_is_64bit(inst->dst[0].type)) { if (inst->dead_mask == WRITEMASK_XY || inst->dead_mask == WRITEMASK_ZW) inst->dst[0].writemask &= ~(inst->dead_mask); @@ -5136,10 +5202,6 @@ } /* ------------------------- TGSI conversion stuff -------------------------- */ -struct label { - unsigned branch_target; - unsigned token; -}; /** * Intermediate state used during shader translation. @@ -5164,33 +5226,16 @@ struct ureg_src images[PIPE_MAX_SHADER_IMAGES]; struct ureg_src systemValues[SYSTEM_VALUE_MAX]; struct ureg_src shared_memory; - struct tgsi_texture_offset tex_offsets[MAX_GLSL_TEXTURE_OFFSET]; unsigned *array_sizes; - struct array_decl *input_arrays; - struct array_decl *output_arrays; + struct inout_decl *input_decls; + unsigned num_input_decls; + struct inout_decl *output_decls; + unsigned num_output_decls; const GLuint *inputMapping; const GLuint *outputMapping; - /* For every instruction that contains a label (eg CALL), keep - * details so that we can go back afterwards and emit the correct - * tgsi instruction number for each label. - */ - struct label *labels; - unsigned labels_size; - unsigned labels_count; - - /* Keep a record of the tgsi instruction number that each mesa - * instruction starts at, will be used to fix up labels after - * translation. - */ - unsigned *insn; - unsigned insn_size; - unsigned insn_count; - unsigned procType; /**< PIPE_SHADER_VERTEX/FRAGMENT */ - - boolean error; }; /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */ @@ -5249,6 +5294,8 @@ return TGSI_SEMANTIC_BLOCK_ID; case SYSTEM_VALUE_NUM_WORK_GROUPS: return TGSI_SEMANTIC_GRID_SIZE; + case SYSTEM_VALUE_LOCAL_GROUP_SIZE: + return TGSI_SEMANTIC_BLOCK_SIZE; /* Unhandled */ case SYSTEM_VALUE_LOCAL_INVOCATION_INDEX: @@ -5260,53 +5307,6 @@ } } - -/** - * Make note of a branch to a label in the TGSI code. - * After we've emitted all instructions, we'll go over the list - * of labels built here and patch the TGSI code with the actual - * location of each label. - */ -static unsigned *get_label(struct st_translate *t, unsigned branch_target) -{ - unsigned i; - - if (t->labels_count + 1 >= t->labels_size) { - t->labels_size = 1 << (util_logbase2(t->labels_size) + 1); - t->labels = (struct label *)realloc(t->labels, - t->labels_size * sizeof(struct label)); - if (t->labels == NULL) { - static unsigned dummy; - t->error = TRUE; - return &dummy; - } - } - - i = t->labels_count++; - t->labels[i].branch_target = branch_target; - return &t->labels[i].token; -} - -/** - * Called prior to emitting the TGSI code for each instruction. - * Allocate additional space for instructions if needed. - * Update the insn[] array so the next glsl_to_tgsi_instruction points to - * the next TGSI instruction. - */ -static void set_insn_start(struct st_translate *t, unsigned start) -{ - if (t->insn_count + 1 >= t->insn_size) { - t->insn_size = 1 << (util_logbase2(t->insn_size) + 1); - t->insn = (unsigned *)realloc(t->insn, t->insn_size * sizeof(t->insn[0])); - if (t->insn == NULL) { - t->error = TRUE; - return; - } - } - - t->insn[t->insn_count++] = start; -} - /** * Map a glsl_to_tgsi constant/immediate to a TGSI immediate. */ @@ -5368,21 +5368,19 @@ return t->temps[index]; case PROGRAM_ARRAY: - array = index >> 16; - - assert(array < t->num_temp_arrays); + assert(array_id && array_id <= t->num_temp_arrays); + array = array_id - 1; if (ureg_dst_is_undef(t->arrays[array])) t->arrays[array] = ureg_DECL_array_temporary( t->ureg, t->array_sizes[array], TRUE); - return ureg_dst_array_offset(t->arrays[array], - (int)(index & 0xFFFF) - 0x8000); + return ureg_dst_array_offset(t->arrays[array], index); case PROGRAM_OUTPUT: if (!array_id) { if (t->procType == PIPE_SHADER_FRAGMENT) - assert(index < FRAG_RESULT_MAX); + assert(index < 2 * FRAG_RESULT_MAX); else if (t->procType == PIPE_SHADER_TESS_CTRL || t->procType == PIPE_SHADER_TESS_EVAL) assert(index < VARYING_SLOT_TESS_MAX); @@ -5394,13 +5392,15 @@ return t->outputs[t->outputMapping[index]]; } else { - struct array_decl *decl = &t->output_arrays[array_id-1]; + struct inout_decl *decl = find_inout_array(t->output_decls, t->num_output_decls, array_id); unsigned mesa_index = decl->mesa_index; int slot = t->outputMapping[mesa_index]; assert(slot != -1 && t->outputs[slot].File == TGSI_FILE_OUTPUT); - assert(t->outputs[slot].ArrayID == array_id); - return ureg_dst_array_offset(t->outputs[slot], index - mesa_index); + + struct ureg_dst dst = t->outputs[slot]; + dst.ArrayID = array_id; + return ureg_dst_array_offset(dst, index - mesa_index); } case PROGRAM_ADDRESS: @@ -5427,9 +5427,19 @@ case PROGRAM_TEMPORARY: case PROGRAM_ARRAY: - case PROGRAM_OUTPUT: return ureg_src(dst_register(t, reg->file, reg->index, reg->array_id)); + case PROGRAM_OUTPUT: { + struct ureg_dst dst = dst_register(t, reg->file, reg->index, reg->array_id); + assert(dst.WriteMask != 0); + unsigned shift = ffs(dst.WriteMask) - 1; + return ureg_swizzle(ureg_src(dst), + shift, + MIN2(shift + 1, 3), + MIN2(shift + 2, 3), + MIN2(shift + 3, 3)); + } + case PROGRAM_UNIFORM: assert(reg->index >= 0); return reg->index < t->num_constants ? @@ -5457,13 +5467,15 @@ return t->inputs[t->inputMapping[index] + double_reg2]; } else { - struct array_decl *decl = &t->input_arrays[reg->array_id-1]; + struct inout_decl *decl = find_inout_array(t->input_decls, t->num_input_decls, reg->array_id); unsigned mesa_index = decl->mesa_index; int slot = t->inputMapping[mesa_index]; assert(slot != -1 && t->inputs[slot].File == TGSI_FILE_INPUT); - assert(t->inputs[slot].ArrayID == reg->array_id); - return ureg_src_array_offset(t->inputs[slot], index + double_reg2 - mesa_index); + + struct ureg_src src = t->inputs[slot]; + src.ArrayID = reg->array_id; + return ureg_src_array_offset(src, index + double_reg2 - mesa_index); } case PROGRAM_ADDRESS: @@ -5539,6 +5551,9 @@ GET_SWZ(src_reg->swizzle, 2) & 0x3, GET_SWZ(src_reg->swizzle, 3) & 0x3); + if (src_reg->abs) + src = ureg_abs(src); + if ((src_reg->negate & 0xf) == NEGATE_XYZW) src = ureg_negate(src); @@ -5600,17 +5615,12 @@ switch(inst->op) { case TGSI_OPCODE_BGNLOOP: - case TGSI_OPCODE_CAL: case TGSI_OPCODE_ELSE: case TGSI_OPCODE_ENDLOOP: case TGSI_OPCODE_IF: case TGSI_OPCODE_UIF: assert(num_dst == 0); - ureg_label_insn(ureg, - inst->op, - src, num_src, - get_label(t, - inst->op == TGSI_OPCODE_CAL ? inst->function->sig_id : 0)); + ureg_insn(ureg, inst->op, NULL, 0, src, num_src); return; case TGSI_OPCODE_TEX: @@ -5626,9 +5636,9 @@ case TGSI_OPCODE_TXL2: case TGSI_OPCODE_TG4: case TGSI_OPCODE_LODQ: - src[num_src] = t->samplers[inst->sampler.index]; + src[num_src] = t->samplers[inst->resource.index]; assert(src[num_src].File != TGSI_FILE_NULL); - if (inst->sampler.reladdr) + if (inst->resource.reladdr) src[num_src] = ureg_src_indirect(src[num_src], ureg_src(t->address[2])); num_src++; @@ -5660,15 +5670,15 @@ for (i = num_src - 1; i >= 0; i--) src[i + 1] = src[i]; num_src++; - if (inst->buffer.file == PROGRAM_MEMORY) { + if (inst->resource.file == PROGRAM_MEMORY) { src[0] = t->shared_memory; - } else if (inst->buffer.file == PROGRAM_BUFFER) { - src[0] = t->buffers[inst->buffer.index]; + } else if (inst->resource.file == PROGRAM_BUFFER) { + src[0] = t->buffers[inst->resource.index]; } else { - src[0] = t->images[inst->buffer.index]; + src[0] = t->images[inst->resource.index]; tex_target = st_translate_texture_target(inst->tex_target, inst->tex_shadow); } - if (inst->buffer.reladdr) + if (inst->resource.reladdr) src[0] = ureg_src_indirect(src[0], ureg_src(t->address[2])); assert(src[0].File != TGSI_FILE_NULL); ureg_memory_insn(ureg, inst->op, dst, num_dst, src, num_src, @@ -5677,16 +5687,16 @@ break; case TGSI_OPCODE_STORE: - if (inst->buffer.file == PROGRAM_MEMORY) { + if (inst->resource.file == PROGRAM_MEMORY) { dst[0] = ureg_dst(t->shared_memory); - } else if (inst->buffer.file == PROGRAM_BUFFER) { - dst[0] = ureg_dst(t->buffers[inst->buffer.index]); + } else if (inst->resource.file == PROGRAM_BUFFER) { + dst[0] = ureg_dst(t->buffers[inst->resource.index]); } else { - dst[0] = ureg_dst(t->images[inst->buffer.index]); + dst[0] = ureg_dst(t->images[inst->resource.index]); tex_target = st_translate_texture_target(inst->tex_target, inst->tex_shadow); } dst[0] = ureg_writemask(dst[0], inst->dst[0].writemask); - if (inst->buffer.reladdr) + if (inst->resource.reladdr) dst[0] = ureg_dst_indirect(dst[0], ureg_src(t->address[2])); assert(dst[0].File != TGSI_FILE_NULL); ureg_memory_insn(ureg, inst->op, dst, num_dst, src, num_src, @@ -5799,8 +5809,6 @@ struct ureg_program *ureg, int wpos_transform_const) { - const struct gl_fragment_program *fp = - (const struct gl_fragment_program *) program; struct pipe_screen *pscreen = st->pipe->screen; GLfloat adjX = 0.0f; GLfloat adjY[2] = { 0.0f, 0.0f }; @@ -5811,7 +5819,7 @@ * * The bias of the y-coordinate depends on whether y-inversion takes place * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are - * drawing to an FBO (causes additional inversion), and whether the the pipe + * drawing to an FBO (causes additional inversion), and whether the pipe * driver origin and the requested origin differ (the latter condition is * stored in the 'invert' variable). * @@ -5833,7 +5841,7 @@ * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0 */ - if (fp->OriginUpperLeft) { + if (program->OriginUpperLeft) { /* Fragment shader wants origin in upper-left */ if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) { /* the driver supports upper-left origin */ @@ -5860,7 +5868,7 @@ assert(0); } - if (fp->PixelCenterInteger) { + if (program->PixelCenterInteger) { /* Fragment shader wants pixel center integer */ if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) { /* the driver supports pixel center integer */ @@ -5922,37 +5930,58 @@ t->inputs[t->inputMapping[VARYING_SLOT_FACE]] = ureg_src(face_temp); } -static bool -find_array(unsigned attr, struct array_decl *arrays, unsigned count, - unsigned *array_id, unsigned *array_size) -{ - unsigned i; - - for (i = 0; i < count; i++) { - struct array_decl *decl = &arrays[i]; - - if (attr == decl->mesa_index) { - *array_id = decl->array_id; - *array_size = decl->array_size; - assert(*array_size); - return true; - } - } - return false; -} - static void -emit_compute_block_size(const struct gl_program *program, +emit_compute_block_size(const struct gl_program *prog, struct ureg_program *ureg) { - const struct gl_compute_program *cp = - (const struct gl_compute_program *)program; - ureg_property(ureg, TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH, - cp->LocalSize[0]); + prog->info.cs.local_size[0]); ureg_property(ureg, TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT, - cp->LocalSize[1]); + prog->info.cs.local_size[1]); ureg_property(ureg, TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH, - cp->LocalSize[2]); + prog->info.cs.local_size[2]); +} + +struct sort_inout_decls { + bool operator()(const struct inout_decl &a, const struct inout_decl &b) const { + return mapping[a.mesa_index] < mapping[b.mesa_index]; + } + + const GLuint *mapping; +}; + +/* Sort the given array of decls by the corresponding slot (TGSI file index). + * + * This is for the benefit of older drivers which are broken when the + * declarations aren't sorted in this way. + */ +static void +sort_inout_decls_by_slot(struct inout_decl *decls, + unsigned count, + const GLuint mapping[]) +{ + sort_inout_decls sorter; + sorter.mapping = mapping; + std::sort(decls, decls + count, sorter); +} + +static unsigned +st_translate_interp(enum glsl_interp_mode glsl_qual, GLuint varying) +{ + switch (glsl_qual) { + case INTERP_MODE_NONE: + if (varying == VARYING_SLOT_COL0 || varying == VARYING_SLOT_COL1) + return TGSI_INTERPOLATE_COLOR; + return TGSI_INTERPOLATE_PERSPECTIVE; + case INTERP_MODE_SMOOTH: + return TGSI_INTERPOLATE_PERSPECTIVE; + case INTERP_MODE_FLAT: + return TGSI_INTERPOLATE_CONSTANT; + case INTERP_MODE_NOPERSPECTIVE: + return TGSI_INTERPOLATE_LINEAR; + default: + assert(0 && "unexpected interp mode in st_translate_interp()"); + return TGSI_INTERPOLATE_PERSPECTIVE; + } } /** @@ -5965,7 +5994,6 @@ * \param inputSemanticIndex the semantic index (ex: which texcoord) for * each input * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input - * \param interpLocation the TGSI_INTERPOLATE_LOC_* location for each input * \param numOutputs number of output registers used * \param outputMapping maps Mesa fragment program outputs to TGSI * generic outputs @@ -5988,7 +6016,6 @@ const ubyte inputSemanticName[], const ubyte inputSemanticIndex[], const GLuint interpMode[], - const GLuint interpLocation[], GLuint numOutputs, const GLuint outputMapping[], const GLuint outputSlotToAttr[], @@ -6017,55 +6044,56 @@ t->num_temp_arrays = program->next_array; if (t->num_temp_arrays) t->arrays = (struct ureg_dst*) - calloc(1, sizeof(t->arrays[0]) * t->num_temp_arrays); + calloc(t->num_temp_arrays, sizeof(t->arrays[0])); /* * Declare input attributes. */ switch (procType) { case PIPE_SHADER_FRAGMENT: - for (i = 0; i < numInputs; i++) { - unsigned array_id = 0; - unsigned array_size; - - if (find_array(inputSlotToAttr[i], program->input_arrays, - program->num_input_arrays, &array_id, &array_size)) { - /* We've found an array. Declare it so. */ - t->inputs[i] = ureg_DECL_fs_input_cyl_centroid(ureg, - inputSemanticName[i], inputSemanticIndex[i], - interpMode[i], 0, interpLocation[i], - array_id, array_size); - - GLuint base_attr = inputSlotToAttr[i]; - while (i + 1 < numInputs && - inputSlotToAttr[i + 1] < base_attr + array_size) - ++i; - } - else { - t->inputs[i] = ureg_DECL_fs_input_cyl_centroid(ureg, - inputSemanticName[i], inputSemanticIndex[i], - interpMode[i], 0, interpLocation[i], 0, 1); - } - } - break; case PIPE_SHADER_GEOMETRY: case PIPE_SHADER_TESS_EVAL: case PIPE_SHADER_TESS_CTRL: - for (i = 0; i < numInputs; i++) { - unsigned array_id = 0; - unsigned array_size; + sort_inout_decls_by_slot(program->inputs, program->num_inputs, inputMapping); - if (find_array(inputSlotToAttr[i], program->input_arrays, - program->num_input_arrays, &array_id, &array_size)) { - /* We've found an array. Declare it so. */ - t->inputs[i] = ureg_DECL_input(ureg, inputSemanticName[i], - inputSemanticIndex[i], - array_id, array_size); - i += array_size - 1; + for (i = 0; i < program->num_inputs; ++i) { + struct inout_decl *decl = &program->inputs[i]; + unsigned slot = inputMapping[decl->mesa_index]; + struct ureg_src src; + ubyte tgsi_usage_mask = decl->usage_mask; + + if (glsl_base_type_is_64bit(decl->base_type)) { + if (tgsi_usage_mask == 1) + tgsi_usage_mask = TGSI_WRITEMASK_XY; + else if (tgsi_usage_mask == 2) + tgsi_usage_mask = TGSI_WRITEMASK_ZW; + else + tgsi_usage_mask = TGSI_WRITEMASK_XYZW; } - else { - t->inputs[i] = ureg_DECL_input(ureg, inputSemanticName[i], - inputSemanticIndex[i], 0, 1); + + unsigned interp_mode = 0; + unsigned interp_location = 0; + if (procType == PIPE_SHADER_FRAGMENT) { + assert(interpMode); + interp_mode = interpMode[slot] != TGSI_INTERPOLATE_COUNT ? + interpMode[slot] : + st_translate_interp(decl->interp, inputSlotToAttr[slot]); + + interp_location = decl->interp_loc; + } + + src = ureg_DECL_fs_input_cyl_centroid_layout(ureg, + inputSemanticName[slot], inputSemanticIndex[slot], + interp_mode, 0, interp_location, slot, tgsi_usage_mask, + decl->array_id, decl->size); + + for (unsigned j = 0; j < decl->size; ++j) { + if (t->inputs[slot + j].File != TGSI_FILE_INPUT) { + /* The ArrayID is set up in dst_register */ + t->inputs[slot + j] = src; + t->inputs[slot + j].ArrayID = 0; + t->inputs[slot + j].Index += j; + } } } break; @@ -6091,23 +6119,35 @@ case PIPE_SHADER_TESS_EVAL: case PIPE_SHADER_TESS_CTRL: case PIPE_SHADER_VERTEX: - for (i = 0; i < numOutputs; i++) { - unsigned array_id = 0; - unsigned array_size; + sort_inout_decls_by_slot(program->outputs, program->num_outputs, outputMapping); - if (find_array(outputSlotToAttr[i], program->output_arrays, - program->num_output_arrays, &array_id, &array_size)) { - /* We've found an array. Declare it so. */ - t->outputs[i] = ureg_DECL_output_array(ureg, - outputSemanticName[i], - outputSemanticIndex[i], - array_id, array_size); - i += array_size - 1; + for (i = 0; i < program->num_outputs; ++i) { + struct inout_decl *decl = &program->outputs[i]; + unsigned slot = outputMapping[decl->mesa_index]; + struct ureg_dst dst; + ubyte tgsi_usage_mask = decl->usage_mask; + + if (glsl_base_type_is_64bit(decl->base_type)) { + if (tgsi_usage_mask == 1) + tgsi_usage_mask = TGSI_WRITEMASK_XY; + else if (tgsi_usage_mask == 2) + tgsi_usage_mask = TGSI_WRITEMASK_ZW; + else + tgsi_usage_mask = TGSI_WRITEMASK_XYZW; } - else { - t->outputs[i] = ureg_DECL_output(ureg, - outputSemanticName[i], - outputSemanticIndex[i]); + + dst = ureg_DECL_output_layout(ureg, + outputSemanticName[slot], outputSemanticIndex[slot], + decl->gs_out_streams, + slot, tgsi_usage_mask, decl->array_id, decl->size); + + for (unsigned j = 0; j < decl->size; ++j) { + if (t->outputs[slot + j].File != TGSI_FILE_OUTPUT) { + /* The ArrayID is set up in dst_register */ + t->outputs[slot + j] = dst; + t->outputs[slot + j].ArrayID = 0; + t->outputs[slot + j].Index += j; + } } } break; @@ -6116,16 +6156,16 @@ } if (procType == PIPE_SHADER_FRAGMENT) { - if (program->shader->EarlyFragmentTests) + if (program->shader->info.EarlyFragmentTests) ureg_property(ureg, TGSI_PROPERTY_FS_EARLY_DEPTH_STENCIL, 1); - if (proginfo->InputsRead & VARYING_BIT_POS) { + if (proginfo->info.inputs_read & VARYING_BIT_POS) { /* Must do this after setting up t->inputs. */ emit_wpos(st_context(ctx), t, proginfo, ureg, program->wpos_transform_const); } - if (proginfo->InputsRead & VARYING_BIT_FACE) + if (proginfo->info.inputs_read & VARYING_BIT_FACE) emit_face_var(ctx, t); for (i = 0; i < numOutputs; i++) { @@ -6190,7 +6230,7 @@ /* Declare misc input registers */ { - GLbitfield sysInputs = proginfo->SystemValuesRead; + GLbitfield sysInputs = proginfo->info.system_values_read; for (i = 0; sysInputs; i++) { if (sysInputs & (1 << i)) { @@ -6230,8 +6270,10 @@ } t->array_sizes = program->array_sizes; - t->input_arrays = program->input_arrays; - t->output_arrays = program->output_arrays; + t->input_decls = program->inputs; + t->num_input_decls = program->num_inputs; + t->output_decls = program->outputs; + t->num_output_decls = program->num_outputs; /* Emit constants and uniforms. TGSI uses a single index space for these, * so we put all the translated regs in t->constants. @@ -6273,18 +6315,14 @@ } } - if (program->shader) { - unsigned num_ubos = program->shader->NumUniformBlocks; - - for (i = 0; i < num_ubos; i++) { - unsigned size = program->shader->UniformBlocks[i]->UniformBufferSize; - unsigned num_const_vecs = (size + 15) / 16; - unsigned first, last; - assert(num_const_vecs > 0); - first = 0; - last = num_const_vecs > 0 ? num_const_vecs - 1 : 0; - ureg_DECL_constant2D(t->ureg, first, last, i + 1); - } + for (i = 0; i < proginfo->info.num_ubos; i++) { + unsigned size = proginfo->sh.UniformBlocks[i]->UniformBufferSize; + unsigned num_const_vecs = (size + 15) / 16; + unsigned first, last; + assert(num_const_vecs > 0); + first = 0; + last = num_const_vecs > 0 ? num_const_vecs - 1 : 0; + ureg_DECL_constant2D(t->ureg, first, last, i + 1); } /* Emit immediate values. @@ -6346,7 +6384,7 @@ if (program->use_shared_memory) t->shared_memory = ureg_DECL_memory(ureg, TGSI_MEMORY_TYPE_SHARED); - for (i = 0; i < program->shader->NumImages; i++) { + for (i = 0; i < program->shader->Program->info.num_images; i++) { if (program->images_used & (1 << i)) { t->images[i] = ureg_DECL_image(ureg, i, program->image_targets[i], @@ -6357,17 +6395,8 @@ /* Emit each instruction in turn: */ - foreach_in_list(glsl_to_tgsi_instruction, inst, &program->instructions) { - set_insn_start(t, ureg_get_instruction_number(ureg)); + foreach_in_list(glsl_to_tgsi_instruction, inst, &program->instructions) compile_tgsi_instruction(t, inst); - } - - /* Fix up all emitted labels: - */ - for (i = 0; i < t->labels_count; i++) { - ureg_fixup_label(ureg, t->labels[i].token, - t->insn[t->labels[i].branch_target]); - } /* Set the next shader stage hint for VS and TES. */ switch (procType) { @@ -6409,17 +6438,10 @@ if (t) { free(t->arrays); free(t->temps); - free(t->insn); - free(t->labels); free(t->constants); t->num_constants = 0; free(t->immediates); t->num_immediates = 0; - - if (t->error) { - debug_printf("%s: translate error flag set\n", __func__); - } - FREE(t); } @@ -6435,22 +6457,19 @@ static struct gl_program * get_mesa_program_tgsi(struct gl_context *ctx, struct gl_shader_program *shader_program, - struct gl_shader *shader) + struct gl_linked_shader *shader) { glsl_to_tgsi_visitor* v; struct gl_program *prog; - GLenum target = _mesa_shader_stage_to_program(shader->Stage); - bool progress; struct gl_shader_compiler_options *options = - &ctx->Const.ShaderCompilerOptions[_mesa_shader_enum_to_shader_stage(shader->Type)]; + &ctx->Const.ShaderCompilerOptions[shader->Stage]; struct pipe_screen *pscreen = ctx->st->pipe->screen; - unsigned ptarget = st_shader_stage_to_ptarget(shader->Stage); + enum pipe_shader_type ptarget = st_shader_stage_to_ptarget(shader->Stage); validate_ir_tree(shader->ir); - prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name); - if (!prog) - return NULL; + prog = shader->Program; + prog->Parameters = _mesa_new_parameter_list(); v = new glsl_to_tgsi_visitor(); v->ctx = ctx; @@ -6466,43 +6485,16 @@ v->have_fma = pscreen->get_shader_param(pscreen, ptarget, PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED); - _mesa_copy_linked_program_data(shader->Stage, shader_program, prog); _mesa_generate_parameters_list_for_uniforms(shader_program, shader, prog->Parameters); /* Remove reads from output registers. */ - lower_output_reads(shader->Stage, shader->ir); + if (!pscreen->get_param(pscreen, PIPE_CAP_TGSI_CAN_READ_OUTPUTS)) + lower_output_reads(shader->Stage, shader->ir); /* Emit intermediate IR for main(). */ visit_exec_list(shader->ir, v); - /* Now emit bodies for any functions that were used. */ - do { - progress = GL_FALSE; - - foreach_in_list(function_entry, entry, &v->function_signatures) { - if (!entry->bgn_inst) { - v->current_function = entry; - - entry->bgn_inst = v->emit_asm(NULL, TGSI_OPCODE_BGNSUB); - entry->bgn_inst->function = entry; - - visit_exec_list(&entry->sig->body, v); - - glsl_to_tgsi_instruction *last; - last = (glsl_to_tgsi_instruction *)v->instructions.get_tail(); - if (last->op != TGSI_OPCODE_RET) - v->emit_asm(NULL, TGSI_OPCODE_RET); - - glsl_to_tgsi_instruction *end; - end = v->emit_asm(NULL, TGSI_OPCODE_ENDSUB); - end->function = entry; - - progress = GL_TRUE; - } - } - } while (progress); - #if 0 /* Print out some information (for debugging purposes) used by the * optimization passes. */ @@ -6537,8 +6529,8 @@ /* Perform optimizations on the instructions in the glsl_to_tgsi_visitor. */ v->simplify_cmp(); - if (shader->Type != GL_TESS_CONTROL_SHADER && - shader->Type != GL_TESS_EVALUATION_SHADER) + if (shader->Stage != MESA_SHADER_TESS_CTRL && + shader->Stage != MESA_SHADER_TESS_EVAL) v->copy_propagate(); while (v->eliminate_dead_code()); @@ -6559,14 +6551,15 @@ _mesa_log("\n\n"); } - prog->Instructions = NULL; - prog->NumInstructions = 0; - do_set_program_inouts(shader->ir, prog, shader->Stage); - shrink_array_declarations(v->input_arrays, v->num_input_arrays, - prog->InputsRead, prog->DoubleInputsRead, prog->PatchInputsRead); - shrink_array_declarations(v->output_arrays, v->num_output_arrays, - prog->OutputsWritten, 0ULL, prog->PatchOutputsWritten); + _mesa_copy_linked_program_data(shader_program, shader); + shrink_array_declarations(v->inputs, v->num_inputs, + &prog->info.inputs_read, + prog->info.double_inputs_read, + &prog->info.patch_inputs_read); + shrink_array_declarations(v->outputs, v->num_outputs, + &prog->info.outputs_written, 0ULL, + &prog->info.patch_outputs_written); count_resources(v, prog); /* The GLSL IR won't be needed anymore. */ @@ -6574,9 +6567,9 @@ shader->ir = NULL; /* This must be done before the uniform storage is associated. */ - if (shader->Type == GL_FRAGMENT_SHADER && - (prog->InputsRead & VARYING_BIT_POS || - prog->SystemValuesRead & (1 << SYSTEM_VALUE_FRAG_COORD))) { + if (shader->Stage == MESA_SHADER_FRAGMENT && + (prog->info.inputs_read & VARYING_BIT_POS || + prog->info.system_values_read & (1 << SYSTEM_VALUE_FRAG_COORD))) { static const gl_state_index wposTransformState[STATE_LENGTH] = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM }; @@ -6585,8 +6578,6 @@ wposTransformState); } - _mesa_reference_program(ctx, &shader->Program, prog); - /* Avoid reallocation of the program parameter list, because the uniform * storage is only associated with the original parameter list. * This should be enough for Bitmap and DrawPixels constants. @@ -6598,8 +6589,9 @@ * program constant) has to happen before creating this linkage. */ _mesa_associate_uniform_storage(ctx, shader_program, prog->Parameters); - if (!shader_program->LinkStatus) { + if (!shader_program->data->LinkStatus) { free_glsl_to_tgsi_visitor(v); + _mesa_reference_program(ctx, &shader->Program, NULL); return NULL; } @@ -6610,28 +6602,28 @@ struct st_tesseval_program *sttep; struct st_compute_program *stcp; - switch (shader->Type) { - case GL_VERTEX_SHADER: + switch (shader->Stage) { + case MESA_SHADER_VERTEX: stvp = (struct st_vertex_program *)prog; stvp->glsl_to_tgsi = v; break; - case GL_FRAGMENT_SHADER: + case MESA_SHADER_FRAGMENT: stfp = (struct st_fragment_program *)prog; stfp->glsl_to_tgsi = v; break; - case GL_GEOMETRY_SHADER: + case MESA_SHADER_GEOMETRY: stgp = (struct st_geometry_program *)prog; stgp->glsl_to_tgsi = v; break; - case GL_TESS_CONTROL_SHADER: + case MESA_SHADER_TESS_CTRL: sttcp = (struct st_tessctrl_program *)prog; sttcp->glsl_to_tgsi = v; break; - case GL_TESS_EVALUATION_SHADER: + case MESA_SHADER_TESS_EVAL: sttep = (struct st_tesseval_program *)prog; sttep->glsl_to_tgsi = v; break; - case GL_COMPUTE_SHADER: + case MESA_SHADER_COMPUTE: stcp = (struct st_compute_program *)prog; stcp->glsl_to_tgsi = v; break; @@ -6643,96 +6635,224 @@ return prog; } +static void +set_affected_state_flags(uint64_t *states, + struct gl_program *prog, + uint64_t new_constants, + uint64_t new_sampler_views, + uint64_t new_samplers, + uint64_t new_images, + uint64_t new_ubos, + uint64_t new_ssbos, + uint64_t new_atomics) +{ + if (prog->Parameters->NumParameters) + *states |= new_constants; + + if (prog->info.num_textures) + *states |= new_sampler_views | new_samplers; + + if (prog->info.num_images) + *states |= new_images; + + if (prog->info.num_ubos) + *states |= new_ubos; + + if (prog->info.num_ssbos) + *states |= new_ssbos; + + if (prog->info.num_abos) + *states |= new_atomics; +} + static struct gl_program * get_mesa_program(struct gl_context *ctx, struct gl_shader_program *shader_program, - struct gl_shader *shader) + struct gl_linked_shader *shader) { struct pipe_screen *pscreen = ctx->st->pipe->screen; - unsigned ptarget = st_shader_stage_to_ptarget(shader->Stage); + enum pipe_shader_type ptarget = st_shader_stage_to_ptarget(shader->Stage); enum pipe_shader_ir preferred_ir = (enum pipe_shader_ir) pscreen->get_shader_param(pscreen, ptarget, PIPE_SHADER_CAP_PREFERRED_IR); + struct gl_program *prog = NULL; + if (preferred_ir == PIPE_SHADER_IR_NIR) { /* TODO only for GLSL VS/FS for now: */ - switch (shader->Type) { - case GL_VERTEX_SHADER: - case GL_FRAGMENT_SHADER: - return st_nir_get_mesa_program(ctx, shader_program, shader); + switch (shader->Stage) { + case MESA_SHADER_VERTEX: + case MESA_SHADER_FRAGMENT: + prog = st_nir_get_mesa_program(ctx, shader_program, shader); default: break; } + } else { + prog = get_mesa_program_tgsi(ctx, shader_program, shader); } - return get_mesa_program_tgsi(ctx, shader_program, shader); -} + if (prog) { + uint64_t *states; -extern "C" { + /* This determines which states will be updated when the shader is + * bound. + */ + switch (shader->Stage) { + case MESA_SHADER_VERTEX: + states = &((struct st_vertex_program*)prog)->affected_states; + + *states = ST_NEW_VS_STATE | + ST_NEW_RASTERIZER | + ST_NEW_VERTEX_ARRAYS; + + set_affected_state_flags(states, prog, + ST_NEW_VS_CONSTANTS, + ST_NEW_VS_SAMPLER_VIEWS, + ST_NEW_RENDER_SAMPLERS, + ST_NEW_VS_IMAGES, + ST_NEW_VS_UBOS, + ST_NEW_VS_SSBOS, + ST_NEW_VS_ATOMICS); + break; -static void -st_dump_program_for_shader_db(struct gl_context *ctx, - struct gl_shader_program *prog) -{ - /* Dump only successfully compiled and linked shaders to the specified - * file. This is for shader-db. - * - * These options allow some pre-processing of shaders while dumping, - * because some apps have ill-formed shaders. - */ - const char *dump_filename = os_get_option("ST_DUMP_SHADERS"); - const char *insert_directives = os_get_option("ST_DUMP_INSERT"); + case MESA_SHADER_TESS_CTRL: + states = &((struct st_tessctrl_program*)prog)->affected_states; - if (dump_filename && prog->Name != 0) { - FILE *f = fopen(dump_filename, "a"); + *states = ST_NEW_TCS_STATE; - if (f) { - for (unsigned i = 0; i < prog->NumShaders; i++) { - const struct gl_shader *sh = prog->Shaders[i]; - const char *source; - bool skip_version = false; + set_affected_state_flags(states, prog, + ST_NEW_TCS_CONSTANTS, + ST_NEW_TCS_SAMPLER_VIEWS, + ST_NEW_RENDER_SAMPLERS, + ST_NEW_TCS_IMAGES, + ST_NEW_TCS_UBOS, + ST_NEW_TCS_SSBOS, + ST_NEW_TCS_ATOMICS); + break; - if (!sh) - continue; + case MESA_SHADER_TESS_EVAL: + states = &((struct st_tesseval_program*)prog)->affected_states; - source = sh->Source; + *states = ST_NEW_TES_STATE | + ST_NEW_RASTERIZER; - /* This string mustn't be changed. shader-db uses it to find - * where the shader begins. - */ - fprintf(f, "GLSL %s shader %d source for linked program %d:\n", - _mesa_shader_stage_to_string(sh->Stage), - i, prog->Name); - - /* Dump the forced version if set. */ - if (ctx->Const.ForceGLSLVersion) { - fprintf(f, "#version %i\n", ctx->Const.ForceGLSLVersion); - skip_version = true; - } + set_affected_state_flags(states, prog, + ST_NEW_TES_CONSTANTS, + ST_NEW_TES_SAMPLER_VIEWS, + ST_NEW_RENDER_SAMPLERS, + ST_NEW_TES_IMAGES, + ST_NEW_TES_UBOS, + ST_NEW_TES_SSBOS, + ST_NEW_TES_ATOMICS); + break; - /* Insert directives (optional). */ - if (insert_directives) { - if (!ctx->Const.ForceGLSLVersion && prog->Version) - fprintf(f, "#version %i\n", prog->Version); - fprintf(f, "%s\n", insert_directives); - skip_version = true; - } + case MESA_SHADER_GEOMETRY: + states = &((struct st_geometry_program*)prog)->affected_states; - if (skip_version && strncmp(source, "#version ", 9) == 0) { - const char *next_line = strstr(source, "\n"); + *states = ST_NEW_GS_STATE | + ST_NEW_RASTERIZER; - if (next_line) - source = next_line + 1; - else - continue; - } + set_affected_state_flags(states, prog, + ST_NEW_GS_CONSTANTS, + ST_NEW_GS_SAMPLER_VIEWS, + ST_NEW_RENDER_SAMPLERS, + ST_NEW_GS_IMAGES, + ST_NEW_GS_UBOS, + ST_NEW_GS_SSBOS, + ST_NEW_GS_ATOMICS); + break; - fprintf(f, "%s", source); - fprintf(f, "\n"); - } - fclose(f); + case MESA_SHADER_FRAGMENT: + states = &((struct st_fragment_program*)prog)->affected_states; + + /* gl_FragCoord and glDrawPixels always use constants. */ + *states = ST_NEW_FS_STATE | + ST_NEW_SAMPLE_SHADING | + ST_NEW_FS_CONSTANTS; + + set_affected_state_flags(states, prog, + ST_NEW_FS_CONSTANTS, + ST_NEW_FS_SAMPLER_VIEWS, + ST_NEW_RENDER_SAMPLERS, + ST_NEW_FS_IMAGES, + ST_NEW_FS_UBOS, + ST_NEW_FS_SSBOS, + ST_NEW_FS_ATOMICS); + break; + + case MESA_SHADER_COMPUTE: + states = &((struct st_compute_program*)prog)->affected_states; + + *states = ST_NEW_CS_STATE; + + set_affected_state_flags(states, prog, + ST_NEW_CS_CONSTANTS, + ST_NEW_CS_SAMPLER_VIEWS, + ST_NEW_CS_SAMPLERS, + ST_NEW_CS_IMAGES, + ST_NEW_CS_UBOS, + ST_NEW_CS_SSBOS, + ST_NEW_CS_ATOMICS); + break; + + default: + unreachable("unhandled shader stage"); } } + + return prog; } +/* See if there are unsupported control flow statements. */ +class ir_control_flow_info_visitor : public ir_hierarchical_visitor { +private: + const struct gl_shader_compiler_options *options; +public: + ir_control_flow_info_visitor(const struct gl_shader_compiler_options *options) + : options(options), + unsupported(false) + { + } + + virtual ir_visitor_status visit_enter(ir_function *ir) + { + /* Other functions are skipped (same as glsl_to_tgsi). */ + if (strcmp(ir->name, "main") == 0) + return visit_continue; + + return visit_continue_with_parent; + } + + virtual ir_visitor_status visit_enter(ir_call *ir) + { + if (!ir->callee->is_intrinsic()) { + unsupported = true; /* it's a function call */ + return visit_stop; + } + return visit_continue; + } + + virtual ir_visitor_status visit_enter(ir_return *ir) + { + if (options->EmitNoMainReturn) { + unsupported = true; + return visit_stop; + } + return visit_continue; + } + + bool unsupported; +}; + +static bool +has_unsupported_control_flow(exec_list *ir, + const struct gl_shader_compiler_options *options) +{ + ir_control_flow_info_visitor visitor(options); + visit_list_elements(&visitor, ir); + return visitor.unsupported; +} + +extern "C" { + /** * Link a shader. * Called via ctx->Driver.LinkShader() @@ -6743,29 +6863,31 @@ st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog) { struct pipe_screen *pscreen = ctx->st->pipe->screen; - assert(prog->LinkStatus); + assert(prog->data->LinkStatus); for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) { if (prog->_LinkedShaders[i] == NULL) continue; - bool progress; - exec_list *ir = prog->_LinkedShaders[i]->ir; - gl_shader_stage stage = _mesa_shader_enum_to_shader_stage(prog->_LinkedShaders[i]->Type); + struct gl_linked_shader *shader = prog->_LinkedShaders[i]; + exec_list *ir = shader->ir; + gl_shader_stage stage = shader->Stage; const struct gl_shader_compiler_options *options = &ctx->Const.ShaderCompilerOptions[stage]; - unsigned ptarget = st_shader_stage_to_ptarget(stage); + enum pipe_shader_type ptarget = st_shader_stage_to_ptarget(stage); bool have_dround = pscreen->get_shader_param(pscreen, ptarget, PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED); bool have_dfrexp = pscreen->get_shader_param(pscreen, ptarget, PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED); + unsigned if_threshold = pscreen->get_shader_param(pscreen, ptarget, + PIPE_SHADER_CAP_LOWER_IF_THRESHOLD); /* If there are forms of indirect addressing that the driver * cannot handle, perform the lowering pass. */ if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput || options->EmitNoIndirectTemp || options->EmitNoIndirectUniform) { - lower_variable_index_to_cond_assign(prog->_LinkedShaders[i]->Stage, ir, + lower_variable_index_to_cond_assign(stage, ir, options->EmitNoIndirectInput, options->EmitNoIndirectOutput, options->EmitNoIndirectTemp, @@ -6795,9 +6917,13 @@ if (!pscreen->get_param(pscreen, PIPE_CAP_TEXTURE_GATHER_OFFSETS)) lower_offset_arrays(ir); do_mat_op_to_vec(ir); + + if (stage == MESA_SHADER_FRAGMENT) + lower_blend_equation_advanced(shader); + lower_instructions(ir, MOD_TO_FLOOR | - DIV_TO_MUL_RCP | + FDIV_TO_MUL_RCP | EXP_TO_EXP2 | LOG_TO_LOG2 | LDEXP_TO_ARITH | @@ -6807,7 +6933,21 @@ (have_dround ? 0 : DOPS_TO_DFRAC) | (options->EmitNoPow ? POW_TO_EXP2 : 0) | (!ctx->Const.NativeIntegers ? INT_DIV_TO_MUL_RCP : 0) | - (options->EmitNoSat ? SAT_TO_CLAMP : 0)); + (options->EmitNoSat ? SAT_TO_CLAMP : 0) | + /* Assume that if ARB_gpu_shader5 is not supported + * then all of the extended integer functions need + * lowering. It may be necessary to add some caps + * for individual instructions. + */ + (!ctx->Extensions.ARB_gpu_shader5 + ? BIT_COUNT_TO_MATH | + EXTRACT_TO_SHIFTS | + INSERT_TO_SHIFTS | + REVERSE_TO_SHIFTS | + FIND_LSB_TO_FLOAT_CAST | + FIND_MSB_TO_FLOAT_CAST | + IMUL_HIGH_TO_MUL + : 0)); do_vec_index_to_cond_assign(ir); lower_vector_insert(ir, true); @@ -6817,18 +6957,24 @@ lower_discard(ir); } - do { - progress = false; - - progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress; - - progress = do_common_optimization(ir, true, true, options, - ctx->Const.NativeIntegers) - || progress; - - progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress; - - } while (progress); + if (ctx->Const.GLSLOptimizeConservatively) { + /* Do it once and repeat only if there's unsupported control flow. */ + do { + do_common_optimization(ir, true, true, options, + ctx->Const.NativeIntegers); + lower_if_to_cond_assign((gl_shader_stage)i, ir, + options->MaxIfDepth, if_threshold); + } while (has_unsupported_control_flow(ir, options)); + } else { + /* Repeat it until it stops making changes. */ + bool progress; + do { + progress = do_common_optimization(ir, true, true, options, + ctx->Const.NativeIntegers); + progress |= lower_if_to_cond_assign((gl_shader_stage)i, ir, + options->MaxIfDepth, if_threshold); + } while (progress); + } validate_ir_tree(ir); } @@ -6844,22 +6990,16 @@ linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i]); if (linked_prog) { - _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program, - linked_prog); if (!ctx->Driver.ProgramStringNotify(ctx, _mesa_shader_stage_to_program(i), linked_prog)) { _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program, NULL); - _mesa_reference_program(ctx, &linked_prog, NULL); return GL_FALSE; } } - - _mesa_reference_program(ctx, &linked_prog, NULL); } - st_dump_program_for_shader_db(ctx, prog); return GL_TRUE; } @@ -6869,7 +7009,7 @@ struct pipe_stream_output_info *so) { struct gl_transform_feedback_info *info = - &glsl_to_tgsi->shader_program->LinkedTransformFeedback; + glsl_to_tgsi->shader_program->xfb_program->sh.LinkedTransformFeedback; st_translate_stream_output_info2(info, outputMapping, so); } diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_glsl_to_tgsi.h mesa-17.0.7/src/mesa/state_tracker/st_glsl_to_tgsi.h --- mesa-12.0.6/src/mesa/state_tracker/st_glsl_to_tgsi.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_glsl_to_tgsi.h 2017-06-01 10:37:10.000000000 +0000 @@ -47,7 +47,6 @@ const ubyte inputSemanticName[], const ubyte inputSemanticIndex[], const GLuint interpMode[], - const GLuint interpLocation[], GLuint numOutputs, const GLuint outputMapping[], const GLuint outputSlotToAttr[], diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_manager.c mesa-17.0.7/src/mesa/state_tracker/st_manager.c --- mesa-12.0.6/src/mesa/state_tracker/st_manager.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_manager.c 2017-06-01 10:37:10.000000000 +0000 @@ -57,20 +57,6 @@ #include "util/u_atomic.h" #include "util/u_surface.h" -/** - * Cast wrapper to convert a struct gl_framebuffer to an st_framebuffer. - * Return NULL if the struct gl_framebuffer is a user-created framebuffer. - * We'll only return non-null for window system framebuffers. - * Note that this function may fail. - */ -static inline struct st_framebuffer * -st_ws_framebuffer(struct gl_framebuffer *fb) -{ - /* FBO cannot be casted. See st_new_framebuffer */ - if (fb && _mesa_is_winsys_fbo(fb)) - return (struct st_framebuffer *) fb; - return NULL; -} /** * Map an attachment to a buffer index. @@ -153,7 +139,7 @@ struct st_framebuffer *stread) { if (stdraw && stdraw->stamp != st->draw_stamp) { - st->dirty.st |= ST_NEW_FRAMEBUFFER; + st->dirty |= ST_NEW_FRAMEBUFFER; _mesa_resize_framebuffer(st->ctx, &stdraw->Base, stdraw->Base.Width, stdraw->Base.Height); @@ -162,7 +148,7 @@ if (stread && stread->stamp != st->read_stamp) { if (stread != stdraw) { - st->dirty.st |= ST_NEW_FRAMEBUFFER; + st->dirty |= ST_NEW_FRAMEBUFFER; _mesa_resize_framebuffer(st->ctx, &stread->Base, stread->Base.Width, stread->Base.Height); @@ -654,7 +640,6 @@ default: *error = ST_CONTEXT_ERROR_BAD_API; return NULL; - break; } if (attribs->flags & ST_CONTEXT_FLAG_ROBUST_ACCESS) @@ -681,16 +666,22 @@ } st->ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_DEBUG_BIT; + } - st_enable_debug_output(st, TRUE); + if (st->ctx->Const.ContextFlags & GL_CONTEXT_FLAG_DEBUG_BIT) { + st_update_debug_callback(st); } if (attribs->flags & ST_CONTEXT_FLAG_FORWARD_COMPATIBLE) st->ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_FORWARD_COMPATIBLE_BIT; - if (attribs->flags & ST_CONTEXT_FLAG_ROBUST_ACCESS) + if (attribs->flags & ST_CONTEXT_FLAG_ROBUST_ACCESS) { st->ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_ROBUST_ACCESS_BIT_ARB; - if (attribs->flags & ST_CONTEXT_FLAG_RESET_NOTIFICATION_ENABLED) + st->ctx->Const.RobustAccess = GL_TRUE; + } + if (attribs->flags & ST_CONTEXT_FLAG_RESET_NOTIFICATION_ENABLED) { st->ctx->Const.ResetStrategy = GL_LOSE_CONTEXT_ON_RESET_ARB; + st_install_device_reset_callback(st); + } /* need to perform version check */ if (attribs->major > 1 || attribs->minor > 0) { @@ -802,12 +793,6 @@ return ret; } -static st_proc_t -st_api_get_proc_address(struct st_api *stapi, const char *procname) -{ - return (st_proc_t) _glapi_get_proc_address(procname); -} - static void st_api_destroy(struct st_api *stapi) { @@ -852,6 +837,7 @@ return NULL; u_surface_default_template(&surf_tmpl, stimg.texture); + surf_tmpl.format = stimg.format; surf_tmpl.u.tex.level = stimg.level; surf_tmpl.u.tex.first_layer = stimg.layer; surf_tmpl.u.tex.last_layer = stimg.layer; @@ -958,20 +944,19 @@ } static const struct st_api st_gl_api = { - "Mesa " PACKAGE_VERSION, - ST_API_OPENGL, - ST_PROFILE_DEFAULT_MASK | - ST_PROFILE_OPENGL_CORE_MASK | - ST_PROFILE_OPENGL_ES1_MASK | - ST_PROFILE_OPENGL_ES2_MASK | - 0, - ST_API_FEATURE_MS_VISUALS_MASK, - st_api_destroy, - st_api_query_versions, - st_api_get_proc_address, - st_api_create_context, - st_api_make_current, - st_api_get_current, + .name = "Mesa " PACKAGE_VERSION, + .api = ST_API_OPENGL, + .profile_mask = ST_PROFILE_DEFAULT_MASK | + ST_PROFILE_OPENGL_CORE_MASK | + ST_PROFILE_OPENGL_ES1_MASK | + ST_PROFILE_OPENGL_ES2_MASK | + 0, + .feature_mask = ST_API_FEATURE_MS_VISUALS_MASK, + .destroy = st_api_destroy, + .query_versions = st_api_query_versions, + .create_context = st_api_create_context, + .make_current = st_api_make_current, + .get_current = st_api_get_current, }; struct st_api * diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_mesa_to_tgsi.c mesa-17.0.7/src/mesa/state_tracker/st_mesa_to_tgsi.c --- mesa-12.0.6/src/mesa/state_tracker/st_mesa_to_tgsi.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_mesa_to_tgsi.c 2017-06-01 10:37:10.000000000 +0000 @@ -51,13 +51,6 @@ (1 << PROGRAM_CONSTANT) | \ (1 << PROGRAM_UNIFORM)) - -struct label { - unsigned branch_target; - unsigned token; -}; - - /** * Intermediate state used during shader translation. */ @@ -75,78 +68,11 @@ const GLuint *inputMapping; const GLuint *outputMapping; - /* For every instruction that contains a label (eg CALL), keep - * details so that we can go back afterwards and emit the correct - * tgsi instruction number for each label. - */ - struct label *labels; - unsigned labels_size; - unsigned labels_count; - - /* Keep a record of the tgsi instruction number that each mesa - * instruction starts at, will be used to fix up labels after - * translation. - */ - unsigned *insn; - unsigned insn_size; - unsigned insn_count; - unsigned procType; /**< PIPE_SHADER_VERTEX/FRAGMENT */ - - boolean error; }; /** - * Make note of a branch to a label in the TGSI code. - * After we've emitted all instructions, we'll go over the list - * of labels built here and patch the TGSI code with the actual - * location of each label. - */ -static unsigned *get_label( struct st_translate *t, - unsigned branch_target ) -{ - unsigned i; - - if (t->labels_count + 1 >= t->labels_size) { - t->labels_size = 1 << (util_logbase2(t->labels_size) + 1); - t->labels = realloc(t->labels, t->labels_size * sizeof t->labels[0]); - if (t->labels == NULL) { - static unsigned dummy; - t->error = TRUE; - return &dummy; - } - } - - i = t->labels_count++; - t->labels[i].branch_target = branch_target; - return &t->labels[i].token; -} - - -/** - * Called prior to emitting the TGSI code for each Mesa instruction. - * Allocate additional space for instructions if needed. - * Update the insn[] array so the next Mesa instruction points to - * the next TGSI instruction. - */ -static void set_insn_start( struct st_translate *t, - unsigned start ) -{ - if (t->insn_count + 1 >= t->insn_size) { - t->insn_size = 1 << (util_logbase2(t->insn_size) + 1); - t->insn = realloc(t->insn, t->insn_size * sizeof t->insn[0]); - if (t->insn == NULL) { - t->error = TRUE; - return; - } - } - - t->insn[t->insn_count++] = start; -} - - -/** * Map a Mesa dst register to a TGSI ureg_dst register. */ static struct ureg_dst @@ -501,30 +427,12 @@ switch( op ) { case OPCODE_ARL: return TGSI_OPCODE_ARL; - case OPCODE_ABS: - return TGSI_OPCODE_ABS; case OPCODE_ADD: return TGSI_OPCODE_ADD; - case OPCODE_BGNLOOP: - return TGSI_OPCODE_BGNLOOP; - case OPCODE_BGNSUB: - return TGSI_OPCODE_BGNSUB; - case OPCODE_BRK: - return TGSI_OPCODE_BRK; - case OPCODE_CAL: - return TGSI_OPCODE_CAL; case OPCODE_CMP: return TGSI_OPCODE_CMP; - case OPCODE_CONT: - return TGSI_OPCODE_CONT; case OPCODE_COS: return TGSI_OPCODE_COS; - case OPCODE_DDX: - return TGSI_OPCODE_DDX; - case OPCODE_DDY: - return TGSI_OPCODE_DDY; - case OPCODE_DP2: - return TGSI_OPCODE_DP2; case OPCODE_DP3: return TGSI_OPCODE_DP3; case OPCODE_DP4: @@ -533,14 +441,6 @@ return TGSI_OPCODE_DPH; case OPCODE_DST: return TGSI_OPCODE_DST; - case OPCODE_ELSE: - return TGSI_OPCODE_ELSE; - case OPCODE_ENDIF: - return TGSI_OPCODE_ENDIF; - case OPCODE_ENDLOOP: - return TGSI_OPCODE_ENDLOOP; - case OPCODE_ENDSUB: - return TGSI_OPCODE_ENDSUB; case OPCODE_EX2: return TGSI_OPCODE_EX2; case OPCODE_EXP: @@ -549,10 +449,6 @@ return TGSI_OPCODE_FLR; case OPCODE_FRC: return TGSI_OPCODE_FRC; - case OPCODE_IF: - return TGSI_OPCODE_IF; - case OPCODE_TRUNC: - return TGSI_OPCODE_TRUNC; case OPCODE_KIL: return TGSI_OPCODE_KILL_IF; case OPCODE_LG2: @@ -573,14 +469,10 @@ return TGSI_OPCODE_MOV; case OPCODE_MUL: return TGSI_OPCODE_MUL; - case OPCODE_NOP: - return TGSI_OPCODE_NOP; case OPCODE_POW: return TGSI_OPCODE_POW; case OPCODE_RCP: return TGSI_OPCODE_RCP; - case OPCODE_RET: - return TGSI_OPCODE_RET; case OPCODE_SCS: return TGSI_OPCODE_SCS; case OPCODE_SGE: @@ -589,18 +481,10 @@ return TGSI_OPCODE_SIN; case OPCODE_SLT: return TGSI_OPCODE_SLT; - case OPCODE_SSG: - return TGSI_OPCODE_SSG; - case OPCODE_SUB: - return TGSI_OPCODE_SUB; case OPCODE_TEX: return TGSI_OPCODE_TEX; case OPCODE_TXB: return TGSI_OPCODE_TXB; - case OPCODE_TXD: - return TGSI_OPCODE_TXD; - case OPCODE_TXL: - return TGSI_OPCODE_TXL; case OPCODE_TXP: return TGSI_OPCODE_TXP; case OPCODE_XPD: @@ -643,29 +527,8 @@ emit_swz( t, dst[0], &inst->SrcReg[0] ); return; - case OPCODE_BGNLOOP: - case OPCODE_CAL: - case OPCODE_ELSE: - case OPCODE_ENDLOOP: - debug_assert(num_dst == 0); - ureg_label_insn( ureg, - translate_opcode( inst->Opcode ), - src, num_src, - get_label( t, inst->BranchTarget )); - return; - - case OPCODE_IF: - debug_assert(num_dst == 0); - ureg_label_insn( ureg, - ctx->Const.NativeIntegers ? TGSI_OPCODE_UIF : TGSI_OPCODE_IF, - src, num_src, - get_label( t, inst->BranchTarget )); - return; - case OPCODE_TEX: case OPCODE_TXB: - case OPCODE_TXD: - case OPCODE_TXL: case OPCODE_TXP: src[num_src++] = t->samplers[inst->TexSrcUnit]; ureg_tex_insn( ureg, @@ -693,23 +556,18 @@ src, num_src ); break; - case OPCODE_NOISE1: - case OPCODE_NOISE2: - case OPCODE_NOISE3: - case OPCODE_NOISE4: - /* At some point, a motivated person could add a better - * implementation of noise. Currently not even the nvidia - * binary drivers do anything more than this. In any case, the - * place to do this is in the GL state tracker, not the poor - * driver. - */ - ureg_MOV( ureg, dst[0], ureg_imm1f(ureg, 0.5) ); - break; - case OPCODE_RSQ: ureg_RSQ( ureg, dst[0], ureg_abs(src[0]) ); break; + case OPCODE_ABS: + ureg_MOV(ureg, dst[0], ureg_abs(src[0])); + break; + + case OPCODE_SUB: + ureg_ADD(ureg, dst[0], src[0], ureg_negate(src[1])); + break; + default: ureg_insn( ureg, translate_opcode( inst->Opcode ), @@ -818,8 +676,6 @@ const struct gl_program *program, struct ureg_program *ureg) { - const struct gl_fragment_program *fp = - (const struct gl_fragment_program *) program; struct pipe_screen *pscreen = st->pipe->screen; GLfloat adjX = 0.0f; GLfloat adjY[2] = { 0.0f, 0.0f }; @@ -830,7 +686,7 @@ * * The bias of the y-coordinate depends on whether y-inversion takes place * (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are - * drawing to an FBO (causes additional inversion), and whether the the pipe + * drawing to an FBO (causes additional inversion), and whether the pipe * driver origin and the requested origin differ (the latter condition is * stored in the 'invert' variable). * @@ -852,7 +708,7 @@ * u,i -> l,h: (99.0 + 0.5) * -1 + 100 = 0.5 * u,h -> l,i: (99.5 + 0.5) * -1 + 100 = 0 */ - if (fp->OriginUpperLeft) { + if (program->OriginUpperLeft) { /* Fragment shader wants origin in upper-left */ if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) { /* the driver supports upper-left origin */ @@ -879,7 +735,7 @@ assert(0); } - if (fp->PixelCenterInteger) { + if (program->PixelCenterInteger) { /* Fragment shader wants pixel center integer */ if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) { /* the driver supports pixel center integer */ @@ -980,7 +836,7 @@ interpMode[i]); } - if (program->InputsRead & VARYING_BIT_POS) { + if (program->info.inputs_read & VARYING_BIT_POS) { /* Must do this after setting up t->inputs, and before * emitting constant references, below: */ @@ -1054,15 +910,15 @@ /* Declare address register. */ - if (program->NumAddressRegs > 0) { - debug_assert( program->NumAddressRegs == 1 ); + if (program->arb.NumAddressRegs > 0) { + debug_assert( program->arb.NumAddressRegs == 1 ); t->address[0] = ureg_DECL_address( ureg ); } /* Declare misc input registers */ { - GLbitfield sysInputs = program->SystemValuesRead; + GLbitfield sysInputs = program->info.system_values_read; for (i = 0; sysInputs; i++) { if (sysInputs & (1 << i)) { @@ -1100,11 +956,11 @@ } } - if (program->IndirectRegisterFiles & (1 << PROGRAM_TEMPORARY)) { + if (program->arb.IndirectRegisterFiles & (1 << PROGRAM_TEMPORARY)) { /* If temps are accessed with indirect addressing, declare temporaries * in sequential order. Else, we declare them on demand elsewhere. */ - for (i = 0; i < program->NumTemporaries; i++) { + for (i = 0; i < program->arb.NumTemporaries; i++) { /* XXX use TGSI_FILE_TEMPORARY_ARRAY when it's supported by ureg */ t->temps[i] = ureg_DECL_temporary( t->ureg ); } @@ -1135,7 +991,7 @@ * array. */ case PROGRAM_CONSTANT: - if (program->IndirectRegisterFiles & PROGRAM_ANY_CONST) + if (program->arb.IndirectRegisterFiles & PROGRAM_ANY_CONST) t->constants[i] = ureg_DECL_constant( ureg, i ); else t->constants[i] = @@ -1167,27 +1023,10 @@ /* Emit each instruction in turn: */ - for (i = 0; i < program->NumInstructions; i++) { - set_insn_start( t, ureg_get_instruction_number( ureg )); - compile_instruction(ctx, t, &program->Instructions[i]); - } - - /* Fix up all emitted labels: - */ - for (i = 0; i < t->labels_count; i++) { - ureg_fixup_label( ureg, - t->labels[i].token, - t->insn[t->labels[i].branch_target] ); - } + for (i = 0; i < program->arb.NumInstructions; i++) + compile_instruction(ctx, t, &program->arb.Instructions[i]); out: - free(t->insn); - free(t->labels); free(t->constants); - - if (t->error) { - debug_printf("%s: translate error flag set\n", __func__); - } - return ret; } diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_nir.h mesa-17.0.7/src/mesa/state_tracker/st_nir.h --- mesa-12.0.6/src/mesa/state_tracker/st_nir.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_nir.h 2017-06-01 10:37:10.000000000 +0000 @@ -31,19 +31,22 @@ extern "C" { #endif -typedef struct nir_shader nir_shader; +struct nir_shader; -void st_nir_lower_builtin(nir_shader *shader); -nir_shader * st_glsl_to_nir(struct st_context *st, struct gl_program *prog, - struct gl_shader_program *shader_program, - gl_shader_stage stage); +void st_nir_lower_builtin(struct nir_shader *shader); +void st_nir_lower_tex_src_plane(struct nir_shader *shader, unsigned free_slots, + unsigned lower_2plane, unsigned lower_3plane); -void st_finalize_nir(struct st_context *st, struct gl_program *prog, nir_shader *nir); +struct nir_shader * st_glsl_to_nir(struct st_context *st, struct gl_program *prog, + struct gl_shader_program *shader_program, + gl_shader_stage stage); + +void st_finalize_nir(struct st_context *st, struct gl_program *prog, struct nir_shader *nir); struct gl_program * st_nir_get_mesa_program(struct gl_context *ctx, struct gl_shader_program *shader_program, - struct gl_shader *shader); + struct gl_linked_shader *shader); #ifdef __cplusplus } diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_nir_lower_builtin.c mesa-17.0.7/src/mesa/state_tracker/st_nir_lower_builtin.c --- mesa-12.0.6/src/mesa/state_tracker/st_nir_lower_builtin.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_nir_lower_builtin.c 2017-06-01 10:37:10.000000000 +0000 @@ -46,12 +46,12 @@ * * with appropriate substitutions in the uniform variables list: * - * decl_var uniform INTERP_QUALIFIER_NONE gl_FogParameters gl_Fog (0, 0) + * decl_var uniform INTERP_MODE_NONE gl_FogParameters gl_Fog (0, 0) * * would become: * - * decl_var uniform INTERP_QUALIFIER_NONE vec4 state.fog.color (0, 0) - * decl_var uniform INTERP_QUALIFIER_NONE vec4 state.fog.params (0, 1) + * decl_var uniform INTERP_MODE_NONE vec4 state.fog.color (0, 0) + * decl_var uniform INTERP_MODE_NONE vec4 state.fog.params (0, 1) * * See in particular 'struct gl_builtin_uniform_element'. */ diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_nir_lower_tex_src_plane.c mesa-17.0.7/src/mesa/state_tracker/st_nir_lower_tex_src_plane.c --- mesa-12.0.6/src/mesa/state_tracker/st_nir_lower_tex_src_plane.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_nir_lower_tex_src_plane.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,120 @@ +/* + * Copyright © 2016 Red Hat + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +/* Lowers the additional tex_src_plane src, generated by nir_lower_tex + * for planar YUV textures, into separate samplers, matching the logic + * that mesa/st uses to insert additional sampler view/state (since both + * sides need to agree). + * + * This should run after nir_lower_samplers. + */ + +#include "compiler/nir/nir.h" +#include "st_nir.h" + +typedef struct { + unsigned lower_2plane; + unsigned lower_3plane; + + /* Maps a primary sampler (used for Y) to the U or UV sampler. In + * case of 3-plane YUV format, the V plane is next sampler after U. + */ + unsigned char sampler_map[PIPE_MAX_SAMPLERS][2]; +} lower_tex_src_state; + +static void +assign_extra_samplers(lower_tex_src_state *state, unsigned free_slots) +{ + unsigned mask = state->lower_2plane | state->lower_3plane; + + while (mask) { + unsigned extra, y_samp = u_bit_scan(&mask); + + extra = u_bit_scan(&free_slots); + state->sampler_map[y_samp][0] = extra; + + if (state->lower_3plane & (1 << y_samp)) { + extra = u_bit_scan(&free_slots); + state->sampler_map[y_samp][1] = extra; + } + } +} + +static void +lower_tex_src_plane_block(lower_tex_src_state *state, nir_block *block) +{ + nir_foreach_instr(instr, block) { + if (instr->type != nir_instr_type_tex) + continue; + + nir_tex_instr *tex = nir_instr_as_tex(instr); + int plane_index = nir_tex_instr_src_index(tex, nir_tex_src_plane); + + if (plane_index < 0) + continue; + + nir_const_value *plane = nir_src_as_const_value(tex->src[plane_index].src); + assume(plane); + + if (plane->i32[0] > 0) { + unsigned y_samp = tex->texture_index; + + assume(tex->texture_index == tex->sampler_index); + assume(((state->lower_3plane & (1 << y_samp)) && plane->i32[0] < 3) || + (plane->i32[0] < 2)); + + tex->texture_index = tex->sampler_index = + state->sampler_map[y_samp][plane->i32[0] - 1]; + } + + nir_tex_instr_remove_src(tex, plane_index); + } +} + +static void +lower_tex_src_plane_impl(lower_tex_src_state *state, nir_function_impl *impl) +{ + nir_foreach_block(block, impl) { + lower_tex_src_plane_block(state, block); + } + + nir_metadata_preserve(impl, nir_metadata_block_index | + nir_metadata_dominance); +} + +void +st_nir_lower_tex_src_plane(struct nir_shader *shader, unsigned free_slots, + unsigned lower_2plane, unsigned lower_3plane) +{ + lower_tex_src_state state = {0}; + + state.lower_2plane = lower_2plane; + state.lower_3plane = lower_3plane; + + assign_extra_samplers(&state, free_slots); + + nir_foreach_function(function, shader) { + if (function->impl) + lower_tex_src_plane_impl(&state, function->impl); + } +} diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_pbo.c mesa-17.0.7/src/mesa/state_tracker/st_pbo.c --- mesa-12.0.6/src/mesa/state_tracker/st_pbo.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_pbo.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,667 @@ +/* + * Copyright 2007 VMware, Inc. + * Copyright 2016 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +/** + * \file + * + * Common helper functions for PBO up- and downloads. + */ + +#include "state_tracker/st_context.h" +#include "state_tracker/st_pbo.h" +#include "state_tracker/st_cb_bufferobjects.h" + +#include "pipe/p_context.h" +#include "pipe/p_defines.h" +#include "pipe/p_screen.h" +#include "cso_cache/cso_context.h" +#include "tgsi/tgsi_ureg.h" +#include "util/u_format.h" +#include "util/u_inlines.h" +#include "util/u_upload_mgr.h" + +/* Conversion to apply in the fragment shader. */ +enum st_pbo_conversion { + ST_PBO_CONVERT_NONE = 0, + ST_PBO_CONVERT_UINT_TO_SINT, + ST_PBO_CONVERT_SINT_TO_UINT, + + ST_NUM_PBO_CONVERSIONS +}; + +/* Final setup of buffer addressing information. + * + * buf_offset is in pixels. + * + * Returns false if something (e.g. alignment) prevents PBO upload/download. + */ +bool +st_pbo_addresses_setup(struct st_context *st, + struct pipe_resource *buf, intptr_t buf_offset, + struct st_pbo_addresses *addr) +{ + unsigned skip_pixels; + + /* Check alignment against texture buffer requirements. */ + { + unsigned ofs = (buf_offset * addr->bytes_per_pixel) % st->ctx->Const.TextureBufferOffsetAlignment; + if (ofs != 0) { + if (ofs % addr->bytes_per_pixel != 0) + return false; + + skip_pixels = ofs / addr->bytes_per_pixel; + buf_offset -= skip_pixels; + } else { + skip_pixels = 0; + } + } + + assert(buf_offset >= 0); + + addr->buffer = buf; + addr->first_element = buf_offset; + addr->last_element = buf_offset + skip_pixels + addr->width - 1 + + (addr->height - 1 + (addr->depth - 1) * addr->image_height) * addr->pixels_per_row; + + if (addr->last_element - addr->first_element > st->ctx->Const.MaxTextureBufferSize - 1) + return false; + + /* This should be ensured by Mesa before calling our callbacks */ + assert((addr->last_element + 1) * addr->bytes_per_pixel <= buf->width0); + + addr->constants.xoffset = -addr->xoffset + skip_pixels; + addr->constants.yoffset = -addr->yoffset; + addr->constants.stride = addr->pixels_per_row; + addr->constants.image_size = addr->pixels_per_row * addr->image_height; + addr->constants.layer_offset = 0; + + return true; +} + +/* Validate and fill buffer addressing information based on GL pixelstore + * attributes. + * + * Returns false if some aspect of the addressing (e.g. alignment) prevents + * PBO upload/download. + */ +bool +st_pbo_addresses_pixelstore(struct st_context *st, + GLenum gl_target, bool skip_images, + const struct gl_pixelstore_attrib *store, + const void *pixels, + struct st_pbo_addresses *addr) +{ + struct pipe_resource *buf = st_buffer_object(store->BufferObj)->buffer; + intptr_t buf_offset = (intptr_t) pixels; + + if (buf_offset % addr->bytes_per_pixel) + return false; + + /* Convert to texels */ + buf_offset = buf_offset / addr->bytes_per_pixel; + + /* Determine image height */ + if (gl_target == GL_TEXTURE_1D_ARRAY) { + addr->image_height = 1; + } else { + addr->image_height = store->ImageHeight > 0 ? store->ImageHeight : addr->height; + } + + /* Compute the stride, taking store->Alignment into account */ + { + unsigned pixels_per_row = store->RowLength > 0 ? + store->RowLength : addr->width; + unsigned bytes_per_row = pixels_per_row * addr->bytes_per_pixel; + unsigned remainder = bytes_per_row % store->Alignment; + unsigned offset_rows; + + if (remainder > 0) + bytes_per_row += store->Alignment - remainder; + + if (bytes_per_row % addr->bytes_per_pixel) + return false; + + addr->pixels_per_row = bytes_per_row / addr->bytes_per_pixel; + + offset_rows = store->SkipRows; + if (skip_images) + offset_rows += addr->image_height * store->SkipImages; + + buf_offset += store->SkipPixels + addr->pixels_per_row * offset_rows; + } + + if (!st_pbo_addresses_setup(st, buf, buf_offset, addr)) + return false; + + /* Support GL_PACK_INVERT_MESA */ + if (store->Invert) { + addr->constants.xoffset += (addr->height - 1) * addr->constants.stride; + addr->constants.stride = -addr->constants.stride; + } + + return true; +} + +/* For download from a framebuffer, we may have to invert the Y axis. The + * setup is as follows: + * - set viewport to inverted, so that the position sysval is correct for + * texel fetches + * - this function adjusts the fragment shader's constant buffer to compute + * the correct destination addresses. + */ +void +st_pbo_addresses_invert_y(struct st_pbo_addresses *addr, + unsigned viewport_height) +{ + addr->constants.xoffset += + (viewport_height - 1 + 2 * addr->constants.yoffset) * addr->constants.stride; + addr->constants.stride = -addr->constants.stride; +} + +/* Setup all vertex pipeline state, rasterizer state, and fragment shader + * constants, and issue the draw call for PBO upload/download. + * + * The caller is responsible for saving and restoring state, as well as for + * setting other fragment shader state (fragment shader, samplers), and + * framebuffer/viewport/DSA/blend state. + */ +bool +st_pbo_draw(struct st_context *st, const struct st_pbo_addresses *addr, + unsigned surface_width, unsigned surface_height) +{ + struct cso_context *cso = st->cso_context; + + /* Setup vertex and geometry shaders */ + if (!st->pbo.vs) { + st->pbo.vs = st_pbo_create_vs(st); + if (!st->pbo.vs) + return false; + } + + if (addr->depth != 1 && st->pbo.use_gs && !st->pbo.gs) { + st->pbo.gs = st_pbo_create_gs(st); + if (!st->pbo.gs) + return false; + } + + cso_set_vertex_shader_handle(cso, st->pbo.vs); + + cso_set_geometry_shader_handle(cso, addr->depth != 1 ? st->pbo.gs : NULL); + + cso_set_tessctrl_shader_handle(cso, NULL); + + cso_set_tesseval_shader_handle(cso, NULL); + + /* Upload vertices */ + { + struct pipe_vertex_buffer vbo; + struct pipe_vertex_element velem; + + float x0 = (float) addr->xoffset / surface_width * 2.0f - 1.0f; + float y0 = (float) addr->yoffset / surface_height * 2.0f - 1.0f; + float x1 = (float) (addr->xoffset + addr->width) / surface_width * 2.0f - 1.0f; + float y1 = (float) (addr->yoffset + addr->height) / surface_height * 2.0f - 1.0f; + + float *verts = NULL; + + vbo.user_buffer = NULL; + vbo.buffer = NULL; + vbo.stride = 2 * sizeof(float); + + u_upload_alloc(st->uploader, 0, 8 * sizeof(float), 4, + &vbo.buffer_offset, &vbo.buffer, (void **) &verts); + if (!verts) + return false; + + verts[0] = x0; + verts[1] = y0; + verts[2] = x0; + verts[3] = y1; + verts[4] = x1; + verts[5] = y0; + verts[6] = x1; + verts[7] = y1; + + u_upload_unmap(st->uploader); + + velem.src_offset = 0; + velem.instance_divisor = 0; + velem.vertex_buffer_index = cso_get_aux_vertex_buffer_slot(cso); + velem.src_format = PIPE_FORMAT_R32G32_FLOAT; + + cso_set_vertex_elements(cso, 1, &velem); + + cso_set_vertex_buffers(cso, velem.vertex_buffer_index, 1, &vbo); + + pipe_resource_reference(&vbo.buffer, NULL); + } + + /* Upload constants */ + { + struct pipe_constant_buffer cb; + + if (st->constbuf_uploader) { + cb.buffer = NULL; + cb.user_buffer = NULL; + u_upload_data(st->constbuf_uploader, 0, sizeof(addr->constants), + st->ctx->Const.UniformBufferOffsetAlignment, + &addr->constants, &cb.buffer_offset, &cb.buffer); + if (!cb.buffer) + return false; + + u_upload_unmap(st->constbuf_uploader); + } else { + cb.buffer = NULL; + cb.user_buffer = &addr->constants; + cb.buffer_offset = 0; + } + cb.buffer_size = sizeof(addr->constants); + + cso_set_constant_buffer(cso, PIPE_SHADER_FRAGMENT, 0, &cb); + + pipe_resource_reference(&cb.buffer, NULL); + } + + /* Rasterizer state */ + cso_set_rasterizer(cso, &st->pbo.raster); + + /* Disable stream output */ + cso_set_stream_outputs(cso, 0, NULL, 0); + + if (addr->depth == 1) { + cso_draw_arrays(cso, PIPE_PRIM_TRIANGLE_STRIP, 0, 4); + } else { + cso_draw_arrays_instanced(cso, PIPE_PRIM_TRIANGLE_STRIP, + 0, 4, 0, addr->depth); + } + + return true; +} + +void * +st_pbo_create_vs(struct st_context *st) +{ + struct ureg_program *ureg; + struct ureg_src in_pos; + struct ureg_src in_instanceid; + struct ureg_dst out_pos; + struct ureg_dst out_layer; + + ureg = ureg_create(PIPE_SHADER_VERTEX); + if (!ureg) + return NULL; + + in_pos = ureg_DECL_vs_input(ureg, TGSI_SEMANTIC_POSITION); + + out_pos = ureg_DECL_output(ureg, TGSI_SEMANTIC_POSITION, 0); + + if (st->pbo.layers) { + in_instanceid = ureg_DECL_system_value(ureg, TGSI_SEMANTIC_INSTANCEID, 0); + + if (!st->pbo.use_gs) + out_layer = ureg_DECL_output(ureg, TGSI_SEMANTIC_LAYER, 0); + } + + /* out_pos = in_pos */ + ureg_MOV(ureg, out_pos, in_pos); + + if (st->pbo.layers) { + if (st->pbo.use_gs) { + /* out_pos.z = i2f(gl_InstanceID) */ + ureg_I2F(ureg, ureg_writemask(out_pos, TGSI_WRITEMASK_Z), + ureg_scalar(in_instanceid, TGSI_SWIZZLE_X)); + } else { + /* out_layer = gl_InstanceID */ + ureg_MOV(ureg, out_layer, in_instanceid); + } + } + + ureg_END(ureg); + + return ureg_create_shader_and_destroy(ureg, st->pipe); +} + +void * +st_pbo_create_gs(struct st_context *st) +{ + static const int zero = 0; + struct ureg_program *ureg; + struct ureg_dst out_pos; + struct ureg_dst out_layer; + struct ureg_src in_pos; + struct ureg_src imm; + unsigned i; + + ureg = ureg_create(PIPE_SHADER_GEOMETRY); + if (!ureg) + return NULL; + + ureg_property(ureg, TGSI_PROPERTY_GS_INPUT_PRIM, PIPE_PRIM_TRIANGLES); + ureg_property(ureg, TGSI_PROPERTY_GS_OUTPUT_PRIM, PIPE_PRIM_TRIANGLE_STRIP); + ureg_property(ureg, TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES, 3); + + out_pos = ureg_DECL_output(ureg, TGSI_SEMANTIC_POSITION, 0); + out_layer = ureg_DECL_output(ureg, TGSI_SEMANTIC_LAYER, 0); + + in_pos = ureg_DECL_input(ureg, TGSI_SEMANTIC_POSITION, 0, 0, 1); + + imm = ureg_DECL_immediate_int(ureg, &zero, 1); + + for (i = 0; i < 3; ++i) { + struct ureg_src in_pos_vertex = ureg_src_dimension(in_pos, i); + + /* out_pos = in_pos[i] */ + ureg_MOV(ureg, out_pos, in_pos_vertex); + + /* out_layer.x = f2i(in_pos[i].z) */ + ureg_F2I(ureg, ureg_writemask(out_layer, TGSI_WRITEMASK_X), + ureg_scalar(in_pos_vertex, TGSI_SWIZZLE_Z)); + + ureg_EMIT(ureg, ureg_scalar(imm, TGSI_SWIZZLE_X)); + } + + ureg_END(ureg); + + return ureg_create_shader_and_destroy(ureg, st->pipe); +} + +static void +build_conversion(struct ureg_program *ureg, const struct ureg_dst *temp, + enum st_pbo_conversion conversion) +{ + switch (conversion) { + case ST_PBO_CONVERT_SINT_TO_UINT: + ureg_IMAX(ureg, *temp, ureg_src(*temp), ureg_imm1i(ureg, 0)); + break; + case ST_PBO_CONVERT_UINT_TO_SINT: + ureg_UMIN(ureg, *temp, ureg_src(*temp), ureg_imm1u(ureg, (1u << 31) - 1)); + break; + default: + /* no-op */ + break; + } +} + +static void * +create_fs(struct st_context *st, bool download, enum pipe_texture_target target, + enum st_pbo_conversion conversion) +{ + struct pipe_context *pipe = st->pipe; + struct pipe_screen *screen = pipe->screen; + struct ureg_program *ureg; + bool have_layer; + struct ureg_dst out; + struct ureg_src sampler; + struct ureg_src pos; + struct ureg_src layer; + struct ureg_src const0; + struct ureg_src const1; + struct ureg_dst temp0; + + have_layer = + st->pbo.layers && + (!download || target == PIPE_TEXTURE_1D_ARRAY + || target == PIPE_TEXTURE_2D_ARRAY + || target == PIPE_TEXTURE_3D + || target == PIPE_TEXTURE_CUBE + || target == PIPE_TEXTURE_CUBE_ARRAY); + + ureg = ureg_create(PIPE_SHADER_FRAGMENT); + if (!ureg) + return NULL; + + if (!download) { + out = ureg_DECL_output(ureg, TGSI_SEMANTIC_COLOR, 0); + } else { + struct ureg_src image; + + /* writeonly images do not require an explicitly given format. */ + image = ureg_DECL_image(ureg, 0, TGSI_TEXTURE_BUFFER, PIPE_FORMAT_NONE, + true, false); + out = ureg_dst(image); + } + + sampler = ureg_DECL_sampler(ureg, 0); + if (screen->get_param(screen, PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL)) { + pos = ureg_DECL_system_value(ureg, TGSI_SEMANTIC_POSITION, 0); + } else { + pos = ureg_DECL_fs_input(ureg, TGSI_SEMANTIC_POSITION, 0, + TGSI_INTERPOLATE_LINEAR); + } + if (have_layer) { + layer = ureg_DECL_fs_input(ureg, TGSI_SEMANTIC_LAYER, 0, + TGSI_INTERPOLATE_CONSTANT); + } + const0 = ureg_DECL_constant(ureg, 0); + const1 = ureg_DECL_constant(ureg, 1); + temp0 = ureg_DECL_temporary(ureg); + + /* Note: const0 = [ -xoffset + skip_pixels, -yoffset, stride, image_height ] */ + + /* temp0.xy = f2i(temp0.xy) */ + ureg_F2I(ureg, ureg_writemask(temp0, TGSI_WRITEMASK_XY), + ureg_swizzle(pos, + TGSI_SWIZZLE_X, TGSI_SWIZZLE_Y, + TGSI_SWIZZLE_Y, TGSI_SWIZZLE_Y)); + + /* temp0.xy = temp0.xy + const0.xy */ + ureg_UADD(ureg, ureg_writemask(temp0, TGSI_WRITEMASK_XY), + ureg_swizzle(ureg_src(temp0), + TGSI_SWIZZLE_X, TGSI_SWIZZLE_Y, + TGSI_SWIZZLE_Y, TGSI_SWIZZLE_Y), + ureg_swizzle(const0, + TGSI_SWIZZLE_X, TGSI_SWIZZLE_Y, + TGSI_SWIZZLE_Y, TGSI_SWIZZLE_Y)); + + /* temp0.x = const0.z * temp0.y + temp0.x */ + ureg_UMAD(ureg, ureg_writemask(temp0, TGSI_WRITEMASK_X), + ureg_scalar(const0, TGSI_SWIZZLE_Z), + ureg_scalar(ureg_src(temp0), TGSI_SWIZZLE_Y), + ureg_scalar(ureg_src(temp0), TGSI_SWIZZLE_X)); + + if (have_layer) { + /* temp0.x = const0.w * layer + temp0.x */ + ureg_UMAD(ureg, ureg_writemask(temp0, TGSI_WRITEMASK_X), + ureg_scalar(const0, TGSI_SWIZZLE_W), + ureg_scalar(layer, TGSI_SWIZZLE_X), + ureg_scalar(ureg_src(temp0), TGSI_SWIZZLE_X)); + } + + /* temp0.w = 0 */ + ureg_MOV(ureg, ureg_writemask(temp0, TGSI_WRITEMASK_W), ureg_imm1u(ureg, 0)); + + if (download) { + struct ureg_dst temp1; + struct ureg_src op[2]; + + temp1 = ureg_DECL_temporary(ureg); + + /* temp1.xy = pos.xy */ + ureg_F2I(ureg, ureg_writemask(temp1, TGSI_WRITEMASK_XY), pos); + + /* temp1.zw = 0 */ + ureg_MOV(ureg, ureg_writemask(temp1, TGSI_WRITEMASK_ZW), ureg_imm1u(ureg, 0)); + + if (have_layer) { + struct ureg_dst temp1_layer = + ureg_writemask(temp1, target == PIPE_TEXTURE_1D_ARRAY ? TGSI_WRITEMASK_Y + : TGSI_WRITEMASK_Z); + + /* temp1.y/z = layer */ + ureg_MOV(ureg, temp1_layer, ureg_scalar(layer, TGSI_SWIZZLE_X)); + + if (target == PIPE_TEXTURE_3D) { + /* temp1.z += layer_offset */ + ureg_UADD(ureg, temp1_layer, + ureg_scalar(ureg_src(temp1), TGSI_SWIZZLE_Z), + ureg_scalar(const1, TGSI_SWIZZLE_X)); + } + } + + /* temp1 = txf(sampler, temp1) */ + ureg_TXF(ureg, temp1, util_pipe_tex_to_tgsi_tex(target, 1), + ureg_src(temp1), sampler); + + build_conversion(ureg, &temp1, conversion); + + /* store(out, temp0, temp1) */ + op[0] = ureg_src(temp0); + op[1] = ureg_src(temp1); + ureg_memory_insn(ureg, TGSI_OPCODE_STORE, &out, 1, op, 2, 0, + TGSI_TEXTURE_BUFFER, PIPE_FORMAT_NONE); + + ureg_release_temporary(ureg, temp1); + } else { + /* out = txf(sampler, temp0.x) */ + ureg_TXF(ureg, temp0, TGSI_TEXTURE_BUFFER, ureg_src(temp0), sampler); + + build_conversion(ureg, &temp0, conversion); + + ureg_MOV(ureg, out, ureg_src(temp0)); + } + + ureg_release_temporary(ureg, temp0); + + ureg_END(ureg); + + return ureg_create_shader_and_destroy(ureg, pipe); +} + +static enum st_pbo_conversion +get_pbo_conversion(enum pipe_format src_format, enum pipe_format dst_format) +{ + if (util_format_is_pure_uint(src_format)) { + if (util_format_is_pure_sint(dst_format)) + return ST_PBO_CONVERT_UINT_TO_SINT; + } else if (util_format_is_pure_sint(src_format)) { + if (util_format_is_pure_uint(dst_format)) + return ST_PBO_CONVERT_SINT_TO_UINT; + } + + return ST_PBO_CONVERT_NONE; +} + +void * +st_pbo_get_upload_fs(struct st_context *st, + enum pipe_format src_format, + enum pipe_format dst_format) +{ + STATIC_ASSERT(ARRAY_SIZE(st->pbo.upload_fs) == ST_NUM_PBO_CONVERSIONS); + + enum st_pbo_conversion conversion = get_pbo_conversion(src_format, dst_format); + + if (!st->pbo.upload_fs[conversion]) + st->pbo.upload_fs[conversion] = create_fs(st, false, 0, conversion); + + return st->pbo.upload_fs[conversion]; +} + +void * +st_pbo_get_download_fs(struct st_context *st, enum pipe_texture_target target, + enum pipe_format src_format, + enum pipe_format dst_format) +{ + STATIC_ASSERT(ARRAY_SIZE(st->pbo.download_fs) == ST_NUM_PBO_CONVERSIONS); + assert(target < PIPE_MAX_TEXTURE_TYPES); + + enum st_pbo_conversion conversion = get_pbo_conversion(src_format, dst_format); + + if (!st->pbo.download_fs[conversion][target]) + st->pbo.download_fs[conversion][target] = create_fs(st, true, target, conversion); + + return st->pbo.download_fs[conversion][target]; +} + +void +st_init_pbo_helpers(struct st_context *st) +{ + struct pipe_context *pipe = st->pipe; + struct pipe_screen *screen = pipe->screen; + + st->pbo.upload_enabled = + screen->get_param(screen, PIPE_CAP_TEXTURE_BUFFER_OBJECTS) && + screen->get_param(screen, PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT) >= 1 && + screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT, PIPE_SHADER_CAP_INTEGERS); + if (!st->pbo.upload_enabled) + return; + + st->pbo.download_enabled = + st->pbo.upload_enabled && + screen->get_param(screen, PIPE_CAP_SAMPLER_VIEW_TARGET) && + screen->get_param(screen, PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT) && + screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT, + PIPE_SHADER_CAP_MAX_SHADER_IMAGES) >= 1; + + st->pbo.rgba_only = + screen->get_param(screen, PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY); + + if (screen->get_param(screen, PIPE_CAP_TGSI_INSTANCEID)) { + if (screen->get_param(screen, PIPE_CAP_TGSI_VS_LAYER_VIEWPORT)) { + st->pbo.layers = true; + } else if (screen->get_param(screen, PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES) >= 3) { + st->pbo.layers = true; + st->pbo.use_gs = true; + } + } + + /* Blend state */ + memset(&st->pbo.upload_blend, 0, sizeof(struct pipe_blend_state)); + st->pbo.upload_blend.rt[0].colormask = PIPE_MASK_RGBA; + + /* Rasterizer state */ + memset(&st->pbo.raster, 0, sizeof(struct pipe_rasterizer_state)); + st->pbo.raster.half_pixel_center = 1; +} + +void +st_destroy_pbo_helpers(struct st_context *st) +{ + unsigned i; + + for (i = 0; i < ARRAY_SIZE(st->pbo.upload_fs); ++i) { + if (st->pbo.upload_fs[i]) { + cso_delete_fragment_shader(st->cso_context, st->pbo.upload_fs[i]); + st->pbo.upload_fs[i] = NULL; + } + } + + for (i = 0; i < ARRAY_SIZE(st->pbo.download_fs); ++i) { + for (unsigned j = 0; j < ARRAY_SIZE(st->pbo.download_fs[0]); ++j) { + if (st->pbo.download_fs[i][j]) { + cso_delete_fragment_shader(st->cso_context, st->pbo.download_fs[i][j]); + st->pbo.download_fs[i][j] = NULL; + } + } + } + + if (st->pbo.gs) { + cso_delete_geometry_shader(st->cso_context, st->pbo.gs); + st->pbo.gs = NULL; + } + + if (st->pbo.vs) { + cso_delete_vertex_shader(st->cso_context, st->pbo.vs); + st->pbo.vs = NULL; + } +} diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_pbo.h mesa-17.0.7/src/mesa/state_tracker/st_pbo.h --- mesa-12.0.6/src/mesa/state_tracker/st_pbo.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_pbo.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,103 @@ +/* + * Copyright 2016 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef ST_PBO_H +#define ST_PBO_H + +struct gl_pixelstore_attrib; + +struct st_context; + +struct st_pbo_addresses { + int xoffset; + int yoffset; + unsigned width; + unsigned height; + unsigned depth; + + unsigned bytes_per_pixel; + + /* Everything below is filled in by st_pbo_from_pixelstore */ + unsigned pixels_per_row; + unsigned image_height; + + /* Everything below is filled in by st_pbo_setup_buffer */ + + /* Buffer and view. */ + struct pipe_resource *buffer; /* non-owning pointer */ + unsigned first_element; + unsigned last_element; + + /* Constant buffer for the fragment shader. */ + struct { + int32_t xoffset; + int32_t yoffset; + int32_t stride; + int32_t image_size; + int32_t layer_offset; + } constants; +}; + +bool +st_pbo_addresses_setup(struct st_context *st, + struct pipe_resource *buf, intptr_t buf_offset, + struct st_pbo_addresses *addr); + +bool +st_pbo_addresses_pixelstore(struct st_context *st, + GLenum gl_target, bool skip_images, + const struct gl_pixelstore_attrib *store, + const void *pixels, + struct st_pbo_addresses *addr); + +void +st_pbo_addresses_invert_y(struct st_pbo_addresses *addr, + unsigned viewport_height); + +bool +st_pbo_draw(struct st_context *st, const struct st_pbo_addresses *addr, + unsigned surface_width, unsigned surface_height); + +void * +st_pbo_create_vs(struct st_context *st); + +void * +st_pbo_create_gs(struct st_context *st); + +void * +st_pbo_get_upload_fs(struct st_context *st, + enum pipe_format src_format, + enum pipe_format dst_format); + +void * +st_pbo_get_download_fs(struct st_context *st, enum pipe_texture_target target, + enum pipe_format src_format, + enum pipe_format dst_format); + +extern void +st_init_pbo_helpers(struct st_context *st); + +extern void +st_destroy_pbo_helpers(struct st_context *st); + +#endif /* ST_PBO_H */ diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_program.c mesa-17.0.7/src/mesa/state_tracker/st_program.c --- mesa-12.0.6/src/mesa/state_tracker/st_program.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_program.c 2017-06-01 10:37:10.000000000 +0000 @@ -53,6 +53,7 @@ #include "st_cb_bitmap.h" #include "st_cb_drawpixels.h" #include "st_context.h" +#include "st_tgsi_lower_yuv.h" #include "st_program.h" #include "st_mesa_to_tgsi.h" #include "st_atifs_to_tgsi.h" @@ -210,7 +211,7 @@ for (v = *variants; v; ) { struct st_basic_variant *next = v->next; - delete_basic_variant(st, v, stcp->Base.Base.Target); + delete_basic_variant(st, v, stcp->Base.Target); v = next; } @@ -241,7 +242,7 @@ stvp->num_inputs = 0; - if (stvp->Base.IsPositionInvariant) + if (stvp->Base.arb.IsPositionInvariant) _mesa_insert_mvp_code(st->ctx, &stvp->Base); /* @@ -249,11 +250,12 @@ * and TGSI generic input indexes, plus input attrib semantic info. */ for (attr = 0; attr < VERT_ATTRIB_MAX; attr++) { - if ((stvp->Base.Base.InputsRead & BITFIELD64_BIT(attr)) != 0) { + if ((stvp->Base.info.inputs_read & BITFIELD64_BIT(attr)) != 0) { input_to_index[attr] = stvp->num_inputs; stvp->index_to_input[stvp->num_inputs] = attr; stvp->num_inputs++; - if ((stvp->Base.Base.DoubleInputsRead & BITFIELD64_BIT(attr)) != 0) { + if ((stvp->Base.info.double_inputs_read & + BITFIELD64_BIT(attr)) != 0) { /* add placeholder for second part of a double attribute */ stvp->index_to_input[stvp->num_inputs] = ST_DOUBLE_ATTRIB_PLACEHOLDER; stvp->num_inputs++; @@ -267,7 +269,7 @@ /* Compute mapping of vertex program outputs to slots. */ for (attr = 0; attr < VARYING_SLOT_MAX; attr++) { - if ((stvp->Base.Base.OutputsWritten & BITFIELD64_BIT(attr)) == 0) { + if ((stvp->Base.info.outputs_written & BITFIELD64_BIT(attr)) == 0) { stvp->result_to_output[attr] = ~0; } else { @@ -364,18 +366,31 @@ output_semantic_name[num_outputs] = TGSI_SEMANTIC_EDGEFLAG; output_semantic_index[num_outputs] = 0; - if (!stvp->glsl_to_tgsi && !stvp->shader_program) - _mesa_remove_output_reads(&stvp->Base.Base, PROGRAM_OUTPUT); + /* ARB_vp: */ + if (!stvp->glsl_to_tgsi && !stvp->shader_program) { + _mesa_remove_output_reads(&stvp->Base, PROGRAM_OUTPUT); + + /* This determines which states will be updated when the assembly + * shader is bound. + */ + stvp->affected_states = ST_NEW_VS_STATE | + ST_NEW_RASTERIZER | + ST_NEW_VERTEX_ARRAYS; + + if (stvp->Base.Parameters->NumParameters) + stvp->affected_states |= ST_NEW_VS_CONSTANTS; + + /* No samplers are allowed in ARB_vp. */ + } if (stvp->shader_program) { - nir_shader *nir = st_glsl_to_nir(st, &stvp->Base.Base, - stvp->shader_program, + nir_shader *nir = st_glsl_to_nir(st, &stvp->Base, stvp->shader_program, MESA_SHADER_VERTEX); stvp->tgsi.type = PIPE_SHADER_IR_NIR; stvp->tgsi.ir.nir = nir; - st_translate_stream_output_info2(&stvp->shader_program->LinkedTransformFeedback, + st_translate_stream_output_info2(stvp->shader_program->xfb_program->sh.LinkedTransformFeedback, stvp->result_to_output, &stvp->tgsi.stream_output); return true; @@ -385,16 +400,16 @@ if (ureg == NULL) return false; - if (stvp->Base.Base.ClipDistanceArraySize) + if (stvp->Base.ClipDistanceArraySize) ureg_property(ureg, TGSI_PROPERTY_NUM_CLIPDIST_ENABLED, - stvp->Base.Base.ClipDistanceArraySize); - if (stvp->Base.Base.CullDistanceArraySize) + stvp->Base.ClipDistanceArraySize); + if (stvp->Base.CullDistanceArraySize) ureg_property(ureg, TGSI_PROPERTY_NUM_CULLDIST_ENABLED, - stvp->Base.Base.CullDistanceArraySize); + stvp->Base.CullDistanceArraySize); if (ST_DEBUG & DEBUG_MESA) { - _mesa_print_program(&stvp->Base.Base); - _mesa_print_program_parameters(st->ctx, &stvp->Base.Base); + _mesa_print_program(&stvp->Base); + _mesa_print_program_parameters(st->ctx, &stvp->Base); debug_printf("\n"); } @@ -403,7 +418,7 @@ PIPE_SHADER_VERTEX, ureg, stvp->glsl_to_tgsi, - &stvp->Base.Base, + &stvp->Base, /* inputs */ stvp->num_inputs, input_to_index, @@ -411,7 +426,6 @@ NULL, /* input semantic name */ NULL, /* input semantic index */ NULL, /* interp mode */ - NULL, /* interp location */ /* outputs */ num_outputs, stvp->result_to_output, @@ -429,7 +443,7 @@ error = st_translate_mesa_program(st->ctx, PIPE_SHADER_VERTEX, ureg, - &stvp->Base.Base, + &stvp->Base, /* inputs */ stvp->num_inputs, input_to_index, @@ -444,7 +458,7 @@ if (error) { debug_printf("%s: failed to translate Mesa program:\n", __func__); - _mesa_print_program(&stvp->Base.Base); + _mesa_print_program(&stvp->Base); debug_assert(0); return false; } @@ -474,7 +488,7 @@ if (key->passthrough_edgeflags) NIR_PASS_V(vpv->tgsi.ir.nir, nir_lower_passthrough_edgeflags); - st_finalize_nir(st, &stvp->Base.Base, vpv->tgsi.ir.nir); + st_finalize_nir(st, &stvp->Base, vpv->tgsi.ir.nir); vpv->driver_shader = pipe->create_vs_state(pipe, &vpv->tgsi); /* driver takes ownership of IR: */ @@ -544,27 +558,6 @@ } -static unsigned -st_translate_interp(enum glsl_interp_qualifier glsl_qual, bool is_color) -{ - switch (glsl_qual) { - case INTERP_QUALIFIER_NONE: - if (is_color) - return TGSI_INTERPOLATE_COLOR; - return TGSI_INTERPOLATE_PERSPECTIVE; - case INTERP_QUALIFIER_SMOOTH: - return TGSI_INTERPOLATE_PERSPECTIVE; - case INTERP_QUALIFIER_FLAT: - return TGSI_INTERPOLATE_CONSTANT; - case INTERP_QUALIFIER_NOPERSPECTIVE: - return TGSI_INTERPOLATE_LINEAR; - default: - assert(0 && "unexpected interp mode in st_translate_interp()"); - return TGSI_INTERPOLATE_PERSPECTIVE; - } -} - - /** * Translate a Mesa fragment shader into a TGSI shader. */ @@ -572,11 +565,10 @@ st_translate_fragment_program(struct st_context *st, struct st_fragment_program *stfp) { - GLuint outputMapping[FRAG_RESULT_MAX]; + GLuint outputMapping[2 * FRAG_RESULT_MAX]; GLuint inputMapping[VARYING_SLOT_MAX]; GLuint inputSlotToAttr[VARYING_SLOT_MAX]; GLuint interpMode[PIPE_MAX_SHADER_INPUTS]; /* XXX size? */ - GLuint interpLocation[PIPE_MAX_SHADER_INPUTS]; GLuint attr; GLbitfield64 inputsRead; struct ureg_program *ureg; @@ -593,28 +585,43 @@ memset(inputSlotToAttr, ~0, sizeof(inputSlotToAttr)); + /* Non-GLSL programs: */ if (!stfp->glsl_to_tgsi && !stfp->shader_program) { - _mesa_remove_output_reads(&stfp->Base.Base, PROGRAM_OUTPUT); + _mesa_remove_output_reads(&stfp->Base, PROGRAM_OUTPUT); if (st->ctx->Const.GLSLFragCoordIsSysVal) - _mesa_program_fragment_position_to_sysval(&stfp->Base.Base); + _mesa_program_fragment_position_to_sysval(&stfp->Base); + + /* This determines which states will be updated when the assembly + * shader is bound. + * + * fragment.position and glDrawPixels always use constants. + */ + stfp->affected_states = ST_NEW_FS_STATE | + ST_NEW_SAMPLE_SHADING | + ST_NEW_FS_CONSTANTS; + + if (stfp->ati_fs) { + /* Just set them for ATI_fs unconditionally. */ + stfp->affected_states |= ST_NEW_FS_SAMPLER_VIEWS | + ST_NEW_RENDER_SAMPLERS; + } else { + /* ARB_fp */ + if (stfp->Base.SamplersUsed) + stfp->affected_states |= ST_NEW_FS_SAMPLER_VIEWS | + ST_NEW_RENDER_SAMPLERS; + } } /* * Convert Mesa program inputs to TGSI input register semantics. */ - inputsRead = stfp->Base.Base.InputsRead; + inputsRead = stfp->Base.info.inputs_read; for (attr = 0; attr < VARYING_SLOT_MAX; attr++) { if ((inputsRead & BITFIELD64_BIT(attr)) != 0) { const GLuint slot = fs_num_inputs++; inputMapping[attr] = slot; inputSlotToAttr[slot] = attr; - if (stfp->Base.IsCentroid & BITFIELD64_BIT(attr)) - interpLocation[slot] = TGSI_INTERPOLATE_LOC_CENTROID; - else if (stfp->Base.IsSample & BITFIELD64_BIT(attr)) - interpLocation[slot] = TGSI_INTERPOLATE_LOC_SAMPLE; - else - interpLocation[slot] = TGSI_INTERPOLATE_LOC_CENTER; switch (attr) { case VARYING_SLOT_POS: @@ -625,14 +632,14 @@ case VARYING_SLOT_COL0: input_semantic_name[slot] = TGSI_SEMANTIC_COLOR; input_semantic_index[slot] = 0; - interpMode[slot] = st_translate_interp(stfp->Base.InterpQualifier[attr], - TRUE); + interpMode[slot] = stfp->glsl_to_tgsi ? + TGSI_INTERPOLATE_COUNT : TGSI_INTERPOLATE_COLOR; break; case VARYING_SLOT_COL1: input_semantic_name[slot] = TGSI_SEMANTIC_COLOR; input_semantic_index[slot] = 1; - interpMode[slot] = st_translate_interp(stfp->Base.InterpQualifier[attr], - TRUE); + interpMode[slot] = stfp->glsl_to_tgsi ? + TGSI_INTERPOLATE_COUNT : TGSI_INTERPOLATE_COLOR; break; case VARYING_SLOT_FOGC: input_semantic_name[slot] = TGSI_SEMANTIC_FOG; @@ -708,8 +715,8 @@ if (st->needs_texcoord_semantic) { input_semantic_name[slot] = TGSI_SEMANTIC_TEXCOORD; input_semantic_index[slot] = attr - VARYING_SLOT_TEX0; - interpMode[slot] = - st_translate_interp(stfp->Base.InterpQualifier[attr], FALSE); + interpMode[slot] = stfp->glsl_to_tgsi ? + TGSI_INTERPOLATE_COUNT : TGSI_INTERPOLATE_PERSPECTIVE; break; } /* fall through */ @@ -731,9 +738,10 @@ input_semantic_index[slot] = st_get_generic_varying_index(st, attr); if (attr == VARYING_SLOT_PNTC) interpMode[slot] = TGSI_INTERPOLATE_LINEAR; - else - interpMode[slot] = st_translate_interp(stfp->Base.InterpQualifier[attr], - FALSE); + else { + interpMode[slot] = stfp->glsl_to_tgsi ? + TGSI_INTERPOLATE_COUNT : TGSI_INTERPOLATE_PERSPECTIVE; + } break; } } @@ -746,8 +754,7 @@ * Semantics and mapping for outputs */ { - uint numColors = 0; - GLbitfield64 outputsWritten = stfp->Base.Base.OutputsWritten; + GLbitfield64 outputsWritten = stfp->Base.info.outputs_written; /* if z is written, emit that first */ if (outputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) { @@ -775,9 +782,13 @@ } /* handle remaining outputs (color) */ - for (attr = 0; attr < FRAG_RESULT_MAX; attr++) { - if (outputsWritten & BITFIELD64_BIT(attr)) { - switch (attr) { + for (attr = 0; attr < ARRAY_SIZE(outputMapping); attr++) { + const GLbitfield64 written = attr < FRAG_RESULT_MAX ? outputsWritten : + stfp->Base.SecondaryOutputsWritten; + const unsigned loc = attr % FRAG_RESULT_MAX; + + if (written & BITFIELD64_BIT(loc)) { + switch (loc) { case FRAG_RESULT_DEPTH: case FRAG_RESULT_STENCIL: case FRAG_RESULT_SAMPLE_MASK: @@ -786,15 +797,25 @@ break; case FRAG_RESULT_COLOR: write_all = GL_TRUE; /* fallthrough */ - default: - assert(attr == FRAG_RESULT_COLOR || - (FRAG_RESULT_DATA0 <= attr && attr < FRAG_RESULT_MAX)); + default: { + int index; + assert(loc == FRAG_RESULT_COLOR || + (FRAG_RESULT_DATA0 <= loc && loc < FRAG_RESULT_MAX)); + + index = (loc == FRAG_RESULT_COLOR) ? 0 : (loc - FRAG_RESULT_DATA0); + + if (attr >= FRAG_RESULT_MAX) { + /* Secondary color for dual source blending. */ + assert(index == 0); + index++; + } + fs_output_semantic_name[fs_num_outputs] = TGSI_SEMANTIC_COLOR; - fs_output_semantic_index[fs_num_outputs] = numColors; + fs_output_semantic_index[fs_num_outputs] = index; outputMapping[attr] = fs_num_outputs; - numColors++; break; } + } fs_num_outputs++; } @@ -802,8 +823,7 @@ } if (stfp->shader_program) { - nir_shader *nir = st_glsl_to_nir(st, &stfp->Base.Base, - stfp->shader_program, + nir_shader *nir = st_glsl_to_nir(st, &stfp->Base, stfp->shader_program, MESA_SHADER_FRAGMENT); stfp->tgsi.type = PIPE_SHADER_IR_NIR; @@ -817,15 +837,15 @@ return false; if (ST_DEBUG & DEBUG_MESA) { - _mesa_print_program(&stfp->Base.Base); - _mesa_print_program_parameters(st->ctx, &stfp->Base.Base); + _mesa_print_program(&stfp->Base); + _mesa_print_program_parameters(st->ctx, &stfp->Base); debug_printf("\n"); } if (write_all == GL_TRUE) ureg_property(ureg, TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS, 1); - if (stfp->Base.FragDepthLayout != FRAG_DEPTH_LAYOUT_NONE) { - switch (stfp->Base.FragDepthLayout) { + if (stfp->Base.info.fs.depth_layout != FRAG_DEPTH_LAYOUT_NONE) { + switch (stfp->Base.info.fs.depth_layout) { case FRAG_DEPTH_LAYOUT_ANY: ureg_property(ureg, TGSI_PROPERTY_FS_DEPTH_LAYOUT, TGSI_FS_DEPTH_LAYOUT_ANY); @@ -852,7 +872,7 @@ PIPE_SHADER_FRAGMENT, ureg, stfp->glsl_to_tgsi, - &stfp->Base.Base, + &stfp->Base, /* inputs */ fs_num_inputs, inputMapping, @@ -860,7 +880,6 @@ input_semantic_name, input_semantic_index, interpMode, - interpLocation, /* outputs */ fs_num_outputs, outputMapping, @@ -873,7 +892,7 @@ } else if (stfp->ati_fs) st_translate_atifs_program(ureg, stfp->ati_fs, - &stfp->Base.Base, + &stfp->Base, /* inputs */ fs_num_inputs, inputMapping, @@ -889,7 +908,7 @@ st_translate_mesa_program(st->ctx, PIPE_SHADER_FRAGMENT, ureg, - &stfp->Base.Base, + &stfp->Base, /* inputs */ fs_num_inputs, inputMapping, @@ -915,7 +934,7 @@ struct pipe_context *pipe = st->pipe; struct st_fp_variant *variant = CALLOC_STRUCT(st_fp_variant); struct pipe_shader_state tgsi = {0}; - struct gl_program_parameter_list *params = stfp->Base.Base.Parameters; + struct gl_program_parameter_list *params = stfp->Base.Parameters; static const gl_state_index texcoord_state[STATE_LENGTH] = { STATE_INTERNAL, STATE_CURRENT_ATTRIB, VERT_ATTRIB_TEX0 }; static const gl_state_index scale_state[STATE_LENGTH] = @@ -945,7 +964,7 @@ if (key->bitmap) { nir_lower_bitmap_options options = {0}; - variant->bitmap_sampler = ffs(~stfp->Base.Base.SamplersUsed) - 1; + variant->bitmap_sampler = ffs(~stfp->Base.SamplersUsed) - 1; options.sampler = variant->bitmap_sampler; options.swizzle_xxxx = (st->bitmap.tex_format == PIPE_FORMAT_L8_UNORM); @@ -954,8 +973,8 @@ /* glDrawPixels (color only) */ if (key->drawpixels) { - nir_lower_drawpixels_options options = {0}; - unsigned samplers_used = stfp->Base.Base.SamplersUsed; + nir_lower_drawpixels_options options = {{0}}; + unsigned samplers_used = stfp->Base.SamplersUsed; /* Find the first unused slot. */ variant->drawpix_sampler = ffs(~samplers_used) - 1; @@ -985,7 +1004,22 @@ NIR_PASS_V(tgsi.ir.nir, nir_lower_drawpixels, &options); } - st_finalize_nir(st, &stfp->Base.Base, tgsi.ir.nir); + if (unlikely(key->external.lower_nv12 || key->external.lower_iyuv)) { + nir_lower_tex_options options = {0}; + options.lower_y_uv_external = key->external.lower_nv12; + options.lower_y_u_v_external = key->external.lower_iyuv; + NIR_PASS_V(tgsi.ir.nir, nir_lower_tex, &options); + } + + st_finalize_nir(st, &stfp->Base, tgsi.ir.nir); + + if (unlikely(key->external.lower_nv12 || key->external.lower_iyuv)) { + /* This pass needs to happen *after* nir_lower_sampler */ + NIR_PASS_V(tgsi.ir.nir, st_nir_lower_tex_src_plane, + ~stfp->Base.SamplersUsed, + key->external.lower_nv12, + key->external.lower_iyuv); + } variant->driver_shader = pipe->create_fs_state(pipe, &tgsi); variant->key = *key; @@ -1028,7 +1062,7 @@ if (key->bitmap) { const struct tgsi_token *tokens; - variant->bitmap_sampler = ffs(~stfp->Base.Base.SamplersUsed) - 1; + variant->bitmap_sampler = ffs(~stfp->Base.SamplersUsed) - 1; tokens = st_get_bitmap_shader(tgsi.tokens, st->internal_target, @@ -1051,10 +1085,10 @@ unsigned scale_const = 0, bias_const = 0, texcoord_const = 0; /* Find the first unused slot. */ - variant->drawpix_sampler = ffs(~stfp->Base.Base.SamplersUsed) - 1; + variant->drawpix_sampler = ffs(~stfp->Base.SamplersUsed) - 1; if (key->pixelMaps) { - unsigned samplers_used = stfp->Base.Base.SamplersUsed | + unsigned samplers_used = stfp->Base.SamplersUsed | (1 << variant->drawpix_sampler); variant->pixelmap_sampler = ffs(~samplers_used) - 1; @@ -1083,6 +1117,25 @@ fprintf(stderr, "mesa: cannot create a shader for glDrawPixels\n"); } + if (unlikely(key->external.lower_nv12 || key->external.lower_iyuv)) { + const struct tgsi_token *tokens; + + /* samplers inserted would conflict, but this should be unpossible: */ + assert(!(key->bitmap || key->drawpixels)); + + tokens = st_tgsi_lower_yuv(tgsi.tokens, + ~stfp->Base.SamplersUsed, + key->external.lower_nv12, + key->external.lower_iyuv); + if (tokens) { + if (tgsi.tokens != stfp->tgsi.tokens) + tgsi_free_tokens(tgsi.tokens); + tgsi.tokens = tokens; + } else { + fprintf(stderr, "mesa: cannot create a shader for samplerExternalOES\n"); + } + } + if (ST_DEBUG & DEBUG_TGSI) { tgsi_dump(tgsi.tokens, 0); debug_printf("\n"); @@ -1173,7 +1226,7 @@ * Convert Mesa program inputs to TGSI input register semantics. */ for (attr = 0; attr < VARYING_SLOT_MAX; attr++) { - if ((prog->InputsRead & BITFIELD64_BIT(attr)) != 0) { + if ((prog->info.inputs_read & BITFIELD64_BIT(attr)) != 0) { const GLuint slot = num_inputs++; inputMapping[attr] = slot; @@ -1250,7 +1303,7 @@ /* Also add patch inputs. */ for (attr = 0; attr < 32; attr++) { - if (prog->PatchInputsRead & (1u << attr)) { + if (prog->info.patch_inputs_read & (1u << attr)) { GLuint slot = num_inputs++; GLuint patch_attr = VARYING_SLOT_PATCH0 + attr; @@ -1272,7 +1325,7 @@ * mapping and the semantic information for each output. */ for (attr = 0; attr < VARYING_SLOT_MAX; attr++) { - if (prog->OutputsWritten & BITFIELD64_BIT(attr)) { + if (prog->info.outputs_written & BITFIELD64_BIT(attr)) { GLuint slot = num_outputs++; outputMapping[attr] = slot; @@ -1374,7 +1427,7 @@ /* Also add patch outputs. */ for (attr = 0; attr < 32; attr++) { - if (prog->PatchOutputsWritten & (1u << attr)) { + if (prog->info.patch_outputs_written & (1u << attr)) { GLuint slot = num_outputs++; GLuint patch_attr = VARYING_SLOT_PATCH0 + attr; @@ -1397,7 +1450,6 @@ input_semantic_name, input_semantic_index, NULL, - NULL, /* outputs */ num_outputs, outputMapping, @@ -1437,13 +1489,16 @@ if (ureg == NULL) return false; - ureg_property(ureg, TGSI_PROPERTY_GS_INPUT_PRIM, stgp->Base.InputType); - ureg_property(ureg, TGSI_PROPERTY_GS_OUTPUT_PRIM, stgp->Base.OutputType); + ureg_property(ureg, TGSI_PROPERTY_GS_INPUT_PRIM, + stgp->Base.info.gs.input_primitive); + ureg_property(ureg, TGSI_PROPERTY_GS_OUTPUT_PRIM, + stgp->Base.info.gs.output_primitive); ureg_property(ureg, TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES, - stgp->Base.VerticesOut); - ureg_property(ureg, TGSI_PROPERTY_GS_INVOCATIONS, stgp->Base.Invocations); + stgp->Base.info.gs.vertices_out); + ureg_property(ureg, TGSI_PROPERTY_GS_INVOCATIONS, + stgp->Base.info.gs.invocations); - st_translate_program_common(st, &stgp->Base.Base, stgp->glsl_to_tgsi, ureg, + st_translate_program_common(st, &stgp->Base, stgp->glsl_to_tgsi, ureg, PIPE_SHADER_GEOMETRY, &stgp->tgsi); free_glsl_to_tgsi_visitor(stgp->glsl_to_tgsi); @@ -1522,10 +1577,10 @@ return false; ureg_property(ureg, TGSI_PROPERTY_TCS_VERTICES_OUT, - sttcp->Base.VerticesOut); + sttcp->Base.info.tess.tcs_vertices_out); - st_translate_program_common(st, &sttcp->Base.Base, sttcp->glsl_to_tgsi, - ureg, PIPE_SHADER_TESS_CTRL, &sttcp->tgsi); + st_translate_program_common(st, &sttcp->Base, sttcp->glsl_to_tgsi, ureg, + PIPE_SHADER_TESS_CTRL, &sttcp->tgsi); free_glsl_to_tgsi_visitor(sttcp->glsl_to_tgsi); sttcp->glsl_to_tgsi = NULL; @@ -1546,32 +1601,27 @@ if (ureg == NULL) return false; - if (sttep->Base.PrimitiveMode == GL_ISOLINES) + if (sttep->Base.info.tess.primitive_mode == GL_ISOLINES) ureg_property(ureg, TGSI_PROPERTY_TES_PRIM_MODE, GL_LINES); else - ureg_property(ureg, TGSI_PROPERTY_TES_PRIM_MODE, sttep->Base.PrimitiveMode); + ureg_property(ureg, TGSI_PROPERTY_TES_PRIM_MODE, + sttep->Base.info.tess.primitive_mode); - switch (sttep->Base.Spacing) { - case GL_EQUAL: - ureg_property(ureg, TGSI_PROPERTY_TES_SPACING, PIPE_TESS_SPACING_EQUAL); - break; - case GL_FRACTIONAL_EVEN: - ureg_property(ureg, TGSI_PROPERTY_TES_SPACING, - PIPE_TESS_SPACING_FRACTIONAL_EVEN); - break; - case GL_FRACTIONAL_ODD: - ureg_property(ureg, TGSI_PROPERTY_TES_SPACING, - PIPE_TESS_SPACING_FRACTIONAL_ODD); - break; - default: - assert(0); - } + STATIC_ASSERT((TESS_SPACING_EQUAL + 1) % 3 == PIPE_TESS_SPACING_EQUAL); + STATIC_ASSERT((TESS_SPACING_FRACTIONAL_ODD + 1) % 3 == + PIPE_TESS_SPACING_FRACTIONAL_ODD); + STATIC_ASSERT((TESS_SPACING_FRACTIONAL_EVEN + 1) % 3 == + PIPE_TESS_SPACING_FRACTIONAL_EVEN); + + ureg_property(ureg, TGSI_PROPERTY_TES_SPACING, + (sttep->Base.info.tess.spacing + 1) % 3); ureg_property(ureg, TGSI_PROPERTY_TES_VERTEX_ORDER_CW, - sttep->Base.VertexOrder == GL_CW); - ureg_property(ureg, TGSI_PROPERTY_TES_POINT_MODE, sttep->Base.PointMode); + !sttep->Base.info.tess.ccw); + ureg_property(ureg, TGSI_PROPERTY_TES_POINT_MODE, + sttep->Base.info.tess.point_mode); - st_translate_program_common(st, &sttep->Base.Base, sttep->glsl_to_tgsi, + st_translate_program_common(st, &sttep->Base, sttep->glsl_to_tgsi, ureg, PIPE_SHADER_TESS_EVAL, &sttep->tgsi); free_glsl_to_tgsi_visitor(sttep->glsl_to_tgsi); @@ -1594,12 +1644,12 @@ if (ureg == NULL) return false; - st_translate_program_common(st, &stcp->Base.Base, stcp->glsl_to_tgsi, ureg, + st_translate_program_common(st, &stcp->Base, stcp->glsl_to_tgsi, ureg, PIPE_SHADER_COMPUTE, &prog); stcp->tgsi.ir_type = PIPE_SHADER_IR_TGSI; stcp->tgsi.prog = prog.tokens; - stcp->tgsi.req_local_mem = stcp->Base.SharedSize; + stcp->tgsi.req_local_mem = stcp->Base.info.cs.shared_size; stcp->tgsi.req_private_mem = 0; stcp->tgsi.req_input_mem = 0; @@ -1756,10 +1806,6 @@ struct gl_shader_program *shProg = (struct gl_shader_program *) data; GLuint i; - for (i = 0; i < shProg->NumShaders; i++) { - destroy_program_variants(st, shProg->Shaders[i]->Program); - } - for (i = 0; i < ARRAY_SIZE(shProg->_LinkedShaders); i++) { if (shProg->_LinkedShaders[i]) destroy_program_variants(st, shProg->_LinkedShaders[i]->Program); @@ -1772,9 +1818,6 @@ case GL_TESS_CONTROL_SHADER: case GL_TESS_EVALUATION_SHADER: case GL_COMPUTE_SHADER: - { - destroy_program_variants(st, shader->Program); - } break; default: assert(0); @@ -1832,7 +1875,7 @@ (struct st_vertex_program *) ctx->VertexProgram._Current; struct st_vp_variant *stv; - debug_printf("Vertex program %u\n", stvp->Base.Base.Id); + debug_printf("Vertex program %u\n", stvp->Base.Id); for (stv = stvp->variants; stv; stv = stv->next) { debug_printf("variant %p\n", stv); diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_program.h mesa-17.0.7/src/mesa/state_tracker/st_program.h --- mesa-12.0.6/src/mesa/state_tracker/st_program.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_program.h 2017-06-01 10:37:10.000000000 +0000 @@ -39,6 +39,7 @@ #include "program/program.h" #include "pipe/p_state.h" #include "st_context.h" +#include "st_texture.h" #include "st_glsl_to_tgsi.h" @@ -48,6 +49,40 @@ #define ST_DOUBLE_ATTRIB_PLACEHOLDER 0xffffffff +struct st_external_sampler_key +{ + GLuint lower_nv12; /**< bitmask of 2 plane YUV samplers */ + GLuint lower_iyuv; /**< bitmask of 3 plane YUV samplers */ +}; + +static inline struct st_external_sampler_key +st_get_external_sampler_key(struct st_context *st, struct gl_program *prog) +{ + unsigned mask = prog->ExternalSamplersUsed; + struct st_external_sampler_key key; + + memset(&key, 0, sizeof(key)); + + while (unlikely(mask)) { + unsigned unit = u_bit_scan(&mask); + struct st_texture_object *stObj = + st_get_texture_object(st->ctx, prog, unit); + + switch (st_get_view_format(stObj)) { + case PIPE_FORMAT_NV12: + key.lower_nv12 |= (1 << unit); + break; + case PIPE_FORMAT_IYUV: + key.lower_iyuv |= (1 << unit); + break; + default: + break; + } + } + + return key; +} + /** Fragment program variant key */ struct st_fp_variant_key { @@ -72,6 +107,8 @@ /** needed for ATI_fragment_shader */ char texture_targets[MAX_NUM_FRAGMENT_REGISTERS_ATI]; + + struct st_external_sampler_key external; }; @@ -99,14 +136,15 @@ /** - * Derived from Mesa gl_fragment_program: + * Derived from Mesa gl_program: */ struct st_fragment_program { - struct gl_fragment_program Base; + struct gl_program Base; struct pipe_shader_state tgsi; struct glsl_to_tgsi_visitor* glsl_to_tgsi; struct ati_fragment_shader *ati_fs; + uint64_t affected_states; /**< ST_NEW_* flags to mark dirty when binding */ /* used when bypassing glsl_to_tgsi: */ struct gl_shader_program *shader_program; @@ -159,13 +197,14 @@ /** - * Derived from Mesa gl_fragment_program: + * Derived from Mesa gl_program: */ struct st_vertex_program { - struct gl_vertex_program Base; /**< The Mesa vertex program */ + struct gl_program Base; /**< The Mesa vertex program */ struct pipe_shader_state tgsi; struct glsl_to_tgsi_visitor* glsl_to_tgsi; + uint64_t affected_states; /**< ST_NEW_* flags to mark dirty when binding */ /* used when bypassing glsl_to_tgsi: */ struct gl_shader_program *shader_program; @@ -207,90 +246,94 @@ /** - * Derived from Mesa gl_geometry_program: + * Derived from Mesa gl_program: */ struct st_geometry_program { - struct gl_geometry_program Base; /**< The Mesa geometry program */ + struct gl_program Base; /**< The Mesa geometry program */ struct pipe_shader_state tgsi; struct glsl_to_tgsi_visitor* glsl_to_tgsi; + uint64_t affected_states; /**< ST_NEW_* flags to mark dirty when binding */ struct st_basic_variant *variants; }; /** - * Derived from Mesa gl_tess_ctrl_program: + * Derived from Mesa gl_program: */ struct st_tessctrl_program { - struct gl_tess_ctrl_program Base; /**< The Mesa tess ctrl program */ + struct gl_program Base; /**< The Mesa tess ctrl program */ struct pipe_shader_state tgsi; struct glsl_to_tgsi_visitor* glsl_to_tgsi; + uint64_t affected_states; /**< ST_NEW_* flags to mark dirty when binding */ struct st_basic_variant *variants; }; /** - * Derived from Mesa gl_tess_eval_program: + * Derived from Mesa gl_program: */ struct st_tesseval_program { - struct gl_tess_eval_program Base; /**< The Mesa tess eval program */ + struct gl_program Base; /**< The Mesa tess eval program */ struct pipe_shader_state tgsi; struct glsl_to_tgsi_visitor* glsl_to_tgsi; + uint64_t affected_states; /**< ST_NEW_* flags to mark dirty when binding */ struct st_basic_variant *variants; }; /** - * Derived from Mesa gl_compute_program: + * Derived from Mesa gl_program: */ struct st_compute_program { - struct gl_compute_program Base; /**< The Mesa compute program */ + struct gl_program Base; /**< The Mesa compute program */ struct pipe_compute_state tgsi; struct glsl_to_tgsi_visitor* glsl_to_tgsi; + uint64_t affected_states; /**< ST_NEW_* flags to mark dirty when binding */ struct st_basic_variant *variants; }; static inline struct st_fragment_program * -st_fragment_program( struct gl_fragment_program *fp ) +st_fragment_program( struct gl_program *fp ) { return (struct st_fragment_program *)fp; } static inline struct st_vertex_program * -st_vertex_program( struct gl_vertex_program *vp ) +st_vertex_program( struct gl_program *vp ) { return (struct st_vertex_program *)vp; } static inline struct st_geometry_program * -st_geometry_program( struct gl_geometry_program *gp ) +st_geometry_program( struct gl_program *gp ) { return (struct st_geometry_program *)gp; } static inline struct st_tessctrl_program * -st_tessctrl_program( struct gl_tess_ctrl_program *tcp ) +st_tessctrl_program( struct gl_program *tcp ) { return (struct st_tessctrl_program *)tcp; } static inline struct st_tesseval_program * -st_tesseval_program( struct gl_tess_eval_program *tep ) +st_tesseval_program( struct gl_program *tep ) { return (struct st_tesseval_program *)tep; } static inline struct st_compute_program * -st_compute_program( struct gl_compute_program *cp ) +st_compute_program( struct gl_program *cp ) { return (struct st_compute_program *)cp; } diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_sampler_view.c mesa-17.0.7/src/mesa/state_tracker/st_sampler_view.c --- mesa-12.0.6/src/mesa/state_tracker/st_sampler_view.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_sampler_view.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,502 @@ +/* + * Copyright 2016 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "pipe/p_context.h" +#include "util/u_format.h" +#include "util/u_inlines.h" + +#include "main/context.h" +#include "main/macros.h" +#include "main/mtypes.h" +#include "main/teximage.h" +#include "main/texobj.h" +#include "program/prog_instruction.h" + +#include "st_context.h" +#include "st_sampler_view.h" +#include "st_texture.h" +#include "st_format.h" +#include "st_cb_texture.h" + + +/** + * Try to find a matching sampler view for the given context. + * If none is found an empty slot is initialized with a + * template and returned instead. + */ +struct pipe_sampler_view ** +st_texture_get_sampler_view(struct st_context *st, + struct st_texture_object *stObj) +{ + struct pipe_sampler_view **free = NULL; + GLuint i; + + for (i = 0; i < stObj->num_sampler_views; ++i) { + struct pipe_sampler_view **sv = &stObj->sampler_views[i]; + /* Is the array entry used ? */ + if (*sv) { + /* check if the context matches */ + if ((*sv)->context == st->pipe) { + return sv; + } + } else { + /* Found a free slot, remember that */ + free = sv; + } + } + + /* Couldn't find a slot for our context, create a new one */ + + if (!free) { + /* Haven't even found a free one, resize the array */ + unsigned new_size = (stObj->num_sampler_views + 1) * + sizeof(struct pipe_sampler_view *); + stObj->sampler_views = realloc(stObj->sampler_views, new_size); + free = &stObj->sampler_views[stObj->num_sampler_views++]; + *free = NULL; + } + + assert(*free == NULL); + + return free; +} + + +/** + * For the given texture object, release any sampler views which belong + * to the calling context. + */ +void +st_texture_release_sampler_view(struct st_context *st, + struct st_texture_object *stObj) +{ + GLuint i; + + for (i = 0; i < stObj->num_sampler_views; ++i) { + struct pipe_sampler_view **sv = &stObj->sampler_views[i]; + + if (*sv && (*sv)->context == st->pipe) { + pipe_sampler_view_reference(sv, NULL); + break; + } + } +} + + +/** + * Release all sampler views attached to the given texture object, regardless + * of the context. + */ +void +st_texture_release_all_sampler_views(struct st_context *st, + struct st_texture_object *stObj) +{ + GLuint i; + + /* XXX This should use sampler_views[i]->pipe, not st->pipe */ + for (i = 0; i < stObj->num_sampler_views; ++i) + pipe_sampler_view_release(st->pipe, &stObj->sampler_views[i]); +} + + +void +st_texture_free_sampler_views(struct st_texture_object *stObj) +{ + free(stObj->sampler_views); + stObj->sampler_views = NULL; + stObj->num_sampler_views = 0; +} + + +/** + * Return swizzle1(swizzle2) + */ +static unsigned +swizzle_swizzle(unsigned swizzle1, unsigned swizzle2) +{ + unsigned i, swz[4]; + + if (swizzle1 == SWIZZLE_XYZW) { + /* identity swizzle, no change to swizzle2 */ + return swizzle2; + } + + for (i = 0; i < 4; i++) { + unsigned s = GET_SWZ(swizzle1, i); + switch (s) { + case SWIZZLE_X: + case SWIZZLE_Y: + case SWIZZLE_Z: + case SWIZZLE_W: + swz[i] = GET_SWZ(swizzle2, s); + break; + case SWIZZLE_ZERO: + swz[i] = SWIZZLE_ZERO; + break; + case SWIZZLE_ONE: + swz[i] = SWIZZLE_ONE; + break; + default: + assert(!"Bad swizzle term"); + swz[i] = SWIZZLE_X; + } + } + + return MAKE_SWIZZLE4(swz[0], swz[1], swz[2], swz[3]); +} + + +/** + * Given a user-specified texture base format, the actual gallium texture + * format and the current GL_DEPTH_MODE, return a texture swizzle. + * + * Consider the case where the user requests a GL_RGB internal texture + * format the driver actually uses an RGBA format. The A component should + * be ignored and sampling from the texture should always return (r,g,b,1). + * But if we rendered to the texture we might have written A values != 1. + * By sampling the texture with a ".xyz1" swizzle we'll get the expected A=1. + * This function computes the texture swizzle needed to get the expected + * values. + * + * In the case of depth textures, the GL_DEPTH_MODE state determines the + * texture swizzle. + * + * This result must be composed with the user-specified swizzle to get + * the final swizzle. + */ +static unsigned +compute_texture_format_swizzle(GLenum baseFormat, GLenum depthMode, + enum pipe_format actualFormat, + unsigned glsl_version) +{ + switch (baseFormat) { + case GL_RGBA: + return SWIZZLE_XYZW; + case GL_RGB: + if (util_format_has_alpha(actualFormat)) + return MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ONE); + else + return SWIZZLE_XYZW; + case GL_RG: + if (util_format_get_nr_components(actualFormat) > 2) + return MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_ZERO, SWIZZLE_ONE); + else + return SWIZZLE_XYZW; + case GL_RED: + if (util_format_get_nr_components(actualFormat) > 1) + return MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_ZERO, + SWIZZLE_ZERO, SWIZZLE_ONE); + else + return SWIZZLE_XYZW; + case GL_ALPHA: + if (util_format_get_nr_components(actualFormat) > 1) + return MAKE_SWIZZLE4(SWIZZLE_ZERO, SWIZZLE_ZERO, + SWIZZLE_ZERO, SWIZZLE_W); + else + return SWIZZLE_XYZW; + case GL_LUMINANCE: + if (util_format_get_nr_components(actualFormat) > 1) + return MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_ONE); + else + return SWIZZLE_XYZW; + case GL_LUMINANCE_ALPHA: + if (util_format_get_nr_components(actualFormat) > 2) + return MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_W); + else + return SWIZZLE_XYZW; + case GL_INTENSITY: + if (util_format_get_nr_components(actualFormat) > 1) + return SWIZZLE_XXXX; + else + return SWIZZLE_XYZW; + case GL_STENCIL_INDEX: + case GL_DEPTH_STENCIL: + case GL_DEPTH_COMPONENT: + /* Now examine the depth mode */ + switch (depthMode) { + case GL_LUMINANCE: + return MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_ONE); + case GL_INTENSITY: + return MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X); + case GL_ALPHA: + /* The texture(sampler*Shadow) functions from GLSL 1.30 ignore + * the depth mode and return float, while older shadow* functions + * and ARB_fp instructions return vec4 according to the depth mode. + * + * The problem with the GLSL 1.30 functions is that GL_ALPHA forces + * them to return 0, breaking them completely. + * + * A proper fix would increase code complexity and that's not worth + * it for a rarely used feature such as the GL_ALPHA depth mode + * in GL3. Therefore, change GL_ALPHA to GL_INTENSITY for all + * shaders that use GLSL 1.30 or later. + * + * BTW, it's required that sampler views are updated when + * shaders change (check_sampler_swizzle takes care of that). + */ + if (glsl_version && glsl_version >= 130) + return SWIZZLE_XXXX; + else + return MAKE_SWIZZLE4(SWIZZLE_ZERO, SWIZZLE_ZERO, + SWIZZLE_ZERO, SWIZZLE_X); + case GL_RED: + return MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_ZERO, + SWIZZLE_ZERO, SWIZZLE_ONE); + default: + assert(!"Unexpected depthMode"); + return SWIZZLE_XYZW; + } + default: + assert(!"Unexpected baseFormat"); + return SWIZZLE_XYZW; + } +} + + +static unsigned +get_texture_format_swizzle(const struct st_context *st, + const struct st_texture_object *stObj, + unsigned glsl_version) +{ + GLenum baseFormat = _mesa_texture_base_format(&stObj->base); + unsigned tex_swizzle; + + if (baseFormat != GL_NONE) { + GLenum depth_mode = stObj->base.DepthMode; + /* In ES 3.0, DEPTH_TEXTURE_MODE is expected to be GL_RED for textures + * with depth component data specified with a sized internal format. + */ + if (_mesa_is_gles3(st->ctx) && + util_format_is_depth_or_stencil(stObj->pt->format)) { + const struct gl_texture_image *firstImage = + _mesa_base_tex_image(&stObj->base); + if (firstImage->InternalFormat != GL_DEPTH_COMPONENT && + firstImage->InternalFormat != GL_DEPTH_STENCIL && + firstImage->InternalFormat != GL_STENCIL_INDEX) + depth_mode = GL_RED; + } + tex_swizzle = compute_texture_format_swizzle(baseFormat, + depth_mode, + stObj->pt->format, + glsl_version); + } + else { + tex_swizzle = SWIZZLE_XYZW; + } + + /* Combine the texture format swizzle with user's swizzle */ + return swizzle_swizzle(stObj->base._Swizzle, tex_swizzle); +} + + +/** + * Return TRUE if the texture's sampler view swizzle is not equal to + * the texture's swizzle. + * + * \param stObj the st texture object, + */ +MAYBE_UNUSED static boolean +check_sampler_swizzle(const struct st_context *st, + const struct st_texture_object *stObj, + const struct pipe_sampler_view *sv, unsigned glsl_version) +{ + unsigned swizzle = get_texture_format_swizzle(st, stObj, glsl_version); + + return ((sv->swizzle_r != GET_SWZ(swizzle, 0)) || + (sv->swizzle_g != GET_SWZ(swizzle, 1)) || + (sv->swizzle_b != GET_SWZ(swizzle, 2)) || + (sv->swizzle_a != GET_SWZ(swizzle, 3))); +} + + +static unsigned +last_level(const struct st_texture_object *stObj) +{ + unsigned ret = MIN2(stObj->base.MinLevel + stObj->base._MaxLevel, + stObj->pt->last_level); + if (stObj->base.Immutable) + ret = MIN2(ret, stObj->base.MinLevel + stObj->base.NumLevels - 1); + return ret; +} + + +static unsigned +last_layer(const struct st_texture_object *stObj) +{ + if (stObj->base.Immutable && stObj->pt->array_size > 1) + return MIN2(stObj->base.MinLayer + stObj->base.NumLayers - 1, + stObj->pt->array_size - 1); + return stObj->pt->array_size - 1; +} + + +/** + * Determine the format for the texture sampler view. + */ +static enum pipe_format +get_sampler_view_format(struct st_context *st, + const struct st_texture_object *stObj, + const struct gl_sampler_object *samp) +{ + enum pipe_format format; + + if (stObj->base.Target == GL_TEXTURE_BUFFER) { + format = + st_mesa_format_to_pipe_format(st, stObj->base._BufferObjectFormat); + } + else { + format = + stObj->surface_based ? stObj->surface_format : stObj->pt->format; + + if (util_format_is_depth_and_stencil(format)) { + if (stObj->base.StencilSampling) { + format = util_format_stencil_only(format); + } + else { + GLenum baseFormat = _mesa_texture_base_format(&stObj->base); + if (baseFormat == GL_STENCIL_INDEX) { + format = util_format_stencil_only(format); + } + } + } + else { + /* If sRGB decoding is off, use the linear format */ + if (samp->sRGBDecode == GL_SKIP_DECODE_EXT) { + format = util_format_linear(format); + } + + /* Use R8_UNORM for video formats */ + switch (format) { + case PIPE_FORMAT_NV12: + case PIPE_FORMAT_IYUV: + format = PIPE_FORMAT_R8_UNORM; + break; + default: + break; + } + } + } + + return format; +} + + +static struct pipe_sampler_view * +st_create_texture_sampler_view_from_stobj(struct st_context *st, + struct st_texture_object *stObj, + enum pipe_format format, + unsigned glsl_version) +{ + struct pipe_sampler_view templ; + unsigned swizzle = get_texture_format_swizzle(st, stObj, glsl_version); + + u_sampler_view_default_template(&templ, stObj->pt, format); + + if (stObj->pt->target == PIPE_BUFFER) { + unsigned base, size; + + base = stObj->base.BufferOffset; + if (base >= stObj->pt->width0) + return NULL; + size = MIN2(stObj->pt->width0 - base, (unsigned)stObj->base.BufferSize); + if (!size) + return NULL; + + templ.u.buf.offset = base; + templ.u.buf.size = size; + } else { + templ.u.tex.first_level = stObj->base.MinLevel + stObj->base.BaseLevel; + templ.u.tex.last_level = last_level(stObj); + assert(templ.u.tex.first_level <= templ.u.tex.last_level); + if (stObj->layer_override) { + templ.u.tex.first_layer = templ.u.tex.last_layer = stObj->layer_override; + } else { + templ.u.tex.first_layer = stObj->base.MinLayer; + templ.u.tex.last_layer = last_layer(stObj); + } + assert(templ.u.tex.first_layer <= templ.u.tex.last_layer); + templ.target = gl_target_to_pipe(stObj->base.Target); + } + + templ.swizzle_r = GET_SWZ(swizzle, 0); + templ.swizzle_g = GET_SWZ(swizzle, 1); + templ.swizzle_b = GET_SWZ(swizzle, 2); + templ.swizzle_a = GET_SWZ(swizzle, 3); + + return st->pipe->create_sampler_view(st->pipe, stObj->pt, &templ); +} + + +struct pipe_sampler_view * +st_get_texture_sampler_view_from_stobj(struct st_context *st, + struct st_texture_object *stObj, + const struct gl_sampler_object *samp, + unsigned glsl_version) +{ + struct pipe_sampler_view **sv; + + if (!stObj || !stObj->pt) { + return NULL; + } + + sv = st_texture_get_sampler_view(st, stObj); + + if (*sv) { + /* Debug check: make sure that the sampler view's parameters are + * what they're supposed to be. + */ + MAYBE_UNUSED struct pipe_sampler_view *view = *sv; + assert(!check_sampler_swizzle(st, stObj, view, glsl_version)); + assert(get_sampler_view_format(st, stObj, samp) == view->format); + assert(gl_target_to_pipe(stObj->base.Target) == view->target); + if (stObj->base.Target == GL_TEXTURE_BUFFER) { + unsigned base = stObj->base.BufferOffset; + MAYBE_UNUSED unsigned size = MIN2(stObj->pt->width0 - base, + (unsigned) stObj->base.BufferSize); + assert(view->u.buf.offset == base); + assert(view->u.buf.size == size); + } + else { + assert(stObj->base.MinLevel + stObj->base.BaseLevel == + view->u.tex.first_level); + assert(last_level(stObj) == view->u.tex.last_level); + assert(stObj->layer_override || stObj->base.MinLayer == view->u.tex.first_layer); + assert(stObj->layer_override || last_layer(stObj) == view->u.tex.last_layer); + assert(!stObj->layer_override || + (stObj->layer_override == view->u.tex.first_layer && + stObj->layer_override == view->u.tex.last_layer)); + } + } + else { + /* create new sampler view */ + enum pipe_format format = get_sampler_view_format(st, stObj, samp); + + *sv = st_create_texture_sampler_view_from_stobj(st, stObj, + format, glsl_version); + + } + + return *sv; +} diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_sampler_view.h mesa-17.0.7/src/mesa/state_tracker/st_sampler_view.h --- mesa-12.0.6/src/mesa/state_tracker/st_sampler_view.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_sampler_view.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,83 @@ +/* + * Copyright 2016 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + + +#ifndef ST_SAMPLER_VIEW_H +#define ST_SAMPLER_VIEW_H + +#include "pipe/p_compiler.h" +#include "pipe/p_context.h" +#include "pipe/p_state.h" +#include "util/u_sampler.h" + +struct st_texture_object; + + +static inline struct pipe_sampler_view * +st_create_texture_sampler_view_format(struct pipe_context *pipe, + struct pipe_resource *texture, + enum pipe_format format) +{ + struct pipe_sampler_view templ; + + u_sampler_view_default_template(&templ, texture, format); + + return pipe->create_sampler_view(pipe, texture, &templ); +} + + +static inline struct pipe_sampler_view * +st_create_texture_sampler_view(struct pipe_context *pipe, + struct pipe_resource *texture) +{ + return st_create_texture_sampler_view_format(pipe, texture, + texture->format); +} + + +extern struct pipe_sampler_view ** +st_texture_get_sampler_view(struct st_context *st, + struct st_texture_object *stObj); + +extern void +st_texture_release_sampler_view(struct st_context *st, + struct st_texture_object *stObj); + +extern void +st_texture_release_all_sampler_views(struct st_context *st, + struct st_texture_object *stObj); + +void +st_texture_free_sampler_views(struct st_texture_object *stObj); + + +struct pipe_sampler_view * +st_get_texture_sampler_view_from_stobj(struct st_context *st, + struct st_texture_object *stObj, + const struct gl_sampler_object *samp, + unsigned glsl_version); + + +#endif /* ST_SAMPLER_VIEW_H */ diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_scissor.c mesa-17.0.7/src/mesa/state_tracker/st_scissor.c --- mesa-12.0.6/src/mesa/state_tracker/st_scissor.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_scissor.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,51 @@ +/************************************************************************** + * + * Copyright 2016 Ilia Mirkin + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#include "main/macros.h" +#include "main/mtypes.h" +#include "pipe/p_state.h" + +#include "st_scissor.h" + +void +st_window_rectangles_to_blit(const struct gl_context *ctx, + struct pipe_blit_info *blit) +{ + unsigned i; + + blit->num_window_rectangles = ctx->Scissor.NumWindowRects; + blit->window_rectangle_include = + ctx->Scissor.WindowRectMode == GL_INCLUSIVE_EXT; + for (i = 0; i < blit->num_window_rectangles; i++) { + const struct gl_scissor_rect *src_rect = &ctx->Scissor.WindowRects[i]; + struct pipe_scissor_state *dst_rect = &blit->window_rectangles[i]; + dst_rect->minx = MAX2(src_rect->X, 0); + dst_rect->miny = MAX2(src_rect->Y, 0); + dst_rect->maxx = MAX2(src_rect->X + src_rect->Width, 0); + dst_rect->maxy = MAX2(src_rect->Y + src_rect->Height, 0); + } +} diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_scissor.h mesa-17.0.7/src/mesa/state_tracker/st_scissor.h --- mesa-12.0.6/src/mesa/state_tracker/st_scissor.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_scissor.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,38 @@ +/************************************************************************** + * + * Copyright 2016 Ilia Mirkin. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#ifndef ST_SCISSOR_H +#define ST_SCISSOR_H + +struct gl_context; +struct pipe_blit_info; + +void +st_window_rectangles_to_blit(const struct gl_context *ctx, + struct pipe_blit_info *blit); + +#endif /* ST_SCISSOR_H */ diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_texture.c mesa-17.0.7/src/mesa/state_tracker/st_texture.c --- mesa-12.0.6/src/mesa/state_tracker/st_texture.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_texture.c 2017-06-01 10:37:10.000000000 +0000 @@ -91,7 +91,8 @@ pt.array_size = layers; pt.usage = PIPE_USAGE_DEFAULT; pt.bind = bind; - pt.flags = 0; + /* only set this for OpenGL textures, not renderbuffers */ + pt.flags = PIPE_RESOURCE_FLAG_TEXTURING_MORE_LIKELY; pt.nr_samples = nr_samples; newtex = screen->resource_create(screen, &pt); @@ -418,98 +419,3 @@ texSize, texSize, 1, 1, 0, PIPE_BIND_SAMPLER_VIEW); return pt; } - -/** - * Try to find a matching sampler view for the given context. - * If none is found an empty slot is initialized with a - * template and returned instead. - */ -struct pipe_sampler_view ** -st_texture_get_sampler_view(struct st_context *st, - struct st_texture_object *stObj) -{ - struct pipe_sampler_view *used = NULL, **free = NULL; - GLuint i; - - for (i = 0; i < stObj->num_sampler_views; ++i) { - struct pipe_sampler_view **sv = &stObj->sampler_views[i]; - /* Is the array entry used ? */ - if (*sv) { - /* Yes, check if it's the right one */ - if ((*sv)->context == st->pipe) - return sv; - - /* Wasn't the right one, but remember it as template */ - used = *sv; - } else { - /* Found a free slot, remember that */ - free = sv; - } - } - - /* Couldn't find a slot for our context, create a new one */ - - if (!free) { - /* Haven't even found a free one, resize the array */ - GLuint old_size = stObj->num_sampler_views * sizeof(void *); - GLuint new_size = old_size + sizeof(void *); - stObj->sampler_views = REALLOC(stObj->sampler_views, old_size, new_size); - free = &stObj->sampler_views[stObj->num_sampler_views++]; - *free = NULL; - } - - /* Add just any sampler view to be used as a template */ - if (used) - pipe_sampler_view_reference(free, used); - - return free; -} - - -/** - * For the given texture object, release any sampler views which belong - * to the calling context. - */ -void -st_texture_release_sampler_view(struct st_context *st, - struct st_texture_object *stObj) -{ - GLuint i; - - for (i = 0; i < stObj->num_sampler_views; ++i) { - struct pipe_sampler_view **sv = &stObj->sampler_views[i]; - - if (*sv && (*sv)->context == st->pipe) { - pipe_sampler_view_reference(sv, NULL); - break; - } - } -} - - -/** - * Release all sampler views attached to the given texture object, regardless - * of the context. - */ -void -st_texture_release_all_sampler_views(struct st_context *st, - struct st_texture_object *stObj) -{ - GLuint i; - - /* XXX This should use sampler_views[i]->pipe, not st->pipe */ - for (i = 0; i < stObj->num_sampler_views; ++i) - pipe_sampler_view_release(st->pipe, &stObj->sampler_views[i]); -} - - -void -st_texture_free_sampler_views(struct st_texture_object *stObj) -{ - /* NOTE: - * We use FREE() here to match REALLOC() above. Both come from - * u_memory.h, not imports.h. If we mis-match MALLOC/FREE from - * those two headers we can trash the heap. - */ - FREE(stObj->sampler_views); -} diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_texture.h mesa-17.0.7/src/mesa/state_tracker/st_texture.h --- mesa-12.0.6/src/mesa/state_tracker/st_texture.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_texture.h 2017-06-01 10:37:10.000000000 +0000 @@ -65,7 +65,12 @@ */ struct st_texture_image_transfer *transfer; unsigned num_transfers; -}; + + /* For ETC images, keep track of the original data. This is necessary for + * mapping/unmapping, as well as image copies. + */ + GLubyte *etc_data; + }; /** @@ -102,6 +107,20 @@ * views and surfaces instead of pt->format. */ enum pipe_format surface_format; + + /* When non-zero, samplers should use this layer instead of the one + * specified by the GL state. + * + * This is used for VDPAU interop, where imported pipe_resources may be + * array textures (containing layers with different fields) even though the + * GL state describes one non-array texture per field. + */ + uint layer_override; + + /** The glsl version of the shader seen during the previous validation */ + unsigned prev_glsl_version; + /** The value of the sampler's sRGBDecode state at the previous validation */ + GLenum prev_sRGBDecode; }; @@ -145,28 +164,29 @@ } -static inline struct pipe_sampler_view * -st_create_texture_sampler_view_format(struct pipe_context *pipe, - struct pipe_resource *texture, - enum pipe_format format) +static inline struct st_texture_object * +st_get_texture_object(struct gl_context *ctx, + const struct gl_program *prog, + unsigned unit) { - struct pipe_sampler_view templ; + const GLuint texUnit = prog->SamplerUnits[unit]; + struct gl_texture_object *texObj = ctx->Texture.Unit[texUnit]._Current; - u_sampler_view_default_template(&templ, texture, format); + if (!texObj) + return NULL; - return pipe->create_sampler_view(pipe, texture, &templ); + return st_texture_object(texObj); } -static inline struct pipe_sampler_view * -st_create_texture_sampler_view(struct pipe_context *pipe, - struct pipe_resource *texture) +static inline enum pipe_format +st_get_view_format(struct st_texture_object *stObj) { - return st_create_texture_sampler_view_format(pipe, texture, - texture->format); + if (!stObj) + return PIPE_FORMAT_NONE; + return stObj->surface_based ? stObj->surface_format : stObj->pt->format; } - extern struct pipe_resource * st_texture_create(struct st_context *st, enum pipe_texture_target target, @@ -230,19 +250,8 @@ extern struct pipe_resource * st_create_color_map_texture(struct gl_context *ctx); -extern struct pipe_sampler_view ** -st_texture_get_sampler_view(struct st_context *st, - struct st_texture_object *stObj); - -extern void -st_texture_release_sampler_view(struct st_context *st, - struct st_texture_object *stObj); - -extern void -st_texture_release_all_sampler_views(struct st_context *st, - struct st_texture_object *stObj); -void -st_texture_free_sampler_views(struct st_texture_object *stObj); +bool +st_etc_fallback(struct st_context *st, struct gl_texture_image *texImage); #endif diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_tgsi_lower_yuv.c mesa-17.0.7/src/mesa/state_tracker/st_tgsi_lower_yuv.c --- mesa-12.0.6/src/mesa/state_tracker/st_tgsi_lower_yuv.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_tgsi_lower_yuv.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,448 @@ +/* + * Copyright © 2016 Red Hat + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#include + +#include "st_tgsi_lower_yuv.h" +#include "tgsi/tgsi_transform.h" +#include "tgsi/tgsi_scan.h" +#include "tgsi/tgsi_dump.h" +#include "util/u_debug.h" + +#include "util/bitscan.h" + +struct tgsi_yuv_transform { + struct tgsi_transform_context base; + struct tgsi_shader_info info; + struct tgsi_full_src_register imm[4]; + struct { + struct tgsi_full_src_register src; + struct tgsi_full_dst_register dst; + } tmp[2]; +#define A 0 +#define B 1 + + /* Maps a primary sampler (used for Y) to the U or UV sampler. In + * case of 3-plane YUV format, the V plane is next sampler after U. + */ + unsigned char sampler_map[PIPE_MAX_SAMPLERS][2]; + + bool first_instruction_emitted; + unsigned free_slots; + unsigned lower_nv12; + unsigned lower_iyuv; +}; + +static inline struct tgsi_yuv_transform * +tgsi_yuv_transform(struct tgsi_transform_context *tctx) +{ + return (struct tgsi_yuv_transform *)tctx; +} + +static void +reg_dst(struct tgsi_full_dst_register *dst, + const struct tgsi_full_dst_register *orig_dst, unsigned wrmask) +{ + *dst = *orig_dst; + dst->Register.WriteMask &= wrmask; + assert(dst->Register.WriteMask); +} + +static inline void +get_swiz(unsigned *swiz, const struct tgsi_src_register *src) +{ + swiz[0] = src->SwizzleX; + swiz[1] = src->SwizzleY; + swiz[2] = src->SwizzleZ; + swiz[3] = src->SwizzleW; +} + +static void +reg_src(struct tgsi_full_src_register *src, + const struct tgsi_full_src_register *orig_src, + unsigned sx, unsigned sy, unsigned sz, unsigned sw) +{ + unsigned swiz[4]; + get_swiz(swiz, &orig_src->Register); + *src = *orig_src; + src->Register.SwizzleX = swiz[sx]; + src->Register.SwizzleY = swiz[sy]; + src->Register.SwizzleZ = swiz[sz]; + src->Register.SwizzleW = swiz[sw]; +} + +#define TGSI_SWIZZLE__ TGSI_SWIZZLE_X /* don't-care value! */ +#define SWIZ(x,y,z,w) TGSI_SWIZZLE_ ## x, TGSI_SWIZZLE_ ## y, \ + TGSI_SWIZZLE_ ## z, TGSI_SWIZZLE_ ## w + +static inline struct tgsi_full_instruction +tex_instruction(unsigned samp) +{ + struct tgsi_full_instruction inst; + + inst = tgsi_default_full_instruction(); + inst.Instruction.Opcode = TGSI_OPCODE_TEX; + inst.Instruction.Texture = 1; + inst.Texture.Texture = TGSI_TEXTURE_2D; + inst.Instruction.NumDstRegs = 1; + inst.Instruction.NumSrcRegs = 2; + inst.Src[1].Register.File = TGSI_FILE_SAMPLER; + inst.Src[1].Register.Index = samp; + + return inst; +} + +static inline struct tgsi_full_instruction +mov_instruction(void) +{ + struct tgsi_full_instruction inst; + + inst = tgsi_default_full_instruction(); + inst.Instruction.Opcode = TGSI_OPCODE_MOV; + inst.Instruction.Saturate = 0; + inst.Instruction.NumDstRegs = 1; + inst.Instruction.NumSrcRegs = 1; + + return inst; +} + +static inline struct tgsi_full_instruction +dp3_instruction(void) +{ + struct tgsi_full_instruction inst; + + inst = tgsi_default_full_instruction(); + inst.Instruction.Opcode = TGSI_OPCODE_DP3; + inst.Instruction.NumDstRegs = 1; + inst.Instruction.NumSrcRegs = 2; + + return inst; +} + + + +static void +emit_immed(struct tgsi_transform_context *tctx, int idx, + float x, float y, float z, float w) +{ + struct tgsi_yuv_transform *ctx = tgsi_yuv_transform(tctx); + struct tgsi_shader_info *info = &ctx->info; + struct tgsi_full_immediate immed; + + immed = tgsi_default_full_immediate(); + immed.Immediate.NrTokens = 1 + 4; /* one for the token itself */ + immed.u[0].Float = x; + immed.u[1].Float = y; + immed.u[2].Float = z; + immed.u[3].Float = w; + tctx->emit_immediate(tctx, &immed); + + ctx->imm[idx].Register.File = TGSI_FILE_IMMEDIATE; + ctx->imm[idx].Register.Index = info->immediate_count + idx; + ctx->imm[idx].Register.SwizzleX = TGSI_SWIZZLE_X; + ctx->imm[idx].Register.SwizzleY = TGSI_SWIZZLE_Y; + ctx->imm[idx].Register.SwizzleZ = TGSI_SWIZZLE_Z; + ctx->imm[idx].Register.SwizzleW = TGSI_SWIZZLE_W; +} + +static void +emit_samp(struct tgsi_transform_context *tctx, unsigned samp) +{ + tgsi_transform_sampler_decl(tctx, samp); + tgsi_transform_sampler_view_decl(tctx, samp, PIPE_TEXTURE_2D, + TGSI_RETURN_TYPE_FLOAT); +} + +/* Emit extra declarations we need: + * + 2 TEMP to hold intermediate results + * + 1 (for 2-plane YUV) or 2 (for 3-plane YUV) extra samplers per + * lowered YUV sampler + * + extra immediates for doing CSC + */ +static void +emit_decls(struct tgsi_transform_context *tctx) +{ + struct tgsi_yuv_transform *ctx = tgsi_yuv_transform(tctx); + struct tgsi_shader_info *info = &ctx->info; + unsigned mask, tempbase, i; + struct tgsi_full_declaration decl; + + /* + * Declare immediates for CSC conversion: + */ + + /* ITU-R BT.601 conversion */ + emit_immed(tctx, 0, 1.164, 0.000, 1.596, 0.0); + emit_immed(tctx, 1, 1.164, -0.392, -0.813, 0.0); + emit_immed(tctx, 2, 1.164, 2.017, 0.000, 0.0); + emit_immed(tctx, 3, 0.0625, 0.500, 0.500, 1.0); + + /* + * Declare extra samplers / sampler-views: + */ + + mask = ctx->lower_nv12 | ctx->lower_iyuv; + while (mask) { + unsigned extra, y_samp = u_bit_scan(&mask); + + extra = u_bit_scan(&ctx->free_slots); + ctx->sampler_map[y_samp][0] = extra; + emit_samp(tctx, extra); + + if (ctx->lower_iyuv & (1 << y_samp)) { + extra = u_bit_scan(&ctx->free_slots); + ctx->sampler_map[y_samp][1] = extra; + emit_samp(tctx, extra); + } + } + + /* + * Declare extra temp: + */ + + tempbase = info->file_max[TGSI_FILE_TEMPORARY] + 1; + + for (i = 0; i < 2; i++) { + decl = tgsi_default_full_declaration(); + decl.Declaration.File = TGSI_FILE_TEMPORARY; + decl.Range.First = decl.Range.Last = tempbase + i; + tctx->emit_declaration(tctx, &decl); + + ctx->tmp[i].src.Register.File = TGSI_FILE_TEMPORARY; + ctx->tmp[i].src.Register.Index = tempbase + i; + ctx->tmp[i].src.Register.SwizzleX = TGSI_SWIZZLE_X; + ctx->tmp[i].src.Register.SwizzleY = TGSI_SWIZZLE_Y; + ctx->tmp[i].src.Register.SwizzleZ = TGSI_SWIZZLE_Z; + ctx->tmp[i].src.Register.SwizzleW = TGSI_SWIZZLE_W; + + ctx->tmp[i].dst.Register.File = TGSI_FILE_TEMPORARY; + ctx->tmp[i].dst.Register.Index = tempbase + i; + ctx->tmp[i].dst.Register.WriteMask = TGSI_WRITEMASK_XYZW; + } +} + +/* call with YUV in tmpA.xyz */ +static void +yuv_to_rgb(struct tgsi_transform_context *tctx, + struct tgsi_full_dst_register *dst) +{ + struct tgsi_yuv_transform *ctx = tgsi_yuv_transform(tctx); + struct tgsi_full_instruction inst; + + /* + * IMM[0] FLT32 { 1.164, 0.000, 1.596, 0.0 } + * IMM[1] FLT32 { 1.164, -0.392, -0.813, 0.0 } + * IMM[2] FLT32 { 1.164, 2.017, 0.000, 0.0 } + * IMM[3] FLT32 { 0.0625, 0.500, 0.500, 1.0 } + */ + + /* SUB tmpA.xyz, tmpA, imm[3] */ + inst = tgsi_default_full_instruction(); + inst.Instruction.Opcode = TGSI_OPCODE_ADD; + inst.Instruction.Saturate = 0; + inst.Instruction.NumDstRegs = 1; + inst.Instruction.NumSrcRegs = 2; + reg_dst(&inst.Dst[0], &ctx->tmp[A].dst, TGSI_WRITEMASK_XYZ); + reg_src(&inst.Src[0], &ctx->tmp[A].src, SWIZ(X, Y, Z, _)); + reg_src(&inst.Src[1], &ctx->imm[3], SWIZ(X, Y, Z, _)); + inst.Src[1].Register.Negate = 1; + tctx->emit_instruction(tctx, &inst); + + /* DP3 dst.x, tmpA, imm[0] */ + inst = dp3_instruction(); + reg_dst(&inst.Dst[0], dst, TGSI_WRITEMASK_X); + reg_src(&inst.Src[0], &ctx->tmp[A].src, SWIZ(X, Y, Z, W)); + reg_src(&inst.Src[1], &ctx->imm[0], SWIZ(X, Y, Z, W)); + tctx->emit_instruction(tctx, &inst); + + /* DP3 dst.y, tmpA, imm[1] */ + inst = dp3_instruction(); + reg_dst(&inst.Dst[0], dst, TGSI_WRITEMASK_Y); + reg_src(&inst.Src[0], &ctx->tmp[A].src, SWIZ(X, Y, Z, W)); + reg_src(&inst.Src[1], &ctx->imm[1], SWIZ(X, Y, Z, W)); + tctx->emit_instruction(tctx, &inst); + + /* DP3 dst.z, tmpA, imm[2] */ + inst = dp3_instruction(); + reg_dst(&inst.Dst[0], dst, TGSI_WRITEMASK_Z); + reg_src(&inst.Src[0], &ctx->tmp[A].src, SWIZ(X, Y, Z, W)); + reg_src(&inst.Src[1], &ctx->imm[2], SWIZ(X, Y, Z, W)); + tctx->emit_instruction(tctx, &inst); + + /* MOV dst.w, imm[0].x */ + inst = mov_instruction(); + reg_dst(&inst.Dst[0], dst, TGSI_WRITEMASK_W); + reg_src(&inst.Src[0], &ctx->imm[3], SWIZ(_, _, _, W)); + tctx->emit_instruction(tctx, &inst); +} + +static void +lower_nv12(struct tgsi_transform_context *tctx, + struct tgsi_full_instruction *originst) +{ + struct tgsi_yuv_transform *ctx = tgsi_yuv_transform(tctx); + struct tgsi_full_instruction inst; + struct tgsi_full_src_register *coord = &originst->Src[0]; + unsigned samp = originst->Src[1].Register.Index; + + /* sample Y: + * TEX tempA.x, coord, texture[samp], 2D; + */ + inst = tex_instruction(samp); + reg_dst(&inst.Dst[0], &ctx->tmp[A].dst, TGSI_WRITEMASK_X); + reg_src(&inst.Src[0], coord, SWIZ(X, Y, Z, W)); + tctx->emit_instruction(tctx, &inst); + + /* sample UV: + * TEX tempB.xy, coord, texture[sampler_map[samp][0]], 2D; + * MOV tempA.yz, tempB._xy_ + */ + inst = tex_instruction(ctx->sampler_map[samp][0]); + reg_dst(&inst.Dst[0], &ctx->tmp[B].dst, TGSI_WRITEMASK_XY); + reg_src(&inst.Src[0], coord, SWIZ(X, Y, Z, W)); + tctx->emit_instruction(tctx, &inst); + + inst = mov_instruction(); + reg_dst(&inst.Dst[0], &ctx->tmp[A].dst, TGSI_WRITEMASK_YZ); + reg_src(&inst.Src[0], &ctx->tmp[B].src, SWIZ(_, X, Y, _)); + tctx->emit_instruction(tctx, &inst); + + /* At this point, we have YUV in tempA.xyz, rest is common: */ + yuv_to_rgb(tctx, &originst->Dst[0]); +} + +static void +lower_iyuv(struct tgsi_transform_context *tctx, + struct tgsi_full_instruction *originst) +{ + struct tgsi_yuv_transform *ctx = tgsi_yuv_transform(tctx); + struct tgsi_full_instruction inst; + struct tgsi_full_src_register *coord = &originst->Src[0]; + unsigned samp = originst->Src[1].Register.Index; + + /* sample Y: + * TEX tempA.x, coord, texture[samp], 2D; + */ + inst = tex_instruction(samp); + reg_dst(&inst.Dst[0], &ctx->tmp[A].dst, TGSI_WRITEMASK_X); + reg_src(&inst.Src[0], coord, SWIZ(X, Y, Z, W)); + tctx->emit_instruction(tctx, &inst); + + /* sample U: + * TEX tempB.x, coord, texture[sampler_map[samp][0]], 2D; + * MOV tempA.y, tempB._x__ + */ + inst = tex_instruction(ctx->sampler_map[samp][0]); + reg_dst(&inst.Dst[0], &ctx->tmp[B].dst, TGSI_WRITEMASK_X); + reg_src(&inst.Src[0], coord, SWIZ(X, Y, Z, W)); + tctx->emit_instruction(tctx, &inst); + + inst = mov_instruction(); + reg_dst(&inst.Dst[0], &ctx->tmp[A].dst, TGSI_WRITEMASK_Y); + reg_src(&inst.Src[0], &ctx->tmp[B].src, SWIZ(_, X, _, _)); + tctx->emit_instruction(tctx, &inst); + + /* sample V: + * TEX tempB.x, coord, texture[sampler_map[samp][1]], 2D; + * MOV tempA.z, tempB.__x_ + */ + inst = tex_instruction(ctx->sampler_map[samp][1]); + reg_dst(&inst.Dst[0], &ctx->tmp[B].dst, TGSI_WRITEMASK_X); + reg_src(&inst.Src[0], coord, SWIZ(X, Y, Z, W)); + tctx->emit_instruction(tctx, &inst); + + inst = mov_instruction(); + reg_dst(&inst.Dst[0], &ctx->tmp[A].dst, TGSI_WRITEMASK_Z); + reg_src(&inst.Src[0], &ctx->tmp[B].src, SWIZ(_, _, X, _)); + tctx->emit_instruction(tctx, &inst); + + /* At this point, we have YUV in tempA.xyz, rest is common: */ + yuv_to_rgb(tctx, &originst->Dst[0]); +} + +static void +transform_instr(struct tgsi_transform_context *tctx, + struct tgsi_full_instruction *inst) +{ + struct tgsi_yuv_transform *ctx = tgsi_yuv_transform(tctx); + + if (!ctx->first_instruction_emitted) { + emit_decls(tctx); + ctx->first_instruction_emitted = true; + } + + switch (inst->Instruction.Opcode) { + /* TODO what other tex opcode's can be used w/ external eglimgs? */ + case TGSI_OPCODE_TEX: { + unsigned samp = inst->Src[1].Register.Index; + if (ctx->lower_nv12 & (1 << samp)) { + lower_nv12(tctx, inst); + } else if (ctx->lower_iyuv & (1 << samp)) { + lower_iyuv(tctx, inst); + } else { + goto skip; + } + break; + } + default: + skip: + tctx->emit_instruction(tctx, inst); + return; + } +} + +extern const struct tgsi_token * +st_tgsi_lower_yuv(const struct tgsi_token *tokens, unsigned free_slots, + unsigned lower_nv12, unsigned lower_iyuv) +{ + struct tgsi_yuv_transform ctx; + struct tgsi_token *newtoks; + int newlen; + + assert(!(lower_nv12 & lower_iyuv)); /* bitmasks should be mutually exclusive */ + +// tgsi_dump(tokens, 0); +// debug_printf("\n"); + + memset(&ctx, 0, sizeof(ctx)); + ctx.base.transform_instruction = transform_instr; + ctx.free_slots = free_slots; + ctx.lower_nv12 = lower_nv12; + ctx.lower_iyuv = lower_iyuv; + tgsi_scan_shader(tokens, &ctx.info); + + /* TODO better job of figuring out how many extra tokens we need.. + * this is a pain about tgsi_transform :-/ + */ + newlen = tgsi_num_tokens(tokens) + 120; + newtoks = tgsi_alloc_tokens(newlen); + if (!newtoks) + return NULL; + + tgsi_transform_shader(tokens, newtoks, newlen, &ctx.base); + +// tgsi_dump(newtoks, 0); +// debug_printf("\n"); + + return newtoks; +} diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_tgsi_lower_yuv.h mesa-17.0.7/src/mesa/state_tracker/st_tgsi_lower_yuv.h --- mesa-12.0.6/src/mesa/state_tracker/st_tgsi_lower_yuv.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_tgsi_lower_yuv.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,34 @@ +/* + * Copyright © 2016 Red Hat + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#ifndef ST_TGSI_LOWER_YUV_H +#define ST_TGSI_LOWER_YUV_H + +struct tgsi_token; + +extern const struct tgsi_token * st_tgsi_lower_yuv(const struct tgsi_token *tokens, + unsigned free_slots, + unsigned lower_nv12, + unsigned lower_iyuv); + +#endif /* ST_TGSI_LOWER_YUV_H */ diff -Nru mesa-12.0.6/src/mesa/state_tracker/st_vdpau.c mesa-17.0.7/src/mesa/state_tracker/st_vdpau.c --- mesa-12.0.6/src/mesa/state_tracker/st_vdpau.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/state_tracker/st_vdpau.c 2017-06-01 10:37:10.000000000 +0000 @@ -43,6 +43,7 @@ #include "st_vdpau.h" #include "st_context.h" +#include "st_sampler_view.h" #include "st_texture.h" #include "st_format.h" #include "st_cb_flush.h" @@ -188,8 +189,8 @@ struct st_texture_image *stImage = st_texture_image(texImage); struct pipe_resource *res; - struct pipe_sampler_view templ, **sampler_view; mesa_format texFormat; + uint layer_override = 0; if (output) { res = st_vdpau_output_surface_dma_buf(ctx, vdpSurface); @@ -200,8 +201,10 @@ } else { res = st_vdpau_video_surface_dma_buf(ctx, vdpSurface, index); - if (!res) + if (!res) { res = st_vdpau_video_surface_gallium(ctx, vdpSurface, index); + layer_override = index & 1; + } } if (!res) { @@ -232,18 +235,8 @@ st_texture_release_all_sampler_views(st, stObj); pipe_resource_reference(&stImage->pt, res); - u_sampler_view_default_template(&templ, res, res->format); - templ.u.tex.first_layer = index & 1; - templ.u.tex.last_layer = index & 1; - templ.swizzle_r = GET_SWZ(stObj->base._Swizzle, 0); - templ.swizzle_g = GET_SWZ(stObj->base._Swizzle, 1); - templ.swizzle_b = GET_SWZ(stObj->base._Swizzle, 2); - templ.swizzle_a = GET_SWZ(stObj->base._Swizzle, 3); - - sampler_view = st_texture_get_sampler_view(st, stObj); - *sampler_view = st->pipe->create_sampler_view(st->pipe, res, &templ); - stObj->surface_format = res->format; + stObj->layer_override = layer_override; _mesa_dirty_texobj(ctx, texObj); pipe_resource_reference(&res, NULL); @@ -263,6 +256,8 @@ st_texture_release_all_sampler_views(st, stObj); pipe_resource_reference(&stImage->pt, NULL); + stObj->layer_override = 0; + _mesa_dirty_texobj(ctx, texObj); st_flush(st, NULL, 0); diff -Nru mesa-12.0.6/src/mesa/swrast/s_context.c mesa-17.0.7/src/mesa/swrast/s_context.c --- mesa-12.0.6/src/mesa/swrast/s_context.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/swrast/s_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -220,13 +220,13 @@ } else { GLboolean use_fprog = _swrast_use_fragment_program(ctx); - const struct gl_fragment_program *fprog - = ctx->FragmentProgram._Current; - if (use_fprog && (fprog->Base.OutputsWritten & (1 << FRAG_RESULT_DEPTH))) { + const struct gl_program *fprog = ctx->FragmentProgram._Current; + if (use_fprog && + (fprog->info.outputs_written & (1 << FRAG_RESULT_DEPTH))) { /* Z comes from fragment program/shader */ swrast->_DeferredTexture = GL_FALSE; } - else if (use_fprog && fprog->UsesKill) { + else if (use_fprog && fprog->info.fs.uses_discard) { swrast->_DeferredTexture = GL_FALSE; } else if (ctx->Query.CurrentOcclusionObject) { @@ -247,9 +247,9 @@ _swrast_update_fog_state( struct gl_context *ctx ) { SWcontext *swrast = SWRAST_CONTEXT(ctx); - const struct gl_fragment_program *fp = ctx->FragmentProgram._Current; + const struct gl_program *fp = ctx->FragmentProgram._Current; - assert(fp == NULL || fp->Base.Target == GL_FRAGMENT_PROGRAM_ARB); + assert(fp == NULL || fp->Target == GL_FRAGMENT_PROGRAM_ARB); (void) fp; /* silence unused var warning */ /* determine if fog is needed, and if so, which fog mode */ @@ -269,7 +269,7 @@ return; _mesa_load_state_parameters(ctx, - ctx->FragmentProgram._Current->Base.Parameters); + ctx->FragmentProgram._Current->Parameters); } @@ -500,11 +500,12 @@ */ if (_swrast_use_fragment_program(ctx)) { /* fragment program/shader */ - attribsMask = ctx->FragmentProgram._Current->Base.InputsRead; + attribsMask = ctx->FragmentProgram._Current->info.inputs_read; attribsMask &= ~VARYING_BIT_POS; /* WPOS is always handled specially */ } else if (ctx->ATIFragmentShader._Enabled) { - attribsMask = ~0; /* XXX fix me */ + attribsMask = VARYING_BIT_COL0 | VARYING_BIT_COL1 | + VARYING_BIT_FOGC | VARYING_BITS_TEX_ANY; } else { /* fixed function */ diff -Nru mesa-12.0.6/src/mesa/swrast/s_fragprog.c mesa-17.0.7/src/mesa/swrast/s_fragprog.c --- mesa-12.0.6/src/mesa/swrast/s_fragprog.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/swrast/s_fragprog.c 2017-06-01 10:37:10.000000000 +0000 @@ -41,9 +41,9 @@ GLboolean _swrast_use_fragment_program(struct gl_context *ctx) { - struct gl_fragment_program *fp = ctx->FragmentProgram._Current; + struct gl_program *fp = ctx->FragmentProgram._Current; return fp && !(fp == ctx->FragmentProgram._TexEnvProgram - && fp->Base.NumInstructions == 0); + && fp->arb.NumInstructions == 0); } /** @@ -159,8 +159,7 @@ */ static void init_machine(struct gl_context *ctx, struct gl_program_machine *machine, - const struct gl_fragment_program *program, - const SWspan *span, GLuint col) + const struct gl_program *program, const SWspan *span, GLuint col) { GLfloat *wpos = span->array->attribs[VARYING_SLOT_POS][col]; @@ -179,7 +178,7 @@ machine->DerivY = (GLfloat (*)[4]) span->attrStepY; machine->NumDeriv = VARYING_SLOT_MAX; - machine->Samplers = program->Base.SamplerUnits; + machine->Samplers = program->SamplerUnits; /* if running a GLSL program (not ARB_fragment_program) */ if (ctx->_Shader->CurrentProgram[MESA_SHADER_FRAGMENT]) { @@ -204,8 +203,8 @@ run_program(struct gl_context *ctx, SWspan *span, GLuint start, GLuint end) { SWcontext *swrast = SWRAST_CONTEXT(ctx); - const struct gl_fragment_program *program = ctx->FragmentProgram._Current; - const GLbitfield64 outputsWritten = program->Base.OutputsWritten; + const struct gl_program *program = ctx->FragmentProgram._Current; + const GLbitfield64 outputsWritten = program->info.outputs_written; struct gl_program_machine *machine = &swrast->FragProgMachine; GLuint i; @@ -213,7 +212,7 @@ if (span->array->mask[i]) { init_machine(ctx, machine, program, span, i); - if (_mesa_execute_program(ctx, &program->Base, machine)) { + if (_mesa_execute_program(ctx, program, machine)) { /* Store result color */ if (outputsWritten & BITFIELD64_BIT(FRAG_RESULT_COLOR)) { @@ -263,21 +262,21 @@ void _swrast_exec_fragment_program( struct gl_context *ctx, SWspan *span ) { - const struct gl_fragment_program *program = ctx->FragmentProgram._Current; + const struct gl_program *program = ctx->FragmentProgram._Current; /* incoming colors should be floats */ - if (program->Base.InputsRead & VARYING_BIT_COL0) { + if (program->info.inputs_read & VARYING_BIT_COL0) { assert(span->array->ChanType == GL_FLOAT); } run_program(ctx, span, 0, span->end); - if (program->Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_COLOR)) { + if (program->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_COLOR)) { span->interpMask &= ~SPAN_RGBA; span->arrayMask |= SPAN_RGBA; } - if (program->Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) { + if (program->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) { span->interpMask &= ~SPAN_Z; span->arrayMask |= SPAN_Z; } diff -Nru mesa-12.0.6/src/mesa/swrast/s_masking.c mesa-17.0.7/src/mesa/swrast/s_masking.c --- mesa-12.0.6/src/mesa/swrast/s_masking.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/swrast/s_masking.c 2017-06-01 10:37:10.000000000 +0000 @@ -56,8 +56,8 @@ * Note that we're not using span->array->mask[] here. We could... */ if (span->array->ChanType == GL_UNSIGNED_BYTE) { - /* treat 4xGLubyte as 1xGLuint */ - const GLuint srcMask = *((GLuint *) ctx->Color.ColorMask[buf]); + GLuint srcMask; + memcpy(&srcMask, ctx->Color.ColorMask[buf], sizeof(srcMask)); const GLuint dstMask = ~srcMask; const GLuint *dst = (const GLuint *) rbPixels; GLuint *src = (GLuint *) span->array->rgba8; diff -Nru mesa-12.0.6/src/mesa/swrast/s_points.c mesa-17.0.7/src/mesa/swrast/s_points.c --- mesa-12.0.6/src/mesa/swrast/s_points.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/swrast/s_points.c 2017-06-01 10:37:10.000000000 +0000 @@ -139,8 +139,8 @@ if (attr >= VARYING_SLOT_TEX0 && attr <= VARYING_SLOT_TEX7) { /* a texcoord attribute */ const GLuint u = attr - VARYING_SLOT_TEX0; - assert(u < ARRAY_SIZE(ctx->Point.CoordReplace)); - if (ctx->Point.CoordReplace[u]) { + assert(u < MAX_TEXTURE_COORD_UNITS); + if (ctx->Point.CoordReplace & (1u << u)) { tCoords[numTcoords++] = attr; if (ctx->Point.SpriteRMode == GL_ZERO) diff -Nru mesa-12.0.6/src/mesa/swrast/s_span.c mesa-17.0.7/src/mesa/swrast/s_span.c --- mesa-12.0.6/src/mesa/swrast/s_span.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/swrast/s_span.c 2017-06-01 10:37:10.000000000 +0000 @@ -1310,10 +1310,10 @@ */ { const GLuint numBuffers = fb->_NumColorDrawBuffers; - const struct gl_fragment_program *fp = ctx->FragmentProgram._Current; + const struct gl_program *fp = ctx->FragmentProgram._Current; const GLboolean multiFragOutputs = _swrast_use_fragment_program(ctx) - && fp->Base.OutputsWritten >= (1 << FRAG_RESULT_DATA0); + && fp->info.outputs_written >= (1 << FRAG_RESULT_DATA0); /* Save srcColorType because convert_color_type() can change it */ const GLenum srcColorType = span->array->ChanType; GLuint buf; diff -Nru mesa-12.0.6/src/mesa/swrast/s_texfetch.c mesa-17.0.7/src/mesa/swrast/s_texfetch.c --- mesa-12.0.6/src/mesa/swrast/s_texfetch.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/swrast/s_texfetch.c 2017-06-01 10:37:10.000000000 +0000 @@ -43,8 +43,8 @@ #include "main/samplerobj.h" #include "s_context.h" #include "s_texfetch.h" -#include "../../gallium/auxiliary/util/u_format_rgb9e5.h" -#include "../../gallium/auxiliary/util/u_format_r11g11b10f.h" +#include "util/format_rgb9e5.h" +#include "util/format_r11g11b10f.h" #include "util/format_srgb.h" diff -Nru mesa-12.0.6/src/mesa/tnl/t_context.c mesa-17.0.7/src/mesa/tnl/t_context.c --- mesa-12.0.6/src/mesa/tnl/t_context.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/tnl/t_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -131,8 +131,8 @@ _tnl_InvalidateState( struct gl_context *ctx, GLuint new_state ) { TNLcontext *tnl = TNL_CONTEXT(ctx); - const struct gl_vertex_program *vp = ctx->VertexProgram._Current; - const struct gl_fragment_program *fp = ctx->FragmentProgram._Current; + const struct gl_program *vp = ctx->VertexProgram._Current; + const struct gl_program *fp = ctx->FragmentProgram._Current; GLuint i; if (new_state & (_NEW_HINT | _NEW_PROGRAM)) { @@ -148,7 +148,7 @@ */ tnl->render_inputs_bitset = BITFIELD64_BIT(_TNL_ATTRIB_POS); - if (!fp || (fp->Base.InputsRead & VARYING_BIT_COL0)) { + if (!fp || (fp->info.inputs_read & VARYING_BIT_COL0)) { tnl->render_inputs_bitset |= BITFIELD64_BIT(_TNL_ATTRIB_COLOR0); } @@ -157,13 +157,13 @@ for (i = 0; i < ctx->Const.MaxTextureCoordUnits; i++) { if (ctx->Texture._EnabledCoordUnits & (1 << i) || - (fp && fp->Base.InputsRead & VARYING_BIT_TEX(i))) { + (fp && fp->info.inputs_read & VARYING_BIT_TEX(i))) { tnl->render_inputs_bitset |= BITFIELD64_BIT(_TNL_ATTRIB_TEX(i)); } } if (ctx->Fog.Enabled - || (fp != NULL && (fp->Base.InputsRead & VARYING_BIT_FOGC) != 0)) { + || (fp != NULL && (fp->info.inputs_read & VARYING_BIT_FOGC) != 0)) { /* Either fixed-function fog or a fragment program needs fog coord. */ tnl->render_inputs_bitset |= BITFIELD64_BIT(_TNL_ATTRIB_FOG); @@ -183,7 +183,8 @@ if (vp) { GLuint i; for (i = 0; i < MAX_VARYING; i++) { - if (vp->Base.OutputsWritten & BITFIELD64_BIT(VARYING_SLOT_VAR0 + i)) { + if (vp->info.outputs_written & + BITFIELD64_BIT(VARYING_SLOT_VAR0 + i)) { tnl->render_inputs_bitset |= BITFIELD64_BIT(_TNL_ATTRIB_GENERIC(i)); } } diff -Nru mesa-12.0.6/src/mesa/tnl/t_draw.c mesa-17.0.7/src/mesa/tnl/t_draw.c --- mesa-12.0.6/src/mesa/tnl/t_draw.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/tnl/t_draw.c 2017-06-01 10:37:10.000000000 +0000 @@ -95,7 +95,7 @@ * \param fptr output/float array */ static void -convert_bgra_to_float(const struct gl_client_array *input, +convert_bgra_to_float(const struct gl_vertex_array *input, const GLubyte *ptr, GLfloat *fptr, GLuint count ) { @@ -113,7 +113,7 @@ } static void -convert_half_to_float(const struct gl_client_array *input, +convert_half_to_float(const struct gl_vertex_array *input, const GLubyte *ptr, GLfloat *fptr, GLuint count, GLuint sz) { @@ -140,7 +140,7 @@ * is used to map the fixed-point numbers into the range [-1, 1]. */ static void -convert_fixed_to_float(const struct gl_client_array *input, +convert_fixed_to_float(const struct gl_vertex_array *input, const GLubyte *ptr, GLfloat *fptr, GLuint count) { @@ -173,7 +173,7 @@ static void _tnl_import_array( struct gl_context *ctx, GLuint attrib, GLuint count, - const struct gl_client_array *input, + const struct gl_vertex_array *input, const GLubyte *ptr ) { TNLcontext *tnl = TNL_CONTEXT(ctx); @@ -267,7 +267,7 @@ static void bind_inputs( struct gl_context *ctx, - const struct gl_client_array *inputs[], + const struct gl_vertex_array *inputs[], GLint count, struct gl_buffer_object **bo, GLuint *nr_bo ) @@ -430,7 +430,7 @@ struct gl_buffer_object *indirect) { TNLcontext *tnl = TNL_CONTEXT(ctx); - const struct gl_client_array **arrays = ctx->Array._DrawArrays; + const struct gl_vertex_array **arrays = ctx->Array._DrawArrays; const GLuint TEST_SPLIT = 0; const GLint max = TEST_SPLIT ? 8 : tnl->vb.Size - MAX_CLIPPED_VERTICES; GLint max_basevertex = prim->basevertex; diff -Nru mesa-12.0.6/src/mesa/tnl/tnl.h mesa-17.0.7/src/mesa/tnl/tnl.h --- mesa-12.0.6/src/mesa/tnl/tnl.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/tnl/tnl.h 2017-06-01 10:37:10.000000000 +0000 @@ -30,7 +30,7 @@ #include "main/glheader.h" -struct gl_client_array; +struct gl_vertex_array; struct gl_context; struct gl_program; diff -Nru mesa-12.0.6/src/mesa/tnl/t_vb_cliptmp.h mesa-17.0.7/src/mesa/tnl/t_vb_cliptmp.h --- mesa-12.0.6/src/mesa/tnl/t_vb_cliptmp.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/tnl/t_vb_cliptmp.h 2017-06-01 10:37:10.000000000 +0000 @@ -124,7 +124,6 @@ GLuint newvert = VB->Count; GLfloat t0 = 0; GLfloat t1 = 0; - GLuint p; const GLuint v0_orig = v0; if (mask & CLIP_FRUSTUM_BITS) { @@ -137,14 +136,14 @@ } if (mask & CLIP_USER_BIT) { - for (p = 0; p < ctx->Const.MaxClipPlanes; p++) { - if (ctx->Transform.ClipPlanesEnabled & (1 << p)) { - const GLfloat a = ctx->Transform._ClipUserPlane[p][0]; - const GLfloat b = ctx->Transform._ClipUserPlane[p][1]; - const GLfloat c = ctx->Transform._ClipUserPlane[p][2]; - const GLfloat d = ctx->Transform._ClipUserPlane[p][3]; - LINE_CLIP( CLIP_USER_BIT, a, b, c, d ); - } + GLbitfield enabled = ctx->Transform.ClipPlanesEnabled; + while (enabled) { + const int p = u_bit_scan(&enabled); + const GLfloat a = ctx->Transform._ClipUserPlane[p][0]; + const GLfloat b = ctx->Transform._ClipUserPlane[p][1]; + const GLfloat c = ctx->Transform._ClipUserPlane[p][2]; + const GLfloat d = ctx->Transform._ClipUserPlane[p][3]; + LINE_CLIP( CLIP_USER_BIT, a, b, c, d ); } } @@ -194,7 +193,6 @@ GLuint pv = v2; GLuint vlist[2][MAX_CLIPPED_VERTICES]; GLuint *inlist = vlist[0], *outlist = vlist[1]; - GLuint p; GLuint n = 3; ASSIGN_3V(inlist, v2, v0, v1 ); /* pv rotated to slot zero */ @@ -226,14 +224,14 @@ } if (mask & CLIP_USER_BIT) { - for (p = 0; p < ctx->Const.MaxClipPlanes; p++) { - if (ctx->Transform.ClipPlanesEnabled & (1 << p)) { - const GLfloat a = ctx->Transform._ClipUserPlane[p][0]; - const GLfloat b = ctx->Transform._ClipUserPlane[p][1]; - const GLfloat c = ctx->Transform._ClipUserPlane[p][2]; - const GLfloat d = ctx->Transform._ClipUserPlane[p][3]; - POLY_CLIP( CLIP_USER_BIT, a, b, c, d ); - } + GLbitfield enabled = ctx->Transform.ClipPlanesEnabled; + while (enabled) { + const int p = u_bit_scan(&enabled); + const GLfloat a = ctx->Transform._ClipUserPlane[p][0]; + const GLfloat b = ctx->Transform._ClipUserPlane[p][1]; + const GLfloat c = ctx->Transform._ClipUserPlane[p][2]; + const GLfloat d = ctx->Transform._ClipUserPlane[p][3]; + POLY_CLIP( CLIP_USER_BIT, a, b, c, d ); } } @@ -274,7 +272,6 @@ GLuint pv = v3; GLuint vlist[2][MAX_CLIPPED_VERTICES]; GLuint *inlist = vlist[0], *outlist = vlist[1]; - GLuint p; GLuint n = 4; ASSIGN_4V(inlist, v3, v0, v1, v2 ); /* pv rotated to slot zero */ @@ -289,14 +286,14 @@ } if (mask & CLIP_USER_BIT) { - for (p = 0; p < ctx->Const.MaxClipPlanes; p++) { - if (ctx->Transform.ClipPlanesEnabled & (1 << p)) { - const GLfloat a = ctx->Transform._ClipUserPlane[p][0]; - const GLfloat b = ctx->Transform._ClipUserPlane[p][1]; - const GLfloat c = ctx->Transform._ClipUserPlane[p][2]; - const GLfloat d = ctx->Transform._ClipUserPlane[p][3]; - POLY_CLIP( CLIP_USER_BIT, a, b, c, d ); - } + GLbitfield enabled = ctx->Transform.ClipPlanesEnabled; + while (enabled) { + const int p = u_bit_scan(&enabled); + const GLfloat a = ctx->Transform._ClipUserPlane[p][0]; + const GLfloat b = ctx->Transform._ClipUserPlane[p][1]; + const GLfloat c = ctx->Transform._ClipUserPlane[p][2]; + const GLfloat d = ctx->Transform._ClipUserPlane[p][3]; + POLY_CLIP( CLIP_USER_BIT, a, b, c, d ); } } diff -Nru mesa-12.0.6/src/mesa/tnl/t_vb_light.c mesa-17.0.7/src/mesa/tnl/t_vb_light.c --- mesa-12.0.6/src/mesa/tnl/t_vb_light.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/tnl/t_vb_light.c 2017-06-01 10:37:10.000000000 +0000 @@ -33,6 +33,8 @@ #include "math/m_translate.h" +#include "util/bitscan.h" + #include "t_context.h" #include "t_pipeline.h" #include "tnl.h" @@ -231,10 +233,12 @@ * with the color pointer for each one. */ if (ctx->Light.ColorMaterialEnabled) { - const GLuint bitmask = ctx->Light._ColorMaterialBitmask; - for (i = 0 ; i < MAT_ATTRIB_MAX ; i++) - if (bitmask & (1<AttribPtr[_TNL_ATTRIB_MAT_FRONT_AMBIENT + i] = VB->AttribPtr[_TNL_ATTRIB_COLOR0]; + GLbitfield bitmask = ctx->Light._ColorMaterialBitmask; + while (bitmask) { + const int i = u_bit_scan(&bitmask); + VB->AttribPtr[_TNL_ATTRIB_MAT_FRONT_AMBIENT + i] = + VB->AttribPtr[_TNL_ATTRIB_COLOR0]; + } } /* Now, for each material attribute that's tracking vertex color, save @@ -394,7 +398,8 @@ tab = _tnl_light_tab; } else { - if (ctx->Light.EnabledList.next == ctx->Light.EnabledList.prev) + /* Power of two means only a single active light. */ + if (_mesa_is_pow_two(ctx->Light._EnabledLights)) tab = _tnl_light_fast_single_tab; else tab = _tnl_light_fast_tab; diff -Nru mesa-12.0.6/src/mesa/tnl/t_vb_lighttmp.h mesa-17.0.7/src/mesa/tnl/t_vb_lighttmp.h --- mesa-12.0.6/src/mesa/tnl/t_vb_lighttmp.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/tnl/t_vb_lighttmp.h 2017-06-01 10:37:10.000000000 +0000 @@ -87,7 +87,7 @@ for (j = 0; j < nr; j++,STRIDE_F(vertex,vstride),STRIDE_F(normal,nstride)) { GLfloat sum[2][3], spec[2][3]; - struct gl_light *light; + GLbitfield mask; #if IDX & LIGHT_MATERIAL update_materials( ctx, store ); @@ -106,7 +106,10 @@ #endif /* Add contribution from each enabled light source */ - foreach (light, &ctx->Light.EnabledList) { + mask = ctx->Light._EnabledLights; + while (mask) { + const int l = u_bit_scan(&mask); + struct gl_light *light = &ctx->Light.Light[l]; GLfloat n_dot_h; GLfloat correction; GLint side; @@ -265,7 +268,7 @@ for (j = 0; j < nr; j++,STRIDE_F(vertex,vstride),STRIDE_F(normal,nstride)) { GLfloat sum[2][3]; - struct gl_light *light; + GLbitfield mask; #if IDX & LIGHT_MATERIAL update_materials( ctx, store ); @@ -282,7 +285,10 @@ #endif /* Add contribution from each enabled light source */ - foreach (light, &ctx->Light.EnabledList) { + mask = ctx->Light._EnabledLights; + while (mask) { + const int l = u_bit_scan(&mask); + struct gl_light *light = &ctx->Light.Light[l]; GLfloat n_dot_h; GLfloat correction; GLint side; @@ -417,7 +423,8 @@ #if IDX & LIGHT_TWOSIDE GLfloat (*Bcolor)[4] = (GLfloat (*)[4]) store->LitColor[1].data; #endif - const struct gl_light *light = ctx->Light.EnabledList.next; + const struct gl_light *light = + &ctx->Light.Light[ffs(ctx->Light._EnabledLights) - 1]; GLuint j = 0; GLfloat base[2][4]; #if IDX & LIGHT_MATERIAL @@ -528,7 +535,6 @@ #else const GLuint nr = VB->AttribPtr[_TNL_ATTRIB_NORMAL]->count; #endif - const struct gl_light *light; #ifdef TRACE fprintf(stderr, "%s %d\n", __func__, nr ); @@ -556,6 +562,7 @@ for (j = 0; j < nr; j++, STRIDE_F(normal,nstride)) { GLfloat sum[2][3]; + GLbitfield mask; #if IDX & LIGHT_MATERIAL update_materials( ctx, store ); @@ -572,7 +579,10 @@ COPY_3V(sum[1], ctx->Light._BaseColor[1]); #endif - foreach (light, &ctx->Light.EnabledList) { + mask = ctx->Light._EnabledLights; + while (mask) { + const int l = u_bit_scan(&mask); + const struct gl_light *light = &ctx->Light.Light[l]; GLfloat n_dot_h, n_dot_VP, spec; ACC_3V(sum[0], light->_MatAmbient[0]); diff -Nru mesa-12.0.6/src/mesa/tnl/t_vb_program.c mesa-17.0.7/src/mesa/tnl/t_vb_program.c --- mesa-12.0.6/src/mesa/tnl/t_vb_program.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/tnl/t_vb_program.c 2017-06-01 10:37:10.000000000 +0000 @@ -40,6 +40,7 @@ #include "program/prog_statevars.h" #include "program/prog_execute.h" #include "swrast/s_context.h" +#include "util/bitscan.h" #include "tnl/tnl.h" #include "tnl/t_context.h" @@ -84,40 +85,38 @@ GLubyte *clipormask, GLubyte *clipandmask ) { - GLuint p; + GLbitfield mask = ctx->Transform.ClipPlanesEnabled; + while (mask) { + const int p = u_bit_scan(&mask); + GLuint nr, i; + const GLfloat a = ctx->Transform._ClipUserPlane[p][0]; + const GLfloat b = ctx->Transform._ClipUserPlane[p][1]; + const GLfloat c = ctx->Transform._ClipUserPlane[p][2]; + const GLfloat d = ctx->Transform._ClipUserPlane[p][3]; + GLfloat *coord = (GLfloat *)clip->data; + GLuint stride = clip->stride; + GLuint count = clip->count; + + for (nr = 0, i = 0 ; i < count ; i++) { + GLfloat dp = (coord[0] * a + + coord[1] * b + + coord[2] * c + + coord[3] * d); + + if (dp < 0) { + nr++; + clipmask[i] |= CLIP_USER_BIT; + } - for (p = 0; p < ctx->Const.MaxClipPlanes; p++) { - if (ctx->Transform.ClipPlanesEnabled & (1 << p)) { - GLuint nr, i; - const GLfloat a = ctx->Transform._ClipUserPlane[p][0]; - const GLfloat b = ctx->Transform._ClipUserPlane[p][1]; - const GLfloat c = ctx->Transform._ClipUserPlane[p][2]; - const GLfloat d = ctx->Transform._ClipUserPlane[p][3]; - GLfloat *coord = (GLfloat *)clip->data; - GLuint stride = clip->stride; - GLuint count = clip->count; - - for (nr = 0, i = 0 ; i < count ; i++) { - GLfloat dp = (coord[0] * a + - coord[1] * b + - coord[2] * c + - coord[3] * d); - - if (dp < 0) { - nr++; - clipmask[i] |= CLIP_USER_BIT; - } - - STRIDE_F(coord, stride); - } + STRIDE_F(coord, stride); + } - if (nr > 0) { - *clipormask |= CLIP_USER_BIT; - if (nr == count) { - *clipandmask |= CLIP_USER_BIT; - return; - } - } + if (nr > 0) { + *clipormask |= CLIP_USER_BIT; + if (nr == count) { + *clipandmask |= CLIP_USER_BIT; + return; + } } } } @@ -164,7 +163,7 @@ */ /** XXX NEW_SLANG _Enabled ??? */ if (ctx->Transform.ClipPlanesEnabled && (!ctx->VertexProgram._Enabled || - ctx->VertexProgram.Current->IsPositionInvariant)) { + ctx->VertexProgram.Current->arb.IsPositionInvariant)) { userclip( ctx, VB->ClipPtr, store->clipmask, @@ -238,7 +237,7 @@ machine->FetchTexelLod = vp_fetch_texel; machine->FetchTexelDeriv = NULL; /* not used by vertex programs */ - machine->Samplers = ctx->VertexProgram._Current->Base.SamplerUnits; + machine->Samplers = ctx->VertexProgram._Current->SamplerUnits; machine->SystemValues[SYSTEM_VALUE_INSTANCE_ID][0] = (GLfloat) instID; } @@ -248,12 +247,12 @@ * Map the texture images which the vertex program will access (if any). */ static void -map_textures(struct gl_context *ctx, const struct gl_vertex_program *vp) +map_textures(struct gl_context *ctx, const struct gl_program *vp) { GLuint u; for (u = 0; u < ctx->Const.Program[MESA_SHADER_VERTEX].MaxTextureImageUnits; u++) { - if (vp->Base.TexturesUsed[u]) { + if (vp->TexturesUsed[u]) { /* Note: _Current *should* correspond to the target indicated * in TexturesUsed[u]. */ @@ -267,12 +266,12 @@ * Unmap the texture images which were used by the vertex program (if any). */ static void -unmap_textures(struct gl_context *ctx, const struct gl_vertex_program *vp) +unmap_textures(struct gl_context *ctx, const struct gl_program *vp) { GLuint u; for (u = 0; u < ctx->Const.Program[MESA_SHADER_VERTEX].MaxTextureImageUnits; u++) { - if (vp->Base.TexturesUsed[u]) { + if (vp->TexturesUsed[u]) { /* Note: _Current *should* correspond to the target indicated * in TexturesUsed[u]. */ @@ -291,7 +290,7 @@ TNLcontext *tnl = TNL_CONTEXT(ctx); struct vp_stage_data *store = VP_STAGE_DATA(stage); struct vertex_buffer *VB = &tnl->vb; - struct gl_vertex_program *program = ctx->VertexProgram._Current; + struct gl_program *program = ctx->VertexProgram._Current; struct gl_program_machine *machine = &store->machine; GLuint outputs[VARYING_SLOT_MAX], numOutputs; GLuint i, j; @@ -300,12 +299,12 @@ return GL_TRUE; /* ARB program or vertex shader */ - _mesa_load_state_parameters(ctx, program->Base.Parameters); + _mesa_load_state_parameters(ctx, program->Parameters); /* make list of outputs to save some time below */ numOutputs = 0; for (i = 0; i < VARYING_SLOT_MAX; i++) { - if (program->Base.OutputsWritten & BITFIELD64_BIT(i)) { + if (program->info.outputs_written & BITFIELD64_BIT(i)) { outputs[numOutputs++] = i; } } @@ -348,7 +347,7 @@ /* the vertex array case */ for (attr = 0; attr < VERT_ATTRIB_MAX; attr++) { - if (program->Base.InputsRead & BITFIELD64_BIT(attr)) { + if (program->info.inputs_read & BITFIELD64_BIT(attr)) { const GLubyte *ptr = (const GLubyte*) VB->AttribPtr[attr]->data; const GLuint size = VB->AttribPtr[attr]->size; const GLuint stride = VB->AttribPtr[attr]->stride; @@ -364,7 +363,7 @@ } /* execute the program */ - _mesa_execute_program(ctx, &program->Base, machine); + _mesa_execute_program(ctx, program, machine); /* copy the output registers into the VB->attribs arrays */ for (j = 0; j < numOutputs; j++) { @@ -379,7 +378,7 @@ } /* FOGC is a special case. Fragment shader expects (f,0,0,1) */ - if (program->Base.OutputsWritten & BITFIELD64_BIT(VARYING_SLOT_FOGC)) { + if (program->info.outputs_written & BITFIELD64_BIT(VARYING_SLOT_FOGC)) { store->results[VARYING_SLOT_FOGC].data[i][1] = 0.0; store->results[VARYING_SLOT_FOGC].data[i][2] = 0.0; store->results[VARYING_SLOT_FOGC].data[i][3] = 1.0; @@ -398,7 +397,7 @@ unmap_textures(ctx, program); - if (program->IsPositionInvariant) { + if (program->arb.IsPositionInvariant) { /* We need the exact same transform as in the fixed function path here * to guarantee invariance, depending on compiler optimization flags * results could be different otherwise. @@ -444,7 +443,8 @@ } for (i = 0; i < ctx->Const.MaxVarying; i++) { - if (program->Base.OutputsWritten & BITFIELD64_BIT(VARYING_SLOT_VAR0 + i)) { + if (program->info.outputs_written & + BITFIELD64_BIT(VARYING_SLOT_VAR0 + i)) { /* Note: varying results get put into the generic attributes */ VB->AttribPtr[VERT_ATTRIB_GENERIC0+i] = &store->results[VARYING_SLOT_VAR0 + i]; diff -Nru mesa-12.0.6/src/mesa/tnl/t_vb_render.c mesa-17.0.7/src/mesa/tnl/t_vb_render.c --- mesa-12.0.6/src/mesa/tnl/t_vb_render.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/tnl/t_vb_render.c 2017-06-01 10:37:10.000000000 +0000 @@ -46,6 +46,7 @@ #include "main/imports.h" #include "main/mtypes.h" #include "math/m_xform.h" +#include "util/bitscan.h" #include "t_pipeline.h" diff -Nru mesa-12.0.6/src/mesa/tnl/t_vb_vertex.c mesa-17.0.7/src/mesa/tnl/t_vb_vertex.c --- mesa-12.0.6/src/mesa/tnl/t_vb_vertex.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/tnl/t_vb_vertex.c 2017-06-01 10:37:10.000000000 +0000 @@ -33,6 +33,8 @@ #include "math/m_xform.h" +#include "util/bitscan.h" + #include "t_context.h" #include "t_pipeline.h" @@ -63,40 +65,39 @@ GLubyte *clipormask, \ GLubyte *clipandmask ) \ { \ - GLuint p; \ - \ - for (p = 0; p < ctx->Const.MaxClipPlanes; p++) \ - if (ctx->Transform.ClipPlanesEnabled & (1 << p)) { \ - GLuint nr, i; \ - const GLfloat a = ctx->Transform._ClipUserPlane[p][0]; \ - const GLfloat b = ctx->Transform._ClipUserPlane[p][1]; \ - const GLfloat c = ctx->Transform._ClipUserPlane[p][2]; \ - const GLfloat d = ctx->Transform._ClipUserPlane[p][3]; \ - GLfloat *coord = (GLfloat *)clip->data; \ - GLuint stride = clip->stride; \ - GLuint count = clip->count; \ + GLbitfield mask = ctx->Transform.ClipPlanesEnabled; \ + while (mask) { \ + const int p = u_bit_scan(&mask); \ + GLuint nr, i; \ + const GLfloat a = ctx->Transform._ClipUserPlane[p][0]; \ + const GLfloat b = ctx->Transform._ClipUserPlane[p][1]; \ + const GLfloat c = ctx->Transform._ClipUserPlane[p][2]; \ + const GLfloat d = ctx->Transform._ClipUserPlane[p][3]; \ + GLfloat *coord = (GLfloat *)clip->data; \ + GLuint stride = clip->stride; \ + GLuint count = clip->count; \ \ - for (nr = 0, i = 0 ; i < count ; i++) { \ - GLfloat dp = coord[0] * a + coord[1] * b; \ - if (SZ > 2) dp += coord[2] * c; \ - if (SZ > 3) dp += coord[3] * d; else dp += d; \ + for (nr = 0, i = 0 ; i < count ; i++) { \ + GLfloat dp = coord[0] * a + coord[1] * b; \ + if (SZ > 2) dp += coord[2] * c; \ + if (SZ > 3) dp += coord[3] * d; else dp += d; \ \ - if (dp < 0) { \ - nr++; \ - clipmask[i] |= CLIP_USER_BIT; \ - } \ + if (dp < 0) { \ + nr++; \ + clipmask[i] |= CLIP_USER_BIT; \ + } \ \ - STRIDE_F(coord, stride); \ - } \ + STRIDE_F(coord, stride); \ + } \ \ - if (nr > 0) { \ - *clipormask |= CLIP_USER_BIT; \ - if (nr == count) { \ - *clipandmask |= CLIP_USER_BIT; \ - return; \ - } \ - } \ + if (nr > 0) { \ + *clipormask |= CLIP_USER_BIT; \ + if (nr == count) { \ + *clipandmask |= CLIP_USER_BIT; \ + return; \ + } \ } \ + } \ } diff -Nru mesa-12.0.6/src/mesa/tnl/t_vertex_generic.c mesa-17.0.7/src/mesa/tnl/t_vertex_generic.c --- mesa-12.0.6/src/mesa/tnl/t_vertex_generic.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/tnl/t_vertex_generic.c 2017-06-01 10:37:10.000000000 +0000 @@ -29,7 +29,6 @@ #include "main/glheader.h" #include "main/context.h" #include "main/macros.h" -#include "util/simple_list.h" #include "swrast/s_chan.h" #include "t_context.h" #include "t_vertex.h" diff -Nru mesa-12.0.6/src/mesa/tnl/t_vertex_sse.c mesa-17.0.7/src/mesa/tnl/t_vertex_sse.c --- mesa-12.0.6/src/mesa/tnl/t_vertex_sse.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/tnl/t_vertex_sse.c 2017-06-01 10:37:10.000000000 +0000 @@ -29,7 +29,6 @@ #include "main/glheader.h" #include "main/context.h" -#include "util/simple_list.h" #include "main/enums.h" #include "swrast/s_chan.h" #include "t_context.h" diff -Nru mesa-12.0.6/src/mesa/tnl/t_vp_build.c mesa-17.0.7/src/mesa/tnl/t_vp_build.c --- mesa-12.0.6/src/mesa/tnl/t_vp_build.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/tnl/t_vp_build.c 2017-06-01 10:37:10.000000000 +0000 @@ -40,7 +40,7 @@ */ void _tnl_UpdateFixedFunctionProgram( struct gl_context *ctx ) { - const struct gl_vertex_program *prev = ctx->VertexProgram._Current; + const struct gl_program *prev = ctx->VertexProgram._Current; if (!ctx->VertexProgram._Current || ctx->VertexProgram._Current == ctx->VertexProgram._TnlProgram) { @@ -54,6 +54,6 @@ */ if (ctx->VertexProgram._Current != prev && ctx->Driver.BindProgram) { ctx->Driver.BindProgram(ctx, GL_VERTEX_PROGRAM_ARB, - (struct gl_program *) ctx->VertexProgram._Current); + ctx->VertexProgram._Current); } } diff -Nru mesa-12.0.6/src/mesa/vbo/vbo_attrib.h mesa-17.0.7/src/mesa/vbo/vbo_attrib.h --- mesa-12.0.6/src/mesa/vbo/vbo_attrib.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/vbo/vbo_attrib.h 2017-06-01 10:37:10.000000000 +0000 @@ -79,7 +79,7 @@ VBO_ATTRIB_GENERIC14 = 31, VBO_ATTRIB_GENERIC15 = 32, - /* XXX: in the vertex program InputsRead flag, we alias + /* XXX: in the vertex program inputs_read flag, we alias * materials and generics and use knowledge about the program * (whether it is a fixed-function emulation) to * differentiate. Here we must keep them apart instead. diff -Nru mesa-12.0.6/src/mesa/vbo/vbo_attrib_tmp.h mesa-17.0.7/src/mesa/vbo/vbo_attrib_tmp.h --- mesa-12.0.6/src/mesa/vbo/vbo_attrib_tmp.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/vbo/vbo_attrib_tmp.h 2017-06-01 10:37:10.000000000 +0000 @@ -25,7 +25,7 @@ **************************************************************************/ -#include "util/u_format_r11g11b10f.h" +#include "util/format_r11g11b10f.h" #include "main/varray.h" diff -Nru mesa-12.0.6/src/mesa/vbo/vbo_context.c mesa-17.0.7/src/mesa/vbo/vbo_context.c --- mesa-12.0.6/src/mesa/vbo/vbo_context.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/vbo/vbo_context.c 2017-06-01 10:37:10.000000000 +0000 @@ -47,7 +47,7 @@ * Helper for initializing a vertex array. */ static void -init_array(struct gl_context *ctx, struct gl_client_array *cl, +init_array(struct gl_context *ctx, struct gl_vertex_array *cl, unsigned size, const void *pointer) { memset(cl, 0, sizeof(*cl)); @@ -55,11 +55,9 @@ cl->Size = size; cl->Type = GL_FLOAT; cl->Format = GL_RGBA; - cl->Stride = 0; cl->StrideB = 0; cl->_ElementSize = cl->Size * sizeof(GLfloat); cl->Ptr = pointer; - cl->Enabled = 1; _mesa_reference_buffer_object(ctx, &cl->BufferObj, ctx->Shared->NullBufferObj); @@ -79,7 +77,7 @@ * attribute: */ for (i = 0; i < VERT_ATTRIB_FF_MAX; i++) { - struct gl_client_array *cl = &vbo->currval[VERT_ATTRIB_FF(i)]; + struct gl_vertex_array *cl = &vbo->currval[VERT_ATTRIB_FF(i)]; init_array(ctx, cl, check_size(ctx->Current.Attrib[i]), @@ -94,7 +92,7 @@ GLuint i; for (i = 0; i < VERT_ATTRIB_GENERIC_MAX; i++) { - struct gl_client_array *cl = &vbo->currval[VBO_ATTRIB_GENERIC0 + i]; + struct gl_vertex_array *cl = &vbo->currval[VBO_ATTRIB_GENERIC0 + i]; init_array(ctx, cl, 1, ctx->Current.Attrib[VERT_ATTRIB_GENERIC0 + i]); } @@ -110,7 +108,7 @@ * attribute: */ for (i = 0; i < MAT_ATTRIB_MAX; i++) { - struct gl_client_array *cl = + struct gl_vertex_array *cl = &vbo->currval[VBO_ATTRIB_MAT_FRONT_AMBIENT + i]; unsigned size; diff -Nru mesa-12.0.6/src/mesa/vbo/vbo_context.h mesa-17.0.7/src/mesa/vbo/vbo_context.h --- mesa-12.0.6/src/mesa/vbo/vbo_context.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/vbo/vbo_context.h 2017-06-01 10:37:10.000000000 +0000 @@ -63,7 +63,7 @@ #endif struct vbo_context { - struct gl_client_array currval[VBO_ATTRIB_MAX]; + struct gl_vertex_array currval[VBO_ATTRIB_MAX]; /** Map VERT_ATTRIB_x to VBO_ATTRIB_y */ GLuint map_vp_none[VERT_ATTRIB_MAX]; diff -Nru mesa-12.0.6/src/mesa/vbo/vbo_exec_api.c mesa-17.0.7/src/mesa/vbo/vbo_exec_api.c --- mesa-12.0.6/src/mesa/vbo/vbo_exec_api.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/vbo/vbo_exec_api.c 2017-06-01 10:37:10.000000000 +0000 @@ -42,21 +42,18 @@ #include "main/api_arrayelt.h" #include "main/api_validate.h" #include "main/dispatch.h" +#include "util/bitscan.h" #include "vbo_context.h" #include "vbo_noop.h" -#ifdef ERROR -#undef ERROR -#endif - - /** ID/name for immediate-mode VBO */ #define IMM_BUFFER_NAME 0xaabbccdd -static void reset_attrfv( struct vbo_exec_context *exec ); +static void +vbo_reset_all_attr(struct vbo_exec_context *exec); /** @@ -64,7 +61,8 @@ * primitive. This is called when we fill a vertex buffer before * hitting glEnd. */ -static void vbo_exec_wrap_buffers( struct vbo_exec_context *exec ) +static void +vbo_exec_wrap_buffers(struct vbo_exec_context *exec) { if (exec->vtx.prim_count == 0) { exec->vtx.copied.nr = 0; @@ -118,7 +116,7 @@ exec->vtx.prim[0].start = 0; exec->vtx.prim[0].count = 0; exec->vtx.prim_count++; - + if (exec->vtx.copied.nr == last_count) exec->vtx.prim[0].begin = last_begin; } @@ -139,13 +137,13 @@ * to exec->vtx.copied. */ vbo_exec_wrap_buffers( exec ); - + if (!exec->vtx.buffer_ptr) { /* probably ran out of memory earlier when allocating the VBO */ return; } - /* Copy stored stored vertices to start of new list. + /* Copy stored stored vertices to start of new list. */ assert(exec->vtx.max_vert - exec->vtx.vert_count > exec->vtx.copied.nr); @@ -163,58 +161,62 @@ /** * Copy the active vertex's values to the ctx->Current fields. */ -static void vbo_exec_copy_to_current( struct vbo_exec_context *exec ) +static void +vbo_exec_copy_to_current(struct vbo_exec_context *exec) { struct gl_context *ctx = exec->ctx; struct vbo_context *vbo = vbo_context(ctx); - GLuint i; + GLbitfield64 enabled = exec->vtx.enabled & (~BITFIELD64_BIT(VBO_ATTRIB_POS)); + + while (enabled) { + const int i = u_bit_scan64(&enabled); + + /* Note: the exec->vtx.current[i] pointers point into the + * ctx->Current.Attrib and ctx->Light.Material.Attrib arrays. + */ + GLfloat *current = (GLfloat *)vbo->currval[i].Ptr; + fi_type tmp[8]; /* space for doubles */ + int dmul = exec->vtx.attrtype[i] == GL_DOUBLE ? 2 : 1; - for (i = VBO_ATTRIB_POS+1 ; i < VBO_ATTRIB_MAX ; i++) { - if (exec->vtx.attrsz[i]) { - /* Note: the exec->vtx.current[i] pointers point into the - * ctx->Current.Attrib and ctx->Light.Material.Attrib arrays. + assert(exec->vtx.attrsz[i]); + + if (exec->vtx.attrtype[i] == GL_DOUBLE) { + memset(tmp, 0, sizeof(tmp)); + memcpy(tmp, exec->vtx.attrptr[i], exec->vtx.attrsz[i] * sizeof(GLfloat)); + } else { + COPY_CLEAN_4V_TYPE_AS_UNION(tmp, + exec->vtx.attrsz[i], + exec->vtx.attrptr[i], + exec->vtx.attrtype[i]); + } + + if (exec->vtx.attrtype[i] != vbo->currval[i].Type || + memcmp(current, tmp, 4 * sizeof(GLfloat) * dmul) != 0) { + memcpy(current, tmp, 4 * sizeof(GLfloat) * dmul); + + /* Given that we explicitly state size here, there is no need + * for the COPY_CLEAN above, could just copy 16 bytes and be + * done. The only problem is when Mesa accesses ctx->Current + * directly. */ - GLfloat *current = (GLfloat *)vbo->currval[i].Ptr; - fi_type tmp[8]; /* space for doubles */ - int dmul = exec->vtx.attrtype[i] == GL_DOUBLE ? 2 : 1; - - if (exec->vtx.attrtype[i] == GL_DOUBLE) { - memset(tmp, 0, sizeof(tmp)); - memcpy(tmp, exec->vtx.attrptr[i], exec->vtx.attrsz[i] * sizeof(GLfloat)); - } else { - COPY_CLEAN_4V_TYPE_AS_UNION(tmp, - exec->vtx.attrsz[i], - exec->vtx.attrptr[i], - exec->vtx.attrtype[i]); - } + /* Size here is in components - not bytes */ + vbo->currval[i].Size = exec->vtx.attrsz[i] / dmul; + vbo->currval[i]._ElementSize = + vbo->currval[i].Size * sizeof(GLfloat) * dmul; + vbo->currval[i].Type = exec->vtx.attrtype[i]; + vbo->currval[i].Integer = + vbo_attrtype_to_integer_flag(exec->vtx.attrtype[i]); + vbo->currval[i].Doubles = + vbo_attrtype_to_double_flag(exec->vtx.attrtype[i]); - if (exec->vtx.attrtype[i] != vbo->currval[i].Type || - memcmp(current, tmp, 4 * sizeof(GLfloat) * dmul) != 0) { - memcpy(current, tmp, 4 * sizeof(GLfloat) * dmul); - - /* Given that we explicitly state size here, there is no need - * for the COPY_CLEAN above, could just copy 16 bytes and be - * done. The only problem is when Mesa accesses ctx->Current - * directly. - */ - /* Size here is in components - not bytes */ - vbo->currval[i].Size = exec->vtx.attrsz[i] / dmul; - vbo->currval[i]._ElementSize = vbo->currval[i].Size * sizeof(GLfloat) * dmul; - vbo->currval[i].Type = exec->vtx.attrtype[i]; - vbo->currval[i].Integer = - vbo_attrtype_to_integer_flag(exec->vtx.attrtype[i]); - vbo->currval[i].Doubles = - vbo_attrtype_to_double_flag(exec->vtx.attrtype[i]); + /* This triggers rather too much recalculation of Mesa state + * that doesn't get used (eg light positions). + */ + if (i >= VBO_ATTRIB_MAT_FRONT_AMBIENT && + i <= VBO_ATTRIB_MAT_BACK_INDEXES) + ctx->NewState |= _NEW_LIGHT; - /* This triggers rather too much recalculation of Mesa state - * that doesn't get used (eg light positions). - */ - if (i >= VBO_ATTRIB_MAT_FRONT_AMBIENT && - i <= VBO_ATTRIB_MAT_BACK_INDEXES) - ctx->NewState |= _NEW_LIGHT; - - ctx->NewState |= _NEW_CURRENT_ATTRIB; - } + ctx->NewState |= _NEW_CURRENT_ATTRIB; } } @@ -222,7 +224,7 @@ */ if (ctx->Light.ColorMaterialEnabled && exec->vtx.attrsz[VBO_ATTRIB_COLOR0]) { - _mesa_update_color_material(ctx, + _mesa_update_color_material(ctx, ctx->Current.Attrib[VBO_ATTRIB_COLOR0]); } } @@ -240,7 +242,8 @@ for (i = VBO_ATTRIB_POS + 1; i < VBO_ATTRIB_MAX; i++) { if (exec->vtx.attrtype[i] == GL_DOUBLE) { - memcpy(exec->vtx.attrptr[i], vbo->currval[i].Ptr, exec->vtx.attrsz[i] * sizeof(GLfloat)); + memcpy(exec->vtx.attrptr[i], vbo->currval[i].Ptr, + exec->vtx.attrsz[i] * sizeof(GLfloat)); } else { const fi_type *current = (fi_type *) vbo->currval[i].Ptr; switch (exec->vtx.attrsz[i]) { @@ -261,7 +264,7 @@ * to a larger one. Ex: glTexCoord2f -> glTexCoord4f. * We need to go back over the previous 2-component texcoords and insert * zero and one values. - */ + */ static void vbo_exec_wrap_upgrade_vertex(struct vbo_exec_context *exec, GLuint attr, GLuint newSize ) @@ -301,7 +304,7 @@ if (!_mesa_inside_begin_end(ctx) && !oldSize && lastcount > 8 && exec->vtx.vertex_size) { vbo_exec_copy_to_current( exec ); - reset_attrfv( exec ); + vbo_reset_all_attr(exec); } /* Fix up sizes: @@ -311,6 +314,7 @@ exec->vtx.max_vert = vbo_compute_max_verts(exec); exec->vtx.vert_count = 0; exec->vtx.buffer_ptr = exec->vtx.buffer_map; + exec->vtx.enabled |= BITFIELD64_BIT(attr); if (unlikely(oldSize)) { /* Size changed, recalculate all the attrptr[] values @@ -345,34 +349,34 @@ if (unlikely(exec->vtx.copied.nr)) { fi_type *data = exec->vtx.copied.buffer; fi_type *dest = exec->vtx.buffer_ptr; - GLuint j; assert(exec->vtx.buffer_ptr == exec->vtx.buffer_map); for (i = 0 ; i < exec->vtx.copied.nr ; i++) { - for (j = 0 ; j < VBO_ATTRIB_MAX ; j++) { + GLbitfield64 enabled = exec->vtx.enabled; + while (enabled) { + const int j = u_bit_scan64(&enabled); GLuint sz = exec->vtx.attrsz[j]; + GLint old_offset = old_attrptr[j] - exec->vtx.vertex; + GLint new_offset = exec->vtx.attrptr[j] - exec->vtx.vertex; + + assert(sz); - if (sz) { - GLint old_offset = old_attrptr[j] - exec->vtx.vertex; - GLint new_offset = exec->vtx.attrptr[j] - exec->vtx.vertex; - - if (j == attr) { - if (oldSize) { - fi_type tmp[4]; - COPY_CLEAN_4V_TYPE_AS_UNION(tmp, oldSize, - data + old_offset, - exec->vtx.attrtype[j]); - COPY_SZ_4V(dest + new_offset, newSize, tmp); - } else { - fi_type *current = (fi_type *)vbo->currval[j].Ptr; - COPY_SZ_4V(dest + new_offset, sz, current); - } - } - else { - COPY_SZ_4V(dest + new_offset, sz, data + old_offset); - } - } + if (j == attr) { + if (oldSize) { + fi_type tmp[4]; + COPY_CLEAN_4V_TYPE_AS_UNION(tmp, oldSize, + data + old_offset, + exec->vtx.attrtype[j]); + COPY_SZ_4V(dest + new_offset, newSize, tmp); + } else { + fi_type *current = (fi_type *)vbo->currval[j].Ptr; + COPY_SZ_4V(dest + new_offset, sz, current); + } + } + else { + COPY_SZ_4V(dest + new_offset, sz, data + old_offset); + } } data += old_vtx_size; @@ -414,16 +418,17 @@ * zeros. Don't need to flush or wrap. */ for (i = newSize; i <= exec->vtx.attrsz[attr]; i++) - exec->vtx.attrptr[attr][i-1] = id[i-1]; + exec->vtx.attrptr[attr][i-1] = id[i-1]; } exec->vtx.active_sz[attr] = newSize; + exec->vtx.attrtype[attr] = newType; /* Does setting NeedFlush belong here? Necessitates resetting * vtxfmt on each flush (otherwise flags won't get reset * afterwards). */ - if (attr == 0) + if (attr == 0) ctx->Driver.NeedFlush |= FLUSH_STORED_VERTICES; } @@ -474,7 +479,7 @@ if (N>1) dest[1] = V1; \ if (N>2) dest[2] = V2; \ if (N>3) dest[3] = V3; \ - exec->vtx.attrtype[A] = T; \ + assert(exec->vtx.attrtype[A] == T); \ } \ \ if ((A) == 0) { \ @@ -508,6 +513,8 @@ } \ } while (0) + +#undef ERROR #define ERROR(err) _mesa_error( ctx, err, __func__ ) #define TAG(x) vbo_##x @@ -626,30 +633,31 @@ if (exec->vtx.vertex_size) { vbo_exec_copy_to_current( exec ); - reset_attrfv( exec ); + vbo_reset_all_attr(exec); } } -static void GLAPIENTRY vbo_exec_EvalCoord1f( GLfloat u ) +static void GLAPIENTRY +vbo_exec_EvalCoord1f(GLfloat u) { GET_CURRENT_CONTEXT( ctx ); struct vbo_exec_context *exec = &vbo_context(ctx)->exec; { GLint i; - if (exec->eval.recalculate_maps) + if (exec->eval.recalculate_maps) vbo_exec_eval_update( exec ); for (i = 0; i <= VBO_ATTRIB_TEX7; i++) { - if (exec->eval.map1[i].map) + if (exec->eval.map1[i].map) if (exec->vtx.active_sz[i] != exec->eval.map1[i].sz) vbo_exec_fixup_vertex( ctx, i, exec->eval.map1[i].sz, GL_FLOAT ); } } - memcpy( exec->vtx.copied.buffer, exec->vtx.vertex, + memcpy( exec->vtx.copied.buffer, exec->vtx.vertex, exec->vtx.vertex_size * sizeof(GLfloat)); vbo_exec_do_EvalCoord1f( exec, u ); @@ -658,47 +666,55 @@ exec->vtx.vertex_size * sizeof(GLfloat)); } -static void GLAPIENTRY vbo_exec_EvalCoord2f( GLfloat u, GLfloat v ) + +static void GLAPIENTRY +vbo_exec_EvalCoord2f(GLfloat u, GLfloat v) { GET_CURRENT_CONTEXT( ctx ); struct vbo_exec_context *exec = &vbo_context(ctx)->exec; { GLint i; - if (exec->eval.recalculate_maps) + if (exec->eval.recalculate_maps) vbo_exec_eval_update( exec ); for (i = 0; i <= VBO_ATTRIB_TEX7; i++) { - if (exec->eval.map2[i].map) + if (exec->eval.map2[i].map) if (exec->vtx.active_sz[i] != exec->eval.map2[i].sz) vbo_exec_fixup_vertex( ctx, i, exec->eval.map2[i].sz, GL_FLOAT ); } - if (ctx->Eval.AutoNormal) + if (ctx->Eval.AutoNormal) if (exec->vtx.active_sz[VBO_ATTRIB_NORMAL] != 3) vbo_exec_fixup_vertex( ctx, VBO_ATTRIB_NORMAL, 3, GL_FLOAT ); } - memcpy( exec->vtx.copied.buffer, exec->vtx.vertex, + memcpy( exec->vtx.copied.buffer, exec->vtx.vertex, exec->vtx.vertex_size * sizeof(GLfloat)); vbo_exec_do_EvalCoord2f( exec, u, v ); - memcpy( exec->vtx.vertex, exec->vtx.copied.buffer, + memcpy( exec->vtx.vertex, exec->vtx.copied.buffer, exec->vtx.vertex_size * sizeof(GLfloat)); } -static void GLAPIENTRY vbo_exec_EvalCoord1fv( const GLfloat *u ) + +static void GLAPIENTRY +vbo_exec_EvalCoord1fv(const GLfloat *u) { vbo_exec_EvalCoord1f( u[0] ); } -static void GLAPIENTRY vbo_exec_EvalCoord2fv( const GLfloat *u ) + +static void GLAPIENTRY +vbo_exec_EvalCoord2fv(const GLfloat *u) { vbo_exec_EvalCoord2f( u[0], u[1] ); } -static void GLAPIENTRY vbo_exec_EvalPoint1( GLint i ) + +static void GLAPIENTRY +vbo_exec_EvalPoint1(GLint i) { GET_CURRENT_CONTEXT( ctx ); GLfloat du = ((ctx->Eval.MapGrid1u2 - ctx->Eval.MapGrid1u1) / @@ -709,12 +725,13 @@ } -static void GLAPIENTRY vbo_exec_EvalPoint2( GLint i, GLint j ) +static void GLAPIENTRY +vbo_exec_EvalPoint2(GLint i, GLint j) { GET_CURRENT_CONTEXT( ctx ); - GLfloat du = ((ctx->Eval.MapGrid2u2 - ctx->Eval.MapGrid2u1) / + GLfloat du = ((ctx->Eval.MapGrid2u2 - ctx->Eval.MapGrid2u1) / (GLfloat) ctx->Eval.MapGrid2un); - GLfloat dv = ((ctx->Eval.MapGrid2v2 - ctx->Eval.MapGrid2v1) / + GLfloat dv = ((ctx->Eval.MapGrid2v2 - ctx->Eval.MapGrid2v1) / (GLfloat) ctx->Eval.MapGrid2vn); GLfloat u = i * du + ctx->Eval.MapGrid2u1; GLfloat v = j * dv + ctx->Eval.MapGrid2v1; @@ -726,9 +743,10 @@ /** * Called via glBegin. */ -static void GLAPIENTRY vbo_exec_Begin( GLenum mode ) +static void GLAPIENTRY +vbo_exec_Begin(GLenum mode) { - GET_CURRENT_CONTEXT( ctx ); + GET_CURRENT_CONTEXT( ctx ); struct vbo_exec_context *exec = &vbo_context(ctx)->exec; int i; @@ -819,9 +837,10 @@ /** * Called via glEnd. */ -static void GLAPIENTRY vbo_exec_End( void ) +static void GLAPIENTRY +vbo_exec_End(void) { - GET_CURRENT_CONTEXT( ctx ); + GET_CURRENT_CONTEXT( ctx ); struct vbo_exec_context *exec = &vbo_context(ctx)->exec; if (!_mesa_inside_begin_end(ctx)) { @@ -887,7 +906,7 @@ vbo_exec_PrimitiveRestartNV(void) { GLenum curPrim; - GET_CURRENT_CONTEXT( ctx ); + GET_CURRENT_CONTEXT(ctx); curPrim = ctx->Driver.CurrentExecPrimitive; @@ -901,8 +920,8 @@ } - -static void vbo_exec_vtxfmt_init( struct vbo_exec_context *exec ) +static void +vbo_exec_vtxfmt_init(struct vbo_exec_context *exec) { struct gl_context *ctx = exec->ctx; GLvertexformat *vfmt = &exec->vtxfmt; @@ -957,7 +976,7 @@ vfmt->Vertex3fv = vbo_Vertex3fv; vfmt->Vertex4f = vbo_Vertex4f; vfmt->Vertex4fv = vbo_Vertex4fv; - + if (ctx->API == API_OPENGLES2) { vfmt->VertexAttrib1fARB = _es_VertexAttrib1f; vfmt->VertexAttrib1fvARB = _es_VertexAttrib1fv; @@ -1040,7 +1059,7 @@ vfmt->MultiTexCoordP3uiv = vbo_MultiTexCoordP3uiv; vfmt->MultiTexCoordP4ui = vbo_MultiTexCoordP4ui; vfmt->MultiTexCoordP4uiv = vbo_MultiTexCoordP4uiv; - + vfmt->NormalP3ui = vbo_NormalP3ui; vfmt->NormalP3uiv = vbo_NormalP3uiv; @@ -1079,7 +1098,8 @@ * This replaces the malloced buffer which was created in * vb_exec_vtx_init() below. */ -void vbo_use_buffer_objects(struct gl_context *ctx) +void +vbo_use_buffer_objects(struct gl_context *ctx) { struct vbo_exec_context *exec = &vbo_context(ctx)->exec; /* Any buffer name but 0 can be used here since this bufferobj won't @@ -1124,7 +1144,8 @@ } -void vbo_exec_vtx_init( struct vbo_exec_context *exec ) +void +vbo_exec_vtx_init(struct vbo_exec_context *exec) { struct gl_context *ctx = exec->ctx; struct vbo_context *vbo = vbo_context(ctx); @@ -1145,6 +1166,7 @@ vbo_exec_vtxfmt_init( exec ); _mesa_noop_vtxfmt_init(&exec->vtxfmt_noop); + exec->vtx.enabled = 0; for (i = 0 ; i < VBO_ATTRIB_MAX ; i++) { assert(i < ARRAY_SIZE(exec->vtx.attrsz)); exec->vtx.attrsz[i] = 0; @@ -1158,15 +1180,15 @@ assert(i < ARRAY_SIZE(exec->vtx.arrays)); exec->vtx.inputs[i] = &exec->vtx.arrays[i]; } - + { - struct gl_client_array *arrays = exec->vtx.arrays; + struct gl_vertex_array *arrays = exec->vtx.arrays; unsigned i; memcpy(arrays, &vbo->currval[VBO_ATTRIB_POS], VERT_ATTRIB_FF_MAX * sizeof(arrays[0])); for (i = 0; i < VERT_ATTRIB_FF_MAX; ++i) { - struct gl_client_array *array; + struct gl_vertex_array *array; array = &arrays[VERT_ATTRIB_FF(i)]; array->BufferObj = NULL; _mesa_reference_buffer_object(ctx, &array->BufferObj, @@ -1178,7 +1200,7 @@ VERT_ATTRIB_GENERIC_MAX * sizeof(arrays[0])); for (i = 0; i < VERT_ATTRIB_GENERIC_MAX; ++i) { - struct gl_client_array *array; + struct gl_vertex_array *array; array = &arrays[VERT_ATTRIB_GENERIC(i)]; array->BufferObj = NULL; _mesa_reference_buffer_object(ctx, &array->BufferObj, @@ -1192,7 +1214,8 @@ } -void vbo_exec_vtx_destroy( struct vbo_exec_context *exec ) +void +vbo_exec_vtx_destroy(struct vbo_exec_context *exec) { /* using a real VBO for vertex data */ struct gl_context *ctx = exec->ctx; @@ -1238,7 +1261,8 @@ * * \param flags bitmask of FLUSH_STORED_VERTICES, FLUSH_UPDATE_CURRENT */ -void vbo_exec_FlushVertices( struct gl_context *ctx, GLuint flags ) +void +vbo_exec_FlushVertices(struct gl_context *ctx, GLuint flags) { struct vbo_exec_context *exec = &vbo_context(ctx)->exec; @@ -1271,19 +1295,29 @@ } -static void reset_attrfv( struct vbo_exec_context *exec ) -{ - GLuint i; +/** + * Reset the vertex attribute by setting its size to zero. + */ +static void +vbo_reset_attr(struct vbo_exec_context *exec, GLuint attr) +{ + exec->vtx.attrsz[attr] = 0; + exec->vtx.attrtype[attr] = GL_FLOAT; + exec->vtx.active_sz[attr] = 0; +} - for (i = 0 ; i < VBO_ATTRIB_MAX ; i++) { - exec->vtx.attrsz[i] = 0; - exec->vtx.attrtype[i] = GL_FLOAT; - exec->vtx.active_sz[i] = 0; + +static void +vbo_reset_all_attr(struct vbo_exec_context *exec) +{ + while (exec->vtx.enabled) { + const int i = u_bit_scan64(&exec->vtx.enabled); + vbo_reset_attr(exec, i); } exec->vtx.vertex_size = 0; } - + void GLAPIENTRY _es_Color4f(GLfloat r, GLfloat g, GLfloat b, GLfloat a) diff -Nru mesa-12.0.6/src/mesa/vbo/vbo_exec_array.c mesa-17.0.7/src/mesa/vbo/vbo_exec_array.c --- mesa-12.0.6/src/mesa/vbo/vbo_exec_array.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/vbo/vbo_exec_array.c 2017-06-01 10:37:10.000000000 +0000 @@ -27,6 +27,7 @@ **************************************************************************/ #include +#include "main/arrayobj.h" #include "main/glheader.h" #include "main/context.h" #include "main/state.h" @@ -42,82 +43,47 @@ /** - * All vertex buffers should be in an unmapped state when we're about - * to draw. - */ -static bool -check_input_buffers_are_unmapped(const struct gl_client_array **inputs) -{ - GLuint i; - - for (i = 0; i < VERT_ATTRIB_MAX; i++) { - if (inputs[i]) { - struct gl_buffer_object *obj = inputs[i]->BufferObj; - if (_mesa_check_disallowed_mapping(obj)) - return false; - } - } - - return true; -} - - -/** - * A debug function that may be called from other parts of Mesa as - * needed during debugging. - */ -static bool -check_buffers_are_unmapped(struct gl_context *ctx) -{ - struct vbo_context *vbo = vbo_context(ctx); - struct vbo_exec_context *exec = &vbo->exec; - - /* check the current vertex arrays */ - return !_mesa_check_disallowed_mapping(exec->vtx.bufferobj) && - check_input_buffers_are_unmapped(exec->array.inputs); -} - - -/** * Check that element 'j' of the array has reasonable data. * Map VBO if needed. * For debugging purposes; not normally used. */ static void -check_array_data(struct gl_context *ctx, struct gl_client_array *array, +check_array_data(struct gl_context *ctx, struct gl_vertex_array_object *vao, GLuint attrib, GLuint j) { + const struct gl_array_attributes *array = &vao->VertexAttrib[attrib]; if (array->Enabled) { + const struct gl_vertex_buffer_binding *binding = + &vao->BufferBinding[array->BufferBindingIndex]; + struct gl_buffer_object *bo = binding->BufferObj; const void *data = array->Ptr; - if (_mesa_is_bufferobj(array->BufferObj)) { - if (!array->BufferObj->Mappings[MAP_INTERNAL].Pointer) { + if (_mesa_is_bufferobj(bo)) { + if (!bo->Mappings[MAP_INTERNAL].Pointer) { /* need to map now */ - array->BufferObj->Mappings[MAP_INTERNAL].Pointer = - ctx->Driver.MapBufferRange(ctx, 0, array->BufferObj->Size, - GL_MAP_READ_BIT, array->BufferObj, - MAP_INTERNAL); + bo->Mappings[MAP_INTERNAL].Pointer = + ctx->Driver.MapBufferRange(ctx, 0, bo->Size, + GL_MAP_READ_BIT, bo, MAP_INTERNAL); } - data = ADD_POINTERS(data, - array->BufferObj->Mappings[MAP_INTERNAL].Pointer); + data = ADD_POINTERS(_mesa_vertex_attrib_address(array, binding), + bo->Mappings[MAP_INTERNAL].Pointer); } switch (array->Type) { case GL_FLOAT: { - GLfloat *f = (GLfloat *) ((GLubyte *) data + array->StrideB * j); + GLfloat *f = (GLfloat *) ((GLubyte *) data + binding->Stride * j); GLint k; for (k = 0; k < array->Size; k++) { - if (IS_INF_OR_NAN(f[k]) || - f[k] >= 1.0e20F || f[k] <= -1.0e10F) { + if (IS_INF_OR_NAN(f[k]) || f[k] >= 1.0e20F || f[k] <= -1.0e10F) { printf("Bad array data:\n"); printf(" Element[%u].%u = %f\n", j, k, f[k]); - printf(" Array %u at %p\n", attrib, (void* ) array); + printf(" Array %u at %p\n", attrib, (void *) array); printf(" Type 0x%x, Size %d, Stride %d\n", - array->Type, array->Size, array->Stride); + array->Type, array->Size, binding->Stride); printf(" Address/offset %p in Buffer Object %u\n", - array->Ptr, array->BufferObj->Name); - f[k] = 1.0F; /* XXX replace the bad value! */ + array->Ptr, bo->Name); + f[k] = 1.0F; /* XXX replace the bad value! */ } - /*assert(!IS_INF_OR_NAN(f[k]));*/ + /*assert(!IS_INF_OR_NAN(f[k])); */ } } break; @@ -132,12 +98,17 @@ * Unmap the buffer object referenced by given array, if mapped. */ static void -unmap_array_buffer(struct gl_context *ctx, struct gl_client_array *array) +unmap_array_buffer(struct gl_context *ctx, struct gl_vertex_array_object *vao, + GLuint attrib) { - if (array->Enabled && - _mesa_is_bufferobj(array->BufferObj) && - _mesa_bufferobj_mapped(array->BufferObj, MAP_INTERNAL)) { - ctx->Driver.UnmapBuffer(ctx, array->BufferObj, MAP_INTERNAL); + const struct gl_array_attributes *array = &vao->VertexAttrib[attrib]; + if (array->Enabled) { + const struct gl_vertex_buffer_binding *binding = + &vao->BufferBinding[array->BufferBindingIndex]; + struct gl_buffer_object *bo = binding->BufferObj; + if (_mesa_is_bufferobj(bo) && _mesa_bufferobj_mapped(bo, MAP_INTERNAL)) { + ctx->Driver.UnmapBuffer(ctx, bo, MAP_INTERNAL); + } } } @@ -147,20 +118,20 @@ * For debug purposes; not normally used. */ static void -check_draw_elements_data(struct gl_context *ctx, GLsizei count, GLenum elemType, - const void *elements, GLint basevertex) +check_draw_elements_data(struct gl_context *ctx, GLsizei count, + GLenum elemType, const void *elements, + GLint basevertex) { struct gl_vertex_array_object *vao = ctx->Array.VAO; const void *elemMap; GLint i; GLuint k; - if (_mesa_is_bufferobj(ctx->Array.VAO->IndexBufferObj)) { + if (_mesa_is_bufferobj(vao->IndexBufferObj)) { elemMap = ctx->Driver.MapBufferRange(ctx, 0, - ctx->Array.VAO->IndexBufferObj->Size, - GL_MAP_READ_BIT, - ctx->Array.VAO->IndexBufferObj, - MAP_INTERNAL); + vao->IndexBufferObj->Size, + GL_MAP_READ_BIT, + vao->IndexBufferObj, MAP_INTERNAL); elements = ADD_POINTERS(elements, elemMap); } @@ -183,18 +154,17 @@ } /* check element j of each enabled array */ - for (k = 0; k < ARRAY_SIZE(vao->_VertexAttrib); k++) { - check_array_data(ctx, &vao->_VertexAttrib[k], k, j); + for (k = 0; k < VERT_ATTRIB_MAX; k++) { + check_array_data(ctx, vao, k, j); } } if (_mesa_is_bufferobj(vao->IndexBufferObj)) { - ctx->Driver.UnmapBuffer(ctx, ctx->Array.VAO->IndexBufferObj, - MAP_INTERNAL); + ctx->Driver.UnmapBuffer(ctx, vao->IndexBufferObj, MAP_INTERNAL); } - for (k = 0; k < ARRAY_SIZE(vao->_VertexAttrib); k++) { - unmap_array_buffer(ctx, &vao->_VertexAttrib[k]); + for (k = 0; k < VERT_ATTRIB_MAX; k++) { + unmap_array_buffer(ctx, vao, k); } } @@ -216,37 +186,37 @@ print_draw_arrays(struct gl_context *ctx, GLenum mode, GLint start, GLsizei count) { - struct vbo_context *vbo = vbo_context(ctx); - struct vbo_exec_context *exec = &vbo->exec; - struct gl_vertex_array_object *vao = ctx->Array.VAO; - int i; + const struct gl_vertex_array_object *vao = ctx->Array.VAO; printf("vbo_exec_DrawArrays(mode 0x%x, start %d, count %d):\n", - mode, start, count); + mode, start, count); - for (i = 0; i < 32; i++) { - struct gl_buffer_object *bufObj = exec->array.inputs[i]->BufferObj; - GLuint bufName = bufObj->Name; - GLint stride = exec->array.inputs[i]->Stride; - printf("attr %2d: size %d stride %d enabled %d " - "ptr %p Bufobj %u\n", - i, - exec->array.inputs[i]->Size, - stride, - /*exec->array.inputs[i]->Enabled,*/ - vao->_VertexAttrib[VERT_ATTRIB_FF(i)].Enabled, - exec->array.inputs[i]->Ptr, - bufName); + unsigned i; + for (i = 0; i < VERT_ATTRIB_MAX; ++i) { + const struct gl_array_attributes *array = &vao->VertexAttrib[i]; + if (!array->Enabled) + continue; + + const struct gl_vertex_buffer_binding *binding = + &vao->BufferBinding[array->BufferBindingIndex]; + struct gl_buffer_object *bufObj = binding->BufferObj; + + printf("attr %s: size %d stride %d enabled %d " + "ptr %p Bufobj %u\n", + gl_vert_attrib_name((gl_vert_attrib) i), + array->Size, binding->Stride, array->Enabled, + array->Ptr, bufObj->Name); - if (bufName) { + if (_mesa_is_bufferobj(bufObj)) { GLubyte *p = ctx->Driver.MapBufferRange(ctx, 0, bufObj->Size, - GL_MAP_READ_BIT, bufObj, + GL_MAP_READ_BIT, bufObj, MAP_INTERNAL); - int offset = (int) (GLintptr) exec->array.inputs[i]->Ptr; + int offset = (int) (GLintptr) + _mesa_vertex_attrib_address(array, binding); float *f = (float *) (p + offset); int *k = (int *) f; int i; - int n = (count * stride) / 4; + int n = (count * binding->Stride) / 4; if (n > 32) n = 32; printf(" Data at offset %d:\n", offset); @@ -272,8 +242,9 @@ { struct vbo_context *vbo = vbo_context(ctx); struct vbo_exec_context *exec = &vbo->exec; - struct gl_client_array *vertexAttrib = ctx->Array.VAO->_VertexAttrib; - const struct gl_client_array **inputs = &exec->array.inputs[0]; + const struct gl_array_attributes *array = ctx->Array.VAO->VertexAttrib; + struct gl_vertex_array *vertexAttrib = ctx->Array.VAO->_VertexAttrib; + const struct gl_vertex_array **inputs = &exec->array.inputs[0]; GLbitfield64 const_inputs = 0x0; GLuint i; @@ -285,17 +256,17 @@ * are available as per-vertex attributes. */ for (i = 0; i < VERT_ATTRIB_FF_MAX; i++) { - if (vertexAttrib[VERT_ATTRIB_FF(i)].Enabled) - inputs[i] = &vertexAttrib[VERT_ATTRIB_FF(i)]; - else { - inputs[i] = &vbo->currval[VBO_ATTRIB_POS+i]; + if (array[VERT_ATTRIB_FF(i)].Enabled) + inputs[i] = &vertexAttrib[VERT_ATTRIB_FF(i)]; + else { + inputs[i] = &vbo->currval[VBO_ATTRIB_POS + i]; const_inputs |= VERT_BIT(i); } } for (i = 0; i < MAT_ATTRIB_MAX; i++) { - inputs[VERT_ATTRIB_GENERIC(i)] = - &vbo->currval[VBO_ATTRIB_MAT_FRONT_AMBIENT+i]; + inputs[VERT_ATTRIB_GENERIC(i)] = + &vbo->currval[VBO_ATTRIB_MAT_FRONT_AMBIENT + i]; const_inputs |= VERT_BIT_GENERIC(i); } @@ -303,7 +274,8 @@ * slots: */ for (i = MAT_ATTRIB_MAX; i < VERT_ATTRIB_GENERIC_MAX; i++) { - inputs[VERT_ATTRIB_GENERIC(i)] = &vbo->currval[VBO_ATTRIB_GENERIC0+i]; + inputs[VERT_ATTRIB_GENERIC(i)] = + &vbo->currval[VBO_ATTRIB_GENERIC0 + i]; const_inputs |= VERT_BIT_GENERIC(i); } break; @@ -316,7 +288,7 @@ assert(ctx->API != API_OPENGLES); /* In the compatibility profile of desktop OpenGL, the generic[0] - * attribute array aliases and overrides the legacy position array. + * attribute array aliases and overrides the legacy position array. * Otherwise, legacy attributes available in the legacy slots, * generic attributes in the generic slots and materials are not * available as per-vertex attributes. @@ -325,9 +297,9 @@ * slots are considered "magic." */ if (ctx->API == API_OPENGL_COMPAT) { - if (vertexAttrib[VERT_ATTRIB_GENERIC0].Enabled) + if (array[VERT_ATTRIB_GENERIC0].Enabled) inputs[0] = &vertexAttrib[VERT_ATTRIB_GENERIC0]; - else if (vertexAttrib[VERT_ATTRIB_POS].Enabled) + else if (array[VERT_ATTRIB_POS].Enabled) inputs[0] = &vertexAttrib[VERT_ATTRIB_POS]; else { inputs[0] = &vbo->currval[VBO_ATTRIB_POS]; @@ -335,21 +307,21 @@ } for (i = 1; i < VERT_ATTRIB_FF_MAX; i++) { - if (vertexAttrib[VERT_ATTRIB_FF(i)].Enabled) + if (array[VERT_ATTRIB_FF(i)].Enabled) inputs[i] = &vertexAttrib[VERT_ATTRIB_FF(i)]; else { - inputs[i] = &vbo->currval[VBO_ATTRIB_POS+i]; + inputs[i] = &vbo->currval[VBO_ATTRIB_POS + i]; const_inputs |= VERT_BIT_FF(i); } } for (i = 1; i < VERT_ATTRIB_GENERIC_MAX; i++) { - if (vertexAttrib[VERT_ATTRIB_GENERIC(i)].Enabled) + if (array[VERT_ATTRIB_GENERIC(i)].Enabled) inputs[VERT_ATTRIB_GENERIC(i)] = &vertexAttrib[VERT_ATTRIB_GENERIC(i)]; else { inputs[VERT_ATTRIB_GENERIC(i)] = - &vbo->currval[VBO_ATTRIB_GENERIC0+i]; + &vbo->currval[VBO_ATTRIB_GENERIC0 + i]; const_inputs |= VERT_BIT_GENERIC(i); } } @@ -362,19 +334,19 @@ * be enabled. */ for (i = 0; i < VERT_ATTRIB_FF_MAX; i++) { - assert(!vertexAttrib[VERT_ATTRIB_FF(i)].Enabled); + assert(!array[VERT_ATTRIB_FF(i)].Enabled); - inputs[i] = &vbo->currval[VBO_ATTRIB_POS+i]; + inputs[i] = &vbo->currval[VBO_ATTRIB_POS + i]; const_inputs |= VERT_BIT_FF(i); } for (i = 0; i < VERT_ATTRIB_GENERIC_MAX; i++) { - if (vertexAttrib[VERT_ATTRIB_GENERIC(i)].Enabled) + if (array[VERT_ATTRIB_GENERIC(i)].Enabled) inputs[VERT_ATTRIB_GENERIC(i)] = &vertexAttrib[VERT_ATTRIB_GENERIC(i)]; else { inputs[VERT_ATTRIB_GENERIC(i)] = - &vbo->currval[VBO_ATTRIB_GENERIC0+i]; + &vbo->currval[VBO_ATTRIB_GENERIC0 + i]; const_inputs |= VERT_BIT_GENERIC(i); } } @@ -383,7 +355,7 @@ break; } - _mesa_set_varying_vp_inputs( ctx, VERT_BIT_ALL & (~const_inputs) ); + _mesa_set_varying_vp_inputs(ctx, VERT_BIT_ALL & (~const_inputs)); ctx->NewDriverState |= ctx->DriverFlags.NewArray; } @@ -395,7 +367,7 @@ * Note that this might set the _NEW_VARYING_VP_INPUTS dirty flag so state * validation must be done after this call. */ -bool +void vbo_bind_arrays(struct gl_context *ctx) { struct vbo_context *vbo = vbo_context(ctx); @@ -421,16 +393,9 @@ exec->validating = GL_FALSE; } } - - if (!check_buffers_are_unmapped(ctx)) { - _mesa_error(ctx, GL_INVALID_OPERATION, - "draw call (vertex buffers are mapped)"); - return false; - } else { - return true; - } } + /** * Helper function called by the other DrawArrays() functions below. * This is where we handle primitive restart for drawing non-indexed @@ -439,13 +404,13 @@ */ static void vbo_draw_arrays(struct gl_context *ctx, GLenum mode, GLint start, - GLsizei count, GLuint numInstances, GLuint baseInstance) + GLsizei count, GLuint numInstances, GLuint baseInstance, + GLuint drawID) { struct vbo_context *vbo = vbo_context(ctx); struct _mesa_prim prim[2]; - if (!vbo_bind_arrays(ctx)) - return; + vbo_bind_arrays(ctx); /* init most fields to zero */ memset(prim, 0, sizeof(prim)); @@ -454,10 +419,12 @@ prim[0].mode = mode; prim[0].num_instances = numInstances; prim[0].base_instance = baseInstance; + prim[0].draw_id = drawID; prim[0].is_indirect = 0; /* Implement the primitive restart index */ - if (ctx->Array.PrimitiveRestart && !ctx->Array.PrimitiveRestartFixedIndex && + if (ctx->Array.PrimitiveRestart && + !ctx->Array.PrimitiveRestartFixedIndex && ctx->Array.RestartIndex < count) { GLuint primCount = 0; @@ -501,8 +468,7 @@ prim[0].count = count; vbo->draw_prims(ctx, prim, 1, NULL, - GL_TRUE, start, start + count - 1, - NULL, 0, NULL); + GL_TRUE, start, start + count - 1, NULL, 0, NULL); } if (MESA_DEBUG_FLAGS & DEBUG_ALWAYS_FLUSH) { @@ -545,21 +511,20 @@ prim = GL_LINE_STRIP; break; default: - _mesa_error( ctx, GL_INVALID_ENUM, "glEvalMesh1(mode)" ); + _mesa_error(ctx, GL_INVALID_ENUM, "glEvalMesh1(mode)"); return; } /* No effect if vertex maps disabled. */ - if (!ctx->Eval.Map1Vertex4 && - !ctx->Eval.Map1Vertex3) + if (!ctx->Eval.Map1Vertex4 && !ctx->Eval.Map1Vertex3) return; du = ctx->Eval.MapGrid1du; u = ctx->Eval.MapGrid1u1 + i1 * du; CALL_Begin(GET_DISPATCH(), (prim)); - for (i=i1;i<=i2;i++,u+=du) { + for (i = i1; i <= i2; i++, u += du) { CALL_EvalCoord1f(GET_DISPATCH(), (u)); } CALL_End(GET_DISPATCH(), ()); @@ -579,14 +544,13 @@ case GL_FILL: break; default: - _mesa_error( ctx, GL_INVALID_ENUM, "glEvalMesh2(mode)" ); + _mesa_error(ctx, GL_INVALID_ENUM, "glEvalMesh2(mode)"); return; } /* No effect if vertex maps disabled. */ - if (!ctx->Eval.Map2Vertex4 && - !ctx->Eval.Map2Vertex3) + if (!ctx->Eval.Map2Vertex4 && !ctx->Eval.Map2Vertex3) return; du = ctx->Eval.MapGrid2du; @@ -597,37 +561,37 @@ switch (mode) { case GL_POINT: CALL_Begin(GET_DISPATCH(), (GL_POINTS)); - for (v=v1,j=j1;j<=j2;j++,v+=dv) { - for (u=u1,i=i1;i<=i2;i++,u+=du) { - CALL_EvalCoord2f(GET_DISPATCH(), (u, v)); - } + for (v = v1, j = j1; j <= j2; j++, v += dv) { + for (u = u1, i = i1; i <= i2; i++, u += du) { + CALL_EvalCoord2f(GET_DISPATCH(), (u, v)); + } } CALL_End(GET_DISPATCH(), ()); break; case GL_LINE: - for (v=v1,j=j1;j<=j2;j++,v+=dv) { - CALL_Begin(GET_DISPATCH(), (GL_LINE_STRIP)); - for (u=u1,i=i1;i<=i2;i++,u+=du) { - CALL_EvalCoord2f(GET_DISPATCH(), (u, v)); - } - CALL_End(GET_DISPATCH(), ()); - } - for (u=u1,i=i1;i<=i2;i++,u+=du) { - CALL_Begin(GET_DISPATCH(), (GL_LINE_STRIP)); - for (v=v1,j=j1;j<=j2;j++,v+=dv) { - CALL_EvalCoord2f(GET_DISPATCH(), (u, v)); - } - CALL_End(GET_DISPATCH(), ()); + for (v = v1, j = j1; j <= j2; j++, v += dv) { + CALL_Begin(GET_DISPATCH(), (GL_LINE_STRIP)); + for (u = u1, i = i1; i <= i2; i++, u += du) { + CALL_EvalCoord2f(GET_DISPATCH(), (u, v)); + } + CALL_End(GET_DISPATCH(), ()); + } + for (u = u1, i = i1; i <= i2; i++, u += du) { + CALL_Begin(GET_DISPATCH(), (GL_LINE_STRIP)); + for (v = v1, j = j1; j <= j2; j++, v += dv) { + CALL_EvalCoord2f(GET_DISPATCH(), (u, v)); + } + CALL_End(GET_DISPATCH(), ()); } break; case GL_FILL: - for (v=v1,j=j1;j 0) { + if (0) + check_draw_arrays_data(ctx, first[i], count[i]); + + /* The GL_ARB_shader_draw_parameters spec adds the following after the + * pseudo-code describing glMultiDrawArrays: + * + * "The index of the draw ( in the above pseudo-code) may be + * read by a vertex shader as , as described in + * Section 11.1.3.9." + */ + vbo_draw_arrays(ctx, mode, first[i], count[i], 1, 0, i); + + if (0) + print_draw_arrays(ctx, mode, first[i], count[i]); + } + } +} + + /** * Map GL_ELEMENT_ARRAY_BUFFER and print contents. @@ -725,8 +731,8 @@ { const GLvoid *map = ctx->Driver.MapBufferRange(ctx, 0, - ctx->Array.VAO->IndexBufferObj->Size, - GL_MAP_READ_BIT, + ctx->Array.VAO->IndexBufferObj->Size, + GL_MAP_READ_BIT, ctx->Array.VAO->IndexBufferObj, MAP_INTERNAL); switch (type) { @@ -770,8 +776,7 @@ ; } - ctx->Driver.UnmapBuffer(ctx, ctx->Array.VAO->IndexBufferObj, - MAP_INTERNAL); + ctx->Driver.UnmapBuffer(ctx, ctx->Array.VAO->IndexBufferObj, MAP_INTERNAL); } #endif @@ -783,19 +788,18 @@ */ static void vbo_validated_drawrangeelements(struct gl_context *ctx, GLenum mode, - GLboolean index_bounds_valid, - GLuint start, GLuint end, - GLsizei count, GLenum type, - const GLvoid *indices, - GLint basevertex, GLuint numInstances, - GLuint baseInstance) + GLboolean index_bounds_valid, + GLuint start, GLuint end, + GLsizei count, GLenum type, + const GLvoid * indices, + GLint basevertex, GLuint numInstances, + GLuint baseInstance) { struct vbo_context *vbo = vbo_context(ctx); struct _mesa_index_buffer ib; struct _mesa_prim prim[1]; - if (!vbo_bind_arrays(ctx)) - return; + vbo_bind_arrays(ctx); ib.count = count; ib.type = type; @@ -822,7 +826,7 @@ * successive primitives layed out linearly in the vertex arrays. * Unless the vertex arrays are all in a VBO (or locked as with * CVA), the OpenGL semantics imply that we need to re-read or - * re-upload the vertex data on each draw call. + * re-upload the vertex data on each draw call. * * In the case of hardware tnl, we want to avoid starting the * upload at zero, as it will mean every draw call uploads an @@ -860,11 +864,9 @@ * Called by glDrawRangeElementsBaseVertex() in immediate mode. */ static void GLAPIENTRY -vbo_exec_DrawRangeElementsBaseVertex(GLenum mode, - GLuint start, GLuint end, - GLsizei count, GLenum type, - const GLvoid *indices, - GLint basevertex) +vbo_exec_DrawRangeElementsBaseVertex(GLenum mode, GLuint start, GLuint end, + GLsizei count, GLenum type, + const GLvoid * indices, GLint basevertex) { static GLuint warnCount = 0; GLboolean index_bounds_valid = GL_TRUE; @@ -878,16 +880,15 @@ if (MESA_VERBOSE & VERBOSE_DRAW) _mesa_debug(ctx, - "glDrawRangeElementsBaseVertex(%s, %u, %u, %d, %s, %p, %d)\n", - _mesa_enum_to_string(mode), start, end, count, - _mesa_enum_to_string(type), indices, basevertex); + "glDrawRangeElementsBaseVertex(%s, %u, %u, %d, %s, %p, %d)\n", + _mesa_enum_to_string(mode), start, end, count, + _mesa_enum_to_string(type), indices, basevertex); if (!_mesa_validate_DrawRangeElements(ctx, mode, start, end, count, type, indices)) return; - if ((int) end + basevertex < 0 || - start + basevertex >= max_element) { + if ((int) end + basevertex < 0 || start + basevertex >= max_element) { /* The application requested we draw using a range of indices that's * outside the bounds of the current VBO. This is invalid and appears * to give undefined results. The safest thing to do is to simply @@ -924,25 +925,23 @@ if (0) { printf("glDraw[Range]Elements{,BaseVertex}" - "(start %u, end %u, type 0x%x, count %d) ElemBuf %u, " - "base %d\n", - start, end, type, count, - ctx->Array.VAO->IndexBufferObj->Name, - basevertex); + "(start %u, end %u, type 0x%x, count %d) ElemBuf %u, " + "base %d\n", + start, end, type, count, + ctx->Array.VAO->IndexBufferObj->Name, basevertex); } - if ((int) start + basevertex < 0 || - end + basevertex >= max_element) + if ((int) start + basevertex < 0 || end + basevertex >= max_element) index_bounds_valid = GL_FALSE; #if 0 - check_draw_elements_data(ctx, count, type, indices); + check_draw_elements_data(ctx, count, type, indices, basevertex); #else (void) check_draw_elements_data; #endif vbo_validated_drawrangeelements(ctx, mode, index_bounds_valid, start, end, - count, type, indices, basevertex, 1, 0); + count, type, indices, basevertex, 1, 0); } @@ -951,7 +950,7 @@ */ static void GLAPIENTRY vbo_exec_DrawRangeElements(GLenum mode, GLuint start, GLuint end, - GLsizei count, GLenum type, const GLvoid *indices) + GLsizei count, GLenum type, const GLvoid * indices) { if (MESA_VERBOSE & VERBOSE_DRAW) { GET_CURRENT_CONTEXT(ctx); @@ -962,7 +961,7 @@ } vbo_exec_DrawRangeElementsBaseVertex(mode, start, end, count, type, - indices, 0); + indices, 0); } @@ -971,7 +970,7 @@ */ static void GLAPIENTRY vbo_exec_DrawElements(GLenum mode, GLsizei count, GLenum type, - const GLvoid *indices) + const GLvoid * indices) { GET_CURRENT_CONTEXT(ctx); @@ -984,7 +983,7 @@ return; vbo_validated_drawrangeelements(ctx, mode, GL_FALSE, ~0, ~0, - count, type, indices, 0, 1, 0); + count, type, indices, 0, 1, 0); } @@ -993,7 +992,7 @@ */ static void GLAPIENTRY vbo_exec_DrawElementsBaseVertex(GLenum mode, GLsizei count, GLenum type, - const GLvoid *indices, GLint basevertex) + const GLvoid * indices, GLint basevertex) { GET_CURRENT_CONTEXT(ctx); @@ -1006,7 +1005,7 @@ return; vbo_validated_drawrangeelements(ctx, mode, GL_FALSE, ~0, ~0, - count, type, indices, basevertex, 1, 0); + count, type, indices, basevertex, 1, 0); } @@ -1015,7 +1014,7 @@ */ static void GLAPIENTRY vbo_exec_DrawElementsInstanced(GLenum mode, GLsizei count, GLenum type, - const GLvoid *indices, GLsizei numInstances) + const GLvoid * indices, GLsizei numInstances) { GET_CURRENT_CONTEXT(ctx); @@ -1029,7 +1028,7 @@ return; vbo_validated_drawrangeelements(ctx, mode, GL_FALSE, ~0, ~0, - count, type, indices, 0, numInstances, 0); + count, type, indices, 0, numInstances, 0); } @@ -1037,14 +1036,16 @@ * Called by glDrawElementsInstancedBaseVertex() in immediate mode. */ static void GLAPIENTRY -vbo_exec_DrawElementsInstancedBaseVertex(GLenum mode, GLsizei count, GLenum type, - const GLvoid *indices, GLsizei numInstances, - GLint basevertex) +vbo_exec_DrawElementsInstancedBaseVertex(GLenum mode, GLsizei count, + GLenum type, const GLvoid * indices, + GLsizei numInstances, + GLint basevertex) { GET_CURRENT_CONTEXT(ctx); if (MESA_VERBOSE & VERBOSE_DRAW) - _mesa_debug(ctx, "glDrawElementsInstancedBaseVertex(%s, %d, %s, %p, %d; %d)\n", + _mesa_debug(ctx, + "glDrawElementsInstancedBaseVertex(%s, %d, %s, %p, %d; %d)\n", _mesa_enum_to_string(mode), count, _mesa_enum_to_string(type), indices, numInstances, basevertex); @@ -1054,7 +1055,8 @@ return; vbo_validated_drawrangeelements(ctx, mode, GL_FALSE, ~0, ~0, - count, type, indices, basevertex, numInstances, 0); + count, type, indices, + basevertex, numInstances, 0); } @@ -1062,14 +1064,18 @@ * Called by glDrawElementsInstancedBaseInstance() in immediate mode. */ static void GLAPIENTRY -vbo_exec_DrawElementsInstancedBaseInstance(GLenum mode, GLsizei count, GLenum type, - const GLvoid *indices, GLsizei numInstances, +vbo_exec_DrawElementsInstancedBaseInstance(GLenum mode, GLsizei count, + GLenum type, + const GLvoid *indices, + GLsizei numInstances, GLuint baseInstance) { GET_CURRENT_CONTEXT(ctx); if (MESA_VERBOSE & VERBOSE_DRAW) - _mesa_debug(ctx, "glDrawElementsInstancedBaseInstance(%s, %d, %s, %p, %d, %d)\n", + _mesa_debug(ctx, + "glDrawElementsInstancedBaseInstance" + "(%s, %d, %s, %p, %d, %d)\n", _mesa_enum_to_string(mode), count, _mesa_enum_to_string(type), indices, numInstances, baseInstance); @@ -1088,14 +1094,20 @@ * Called by glDrawElementsInstancedBaseVertexBaseInstance() in immediate mode. */ static void GLAPIENTRY -vbo_exec_DrawElementsInstancedBaseVertexBaseInstance(GLenum mode, GLsizei count, GLenum type, - const GLvoid *indices, GLsizei numInstances, - GLint basevertex, GLuint baseInstance) +vbo_exec_DrawElementsInstancedBaseVertexBaseInstance(GLenum mode, + GLsizei count, + GLenum type, + const GLvoid *indices, + GLsizei numInstances, + GLint basevertex, + GLuint baseInstance) { GET_CURRENT_CONTEXT(ctx); if (MESA_VERBOSE & VERBOSE_DRAW) - _mesa_debug(ctx, "glDrawElementsInstancedBaseVertexBaseInstance(%s, %d, %s, %p, %d, %d, %d)\n", + _mesa_debug(ctx, + "glDrawElementsInstancedBaseVertexBaseInstance" + "(%s, %d, %s, %p, %d, %d, %d)\n", _mesa_enum_to_string(mode), count, _mesa_enum_to_string(type), indices, numInstances, basevertex, baseInstance); @@ -1105,8 +1117,8 @@ return; vbo_validated_drawrangeelements(ctx, mode, GL_FALSE, ~0, ~0, - count, type, indices, basevertex, numInstances, - baseInstance); + count, type, indices, basevertex, + numInstances, baseInstance); } @@ -1117,10 +1129,9 @@ */ static void vbo_validated_multidrawelements(struct gl_context *ctx, GLenum mode, - const GLsizei *count, GLenum type, - const GLvoid * const *indices, - GLsizei primcount, - const GLint *basevertex) + const GLsizei *count, GLenum type, + const GLvoid * const *indices, + GLsizei primcount, const GLint *basevertex) { struct vbo_context *vbo = vbo_context(ctx); struct _mesa_index_buffer ib; @@ -1139,17 +1150,14 @@ return; } - if (!vbo_bind_arrays(ctx)) { - free(prim); - return; - } + vbo_bind_arrays(ctx); - min_index_ptr = (uintptr_t)indices[0]; + min_index_ptr = (uintptr_t) indices[0]; max_index_ptr = 0; for (i = 0; i < primcount; i++) { - min_index_ptr = MIN2(min_index_ptr, (uintptr_t)indices[i]); - max_index_ptr = MAX2(max_index_ptr, (uintptr_t)indices[i] + - index_type_size * count[i]); + min_index_ptr = MIN2(min_index_ptr, (uintptr_t) indices[i]); + max_index_ptr = MAX2(max_index_ptr, (uintptr_t) indices[i] + + index_type_size * count[i]); } /* Check if we can handle this thing as a bunch of index offsets from the @@ -1160,10 +1168,11 @@ */ if (index_type_size != 1) { for (i = 0; i < primcount; i++) { - if ((((uintptr_t)indices[i] - min_index_ptr) % index_type_size) != 0) { - fallback = GL_TRUE; - break; - } + if ((((uintptr_t) indices[i] - min_index_ptr) % index_type_size) != + 0) { + fallback = GL_TRUE; + break; + } } } @@ -1188,58 +1197,59 @@ ib.count = (max_index_ptr - min_index_ptr) / index_type_size; ib.type = type; ib.obj = ctx->Array.VAO->IndexBufferObj; - ib.ptr = (void *)min_index_ptr; + ib.ptr = (void *) min_index_ptr; for (i = 0; i < primcount; i++) { - prim[i].begin = (i == 0); - prim[i].end = (i == primcount - 1); - prim[i].weak = 0; - prim[i].pad = 0; - prim[i].mode = mode; - prim[i].start = ((uintptr_t)indices[i] - min_index_ptr) / index_type_size; - prim[i].count = count[i]; - prim[i].indexed = 1; + prim[i].begin = (i == 0); + prim[i].end = (i == primcount - 1); + prim[i].weak = 0; + prim[i].pad = 0; + prim[i].mode = mode; + prim[i].start = + ((uintptr_t) indices[i] - min_index_ptr) / index_type_size; + prim[i].count = count[i]; + prim[i].indexed = 1; prim[i].num_instances = 1; prim[i].base_instance = 0; prim[i].draw_id = i; prim[i].is_indirect = 0; - if (basevertex != NULL) - prim[i].basevertex = basevertex[i]; - else - prim[i].basevertex = 0; + if (basevertex != NULL) + prim[i].basevertex = basevertex[i]; + else + prim[i].basevertex = 0; } vbo->draw_prims(ctx, prim, primcount, &ib, false, ~0, ~0, NULL, 0, NULL); - } else { + } + else { /* render one prim at a time */ for (i = 0; i < primcount; i++) { - if (count[i] == 0) - continue; - ib.count = count[i]; - ib.type = type; - ib.obj = ctx->Array.VAO->IndexBufferObj; - ib.ptr = indices[i]; - - prim[0].begin = 1; - prim[0].end = 1; - prim[0].weak = 0; - prim[0].pad = 0; - prim[0].mode = mode; - prim[0].start = 0; - prim[0].count = count[i]; - prim[0].indexed = 1; + if (count[i] == 0) + continue; + ib.count = count[i]; + ib.type = type; + ib.obj = ctx->Array.VAO->IndexBufferObj; + ib.ptr = indices[i]; + + prim[0].begin = 1; + prim[0].end = 1; + prim[0].weak = 0; + prim[0].pad = 0; + prim[0].mode = mode; + prim[0].start = 0; + prim[0].count = count[i]; + prim[0].indexed = 1; prim[0].num_instances = 1; prim[0].base_instance = 0; prim[0].draw_id = i; prim[0].is_indirect = 0; - if (basevertex != NULL) - prim[0].basevertex = basevertex[i]; - else - prim[0].basevertex = 0; + if (basevertex != NULL) + prim[0].basevertex = basevertex[i]; + else + prim[0].basevertex = 0; - vbo->draw_prims(ctx, prim, 1, &ib, - false, ~0, ~0, NULL, 0, NULL); + vbo->draw_prims(ctx, prim, 1, &ib, false, ~0, ~0, NULL, 0, NULL); } } @@ -1253,9 +1263,8 @@ static void GLAPIENTRY vbo_exec_MultiDrawElements(GLenum mode, - const GLsizei *count, GLenum type, - const GLvoid * const *indices, - GLsizei primcount) + const GLsizei *count, GLenum type, + const GLvoid * const *indices, GLsizei primcount) { GET_CURRENT_CONTEXT(ctx); @@ -1264,16 +1273,16 @@ return; vbo_validated_multidrawelements(ctx, mode, count, type, indices, primcount, - NULL); + NULL); } static void GLAPIENTRY vbo_exec_MultiDrawElementsBaseVertex(GLenum mode, - const GLsizei *count, GLenum type, - const GLvoid * const *indices, - GLsizei primcount, - const GLsizei *basevertex) + const GLsizei *count, GLenum type, + const GLvoid * const *indices, + GLsizei primcount, + const GLsizei *basevertex) { GET_CURRENT_CONTEXT(ctx); @@ -1282,16 +1291,16 @@ return; vbo_validated_multidrawelements(ctx, mode, count, type, indices, primcount, - basevertex); + basevertex); } + static void vbo_draw_transform_feedback(struct gl_context *ctx, GLenum mode, struct gl_transform_feedback_object *obj, GLuint stream, GLuint numInstances) { struct vbo_context *vbo = vbo_context(ctx); - struct vbo_exec_context *exec = &vbo->exec; struct _mesa_prim prim[2]; if (!_mesa_validate_DrawTransformFeedback(ctx, mode, obj, stream, @@ -1301,14 +1310,14 @@ if (ctx->Driver.GetTransformFeedbackVertexCount && (ctx->Const.AlwaysUseGetTransformFeedbackVertexCount || - !vbo_all_varyings_in_vbos(exec->array.inputs))) { - GLsizei n = ctx->Driver.GetTransformFeedbackVertexCount(ctx, obj, stream); - vbo_draw_arrays(ctx, mode, 0, n, numInstances, 0); + !_mesa_all_varyings_in_vbos(ctx->Array.VAO))) { + GLsizei n = + ctx->Driver.GetTransformFeedbackVertexCount(ctx, obj, stream); + vbo_draw_arrays(ctx, mode, 0, n, numInstances, 0, 0); return; } - if (!vbo_bind_arrays(ctx)) - return; + vbo_bind_arrays(ctx); /* init most fields to zero */ memset(prim, 0, sizeof(prim)); @@ -1323,14 +1332,14 @@ * (like in DrawArrays), but we have no way to know how many vertices * will be rendered. */ - vbo->draw_prims(ctx, prim, 1, NULL, - GL_FALSE, ~0, ~0, obj, stream, NULL); + vbo->draw_prims(ctx, prim, 1, NULL, GL_FALSE, ~0, ~0, obj, stream, NULL); if (MESA_DEBUG_FLAGS & DEBUG_ALWAYS_FLUSH) { _mesa_flush(ctx); } } + /** * Like DrawArrays, but take the count from a transform feedback object. * \param mode GL_POINTS, GL_LINES, GL_TRIANGLE_STRIP, etc. @@ -1353,6 +1362,7 @@ vbo_draw_transform_feedback(ctx, mode, obj, 0, 1); } + static void GLAPIENTRY vbo_exec_DrawTransformFeedbackStream(GLenum mode, GLuint name, GLuint stream) { @@ -1367,6 +1377,7 @@ vbo_draw_transform_feedback(ctx, mode, obj, stream, 1); } + static void GLAPIENTRY vbo_exec_DrawTransformFeedbackInstanced(GLenum mode, GLuint name, GLsizei primcount) @@ -1382,9 +1393,11 @@ vbo_draw_transform_feedback(ctx, mode, obj, 0, primcount); } + static void GLAPIENTRY vbo_exec_DrawTransformFeedbackStreamInstanced(GLenum mode, GLuint name, - GLuint stream, GLsizei primcount) + GLuint stream, + GLsizei primcount) { GET_CURRENT_CONTEXT(ctx); struct gl_transform_feedback_object *obj = @@ -1398,24 +1411,25 @@ vbo_draw_transform_feedback(ctx, mode, obj, stream, primcount); } + static void vbo_validated_drawarraysindirect(struct gl_context *ctx, GLenum mode, const GLvoid *indirect) { struct vbo_context *vbo = vbo_context(ctx); - if (!vbo_bind_arrays(ctx)) - return; + vbo_bind_arrays(ctx); vbo->draw_indirect_prims(ctx, mode, - ctx->DrawIndirectBuffer, (GLsizeiptr)indirect, - 1 /* draw_count */, 16 /* stride */, + ctx->DrawIndirectBuffer, (GLsizeiptr) indirect, + 1 /* draw_count */ , 16 /* stride */ , NULL, 0, NULL); if (MESA_DEBUG_FLAGS & DEBUG_ALWAYS_FLUSH) _mesa_flush(ctx); } + static void vbo_validated_multidrawarraysindirect(struct gl_context *ctx, GLenum mode, @@ -1423,23 +1437,21 @@ GLsizei primcount, GLsizei stride) { struct vbo_context *vbo = vbo_context(ctx); - GLsizeiptr offset = (GLsizeiptr)indirect; + GLsizeiptr offset = (GLsizeiptr) indirect; if (primcount == 0) return; - if (!vbo_bind_arrays(ctx)) - return; + vbo_bind_arrays(ctx); - vbo->draw_indirect_prims(ctx, mode, - ctx->DrawIndirectBuffer, offset, - primcount, stride, - NULL, 0, NULL); + vbo->draw_indirect_prims(ctx, mode, ctx->DrawIndirectBuffer, offset, + primcount, stride, NULL, 0, NULL); if (MESA_DEBUG_FLAGS & DEBUG_ALWAYS_FLUSH) _mesa_flush(ctx); } + static void vbo_validated_drawelementsindirect(struct gl_context *ctx, GLenum mode, GLenum type, @@ -1448,24 +1460,23 @@ struct vbo_context *vbo = vbo_context(ctx); struct _mesa_index_buffer ib; - if (!vbo_bind_arrays(ctx)) - return; + vbo_bind_arrays(ctx); - ib.count = 0; /* unknown */ + ib.count = 0; /* unknown */ ib.type = type; ib.obj = ctx->Array.VAO->IndexBufferObj; ib.ptr = NULL; vbo->draw_indirect_prims(ctx, mode, - ctx->DrawIndirectBuffer, (GLsizeiptr)indirect, - 1 /* draw_count */, 20 /* stride */, - NULL, 0, - &ib); + ctx->DrawIndirectBuffer, (GLsizeiptr) indirect, + 1 /* draw_count */ , 20 /* stride */ , + NULL, 0, &ib); if (MESA_DEBUG_FLAGS & DEBUG_ALWAYS_FLUSH) _mesa_flush(ctx); } + static void vbo_validated_multidrawelementsindirect(struct gl_context *ctx, GLenum mode, GLenum type, @@ -1474,31 +1485,29 @@ { struct vbo_context *vbo = vbo_context(ctx); struct _mesa_index_buffer ib; - GLsizeiptr offset = (GLsizeiptr)indirect; + GLsizeiptr offset = (GLsizeiptr) indirect; if (primcount == 0) return; - if (!vbo_bind_arrays(ctx)) - return; + vbo_bind_arrays(ctx); /* NOTE: IndexBufferObj is guaranteed to be a VBO. */ - ib.count = 0; /* unknown */ + ib.count = 0; /* unknown */ ib.type = type; ib.obj = ctx->Array.VAO->IndexBufferObj; ib.ptr = NULL; vbo->draw_indirect_prims(ctx, mode, ctx->DrawIndirectBuffer, offset, - primcount, stride, - NULL, 0, - &ib); + primcount, stride, NULL, 0, &ib); if (MESA_DEBUG_FLAGS & DEBUG_ALWAYS_FLUSH) _mesa_flush(ctx); } + /** * Like [Multi]DrawArrays/Elements, but they take most arguments from * a buffer object. @@ -1518,9 +1527,9 @@ vbo_validated_drawarraysindirect(ctx, mode, indirect); } + static void GLAPIENTRY -vbo_exec_DrawElementsIndirect(GLenum mode, GLenum type, - const GLvoid *indirect) +vbo_exec_DrawElementsIndirect(GLenum mode, GLenum type, const GLvoid *indirect) { GET_CURRENT_CONTEXT(ctx); @@ -1535,9 +1544,9 @@ vbo_validated_drawelementsindirect(ctx, mode, type, indirect); } + static void GLAPIENTRY -vbo_exec_MultiDrawArraysIndirect(GLenum mode, - const GLvoid *indirect, +vbo_exec_MultiDrawArraysIndirect(GLenum mode, const GLvoid *indirect, GLsizei primcount, GLsizei stride) { GET_CURRENT_CONTEXT(ctx); @@ -1548,18 +1557,17 @@ /* If is zero, the array elements are treated as tightly packed. */ if (stride == 0) - stride = 4 * sizeof(GLuint); /* sizeof(DrawArraysIndirectCommand) */ + stride = 4 * sizeof(GLuint); /* sizeof(DrawArraysIndirectCommand) */ - if (!_mesa_validate_MultiDrawArraysIndirect(ctx, mode, - indirect, + if (!_mesa_validate_MultiDrawArraysIndirect(ctx, mode, indirect, primcount, stride)) return; - vbo_validated_multidrawarraysindirect(ctx, mode, - indirect, + vbo_validated_multidrawarraysindirect(ctx, mode, indirect, primcount, stride); } + static void GLAPIENTRY vbo_exec_MultiDrawElementsIndirect(GLenum mode, GLenum type, const GLvoid *indirect, @@ -1574,18 +1582,17 @@ /* If is zero, the array elements are treated as tightly packed. */ if (stride == 0) - stride = 5 * sizeof(GLuint); /* sizeof(DrawElementsIndirectCommand) */ + stride = 5 * sizeof(GLuint); /* sizeof(DrawElementsIndirectCommand) */ - if (!_mesa_validate_MultiDrawElementsIndirect(ctx, mode, type, - indirect, + if (!_mesa_validate_MultiDrawElementsIndirect(ctx, mode, type, indirect, primcount, stride)) return; - vbo_validated_multidrawelementsindirect(ctx, mode, type, - indirect, + vbo_validated_multidrawelementsindirect(ctx, mode, type, indirect, primcount, stride); } + static void vbo_validated_multidrawarraysindirectcount(struct gl_context *ctx, GLenum mode, @@ -1600,19 +1607,18 @@ if (maxdrawcount == 0) return; - if (!vbo_bind_arrays(ctx)) - return; + vbo_bind_arrays(ctx); vbo->draw_indirect_prims(ctx, mode, ctx->DrawIndirectBuffer, offset, maxdrawcount, stride, - ctx->ParameterBuffer, drawcount, - NULL); + ctx->ParameterBuffer, drawcount, NULL); if (MESA_DEBUG_FLAGS & DEBUG_ALWAYS_FLUSH) _mesa_flush(ctx); } + static void vbo_validated_multidrawelementsindirectcount(struct gl_context *ctx, GLenum mode, GLenum type, @@ -1623,17 +1629,16 @@ { struct vbo_context *vbo = vbo_context(ctx); struct _mesa_index_buffer ib; - GLsizeiptr offset = (GLsizeiptr)indirect; + GLsizeiptr offset = (GLsizeiptr) indirect; if (maxdrawcount == 0) return; - if (!vbo_bind_arrays(ctx)) - return; + vbo_bind_arrays(ctx); /* NOTE: IndexBufferObj is guaranteed to be a VBO. */ - ib.count = 0; /* unknown */ + ib.count = 0; /* unknown */ ib.type = type; ib.obj = ctx->Array.VAO->IndexBufferObj; ib.ptr = NULL; @@ -1641,16 +1646,15 @@ vbo->draw_indirect_prims(ctx, mode, ctx->DrawIndirectBuffer, offset, maxdrawcount, stride, - ctx->ParameterBuffer, drawcount, - &ib); + ctx->ParameterBuffer, drawcount, &ib); if (MESA_DEBUG_FLAGS & DEBUG_ALWAYS_FLUSH) _mesa_flush(ctx); } + static void GLAPIENTRY -vbo_exec_MultiDrawArraysIndirectCount(GLenum mode, - GLintptr indirect, +vbo_exec_MultiDrawArraysIndirectCount(GLenum mode, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride) { @@ -1659,27 +1663,27 @@ if (MESA_VERBOSE & VERBOSE_DRAW) _mesa_debug(ctx, "glMultiDrawArraysIndirectCountARB" "(%s, %lx, %lx, %i, %i)\n", - _mesa_enum_to_string(mode), indirect, - drawcount, maxdrawcount, stride); + _mesa_enum_to_string(mode), + (unsigned long) indirect, (unsigned long) drawcount, + maxdrawcount, stride); /* If is zero, the array elements are treated as tightly packed. */ if (stride == 0) - stride = 4 * sizeof(GLuint); /* sizeof(DrawArraysIndirectCommand) */ + stride = 4 * sizeof(GLuint); /* sizeof(DrawArraysIndirectCommand) */ if (!_mesa_validate_MultiDrawArraysIndirectCount(ctx, mode, indirect, drawcount, maxdrawcount, stride)) return; - vbo_validated_multidrawarraysindirectcount(ctx, mode, - indirect, drawcount, + vbo_validated_multidrawarraysindirectcount(ctx, mode, indirect, drawcount, maxdrawcount, stride); } + static void GLAPIENTRY vbo_exec_MultiDrawElementsIndirectCount(GLenum mode, GLenum type, - GLintptr indirect, - GLintptr drawcount, + GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride) { GET_CURRENT_CONTEXT(ctx); @@ -1687,22 +1691,22 @@ if (MESA_VERBOSE & VERBOSE_DRAW) _mesa_debug(ctx, "glMultiDrawElementsIndirectCountARB" "(%s, %s, %lx, %lx, %i, %i)\n", - _mesa_enum_to_string(mode), - _mesa_enum_to_string(type), indirect, - drawcount, maxdrawcount, stride); + _mesa_enum_to_string(mode), _mesa_enum_to_string(type), + (unsigned long) indirect, (unsigned long) drawcount, + maxdrawcount, stride); /* If is zero, the array elements are treated as tightly packed. */ if (stride == 0) - stride = 5 * sizeof(GLuint); /* sizeof(DrawElementsIndirectCommand) */ + stride = 5 * sizeof(GLuint); /* sizeof(DrawElementsIndirectCommand) */ if (!_mesa_validate_MultiDrawElementsIndirectCount(ctx, mode, type, indirect, drawcount, maxdrawcount, stride)) return; - vbo_validated_multidrawelementsindirectcount(ctx, mode, type, - indirect, drawcount, - maxdrawcount, stride); + vbo_validated_multidrawelementsindirectcount(ctx, mode, type, indirect, + drawcount, maxdrawcount, + stride); } @@ -1720,6 +1724,7 @@ SET_DrawRangeElements(exec, vbo_exec_DrawRangeElements); } + SET_MultiDrawArrays(exec, vbo_exec_MultiDrawArrays); SET_MultiDrawElementsEXT(exec, vbo_exec_MultiDrawElements); if (ctx->API == API_OPENGL_COMPAT) { @@ -1731,18 +1736,24 @@ if (ctx->API != API_OPENGLES && ctx->Extensions.ARB_draw_elements_base_vertex) { SET_DrawElementsBaseVertex(exec, vbo_exec_DrawElementsBaseVertex); - SET_MultiDrawElementsBaseVertex(exec, vbo_exec_MultiDrawElementsBaseVertex); + SET_MultiDrawElementsBaseVertex(exec, + vbo_exec_MultiDrawElementsBaseVertex); if (_mesa_is_desktop_gl(ctx) || _mesa_is_gles3(ctx)) { - SET_DrawRangeElementsBaseVertex(exec, vbo_exec_DrawRangeElementsBaseVertex); - SET_DrawElementsInstancedBaseVertex(exec, vbo_exec_DrawElementsInstancedBaseVertex); + SET_DrawRangeElementsBaseVertex(exec, + vbo_exec_DrawRangeElementsBaseVertex); + SET_DrawElementsInstancedBaseVertex(exec, + vbo_exec_DrawElementsInstancedBaseVertex); } } if (_mesa_is_desktop_gl(ctx) || _mesa_is_gles3(ctx)) { - SET_DrawArraysInstancedBaseInstance(exec, vbo_exec_DrawArraysInstancedBaseInstance); - SET_DrawElementsInstancedBaseInstance(exec, vbo_exec_DrawElementsInstancedBaseInstance); - SET_DrawElementsInstancedBaseVertexBaseInstance(exec, vbo_exec_DrawElementsInstancedBaseVertexBaseInstance); + SET_DrawArraysInstancedBaseInstance(exec, + vbo_exec_DrawArraysInstancedBaseInstance); + SET_DrawElementsInstancedBaseInstance(exec, + vbo_exec_DrawElementsInstancedBaseInstance); + SET_DrawElementsInstancedBaseVertexBaseInstance(exec, + vbo_exec_DrawElementsInstancedBaseVertexBaseInstance); } if (ctx->API == API_OPENGL_CORE || _mesa_is_gles31(ctx)) { @@ -1753,8 +1764,10 @@ if (ctx->API == API_OPENGL_CORE) { SET_MultiDrawArraysIndirect(exec, vbo_exec_MultiDrawArraysIndirect); SET_MultiDrawElementsIndirect(exec, vbo_exec_MultiDrawElementsIndirect); - SET_MultiDrawArraysIndirectCountARB(exec, vbo_exec_MultiDrawArraysIndirectCount); - SET_MultiDrawElementsIndirectCountARB(exec, vbo_exec_MultiDrawElementsIndirectCount); + SET_MultiDrawArraysIndirectCountARB(exec, + vbo_exec_MultiDrawArraysIndirectCount); + SET_MultiDrawElementsIndirectCountARB(exec, + vbo_exec_MultiDrawElementsIndirectCount); } if (_mesa_is_desktop_gl(ctx) || _mesa_is_gles3(ctx)) { @@ -1764,9 +1777,12 @@ if (_mesa_is_desktop_gl(ctx)) { SET_DrawTransformFeedback(exec, vbo_exec_DrawTransformFeedback); - SET_DrawTransformFeedbackStream(exec, vbo_exec_DrawTransformFeedbackStream); - SET_DrawTransformFeedbackInstanced(exec, vbo_exec_DrawTransformFeedbackInstanced); - SET_DrawTransformFeedbackStreamInstanced(exec, vbo_exec_DrawTransformFeedbackStreamInstanced); + SET_DrawTransformFeedbackStream(exec, + vbo_exec_DrawTransformFeedbackStream); + SET_DrawTransformFeedbackInstanced(exec, + vbo_exec_DrawTransformFeedbackInstanced); + SET_DrawTransformFeedbackStreamInstanced(exec, + vbo_exec_DrawTransformFeedbackStreamInstanced); } } @@ -1784,6 +1800,7 @@ vbo_exec_DrawArrays(mode, first, count); } + void GLAPIENTRY _mesa_DrawArraysInstanced(GLenum mode, GLint first, GLsizei count, GLsizei primcount) @@ -1791,6 +1808,7 @@ vbo_exec_DrawArraysInstanced(mode, first, count, primcount); } + void GLAPIENTRY _mesa_DrawElements(GLenum mode, GLsizei count, GLenum type, const GLvoid *indices) @@ -1801,7 +1819,7 @@ void GLAPIENTRY _mesa_DrawElementsBaseVertex(GLenum mode, GLsizei count, GLenum type, - const GLvoid *indices, GLint basevertex) + const GLvoid *indices, GLint basevertex) { vbo_exec_DrawElementsBaseVertex(mode, count, type, indices, basevertex); } @@ -1809,7 +1827,7 @@ void GLAPIENTRY _mesa_DrawRangeElements(GLenum mode, GLuint start, GLuint end, GLsizei count, - GLenum type, const GLvoid *indices) + GLenum type, const GLvoid * indices) { vbo_exec_DrawRangeElements(mode, start, end, count, type, indices); } @@ -1817,17 +1835,17 @@ void GLAPIENTRY _mesa_DrawRangeElementsBaseVertex(GLenum mode, GLuint start, GLuint end, - GLsizei count, GLenum type, - const GLvoid *indices, GLint basevertex) + GLsizei count, GLenum type, + const GLvoid *indices, GLint basevertex) { vbo_exec_DrawRangeElementsBaseVertex(mode, start, end, count, type, - indices, basevertex); + indices, basevertex); } void GLAPIENTRY _mesa_MultiDrawElementsEXT(GLenum mode, const GLsizei *count, GLenum type, - const GLvoid **indices, GLsizei primcount) + const GLvoid ** indices, GLsizei primcount) { vbo_exec_MultiDrawElements(mode, count, type, indices, primcount); } @@ -1835,14 +1853,15 @@ void GLAPIENTRY _mesa_MultiDrawElementsBaseVertex(GLenum mode, - const GLsizei *count, GLenum type, - const GLvoid **indices, GLsizei primcount, - const GLint *basevertex) + const GLsizei *count, GLenum type, + const GLvoid **indices, GLsizei primcount, + const GLint *basevertex) { vbo_exec_MultiDrawElementsBaseVertex(mode, count, type, indices, - primcount, basevertex); + primcount, basevertex); } + void GLAPIENTRY _mesa_DrawTransformFeedback(GLenum mode, GLuint name) { diff -Nru mesa-12.0.6/src/mesa/vbo/vbo_exec_draw.c mesa-17.0.7/src/mesa/vbo/vbo_exec_draw.c --- mesa-12.0.6/src/mesa/vbo/vbo_exec_draw.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/vbo/vbo_exec_draw.c 2017-06-01 10:37:10.000000000 +0000 @@ -25,6 +25,7 @@ * Keith Whitwell */ +#include #include #include "main/glheader.h" #include "main/bufferobj.h" @@ -173,10 +174,11 @@ { struct vbo_context *vbo = vbo_context(ctx); struct vbo_exec_context *exec = &vbo->exec; - struct gl_client_array *arrays = exec->vtx.arrays; + struct gl_vertex_array *arrays = exec->vtx.arrays; const GLuint *map; GLuint attr; GLbitfield64 varying_inputs = 0x0; + bool swap_pos = false; /* Install the default (ie Current) attributes first, then overlay * all active ones. @@ -207,11 +209,16 @@ /* check if VERT_ATTRIB_POS is not read but VERT_BIT_GENERIC0 is read. * In that case we effectively need to route the data from * glVertexAttrib(0, val) calls to feed into the GENERIC0 input. + * The original state gets essentially restored below. */ - if ((ctx->VertexProgram._Current->Base.InputsRead & VERT_BIT_POS) == 0 && - (ctx->VertexProgram._Current->Base.InputsRead & VERT_BIT_GENERIC0)) { + if ((ctx->VertexProgram._Current->info.inputs_read & + VERT_BIT_POS) == 0 && + (ctx->VertexProgram._Current->info.inputs_read & + VERT_BIT_GENERIC0)) { + swap_pos = true; exec->vtx.inputs[VERT_ATTRIB_GENERIC0] = exec->vtx.inputs[0]; exec->vtx.attrsz[VERT_ATTRIB_GENERIC0] = exec->vtx.attrsz[0]; + exec->vtx.attrtype[VERT_ATTRIB_GENERIC0] = exec->vtx.attrtype[0]; exec->vtx.attrptr[VERT_ATTRIB_GENERIC0] = exec->vtx.attrptr[0]; exec->vtx.attrsz[0] = 0; } @@ -245,12 +252,10 @@ } arrays[attr].Size = exec->vtx.attrsz[src]; arrays[attr].StrideB = exec->vtx.vertex_size * sizeof(GLfloat); - arrays[attr].Stride = exec->vtx.vertex_size * sizeof(GLfloat); arrays[attr].Type = exec->vtx.attrtype[src]; arrays[attr].Integer = vbo_attrtype_to_integer_flag(exec->vtx.attrtype[src]); arrays[attr].Format = GL_RGBA; - arrays[attr].Enabled = 1; arrays[attr]._ElementSize = arrays[attr].Size * sizeof(GLfloat); _mesa_reference_buffer_object(ctx, &arrays[attr].BufferObj, @@ -260,6 +265,16 @@ } } + /* In case we swapped the position and generic0 attribute. + * Restore the original setting of the vtx.* variables. + * They are still needed with the original order and settings in case + * of a split primitive. + */ + if (swap_pos) { + exec->vtx.attrsz[0] = exec->vtx.attrsz[VERT_ATTRIB_GENERIC0]; + exec->vtx.attrsz[VERT_ATTRIB_GENERIC0] = 0; + } + _mesa_set_varying_vp_inputs( ctx, varying_inputs ); ctx->NewDriverState |= ctx->DriverFlags.NewArray; } diff -Nru mesa-12.0.6/src/mesa/vbo/vbo_exec.h mesa-17.0.7/src/mesa/vbo/vbo_exec.h --- mesa-12.0.6/src/mesa/vbo/vbo_exec.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/vbo/vbo_exec.h 2017-06-01 10:37:10.000000000 +0000 @@ -101,6 +101,7 @@ GLuint max_vert; /**< Max number of vertices allowed in buffer */ struct vbo_exec_copied_vtx copied; + GLbitfield64 enabled; /**< mask of enabled vbo arrays. */ GLubyte attrsz[VBO_ATTRIB_MAX]; /**< nr. of attrib components (1..4) */ GLenum attrtype[VBO_ATTRIB_MAX]; /**< GL_FLOAT, GL_DOUBLE, GL_INT, etc */ GLubyte active_sz[VBO_ATTRIB_MAX]; /**< attrib size (nr. 32-bit words) */ @@ -108,13 +109,13 @@ /** pointers into the current 'vertex' array, declared above */ fi_type *attrptr[VBO_ATTRIB_MAX]; - struct gl_client_array arrays[VERT_ATTRIB_MAX]; + struct gl_vertex_array arrays[VERT_ATTRIB_MAX]; /* According to program mode, the values above plus current * values are squashed down to the 32 attributes passed to the * vertex program below: */ - const struct gl_client_array *inputs[VERT_ATTRIB_MAX]; + const struct gl_vertex_array *inputs[VERT_ATTRIB_MAX]; } vtx; struct { @@ -128,7 +129,7 @@ * mode, etc. These are the attributes as seen by vertex * programs: */ - const struct gl_client_array *inputs[VERT_ATTRIB_MAX]; + const struct gl_vertex_array *inputs[VERT_ATTRIB_MAX]; GLboolean recalculate_inputs; } array; @@ -151,7 +152,6 @@ /* Internal functions: */ - void vbo_exec_vtx_init( struct vbo_exec_context *exec ); void vbo_exec_vtx_destroy( struct vbo_exec_context *exec ); diff -Nru mesa-12.0.6/src/mesa/vbo/vbo.h mesa-17.0.7/src/mesa/vbo/vbo.h --- mesa-12.0.6/src/mesa/vbo/vbo.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/vbo/vbo.h 2017-06-01 10:37:10.000000000 +0000 @@ -39,7 +39,7 @@ extern "C" { #endif -struct gl_client_array; +struct gl_vertex_array; struct gl_context; struct gl_transform_feedback_object; @@ -139,7 +139,7 @@ void vbo_split_prims( struct gl_context *ctx, - const struct gl_client_array *arrays[], + const struct gl_vertex_array *arrays[], const struct _mesa_prim *prim, GLuint nr_prims, const struct _mesa_index_buffer *ib, @@ -151,11 +151,11 @@ /* Helpers for dealing translating away non-zero min_index. */ -GLboolean vbo_all_varyings_in_vbos( const struct gl_client_array *arrays[] ); -GLboolean vbo_any_varyings_in_vbos( const struct gl_client_array *arrays[] ); +GLboolean vbo_all_varyings_in_vbos( const struct gl_vertex_array *arrays[] ); +GLboolean vbo_any_varyings_in_vbos( const struct gl_vertex_array *arrays[] ); void vbo_rebase_prims( struct gl_context *ctx, - const struct gl_client_array *arrays[], + const struct gl_vertex_array *arrays[], const struct _mesa_prim *prim, GLuint nr_prims, const struct _mesa_index_buffer *ib, @@ -197,7 +197,7 @@ void vbo_set_indirect_draw_func(struct gl_context *ctx, vbo_indirect_draw_func func); -bool vbo_bind_arrays(struct gl_context *ctx); +void vbo_bind_arrays(struct gl_context *ctx); size_t vbo_count_tessellated_primitives(GLenum mode, GLuint count, diff -Nru mesa-12.0.6/src/mesa/vbo/vbo_rebase.c mesa-17.0.7/src/mesa/vbo/vbo_rebase.c --- mesa-12.0.6/src/mesa/vbo/vbo_rebase.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/vbo/vbo_rebase.c 2017-06-01 10:37:10.000000000 +0000 @@ -79,7 +79,7 @@ REBASE(GLushort) REBASE(GLubyte) -GLboolean vbo_all_varyings_in_vbos( const struct gl_client_array *arrays[] ) +GLboolean vbo_all_varyings_in_vbos( const struct gl_vertex_array *arrays[] ) { GLuint i; @@ -91,7 +91,7 @@ return GL_TRUE; } -GLboolean vbo_any_varyings_in_vbos( const struct gl_client_array *arrays[] ) +GLboolean vbo_any_varyings_in_vbos( const struct gl_vertex_array *arrays[] ) { GLuint i; @@ -122,7 +122,7 @@ * all or nothing. */ void vbo_rebase_prims( struct gl_context *ctx, - const struct gl_client_array *arrays[], + const struct gl_vertex_array *arrays[], const struct _mesa_prim *prim, GLuint nr_prims, const struct _mesa_index_buffer *ib, @@ -130,12 +130,12 @@ GLuint max_index, vbo_draw_func draw ) { - struct gl_client_array tmp_arrays[VERT_ATTRIB_MAX]; - const struct gl_client_array *tmp_array_pointers[VERT_ATTRIB_MAX]; + struct gl_vertex_array tmp_arrays[VERT_ATTRIB_MAX]; + const struct gl_vertex_array *tmp_array_pointers[VERT_ATTRIB_MAX]; struct _mesa_index_buffer tmp_ib; struct _mesa_prim *tmp_prims = NULL; - const struct gl_client_array **saved_arrays = ctx->Array._DrawArrays; + const struct gl_vertex_array **saved_arrays = ctx->Array._DrawArrays; void *tmp_indices = NULL; GLuint i; diff -Nru mesa-12.0.6/src/mesa/vbo/vbo_save_api.c mesa-17.0.7/src/mesa/vbo/vbo_save_api.c --- mesa-12.0.6/src/mesa/vbo/vbo_save_api.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/vbo/vbo_save_api.c 2017-06-01 10:37:10.000000000 +0000 @@ -78,6 +78,8 @@ #include "main/api_arrayelt.h" #include "main/vtxfmt.h" #include "main/dispatch.h" +#include "main/state.h" +#include "util/bitscan.h" #include "vbo_context.h" #include "vbo_noop.h" @@ -429,6 +431,7 @@ /* Duplicate our template, increment refcounts to the storage structs: */ + node->enabled = save->enabled; memcpy(node->attrsz, save->attrsz, sizeof(node->attrsz)); memcpy(node->attrtype, save->attrtype, sizeof(node->attrtype)); node->vertex_size = save->vertex_size; @@ -624,14 +627,15 @@ _save_copy_to_current(struct gl_context *ctx) { struct vbo_save_context *save = &vbo_context(ctx)->save; - GLuint i; + GLbitfield64 enabled = save->enabled & (~BITFIELD64_BIT(VBO_ATTRIB_POS)); - for (i = VBO_ATTRIB_POS + 1; i < VBO_ATTRIB_MAX; i++) { - if (save->attrsz[i]) { - save->currentsz[i][0] = save->attrsz[i]; - COPY_CLEAN_4V_TYPE_AS_UNION(save->current[i], save->attrsz[i], - save->attrptr[i], save->attrtype[i]); - } + while (enabled) { + const int i = u_bit_scan64(&enabled); + assert(save->attrsz[i]); + + save->currentsz[i][0] = save->attrsz[i]; + COPY_CLEAN_4V_TYPE_AS_UNION(save->current[i], save->attrsz[i], + save->attrptr[i], save->attrtype[i]); } } @@ -640,9 +644,11 @@ _save_copy_from_current(struct gl_context *ctx) { struct vbo_save_context *save = &vbo_context(ctx)->save; - GLint i; + GLbitfield64 enabled = save->enabled & (~BITFIELD64_BIT(VBO_ATTRIB_POS)); + + while (enabled) { + const int i = u_bit_scan64(&enabled); - for (i = VBO_ATTRIB_POS + 1; i < VBO_ATTRIB_MAX; i++) { switch (save->attrsz[i]) { case 4: save->attrptr[i][3] = save->current[i][3]; @@ -652,7 +658,9 @@ save->attrptr[i][1] = save->current[i][1]; case 1: save->attrptr[i][0] = save->current[i][0]; + break; case 0: + assert(0); break; } } @@ -691,6 +699,7 @@ */ oldsz = save->attrsz[attr]; save->attrsz[attr] = newsz; + save->enabled |= BITFIELD64_BIT(attr); save->vertex_size += newsz - oldsz; save->max_vert = ((VBO_SAVE_BUFFER_SIZE - save->vertex_store->used) / @@ -723,7 +732,6 @@ if (save->copied.nr) { const fi_type *data = save->copied.buffer; fi_type *dest = save->buffer; - GLuint j; /* Need to note this and fix up at runtime (or loopback): */ @@ -733,27 +741,28 @@ } for (i = 0; i < save->copied.nr; i++) { - for (j = 0; j < VBO_ATTRIB_MAX; j++) { - if (save->attrsz[j]) { - if (j == attr) { - if (oldsz) { - COPY_CLEAN_4V_TYPE_AS_UNION(dest, oldsz, data, - save->attrtype[j]); - data += oldsz; - dest += newsz; - } - else { - COPY_SZ_4V(dest, newsz, save->current[attr]); - dest += newsz; - } + GLbitfield64 enabled = save->enabled; + while (enabled) { + const int j = u_bit_scan64(&enabled); + assert(save->attrsz[j]); + if (j == attr) { + if (oldsz) { + COPY_CLEAN_4V_TYPE_AS_UNION(dest, oldsz, data, + save->attrtype[j]); + data += oldsz; + dest += newsz; } else { - GLint sz = save->attrsz[j]; - COPY_SZ_4V(dest, sz, data); - data += sz; - dest += sz; + COPY_SZ_4V(dest, newsz, save->current[attr]); + dest += newsz; } } + else { + GLint sz = save->attrsz[j]; + COPY_SZ_4V(dest, sz, data); + data += sz; + dest += sz; + } } } @@ -803,9 +812,10 @@ _save_reset_vertex(struct gl_context *ctx) { struct vbo_save_context *save = &vbo_context(ctx)->save; - GLuint i; - for (i = 0; i < VBO_ATTRIB_MAX; i++) { + while (save->enabled) { + const int i = u_bit_scan64(&save->enabled); + assert(save->attrsz[i]); save->attrsz[i] = 0; save->active_sz[i] = 0; } @@ -1150,6 +1160,9 @@ if (save->out_of_memory) return; + /* Make sure to process any VBO binding changes */ + _mesa_update_state(ctx); + _ae_map_vbos(ctx); vbo_save_NotifyBegin(ctx, (mode | VBO_SAVE_PRIM_WEAK @@ -1163,6 +1176,40 @@ } +static void GLAPIENTRY +_save_OBE_MultiDrawArrays(GLenum mode, const GLint *first, + const GLsizei *count, GLsizei primcount) +{ + GET_CURRENT_CONTEXT(ctx); + GLint i; + + if (!_mesa_is_valid_prim_mode(ctx, mode)) { + _mesa_compile_error(ctx, GL_INVALID_ENUM, "glMultiDrawArrays(mode)"); + return; + } + + if (primcount < 0) { + _mesa_compile_error(ctx, GL_INVALID_VALUE, + "glMultiDrawArrays(primcount<0)"); + return; + } + + for (i = 0; i < primcount; i++) { + if (count[i] < 0) { + _mesa_compile_error(ctx, GL_INVALID_VALUE, + "glMultiDrawArrays(count[i]<0)"); + return; + } + } + + for (i = 0; i < primcount; i++) { + if (count[i] > 0) { + _save_OBE_DrawArrays(mode, first[i], count[i]); + } + } +} + + /* Could do better by copying the arrays and element list intact and * then emitting an indexed prim at runtime. */ @@ -1193,6 +1240,9 @@ if (save->out_of_memory) return; + /* Make sure to process any VBO binding changes */ + _mesa_update_state(ctx); + _ae_map_vbos(ctx); if (_mesa_is_bufferobj(indexbuf)) @@ -1468,6 +1518,7 @@ struct _glapi_table *exec) { SET_DrawArrays(exec, _save_OBE_DrawArrays); + SET_MultiDrawArrays(exec, _save_OBE_MultiDrawArrays); SET_DrawElements(exec, _save_OBE_DrawElements); SET_DrawElementsBaseVertex(exec, _save_OBE_DrawElementsBaseVertex); SET_DrawRangeElements(exec, _save_OBE_DrawRangeElements); diff -Nru mesa-12.0.6/src/mesa/vbo/vbo_save.c mesa-17.0.7/src/mesa/vbo/vbo_save.c --- mesa-12.0.6/src/mesa/vbo/vbo_save.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/vbo/vbo_save.c 2017-06-01 10:37:10.000000000 +0000 @@ -46,13 +46,13 @@ vbo_save_api_init( save ); { - struct gl_client_array *arrays = save->arrays; + struct gl_vertex_array *arrays = save->arrays; unsigned i; memcpy(arrays, &vbo->currval[VBO_ATTRIB_POS], VERT_ATTRIB_FF_MAX * sizeof(arrays[0])); for (i = 0; i < VERT_ATTRIB_FF_MAX; ++i) { - struct gl_client_array *array; + struct gl_vertex_array *array; array = &arrays[VERT_ATTRIB_FF(i)]; array->BufferObj = NULL; _mesa_reference_buffer_object(ctx, &arrays->BufferObj, @@ -64,7 +64,7 @@ VERT_ATTRIB_GENERIC_MAX * sizeof(arrays[0])); for (i = 0; i < VERT_ATTRIB_GENERIC_MAX; ++i) { - struct gl_client_array *array; + struct gl_vertex_array *array; array = &arrays[VERT_ATTRIB_GENERIC(i)]; array->BufferObj = NULL; _mesa_reference_buffer_object(ctx, &array->BufferObj, diff -Nru mesa-12.0.6/src/mesa/vbo/vbo_save_draw.c mesa-17.0.7/src/mesa/vbo/vbo_save_draw.c --- mesa-12.0.6/src/mesa/vbo/vbo_save_draw.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/vbo/vbo_save_draw.c 2017-06-01 10:37:10.000000000 +0000 @@ -34,6 +34,7 @@ #include "main/macros.h" #include "main/light.h" #include "main/state.h" +#include "util/bitscan.h" #include "vbo_context.h" @@ -49,7 +50,8 @@ struct vbo_context *vbo = vbo_context(ctx); fi_type vertex[VBO_ATTRIB_MAX * 4]; fi_type *data; - GLuint i, offset; + GLbitfield64 mask; + GLuint offset; if (node->current_size == 0) return; @@ -73,35 +75,36 @@ data += node->attrsz[0]; /* skip vertex position */ } - for (i = VBO_ATTRIB_POS+1 ; i < VBO_ATTRIB_MAX ; i++) { - if (node->attrsz[i]) { - fi_type *current = (fi_type *)vbo->currval[i].Ptr; - fi_type tmp[4]; - - COPY_CLEAN_4V_TYPE_AS_UNION(tmp, - node->attrsz[i], - data, - node->attrtype[i]); + mask = node->enabled & (~BITFIELD64_BIT(VBO_ATTRIB_POS)); + while (mask) { + const int i = u_bit_scan64(&mask); + fi_type *current = (fi_type *)vbo->currval[i].Ptr; + fi_type tmp[4]; + assert(node->attrsz[i]); + + COPY_CLEAN_4V_TYPE_AS_UNION(tmp, + node->attrsz[i], + data, + node->attrtype[i]); + + if (node->attrtype[i] != vbo->currval[i].Type || + memcmp(current, tmp, 4 * sizeof(GLfloat)) != 0) { + memcpy(current, tmp, 4 * sizeof(GLfloat)); - if (node->attrtype[i] != vbo->currval[i].Type || - memcmp(current, tmp, 4 * sizeof(GLfloat)) != 0) { - memcpy(current, tmp, 4 * sizeof(GLfloat)); - - vbo->currval[i].Size = node->attrsz[i]; - vbo->currval[i]._ElementSize = vbo->currval[i].Size * sizeof(GLfloat); - vbo->currval[i].Type = node->attrtype[i]; - vbo->currval[i].Integer = - vbo_attrtype_to_integer_flag(node->attrtype[i]); - - if (i >= VBO_ATTRIB_FIRST_MATERIAL && - i <= VBO_ATTRIB_LAST_MATERIAL) - ctx->NewState |= _NEW_LIGHT; + vbo->currval[i].Size = node->attrsz[i]; + vbo->currval[i]._ElementSize = vbo->currval[i].Size * sizeof(GLfloat); + vbo->currval[i].Type = node->attrtype[i]; + vbo->currval[i].Integer = + vbo_attrtype_to_integer_flag(node->attrtype[i]); - ctx->NewState |= _NEW_CURRENT_ATTRIB; - } + if (i >= VBO_ATTRIB_FIRST_MATERIAL && + i <= VBO_ATTRIB_LAST_MATERIAL) + ctx->NewState |= _NEW_LIGHT; - data += node->attrsz[i]; + ctx->NewState |= _NEW_CURRENT_ATTRIB; } + + data += node->attrsz[i]; } /* Colormaterial -- this kindof sucks. @@ -132,7 +135,7 @@ { struct vbo_context *vbo = vbo_context(ctx); struct vbo_save_context *save = &vbo->save; - struct gl_client_array *arrays = save->arrays; + struct gl_vertex_array *arrays = save->arrays; GLuint buffer_offset = node->buffer_offset; const GLuint *map; GLuint attr; @@ -171,8 +174,10 @@ * In that case we effectively need to route the data from * glVertexAttrib(0, val) calls to feed into the GENERIC0 input. */ - if ((ctx->VertexProgram._Current->Base.InputsRead & VERT_BIT_POS) == 0 && - (ctx->VertexProgram._Current->Base.InputsRead & VERT_BIT_GENERIC0)) { + if ((ctx->VertexProgram._Current->info.inputs_read & + VERT_BIT_POS) == 0 && + (ctx->VertexProgram._Current->info.inputs_read & + VERT_BIT_GENERIC0)) { save->inputs[VERT_ATTRIB_GENERIC0] = save->inputs[0]; node_attrsz[VERT_ATTRIB_GENERIC0] = node_attrsz[0]; node_attrtype[VERT_ATTRIB_GENERIC0] = node_attrtype[0]; @@ -193,12 +198,10 @@ arrays[attr].Ptr = (const GLubyte *) NULL + buffer_offset; arrays[attr].Size = node_attrsz[src]; arrays[attr].StrideB = node->vertex_size * sizeof(GLfloat); - arrays[attr].Stride = node->vertex_size * sizeof(GLfloat); arrays[attr].Type = node_attrtype[src]; arrays[attr].Integer = vbo_attrtype_to_integer_flag(node_attrtype[src]); arrays[attr].Format = GL_RGBA; - arrays[attr].Enabled = 1; arrays[attr]._ElementSize = arrays[attr].Size * sizeof(GLfloat); _mesa_reference_buffer_object(ctx, &arrays[attr].BufferObj, diff -Nru mesa-12.0.6/src/mesa/vbo/vbo_save.h mesa-17.0.7/src/mesa/vbo/vbo_save.h --- mesa-12.0.6/src/mesa/vbo/vbo_save.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/vbo/vbo_save.h 2017-06-01 10:37:10.000000000 +0000 @@ -61,6 +61,7 @@ * compiled using the fallback opcode mechanism provided by dlist.c. */ struct vbo_save_vertex_list { + GLbitfield64 enabled; /**< mask of enabled vbo arrays. */ GLubyte attrsz[VBO_ATTRIB_MAX]; GLenum attrtype[VBO_ATTRIB_MAX]; GLuint vertex_size; /**< size in GLfloats */ @@ -95,7 +96,7 @@ * likelyhood as it occurs. No reason we couldn't change usage * internally even though this probably isn't allowed for client VBOs? */ -#define VBO_SAVE_BUFFER_SIZE (8*1024) /* dwords */ +#define VBO_SAVE_BUFFER_SIZE (256*1024) /* dwords */ #define VBO_SAVE_PRIM_SIZE 128 #define VBO_SAVE_PRIM_MODE_MASK 0x3f #define VBO_SAVE_PRIM_WEAK 0x40 @@ -123,9 +124,10 @@ struct gl_context *ctx; GLvertexformat vtxfmt; GLvertexformat vtxfmt_noop; /**< Used if out_of_memory is true */ - struct gl_client_array arrays[VBO_ATTRIB_MAX]; - const struct gl_client_array *inputs[VBO_ATTRIB_MAX]; + struct gl_vertex_array arrays[VBO_ATTRIB_MAX]; + const struct gl_vertex_array *inputs[VBO_ATTRIB_MAX]; + GLbitfield64 enabled; /**< mask of enabled vbo arrays. */ GLubyte attrsz[VBO_ATTRIB_MAX]; /**< 1, 2, 3 or 4 */ GLenum attrtype[VBO_ATTRIB_MAX]; /**< GL_FLOAT, GL_INT, etc */ GLubyte active_sz[VBO_ATTRIB_MAX]; /**< 1, 2, 3 or 4 */ diff -Nru mesa-12.0.6/src/mesa/vbo/vbo_split.c mesa-17.0.7/src/mesa/vbo/vbo_split.c --- mesa-12.0.6/src/mesa/vbo/vbo_split.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/vbo/vbo_split.c 2017-06-01 10:37:10.000000000 +0000 @@ -99,7 +99,7 @@ void vbo_split_prims( struct gl_context *ctx, - const struct gl_client_array *arrays[], + const struct gl_vertex_array *arrays[], const struct _mesa_prim *prim, GLuint nr_prims, const struct _mesa_index_buffer *ib, @@ -108,14 +108,6 @@ vbo_draw_func draw, const struct split_limits *limits ) { - GLint max_basevertex = prim->basevertex; - GLuint i; - - for (i = 1; i < nr_prims; i++) - max_basevertex = MAX2(max_basevertex, prim[i].basevertex); - - /* XXX max_basevertex is computed but not used, why? */ - if (ib) { if (limits->max_indices == 0) { /* Could traverse the indices, re-emitting vertices in turn. diff -Nru mesa-12.0.6/src/mesa/vbo/vbo_split_copy.c mesa-17.0.7/src/mesa/vbo/vbo_split_copy.c --- mesa-12.0.6/src/mesa/vbo/vbo_split_copy.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/vbo/vbo_split_copy.c 2017-06-01 10:37:10.000000000 +0000 @@ -52,7 +52,7 @@ struct copy_context { struct gl_context *ctx; - const struct gl_client_array **array; + const struct gl_vertex_array **array; const struct _mesa_prim *prim; GLuint nr_prims; const struct _mesa_index_buffer *ib; @@ -63,15 +63,15 @@ struct { GLuint attr; GLuint size; - const struct gl_client_array *array; + const struct gl_vertex_array *array; const GLubyte *src_ptr; - struct gl_client_array dstarray; + struct gl_vertex_array dstarray; } varying[VERT_ATTRIB_MAX]; GLuint nr_varying; - const struct gl_client_array *dstarray_ptr[VERT_ATTRIB_MAX]; + const struct gl_vertex_array *dstarray_ptr[VERT_ATTRIB_MAX]; struct _mesa_index_buffer dstib; GLuint *translated_elt_buf; @@ -104,7 +104,7 @@ }; -static GLuint attr_size( const struct gl_client_array *array ) +static GLuint attr_size( const struct gl_vertex_array *array ) { return array->Size * _mesa_sizeof_type(array->Type); } @@ -140,7 +140,7 @@ */ static void dump_draw_info(struct gl_context *ctx, - const struct gl_client_array **arrays, + const struct gl_vertex_array **arrays, const struct _mesa_prim *prims, GLuint nr_prims, const struct _mesa_index_buffer *ib, @@ -156,12 +156,12 @@ printf(" IB: %p\n", (void*) ib); for (j = 0; j < VERT_ATTRIB_MAX; j++) { printf(" array %d at %p:\n", j, (void*) arrays[j]); - printf(" enabled %d, ptr %p, size %d, type 0x%x, stride %d\n", - arrays[j]->Enabled, arrays[j]->Ptr, + printf(" ptr %p, size %d, type 0x%x, stride %d\n", + arrays[j]->Ptr, arrays[j]->Size, arrays[j]->Type, arrays[j]->StrideB); if (0) { GLint k = prims[i].start + prims[i].count - 1; - GLfloat *last = (GLfloat *) (arrays[j]->Ptr + arrays[j]->Stride * k); + GLfloat *last = (GLfloat *) (arrays[j]->Ptr + arrays[j]->StrideB * k); printf(" last: %f %f %f\n", last[0], last[1], last[2]); } @@ -174,7 +174,7 @@ flush( struct copy_context *copy ) { struct gl_context *ctx = copy->ctx; - const struct gl_client_array **saved_arrays = ctx->Array._DrawArrays; + const struct gl_vertex_array **saved_arrays = ctx->Array._DrawArrays; GLuint i; /* Set some counters: @@ -258,7 +258,7 @@ /* printf(" --> emit to dstelt %d\n", copy->dstbuf_nr); */ for (i = 0; i < copy->nr_varying; i++) { - const struct gl_client_array *srcarray = copy->varying[i].array; + const struct gl_vertex_array *srcarray = copy->varying[i].array; const GLubyte *srcptr = copy->varying[i].src_ptr + elt * srcarray->StrideB; memcpy(csr, srcptr, copy->varying[i].size); @@ -521,16 +521,14 @@ /* Setup new vertex arrays to point into the output buffer: */ for (offset = 0, i = 0; i < copy->nr_varying; i++) { - const struct gl_client_array *src = copy->varying[i].array; - struct gl_client_array *dst = ©->varying[i].dstarray; + const struct gl_vertex_array *src = copy->varying[i].array; + struct gl_vertex_array *dst = ©->varying[i].dstarray; dst->Size = src->Size; dst->Type = src->Type; dst->Format = GL_RGBA; - dst->Stride = copy->vertex_size; dst->StrideB = copy->vertex_size; dst->Ptr = copy->dstbuf + offset; - dst->Enabled = GL_TRUE; dst->Normalized = src->Normalized; dst->Integer = src->Integer; dst->Doubles = src->Doubles; @@ -595,7 +593,7 @@ * Split VBO into smaller pieces, draw the pieces. */ void vbo_split_copy( struct gl_context *ctx, - const struct gl_client_array *arrays[], + const struct gl_vertex_array *arrays[], const struct _mesa_prim *prim, GLuint nr_prims, const struct _mesa_index_buffer *ib, diff -Nru mesa-12.0.6/src/mesa/vbo/vbo_split.h mesa-17.0.7/src/mesa/vbo/vbo_split.h --- mesa-12.0.6/src/mesa/vbo/vbo_split.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/vbo/vbo_split.h 2017-06-01 10:37:10.000000000 +0000 @@ -50,7 +50,7 @@ GLboolean split_prim_inplace(GLenum mode, GLuint *first, GLuint *incr); void vbo_split_inplace( struct gl_context *ctx, - const struct gl_client_array *arrays[], + const struct gl_vertex_array *arrays[], const struct _mesa_prim *prim, GLuint nr_prims, const struct _mesa_index_buffer *ib, @@ -62,7 +62,7 @@ /* Requires ib != NULL: */ void vbo_split_copy( struct gl_context *ctx, - const struct gl_client_array *arrays[], + const struct gl_vertex_array *arrays[], const struct _mesa_prim *prim, GLuint nr_prims, const struct _mesa_index_buffer *ib, diff -Nru mesa-12.0.6/src/mesa/vbo/vbo_split_inplace.c mesa-17.0.7/src/mesa/vbo/vbo_split_inplace.c --- mesa-12.0.6/src/mesa/vbo/vbo_split_inplace.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/vbo/vbo_split_inplace.c 2017-06-01 10:37:10.000000000 +0000 @@ -42,7 +42,7 @@ */ struct split_context { struct gl_context *ctx; - const struct gl_client_array **array; + const struct gl_vertex_array **array; const struct _mesa_prim *prim; GLuint nr_prims; const struct _mesa_index_buffer *ib; @@ -63,7 +63,7 @@ static void flush_vertex( struct split_context *split ) { struct gl_context *ctx = split->ctx; - const struct gl_client_array **saved_arrays = ctx->Array._DrawArrays; + const struct gl_vertex_array **saved_arrays = ctx->Array._DrawArrays; struct _mesa_index_buffer ib; GLuint i; @@ -262,7 +262,7 @@ void vbo_split_inplace( struct gl_context *ctx, - const struct gl_client_array *arrays[], + const struct gl_vertex_array *arrays[], const struct _mesa_prim *prim, GLuint nr_prims, const struct _mesa_index_buffer *ib, diff -Nru mesa-12.0.6/src/mesa/x86/gen_matypes.c mesa-17.0.7/src/mesa/x86/gen_matypes.c --- mesa-12.0.6/src/mesa/x86/gen_matypes.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/mesa/x86/gen_matypes.c 2017-06-01 10:37:10.000000000 +0000 @@ -125,7 +125,7 @@ OFFSET( "CTX_LIGHT_COLOR_MAT_MODE ", struct gl_context, Light.ColorMaterialMode ); OFFSET( "CTX_LIGHT_COLOR_MAT_MASK ", struct gl_context, Light._ColorMaterialBitmask ); OFFSET( "CTX_LIGHT_COLOR_MAT_ENABLED ", struct gl_context, Light.ColorMaterialEnabled ); - OFFSET( "CTX_LIGHT_ENABLED_LIST ", struct gl_context, Light.EnabledList ); + OFFSET( "CTX_LIGHT_ENABLED_LIGHTS ", struct gl_context, Light._EnabledLights ); OFFSET( "CTX_LIGHT_NEED_VERTS ", struct gl_context, Light._NeedVertices ); OFFSET( "CTX_LIGHT_BASE_COLOR ", struct gl_context, Light._BaseColor ); @@ -208,8 +208,6 @@ */ OFFSET_HEADER( "struct gl_light" ); - OFFSET( "LIGHT_NEXT ", struct gl_light, next ); - OFFSET( "LIGHT_PREV ", struct gl_light, prev ); printf( "\n" ); OFFSET( "LIGHT_AMBIENT ", struct gl_light, Ambient ); OFFSET( "LIGHT_DIFFUSE ", struct gl_light, Diffuse ); diff -Nru mesa-12.0.6/src/SConscript mesa-17.0.7/src/SConscript --- mesa-12.0.6/src/SConscript 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/src/SConscript 2017-06-01 10:37:10.000000000 +0000 @@ -1,5 +1,8 @@ -Import('*') +import filecmp +import os +import subprocess +Import('*') if env['platform'] == 'windows': SConscript('getopt/SConscript') @@ -12,6 +15,50 @@ # compilation Return() + +def write_git_sha1_h_file(filename): + """Mesa looks for a git_sha1.h file at compile time in order to display + the current git hash id in the GL_VERSION string. This function tries + to retrieve the git hashid and write the header file. An empty file + will be created if anything goes wrong.""" + + args = [ 'git', 'rev-parse', '--short=10', 'HEAD' ] + try: + (commit, foo) = subprocess.Popen(args, stdout=subprocess.PIPE).communicate() + except: + print "Warning: exception in write_git_sha1_h_file()" + # git log command didn't work + if not os.path.exists(filename): + dirname = os.path.dirname(filename) + if dirname and not os.path.exists(dirname): + os.makedirs(dirname) + # create an empty file if none already exists + f = open(filename, "w") + f.close() + return + + # note that commit[:-1] removes the trailing newline character + commit = '#define MESA_GIT_SHA1 "git-%s"\n' % commit[:-1] + tempfile = "git_sha1.h.tmp" + f = open(tempfile, "w") + f.write(commit) + f.close() + if not os.path.exists(filename) or not filecmp.cmp(tempfile, filename): + # The filename does not exist or it's different from the new file, + # so replace old file with new. + if os.path.exists(filename): + os.remove(filename) + os.rename(tempfile, filename) + return + + +# Create the git_sha1.h header file +write_git_sha1_h_file("git_sha1.h") +# and update CPPPATH so the git_sha1.h header can be found +env.Append(CPPPATH = ["#" + env['build_dir']]) + + + if env['platform'] != 'windows': SConscript('loader/SConscript') diff -Nru mesa-12.0.6/src/util/bitscan.c mesa-17.0.7/src/util/bitscan.c --- mesa-12.0.6/src/util/bitscan.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/util/bitscan.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,80 @@ +/************************************************************************** + * + * Copyright 2008 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + + +#include "bitscan.h" + +#ifdef HAVE___BUILTIN_FFS +#elif defined(_MSC_VER) && (_M_IX86 || _M_ARM || _M_AMD64 || _M_IA64) +#else +int +ffs(unsigned i) +{ + int bit = 0; + if (!i) + return bit; + if (!(i & 0xffff)) { + bit += 16; + i >>= 16; + } + if (!(i & 0xff)) { + bit += 8; + i >>= 8; + } + if (!(i & 0xf)) { + bit += 4; + i >>= 4; + } + if (!(i & 0x3)) { + bit += 2; + i >>= 2; + } + if (!(i & 0x1)) + bit += 1; + return bit + 1; +} +#endif + +#ifdef HAVE___BUILTIN_FFSLL +#elif defined(_MSC_VER) && (_M_AMD64 || _M_ARM || _M_IA64) +#else +int +ffsll(uint64_t val) +{ + int bit; + + bit = ffs((unsigned) (val & 0xffffffff)); + if (bit != 0) + return bit; + + bit = ffs((unsigned) (val >> 32)); + if (bit != 0) + return 32 + bit; + + return 0; +} +#endif diff -Nru mesa-12.0.6/src/util/bitscan.h mesa-17.0.7/src/util/bitscan.h --- mesa-12.0.6/src/util/bitscan.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/util/bitscan.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,243 @@ +/************************************************************************** + * + * Copyright 2008 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + + +#ifndef BITSCAN_H +#define BITSCAN_H + +#include +#include +#include + +#if defined(_MSC_VER) +#include +#endif + +#include "c99_compat.h" + +#ifdef __cplusplus +extern "C" { +#endif + + +/** + * Find first bit set in word. Least significant bit is 1. + * Return 0 if no bits set. + */ +#ifdef HAVE___BUILTIN_FFS +#define ffs __builtin_ffs +#elif defined(_MSC_VER) && (_M_IX86 || _M_ARM || _M_AMD64 || _M_IA64) +static inline +int ffs(unsigned i) +{ + unsigned long index; + if (_BitScanForward(&index, i)) + return index + 1; + else + return 0; +} +#else +extern +int ffs(unsigned i); +#endif + +#ifdef HAVE___BUILTIN_FFSLL +#define ffsll __builtin_ffsll +#elif defined(_MSC_VER) && (_M_AMD64 || _M_ARM || _M_IA64) +static inline int +ffsll(uint64_t i) +{ + unsigned long index; + if (_BitScanForward64(&index, i)) + return index + 1; + else + return 0; +} +#else +extern int +ffsll(uint64_t val); +#endif + + +/* Destructively loop over all of the bits in a mask as in: + * + * while (mymask) { + * int i = u_bit_scan(&mymask); + * ... process element i + * } + * + */ +static inline int +u_bit_scan(unsigned *mask) +{ + const int i = ffs(*mask) - 1; + *mask ^= (1u << i); + return i; +} + +static inline int +u_bit_scan64(uint64_t *mask) +{ + const int i = ffsll(*mask) - 1; + *mask ^= (((uint64_t)1) << i); + return i; +} + +/* For looping over a bitmask when you want to loop over consecutive bits + * manually, for example: + * + * while (mask) { + * int start, count, i; + * + * u_bit_scan_consecutive_range(&mask, &start, &count); + * + * for (i = 0; i < count; i++) + * ... process element (start+i) + * } + */ +static inline void +u_bit_scan_consecutive_range(unsigned *mask, int *start, int *count) +{ + if (*mask == 0xffffffff) { + *start = 0; + *count = 32; + *mask = 0; + return; + } + *start = ffs(*mask) - 1; + *count = ffs(~(*mask >> *start)) - 1; + *mask &= ~(((1u << *count) - 1) << *start); +} + +static inline void +u_bit_scan_consecutive_range64(uint64_t *mask, int *start, int *count) +{ + if (*mask == ~0llu) { + *start = 0; + *count = 64; + *mask = 0; + return; + } + *start = ffsll(*mask) - 1; + *count = ffsll(~(*mask >> *start)) - 1; + *mask &= ~(((((uint64_t)1) << *count) - 1) << *start); +} + + +/** + * Find last bit set in a word. The least significant bit is 1. + * Return 0 if no bits are set. + * Essentially ffs() in the reverse direction. + */ +static inline unsigned +util_last_bit(unsigned u) +{ +#if defined(HAVE___BUILTIN_CLZ) + return u == 0 ? 0 : 32 - __builtin_clz(u); +#elif defined(_MSC_VER) && (_M_IX86 || _M_ARM || _M_AMD64 || _M_IA64) + unsigned long index; + if (_BitScanReverse(&index, u)) + return index + 1; + else + return 0; +#else + unsigned r = 0; + while (u) { + r++; + u >>= 1; + } + return r; +#endif +} + +/** + * Find last bit set in a word. The least significant bit is 1. + * Return 0 if no bits are set. + * Essentially ffsll() in the reverse direction. + */ +static inline unsigned +util_last_bit64(uint64_t u) +{ +#if defined(HAVE___BUILTIN_CLZLL) + return u == 0 ? 0 : 64 - __builtin_clzll(u); +#elif defined(_MSC_VER) && (_M_AMD64 || _M_ARM || _M_IA64) + unsigned long index; + if (_BitScanReverse64(&index, u)) + return index + 1; + else + return 0; +#else + unsigned r = 0; + while (u) { + r++; + u >>= 1; + } + return r; +#endif +} + +/** + * Find last bit in a word that does not match the sign bit. The least + * significant bit is 1. + * Return 0 if no bits are set. + */ +static inline unsigned +util_last_bit_signed(int i) +{ + if (i >= 0) + return util_last_bit(i); + else + return util_last_bit(~(unsigned)i); +} + +/* Returns a bitfield in which the first count bits starting at start are + * set. + */ +static inline unsigned +u_bit_consecutive(unsigned start, unsigned count) +{ + assert(start + count <= 32); + if (count == 32) + return ~0; + return ((1u << count) - 1) << start; +} + +static inline uint64_t +u_bit_consecutive64(unsigned start, unsigned count) +{ + assert(start + count <= 64); + if (count == 64) + return ~(uint64_t)0; + return (((uint64_t)1 << count) - 1) << start; +} + + +#ifdef __cplusplus +} +#endif + +#endif /* BITSCAN_H */ diff -Nru mesa-12.0.6/src/util/crc32.c mesa-17.0.7/src/util/crc32.c --- mesa-12.0.6/src/util/crc32.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/util/crc32.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,121 @@ +/************************************************************************** + * + * Copyright 2008 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +/** + * @file + * CRC32 implementation. + * + * @author Jose Fonseca + */ + + +#include "crc32.h" + + +static const uint32_t +util_crc32_table[256] = { + 0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, + 0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3, + 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988, + 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91, + 0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de, + 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7, + 0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, + 0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5, + 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172, + 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, + 0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940, + 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59, + 0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, + 0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f, + 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924, + 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, + 0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a, + 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433, + 0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, + 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01, + 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, + 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, + 0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c, + 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65, + 0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, + 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb, + 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0, + 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9, + 0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086, + 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f, + 0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, + 0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad, + 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a, + 0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683, + 0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8, + 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1, + 0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, + 0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7, + 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc, + 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, + 0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252, + 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b, + 0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, + 0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79, + 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, + 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, + 0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, + 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d, + 0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, + 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713, + 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, + 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, + 0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e, + 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777, + 0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, + 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45, + 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2, + 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, + 0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0, + 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9, + 0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, + 0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf, + 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94, + 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d +}; + + +/** + * @sa http://www.w3.org/TR/PNG/#D-CRCAppendix + */ +uint32_t +util_hash_crc32(const void *data, size_t size) +{ + uint8_t *p = (uint8_t *)data; + uint32_t crc = 0xffffffff; + + while (size--) + crc = util_crc32_table[(crc ^ *p++) & 0xff] ^ (crc >> 8); + + return crc; +} diff -Nru mesa-12.0.6/src/util/crc32.h mesa-17.0.7/src/util/crc32.h --- mesa-12.0.6/src/util/crc32.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/util/crc32.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,55 @@ +/************************************************************************** + * + * Copyright 2008 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +/** + * @file + * CRC32 function. + * + * @author Jose Fonseca + */ + +#ifndef CRC32_H_ +#define CRC32_H_ + +#include +#include + + +#ifdef __cplusplus +extern "C" { +#endif + + +uint32_t +util_hash_crc32(const void *data, size_t size); + + +#ifdef __cplusplus +} +#endif + +#endif /* CRC32_H_ */ diff -Nru mesa-12.0.6/src/util/disk_cache.c mesa-17.0.7/src/util/disk_cache.c --- mesa-12.0.6/src/util/disk_cache.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/util/disk_cache.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,726 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifdef ENABLE_SHADER_CACHE + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "util/u_atomic.h" +#include "util/mesa-sha1.h" +#include "util/ralloc.h" +#include "main/errors.h" + +#include "disk_cache.h" + +/* Number of bits to mask off from a cache key to get an index. */ +#define CACHE_INDEX_KEY_BITS 16 + +/* Mask for computing an index from a key. */ +#define CACHE_INDEX_KEY_MASK ((1 << CACHE_INDEX_KEY_BITS) - 1) + +/* The number of keys that can be stored in the index. */ +#define CACHE_INDEX_MAX_KEYS (1 << CACHE_INDEX_KEY_BITS) + +struct disk_cache { + /* The path to the cache directory. */ + char *path; + + /* A pointer to the mmapped index file within the cache directory. */ + uint8_t *index_mmap; + size_t index_mmap_size; + + /* Pointer to total size of all objects in cache (within index_mmap) */ + uint64_t *size; + + /* Pointer to stored keys, (within index_mmap). */ + uint8_t *stored_keys; + + /* Maximum size of all cached objects (in bytes). */ + uint64_t max_size; +}; + +/* Create a directory named 'path' if it does not already exist. + * + * Returns: 0 if path already exists as a directory or if created. + * -1 in all other cases. + */ +static int +mkdir_if_needed(char *path) +{ + struct stat sb; + + /* If the path exists already, then our work is done if it's a + * directory, but it's an error if it is not. + */ + if (stat(path, &sb) == 0) { + if (S_ISDIR(sb.st_mode)) { + return 0; + } else { + fprintf(stderr, "Cannot use %s for shader cache (not a directory)" + "---disabling.\n", path); + return -1; + } + } + + int ret = mkdir(path, 0755); + if (ret == 0 || (ret == -1 && errno == EEXIST)) + return 0; + + fprintf(stderr, "Failed to create %s for shader cache (%s)---disabling.\n", + path, strerror(errno)); + + return -1; +} + +/* Concatenate an existing path and a new name to form a new path. If the new + * path does not exist as a directory, create it then return the resulting + * name of the new path (ralloc'ed off of 'ctx'). + * + * Returns NULL on any error, such as: + * + * does not exist or is not a directory + * / exists but is not a directory + * / cannot be created as a directory + */ +static char * +concatenate_and_mkdir(void *ctx, char *path, char *name) +{ + char *new_path; + struct stat sb; + + if (stat(path, &sb) != 0 || ! S_ISDIR(sb.st_mode)) + return NULL; + + new_path = ralloc_asprintf(ctx, "%s/%s", path, name); + + if (mkdir_if_needed(new_path) == 0) + return new_path; + else + return NULL; +} + +struct disk_cache * +disk_cache_create(void) +{ + void *local; + struct disk_cache *cache = NULL; + char *path, *max_size_str; + uint64_t max_size; + int fd = -1; + struct stat sb; + size_t size; + + /* A ralloc context for transient data during this invocation. */ + local = ralloc_context(NULL); + if (local == NULL) + goto fail; + + /* At user request, disable shader cache entirely. */ + if (getenv("MESA_GLSL_CACHE_DISABLE")) + goto fail; + + /* Determine path for cache based on the first defined name as follows: + * + * $MESA_GLSL_CACHE_DIR + * $XDG_CACHE_HOME/mesa + * /.cache/mesa + */ + path = getenv("MESA_GLSL_CACHE_DIR"); + if (path && mkdir_if_needed(path) == -1) { + goto fail; + } + + if (path == NULL) { + char *xdg_cache_home = getenv("XDG_CACHE_HOME"); + + if (xdg_cache_home) { + if (mkdir_if_needed(xdg_cache_home) == -1) + goto fail; + + path = concatenate_and_mkdir(local, xdg_cache_home, "mesa"); + if (path == NULL) + goto fail; + } + } + + if (path == NULL) { + char *buf; + size_t buf_size; + struct passwd pwd, *result; + + buf_size = sysconf(_SC_GETPW_R_SIZE_MAX); + if (buf_size == -1) + buf_size = 512; + + /* Loop until buf_size is large enough to query the directory */ + while (1) { + buf = ralloc_size(local, buf_size); + + getpwuid_r(getuid(), &pwd, buf, buf_size, &result); + if (result) + break; + + if (errno == ERANGE) { + ralloc_free(buf); + buf = NULL; + buf_size *= 2; + } else { + goto fail; + } + } + + path = concatenate_and_mkdir(local, pwd.pw_dir, ".cache"); + if (path == NULL) + goto fail; + + path = concatenate_and_mkdir(local, path, "mesa"); + if (path == NULL) + goto fail; + } + + cache = ralloc(NULL, struct disk_cache); + if (cache == NULL) + goto fail; + + cache->path = ralloc_strdup(cache, path); + if (cache->path == NULL) + goto fail; + + path = ralloc_asprintf(local, "%s/index", cache->path); + if (path == NULL) + goto fail; + + fd = open(path, O_RDWR | O_CREAT | O_CLOEXEC, 0644); + if (fd == -1) + goto fail; + + if (fstat(fd, &sb) == -1) + goto fail; + + /* Force the index file to be the expected size. */ + size = sizeof(*cache->size) + CACHE_INDEX_MAX_KEYS * CACHE_KEY_SIZE; + if (sb.st_size != size) { + if (ftruncate(fd, size) == -1) + goto fail; + } + + /* We map this shared so that other processes see updates that we + * make. + * + * Note: We do use atomic addition to ensure that multiple + * processes don't scramble the cache size recorded in the + * index. But we don't use any locking to prevent multiple + * processes from updating the same entry simultaneously. The idea + * is that if either result lands entirely in the index, then + * that's equivalent to a well-ordered write followed by an + * eviction and a write. On the other hand, if the simultaneous + * writes result in a corrupt entry, that's not really any + * different than both entries being evicted, (since within the + * guarantees of the cryptographic hash, a corrupt entry is + * unlikely to ever match a real cache key). + */ + cache->index_mmap = mmap(NULL, size, PROT_READ | PROT_WRITE, + MAP_SHARED, fd, 0); + if (cache->index_mmap == MAP_FAILED) + goto fail; + cache->index_mmap_size = size; + + close(fd); + + cache->size = (uint64_t *) cache->index_mmap; + cache->stored_keys = cache->index_mmap + sizeof(uint64_t); + + max_size = 0; + + max_size_str = getenv("MESA_GLSL_CACHE_MAX_SIZE"); + if (max_size_str) { + char *end; + max_size = strtoul(max_size_str, &end, 10); + if (end == max_size_str) { + max_size = 0; + } else { + while (*end && isspace(*end)) + end++; + switch (*end) { + case 'K': + case 'k': + max_size *= 1024; + break; + case 'M': + case 'm': + max_size *= 1024*1024; + break; + case '\0': + case 'G': + case 'g': + default: + max_size *= 1024*1024*1024; + break; + } + } + } + + /* Default to 1GB for maximum cache size. */ + if (max_size == 0) + max_size = 1024*1024*1024; + + cache->max_size = max_size; + + ralloc_free(local); + + return cache; + + fail: + if (fd != -1) + close(fd); + if (cache) + ralloc_free(cache); + ralloc_free(local); + + return NULL; +} + +void +disk_cache_destroy(struct disk_cache *cache) +{ + munmap(cache->index_mmap, cache->index_mmap_size); + + ralloc_free(cache); +} + +/* Return a filename within the cache's directory corresponding to 'key'. The + * returned filename is ralloced with 'cache' as the parent context. + * + * Returns NULL if out of memory. + */ +static char * +get_cache_file(struct disk_cache *cache, cache_key key) +{ + char buf[41]; + + _mesa_sha1_format(buf, key); + + return ralloc_asprintf(cache, "%s/%c%c/%s", + cache->path, buf[0], buf[1], buf + 2); +} + +/* Create the directory that will be needed for the cache file for \key. + * + * Obviously, the implementation here must closely match + * _get_cache_file above. +*/ +static void +make_cache_file_directory(struct disk_cache *cache, cache_key key) +{ + char *dir; + char buf[41]; + + _mesa_sha1_format(buf, key); + + dir = ralloc_asprintf(cache, "%s/%c%c", cache->path, buf[0], buf[1]); + + mkdir_if_needed(dir); + + ralloc_free(dir); +} + +/* Given a directory path and predicate function, count all entries in + * that directory for which the predicate returns true. Then choose a + * random entry from among those counted. + * + * Returns: A malloc'ed string for the path to the chosen file, (or + * NULL on any error). The caller should free the string when + * finished. + */ +static char * +choose_random_file_matching(const char *dir_path, + bool (*predicate)(struct dirent *, + const char *dir_path)) +{ + DIR *dir; + struct dirent *entry; + unsigned int count, victim; + char *filename; + + dir = opendir(dir_path); + if (dir == NULL) + return NULL; + + count = 0; + + while (1) { + entry = readdir(dir); + if (entry == NULL) + break; + if (!predicate(entry, dir_path)) + continue; + + count++; + } + + if (count == 0) { + closedir(dir); + return NULL; + } + + victim = rand() % count; + + rewinddir(dir); + count = 0; + + while (1) { + entry = readdir(dir); + if (entry == NULL) + break; + if (!predicate(entry, dir_path)) + continue; + if (count == victim) + break; + + count++; + } + + if (entry == NULL) { + closedir(dir); + return NULL; + } + + if (asprintf(&filename, "%s/%s", dir_path, entry->d_name) < 0) + filename = NULL; + + closedir(dir); + + return filename; +} + +/* Is entry a regular file, and not having a name with a trailing + * ".tmp" + */ +static bool +is_regular_non_tmp_file(struct dirent *entry, const char *path) +{ + char *filename; + if (asprintf(&filename, "%s/%s", path, entry->d_name) == -1) + return false; + + struct stat sb; + int res = stat(filename, &sb); + free(filename); + + if (res == -1 || !S_ISREG(sb.st_mode)) + return false; + + size_t len = strlen (entry->d_name); + if (len >= 4 && strcmp(&entry->d_name[len-4], ".tmp") == 0) + return false; + + return true; +} + +/* Returns the size of the deleted file, (or 0 on any error). */ +static size_t +unlink_random_file_from_directory(const char *path) +{ + struct stat sb; + char *filename; + + filename = choose_random_file_matching(path, is_regular_non_tmp_file); + if (filename == NULL) + return 0; + + if (stat(filename, &sb) == -1) { + free (filename); + return 0; + } + + unlink(filename); + + free (filename); + + return sb.st_size; +} + +/* Is entry a directory with a two-character name, (and not the + * special name of "..") + */ +static bool +is_two_character_sub_directory(struct dirent *entry, const char *path) +{ + char *subdir; + if (asprintf(&subdir, "%s/%s", path, entry->d_name) == -1) + return false; + + struct stat sb; + int res = stat(subdir, &sb); + free(subdir); + + if (res == -1 || !S_ISDIR(sb.st_mode)) + return false; + + if (strlen(entry->d_name) != 2) + return false; + + if (strcmp(entry->d_name, "..") == 0) + return false; + + return true; +} + +static void +evict_random_item(struct disk_cache *cache) +{ + const char hex[] = "0123456789abcde"; + char *dir_path; + int a, b; + size_t size; + + /* With a reasonably-sized, full cache, (and with keys generated + * from a cryptographic hash), we can choose two random hex digits + * and reasonably expect the directory to exist with a file in it. + */ + a = rand() % 16; + b = rand() % 16; + + if (asprintf(&dir_path, "%s/%c%c", cache->path, hex[a], hex[b]) < 0) + return; + + size = unlink_random_file_from_directory(dir_path); + + free(dir_path); + + if (size) { + p_atomic_add(cache->size, - size); + return; + } + + /* In the case where the random choice of directory didn't find + * something, we choose randomly from the existing directories. + * + * Really, the only reason this code exists is to allow the unit + * tests to work, (which use an artificially-small cache to be able + * to force a single cached item to be evicted). + */ + dir_path = choose_random_file_matching(cache->path, + is_two_character_sub_directory); + if (dir_path == NULL) + return; + + size = unlink_random_file_from_directory(dir_path); + + free(dir_path); + + if (size) + p_atomic_add(cache->size, - size); +} + +void +disk_cache_put(struct disk_cache *cache, + cache_key key, + const void *data, + size_t size) +{ + int fd = -1, fd_final = -1, err, ret; + size_t len; + char *filename = NULL, *filename_tmp = NULL; + const char *p = data; + + filename = get_cache_file(cache, key); + if (filename == NULL) + goto done; + + /* Write to a temporary file to allow for an atomic rename to the + * final destination filename, (to prevent any readers from seeing + * a partially written file). + */ + filename_tmp = ralloc_asprintf(cache, "%s.tmp", filename); + if (filename_tmp == NULL) + goto done; + + fd = open(filename_tmp, O_WRONLY | O_CLOEXEC | O_CREAT, 0644); + + /* Make the two-character subdirectory within the cache as needed. */ + if (fd == -1) { + if (errno != ENOENT) + goto done; + + make_cache_file_directory(cache, key); + + fd = open(filename_tmp, O_WRONLY | O_CLOEXEC | O_CREAT, 0644); + if (fd == -1) + goto done; + } + + /* With the temporary file open, we take an exclusive flock on + * it. If the flock fails, then another process still has the file + * open with the flock held. So just let that file be responsible + * for writing the file. + */ + err = flock(fd, LOCK_EX | LOCK_NB); + if (err == -1) + goto done; + + /* Now that we have the lock on the open temporary file, we can + * check to see if the destination file already exists. If so, + * another process won the race between when we saw that the file + * didn't exist and now. In this case, we don't do anything more, + * (to ensure the size accounting of the cache doesn't get off). + */ + fd_final = open(filename, O_RDONLY | O_CLOEXEC); + if (fd_final != -1) + goto done; + + /* OK, we're now on the hook to write out a file that we know is + * not in the cache, and is also not being written out to the cache + * by some other process. + * + * Before we do that, if the cache is too large, evict something + * else first. + */ + if (*cache->size + size > cache->max_size) + evict_random_item(cache); + + /* Now, finally, write out the contents to the temporary file, then + * rename them atomically to the destination filename, and also + * perform an atomic increment of the total cache size. + */ + for (len = 0; len < size; len += ret) { + ret = write(fd, p + len, size - len); + if (ret == -1) { + unlink(filename_tmp); + goto done; + } + } + + rename(filename_tmp, filename); + + p_atomic_add(cache->size, size); + + done: + if (fd_final != -1) + close(fd_final); + /* This close finally releases the flock, (now that the final dile + * has been renamed into place and the size has been added). + */ + if (fd != -1) + close(fd); + if (filename_tmp) + ralloc_free(filename_tmp); + if (filename) + ralloc_free(filename); +} + +void * +disk_cache_get(struct disk_cache *cache, cache_key key, size_t *size) +{ + int fd = -1, ret, len; + struct stat sb; + char *filename = NULL; + uint8_t *data = NULL; + + if (size) + *size = 0; + + filename = get_cache_file(cache, key); + if (filename == NULL) + goto fail; + + fd = open(filename, O_RDONLY | O_CLOEXEC); + if (fd == -1) + goto fail; + + if (fstat(fd, &sb) == -1) + goto fail; + + data = malloc(sb.st_size); + if (data == NULL) + goto fail; + + for (len = 0; len < sb.st_size; len += ret) { + ret = read(fd, data + len, sb.st_size - len); + if (ret == -1) + goto fail; + } + + ralloc_free(filename); + close(fd); + + if (size) + *size = sb.st_size; + + return data; + + fail: + if (data) + free(data); + if (filename) + ralloc_free(filename); + if (fd != -1) + close(fd); + + return NULL; +} + +void +disk_cache_put_key(struct disk_cache *cache, cache_key key) +{ + uint32_t *key_chunk = (uint32_t *) key; + int i = *key_chunk & CACHE_INDEX_KEY_MASK; + unsigned char *entry; + + entry = &cache->stored_keys[i + CACHE_KEY_SIZE]; + + memcpy(entry, key, CACHE_KEY_SIZE); +} + +/* This function lets us test whether a given key was previously + * stored in the cache with disk_cache_put_key(). The implement is + * efficient by not using syscalls or hitting the disk. It's not + * race-free, but the races are benign. If we race with someone else + * calling disk_cache_put_key, then that's just an extra cache miss and an + * extra recompile. + */ +bool +disk_cache_has_key(struct disk_cache *cache, cache_key key) +{ + uint32_t *key_chunk = (uint32_t *) key; + int i = *key_chunk & CACHE_INDEX_KEY_MASK; + unsigned char *entry; + + entry = &cache->stored_keys[i + CACHE_KEY_SIZE]; + + return memcmp(entry, key, CACHE_KEY_SIZE) == 0; +} + +#endif /* ENABLE_SHADER_CACHE */ diff -Nru mesa-12.0.6/src/util/disk_cache.h mesa-17.0.7/src/util/disk_cache.h --- mesa-12.0.6/src/util/disk_cache.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/util/disk_cache.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,178 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef DISK_CACHE_H +#define DISK_CACHE_H + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* Size of cache keys in bytes. */ +#define CACHE_KEY_SIZE 20 + +typedef uint8_t cache_key[CACHE_KEY_SIZE]; + +struct disk_cache; + +/* Provide inlined stub functions if the shader cache is disabled. */ + +#ifdef ENABLE_SHADER_CACHE + +/** + * Create a new cache object. + * + * This function creates the handle necessary for all subsequent cache_* + * functions. + * + * This cache provides two distinct operations: + * + * o Storage and retrieval of arbitrary objects by cryptographic + * name (or "key"). This is provided via disk_cache_put() and + * disk_cache_get(). + * + * o The ability to store a key alone and check later whether the + * key was previously stored. This is provided via disk_cache_put_key() + * and disk_cache_has_key(). + * + * The put_key()/has_key() operations are conceptually identical to + * put()/get() with no data, but are provided separately to allow for + * a more efficient implementation. + * + * In all cases, the keys are sequences of 20 bytes. It is anticipated + * that callers will compute appropriate SHA-1 signatures for keys, + * (though nothing in this implementation directly relies on how the + * names are computed). See mesa-sha1.h and _mesa_sha1_compute for + * assistance in computing SHA-1 signatures. + */ +struct disk_cache * +disk_cache_create(void); + +/** + * Destroy a cache object, (freeing all associated resources). + */ +void +disk_cache_destroy(struct disk_cache *cache); + +/** + * Store an item in the cache under the name \key. + * + * The item can be retrieved later with disk_cache_get(), (unless the item has + * been evicted in the interim). + * + * Any call to disk_cache_put() may cause an existing, random item to be + * evicted from the cache. + */ +void +disk_cache_put(struct disk_cache *cache, cache_key key, + const void *data, size_t size); + +/** + * Retrieve an item previously stored in the cache with the name . + * + * The item must have been previously stored with a call to disk_cache_put(). + * + * If \size is non-NULL, then, on successful return, it will be set to the + * size of the object. + * + * \return A pointer to the stored object if found. NULL if the object + * is not found, or if any error occurs, (memory allocation failure, + * filesystem error, etc.). The returned data is malloc'ed so the + * caller should call free() it when finished. + */ +void * +disk_cache_get(struct disk_cache *cache, cache_key key, size_t *size); + +/** + * Store the name \key within the cache, (without any associated data). + * + * Later this key can be checked with disk_cache_has_key(), (unless the key + * has been evicted in the interim). + * + * Any call to cache_record() may cause an existing, random key to be + * evicted from the cache. + */ +void +disk_cache_put_key(struct disk_cache *cache, cache_key key); + +/** + * Test whether the name \key was previously recorded in the cache. + * + * Return value: True if disk_cache_put_key() was previously called with + * \key, (and the key was not evicted in the interim). + * + * Note: disk_cache_has_key() will only return true for keys passed to + * disk_cache_put_key(). Specifically, a call to disk_cache_put() will not cause + * disk_cache_has_key() to return true for the same key. + */ +bool +disk_cache_has_key(struct disk_cache *cache, cache_key key); + +#else + +static inline struct disk_cache * +disk_cache_create(void) +{ + return NULL; +} + +static inline void +disk_cache_destroy(struct disk_cache *cache) { + return; +} + +static inline void +disk_cache_put(struct disk_cache *cache, cache_key key, + const void *data, size_t size) +{ + return; +} + +static inline uint8_t * +disk_cache_get(struct disk_cache *cache, cache_key key, size_t *size) +{ + return NULL; +} + +static inline void +disk_cache_put_key(struct disk_cache *cache, cache_key key) +{ + return; +} + +static inline bool +disk_cache_has_key(struct disk_cache *cache, cache_key key) +{ + return false; +} + +#endif /* ENABLE_SHADER_CACHE */ + +#ifdef __cplusplus +} +#endif + +#endif /* CACHE_H */ diff -Nru mesa-12.0.6/src/util/format_r11g11b10f.h mesa-17.0.7/src/util/format_r11g11b10f.h --- mesa-12.0.6/src/util/format_r11g11b10f.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/util/format_r11g11b10f.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,227 @@ +/* + * Copyright (C) 2011 Marek Olšák + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/* Based on code from The OpenGL Programming Guide / 7th Edition, Appendix J. + * Available here: http://www.opengl-redbook.com/appendices/ + * The algorithm in the book contains a bug though, which is fixed in the code + * below. + */ + +#include + +#define UF11(e, m) ((e << 6) | (m)) +#define UF11_EXPONENT_BIAS 15 +#define UF11_EXPONENT_BITS 0x1F +#define UF11_EXPONENT_SHIFT 6 +#define UF11_MANTISSA_BITS 0x3F +#define UF11_MANTISSA_SHIFT (23 - UF11_EXPONENT_SHIFT) +#define UF11_MAX_EXPONENT (UF11_EXPONENT_BITS << UF11_EXPONENT_SHIFT) + +#define UF10(e, m) ((e << 5) | (m)) +#define UF10_EXPONENT_BIAS 15 +#define UF10_EXPONENT_BITS 0x1F +#define UF10_EXPONENT_SHIFT 5 +#define UF10_MANTISSA_BITS 0x1F +#define UF10_MANTISSA_SHIFT (23 - UF10_EXPONENT_SHIFT) +#define UF10_MAX_EXPONENT (UF10_EXPONENT_BITS << UF10_EXPONENT_SHIFT) + +#define F32_INFINITY 0x7f800000 + +static inline uint32_t f32_to_uf11(float val) +{ + union { + float f; + uint32_t ui; + } f32 = {val}; + + uint16_t uf11 = 0; + + /* Decode little-endian 32-bit floating-point value */ + int sign = (f32.ui >> 16) & 0x8000; + /* Map exponent to the range [-127,128] */ + int exponent = ((f32.ui >> 23) & 0xff) - 127; + int mantissa = f32.ui & 0x007fffff; + + if (exponent == 128) { /* Infinity or NaN */ + /* From the GL_EXT_packed_float spec: + * + * "Additionally: negative infinity is converted to zero; positive + * infinity is converted to positive infinity; and both positive and + * negative NaN are converted to positive NaN." + */ + uf11 = UF11_MAX_EXPONENT; + if (mantissa) { + uf11 |= 1; /* NaN */ + } else { + if (sign) + uf11 = 0; /* 0.0 */ + } + } else if (sign) { + return 0; + } else if (val > 65024.0f) { + /* From the GL_EXT_packed_float spec: + * + * "Likewise, finite positive values greater than 65024 (the maximum + * finite representable unsigned 11-bit floating-point value) are + * converted to 65024." + */ + uf11 = UF11(30, 63); + } else if (exponent > -15) { /* Representable value */ + exponent += UF11_EXPONENT_BIAS; + mantissa >>= UF11_MANTISSA_SHIFT; + uf11 = exponent << UF11_EXPONENT_SHIFT | mantissa; + } + + return uf11; +} + +static inline float uf11_to_f32(uint16_t val) +{ + union { + float f; + uint32_t ui; + } f32; + + int exponent = (val & 0x07c0) >> UF11_EXPONENT_SHIFT; + int mantissa = (val & 0x003f); + + f32.f = 0.0; + + if (exponent == 0) { + if (mantissa != 0) { + const float scale = 1.0 / (1 << 20); + f32.f = scale * mantissa; + } + } else if (exponent == 31) { + f32.ui = F32_INFINITY | mantissa; + } else { + float scale, decimal; + exponent -= 15; + if (exponent < 0) { + scale = 1.0f / (1 << -exponent); + } else { + scale = (float) (1 << exponent); + } + decimal = 1.0f + (float) mantissa / 64; + f32.f = scale * decimal; + } + + return f32.f; +} + +static inline uint32_t f32_to_uf10(float val) +{ + union { + float f; + uint32_t ui; + } f32 = {val}; + + uint16_t uf10 = 0; + + /* Decode little-endian 32-bit floating-point value */ + int sign = (f32.ui >> 16) & 0x8000; + /* Map exponent to the range [-127,128] */ + int exponent = ((f32.ui >> 23) & 0xff) - 127; + int mantissa = f32.ui & 0x007fffff; + + if (exponent == 128) { + /* From the GL_EXT_packed_float spec: + * + * "Additionally: negative infinity is converted to zero; positive + * infinity is converted to positive infinity; and both positive and + * negative NaN are converted to positive NaN." + */ + uf10 = UF10_MAX_EXPONENT; + if (mantissa) { + uf10 |= 1; /* NaN */ + } else { + if (sign) + uf10 = 0; /* 0.0 */ + } + } else if (sign) { + return 0; + } else if (val > 64512.0f) { + /* From the GL_EXT_packed_float spec: + * + * "Likewise, finite positive values greater than 64512 (the maximum + * finite representable unsigned 10-bit floating-point value) are + * converted to 64512." + */ + uf10 = UF10(30, 31); + } else if (exponent > -15) { /* Representable value */ + exponent += UF10_EXPONENT_BIAS; + mantissa >>= UF10_MANTISSA_SHIFT; + uf10 = exponent << UF10_EXPONENT_SHIFT | mantissa; + } + + return uf10; +} + +static inline float uf10_to_f32(uint16_t val) +{ + union { + float f; + uint32_t ui; + } f32; + + int exponent = (val & 0x03e0) >> UF10_EXPONENT_SHIFT; + int mantissa = (val & 0x001f); + + f32.f = 0.0; + + if (exponent == 0) { + if (mantissa != 0) { + const float scale = 1.0 / (1 << 19); + f32.f = scale * mantissa; + } + } else if (exponent == 31) { + f32.ui = F32_INFINITY | mantissa; + } else { + float scale, decimal; + exponent -= 15; + if (exponent < 0) { + scale = 1.0f / (1 << -exponent); + } + else { + scale = (float) (1 << exponent); + } + decimal = 1.0f + (float) mantissa / 32; + f32.f = scale * decimal; + } + + return f32.f; +} + +static inline uint32_t float3_to_r11g11b10f(const float rgb[3]) +{ + return ( f32_to_uf11(rgb[0]) & 0x7ff) | + ((f32_to_uf11(rgb[1]) & 0x7ff) << 11) | + ((f32_to_uf10(rgb[2]) & 0x3ff) << 22); +} + +static inline void r11g11b10f_to_float3(uint32_t rgb, float retval[3]) +{ + retval[0] = uf11_to_f32( rgb & 0x7ff); + retval[1] = uf11_to_f32((rgb >> 11) & 0x7ff); + retval[2] = uf10_to_f32((rgb >> 22) & 0x3ff); +} diff -Nru mesa-12.0.6/src/util/format_rgb9e5.h mesa-17.0.7/src/util/format_rgb9e5.h --- mesa-12.0.6/src/util/format_rgb9e5.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/util/format_rgb9e5.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,120 @@ +/* + * Copyright (C) 2011 Marek Olšák + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/* Copied from EXT_texture_shared_exponent and edited, getting rid of + * expensive float math bits too. */ + +#ifndef RGB9E5_H +#define RGB9E5_H + +#include +#include + +#include "c99_math.h" + +#define RGB9E5_EXPONENT_BITS 5 +#define RGB9E5_MANTISSA_BITS 9 +#define RGB9E5_EXP_BIAS 15 +#define RGB9E5_MAX_VALID_BIASED_EXP 31 + +#define MAX_RGB9E5_EXP (RGB9E5_MAX_VALID_BIASED_EXP - RGB9E5_EXP_BIAS) +#define RGB9E5_MANTISSA_VALUES (1< 0x7f800000) + /* catches neg, NaNs */ + return 0; + else if (f.u >= max.u) + return max.u; + else + return f.u; +} + +static inline uint32_t float3_to_rgb9e5(const float rgb[3]) +{ + int rm, gm, bm, exp_shared; + uint32_t revdenom_biasedexp; + union { float f; uint32_t u; } rc, bc, gc, maxrgb, revdenom; + + rc.u = rgb9e5_ClampRange(rgb[0]); + gc.u = rgb9e5_ClampRange(rgb[1]); + bc.u = rgb9e5_ClampRange(rgb[2]); + maxrgb.u = MAX3(rc.u, gc.u, bc.u); + + /* + * Compared to what the spec suggests, instead of conditionally adjusting + * the exponent after the fact do it here by doing the equivalent of +0.5 - + * the int add will spill over into the exponent in this case. + */ + maxrgb.u += maxrgb.u & (1 << (23-9)); + exp_shared = MAX2((maxrgb.u >> 23), -RGB9E5_EXP_BIAS - 1 + 127) + + 1 + RGB9E5_EXP_BIAS - 127; + revdenom_biasedexp = 127 - (exp_shared - RGB9E5_EXP_BIAS - + RGB9E5_MANTISSA_BITS) + 1; + revdenom.u = revdenom_biasedexp << 23; + assert(exp_shared <= RGB9E5_MAX_VALID_BIASED_EXP); + + /* + * The spec uses strict round-up behavior (d3d10 disagrees, but in any case + * must match what is done above for figuring out exponent). + * We avoid the doubles ((int) rc * revdenom + 0.5) by doing the rounding + * ourselves (revdenom was adjusted by +1, above). + */ + rm = (int) (rc.f * revdenom.f); + gm = (int) (gc.f * revdenom.f); + bm = (int) (bc.f * revdenom.f); + rm = (rm & 1) + (rm >> 1); + gm = (gm & 1) + (gm >> 1); + bm = (bm & 1) + (bm >> 1); + + assert(rm <= MAX_RGB9E5_MANTISSA); + assert(gm <= MAX_RGB9E5_MANTISSA); + assert(bm <= MAX_RGB9E5_MANTISSA); + assert(rm >= 0); + assert(gm >= 0); + assert(bm >= 0); + + return (exp_shared << 27) | (bm << 18) | (gm << 9) | rm; +} + +static inline void rgb9e5_to_float3(uint32_t rgb, float retval[3]) +{ + int exponent; + union { float f; uint32_t u; } scale; + + exponent = (rgb >> 27) - RGB9E5_EXP_BIAS - RGB9E5_MANTISSA_BITS; + scale.u = (exponent + 127) << 23; + + retval[0] = ( rgb & 0x1ff) * scale.f; + retval[1] = ((rgb >> 9) & 0x1ff) * scale.f; + retval[2] = ((rgb >> 18) & 0x1ff) * scale.f; +} + +#endif diff -Nru mesa-12.0.6/src/util/hash_table.c mesa-17.0.7/src/util/hash_table.c --- mesa-12.0.6/src/util/hash_table.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/util/hash_table.c 2017-06-01 10:37:10.000000000 +0000 @@ -295,6 +295,8 @@ uint32_t start_hash_address, hash_address; struct hash_entry *available_entry = NULL; + assert(key != NULL); + if (ht->entries >= ht->max_entries) { _mesa_hash_table_rehash(ht, ht->size_index + 1); } else if (ht->deleted_entries + ht->entries >= ht->max_entries) { diff -Nru mesa-12.0.6/src/util/hash_table.h mesa-17.0.7/src/util/hash_table.h --- mesa-12.0.6/src/util/hash_table.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/util/hash_table.h 2017-06-01 10:37:10.000000000 +0000 @@ -139,6 +139,19 @@ entry != NULL; \ entry = _mesa_hash_table_next_entry(ht, entry)) +static inline void +hash_table_call_foreach(struct hash_table *ht, + void (*callback)(const void *key, + void *data, + void *closure), + void *closure) +{ + struct hash_entry *entry; + + hash_table_foreach(ht, entry) + callback(entry->key, entry->data, closure); +} + #ifdef __cplusplus } /* extern C */ #endif diff -Nru mesa-12.0.6/src/util/list.h mesa-17.0.7/src/util/list.h --- mesa-12.0.6/src/util/list.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/util/list.h 2017-06-01 10:37:10.000000000 +0000 @@ -71,12 +71,18 @@ list->prev = item; } +static inline bool list_empty(struct list_head *list); + static inline void list_replace(struct list_head *from, struct list_head *to) { - to->prev = from->prev; - to->next = from->next; - from->next->prev = to; - from->prev->next = to; + if (list_empty(from)) { + list_inithead(to); + } else { + to->prev = from->prev; + to->next = from->next; + from->next->prev = to; + from->prev->next = to; + } } static inline void list_del(struct list_head *item) @@ -104,7 +110,7 @@ */ static inline bool list_is_singular(const struct list_head *list) { - return list->next != NULL && list->next->next == list; + return list->next != NULL && list->next != list && list->next->next == list; } static inline unsigned list_length(struct list_head *list) diff -Nru mesa-12.0.6/src/util/macros.h mesa-17.0.7/src/util/macros.h --- mesa-12.0.6/src/util/macros.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/util/macros.h 2017-06-01 10:37:10.000000000 +0000 @@ -167,12 +167,16 @@ * performs no action and all member variables and base classes are * trivially destructible themselves. */ -# if defined(__GNUC__) +# if (defined(__clang__) && defined(__has_feature)) +# if __has_feature(has_trivial_destructor) +# define HAS_TRIVIAL_DESTRUCTOR(T) __has_trivial_destructor(T) +# endif +# elif defined(__GNUC__) # if ((__GNUC__ > 4) || ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 3))) # define HAS_TRIVIAL_DESTRUCTOR(T) __has_trivial_destructor(T) # endif -# elif (defined(__clang__) && defined(__has_feature)) -# if __has_feature(has_trivial_destructor) +# elif defined(_MSC_VER) && !defined(__INTEL_COMPILER) +# if _MSC_VER >= 1800 # define HAS_TRIVIAL_DESTRUCTOR(T) __has_trivial_destructor(T) # endif # endif @@ -220,7 +224,7 @@ #define MUST_CHECK #endif -#if defined(__GNUC__) || (defined(__SUNPRO_C) && (__SUNPRO_C >= 0x590)) +#if defined(__GNUC__) #define ATTRIBUTE_NOINLINE __attribute__((noinline)) #else #define ATTRIBUTE_NOINLINE @@ -229,4 +233,17 @@ /** Compute ceiling of integer quotient of A divided by B. */ #define DIV_ROUND_UP( A, B ) ( (A) % (B) == 0 ? (A)/(B) : (A)/(B)+1 ) +/** Clamp X to [MIN,MAX] */ +#define CLAMP( X, MIN, MAX ) ( (X)<(MIN) ? (MIN) : ((X)>(MAX) ? (MAX) : (X)) ) + +/** Minimum of two values: */ +#define MIN2( A, B ) ( (A)<(B) ? (A) : (B) ) + +/** Maximum of two values: */ +#define MAX2( A, B ) ( (A)>(B) ? (A) : (B) ) + +/** Minimum and maximum of three values: */ +#define MIN3( A, B, C ) ((A) < (B) ? MIN2(A, C) : MIN2(B, C)) +#define MAX3( A, B, C ) ((A) > (B) ? MAX2(A, C) : MAX2(B, C)) + #endif /* UTIL_MACROS_H */ diff -Nru mesa-12.0.6/src/util/Makefile.am mesa-17.0.7/src/util/Makefile.am --- mesa-12.0.6/src/util/Makefile.am 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/util/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -36,7 +36,6 @@ -I$(top_srcdir)/src/mesa \ -I$(top_srcdir)/src/gallium/include \ -I$(top_srcdir)/src/gallium/auxiliary \ - $(SHA1_CFLAGS) \ $(VISIBILITY_CFLAGS) \ $(MSVC2013_COMPAT_CFLAGS) @@ -44,8 +43,6 @@ $(MESA_UTIL_FILES) \ $(MESA_UTIL_GENERATED_FILES) -libmesautil_la_LIBADD = $(SHA1_LIBS) - roundeven_test_LDADD = -lm check_PROGRAMS = u_atomic_test roundeven_test diff -Nru mesa-12.0.6/src/util/Makefile.in mesa-17.0.7/src/util/Makefile.in --- mesa-12.0.6/src/util/Makefile.in 2017-01-24 01:41:57.000000000 +0000 +++ mesa-17.0.7/src/util/Makefile.in 2017-06-01 10:37:24.000000000 +0000 @@ -130,13 +130,17 @@ CONFIG_CLEAN_FILES = CONFIG_CLEAN_VPATH_FILES = LTLIBRARIES = $(noinst_LTLIBRARIES) -am__DEPENDENCIES_1 = -libmesautil_la_DEPENDENCIES = $(am__DEPENDENCIES_1) -am__objects_1 = libmesautil_la-debug.lo libmesautil_la-half_float.lo \ - libmesautil_la-hash_table.lo libmesautil_la-mesa-sha1.lo \ +libmesautil_la_LIBADD = +am__dirstamp = $(am__leading_dot)dirstamp +am__objects_1 = libmesautil_la-bitscan.lo libmesautil_la-crc32.lo \ + libmesautil_la-debug.lo libmesautil_la-disk_cache.lo \ + libmesautil_la-half_float.lo libmesautil_la-hash_table.lo \ + libmesautil_la-mesa-sha1.lo sha1/libmesautil_la-sha1.lo \ libmesautil_la-ralloc.lo libmesautil_la-register_allocate.lo \ libmesautil_la-rgtc.lo libmesautil_la-set.lo \ - libmesautil_la-strndup.lo libmesautil_la-strtod.lo + libmesautil_la-slab.lo libmesautil_la-string_to_uint_map.lo \ + libmesautil_la-strndup.lo libmesautil_la-strtod.lo \ + libmesautil_la-u_vector.lo am__objects_2 = libmesautil_la-format_srgb.lo am_libmesautil_la_OBJECTS = $(am__objects_1) $(am__objects_2) libmesautil_la_OBJECTS = $(am_libmesautil_la_OBJECTS) @@ -184,6 +188,24 @@ am__v_CCLD_ = $(am__v_CCLD_@AM_DEFAULT_V@) am__v_CCLD_0 = @echo " CCLD " $@; am__v_CCLD_1 = +CXXCOMPILE = $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) \ + $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CXXFLAGS) $(CXXFLAGS) +LTCXXCOMPILE = $(LIBTOOL) $(AM_V_lt) --tag=CXX $(AM_LIBTOOLFLAGS) \ + $(LIBTOOLFLAGS) --mode=compile $(CXX) $(DEFS) \ + $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) \ + $(AM_CXXFLAGS) $(CXXFLAGS) +AM_V_CXX = $(am__v_CXX_@AM_V@) +am__v_CXX_ = $(am__v_CXX_@AM_DEFAULT_V@) +am__v_CXX_0 = @echo " CXX " $@; +am__v_CXX_1 = +CXXLD = $(CXX) +CXXLINK = $(LIBTOOL) $(AM_V_lt) --tag=CXX $(AM_LIBTOOLFLAGS) \ + $(LIBTOOLFLAGS) --mode=link $(CXXLD) $(AM_CXXFLAGS) \ + $(CXXFLAGS) $(AM_LDFLAGS) $(LDFLAGS) -o $@ +AM_V_CXXLD = $(am__v_CXXLD_@AM_V@) +am__v_CXXLD_ = $(am__v_CXXLD_@AM_DEFAULT_V@) +am__v_CXXLD_0 = @echo " CXXLD " $@; +am__v_CXXLD_1 = SOURCES = $(libmesautil_la_SOURCES) roundeven_test.c u_atomic_test.c DIST_SOURCES = $(libmesautil_la_SOURCES) roundeven_test.c \ u_atomic_test.c @@ -464,6 +486,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -478,6 +502,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -507,10 +532,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -560,11 +586,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -604,8 +627,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -642,8 +663,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -652,7 +671,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -660,13 +678,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -695,6 +714,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ @@ -759,9 +779,17 @@ top_srcdir = @top_srcdir@ SUBDIRS = . tests/hash_table MESA_UTIL_FILES := \ + bitscan.c \ + bitscan.h \ bitset.h \ + crc32.c \ + crc32.h \ debug.c \ debug.h \ + disk_cache.c \ + disk_cache.h \ + format_r11g11b10f.h \ + format_rgb9e5.h \ format_srgb.h \ half_float.c \ half_float.h \ @@ -771,6 +799,8 @@ macros.h \ mesa-sha1.c \ mesa-sha1.h \ + sha1/sha1.c \ + sha1/sha1.h \ ralloc.c \ ralloc.h \ register_allocate.c \ @@ -781,12 +811,20 @@ set.c \ set.h \ simple_list.h \ + slab.c \ + slab.h \ + string_to_uint_map.h \ + string_to_uint_map.cpp \ strndup.c \ strndup.h \ strtod.c \ strtod.h \ texcompress_rgtc_tmp.h \ - u_atomic.h + u_atomic.h \ + u_endian.h \ + u_vector.c \ + u_vector.h \ + vk_alloc.h MESA_UTIL_GENERATED_FILES = \ format_srgb.c @@ -803,7 +841,6 @@ -I$(top_srcdir)/src/mesa \ -I$(top_srcdir)/src/gallium/include \ -I$(top_srcdir)/src/gallium/auxiliary \ - $(SHA1_CFLAGS) \ $(VISIBILITY_CFLAGS) \ $(MSVC2013_COMPAT_CFLAGS) @@ -811,7 +848,6 @@ $(MESA_UTIL_FILES) \ $(MESA_UTIL_GENERATED_FILES) -libmesautil_la_LIBADD = $(SHA1_LIBS) roundeven_test_LDADD = -lm TESTS = $(check_PROGRAMS) BUILT_SOURCES = $(MESA_UTIL_GENERATED_FILES) @@ -822,7 +858,7 @@ $(MAKE) $(AM_MAKEFLAGS) all-recursive .SUFFIXES: -.SUFFIXES: .c .lo .log .o .obj .test .test$(EXEEXT) .trs +.SUFFIXES: .c .cpp .lo .log .o .obj .test .test$(EXEEXT) .trs $(srcdir)/Makefile.in: $(srcdir)/Makefile.am $(srcdir)/Makefile.sources $(am__configure_deps) @for dep in $?; do \ case '$(am__configure_deps)' in \ @@ -864,9 +900,17 @@ echo rm -f $${locs}; \ rm -f $${locs}; \ } +sha1/$(am__dirstamp): + @$(MKDIR_P) sha1 + @: > sha1/$(am__dirstamp) +sha1/$(DEPDIR)/$(am__dirstamp): + @$(MKDIR_P) sha1/$(DEPDIR) + @: > sha1/$(DEPDIR)/$(am__dirstamp) +sha1/libmesautil_la-sha1.lo: sha1/$(am__dirstamp) \ + sha1/$(DEPDIR)/$(am__dirstamp) libmesautil.la: $(libmesautil_la_OBJECTS) $(libmesautil_la_DEPENDENCIES) $(EXTRA_libmesautil_la_DEPENDENCIES) - $(AM_V_CCLD)$(LINK) $(libmesautil_la_OBJECTS) $(libmesautil_la_LIBADD) $(LIBS) + $(AM_V_CXXLD)$(CXXLINK) $(libmesautil_la_OBJECTS) $(libmesautil_la_LIBADD) $(LIBS) clean-checkPROGRAMS: @list='$(check_PROGRAMS)'; test -n "$$list" || exit 0; \ @@ -887,11 +931,16 @@ mostlyclean-compile: -rm -f *.$(OBJEXT) + -rm -f sha1/*.$(OBJEXT) + -rm -f sha1/*.lo distclean-compile: -rm -f *.tab.c +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libmesautil_la-bitscan.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libmesautil_la-crc32.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libmesautil_la-debug.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libmesautil_la-disk_cache.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libmesautil_la-format_srgb.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libmesautil_la-half_float.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libmesautil_la-hash_table.Plo@am__quote@ @@ -900,10 +949,14 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libmesautil_la-register_allocate.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libmesautil_la-rgtc.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libmesautil_la-set.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libmesautil_la-slab.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libmesautil_la-string_to_uint_map.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libmesautil_la-strndup.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libmesautil_la-strtod.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libmesautil_la-u_vector.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/roundeven_test.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/u_atomic_test.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@sha1/$(DEPDIR)/libmesautil_la-sha1.Plo@am__quote@ .c.o: @am__fastdepCC_TRUE@ $(AM_V_CC)depbase=`echo $@ | sed 's|[^/]*$$|$(DEPDIR)/&|;s|\.o$$||'`;\ @@ -929,6 +982,20 @@ @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(LTCOMPILE) -c -o $@ $< +libmesautil_la-bitscan.lo: bitscan.c +@am__fastdepCC_TRUE@ $(AM_V_CC)$(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) 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libmesautil_la-debug.lo: debug.c @am__fastdepCC_TRUE@ $(AM_V_CC)$(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libmesautil_la_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT libmesautil_la-debug.lo -MD -MP -MF $(DEPDIR)/libmesautil_la-debug.Tpo -c -o libmesautil_la-debug.lo `test -f 'debug.c' || echo '$(srcdir)/'`debug.c @am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) $(DEPDIR)/libmesautil_la-debug.Tpo $(DEPDIR)/libmesautil_la-debug.Plo @@ -936,6 +1003,13 @@ @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libmesautil_la_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o libmesautil_la-debug.lo `test -f 'debug.c' || echo '$(srcdir)/'`debug.c +libmesautil_la-disk_cache.lo: disk_cache.c +@am__fastdepCC_TRUE@ $(AM_V_CC)$(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libmesautil_la_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT libmesautil_la-disk_cache.lo -MD -MP -MF $(DEPDIR)/libmesautil_la-disk_cache.Tpo -c -o libmesautil_la-disk_cache.lo `test -f 'disk_cache.c' || echo '$(srcdir)/'`disk_cache.c +@am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) $(DEPDIR)/libmesautil_la-disk_cache.Tpo $(DEPDIR)/libmesautil_la-disk_cache.Plo +@AMDEP_TRUE@@am__fastdepCC_FALSE@ $(AM_V_CC)source='disk_cache.c' object='libmesautil_la-disk_cache.lo' libtool=yes @AMDEPBACKSLASH@ +@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libmesautil_la_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o libmesautil_la-disk_cache.lo `test -f 'disk_cache.c' || echo '$(srcdir)/'`disk_cache.c + libmesautil_la-half_float.lo: half_float.c @am__fastdepCC_TRUE@ $(AM_V_CC)$(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libmesautil_la_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT libmesautil_la-half_float.lo -MD -MP -MF $(DEPDIR)/libmesautil_la-half_float.Tpo -c -o libmesautil_la-half_float.lo `test -f 'half_float.c' || echo '$(srcdir)/'`half_float.c @am__fastdepCC_TRUE@ $(AM_V_at)$(am__mv) $(DEPDIR)/libmesautil_la-half_float.Tpo $(DEPDIR)/libmesautil_la-half_float.Plo @@ -957,6 +1031,13 @@ @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libmesautil_la_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c 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+@am__fastdepCXX_TRUE@ $(am__mv) $$depbase.Tpo $$depbase.Po +@AMDEP_TRUE@@am__fastdepCXX_FALSE@ $(AM_V_CXX)source='$<' object='$@' libtool=no @AMDEPBACKSLASH@ +@AMDEP_TRUE@@am__fastdepCXX_FALSE@ DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCXX_FALSE@ $(AM_V_CXX@am__nodep@)$(CXXCOMPILE) -c -o $@ `$(CYGPATH_W) '$<'` + +.cpp.lo: +@am__fastdepCXX_TRUE@ $(AM_V_CXX)depbase=`echo $@ | sed 's|[^/]*$$|$(DEPDIR)/&|;s|\.lo$$||'`;\ +@am__fastdepCXX_TRUE@ $(LTCXXCOMPILE) -MT $@ -MD -MP -MF $$depbase.Tpo -c -o $@ $< &&\ +@am__fastdepCXX_TRUE@ $(am__mv) $$depbase.Tpo $$depbase.Plo +@AMDEP_TRUE@@am__fastdepCXX_FALSE@ $(AM_V_CXX)source='$<' object='$@' libtool=yes @AMDEPBACKSLASH@ +@AMDEP_TRUE@@am__fastdepCXX_FALSE@ DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCXX_FALSE@ $(AM_V_CXX@am__nodep@)$(LTCXXCOMPILE) -c -o $@ $< + +libmesautil_la-string_to_uint_map.lo: string_to_uint_map.cpp +@am__fastdepCXX_TRUE@ $(AM_V_CXX)$(LIBTOOL) $(AM_V_lt) --tag=CXX $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libmesautil_la_CPPFLAGS) $(CPPFLAGS) $(AM_CXXFLAGS) $(CXXFLAGS) -MT libmesautil_la-string_to_uint_map.lo -MD -MP -MF $(DEPDIR)/libmesautil_la-string_to_uint_map.Tpo -c -o libmesautil_la-string_to_uint_map.lo `test -f 'string_to_uint_map.cpp' || echo '$(srcdir)/'`string_to_uint_map.cpp +@am__fastdepCXX_TRUE@ $(AM_V_at)$(am__mv) $(DEPDIR)/libmesautil_la-string_to_uint_map.Tpo $(DEPDIR)/libmesautil_la-string_to_uint_map.Plo +@AMDEP_TRUE@@am__fastdepCXX_FALSE@ $(AM_V_CXX)source='string_to_uint_map.cpp' object='libmesautil_la-string_to_uint_map.lo' libtool=yes @AMDEPBACKSLASH@ +@AMDEP_TRUE@@am__fastdepCXX_FALSE@ DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) @AMDEPBACKSLASH@ +@am__fastdepCXX_FALSE@ $(AM_V_CXX@am__nodep@)$(LIBTOOL) $(AM_V_lt) --tag=CXX $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(libmesautil_la_CPPFLAGS) $(CPPFLAGS) $(AM_CXXFLAGS) $(CXXFLAGS) -c -o libmesautil_la-string_to_uint_map.lo `test -f 'string_to_uint_map.cpp' || echo '$(srcdir)/'`string_to_uint_map.cpp + mostlyclean-libtool: -rm -f *.lo clean-libtool: -rm -rf .libs _libs + -rm -rf sha1/.libs sha1/_libs # This directory's subdirectories are mostly independent; you can cd # into them and run 'make' without going through this Makefile. @@ -1375,6 +1502,8 @@ distclean-generic: -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES) -test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES) + -rm -f sha1/$(DEPDIR)/$(am__dirstamp) + -rm -f sha1/$(am__dirstamp) maintainer-clean-generic: @echo "This command is intended for maintainers to use" @@ -1386,7 +1515,7 @@ clean-noinstLTLIBRARIES mostlyclean-am distclean: distclean-recursive - -rm -rf ./$(DEPDIR) + -rm -rf ./$(DEPDIR) sha1/$(DEPDIR) -rm -f Makefile distclean-am: clean-am distclean-compile distclean-generic \ distclean-tags @@ -1432,7 +1561,7 @@ installcheck-am: maintainer-clean: maintainer-clean-recursive - -rm -rf ./$(DEPDIR) + -rm -rf ./$(DEPDIR) sha1/$(DEPDIR) -rm -f Makefile maintainer-clean-am: distclean-am maintainer-clean-generic diff -Nru mesa-12.0.6/src/util/Makefile.sources mesa-17.0.7/src/util/Makefile.sources --- mesa-12.0.6/src/util/Makefile.sources 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/util/Makefile.sources 2017-06-01 10:37:10.000000000 +0000 @@ -1,7 +1,15 @@ MESA_UTIL_FILES := \ + bitscan.c \ + bitscan.h \ bitset.h \ + crc32.c \ + crc32.h \ debug.c \ debug.h \ + disk_cache.c \ + disk_cache.h \ + format_r11g11b10f.h \ + format_rgb9e5.h \ format_srgb.h \ half_float.c \ half_float.h \ @@ -11,6 +19,8 @@ macros.h \ mesa-sha1.c \ mesa-sha1.h \ + sha1/sha1.c \ + sha1/sha1.h \ ralloc.c \ ralloc.h \ register_allocate.c \ @@ -21,12 +31,20 @@ set.c \ set.h \ simple_list.h \ + slab.c \ + slab.h \ + string_to_uint_map.h \ + string_to_uint_map.cpp \ strndup.c \ strndup.h \ strtod.c \ strtod.h \ texcompress_rgtc_tmp.h \ - u_atomic.h + u_atomic.h \ + u_endian.h \ + u_vector.c \ + u_vector.h \ + vk_alloc.h MESA_UTIL_GENERATED_FILES = \ format_srgb.c diff -Nru mesa-12.0.6/src/util/mesa-sha1.c mesa-17.0.7/src/util/mesa-sha1.c --- mesa-12.0.6/src/util/mesa-sha1.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/util/mesa-sha1.c 2017-06-01 10:37:10.000000000 +0000 @@ -24,15 +24,9 @@ * DEALINGS IN THE SOFTWARE. */ +#include "sha1/sha1.h" #include "mesa-sha1.h" -#ifdef HAVE_SHA1 - -#if defined(HAVE_SHA1_IN_LIBMD) /* Use libmd for SHA1 */ \ - || defined(HAVE_SHA1_IN_LIBC) /* Use libc for SHA1 */ - -#include - struct mesa_sha1 * _mesa_sha1_init(void) { @@ -64,238 +58,6 @@ return 1; } -#elif defined(HAVE_SHA1_IN_COMMONCRYPTO) /* Use CommonCrypto for SHA1 */ - -#include - -struct mesa_sha1 * -_mesa_sha1_init(void) -{ - CC_SHA1_CTX *ctx = malloc(sizeof(*ctx)); - - if (!ctx) - return NULL; - - CC_SHA1_Init(ctx); - return (struct mesa_sha1 *) ctx; -} - -int -_mesa_sha1_update(struct mesa_sha1 *ctx, const void *data, int size) -{ - CC_SHA1_CTX *sha1_ctx = (CC_SHA1_CTX *) ctx; - - CC_SHA1_Update(sha1_ctx, data, size); - return 1; -} - -int -_mesa_sha1_final(struct mesa_sha1 *ctx, unsigned char result[20]) -{ - CC_SHA1_CTX *sha1_ctx = (CC_SHA1_CTX *) ctx; - - CC_SHA1_Final(result, sha1_ctx); - free(sha1_ctx); - return 1; -} - -#elif defined(HAVE_SHA1_IN_CRYPTOAPI) /* Use CryptoAPI for SHA1 */ - -#define WIN32_LEAN_AND_MEAN -#include -#include - -static HCRYPTPROV hProv; - -struct mesa_sha1 * -_mesa_sha1_init(void) -{ - HCRYPTHASH *ctx = malloc(sizeof(*ctx)); - - if (!ctx) - return NULL; - - CryptAcquireContext(&hProv, NULL, MS_DEF_PROV, PROV_RSA_FULL, CRYPT_VERIFYCONTEXT); - CryptCreateHash(hProv, CALG_SHA1, 0, 0, ctx); - return (struct mesa_sha1 *) ctx; -} - -int -_mesa_sha1_update(struct mesa_sha1 *ctx, const void *data, int size) -{ - HCRYPTHASH *hHash = (HCRYPTHASH *) ctx; - - CryptHashData(*hHash, data, size, 0); - return 1; -} - -int -_mesa_sha1_final(struct mesa_sha1 *ctx, unsigned char result[20]) -{ - HCRYPTHASH *hHash = (HCRYPTHASH *) ctx; - DWORD len = 20; - - CryptGetHashParam(*hHash, HP_HASHVAL, result, &len, 0); - CryptDestroyHash(*hHash); - CryptReleaseContext(hProv, 0); - free(ctx); - return 1; -} - -#elif defined(HAVE_SHA1_IN_LIBNETTLE) /* Use libnettle for SHA1 */ - -#include - -struct mesa_sha1 * -_mesa_sha1_init(void) -{ - struct sha1_ctx *ctx = malloc(sizeof(*ctx)); - - if (!ctx) - return NULL; - sha1_init(ctx); - return (struct mesa_sha1 *) ctx; -} - -int -_mesa_sha1_update(struct mesa_sha1 *ctx, const void *data, int size) -{ - sha1_update((struct sha1_ctx *) ctx, size, data); - return 1; -} - -int -_mesa_sha1_final(struct mesa_sha1 *ctx, unsigned char result[20]) -{ - sha1_digest((struct sha1_ctx *) ctx, 20, result); - free(ctx); - return 1; -} - -#elif defined(HAVE_SHA1_IN_LIBGCRYPT) /* Use libgcrypt for SHA1 */ - -#include -#include "c11/threads.h" - -static void _mesa_libgcrypt_init(void) -{ - if (!gcry_check_version(NULL)) - return; - - gcry_control(GCRYCTL_DISABLE_SECMEM, 0); - gcry_control(GCRYCTL_INITIALIZATION_FINISHED, 0); -} - -struct mesa_sha1 * -_mesa_sha1_init(void) -{ - static once_flag flag = ONCE_FLAG_INIT; - gcry_md_hd_t h; - gcry_error_t err; - - call_once(&flag, _mesa_libgcrypt_init); - - err = gcry_md_open(&h, GCRY_MD_SHA1, 0); - if (err) - return NULL; - return (struct mesa_sha1 *) h; -} - -int -_mesa_sha1_update(struct mesa_sha1 *ctx, const void *data, int size) -{ - gcry_md_hd_t h = (gcry_md_hd_t) ctx; - - gcry_md_write(h, data, size); - return 1; -} - -int -_mesa_sha1_final(struct mesa_sha1 *ctx, unsigned char result[20]) -{ - gcry_md_hd_t h = (gcry_md_hd_t) ctx; - - memcpy(result, gcry_md_read(h, GCRY_MD_SHA1), 20); - gcry_md_close(h); - return 1; -} - -#elif defined(HAVE_SHA1_IN_LIBSHA1) /* Use libsha1 */ - -#include - -struct mesa_sha1 * -_mesa_sha1_init(void) -{ - sha1_ctx *ctx = malloc(sizeof(*ctx)); - - if (!ctx) - return NULL; - sha1_begin(ctx); - return (struct mesa_sha1 *) ctx; -} - -int -_mesa_sha1_update(struct mesa_sha1 *ctx, const void *data, int size) -{ - sha1_hash(data, size, (sha1_ctx *) ctx); - return 1; -} - -int -_mesa_sha1_final(struct mesa_sha1 *ctx, unsigned char result[20]) -{ - sha1_end(result, (sha1_ctx *) ctx); - free(ctx); - return 1; -} - -#else /* Use OpenSSL's libcrypto */ - -#include /* buggy openssl/sha.h wants size_t */ -#include - -struct mesa_sha1 * -_mesa_sha1_init(void) -{ - int ret; - SHA_CTX *ctx = malloc(sizeof(*ctx)); - - if (!ctx) - return NULL; - ret = SHA1_Init(ctx); - if (!ret) { - free(ctx); - return NULL; - } - return (struct mesa_sha1 *) ctx; -} - -int -_mesa_sha1_update(struct mesa_sha1 *ctx, const void *data, int size) -{ - int ret; - SHA_CTX *sha_ctx = (SHA_CTX *) ctx; - - ret = SHA1_Update(sha_ctx, data, size); - if (!ret) - free(sha_ctx); - return ret; -} - -int -_mesa_sha1_final(struct mesa_sha1 *ctx, unsigned char result[20]) -{ - int ret; - SHA_CTX *sha_ctx = (SHA_CTX *) ctx; - - ret = SHA1_Final(result, (SHA_CTX *) sha_ctx); - free(sha_ctx); - return ret; -} - -#endif - void _mesa_sha1_compute(const void *data, size_t size, unsigned char result[20]) { @@ -320,5 +82,3 @@ return buf; } - -#endif diff -Nru mesa-12.0.6/src/util/ralloc.c mesa-17.0.7/src/util/ralloc.c --- mesa-12.0.6/src/util/ralloc.c 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/util/ralloc.c 2017-06-01 10:37:10.000000000 +0000 @@ -51,7 +51,20 @@ #define CANARY 0x5A1106 -struct ralloc_header +/* Align the header's size so that ralloc() allocations will return with the + * same alignment as a libc malloc would have (8 on 32-bit GLIBC, 16 on + * 64-bit), avoiding performance penalities on x86 and alignment faults on + * ARM. + */ +struct +#ifdef _MSC_VER + __declspec(align(8)) +#elif defined(__LP64__) + __attribute__((aligned(16))) +#else + __attribute__((aligned(8))) +#endif + ralloc_header { #ifdef DEBUG /* A canary value used to determine whether a pointer is ralloc'd. */ @@ -110,25 +123,24 @@ void * ralloc_size(const void *ctx, size_t size) { - /* ralloc_size was originally implemented using calloc, which meant some - * code accidentally relied on its zero filling behavior. - * - * TODO: Make ralloc_size not zero fill memory, and cleanup any code that - * should instead be using rzalloc. - */ - return rzalloc_size(ctx, size); -} - -void * -rzalloc_size(const void *ctx, size_t size) -{ - void *block = calloc(1, size + sizeof(ralloc_header)); + void *block = malloc(size + sizeof(ralloc_header)); ralloc_header *info; ralloc_header *parent; if (unlikely(block == NULL)) return NULL; + info = (ralloc_header *) block; + /* measurements have shown that calloc is slower (because of + * the multiplication overflow checking?), so clear things + * manually + */ + info->parent = NULL; + info->child = NULL; + info->prev = NULL; + info->next = NULL; + info->destructor = NULL; + parent = ctx != NULL ? get_header(ctx) : NULL; add_child(parent, info); @@ -140,6 +152,17 @@ return PTR_FROM_HEADER(info); } +void * +rzalloc_size(const void *ctx, size_t size) +{ + void *ptr = ralloc_size(ctx, size); + + if (likely(ptr)) + memset(ptr, 0, size); + + return ptr; +} + /* helper function - assumes ptr != NULL */ static void * resize(void *ptr, size_t size) @@ -518,3 +541,356 @@ *start += new_length; return true; } + +/*************************************************************************** + * Linear allocator for short-lived allocations. + *************************************************************************** + * + * The allocator consists of a parent node (2K buffer), which requires + * a ralloc parent, and child nodes (allocations). Child nodes can't be freed + * directly, because the parent doesn't track them. You have to release + * the parent node in order to release all its children. + * + * The allocator uses a fixed-sized buffer with a monotonically increasing + * offset after each allocation. If the buffer is all used, another buffer + * is allocated, sharing the same ralloc parent, so all buffers are at + * the same level in the ralloc hierarchy. + * + * The linear parent node is always the first buffer and keeps track of all + * other buffers. + */ + +#define ALIGN_POT(x, y) (((x) + (y) - 1) & ~((y) - 1)) + +#define MIN_LINEAR_BUFSIZE 2048 +#define SUBALLOC_ALIGNMENT sizeof(uintptr_t) +#define LMAGIC 0x87b9c7d3 + +struct linear_header { +#ifdef DEBUG + unsigned magic; /* for debugging */ +#endif + unsigned offset; /* points to the first unused byte in the buffer */ + unsigned size; /* size of the buffer */ + void *ralloc_parent; /* new buffers will use this */ + struct linear_header *next; /* next buffer if we have more */ + struct linear_header *latest; /* the only buffer that has free space */ + + /* After this structure, the buffer begins. + * Each suballocation consists of linear_size_chunk as its header followed + * by the suballocation, so it goes: + * + * - linear_size_chunk + * - allocated space + * - linear_size_chunk + * - allocated space + * etc. + * + * linear_size_chunk is only needed by linear_realloc. + */ +}; + +struct linear_size_chunk { + unsigned size; /* for realloc */ + unsigned _padding; +}; + +typedef struct linear_header linear_header; +typedef struct linear_size_chunk linear_size_chunk; + +#define LINEAR_PARENT_TO_HEADER(parent) \ + (linear_header*) \ + ((char*)(parent) - sizeof(linear_size_chunk) - sizeof(linear_header)) + +/* Allocate the linear buffer with its header. */ +static linear_header * +create_linear_node(void *ralloc_ctx, unsigned min_size) +{ + linear_header *node; + + min_size += sizeof(linear_size_chunk); + + if (likely(min_size < MIN_LINEAR_BUFSIZE)) + min_size = MIN_LINEAR_BUFSIZE; + + node = ralloc_size(ralloc_ctx, sizeof(linear_header) + min_size); + if (unlikely(!node)) + return NULL; + +#ifdef DEBUG + node->magic = LMAGIC; +#endif + node->offset = 0; + node->size = min_size; + node->ralloc_parent = ralloc_ctx; + node->next = NULL; + node->latest = node; + return node; +} + +void * +linear_alloc_child(void *parent, unsigned size) +{ + linear_header *first = LINEAR_PARENT_TO_HEADER(parent); + linear_header *latest = first->latest; + linear_header *new_node; + linear_size_chunk *ptr; + unsigned full_size; + + assert(first->magic == LMAGIC); + assert(!latest->next); + + size = ALIGN_POT(size, SUBALLOC_ALIGNMENT); + full_size = sizeof(linear_size_chunk) + size; + + if (unlikely(latest->offset + full_size > latest->size)) { + /* allocate a new node */ + new_node = create_linear_node(latest->ralloc_parent, size); + if (unlikely(!new_node)) + return NULL; + + first->latest = new_node; + latest->latest = new_node; + latest->next = new_node; + latest = new_node; + } + + ptr = (linear_size_chunk *)((char*)&latest[1] + latest->offset); + ptr->size = size; + latest->offset += full_size; + return &ptr[1]; +} + +void * +linear_alloc_parent(void *ralloc_ctx, unsigned size) +{ + linear_header *node; + + if (unlikely(!ralloc_ctx)) + return NULL; + + size = ALIGN_POT(size, SUBALLOC_ALIGNMENT); + + node = create_linear_node(ralloc_ctx, size); + if (unlikely(!node)) + return NULL; + + return linear_alloc_child((char*)node + + sizeof(linear_header) + + sizeof(linear_size_chunk), size); +} + +void * +linear_zalloc_child(void *parent, unsigned size) +{ + void *ptr = linear_alloc_child(parent, size); + + if (likely(ptr)) + memset(ptr, 0, size); + return ptr; +} + +void * +linear_zalloc_parent(void *parent, unsigned size) +{ + void *ptr = linear_alloc_parent(parent, size); + + if (likely(ptr)) + memset(ptr, 0, size); + return ptr; +} + +void +linear_free_parent(void *ptr) +{ + linear_header *node; + + if (unlikely(!ptr)) + return; + + node = LINEAR_PARENT_TO_HEADER(ptr); + assert(node->magic == LMAGIC); + + while (node) { + void *ptr = node; + + node = node->next; + ralloc_free(ptr); + } +} + +void +ralloc_steal_linear_parent(void *new_ralloc_ctx, void *ptr) +{ + linear_header *node; + + if (unlikely(!ptr)) + return; + + node = LINEAR_PARENT_TO_HEADER(ptr); + assert(node->magic == LMAGIC); + + while (node) { + ralloc_steal(new_ralloc_ctx, node); + node->ralloc_parent = new_ralloc_ctx; + node = node->next; + } +} + +void * +ralloc_parent_of_linear_parent(void *ptr) +{ + linear_header *node = LINEAR_PARENT_TO_HEADER(ptr); + assert(node->magic == LMAGIC); + return node->ralloc_parent; +} + +void * +linear_realloc(void *parent, void *old, unsigned new_size) +{ + unsigned old_size = 0; + ralloc_header *new_ptr; + + new_ptr = linear_alloc_child(parent, new_size); + + if (unlikely(!old)) + return new_ptr; + + old_size = ((linear_size_chunk*)old)[-1].size; + + if (likely(new_ptr && old_size)) + memcpy(new_ptr, old, MIN2(old_size, new_size)); + + return new_ptr; +} + +/* All code below is pretty much copied from ralloc and only the alloc + * calls are different. + */ + +char * +linear_strdup(void *parent, const char *str) +{ + unsigned n; + char *ptr; + + if (unlikely(!str)) + return NULL; + + n = strlen(str); + ptr = linear_alloc_child(parent, n + 1); + if (unlikely(!ptr)) + return NULL; + + memcpy(ptr, str, n); + ptr[n] = '\0'; + return ptr; +} + +char * +linear_asprintf(void *parent, const char *fmt, ...) +{ + char *ptr; + va_list args; + va_start(args, fmt); + ptr = linear_vasprintf(parent, fmt, args); + va_end(args); + return ptr; +} + +char * +linear_vasprintf(void *parent, const char *fmt, va_list args) +{ + unsigned size = printf_length(fmt, args) + 1; + + char *ptr = linear_alloc_child(parent, size); + if (ptr != NULL) + vsnprintf(ptr, size, fmt, args); + + return ptr; +} + +bool +linear_asprintf_append(void *parent, char **str, const char *fmt, ...) +{ + bool success; + va_list args; + va_start(args, fmt); + success = linear_vasprintf_append(parent, str, fmt, args); + va_end(args); + return success; +} + +bool +linear_vasprintf_append(void *parent, char **str, const char *fmt, va_list args) +{ + size_t existing_length; + assert(str != NULL); + existing_length = *str ? strlen(*str) : 0; + return linear_vasprintf_rewrite_tail(parent, str, &existing_length, fmt, args); +} + +bool +linear_asprintf_rewrite_tail(void *parent, char **str, size_t *start, + const char *fmt, ...) +{ + bool success; + va_list args; + va_start(args, fmt); + success = linear_vasprintf_rewrite_tail(parent, str, start, fmt, args); + va_end(args); + return success; +} + +bool +linear_vasprintf_rewrite_tail(void *parent, char **str, size_t *start, + const char *fmt, va_list args) +{ + size_t new_length; + char *ptr; + + assert(str != NULL); + + if (unlikely(*str == NULL)) { + *str = linear_vasprintf(parent, fmt, args); + *start = strlen(*str); + return true; + } + + new_length = printf_length(fmt, args); + + ptr = linear_realloc(parent, *str, *start + new_length + 1); + if (unlikely(ptr == NULL)) + return false; + + vsnprintf(ptr + *start, new_length + 1, fmt, args); + *str = ptr; + *start += new_length; + return true; +} + +/* helper routine for strcat/strncat - n is the exact amount to copy */ +static bool +linear_cat(void *parent, char **dest, const char *str, unsigned n) +{ + char *both; + unsigned existing_length; + assert(dest != NULL && *dest != NULL); + + existing_length = strlen(*dest); + both = linear_realloc(parent, *dest, existing_length + n + 1); + if (unlikely(both == NULL)) + return false; + + memcpy(both + existing_length, str, n); + both[existing_length + n] = '\0'; + + *dest = both; + return true; +} + +bool +linear_strcat(void *parent, char **dest, const char *str) +{ + return linear_cat(parent, dest, str, strlen(str)); +} diff -Nru mesa-12.0.6/src/util/ralloc.h mesa-17.0.7/src/util/ralloc.h --- mesa-12.0.6/src/util/ralloc.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/util/ralloc.h 2017-06-01 10:37:10.000000000 +0000 @@ -407,10 +407,6 @@ bool ralloc_vasprintf_append(char **str, const char *fmt, va_list args); /// @} -#ifdef __cplusplus -} /* end of extern "C" */ -#endif - /** * Declare C++ new and delete operators which use ralloc. * @@ -421,7 +417,7 @@ * * which is more idiomatic in C++ than calling ralloc. */ -#define DECLARE_RALLOC_CXX_OPERATORS(TYPE) \ +#define DECLARE_ALLOC_CXX_OPERATORS_TEMPLATE(TYPE, ALLOC_FUNC) \ private: \ static void _ralloc_destructor(void *p) \ { \ @@ -430,7 +426,7 @@ public: \ static void* operator new(size_t size, void *mem_ctx) \ { \ - void *p = ralloc_size(mem_ctx, size); \ + void *p = ALLOC_FUNC(mem_ctx, size); \ assert(p != NULL); \ if (!HAS_TRIVIAL_DESTRUCTOR(TYPE)) \ ralloc_set_destructor(p, _ralloc_destructor); \ @@ -448,5 +444,90 @@ ralloc_free(p); \ } +#define DECLARE_RALLOC_CXX_OPERATORS(type) \ + DECLARE_ALLOC_CXX_OPERATORS_TEMPLATE(type, ralloc_size) + +#define DECLARE_RZALLOC_CXX_OPERATORS(type) \ + DECLARE_ALLOC_CXX_OPERATORS_TEMPLATE(type, rzalloc_size) + +#define DECLARE_LINEAR_ALLOC_CXX_OPERATORS(type) \ + DECLARE_ALLOC_CXX_OPERATORS_TEMPLATE(type, linear_alloc_child) + +#define DECLARE_LINEAR_ZALLOC_CXX_OPERATORS(type) \ + DECLARE_ALLOC_CXX_OPERATORS_TEMPLATE(type, linear_zalloc_child) + + +/** + * Do a fast allocation from the linear buffer, also known as the child node + * from the allocator's point of view. It can't be freed directly. You have + * to free the parent or the ralloc parent. + * + * \param parent parent node of the linear allocator + * \param size size to allocate (max 32 bits) + */ +void *linear_alloc_child(void *parent, unsigned size); + +/** + * Allocate a parent node that will hold linear buffers. The returned + * allocation is actually the first child node, but it's also the handle + * of the parent node. Use it for all child node allocations. + * + * \param ralloc_ctx ralloc context, must not be NULL + * \param size size to allocate (max 32 bits) + */ +void *linear_alloc_parent(void *ralloc_ctx, unsigned size); + +/** + * Same as linear_alloc_child, but also clears memory. + */ +void *linear_zalloc_child(void *parent, unsigned size); + +/** + * Same as linear_alloc_parent, but also clears memory. + */ +void *linear_zalloc_parent(void *ralloc_ctx, unsigned size); + +/** + * Free the linear parent node. This will free all child nodes too. + * Freeing the ralloc parent will also free this. + */ +void linear_free_parent(void *ptr); + +/** + * Same as ralloc_steal, but steals the linear parent node. + */ +void ralloc_steal_linear_parent(void *new_ralloc_ctx, void *ptr); + +/** + * Return the ralloc parent of the linear parent node. + */ +void *ralloc_parent_of_linear_parent(void *ptr); + +/** + * Same as realloc except that the linear allocator doesn't free child nodes, + * so it's reduced to memory duplication. It's used in places where + * reallocation is required. Don't use it often. It's much slower than + * realloc. + */ +void *linear_realloc(void *parent, void *old, unsigned new_size); + +/* The functions below have the same semantics as their ralloc counterparts, + * except that they always allocate a linear child node. + */ +char *linear_strdup(void *parent, const char *str); +char *linear_asprintf(void *parent, const char *fmt, ...); +char *linear_vasprintf(void *parent, const char *fmt, va_list args); +bool linear_asprintf_append(void *parent, char **str, const char *fmt, ...); +bool linear_vasprintf_append(void *parent, char **str, const char *fmt, + va_list args); +bool linear_asprintf_rewrite_tail(void *parent, char **str, size_t *start, + const char *fmt, ...); +bool linear_vasprintf_rewrite_tail(void *parent, char **str, size_t *start, + const char *fmt, va_list args); +bool linear_strcat(void *parent, char **dest, const char *str); + +#ifdef __cplusplus +} /* end of extern "C" */ +#endif #endif diff -Nru mesa-12.0.6/src/util/rounding.h mesa-17.0.7/src/util/rounding.h --- mesa-12.0.6/src/util/rounding.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/util/rounding.h 2017-06-01 10:37:10.000000000 +0000 @@ -29,7 +29,8 @@ #include #include -#ifdef __x86_64__ +#if defined(__SSE__) || defined(_MSC_VER) +/* MSVC always has SSE nowadays */ #include #include #endif @@ -95,7 +96,7 @@ static inline long _mesa_lroundevenf(float x) { -#ifdef __x86_64__ +#if defined(__SSE__) || defined(_MSC_VER) #if LONG_MAX == INT64_MAX return _mm_cvtss_si64(_mm_load_ss(&x)); #elif LONG_MAX == INT32_MAX @@ -115,7 +116,7 @@ static inline long _mesa_lroundeven(double x) { -#ifdef __x86_64__ +#if defined(__SSE__) || defined(_MSC_VER) #if LONG_MAX == INT64_MAX return _mm_cvtsd_si64(_mm_load_sd(&x)); #elif LONG_MAX == INT32_MAX diff -Nru mesa-12.0.6/src/util/SConscript mesa-17.0.7/src/util/SConscript --- mesa-12.0.6/src/util/SConscript 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/util/SConscript 2017-06-01 10:37:10.000000000 +0000 @@ -33,11 +33,6 @@ source_lists['MESA_UTIL_GENERATED_FILES'] ) -# XXX We don't yet have scons support for detecting any of the various -# HAVE_SHA1_* definitions, so for now simply disable the shader cache. -if False: - mesautil_sources += source_lists['MESA_UTIL_SHADER_CACHE_FILES'] - mesautil = env.ConvenienceLibrary( target = 'mesautil', source = mesautil_sources, diff -Nru mesa-12.0.6/src/util/sha1/sha1.c mesa-17.0.7/src/util/sha1/sha1.c --- mesa-12.0.6/src/util/sha1/sha1.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/util/sha1/sha1.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,173 @@ +/* $OpenBSD: sha1.c,v 1.26 2015/09/11 09:18:27 guenther Exp $ */ + +/* + * SHA-1 in C + * By Steve Reid + * 100% Public Domain + * + * Test Vectors (from FIPS PUB 180-1) + * "abc" + * A9993E36 4706816A BA3E2571 7850C26C 9CD0D89D + * "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq" + * 84983E44 1C3BD26E BAAE4AA1 F95129E5 E54670F1 + * A million repetitions of "a" + * 34AA973C D4C4DAA4 F61EEB2B DBAD2731 6534016F + */ + +#include +#include +#include "sha1.h" + +#define rol(value, bits) (((value) << (bits)) | ((value) >> (32 - (bits)))) + +/* + * blk0() and blk() perform the initial expand. + * I got the idea of expanding during the round function from SSLeay + */ +#if BYTE_ORDER == LITTLE_ENDIAN +# define blk0(i) (block->l[i] = (rol(block->l[i],24)&0xFF00FF00) \ + |(rol(block->l[i],8)&0x00FF00FF)) +#else +# define blk0(i) block->l[i] +#endif +#define blk(i) (block->l[i&15] = rol(block->l[(i+13)&15]^block->l[(i+8)&15] \ + ^block->l[(i+2)&15]^block->l[i&15],1)) + +/* + * (R0+R1), R2, R3, R4 are the different operations (rounds) used in SHA1 + */ +#define R0(v,w,x,y,z,i) z+=((w&(x^y))^y)+blk0(i)+0x5A827999+rol(v,5);w=rol(w,30); +#define R1(v,w,x,y,z,i) z+=((w&(x^y))^y)+blk(i)+0x5A827999+rol(v,5);w=rol(w,30); +#define R2(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0x6ED9EBA1+rol(v,5);w=rol(w,30); +#define R3(v,w,x,y,z,i) z+=(((w|x)&y)|(w&x))+blk(i)+0x8F1BBCDC+rol(v,5);w=rol(w,30); +#define R4(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0xCA62C1D6+rol(v,5);w=rol(w,30); + +typedef union { + uint8_t c[64]; + uint32_t l[16]; +} CHAR64LONG16; + +/* + * Hash a single 512-bit block. This is the core of the algorithm. + */ +void +SHA1Transform(uint32_t state[5], const uint8_t buffer[SHA1_BLOCK_LENGTH]) +{ + uint32_t a, b, c, d, e; + uint8_t workspace[SHA1_BLOCK_LENGTH]; + CHAR64LONG16 *block = (CHAR64LONG16 *)workspace; + + (void)memcpy(block, buffer, SHA1_BLOCK_LENGTH); + + /* Copy context->state[] to working vars */ + a = state[0]; + b = state[1]; + c = state[2]; + d = state[3]; + e = state[4]; + + /* 4 rounds of 20 operations each. Loop unrolled. */ + R0(a,b,c,d,e, 0); R0(e,a,b,c,d, 1); R0(d,e,a,b,c, 2); R0(c,d,e,a,b, 3); + R0(b,c,d,e,a, 4); R0(a,b,c,d,e, 5); R0(e,a,b,c,d, 6); R0(d,e,a,b,c, 7); + R0(c,d,e,a,b, 8); R0(b,c,d,e,a, 9); R0(a,b,c,d,e,10); R0(e,a,b,c,d,11); + R0(d,e,a,b,c,12); R0(c,d,e,a,b,13); R0(b,c,d,e,a,14); R0(a,b,c,d,e,15); + R1(e,a,b,c,d,16); R1(d,e,a,b,c,17); R1(c,d,e,a,b,18); R1(b,c,d,e,a,19); + R2(a,b,c,d,e,20); R2(e,a,b,c,d,21); R2(d,e,a,b,c,22); R2(c,d,e,a,b,23); + R2(b,c,d,e,a,24); R2(a,b,c,d,e,25); R2(e,a,b,c,d,26); R2(d,e,a,b,c,27); + R2(c,d,e,a,b,28); R2(b,c,d,e,a,29); R2(a,b,c,d,e,30); R2(e,a,b,c,d,31); + R2(d,e,a,b,c,32); R2(c,d,e,a,b,33); R2(b,c,d,e,a,34); R2(a,b,c,d,e,35); + R2(e,a,b,c,d,36); R2(d,e,a,b,c,37); R2(c,d,e,a,b,38); R2(b,c,d,e,a,39); + R3(a,b,c,d,e,40); R3(e,a,b,c,d,41); R3(d,e,a,b,c,42); R3(c,d,e,a,b,43); + R3(b,c,d,e,a,44); R3(a,b,c,d,e,45); R3(e,a,b,c,d,46); R3(d,e,a,b,c,47); + R3(c,d,e,a,b,48); R3(b,c,d,e,a,49); R3(a,b,c,d,e,50); R3(e,a,b,c,d,51); + R3(d,e,a,b,c,52); R3(c,d,e,a,b,53); R3(b,c,d,e,a,54); R3(a,b,c,d,e,55); + R3(e,a,b,c,d,56); R3(d,e,a,b,c,57); R3(c,d,e,a,b,58); R3(b,c,d,e,a,59); + R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63); + R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(d,e,a,b,c,67); + R4(c,d,e,a,b,68); R4(b,c,d,e,a,69); R4(a,b,c,d,e,70); R4(e,a,b,c,d,71); + R4(d,e,a,b,c,72); R4(c,d,e,a,b,73); R4(b,c,d,e,a,74); R4(a,b,c,d,e,75); + R4(e,a,b,c,d,76); R4(d,e,a,b,c,77); R4(c,d,e,a,b,78); R4(b,c,d,e,a,79); + + /* Add the working vars back into context.state[] */ + state[0] += a; + state[1] += b; + state[2] += c; + state[3] += d; + state[4] += e; + + /* Wipe variables */ + a = b = c = d = e = 0; +} + + +/* + * SHA1Init - Initialize new context + */ +void +SHA1Init(SHA1_CTX *context) +{ + + /* SHA1 initialization constants */ + context->count = 0; + context->state[0] = 0x67452301; + context->state[1] = 0xEFCDAB89; + context->state[2] = 0x98BADCFE; + context->state[3] = 0x10325476; + context->state[4] = 0xC3D2E1F0; +} + + +/* + * Run your data through this. + */ +void +SHA1Update(SHA1_CTX *context, const uint8_t *data, size_t len) +{ + size_t i, j; + + j = (size_t)((context->count >> 3) & 63); + context->count += (len << 3); + if ((j + len) > 63) { + (void)memcpy(&context->buffer[j], data, (i = 64-j)); + SHA1Transform(context->state, context->buffer); + for ( ; i + 63 < len; i += 64) + SHA1Transform(context->state, (uint8_t *)&data[i]); + j = 0; + } else { + i = 0; + } + (void)memcpy(&context->buffer[j], &data[i], len - i); +} + + +/* + * Add padding and return the message digest. + */ +void +SHA1Pad(SHA1_CTX *context) +{ + uint8_t finalcount[8]; + uint32_t i; + + for (i = 0; i < 8; i++) { + finalcount[i] = (uint8_t)((context->count >> + ((7 - (i & 7)) * 8)) & 255); /* Endian independent */ + } + SHA1Update(context, (uint8_t *)"\200", 1); + while ((context->count & 504) != 448) + SHA1Update(context, (uint8_t *)"\0", 1); + SHA1Update(context, finalcount, 8); /* Should cause a SHA1Transform() */ +} + +void +SHA1Final(uint8_t digest[SHA1_DIGEST_LENGTH], SHA1_CTX *context) +{ + uint32_t i; + + SHA1Pad(context); + for (i = 0; i < SHA1_DIGEST_LENGTH; i++) { + digest[i] = (uint8_t) + ((context->state[i>>2] >> ((3-(i & 3)) * 8) ) & 255); + } + memset(context, 0, sizeof(*context)); +} diff -Nru mesa-12.0.6/src/util/sha1/sha1.h mesa-17.0.7/src/util/sha1/sha1.h --- mesa-12.0.6/src/util/sha1/sha1.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/util/sha1/sha1.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,53 @@ +/* $OpenBSD: sha1.h,v 1.24 2012/12/05 23:19:57 deraadt Exp $ */ + +/* + * SHA-1 in C + * By Steve Reid + * 100% Public Domain + */ + +#ifndef _SHA1_H +#define _SHA1_H + +#include +#include + +#define SHA1_BLOCK_LENGTH 64 +#define SHA1_DIGEST_LENGTH 20 +#define SHA1_DIGEST_STRING_LENGTH (SHA1_DIGEST_LENGTH * 2 + 1) + +#ifdef __cplusplus +extern "C" { +#endif + +typedef struct { + uint32_t state[5]; + uint64_t count; + uint8_t buffer[SHA1_BLOCK_LENGTH]; +} SHA1_CTX; + +void SHA1Init(SHA1_CTX *); +void SHA1Pad(SHA1_CTX *); +void SHA1Transform(uint32_t [5], const uint8_t [SHA1_BLOCK_LENGTH]); +void SHA1Update(SHA1_CTX *, const uint8_t *, size_t); +void SHA1Final(uint8_t [SHA1_DIGEST_LENGTH], SHA1_CTX *); + +#define HTONDIGEST(x) do { \ + x[0] = htonl(x[0]); \ + x[1] = htonl(x[1]); \ + x[2] = htonl(x[2]); \ + x[3] = htonl(x[3]); \ + x[4] = htonl(x[4]); } while (0) + +#define NTOHDIGEST(x) do { \ + x[0] = ntohl(x[0]); \ + x[1] = ntohl(x[1]); \ + x[2] = ntohl(x[2]); \ + x[3] = ntohl(x[3]); \ + x[4] = ntohl(x[4]); } while (0) + +#ifdef __cplusplus +} +#endif + +#endif /* _SHA1_H */ diff -Nru mesa-12.0.6/src/util/slab.c mesa-17.0.7/src/util/slab.c --- mesa-12.0.6/src/util/slab.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/util/slab.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,316 @@ +/* + * Copyright 2010 Marek Olšák + * Copyright 2016 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "slab.h" +#include "macros.h" +#include "u_atomic.h" +#include +#include +#include + +#define ALIGN(value, align) (((value) + (align) - 1) & ~((align) - 1)) + +#define SLAB_MAGIC_ALLOCATED 0xcafe4321 +#define SLAB_MAGIC_FREE 0x7ee01234 + +#ifdef DEBUG +#define SET_MAGIC(element, value) (element)->magic = (value) +#define CHECK_MAGIC(element, value) assert((element)->magic == (value)) +#else +#define SET_MAGIC(element, value) +#define CHECK_MAGIC(element, value) +#endif + +/* One array element within a big buffer. */ +struct slab_element_header { + /* The next element in the free or migrated list. */ + struct slab_element_header *next; + + /* This is either + * - a pointer to the child pool to which this element belongs, or + * - a pointer to the orphaned page of the element, with the least + * significant bit set to 1. + */ + intptr_t owner; + +#ifdef DEBUG + intptr_t magic; +#endif +}; + +/* The page is an array of allocations in one block. */ +struct slab_page_header { + union { + /* Next page in the same child pool. */ + struct slab_page_header *next; + + /* Number of remaining, non-freed elements (for orphaned pages). */ + unsigned num_remaining; + } u; + /* Memory after the last member is dedicated to the page itself. + * The allocated size is always larger than this structure. + */ +}; + + +static struct slab_element_header * +slab_get_element(struct slab_parent_pool *parent, + struct slab_page_header *page, unsigned index) +{ + return (struct slab_element_header*) + ((uint8_t*)&page[1] + (parent->element_size * index)); +} + +/* The given object/element belongs to an orphaned page (i.e. the owning child + * pool has been destroyed). Mark the element as freed and free the whole page + * when no elements are left in it. + */ +static void +slab_free_orphaned(struct slab_element_header *elt) +{ + struct slab_page_header *page; + + assert(elt->owner & 1); + + page = (struct slab_page_header *)(elt->owner & ~(intptr_t)1); + if (!p_atomic_dec_return(&page->u.num_remaining)) + free(page); +} + +/** + * Create a parent pool for the allocation of same-sized objects. + * + * \param item_size Size of one object. + * \param num_items Number of objects to allocate at once. + */ +void +slab_create_parent(struct slab_parent_pool *parent, + unsigned item_size, + unsigned num_items) +{ + mtx_init(&parent->mutex, mtx_plain); + parent->element_size = ALIGN(sizeof(struct slab_element_header) + item_size, + sizeof(intptr_t)); + parent->num_elements = num_items; +} + +void +slab_destroy_parent(struct slab_parent_pool *parent) +{ + mtx_destroy(&parent->mutex); +} + +/** + * Create a child pool linked to the given parent. + */ +void slab_create_child(struct slab_child_pool *pool, + struct slab_parent_pool *parent) +{ + pool->parent = parent; + pool->pages = NULL; + pool->free = NULL; + pool->migrated = NULL; +} + +/** + * Destroy the child pool. + * + * Pages associated to the pool will be orphaned. They are eventually freed + * when all objects in them are freed. + */ +void slab_destroy_child(struct slab_child_pool *pool) +{ + mtx_lock(&pool->parent->mutex); + + while (pool->pages) { + struct slab_page_header *page = pool->pages; + pool->pages = page->u.next; + p_atomic_set(&page->u.num_remaining, pool->parent->num_elements); + + for (unsigned i = 0; i < pool->parent->num_elements; ++i) { + struct slab_element_header *elt = slab_get_element(pool->parent, page, i); + p_atomic_set(&elt->owner, (intptr_t)page | 1); + } + } + + while (pool->migrated) { + struct slab_element_header *elt = pool->migrated; + pool->migrated = elt->next; + slab_free_orphaned(elt); + } + + mtx_unlock(&pool->parent->mutex); + + while (pool->free) { + struct slab_element_header *elt = pool->free; + pool->free = elt->next; + slab_free_orphaned(elt); + } + + /* Guard against use-after-free. */ + pool->parent = NULL; +} + +static bool +slab_add_new_page(struct slab_child_pool *pool) +{ + struct slab_page_header *page = malloc(sizeof(struct slab_page_header) + + pool->parent->num_elements * pool->parent->element_size); + + if (!page) + return false; + + for (unsigned i = 0; i < pool->parent->num_elements; ++i) { + struct slab_element_header *elt = slab_get_element(pool->parent, page, i); + elt->owner = (intptr_t)pool; + assert(!(elt->owner & 1)); + + elt->next = pool->free; + pool->free = elt; + SET_MAGIC(elt, SLAB_MAGIC_FREE); + } + + page->u.next = pool->pages; + pool->pages = page; + + return true; +} + +/** + * Allocate an object from the child pool. Single-threaded (i.e. the caller + * must ensure that no operation happens on the same child pool in another + * thread). + */ +void * +slab_alloc(struct slab_child_pool *pool) +{ + struct slab_element_header *elt; + + if (!pool->free) { + /* First, collect elements that belong to us but were freed from a + * different child pool. + */ + mtx_lock(&pool->parent->mutex); + pool->free = pool->migrated; + pool->migrated = NULL; + mtx_unlock(&pool->parent->mutex); + + /* Now allocate a new page. */ + if (!pool->free && !slab_add_new_page(pool)) + return NULL; + } + + elt = pool->free; + pool->free = elt->next; + + CHECK_MAGIC(elt, SLAB_MAGIC_FREE); + SET_MAGIC(elt, SLAB_MAGIC_ALLOCATED); + + return &elt[1]; +} + +/** + * Free an object allocated from the slab. Single-threaded (i.e. the caller + * must ensure that no operation happens on the same child pool in another + * thread). + * + * Freeing an object in a different child pool from the one where it was + * allocated is allowed, as long the pool belong to the same parent. No + * additional locking is required in this case. + */ +void slab_free(struct slab_child_pool *pool, void *ptr) +{ + struct slab_element_header *elt = ((struct slab_element_header*)ptr - 1); + intptr_t owner_int; + + CHECK_MAGIC(elt, SLAB_MAGIC_ALLOCATED); + SET_MAGIC(elt, SLAB_MAGIC_FREE); + + if (p_atomic_read(&elt->owner) == (intptr_t)pool) { + /* This is the simple case: The caller guarantees that we can safely + * access the free list. + */ + elt->next = pool->free; + pool->free = elt; + return; + } + + /* The slow case: migration or an orphaned page. */ + mtx_lock(&pool->parent->mutex); + + /* Note: we _must_ re-read elt->owner here because the owning child pool + * may have been destroyed by another thread in the meantime. + */ + owner_int = p_atomic_read(&elt->owner); + + if (!(owner_int & 1)) { + struct slab_child_pool *owner = (struct slab_child_pool *)owner_int; + elt->next = owner->migrated; + owner->migrated = elt; + mtx_unlock(&pool->parent->mutex); + } else { + mtx_unlock(&pool->parent->mutex); + + slab_free_orphaned(elt); + } +} + +/** + * Allocate an object from the slab. Single-threaded (no mutex). + */ +void * +slab_alloc_st(struct slab_mempool *pool) +{ + return slab_alloc(&pool->child); +} + +/** + * Free an object allocated from the slab. Single-threaded (no mutex). + */ +void +slab_free_st(struct slab_mempool *pool, void *ptr) +{ + slab_free(&pool->child, ptr); +} + +void +slab_destroy(struct slab_mempool *pool) +{ + slab_destroy_child(&pool->child); + slab_destroy_parent(&pool->parent); +} + +/** + * Create an allocator for same-sized objects. + * + * \param item_size Size of one object. + * \param num_items Number of objects to allocate at once. + */ +void +slab_create(struct slab_mempool *pool, + unsigned item_size, + unsigned num_items) +{ + slab_create_parent(&pool->parent, item_size, num_items); + slab_create_child(&pool->child, &pool->parent); +} diff -Nru mesa-12.0.6/src/util/slab.h mesa-17.0.7/src/util/slab.h --- mesa-12.0.6/src/util/slab.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/util/slab.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,94 @@ +/* + * Copyright 2010 Marek Olšák + * Copyright 2016 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +/** + * Slab allocator for equally sized memory allocations. + * + * Objects are allocated from "child" pools that are connected to a "parent" + * pool. + * + * Calls to slab_alloc/slab_free for the same child pool must not occur from + * multiple threads simultaneously. + * + * Allocations obtained from one child pool should usually be freed in the + * same child pool. Freeing an allocation in a different child pool associated + * to the same parent is allowed (and requires no locking by the caller), but + * it is discouraged because it implies a performance penalty. + * + * For convenience and to ease the transition, there is also a set of wrapper + * functions around a single parent-child pair. + */ + +#ifndef SLAB_H +#define SLAB_H + +#include "c11/threads.h" + +struct slab_element_header; +struct slab_page_header; + +struct slab_parent_pool { + mtx_t mutex; + unsigned element_size; + unsigned num_elements; +}; + +struct slab_child_pool { + struct slab_parent_pool *parent; + + struct slab_page_header *pages; + + /* Free elements. */ + struct slab_element_header *free; + + /* Elements that are owned by this pool but were freed with a different + * pool as the argument to slab_free. + * + * This list is protected by the parent mutex. + */ + struct slab_element_header *migrated; +}; + +void slab_create_parent(struct slab_parent_pool *parent, + unsigned item_size, + unsigned num_items); +void slab_destroy_parent(struct slab_parent_pool *parent); +void slab_create_child(struct slab_child_pool *pool, + struct slab_parent_pool *parent); +void slab_destroy_child(struct slab_child_pool *pool); +void *slab_alloc(struct slab_child_pool *pool); +void slab_free(struct slab_child_pool *pool, void *ptr); + +struct slab_mempool { + struct slab_parent_pool parent; + struct slab_child_pool child; +}; + +void slab_create(struct slab_mempool *pool, + unsigned item_size, + unsigned num_items); +void slab_destroy(struct slab_mempool *pool); +void *slab_alloc_st(struct slab_mempool *pool); +void slab_free_st(struct slab_mempool *pool, void *ptr); + +#endif diff -Nru mesa-12.0.6/src/util/string_to_uint_map.cpp mesa-17.0.7/src/util/string_to_uint_map.cpp --- mesa-12.0.6/src/util/string_to_uint_map.cpp 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/util/string_to_uint_map.cpp 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,42 @@ +/* + * Copyright © 2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/** + * \file string_to_uint_map.cpp + * \brief Dumb wrapprs so that C code can create and destroy maps. + * + * \author Ian Romanick + */ +#include "string_to_uint_map.h" + +extern "C" struct string_to_uint_map * +string_to_uint_map_ctor() +{ + return new string_to_uint_map; +} + +extern "C" void +string_to_uint_map_dtor(struct string_to_uint_map *map) +{ + delete map; +} diff -Nru mesa-12.0.6/src/util/string_to_uint_map.h mesa-17.0.7/src/util/string_to_uint_map.h --- mesa-12.0.6/src/util/string_to_uint_map.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/util/string_to_uint_map.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,177 @@ +/* + * Copyright © 2008 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +#ifndef STRING_TO_UINT_MAP_H +#define STRING_TO_UINT_MAP_H + +#include +#include +#include "util/hash_table.h" + +struct string_to_uint_map; + +#ifdef __cplusplus +extern "C" { +#endif + +struct string_to_uint_map * +string_to_uint_map_ctor(); + +void +string_to_uint_map_dtor(struct string_to_uint_map *); + + +#ifdef __cplusplus +} + +struct string_map_iterate_wrapper_closure { + void (*callback)(const char *key, unsigned value, void *closure); + void *closure; +}; + +/** + * Map from a string (name) to an unsigned integer value + * + * \note + * Because of the way this class interacts with the \c hash_table + * implementation, values of \c UINT_MAX cannot be stored in the map. + */ +struct string_to_uint_map { +public: + string_to_uint_map() + { + this->ht = _mesa_hash_table_create(NULL, _mesa_key_hash_string, + _mesa_key_string_equal); + } + + ~string_to_uint_map() + { + hash_table_call_foreach(this->ht, delete_key, NULL); + _mesa_hash_table_destroy(this->ht, NULL); + } + + /** + * Remove all mappings from this map. + */ + void clear() + { + hash_table_call_foreach(this->ht, delete_key, NULL); + _mesa_hash_table_clear(this->ht, NULL); + } + + /** + * Runs a passed callback for the hash + */ + void iterate(void (*func)(const char *, unsigned, void *), void *closure) + { + struct string_map_iterate_wrapper_closure *wrapper; + + wrapper = (struct string_map_iterate_wrapper_closure *) + malloc(sizeof(struct string_map_iterate_wrapper_closure)); + if (wrapper == NULL) + return; + + wrapper->callback = func; + wrapper->closure = closure; + + hash_table_call_foreach(this->ht, subtract_one_wrapper, wrapper); + free(wrapper); + } + + /** + * Get the value associated with a particular key + * + * \return + * If \c key is found in the map, \c true is returned. Otherwise \c false + * is returned. + * + * \note + * If \c key is not found in the table, \c value is not modified. + */ + bool get(unsigned &value, const char *key) + { + hash_entry *entry = _mesa_hash_table_search(this->ht, + (const void *) key); + + if (!entry) + return false; + + const intptr_t v = (intptr_t) entry->data; + value = (unsigned)(v - 1); + return true; + } + + void put(unsigned value, const char *key) + { + /* The low-level hash table structure returns NULL if key is not in the + * hash table. However, users of this map might want to store zero as a + * valid value in the table. Bias the value by +1 so that a + * user-specified zero is stored as 1. This enables ::get to tell the + * difference between a user-specified zero (returned as 1 by + * _mesa_hash_table_search) and the key not in the table (returned as 0 by + * _mesa_hash_table_search). + * + * The net effect is that we can't store UINT_MAX in the table. This is + * because UINT_MAX+1 = 0. + */ + assert(value != UINT_MAX); + char *dup_key = strdup(key); + + struct hash_entry *entry = _mesa_hash_table_search(this->ht, dup_key); + if (entry) { + entry->data = (void *) (intptr_t) (value + 1); + } else { + _mesa_hash_table_insert(this->ht, dup_key, + (void *) (intptr_t) (value + 1)); + } + + if (entry) + free(dup_key); + } + +private: + static void delete_key(const void *key, void *data, void *closure) + { + (void) data; + (void) closure; + + free((char *)key); + } + + static void subtract_one_wrapper(const void *key, void *data, void *closure) + { + struct string_map_iterate_wrapper_closure *wrapper = + (struct string_map_iterate_wrapper_closure *) closure; + unsigned value = (intptr_t) data; + + value -= 1; + + wrapper->callback((const char *) key, value, wrapper->closure); + } + + struct hash_table *ht; +}; + +#endif /* __cplusplus */ +#endif /* STRING_TO_UINT_MAP_H */ diff -Nru mesa-12.0.6/src/util/tests/hash_table/Makefile.in mesa-17.0.7/src/util/tests/hash_table/Makefile.in --- mesa-12.0.6/src/util/tests/hash_table/Makefile.in 2017-01-24 01:41:57.000000000 +0000 +++ mesa-17.0.7/src/util/tests/hash_table/Makefile.in 2017-06-01 10:37:24.000000000 +0000 @@ -479,6 +479,8 @@ AMDGPU_LIBS = @AMDGPU_LIBS@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ +ANDROID_CFLAGS = @ANDROID_CFLAGS@ +ANDROID_LIBS = @ANDROID_LIBS@ AR = @AR@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ @@ -493,6 +495,7 @@ CFLAGS = @CFLAGS@ CLANG_RESOURCE_DIR = @CLANG_RESOURCE_DIR@ CLOCK_LIB = @CLOCK_LIB@ +CLOVER_STD_OVERRIDE = @CLOVER_STD_OVERRIDE@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CXX = @CXX@ @@ -522,10 +525,11 @@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGL_CFLAGS = @EGL_CFLAGS@ -EGL_CLIENT_APIS = @EGL_CLIENT_APIS@ EGL_LIB_DEPS = @EGL_LIB_DEPS@ EGL_NATIVE_PLATFORM = @EGL_NATIVE_PLATFORM@ EGREP = @EGREP@ +ETNAVIV_CFLAGS = @ETNAVIV_CFLAGS@ +ETNAVIV_LIBS = @ETNAVIV_LIBS@ EXEEXT = @EXEEXT@ EXPAT_CFLAGS = @EXPAT_CFLAGS@ EXPAT_LIBS = @EXPAT_LIBS@ @@ -575,11 +579,8 @@ LIBELF_LIBS = @LIBELF_LIBS@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ -LIBSHA1_CFLAGS = @LIBSHA1_CFLAGS@ -LIBSHA1_LIBS = @LIBSHA1_LIBS@ +LIBSENSORS_LIBS = @LIBSENSORS_LIBS@ LIBTOOL = @LIBTOOL@ -LIBUDEV_CFLAGS = @LIBUDEV_CFLAGS@ -LIBUDEV_LIBS = @LIBUDEV_LIBS@ LIB_DIR = @LIB_DIR@ LIB_EXT = @LIB_EXT@ LIPO = @LIPO@ @@ -619,8 +620,6 @@ OMX_LIB_INSTALL_DIR = @OMX_LIB_INSTALL_DIR@ OPENCL_LIBNAME = @OPENCL_LIBNAME@ OPENCL_VERSION = @OPENCL_VERSION@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ OSMESA_LIB = @OSMESA_LIB@ OSMESA_LIB_DEPS = @OSMESA_LIB_DEPS@ OSMESA_PC_LIB_PRIV = @OSMESA_PC_LIB_PRIV@ @@ -657,8 +656,6 @@ SELINUX_CFLAGS = @SELINUX_CFLAGS@ SELINUX_LIBS = @SELINUX_LIBS@ SET_MAKE = @SET_MAKE@ -SHA1_CFLAGS = @SHA1_CFLAGS@ -SHA1_LIBS = @SHA1_LIBS@ SHELL = @SHELL@ SIMPENROSE_CFLAGS = @SIMPENROSE_CFLAGS@ SIMPENROSE_LIBS = @SIMPENROSE_LIBS@ @@ -667,7 +664,6 @@ SWR_AVX2_CXXFLAGS = @SWR_AVX2_CXXFLAGS@ SWR_AVX_CXXFLAGS = @SWR_AVX_CXXFLAGS@ SWR_CXX11_CXXFLAGS = @SWR_CXX11_CXXFLAGS@ -TIMESTAMP_CMD = @TIMESTAMP_CMD@ VALGRIND_CFLAGS = @VALGRIND_CFLAGS@ VALGRIND_LIBS = @VALGRIND_LIBS@ VA_CFLAGS = @VA_CFLAGS@ @@ -675,13 +671,14 @@ VA_LIB_INSTALL_DIR = @VA_LIB_INSTALL_DIR@ VA_MAJOR = @VA_MAJOR@ VA_MINOR = @VA_MINOR@ +VC4_CFLAGS = @VC4_CFLAGS@ +VC4_LIBS = @VC4_LIBS@ VDPAU_CFLAGS = @VDPAU_CFLAGS@ VDPAU_LIBS = @VDPAU_LIBS@ VDPAU_LIB_INSTALL_DIR = @VDPAU_LIB_INSTALL_DIR@ VDPAU_MAJOR = @VDPAU_MAJOR@ VDPAU_MINOR = @VDPAU_MINOR@ VERSION = @VERSION@ -VG_LIB_DEPS = @VG_LIB_DEPS@ VISIBILITY_CFLAGS = @VISIBILITY_CFLAGS@ VISIBILITY_CXXFLAGS = @VISIBILITY_CXXFLAGS@ VL_CFLAGS = @VL_CFLAGS@ @@ -710,6 +707,7 @@ XVMC_LIB_INSTALL_DIR = @XVMC_LIB_INSTALL_DIR@ XVMC_MAJOR = @XVMC_MAJOR@ XVMC_MINOR = @XVMC_MINOR@ +XXD = @XXD@ YACC = @YACC@ YFLAGS = @YFLAGS@ abs_builddir = @abs_builddir@ diff -Nru mesa-12.0.6/src/util/u_atomic.h mesa-17.0.7/src/util/u_atomic.h --- mesa-12.0.6/src/util/u_atomic.h 2017-01-24 01:41:28.000000000 +0000 +++ mesa-17.0.7/src/util/u_atomic.h 2017-06-01 10:37:10.000000000 +0000 @@ -36,6 +36,20 @@ #define PIPE_ATOMIC "GCC Sync Intrinsics" +#if defined(USE_GCC_ATOMIC_BUILTINS) + +/* The builtins with explicit memory model are available since GCC 4.7. */ +#define p_atomic_set(_v, _i) __atomic_store_n((_v), (_i), __ATOMIC_RELEASE) +#define p_atomic_read(_v) __atomic_load_n((_v), __ATOMIC_ACQUIRE) +#define p_atomic_dec_zero(v) (__atomic_sub_fetch((v), 1, __ATOMIC_ACQ_REL) == 0) +#define p_atomic_inc(v) (void) __atomic_add_fetch((v), 1, __ATOMIC_ACQ_REL) +#define p_atomic_dec(v) (void) __atomic_sub_fetch((v), 1, __ATOMIC_ACQ_REL) +#define p_atomic_add(v, i) (void) __atomic_add_fetch((v), (i), __ATOMIC_ACQ_REL) +#define p_atomic_inc_return(v) __atomic_add_fetch((v), 1, __ATOMIC_ACQ_REL) +#define p_atomic_dec_return(v) __atomic_sub_fetch((v), 1, __ATOMIC_ACQ_REL) + +#else + #define p_atomic_set(_v, _i) (*(_v) = (_i)) #define p_atomic_read(_v) (*(_v)) #define p_atomic_dec_zero(v) (__sync_sub_and_fetch((v), 1) == 0) @@ -44,6 +58,13 @@ #define p_atomic_add(v, i) (void) __sync_add_and_fetch((v), (i)) #define p_atomic_inc_return(v) __sync_add_and_fetch((v), 1) #define p_atomic_dec_return(v) __sync_sub_and_fetch((v), 1) + +#endif + +/* There is no __atomic_* compare and exchange that returns the current value. + * Also, GCC 5.4 seems unable to optimize a compound statement expression that + * uses an additional stack variable with __atomic_compare_exchange[_n]. + */ #define p_atomic_cmpxchg(v, old, _new) \ __sync_val_compare_and_swap((v), (old), (_new)) diff -Nru mesa-12.0.6/src/util/u_endian.h mesa-17.0.7/src/util/u_endian.h --- mesa-12.0.6/src/util/u_endian.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/util/u_endian.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,69 @@ +/************************************************************************** + * + * Copyright 2007-2008 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ +#ifndef U_ENDIAN_H +#define U_ENDIAN_H + +#if defined(__GLIBC__) || defined(ANDROID) +#include + +#if __BYTE_ORDER == __LITTLE_ENDIAN +# define PIPE_ARCH_LITTLE_ENDIAN +#elif __BYTE_ORDER == __BIG_ENDIAN +# define PIPE_ARCH_BIG_ENDIAN +#endif + +#elif defined(__APPLE__) +#include + +#if __DARWIN_BYTE_ORDER == __DARWIN_LITTLE_ENDIAN +# define PIPE_ARCH_LITTLE_ENDIAN +#elif __DARWIN_BYTE_ORDER == __DARWIN_BIG_ENDIAN +# define PIPE_ARCH_BIG_ENDIAN +#endif + +#elif defined(__sun) +#include + +#if defined(_LITTLE_ENDIAN) +# define PIPE_ARCH_LITTLE_ENDIAN +#elif defined(_BIG_ENDIAN) +# define PIPE_ARCH_BIG_ENDIAN +#endif + +#elif defined(__OpenBSD__) || defined(__NetBSD__) +#include +#include + +#if _BYTE_ORDER == _LITTLE_ENDIAN +# define PIPE_ARCH_LITTLE_ENDIAN +#elif _BYTE_ORDER == _BIG_ENDIAN +# define PIPE_ARCH_BIG_ENDIAN +#endif + +#endif + +#endif diff -Nru mesa-12.0.6/src/util/u_vector.c mesa-17.0.7/src/util/u_vector.c --- mesa-12.0.6/src/util/u_vector.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/util/u_vector.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,98 @@ +/* + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ +#include "util/u_vector.h" + +int +u_vector_init(struct u_vector *vector, uint32_t element_size, uint32_t size) +{ + assert(util_is_power_of_two(size)); + assert(element_size < size && util_is_power_of_two(element_size)); + + vector->head = 0; + vector->tail = 0; + vector->element_size = element_size; + vector->size = size; + vector->data = malloc(size); + + return vector->data != NULL; +} + +void * +u_vector_add(struct u_vector *vector) +{ + uint32_t offset, size, split, src_tail, dst_tail; + void *data; + + if (vector->head - vector->tail == vector->size) { + size = vector->size * 2; + data = malloc(size); + if (data == NULL) + return NULL; + src_tail = vector->tail & (vector->size - 1); + dst_tail = vector->tail & (size - 1); + if (src_tail == 0) { + /* Since we know that the vector is full, this means that it's + * linear from start to end so we can do one copy. + */ + memcpy((char *)data + dst_tail, vector->data, vector->size); + } else { + /* In this case, the vector is split into two pieces and we have + * to do two copies. We have to be careful to make sure each + * piece goes to the right locations. Thanks to the change in + * size, it may or may not still wrap around. + */ + split = u_align_u32(vector->tail, vector->size); + assert(vector->tail <= split && split < vector->head); + memcpy((char *)data + dst_tail, (char *)vector->data + src_tail, + split - vector->tail); + memcpy((char *)data + (split & (size - 1)), vector->data, + vector->head - split); + } + free(vector->data); + vector->data = data; + vector->size = size; + } + + assert(vector->head - vector->tail < vector->size); + + offset = vector->head & (vector->size - 1); + vector->head += vector->element_size; + + return (char *)vector->data + offset; +} + +void * +u_vector_remove(struct u_vector *vector) +{ + uint32_t offset; + + if (vector->head == vector->tail) + return NULL; + + assert(vector->head - vector->tail <= vector->size); + + offset = vector->tail & (vector->size - 1); + vector->tail += vector->element_size; + + return (char *)vector->data + offset; +} diff -Nru mesa-12.0.6/src/util/u_vector.h mesa-17.0.7/src/util/u_vector.h --- mesa-12.0.6/src/util/u_vector.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/util/u_vector.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,92 @@ +/* + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +/* + * u_vector is a vector based queue for storing arbitrary + * sized arrays of objects without using a linked list. + */ + +#ifndef U_VECTOR_H +#define U_VECTOR_H + +#include +#include +#include "util/u_math.h" +#include "util/macros.h" + +/* TODO - move to u_math.h - name it better etc */ +static inline uint32_t +u_align_u32(uint32_t v, uint32_t a) +{ + assert(a != 0 && a == (a & -a)); + return (v + a - 1) & ~(a - 1); +} + +struct u_vector { + uint32_t head; + uint32_t tail; + uint32_t element_size; + uint32_t size; + void *data; +}; + +int u_vector_init(struct u_vector *queue, uint32_t element_size, uint32_t size); +void *u_vector_add(struct u_vector *queue); +void *u_vector_remove(struct u_vector *queue); + +static inline int +u_vector_length(struct u_vector *queue) +{ + return (queue->head - queue->tail) / queue->element_size; +} + +static inline void * +u_vector_head(struct u_vector *vector) +{ + assert(vector->tail < vector->head); + return (void *)((char *)vector->data + + ((vector->head - vector->element_size) & + (vector->size - 1))); +} + +static inline void * +u_vector_tail(struct u_vector *vector) +{ + return (void *)((char *)vector->data + (vector->tail & (vector->size - 1))); +} + +static inline void +u_vector_finish(struct u_vector *queue) +{ + free(queue->data); +} + +#define u_vector_foreach(elem, queue) \ + STATIC_ASSERT(__builtin_types_compatible_p(__typeof__(queue), struct u_vector *)); \ + for (uint32_t __u_vector_offset = (queue)->tail; \ + elem = (queue)->data + (__u_vector_offset & ((queue)->size - 1)), __u_vector_offset < (queue)->head; \ + __u_vector_offset += (queue)->element_size) + + +#endif + diff -Nru mesa-12.0.6/src/util/vk_alloc.h mesa-17.0.7/src/util/vk_alloc.h --- mesa-12.0.6/src/util/vk_alloc.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/util/vk_alloc.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,94 @@ +/* + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ +#ifndef VK_ALLOC_H +#define VK_ALLOC_H + +/* common allocation inlines for vulkan drivers */ + +#include +#include + +static inline void * +vk_alloc(const VkAllocationCallbacks *alloc, + size_t size, size_t align, + VkSystemAllocationScope scope) +{ + return alloc->pfnAllocation(alloc->pUserData, size, align, scope); +} + +static inline void * +vk_realloc(const VkAllocationCallbacks *alloc, + void *ptr, size_t size, size_t align, + VkSystemAllocationScope scope) +{ + return alloc->pfnReallocation(alloc->pUserData, ptr, size, align, scope); +} + +static inline void +vk_free(const VkAllocationCallbacks *alloc, void *data) +{ + if (data == NULL) + return; + + alloc->pfnFree(alloc->pUserData, data); +} + +static inline void * +vk_alloc2(const VkAllocationCallbacks *parent_alloc, + const VkAllocationCallbacks *alloc, + size_t size, size_t align, + VkSystemAllocationScope scope) +{ + if (alloc) + return vk_alloc(alloc, size, align, scope); + else + return vk_alloc(parent_alloc, size, align, scope); +} + +static inline void * +vk_zalloc2(const VkAllocationCallbacks *parent_alloc, + const VkAllocationCallbacks *alloc, + size_t size, size_t align, + VkSystemAllocationScope scope) +{ + void *mem = vk_alloc2(parent_alloc, alloc, size, align, scope); + if (mem == NULL) + return NULL; + + memset(mem, 0, size); + + return mem; +} + +static inline void +vk_free2(const VkAllocationCallbacks *parent_alloc, + const VkAllocationCallbacks *alloc, + void *data) +{ + if (alloc) + vk_free(alloc, data); + else + vk_free(parent_alloc, data); +} + +#endif diff -Nru mesa-12.0.6/src/vulkan/registry/vk.xml mesa-17.0.7/src/vulkan/registry/vk.xml --- mesa-12.0.6/src/vulkan/registry/vk.xml 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/vulkan/registry/vk.xml 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,4903 @@ + + + +Copyright (c) 2015-2016 The Khronos Group Inc. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and/or associated documentation files (the +"Materials"), to deal in the Materials without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, sublicense, and/or sell copies of the Materials, and to +permit persons to whom the Materials are furnished to do so, subject to +the following conditions: + +The above copyright notice and this permission notice shall be included +in all copies or substantial portions of the Materials. + +THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY +CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, +TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE +MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. + +------------------------------------------------------------------------ + +This file, vk.xml, is the Vulkan API Registry. It is a critically important +and normative part of the Vulkan Specification, including a canonical +machine-readable definition of the API, parameter and member validation +language incorporated into the Specification and reference pages, and other +material which is registered by Khronos, such as tags used by extension and +layer authors. The only authoritative version of vk.xml is the one +maintained in the master branch of the Khronos Vulkan GitHub project. + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + #include "vk_platform.h" + + #include "vulkan.h" + #include <X11/Xlib.h> + #include <android/native_window.h> + #include <mir_toolkit/client_types.h> + #include <wayland-client.h> + #include <windows.h> + #include <xcb/xcb.h> + + + + + + + + + + + + + + + + + + + #define VK_MAKE_VERSION(major, minor, patch) \ + (((major) << 22) | ((minor) << 12) | (patch)) + #define VK_VERSION_MAJOR(version) ((uint32_t)(version) >> 22) + #define VK_VERSION_MINOR(version) (((uint32_t)(version) >> 12) & 0x3ff) + #define VK_VERSION_PATCH(version) ((uint32_t)(version) & 0xfff) + + // DEPRECATED: This define has been removed. Specific version defines (e.g. VK_API_VERSION_1_0), or the VK_MAKE_VERSION macro, should be used instead. +//#define VK_API_VERSION VK_MAKE_VERSION(1, 0, 0) + // Vulkan 1.0 version number +#define VK_API_VERSION_1_0 VK_MAKE_VERSION(1, 0, 0) + // Version of this file +#define VK_HEADER_VERSION 38 + + +#define VK_DEFINE_HANDLE(object) typedef struct object##_T* object; + + +#if !defined(VK_DEFINE_NON_DISPATCHABLE_HANDLE) +#if defined(__LP64__) || defined(_WIN64) || (defined(__x86_64__) && !defined(__ILP32__) ) || defined(_M_X64) || defined(__ia64) || defined (_M_IA64) || defined(__aarch64__) || defined(__powerpc64__) + #define VK_DEFINE_NON_DISPATCHABLE_HANDLE(object) typedef struct object##_T *object; +#else + #define VK_DEFINE_NON_DISPATCHABLE_HANDLE(object) typedef uint64_t object; +#endif +#endif + + + +#define VK_NULL_HANDLE 0 + + + typedef uint32_t VkSampleMask; + typedef uint32_t VkBool32; + typedef uint32_t VkFlags; + typedef uint64_t VkDeviceSize; + + + + + + + + + + + typedef VkFlags VkFramebufferCreateFlags; + typedef VkFlags VkQueryPoolCreateFlags; + typedef VkFlags VkRenderPassCreateFlags; + typedef VkFlags VkSamplerCreateFlags; + typedef VkFlags VkPipelineLayoutCreateFlags; + typedef VkFlags VkPipelineCacheCreateFlags; + typedef VkFlags VkPipelineDepthStencilStateCreateFlags; + typedef VkFlags VkPipelineDynamicStateCreateFlags; + typedef VkFlags VkPipelineColorBlendStateCreateFlags; + typedef VkFlags VkPipelineMultisampleStateCreateFlags; + typedef VkFlags VkPipelineRasterizationStateCreateFlags; + typedef VkFlags VkPipelineViewportStateCreateFlags; + typedef VkFlags VkPipelineTessellationStateCreateFlags; + typedef VkFlags VkPipelineInputAssemblyStateCreateFlags; + typedef VkFlags VkPipelineVertexInputStateCreateFlags; + typedef VkFlags VkPipelineShaderStageCreateFlags; + typedef VkFlags VkDescriptorSetLayoutCreateFlags; + typedef VkFlags VkBufferViewCreateFlags; + typedef VkFlags VkInstanceCreateFlags; + typedef VkFlags VkDeviceCreateFlags; + typedef VkFlags VkDeviceQueueCreateFlags; + typedef VkFlags VkQueueFlags; + typedef VkFlags VkMemoryPropertyFlags; + typedef VkFlags VkMemoryHeapFlags; + typedef VkFlags VkAccessFlags; + typedef VkFlags VkBufferUsageFlags; + typedef VkFlags VkBufferCreateFlags; + typedef VkFlags VkShaderStageFlags; + typedef VkFlags VkImageUsageFlags; + typedef VkFlags VkImageCreateFlags; + typedef VkFlags VkImageViewCreateFlags; + typedef VkFlags VkPipelineCreateFlags; + typedef VkFlags VkColorComponentFlags; + typedef VkFlags VkFenceCreateFlags; + typedef VkFlags VkSemaphoreCreateFlags; + typedef VkFlags VkFormatFeatureFlags; + typedef VkFlags VkQueryControlFlags; + typedef VkFlags VkQueryResultFlags; + typedef VkFlags VkShaderModuleCreateFlags; + typedef VkFlags VkEventCreateFlags; + typedef VkFlags VkCommandPoolCreateFlags; + typedef VkFlags VkCommandPoolResetFlags; + typedef VkFlags VkCommandBufferResetFlags; + typedef VkFlags VkCommandBufferUsageFlags; + typedef VkFlags VkQueryPipelineStatisticFlags; + typedef VkFlags VkMemoryMapFlags; + typedef VkFlags VkImageAspectFlags; + typedef VkFlags VkSparseMemoryBindFlags; + typedef VkFlags VkSparseImageFormatFlags; + typedef VkFlags VkSubpassDescriptionFlags; + typedef VkFlags VkPipelineStageFlags; + typedef VkFlags VkSampleCountFlags; + typedef VkFlags VkAttachmentDescriptionFlags; + typedef VkFlags VkStencilFaceFlags; + typedef VkFlags VkCullModeFlags; + typedef VkFlags VkDescriptorPoolCreateFlags; + typedef VkFlags VkDescriptorPoolResetFlags; + typedef VkFlags VkDependencyFlags; + + typedef VkFlags VkIndirectCommandsLayoutUsageFlagsNVX; + typedef VkFlags VkObjectEntryUsageFlagsNVX; + + + typedef VkFlags VkCompositeAlphaFlagsKHR; + typedef VkFlags VkDisplayPlaneAlphaFlagsKHR; + typedef VkFlags VkSurfaceTransformFlagsKHR; + typedef VkFlags VkSwapchainCreateFlagsKHR; + typedef VkFlags VkDisplayModeCreateFlagsKHR; + typedef VkFlags VkDisplaySurfaceCreateFlagsKHR; + typedef VkFlags VkAndroidSurfaceCreateFlagsKHR; + typedef VkFlags VkMirSurfaceCreateFlagsKHR; + typedef VkFlags VkWaylandSurfaceCreateFlagsKHR; + typedef VkFlags VkWin32SurfaceCreateFlagsKHR; + typedef VkFlags VkXlibSurfaceCreateFlagsKHR; + typedef VkFlags VkXcbSurfaceCreateFlagsKHR; + + typedef VkFlags VkDebugReportFlagsEXT; + typedef VkFlags VkExternalMemoryHandleTypeFlagsNV; + typedef VkFlags VkExternalMemoryFeatureFlagsNV; + + + VK_DEFINE_HANDLE(VkInstance) + VK_DEFINE_HANDLE(VkPhysicalDevice) + VK_DEFINE_HANDLE(VkDevice) + VK_DEFINE_HANDLE(VkQueue) + VK_DEFINE_HANDLE(VkCommandBuffer) + VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkDeviceMemory) + VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkCommandPool) + VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkBuffer) + VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkBufferView) + VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkImage) + VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkImageView) + VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkShaderModule) + VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkPipeline) + VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkPipelineLayout) + VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkSampler) + VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkDescriptorSet) + VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkDescriptorSetLayout) + VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkDescriptorPool) + VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkFence) + VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkSemaphore) + VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkEvent) + VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkQueryPool) + VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkFramebuffer) + VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkRenderPass) + VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkPipelineCache) + VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkObjectTableNVX) + VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkIndirectCommandsLayoutNVX) + + + VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkDisplayKHR) + VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkDisplayModeKHR) + VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkSurfaceKHR) + VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkSwapchainKHR) + VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkDebugReportCallbackEXT) + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + typedef void (VKAPI_PTR *PFN_vkInternalAllocationNotification)( + void* pUserData, + size_t size, + VkInternalAllocationType allocationType, + VkSystemAllocationScope allocationScope); + typedef void (VKAPI_PTR *PFN_vkInternalFreeNotification)( + void* pUserData, + size_t size, + VkInternalAllocationType allocationType, + VkSystemAllocationScope allocationScope); + typedef void* (VKAPI_PTR *PFN_vkReallocationFunction)( + void* pUserData, + void* pOriginal, + size_t size, + size_t alignment, + VkSystemAllocationScope allocationScope); + typedef void* (VKAPI_PTR *PFN_vkAllocationFunction)( + void* pUserData, + size_t size, + size_t alignment, + VkSystemAllocationScope allocationScope); + typedef void (VKAPI_PTR *PFN_vkFreeFunction)( + void* pUserData, + void* pMemory); + + + typedef void (VKAPI_PTR *PFN_vkVoidFunction)(void); + + + typedef VkBool32 (VKAPI_PTR *PFN_vkDebugReportCallbackEXT)( + VkDebugReportFlagsEXT flags, + VkDebugReportObjectTypeEXT objectType, + uint64_t object, + size_t location, + int32_t messageCode, + const char* pLayerPrefix, + const char* pMessage, + void* pUserData); + + + + int32_t x + int32_t y + + + int32_t x + int32_t y + int32_t z + + + uint32_t width + uint32_t height + + + uint32_t width + uint32_t height + uint32_t depth + + + float x + float y + float width + float height + float minDepth + float maxDepth + + + VkOffset2D offset + VkExtent2D extent + + + VkOffset3D offset + VkExtent3D extent + + + VkRect2D rect + uint32_t baseArrayLayer + uint32_t layerCount + + + VkComponentSwizzle r + VkComponentSwizzle g + VkComponentSwizzle b + VkComponentSwizzle a + + + uint32_t apiVersion + uint32_t driverVersion + uint32_t vendorID + uint32_t deviceID + VkPhysicalDeviceType deviceType + char deviceName[VK_MAX_PHYSICAL_DEVICE_NAME_SIZE] + uint8_t pipelineCacheUUID[VK_UUID_SIZE] + VkPhysicalDeviceLimits limits + VkPhysicalDeviceSparseProperties sparseProperties + + + char extensionName[VK_MAX_EXTENSION_NAME_SIZE] + uint32_t specVersion + + + char layerName[VK_MAX_EXTENSION_NAME_SIZE] + uint32_t specVersion + uint32_t implementationVersion + char description[VK_MAX_DESCRIPTION_SIZE] + + + VkStructureType sType + const void* pNext + const char* pApplicationName + uint32_t applicationVersion + const char* pEngineName + uint32_t engineVersion + uint32_t apiVersion + + + void* pUserData + PFN_vkAllocationFunction pfnAllocation + PFN_vkReallocationFunction pfnReallocation + PFN_vkFreeFunction pfnFree + PFN_vkInternalAllocationNotification pfnInternalAllocation + PFN_vkInternalFreeNotification pfnInternalFree + + + VkStructureType sType + const void* pNext + VkDeviceQueueCreateFlags flags + uint32_t queueFamilyIndex + uint32_t queueCount + const float* pQueuePriorities + + + VkStructureType sType + const void* pNext + VkDeviceCreateFlags flags + uint32_t queueCreateInfoCount + const VkDeviceQueueCreateInfo* pQueueCreateInfos + uint32_t enabledLayerCount + const char* const* ppEnabledLayerNames + uint32_t enabledExtensionCount + const char* const* ppEnabledExtensionNames + const VkPhysicalDeviceFeatures* pEnabledFeatures + + + VkStructureType sType + const void* pNext + VkInstanceCreateFlags flags + const VkApplicationInfo* pApplicationInfo + uint32_t enabledLayerCount + const char* const* ppEnabledLayerNames + uint32_t enabledExtensionCount + const char* const* ppEnabledExtensionNames + + + VkQueueFlags queueFlags + uint32_t queueCount + uint32_t timestampValidBits + VkExtent3D minImageTransferGranularity + + + uint32_t memoryTypeCount + VkMemoryType memoryTypes[VK_MAX_MEMORY_TYPES] + uint32_t memoryHeapCount + VkMemoryHeap memoryHeaps[VK_MAX_MEMORY_HEAPS] + + + VkStructureType sType + const void* pNext + VkDeviceSize allocationSize + uint32_t memoryTypeIndex + + + VkDeviceSize size + VkDeviceSize alignment + uint32_t memoryTypeBits + + + VkImageAspectFlags aspectMask + VkExtent3D imageGranularity + VkSparseImageFormatFlags flags + + + VkSparseImageFormatProperties formatProperties + uint32_t imageMipTailFirstLod + VkDeviceSize imageMipTailSize + VkDeviceSize imageMipTailOffset + VkDeviceSize imageMipTailStride + + + VkMemoryPropertyFlags propertyFlags + uint32_t heapIndex + + + VkDeviceSize size + VkMemoryHeapFlags flags + + + VkStructureType sType + const void* pNext + VkDeviceMemory memory + VkDeviceSize offset + VkDeviceSize size + + + VkFormatFeatureFlags linearTilingFeatures + VkFormatFeatureFlags optimalTilingFeatures + VkFormatFeatureFlags bufferFeatures + + + VkExtent3D maxExtent + uint32_t maxMipLevels + uint32_t maxArrayLayers + VkSampleCountFlags sampleCounts + VkDeviceSize maxResourceSize + + + VkBuffer buffer + VkDeviceSize offset + VkDeviceSize range + + + VkSampler sampler + VkImageView imageView + VkImageLayout imageLayout + + + VkStructureType sType + const void* pNext + VkDescriptorSet dstSet + uint32_t dstBinding + uint32_t dstArrayElement + uint32_t descriptorCount + VkDescriptorType descriptorType + const VkDescriptorImageInfo* pImageInfo + const VkDescriptorBufferInfo* pBufferInfo + const VkBufferView* pTexelBufferView + + + VkStructureType sType + const void* pNext + VkDescriptorSet srcSet + uint32_t srcBinding + uint32_t srcArrayElement + VkDescriptorSet dstSet + uint32_t dstBinding + uint32_t dstArrayElement + uint32_t descriptorCount + + + VkStructureType sType + const void* pNext + VkBufferCreateFlags flags + VkDeviceSize size + VkBufferUsageFlags usage + VkSharingMode sharingMode + uint32_t queueFamilyIndexCount + const uint32_t* pQueueFamilyIndices + + + VkStructureType sType + const void* pNext + VkBufferViewCreateFlagsflags + VkBuffer buffer + VkFormat format + VkDeviceSize offset + VkDeviceSize range + + + VkImageAspectFlags aspectMask + uint32_t mipLevel + uint32_t arrayLayer + + + VkImageAspectFlags aspectMask + uint32_t mipLevel + uint32_t baseArrayLayer + uint32_t layerCount + + + VkImageAspectFlags aspectMask + uint32_t baseMipLevel + uint32_t levelCount + uint32_t baseArrayLayer + uint32_t layerCount + + + VkStructureType sType + const void* pNext + VkAccessFlags srcAccessMask + VkAccessFlags dstAccessMask + + + VkStructureType sType + const void* pNext + VkAccessFlags srcAccessMask + VkAccessFlags dstAccessMask + uint32_t srcQueueFamilyIndex + uint32_t dstQueueFamilyIndex + VkBuffer buffer + VkDeviceSize offset + VkDeviceSize size + + + VkStructureType sType + const void* pNext + VkAccessFlags srcAccessMask + VkAccessFlags dstAccessMask + VkImageLayout oldLayout + VkImageLayout newLayout + uint32_t srcQueueFamilyIndex + uint32_t dstQueueFamilyIndex + VkImage image + VkImageSubresourceRange subresourceRange + + + VkStructureType sType + const void* pNext + VkImageCreateFlags flags + VkImageType imageType + VkFormat format + VkExtent3D extent + uint32_t mipLevels + uint32_t arrayLayers + VkSampleCountFlagBits samples + VkImageTiling tiling + VkImageUsageFlags usage + VkSharingMode sharingMode + uint32_t queueFamilyIndexCount + const uint32_t* pQueueFamilyIndices + VkImageLayout initialLayout + + + VkDeviceSize offset + VkDeviceSize size + VkDeviceSize rowPitch + VkDeviceSize arrayPitch + VkDeviceSize depthPitch + + + VkStructureType sType + const void* pNext + VkImageViewCreateFlags flags + VkImage image + VkImageViewType viewType + VkFormat format + VkComponentMapping components + VkImageSubresourceRange subresourceRange + + + VkDeviceSize srcOffset + VkDeviceSize dstOffset + VkDeviceSize size + + + VkDeviceSize resourceOffset + VkDeviceSize size + VkDeviceMemory memory + VkDeviceSize memoryOffset + VkSparseMemoryBindFlagsflags + + + VkImageSubresource subresource + VkOffset3D offset + VkExtent3D extent + VkDeviceMemory memory + VkDeviceSize memoryOffset + VkSparseMemoryBindFlagsflags + + + VkBuffer buffer + uint32_t bindCount + const VkSparseMemoryBind* pBinds + + + VkImage image + uint32_t bindCount + const VkSparseMemoryBind* pBinds + + + VkImage image + uint32_t bindCount + const VkSparseImageMemoryBind* pBinds + + + VkStructureType sType + const void* pNext + uint32_t waitSemaphoreCount + const VkSemaphore* pWaitSemaphores + uint32_t bufferBindCount + const VkSparseBufferMemoryBindInfo* pBufferBinds + uint32_t imageOpaqueBindCount + const VkSparseImageOpaqueMemoryBindInfo* pImageOpaqueBinds + uint32_t imageBindCount + const VkSparseImageMemoryBindInfo* pImageBinds + uint32_t signalSemaphoreCount + const VkSemaphore* pSignalSemaphores + + + VkImageSubresourceLayers srcSubresource + VkOffset3D srcOffset + VkImageSubresourceLayers dstSubresource + VkOffset3D dstOffset + VkExtent3D extent + + + VkImageSubresourceLayers srcSubresource + VkOffset3D srcOffsets[2] + VkImageSubresourceLayers dstSubresource + VkOffset3D dstOffsets[2] + + + VkDeviceSize bufferOffset + uint32_t bufferRowLength + uint32_t bufferImageHeight + VkImageSubresourceLayers imageSubresource + VkOffset3D imageOffset + VkExtent3D imageExtent + + + VkImageSubresourceLayers srcSubresource + VkOffset3D srcOffset + VkImageSubresourceLayers dstSubresource + VkOffset3D dstOffset + VkExtent3D extent + + + VkStructureType sType + const void* pNext + VkShaderModuleCreateFlags flags + size_t codeSize + const uint32_t* pCode + + + uint32_t binding + VkDescriptorType descriptorType + uint32_t descriptorCount + VkShaderStageFlags stageFlags + const VkSampler* pImmutableSamplers + + + VkStructureType sType + const void* pNext + VkDescriptorSetLayoutCreateFlags flags + uint32_t bindingCount + const VkDescriptorSetLayoutBinding* pBindings + + + VkDescriptorType type + uint32_t descriptorCount + + + VkStructureType sType + const void* pNext + VkDescriptorPoolCreateFlags flags + uint32_t maxSets + uint32_t poolSizeCount + const VkDescriptorPoolSize* pPoolSizes + + + VkStructureType sType + const void* pNext + VkDescriptorPool descriptorPool + uint32_t descriptorSetCount + const VkDescriptorSetLayout* pSetLayouts + + + uint32_t constantID + uint32_t offset + size_t size + + + uint32_t mapEntryCount + const VkSpecializationMapEntry* pMapEntries + size_t dataSize + const void* pData + + + VkStructureType sType + const void* pNext + VkPipelineShaderStageCreateFlags flags + VkShaderStageFlagBits stage + VkShaderModule module + const char* pName + const VkSpecializationInfo* pSpecializationInfo + + + VkStructureType sType + const void* pNext + VkPipelineCreateFlags flags + VkPipelineShaderStageCreateInfo stage + VkPipelineLayout layout + VkPipeline basePipelineHandle + int32_t basePipelineIndex + + + uint32_t binding + uint32_t stride + VkVertexInputRate inputRate + + + uint32_t location + uint32_t binding + VkFormat format + uint32_t offset + + + VkStructureType sType + const void* pNext + VkPipelineVertexInputStateCreateFlags flags + uint32_t vertexBindingDescriptionCount + const VkVertexInputBindingDescription* pVertexBindingDescriptions + uint32_t vertexAttributeDescriptionCount + const VkVertexInputAttributeDescription* pVertexAttributeDescriptions + + + VkStructureType sType + const void* pNext + VkPipelineInputAssemblyStateCreateFlags flags + VkPrimitiveTopology topology + VkBool32 primitiveRestartEnable + + + VkStructureType sType + const void* pNext + VkPipelineTessellationStateCreateFlags flags + uint32_t patchControlPoints + + + VkStructureType sType + const void* pNext + VkPipelineViewportStateCreateFlags flags + uint32_t viewportCount + const VkViewport* pViewports + uint32_t scissorCount + const VkRect2D* pScissors + + + VkStructureType sType + const void* pNext + VkPipelineRasterizationStateCreateFlags flags + VkBool32 depthClampEnable + VkBool32 rasterizerDiscardEnable + VkPolygonMode polygonMode + VkCullModeFlags cullMode + VkFrontFace frontFace + VkBool32 depthBiasEnable + float depthBiasConstantFactor + float depthBiasClamp + float depthBiasSlopeFactor + float lineWidth + + + VkStructureType sType + const void* pNext + VkPipelineMultisampleStateCreateFlags flags + VkSampleCountFlagBits rasterizationSamples + VkBool32 sampleShadingEnable + float minSampleShading + const VkSampleMask* pSampleMask + VkBool32 alphaToCoverageEnable + VkBool32 alphaToOneEnable + + + VkBool32 blendEnable + VkBlendFactor srcColorBlendFactor + VkBlendFactor dstColorBlendFactor + VkBlendOp colorBlendOp + VkBlendFactor srcAlphaBlendFactor + VkBlendFactor dstAlphaBlendFactor + VkBlendOp alphaBlendOp + VkColorComponentFlags colorWriteMask + + + VkStructureType sType + const void* pNext + VkPipelineColorBlendStateCreateFlags flags + VkBool32 logicOpEnable + VkLogicOp logicOp + uint32_t attachmentCount + const VkPipelineColorBlendAttachmentState* pAttachments + float blendConstants[4] + + + VkStructureType sType + const void* pNext + VkPipelineDynamicStateCreateFlags flags + uint32_t dynamicStateCount + const VkDynamicState* pDynamicStates + + + VkStencilOp failOp + VkStencilOp passOp + VkStencilOp depthFailOp + VkCompareOp compareOp + uint32_t compareMask + uint32_t writeMask + uint32_t reference + + + VkStructureType sType + const void* pNext + VkPipelineDepthStencilStateCreateFlags flags + VkBool32 depthTestEnable + VkBool32 depthWriteEnable + VkCompareOp depthCompareOp + VkBool32 depthBoundsTestEnable + VkBool32 stencilTestEnable + VkStencilOpState front + VkStencilOpState back + float minDepthBounds + float maxDepthBounds + + + VkStructureType sType + const void* pNext + VkPipelineCreateFlags flags + uint32_t stageCount + const VkPipelineShaderStageCreateInfo* pStages + const VkPipelineVertexInputStateCreateInfo* pVertexInputState + const VkPipelineInputAssemblyStateCreateInfo* pInputAssemblyState + const VkPipelineTessellationStateCreateInfo* pTessellationState + const VkPipelineViewportStateCreateInfo* pViewportState + const VkPipelineRasterizationStateCreateInfo* pRasterizationState + const VkPipelineMultisampleStateCreateInfo* pMultisampleState + const VkPipelineDepthStencilStateCreateInfo* pDepthStencilState + const VkPipelineColorBlendStateCreateInfo* pColorBlendState + const VkPipelineDynamicStateCreateInfo* pDynamicState + VkPipelineLayout layout + VkRenderPass renderPass + uint32_t subpass + VkPipeline basePipelineHandle + int32_t basePipelineIndex + + + VkStructureType sType + const void* pNext + VkPipelineCacheCreateFlags flags + size_t initialDataSize + const void* pInitialData + + + VkShaderStageFlags stageFlags + uint32_t offset + uint32_t size + + + VkStructureType sType + const void* pNext + VkPipelineLayoutCreateFlags flags + uint32_t setLayoutCount + const VkDescriptorSetLayout* pSetLayouts + uint32_t pushConstantRangeCount + const VkPushConstantRange* pPushConstantRanges + + + VkStructureType sType + const void* pNext + VkSamplerCreateFlags flags + VkFilter magFilter + VkFilter minFilter + VkSamplerMipmapMode mipmapMode + VkSamplerAddressMode addressModeU + VkSamplerAddressMode addressModeV + VkSamplerAddressMode addressModeW + float mipLodBias + VkBool32 anisotropyEnable + float maxAnisotropy + VkBool32 compareEnable + VkCompareOp compareOp + float minLod + float maxLod + VkBorderColor borderColor + VkBool32 unnormalizedCoordinates + + + VkStructureType sType + const void* pNext + VkCommandPoolCreateFlags flags + uint32_t queueFamilyIndex + + + VkStructureType sType + const void* pNext + VkCommandPool commandPool + VkCommandBufferLevel level + uint32_t commandBufferCount + + + VkStructureType sType + const void* pNext + VkRenderPass renderPass + uint32_t subpass + VkFramebuffer framebuffer + VkBool32 occlusionQueryEnable + VkQueryControlFlags queryFlags + VkQueryPipelineStatisticFlags pipelineStatistics + + + VkStructureType sType + const void* pNext + VkCommandBufferUsageFlags flags + const VkCommandBufferInheritanceInfo* pInheritanceInfo + + + VkStructureType sType + const void* pNext + VkRenderPass renderPass + VkFramebuffer framebuffer + VkRect2D renderArea + uint32_t clearValueCount + const VkClearValue* pClearValues + + + float float32[4] + int32_t int32[4] + uint32_t uint32[4] + + + float depth + uint32_t stencil + + + VkClearColorValue color + VkClearDepthStencilValue depthStencil + + + VkImageAspectFlags aspectMask + uint32_t colorAttachment + VkClearValue clearValue + + + VkAttachmentDescriptionFlags flags + VkFormat format + VkSampleCountFlagBits samples + VkAttachmentLoadOp loadOp + VkAttachmentStoreOp storeOp + VkAttachmentLoadOp stencilLoadOp + VkAttachmentStoreOp stencilStoreOp + VkImageLayout initialLayout + VkImageLayout finalLayout + + + uint32_t attachment + VkImageLayout layout + + + VkSubpassDescriptionFlags flags + VkPipelineBindPoint pipelineBindPoint + uint32_t inputAttachmentCount + const VkAttachmentReference* pInputAttachments + uint32_t colorAttachmentCount + const VkAttachmentReference* pColorAttachments + const VkAttachmentReference* pResolveAttachments + const VkAttachmentReference* pDepthStencilAttachment + uint32_t preserveAttachmentCount + const uint32_t* pPreserveAttachments + + + uint32_t srcSubpass + uint32_t dstSubpass + VkPipelineStageFlags srcStageMask + VkPipelineStageFlags dstStageMask + VkAccessFlags srcAccessMask + VkAccessFlags dstAccessMask + VkDependencyFlags dependencyFlags + + + VkStructureType sType + const void* pNext + VkRenderPassCreateFlags flags + uint32_t attachmentCount + const VkAttachmentDescription* pAttachments + uint32_t subpassCount + const VkSubpassDescription* pSubpasses + uint32_t dependencyCount + const VkSubpassDependency* pDependencies + + + VkStructureType sType + const void* pNext + VkEventCreateFlags flags + + + VkStructureType sType + const void* pNext + VkFenceCreateFlags flags + + + VkBool32 robustBufferAccess + VkBool32 fullDrawIndexUint32 + VkBool32 imageCubeArray + VkBool32 independentBlend + VkBool32 geometryShader + VkBool32 tessellationShader + VkBool32 sampleRateShading + VkBool32 dualSrcBlend + VkBool32 logicOp + VkBool32 multiDrawIndirect + VkBool32 drawIndirectFirstInstance + VkBool32 depthClamp + VkBool32 depthBiasClamp + VkBool32 fillModeNonSolid + VkBool32 depthBounds + VkBool32 wideLines + VkBool32 largePoints + VkBool32 alphaToOne + VkBool32 multiViewport + VkBool32 samplerAnisotropy + VkBool32 textureCompressionETC2 + VkBool32 textureCompressionASTC_LDR + VkBool32 textureCompressionBC + VkBool32 occlusionQueryPrecise + VkBool32 pipelineStatisticsQuery + VkBool32 vertexPipelineStoresAndAtomics + VkBool32 fragmentStoresAndAtomics + VkBool32 shaderTessellationAndGeometryPointSize + VkBool32 shaderImageGatherExtended + VkBool32 shaderStorageImageExtendedFormats + VkBool32 shaderStorageImageMultisample + VkBool32 shaderStorageImageReadWithoutFormat + VkBool32 shaderStorageImageWriteWithoutFormat + VkBool32 shaderUniformBufferArrayDynamicIndexing + VkBool32 shaderSampledImageArrayDynamicIndexing + VkBool32 shaderStorageBufferArrayDynamicIndexing + VkBool32 shaderStorageImageArrayDynamicIndexing + VkBool32 shaderClipDistance + VkBool32 shaderCullDistance + VkBool32 shaderFloat64 + VkBool32 shaderInt64 + VkBool32 shaderInt16 + VkBool32 shaderResourceResidency + VkBool32 shaderResourceMinLod + VkBool32 sparseBinding + VkBool32 sparseResidencyBuffer + VkBool32 sparseResidencyImage2D + VkBool32 sparseResidencyImage3D + VkBool32 sparseResidency2Samples + VkBool32 sparseResidency4Samples + VkBool32 sparseResidency8Samples + VkBool32 sparseResidency16Samples + VkBool32 sparseResidencyAliased + VkBool32 variableMultisampleRate + VkBool32 inheritedQueries + + + VkBool32 residencyStandard2DBlockShape + VkBool32 residencyStandard2DMultisampleBlockShape + VkBool32 residencyStandard3DBlockShape + VkBool32 residencyAlignedMipSize + VkBool32 residencyNonResidentStrict + + + + uint32_t maxImageDimension1D + uint32_t maxImageDimension2D + uint32_t maxImageDimension3D + uint32_t maxImageDimensionCube + uint32_t maxImageArrayLayers + uint32_t maxTexelBufferElements + uint32_t maxUniformBufferRange + uint32_t maxStorageBufferRange + uint32_t maxPushConstantsSize + + uint32_t maxMemoryAllocationCount + uint32_t maxSamplerAllocationCount + VkDeviceSize bufferImageGranularity + VkDeviceSize sparseAddressSpaceSize + + uint32_t maxBoundDescriptorSets + uint32_t maxPerStageDescriptorSamplers + uint32_t maxPerStageDescriptorUniformBuffers + uint32_t maxPerStageDescriptorStorageBuffers + uint32_t maxPerStageDescriptorSampledImages + uint32_t maxPerStageDescriptorStorageImages + uint32_t maxPerStageDescriptorInputAttachments + uint32_t maxPerStageResources + uint32_t maxDescriptorSetSamplers + uint32_t maxDescriptorSetUniformBuffers + uint32_t maxDescriptorSetUniformBuffersDynamic + uint32_t maxDescriptorSetStorageBuffers + uint32_t maxDescriptorSetStorageBuffersDynamic + uint32_t maxDescriptorSetSampledImages + uint32_t maxDescriptorSetStorageImages + uint32_t maxDescriptorSetInputAttachments + + uint32_t maxVertexInputAttributes + uint32_t maxVertexInputBindings + uint32_t maxVertexInputAttributeOffset + uint32_t maxVertexInputBindingStride + uint32_t maxVertexOutputComponents + + uint32_t maxTessellationGenerationLevel + uint32_t maxTessellationPatchSize + uint32_t maxTessellationControlPerVertexInputComponents + uint32_t maxTessellationControlPerVertexOutputComponents + uint32_t maxTessellationControlPerPatchOutputComponents + uint32_t maxTessellationControlTotalOutputComponents + + uint32_t maxTessellationEvaluationInputComponents + uint32_t maxTessellationEvaluationOutputComponents + + uint32_t maxGeometryShaderInvocations + uint32_t maxGeometryInputComponents + uint32_t maxGeometryOutputComponents + uint32_t maxGeometryOutputVertices + uint32_t maxGeometryTotalOutputComponents + + uint32_t maxFragmentInputComponents + uint32_t maxFragmentOutputAttachments + uint32_t maxFragmentDualSrcAttachments + uint32_t maxFragmentCombinedOutputResources + + uint32_t maxComputeSharedMemorySize + uint32_t maxComputeWorkGroupCount[3] + uint32_t maxComputeWorkGroupInvocations + uint32_t maxComputeWorkGroupSize[3] + uint32_t subPixelPrecisionBits + uint32_t subTexelPrecisionBits + uint32_t mipmapPrecisionBits + uint32_t maxDrawIndexedIndexValue + uint32_t maxDrawIndirectCount + float maxSamplerLodBias + float maxSamplerAnisotropy + uint32_t maxViewports + uint32_t maxViewportDimensions[2] + float viewportBoundsRange[2] + uint32_t viewportSubPixelBits + size_t minMemoryMapAlignment + VkDeviceSize minTexelBufferOffsetAlignment + VkDeviceSize minUniformBufferOffsetAlignment + VkDeviceSize minStorageBufferOffsetAlignment + int32_t minTexelOffset + uint32_t maxTexelOffset + int32_t minTexelGatherOffset + uint32_t maxTexelGatherOffset + float minInterpolationOffset + float maxInterpolationOffset + uint32_t subPixelInterpolationOffsetBits + uint32_t maxFramebufferWidth + uint32_t maxFramebufferHeight + uint32_t maxFramebufferLayers + VkSampleCountFlags framebufferColorSampleCounts + VkSampleCountFlags framebufferDepthSampleCounts + VkSampleCountFlags framebufferStencilSampleCounts + VkSampleCountFlags framebufferNoAttachmentsSampleCounts + uint32_t maxColorAttachments + VkSampleCountFlags sampledImageColorSampleCounts + VkSampleCountFlags sampledImageIntegerSampleCounts + VkSampleCountFlags sampledImageDepthSampleCounts + VkSampleCountFlags sampledImageStencilSampleCounts + VkSampleCountFlags storageImageSampleCounts + uint32_t maxSampleMaskWords + VkBool32 timestampComputeAndGraphics + float timestampPeriod + uint32_t maxClipDistances + uint32_t maxCullDistances + uint32_t maxCombinedClipAndCullDistances + uint32_t discreteQueuePriorities + float pointSizeRange[2] + float lineWidthRange[2] + float pointSizeGranularity + float lineWidthGranularity + VkBool32 strictLines + VkBool32 standardSampleLocations + VkDeviceSize optimalBufferCopyOffsetAlignment + VkDeviceSize optimalBufferCopyRowPitchAlignment + VkDeviceSize nonCoherentAtomSize + + + VkStructureType sType + const void* pNext + VkSemaphoreCreateFlags flags + + + VkStructureType sType + const void* pNext + VkQueryPoolCreateFlags flags + VkQueryType queryType + uint32_t queryCount + VkQueryPipelineStatisticFlags pipelineStatistics + + + VkStructureType sType + const void* pNext + VkFramebufferCreateFlags flags + VkRenderPass renderPass + uint32_t attachmentCount + const VkImageView* pAttachments + uint32_t width + uint32_t height + uint32_t layers + + + uint32_t vertexCount + uint32_t instanceCount + uint32_t firstVertex + uint32_t firstInstance + + + uint32_t indexCount + uint32_t instanceCount + uint32_t firstIndex + int32_t vertexOffset + uint32_t firstInstance + + + uint32_t x + uint32_t y + uint32_t z + + + VkStructureType sType + const void* pNext + uint32_t waitSemaphoreCount + const VkSemaphore* pWaitSemaphores + const VkPipelineStageFlags* pWaitDstStageMask + uint32_t commandBufferCount + const VkCommandBuffer* pCommandBuffers + uint32_t signalSemaphoreCount + const VkSemaphore* pSignalSemaphores + + + + VkDisplayKHR display + const char* displayName + VkExtent2D physicalDimensions + VkExtent2D physicalResolution + VkSurfaceTransformFlagsKHR supportedTransforms + VkBool32 planeReorderPossible + VkBool32 persistentContent + + + VkDisplayKHR currentDisplay + uint32_t currentStackIndex + + + VkExtent2D visibleRegion + uint32_t refreshRate + + + VkDisplayModeKHR displayMode + VkDisplayModeParametersKHR parameters + + + VkStructureType sType + const void* pNext + VkDisplayModeCreateFlagsKHR flags + VkDisplayModeParametersKHR parameters + + + VkDisplayPlaneAlphaFlagsKHR supportedAlpha + VkOffset2D minSrcPosition + VkOffset2D maxSrcPosition + VkExtent2D minSrcExtent + VkExtent2D maxSrcExtent + VkOffset2D minDstPosition + VkOffset2D maxDstPosition + VkExtent2D minDstExtent + VkExtent2D maxDstExtent + + + VkStructureType sType + const void* pNext + VkDisplaySurfaceCreateFlagsKHR flags + VkDisplayModeKHR displayMode + uint32_t planeIndex + uint32_t planeStackIndex + VkSurfaceTransformFlagBitsKHR transform + float globalAlpha + VkDisplayPlaneAlphaFlagBitsKHR alphaMode + VkExtent2D imageExtent + + + VkStructureType sType + const void* pNext + VkRect2D srcRect + VkRect2D dstRect + VkBool32 persistent + + + uint32_t minImageCount + uint32_t maxImageCount + VkExtent2D currentExtent + VkExtent2D minImageExtent + VkExtent2D maxImageExtent + uint32_t maxImageArrayLayers + VkSurfaceTransformFlagsKHR supportedTransforms + VkSurfaceTransformFlagBitsKHR currentTransform + VkCompositeAlphaFlagsKHR supportedCompositeAlpha + VkImageUsageFlags supportedUsageFlags + + + VkStructureType sType + const void* pNext + VkAndroidSurfaceCreateFlagsKHR flags + ANativeWindow* window + + + VkStructureType sType + const void* pNext + VkMirSurfaceCreateFlagsKHR flags + MirConnection* connection + MirSurface* mirSurface + + + VkStructureType sType + const void* pNext + VkWaylandSurfaceCreateFlagsKHR flags + struct wl_display* display + struct wl_surface* surface + + + VkStructureType sType + const void* pNext + VkWin32SurfaceCreateFlagsKHR flags + HINSTANCE hinstance + HWND hwnd + + + VkStructureType sType + const void* pNext + VkXlibSurfaceCreateFlagsKHR flags + Display* dpy + Window window + + + VkStructureType sType + const void* pNext + VkXcbSurfaceCreateFlagsKHR flags + xcb_connection_t* connection + xcb_window_t window + + + VkFormat format + VkColorSpaceKHR colorSpace + + + VkStructureType sType + const void* pNext + VkSwapchainCreateFlagsKHR flags + VkSurfaceKHR surface + uint32_t minImageCount + VkFormat imageFormat + VkColorSpaceKHR imageColorSpace + VkExtent2D imageExtent + uint32_t imageArrayLayers + VkImageUsageFlags imageUsage + VkSharingMode imageSharingMode + uint32_t queueFamilyIndexCount + const uint32_t* pQueueFamilyIndices + VkSurfaceTransformFlagBitsKHR preTransform + VkCompositeAlphaFlagBitsKHR compositeAlpha + VkPresentModeKHR presentMode + VkBool32 clipped + VkSwapchainKHR oldSwapchain + + + VkStructureType sType + const void* pNext + uint32_t waitSemaphoreCount + const VkSemaphore* pWaitSemaphores + uint32_t swapchainCount + const VkSwapchainKHR* pSwapchains + const uint32_t* pImageIndices + VkResult* pResults + + + VkStructureType sType + const void* pNext + VkDebugReportFlagsEXT flags + PFN_vkDebugReportCallbackEXT pfnCallback + void* pUserData + + + VkStructureType sType + const void* pNext + uint32_t disabledValidationCheckCount + VkValidationCheckEXT* pDisabledValidationChecks + + + VkStructureType sType + const void* pNext + VkRasterizationOrderAMD rasterizationOrder + + + VkStructureType sType + const void* pNext + VkDebugReportObjectTypeEXT objectType + uint64_t object + const char* pObjectName + + + VkStructureType sType + const void* pNext + VkDebugReportObjectTypeEXT objectType + uint64_t object + uint64_t tagName + size_t tagSize + const void* pTag + + + VkStructureType sType + const void* pNext + const char* pMarkerName + float color[4] + + + VkStructureType sType + const void* pNext + VkBool32 dedicatedAllocation + + + VkStructureType sType + const void* pNext + VkBool32 dedicatedAllocation + + + VkStructureType sType + const void* pNext + VkImage image + VkBuffer buffer + + + VkImageFormatProperties imageFormatProperties + VkExternalMemoryFeatureFlagsNV externalMemoryFeatures + VkExternalMemoryHandleTypeFlagsNV exportFromImportedHandleTypes + VkExternalMemoryHandleTypeFlagsNV compatibleHandleTypes + + + VkStructureType sType + const void* pNext + VkExternalMemoryHandleTypeFlagsNV handleTypes + + + VkStructureType sType + const void* pNext + VkExternalMemoryHandleTypeFlagsNV handleTypes + + + VkStructureType sType + const void* pNext + VkExternalMemoryHandleTypeFlagsNV handleType + HANDLE handle + + + VkStructureType sType + const void* pNext + const SECURITY_ATTRIBUTES* pAttributes + DWORD dwAccess + + + VkStructureType sType + const void* pNext + uint32_t acquireCount + const VkDeviceMemory* pAcquireSyncs + const uint64_t* pAcquireKeys + const uint32_t* pAcquireTimeoutMilliseconds + uint32_t releaseCount + const VkDeviceMemory* pReleaseSyncs + const uint64_t* pReleaseKeys + + + + VkStructureType sType + const void* pNext + VkBool32 computeBindingPointSupport + + + VkStructureType sType + const void* pNext + uint32_t maxIndirectCommandsLayoutTokenCount + uint32_t maxObjectEntryCounts + uint32_t minSequenceCountBufferOffsetAlignment + uint32_t minSequenceIndexBufferOffsetAlignment + uint32_t minCommandsTokenBufferOffsetAlignment + + + VkIndirectCommandsTokenTypeNVX tokenType + VkBuffer buffer + VkDeviceSize offset + + + VkIndirectCommandsTokenTypeNVX tokenType + uint32_t bindingUnit + uint32_t dynamicCount + uint32_t divisor + + + VkStructureType sType + const void* pNext + VkPipelineBindPoint pipelineBindPoint + VkIndirectCommandsLayoutUsageFlagsNVX flags + uint32_t tokenCount + const VkIndirectCommandsLayoutTokenNVX* pTokens + + + VkStructureType sType + const void* pNext + VkObjectTableNVX objectTable + VkIndirectCommandsLayoutNVX indirectCommandsLayout + uint32_t indirectCommandsTokenCount + const VkIndirectCommandsTokenNVX* pIndirectCommandsTokens + uint32_t maxSequencesCount + VkCommandBuffer targetCommandBuffer + VkBuffer sequencesCountBuffer + VkDeviceSize sequencesCountOffset + VkBuffer sequencesIndexBuffer + VkDeviceSize sequencesIndexOffset + + + VkStructureType sType + const void* pNext + VkObjectTableNVX objectTable + VkIndirectCommandsLayoutNVX indirectCommandsLayout + uint32_t maxSequencesCount + + + VkStructureType sType + const void* pNext + uint32_t objectCount + const VkObjectEntryTypeNVX* pObjectEntryTypes + const uint32_t* pObjectEntryCounts + const VkObjectEntryUsageFlagsNVX* pObjectEntryUsageFlags + + uint32_t maxUniformBuffersPerDescriptor + uint32_t maxStorageBuffersPerDescriptor + uint32_t maxStorageImagesPerDescriptor + uint32_t maxSampledImagesPerDescriptor + uint32_t maxPipelineLayouts + + + VkObjectEntryTypeNVX type + VkObjectEntryUsageFlagsNVX flags + + + VkObjectEntryTypeNVX type + VkObjectEntryUsageFlagsNVX flags + VkPipeline pipeline + + + VkObjectEntryTypeNVX type + VkObjectEntryUsageFlagsNVX flags + VkPipelineLayout pipelineLayout + VkDescriptorSet descriptorSet + + + VkObjectEntryTypeNVX type + VkObjectEntryUsageFlagsNVX flags + VkBuffer buffer + + + VkObjectEntryTypeNVX type + VkObjectEntryUsageFlagsNVX flags + VkBuffer buffer + + + VkObjectEntryTypeNVX type + VkObjectEntryUsageFlagsNVX flags + VkPipelineLayout pipelineLayout + VkShaderStageFlags stageFlags + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + VkResult vkCreateInstance + const VkInstanceCreateInfo* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkInstance* pInstance + + + void vkDestroyInstance + VkInstance instance + const VkAllocationCallbacks* pAllocator + + + VkResult vkEnumeratePhysicalDevices + VkInstance instance + uint32_t* pPhysicalDeviceCount + VkPhysicalDevice* pPhysicalDevices + + + PFN_vkVoidFunction vkGetDeviceProcAddr + VkDevice device + const char* pName + + + PFN_vkVoidFunction vkGetInstanceProcAddr + VkInstance instance + const char* pName + + + void vkGetPhysicalDeviceProperties + VkPhysicalDevice physicalDevice + VkPhysicalDeviceProperties* pProperties + + + void vkGetPhysicalDeviceQueueFamilyProperties + VkPhysicalDevice physicalDevice + uint32_t* pQueueFamilyPropertyCount + VkQueueFamilyProperties* pQueueFamilyProperties + + + void vkGetPhysicalDeviceMemoryProperties + VkPhysicalDevice physicalDevice + VkPhysicalDeviceMemoryProperties* pMemoryProperties + + + void vkGetPhysicalDeviceFeatures + VkPhysicalDevice physicalDevice + VkPhysicalDeviceFeatures* pFeatures + + + void vkGetPhysicalDeviceFormatProperties + VkPhysicalDevice physicalDevice + VkFormat format + VkFormatProperties* pFormatProperties + + + VkResult vkGetPhysicalDeviceImageFormatProperties + VkPhysicalDevice physicalDevice + VkFormat format + VkImageType type + VkImageTiling tiling + VkImageUsageFlags usage + VkImageCreateFlags flags + VkImageFormatProperties* pImageFormatProperties + + + VkResult vkCreateDevice + VkPhysicalDevice physicalDevice + const VkDeviceCreateInfo* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkDevice* pDevice + + + void vkDestroyDevice + VkDevice device + const VkAllocationCallbacks* pAllocator + + + VkResult vkEnumerateInstanceLayerProperties + uint32_t* pPropertyCount + VkLayerProperties* pProperties + + + VkResult vkEnumerateInstanceExtensionProperties + const char* pLayerName + uint32_t* pPropertyCount + VkExtensionProperties* pProperties + + + VkResult vkEnumerateDeviceLayerProperties + VkPhysicalDevice physicalDevice + uint32_t* pPropertyCount + VkLayerProperties* pProperties + + + VkResult vkEnumerateDeviceExtensionProperties + VkPhysicalDevice physicalDevice + const char* pLayerName + uint32_t* pPropertyCount + VkExtensionProperties* pProperties + + + void vkGetDeviceQueue + VkDevice device + uint32_t queueFamilyIndex + uint32_t queueIndex + VkQueue* pQueue + + + VkResult vkQueueSubmit + VkQueue queue + uint32_t submitCount + const VkSubmitInfo* pSubmits + VkFence fence + + + VkResult vkQueueWaitIdle + VkQueue queue + + + VkResult vkDeviceWaitIdle + VkDevice device + + all sname:VkQueue objects created from pname:device + + + + VkResult vkAllocateMemory + VkDevice device + const VkMemoryAllocateInfo* pAllocateInfo + const VkAllocationCallbacks* pAllocator + VkDeviceMemory* pMemory + + + void vkFreeMemory + VkDevice device + VkDeviceMemory memory + const VkAllocationCallbacks* pAllocator + + + VkResult vkMapMemory + VkDevice device + VkDeviceMemory memory + VkDeviceSize offset + VkDeviceSize size + VkMemoryMapFlags flags + void** ppData + + + void vkUnmapMemory + VkDevice device + VkDeviceMemory memory + + + VkResult vkFlushMappedMemoryRanges + VkDevice device + uint32_t memoryRangeCount + const VkMappedMemoryRange* pMemoryRanges + + + VkResult vkInvalidateMappedMemoryRanges + VkDevice device + uint32_t memoryRangeCount + const VkMappedMemoryRange* pMemoryRanges + + + void vkGetDeviceMemoryCommitment + VkDevice device + VkDeviceMemory memory + VkDeviceSize* pCommittedMemoryInBytes + + + void vkGetBufferMemoryRequirements + VkDevice device + VkBuffer buffer + VkMemoryRequirements* pMemoryRequirements + + + VkResult vkBindBufferMemory + VkDevice device + VkBuffer buffer + VkDeviceMemory memory + VkDeviceSize memoryOffset + + + void vkGetImageMemoryRequirements + VkDevice device + VkImage image + VkMemoryRequirements* pMemoryRequirements + + + VkResult vkBindImageMemory + VkDevice device + VkImage image + VkDeviceMemory memory + VkDeviceSize memoryOffset + + + void vkGetImageSparseMemoryRequirements + VkDevice device + VkImage image + uint32_t* pSparseMemoryRequirementCount + VkSparseImageMemoryRequirements* pSparseMemoryRequirements + + + void vkGetPhysicalDeviceSparseImageFormatProperties + VkPhysicalDevice physicalDevice + VkFormat format + VkImageType type + VkSampleCountFlagBits samples + VkImageUsageFlags usage + VkImageTiling tiling + uint32_t* pPropertyCount + VkSparseImageFormatProperties* pProperties + + + VkResult vkQueueBindSparse + VkQueue queue + uint32_t bindInfoCount + const VkBindSparseInfo* pBindInfo + VkFence fence + + + VkResult vkCreateFence + VkDevice device + const VkFenceCreateInfo* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkFence* pFence + + + void vkDestroyFence + VkDevice device + VkFence fence + const VkAllocationCallbacks* pAllocator + + + VkResult vkResetFences + VkDevice device + uint32_t fenceCount + const VkFence* pFences + + + VkResult vkGetFenceStatus + VkDevice device + VkFence fence + + + VkResult vkWaitForFences + VkDevice device + uint32_t fenceCount + const VkFence* pFences + VkBool32 waitAll + uint64_t timeout + + + VkResult vkCreateSemaphore + VkDevice device + const VkSemaphoreCreateInfo* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkSemaphore* pSemaphore + + + void vkDestroySemaphore + VkDevice device + VkSemaphore semaphore + const VkAllocationCallbacks* pAllocator + + + VkResult vkCreateEvent + VkDevice device + const VkEventCreateInfo* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkEvent* pEvent + + + void vkDestroyEvent + VkDevice device + VkEvent event + const VkAllocationCallbacks* pAllocator + + + VkResult vkGetEventStatus + VkDevice device + VkEvent event + + + VkResult vkSetEvent + VkDevice device + VkEvent event + + + VkResult vkResetEvent + VkDevice device + VkEvent event + + + VkResult vkCreateQueryPool + VkDevice device + const VkQueryPoolCreateInfo* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkQueryPool* pQueryPool + + + void vkDestroyQueryPool + VkDevice device + VkQueryPool queryPool + const VkAllocationCallbacks* pAllocator + + + VkResult vkGetQueryPoolResults + VkDevice device + VkQueryPool queryPool + uint32_t firstQuery + uint32_t queryCount + size_t dataSize + void* pData + VkDeviceSize stride + VkQueryResultFlags flags + + + VkResult vkCreateBuffer + VkDevice device + const VkBufferCreateInfo* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkBuffer* pBuffer + + + void vkDestroyBuffer + VkDevice device + VkBuffer buffer + const VkAllocationCallbacks* pAllocator + + + VkResult vkCreateBufferView + VkDevice device + const VkBufferViewCreateInfo* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkBufferView* pView + + + void vkDestroyBufferView + VkDevice device + VkBufferView bufferView + const VkAllocationCallbacks* pAllocator + + + VkResult vkCreateImage + VkDevice device + const VkImageCreateInfo* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkImage* pImage + + + void vkDestroyImage + VkDevice device + VkImage image + const VkAllocationCallbacks* pAllocator + + + void vkGetImageSubresourceLayout + VkDevice device + VkImage image + const VkImageSubresource* pSubresource + VkSubresourceLayout* pLayout + + + VkResult vkCreateImageView + VkDevice device + const VkImageViewCreateInfo* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkImageView* pView + + + void vkDestroyImageView + VkDevice device + VkImageView imageView + const VkAllocationCallbacks* pAllocator + + + VkResult vkCreateShaderModule + VkDevice device + const VkShaderModuleCreateInfo* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkShaderModule* pShaderModule + + + void vkDestroyShaderModule + VkDevice device + VkShaderModule shaderModule + const VkAllocationCallbacks* pAllocator + + + VkResult vkCreatePipelineCache + VkDevice device + const VkPipelineCacheCreateInfo* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkPipelineCache* pPipelineCache + + + void vkDestroyPipelineCache + VkDevice device + VkPipelineCache pipelineCache + const VkAllocationCallbacks* pAllocator + + + VkResult vkGetPipelineCacheData + VkDevice device + VkPipelineCache pipelineCache + size_t* pDataSize + void* pData + + + VkResult vkMergePipelineCaches + VkDevice device + VkPipelineCache dstCache + uint32_t srcCacheCount + const VkPipelineCache* pSrcCaches + + + VkResult vkCreateGraphicsPipelines + VkDevice device + VkPipelineCache pipelineCache + uint32_t createInfoCount + const VkGraphicsPipelineCreateInfo* pCreateInfos + const VkAllocationCallbacks* pAllocator + VkPipeline* pPipelines + + + VkResult vkCreateComputePipelines + VkDevice device + VkPipelineCache pipelineCache + uint32_t createInfoCount + const VkComputePipelineCreateInfo* pCreateInfos + const VkAllocationCallbacks* pAllocator + VkPipeline* pPipelines + + + void vkDestroyPipeline + VkDevice device + VkPipeline pipeline + const VkAllocationCallbacks* pAllocator + + + VkResult vkCreatePipelineLayout + VkDevice device + const VkPipelineLayoutCreateInfo* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkPipelineLayout* pPipelineLayout + + + void vkDestroyPipelineLayout + VkDevice device + VkPipelineLayout pipelineLayout + const VkAllocationCallbacks* pAllocator + + + VkResult vkCreateSampler + VkDevice device + const VkSamplerCreateInfo* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkSampler* pSampler + + + void vkDestroySampler + VkDevice device + VkSampler sampler + const VkAllocationCallbacks* pAllocator + + + VkResult vkCreateDescriptorSetLayout + VkDevice device + const VkDescriptorSetLayoutCreateInfo* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkDescriptorSetLayout* pSetLayout + + + void vkDestroyDescriptorSetLayout + VkDevice device + VkDescriptorSetLayout descriptorSetLayout + const VkAllocationCallbacks* pAllocator + + + VkResult vkCreateDescriptorPool + VkDevice device + const VkDescriptorPoolCreateInfo* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkDescriptorPool* pDescriptorPool + + + void vkDestroyDescriptorPool + VkDevice device + VkDescriptorPool descriptorPool + const VkAllocationCallbacks* pAllocator + + + VkResult vkResetDescriptorPool + VkDevice device + VkDescriptorPool descriptorPool + VkDescriptorPoolResetFlags flags + + any sname:VkDescriptorSet objects allocated from pname:descriptorPool + + + + VkResult vkAllocateDescriptorSets + VkDevice device + const VkDescriptorSetAllocateInfo* pAllocateInfo + VkDescriptorSet* pDescriptorSets + + + VkResult vkFreeDescriptorSets + VkDevice device + VkDescriptorPool descriptorPool + uint32_t descriptorSetCount + const VkDescriptorSet* pDescriptorSets + + + void vkUpdateDescriptorSets + VkDevice device + uint32_t descriptorWriteCount + const VkWriteDescriptorSet* pDescriptorWrites + uint32_t descriptorCopyCount + const VkCopyDescriptorSet* pDescriptorCopies + + + VkResult vkCreateFramebuffer + VkDevice device + const VkFramebufferCreateInfo* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkFramebuffer* pFramebuffer + + + void vkDestroyFramebuffer + VkDevice device + VkFramebuffer framebuffer + const VkAllocationCallbacks* pAllocator + + + VkResult vkCreateRenderPass + VkDevice device + const VkRenderPassCreateInfo* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkRenderPass* pRenderPass + + + void vkDestroyRenderPass + VkDevice device + VkRenderPass renderPass + const VkAllocationCallbacks* pAllocator + + + void vkGetRenderAreaGranularity + VkDevice device + VkRenderPass renderPass + VkExtent2D* pGranularity + + + VkResult vkCreateCommandPool + VkDevice device + const VkCommandPoolCreateInfo* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkCommandPool* pCommandPool + + + void vkDestroyCommandPool + VkDevice device + VkCommandPool commandPool + const VkAllocationCallbacks* pAllocator + + + VkResult vkResetCommandPool + VkDevice device + VkCommandPool commandPool + VkCommandPoolResetFlags flags + + + VkResult vkAllocateCommandBuffers + VkDevice device + const VkCommandBufferAllocateInfo* pAllocateInfo + VkCommandBuffer* pCommandBuffers + + + void vkFreeCommandBuffers + VkDevice device + VkCommandPool commandPool + uint32_t commandBufferCount + const VkCommandBuffer* pCommandBuffers + + + VkResult vkBeginCommandBuffer + VkCommandBuffer commandBuffer + const VkCommandBufferBeginInfo* pBeginInfo + + the sname:VkCommandPool that pname:commandBuffer was allocated from + + + + VkResult vkEndCommandBuffer + VkCommandBuffer commandBuffer + + the sname:VkCommandPool that pname:commandBuffer was allocated from + + + + VkResult vkResetCommandBuffer + VkCommandBuffer commandBuffer + VkCommandBufferResetFlags flags + + + void vkCmdBindPipeline + VkCommandBuffer commandBuffer + VkPipelineBindPoint pipelineBindPoint + VkPipeline pipeline + + + void vkCmdSetViewport + VkCommandBuffer commandBuffer + uint32_t firstViewport + uint32_t viewportCount + const VkViewport* pViewports + + + void vkCmdSetScissor + VkCommandBuffer commandBuffer + uint32_t firstScissor + uint32_t scissorCount + const VkRect2D* pScissors + + + void vkCmdSetLineWidth + VkCommandBuffer commandBuffer + float lineWidth + + + void vkCmdSetDepthBias + VkCommandBuffer commandBuffer + float depthBiasConstantFactor + float depthBiasClamp + float depthBiasSlopeFactor + + + void vkCmdSetBlendConstants + VkCommandBuffer commandBuffer + const float blendConstants[4] + + + void vkCmdSetDepthBounds + VkCommandBuffer commandBuffer + float minDepthBounds + float maxDepthBounds + + + void vkCmdSetStencilCompareMask + VkCommandBuffer commandBuffer + VkStencilFaceFlags faceMask + uint32_t compareMask + + + void vkCmdSetStencilWriteMask + VkCommandBuffer commandBuffer + VkStencilFaceFlags faceMask + uint32_t writeMask + + + void vkCmdSetStencilReference + VkCommandBuffer commandBuffer + VkStencilFaceFlags faceMask + uint32_t reference + + + void vkCmdBindDescriptorSets + VkCommandBuffer commandBuffer + VkPipelineBindPoint pipelineBindPoint + VkPipelineLayout layout + uint32_t firstSet + uint32_t descriptorSetCount + const VkDescriptorSet* pDescriptorSets + uint32_t dynamicOffsetCount + const uint32_t* pDynamicOffsets + + + void vkCmdBindIndexBuffer + VkCommandBuffer commandBuffer + VkBuffer buffer + VkDeviceSize offset + VkIndexType indexType + + + void vkCmdBindVertexBuffers + VkCommandBuffer commandBuffer + uint32_t firstBinding + uint32_t bindingCount + const VkBuffer* pBuffers + const VkDeviceSize* pOffsets + + + void vkCmdDraw + VkCommandBuffer commandBuffer + uint32_t vertexCount + uint32_t instanceCount + uint32_t firstVertex + uint32_t firstInstance + + + void vkCmdDrawIndexed + VkCommandBuffer commandBuffer + uint32_t indexCount + uint32_t instanceCount + uint32_t firstIndex + int32_t vertexOffset + uint32_t firstInstance + + + void vkCmdDrawIndirect + VkCommandBuffer commandBuffer + VkBuffer buffer + VkDeviceSize offset + uint32_t drawCount + uint32_t stride + + + void vkCmdDrawIndexedIndirect + VkCommandBuffer commandBuffer + VkBuffer buffer + VkDeviceSize offset + uint32_t drawCount + uint32_t stride + + + void vkCmdDispatch + VkCommandBuffer commandBuffer + uint32_t x + uint32_t y + uint32_t z + + + void vkCmdDispatchIndirect + VkCommandBuffer commandBuffer + VkBuffer buffer + VkDeviceSize offset + + + void vkCmdCopyBuffer + VkCommandBuffer commandBuffer + VkBuffer srcBuffer + VkBuffer dstBuffer + uint32_t regionCount + const VkBufferCopy* pRegions + + + void vkCmdCopyImage + VkCommandBuffer commandBuffer + VkImage srcImage + VkImageLayout srcImageLayout + VkImage dstImage + VkImageLayout dstImageLayout + uint32_t regionCount + const VkImageCopy* pRegions + + + void vkCmdBlitImage + VkCommandBuffer commandBuffer + VkImage srcImage + VkImageLayout srcImageLayout + VkImage dstImage + VkImageLayout dstImageLayout + uint32_t regionCount + const VkImageBlit* pRegions + VkFilter filter + + + void vkCmdCopyBufferToImage + VkCommandBuffer commandBuffer + VkBuffer srcBuffer + VkImage dstImage + VkImageLayout dstImageLayout + uint32_t regionCount + const VkBufferImageCopy* pRegions + + + void vkCmdCopyImageToBuffer + VkCommandBuffer commandBuffer + VkImage srcImage + VkImageLayout srcImageLayout + VkBuffer dstBuffer + uint32_t regionCount + const VkBufferImageCopy* pRegions + + + void vkCmdUpdateBuffer + VkCommandBuffer commandBuffer + VkBuffer dstBuffer + VkDeviceSize dstOffset + VkDeviceSize dataSize + const void* pData + + + void vkCmdFillBuffer + VkCommandBuffer commandBuffer + VkBuffer dstBuffer + VkDeviceSize dstOffset + VkDeviceSize size + uint32_t data + + + void vkCmdClearColorImage + VkCommandBuffer commandBuffer + VkImage image + VkImageLayout imageLayout + const VkClearColorValue* pColor + uint32_t rangeCount + const VkImageSubresourceRange* pRanges + + + void vkCmdClearDepthStencilImage + VkCommandBuffer commandBuffer + VkImage image + VkImageLayout imageLayout + const VkClearDepthStencilValue* pDepthStencil + uint32_t rangeCount + const VkImageSubresourceRange* pRanges + + + void vkCmdClearAttachments + VkCommandBuffer commandBuffer + uint32_t attachmentCount + const VkClearAttachment* pAttachments + uint32_t rectCount + const VkClearRect* pRects + + + void vkCmdResolveImage + VkCommandBuffer commandBuffer + VkImage srcImage + VkImageLayout srcImageLayout + VkImage dstImage + VkImageLayout dstImageLayout + uint32_t regionCount + const VkImageResolve* pRegions + + + void vkCmdSetEvent + VkCommandBuffer commandBuffer + VkEvent event + VkPipelineStageFlags stageMask + + + void vkCmdResetEvent + VkCommandBuffer commandBuffer + VkEvent event + VkPipelineStageFlags stageMask + + + void vkCmdWaitEvents + VkCommandBuffer commandBuffer + uint32_t eventCount + const VkEvent* pEvents + VkPipelineStageFlags srcStageMask + VkPipelineStageFlags dstStageMask + uint32_t memoryBarrierCount + const VkMemoryBarrier* pMemoryBarriers + uint32_t bufferMemoryBarrierCount + const VkBufferMemoryBarrier* pBufferMemoryBarriers + uint32_t imageMemoryBarrierCount + const VkImageMemoryBarrier* pImageMemoryBarriers + + + void vkCmdPipelineBarrier + VkCommandBuffer commandBuffer + VkPipelineStageFlags srcStageMask + VkPipelineStageFlags dstStageMask + VkDependencyFlags dependencyFlags + uint32_t memoryBarrierCount + const VkMemoryBarrier* pMemoryBarriers + uint32_t bufferMemoryBarrierCount + const VkBufferMemoryBarrier* pBufferMemoryBarriers + uint32_t imageMemoryBarrierCount + const VkImageMemoryBarrier* pImageMemoryBarriers + + + void vkCmdBeginQuery + VkCommandBuffer commandBuffer + VkQueryPool queryPool + uint32_t query + VkQueryControlFlags flags + + + void vkCmdEndQuery + VkCommandBuffer commandBuffer + VkQueryPool queryPool + uint32_t query + + + void vkCmdResetQueryPool + VkCommandBuffer commandBuffer + VkQueryPool queryPool + uint32_t firstQuery + uint32_t queryCount + + + void vkCmdWriteTimestamp + VkCommandBuffer commandBuffer + VkPipelineStageFlagBits pipelineStage + VkQueryPool queryPool + uint32_t query + + + void vkCmdCopyQueryPoolResults + VkCommandBuffer commandBuffer + VkQueryPool queryPool + uint32_t firstQuery + uint32_t queryCount + VkBuffer dstBuffer + VkDeviceSize dstOffset + VkDeviceSize stride + VkQueryResultFlags flags + + + void vkCmdPushConstants + VkCommandBuffer commandBuffer + VkPipelineLayout layout + VkShaderStageFlags stageFlags + uint32_t offset + uint32_t size + const void* pValues + + + void vkCmdBeginRenderPass + VkCommandBuffer commandBuffer + const VkRenderPassBeginInfo* pRenderPassBegin + VkSubpassContents contents + + + void vkCmdNextSubpass + VkCommandBuffer commandBuffer + VkSubpassContents contents + + + void vkCmdEndRenderPass + VkCommandBuffer commandBuffer + + + void vkCmdExecuteCommands + VkCommandBuffer commandBuffer + uint32_t commandBufferCount + const VkCommandBuffer* pCommandBuffers + + + VkResult vkCreateAndroidSurfaceKHR + VkInstance instance + const VkAndroidSurfaceCreateInfoKHR* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkSurfaceKHR* pSurface + + + VkResult vkGetPhysicalDeviceDisplayPropertiesKHR + VkPhysicalDevice physicalDevice + uint32_t* pPropertyCount + VkDisplayPropertiesKHR* pProperties + + + VkResult vkGetPhysicalDeviceDisplayPlanePropertiesKHR + VkPhysicalDevice physicalDevice + uint32_t* pPropertyCount + VkDisplayPlanePropertiesKHR* pProperties + + + VkResult vkGetDisplayPlaneSupportedDisplaysKHR + VkPhysicalDevice physicalDevice + uint32_t planeIndex + uint32_t* pDisplayCount + VkDisplayKHR* pDisplays + + + VkResult vkGetDisplayModePropertiesKHR + VkPhysicalDevice physicalDevice + VkDisplayKHR display + uint32_t* pPropertyCount + VkDisplayModePropertiesKHR* pProperties + + + VkResult vkCreateDisplayModeKHR + VkPhysicalDevice physicalDevice + VkDisplayKHR display + const VkDisplayModeCreateInfoKHR* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkDisplayModeKHR* pMode + + + VkResult vkGetDisplayPlaneCapabilitiesKHR + VkPhysicalDevice physicalDevice + VkDisplayModeKHR mode + uint32_t planeIndex + VkDisplayPlaneCapabilitiesKHR* pCapabilities + + + VkResult vkCreateDisplayPlaneSurfaceKHR + VkInstance instance + const VkDisplaySurfaceCreateInfoKHR* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkSurfaceKHR* pSurface + + + VkResult vkCreateSharedSwapchainsKHR + VkDevice device + uint32_t swapchainCount + const VkSwapchainCreateInfoKHR* pCreateInfos + const VkAllocationCallbacks* pAllocator + VkSwapchainKHR* pSwapchains + + + VkResult vkCreateMirSurfaceKHR + VkInstance instance + const VkMirSurfaceCreateInfoKHR* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkSurfaceKHR* pSurface + + + VkBool32 vkGetPhysicalDeviceMirPresentationSupportKHR + VkPhysicalDevice physicalDevice + uint32_t queueFamilyIndex + MirConnection* connection + + + void vkDestroySurfaceKHR + VkInstance instance + VkSurfaceKHR surface + const VkAllocationCallbacks* pAllocator + + + VkResult vkGetPhysicalDeviceSurfaceSupportKHR + VkPhysicalDevice physicalDevice + uint32_t queueFamilyIndex + VkSurfaceKHR surface + VkBool32* pSupported + + + VkResult vkGetPhysicalDeviceSurfaceCapabilitiesKHR + VkPhysicalDevice physicalDevice + VkSurfaceKHR surface + VkSurfaceCapabilitiesKHR* pSurfaceCapabilities + + + VkResult vkGetPhysicalDeviceSurfaceFormatsKHR + VkPhysicalDevice physicalDevice + VkSurfaceKHR surface + uint32_t* pSurfaceFormatCount + VkSurfaceFormatKHR* pSurfaceFormats + + + VkResult vkGetPhysicalDeviceSurfacePresentModesKHR + VkPhysicalDevice physicalDevice + VkSurfaceKHR surface + uint32_t* pPresentModeCount + VkPresentModeKHR* pPresentModes + + + VkResult vkCreateSwapchainKHR + VkDevice device + const VkSwapchainCreateInfoKHR* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkSwapchainKHR* pSwapchain + + + void vkDestroySwapchainKHR + VkDevice device + VkSwapchainKHR swapchain + const VkAllocationCallbacks* pAllocator + + + VkResult vkGetSwapchainImagesKHR + VkDevice device + VkSwapchainKHR swapchain + uint32_t* pSwapchainImageCount + VkImage* pSwapchainImages + + + VkResult vkAcquireNextImageKHR + VkDevice device + VkSwapchainKHR swapchain + uint64_t timeout + VkSemaphore semaphore + VkFence fence + uint32_t* pImageIndex + + + VkResult vkQueuePresentKHR + VkQueue queue + const VkPresentInfoKHR* pPresentInfo + + + VkResult vkCreateWaylandSurfaceKHR + VkInstance instance + const VkWaylandSurfaceCreateInfoKHR* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkSurfaceKHR* pSurface + + + VkBool32 vkGetPhysicalDeviceWaylandPresentationSupportKHR + VkPhysicalDevice physicalDevice + uint32_t queueFamilyIndex + struct wl_display* display + + + VkResult vkCreateWin32SurfaceKHR + VkInstance instance + const VkWin32SurfaceCreateInfoKHR* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkSurfaceKHR* pSurface + + + VkBool32 vkGetPhysicalDeviceWin32PresentationSupportKHR + VkPhysicalDevice physicalDevice + uint32_t queueFamilyIndex + + + VkResult vkCreateXlibSurfaceKHR + VkInstance instance + const VkXlibSurfaceCreateInfoKHR* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkSurfaceKHR* pSurface + + + VkBool32 vkGetPhysicalDeviceXlibPresentationSupportKHR + VkPhysicalDevice physicalDevice + uint32_t queueFamilyIndex + Display* dpy + VisualID visualID + + + VkResult vkCreateXcbSurfaceKHR + VkInstance instance + const VkXcbSurfaceCreateInfoKHR* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkSurfaceKHR* pSurface + + + VkBool32 vkGetPhysicalDeviceXcbPresentationSupportKHR + VkPhysicalDevice physicalDevice + uint32_t queueFamilyIndex + xcb_connection_t* connection + xcb_visualid_t visual_id + + + VkResult vkCreateDebugReportCallbackEXT + VkInstance instance + const VkDebugReportCallbackCreateInfoEXT* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkDebugReportCallbackEXT* pCallback + + + void vkDestroyDebugReportCallbackEXT + VkInstance instance + VkDebugReportCallbackEXT callback + const VkAllocationCallbacks* pAllocator + + + void vkDebugReportMessageEXT + VkInstance instance + VkDebugReportFlagsEXT flags + VkDebugReportObjectTypeEXT objectType + uint64_t object + size_t location + int32_t messageCode + const char* pLayerPrefix + const char* pMessage + + + VkResult vkDebugMarkerSetObjectNameEXT + VkDevice device + VkDebugMarkerObjectNameInfoEXT* pNameInfo + + + VkResult vkDebugMarkerSetObjectTagEXT + VkDevice device + VkDebugMarkerObjectTagInfoEXT* pTagInfo + + + void vkCmdDebugMarkerBeginEXT + VkCommandBuffer commandBuffer + VkDebugMarkerMarkerInfoEXT* pMarkerInfo + + + void vkCmdDebugMarkerEndEXT + VkCommandBuffer commandBuffer + + + void vkCmdDebugMarkerInsertEXT + VkCommandBuffer commandBuffer + VkDebugMarkerMarkerInfoEXT* pMarkerInfo + + + VkResult vkGetPhysicalDeviceExternalImageFormatPropertiesNV + VkPhysicalDevice physicalDevice + VkFormat format + VkImageType type + VkImageTiling tiling + VkImageUsageFlags usage + VkImageCreateFlags flags + VkExternalMemoryHandleTypeFlagsNV externalHandleType + VkExternalImageFormatPropertiesNV* pExternalImageFormatProperties + + + VkResult vkGetMemoryWin32HandleNV + VkDevice device + VkDeviceMemory memory + VkExternalMemoryHandleTypeFlagsNV handleType + HANDLE* pHandle + + + void vkCmdDrawIndirectCountAMD + VkCommandBuffer commandBuffer + VkBuffer buffer + VkDeviceSize offset + VkBuffer countBuffer + VkDeviceSize countBufferOffset + uint32_t maxDrawCount + uint32_t stride + + + void vkCmdDrawIndexedIndirectCountAMD + VkCommandBuffer commandBuffer + VkBuffer buffer + VkDeviceSize offset + VkBuffer countBuffer + VkDeviceSize countBufferOffset + uint32_t maxDrawCount + uint32_t stride + + + void vkCmdProcessCommandsNVX + VkCommandBuffer commandBuffer + const VkCmdProcessCommandsInfoNVX* pProcessCommandsInfo + + + void vkCmdReserveSpaceForCommandsNVX + VkCommandBuffer commandBuffer + const VkCmdReserveSpaceForCommandsInfoNVX* pReserveSpaceInfo + + + VkResult vkCreateIndirectCommandsLayoutNVX + VkDevice device + const VkIndirectCommandsLayoutCreateInfoNVX* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkIndirectCommandsLayoutNVX* pIndirectCommandsLayout + + + void vkDestroyIndirectCommandsLayoutNVX + VkDevice device + VkIndirectCommandsLayoutNVX indirectCommandsLayout + const VkAllocationCallbacks* pAllocator + + + VkResult vkCreateObjectTableNVX + VkDevice device + const VkObjectTableCreateInfoNVX* pCreateInfo + const VkAllocationCallbacks* pAllocator + VkObjectTableNVX* pObjectTable + + + void vkDestroyObjectTableNVX + VkDevice device + VkObjectTableNVX objectTable + const VkAllocationCallbacks* pAllocator + + + VkResult vkRegisterObjectsNVX + VkDevice device + VkObjectTableNVX objectTable + uint32_t objectCount + const VkObjectTableEntryNVX* const* ppObjectTableEntries + const uint32_t* pObjectIndices + + + VkResult vkUnregisterObjectsNVX + VkDevice device + VkObjectTableNVX objectTable + uint32_t objectCount + const VkObjectEntryTypeNVX* pObjectEntryTypes + const uint32_t* pObjectIndices + + + void vkGetPhysicalDeviceGeneratedCommandsPropertiesNVX + VkPhysicalDevice physicalDevice + VkDeviceGeneratedCommandsFeaturesNVX* pFeatures + VkDeviceGeneratedCommandsLimitsNVX* pLimits + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff -Nru mesa-12.0.6/src/vulkan/wsi/Makefile.am mesa-17.0.7/src/vulkan/wsi/Makefile.am --- mesa-12.0.6/src/vulkan/wsi/Makefile.am 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/vulkan/wsi/Makefile.am 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,49 @@ + +include Makefile.sources + +vulkan_includedir = $(includedir)/vulkan + +noinst_LTLIBRARIES = libvulkan_wsi.la + +AM_CPPFLAGS = \ + $(DEFINES) \ + -I$(top_srcdir)/include \ + -I$(top_srcdir)/src \ + -I$(top_srcdir)/src/gallium/auxiliary \ + -I$(top_srcdir)/src/gallium/include + +AM_CFLAGS = \ + $(VISIBILITY_CFLAGS) + +VULKAN_LIB_DEPS = + +VULKAN_WSI_SOURCES = \ + $(VULKAN_WSI_FILES) + +if HAVE_PLATFORM_X11 +AM_CPPFLAGS += \ + $(XCB_DRI3_CFLAGS) \ + -DVK_USE_PLATFORM_XCB_KHR \ + -DVK_USE_PLATFORM_XLIB_KHR + +VULKAN_WSI_SOURCES += $(VULKAN_WSI_X11_FILES) + +# FIXME: Use pkg-config for X11-xcb ldflags. +VULKAN_LIB_DEPS += $(XCB_DRI3_LIBS) -lX11-xcb +endif + +if HAVE_PLATFORM_WAYLAND +AM_CPPFLAGS += \ + -I$(top_builddir)/src/egl/wayland/wayland-drm \ + -I$(top_srcdir)/src/egl/wayland/wayland-drm \ + $(WAYLAND_CFLAGS) \ + -DVK_USE_PLATFORM_WAYLAND_KHR + +VULKAN_WSI_SOURCES += $(VULKAN_WSI_WAYLAND_FILES) + +VULKAN_LIB_DEPS += \ + $(top_builddir)/src/egl/wayland/wayland-drm/libwayland-drm.la \ + $(WAYLAND_LIBS) +endif + +libvulkan_wsi_la_SOURCES = $(VULKAN_WSI_SOURCES) diff -Nru mesa-12.0.6/src/vulkan/wsi/Makefile.in mesa-17.0.7/src/vulkan/wsi/Makefile.in --- mesa-12.0.6/src/vulkan/wsi/Makefile.in 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/vulkan/wsi/Makefile.in 2017-06-01 10:37:24.000000000 +0000 @@ -0,0 +1,827 @@ +# Makefile.in generated by automake 1.15 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994-2014 Free Software Foundation, Inc. + +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +# PARTICULAR PURPOSE. + +@SET_MAKE@ + +VPATH = @srcdir@ +am__is_gnu_make = { \ + if test -z '$(MAKELEVEL)'; then \ + false; \ + elif test -n '$(MAKE_HOST)'; then \ + true; \ + elif test -n '$(MAKE_VERSION)' && test -n '$(CURDIR)'; then \ + true; \ + else \ + false; \ + fi; \ +} +am__make_running_with_option = \ + case $${target_option-} in \ + ?) ;; \ + *) echo "am__make_running_with_option: internal error: invalid" \ + "target option '$${target_option-}' specified" >&2; \ + exit 1;; \ + esac; \ + has_opt=no; \ + sane_makeflags=$$MAKEFLAGS; \ + if $(am__is_gnu_make); then \ + sane_makeflags=$$MFLAGS; \ + else \ + case $$MAKEFLAGS in \ + *\\[\ \ ]*) \ + bs=\\; \ + sane_makeflags=`printf '%s\n' "$$MAKEFLAGS" \ + | sed "s/$$bs$$bs[$$bs $$bs ]*//g"`;; \ + esac; \ + fi; \ + skip_next=no; \ + strip_trailopt () \ + { \ + flg=`printf '%s\n' "$$flg" | sed "s/$$1.*$$//"`; \ + }; \ + for flg in $$sane_makeflags; do \ + test $$skip_next = yes && { skip_next=no; continue; }; \ + case $$flg in \ + *=*|--*) continue;; \ + -*I) strip_trailopt 'I'; skip_next=yes;; \ + -*I?*) strip_trailopt 'I';; \ + -*O) strip_trailopt 'O'; skip_next=yes;; \ + -*O?*) strip_trailopt 'O';; \ + -*l) strip_trailopt 'l'; skip_next=yes;; \ + -*l?*) strip_trailopt 'l';; \ + -[dEDm]) skip_next=yes;; \ + -[JT]) skip_next=yes;; \ + esac; \ + case $$flg in \ + *$$target_option*) has_opt=yes; break;; \ + esac; \ + done; \ + test $$has_opt = yes +am__make_dryrun = (target_option=n; $(am__make_running_with_option)) +am__make_keepgoing = (target_option=k; $(am__make_running_with_option)) +pkgdatadir = $(datadir)/@PACKAGE@ +pkgincludedir = $(includedir)/@PACKAGE@ +pkglibdir = $(libdir)/@PACKAGE@ +pkglibexecdir = $(libexecdir)/@PACKAGE@ +am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd +install_sh_DATA = $(install_sh) -c -m 644 +install_sh_PROGRAM = $(install_sh) -c +install_sh_SCRIPT = $(install_sh) -c +INSTALL_HEADER = $(INSTALL_DATA) +transform = $(program_transform_name) +NORMAL_INSTALL = : +PRE_INSTALL = : +POST_INSTALL = : +NORMAL_UNINSTALL = : +PRE_UNINSTALL = : +POST_UNINSTALL = : +build_triplet = @build@ +host_triplet = @host@ +target_triplet = @target@ +@HAVE_PLATFORM_X11_TRUE@am__append_1 = \ +@HAVE_PLATFORM_X11_TRUE@ $(XCB_DRI3_CFLAGS) \ +@HAVE_PLATFORM_X11_TRUE@ -DVK_USE_PLATFORM_XCB_KHR \ +@HAVE_PLATFORM_X11_TRUE@ -DVK_USE_PLATFORM_XLIB_KHR + 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mostlyclean-libtool pdf pdf-am ps ps-am \ + tags tags-am uninstall uninstall-am + +.PRECIOUS: Makefile + + +# Tell versions [3.59,3.63) of GNU make to not export all variables. +# Otherwise a system limit (for SysV at least) may be exceeded. +.NOEXPORT: diff -Nru mesa-12.0.6/src/vulkan/wsi/Makefile.sources mesa-17.0.7/src/vulkan/wsi/Makefile.sources --- mesa-12.0.6/src/vulkan/wsi/Makefile.sources 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/vulkan/wsi/Makefile.sources 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,12 @@ + +VULKAN_WSI_FILES := \ + wsi_common.h \ + wsi_common_queue.h + +VULKAN_WSI_WAYLAND_FILES := \ + wsi_common_wayland.c \ + wsi_common_wayland.h + +VULKAN_WSI_X11_FILES := \ + wsi_common_x11.c \ + wsi_common_x11.h \ No newline at end of file diff -Nru mesa-12.0.6/src/vulkan/wsi/wsi_common.h mesa-17.0.7/src/vulkan/wsi/wsi_common.h --- mesa-12.0.6/src/vulkan/wsi/wsi_common.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/vulkan/wsi/wsi_common.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,152 @@ +/* + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ +#ifndef WSI_COMMON_H +#define WSI_COMMON_H + +#include +#include + +#include "util/vk_alloc.h" +#include +#include + +struct wsi_device; +struct wsi_image_fns { + VkResult (*create_wsi_image)(VkDevice device_h, + const VkSwapchainCreateInfoKHR *pCreateInfo, + const VkAllocationCallbacks *pAllocator, + VkImage *image_p, + VkDeviceMemory *memory_p, + uint32_t *size_p, + uint32_t *offset_p, + uint32_t *row_pitch_p, + int *fd_p); + void (*free_wsi_image)(VkDevice device, + const VkAllocationCallbacks *pAllocator, + VkImage image_h, + VkDeviceMemory memory_h); +}; + +struct wsi_swapchain { + + VkDevice device; + VkAllocationCallbacks alloc; + const struct wsi_image_fns *image_fns; + VkFence fences[3]; + VkPresentModeKHR present_mode; + + VkResult (*destroy)(struct wsi_swapchain *swapchain, + const VkAllocationCallbacks *pAllocator); + VkResult (*get_images)(struct wsi_swapchain *swapchain, + uint32_t *pCount, VkImage *pSwapchainImages); + VkResult (*acquire_next_image)(struct wsi_swapchain *swap_chain, + uint64_t timeout, VkSemaphore semaphore, + uint32_t *image_index); + VkResult (*queue_present)(struct wsi_swapchain *swap_chain, + uint32_t image_index); +}; + +struct wsi_interface { + VkResult (*get_support)(VkIcdSurfaceBase *surface, + struct wsi_device *wsi_device, + const VkAllocationCallbacks *alloc, + uint32_t queueFamilyIndex, + VkBool32* pSupported); + VkResult (*get_capabilities)(VkIcdSurfaceBase *surface, + VkSurfaceCapabilitiesKHR* pSurfaceCapabilities); + VkResult (*get_formats)(VkIcdSurfaceBase *surface, + struct wsi_device *wsi_device, + uint32_t* pSurfaceFormatCount, + VkSurfaceFormatKHR* pSurfaceFormats); + VkResult (*get_present_modes)(VkIcdSurfaceBase *surface, + uint32_t* pPresentModeCount, + VkPresentModeKHR* pPresentModes); + VkResult (*create_swapchain)(VkIcdSurfaceBase *surface, + VkDevice device, + struct wsi_device *wsi_device, + const VkSwapchainCreateInfoKHR* pCreateInfo, + const VkAllocationCallbacks* pAllocator, + const struct wsi_image_fns *image_fns, + struct wsi_swapchain **swapchain); +}; + +#define VK_ICD_WSI_PLATFORM_MAX 5 + +struct wsi_device { + struct wsi_interface * wsi[VK_ICD_WSI_PLATFORM_MAX]; +}; + +struct wsi_callbacks { + void (*get_phys_device_format_properties)(VkPhysicalDevice physicalDevice, + VkFormat format, + VkFormatProperties *pFormatProperties); +}; + +#define WSI_DEFINE_NONDISP_HANDLE_CASTS(__wsi_type, __VkType) \ + \ + static inline struct __wsi_type * \ + __wsi_type ## _from_handle(__VkType _handle) \ + { \ + return (struct __wsi_type *)(uintptr_t) _handle; \ + } \ + \ + static inline __VkType \ + __wsi_type ## _to_handle(struct __wsi_type *_obj) \ + { \ + return (__VkType)(uintptr_t) _obj; \ + } + +WSI_DEFINE_NONDISP_HANDLE_CASTS(wsi_swapchain, VkSwapchainKHR) + +#define ICD_DEFINE_NONDISP_HANDLE_CASTS(__VkIcdType, __VkType) \ + \ + static inline __VkIcdType * \ + __VkIcdType ## _from_handle(__VkType _handle) \ + { \ + return (__VkIcdType *)(uintptr_t) _handle; \ + } \ + \ + static inline __VkType \ + __VkIcdType ## _to_handle(__VkIcdType *_obj) \ + { \ + return (__VkType)(uintptr_t) _obj; \ + } + +#define ICD_FROM_HANDLE(__VkIcdType, __name, __handle) \ + __VkIcdType *__name = __VkIcdType ## _from_handle(__handle) + +ICD_DEFINE_NONDISP_HANDLE_CASTS(VkIcdSurfaceBase, VkSurfaceKHR) + +VkResult wsi_x11_init_wsi(struct wsi_device *wsi_device, + const VkAllocationCallbacks *alloc); +void wsi_x11_finish_wsi(struct wsi_device *wsi_device, + const VkAllocationCallbacks *alloc); +VkResult wsi_wl_init_wsi(struct wsi_device *wsi_device, + const VkAllocationCallbacks *alloc, + VkPhysicalDevice physical_device, + const struct wsi_callbacks *cbs); +void wsi_wl_finish_wsi(struct wsi_device *wsi_device, + const VkAllocationCallbacks *alloc); + + +#endif diff -Nru mesa-12.0.6/src/vulkan/wsi/wsi_common_queue.h mesa-17.0.7/src/vulkan/wsi/wsi_common_queue.h --- mesa-12.0.6/src/vulkan/wsi/wsi_common_queue.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/vulkan/wsi/wsi_common_queue.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,155 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef VULKAN_WSI_COMMON_QUEUE_H +#define VULKAN_WSI_COMMON_QUEUE_H + +#include +#include +#include "util/u_vector.h" + +struct wsi_queue { + struct u_vector vector; + pthread_mutex_t mutex; + pthread_cond_t cond; +}; + +static inline int +wsi_queue_init(struct wsi_queue *queue, int length) +{ + int ret; + + uint32_t length_pow2 = 4; + while (length_pow2 < length) + length_pow2 *= 2; + + ret = u_vector_init(&queue->vector, sizeof(uint32_t), + sizeof(uint32_t) * length_pow2); + if (!ret) + return ENOMEM; + + pthread_condattr_t condattr; + ret = pthread_condattr_init(&condattr); + if (ret) + goto fail_vector; + + ret = pthread_condattr_setclock(&condattr, CLOCK_MONOTONIC); + if (ret) + goto fail_condattr; + + ret = pthread_cond_init(&queue->cond, &condattr); + if (ret) + goto fail_condattr; + + ret = pthread_mutex_init(&queue->mutex, NULL); + if (ret) + goto fail_cond; + + pthread_condattr_destroy(&condattr); + return 0; + +fail_cond: + pthread_cond_destroy(&queue->cond); +fail_condattr: + pthread_condattr_destroy(&condattr); +fail_vector: + u_vector_finish(&queue->vector); + + return ret; +} + +static inline void +wsi_queue_destroy(struct wsi_queue *queue) +{ + u_vector_finish(&queue->vector); + pthread_mutex_destroy(&queue->mutex); + pthread_cond_destroy(&queue->cond); +} + +static inline void +wsi_queue_push(struct wsi_queue *queue, uint32_t index) +{ + uint32_t *elem; + + pthread_mutex_lock(&queue->mutex); + + if (u_vector_length(&queue->vector) == 0) + pthread_cond_signal(&queue->cond); + + elem = u_vector_add(&queue->vector); + *elem = index; + + pthread_mutex_unlock(&queue->mutex); +} + +#define NSEC_PER_SEC 1000000000 +#define INT_TYPE_MAX(type) ((1ull << (sizeof(type) * 8 - 1)) - 1) + +static inline VkResult +wsi_queue_pull(struct wsi_queue *queue, uint32_t *index, uint64_t timeout) +{ + VkResult result; + int32_t ret; + + pthread_mutex_lock(&queue->mutex); + + struct timespec now; + clock_gettime(CLOCK_MONOTONIC, &now); + + uint32_t abs_nsec = now.tv_nsec + timeout % NSEC_PER_SEC; + uint64_t abs_sec = now.tv_sec + (abs_nsec / NSEC_PER_SEC) + + (timeout / NSEC_PER_SEC); + abs_nsec %= NSEC_PER_SEC; + + /* Avoid roll-over in tv_sec on 32-bit systems if the user provided timeout + * is UINT64_MAX + */ + struct timespec abstime; + abstime.tv_nsec = abs_nsec; + abstime.tv_sec = MIN2(abs_sec, INT_TYPE_MAX(abstime.tv_sec)); + + while (u_vector_length(&queue->vector) == 0) { + ret = pthread_cond_timedwait(&queue->cond, &queue->mutex, &abstime); + if (ret == 0) { + continue; + } else if (ret == ETIMEDOUT) { + result = VK_TIMEOUT; + goto end; + } else { + /* Something went badly wrong */ + result = VK_ERROR_OUT_OF_DATE_KHR; + goto end; + } + } + + uint32_t *elem = u_vector_remove(&queue->vector); + *index = *elem; + result = VK_SUCCESS; + +end: + pthread_mutex_unlock(&queue->mutex); + + return result; +} + +#endif /* VULKAN_WSI_COMMON_QUEUE_H */ diff -Nru mesa-12.0.6/src/vulkan/wsi/wsi_common_wayland.c mesa-17.0.7/src/vulkan/wsi/wsi_common_wayland.c --- mesa-12.0.6/src/vulkan/wsi/wsi_common_wayland.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/vulkan/wsi/wsi_common_wayland.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,896 @@ +/* + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include "wsi_common_wayland.h" + +#include +#include + +#define typed_memcpy(dest, src, count) ({ \ + STATIC_ASSERT(sizeof(*src) == sizeof(*dest)); \ + memcpy((dest), (src), (count) * sizeof(*(src))); \ +}) + +struct wsi_wayland; + +struct wsi_wl_display { + /* The real wl_display */ + struct wl_display * wl_display; + /* Actually a proxy wrapper around the event queue */ + struct wl_display * wl_display_wrapper; + struct wl_event_queue * queue; + struct wl_drm * drm; + + struct wsi_wayland *wsi_wl; + /* Vector of VkFormats supported */ + struct u_vector formats; + + uint32_t capabilities; +}; + +struct wsi_wayland { + struct wsi_interface base; + + const VkAllocationCallbacks *alloc; + VkPhysicalDevice physical_device; + + pthread_mutex_t mutex; + /* Hash table of wl_display -> wsi_wl_display mappings */ + struct hash_table * displays; + + const struct wsi_callbacks *cbs; +}; + +static void +wsi_wl_display_add_vk_format(struct wsi_wl_display *display, VkFormat format) +{ + /* Don't add a format that's already in the list */ + VkFormat *f; + u_vector_foreach(f, &display->formats) + if (*f == format) + return; + + /* Don't add formats that aren't renderable. */ + VkFormatProperties props; + + display->wsi_wl->cbs->get_phys_device_format_properties(display->wsi_wl->physical_device, + format, &props); + if (!(props.optimalTilingFeatures & VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BIT)) + return; + + f = u_vector_add(&display->formats); + if (f) + *f = format; +} + +static void +drm_handle_device(void *data, struct wl_drm *drm, const char *name) +{ + fprintf(stderr, "wl_drm.device(%s)\n", name); +} + +static uint32_t +wl_drm_format_for_vk_format(VkFormat vk_format, bool alpha) +{ + switch (vk_format) { + /* TODO: Figure out what all the formats mean and make this table + * correct. + */ +#if 0 + case VK_FORMAT_R4G4B4A4_UNORM: + return alpha ? WL_DRM_FORMAT_ABGR4444 : WL_DRM_FORMAT_XBGR4444; + case VK_FORMAT_R5G6B5_UNORM: + return WL_DRM_FORMAT_BGR565; + case VK_FORMAT_R5G5B5A1_UNORM: + return alpha ? WL_DRM_FORMAT_ABGR1555 : WL_DRM_FORMAT_XBGR1555; + case VK_FORMAT_R8G8B8_UNORM: + return WL_DRM_FORMAT_XBGR8888; + case VK_FORMAT_R8G8B8A8_UNORM: + return alpha ? WL_DRM_FORMAT_ABGR8888 : WL_DRM_FORMAT_XBGR8888; + case VK_FORMAT_R10G10B10A2_UNORM: + return alpha ? WL_DRM_FORMAT_ABGR2101010 : WL_DRM_FORMAT_XBGR2101010; + case VK_FORMAT_B4G4R4A4_UNORM: + return alpha ? WL_DRM_FORMAT_ARGB4444 : WL_DRM_FORMAT_XRGB4444; + case VK_FORMAT_B5G6R5_UNORM: + return WL_DRM_FORMAT_RGB565; + case VK_FORMAT_B5G5R5A1_UNORM: + return alpha ? WL_DRM_FORMAT_XRGB1555 : WL_DRM_FORMAT_XRGB1555; +#endif + case VK_FORMAT_B8G8R8_UNORM: + case VK_FORMAT_B8G8R8_SRGB: + return WL_DRM_FORMAT_BGRX8888; + case VK_FORMAT_B8G8R8A8_UNORM: + case VK_FORMAT_B8G8R8A8_SRGB: + return alpha ? WL_DRM_FORMAT_ARGB8888 : WL_DRM_FORMAT_XRGB8888; +#if 0 + case VK_FORMAT_B10G10R10A2_UNORM: + return alpha ? WL_DRM_FORMAT_ARGB2101010 : WL_DRM_FORMAT_XRGB2101010; +#endif + + default: + assert(!"Unsupported Vulkan format"); + return 0; + } +} + +static void +drm_handle_format(void *data, struct wl_drm *drm, uint32_t wl_format) +{ + struct wsi_wl_display *display = data; + + switch (wl_format) { +#if 0 + case WL_DRM_FORMAT_ABGR4444: + case WL_DRM_FORMAT_XBGR4444: + wsi_wl_display_add_vk_format(display, VK_FORMAT_R4G4B4A4_UNORM); + break; + case WL_DRM_FORMAT_BGR565: + wsi_wl_display_add_vk_format(display, VK_FORMAT_R5G6B5_UNORM); + break; + case WL_DRM_FORMAT_ABGR1555: + case WL_DRM_FORMAT_XBGR1555: + wsi_wl_display_add_vk_format(display, VK_FORMAT_R5G5B5A1_UNORM); + break; + case WL_DRM_FORMAT_XBGR8888: + wsi_wl_display_add_vk_format(display, VK_FORMAT_R8G8B8_UNORM); + /* fallthrough */ + case WL_DRM_FORMAT_ABGR8888: + wsi_wl_display_add_vk_format(display, VK_FORMAT_R8G8B8A8_UNORM); + break; + case WL_DRM_FORMAT_ABGR2101010: + case WL_DRM_FORMAT_XBGR2101010: + wsi_wl_display_add_vk_format(display, VK_FORMAT_R10G10B10A2_UNORM); + break; + case WL_DRM_FORMAT_ARGB4444: + case WL_DRM_FORMAT_XRGB4444: + wsi_wl_display_add_vk_format(display, VK_FORMAT_B4G4R4A4_UNORM); + break; + case WL_DRM_FORMAT_RGB565: + wsi_wl_display_add_vk_format(display, VK_FORMAT_B5G6R5_UNORM); + break; + case WL_DRM_FORMAT_ARGB1555: + case WL_DRM_FORMAT_XRGB1555: + wsi_wl_display_add_vk_format(display, VK_FORMAT_B5G5R5A1_UNORM); + break; +#endif + case WL_DRM_FORMAT_XRGB8888: + wsi_wl_display_add_vk_format(display, VK_FORMAT_B8G8R8_SRGB); + wsi_wl_display_add_vk_format(display, VK_FORMAT_B8G8R8_UNORM); + /* fallthrough */ + case WL_DRM_FORMAT_ARGB8888: + wsi_wl_display_add_vk_format(display, VK_FORMAT_B8G8R8A8_SRGB); + wsi_wl_display_add_vk_format(display, VK_FORMAT_B8G8R8A8_UNORM); + break; +#if 0 + case WL_DRM_FORMAT_ARGB2101010: + case WL_DRM_FORMAT_XRGB2101010: + wsi_wl_display_add_vk_format(display, VK_FORMAT_B10G10R10A2_UNORM); + break; +#endif + } +} + +static void +drm_handle_authenticated(void *data, struct wl_drm *drm) +{ +} + +static void +drm_handle_capabilities(void *data, struct wl_drm *drm, uint32_t capabilities) +{ + struct wsi_wl_display *display = data; + + display->capabilities = capabilities; +} + +static const struct wl_drm_listener drm_listener = { + drm_handle_device, + drm_handle_format, + drm_handle_authenticated, + drm_handle_capabilities, +}; + +static void +registry_handle_global(void *data, struct wl_registry *registry, + uint32_t name, const char *interface, uint32_t version) +{ + struct wsi_wl_display *display = data; + + if (strcmp(interface, "wl_drm") == 0) { + assert(display->drm == NULL); + + assert(version >= 2); + display->drm = wl_registry_bind(registry, name, &wl_drm_interface, 2); + + if (display->drm) + wl_drm_add_listener(display->drm, &drm_listener, display); + } +} + +static void +registry_handle_global_remove(void *data, struct wl_registry *registry, + uint32_t name) +{ /* No-op */ } + +static const struct wl_registry_listener registry_listener = { + registry_handle_global, + registry_handle_global_remove +}; + +static void +wsi_wl_display_destroy(struct wsi_wayland *wsi, struct wsi_wl_display *display) +{ + u_vector_finish(&display->formats); + if (display->drm) + wl_drm_destroy(display->drm); + if (display->wl_display_wrapper) + wl_proxy_wrapper_destroy(display->wl_display_wrapper); + if (display->queue) + wl_event_queue_destroy(display->queue); + vk_free(wsi->alloc, display); +} + +static struct wsi_wl_display * +wsi_wl_display_create(struct wsi_wayland *wsi, struct wl_display *wl_display) +{ + struct wsi_wl_display *display = + vk_alloc(wsi->alloc, sizeof(*display), 8, + VK_SYSTEM_ALLOCATION_SCOPE_INSTANCE); + if (!display) + return NULL; + + memset(display, 0, sizeof(*display)); + + display->wsi_wl = wsi; + display->wl_display = wl_display; + + if (!u_vector_init(&display->formats, sizeof(VkFormat), 8)) + goto fail; + + display->queue = wl_display_create_queue(wl_display); + if (!display->queue) + goto fail; + + display->wl_display_wrapper = wl_proxy_create_wrapper(wl_display); + if (!display->wl_display_wrapper) + goto fail; + + wl_proxy_set_queue((struct wl_proxy *) display->wl_display_wrapper, + display->queue); + + struct wl_registry *registry = + wl_display_get_registry(display->wl_display_wrapper); + if (!registry) + goto fail; + + wl_registry_add_listener(registry, ®istry_listener, display); + + /* Round-trip to get the wl_drm global */ + wl_display_roundtrip_queue(display->wl_display, display->queue); + + if (!display->drm) + goto fail_registry; + + /* Round-trip to get wl_drm formats and capabilities */ + wl_display_roundtrip_queue(display->wl_display, display->queue); + + /* We need prime support */ + if (!(display->capabilities & WL_DRM_CAPABILITY_PRIME)) + goto fail_registry; + + /* We don't need this anymore */ + wl_registry_destroy(registry); + + return display; + +fail_registry: + if (registry) + wl_registry_destroy(registry); + +fail: + wsi_wl_display_destroy(wsi, display); + return NULL; +} + +static struct wsi_wl_display * +wsi_wl_get_display(struct wsi_device *wsi_device, + struct wl_display *wl_display) +{ + struct wsi_wayland *wsi = + (struct wsi_wayland *)wsi_device->wsi[VK_ICD_WSI_PLATFORM_WAYLAND]; + + pthread_mutex_lock(&wsi->mutex); + + struct hash_entry *entry = _mesa_hash_table_search(wsi->displays, + wl_display); + if (!entry) { + /* We're about to make a bunch of blocking calls. Let's drop the + * mutex for now so we don't block up too badly. + */ + pthread_mutex_unlock(&wsi->mutex); + + struct wsi_wl_display *display = wsi_wl_display_create(wsi, wl_display); + if (!display) + return NULL; + + pthread_mutex_lock(&wsi->mutex); + + entry = _mesa_hash_table_search(wsi->displays, wl_display); + if (entry) { + /* Oops, someone raced us to it */ + wsi_wl_display_destroy(wsi, display); + } else { + entry = _mesa_hash_table_insert(wsi->displays, wl_display, display); + } + } + + pthread_mutex_unlock(&wsi->mutex); + + return entry->data; +} + +VkBool32 +wsi_wl_get_presentation_support(struct wsi_device *wsi_device, + struct wl_display *wl_display) +{ + return wsi_wl_get_display(wsi_device, wl_display) != NULL; +} + +static VkResult +wsi_wl_surface_get_support(VkIcdSurfaceBase *surface, + struct wsi_device *wsi_device, + const VkAllocationCallbacks *alloc, + uint32_t queueFamilyIndex, + VkBool32* pSupported) +{ + *pSupported = true; + + return VK_SUCCESS; +} + +static const VkPresentModeKHR present_modes[] = { + VK_PRESENT_MODE_MAILBOX_KHR, + VK_PRESENT_MODE_FIFO_KHR, +}; + +static VkResult +wsi_wl_surface_get_capabilities(VkIcdSurfaceBase *surface, + VkSurfaceCapabilitiesKHR* caps) +{ + /* For true mailbox mode, we need at least 4 images: + * 1) One to scan out from + * 2) One to have queued for scan-out + * 3) One to be currently held by the Wayland compositor + * 4) One to render to + */ + caps->minImageCount = 4; + /* There is no real maximum */ + caps->maxImageCount = 0; + + caps->currentExtent = (VkExtent2D) { -1, -1 }; + caps->minImageExtent = (VkExtent2D) { 1, 1 }; + /* This is the maximum supported size on Intel */ + caps->maxImageExtent = (VkExtent2D) { 1 << 14, 1 << 14 }; + caps->supportedTransforms = VK_SURFACE_TRANSFORM_IDENTITY_BIT_KHR; + caps->currentTransform = VK_SURFACE_TRANSFORM_IDENTITY_BIT_KHR; + caps->maxImageArrayLayers = 1; + + caps->supportedCompositeAlpha = + VK_COMPOSITE_ALPHA_OPAQUE_BIT_KHR | + VK_COMPOSITE_ALPHA_PRE_MULTIPLIED_BIT_KHR; + + caps->supportedUsageFlags = + VK_IMAGE_USAGE_TRANSFER_SRC_BIT | + VK_IMAGE_USAGE_SAMPLED_BIT | + VK_IMAGE_USAGE_TRANSFER_DST_BIT | + VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT; + + return VK_SUCCESS; +} + +static VkResult +wsi_wl_surface_get_formats(VkIcdSurfaceBase *icd_surface, + struct wsi_device *wsi_device, + uint32_t* pSurfaceFormatCount, + VkSurfaceFormatKHR* pSurfaceFormats) +{ + VkIcdSurfaceWayland *surface = (VkIcdSurfaceWayland *)icd_surface; + struct wsi_wl_display *display = + wsi_wl_get_display(wsi_device, surface->display); + if (!display) + return VK_ERROR_OUT_OF_HOST_MEMORY; + + if (pSurfaceFormats == NULL) { + *pSurfaceFormatCount = u_vector_length(&display->formats); + return VK_SUCCESS; + } + + uint32_t count = 0; + VkFormat *f; + u_vector_foreach(f, &display->formats) { + if (count == *pSurfaceFormatCount) + return VK_INCOMPLETE; + + pSurfaceFormats[count++] = (VkSurfaceFormatKHR) { + .format = *f, + /* TODO: We should get this from the compositor somehow */ + .colorSpace = VK_COLORSPACE_SRGB_NONLINEAR_KHR, + }; + } + + assert(*pSurfaceFormatCount <= count); + *pSurfaceFormatCount = count; + + return VK_SUCCESS; +} + +static VkResult +wsi_wl_surface_get_present_modes(VkIcdSurfaceBase *surface, + uint32_t* pPresentModeCount, + VkPresentModeKHR* pPresentModes) +{ + if (pPresentModes == NULL) { + *pPresentModeCount = ARRAY_SIZE(present_modes); + return VK_SUCCESS; + } + + *pPresentModeCount = MIN2(*pPresentModeCount, ARRAY_SIZE(present_modes)); + typed_memcpy(pPresentModes, present_modes, *pPresentModeCount); + + if (*pPresentModeCount < ARRAY_SIZE(present_modes)) + return VK_INCOMPLETE; + else + return VK_SUCCESS; +} + +VkResult wsi_create_wl_surface(const VkAllocationCallbacks *pAllocator, + const VkWaylandSurfaceCreateInfoKHR *pCreateInfo, + VkSurfaceKHR *pSurface) +{ + VkIcdSurfaceWayland *surface; + + surface = vk_alloc(pAllocator, sizeof *surface, 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (surface == NULL) + return VK_ERROR_OUT_OF_HOST_MEMORY; + + surface->base.platform = VK_ICD_WSI_PLATFORM_WAYLAND; + surface->display = pCreateInfo->display; + surface->surface = pCreateInfo->surface; + + *pSurface = VkIcdSurfaceBase_to_handle(&surface->base); + + return VK_SUCCESS; +} + +struct wsi_wl_image { + VkImage image; + VkDeviceMemory memory; + struct wl_buffer * buffer; + bool busy; +}; + +struct wsi_wl_swapchain { + struct wsi_swapchain base; + + struct wsi_wl_display * display; + struct wl_event_queue * queue; + struct wl_surface * surface; + struct wl_drm * drm_wrapper; + struct wl_callback * frame; + + VkExtent2D extent; + VkFormat vk_format; + uint32_t drm_format; + + VkPresentModeKHR present_mode; + bool fifo_ready; + + uint32_t image_count; + struct wsi_wl_image images[0]; +}; + +static VkResult +wsi_wl_swapchain_get_images(struct wsi_swapchain *wsi_chain, + uint32_t *pCount, VkImage *pSwapchainImages) +{ + struct wsi_wl_swapchain *chain = (struct wsi_wl_swapchain *)wsi_chain; + uint32_t ret_count; + VkResult result; + + if (pSwapchainImages == NULL) { + *pCount = chain->image_count; + return VK_SUCCESS; + } + + result = VK_SUCCESS; + ret_count = chain->image_count; + if (chain->image_count > *pCount) { + ret_count = *pCount; + result = VK_INCOMPLETE; + } + + for (uint32_t i = 0; i < ret_count; i++) + pSwapchainImages[i] = chain->images[i].image; + + return result; +} + +static VkResult +wsi_wl_swapchain_acquire_next_image(struct wsi_swapchain *wsi_chain, + uint64_t timeout, + VkSemaphore semaphore, + uint32_t *image_index) +{ + struct wsi_wl_swapchain *chain = (struct wsi_wl_swapchain *)wsi_chain; + + int ret = wl_display_dispatch_queue_pending(chain->display->wl_display, + chain->queue); + /* XXX: I'm not sure if out-of-date is the right error here. If + * wl_display_dispatch_queue_pending fails it most likely means we got + * kicked by the server so this seems more-or-less correct. + */ + if (ret < 0) + return VK_ERROR_OUT_OF_DATE_KHR; + + while (1) { + for (uint32_t i = 0; i < chain->image_count; i++) { + if (!chain->images[i].busy) { + /* We found a non-busy image */ + *image_index = i; + chain->images[i].busy = true; + return VK_SUCCESS; + } + } + + /* This time we do a blocking dispatch because we can't go + * anywhere until we get an event. + */ + int ret = wl_display_roundtrip_queue(chain->display->wl_display, + chain->queue); + if (ret < 0) + return VK_ERROR_OUT_OF_DATE_KHR; + } +} + +static void +frame_handle_done(void *data, struct wl_callback *callback, uint32_t serial) +{ + struct wsi_wl_swapchain *chain = data; + + chain->frame = NULL; + chain->fifo_ready = true; + + wl_callback_destroy(callback); +} + +static const struct wl_callback_listener frame_listener = { + frame_handle_done, +}; + +static VkResult +wsi_wl_swapchain_queue_present(struct wsi_swapchain *wsi_chain, + uint32_t image_index) +{ + struct wsi_wl_swapchain *chain = (struct wsi_wl_swapchain *)wsi_chain; + + if (chain->base.present_mode == VK_PRESENT_MODE_FIFO_KHR) { + while (!chain->fifo_ready) { + int ret = wl_display_dispatch_queue(chain->display->wl_display, + chain->queue); + if (ret < 0) + return VK_ERROR_OUT_OF_DATE_KHR; + } + } + + assert(image_index < chain->image_count); + wl_surface_attach(chain->surface, chain->images[image_index].buffer, 0, 0); + wl_surface_damage(chain->surface, 0, 0, INT32_MAX, INT32_MAX); + + if (chain->base.present_mode == VK_PRESENT_MODE_FIFO_KHR) { + chain->frame = wl_surface_frame(chain->surface); + wl_callback_add_listener(chain->frame, &frame_listener, chain); + chain->fifo_ready = false; + } + + chain->images[image_index].busy = true; + wl_surface_commit(chain->surface); + wl_display_flush(chain->display->wl_display); + + return VK_SUCCESS; +} + +static void +buffer_handle_release(void *data, struct wl_buffer *buffer) +{ + struct wsi_wl_image *image = data; + + assert(image->buffer == buffer); + + image->busy = false; +} + +static const struct wl_buffer_listener buffer_listener = { + buffer_handle_release, +}; + +static VkResult +wsi_wl_image_init(struct wsi_wl_swapchain *chain, + struct wsi_wl_image *image, + const VkSwapchainCreateInfoKHR *pCreateInfo, + const VkAllocationCallbacks* pAllocator) +{ + VkDevice vk_device = chain->base.device; + VkResult result; + int fd; + uint32_t size; + uint32_t row_pitch; + uint32_t offset; + result = chain->base.image_fns->create_wsi_image(vk_device, + pCreateInfo, + pAllocator, + &image->image, + &image->memory, + &size, + &offset, + &row_pitch, + &fd); + if (result != VK_SUCCESS) + return result; + + image->buffer = wl_drm_create_prime_buffer(chain->drm_wrapper, + fd, /* name */ + chain->extent.width, + chain->extent.height, + chain->drm_format, + offset, + row_pitch, + 0, 0, 0, 0 /* unused */); + close(fd); + + if (!image->buffer) + goto fail_image; + + wl_buffer_add_listener(image->buffer, &buffer_listener, image); + + return VK_SUCCESS; + +fail_image: + chain->base.image_fns->free_wsi_image(vk_device, pAllocator, + image->image, image->memory); + + return result; +} + +static VkResult +wsi_wl_swapchain_destroy(struct wsi_swapchain *wsi_chain, + const VkAllocationCallbacks *pAllocator) +{ + struct wsi_wl_swapchain *chain = (struct wsi_wl_swapchain *)wsi_chain; + + for (uint32_t i = 0; i < chain->image_count; i++) { + if (chain->images[i].buffer) { + wl_buffer_destroy(chain->images[i].buffer); + chain->base.image_fns->free_wsi_image(chain->base.device, pAllocator, + chain->images[i].image, + chain->images[i].memory); + } + } + + if (chain->frame) + wl_callback_destroy(chain->frame); + if (chain->surface) + wl_proxy_wrapper_destroy(chain->surface); + if (chain->drm_wrapper) + wl_proxy_wrapper_destroy(chain->drm_wrapper); + if (chain->queue) + wl_event_queue_destroy(chain->queue); + + vk_free(pAllocator, chain); + + return VK_SUCCESS; +} + +static VkResult +wsi_wl_surface_create_swapchain(VkIcdSurfaceBase *icd_surface, + VkDevice device, + struct wsi_device *wsi_device, + const VkSwapchainCreateInfoKHR* pCreateInfo, + const VkAllocationCallbacks* pAllocator, + const struct wsi_image_fns *image_fns, + struct wsi_swapchain **swapchain_out) +{ + VkIcdSurfaceWayland *surface = (VkIcdSurfaceWayland *)icd_surface; + struct wsi_wl_swapchain *chain; + VkResult result; + + assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SWAPCHAIN_CREATE_INFO_KHR); + + int num_images = pCreateInfo->minImageCount; + + size_t size = sizeof(*chain) + num_images * sizeof(chain->images[0]); + chain = vk_alloc(pAllocator, size, 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (chain == NULL) + return VK_ERROR_OUT_OF_HOST_MEMORY; + + /* Mark a bunch of stuff as NULL. This way we can just call + * destroy_swapchain for cleanup. + */ + for (uint32_t i = 0; i < num_images; i++) + chain->images[i].buffer = NULL; + chain->queue = NULL; + chain->surface = NULL; + chain->drm_wrapper = NULL; + chain->frame = NULL; + + bool alpha = pCreateInfo->compositeAlpha == + VK_COMPOSITE_ALPHA_PRE_MULTIPLIED_BIT_KHR; + + chain->base.device = device; + chain->base.destroy = wsi_wl_swapchain_destroy; + chain->base.get_images = wsi_wl_swapchain_get_images; + chain->base.acquire_next_image = wsi_wl_swapchain_acquire_next_image; + chain->base.queue_present = wsi_wl_swapchain_queue_present; + chain->base.image_fns = image_fns; + chain->base.present_mode = pCreateInfo->presentMode; + chain->extent = pCreateInfo->imageExtent; + chain->vk_format = pCreateInfo->imageFormat; + chain->drm_format = wl_drm_format_for_vk_format(chain->vk_format, alpha); + + chain->image_count = num_images; + + chain->display = wsi_wl_get_display(wsi_device, surface->display); + if (!chain->display) { + result = VK_ERROR_INITIALIZATION_FAILED; + goto fail; + } + + chain->queue = wl_display_create_queue(chain->display->wl_display); + if (!chain->queue) { + result = VK_ERROR_INITIALIZATION_FAILED; + goto fail; + } + + chain->surface = wl_proxy_create_wrapper(surface->surface); + if (!chain->surface) { + result = VK_ERROR_INITIALIZATION_FAILED; + goto fail; + } + wl_proxy_set_queue((struct wl_proxy *) chain->surface, chain->queue); + chain->drm_wrapper = wl_proxy_create_wrapper(chain->display->drm); + if (!chain->drm_wrapper) { + result = VK_ERROR_INITIALIZATION_FAILED; + goto fail; + } + wl_proxy_set_queue((struct wl_proxy *) chain->drm_wrapper, chain->queue); + + chain->fifo_ready = true; + + for (uint32_t i = 0; i < chain->image_count; i++) { + result = wsi_wl_image_init(chain, &chain->images[i], + pCreateInfo, pAllocator); + if (result != VK_SUCCESS) + goto fail; + chain->images[i].busy = false; + } + + *swapchain_out = &chain->base; + + return VK_SUCCESS; + +fail: + wsi_wl_swapchain_destroy(&chain->base, pAllocator); + + return result; +} + +VkResult +wsi_wl_init_wsi(struct wsi_device *wsi_device, + const VkAllocationCallbacks *alloc, + VkPhysicalDevice physical_device, + const struct wsi_callbacks *cbs) +{ + struct wsi_wayland *wsi; + VkResult result; + + wsi = vk_alloc(alloc, sizeof(*wsi), 8, + VK_SYSTEM_ALLOCATION_SCOPE_INSTANCE); + if (!wsi) { + result = VK_ERROR_OUT_OF_HOST_MEMORY; + goto fail; + } + + wsi->physical_device = physical_device; + wsi->alloc = alloc; + wsi->cbs = cbs; + int ret = pthread_mutex_init(&wsi->mutex, NULL); + if (ret != 0) { + if (ret == ENOMEM) { + result = VK_ERROR_OUT_OF_HOST_MEMORY; + } else { + /* FINISHME: Choose a better error. */ + result = VK_ERROR_OUT_OF_HOST_MEMORY; + } + + goto fail_alloc; + } + + wsi->displays = _mesa_hash_table_create(NULL, _mesa_hash_pointer, + _mesa_key_pointer_equal); + if (!wsi->displays) { + result = VK_ERROR_OUT_OF_HOST_MEMORY; + goto fail_mutex; + } + + wsi->base.get_support = wsi_wl_surface_get_support; + wsi->base.get_capabilities = wsi_wl_surface_get_capabilities; + wsi->base.get_formats = wsi_wl_surface_get_formats; + wsi->base.get_present_modes = wsi_wl_surface_get_present_modes; + wsi->base.create_swapchain = wsi_wl_surface_create_swapchain; + + wsi_device->wsi[VK_ICD_WSI_PLATFORM_WAYLAND] = &wsi->base; + + return VK_SUCCESS; + +fail_mutex: + pthread_mutex_destroy(&wsi->mutex); + +fail_alloc: + vk_free(alloc, wsi); +fail: + wsi_device->wsi[VK_ICD_WSI_PLATFORM_WAYLAND] = NULL; + + return result; +} + +void +wsi_wl_finish_wsi(struct wsi_device *wsi_device, + const VkAllocationCallbacks *alloc) +{ + struct wsi_wayland *wsi = + (struct wsi_wayland *)wsi_device->wsi[VK_ICD_WSI_PLATFORM_WAYLAND]; + + if (wsi) { + struct hash_entry *entry; + hash_table_foreach(wsi->displays, entry) + wsi_wl_display_destroy(wsi, entry->data); + + _mesa_hash_table_destroy(wsi->displays, NULL); + + pthread_mutex_destroy(&wsi->mutex); + + vk_free(alloc, wsi); + } +} diff -Nru mesa-12.0.6/src/vulkan/wsi/wsi_common_wayland.h mesa-17.0.7/src/vulkan/wsi/wsi_common_wayland.h --- mesa-12.0.6/src/vulkan/wsi/wsi_common_wayland.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/vulkan/wsi/wsi_common_wayland.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,35 @@ +/* + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ +#ifndef WSI_COMMON_WAYLAND_H +#define WSI_COMMON_WAYLAND_H + +#include "wsi_common.h" + +VkBool32 +wsi_wl_get_presentation_support(struct wsi_device *wsi_device, + struct wl_display *wl_display); + +VkResult wsi_create_wl_surface(const VkAllocationCallbacks *pAllocator, + const VkWaylandSurfaceCreateInfoKHR *pCreateInfo, + VkSurfaceKHR *pSurface); +#endif diff -Nru mesa-12.0.6/src/vulkan/wsi/wsi_common_x11.c mesa-17.0.7/src/vulkan/wsi/wsi_common_x11.c --- mesa-12.0.6/src/vulkan/wsi/wsi_common_x11.c 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/vulkan/wsi/wsi_common_x11.c 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,1164 @@ +/* + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include +#include +#include +#include +#include + +#include "util/macros.h" +#include +#include +#include +#include +#include + +#include +#include "util/hash_table.h" + +#include "wsi_common.h" +#include "wsi_common_x11.h" +#include "wsi_common_queue.h" + +#define typed_memcpy(dest, src, count) ({ \ + STATIC_ASSERT(sizeof(*src) == sizeof(*dest)); \ + memcpy((dest), (src), (count) * sizeof(*(src))); \ +}) + +struct wsi_x11_connection { + bool has_dri3; + bool has_present; + bool is_proprietary_x11; +}; + +struct wsi_x11 { + struct wsi_interface base; + + pthread_mutex_t mutex; + /* Hash table of xcb_connection -> wsi_x11_connection mappings */ + struct hash_table *connections; +}; + +static struct wsi_x11_connection * +wsi_x11_connection_create(const VkAllocationCallbacks *alloc, + xcb_connection_t *conn) +{ + xcb_query_extension_cookie_t dri3_cookie, pres_cookie, amd_cookie, nv_cookie; + xcb_query_extension_reply_t *dri3_reply, *pres_reply, *amd_reply, *nv_reply; + + struct wsi_x11_connection *wsi_conn = + vk_alloc(alloc, sizeof(*wsi_conn), 8, + VK_SYSTEM_ALLOCATION_SCOPE_INSTANCE); + if (!wsi_conn) + return NULL; + + dri3_cookie = xcb_query_extension(conn, 4, "DRI3"); + pres_cookie = xcb_query_extension(conn, 7, "PRESENT"); + + /* We try to be nice to users and emit a warning if they try to use a + * Vulkan application on a system without DRI3 enabled. However, this ends + * up spewing the warning when a user has, for example, both Intel + * integrated graphics and a discrete card with proprietary drivers and are + * running on the discrete card with the proprietary DDX. In this case, we + * really don't want to print the warning because it just confuses users. + * As a heuristic to detect this case, we check for a couple of proprietary + * X11 extensions. + */ + amd_cookie = xcb_query_extension(conn, 11, "ATIFGLRXDRI"); + nv_cookie = xcb_query_extension(conn, 10, "NV-CONTROL"); + + dri3_reply = xcb_query_extension_reply(conn, dri3_cookie, NULL); + pres_reply = xcb_query_extension_reply(conn, pres_cookie, NULL); + amd_reply = xcb_query_extension_reply(conn, amd_cookie, NULL); + nv_reply = xcb_query_extension_reply(conn, nv_cookie, NULL); + if (!dri3_reply || !pres_reply) { + free(dri3_reply); + free(pres_reply); + free(amd_reply); + free(nv_reply); + vk_free(alloc, wsi_conn); + return NULL; + } + + wsi_conn->has_dri3 = dri3_reply->present != 0; + wsi_conn->has_present = pres_reply->present != 0; + wsi_conn->is_proprietary_x11 = false; + if (amd_reply && amd_reply->present) + wsi_conn->is_proprietary_x11 = true; + if (nv_reply && nv_reply->present) + wsi_conn->is_proprietary_x11 = true; + + free(dri3_reply); + free(pres_reply); + free(amd_reply); + free(nv_reply); + + return wsi_conn; +} + +static void +wsi_x11_connection_destroy(const VkAllocationCallbacks *alloc, + struct wsi_x11_connection *conn) +{ + vk_free(alloc, conn); +} + +static bool +wsi_x11_check_for_dri3(struct wsi_x11_connection *wsi_conn) +{ + if (wsi_conn->has_dri3) + return true; + if (!wsi_conn->is_proprietary_x11) { + fprintf(stderr, "vulkan: No DRI3 support detected - required for presentation\n" + "Note: you can probably enable DRI3 in your Xorg config\n"); + } + return false; +} + +static struct wsi_x11_connection * +wsi_x11_get_connection(struct wsi_device *wsi_dev, + const VkAllocationCallbacks *alloc, + xcb_connection_t *conn) +{ + struct wsi_x11 *wsi = + (struct wsi_x11 *)wsi_dev->wsi[VK_ICD_WSI_PLATFORM_XCB]; + + pthread_mutex_lock(&wsi->mutex); + + struct hash_entry *entry = _mesa_hash_table_search(wsi->connections, conn); + if (!entry) { + /* We're about to make a bunch of blocking calls. Let's drop the + * mutex for now so we don't block up too badly. + */ + pthread_mutex_unlock(&wsi->mutex); + + struct wsi_x11_connection *wsi_conn = + wsi_x11_connection_create(alloc, conn); + if (!wsi_conn) + return NULL; + + pthread_mutex_lock(&wsi->mutex); + + entry = _mesa_hash_table_search(wsi->connections, conn); + if (entry) { + /* Oops, someone raced us to it */ + wsi_x11_connection_destroy(alloc, wsi_conn); + } else { + entry = _mesa_hash_table_insert(wsi->connections, conn, wsi_conn); + } + } + + pthread_mutex_unlock(&wsi->mutex); + + return entry->data; +} + +static const VkSurfaceFormatKHR formats[] = { + { .format = VK_FORMAT_B8G8R8A8_SRGB, }, + { .format = VK_FORMAT_B8G8R8A8_UNORM, }, +}; + +static const VkPresentModeKHR present_modes[] = { + VK_PRESENT_MODE_IMMEDIATE_KHR, + VK_PRESENT_MODE_MAILBOX_KHR, + VK_PRESENT_MODE_FIFO_KHR, +}; + +static xcb_screen_t * +get_screen_for_root(xcb_connection_t *conn, xcb_window_t root) +{ + xcb_screen_iterator_t screen_iter = + xcb_setup_roots_iterator(xcb_get_setup(conn)); + + for (; screen_iter.rem; xcb_screen_next (&screen_iter)) { + if (screen_iter.data->root == root) + return screen_iter.data; + } + + return NULL; +} + +static xcb_visualtype_t * +screen_get_visualtype(xcb_screen_t *screen, xcb_visualid_t visual_id, + unsigned *depth) +{ + xcb_depth_iterator_t depth_iter = + xcb_screen_allowed_depths_iterator(screen); + + for (; depth_iter.rem; xcb_depth_next (&depth_iter)) { + xcb_visualtype_iterator_t visual_iter = + xcb_depth_visuals_iterator (depth_iter.data); + + for (; visual_iter.rem; xcb_visualtype_next (&visual_iter)) { + if (visual_iter.data->visual_id == visual_id) { + if (depth) + *depth = depth_iter.data->depth; + return visual_iter.data; + } + } + } + + return NULL; +} + +static xcb_visualtype_t * +connection_get_visualtype(xcb_connection_t *conn, xcb_visualid_t visual_id, + unsigned *depth) +{ + xcb_screen_iterator_t screen_iter = + xcb_setup_roots_iterator(xcb_get_setup(conn)); + + /* For this we have to iterate over all of the screens which is rather + * annoying. Fortunately, there is probably only 1. + */ + for (; screen_iter.rem; xcb_screen_next (&screen_iter)) { + xcb_visualtype_t *visual = screen_get_visualtype(screen_iter.data, + visual_id, depth); + if (visual) + return visual; + } + + return NULL; +} + +static xcb_visualtype_t * +get_visualtype_for_window(xcb_connection_t *conn, xcb_window_t window, + unsigned *depth) +{ + xcb_query_tree_cookie_t tree_cookie; + xcb_get_window_attributes_cookie_t attrib_cookie; + xcb_query_tree_reply_t *tree; + xcb_get_window_attributes_reply_t *attrib; + + tree_cookie = xcb_query_tree(conn, window); + attrib_cookie = xcb_get_window_attributes(conn, window); + + tree = xcb_query_tree_reply(conn, tree_cookie, NULL); + attrib = xcb_get_window_attributes_reply(conn, attrib_cookie, NULL); + if (attrib == NULL || tree == NULL) { + free(attrib); + free(tree); + return NULL; + } + + xcb_window_t root = tree->root; + xcb_visualid_t visual_id = attrib->visual; + free(attrib); + free(tree); + + xcb_screen_t *screen = get_screen_for_root(conn, root); + if (screen == NULL) + return NULL; + + return screen_get_visualtype(screen, visual_id, depth); +} + +static bool +visual_has_alpha(xcb_visualtype_t *visual, unsigned depth) +{ + uint32_t rgb_mask = visual->red_mask | + visual->green_mask | + visual->blue_mask; + + uint32_t all_mask = 0xffffffff >> (32 - depth); + + /* Do we have bits left over after RGB? */ + return (all_mask & ~rgb_mask) != 0; +} + +VkBool32 wsi_get_physical_device_xcb_presentation_support( + struct wsi_device *wsi_device, + VkAllocationCallbacks *alloc, + uint32_t queueFamilyIndex, + xcb_connection_t* connection, + xcb_visualid_t visual_id) +{ + struct wsi_x11_connection *wsi_conn = + wsi_x11_get_connection(wsi_device, alloc, connection); + + if (!wsi_conn) + return false; + + if (!wsi_x11_check_for_dri3(wsi_conn)) + return false; + + unsigned visual_depth; + if (!connection_get_visualtype(connection, visual_id, &visual_depth)) + return false; + + if (visual_depth != 24 && visual_depth != 32) + return false; + + return true; +} + +static xcb_connection_t* +x11_surface_get_connection(VkIcdSurfaceBase *icd_surface) +{ + if (icd_surface->platform == VK_ICD_WSI_PLATFORM_XLIB) + return XGetXCBConnection(((VkIcdSurfaceXlib *)icd_surface)->dpy); + else + return ((VkIcdSurfaceXcb *)icd_surface)->connection; +} + +static xcb_window_t +x11_surface_get_window(VkIcdSurfaceBase *icd_surface) +{ + if (icd_surface->platform == VK_ICD_WSI_PLATFORM_XLIB) + return ((VkIcdSurfaceXlib *)icd_surface)->window; + else + return ((VkIcdSurfaceXcb *)icd_surface)->window; +} + +static VkResult +x11_surface_get_support(VkIcdSurfaceBase *icd_surface, + struct wsi_device *wsi_device, + const VkAllocationCallbacks *alloc, + uint32_t queueFamilyIndex, + VkBool32* pSupported) +{ + xcb_connection_t *conn = x11_surface_get_connection(icd_surface); + xcb_window_t window = x11_surface_get_window(icd_surface); + + struct wsi_x11_connection *wsi_conn = + wsi_x11_get_connection(wsi_device, alloc, conn); + if (!wsi_conn) + return VK_ERROR_OUT_OF_HOST_MEMORY; + + if (!wsi_x11_check_for_dri3(wsi_conn)) { + *pSupported = false; + return VK_SUCCESS; + } + + unsigned visual_depth; + if (!get_visualtype_for_window(conn, window, &visual_depth)) { + *pSupported = false; + return VK_SUCCESS; + } + + if (visual_depth != 24 && visual_depth != 32) { + *pSupported = false; + return VK_SUCCESS; + } + + *pSupported = true; + return VK_SUCCESS; +} + +static VkResult +x11_surface_get_capabilities(VkIcdSurfaceBase *icd_surface, + VkSurfaceCapabilitiesKHR *caps) +{ + xcb_connection_t *conn = x11_surface_get_connection(icd_surface); + xcb_window_t window = x11_surface_get_window(icd_surface); + xcb_get_geometry_cookie_t geom_cookie; + xcb_generic_error_t *err; + xcb_get_geometry_reply_t *geom; + unsigned visual_depth; + + geom_cookie = xcb_get_geometry(conn, window); + + /* This does a round-trip. This is why we do get_geometry first and + * wait to read the reply until after we have a visual. + */ + xcb_visualtype_t *visual = + get_visualtype_for_window(conn, window, &visual_depth); + + if (!visual) + return VK_ERROR_SURFACE_LOST_KHR; + + geom = xcb_get_geometry_reply(conn, geom_cookie, &err); + if (geom) { + VkExtent2D extent = { geom->width, geom->height }; + caps->currentExtent = extent; + caps->minImageExtent = extent; + caps->maxImageExtent = extent; + } else { + /* This can happen if the client didn't wait for the configure event + * to come back from the compositor. In that case, we don't know the + * size of the window so we just return valid "I don't know" stuff. + */ + caps->currentExtent = (VkExtent2D) { -1, -1 }; + caps->minImageExtent = (VkExtent2D) { 1, 1 }; + /* This is the maximum supported size on Intel */ + caps->maxImageExtent = (VkExtent2D) { 1 << 14, 1 << 14 }; + } + free(err); + free(geom); + + if (visual_has_alpha(visual, visual_depth)) { + caps->supportedCompositeAlpha = VK_COMPOSITE_ALPHA_INHERIT_BIT_KHR | + VK_COMPOSITE_ALPHA_PRE_MULTIPLIED_BIT_KHR; + } else { + caps->supportedCompositeAlpha = VK_COMPOSITE_ALPHA_INHERIT_BIT_KHR | + VK_COMPOSITE_ALPHA_OPAQUE_BIT_KHR; + } + + /* For true mailbox mode, we need at least 4 images: + * 1) One to scan out from + * 2) One to have queued for scan-out + * 3) One to be currently held by the X server + * 4) One to render to + */ + caps->minImageCount = 2; + /* There is no real maximum */ + caps->maxImageCount = 0; + + caps->supportedTransforms = VK_SURFACE_TRANSFORM_IDENTITY_BIT_KHR; + caps->currentTransform = VK_SURFACE_TRANSFORM_IDENTITY_BIT_KHR; + caps->maxImageArrayLayers = 1; + caps->supportedUsageFlags = + VK_IMAGE_USAGE_TRANSFER_SRC_BIT | + VK_IMAGE_USAGE_SAMPLED_BIT | + VK_IMAGE_USAGE_TRANSFER_DST_BIT | + VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT; + + return VK_SUCCESS; +} + +static VkResult +x11_surface_get_formats(VkIcdSurfaceBase *surface, + struct wsi_device *wsi_device, + uint32_t *pSurfaceFormatCount, + VkSurfaceFormatKHR *pSurfaceFormats) +{ + if (pSurfaceFormats == NULL) { + *pSurfaceFormatCount = ARRAY_SIZE(formats); + return VK_SUCCESS; + } + + *pSurfaceFormatCount = MIN2(*pSurfaceFormatCount, ARRAY_SIZE(formats)); + typed_memcpy(pSurfaceFormats, formats, *pSurfaceFormatCount); + + return *pSurfaceFormatCount < ARRAY_SIZE(formats) ? + VK_INCOMPLETE : VK_SUCCESS; +} + +static VkResult +x11_surface_get_present_modes(VkIcdSurfaceBase *surface, + uint32_t *pPresentModeCount, + VkPresentModeKHR *pPresentModes) +{ + if (pPresentModes == NULL) { + *pPresentModeCount = ARRAY_SIZE(present_modes); + return VK_SUCCESS; + } + + *pPresentModeCount = MIN2(*pPresentModeCount, ARRAY_SIZE(present_modes)); + typed_memcpy(pPresentModes, present_modes, *pPresentModeCount); + + return *pPresentModeCount < ARRAY_SIZE(present_modes) ? + VK_INCOMPLETE : VK_SUCCESS; +} + +VkResult wsi_create_xcb_surface(const VkAllocationCallbacks *pAllocator, + const VkXcbSurfaceCreateInfoKHR *pCreateInfo, + VkSurfaceKHR *pSurface) +{ + VkIcdSurfaceXcb *surface; + + surface = vk_alloc(pAllocator, sizeof *surface, 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (surface == NULL) + return VK_ERROR_OUT_OF_HOST_MEMORY; + + surface->base.platform = VK_ICD_WSI_PLATFORM_XCB; + surface->connection = pCreateInfo->connection; + surface->window = pCreateInfo->window; + + *pSurface = VkIcdSurfaceBase_to_handle(&surface->base); + return VK_SUCCESS; +} + +VkResult wsi_create_xlib_surface(const VkAllocationCallbacks *pAllocator, + const VkXlibSurfaceCreateInfoKHR *pCreateInfo, + VkSurfaceKHR *pSurface) +{ + VkIcdSurfaceXlib *surface; + + surface = vk_alloc(pAllocator, sizeof *surface, 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (surface == NULL) + return VK_ERROR_OUT_OF_HOST_MEMORY; + + surface->base.platform = VK_ICD_WSI_PLATFORM_XLIB; + surface->dpy = pCreateInfo->dpy; + surface->window = pCreateInfo->window; + + *pSurface = VkIcdSurfaceBase_to_handle(&surface->base); + return VK_SUCCESS; +} + +struct x11_image { + VkImage image; + VkDeviceMemory memory; + xcb_pixmap_t pixmap; + bool busy; + struct xshmfence * shm_fence; + uint32_t sync_fence; +}; + +struct x11_swapchain { + struct wsi_swapchain base; + + xcb_connection_t * conn; + xcb_window_t window; + xcb_gc_t gc; + uint32_t depth; + VkExtent2D extent; + uint32_t image_count; + + xcb_present_event_t event_id; + xcb_special_event_t * special_event; + uint64_t send_sbc; + uint64_t last_present_msc; + uint32_t stamp; + + bool threaded; + VkResult status; + struct wsi_queue present_queue; + struct wsi_queue acquire_queue; + pthread_t queue_manager; + + struct x11_image images[0]; +}; + +static VkResult +x11_get_images(struct wsi_swapchain *anv_chain, + uint32_t* pCount, VkImage *pSwapchainImages) +{ + struct x11_swapchain *chain = (struct x11_swapchain *)anv_chain; + uint32_t ret_count; + VkResult result; + + if (pSwapchainImages == NULL) { + *pCount = chain->image_count; + return VK_SUCCESS; + } + + result = VK_SUCCESS; + ret_count = chain->image_count; + if (chain->image_count > *pCount) { + ret_count = *pCount; + result = VK_INCOMPLETE; + } + + for (uint32_t i = 0; i < ret_count; i++) + pSwapchainImages[i] = chain->images[i].image; + + return result; +} + +static VkResult +x11_handle_dri3_present_event(struct x11_swapchain *chain, + xcb_present_generic_event_t *event) +{ + switch (event->evtype) { + case XCB_PRESENT_CONFIGURE_NOTIFY: { + xcb_present_configure_notify_event_t *config = (void *) event; + + if (config->width != chain->extent.width || + config->height != chain->extent.height) + return VK_ERROR_OUT_OF_DATE_KHR; + + break; + } + + case XCB_PRESENT_EVENT_IDLE_NOTIFY: { + xcb_present_idle_notify_event_t *idle = (void *) event; + + for (unsigned i = 0; i < chain->image_count; i++) { + if (chain->images[i].pixmap == idle->pixmap) { + chain->images[i].busy = false; + if (chain->threaded) + wsi_queue_push(&chain->acquire_queue, i); + break; + } + } + + break; + } + + case XCB_PRESENT_EVENT_COMPLETE_NOTIFY: { + xcb_present_complete_notify_event_t *complete = (void *) event; + if (complete->kind == XCB_PRESENT_COMPLETE_KIND_PIXMAP) + chain->last_present_msc = complete->msc; + break; + } + + default: + break; + } + + return VK_SUCCESS; +} + + +static uint64_t wsi_get_current_time(void) +{ + uint64_t current_time; + struct timespec tv; + + clock_gettime(CLOCK_MONOTONIC, &tv); + current_time = tv.tv_nsec + tv.tv_sec*1000000000ull; + return current_time; +} + +static uint64_t wsi_get_absolute_timeout(uint64_t timeout) +{ + uint64_t current_time = wsi_get_current_time(); + + timeout = MIN2(UINT64_MAX - current_time, timeout); + + return current_time + timeout; +} + +static VkResult +x11_acquire_next_image_poll_x11(struct x11_swapchain *chain, + uint32_t *image_index, uint64_t timeout) +{ + xcb_generic_event_t *event; + struct pollfd pfds; + uint64_t atimeout; + while (1) { + for (uint32_t i = 0; i < chain->image_count; i++) { + if (!chain->images[i].busy) { + /* We found a non-busy image */ + xshmfence_await(chain->images[i].shm_fence); + *image_index = i; + chain->images[i].busy = true; + return VK_SUCCESS; + } + } + + xcb_flush(chain->conn); + + if (timeout == UINT64_MAX) { + event = xcb_wait_for_special_event(chain->conn, chain->special_event); + if (!event) + return VK_ERROR_OUT_OF_DATE_KHR; + } else { + event = xcb_poll_for_special_event(chain->conn, chain->special_event); + if (!event) { + int ret; + if (timeout == 0) + return VK_NOT_READY; + + atimeout = wsi_get_absolute_timeout(timeout); + + pfds.fd = xcb_get_file_descriptor(chain->conn); + pfds.events = POLLIN; + ret = poll(&pfds, 1, timeout / 1000 / 1000); + if (ret == 0) + return VK_TIMEOUT; + if (ret == -1) + return VK_ERROR_OUT_OF_DATE_KHR; + + /* If a non-special event happens, the fd will still + * poll. So recalculate the timeout now just in case. + */ + uint64_t current_time = wsi_get_current_time(); + if (atimeout > current_time) + timeout = atimeout - current_time; + else + timeout = 0; + continue; + } + } + + VkResult result = x11_handle_dri3_present_event(chain, (void *)event); + free(event); + if (result != VK_SUCCESS) + return result; + } +} + +static VkResult +x11_acquire_next_image_from_queue(struct x11_swapchain *chain, + uint32_t *image_index_out, uint64_t timeout) +{ + assert(chain->threaded); + + uint32_t image_index; + VkResult result = wsi_queue_pull(&chain->acquire_queue, + &image_index, timeout); + if (result != VK_SUCCESS) { + return result; + } else if (chain->status != VK_SUCCESS) { + return chain->status; + } + + assert(image_index < chain->image_count); + xshmfence_await(chain->images[image_index].shm_fence); + + *image_index_out = image_index; + + return VK_SUCCESS; +} + +static VkResult +x11_present_to_x11(struct x11_swapchain *chain, uint32_t image_index, + uint32_t target_msc) +{ + struct x11_image *image = &chain->images[image_index]; + + assert(image_index < chain->image_count); + + uint32_t options = XCB_PRESENT_OPTION_NONE; + + int64_t divisor = 0; + int64_t remainder = 0; + + if (chain->base.present_mode == VK_PRESENT_MODE_IMMEDIATE_KHR) + options |= XCB_PRESENT_OPTION_ASYNC; + + xshmfence_reset(image->shm_fence); + + ++chain->send_sbc; + xcb_void_cookie_t cookie = + xcb_present_pixmap(chain->conn, + chain->window, + image->pixmap, + (uint32_t) chain->send_sbc, + 0, /* valid */ + 0, /* update */ + 0, /* x_off */ + 0, /* y_off */ + XCB_NONE, /* target_crtc */ + XCB_NONE, + image->sync_fence, + options, + target_msc, + divisor, + remainder, 0, NULL); + xcb_discard_reply(chain->conn, cookie.sequence); + image->busy = true; + + xcb_flush(chain->conn); + + return VK_SUCCESS; +} + +static VkResult +x11_acquire_next_image(struct wsi_swapchain *anv_chain, + uint64_t timeout, + VkSemaphore semaphore, + uint32_t *image_index) +{ + struct x11_swapchain *chain = (struct x11_swapchain *)anv_chain; + + if (chain->threaded) { + return x11_acquire_next_image_from_queue(chain, image_index, timeout); + } else { + return x11_acquire_next_image_poll_x11(chain, image_index, timeout); + } +} + +static VkResult +x11_queue_present(struct wsi_swapchain *anv_chain, + uint32_t image_index) +{ + struct x11_swapchain *chain = (struct x11_swapchain *)anv_chain; + + if (chain->threaded) { + wsi_queue_push(&chain->present_queue, image_index); + return chain->status; + } else { + return x11_present_to_x11(chain, image_index, 0); + } +} + +static void * +x11_manage_fifo_queues(void *state) +{ + struct x11_swapchain *chain = state; + VkResult result; + + assert(chain->base.present_mode == VK_PRESENT_MODE_FIFO_KHR); + + while (chain->status == VK_SUCCESS) { + /* It should be safe to unconditionally block here. Later in the loop + * we blocks until the previous present has landed on-screen. At that + * point, we should have received IDLE_NOTIFY on all images presented + * before that point so the client should be able to acquire any image + * other than the currently presented one. + */ + uint32_t image_index; + result = wsi_queue_pull(&chain->present_queue, &image_index, INT64_MAX); + if (result != VK_SUCCESS) { + goto fail; + } else if (chain->status != VK_SUCCESS) { + return NULL; + } + + uint64_t target_msc = chain->last_present_msc + 1; + result = x11_present_to_x11(chain, image_index, target_msc); + if (result != VK_SUCCESS) + goto fail; + + while (chain->last_present_msc < target_msc) { + xcb_generic_event_t *event = + xcb_wait_for_special_event(chain->conn, chain->special_event); + if (!event) + goto fail; + + result = x11_handle_dri3_present_event(chain, (void *)event); + if (result != VK_SUCCESS) + goto fail; + } + } + +fail: + chain->status = result; + wsi_queue_push(&chain->acquire_queue, UINT32_MAX); + + return NULL; +} + +static VkResult +x11_image_init(VkDevice device_h, struct x11_swapchain *chain, + const VkSwapchainCreateInfoKHR *pCreateInfo, + const VkAllocationCallbacks* pAllocator, + struct x11_image *image) +{ + xcb_void_cookie_t cookie; + VkResult result; + uint32_t row_pitch; + uint32_t offset; + uint32_t bpp = 32; + int fd; + uint32_t size; + + result = chain->base.image_fns->create_wsi_image(device_h, + pCreateInfo, + pAllocator, + &image->image, + &image->memory, + &size, + &offset, + &row_pitch, + &fd); + if (result != VK_SUCCESS) + return result; + + image->pixmap = xcb_generate_id(chain->conn); + + cookie = + xcb_dri3_pixmap_from_buffer_checked(chain->conn, + image->pixmap, + chain->window, + size, + pCreateInfo->imageExtent.width, + pCreateInfo->imageExtent.height, + row_pitch, + chain->depth, bpp, fd); + xcb_discard_reply(chain->conn, cookie.sequence); + + int fence_fd = xshmfence_alloc_shm(); + if (fence_fd < 0) + goto fail_pixmap; + + image->shm_fence = xshmfence_map_shm(fence_fd); + if (image->shm_fence == NULL) + goto fail_shmfence_alloc; + + image->sync_fence = xcb_generate_id(chain->conn); + xcb_dri3_fence_from_fd(chain->conn, + image->pixmap, + image->sync_fence, + false, + fence_fd); + + image->busy = false; + xshmfence_trigger(image->shm_fence); + + return VK_SUCCESS; + +fail_shmfence_alloc: + close(fence_fd); + +fail_pixmap: + cookie = xcb_free_pixmap(chain->conn, image->pixmap); + xcb_discard_reply(chain->conn, cookie.sequence); + + chain->base.image_fns->free_wsi_image(device_h, pAllocator, + image->image, image->memory); + + return result; +} + +static void +x11_image_finish(struct x11_swapchain *chain, + const VkAllocationCallbacks* pAllocator, + struct x11_image *image) +{ + xcb_void_cookie_t cookie; + + cookie = xcb_sync_destroy_fence(chain->conn, image->sync_fence); + xcb_discard_reply(chain->conn, cookie.sequence); + xshmfence_unmap_shm(image->shm_fence); + + cookie = xcb_free_pixmap(chain->conn, image->pixmap); + xcb_discard_reply(chain->conn, cookie.sequence); + + chain->base.image_fns->free_wsi_image(chain->base.device, pAllocator, + image->image, image->memory); +} + +static VkResult +x11_swapchain_destroy(struct wsi_swapchain *anv_chain, + const VkAllocationCallbacks *pAllocator) +{ + struct x11_swapchain *chain = (struct x11_swapchain *)anv_chain; + xcb_void_cookie_t cookie; + + for (uint32_t i = 0; i < chain->image_count; i++) + x11_image_finish(chain, pAllocator, &chain->images[i]); + + if (chain->threaded) { + chain->status = VK_ERROR_OUT_OF_DATE_KHR; + /* Push a UINT32_MAX to wake up the manager */ + wsi_queue_push(&chain->present_queue, UINT32_MAX); + pthread_join(chain->queue_manager, NULL); + wsi_queue_destroy(&chain->acquire_queue); + wsi_queue_destroy(&chain->present_queue); + } + + xcb_unregister_for_special_event(chain->conn, chain->special_event); + cookie = xcb_present_select_input_checked(chain->conn, chain->event_id, + chain->window, + XCB_PRESENT_EVENT_MASK_NO_EVENT); + xcb_discard_reply(chain->conn, cookie.sequence); + + vk_free(pAllocator, chain); + + return VK_SUCCESS; +} + +static VkResult +x11_surface_create_swapchain(VkIcdSurfaceBase *icd_surface, + VkDevice device, + struct wsi_device *wsi_device, + const VkSwapchainCreateInfoKHR *pCreateInfo, + const VkAllocationCallbacks* pAllocator, + const struct wsi_image_fns *image_fns, + struct wsi_swapchain **swapchain_out) +{ + struct x11_swapchain *chain; + xcb_void_cookie_t cookie; + VkResult result; + + assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SWAPCHAIN_CREATE_INFO_KHR); + + const unsigned num_images = pCreateInfo->minImageCount; + + size_t size = sizeof(*chain) + num_images * sizeof(chain->images[0]); + chain = vk_alloc(pAllocator, size, 8, + VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (chain == NULL) + return VK_ERROR_OUT_OF_HOST_MEMORY; + + xcb_connection_t *conn = x11_surface_get_connection(icd_surface); + xcb_window_t window = x11_surface_get_window(icd_surface); + xcb_get_geometry_reply_t *geometry = + xcb_get_geometry_reply(conn, xcb_get_geometry(conn, window), NULL); + + if (geometry == NULL) + return VK_ERROR_SURFACE_LOST_KHR; + + chain->base.device = device; + chain->base.destroy = x11_swapchain_destroy; + chain->base.get_images = x11_get_images; + chain->base.acquire_next_image = x11_acquire_next_image; + chain->base.queue_present = x11_queue_present; + chain->base.image_fns = image_fns; + chain->base.present_mode = pCreateInfo->presentMode; + chain->conn = conn; + chain->window = window; + chain->depth = geometry->depth; + chain->extent = pCreateInfo->imageExtent; + chain->image_count = num_images; + chain->send_sbc = 0; + chain->last_present_msc = 0; + chain->threaded = false; + chain->status = VK_SUCCESS; + + free(geometry); + + chain->event_id = xcb_generate_id(chain->conn); + xcb_present_select_input(chain->conn, chain->event_id, chain->window, + XCB_PRESENT_EVENT_MASK_CONFIGURE_NOTIFY | + XCB_PRESENT_EVENT_MASK_COMPLETE_NOTIFY | + XCB_PRESENT_EVENT_MASK_IDLE_NOTIFY); + + /* Create an XCB event queue to hold present events outside of the usual + * application event queue + */ + chain->special_event = + xcb_register_for_special_xge(chain->conn, &xcb_present_id, + chain->event_id, NULL); + + chain->gc = xcb_generate_id(chain->conn); + if (!chain->gc) { + /* FINISHME: Choose a better error. */ + result = VK_ERROR_OUT_OF_HOST_MEMORY; + goto fail_register; + } + + cookie = xcb_create_gc(chain->conn, + chain->gc, + chain->window, + XCB_GC_GRAPHICS_EXPOSURES, + (uint32_t []) { 0 }); + xcb_discard_reply(chain->conn, cookie.sequence); + + uint32_t image = 0; + for (; image < chain->image_count; image++) { + result = x11_image_init(device, chain, pCreateInfo, pAllocator, + &chain->images[image]); + if (result != VK_SUCCESS) + goto fail_init_images; + } + + if (chain->base.present_mode == VK_PRESENT_MODE_FIFO_KHR) { + chain->threaded = true; + + /* Initialize our queues. We make them image_count + 1 because we will + * occasionally use UINT32_MAX to signal the other thread that an error + * has occurred and we don't want an overflow. + */ + int ret; + ret = wsi_queue_init(&chain->acquire_queue, chain->image_count + 1); + if (ret) { + goto fail_init_images; + } + + ret = wsi_queue_init(&chain->present_queue, chain->image_count + 1); + if (ret) { + wsi_queue_destroy(&chain->acquire_queue); + goto fail_init_images; + } + + for (unsigned i = 0; i < chain->image_count; i++) + wsi_queue_push(&chain->acquire_queue, i); + + ret = pthread_create(&chain->queue_manager, NULL, + x11_manage_fifo_queues, chain); + if (ret) { + wsi_queue_destroy(&chain->present_queue); + wsi_queue_destroy(&chain->acquire_queue); + goto fail_init_images; + } + } + + *swapchain_out = &chain->base; + + return VK_SUCCESS; + +fail_init_images: + for (uint32_t j = 0; j < image; j++) + x11_image_finish(chain, pAllocator, &chain->images[j]); + +fail_register: + xcb_unregister_for_special_event(chain->conn, chain->special_event); + + vk_free(pAllocator, chain); + + return result; +} + +VkResult +wsi_x11_init_wsi(struct wsi_device *wsi_device, + const VkAllocationCallbacks *alloc) +{ + struct wsi_x11 *wsi; + VkResult result; + + wsi = vk_alloc(alloc, sizeof(*wsi), 8, + VK_SYSTEM_ALLOCATION_SCOPE_INSTANCE); + if (!wsi) { + result = VK_ERROR_OUT_OF_HOST_MEMORY; + goto fail; + } + + int ret = pthread_mutex_init(&wsi->mutex, NULL); + if (ret != 0) { + if (ret == ENOMEM) { + result = VK_ERROR_OUT_OF_HOST_MEMORY; + } else { + /* FINISHME: Choose a better error. */ + result = VK_ERROR_OUT_OF_HOST_MEMORY; + } + + goto fail_alloc; + } + + wsi->connections = _mesa_hash_table_create(NULL, _mesa_hash_pointer, + _mesa_key_pointer_equal); + if (!wsi->connections) { + result = VK_ERROR_OUT_OF_HOST_MEMORY; + goto fail_mutex; + } + + wsi->base.get_support = x11_surface_get_support; + wsi->base.get_capabilities = x11_surface_get_capabilities; + wsi->base.get_formats = x11_surface_get_formats; + wsi->base.get_present_modes = x11_surface_get_present_modes; + wsi->base.create_swapchain = x11_surface_create_swapchain; + + wsi_device->wsi[VK_ICD_WSI_PLATFORM_XCB] = &wsi->base; + wsi_device->wsi[VK_ICD_WSI_PLATFORM_XLIB] = &wsi->base; + + return VK_SUCCESS; + +fail_mutex: + pthread_mutex_destroy(&wsi->mutex); +fail_alloc: + vk_free(alloc, wsi); +fail: + wsi_device->wsi[VK_ICD_WSI_PLATFORM_XCB] = NULL; + wsi_device->wsi[VK_ICD_WSI_PLATFORM_XLIB] = NULL; + + return result; +} + +void +wsi_x11_finish_wsi(struct wsi_device *wsi_device, + const VkAllocationCallbacks *alloc) +{ + struct wsi_x11 *wsi = + (struct wsi_x11 *)wsi_device->wsi[VK_ICD_WSI_PLATFORM_XCB]; + + if (wsi) { + struct hash_entry *entry; + hash_table_foreach(wsi->connections, entry) + wsi_x11_connection_destroy(alloc, entry->data); + + _mesa_hash_table_destroy(wsi->connections, NULL); + + pthread_mutex_destroy(&wsi->mutex); + + vk_free(alloc, wsi); + } +} diff -Nru mesa-12.0.6/src/vulkan/wsi/wsi_common_x11.h mesa-17.0.7/src/vulkan/wsi/wsi_common_x11.h --- mesa-12.0.6/src/vulkan/wsi/wsi_common_x11.h 1970-01-01 00:00:00.000000000 +0000 +++ mesa-17.0.7/src/vulkan/wsi/wsi_common_x11.h 2017-06-01 10:37:10.000000000 +0000 @@ -0,0 +1,42 @@ +/* + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ +#ifndef WSI_COMMON_X11_H +#define WSI_COMMON_X11_H + +#include "wsi_common.h" + +VkBool32 wsi_get_physical_device_xcb_presentation_support( + struct wsi_device *wsi_device, + VkAllocationCallbacks *alloc, + uint32_t queueFamilyIndex, + xcb_connection_t* connection, + xcb_visualid_t visual_id); + +VkResult wsi_create_xcb_surface(const VkAllocationCallbacks *pAllocator, + const VkXcbSurfaceCreateInfoKHR *pCreateInfo, + VkSurfaceKHR *pSurface); + +VkResult wsi_create_xlib_surface(const VkAllocationCallbacks *pAllocator, + const VkXlibSurfaceCreateInfoKHR *pCreateInfo, + VkSurfaceKHR *pSurface); +#endif diff -Nru mesa-12.0.6/VERSION mesa-17.0.7/VERSION --- mesa-12.0.6/VERSION 2017-01-24 01:41:27.000000000 +0000 +++ mesa-17.0.7/VERSION 2017-06-01 10:37:10.000000000 +0000 @@ -1 +1 @@ -12.0.6 +17.0.7